From 22424210649625b7565cf916f2c3bb24143f3542 Mon Sep 17 00:00:00 2001 From: Alingof Date: Wed, 9 Jul 2025 15:42:12 +0900 Subject: [PATCH 1/6] [!][fix] fix `Devices::create_device_map` --- hikami_core/src/device.rs | 23 +++++++++++++---------- 1 file changed, 13 insertions(+), 10 deletions(-) diff --git a/hikami_core/src/device.rs b/hikami_core/src/device.rs index 1a47e59..a982f13 100644 --- a/hikami_core/src/device.rs +++ b/hikami_core/src/device.rs @@ -271,10 +271,6 @@ impl Devices { self.clint.memmap(), ]); - if let Some(pci) = &self.pci { - device_mapping.push(pci.memmap()); - device_mapping.extend_from_slice(pci.pci_memory_maps()); - } if let Some(rtc) = &self.rtc { device_mapping.push(rtc.memmap()); } @@ -282,18 +278,25 @@ impl Devices { device_mapping.push(initrd.memmap()); } - // disable drive emulation if `identity_map` feature is enabled - if cfg!(feature = "identity_map") { - if let Some(mmc) = &self.mmc { - device_mapping.push(mmc.memmap()); - } - if let Some(pci) = &self.pci { + if let Some(pci) = &self.pci { + device_mapping.push(pci.memmap()); + + // mapping whole region of block divices + if cfg!(feature = "identity_map") { + device_mapping.extend_from_slice(pci.pci_memory_maps()); + } else { + // mapping pass-through registers' region if let Some(sata) = &pci.pci_devices.sata { use pci::PciDevice; device_mapping.push(sata.memmap()); } } } + if cfg!(feature = "identity_map") { + if let Some(mmc) = &self.mmc { + device_mapping.push(mmc.memmap()); + } + } device_mapping } From fd1881937b9ff3dcb739f4b4b090372afe307f6a Mon Sep 17 00:00:00 2001 From: Alingof Date: Wed, 9 Jul 2025 15:46:31 +0900 Subject: [PATCH 2/6] [!][update] remove `memory_maps` argument from `PciDevice::new` --- hikami_core/src/device/pci.rs | 8 ++------ hikami_core/src/device/pci/iommu.rs | 8 +++----- hikami_core/src/device/pci/sata.rs | 6 ++---- 3 files changed, 7 insertions(+), 15 deletions(-) diff --git a/hikami_core/src/device/pci.rs b/hikami_core/src/device/pci.rs index 7ab144e..3f17d55 100644 --- a/hikami_core/src/device/pci.rs +++ b/hikami_core/src/device/pci.rs @@ -8,7 +8,7 @@ pub mod config_register; use super::{MmioDevice, PTE_FLAGS_FOR_DEVICE}; use crate::memmap::{GuestPhysicalAddress, HostPhysicalAddress, MemoryMap}; -use config_register::{ConfigSpaceHeaderField, read_config_register}; +use config_register::{read_config_register, ConfigSpaceHeaderField}; use alloc::vec::Vec; use core::ops::Range; @@ -60,7 +60,6 @@ pub trait PciDevice { device_id: u32, pci_config_space_base_addr: HostPhysicalAddress, pci_addr_space: &PciAddressSpace, - memory_maps: &mut Vec, ) -> Self; /// Initialize pci device. @@ -87,7 +86,6 @@ impl PciDevices { device_tree: &Fdt, pci_config_space_base_addr: HostPhysicalAddress, pci_addr_space: &PciAddressSpace, - memory_maps: &mut Vec, ) -> Self { /// Max PCI bus size. const PCI_MAX_BUS: u8 = 255; @@ -143,7 +141,6 @@ impl PciDevices { device_id.into(), pci_config_space_base_addr, pci_addr_space, - memory_maps, )); } @@ -299,8 +296,7 @@ impl MmioDevice for Pci { let mut memory_maps = Vec::new(); let base_address = HostPhysicalAddress(region.starting_address as usize); let pci_addr_space = PciAddressSpace::new(device_tree, compatibles); - let pci_devices = - PciDevices::new(device_tree, base_address, &pci_addr_space, &mut memory_maps); + let pci_devices = PciDevices::new(device_tree, base_address, &pci_addr_space); // 32 bit memory map memory_maps.push(MemoryMap::new( diff --git a/hikami_core/src/device/pci/iommu.rs b/hikami_core/src/device/pci/iommu.rs index 9a00f31..464c80d 100644 --- a/hikami_core/src/device/pci/iommu.rs +++ b/hikami_core/src/device/pci/iommu.rs @@ -4,15 +4,14 @@ mod register_map; use super::config_register::{ - ConfigSpaceHeaderField, get_bar_size, read_config_register, write_config_register, + get_bar_size, read_config_register, write_config_register, ConfigSpaceHeaderField, }; use super::{Bdf, PciAddressSpace, PciDevice}; -use crate::PageBlock; use crate::h_extension::csrs::hgatp; -use crate::memmap::{HostPhysicalAddress, MemoryMap, page_table::constants::PAGE_SIZE}; +use crate::memmap::{page_table::constants::PAGE_SIZE, HostPhysicalAddress, MemoryMap}; +use crate::PageBlock; use register_map::{IoMmuMode, IoMmuRegisters}; -use alloc::vec::Vec; use core::ops::Range; use fdt::Fdt; @@ -137,7 +136,6 @@ impl PciDevice for IoMmu { _device_id: u32, _pci_config_space_base_addr: HostPhysicalAddress, _pci_addr_space: &PciAddressSpace, - _memory_maps: &mut Vec, ) -> Self { unreachable!("use `IoMmu::new_from_dtb` instead."); } diff --git a/hikami_core/src/device/pci/sata.rs b/hikami_core/src/device/pci/sata.rs index 61f5c84..bd11eb2 100644 --- a/hikami_core/src/device/pci/sata.rs +++ b/hikami_core/src/device/pci/sata.rs @@ -4,18 +4,17 @@ mod command; -use super::config_register::{ConfigSpaceHeaderField, get_bar_size, read_config_register}; +use super::config_register::{get_bar_size, read_config_register, ConfigSpaceHeaderField}; use super::{Bdf, PciAddressSpace, PciDevice}; use crate::device::DeviceEmulateError; use crate::memmap::page_table::g_stage_trans_addr; use crate::memmap::{GuestPhysicalAddress, HostPhysicalAddress, MemoryMap}; use command::{ - COMMAND_HEADER_SIZE, CommandHeader, CommandTable, CommandTableGpaStorage, TransferDirection, + CommandHeader, CommandTable, CommandTableGpaStorage, TransferDirection, COMMAND_HEADER_SIZE, }; use alloc::boxed::Box; use alloc::vec; -use alloc::vec::Vec; use core::ops::Range; /// Number of SATA port. @@ -406,7 +405,6 @@ impl PciDevice for Sata { device_id: u32, pci_config_space_base_addr: HostPhysicalAddress, pci_addr_space: &PciAddressSpace, - _memory_maps: &mut Vec, ) -> Self { let config_space_header_addr = pci_config_space_base_addr.0 | bdf.calc_config_space_header_offset(); From 21a39dfd10835a3cd727b44e8b2f711b7a338d49 Mon Sep 17 00:00:00 2001 From: Alingof Date: Wed, 9 Jul 2025 16:00:56 +0900 Subject: [PATCH 3/6] [rebase] 1st --- hikami_core/src/device.rs | 8 +------- 1 file changed, 1 insertion(+), 7 deletions(-) diff --git a/hikami_core/src/device.rs b/hikami_core/src/device.rs index a982f13..8083357 100644 --- a/hikami_core/src/device.rs +++ b/hikami_core/src/device.rs @@ -281,15 +281,9 @@ impl Devices { if let Some(pci) = &self.pci { device_mapping.push(pci.memmap()); - // mapping whole region of block divices if cfg!(feature = "identity_map") { + // mapping whole memory mapped register region of block divices. device_mapping.extend_from_slice(pci.pci_memory_maps()); - } else { - // mapping pass-through registers' region - if let Some(sata) = &pci.pci_devices.sata { - use pci::PciDevice; - device_mapping.push(sata.memmap()); - } } } if cfg!(feature = "identity_map") { From 4b7cd64884c19586b211571fda3c82b95f667768 Mon Sep 17 00:00:00 2001 From: Alingof Date: Wed, 9 Jul 2025 16:27:08 +0900 Subject: [PATCH 4/6] [update] update default drive in device tree --- guest_image/guest.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/guest_image/guest.dts b/guest_image/guest.dts index cd54fd1..8f46850 100644 --- a/guest_image/guest.dts +++ b/guest_image/guest.dts @@ -89,7 +89,7 @@ }; chosen { - bootargs = "root=/dev/vda locale.LANG=en_US.UTF-8"; + bootargs = "root=/dev/sda locale.LANG=en_US.UTF-8"; stdout-path = "/soc/serial@10000000"; rng-seed = <0x9775b34d 0xe39158f2 0x3e9d10b1 0x73692dfd 0x13c15814 0xa4ad203f 0x8b0d62f7 0x6bf8a79d>; }; From 40baf07162279732db70e156c092f002b1b67508 Mon Sep 17 00:00:00 2001 From: Alingof Date: Wed, 9 Jul 2025 16:28:03 +0900 Subject: [PATCH 5/6] [refactor] add comments to `MmioDevice` implementation for `Pci` --- hikami_core/src/device/pci.rs | 7 ++++--- hikami_core/src/device/pci/iommu.rs | 6 +++--- hikami_core/src/device/pci/sata.rs | 4 ++-- 3 files changed, 9 insertions(+), 8 deletions(-) diff --git a/hikami_core/src/device/pci.rs b/hikami_core/src/device/pci.rs index 3f17d55..46ed9a3 100644 --- a/hikami_core/src/device/pci.rs +++ b/hikami_core/src/device/pci.rs @@ -8,7 +8,7 @@ pub mod config_register; use super::{MmioDevice, PTE_FLAGS_FOR_DEVICE}; use crate::memmap::{GuestPhysicalAddress, HostPhysicalAddress, MemoryMap}; -use config_register::{read_config_register, ConfigSpaceHeaderField}; +use config_register::{ConfigSpaceHeaderField, read_config_register}; use alloc::vec::Vec; use core::ops::Range; @@ -298,7 +298,7 @@ impl MmioDevice for Pci { let pci_addr_space = PciAddressSpace::new(device_tree, compatibles); let pci_devices = PciDevices::new(device_tree, base_address, &pci_addr_space); - // 32 bit memory map + // 32 bit reserved memory map memory_maps.push(MemoryMap::new( GuestPhysicalAddress(pci_addr_space.bit32_memory_space.start.raw()) ..GuestPhysicalAddress(pci_addr_space.bit32_memory_space.end.raw()), @@ -306,7 +306,7 @@ impl MmioDevice for Pci { &PTE_FLAGS_FOR_DEVICE, )); - // 64 bit memory map + // 64 bit reserved memory map memory_maps.push(MemoryMap::new( GuestPhysicalAddress(pci_addr_space.bit64_memory_space.start.raw()) ..GuestPhysicalAddress(pci_addr_space.bit64_memory_space.end.raw()), @@ -331,6 +331,7 @@ impl MmioDevice for Pci { self.base_addr } + /// mapping sata register region. fn memmap(&self) -> MemoryMap { let vaddr = GuestPhysicalAddress(self.paddr().raw()); MemoryMap::new( diff --git a/hikami_core/src/device/pci/iommu.rs b/hikami_core/src/device/pci/iommu.rs index 464c80d..0ab8d92 100644 --- a/hikami_core/src/device/pci/iommu.rs +++ b/hikami_core/src/device/pci/iommu.rs @@ -4,12 +4,12 @@ mod register_map; use super::config_register::{ - get_bar_size, read_config_register, write_config_register, ConfigSpaceHeaderField, + ConfigSpaceHeaderField, get_bar_size, read_config_register, write_config_register, }; use super::{Bdf, PciAddressSpace, PciDevice}; -use crate::h_extension::csrs::hgatp; -use crate::memmap::{page_table::constants::PAGE_SIZE, HostPhysicalAddress, MemoryMap}; use crate::PageBlock; +use crate::h_extension::csrs::hgatp; +use crate::memmap::{HostPhysicalAddress, MemoryMap, page_table::constants::PAGE_SIZE}; use register_map::{IoMmuMode, IoMmuRegisters}; use core::ops::Range; diff --git a/hikami_core/src/device/pci/sata.rs b/hikami_core/src/device/pci/sata.rs index bd11eb2..e62efc1 100644 --- a/hikami_core/src/device/pci/sata.rs +++ b/hikami_core/src/device/pci/sata.rs @@ -4,13 +4,13 @@ mod command; -use super::config_register::{get_bar_size, read_config_register, ConfigSpaceHeaderField}; +use super::config_register::{ConfigSpaceHeaderField, get_bar_size, read_config_register}; use super::{Bdf, PciAddressSpace, PciDevice}; use crate::device::DeviceEmulateError; use crate::memmap::page_table::g_stage_trans_addr; use crate::memmap::{GuestPhysicalAddress, HostPhysicalAddress, MemoryMap}; use command::{ - CommandHeader, CommandTable, CommandTableGpaStorage, TransferDirection, COMMAND_HEADER_SIZE, + COMMAND_HEADER_SIZE, CommandHeader, CommandTable, CommandTableGpaStorage, TransferDirection, }; use alloc::boxed::Box; From 169b6c62c74a9785891ab8f3dce9d7d7788d49ed Mon Sep 17 00:00:00 2001 From: Alingof Date: Wed, 9 Jul 2025 16:33:51 +0900 Subject: [PATCH 6/6] [fix] fix an argument of `Guest::map_guest_dtb` in `identity_map` feature --- hikami_core/src/guest.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hikami_core/src/guest.rs b/hikami_core/src/guest.rs index f3bd72a..f4abc44 100644 --- a/hikami_core/src/guest.rs +++ b/hikami_core/src/guest.rs @@ -75,7 +75,7 @@ impl Guest { fn map_guest_dtb( _hart_id: usize, page_table_addr: HostPhysicalAddress, - guest_dtb: &'static [u8; include_bytes!("../guest_image/guest.dtb").len()], + guest_dtb: &'static [u8], ) -> GuestPhysicalAddress { use PteFlag::{Accessed, Dirty, Read, User, Valid, Write};