Integration of CHERIoT revisions of `codegen-llvm` and/or `assembly-llvm` test suite

[xdoardo]

Any data we can get to have more confidence about CHERIoT in Rust is of fundamental importance.

In general, a good part of the tests that Rust has in its own test suite needs the test to run or use std or other features that aren't currently available on CHERIoT. The tests in codegen-llvm and assembly-llvm do not require producing an executable and running it; they instead use FileCheck to match the clauses in the comments of the tests with the output produced by the compiler. Some tests still require the standard library to be available, others only require core or alloc (which are available for CHERIoT) and others neither or use minicore.

We should investigate if there are tests which, with relatively low effort, can give us more confidence in the solidity of CHERIoT as a Rust target.

Some suggestions or relevant refences:

• The documentation of compiletest is a good resource to understand how this part of the test suite ({codegen,assembly}-llvm) works;
• An example of adding a CHERIoT test revision in the simplest case is already in the repository;
• Of course, it wouldn't make sense to test platform-dependent behaviour specific to other targets. For example, a test that verifies the compatibility of the output with the ABI of a x86_64-gnu system is not very useful for CHERIoT;
• Adding new tests is fine. Having a tests/codegen-llvm/cheri directory with CHERI(oT)-specific tests would make sense, I think;
• Errors related to the default address space when checking against LLVM-IR could probably be handled with a target-dependent variable to FileCheck (e.g "" for targets with default address space 0, addrspace(200) for CHERIoT) to be added in the place where FileCheck is called.
• My suggestion would be that of choosing a single test and figure out how to make it work, rather than sifting through all of them to find a selection of viable ones and only after that starting to actually make them work.
• A probably easy one to get working (but which I don't expect to pass) is https://github.com/CHERIoT-Platform/cheri-rust/blob/beta/tests/assembly-llvm/asm/riscv-types.rs.