From 1c600cd8a3713bbb8aaf5c8e72ac71910dc0fccc Mon Sep 17 00:00:00 2001 From: John Baldwin Date: Mon, 23 May 2022 08:09:15 -0700 Subject: [PATCH] Two minor updates: - Drop a mention of PICs. - RISC-V is perhaps no longer budding (or at least farther along in the process). --- chap-conclusion.tex | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/chap-conclusion.tex b/chap-conclusion.tex index 62540908..1a466b74 100644 --- a/chap-conclusion.tex +++ b/chap-conclusion.tex @@ -45,8 +45,7 @@ \chapter{Conclusion} \item Elaborated the ISA feature set in CHERI to support real-world operating systems -- primarily this has consisted of developing mature compositions of - CHERI's concepts with system features such as the MMU and exception model, - but also programmable interrupt controllers (PICs). + CHERI's concepts with system features such as the MMU and exception model. We have also spent considerable time refining successive versions of the ISA intended to better support high levels of MMU-based operating-system and C-language compatibility, as well as automatic use by compilers. @@ -63,7 +62,7 @@ \chapter{Conclusion} We have applied CHERI to protection of key system libraries, but also the operating system kernel itself. This has included substantial baseline OS infrastructure work, including - porting FreeBSD to the budding RISC-V architecture. + porting FreeBSD to the RISC-V architecture. \item Prototyped, tested, and refined CHERI ISA extensions across multiple CPU architectures.