diff --git a/target/mips/cpu.h b/target/mips/cpu.h
index 6e3b269750..43eb416611 100644
--- a/target/mips/cpu.h
+++ b/target/mips/cpu.h
@@ -1470,6 +1470,7 @@ mips_cpu_get_tb_cpu_state(CPUMIPSState *env, target_ulong *pc,
                           uint32_t *flags)
 {
     *pc = PC_ADDR(env); // We want the full virtual address here (no offset)
+    *cs_base = 0;
     *flags = env->hflags &
              (MIPS_HFLAG_TMASK | MIPS_HFLAG_BMASK | MIPS_HFLAG_HWRENA_ULR);
 #ifdef TARGET_CHERI
diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
index 9cd535e3ae..a1fbcd3c61 100644
--- a/target/riscv/cpu_helper.c
+++ b/target/riscv/cpu_helper.c
@@ -106,9 +106,8 @@ void riscv_cpu_get_tb_cpu_state(CPURISCVState *env, target_ulong *pc,
 #ifdef TARGET_CHERI
     cheri_cpu_get_tb_cpu_state(&env->PCC, &env->DDC, pcc_base, pcc_top,
                                cheri_flags);
-#else
-    *cs_base = 0;
 #endif
+    *cs_base = 0;
 
     if (riscv_has_ext(env, RVV)) {
         uint32_t vlmax = vext_get_vlmax(env_archcpu(env), env->vtype);