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Other functionalities within the Xita cross-compiler backend need access to a function that can preserve register data by pushing it temporarily to the data stack.
This should first check to see if another CPU register is available, by querying register stack's size() function. By default, there are 28 available general purpose integer registers in an Xita register stack on ARM64 architecture.
If no registers are available in the active register stack, the data should be kept temporarily in static memory. A typical stack structure would probably suffice, but other structures should be considered as well.
Stack operations in AArch64 need to be aligned to 16-bytes and written in store/load pairs; i.e. two general purpose registers are read/written to the stack per transaction. Some control information may be helpful to store with the data, e.g. function scope ID.
The text was updated successfully, but these errors were encountered:
Other functionalities within the Xita cross-compiler backend need access to a function that can preserve register data by pushing it temporarily to the data stack.
This should first check to see if another CPU register is available, by querying register stack's
size()
function. By default, there are 28 available general purpose integer registers in an Xita register stack on ARM64 architecture.If no registers are available in the active register stack, the data should be kept temporarily in static memory. A typical stack structure would probably suffice, but other structures should be considered as well.
Stack operations in AArch64 need to be aligned to 16-bytes and written in store/load pairs; i.e. two general purpose registers are read/written to the stack per transaction. Some control information may be helpful to store with the data, e.g. function scope ID.
The text was updated successfully, but these errors were encountered: