Skip to content

Commit 50de925

Browse files
ylzsxylzsx
authored
[LoongArch] Pre-commit tests for [x]vldi instructions with special constant splats (llvm#159228)
1 parent 961b372 commit 50de925

File tree

2 files changed

+258
-28
lines changed

2 files changed

+258
-28
lines changed

‎llvm/test/CodeGen/LoongArch/lasx/build-vector.ll‎

Lines changed: 129 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -192,8 +192,9 @@ entry:
192192
ret void
193193
}
194194

195-
define void @buildvector_v2f32_const_splat(ptr %dst) nounwind {
196-
; CHECK-LABEL: buildvector_v2f32_const_splat:
195+
;; Also check buildvector_const_splat_xvldi_1010.
196+
define void @buildvector_v8f32_const_splat(ptr %dst) nounwind {
197+
; CHECK-LABEL: buildvector_v8f32_const_splat:
197198
; CHECK: # %bb.0: # %entry
198199
; CHECK-NEXT: lu12i.w $a1, 260096
199200
; CHECK-NEXT: xvreplgr2vr.w $xr0, $a1
@@ -204,6 +205,7 @@ entry:
204205
ret void
205206
}
206207

208+
;; Also check buildvector_const_splat_xvldi_1100.
207209
define void @buildvector_v4f64_const_splat(ptr %dst) nounwind {
208210
; LA32-LABEL: buildvector_v4f64_const_splat:
209211
; LA32: # %bb.0: # %entry
@@ -223,11 +225,124 @@ entry:
223225
ret void
224226
}
225227

228+
;; imm[11:8] == 4'b0000/4'b0100/4'b1000 can be represented using xvrepli.[whb].
229+
define void @buildvector_const_splat_xvldi_0001(ptr %dst) nounwind {
230+
; CHECK-LABEL: buildvector_const_splat_xvldi_0001:
231+
; CHECK: # %bb.0: # %entry
232+
; CHECK-NEXT: ori $a1, $zero, 768
233+
; CHECK-NEXT: xvreplgr2vr.w $xr0, $a1
234+
; CHECK-NEXT: xvst $xr0, $a0, 0
235+
; CHECK-NEXT: ret
236+
entry:
237+
store <8 x i32> <i32 768, i32 768, i32 768, i32 768, i32 768, i32 768, i32 768, i32 768>, ptr %dst
238+
ret void
239+
}
240+
241+
define void @buildvector_const_splat_xvldi_0010(ptr %dst) nounwind {
242+
; CHECK-LABEL: buildvector_const_splat_xvldi_0010:
243+
; CHECK: # %bb.0: # %entry
244+
; CHECK-NEXT: lu12i.w $a1, 16
245+
; CHECK-NEXT: xvreplgr2vr.w $xr0, $a1
246+
; CHECK-NEXT: xvst $xr0, $a0, 0
247+
; CHECK-NEXT: ret
248+
entry:
249+
store <8 x i32> <i32 65536, i32 65536, i32 65536, i32 65536, i32 65536, i32 65536, i32 65536, i32 65536>, ptr %dst
250+
ret void
251+
}
252+
253+
define void @buildvector_const_splat_xvldi_0011(ptr %dst) nounwind {
254+
; CHECK-LABEL: buildvector_const_splat_xvldi_0011:
255+
; CHECK: # %bb.0: # %entry
256+
; CHECK-NEXT: lu12i.w $a1, 4096
257+
; CHECK-NEXT: xvreplgr2vr.w $xr0, $a1
258+
; CHECK-NEXT: xvst $xr0, $a0, 0
259+
; CHECK-NEXT: ret
260+
entry:
261+
store <8 x i32> <i32 16777216, i32 16777216, i32 16777216, i32 16777216, i32 16777216, i32 16777216, i32 16777216, i32 16777216>, ptr %dst
262+
ret void
263+
}
264+
265+
define void @buildvector_const_splat_xvldi_0101(ptr %dst) {
266+
; CHECK-LABEL: buildvector_const_splat_xvldi_0101:
267+
; CHECK: # %bb.0: # %entry
268+
; CHECK-NEXT: ori $a1, $zero, 768
269+
; CHECK-NEXT: xvreplgr2vr.h $xr0, $a1
270+
; CHECK-NEXT: xvst $xr0, $a0, 0
271+
; CHECK-NEXT: ret
272+
entry:
273+
store <16 x i16> <i16 768, i16 768, i16 768, i16 768, i16 768, i16 768, i16 768, i16 768, i16 768, i16 768, i16 768, i16 768, i16 768, i16 768, i16 768, i16 768>, ptr %dst
274+
ret void
275+
}
276+
277+
define void @buildvector_const_splat_xvldi_0110(ptr %dst) nounwind {
278+
; CHECK-LABEL: buildvector_const_splat_xvldi_0110:
279+
; CHECK: # %bb.0: # %entry
280+
; CHECK-NEXT: ori $a1, $zero, 1023
281+
; CHECK-NEXT: xvreplgr2vr.w $xr0, $a1
282+
; CHECK-NEXT: xvst $xr0, $a0, 0
283+
; CHECK-NEXT: ret
284+
entry:
285+
store <8 x i32> <i32 1023, i32 1023, i32 1023, i32 1023, i32 1023, i32 1023, i32 1023, i32 1023>, ptr %dst
286+
ret void
287+
}
288+
289+
define void @buildvector_const_splat_xvldi_0111(ptr %dst) nounwind {
290+
; CHECK-LABEL: buildvector_const_splat_xvldi_0111:
291+
; CHECK: # %bb.0: # %entry
292+
; CHECK-NEXT: lu12i.w $a1, 15
293+
; CHECK-NEXT: ori $a1, $a1, 4095
294+
; CHECK-NEXT: xvreplgr2vr.w $xr0, $a1
295+
; CHECK-NEXT: xvst $xr0, $a0, 0
296+
; CHECK-NEXT: ret
297+
entry:
298+
store <8 x i32> <i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535>, ptr %dst
299+
ret void
300+
}
301+
302+
define void @buildvector_const_splat_xvldi_1001(ptr %dst) nounwind {
303+
; LA32-LABEL: buildvector_const_splat_xvldi_1001:
304+
; LA32: # %bb.0: # %entry
305+
; LA32-NEXT: pcalau12i $a1, %pc_hi20(.LCPI21_0)
306+
; LA32-NEXT: xvld $xr0, $a1, %pc_lo12(.LCPI21_0)
307+
; LA32-NEXT: xvst $xr0, $a0, 0
308+
; LA32-NEXT: ret
309+
;
310+
; LA64-LABEL: buildvector_const_splat_xvldi_1001:
311+
; LA64: # %bb.0: # %entry
312+
; LA64-NEXT: lu12i.w $a1, 15
313+
; LA64-NEXT: ori $a1, $a1, 4095
314+
; LA64-NEXT: xvreplgr2vr.d $xr0, $a1
315+
; LA64-NEXT: xvst $xr0, $a0, 0
316+
; LA64-NEXT: ret
317+
entry:
318+
store <8 x i32> <i32 65535, i32 0, i32 65535, i32 0, i32 65535, i32 0, i32 65535, i32 0>, ptr %dst
319+
ret void
320+
}
321+
322+
define void @buildvector_const_splat_xvldi_1011(ptr %dst) nounwind {
323+
; LA32-LABEL: buildvector_const_splat_xvldi_1011:
324+
; LA32: # %bb.0: # %entry
325+
; LA32-NEXT: pcalau12i $a1, %pc_hi20(.LCPI22_0)
326+
; LA32-NEXT: xvld $xr0, $a1, %pc_lo12(.LCPI22_0)
327+
; LA32-NEXT: xvst $xr0, $a0, 0
328+
; LA32-NEXT: ret
329+
;
330+
; LA64-LABEL: buildvector_const_splat_xvldi_1011:
331+
; LA64: # %bb.0: # %entry
332+
; LA64-NEXT: lu12i.w $a1, 262144
333+
; LA64-NEXT: xvreplgr2vr.d $xr0, $a1
334+
; LA64-NEXT: xvst $xr0, $a0, 0
335+
; LA64-NEXT: ret
336+
entry:
337+
store <8 x float> <float 2.0, float 0.0, float 2.0, float 0.0, float 2.0, float 0.0, float 2.0, float 0.0>, ptr %dst
338+
ret void
339+
}
340+
226341
define void @buildvector_v32i8_const(ptr %dst) nounwind {
227342
; CHECK-LABEL: buildvector_v32i8_const:
228343
; CHECK: # %bb.0: # %entry
229-
; CHECK-NEXT: pcalau12i $a1, %pc_hi20(.LCPI15_0)
230-
; CHECK-NEXT: xvld $xr0, $a1, %pc_lo12(.LCPI15_0)
344+
; CHECK-NEXT: pcalau12i $a1, %pc_hi20(.LCPI23_0)
345+
; CHECK-NEXT: xvld $xr0, $a1, %pc_lo12(.LCPI23_0)
231346
; CHECK-NEXT: xvst $xr0, $a0, 0
232347
; CHECK-NEXT: ret
233348
entry:
@@ -238,8 +353,8 @@ entry:
238353
define void @buildvector_v16i16_const(ptr %dst) nounwind {
239354
; CHECK-LABEL: buildvector_v16i16_const:
240355
; CHECK: # %bb.0: # %entry
241-
; CHECK-NEXT: pcalau12i $a1, %pc_hi20(.LCPI16_0)
242-
; CHECK-NEXT: xvld $xr0, $a1, %pc_lo12(.LCPI16_0)
356+
; CHECK-NEXT: pcalau12i $a1, %pc_hi20(.LCPI24_0)
357+
; CHECK-NEXT: xvld $xr0, $a1, %pc_lo12(.LCPI24_0)
243358
; CHECK-NEXT: xvst $xr0, $a0, 0
244359
; CHECK-NEXT: ret
245360
entry:
@@ -250,8 +365,8 @@ entry:
250365
define void @buildvector_v8i32_const(ptr %dst) nounwind {
251366
; CHECK-LABEL: buildvector_v8i32_const:
252367
; CHECK: # %bb.0: # %entry
253-
; CHECK-NEXT: pcalau12i $a1, %pc_hi20(.LCPI17_0)
254-
; CHECK-NEXT: xvld $xr0, $a1, %pc_lo12(.LCPI17_0)
368+
; CHECK-NEXT: pcalau12i $a1, %pc_hi20(.LCPI25_0)
369+
; CHECK-NEXT: xvld $xr0, $a1, %pc_lo12(.LCPI25_0)
255370
; CHECK-NEXT: xvst $xr0, $a0, 0
256371
; CHECK-NEXT: ret
257372
entry:
@@ -262,8 +377,8 @@ entry:
262377
define void @buildvector_v4i64_const(ptr %dst) nounwind {
263378
; CHECK-LABEL: buildvector_v4i64_const:
264379
; CHECK: # %bb.0: # %entry
265-
; CHECK-NEXT: pcalau12i $a1, %pc_hi20(.LCPI18_0)
266-
; CHECK-NEXT: xvld $xr0, $a1, %pc_lo12(.LCPI18_0)
380+
; CHECK-NEXT: pcalau12i $a1, %pc_hi20(.LCPI26_0)
381+
; CHECK-NEXT: xvld $xr0, $a1, %pc_lo12(.LCPI26_0)
267382
; CHECK-NEXT: xvst $xr0, $a0, 0
268383
; CHECK-NEXT: ret
269384
entry:
@@ -274,8 +389,8 @@ entry:
274389
define void @buildvector_v2f32_const(ptr %dst) nounwind {
275390
; CHECK-LABEL: buildvector_v2f32_const:
276391
; CHECK: # %bb.0: # %entry
277-
; CHECK-NEXT: pcalau12i $a1, %pc_hi20(.LCPI19_0)
278-
; CHECK-NEXT: xvld $xr0, $a1, %pc_lo12(.LCPI19_0)
392+
; CHECK-NEXT: pcalau12i $a1, %pc_hi20(.LCPI27_0)
393+
; CHECK-NEXT: xvld $xr0, $a1, %pc_lo12(.LCPI27_0)
279394
; CHECK-NEXT: xvst $xr0, $a0, 0
280395
; CHECK-NEXT: ret
281396
entry:
@@ -286,8 +401,8 @@ entry:
286401
define void @buildvector_v4f64_const(ptr %dst) nounwind {
287402
; CHECK-LABEL: buildvector_v4f64_const:
288403
; CHECK: # %bb.0: # %entry
289-
; CHECK-NEXT: pcalau12i $a1, %pc_hi20(.LCPI20_0)
290-
; CHECK-NEXT: xvld $xr0, $a1, %pc_lo12(.LCPI20_0)
404+
; CHECK-NEXT: pcalau12i $a1, %pc_hi20(.LCPI28_0)
405+
; CHECK-NEXT: xvld $xr0, $a1, %pc_lo12(.LCPI28_0)
291406
; CHECK-NEXT: xvst $xr0, $a0, 0
292407
; CHECK-NEXT: ret
293408
entry:

0 commit comments

Comments
 (0)