From 9abb574f9a68b1c0c32f49745f9dad8e1a7db1f9 Mon Sep 17 00:00:00 2001
From: Fangrui Song <i@maskray.me>
Date: Sat, 6 Jul 2024 14:24:01 -0700
Subject: [PATCH] [MC] Make MCCFIInstruction smaller

by placing `Operation` next to a 4-byte member.
Refactor the union representation so that it is easy to add a pointer
member for .cfi_label support without increasing the total size. There
are two primary forms (RI and RR) and RIA for AMDGPU-specific
.cfi_llvm_def_aspace_cfa.
---
 llvm/include/llvm/MC/MCDwarf.h | 57 +++++++++++++++++++++-------------
 1 file changed, 35 insertions(+), 22 deletions(-)

diff --git a/llvm/include/llvm/MC/MCDwarf.h b/llvm/include/llvm/MC/MCDwarf.h
index 18056c5fdf816a..5052c6756c32bd 100644
--- a/llvm/include/llvm/MC/MCDwarf.h
+++ b/llvm/include/llvm/MC/MCDwarf.h
@@ -483,7 +483,7 @@ class MCGenDwarfLabelEntry {
 
 class MCCFIInstruction {
 public:
-  enum OpType {
+  enum OpType : uint8_t {
     OpSameValue,
     OpRememberState,
     OpRestoreState,
@@ -504,35 +504,44 @@ class MCCFIInstruction {
   };
 
 private:
-  OpType Operation;
   MCSymbol *Label;
-  unsigned Register;
   union {
-    int Offset;
-    unsigned Register2;
-  };
-  unsigned AddressSpace = ~0u;
+    struct {
+      unsigned Register;
+      int Offset;
+    } RI;
+    struct {
+      unsigned Register;
+      int Offset;
+      unsigned AddressSpace;
+    } RIA;
+    struct {
+      unsigned Register;
+      unsigned Register2;
+    } RR;
+  } U;
+  OpType Operation;
   SMLoc Loc;
   std::vector<char> Values;
   std::string Comment;
 
   MCCFIInstruction(OpType Op, MCSymbol *L, unsigned R, int O, SMLoc Loc,
                    StringRef V = "", StringRef Comment = "")
-      : Operation(Op), Label(L), Register(R), Offset(O), Loc(Loc),
-        Values(V.begin(), V.end()), Comment(Comment) {
+      : Label(L), Operation(Op), Loc(Loc), Values(V.begin(), V.end()),
+        Comment(Comment) {
     assert(Op != OpRegister && Op != OpLLVMDefAspaceCfa);
+    U.RI = {R, O};
   }
-
   MCCFIInstruction(OpType Op, MCSymbol *L, unsigned R1, unsigned R2, SMLoc Loc)
-      : Operation(Op), Label(L), Register(R1), Register2(R2), Loc(Loc) {
+      : Label(L), Operation(Op), Loc(Loc) {
     assert(Op == OpRegister);
+    U.RR = {R1, R2};
   }
-
   MCCFIInstruction(OpType Op, MCSymbol *L, unsigned R, int O, unsigned AS,
                    SMLoc Loc)
-      : Operation(Op), Label(L), Register(R), Offset(O), AddressSpace(AS),
-        Loc(Loc) {
+      : Label(L), Operation(Op), Loc(Loc) {
     assert(Op == OpLLVMDefAspaceCfa);
+    U.RIA = {R, O, AS};
   }
 
 public:
@@ -659,30 +668,34 @@ class MCCFIInstruction {
   MCSymbol *getLabel() const { return Label; }
 
   unsigned getRegister() const {
+    if (Operation == OpRegister)
+      return U.RR.Register;
+    if (Operation == OpLLVMDefAspaceCfa)
+      return U.RIA.Register;
     assert(Operation == OpDefCfa || Operation == OpOffset ||
            Operation == OpRestore || Operation == OpUndefined ||
            Operation == OpSameValue || Operation == OpDefCfaRegister ||
-           Operation == OpRelOffset || Operation == OpRegister ||
-           Operation == OpLLVMDefAspaceCfa);
-    return Register;
+           Operation == OpRelOffset);
+    return U.RI.Register;
   }
 
   unsigned getRegister2() const {
     assert(Operation == OpRegister);
-    return Register2;
+    return U.RR.Register2;
   }
 
   unsigned getAddressSpace() const {
     assert(Operation == OpLLVMDefAspaceCfa);
-    return AddressSpace;
+    return U.RIA.AddressSpace;
   }
 
   int getOffset() const {
+    if (Operation == OpLLVMDefAspaceCfa)
+      return U.RIA.Offset;
     assert(Operation == OpDefCfa || Operation == OpOffset ||
            Operation == OpRelOffset || Operation == OpDefCfaOffset ||
-           Operation == OpAdjustCfaOffset || Operation == OpGnuArgsSize ||
-           Operation == OpLLVMDefAspaceCfa);
-    return Offset;
+           Operation == OpAdjustCfaOffset || Operation == OpGnuArgsSize);
+    return U.RI.Offset;
   }
 
   StringRef getValues() const {