diff --git a/llvm/test/Transforms/Mem2Reg/single-store.ll b/llvm/test/Transforms/Mem2Reg/single-store.ll
new file mode 100644
index 00000000000000..b82e26158a361f
--- /dev/null
+++ b/llvm/test/Transforms/Mem2Reg/single-store.ll
@@ -0,0 +1,67 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
+; RUN: opt -S -passes=mem2reg < %s | FileCheck %s
+
+; FIXME: This is a miscompile.
+define i8 @single_store_literal_poison(i1 %cond) {
+; CHECK-LABEL: define i8 @single_store_literal_poison(
+; CHECK-SAME: i1 [[COND:%.*]]) {
+; CHECK-NEXT:    br i1 [[COND]], label %[[IF:.*]], label %[[EXIT:.*]]
+; CHECK:       [[IF]]:
+; CHECK-NEXT:    br label %[[EXIT]]
+; CHECK:       [[EXIT]]:
+; CHECK-NEXT:    ret i8 poison
+;
+  %a = alloca i8, align 1
+  br i1 %cond, label %if, label %exit
+
+if:
+  store i8 poison, ptr %a, align 1
+  br label %exit
+
+exit:
+  %v = load i8, ptr %a, align 1
+  ret i8 %v
+}
+
+; FIXME: This is a miscompile.
+define i8 @single_store_maybe_poison(i1 %cond, i8 %x) {
+; CHECK-LABEL: define i8 @single_store_maybe_poison(
+; CHECK-SAME: i1 [[COND:%.*]], i8 [[X:%.*]]) {
+; CHECK-NEXT:    br i1 [[COND]], label %[[IF:.*]], label %[[EXIT:.*]]
+; CHECK:       [[IF]]:
+; CHECK-NEXT:    br label %[[EXIT]]
+; CHECK:       [[EXIT]]:
+; CHECK-NEXT:    ret i8 [[X]]
+;
+  %a = alloca i8, align 1
+  br i1 %cond, label %if, label %exit
+
+if:
+  store i8 %x, ptr %a, align 1
+  br label %exit
+
+exit:
+  %v = load i8, ptr %a, align 1
+  ret i8 %v
+}
+
+define i8 @single_store_cant_be_poison(i1 %cond, i8 noundef %x) {
+; CHECK-LABEL: define i8 @single_store_cant_be_poison(
+; CHECK-SAME: i1 [[COND:%.*]], i8 noundef [[X:%.*]]) {
+; CHECK-NEXT:    br i1 [[COND]], label %[[IF:.*]], label %[[EXIT:.*]]
+; CHECK:       [[IF]]:
+; CHECK-NEXT:    br label %[[EXIT]]
+; CHECK:       [[EXIT]]:
+; CHECK-NEXT:    ret i8 [[X]]
+;
+  %a = alloca i8, align 1
+  br i1 %cond, label %if, label %exit
+
+if:
+  store i8 %x, ptr %a, align 1
+  br label %exit
+
+exit:
+  %v = load i8, ptr %a, align 1
+  ret i8 %v
+}