With GenZ and OpenXC7, full Zynq 7000 SoC development can be done with open-source toolchains. See examples here.
*Only available for registered/campus users
Be aware the clock frequency is 100 MHz(as on Nexys A7)
*Available for guests
Be aware the clock frequency is 50 MHz!
Based on regymm's personal project https://github.com/regymm/quasiSoC/
For both fpgaol1 and fpgaol2, pre-built bitstream and binaries for testing the platform. Flip the rightmost switch after uploading bitstream, you should see the 4 LEDs on the right side "blinking" and some UART output. Refresh the page(no need to re-upload bitstream) if not.