1- //! Communicate with CCGX (CCG5, CCG6) PD controllers
1+ //! Communicate with CCGX (CCG5, CCG6, CCG8 ) PD controllers
22//!
33//! The current implementation talks to them by tunneling I2C through EC host commands.
44
@@ -41,9 +41,12 @@ impl PdPort {
4141 let platform = & ( * config) . as_ref ( ) . unwrap ( ) . platform ;
4242
4343 match ( platform, self ) {
44+ ( Platform :: GenericFramework ( ( left, _) , _, _) , PdPort :: Left01 ) => * left,
45+ ( Platform :: GenericFramework ( ( _, right) , _, _) , PdPort :: Right23 ) => * right,
46+ // Framework AMD Platforms (CCG8)
4447 ( Platform :: Framework13Amd | Platform :: Framework16 , PdPort :: Left01 ) => 0x42 ,
4548 ( Platform :: Framework13Amd | Platform :: Framework16 , PdPort :: Right23 ) => 0x40 ,
46- // Intel Platforms
49+ // Framework Intel Platforms (CCG5 and CCG6)
4750 ( _, PdPort :: Left01 ) => 0x08 ,
4851 ( _, PdPort :: Right23 ) => 0x40 ,
4952 }
@@ -55,11 +58,11 @@ impl PdPort {
5558 let platform = & ( * config) . as_ref ( ) . unwrap ( ) . platform ;
5659
5760 Ok ( match ( platform, self ) {
61+ ( Platform :: GenericFramework ( _, ( left, _) , _) , PdPort :: Left01 ) => * left,
62+ ( Platform :: GenericFramework ( _, ( _, right) , _) , PdPort :: Right23 ) => * right,
5863 ( Platform :: IntelGen11 , _) => 6 ,
59- ( Platform :: IntelGen12 , PdPort :: Left01 ) => 6 ,
60- ( Platform :: IntelGen12 , PdPort :: Right23 ) => 7 ,
61- ( Platform :: IntelGen13 , PdPort :: Left01 ) => 6 ,
62- ( Platform :: IntelGen13 , PdPort :: Right23 ) => 7 ,
64+ ( Platform :: IntelGen12 | Platform :: IntelGen13 , PdPort :: Left01 ) => 6 ,
65+ ( Platform :: IntelGen12 | Platform :: IntelGen13 , PdPort :: Right23 ) => 7 ,
6366 ( Platform :: Framework13Amd | Platform :: Framework16 , PdPort :: Left01 ) => 1 ,
6467 ( Platform :: Framework13Amd | Platform :: Framework16 , PdPort :: Right23 ) => 2 ,
6568 // (_, _) => Err(EcError::DeviceError(format!(
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