From b35176d362a1e19a6c92f5c838e0f1249d1ed767 Mon Sep 17 00:00:00 2001 From: mkiessling-ifx <58507517+mkiessling-ifx@users.noreply.github.com> Date: Mon, 25 Jan 2021 11:22:46 +0100 Subject: [PATCH 01/78] fixe to compile and find lib * do some basic fixes to compile and find the lib. Linker issues are resolved with next commit * Remove "DEMO" from board name --- .../src/IFXRadarPulsedDoppler.cpp | 4 ++-- .../src/IFXRadarPulsedDoppler.h | 4 ++-- platform.txt | 3 ++- .../XMC4700/config/XMC4700_Radar_Baseboard/pins_arduino.h | 2 +- 4 files changed, 7 insertions(+), 6 deletions(-) diff --git a/libraries/BGT24LTR11-Pulsed-Doppler-Radar/src/IFXRadarPulsedDoppler.cpp b/libraries/BGT24LTR11-Pulsed-Doppler-Radar/src/IFXRadarPulsedDoppler.cpp index f8cd0be3..8068d1c6 100644 --- a/libraries/BGT24LTR11-Pulsed-Doppler-Radar/src/IFXRadarPulsedDoppler.cpp +++ b/libraries/BGT24LTR11-Pulsed-Doppler-Radar/src/IFXRadarPulsedDoppler.cpp @@ -138,12 +138,12 @@ float IFXRadarPulsedDoppler::getCurrentConsumption(void) return currentMA; } -void IFXRadarPulsedDoppler::registerResultCallback(void(*callBackPtr)) // register algo done callback function +void IFXRadarPulsedDoppler::registerResultCallback(void(*callBackPtr)( void ) ) // register algo done callback function { radar_ard_register_result_handler(callBackPtr); } -void IFXRadarPulsedDoppler::registerErrorCallback(void(*callBackPtr)) +void IFXRadarPulsedDoppler::registerErrorCallback(void(*callBackPtr)(uint32_t)) { radar_ard_register_error_handler(callBackPtr); } diff --git a/libraries/BGT24LTR11-Pulsed-Doppler-Radar/src/IFXRadarPulsedDoppler.h b/libraries/BGT24LTR11-Pulsed-Doppler-Radar/src/IFXRadarPulsedDoppler.h index 7b763e8a..e4de3eb6 100644 --- a/libraries/BGT24LTR11-Pulsed-Doppler-Radar/src/IFXRadarPulsedDoppler.h +++ b/libraries/BGT24LTR11-Pulsed-Doppler-Radar/src/IFXRadarPulsedDoppler.h @@ -36,8 +36,8 @@ class IFXRadarPulsedDoppler // control functions void initHW(void); - void registerResultCallback(void(*callBackPtr)); // register function to be called when also process is done - void registerErrorCallback(void(*callBackPtr)); // register function to be called in case of error + void registerResultCallback(void(*callBackPtr)(void)); // register function to be called when also process is done + void registerErrorCallback(void(*callBackPtr)(uint32_t error)); // register function to be called in case of error void begin(void); void end(void); void run(void); // run radar process diff --git a/platform.txt b/platform.txt index 740463fd..81c1c81d 100644 --- a/platform.txt +++ b/platform.txt @@ -60,6 +60,7 @@ build.usb_manufacturer="Unknown" compiler.c.flags=-mcpu={build.mcu} -mthumb -c -g -Os {compiler.warning_flags} -std=gnu11 -ffunction-sections -fdata-sections -nostdlib --param max-inline-insns-single=500 -MMD #compiler.c.extra_flags=-ftime-report compiler.c.extra_flags= +compiler.libraries.ldflags= compiler.c.elf.flags=-Os -Wl,--gc-sections -save-temps compiler.c.elf.extra_flags= @@ -96,7 +97,7 @@ recipe.S.o.pattern="{compiler.path}{compiler.S.cmd}" {compiler.S.flags} -DXMC{bu # ---------------- ## Combine gc-sections, archives, and objects -recipe.c.combine.pattern="{compiler.path}{compiler.c.elf.cmd}" -mthumb --specs=nosys.specs --specs=nano.specs -mcpu={build.mcu} {compiler.c.elf.flags} "-T{build.flash_ld_path}" "-Wl,-Map,{build.path}/{build.project_name}.map" {compiler.c.elf.extra_flags} -o "{build.path}/{build.project_name}.elf" "-L{build.path}" -Wl,--cref -Wl,--check-sections -Wl,--gc-sections -Wl,--entry=Reset_Handler -Wl,--unresolved-symbols=report-all -Wl,--warn-common -Wl,--warn-section-align {object_files} "{build.path}/{archive_file}" -lm +recipe.c.combine.pattern="{compiler.path}{compiler.c.elf.cmd}" -mthumb --specs=nosys.specs --specs=nano.specs -mcpu={build.mcu} {compiler.c.elf.flags} "-T{build.flash_ld_path}" "-Wl,-Map,{build.path}/{build.project_name}.map" {compiler.c.elf.extra_flags} -o "{build.path}/{build.project_name}.elf" "-L{build.path}" -Wl,--cref -Wl,--check-sections -Wl,--gc-sections -Wl,--entry=Reset_Handler -Wl,--unresolved-symbols=report-all -Wl,--warn-common -Wl,--warn-section-align {object_files} "{build.path}/{archive_file}" {compiler.libraries.ldflags} -lm ## Create archives # ---------------- diff --git a/variants/XMC4700/config/XMC4700_Radar_Baseboard/pins_arduino.h b/variants/XMC4700/config/XMC4700_Radar_Baseboard/pins_arduino.h index 069e0628..1b73c743 100644 --- a/variants/XMC4700/config/XMC4700_Radar_Baseboard/pins_arduino.h +++ b/variants/XMC4700/config/XMC4700_Radar_Baseboard/pins_arduino.h @@ -36,7 +36,7 @@ // XMC_BOARD for stringifying into serial or other text outputs/logs // Note the actual name XMC and number MUST have a character between // to avoid issues with other defined macros e.g. XMC1100 -#define XMC_BOARD DEMO Radar BB XMC4700 +#define XMC_BOARD Radar BB XMC4700 /* On board LED is ON when digital output is 0, LOW, False, OFF */ #define XMC_LED_ON 0 // Pins that are allocated or free to be used as Analog input From 038e2a62a685dfda295ad575569c30c3fa59bce0 Mon Sep 17 00:00:00 2001 From: mkiessling-ifx <58507517+mkiessling-ifx@users.noreply.github.com> Date: Mon, 25 Jan 2021 12:08:28 +0100 Subject: [PATCH 02/78] RadarLib update * Update latest RadarLib version (Jan2021) ** fixes and corrections ** added raw data interface ** remove linker issues * added plotter example --- .../Radar_Pulsed_Doppler_LED.ino | 25 +++- .../Radar_Pulsed_Doppler_plotter.ino | 120 ++++++++++++++++++ .../Radar_Pulsed_Doppler_serial.ino | 108 ++++++++++++++++ .../keywords.txt | 49 ++++--- .../src/IFXRadarPulsedDoppler.cpp | 60 +++++++-- .../src/IFXRadarPulsedDoppler.h | 17 ++- .../src/arduino_adapt.h | 24 +++- .../libRadar_S2GL_Pulsed_Doppler_lib.a | Bin 3308954 -> 4115816 bytes .../XMC4700_Radar_Baseboard/pins_arduino.h | 4 +- 9 files changed, 366 insertions(+), 41 deletions(-) create mode 100644 libraries/BGT24LTR11-Pulsed-Doppler-Radar/examples/Radar_Pulsed_Doppler_plotter/Radar_Pulsed_Doppler_plotter.ino create mode 100644 libraries/BGT24LTR11-Pulsed-Doppler-Radar/examples/Radar_Pulsed_Doppler_serial/Radar_Pulsed_Doppler_serial.ino diff --git a/libraries/BGT24LTR11-Pulsed-Doppler-Radar/examples/Radar_Pulsed_Doppler_LED/Radar_Pulsed_Doppler_LED.ino b/libraries/BGT24LTR11-Pulsed-Doppler-Radar/examples/Radar_Pulsed_Doppler_LED/Radar_Pulsed_Doppler_LED.ino index ad8fe1a9..2d89ba97 100644 --- a/libraries/BGT24LTR11-Pulsed-Doppler-Radar/examples/Radar_Pulsed_Doppler_LED/Radar_Pulsed_Doppler_LED.ino +++ b/libraries/BGT24LTR11-Pulsed-Doppler-Radar/examples/Radar_Pulsed_Doppler_LED/Radar_Pulsed_Doppler_LED.ino @@ -3,7 +3,20 @@ // IFX Radar Pulsed Doppler Object IFXRadarPulsedDoppler radarDev; -void myResultCallback() +void myErrorCallback( uint32_t error ) +{ + + // turn on LEDs for error + digitalWrite(LED_GREEN, LOW); + digitalWrite(LED_RED, LOW); + digitalWrite(LED_BLUE, LOW); + + while( 1 ) + ; +} + + +void myResultCallback(void) { uint8_t targetDirection = radarDev.getDirection(); if(targetDirection == 1) @@ -37,16 +50,19 @@ void myResultCallback() } void setup() { - // put your setup code here, to run once: + pinMode(LED_RED, OUTPUT); digitalWrite(LED_RED, HIGH); pinMode(LED_GREEN, OUTPUT); - digitalWrite(LED_GREEN, LOW); + digitalWrite(LED_GREEN, HIGH); pinMode(LED_BLUE, OUTPUT); digitalWrite(LED_BLUE, HIGH); - radarDev.initHW(); radarDev.registerResultCallback(myResultCallback); + radarDev.registerErrorCallback( myErrorCallback ); + radarDev.initHW(); + + // start the radarDevice, to read the default parameter radarDev.begin(); } @@ -55,3 +71,4 @@ void loop() { // put your main code here, to run repeatedly: radarDev.run(); } + diff --git a/libraries/BGT24LTR11-Pulsed-Doppler-Radar/examples/Radar_Pulsed_Doppler_plotter/Radar_Pulsed_Doppler_plotter.ino b/libraries/BGT24LTR11-Pulsed-Doppler-Radar/examples/Radar_Pulsed_Doppler_plotter/Radar_Pulsed_Doppler_plotter.ino new file mode 100644 index 00000000..37ee5918 --- /dev/null +++ b/libraries/BGT24LTR11-Pulsed-Doppler-Radar/examples/Radar_Pulsed_Doppler_plotter/Radar_Pulsed_Doppler_plotter.ino @@ -0,0 +1,120 @@ +#include + +// IFX Radar Pulsed Doppler Object +IFXRadarPulsedDoppler radarDev; + +void myErrorCallback(uint32_t error) +{ + Serial.print("--- ERROR: 0x"); + Serial.println( error, HEX); + + // turn on LEDs for error + digitalWrite(LED_GREEN, LOW); + digitalWrite(LED_RED, LOW); + digitalWrite(LED_BLUE, LOW); + + while( 1 ) + ; +} + + +void myResultCallback(void) +{ + uint8_t targetDirection = radarDev.getDirection(); + if(targetDirection == 1) + { + // turn on Red LED for departing target + digitalWrite(LED_GREEN, HIGH); + digitalWrite(LED_RED, LOW); + digitalWrite(LED_BLUE, HIGH); + } + else if(targetDirection == 2) + { + // turn on Green LED for approaching target + digitalWrite(LED_GREEN, LOW); + digitalWrite(LED_RED, HIGH); + digitalWrite(LED_BLUE, HIGH); + } + else if(radarDev.targetAvailable() == true) + { + // turn on Blue LED for just normal motion with no meaningful direction + digitalWrite(LED_GREEN, HIGH); + digitalWrite(LED_RED, HIGH); + digitalWrite(LED_BLUE, LOW); + } + else + { + // turn off LEDs for no motion + digitalWrite(LED_GREEN, HIGH); + digitalWrite(LED_RED, HIGH); + digitalWrite(LED_BLUE, HIGH); + } +} + + +float raw_i[256]; +float raw_q[256]; + + +void myRawDataCallback( raw_data_context_t context ) +{ + uint32_t frameCnt = radarDev.getRawDataFrameCount( context ); + uint16_t numSamples = radarDev.getNumRawDataSamples( context ); + + radarDev.getRawData( context, raw_i, raw_q, 256 ); + + for( uint32_t i = 0; i < numSamples; i++ ) + { + Serial.print( raw_i[i] ); + Serial.print("\t"); + Serial.print( raw_q[i] ); + Serial.println( "" ); + } +} + +void setup() { + + pinMode(LED_RED, OUTPUT); + digitalWrite(LED_RED, HIGH); + pinMode(LED_GREEN, OUTPUT); + digitalWrite(LED_GREEN, HIGH); + pinMode(LED_BLUE, OUTPUT); + digitalWrite(LED_BLUE, HIGH); + + Serial.begin(500000); //This baudrate is required to show continuous wave on serial plotter, at minimum framerate (continuous sampling!) + + radarDev.registerResultCallback(myResultCallback); + radarDev.registerErrorCallback(myErrorCallback); + radarDev.registerRawDataCallback(myRawDataCallback ); // register a handler to receive raw data + //radarDev.enableAlgoProcessing( false ); // set to false to disables the lib internal radar algo processing + + radarDev.initHW(); + + // start the radarDevice, to read the default parameter + radarDev.begin(); + + // set minimum Frame period, to get continuous sampling of data, a skip count is required to remove the transient + // in analog baseband after frame pause + // set skip count to zero, in countinuous mode there is not transient that needs to be skipped. + radarDev.setSkipSamples( 0 ); + + // read minimum possible Frame period (after setting skip count!) + uint32_t minFramePeriod = radarDev.getMinFramePeriod(); + + // stop the device to change parameters + radarDev.end(); + radarDev.setFramePeriod( minFramePeriod ); + + // legend for Serial Plotter: + Serial.print("I-Signal\tQ-Signal-"); + Serial.println(minFramePeriod); + + // Restart the radar device + radarDev.begin(); + +} + +void loop() { + // put your main code here, to run repeatedly: + radarDev.run(); +} diff --git a/libraries/BGT24LTR11-Pulsed-Doppler-Radar/examples/Radar_Pulsed_Doppler_serial/Radar_Pulsed_Doppler_serial.ino b/libraries/BGT24LTR11-Pulsed-Doppler-Radar/examples/Radar_Pulsed_Doppler_serial/Radar_Pulsed_Doppler_serial.ino new file mode 100644 index 00000000..dc9e744a --- /dev/null +++ b/libraries/BGT24LTR11-Pulsed-Doppler-Radar/examples/Radar_Pulsed_Doppler_serial/Radar_Pulsed_Doppler_serial.ino @@ -0,0 +1,108 @@ +#include + +// IFX Radar Pulsed Doppler Object +IFXRadarPulsedDoppler radarDev; + +void myErrorCallback( uint32_t error ) +{ + Serial.print("--- ERROR: 0x"); + Serial.println( error, HEX); + + // turn on LEDs for error + digitalWrite(LED_GREEN, LOW); + digitalWrite(LED_RED, LOW); + digitalWrite(LED_BLUE, LOW); + + while( 1 ) + ; +} + + +void myResultCallback(void) +{ + uint8_t targetDirection = radarDev.getDirection(); + if(targetDirection == 1) + { + // turn on Red LED for departing target + digitalWrite(LED_GREEN, HIGH); + digitalWrite(LED_RED, LOW); + digitalWrite(LED_BLUE, HIGH); + Serial.println("departing"); + } + else if(targetDirection == 2) + { + // turn on Green LED for approaching target + digitalWrite(LED_GREEN, LOW); + digitalWrite(LED_RED, HIGH); + digitalWrite(LED_BLUE, HIGH); + Serial.println("approaching"); + } + else if(radarDev.targetAvailable() == true) + { + // turn on Blue LED for just normal motion with no meaningful direction + digitalWrite(LED_GREEN, HIGH); + digitalWrite(LED_RED, HIGH); + digitalWrite(LED_BLUE, LOW); + Serial.println("motion"); + } + else + { + // turn off LEDs for no motion + digitalWrite(LED_GREEN, HIGH); + digitalWrite(LED_RED, HIGH); + digitalWrite(LED_BLUE, HIGH); + } +} + + + +float raw_i[256]; +float raw_q[256]; + + +void setup() { + + pinMode(LED_RED, OUTPUT); + digitalWrite(LED_RED, HIGH); + pinMode(LED_GREEN, OUTPUT); + digitalWrite(LED_GREEN, HIGH); + pinMode(LED_BLUE, OUTPUT); + digitalWrite(LED_BLUE, HIGH); + + Serial.begin(115200); + + radarDev.registerResultCallback(myResultCallback); + radarDev.registerErrorCallback(myErrorCallback); + + radarDev.initHW(); + + // start the radarDevice, to read the default parameter + radarDev.begin(); + // dump default settings to serial port + radarDev.parameterDump(&Serial); + + + + Serial.println("---------------------"); + // stop the device to change parameters + radarDev.end(); + + // apply very insensitive setting + + radarDev.setMotionSensitivity(300); + radarDev.setDopplerSensitivity(500); + + radarDev.parameterDump(&Serial); + + + Serial.println("---------------------"); + // Restart the radar device + radarDev.begin(); + +} + +void loop() { + // put your main code here, to run repeatedly: + radarDev.run(); +} + diff --git a/libraries/BGT24LTR11-Pulsed-Doppler-Radar/keywords.txt b/libraries/BGT24LTR11-Pulsed-Doppler-Radar/keywords.txt index ac5f23d1..297cbe7e 100644 --- a/libraries/BGT24LTR11-Pulsed-Doppler-Radar/keywords.txt +++ b/libraries/BGT24LTR11-Pulsed-Doppler-Radar/keywords.txt @@ -6,22 +6,23 @@ # Datatypes (KEYWORD1) ####################################### -IFXRadarPulsedDoppler KEYWORD1 IFXRadarPulsedDoppler +IFXRadarPulsedDoppler KEYWORD1 +raw_data_context_t KEYWORD1 ####################################### # Methods and Functions (KEYWORD2) ####################################### setMinSpeed KEYWORD2 -getMinSpeed KEYWORD2 -setMaxSpeed KEYWORD2 -getMaxSpeed KEYWORD2 -setMotionSensitivity KEYWORD2 +getMinSpeed KEYWORD2 +setMaxSpeed KEYWORD2 +getMaxSpeed KEYWORD2 +setMotionSensitivity KEYWORD2 getMotionSensitivity KEYWORD2 -setDopplerSensitivity KEYWORD2 -getDopplerSensitivity KEYWORD2 -setFramePeriod KEYWORD2 -getFramePeriod KEYWORD2 +setDopplerSensitivity KEYWORD2 +getDopplerSensitivity KEYWORD2 +setFramePeriod KEYWORD2 +getFramePeriod KEYWORD2 setSampleFreq KEYWORD2 getSampleFreq KEYWORD2 setSkipSamples KEYWORD2 @@ -30,21 +31,27 @@ setNumSamples KEYWORD2 getNumSamples KEYWORD2 setPulseWidth KEYWORD2 getPulseWidth KEYWORD2 -getMinFramePeriod KEYWORD2 -getCurrentConsumption KEYWORD2 -initHW KEYWORD2 -registerResultCallback KEYWORD2 +getMinFramePeriod KEYWORD2 +getCurrentConsumption KEYWORD2 +enableAlgoProcessing KEYWORD2 +initHW KEYWORD2 +registerResultCallback KEYWORD2 registerErrorCallback KEYWORD2 -begin KEYWORD2 -end KEYWORD2 -run KEYWORD2 -targetAvailable KEYWORD2 -getDopplerLevel KEYWORD2 -getDopplerFreqHz KEYWORD2 -getVelocity KEYWORD2 +registerErrorCallback KEYWORD2 +begin KEYWORD2 +end KEYWORD2 +run KEYWORD2 +targetAvailable KEYWORD2 +getDopplerLevel KEYWORD2 +getDopplerFreqHz KEYWORD2 +getVelocity KEYWORD2 getDirection KEYWORD2 -getSpeed KEYWORD2 +getSpeed KEYWORD2 getFrameCount KEYWORD2 +parameterDump KEYWORD2 +getRawData KEYWORD2 +getNumRawDataSamples KEYWORD2 +getRawDataFrameCount KEYWORD2 ####################################### # Constants (LITERAL1) diff --git a/libraries/BGT24LTR11-Pulsed-Doppler-Radar/src/IFXRadarPulsedDoppler.cpp b/libraries/BGT24LTR11-Pulsed-Doppler-Radar/src/IFXRadarPulsedDoppler.cpp index 8068d1c6..6ef03f1c 100644 --- a/libraries/BGT24LTR11-Pulsed-Doppler-Radar/src/IFXRadarPulsedDoppler.cpp +++ b/libraries/BGT24LTR11-Pulsed-Doppler-Radar/src/IFXRadarPulsedDoppler.cpp @@ -66,15 +66,19 @@ float IFXRadarPulsedDoppler::getDopplerSensitivity(void) return threshold; } -uint8_t IFXRadarPulsedDoppler::setFramePeriod(uint8_t periodUs) +bool IFXRadarPulsedDoppler::setFramePeriod(uint32_t periodUs) { - uint8_t status = radar_ard_set_frame_period_usec(periodUs); - return status; + + uint8_t retValue = radar_ard_set_frame_period_usec(periodUs); + if( retValue ) + return true; + + return false; } -uint8_t IFXRadarPulsedDoppler::getFramePeriod(void) +uint32_t IFXRadarPulsedDoppler::getFramePeriod(void) { - uint8_t periodUs = radar_ard_get_frame_period_usec(); + uint32_t periodUs = radar_ard_get_frame_period_usec(); return periodUs; } @@ -138,14 +142,35 @@ float IFXRadarPulsedDoppler::getCurrentConsumption(void) return currentMA; } +bool IFXRadarPulsedDoppler::enableAlgoProcessing( bool enableAlgo ) +{ + uint8_t currStatus = 0; + if(enableAlgo) + currStatus = radar_ard_set_do_algo_processing( 1 ); + else + currStatus = radar_ard_set_do_algo_processing( 0 ); + + if( currStatus ) + return true; + + return false; +} + + + void IFXRadarPulsedDoppler::registerResultCallback(void(*callBackPtr)( void ) ) // register algo done callback function { - radar_ard_register_result_handler(callBackPtr); + (void) radar_ard_register_result_handler(callBackPtr); } void IFXRadarPulsedDoppler::registerErrorCallback(void(*callBackPtr)(uint32_t)) { - radar_ard_register_error_handler(callBackPtr); + (void) radar_ard_register_error_handler(callBackPtr); +} + +void IFXRadarPulsedDoppler::registerRawDataCallback(void(*callBackPtr)(raw_data_context_t)) +{ + (void) radar_ard_register_raw_data_handler(callBackPtr); } void IFXRadarPulsedDoppler::initHW(void) @@ -256,6 +281,23 @@ uint32_t IFXRadarPulsedDoppler::getFrameCount(void) return radar_ard_get_frame_count( ); } + // raw data context functions, call only in raw_data_callback +uint32_t IFXRadarPulsedDoppler::getRawDataFrameCount( raw_data_context_t raw_data_context ) +{ + return radar_ard_get_frame_raw_data( raw_data_context ); +} + +void IFXRadarPulsedDoppler::getRawData( raw_data_context_t raw_data_context, float *p_raw_data_i, float *p_raw_data_q, uint16_t max_num_samples, uint8_t high_gain_input ) +{ + radar_ard_get_raw_data( raw_data_context, p_raw_data_i, p_raw_data_q, max_num_samples, high_gain_input ); +} + +uint16_t IFXRadarPulsedDoppler::getNumRawDataSamples( raw_data_context_t raw_data_context ) +{ + return radar_ard_get_num_raw_data_samples( raw_data_context ); +} + +// debug functions void IFXRadarPulsedDoppler::parameterDump( void ) { parameterDump(this->outDev); @@ -279,11 +321,11 @@ void IFXRadarPulsedDoppler::parameterDump(Print *outDev) outDev->print(radar_ard_get_min_speed_kmph()); outDev->println(" km/h"); - outDev->print("minimum speed : "); + outDev->print("maximum speed : "); outDev->print(radar_ard_get_max_speed_kmph()); outDev->println(" km/h"); - outDev->print("minimum speed : "); + outDev->print("sampling frequency : "); outDev->print(radar_ard_get_adc_sampling_freq_hz()); outDev->println(" Hz"); diff --git a/libraries/BGT24LTR11-Pulsed-Doppler-Radar/src/IFXRadarPulsedDoppler.h b/libraries/BGT24LTR11-Pulsed-Doppler-Radar/src/IFXRadarPulsedDoppler.h index e4de3eb6..6c210b06 100644 --- a/libraries/BGT24LTR11-Pulsed-Doppler-Radar/src/IFXRadarPulsedDoppler.h +++ b/libraries/BGT24LTR11-Pulsed-Doppler-Radar/src/IFXRadarPulsedDoppler.h @@ -5,8 +5,9 @@ class IFXRadarPulsedDoppler { private: - bool result_handler_registered; - bool error_handler_registered; + //bool result_handler_registered; + //bool error_handler_registered; + //bool raw_data_handler_registered; Print *outDev; public: @@ -21,8 +22,8 @@ class IFXRadarPulsedDoppler float getMotionSensitivity(void); uint8_t setDopplerSensitivity(float threshold); // threshold that will determine motion with direction (departing/approaching) or not float getDopplerSensitivity(void); - uint8_t setFramePeriod(uint8_t periodUs); // frame period in usec - uint8_t getFramePeriod(void); + bool setFramePeriod(uint32_t periodUs); // frame period in usec + uint32_t getFramePeriod(void); uint8_t setSampleFreq(uint32_t frequencyHz); // ADC sampling frequency in Hz uint32_t getSampleFreq(void); uint8_t setSkipSamples(uint32_t numSamples); // number of samples to skip @@ -33,11 +34,13 @@ class IFXRadarPulsedDoppler uint32_t getPulseWidth(void); uint32_t getMinFramePeriod(void); // get the minimum frame period in usec float getCurrentConsumption(void); // get the current consumed by the board in mA + bool enableAlgoProcessing( bool do_processing = true ); // control functions void initHW(void); void registerResultCallback(void(*callBackPtr)(void)); // register function to be called when also process is done void registerErrorCallback(void(*callBackPtr)(uint32_t error)); // register function to be called in case of error + void registerRawDataCallback(void(*callBackPtr)(raw_data_context_t context)); // register function to be called for raw data void begin(void); void end(void); void run(void); // run radar process @@ -51,6 +54,12 @@ class IFXRadarPulsedDoppler float getSpeed(void); // get speed value without sign uint32_t getFrameCount(void); // get frame count of result + // raw data context functions, call only in raw_data_callback + uint32_t getRawDataFrameCount( raw_data_context_t raw_data_context ); + void getRawData( raw_data_context_t raw_data_context, float *p_raw_data_i, float *p_raw_data_q, uint16_t max_num_samples, uint8_t high_gain_input=1 ); + uint16_t getNumRawDataSamples( raw_data_context_t raw_data_context ); + + // debug functions void parameterDump(Print *outDev); void parameterDump(); diff --git a/libraries/BGT24LTR11-Pulsed-Doppler-Radar/src/arduino_adapt.h b/libraries/BGT24LTR11-Pulsed-Doppler-Radar/src/arduino_adapt.h index 0763b02d..191455f3 100644 --- a/libraries/BGT24LTR11-Pulsed-Doppler-Radar/src/arduino_adapt.h +++ b/libraries/BGT24LTR11-Pulsed-Doppler-Radar/src/arduino_adapt.h @@ -5,7 +5,7 @@ */ /* =========================================================================== -** Copyright (C) 2019 Infineon Technologies AG +** Copyright (C) 2019-2021 Infineon Technologies AG ** All rights reserved. ** =========================================================================== ** @@ -123,6 +123,9 @@ extern "C" #define RADAR_ERR_UNSUPPORTED_RESOLUTION 0x0051 /**< The specified sample resolution is out of range. */ + +#define RADAR_ERR_INVALID_POINTER 0x0052 /**< Invalid pointer as argument */ + #define RF_SHIELD_BOARD_INVALID_PARAM 0xFE01 /**< Status in case of invalid parameter */ #define RF_SHIELD_BOARD_SUPPORTED 0xFE02 /**< Status for supported RF shield with valid board ID */ #define RF_SHIELD_BOARD_UNSUPPORTED 0xFE03 /**< Status for unsupported RF shield board @@ -139,8 +142,13 @@ extern "C" ============================================================================== */ +typedef void* raw_data_context_t; + typedef void(*ard_error_handler_cb)(uint32_t error); typedef void(*ard_result_handler_cb)( void ); +typedef void(*ard_raw_data_handler_cb)(raw_data_context_t context); + + /* ============================================================================== @@ -152,6 +160,8 @@ ard_error_handler_cb radar_ard_register_error_handler( ard_error_handler_cb hand ard_result_handler_cb radar_ard_register_result_handler( ard_result_handler_cb handler); +ard_raw_data_handler_cb radar_ard_register_raw_data_handler( ard_raw_data_handler_cb handler); + void radar_ard_init(void); uint8_t radar_ard_is_initalized( void ); @@ -226,7 +236,19 @@ uint8_t radar_ard_is_motion( void ); uint32_t radar_ard_get_frame_count( void ); +uint8_t radar_ard_set_do_algo_processing( uint8_t do_processing ); + +/* for usage in raw data handler only */ +uint32_t radar_ard_get_frame_raw_data( raw_data_context_t p_raw_data_context ); + +void radar_ard_get_raw_data( raw_data_context_t raw_data_context, float *p_raw_data_i, float *p_raw_data_q, uint16_t max_num_samples, uint8_t high_gain_input ); + +uint16_t radar_ard_get_num_raw_data_samples( raw_data_context_t p_raw_data_context ); + +/* --- End of File -------------------------------------------------------- */ + /* --- Close open blocks -------------------------------------------------- */ + /* Disable C linkage for C++ files */ #ifdef __cplusplus } /* extern "C" */ diff --git a/libraries/BGT24LTR11-Pulsed-Doppler-Radar/src/cortex-m4/libRadar_S2GL_Pulsed_Doppler_lib.a b/libraries/BGT24LTR11-Pulsed-Doppler-Radar/src/cortex-m4/libRadar_S2GL_Pulsed_Doppler_lib.a index a9f86bcabf4276a8714567a99e0b838f80c3f792..8ce26a53bff3f61404167cbaa94e03c1aff223cb 100644 GIT binary patch literal 4115816 zcmeFa4SZZxoi~2&+{w%|ZKow|Y5D@4wkfo4aqRTG$f>y-1(i~%lVz(dA;YJdtMf%M!sh!naXPl(9>;qAV6y7;fUqmzY@_qr!Uly~=ZbzgtKh}!qZj)^GmukBX% zQxAzK?-vKjQ58iWA3l67ct)7yxY6uXFMUid(UwZH}}mCh`71Ga+QextXw3L4I)uJ;NS0j zN+itv^_e1}?@9GP6O+217L!H~i%B<@dw1#C&kOH9JSa*(+Ad1JajTeea+gS+wnt2_ z!M*cwG5rebzO!3QH}^N664QUZOO#FBICB4#bG5VIQgh*>+D#jJf# ziCI^r#H^c+i&^h~Ld^PXgP8TL6=K#iC&a8jE)}QGs28U%+ayk35BJtx;`H9f#px4I ziqmg6EKa}u332*;&x+H(`hqz9p9jV1znL#)mp&_ISLDR(^+(0*i~Gdvkq$BYhH5eU z&So+Dp_G{Yy@Z(kt0zQxX}c(2d`y&Ic$X-D?MYF7%@k37{AZ&4dn-iwvv-T~-|i7} zVl%~@m4L5$TFg0kmzeXZ$Hkl%rii&`J}%~7@UWP>^HDK(;zlv|=EGv{hk-u=`ZM#z z+&>91Z}zid-pZVqx8VUX?@e&O|1L4_v6EunZ=zy;yj;wmn-cR^oD}mfX%_R}a6-)g z;2tsmi4HOUCpU@tFP;!*tb0j{xMd8=4heTP{1u5z*PC)35Eg?EcZuWJ^I?%6FC{p6%r zy!mdi_^(FA;xD}@Dq=ZNv7`aKAYFXD7tjf4p5RoqmT{y67&kG`B}AMI4rX;UTf~nRcpv%dXiZmc8?^SoYng#W{-y#W@4Fi*s&xLY(tAd&D`%=ZkZ`0QaBT#qu?eiscvI zB9>>L7t61DOe}xv9b);t^TqNnKQ5L(nG(x?IUrV4-z`@3mx~qe-Yr(ZmKBfJi535P zT&(!_7e(cyYEe0Nm#AF+fT(N)y!e=??9YkHtAwb0TfL}!??a;UBfvj%QdE9(x~P2a zDp3_(A*xbQQFY!eqN?k-sJa~ZJLZe3&+Zac-&-oGep@Y8mQ4{WSJaD@8}Ak?dq%~| zt5ag-t++pNhgkU}@IQ9^KXb3T{%-L5QFIFGCTde-8r^M>_Jt=A1|2>i>{V$Hwo5^H|@ zuvk02TC81uuUOmof>_&eB6w#HinY9NDF2Jz^+TJ)pMC%Pe6j9xH+uKEGoKWB_xsz$ zxi8~BZ}o1GcORZE&iik0ufM-S{NHw;kMi-~>Aqm?3h|%5uX#XRaLogKAfsK z?#t{?7o=u;GtwGc2ZTNHKu_Pufq<&)cv=e>Kk13lzMfpBkG6(cy(6QC(z%iJxKva~ zVl1;iGnPyDkBtmjQrY2b&P%D@Ty{UwvG?-y-idxv5i-y)Ri@Ku&sa~oAIy=lLrnFI zRO7Q$@{VT4#KWdr(zJIl(=&ET2|rH?D(K5ddyEQ`Zz?wwD_|cPnan72)RhjL{Nc^zO42Ae^y@-khLbl&^jyeotQ?iq3d??;+$vc5GDi zBDzQi7C{vC9wRrh_fpZ98AOJe(n;T>j`j2*&!nkiD7<57+~e7iVT&<5F|?P`{pp_l zJ=wvYy@MHT*0`1$8O;o9l90jnXAxhex_5A7+{jx>?S%1d$Yq95;(KxvV;M^}cQ8FV zav(Eikz{PseG`xk8atF7Miph^W`|Kc_xB8HUo5m~>`0##V--q(%qWfb42=$= z0ftSP%PsLj^s&r7wk4>uJ%fXLdwMU^@)N_wI6b4IgNM>+UA(I3r<%-Y7PO&}J`;0V z6r`i2WjXZZ_My!7`d0UjzE?@eXNNLl zVCN>r4L_43vCZVYr&UtMCPs4s@g}xdE&JKLdXn_7G08UWrX6+Z!8SJcO4M>TNnV$H zbaapP43DFBiI$d*&TU)LO1QbDz44L)B-4;6sgCZ(?z9pO6M}-RosC;s(%qeH8?`Y$ z!3cI-yd@30>O)EDk)`<_rqb9#k<1>3Opz(QvuAK3lTX$u>WOz{a;+$gU5AG7gc!^A z`aZyEp2!_)I)o=hVKzNB4)?trsqs_mZ!F9Y2T(+;Ihz|m9(r+-B>`D$r3xd1XNxQ@ zo*a@YT+%$ARoFaQV{=owt8q(5dy5~IPt$ps#v`_G&`NnrqA!=1;T9KNmf>9OOG?zd zq(t?pByy~Vc}A*er8jMBZ}#J65w*rs`NKo4COtBd%MabwQy>X!c9As56Uk46Jdsn| zQ8*bkZ0t^V?@Djm>L-FnDwYJ6K(PeyMG8dUXBLTkNFYDzA%Xme`vS$Iy|bw)7-ZQI(4M}}5h z;OSsd#zrPa)2mFg zq)@M=Q>d5M3ia}K-{8nzbnbN@UNN(Hu^z?Z?YQlt7VM1*l!Sh^ea@MF{<*`+3 z^+YQ*!W}!(P2HXC>0Miz>cXZ3c*>#xX$!EHVQLjkd5q@lxa4#lLce;b38N_J6-Y8SJmdxE?-rXPpes-M=Rj9W{s5U?eEW}(Lv81tlxX6)(a#+ zt_zZlA-+rRm`!GV-IKeH1m!_$X?a5wHz2v^-BmgE7%G0s(D01*NvSVu@xmjJEuA z2$c%0vPh!Usnj&F@oh4UVul$Xc@`VPjDW4u(DFQ)G|6Ll+Uz2xr2?Mn3nW@!Z_ZB) zi3C!?rx?2|iVjaw0&ElNI9}CJLs?Bt9%xe5rg;M6xt@I)Umm?|8)c)SM0>`4g+3)< zxFi>$&{m8a4K|Hr`ZsL1kVYb2Fw!@p;>%h{<8~c=E0QJ=>_{4#G{_*fpP(9=$9wri;8pjXQ1Hd4}U$>_8h%Jg95Og~&C z;&~v)Sg$zB8adWxd|=$o^FX%=fo>%($MC!$6lT0=OncIp@-{X!?s=lyc#&@HVLaF8 z$wunn`QRv?m^C+1}?)Q@8@5hK~A z7!3_Dh1LH_tdpume$quos=#3`BlN8yyK`d6-@x7*u2JsX&ln zW*~T<8MM=)Tk^0A-{gY%X=r(71sJyWAftf#Lc(^o*!%$9FM8vsgm`P(*m~UF-%bT3~jB=C?sqQ8??H8bO(a<2u6cX z(7})}jL+*{YI}q{MN&*sZEY4ctTIo`w%KMHdhdweccI(JNVnEL&JWkR7e%*`k!~Y% zIX)(P42fvYXcp5L>@g0HV8nfbSARo>3}OH)M02nf-0UeVKzQ zYW>-R$TVp&Mk|W2rRl}lG7iPrj7)JZV^y5X=oROxUT_hkPZ?n~>>Ku3EE$T$zgWbJ z#JEUQi^Q>TkA|q_ z(eN(G`eX;ZDqmYozA|MqVrF|)HiwAH<`7ZZ9HL2^Lo{h~h(?=3B-$Jz(dH0ImZ-43 zfe6SlWJ|E{*f>j#jkCDec&M_68YH`*%c3C%H{@vGcqcO=J(wA;uUV%)s)XpKKB#8R zmpAnxOgHr*OxN`xOxE=wOxE=wOjh+FOjY&4r((>nV1yJsKSGM0A0b80kC3A0MM$er zZCTiwya*}jaD)`qj*xsML9*j1!&n8a4>5yL2r+~42r&bZ3Go716ygP<72?@(3$b(r z<%bHtNO^G!(YVWP#r){#62eXZ9%yM# zx1#4qN73`5qt)nw7S^JkmSN@L=qMfG=x9T%@1X@so(WKw$h_Rq^t|Y3dN?{pO(;4> zODH;;9Ey&nhN5FssOa?U_1_}sHoZRSMw87Pk#6<=XOCmk?TOQE#OYSzUSAr4N>v`g zc=QR{w@*+if+NlBof@xd7+HH$i1IR=*=LW%Xw-N!sP<@3<#nXLf1J~0wYeHKUJa_f z8dP}=j#=x`X+72+9IMut_BN2kmpc=}xWaS*8qH}($pjE@&)cO4q;ZNZG|CN(*}pbE-# zDMK;8vY<%Y@HiG)G-1-?aAvSrP?_9@k%?ifO=|9J5xK63z4&;6bs{6f#pP70VrINf znWmx{fsh*qF<3T?s@0jnTx67rOyPK9O+fFdQxeKdO79rO^z$NmJfU_uQ@>C|nJ0tU zp7G*QL|CUNU$VHX*;-hhRJdSlTvgD%jhF_7X<4hxWYdD?)fV=O$yM-LTg+=$Q{&b= zk0hos4+?J`a^|0&z*{ibnmpgEYa1~;3&GYD3s%Y$uBIC?d+Q}5t7MACN~wQ2CPx{Ls66yJ|?Smwsf_0i?&*{ zfQ?<4=oxC7Eru+T7LFp`I@q&M&xp4ea_%=-w%Trf)Eq(^ZVBRTH-mLJHmPH5BsbDK zGHB*}TGEYsN5*o6)JTS{s~f3?nbfvk9bpa|=9BX&>9L7nrhNephWof0$}&vr=Hf6k z;%0&#Ggqy_lX)XU=46d#(p>zM#^V!fEQ|uR=%*J?IyC2! zsz+?)3MZS+;P#JVDNK6*$RMW;Y3cBaA8IbN-iLHdHHGy& z>51`7ugFVyrc_NZr5FffE3+qeP{3VVH<%l%(F?qgy=g4=!s@d;4l`Kt`un9V#WTTJY+bTRF+MyV3Uz_4&DL}4ze z#xp&{T=QkIG?TJDgILFA)}2uY3s&EVTHA|}`CcqH#BwvsBXi=^0$j7@2P8|Gh3krf ziK{xga_L&etSvM)sH$LuLjDVowXGpRmfrEv3`UDD8yX$3n2beHCQanDsp3A1F{RHD zcI?pL408$K{%r10INVbSsPxA=JY;)u6@4S8lAw;jvb%n~E2Iam2-%S@vdI>q7JC(< zs`pmLz678C(ITeDFUz8>;kv~@CNl?4!S;L?_n60_pV5gyd~?Oujod&XgHOSxZ@;xu zD=)(;C}WmR<0&{kF*GVOd#KS$TMC&B8pI+Mvn16NZNn>Ayll_RHu;Jd%sW(FwA@lK zBjZi}eYR<8d9xR;=^M_;s3|VYFdkhCpM?R6cU{hc&yWM%=CDJ zw~Z_5K2Jj7os8Cau01>K>(zb>v1Dhe5MyH|w+)lx&{5GnFcYx!QG~TA9X1oa=X^^^ zwBrW6YXUho>_-NqPPFRiB6;CblNLj(YLQjMWw*g5Yg6**G6Iqsjv0FTnOqT$3Z!df zVyri_u}7|Gv`o-p6=N&U&B&K5UL?_ib@gJV1-c>mDo!n=U!qkwI@@d|nr|s7AY@0S zQLTFKR4Zum%~2s0mCB1)QAwRbmSsgnO>x8<{}w#gvwJzNB75ds3vAigrE|;l710;1 zRx8&`UjTb)4E5B6X_g9E7*r%XuuOauD^+_23#6Hpvy3k;Y^^9`IPA!?d}nf9gFX8* zI?^&0nuRh~j0ImCdM5g?GGEmL?Zc})8sCDHl8d*|C%3{>0VK2m%tHAR- zdGA3MM;cj(VZxDbTa8!>Z+QyvwsM`k#YD{YdsQD_TWnU?ELG6_x~yX!sN<&Xmwjvb z01$@MHzHPsH=GP^KbeQsVJk{S+*8U|V05&xu?t;QBP&a>TZVdC%NbqRdn7}uM7T0u zzNL|(*T?ZKiEnlmske8cz5uN*Ofy?#$WXKU}<^%wN4?S>zKfy%y28L4InLpT;cjJ~5mJl2e>$h2~3Ii7S^> z$kh;j3i&kODxbF2L?5cXl@lSF6#$(1Qi^8TcDcU@!>Hms`yRD!AWX768YwG8lJpcM zz71Nb7~+J~Sbjp$clep42qPG#`WjR~ zI214SB_@fcDP&`{~sc@ip(qicXYmT1#ZY=g0RuWl6Kl>!HkZ-j@AfV8!2e6El-aUFTO9BF6 zi-OFMWrkVE!T`@}wF4Fv3(G1RL3vA!SqBh^tw$^v)c`jTc93I7(s1%(7+@5ztDycs z#Egc^J>Q&yZ!cyr*&C#Xn&JXXKLP<}xP0a_Eu#xCi>NK;$%-tMg&QxQ7SvnFN=XZa zqi6;E2GcXN)WJ?tn^ibeyv~FcJe<;hD8{z_JmY=UAz#)+eLFBiE@Wtc7YZrJ3nrK0 z74Z@>Os^@hDjc)WUZ!vgRwxMDSK(k(_6DkkS=8Y74J-o+Yw^p1y-2~b(3OW;nTbp z$e-6{LN$}ue7g{rkF;i%WAEkTx_DgN~ zWN$o1jS3C*PGGl?@li@=YoP>v2YhrwMUX>4_*yZM9mbcyzMfIgDdmqb0pqxnIS-|F zb?`itn(FE`Yu4aAl(n_%YUKdcp3>L1w6{8rBh2N9rNYOAcA!PZYyRoB=jM3$jSo60 zk^0ti(JS8moa<5JPyXP!(=L7f=l>@C-11jt<_?CG4w69Hj*xc`UcA7YXTc(ms^FK%Kh5P1hnzWE1 zMV2o8#+=&Dl2X>j*>N@6=)3@yqHMXkRk-G0?BY{W;vz9(nJxad92) zzx(BM@!4lzXn@uS#cy8MoNA^1RO<_jYq3kG!I9(j_f2X4*Gs4Va(ePD&^qg5%6If5 z)4mpKw`1)h)-J-SZ-^dO<)Z$+N$r!iOnYqFmyW@TYjNKJOXe>;EK|~1Do*_InR?3x zr1PdASEVy8m?HI1m(r)=iTI0#g(*v)i?VL(Wb~*vD5dn;`Fi|!hfg+4^7B>k=1a|C zp0n9mG?z6Bm$O+|Zoh7IZrIS#ytAg7GJozB*B&06E<{ASqs~s8gyeh#$a|&=fzyxz zSHy|^4vm2Oeo!N4oX3ABQ9lVFQu2BL_g`GNmv@s9iQiKK%G@b%U)WDdwB&mT#f?Vc zZagR{@u`rBBuah;t&v20KKRjS2|C-5j^of3;Z9ECZx*BHo(tvf!Ztdq8Q6+f(|IM% z=5Z^B=-h|D=;O!mU*eRk{tv*|MerkHN1()s{S5z+*v&A=jg3G-6e_?jIq#d0i6=@f zXn_@pjnhDCxD%wvVv+a(ESmTdY%gh2SWLM840B7GqtJoSw_F1l zTZQ;IvClFIVxL56yRrAdhG-1OrHGQ)R#0NG>+v5K?o(vTNB&v}HCA*d6l*Dpc`5J}c%%s5t(AU0&n(IsUjKHMC<*=e; zFB6DyJVD=mjC^EqByo~hh6Y3yPf6@%0_{_}Qi&G&8&Ft9;!TKGNtOyDi%{`L#*a7LQLfF7h9z~ zh{PGh>J%1D;H(l6TdS}{;zgJgtEVTLI|qtl>lAN#;toV5wq9W~6O)k+vGW;fWN~@o z>j*7&fx_mqW5$@z&7z}y&)xS?b!v6KFq6jqV=7ep}Dto$ua#E7*h-U`S8+oZ7S z!~ztLSewG?5_PomB8Al_<{^1vn-#VmWj)#f&+amYyX9KwjL(m4pM!WNDj0Z|ik?W^ zO_kjWizaTO${os-MB**v?Nr#LM2tyxvBF9djWlzYNu=`_%q3JGSv);a!Gw5~GG(UB zso1L(R*p=fANO}m$K5x>IXMC8`LUjN(>9q&y-HSRQlG-2iRmbxv5X2akvPog_M7kz zF`4!$Ytm2gm_frh{(sO8PG=3O%mqtHE#7W!+&J>3BDDbIw;4iN5 zCk#GYBw044&~t|9DEtowk1CwakW>;;_!$OYpzunAPgD5$22Y4-(fGyjH1O$fLSDsp z#c9CwRusheC2<-cPJ76WUl{)txMlwfk&QPwlPZ6Vdqm*(NA9l)y>1%_=k2qx~ zki+pNjURQ&Ze$3}@fQKy#Wy--=RteCB_4xTck%5`**nQ^jZc>NT~67ZXfxs)wg2Nz zSql;^zDZi>F22_(JBBQcw`u?{BfrYN5YBt_V^NM?-NehPL!^A zr{*7yl)anbcWL}cr0fdDr(1`AG*b50jL!~@-x!(6Y;hOg6e;^>Dt>i*rBr+@Qucb{ zyS1X*BV~6}(Q7n*N2Kgd8va_1-xVpVWJaVles`qo2m{&^ZA9c%^L-9Uis9Tmr8Hr~!|0cJrll*>-A9KsT!tnNK{1&%tCsH^* zp#9(Kmc5!8pVj=^-Lf9?FO7Fe`|fbd>KUKQH2=6;b|LXWjo<5*4N`t6{u(KNzgzZJ zX3VhWKjfAjAb&)M_pn>`8fMI>=0EC|y^;LON^}Qdq4RH;`=3jdvpf&85Qw^@xzK=Qug=c zABtZq@rO!gU{1J*UlD(+;>XH9MgEoXV~QUu+e`bdioaL!<0AQ66o^Tz^+^Y`No*e` zeII{GHeAvr+YOdX*)B{H$#ck=g}-DSU2H<63=4&nnIV!}$yrC4T}CFkmoBM$kS;bQ zlkR6wR}y9OHHpnl@&=-GDfHb2O}^i_X1$fg_G;PMM4Si>n)NM|yu=FUF1SmhpTU15 z5p6>01b7P)_4HokoKyBf4Bfie8sxHw{Uek_WAoA9NW`vYBw|k@(CO&4Oge8B#XgS0 z@5G*g$4G2C)Vr}g(#x|*vyxaXMTGl$kS1-Q+7hR9EJI=!S}P}34re5`3~V>{Ug(I% z{(%1y;jV(((km|jd$w~L3~|2VIOWc7VX`ye90l1ajq^2NGiebj^2u%8<580o%hFPK2@CCAFl; z!R4HR6g%^Js^3L}R*-mx^JTL3c#^w_ZuBJgQ1S>R7hC}sFPJK=N;wH6gEQvvImL@& zH1`;MFXSOU&KP|k2YJzzjC78YPvaJgorh6|oi}@aF9LBIZT_L>`OQqBm7polZ>8rg zKr2#koQY2T5~m|F0r!Hpge;ry>_x^p_sTSefM@bz=VLVa0WaA3U=A|aS0k-eIG_6% zXg4w(CjS~4PG=<1u*BJ3g1nN!Du)nfjp~q>g8pIZIosKR2smGdTVPBwIe_F;Z7UkFw?lS-OJO_&SU^H7Mio_IAh1 zdKS55RP_m{DptmXsBu~u=l29Xw$bCyLmrugx@@8{Fp|7jdYPxSvN3T!q#|OdE1XNI z{Vq>KUQ`oOPhDKRF zN)lq#6tJ9cAK_~uM1`o^fIsK`GL;l%^(Dag0#+2qneqr) zvS*A+SF9cedFn~`H&Q#W0iR{vpyRL{2)ajx?z zSb5rF$6+n0msR{+=YJu@lD9Yx%U->#gXcNFLW@=U7Ke{0M}Nt%v4DTz9hCzI}g9$N~b`KV3t z85T7$)$>}9uqUk+)KNMOy6Koa!*P?ojwz1QHiOEhE`;1lChu9&!?f8-X9=0pwayZ1 zI1Qndzy`@F^EnJ{2G9g~Z8M0@oC;lZ%+m3Z3Qms(Oqg9IE}Wubd-jwREGV}LZ8J!k z{~%-kx+_jH<5<}{SPYr_=UIuFloopcd|Jm2#<`RpleGdxi|Df3jsw2Ct=708zb zRieiBn6f=uDjE7hcx3`0tt0TdsLnSA=;8uCO`sLmztKUlsDY9tH@wjik%4bLb^_NxcSo)Lj}w#C)}gl5+2ob0PjLs zh3x9v2&o(9?g8jmPW*e9ZA}zZrYd2ba;FH_Xgc9~<;K5%**dC04(E)`FIW6P;@bR% z|3m+bZ8-C6{bBy&QXYR8<~A2InU{eni3wTp=rqQ&l=5PE;$`RtGAv$874YCujT1Mqo6CO0TX=Ip7%~v9EUa5dpcD{lE zwrBT_^^74gSIV7jR<>bhfZ@!@@JcM9!RnN1tYMYhHdR1gsdVtof*n9!$voK5)v?l_ zVev|a?8n+?Z%OInFDCuxRQQ+ zx2gEM`%J~(?N$8Uxl1PsR{Y)l2P6+b*8pRBy0kq5lhgRVGG~9Tng&PuZ;~A?rr@(qb;CMsu7I*Mi91==<5ZB=H4%Ta(>T%zzebGo7=4@4ZU0});m-O4Bek`d8U=zf(rFk zspYz^@Z6#SftMFwo1Djr?Ol{gu2|31?!*2XoLDr#jsYfKVF5DSh@NRw<(wkSvB$h3 zv55a`5G^1p9`1UJe5f$G}U+7;E(%`d7>Y@pU1O$BUuv*RqTn7@2+ zL$#9ICFS;4*PdCuXjLR)8T1h+6!^Vi!UK*|u{)Bm{9rhH;b-ur+mHL#^C;hO9CuP` zv-^*t%KhutSGhkHsdaF?7miO)xKpa!T$S5Z<*wTmnP%zvQY2)}V-aU%<>o~fekKsT z??#+O*Dy-g2CR5C;>c7x5J=76LijUM*j<*wJD_j%b#5W~x4X{5V0_<`NBMvo%KQ(7 z3CBTDr6F%+KbAl0Q>U@jfIPGwbK3%^zPD`Iu?q*qiMFQp#;z`$m@Utj$J&I@S?5hH zJGXXJ3w#r5#+J%gWYRd4Tb@TK_oWK$6rmQ^Bj_BqIO0YSxdF^p9T*wx6X`T&)aB~o z-R^m<^ePkD2pBDoJXgnt8^Z;*o68L1TywSS3551xj{zyD_Z8vTzwxV9fqH&Nv5N@K zZ02cuG)Era+}PEzwOMqwrn@$^wX`>h!~0V5 z59x_4**Bc&OJVb&F(G%9kQ+m&eJA9eIl`Bpz@{8hnjW#g%7|*L(<7I8>u>|RE^u$C z&YdmIm=EPSYkX&|?_A|O>wM>G-?_$juJxVuzH=QTj6#TGa5I?Y>1Ci7(XoT+9<-Um z!#$j=35)YexCoR!Y(db}(%Rm*k&Q5Bzj}wg^U=amm*!(guux(fU>r<8GQo2XJq~sb zx@?#`E#c9L!pD-&Q{mO7NnGcy)nc31eYpW-91OAw<+#|eZ3l`OsCedZza_b|*WM9s zgputdT}rdUVFiet!C=V}jvBPzJHuYrA7$z|(+9Q`5WvQ>h>KS4r6Q|=I!0b@ii0Ti zs>&RU68w$JgT2Fz2Q_jL0F$(-y;B5A5*Li`=xUS8==}pNK4TaaLGN0&f5+tM!7t|({}$8xElmAZ_{ZLyHt>Ai{ccX$eXZlV4iN^M}MyA4+&R{Zn>8$okQ+tQJM2YI|Y~0$l zrL8-?VMl9gOQ*1Qa6#P+8r0d+*sRSBMGU0~71!)1WcKB=nnvV2nnV;Tq^$PKx~Xf4 zFvZCOuB)PZL_AN-Bu1mJ^Nt?f)kQES`d^9Rpkv)sPJ61v=#=M6wI$S#*hE-@Sh$2 zqhoC-U)x)@ZtUKa-qO~!rLntdlNa7Pp>`K4*bUh*GBPO8=*x!EtAFzOX?F0F6-766 z*iUI7yKf-9uLl)UmlX5Rs6Ci&!`al^(L-Tn=2I2V@416t=tdM1i+NEAuBu$WG{b}zh6Rz%lWe?U6o+0cd<0#7yR+xy5 zTX&?IQgRR}Ra;$CS5s57F0~W~VqwKaW?Aahjh$OoW`_1=@Y>c_S(jc{iQ$mp-hmX3 z{>_e~@TF>N>TB25za~{VBnwm}M$69Urj-4oAYo&S^YIpz%N(p6s-p<-{?Yw)mE)t8 zeKl)9$qh^l?M+qgtHIrOpl7VVvNlz@4L9Bt&)+vZv2I~Savll(Vnx!kAudC zxQ!2CybId|R;p+9`PG6A`k~<-jDaBmWj_d2+!Vr9qG=QBD^fSyT*yO>v2_8T=c)~m zWkHrDVc{dZKy-;`MCX(%&<^-5wpYc-m$&c>$h zm+=@v%fKD;(p;uvSCPDj&em<+X*{wvb~bL=g6EFa3ikJ8u?sR&3SAUzgNe0Es39C? zlZ{!h(6%XkxliCU&fQwd(7Znp|u-*zMkB~ zxT%lmlFDcGxCrg0*TrsyKpn<^)498M1P5QdQCDm5rP!z|2Vcl*y?A%$sYYFQWA`BL z5Zxyeo^M&)e-dd|d=pEVFsKM>Q%RJ6J}B5d#3oqS)+^j}v~Asq=XZ0uqY>HWcaw2I zZf>XC$5Z#DvA<=T=>he5TeMkuEW6SO_lnHeh*ie|ZCKML^-jv&*USTqk4HRnOvz$6 zvhhWG=fAaVW}Q+GJoCc%GIH5;O8LM;k5cc~XFc=8#-^roQ%l((cH{Xmp6VYNOQHEo zwdm$A)uFbF92py5_7`X|Ir_uzFMq;?Z|zqlr%d&}GZ~)wK4Wn6y@z-TcVjZqa3s=j zt<(OchKC!H@(Uk%yi&Nsd|MyC?btZK@!0zLEvqp(z2Qi-;aa!hO_2sHh_L0u{)wCK zRd7mO4F4MGGpKv1)U9pbl5cwnI$J$?}G4Vhu-18m^5tyvc32j^PZIHhjI| zk%lifQ0EtsA{!=$ZC+uN0IrvMrZ*;24cEY$c*C`^hPRaL`nvHBP9RPAU5;sTO|;>N z+i?SzVcL{5sR#C!IuV;1-!dsu z8Y_#=bY?lT-EwCRW|Piy&x|Z`MAi7AAuL1%%#A5HU|e|KV+e>(Xi>EnyX#k>KT$3`D)C^oYk2M2&iYERAe4%!9b)yXpAXeL!dqK43vIDZ&v}oc$|iZFv5Hu z;26|yC&4M+G6IU&g$X^n&FfP@E-Vxp20W!~f$mN~UJeNaC^C0~;}QWr-vUD876HCY zU-?cF91|%bl=tEikTU}er%+`?POZp{3WU>A=7H>=1xuKbS4Ghbz!sBcnrO}WZ$^O# zy~Ma=K-MoG1(dS-RoO2Jtcq3nV_1@0+%|eL?;w6%)6^m(NlIm2;Z;pSmH)abBh#1J zJFyQv*!~glrMqYEUX)6e+=_zkrj24eZFnDsO)UTU6n^S98qqL`Ds1)258<{i^@>%6 zr+gLm0v*fl#g_i#XaisFH4lRL>c!7h^0J>%B*;%ZfD3U`4xfnR6_z89*V(xF9DOM{ zK8M2L+U-2PuE~q-Ilhf~*Wga2e={hQ;mz>6aNGJCfEUuY4Rl*y&eF#;F#2+E+xpsp zr*NCg*f$D-t?w#JAMG;w-T}9*ZxDD2x4DeIw}D{mJ7VeM3@D@T6L8!5ZUoNo%w_c5 z1A?vZMoS;l$LRY8+_t`Bz>nZIm(lkt5Nx?}AWR!`8M&W>V269m3Kx@*y>QFm-`3X$ zq)EntMTOZdk6w=2f6t=!QEPa^Y=-Kz`kUlP6wfmSRz88n|-3@*0 zAM>^+a_}veU%}7&CqA^cOit0KCarc z?Ryfq-PbkxIz#$)TlOus^t~>m?|I-2#yBlUl*I@fZWG^aA$>O$(YHCI?{Q1tN=x6BA$_+N(RU!E?@3Ev zjiv8)tq(w6cNNjc#Yl{wk-HZTlNR)7++TT_a?ccyD^w2tP(ZGM0qVf_C&RD?$Eq18fMu4M>}+~>5MVb!fcKL>4z zxfm|5Ps3rCgZWt@4nqm;+lZTTjMi7-KsJrSDX;rc_|_T(km2%TAH~Xc@e9cPlL-tw zBS&bNBOY%cZeyj5@^=b}^u!#^z)K1+>%xnf30env>1 zJy-v7(en)IpC#qdROyR7Q~z?&vkc15mhvf2WVYv`!xeKv@^eD+>{03i#R;onpJ5y2$kj%^2NzF7fX@&|HO~AlLwkE? z$p1$)pKVGR+Sh*!;B&-pG=5a_=ZQar{LivF1GIihOd?J9O_Hhtcj(cP3ZADI0;3Pb2>PY@zaM5w#ydhwI$tgOIFf@p6 z%}^@(0SJsjpMAV=gCBbgIrNFgkOQAy3^DXc2V|HT{*d#MpVXDNyze_9vPv0myc}GA ztlm)d(V=}pPsQ+6coLxxIRzvNe7<2|oW}`Ra9S#63>2J?B(hioq*JJi?_A)n6%FCEu79+r~6OZh83pw@*( zKxg|C0X;6Jj^u znU`xjUaP_{eS;cvhydrx^3rScYH7%?(Eb@;(%Dy}zC{{mUy$L}6C&L8gm{+=$b&BN zaD3q}K!;wL4hWZYqsNAfe`K$Eo<{bm_fo=Hqyw_Y9>G`vd!~_oZ9nMj2a$h)hAkTM zxk>uP8Zv!|XEhww5J@iSZ`AO54d12Vts4HFhWBXrSq&f6@SimNp@z?B_?(8n*6?>4 zPQ}BC_RQ08nTBgMKwzyENo;p7K{}_$Cc+*6?->xoaBb9?f47Do)bLXpenrFYYWQOf|3kw`sDSi8M?-F!M!ZeKOEk=Ccu2$RHGH>*AJp(u z8h%s5A8Gh24Y4dt>Mzr9k%qMzZqTq(!@U}gY4}DBZ`SZ{HM~c|FKGBp4S%HJuQbGR zITgN!i!|h}R*d%s4Lda))9{TN-mKw08h%s5A8GhOy!cViCpCOP!xI{QN5dyId{)Ds zYxul|ztfQGEU9mrhO;!Br{O{k&(^R~!#WK&YRHZ0sHaQAOEgSt*stN3hF58LlZJO_ z_)!f%L5MQ+X$>FI^d~iZh7f7;Qw@Kk=`RvaMq`MZFiO~q9f}BHU%AE?X#6Zf3}c<6 zVU_0BYyJj}w-cTwM2Cj2()C^8h@w8-$yuGh!1G^LCycHhF>6r zosVh!8-$SmH$ptDexl*?gpm6a;e5P1;st|nDk0-Zh?oEQ8m0(g*EyPBr}1@~-%g0< z?hZoqANCL~!t02J1BCEDLJ0l)376nIoQAK{{A)G;Cc>rI?n}d4H2-fk|L--tU(-KN z2>CA&W`y{f#{Y$|9s9Rw{P%=-?mHMbqC7T_lJ+bhTrR|74OeOUd4yH?2B2XRA>y$` z^LK0dxW=y}#KZsf8eT&P`8R9)LxhO`J%s4Yd_u!d6GHA`%|D^(&l1AklbZel;aVYH z)DT0g(qEDg^fC?SYFJN*@Gvn_MDRhTS;I|)2(MG~U#sZ{2$7Gk*Yv+4JYR^nYWQ|S z`1>1;A18$T{e%eTVZsJ{JJIklLdbKsGSZ(VM0|ct*d)YnHFPl4OaGGyTTu=*oUQ4L z3EPA?Tf=HiUrz{qjT+xVi1OE|@z)ZLA16fr z@_vnfRYPpQFYW!khEp*(K>Je~)@#_K;p;TKS;IRu6u4wNqali?#KD$O_D@kqQ8gvL zLc?kek>!$po`xGVL=s9ml0vpmyEW|7a6rRR4RabE(eS8-Z`JVa8veD0@73@)A=j4gW#IZ)o^!4WHKVSq)EW_`HU{*YHmoPGkQM?b!?sWj_`80*$ZKkn>t7 zcdmvPXt+hg?HbB{EaYCJan65XyEm%gK@G3ckb8QP&v__>w`h2)hMYITcJHGaep18F zX!u19AJOnTglGpjKZNjKG<-(GUugJi4PEv-(Qd^xoTlLn4d-dNK*O^&T&^Ma1Ev29 zHQcD-W(_&df_%=)AmpZFg=(LR1e!}~Pk zZp5U2g|H6ow}#)=@VgrRm~gES&uRD@4gW*KNiO(k=cZ~nOT#%DE+a&HR;l4?4cBSd zM%aM%UBew3UZNqoi6YXYzA3VQA?s&Czel52wPr(&KhQ#QQEn#P2v^1KKUZ zCiShD?dqe%(T?(>{-}lt4Q2ZSdO2~#PqsUNDdG^S&=4Z|?Gf5?m?Yz0Pl))h*RX*Q z>CmjJ^m>F4>GNH}rRcXqH`66Wi1b)Pi1=?IMErXR5pQmZ$N0XT z5b^r}VFTVH2obMG30t9;5b=OXB9isXQH92r5<&*5CBL2!@#@z2E<(gFr}2Y?h^Ndq z=sQXr%8zOOErf{oy&Aut5b>Ak4EaZiBOM;s{3i&J9w#;aJR#C$I@?#s&(!T~wZ`iR zVf28;=3PPms zdW|;_HlRLed^aJ|oAUzcpS#pE-4AN~D#A8wj#-@wT;91>b%oEhs;jB@&Ru`0bFB{J z9SN6rt`)xnA&JG8**J?$8-BL^{tLeL*osC(71!;J4fsFnC)hg%@UE*qxfwv5K>3>j zNZQG^h&T-B;_kzZVlOZ9o&~Xyagvm%vjIfsF%Y*a8G-Y5-UX&xPsSN5LB+`zhv*|x zf^x${c4k8yC+p0DggXx;rxBAcL5a)3m_*4hi6!EE1o^tlk@>6=fnKE10H!L{|fAig*$&gct z(W``YV)Q928atDzpHb0I#P~RO`%PlpL3R5SHa+%!@&=T@nX!wAWfc#no$z_@UdrB< zItl6gr64$Jv*!ejhz~$nw2l26Lw*~i?cI-G?!L#tU5jJEJ&xn{_OI9+NF>xA#;WB* zfUrXTn?Kodh<@0Tw`<{lzl{oCpE8QW@c|6B=R>EL#lb3iXmtHkDPK7E)SJk zz~I9tQ$BC^B!4}>+OO<&Z;4*r%v+_S*< zZEy47ZM<`ey%fAHo&M+U6oBt-W>b_v0g#K-^Oo}mb|B)0Q~v%}g?6F}Zah_o49f(bL2XWx13^Hnc1~AQXrV){E!wPEuftn(*gO)&jj~I&X7|{B3xwvj25E2mxn~hJS$V~mhrc50 za!2GUK`YY&MFvad@&rQJX0N6@^%_2J(Vkw?S9E#ae{waR?8~90m)#jabh85&9u)Fg zh<|ng&@qr#SdKhiXXD1J$xF(ufDHW@{nW?)uer=~e+vkfm3h{1+NO;Wq4+;m|?JQS#A(OBli}# z?QpvhAj4s}q?>Tx2e1YZ(F~ z_j$M(lwlo&9A2@!i*mg9I$+8G@sC388+7Q)$Prq}FFG*Ro&u5n8E2Ym;%@63MSiq_ zXD*}9;0D_Czr>vKGNV{RDDr@FX&@EU~imOMUZdIGeX)xh@k-y z0W+m>424K~t%mC~Y|wC{hV2?&qTwD5_h~qx;T0NQtKm%=-m2k;G?e2Mu;K zX?Rk@KWaDyg@*Re)o`hXYcy=uuv5c58V+kH$0^|d%^JU1!@tq+gBr^5YRG*_RCCON~p^tX}o9&)aT3 z3yFnSQq{gM6)CKQto-o{O>a(oc>a5Y`^(a3#mRV7eDotfjZPIGoAaqi>a(pli}{)x z?5RHqjN6|Ci3+^1>3#wcXU3m3*a# zfmiJOS>P7n8=x;xx&W)b_vCU^LSnhn+NsVqid7r4b{`j=k63C@m&utaQoMVw= z?y=~xl4G%B@nh8JERCEfNliL_^0SBLFKu1i`jva8{_;tBCrZY@v2=tkjO+XWBv($LGUq72 z0X{IU!^Kdp3s2rT%AB_2a$LhZM|n3rPhu%F=P1i_cM~OS@iE%NaSVU7XBGYL#F&&m zNBKGwZ+(vPAqJ+-QGN_LgA=Izc&( z%S`$%{^AOs2IUf;ElM8&SqfDcqN8vQJW8Rc!dby39#MF=!51jJ&*0M(o-=p?bAh54 z$KMHj${%59bXS}POt}FeM=y!f05SC;H+o@w84OO|jp#-jq#Gkz$%p8pQA)Wuel@v? zzBXw5h?9H}agH`={HT+R(tC4!6;lewuO|64iMGVmsiU_$$t3x$@ePuHmy_H`{TsFa z<4*G9U_>`b3wiu%@-CPfZPWbwo#bNrzew{RaFXw%|IM2Jkdv$=zg_bmcBWywE)m_L z`Hwou$I0KS@yDFx-x1%Y@e@w+DU_jThsGawlAJFU-5%d9?R~;Yt|7lu^AAUoTz?wv z()f``axU?19sbcs@~4c?4vpU!na*tC@vBL8c%rY4_e;gcBFW#<<8H0!_DGT+prWtQ z_#KhtT_~Z^*J}K(Nb+(fY+B=YN0Q%WKzrhcrM}~l zy&6C2CVAXyw9gpoCeLJe8O^`RO}>@TO-2~rfcAf@o5Xi<5zT7; z?QW723!|6DZ;F_L_`Pnjobp5QV^aQpHz|+g9M=4Y+~i{N zM|5}(yUFvJF{7IQsGF=J|MK{IrT@oVbj^T|Y5qw!xsLpC?f-dq8joL%<~08WH_7@I zozVOj-Q;H(-~I8sq`t$^}uKC;P};X6q?iS0;yz$^8?7lqQAmF&Rx9;N&rYJ zy%YM&mLU6Q#>NjK7iU}s53vchoM?e&@U0}aUt!T1Tt6N=ps>V@r-&U?*pwM>L0c5N zf;A3@cF$M=|FJ6-cA9V>hAFYDW1NJ7U6mCj?^G zny~mL6MK^hs{{7Nu2b0b8Lwr?NB;o%$l{qZxMn_fz2f13@ZVBRlrf7%NtDY(V>es_ z!b~TA9*-KI^*5k9v-VQKtWJ1$XF*IvXKjY5CA0pOK?`>QNbwCx$j@{VV?*?}4}Z?A zSHYObEPkPIXEi}bbQVLyX=w+bHgRPugid!Jfp2HC!{B(0Du5#_(L~SwHsqbnbasF~ zJA*$*p1uAKqMwImXY-wKejazZ^B&0k2(CHrgJI5=qd-~K=6sP_wla>Jh|2eKiGB>| z-1VT>;PJlz;`5x&L{8K$SsbaYn1}N_tLNeT&Z{BR3ZYI2U8sa2If!nL?8m?2)4Xx; zFVXx7$%oJR{HAj&IA`?3aUUEABRb(o{ZLH>hro$NuY=b!WxZfL7VyFRMJ7rqU8g%U z8Hq73oeqM?&ad-j^j=jujXeb#3#>|~F-Dl*PZXB_8kd zou5%KqKxiEpk+G?8L>d7%M27_OBZ6g&_{V-=OUoi!J&&a7YU|Lw5;&O z6=8{r5Kru^!y%YFl=Ccgz~$L?R265bN0LW;D&jJaXdRMyPMC-&@Iv**%i`4%&Q$Ic zVM@9WqzGASA(J8;knRI1!ck2J@UAoA!f}WM6j#S%(#3WI41z)F+(|$c`A2BhNrCMI zO19gU-F_SB-c<#cBRUC;vQAF`d8>z;C!E`46AFSW#$PXwZmgFGICLSPtn~>(2kYs@P z+gedwwbT)(&wx1)mRC9csg(f{?!m3ko@93-j-}YO6<3QzaC=u2u0JP(4@&t1DNg|$ z^Kl~_f?%eqjOrkuKSx>zhq{!v?Y6h=w^6|w+>Y2zpuAn8Jg9%=t<(0_DZQy8gl)l< zHy^8nkUbyL3HNI{fOnyJqp<{2aI1<-7oXi=5U3)tgMez33|*UWqgD`5cYduemjc@f zj6kreQzsL{Xrucg(3m(l4tG#{gcC0B`ZJ6+inWFBKU&J(Bmra8QZJWT2CN?TZZ^uT#l=9etpPDB=JAWhZ#P zLK9>1&prHq{t(L0S&Tf~qU+*U^7uvn48m9P1WbR5)PGsg`|oz-X6Pf*%Q}V<=LPWa zRvg-h7R@?a5=~I=7>@8b01i52eje-N9`RZf{A4AMqqNSM#7l7AIg<#2Q(5xQnMAv* zLQ7+7be#2}0>zsv8)xBuRX8ih7uMigf)h){7Q1s(?xpM9(u>@K7pU03>+_{nqy4qvgTF}XAbDV z^#OBQ2*bPIanMFlqkWv(y;d(UHMJ_F-y4jn-*r6h4sc z!|{Z4jZF*>uh$|%#KrYPG9nj zFdQUfj%+a%~UnBUKKctDqPV+ z2TBF&!^=A+YG{0~Y9-M;vQ`wCN6M)vy+R+>C!a3rtfx``$TyUQ|H5ORP|;=O&TE!} z=Qq)Gd0=67IP`$Ulquc7spgzbLl2I$HV2ogqnUICP$~V&&wu61x_veh-$KpBx5^Fn zp*?RZX}B)haMW$Mo@erGni_8{ZJ0WB!{ohFr`rDb7D|6d5)IeJ8{QOaxUQt(Xtd#a zx8a7MKgcaLfdTR*e`9iH=&+#;$@;F+hUCn~$s7nU7vF#zlTnz_oGfokMqiP6yw>?T zft>YfS>W6dEh4)&FD>B}i$XdI7a%il7;~s=s_I_;9O3`}oDWrs@O?#I96zL+gTuU7 zmd%I?alBf{YX$!C>fv3FVvL!7Ikrt1-U-|sZL;;<0o;tt!0GAR2Dh#61xp`oG5R>q z(bhK~NFjZko?`1;x>DIg`)HTZ_pXq>W6)Otnz<;)>+QI0ebvx69W?6WXqM6US-5Fm zEpA@-17W*jF3ORALPJA;7{q_aClPZ|hSy`b?Qk0y42#2f?_>du|%m*5W19T!!}(5bSU_twwxxxQw@n?;qeceyHQpS!&djZeE7>A8_0H zcAcl%JH~?}tw!H;crboI7JmzUcDrbJoR4bjI}Cjdkf*+xxQ)I=A$|VgG$l}6t$GM*w<;?XI0cw=Axe#&>od#VbG(|TL0qQ^Pqf8%I7>0(+VmA_css9 zvnBB_?q?q4mr8vpPlPRne{t?Q%c_6bEd|q)HQc|rKe>ImGUa`W8=7hFhP1naCE34R zthQkI%s+LpB>9&sKV8`P93O$p#TfoQUtpMk#Q7P)T*Uhg z0!aMY5YBd(;jzsxL;ig@#Q%!sv;S0v{Q9BBQM`d8{ez=vW{=u%|J3WF=#IM{-Y{=y z_8YyX1>VMAVjLsb&-KF&c8>}v@yCZkzPv7zPcPh2LORsrE=5DRfe;nBoiL^HqI97U zdxkVei$vrenA;;22Jt@+WnXFBb8R~f$Dc5Tw z0MR51;w)Vec!F2Cr@{(NuhEcYhjJ|%UZmm08t&FGtKqPQS8Di14X@Xb&wlE=Rl~p2 z@E#5MEGPfl8uA%S{HGee&QZ8r91i;XG=5yehcrB);Zqu()Q}A;^-b3>rD3&(4H|N; zALaIFcv!=mG`wBI;~GAs;Ry|&((t5)a*rD5n}Y_MdgY!pfa^3a_n-lOiN>=U9@6l7 z4d1Qd|7Pz?0IRC5cF(!zPMNp~Hw?;jAqatxkc7x2U}gve2pJR=y<{SUA&E&Cov47~ zQ0K9tqNOdi4%mWKD-|tPv}$pv#kN}Kp>@DI;n4cNZ|`;PJ@+OK|9gLj_x^X_=G$wp zz1JSk-us-h*V?xT-Xr*k;B$g+34SU_%K%K5djBeY!6||jf+q-aYcRucCp_^y!CM6H z5qw1OEx`njq$BvE;Jbn!2>Q@5DVN*4hyw*j3g!zI3eFQ;B)Cja*?vU)O+sHHc!S`r zg37iE!tEFOS;1EYm2DO92Vh;n{0tGy5F8^oUhrtaX@c_w>jX~{tQX{_P0DQ(TrWud z0lZ8%&J+AD5fjAK!oNxA9}2xwXl2_4^0*hD;U5uvLc$#s`gx(>5c+MQKNk9PBGM0G zS|t_=o+#KTcry{{-A2UkPQl$oq<=pV{6~a-Lg<4+KQHtfLccHgvG}{Om|^@rM92#Y zJw)gcLXQ(VPv~QWE+j%$v*5XcHwpe&@I@lh`71HWFy0gVfQWSeE_@%REz-$Egzqo3 zvT+G|wD=z_c&zZ1O-sb97XMR-NasSKuO?!Nah)Ld{V<(dg#UB#e_3c{qY~-$g$(B7 zD8UJWwSubzZxH;s;B$f)K2`hTHdV+~58IpbJrSZ64i+3Km?@YmSRgn}uu!l{uvYLS z!LVSf;7Y-6!L@>C32qd;Qt(>AZGzhceLWo=*+vGfbnt+DW+9(@pNTXMMV1eKa!D2y}_fg^J3Mv~$h`(6q7Qy9$s|1x5AB5W=G|!!4y4+k%q}?Cl4T3id z-YTf(WAJ}2^e+UtC7bb{6#RqW3xaP5{#Ecp!NY=H&ZCH*C>Rt}c81_TQs_)U?($~% zBEbqlWn&Kh%Elb<1o7uKaE4zY$TJ{FuNB-NNIe7kbDuczYQY-?zc2U`!8-)Gk(}Wl z6ns?h3BhLt{~)N=4;VY%Ar1UUP^~9Go1E`~9>EmBG{GYThX``>H^b)%P8OUdSS~nQ zaDiZ*;3C1rg3AQk1bOBg<*W4yP}#5sQiX~BR39WNo7O;XDkr^D@NPlwPp3asM~M3c ze=GR3Ah)5D|GMBig6|7{F8HOO7xym1Ckmzs_7fZ|7!n*Um?fAmI8l(B);W(<2rdw; z6Fgav>OlW!05%G9&+(9uEB8cioYW@JB;v+n!FcnYD zBZ#Nw5nx}YhhGs9;a3w8{+C4XRXjWb+w)H)<$zZ63Bqp@dW*>4DfBKP;*Zap9CBU} z-QuHrw|SN~A-^D3MOd8pO*YRC4M!sA;spva@s1K_U+s1)E!>jUjK$WO8K;(<*?4N| z9^?LnciNncr6u(l>#Ws{>q=I`H0&N1v~!^|I}3kt*`Xe6En2qeO|Nmu;mpv8PFF@_ zXX>8Noh9pCS=NCh#9%Bt>=kb&8^sO3s?S)z;c#XyWg7R_G`Dp%=g(}f%&uCsqN_Pn zJhL{xpt80)FE3Quys|x1UEfsS87k(to=|2{XA{2fwU1Hd!27AI+srq&pK6-e^^a-5 z{5{tiisv?ej)pcjU=ifUFaCml?%VLQ7UPf0*3a$76{O440I)uwJFAv#m+t}$8P>gY zAG?Hq-JbiAnx(AP6{&gO?c>p-F2Cmm^8G#}lo^^j!uK8I#a*OB4)(o`F77VYRLHlS z@k%r`(#PrAU8>_{`jnnzndXgy4De=YD%V#*nH8EU@QtFB*_xW{;|_ASQrU84C_`<{ zU|Z-_P=8emAh&Nf?=#cS<-gy}ML+_dh!d3rlq=~uP*6N1-PfiE7zq!9R-U76PgB#A zY}&2qnKtdx^zk-5Ow*j_RU!dRud!*rk?i&y@4FUs$`<69{akv+%y zsNx-1ivoBGl^bmtn9mqd73IJ(#)_&a2Y!q8^h8yZ0~axTsgIhxR8bBb#qec5K3!TF z+swc<5iK-|E_?YRLE&Th;z-y>>PgF%Y za2NTN!ry16;?uI>iK-|EZfEhLD$0Q_(oq%VfQ#jcswfBcQr-ez7+_@_Gy_zf^F&pY z1AOfEL{*dne?*V=)JpnWT!EJz=5Ja^M-pU+mkc#7mlmjc6v8al2;05xV z?2KB0TUhZ?73Bb*&plBUFRZ`=EbnUHPn5h3?!XP?ukr0v^fq@Y zRg^tzeSG}^6=P3;Ha|S;eD^DQuO}7TJq*u!-y@pu4eTQSG~W}N?+r{~{!aHD)O??j zkO!BCcYVS!ba8y}3?Mn1BwcFUV9!+deS(qDL=NxRgf_Y+*;hvM_&gy~0#7pV1w!@-TmPuKq>0V_o7O`m62fdoywG7 zRyxcBO&*(LPG_=_Z!=~#D*cF#?oKf141srKJCZezoxtX(8U(lT7}iPXD{N}N`w0jb zY|E!e@l*KSB81yFmhM_#_ThCCH&RnMRIK23R zNvDKFZh&V3(+in=fHqGud3Fmg<_EgFrr-S_!>|_&G#_Sy4akySf4>Mc`66q`4;6z> z16*CQrk*8Z4hNgOvCNf`GL1zfzV$FyP||0}wz-nd8Sv9(YG;`)0y!)l4i#RNX&qCz z9sYy3x>vP_GVwH*1g126AAJ3P@ok2OXw8nGQP%{~noTrO@E?Jx#t0llTZiz8hpgQy zd;;I3Wwfv@$FK^-@astPZV>LXO;x)8VX#}JiB}gVqjSXTrBZKIly9|OYKGH;SsNKEY#OAf3*8x`${Fer zho8sb=G_yy(93XFR1wHF4L-j_E{r59Hj$rd8Joykol>0_dLAVa7zC0CgS9V#k$UQx z=}hI{NYqK>-WW|HpToDhP)7Bfj3mTIfwO!}#J^*IV&E+hX&qE0V2Qa}z9nJP-8fYVfP{84Wph|y7-waLqF zO_q)q#X2w6E3a=8UcJXLI?>wyUrVhrtllj&g-hEzI#x7yhF7#UjQ0(? zBC$hhSA_Jre1CX_K>=?x_#^_!Pd25_u~WqAI)$`isBN@c??p0*t>%}SjRrP?8i zW$KPv(Okc}xhdSa*61l~0q&^IRgK-@70qoe&{fhE$D^agoU5`OT|B>TUa3=O493l4 zyALb5hedYLCyUV_qh?cGO+`t#WLCIhUTs-*bzN0$c;5WdvT)UWV@IbqS_+(7F8PYnrQ3?=tK1wLfYEuyL2~-Nx23l-JwiTRo~f-4jik4 z)|-L&#ujHCpfjJY?-O-neDl3X=ke#{J9QnSfPHU@+=GDxts0|m_m6w-6bDHTuIhX%pJvCP!jSG2#qLZa;rBkt?z^orC7-9M@QK%qr9_zWpngy`|2YGmbQ0xhd4&}s*p&r?Mr&jMLhDM z$IPeH6HA*{w>CD1E83Q{qZlQ#N@}a4Cq-xtNi{9Vu)QD`!+^M!k0h zHHhlFutyd0%!n9mzHc5nQ0Zt0wIb?u(pLj-^GYh=wRN?3b{X+UX?$}M;mGJzGpnM! z7E@Av_bLclu|n5zxVsh2hSVF;9>+n!@87HD7ptDw+v2s?hT%XiU7GW2Wbd?A>Wk?& zb1)8ni)yo{$A9?|80x)(QwNZ*0ql#D; zU;%#4OFgB*V>o^cho?t%#fKx0*J%9M7r!Z7F2cm8>+GX^1<8y3k?$DoYbQD{<&VIR zVfZ7x06(X^O3)$v?8}xn7amS|cRS><4s3aya69F#0L^sl%a%tS0H?gY4tWf3%exG2 zr@U^^&imVzcTt?Y{SJAF4tcxd00uN`p2Oa5B%g9cbdrv9XzWgBm$b!mc^E_}k<-G`b z?6m9${32+};~|K49Ex}a`>*)=!@g|Z==gBhU-f{^L}1&=k6tn9qT{{@Kc>ra+v)P0 z3Of$d+KxgN(jk}4%ZI}$Z!apG_X6c{{I}&*#L0UV@)*v(Y6#`Kn?&T##Q^{%IQ zmV`qTb!|boD{KO2XO(+~o%OdA`LoNbzc}do^g@Kg7}Q~l7#xb#6=R-wvG3Sp73rD~ z^mS||XxmA2;b&i$V4zzJj|_Mqt15q}Qk6HSyhCH4FJMOk+VUJ;%IWm~@6c1UzXRxW z?Ap^5^%7(G_ULc({c(K1(w&M*agKznzr?ukj*bA4)I*F-k0Vd?;u$)znt%Mz61}LG z7|Z7f61}WAtw_tj7eL4LZS)i!!I59~^yo!BM5fR7)tCKsMN?MfYl}^Dr%Uv*jF5a7 z)Au;_7}0Gb7v;{zk9~lWsdrc}G;5lAhHHf8oIyRqON8by*cbJC3y>Gbq%`VrV$Iz1 z-SEh6LmxeacYHmTU|+Gy)=%3#)??Z`eif#Dds%xqrNpebdS6zl`zbM`*Cj;uJ?`Np zl4d!Hyj-Y2_FxyrAoeWospWl5gqK3LpVBEIg5X?9exBeA!7@R%2l>YfE)r}NikWLdECYUXFj3DO=hU556Y!>Vi z{Epzog4YZFMDQNLM+JW?_$R?v1iynZkMen(1#!FJ&jf!Z__W|Ff*%N47#tZ-=@bAn zgq|Q+BFJs24A&^QQSfrX?+gA+@K=IQ3%(-wfgtztQQly|ae``3KKv_%R(tP3uMqll z!3zbq3f?MspWtJHe-eCK@C(6Yd>c{e3yu?xHQ53f+GYo1#<)o1i8D2^0`%)sLo{vHVfS?xJB?H!7Bv6 zC%8>e>G~o5Z9+dN_@v;Ag6|1(qZ!jp!N91>DaftRq^Am22rd*{DyYtRN4SkbpC@>U zpgQ**{9Qu-O7JPcmj&MwR62dA`_D)N|3SoL*Ed1q03zg#B!aJW_&}GFMpC5&n6f+v)Hml=)_X{Bq+pidctJJ(qh5f;S2NK=3xfI|c6%RPzMnt9b(Wr1-x`L?K@ld|U94AQuzly9JX3 zc{CRNm2Mx}f%Z$-9%BV_1i9ml{oDdOmRDS`U1woW|IT7jJMnt?{5)uA)M1)iFAVkSSc$FW} z1(b()RYcIWM8sb#bQ2MBP8WIu5%TIAPYr9sZ8%IY6bgN#&QD(6q=^U@3VpNA&sM!m zjp+OwiS0~Q`QBv<@66q`sC7u|AGf$aH$U`z?kc{v`0r2U-j`b1F%#$i74113TD<4* zz`c784}LM>`iJVfht9fx*N|6JlRvjUF$?;9?)$_T<@?UZuc*Eh`4d*nJH=I-N?HF`$!OzaW^XlSZ2b0Q^KX-p<9X6Mn6Xtag z`+V;H+t3bIeQEukHxGTso$(;zx*8BWm$WD2*A2g3?2XV?98GDE@PQ@qy(5ea#0^;u z9W#$c-D63D%WdvJ+nICVyq3Kz?t&iBE_hkT;7>#k=oq%P%d-Mt-Nhbi>jC`$GObV1 z?h!p8-XPWk3}fp7oyw(<-}6HX^!uI#MD>6y#!o;$5j~*gj6J-98JNJtv>wn;kbu?$ zvc@p_GgsiR$MhWiDbUMX&G1fu5Yx;3v@UN3%4K;ML4ez^E=3ZaW1d17pWics?+^St z5Xw`iGL&KXsZQuA(v-`uwy_s$%I&|KkxMj%6PtMYrKgl*3{s!F5$J_nq&pty@>0RT z@*WH6Ztn>U>P?1^*E@Fg`E7BaZY?#QEq<) z^L3J@{Qk312cAVbWU`;85~zym>-DW~T8N z0q=aF5146}BV*nwp`S6+s3z=P;PauF)K^Ng$gdXu23Oh?rdK2MCRZAp&08z!Z*isV zMJMpq34Ng}$Y!CwQd)q5Px5iePJN}cUsKQ`5wy*f_9+FOEcA9)+Kr@75qgI!Z6zx< zEcC6eH0mvT7yGi5yq&JJCRSX%@Hbd#)r{XD^d>89HN!Uwy~Rr7S(V-)^Ft+caP@omE2Yo+xezg^PXXQd^Q-y!_{R@xEd zpQ^MFt&GPIp6PcA|B#h7lKd`-|Dn~F`byqz;UBir#*@EF_+MCQSF^mUeKjgS8{BDB z`Sh;wEmZV2cVFr&dDr?HG~biP;mEtr*P`gXp1#yq@~-!ts`=hDj+EZhe5*Czn>Ld9 zJKeWI^L<9jb0|;(@A?!z_9bw9NVuOQ&;L^{b)U0ms{1^_NJ)k};S;b^_ym~1zNo^m zQ>ZXOBPExdLHLuxr#}@YrIaoudmddJN)o=uq)sNu;Va=wlGJfiE=`_hlPNR?qx{le zML6#nYP5mAQZ_nGdOgJX#+m0MOrraG{Dr=fT1oodyHKh9%tGYY9A$Fot*O$&=yg-^rNAkb4HnOC#j< zB=^GKRJyl&KpxTFu*@)LFbl2@V<69YG>>IE&x1MeyZB=klKcWLSnOc6o7?EtufU)# z^AR(v>S7z~!mKg|Z3Y`!C>9n!rkTKJjltAovb9i>Zh@4ez*H@78H2cbg%*m^FELa4 zfnz|M;ix{rB&*M$KL53&&YUNRd2J02pHqXwAFFbbpbtk&v^7tXY?YH_TjeB0>!S2= zYMwasOE5_}HBX>h;?z9p8>@MO1JATZO1e|?q~F)*ee{pj`*0q3hKEudcxLNx@RTzi zdS+{yfP17Y6048+0O?I(t`8-Jr0?kEFl4FnEp zIHHFT!moGz44ml2IoJ*mJ?06X>P0@!{$U8dtVUpZ+ZPjIzKFbS;2vo6h@JQ$3gLA8 zTt-JSkwN1moua&I2olmwJX3oUF2oN4+{BBtH({%I6K~Mogj>a%$Q3=RfpDLA10omG zaT%AYbT$9d2#*fotNaL`<&9jz_Y;NBc8XlWkCYr~B}bTWjKhz0Ok{jhy@rNEe}`*O zUbO^D8f#qYzrvOH<(Efhcx_kS;HWD%JCjG5O&Ep4%ou*Bj!vNP|4MWOSC`HpozZfK z6i3UXGp0nKL-fSOGgb=?+C}C3s}k<1VDUd**`;Td{Kx5>I9^D7D_s-l zoisHs(TXOHxJwNzXs}aH4lTkA=}5LH$QsSVeb(d; z8}2e4Y9rIk94n#QS|758&bAtItf3*RIma3lvYK+N5jj>%&JdnW)DjwR_0Jh@)rZCp zAD(Fq2w4dsiu3ZX%L@vD2Tf?mA3V%jG;R3s;Y0GRt{jbh1PA1dKL!C~v{<&8W^nkh z@yf4$1vZ9h-H`U>U#Ek@ZP3^O+tS&-sv`{T?Jn8c8r3$z?#kGE86)L*N0m2#rR<_kS?CB$pl?tuk=?*u%UiicdlfeS{%5I+h!UZ@i=MU_7}w1ce_uef2ip#IDcg@pQ*UC0G?a93ipvLpv}gtm6=eg6pzlz02QAxvCC~CvD+|Y*;l{$g^h#qvaUHgw z+dJ~}BCh<1>;G(D|JR)egiY@(hpKzo#4jB_e{Hy;zO4xgOaFVD^YK3H|K($X(AApO zwbid|ZHzXxC>liTl*j$BI@NvtwF(FNKGZit32tcJL+a7NI-5^j)!He;ibJC>My)`O zx2kV!#3@~2%ni%!GtbzJ&Rb+jeJg}=1CI20Iob<%qTc*(I0j@<43I$qnjPxC?Gmj3 z-t*KH=;EJ$vyOn{_Uxgus8wsETj#~qhZ>R4nCqK6+tGd)xuC?cqFDx0$2jVUuWpO@ z8(dES_UIa0b3I4zf4vHUdUA5=5Dey;N3IaCRPXKIY|efNY65-KH%yz)r?28Z0}D5K z3paZT&v6%?YZY#BX?+9d6B*q_6Y=MttQSBorqU%e4A=t zHji(Oo$^w%3?l?T%47YoURaLb;%CQ!(>NdULUhPw^L_)`DK8iDm@efZN<`jEaNBX< zG=2=`XLchvc+bP_l(!i2D2u;T{OtVkTMp&fW!#QenGdib7E7Ey>nbCOK}?X=S1w(kwH*B~7C z$k>aqDoyxCEX@z@M*1nLpMK^X8N{4gItpe)dHk-_g+UvSM0oW^8{xImI=-lRC|^Yf059wf^CAQ37#!@o}k*Z zjCfmx{*mBM1=U_O@b?S-N5Pi_-w@#N0+Y99$El7Ktq)!rDE_j+CjS7>0ouIOF4*C~D|3>hSf`1kKTrdf@ zIpb#us$EN<=Lmh0;Bvv!1TPT0PH>mtKEY=MUlsgN(2Ze(>7@&f6f6)d6|5C(66_Y- zBzT43cEMeO`vjj6d{yv6K{swFmA>Fe!2-cr!6w0O!7BuJ3GNfT0K*#Pai0?L2Em^S z-Xo~aB?13Y(#Xpbf=>}s4C7A{?scL6D)eDN+6rel9}#lWgdQsN7$U-E3+4&`7~#(n ztQP;{g{~KRiO?NF(~vXMIZNnGLeu^w^KrS**9*N<=zE1$=bs?{BSIe#{_lyH@ct-B zv(rpR?U4p1fJb_iAclpQJ(_A9ME!A`XFYO_LBtfSP>p|}bA{&oP5v>0#e(I63kB6U zh;WTUw+Ql+KjWVvxLHt*hw#6KH0oWAhrsPZ?-0CO@IJv`2|g^yH5=nUE%>tF>w;>W z1pj@ZKNbADAotZVK6N6ATr(5X1=TnTdYI7EX(T^OFkg_miS$={dVy+BFHr6217|PQ^nwt|b^= zo!fx$YWxIWoeO32u>`UEZvn%Do-FcIe+0c)x`_o4wfzy`Av_Ppm8tJQR2$@X%Fn zTE=Glu6{FMkP}kp4_I@I5l1fG^@b{f`~mm=$;dlHdCCKi2lizx%~))NCgZ$-ggbpW zQGncjivQ<#VDQH6{Ftkn!_jIz#LzWR3MHZ%UZdZ`Nc=XX-po7at6Y}Z(>skzyEIPXTuifJYyYISls^L$VFt8d(0{_-2TEjDb*Dbi*Atb};S2gU{rNroHGrWj)AGO0gg zK7+yFOH8Com1p!1cCn>kagY7JM{!7UyNfY;V1qdiUa>yL@ZuU$h0xdt{PVs5muHRz z2JIcYvRcV-`F@1K$GU{Ek5$Wfx99tKLa_eG@I~Kc7`N|H%(2*D{x+Vvu)+Kuj%aQV zKQ39+zOnk1A(*v-e} zxmnWX9glP^FO`t6v-}Szvgeo=5r#XFp{JBj?c7;@DO0DBThsdy7%uOabf)`L6vyr5^4sG*7J2h}y{HWA zEdQLz)}4Y_+*$rt=A@4DPk2;v@;a##f2Sz7|5C*AoTMqg|12iGNQX@J=OI z@-fWODO)KSJIl{N(*6*O-M|WB8K*<0r-_B<&hlK$Ii6-_fIG{NBCkcu3i&IU@1>d= z>EA&qtrW^?JL<+;peeV11{%RTNmG9R&(T2M$!cAN>^7sJy;C$V z)&D1koTjOC{|;23cREvbWeoH$Kz6+|G%&TcN1}|KkifTT_$$+04rvO-(bbooGMr+{;;a zZr=mQS+W~<)NoWtqWcciN6O9k(}%(L!4bF?e|(yL#-_2$o-LsQ@pLE^$ka4Xg;F$L zTTn;>>Qm8fO>EtBpn`oT_?Tg%?_LZ0pZVYrq&m^N25At%SENE&*p(kFL{wj~(3{L4 z5ApMr2))G&PU4+Z>dS;E?#d6oMt+$uU(wslU=jJ{zDbJSVFpXdpDFQon!!2b&r&($ zuKeKRq$`Afw;8M>JzMzqnZXgbqkVIPzt;?g$*&atJ~N%W@_loKzuyc#%Jk+5{g@ft zM0&o^2h8C0j9(@6GiI=r^a9@kmEVJAkP5TDYT<8i1^eSp#a3>|Hi(%WYR&&ELL>k$5a zD|jaPr~3F%%3b+ES{m_n3jdH5JdgY?iT|OM&RzMwZs8xcf>)5gO88$`LGE+M9(q39 z;zn=>ZzO+>?`B1BbEk7xzHhDXR?YVWe@y;5-<^uy>q+OXeBXNCFErm9+)e&zzP+07 z4US?*Ior?mupTO}W;W_+CnMRT>H4d<6s&N3j@{c2@2!B!*)5Rf0 zh2fLC3WHtw>&arB9y@;HW8-%F})Ii{4es4uIkb!E7Ne1GA4MY#UpU99L=g-i}! z!MLvpnHqeA&HTEM>B0SM)i*@cKs|W9={p;Vx-td_X{p@zmb4+(T&gn2RFyH%NZ}Ev z3Cv>uV<_k^z88^~0egKP`{rPBNUxZOHv2>pGtx`umKeUnLb`)5a_IO}()I_RWrKbu z+~nXJ6!^K2sp++d`h`&G=~XotmHsZ|!1U6JS_5aHa9C!xPiGB$DcleOBd+1sbNtBk z@+y#~keR_2meD2Txb!OYLd&lu<$^*1+`=qKXBYJdb22C}y~3QP>(1wA!Ce`J!ST$$ zU$`CVCC3@Q1hpD+WpwLNKG7dWSd4mRa5_iDBqf<=MFn|;pD$TO#?5Y~*D$FRp?82j z9&{g}ZzYYK1%$>dpk|3wk%w7e3tK%+Xv_i^k?t$>eWsC8g`6ZLpej;Mq>GbpN)ugU z;Mad0vlH}RgN7cs1?6)2cc_I(i&`3f2Y+4O>+sj@EyZN$_jX_nvBBj%pMVAGLqPw7 z>iAgGMKzlKqcB(|j5D7>Z%K6Di*!m*-U~*-Y=;ni& z^%Q)P?zj*+v5v-VkhH565s&y3w3)Qq9E(hNZvDU!|=p8$QfVth|J zUwpjq!7?Oiy(Gq}6aNcyhg8$+@n(4Vx{wI1Al%qk^pM$;u-tR=VyW289p z1m^8h@fk=To*k8RnfRpBhmR&nmunw0NS~*;u)R`zkbk$)KNYL~q^neBk}gH1q$YPg zhot?-A?f5*Pogl$fS*PWl2?;~Nd7m0$!lIvl;2;3`b}Q@mZFmV`J~pd54bW?j1+dR zlvlt@bbm-Eo7HMY8I#wa1K)x3(Fe_xg?+i=d==jKq{G&R<_9V*WznY$^ANISrqoYl zn0FxF@ctE@4q>R*n9?)^{z<$?GgG?zg5m!$B&4in(=zMZ(XJ_LbV1yHKclSGl;1xa zxk*{4sbv56AtU89ig0D5`hDb`K15OJe(E8mobjwG)@ zlf8>klvK!O1r4wQS>{fJ4w?`W$Tn}$wHBmWS0G17Gk6H?9~dvBOMRa;0=eco#O!}L zK-c8aJ#&N!1u!pCWZ^|lkkDXs}qr*z$$Y;A`D2! zVP|(Dm%*hdXW%UJ76eE01=ErLz(!NIraQO`MGtHi(jQ#MT%RlXN)CPxEgv{f$dq6b zk`G)UWS`(H+%tiTg$x9Dki1mL)ZlNK(B(p=1#@v<1g;daZ_vwhZ&qdF=~VrvvCuy> zX*damzTbQf4sR_28Qv@K*Yy4j1w};-W)UAY_kcYhIdH(_V`-3&aDk_!5JvEL*7dWI zB0i6X4Lm0)`-2lH;YF1IPp9htE2jLi`5Gk-4or0Yo)S+-*9}ZoZdTeDmSw8C&vCy7 zKcKb7veh*S1S$*4&uAC#ZWPn--iw}qV++jGlHv4Rs%mgL5;48$ zD3i-O5iM-ty$d_-EJjRp^Xp*9>}H_1%w3RTE`k5>*HPoCUsp3}Lm^vs8ZocPu0smB`T8p>UiCN7g7f+Td7% z)W(@rOu@(+2hX$NxlVhUxyIN^cwNN^o8Y(uj$0M4+DbH1$C(Rw!j=-?T4RiJo#8eM zjIlSs=QV`P-VVn<;DCHrH{6MCR(_6o9pzOXDeTV^%)1Z=r{+bHVkVZ*FNCHo zP&dMKHDjCu&w_{9V$&7xN1*wTr#de??guD6npTUYDFt&@RP0s++)uyvBVuPMu>(=h z1qaxgvlNdHj|H@-1ez_=4EktQ#7Z?JyDn{-$Rx}va~x{$9I&%6pQ>E!fNU1>(k5dp zc*aUr1HVkE`Uu&MOgK&>YbqS9A$4!5CRhlc&15yep*mEe`vs&n$$T1#m}{d2dK&@m zK;q_gNI=)qT2&yPC|=N)Ib5qIibJ3$Bd~Ec0!~!p-6qB8gF;VK!^3ygu*etWQ`mcu zz7fLDJjeXW0JJK*jQ4NH!f8xpKXQLyR^50EL#R%)81W**$=DI_R-MS0%v7f^Q5rBa zcc?_Wm}onz_ZCHSYMoq#fbT;5M1Hw5?@&wsUxQ&}abe1F$b=ZwteIzI-3+hGk;Q)6 zi{nYw?eM!5e&dzj0@qsA4C|1uUEuth1sa==KdO$W!toZovhIU}!cP(5`9{`0cu~+= z5rnY}?YRcg_k+Vm)3?b7aAl(^RD5PEmy1gDMl+97gB}d0-HKZ>?JvH2Aq*AVEUgiDx{Z8=e=!CUxrpqJ%P`( zra5CdD|O88C`l)$9@NL7JjY&(j{c=(%=kG6lbk`UKOLmd9E%~b-vg>=n}z1h7|OgG zR6~H;2=U&t&7};V=;rI}BJ+Cu?O$e^tfyk$lJL6^DW{%gn(Vs8oQ#b^ljqI%FEqF7 zxIYG@aEvWcBI65U}kAq&f`-ILrdzHgFmYfJp$S!GQEwg8}_)g8}`W z1_NRbo{T-W@`wnjj-@;@Dn2PGB`G;+G8%9YrQ)GFnidWsjg(Hs8|pmha@Z&|QOIdc zpduJjr(_O~nkT?QGHOHsYsj3hI*D>*te_af1V`!9Ft035&O-)A^%ByH(=2JiV01KP znm)*krtLxr$2drE$3_p?%z_i%?x5$1^;$!Ui!5OJ`>z&J-su1P}rL#Vv?J>jY!F(L6x-`bQ!q_(Dx6-0W zrjkY{Pg5;}>6E>z#L1}$YF=r?Q&oocEOUyb&~j%e9cE_43+YfAdL%E5jri%aNKrbv z(}|cu49hrU3+GQc1N4k^jx=}M3}EEqNDAW>1oC@Ytk3}#*a6~>;N`{GTo_hWP$Cw_WHZ(f?ZjVoh46O-e&7b=!44a1RpcwPfj-Xs5t8xinGNO@0SGK(&j8Na=DGmgkO3o? zqqfQJDZo+N4B+Tsl!JMO>EmzYa;C_q6r>na=Z+M~{@N5f5dbL??69%5>`aU`6kj|? z&Gue_j^fz?zB&a;V{wQZv^zvRTf0+Tx_Sx2zL z#%4~3ttQw3qCJauF`p37K7@J7c^vbomRSX&zwsgWAfw5#18Q};_mkXD z#tiyoQsizw9W3@k){1?p@D3jixV-ET{WYn^13Ht1w&V2`nzDJ>e6}(#7R0_dOlRVk zgWrDq9>p)7KLUOu@nc)q7YoWNW6_=AJ3uoXyTag%Tz3BKa{M#PH3JV?E~5>1=>Ip1 z^FPKcP7Tjq{r4Vp{6F3fPbmybji1@vrq1?k8ecNErlKZXT2u9}GL00M{>;kx#W=&Z zq@=Fk-;{&ein%!Zv}Ee|x~}HVuJOxTVVwXL6ULXeH?CUQ+}7PSp4-<~z?@ds_}bZZ z;rh-dsM)vk6!ma^UT$7~UN~?3k~NA~e!SSJsmY(&>#^(q`BsqrMHNw8Q#HN@heI~! z&up($LxLR0t#kz%F;#!#QQu!@eu)NV)VVG>>P+saH6~0ru*Osn?rK~G7G^w$Z6;8# ztcF8;yO)B835vYN##IG6WXp>72AmZv9$2>1q(mopSQas)903j~TI)d{Esh6RP2#v| zp7W0I@N(FI!tCGUv~lFJcNve}&9(!L_x(A5F2KD{216MH!M zjJVUrA2P5J!G#x{wuPz34AX)Ys5P_XnfSQN*fVY$QRSjjor z({r;j5a{E<`H#<-0VS2FjO$FZUyRW0rb&5gVmx=7X8%m9JEwTl(8`#j&i8{cdN@p3 zjfe^VoM|4J7vu95#Af6k8{_ve{6@|=dPW}pvJ$6NjUPX3#JJ(ZhmRjNe)#z85pzZinLlX!umWpI zjwCk28W@TZf7oT_4avwYwDuYy>nCSU%eAhBxvn?P3;{#d)Q~l2TJF%JCe&qQWz5X5 z`h*Izj+&A;@)sKmPOh|0o;_nOEqE=Pb~H5EOtZAJ6-Tv)kHes)k6&+828x>O^VrcR z8hIppueP4Vlnc)jttqMF@Qd?SD`w6tt5!qt1f!$As|)gR1o-Oa6}Fw0Ze?A9XqR$y{8a0YNdbhg1slHPmx?O~@bK9F}j_g~UwHi6I zyGR>Y(t>6o)fJS0gP~~F$@t16h2xGM)^|3>30O^QZc~=i430M8t`$5eSSp4G3Txw1 z%Ki?l-RM(rncw)PF=7l`!Ges_%+$)pE*RtLM(0r);Y?jy$#EQ%43l3y%xvl53`f<* z9=aT+#VBP&NC!~oXX!qQe#$-?-=@0ve4Cm!)Fd6QsV%C-dE+&8B_(CBfm2jdHLq00 zL)MBm*o8xaV~^V9(eS+-J&rcRMnrX1denMUH0!#ym5H>~Fh^A1fF{)^^>!Iet=&s; z>*@CDXzpxnZ!%)-eSPI&VbKJ1geB^fcbOtsWy(9Yyxj)Ib(}TNL+WE&eud71*gA?W z_E(<*-n}+l593~KZS{_HV@HpORWAcuIcsc-YduW_b-=bM{CFi6!Y*=g@+Zj-u}LBW_?QR+AxJI;U+54Se7 z=|5fXs_W^~wbjYBy3!$Ib#`hvFOr@P}<9&zU!Pn=8nXg61;{+Oc51Us^wB)W4VWdDHLW z8d~8pw4FN4HZ|X7f+(u2EvueaR9hCdkL8|OQCe9d{hUK+Z1wbN=Tg_Dtc#<~qdS&C zfiMRaGth>+RNFSRz&avZwtKBqG)yQKl@?WpYs+eC!>Hvldnl9Mu7)x$fN_E~W+04t z&Qs>a6dyO&c&C_is<{-nt#hq70yPMr-a$J4vomvk@b zfLCM3s_9rs^FZ&F1q=duNyqAf?5>XNro4&p>0XM}L@2u@55J~0^_@$y^F!J5@x#Nz z^p>_&Q>KKnmn>P;rl!Gcj0~I(u{K=7c5%{}8@uXTnzL6lx3zRHot|so;t>mksF9BL zH5dVK!!{MKjCN+dQgYs_s>?>!FIfGzHR{2=yR)^W1tL~uP&Nfrj}-~v8Su# zYb0|F2*(^6zZ{3g>)xy9Gh_&o_3QMS1DZ>AXKq~4-eu2_s`o`EGi^8(OFD-w%NUDx$_k?zzMR8kZAne7QBhJ! zYj;tjtH|oNx$z>SLUCO=YTAg;xV{aF>T2gl*1hU>Q2C0rbJ~O%uCuj6t&^g|8f)4f zvGF9vnNKa%WRlUhP#dQUKFB$&ZmJu8Nh?PA=-jD>#;9z)%)pF_KzdrH)loZZdXBK5** zk^RDIQRIcyqR0!YMPK#8YSEH4idTO8qH6W@^A#_w7S(j)X$G&ndYI_#)wU>#Qe!VK z0f*N{C6XyS1%_=6rSCt4E}n%E+wt;Ivr3s=FQc5Db^ZZ!-$oi;lQ;BcBY4s>}FHR9-QYkEy&n_$Y`6etU7K z%_BS3bZ9W)Df7p;QA;YT8CkVgY-F8%dA4yp!s6as(%M2B-;O5_d*-y)B2BBhVdixm zmZLHWszC$UQuGJARB<)YZOr5|rLiCvy@mrd z9u6>#cXe~nX~kMZjruKNved&5dM>83l^ry`+Qh<3uVw|>4XU1&qSL2dAo1Z?O%u_l zR1WBBd{Vb{%#(UtHotoDpk97pCAgL=GPVAQto)cIHEF8}!?|8jLF~0gTk{&-+v1*@ zq79a-O|3ME3Nog;^+4&dBWYNmHPL4XK;BD1$^Qt&j#oR1d^_11Bt{CZWoQuO)$BC_X zJxJQEE02k>cLSbVOECb}oG=f=s&mZjVM6?CZ2RfC3~zr*i)xGT{8Ciedk+co@w>XR ztOzxS@~J|tY+PwSKj?QWkyhtu=vV}l&n-C~k<^?Yo1p#r!XdqvmpEl}>lU(%P3^1r zu%bn%3}bMst(aFgAMcCQWUW8*Xfx*O30{Ua`yt*roY?O>dOQas_o`P)&*LQB+X6{f zL!ROIVi3mUfVYAe_m-f+WpNdrgJ#8?S*zElm{Ro>Y^-G%2^h3C=$ba9_8W<_FQpY$T`V2O`E*b$#w zH;VeC7H)JGZn6qDE9=otKGQ0V<2&Wi?WCFCf%w@Mw|*4$@fU6qyVOqErz>7;+RnI? z%eWgQZl*01xK-kAau;s43eRDPqCTNBQRdX5q*;AZonhZb*kXKJ*obWS3O9QT&+!zV z>n_}46`rRg7fnQff3j_CyaCY0t)rt^>?;gI*|$~(vZFzITfplHxT{Ba=S#$RSuxM5 z@l1}aGOMd6u-^EN7j#B^IU*BrJVQ@6_V<|{8D_dYpK^Kxi>?l3dDUC~Vy2X@4A86W zuUdKMbhdMN$cb$xylKj5=<3SR335fFg*G)etZLCuusPaY-_U?J7)~xu0C18xFLAI@Pio%g*0*pq%nXE{>L$n`do#_rdLy_XTL@_-V^yo}Kc>Eso0L7;DS>6WmUD zv`xvnw=Y}XL3lXj6)cX*!>9O&JeJQXuMh;&voBj-8vLE%Dnazt4+`SK)q+m9g#m4O zx$t-9Z`xw0;(*Wg;Cy74_oO&^OF^FwzJ1y9j*pX9xma&eq&%i?%R4V_P0=aN>XDzB~kCD`@+&^LK5Wywex!v*{_1{lS*^^Ei1lJ$J|!2DIy( zHkO_B_t;|CLkFMoxINRBM@3cqm+hj4u>m){ohNul+|&uAY$=kJBZ_}l`4E$_)G%jbyp%~8?oM}LZTsCi3 zoV<~13}Z2vly?+ zw3fcs&iQud1>AvfHzKZm*;ybuyp6+D89_f_`MH#2x~cfF?vQTeI((90Jm~PSPirFg%|imY=Tj(;X4voROIS z{&C?QHwNNZ7@=e34OH^3h{)pz9=$A#z_H7~n)XmEXDU*vBQK6_qY z+;2AsJxx(oA&tq4bhhZu`I`Tg|B;C z@a;bd>V%wc6Y$nweY5(CxBu{N#!KC1?xBcz4%d?S{I1@!@sou5@T()lzjpYVH?xS) z%QqJ-Ugr!C>S6Vb`71wN=+H4QLRcrxEh9Qee7>T-&X*u|T!wahbZ`W=KTkxx;@*cu z8NIv(q5QA?4yF*6auIF>LSKe1Bid0J1B z;g-;UJ~q<>DR(Uq@>D$Ji>or`k86v>YW-ZBi1>p^14k0^f`#i_%0rSWy;>svoI->r z*DaK*@&VOEB@gB0tj+ulB_e-0LMwSE!g2~}gzF??J-vZ=oMCJt9*^@{h*&@Wn7ByS zOXA6Tj%K{Q;=hlGe7*>DAyaP>ksmD2VR&8Fmn)a!E@)ss!6S&s6r0e62Z(Xvk4G65 zZmJ-fM$zShNJ`PnKjno5R|uXec&6Y+!Ak_M7G(JtpXDR&7ThcN8^LD<-x7RJ@FT&` z1x-w7l;amv=Zk=*&2##5jX^9Eo+Y?h@B+ch1b-mNcLPCV0Ex zeS$PgNd7@Vt`$gsC`b#=q*Dcl3XT(`2`chu2_7fdB-kmqL68RC8Gfta4+Oj1+W#!U zs|0@_xLfcc!QTnKCisz{$D`%YJ`U44O7LjGGQm2*Rf3xZuN3@&;BLW(1b-*^n&3YK z`{0IRdP4v(Ao#A}KLq>uBz?gg!5M<{1WyrE zinqw`nL?}cpFrO(^e+Wp5d4Q=9}HwH=kEmnBKWDG9}oHD4-i!6A%Q+x=u*KN!3M$a z3hovBt>6oSM_@pv+;YK-1#b}ih2U=l|0p;pNyp0)JVtPt;A+9M1-A%ZBzT43_XKYe zyhZRX!CwfzAoz;lM}nM~nExcffr3K?M+#;MP7*8?q&-x|uM(sYSkfm8b_#A1yh?C~ z;Jt#63BDkh1cfrn;Xx0?e8Ez|;{<8`k^IvH&lS8}@Fu}K1osI3M({ns&jh`g2q`aF zFeo@waI9di;3UCf!Fhs<1eXb}6+B0fmbsbE&4N5Yf%Gp09~1n8;G2RU3%Ub3{0zYg zL7ModoRb9W1zQAH3T_m{7ra^Ur-Ba)J}&sQ;2#9v6a0r@3KkMff3V;N(uAlOfEkl+Zx0>LuDD#4Qk+XUAUF~*-Ec$xTL zPsEsali=-w_X?lpxM{@b5y8ia;|$~X!hcEV*M&YL^hZLwg9wju^dTZ%Q0O5-j}V&n zsu=DV@h>DIU7A87^27sTi{N^}je^$^iw)y8q3;rWf(W_4BjTQYPVjZ{KSV^nJ`#U3 zU58I5qHm@OrV|lvsPHp|&K7!-(9?*BH&^@@649oM1Q!z_XPNN3g`ce;VCkypx1(B0~OBBEqjHj>TElLSIfqde;yU?k2%og}<8!d3%Wn_mI#B zg#H~7a$gYtx5WQFBIL0T5&H|~3QiR)5v&vp3$7E~D0rdZRwDAVgLo9i2ch>0J}-Dk z@b7|&cyMIA0Yp6fWeYu(Sd4lUdY<4S!4APqg4YP%DfosUADk)w2*C`&Ji!XV;|1FV z&k#IU@Jhkk1@{a7Rq!K0JU*)N6OR`PlLb=+QEcVU_W~SeQB?}Z2<8bMEm$r%TX2D3 zonVXLa=}i))q=snd-5B4` zBMnpsi2<(^T0MV*zD4Mrf_%r%@V^v%Q1B5!b#5p4{HD)vuL%A{@LfT}rTK0_bzUdJ z2ZZh~c%&fhP;>st6;#jjpw;=FK=oV?tPp;cV6EU1BE~d+V-jGFh=`~W}PD(X2Q zM8y1%NyIpbDNK!TlZhBF3W>PyXAyB9R}m3;Arbw5F%kW9DG}}2K}5Q|h^StLcqCD% z<|+8Ad;lR@`G*8Y3ab2ok0poVtNehTCUl`-si4Xi__ac-{DEF1w8|gKy@E7Q zW)YE(MMUJ|G9uF7PDHxz6OkUG7_JG@Uy$BNp)-jHQy}zYBGPXXdMOe4=oWe{5&5}7 z=xd0`*Dj&&CZY zK66rc4^(ITx+CY@>N9bl!P&n4**tZ3!%yYZ+^Oa2IX& z)^V+6N%y#LGBVH4HJ62OT5f6~-1i&9)!+NAIrBeUf2#Sp@&3T2$_MdN<-BHVwzcf$ z&#jE>5;7L^Y~`otHl*Ub-my&CJqsuHjy0#A&9p;2joG+gr<<(ud;mGU@g4Vi=JjEm z=e!RmIa5aHzF$@@xYNw^@3s!OGR*@noR!SH@yuiwq>uyOOzX+0uOIPv{`IvxRj$?P z#P%7%$@d$hlSeb`4=?=w1rIEHaOqKJzPQY|$~`jicGs2GCFT{m<$Z1=Kk)d9^1wcx zKz-$#maz%HtKJM41<~z<67yg zhh!`JG&*PFPxQcG?vC(|X7Ri{I?ME`x4Yg2%#Qaq2yhz~Cuq+x&mjyC3|3oskHLNF zDZC9{=z0Fv5zbSjDcs?Z<0;mZ+uz2>C7Qy4!8{beQ<{WSd0_DQOdYp0((OQsIEV-J zXL(bTk*;?agL=>TU+ldJd{x!eK77u(V{XDt7!wfnk^~HM5+VjgNJzq<41s_n8bXL9 z5FnB;sHjn~qN3thhgNZ{TD3^=RjXF&P_(rcr@q#y&ZxB&5H(8G?|If<=iYN~g8F{H zxBlPn|GgVdp1t;7d+oKyGu(65LT3kqmm?hxgFi<`V9wDfMTfzB2{-&IbPpW+xN7ng zYdh{)q5R=+up%=j~Zi7!l_1(z%fDaEEuf`vE^d!xTV4<_E zOb&u1zV0T%lOdV@;nIFXf9=wap}V2OM96`L-ruD&4L#hY)%P#2Y`b^Evmr{Ir@crA9 z#VbP}1H||5X!2LVnI>s?g`9-ZgYVzHLc{kjFG%70*OZ6X$2^vwEECIsg z-@ivv@bMvD(D?G;`!`5>t_p(h-ysxyg3|E)TZe-1{c9?Q@82!#*jlCG`*#k@&kKza zdGP)F1tvIr|Ei+Co+~+!^Oc70-)-ctR~o*5Ye_F~74`MJnskHa!}sr{q)$>BzJDKL z!xkzH-@mo2uTjgx_wV7YTOzVU1-w+3;Mf2hNmv0Kd_wUhC9=?C^aF4!!O@F}m?^Voi z)$$47za}5Pe{W>|3eAV_-{aZdm7zM32j9PUF@II)B%wFPegC$Y{6Nq9nSYAA~D$~ zI5TA*NV78gF(-gOnfZ)y3lSbp3gPK#WsYMGO>$@Q+F5uqXE7$Sc^#d`tt9PsR<)QU zx34sAH<{u$m@z}r;iHMs!?MKse8Fa%9+LZL+i8O4eHt+H!ozI36^{6SiNBeTV=Ukv zHHNhfScIO<&cX26nH_tP9o&Yv6)ZrqKbX}Gg@eaHg^VC?rs=KD^hBRM<@FXGfMfb69*9l(T~T`Q5hq`~(U` zmOJB-5wO!sxpsp$gTW3SjgysQ`Eo&|AI1w8DPz4;=Sh zi&mshJ_|e%|5;$#&)&o~&arvjVZVm-{`A{x&!Iy5^R#Op%`7nfoYGnhV-_+DV+$Gk zx1*rlLf!lGWdXZ|3|8h~{5imWoXQqUK}xFR9|W5}+aD;k6;ntIX)&p>gf*6v+@D=g zN=DvO#@@jn`>?xF&Bcffpt=Vj!eE!*0Ipm={@e&MmyT;6LL~2>h=?;SD<64Q74DPr zah+-%%SbOo`0MRJ-0fJWAuX~fZd0!nH<+WhO9s1ut#Fy8{H>UcV539 zB)T6#-5t(!Qx$7qodq#O?8{9RaHCd@*L!{q)fhP1bYHg^LUW%)VlkHCknM;#1&*d=9i)+SuDB~U~_7{}5=RE=?Y7i@6b6puBR2})ihi)5YzYboTFFRq_ zaPaY}y))jhg>2XrNIUQ~j>1B&g8M+m+hz^s05HUGu<`>jMRM8UZ-FmQdYN~x1rTm&w za#6E=As5JRDdlQrT*wvI9g@uOTqKiO#+|>$V}z@y)7^22xGlC02fO`cT;ko7cmmSQ z?EDo){1jw<6p?2sW%y<)yv=?bar>BV?%LSK2KDEBx3_T)@6QMJ_S59r{~bnO=2YH4 zfCBa_ywu(Q2KMx;!cc*-_8VNIQ1T5DABud?)_fd%cxhh*6-?)S$htnkao}0Vv_E8h z^lA~4I{*GS632oZ!Dewz%_Y}Aa^dtzoTcQ_{V|J=bTbS2cE}nODIAK(b&QNg2h3tlWtN0=EbKCPMdZ4K00(1M}coW zoB%<(B=d8T#zi}70wQ6|>9aI*r8Nk?Fu82=*{X4z?s#}&^K}<{kIfB{ft7NS9&8Uq zJMFzP4c$aKf*;N2`}SV)V|gAzC(HH_b}OH6<5$mTDCDEi$6$r0IX+Ywa}jd7je8tX z+wOKh7DyBd%1O;H54Qm+0)44i}JCwhn*acFjspc@d07}6{ zTn)=b{O6&H!|VnWfsZuK7kjMT29C7*ZJRq*U#8)wm5`V+n zWS(CpxXn4=cN7ZrrOqgIJ^rTcFr_$^`||YFmum)@OEFeyJ545sMKZ1Nb~g5iwDs_n zXLrLaOIu?&I3%Xh!|5c_fiA1hPl zKYVBnjP^|TMfZ!&33j(<*}S82^5GM091<}D)nQpWUx4syItC-4j>W`%Sg^qIMd5}F z{?_gE^h49(qYB(%^;w3Z^j4O3u)IVOp}#c>OOJah6K>ZJo9lor>N;S{G@jYA{*8Xv z;=a~Ilbqi6LE-@m&(f)AKd%q9{gNG6#iT_4ggY^8Gzq_3*j|#^lYERFm?#CC)>bT0 zj^qH32QaB5*L6vj=eh#RPq;&)!!-;g-(DHyafWtKLS}zVtOCQOZrKLMy`DvWYTSM&KMuqSqWG8i8MMr!37Zn_m=nK|YswAAW8GmVG68R?KP;UZ@ z9G0vEotKUE)^1#!9qvtX9j1+oCwd&FjrYonyF$aBf-BF{1nwVj^h02F zXWv4DkV-dZ#8Mn!CLD?*Xtm;MZ@>+RN@R<@)2{9a<8;q@#41{2p3~VMC z2)vf-ETJnU!59xIiggxX7{tpO&#%y&K<&w!?1l<6iP{ii%1|BeMkL5L4YoB4yRR?= ztxtWQIfIi}yb9-o4-+P7l6Vwm_IE1G%X}zIaCwszW~XvS68X59l@ZxIrh5aGM&k&a z2Bu=qMB;p6S(CvSZx2v{;PzK?cbF+S(_3=p4Q~DL{e^<@;75!q5jg@>HJ*tG&QYw4 zfENQ*3&uDvkU?O%&K<@at}2%U%t(m`?|^83i37uV;D7_e4vUfbIG_(2@kd6On7HYU31#*GM%`}atYV1CUo*)W zb<;WC3~Vq1>tt||adt=y#~>V~IJ}`!iI^gXpW(l={@WqcvChF3_rKn~{@1(LkLOJ3 z|M%X#I=fZ+k^DLR&v$H<@=n6P+r<>jk1nW(GbWtRQvEaGTG+fF@dG_X;nM4edx*k0 zD%lwoZhjr^@4jNY_x^dg;|mMN`3@Q3n-Ux58xuRhH|Yr6zS(iNPfuBJr8Hycw4r!T zmq>ldf+HuNC*e&C?xG@|gdHsBWO!0`T6W)c_+>jG1^0a5$?~LJ2oFz#d@EzVNX!=< zJCL!ZBj}!KdCZp`b8HXm-C*sXU*TIh!j~S)ADEN}|4+V8&KT?4V~s7GHlgI1{>8rN zQ%U;nvF)A%@FGt_nY~DnmUl8Mn_?V2*@cN~a8wP`$BnqcjIOcJ-e!Hrm-`-Twh2SV zEpQ5wFdl5&(!|YwnlHH*HnqZfFu#Cro?lnLSUukumnUAM%*l49X$3$G3@7X#CmYiD zx?X`PWAewX5_D~GH1R!sl6hL4&nuQLZ%9=&Zg2ZXF{&%=qm5ay>bs=XO4wmG2IXn) zSgbCnHQjw0NKh9puv>0S%S!LCH{-TZVQ#of-&)BA?Tuw`m~5a4fD{|sW)8qt6>Q=r zoXpT7EmB(Iqiw9(c4dLy2oRIB^i-2-(Aaeupi>0?X}nGVaISzyt(kMC)J#!>{L^7% zdjdRqdHgLT8SXWs-`RqN%1_vK<_ORp?VOq^a7s1VmKV(9T~YpBF3p>np5mw_buz##`mEVil{z1cpAhktHA~zD#C@C@bzMXCYBv=# z#I^CC>Ue|uSy$VHXVZp8J~THoP7$9);G-uOsT@9iy_4gf!MrO$8oeT@9`0m>eRq=fOoAX50B{( z*C>rx3rVrZ-@L5Oco7pOU9Vn`ckQfL`xF0wtfVDE1D0qsq4?c%PH;v`QCU0A>O>>S30 z2^-v{-wCttRPwT{9A^|vVA%G(7m~nC#lYRcIAxt^%bYtf+cmvj2DJq z&rPs7wQPy&t3R5y*>l@yxk3a;5lI*Huq!5i`(O$_H5Y`cwfQ$Ae9eCy)++^ zdS&yWY`lC5Z!Cp3KZVzQpo?UAxLe`c_MZ~9${sI!)>{uB`mzn@II!%GIAytk4}!b$ zd9Zp(w3k>veyKL00_dp<#&g zr*b!xRG4oDMJQ}m8hoy7mS?@kaN=ul^S(sH z+s_}P9d9Cm{mdVE-F{BP#^siwi2is<;9|E?pxwOvQuyw~U=84#C>mToei7%b_nB#y zRR%uRI{=4U?~oLEf5dwc+>6}c${Um-FQdkM%S?HBI9z#$r^u_ohTZN81G@6~^_W+` zHpqJu`II*hhbwPJioC}m?=E-q2cIkN$P{_AXIs`hDvxuWVOg$a&F1SF z8YqtkUsfi%e2+uW$;v};`C66F%_>2GQf6vky$rPL=xy&7=(iQ=)Nd#bSHE`fVc1)c zB%!$oZ<4tL&=t)+#4|mto54r_7jAI*h@NEYwZrf>E-GWYc{E6VRvQzT2MV~}3a%WEjpVc>ozi$dZckV>+S^G(TB869X zi9lQb-fIq?Y26w*6S}hXpUjUB-96#Qu=UUS6Z3~FI}v=c(!KPM1c4ZB`ws$gO;zHc zZT}*m8z^_OO8`lqm_nbILT>;~c`+RH4RAZq4J`i$9L(p+p>Ke=~Fu_qBMwVjxd<%*Sa;bAEYj*(ZK`Fy`!2?zzlE z8u$6VKBVMbp8G?}ci0>ML64F6yh+6C^Q1Od@J_m!PCRGY*RNh~$&|bBM8TvVu1s>L zJMIK`@||>oy{q)j_tk7q=Tsx5t9xvDth;nyB|6`6lfUbSpCZXTApVZu`M=9Tf9JdR zM6V>@)u-OB@AIzQtiK3O^qi-WQnR)rW6V0C-F2P=9c&Jqm*nHzCUTt}fJ{zXBGbu7 zIiy{F7o}VU$|65fWv-oRCtd2D#5IC+Y%;tyr5@vmQ*dodJi_qfa}BxXCUW1Py*rk7 zuvzhZLgbl*$Q_^d$9YZX6yknI(?=7BE?mTYZT8{+@SbV z#hVrHQG8JG3B^AvzODFy;y)GlD1N1g_fJG0-uF?jTt%^?0(zX%(-h|^o}}2U$ondm zr*9MD8H#Ha#SS^ruUDG)UF7?X;!}$JJdo+{DRw9ZF(H`VOEFhb?3N*YoYGSj=^Kmu zjf!V0UZi-9qSzk;-+f9yuK1kd-xU9$xK~l^iJ@FJE;3oqK*dpt<%%;D`Hdd=7Au~j zxK8mp#ak2)!2~CNh2n9FVpj|4rzm~C;x&qQC_bq8wBlbCKUDluF)d)~5xZBAJ4Wd# zipMH8DW0MzcB;UCjna20KBoA*;@gV+?4Rx7r#ZwPin)r#iW3z1nKAk1D=t?&Tk$f* zn-n)IKBoA*;@gV56`hdQub8V?tT;h&zT$GlvlVYrd`$6q#cRSw?k^PYQhZYJ8O7%m zUsrrb@k7N=6hBjp;6{f1kfkVg%t4nZJwko$?!UnvH#0kghr#atrBe30T0;&AA#`QwzXP{CH5c=$NE!xKSh2B&h)`bmn$Bj zc%tG$#j_PJA)Xh|s4C@VD$4a8_L;d#wC)WDc-1ftKvh7k1GC|h<)e< z#a9*ornp1#?}~dBzg6UOe3s{Pe`0sV-irMdV~WK@>~EtL#ZE5ha;0g+f%_Woi-{*H z&R1+BVl3pk5ZJD?To;1o^K<53t;qXj(l;y8ssrf<6}Kw#`83o2s3`txK)*#A`<+}r z0zX!Iry{LAFkh}GfxMq4-CdFQ)7;m@zYVZRY5L4#dX=Ks!v!t&aDieE7s%(V}30d$^$2D9z`h1%9jPG)F=Cy%qZ_#uSGrj!>jM3huXZy$f{hb^e+_ugNXg_H;Rub{$BA}#pe}YRs5SG?Mkrxr;1-Gexpb` z70mCYxS!&Iih~q~DAJGx`O6fm6=y3RuUM;ilHwvoTD4&LcExpy>lJD2g84Tn(&h!} z&5FNK{H-EQVKDzWMY#_E{kqb$g28+~LnqQ45pk~~ZDNq_u87NM@zdq*mzXNDkHm=B z7Yc~j2MUQ;kEKMcuQDR$`(z>tRTD9u#}FZZ9ueo6M&bbcA)-#GA&9L?(A}@4UgV>w zq{oP0%2zBPLZ4xZq7Mp}kOqog&~GehU>Om5Rw_;=Lf@&1qAx0)O&WL%5&F+noJWK* z3ltlPXiu|Z3lZ&-^8j!I`xA%wbAsM~Bn^FEBSOD_5TVz%MD9<#e}O)EMASc>i24^1 zQSW*p&(lQ6@5TD?Py(z{kF+1Ov>)|Jdq7KjQ13kD7yVJc=!<;O7kaGM{0&6t^E0J4 z5~0@vN?e83hW)1mlyPcaeF;Zt_uyjS! z)r}TTMW%GeeJDB48gaz-a~dz4aOBHXjdx6#{PMkje`)-rzgl^Z?}|DDzjAiZ?SJWn zyoq1DY>hbdIbYMZrhbh-?eM?p-tvuREZQpDctb5ej^=;w1n;X|cirv`6^dU`)n;O?&*7#xL zG4)pL<@)Y*9gkErUDx<(Xwyq}tm6?ZtPziH|8mE#KDFAdw?4zH#2iMuhoVg{bZo>1 z;+;g-ubr%(0m%=A6JE9SF{Z`$jx zLd?nk%C|EB?PG@x{L1%fRz*%l;lrlCPVT=Aqu?D22V>El{Tm;P4%p1Kq(ym62c2gJ$%p0k|G5+~PDQ|!_6#Ad~bl!SbnVH^M?*cC;RN+78LXI zvdbs-XMJ|~X{=YD6Y%5K&VM4-s!#0C`kc^NSp5FenKGX1*5?nD;xy(TL_uPI7E=Ap z4hL?dRNCM19e)E^!y(%D^PdZ?{9=RF{|JkU4O;*2P@!LJ(E4et(=Rq?{Ut0g<_f7O z^n2_nP^}N72eu(8$P3UAV*#**UniHLd8H|Ix}gWUbkIs$8+bFsUq~V}&KP(rBv-L{ zR%8juw?jK2#mVzW&V-hMcQiK~36XqP$&5%nv<xOcWmZPTvFSxY{p(CvodC*=)aWel~G+Y)e3yA zWKKrql-X9`8OoV&*jkc48IQW(~Pq7 zEB;XD-@>O|TkZi{w|gQhPgV z{t`*HbDzyi#^@yUs})@jUOPGn@_bgh+~PfIAA#&{?=Zu8!rnq&+V--dccUS8^yd)b zL_09$e9;S$9FA_m-?Zq5_#27-1gkmSN^d9Av-V0#+KR%q^OpTSCGl$Bimt|AJ9-KJ zI?>zk7j^%f9kj#V3Z^u_v&K1<>Mur7=M0CNf!{t5MshRdseZer9Ke(}p^0<0rtHs@ zKSKv+t)}!~N(P0Wt0~=?lE$GqPg63PLW7RZ1)35>3M|bzr#e?akM6V>+M})BaxRj5 zt0$d=gq_unABB2RRZ5_xFXs{?!QUU-P3G-T+__X!a+tE5+Fqt9y_h1;aW6M1_>LDT zdDQkwO@aP?EB#=O;#Hzd@BJ{yPVn{$)E3 zTmC1YVel~;81vZ!3uG=$5vY6jW%AkApz_<8#lz~Wy+?8xrq#8OXEDlKQS=mf{scK`3ywy5 zA8t$qX>C(6p|byqW~Hs%roGgNYSLDj*7&pk09k3P4HeG5mDDMQ%E+ea%e2!d!pY0Z zo`ZI$t)Z!0C$Crb@u(#2^!Y;NWM7Bc(#}{YRR3(=ho-eJ7b=$hJC?g(l~4n+X|gKq z!h1!R-0amzOAgW#kj89s`~|2sNc*!n{wLXew?R;_ zS!hn^AO|4G&I_`j{{Zw|+9mWK(f2p#Kj*rD?c=W%{Z2zJD7MDh??dS1tO(dF;^Rr( zWUmM?ZUz5{zd3&Xh!JF+{cS!MwqFx=`&%R%yR5Gk#x@b(?dJ?n0;6_SlE2taYs^lM_@-yP(XvktTm zfn%1GX#j>tZ=v}ez zY;=rrD7oQsy9mdjIPgR99n87R=F(%p zO`O=U90cX^MBU3c3x**%UuMD;KQ1&EBn@No z=M5wDehR%6$wugd6v~I62mJ-<47mBU?BD(Y1qOYftOZOP{3)p2i14Q3UeqvY-#|c@(T?Kj}ojP-ANEI_7P$ct5 z@FDEwEF6+`r#D4-_&`%?M~%W~e=vx(zkzgy5m;@gaBsYewjyyCllW7D>7%{uBRjeJ$fa(#9YA8|LzHV*U|auiuh<3*<<)2Plth?0|g$az$qfE|`oA z(U(7f57`Ln795g4!J8sHbC4o!x=H!8O?((Ap^$4~J)#?N*aPglS=V@^(Zc9RF3Szb zn8(aL_Ize;M;fm!2R(tvHp(e{8?mbq`5D)oGPqGzpb&_Qx**fe& zd7y1^emLL zPZ8!a(lQfH6}pD>8O%RT=yjlrxZR?+WQEvk?LilVrY9=)lNcu7XvgQLyD#vU9aHf} zsrW4lmVUZPcuTM_4&~+y1?81(SUw(f2k1$%FO9){Ih5Fz5WEO{$05)D1(uVMyiFvZ zip0Z2^3x*Oo->krD3>#*k^QWFD|8uj64I^)>!9Nhxu2Dcqs!EPu+`hvkSR>PDNxob3d?~n9Dtsi`^>ZIbkj$iTMYTaI(IgG2=o`vqC1@Xv7p)*m^wgV4?v-}85x%6?{ zDAJx_iwno2Lbm-&uvGA*UcnfArC^;@+V>$L{FKcrW1F2+!K*H7f-R=x-tpP?+wo$I zS-~Cno8$in{swvdRb?NC>YO!U+cv_hp?C$a1R?OdtOkR_moOmg_Zkom7#qMrW6~F@ zPw6R^f?Zp`X=*<>z*Lyc7IU(&&`SHk=_&{$)&lavFf^=r-QpH}rDW8#N1T}uk)GZy zJtLihQY{HnUXO%4`i6!bTd`v-(t34+8DJLd9j`?U^7e_d37M^Rsk!4E*UoWYwTcVF zuf`^BKebCM4S_vj)5wD|rt~!V{o}S`J%)7Q&(GM_rM3qoEYspjE6yITAr?;(2}wqJ z2PDe!d3|mdtgZoF7#eo#bTA?EJtaX7^cpC}5^&8EALLEvI2NSayj2_Qn*1H&8UY^a zHTjFRF2HuQEo9M|$d$@hbF)m4qU10?v-EVPTvfJ+_id;&q6L zUg%|qu=5=K}M`n=8tBNP0hvN2% zXXG`ULTB_>U=dV}nS7Jb7DyD@g^7KCL{x17nKg#I{?LEwov**vPt4hG~& z;GQcN78drG8znl2aHmA833uTz$}_eVM@k1zmZX`4jX20V^9IJY;z+Uh zdp(jItLO&eMu`^+D=T8UTOq1&YhyBUC6wZCB@T=mp%sTCe-T08RN~xljp7y{Zd)~k zVu{X92u+yXMUHefOKn8_795NdZ^Hoz_$y%}{@#wm(*s>_-2@IMqac9=V04#5EMYzV zZp2|*bA-m94LGjG;aDqjiPz#l9fY6Z@LR1V!FVT-c_R*wUM#~Tstu6frgg#Q8I%MU zXFxn;AO-~pJ#d)uXG|w5fxX>%R&xqc4VRg5m)p~AVX%?KtFfEr(U?groyum^n1!5p zFcqIJYv53%a%Uq}ns}U#ks&ys3}Gw|(+bAMnG6EUB{z>#YmhL+D`pa7YC?YF{HUy(=Vi4JWGZwQ5l+3B*))0^y*ctJ_PK7W+ zVt^RSF&Tt@I84(R>u)j$Y)*2UU3SmV?PJsSZZwM^2mQ~&@eo7|QV7iUSgvQyF&r>P zpF=d+MnM|eixfmkaG*pkaWoE0YCm1eOv0zEg0?r%Gc5-+Z z21w96P8aNB;$b3(!h3$_FmNC-oA^jU&%*HysZFx*2P(LMbA^GEgdx{}sKMw~rCA+= zi=5L8ZaEGw1J!5n&JwD^rn%FX`EH=f5gg=kgFAmI+tr78><02~#BmD_H*7%UG8|Xo zxY|tw?yFvQH}j|u>ta1I9B#-*WEhS@9EZAzz#%x8UW}szha1WenSg_RG7*OxIESdO zTc4Xw{4x5y1)b|yAK{TzR~E}F>sB_5oYb(iVL2>=Ef_g_%CxFkuz)pk4s6r4j$GW- z(Av7>-*4p_Cca>1c_d9d)*m_-p9#)g0KJAcEoc~CGNNQe@$k_l^PAe{Hq@7;U!}vx)heYhBwsBZ*mQi&s|anGipm4{#%6o_`Ojvt!7Hi$SF(zN7(#M zo*+L~XC&7;a?;cp6UwL7R#eO>`LQ(Em)UQ9p-hZy(;Rhu{fZJ8!^W;uyP)Bux)sfB zVwt!VX;^ZtZ42-c4&r``=Eq77DJ%pLz;nqZ^(D2f^(#!#%JQRNpmy1kCCio~0Sk6v z^RoGMFneo+-~Wj^7TB@H;`@ z?zAHy<^~b-R$45n_-nS^k5!psAFVtBCa@i^@oN~X_BF+Pc}Ix6vB9#n2jm_wuyDYE z1E$_tc=*twhWuRL>ahiRzQ5YX^oO9ogsJmAtEkKK;Ss*Vm~Zq5q&(0DU9_5uR>1=J z;W6LT*gz)@Pw3pj;ENah!ohEG_V@wF zdL+WKkFSXNT4TP9SpNRSgY$hopYqj@aQvPU8-3cxSBbu#iM|(VJhhLv`RrI8>;2G2 z;Xhpy%LTDRh%43{F)&VCvnJ*%7|}l;3D1kH3s<4**l>{XuDBJp#_s- ztq?^cUIgMnA)Z|w^EHo{2KwTRET~KGwH?%lG>WKWi42Zj$#(Iqg0nXsSk+4hjGjapLIR^M3Lu(WP| zvoYoAQM#s~tr})!>+8@XmZVoyl+@Dfc4fm!`?7sa`Ff@yKYEz)vPHqDwEn`%6s~QFG_k% z#-~WCnMKp#DT&pvi&{}W6*?YVRE(A{Skc^2+tRi?m9JvPwCeI%X!?xl6Q@i{%}q!t zK6tdzh{~WlXItLkhgoEH|HSesQ|HX8N|hoC))sc1+-de2?oRX5B#&~fzSb*>7!K}?Vg%B6%|!A@vY}O`^+O{-|Bbjq(rF_Ye{{p*uB^G z*Hp~m{H~onYs#cam=@Hy(~u;}muk0&0by@z@r%XaDcv*tWSG2TE=in^C z=Gkcq>XL4=@B(K|YGXCiou;zpYv)u8TWXU!t=U9#Min12x-?a`XGwP{k6mP@XKGE% zF`eI4&M2!vwqLm_g8PHj@JZ6V0uBsXt=8tI`Ua~D>%^2;tJBZj5mR~-S75NXj7<&O z@sj!_?k3yfZmBXUx!a{qS)GMaFhypfhe`^^j85&KL~f_9bqB=k8(0*RXwKOzN@-** zjMUD@K0k?*U-m)hr`vIg5?HLUMg0Zbr#7)ZLVpogH7t$%j=f5(z`{oshpE9Wo#2uXjCyp*BD-| zh@>Xz7TIZ@nQgyQa+~)aq!vc(7x0>bTEu5rV$r3j#A`m8Z&qUIh;3%m-4)FZb(ppl zc)2`Y(DYbJqZ5|L<9vGR=W4({k3X{$GRzfTqCbj8kAid2cu|w>*^;nRmrt)rzRLJc zTmDrQvnmTM{_S*5HIvIS{UnzGW((pTK5a_ntW-6yaZ3;BmNShPb$StzF!KL{Ro9sl z?;N+|in^Ks?nyE(-SoY2OA=2sy@f04Rb?>l=e5u^Alkg}yG zox|PBTufhVRc6At+ZVKH!xryxF4HQjq_$0$N$rx>#mGjdi>4{cC1yrx(U@YKBe=qh z^PGKgx|f%5XCeym4CA?kNgdTGtum;yRxDlGv~;00X-ehP3f!SDtv4G}+w!J`3$c+< zOZf9hdB`Dc9my58d_=u#!@fDbg1kFFFEf+6#?oEJ+{&=t8X2%soHx4YabBC0nroAk zv5=f1x7l)0i;GeEBB(bfN7+}j>sDiDs>P0m)!ZTzIHeoAytJsCarE@meoKrDe$khP zY4beuDe0WIq;65?%N%!2RW~eeTDHKuq+ovDy&aK@S|baa?@3JyyS!#+o6HUt@8N=A$sF)CJESX5F}R5T`5u)G14j$tK%Fgwd{lr&xo@4B~d&}|XgH)P71-XHb&?g(a_UGDjp6q11 zo_cxfT?G1v)JuK6_3-BjwQ+y0eT1o}d^8gO&35D48dkTBh)*ofZIrRwZgOPnwUSft zD8-wQvM(lVrK^OLd-Rl|sT10p?OAu;WUVks31PKT>oylLav7DHWfDDo(B%b>l=@$L z?0n!W;UN6wPf2|Bn8Ewg6KR)kn8x{&8Uy*fa~=<(CGaOImT~#25s%?;gUfde61;pZ zpuKC)^4Q)3Q{>SuU040QUy8g^$YXiR%fjKx<9G7-AD;)bE7Dc}@jD{&x#0@% zMfuyQ1~-r2D0tgZ#&%${XT5k=E?#e4ioBc9h%lAX;L2-F;ky&c4P`@8_?D&Adko&} znFl`B%kz!fUc9xJ)Q*>8<|T0z7tcE*McxC)8=Df8$Nq8UU6~?p+5pHynj75crHFX@ zB{mm7Eu#-9kLO=k-Y>xCmZ6L%bMfPkyGTL1c{iuXt3J_u*Fbq(@2+EgsCg`^n>C`WV!`1I) z@L^BmwjyEAm>*`>d+4E-^?|2eH%dge#)E$X-cd&d1Chd??pZJAKXr5WQbesSRe15k z6$085Wp+Gx)Bii{dVBlGXcw;v`UR5ukguh91MPe#m-kE*Fyce`l>CslIP$|O`C+*( zdmzr`S!g0JlETjy8xjHE?WW}8MOjavo$zFRGo-$f}?r_u+eZZlU|6YXN>Da~u-9+)p9mBuy#I%vKXL7eA|9+)39fNr23^KfvE zZ^c2o*DHZ;VE$z|n9n_xcCde$M5kL1D_tr18F4$>MxSohUo@ZB>^(4kJAiJW{0^4@ zlJ4nQaHL0pW|GlAOYF*$&cV?G|IDo`ZlH}l>aMP`z1P=n99PzHR=M$uKWmVCf!Y<# z3z}Bq8J2SCt)^T;ckxUP*@@rb;&M|jxJ`!VQajE`4ZL^2Zk&&>&98-?hY+=0J$Cj! z%1*gcg>rFCRoq@I+Aap>O`9FY;0wT@V5t{EbuEh|R)5c3Y5YoqyqgZ2Gv zWO9x>*ns(U3z4gc*q4Y2i>T$`#4t+Jv9(M7c*UuTIHgPaF^Ua}oJ*9qN^y1T@`@njo}u(b ziu|aN_1>a*r{cYe4=X;U_!q@@6~$IE%HuR6at14wD3&QsRGg-GjN$^tMT#dYu2Ed4 zc$MNUiklU;Dn6_Dn&L-_9g0C*=CGZ;6mt~|6~`%_t$2~*b&9tu{zma-MX|*UxqFmO z$HfNg>8m(Mu~e~A@hHUwiY1Qi_vEt7Ze?bgb)-M%*MH~PdoSH8-lu=%6C}S+% zW;*Z_&FAOJ4P4A#W5BZ4{dbz)DS@u6#90pP=+fMDQ&l zLf$EweumQLDZQQuz72}kX!`X^-=z3UP2ZyQ1B!oE6r0PaM{F!3?e9#-@h>9U7r+UV zD7Kc779|bL*7W{L#}o%^da=@@70WgKNFw^>C?YPQk5i=0FV@qj`C@Y!^eUy#()^z& zy+P?KmA*mgTa>;>>HCSO=OH56`A1FPuJm7(euD_Uw-v?qGV0%{^d7~piAWEEm;Cr3 zRj@Y^>3K>Yq$swSkzS^BB@ueipB4E}P+X|_ixp4P^tFl?Yx-r1*K0cM=upl*n*JCO z{Y%4J4lYukSNxl%e?$cTCrW>%wAfq*e+aiNEZ36=zW$10a~X1nk;bKMp(5?ju)Y~e z*C^H!QNB^Jg$TYiL|ibpE3Vc2i#7imrNuTg`0r5q9?gGH>E9~-w9?NLA@?teZ)^HT zM9BG^m<=1+iXq&rFuey6dS)w~tMpJJ_{Ekp#_KRmuTZ`jL|io1C?2i(b(-I-^vOz} zLj?bMM9BN8=5JKIQ}gf9{3n%uTIs(Mq37F*A8Y=DxIkxmPa^cqBSKDzrk5%nrFfj;aw7COSMhSi&5D0e+@pvq0y!_>@<|ZOTM%jp z@?MVT4c;vihY_*g7b@abL+Ha4s}!dwRx8d{#G@zSpRd@YxJ2itAb*$A9g6=_^!ZGCLW<%$2K=-J$adx_9;7%@QGCiEpN4hFM+w-cPieic%LH8?6CYF6=_(9wA_CJXEh;rVl@qTE-49<6klVx^+oUm~AY6n7qD4woJ zgF7rI_nE+rO5dVLBRV`^->*npI;8)oDEE^%Z@xhqNCRucj}&QNko4z@G_6BAq9``B zLHAbrK*c=8A&Mgu%M|5)6y<1&hw_eAl>1W9%}UcW5A)Y6(&!;+8vG>Qpm?()E%q?| ze#PG^KBo8wMY+EPA1(IqJpZ2J$BH`@zf$~0QSN`ipT_%2U{A$t#RC*`6=?y8e5Hys z{6qRkMH>6z`T9h~lN7}UHqvSLhxu|p3_Mrq^A+X380kM#TJDcQi$xb8Z2+-6jSmuO z+K2e8qTDBgensiG6yH;%1t9Y8RphydbWoAje@ORLj49?T()bVa4^bSaI6-lWqTFwT zZ=TX}zYUu9e^`E%B8~L$y5R!FOBJtFyg~71#XA-6QIz{|lz&3$XB4+9zDdM&$GeIj zEACX3`*h_0OKBSTA%B))j$(gBberYiQ8|`o;(7vQV|tz~AmY4KNW?x;N(6Hm5$kj^ z5%aW~hSy5CV3`V{dO^9KLAqSW;Jhr?F~At}f%%G3Kj;#rMGw$p zl@>jq-&E2-(FZtN>3NC^6h$xOH!HoG2>s=GD6n1WwTc^vXx9~rS1bNZaiiibiklR- zC_bS0u;NpS&nRwJd{OaD#dj4yQ2bc2gUE4Kw0Ktm74r%mrf5jM) z{i`U~Nf>9jPU3ho9sNUt(=zVFEcCZx84=@OsW_R~3;nNHO+-J=Ry>A?{*&t~&JWU< z9}5&4iO|1U@e7{Mpm&BJ2))M;q3>!U^t*-#{Q}(gpchQ}h(6KnoR z0rgEJq8_kV&Otiwz&lLoLL%xLt8^I=^-fi~nuz-6Dm{+~J=Q9{jtG6OP+H~*`so&> zZzrPiCzO_X06kw+`eh>Ym2riBGOo}&gZ%=Urpu|ny!#0EluJ)C2K&FyRzJQEJES3;Uy9bZv=10e*YvBR&>N4u0ntJYF)3i|Dt@Fia9`>k{*06DaN}3vk5w(Z3QZ ztjV}6(*S;i_O%Bj_}IA&mDc2h+-<*NAFK_d-ID3IdmwH<3Sy8XAR}(S{Y{jE{dRhO z@w3b9{SOBZjHIu}n8JShuL1t^F`o9&qnP1@cwyncf+^!0nc@%ZVBzbTQhutWg!+O9 z_S+XC14i3VMjifF`JAnHG4lO0K|2GEWOOaWJHt+3bT<_qzRUdO~Pm6Ow{Y z<4=gOcW{Is!XNwqP5M)phNX7WJ~Tq|X{p`!X6Q=Lkw?&>_)L*PaPJwRX8_;Zp=X8k zM_z(zzIQY?9QirPca_YDRIwx8Q!*<;BiFw7mFyKcg5(Yrl@sC9VBZI!TTv-3wLe1g zL&^1trFLq_OwkaQ+IhDVpo-}rm1kp_?4v zms)o?@(7ChzS7)`NIn*wZ?BSKsonQ4rHrL^-`7eSOYOdIRFbjO?)z4Ajiq+{oNs#1 zSZb$%f9bt~2rrm@j*?=j-RBFNt~Hk0eSXapOYOdZW*STFzMy7~HGLNfv*8XbwSSEH z;0tT6SZepBg=x*($!m)o$c~MK&ju-$+VA3gNf*gJT59K2mM=pJ$1Sz{x+$%e+TnqM zZSdu(rFLJY(y-LdUlV*;Di4<0uO;1GX;^CCNVC99GafthX8(FK>2_5D@OkeE&W^8gRR?3n3A^t6W+Z7%B z17kaQX!o|g-G-@l{~G65%HXZJ{|tv~$(U--dK|p|c1@wF_N>FvA^x*9g{IoGcp~$! z)fAd)&!S;%|GAn%Q|(#l9Gmkrg{IoG_M$@n1)3tJ+PnMxr#h`j?!k8UY^%5Y7fHU= zi+--c{?*Pq$n8y4r4~xK#7GcR?OA;EXsSKyDYVglnWoTGdlqja{Fj>)G1Z>M z8w3B9nqo|~^IYw}N|fnF3%^d_cHX8$e-~VHh+i+u3!|c$i5jl!IiYIOe5-a1QuL%sZil;{`4DM zEjKJMqP~&TDZ?cXM$|brQ{DJ*#SR_wB;wI$kZeW! zGR5-qSD?^buI@hE4+=tUH$uGikE0(#r{6DBPWH!Wedvsbh3cPu9Fz{VZxbq(oz1)p7pIo+Ew1O?J>^`@)?YkC!xa!c){oF(3rbI_&f zS9(&sRz$O)3SPxXPal`=e77P2gZhle9>-$>2ODH36F89UDP4=NZ5o!-u#PLl++xl zdS;q_K`0;T)J!hN=X;6oX3=?*Vd=npD_Z1!y15SvCErzcRA*}?DM}|kq2qwmPMkUe zAHAno9WmpkU%^sgeQ&bU$Iae8?BXNf?>9B#tts_m#u;;FSI?PUTU}mLGX-Xyroz_D z)c>ljk$syJ=}LO-)EP&oYLRR{AjPssO5gsd=0oJW;LaZhn;xAwt9)9OSkREU+q5v% z6vz*Hn>=OGWY`S)!4@L+VFn_hX>z|M zo`u#Y>_dokheQc!Tk^h`+GGDED-Q8b&5b!FG0>2(B;dw8W34;wcNk;%o{jbgTU$u7 zIgnym!TTM*t7K|F>{|~#MI<(!|BKC|$T~R zmFLUEbwHte9bim2{IEjBUaJlX3l7HALy9qnl*$t;z}*P{anlY``q$Z8TcNvhVr*$r4$bjY`{{03ZI;-iL(D2xS@Lo6; zCS68)`?`yrt9JT~S<}j=x`xye1{)HC+2vkdTh-|_VLH-t`CeNyW%{J4RbC4k9@`J8 z%fR~4%`=pb#=ZZ)+2#POMvPcc*H))?2NJ8^@+K#?L3cAS-{G@h7vn!-erszN>G876 zPVL@!W{O6Ms*N#$AM)*g9qe5!Y-mLj8s@K92t$sr`K$3(tcek@SwbU|)(BY27*W>- z`z!NTw1NM>5b!f4AIr$SB8!>d4;eE7x3m%l;4k@b?DBLDkA8S;8rSc2l?RZp z1%KC35e=-1;jcKn^7cU9Rw&PY#!uyOc^@L~mO<1Si$ceF65QzC6uztQxG;wWG`M_U zfcDnA1rvzsv0jcd`;Ro=8FkBmwC;ht3*1fz?dI``KI5EU45fHCyCEc=b0v2S|SkzC$TMgBv9}ZXz%zW)j#pJlI~g zn|epMworzqd z-O=8B<=~v{j`odH+T{DK8Ak|`e)|0>EN+FtJxK+coIjnql}D0qR@ z#c8Z_l6#U$J$dQfLgMV1%;-6XnUaYFm(hEHlx&`@Q1o>U(D%h~;-UV0kBzUc@co%2 z8t=<+Ht~HWE?);9)pCsy<@;LvK@oW`2U~`uk5C+?Sf)5hajN36iYF>AR%}r`U2(1A zg^C*#uT#8D@m|H>Dn6;$4U3Wb%KKZup-OXKVEPnAdCv;;LZw$K(z!bMHYvWNxLZ-) zCrAERY$)VwQk3_yLH|zaHx&P=_>JN?Y%nZ0UGYT4ixjU>q%(T*$@jHD`M#F&HT@|? z{gM3pD4E9_nt@x_qKNP=Jl=qoYE)NgrsrSK( ze9M4zo8tM3*D2nu_^9G@itj4Q`@|^!FQpy+xCuI}7**`0xSyhYR|~#ErR95C(B(?c zP&`3#vEnI;H!0q&_@LsWioaKUPVsfczbk&J7{cj*`pWyhz&xdk6vr#dd%Vb}|8Vj* zDa!l1pwCtMaz(yXLcX^ZKT~wDsWLrNQQoHoJ(x5$p%I#X7!l|1GNq>xadMuebS)A4 z(*mVWCSpHZsq{HSY))vVYh7;nPodqI%{L&WgV5(+dH-tc5gnZ@x_j;Hy1W7vGR6iIDwr( zU(brI$oV}|52=gGX)ET0;+h?#hnl!kUM!>{wG+aqmkV?bekYYqMVJSQlgO4Q#x# z`K6Bag*{H&ud!gYvoq6qq0G+Bo1eSNDj2`#5BJnHo^;wD8?Wpru$-@gpAD_}L zH#fdA&&kVMWyKzRzhK#w9c@{6E;F*8*-^0c%8mtDcP=&b?{?%Yxx8a`*0oCvecz7D zJBp#&G#?w7>Ze8cwYoHI8HtF z{&S1xNe*T>a!OI-7?rxQ@$!z*=%4X>Ub$yN(}X=cdrYW%@qOQ!zMWtD?4kB{JJvF( za7%e()oK35KQvy^QBdalD)8Bmia*TDc<}7T7tn6ss=|jYa5-oCCLVY1*^OCS?3k19 z8<17ktImq`U3Ef-|Hzg}lw&=5PGiop_RTGm&S|{5(b{QSOzXJMe`edgP4_yDzC~9w z|9bDPPjgp4ADaB=@!?|+nDO~H%P*Z^|J9ClJThU?xr=&Cf9$jVv$Bex{H*^RXRq%I z|HSh*w>M@T9N6poj4i)yZ>V@<<71!BC^qx|w!HzR&77`p%x&ritvVjD9z8bu{^vUG z^PRchy%Tn4wO*^W_$RhEcAL?AqO%xv)LgbXYZU4k^^3i}VoHt5o?)c)x%bxjl+-Z4 zaH1=3_=h{o{byRk%C=jB$8Cq)wwop#`tr>aN?-Ojh8Eq@eE;5EUkq6NG+K9N_!PFT z?Zyd1UiMGyE$#SQ$L#h4qz2ZVH3~1BetJ7<_O|HvpY@-aRb=lC?Ye!h-DTSv=HE8| zkq>sBWyko}w9|K{HS{p(G-f+{`7-Hc(RE_h>h~7qF3#F%2ZwLh9&b4dI`yuE4oA(h z{?^gnzOgZDv~RET#rd08;w9Li^z`lMY4!-_t?UH1@1v)UCM}bG{aO2X=LMtFu?IwE zY-~iocJ!`1f3rJwzt|gAiDqa11th+-BcXrQc3xwU*F!JT{-RF(EX2Q^yH#YvQW8DVd;sd`rr(?!Plf&V?_HNFbJN7!o zSqGar65bn-*4(iV?RU%{RF4*%XaC(v<1D$R%8$7yDVWc!A%CNT8qV&Z^gAJ$atF&8 zhWDmP%JbR=(fmyRufM$az=>>0pNam7&Z3;voA>VOU~Bqp|E#aKCF#nDU>p7GH! z;qb0+i!fhWubD7XHFy9$`sMS%zlT(_PhTd_`J1U#+eWU2;NGxDC$l%C?G5j`b00Iu zZLN_}xPda3Tj9OVZuS}b&K>crgP9kA{8<+B{!`nSbsyIc^XePtW2I$bot@qIe8;B3 ziaqW1j{#dIN&chU3ts5hXgyWt?gQLzTE>!E5wQc$nze!8TmE_~+tI&9{FwxE(uu`T&3v7>&m= z{tVou`-V0#!wKy_5Ggshp!bbGjVb=XwYU=UKTCP#7fDKpF6NzZ;9R`0<_~A#Pwy&Z z_#cNx{sFuR^B)((pJ6SGZf4!X&qfs5U4^?t)Xoo90uLkUJsiPp_>*mgNQapqIp4ZD z@M^@IOcW7L7?~qYyOKf&3_a4N9Yc?IX}+@`I57Ms=*Z|?NRLS+c*!&JFnS~~Ap8-; z;SJPCE}9j{)!cAoJ#JG2c}iwP{u8YW8K%4AUZgCu}CF4E-+Y_%q#nW zQYHP7o|HC5s}4tAVH*$C+>FS_gFqgpq`a~p7^{?dWj}DZlIE5Dz&MrEKeCV=FkW-b zEBk>mCCw}QfpR4aA~6heV1knJ%6_0iC7Dd14rs1Hn4a<&M%dqm9GJo;GQEeQ?&B&Yk=;gXG!7s*8qVU zrS)roz-*=UYk2KbWnF-qfWfN&Z#32_yKdosrL z5#FCM&iwR#Sf7Do!=EGG?bd^^;({xuATv4#bGjYx!B53l;@#)@C>1=F_ut*NVd2`L zKYc>3t1*SFXbo0;HmCo8%I@ti0hBFCbiq4(F>(REd@DI)RBdEBCOCi++DEnGiFSi1zy{b{>Xb^3^_I# zoxE`5a!T^qa<`qAB{Lxuu+1(J!(y~TL8bB|{G>A!w&e@oyn>8scuokV*<$bt-Jgx548vB%!`G z=L@&N1F;2#`q}Jq^oEuGcdEIcJpm>C=>w6t?IQ^G|0*BRXZUER+h-8&cXoUQj%fWL zPB?sPaW#6TeH|h@@+4)e6%7_3wxJ!d925o@=Fru61lzumu_>D7M4x5a*7kPC^5^zP zEnnUM$vu9Fw%bm~9*S8K{ZHtOIfcJYG{o~x^g#R#TRkdJhwb#R`H5Au1hdDA9*t+p zw$+1HPi$w3UCW$_=v^!N0JOKQbouCDniT1ADw&WDU`6_;o8CY(%v&}x1CH@1wXhm;=bUT_svC)&E4(d1^z2*GL9tEcK9H@?K z)9b+6<9y5k+xe?~DNFwZ%LC8!xDun)oB&q3SOj{*=7W+R2e5MI9s7Rr{vP{`6+JtK zBrAOlQk)(3&&l;ZPD{4)vHd!^!oqbfWP$5Vly`R8j|&$z4%_(*?hC;+_aMr;7}Ek= zhhf<}U)nTL)?*gto9(1IBgr*S+ExV}?dSn`ID=O4qX(y_lZoset?h zC#NST$?1^N;dDxy4k@&mnwGW{NSdT=phKFZ0}39}Bpo0f$WYpfP@zBtKf8YK8?(gnjPM-a~>s{|!>s{{} z_c?p5Gj-ls!WfSuJy>)C{4TOB@)HCP<$HT_BBQ){$Znj!Rf;6NP86Jt^=mL)WQ=FF zz)CP|u&Coa`bDH95`PCy5t-nz(y=6U@~@+GvG*5f&C7{YdXGX`(Wx}$ERVA&`&*}? z%gL!0hre|yx`+{Hi^JbK6`9TLIpT~ZXDDnQnJdm1a&D!bdEz9&8IHG*I+4RHCxYK4 zaZ@-_?!AV5jA+2WksbK4Q{+e^z%15zBj652yV!IZY_u4o6`R(L5YdK;FGtPCsqByH1@rD&PAi;Adi)X{YDHCEBk4QOixk(u7r2pLW5 zA?4A`B6`ZvOu=-KPZi_l7^4GaX!q8_dPSRH^hl>o$eqA4yhpJO;utfJV5hQ49AoBd znc)+~;ZMqn%Hdd%E^+vivZ7b%iCe_sPs)lep&Ohe4u4WsRL<7iElw^u>#3*Law0A` ztco^|FHswD14=TIHL=5lvnEdQ?qex#r(d2bJ*E`qZCbmy*Tb zR-p%u+-z0yCwB!!_tQsj6$d_AP-Nc2cAGf($z4Iw3iK0^+bxGbxhrt;2a)xClb6D` zFmyy>*X6@niL20OU<6za@lTI1RG|}N2NYx3V=v?1m>j;YB*s2Hhd=p>pK=Dch4*rx z&+kd1OH4eI%e=jf|8C+Lbo(g9-;wqF&%RH|!^zJ-`zT7@3qvSpGFrAT#(^u*U`Yx4w-&K6xdKk$)R+X}1l?NdEWUHB=;dDU-O}QaQ;dP}=%1=IxPALCwOBEzPrj~mw zRhV2*3hGCeN+eH1C!4>|QiGE&Q~0r^h9q~O#Q8t@(ByMy^7F7%{(Y7jmgGA*^Y6D* zQF0+_CI10S4NrayyX61WQU@jZgXjDQEj1!}B^pcqLzWtuyq46%mKv4(HmRRkYIJgF zF{no)>}N{GCa0j^%74sK#mUdoou!ZmL}_&-s2+;H9dI)%kXO(c5reM z!=4yx!VXFPiWdBh4V#fX6}?{m)0UcV9Lw|8y z8}ZoqE;>xawK0#6ccJCxd#;Vz5g$iK$Z>7ljq$r#Yf;7RioZMv>1)zEzm=Ta$lnxX$nhiYW|8tSe>-!ZfT*{#kW z;hqGW#9dbSD07eABYspd$kDFt0(0V9>3&J~vykNC@(1ic#>k2VagSyjE3z>DCD!^l z*LJN#;xAEnyvX74YI@`Zk)z@-Q1e8W9Ufl{QAA&!k(J{%DHh6uWQ0>)cE5t7ll-y(viH5|hHj8(>cN zQWNNm{TD@I>_~^f}o*;n2s;}=Rl)z zH}yi!fOfDktsr?fy>2H-bWYARI>0&*yxgyRADJqB5Ug(_tn@D2{0KMBbk_eK+%P%! zhUX~t7qIvm{n9_+hTFbYiW28g>P8Q}jFC#9kVa|-Zk%asVdvup!H#?D-zfDcSgR=I z-yF=%lxCEf<#s>o9tEjGZUt}fjBnt-+vLo=0@1IW<~YY8sLWmIRys53B4lk7tIC;q zt5|1VlsdB!=>RH^(drp%xcHzXxjq`h;?RGie@g_$tU2-b9e4 z&Aj0YKhEY&5;tGvO(|~n@rE;l-{HoYUI6QirI`@j{azA|Q#u-~9+1J!^cPSj*2d-d zxNk2&CsO(zSZ7h_&$zh)H;$3I5)!N%_h0LLsT+MMeyPez@oQPe3qIcKOYsB)qw6(F z9n2K(h16rzmFs@T7kl3q8;lZIv0p>v1&ZanPx@k<-570i0x`ZMg&o5XnIz?nrks+JY%3PfIY`_5@;ah>W1vIG5jlHDZ_fV%G;^d_SqNY>C_Li{0ak zJx;Nie5J}qsERWYPCuz|W>$!GxmfU%1!7$<)+}cx-$BNRoQE)CwKJ2iA0z9RV$F7D z9xv8QV!;i&#Ck`pxz5ZTV#QJa)HTnk*drFn`Dhj#1z421$h3RMC+R4&*s@TF^3~vv zn~s}n{2P9e&T#mKQ{Fh!+0}0c#ph=3{clmh7r=TK3Mzem)mOpEM<*9>_9HU^GP5}R z?0~i=X6Y;Luc`7A;LSo{>2lmOO#=KYHriC{s zt+N?7GZ*3JY}`ylp9V8Twu9F!UbW?+S(mf3_y!|ZqbU1uRnyF2r(rp6Q}*Fk|XTV9qyv^i8He|2pVd94axoI#=W4-sVn2 zoYFW(k6$3rIgBGD=DW@v4E>&4It4V}8^Sl{-8BWgeXg0}kQ2iv@)^hdVvy`Ulk7hs zKc8d}n7h$5&L719Ld;eeR5U&~6LWVoeD%x@Js6pvfH7{xMMduu;pe=1u$s zdQ0~aBU{}TR{5Aaqem*|x~pIk_ldNHPJ!B$i0+nR5nwI!gtZWu^LDaaPnfLU4%%Am zH^ySWAOoQf_*pm5&-g)8Y@7jl+X6bU8(Y=iukpZk7b zyP^nZ0Nr5DJDg=Lig5A3rNq2H!g<``5!#AJVpv;_h;WLKn+Mw1ZlnpXApI@IA7$vH zK_ASC6IjkzeB3FK`;lhpMc|!`Kx?V_xLLr^Ln3^t7Pizm6snkme>9L9Hi}e={==oJBqPG-u{I@L2S5C>N@GVtmN7K4%u!5zWt<^)tq-kArE=`WaKq;cyabw$qH+_>|n5ZMO;kHfdwF&l>vAq>X2t zZs-C`Ea#sKmvhfB^g`0cta}XIMcSD4OhfajjWO$X|Ts~q68LWqg+1(*)oRh#SL@rz7hE>L+P(O5o!#}GYzbgFXQG) zihUTl%2#p~LuVe3e>C2&z=n~=?SMMtwLACgwKKOV&MPJk4IZ|0TE(t`RYdv_f3Dk` zhy0B2g8uF$aBoGP+_Nw&SW}Pi*xx-4ruE_xW;Z$y3s!4-OV^P$UOLi*?*eU2KiXse zcMECLIV4Ruk4CUnF~-mfF)grFG1kz>lQvZ`&d^taHpZp}ug1q+f51*x+@-+Le$rU z?M~%nsoQ^zIfuKyMqRmm9;TpppohL0Ni4H78b~bl>6m${V<(V zgLJ-Z(m5kY=gUebuoJ7)y~>+GJ3+58RFmV>9)$6{;Eh4&L6hqax&=}TBWMzZN8H5- zZk_u(WIJ+n)OEQ)uIC0!J-3GIxoPRtxf5X1NHv1FY_`GN8L#I*1g}8_N3iYcaxra! z!TkOpFgNC67Fg=XF)F!nU2k~Y;l=JJUmPLr zFlFRagm6`!5$6|}nMBS<2$$&@Ax~mf8~FesT(@V0d>Qo`nSl^4-i+YX>e-+(I2=j z*Gu)>>8|H?UOjiUoki|$cw_uwmt%{|g;YJabfI)oE|lJqgYpMTkFp_aSjsOBLivLb zKJP)CTyy}D`w_y0mCXpPS+C&ZFjb38M?SgSvccTyN5pr~A4Cqx!wx7zxXD-lq%GT@ zVhGs~L(zjctl4_=&umLBcGnd{<}Bz9C25Li!nt=aB~g^`CB`IHMTff0Zuq5$NX1LP zA2DYHzU?qS|FC@e1*)U5$i+=`BHk=mj(N_Y+2$>Tv8e{~ib5|a#2Hp5X0Ck)VZIcB zMB_-mwQw%FslwpphgmO04BlsG_M1s=BqM`0EwBJ)N@~NRvkkiJwl|{|&s_5GMV@%FVbDhc}3QlJT75gCvhZx4(`0`g} z(O7uI3=;=w&HUWyE*!1WI850&r@Kxhe&Ip{lq0}l00vcG20JDB5aym?RkaeG70QlD zqdJ@@b|=b|si3rT@{xHA`P9I?%ndAq%E+?JymYOwg!9uzCV5ymZH!6-D2mI(hlj&5 zjDJMG5I@e5p~PX48f%d+EG(c=YSURcvS0!FfraU6vW&X0;svIn>vK&DYzRW&3pQj? znAKQhnTrD^EWY64$PSBq zB1SyJCr%Zg$em}(<2JZp5`3AUiNL5i&f9L&RlH-y5I`_H*5;rH5cZ;c#HqZ>j|WLc zDi)i_6u~B#vydQ7G~a=DDz3T|_clY7S3xAWe9cs6jZt|Ou^1nzJJ{ahzq!^y(+T(t zc6yw?2c2k1!6k0&+`3g^%ZS-{;3L&lWxp z3c2xl-MF!=PlZ{#pxAX*v#2v*d)&?iSaYuS1$%L0L)WB3*Mvj=BQ@s-YFg83T75NR z(b^v{xd~Y3fyLeV2r9!D^Lehb(r5YG^AV>i5c7E-%fd|pV*-=L2;)q$AL z3yJv~^bu!vAm;NzV*Um_J<-pv&kKq98}t!pZXo9KLSp^~eZ-j;i21ybn7=_EapnhN zJ})H3jqfarbIY2(;HKLWS++%_OF)`p;fmp&^X{X1je%gxCt(Xuu^=9P*Y*MK4AP|5U@Si zHtw643o}o5$ImAi!-pKg>LWRM67v*Xp6r0;70waNo|G~u$ znZ+R5NKFK*K3!p$B`P?`9SdP&1T1ju9<|eygIh+*G#t56dDS&JjLEK+rbs;j%iJ+fOiY=LH!W6o7+|bRrF7U#)Xd)e1Vl2*<>oT7?H}M zn9waYkrBhL4bpD-qaTXlUUgsW=PlxFD`w`7#wX(R76Z&h6H^v-Mo|Wbs*httm0>j# ztb1?698G(?PV)lXvZRGL>iwPR*wB1u`j~f|pfocOG#4M&Sw&zDkdsnky}9o#B`(1S zA_S|98{z$wrGp1dD;+#w>}^tx;`vpR%W=9S2LZtq!JY2_P4+&+0fvBw>LAc`wsLtl z!UhnIGPkV+s_5?kvyH$?f-jKi0CWx4X(m`@t9)fP%dD~BVqWMiex8s$W{8@}_T{K- z5jd)`T9{(P9n?p+w*P~w@pEiK z{Rav`D59CG9{&R!JqOg`KVaymV>fiztOb@!vodVNs%32xPqp`>h^LEB+-L785?t2v zn+O!gAWztBZkq^vb_uK@8^F5@Yye>&J~jY1 z!LS3DP+Ox8^Fwe|i?$0YR}U()xo+UWDNF_+<6+mxHy> zu=&uWpSLVWkd2kmAzuylK70zD3^q9CV&_b2gj#2smEmIvNYTfL7uow_;-%sf?-L&o zT*GjOsv=Mv{zJILatVxReau&p`KCJbGw>wv$^8S+ z2x?6Po0m0&EAfFW!D*(;vxj6KO2n`w0tdYu0pGH zQZtH5_=ecTZ=3sytBBS@X&(j4e*Z*0Db2*5lvsuj+6;kNVW&#fCs{VNeNSwFx!C_w z)OFUTOS#sD*)Kny4`K*B!#wN^ywlIwF!1$QEeIPZ_D(*>3nUo(K72;dYcX2GBP%C| z!WqVLkCs}&zS70S48o2EeE%MhagmHAgvH{8JDRc*n{&3WtBOI&>R z^1SGxye_xk>=V*oc+qEgF&DgsSTM%mEsMm<59j?ld``fJ{ns9R{EL3?Z+3B4&EE_2 z!?`W979Z}GaC^qTxPx*EKD+VZ28(|&FJ<^t;8W!@fy~QreAxT24YNf~#>c;Cg93aQ zKb&v!SROwT=mWk#GkV8MQeN|lwBXPqU~v}RcfM?uW}-#;)2FZA}0QTqSS zy81ustgB2ParW;uTG=N)xoOiWIT3s_qj)AB`2OI;vT=ule0X^Agz}l*&AS$W`MHx8 zcwcbKPB`I&&8g##JML4*SB&=x7gR3uetzoOr5o+F=}5%-*N|d}pR;v+C5X2Tae*cN zWQa>G@v0%dY>5{Qag8OOF~oJ2c)}1jS>or0xXls|8RD+3>p#`B@CfhYQ!kiMKEcZ? z_I4H@IeyY)@3-y(q<>G8nYnLg8Sd|jmYMsbCV_Y?&VcXr6?=s;Y?j`&u8#hkf$ezTyc}y`BXb6}-=L@w000?*)wT zUp>Vcfe+ijr}7wh{q|z~{v)0DCp_0HD6W9f#!nhwQBmn_Uh9@*aT6yUG3kWEs>Y3X%-C-DWF&T29~lSc(NZ!cb2KC^t% z{E8V>RC||E`*0sK2a_GM-up2c){jmrGuTzkn75jkk8CflShgCkOHC(o8Gca~FGCfS zEkP9=aaL1>*RkIFB^0bHJHpFbzqs;{~V-keAxJy|cS}Q%7g2t8;s2R|@~|t}`9JF;_>tHEd~H*VWlzg3_l2=>VSI9qYSO zn|n@lfFlsiEGaJJ88l!6__$j;uN( zZ`9*Zl?JHYv<0O>nfiJwLid%S`>N3WEcDG=)^FO7;z26eMPA*21F04@E^Wm@ce7J< z$J8xtXh~1VtXR~VYN%g~<4SyGP_(|S3#VIbNOg8>=)|kU`?lanLkI8u zYQa#}*4x)(-k+PYBhbJ_pvqKB!}6BK*2dM1t;d8brD;WTt7y&%Roj_I$RV5s!O3*? zcqrOwz;g7aU%4JSyDH19bu2=iv3lB=U5z*z%qVp-jx0l6_H5d^CA(ZLoxP2;LwDb{ z-sM{{4M;mvXK#IHTSx1r&7J)s@r<|ZQ{{q)i#vN6sk_A(6=xFRg@5MsAr`%-ck4D= z_CS6~+m?>5P9CFXjAM@xgNbaiX^(7NZjJ<8wRC9;2PiI=h3o-Ict0Czu{*VOOJ~X+ zo!GJU>>*j53-JSH;kk_#b;{itfoX#BeRNLCPVmVA{^Jc7qT1QE2t!F0z7wopq7__^d zom<-FXYfSZLkF&i)==NqyR&X*dsk;|&rTeCgX3=6Gjq49CDpR3uCAda)Pu3(1%FX( z9CILImMw9tB|1jikB7Py2YoIIgkc~(K=>#A*;-3kx9{1s zVM}L6vFSELONo@RX;xa<72BIW#0*FLuqMz{Y;C98oJN`zO%2Oa_06^LuG*!o_7tjr zBUI(!q&@4i|3z=xKw|_W&8l zPJ7wbj=rw8Ui6gN9jmcvW|HR2u)c01ZhXp)P`0!2NAM~h%Q_eP1anjVQIXP8X~x!Y z#`klsXSkgWIEZCcHQW(nk%sXgY}u-%t&Kt3$?iQ`)})rzwZOM|LRf`Pk~7^ly6;r` z=51Bsjx|tfkBhT&n)*$>8_}n1*$_U5j*|WC4=1W}+R(sKwyO3gRLwpeX;+5Rw!N2W zQ{jfYsJru|+ASRewcqT?Rc3N_Txndsx}mwXp+418yR2y`&N_24YiZyi1P9+Xr5e^Y z>WJfPvzX?c-I+U^+qP}%?7*&2Es(P_qvm702_3!^R1$(lT(T z){t7Yym2{ZHML6{KcTr}XcprS>8sni`odELcCXnj2z_YF#x@MUn9-T;4^66HXP)-Z z?CASz{Ps{&jHBrP&AFimti;ylMl%`41U18X`?i^O+O@TA)bFYUd~!QrFqLtgowg zQ=Of058wmLRZE7GvW`OI=D^1V8`sY;1V@07-@}?lO>gD_j_KJ4`ij1cteR60ZOOGN zndPra{-Y+0k$x%r2)o9}j)EzdTq5hFt?tT@4Q)J_uJ)K>h?Y&$3Ev4*{NCTem z>n}M%9;b;?sFF;{TQCXN@V2e3r)Sf4f5B?jdi_{9lssFisy}O%)3URtw{vsd*6z-_ zuC47S{(txo*z6iN{k&~MW>&@SH%lgK`js8LzizJ=o19zP?V1R4(G43ooy5d2OS_Gp zJ<_Dm3+~TL=>uk&=A78sjpcS~OW)>oSPxTiFxX&CZ)S#7ns2J#8E8BW`L;h=G?@j) zvbNs#joJAPFTM76czjk7wXQNHt#Hi7acxsm3Zr%l*94mHWy}MyCh7EN${eaV)#~j= z{|b9zy>DkA?92SIUQ@||$NB-A?26?}k4a%#oL(npWqT=x8nv|y)B2k@O{-d#q?)j( zOsng-W!9|Xd$lyL z@|WfqpWr3S8u6~`0Swp@?hV7^L9p?&tf9Vf)iNhNfyQX;G_I(#>H>#GRdEv`m>vYB z(D)MQThmZ`bb2meE6{9FWaZA*i&=;UGY7MuWmm{q>xE5Qcz*6&Y&6Z)vBO%5W6vyz zjtP{R%cj?#S!o_%hoQ1x!$_O+zcK$0dB}ew)~s||S{C>tp++rEef%++JxjKHzrihi zF0ntjVMULYyKqzQ3T?HjZE@h-fK%QF-gA}3?CzUgqy>w^P{)NCt3NJ=D{fYJiI!fG zn-$3Z9LN-HKu^^crFGZ=ClHy73iNDt{*nqNG=6tw7Lb_n!L4kUg~xQ5*wUx4F1EX< z`wgk`_eQHSHdGK_B6-ziR?L%(EAOM~qM zLp72$YNmn%uzi21Z>X&|Q`3}&-*hwLP7>Pteit>3J!brC?%T43Yu2nrW*c_Dtr>q4 z!py}R>YD2-9R9D=LiK=)HLn^?j&ZeAvFQA%e;-1TJK?Z(BIUm2<}1? z4n6^K>gy_-gFx)xn5}?R=ydzQ3jR13+OtXTPH=O`?!Kll>BzQ=|6sz*l+p@Ki?^M; zdAy^+z)T7_AINIr{TE98`n$ZK=@xQTkS*m%*!oKy`22Lk`;4w9n z&jz!VXjfBNN$lS>(&^afnJaO#=dj-m^YAn?Ro~cByKpIXgEB0P^?L2nW^}up_oh2n z`d`-5m#iFH-TitF%kJ;Frnl_ZZ@_6xuN_`n_(R?P9z!r62O5eov2VsM9v>I3$Ko3u z?WWCmCQ)Bk)tt7a?Y8PSbz@nc-W?89@3&jU`NU0iOOEE2KKt;V-tNvV8}L9=OR3OK zigqc?=%?Kcf5SMHLhshgRi)Xkf)=xW$uh8=O>K;GOc-FB$A9{gm7NUNJ=EXM z>DjcavzLz+DLv4OU*T@Dtko{Y#*Bu*gT&!&mStnb4U9ClnYT4 zmNq#0i`s45R_hV1St4l8M;oB(%|?7yfzcHFe$ejAW{0Pr0@#T)DjAOj%m$<}#{t^} zW+DSlPO~RmW_r41E9P;&bA~n&1~B+sYw&?WFwU4Ix<5C}Do?1#OK0ETblDPq6vl|z z3G}N_>yW*^&&kg<@}-}Mg~m72#_fd5pJxSGJYbie-Sq4i9{7wLGmF;drNP5V>lT~a zPQXOFqrI~KqA)!`8Yi*60evLMi1pS1mx%OAK8EhsHV-IW#bta$tJyONZ}*y=#L)0a z>ttuc@2%_XHqyXbK`ZK4EzNwcTWKC!S7lYr0L47umQ2Po6wEC%dKG*k5h?$i5^ zm$M$Bn5SFm5+1O|Q+S+aY9eIo|13hNhy2eX%<|`0Sl8-tbN~IptR-d3nshm=!}L0O zn7}?N_!^V>ri^vUEC&l_unqQ$O!)37x+(iTlC*B)9{etmUFKzcAtg(pe2^K1>sR&j zXnz1oPyD#WWiM=KBD_1jpaHv>hsi>_oC- z6FkS1l=GbICz4r38OSTMa~9aoE|5bT8rGm$D$Ssj*72WthV5z7BbC-%<_W$T5sbot z!r@bRHp{sQT8r+|lYegP)h%r{v9r3_bQWy|1nYP6d})BueBdl(e&3+qzEYMq*RE<^ zfv?##_M1O&yUq4Im0Bgytl?qLtnbZUWX7I0pIF*Cmf1`R_rqq5(Y$Io9+xgo58%NQ zsG#2dZ55@Tw(~1>m=g4xiDYkwWgFK{@40E!FT_lq^=Jz}678`FC{S8zfELTidb3-rC(Wy|}t;UfHbTs*1|$%F4=l#iiZYe8pmW zdhsU_rMy#7W>%->&0L2rr+s5_cjtC|`)BKx;;PEIRfoj*_OgiJFTuyZ_TgsfKyp0^ z2L-&p=7E}@);w7A*#2|{zlejL`|w$uD6ZKPt2uK}%~{c!vvX_q=G1)7t2u`$M;2zN ze5mGOs@<=+eY*uzn(HO}KaengAmm^C;ZLotCsW?A-T7moFwI|Wg=zXpm^QlRfZ5jB zwr-Q-&cJOho;&t-?wGl(+KCnpT9y}yM~CGMcMoz$dZXOYZqgm&jgL%noig-iy>07& zz1y&l0^|m=>>w0>eGBV1-V?$_?UWR6oC17?VvUp~dm92@--m-a_BTtqV zKhO>q&H!m^GbKGg99X8_|90EI6EsgC2Hcq$SaH@9i-CoL)I;B`8(1D-NCHix?#p!E=pE_k2(6|8_j-u`3_P=rA z6_NaLP4L4*_Nn2^{GbMmiTF?s-L$!~|D7D$ZFai+L7{);=w=x(EXV%V z|1l;-e7Q#4^9QT`b=w#4LqtR@2ZKKiq8#(phEG`E4ajJ?EWW<&S#mExZZdfO<;$G| zMp$1C0+^0}`EuU`BP>^dfN;O&%RQ7O#{-}JAC*$4FLyug!{xp2Qv0J!mKX0P49fc_ z+=tV>1PW+F|MK;{4n|ntv(U$KP#@n(MLE(Vpe(HKB?NG6^Dkc?-?bRl_fjZ-cv)?r zZ&8-MQ&3s^d}Wd&xiCxL2hdjvKJzyeA3uL5X6aji0p&h~`N{IX^$ukehI@Pua9cwLmVMzh2~T2r@>yjK{~%A73ZT{P|Z)71H$!38o*`mnFAh zj^kV#%AhZIQdYWqZgHHy!cmy+M11^o_hjkI$4k1dM!0|Z`uL;kjB=nsUjQNME5XOt zcUhLc>!I&>UkT*=+l#aGa-1)f+I#+|K7RIP$-VFy`?d$l@bcvz&B`C&D0Dn{{^eKUL*Rw&cNg;K z_xFcD*tg$rA&0Jen;-wS-FSnmPXPV$vJZh=aJ{+Paoz}}>&p>CY-jhm@B{Q&EdN}5 znC=jKn76RLZ5QIb%YNn&=Ig_4#ueu0IDh*%9Ee|_g-PfS=Y;8nQzV^}F~->3rB!$s z8N*|c9Vx@%gR;WWxr8ncJxFH!kRw6PgB3Ev!!^e6cvd)9Vd)D8MrVcRrt;9`nI1XK@SNf_fjiIioN1P4dcH8to-2KMrsoOM(~W)D-t5Je zpT0aNn+^>q5c8aw=A{&DRV?{1w3q2X(wt)sL;DE#6-;LdKK@0z-6w#g&&r~|okgQt z4lc^S6i_yPQK*SCe0~=Fi7a|!7QHu%z9x&lCyRbMi+($c9v13im>+ZcpYlw4aaMSD z7R`6EQe`zh!!UXJlITf>jye8##GYdq`U`)YU{5d%{lim|=Nxz#`h&MbHyOIn8H#$M ze$GLM!5a=0z0c4?&GCZ_zt7M`PPf8o_hD#nUlh%Kg<)ti%+^BqS?ECD z5!F+cfr9)8G2zGN!B(Z+s`W(<^sL5TFAtPNu%kWT26hl?m(%}lzq_B5ji0^Gi984E zbo1-gV1IX@94^cLZC92Bvc9St`WhNTGQNWv3Jd=VH%npGGviRCfxbr&3J!fiKT9PH z6Fjv~2mRZhUZh3MW4q879Rn9Ln$wPG_NanDe*-G(2S7gCR#zyp{R(S(lPOSy8Vh!T z1`f{N`Z<79kN+K^jFbcYp-rQ3`q>HWM@&0PS(dYV?lz3y8VnStx0(VL%euc`P^W|X zn>29gY_oltaWgzFc3;+2t3mhZiFXZxY@kU3_dwnDlNXg8!Ikjur7^?7Cq*l#z~< z+5Ml$EW3X}GldI; zCkw9?{!aLz@L>1@+cOOFPUaI$8O?bLayIPA0=ERY!hw} zZWi_kcM4Avo+&(6c%kre;Z?$~3$GX6BK*Ga9^w7MM})r;{#N*+@HOFIh3^XoVg1T- z6$*K-8tKtO93o?AobO@~hp-qtRCv5_tMF9emxMnMJ}CT+@E^iM(IA*!ose%fB%Km& z5uPeMNB9Nd)xsNu-xJ;=d{Fqf@LAz2!oLdN7e=wnW%@yHLtzfKADHhU!g0b9;dCJnQ>EMjVWV(`aFy_r!ZzUs;bvivaHsGz;aS3q zgjWf_F1%iNi|`KNeZpS~e%Ci!ViT7SWK}zV}u6_=L=T|+k`#BGliE4za@N2 zn1k&X>YXAyOt?(AMfhpqSB19=9~Ayp_($PK!XX7#|0H3xaFOs7;rYU=g|`Y{7rrkn z#P$#KJ3&|}ObPc0FBM)V{Gsqs;nTvGg*@z(djBSTNBE&ICt<@2grkMyg$E1g3Kt1i z36B?c3A=?mg?oe-2(J|Kyi(@thr$Pie-nNnjA5ILatYyZAr2ig{Hek!;auSn!g}G+ z!qvic!fnD+h35&c5MC#|U3j1Hap4QXKMOw)#v*yA-}p_;c}}68>KNSA_o% z|05w!tE2t`BJ__Tq8yWjGZkJbJX-iE;Yq?h!p{pY6@E*2tME?YeZohDPYQo0d`B0!6aGc~cZCsb(lh^2;RqtiH$gaE{Fy?Y6U^{M!Y1)sg&pE=7WRmLmhg+h z8-za+J}!J&_^vRY=dIGd!V)66}q94dZ|uu<47JYLu#>>(oF4$-Fw&lLY0(dP>< z6aUMiuNHnw{98rePDH*Q5dY`GrxpI3@OAOu7X5)RcP!$goC)D1;cVd%!lgvaL3uz7 zv6YDOtP`Fn+(txxc8We#^yi6)ccJL7D*RUQZx`Mx{v$;6J5LcYhkRD}g2LZW_&-Fy zCps6~^2}F)hD4XNX@R{sQsqiAb-Bh`C;?uuc3fBJ`dl`V`S;5+VON;g=Nt zP2yn3xn6jO_&*^+&x4|$QuwpNKa2k!aVYlBgpu(!UI7vL94UIN=xL&7h(1*G0?~^_ zFBQE;^s%Bhi0%@7vglJppDp@4(U*z7nuvT}E4)+uAB%oi_`dMq2{!+8h!~US3y&be zE=v^NB6_XpcF`L}_lVvh`V7%~MPDrXa?xKCeFG8c-YncF{==dl6TU3|o1#A?!tQy+ zK#U=U!l6XudkhibQ$-&ldXDJBL@yG3wCL5MKPh^>=o3Y67yW6`XNf*n^rfP|B>Eeo zze5~}lTd^|5&se4qDbde~eogeBM87NgL(#Dk8^4eU{i8&W6J08Lrs%n%Yl+B5gK(Aj zDbel19`R2Ro+bV{!YjnTTJ*1luL_fsZN8=w;R^=~%ZMoVT!q((ULv|h^jgvFqBn}} z5xqn78KU=!zF73-qQ55kI?>-1eTV3uh<=2KeEvfCg7~is|02FO#mdbU9xZGY?j@o= zE+E1dmk2K>qTJUg{6^8YioRR)y`mo#{kZ7oM886W-ZzA~Q!PD&NIxJVY^-p)_=kx; zQn*I^6mc59qafTS{-=q^?{3lOioQVfmqcGJ`g+kf6QS=e@gF2kcbrFrPmBK&5&B;j z{f>}v$AXQqR}9V|4zk}lBhD4QKv*waB5V@23Xc^YFWe~X67~vr2=@xl6J9L5O!!sd*M&C- zZx;SY_!HsJgg+NPDg3SQ_rh0%e-i#p_%Gpy!d%zdBTqP5I8Hc4I9*sNoGn}+tP!pd zwg~y0lXmVBo+rFO_-)}$!XF8LB79u%zYZ|1NxAh#yedd3MAizl+0sj24a) z@;f=kAB2Yr4-+mFE)uR19wR(n*dgo@n&)ju?<~>h2(J)cDZEj5i}1(7`-Obo%lz@X zJjB<8e-yqi{8%{HvvNhkNy4eZIl}qEM&UByal$s?Hlca`hxERFB5)Ac)jpD z!h3}G3Lh6fDSTP@y6|1$2f}wp^H9^>BWQv z!tugM!Ybh$VFMBCutp)z5hJ}yc$~0Jc#^PB$lnl9ez)*!;km+#gqI4xF8r487UB1V zcM10ievO86V$TSD`^73mF)+47s`te`7Io9C*a4-y|i~iSRt$yE*CZn zdxblMXA932UO~jZ!j-~r2)`}7RcM|oL+&2Y_X-~uJ}G=o_@eMNp?Us{_-~7TN9Y#V z^mB#7g`;R2y~evNdF61`HmO1MFIqOeDJvhXzF8Nzdg|0TRsc!luW z!kdJ*3x6oQSNMSNG2!FF-wK}>{#p2z@L$3Yh4{(8sjnfzk-{;;65%vqnXpQ@P`F6A zOt?~bjPN*NmvEc#4B^?rYlPnr{y=!Q@G0T5Li0Qy_460e9}&5y%ID?4xG*6cAxsJ< z38xC@21WARd}WF8sQznyM#{(pA~vVHvfZ!BZNuebYcm@oX$=zD5N!zY&zp{t3AdDdDY#;fCr=*Kn^i|vnIS+8avZwl7K zhK;@1mJz7gIk z+TkGXXh!-3m`y~5qXJwj6+$ekzJlneAFqOT^xp4SSm6W$=aLwJ{PpYT56 zFNmn8UkjfiBEQcHUmzmAmxQkok=`GLe@W}aEdOVTDEFO2l=mqj%J~l>%4ha7P_9pN9{}aJi->X* zK?n1{gNXc^^)&MPBIzmUhl$g$evAQ;uc<`j2dbRNY_%VxF++3(5pj+e-9beDc8lIa zL_WVP`f4KbYy1KFZYGU<8-D=3k2Lac>KC-BU%!4p`}Je&3)qRdi!VayX*Aih5|EGoKy`yDY%PZ$pR?ePt zXhqfR;^K;8UiN=wMa7&sbBc@czOJgdhJSqgw1%aNTo)PBH6H4wK0L03tPxiw`d9W`=BD$-(#e z;3MC}nl*i8=U{MRWsU=>17CR0S%!eLz)RC*GQ2Y*OEQwni1nWk)Z*tcQUepCe0Cfu zMo0}l{^ggg7rFlkZKD8n>*w+y2vN)BM%b@E5|J9m!-s+tAchQ34d$(0Y|z;#YtC}?!;yok5S~+roJ1zFAIj`KXa>9a2I-6WP%SAbJ>eOjZgGW{2S>EA{`^cguLyC-~?!fcrbyH#7i+q z7x{FqrAvG|V(D2v9d+{dcoSm31|1($3`NBz5%lMAexJ>o7<(S-A|*NTYgxKU3XR1N zB3UA`AkHt3dXq&CiJtRfO61b`)A%N;ceKc+_$&BAq_y zwQ+u}##^q?Z3T6!9dAV}f*veV(i{IVH8sWf8ZfV9j~jmgb0Ke~$(2`fwHrU0bhC-< zm0arcq-s+;>Jf8m(86Z)LQAdHS~;v?Kf z5}!uSyhJg&qntzo(jVmHyao&8zRf3{gMWr9+>!g?yNEjk@7Hy5KVt8KhF`E^S+kSt zxR%U`4}tM=BQ6CaC9(K&=*#t799Iu=i1CEnT-Wvz#b}I9ZdBCdcmt!x+(AaRw4kXT ziu2r|hOCMI19r&GcSjgM1T4`6z4oS5x0+w zK%~OILwQd0RX$cs3PRD5)p%hgEYOpdh){?N;HhF#1tDmuoU$&k-Y zX2@RnFGBJV-HjgVE@sH<=%by)+w>o2*qbP{8?ABM7;>@8ko5>h2!9>rMjKr|g-onR zEjWoXl+tzb_rQ|TWhTn75fqMYa&M&6kMPe)Jca*m;&1pLNgRz_c+RkHHoIt_`zWRO zIL%4SX3i4xp*P|TdlmL{qhE91X831~e=op)H_?Lsk;Do3kC!aHj!`rEEu&-@pOLxI zo7^cVbK*uc6en>TGn{CIEh33c@F~RjBnlM0-TfG9hvgyHZuCxf4P!ixe@=oAqTR%c zrfi?0A)Nd^D2d+dRw8^@2im9`{i*vo#>g?bnoLV4Zb9To;xZ26PW}m~kLaT=ClUF4 zG86rk`(Fqj)&~D^qffg(X6yv=<0RVHiW7&Sun{N!6sU?m@A9GMuzFJqe{lI^GI1*U zDkt%Ev}xog4o>t{_fbmq7E|LN-9nT-u@^}>i4Gdh$=^=P{MCJ%QYRS8{KK6^sauQ} zd=D-KsadG<=)c_22pGoiB)iePNQzRAz&)JA4_TFo!_l*$RI6apXi?-y%EAF5J1=q} zWv@oDoW%E8xWr@lA4$B7|A@hFA4iXjoX8kILwO?6hR6quF_@K~_#!M2N&EvQ%}MY< z+mOUfsF31B3woJ-PGTikyCaDw!9zFA9mL(S#BdY~Er;s@ww7;^yBn^_FRr@L6Cz`g zOyVh1`47-GiNR10(|(nv-DXlB${z#fL`Qkukc~fy{6v%97hos0_)o&p(J`35kaXi` zvdrT!`jCvo`LpTh1dp{JDM0~`r*yH$r=xi}(Mm6hEEjdqrn5Xw#d6#UP+D{L(b*YGf$i(IKw+OZFi!FSx#gWIL<*i(Q%OYq!igN+trv?6Z2L>G%QM2c#?6R3#VMwP>w(W3)J zE4<68Xa$;obY)l(fAJk{$x^h;`z{qx+o(CHspuN3Xz1B!Xa&)k-qQ#fP3s}$(aa*c z+tEw`qmGmROE`Y?7^4GaX!kCJ^@@IqN{Dvagshq0rq~8?jG149hebDuW6YdnhEEh{ z7)w3{z8dWkXDB(pLz|3l5oa(ti|7U?i4!H~MYvV8Tbx{SYN@B!aw0A`tco`8dgOJ) z%P7f6*2E4I&YC#I<1@#i59pVtN{?}t!C1OPcZ*|6!H06u)5S5Rm`%!4|G4q8wE~-F-j^1ol z<{*)RqL zxE~#do464z2+u;{C^?CzaUV;3fP3^ZBhXdt&T(>11`fJ+C}Lom^8l)CFy7?l42ku9 z3#?=dqnylJlp%Q~`jOa6Plcztd1t?k`$Q6KC-F@*7B?|v3X6~e120LO zhHg6Vn#UkB_}AzPFUY&~%YfuJ(PQV`##`odG|Z6qy{{T7l6;fY?Uu?(j-=%GEfr1v zlj?q8F^7dJ3aI&3YKep76 zW0U+sW!__!Do%cZR{FW6CMR1c`O7!p{>FyQNM46tChuuW%}mav<)5)sS@JGg={ZZ4Cw~fG%6tA{qopD_ktKS;hE*n? zfxG9u_;V9hmE`MJ@_ujaIV<@umhUAiSq=T5Ua{2dug*p4U$WUwJ{2^za>)MFN#yxZ& zc@fvfJU-6X>EwB?joJ|(Nk_G+Fb$Y6vAvSLZk+Gx%Ny*LpcGySzH}X9 z+mBrVQ^q)DirtLF$K>3O|1r)&Vw~m1IMs`BZW!YPJH|O(j8nE4mk%-iG<{6Y>x{zD zGRB!s>|MkBh)i~`u^18@lXEcTIpd6tGW2--k8ynyD>d{_Ae#Rwy<@2R5$=cn8FsAB z8{sBVjQBTL;iJqwdXIQJy?wN6JGPv7H7${J4~8UHgn6{_7+J9(zMSqjR%BtEU!Thx z=h_Z)NPH@V$BP^uN7Xuc6GV=RZ=vRiE<3zP$=LW-ns}0XGlaM^^kNCf5|NYRZ<3rW zvNZlXI@A=AGva&MTTB&M;lw5&w_|dq;D4-)wkS9BURWf50W&epoe%cd8St+78-rFL z)O81a9Uf!1@~@jb9#Vcg{}`Q2PpH(uhr98-Y8S29=&bHTbd z5|*NS7M|mUSQCzf{R`_@jZ!t?8JMc@1UiV%`8+(bush88Ch}jnE6m|zn8MTPBYv!9 z=qU@Yq67GxcJu^=*U=W@jK7_+Cb*&G$M1uA3m3T|-Q!PV;g)BxuBWQi8LST`f%Pdj zl!fufQT?agP#(swp;h*{;Y^HXitlG+;_s-A!by>ECMw}Gg$HM_Uco3_Se3zA18*pt z9|>oou^6m1k#Huau^x_(gfnq5rG66$TVghKeUzd8PIzWv)C=e9NSL!Qk-<6?)Azy= zUN{r;SfElbl%nGfb*ChX^1Z~E#1K?xWU`Z=e?-0q|MheWZ_62hy`1^^hvoC@47sk` zSmfd+I?-t?Do0l^Xf|%()l&`R6}kEO5YDAcywJwXZ7iCL{sOOEFp5CJlMxo9pbaa` zalM3zna`MsQizVl$TPSogO6{`Eu+dF4&>gb$VT~=LI zHFHk&x=p>ucD8qI+Sb!~Y+Lu{nH$>MXI9TMw_9-j=uDmnbL^%q?OlBxoyTr&Yv0HN zH2$AZhSP}4&1uBt{%OSJ!D+qP%JC-3>O(6kQaBNrp^dhT|NGfOK9I+9*w`s6E3Zcdl`rnx(%Fpz zGCRusmtU46DD=MC14#bw7r?ix@e#aXuA_5(TVEH>gTpzYJ!KoQn}fr@I`EJS_vmqD zcM$N?9h=)zJS!O#Tp3h#CYfq)@0%M6>}l__)P}CD>)N{fVD#GlgL(v`yK3Kx!=T$Y zSA)XP*t4^zw{vqUBju2S6wW2;?A`*|kRJQMAFD+)E*@ML9OBo7gX_94ruM|ley643G(W$RQ#|&p0smJtH8s@Z6tnG}INKB_-ByI|dAga;uL|AI zLYaeO;8D_4=>4}DXSvSy&vL~%zuo>x*_9cG*0a3kG{4RrIJlR}!r5+VZEje;xOE9K z+Pq@<;#A9uMXeb}bXW4^V4kIoH@c?GnTO`ozs_z4Pmx-5=5FX%(|$SacM5nY6Fe0g zHp?oZ&f;sTZE0y--H@{9%=7g3EV;}B^q_}D#o4g@*wZ)%ENQRP%i~4q6YXf1TiSSL zv6FHBVo-?-7q_NX*VUzh!&lSw>jzn7_EhxD(AKr770XlY8+Bx_tGc)tD9D}rqU<%;%OjixjXy(>doz&P04g7Y*x*Lj-y4jgj=WVWZGTY8BNNl zKb|64X&URM4d#UTEWOtE`+3yz70de{uezibXS$|v9OCkpMGeg<6)qJ%`P3YxinuA9 zkXX0GKX%&MRY!hiWgu|5CAG_!H!Mw6`EAaeWZ#XG{<2%idYr!5*SV#AXR5co>%_E! znC`(bo(k(CwbbUe-u8`w51X?$gSs@9Nk^`&$05G8%bJ!p*uKlRneRBEgQ@+#EI0s_ zZ3EAaTe2O|+SWFL4V083&=<9-p>-RIp1*+6Im~=}SQ%YeE%R--?+N}xy^n+xXR7@-Ti=mm12(oS65_Dl{YR3SLCU-Rkneq zI<}s?CEat$GlF4sO+)R`j*VP7M?+gb>*JK!DyI!^XixQQ+_b*m_-D^HZEk34sBJa< z7W?1qb9HSm6^wMD*0i67>^s+z#>Gp5W07~PN59kmNMs$^>L2zTZeGTQS>eHH)Eemq z9uzW9rp;~={R*9G!6~v!`}OMs4*|~Rwr$%wJ1_`t>$CPu8{Lj*rmy0;wBea|=pJTt(6|0uFrdBm^f?z5nvz6K` zH!fe@(A?Tkk3p=_WXUwcE}XZZ8Ed*NWOk02N#e}hezi8xyegF8OdaZ3!w2sUC=gC% zK!JV@&^k{j;ek#|*KyP>t>#2(HNi?X!M<%yY9S8mH9Aa1t7vxgG6qGz-*1SsW(|(D z_or9r=oUBDFRlB(*!vRrx{9*>bM7+tG|g?(eJ{6dN(*#J(sZTJq)FNak~SnMYbB&f zxX5M+njOBXD+uq!@&Z%y!ZK~h8xO>eS%y)z8VU4~rO_w2#)8puK z`8A+I-|;N{LC%^J+}&MX->9?G;PmVr!xyg0EEqTa8>E9elvNs8gNZd_`*oo>|*f|X1E8RW|3S>}@?l9}8MvuR0rO%0lz|4k7Mvb@rtmv!Nq>CUF+7CqKP zJVgg;GgrhkS2u-DT*2JZwYei&@X;Hhn<~nk_U6vc^(VCXt=Rt<>)}+~(^pAPr&&&e z{tm^>x@{G>y!1GSH%M2!2Ny(Vrf<~4_jD}Q9MHLWP1l-sIJLBQAAs**-r~EllwLru zX+NQKdT0Ce*5WyE=~~yladl?;+G6~-ZfWjVGrc4;eFgsUy?(&jP2Kb7XQr=N)4fR- z^7KxW83y)Fxbae7o8E}auAA4kP2bSAX>HfK1MD6^*E+jK>xtUDp7lDYnf^RE`fmIv zddxKu52wBUw+Sw5UAvak;-14(FI5e_WKh$B#@eICn~9Qh9F__2@h{)5xI4DJxudN_ zE<=~*U}n#~jFa|vPVl8sSKm}o-&9voTZfrRW7tQ@7YIMEf}UM}XRWOBzkE#2^!&&# z1oSUm9d<{TE0SPn3m!Ua&KNXtnTzRCN|KU#&W#Bcl#63sXg!xi0Gx9oj{+jTH@z`o{W}b-@GHR#(dWLk14^_uC}VOdS$KOE9;{xQ+-1Kte{c<^DnTz^ zyRxRSy2(r>qxGxdu%_CIh6aDOVRbd{Ae2?8?;w;_zV9HERn%cw`6H=my;fcGyGt|3 z$$(T-Rc_Z9?Wf0BRaLI%dTX&hC3C&-3yg~-S>I~2>=l#nb3OPr$W@!eZb=$%P|al_ z(68+|hwbc%JUVTp)V-mtDOl=o{JsT?$C#?Jn&Atuc@sL@;$At{LJF2dx#p-RV5~(A z6)U;^$yxByrD&+ImvZ4W>#Gb?!ruJ)U57QD37eYky_VFhC~q_cDsw`q===umT!&#d z!?qq&X}J^*3%n~Ef|^~dSCdMdWrsCX)kOV9#={(+t5xNg=U3NOHThFTtNrP9WcyR3 zs-nKK$l-6Xd>QumHnpC%x3Sj#1Tl-N;YU-nOK1OD68R2AnFl?G8F6y0b_TIJODk}O zL28RGTm4;Ya*y~b7Oc|yNUO{~(yCw|X;rX~w5qp#q*ZISXx@^;R_$>gX%#LH+tk|J z(W<8}!FRe?1-G{5f_OeA#ajp1Fab_)P>+h63Y!jJX5Z%0Iv_$LF z+e|*9-Xpbs`HK45@*efHD!a4d?nU_I_DGPmR2ykLxn~x=Oxh|}me)jknaFsTwS-p` ztUdYtzOG!{M{p`Dit7VrsafLKichzumJMy#9^s11#x~3=TbfX`doCaAsdfAFHy8BQ zhjhrn6oB1=&PDK%*Rxe*t%L^s$esrtYe6DhQ_Wrl3}W(oq~2?U?k>Yc=14gI)yVf< zWpzXO;u^hWh5f2cZP8^ft5*BrtWn#~hVN_*%eJ#M?%K|J3Ezwo?EZ7Dr3WS5%b119 zMSY!LnJOzv{82XOe7KO{Z*9mdm0en~v$U>a*}-OYr?aa=fApBGfY$D=ZA~rPP<>=g zkDogJ>*DjbX}F=L zdHzJ(8s;#02sSfx0=?B=jKk5sP|pv;1x9J$_)9bU(^Q%{m zQkhrm1n)3XQ*_3x9!KZH>IcIeRW$34oNp}B!*QcEdt8as8owGxC%@Kk6McK;^E!xU zk3B91`o{X2U}2ZmuhV(@$0ZX{PmnH zZe5NiZ#(g|=H!Q=h9ha{L{CS^wjshP{d8JbVAQ$KY#r7U$)DuI$h~>oh+8>YJ=x zKe0#OWTftwuWVca@rCLh!#Wpy{58$u=rhUV==E2#Y)^|hI*jjP*QTiaSQ zbsd{quok_!qjR74U|roQp9ATyX39W1?lf4FSi9$XdTptr(y7{hu{UiRdmk zJhyG=5x^P&vKQO5@9fA;Z`vc0NXrOTruN`5>;`gXD~vIktH=XOo+3@MN5a-)W{>#2 zJf`le_FTL=o}d%xkz)7+SzTIAf1HR!2l5;lv--(BXYK7%^!wsyQS7N~_xw_`W!8E; zq?L33P4ym|^``nzM|8<$eeCu~+lugQUYX@HQi3@ej{Qh|tfP@gbCkBoF-0W!dOT8C zx1vvkjApml@R{~pW$d!fk+GgriTYz4G*j@8^AD6;)}}Xq94Q#a#7}>a^bd>?+W!b#Y=32- zcLu&f;r=7whVx2+={g!}JwVOIKO~m*Apqv<6ZmI*CVvmXZs*aY`%$>t@qG#LF+Agg zv~&>P6|md+OMozOfECz(6!GW5U#{nUJ>qXD{N;MySK!ai-?hl!Jh(A`I8_qlk9U#a zFDU0PfykA=%80+Kd-2yH{!IB@3p!W%ZGyXR_9r5=J z=mNxJj0r;>9{3BM_jM4t%DF!hq(Ac<43O(NQgFAQ<3;N^h9W%EWxd#2;saP2X8;OFm{jGz) zT=jG){MqIAx>ZkcCQavo<+msj-y6N;Z+*nyoA8&boG*y@%Lkn+f1ifCoxf=~n{C=r z#>(HFk@zkFoh#kvBL1!go$GxJM&aA#cQgFudLO)##jdB{g}+?&bbt7>pQ9DeVfw4d z)^i*YN%xgr@^@OqAMccbQ(%n!s)#>&GCX=V_J6216iXU*p|#)H2baWdE#!+R6% z_VaGQ^OoVj8~eZg@DH|re%}3J!Z428aO&|A%fVQAH;l2<-w~*sI0G0M!y65McDmPY z2+Mf}e4BKqN8&pk@g0sbG{(e79j3Gw3FCeo6y<$y#*oMV%80*1s&K!j@g#oeuNMB0 zOuJ#-1%Go5A^u2014h{Q!TwkHgofIPb%czJu`3=Vd!!nOKkK z>^#zOp0XTFeDIcKZ1;ro>RUE5p7ll;znv4(RsskJl?wW~!Z?__&_Kmrgl|1Cyu~rH zvs^;Mkv=qWJY_cDt_cjE7vb|DVrZaqCc@`P9h$h4j_^^TEfaSJMEE#fYMD6nU1aBv zBW-Bn;AZo)DJXV|@NpK|GI3`}gpZ@9mWkugWp<1lAwv^)hDZ2T!-lsw)Fozz$N6W= z#L*(N`F0Cs_)!r)52=SH?u?G`(HU4K?u?1>IXezb+!-6;a|8=b9I8pO^EWfKPAHFY(F${XKI8$HDtmT z#|4Jj<+D$Ozi))UZ-mdDJv4D=dPu+)ci01mCLZ*vzFXWW4w@x?UKKwywKfR$^ z7dM^!^fJyA=^*{|5?VJl`93|xIZpU~`lFpsX3_gP*Jsg#9O?_D@zWpf{8?x}{ejTW z;q(3U`#bvz?WZ@%sm-GEoMVOd)9>eeB8wj3T$@D~IzJKGPk*rUlF)woDd(R;`{|E$ z#z`0Nr$59wFpD1L93ixy{zzwQ7CqJB9eXrBKka;5Xg~dl&Z9!p58Z+@vPL?jur*w@ z4ZrryafCDITO*b^ehECmfXb^`+;-~?ja!7$-NHiL6BZ8;qaZ2A&u|YLLwHZ%808Z z+%cHvlRhdE9`j+ESiQuvR^nMB@w7=itr8Cg79CGZ7>~~PVG{083Aa+hHA*-H(%~>q zKbPs5{2%PE@x?0ru_LyW;}7`2VS=13#g_PMcy#AzN}MHFCI~0(j-t}YwKw`hk!U1%E2|s^EBx9rQn4aG~JAg6jl1Cefe1_Z9dHp{X04?jsUD zP7<6csPAP3|3IOu1y>3lCD<&uR&b+Wr{FfhQw7fwJXi2Df)@!=5gGIKWx=ls-XM63 z;2nbZ2|ghBGr?a8J|jpKV~qFjg8H6T&?$U|(LF6VL~xW~MsPpDM!^=r4#D#Tzb2^f zPer^x68d+7`{DbQ>CF|a6l@S&E!ZJ=ir~it&llu(FypyK@CHGBzX;r^Tbulc1RoQm zazwiSK~UdQ3ObeY-P3|Y1t$nj5u72ozhJrGGC_SG=~A>0p;rs)`$*y5E%Zr(=LmjQ z@M6Ks1+NnPy5OyXcM9Go_<-Q!f=>!QC-{=!>w;XMVL7A)hX{@m+)Gg3y8?eDLhJiU zK~pt0!yhboh~VLZt%Ao3ZV}Y?lp@@jLVsLP-%kqnD}?@r;EjU%UQ+P&y`;bg#Qkx> zCk3Aud|lARG6D0M5*#2nT5yWsbU}UpDEyZRT`Slic!c0Ff*S<437#r=mf$A@KP`Bf z;8z8&7raUEHo?0E?-$hflpJg%#QnE|FABac_z%H6EQ9d*3j~J?juYHRaE@S= zV56YEcNF0}g+516-zN(9YlZ%v;6s8>3GUb5PyYbHqXqT-p9p`p&{qjkbtd!snBX4- z^?jUhAA*k&@+S+<6|5Gd8e;M{3hH|^LEk9!eS*If{Jr2rEcY;6si3}x67=ChA1ipF zpuR^E{0D`8Qt&lFHNcN=u;6&XLcx6niv;z3k%;dAp{oSz1@--q;I{~Uyx^&V|08&@ z;5~v53O+9Qq@cdH5%Ikw^y`9e3HHbG70Y9k;1of9A0yl=gg!*DNpPd!iGm*!{G8yI z1-~hHr{IHvzZU$x;9mt(_&{WSh6(EX7eN;by-2WD@F>Ccf?EX768wzd<$~W3yiM>& zg1;1ePVi5HaZKQtpFx6q3F>U#^3 z&TB%)uw1C~BghL3NY4~JP*C4H2=`S&ZxB35@La)}SYBlK{RNi^9wxX(uv>74;AaG{ z5WHUS4#5Wne|QgF4PzJCw-JDGH|?kf}e2gG%b^An*TBd&EEsRV6(;WF7Z6)fFNK~+ zY{5KU=u+Zp+?OWwQsOa~M+fD|=_?2%xzAmw~eCtQI-u+r^(%rA7l4|@-kGroPvpDvr=EWB~kKb^{8_uk|x3*j# z+uCr0v!C~P?3KM@NA+_j^jqfsE%wKulz3%e;$mlF<>NOD zIpOK&oR^&4&XdmWH(zviw{y(bc~7`{Z>s>*r}3fHt{ual@J^@4@fn0Wojw6x;&b?k zkE`ad>wP-~h$UatkYdbiP|MK0bdrl$Y}@C!$nU00EsD> z1SEzX2!4X|*TghbY$tI$U8gfoxKyeJ^Kc~hBBpCeH@S${w5V?U9IvJ#xehe}_D-b` zcNa9&WB#l-Gdw|k2`(q9OX24vRRH%>R3W}FPE~Dianu&X>MH#$uKvM<)J4p%x(B~W zH5V}`^(uZ->eq1b)K3vAU!8@F4N#B3|3KV$fVQoue0h*M6R{0ezrqs?QU5@wq3UBu zahSRt_Tg$4axy{`(Ela#Gg?Y zA)X1U0x?Wf)LJ}AEkf8r#Uh)m&V$R|Y5+n_QAKc>s_sW@`>6BavadoTarRUEUYMp@ zVV|xN2s;B>-O=kSe%}_U5h#;lbtFQSC`?S8S&H-PQZ)~$&sO{vnxiVzNg zq&Q!#K-dN9Hsor5^$>h6RJ`Qj02PP(fhrGiE>fRGT6Z|=WO%yMQHR3UU5?rp-tKnP z$KiMnZZ`nji+2H^-*?nKNd7)Yorx5F?5L~Z_!Ha=051QUTS0_tauIuQx|+)>{^WdG}^2SNS9QP&}|Upne9aD2>Be@1}E z9rY?4e+4c4Na5FTL<+xgR0fsv2}k`e9CthT!L^gP>j92WIqG)^_q3y$5bhaVXo1Ln zi^qhQXK@JuygcuyFT>0492En+;HV4X^Y@M#i>P0O)GhMzGO8NCdy?P09pO@m0kQMl zP4MO2ju5d6Tq>xCf@p6lg2X=Oo~g-<_buckcA?7^0jkROYEee9i!__pLwRjTJ@$E* z>46{f4rcI+4L{~_LoIfRd#TTld-_xKQp1mXccbiLm$_H?{DjxU@LzDR()6xGzv?3=<+(#hu|Y8}{o0_`}$chsEl zNBgGctHb=k$tO>HVp?g&erC+czY;ir`h8_sIh;>sJo#53wHzS>p|2y7#+VwdXqT5LU7ux}VnMF@7cc zk$Z+FyS#7F^N)2x)VJ;wu#EK^;6v&+(BH|Q54(N?%z<`<&lcG8mm3a~)10_dz-t)t z*BK5|)|`Y>@Hujr_JGs)z&~+cMskC8<0r0)pMd+|E07^Ii&X&cZg2vfiz@Xgckn;q zPtEozT-?MpJ~iiRgc`!nST}Wa94|z1Nzzdzu;QMtAHYv)^$YMbh@Z}hR7V3CgMWyh z)D~KqN|Myp!!_j&o{sRT?LHM7yab_AC-LqxUQ|=S0jYpFC|C_ATy1eRAaN9uPo2!3 zd1xJLK@C};Sen3qS~ID?ER#*?KUq17q)8h%G6zKP!gwz5%A!7;X7 zxmNIxtSK;hV?gCCT8$6=}n;~c}R97USi=;SP%uvtO%B6_;*{lvNK_SIL(2V2{U17 zgvFW6_l1e8b1Z$WpKu9CE?!UOZJEYB^|J|QfV_qQFcv=uJ0^6SSUPS#m(Fc9hhU{GqRW&eXQvA=sKcBN5|9moIa`|B)(9cfeNibJFW}zF8IX59I zJ(TPBRLDU!ul4mS>l**l>e$~4RsA38{cncGK%7tMeD~K8Wb600*IQc9YHYprsAxS@ z>7xn;s`SwwaN?9#82F0oE6bqda_+2KMJVGsPe-$j`)YcV`^2C0>0{d~POQor%xM#1EP= z5ng`XaRz)`p1<%w5P$643F40Q!g&1*+-K&xD;ugSN}7tBs_PHgL`80;#Z9w(qPhY% z4%c<8-`ugjYunO}&E4&d8{3`AhRUL*@}@byA5GPo5S8T>MJB4M`jvs5(S}6%@}j2M zesJg{X>2HJD)K2?owToSm%2F)g_KfJ)6yW1O-;)Wt%j;I08jDT- zd5AvnsTmT7|E4S=s4#vI$xmI|rq+f-{VK6|2_9t`lu9kp7iRcPgpWGc=j$e2URT!y zrM?YRe1eyUsvbOxrEz+3cc&FeeOqT+mmfz%#bT{l+tl+S)0l#Sv9cUCBHf~dQ(eBe zUMnuwBbupu(73)yT9mF;x@pTx4l8Pvul&2VZR6&SZMDstpe2;2`ux0=FKMXHp|VzT z7L=cK0ur}wj6p{IQZM!6JG5~Hss;;C3Y#S#L?Zzunw1TUgV)$_Xa#Po@Z<0+lk^{c zX`5oGKyJ&c>#>AU$&A<5^7TdEk#4a;)r4ZNmUYg?^_!q<)~^N<8DkD|2EDM2>syZV zGvJF@LccIhx&L=6hYjAZyd_=lai>Wq)yCI#w6$$)5BpyII;GG8T|N~of4>N`n|XdV$63yE@IlBu&$=cai{e5~Lh?039~y z)Ma#&>Q&XaEXb6(Fs7(yOIuQ2U9+;jD$qz_>!vWlN(1g}zXg~k;g4>!O!uXSP%GO( z`o4B-v}CPzC}`SR5l_Q1R{c%X@{pz8Iw)8f-b1~Iei2I^bP;O>qq?6By3(+hsKzxB z(x=O-);+5=YbY_@mW;N3zk-@$`nA9VYm?vO`As?O3ea(ePmWGJD|+Fqq#k3dCk^VV z;p?#`TDTIEE-an%>{=Q0N79ptcfSrvU0A+(Q*CqSal9&_+Vqds4K2DGZEEh)cfQCo zW6+b*q8cX2U=Bqzx(NweDxf?-CC_HpZbs>E?y$Q*tCN~#iYa(oPF*dgUJ_s6+JyN} zd3*bz(v1BIAfDJhf-*q2*>f}rltKsPEm@Eflk%*`XnbfDbXYbtR@;$Svp7jorffp_ zv4)cbWC-JeFgG?I%ifv8hN%&C<>=&>v6BgI6?xxvkN97@Z^5`u?4$v>6mO{YmC7&F zg9mu!1Ax;kcYet(9#BxWBT;r%yzJ~)*+<>(yt4bszF&54**#?goN}zyl=Bn$->lVy zYEEYKRyk%wxVriK+A{i}H~^~CbLtVGZWLdafYB@vy7aDHAoR1Qqj@7#5d6#P25@4A zDxxxAn*OA5C{G+>9~nD+j^B_E!hm zUimQoTEw3TzZ;e=tjQW<@&~aBoEi+xhC-|pV+ofh+qhE0_?Z9A_%~r-btwDxH_O3T zPmlOpo{#-Q!?bu@_p{U8u^${zxJ;MsCS5+872KJD#=>zmO&C}m-iCb+En*Ds3!v@zEzPYASSUm13*zs+c z;jiU0K8SAx@!ct5ihwl320P9VP}asUE&l&l(D?f`D$DW4lkn*8mtr@px^cezy`lLW zG(W??oxhWizYN@%Kdkfy`Fj?2JYG9Mo2wDuTtfhvCe0xHTgBk;4&6U%j{jr)5lx#S z=Z=Yp9FBZ<5Vz6k766$yJHDbqe}xdv+L-tZZP0dqFV64s-G|1Mp6|l*yV?At-mlpa z1i+4iW#YPpg${Au(rns(BYb|=R_EByW?hDSmd;lz+h))^w-J5ita zKzo`@8jm(h+_^GL{vyE|!3M!21=+XJ-v&Xp57MUyo+Ws$;HLyH5xh$9TY|R={y^{n z!AAuj6WlGxw!-vY6#S#$8-o87OrSvNFHf*QaJb-DK`15D{-z4f5G)m3AXp~2L{Ohc zLHzYXA1-*bV5^|sLWMuJKj!BI!IK2f5Y*>az~@;``a56n^Mbns^|==CuNC?R!J7rY zC#cW6z~2vren{}=g1-`cO7MBXmjz!J>LOXGw`g zf^!5H3N99;t`quOF4!n|q~I}vYXmn4b_#A6JYDb{!Se(!5WH0IOM+h&yg~35!8-)+ z6MR7MXM(>Hd|L1YL48gL&p}-#e4e)i6*^kdX+i2pAw5QLqToJ)6h9)L;~tS`V2M?N zHG&O-M+!Czt`poWc!J=`f;$Ay6}(*VI>Flo9~68-@DGA-2@XVe&3x@8sLwHhUM}>} zf=>&+A*j#)z~69mcMLySuvxHO@KnK13SKIBt>CSKe-TueU@^X7f`x*Y3SJ|4qu||w z4-4)V{Jr2`1pgtJ;8r~1A1F9Ra38_Bf>nZTg2xK#b2tcprqDYDFBQB+P@k`Xzh4Ud zTftWa{~_296G{ENf)fRc1Q!Y(B)F1@vN}TWBgA~iSu6b01hm)2-%J|iNW#>crSakt57u@Lom2rL)6N|3TG(TM)^PF&}C=BEOn&7tt^|%N3+l9Vc@JE6V3ZnTsl-9_4-v~#;coTxChMLy( z1Mb>CaHzOv1PcYH3P$Toskle$jj1m+!jIOQ!^M4-;4y-&g6%}q&o05O;(n4KC5_4d zCDG&?Q_zv(U*{8ak@%lkS_B#O(7c^o`1MmyM?S6QnkQ1M$A$2pn zCD`@4i#|erB1xSV5cA%j;l1R(h#11*_k)*s7~W#TN@#W2sZXodAyQ*eYKZtbxFuc4 znyKfQrE!Vt!{$X6BM<5ov7HapQJeZI7Q{-c}`VzaBFgHkWzH>KFqd+MwB%~wa_c?YPk!T&(@JLI82eH-x% zQp@o>SWysehUQh!DK8TBOMnV>#`7$zzYVJE3S;kOVHVi=p%TG;nimmt&>H5x8c)p4-z zqn^U=zKY9c`>B^K3!2@b%vr|kC|#D;w(~}FBB_|@N4PIi$Ko09aMXGPgG4yn zJ0!wafPzFgHN8P1{5Sw4!fW6Y65(8ifJFFFNC6VzJRk~*@U!6s65$1i9unc-2S6hH zDENd#IQtYxgj2)?65*UVLn53LJxGM_L_&}V|0p7ZMEH4#3=-i#LS&E#zX^_z2ww}I zkO==R93c^YG@^z?_+o^EMEGu`0EzHzaNO;Gxk4gbAq7Z;bLtC;@NEbOiSXfw3=-jM z5dae5WjH-4vQi^}`QiMxgjyMvDj$7c* z8v*CU7FsF0{27EvZ2g|5T<;}#PHgw7m{-nFC*7@iP>02a(Qg}k^rOrxBvb#+u$*rs zPVRzB-e18>zL4Tc0N3rm15|!DepChPfSbe*!g5}jPf>eyh~;dHHNIPc#`pj&c&KIj zj7Veu>LFUB(U(Kai^|sZ_azzgLjk`<`5ZL--k8pZ)OwF=sY^-MkmlF^d- z^4covHXhky3ZzT+EZ(Dcl4buX6r>3@Nb$h3jI< zZQhzCf#dI<$%FWttkHcoVM<8{0xNwGzR}yK5*-uDvC~+G3kLj4ZKP&NW%BnNO@?(? z$%id;6P33?bqw;CEk&cZ1ZBTJd*@o7E7*Sxp3}-nxSObVKZTQ3Z&<>?He_xQ8C_yo zfh4U!ctmzcrO5Um9itz|6bL2Sf}-tB7AD7Dvj4hsiO2Y*FY)_tPM+C+OnEO^vM&F3 zWL*3LF?ExTNeU;FY0;G-yWs>vCAt&JYGg~Tw`Ym7$o~G@N~!cgBE_$0p^$;DKT*jC z$2 zVTpU_mttOmFFO04$#(cHS|VpT2QnO#ilFSQetA-ngMLZqY{`v1%zi?#Pcvr-hwgVJ z*rChDRHgN6H?_59^egiFFe#?@U9RK(kiL*RWx{f_hD>woL&)^!M}3yRXg1;%|E`N0 z{?l?4nDA=D^&C!LjWPCWIPmkw_~Y7_;nAy z{teVzne>cDZ-y7}5eK|7L z7kL5dpt;Kg0-C%Nt!z6ZhdNFMj$FP&5dFMFK0DG4%sjl01pyVtXE|xBNr%LHAuljE zD*?WZ&`@3=n~&8A%e;H}0Im#&rl-8X0KL~vAI#Yx{O&8>eH!`c@iCaS!*BIT(Z0y9 z_gs=-E@BW>;5#DXRcJ(2)%zqUUjy;8GBX{n zoe}c|2Mg-`4Y+gRjQm1Dt_+hd64d(~pce|gSa6x(azVY{0e?pdeT?85!3}~Pf?EYo z5!@m8alxH}7YJS=c!eOB_?XYH3+nw3(BBdI4#DpW{#fu4!CwgeM(`QI7X)7s{IlSj zf;bGN)Aa-g2o4n-EtnD9TafG9%x{SxHGhykP_R<)AVIA?0Q|#+ZW7e{{cztXG*^BZ z&xwL(2!2eE`eDfboZw}G)SW^1YX$WYcF^Au`cACztf|m+@ zRgg>6^!Jb;74ndNS@7>fbS_DBT6E{#CEQ2lxEsSjuy(`d)y*54S~oWP3Xy_+qdA$3 zzoX>;78e!GnFF`tS##zBVBTII(rJZA1WB8HqtTR@+k-x&H*Sn?hvJ9K8@DBvIP2c} z%Rk@B9MrPzk#(cCHf=p-`(0TYlE&OReu+EL*Naph=tbJAhhC)B+p~2d1WW7uZ@(H551Y zy}rRP)Uy%jN8&y?_Pyrg6~tqy7r;ueO9}KN{T5Ltxbze0)c)c7cm{L&Vy5j`Vx}pRMQcDp=QHpQg!2@lsX(f zQ))R}JVhyhd^Hq<-2n9#LJd^+!heCf5q<`#FCezTY9II+qFUiHR1HH8hp92J4_D8_ zK0>{TT#ZzBAU~tjpYc0d-H&+2D9T@qRktAQICU?cV!T>|RQ6Jo@5!ji2s=ShR%N2< zLTr=NLkL@_RwC?VH68Z7wf>?hYAIZ%s-GdYebmno&%Ww7xa_B%gngPi6ZYxqV)&n- zY7yH^^&R{cspnB9#p(ovD$)CCv$PJSQgs$mpRKh8%~7W#Z*$dd{LWKb5yO1NHo8Ea zg0TCma@ZGYokIucy{iM&<8WW33h@+oKr0Cd?1oXg3AhJ6DmU^lD+;jkM< z<<8g*`yCv22fJYx!4bP*8xRh=VM7rPyJ2S_YV3wxf-GS->}hzxZWv_=u^Yyr0=r?n z6$iUvhu}qEH|$8HfVo40%2|5oN7BMpp?;*}5X91t^boRR>qq(x9>ms<^bMqL>qnxp z5?epg6lBZRkMuF}E&WLCC_7s}(r3u;T|d&LWLx@?o?~|Y)B2I>P^>-lBWanAP(RWq z@Ioy8NKk}f>qokfZRtlk6m{Ctk8~Lm3iTs>kz}YJ=?kc4mVTs% z`ELG2{Yc;BiwX53U5RRG=||F)EYy!w$4vew^dnJNLG&YO%}Y0=UjZjR>5ingj>RzD{gbAjPkL99p5eZw>7B}(M*lNi>g9`1x>&m0-j+!IzcA%}g8W6oza-`D@mo<<2@P#fd2ADWIlA3IBOTjN!QbGZZQ)PB0K}AkHMj%rV;W1` zsR%jf8e}h?DyE{l!Ntg0Do{)I6L3<2TC)2{g=)!eM^}}avll`Qq4clo9lo6zy&t)A z6!l?4Eg7X9yj9Kk9W;o&qPOYmun#UovR*p}bX2dwREp>w?^6g;Ua<GI) zkO}$jqbQ0b+Q>!~Ab!zCHtHI@45N)~^l#{i+Q`1mX!9ABuZ?UZ%f)CT8+{?eP{Z28 zfj7~xHpcx2GVCsQ`O0W06Gh{Cc$~4*5u;m2UbdpLG45czdiO||?}=s?{-@#J{SAVR z+r0W%FlnuU+xWeas#(c$TlXpjIT7v|`fvRdd}XN99FuA4Pnu8<`kY{@vD_5ZQ!l;Pgk36E20NfOTkZ7SExua1F>^`zU?g z11Ek$I8&IlH{s+IJdNLBi80_z9m^tnA@vuyh@!H6+(S?r5X*AiLFfkd<&RUqT4c-m z{FkdR6Afx2eKgEyB^w^qN;aaWR$9O?+oaQydG*%<~3?U%UAx7#cHdf6Vj%h1emZzH-Nt<;RR0r&@l zuuEGT@v99R9ap)bw~Rpdeoj|H`HIU<0J+2G5H1*Hw+D8fJVe=)!rzLmg0ahwXG zP@*=A@w*)V@Jimfz7@aPkjoq(tAtin$hJQe|HJXm;vJ9wiTF2$c6Ki;FK+G}i2ud-XL`)5F}eKk zvFK-)@g$fl9~3~0ITiekir@9zSCt!~pwQ+&EmroSXkZ^j11lEHTnTBx&Y8zSV6b!J z`j(lMn_If6C#Q4f>i16fSk3y?9nD%M5%PQ>u<;H(OYcwGQN3r@y6U@Ce71FCi(a4A zO3$*jpkYY163SMC_CPK*XpcGWr1*dt@$QAtVs>%?5&v#}fjtA#L zQHNH%2X$x}szdut=gt!Ne<(d8UftCosB8K&_6 zW8jqyx*UA#(i)Uws8PjNuV&QeloX37p~zp=mNy)%!)ncHfiG&=F|RA^XN^WIqmAu@ zD$rTe&}db);KjkMyb((oT3qJesAO$VL)A>HnYP%fm!R6NuL{_DypVrII&|?nSIM@% z~XK$P^~r<*OPjYYc42qXyu_fS7n$t*`JZwpwn12s`4b3*G}?9{LCTHm~3 z{r0xj(0TqIG`wL1X~Gl(GGHG>C2qE;V(${G)zoT*R=%9Q@4Ha!raLM&AT4q%9XKmP zAfuZl^coc_wCb%^Zt#CcC{`}`Wfw}*Qh5_9XvLDH z;n@0ag=>4&6_+h_t2f&Z%+Z zV`&P6#Qg|EQE*EDxo5tNy22c%2Q1Io`dvbXKMm=lL~|IdDHI{|`wkS3Uw&499O$wO zw7SttP~LnkL7C~vZd1iF#G^IV8Iflx+n{P?i#ca2s6*$o%)w8Msmy_B`MXk2XFWBv zCWgA|Oq(sS8mPSU_g%`FE2e$XUB{&uV|Kw(K44_onW}6@vh1ux+1c^3kH*TlOY{Ee ztg{L?yNYW0Xsx);@}dWwK1)u2KsDF>r{%4&GOJA~e#eTPU>4_Az|J~g{MEs}3;)I# ze+R<>3-f_lwJ-KuKym3ViGTVdy&nIJ&zM(W8Nu~>F^1O$+K#Uk@g0K*7#~&^g7_#i zYQn(kq_DbL7^BTMhWAmB#!k+D1-_mL-&e>x6ApH|_mn_C2?8?RJp7yIxBzxLzKbBo zHWhBh7@ogaYh1Cgih^cb{AW8g@m&ME2?MKhC*nJY7BPnRWzcs1HXy!-;Kum4ux#R^ zoQeqpt5c2j)E{FJ(-_0M2@ZCA3uj~N1a6FvXyUsMc7`d!Kg}?#%bvgo5JMjS9}zVE zK7n=G@=)focFbZH*Pzn#At+5k0@Txk;AV`8&(H>K_xD0xo$o$0 zru2Ll%ByGdlUk?0)uDP@u6&cB ziR(9O(`K8-cZ*|FfFW3hT(YNryXivj(sa_H3J+s+>RF2%zQQ|eEXf{jEQTIrvOaVC zc9sWmQTB-+>cK->z>A>VZk`}_c1aHx94k0caH`-8!BRo3_Xpw1gkB<8BUmqZxZu%( zt%Ao2whNvhc#o;PZkn3%)M+H$iqhOjil!3sS2K-A4*iGY4socf=3%;7PfmLuPrT1wYh-=atDLH0F!s zj}t5xq_{5Kn+1;-JYDcpf|m1~< z5-~S@MfiEJGo4{X)QwSsjm2dy9Cb^{HWk31^JD`_%9dyvf#CX*9qPy_#;7nD=^&81%EC0 zq~IR~|19_qLFzwZI6cn*4i$Qg;9i1z3sRz&{)+`?3sT68?#l#M2sQ{FDX8Ze@Tcc{ zsPhHP2g+NQKip{;kA6=;bO)N&?+di{59FMc{xX7vf>Q;f@2^zcqwjH2UXg$OUV&T1{UpIUj+=0ABbs~ynQdioaGDdyM%D*$7SF*wC~oP@hL?C#oyp=Oo4RgQw`b%*~zg)X3+mWQ7_r^0UTjBkcdb7%Y+h;6X?HT(=w38XkwQA6-B zMN#?TYJcQpgreHRk!mtx7^Ns0JX)VK8>801eXN=dpX1a<#4ui61p8j)>;t8U&vQsQ-oiK=lgT7wHpgcQ}f&);JTj6dat1N`S(dsMFvBXQGY( z;7ruVg-XiCTc@aVBaj-aF1jZHG^siJ~63MO0#*~k*kMD2hV zoQa~|Yn+MVv0a>r`XqefOjHU{<4jZ)GWas8S`~7b@b8Sj5`jJ5a^8&w?cLh3lm`%}l0+o1f3K zAjtv3El5uxcc5^Grf)~e$pYbyOrKA3kdR~3PmvrfWF}qAutOwlVft$*ujEkSPEB(< zn;a(GX=$DfOb!=rQJUx6k|Ts$nx2KiN{$rnyz~lkM+tXfdKKPaac#8arWeyaW z(#rC!F;g6>f zWoj3=1E@Paxx~#NWWjj&jHyj!U=Df=c4ba!3|fYiRd`C{TO>P1z+b`1u;!~RR3$!` zr!>?ytyO%IGl*Y5YWoFXpe+u142h`|uhf(`D34TdN@GZ(Kis{G@iQbrJ)s`6fKwU_ zoZtx&b@IWm4s|PFcbB3TAW{6sPIla9!Jxu*$2}Mc4tML4`5gc0`|EIU*)Xonxu0E}Puct7AICylEbmi` z5qLyY4u52LNWj;7Ix2`Y5X>Jfg879gU9?0PR9-Qx4m1XRDx_`q-yv|!xs$)|NOb!{ z+362ur#G~9G;M&Gb||-PG|l=NWi8oeqd5&7OOH#VQTGB}uIN*+ksy~wqeh3a)993~ z?FlU^ZE1F8r)RE;z7JZ>ahe8Sz)9UQ;y*DCzGR7r9P}>R9EvrIBva1Ip8s7^%su37 z0zp_U!MtZ>uD2i;0JN_34A5&H;kY)0Pctjp3kVDFr z62t|;5(H2D|t8a z!PbstkrCjeNL3(TWwtQ8-pf0mb>Wwz29l8PR3g_jvJa>Xu4$5x#9r3CsTDJhtlNEUx!FLd zR9mm`hC$Pj7yb$q1QTe$D(uGyckO)mRuR=18!?`SM!Xp zT0*V19P97}W}{sDQs?!X)@*jJO=NCD?a+; z2*|xM+vu+&I84Al{o&(Fo2WnXXr|zwYdUY|k9%IxbnUufRw|~!AC{E@^Mi~ZKew~! zhyP4(IsWbV%0TCe?;yC_@ja9Y<6{|^_}0O0KW~lj0NR-Roej$N$4#?b>7D_1JKbMo z!gT3w(&gPhjL#VEJ+9#ciZMLytl9DH&fu#U55RK4c6|`vHL#m7usYnjN40Hg_|)})W%7p?fzcK;bu#! zCbasBuo(oUsnd?5_saIKBK}S9=4UyM9)o2anlNU%;o__a-+p7{vxS8wmtN_ROaCm{ z(Db}#dZ^p%}E%IVsM_fp#?j+VuD$alcL$H?&-Ka95w{~=###U$j@{~$bXGYJ^h zkwNTH!-X_6Q50d{9AjvX8F;RVsXdHZQ@wCZmGsA>u`(Y-zUkOFe|(}$5Az!v$~^kW zk|53JkD-B2CZaOT688my-1(-z8o>s^BL$lTHwdzg)Bh=gX9=Dw_$k3l1g{eOmLU66 zhW~*e`$N)?3O**dTku)I7X|+)_=ey=1=-Iq9xWpb)UrE3Eh7xnGQz-#;!n#6gPtL@ zmJtTMKsKf2I{-A zfy>1o#zwJU(E{5UsUD-f=S2j@Jl?~K)WdkXRLVx$|c+-y!sUf)5DlyRyO8cVz?hUD?1FgwHD!8Sfi{+{z}cFjx?^j4)8k2m{B6yS^(M zw7x4FsMWUu^32qkDcV&aG@5%=55chKhe<}DE zL24alyoG|Z1gU0`?uQ5-Be+@c6v6)yyhQM;g47kv@b?QoCz!;Z1l@-T&KIl}qz-2C z*9-D?Nzxw^yhxCG2kCx`;QfNX6#SjwUj=#RD*cZV+(&S}V6`A+cy#)L+XO!*NCk-G zQ%xfA2ZCA?ALx-O-@Q<Kc67ejQpdvmZ_`LA7Y%+$a z*GO~t#y@cw5&5D35s?y7v9ajygkDO-cv34g9>;$Mc-mX_{$S_%8x$@a}H>igZjZ*nli)>f&8shI1I za1xW8ObZIfoz(K$z)U`VN0gm$UF^E{rOxdYCsG4@`_h6N6H888H{nETVZUPCPuIB< zDqcUW^QXr+ndZ)d+nn3)W1G=&CfxmCal7$g2cqNTL)s>k`#TFkAos`Co0xzgfi85m zZ^->sA{ca`KT1BOF9KcYFCf~)3*;KPzmrk)ko#kY4!OT3hL}T7zT6+r;E67Db^(Dd z^kW!>>)i#n?+*UH9P^VkOTZ`hi;*Z>qQg=@t~hJy3jFFdmTwicbruxZF~F`Wn5?;ix(wiD+D} zc`fYeLilphFVO|}(E_|Sj*tU+0daxXtu@E9YxcI#idR!W;bdt){ zn=x$nc?a@2U3aXz9vB-70h@8m|2UQk7=zr&1BUdE4;VAxo$2p1f-}kp&ZM#hYiu!^ zyllCd{=)+?8k7#o*1zO8Nfndnso;&pH}`tv;QbM1NpruWnE#0_c8bPyFJfi*D z^TVj%5~jGF+d8}2Ha2C&h*_C$2s9n>c-8j-5c7P+PgX&-wOSU+uORfwYRZA{229Va9sxFb#+ZfJz~J_nP6jm z`SOM(RrO7E^-UG{t*EVQs;q7dW9(B9xj%bW2_9f$OJ`GaOV|3%n{*`9284%gYOJqb zx)j>_I=5|V>FjFm=xXZfSig2Hq}Vog9*6C;#`+p(WAm|_I~=nwSg~N0R(!h3C_Y^k zC_Y^kC_Y`)c+kqG=8jeb+Dv)4rjp{K;u7dqTeW73<}EpFRef`7b4OD{$w(fNoVo7xuOhgZ0SF9#n62wls6ko23_d3Or_b+cz)y4rGg>We=adm%erF z_%X+R zvZf*o&-c{(yFdlCTY|&D4Zaes+Um-BURS8AcMio>O^Y{g-jFNvM%k5J1cAPWXq7@~ zlom`S`Nngv53DPB2#BFfEeTNEYNnkU1%sf;l_0NHD{jVLfB0hSe;tT1?_S%yz{}c z<4a)UmT~c)?bF2fRoG1!SaGg3dmq~Ht^&`FZ!F>~gB#;xTQ>3C2D=FZtMg^VcWaJv zz6CrxzEy~?0B($rXyUsccE(qPf0|=Z7~kNF6+<5X9~CtI1|kyf$r)q(JqZWejX4ee zDh&Z-x-`GWzn#Ag$X^C-%pdzRlfRc?$K$mFw7CcI%{2tjq{Ssys~DWW!yotPj4}R* zdX_GXe0*1P&y4$(CS3&8d9&j?3H5Zjgdv#tEGKQX-QSCScPxcl#+07#MEzIUeCx%* z%lo14iZUE5FW;~PL(><1S6r}TnQ`3WKKV?cIbIFM^OXUO(dpP9W-U&Z!mAu(j6G5Z zQz-3EQ-0p_PzTVAaJI{DyWD?ZeIn}pY@puH#`@S~x}!nr{cN}|5Py0<8#Mb%hSU4m zz$1m$``Ms32+g)be|kR~$o`4+xq_b()ce_RXa7L{w*+q$d|FWNPlJyWG}>Q*pw<}y zcfH>XJV4y_zB1^egx34VpwANeQ-YTWUL&Y4Y=plXh5oMK4+I|-d`xh+;Io1+3UVEq z&+~UdeMd6rG#V$}M+r_5oGn->xI*wK!DhjAf_lFe@ti93{|H_zc#Ysqg1ZIv-NXo| z?<5AM&7DX^L}2C`bgL&V=v;;&8UO~UUWqF$XP^k<2P z=W4-k3*t5F^w|S29~@(dY!ksg8EB66q^A*)k0QZ&f(r#}1nUG36Ff?=O>n(nyI_}~ zZZGJ-v(iU;G)!0L6Uey%X`Npn`*-HgJ_a+&L&F?2a9S5ZH{HM=F-02tnfa@a`_E$8S85Yyu;}9ecOD zRlB5iFoc)v#}Hnsnjzj`O_{b7{KTPfj!oyT32r0it3Vo)0LdM2`WpV#dHBH&9BGdZ z{dUCn@+e!9cN4v5v?F)mehX%Nf_DReJ8%FeK2f+{-a2}oBxHUb?`4h`3R#f1o1P~N zIW&*gp~v@@s7B`9#;{X_J2o%F5}B&=5W@}}+h=?q?K!S@;68%5Q2v*Tcua5%?)k-3P!!0r$bw7FxMC zwu#hMEpmdru@ezeZCk2&Ucqgow%2Pazu;E-Jdtb{EeQg z{%~XBgS9acZV_M&%IqHPaS7-B-`9$4Ui8?VKwA!WCs60`AhJ7w)@p5RppII56`<@H z@H&2kXP>F=u{D9{tRO~u6yapC^1pZunG2f!O0jiG(|=%pAjgs@7HzqFnu}B1E5~2G z)!#2YHdu6^+^onVwcf6=)?4k5B!8_tN3Qm`gxlMa`X+nbJ@*!l4w|(PpJS<9FQsQK z*GBfnWRoj<{aY7C*3xv}i%0KfnUh=gK2@%l*5&N6>#|gIf#Lh(Zif}r-^u8Gb5Tbq{>@T-u#uu;)e-6)m0Tr<@TIe|E`-}d z0dzUCWukZe{JkGkxp z$IjuZ)?T!onFV`HxEsz55X@6IBh227Xx3gRu}b09?cZ| z^V?BRV1d2)&Y=Q@<_kC#~=FMbH*@&C*CN7mZ`+RVm>e_z&X zH^ASGCJ>Nu(Gaa{JFnvtJOf7*w|-`3)jYeYD{yj#!ow_D#F+RDZP0dqFV<^^nus-8 z1qqt#wb^`5!a~DyQ?}u`DBJKHlx=#RdqN>vCf7MAEMsfKG8=^aOwOW_-yBoL!d81o zXe!R4P;r>+VC@uZCVV$s)6#3FK)rT~tg%hgeTLv{LA@pg_X?qx39b~>YpCF_6?&6k zx8Qa`)_KPNX~ByG?-YDU@Cm_}1=$`ME+3VFI7X1d$fV~BE)%5QQo3&zq~tPb?oSc_ zM-XDCn*O|?K2rm}K1&0lAa$%Jy?W3%GNuSr)o@ZsT*4W-FS^1mM z8Q?Ks5-!Wh{Tdt!VX-?^vcomG zxjV&GdT(D)$tSfGIu@C{hw*sHr&9O86)STd57s1~7Ov-AMe-RT^Sx)0Wb(H{7I<6> zOFk>)Q1AC7pOdIYdUeQl^7+(pNHjKStoIh9`km(Lr8uqLluWIraU|3%!k%On`~Q}C zdLeZ`@|0M^jD4dU&iOoS)=Y`z#&9I^uI|cmM?e4i?5BMa5sjFGX z)3cE;H$8{k^f9m}(%bRtrFqEbv{?FH0+!}@hE3hY)`X=wDuf)!o&&=1rN~YJS5iaa z_`iW23da{AYD+kt>xHQ~T*Vx~p4au7*mTm|3vkk3fir~T`N8eAEP~U(C*e}yb$*+v ztU$b8H?3R%yaEBd6S%lX;dt&5d0Xz#lvi*jsjWZKRDJ>HP2RRYBPK2YD*f8|?CM^4 z7?e1jRu)@=N_oBQY{G+&V1cZPyYWAR8d8NAKrwnqx#z(zgyZ?-G^2fR-03LqVIS)qjsI!*cX`BO_!D?Gx1Ltk&=Fj7r8F{)dsH`^M^Yo95sv>d9FX&e z;57Of*dZLx)mYa}UJS;V$%rfzj;CJg*w{FP%dCTk3gc_&Hqq{x2fpbJ#3zez*qx!CHgPt|sq))rhPw+p{!V zIKI@EaPP7FjGi}Geny{+iuNxE$1`$_IMxa@z8`z6Kx4eZyg>KueG-n}p(q^x&utWr zKSSHk*d7&*w_2qL{W_5~L0>q$PlE7K@oTe|TG|vWA6j>>|4X9kvaVH{LwY}3gg6wY z_vPB{2h~C=M$p}6WJ^~5Cq&?*OUCvxA|6^xa5ovr=3r$oTJR7dwjS&MhM>DI$sUNn zmZA)}EE<)7w#vm6r;&ILR*Nxt{7+Ui3XTHf6kqTkc9c&W84 zUOJ=2mYmO8=?@-9SN^^U)khbs8Ar5&vW)+|g7dwky2qWA9>Vb9##L1CJ!n1%a}o^5&GSLU^h(f@~X@o4F7UFGfVhqiTar@>cBXI~1fdjnnj z`@G`+0lgLazgI5)W-P37&49~GobF&orRn2>m)%S2RTV2t5$ZPQ-ey#w)Gh#3>( z!;~tBZwu@u46IHm66%Xw{H@5;nG7Jt#BmmAJKe*vVz3i#Oqa4U<~c5e-GqS^_XG7! zF8+DM$GG^9CEy^wuflG}$NQ7Gz-El$T?Gd_e^iiG1~I4bj6IpuBTF#)YszmE|3Ayc z{}fe$a@0==a)FaH8wPQp;CR95f(r!?7Cb@l3_-oOgYbG!2e?bz_1+HXuL*sNAom8C z-j4+Jo(|~$75dkL&j`LK_*cPy3g%%fU_2uQ_ZBpA@nu3&Zj}DCfGO|@p<4whHA?;| zg69f;Uhrx`?k>=u);|WMMikO-2*%N=P>x&6#{>J5#-8vnBK*x1TtLJCrsd;-i^ZST zD+Ygu3f(0BT8P-Q(sJPNPeEzMcab3XHAvGieYSie#}*>GH;wEsNgFwHu4XeIMS}AL z_1+`gxw1`uo#0`DM+vqGt`}?<>=MLqNDp*;M&xh1~*{M+AIiEEi?ddS1`nVd3b8G-Wgs3I_K8Gp}beW3;WaF?SlyAR+6 zPS*}#B$E8bgpm3&xMJ^(_fKL6j2oxea9d9*mii*XCnh0CAP@gJFcM=CB#?*y6#QVr zjayaNa61X%6W7Bo^66!&>OZsEkA)RN}hWg7=( z{HfFx0PeB@ocPni^}Joo;WI+!dpD5$t&jyC-);O^A%}XS_*BnHR3p71%*XSoYPfQj z?OKw*)7&@(-uvx9XfpH8g9W>6%VEc5Z)j>s{KQ{KT?O|9>s{g-4RFctMCxwhM)%_& z(%g}8(hKO6UdgDP{^LL-Zg-Cbd%%ToiY2eUpI-U=Zu%zt#?lWnx-_@UyfnAFvCBr` z`qQw>HU&YFcU=GqyKFoqFz_z86sXP_NUGo$_)*=oa{uc@QYY{(K<14L>WR7Kn5);j#W$R z+&Z9jY}MMTb*NTa$EtN`wbj%D**QOB$c>^k#P46*kg~&EIowO1Yd6rz0@<9XolU>RZ}+>v!UlM% z{NSsSY=G~I`~(}|M`&P9q85`L7 z7#rC67`rDsA7hto5Z?5KV?WW(M<)kmEyMP?HLJ(sj)^bK8`_)Okb$w)tGxrXK64v6 z$cO)h=o4SJeeNG9cKZT>K^c63z+lx1#TNz45V`@L-xn~n_p||?Y%KDT&kvXncl-PR zagmQB{tjHk(|3-+y>IZcUo2t#=WQJC>=o#^&R;gu4oCDMA?>|0ekh8^Kkq5qkr`MWHDYaJ^?0W%CiWN`Cp1Z zKMtJ68<6!6I`r~+nfu;fMZx*p)>O`+Wso#)t6ya^Ji6qJs6oD~2xxcug%A>+DnZy^r^ohqQg~oOL3L4d$gU z{J!_^qpWES__f;IBIA8H7#bXqYRXkpihOim`tBMyWep~T6 zMX@1*aAHFQ_#^fIsp7+m@{Sbz=aiPSBS6b;S)h#p!t}Z;7AjUN&R1Nn*r9j=5d-NI zrOzRvV{rcBJ3M_@Xk5BPw!0U8noWt4apNXUl9yQ%!DzlXvI0N#0>fs zt%wcGUqRRW_w57wZaUzOwJlG+zqK&&U-7rBil4w`PRJYG(Dve!?Z+3~VH6gxzx$Q9 zPH1gmjQ3tP?)eVt09Ap@HV?wPNwXFoz3xDTL?>jj!}oTa*74qMC|bxK0Zy=IemN== zukd(m0bb#4!W3oSi}^X&GhfG4j$v$n&wL5O;1wQ~81M>jg-AsDYG1wqf^^UP7|03s z%s+&Q5O4FA!!Ld{WU`Mt?D(!nQ`bXi-`+euB;*G^2WL(*W*4L=A@TW$G+);VjV<4# zIU0n933$?c6(_Xi(bYcfc=TeQ-p8X`e7cuMZ}jPIMwfSE@$N2<%*d*M>B)ExS5#Dr zjARLFAfD&Gfb{StEvvfHi1$<~k$fDFu<>3J&nn8!np;tC#CvPh;YprE5zluofK;n! zRB{9wG~P$Je7~4{p6tHv<*fChZD!I$y~hjO?+U%cO#Yete(p^|Uu!0BC*5D;-)<(~ zBR#-1}qBssQnQ-9ia}nw|VP<&E;g$CKwV{AibNR8e2? za8FT`bEOgv9N_S(dseV0T| zd`Pkn7#^8K7KIe4tPqjf-$-!pzDrF);jk)%Gr&kpC1)gl64ky-!mzj!rZ1Ex$eDwm z>^ZF4aV|$dS3ADYJs+Mao}dz6B%M2T9?P^?D#z%uGZvrfjzAP|G?a-OZ<&*)GDf*y z#b&aGv8E}FF8y^5o(iQ;GrjRr>5hY_Skakg5@^J$+$ln%%gczF?oJaLU4AUG6`!H; zZ_*(%Q*sz9y2VUV&njN6d<+R0G6yRkLxN|`#Ahjgrw*AK<=W2;o$|NhYaG+BS9+V3EMR%& zYx<{I$tH$hp!Atmw+`?zmUL_$=JK4wSkbvw@~0GZxC+`~B~xg)_z_B9X(i{O1I3S2 z`dTZAdsQRep!D@RmXC6`ioBbwWHu|VQTZ6l3n;%y>20y(cUbTxN}r}i zrdX0ToZ>5$z9r_(1*_b1CH(ENki-B{Kk)9Z|Qhw|T#CGTSWuT%bqs2|E-?_MkNFtbrpzztb3csk0*aY{zmsMp?Ai!@Xp7GZ*m{-_)hYxOnOg;(B_`3urPG^{c$|;8Wc0IV%INQ6BpS)7!B65Cy11H37EfIwdTWUvkmPdja%D~Ygd|-a`Gij}4Yvq23-Xgkm$WFeU#QfKT)}pKe zO-i!Ug}LtU`Iz}kyn=-q;Q3g+H1S^cP{hxBgo*zMbz%+D#1DYCZROdMf!&yfBz_$8 zH(25z@v-)LFnYApv&0jeoyVk1CN)ldY)xvk&8a$XCVo2oMcIzxRVQ>elz_8SyU`Kc1juU2&+dbZscBd-Tfow4R>w0$T@ zo(JZsPe0A$EPDb%=TTa(B`cR0)_hM;Pik}KTl?Clf!&RzMucQD+hl*KBHXtnInu2I zZ8n!xlt}WX%9^ZXb~l#LD$41`>{vy4M)qT@wnHRAR6(Qt67wnjYKfPtNWWU<`9%6v zi-rmN)k+QH_p1im#A}DVb0IeMEvD5f0gRs4gRpVZPH(WgF;x~mdlsv@P2wOsTkMO# z?I8!49j}7>v)T@4r#{K^$#UqkkmWqh^Rd|2J-D`7XLvqlj6T%yw7#l77JZ(i&spkY z!iPg)lYI-bT!f!g83UXv0gRr*(CW5zto<;v%$zYowj57)zQjS6ue5DECVIW`YEN*a zH(skges8?O-Up%ce#NA2V(0j-mlOnj&z?;|rL2%2c+srB%(Iw*yv6g8F~vOJV6UJc zN=pr4!Eg5j^}Gs1o^^?RGdRg?CUKeMACkPTvO`*cJx99AHu^hP9@5XGP%NW@> z5XZ3Yl!SWowl3zB{0+SPP3Tk3xb1A*A|rnQIL>&FGV?zoHNm4S!#)T#=uEr^vHGls z({zt1#LmjxZ=jZq+(#kD%)Nj;)UYejf8ACSTu}necDJ^|oxcTR+C7m@rgahu=Wg39 zl$}q*cy#(%Q6mJz_O;`s@!8b5GwFp1rwG zs-JuIU*OK)irlzgw{e%j^bTjBbGitXlh3^Z?sX@-Z!0xx7 zM=|Msi#X5^6>VOlzsdJ;<}#D*!Yk0pJqtkxoPlaKSCA(TmvmRo`JU z_q>kA-zfZ<1Mrx>&uMI_4mxY#S9mE3Y94zvoa^v6a4a(c2QTw$Z-N?Bjh}CW95e-v z+sP>6V|_Iw6jAIFI0o|t|8a2S;ctjJ4>>Pd0k4Ze8VPhaRLWpPANmv0uetldM-ROk zMkVPkdg#?~a|kQoc-Rc2*b%Ig5v)^VxcN4IttS$u$#h1r(~Mx-gL4x*SvRQWUJ!8T zG7?;bN19i0)Q@sZQ^X-lg#j@wbv3-`Il+crcqB| zNYgk3zj86gApBWI@nytX{KbrQt(Vckk18P6Tn3b@48L>mCn3ZKKV|r%r)kW?uUv!i zi*bjGse6|{y)Xm*#krsme`WY%g3+t9@b_Y-v<%v<*v%5=9`~4(S5|!XTTJjZ)!+Q` zrF!(2>d{S|Y}fL(Wkp}=2ino=`HKIaKRQg5Rx4mLZOv-L#vB&;VDQhXL%-D7Sz+%Q z=Fr%_lVfuWV_n8T2YOes1Jn2I9b;l^3J*V=$A>+hEVMB_!gXcGiGq2B0xJt+{b8$a zgk@u8uA04I5p3ld)fF}6I9#W^zIINfQBifsoZ4dU^QbhY)zynFJx{rLQmB24!JMI$ zR$e!)wk|xdirW|tkx;6*$`la4Y0bLTI2LQ8XWcSA#N3Km2r;jEPF=CFyrE^u%EtEg zV&R+^GP&6J0*1-_-Bb6n^g&k8|CgJ2Uw=YFAclK(N1({5NZQg^j;7gp6_FI$y_ z(Z;W+nqE^rBa&6-aN67j=n)ywrPoZK;hl*WIS&rS;*O~Z(iNdyt=Vz zWpmU*rhX-5=kV0N^@Jxmf^KO`JHt1$uWW8^mHOw`){Zuugw?pZapjuj4NG`_UBl9r z^({+riW;(AQB!BMu4(URSkkz%1!fuLjJQZ5Gg#>K^SUy(@~moaVlsNLo|lB->C;M! z^Ef$n1=)C$(S|x&043-`>`2Y4)*b7G@4V*NFIHe{OktWNsXJ+dNKTk)13D4M%u+)} zM2X>5DZSe|*0rV;J0roMrIBQ&Dt$!rH*FZos4?c%V-R}&4Zh*d@|x=MdUWX}%?<0? z8<#g@kg}*t&}qYTz2V-0J(sIjH!tbHsd(7D1?Nhmy>V45OiM0rXkF3R-YiiAo`0la zq}hDs^-R&Ce!Q-=BGTBwfrV1@njSXZu0#e7YP;%k(KBy`fp|&Cm0uEkH?v>; zoW|NZ*mT&A)!c@07&M$eJkm#{w*d_^i0JwU-CVZup?)}Gmt*>D_3I@x!qI{QE!nd% zYkDDCRxfQn)~NR?6<Dvi`Mm*+%^srbe@0tYc=HqUz)Xea5146w$e71F77Xh; zoPEl*lJ_*B3@>|?-YQdzRUG6Qlh^jhNtuL;CjWb+8xQhGKBN z@=6#Csgem25n|A_xnTMNOZJZ>n9+IXPM^-6htQw30T`_RZlxL{88oa*`2Sa}YuiZ-LvOnq}l?V1hE zZL_&FM=e7~)L7YR zpVRq_ax4GIW+)g$>Upm>-+n=@P<-BdcJah07x#eqZ)xe_zr&deH(q1&$x<%9v015Z zf*)=c+;}w_Tu<%mz2)J%CcG4vaCj+gwBV2O{Oc|_Zp`tikk<^asJwR}kH#k`4-m-X zE9R)Yqp_E6fA2LEI3e%Uh@1Z3##^~Z=+MiTaT4gXbW5?P7=BDQ3x6yx%W*#b{5WtL ztMfXyLGcanqVnz==gFcxj#FRWb#O=Joez1%@bfR9cNILM@}7gdGWby*Ukdv2egwB4 z2TtPw$a@g)(EQ8i-3E`Syng5iY!1pJ`tlxxn{oU+orM4&utM}AkAJ^V^uwJ}WEg8T z48ae_O=WcZ*ZT-p>k~kx%j>uJi{@_>@>d8y<_|>*^7jVZC|)Z-u9<`PZqM^q5bi@i z641{RG185UGe>y(^?l&)r<(&e^A@RAV-)%++sMCsc|Pr9)c;>$gMw`zUViO)KD0rR z&gX~>ug~IaMhr{oPhP65!SLFfvl$tKb;dWuJezT}(pzDDF~x zOOcBzTohvH3&I~AW$+@<)IVi$BU%I~8nTQ5NGuXME{ zcQi3vi{eJb(-kjLyiV~B#h)oYtN5zo2Z~*=_)GeV+)7NE`xS}Rii;In6gMiKu6Ui| z9g06wd{wav7I{fWahKv>6yH(&STTu(fZ_8M2Ph6!9I05MI9*Y`&LiH@N^eoTMDaU{ zI~AW+d|B}W#lBdJnf@@vDT;N9OBGL6{FdSkiuWk)Qv91@BI(JUs5ndUP{kI-(-kjO zyh-t=iccy2RnfxDkJOjqXvL|D^AwjTu2Vc!@mj@O6(3RDrTDfYzFQN`aVzM}Y^BIi_=E2WsH*jI6&;wZ&QiqjS6D>f;9UGZYYYZZT} zc%R}g6n7~OK^~ZoV#R|L4^~{HxP*wYylTk>%yH4sjF_=@lzZQk<+)~^jfy8Io~(GbBA*Kw?%Rsj zDBiBf=OXek?TH>xTK?hBi+m|35Yv#*QeM!RLn@s#$vb%C)Af*yA|#H-#PI^djeXLdM8$K@Kb1xqnN%6s)5SX4tEjF9 zBZf|_m&Efml489z>hR=AxwOt1D}qMS)o9gNkssem{+{$;_W>`ym3$sm5F6q?AvClY{>1o0-KT|yRsy$; z$A-Co5E@zmG;$Oh?($5GSkV))zhOSa*=ecak4cUa`-2lN>j(5_hu4ca!W6u~Owz zBk3rl?6Oly?_je@Z-Yh>XE2x3Sz?DSxL9nHuG*MpA6H@}ZIR zAcyE2rJ<3ug7jRap^=o&^3*B~jU*Xj^V|a@ztBiJon5j{`CF|dpLk;RN<$-w?Gu}? z=|dyQW%vb3LnEnr4HN#*#eLDAufejQvRr zzf5UpBvFMUwp?jwB*|Q`LgPatiSM*xEy~{!^Tz(s?h45tG?J(S7&}J!H^q|QCcRQ= zXe7y8u*z+d@X$zd*)Xe>kGV(Yf;E~RG?KP6y;kKzBT43hweA*)uNq0QHs!w+OTNqS z?HXS-l42dohelE^>u;U%p^+r2MC;vCL>}h0e&la(zbdq9B*l((&-3{4BzN)0HoD&w zS~Zelo7^iszLV_A@@#gm^Y~73e-5lI?#&(_b5%B6E*HE+FS=d^-796rLD_H1i7LmdQ;kvklcOe5zlWYe@4T64(ZR%;{o z9&~au_a(Tk-1Y3RM$SB>XxdE{Z-;VcBBqhcyLJ-_MfL}=JK@`dhnm@ck8Oju>Nio( z%>Kyp@$^u-F^pwa+1V1n=s6HMv+cjeUI(We zQ^n+JWM9N2Q#RuuJNfp0$a#;hD3@KJNr`^b3i|Z-d_4Uo2Zgf-cs{;3jZ^GNQ^XwJCZcIZG=gWP2u*5;)W9=)z=<$7emUx0ajgs#&=i}5zHA?K! z_T31b*MXnZF=!}zqL&l|O|}0)LAlJpG%uQ`-$bJecBSXz={Mbn9$?Q}QykQep3<4c8Da1DrmI3 z;|a>^S4+HHdHPM#uaZAHi_9mNeQS#>EC-qB4IadN0J+EYA*~i*{1E(8vCRx6d zDW5NKkmW1wVm#)1z42;KaHKb0t3G~jyuzM^(0P0_kUEs5{H~W21bxrmNI~takRN!_ zJpCrxCa`bue0=>T`v#kDZ1N~A^(g0n+dV-&4@N)8voEp#08a8Q7WXpAKYNaJl^xOo z>^ag^E>|+qjpd+z6SE=uO%E~losv-RU8o8(eoPi#x8&{%e z*4Gg;{{Un+JHGW$gzPgFqauDHok+e9C&u`;W})mpBM>fr3e}L%ZTrwpN&Ga57wx15 zIQrVu-Ax=VPAaP;Sf<3!SlWY-h4|?`;hA5Gob`*J{S4fF9!D35f1PSXOfMT196#qB zp>q2Cfhn99<1=efUY|plvu}Cn<@ccp)A%J`UZ9=y3Zn2&Rw8OAZ32;C3W@je1GOnS zIVcke$m?rUOp+6E^M+@l5m#0ZmWIcg?# zz;a|EaU_fB`)s1mmZ;BJ^!aAgX9s<5kNUhxpIoIgu8#*fUN3wpo{93Mo-@ZGtXXIj71FD+c#zjZm$iaQ;iDUwjF*}8GkUvW zJ5}BY!ul=r$?6Dt9eX?W*>6R$M${+vUQfdx>2v2)R?RL? z+pwHIS4^v(Q(m_?*cy+$@}6b^6sBa)aSON4dtN2GdzJ3)HST|;V9-m+cLG+&#x-4Tr54?pAA1J zrI4s1h@X|rMaLh74fR#?7F5ltsFI9(9i`OoD3QMQe^tLDQ{4e-H=dr^o)ka)3ZE3# zxWBeEl$3J$SLM;qLG8n9-eSLbKUoVzCRLqusj22G{)xJsXnpua?Oeg*pVsO4eAG6g z+BxCS_HO{Gu@U+P>x?(x7s|b(SE;)xXzVdo^_&?s-e`*quRZ8+1U+YZdHwu~xwC7_ z>#D;11l*Eh_N$0EU%TUT)aLjs44t>Fp~lo0uLUB@I_#bAiRGI;590;HVUKafh2o$c zL&ZK%1=7>uprlCEGwtS;V34YH50#`gs&H!wW%q zokMyv{-Wuw0Nq)-zD|apzby#IeNg`8r+X7TqWL=)G`}qQmmltWctrCz8TlIyKjx1w zo*0h#dk}w7d6eH-dGCdPRNm4^c^Tf9w+rs5yt_bmChs};N9C=I$iv&sK;8!#@*diQ zyuW71>xjtX{xd&+G`Y$A`Stu1+?}-t&oN{;|9SW8+Kct$P{wbNsgolfzLPfMd^f{2bWiUGK9Ao+qv_UQGd0*n0knW)w@-{#o z-~aoUFK?NKD^|urd{9`I^h0@hV%W7A;T|pQTt{XT!eI=x`VyuL+&i6?4uqraG5_+N z#7MS{XNDQZ4tNZJe#n!)7y0D<;(MFAEW;N3Y`|VeRwf<;YFR6 zbUt5+g;xwSNIIW0N_fT4(&>D*e0arB3+eo5PhtIJW$-y8gjWnBHa&iH1T%grgU=Bg zUikiGIJjBUdbg8xswXFhERtc$ALLl+0hBkO>#Q`ee`rfdtN-xu}mK z4Z)J;qI?)ma(Q%)QJzL;2l`$f-!Z6L!izb{Mg6Z5%9~qq(Oz5A={DUI*mqu z3E#BJtp?tk4qh6)z4PB>1UC>F&utzV+;@0naG#U@LSna@r*XT#0O{nNNGESjWcpxl zw?=pcvIcu&lV4leORYiPdSDIo#;Y|%`NI{5Dq?)I*IQ^h*0F_&P4t0){MJdDt!$wI z5me|giW3wkD^@7ZR9v7adO?u0Tl8OBo~-x{#fua<7cw7bD_*ZC=PW#}r>yq^W&|chRwky%mQka@QgKXDBXIMNVXtH&AhmVx{6@#bXqYQ~a9Z<%%~eKBf3a#rG6>zA)1n zpg2`=f#Pz-(-hBByh8E&ilR3JIlGj8L-BpZj}&bz|4c8b*h_JcVzJ^uiZzO2+ZOR? zt(Nh>p}0fwM#Z}nA6D#!`*4QGr+C59iU%mpBo;!CQRzd8BXBRR^h)Az+_x%yJaL#| zoTT)2;!wjlPw6X&Lk!~@rEeh)#(kyI4-$(o&XoQQagbsBLFqpe2kLr;MQiD*M%V@N z&cxwyH-SD1v{Z`a{2TALq_}wE#EIZf*ndK)_xE>6y^_H;wex+z*QaC82OCUH-?W66qd9$k7z;q-5>xNwG1m~*#@KQ9DN zxjFZhY-8Z&oE3*2P3m==dGigHQPQ-{F1Wcf@5E%w1ts$ebx97wuz)TJHF@lTveZ-~ zFjPL8-~+Xi>v7j;AICX!-zG9F*TQ|Gy#znj)DHUC@z)X0?#6Ljev0_G4`LF7h6!~F zp0_w7CL`~JB!$8KC0sg?KXm$=z@gfrakp?q~PSB z=dE?POSaAVF4Avzo`t)^xe+tcI_Cq(U+>(B6gNAi$n+LxUxYc{c^2#2SDfb{$Z#&k zkLf(h5$b%C1$SNo*LEtAp}6xRd>p42?#?U7b`OV|YfO*%zf4<_v|j z;m*qlIl@_w)JHl$N8Ej#Hz0GA!}IJ$JHt^YV;t&_j&*K?Pq9Ot%@XGtRBEYn2kwK$ zIe&)Fc&87fO>mAxZYMf1q`RNPyNgLqCFJk#91ouZoc}^j4s?1TmC4S3A^%gHxo{uk z`~?0}ogoOh({Q+f`6u3Pub&#uDrEa!!#NE3z7Hp9BdPlh=K;V2hQo7S9yFXMk*`M$ z=P7vp+;FZyULP}@F38B^hVvlm{0YN36a{|La9pJJ3&Ri*Z8#r; z_bbC;ANsZ7%tnM~42KG)&l=972=W`lxg0WoYdFuK)Xy2tn+Wnd!$~3Uzc-xkg8GBu zP(yo{;d~uI{%AP0Nc~TSa~gs?Z#efMy%!J!#e5OzA@eU8&JRJog1mrw)o@lIq1Oy& z9~Am^!tRi;6f|55m#i5c*d>-Ni^gi%4dC zEnCMq1KBa0Wyq=Nj6j1}&K!u2IYsccoe8MFxI>HXjxQ=pkJz zX5ug^ak74&XP8l@r|q&cp86d#JKCh0LagYOca0ii*zh3Ce%h zN%4j%K2iDaJE`B1zn}6ybW+vqY?G9~)lG39YkYs@Z*x=cvpfeV|1>wn?XmF#m4Bw2 zYGZv*R{nN3#hs+_Dat?BO+Ci^9i;pV-4u=g$EPa)VmHM@xZ-8X-{Gcc$Uk1L{43qA zJVtGrlGnPaeaNmbkC5uS-c23Ekzc9&_ubTAG5+FJN`L4YT{tG#I5PXVhNuK4s3jt< z@F&3&mfRnrHM?!&G&9}gQ3=_0{4jF?njn{o-ti+$PG+{rt@*h(vgVHTd}7?1pL-$O zwn2UR&}TGj|0vJL>P?@ES>8tV;Q=$bR4j=%X{_$_xr%kTM18u^=VOfh_)^cuOwnf_ z4yb1J=}MpL*?X63tSC^PE?<; z5l-@aB8{+3eZodKS!0EbaEkhbjc}^x6KRCg)F*6&Gc*<(ffc;jF1f~}(b)B^U&YfY~9R#D&7PdQ$%Gr3$_ zMFpu%953H7x!zhu{Zhl2_wSnDlDGp>t2r*NH@VPSMTMzn;2pm~xr2;uw{xn!QA*bB zXY8JLn)|`4w><^F`DQhK`*8g=`c6T|!|5wq;Zs0M5zaU-38Ua4r09(ID6^mulb!mF;dA&XI>_IK$mYCmNyPNpRdvV}!B`sDa>aK1irUK|ZD} zcMBgQs14EEUXG!h7zbu=dw={Um<1@UJ%?i3y^$;TxaZ-M{3Up1qG1idIUHTVa5f=h zrc;5!QAvYQm+}s=Z!Qual~~WG_JR-SeJnc&v-JYPCN}bR-6|Sfa3|s?HgS@)iiR8Z zDoi(t&1}@Z=fRni*vbQG3f@IV6DQK?7c6m7worD#X^5NHCii|tiGs(_9Ep>?ips_v z5(4$MtC)dYaWX^sW)a+d_ygu$@ab*$24OSF#3}UXZ{COcG8dR^abEt*dUGuT4j6~B zn+wU4b6rYsrpqMnT$gVlr)Hzc8saq_f1~hc{t40cS<`ehm~_^_ukcM&y19fwj|Mpq z!vK>R9Q;(qQ&k2HhU0OBE;4H^JX;Q&2%5*y46KA>6C6h3Ww3kOWAQtf`o~>fbN>!E zbV9xl?htc4TRmx->~3yWOhH_#XG&Fw|`tqeou2)HcvO{L85~t1nT$3a5Qc(e;3xKJF-skH>MO*wr8eyisWp#7=*!c%9fEDDWFtxm< z0p}Prl$I2il$JDSi2)(7d!0brG-6j74YCJzenl?2qKhP}z;A=N` z2aeybxEKUR*s-gYG$1kvtUr4?a>WaPrB;*4Jbpz+eq2Uv>}f1-v5l7ww=4`jLp}d! zn1w?RT3#5xS`l{hppUDJ!gJZUEPA(`Ap3_ z6~(vCk8HxUJyThVGc;P8+ge&zpbM>pvG%p=n%g@>L7=z+$(DFxBgOZG8Cp`MRPBM% z+LttT;J^Uc*15OU;T7Jmim-D0O#+momezf}0oF>XpFP&$d?|~j-hh%ex2gkwcb-b`NSXEK{y7Gk;Gph~>&okou;cYH4YN{&d z*N26M#!U;(BH4r~mnla2VP$bcdBeor$0B0D(tXt&j=4_qWwf^~X;|Lafl-JpGV5>* zj~}R}rW$!;D&zbyPKCAN1~iYBlX2O$SZKV+-a#~M@}_ld_|@}@w4^iAOuFM(ocS#{ ztUzWLnMrh}(Nu!6wYMx^-Mq9=4tDU*20-{A7aBgurOX95)MH)y?#IyhJME+Amt>w8 zQeRbfNL6L$XPEf$!*h_LXPDryrq%7sP?O76uGz5XHBpy`C5Cr$i7&HMDm!TF1w8d; zdgHp49bOel`Mp_VyyxSqe4!PvsvmOjAT3tl>zzN7={qjkQG&4JJN2E=sqe&2efKlwtXVy~vHchxtyPVKxnzLvewfwl z=2dIjHqORDTg#hyd+LSbX*?LXUcW-gwUr}eu80H#nqR5of z(7Hx$d!z}14qAUm1=e-1S#|BxqDzhGI+%8<9t%q0yA=!it%{ab*uA`;+F`=GWWUqs zZ0B|F-6aOgiPV@DGg8Ce?I0c*=GN)mq*lx9^7>hFXB12ad+Y*UY*u?GHzZQMk!J4f zj#n}fj6K}^NSC5^bNhR4neN)wwL+Vh_wgnEob}JhPrqZ(iML4(@S?)G z-l}Np>I4(Cg|@vvp~{Vc5|zzO>z2=6gByRGEGmny*NQ5sYW~d5metIqCYa_TMal>h z)~*iA@MOK|6;(kZt!*u9+FCj`8Zr#E8wcglTi=g!faPMuM_30eyo zncZ-w$VX$1%CZIvS0q&CO9=yoDW8wcBCU-bOS~ghbzFMW5z8uF1Sh*8E1kY=$y^$| zd)A;c@L@&HBxKG@{TW>{tEKRIYGjI=5o8^Ap*j(Ca(rh+O;vfFL|aflEvV?)=G9B< z578R*AJzO$;oW#^?FYB$9UEKu1np-Om4_Ql4U|4j`HPGUcvKrlTOh`})1Qeqijlh? zIhM8EXkXXV5Oje(cc$<~N92`G}wXp23UhkV@&(TRUM5@z>YQ#SNJYO?=VDp*cj8)-foPc#~AI> z=`SKgX*kN3Ck#)Om{Tc6$Fen$CGN(irnctwQKjK8&y_=q$(JKR?>iN~v#Dj^QKS$aoY5+5u1M;rZ$2z|Fix z<*h`&KM8*R<)`b@K1Tij6*{==o8jfxp65dy+;l!iWO#iR=gM*83hT?eA{_@FdvmTF zNetyQ{~cLZOI(VGvhGy)6R@5BaM#7Ihd9-Id52)GufAkJr&tEX`z>OV_`DD zlqviJ6sIcIDAp@3QfyW{T5*Ho7RA#Qw<}(tc(LL&ia$`iTk&DVCl!CM$T7?Ozoz(> z;@=cMRODGN43|)(T?5j2ihUIe6^AO0QshQ`hM%N(kYc6c!HTtthbSJd*rd2ZakXNH zBK7|%f2-mtinI|;|8FQ>sK`C&^yeN);&&ANGxdI`^j(TSReVVCF-0B-!1%vW+@<)E z;v0%@E55Jzk)n+Wj`6b;a};|i(f~jCgA|7=j!_)1cz|M=A`S2|UX5a%;vz+AzL39E z@o2?X#r29?6i-w7V-Tv1i6)v@58)z=PU9k9j4Qy*rM2~xIyuF#gi4! zROG=bjQ>r=D-?gN_`D*IN@2J+75}REcSRG+iIi87dp=3`Q0%KXM6pD1KgB7E++xpo zvlMw!2kFI%M=6TVHT>I^7Ts&mCo4^J(u{YZ;+2ZuQT&18-HJa`d|dHq#osFaQSlYU zcN9NXjAOZEdP&9ZiW3y;71t_mRs5Qw=xihY4NB9xIpsZ~_#4Gn72j8MG2t^@FU28> z6^f0DYZbZAl;N*ZulTg$i;6aG;3+pxaj+s!Frh#9;1R#3c)22V6X}1y;;$7&#~c2CSGp^1&KPbV zMgL4knvUOd6+ZCzd$+P@UR1}?Xg!?9GAT`)1?>ePLHyq(_)9^bLpHO^OQO*xQJjUf;fuetg zJvEn4f$%-|KwTcTB4^uo^akb)l#Z8Ks zhW31RBGUKsiD51Iko+P)o4G!Lznuu0PZghZHlnwoLq6AtLi(raqL-G8n>1-Jb{@0#_2ab=Dxdi{qGxNo1NL+SBzc(pLZUvwKm&- zw|ZQ1RO?->GbAd0{+EM#xzIY6OGI{UAhz-v7lAY0p95jrn^25M;zl7Tz!`h}D7~9kPpFrBv`*%>)wx{?1XSRp0_rKlC#K*`)+>CpA|4oRt z*0~;{+nhI%e!KGvxI3K9NM)V#2!gJ6zK7Xqvoi>p-r^jAFvmM9knUF;uIPsI2!2pj z&W_FnEV#3dxpJsR5_dj;kK@ojjqAJ$2??he&$`(TPex8TeD><*BoH#kc@-gZoogVo zyVDn`^l;uox_Qp&$VpG91wOr;nF!O{$%nLjrx6v~$N4sV`Z_!)r@%QA^7}b9xF($7j&hPS9(mi}8II0&fD?oK105bqIoa8X98Pf>;B%1kFmgE6 zu@Q2o;lxp8(EI-}>Kl6hmm%BG`(K3eL+`%=NkQ-bM*!&kABrTQ_a8$L=>7i;p3wVW zgS#4pM{O|1=Z?djG=#(ED#f1nB+04<7XXFG8}=`yYo0 z(EF#3JoNsld1=fc+mUjOJL~z&qIlz_g@Yk^!}Hjrv8Gi zRsd%FpVj-n8j(!P)BAr2*)g0NI>3c~ zy*x2`djCI%k7=FIh`c-b2x*8B1k({iFwWP};4$YR=U4zZbc*ev%DFaxDsKSr5!&pxJOENz9vDQDbtB z`NJg)B**z!f8fYPEil7pQ?_#;rU%=(2+|VHk5NL1#tEZ__0k~-nZ3yBV(vnCu`^(W zb_QrZ4wWJ(^&N13;P6Dxw9fo?3yX!8!C zVQ1h^?2BW}dxeIbff?kFH6Ichb_PCRwMFaOp2Yx|6u`@6a%YrrCKeUvkb_OV!f_9j4MZC`BB1}62w{yIF$K)zXI|GA}3oEoUu#8|AL&En)%n!rf!V5Fiqh z^9MJ63xTND{}F1_4fXmD!ti!CABtFghr^lUZv7)AY(tjZ6Y2D`>z*VA{fg{@t5HIC zTNl9IMYl-@T!Z1u z*yfzUH-W5Ypeq^ZLN5@iwi{f9=C2t@Oj$@amywL4hP-TU$jD|f*&BbDkASPG$xVWR22HhnGQq{xoM`Ve)G5$&3tcXR5z^KO=)j zBGPUdyp}z8=Va~_Ad zrZZv}CJwXRV~;qAVb^KcSFlo>$4A3js4;VghUGD&<`o+D23FH|qhbHXocvtFevM%t z*RT%8n)ys5?3Z>d4vf<>L@%1U;FpwtnH>wyWX7=ULb3EQAdYuuuvP(M8;$RQF5`!EW$pN9<YmBs8b&~Sb)(@V}b8Q{4y1ft5Q=&hh(SPJee@mlp_oF|T5&cOo z`dJeF9gTjrAN`WeUgn>-HS?!$_A(#Y0_o{Y1S(#EJ&Z_@^2$nR-q%C1X929L$f=DH zZV+`(`rZ})LqjV5KG1P$Bt_J{0-FY+De0^3cy=OSc0p~hM0bepjj5H+iZ#7v?!t!I zrL$>U=8JBNEBW{It9(r|t*%nPVnxv_O}ReMvZ1nApzjn`>*rvjg*oX=Ej2^M zEV>&wy^CfTV(~R$qY-xR@eOn4!UReAoEd3GguKD?&zfh6v{EMtRnLL8{%qJU@)RZm zowYB385ge;?5OHII8;3jHIGBZ<4H!K`nWfyUi^Cls#gX*zhT;%H7i2}XEk4;mcCsHF%Q#O#V)L_oIkT+(kGgZ`F9$L(FLs7ui&WF80p}FVTu2n zHe$4=;)clUtf4s#9X%KcI2@jX>%V0sX3wTzJQZ}k(GW#$ornGp*?sYAzu31Hh1JOS zD-B%ZjEL^`=Vu?Lxnmj)D%8`Sf>@#BJn)6K6QdSl_B=0@Obq+GYU+z&1^@P!ivFKq zJ|^8rjMt(6_ZfuQbM=fX4XZ~7C+Eyhu?iD(V1Lf-ECIcB@t&EyXO7+P8s+9Wde;qY zyh>QMY+2pd(XwWBxo0jf2=L!GH1i2LtfkQ+-V%f+qJldgJo|X|GPKcYq~Z%|d?vi# zEe`4n2AQJwq78bRA$P@kn<4Hr>t<;&#><^nU`QoWjcLIq?a8!FBm$bYe$BeJCCz@T z`gfFH8ocSu(%3&`@Fr5tY0nNix^erdWABqJ;RJV5dZX}#HH{O#dw`+PJr%v77Vm3< zC!jB!A)U^$Ew|Fq0(tKizBI1$31)O6_1MXal*%gqMaq}vc9tz$w|WUz)zR(Eg6)N) zmo07VXpGXUV4W5wCP#a=Xr~lMU!4Rm0wZxgF8b{}`8PSX)w1V2ggi<5#h& zRCd|6SlP)|*(qk-17-J@-6y+jKDTh?6OpNZvuz)|7f-kE6FfTaX4@xxi@rN6c%!j9 ztJJ?Q6q7=M9iiamy=N^5JuhGttBs(jUr8r^rJeYV>%{t8LaK#9dnQru} zGd|tP#jR)9!V_GRE4arU8a?=982&N6S@?^}TM4=|c{AW2l~)sy$6Xh`yk!~kuH1vX zrVM$9N8~YIzPuAM-Qk9BqQ82dk9yf;gEz}v<2A!BHwc|CI(~i8 z>oVlsHxIk9Acyj}I5lvjv9Umk70;D2yUL#1^g zQ!k(QO*o?E9aZnip}ax(^X1WY4C54Q{8{}CV{K#`5qbQ(H6z?z;}A~c5d3hoHAA<5 z6=Q=kIZZi$&~m?Sj1h!1pgdEsi~e3$ET1pe*P! z;p;nzk#1x>GsQ3pk=VZQ=XheeoJW|qsJ!>fVPDJ_0$#)kD!iip{|dWYoTI|a7TZpK zTZOghg@|GGOb_p5gy+fERO@;W=}JR}6d1(!*zEgwF~C!xh6_Y-9?64+eVV zieW}i=W~V+uNYEG=clJ0g9WQ}K6^oU#h^o;&gYC8UNOvw>3q(R;T1D_XYhN6Ot@lL znbPBPr3$Z@SbK}oyvqr%SenH|%HzxtUNNIEB;bn4$PK+>xZ7v??62O%krQ4q8A(xk zNJzjH!;Hlev(Ivlqg}M91j;SNpMQ})2!COC$C&Fgf#lO>gMX1;j=wN`!Z_Av0?FT& zL2m~ghR-rC&){=!w0|)^H`w!{I~V`%70MgSxoE$ql=k>NphxUo9P7F0k8h^&yBQy( z@$-!=W(JoRzpLEekoMyD#F2%hyo+JDS>C@$>)tN^)9~O9WAM`8>q+qZ5`6_4ep`)v zdhwr2!hq2aui=-O;Mpb&I4~3$s!+_Dxx8WC_h|7O8@nwt)3KBdZ`K&NU!6S;# z3QH9{>!iIFV>q#E*WjPoP>gD{Mtjc$7WNqnjUOxphE<|8)+3?uBYZrM3ayKURp!l> z7L3?&R~uAJp8Jb-XE zB65rou~Zuth9F0wg@J}Fi@(^{17Gax0c+GBOQP@>DK;w}t++vPi{j~u+Z8WRyjbxX z#UCi%t@yCwlZqT8%m(w{meU0eLeVZQhKZ6DT=%|qr7h@^1hKY z@3Dx~(IN64iFlKu*w+Is_Vs{bUk~_@@*h(a`+D&IjncamUs8NS@omNT6+cqsJv7r5 z`+7jJuLl(SdO)$S2Ne5yK(Vg}6#IHWv9AXd`+C4Kl_&P~K#P4npxD;~ihVtx*w+It z)$n3p5470V1B!h;pxD;~ihVtx*w+J!eLbMq*8_@uJ)qdv1B!h;pxD;~ihVtx*w+J! zeLbMq*8_@uJ)qdv1B$f-pxD;~ihVtx*w+JMVUv0j`+A_oz8+BQ7y!k-9j9tFcw%1Jv7u}N{YVu#`;#S;|8&K~5Sqx40JI~1>16nlFJce~Q}C_bY2 zq~fm?f3NtWqNx5NzS!LZ{+IgGwiD~6t0K;?6&l()g2NO`6%SIZRIE{4sJKM2MRAQH zt<*4`&59=~UZr@i;vW^?Qv6s^Oimzvf83r^&M3tL6%STithhpPgW@TQV!sdZZ&vzA z#Xl;>T~B^b#UY9l6sr^$C^jpuQ#@JmJjJUNZ&kcs@oB{u75}Oj#{$dp^;8_9I6<*W zQA|=GT!+%z6wg(p4IRq)v*O2!xp-)!KaLI;oS-;Eak1htipME_P4RL?vD*hZPbvLJ z#lI;2L$L^tJ4{ckngGj{UZ~inxJ~hV#cLJsRD4wN_lj>R(v}>R>kd#7c1VW_<-V5iaev8 z^8cckz+)b1sOSj}R-C2CliJBYOmVs5I>nO|zoB@E;&qC*Dc-O6OU0a&C$~Uxf?~Pi zBE>dEv9pJKh_W>BD)s-q;ysEF5HXe?R(y* zKTkU+zefF+5s^M^P2sRuW33|3HK)AoN}o%Fyzi+0kJSGj^?ywLUr_&76yH&QH^)nd zHiOvrx-0e~BApVY#hMV(nWg@RtN&3%_^(m_lhyxp#dFpFS|ZBxJtFGnX2si-{|lvm zMTERJ)c+sqZ{o(9{y9YCYbX(NMk-EF|CvOjbC}`^#dSnH$Zk^lRN`c;%SvBF#7+67 zN`IG#2jrWSzE|-H#orNe^ZqBL-&Fiiu?rs3Ej(YOh{#WY;&8e`|2=s%A zq=E7r0i33^JV$_@qx6xA^85h*Hl^1qQuUm2PFKV-YFGokcL6efNuykan$O`xgy$7) zCj?1rugrETRQ_N^X)i>Q=U3n)`UBBL1!pSODAp>@S3HV{dReNtLUEN^ z+)hL}&Q-in@nXem6|YykN%0oNokaAj`xGA{Cba#5Pmo6bo>F{bIX?8p( zl}s96DA!S0U#Y5@ZbE_1zf8PC3n|06)_a8**zxR(cTh%A{&ag#(>t!Q0Nf>P1a4Y*m+ORt@d=Q|G+KAijUv>=;Oi_1GhA7q01=Dxm)f-B_Z1!Z%Hw{s7ET)N0f zd>=oiN5AURI6i{>4}3cA(Or-k32zx)_@>0R*AIqQ7N5$uZnd*+K(a6?N4shECI;>T zWqCXceTBn2YaRN5k#!9+Z)V+#U(2v*yUpG+Cyg6-GC>|ELx#{#>{#R)Gm}~JQ9h&xES%e z^kNC)uNNb7Rtr3gELuD_vmU~)mBpSO%lZSDc2+f*u3;a=xbI-kh>_$o&$01;bb(Ly z+y(QE_(yCAtd?Ep&aT6G7p6zrDLz!hEt3IZ&?Yq-vg0wchmbj`CFI7<`y_5**XlX2 zIH=U%)G9I)X1;_S-nF(8g1eZ5ge*((=_H;shY2||HIihuCVN!s1d=IJ9=VH_cCD?g zH{#ut+nTxuWsB!1*#Rqt5EB0xG7)Dla{7~G{}DfDlutSn>0(Ffb}lL*o@*Y6>d6@l z-|ToV^F&~ZlYTtkWYeQIQhWy$?_;uOSw(hgEQ{aQWR;^fjBYd$94|0u0FpD2<(N}) zKis)X5Z)Ol6H1Yh`#w0%c#kr3Kg3XVCU_LO9p4%_6FG-zqM_rT7&*dYg3?UKQl$GXne! zhY#@G?bq?^)Z?em4LK3!!f(VM}QxMxKVxe`XwN>l07WaMkVOMRn5DsA@|>E%ss zoZ8p~6_q8G84K|bP94XllcpOiHya`H*~1+ovcA#ZYw+GFKO!p@dA;Gt8r~P~ucv}- ztI~uHfP=B{4AqqvQ==)#YufYwC0}{#yS$#n_7amOOsXuLT0Loo_0Me{axkkBJ7DD0 ztz2ZCq764n7ObtwnNYK`reQ%-&Eiv)YJ8iI;%OC=Dsm>RT(o@6;u>@~;~h%1GsH2Q zL7-N}HiJO3$(z(cBY$ctC4Sh0$mJ)nW}NN>AC1YTh@Q>xlK|7O`e zoef_f;`4bnc=&hA4i7m0eC5X!l^(KAA96gQY|;$1Awu<}>1DGjam9J8mE%jQ%VtfT zT3s?@_H;F)Td|=FK^B~~JAUdhz7>__YQ=E%?D2(D;-TDYp;{sqPOa33*2fc#hv=*h^Zi4`8jv0pbZPa^vcLXO(#mU0=1PseVmU z^>Q3;st@UmiIq4Nh11Hg&|!kbW0ZNY{EAhm3Hm(bSQ>JRvGRdq#`Fo*6*zRata^Nj zEXP-(%Vv~U;^gkOQB{FgV-pAO-FVo%Wn4C^VxoR_$1m*!p5v5z0?!D%T=Ql%)-*KE zyQmIRtXI@6npd)F(V7)CE1MeUEnLu8g9U&!jq@re&#K0`uvlias(N|d!s`6I+`N1o z!9H)vIu%wrdtUj1#S0p$EAl5ytu9-$ys>6+b;+vwdXya_%&TZZK|(^j2qw-ht}F-d z`0`0*6UUbqPW9BFW5PW5(zev6jW3xrYno?~6xT)_XUSBo{ACtyj8+9L(HLL7rG;f> z)pCY$JI^lm*gelniv_b@c0Jk~O(oIhRg6`$cx8?kkS9WA`6Sly@m4#V>BL@x98XKK z$f{kpsHwqIx!V+*C9eQZTCG{Rw5hhuqWVcQip%3UX%iRko2ux#&bO=_@Mvl3o6tm@;^nso~rYKm9s74{RR&k7fZ3$n*#j|k`I<`v}S<&6ms z!LoxIv~xql=NFbw%c)thux9b%n#EZK)nl?2HY`}Vs5XqFg6kTwJ|&!=H#+~!(HDfX zR$#w~1x;Bv>iF!&RZE(d)Wd60{hG5E=@XAv6p#hS<$iiP2< zrFpQ-*pjULaMlc1bRN!Lx^m5!F5a0+kOgMW zYEvL+K=rLb^o1p#40@=sdBa0w7|mc<{$f25pBga%pEq6a&s6gxb_RI7`6~n69^VxB zC&3!CA2*f`foR~@X$E1cGH*okBiW5V#OCPCi4kjHr~l!t+qn7lP`n>cV< z4?xz%9uMQZvJGDjge+qOF^2DQ(BAt9pROl=GhP1bH}^rElZgYTbra+bp+k%bqmIfe zZztqY7A*%TjJ&(yHgVvzo`gK|7-Pb2hlf|*U62=sA9?v68+i}IZQ{Uby$N~mn9Ae{ z`##)Wc`rbod2U1_?|F%n3#54%h2eT4GA-I43L3u0F)Xthe#RKSU%|thzg#p-C58#e zbZLG8>q*9X!*joE%S`@0gd5eP9-vGU0?#xA(4@stO!ICq_*>xnGaX_KAJJ1>)gaM5_kC$?K{lAQP`h50rV@gl^@cit=aL)?|mQ!(lHp`v$NgF=7 zxH*~gvl)YB#%~tqiDwDTwut9vL%kg{Oo#1}F)H1J-ySjzI{qz5{M>lH--(^|M5>)0 zoN6O@1~&7X4AmRkR}OsgUFVsGEC-^RlM7^h`tO{1T_tj=1=)^LF5fkx(v<_Z34M*= zF2TKmcM3ir$aaJAIq#gTDqT0|^+I1N zxK(h6;7-A>3f>|}Ega>kxv@YsHx~Gy_?xq*pBDNhL2fJ0cy9=DjSguwCl=Tu^e2LB z1Q?zw*jccLU?0H&g2M#!1jh;12sQ~`F1TOtF~L^_-xB;(a2y&f=3}DZEWyQsje?g8 zUMG07;N61X7kp0eb-}jb*l4+W_W= z-$^3d4dQSjixzCDnUNv(NMn02m3xuN970j2%js$UnhcQ zd+|kQf9B+k7^S8F$mK+H21ezcDf}m%Gf==r3Ei{;1w+tA;cKzkH*qs)yavkf`_YAE zt|-^O8#ium1(l(FtoR&&H^7ED080VxDpVu;G&asq$`4^cYz_d=^l`sNG3Q>uaMwQu z%q}O{*oCWVG;*o|bNKK%<) za+=AU^auJlo7fyCKaXr%$(&_wC#$*Smirz#w{pUeo&(^%`de}yP@Gk`wUAQGrYBP& z+#@*xb~6WnYRuf^4d5J|ydIpJ?PMON^u+P!0Ne!`m;>+%0CNC70$>in&k$$7oxB9n zFbCjj0OkOsp?YEtz(b%8<9>!B5%)LK5FzP(IBoX>HgCzL@UW84;vFV`2UlP6qz58GPg>woJV4}1zL;dzcDz2IX;0A;mpw#+q$W})j_1AL%+$6i3iW*5PVAK@5w<0H|@nCXP zFrDoDv~w7mW)D=MdJcfwQ9|p}LMRhAT}aFU@PW<$C^F$^EedoZ$@-)Gu;aCm0nX<4 zvm$j|jY4oc**Una^q%ldb-USXfoX*d=wb8GqcqaGlk91;W^oQc58i$+TYXVD2jBuk zaeLd;rl;(~CBxsqn$_tZ6u!TSP6$!2uz$@D73Fq%8+Ynot0wY8JAW9y{&jDuFlgsr zfupmVgKL1<32f#4u*SMK_9 z`yWlQ-B$JN(Pp2Us!p>|?KTPlg{Q9OGJx$K56sdSW zVv1BeTaO|YZ-Q5m3exk7L+M#D_F7ZDXhlI=t*Tj@$qMv;O-GtIe5;jDf0H^?sX=2> zk2lWzPX*`~C_umHjr6GSOtp;__AxrqFH>I{OXWn0(HLXfXYbM2{EurvW0`2HbvTjI z(=+l=G@-KkyyD{OGU!$RCzYYc(L|pLO(-WF#1%2Rtm3ps6Zd~y<7t$c|8ok?ScUbf zwc1l=8a3uWuBtLt6m1)jW0aKbXzjhl7uO25sna4jR=j_kvhkFw6i>-kd#kv=V)pTx z!;{wfEr5c2X-y+`vr~K1ajuYYV`7Pwy$JK%Fq6p2h7LA+K~qyh-NH3Z;6G`D;eLz& z;HQ$r&|@g^=;$OW(-&9r@dp!4TRw)-42I=c(TVstZpAo8KIQSZh%x5Z2*<6AY=%vQ z?QQ}+VI1f3>RJ8_VGlt#hSo5;u7BMyU-MwS@~R<=10Tkiu$AyIZidZ+5RSbWW5TF| z^QQX%#>|-x(F?-fnV32Nr}YY+M>ZW| zj66dd^!k4pdL?AfV>}fHzSJvu&9QnUPr)mGYEa|Gu`safG2E}oYq&oXCvDTPZg*mB zi2tfG9nb;T&?c_QN$57|_mV4BD4FBP948?v{R>d(Uyv=ncl2i&6GsR}1Sbei7pxGR zFIXekAh)l^zDP(!&6i9tNoNFhHe;0V+KVQ0ZZSyCnXNf?pR@dKiQ&Jq%FkVSwM4 z@W%w7735$f@8?H?YHt$I|1R|J1l9T&`155UKhK#ZDm@HP>0y9M4+B(s7~nwRQ!8jd z&lS2>aGl@{g7*umy+6QzNa(0wE?z>WtMo6xNka2jZ~8A4Tqk(Bpwhn}{1&0VCHMou zcLZAmS+yxo?VXV(^%iZ{A{->qxK6JV@e3B zX8rD?8HZY}oo}{=a*O95_+FsyncACL)AwIlcc?XEb8^XZM?F*p#ads6I&p-W8ac!qo`~3c&20mUMdG~(j)6~BNKXX4mc+~3n+t=T0wIT&2p>e;C zTo7rwKlqvdlU+q~TK&1#9&ysrAfb5vuU>!jw;x^i(F1|f^zZrVp07=MA^559XiCK0 zSh(>=k!y+?=Vu)9*V?1*|e*Q?VfmO_bQLXOI#PiEn%Pwp;ph`$*OJEL+)XK&p!kau^y5;ytps2 zDwy?<3&HFvC6ieX89*@BL*^p@x{x<1@kYkh>mko!s9q2G5k;HzkW`fTF_<2rawV{f zTy9<~JcHNc;+iF7!5<;SHA~2Xe9S{L7$jk6IZihR#1T6kFci@Ua>fl^5t<{tpe3R5VO@)HgEBM!IDmC~UhBZ?J zQ~*J?O8$#A)d>aaTZmxy&*a%Sm`PS4a;E>XB;+W#j!9llCzHGj=-+CR3{%iHljKlR zSC}OCGv1Y&N)PrTwVm26U;m6?gq&CDFl@?}2JaO2I(VkI^mLzKR(7ybq}IY|pJ&tC zUIe}l+-}D{k93DiL2GB)0fx_^Z(2Q_bLq4?+S|xdXY&!!FdH;BD@-~X1k1jNVX;MV zqq!)qqdka;thf1GX!sdZUBsUuS|>I-_If(!z`t`o$!4;$4p_<5HK(|}aP4vyX!{Nu zZv%3xqTRu09jLap?|2BI`X2638D}TWzDqg3Ntt&mXMg%0pae+e_b$U;&rmLjw5-jr zx5L`hLUdJ0+`uI4vQ8?I8<@zmu$@$4-9VA=!FJ>9B|K#%z~0l{kLW>2>`o0i`Fs3_ zlEQaV@$}*{?pwjpi|U__2<*i|Iu{O@-Zp1Q*u8D_py*QuyM-dAKtiUNrU@&p9UMO*`V3JuYn5-8UrkJ&Sso7XN$Q6ZyQzvx^ zD@j<&tG&3yE-k*E4}}_AZ>QK3&KggTGg48~DK3Ny|2lg@L1G1=NmZwr;gy^q*Smrc za=RrSNZ#EXT;9VRT;4MU3k=zd>Qx|Tn)i;$#wx)!%N23>xmgX#Y@QZZ0FmtDNz9Lj z7!N&HEjJA71)F@Bf7Pl(R08yKE>YE+Uj(i?B&yD6n-z)!;ExrEgki9*^#{9bA6@Eo zx5@~Nrvuzm1)(Mr#A~pjN-pnFH5YgF~P9+DCC09w&_c^I=mFuW7xBL7#=j z*D}8FP=;yoR&YE$MK9J)0`nNMR&Tn&X1XAhVPP?jZK;xHNjP9qMM44aCor<|H+Kqu zc*TqlF4ihysdlFmCyGCDy7&`WGsy2X{Mm#$Lts?fI?qVZ^@}p5>Hq>oc&baHB#IM#HKKMTd@74wo{FroCci!fr0h zg4NWRUgDrQn$7B}Z$z95PKNJ62>0pD65FbLk5#D@mls!8%>KW-diU>a1+DzdI;qvO zi3?;=mn3rA#j*H8pi`)7ob$W(7RR<)cGuGe6*$e|bMpK28`fvQfId!gc$m+-fc6I4 zc6wybbGq)#ahk?Wan@vm#aSE99pR)+1~t@488`Rz0nYMlCnG#1%UK@wIp|TCbZ_?A z{d4m(BWLtKt$#n~!Arw^a&!CiKcoK{&Z~Af$4MH8&zfyF)HJSH-V|G;(zIaV@|wDp zi)+^N))Zwm)vTy*Z^^5!$JNV=7c5`2W;s?v(?co38)}wdahG0as8)rsnDn`;4K+<` z7c4i&UyBG#!G)__XGJe$HOdB6z_oQtnh<3T50*Q{OF~yPF05X$pz$L0q?IGCG~;4S zRYa?nENQGk-qefTc3q+3KhC;MS?GxJTCR^5@+{8$$5pc|RI94$F$k|uOfm(RI1@Xz zMo+D0WIbqDvvOtK%B8G7iA7y8tGIZ4MTO;E=ox=ZF+qF?G2Lc@uVPN{kpx8LER>o9 z-lz|MR=I*iRlnO?g~?+;S1sRQ=~I|R!t!$csLc&{-yMs3k7HK%TDr7M1X)hrB#Xa| zH&^wV%;-gjEU>zjb?R-aTgesWo?52YBD@VPN>#`Ra#dO_Dv%*c} z=`2dltW&O|QsccRv+ga^^Oa{OpeQXA+3JgIv&;37R>M8vn^pLL$kwFDwov4XVC2d` zWV=6dl^faNM6UKluEnnmc14U~Z>TUWJ+jq}Y;z)4_##)@3zH+yN6c|qg(=0);N-05 z;FZQWr$VvTRI|P*Tb@zktEP{(k|0&d6MPaXX+lUs!+p}4Ih>a($4@EETuf2NL$Q0({x#>hd?!p=^I(ca$$`zd~@O9<=YIJ z))>Rr2oEnG3Cc9a@a=*J`HU$8LEWD*ChT9};nnBO?+xV{heO~Wf@KsU^=c*#oYr^I zTYAakVVu;97&rMgUkJukYi1bbvMY@jBcl4xH8m$Qwe37!&p?Xs^8WkQad;<#8Cz$on8!w{{c7UnL08QEzJT3ieVV-r-FuWN9XqSp&W7}zcGIX z-vfpK8qpjG_U7*m&;3&EVDgs%K0Ky+BjR3+F`a1$ph=7O` zL4iC0PyT@G0n2pLVVO6tJQwwJF8qu!@(gXz>;GlwSCfrkg{JhhC-tj|;p!(vEC$cp zNenlwhlw9-6VCDDxZ(LbUc>WsyyjT_ENgz;@O&Jv;dwY-!}D(#gXOJ_RyY}o=ihkE zvFiZ4tGFz4K0mJe8we!LZ#CEb%a!n8O?8AF9Lj1=Ho-4?)5%O0ERtZ)ME*D%ac&Xqv z!D|F}3GNlVQ;_c`w}E(} zpwcyiZWj7#!JUF!bwK_*1$ovN>8AzNnmy2JtsYRV(F1-a;l1&~lYfxlnSw=v(*)-T z)(F-U{g_K4xSohAO)UWB?G@xMo?N5#Ey3>+!S@3RSNnT{R_8__-VY`G*Ah;J9OZo` zNKGDTE+HXi3Jw+=D_BTGLp5Gd>7J2Jg@n%+TtgC8EM03XU(us(dAs80_p@P}s zpD##FAmgd6CV|vBQXY+WO`Ur0@ch`m(4Xx)k^Ls(a3Y>tt{}hjq{j)C2u>87BREfR zk>FB6_5LCL8lg7|ZWg>=kb46#o!f~h*SiJp6Z}`fX9ZsrJS6yI!S@8!dkHy5h5kg4 z-(t#75ma+UK&$r@c)Ixa7v$EnIJG;Hww9NpPFsRf1HmQJ#8lfsYHV z-doVW5L&&rppOcz*4BciPLA=pJ1vnKNTQm{0i=$N^iV;n?noC4P8OUlNc|ea&lg-M zxI}Q3V56XV&rvV0APu}$@Or^Lf?pTBL-2s0nLDBeei8pU@qbBBt?h*WPlQ%$dO;r+ z`iP*JYx0TE|0zgCBlDFi*hR3rAoYz5=ZZ5T)sDoo1*vo-T_$MetjrU7k)WBw!hSmW zn*^z=Bz>iz`rhG#p76e*o`^}YgCd_1QN`UBN_i+Jk21$O8C z^Zg})zl;dJ>!e&%JbYx$`>x(|(B?g#O1YrRM80}YL2o7v`MOJ>r;n}5Iq{sDk+}t< zIrkRdzp#`NSRcct9Iq z11RGk!R|+AYYl8N`ozD2{TLmYzOWafz^{f4;X%C(`%P%Y*TK#^9edQn{t>^q`on&N zIh+Gwt1x-*I@sIrz*fVi;Tik_c1|bD`WM*WqaqB3O-0}6P1rlo#y7%7Mq1WaV2>0) zT@RZv3j3kJK87C#7s38^1nM|!Q9jOif_(%Jz7Doq9{LQh>7y|t0QTS*d=p_y&cggP z*eE()XTd&n4$iWG?TilC^ROSDjdusObev`FhCQ5vvq)ekXIs`j*auL-7Qpt&vaFY3 zCl1B$SJ-z@;m?H49A;TB!ajHg>K5$1{Vb~nwpV|gAqD$xUz}Y5J3VY!H^cTAfR)Iw z_YcJUG1#etv40HgdxOw6!){(?S+ih=U1V9G!~VDqeO}m0YtaXR9kLvAZeh2qz}X3~ z8&}~Q1N+mJ_)Pf>^1B0+Y5Hk2ArV;`$RSR(6Gxc z#5V=@hItqpgFWX0oVf*CI~RRf*r(>8t$-a@g|kjzzj{8t4X``QEo(gN*b1Ck1 zJHf6j!@f1Jqbt#eguQ;2WlexxJ{x^G*yql}w+MFrc$_y2`%($Mp|Ay|n4bvy^$C_W z1@?tv^nqa)7Ga(v?B0lFO@bX&h%>Wbb0=EXZ(#RKvaA`fi>FxDeXy@h#=H~Q8>d^= zG}!zZmi0dDE7R~>0d~n$^ub`cc-m*tum_H3{~9QM?qlTHcnf&^qd{jnm$5Aj45IhtbTY}`BiPw$k}P4^Hk0Hv zq^>YYva|18sj2ipGpX%6l$4ABe~36&>98JFa4X0VR-E%nPxm_v-;s`MQcpy5j|A_A z+qRQYSuytpUjAt|g~+<-RL0`3mJZj!@wt`ubAZ3_$v8*K#c=yeY$hU+yz_rfb{%!% zl%GK2l%JrU+7mKUdy?8tS4q~>RZ_hEYOflz(|8B7)3|5W&k5E&UyB>^Vb=j%+bY5T z{?yWUEDY34W&5 z>L5P9_TIRY*80WNeE(?c@p949;-eSSDHOn+32O|RW@U!snj~(*=+650Fu)=YZ3wmm z)+-O))^^wTp_`n*w-~e%LWH3_n#*7*&zQvs_>;%OIMHoS$lpX{tQLXHAM-_d#D9S` zap1Jh546ADZC@L{P*DGFXB-+M<7T+MEAs_9tf`;!X62niPm@#~>!3WXnO~As`lhae(1ioLINI;W6BKnOnb7MMw zx5E>+t?rrk3$J7JRKM+n-wv@@ad{pu`e)^-yUZX?#wJsW~V~)*~9elUzp_CIOQHi!G6?k&40vx7G>yZPSs$8pDKUF_AKj z4PkY(eIeW8>oliv=eN;^(Xi$IoGf zO9fX7t`Te&+$MOv;7x*G7d#;Nkl=HIKNfsP@FPL~=4Ac?f}I4F&ItZz2+cFj$TvZ7 zmf#}6)q=YO`5Te^-xYk6h==+^q16~O%Jp5Le@{ett8&IWjm^)idES7Un~3Ffv2}D9 z*~<;n=xbhX?x<0t!r@UPM&v8+lNj^6QCGj%nBTGM=+Y9_(P4mPf;%Phk!{VH|M(wf zT=)1NR$a&SaywhB!;k-=`Z{}x)vs!P{RGlHJ509|uFW64YK0FUa$6H07kC3f7#Da7 zG2LEtn>A-FQw$O8MF55f*z&m;<**#H=IpzSu^Xv5X3ZH#$}vR1fn*F3P(R>uu-esY z&i;!M^qMoOl3cUqteEU}=y%}s-vJ(d2H$Z1<1Sa3h8{(*|4H{5gy1K9=pm9%xsNN- zO)8&`Q{0{wG88(>&}W294N-;Ve^$u!&~FgQ|D2E+p+7Rk=Y{MMYGLRLLS}|IeCmHu z$Z+TrhQ1`^fY8+peObsMR`PbH^osi;xKgU%#>s0BBloG5xWrCgOWlT8v6I(Q$AH;$ z^4fP8IEteQ9R?u84wkW&rcs?{rCo$8md$YhAXxbvt|?SY+QB7$KnUoHK4JVLqaDGC)qR9 z-I$}*&fzMu&h}3kGRI~%Y1qvBF0t&J;N6A$&)IY69L}%+Gn3(_;@Z{j$FKz|Ru75u z0pqB(feTm%_|59Zfqj0|+34AeyY&T0C!^Rk5CgRAixlwN$D}hLxf=()X_y~-h1H#l zb^S+zDph?>n|JW!uUkBoc*a^6Tb-w-jyuCK(Pk|WPew}u8N$jaIX4ZP{F+cayTpMQ zp17tKQOSvGiEFRY%-XAt*&7kAC2ctc|I_#)q+JSWUdu?WfUqr0!T7$lrNKLXY46qyr{gWu)Ml3&(fGLI3jjz zPEKCqOKml&Z2vHo$#NI95Sw_rI=sKYN9Zza za&Fo9gaO3Fyh;*geG1;qX+^5;pZc*y-QPNybrI~B8N-jRm*&UUOY2!+J%HV zl~_k)SwaGbcO^qYfTs$z7th-UpY-tN-{+!+-grLjRI|H9!w#0$sLvWa`ofYApGsxg z@~MtFLO3SDZv2V(hJ&YVy6ugLPH)3k2HJG=;EcIBmf@9G3EFf7y?j@+;ad*c+fg*K zIksW$iSakW4ly_73FGe<@7Uz%YpKU55juo-3D0~csz{rg*JRPIvgCI zF~;yc0}pSyTf6H4NT!Q^dMw?a!ENHeX|001(R7G0VLt-xmG?2^4S^r!b$~VZaRhD? z2Ttow$RnRIChR?Uc;#i{VMO3Zc^ImR$@??hCJvm|zd_y&rqX%BTH*G}n+JJe_)#9m z$4vf05Jq{qur!NM_}sC^7>3byX~Q=cjaGYOyJ6uo@m~So976z^E)91~@#b%%=YCNo zV)@GgAF@-gBH=Osg?pwUfCyHG_vFd8bw2pcHh~B;PNJu{tV0<0It)+#*r8?qSihM! zue^IRFs}=K#u#~qHt6;LGRBH|UvXnfPy299Lt;28gU4_zIWat-#!PW5VoWQhNscWi z@&^?^9-)|^aVY%T$C_EQ?BZAKh{z&jmLB8iq z?*l>V>_~^uAP_qU_7LnRsOHWhT&;xw7SSKCTB)F#JB^1^Df}x1HxTj4Tq3wb{MlY} zEemIhG2MHJXmIWm-|AIK2i2KMDWcy3{EJ2P(GXFCL+1`_$C#dQ%UiAd|h#!`4eh-;X z8m4FRg-?-6N97OvDn8`0O`v?0PXwxb0?*=oBfgsB4E_bA!FREghl+;=!Q9_)$^mWe zYn;##kv~=FG9u*XRjKI-Tz`pESal~vXC`zYO4 zwSX8RF6;O4=KQLKL`!gUzp91Mlt3?H*`K1+VA8EQ*P-xHTrjS^6z_*keayF%N8%-} zBe@a$(2?{8x63Y?Yjh+_8Q}9zL`3LF9tP!JgDU769SP6CaqAH38XXBw;)0Ike8va` z`P|%V;Pz`BNffkS>qy{f`HhaGoa}apuY>;%xC7Vt9<-A|1vi57J*3)#Z7 zmEuw923Hn zRfuaPtzZb#PQ3xre6QNi06Gj$4~%fQb}M)@E`b7v(^aY2np6U9ki#28=E6ZP(+G?b z`kHX4w4&S!oGJ9qaBvz%dC$)BDX~1^A1FG{3)`O)1mUWjc)I}u-XW)b9{3=Jm0vM2wykR zWI=I7O;*=L#a6fDYMzX$iE6C?9;;`6J(Xfl?&6mTiM`A&e!a~uewlPI=(I%bRiAji z^rn1fmp-H+yY$6%X)>8P7tfR*QtT^6D1!Cl=i6#kfk5EhfW_Ao9BMB#eqgZM8i5~Z z#3Qge`K(41yxy`b2@+EIq3XL2KFY9qp{~QAVu@ir_Zlz#Z7}<+#k~GgS2b_(g0(eS zb&G4V3bG5b^Rq@3EUasqSF>n&U43KCyaf#_vY`ISDj1`jD_5ujWrE*HH|rwBwLBPCNqH*Emoq6>aWyqNn-k}sYDHl z(q=VoXvCIY)d_5<^{Q?<|E4rldsFRxefpl=-*ue-XbeMHwIK}Wjs9%s-R5kNDdGIg z{9*Zhb8-eugYk7hyBHfGFXq?nuhQI@J3rn|V{t_ebrqh;$(Zwv>A`s%*vA*woRyNV zc6k~NZAC?Kksi}e_~Cl$wPSTlSJo^JD+P$oa;`P4u)NIDM7}kt7)4f8T3D`CGrY^P zhPqV^bxj*4G^|=v?@g;P}>DydmwsWi{4oKYTA zTu!Qhyb{)Ut%$8qFIO?ndn<-U;38`xgOF-@taf@&@=18emDpx49vvr4gnfA!UmExO$m{)FPha*v$PtUqphLl827JsCM#t6=EZ1phrKI z-KvI0>y%H0$5)XbU9Y~1v@!fpo(jDaXUi+yQ`-lVy|A${JFy<+dN;MITe)PFIc{db z!i5brYrUa=pUNVXX>VBez}e}cDbNtR>JH48uPTiSJGKUZlGjg~4<&bQ4SWBDhT) zI4vGT%q4`z7$@i28#lv#hXP+_m^@(|!}q3}iv;W8$8<3nESByyaC_xdAX8!Z8Dqk> z!^10YKLqiY5#{myGUdl!tBC`r)d+dyGscAR*O6D=y&ie&A{%+?XQzn_K9kI$3&WBNwkqi{1$E-cLm6vo@;VS{EE?F)j2FCCd$4L@TH-%sE{w=rA6 z7d8aYREgK&_U7*e&;4cyAM^VTEV5G%Q06ws<2a--Caq5J@MPQi1^9k%n1F_l=qWDi zFn-Hzh9}3=IYi3*v3!^}ue|vPTTFg8AG|FgkU*y%|ZJ;f32)(`>Bb4h1-5_L>Gd>W{Gis3%J%L!_1N1-MPp9#Jz{!wBo)^myfXM#Lqg8XX#B_NN+Am1?YSNkr(e~i#)3r-YN`z|58k~H$O zRIo|#G9q*lR|t*Am7ohjRa7+91k6W2!9jvqf_Z|Y1vv&o{$jxif-?kFy+pXG?|AKz zHN_85i0mj_&F2L^zR6rG!tV#^oV+v7{A+X~qw~k)YyK1O|5B-&g#?`l&q2EK-bo>h z`49A8zoUL;`t=8e6wOUW~+Ws7_ z_uTImJP#kY#Q#AkcteZT{JG`k*(Fc+d>wAz?w?wh0sS}IH$4NiJ_w|^qk5JAQ*oU8 zuFwa*z#pv{N1jcCPqOtvT9SKa+EF*n9d%356(z$eq#(q9C= z4E!bRTR6SRck^qwz5=Re?az^qr(s_LHKvyNWX|&D?|nabFHc<3XFg2|U4E}Mc*c>U zlpTF=pUL+1{!;6MCqv^(uPW_x_>rQXZs2e!HPzYXnkm8+R;$j(jLB1ncIKT z>h3RV9UNXZf5~|FgHTeWb@2Z4OWuA{mjm~^z(0(O)&}2jZWa}#tBvv5flhp1?GT$S z=jRCa4K3o;=ii4o&hOY-ol&WLg8xRIcj-QN39qjI&*TZ>;wxOQe1d9eRLIZKbzdkr z7T~&m{uK7PLA84Z6%9_9JrU<_I{QwdlY@-TaQ1PXKhT-ALW|>)5#)}Wd-y``$IOlE zt|MTN4CLIu8gBQiHhY17ZXJedcOTu`5yQRRehcn^dqiFTsIERR1=P7oLAx`U?4j_$ zc0atp*pGt@4TNZWST8v3vZT{UoN)&N$G|30b7c=F$xl<#Op;k)uwD!@`Fo6$!_Y@y zQ$CB4_MFr@%g$xUFJM!b3Gpcj>{V~)F=sttak3B<^)_z}`ys(nC85+#I%5qPq|1`t zAv7|bE8)@^YhnU-k>m%;Uc-#N2&*%;j?C|a)EQHxUB!$kCr99zF-7E%V8+(7;O2s| zI@p&`=tH<*!x-4Ty!p@wUVo6rAj#B0rt=8Ab*3I>rrsv0O6w73>MtNuR5?GUZ%3u| zIMd2Rfv2c~e1dZ9nL4+cP{sHp{i&^CZWY1p2f^CO9+=i8#YyX(cI-kNbUqwWOJF!2 z)nfn_r<{}GpttPzsw)C!(Ms?b)dAjWwag{tS>}RoK$3?HpseF#{8TKMEly{%*IE+%+vEEpd!Z3+O4Wm^{#4#4`Xoij|9kPVX~dLuMuSd2VmhRC8}sS)>T zcP??ib`Jo=42v9M3HxD>ElqX;P?`k8kXV{GDuxOI8ElK)2xTa=A1ve(_ABRHT$N!# z(wikkoDXYTvo{0wYbUNTb1Y}&W(4kswJkQ{%8+XqEK(c}C{oUHLMbeDPnTN#=$sD= zrp18$+KFq-cnfn0eA`w*-k1~`gO4pVT|vqTh9R-g<|_#m1TuIEjdA#dY^#cJj&jbP z4$zEjnU&!aAv4R5SOSZ4gyNj%!6Rml<*bZz#>$U{=2LN41lq6$)9hDQoegm+_@eOl z(RBH&uc1vm88zFqib)k%U{jV;i7o0Im#k`7QMzX3BE9J3pG&kFa0txeoMKZ*n9|g+ zq8f@ijDFTMG%i?beOPUsVHxGt!7Ep)G|#aYml%EMfFqc z%fkKgvvP9sa`H2C^7>B6>z9@5WMuoi2Lyd$**t&W6WG&QQAKSwpghdJQR>MQ&0`d3M-2Bb<=CM{Il4 zfH8R$BlD4|9F_KkOcuu+Dd?e~H{JT-F4u+ELHUoOe}Q7G2|K5SeO#aSkE}XFCqHi# zR9SJ&&#B(=YW0Xbq+efD*Hm7!woeY6!HJ zENPlrv$AMIemk15cC>by9fd$;v?`CqtJZKSWlTBNuK#l>%y`aqQ)P@f2dWp_dIQt_Ubgc7Pip4AG!$g!$ur?tnFM;I#VsvG*(; zVoVr+gBdr2TEKUcDI`xAe@c1NeXBS2eg+@YO@=k;e#;XFPU{Lp%B4e$NsIacue?`I zx2!PyC@&S($a@TK69-P~K|~7EA;yFq1nrggA>=V#%1eVa@(#gm;=pPB6p^@>iZLdP zW#yHJzMhgrdHj`QQ|7JN58VhWl@GG|(8PNrPl!?*{2&@O3hQppBF0sg~B_?x=t8 zL^V`%BAG63P36r~4A#deIPZvqkq6cU1@Qcp=e4C(!f_FIKQ^Bc(ZWo^4{=u&7U zW!tY0ze{cX_(eL#58omfmK^m_e7Cu_i1m%wRgn3lo^l`&H#}VYM+lA<94|OoaJJw) z!8*Z}f*d7gI$H#<68xGV+dqc0JtE#O_^9AZg0Bm{A^0o7_XIx>{F9)ALZ-YSf;mJ~ zuMvVu&xy7|t)>9qbm5yrgg+OmFh19~kXGmFfL<%~#S*U8oFQCoZ;f!Z<_z?=h3}x? zlfwT35!Ln;!9x=Ma|!2YHPbyR{(lsjFFo_Y-{uVGIt$VnLiZ86ztE$F9xup+7Ubu) z;*7t5hz6`iuuj5PN%%&=E5!e5p}!*Z9-(g&n#v8zeO%~ggjQ?Q;QyZZQ{BOQ(C~S% zMIfqr3FNy*n(aI>Q*fZ*P{A>RXA71HP88&j7~@|kSR<(FC;U~t1a1=lD+G54UN87n z!CM5sA$YgoJ%W!2J|XzL;LC!)5LERR>Ao+ts<)s&75XoNYEM7-C-eCOsVO0zCOAM) z)o=Lc3eANmg?oR`UdaKNk88K~?YJujUN^)t-VtRsVsi-UE|Ze}J6?y9#Csh6Sn4 zAs>}B#Ipp?6)Y8;EJ%e9`7RKohK{sa34xq64;TLiBX{1-v0iuiu*7raYQ zEi!;VwM7hnLQu_v0R6JiR39M)`$V z-w{s3dTZJP_Mut6s$Br8b^(0+0+atX)*J9E-7ms-OL{6Cod(l>OeH_)GLg4c=NiIPqbz;Z*)O{<~;HI1eO_0Y<@yV+|86s`-~eOub%+jxU(zs=Foku?&kYi zeLIu4=e7D?*<5m2iLYd93FZdWztL*V?^=sl0g)HsdI3I|7f_Zl|IJnxVeb4{2y+qU zBFsgYTUI$glxLsylh>gYcj_m6aZ1()b3)b!bCawO%6--c^HRSkMN0jZNLB5f+Ogqp z9ldYcQ_0V+P(35FFydOUu5i45_CenLjyzDi%^XEW-2$|CT*TD z4q)K`To!P>j$Xv)$Lx8GePm55umT-|(~^A2T&$bjxM2nM9|txyXsk6Z4wPW7HBZmx zv~2HKhdwqqenjvWPs@&NQU2dOLb%=e)82d4kN(*C(;s`vgHALj$_&PpZI6C+_3uF) zqOXQ87o>4Bg!1mALyQSyKU$hM74l~^gp|)N5T6b$=?JWe1E+O6h@aCT#)ORn?Um=E z?F++?^4P{2d2IJg95}5_C8^kq zWmgYS<{`)%Xb7N53thrk88evQyG!U0WB7;&ikSyc%Rd6eF$GhG>2Na-=9$51-G;*8 zZxdsTJVUpK(A6Y(I|(UMep?P~DvKCQUmIKf4sSN(G4cZHELDEfwDFcG<(tyhp^lPn zcp2W7KP7f1E4ex&y%OL>5`{E>J+}Qxh>`HzV>~hZooiw1?PHmb@xu7LRf9A*gNJpF z-(%hrcS~hi&|iIrO}Nw*`cwQO41IH46@H3^?5aWL+6db7gzb5_3d0MYWqt?GLU^nsMYptNO?<)3RDZSI;=I*|9#_w>f>pYd!3v z>HaAtzN6{Eq@(F>MvFVFvc(zJrNynPXmP44TYNjZwYX!?YjMVQY4J5zwAjtFTHMJQ zEjIjp$>+7$$z5BV$+KE~%euDM%bKEF4i-fF9c+yH_l$_%z9%;t>{TDVv)9__T?a-* zLkGsUxCi|$&cX35z61Ui`#_+@*Q>O}hIRJ@TAV#i(WfRCL>EpT87;0_6a95ncceWV zY4?xT3|k!S->ZN0-Ci|OXV`5~r`Kag?KD4f|8Dg1UV)?OfgtYT_GtfMF7CrQn(q82 zdh0N^CD^N^CDhAl2@NZ52@adx;)l#Y)!OK9myL=}Ty|zO(!4HuxOq@?;Mkhzdt(Pi zmrh<9^-q2;>K}VYblccFqXQ?uAH99D+Y%UC(&8WMv;-y>xA-S-`gqxQx8CpTA1duz z`uU&!^7*45hOV9nH~J@GUw`yNCcyV`&I8P9Nxs_MUR=AY#agxtrFY%Ei$nJAiL)Z5z`5{7n(qfHG-IZ3lHae)PQ)$Z1P-)K+#F+e(7JJwa5i9BXHPKrq4=Zho z4wyW$G$Xq62xL`_Zw-C0Ho9aPI3`=W&WsLT*0J6+*>RTEo77hj7szjM?Lx|pA6m%iGXez+@gQixmxcG)*=#`8yQN_(|6 zbl5)H1DJ7mUG$k|-`H;8vi42|UwP;mq!+y2`Y7`QM?+K7_$k?95VOAAXgQ0q{;#$q0774|A$R*6(l)2a^Po>2yqM?|ko9vL09 zqdq#YxiR|u*tOBY%_E~rs!+q4Uq@OyVb?3angi>iS2mB022cy_=C8I`!@kyH_4*-rWOHO}6%I_g`tA^MHvwb46w;_+b^sXIeMxXDsK6=%T=IFZzo`-)G?1t#S_Zk)*@={fcZ%=--c+Y|8-7h_S6bs~! zhWulq{UE>ZOSRD>2Zu&KJXjYUdf@Kpkb}ubL&@Jf8uA^94n2ssF$v}DW=7Lr`Vemq zO8Mpb=+nuCE%w1JE$+dmTATxGqwg=vjn*X3Z3#BdZ3*od9W6mQypudC`h0V4v^05i zbn%X*(ZkDXql5RnAFW-MhNp7t(U3DZ`ox~Y(II=5qFn9*;`zLEIQrY>61;^j-ojGc z-gHEk#if)~p7hTZ2Bsys9y697Qd)}S=ZuEA% zLC;Sf9KF5j4!kw@Mi(!;GkV9ekD}w7QHx%BKRT#6f_uQh%9Af|ahE;a;xupiIQ_f9 zn|wFEji>*zWq(kJ9=YAgx68SyXNj}R#ns&vxar1{o+W!r{5J=7IUhXb_;)*d0$;zr z#Txrl)P^@&tmeIVPrizr;)#rX15fcSq~N>d(bgf6)EgV|KB0!-4(_aKj4oML5cPw8 zzIjWFRdpk3(O$$E1wXtmV@F1vD!wyY;P38fjBXu^x=@9;vzLvwY%$uPZNmnlUAi^e zcUa$2xBsotZ&dM}S`&T0YCCGvc5w4e8HGFl3fx~o9+#jU85pgp`c3rmu_H_GKnl;o zmv126yDGe~&Hk^ii^ZxTmVY$nW6jlIA<2x1$7aZ@vcic@4tY&ZOKDx^Y=8 zQzw<=aa-c5ZlS?UjfA^^?t;rXK3{CU8}+ zL-T;vsuKEE`(F>24lQk{wUzXTj#?c%y>91pI|ON$g|qSxO@1?y)pBTa*3s8 z%b{@TeOKLI%N*G`zkNLz-C5NdUApW~QLFiR+?SR0%R{Kiw$GRgm*CrLe+Sg9>KmDO!6f4_!ZAI1Avm0Q zbe~oP9?V6qgb$`ivrpm7$HjNX`MmmqH#5NXpABY*ngw5B6R&Pi4M~LjYQ!}ZTnV=L zoak#oIa|QzbUl+-s@R;qWpr+%GpkO^7(%c^AHxq*pPSLM155~G#%p+l7a~j_S1*qS`C{z)v}+x z2aZFq9nOa|`?nNNTxdzsy_y1Vq|Oi_AU!os{{(c`rgbQ`Gx3LYzv$|NM!{*iRMU7on!cJepZRE;H*-jl z;2xvMbJ64OS`X&2ioAm)ANyH0Yrz2Y!@KgiYchmkx2}Bfn%t{MKKZk37V|`O-H{VK zdQCTh?iPU z!-_;!HJOW_bzM<^&QZ^-9#nT8N+GnbJ4YLZaJzH+SRn#w<){;^Mj3eOtV#tP?Q(b5 zpDzu>>YKaku1x_eZN4y$j5A7wba&lIhULO=UONnX!H~}C7pt;JXQuy>{hMy^p-Q`# zv|frlbg_FgYx(@WqgR(6z@6ADnY{{BPaj<`!AsTF0^eb9oetew50s>3kMvPD)z zU7f&voKmpn!Ly8^?W%^vB@k&>ZLzU7Bd-f%cHFVW#!us2Mf`QF1HMv}num~1W*@1} zW*@08vGlPKlsY%WEWtp%Hak&qkwsToRe^ky>?Y|8X|{R-$z7Xz$a)P4?dge&JoPe} z#dC`#kIkjVsihy8ev6AoltH~me?qS(&|{33gozD!s%m)#9h+gn6ehB9X9Taw0D+yI z2xP&zOolV@WD>@~I0G1F5?I3=Yfb$=I`(LyX&)V5*TnjLbg-6zZR0*Vj=F4BAsQMuAlo%u21wN*Q4VY>KrWyCx@p{&}ywf%|j>J+!e*@y#TV4>v;KeI`!$ z$2%vtHxEtEU)nz&tQj`hfs=dm!hgO;LwGUW3C+&83r_$X3o2=-a6X6#k%_or-^V>NM z{x1F4JftW1@0_~ZrSD@Z#%`A~$WMRz^+WL_Tf0NXk2Je%0c&?EdBCEKM|ufjkB6NJ zTNalt>3Twpd{2%fj!DH6!aPA5(;f@kCImU5?>VsgzQHYbK|j_p?_GFv{SpXBD@BY6 zuo2k8-7bA!gH6L07+!z+#iR)@yp&-XJOvABlM!nQ>~z=}yIuM|2dkuc{OLE$1`_hkh~zK3?8@9Wqsi zkYXPSsgx2$l7xCB&Cs&FlH$B=QU!0@RD~BgWQa#Da>&?5?kG6kgGD1js6v(;>ry)w zPCjp=$VP?hf{5K<(I~#69BaV^V!KU8vnF0qj!Qu>3XvU)w#_BS`_ak}$l_SLZrfyd zA@R0N2#A@{aG|{gCOUffC~wXBeRRB~iTZt9sLlj}7T5y) zL;Fl>LF*Fj0XfR_!1Z2OthFLgeg|eR5NkQZE zhIv4@|!l_D_S#_-X zjr-`}Q^a#Zue2a@pO=fX3s8;(EpV+C$iwyE?`7==83DBA{0`AQ4mPA|JbY42rE|iA z%^$GV^Ht#;q=5(ZfS?OxCPAv(_E<5Vkae@FnGsb88|wGbp>JTr{Dd3)!t}0DLT*q( zF0I{1hZb^aSxm?PWO@)RswQEMa?T=n>Jqby_ldw;L0^SX26^x$XtAr;tEV+c74A&) z0y)~9Klmff3JM!5%^>rYooi*JR;kg$Aoz^Xle-j(WUZ7hx(mmm5o9UCc~0T_k}BCzAbp4utxqNn{ba(>exFPlnz_$}GK4Kph#x@3Pl|hb^bnt& zb9cL+lnni(bZF)$W&BWld19&HW4k-VkWAPlY zI%wc$`nz5FeGDsI8}VoNfxdXSy8Gbqr(XzGb#0_uK$`cF!A=|eSn7O2CF4w*o zH@ZKQba%ttHGHP9)cWi*_pUol-p&eReKWv*aVEy>%f!|1o_05`+WFOf|i+&us>lM5G` zI>JQdJdZF(`x5TgzJv#~FX0jGOQ2Lpz%^#_;X=bp&_XK-Roa(8Y4}JI9@M@BEwnN& zbS6AwrZZf)X#zR;E3xWkijMJ4%9%+@vBX zxAy21_wY*gaHu8eTId-u@t$x`e&XSdS`05)@o>bmGM%!Vw8;uKs9ZRcH56#ilqC#X zsudv|T-*L`Y9Qvj_2|9hW%w#2OC|MQ1Dj3bJ3sJebkY6%=&!%kW zXI6Gy*4!+g_n_DB`Rpl9Mi|>+=Q@@J1I_G6Onc;ja!_RV>!g+Yu&W7yad3jkVHxf(dI9x z*y$P`Il!q8Gw#B$(>Ls_9S4>iXC6dn4;?u4!rmjMIIAZ+oggEebNWau?^o3zbUtr} z>-n8hUZ(Lfo)<3kcO12=fa5gk^68*KKWx1lffU3#RdP}}a4RaZE@5tRpyhI{z9SD^ zr7mujlzwb!?WEw;XwTjXw2-wrJ+*;=<1E$;nF>^Tcq>$5y)>-XAh*#|Q&TncRuxIt zkA6z5zIA;|HA;-GO*phyQFR)6XzLtWiusyaFb?x9^yU$v*sfZ9*Nade(ckkeU5J4ZvYh9@nRn{t(K zLi)P!6P~{m%CYa%ZoC_RutHy7F@Cz!bF$Md>`WP#>vT|+J1yI3%0}hNan>zion6Zc zo$oZ_HObC$`ei#a!>Fp$onENr+0IJ%bq4PW*sj@G`P0wNa+YK}y|Z~eE!$ay7o-pU zbFy;sa@W>QnVs-5KIq!rGP9@j$J^+1{OPiDon@0ZpiMcuDt8<2Ffd15r}C=qLX}q= z*BQ>LaZ{X?VKOOBRb9EGh7)&99EqJaZM%M2-Qqlp*L*^LSMrITDL5OWfz$hauUJG;#wJ(Ccci!7S z?w%d>c?;@CV3MnMLx$Mi6KbCb@AeGw;*0TcH;35%4hg>P?2Pf>SYP1j!sxu_>Fq0G zduymXB_!OmZrUom4zZffRiVnSAns>se}Sj=V|Sn$_5QFTNXT+1RvT<)RuTwLY&=m954+?9Q=vs`dALoB$RyWvcD~I*;3x)7fri*s|2{o-ZA)7|`Pq8XXG!bPk;HV(Z(AmAei5@iVCGTGY#zyRMNA`r zB@b-~mIE5z`*;Y%RwG3C02T+}yz+KJUKoCq$1*VT8sPTI8;8J;;b)8yy%HW?dG~tc zF<(aBRd7?DF}e7y{-h~%c$%cz?6|^_q9%C&l0zRe-(Xn*(pprxeEDy)`#h|Z|$8i;}yg8FC3#>{W zvJjK^BHShpoYvm3=A)a&ggpzlSKfNaV;y4tI>DN9`32l24xH8_VYE9aYhz5<&*0&e zcNgUKfFI>?E{c)&KHQAMv}isbj5Syo4m5^gv~1tJeD|Kw{@x#-3m-t40jS_*j3|cb z(tHN%&EFHA`|XY}lfP8NMRw{Lho&j(nyRcLjeh z$i{`~r3q#Vo*_6^aH8OOf@-e>#A^_mYfUMKx>4TOZGx{5k?$W9(eA$?sPuB+{}0kY zwYLEfYaSG>_H0Kys(KjSmk4^e(0M|S6S`37sY1^bdY;gn_RaXqgSa+uSrRr;Q3Hgq7$Ah82x!=XfGm*&Me2fph&!mYRjjzzS{JlvtySxS ziWXZ?YqfPjr7kEGTqD@_|2*$JbMHyOrPkW^_vd_a@}2jcnfJ_@v)r@1?;H~C|A~0J zcsGgi4@!Pi@>V`g`QrKF#p0FX)#8ofPsNqu zD$&k6u=g9ucD{l9g5*DouZwSsn?weiusvBKoo6WX9V=OXY#EE(fxesa>Ga5Q^u;0> zo8g1RpL*?pNn?hLODjbu)K{K1KJod;49MG7%`ClDtU+a z53w=NBgk(i9wgd%40^=ZS$==f#(sg`#(n{3NPmjRI2zisFLIPV*YVrr8reQMVuop6webGQ^fk$ zi+72?5E*5}{Aa~Ki*{avo`FZq|6GI|D)77q|Ri3Q@};!)xN@ffjO z93_quCy6y8!u>2un z7x7T>2(d^UC^D9e^-d5ciBrT=#5p2k%~*bkxJ>+^$k;RH-znZJ{z`mId{X>___FvH z@jdY~afis*HQL`_JWxDXED(E$jBR82!6LuYL3yM&Rvafz6=#U2it|Lq#;;+Tuhzzcyy%)qki?54si<`u4;wR!4B5%BDCrfN7HWgcl`-^SGgT>Aw zqx)#5pEy_?Djp|}5hsX~#aUvtc!oG%yjWZ&GJKHByG^`XyjOfsd_;Uo{H^$c_>%a# z_?Eay+#-G^?hvEdZu$6TmbIg?*i2+RBiq+r>?QUVj}=FYQ^e`w1>z;*wc-upgW@CN zM)6&d0hC;Rj@VLUY!&q##eA_?94wwFP7r5`v&9ACVv!M=w0oVnQd}jj5!Z@uif@bC z#lMTWxFDvzrea4iUt|O*^Gn2Xag;btoFpv4yy|$S7LocNhDL#bUWQN@ScZ z%h!l!iwngI#7o2xs5T6l$C;mZvS==CQ6yF#BDt;<%7Xv(`=JGPc z95GL1EG_ffiU*6G#UA2eVxd?h9wQDDj}=FYqt1I12afq0mBq*x>l z6o-o=#j)ZzkrB#lM~%n`Wy(v$OU28@YsBlspNV&f_lXaPkBd)P;&RWv z=w2Kq(CvZDq#LvAQFF4&8tscrXrwm@N`%rrh1v|gv^`y_oLuLOw z;tH0BY|k4}t|RL~wy|7MKJ`czpYHfZV`Uwh-=pg{94jm5Kr9@GP(JVG!!|n_Ztc5cpAVbm>=W;|DX(8}SV?XCh_}{vC{7l4Esok)DjmRHkT^z4{QV~~ zZfw=<^XM6?K97!Dg`2fipJyh|M(9ytq%6|5HhM;)d%N1q>FsLcIqhnr9dGZ;@lM`e zAK14gX^B>Pp>?!wT8;I>@ut50di2G5wE3@CkKo{{dm9zUi}x!Imb6=UH^y~owl48f zvO~eT{x27HXtZvAhmPwm`Bl|J$eES7uIWG=5E_^X7H!i?2Wb zhA9udTUE%>aA;}2b+XZJYW-i|X~=6Q+qdGuiAV%V{HuZ@-<0Wp7<7h0j0aO}-y`rJ^MG}@DMG-W#6grGd z(}GewzL`kGp8+zqp?Sx^&JRT(t*HAIbg#duG+_{X74pNsoHI+ zYMVmUT-sIpK-C6tMOUgC$6IzwTN$e6(yrP)u3Dp@A670{jHbFkJ2H3;KNGop-xr+M z6930Sm&?r)Ea4j8PLa_`!TH?mZ$oU1F<38TULPnL&&0qe7g4&FQWXYKxtQDa9g{GI zibsW6}X8VFVSEiYS#wf=l`Cc_IZ2IAX#A3K;aogzF*XO=ClrvfwI;cOv0L zjzyjKiTZ!gIoBh&?@CJ!AfnAXyFT3MZQKsMef9` z#J7#Xtv9gz2T(D$=>{YQv7#@~ycQa+y_U#IhqK~se28dEf%3=5UxU%VSE&%6 zCCUmj(Ee~0b-6m91>@hOV7^PBh@YjWrR z!ghX>xby$bc7Cj|+xh=)J3qv|{m##eydXE|j2dq5N2c5Rk!Z$TxA#MWXG@*Eze&I+ ze{T23264MT67_a}Xi&4x?%yo9fi-RaXHDDxS+nl`k1|@O-@W0$_ljTUSk~kr$LC1( z4ghFSlc!|Af5YXk1y^kubl0;c-YxS`8}TagHN(-%-d2K8Ci+a@;^_d!7m{e|;7?B}?wP7&`u-{Wz`L zj|=nb=uJlU53XRt_74JPCE4608kBr#7$BsSR>Lq3%SBQr-eJl>YrG$T@A<1;mD2rZ8I?vnRlNiN8jY|#)s z#P_j#`q7x!;+CPIqxPyZbkyFVMP;z)J|T;yz`#x60ju^6RcHDA{BrOZKfLyC)Tg8y z^{I8;9BxQV{4HZ}Er~;jX&dq6R+ny1@=Aw#@?q)8$D}8pbZPugPx~Q>uv((VlH~-g zxY41Q`h{hb5;TKoP;YJL5u|t-f|y*w8yRkqs&~2!g6*g~dJ`1-p0|Cj*|p@@a7)U} zh-*n%x+TZ5B~M^R$S&bcr$6+}X9aF0M-ru0b~sUv86l{_3jU6BSqz6|quol5Oq(9= zO=t2u=k-RYnvEJ5H-%tjU*w-N#KkYh9F0_;MY48iAQEOTvFw^C>9UVS$|h!CfH@ke ziIXmy>u3|RFT#xMOwwhSSswni!F(|0D89>0y6n+N*+f-W%u#%&owTbr>qpDx51Ok% zFAbY$uoyG8iBq_rAX?JU)uP#hmW^KotQTE_4{=V`shg?&4l2sqIhImu&w~1V4?{ zt4LM7iqPyn|JfJ>?5lt25ZHbG+kO7y@xS~0$CC=C)Vq){>>f ztxij@J)x65q)3jbh7)eVBZ=coTS{=r?z)gEXJI5#smZNSnO`B6EnCqZ*@c*K4MBJ# zWhx6X(pRoLN)dWy1LCN`5=5x=Z=skrm@- zPeRb|tcvMVCscGT$S>$xP*Koj@@bY=d|a2Z@sq~St{BmEKuJaEoaxn-lPZd4RaH%| zoXrYdN~TVjJ$^P8(WM{1UEgKU%!$+IOsb6R9ysR92ae$zRvS2G;*9F4)fFdAoY;8^ z_qvKnm6ONMnO;*-b9z-}HFS7PQe86%k>E&Uf8;CL8RKiFK+52b#7D!pjXOUGV$C|o zW+X9kNRlIvG)r?}&2ia(LJI2YlIhHf33r5Kp)j5`X`!NT^axr+t3CWv} zkL4s|(|f~*CJ4e~2&6|<_>$2CQg8TE!SvV>)9?K)LaRH+t)Ln^9X`@kQ*U60?|aCJ zii#0KM)oOkt>B0VXc`(-Q89eP$iDb8*iHjxSerG104fjcQ&favTywX2p&>LdY5)f& zu(fr4r@<-wso&Ns52^p4OFo6UcrD#SI~&W-uB^t% zJ#8a>z=e0k)L=9JfdMUe9rX`P_^~)67mkgk{C&~HtCg=CPojOaG`ldjUEhX-@NZWG zLBPhp!zQoV{KTuNzPWjYi{gdn#tIj6WQi%+g}*EG!({ZuyO00iI1{N8>@J3p*!2#v zi-O#nOg*V`!km+^k4~P2FQi&}{DcWOVTE&dk2hhvhP@d=Djze`nWlB)T&z)=@Yns^ zr|^0zHGKg^64E}HS%z~0GjAQj_P&6;D|>V;3fpT1pP3|dw8yr1d-ISE+glAGe23uM z$5(J+d%a<=J#@6kc6octkfuF9&BsL}ect`#^Dc%WY;O|mG1i6lSlrwD3DUj}l95Ys z(qOEwpM3HzD14fE$K~Q;7G?e9^L`FRc)56O6fI2yaUVGD#56RSTq!;Va$JfNDet9x(DFgc2XS~=JwB%6I28*>?C>|J9-kBL zhl4K@{5IoP6tEsnR7Z*Z#8QzD8JRypJV~q(PZznpSngu+3X$!k{-@$S;zQyZ@p*BB z_>QGcnq^e{E);C))&gp#7WA=7a-C8JtXffxt(MiPXhHU{u&%2{TOkoc$&CKTqa&C zS{yc(W1h6Ia}V{9{rC}&O7`POysUcfil2!*(OUcgi62ah$A&!{w;pUQ{lO&U9xCtS zvN=W-^}|IQUjqF!TID86KU4B-@f_(d5HFSfa`77Je=7Os;seq@F0PS&t@sD&H%Q(n zekA=DVt_Vsy)#5Oe$tQYY4O@fTf8=C@!HT2Wj^L=@yDW#TY>Zj z%Gf^dknlRQaVo&SQbzsHl^?@_PdP!Nd{fC5FAcf1ONSs?ApH#KecbXn(qAB6s{G5vYo!0F_%`mr>8hFZ;OU<;q_rzC~htS-dbVjUmz|PFA*;j>G#iaH;b#p`$fh*F#oqAo$o2XDQ*)#5$(DH z`MmjIx%%U}G?l)ExUbk+Y%g{c8B0MseZ@hdU4KAdE_sw#Ax;z-(82mM#rdLLpFn@1 zMGX7mF8*%f#!&n?=THu>AcZqckZ0R%BcT z<<~@pXHecI@|7QdS8QAvFh_Epi0`giK3s8)?ZozCzSv#tEf$Ic#S(F>I8HoCJXvIP z2-|b2IA2^OUMOBFUMXHJGD3s(zigbDCzSuRxK4aQwDG-Af0N{G;wR!4B5$0yoNO^y z+(X<;Op5KqL&Pp3qef__zgQxciu`6V^T&vj#3^ExXxCpTXXA>2_{g)>TP$86`tfIO zknG2wxkIvDkD%5E=c#{0?G)*h6GI z4D$zycHM?_x#WrBN#ZQAT3jG57B3Mm6B$TD`!|cL#QQ~t(lGzGA|p8{zbS4L?RpLA zFC_C}Da-lmwT6Dx@LYyd06K9I^#YN&jI}Xk5 zs<%>HBd!%+5jTkMiXVtO#D9pnyskq(`0-`hNVe-o=zB^&TpT105gF*i`s2j<Q>=qkbsgFV-I?hCx2ee@$ep59MtlA8PaZHZJCfd16bkm1yI_puCL> z1KPMSpp6Ry_EWh5;!v?nJYGCOoFv-#F{nRV@~PsP;yL0H@gnhZ@kgSKGXpy|&J6f7 z>F*F%iT8_)5aRm(R(wu;QG8W=L$vW}Q2qnSpNiW>h8WRaBeA(?@eI+%yMdhxBr^tz?fr>(lX$Cmk9eQ>koc(h zTk-eei{hWejpDoFU&W8azli~EjM$EZm?O3j_ZAtZ#d4j*?qVU$WD@kh_rCgwk~BRGHIj>t)aiVKTheJ^_c{qJWcroNxmAa7fwu+O$g(7foF z$nRkD7%Vluytp{gt;IGB1$%ks@pEj~SO{Ds?!SbwBpIV;v>HqTB9?N(gZ^u_W=l}*qcmTk`oa;{* z+ha1$5q$m@iTbfUdh%&OG~+ImkNuhHL&}*Q&Em%qV@;VpdNTjVGlsLW4XV*+u4%Fs zu*`baI{pG`5*Z6&2V;921*FIJ*qg>j@}C>q;}#}c4?>ODY$iL7VR9hNcbdT@=18p9 z+4zsKJ?5bZ#`d_HNW|af(&F*9L?S*KMKkh|jxP^*Udxz{Qt|6-go{j#?ZM|iS$88d zkr%%>F$+?IpR&fK2`VwbM}uXowA8XNz()fP9}-`dV9+cE_-MfAF!9S&m;-z;h8Dhs zSQ_Kh@ipBJKxUjV##!_5FFQC01~nE%Arzc~&!KBL8|`&tQShx-L$)JW@)VM{Q~WV= z&u0ty&L@XsQ816|mxCc4OgM>x4NSqT%PCDA9|x|jMxYQ&*( z-N+O_q{wzV@m7}Q02h~Vy?$*HBBf1w6;kd?Fn=(1G!DAkm_r^kwjmE1+mHv15ehvI zh2B*mKFQftp~SM1%&zU`!52LDU@V6Ao=q1W9<9N{Pxe>99B&|YW>F><6FYMtP}<;3 znsCD&WCtATH{g3LT>aqxKPaAn#{sUNA7|k73FuST&#T!*Kc{H@`~>@XGeq|DQ_Q0? z0{hv7$q<^bpVu(U`q)yJu@L+CY4#M~omd~6#9w3A$0n9hv_3Ym5~B6-Gpsq+B=oUK zyywsT01M(M6l|1Vd&Jb&?c*<0s3n%Xt3shZJ_?JWy@GU6*T?LufH~g4SM_l#EHD&T z{~)T__G!wvdOqX)7@DT3xcY^-Olnxm1z24D6BJM2cCom6zN5%tTs=FLF9>prk>KWj zQH?C%&V-=D&%lnbSM%1KRlAlhtoWg_^?MMa~DJ8ApFhKy5_e)=hx7ijO-Bv zYzgA(nbm^3M+-J2ok9`5Mr2$)7oE;Xr%;3*AdIWOghlKh&oM1{!oYce7QgEVdlyBY z2nX6Xs2gaH2>YXREXKa!K{<7T<{Q=xnrEne;_!w?C`!Ij-JtngABfJV^v0op_qMDr&;8z|1+3HY+HwU;{(~LDi<9RcbZ4h!&U; zl0>i+S~HO3{th*v)f^aVomFnulN29dMknOzU0iuOc1n@5i6!WUmJvCHC75(2hFiA& zg?Il1bll5H{{CYxf5{TvAuxmF8!O9TqEs0qPw*%dHg3UJX!OA}jBM=Ogfq9SoTTFj zN)R-H65iI%yFbmKmkF6DA^B|rs0r7eWhLH5{oUVLC<|FAN;jg+H-fu=$UWR0-M7^W+G}q1Z0BXt*-P!b zY$)I9hDM5@>P=Inc1_yJGds5PGU@EpDZzKF+Ig9DCBAg$wL6H&?l9E$=xP@t%2c6s zd>Jtcv&&%0ZKN_{ZYqN*cb+LDmZUP6x(@U1Fw`h|!Cf?1!hSlKD#sqm=|P9o|3c|^ zm7j?7q;UmG{HtN5yW={)BCZop7%i@Ir$A0@%TypIF2MOrQh}VWcaAApVP;o+Ntk-{GdHvaf2#@=PDAavv6N=A;=8UYZ)`I)XicHKL5`)a|z);ks!J37{E za{aK_Zxb_$h_;^HEr^owZ~O{(I?65lu>Ak<$GN$hVMlI!aj;G#sf)C%o;vf`@zW!U z6`UE4wf)v{m3D^sM!}*AHBD`ibkJ_Mg1SMVw)sMvv~CP+D#$SvSV)sQMZ;n(BdI7- zhK{Bdoc5e&nJ7y&WFYKZq55CZnp(DtM3RsYeq&`= zj?3e%Vc1>`1b^9$tdzYWNQdq93fW^@yuEoyhwX8Y+VJH)%W*mtbJ*S}*lQ0R+sAf! zd&`ifJwMSW^M`nv>nERgF%)5Y^I?zvp0t;Z+1slh^SKu)6?h{k=aYAZ(nv-I!wCJ{ z{p8F29E$LAU&4kQ2L+c47xmO~A4b~OK{9fB({wx}WuNx|(qVhO3L=ptbhL-igOt7X zNc%cSMt%l+NhUP;yk{YY?Tvyx?nAWK1hem#w~+RAkc>PHdpXS1ZUdHa?$~FAky32a?3s{UPe{xy6-mQZB z7A|8wH)5Sgz7HY!l7KOvJjNLFSu65^F=amL-S0mT^VuKmV2sXS@i=j;I8~e}{y>~B z@^^yuuMlq#e=6Q1e%CRd-OyiLZeMY@I8L;f6y(!SfaR_x@jF*176m^jw=4fX67sJl z+qZuqKO^}C<-Z|r5x)>E)&%A0dq6t}iuSEvEZ<^Fpg){?$QEM)xlHB8iIpVUd4YJZ z_&ae2iTY8TM59@_ZV|Id*lSKAe?Q4>C3lkCRdR317TbY($4a)C4ajFmzCg5C4cNU( zvc;A{zE$#l;%f0}67Aa}?u8!|%3Z|@67}hAKwrFRqQ!n<`SU4*mxvbYiSqVMUg&S2 z9`fzV|CRVK344DOEmi`u#c+c5&0Wx9HBo;U`kHnuW&z~H{zr8q?|~@u97XcCnZ(bQ z@c^-dSRnQgj}rTecATL;Uy#twiQ)utsyIWe5$B5Y#YN(U;@M0%Rg~xN2+I!;j}b?RK1PjRK`eK& zI9EJFwBsN7{ICVf)j9ql-zGgBnwWpD=ws3zm2Bq&4lYEDGpJ=i8$bVGw6Qaf7L;tem4Wh;3 zL;qLFABo)8xcp49k=R7ESbXHSmYgs8*tVl3_Y>)=MtjGK^i`ugRiw8X>6mX zYhV%&6Ih?_M5K)c0Ctspn0TaEBn}jZi6g|(;)!CVI90S*HrTgVHjrL%T<&?IjVS>6 zGRaqoKM`*dZx!zm?-S`(M|)3;>%aZ(|pL_RV#0tMWewKnIGVVl-u58L$H28e>ly=HUd@K-hmhiAQ?9qYC4;l(w@d1wRM^Ze$>wCBN7 z(S}2}oHTgimW`v^ZD~7t?(^&$C{y z+;YR{1Gn5T?1T*2PxlKeX`tU`gL8k*SfT?JXjRIUlZXz2wdFZ=BM;IEL++@4g|+>jFEx z;(BeH2nFG{Qe!ye5em}RG>H$0Xa?`4V>!HFJ!Fh&vOeV5C7y8v zGuktwkKK>OvoUauRegj}MiYo8V)Q_^<@q5N(_1 z!r9`b)?p2TJhU~aMhQ0*2pRkm^|Qw^qh%jIy|Y;FC6iFkB#tTp4}Sdi@XLc}8hqUFpMzKhd`gmMz1J$(fQ%O)H?i*9 zH*o!zXZ^RIZGRZ)OJ>>O(u%5SDn~{BD>XzGbqkQzaC(V_5ZX)VB@i@MqY7p=i zFz9a`Tmr?fpba>L*dB=AD7FORY~8*(U;_#q2eAcSgGA<`4#y(f(*cwB=X%YC)VH7(9ZqeMQ5Fug_O%+L@+-7MJ`-v8z zJUp}uM{cz6aTPp>_6&t;v;F=eya6)}kggV=W~QbDQsz2+zzQb0xFB-u65t}2B=&|`^ixT?xg*leJr)IQV#%a6 zAf=+d-V)d*EP-fag+~$Wa%frJPizVs9$pE*RO)@XA|$xzXk_WYH6Y6%J%~X!gE1!} zpOkd?WJrfrD=4vtkUPZJ9+<8@U~Rhgz(SNObG3(d_+%JrQ&R0=zII`{_MltRwTr{~ zr4X>hW5`jKu8DJNs+|Lnw8^&w?H$9WSD=0mJnOle4h&i20Nj)}%Teirpf$CDywmAj`ZQ|NY!3-O=1>3Bk zv>G#(FpMpGw@xl4Enyh9{!q6B)up5*l%Qa0iX+8X780jVruh^nvIymQZX$W*Kt0r{ zi9caDQi%gCSx$7cWEpX=Ra#a`cEpUrgtJxm+>~^+2-PZ2*D4FuDo2Ubv=}LbEfE)C zcIPIhc(mh$#KV$ikW5>vb8ccYc_iKm-j5mQCc;&+CUi%AmLM0HE$*i_U4j3%U}iSy zYNgIiY{*i~I#uw@!!uC2QK^=&R6Da>=k$?)I&@;=;$Vy5Mn=dK!QQNQ+VLwDZl7QO z@M&itEOF7;nFg)}SqAArgZ6#@&1Jt1L_Msg*Mfp}jqf->y$~DgM2lglZaU!6m6mu@Mw$^P-Pu(cYd7=JrIn;8OVY|>2 zo49e7vtKa%TjvkxSjHx-a6IQ zpjK^4{eXn}L?_L<%jZe6exJ1Zl0I>I_6ge%?h}_ot(HI3^$7YJiBi`m^-jd-xxqXk zbBl&g%52{Yt_HT5|9N-?8um5G?e4ZHb3?u7ehRJi>E1)fxqZ&`Y$Nwb^j>;zv>a;H z`qU37_r58vEjpD`T8$ZP8A85WCzq1;${~fYHxM&gs=Ac8-*7$1`bS!u)K49IZMw6p z6Fj9gm{E5ad+38YxsMak<*2zk@abEA;jd`?sg+#@ zRL-pY^1vr^V(wZoxm(xH|4RJRXOSS5*E?2~jO8h`=0!Y0bHPMIn2Na%&{=p+%zd8D zLUD#NvnT%zvSPFC>up_`wrC~`4T_!QjP8@9-lBW>?Yh>WllY`X_pp z%L%xgf3asfxGp`;!ArekoqES6xJD+eXRQ}4N-dqTy~NgfS1GsCo$8Df6(4@8 zt{FdbVkM8f?>+vd=CrAk_~El5vnEZQJhgK6SAl?7gOPSyb}8QdcU!H`Jv_U%BfFoPT`_h;ko=UUccOyLl9_{)2Cr+Zcg9d z6+Th8x-gezdg9;s%JCEMVu4p=8U64<$;!E%hIEf)Hp&{(Aex=oG~PVeBiJ+6GT1BF zJJ=_-U$jjS>0EvKjGFNiz?#{PQ+x{5@j1##<7>u8I!~ysj&!D?^DfVL+^xSNJA6Xi zMVwSHfzG#s_Z92|mSg*`!0guv zN%LdA*Bc4tEk!zP??Kq(i(%TM9dGYCq{H?KkhwUd@X34XmHQ=(-_;OGO}-qTeT0{r zb1)vCq8yjY;(oc0BJJxS8JWCCI`)UM&!b;`*xmmV7q684fz zX!3dMAcyVc;CSbGg7z9?_V(UJ+Sfrcav$tn%}h-`?@h>Id%a<=C3Lh$cWZBt{=}@~ z&q;iIImhpe%40tLjKk%g*mu|QP1z{Ka(?QypL@ySW#80H6biSmJhZ-8rBwU&L^(94 z%Gdt@_V{++Pkvckr%lS5MsM`+!A9 z(m;^$M%)t79Ct0kI0){)BzuJ9amsHr9YA75c>brpo7hY2FLM2vKV0NfcgmIGH1Ra? zEb(0Na`DIFjUvyRwDW86G4W|}o%jdwQ_suO)PI!BibS3epH}|!%70C=|JI#- ziw5=V8#J&V;ABNRIV9vJlIa9R`B1UHc%nE%^l?Y_jTn@-Z^D2pm=C+Rshs)WLpHyA zYIz^H;?*lDB~o1pm?zIdy9QYlsiUpDT(rv#JS>+NR;Em z{RE;BhnA7&0P6YMN465%iS0!@o{-;LazBwTN?4B%=gBhhc<}_WQk*JQi8bOPafx`T zXvZDwE|<*5u3XM7BH!;&en5O!d_uJ25c$tb{-gMs_@?-txLN!{u7asHX7A$}!;`t)oEZM$m#GAxh#k<5`h!2Pli%*Krh;-DXy;sG*i0_FO7liyT zBwJh%JJp@(n;CkfIy4?0WJOqwD=#;;(tJk{{b!j2c!=u>z^W? zE}ki#E1oY}ybsD-ybpM@^gk2t7Vi}w7oQS;FFr3?To3GQll-~(H!%ZwY+nO$PtoFf zkZvpaAdz0GEZ<)oA`TbnwaWZTafax>F>3KU&{_NrNVis&UnZ^)Zxrtq?-lERtLk;> z-x5C;|0dE;mi8^~2HanATd|vXsMufh-=G>J*?)7YTJmY)#o{uNj<{Uj&EhY_Uy4tN zPm6yRUl%_TKNB0_TFTll(zBQH0b)1tQ1NK7pEyE1POKECiuP?%*qbAHp?IEX-zr7^ zPbA+h-YfoA{Jlt5W47-t(SI}Q6Ul!Q1Kh&0Tw}4BxR1EM*hwr94-=0R>B~$zW5lWA z3~`Qlx_F*=p=jTNLVf!d6nL}r_6;b=^or*7>_g%c;?v@K@egACZ$G^!{bunK@pCc2 zLoM3R5cd%G5|d&(@er|#*i$@Q>?8IU>9kGzW5fyKWby01{j^Z!&J!;YFB9v33ks)| z?=*gm&qewB9p~>qwui;pVtx1og7Inoe!=dmA(v8*a*LF|ghcr+UArBY3{77bzt*c) ze!eUI_3>-%uv|>3__e+8G$C)*-Ji@qyQE}6)#Fvc{GxHQ*X{W-G_!uNt`v;S%3lYm zqHyau^M`GnJR&x}@8AXFg0>6KdHkG6vhbc0YU9UL4M=tvyspE`g&lI&&F?UM{jjZ7 zD0djjCF_+Nwsm${_hZgE=h1Vb;}?!g*B`cZ3TkvgjcC0Zc^!&i?^NWrNA9qX=U3NV zGFo_cHLOQ)xKgFaYcZ=7leb}pE#f}Rv_(FQS*4g< ziy5Ve7csLG`5I=GV)AXwC`GVOS<3gVO0jcMgrx{}FiZK4Rw?$h^WHBb*xM}SdtIg2 z?c*@hR%q&MOBg|@qhobDI>wGZ)|DdE(XqN69h;7<*{&3!j*ivs=omYimqmy`Ag;uW zrpCx?F}tS5n7jouN)h*AW-0Pv%qqp?8q6p~yoi~l$k#Bd6q9daMkzua9jn{XF?RG9 zt`wn;j@9kx7(1FjF0e(YqhobDI+pI}5ipgSdLzY10+L;d1BPHXQcbcCp(f6dnq1`6 z#FbK$*E%(EpVZ{TPEEWhHTjxT6Rr>PSNJ}_BK=X!miU#1+8@JI`?ZAHAHh`nLl|n9 zwy72VM=ce13j803{t8cFc`6D=Bfmt6-QK?cc5mOQGpE*kTbEyZqd9BFj9D`);3qV_ zvbysWoVqc|TlI0gVrr6%oz}T++t_Kzws4<}HCl7{!TGT%$=IhDE8?oN2gg=NYL4jG zC3e@@PE|R$(|)bn>>s;D@-NOF%nD=D6<&#SKBD81u^*`bZFKL=GJRZ`8G~tWg|bJQ z^h-&FW^AYx?0-OXFI6vv9h{)*6ivI z$?lyG>)b8bHNT*HK|#S`$@a4=r&o@zuI!K;gDPDrRi#t+io-fhm<_+|DaqNDr%tV& zI%{UKYeBEBhxX$8+Z@c{@%E?iw5N%`Wqoqvg^Pl5+2)Gbr{M^nIL0SRd}7#6iB#6k zi6VM-_UVZQ{hR$d(J5)?&9E*fX!}i*@!5uerw1-E*DSMYA?du>Jc>(rV&QCs%eidPRy+Zcz*CQ`%Zy@Y(JF$I@G5hts8)@3({=jKC7RE7o{lq-Z4~o9r9`IdZ-}}jz zdm0L+{j>z-*jIkyaydPLIo!U|(E8%BOsajnO+a(10Gr}XznLH95h(YzuLSxwk)iI2 zwL5bZuHGV#~58D>%hRAdj;2=+a^7g#!8P}{t$Yl7UFx;m7w2b zc-q-dGTh@_KkljN>6`dTa{25ZH*rg)r5sG@dfcu;s%k&70Z1fekA@wOtN2)-$gu1G@mNyt-nC?r2@@&3Orxs z_<)`DZxQ(hfbYEOjJ1sO-fyV~*QwmAqWMBW|AAya)@HdKl6hxH*?ga{oc@$SPWEn1 z%n`X?QqOY)$zzgiC$<;!MgE2}zqeQ@4irnoa&eS6PMjo87pug%BG0F^zerpnE)}m3 zuMw{kZxwGBSBdwFkBFTJdJ_XW}nJdrAbm z4@>sGdut`z{)zlQO18IckpCi?Z;;rot>VX`_u1o1A?7y`_Yn6L`I?9M9mRa{Q1J+{ zpU5HMSiVd=R^->`sUI)eGcd@!zM#IoFW*Ax&l4{dFBj|k_WexyJ473U6?V;+7+fv= z8u9lc-ve^_e->XC>-+kBBK_y0`4*#I27bs{pW_db_RRy(#t;Yhm;NB}5V5CtxY$QD zUu4u9B6+yTf%s^DoXEFxlx+-gaGqrEBWQ0`p}#afo@MEDY6&wmoR4 zQh6PEtf${e>z#7wdvehFMB7$7<;-u}awlD0+vYpz;%)PG(tR5rlhHh{Vq0MgnhQg~ z3tHY-*Pq~Hay`x=_(KKnW6~T|V-u z3#CMcxn?J__+^Q-y9xcnW6$xQb2s5RKbGtZGqKrRbn9|jjAyl_sUXphNW{$xJs!_R zVGf}SrFow40wr@Gq)6t)$T~ZdzZ_>}ZiM>G%=e%Adne%j(PD{vv>)cUCyl6vu;j znPu0`@HyeNYWyv;6K$Kw=A}e@qfF&w^U5{;7m2x8Fqe_Fh$i07;%H(GgX19tg#lNM z6R)i}1-yu$t4SXwc!k!8%?$d|0$fel$e1)2Q&U_9!4-Ek zm^#B{5L{!I!PJ#5gSa-8!PH8ZL2#X24W?GR41z1|GMIYFWe^)My9}m2z>M`ExY{m* zsZU)7!S#0;5K>b|q~H`muovh$;d?`_6YP$mt`u>sN|Edkm1436Gi(v;2HNu7p;GLR zOI#`9N|hqnBPzw@t(akpU?XCN=hK26rnDR)$PIPAMW~~{#?^!!Oj{&-SGJhslN;C~R%2!< zaxG?+V)A#GQHoGU$Le-;Yy-01bft(7Fw+*9?&w&$qembkHM!o!$ePfwcd^G4t~>Kr z`0j+7UFrHS-$p=Xr$J4)4$EKRI}B=emg}MX6(sjRs0r64`73;vK+W!OeUQJx_W{&g zf49>4EBs1By#Z>smia6ET0+e={1h{tNJzI^l_F(REBudID()2c&m!R|EZYtAZYPr2 zlkkr9`*9*UrJx7i`(l$+Osbqbe$Moo3VtP?J|Wm{)ismwVjF2(%J5z8jPW&7oVN(2 ziC^JFvKme#jgzs{JGW^QJ3ZOIOio-uXe*rHhz=gg>_SyMfB0$yZKpE|R$dTjaN zkrm^2vGvDJKF#uqj~iPye$x2a6(hP1D5)r&GrhWUQbp0Ms;cRgvn!@goiKI;#w0`j zq)7c|`4wnTWVheRuKZ5WGZi(?^&ygS=&;e!>Uf{*JgS!)Kr2;+J|G%^Eag4%H4Y}} zA-GaCz6VzmzfY!?S;ytX)>A{FeIxgilo{_TVkZamM1_XjFz*BIe>;1Q>|9i%>alqB z)RSgbPDQERju7KQ?AEX`I4LodwJd%=H@6@&fF!U)jE| z@+H}xgGUCq*76hE$N52#`wgenScy|y(*FB$PeWqbPraJB`vfoh{ptxQ!u|J3>vaD$ zL!RFcUPKzrsq*z#!QP=>0R6I{X1Ub#J```Kq;xr!5ABwb2V3Ay5lZZaU+GKI3I(`N z`pGZX%bsEVzsr{-wbIs0e#u;ae>6MYf3q(M&o#U9B`Hm>jyq0v{&|Kk3C{hvWoVZg zSZgO=68<>s^7<3z!amuyW6+<(-h0F8BY}3&uOvsz6ZtTd`j%oVF)6kaxdpxpf0BN* zlk3j4eH{Msbt4RkS;Al>b6< zl>Gp?fw+g5FCHxp6;BYSi$4%A5U&&O5bq~(et%GWgv2@UInmzNWBGg!z;UWS_B4Tywy!XOs(d0al=L@!@mDo;fFXoHOG};!^Pn@fz_u@mBG6(e?+l^M1*Xh^xi5;yUpq@fC5S_^!BB{8+T( z3-;~!0(bkBxcy?cUy197|24l7zFOmP?fps0B{Qg<`f=hUakpQI>zDr)zY@L+<#zJ^ zBo9k|O!WRF&r1G-__DY`+$eq^ZWTWhy?;pz%i{8~M1;DV?EOpjmb{;Mfav{83MBUs zdy9qQK(Ry|A$tFk3ds}2X`=TpIaRWaeTDQnlD&V)#gdnacAb-O*X&#`P9#>_xSGGS zkegG^3;T&2)+6L5lHBbl^55qtG6L5?U*#uqGR|rE!-n;KBIfNG%{Yn~KjM}@q@3B& ztdk(bCNh2WWd4t5nB!eMYa~l0GJ5lJE0M*kwzQwfGpxi5H~ERs%fk&z5<3LtV;$+# z4?hu(b^$+;(a45p$PKg@k28)KQU#Q0Kaoz5BAN67Jv(y`)H*AZ!O3T4(yQ3}iJSvX zJwK7|P{o%Ax1h4~6G_DBGXigsrU`mcWY1%P<_Rk4E%GSEJv6LHG@Cxm@fH$e*@LmL z_?`*7V}Q3vYv#60(DQ@dB7EN--%F-)vIjDEZ;82)tkbXt@qH2

7yl0U_uU@LGyf zdokrF(l_NN!UhKY*gp7)uzAig#Qa3qyr4fX6wObBPgjD0v>EmjVbyQtCvxa+KasB- zl7#*t@S)i4C&KTF@$TqY%y^wkoQT=^S1>ijWe`=V45oPRgBrx5R0dO5x(wplR0dNk zT?WA$9k&doR=W&>cRDVEDc$6E`zBLFe8KDJ&wy@>Qk3N@W6B#5K>b|q~P~J zbjOUB_PhN=y!*m#KM{^e6XPzq+fT$Dq&Ud@5lR;ie~3c87QMs+lWKo}LcIYh9+p&- zJSd^|$L4N75j+F!bkf9$ow^@3mdTkI!=Mwt_A_?s%!$+IOsd4U#JZTLKo{>R&?V(5 z&?V(5(B;cK1-eW=&GL$m>++SJ0$slOrv=^X+inH_4nL76>iLQM#{52}C1Y>GDdgwy z@#yCKL>`7$2URDTp9n_=q4a?KM8>7duaTd~&s2mq+V(c9C9c$T=L)h?1&&MkiO^z^ zb38fLiheJCBG#|wCt{x*`_KD{bStoj_jNumxAU9#uNlSTlx_v^sYtm-d_Ue4DMy6w z!G|KXtUA6E@T{<{_;r30|92g6QvKqcLDDWRJ9~fFZc*3Yq^`$D-B(NAH3WO;u3tpEppB z^B*SO&4l0Q@Aeb1Zn1mRaKG&K6LI?!-!uDtj6Jp6PsHsn{2!~+GnDb6W4Zr!KM@;00`2UN?aua=ixb7!BA?bXf2nw# zxZ6(z{et&yw!Oi*-0mPBl9G$WCE`-?3h^58I`LNVc5#)+M>4ech{(q>l-G*uM0-91 z{VS3;itmbB#gE0^ej=_P*KvPFzwI7>#P!4f>i8qO{Y2dM`(GV@WVfG)+kW4>pGdc^ z-IAfn`-ybJ7j4`}ZQTEY{QRChdnS`zdlnqp)yjYUcp}&E-7DM!crS~)S;SzpjC6W$ z>#*}y4o#e2oKc*yGM;L#n0B}Ej_I`SsZnQgr#NSd%f4<@ZE8M=vk@aKZfem2(pP)(zW=L2s4^ zm#-@xw&_W{rlD)ls}>94=)AF z6WfAByxXn)gUg>-A6*{5dQ7A&f%Y97$9CvkeAi3U6B$=c-Ye2}*rq3PgZIzP3f^Cw z8N9zJ-m-W`!m%4FG@r@Jh$FUYv0+`KJdoBc^~MDeW1;Ex)0R1`1Sk1DKGykdq5%ffaEvW z1H$G0`8{A(VxM&x*F+9%TO5D?yvUu!clTfNn{LIqFPGQ0O_tWS&BNCJgj>G|a$#-T z((0nC`fq(H==pHp_flKRN`5d+@Qg3 zq6vY>lRc}dAQF8ug9@a(`gB7ZZEd6JBMs;q6@5U}=rQH0JrJtq z(yrQrs&*u+-J0o^HZWD~*39(MT-sH;&GeB5pRwA9s>Y8)xuty=s^-$J+Q+J9*Z=pZ zk@uyl-4kl0OS@{T)JQtHMK@__n^V;`g_h>huG$A$nt3s=RJC^44z7_aL)Bc`RlCPk z%L&*G!Dy@@_ADeh1$W`0QX}4u2V=OQ89dd9dr2^s9d#Q;4yG5Jz}(L%a>EBFa`PSz zRqoVCFkuCRvnWiHus_V_o-E-g3ezQ2Qtc^D#;l%zFKTL`I5^CO! z5T~Fi(=iA0t6{mxqfkABye9V|u?~r*zCg2Qq4|I8y$5_1)w=#alf9Gd6ha6fMZi!6 z1f-*g8XyD+odD7l0)!?~Lp>^}*joTAC}1x~Jy_1M96h3fy@1`Lcn~{C6f275|2*${ zX75Qr<=lJjx%YSfcRrbX*ZZ!u-c@F;*|YYZc_)&Jq+T|MFf(xt@1M!H@K)Ok)gg$j z_89^#5XcD1cz}k2mG-@L= zZNl!~M6Y$$#<7UCHZEbtAc3{t;aAUkK-U_WE&?iW01hwxWHxP zabzZbr{%v=%8WdY=QAUZ<2B3}B(OGaa2eUgqmZB*Grn;rGqR0*KdH5G2Qvl6AQhw<>Sjoq1%Z5+moK>};z zBA1bEWTvs${qm8_xEDdbn$+63mKlQt*2c$OMz(Q0QchyVFZt?RYvV`E$m7VDi{=Cg ztc{uWEwr_fnWi%1SI;sd$Le8-wKld#ASXy*ZRC4IaVI+G`UPAOF$k zxpfmIoRFO~09Q!0aYlC1S(I=}cG3fscuu~#xDw2X?P zjz3YvdHF7%=i52ikZ@vl(h+#Nw>HkqPFe-2j-8tSWNEiiwsW(SQ*t2N$=S(;kZm+f zMPp`Q_n-0U|IS9k>4>x=vjTyNr{_)3ASe5sx$N}(oZp{0Ip*JBPR{F{%o(JxF<+mL zGYrokiy#81sWYs=IY3tb(890 zZdf}DnUn22kvW4Dc0A{}oIIX9xp!sG21z5BlkF^HPPX#~<_uC;JOAQxvYpIz9CIF) zRK}ca=QGU7cD}=$K?-Z<=PoDPITZT{=IoI4EOWA*NmvzFJ8L446QrL*bpAZn%^|5dPXGc(5&Gp)%>A;Ha^mmn&2g@$3ck; zM!lTX-pLx39%UqlU)q`yytFkn{LA zM5zonA$KYl#r&i=71*tz&3Cnu5~$By1FgZ1f3i;MiG1co#U0ti+Di6Mx4Z@n-w$ z7;v36xDl-K76kMP(cgl@h?&?^yao6?Z?ul#Q(Y9R!IKj0lP{Zk@OFSTLs3BmnIfnm z`(GOiJ_IQlOkIJA0iHuev{;{WPWB={Z!-}J(iTV#`|9oxQ zA;b?Z0l~6-c*4-I505Pt7U~w7OSWpR3oIvl^U)3)qu)A{1kEa8P=XQ$rG&aMJa$;v z{)cHaD^I(2aFK)?dw(GIWN)6=uGu;UCt=S-=eKXN$ZK?2613Em#ic4cMo z0qm*X{HW!k@T4ggIt9YE1!cm8Xi#2iP#%k#jU90WOFblrOG*2>N!mBf(tr7-?h>z| z4HOoNq(Rw9D4WG@a%zG#s0MYV%p5^SSzpYxi8CJIR2-D{P3C%yI5%Fzo{aAt=6Q`? zM(_g@7gB^l+gR19*j?SxD-9kCk$SKg5JNS|kUibeucU65-*XK7@@(h%gbjYsEH z?05={NBBh-tcN^qwhvy9AbTj{t>~Y^@kAp@-dqISwg^~`odYAU>AGhTd_5s{Lk=$1 zli{KXv0MzFnh=rBHrC*D?5G86u*C)0mLAw~$k~?ZE{HhWLj50B9prEdvV?jvtkQuE ztNuyDOwO)B<%#pK$A>+_wsE}cFiK-nK*u9c1sx1aVO6D!OjRjks8@rG4sm`37kvy|#qpDIysw!n<3Qfl#Bkj0U@fK4x7CX!nK3XhWlW@sXFR~E>2YLq zpD6LO{OeGKOea#XOZz$>>)SjtdlEZ zzmFVMD3PMVXCdnre55F4qPo9kE0Lmtt#{+Lh6cSra&jMNSwbte$Y6kZxhx@f1QB5? zEg@j&6YVW%tB)ToIFfJ{RtyU)9MqD78F|GQ7;sCDz(n|35D8Uq<#h(DiJH#O3yvUOwqQ|ElhApE1=K(+D?*-UDMwxd&<52c+Y-8v-HTkVY9oj%Eai&9 zSAool(V8e~1QOVG9R9O`zrBc{y~J7|Xl)8EzPVZmnw$n{zSoGY4oXU7veNL6om?9` zW-!5i_B~sEvXEdbtaeQcT8#BUqQNHx#>2ydW*#G~w7T`eWjGdpH90Vs}kAG%xh(B$Lc~~4^oVdPn%OqZL z9?a#xJEUWSg0Mt#3yq4#vHDFMz_CF&q3h9&&^c2>_>J#z*m1!!0+{TA8v!>ThbJt> zKh$}APsLvG%Dyi0xS1LM09%Aa%dsE$0=_FU48^Vs_z4K|%peijY-2&EW3PAt&no9( zN3~gHeo}@mx&H40p4|~YUOWssUe=`&)vJN(VFZ4}j#X#kn2!y|@?sgiO#I4fI7qz_ z0cUGS!dARKiP!^`#Mpx`i7B7Oj(QPqVy}Dw|LYYw_zU=7x4}|>{{p@h2IxQ=r18sH zs)DlxY}gi>jbT-#oJ>_YXGiEbp>Ws2eji-#am3(XiGJOI0<|F^cXaE1e7`ng;kX-G1c!`Vm!|&XbiCc`+lXd z3YAKu%9R#BjRj|>P`6N3DPtm4JmUdQO%EgE%h*GFT7hhayTrFZ{6?)EXf-!x32(uTTnCDO zIfeGjXRg05tBU7iLtgCuKlkR6f0wI~{?jJREuM?_o*db8KvCbKBm2tJ$;7T>CzUK1 zJE?dKG8dcwV#XTP`g;8)Q2+j^oE-qwSgv~cla12FO~+^tmW7MYbB zsfMpcqmdu@4|ixrBasDdh|X~Z?mUl12J+ugaa}!zn(&{+w#O(%IPyul<&BJN6UA?I zP;8ptMp3tCx~ONpAa2b()AY53RV{4BB8zfO^=u(vWQTm39-H6uv(Lt0@)6C2_t z{+3a>Z_X`sn*MfhA{|^21G?coN|DFB$&m-FuDO-iCi2&%x%DH@!+p)Cr@IQ@;yrrjIIY!)2A?qDzZ)FVUDhsJSO+g=Rg>$v2~6Lj}MwV7F!8!Y?Zc& zEbbOL&+itwt8!cltofzw_^-XIc~SmIyzFU7312hQXUnw_i5I_UprGGdWL6tS>o)j=})r zTRti{3Y%Lp5AP84reV<7k@9-??AbN9IeUEAtXVVWb=e5Y~*yiXq9dg^ZZP&3~yLLzCHlJHEqXh59Ymqw!S&l4Gmew7|9o-sN zlrtwz&Bf%MHgDRjnYr!T9o4?eQ77`3eY{c`8?Ho7&C0A|?|$GF5I3B+ydGIi@|LIN zogK?NCpGWfl)Uqj^UjavT@cB;Fe&d6zk60*(%0#ESxtIm^l~`LWwrmj8vp(LJ6%TP z;FW){@e03tR(9Usf}Bq>-vXA8YDIHy*Bd}pHf;p0W6*CI5h|%d#TrE zQgLaq*Ji@Jd0rbT+WhJy`HkrC@i&)FaZ3|J?|S3e=>K_#PluxKaj5ZayW2X70o-a1 zHwr?*bh!Aot#UfXapP(+hW+=_@t9XGmt!{AaA9v-Kl~4;I|^w&2ns`7kZwVxboCI? z)-1SxLAtpR?HLBeeVymN{O9ZH*#}I=`d@}URE*aj5vONCsV#^rgB-S(*&VB8OibFN zoxt9Dgo8W?de7##U+fs>7R22X3RAzf2JW1x&5+xIbaz1vm)mgwZni->mW$~XFZVHo zgFFa&Ijt-9OAz-6;==ZBEb+Wt=x7hO#K!Htig1tzL9Ykw2FTM80|>z6q>(O%wA9n`ND(xE!DEffBAJNn?> zGd2(D4i8l%2$G>` z#H%c0@`knuYF{5R`;_N8`kU%3nV+{gX#WY4`5Bsn_MQv|o0WTjYhrk-O}L)g?_!1@ zQwRJI41dZUz^Y}cylAlZY@}mgHAkh=aWI;I4KN9LB$9C6!=IOg3CTH0vPVeH(n){8%g( zzY+N>1oQEGNV1C9TolJAPBorUrJp38BK;!Cr-~O!f0=l-^w)|vOMkcIKZ~2BxA*&?{x3`ay7&*p@046F{v>@0 z>dtm&kl3q=wWV(?`Eaqb^v8?&(g*MD86y2y>Boz+q+cYSCVlXJo(rVET>7iUTcy8S z{EPGtiBCxXqU4vw_oUw`elGo2;*Zj&;>5ysXNYx4^haZ{x%92XPSWQ|&KHZMA1fA1 zUn0(wezD}!#EYcATwE>vTJaX??~(i$akKO4!)jE|y3?Q=BLLLUEb&d?1|VTq>@U{#Nl$>F*XFl76$~ zXT-Op-ywc1{Vwrq>3@+N!J>=hRwvQ!dSXNAn~H6uKU(s!;sEJKh-0K5Cr*`qp5%q% zxzd-3mrH-Oc)j#@O1@isO!{ZVm!yA1d`J3^CGQgVNgu_99^08lqTN-*L!{^P=F~S8 zJ4t_>*i-u6B7eT7y)lx5~M*La&G}P7FE%M2B*1wr}g!D&>M@ipPa&Pej>BoyD(oYlTN`IQQeUbgpL@k8-b@q3ZqS6IJseSq{avGV(E z50(Bfv6?-nhA=)wjw_sn%MdAtKIB}vlU7RVNF4}qqb}o>7iFmn4ClD;}dhuqF z&LXJ4TYNy|9XZrLAwDI(BEBKMD{}qJ^gG3J@f-1bkzbZD9oOHay_XrxmVB5<*C34N zivUUbMIq@5i0mQSIt=mv$-~7_;&^eAXzMkkUnu!3@m%q8@oMoF@sHwz;v?dV;>+SE z;%DMl;&F@s;x*ze;vYr&Tw-~D6K#D7`B}*?i~LTI>9&dQiS*J${Wl^{RFtD);9s<^ zWLs|{zOCeA#9-aY?~R#%ut>*Gl&6Wa#ZvJM@oe!Tu}r)}+#udB{#ATJd`fAz~W zO5QDgBYrR1dK2}-L-|(EnqnQ1zN%RNw&Jm3cQIIJ2JeR*CjCgU^7~=uN*}xzHdt>4 z?}NQa@$}rpa@UCK#GA$2MY_*ox<|xK;?v?w;w$3c#dpOI#ZSdA#IHsAR`)EYjZ?<4+gQ7S9)LU5WTRB;PCEFVg=Q^V_--d|9%sFCl*@ z`BRZj$(a5}k#5K+R}~Kt>x%SF#`xAEeUnkn6X}hNa*;SeoGj8M8RKpJ3DOA}<%>o7 zBBQ)sq$e`UwhjgVD)~{7zQ`E=inv4kNTfqD#(yu;1sP>qe}cB|1P_y*e#jW#UZm$S z%DqH7Afr4|94Af`>5h!?r;4`Tgly|gkbcM*f4z8{XzNbsAD8^3_=31q{7Bp>elPwc z(m5IJXNz=4M!B&_uVj=vi}XoGxvxkkWR%B>Q^b=+`X*!i=^{OoQMPp@c#Y)sB3+X) z{(kXs@kx;$%NYNbNPlINzYyu5jBjDM>eLv zRJ=m8btm*UO1@RxAl@g^ha2-hE!w&h@~e{H7XKlBB7P=*C4MLVEb^Tkw3{YY5$lNc z#U^5N@ko(=l$gJ(c$`QtbJPzJ=|YL}iQ*)2syJIL73r6b>CY7}5m$<<#kJy1;%y>5 z*)jja;?v^u;@`!0#m~eq#2-ce$WA*|#p)tm<5AyQ>?j^39xwJ3`-y|Z5#ngESS%4| zh_gld-eY;o#S6tt#ns|k@h0&$@jmeZ@lo*!kR|8?}mP_=@;<@m=v7 z@q5w7cP^|?vX~Bc6TJd`E zHt|mJKJfwZQSk}!S@A`YJ{f8MJ@FIqGx00&JCQycnLb^tDb^92h|R?gVi%D<9+`ij zI9wbhju$71CyTR0x`AZ=GevrXq<#O>G@q3XTA{pOM zY%aDE=^~Qxy+nG7q&!ljpGe9li*yW0`E-%~At|pA=^c{tjUwGaQodjOoA|g$FOiIY zO?*e(F4AWt<0H7Wf=m~)L^_S6zMG^T(OBrACrtfR-{u&%7aDvmZUsUoG#83&l1lSFA-OYbT!HRe-!C)lJeg~`kSP@ zRopIqAkxnyWs)-Ql_BX?lB_S%yCmhdVi)lkkq_lDewauHla!~3^fO6$iFk&1 zwn(p&j9)9#+a$lAzgv7zd_>$VJ|k`wUlZw@lKDRszYxC`_lduVY4}2)>8przW=T0$ zJX}0NY%g{ej}^O%eZ>Ca2ywJnES8A)+QLi18Ur7PcHIxP^+zs=dT`@<0AGI@u}rpj zT%H>(AJSnOTKdlV{`4w-Uxt2tnBR*8@i;e`eb^hu^pHo&PMPG(War2Z9XscSw%>d2 zOuLS45Bj|`U*w_?eB^gDB;GrdS+HWmxShi?tE|W@^9!<8#_;Z$>Sw&|McbyV@^?KS zsam$IAa&Ix1uF_p+S{$|$i2~4Z|(JFzqL0ycvSY#?4sIZvit0fc6)bkG;bv0ht|cL zT=KkzPwh+c$7D~+{;2MS1y1wizEt1d^0H!Z!Ki}G`%-+o(`J22LDhn7pGN(9`DgA+ zZoI5+@vexURB*^1FE68@_a4vB+2i%-xyOr4%6<_g4BXodrFCnYx+dl7tUa-;wY|>I zkL`)Y?%o<(!*|L&yeFw@I^HVt@Uj>7w%Ryu=h%$#ThiBLu1;C`wwJmpY1ea+*s82G z(N%+XKA&D?&At16{3>l#bal#_T2n_%-L|*M#@hAk6b#vWOxwYGqy2Z(9-5tp)(+l# z%-|2|_M3{j_t?A(eoq@ewJ+M(U*$FSR#8Vet8oN!(yD$_m+wnC|A_o;pCeQ=K)}-f0SH@PyI;`rEvg)p_>1#6L@1)6CnZD|sf)#HL+BqgAb9L1NC6WX|XFgt?!|a?~RuA*xT9b zxwmun(7j#ChVDHE?-@$-d+a?XyJ&Bh!A0Pc`AlEhi#e{_l?*$_AWs+M>5@Gme`5ag zZ&tIn*i>2be!<$9cf@yFGS@^qR9*GwkKZr28}BXQyKFAsaArYlMc-J?%CuGKE4(jS zoe^z2Xy+3d>AN0Ft6sLe;PryCf+~2gQSA*c?5$UZSkI8HCOR|jFxJqj9#8G_HNGgh@rDt0e%iX^RhR5bZH#%eEamD4 zb|uB8?TVyfHZ^XSe_VmL4l}NC`dYTVV}3yaXA$OA0mfcx-|X(=G3I8UJU+JOh92Yd zOY$FhGjny;)fpIhnJcTT_B+JdkLi`Ms>;f>TVE~6UQ=!L3wxVy7#g$pHnps_GJDnW z-=6xX9e7vMn3U>kV%H2s=)YqW*0fO=!*Oc9f#dMoEs^@wF$yVf_z%2qr#H{vc7BZd z7lD30e(>Rs&XqU3Z|4w1MeKtic;C(+`D8bJ)7WcLx-T+K>I+O`zekR`fSOqHWi$~>9Rwuax5KC2BYfjP#Jz8azw|{K_C<~e ze>9A=qEm;+8w|ESg+c6Ifl5avSqHE0S ze)4IEj;=Qk{VDdoos{U^Fq4`c&52!!bg?g)xJHahzI7*;>1)PrHZdtSlj0!~BeCl# z){50eo+P|==R)SK9cy4>EH;^99hu6E@jlgPU5Qyuw&%HIK3f?f}Lg3QcMxEd+_ zzrdL5kGI+5+o5y)@eccgKg+rP*v8mmiq;?RvOlhb$o_bb{lQjDd*3l>5Va-Mz~Qu?`QGhe2Y&%mFdas6S=(?5e)l^137^UkZhZ09_^T62j0 z5m4|KT`0|YdQK~7Il{b@Xfx=mbM)8nA7r6$o?erESd;x)ligR7V;V94PUq>zXPWzT z`1-Ekd>lX5I=yo~o>9>sdZwI@!+krQk5@^=qT?!hBCi_uM4lb;L|(0uC-R(xC-Umf z6M2owp2+dr@c})N<6z_5ds-8c_p`(0-zOHxgTM%q6W$`&#lhA90XQll+E{Q1;j*ph zLk`7`6a+26AzL4$h;KYK!|w~>3=9hy=$|k!EM%a6Ja;_T&`_?yiCjZNxdw-G@q-0^ ze~8zyJ8$9){S6}sb5K}Xe>2oHpC`wMu)`TxP&cFqG6hwj z^FEdv)Pr7<|KK$;mD1LL5#BX~+{8uLBkdnGJjokr}9;4yNn?cv!G3;wvhf6-9z=C55XL&?mIn*KH zV-?hwJs%hd9|c}RaGi**ZHc1BVu#P3cL3hal!AxG7JK#9F&wj^2NMmj2T=^WUWkvr zNwBxvY>ps!sY5@I^I(YKwb;|V)1xWvno&h@1NLf8b*k5aj>8dIZ(TF_23lt@nGy>e_F>O3wspqhce^YMg-ZCnXPd&lrfq(I>V7IzTq?vyZgT*VLHmg z323j!055TPW+KlCBH|_x;71J3J49y-jwVWxum|TjhC5?NW}<&6iecB0 z@i9IX#av`X6%lK(>vT5H|RowjlnU!acMB*Aq-AgfPAN851-WvQA2m=Mg=nn=f#kXJK{EUiVInZCJxLf z*oki_!}^kJ;==zMJj=1)xp8K2<26xu`>ps(vD!)U*5J4#{U<%k{VTk&{cm^e)}bAq zQAS_y=gSR8F7C?>3t2vfd`fZYRCs>l$8z9li@w~d7Dnc@iBvU*PLJWsj7Ts3JCgs* zgPMinxq+u+mKI5RZ+_Y7?nl zcKi{Ihs4?*+q4Vxek3iIplP3#@sHp?dRlY;OvF2bqyBOHcMSiH=0D5L(tXy$w-D>$ zvvj-+xUd}O^TFEjvO{JGCDWXEI0JOP2@y4xN4aTH)>@_ z7Kv=}%&C@jg>~N1R9lBy&orcHPOj{qwLOs-ugHOo+0NHi4OS=ApNU+NsfCexxskEm z=)Enn*@Hi|fs^qmif5<;XMH|=XH{(znUl-^Sr3_Ad|v{CQ~1x0jTLTIfBOhq4)&+> z-)D!<8pCdLBf(4^OEEIbc@?W>wU5l2Y|20?jMU1V7O6EdGCMamx@kS@m+P3q`k*gE z=0%T(HPVd#EOb0WJggBOU>8bsXJSxUvv}m3JrjB4Bau>9t4vob`O32c9API9lr5(Oh{2K9>@{oBrKy$^Q5H&Dzh8)qbuYI<%|kL~ZhnS;bf}PMbNRc!npp zTQkEx>}a8aqX<~o-;vz`Jf_LtnjPlQp*O!>akpq34CeeS?rAIT1r0F=c5Q)Lx*F_X zjbLn5^0PLla|aB)ps0!-+TyO};=aSo$=JkM^VlQKki5MmJg>1FYe>BQaWm|%{oHiK zy>SFpR|iz?=&%Q>gtI&zGdimK&w2~A4{GNb?Z4lj*-@d3IbO^Cwm-5SSyLl*{lFnv zI4`dce>-pYtVNOb@w}}<Hf4DC*9Q%XuWyWOiGM7ji9!Z=q|L4n0#~l}{wjGZD zG3>Z7wawj6Apr=|al9~$uhwm2x{+FwP+^y{U_b2PbQdAbc?U?hpi;UTSgW*!F4zKl zbD_Y`8}Y3VD$FmS>R@MGn2zo$=@%FY#g!o(wl^O3+M@BaM>~PN^$3UU zU5ZQ%Ly91HPo;Dl(or_{U<=aS1x2{rvX*#$2lwo-Tp(WVV+aR%5cIyTQL$fwIQsSp z+Z&JXLvo>`J={JXxA!W-K^_FXCb%apmjP`-+!n}Td&^*t$Ak88J8|6JM+gUb5cKk4 zZx#AF*n+qnP=xJmfW6?jRYP3R&tD?UJi)Pl1J0)|4F;p)7|&;e!|5hBI5=NsZzA0T z$Qx|IkVt{CaQ&VRwHHl_*RK}Rp*pjJ{AGt7oG-JdknUi7nKf_f9h5J#rd`$iB)zg74Xb*IW`d{wL ztQR_*J`W1T6GZ-6M*TE#ruYYOnRv0t^EcC9FWw^Z{7U`5+Lu`y%xl^`R_rg15vPlb z#q-3gMBZA${CAKz|7{TMD_xv``5O)6pC%#mh8W6kNainIls}TpTQDfwv;0WUFW{N4 zs>rW|Df5mQva`sa|0wf^A9B3N@1!Z8DxN{YzTGneeVOFdivP3ZhsjjW+bC{Q{ELcz zQ}Q;+A4~pB^0$)rNlwPell90E4-;F7M~l5hdzK#QCrX|pE)|!PXvZazS4j?hubIy^ z#6LP%xKg}AyjHwUyiL4Qyieq3CF}pR_`LXv z_=flo@qKZpST6o7CUIQDUYcmW1R?WtmHNP!M`OwS%%tAtC)i$cH!)A-olQ(POdKnY z7pICdMDt0A^a~}QC7vr@BJvkJ+Pz-9S>%uJ)bnR@@-cCYvFoR@prDA=VaoHyYE~c?Rqtxr=z5*h4hmk4QIEa^TCud_Y1!P5M(r-rq+1%fxfV z3&ktNHKO^1MEbiVZx){sw}|E=66v-}{y^L%n$JkYo6ks)7pkmBrkE}AhCAvTi!H@A zVkhxvv4>b7@(w-bA1xM(fp3o)k^|o!e~`RXJXbWIlCZ=3`1rZ9Ry1FdkZ+fKkN6ky zQPF&TAl-A4UlO;AABele&&6-WAH)di!17bY>S8Uiq1aS3A0S9?K0v_k()SY0_XqTY zB^Qe&;tX-NXg(*A{#40liRX&EO_B98-yh)hlFj!AEsj z0MGF3>YbImt5@XuU7J(W$};!h0g5XlE86C_D@fV(M5If7Z|xrozVVVS$Fn;dw(X7K z8K~I$ZF{5Z2klI$J!t2PSpy3O6x7=77iRDFr*GZuFL@Q=ml0mI+aLY%Zg2Fe-QJR` zcYAf;+U?ivSl+bdg7VasUCM9nT3UW~*Y@R&(&v>oPA@Gl8QrA1x^@-#k5a zx1atP_RC@Gb?oiSCyZWL{#1IW@|#>>xuab@;@r~>w0@) zUUW|^`f+(=deWX)Qe;mo@^SfDg?YOpUGq`f9=nr9C!zG7yOXB(1TWm`t$Ac`X6`oE z6YDcpuE7&m(UvKAj_3h;E|uDnQLgSWlpm628He#DQi zOj`9gT|eWwGJoX*1%E^DN7r1r+e?1~ZC#5#dKaZ$g*Lsp+i&SzyQg;Au1HeH`uz&p z7SurbW$0D(=#p0uMo&*)i5}jn9!Af0MX#V&OGbAopR%NLd9%U=<&&3mEI)fXdlbF5 z8ojp~y?1+QdBN@T%RjPSY*_y61=Gu~yCApxnbFhA*B4GHzkYNh^z7~BXIyY%{_VYX zmirgnR=#ZXr{!MZN9AXZzNP%kB{*VTJC>(RM;~=vhI&lOe`2?H!CAZg3&!U^w%aQ_ z1NEAi|2S%P=5BvUasGt-b#MBsy*0J+lU84mA6Z?NpN!|WR`u{!rR<5Nr0t2NE&cWn ze@a=Cx_aB*+zl&Zu2)l6rmRYO3s0(L7JZzC=L&N>6zz@{R^Od6z54Ft(M2euXm={Y zG3b((6zz_ntxdXObfIpO3OSnQmzNZFDsMV{LHRAC7nFa@dbjLUe$ME5%+x+%6`+CE|i&@dm0}A>Va84b9BhPt;@lwe7 z#iReqZg0s7)UDziJG^D*@^cR`$DUfU0HcE=A_ZgaaqO4D)@#_^96KCy>?6&wDVSq7 zV?KK=FUK64R6c%maru+r$I}~?M+-~J8`hmt-o(wZ_C0Kl@px{vIW{(beteE`=5dbs zdt!cgj`hZ9?~XakQp;Wo!Ok`i<5 zT%5t5vN={--eh{0^20UHreI!9>N>yt9L&Whr%xz9uVu6H*pi9m=Z$V$9xI$&e%|y+ z<>wVPEssr~Qhr`y4r1O#H7Zgu50jTfLUZtsHV0#xgKhtO)*}Civo=KWly3T#SiueF zH#~2`)L*{)`Iq;h&)gE((DsqD&iBvjF%@4~mo+a4V!qtk@Vp)8-!Qd#K?F}{w#|e7 z(RX-FVjrbZ-$%e71tEe9fXW*lM|5{zrksP=$alO(sNVyr@YJGxfsvH_45Y}PsXBts zIwmEhPT)#En#||1BDYi3y_El>sV^}imV6zp#8UZ1YT`l4{*WU4EiF>B3;*-$i%3IW zY(#o8*m|0?aU9{t>|2Uh)Et7wqHCc{ejjF|H~B3PPKmy1|F6gY)Ed#^*i6L5mNLP_ z7?pfJ@&_*P8=^0`J6?xTR`8cpCkP_laAOA!Bbwr>cRkIq}#kI0#us#7&(@@om(^U&?Z?qsZ@^ocKP)W8>m6 zxEjxTKc1L=K(qJ~6qlGw_pHZQkeTvv)ttr0m7Um=;^C~-G8VLk;?;~jgJK;lv$F1w zi$_yr8(i!tiuL2-Vv2vlL2$8GQ`{XFAEd~i3;Z)_`7Mh4Hs6W6Dca*77VF~_k;V7I zxY(K$`Bj}0>3}k8V?6J%6x%ZPtnE+^ftbOEW0$j>(@nylFzH#7FfdF?$6_X9HU@`D zJxuB-i7yeznB7Uz&6J8^^K9Du$RyY_iS8CNI5JJ5bHxk}PLt?LF{2nZO`^lZjAGa{ z=|+<}OQMtgjN&em==#vB>Oaojo6O$;@Eja^gP!yKe6%6krt6fX?TDBLWwy=NsY%yE z=2IToHesh(Jlzmx+l-xV@w*^b<4M9lIf<=FTH)o`3_iugI#uvYt4(1iV-6!44RYeq zh|aM|?Br2SM)RF~wv*%OZ=!7TcxKX_C~Yg`8a9!gj4;x=a1N*PEK9b>lA(*8Sc8)} z2qL`;=I|Ng*_QrrjLIB7XYE9~;>*E=b`l-qH%-LAaN_BQFct&DiS(hA!zu5?$4$ii zbYfRbs~k>xCq85%W~dWK;%1(l*_fhEe3By134gG1JL1lp9DZIo@l+F0t`j$zh;p5{ z(?pc(#P)|WFUob|NE1=66Hhl0#l#8@7LRoboF@BasPOMf|&m&9(Ip)%{Yb+yW?D5@nQFh55iZCKe3)%>3RBWJx`zP zo|vx|5@9n(56~;NdPqcUjf9B7tP+*<{KayO3Cc=GAe4($^S#l8oiM!N#0b-l zA!O?sv$YKN@I)!WHlSqUag>1KHY{bpRWe@OuN$5YIiBX?@W#yRvPidMkGfucUa|k3lH=t*|wSZ|0H&fhb>5p zfQ89P7A`&Y6VQHnM;emrxFm1hc%-&%0sj95J8TRh|7PJi(N|$FW;V+Dlg{4kDDCB% zjj{n`fwMOW*=(b|zhj5J{-43dkJu3&NIDzyJle3uGt!XuRt|68RA&Jn4+uQ#Z1km# zj;MRab?;&Sz04aM>)-Ti5ZvZKK(Jv6rcJ>C5c6S1vA`I+ZfWSS@-ayjXn`iZlI(vgi zXK$`Ydl(4Tmt+qM&szkoZM63ycJy^2>(tiSC?sXW>ST9YcxC-ayHmoOcdE1Cc~>Ct zy0ekbw&*-i@HN6sT-gOA$51B5(6`YR^Je289B61;4e~67TJ)j?yLZJa>rJv2$mJo! zT>fjcj{Q>4+3iho93aJ1+Few^?poN~>FgGSYSxFX;As}+^+U96*W>?}*rDsqwBxZO z+@Dk(qO1e|xjHm=7W$JMN2tRL*5T9&b>Ju}cXn;$9OdlxBc0t+W|+ga)mz88rke2s z$u=J69oSJDn-ATbg@I({-l=E3BMSpvem7I!brx)NG;tONkbH9qZvfKjw{J$G`~e__!fBaw3?c@lNLS;qb+w?B3#=J}nxoqr|GCDg8)ZPT;V1 zZ!w=ovBA2j>I&p2Y5{eF3buZ5w(^}VO3I&qfc!)E&(A3e%l%t?(-W2{v3pRL-l1}b zyI4fp#y0$n9r+4fOepQJ{nK(tBkiCT7^@A|QDWDki~*s1i0xIWZM+~tzJV@ZaCwBj z8Q5aMetk2bVtx*L-pYpj1ueemjZ+LIP2~6`6;ttJ3#t0GKqoX>M@gv)QBm8NiYLav zR=stUlqx=in2M*az*fC=l$45>LvdR?c_URHwyV)PN=j7_PL=CYpZbs_a?|Sgkb#s>w?jiU?|~i z*}6csHY|lYzO_UMlaZ*nE>PfE*6bkL@NspCwL~t^*_4(D;5i)E_rzQqp1->;xbZ;ig1M-|lh|>hJLq)*KQqGX0@`@U*{E>6`&;V*U5^hS zCp&wSV8XTw@c-}FQKy4m7mRi`raB9FYa;^BIvc;aF3>e)AvxXIm=V}G6M?&&jnKMa z&OxsW-1iZQbph*ikFyuLj-PWd>w`to10F37byl=UV#4*vOdK{sciAIZ@ezVc11SguE3^WuXS9tXEt z;D;DTG0D*dyZ@5aLY}kRhpgO_iECw!jdwLZxTgO7HH21fgUHG~S<&teXLn!}7k*q( zpq0O|vN+1scOY50e-n0j4&j9tZ2gz5EGi#`MCq@iWPP%RR~83aIfPdh@s&d;e|TjP zUperMCi~%)#R#ZvV~;BS|GAZg`vk%Yf`J9taWO-<%a=+kiyzQXTn%bvK`FkPDBbUh z8CU9DP4M)`>75x|DStBxKvERYGTmEuef)j zPO4>S&BA3GQuQI@>zDm&to09T%xRAryQ_Aq6E!@^pvH+40TQ^nFs2W7)Ob>`@NN`J z=u$C-Y8=0QW{rP#{i;<`Xw@>pt#&H+VZBOyh>i>Oj*DdLYNvHu<^FP(*K z?!+OfhXif}Fs48D@HnX#O6XECg=*J7s9oh&x|E4lCc3yD8th`(%6wN^{NuV_D4|Qm z6e_L4+ArKT*K3Kkp+TWqCywc0S6X}ygxls)F@;KtuMXL^{a4eR-<;bdKPqeg+Swrf zjYZH$!5X=dtynqhcmzp)guza{eii0u1v@-L!H%u&-TGLyuCO9+>r&Zy0$-a!;;}<% z{mI`dE%EWiT64B0*4dO)T0!{u*K?_~&ZeYPh2d1SL$=&E4m`rB(*Uw^PgWQY6?%Y2 z8+EeM>e=@QgPom0Brh_;Jz3#M$L+9QxW>SKnla|WnPejuu1#`Pk2IMiSMvzhCOJ8& zCpi^pC%m~OGBPDM_#ex` zU7>Iq8KVzD-yANsiib?Je=Xy>NS3)#q_aR@E*0r&&`Eg33E!_8yrJT$WM~8l7sx_Pb4xJZF>n?YgPO@Ycws@y)V%=p8pdUupo%l5!C^Fx=D3QTJb}TFD21dT~a`EIc z&Sc4Uu8i!8`XeK?+C-*JhNsKOv^(hQl3{4z`;yL9{YW+X#B`l+Wm}V7RToWRHgyvt*T%LbGF`;= zZR8XiOQui!i!3n935A6QMV|I6&b+5RzhUd#Bb!g_fe(lajvsJz5*^|$p4fM$7k4u` za$>voJ;%+OU+SDYj*5$;CY&;D=KOh+yv4;xKWaj|_LeH{wsP?Vs4F<8{O7J&j;!cI zDfoak50?8o<{URJ?(A~Zq@XHOXU#3mrGrlAO)~DaspGf_^Gi!h=1!imm>>II;Eyxz z-Sgk=>UGx4k_n6DiBt&t+~hH^&UJ23tqbCwJV&Cr?f}JA2W)8I+>;G9JLb@oo#k@7 z9y|&jNdNabo*h{{d&c~E6ERxJN#@5Zd<__PW@@9Nf`i#n#Wvh0{+dtM**&I}4lP+Q zta!qV5*tv~y%pTV#z*J@+|cgl5_i!gOds>{$|+|@e339M;srB1FSbJo3%S#?yH7|KcR$lVZDtXC8nR&^> zGV+p#r}xa79l6=h>eeG=SYFETyp*ANDMfiHgY!~`sJYTHnmTvm3^%FJ6H$vZnK?-IXf zR_y`sLz~$>V{lexj~DYc=WWW%Vw%qQS6os&0k2$Zg)0G7^moEn6Xz0_+nskpS*YcpZqyvmMX zE1zr=&R@;{a5y@AiuyG_vGzIee|}ot^lgIIk;>2(q~kGXI7M+x zHz~-3a8!EtJx3zlRYT)QVqm1orrgbDC@u-S7n$o_?_JURW2VWBo6~ z9@G^JV+aR%5cJ+V66qMw7Q{UQIczUF-ScvxqrEEF z1ADI`9OOaJs|I7a3}_4Dwm=TsYXW;Lm-eb+5A1z}aF7Q|-;&wm|+ZzUZ z!Er-Z#_jP}R_0+@+-|`=`-Ln_8{@eDBnIjBbUQddv6GHPdxJ{BMqrvh?S$($Bh+3z zs1vVWEu_Qnoeh<3%a1!aKe2yBx`Xi(TQC3M{KP(tpRAS!l>kFc3TZ3qqu!oh!jX83 zL0Ck)+?S4lG7>)vI86k-faj1xThMz!d~&7uJa5wOU&Y78XT&YyYvQ+JGKM%=?6yGhjJuaY-Pw!4>+|0T(9Dc<}uBK;?l%`YS5 z??{4zr35135fL-FPh7BU}LXL|m;#Q5=&OC-;d zTq>Ejb~620k}sCLQt~yDuao>o$r~g;B-#AOqCE4@2zxIo{!PVill-yd&m?~)*)e92deH;MO( zkBR0_5$U%{Hb07xzn5(O5+UO~w`RYw*pftj+LO30>MV9uJpJ!8evss0lE+D&BzczP zQprmtFPFSl@+0C4;x^Iz8KQnaNjATPkcZ*K#r~Km&JmZ2%SqJlQpuM|UMKlR$$yf3 zpJX~CpxsT9Uy}T)8^j_ep+K@+QeINq$xGKO}!3`E$u%Oa4W2 z6xV{*ev<8%Z2kb*e#u8FzN6&hCFe^XB>5!q6!BE?LUFZtn`nOgP|j15Ul%_VzZN67 z_+$NY#D=2z;e-Bo$>w(t$8!K>>~!Kl4kwXria3Krx&@N|Kw{_nCCD4Z$4R8)Mn9~W zjz;?&hK!F|lXT^u3~7sra@#VI1MS6B|$StQqGP`+P^f zUXllhL&QI268jWEyZ?XC()h+MLN5#0quGQ9Ip7lzjU$WX=31KdcNev z;u+%E;^iX!VX%I7T?5`E`A+d}@j>wsakFUGImowF@@wLU;-}&s@f-0c(dYF7^3(4K zSw*ZV+Vu|f^eM#n)*}6eP!9Z1+w~4)`Zu9|fH*`PC7vkSbq~_bk-S(uO*~t)>mj6D zA^CFgTJbvZHt|mJ5z(%fkpCIUFNm*+Z;9`TABww0xbU;~d@uea(rpsk3GWNWI%0j% z{81y^LUKE?lX$FX{;3h}D|vu;qG zLGclBv-pfi&rfXc$KvPWSK>bL7t#DrBV3c$O<;Yop-9(J)E_VQ7W;`s;t3*sOELY) z;yls(O+&v_@>!z!nTFo{OoQfU8Zp!kTmS$sx(OWY>X4;b46x3NY#0;8NP(i0fvIwDg&O0}6wAcRL^@St{H@|& z#D_$>S!4W*;ydDYk&f3G|Fy{P?kJ~-^uWgTdR?)R*i39Awik~Pj~Dxh{l($pD3Q+G zX#W(kR9qx370(hc5HAtw{Ehi<5N{Xn5;uyQ#OK79#Mi~Yi*y!8d!LKnia&@^tj!o7 z6X`vUa(%I>*g~ZHIL03<_7eMwbSKC76U7p7nm9+CFP<%)FRlpWYmv_Vn7@bER~#UY5J!u2{>SvEi1Wq8;u+%E;>F?$@oMo} z@lNq>@j>wsakKc0xK(^j+$O#!ek$%3>5P!|_3;G;nI={dYl?NmhGJ8(wb)MVF7^@! zh8z3QEyQ+WC-GRZyVzG8APyHtiN#`xNav5VzgRp&JX^e2 zTp?a9UMt=t-X_v{B<(#SZWf;rw~DWc+r;-oI-6wvU&K`Wu1+~atS;6PTZpa2PU6ub zomDdb3F0_$qIj}6OI#@aL8Nm_=D%9JPP|FHQ@mSzLVQYmNqj}5b4=RXBYrRbBqmpP z@oD0r;$h<9;t?X9Ytmj{afmovJW(tb=ZOo&rQ%s4opaLOb>eN}o#LOx2gT>am&7;3 zw?#Vlq`mJ&zlM{O#VTSo@i4Km*g@!GZ_P}XE!Gg5i7mx^ zv5z=ioGH>hD(##pmWh{%*NE%I4dQ*`>(D2 z!^Dx|baAG5o_LXXmw1mz2d}jMr1+}%rnp`FK>SktR*c~X0_M*Yn~5z&dW>cKabkaQ zusB|vB+eBVi06qHi8qV4i*!Lt`+pOk7q^ISitmU!#d4817%+cSDb5uy63fJU#J`Aiip%`ZitmWq#UI3<#oW3seG`#hbeaDsu|O;ohl(Ray4hv= zW#T2`N^!NgR-_+Zrhi&|UHrR9$GnU$7k?DJL!CY*W{ULO%k-Vae6f#6SH6rND^3?@ ziuCQv_%p>a@iOrmalJ_AzfAwE_@?-d_<{I|NVmZJT`WheD>e|Di7mzUVrTIbF z4ira-qeVI$W_dHk`Ql=6nYdiMP`p&ULR>AT#EpjNF`OVwH>wgtCFaQXj!Grx21 zO~9pZm-pZI!};XoJI^!EGc#w-oH@(fbH>znm_#|a@Oc0pKO5pPm5Imgu%YpT9Zo~W z-kaCTJlDp4o5tr_UOdjxCViy0l=hHol+GT>pOUceKTy+Dh3)cv^I8qb%gwcx-#@R_ zHr!KS2@W#oi7unHlX36epVchuUAVmBi3+zSGIP|97O!XY8n7e3SErrh_f$^ke!@i; z{pup$tczzl;rx3}YYd!FaXdU0wcLUKGg4tQx7a_c0%xF5g9*j^{Fm}5~?Istbu z{=59tOlu6hG+%sf0_PhwF}{vRBN}skOyCHiFPO>*^Q)rX6B*%4T+fI=@KQuzc9F{| zg@Qk4UZKRvKx}pq{My~|FM!H#zBBLVkAVE0$1<5f;vMvGLuOzt6nM=f8YncW1+GTg zK{v3%{TQ|h`(f!Myp5=32^{CUFrg>H7bNhvN=p;&f$jMT{Mzt&PU3A40#~{m9ZuYf zXv|Eq72#0eYx92<{wHx}lC>~T=C|B2GYOTLnI!phiY1{-jOa_|$RlPZv7$fu4T^I^ z$uRPD4J02&<9VSBBZiVm%uHgFN==?galXX#rQGf5)O0i2nnHPoR1i<090 z3dy_qW_uCoZ0A2LZU*$J#g03IKLFbVO`7=v{Yd8Io}A7yyQ5gfkqD);%x;8Y2%#38 z8GAhIki(iz2Aw)1lv$6!H-0Az4=aW+IuLahuaWh?7Um;5hS9 z@of9Caa02Kq*?7}1P0h}fMjpN&jOHBr6*67o}4W`St31YdPC=e0C}PGmsVb}WyNxrTPuP^q?K1x zS+T5_S}TI(rIlB1S+U?ZTPtF-tjO(HWra|5>4FeGQbhE@iZuOXY%BZ>MzF$)&{p`H zZiSy)QD&_OZH2$-R`|IU%dHimt?)P93O~2vMr%c|^eh*-9jo06bd|A%MdlY3NtPF_ zhOlML-QblKYL=7DgVtU%f!b>$RC{HHn&q{H%-!G>5^5HZrJ*&s9V^uMZ(bIdmdlz z8ad9NHh0(&x&AUEkM8cDK91rv8-4b;qx&4=&$mJ;g#P{_Bj88ot{Z!o6a|TYF|zsZ z-J85{`G5Dl(*xe_tg4<>eRh>IV#0|tP8>0D%#7l(r;eU+;@DycqsBN*-X*o~{6=5k zG_Qo(H#Q4q&8c2g=`it<^3qX@O6SfPlsj~=6aO~xfp32vkQXB3PW zTR3ULXeaK?YP~obwHq;@K562N(Gw<&pWsAapNe-dSfqCN3$)S zG-}l7;$nR0&U*{}KmAs@*(7d_325iVzgNz!Jg_C6bo`{k5jYVYKWfyla8DkT6BjKi zuL{pyR2jzBg-0)#U0PC7S`sd*Tr{V&s%lYXRj=@%ena~W3=hc78AhHGk2<@PNFd1`IjsG+b1oe~N#1mnU&= z;aO-zdLVy=J2lz7$~q!tf)|K*fkH2US6}(M>xh&>gTZkAH^1|W?Tx+I+VqujwH)(8 zYf0(sv**p2zi{p%yfJISvu4jmO~k*@TE1vbyf_QhHLnz})iMj~bD*Yt{=!l(MZA~m z^qYguzm!K`%xiAttOYQ_{^&QWy1H^czJY*b|A7UMd~oq#?|tdU3zzuCUP<8A2TIy` z7e3AH7{}#stRbx5XO|0`=K027m3Y@KePD-28PTN#&$8)@N3G`MM?2i<4d60U(332i1Z9;miSC)^Dj=b%?8)2r$eaeNm z)lW97KgK_dHQw%36pD54EsW#(8`0B`!EXe32k9-$m&;RFZhNy4=auhOgi)Ld zz$_b)-Vjd!nI{(vg+|*vW&Wn&eFn66c4S<2IkzLTnNa3H@8!#SXW8Pa!3m+APJ_-{ zy!1TTW4!)f@s26)CSps#ISj(RQH58VR>5~l9A&swbZXa7}Z22MYkTQSPk6l<} zvBhs{Fka4z2?+V|24xqJb;Q1g?~EP|dJEGn^aRl4^KDlR_^w>+MbU$v91ggKLsIeA z&88lGEgk0pc*G(nSzS!nSxES)$7=L@#oy76cNBTVRSaGyC zPMjj1E|!YrVwHH2c&WHrUj}=c8r;BHb=ZPyt^L_~YH%m76zCpZ~Nf~^ML_f4sd{uUwu9^A%Mf#5=oA*Cp z@8ZB_d3TNo{w0ap{5KTLT{S%U(6JHeH5czbU<@mn$l=xhmb{xtev&A;z zVPaR2&$emjy`MBx@-d=m*NFGtQ}W(VGVen}@4cTiNA_omi^TIp@BO4pBzx~Ct(JVP zxKZ3B-YISoe<7OptC7F=KGI9la~Oi#^S1aW@k5b=9*qA?H1AhK=82g4kjP;j%GqKY zk<-Id-&OS9PwFRmusBQ{A&wSL6utMAOn)D;=OL!cg$#&KYQMLnj84SsKl%?EpmDsg zS-yANFE{rnYx(`-ewXp$4Ue4I2l0Elv2nj{(Q&^aJ5n+3*9+r*IXe$CV}2LUbfP18 z9P!IEBYsIc-L5&~I8wJfE)RQ%>t+v`N?eZef+9L_|0&oG+AzjMz7 zg542;(K>TnhJvQKg%WFE7#rrRg5eA{jrw3GMG}I`Kf_@1e(tpJ|ez zfH@)q0n-3Nfh90BBYx}<6I@76!UWhaOZYYZUzkt_^#uucA-pu<0mPo4kclux{P?08 zM*LoZL*k<_3S8&bBOJoVqWJ$-gp)D?jfoo|CMUxuurHBHj`;Cq!@&MTb57{$OWr{7 zONsvEPbhwsXwK9a@w=Oef1TI^@O2F(FQ@p8l1fc}ouU)6DW^M$t5_^I#O^v2VBRS% zyB>Fh%MIkR)xvSvb#aJqDZ2g5|Lh3>Dc3f(5b>43*djf+e#N44r2q2o}voFm#oTAXqjVfk1RQ79kAY5iAG? z+`Iy5D2*kWZmkGrPAjhvvSKMJtrfwN(8?>3tXQN=trfvy(aI~Hte}l9>`E~#NA$o7 zYd_f!tF`ts$ct215d~OjMV^FJRt%ns6;_0{!ryc&{M?EPYei@){7tvQ&#hQtt%$3z zGDnh?tQ--FF1F~o8@!^UJ@iAQEo<%uudGnBoJCkU?nZLAL+$N-s=YEp?d^N2y+T6m z?Rl!bQbCQR%+dk>eI^vJ3jAlma{{jONcqW}sUC4}YWfpBXDe&0q(8?}*`nV`%^Upx{BD zeQ{4k2gH8RXkly^uE`+c4;cZ71^x;Njo%t zXRa~+nen^$3ls11r4Le#f9ju$ht;{zaU6&?T=9tGfbqNcpgY}O2_eJ_ExU{d;?tXn z^qxT^(@VhWrNQVc)J@>sI%yxg>hVeBTDULr2nw-yP~-5&4#mA zzUJe1eD`^Xmv~%WnFz-f+t~oS_YY#nGR9SxQ-RE8LYV`-moN7Z>n=XM9WCvcGSp^a zItN?g_5ZH%yS34bSxd3yziIq#D~f%v@w=kf=6uKaojpH)$M_vj4hOwP#p$`p7#{1A zV|eRH^hF!RO(LH!QomVbAN8*o!yCnP&_=nv7OLF5(kT;#fjn^u~NK9TqSN4%{N_@fjm&zUc*9|t$>%vcHHvn2N-As33+oF>oWQzd7J>~TdyC|si-*SY z?Ed_BjpgxyG~3Jjq8Vd`yjQYmpOC+j{NFy7$0zRGUh{2a@cX_o_?+xt6kip+F}-&r zzb~3^CA0n{e<6M)25@p_{@$2ghGb4%N_~6L8`C>na&OV}O@hGB!TxfC8xp`iIGM=0^fkYZzVHFV;;V;Y;|IIn#L&;Lhi`%E)QC7SPo zx}jc7F%+1JC|@A(9^*m*4lTyU<~V%kB+P)tvILIiUzo5BiVG6>%M)*GZV1B7#^!iZ z4b;200^ZnMJ;E59>k~3#bNod^pkIhej?M8034#84h0d3}nPRR)e=@IM19_n^w0s-y zH6}hFp73jF`su-tdPSI3jkfAP2+ zYWvW*oOe-ydm*zNj{kVv5FJyn_xLuB|2?~0h53Af3+>`BO1w)KUiNd0!dv>_88v-5 zzC#JAUZ6T(|c284uI@SB%RI zic9bN#^u7efb^DIXzuzKAkNb(``>t`h7vc0n#^u)iz;U@$JPYTuXm4RXb9oAD zeEACFw$~dUV|km8%atI#AxuDvx4q5B*@8z3;Fw2HV zGSOvw%R}RGe!NL`7;1#|V;9y~Z23ptt7BjDPmIf%6Y+PA%jtSF{@VyMaCyn|^Zys) za-*^R948tlP7$Yz^Ti5rv3O`)&eq$ZaXHij#viU>y8t(dw~L3y^~z9sLE7q-PGUjos+5Kk{Go``ZFEk(b6r8wntKX*MSQhA3c3_L-{@>T zx~z6zmoL|2?ak09T-Wc*Zv6ee>@WSE=8F_B^vSw?*`KW4*Y%6z8w2&PBYb+};8nf$ z`}dFCpZ!JDzH$8SwqwWdP8vIQcl%NKje(^w zV^L19&et%~Ke@5Xw#kiMS0&U>ZX8haa!#-|Q0LZ<&Z!-Fe?hRp4ft;y`MW^9zacq& zVA&Cc-8vAUl53O+m zy_0Jb)?D;@>iV=BGX_m;%oskgF|@RHUz@!X8&msCYz(BX*_ZLz>V4fmi!^3TXL#qn z?t3GRsU2S4*XEO#_GNsGQb7)NKnXu_kBu}2h6na$1b(-(#nwkY*mJe>*#B1h8jG6h z^$)Z!w5>1D#!UMfh4$6;Anj`u+E>^A()Kk5?W^avwlD5Q?!iLTTAya^Yb@GVum837 zg;JUJg%TdLeO26d@sdD++dHiwR4}`&^JTZJ4DR^m?_YoO?h?0ma7V=>UigchJqtQt z_Rh*%${zWkA|KkvoX1Y@gma4N5(DmUaF6ElqL@Dj%Qec_KaBCe21Ea2i1T}6{7+Jo ziTh2z_x|lW@bJIJf8P7Ir*Ndck^he4k4!P#zl_3m+Kjl^XcB)74MzTdg0%7R-3Fu@ z8~Nu<+Ws$K7qD;Tat7;weJeMILGxCwp99~4KKwm_-$!j<^P{Uk;!I}XhR%ZyzW{ih z2n2W|3uzk=?8|@Gxpxy`{;PMN1`-0iolOWljBsK`urcv^h@p${FSsv}N{sD?+R%P~ zB7Y0u>*@>nP!Yi|CHh1BzHsoX#2f%)`=O6${B>d{BZfkpI6L@_l1dHT#aJg~Q%-k+ zn;7key1_bWAk%*^=)MH{`JsX2MHP9}P=W9OFPwrO%Q?P>jowK*iyM27-1wHUb-O3d z&4#Vpy>cs}+dFa_6Loth&dr9c+k0|zxm~v>*g`Igy4{`-E2Iruw>ym9N$QR|^L;G0 z`=f3j$GO?Cb^BCq<|l?(a^vrd?6zgax!JIFYbiH#M>tY$-LRq7ZDgFA4O_Q}+)%5I zZ?~#sTGVZKT$R|cb^AzF@(0#rJLSd+*llj@;&QWL>()WJoy(dWCpXSZYTd@gx!JIF zE0mj=*?70y_^i#k?T&M^VHHwtomt4Oa^tM))@^H?n+;pHd#qckdnYR0y%t4{J%e=r zil-K7J)m)~W2+yEP#O;z_j)#hITUZ9+giq6Op!-{yN#=C7b~vhKtG8L-IqVp~2BO%*iqqQ|jV-RDng>P4Gu zFV=Wn8uOw@gkCSNXzI0&US6#6`dQ429%JbB%7ab4Xp`;58n12Ei#;Jd3hDLQC-BN@ zgo?3QA0hBE9X*4V0o2j^){%W7or>uAMjzVuhw2Lkx+0Jof}>~9@@Qx{E4%81PJ9>M z{lje7$JOKjdU>&?oCPs2dYnqHU2B_q(I(rAHD0I0yy!8LUhloo)T^9cUaaw|iFwhZ zgkFCNKp9s;+GKmN#;ewPu_ozJMz0T!fzs3@V@*xoia@q!U}}=nf~rEw5GbePU(TUD zn-*hD>)MV$wr5~+`~x&_6Ywre)~ALKhVvKHf|rs-0I-6k#4Qr zUpI9N;sl@VMH{!aJmov4kaXFE)oty5)zpnf*XEwdKS8;(1Ce!o>P| zp4^}GT8PzM?IxzefyY%E13a!eBarP`nEiPqG$<|eq}Mt0tanGyfq713fO(eD)3Y#n zF14OKKInBGR`(|Nd^)fbV6^E3uBNAFVOrnKF;9Bc(DP>ZKF`wxcygj$wr62He`7s) z>9zs}=9GGy%gIf%IK%w!8Q`a#sLA#$TAlcR(Y|oOMpV=6NmyJgTpxr)OdEJ>1tHqqU~BH_(%u~xF_i;*5(_W8ffbDfIJv|H4X3vdz(kq{y`Myg$&nrF8JL&0J z z$5XzAx%4&h^C+8JmwqOmlYMr?y~~k-R5&$I!p)17^0Oe}?!`*CP{QqtmCnT2Zb#m~ z3^tCO6S5<3V66Cw5pf4&#WpSR#WZsZW96Zg%{`2j?}prwH!(v@nf4nIiCM7+ego2x zw=q`SXhht{SaAz#hsGsC#k zW(7D)Xx!D+D3~<8shI+e+~{I%YGwzzp@!q!Xw>ws=8Tw|ci-a94NPn5b^+bIXmi}I zj=4pU+Ze3wyug~KZZv9oU$e=&@o=Y0A>GahY=@gU+!<{S_g~P{voKxEv(}RbF1?EA zxgd~$CSVTSx9G_OcMm;13v=L_7jbNT(rYq3D+9;CGp=G<;}d&LZ*7i%M)gUTQ|VR} zsBY>;qo(&Z$Hd&|GLvqL19vucE25hhZR)cm=0=wix-AL3)6|Vd*Ez+`%|%VxCcvbWOHvoLu+VLiDgD&SR3 z&lQ1H^yG!uJM`q9_>7*Oh1nCKcCd9?@qy101k4T2m4RpJ$*!h7qO;yapdSLUJDg9T znP5GgK-?Y9Re=DG)2vR=mC`c{fhF{e-r^hq&3fzE_ z+lw}C8Thpma^s$$%k5a*&4G64UCf?fwAm9~5omgg!?_^g$r}}VZKmhl0e&Uk+^8_x z+^CGDr)ObqRHj=`-W<_uD?NW6xQd>->J-PSqh1Uc0d@Aq^ zJ-PR9rziLRL-h14T5|9I!FqD<)63lAJRR`iNH=@`V|sG$2Rp#ivuMe^-wPVGxa|n+ z!0P@XFr1#ub2y?+p5y81S(rTMT2JOluUF{##{lOE+ z!s>PoZlxzLY3`>dFKM2oXNfG#G5NOjGWhjz-ZGCRME4^EzYGe&+}ku zZgGwbuJt_Ed7iXudW-Wj>)GTMXISthdh+6J8$Ef8^D;eGAZ?zD&E?zs){||Bx+}4| z#|2YyWSITQXtO`Rpr>bH_GfA*Q$yUJ^fI?NBZHi~)$Gs15N-D700d&UIBY|sjc4>0 z2YbVDX9PK`tJy14>B+sa7=bp7HGSRX#>-sxc{ea_N$`Gp@v@K6=ECm=1Y);1yzsl* zdh*iGyMb}%1^3XCmw!*vlNW%m(bKaqH%ATDleOdBz_@1ykKp0K*3M{CJ73e&voN)j z$sgq5%kJ1*?*_2=oA{cATwo7x$IKVB`2TRjioEL(*JT!QI z?u}^EUdJKO^cLr|n5TCGa;9h+Oe3Vm&%W7Y z?#=kgHc`}cc!e;rr)Jk|KG|kRH_uGnIW^@JlVfJk$;(Q=S9 zt>T=_ETXNcnBY!IKq^MjCIteXPZ$q8!)$93L!e!}D|T0OD}sloHra{}nj;h&%R+S2 zR!Hm=s|v;*rfSkQhF30kQRX}|i)iP|m%ENHdG$!--USg3BhVLLWAODaOHb27nbzq5MNvS=g%xh8%Bk&GSUI;Rs#DH3mq6AGe>37h9Mq7f@Mf!v1` z76hNTAg>3OF_3^2p9&^ah6kc$;E_^o{H7AiO|W<~V2g7KuWWc`cAaU2IT1S(?m+Na zqdl2VtjzNq2S=e@js;kDpL4b$YXk)&c9`JwnegRx4J}Ask-&oBiH=)DnrC@c$~Tu5-%6 zz@sKu{0i`@4YJvqCqT{wwy6iOB3riL?Isv)y695O+jBZ*SzL3>GO*8>a*vs%nP~=; z#*_g({XqsN6MQJ-I+KY(CU`2r^nA|hi6lQ8?>eUv?M$$k;E@Z9!q^cU&6znc5q>7x zOAJ{sfu2~YCdXh!iSAv-Kp|FaGQnMM^hm-ilcAi670Rv482CM{u$RwsI&5J0Z6jA1 z*>n2#&3q3g*dAgxR=;!JvJDJyTeY3>#oPn6$(eyqjZHD3Vs2fQit^gSe=>2BDgHUj zHZWihCm!-WXM9Y>lLOO3<0XZtj%0%H3=#*B*J%BGV(+Y;_S$Z7GYqQic&Y$;3{I z#YTINBM@t|IhnCG<%ymzlj?&Ny+sAdZnRki@R2#9t4VGvP80Fo++sv8A#F`hiI1LO zqnDC4I$CZv%L=UQpS@)m0z5Ui&U8;jkv`2-))QBJT6i)UgEg-76j|10s%DAt^me(i ziuPhuHFKn@nIpxm#xYt}sw%Lu*Y_6gMH`v)-~1flXNBJSpCOpsHD7w79pa6;)e}ijBl9oAKWsveD*2RWnDbnmJP3fi><> zq0>QB4;!muf*Th-?IUa!mfIE~S`kz=ONpxQONsG1*&<|??fBnp`>5K5Ro4v&nT7dT z%jwdXA~bWR)h?{foL_95LNFFt$q>?08ub*A}U2?i$m@TzUO< zo^dsos=E;6rK-2YU!EPPtMF9u*NmR-93<7OP|WC7o0(@tmCZCade*6dju%b1-0;j+ zK)lSTqP;m)&C;g@uZ!aPe5#l}E`7bUm~@>{MU$thnIl!r9BH9TE-$T(P;J7B9EojM zc_r&DjK0G}N3){Y4x@^0301qW##cPOo;7AsPpX=EQq|n^F6izzp3w^fs%RE>pt0tx zD%yQf)yy$w6>ZS8(8Z>=m5)Q!tgKYoFNL4dOT5QJ}*Btmr?K{ro zjQ)x*3LU^WEqb&S) z6o=8@Q5WbG!dLrRnIURb&ap)OGv_~<|a(bGh$3BYLgYcne9Oz>XJ>x(lF;78wJHW@^ z-V#Az4A!_SK8npARZvxAtfJSLg%F$FxKq{4k*a2n6t`lHyU?Yo0_&k?9Hw5P7gtLl z))>{dKbhc(;bUVHy-A=-mm3I~g{m5?cvMXs^l1qr4n5;QC1ByD$quY>jg+c~jq1=d z4pc)4&Mo%gMeIRE8FaiIJ@ky@fJYUFo^hbf9D2sVVA^OfK@O81h%TuJ;WCt<3C8j~%LBjTo?#45Cfb-_ z5fL`QNkmr@EFx@TlZc^KORxk?_vGl~+CI>*y!OeA37D}nhB$`CgB!=omf1!xc}INbIQ*y zDRt%yn_g0S&h(O5=alxHUsBq4P`^R_2J{^~2%nCgUOK0IennO3bbR-(@4Pv4`VJau zf(sWdEbUu5Yxex<^KBy27tESdhGPCp68le8NCaEl|M=2{rIoX)OG|96%!u&UHO;?K zY$r0quAQ@>YJSxW)C8s*MjJa|a$D$O|k|(jn>OC*R%fUY%iC6$e=l&!0u0Rb^~dAtUqb)aWgO{^MJhGT}u{B&duvEV6eY>+{hk?_4|{@nX>u) zw}+U4-xkX6FJk5RCz#y*{y!~diT#~r`)r66==VSBS|4n<44*&SYR(%+gYL556bdW; z?Zsi~ZdMvcDO;1D|7}x+et#^*zuOeK;r=f2eKg7DAG5mR9GlF=%PhZgti{F4Y`R}s zIoA|>`LeLTf_6UtxyudKxit6r8!j|FqKWd)R*80HeXQ*IA9QWqx&EsY$7wfx$_55+ z*MDUqs{pT{*%lOwSdqwNT>nwtZhtQ7^D{+#;CSgZF80!UJ<+p&c!^EmESA;vw;1PN z?+@eKJ?J2H1l$$+o+Dtd&-nfWN5JD~({{t&_jv`mHL80jV2e~>aruRw$$J+xIRI|( zSpyvayL7-5dFET9DgHE?qAGCXQsdg}0Jyrj*@JOr|4{qCR&CjI1I^oiuw)}qo%@?qcet*;EzuNVh|K1C|=6|)4_&^Qb9&i2~Dn&HK?KZ_G&HpcE z@5N=iOWFP>TmLV;)_=U+L4(vh%%*$I-cwfE-5zc7r+JO3y&}B!{@^k%=5zHau786$ zrd@x9ZSNW5{41Na_nnU0`LNE1bvwRio`1=>!N;B08$YPxl<~!5iYJZC8|+k;R$-ER z%|AYW?%e8v@>%m7JEKEIapfGC;3S0U9q2M55`m1+iIa*W;K{`!rkZmNPT7^E=ipLe zR=JtwIyxo7KXygZ|KR7pCUZ$FI=gy+6F*zPj2WEd+swpZgJ#BiJ3BfeoQn7l2YZu} zn{5~o!5M$LxdfW-T>?#yUII;zUII=3wo9Pta~GSqf+^D{%qp2xIiq;M@r5&r&MvPi zEtwHnR8di0S~;V9{_N?+m;fB{C8icxX{hMJ(uGb%@%&u=%j3TR{5Q~v&KqGi(){CQ zpteU8Pj!}*oXb?a?fAbtw?qZ!BtdIqlc=0kGJnaS8MDu>t}d;dTYj!-V@>B9Su*F` zIZoC5c?(NR!e&AVuT8{iG3vnTjJBBrw5Iu}ec0B0K=$(&vaQ<*-O(QN%%NZoC)@0r zq`74FxwFmQGY3y>vI~~tAno0O-V~vE-28>!d=;3ycFC-BXW65mNnRz3&YoRfirjFl zqOov_+a^=H%$VU-i#?{e73P395hmM;>Poi8$~jDh$2opTa{Q=K!@@n;)+R1mR9+RH zyQngZDL%rZ7tAg#DM5`FRW6!?TZl!KRlUN4`VH+jFgzePZ%|%d-q3K*%F^;u+)VTe zPlHSUQn~aUG-GIA+!rjIQx-b~{1r+0mxS^!P0asMLjGmJ{FQ(5yxA`S-dN8T;3c8M=h$XE?v_1#6eC% zTH=XGzT||gKudgir;R@cU&LwWw)c1Pb#a}3Rp&0Ko;4e+uCy%kLU6Bk`jyP8p5^qL zT~+1uqoUup9tz(P9p6;Vv>VZs=AaMqjx5fH{9ivQ2VP|3U9kC)1kj|-P}aS*B-(`X z8xi(=5Omgb^=>dJ#p3RX3sZl6cl@HY3qyAC(zpv^e7>(Q##aSk$9(b9Q#9XSA?*1e z=(HGvZDBx*7xxI{`1GEsbDS`AOpjl)@wVd?ggqYwo#T)m?!lvr7qIlBo&@91atBHEp!X;aw76S z$hjwcxB$VQ<3qKv=1A5M$>YF>>P2_v_^=`D|EbRt`AP)kQDTvZ!_DYti}S>4@m%pz z@yFsd;?3f1BKue7!~TwZMtoV^CH`6btN5AtrO3y}^iLD}iN}bA;xzFL(R@@EejJaZ z|5|aA_=5PR$VV`=%Mv-DKzXcKCDw>{h`$j3DE?LCr<&>CT^uh?7cUiS#YaTWlSIEy zMHh!I<=)~@F`vX?8xhBlIDt%1{B+5)B%dj{Lh^Z%mq}hJ`8x3yajW=<_?-AV@z3H% zB+B`@DWbl8E%N-7Uqo zB=YMh_K-eL@{!^=>Bmbh7N<);Px6^!jr5mDUMa4T{szf6iT6wYkmSe2XQb!HaaqpS z#E+!kEBQ0=Yw444ZAAMtu>*1)Nc(ytePBK=m$_li$S z|GfB;^skD4kbbx1zlvW=pNN|kZf7cq?avU~O5aU#Pw^<}M~DT|j}wcfKV9-{u~Pc; z#Tw~Xh(DHot>pFMX6f$}AC&%4@oDM#O<0!yRgs^D<#zo|{8aiz(Zz+5*=~~CErzA< zCH9kkfOxd@1(L^!r%FFZF0|JrLPpvm;O@8my31M-y+^F{bun#>9x2lUQ3x zZYR0BDS4RW(UObBS>ht`0`W?*Uc5uxLSlVT@?(;pmHa#L1M%--LY6IeOR5pl7~nhDfxKG6C_WOJX`WS$(529OI|MdN0Qe_zFzXpl5dlIkK~6))c0fJZ>4`j z^4sE{rT9i6%N#9FyUvZT5VrkssgX_WWJs0|>Um6cYLtVt46}klarkBK=6o1>$t+ zXGty<7fOGwDNkLFaAXOt&;B*pOyYa$uEn)m;TR^8$^C4nA;V=0~0cd#P+3$ zt)=fQxx09z^v8;$q(5FPl75=x8R8=8mxvcgf01~(^w&yWC;n9Wd&FNz|B(2k^e;+& zS$tRekHo#we^!zF_%m1PHh4el=E8}(~l88?cTS|YJ4%FWq#rGw zB>gFpPZRmoXXbN`c)s+@#LJ|wm3+N;oAg`7`=tM+__*}XOWrB|QTpBD-=zOU{8IWv z46>N*7Tc33C%+<1_L9D@I9U1-l1Gb^q(5DpBmF$FLi+P1FB7kpeyw>E9IJlm2g#KN0yoXKq)jm`P&4w-Wix)NHrpz9PTOOnrfPg7o9XsnXAp zJWu3Dl<8L^ULyTUagFr+WHQTflX$oE4~maT&+jMGZoBlaNq$pokp5Hg3+cZS6Y!v% z<;f(u-C}p?`SoPR50rk0m@oYalE;&{)|w%GnYcjub0l9xBA-jdYo)(YyhZxk#I4dl zB>6G%Md@D`-;(~1;%@0bll+C4gn?9UPnOt*M0wha-K6g?d7wB-dd>+?|C6PkB%Ut) ze8~&M3#7kPyh8e`#kJDkBKbD)7t(JNpOXGJ;!D!MCHaryUg`IV-$?K8V7D`sMEToD zZZGzhevmj+`eVcb=}(qCNi3Cqp;#sTVzEa0DD84MdA-*mCS!@tL7C#p`gC6TEMa&Xgiyg(zqIrFq_luGTibKR>#gXDz@kDXD zI8)>+am>G5tP&TC7mDUpI@nz<`6`h!3(|j`c#~+R2!(#LSv4d#RX!uxJ2aCh_t^#tQD^pZxnA9&G;Sc?~;6<_)GCu;#1;wafkT2 z_Bwnx~%AGm_b2SmbBVsUIi~5&7wJ>I+29;7FOX%aSExnOG$*7MF`= zoDudvmb_YAE3OxB6Ymu77atU#7k7$gW?7{Bd&%#L{IodB_gC>_@eA=QF~IRb*o8z+ zLP?nuuaI5D9%6rSpg2-25Kk0O7EcvV7fZ$Yq8SH8KGl-X7tMGm^goh(g}6pEz9#-bd{;E%sqo(;`R}3`SB0KaaWef35g$x8a!0Y3 z*jMCiowOe<7K%lp8Fxi^n&jD{8Gl81k>o1TjK3m$q2x=&%SAH|i}3Z5ZxnA9?-aL) zW;_<*2PHotJ}q*BQI`J=@g4Df@vq{?B4;3_y*ECaD%pID8~V1Ay>Z$el8+DvibKR> z#gSt3@!Hd+pDoT87l`MG=ZVe7Z?BPlt=N1V_a5o*7dcBRx9>ON4)GO{)21^1&*I-i zP8&)+ucgQYFG`hO*Ij#J7RB4;?I+*Rakrj!SZ-uUe}$(*H>@u!KL zk(9C-zXfX~uMjzxDC5oeEqJTsJ48+y%J@e_&KyeFjN5{oH(O<2#C+v6FJH$cZ~Cj}kdAC*{dvsW@L;A}$p<8z=3r z7C9*=<(oxL$w~P>(TvAJenv8<;$-}r;ydE|A}8i#{5K+J;-s76i1vwQbDsFH%0vQk~s?|?e7pd87AdNL^ECrd8cH~eaZOuL{5Q8`R}3`Cxx7%@k35@$@oqp zr@5q@C-P+i$`O&%TT-4P&K1uPIh!TpFAzDYCFNBjr?jMO#z#TUVM+OZkyBYx{*B0q zEGhq9d9}Dv+$7#9ZV`VWJ|uFkOZvYkz9w=qOzJrWCiz$Kb8(-@$u1dh z#z{eMd^9Zm;bL!bpg2S{>~CM`-*vDz8Db;#Ujy+>tg$-NjBrVkmpKXD4KCz z=+BjWfq03yQd}ioBXXiq)~^}w1-D54x%i;?sQ7E~S#hUm#)IMid&#>*Gad|mgXB-d zzl&dsK8>FyiD_a>F-HuGoRX8}?jz=kL&T%Skz#>(qIj}6Rh%wzs#T`DNL(zQFD@4^ z6|WLGX(#>Gi8qKp5q~Of70tLa>>rlAP2}9JOy^~Bm-wF8e7rfJ@!62b*TYoPC!0-X}gRZWEstpA%ma zUlrdH|0sSSek7W4YNY>-G&hTe=@gCnIME1oD$6sL;b z`1KsgXNqP#8|j=Q`8?4Z&%Q+RkHyvEMsbt4S==f%AK!jL`lrPm;w$2t;vd94;-}(Q zqO0-YG%-`;oWHEEUSh5|NaUQLj6Y5+5XXtd;uP_8akhAdxKM099==@qOU0|jTG1OH zzftmS;+^7y;-liP#b?Er#8<`U0%qPz1T(UA#zq^+8-^B z6br-?#goNT#nVMIo(})BBrg${ikwxM>0d2gC)SCaWts6m6Ymut5IO5I7GD!N z3p3-*_&WHp<~L0|LtH3wl4ZtUBy#p- z%GZjV9GUX%BIih^{E+yp_=3nOks1F-agX?^XvWbIpQv$VPJvAOb|U9Crrb|7m}thyArFu|R6IuHoWr!AEOL@z%JW6eHB6Z^fsz-CKN30f zF!dWnPBKjS=i(FM(<0{%X8ao>rwOL~7m@S-Qg$^y%;|k8w-hn8>+& zDW52ECSS@kMNZvIxk}^=zLd>4ILP^XDX$YbVK3#)BIoU;{FwM_@mZ0x_%i-ok<<24 z{#@kjy_A#046&uixqKPlSLEcql=DT-;Y+z#wbflK>F@f*?K#p;vAbdi(f(!QJ6TkJ0m7Ke!=#L;4*SR_sn zr-`%0xgv(893P$~<8h984us1Rv;EjzrW}CLV;IyB!ykrtT-(GR-EGVd_18^uuIvVh zM@c_i%qOwE5pl53rh62gNpU~)aXaSl9^aG?afOnLNZ75Ad>IM*{)2`N4aY5c zgY)u^96TgL{b1nY?UtVS)XACKAKqIz6$*mi0qS zILK{637z&RRo@TyjK67Xr-Bx%SB6px4qN>jC$XT@s!-&bg4EiaHKTG88VY=&Jb#0m zveQXfo#*=ZhC+#ZL+Qz@_d1UkID11${%ev}Ki`7IH;SO1u?K4vwd_jLh=j?_swf)ckzB_^sxmO@Aq}B+3&i@p-;caw8p^n z-?VG{VUE)?vsGq7-8s(V4XM7d&bEeb9o)5J8$;z|kwfUl5oJ#`bj=Qyz0i=5?rTVO zYW4@`J<*UJc>cqLc`Nq2^NuY@+;GYMz-Xp?Y-E1B3TLd7{2{)MuwiJ~g=O0te7@!T z-O*K%=RXXLzG%PSy?B4Z=;iwpx<1z~`9|Nm;Cgp$Uc|RLXHo!|FTKrq`yg zy*Sjapkr;DdVj+xztj0mC$%7Zb-UWkf=>0VYTaRN*Nor2E&W+1r@sA~*4MPGeZFzb zuGaNA>)YSZYQyiGE(OVv%t%f_dv`2q?%k;gt6Q!MtjVaI*q9qeiffX~LTjGL8CRCM zrgd$0U5om}hG24XLomH|WO_p|HUHzfn(X@YI`{hQ$jb#uNISIaodS1*Z~ZZ4;j%Xy zos2gc9ekE*X<4wrNllJmkGd-}hR%GWF_7_QV_;^W!5>PGgc=f{J$L4N?WE6zSH&sq z;Geq_y}>p6=~oTu?ynm{sZTTn(gQd6Z|oXLSf5;b)&Ahhn*9m$x)xly-#^wn^B*ze))d?JZM%18xm8OV_*5}u0p#A)YYIxJpW;8*HC?0-BS%o>DWJ`GwUC1 zms5~jmwH{Nf>8ZM`yChFE3wDs{i-3!zqD=2y41DqhVi@0gX4G4NzJN%uF)wPzk8wY zu*h4D-FCUxr*C+!F%b6MP+2f6lC-8i(ypK($5-2;er!g5MoC81=w36+W?ue5M#h@R zai1^R(z34Iy6pPoNXs>?>Ouort!Z254y+xSUAye_0b4rMx2dZSt#R6{3H0t*hdsRJ zxX;tJbXxmXh_EeYw};s`E9$2ITPB2 za0E_{{Hh`3PKrF+5C}Yr*7!t2D0x(5R^;8t_J-up_6EQI1;kWFK8YL~d7;5g|4aK& zL!$d;`(N&LlkywG<@t>{)AJiM3iEN)mwiR zxte{#hG?JA(ew!&&?l@xpU^tiC!iN#zwok?QajKM4N0#3#M#RpAr(DB?T&&+3(#^l zqF306J|Ok<#!w-TRvhOY{Fylg<9By!m)zh4L#w7EHapYb5YFD6bCP<5({bESM~{$| z>GcN*t541etVwQrlIam}#Fw*IXlR$zo;^bU0`v}}yjL!`w4c^)f%EHzZkg`-!p6|_#~Z>~;j)sl(CWtb1La#zo$3cgg<5m4Wr48+>cnZ+Ahz;2ZsPLy|9TO-5Z{eQUIUgn6r=4XsS5 zOT7_kr(*Ao4mKnO{2NlQX<3j|=ewb1f1IcyyRBg$s%UPF+9wBQ@HhP5YHEm3fkcl2)@RoMa&?{u1R|sv6 z>k-g9cs;^lrblodtGMstC4mCBcUnQHV0KyO%Whd2-0{udzy9XkC2sHFj*3UT@E1FK z7IePsot3wgJ@P?CKD3WHkD1@hm}`!Jdpj;j+#?`-Z4^!a`P_u9xQ_Dk3*)|yMzYjcaE;WJRD){;DWq8CAqe+a=#{5R{l*_3J z1#dM-d>E+)0zrPa&=*L2m$`n97=J5X`1uc~Tj#M1<}%o48iOy>s_y~@-{ilemf=6V zR}pTg3yTs8OeO++UyKs|J3(Gl2I}318Q#N;H@Yt&oDksUSwi4$gcCCYeL~km3@yaJ zK)(=`zOGKFJs9X8GR5xd3tfTK1Gy6YAzsb~@liyoV!9JNjnPMjy1_chy$^zW4T894HKm5Q4uRxb8F4Lh7>c-L7SFxzX$0p`d>8-R z>lu47Mds+PW$ay8Qx@hq?n;+p5-d^{4)Dam6z9*1M&D-TX#7W39_ZP(M6IRZ^P)

qL zsE(95i=xr|h7ROte3g|^Xq(q&%2oIts$~9F6LQoZ9Sr5DeH!i$QkKke+$&AV`BTf3 zC9^$|zo<-EGRG6If|$Cb#1q{qDfoz{`(xwzGn(Q?Iwm-yKF5l z!zb-*`m8ZBe-D^;9_3mi^Ls35%P3!C7C*uApjr-QU&P|1yzmrSr7?b}* z`A(MC#)ollmBt^-OXhb+oEGjPZe2G&^!RBNb_ajH=3a-qGEB4Yj*nd8+c;2Wn0DX8 z|1=DLOZi=T9&X}4qikA!PZJ+bM)kAlX9Z|}z7et4t#~^{)AX&(FKR%J#`6mqkkKk^ zJb#g8n!Xk9qKKw%r4K2g>B|(|fob~Lrf0d^h)CFqFH&UFx8gn{Mq?xRp^s_$Hg<|^Jhf1>09|NE2Gd>=4TXa)3@@8R*t4O+saY<#gy6f(f6Rn`70mO^sV@~ z5z&CH_(zDQ>08mAn98Q#%6Ph`n1*i!2S08x4PSA#;alM_#My@5+BhBy**1JD+lH^O zY4|p58$N!1j$-o1IJV(iIn6YD8~z*POygIaY5Z*iY)~ySkhf|4?TmaGWz+cE8~HDk zP2=xiBp0NFY5sQ5v#4J9@xCO#4#AmxjzO!+@=ms6n6|IIL;3neG zLyRBujPUH{gV>s9wl?nP%&?E^<}kG!9veA#^B>Pwh{<%jr)Q`5)7z&{O2~94xaPOl z-JFz^W1+BvDp+;<3uEr29X6)YO=-H95=mcp;Fu%O&XQx#Fg?oo8C3c7+7KxS@mtkI3VpNF@VE>n@ZU7 zO(d9%&sjZ@Sv6HLSEO%m3LHi)HK4{A5CQxiLiTKIKCx+9ZK%NRHUIVL-+ zzq~L38<)^w17*H)6ml-)=0fASetSjD#11Z&b5 zHm{G_cDpw%V}Nfop*{%J$EIZ~Abeo-rx1L3$nTu%MhnL##MHh0#ioPs7?Qq7&)beh z1ZavG|M>2h=`)=P@v(zUY%ycjV0E3zUTif2&tS!@;lwViA!n(xde4OkT{e6PiTxlC zFQ6aR1g8?wT{h%LGn&p+A2+E+^Lzu25#u<4CA!MQo(`p1m<~&nfIU*>bl5sIde$6t^i>9_BCVh(F=f-OSp=y8cLeG@(YZSn-h04TQG5^I_hxUBn-C!M&_nN#KHQ*In)D8#Dj-r-6mo|mRS-~A6b0!>$(5@75am5*_H6D2QGd_#FVFM7?|(m^-S3rguNk1CmT}0quPhX0UEq{8Q<^2*%I*FcA z(;Ebi!0-o}9WX%{0fExypc`+nOXJFtG%m!9*(A%zAi_P|aedM;+PRbSA?X}UxUV|L zXwEB9J|LY#2#;0gWX+jEe@E+B)CR3A*>L|rbqjXY5c={I6b-cpkmo2zEy|8jgjuf#Xfb_OA+NN#i` zsWdw21}!iQTVNnFl?tpg#z+ei=t|-#p+$1!0=!1Hpj57$bioS@0~Z*`OeNKsp%jhc!HU{$$l(b^NXH~*Kx<@7vZKf4n}le%d`(?e>(C=@!%E1M&7)q)X*bu z%cZ_ynm6*&S}F-9eQJ{@n9f#hs!=U1w`b`3T#b#u*?q61A|`h#Np>wQtzeb3w5Swu zz%?bU7>ah7R6LMC1;YWK$FDSmIGC-aMe(tvtz~Fu`EpB(wHoMM#fUpzQ35NNT#}gi zn2GPmj2uL`gS&l`ikzwb#tTBQs?H@%s^uu}mChlAhpKb3mW34hBk3GW_(OFrX)~=x znQC&qPPUn_PoCl~X)}>CrHPs_DZ0AYlBG5i*-%`v&4dqIwk9h|p=>juH8qXU>Gf?U za-cR7)tXoUwd7KSlukEYsxG^v%|tfe;9eT-UTGVt;Y->^&(Ig0V;S^`?W!8+J2}tp zy^L-)$`aXjBExc3$SNcQ#g2^|0$l~!b|M35l_50svh76isCPQHoyg!S&t(8XeHi?8 z+sW?XrdGo91`z4aP;>=Zg=9#R1#~n)z0c8Js~|DUs9^WRB;cjfa*tX|q=p)3=t@5D zxo7iOl1-lIsUhz6ttAR*Yb{au<}&+;|DEJo7}YW?4-kX4z_NnXi%YZCRuCh&^_|!rVd@#sI-2A4E-=+1D~q5Nu72Qvq6ng92$cTBB(+Ni|RMxB`U+uyk# z#Qt{&-3qEb|AXrn|IY%#|Ga>38}F9*5#Ti|24fLSO^d{jxh-R`_K+*2@QT6mn$lt& zSgkCj6@%Y$XxUAYY7v&(4jgV@q^UNUWWK3qJxeQ)IvretHO15Wx?^<4s&{Z+|(@`lSmnT-T859p%N>I9#{?Z~@b#|Bb zq+C(hstP4Zp<=eolh0b50j8v5J(zhR(N76xhQWB(6MU7bXD2o`b04-f= z$gnxmELVn>r&Nb*Wg_HhdXp%lQnGA`R7R+}Wm#1ePc^lJRH(V2M#$$;POhb^lvO>X zs+n9tmG+rc9?;qJ%TrbMnAKRo=AgJpv%0ABE?m?(fpj@2S$ie!NgWQ#LK)IQvB?yN z17)xSowm)SS0?MD(MBzj-N~e=D{NDN&?~hlpk8sKX!TT{)PoW$Eo9+T)LUN`PwAtr z43Z;5s%G`pRQL`rC&Q{P>K&w-Rh{xyvDev{)JY#wyE4|MSlX(A<6mdn7xT+Ov0Em3 zlM_~ZZ&J1Q6sx`ISnUzta_~KGtM=k4K6&prq?qb(35P{YHh5{Ii;b5tVwX4cXC$iL$0dW zS2fjhrV4gbBUR+u;d)#lo&w9{$ogC!l$R!PU$Bt#;doTdK0SE zSDboZ)}$oh%Oi|>uQ1~WR zSV=`Sz2hXPI4D?s6S_*XhqSLD&GM0?P=QygD23|~t*Vp3Z1to}k$OA78n>1bdFGVc zT%oJ>vO1JipCX^P3Y7vyef(>cwyYkNYEprAVxwgOlvXN2RmhU3DADR^s!s)ZS=9P~ zYge__RCaT1c$60j$JMcA)U{Myl~g72`B;*VJ8kt~_W#Lx(5{kH)Y?zGm0qd~>4fxu zT^FhqLag*frAhy%x={L{OQcs~q&HhN_&0T7pT;lMglBd7*DWA!zW{g1g4NOSNnvTa zR~8ZfkFEeN8?b-B=wBOeT=_XCDlI!XO83%Q;kLD(Y0%>97Yfgc2*o9wb++}w(Q7-O zP+T{hR!)BX>f!(0tA_v0YT?=8GWjLTg#Z6$eegdm^N6LOWG!sD%63+m%$h%~3~nnG zCH|>+l&lDz6)D5LZ#dQ{>J#S)ztmvO5Ry&fv{i3TPxA8y^F@9&Ofaao~>rxfB(YYZurvqSL=RL zr@}w2`@Ko8I6C0M-#&J|5!6ZXPvO?+6$6E9Y!{9?HU2MN_ZzR8# z@Fx3Z(42xh4xcUA9{Z_Z*sG!qimZD`Na^OvKn~So&J~xw2_c4xf zCVk{x)3*lAS{O9y_PgWUbaob+an~#UDwoGj_zDz4-86sOP_&Qta5tUqGWw%TZ!?Cs{`o2Q576y&FVASVH2HrHcvnbo^ zJB<3g(2n%sNYxU3H_@zxL8C4e^&O!T;7xP8in6`F$Ec4w-$`FN+_ijuh-L~yanaVn zTm4R`N~#;V|Bk!8zglhoy>-9mqQ9-0GNe|n=-Z%u`rL-u&X<18(9%~0{o%cltf}yA z_wTLyor?bcopryz>Wl+YFpg>%L1m8D9Z6}^?nyN2(y-i@d=EpJ^5S)yz5V~J`~9D{ z?l;w8_UnGrbGAHw#K&SSuLV6n|Gjm;WgGwR*8RrE)N30rCF_2(hgY9%uWPW$|I7a? z*ZuB}=S}NN1TiT;NFK?IWhOFnnG=|^nN)vMxOL2TnN+`$J=J%_eXwJE<$V2kelOU*43;%I-&)L;OcS#&Q_j1O{$g3qVoqZ&W^QDDz?Adk zW4LoHUt>OED%j|v_$x5$Fu;iRC-Y zCv5+WWjXIWhA)SCPwA^nL|M)|k8(qn<$Uufw_~{r`wwJ!Aj@yC9L91q%i~$jVEIj! zr?Nbc<)tha67gZap7}1jf5H?*OsBT4_~-2J3RBKMkKyI|;pmSxs&BA3yfj}4wHe5s z+E~OI%m&OR%#KWKPDp3Xi2j*qwZDuj^G4m;t{wt;Yko7*YBFi+Sp6u%|8!+23J2AU3 zyEFSS2Qh~;M=>LrF-#gjNAb`Y6=FW~P3CmwEan0x{SZa|>Bm>%d(7R;JU;D@KhhFuFbc5&Q(K3}mt}uuFJ@onC}tRw{=FqVxlH5mm102nIAFtGCyS=W1eBszt|Lx{>&p@X5M1nWj;)9AIzj*K4+0Miic$RyhYM4%_Ki!zF;c!{6Twa_Y(1E zN6DJZI?Tq*=FB$C_Dt#zpzwW|!OWpdZGD|^mQ$IT%&E*7%q2|u{6)Q6S>D0i!`#RG zlzEJKn)xO38uJ#D{=ug7K4;QD*d*g`d6M`Son#GWeP&~3D`p#JXC^SU^>PNYtgV+5 z%JM(0lS99GQ+nnzmoZl{=~r)Z-^rxD4w8$Q^zS#xXPM`j-!tj|Z*u>c`3v(Ill})M z_cBaRW__l%-c4tg`!j=?G0b=-{VPuT%*=UA*?vI#O)PI^9$+43(tqO={yg(C^E$Jb z`GEP9`JCxU&s_}f!qnEUk?jezug&)Ln9Z49%=XOA%vaa38Ort}nBh#>zCis+ENkoA z*HS;?r{Z~)^?=hb;>Gxl< zcg0RKVi{%)rYDp7;K;oh(}&rC3CwOx`fs274`W6%Zm~)s*m@Akx_W*_4&ishEmwAwRgh_J~kpJ(Pmzmd@G*(B8C^MQF$E3*;D1Bz;ROSrk0_GAX z&89&9w=#D#_b?AI4>M0P&oIAXUSM8j%5`{9@6RkhVm@R3!F0sFQHtM%NwYbST$3r+ z=Rvs%%ihekOcS#!Q?A#8{`;~_vq6x)aHd?Z2jx_j<$66R&tQ28a|M&8i=gnknERM= z{T{SG!}2*MO(;SBi63Vz%oe{M{7W=*DC&j;Nbv)r61*Y!brxvmeg3)^>R z_G1oW4rh*HMl<7>EFWOfq#5LXj(LH3 ziFu2O(+Ns{G^+;r|AXm>@1i8TFx{CInbn!KnGKmuncmE{Oq!;H^z~%+X9hDvn4_6A zj|cf5&wP_Pg-H{8ko!_*A#*)bt{;T%+gO(C2cdkB<>Sm#OqvLU^j%@zXFg`?%c$;- z%*sr;o)Cts!*T;=3#MFG2;Dod?91%S9LS`JMJRr`z7Uco79ly8If*%qIfpr)xt{qh za~pFPlcpjeeMgy}GrwS7VcuZgW8P=d#}*22V3uN*Wzw`Hjoj4 zuzd@r53>Wa3$r`3A9E0M1T&Nw!;EL9GBcSpl?tUtt|x?C!15C2YUVoT7UnkQ9_Bu# zTwe(F9A)_o^BnU6^AeM$ZlU-eFrPBD^@bGe;~{rvCQa=^ay4c{W>aPdrZ2M_vj=kk zb1*Z4IhL8u%x1pDoXuRwT*{=WWGFq_x8%`#0zL+%}z+Im1eS*A&8sDCYt8OuyyrZeUGKj=@c_k*0x_Hw-+l$Wwx$Xw5) zIc-S)C(HxP!_1S+Gt6(87noO=H<_D}N;dwX~EQD-9l z=Xr;>*1|~ek60gx#+ar`a^B$<#qKj#?Whs>WASHOs?AqwP7Hi2aAsij1-ga(?|iR> z=)UoIf^&X`R6XnQqpqrlZ=l1Hp#g3ST<;!osIGUtdrK-d4yNu~dNopE%rzS`VkUDGASx}ZVD`nbi#x=sU&^{!u|-O6HJHE-)W z*YQ?|RbNXSpDaE>+^Tqm*FN<|?-xTYE z<`wJqeqF4eu^R2q7VC3XqFWp5n4q@So1N0ECtba*U8}XVj-Aoo8q;*V^=i{pt7kQI z@6^V6cuTtV9oIJ2$wBR{jWM2?A@{94XWX}T?Sy;K73-E6-v%7)zSeqY#x-lxPS>n) zLHDiU)pl6BG{wDBTWh0`4c4YjH(293-LW>UcE=jm)XTcDT6?QwP^PtePO>#NuAQ}4 zT(b2>h>un8nql4O>SOH^lwrMr=W-O!cT-5Fb!twEbvmZ^P@IqT)12|vpQ@!;k7F7q zV%jGK%_-KoPQi0r9dHUwH3JUdInTm;JV56eFs)b@;t|jV<*s9#Vg4M%e61ZY z5p$zzz)=iaEua?8f$6{9ZMlAdbJKc({tr*QX}B9urp#T%`FD?>JPa#!3v_oCw*xx& zxw@rmJ)&#$zjNA9cHv=N>4gp}jXsqZDtIi`RasbVWran}aK6}6j^!6cRdrtEzRKzD zM5oFDQB@u8Vs9hPq-b1p!=vv;T5!NEOH>&#U z``iQ8D9Tqj?2C%*4;6X`HmBrFSwBTf|1Oh zIg|M_1s-dQ@bhAa9Jjl!`ZofG z1Pl%s5HKj#>|n z>(!hr>(OV~)^1HZT9r;-*68IOtW&XkHH^!$M$Bk!{n<6ey1i+ZwH~@14r*;}fMvNC z+C_z2wQh0!A>c~)b=Et}ci??+-`b<;4eOSs8?AS8)?gVkhk?n$WPX$Xcve&qh_SyJ>_Fn;!><@u)KB)O0izX`{#P6C~GY0*nsz`3*Jk; zFkQDWt?$l=wNB3|woY$aY@L#`3eT^hwRcD}tAb@bsoFN{q>ydasnr@|dh1(z#*JbP*9Jvf?{?a5Z5Z^kwN9rPt3%uv>+x!?w^_w=u`#9Db6toTN4Xd>==5>RR)5Y@M$iaJ|>FR*VSkp{Kn_2-5 z#rjTom&DZwz#1j!2ujrgdf@dthCXTr=+QUcNv^d6Cg8QKig%tq$OG>qr|rt}(p2u| zms#ex+%>>)e%WOPq+x!!Wll(^`4yJAAYJCWFEb*I^UE)DMmo=TTjsjlh_k&KTTk!q zI=|F%^W(YOEKhyBbPGNW?0uu=4$D3FnKb7!PKw84%MAJx_)O7{z(ZeIVZVI9sZHg# z9KF+hbiip(uM(&W1P8R#BXcwPjB#+LAKYH2IG;rNJf!y~*Il@~ z%IO>1EK!X(si9`X`3yCqkImTDW^89Owr680njqANbkR30SDGGFO0G09D4S3jn@|^< zP!*d{6Pr4em?CxhwxmPb z`Y<8qq3lF%wXs;1N<}v*fs`;UQld`-rBX31QgXx#TPhXPA|>jUFNI^YRB5=BFfG#U zLn&ceq(mLyrIIl%ohiPy*o-QbjPXe+OiCD^l679uRm22J@i!9Xtg(I+QCaM$R40vf=}mO+80b-hrT#y6Rz`KQLZkg;g(VX( z;(hk=^oy=M-=dt*QJagACrZ@jVnne9)g-iGfxt>EUlLD-%=L-nj+5?Omxk$h!BO~D zPlj2la9tXxZg_P%o>~|bCler$GfpOerjku{9jLh)bU5c_VTmgmR1bqR4>-4qZHhti zN6mDc`h-A!NI`I+G~vxer!o;ErG%21NQpo#n+njk+-P804DK{@4Y3y9y?Wg+`cBQ$ zzR{;lU)<4_K+`$kWOg*bWGe1xB&a7hOsXU;xKEa@BW$iCG*_z4$p=ozL7*hyL{tQS zX$&TCO1~{hDJ4gZu_PL*P)A})9dvX3iDPg#>Yn&Fc@o^DZXrqXd%JFKKka8r6Go`VvZ5m9wYaB%Bovfy}H<7M)WnCtPOOfG9E`5zc zyYvQ9dMQQ^-Rq;X#a17E@jcLoNTJ-Y?3Sdgq;jIPELGFegF>l33&^KTg-xe+25xpK ztx-tfDgCwVZMF2*s9SP}+H~8}{yN=x6thgIs+%ecEDrYE%MxzvxamTAWqREq>CbbH+Y7uQlHhD4#ZS4JyQT+xtc`^W9NQ%K7 zHTEY`S;27Zs+An9cd$Ogl7kMlN=lFC-<2Ne(=H{0n>-o#N=i5`Of{wC&vA|Tx8ow8 zc5&fZzZw_k5T4g7IfUu5&!NLy!DD`m)^hDLo82hQ?ySvjq-OVx&93AzLt}gBs-eD; zr|wmo-Eb`|jcH|nB~KQs&2FgXkH!MAzc)0yXEwXRnjJo1HGlMKAU8L(b64xI{zQ5% z(=%DyDx+OBb|+Fi_?+Ha^7PZ5!c zAg32-PNsg+Hi!P%S8e5#05*4NlJf`9WEk2k4Loy=oKiqeGayaUo4rESoGz8~bQe;e zk}UtHR_8_0%NUgu)vB(9)G5=ac`c_ps}r}#*&UQB(n|W0{$=zWjXL#1nkS`MI?98b zM?;>66cssZfL^I&i__*;Nqr%=rXIirhSnr-@|N#+EfnUboeTF!-F=UYx#V+$-z zJl}>4F6U;D2Pvv5OVdC3`d4gi?zS*}y_E6}(mQk zR{+#(cT-cYUX@pp`d7t4o)%5WqL=ez$m`mVM5!`RMz7|G8mYUCLwb|>F7?VYk^$6N zPZ~&1Y8DJv6U9IMH&Z2b8Wp}=N-5P+EkD5fCEEV=8XK5iXUTlfjhfFfXHf=V~%6>T!gnm$o|1PgFDOF`z zl)SEtw8rU=%LpBAafEh4?!p-oy$dP2Bo zi?QCgM`nhlM7L<|*`h!0I3b(g*u->P&a_2zbb4Y$8b;P4HA*rS?IOd{!tCXQsMOT3 zu~9AJqY}ra#rS#Yl7mwsbpQQ-?W^Bf?f=`~YS#p#7TDkaf8VuCq`%{Us{W1xJ^UR9 zRq=NWuI%qPxRSr)kc$3}Z&dJi99rJraacKj$Kme&jv;0J9Y>V$cN|&T-*J?izvJjq z{*IxpUCMl`SN1!UiR|h$+TSVE-)W@3(ae!Q-tlhg73}Myb1LoJ*Tuorsl1`0zLLHQ zE?-ntUrk?KspU{tuWOl_osbq5j!a8Y8Kar70N`)#bjfrr!&C7;d9rBvmlcBD5Apx+ z{0$%1#-%>3|2zJ}w{P`p?*{!jeF(W7#&Svj$Y~p;ownY%<8XkI?QuPPXT^7(%4kC` z7ZilLNa>|Z3xh`8MGUlw47_P>2`Fo3a+-pDs|QH|Z<<>y%J%V&Y>4kq=#Szh?^?Wh zXx74@Q5T3~6g?jikG&7xZ9_1q22l7(3Fz&eTim#J55H& zZEnqf?|=AX=!#pm_bMBrq_3M({fjp6nRH!Zgf8Q>Beru^e1 za%?sV<`kue@=M+5%GowW_o`gZ=7=T*a~v;|yf##)(Esl8S9IH-=34XPmH*dYZSbk} zq5~$MQtW_Z0VyUT&87+cc}!ZTl=LiTZf1VWJjSF+&B>qq z4;(4KQ6T02Xh_=Vy3n0QbYs#zK(YrDt34?Q^3{(;$zDa#w$Qzs$0Q^zGS zoJn;q$?42I<^<+^=3?e5=33@1=0{8m^C0si^9=Jm^Lyqs<}Kz^rYw(`E(4V-q>)*c zN#iESUY1KFeHJ8H`wv!@Pn5mb-iO(l3Cw@`AC|@ukltiwCNq~gkvWw)n>mlUj`yf4uo4UnMlsZ4o)qHJb)8gnLd0aM<$=WWxay(NtVws&oh5yUSmFD z{>ps8)c%Jpg%uC!FUzC>DJ0ipHesmx5K z_8;mbmS6oJ^BDp`4h8U3?!5qg-V$zr+a-YPU$$Xo+hPi>cmAQk7*(=AlYtMfar9Ld~lG=E9 zdbgl?H?;NvbyY-0r1{7%IZ3TN|7m=ChxV;~)Zy^|Jia}dBC{LcUKQW^THLVdKw$`w&|L)jf=Bg$?l8&Ni*Y(Uw7vf+T< zmwrJ}P}8~x?hfa_aDL!!=znLmL%qO(Pu<iF>B(5jiNslQ}9=I#F zzi1lh727e8(%Cq$X%&_)#Z$}PRr>WSj9TGX_*HvyxufAJ|Jxsn>jvc z>`*$ee6bNn5Rc8#`*kZewy<)Y(bFQQWug>2scZfoG=RsQi$M#fG@S#Y$X7 z^fMU8Q#Z6Wh|_mApzUHDV;ha*mJOH>0maTVhCi;6wPB6{<3%@l9swBd_g~;>*f(|i zyHousFRK9;ImUOUcziG{krpo>9P~~N(FW(|#{e}u(@}4HL9Gu5M_T4Zkx#^C^l{n2 z!TBw6FgUs)6kjrTp$-)s6D!+IM#r~EGCB`I*v7=t_!#8?#;;WJLIu|3(g z2&Yg6=l!HmZyZFAFr%RvNd|*#2pJ8>QF07N7aS#f6umnczLLikcyz942s0+42jdVt z7$S^h=}=E+q{$!*k;b`FbTHl_*C-Yh;~vr$ZM-a94aQ33I@Wkoibf+%Kw*esRc^+W zm2Fz&M?kMZ(YtFhAYPB=-qgeR9rK@BR#3_&W7u(!eFG~ z#fBT48YkmdB;I7v*+}mxhFcugX!NA`e&V#c8GDfD+bp^pJCN%g8L30PikLT)8IDxN z815Q#(2Qv+>q1R9mwq}!ITtN|oJmc279ETxQd7Z2Jt>2lKNVdr%j6r4G{cpl5{qs| z*=bc-D#aX7lTgKl&Rb1_11fXeOc8jvltHtr{x~Yo)BG~(>|;bdHG@h8>+}U=@I)Io zYT)Y4m(ge<(SVmwKY_$p+)HDR@I=bbb-0)5NnR&iMx%aM+2^EvG6~%+#vPaOcF4rz06gm48>7nw zv`w>f8R(E!;(iw0X-%m)?4FJ;11V(rAJC;SDkpuaZI%p0uVqe#o#?;96ii7)eJrNT zP})_mr+6w|M(0YDFx5n7j((b=li{4RUQcnUE|*{RvxWRTHtO{>0ZJu#DDi_aQuD6@ zU82fZ(UQ-qdi`rP{b!G#{kv7oaglRgth@u3F4xzNv883jOTE10xZBHvZfR9>y9LR$ zRn2MGEov>xi=6W)TzC8B%FEd;S6;G?Ip&i(=C@)=dT>Q_U%A>kHbQCX^2#r}V1Cku zIgB;1I+$0^wx`Rdhk40X5luKUmq5;T%g&M)@`}S#2~N^=2!T8*y1cBCL0#mvy7W4T z5GcJ4C8S8NX~~6Tpl~!ccTh<{>c7g80S6N%;;!h@%!OoFsM;?@?2^Vogd*G(U5dGo z498XbrwBE9axp{dOv1$q3I4b%x^#WvAT-cmJ6t=DK=0eAMK6;zOWFq$wo3a{+k%Vb zQ8o7QVz|M0lpEcC{cQ;)DeF9Wk*H1@HWYZIO%z5`hG7M7%w?Z<+sDe?Bzs^zxLm?UF;EorL zuvE2o|5Hr3kexresp?ZBrTPKVb83vdG!z9UI9|pzMir9fby6e7)RTd(6?)5(7fnqC zo+KG&;EsdL3F;M09bP9!U{bny0qGtznAoBmL>-JwUxUS?~ zECMgFE;KSKIxIatEtHnMNX13mF#G?F1>Gj-^)2fu)jX9b&*ne&71V)0 ziBgi|c;vu7IikpBk}BJDT^HD;iBe7ts16m9Lw%%Ybx>2LI$Vj@B1)BBrOOnGO%5B1 zQ>;2qYOhdL*{yZSgV3zbDNNJhm#nZrLv!rMy{Kb*I`G;L5edohS)mD(>#C8w z|HaT4dV98gB=UJV3R@T&K=j`|7N}o1=73BB#h%N;#^5kH0tjv7&>bE+qb=q# z$bOWQw%|+GK~Z7xIv!o~(!d)!`P7K8_$WEn>CXdmUNbQ0rG;Bcx*lG+Fucf%RLCh* z!$qZ}Mg_))jUA**4o{Dc=4D_sTb;TxO-T~vn4{$2w6L@&T~cCHcs8Gdc4A%RiP^?` zC3mCJl9-f|5EhRM&FC_tV#mg$rRx5_JCKMjfGp=!!b?VZX@j>0^-YS5jgE~<(aD@t zZxUH-Y~#xQH->cCRd5u43f-9$zjj$ zuS8muqAQjXOutsX|4$5>a>FO7{g|oxc28D%uy!ru;Xm2Qe~P33RD=IC#ecek{~UV$ zcA*b*|HWgKURp7vB&+{tjFNVVw02MMuFz<);7(p8(P@w>x24|v86!zC@q>k`lhRe zL8HzO9oyPjXvU~l{H0(Y_`ui18;1Vu<1ND0q$l=aQ@mua#hdnuzEAP{wI|wXn-(v% z)a~{CP)8lpLHg*Ex2A6znzb-!)LlbIcQWv%xlKaZUf(@CeK-W8MBg$rYhg&mBhD!2A(nsZiw#8-eW%`x;BljJ++xy#z@22!!UE9cw zcKS9>)VBKAH_$;7kecdG&}^SRLtR_`VUUvaeTHT%%aq-68;OqXH36x`MPpaAGEdG6 z(BB0z@TU1A+GUq+m?p{r%D{R}8mvWfShf1bxQ*>0aY?~rWhP_-)N7urZ29j)>B3{;|sCIO?R>FURNyZbRdddN_nx2<5K8ng75xq#taZ{Mp4M;{$RELr~ zohy;fk=UIX#2m_$<5$o77ck}c5Y)4iqy2M`va!7zJ?r!f%eB)&zJ1}Ba`~aN&f@pZ*1?1 z6$I(4%B)31e~npg$LvhRbPQppGqrINay%7=`+@9{RQVB`GSNncr@No@$a06I`+;On zCY4u`n=xB4WqCvUt}ORr_GJ!c4r9hL6PWZ&B)wToGjkGCmP2%(%knzrJIwc)JDGc# zf_a2_f+@=->idf2i_9y`pP2WUkC?wQ|6n>$c|tvMoF7sfS5=wqwQ*Ile4~3Kwr|Ol zZbdx&qr- z{+LbMoewp0UwtAm|d7bOl|!Et)3Xp z_Vme@^hPt~I8Bttvz)^$U~1#AX0p7Hxs)l_`N8lTS>DFn#e8)<)={?qjQQ$#tjlaK z=Z8SO#Vpg;QcAZ2)niB}W@%D{J7hYr%}pU0D= zxnrThufINY#8o`&;4BMXA5Pk_`-#r%ywdX2V?g%_`mnBH%7lP14bN8p4(*f5pT%Qn z%`eLLsnGZEm?>lMdr1Rhpl(sQz-ocIdNhJ#%r0ezm&L75X?C~Xn$XPg3)eoSSiX7d zMg8lyjD1{KzI01Q|2KzwFU-&n_X>ZQq2qHi9Q>CVw*F#t@hh zGDG|GX87Wa8BQHDL(~0cxbvYIN^dp8ytQV?T5N_xGt7`sV20fBX1Et&hW$g#@Ho&6 zv)Y?sS|c-DuWW`5j%GOar~vw0DFC0-1z_G=04?4r0Ka(!urs#+rbiXP!F~lWx;^f- z3*e9w+7;)+u5z_L9Lyx-0P zV`3fz^vQ!8P4eKjQyv6g%LUK^UY*;=t8}>KJhM?cFp!2CLSg2G(;%@p6>9HDg^nqyAljtD*2gJe_%H>IrKP~*HYqUc;dq#{V?6wp zFdn{YIv%RrN`|BBlHtmzWEks_3?W}8!N)U`U{XL5?0udHqdrK4gmH;*w@xB_eLewN z%uaxZT@s-FFY$0>b3A-CG9Ct$jfc($$HAhMaWJ|b@?0GFPKtv;t>fVQ*W<+NLYI`0v5$Z!1K}(aDGQPGz<=hJCDPl?&2^w+b#?qelrH%$`}KSD~*AwAA~~r zL80*G&!b`NtkLjk@F=(vIttc58wnQ|j)XZaN5aR)MnK4z5s>~g1YG8ZK;=du zu+lOdRt67;%D0C>se)mUU49ruyfYMzbsP%so_YfuLf?Sz?hk?H6NkWW<%d9z^@E{o zo53*TP%wB542I!94g!yaK`{8)KyaTn5P~WU1f_5QbZ$BT9)Hjunn8cKe!L&l7}O8G zzR(xkBl^P0JAJ^I(g%(`?F}yG-f+s$8!F5Qf*;BRL6Zf&;92Ef&~JH9XjHQ&OfKvJ zW9#&Q)9V6ZU%fzRv7tLOtlu3rt`C6s>IOiEwcVgk?QZbX%C1nVT36V!xC`7X-vu_$ z@rU~^{%~M2K=l_Uc#&m-#D{(`cAOvFyXFheNBF|hbDiN}P-jR#*a`Nu?*voc?+91w zc7&5lIzTtK4iGe*8gO9&!3%~Vl3ui1o;M2+nnyhI9+uhs1u?ekV{C#hD zKhzuYPJ6*6UoSYfr4@|uXa!kQT0)bDEg)%h3+VM(bNHlfbJ)M88H^~^4CbUag`qz- zfscDOfgL*=gMYQg5Hqn6G`-UhCJ$@~nIAU*L+u98d`f+=-l+$@2h@XZAJ&EQRqKLN zK^^$=iYIjL?g?Es)rK3cwV`1`EpR$h6DE7rgmv?3KFf?^sEenH&z0JLnRnCx*`nNTLG+EXp(9XvYn!W0zyhsogfyQ%KB z-%K0(KQqm_|J3xu++R%#ynZq5JoDJpA@Px^iQ7Zdl+E`|eFA?rO}JWYs#9>!q zY1{7Grj>nvGW~Y*rs<^lhN+Clb<^SPS54NyE2h~Oe>AO2y<}?Xa?#|y`g_y+tuL6? zAN|%;A>_R2_j_NPBF$f!dX_t9+OqBo(~LG}O?N&$ZTc+ub5rwcCr$1tpP4dsCrsgU zj+wr!e$;e)(_vFU+fPkB4<0mq-RFSm?s;LF8E!FsbZ?(2F=MZ3*Ncx$lc(=7-E{xR z^v%)_Ov5~Po5sDn)8yWAhpE>G+f0=@y>H6g|DGu+V2kOGx8JbzqiYBXkr>Gb7grpjSUO}ZDWnBEA> zH=P`kV|u4ors*f&G}FRX<4y0?Ni?;pFwRuh5M!G9IMOuodYEa`xzVP$LnBNZb__EO zTRp_|*33bs4q5$8VRJO=bK_3a#Ja&Fko)XUx9ROy+oDgIhV(|}X$Oou;cV>+?Y z%M>=bg=zMmHD?W$-xwYZ#VW=lxel3SS@LOK>u3yIY*ZmH!yyW-RsBis_*Zk6N>cx|O zM^_&4n>}K`-^Hq*`0YEt%dgp@t$tpE-tjwAW{scg$z^`GrY`V{>pI(S;qO!Z;y<3? zcl$<~UwBB2U!T(>{I+-L?>Fy*u71xOw)6XCX%oNct~LEW&UN>jdr$FezSrve&hoE) zSL77=)(Bbe+o9tO-xsaIeI1Hh`FaKa*7@Mc#ht${d!mz0Hvy=5@Ef)PzAM{nFSQ5I ze(zVv?@w0Vw-b4^Y_EM&keh>Z_fcB`!|p4C+*G`M-(hSwOfP$4Uovux_tkyWjzInU z-uoTf0i9fnIwFUitXw3pZQ(VtUJyL`4O@nz-lv9l7bLdb}w|i#T;d-LT z;jS6B4?0ss?H$awqKKc&u<+{lMUJ;Ho~BoeR^7n!NcpLV+CrGOMcc1p8%h79sL2&G z?Ctei(Xt=S@X2xP{=9_eb5F61{J{+2?#`C&7tGMg$JO%mTQmGJw6ulVPbX=TeNUzp+I&8ik^U*UDMT>9J$En0e7uAVf*$$|AOKb$Z_WO_pjwY~6K zTXr2W!^EQImbX7OgY)H9mav0nn4+|?P`eDvgXMOS8RCOFT2}AH>zUwd>Gd(T-{ygZ z+H6>6EE9KQd+dC7OWB=xU4H9nS+LCvskQo8s6B_}%96j?3|AuuS+2cfhBDKKSYU%0 zyx$vUp|&2DJBs$hO}n6mU(YtJF{Pbh1!o;&Mp4AW)Qt5T8vp{ zaQ%LgkWlq4p}?ca|pI z(0=3!%V0o%_f}fcJ7c)~)fQ^Y;=O5E-UiD};abb8R@lDvT5nm>%nV@%H(02hi}$Z3 zp&pixtM6KR)yDFXy4g~rx*0MI?^&n~jQ6-@eR;g!8f>!+D`SQUA8ofNu4bsyW2c4M z$5;1BG@6!SZeQS?}+Rj*4Sla(w0E4&ewXC{R0H1a$vi$2t z0W?2pu~54j>l4eO9}3{+-2;}d&KE$(yh9e3a|JNT?XZQ~+*s#WhMXt>hZe^y35N@y zo#nVCcYgtd_x;R5?QyJ^EZH9x!1{#GEwMWaV9)QTEd$;wfWx!TTBxm#b(clAwg8U2 zf6j7ZMFD)`_qApE;sV(C`8O77$7B6wxjnN0B8$JX%$!;P?eo94)O!=-D}B*IZG5Z) zEp0OjAiw!#%Z}s%Xjyc{QfFKNeAD}yh1&mEPg-t-7J%Eho0bkC1+e_tEz88g1yFm& zZ412{U|nkYwPyj8-h9teuN(UBV6_DL6~OspKU?U%0qa{!f_DMr-F#?CX;uIS(jQwA z8Wg~9hF>i7PJwl@C9o>yU%h`>>Q^X$)LqXkzq%E`v@Xvr^uB@hwq>HO02YS6uylBq z58X3$;>II<&oJo)y^CPoF6!LMhZUbYh@F@7!C{di+Fi(psF4Oi?b-oJdd5X48}niRVpl=$H~1V8gO}t( zod#|qac({Y-E$KKZ{_ zD9D57ml}((j6CSMv5BDfK73w_ccSv(ly@`HX;dB{ zqWmAZuq($$ct6R7rT%S2k9)b0<7~=Vdxlm_wC-M2#TsV{1Su9$g3mHDXg5FQD9U`3P<-+^>{luZT7DlWXO`l8zzbM1>r1{3ArrdpoxG zM7uw-;po(nV)UbIsMdRw$onZ9qRNgI^iGd$Lb3A8Y`D54RIECd4HZU?5sQkl!PhfP z(EC2N8%4}J*^ss=Ty$H3eE{(hqT<|ac*`qNP+tJHEyeQeY{>aIO7u(2hUmO#@vrb~ z=;=RJP(J~-KSk?4+3@ICj5y$*4SQ$Cih#D+kljB{P#*%eQH576>{s|^oLE{u8_dh& z#V<~n&d~{i`WLVrD;E8n1#NC5if^uE!LCh7qRh8h&^SI>P~QW#b;Xzi*yr$YyvY3^ z3kH6aB4%yMg0gr%F!g8D(QeJ)0x%!ITh6T}{o2?w4|5H7ni!5H$Upgt08 z!;85~Ghup-iQ>pibkCnC9u#E4<4Y3-^`BrnUo?x#gg$F0iB7{ZA=zQF@b8@oZ%0fP z)VG4~0-~jNChTu8MO3Mu38$w{5x-QuI!#o% zngM6WO%v27gYOh#+_4OJzr}Rnyf*_D%$Y8hZ_R+TpQj7zufg{Yv0+{YG~D@?s6IIZ zel0gcOwY)GPg7dV1*6A?Hf1A6<+6ifPMfb*i6;u2(l<;hGz{XF>oA_mmYfNFbY ziJZzAaG=U;vC^0UVOg^U^#S2KjyQBL9p-nOBaU85hq}w>h(l-7;r(ZG1oaQ$dyrW9 zK|1W(_qND=CmovCm@5V>O^3C4a|QJs;k%N!l$#FOe)GhVgmk#LYM$s3nhw5y%oEhF zgzr=0t*+^COUxHFebS+A?FHhU2I-J*ULdH?3E#QIDq}kQ1`9>0XKCQQW}!&Bn+D;! zMS}XH@V!h_JDmo*4=fVl`_te{&&6WRjx@M8VX>gTDtvbnx&>)arppphcXAq3S-V7Z zN>78T`lW*UvGDy)^dFiAr4KF@y?ds?AD+vEsbd=4p0G?%9~Zs@3g_x+@V@_Yaj{ey zOkJ~FYcnFBMJ%{ZJDR4P+ouIxr ze7D8tbqbi&5lSDd6~Iy`X+NeE$_|B2yq`_Xd$XI0XvJZxrnV(BJrt zg8K0A9a(IumxAv(?}$MaQlR|X?}*0^DNx(`j-dWMe2*5@t|GU-D+<3D54B5e64eim zhw^co1oi#lySDhXa6H^-v{?*&dpsPTx>;;17!Rv%Y!=ini0|V9MvaHg>$ixUKI1{} z@SfP(c|7bN^PZqSLwsi!kE)J`CbhN-qYL&U=4}-fpC&`r_ge+^C*pg(DECb=Y+d@k z&>u+#-(TMsw|8Sd^~8yWfP%YP?31}JOQ@9TO?xcBtRWUi=aMO>|+rfk0fCE zwulA05+JCi5Z4P6V0DfV)IW>;Fd{xD0leDo7i-5RK+^pE;`HDI*!c5)L4CK_S0mh7 zCBW~S4~UvI5}=mzLD9e^0oq3%6x6Sa{W+rAwRi}wbx1g$jfWw*hs2$tco_KYAwhk< z*yke_FOCQA`Jal>lj5P$&!37~$?@>8_hCW(!PqY(CiIGj#g0cr{dVy%GW>|xUpF4A z?>{1_uNeD|#CN}qgNa#3#ju~oL6fhKiql_>gU`H=3F=42{w1;I{c-T<&N1=ZvT=~t zVL+5Dv@1w97LS{ zOw9T%4z@KtDHh#|g9lTQ*f))RSz^}yI2Z$`MDBZWFmuHzF=j~|Z2$F?pnhxY?-FH` z;^5Nu&&78kad4;9X|X&o4yV_h<9Dkf9@I4?MWe7< ziSSdgF#7GY;`*LgXnOao7_~kYtbtz$>I=udHPI#q-T(MP%!`Tzmyj>T%>l9S{)b-* z>LT--&4l$HFIh--#w$$HJcT-wEoo$38=1%0o;epe9{9SJ-A zZ;7q_BVp9?TjFkqNYFpNCFolQ_RWfZr6Qr_yFZE4#}TkccU#Q47y<1=ZVUR(f&I7Q zz3mZDqx2oIb!h~=8GT1=d@}+r?!P1G8wmFCirnA`$Vs^?LVP1&-^sh8Rf7n4RR5l! z?<3d`jPFz7(Bu3)k^5sfM0gd87RSRO&r-%hZvSY#~=hc`Q0h5N*C$X;j_YvRIT zY_V0)cNOeU78^Q;L*v4qMYa0j@Y}CHi>YqmaAd%JLEl`k&slW87zVx$55&?VVQ?qp zfw=O17|hxIK+yLX?3WfJ3c_Gtek^{mj)Abu$AZ4&VE?wbA;!SdMo+|*~hr;=veigT`hr;pyho`fSv#NUEHVx99 z(%s#2)=j5$cMB3CA}ApPQXQ9_Fn6`uj|ms6}INl1f1FF3e(vTd+A|6?U{hdz1(4SS583V1MaYcGbbS3=?>Gm z5&P|7OWIGskfWZk*VQJ#8SsR)EHD9EhkL_xro^6n*!>sdaXhatEN|F&)E(yw>+sWf z?783z(|Hs7_F?PikH@qr{;(sX$K$uF{;(^Z$0L8qK$y;=*xL`gQ*1m|-Ux(+ImY2! zxnS5YZ^!X|6AaTi75o2T3r~#0S4DG3zpdktuR{*0v}hbwPs<@X!(v7tKlB)f&#vW= zA&ti&HX(-uOO3;TQaMHETg(weMU6$dnK|X}dt)(wM@|`YdMy69kyCW`#jHVwFByxE z%H@)Klg8p~mt4}c*I3x*}*fc+n=&X&| zhfEJ2jSUa-$iUm9vC5W5njasH1y%Ek&f%Dk$jb$z(Pu$kIWT548Xd?h6FQG(UoEfb zjE)(K+%7yC7pvuync1W8Ro{G)|G!b_yD*>V{Ej(`)c%173-im&Dx=WmV1Buidlde8m|t}6$Gk=+{y7r4s~3=i=SN~|-vaV# z=SaN2uz=`HkeQCOoH7#C9u|-xy+&e>y@1SYJQBsLy(c;^WbPx&ogcAG8>X!>qlUGm4Z^|lMy)8tDty?j)3daf}(Rq=11~vl@a*zUP0-V zdjx*X;@=a7BehZ?(HSH&Ch2o_IC^|iNaA)3$E@9j?*pEnB2wkyN%B)PD}>>GwVrHhEpHJNA0><@=w z-;5%1xX&=G*jhxMHyMTr*NTYFJehe(MdwfyE?!iczaENL?Tbn$8Hz(wii*xdnTtvH zwL?+!*P_yK)=<2TEGi8K48_KR#YAVN%+4gO>`+9HD<;2thG5m&VzN1W2&$hgCOSuD zz9uD)3_l1Fk^Q~xpiX@cK=>d(taF-d#NQwXS&P;rNPWWD27sE={E=sW|Wei z%?6>X0|AAR}4howWZ~ksRPme zOleuvb0Dg}EG;@GX8tIS!UGZ6po|>L7=T}gl##(t2jJ_aWkhGl%qV5U_XAMj&oWYV z@c_JZl#!pu4#2jmWku)9%rWJs>I2~Tq^y+7GXVQ{m6a9o{n7bWS<%@uvrbVb`eR|K zat^;U zM;?8E$Ga-XqSGHB$E^y|ee(xsl3YP_4$gd5ZV&kYpLeJzU$p)J+a_0(n&m#gv2QAh z&d8bJ%9K}qaqCq@asAd8cXL&eRr~tl_Xd?j=jY6MW%b0qIJLNvcslpRu0xe%ddGqmb`{^3P&UO1cX?kPAM1lxAH6R+cV}KKgJ$)?lq>Jc+7J4mYSjC3 zsc|3tQ=qcwOrDvtcr$vV$;ir5^6%dGJG8RYIM*9-zRo_Oe}D(`*%JHV`59_8$bqyp8YL39ten^u?Qw|XG=i0Y!b0_N#bW@QiL z`Kh`Lozer|ht*|$*B(gCt}dE6VCF6{xyc`Nsv)^!yJOe%8uI?_?wGf+hG-svxxBPp z)g49O)R6X5yW?4|n$ogccWkX+Q#7l<>|RRb=??$GnqrUXhM)J;UFU+za#=5eOzCr-vi2Q zuP^0}09UTm7tME&qmao{fQ&p1#Mc>E-k^bOssePhua3i%L8Zy$o`D;vwpav>OXtg&3PcSN_xjYTsmWJqMr*^bCxu8DNq z)Dhtwn@G+%9dUYM6Vdz%ITKk_uOm7hZzA>cb%gWJCh{z%15R0+@IKr@vnW!0e+T5Y zG?l|kJK(2DO{Mwh4#1kGqPZ9HD$=@42Tc5{shrGik9ccSsr;lprj>6dnu#IPA_?EL z$G}O=q|1!<_-%DF+0nf{svd79nwKH>B6V}L$FuBaGVN_U)F{_n_Fip=Ssj~;W@*UA zi0!j>NLtxk$_{SF>t=Il*0de^K58zSvmrkt1C!cfOX(Ie>~32eZ`VSG{MZ)P#k~qk1VOz8q=a$z5Bmt`JV&|{|!DSng`-@gwF+EBYZ8m4B@iCWr}8nxDMgE zz;z1O4Q_*QTfl7+%@J`Mh1&{lvvAwN_aJ;P;Cm9y81X#{-z)f@h3_5Q2f}>;?i11c z5%-aBUxE8fxbMJyDBPFeJ{8R-aUTo!HMq}(`yM<7!eap*6VcofkCE_LfyYdE?7(9v zJeJ@w70op97z>Xzc+7>z9y|wx=K^?6h~}MmjtI{c@SG8zJK#AaJeR<8N;C__b4+-y zf#;m?+yl=+;kgK&lcG5(o})<&rJomxRfbg>b zekMfoRs4(yKP%v8M)=tQKSRRL68M=C&0g^{Cj6{{pE==Y5Bv-YKa1dJQZ$#vUT z3VvpVpIz`XEc`5kpJ~y|7C+;{&pP;-7k>7^Yk=@t0A3SB^IW_}2(K03HA8sq0Iwm! zYYBKw5zTt>8Y8^cfY%)1wFkTg39m)qHAyrF#%q-DS_NLSgx4mV?)H(M%ez@xp68c+D4H`@wsF@LmAk6GZcB zyhjM{72rLCPXA19~;5}4$F9q+Z zqS-m#V}V4&WFy62$2`KZ4>$%Aj)lN6k!b#pV=dQ$7Y(h6pq!vF`IDg29Du` zV>xh4Cz>hb7*9CX1IK*Au^%`F6pjVKF`;PQkYhyQSP>jE3dfG%7*aTv1jm%3SwxO8 zg=0-{%qbjuf@4tOSQH$SislqKMiq`#!7;0F>UoC|<+0?|Ar=Lo{N0yt+7 z&KM63(5#Ih1fN1nR|Ds4!nqqbhZD}_z&V|0CX{nL;am@#^9kpE;2cmm z7X;^oqIpry5ruO_aLy>4JA!ja;an1&Q;KFuImZ;vHNiQjaPA4tL4|Wsa84?kGvypr zI9CPdtirh~IENL^Wx+YEXa<#YT;W_7obw9jzTg~KI2Q)z#G?6B&XI+4WpK_coI8Va zXyIHMoKuTtS2@QP&b7fgw{Y$a&cTIqad1v9nrr18T{u?<=j_6{J2;0I&gH>5y=dl@ zb9~`kADr_G=l)<1K-dcadjg_)SoR2ny#lajAnYB0Jp^Gd0qiM=W@Xu95cV24t{x`r zJ%Bw3VJ`ygNr>iX*`pBlD!`tFuy+CWFoeAfu%{uKv1N}#*y{j$9>U%S*aH#vLcpGg zX#SQx5@D|d?3oCACtwdn*h>L>Dx%q3_E?0y7O>|c?7e_J7-264?8%7ccG;s5_G)+^ z9wF@AfIS>xF9+=Dh-P}(;}Q0Hz@Cq=_XGBTguNiJCnTEpWsgYMD*}5)!rl?sLlX9q zz@Cz57MMLIVXq17ISG4DU=K>zivoL6qB&vqsD!;LuxBOgU4cC;VJ{2pX^Cct+2a!S zy1<^7u=fS_z=XXpuqP&(FJ_NS*ee5jX2RYX*h3Tc(!idYX!e*rHes&~?70bhZ(t8j z*oy;ua-z9p_UMGYIn?CFVSmf7PI_WHn{pRo4__5g*wK(Hq$nrCK@ zP}nO3dxpZ^A=pC{_7cIKqG;BcJw{=#5$rh%dyilbQrL?Gdy=9#X!a zJxpOQ6YOb~Wk5t$z1$(B#-YM8a74}lWo~mfJ znmtxwuT`<KXzrRlT4AqNv1cpn-75BQg}q$Go~~#nn>}7(uUE0> zEA0I$_JD=GV8x!WXkME=VqvdXv1cso9V_;bg}r38r2PcZEH``1!d|mt&so@eR_s9w zd(nzLY0;c_g$omey=ujtwXk=s*uxg~vK4#Uq8V`ZxP`rL#h$mY_pR6i7xuyxd*Y(` zaQ4WBy>i8#xv+Px*h3fg(iMB^qS?fh%gIL%tS=<@61SqS&3q1BFs({GZbN#qL`_OX5*Q$2(uQ&%te^JC}uFi zEJiVt5zWmrqY-8`ikXctyHU(=gjtSarX!lEXT~GUdK5DsVfLe#0SU7p#Y{*vZ_kWK zm=!5zM#Ah!F+&n&Ns5`0XcnItlQ3&i%$$VTlVS!X%%T)CDbbuhGb&+LrI=X>vn$06 zOPFOTW?G^der8<4tV=QT5@uhD8JI8&Q_RGK*_dKRCd|qdGc#d!rkJ4#voys_O*H$@ zj7^xeDQ0fM>`gI)6J~LWnVe`ZfEk@It5eMEgxQ^9h9}JO6f-^1&Hyt$Vb-UZ`3bW> z#SBoG1uABOqJ08pgu<*)F*6iqhl&}ZFiTX-6h*rR%ov4PqhjVL%pMgpNRBK2Rm>zs zdkD-Zg;}LyW+}`rRr^^pgjuFyrYYJ{V8$uTIu$cdVfLw*feN!w#Y|MRzrc)Cn3XDK zro!x0F+&w*sfwAZXt#kGt1xR-%v^=pt6~N#%wiQYS<&7DGg|KFzZElEVRoyS;R>@{ z#Y|VU6TysEnDr`VzQXKRF#{H6!HSu%XkUUEu`nxE%#4NEv0{cS%#sx|WzjALGiG7d zte80qvuDK&T9`#EX40ZP3ue^9tXeU%7G~Fq8MZLXR?M_TI~dHkg;}>^<}J*=6*F*Q z7Ot3yi}o{^kqfhO#mrooohxSO!Yo}eQy1-SFk=^H?TVSZFnd?b;DuSdVkR%z>tIGN z%<2_0dtr93nBfbve8o&(wDZA?UzqhPX8ywLUyWZmTgU<^G6AA}5HbQnRzQ&%5V8Y` z41tg(P-F^3yCP%^gsg!gb0B076d42|i=fCPi1tXxCCnKOrL_WF-`t2_ZY7$WRDb3Pq+uw3|Z4LdaSuG8aPj zLXp7`vKWd?hG=hvjE0caP-HfQ?1m!4A!IoenGVrT3mFd~>!HYe2-y!s21Lk$C^8|U zeHSt!LRLhP84)?hP3mA#0<^+z8nlMFvO6;wUmXqP-k4Izm=Qk=YTlJBkdCkmXTidPF-rWPF6I zk0SFUWPcPHAR!B+$OMV@dB_L}Ss_JcNXQN;GDJd_NRcTL?fQ^060$~$%#n~iQe=>X zERrIVB-#Taqa+wLiS0KffBM%icFMfe~65f zkd;zoriAR2B10u)sT7$i(QXkLDEnKsc56d5-m>!!%O z3E4MA22RMrDKc@Q{U|bWLRL>eiVU5QrBh_;M7vXD?1ZeHB6BBX?-Ut4A&aNT z zkhN4~E`{u+B7-SpF%_9i(cTytO(CnP$ZQJPO+|)N$Z{$&ouZvGGM+-#Q<3=;vY(0! zsE`F!WI{#zW@JQ#tf(S0Dr83$8B!rjs>qazcG1X~3RzP{=2Xa@Dl(`-7FCf+744~! zQ5CYPip;8zT~%aQg)FNg(<<6wBjYM$T@{&EA^WPxzzSJdMJ86X-$q7O$jT}*vqE-O z{TlYUkfl{)AM*8d-^kd?&YwdSnOh-ytH|IASzJXXSF{&LMpww{Dl)r5c2|+%6|%gF zOs{BXj*PF6^;Kkkh3u~)11w~L6`5esJ{=ihAuFuN3=7#|MTS_&5-T#rqFp;O#zNLu zkvSH!$BGQHkVRHxl0|!XWR!)hvLdrAWS12gW+BV0$TW*~^vF01S!YG&S;#&sGSEU6 zT9Jts?eCG17P8WG6Bh~DX+?%w$WkjZ)uP=#GS))YT9LUHve$|XwvfeEWU@tje`K_U zthOSvEo8S98EzrVt;lqXb^^(G3t4YP=3B^qD>C3h7F>}D7wrp@5tnJj#w#-8LUvq{ zAs4dbicGm^mynFPkTq9i&V}r`B7-hu(G{6=(Vih0bs?*+$gB(5bw!3<$g(Rk?V=q- zGVVgwU6FYgvhRuvypV-gWa35piDcx3th^#KFJ$Kx8G0d0ugKJkb{EOm3t4+b=3dC& zD>C>(7GIIc7wt8Y(HFA%ip;){-B)Dzg)F}!(=Xb2B;zk+{S}#iA^WfB00>fue&TbP*Jt1koNP9R*=5tLQ9< zTCEfv2BFKK=ro9SEa^B1T?a+yLFhgxIuJq^LeYs3?O)Q75V{hI&VEIYA8AzLU%*a;SjnUicW`Ur<0C{(DhJs zK7{Uvq5~pyK@^=3(Y_}g5uq!h=!^*65k-eY=#nTpC8AwWIwnHbMA11Bx+jVbiqJ(- zbW%inqI6V*u8N|wB6L?29TuU>qUf}Uc1Y>C2wfLN=SAqgC^|4g7e>*E5xOyoj*QTi zQFLa6?u?>CBXnsLof^^ZDIFW3Ys2}}QlWdJ=->!l97QKbw3kXpN9gJ(Iy*vlN73OC zx;%T~|6r zLf1&qITE@@iVl*{MN)KDwl!UI5qO&A)mlPc)q06M`G>LX(={N~pC*H5W6uM7} z4wTS^Qgot3`?GYUgszmLGbMDV6dfv|OQq;kiFRx0SP5M#MdwQBUMV_QLKjQX$rA0| z($NyST8hq=(A`pWxMcf;poLDCXeXDBm(caH(D@R&UzS>>mI+-j3!O00zAhaxp(|#g zGbVJ$EOf|(E}4Z+nP``HeA{J0*UUoaOz56j=%5K*Gz*=pI_= zAPQYX3!OyK9y1+9p{r=2vnX^IEp!-#E~6zRXQ*h$nU15-b+piV6uOTVI*>va(n2Rv zwEs*;Qs_!r-merYbSEuzD1|Pig-)etH+pT|P@!vSp>rv8FD-O1g)XLrPNryYnvSL< zeEEZALB~*`yJ?}rDRen4bUN8r+hw8SDRez8bUuadr-crv&;_+r8qC+xx0Yd{LRZv6 zXH@8pT9U?w3SCkQol?;*HXT!;Yigl$Ds)dRbWnvZs)bIfXiuAts?b%n&{-9_tCj*^ zgbH0&3!PTc4mTZFq3dedvLaOIzFO$O3SC&sZ)-zE``vV8g|4h6Y(uEfowc0Z94d5a zEp%!{yWd}Y$L(l4&C+jIDD%I`mhyW;g)XjzPOfM#oQ|&0)wR&s6}r0?I=n)c*FvXP zv@>4hWT?>fwQM`h{psyxp#v;*fh}}`Mf>D*gr)5kSm+E3-C@fQSGnDN+FR%pi+0T$ zNT|>?w$M2iy2lne$U+y{LMK`1CR-le3l+M`mNySVh3>K?`eCThWwy|17VW6haTdDH z7CO&D_u2COvrwT6ZJ`q_+Fz$5Ep(+VuKz-X?zDvtwa}%ujC~U-+HI#}Ep)9dyCQgg z^!A3(!4|sMA#}1ud+&6#g|2o8oo%7J9YTj&=yHclNemV3#MAK>y51plzJ>00NY~U* zp$i_eI4xAPFMl*WROpI_&>0uH;~{j&g)VsropRAGJsoqQYaU{=h6>&Dka!!{vtn}y zopjNjJsowSs~$pUUFfcd^l^m>UG|Vd?oiHiCWqYQPrB|QAA9(IiuMjE;SCkK@F8^K zMf>^feLOB>YlejJC*AoFI`l%9KI8;{YIna>AXMnuccgPKbniRf=1;o#9g7A-MSK1I z`ID}GM>_jLcfaFV{-n#_@i~8L=bw(h(Dm=&9PkV6MMbkc*cCxe=rQIa$2Wdw~dotQp(Y}awHaKU8 zb{Diipc#J6(QB4n^W>W8)?Bq_n>Amo8DGuWYSvZrrkeTG+@)q8HGilXK+WN47EbeM znhDcfmS&?gpQITf&FN@XM)N9~8PVLv|JVu5Z)k=@b1a&r(L9f4iZs`x*(%L zNlc(2B9H6E++RgITw{8QtZ8lRMN-gn-p@k5OV zYJ5-QbsB%uc$&t?G~T80D~(5Kd`b2+puI@rKN`=`_>9I|G=8G-5RGqWyh7s-8c)#p zfX4eXexLF9jIU?BJmcRP&(8RC#+x&Koblj{?`FI<KKV>{A<3kzm$@opo0H8f4<0~02$@oXcGcrDr z@rH~aWIQ0_`xvjs_&dhaF+Ps*Zj4`JJR0N67%#^7FUE5*K8x{IjGtmW6yuv1uf+Hx z%oyK!BE|3$2Q!x;j0ZtZFp(JMH~LvaL$HjHr%q|lMRP#cw@sA8-Cbu z!iEPn+%MU-cYLqmcnz;hrtTe=YxrBk*&3eKaI=PwH5{zrT@BZ2_*KKH8Xnbfr-m;z z9I4?&4HruG6Po`toTuSA4Yz6dOv7Os-qLWDhMzQ?q~ReA_h|S=!!a6O(Qt`|KQx@7 z;Ry{lX!thMzHXY1$S%QS(C$>yw&8YCO6Fx$rDX(X!1dm z1Dd?gm@->sAnY_&8VkZAGIhV<^Om1cJDU(B)yvgKBCOjV)7A_gP6R-ZX5g`sAh`Zu;J)zis;1reAIP(x(4x`pl-EZ2HEgKWzHI zrr&G&x~6|?`n0AWYx=IHziRrZreA9MqNe|8`kbbpY5JC?KWX}qrr-Gg`-=bTADTX) z=?9v=pXu+JKA!28F{#ndy(2KA7ounZB0kUzt9Y=|`Eqlj$#+K9cDd znZ6Le`ms|m7({^OV|iFkmX(#kN@m5f!dd^ap0Mt-gmsB^l68pn9cw*n8EYPEDr-2a zC#x;1E~^|XFUuAPB8v4V>niIAYYS@$YZ|LRt1YW4D<3P(AH*}(W!65{3f44MFIGcV zVOE-t%VV8pZD7r2^m+L>YZR*qD>v(3cMvC7 z%UAdt2yhx_#i@AwON0}1u>UZiuG$O-#5z_!(+x$tcYknmsN#zEh>o7ELUU@+gZ(6 zk0OGY&dSN!9UeqW)}yyPmss96JV#h{S=V0&F^CoSDu_j_!mJ-&2GNvt<3Ik574>fr zpRfWixPMs{SV#T|q6I7LInN!|vu8n!WyL)W;$xQmZ|(YJ=cq51$EK)Iu4hv!k>(+H{JL|wTZWn9GZ$Ttp-GkhPcmA?cLb2^BwtV5@` ze%APtLHu@t=OOE}<9z+kTn}s2F`|1k)#wjbj59Sou) zYvX|+BKPxrVSV*O5Ks4Uove9#x&A#t6k(0o9mLUH{Cw@?>sjl*=kfWD`;_(J4t}n; zbN_AQdRQyB2Jv7E_XBIlW_~_4@x0y0=dvbj2;$(kJpSvs4%Vb^xX;${-20k;XN_LV zYtxsdyd)pP;(*=Ic8=JWIQDbK5UL6l%wKH)K$8^qR+xj*OdvoxE_V6~dX z_dS!>vyb@RXYgE~9z@oM{Oq#YP2=CD^1PYCV>p?|coO&FL|$tq@bkm6jOTk9$7{)0 z?&~o@oEgp6kK(Zy$!%d(9Kp}ea9-zz@j5j$h{Z#AEgH=CFo@eQkk|16+>ZXd*7pmd zAnW}P_}=^Sef8n>w>RHMuOR01y6~FaIfy%*cs_vpL-8E7 z@VJKrk=-!}cL#1`dtT>R1>5m6(3aPOHbIna&Cg&fp5HCGt`@n=*1-h_`g z=HDCfc@2Xo*?`BUK3`vt=WbmtuQsm}wYYC;29Z>Q$F@4JJJoo-ugYt274GZGJU`y& zd0Q!n9TkK4x&q&CdENuc@pD!-h<;_bze)$us1)~0NgmS@Jl4gy-9@>KB7A+}APyJe zd0LSB^F5w31%l|EpXX~np8I+Enaa(5m5b+GPOc{hk7F=^1%UuY`UB|T3*dck0DgA> zZ(RXgcLuQ65x` zjqw3YjpH(711K63Ky*|9mm&lBIwF8E;Q=&y%k{ht;PI;f_Pq>X_J09%{Flpk5x|S* z0sQzZfVofk`o9Cn`y_zB{tRH(;{YZ<3ZTKm0J0whaOHjg%kKry{cZq-?(jLk2e9o{ z03&V&Q1M0pZ^8oj;d+4I6%jzy-vWrZ!rw0kF!ope{Zat`T?k3q{j#B~HP6TlBIN!t10aQ8`z|$k#_MZZ<9Ok+Y1#skG0HY4@b^8Md+ZVtmdjqJx zhtJ!^W$fhs_@3+A5x|D+d=J|KNZ7({+Z+Hk1(3Xf>-{zWwVsc!3t-dN0kmBkK=|qa zR<8=6;mQD>tl)839zcaq9)~Xjn7A~6TuZpm7xDdm5kTBRK6gO?wLS~*yZi!}G%tYQ z+yM4`96-A{0X&-(z{fKKDDY7LhoefuZB+rR3kjfj#{j--&-1EX00-LyP`h;iKey!ZZxO)hX55CRTvp=% zS~LpaTm$a6`T?A&8$gpf-2b%#s9!Tc*NXeL8qdWl0hFyAz~)NamWtfo@&WpB0eo5} zfW%Tf&L#OCiwDrV824EbE~_y2SHS?vy~l0I&*$b1U{;<0Ugrv+PfngcK|ksR{Mh01 zBbV2Yxo$tbJ3o3j{5WItqoUQ1m05nIX818Q-H&Uje$-6yV_lLT83}wW-jB<%e!L&! zM`)BE(Gh-h3-|Lo-u%e-+K&%k`f>MPKWe|=a-RDU_0$jbw;y}{^271ikHL@pIQa*k z`@oNh_x!kW$Bz=X{rKpXA2)9JQC9qzecg|nzxh$-Dj&b>$Ms8o6u;=lI0ty5;@oTGo#VrTHF8^86^y=M?qheqkQNf_}IQ z@EGLh^YZd|=JsPqPCsS@efZMv!xpa(huuE>>h$4(-G^6JA5yY>^f7%Xl+=nG^d|3U;hmHUF@ZAd^et7P~PfvX~@x+I-fBJCg zkq^K9;e*`w;nrOr?%ej_-Yu@{h7W&)v97VM^7qSp{1X3ufzLa~=bz#0PIJ3X`f%>J z4=0cLaO8*&`w#o@{UIMV9q?hz4}1@MeVD)7hZ#G4826nIgSPw7eX9>`H~Y|FqYv+Y z>qC)meDJUJA#Jq}Z&v#7aD@+7LVY;;r4QSe_^^DD53@e^VfX?cI?wl^;XEHo&*f`o z`w%zNhetDfIRBv!yQccEY_bniCi>88ybq1W`cQ1N4_PC8cs9(33qyR^G02An1AG|P z&xclheJI)6hs+*6JnrVh&t15$I{7eB`Oq=M$M1UdA-yf%cWb_{mOgym+=u>6eW=yg z2TubZ{;J1gQ^$udYWdK&h7VP$aaompxLL`EtrdKjT+W9UWqin4%7-V#eb`r&@1ro^ zdqE#^7vSsj`mj5<4^wmc&?M-E)8~bFyjbhWqENR!;5KYUer(VA~n&A zU*f&^G}eoj(O%dhytw$*iv_Q}X!X(y>kBW=KKF9W?nT2VUL-vB;>U+xjDO%og?nB+ zz3s)fx4h_f!wcVaFE0G%#jGn{RR7hB7ZP6iz`P#)^%>TlR@(aDVKHtmxj2C(4a$U2%=snYmlDwh+_v#vyf>DA zALT{&5nlT0UMw5T_cD;%-jDmKuNR5Eyjao0i;CU6IMUM%duZEwf@*P8pL zr5E>`c`>Gm7ikT>2(9l$iMn1Kti^4w;l<6WUJR)0MR-N7v%D9sGJId9yeMA6i@im? zs8iUBGw*rPA-@;5@_5lF7x!h*gHe7DB0L^Ub9p$2^2>$+tkH6yI|K;=k;q#yJbx-*E$6U@sF7G~e1aco4bLgWfAVIJeA$ic3BCYLN#?3%RV%Jh(WIkInU9 z*=!G@Kk}gabPtYA^`PKn4`xsB;PF@w8jtp1!w3(*XO!DIn13JOLEe5Ie$SZ)VLkc! z?j9`Y;^BDMgL)PZR&?;-Ra*~QwDw?K3$DMZ2W=XAu)YERU6xbc<{O^mtC3L zU(tgnbjuxtF-n{0lcGEO6u7 zPu;jY*Uh<*8^vb2(P6q9Q>VJIagrOqj&~zsj2rn!xzS{}8$*Y1*#q6!-_MQPecVXw z=|eZTL< ze-+%wF6&02(r(l$;YLVNuA`6}GYhz}BCi|Y<#MyH<-!f03(wsyBsg5~SY0Tbr+J)H>E-ZfI!rGTEY=7axfoCq>dtA8m*oB*axbVk47oOdA;mu7K zV#8cW`OSsw%PzPsy5K+OLas9|Cq9SFWp*3pp(=e&>h_uiLnA zucZs;o4N2qV;9ynaAAI37sl3dp?h@~8dq_lOeGh5kTM7bwUWIl4@{sSlW-*sZ)?@oMh!-*Q#`I;+EJiNrm&pR>yj1%2Y@%hJ{NIK%g z)gQT>15S+I=S2P8eC~Hn+}Y;D*3De+1}7SR!^hS*aciX$-!6Az_?J$8AAu7I3%L#R zxt>qBZF8K+J=2K?A38Y}b7JsBC(4d<;^inO_6~Pq{1Coopc9cFIB}pim)paMDqWp; z3n%u3I5D!l6Q$cY@uUUU(bS2ajhx6?pW9a3iO*^{(Wt5uv6cAT@?3TqCkm8w;(Adh zJ}u-#odQn0%Hza_oKAEKIFRLW;76weLu?M@&T`;_anXUpXC3H$+JV&L4vvK# zXmQwqX9pZuu+M=qyB)arodd(RIbhr5z}9aaXtvIQ$EzLq=qm^EhB|Oyi31(KaNwWM zxZZgV{{MS?Y^DS4raSQ06bGhFbig~-fi0sPs6E_)D}x>AH^70&z7Bla%Yi)I9oW&? zfjY{8OC22O-qyj-vV-4!>Of{A2fnQDK*2f=d{@JP>Qx;$QOSWe<@tU}JNSLO4m>I1 zz{r9QMC9Z9%k4l)(2jXNI~*=M=i+wwv+P)&Zb$AEJ60vwkuTPcHIe-JmOo$Gk>`aS zE1%kt<1ahDd}xQ~o*fHs+mUs{&iRBL@mK7aaLJDU&e<{W7d!5sumi{JxOCW#MhES@ z7uivEw;kVnXGdVG9iMEnBWArF!@joT?kYRltgv&e$LB1zWA#Eite@I3X|5fA&a$J! z3_FfYwWGu&JC=^)x<+vw!|mKhc2pl=$GX0DWcIXUcsDz)b+V&|#g4V@?MP{DNB4x0ix_10q(~fr4?AZCf9nSK6O&L2bl(3^@Q9I@qwBu1eJL=}JI(FLddb8L!&3?$8TD(k#UTh>}}cBK_hLb=Q(RuuWdiiV$A(d!c{rp~rv`3x)e zOts?DL_TLMmod_cT*IuWIEd@$XGQPcR!r<}#e&XOthZQkpuH6rT3d0ixfQP(Tai}Z zia>2Eir28BS`{mrRkWg0St|yVv|?OQD`pk6;){G%tjcA@=0G;~da`lUk&Uz2*|?gX zjo*{A@hCnU&!e;PIy@WEudvyuI0Hk^NC!*e$qfm_+gA=$|FTQ>6i$~vEo zyua}0iEQLP%Ey1?-}h(3znjnhE*p-meEmi)=bLQ)zf9SP`YIc*mSyAF;%q!zn2lSX zX5-4o**G&Z8$W%RjXjgIv1xoZR*ufb=fkt{(co;1?VpW)eX^l?WOGcAjjAdeMLTdE zt+SERJRAQt&c>bk**I4_8$VRf#=6Scm|r0qe!*|M-KGYgYbv(O_k3-x2OP$)7BX|J>J*S}f#xL{;SeJ#2Rea6z zEbLs$$G^w|KFdPMPx$;!?SQ_a2B@p&%&fWS!mKDi{CMn zg}at4Y-yi`v8}UEr#Y9|C<~YCWnp=(EcB|Dg<|h#;YGPD>@CID72|UXWg$6V7Eb5N z!n{BxT6!{Jw`cPEYBTY9S|-{hWx^So$sS}T7QD$si~ll_`79GB|H{OShnc8#FB1{B zGO;Tx6GN_MqVT0m+&Pnx#7tZslZmM#GEsa;CVuOmi4Xhm-#s$f zgU-YhOC}1n&&2swnHb$H6FD1Y;%MDWd{8qJSyeLG3(iFQvYB{OA`_uSGEx1#O#GgQ zugj6iOfZA@(F}C8W*{m(1EI+os2rbxD^VF3{x$~ihPBVY>sA?<)QszFn1NY!x%?U#__Rs}>=iQbd6^8ji)UbQ;S6~5XJAS040rM%S{F%!*oQ|aZe9fM8JpL{n*qV+r8`4p2T{g@Dyj_@% zKA)!J*E#8^^-(%DO-+Y)LOQ06NylHq)6sq~m)$QN1$(FC({AZ_iF9=8n2sZD(owiY zI_5P_$3OM>yjtnlTQwcQis_hCHXXN0q@!k$bgU|n&hIKqN7rB)4tmlMw5MTQRvNCR zrlD+N8a|Cl!{hKY)O(eNul`BH>nCYw^(YM+?xi92RvJRW(y;YP8WJz0L7hp%wi9Vc zIFiPBO&T`tOGDJoG_>5FhEl!l(u z`1*-y2p^M%`XkaXe{dSE^-DwE-f8IHEe$)6hPNHkP_s=MK5CwZUmB&sRyPgpYNlan zl{83&H2(ibY5XqIG^{R^hP(OFkS|vndiYbZ+Lemi)>P!mNClEpu{16fmm^bQd!34= z|E6N*(^MROoQk*iQ&IMID!)}L6>F}h;`&8C=S(UZoJ_^Uqp8?&C>0O(rNX~670tG% zV)CX`Z2u+|cUPyvxjYqhm!@LG=X~v_skk^N6)`hXQG9ADEEBkn(R}@|RNNexij=;o zDASYM(j^r$EUDPsj@#2R6%kERk*`528r4q4plYdDSSb~I%BDg}q$0X-D)JWKI&!C? zS0Du+xl{0sEd@Vkq~Jkv3KHT{kT)s?HQ%J5)4wSg`!oe#JWj#(`zbj6dkXG{r6BrB z3cMFmQ2I;?8lFf&*CQzybufkbK?+uXpMu?6Q}D}%6#V{m3SO*CLDDile^CmGEJ#6> zPg2liRtnUIDd;ze%O9J9StGcP!F+AM6m0F4f*-nadsGT8v`;};E3UI?3jS`8f>*V< z?rL0Kr4(eAO@X6C3VelAkh4Gv^5srJ!9X&KxRX)bmW+}a$tazij52Y_C>zOo&3eJ# z|4v4!N69F0FBwH|C8N;wWaPh`j9llF;XjoO*Rf<||Co%FACeKfD;aOLC*#?sWc=|> zGH$L;#;?nhadJsA4lYc_j(N#gH#-?irzhj%$;p^FE*XPHCZo%cWVGy`j2gYUo^Hv= zfn?6xl6k#I=6gxTg$BtuP&*mxt0nW;@O5RA(Yr)4S`|begb7=c(Ba!8lwQlftw_SXrAgTTc@jSVGzkOdB%#iXB={yL;pw;} z937d2r9+Z1uzwP2_D+JMYZ4x)BV%^_~81N_&rSI`M zHxu#0wM0z*H4(MXB_iQuB90&BYYru%(Y{2aexHbwTN5#RLn0b{ort8b5^?0qL`?Z2 z5!L1=;?0~yd_N-*gQp~-@c2aB9hr#GA&F?$KM|R|5^=O^BE~DOt9>H=Xvx1d;kMLI zL}JZE<}%!l3W>;BIuYlKCSvM)i71mN5qAO!Sl~`TEn5PfrYB%|QUaR9CUDG^!2Uu4 zT0T!e_@4>*`auF(+)iL#m%#5qOhDrc3Hax90+#-qfSQLB@Zg68%-xlM(%Tbod1C^` zu1i30WdaT@OF*|p3G5MYc^@aB-bV?zKP3Uv$0s1)s092pBmrIeC-DE!;&I!44{M9ZV16#)9Nn`%3$KPx4@yhXdRF2Op$>$g5>+U&mqHKXJ(MBo3ed5r@>~tKO{~U)Oe~d$! zAL6ifXB?bc<1k}G9R6J!haO+W;o{Ob)ciaSo9D&BKPwJ1KjiBt#-a0=IGh|7hq43X z`2P;XA+cK=ds=b0(moE=T5(xT;*eG^4nu0j;d13TR4yNf6(!>kS2zy6^2gzL&NvkI z#bS;l7Jp{OvNsirjd8I^i-<+vSFt$$JQn%?ipA6ivAFSjEZz@`<@aaD;_10qG&&WF zHAiC+aWEEb_r_w=cde+>FNWAI&848l`l$PdM^cM*fLuVUbM9)pg5#US)S41WJT2KmBb(CcyxzBw0z zM<-+0Ba1=5gE82!hrjQLL7~kt=>1I$)~w?5m&G8*q8NnCkHP12VsLJH3{oe>pw8GB zOc)-6odaX=q)!a;caMQW3>LJH!HJeJh-@5#GWEEe8Zr3t{TQ4n8-tkQe5_CmdgSG@ zg3&nUj>do1Xyi|iW)>BVsnOBc`X(CkA{r@AqEYT)H0OcQ_*kN`^GY;so#*4HqEY%- zG%Sbs{Jqgw|6MfBZRT>miH3hwG-`xKqvxV%%$gsKjdP-Lc6v0PO^SwnOf{5EbJDI9V!~<+ePE=7SSBrN25^PXw<9DbykYzTqYWeibZ4Fd(k+RI~sTWQ3!WN z!I2e(BB@cR6(5BTkx>}ce|NRn)r$0yH(T|b1y)P2izmLSlEs;36 zJ`z8!j>N9eNNidZiB@x`1-%$XjEiIXBRWK1Nw4~sOb_kr+Lf!DnvaIs4SHikrCdYcGzY8HX= z4Y=Hz5x8490{hBEV19`R^ePmA%6TJ@6$r;2S2%WNhhtW1I4tquC>j}#h?n6w^DG?8 zABSVWy>L{y8IIJe;kbGs9ABRf$IxTpsD6l#?Fq-PJHqkRrf__)E*xc7h9i7wIF2q1 z$J|fC(Pm~i{8Pg5`?zqd8xfBFgThg&Z#e$#7LGkC9OK(@IW58w(=Z%|YlmZ6)o|3V z5YBr=IDRS|jw$)VQ6mSp$Nd)jtZy+Y?JdeAyv5&1%g)e|vp@>~(f$XZCPC59c|%Gxyxn%F>!v zWXf7e%5UXNW-AkuTX_`Iip$+r)(5uI$-9+Q7cqCI6$Q&ynoU}<)Nf_sl~%r-Yb8LZ z6%FlHI`3~Kac3*qTUtd;(^m4Aw{m__D`OV4QZc)gt5aJUKcSV{F|FtgYh}WKR)K|R zpO5Nh4R%G)ixG-$#2S_|?QTgW`s!mgt&{5a5p-R>5YG+HQJ-@?9? zE&Ng!GO2}$$}MD1YhnAu7T(LZU^KjiAp={8=+%OH*A^Pui@)b@Gk?A{WA&k#QLmbb zdfd#Sd(BkWH?yy@nGZ$HT+eByds;Kj@y#eiHWMA(48F}2xiz!dp_%(u&1jo8^YLag zx>uWNd!ZTAlg;!x(u~9YW`^x*#%GJLUDr(L@@A$k5^Jb5GkbP32};e(9p6my=w{{* z71w^^D%VU>r)HGfHWT-&iJ4!Thd(n)o=ii9HjVC>bN{hc)5bzX`dXOjo9oGr`j!ztXS75>a8}?W>F(MR2qd(u8|%}jT};JByCh9 z{f9Jiyl*2p-5VL)u@Rj%qW`0TL7y5p{^u_M8TSQycgh z*TC|K1{{MLc%L`ZX{_u7O>h8t{;5;J=^sjQU*9-Z%Al zKCS2e{d$Hs){8S+JG^G52E~2Vd1;{kV?Q);i&vtfO~D9V&%Fo>hlMavgCob=(W9 zqeDQQs7Y1F2B$hM+SK88yN)b_I-Xvwqw@tZce0MP+I5`TSBLG6I$}1}QM0;^&r9m) zt6Im5xpl0cUWd-aI?Uzk2pU#LUjI5C%GL3wQyl}_)-nB8Evr7)3QR*S*Phm5f4`Qy z4YlM}*3wc`%g5|mI;GY!EUuR6;k7IYtYy1bEytZ}xo%r4Vl1`dJyuK1HDPn1mfDlG zJl3w|)4p2T?yRNfW?{RgmI+I1nWI|EqPevq7EsH!iM8yP7wZhG<$Qm!mRv0+ooca^ zsm0-E4ep<6@O@oF@RJ(C@6`}fUqeDg4Jm~+0*729a8os+zIBbL?OsEke+~H_qB)9Y zEyku|?q&_yS87B}^%_!7)R3fABYe^|L~g4gbVCgRD{Jslufcgi4YspuM7*m;oEd7k zJgSD%gKIe4r-t3#YS`GJM)(7&S@5lzY459%e^JeVht+g$t`>3XYF?LA)0$gNX<9X@ z@zsPzRO1p<%`NY0F1S>4z^3gx7eT0!H6KS;Q$IxL^{vLedo?#?#hU-BSn|CJg%4G9dRfJbhgB3d zR}olKg>h*Whw`dWPp@KBLKS}_s%Q$TBF?)C8<#4M+f}jDT+A6&@$*_0)fcJ=Jz2#~ z?J9Qcs}ePR#hRO{xVNf`=*3l-NLB2dQ^nM&RkRylMcpWIpTSk=_Nii3wLO zQo+nw6+E6?f$g{o7LKUk!+;7rdRDNia|J(SD)9eV&W2Cr{CQPQ;Nx;Owu*jjIsRqk zVsBH<_w;f+6Utc{SSx|Z>{ zT^T2Sm-78{DL3Af()npA*7r&oR9}i`c_|77rG#aaGCi@Bgve4TT5BJu9V_sr7Tw~C2wvii>8;7KB1KPV@in| zQp&WxrG#`VWo(C1-2ap?;A;t%Z%gR-tb}X#OZZY>!qJKn9u$aw(ykozOKa5wVaG_FOFy^*TyWJyAl$p%R8`mIw?^3BT5saClh>wW=j7oLfTJ zv=RnQD8XQK32z6NpwXv|nR~ey$1}xzJ6g<^1I5JbET;G7Vsus) zQ?j@iMX4Br*~P*KTFg9!V(dl~^L9WnOM4dM*{PWCZHh(iP!WM2iun7Yh|Ld+2x%&! zO||G37ZH?Q#Gm9M*2feHJZceNeT!J;R)o`?B7u1>V!lxkx33k^biRo3Iz?R6Dk4v_ zh`t&{>|IwRxMzy^p<2Y^xkXq_E24RP5o1Rep)g-yFc(tj23 z^-}?pUl*|daRE*(1(ekk(5|$AIk^QKO)U`lDg{)A70}+lfZ6T^XxSIwXi-3cQ32nt z6`**bfUPtp)U0SHQewLRYl_8|4C0rxx&Bv4GyA3Q!qTz`){y;u68CB&?)g23Ht%!z@hpcA_j7n&pTqs~9P09OC`r#DGd_p7@Ek${a`5oT!PX%M zBg-5v8Ru~HdJelT}IKEcVN0f?GCn zce43pmQ9^OHc3~qaXp*O^tohk^%@Fewv)MH!oB2bs z8Q3SA&t0;qXe;jVGYjL7Spu_@h04P$`Zs0qt};vDnzBSape!yXX0bLhi*Z3&{PE19 z+A)hjt1PaXWU)a{$S-E`Qzwg3tt>n=vpBsqi$!a*L|i6|CsG!1v$HUolEvn6S;!C1 z;#0pYGP`GC(IJZ+e=<@0lF8@SnPfc9a%>E@G3 zjdLb0Hkl%aO4#XV^5#+|QKvGwpqpf!WvH5tU0WN;=YgDEK)Jde)6J0ydhJ{k0L z$)MCG14Gjc7U*XPY+D8)r!v^9oxy;;VooE28|yNdy(~jSJ2G&alfgQr4B9DV5IZ~r zt^OGd?2$o1hYT+LNoV|*bQ)f#WBfRsSuN>2s!qqcI2|cFotH`J*hi(aFgTqzUgV%44Rxys(dI0b1>3dvhjP+prt%#swQN-2cSN}(+eV-KMx~5># zHib4nlezdInfK3=(fTi$*7{^NmM2q~myDE_Omu8A3Sr5(_$DLgnvA|}GM`P8Ii#OV z!=+@FpGqd_a55A2B;&j_na*p)dP|adx*(ZNvy#c0l#G&mGOk0C>C`8gvt5$8FO$rQ zA4$Z#Ph$AZDmPh<|Z*dH3_SjB))|tvCAikY-b^}Ny6e*5+C)F*m5z6 zB%LINX(gezJBf#zlTcrsgui+cvMNbv%}64DLJ|t2lQ0^T#N(bxEb5em*S|#meobV@ z+eG4@B+{of5uKVuii#5%o1Mt@q(mAc6PX^A$ZgL=9yuh6I&+EG8YS}bY9eaq5^*?| z$eaC%EZiab8xnc7JQ37{j&dSTl@d`_5Vpe;Y3Y~9lz%t%h-QzZ%DavvC|d8Yl2daTIQgseTvBucxud--~5sZ7gR>VsXxnB_kDWohqN4t9=3zfCM2-(pC98$yEZGwy>O04vvnGa{i(_z5i6MAK45<@hC?6HWgMl%8 zk`p!^W9a)gnz3J^nfW>z^+(ZcY>H-YWi&bk(OgZB#xyP(hp=dTe4`0>i6+S=n%rB_ zROm(1bRn9@C!%?CFq*GBqxrir8rhZ6^jH{8zq!#2nHtS#g=iFpM>Dx!w1{y>GrL_h z^L|DleTYKsc@*mRqgYZG#j?^UR^&vnGC7J>QKAKj<|)PwLT(}E4Tatnp?^l$9TE0> zqnM`=#q70FOkWbkZX|UPbcwVI)nB zkyKPflA9k%Qd%V8v61+MM&jTTiK%lWSFIyCX%fl4>yd0cABp<$Na06}WZaHO`fZ35 zc#=py6Un35kyK8OBwap|&>@jH^^U}_b0nwQM6&B!1k2t=Fyl!C!&)NfSRKKK!U&o& zBFK)9AmnZYwtf-lx<;_qR_K~WFy%&sz_dj0<3t3l2P4SZ8G--C2yU&2;FwwjYn3CI zrX+O6Met>41a*BPi0cx8y-Wn>zlRHqWH>XQhKt{ya1pBsr@Sbf(9Cd562dtc9*&xS zI78jS`DPnVm8qD!5suNta5QzoQ9cw-uU+B1*cdKqVus_W7LJZ`IE$6S88S|+H#D5Q zKH<1@5ptPu7Ja`<|95wJ@#HQkEqAe~zRRAXyG+ZxOWTCIRNuXekKbL+xZY)mmX8@(jb3V%MzT*B*PX*yWF3aANf?FK!nl1d zjMc}&=&?VH@@-*QtqWt_(lB~TVmvbpi-}>Z8XZQLL17fgg<&Wg#=<|L{QDG2^2<=p zKL}-7LnyDyLh;WHWlu^dgQG*K4hqH0GZb})P=1?-5^WI5k;|csIvq;=;ZV#qLs_^b zly9p-30WlU=7rK{S}6GnpOW!q5HeuVJhT?pP!L)g$7f=o>a5k(AHtwzLPrYW$gB{0 zPYNMvbO?I~h0v*I2;s6JZ2l80@+X4vco~fPgJ53N2V-6q%+%aqs*{5`9~I2NpkR_b zg4t;w%pbF0+;0XW=>~J}WH48?f*HCynB+~tY+D)3H??5wl!L|pWiVx9gE=xZ7}-9- zcy$g&rA;vPUxPUHCWx+&gYaz%5;-qH)aD0qJS~V0u|c?o1Tn)qh$6=z_E-k-#V`od zD?yAn6GV)55X<%i(Yz&y6RU%eQ4hj)UJzra1re_x=7tB+*f$96u0g^N6~wLYfed^X zi2sv7v9AmizPUiw6$a9p9>|fnK)!|sqVE$(cjrJHtpXWi97x#JK<1ncB;!aR%l8IS zwKb6KYXW(w9*Fk*K;BOan1Hjv&w0Vt{zh2O!%o0KKjO{FDjc?00|Oy!GeM6MybC`?ICWpRxjf7N`4@66?>5P=A8F z{Tc4$kFBM@$VKtz>J@)Joc8B{wm%J;{;b&IPwFavlot65JhDH%r~0Em&Yw?1{n_8g zpX$#3ENtUXvNMf))**bf6wKi=8FCFyKfV-w@@4W% zU#$Q0<#U}cTS|RN$o6G$k}sDdd};CbMa9h*S6g3x-|}ULo-aw~eHnDzmkaxSsomzw z^mV>iF7f4+iZ9D%_~J9(mwzLC+1}rmm~OuGXy?n}A3kKh^AX>b4`*6@D6aBhOra0D z={{7(`k)xUoY8-tSZz=kQK2%@!LE*Fymk;|;w%bS4E%o8-N+0snd>E+g!;vXI zB+L8Ib%+l;d-;gmFdu&X@n*$mZ=7Cw^XxxwX4QLhv(%f4Y;T4od7~ZSO{~8+ZQQ(B zW$TUoEpHxN_h#aGZ_Xa`CT*X$$g}ch?OJaf7JGAlzBl8hdvjdTTg1S<`PtVS0bIsV z#+$-#Ui5hD#fHaT*f)96SmDLcd@nRpy+n;fFCGPXA@AwML3=O!&AfQ3@5Q)FUL4Z# z!tbD%-{HmR4PNY7=7pQ&Mbk_#22Au~<0vmI2Y6B3-3!_FUa0-_6r47m#6I=pU5h7* z)t>Av^u#&cld4!xx`cY7=IzNvM^BM&=E)NSPX=H1WZfxG;TQ5GahE4=H+nK^g(sU; zJu#W>N%AC5-i-ES#2}$3=ZSs?PojQ#@aTgFeV%);@SX>!Ydr8Q@}NA!gFkT|Obqit z!^ZFo-R&V_Lmu2);Xx-g52nrWVB2I5^v8G*JjjDe zIS;;f@LQ3EkcfL$=r_UI7rVVmut(;i9gFCl=x#9Q0jm&3m zw6?nOz1odFMQ%*VaAR4V8~Z}txa{qQouixBtGbbEAoO(I_;S*XZdz`P+2zLEjc%-6 z?#4mf(4FOm zSAt!|nZp%ldsl+YTuIP(CGVmu)hAqeaKKgYCb;r*oh!0SUFp5Rm0>en89&~Y86#X- z(9e~nU0qo(w)h?tjav^iB3)xC8whwS-eRpS;wsU5|4<}~4b7K4xCx$mWiJHSs$mTooGsTIwQBFJv zbfU)Hi99{{c*Ds?C3&vRnJR3`?G6Kf20;&U%y z-_eP(KaM1SawOn|BR2OPxmN3lcCjOyG98iP9mV^>kzPKI{Bm^Uk%go1_d61!>xk<~ zM{XW+BzJ3LT`j4k^LOG)76oSGLG#0<^XRT81=}3c8v}^ zDRUq{$AQ2k2W~|;pzZI#a#sg&&UK)Zi388BI*@n90bgwg^fevO-0XnLN(Tn1Iq+q+ z1C^5;2pjEy$v_A8_i#XJ@4&#H_I!M2Pw^9b0avi+YNb7!^X-|OYEOq~ds+hRiFUWg z)XttgruNL%v#0BMd;U9WPwZYH-)hh9)%HwVB=qOn(=f%JV0nA447O)YPkTnn+VkPp z9kM>$!RFZ=_O;$&di5P-3hz*nb_b7`I~)(b!+g&>bh5ug?d>~w-?)R$1tB|r2ig61 zsM5HD+nPIQsSDeAclfPzhupDuuo!ZOt-bCrvf~|||F$FIqa7EX+acYvqeG1y#f5fQ zr`xeL){dbec0BO3!_VFhZ8JM2>)Y|+f*mo(h0T6D=5Dj&*BU!g)$O=8&kh0Lrp-7z zGKScp*Gr5$+VS_dEvX-Ex$@kWdG~C^b8ky*p)IG=ZBdG~84HoX2|gZDEV zwzk^Pt=fi+0vpbz*`OF>LrahimL4`NykjGLDmM7**`RUWhR(-qNZM;7FxNH=S#3k{ zLK}3IZJ02{hQ={A7!R^xmYfZb+S_3L(;Df$H7}o79z; zS|j(}O5{vhvGtJ^zZ$G?FS9}|$BM^^Rv3j_q3CBtk+T&?t*q!~WF@fIR;)T@#p^>> znC-M;;s!Cl)Jovrt&p8zg|DKpA8sY^jaFRlY{h_omPCKHWbI2!Uf#FFu-1~1#g-&x zSh6Y3lD8q27<&nsgCz-OmaNmagESkQdff+M>v_`cBsqvaO#!2-{jLT7>nNh2&+($9jbE*9)+W5M$;=A3zD&Y%Cx zF|ISGSBW_;ndahsWlm_QIkUXY1?JA2#pdRe=$o_gqB%{+&DpcxTyRjCb8L+{9~PN& zey%w`rfstl7`irZp z7+VXuv6#PNM&HwB*l3y2bC((B8_ejs%naiNX0)GShMuAszlWJ|p^q6KJDG9(?`@uc zy3M{9w`sX|o6R-1DJ#6q()8P;$J|Ca_%`7lw^6ur8+X&&^wYa7&TY4mIeME5dv5c3 z^KJI7yiJ|zZC1_}HWP0%ebjCI``>0zx7(P>+!p>fQ%=4%6+BI*Y^*mWr^J+5S*G~K zo6eFm9w zt%oTu+L^NH$1T#{-a_H=Evy@F@w4m}`*UuI*y$~1gx?Z=%v-c|zJ<2sEh-FdF@cEbossb28*zTV z5m{4>kQ-;jjv+?)_cY=|2P0H|8Djk2kjf{9;{0#O!3sm}<{I)X$x!fz7z%DHLn@pN z8E9pQrlBGJx`w>bF=XaJLv*(rlD^iE4vP(0G0zZ7B}1y^h3;TOcE}mx(cX}UKMWZA z&Va*@4G3;D5a)dZCg&KSlW0K1T?5|x7%I z7a4F+*#Pg!2HYQQz|esPXmmHguB`#(-)_?N%}tg(yop}@O_EA(@;UP+Q{r!;6?zj- zubVX5-=vq>O;+5v$&K?jNj!R!_j_)lu;nJZR^G%`^(KY0Zt`!!O=ga~iFUu6xOKTn z)jxe?zvwgfrM}=l&=;6KeX0ue>5#6^oEUu$2kGPNu1~S8KEF-$nRHE`ooDnhJFHL2 zE`45Y&}Z;6eU>fI=fZS-{1k-!P<`6;)@O1@eYX9+fzgK>L_NJB&Yw5vTzP|;c{k8Z zzJY1P4PyL+-1!C_t!^;Q@CMs;Z=kPpgOCF^sNQyipKER~TKxvg=icDtlpENOxk1Xn z8$9fOgHG*kF!{S48{X(~{-GW&^?Ib2=}To`J6_BW*W*(kJ$iT6L-Y4_T%KO1uHrg9ldrSF?>aXv zuak1=I-mDnXX2Xc>{Gsu)?cE3<|W34Tw>;(ODw#8N#N}+v2)`k@m{?o zxFs%et=A=Sp1Fw4lZ&{PU&J@@BB4GPi8jAT(uIp;?7c|d%8L}wx=8tmi^7+1k-AS8 zXlT7aQ~m{7B1Ll%%}_L*3p8)LK;xnd)K9)Z&43G3%3PrI)p-hP&y$^gp46c8BF=xF zh^yxb)H;vndQrb<{&_6Mp2tA$JePi)?=LTmiTil_d18l?Q={yca9O7=jgfo z9BpQt<>=$@{Y;HJv3O=PY)2&!XpemZSP-*>dbGs$0%7LG>(sCY1o*}x+8SFlv=Ip)GY$`a- zjHuJ}ay`vE!_$=NoF-`7X$%*gX7A+Fs0=twf0@&~e|d_+np1eEokBP86dP<#p?KvK z{|=s_cI_#G=bqx)7$NU|igDjg^5egg6c?Qo96TpE;eHay#pQLriNkSK&L|5q~ z%LbjKU%Qh$c&$TNoeq~WbXXLuLw7qJ>aXhHsini=^*T(QufsQaQSYgT4hG*(u;Sqf zRL36YM~~w~eLu$0hsOjb>oJ;Qk74C;j3u{@@%!{KB6l9+ z;F4nuntF_qLC3h>?ikbF9OYr%QEW4gq8@ydPqs(#xq6iKT1WY}?kHjNj`YxBITHpX8LGxq*rvI`EgC+aYNTtuA|!^6zf zIZV06VYC+>rro5&xb{2DtbbaRKG))4l@`B~wXpHiLeWx-w2NA7+^5B}m0IG=u0@X# zS^|5d#q^Jd$Z0;rrrbk3xqFCnj)!Qke+b*7hlFqG5O<|R%vU@l_*#U{uY=rwe2^n$ z2l*U-kZWEC>3I7fmS+z#K-A;%Sb9+8lpiE?@Ij`xKS=zW1E|y=5S)7l#OHTFV8{-z z{OSRU4;>I#u>+LNJ;0hV;@VA&zwW2_{(e>z?k7KLKkBagMQ-DMfnnKCg2sMkEZk4n z#QiAr+mGkpeGGcO59`W(bV}aGb>Dq_HQ&dv3;TGmXP@}p-6wMC_8|@1C-A@f81sHF z_Kkb#n7x;ap?i68XD=Gp_fl|pFLO5R#c%#z`i$L+UXQ)J`L>5`5B88#vo2} zhxW#MIDT>ub=&qJE!u#yBYj# z7ia$4MQPzK#zybrn(HoV4RFzCBW;DvTF>Df-MSL~!JaVKMa zc5>cqCk5wrGEj3T+RJv5Fl{HDhU{cZ`u{EnBF{-GWT`7QxB5h21x{V0L5+i5s`@L}d%T#%*DN+!hXh z-;C{p&7>A>=4te1H}U1nCI;-<#M~vD*rv2e@XBry7>7+HzT8NC^+vv?Y^0C>My6SAWc9_39ND`O z!xbCxoUxJQp&O~~u#tCfH_)kJ1EVrGFgJJu>ufi0_{s*Z9o&H3nhgZc*+BZp4dNZP zf#)CBi(J+9^vGS$sJrW#;jkWcz4dI?UeBQo>&0GmJ%;k@xzl|;K3~@nd4HYYHC#tY zHd&Ah>@nbB@F6JM`lbnPkzrLCf8z$#>| zR`L7dDn9I8#gi4QXqvH#(xIyaR&Ev1Z&%`1zY>Rxm6!yrrZ%at~ZwYq_mvA&{32H7&7+|o3*TTFe2XXJQwUi4BY^5-HhJz9in$s#(&E~3nBk-Vw=t)hHEV1q3R<1$1mbY z??p`hwUBp@77EDjLe9i4WTyK)fjH9Mx%}zb{cA|QB$MS1T`{ytD*Z#mFbUFg{~@Iv8rget0HHtO0JG7x*Dn| zsj2dKyef{pRax~5{yq9XY?uSF(BB>Mjo_jVjMsohRWKP3b9%$mpAvSDBo>xPyo-^9 zpIAbaZs+p}36HH3D^x{aQNq2KkpEo3hldM94$A@-#w_5a>jJC|7odD%0r$2nz<>pe zS6o0@&jp3cI6KXydAakAaHFuTkOYW)+Mj6%-Uy$d^+=>-&6UAI!(M za6XHo=JTKPe6HP`&){S8iQhDzjSJ@UcIc5^7aGKUQZ=g_=*4*O@%;nnatoas1+pYLX)*DxE|%-NU)&8C;lZ0vPsGkE`O z+*i(K)XdrV4xKIdUS|{ZW)>6cW)Ye;i^&1A2(uK|i(DW%o=Bmdxbul$l%@Fq8NHW}y9i1`jG`uq|;06<#w~ zYC40|(=(W{V+MhXW-x5h3~c(&5V^+F(S0(VH>K0r6E~e|_vtJ)o=%+3bQCnE+UP$hirl<0I- ziK7RVC||9_wAo774OiletP)$_O(CIv3Ij8ya4B#K4OUZ7zBC1gy;JzId->#!jTM`$QDKPT<153FPHXpl|pD_Bl)-;`#*sXiZ@Gx(VD-p1^~V6PVn2 zg23jDC#!Kh-Ll5BC3rlZHsg7&JDzF#$8%}rcrs^U565x2XdDSq0(WnS1=PTv_z(ABX#I5?I8YsRu>_E=H(b}WgqV|n{lo-y_EXr#+y79dZ$r92-m z$TN12kS&wPbgDeb1Lb+sMxJ3W#;~Sx4A&CJ5au<8)>~ufc6to+wvQ29;A60#Fox{j zV|f2_wBX1d&GO>WoQ)ohr^{%HZ;s~6(b0_9B;+ciIW0dLmu{oU`8oOdLkHe6fhOs4Un24_o6SW+M z2~LM$gzp@ZS!m==C5fYX;GnGKl-WgLrB-h}UNa z@nPp6zNru5*Q7zT={Jb>e+JU&$w0c64x~ryKzg|iq>tf1`W+w0fXxFLxL_cI#){Tm zv@Zh~)H;BHxdRvwHh}(j2GIBF0D2!BK+n|!=ss%zU4{)nw!;A0zUj~3n*RJq>Cb21 z{=75m&x^DDd9<@Xt?K=$o7A83zWvGn-H-Ig{REb}A9rK=;qTfHSA%}o9P5Y4rhZ&g z>BkxQejM)Bk6oYpvc9D+>N$PIIi)WX?fNqON?*bE)0eiZ`to^3U!Dxoj5BqlXVcnuWNE7=ou}>cc{_0JKN4-V9ac^3qdQ<4!n;8Ax zcpT}C>4x5%o!6V)qkFToOK+xr?8Ts_UdUwi;zdv|Dy@5wc&QhjdwYqPL@$m{>&3=F zy-=3vC7zX@w5{yPvxJ_4SEeW7COxq|*^~1cJ=vz(Q=DCUGOTA${(Y0LlV(op>JA zi3sOTT+r{tf+L-1zo8RFb2|xc_fBl?+=;;-I�EBR&}&IULxLiB=tXccCLunjJZ} zv?FtrI`X4`N0R@_a`mY!Qkg9OVr5BplSR)^7S-coyh)Zc6)`U_i%K_Hu@~t;LURYf z-P(Z}Asu*c(}6JE4ruS|z}OWXcrdL4u7f(TRi*>IU$m#BqCLh5?NRk?&rjp_MC-KY z*w*&Q)1KCG?Xm08o>gDl(e7S5l5*Q|Dy*G|=d`2sN;_;1v}4(-cKn&qj;JB+1Se=a z2ES@cSyfwZB(-IxcUw_MqAkv++Old}TmGuHC0wyBdwRB|*LNAR?#pmGUxv})GE~{i zaO0W`QxC~-f3*x2vt&>iCc}&NGB~_$gL+LHJ|wrn-KPyJZnxp<={9(6Z^P<^ZTLRE z4c@)l;QaBQ^fvRKq-On3vfJ}ddZzSGQvUZ>x>fd9YI6H4O*sBnx}@?~D(L!G>fiiF z+8_K!in#Pg`n~Lrv~1uX$@bZAsWtAmq+s-0I=T6`lpz0GYV-M*v@H9VWMT75s@eNX z8a(Znq}k?|29~5();Eg($tV2(n;MPQpEBf(z}5_q{+{} zOGo3sOMyn;rN^7UOC!gAmv(&qCfR3ylPYY!NnQ4RlNL_JIP?mJIUwI zTPeHbt@Oa22_Z=_QJZzQwxZ=`_5Z=}q=Z=|M2ucc2>ucfZ~ zuca~TUrX~wzLwU%dnFx8dnH{le8eIYG8^Fms`@P(w=>xFdezvt4W@aK}@wda!c>gST{(C1RXt7lSV(laUf z)-x$bV@Jy=t`c!JkeJVY)dn&!y|5SQA{i*ax=Bf0(;)(RzuE=@>uGuE823=ANW}6`0SA+8}~?RZ}>=(+4M;IJNl9I^TR{wYsN$AgXKf% z_3nq#)5#B||9(G^8jBxDmCg^OLhT1qrt$+Rq2mMTZry*9uit-?)7k$di$(uQ`n~^? z&ONv<9ges!?YMqlTD|7JBn`VSDZRcYjZD5L^)$UF{nNN7y;Zm;wR~-rigH_}c)M1~ zcYmv7HN923EYm6-s%Vkcd$dUNPqaw#3tFV^-CCrtP0jz~=}e$%{J#I6p$tjJ2ni7) zghJi3w@^tbsc0^tL9^!RUP>t;QHGEVsiXmwp?kVQDJ6;&nKP#h$;X)gzQ48pUu!+< zo!h<7eV%jnKIc5A*ZUlJlG_TEVXbi1s1^1qwL;kIN8nie2=rqgf%@u4Fks>%`1t7| z+$nzu=XO1WeGU&HXvRaZ`qcvSYg%CV!4~-H)&dRMEl}9E1$N$R2G0}CU=Yv@6Bjqb zpTW)0{Nw?gJNp2VA|Jqp6%T+ZKY)?%nxLb!32wwS!C|W=2vBRH*0KQJ%oDJgWke==#i_3il*BTd+IhA1m1>zOKwB;klT>(tPYkJ)ItB~I=E?4 z2XSNSVCnl>=yjTMOI zl~#d4TorU%RzcRJDzN-g3B9jYLecI@aB{2!`I(h)@z)JlUvmQ#58i+)ZZ}|~HvQc9 z23&5u4z9hrQpd4IUIQ%-zAuX80>}4FPhjCc291?ss2D2-n-68sd8rJx zZ7+i{Ys#Q-av3b`x&qA=SHNq}73gug0x6nTK<&?ED7keR3=ds~X7|hBp>r92^t}w* z?_GjXCoVyj|0S4*m!Lx75|}@}2#?QP1ds5G@XhEVY*D%h@~=x_|AkVR5K{_gR+Yj$ z)lv|5lz@S_1a9vr0V~@Qcs#WPT)!8?`y0jJx33t!tt*D`ImOV^a{*#*UjVry7a(!d z1sJsG0_^U00fsy{4|`9Yhv9+eAyxl8j2J@t^c)P&KL>jw&%w|Y=OB6XIZ$|81UpKK zpx?G4*tWU|WF{6t+@mC(R?`Kl@CL8^I?1ceE9v~Ecj=gg;#-R!Dh)>s2y?^;8`9N<>$eqs65!WA`fJh z^C0-`8F*822G(pl1C^`K!2F44;N+)V7+RhSqMf<$(JmKkr{_Y|e>pI>DhD!Bb6~*w z90=0NfoK1+!MHvfE*!~*abDRFwOlW`wH^brGshr1>=?)x9Ru5u$KYIB2J}Cl0WMoI;G$UuD5zw>`u3x6`SMXvOgIV~ z)*PjN`zR=M9RZh$BT$@t1o}B00lS$;;Owu%&{KUFRvkDD$2T5^uk#MWlHP}5-`#Y0 znUM~2ebQm8UOLqvpWs6Z=^xw-ZZFiNdvjr zX<+g<753DoLersCQ1(a#2c1;N?3)U0jr(BA@qOUow-3&+eb6qy4`x2v3qCn}p&(>0 zbS~Qqvxd|EU!=gbkU4Z4R6mP_Px-N+6cr1C6|vwtIu;V%#6W&=3^c~Xz<;Y^V4P|UEbiC}8_KrA z_Qb7_w{|PkPuU8eySBjaYg<5j&lXtYv<1RuZUL=s5d@})pjcA`-)e*~-%SXCy@hZ- zBN{&GMuTQ^6nF+kL6%|^yvU1$amyoN&8rAV-Vy=T<07Ef<#1SJ9S;6q!XSHB7(AIC z2E(dC!N@ffB6~uhFg*lb>V&|Ed%;RY{NbRZKV19i2kmKoFk-GB25>31y@9ieI9lHrSRX4$4u_w&3@dUGP9^kXb1CnNXKyI}=RBdpF zmoo0qbHokCEOGg(K_N!ij%tAm{KJ zC|IxtF5I(*i+>=-6)vPv;s!eZ2vc zZ!&-aIRiL)Vi{%EGKhGz6g)zfg7vVau%uuK%wDks#=g-9xfp%;qM{FvFE55F>%~y` z1>xW>gssyNJSzb#)&VU1%Ru!I16geb?RN#x;4OgC{sKrpr3b>rdf@t47YxF5VcG~? z7+ACjKAJ3o`nLceBBJ+iX}eVK$5w z&w|div*3D{CLB!G1fLn2pnr2Fj95Pt-u29YE9o;}m(C1uZq$G|z8cVLpawK%O@|Zu z(_!jKsS97^wF6Fbqy0C)n_6&444R$vnD|M;t6p6u_}axsRE2pg}z1Op~hr9 z?0%~Pma!@@N>v3OT^R=%YsSI4uVX=N_gHu{eJo^GjseegV?g7tGPEC5hP?U8;B|L2 z%@igomNUyZ&iY}5G6Q1ObMI{M#9(?Bcb{A2-vrE1emLgfPt5XL#5Sl z5Pcp7x;ux#x2eM*|N2mHa~=w+zlT7}{vkB}9|A`8itx`<5lUqh!RPp3P-BDPVT%GJ z2Pwd^Aqwy_Zx9q14FcCTc~BC`!>uv$5M4SD=ByqFZ5;z3EpY%CO&I_`ul9#C4*kLY zM?V;p+7HCD`+;|@9E@|9gSy^w5Sbwh({*K`rKvB(2lR#c3Vq>4P9NC4tPkit?+x!F zdqe7|-mv&WFK9RG1qVLJz>;_w_&8ApG$a49t>=4K)BC?{>cqb+!sZXFP5#Zs-TcLT zdVVso_D?p*=LfSp^&iV={m#A*`_7iE=w``Vzp+P`y4aM@Uzz{Zuk4D`7uIM0XJ&f) z6HD#;i9OcqWNLvO%=64gR`{ZweH-1*7OncgqPM?i73J?(-|ugkq2^nbu;C4>IsBRp zy!VQ&82F0q&~IZkVJ}(#q8H5Y?Q<48{yDp9{fzzH`IIfX@q`8ae#{EzK4$MdTbbJN zN6ew+Axl$y$Zi|9Fj-+U6O=q)fghV#u38g&W_O>B*n5vHuW4jaGL5WgK?7^^y~~tN z-(kz2)U)sr_3VtvZPpr7$K*g@wSc5{C<`*!;#n<#senF*>`L|`R5 zedY#hcyXQm8GW6pue!!oZLeSvR&AdHl^~+vex8Os^a!K9S9uAD(7khMZ=DmS?dk zqEie@Pcoa16D(lz36^MooE_hr$u89#V|Qhau{R4c*k9kHZ20LTY}%8WYDPb%xt-NzI+?`0EmQ`ns6d)VSpd)O+o zWabjLoB4@%F=5wEwo_v#OJA47at`ibrFRn9b-6@#hb6GbLEG88ym zwy}{3v221QhG~4?%I0fsWw2oj+pQyFnWv)JxnWW4+Lj2`*crxNI)t*%w}RQfg+WXq zdovp|GJvVa`mwoRd>A-;GvnKvn5CX4bIf&TZlm0oZ`=kJ+U3fG>(;TjJI-t;b7CoZ z4(x!kJv*}9mSuLYWvAA!Vc88<>Mv&n zg@){`iUB*5w3Oxi)Mr`li`nreU`LlScIccQOI6inyLT;QiNAGNjHfn>YM#e}4dybR z3v<}UiL;qwvL>_oJA;{cX)yhV)7S!|scdG+6gEk1GE+*K#N_`?VE?>T+1E!Z?9K9V ztfh1etDUUO_})>hP)3Pm`i@{JkB70C6+_wPONz`@eK1>{I*94_mS=PP2e9!^`!NMm zIrjT$W5iFGa6bw21UGO%fOCVYOS&%lXL*O;=gJAKSH-eGZ z+63>9J{R!tCxSiJj|8q-%>r$O`vST5cLmKiZVPfUZwbPpZVHTSZU{!ruMoUeEEg2F zUlDA*c~M|~vRE)ybWZTju0T+%lPB0REJt9{c}k#k>$u=~R)*lr*297z$Abd4C`}+Y zabx8u}oCJaTwm3njbBw?x0eXHJ5n>%{OH?QfL>y+wQW##JGjyS647`sQ$^=qtN?KNM$#!PFy zheCngGY2)j*SZ7s?rXi&ecDl|+h7@~`>Iw+w^h-2k&Mh1l%an^e~WO>U}N#pk0LA@ zSR+1gPel8fC~?JeBAoMkInUcB!k`(E+=tjz+1&lyX0QmilooQI8^o^iYF^|oq%~Y# z@X5o47|&+z8e&gN^Cp!~(~H6rLuQxXJ{yU5eD%u9M?~Va zN~7}Lff2M1f>rs^o8dUz!KM7*uyFEKdzb&P48yuRVda%cp?Ebqro7*k5Zt#rp}gv8 zFiuL}T`vDCh}J?#Eq@{(gz=f_IvW%gZ(8*#kD=t;jp&0*MFe>ok?Oc)8=2 zcaO>w6y4B#@AGn7V%>u0y(za7tjDt2_VR<3>+pl!m-2~*E?E2gd%0}66HayfQ*Np0 zh_BwtNXDevBRkSZvgxZW#+b-SESKBh;qLyD*J*3eD_vfq)oO*077dmdkG90y_l8K= zN(m#l|R^=3(ycr3!QxH%FvUHaR8 z^;}6;Uu~pALO&zDCZXRUy+=atrS(GeB=lLNb4ci1NavK$xskp@Lf?h-of7(Pq-&7S zwIE%SgszReZN?J1R-|i|(6uAogM{vd_Ej^N(7hquqlE62cu7kM-8)hlNT@83%0xnC zgH%QmDl4QilTg_qm7#>n5~)ljRJK56ETOUnDsu^yJy0D;s4jr&L_&1~R7Vo3E1)`) zP~8F5p@ixZs7@tRw?K6)p}GdDa|zWwPz*>Y7Jy;T1(gklLO zrX&!X|Vi_o=B^290F)pE4 z2a0(K#Xe9DNGKP8azaA6LGxKr63P{zoRLuO0OgQ`atSD>B$Qi>a!f+G#wh0`lzWVF zP(r!LC?_S9n~ZW)Lb=K)XC;)ojB;2)xy&f1C6wC&%5e$hx`1+C^6#GryXkmA#|=7; z(BVbL96CPq5XVl(QaYah6=5J9e~E36rsFHM7fy6k{1Txu9qvCxc=m^gxF!*fq65B* z(7s!QzTZR`+C|4#5qf_Sq0MIz>V6X8uueKBwKb>O={z4qsQ6w)`)rADHF5K=U(x5< zM6@O^aq`baSpQUnv!94?d#ebW9@6)CSB23j5;ZZHB4^3*9r;9LhiU=Jh(s!zeu$MC3%LoyQhR}Hj(f#%lVL%@d_WdWs zoxg-A|6Pb%z6i1XBY6eh3Gq~$5WhYZqV^*p`ZWnL^R5u9$ZOD6C8YIpgxDh%;@^w( zp7TOlA6JN1bA+@mi4Zqt2yyx$A->ut#MIqF)Jqg%ORNyRghKolCZxXw3-N=G5Uo9g zc+pizzAPa+trg-)3p$U95ETunZ&)luOI;zl&lh6AEIOvq&y(mi@-pZs(R+r_dk4^G z`p{?pM&pqGqVdw_Xk7Cln)WG*#^5K>*!>_Hz3)cjqnc=B*Q0U2I2zxSMB_~IK6vCr zA3LM5Pkc1?6_GC@l+NKFjrE?Q>SveXLhDKw@fM_)C9gXR~qVVO{C|X}T3a#6sa7$|x9={ib zmujQ1>UtF3DvQD!7oxB@FA5KzjKZ+PQD{Q`iV;asct0izcSJ;?&gLj=@r=TNbx|l| z8-;PJqOjNUC=A3X+FLUU7tM+ypFtEp92bRSMns{7d=!d$N8!nzk;p$sV*T4lY64dtc%3L>yemzB@*4vMdI9?NbJst#DcU)blMq7`+-JcW;ng>ABkmdk*Mn!iA9!? zICe!OMlX&e?|3Bb?M!|SwMaarO#fGm#2(p59QP*zwZ2B6;9UeV@^j3;AAyr@MWEc( z2z*fzf#>rgF#LD~E;tZ@A9hAyT1*6LhecqWPXyYokH9B35xCYY0&gyjz*&nTFo`@L zPt_uDnsNks435BzJ`q^^BOE(B!m)o_IF4=!$MLtram=-FRJa&U>tlsub7nZ^lOH5} zM>q;Z;l$pCW0pranmC5zTZ?dvFbu~&df^y5I~;$ih2zH2;k3VaI8N*pjse|ac=3H0 zc0CD0^~NwXuL?uoD`B{;APiGZgkkFbFx<5x45Ni%xPEgOqFWdavkN1xEesFqhoJ@e zNP4D);qh@{s5>MKZ}p+q{tLzW522|4G!*k1LQ%dl6xUq}#e%$0T4yR0XYLI}2lAK1 zhJ|9LS11-cg<`oyC`y)vV(EfVJf#te2`Ztuen=?J?-Po@yF>8uyAbqk4MFAl5b}hE z;OYw@_&h5FHy#YZ7dt}GGCBmy{6cVyYY6&T(a(k<*t0MM7t9DjH{U~HQij2`1j z6@$^bS1^`;4WhMtgD|iu2qjfPw2n>?>gAGGB|QlDCIw+(R1jYG3Bub>L0E4dgq7r5 zxu6w9-X;1Bc~=bj2BAWCAlAJO#Fz(xIO}F0He3wEO*w)1>tG=5e-?;6qDG(pq z1tORPVwzqczM2t;)5ZnjhCzY2|IcQWeB6vrA8*F)y3N>&Z${bt&G_#K`C4{v#^$Ka zSmM1I6CKF&VoIJC!DhTOV>1fJZpO*-o2d^9Kr8aNJbf5|&NTt};8FlCBcDsofdJzB z18_}903IW+%TucW9I-3__2&iPhDiY^8XADfG68ttlRu_C^~W8z{V_!BkG6UKI5*uN zdnfv1b*MkayZNK8wLiXINS^LzZTi2N^;Tm5i%jURSi^h3kbewdo- zhYw@?aAbfVE_e3BfR%o@SI-Y~ru$*(C_gNdCGGOXoEN^Ba>o|~xGx&z`QnH}zSt7) zOZ%<(qJgU~cAER*F6N7BGkmdVv@gz=^TmQLADr;Q2NUXj@NJn7vRoh9bJPcK$NFIZ z03TfB^hQZIz2@eP zGc3LF9(rToOm7^Z?2Y?ny>ZM}FHC((9++A$^t${sJ=9OZ?j9$xsx$_pp! zd*Mn=FZ5CN!fmo%nDS*4?tiig_ttE}xROoidwdg`@7hG`fNa9<4V&=Fs!bRw*n}F> zHeu87O&Ide695wOG-R6mHexAteJ#m+zC*Ifc#9=Dro9XX~ zL0ukr;Hd|muOZ(|u?N;2^T6629(XO-0}EX|FxA8Z{d7EV$wUtvG>Crx-5s~RaL0Ld z?)b3O9Yc=0xSN)8_}#~BTl`xk=n71v_=~FXG9xuzUM|- zYic9L2{z&c^^JHzaU-n*u>twZ4X9nW0kcXrp!~57=$Wtq%L6vxKzs7aEZczFH8y#XHtv z(B^e`%x)c4ELn%G8swK5whp_0xnTE87yL+`nbz|zSds3688I#xxQYBSt6i|St_zAM zx}fg>7aaY?885Xsqs3Kce4g!$?#a&hI>Z_6ot&}Sz!_(1I%C2JXKelLgz9Zh=yA&l zkDqhG#)D4yOGLgHcPG>`b3)X1LW6NmxU`QGF8JU`zFtS#GtCj(G90mld@>?$N7T1; z#9xaX@yrBAT;0zRzjioa;(Z4kRpx+4k2}!*2M(C*>wtf(9MDD20m~*j;NboaXwzwr z>G$pN{uO(aJ#LSh+wEx`1bf_QX^%mR>@iZ+9>Znr(XZVO9UAOV|Dqj^KWc|xW9+cp z!w$Ea*`Z**9d;_);lY2lsQcO$@7=P+4Mn#2G0hgeBW>}Oi!E9j+TxWNwm5pIE&6@8 zL2;`M_O7r&JZ*zPNj8}2Z-Y0iZSc9S4R)#8U{7Bg?Db(S{;pq(9T(PO^TD-vDS9oY zxUNN4qqV3pb1k+HS&JvT*Wl_$Yw&0J8a#Az4bDzjgXP|9aGAv#yr#Vd7mitjSv}S` zu+5sD*Q{wzEo&UG#~N1#Sz{u3Ubw&--%YT_L9*63^}QA9-nPPJ=d92u%?kCyt#BTB zT~zd~@ZV%BeAwR#&wRARpu3i+U2KV+2P`oo(h`lFE%EIVOWdMvi9-fj;=zv9IJ#jq zt#i2={~cJ3?vbmp%4s!@U$Po~rmV)|{;RR8ot|s&SfK5B3lybUU`Ch)me^b1b+Eu& z6D_d1uLYLBU4{9#R^h(bf~DIc<*3 z3Ff%b%N*NRnxp3&b9^?8{4CvOc%j)0hg~s4k0WMSDm24CE@r5^)C~QnnBlR0W>`sn zmA2ZI_$z-UmCZ_2+`JM8TdhP{ot5}))JkmqX^K}`O)-U=qRTN;oVL{z-@2OOv1O)c zrf!Pg`I)&wPIP0(n!30C`=puU9(o}X)iV@H@^RQC#OdawegURr?xhgRT) z2=b@cuRv9{0#}S*fj<9?G2yu}t*Ky)r%xE;nOM>d#+YtkjPdHm=+(~{m%m$%DmBaT zL+)}c+CknEujM$|bUEIexg5jEZ!)^m2#e~C5DSg)X0j2j&25BNR~ey}mJy~8HNrn% z3~AjiL(Cz6$=AJxs2ymC{+5P#YMvq99d3xHA=xM%iKlv7-aL7hvm_4X2Cl9%AVolCIIYYEOYS%SVAOE7!D67tvSqinT4PRrIu zgLr+k-KdXl%k$qPz%}I zN)c%}7919YShO0^NDFC9i|Et|_>{aKYx4kW5&`FV0Mehe@atqi!#+U1Foq8$3`b=! zG>c*=v}2gPkYTkF!!ke87u~*$f+B3psS6Sl*otCH6IV(nUB5C&PUgT`B=7LJ}T(XM;n#-c=YEyeAF}# zhn$~>i+9gMk4^Ka@0*8NlZblhnTwT==3*`RDQ@kZOV=|Oi&xCW4E4Df(|ayDKh;9* zD_YohzZTX7XyLAvTDW|=7XI$5g*ngXpqY3MwI_2hK5!0>HlKqhH0GeX+#EdhVm6N9 zvvJ44+1M308?DV}W0A&elqFw;<%?Og7R)SsbYK>a2%LpRX0tGG`Yb%um;4gXH1X~g zO?;82i68wn@w160cBpIOt6rLT|M5)PLu4lT4Q67L&rGyfJ`*RX&BS+qXW*HZ8MuKw z4$8Y{V3o%V^jSIs2alhD**`Q;@16$U%-6t`2^x6YRRax~23{Jafs?;Z$HY4FE}Wi@ zi|G%XDfZLxiS~4yIAl6Hf0%{`ZcM}KjA{5aY#J(Al4n748k+Q*hW0O};>NP6=$ST^ z)c1QrP@?n@K+tjG^^u(Me10;Lme|VsG|p{9_H^<;csJ{f%uPR0)blhMUwGB!+}jCwt4c&u3s{}idA)ebexTCawm z1Zp@>NewrDnuNL4ld$#pB$SJsgfqxXutIYZy2_Ey;Mqjna%m#Qr%c4SO%qYLbRq_f zn}|-`6VRZ30#3=EKyw`v@V?CiJgzkXJqJ#}8EvZgrc4zNr>f!#A64u!P{sY@RdMcr zc(lzKk8NAVqlfKye4{lU9mxZ5=cNkjm8sCWT`DN!t%7#TR4{*>3hmV}4wu{> zhp}1XP!c^3zgdq%wOQlPRBjylJspd?O2^`<-D9!DZ7g1eu~?}z7H@Qp!SX8N_A|y{ zM#vb9HyeZQ>SJ(8k1~#app0+xmGNAhG6p*;<2-F;Y#*eIM_-LbWASMGv~M&fdyPho zrK7QY%xGNsbre3R8AW@`l7@{!vsI%|GIbQr_@{&^50vmrz7m?mDd92V?>pxy;R1Oj zjCe`h{pFGPY0pTU=rIykBC+;LBXM8H2rMAR{`%n&*tmHFJ~keK&nJwaJ^6;?gZklE zlQkSmqlV*A%i$=}7>@S6hSQp#!?1VZFuWZ%4EH(=!`1VK;UHq>E1nOf@i%evyN9B9 z!%(!-8;V^+hhp5jAvjzz1k=-o;5hFgcxcHG9HKk~w|-K@j!H$eJfeujn-x*fSP?g> zDq>0ZV3esFj0PtLV_eu^l$Z_1uE~Q@?Y9D&HYi{~wgM(cD`2jr0`ln!So@Ed^`=4C zLQMOEt%LB++Cg|ta}XBw8H5KP%41ZaJle*|)801nD61upjdJpM`0+q=IzJG{CJe-T zjsr1%-auMUmDu&C15i{v09AGjz!K*HxLkVxJ{ULvou2on`Gx-IoYWs%T>8^mJN@yp ze1Dwuq94YW_QO|6{b=3Yez;esA3m4whZ-;B(6>|$^ONN8t&1Fv(~(0{c{vPuPV9Jz zEQ)u?VzaX>ew;6he+S6ofMxGq~Ug&Psi}vj4h3S7~ zP_t16ubh^_rI9jNWiEpTlVvda%Rg{W{|AOk|G~JAJ@78Ihghi|aDDR^h9>`o(glCP z;`twVneYcZwf?}{hrhu-<~LMn{08-VzaTpD7u2f#g28n^!8qtAgpd0PnKym__x=G5 zBYr@u_&<2O;Xk-H=s&nx{2fj?d#=2R!K00VQWXLJ~34Hb2^7+_83eV9*W;A3wmHeIMZNq7UHq{5^b& ze-B}rr1#!|Tf{rKJK-H@-FyoPK5wCU_*+o9@&@c&-oS3TH*opvYiM2l8oGbH0@-7) zh}n7tgWB7mcS;+4)@g&L$1mYr%uCod?IoDizkne@#4{_ufC$NRn6&XZR1AC$Yl&Tc zZT$>3{eB8>GoOOJ;ZwNT{sc5qp1?MpC-9*4F{o~R3@+-A;b3hmRQtEW=aH?TSoR2} zxIBV+vX5ZVnTN2z{2|Qz)&ipswZI?N0xd6_;q3Ni2%Xssx(yGYJNN-)k9h#AB~8$^ zz6o~qZvxf)`;cRCAEtl52PcRl9**}Qs;vR;EhPTA z1-hBH;MLMw5cjqQRFi7p+^ibVYpjOy;A&W?Tn%T%H(`{^O^EDs6CRwdf*C8SAhe?r z_?}AmHLnupG~WQHh#L^6asy6Xy$)sTuS2ceb-15<4Vp}^LH(x+xVpCj^0X^pcgt1S z6nPb3{8f;zkicDHaFgXEV31o5-6rL5w37o%;m|yfgXaS=df-cKokr#Fk?wr4RE%NIjx{sr(gzW|HBoQFaC&cogL=VAAQbHojugKp(>aICBd z^c{=fNlzhc&MX9(C55oPtpNJR6+n!70d(KY2UpL0xH&K%rk*_uqLpW%p)(K0?a706 zT6u7+@eDi&JOlkko&l}WT(Dl73!8uBK;oesIHa2cCtI`ObW}E+RLO=z<)Sc)n^s zT>qQ~$M>WWV@!zA$HGpqJ{d)n5bDmQ08H zk<&m}G8HC$QirS4)M2gb6nJ}hGHh;AgYSdYAZYm{Xx~cAT-gMu{-z2uXQ@Jx`*?Vj zsRBBW#zE}xad69YEDVev0|pXh2>&q}a80!PCJ$pmQiC)mFRR$7<%fN_(J#6rRzpN+xH+%iz zC%b0-L!6ClFB=* zK)asp&#Gg=BWu~pxEiL?eUrW3P{mH)zrmcBU1vjzE7%patITm`P}!y$`X3fCEhQJdFjIr!vR#y=-!1x!C}KC24QVg_cj7}uD=X7!uK4z*2Yeu_k-E+DtTsnqCble%CaoG-t2%+kKoaiAA;dezX+D@Zx?Jbdo4(i zdnU*zZxQ5$GzyAl)d}+7R0>XJNCYWsE(^j2Ul7<-ofXU#o)*aJWC|KP4harr?GxBJ z?h+`C+%BlA+ambWKUlCP%tLVct-avW8gs$yswDysZ5=`Ssp*2s;VOa;F+&6czxELr zU+dHh&TP^<*oGhS}(6iIRZNW zl~&T{x&zDZleX3>mDQ0pJE)aO83Ve8vNF;-p`h#>X_caJSvKj_OzSc!e?Zq+mO^^& znr~SgX|82tSs3Z6ud!uPHi7P?%#qYEc2AiZX+`b+G9=X-akNazEztdzsglml$}JmA zn$uBO_P0lb6Lm_qNm&c&(3{uFZjdG@)|3^I{#$#eOv*b@xs}C}w!dpF^CxxD zdRb;i+7$k-Ov*w~*_O>9BcSU z;%HK;Yq33Pef3Q7BGTR+v&BlJ+C%4wrCbKZgSehF-FA`q3~61oK)j8#=QxU`%m&4b zcp<6F2LmxNApggGz5hk!Ki5<&#0N-KB3FxjNllMgiML#~Hss!`0I`%2p%@lNl1|nP z6R#jOv4|9pCfyt?6ifLLigWP=(q~RF;w_|KKgWtqN&CjeiKT1_<%0Mn@g-BU6U1jp z7cSZ%4kk6OO%hAF6UrB{9O^bd=p`5 z&3^G2(i`>%#Zq2{@=mNp`b>0K{H;rbABP?lmy-TGnIV?4ER>t#g``8PkBfg0*D}uT zr1%o))Q_jcQqG0)SFBAc7?LCIBId>LM6S4q)O>!P`2QG~s1>&~P#Eg6> z6lahIM4c1ckWxD!9!e_8EEeDTB%;4LmWpFYciy-t)+MF3Li~mJnf>psh_gu#M~KCa zq{jx8i=|u*wI|}L4yva)72*ie+-ujwnxuJFH^frrhT0tQUedy_oB!kez7dC0bmW#; z%HvSGB({|5)!X9Uq=l>Rh|dwDlmF_jSjy^9+a;DK&Fz0*e2KW7)9Fp(4WuV#HjAYk z54CUN%kQY1S3MH1Cry3XDpnv(4tgS%GCtG>iXBN~4n7yll16B}6rX)Ve37_KEaiWw zofQ9gP380ajrb_3&E|JveNwZ&AH-5Nh}u$d0_nnO9pV|JGp}@tZxb&x!Su6O$_-I_ zD^?_x^Y0QDz7*k)Ufp6d()atmi=|8vwaMZn(pwjQil>uaG5#&CdQSJ#`bR9~ji}ug z_dF9}+`oU~L!_6hW%zv3!jxXT{wZ-jcD=bf>0z}#T!wVd$3Fbv6MBD1Up||Z+J9d4 zm>4D_IqpE}I;0=}+DduxupgH)Ow>p4v7`d80le@L<>UN;d>jBXc6J}wF*3u^zDSfT$z;m8lKZE!s_#id;#gD$RWJ)0kw0>hH@zvMg0+f-b8Wp zU>Nr%4L&xU|F|#0^&TU5EGhL_d@w2g8p;1Z=Q;772uJT6#icwI^=o`C=@%7cez`$} zPu?i=#iZ4RW4M&HqP~xtk{;C`#~bcYeGXLN)})*7sc|r;awk&Z*(v;SjR-dct8-gY zW0=aNY!~&#+=6u2-D$k;CY8^@>D-9)(K-z-<-VxD=DMWEx@Pe6l@w>Ih*$-eVa3fOL;Ns_jzXp#kKBSzK%4m&pdwrDwSW|JT7I) zXl%eQOGK#Zq|G%*|ETNm!{yXZe$wGm&Wy$nJc3i6Ze7UVi-~(%v52oFH5#tVE6b?e zf2_;rlKwfR$1|=_zv3g{14#>X7?<*CG!EgJl)8}K*hDNZsCxs-XMF%Qo_ zCql=$%m2ss1{4ujcEgxUc{myu@p+^ttxfp80?Nzrru=I@<=tCTE@kCt?8FPt5^on~ z#uZ2l_09RFJP}3>T*ajv9gVN}L{gd`PT# z+iAM51Z%EG+Old5m-2TsPUG)SQM>qZEp1{*Twb0HPd!QPZ=fxgvUxO?<3JiOYtK`T zQ~y+N&tGNIbsccvQf`mNdpz+N<>xdf{wRaW@rx7JAf0r@nMWL@@{4idw~kQzZ?cY$ zCiNWQ%H0o(P~(X!m-2ozZsfg4&-iZOD-Th7v|uAYbWnuTW!$)w1*EYhpGBIL;?BeN zQ-0fd@QO5w2Q^PFC3y5Mflmnk1rynaV(G8O|A?pfZwTX3W|79s+&_-S8Lkok z2r0fV zZQ&=QX&g3gE0=PRG(P8pNH@LS$`?n9u-rI?2S!kTSrEgej3kZWd2<-WV@NFTPdczQ zmM;pWc*Jd7%1_cbpC1gS>+c`OZw3()>K(_s11TQw#&IcINzVe@d^5$*p?Dq{K>f?# zc%JP~alURlZ}cNZvT8g3>r2plS$7MJkyKTV=hbNH#gDu zPuRgbJw>>7+YT<}HR-v7>v~Xqm?m*&cgm-8Nj%n#+PRTCxs>IkXA^#F1J(D_o&4i^ zy3ZxM_+ZlF)4RBo^Q7k&zG|Ham;3GJelC=s_jdDSXKJ4oBy%YPO3ygF&XLMZW)FYw zK%d*Nhs%-vuHM5Z*;Afr(uA6w2zR8Ua9dju-tA7|fi_g$c6+&$9i?X_etHe{x0Cj9 zi8aMz{65}nMg3s=J}%`->3NFFl9pUZA8$&nNa`Obbyzxpz_f@$g7NLoR)ErOIcNVcH?i1C?4Go@o$Fo z``Sai59x~8>0HXO((@fxSw_zR|E2TkOQ}C`ILx(|h;Yf(!(7U^(la1mv6#v~;Rv@v zy1tJ`xFb+JTO8$XOoa5D$bALG6Dw!%U_H9O=nNjEOa0@^3@&A3=~Pz?>JANN8^}d$N7=DB7E291V5@p_2zMcXUq|y zbshbGHjS(1oa9GmQF)}E&$ z+PrHN#o3&*{FM^rXWCibG?L=?=UHAkg5usWpBE3O_O>FQpBzU0(v$+8GE{_pb`)^Y z5bBRR3%Iu;y?=G#|9l+F6lnZ2rie>=NP=<;(okS0Vn6zRacEGtF0UhtEP>V0eWu_#{NDGgtV~ zP9gdaF5^-rn&ve4jdmgCJSgKwKM3)$k zzG=V8H@4FKnOATrgH3ZRT=t<5r;NVF?>7r^QPeel;sLSR&#!SQpH1^HTyURQ>746) zz&#}%w6XFAzDlX-^X+DSVzD107 zbrrX+5n^x6n|xd~eQ(N5E@i%H&WGnz3Q@zh`hWf%t?NSK^5-;9#SfgN zHSee2<*V|9cw^UH-v12U=a;)&%BIs?77xi5V)f+)u6deNrIEipMY^?-OSyHL@8YH> z=zYfbxXf`OR_5R17miUq553Q&Ogqhq@li*G$RFP4HHU?GnKkk7bRm`;Z{kwko#xH> z!vjKEzwQA~*e}Ga+Yh)-8pWMfGncaPG`Gf6_6jlOXESFhLQHgQ;qQ}$xV55%OF4O( zf8)4Ih`xyr`THaxZs>T(_wEp)oy8+AW$0;+j<;So)k}U8r{n0#tCu8i&ie> z>uDa33uCChavyWGtyF&sPxwud5WD=Ja4CCFbA5bpv=Hwve9F&7Qu!Qt$}J3pgC23Xc_IbaKD4AEv4&U z*va$tsa}qBa;aZ|=3RL?2=U+gPu!3RvH9jFep^pSYm|THQZEC|&GLr}g=pLLnL8~Y z-`m(mK>O#~!-pzfcP`lRmJO7|YaqaP)OT7~`SIpZc2x+bS z|G1MXwNI)4@rNox{O`a2xaBy?8~Y#p_81{1Nq%rcWorNaA5Ui)73KG~QBV{_O2qE& z?!5G8H{IRcJ&a;^cXxO9b?olI?(S~I_df4he?QHFnR#jk#5wogyV{TaEG0kpBY*7I z%!PdBynnsJKyhpT{KxCfE+)T+O8(lfc?|hndjC)xxlVU}?f+&q5Fd44h|v84=OVgsp!X(JjM-%fA~@eYFWS{~@1~)9}TJdse1=^2vyO z9Zfmlqfy$?rqpbRe3s72?__&dOgZX}5e*9$;Ja5wShg-e&5g+C?cDd=hy!yAu*x&x zL(Uf9h$q65{4GGul*niD?Elb+Iw1wQ`MwbarWa)Kdq&(kR*;%Ek^w!qg0ltP!x;31Lfe3v=8tBjUFd=942v{P(ypHQyrZ2%L7%h!;J~ z`AW(8XPL7zjhMLBoSJ=+wFbW0V?;As3wGLVM4`?WoVwG9ykrY%E=JZP*k+p%nRyl* zv&ASg(?xiDle9qE7NKTlWX*y(>y6kszX<=wX_j4M6du5mnx~O<4enTB#K%xe7F=$G znqkQSOXYf;u%u>fWbK1b7aCEkeo;1FV8kcCqRgHrkDFMOn!}Ox5n9a_hUZgJy3RDB zN)0Q{n{Jd@H!EsJN7hhSXNnQId#o5g$%x*st+;i95ydN7Q}a8r&cb$MrEfCWngd50 z5x3Qv2S*yw;)yji+aqf+>?*yJBRy?6e2DBX+lEJT<^8bEhGv80Jn!1Di_wU?wzeE% zFk)F}TdFK0qEc+BnIKuyVViV0zdT!}rpk4&u;Zp=qkK+lN6ib#x(}--$op`C9sT2E zKj-Z@BSv^u(_+*tk*p1|aHPE7!iup&xDjV&6k|%LzCL0&63$50k9arG2%Gx$EFK{I zk)J)g`x!A|qCGW(Bx_7u=VgS|Cwt!YkXB3e;4AY+CT;yoP z!B@q3zP}LzD>zWIOR`qQ`hAS}mg_*TUPf%$;=tiOW}alti^JL*aoVQjKR)+LYa`kxm!#&QWL=C^S{SkJYDxBJW<-d2 zDaJN2qHLQ|)U1@OopE~uBSy|E#q0It=i*!`{;DJIgTJMyIVxFSBWfDq7gCym)n$Lv zOEb5sQ5?agsTnI-gQKcwls-h`l?@a-X#kF)zyUYEe19a^Td?o9Tuc8%r;H$7% z9V+nRXW_IGDp0dvvbM-i@8$cKDzM-?Y3P_$r2QLte2a?IoS3XXveAniG@o6O?Vsh~ z&Z&y*^+dR@-xaADGFhW!(1RRY38=)_dpR&nuEg{^!k8VdM9r7UIwnWo$U$7q%A9g7 z2gN-rbB^?Tc8#t~&7R3xCs$n*hU`scZaANV9c@Fk9u0hSn$r>)FF3!QnsWmueVGhO}t--$ClzAvO2a)S*bJM^a{JvY8^K)`A$*vAHuP5uyOwSZv zJ*5tV(&f4?ufx8nIk=fuhnnS+wP{vL%)y^Fb!icwgYhwS`5`7pIDxv;Q$^&U zgGoKE2+P5lCiOTjBnLhr^{5#@S>vXAKn^mF)ni+~9GHEt#|l0nKOVn8n;g{suMstmDC_dv+Fahh z%NucQQ)xowHDYjMIUkG0)U2Yc-P5*y4!XrO=94-(I61E|ch{2RI@g$*W0duM235;} zW0NLqUPaz_!A)phDF-gonou*2G6TRhWpm*AtqHSB%h$D=vUf@O+Pf(=|0r_;d|pgm z*Zobo(>4d^-!|ni>m2l}+>Dxylvx5+EF!PV&}Mv5Soq6r&A81h2c4caqvj@M-hjPK za?q+*bK2({uqC@WZ~Zc${<`MWOr^{uF#4MTm26wE$rpq8-&^qeM+1r_x1i=NWp05( z-Wp(fwFP^;HXyTbOBQ`;z`Is0saZ^!ZQ!IQ2Hcv{k}i)7a6HqJ4iALQ{L_+})0FuK zPQNWoW?(D2-87);lvZ@OZou@zt*9AJnUUb6%LZiEY|VZb4S4O*nnlhFzd5=!HQy<7 z6dZiYfKIPlv)u{dH!HN^*P{kh9?*vW&wl2%VdO#KHaE9nWo1C@qc*bQV!%y@w$xmx z%ww?oE(5k@wB_&Z22@$ymYcU4F#cv+YGzbsHduC}0ihk*{qr#7t}&p^qIT3gsmyio z@p1#K3%2LBu*!cNBKI?CQdCe{y+}D5rk1o`lt<2AG zdk+I__H<$YZgQPpb>Y+h4B{2>CT?DrO(!`J8#r5V18_OYOYu2 zdHAEU0qxIs=ctMXj5X=OQsw1(H|asm{L0J^o0c*lZCa0i{*6BNa=hPqQ1iet7sMcI z`8o0G$yb&Jd>GS{X%+^w+t-tt6_(i{jwmSa(~7-lV`@NY$6lO~pN*iwy{I{2nJ?m! zAK7^Ss26L0%SP)Gy}4dGaRa;ere=&~28r9=Wy5lHZ?<}qjR7}%bI;3cOe@-lnm?8~ zCGLNcjq>q**x^w&0v5{G_p`C&f_!~9TW0$Ea^J0N)NIz5ZEs{FBD61e=4E5m^uE;G zvdlYi^F?8gzxQQ>^KyTkeq41X8!No~Q8Udl6UBMQg>T;9k0p<0Bk*lMPBlkI9Cox3m0RoQ=_Aomp>qHumgu zrslF`9*p^evQf5@3&V}s(qVAnx$JCY4tAktwq<6F^U|cr_sHd+cO@cGxb5z))I7J$ zm9cS*9Oo)mPK(UO<{Pg37M6|MmTuInx6Gb#Z(ueW#ksM(zZ}N`HyVAiG5EY2H3u&9 zX>9MFjf+j(IoBl{--F%x!!a8br@2!z;xfa=ZGEy4{nedzy|OW}mIq_IXJf0U2Q@z~ zb8f8KIUB$Bcrd49HY&XK;MI27=v2Xznk|=EIF4wUjiG})d8b)6mTmH6^Ct4Xdf-XT zoy)u&AJof6!LD9xSw~*yG%t>+DbHWwMa`tkOdXq4$%etgo5Lz*V`dv~=9SCFwrFo^ zUR~zym{n4);~8(BES`-*`Q9v3EE|;?`B1a$GMmR8MYG{F*@tFDS&bNh(!_~Qeq zd3>2mq^HV~UU?v=@5@5_%0axeI}6>Mf~Z-2nO$VBZCP;J8pNTSv*7zUi2FBWA*4hw zHODXWjcmL+OIq2%j9ih0)K$S;v@{EuH-f1df0==#^@1$qwhLjGxx(|uhA?wh7KYCc zq2~W(PLdC%WMS0b5IRhf4rJp{_82d>L7~)c0GXxa+L7|O!=b!AEDIw(htg_D7KYUb zqxJ^Kyd`6DvM_LD80Tb(H(*y7Po&HBdl5$M6p)!rR!z!6Y@cxUkIzDQPB^n;vJkL7 zoZ2@abDKOLmIX)K2>uApLeEYStQwdFBt=lW2xPXCDc)JAe>sA4JhD*LERqLZvrwu< zB(9wqMY9)3n#s!c%V}j_Kc0q|HDVKh~pEHo+}!`n5p zP_AnXwHHC=QCXsjyw8@$uyI9s-{r-yPq{1{HIJosCdkYx2bIXe%&6FZo~2E;vi;Ms z)IJ57YvsKn(&lUs$FGIu{plY^D>FHt331e}1(|)7_jM+YzmH?@Uzu22C7%A@GcmzA zp4!78^RXQIF%!<);yL|YCYn8o=Ze>va44BT?P!o0S{{EY&CZMj<~_>9mQ@LSaz9f( z|4N|tH^`hVO>bqQPrF3gT+c-9*hH4SnhCS{iPUZfnZ;!jX@c&_Ph`6@;&y11#BL|$ zd4WmP-Upf2rRU*HR63Nzzyq21_A!aFQj2rdlBt~#GSkbnotZEUPo`m;cpi2nGk3Fi zBc3Hw`yyoSm!sCo<9nuX+$wQGWTkN8@=T@GT19B z6LHxY)LsjjXJ(6#Olh2Dux?-`XqCx|ewi53A(Ps9Av4b`ng9$;Vf!bhRjZLOvg-E*T`l@J87`GWiza`ocD-q zYLAA@SF=OYOqf2;W}QZv(%m)Cp?)SZdKsu48#05<=QT2=OK;%Cs?v77W#H~gneesB zq4sacoHj?5k?qFiFrlOz_ktX{70*QL^EuRR4w>a6pKWhUH%jC@vD&S#2| z+S?)X-dt~ziG)u^PW+RB%GC!l@uxIjT?bM-J!B@FO+II!>5hT4`;dVLPY3edn+!}W zHHg~xA#>wg`z!;mG6!+g;|$DNJ&0isGSKzrAZizg%$BqKE$PQr$mO?d8K~Mamlv;O zAftaSwI@X8&pGs*>~~NueNSf~b!IM`pUA-Rjk(kg5t&ivgM%4}zn{yU6tCI$T#nzH zf#SsmQ~O0^j-4&Gi$kRIU>4bu0SoWJyuBd9g zu$eK0+Giqj^{h1{1FMb=;fH}4_Dv%$*NM#Dvrn3Auhvi&PnPrVG?X{v zGZ5!Fl-h$L^Z5*q%n*OZP}U2}ke2dLz7NX4^xZ?L9Vs%y&rF{T)P6aXZ9OxPSYR0c zxXSa&4x{#`$ece1_0K@hKEv3lkGw7+!)Veo19^sF)NU1F0XVR8213^jWBZPBJ&p|H zkG2_jcY7GMcSU#sCO6MOw)Jo}Y?1+0V>n+l$Uwo4!>OGt!W7WIRtCn#4`-?B;&>S` zoEIu*z<%LyYF~?R2SnKn%sfAwUrS0i_}Or-FD|c}$p~tfi?9hSZJmJyjYsfI5jmfp zBbZw_1C@eCPYq<<{f=~;Suu**M^`ei$~ZNj&G5U z|2mFixu)XtaUaLk4bw3vejK%@NB9>Wu9c2=3&zp0y10CHj^nM$>F9cX9JRwo7#V&j zBYo+=Cu zVSXC&4vgp4pK17geLP!#6CdJ-@zh=*;c+OjG{jYzz(cRoFs01|c72hC9ZnOdok7Cv zu=~R_UP;5)hw}UjX;}YLwkO@|^Y#;|T|>hDu=TMt z6zejPTMwlP|2dHjRT^AUCQ^Hdgb!lXU9#V$6FF~N8n*16NQcd7xOjOYwWCNFBATs9 zgN@lF8djvCe)&oKup|w=n@^(l7YS#?TXWMeEOZhbXQg3r&Lke0mWKV)CQ-YMghk?- z@oD&SWD?7dk@ohTNgO{S4fVcEqV^sMuf&8wX$Y(_nRg9o$m%ee{W8-q)on7h6G@mR z)=d(3((uWg8JC7T^C#0RTDG@+GPN&BxF_BYPD72Sli4FcI^X$|x!ETT&LyW%yOe~D z;xN}V4C+3GZyeJw&3_8r`lVq_`V?xQFnPFd3(Q(%_Y9EwvVJ!776&}y0G2vAzf=#CL*t1l`m!3}TiV}8= zDfd$`wC8l5yq${ifzw&>Mk;1z%J;=1C43o=UrfcCRnuAaocN*+OlRDwRP4Pzo!T)a z3>u3aPQ_`984Omb(lwvKEqhaOqxB4G|CDfQblR4Rr;#(bXj3X)=g#2Ub*cC`YX-HO zN?10ITAqsECuZ>K;#8PCn8C^mQepOE2DP_JcsK5tk&2>qX3}J8Dr`E>WUq;-DCRYj z+G!6wcB%CkADYbt)Uo=xr75{{1rI;7%l_2Zicsp2`D&02NE%XNP?18b(@*!S7gUM}GQd7)w|cGR9j^Kz+J-)RmzluE@i z&pFi2E@1|_+BOxFM$P%>O|`d3g<;nmYM+;Ih0HWbMcDH>T=P2xUM6#S`+Exdm7YuO z`V#h#9Y3U?dC$3wf0Ke*fpfXwMGDGf&ZYK%37^Pc4^r@Fl z)Q&J=7`fq63Y7Ug-Z+~sniw3$)pN$N}f^zxudEc0V zf+ZJFyUc{mWchUQoON5kHpwa2<+p(D@pAlW3#dJ3!f$dycnYGHFW{=+6b#tEfQS8M zdsi1wJJ3qMS-`LEDfn%+kTx!IUCJ+H%>gMm+6xbYDNH&w}dut&tHcG*{PYbENYQmH9Yb`myYKv%IJq2;?7O`~Y z6!dXfMD1J?=9H~Vr@(yZqJO?zce@lE+Omk+$0l4VlPpqTc({lI%~Ig;a}mdyq@bz& zVro~Lu&Z4BJsHnCFXp<>$vEV-m^oPJi8CJ2&s6BPU|8i|)GFHr8#zmpYNZz`P z(*u*y@$@okhn+COGPuCP?&D!PECS!!fJXm(;(Z~Zm=6_GYOl^tflr73Wv`7NP=CjwOrRO z2`X?c(_1AWK65R#yHHql7HyP-Q!CfqRdaPqjn_hL`2*MdWoA+Sbo~AOvI{r8+dF7P zaPH(p9JSxb0psPk>TaZVI*Jp3+lD1#zSl;E=Zf1gX(LPLBqDFrMrz-qcmtS~k_hWv z8(BL+_H%wCuSF*c|FDtT1u1R;HV;ljM#)Wl;Fk!yhMPFSD-o-^ZKC!>ihqDl9TRaQ zbrUD|O+?bTO>Eawj(gcAYKNpa3OE6YXmNQHTeVBX>6e>$uVo?v3v8zLONz&U4H}A% zvdLy%sgsC`y*4wuMk2NZZl-omitB)f%O~Rc#LbK-orsu~n_1K$5r4Ru+Dj=u1UeQ? zl%Lzp{8%_q<{7teY5_T}3R|e1mEug`l^+QR?7QWk7v26t0tOnkaFh5f#jC*n&l50v z%@)3TlptQiEgW?(0o!hDp>|!0dx0u10cR|>()&^ZJS%VI=d%fT)M_iW2UGkEtaUU2 z-@~_39Z0~Cfm`XZF9AhoY^8Q&io=1!w@2+({mPYCE;dQ`{8%*)su=Kelsd*91JZ+d<1t2?(jZgWB^c z{tA|El>lFl9bC{f0oUVquzJG;xQy6A?En?W1sl{zK(FmPxT$gi4xib<=H(O6;qeY? zKd5*x*t&Rve6G8bdu$T0vhGf{wM;;z|8`QlL&cTBwx$WNNs{}2$79&2ooxL*9={gu zr1px6PlL_g#pCI@o!s;?9zIWZvi{R}od2_v+BquD4OY7oj~(@Q{qy0Mz7mglKD(%W zq~hhE<>`3jj@iW_$Kvr}@h<*67?0rHyQp2I;_l$HU9z3$yXdzq9$WtI;-!u8s8VV- zwZ~Na9^AVk9{JsNv(b`x#QN>#lKJuS^RS!RaVicFj+iFTTe_RyC&r`V-rbBG8;>!U zc2oOL#S_AwL*fx&x`#WB@iy1dc~vYl|AzRHSw&z+C%MB6( z{2m7@wU65GDjpRUeHVwLZ}u_rWgMy$+Rr0T;*e8*KehW+Tq`u(jzg0^`+4ZY?ap)C7K3*7y1=(b)xpDY7nbfXXali1^;iE!F?6AqgEU;bc+>_twC{dL>v;PD831f!~WHZ z+FvW484mM`gXeX{bFOh%{!X#9qwK%%0cy9cxM;YhyLfL~9N@>!ak$#|0NZqs?S&qo z_TGxGhR2%4VcV1gv}zQGKdTSWsji&=!2{GzTyfg)X5~2Ky*t1P<>OG%{2&8M#UZrf zL26&FcyIXFIu0ND9%PLoacC8Kkl|)>{S61HUAp4N;gg@SD75AvtAC9}&w~dU@*x)E zt{hv2ZgSV&~Jb zm_FqYwVzi!Jlt|H7WM}Z@#Vf)I9)#^pQprP!n;G%?p|^AaN>qoSX4aBqpM@lwZ&on zTo#MmzK5y3zT)#?$lO?b%|6T-Gh)$X%3+?I9E<4HhpC;v;{0KQQL(sl?eM?;#l(TJ z=vVlN%t^*Vyg+=H8jF3+kFa85EI#%*!oD%FGBvUU`(NYAnjBqkLQ;7QOP0QoD)8WyA&!u~=?)jE=UkxK!>K zQ!Hcgx9KrzZ?X7}xYHz7)&-97#;+I*$vnm%Ut_Rt;xTHcu{e>~=1mMtc#NLUV^HVn zF{VF?f%EHQ)V^c!CUMJ+7%VA!oae5@;8c_2e0e?w?|UAnb|H&fiB*opphL!SwmTSu z;0ed+wl4-FmmjD0B#VEEBe%rh{N>|Zv_1x(ULNPpRWT@8-~_cpxpkQne6k=0K8;WC z*X$VN^f*Dg=`on^e}dYtEFLGe85@JU<4&;eh#34?dV&FiV^Cr532OJUxSlvHBL-eC zPH=j13^Ghkaz&iDnoFIe_A-kPipN4?aJJh?UiFW`3*VD`Mz zS#t7U_oQ_97;)^Mr1m+BSBj0=$6!JJNw#SfgY6|wu}f3gUj0+lu4i#i(XDn2etMsx zf3+CcC7)tgMR7xqK1J<;7C#kJ9AYqF=P72{#vtU}DGsuXLHd(Z)Q)IzSaFm|4CWO- z&2hh?v7zp1PW&1T)%i5FKUzFjoccN%4-!su`m<F&q4rgacZ(78qOtP+83xXb#>Q`F=s6`CJ8aI%-;vP}Hy68) zipG)lXW4$J^kQ7jvdKU>?&!1f@05702cKoR)M(tCb(XdX(YU+uEDJ0^i%*OttI7T>&eOD_?7z}^zA7!p)ABsEb6cEa zq>UVJ==p!Wn~7#}K2y$9`?$qRM!%m?*m2-IyL^elhHK|p=Y14bygg6t>K1nyKRt=U zwDK3^|MgKA)9eEG-iktQ?+er(Z}FQk_hJ;HGcPdsOceYlUSOBwQE*;yf!gsc4m6tW zk3#D!7x;K*6zaaZz{6XjP`}@AxRJ-!6~uBjd4;dfi7)-b z6>4X?IO~{kBodL8uJV7KBa=OmDA(^QwNG8Vb{w%$yy@9j*=tQCmQB7&%jJ#XoQ z0?tFOQ@i9#&%RE>hY0z(zRo(YBe3+?bzXZKfrvZTsXg=J4`h?u5qM{LgLm>Gu%*fk zj=C6uwAMGM9rWTDEao`5)tc$?T zYd3gdg?Q`V-k^5Zi>r|3=SAQ{xtlyVBLeH2-emaX2t@a~N$s^4pCLDlh`{~yn{*l+ zfw|*v@{=I~Zp&^`JMYDL$W}=aIC1gjzrIywcm!Jiy-DrE7cU}r`b1!5{abW%kAPp7 zTm0l0A=mj9wJTrTiEP+C0>+WIc&bwbnk=}*@OBY+vh5bNM_>GkoYy!4eIDLo%X$&` z^Zgbt)QG@F+uPKReQ_|-v|I#=b-2yhB_eRpjIEH+@&2BHl(XhxJUV9vl8}+(Gx&aqF9<4fu1b6Pywq-bKeZEKCB@iDb z?dpZYyUKk|tRatUb)PnsrCZSdK6SG|oSC#N5iZ`4`~SLTW|p$wRrjfT2IAG^@BA>> zJEbVIeGL_ z7#5Ftz;+yiYHcLC9*h85g3xjw* z8NEWbgNMAmC=7Gm9;awNZa9I=zHuTb$3C0 zp?sYs$M@+Wy;H;RsK_H8kC**aenj155T_^?g@hrk-y;_F55v!pM>6Lt$DjR(y4N7y zQTFK(8UOSO#qmwg zsQVY-U^-<>h=r zpHp`;#5YT`VsiYGp0j_^P&8cmoU;mriqHQ!byGu}w5g1inesUVJ5642&)X1` zF7<-Cw;|qI_IwnA>s?-O!krMb@_xZ9*QB$N_=38{A#Pjxoe6={{1;q&ECd_2zTo2n zAt-w41$C!G{I`tS9)d$(UvTZl5R|um$=9nxkY4R2b;Cm(xr|#7f;x^bxo%bn28X}o zt0^J4k@J$e?;##tMvM%>$ki{od~gWvsF!?b2tl*Fm(=YKaqZG8F$A{@yyEm|d3>2y zJRcf@VU1oJ@b}M4Y{>_Fo8Mx4-(=F`U#g z1eOn9QTIf|>&sttL$KWDH5=6k5l8fEhExgx+P$W3jfneK=3-?(5wH2%Is{b)zGg#< z5X4M-P2C|8KQJf$4o3cg*TPQ)qsO(^eD^*W6W_e1Zj^{anEjpvqe9s?G~5eDNaHtL zbt4$7yT76CmxyPWrssmuH02E&oCucnq&M_DB;AsQZ>ZZQ;v(ky9l_{$<_)iH3P$e3 zH#AurjDz3bPOtP ztZ8rAA}3gm`z>`ZMZCw%Neo8)Yj3$IIv5de-ttgrFcuelN8M5pH!=%(1;e57JJxgw zM&Iu5*rQ)ChWWmu?yQJEnIk#}W#rZ+}PKU=hbM|I`V_@dxi% zwt6sreS60i6@$^x<~?OZ=n|e>(brGL48$Akw?d$jKb|(n!3w)r@wID>6{vdNgK@jINhn)_R zPSuBh{mQi}2o6afsCzKth318=K?tA!fe+RP2}kyUA6Ev6C+!1uD@NSWEIv=VF<(Eh z>Wm=NvHHj+lY%gy>PPC1jQFM5Z&(m!_WwwqfkDy~_{fONAl%LVNZptb2Q>%928sXf zBgcdXq09b{vOX4s(90jG`!nLH<|@}9Ec^SBoBIdhP>E06(=!MU>V2Ya(}>HOC))?1 zyyqugXc>go@t>I2I0&x8K2djT#COdH)q^l*(!t*O+f4N_HVo{)Y&Aw3gb;RS%-O~c$d*}-{O$bEf^)FmGDo}bFU#QzV;`-*a zoIs2&`<0{912MJnSNVH75c9f!rS9^G51iqlfmoOPmEQh=*gEPf`+5dq&w{Vi%^q=v zvvJ=*96R;(U$@l0Qy|WN{Yu^Q5wAEuGz&yt)o;AtAQ0DEf8+UDfw8k*ot^1uX9tYq=r|-OYHvos-zjN310Ep+D3oiv==aBClaV7wpW_@SOu>h>v@SVCX zBrbHe*b{)6H@~yYwg60c|DAu<2Vhv?AJp9;@ul zMobKVIMvx>bO73o`N3L41JGd64;D5CpyG}n)V(6{uJdqW0P-LF;Ns{2y#4lr149FF z$NDFI`~x6vcDC{iz^*nwY403>koC~NgVjRALx&#%l>eMw?Fpo`NLROe@wg}+v)EQ@#OPM4}Y}y{fE0d z`@`HmpT>6nxKS&gXd&m*A)f^r`6JsUpNDJvqjyw3hgbDSnL+vNR^A`ar{%LyNjZ)+ z`8;atkD&+hIjo339P{$2n^NNBr|BO*JU9JIe)YqaQh#Z9?+0Upztp`c@%Ho6BR|-B z{pH3xezJb^mr>XJuyEL4>K0YRoWHzt$`1`T{pHLfe)x3sF9*;MyKeoZ?o^5YpK7z8 z{Ci=d(%1T7h>eMAu-p%!WlYqg1%A2_pk~eTL(N7es^1hp6mDyxOvm}*X;%}a`&QBs zP*H>YgjX_A<+A)RJj_I$OP1#+ny5jse!4ZFnuPnI$_NwnAixiQCz+_pUVgYU*F@+%ZxA>lFX3=?C@EMCqQE zbPbeSSwEy%n5w_U{V<@osakFAC+oM`FSd6yRee7DVnQ!d zr8`{GM^Lk#`9cj2ix_I0dDbr0=>Oo)h zT4btpze_p`YWFr@na49#J{x>->VT>Gz0wy8Pn#;;_L3HZ>M++AJs+5=JJWpS^)yvE z6MXUhtEtl6FX=U?U4wlw!>WLCH~1o|Q~~uV)fern7ErngCQS!bFVYwHTNO~pgM6|1 zzXB@A#}`BT6;QetCfx@$y}vK2hZInadivsXoII|xFOFmuP=W1ybsIu`YwnAX2?f-I zhQ4SzyMU@u+ZU$G3MkzflYWG9D(5TzJ`_+-9efdUq=3q{@kN{S1(a@(Nn=7SHuV)B zY5~>!mk$=clkI=@LF~^0O83d6L!n+i^Fcwof-3ug56+b>sEXe5!R#6Zm2Q_wt3uT| z=Yxjr3aVYleek_oLDl`B4-PpNRJv;>Jqs1I%?GaG1=XANKB$mXP-U(3!4pG4rJHBc zyik+o_#ka^!GC?~W#fHdwz8noJv8ZJs2#aJn7pr`>X_{VkK+Z^u@u?PrGiSg(xjcC zu7vww)w6=iJJ1Jl9}BAcUOs60r=ZduHR)@pmwkP($KFiEclQx*ftmUMA9Sv5rgURX z8XW3dQy(1fV5YL_`(SiWGxf8EkIW~TDcxU_PKWwcTFyICzP9(l#1y%|s1F@7|caz)XGo;0?#sW=eP4r1zm-J@&>qnyHAp-WY$#SQz!RJ>+P?Z(!Dq7hN#_}ys^ijkZQ8V8)=masZ~q8 z(WGu6rCV^)7E#k?cw-d`sUnlS5!}0w8aUb;72FCb-HDU_hzif~#-!*%>PDJ3dZ!gq zeG|M4LNC)s7ArwNS$6tE%Nb3{Y8aTF*k2KUQYIOs7-m5~YWG!zz{8C5_sqBrJCWV#m(n$|Rc@_7DNy)4jC?MKAo$Ev$6wPTDJ~^${=l&nT?s?e~Js;=;;grx(=P!b*4Wq|c&`ul7R4 zgN0R{rCvCDy098M&kKgU!b&&tq~W6aP4vR`SB2I3QC=AFwXm`t;)Q0W=1TYTr1PRq zr+Q(0Npn>vUK)E<%+<&UFFdVhu5?>ZS}>}Uw--8eHdpgpyzsn_x%%GM3sc?AmG16I zFGg*Ed_TrqS+tSIr<<#wre0__*j(u*pEPBZeGS?E409D-(F-jXo2x^myl{7|xzfEp z>CUJGOD{A$Xs(VH^upEC=Bn%;Pvqpu_od}0Z5nm>ohMGdGFK&EcuL<-w)4;v4yG1L zcmAYbqin8v!oQ@23OwhDf>kWk=Hs4NSyz6A47H{>$ls*>f{W?#% z{uWC20i}bZ#xL|lc8rC(Im;8}(=Al3DV|`ih0^UnY2_$2%o8RvEL72fo>;udLb+#n zqVrk{rMrUC(@`&@JTdryg=!Y!iOQ!fRF1DF)Kv?mn}gEaQC0&y@#m$*zaIVU&Yoy( zQbg$

%mvjpm+6DN#g4H}HgABeD&F-26TM;_QQt%w?Q+XMX< z7E$}Jdf?gWB1-oUr4yuDpYT8_RYav7^pFl`5w&@b2fAG;qI4TkT0*M!dJm+$D564E zc%aDVB5M9Z4_U7&qI5S=dPB-?iU&>>w^TjHdceP;rOF-VfseH zma1l=2iEtrRK8Ij(v-ARy0<9ZB6ZBi1L2XD>X)krz9(C%M*Tf7#%QT@i&5G}YI-LR zteaw~j<@kZhxwN3M^g`+U1_Owr&0Px%BO~O9QRqOaTPsaJZ`D>mhynrB}=6nj?zd{ zWh^~V=b0Q|K@aTwV5!o6yQAB0OQrjc(os_9-?}59SW)%snLA#WE2?Tea7R|nqDr?P zrM0Atm)$X`T~W32j62GAFRCsab;nA_qDprmrN^YI?sCVzu%fE>W_NT?EUJ>%xZ^^0 zQKg%a(ri*{o;w~+EUKPNcbC?0QDr&N9iNvKRk|lBT_@!_*c}D;6jhno?ihQdsG6JN z4*T;(WkKIvx1ZGgFn3gXTvQbZkly6mqN%?s&t1^`cNvgw>w(cSgB!M+_9&$ zm0H@~9UZG#Dcz`)hLpPBP>!p$mCCQ>j+6gcsd81^(YK$K()~*5Oexpm?r;jWQi)dX zxEyPx#ujpiTZWa=ZA)oUDfP__9^Zeu8!o)GQmeMOq5l_|z*y_1yI1PMGB@Xx6b-WkgD8xGyFR=@1!IG$Q7Gb=Z2cyFzA z*He04s(8LDW)`whWxu(?%FaerdGCtcvNlRLKc)Gl>OXWvL?av3L&J(hgJI*SO-#5F6EFsVl<9%k4Z@ zT%9Sm(h-%unCd>k72DR?sBR-&QEjI@FV_`Q4%#T)7?lQ@Lb5C3^K4YR7+2i7Z=+g= zx}xVR8>RcB(kWAo++9)C#8%ZE;ED;BwyJthSNwFaRk}?oEi+ZBtt&3nu~oLsT+yz% zt+J@^isc<`mF|{G?@WEI;EF64TlJ=-D<1mUsz5*G*g1ZLbR|Jh4@}lPdi+Reik+p8T*?_A6Y_%gj!hEOfzo8#|>Ns?umvwLtN0RwVhfZeO2kWsnMw}_}SM^rN+6y$HPwfhr3{3ke$-)RcXDc z#-1+7Nw-s_om_A`SGM2V1?|S#Dcxn29-KPY&ILaf+Ntf$UEs0CPR(iHg6-Svly0_4 zGfst7azWxrJJqYS3(j7)Qw@r_pw3-8rF*W@l~bPzxZuG@J9YJ!GdldSQ#(I9W0rX_ zrCYDko>N&*ozbs+G39m787pfRQ*Ew0!?Z~;r8}_Fr&HffI%8|MV(RK4XIMEFQ(N{r zBh@Q9pf2Npv7bdOQykbgsXQh{?=6lHYUlmg+j?$z3 zBKzs(j6HvgDcz)%rk?uP)*1c|_Uc$OXKboyujbU3D?}~SGs{KjX(AExD)#CwpWJ^IAP9Vdo^LV6P}*6SGtcY9Y9rWtrKz{ z+N(E9opAiMz1lg?3B|tIE8WhOR-o!R!3oQY$}2h232#djSJwtPp;hJLN_TaoC#b@b zrKT~@8V8y+#~l}IbrIN;!1aX zrEjQ4{BcB?8^u-Eua59}R9qE!=ZJZ4iYwjtl?I|R+;>E!0uHLx4Mzl6IjD~p9kHmS zgVOz9=_IO%!*YK;2UTUCBm7%9sGHjyWq#X1={B&m6jh%UjwtKupb9Q@gr~oQ+B4G; z(<2>}?gmS5QPmpl2wS6rx--}jeMUN{DcOz~IoUz!rm!>_)$bTbc2UHJy&!f+bgZc3NRtkmYDGn{AdV3uMJNCH+Gwqu*~tm_F|J8BtmN$;>g1mnjn;`zcJf2dkJii=IyvD* z#z*O$b4Kgy^__g%eWTUw%}&m_bF@Zm?c{_r8E2)hxOy~h=T1((e6&9NwUgKXeY6hQ zzq1oQWxSR?WD;)WPM!VC_|cl3+}ZVGM{8|bXD3|CxG#Nc^=S2o&K{)Es;TYl*N2bh zCE3{t4>NvDACfj2K6Gb4*=MwVZR_lc?tHz|Iy>QL#-ZseI*isucXW1_gLwM~I(y-s zQF`U^&QAE7@oakMccav8X=h*k+Bw%jM90VcstzAxH#Rgd6brZ+S#AKGD_Qb zb@sHiqv&aLcEbCNuao=vC>?ib7sqp>bn)N1c+2CX^iWb4C!EkYJ-z4dQTi;ai|@Q` zlnyTL;(jxEzv?bd_@eQCy7m%$(WiCsw$@RaJ*kVQP9CKfTX?@SMu}b-k^NpBphs1^0Dv!ZVFO)UOnc(q+$e@kzO(bpMN8{Q2NfTH-EFIH+-qdT-Jw z_E24XQ)gV&+q?MKqef}y&Mr>)sqv6HZNE{PvZsp|{x(uKwD0QTA4lr(j$NH_SFi5g z)g%8qQrr4>^?Tb!>X(eJK7Gqbbu8%Wgx4CMsi$lhsmhUE{lAqXb^6I&ebI{}b;(&> zop4^`JoWUaMr!UwU46hKBemwLuAX_{NNv5TE9aY$2`{Q|xpAc0&*|zTt{$nRxm|tx zWh0fdpsN$EY}~27bIM4a@lscJoH$Y!Z0_ni#*NgC+qyd8(Z;XpTN_4d{`XydSk*{v z_^qpNEaBrH(9H?QHV#%_oiP%QV>jN)9RLveEsU?orjFn z*t%|>u>VLL?cJPkbK`RLnB5J!?%ZyEeOH6-KEInQK5Nk9)4Dm~?Z)@&q3<@pqwMCV zHZ|yt2fDfE#s+PByqgnFZ=A4hx41z+FX8k4yFvS{>*nvCYS7`Ex;f$d#vAJ`_cf^B zr`=q2XM-|!b@SpI85~vnO=-XG0qFKvQ=o{Ni|Q zy{s4C&y4Qw*QG&oZ|?5fj%v{JcXxNfJ&x*4Fqtk?6G_wZ+@)a#k+dN|=o$KmTab@iHae-HmrR<8#h>*13M z>oxmdJ)H2TjuU=QZ*28Oi)a#OWdpO}%#|7*Q53kp`J9~K3LG^0f z-NXI&j?hVadN|=-#~17^-;Gdt$DU6Aa)k1`_wq^Vb+blj-VHtd zx0^@ku~|Jm@tP5u{ZLOQJn#66eZU1Hbm0p zcIOd#ASKEFIdX)q8=B++2aix|VUiPGd3?%V^nZ1#9F^ohf2dQ&DM>EhS*I=&lALhP z<6QO|TkG`oMM*y9?K-`ERgzDBwNA@!N^-(SkC)k>EW=O#aFY8js8j3HNuKm<9o(5D zCtUToo4xbFI`!F@>|N99wD4R0`-OG7@7E+xZmQF? z{dzg!xW@tQ&&SuP^w?hRGqz5Bd-d`eBkOd~z+Qf^sxIM)_WLDudby~Vj~-U1r>lCo zA%m}HbT7|LsY|$|y{1>4Y9{vbAD!!z(%j2AN7bp_CA~cL;JSow+K=z6)!LhTdE5Wh z>XEzoIRC5F6?1yIc4uwEN$u&M)@s;-US7DhR>!RD<*zr_a<1>?q*rSb-fADewwByP zFJHf`R?|Q0<)!m^zwdf^*E6*Vx3!ZVtJUHACwtU`wff?)WM6extyUeI?0GlW>fT<- z{`8t!wG2#l$7!{y%1*W}s8!G6WVcMMO*pdskBNMq(aC;o9ADq5$^O4FwYq3xvimpG zCOq0czOq)ymn8d&V%~m6vghX3>gAi0y=8E1!nN(a{rUKFlAW4VtFpPtKCV-(j$M%K z%Z{kkmn)L}Si4#+-N?t^TcexaO7@Sx)abMilil_EnuN34`m#oUew*yGx7XlsZwHEdEb&u4j zsH(T0y01oujPC81@8IoD>Fu32)aa23y?w}x8ck{H?SYrpDDUFlu5GJHIK+L<$&+F|!N^7)ud2e?vsL}Kdy`7a+lW>u{ zA+1J-Z|&`K`_$;29ld>Zw;Db0O>aMVbWOrn?uCcesQzCNUnKmWa2&mYsr zdw#4=IL-aHUDe7<>ErbOR_pi7J}%u>t(66Re9}AB3Gcb5zE-WWk$pU4U9}E8xsUH& zUabvh_TgMnop7Uj#k19_zOawqe5_jSr}y!v4_51?8~S+nUDXMHx(~XgT2&AAai?pm zb^?{#P>49_m`mq00>A3Uz z`sjD75?*+B*;J*K*Y$PJ4OKe-_P(6MtCVtoU#BdpO1R^l{;w){)O|hVi7N7yeVz4> zD*d{;uXFCMO8DiScWaf#zth*ludC9L|LN=eE2^~Si@q+nuqxr8cR^E?`u)!TPO8$D z1Nu3Ce3h;{yq|}kSe5Y9JFlS%&PYG!R95M(w0_Piu2NY}KWF4tC0zE**{bw#bw8){ zuTuSS{oJ=_m3}+5pOcQQO8D;G+ddODs^Ukf48r%)PZCB z`{BW<;i3UP=C}&|HhqA9s;SWJHxBSSs!;#C26+DP3N3qRfbYz#(5NQ| zxFxkhpZ$A)8r$Z(>jt>}Q5Bl=`T+m8eTA~#8{pM{m21QH0e#{$2zwPBZtX+x^c)wf^9hu^f-YD0gt|?x$v0N+qr1;iV6YqkJIge(U#g${v`p^|PIcSXGMzLm)kT}j zv`wjQ_ez;guS@k?F4Lzcr276PWtuQP)n~p?rZ3J;^}wggbWUrk|2L;hJ1U(;oqwK_>dhDN-{+?Kp5`)rH9ys-o?WK1SEM@W^fGsagi7`S$Lm`ZzDmI;K=3l;-~(TB@bBY3!3rHQFzWiYiat!X3{F>_SZ=#f0E`Y;I&upO!F}p zO8s~9@u%{3f2MiDMCpfv(tYSSFbPMdd)^7s(k|&fX@u0XPrCP%Ni)*Z{aAtYSx&lZ zvZU&gbbm8Ynp>UjJ93;tx>5U2LzVu)zqbc1z_JwZ0DBUZ64f-+Z zKI8k)$Q#rB*B7CG%}VzpABQ?Tly1EjI`4^eZ{HMp`T2BTxgj)Q3Gcr$bj_M{FIyPe z{%X2UelAqBCEY(i7P|L8>7MmqX!jTC9S_lI=9dQ<4>-_kwl>d*lP4D!B9L*qIO z@&j$57mpp}oXMdhdkyj%jiGZ=2l@JZX9mHO(M8`Zk$g_8pXwt$#MggtGD+hVW<`Nz9(jeEqQleAe8sraMqGz`b@_9>2 z^v8}t{{7!28u1OE@2L_!@be&dnNy;jdk6WcdrCC?;K9zltwh&%9PG8%m1s-1!5(!* ziF)@N?2j%eQS;!zK6h$~mgNohPZLViUV}aTv=SX(JJ^SwP@;#AAMDw6CHm^L!OZPT zls##%pUyAQ70rV^bZCh-UOd=KQ%iKzjKMBVF44(14fZRYOZ4bngFX64zK(|m`~7w$ zczg$Y{N7?+{O`g3@6W|rwS>?6ZLtnqJJ{cTR;;?$2D|N}V%@Q2uz!B1SnvL4urGbB zSY5vy>_68Q>+~P^x|S8|(ccDpzxl=RgNOL)xy4HDFvJHwT8#g1h_Ab^SkEO5@j-VK z>$?>Gd1kRPhVtL17pt{kh_AV*So6wm^N{jYwAubNb>%&|kfXB_|ij3K^kOtGFn zcZh!-QLJy{870 z$Pk}!RI%=vKg6%MFV^PeLtOb+5!d}8UinLrD&H95-0zAs{rw?+?(-ro{bUIHts?zz z=Mdk&rATSJhxo|Xi*(kXeBJAc^uR$G{(V`IHXo6}{klj8cggUMxkW1Jo#C;M7U_bt z48L+;k)FxUaM2w_+Fq35=Vun_Z&evio?fJyQ5nATq9RQ@IfL)F2#$G%|30ZmJI>4S zf5#Q+*b6dz{FowDUy4A=i}X;;W-6G+IC-tJ7g89!#^{8*}x(dJ)7Y# zl8ZETVTMoWQltl0W_b0HMS68(hSS;?>Hpr$@ZEb0HDGIo_x)U`F*`DR-nWICu`9z{ zJ}cDoKV`W1qe6YSC&N#^Q>b?BGkwHsg&KNPCi~$+jq94}kCzr|W}i$~&MVZs^h`hd zbfLE8WV+)cg*vb#(-+@csKM2l{^+(sjUAoo((4O#p)@novyU&-*>`06m)b(ze1E1-DlOCt|IGA~;f31rY^J+p z7V7^NX8MwpLUmu2>GzWgRq|4%^Ewsk%(pUq_u+-QW^1N*A6Td-c4T_=p9R{uE7Skl zU7#<2%JiYT3e@GXs*f7#q|F67yX#P2@^XQ$>oe5vtS-=F=|equ zae>z44E6QT7ifF&P=E47f&Q!->f!$=P}k8zeaGwq<(@LsU)@}wTTFJ*BQ~)PusCV=&&=qeEbx!vJ-Sq)q&(Q^%`{_`>e@KB=e?8Qx`xR)* zZodBi%hy+b4)x35=i@WVa_2Aeb<~krKKtW*_3e`7h41DouXmRB-;}S~v@DNapRd!h zv;2?c`I=gk<(>2Mb!BCibDzm4SD57)kLGL6Nm+jVzI;93$j7@QU#li(aUagtrt`D> z+?DzI=<+Q8d||%6zBbDxP5Juu)-2DQn6HEG&GMV4NjQi;*@;){#jm;l&{9^S>AVSz9xT_<%+}eb^iade8YkH zy8QPnzxKy)U2{OTkJvq2H+RVPabFMDtYfo%*QdjEe^R!$d@x*dQnG#QTf_BaX12$^ zG+fW-XZxO2!||wQ`@KcOwP*zY{a?eibWFC#JU(12$7gdN8m={GXZx*L!?nJJkAKr} zZM-DgBW4WO%QLcl!zIJ<5@vgS%W%DRSGNB;d$?YIDBFdn57(wAvVGBs{O|MGexaU! zzc|}pm-BYccE3X2@0Dzi&*I~}o$b2^@^QCi`;BBi&u7^_s0*L>+iVvf$=C5qwl8SM z*Y#JnpV>1^iw@55CqE6-3mtRZ>6>ACwp)%z{CAk1?3?4OJ{+b;2IY9+=3%-&H^*PS zJWR7na@^g+baQo%M=lO-Owa!>$7_!q zriXve@i*;;>DB{s-Dz*0rgg}5{G6vL$L9LnZ}N0XQm*g(Z=R}Ca=rA!JmqHQ`jgFh z>XV=A_OImWh_YM{ah`s!%k`MWdHUjnTwnHlo;Hum^_(a2$iwG){X={qj%TCYJ0sqSNwiEO8 z^`cz=S)Zr3R^_^9MV?-KDc8k?d3xxrTz;Q>as&FgZ_kyZCxL=V{1K zxqknMJaycY>z@wF6aQ!afAR0ke-m$G-d4O1*P~qVG0evjAJcqn@j1-r5}(t2Zt*pk zuSI-K=4%sQqxo9J*KEFa@jaODMSM@@dlTQI`Ci5MY`%B#GcZ33_HudVXCr<_=4T~- zX69!neum~}DSoErXDfcj=4UN_=H_QFeh21vA$}+3cO!mB=65B2XXbY&euw6FDSoHs zcPoC!=65ZA=jL}W{szq7g7}*-e;eX&#Qd#@zZvtlBmRcW-;(&7GJjj*Z_NCyiN87X zw2r$;&0Uat%|={^S4VcaG3d97Jt*`Z(ID0o4qmp1Jmk zYoNIniff{|Hi~PcxmJp6rnz>CYpA)FifgL5wu)=4xz>tnuDSM#Yp}T%i)*sEHj8Vt zxmJs7wz+nTYq+_Vi)*^Mwu@`Lxz_WXn{TfD;vQh`1>&Ay?hWD|VeS>;o?-4C;vQn| zCE}i9?k(aTW9~KLo@4Gk;vQt~MdF@h?oHwzW$snvck<1>OWecEy-eKG%)L$AU-SmvxH&Rpi~ zCC*^xEGEum=4>X;Xy&XY&TQuFCeCo?EGN!%=4>a7p&V1(VC(eN8EGW)|=4>d= zh~}&)&Wz^lD9(`PEGf>E=4>g>nC7f0&Yb4#DbAqgEGo{V=4>j?sOGFH&aCF_D$cOx zEGy2m=4>m@xaO>jx0>(c%?xn{HfLdRCN^hdaYi<0WpQRUXJ>JSHfL#ZrZ#75amHru zkRi_8=Ikxb;N~nY&gAB7F3#xYtS-*%=Ik!c@a8Np&h+MNFV6VptS`>|=Ik$?0nD?2 zcqTB<2I3jPJS&K22J`G7o*~S$gm|Vf&lcht!#rzka#9C&qm@I$vi8GXD0LPB%Yzn zvy^zI;@mn!JY$(>E%IH(=GjX;gPCVB@l0l(&G>$c&9j<#W;4%j;u+37%ZXJPV3vLi21Wo)OKnqIhOB&yM05(p|qCES@RNv!!^(G|!sinbSOb zif2&sEGnK!&9kX^Mm5i>;+fSvyNYL6^DHZ#Y0a~(c*Zr)y5gDFJo}1gVDl_2o{7z~ zv3N!{&&uMN**rUoXK3>*EuN{(v$c4}HqYAPncF;ji)V22EH0kO&9k|9MmNvu;+fq% zyNhRd^DHl(>CLmfc*Zx+`r?`2Jo}3ofSCn|nShxMh#7&I6^NOEnH`83f|(_VnSz-u zh#7;KHHevmnLUUZgqcN%nS_~5h#7^MRfw5|nO%q(hM8r+p${|L5Hk)l>ku;!Gy4!T z5HkxAGZ8Zz5i=4qD-kmjGdmG86f;W^GZiyi5i=GuYY{USGkXy;7&D6zGZ{0R;T#-h zRwHIMW_H7UD9kKJ%yi6bN6dK4tVhgz%f{ zm?@drl9(}>S(BJKnc0(=L77>Um`R!0l$cSOS(TVsnc0DMpXQgG;-oH zvqLdMG_yo8Q#7+hF=I5dMlo|Vvqv$5G_y!ClQgqQF{3oIN_d{7W_BrNm}ZtKW}0TU zDQ28z)+uJ5X7(v&pk@{-W};>`DrTf+Rw`zuW_BuOsAiTbW~yekDrT%^*2;aj)XZL) zJCvGPteDA~*{qn+npv%w*_zp{nBkgPu9)eX*{+!Jnpv-y`I_0Um;swvu$T#(*|3-q zlTR2ZX2xcAEM~}NmMmt|6jM~hq#mw5wuEh-7 z%(BHy+swAbjN8n*#mw8xzQqjO%)-S?+|0(sjNHu1#mwBy&iTH}%q(5Z)Xi*N%-GGW zUCiA1zEbfhmzi0-n8};jyqM9OS-qIqo7ugX;hR~$nCbJJn<{4fX4Wre{$}+9~24;64b_iydAa)97w;*;5X4fEg4rcctb`WM4A$AgGHz9TuW>+D0 z7F_pJ#16ykGQ>{9>^8)X!|Xc5&Vzh)ir9geU5MC;nB9ojk(gZx9EozXI}tk+vr7>> z6|-9rI~KERfd^l1b}wQFV|FoOCu4RqVn<_kHDYIDb~j>&LoX{u>~zd-N9=gau1D;A z%GP@?Rb27Upv4b+ZD6x|= zyD71wGP^3VvogCYvBNUEEOMk3X167FTxQoLc3x)pC3awD7bbRMW;Z5wWM)?;c4lUG zCU$6MmnL>;lD3(Ch}qj?nB1#m>;|4#f`9>=MOJ(d-t*j?wHI#m>>}9>osQ z>>|ZZ((ES1j?(NZ#m>^~F2xSh>@vkp)9g0Ij??Tq#m>|0KE)2y>_Wv()a*vZj+FgQ zf3Y()yHl}4HM>;JxTVtUR>h9h>{`Xn)$Cry4%X~q#ZK1jX2p)y>}ti%*6eP@4%h5* z#ZK4kcEyg@?0Ut{*X(}94%qC1#ZK7lhQ*H9?25(C*zAtQ4%zII#ZKAmmbsr*nO(Ek zIh)0JwAe|T-L%+In_acoS)1Lp*kPMpw%BQ#-L}|qn_aiqd7It0*nyi}xY&uC z-MHA1n_aosnVa3Y*rA(Uy4b0k-MZMZn_auuxtra)*uk4!yx7T`-MrY*n_a!w*_++H z*x{R9zS!xT-M-lIn_a)y`J3Ip$N-oufXD=xY=FoJn5=-v44CYI$Pkz;fyfk?Y=Oua zn5==w9GL8Z$RL<3g2*J8Y=X!rn5=@xEST(q$S{~JgUB?PY=g)+n5=`yJecf*$UvAZ z1U}JflZ_A=36qr&nF*7f5E%-Sr4X44ldTXL3zM}FnG2J>5E%@U#Sobclg$tr4U^Rn znGKWO5E%}W<$&K>?dcVLM8?BpJw)ciWIsd(#AHE4Cd6bzL`KA9MMP%AWJg4X#AHcC zro?1RM8?EqO+@CzWKTo}g}qvDkx4Px6p>LeSrw64G1(Q7VKG@2k!dm67Ljo=Sr?Ic zG1(W9fiYPa`bIS-8zV9@CMzQ{GbTGDGBhSjBQiB6TO%?yCTk-yHzs={GB_rSBQiNA znz@CQBwVWhPrDGG-=ghJU@zWY0tf&1BI;Ce38iL`KbI)kJ2^WY>V45tZ$Yh#qrpRcTtft6pn(U^?aGETq$aI=)r^tAktf$C)n(U{@ zfSN3*$b_0~sK|(#tf!B` zjH=11ip;9Xu8It+$+C(}tI4*CjH}7Iip;CYzKRU2$-AkwYb!FhCVML~xF(A$GPx$3D>Aw!t1B|QCc7&#ye7*lGQB3-D>A+& z>nk$9Ci^Qgz$ObUGQlPrEHc6-D=ad@COa%L#3oBDGQ}oaEHcI>Yb-LyCVMP0$R>*{ zGRY>JO#i#VWR*o`*<_bRhS_A9MW)$gn?=UiWSvFk*<_zZ2HIqyMJC#0qeVvAWTi!B z+GM9ihT3GQMW)(ht3}4zWUWQ!+GMXq2HRw@MJC&1vqeVRWVJXxyY28Y`Msoo2d5}hH_ z9TFWP(twiU_bgx7Q z%XG0sC(CrRL`TbXwM1vjbhmU_&2gs7B|2TE+a)?)rt2j-U#9ydI$)*?COTp4<&G5{ zG1C-8(=8JnGt)H_oio!t6CE_uMH8Jg(@hf{HPclSoi)>4;~ajR z>9UDVo9VWRj+^PaiO!qpzKIT;>B5Oloax4ij-2VriO!tq&WR44>C%Z#o$1zzj-Bb+ ziO!wr-iZ#L>Eek_p6TX^j-Ki2iO!zs?uibc>GFwApXv6Aj-ToJiO!$t{)rBt=>m#Q zpy>vRj-crZiq4?v4vG$;=@N=gp|48+o9GytuA%50n(m?KAet^BzW3uzH&JvHO;=HL z7EO0ibQn#SQFIzjw^4K)P1jL$9!>XAbRbO^Qgk9sHHC}EPdn-D)ri&{&xu%;dI=ZH-D>}QTyDK`prpqfjy{6kM zI=Hdliu;~KRs~%$-rJ^Hjy27F}Y`VjuLu|UlqEl?T#iCyHv0ZPV2joo&GZ0PVs3w;>8gv)y6LWq4!h~Hi%z@gwu_Ft>AH)~ zyXn4*4!r5Yi%z`h#*2=;>B@`Fyy?!14!!Bpi%z}i){Bn4>Dr6Vz3JYI4!-H)i%!1j z=Ho>=(RB4iXWw-9MTg&X`N<=lXuAEP<8QkDqVsRM|AGNvSO9_vVAueH5nxyWf*D}g z0fHf5SOS76VAukJF<@8&aKFYH_JCjzFi$!{FbNEsKrjjnt3WUd47)%u49M>sA(#e+ zZ6Fv2hIJsA2Znth7zl=iAeab-jUX5ahLs?g35J~@7z&1^AeahTQ z7!1zOJwh-UyejPo&NpKXt3fau47-7R^;pAl5KITdb`XpQ!+PL;KGv`w1OvjbAOsV_ zupyX-k2S0a!Hh8M2*HprED82oV+~tEFeVIZLNF%`dqOZM42wcADGZxJFe(hILNF@~ zyFxH549h|=EezX&KH5o!bs?A+hJ7Iz7>0!*m>7nQAs88kl_8iJhMgf88iu7Im>Pzy zAs8EmwIP@rhP@#e9EQaqm>h=9As8Ko)ghQ2hTS0;9){&1m>!1hAs8Qq^&yxahW#NJ zAch4Zm>`A?A{Zft6(X1+h8-dpB8DX*m?DNP!aU(5!x|CH5yKu43=+d45lj-pCJ~Gh z!zvNX62mSL3=_jL5lj=qHW7>y!#WYn6T?0c3>3pc5lj@rMiGn@!%7j%6vIvt3>Cvt z5lj`sR$C2wHG)}V*fs2jPp0{Ms9@R{wvAxi7}kwo-Wc|cVBi=Qj$q;#HV%8WlMO3J zFmnt$M=*2@ONT)B$%d^X7(0fwqm>;_G3*_|;4v&7!Q?S)9>M4_tRBJaG3*|}@G&eO z!Spd~AHn!BtRKPr@k75HqA|6n7#5IV0+ACxL@-pK zngp}Su$u(K$*`Q5U!Q8&PJ;1dSWklaWY|xF0cBWFf(d2VP=XOInA)k)L3?!VVMc0 znPHm=#+hNA3Fet$p9uzIl-7StU1A)GweCRpffBwIG(2&Hk~eOH_ou?1hdYt z>jcBju@(~>!SFLIKf&}fY(K&HGps+s{By}a z4pjHM#~Bu&U;-L8pkM?VR-j-88g`&y2pX24U&EJDE~ zG;Bh_C^W1>!7McFLcuUJEJMLGG;Bk`I5ez7!8|nVL%~2aEJXIn;|&{8FcJ+bQ7{t? zJ5ewc4NFll6%AXFUe6 z9R=gjupR~T(Xbx{1JbY{1ryS+Aq6ASup$LB(y${1L(;G$1yjvA)37%MgVV4$1(VaTIR&HBusQ{^)37@Q!_%-l z1=G{8J>im^Zdjj!`RUKU+D|Y*4GUB-K@A&JFhUJ0R4_vgJ5(@44NFuoML9?B2Pf@x z!x|OLQNtb;3{t})6--jYCKZfQ!zvZbQo}A43{%506--mZHWiFh!#WkrQ^P(L3{=BH z6--paMiq=y!%7v*RKrdc3{}HY6--rM`QyHTvFfEC?F*Qz{%PaBfWhh^^Y#TyR-gOe zzJSqcSgirG)mvNk1q@fiat)ZSuCCY@FkXG-kbMF3)eE}p3mCA51sgD7`F;KsFk%fW zHekjYc5J|qH7wbHDQnoW0b|y%W&`G|Vb2B(TEn6Zn6!pX8!&1Ot2VAII>WGQ1BR_( z*#=Bo!?q0=w}y2aFmDa}Helcy7H+`AHEi5~k!x7F0W;UIa|4Dhxx&2xQ`fL{1IDgl z?FP(UxLJ+ z&oC_DfC+5azyTxJuz~|-uwe%W3}M3(4w%A*EgUe04Qn`H4jcAxz#uj(;($qP*u?SC zpJy0WalkA#?Bd8dq|va9;!)}g$PH8kO=UCs?XxPs2#l?;8wfOgFe`TX#KS%1djfMpsH8(XHHgueO zN26gy$IN>g4LdrXe5lc|q+|U*8x31JK7G2;u%=`0^Nof*9o-f+8WwfrEpIez>NtK) zqhVDC%xc4~j+vVp4a+(nd8g5x2h4E84i6aOh9w>_#SL3L zV2m5qc)%Pt?D2p>Zdl|2liaY$14cPL+g}1^xnY+F40FRW518hLZ60eMJkzkw1LnD5 zp9c(d!$J?3=Xq zH*EHR(Qa7n0khq(+XIHXVYvrPcf)oM81IJl9x&ex`#oU58y0-Pgg0#XfDvz4@c}d5 zu;T-UykW@)OnJkW4;b@?H6JkNo!|0Pz@RrQ`hZDq*z^IT-mvNeX1!t82Ml||vJaT{ zhHW1(?hWfcVBQ<{eZassEc}3pZ`k+&Bj2#{17<#X_}wvX`dNmhA29U|TR&jz8`gfn z+&Ap~fWdEA`~j2Su=xWM2pj^&B@j3Tj9VaZ3>eoy;2bdSfxtmvTm*rWz_jN2h_JQ&wQ z;CwLdhrj`0To8d1!nh#+ z>n3pC823%!z%eeIz=>nrIDsR_xN-t#j&bJ%4jtpt37k5{trIwQjB6)w?ilw@;NUSX z9>T1=-*W!_jgyS4Cvf%{cTeE(F)p9L>0{hJf#b)xegfx@FUt8cPJNc|C+W-B_rfIO z1_~TO#uXGegUC&M5jcd5ODJ#(8Mjd27&5M*z&T{xLxF?HxQGHLk#Q3Rjw0hK3Y^m*Vs@?Woi9ypMU3n_3S88=ekNHVUZz?o#+Nr6MjxRe5? zl5r~qjwQJ3p9jt*<6a6JOvc3&IGK!_DR49yS5x3@GVZ3p;bdG+fz!#jodU;`aXkgj zC*yt!98ksu6*!@c8!B)_8CO)`j56-1z#(N^Qh`&-xTONelyOZ3&MD)b3LI3%MHM)y zjGHQOR2f%Q;H)z4s=#5zRQ_ncT?Ni7VDj5{rGs2P`9;8ZhiwZO4PFK~M-zwI33 zUJD#--Zy@G;AHc->g|D}&A8eEXPa@i1r9gkatoYp#_bk3-i+%laK0J$Ti}2*F1RS! zz~`Iwao~tEuDIy+);Y!<7dYgMOD=HA8Mj>Em@}@qz&U5!bAf}-xaa~WopIAe(l6&2 zS6$$&Gw!;;VP{-+fz!^o?E=T0aoq*ZJLA3!9C*fs7dY{Z8!vF=8CPE5%=6ygJ_;Oq z#-$fH^^99DaO@e^Uf|p_?!Cal=PPgcC~)!_H(%iBGp@eC+2_+MJ_;Ou#^o0{{fyf$ zaQqq9U*P=njGfzJ>r~$F?QMY*(6|8uN1$;92F^g^4h$TE#w8dy1&v!Ua10vPVBj1y z?!mx8Xk3JWlhC*c14p586$Z{i<1P#whQ?(WI1P>4FmN0i*J0p1H15N|foNQaffLcV z5d%k}aU}-MMB`2j9E!%J7&sM;TQP7f8rNdrTr}>*z`=Qe=X>Cwve%Bgt2O5I7`_OEPdu z8n62Q80C~aba?vo^0Hhfg{tnG6QF(ac2e&P2ejq5XTe!6Vfdw~PgxIhCZsBwb^j!@$Y z4VCL26v2fs@p@Ndrfzag_$nQsXWS9Hz!) z8aPdj+ca>T8rNyyJT>mqz=3L9sDTsJxKRT~s&SlS!p0>WIE9T{IB*Ob z*Kpt*HtylTL2O*afs@#{i33M5{g^icXR&b?2M%N7G7g-^#%&xpj*aU$a2^}?ao|8U zF66+8Y~09!BiXo;17|X?>o)?2G9H9C0;jTZD+i8c<5~`!%f`JNIGBx#IdC!?H*?@< zHm>Ht*=*d+fy3Fjoa5YoOfhcf!0~Kc&w=yVxSsA*2xU6ILw|w2F zydF5Njq5saUK{sy;J`L6?7)d_+}MF5+qkj=XSQ)?2M%rH(hi*3E`0R0z_D#y+ktc2 z9smAX;NUhc?!d`y+}weq+qk*|XSZ>82M%xcRj&q4Z{zk39N)(E9XP)|X4$K8c>Pr4 z0*`&8ry4hS;0QOa@W2^v+~I*k+_=O8r?_#82aa*$8V{V~#yuW5$c>9UaFQE0dEh8F zuJXWHZrtU8!`$0%eI;<3d-X-H1dek*e8ww*^W3=4#iT>47ud zxYGlNx^bxoPIdol<;#I%-MH2R=elvP2M%`QVh^0`#?2l$+KsC{aJCzFd*E<4F89Fc zZrtvHLL*BUL1E;)k%Lk5m@5_EE zaLya|eBhurF8aVpZ`|~Oqu#jc182Q)*9Q)JtS|9h`+vHy_Ump`6 zYVwMS>m&2gCeLVCAAda26q_r{N&}RSGur@wFqS?>ot&PWyY4)UEYvar=&F*#Z+DPiz z?Dv0I6We+>`}VDC;@$zx_>|Vf@#)Rp`^=g+JhR!0?phNsmpA*_>7}$Ij=QJtAp!%wEv!pW5;7mo)p~?^nfFEBO9DSQU4!Y4-PC6$Klc zeec{=vEx-f@2pjEbPe7H8hEB2LY1@uo{w#83GxKJUyGaa&1?+tsazl=2oon#J2y zx45|bia4ph#qS@mBEBEp;`6^*9@m}N;tuaFkM5_o_=%OvW8Ud4E_rf!R88RRZd)E7 zp3~x%iT zixp3`_|A-FQS)4j`*c|r@4UeK?OPhBFKThc&ZY6y(iU&oyfn^V)#3@umc}1zTm0ic zm&P?OwRpzOOXINDTYTgNOJmksE&j*2rP1}>7N=J(jX7KSISyVL{XXX7bXpp7ceMDe zy-Q;7mn|Om<&v1UtHocwxg>IaXmQ(;C9(LY7XSIklF0w9#n;`qB$n^t_|L_$xJ#=`K3^QUJzKqg)8d%dyVZ3s zE{-7sTK(q3i(_tDtH;b-9Q`v|+21UVIoYiqfAZq!I=t1NYH{3E)ar=?7sp|xt^Ts( z;<&c5)sugJG5)A+^{yQ+#`z;#;kUjRJCASmw+mj3GfrxC^FuGjmeX4O-L)@9Z6p8O z^kS@>$bUca#TYu7w=a1y9&c)8Uh!gdI=|KD9{FP2a8awj_;peIc3G<@e6lFco8Ic} zFE5G@uW9wTd5fa%hE~6S|DsrWORG<~dQqg@+3GjWTNHQS-RhbX7R3P%w0dpfqG)-z z)kXal#kPO8dQpc(QTT&X`h~5&`}u|O{gPI9xOZWk zyt38TOsAy0rq#clvoKOOwz_5X!npm_R)02pVf_3?t54~@Fiv}?)te6C?cQ&7>5mJd z|3`eD4;RFZpR_u4-Gcb$vsORw?1C7zv(<;sUJ&!XZT0kN3*wj`Tm8et1#!VItv<71 zLA?8Wt2gH^h}^$gU6!;UW*^YzdF>W3A8&K=_w(bp4sE{u{rU0lquRW8_5A2?Y@4S( zJwMLv+UBiy%#Zaw+gx?&{7CN8<^^ZYkIM(NxmVr%csH%hH)qX{AsKD{rQ7_Nnce0y z511dH3~PhmJ}-tBwK;FgytrL$eq_bG_@biChdePaifY?@{;l(3Rzn-Fhk2ai+gx_~ zyeJ&o=4YyS`%~N8F=JlrIK9o6bexCHD+U6sc zz7UsP(B{8C`a-<&|E#?QR8(K|=s!bC3l=7JlA3-+nry#ySu)&zI|a({QlN^|My?(-L>v~PVBSKIs5E$?wLC?cNA%ODSIu{(WaqK z`dWz3NW+DL*TSZ8X(;Hr7K|pPVRW0dw2w@~Lk??UL2eqh__hWf=cVDq`)j~+ei}YG zu?Dn-X&AU^4IExd^%SfD`<2x0@oQjkX&R17UIRX*{ceC%q7 zxJKy-!2s^)jgO zIStPoD1)%?Y1p!?45kaxQ8&8`PMW0S1#KBvR7=M;ab?imCLOuHWx!RZ^bTdPy=FRn zj$8)sok-rS4B9nJ$8)brA+||6HoII31ufE1fu(SvO*$T5SqfHe=~#b8DfqWf#}s8L z$UCJYjx2>T-*mJOEQLE=(lN@T6l!!&$MsI7(6d)M3XMuZ9h8nC&sITMNIEY1XBFIv zNXM5uR)O8%bo5=e3c3tW$4NP>AT=r-FG*IxqPTQyI&2l3N=(Pp?yKNiayss8w+dQ| z)6u-8L3z0oR;#JUF2Q22M{$ zo757>n3azG2bMr_K9%cI0%sSbGZ!y#js%$wR2uET-uh7r^gnrQGvTb2`m1k@(otPzOU(c*K{RZ`$_s=t$+_kVjOm91z4Ml zao(O4(9B9q``i^EvJ<1j^c4{1D8^vL3P`Li#z~PYKwnRc2Yar7S&hW_%WVY|Hx*;& zIxApTOEF3WE8t99F_t|kf_rXae0a79KC~BO!|g?2>Mh0rONyYDNQ~1a6+ufsF&;`U zf==DV_sV05hTXMHboE1~ zpY?LMl_93zX)J>WEQ8lm#5ia5GWalq+LyNsKF=282i-FGK39xQ z)Q3fpL)-S2tV+CM9CLX0{AWSBuf?^-?fhPyM;P6ihaYaRe>} zI!5Mx3564>%a zjQa;KfwB)`eB!?ZmV6eYO`9b!=erm^9hN|jK!O9mE(X1c1U2^-L%M|o3y&{`SZfLH z->?`4*h}!?{Ke3-h6K&C7K3*k3AP@y7+Ter(D#!TLmg)cCi^Z1^JWs9)^sua+fssS ztQNzAwh}!3ei58=li;iCi(pTC3ECc91gknp(4}k<Ybm1pDnS zgyLukCKeUKw0H@Qn_39s(bNxFAq+^7;I`p~&{-_Ob3F>7zFdOOTngc*N`l6<3gM1U zg7tnbgneU4-=l@FWV{4>pI!)KCrL1B%R(4ARYLdm7DAU?>feNg&>&BO%TpG@*SQkh zF<>EFE|B0ESO}XIOYnY+g)n`&1V7s@gwe$kwEk28J<25Le7gV|tt0(M3gGib2?ne! zfOA_VI4HjWN_JBJxdIrA64Z_=fI$Z&IJI8^xE`VQcPapr6B1n8r~s~>mLQrJz?y%k zzSj#N^Ag$R@&XuejqHmHpw%r2{#dyHzTK6e)r&X9*4#EPz$tB^dW)J}3oJOglRtdYDL2vu!>&SV(cg;`wmX zN{TbG=R=8|6z8YS2Z^H;mk*i`thN+a`^^XQdQ#ldYCfE8D8)VY^I>iiDIWej4@S0- z;^{l{pk*5=UOYMvUb;x}#=3d1(L;*&=gtFF2PrETke**6#Z4V0pN$y~4mZFo>T;S4)!nxohBRCAFfT5qGNhK%*>Hu^}+cNI9-ai{`nx7B}J>&`LJb< z6fLUf!c~7ec0-C;y(s;T6jknd(BOd-Q|jcw z;m1;p7UV(db14pdG8<~YmSUf?vtiFWDZ;kd5cjVXJr>UftFKaQmOUHR{UCd!&4&I$ z8CDxK8@`&z@LQMJu+Tz=FIvt9e`^`uw3`k0?PPfR(<~V8C_}tG3tHBe;o2j!;7DB= z7OtHI2@Pd9Eq@l6H<6)^n*}SH%W%x7SeNzhWjd4WRm_&4gWnGF&B}3H|%ZaQ29q z@G?Y(T)<3vzb3;(*O^dnkPO3W&4l$sWhnZY3q2!c*!)p0+=!N;&FNf7i5l z2E;FtVQ;S)@OG&T+tr@|niVp%HJJe>t7Q1*`E;1FT88J&Plp=oW%R#!)1hFK3}-Hz zPWMw}D9M>l>xvA+CDXwbW%Pag>9BFX46ApW4&H~Ue4FX8>zEABI828wr)0SL>onMZ zR)#tEra|`$GE6u=4GvwVer%Wq0oTdy^QXb#TQdAPmg4thcs-HwAIfk`D9JyidOK73 z7cxw4JPo?Mp>eA=4R*b!a&M=C_a_;CzcLjzewE>+y;H&UC;36~R45V3F?+^TXkseI zDCJZru#jWtkyD|DwH&MWnhI0w($SJbtB~X+&Bm7M$2*M^U07EC&$U>C&P;b zIS$@A86uM8*mBuq*qJKFkCP`u6N#MuS8Xz6%jK9mWHP)`$#F#2$q=rSW7{^9VQYq* zJ_nu*^~TBZ;Fn3DpGfVzI|=Simg7)*h*h^~a%{1F5-iV^4hm#V@j6UIaBW(v$n84n{`DzN8( z@vyv&0*zrjJathZHXjeJ9tu?3j0dro0y}&h2U|KR@b!&x@Wn@gs}7C>5hyUWY#iwQ z71&_*IKb`-yrdZif?f)o9y1R7`Y5nhpK-tiD^SpW9P9~I;I_Ks;75c4(~QP}&maZ1 zdX@#sq12yqS+Hq@0`s8CVpAq zC|2O*mRZn8robt7S&*evpx>uV*r8G2hg+HOR{SO_gr;Mb*NA)}b=F?lSkDOKQL@mRRAMu8SX#zM6X3f$s97CLNJU|j35 z5VcK#j@8G))SXoS=M31oM}aAKGT`n$8n>evV0B1=N7iP5*HHyZ^D|)B2?aWH8IW~a zfhXfLp!A#q6~P&B?gI6{V+MS>tiV$ZGNAr-1u9K5!2gy4yI1Q-9wK;hGQh|3L>B0W30zJ3r!Q+DhGso*8^pgV5Md%^zE7jXf57U1r zF!j9-RtuE4YrhVT8!NHeOdUKnQ_|-GI{F@k5|_H`pplIdU;fg9kG>&uF2)qY^U< zwUAm%i6@e^knNML=WwHCHFQsVOK8aUTPiO*MQ;7M~OdZ;zackeW`-}*g%QNY6S!)Dse@i0>YA%c)N}QhNdd9_7ge8 zh?N+;RSu(NN*q5y4(UoI?(8oIg+_^Qo5?|^S7M6~GRPdO#32V{Fku|EXQm7$PgLT* zC>czhti%uQGMGM<xI`s^DaA@W-Ae-5rAqu-TLRUTgYY<)_8QY#f!ydZl&Oo6=DN(|eS0$J~rn3k0S=^x2nVJR@;vl2@i zr$Fy-N<8u=89M${;(bhp#zGbTnwAXKCMv8uA{qWQQ_*wllHqnW6$XD#f}_?d9CacI z*4e3$o1X-89aNZ~m;_u+6|VJ8g19;=JY=2(ed?+3#-%af-cW^ai^f3B#ws+Eje##s zRame47`V|wMfY{b0Jc_P*L$O3NjnuicV;wXxsm>i(GcsYLRG)f(7l5SCpR1o&Ae5( z;AJ8h`>L>XS0dbFD%_Ei2z&ihcx*@_EbOMjE3Fej9iYO8pA%p}pbFm~NdV6v>d%}6 zu<55ltM~+X9IB${10=w{2o*LlNr3qSRoL$QD3Ac1a%vO-8D)m)|J( z60O1zyHRi^PKASR#Y0ho3L{s?gL;e#{KJm~bU4`j&cZh^KS5&ywBoZ!OQ(^J>5s-UR zg>#pVfWCLAf9WH@;y&5WZv^arsKPkA5ukmd!th(eq2qHE`mG)guU@LqMLQf;ydnSW zGaN>|SD|U$;ZXBm^0Ozy;KXP0yRE}u>^G`!!Z7k{6|U<)44w(pIIr0-C^S~%*!M#r z%uJ1=_YVb=YHAG49SU2l)aX5OC?wdbv60(QaH_6G)1O1=d$DSKc5(=)YN_$ef+5h# zNsXIE4}nYd)R^CS2#jl}MvcV~@Mx^Y5tj$Ut)^=9TQL|Ww@_mf*}p=umd*dOYTP@`LNf7m%vjb@_$FgQkyH!SgdjV)S- z!Luo9{O~Ch^wZV2?{FwM%v9sFyiiy^o9d4Zg--b-*FF@E&Qs%CVJHkPP~)z%A@H=2 z+PNqMR7=#@FC_#lmaEZ;g+TraHQu!ff#xOD|7-nVL#Z0mOZq{VH8kGJesE%)8h-`! zg8>`Wc&KJSxVu@6IS+zi%r-TKYz&5vJJeV+GZ^%{)p#`|7|iynv7k{fOxv%I3Y)8tbP}{Gl4Ji28u&i5h2H^?@DF zsGrw*L#LN&v@Gcjn_iP&DSCs)J2mP9dc*1u)W4d&q17ifzPTR=OTSS6Hv~fc?`n)1 z8whiLsOfc5q_?Nxlr>O>gcl839g$CbF?gh^+HMnAMFNm_y;E-0m z;F6sNZ9nydJ`Nh(f2b$ysi8sH?4ICRTSMO)=n2c6GT_kht}8jN!60hc;z(B@uu@awF>?d!Tjsjmj(xb9E`G-w~(9dv#g+)=+fJnE{! z*yr6KxCga&M>p8qQ-fQxyFtC)8jKv+4aNqM{ubTfaj*v0e&`B)LNz$xKv!57uE8I< zUBPjH2A7TOO5gL zWDUxj0F0QTL5H^tHcr#vYGh!ZtD*mUXE1b@2Ja1HuqID~+O`aYb2V7=s|dp9YjDj` z5iBpzU_ibIJ{D^5R-6cWEFpbfBFI}t_BIy5gCerWIbZNB)?nwwzL2qs{3gX0PL+|J znJ?5`tHCc;z7W4&gHx~h!1|3EY+T|4-#63vDSRMcn+AIZ_`viX)ZQ9CaAlVUlkRs0 zXVl=&^_?MMp9ZIAbcVGDH0a!~GyHo{9bv{p@}tC#aQd+ZUw7&VR?jr3H0uaGUuaNxu>)kjqVZYQ z0d~L9V0Cc^`20?TbNxDi$43n|vg-h&KhZq7=>^NaXs}(G7yXV+gB#Rd;P8|DB+v^2 z1zOxy+Y2}&E&4rb51UN1cyLpDcxtA_URmv-VKptD2yG9cR$A=q+#bf+Xz|P|PuOaw z#n9cJ@T9sH&*ykT-5Oeq7~%=NYiaR9D^F0@q4*~cSXGzehdkhFeJzI1_5kxnTKp&4 z1H2k*F~q|IqMB;)^e=aq)?AB0r`=(DOD!HNaEFJjwe)|Y?qJtWi~BpfLuXelG7EQz zcGu$eOKy9rv_@gArO>HKiTg8=%F8L)(F1uoiP$w}S>lwP^CWEzL(QDh{`W z0g+mKI=d~TM`>|rOk0=|qs5aRZDBfaG~v+}o-JC>Ln4 z#i!;lcA*xh9BK}e7m?ho<}hoC76(Q*hXu>X&)l2C(jqN7|7r#$E44W8R5MsxqQ%Dx zn!%=0E%q7R47RV<;%e_^uzRf*?aiCPzV%uZUu+5oHwfusAhDDBk*4j&-DtJMS!9@3)w!^W`p zh?agw));ml)8g~7jbYmfvTI0V*mO#ZMGYInnloAyzI2A-b6Om>(;1eW*W$KG&M^O? z799sU!_3QCOm5)}ldfv<=!Zs-aa~K#CvODun_AT5HiD$vWcSEM5Or6J?OYo{|NG>3 z-y1^ULoMDs-Vj8O$$#fH1h=PJ%o)`X8b8 z0PelhV&~KbaP9-8vj+70DU!Ep0INTfKVGX3^S{#g6xWA|-?ey4ULPbssh>US!w7*6 zvmEO~ppgzQ-mM4iO?23DT|KC8rbCs!9++C_@OV%?cv(${b?eoGi&i=u^RzDPveDtr zt#x6koenK0)P?NoIvgBP7m^)ySlpy8gx1vIr#DW}p|%ctpc6Pb>2T&$C-_!Zhj)fL z!Oi+QbZO%R*pTY^Tn83A>+ta5I*`#sht>1yz{qAg93E2#y0jpD9(ABWD;>W7RU5vw z)*(Ax8?Lm~;lzU4u-Qe2=SJ6tTsLZ8=h~3up~D#S+R(GT4$Cgqg2o+m_+eQs_|{Q} zB5^Ia;7$GYs|95~Iy_-p3&x44zMC~+DClrdX-)9((_x{iCYX2C;e(zv;YK$dwysqZ z*7wk1%7Yp(zNZd1Y^VW)1F3%*HK1J|9s2gG0Y8Iu^xT3Pa3)xX`<^?(;t(C0>~Mti zFdg>Hb_D+j9ZnkH2=)WWp3NNL)<7LvzjuJL!8+`_&w(CSpu=g?9Ux%14o?qv0LMrj z+O~6mTO)NC{IxoiMC)+s(dr#+9=Ye<=)!;Br)(0Zm0w`5zx zy;(Z?A2w?!$kSot=GG9AufqZFt-yL7)wjj>d@5R0{ph? z=>OL(;Q0<6M%^@rIlFZ9JZf|B-=o7_Dsy;_I(*vG9A@v+VXa!`zz*oJ>jN`*c#!;P zgBeUYti$;kX3+kq4i5#J!L?&Ld{f^HxDz_8_uLekouYZO-4u?U)?w;IQ%E|i!+HHp z!Tui|?r&-e8_w(S`CAi+xTwP#drjcuC7Ku0Oz8XAI*c1;0v)fBJ=&PSrRzG}^w}6> zH+6XZurWB^)}c|JF|5BsejQ^B!S{4@f6N%3-PfV)mk~^OsKW)PjG*yj9qwIV1iPN- z@L{4640uNV=4}M8pOe3s8A0|-@`npTaDJ^r`BEWldqeF@6GFdt)PE4d!}mJ8Z7l@N zNAkn#0TpyK0i67%!)!+ZjQBzN4*X(oe(G>`i4PRL^M?IDWe`Tv{=<(sRFRWuNJvNy5 zh3%uug6cHKC!C}^w@6pCpMyy9;4hpvHQ+?%scrn z8`VUQM-%>K&zkD#|BU`+$<6iXvg9Ls-9nF%>?2EWrKkH}AK1IrdfY4fz{G9!_@+9= z+v%~9JqIE4JES zk85z~y&qxG0a>|vxHTbe&& z!BKkby6hp_8m-4+T^=&$SZe?E2P`{IkJA+o*z0&bu5^6B`X}fS*WPD46UknE?z6^Y z^!W1eJvKf`kH+Kfv1iG8baKAO`lgcocHL#`()8GE&|T&r*5kkrcbHV7$I&zHu!~YX z>e}659pp4#M{lz{g&vp2-ew<^dfX_u&BE1sJXmmxt=CYyy>BsFogN=txXH%o_4NCi zo9qZj<79J_H65#`&+l(AeWo58_PD{WWa+W(-RsPAydFF0uCts8RKL@8c7Gy`%jRp$ zcak25gkEDaC+jixW$I`@0>}tNAzR!4xwVtQP%}Xva)qFi}XBXMA z1$x|l^#ZHCkoU(6EUu9Jp!x;2agiPmtv=5LOZ0do@H`7zN`C$DAC|w2IQAcQZ#l8S zKg?wXar-$YUrBQP&#}G5dOZC0EVEce_L+K?g_P2~X?>REm(jQ!I>Tigf=e*Nw&3Zkq>2R98+d%$)?iA~|Nsr5tPchYIJr-0u#ddDdV7neC+&sa!9eUKOPB7f5M_J7i?B^~$Capit*d9Gb_dU)usK-H1kFjlg_1Jg( zG4^pE`BCFz%;SI_JMKQpk`L;!&ETV~_z=zek4M=3!!%yGM_B!%G=45eSpQ>s{BZOz zn|7SmhuFjH@CouO!D05}B=xi45c4{%$1UE6*yuBQTyfzbTYQ$*fwY6{!a16c)(2U& z^Lk7#KEOm5X#RIUz)~;jG3d^Iw)7IML)!i9!eu=+ud|<-UZr|B?PDFT>G6BNeJt*} z9v?m5%kpl}`ZjSdJ8)A^|GTo6y}PBy<%q1&9X(E^M;Ha&rG9_f!<6@Ee$Cp$mfzQ7 z54Sz+%mZ4VPV8o19_rCy)Na=Fu^vAg?PftwXr31CVzQ?+&OW=?!e@FczO<7ae6GhS z;+^dI3q7XU?qt3a6Ug2To=*E3^F4!_=8$DFJ<{71izxmj~q zQgT~EMTE)B?aQN(U3G333!yS?m7TAcx$#x|y+?m56rNwMmV-8#QEM{>{IQ)EXB};C~ z;Sv2xCTm9hth)M`d`8#HlsDkH7{bb+i)1Q zZ#m0v%VE3W%h~*P9De$|j1{6$_m{%Y?QE+E%e~V$3x~V13s`SI4!LFp z%+H_0u6q}-4qa)yhb>^OyHWo?&1Vg|bC^AAKC|z^VQ;tj%s7Cf=c~+{de+Mj}Q(;+C1hFO6{wi$LfV~xOwAjW*W|6dcWE16|vp(S?qEI^>4x~hW$BQ z+GG}6F@VG2duFn!139ccWG0gg;_&RpTsC+xjc;x)gCQJtbID~*hI07r=nQ5yjKfW_ zGuTsNl3)fqIh@0$1=HD@5gcCYG@VV4vz*4-nadIHm=bJ%^}1lCW?;Rmk?tcirfWoO5;kHoN~@$86{L!rfZHdn^s+GXQd zqMYp1WgP3Qp!%<8F$*P!+vHj7GBM5}ixsIjtiC3bNz@$f3Cv`E8tUi6vCLY_VXd)a z*%jix`eWHL9ocPL220kHy(2PMCyv^An`43u4lmc@*fC<;U_Hwn%b|X}jt$PF`MFEW z8f9_Vxr9QISl zncpN13)aY(a59HaA4=JNVuuD&mYGBANrZ&?Pa%KI5i`M5(sv-8?IDi%n#Q!#IC}q@ z#yU@@@kmHzABoChi#Kti$6 zx>FRxHWAz0jAo-2aP>6=Fs}XF{ zBC>1baMo!thYtC}*aKqF>7gul35OF*hcZ~o;a<@Y_LTTVGMLR?#-T^)Al79$)pKtk zdrDm5G?2|K;_yny0Oq@bL)+~B>^_nHd5BG3$)W1saOP1=>#a*TyG*T@=PA9}KSbfdK$gCa*3WOfnB98vN6%htH8Cf#C+od|{BdyrdqjM2xd+SK$f3Pm z57uB4&8L9wY%6h;t{V&8O!IS7SN4p!^SM9E+Cuhg;?L@BrG5?ZV;hK_a=Wm=ZDhxz zz-|*K{$fnFo%+|2G0PnsUQ8CTLgM%3zRYtc+5LtOJ4Ed1=)(r?BLD8)nLQ=uj`e2h z-LwvE>%^?~&~@o`N49|Yy+udX2FV{rbYR?G0QY%3OeltWkZR_r1%5L&Xq$4HN?1-n7imo;Z2 zj&nHgelvE5xS?({7IlK=NoZ4ckN6(e>EXncX6Gk88w+ zou=zcK|^+xC_dkS^*=-FoMi)cj=0djJ_|Za^Ho`o9VQ-KTbKEr2{&iRhvCfp*tnqnT#}CwE`NS??YckslG~YaGvMgduLJjtrC|l&nk}i^eUvgk~ zi1{`SEc_D9uZTJ?nIt>f2z)iiuaA+A^mrWM5}nHi`J}KpXa%Xgb}Rjk?OA z<6$dyk=Xc$CF^>PLpLu=ww5RwQ;pTTPIg;r!6p(1Ts3F!h|%`uY}gH2mwTGA!$h^- zl)2rcaoudf<`QSTFlK^VG(Vdfvr)vNAx7*pac!=UdEMr4`%wX#M;!m_m*^)kKl!I9 z`VQ@Xu74LDChiFQCTe|`u8&*4h;oS6ntv9(BtD(>uPFE)?LUMcMQe#>Y41gL_o@B2 z-ilI)&OvWPr-i&64~fAh&qV$YIUFQ@B3ej{y7Nf%nK(N5 zp(yMT&C6Z)MP)>Fn|mVD$K+>o?}&yIv(0XcHWQ~yZ;EW5(Dmisbx{m)UdT1kc4Fb4 zDu{MUiP+DpRJ4v5u(U+}7Ik>Xp{IU@NI`7* zV!3D=vHp-{qR+(YN0*4a-;hZ6Us>zEJdmc$-@w^7ugO-^+QT6ym|5 zb49C&TaL{UJtD5`lqYKZk?dSFOEi=?$#JGAkEk9yLv)%r`t>xC*}t?u9X?eA#K03d zA{o)U^JGyOvE|Ba(LG|VniEB}KXGW1HC_}%eD@|xltH{bB2%=Hc=BY1=n+vY(~IhS zrhQtdM%0_w%ta~E5Wic^-6Ny$4=MU~II!#RI&{6b`*r9rRQLXPB8ohKA zbtaxZ+Dd=C<Y%l8?vamOvbKZwOI*ZSK2BD)lo_%G%Bz7unNgNXrIGkk{= zPxwss9YYLxm*uM@mV|43#}n7@Pw~wqZuf}xEg?|R}%y~uYb@!U%{ z--E=flmZ$5X4XFTrtJSJYWJLdC(c;n?-pSQ$&C+7Hk z|{3=B6F2#f^$VIu5cED#9IDK@7( z;qMnCp;-$`G4`YvqXxeGtI*;)2^$%i8dE`IHxmlCjo>qk%yWbU6H_aKaS$K&Pv$dB z%vF5E!Ze$YS(x`Fn3$L*rbzj`Bwl(VsWGnUP8r6Ye7tcWAGG6BU84C?Cg#2QT7?#E z_zEpde0hx~CbRiO3zKkysnBGc(1Mc9L{vavW<$;6%=DC_H}j!FI& z5>yM!r&ET>6yXIbU>?eci-d@wt3Igns35OA6ZZ9TEEb z@f~SHr(FhLb9X=9^?K83|D9fhJ^k*Im@}OM!J=6v|2x|A{TBB9zZ0(Bm6W;A)O8Ss z3*8-rp~mlpVGhC&La2k0PGBUXd<&C9)D1`8u5YQ<8tW;|Sm4OFR!DV~$A1ZG4(00w z2YNLvZ(A*1xLm3grPbz3{W2ER+{cUU>-KXUPva)lHqZyYDEA4Or|d7h)t^$J4}HJbwYvtZCYh9u#T{dx@YpzqTIKH zPQ2SV@xJ23&%Hk{RJOXXxvis>v28uu{$|yMVM2Q|a@b}9D=VNx8i!f}V_P39U#mbz zQfNrGphlSpt*j{BR7mM&tw^Z84f(f0+LV{Jup=#epqgV9SxcJ=g(TulQ^ty-7QCK{ zsI{xGi*Z%8+ahRMb6c}0NcBN!Tp)k;q*IlErAkfjxN+76dC`S!9B7s^hD4on*p3NKf@AiqT z$(p9+B4k%GT=_|EO{C!>>a2MNRD|pB>}5#j$Q;p6bt)Zh5}GtESyJW z72#E6!>h{j0!D(|a>0sT=2p!vPp5p7%8v2jssiO#Z-M(Fp1h1u5b;OUeNm-oeG2f# zt}u6b;P*0G5&N^O^6_^ZF5#-+rGqoi@MZr%EZ z2Zl#>4-avR5J#m*;#0-R0kV`BX<}-ML=fXMEH+L)ES8G6B*w*28cTaA3eytK7fX(kCQz*01x(8a z)OcTpP-xu9)i}!4xQ3`jQ)8)fi&hgGHEv`a>1^D=d4h4Wh>r|)Hg4%`EO$1p?#f5Q zosHd`n;5IgBLkg{+d5m&7{|v;gW^)Usyqd0VH7T}QA`19s6-l-5);QaRv<|nl@b^0 z9Fq_w7DPspfu!D%Qh|S1-^jlH5xpYA`*-WsBRpJ?l$tWix%@?zVkp9I3;ABe@H)j& zv589F231stM|KMch^SJOFVW3sSowGjs~oRkzsGCX@9`S;zZ!`$zN$kBAKL4-D!b)Y^ca|io<9Ii&u%p2^744;&7gu4TzvF*;5Y!{MCpl7&u&{n%g7~D=sH)x- z7~HdekbhWJ->j(hPx)Z~;K1O3-+eD1wcnO3cUxLuqE&{0s2m;t^3kcVJ3sKh9oj#v zXaBxEf+GwKO6x`i1u3-1MI})$1wDiNJ9l&Ta_#Ke-r3XL!^^|NqqB1>aa>XyttG9U zhmsz*xa8=#*x0yO7q7_9F443|#w0k4n>#>U@u3}xLwAd(VRMmJgt%gyf;#`vAQbtJ=n0vW%mpd@;8{Jal z;=}r;#wNxm#)$=0CV#p6|29^5;E*1XeFMX3Dd^U#V(`jUR63%Er}tk|ijP;00IhaW zQkkT@UVcg89m|kZ*@E8lrsRY9bW4N>s_xsA!^8T)~9O5IL7r;L5v$z%^PT5xA1` zy7Gyx|6^)XUMer>T6HnvZCROKIRfRAt}?NzFhAgx>6OA&6;zciU$y=#Tvb6;;lFCE z)NIf|{fUi>mW`sTO?)bKwLBaZ9ZhqvqPG<(NvSbaqfs-@%VuM<_ z6BP)KQd)TiPdX~~jifMNZ)LxZ@`e5AG#r(3{F~yx_m&0&W z$}OSzU;2hnLWV(zP${>A!hgwKtCCqIc>2F`{7naEIt@pqzQ+{*OW#jkfKRD7D&_d3 zKdEHDpF+Vvdbd@1ROWrBgsS6_K;z*@gUyczy;m*o2X9jA|LALEVpM*ggR;txN_`Fg zBbP{9Pg!LqNmd5yQlM(R#r2H@iz$t-w>q7CKlplGD6O&#MFqFaj0Dbnz;IONwWdH- zeZ3kQl@A-QkKS$m*5^lZm1TGpKS^Je;r*Q_`j5UrRrJ-YqA%<}`fTYQ>c3Sgs0;@G zM_&TziuyprEFa;4CFLQ+iuE`Fi>B;oDYKUs4?-!A44}JSz27#w%Gh-9+&AS7ka+ z8u_@1fFJumhlzl{&mjGsP-)GI1Y=r-|GE!Bao(2Y2MxaP_bOeH zWGpcMkGy%g4a#%*LBp#tdC=ebE&hxx*-%(@!K5_S0Vfo4?y*{l|x$d3k>4^XD)Y z*!)M{Mv(bCTS)SBzpTn(T)u++NihCvrt|&dz4XsPH%R|PC`5NY{}bnD>Yu|{;8flo z-ajjj-=kX|HU2Z&hIn0rTm_5;4FuCE$onXNt#ly&T2hf!{#vg0f9$L14nQ-hpjqty z*rQf%WXg9pRku6*HmEX_-#=B&E8q20X7YknGs`tqX8!kmq2a9*-#)_|e?v<7O)X2h z(DU=csD?nGT@S$lyt?Fpei(WU_gZX{Yd{c`<`04Gq7CF=||~|21k+v8M3k zM}?;o&t?KabDs3V?=ARr4+HtTYJ9whf&8VMj}J6(gn=;zrWvR(P;X#)yQo~QAzol0 z|0w~lZC20kl9Ja6D_o~8o9eFGo!Y$6bRHSiZtYKJ8)$9%dSPm0$y#9JBYVo3Kk#F-)9%MkBt zhz~Nvha2Lfd6NH$d6M6$d6Iu-@+7~V%#-TN=Slv$h$s2!N}lA;Yk88NZ{0#;^TQzeTxk7GM-f55kvd}PpX&y$dT9oohQ{_o3E4N z&3IBf+zfGYqw@BUSUIf?v^S7nd-?X(H?Wz3tqgQG(96K?2KF+rpMl{94mU8$z%&D; z25JoC44h!#WCLd#IM=}P`9juxwmic?Cf5iUh(ST?%t7? z?9{$$i|TK_HjmA({olqR)+Y~$G@6Aeq1f6njwDou>i}f{y)6@A_w}#J*KZR zoThU#odtAe(K(vVP&zx&*^o}tUq87QKYw!P>D)o*lAk}gY&uiu?EmvSC!(_{ot8hp zac_To|2CA}tC< z%V?@JMCaank7FO_+1^WAT112*DLW%%Mn)1LWM>s+eU9hz^?qO8@9*bw`F?-;x?XPm z1$jJf_oMT?AI852@qu51c=xXX{KBtq_2$cA5^@uj~$;nRNg;k8#W4ZhXve7yfSOA%1756F)xm0IwLjk0%b@#l=G%c*M{h z+VM?)Bq5Zu_GJpZw!2 zKJfiC-u?X)e&PEGeE;`mJm-584t#IKDc>9L_1_QUOTX9S)4m_VhX)Vf&j$D7R|fat zb%T5Hg28GW9o&Vp1}pKv!E)Sra3^j)xC0+CSd8}#6yi4q^6{es+wmO(Ie0AbQD6Q* z1|B+)hPw@<;By9&@Ua64`1^0Mc*i##e&QR3SAIkAM`1x%l3%EIjio16O~g;-s%+-1qA?-0o{MZt^t}|M4Xp@A(pnU-}Y^ zAN&%C=Y8?R;VwXn_0P_D!)FJ)MdfdX(dajWsMnj%sO_5%=;SxA(ZSa*(8sTP(2K9T(AwAc(e1BqqtNRc zDE;*n)c^Gb)baIMbmr?5=%2nu^i^LydZX_EdbDpZTH05I#`Wz)1${;6=Ds|1RbLi5 zw=WeP*O!3yztW-iU%}{^R~oeXl^o4@B|=rNxM<8P2I~8YjM}}5MonIYqeCw@p-*4> zqgP(~qIECVq6IHkq1emiDEp-Y8vJrGy8NXLI{T#+I{KwK`u4?i^v(-o^!SVMXyuDB zX!47{i0s7>vgO4$#Ph{RWZ{c9$mAEj$UyHCq`S8hx!Bu*)b`#$w)b8^px*NcqxTfz z-`j*Z^&UpddTWspy?c zLcTuZAdjBWkn_*BA^V?2AUV%AA>cDVg!aq_@q6ZhI6iYlW@PWsEaNc7d7fW@6HpuY1s$nQK1hIQ@(S9Ml`)}6)Rgw9;>%Y#&~ z>p?7d{s9E;f1m(!9|%C`0Rv<{*aikZ*bKTn2mmb}_<*AytOnoRcLwj?w*ybzp9k)~ zZw{v4Hv!f6$AjeiBf<6ehXDKgp8?bRuYo`Jo&vA#bpki<-2$5KT?WeUoduHa9RsBI z4gt~k_5fb@b^?p;0>ZmtK=@rhz~inL zU~|_Em~?j;Fwn6Oc-&zLTP;} zFLzqCU3X4tFWfn*t-VvL&AU^jMeY=9*>|$F!FQ6hu6Ho)oI7f*;T@5-|29+Gd3&4o z-0d*!zS|qMxwqG9q1!98%-c(~fw$*tm*1YHwY)t=JNCAr_G9}W&4YGgt!Mi?O-=iA zO-}nm4cLB5!)U*x32Z;DacOVR%x>SW8QWf=`EaXHbN?2x`t(-3X74RnlYL9B0dMg% zj9U~|5TNvA0%gKHglWxqp*b4|~%>Q*+ZqlXKHh1Ks?sX59Ry4!rqR zz5M1=wdKwGYJ;2C)%`avs5@^QSGU}#Q}4S`tI2u^)cM!#)!6mJomT0u9Z?Cc)u_U+m8m?gZC5S0mZF+`4O9KNs!~0>Do|a$ zN>w#njZ~Fh4NxUq^-@W$u24l^U83^7I#*?P)l@a@s*&nf+X&UGwn62sws*?rwx`O< zw)@JowrfgNTZ@w1)~MXjR;zSut5BM^?V`IVyR@*_p;<#vVea;qZp z@(IP-%XNxHmv<>lE*B|=FJ&lRT#8lPyrfYyT@orPFVPgKmm(FaOa2P-rL~HUms}K% zmuwZYF3nbqzGR~K&^lJ}pmkW@()v-pzqMDM*ZM$?wqBQWTU+E|t&Q^4t^4FQt!47b zt-12=7Zc^rF2eF_7p3x}7g_SMi_!Ari$QY5MQ?e`#TD}P7Z=MNE?UaXFHV(@zGxtS ze_>d5|H4OE%Z2B%{TJ@b@-AGHp%>1|xEC5^VHftw+%N2qEx3>+GrkZf8#=F*^_~~X zZk(sen$CyID$Z||rJi?}sm?pdDCg(P{LasiIiH^(n|=O|)ZqLV>8EqAq+RE_q!-WK zkRCdBPFi%XQ5tt{pHzIVRJ!F{w$%GvymZMqtD zy<*Cl`(nQ{SH;d}PKzzi)Qb(z>=J)DT_Em0og%(`8WA5pEftrZW{49{M~daA{lqb+ zSBp2Cwii2|o-4LEJxy$I+Ccp2)R5@WsrRDRQ%^+or*4aOoVqAVIMpPQo!TdgIaMlJ ze=1AlcuFs_IHeMeJ;fD$I=NN!=wy(n^`xh${-l#=$4MJe;>j5z*~#&un3F$+8%}-{ zI-PtfoPDxGXmGMs`1wS$u=~V*;pG#h!XqcLggZ~@g~=zBLgfjLkbELq=yxJO=yGC> zaLx$_;rJ8Q!f(f?344wk2(KRhA!t1QR#0)gTab4Ara*K2oPd73K@fDjTHtoPP%!U! zieS=lSn#7+EO^mO72IkL6P#%F6;wB`5M(#o3gBjQ0jJqWu(|m+e@$~ge^K)@{_$^H({Mx2;eqj^Jk8P6j#Z7d6bW=EgUDGtnnJxyzw-5Y~vyB=cDD^ z?xWeWf#!)x!rlX6wtB=m&E<9?)H97i=^Sj{#=S{;C z&b@|PoO2B=oC6JqIYkXsocMcYhvN|WGMV&R%u+D_}?a)Z((?eev zHx4~#96xl2vFFfvM(&{_4E#_PLv$#Y5q&6@vHp;p;e3eBm~$wMVRXow@#CNqI-PM05Sp;Hdl(*qBd)7=hc(QOXmbd!Tp`kw<7`nv<0 z=$!}F(pwMM(~lgmq?a9-L{B^Liv}EcPh%f=MB9Ae8qM>-3EI*F`)TF}ifIN1QfOam z0ov1A9_>c$7TU?$jkKCtS6Y7ULRxICDNR~ChDNIWM)j}lrMlL3P;F|@Q%!0QQ~&I* zpuXFmP3_!|Q!nk8P#gABs1^HzshRsdsPO(JRNnqs)X4o4sJ{D$D31GIQ!MvCpcw7H zMES9=k@9NaZc4|#?Ua^%v6MsmMYTBg)c!!{k}} z-jEIVb&>~aE|Ys}j*;7Is>x?+^2oI{apd9}IXS6@Mpo5?kQp^=$)Pp&0q_DlKNuGNb zla}tCNt(6SfHZFJx0t~_y)iHL+>W`krzNIk&!Lz@dv?Z@?n#SD-2=t|dw4ONJy9_c zd)CMJ>~V>4++!VMwP#Aqq&TN5-sWHJzRj(A@wNrkGq+8z9=mN+_1CSRc0b$Nv%7ukjooLqp4@$4>;By( zTZ?ulZ%x{**{a^n+REI$dF$rgUR%9(FWc&{d-hh#-4nJ>-2EeZc-O1wH@ogeKiG9H z`qHkt=*C?;qj&8}i_YBzM(cKQqoundqba+5qJwrhM!WBt6K%I^Vzk+=p)H2H`nC*K z-P`iA>cW*1~qN<^& znN_c%465!%4OE_sdQn*y)lpd*b*?fss=iViRZ+=~%BtKPg;jb*i7V}+NR_jq0xQQw zt*#u1TwK{3X;#@DX;^tWaNAqXhw5tbEA5fdwRNBk4}~u%-w{5&JUM(!xjOu786&*6Y*TngnS1#8 zvPI!X%1pzn%0`9fl=W}cmvwKJm$hxCmo;tRhG5cu?*Qfw~W8pxGZw>-<>|2 z`*%8Q?%6qe^R1oZHlN)&5LUPId06?*n_*cyPljPTYr-Tu^TH@Q^(ZYgCZ&BLqe}0FeA&?w@_fgEkd7V2As2Qegf#4shwR=# z3CY_L5R$ONHAKB*UI=@KaY)pTpPM%9=-cGBqhpipj68a$?CeegiBQ}C-|%issa}X3@TY@kRLo!-e{QcZH&W z$A!@WHw%3OS_&Nk4j0Y}s46rF$SeHppHTSNUt4&^pI3O)e_LU>e_&y%|C&OLze6G2 ze{Ny0|J1^j{-X=$`wtWt`}Y+L`*jw)^1E7a+wWAtDZhgSHGbs<+x>D1Fu%A0zMrZf z(vMT%~(LqL+iS?v)A3)9=h(_ zcK3Bhw=YfuSW^cRPDsRi&4DTtqTJO=h4DZ35An!LhuHM}_*52(o zM&1{42EC5uJoVa_bJc5SPNP?LPPtcHPKuW{N9iTVp?HyV{Jg?)oW0iNSbDkT7o>zTcItxL8C@m9ozYiDIoSvxs6kk;%VC175CC=R$NQVUD1*TuQ-;*T2Y%8yrMGAbwxp%)r$1AaVuie zzAV?KJz6eKySSW@c5r!gTEX&7Y4~#AG~V)6X<^G9(pE2DkT!q$th9;Cr=$(I7^FRM z`IUOv<#TGiOJ8cS%j48omyT4SOIvD$%h}X5E{&-RU20Q}T`E(5I2WcqbIwS;>KvEa z;0&ggI!jX%oY|=o=a|$j&S9xu&Kpw~Ij>1IabBJ}>|~eP>ohm@y3>r*MyH9XWlp10 z6P<=qq)z=Q(M~T@yq&sJ?40hTOm(`F^3(Bb$_vNFlpBr*QjR%RrIa}qr6f6KrN|r; zQnorGDc+8X6gx+L$}~q>%1?)=lot-cDK{K^QyLvsr<6H3r6f7nrbr#;q(nQIrg%FT zr7U(Bl`_>~DEa5IPszQ@UL{{&_Bgq5+1=!w%dRCSE<2wrS#~^m%d)y;&t-d(7cJYF zY_cpbdB{F3`MG^;@>P2u z#U;&22ba_({|YO&jvRAaX} zDaS4#3AFQ0qT8)X^0#wJa<*HPG|O&o(kMH#q<4#rlR6d~CY@aTH*weE?}=%P`x8}* z`w~fupCqnZd_QsN;+u)4i!UYqUUVk$<)UMWHx?aAY+SS_ap$74#Kc7fiIPQ`iBXFZ z6W1=n5*IGgBu-u=NgTB0Cid7;6EE9tNvyLCNi4M8n26hYC30<7CWhELCc4=!O0=@I zPBgSNPwZc4lGwR$LSoCpQHeDRePn z^@1}A?F*U`nite3R4k}TNM2BxAX`wJ5WOHb!D~TU!lDIn3C0VMgzq-$gdQ77!etvy zLY)mYq0lBe0k;WD;MxQvgxL5dxY@WTSlKL3Fto8x_&9%I!u|PH31{Y;CG44Rl8`xn zLV{-g=mg6AU-9eb55(Kg{}^vNzc2pxyl3$*=XJ&3nAZ`1bl&y&(s`}%@$=5ai{>@Q zN6b4M?>=vT{QP;l;*I9*jQ?s~5Z`5;6@T73C4RqkY<#XY5)WFdT+{dg ztI6@*R^#F?T8)Z7VD&R@yVXD(Y}Fsfw0aX4VAUJvZ1p(K-0DHxNUQd^H*>DWwa>X2 z*F5J;T*aK`xTHBp;-qs9#6`{76SsCwMcjfpC2^DH&ejEk$aMB}zw zYU3bFc^t!16z6ZriF2}~#hF=diyL7X8TWd2NZhU2{&7vS*Tt31UK^Jwo6>( zZ2LHm*^AvF7M*7?}5S*K%H&T5LCJL^cS;jDwP z{pK~X_sw_3o;ELwtu`-?O*hYrRhnnT#+awZ`j{ug+L`NOP0ZogA7+}^r)Kil%Vwh3 zLuS0#0yAbTYDS4=nQe^?GK+|HF$;~IWfmAa%4|dIo0;CR?K9WJHqBfaTRzhzHgTpy ztazqfY~;*^u^uz6W9QGD9XnyBS?re?(_$aaFph1RF(I~QhCyuBjFGXL8Nc=98AJN@ zGrsAU&iJICHsig1*tAdo+_YEUX4<2#H|^3Fn%>vrrg!ul)0_HW(>DEb(^kEO={fyq z)6@F5(~s+KPjA#WPd}_LpMFrEG<~05GQCJPp#Xo2Jn(nWoTBohH!_O%>{&PUY&aOl9iprc(6IVI56JPx;6Homy6A%4Pla=~-lNEZQiIaY_$uj*a zlO=j<6I=Z_6B~X16l?wcDVF-vQ)cORPnoGtn=(zWm@-Abb;=~Y*OUo*+bM?n$x}w_ z2aHGP9~=MHT{Irn)f#`-z&-AyE?gB zcX;wcUD4$GI(%}6jx+hTE_m`y-SWxTbQY7Z=tfO$)xDW?LDxR1Mb|Xxw61K@NnOIE zW}RqKqb__>gKqVtdY$#8gSv5(YIXe+YjpP~?$Mo|xJ$QtVx=x^Vwp}cu~fHpVzJI^ zVxi7`*b~IMpb0{q%LKm8d;(WTeAipoH=e1xIi9X-98cAi zjwkEl#>eOc5h$=sVf~b zLl-y3R3{iST^BZHnr`KosX8kn24hTgA4X5n-5qVLJ285)u98Ud=t(;1=!v>0B5Ot) z>1;+%&>0c=JZikIlgQao<8*t7WQ;P@sffgkGSK-DSu|>_&X~yH$T7OdL@pAk9XVQ; zO9UW79XU$3frvek=|p~x7^!V@&kpdzp5f+g^BF;q2iTuTf@lW_O{3hOr7vgF> z7`MhhVJ9#g^TdYHdX#}0qfN**PYnwm63|7 ztWyljz2$MTbJCv@M+rlmB_f_(3V!p=`Odrz+$|g?Tf~wxc(D*R?xVJIcUdegI@vcTv7WB&^qiTPuFyD#Kp?cM6hTWh$c+TCk) z=Sr#D7}tX33tbwWydAGEi?r`vLbrRlh->?L0oUf`Ji2waRn(kYvo~6tHg_?rnPFj? zIc?-r#gyL3;gc>HxlE`UH^mSi`(bpf`DhHDB$mHdlXAT~?K;RH^{gT-BiRnzBNvR{AR~m7f)@iXw$ju~uQC=#@9h6XntJ z#qwdF(C3O;15+Io==@r+D5wV|mn)r!mpGYP06pa^k z2up<=p@Z;;;G7^u5GF7eJmc5!rF>WZZ{7u73NM6b%Io5mb6MQQ+z*_?95rVZ=NJ1d zJC?nkZOCq8rLlrplUcWz*~~De3G)skml4J=VYJh;=$q)1=+|f|w2ibewDVM)>Omc% zG*aXgd&(PfHJL`XAm1nDkOD~tq?Q;k#wF(cw(4z^Z8NvEZ%y9nwe?4IT{Jg(PV~Jk z>05lZ3`NyNv7=^1wMQmIu8!=F*c}laF)89)xH^1Mc=zV4%|4q4!fL{{g-r}Q8!8K( z7kW1&A;dMLZ&T4GzfD8I`+~Oyj}LAR;swnNx)i7mvJMo^p7i-ejxU6~P5$9p&aoZhmw{pLf@`Zs|;4vt_)lG-L2Hk z$F0vb-POtU{t9@7)ryPDdCMm*uXl-X`QcpZ?B(3+l;~vVbi+~RIL)!qA==^RvYpF3 zmp!+Sw_j*~WhsBD(b9uUHZAG5%dvB|>sYK>Y`VB{QPiSA+d^A6+s=i+LbHX<3!)c% zw<)x7v$;QCGv9Rn(RmT`zFOy6J6X5SmCT(q_kdM^)tfmOY@X|UupnAD$dM`OTz+N!F82Pux0jz$nMa-l%N?d%}nbrQ=tQzdKGk z&S>0TLm$H@29SZN!Qrt%V_%Pn8)G%*#OSEepGRekS~Tk7Nb1O+#CjIz|N8&`pHtxf zpPzq-)8zl#Z~XtwFX9~fzx^amrvKY8acciR4H2i;|Mmm_-@X$k+y5BE|F;4Be|#g( zzyJ0X{~uq7Q}I7Od^LE_-e?0jwkMVzW|LYO{A6>+m-i1H> zS10}-5Ac87|JObIA9w%Nf&b&qzi#9IX#dwO{2w>}bp!v$^?zL>Zi;L8RYKdpuHgT; z{I5&+CE^zO$HjkLz%StE|8)*OhqwIeEOE=6#m^8<|LYWf3P1U;6Zi@IIHCDpO?VT2 z>|c$Qkxc^EB#e^b4A)$bfPsk%|$8!legls|W6XFQ5xSpUR{PT~fAvlU71egF3Kmvek2^xZ$pu&{|1wl^S$TD0?klhKCYD z@J)nZJctm82N3*;Cg6u}#5WMuN%6BZF2!xmqNFTiaG^YM8^SF^_F;#Pz?xFtTDV1duV z%?W1sOne5x6rYYyBTU6jh;_tMh=wv5pG2658{rf1@q}@>A#Okzi;p4N%P7J~d<6a% z`-}a-eq+C|pM+s-2>XG3Ck$c(*f;De;S2T|`-JrqK4KrR_t-naTcZ2C#`>^VgqPS0 ztQUJuc!oX2dax(hV?sCf2YzLtPE5?ejLac!3YkAmqEEmhcvau{I z6U!i^V`*3_mVzZ?Nkp4Vz~ZquVgtIbsgjGRz)Zg4tnK0UM8v!wfM4Y%Deg8-y0ez3YL*Jrr(AVfI^d{Jc0(u^8LC>OR(9`HC^dx#5ZAP2WV`wAV zfF3~)6B9}udI&v$)}s5-eP|832dzeTqr1>5v;r+h%g~)@DO!RSqeW;TnosoY?PxBV zgJz+bXa<^&rlKimGMa=YqVZ@P8jI>t9K}!+MNkL@Q2^DVYE*?PQ3WbPrKkiIqe4`G z@=+ejLD?t^WukPHhEh=qN-tQ4?Y|n~Y9EjnE0`c+?OzK*yq^(NX9~^e^%U`HlQUhLIuU zJ2HrTL%t$kkWWZI@)3EDyhGj~uaQ3FCGrC4MV=u~ktfJwq#Nl%9uo7%edHd}f!slE zBe#&7$aUlzauvCPTt-@vi^v7!9MXcEK~5v5kQ2ypqzO5OG$IYi5u_feLk=Pbh}mTy zQiJS4s*znt6;g?mBV|Y_vI8kbijYDipO|cNksKro$wbnTG$a*CMv{;OBp!)H^u#fb zAqWB^AOav-M2)Br1tLeJhy)QKLWGa-h?$6uFcAhqL#PNDAtBq4tw=Nyg+wCZ$YvxI z2|ZlGkadVJ;*EGBYY`8`9a)8}B<86VhzsJ3I3f;+J+c(BLlz^p$U?*h znU7c_bCEg7Y{UXFN6e5Jh$%7+nTkw7jFCx*5i$W8hZqvG*cfCKG7|X<|Av3T!|)LN z9Ug?g!C&Fea6kMJehU%$a2_#}=fGKT2AmG3!YObPoIuQov9OM~EKwMSAsB!)uo_mva##jSU=b{Y z`7jsez$};n(_t!1hDq=?I2zspN5bLoW;hhy1P8-`us^&J-T<$IePD0c6J7&*z^mbv zup7Jrc7dH>M|c^$6kY-^hHc>munjy9o(o&SmaqjenVP{f;OX!**aS9)C&3fp3Gg`B z03HjEhDXAGp+C?sXc+ndeTN31uh19h6Z8>!550rlKz-0ls26$;J%ye?-OwZGA@l&c z2i=A4K<&^?=mvBRYJ)BlGw(&{Jk$c6flfmwq2o{!)Ce7gjzIO$A?N^93+;pULe4`dlLI?yw0HlFbkOGoJQb-I5 zAwI-~I1meBKs1N~k)Rl8E3^fQguoc#R>&s5CpZL8dQREPzs7cA;<^0ARAb`Tmdct7lHFY3vdQF1)KnyfkvPKI1JPQ2Z35(AFvmw z26h1zKp9X9lmJCQ0gwme0@*+&kOrgxNk9S+2j~GDKmiB<01co56o3qn03v`7Z~->J z1n2-2AOkT#G!O+u0GokOU=t7o_yZe(^?)zn4R`_`z-nM6;0i1UoB>C`9#{e_25f-^ zzdgf3!cfL)!1!0qs}qC+$b=d+l58 zYwb&IulAX?NBdaYrR~(-*WT6M(caSD&|cHFX)kFnYR_w1v}d#@wa2wh+D7dWZN2u8 z_JDT3cCWTtyGvWCEz_22OSDDWeC>8^jy6l1u1(b@YZJ9`T0K#lQ7xnev>L5SE7wZ3 zVy#fi({i*dEkjGylC?3~t=cGUgm$wwL>sIP)cR{TXxC|dw4T~ET6gU#t*dsq)>-SI zwbw4uF4iv8+Gyu#t+bX}3$3|!hIYDks@7OLNo%AXr!~-y(T>#q)%?~BYkp`3HQzL! zHT{|onzx$Qnpc`$%`;7prd!jc>D1iQbZBmCZfdS;u4*o8S~V9mEt)f$Q<~$NCe2aJ z5ly}3pr%%{PqRm}TT`Ve*X-2n&=hG3G}|>fnk-GaCRLNHNzlY;^cqZqXh4ltqt+-i zGL2Xx)bKSN4NJq&P&H)DHchl9N)xUL(`?cNX#zAGHS0A#8ZXUSjk{)*##OUi)%ogNb+$S~ou*D!C#vJsdSbjm)R0=MR;v|inOdwCs(EUT znyIF%DQc2>t2#;@p$=1rsDso2>W%94Y9FmR4-J|RXwW5 zsxDQh>YnP3s$F$Mbxn0ebxCzW)uKA1I;lFYI;J|RI;=XRI-uI8+N;{Fs#KM$N>wGQ zLRG#hSCys8P^GGpRSBwCl}?4KU=^TJtCT94N~{v9cq)#HsiLVUsu{q^5zE$=qUnrj|dz9VEF69H|UF99+E#-CPRpn*nMddjq zu{d0LT-l^NsywW$Qyx(6Q|?vnR#qy@m8HsJWq~qJnWM~9rYlpFiOP7TUWqATC8*RW zl}fo%LVN(1r{pM^N}7_Qj8R4_BbDLGP-U<(KAGnCVnCd$c5BjtFdfpWBRgz}H#r{afVK=D=aN%2APR`FW#Qt@2T zqv%$2DIO^9DsC%oDXuHp6qghi6z3FY6ektUibh3)qF!-Ov0qW6s8&=d$`z%G5=EgR zPm!a@RHQ3X6p4yBg-(GfU(8d73;~o*<8v<8nj}%C&NpTrQW$g>s&pEoaE7a*}+j zJW3uR50h__2g?2A>*YRjPq~MDmE2YCB6pPA%a_O($rs4y$*ttG<>vAk@@euZ@=5Xu zazptT`AGR6*-zOI*`VyJ?33(+?5(U%_Coed_C)qb)+xIuyCb_LyDn>!U6Ngpwa8A( zPRN>MM`ed)hh(*~8d(l_l@-ehWZPxgvJ6?OEJ+qG)5|a!ECXa}nL;L&iDY~k zN5+)VWMtVk*%n!ZEKIgZ7AW(Rt(W=8JY^oTRWetZi_B4GFSC=`%4}rTvNo8gT`655b&@WVE|D&hE|AWXT1jV1 z&84Q&sZwLv@kiLqp&WSnHIWR&Eu_^0@XctHF`+%JA7el30}elG42KN5F}?}_h-Z;G#puZUa4 z=fr2kC&kU;M)6_sA#ts^M!Z{GDJ~Q55EqK`#5v+jajG~;952?3Q86UeidABnSS%KZ zxnic6CMJuwilfBg;!tsr*k8Os>?`&Zdx%$wUB%8~2k}zzBJl$8Jh7G7LTn~B6`P1B zi;cwN#AC!G#eYP@qVJ+_qEDg^qPL5|m{e|m= zKEky^ci~Fma-oyZUT7y=D4Z{xE1WGf7n%yE3MUJVgoeT~!jZz?f?>g+;H#it@Lup* z@KW$h@I>%P@IY`^&@Q+kXcJr#oEMxGoD?(*jtUM74hi-P_6l|hDg>p1VnMzjSCA=4 z6C?@Z1v&vL00kO>LLe0g1v~*uKo^h&+XPX9a6yP5NZ=<}FYp$u6|5Gx30wq@f~A7R zf(3$kf;j>U!A!w)!4$zH!FYjzV3go5|0n+k{~P}^{{#OG{}ul^zlZ;b-^strzscMf`kz4nKpR%1`9S5sxPkKEPM=<$N(; zK&<*>@~OlY)@XhNKa3yD58!X$`|>^c?);Vf<$Nc;J>QPMkUx)a#kb&_@u%~r@F(%d z^9}f;_g@aua$R>cZPR@cZ}D-tK%Ku z)$n%nDtSA3#k>MuE-#Ch#!KSG^K?9f2lCWB1y8~g@VGoCkIEzQqInU#FkUb(fVY9? z!}H|1^W1pLd5*lLyv4i)JZs(@-Ynh>-ZY*u&xkjUH-;MQ{waBH~L+)D0FZV9)5o6F7Qrg4+Faa1*N?l7>&;!mUBz|fI&+tC?YOqw`CKdRY_1u1 zI(G_p5_ddzEO#XL4`-M&$ob0Y=e*=oaZEWToJpMVoUxoyoImVg_8|KUyPy4z-N)`_ z_prO!o$R~pcJ_648@rW#j(wVaoZZMi!al^_&)&nXVwbabunXDS*;(u~b}~Djtz#o> zfURQ7*>U<4YIzlKC<4jUa_9Dp0FOV9p{YX63VTSQ)GoRsu`ULRlb7!&0y$ECGwdVz4NzZLBC(I4gt|$lA#AWqGpP zS#B&BmIG@EYZ1$aHJ3G;WyYG$n!=jM8pj&L8o~O-9AXYIKQlit-!NY?pD`aZA2RPT zZ!>Q&+nBA)bIdc$6U<}GBg{k0{mebgDrOn8gjvAMWo9x{nTgC;CdP!ATBedIWeSf>FvSV&pNh z8R?8B$#7@5Ff6~9xztTU_-_l>vpVObvyXg1ncj!0iSLv7N=jmtYC+NrM zN9c#>`{{e=mGqtTVtPJ3hn_)Cp(oJwbd(O#)pR*sOy?2nkZE)hJ(?at52Xju{pjoH zUUUz-8{LKOKwm<)rO&5Z(JkmR>C@=O^a*qW`Y8Gz+AwX9_J#J5_LlaF_KfzJ_KS+gPHMHHd3R)?xkhYzcMN6Y4(c*|dm%ua)O+k~;1T+qf zL8H*N(jsYLv|yS)Z9UDK=0RIYTTXMNEu}4@+0d+L7POhPX*6S+5zUY`iuQ*(OdX_t zp?;*kp}wR(qdulSq~4>pQ?FC6P%lzjsHdn+)COuDwU)YPmH@+EW)(7f`LKv#Dm(>C`FI ziBv=CXzE|ePs(@77s^Mv)VQ#>duDa$F2lqD2f z%6y6yWfo-yWh!MdWjtjpWhCV{`3LzM`4jmaxsTjS?jd)P@00J4Z<5={t>km$Q{-my zQF1-Gmb{m|i(E!7As3Ky$rvMJewJdr$(Jcj(2^po_R^o8`1^p^CJ^o;bF)JeKaYA0PI zT_#;1ogtkd9U~nk9VG1|?Iu-_N=b#J?W8PHDk+f^OF~H?NllWGL?j-GNurWsNKvHC zq)jA$(t46N$%C|#FEg>x=%_GernUhROCZzwv(ml5~*8Oc5uWj45Z6j^cG)>ZE zjC(wdz4sowW83c7u5CL6laP(#foA^F{J2HG$<+*d5SdU zU*^xu@0l~16Pd%A{h3{vZJAA(b(xi!rI`hpUozikzRrA>`6%;V=B>C44OQwCMb*5RS zQKoLDW~NG}LZ)=)U-D1#H}VX5oIFhKBX^No$xY;1awWNhTtNOzeouZyen!qA-y`27 zUm;&0pC%tCXOs7ncagV|g=8+7LEcKQoJfu(N039v{$ww*8`+U; zOST}JkoC#hWHquPS(Yq8{!LmS&5sWUl~hlvB9)Q~Nnc1GNUurHNsmbP zNViB=Nf$|HNGC{#N&88=N!v&w5|_jvZ6$3WttG7>Eg_Lecv31UkrYdcAO(~BNnRv3 zk|W86WI-|}>65fbsw72{4Cx>77x6oBmN-EiCiWA%h;76sVlA?Uj@hzMK)gRqsbfv|?KoIoWI32B5BLINS0 z5Jm_h_!2w_&IEgc6~UBXK+qwm6O;&Y1WCg0^o8`f^vU#*^#1hj^tSY-^xE{w^pf=a z^iS#U(qE=ONq>-jC;fW*rS!AuC)1ClA4uPwzAasp&P`{eZ%N;fz9xNnIwhT$o|cYD zk57+I4@(bB_epn8cTTrUw@f!lH%Qk`S4&q+mr0jM|AqgKpTUpghw***PJ9c#5nqEZ z#~0yq@gMPT@Xzs&@b~by@K^B{@Tc*|@Y(o%_?>td&&RXzH2fy~fB2R7rFb$v9iNI% z#K+(x@WFULyeHlT?|`?)o8b-dI(T)wGF}cZiT|CpkT#b#nKqKvpVpPun%0z7n^uul zoR*jNG3{;Ii?qjS_tS2rT}``~b|&q3T6WsLw4G^injnpxMoZh2_Fvk{w54g}wDh#p zw8XTSwD7dxG`}>@G?z5{G^;ezG{ZEVH1#y4G}$zXv|qRd+$?SaH;n7Ub>doZ4Y(Ry zIj#toi~E3kjeCa6!QI2%#9hIi$DP6*#T~@$!R^37I3A9P+lt$OTZ3DUqu_|RG#myO zkBh>E;sS8qI5(Ul&K75ZGsfxRG;u08d7KpP4|WkdkDbDfVh6C@*fwkvwia7~Eym_y zKVjcuUtk|&?_+OauVOD?Ph*c^4`KIWcVJ;GAIrjKVK-veVpm|PSRytJi^0ZYqp+da zK&%he9qWX(#advEv3gidtO`~hD~0`&x|lkbI+;3>I*{6(+LqdsTANytTAZ4f`Z4uQ z>hsh`srOQErd~-spL#0wXzIb#J*nGMMX9`0X6n||4XJBVm#0!vGg5J>$*FPZmG_WT z|5UG3*Hnj8>r}H;!&IGA^;D%)*;I+tUn$>HW>UsehEjS{I#QZb>QkyxN>d6_KBv4( zd71Jg8Dfq+u|acuW)~6cd2)#<*b| zF*X=;j1fi$qmEI+$YLZgzmmTv&m@m04<+{|cO*9_*C$scmnIh^e@cFv{37{r^8Msn z$ybvvB%e+`mV79AZ}N_0D4CngNZyjXK6!QWvgFKULNYcvDLFPdA~`tOH`ycEIoU4R zGT9_qKUphTHCZ89I{8o1V$xjFWYS1de^OUcYf@uUO;UMMVbYhR_ermko+dp^x|4K0 z=~B{}q~l51N&Av^Cc#PkBvw*Z(#E7UNz0QcNf}AFq~xTyq{yV;B)=rjB$p)nB&#IT zB!eWaB-JE^BeK68jUo5?d1+6KfL76N?hRB)(64mH0IAVd9;{>xmZ= z&m7%60Rm(NH~>n zG~r;vo`mfQq6AI?Jz;agx`b5;OA<&4_=J>%goNmX(1d^l?*z95#{}yHvjoEgodop+ z#RQpzfAK%#zr|0*kH!zgcgMHIH^$e*m&X^y=f=N}e--~U{$c!`_-pYO(2?yB2pb?o8bAxa_#SaXaFm zI9?nhZcE(yxYcn>TW z$4Aqh_NfqK2b-qdKCRqw1n6qe`Ok zqCQ5wj(QfA6Llx*deo(;Gf~H*vZMA!?T8XZaibVfo1@l6t%_O_MT$y`!bHVKMMi~0 z`A2z1xkTATSw@*e=|yQqsYJ;|Nk;vO{2n*&W#y*%Vn5Ssqyw`6cpw zkq;toMP7|OA9*VBXyk#&-H}M7Ad(%K6}d5TP2}=ON+cl?8<`jx6B!;E80iz~7U>vi z6KNJ{7^xkp7O4;^9r-t6F=8%aB4RkAFQOx&IifD2GNL3RFXCgw>xgF&44~6dy z-ySXs=Y-S4H--NfzA~H|P7KF|Cx^#|M}!B3`-Z!RJB8bXn}-{P>x8R^D~8L2{|);Q zHWxM-HXPO$))CemRu@(oRveZW_A%^r*t4*QVRyo=gWFGP~A|CP^D0r(0?I6LgqszLqH&7JMjpPw=*2VK6(G7Q8WdZSeA7N-!ZfH8?RiIyfviAlN(DHP}AbD%d1g zKUgzZC0H(4BKTL(x1i~u(V+gIuAr8nhM=mT(xCjHk3nyOo(1Iu-3huLbTR03(6OL{ zL3@I>1qp)KL0Lf?gVqEs3(5>i4@wP62#N{{4e}523UUdu3$hF{4$=$K2vQD`4f+@O zGjKj|GH@iYFR(MPIj}CUGO#!>FYrU)tH7s$4+3uoUJX1Scq;Hn;DNwhfp8!{kQulo zaDCvaz@>qtz_dV2U|e8iU~r&sphuunpiQ88pkbg+pjx0ppmgA$fQ5kBfboE#fS!Q1 zfTn<&fU3b+?=Bj8fN*?{8#hXVEnY!46xZ~|xnn*!DbEDxXr5CT#I z5(A;o(VOak-*Gy;?ZWCQ;B|MZ{tpY$K`@AL2QZ}zYAukbJS&-MS{ z|H}V~{{#P9{#X3Z`=9hb?7!cCr$6M+^Jn;P_Fw0}(x2*2^vC%p`N#T)`v>~__`CT# z_*?s%`s@2^`K$QL`Aho$^84mD?KkSz@7Lwm;#coik?FV-*IFUZfw&&|)#&)Uz_&%jU1PsLBp zPtxy~?>FCR-%;Ow-!9)4-+JFl-xA+E-w(d8eV_V1@V)JO)%U#bN#7&B`+ax%!oECT zhVN$Ib-pWoslG&CoNtnEjBmJaps%;Do3Defm9L4fzOSaQvag)4gzrzEd7mkt5uZMv zPM>CJ}Z1EJ_Mgs zpG2Q%pHLrvA1@ylA3GllA7dX~A9Wuk9~qy&-izLI-V@$K-aX#!-c8;$-eul}-k-hS zdO!Dmx0)TuP0vjy>5A3@jB;q z!t1ctKCc~KA}@{?-D{KATCe3^6fc5Ts#k(nv{$H?zn7<%vzMKhg_n_+j+dI3qL;MS zAI}BPSipdCl{J=PA!4p8Gv_dBUDNPlo4a z&vl+FJ*l1_MwDdIg)b-TxRPvPZ{OhskG3PPiG33$X(dNT$qhmj~>@_h5Q#@mS}v(u3+j^uT!}dBk{x zc?5cRd$@YodsuoHd+2#+cqnHx=bf0sda36B-ac^^Pa<6eOb1!iJvn5%Yjmr2D|O3v`{?%C?U~y{x7%)4-Ojt6bUW;}-)*NG zTQyKQn?>$bv;;zn>wbxUxIatm?uck^^}cC&RecQbU;c2jdxaFcTT?fTty+I7@* zz_rV@#kJnG(zVz%*Y&;YE7vEk_g!zgUUog}dfYYJb+7AoSD`E0HOqB_>uT3!u4Grd zE5HNrK>)yLJ{)zQ`3)znqrRnt}3Ro3;N%TJeimr0jlmtL24mnN4QmvWavm(MP5 zU7ow-xZH8M=5oR1w98SK11`HBYX!)3F}e=aLss4f{USeHbXXqQkIe-}>|XBRsc z3l}379Tznh1s5ro-_GBir=7=~2b{Z{Tb%2iE1ip-bDiHizjS`$eBb$|^JV9=&c~e( zIqz}a<}7e#IcGUm2SJ=g?cb|viP9i6c6U}L((;BB` zPGl#%6UHgtDbgv}$=Au<$WLXKQVy5lCtwT{ajGab_%Qyk+RBOQYseI4B$ z9UZM5O&tv!wH#F(%)NOgaoZ^g6UVG&$5blsObQd~$f>@XX<%!)=GF4(A5%S_;t=l;=@9JT>)`I-=wR(&>Y(qS>7eW&>+sM1 zhy9%Wr2VjcuYJ3HlYNbSnSFu%C;K<{&+H%C-?qPMf8PG2{bBok_B-rF_8fbf{YLvW z_RH+a_IP`YeVl!SeUQD6y_>y*y_LO*y`H^>y^_6*{a?F9yIH$&yCJ(CyEeN(L$D+O*p=+0@vS*%a7(vUy|k%;urZZJVn$=WR~f9JbkKv%^MY!?B^+Y_wTp zv&@EUgSWxh#MwmH1ljo5xY;<^SlO7^=-Fu4DA~x^{IOoJp0OUY9sMI(dxC;Q>zD7x2&#MowGV& zm2I`xYP*%tifxr;wZUq&)lw^xRhm_jRg6`bRe+V3m5Y^~m4%g&m5!B~m4cO&)o;u1 zmeZD_mi?9;mR~JvEz2znEk9enwR~=wV|mB&n&kz{QXwR@(w2WL7A$5g#w-Rbx-42O>MbfPiY&fZ zyt8;=@yOz?#dV8|7N;$aS{$(0WdU1oE$9}TEY?~qx5%_ew@9&ww}`X|w(zxZvv9Dm zvM{mGv(T_mvXHU(YrbecYd&s1VBTfkVqR}vX@vr4mKvs|!)&wJe`d?gGR@M> zQq1DbBF%!$e9hd=9L=oEOw9DmG|ZIDWX%4WE}G7oj+qXacA2)A)|*zE7MtdpzBheg z`pERI>2=eKrl(DhnjSFSWeS;cP3fkaOxKz&H_bFnH^rF7nMRlfnfjQznL3zSnVOjD znyQ;Bno67gF95LB%veQIl z!ZD$lY&2P8vdn~Rl4g=@5^EA}5@_OW;%Z`VVqs!rqGO_FqF^Fr^4s{k@s#n1ai4LA z@mJ$o<8tEy<4?wKjGq}lG`?+o)%d*e3FBQv z(Pg8vM#qc}8tpbhjQB=Oqb)}N8Lcp)7!iz8jS`HajDn4PjoghKjjWAKjr5H)jFgOI zjQ$!f8qOMy84ehB8MYYK8&(Op#>xLH$PZ=ID+;6zk5HjQ%(hN5m zt}$F@NH)Y9CL6{Yh8qSNdKzLCC;zM8(gzNG#yy>EI` zdc%6XdhL2mdNq1wdii=E^-1LWQS=CU zsd@=|QF_68zIyI@j(XO5CVF~$8hT24GJ1b>7j$QI$8-mDJ9V3N>vSu0i*&!}zSVuM zo1=S2_nPi`-IKb9b@%D+&=u;kb+dFg=&sgXqD$1p=_cvM=!WY0>w4-s>)Ps?=^E&2 z>8j|;>HgFCp);p5p);h@t<$R0pi`w&qLZuhUgxFGW1V|C*L5!HoYpz2b3kXO4y41? zq3dkYS);Q|hpdCw!RW;5gzE(Ac5pY{rEigvnoigvtqq;{~j zkG7k(gSM5nv9_+Zy0)UWwDxbU?^@GZqgwr19a>+tYPHI>3ba0Hz0rE6^-$}U))lRD zS|_x!wf1Oj(-LU0w6$yh9L?LBS2fRTp480N+^e}=Q>e+-+^V@=bCu>2 z%?wSfW};@aW~ip0riZ4Jrj4elroN`8rn082=3k9PjaiLxjRB1=jTVi1jS7t-jV~JS zG+t=rXx!1brg1^zq{d;5eHuG7gc@v(ER78st2LHr5H)ZbNgB}_p&I@go*GUXHX3Fc z1{zu#${Mm7|I~k|&#I5B52|;ox2V^vSE?7Qe^Gy@{zCnc`d#&F>KD{csUK0_r@lj7 zq|Q;#Qs1DyT79WHQ5~nAq#mOlrtYuqsqU<9t8S)lpsuB^qAsicPwj`=oZ7hBpjx+D zt6IHUrCPCCuG%}b7iy2x?y6l=yP$ST?TFfbwH<0AHI5ohZG+lswWVq#HJnQ0gs_#@^s6JA?t9niK zg6b*NBdYsUcc_X~IjUKz8&p@TE>$I};#8AVV^l*`{Z&0xomFjA%~TCkwN#Z=WmW&F z{7{)y8CMxp=~ih`saL5~DOUNS@=oQ2$|IFKD%VslsGL$ctg=sKhl)srt&*j(L1ned z5*4BfP9;etS|wD)U&T|!NySFROvOM&Q$<-tR^^}aqVlZrxbmQKmvW18y>g{;k@6Si zcgio6bCmBWUsJxId{X(a@;>G5%0gwfa+dOXkRq4FaNu_M1y-M4a zgi0)>txD^aRw+@HGL*1N2})5)AxeHq?n;hI)=H*IdP*8fN=h#dC@$6tflgC~i{}C^8kdD6UgnsYp>ID5feVC`Kv< zEBY$BD>^7zDViwiDyl0gDoQKnH0W>m+L}YbvWRt0}7_DIEFW=v*4rcL+R2hOys!W1Rq)f1k zuZ+8lgN&7oiHxp{x{RWXw9Iem@6yxKqtboS9nxQ=YoyDh3#30uzm|R~{XqJr^kwO@ z(#NF_O7E6NqCMvrNiUbqlunn%NXJP>NC!!KOS?+jOIu1CN$W_fNy|%1O8=7j zCN(KFEY&O3CedE zl_r%e6)P1c6(Hp$C9@rl$enilNgZbl4zEwlcO5B#XDsfKYghaN)UWsiI0#wY} zBC$?lr36)iAd!mNY>^Vd6221dsKa7~Dm}Uq>Zs5rjsE`^`zJq9-(((b5>0HO^q{q& zHKK`KloGT&wD)LYBjqvLJ+$j+VlU-1+7YzUywppH| z<)Ga`yM}fiHCj%h9YzzIE!)wAXlyjG-?AQU71|QC3^XiS;@{s$6q?v|@k8@Kb3_vx zFQ#aEXc}lrXfmkz^5@SlWC2ZVzl@^wqjjP+qt&97qZR(ogn5JRGqi_jx6rPjokKhE zKPzSry4%qBXiT&%XzS2c{P}-FhJbDgT0B}LS}>Xqn%nk`!h{wHE5-1`Dh=}UZXwvpG$KS-OFfa(2k)U{5^;4LW9wGXbiMX zs9CcXO>EbY(eP*(G_hk7juwdKjpl-8hq^WvXhvw-XsT%PsBiGLJTiHuOLD zrVZUjv??^Qfs=>!9_=OCW3+pyiE|z8BHC%RBWU|kBWEXYa>fu2x-`_w*$B*>QDiB) zB($_&Vn1gDi9riP3jmhRFyf4^Et(l{b%qcvbXCw~fw41){P;PD%%P0~Z)X7MMz;m6 z{-@a9=|_suzM#DW4o@GFgYF%)Yd^&%PcL#3?J(Lt;Pdn#LUh@v)02g^9&Huc64dM= zqG8bz(V~BLA|YsgXdbBJ9w0xcVD&yPlA8=3%(1&p8uWF5LIQ7edw zMnFqN&7cIdNMHxmBECOr5qC5P;0VXnklM zi(+f20;xg0p)#}r;0~1`uNTXZr)Up=K~#!dM)xdg5gkW6xLAzrMnll}z$Pj}HlzC= zY80&iPEjF}zF2^ypv3{RC?5$z*9WzWT!CMdi&!q^BF1Psz%u%RD4;8annu4C#IDgN zWD0EVtntjK@Ol6(k?U@ zm`JY>`ob$@6KW%^1wPUXguL(q!J}b-mGm45UwDQDqIm;1=_z7|t_A8R839A-F`~Ng z7?DRUB?;guJwoQc=OB}4L%>#gh_rowfHb020cYtxl80JLAJAR`bLlQ}@B3ZkI%+Rn z1pd-(5Kz@8XkIbP>d=r~a=aBAiXOUL42H-oLL5jbf zMsm^K1MBG&^61-1=-W|*gGK`$)DdL$x5LO%G$OE} zvXP{3hmaW5hzbQx)B(iv+X2KG^`dNm8MO~F__hzxLhUGJ;79F2{>|?}e$4MiX3@sy zcOirGJCSa*7T`+lKq}|ABSmOm=EcU;Hsr-Tg5;pq)E(eWLCA%92sw$mQ-^^)B}8`2 zqhFBc1qd5BRD5K^JP%ogwgi||Tm(1IK@w4$DjN7yEX04Fg?P*}5hq|(F%YwPI--xJ z3EV0gB0Haj{GHp1ETYZMZ9&G-2Ie*+UBI*2gw)M#L@LmVfNixNc{{frd5#)aIl#I4 z54k$G7CDc05|~$OkiB!Ok?p8`B?SJ}N@VNY3S>RnDqvwPM>6J?Az0MJN(3&}5+r1f ziuj><03(ZnSkGl5rl^&r540s0C2SMNb_tOQioOn zOf4+(c@~SjolQla179lzxjlMVz}<>RShMlS*4a2@{jAvF zibbfiF-XR2G=fD-oJDVp%tj(1XnwO|n=2e~M6;d^Lrj6w6^dxgh9F9)*ChkYt{`M# zCJ>oH8v}lqKhinlhcu(r&4?{8AEXHF^Nct07PwwsNY0EWa(l)DxeAOgcjV-Z8DEg_$CMr%jQ?X%l2-TI_}yAp>Y#(}qYhFvRqcifMhMXj%{XJT3Ob zbdcw0In&z6ZD5OOBIlv-I1w0V190e6KkSd@0X(!`*k-B+Hk;~( z4Siaf(;DF~lMV2@$$Iz& zu+(bdJCil=HPlqQ09>^y_{d}>yl=7s-T{oYGMF=23TL5h0Nz?LymYb%CQTN?IAE{k z!!eWjaM)xX><=8aFR=6EXV`Y~6KoDlwhyq@MgL9T&mNfi)+9)5rNR zW}FAd0e6lA2aU5~pK%uK3Jf|1Y&lMcjmK%QF7W8K!V2SCV5#xV@b59PO}7!A8ruMm zjID?JfK&G$+%&cpt{GbcmjSbG75r&zCH#791^g8Fb<5yeV@u&HV@u$(z_O#jhsHAD zJ!52e8*uH2Fmo&e-ZDmj*8$@W4^zg{V8R#~J@bSXn&e2e~c{BvB16E!TTr?U8e;y5h z-vT$!7tR^=f$xlZ!&iZ!=Lw%2^?(nLy2JZ`r{@X_M_pj{s56`eY&}PK^{4~9WYiue z0%y+_P8zj=V@9puP+;y^z@DS#u=A)HYzzE76WCzX7}gp!f>nUUX8`{j(T9JG=)rR% zVwX=F9vabtdqy|*N7wxk4V5=VEX-mHjVs-){gvwmIL4K2ZSG4gfJruP#m!SzCl4FbCCDQEaVE@ zziG&FWC}7KnS^wJ0XPmRjEq83BO}o7VX+4|1WgSOLL@Xd!etxJy6YXH&h0k zz)tAXa0m2exE*>1%)l1t)^Ia)W%w&}4)}qM(4pZ5XwPsRv<+B-H4tmK8rnKs1+4?F zULiWHsJPa8P9fEX*4nk_cKim&V4ef<~4eo)y4T>$qUC_wj4ybQ% zJJbPOL_>kPkf@kegAC{duoG#}p1~|=+u#;R z035|l(AL3?(E7pk&`Mw`{s(0Yu7$9JtD!{TE3Sk>2UkFTgUcWfU@b0zYz8Ti**xx_54b=P1I|zoFdiKsw*h;|VZau$0^XxFq&r{;n2_2~MZYFg)UN@320o-J^t@jM%IQ~z?f@%N0lLsH51s6ng$@HZ zQX1OPFA0hIB_IwkB>#vu_Wu^G?*AoP3Ovb0QCk0ZQF8w`QEb21mYfv@^v{UA`lm%M zz?qy7S@e&KjQU4KI>4M963O=uiX{67M8EpP{$#Ics;@^h($^*G0~TewsHv|_RMXcg zDg!R%SJ9`wM$wzT2GKKMRMv`a_0@>3^i_+_0k5(`l-*Y*+S^wu+79f>A`z>vP_(r# zU$h=Lmbs!OeV;|dzE2_?FfHGUqWj*8Li^r`{DE)zQsmtCLS)XsBnMs0TQlYeWq_t3_2kD@7&1*wo@az8swZ3&(i1B3 z1GZ<7$f+k#WZmO0G6l}3k4Uq}Tcq6MDUt=|r<>?Ux2tHb+gUUL{7(l_cekCWwcA$I z04z`|QAxLjD6iXG^Z~e_CZZ?ZMxy)OhN2t52-Opv>DCb)>(&w-1YW4R2^2h*oyXi73Dkl@_ITONtV@B}7rc6#XOg>;5J5=>92m0>0>Xp;`Agp?>$A zP!m|A(?Z$qDdE4a3E__}u{$~{oah=B4s{I)dw@aOFKq1U6;^e13rm1U+9CYV)h>M1 z)hc`fY|^j7n_Z2<%Uun^v%o2>6&~uU7Vhb)6e7SZEfX@kN`+gxiiPWdUs@ofcI62( zx^jisF0p0$Q5fCzK^WTgPUsI@)7L_$u9rfat`|ZxV4OY?YIQvps&wTD<$!m3U-+~0 zu5iBdj&QP5Y@gl`_I6$uwsl?=Hg<{~)JwwB&I`i)&hx^Lz(hSQeA;Dq~!u6fog{wLd;Syk|iiEgMfiS6)FN^`6 zDn}U5$r5^XGK4O`R?QNccWx0Hc5W7G17~%;P`-1WP_lEa@K=Y}TwNuc>R2Hh=~yQ0 z1O6&i__ZTbSldAomII5GApG2c7ryOC6FvhjYl`r82S#|cBT0B37_ITb!yU20eI3!l z9l&di5OO-ggtU$j;YMJ$1`3yT_zTG$enLEOT)l*G9iGC74tHT7FkPL6t{qN7`wj=8 zCGcHsg}NQqLiG+yp(3ze&4hp2O@s^WM#7nPvHPko9B9`ScC~8@TYv$pA*^gy6Bf6t z2y=l4t0;WgE-!r4E+@PTY*;Db#dZnd>Gpquqri#%CD_&eLjbog3V6Vbofm9wpB4Pq zJ|kEG{MZQrp?yq{+CC~s0G8~aAf&xt;Md+K@BprCm%ygILtxh4E-(PbY_mY6y-6U~ z-YEFjCiZ4)1#@lHf{C_D!4R-#%LHw0C4$DbB0)89X!8a6ZMlMvZJ!0Nfl2#8@SyFT z;8xok!4=@sz7(8jdoIXsdn(uqtlAubuy@Efjdjt!u zV)J%~V6=6cpuZIsbhbi*=2oGgu9YvSXypoufQ8ExylZ6$UbNB#kARE2S#Z5|qu^re zdckR6wf}YqY=&__`4St=2GsN^6Kf4p_SZf}bsZg83F-!DNfr-Srgo zwzv!0TU-TAEn5%-qAuV7vsYQLu|-j^rbS+`4EVh=0(^^<0MjBNhy#}IZ+=kAPrgsfBHsdj(j_zYjB`4s=}*Ax83uVQofD1ZFxVgBIPL;P;w5AWkQeBHyZ`nro>0xaTf z{10DY{;RJd{uAI5^Y}Nva`>0OviN6#QB30>`nr|B=j&$vHsBSn=d-^4$KU#O4Szkb zi&yZMeqF{VeO{ow^R{o;88S9yVF-}H@V*)+#92FCIvPors^r_?mclL6lHAaAj;pEujs z%Nqywawo65v7Oi2*ve}F4s#Q)q_KgQ*I38<08Hje-qXf%-h;+c-YwuW7xK2J3KEYFNJjRo4Ji`0eAU2;5@a7u!@g^Gf@P>f@yo1-) zu#MN)0P|{q1EQEpJHYWdcVU%S&xY;UzRA@uGk!9mn%)h~arOMDd(}FCE4+ zYY65UGz9XrfHm#QlW*|mNj7-$e$|WJX&2s9y%TSw-htN#3~C$R*Lq7{UA;N40(jKM zyf5{Jym$5bycfWx*5ci**Wg{RSL0m*PPG#6SiL;&V7)AFH!!OudHni+TxR`m?v{G7 zU%kj(RsWs4q<)@D1eWy_H>rMt8&f~V4Fj(AAlJLTpX*xR%e4o_btl)jzKyF}-@;V~ z-gP5ay1t(Kx2}e}SSPlxE4brzW!%BK5^gteu=BYMb-CQ?y3gEFU}C@Heyn@LeO>p8 z`xN-tPr0}19&@kO<#5jfEBh|@aNTY0zPg*-9l*`L%H`Bu;?nCba5n)%`wVw^-AQg{ z-EnR@@U#zehcjcWs(Z4uY7j?dMu<8oDjxy|HC*3r1X zYPWK~)r$S?joi`Nb=>~iwcJi%aj)Rk)h^>!)Gpx`0hgP^eP5fweOa5%eGH85RPK#h z4EIuP689|dx?{PAYNNS(Y9qPZfZZL!Wz`08vuXpl8-U~O&0SjS$tBgganpe5?Zl0% zwdY3E+H!+{?`_F-t2N^~)S7Uuf%T0(46D`UYSwCVm4W-M#{E~L!u?sJ#GS7Z8{o3s z;TmafZ;b@E9eCisIkh!EIOR19oI+rO&vM?@Omkk;OmZFpCwzo+y=I7Wv8JDM8kphT zoP#wToZU5T90d5`O&n%T17~YZ9cMkT#49;VYRWmpni38UxZ(wz*qU5Uc+F={ATY+? zaa?QOa2#r0ajbwh{*8s5N3i&fg3Gr&$);~cC~;q0zb;vm3Lm*udkq&Qov zBslAVss4+-wCV?&RP~*m27L7yc5KxYJECfw9R#fPA+}r90NbIek8KUy^-i{aRU2Eg zs)elr4E6@LL{%;OXJs{ezEbS5m$64GOW1vth3pPsvwvaNReoYuRK8~y0jK>H`+emL z_RGqr?8m@tf5^U3d7pi`@(%kf@Y`>&4^>`e@2$Md-VQAHb8L3yX*R9$Bzq%p-H))B zRUTrKD-W>Kf$_eZ9bdVF9a*`J9Rj>}A={&p$9AgZux)|;PG=idZe?p%Zf2_j2Yww} zs&Wnccf~69_X@EIzmz>zL17P6kl9_phfilWRN&ZE6{+kJV8ti0KUT!CUsuGip8_{N zoPE0@gnhLlh{}k^C}$Jj0#)!W?;)(uvb=?v8fft>#>t6bl5Q!n(Q!O&a1G!D-_wT74mF*;Ll63O)CDe^eXJKgiN4-_KGj-@{TY-^G$H-_H6|2D28+ zM6B5|K5M*;%Ni_Wv3knrthTZ&R%6*_R!!MPR$19PRzcYs)~B*nthZ&$SM zth;3-*7dRs*2OYB>vS2Gb*wCfb+9anwYw~VwXH0cB`AwxvC1M?TgyUO8_I%MtIGmd zOUry&wQX3R1#Ghi8(>9VxT zv{|ZU8Z3n}RhCqlGV6D#0&AgEjx|#%%^E9}U=5c3Wp2?x=BLsz=9|)C=Cjg4W=?4z^G<0u^IB;q^I~Zm^K@x5^Jr-k^I&N`b9ZSC6Dh4? z3QEhFtkM$Z*3u&8`qF&n>e4UFrKKO4q|*0HeCZn|rt~EjSbB-6U3!73R(h7HPBgjidC6I#Y)WHVtHnJu`IKxSc+L&{Etyy{F_l&{DbkOc!BY* zc%Jd1c!u$~c#?6ic${&gc!Y7ec#v_nxQ}t7xQCHl+{xHm+{V~Z+{_RaH!?WI^$dD( z4P#SrC1Y)I8Dm9p34>Bx$jB(pV_=IvGZKqGFk*_|F~W*pGXjcVFuaSOGF*!vGaQN^ zGOUX4F-(eYGxUpZFf@y=F_eohGvtadFeHl4GJY1FVtgw)!I&yK$`~!mX7m>wV00Gk zWwaFSX4Dt$U{n<$jFKV|Bd>_h_*leYye?ufo)*y=4~w=kZWnE0Tq|17xKQ*T<5baV z#?hh`i~~hW8M}%o45Wy};1^{uSVefo)*>upeG!JSx+sycv?!iIE{b8`iy|4AqA*5$ zQ7|L2D1Z@C=|5CU>e_uFHe_1#~ ze^NL}zh5{;zgaj!zfw3zKUdgCKUvsKKU~;B-&fd5-&y#T4iz@gd4+X!MqxF5b72L2 zU12GGWnmG0Nnt*nSonpWR``*gT=9~RbdUAm;J+{D$ z9#P;<4=Qk>`xH3R-3#pKjs@0qn*s|u3JK8-3ykR61^RTg0v)nnD#P%fc7}Q zmv%qDi*_@=opvR^g?28#iFPu-o_09DmbO2?incSqoCf8W(0KWUG)8_NZA<=V+PeG? zv{m_UX-o27(Mb8vX=(XSXqfyQT3r5pT4eqmT5$eNnqU4knn(U+np6G-nr;4BntA>y zno<67noj-^ntJ{rnqvNbnoRy4+TXmLv>$ofXmfcGZ8A?l8_wg>`tn$`jyyW8Id3bi zE^ia9GH*StIBzX2FK-p?L*8=Q>%1kjr+JyQ2YE!=?Ywl_)jS;SLS72(R9+J8XkI++ zKwb=OcU~k7$qSLRo;z(>o(nBA&ykj%XGcrTv!*5FSn>C#~l{J<-o;8p=lGU9%nAMuwm(`ftomHLNkyV!4npKe7l=V5cKI?66P1cLt z%B)AZWm)%fi?eRz7Gzz{&CNQS`zh;0?)$9l+&5YKa$jcc%zc&xHPmgHXiKZeeMy$wbIqqA+Jwrwj_$~0>1q_e%ow$UVQlUk`cf1TIa zw(Z^fH_r3E=TwxAs4IXYii+$JX+_$Is3LKMUlBdRsR$ckRs@VxR(OvbtZ*IKTd{6r zSH+5v?G=khwp7d=*;p}SgjO+mgk14&m{9R^7+djq7*+9ZxV+-UFr?z~FsS10aB;;k=4-!`T(5hBGUU4yRQN3@2A~564%u564tA4o6nlhQlh%!@(8$;eZO|uy2KA z*sFp!>|VhfcCI)$ysl!;@al@~!z(H_4lk{s3@@s{4bQJY4$rB849~168J=2^KRl@d zFg(5@b@(qWVfYsAF(H;$*pxqrhLc1|EL>n9Gr=1(>p`9A)q#Ye< zrwt4>)4GQmXzfFGTH{a+%{FAAnTJd?{g95P98%LHLkb#yNJ?W4iD-w0__RGkY})oA z25sZeVH#!V01ZF1mxdhLMS~7)qm>M8rU8dG&;UbJTG|kamN4&~Dp59QG24Q0`045ia152et?4JFWi4#v{H3`Wu34TjTR4u;U4 z3H=6@Dp{%;Ct%k!8cUe;7clD@EH|7_=pN0yiWxU z-k}x_-lXOXUZrLXj!}~bFHmC#&r%}>N2x)BC#b%IN2wlz!&Ili0qW|(9_rG;PU?ce zcIxcG7V6Z&2I_=CJN3^%4fWfAh5B*8NPRt^qdpr@Qy&f}sJ90s)N2Dm>cs&b^~?a9 zdUAkH9T_-8?H|}r?HbraZ5`M_Z5Y@}tr^%vts1DH>ITSE#Q=dS9>7w011KtE08TwP z0HN*~08zIM6jL`20IB4GTq7ZZD7X5*P_FcUq+IBKM>*a9nsU7VIc2#238k<9A;r;um(tRI zi&Eczol@O@nPTd{NYVD6qsaS5DWd+96mI`93cY`Xa-e^Jvb(>RvbDd9vZ247Lhf&& zVEY>>h<-Z-(qBUK%Kg4F%B{W< z%9XxC%7wl>%IUsr%JIHT%5YyQrLQlE;^>Q~wDd(&>iZ%nHGLrzQ(quO+vi77^m$Q4 zeeM))p9_W2w~lh4Z#89i-wMjMz9p0meG4h%zPS`!-z*BUZ#o6iHH-Q4|`$q=! z{UWFJeJ3aOeIZBpeISSRy(I_sy(IheJtMpIJtnX3yH8%#cZa;B?*@5(-&OLgzA^HY zzVqbqeP_tOd;cSU>pf2X(0hdZx_6NLthbN+p!ffc%-#<2wcb|prQSyJnch0`$=+J> zkzNbAzt=?W>eZ3kde!8{UIn?fS3)-T3d#CjE?L>jB1?MdWPa~KGOKqV`B3jJ^4{L< zusQVdO=&c&c){x)z ztRTPaSxSD~vygnRXCC=x&usFQp6TTCJyXb|Jrl^sd;XDzdw!96d%lw#J)cP}Js(K* zJ#R_XJugY7o@XR&&m)qe=RQf)bDPBNxj|y|Tp=CoxkTFCbB?sF=QL?!&nXh6=NJjs zGeSc443MBby`<8fP7<)Eos`|vOiJ%*ASLzKNHIOtr0||9Qc#b9K+kkSr3o2u!l{W-NPVF>p4W4*t4JXw|h6~d-o2~r|vDJx7`~_FS@Cu$K52--EJJ| zMmL&txx1Wnz8gyVuNy=<)?G{*>IRZ}yK_m7?krMscRH!AJDF77oj@{m$B?w$ktBI{ zC`r^EMB;Y)kr>_HqyydVq}|;vq;1{nNE^FXlPKNGNx1GMBxLsj60~~`skD10si1o* zDZ6_TDZP6fDXIGpF}C{$F{1k`F{t|^(YN~@(WCnn(YgCMaZUGQ;3=byvJudUgOgpFYrl@C-_*$1AK(zEpSjtab{gN&DV5b&Z7 z44&J8z%x2v_=6o~_&puP`0X7){HBgvJhdYWPv}U)qdJoDu#R{X?Y1 z+A$74q2o91Py2V=_x8`YPwgLYZ`Dyazs`f^lw7m`|Xs^Ms+s(Mj zb^~sIyB4>rU5VS;F2!wV7vjk6TpX^Qg+sPi;-KvZaHZ{ga0TrWX-~k7Z;!$K zZi~cyYYWAFYzxG_Y4gQBZ}Y@GYIDQgZF9oiXj_B3+_nODzHJF^v~3~oc-vguaNA5= zU)xk%XWK+vYuh+nL)&j`ZQFOOx$QGn-}WA>YI}o~w!Od#+MZz9Z4a=OZFjKy+iqfa zwOz$-ZM%fs&~^?>ZX3no+D>ATZAY=twjpe3TOYQdtqYse)`87vYr!VBHDKe~Y}m*) zD>kIfg!OOJW4+qcSl2c=c3qnoyRwasUDC$E&TnI2XSE%|PHo$VozS)m`=@mq_IvAQ z?5EZW?Aul{_C+fm`?wX2z1Lcfz1a%IUTpV_4yI$^o3Yp{&g71)EVOR#%d7h<=!&c$wO zor$HkPQ?;hCt}g9|1j{@UzoDiZ*+d9l^|P9l*?J?Zr%P?Zk|0ZNvO(X~KMMsl$9| zslmK%F=L*$7%-1ow3xdsO3aNGDduvE5OcnTiy3WUVve^Q#tgUY$Mm)A#&ovqz_k7! z`8Bj`z|^)-Fy zzJ`9@JcfSMd>(zb`84`Q^GWpO=A-EI&BN%?=6>|?=5F*za|gP=xdq+T+<ABsb7Z{C64)VvidY-9)uCT}9P5 zT|(6~okLYMjiPi-Cs4|!BPdDJAWG2Gi()r*qAHu(Q2U#jP`jGyP+Oa7P#c@fC`yw7 zg>TZJP)!OHtVx0bH3?8fO&nBS69bjibO@E&v=5cgv8Osz$*AVW@u>R7 zKggQKAIPf4FGyYE2c)v`HB#F694TmgjAS?7M^-l8M(%ICj@;dN8M&?T0&-*H86>6g z6cXQf42f@=(J#%+qspliU*Rv6y>gkAg z^#>6z>-Qp_)bBvtuit{WUB3Zwt)7CoR8K&ht;Zn#t4AP?)k6_O^`(fu`a(o!eIBB< z9)M`5Pe<75lM$Bsc!Z%o3ZbqKL&)oc5TbfN1h?J`!K`;f9IAIh?5$so*ipY6v88@7 zqN092f>b{nfvca6K-Nz}K~9CJhlFHc|!fO^62_Uw0uSViSi}&N6P2d50=lW?=7EN?7An)uGC(>)_?4y0UUzU2(ax4p=U!%PAMsWtOw+Qpzjq63X}2 z#gy-^izwe#7gD~l&cB>m=Uq;yb1z5NIhU8$tt|)Fttc<9TT%|JTTq@|H>W(kZbo@> z-Q@DPy7A?ab${TYbwA(%bzk7#b?@Qsb+6%0bmI|G*WH6Js=EcBS9c9Qvu+GN zrS3d@Lft6*kNpJvyZs3KvwaZ$&fWumX?MV%+FRid?2Yi-c02sK-3lMGo8af{I{2tv z1wU?=!iVibc)y(s@3J%D?e;_PCi_0P-M$N6ZQlkr**C(qb}C$HC&DFmESzsgz}a>v zywVPWAFvm}ciZ#f+w1`NCVM)ZYEOm}?D24nJqliK4}(MOLGTj0FC1w1gy+~@;TiVz z@MQZcc)WcXJj%WZ9%i2h546vO``D+#J?sHTIvd751;N#rBV|`S!Q4S@svO zsrDzZiS`GuzqZ@3pSJ6;FSg6D_qGeL*S6EJXSS2DN4BG|yS5?N4O=hlimelN!PW*l zV{3$+wAo=tY}K$qTNSLwrh_?bDp-q62CKITVYN0c%xq)A47S5CwQV0vX4?f5*|x#B zwv8~RjS4$tBf|FDu&|vr1Z;~93fo`ONg9X@D!n|!uVeYntFelp_*lODh*mBzx*dp6_*gV@G z=uF!W=v3Pm=mgt)=%3ox&>ywWp`U9XLEqQjgTAW01$|a~75cFD67+8EIp~er|Dcy^ zk3%oijzCY>_CrtBc0-TUc0dPfo1s0m^-xD`EwrW946UyfbV0gm+92&UO^~LVI!Ikj zHKe+x3Q|?0hv;fl5LJx~BCQcZgf(0Ur-lh()Et5wtl02)OU*_|MGXZ) zt|35hHE0N`rW^vRfk4V?N+3lw1(5uj90;H$6Ovw&3Q4L-fW+0rKq70xA)z(FkboM0 zh)<0d#J$E1;#{*HvbJV5WJS$#$dZ~xkoh(9AhT;`LZ;PBg-oiM0Qpz_7yPUGC-`gi z7x2gG58yY|ufZ>>pMxJ)KL+2gz6ZWteG7c8`YL#=`V#nD^;z&}^?%^w)yKgj)x+Ta z>V9x{br-n3x*gnH-2|?yt^?OpSA)&fRbYL!9;~ibfo0V)u&7!H=2mmT%xVVsQ1v13 z|D(|0UDZ3mTdTK%H&$-|Q>rOoLNy+Yu115)tKncsH5gn{T>>ts27+^{bHJI^8Q_%a z6mUXyJUF^K8XR671`e(c0{d0_g1xFe!LHRV;Put(z^kfPftOV;1uv>z2%cL#2RyTS z26#&KWblOQ@!-GK-(^3n-^;#OKb5_=zAJleeOdO*`n2qk^+DM^>z%Tj)*EG4t(VI# zS}&BHwVp2f&w8@#nDt26uywGk&)QSgWp$LbTU*MStPN##*4naatEH^UYADlNHDxNR zyi8^lmkF)BGOm?X#{xfN0d zvHoA2Z!IV*u;!HIS~JTsttn-x)`YSIYjjzRHM}gs8dMf+^(*tYdX{-vUCZ38>&l$0 ztIAeemzFKJE-YJYol`c?I-_isb#mEM>-e&X*59CimhYgSmQSFsmUp0!mY1M6mZzW> zmIt6GmOG&Pmg}I~mdl`Pmh+%7%W2Sg%L&k^WdwA>G5|Va=>`p0IzT;^W{|^D4{EX0 zfEp}jkjXZc$?)AFNqs^v@RM9cfqf9BVv zKh4kne-nOG`q6y1^o{vO=?n9f(kJE%rT5KeN^hG_mR>g>EgdrtmYz5Fl%6&_N>7+u zN{^TuN(argrM+fLsl#k2Z8fV)8_n`kn^{z9HS$T5e7%g_z??OU;p`h31gb zTysEamf5>B&Fo&9Xm%=%HLos>G%qg=H7_a+FwZOXG0!aZFi$CUF;6I6YyMNR()^=j zsrhrs0`t3)Ip$X-Gt5s*rkEd=j5psY`BQbhPpU4RhNubRh68m(v^%3)WNTGQ z$;PUL5^7a+385;i1XC4Mf~fK>fmV5xlvcTv6jrS*$*WpX0;pP2l3q2xB&ljvNnF*m zlBlYQC1F*6ivz2E7W-CxDfX;-U+h}-x_Eunv*J}%kBXO7-7Q{Jb)$G*)s^CzRTqk< zR-G=MSaq`apXo^PFVjHrS5r^%M^i`fTT^rKOH+OEQ&Uax15;J;9h1KJhDlX?#Uw4h zXc88mF>#7dndrsGOb3gHO?!&_P1}pROq+_^O|;@>6S277gek5yA&Si=NU_0GQmio* z6e~jmDyHMorNt zqoU}YQC#%O$SZngWEDL!9xl3T+*fqdxU=Z0acj{fk;xcdq%#H=sf>O_GNWga$mmkUGp;LQ8CMn^ zHZCdJZ=7GW+c>*uyK!34X5+-73gh2Gvhimj-uR^uWqe-7S_@YhjfKmM z+QLOfMd3W7xNw${S2)ecDx73ITsY3Sukg2FXW@6l*1}JQ4TbLvBk zR(Q_}y@n?RI}HyC zwi<31Y&2Xepc*a}5DjMwu!jE%kcMLgFvCy*$k1C*WN;MZ8(Isp4GjeuhT4J@gSjBV zpf89qs0$(tvVstUupq#|Dey7S3p@-53tS9)3f3967pyXDDp+Qq7A!Il3+5Uy1v3rh z1yc>+f{BLWf`58o!7qJw!8d(+!6$uE!8?6y!7F`4!83hG!6UtY!9BfK!7aUO!8QH5 zf-(K7g7f;N1*i233Qp>07aY}3D;UyGEa=n!19s_u0^9XpfX({%z_j_5T66`r|-`ei(R2-v`{M?*#7Bw*t568-SbiHXu!J0h06v zAWp9aqVzH#TrUKI^;}?yo&hY-9|Y#=_W-l>+kt8NO~52Q4H%~<0;BX8V3@uf7^DXS z{q)5^FMU4HO`i>P(x(I0=#zje^s&Gt`Uv0xeK2s2-VZoa?**KycLh$=uLJ(mtpxtk zEdhSh%?Ezc%>usDO#{BtO$0vE{mp-*`;mW7_c{NT?p^*h-OKzj-IM(Dx(E5Eb+_|R z>aOJ<)m_RT(w)uk)1Aui(jCoj*A3-2>w5F+b&mX6T}!@2SD$ax)#Ph+RryMtE?=rs z<_mSwe6CKA&(g8;D|MCm2Xy=M_vm)z@6c_{-=f=)zd=XIr|9tc1RW|Lql4umbfA2w zt}q{@%gry+W#;GWQu4EP@%b6L==>C2Sbl;oFh5r3lOL&b&kxl(z+r{I^|)ttMgFWWqEMzqCBv6 zZeEFYMqYt-a$c@>Twa#;S8kg2Yi_dkLvFnGb#AowS#G%YVQ#SYPOiW9dak#2EZ1Fo zF4sl-U+y~XvD{VKq1^X@VYfh}jm=meddNIBWLgtkrDKS*h8Svs6RPS*Ri8%+sKAW@+F#(==r{lQcy+<1~3Wf7DqyKh&u? zU(^XXAJow~Z`5HqFV%rLPt`s-57q8DchycgH`S|iuBn&hjHwsqoLA4uIjx?ab5cDi z=a~9m_OSYAcE9>dcDMR{wnP0YyH))(yHWih+pfNqU9G;FZB}2*HmJ{JYt$#R73w3| zQuRQ#P~Dx)Rkvp|)lJ!zYJ2tpwKaQ>+L*mVt;yc1mS=BNi?XR|ZZ=WP$i}J=HFKyHHKY&Qqha0cv=5y1FboMO~Dgpw7#VQDZojA zb!fJiIw0Fk?VatUcFSI)UZ1^Ey()XDdTI7T^@8lV>e<<|)YG!3sV8PnQvU^vQ~v<` zQGEvdP`v|uQM~|sR6Pc~Row%;RNVwTRb2r*Qe6PtQ=JCfQk?)?Q;h&FtNH;KR9%2G zsy4uXsz$(Zl?^bWvH%8D20*V$1?W^s0c|P)pjpKR)T=51wW|F9i)t6Zq}mG5sWt#q zDl$N>!U4o8B!I7i0ywG?07C@?98zTi_NmeVyH!bm?W$P7W>o}WgDMz6QTYJ~Do+4b z#tIt^;0Rz`l{q+eNr;A-YE}ey;APZdam4-^;o$v>%Nkbbw`QMx}ij6T~Wfa zE-67-=adCmrtPlzh<(PA2R96*O`Zu&ocKZA7<`S-pSmqyq>vP zc`0*)@@ytWc`B2jJerAB4rU^iJ()0NM?AS&+F{nUlFd znUOh1nUpzG8Jjs(8Id_r8Jsyz>6iIi;hFhE;hgzJu_p6_VtM9U#iGoYin*E36f-g( zDJEy$Q~b-gt@xR7UGXL3isF67Ma8R(bBd=Kql)_(Clt3bjw-HZ3@I*V^efI}bSq9~ zI20opt&0APMnzXfouVzHM$wpIQP?t!3Uh`|q0dk$R2edbG()TqWbhTN436S(21Btg z?3ey4jWzNNb< zKBhY>-lVTpJWpSxc$mISaVLGT;(Gdg#aQ|r#kuquic{%R6-U!2DhAWXDSFa>%RAD4 z$eYr?$nEJL<<|7Ka%1{SxhDOYT$cVwE=<2K=cM13)6;Lr52Rm_?@GTU-X*SUM2TQ*UR10 zHFBqPg?v@IRK7G_C|{7ylh00P$)}~$tx2L7at!c?}V_Lji zlNKYFrA5evX`ymXT9BNc<|p5u<}Kfq<}Tlw<|5yawoXn;TP???EtezGmdGJ#3*^OV zbLIJIv*duZY4WtR$?}A>@$%@jzp}8jpR&NTZ!+(+PcpZ(_pr;f^=rJj^MOg$>QlR7NBmfA17l-eUZ zo7yQmnc5~hlG-dANUfK3r`lv~sa9EIYL(2EYLHn{H8OpwQl?6k%A~0x89$XTW2LfX zhf^7{eW{0JJ5u+{HmB~E(NcHFh^bp;=+uoecq&a+mP(Qprs8F}sTf&iDngc$3X{d9 zmdPShOJpIbg)+a?Jeg-|w#+3pL$)?GRkl1eNwz38PBu3+S~fj3TsA2+MD{NwQ1&y$ zSN1u@OZG0sUG_4?S@t+(o$Ox9D%s7H<+95uOJwI$7RW|Z=E{zz%#;nKOq2DdOqMxP z#><*h{z~goeo3oSzDbQKpQW0V4^nx`8>uMerIeHMR7y{IBt4LFU%D&hwsdRC4e5rI zt5Q(u9;QX>>}5G&H4E8j#W`^-igi zx~9}h*QHpbD^pC;#VLB}ycD%`W{N^OIYlZRmm-w@O6EzwB(tUOlj+h|$%mv*lJ`sR zC-0WtO8)=hEqSZ-Lh?rG>13MpcrsZ!oQ#+DC1a$HWTdnu878ey21~1xOQojdLa8=6 zUn)<|k&2QtrQGB+DLpw^dLTJox;r^Wx-~gcx*<7CN=^=vVw3%)h-4orB-uk+oa`#i zPj-?5lGjL6lUGU;l9x%NlNU)tljlnVlIKXhlV?g@lc!48B~OyBOdc;?ocu>JFZrir zX7V@5lVp=rCRI!J zCz&O?k_?h9Nm@xol1f5Kl1ng2Vo7MPj<-QDU;>ZeoJudSa|(EHO%QE-_4UDlu4cG%-LjkmxJvPV|zrC%Q=*6P+ct z#B~yL;%bRLak)g5xI`jJTqxlu&XcebXG;zxPM7RWoFdttI8m}Gah!yj_*;xm{2@jq zeicI#KZ#2d--`g0vV^^2VZtsk zJ7K%HGGViLU&03Q&IGD>a{@_BOTdeX2^cXt0U?Gbz{H>gu(&XxRGgDgB+f_xijxy^ z#IXrk;)sNFaZo~v*f$|j?4A%Oc1nm6uTBUTFHHy$FGvU!&r0wUPfhR^k5BLr|BiPN ze~n)+{t&-L{5pQ6_-Xty@q_rq;#=_x#8>0ziZ8^^6rYZtCO#fNSv(v+LEIPrPvnUI zEozDXA*zf2BC3x6C^E*s6KUdKi)8UHM8f!|B6j>EQDyvn(f;^5qMh+KL|fvoifHj; zB4Ydn5jy^?2p&Hw0>z&c6~-SE<;0JOGU5kB$??6S*!V6{M0|%RD85zX8{Z^ykFOUw z#oI)y;;ThV?Gasw+bJ52+a@|5w^=k4w?Wh!M-_F%kwndLc#%C0BeKRJMTR)INF4_eN#jaI zg190PD-I|+9G5HF8wU{Wh|3Udj!P9$<{7N*ssF7v7dxDV&4nLV&4eQ#l94tihU+L8v95%5PM(P z9eYRE7JF0J7<)}v8+%!3j=d<<#hw!?V^0gkv8RN**yBP*>=EI?*dgKW*nZ)**dF1A z*iIoiwq1ygZ4n}38-?K5I$?2atuQavD$Ii)!CQE3INf#PoQiST5M4>b$ zPAG_p7P4X@gok57g?nRygxh2Mg_~l0g_IaCAwI@kh>UR&LSxnoOJddtfiWwEfS6^% zw3x-hgqQ`w=$N^}(3n|5|Cs4Qub3%9mzasdwK3y_%VYis7RCG&%!&CXm>%<4FfrzX z;7{~h!T0Fbf{)QJ1aG3B3Z6wj5ABZBJaA%QV^K%kE9709By1cK-e0Xw=?a5%b2urIn^up`>#i^hKo#98t-F=BNZgT~w^V8WkllMuiL1Q6U0ZRG>f* zr2=TwVnIpN0zrP%Tmc|zmLN51 zx*#EHiXbX#q97z{yud%|FW)oj7vCl7JAX~o7yk07kNkyE@A$K$-tebIz2r}bddB|~ z`I!GL@&W%t!xJjf4<+{gEg+|757+{t%}+{RxO zxtYHtasz*UB$YoilFXkHN#Ku*#PWYep!i=R%K7giVEh*mVE*HXQvThDBL4LVAb%_( zkAF5In|~@IlYb;4jo%-U!taVm>B75s%J2@JIJ}j|4R7W#!W(!8!tK0W;kCT2;Z|NncomNrZs1|Ubv$^u zngaz%cW&5E?)0$l+(}_yxPL=GalePY=Y9%(!+jI_iu)|| zIrl;66YlNMN8GES_qi8B?{H6t-r^n)z0Ms9y~6Dc9piR{Uf?!`p5xj=PjfAyr?~pi z6I^BJQLZF(n9BfR;LUr7jP&GF!RKX1hm2tg8#a!1=A$M&kkGmq2&0Q4AHmAQu?o&jp0|aMMD(xCtTd+^7&&ZfJ-T*FR(}*E3`_*EwVbcTLDL z?y``@+yx;ExwAs%ai@mN;f@cP$^8{Pjr%2d3io~RMDEMr@!ZG3e>r!9e{*gG|KN-T zf8(4D{>(WU{DE^M_#LM|_%)|9_$8+$_!*}@_z9;v_#wv_e4nEZzQd6P-{J^@uX9+z zS2>4*$2fa~FLJgApW|!{KFuKq|Hr`vpWq;Zk8!}kBb=h(Ax>U!KPNM|my;aa#fc4e za3X@+I6=WJ9G~Duj$3d&XMM1Zvog4bvpCqonHyZinGtN@ObXU<{syTz--DE#PeC%y zn;;42S&)$PAc)Vo6~y6O4PtRF1kpL8L5DfVf(~$og7$HGf_8J-gLZNngSK&OL0dTH zpp6_|Pz6U3MB#{nNE~huoHq~>8X#ly1H^1* zfRKGKfY06?z+rC-V6is@(AlJb!)#2zK{h;KAG<7I54$j67dt0lJ3BpKD?2e@6FWL! z13N5$#tsM|v%La{Y?lB$drbg_y*vQLUKoI2&klgGrv^aS;{!nKU;ZWRul_~s_x?ck zOaDCfWB(lXUH>fhb^i?Zn134ktba25q<`edK5V|f7n|wt&OYex%HHko%--t1j$PruhE4Kc#m4wAXT$xMvO)ff*#-U! z*xCN`*y;Xr*opo#+0p*f*`fYZ+5Y~M*q;6q*e?F#*lYa%u$KA%VlD9h!J6g&l{Llx zGi$v6N7gUD_pC2|Z&>gAUa?;IycO}-!&#kZJ+^DSf{e1R;8Zyu}IH=C8`o5jlX&0r<_rmG57jvu64`zkWS0>TtGZXFekqP&C&jk6rWfu6nW@h`m zV5a#zV;-0N*%ZuizPH+pNB6mJz1=PhR< zyroRAx0qSvEoA0;^O+gmTxOCtn;GNHWQKWHG6TF1F}=MHFkQX(G1q$UVJ`RH#a!sU zgE`xK8*{4n7Up>Gjm%$O70fSQROUM`GV_HOk@?sQ&%En}WnT9}GcS1|nPo#C-3$fceUEF7t`!Z00@BnamrW z)0tzQQ<-NyCo@laPGpXFj%W6H{$n^i|1g?8e=+QyKNuFzZw$TX7lzXF6GQCzfx-2B z$6$EAVI1&$#n|Qfg0aQ(8H48em_hJ-$Uu4CXFxsgGDFyoKMAmf`yKjVW( zFXNR*H{*#%C*z(+2jhlE8)M9)g>lxSiE+}SfidDy$LRC0F&rK>jAjoj!|q{bSUgM& zy@!FJ^3X9P9vTMEL&actC>RGkWQ<)N62=w}5rgI-U=Tcb43r0l0rg-pN<0{he2+>- zmd7DRipK#)oX0*!gvTC6kjE~DkH-#%o5wcBI*%=k6&{-yi##?k=6KK;(>$n*2_9s| zZ+9Z&t2>_Y!5zzZ<&I`NaYr)lxtB9;xWgD@?hwXV_cF#w_fp1)doiQWy^!H>2Qr%7 z^B8vb9EQamz|gyAGL-J=46%DEgX^Bcpt~nA_PZxAcDlzgHoM0#sP0h=yn6%#=^n;_ zxQ8%`-Gdl;?g5NUcRxn5yALDQ-HQ?K?!gFjcV~FJyE0teof&K0*E5#8uVpNBU(J~9 zzLGK3eK}*i`%=a)x5bPvZVMUj+~zZ0xXoiccALYv>o$vV-E9WrlG`-K8Mi5n6K<0j z!)_B8y>8V#GHn(4Nv)d24&g~mr;r4|ta{EN*xP72ky1k?SUx!WK;r5EY z$?YYb;`W@5b9+ihxILzW-5%15-0stJ-R{ye+-}p8+-}li+-}gr+^*3B+^*2Q+{WlG zZWrlm+|JXNxt*mia63((>5=^I?tbdsxzj&W7c;jS_|$W=lwa23(BT?O5*-roFvX%b9Wi$Pi%SQSW zmkRnl7aIMB3xz)BLZY8_A<$2{;OHYRSbCoen(lBx(wkk%>2?s`Qfr3;8I zb}6BAU5e;*mqPk}7a)D7OCEi*OAejt0-)nvvgk;c3_8Rmjb7}MLeFzarf0e&(vw}{ z>9H=c^l+DGdZ0@b-PS|Lp8R zf9vc~t)9pn7B67KxF66E}| zvcUOACBXSxWvcU+%6R9`m66ULD}$ZiSNb}?t#o&OQ@P&xRpmR6-gCNMdBf>y<(Siz%Ck;ml_#ApRt`Iz zuk3X?SJ~lorn1Rtw9@AEU!~dUWTnpOc%{PWSf$A6NF~Qneh4*AXr z;g;L?|9dt36ed+@se#q ziDZM2k*pHZlBGf-nJ=u7%oJ8jrV1-1zA#3jDI6tH z7LJr~gpraaL4@RoV1(q8AWZT`5Gr{l2$nn)43pdz1W9TIgC*w$fs&H~f5~BipJcDV zSF&9&K(bNbBUvrzFIgt&Cs`oyl*|(JmHZ)amrM}2Noawqq*CB45eXb6c>)JXrl7YZ zSzsrL6ZDjf6xd3_1l=V=1zjcnf-Vvtfl%Th5J+4ERuVgbg`}InTw*QYOZWm)iGjda zq9rhrs0a)sT!EgX*;-ff(^^~d*;-5T)>=dI%vxRY&{|b;+ge#tYpo=?V9k@9vR05B zvF1qjSxea+)~)O&>t=S1brZYHx`AC_UC++4{>lDf{ezug{f(uqzp_=4&iY$FWqqulupZWbvo6+;*xuF;*zVT%S%LLk zmT!HBHL$+LYFXc4RjjYGTWwo3A!)g~h!DNWwT2C|TFnl%TFLrbtzdnuma`sK%UBnyC2Vi2 z#cVgLg{-yJ0+w$zk2SEG%W7H8W>u_av0ST}Y_sKb_NV2a>?g}V*f*9_*=LrM*@u>s z*xQy9*jmf+>;+2+d&-h!k66;|UQ3GIZYgFrTGp_uEvwmOmX+)R%L;auWf}X2Whpzs zQp8f0#cZWzAuF;hVDl{V*-Xn^HrX?eyb_Kn4G_NhfE z`@kZYy=5_sy=oD}p0^mnp0pUu9<~Tz_geU~+bjmL8!UX;RTcx-r4~Nyd<$=OrbRz? zs)ZLj-ok?=7Jb}u>$sRP`HSbc8R$nJJ+1Y zPB-VWlg&A-#9YdV&0Cpr^A@JayqU={Z)DQU8<+(1dM3vFClg`*g9$PJ&I~sH%J`ap zVZ6*gGj8S|83*$ZOb_$-jE(tQ#=`s!V{HDK(J_C?sF}ZDc;?TUR4c#2?4>=SvuOKEpWiX{HySV!H4NW62jYCj4qfk6*=T@GBW5eg)HJTE;Y( zmNMT=OPCL)BIcE85%a{fkhy1Cz}zs+XD*xOF=tJ4nB%5nnS-X;%r4U`W{YViv(7Y~ zSz(&SEH+JL=9;E3f0`ySlS~sC)--{sF^y-+Ovf;Vrm;-6>1Za^G=_;c9mR|?jb_44 zqnKdRNG8BEf*D{M&Ul)RU|dbZ7<e9Y zn*=aFP5hb9CVtFY6JO@J$w20j$pGfIi4Rk2;>}zz>BpQh@nVjccrtrUJech!eVL6W z?#yZvH)ffME3?4Fg_&vM%uF?LV#b>|GL(q}Q)$wh5t-OAxhB1s43nNrl1UFH*2I>H zGU?8QnsjA`m~>$VnbO@xfQiGXo3v1WRjSTS8pEEr1@bH>EPjL|dUGwLR$jG~DN z(`IbUG#DE)-;52I561e;OJhCev9T_5&sc}KVXVzuHr8U!7;7-cjMbR~#%jziV^wC0 zu?n-!Seg0DSczF=tjNqU<}rU7bD2rT9ELHL($&Uobg6MGU0~coXB#)usm4w87~@7d z+PHxpVO&QKGyX{j82_MsjK9+!#@}cc={y=LPzoS)* z-_l&;H*}NHYx;-LEBcesOZtt`3;LPSbNYeNGy0a%Q~IjW6Z*W-WBR1g-}E7)hx8t! z2lO_h`}78*d-N)!yYv#HJM=uG+w=^hTl5s8oAfxN8#FPxPL~^9ql=7c=^Uf0bh^1Meqr-HI;UT)t@F4xg@BsbJa6kRRa3B51a4&twa1VXWa5sI?a2I{ra3_7l za0k85a67%ja2vhJa4WsWa0|W6a5KHYa1%Yta3lSP;Rbqw;d+`fTt`ls^~EWmGnr13OdZ7oE~aWM*AC-(mn^j7@@dL6JrKb~H!KZc&GA4gBukEJK+kEU7u7`jG(6kVntO&98q zq_g#-=u{wHKaw7$A3=}M52uIekDvqe!{`C}!)Z_bP})U5gzl{$Om_za`on0x{!rRL zKZw@SA403>52m^Lfpn8z0R02_q~}k+(etC9>J6eF==svO^aj#b^#;)A^?c|PdfxOQ zV2@sZdYfK9dcB?(y;9GUUZUqg&(rHm&j2RtxziH8KD1cRjV{-7r3>|3=&^dvbQ+ML z=S0WoInv>J4s@`dJsqgmn;xiVM|%RUdcA0Sy`HqKUJqKRXG@#ub*BvhZM|-^s$N%` ztJj5Y*0rI3>I&)4z#Clw{Y=-IeyD3j-`2IHYjrK?^T0`6bNaBZ8NFARPjAyTr8nrB z(5rx@y2kW;T_bvit|2`|*MJ@e5M6z`Tvv}S($%GNbam)-AVF7~j?vYkBXl+C5M2#= zFfdS8o%YgIquq2>X$M^u+7=M%D%0k=O0lLSQ|UmW&L?WL&POUj=K~c24Ayy1`Rcr*yma1DZh(W%8>)xS zYf7l|iZTa`bY4}l#%vXN(WHWK0_&J zpQc*0PE&PSr>HMlC#koagZYYA>)|a|N|g^Dk-@uvBw7H6NI%xr~~kxs)0Q5X~i2h2~`5h5TZGs8Vn57oJV@9s;*D{-A0#rc&pDlNwW~!@ypR$<#KDNz?{lmBvJB zDKJlC0yP7eqA{Ktr!kHa1LYbLstCx@V5u}9L4%=UfCvqm3f7>gKwzK-p}YWB4KZa8 z*lN^J0>Dh8nljX=qO<`OjY^6OG^r`<1uJ*B!E?mrD}jOwb4`okgXO&r2_G4 zqo`Q7*zY7oT$)j+B05Go(Y zQXNdC0AqlWs)1A(FjO^w@&mk8{i(iyGtf)bkLn6osSct{0X;xN)t6EN+EfNo4Zt_x zgUSHvCGZ%yr{Y8104}L`Q)hr~xxrMGmF=kU00mSk_o9k{ zTp$BTRPITQ1|oq_)Rn3OJ_B!+ zx=_!7N5E~MR>_9C0Gt92D+#H+z;<8*uu4flEd}NSGk_^d*3>wF0Od+nR1uH^qyY&^ zmQ)N70R#hqN*2^Wz!Pu;bka8dK|mmB3= z1y~3C1uO#Q@U*CDz(jxns(})oCY29l0m(odFcJvkX;49cAK(r21)P9hKv$kRWeJ!7 zdVmI?2(&4vQ4PRX;63mXcnsVHt}Ccgmw?m2QD8r?6W9c-0hTMMPz!)rz#qT_fC4H3 z5s<5(Ol1H`Kr9dmgaSi=K|ntRC8`hL2=oAK01Lnv&;ir{9?-&7r0Re#z&qeM@CdjA z)B+cPQ@{~mFPBGc2Q~t$fTh5EU?wmH7zYrb94G>EfOM_`l>o#55kLqK2n+t`CoEyyH6UxYjzZm;RExlC4{gYmeV0`(gJKlvbCBg5T&1D@|SGgwQGH!nvs$(eVQ9@0*?NFoYb;*s)a;k7 zt%vL5U9O%bTc>V$^;Ow=afQ_y&qh~okgdJev--7c4YY=;u1_9Uosg|3wyBEqcxKfy z+1gxVsvgPK$m(8Y{z#+hplrPiE%^U`&)br^6hh1Df9WosHl zmE4!DEudIpbLoNTj7(2I>e@$r`Ka?A_12^AdDI_|I^a={JL+Obed?$a9rc={ZgSKw zjyl3o&o}DoMt$3;GaL0@qwZ?dKaD!1Q4cigaz=g3s8bpBBBO3&)K82$hEY#2>iR`} zy{K~+_2#1PThw2RI%rXkEb4+qeXgjJ74@p3ZdBB7iaJVB&nW5&MSY*BvlI1hqV7!8 ze~CIQQ4b~Rl0Ka6SfvEEj_4c9eJ=C9vI`B}B9qOV( zeR8N14)waBZZ_1fhC0$v&l&0}Lw#eYGYs{9q3$l!zlA!qP!AUBvO;}Ss8b5{LZNOa z)X#)EmQYU;>N-MwMW}NK^#-BtAJpH2I(Sfz4(h@|eKx3*2KCCIZWz?>f;w7I&kE{F zL47Bvvjp{ypzaXV|A9I@P!9*{(m;I}sM7-VQlM@L)DM9=9#BsM>RLd338?b`^%kJ+ z0n{IWIskAUKhDL+`Sds^9_O{=+;p5@j&sCuo;S|b#`)GbXBy`{IA$Ej zedE||9Dj{tsBs)Lj%CL2$T+4L#|7iqUL2o`V{CDpERJ=>@v1oH6vvI?*iRh4iDNKv z93_s0#PN(cCK1OK;@ChO--l!LaGV{EmBaCFIA#sUo#EIq9RG!5xNsa6j-|r!P&lRu z$0gy|A{-xtV|;L&4vw|K@iI8(1;?%6*b^K-f@45%90!iY!0{9~CIZJb;MfElUw~r- z@H;<#tHbA%5$_?{)ai z4ZoY=w=evDh2Nm?I}&~i!tXiwO$NWK;I|R{zJcE;@H+#3E5P^t_|6{RyW_iaeE*H_ zu<<=KzDvgU!T3%W-^=2=ReV2+?>O;2CBAFK_l5Y*58vD2yElA)hVQ`eJr=%;!uLt| zP6*%Y;JX=ozk=^b@I42I`|;TwpTF@L8lQvlSr(s1@tG2z3-Q?wpU?0a z3!jtlSqGn2@R{deqxV?P@E!q}h1J}LGqv2Td|JM5!jKMVUx*x$iE3-&v( z?||(;w)xo3W804HIkw?z$=o_@tFe8?HW}MtYl}4W4rgca`Z!N-;^px-NSZFtzyh=Y_D+5Eo_(Wl~&YZ`-5!`wlmnaV0(gX z2(}y8R$%*pZ34CfSodRnk99oO>sXg#{f%`t*3(!wV||QuFxIT+PVV#8a5Y|0d-(Ves^$OM{Sbt!hA*&~# zZov8g>j1p(@m|OK8}DhnkMZ8c`xWm|yf5)y#QP8LIlRyC-opC{?;*Tz@Ls|D1MdmE z53uZGdB-x2Q}mR~HhSWdBQVtK?eh~*B;8kR3CQ&^6$>|lApGJ@p-%Yu~r=dX>l z|5{1=uZ6UbX4$WaG?7O5HNdYPes$z0{C<${@cTx-k}vT4Og@p1XmYgA{$VqaX z93w}_A##xHCws{rvWx5>+sRh4nQSEM$vU!ztRgGOamkc2N zi6?OQmM3pEKE@=}tiyOp0#b3pr#P7v##4p58 z#ea+Mi|>eUifhG}#plIm#3#i^#RtXv#Jj}X#hb+&#B0PW#LL8s#Ph_n#nZ)8#S_I6 zF)gkUSBOi*h2mUsmN-qEBpxG<5l4wfh(p9d;sCL)*jwx=b`v{^dy9LByNa#F=3*1E zzF1qVE>;qA#Vs`rHQ#GK*SxEFRr9pwQO(_&n>AN!F4UZiyNbs<%|Ht6o{XqR+S2UL4jyH?v*cdr&yn^hZDYgemQbE})H zepY?1dQ

S5Kbs;gD!t4>rMs@h$(wQ60}imF9bbE>9QO{}7;Dyu|Qxm6ieiB&OG z;Z?y^0aZR#eXE?SdR29)vZyku(ymge;#4(Oeye<6`J(bsO7Ln;F*eJb569V=}s1(l|idX;LG3YAS2-zwf$ zJg<0AakJu5#i@!z6}u}oSFEmBQZc7uTE+MZaYboGUPXFEe8tF$(2Bqcp9=R1hl=hM zRux7SS`|tat>r(!(b^mXZ@(wn6hOOKcCE8SYUx^!{r%+g7v zq_ng&r!=KBrZlWHu(W@vYiZ9?>r&%V%~FNZ#*)t^FH0VjTq`+Oa-?Ke$%c~UC38!r zmM|sdC3z*OC8JBiN&-vzm$;PlD6uLrEKw_wihhdTi=K*Zi!O;yi1vy$i&l!}i>8Sr zq6$&IC{;9CG+Y!Q@)9|Tx{1t1x*}y!bMcqrSH%yCYm3hmA1vNhyt;T%@$}+x#g)bR z#i_+H#lwsJi#>}Sin|n>7HbtN6xSDhD0*6StLQ?}(V|^N>x-5a%_^EuR9#e9lwLHt zXn2u-kw=kzkxh|tkw%fU@JHd>!bgSI3(piDEZkbSvT%Ok)Iz$jq%f;6zA(Hnu&`gD zV_}yse?Y!#zHPo)zIHx0|7YHtyoY&L z^G@XL$y=YdIB$9$n^&5boi`>gEYCl$Z(grF%RJpY#k~65ce#&pYjaQL?#W%ByEymH zTqd_9H#0XjH#FBb*DcpJ*DO~vSDN!J=Vi{_oC`UJbGGHI%$bujF{dggHzzSCA}1in zBd1r6WsXjcLe9^zugBgSdui;EvD?S496NXH#IcoQbH^r(9WmB_tozs=W6j2Djg@A9 z&3>MJEBjpbf$UA$OS7kEGufi-^z2dDL$mv5J7f#8^|KYT>$2Wt-Osw1bvSEl)?Zn( zvc_eVW@ToL&Kj2Go#mJ%%+k+N%=(%6I`dxUh0H^ln=_YXPS0dAi!;+QM`jMm^vtx& zw8+%TlxBR%c$#q|<5b4(j5QhaGbUwJW{k}klM$LRAj2s`n4zD+%lMK0GW~Y?x%B<% z8`2l0Pf4#%&rOd{AD%ui-8tPR-5{Np{v+*W+U>NnX?xSwr7cLCoK~4OHZ3kKIL$lF zKFumkCrz6ACG|<_wbbLOJ5pDq&PrudMX9N&k*NWxeNwxp8mB6!)~CEqxs!4>Wnap= zl=&$WQ_54aQeskqQan?7rtnkLQW}%rCEriJkbEF{L-NAp$;p+;S;;ZULCK!UJ(Ky# zYRQdBZ<6jNolDx6v@U60(uAb4r1YebNr6dylDZ`sB`GHTNPLlaBk^S7j>Hv-GZN{< zg2cqc;fVth9TF`QwGvwrJ|sLyxR7ulVSU2Ybp#JIA!^ti}4zc}YOL7aA6YwY{j`?2R@_r|V{ogK@> z7RDyThQ#)d?G?+9Rf+vM`o-w$qmPZ=GJ47ADWfY!XN(>>+JCgmXu)Xh(Je9WV(!J9 zjoBTuGG;~$iOG$LjR}hB8`CYuAchBLDt^?kQJ$l0M;VRc zjrtP(cl4#`{n2Zq=R~v71<~=*!=gQ-ZKDmN6{0_nd^GaH$bFzha@I&{WZuZwkwGKf zM|K^lH?l42L)5*fvr)UE{)+lDsyZqwYGjmulyj6-ltxrz( z3oi;!2oDbT2=5lIA1)p7e#G4or$=lbv2?_g5oIG%M}&>=9?@%r@d)0C&tVV4&V}s` z`zvf(SY=p7SVY)>u-;*&VM<|Nhd&yAVfdcmD~A6$ylQyH@W|lUkewmRLZ*b2g`|WG59t?T8)6V54SpYd zJNQKKmf(fKo&|O294V^NybZGL>kfEMKyAIVI+8p#c=z7qRp!Gp>f~cUJpy;4MK@LIuAf=!$ zLmmt{J7mX@B||0-5e-QgGIWUh5aAHbA@zfw4ZbpX|KL@F{~TO7IBoEV!Tkr@4%Q#s z8u%vgM&Oaa^?|bkNnmzhRN%lsyFlYWZs3Q2I{_yGHV4cPU<2|3VgmdF90K?OiUFVf z@B5$j-|D~6f1H1T|7iaJeUk`)%`Ez|YCg+)v5x%b@#% zP7m5TXyG8qp!`9j2l)?j9K;{Q8}!NduJ1|T&A#(}8Q)yrXkTC7-oD1Z9N+f?Zw)*; zaKpga1H}Wg21X3@9%wsIe_+diR|9GX92~HEz@Gyu2BZuK8Q?L%W`O2^I-ekqa4 zEcKb_Q|vRwXRwd6kGYSM&u8y@-Y2~`d(ZQxy~lb-dHZHn&KZT|!PSM{IP zzpQ^!|6%?6^tbM>*8f|-hyBj<+tzPEKek_PzvzAg`}OK)*ssm&wbwPTgI=q=rg@cn zC3y|=a`UqCQuX@k`M~p(=N8ZTp0wv!&qz-nPg_qt&nAx-9+y4#dMx*t>{0A7#v{XH&ZvR+dJ1A zu7_M#yH0a0b4_#&a&>VvcU5%#=yKcTsLMK+=`Iy6$u7fO+*~YOlwCeM-*rCbyxw`H zbCq+dbFgzCXDeqF=PyooosK(gaGK>*<&^3a;^gjR<)q^D#qqA=amNjgGaaiOQyqgH z`#4%TDm#95xa)AtVZFl)hf0SOhhYwG4i*kd4j=7r+aIxCYyYQxxqYI2kiE0LnZ1Jj z``$NtAL_lT_aD7WddK$;?CsFoq_@=Wja{wXKD)o{CfOC*jkX(PXJ=<%*WBwxuS>ml z^;+C(T(8_-QN4V6b?>F!tFGtco@aY*?K!U})ibkaSWl0hf}UzUzxKG-<9LttJ!bZ( z?2+7KXb+bjW<3;oytln!d(d{J?G)Q$+gMvaTRU3=+ve^sx?k$PtNY^alI}U(BfIzS z-nF}C_aEIJc01K=Q@7dOs=K9j3-0FD&7vEx+xxCJx*qJhvg?$t#a&~&`gOJIYS6W* z%d;*Qy6ot(unW^AyGwW%&o06)YF)nC+_O1mv(9F^O}R~?&0rfx8xtF;@U`%YaF1}Q zaJ(>A7$x);b`xp}e+V85P6{>(W(g_<$%3H*7Xe?u6}+{swccmF%zA=#zV%3JAM5Vc zTGl_U9$B5T+GI7$s>&+aYN(Zq72k?$^~SQ+aJ;ncFb(8*)+3KvoU4? zX1&b}%$oVn_!s!w`SbY{KZ762cjsI3mG~b_ZSt(Q*G0qCXY-` znQSzfX;NvDWHQ9W$;8B@&G@D9W#e7Oi;NlLY~vBe9>&(jD#o9TZW$diT4glFsK_YB z$k(Wck&aQF;UmM-hMNp$8CDu583q|T8JZZj8N4*OWU$L%kpW|nWe{f2*TC99+2Eu8 zP5p!VEA%Jn7wV7FAE4h|UrYao-UGc8dh7LO=#}dw=mqN8>lx}b>ps&xue(imzAn*C z*A3Bi(>2#s(0!{@tFu>Usm?f^9GwUqFCC$ds?HbfJK9IIS8GqzF4i8c?W^5GTSvQ2 z>yg$et&LhUwJNj{wFYZBXc=j>Xg=4xpt)Uhz9!L3*9_5g(=^vq(0r>=tFc#Osm3^s z9E}JKFAaf)ipD4PTk40@SE^4|FH|3;K0v*@x|aG6wFhb^)Yhv_S1VJCSMyi1Q`1*# zRDGg)R&|T&9Mx*o6xE@s&Z?%WZ7MHSE~)HPS*Sv*WU9ayVHHaiMU{8T*Od1uFH;_` zoU0tE+)vp?Sxxz~(ru-~N~@HnC>1HiC=FDyRnk)Wq4+@YgyMR|>565F@rnV8@I_Iv zk@tjmmbZmBhgZ!@<^}PbcqY6yg_jDK6m}{sP@oht6hamHC|D@)6y9-bxqG=wx#PGw z+z750SIAZ2e&XEX9OA6xOy(4FqB%aCZX8X{RwWKcfrFbO*Ph4Wa0kNfWiPeU*~BPVd+?ZrRAApFlmCt)P+s-Oq^T-b#}5+PL>mDFv} z^Den(RrQbPx?8pVtTolwMqPDFxFm{uWw9u9F@!{|z?4|RpGrQ4vrn}r>_bY% zs&xggnxP!UT(yqu_QtUC7)Y>CfRp;TgDU=&E)eZ1Gi)4W+ zbdjf{SgjWX(VmXA5Ur{rUSyS77>!76C)j9lbs<&UVqICWf*?54@eekxH#lfVaJV8} z+!KJ6jy)W~Ez!k<2cvl#`YYANNLbj_4&`vmbn#>qAqE{h8*aJGjJrB`I@}6fJe@Is z?naEcS{KW64WJi@p%Yy{j19bUILl@!{x_+IXU~=V-+9*efxxE00R~WyI2&-oxlRV$ zFy43W2+R^Eh{F&wH3A|wItyNT979ZGN{3m>F}{mw9Vmi-yyxJGqGy?}$*^OBM@e}c z;}LiYDT{u2tLX5y{U2{S9OEVko%`y5HH(Ri4501;x!*p}?G(3O#GlpH+NeutTp9)7$8w}h?jig`x zd^-G<{o~J?qvwzDj?$d;%U?R|nsVJB6BG}q%1RWMkA;PgH`=d1Oa`}`wt)su+gv+J zSr0CVt}>LwAFzZgV9eoZdujC32!dj*D7ROI^Hbz%K&#eIi3|41J;0NN78Gc? zZzc4tsso|mj+#Lyzv^1;0fH9~b+~-pIp{?bY*jJ1c3Uk6?f^|$yh^s3K?ZtUeeOWz zd4n`DGRTw;uL_V>9WY`7;Yc*#qs9sU$lCyr#0oPk~b-lX&~WzOKwc{^tgg z%Lzj<2vFpF=Y}oAJ@gC?@c+-|0ef7|2o&D3-7pj#hmGiT7~DL+w%)MI<%FZaXcRaF zhA8n^C5*0%Vdr4NWx)i3BOHSw6u@Ipj%>F^5ihq!nci-VqWv5T3}N@5%?tLpoCp*c z6AvTp9A!kOlt=t?6zt%sDR5@UWP89fIy-l`D|X};_=R%+Yjc5J1&-4)l<0@ciTvf& zX<3Iy3z;`G{W=<>>%4U~e}j8pfwKVrxy{;I94>6&7i$Cu2S@*;(lp1xX?bZyNusn= zN57DWpoj$jh%m>>TaQC5ClF(<_3&q__RcY}u>7khWN z^L?nt++ThE5*@2Kcyr$El*VJn4DCcmIE;rJ4OzTN=Pb7Ey>EuPsqti zPH=H{a&~b}aCS^Dleq;(JBBBvCKV+_xC{cN zsVO42gsi+QQ9_|}ABPmo*@V=z^rVs;QG%$VAg$OT6D|O!Sdm*aqjSOKrQfLAKu>B@`| z0-l4whF2~#L<@Mm1PU;uiJOvNoRFTBBFZl+9^u?4p^vi*ryx8%UBoHQ%E(Jg6{KV) z6>$<0AWuXd2_lYfct}EsZ{(1Kh$uh5fQSgr|69>;{Gak6CqFMkAp0xHlgEl3TJ)L% zDS<327A57Sq+zykA`<)p10y-$!PyIHFS?bvp5a$g-@|)SR?I;b}=Z;JqUx2q8Ev zkMpmr`_IfQ&de_o3I64&Q*vFL+&nmNcS1S?Wo6;lb&d>(h)f9d4GNA54}i=M$IQnB z7PViQ_QK2&wWlpiRMa^aurL*8RiZ9jz@X5D_dmcxFZjJWqH`1CwS%lDb>E= zgQG$MLL=o-7Wlzga`K>ZOUi-s;0z9p68H(+96TLd1ujm`ZqClmo`N1lX*p?7hx8Q0 zLO70Txyfm%scEV9ZV8_D$xu0_WD1JXO0$ZgY81FQd${!V7$dOHm7R?}RCwOS`RStc z0SkYDV4v#j4mP69lH6p0eTFlTT9#ClZto(n9}YmB z;hm9J;^`@{PfwTE!}i5#?e#I(r6!4zI-7H$7EH=Wv(J&`lDCtrVE$hCI$c}8{IvA& zko?rF^sKZZPNzCSR+xXQLu7^jpDc|C8Xb@j5)=WohTo9RMW<8Q{^wRNN=nTt$4au3 zW5-229vwR6y(|Yi?0?H$ye|L632To3;v_3w9d4as`fv7~gX-k{e-pVp z&2XNnX~`uSP#V+oAq!;tNy*7@Gq>kLyG>4hN@rsd-0>M{@_cId@t-!>-RKArGMeL% zlAnv6kMVw&JZwI1Lz0A_|Oi+>qze@*yjlF zuYKzXFA>0~aCRzn zn0~n#f~U^cBN(nnCKL+19`JlDix-pI^|$cKl(?Lsog(Pi#rGQ>`xx7CWiDr3CyS0< z7ue|>?=E;d^91ZLUVMRo=YjDCfL+HiVB}<}aybIrk#8MtzOd6dyx9V-EL$)N-Wxv77!|c)K7xJU>jINvH5i z<>BG|gxjC$T#nsu*A2s@fAe=hhYN42e{JXof#%_#b3)hNx?E02*l6x3FO$Jv=lna= z>3p$H>9`(?z#kNk0z4MCI0&zA`>yOC936^t0_90|9!Q2vOBf2J71O_ET8S$KUY^~>V#B)Oa?my6{RuPOS&J_5?aa*2HbG+&d;yK?zhE?>#z z54miTODrIG95kgesVSHGa*1s{x?9Voom>XXC4P)UcWkRrR>I|w%$G~CT>c@K>*Vr+T;7w*H*#4om&#BLV|Ye# z=`5E%ayb+ww2`558IID1!%36NY?N?(iQHT%H;XUXM!x&2DHd7a$6Q*PcTH=mT7 z&&kcVP(pcqgc8c>OO#NaKca+k{u3p{ub>D(c~(aWeuWa^gE!$acP*3?)Uba*5xJ(cM!nz2!1kE@k%{xJS#)v2vL#m+5jT zt0%ypteybL%Izn})-jmBma`{p& z-^%3|xs=_nkUsnviRTSnK$(OtnM@kUrG;Dy;q{yu{{4rb56t;GweX){ zc1Z>S{kL?WlFY9PmkAIR+@t#6Yi?(jIQ8LTCD`TCl&Q@W-etRXkQeJ$A&W2o+jFM!X0iyJiSU;;1iT zPp<>wXip-RMh_6Lo8MH^(7LVW%;e-6(?L2lU2XSPhk1{#cAD5wHA!P;)$ohmt5#jy zQ+Zc+P-Wh-a~1m4Ln~HnJX_w=bzu2plU-%@30=z8XiqEE=>4N4_;6H-kgg@9!~FwQr6Zd3{^-dbi0VpAAfms!?!_G##f9k$3aTi1?OyVb4|L zhnpx1L)|z}gQxSB4qIw5YUrnEogl{(CkOY)ED1b3vTMM{g|&XQzLkR(jS~9K|8ROh zZ;ec!+s9SBds?mTcin!V*Q~a?9)U~q``$BCbPr?Zx}AL1-8FvbZs(-4zD`z|mmFHW zqU`fSAKG!ZC-oXu__D{3B^kDR0^W2RRhH3ptM5yj-1kh4NH zV5P1~9}ZD^)%_#yPWM=ai8|-;y&S=!aStTDw^5o5QX&7lbV-|(NVDKSx7Ck=TdB@2)JB^`fPN-WD4N%L<=$#TazQnf2m z()IN;Y2-O6S-W(ibi@fM={=H>wjGp`ZCcgRxZP6H=X8lQXN!~^sLq%6UMnR7+_I!g zmr2R#_sP=Z^Q5qRWSn&NpHQwxkCgH!NXaPuFzIlylsrBkBy}&5k__5UdU>preD?5` zV)-xs;x5%4B_-T-PSS%RQZgl>m(;{hN{mdpO1pYMx~^DCpY@g!yYVK{5ke{1>#Zj( zGLjO%pXyRSH7Tjxq$oYz(njJ_+u9mFw~-I#4Q-E}wUMeDU)zdqwGs6x@7wmDZ6gZ@ zy=>dIzm3>6{oNL`v5g$wez$GM;x;lo>w4SaKibGM!KJneaT_VUd%Epq9vnCQXd5q~ zjVvF$zwLTx8*!KJXbbmgBbWAUYGdu&NNV1iwls@2(%Nl#TZ4KVnfqu#TmQyZ;xuPg zoAc{daxwUiwmUalNrvKtHir|fMDY;S)^}?wSy5cs_GM8k@wF4Rjh@&_o;=HKD;2d8 zdSOP}pu|?vB|NF^*sxY|S}nHilY1-4Iv&|}Mc7KTDni>5G+W6|ry*_2>srX@H@{Ikhi5Vt$*KXASWFnTKRh#$g)?#txB^SNcGad z))j>fByQxu)-RzA#9P~|^|M_Au|DJ4x=gi!D2nY{IWOzUyFRw92FL5k^^bzq+l%YT zq19%sL(A*Q+A)T$1rhaRwvl#gphG=jFRQd(QLQJUaokpw=XE5*ySe4dp*j-x^GC~+ zxpgFb^QV?O`E_Ji+MAY}L+VI?<+Bz>SVw$sJ!pB__>&Cy<5tVpYaj!zw(MB{6Er}a zYw1S+Bmuimv1Mzm=7 ze{0qh-W|ujK6jmzFWnUx~26uEosuD~a3I ztz}}}7qTGJx@GO@FXXO(--7L)***Q1#^f&~euidCZ|5&$b&zt4juhrHayc!lE`27R z2O68-E%;0(6n$@gn*N#G?e(#FqU&d3_xx4!Q|Tu{Eqc=Y;o>K9H{yQt+IgRdtLDvS zgOpEX`l-v!P7a^Qm+G_4(uR*DywCAw@yU;5@5ckpTmSe-tk>*no)P_#Op4#q+(r12 z)ETd9&Up8Mq+k83Id10%a(BX_W`*hxBxK;6<{1AEZa!xEmXz!EZ7zTKhM1ps zYJRfp4LL^lYHmt?L$bWOHlObHh8TXgZ1#Qgnw;2Z(ww*9H4&xiH3#RsCOs@QnjhG| zCQoiDHd}mtMHWqKYtq{Gii{fE(6p`K72$KfHSwHZkw^R9H>rMoNmdoUY&x>-CCTgc zxT#ygOVa=O-6n6xmqc^%^(N&{FUXU~OHK5q7i6#2nWjzIFUX8DN1G<~ctP^W{wCvB z&&hC)olQ|IpA*-wo0IjiY&*fVnX zk3X8CG@p^$zzI#*=ea1Qnp~Nue zrb5x*WZ9-ZP2=tUCg;)|n?jyFB0sEpHl3RPh;+GY)AS+q5s98*(R4=f5t%mBxM{?J zhvXbjx9N}kheY|XT2p1$hh#`8ugUb@12WCAwK3z52jtG1y2cFO2c+wYFOB@4_en|Y zyT$FxknnOO}Go~{JzFYkGrJ)@%BcOw|7Y1f{l%73+|A&;j0@{gYJ+_&1H>-jkn3W z)AJik*4>6#v@;tgM&Bka9#b2Gm2Z>D-^Mi_-*t;vZX%7ZlW&n-X%&q}bZ?PR>*B`1 zBR9#%yE%>2*qdbf%=E@=)0?DkaAKqK=^Nyk(&)yB!W(49(TK(omN$rhMMxv({B_do zGPp5Obe-(|FtD-6`Z_6HVJI*OFkaQDexdtEA^a?Z!7bSBZLwYNM;sRr19_q0#y96>|SgbHn4*E9Cr& zpAFdGJs9`7VffC=WQXzF2EEaj$(Gt@4J-%baX`SsE)fpdj7SoL8<2j5*)jsVaKKOL}aw8 zL9gIE`RnSE27$qOa(&XghNrvF5f%R#4UwbHkwI;f8_Jr_5^A5MVc6ociFsYv@CD{XZ}@9$!z95O!ih_3xN+<>i8W4WxSDvH9IPGHP|Z0_tfz!G z++TKzObiHac(axb*Ef`4BH?*!AaeQpGoG2$uBo>(*h^mOm(`zKyN9%1E~wY)zlWGl%C1+b-A%mxQ|s|rCtW(G zUblW1nROt#-fHqLa;9WN{UeKAq|IqqedyMmq~8bs`U2mbM7-9g-tWc^awgfM{%q`pM7>KiD5MB z&yL(mE_*B2-+H-)1U5?R=7_eCGrJn=lz3an(1P!Ewlg-9n|2@TnyfaH)Yq@-$fixC zX~mPeU7nlBocQ~7i_UB$?q)aZTq8D;hqo@*RX^T9CeAopS2lJ7@d`O!*QI_v`Ko%b zj$+o6EvI(XP19OW3aKr1q4U>4KWbgwQJZx{wc)S2r<>N2M>`kQ?Q&mB_U6y2^E|eO z%(eToE-z>e`Ck;Bi9b|b9L8IS6d{FBq--rpks`8hp;Zyt3JGQQxhslFNS2bdY^_wJ zWC>v~V=xS3Y-1gav5h4ny>I`)`J8+2=brQYp6B~OqYoFIT60j}tgyu?mmJjD9a_{M z%0|yA5EgZAXQTH2A0jw{Ec9Ibtwlp1>;LEHy=b>S3-#OLwz%bCCJNO#EkY8R=<|E$ z7Sj`6p~c3wih@eCyemD~Pz z!P`0oebBtLaDtkQ{&_4|D7Q;S$=3XZ`NkLMst|Xf$NmL+zlyU!Xi7r2BkYALha~jP zskViG_gu4IjSKz`&(V=W%0dJE85(`Ja)EvJ8ESB-WFeWBh|Y``E{NMEqVIF_7LL{@ zpaI^m7dBZYpvRS8EksqvqZ@jY7i!MLqa8027V^sD(9cdW3)ZLN(D>~S7ZSccMZuQP zg{L}C(Oc2r!v7Vl=yhBCLWX86>MU|+;Zyb#^jeMI0%p$>)H~E`f%_r`#TdCRh{?pD z4_7WP3`9qx*~N|vej?HTzn3-(uR@~GX&tkL$IFk=Ju`+2>X^r`yW}r zctxTtb*%-Ju1BcKi0VSv`9~-=Q)wZg{vk?rmtDAO{1DYtl3Jh_JwTsyi7m_>cz~`v z7h0gcia>)dugzbSjX+1Gm*%6R!co7L*?IE%aCAC)Vtyy#J__57%-`VML!~!!=5JiT zhvri{=Ve;M(DV0O=ZO|!=!!|>d}MJb`u=b2yyJmT)VsW5zBVlcRRO=xPi_lANA(Nm zDgOf*3Ku`jpPNI_h%dSGQ8y6O6Z3MO+zz9rN0R4dEn)P)RQ$Z}R|wtpA$s0V4MHXT zAIvK}15pW$(0N1{M7MK+`2-w*?#af@y9|-hqh3Mtt>?+8owDEjN(BiG?DL%OI7C7d zQ?Jc?r4Z3tm&@}RqC|8>&T&2lPe4zytmh98;!z~gbpD^lLAz);f3F0G?v~b@KcR+0 z$t~LR|I>WXo*2#fFRK{T!d`VA^2MNEwbO&{=`7>8G5QHv<{hGUO8-ymC%+7r-2t+N{P0W4W6^JhX7@i9Z3qZfX zeRIt5+bGenb8hn7ZS>3vW3Kp{KPp{9n>)VSADtl8&UxOyh0;z`%$?!+{l9O;b1ja3 zXjW0doOF>dnvDA}C%nrSO*)o4_ZIO%GXxoPe+O@(d7od*ZL+$F{=6GMSMlx!+OHiw zrzvp*6`qcmGY|GgkLHKWNin@ppFm*liJljlc@Q^Ok>rVTCj#eQ{`NqRzW1Fw=IVil z`+Lq2%iYm_&1-W3yWLT<@k?{t|7T|8zj2tm&2dAO{jBHk#%^eey6N1J3|CZX)L<@c z?Hc+zS9h+|?HYR0M|&=^%mr=RuQ|6x!3D*S?42_rJEMDY6z5b}S5d}|opaxgUqvJL zNzVOwdIdc@ym@Y6$_d?>y>TwX&Iuj!{v-JP`Z8Lj`b!`pbQ#SWni15xUqYj^c!J}l z7g5xESa5mgMU<@CCr}T*fPzCT!F$?yG(3wT=-+=HP4cD*>d03ejJ_!EjF`=J_a|AyU&Z2*^GXyB#4n2SKg+O3thvw~% z7wk;2MWwk>f{9rh6v>ScV61J>d7lu$yL4+bSRD`~%v+(qMzMk;wpM8Pn?M1aVTmf- z@)dyd7HEm4r{I8%1?tIj5k#e#qf+lL2{LBQ(1zO%0&fd5H1eRefSqKDUYs-$tmm7c z`|=G0Y$FqNEl5{zy8MoY4?O>l&k#pZ5w5J}^SdFp2`G^E6s{Y^MOx zJdHNZZxb8^4AJ4D&4OoC19Ss%qabgW0jjD0XBO{&3UyvyoSpi95`9`SGb_LOB-#q{ zW*4vMql%}8XYc2pK<}*e&Q{Osq0|c2>=#o#^l&I+_DZbo|GEWj_I>YhR8pvR_OsS; zG^X~)tRL|hy5m9dETdWn&9N?+o!F*>8i{?F{dVmr%Aw`V9)EoVeH5KB>n+emPdmPt zH9xJ5E=$JGc04$Y{%DPwm2W+SMkPedN+=#ey_`a3i*6o7P33@D@s9`416|lz*(EJh zDK&7m^^6uOd);@|_>m^6pzJy8#?U}D23=+k$!nmevoFnl^iW4#eH>;7U#p?_HLPdr zruL&nJd;^B-TmnF2ZPxha3893M|U>8N)<(pYR}q;sG`g{joI9@dr_UQduRV?o5>`_ zSzL!Qy2W7U?8q)!^nk^mnPg2Rlq<=3amz zilNTT?Ea{L?u+Kl_|NV_IgZ0Ke#ds9S<-zoa(H<(xScga{wjxBCoyKCe#xR5*Jv~6 z^kq@$-L*3m(oR%(;K$5V@eXu-cJWNzk_;;1TQGA$Uk2T&^MGDtcJY6qtyhO{%6dCEzABa@1f3S0s!&zSo`MObMZT?r6`fstch@I+`;ykBw;8 z;@%m%7aP#J62%#qu^uf)cFuTiUXT7Tm7G~TvktA_BsO!J^cU%&Zk*BkxP~mp{F&|_ z`Gcrj{55T;_y@TtJ3DQAVHJt#=1p&YxPr803{L~)zY*0NebZ@zWdzdboDNoBMmT)N z^sj46$l1@dY3z2-KL2tE8TogX`g zDKT_btpKdpcfBkE_ih+~oM_f4X+@|JB3~A59|(`yNbtl}sVPc*yh= zZxXqk4@@6am_%-3anlNRe8gWrXu1rTK*)c5r?WL_ykd`s|HS#EoS=EgQ#0-ldvOCsd3e>%9!8tNFu-m%83`mi#b6=W9>vSq>p) z1)9?UW)P_%s!rcYA3z*VD^1H%`;p-dveS1LILN(v$!SoTgB*$xo7T7MLk2GjP3Pi! zkyr9-Q07Xo<;A`!MqnrMtE_WM z@fizQcdvCy?nei*-KKGhGSZG5-A0*G6K_Xc+AF5?k28_zld!IW%7 zBVv#kI<@N^4Pjpcr&{P#k9fl}}H}?){12NA;%enpPpt z@{ddbUX{pCyw=o-unJ_^aNkt!s~?Dg(C#TpWjXSYCOehHDMR|>q^1CrF90be~xf+ zq$hp5o*^=KwodNiCn8Szn>Nf7ks9;#<Bxo|X6VBf^Ii;6;S$=36;k{=@n2delV z-b5lR?@IZ8UmqduxFUXg^+Tl0=p%oj;cu-BM7H^^=V#UgAWk|f6BG5fkvD(lC%BFNh)BcK zM10FF1d}i}A!zeMcbrqh#57D8^m`*K z&eao?0WYL{fBD45Ax|V~_UnXT$OG{$|1=Rl?2b4-dN;uxzK)n(&Ys{8yCLQ(=@VJQ zuE>SS=M!6puOR{7pH65Dxghc3k0%xeoDs_T@CkhXRb8dr1!Q+nS;iJZ;lO8s<3xL zG{YLHA5)mPmSlwt6z!Pscxs7=+}k!G8)<=@JhyowG|U_!D{Y)e1y#m4_lUu}cfqO%X?mvZ8?W^U@?K+9X3V!g4w&^1QmBl?^VsjS5%r@Fc%0P32=F(A_dMnh(nSY& z8$u2uR;f7Np5Oz>PyZm^q^A~QbJC9&bU_p0h;2ufsm7XuX#-AE~3obxW^f%6vLeG7SHL_?UTaa0buu(URg zD#{{_bxY$9M0O$K}jkNecPh&K}>FEQ!?S zw2iym+lFM|>EosW5=ewa-FVL>aRk^=HLiJjD*}&{jBD)QfnV% zH;yx2k3@;W^6%?r3!RjNQ0~$uD@?-D2EJbrBXhYCP^JyZ|5CaB_T#I|qBV>5LoK z3*hYRgX5-eXW@Cg+W69=8Tf*g^0) zdwbyE&7a4b{&c~8-S5V*oov`SKYNT?&r^lv0(6G(%2K94tTFx+}NsdJIq>o zJf7d@a6mdbhNm)M`(X0ehs+k(&>TDV3}}W=$p((;TxfzVc|K#InsnH+ z++!?kT_YSB>oTUtqQXDDFO8+|jQ$Ed$X_2i4;tr@eU)x58;5q4s9Ls=1w zT8)g(M}2{t6*!|wZiVonnas2xGOCi651%%z95oHd zgGYCkjP5Y_0B1}TjwWw@5BpT+jkdDh!lx5okCx@Uf%p2q8g<6LhIbmLjJ`dS3-6Li z9DOgI10NiZ8FlZH(pN!q;zPM*_F3)`Q z#I-~isWcj0RZW0zKGPq?^5fuZ0Xn1UU!KAqrUyp>C>F-csf}(ne*(Xl+B0gmB?hL~ z$d8_Bje;dpwvTd?9>ZS2;-hEWBjFk=kuphZyseq5DDnU2{H}qk z!hqn}&}wd1JP3%*T-HS&*x>yo?jEU|aPU0`u6&a> z{Oy`G_n&`7{J1H1zm+G9-D=3y-{=9459@MQe_V%y%C)&Tzzr69rpZm$b%oyssdB*? z7x=oB5?AcKGrUh(mTQ0WD!jZT$u-$?1@2>ramPC^!_0R=T(h`KF#F!x$T_=<@U-jF zh@{X3SVm7U5>|E&w%x`bd5v>~pNx%+pa&h`kt)u}=HaujT?%`|GQ|$A!nKX)U9g3% z9Oxr#Q5(2dy>8@ig%x~%ebtB_-V#35T{1GOWdW}*`Z998-wf`I$shS&%YrNX-i(~L zHG#jGW{$AdjNuB!)RAq4MlfqJapbqpY4~r;laZudhOqwoMm|uHxB#N#Hi@iEFk_~CVC!s?l zK?l@f@)h-w3HE-tK}Tgo;o&}5OG05}O;;688J8J}A5wvpY9&UxW0m1gFGWW>PVa#) zLK{Zz^ORtbtEzZZhv62u#4C6B(eP&YmhsEs8~^`QG!>JF=Z=ZMD@*ai$Ge5$-uCEWjW8j& zrQpGEv&Kf4`6P5$vw1x{9smyO;@80vw)o+NU4J19^*h6Um4BdUpMbsE;bxCC7R&J8R7T7>4W*bdhuFF={P=EJ*;<{_``M#K9C1dz_` ziQ$2Jvye>l(c$xIGmuE$fnjX@6eRX||FDh!B&2+6&oE;PAF{NPAKseBgW&z!hga;! zA<9Pa;nb;7NO^G6@JtLBdR)0~_}AePNHpX3P(jlW^bDRK+7mPg>AFr08H*1+q_jN(n5*vo{t2!YZu6n5OItxm_ zSU%*x(hjk8z74fMXF_VypNHm-wL$l1-wo9?GobmF>>=yhEfD@w`VhLQ84`_68oKq0 z4&~j68`@;p2zfh34LNmCAua8QA?Ldd(Ek-EL)*map~)%o5GjiS@tUwh35K=Mul&Fv z@Ahg)_KEM%NZ?P%`i|$&u1!_YW5;Vl8`CQwj`roDblo42g{0#Uzp)G|pRpdA@-Bre z8Ky&-zrRBRpACn^o)$wfae71ld~5dDBSV6+B1q|y))3~x7igXCzMFvjB@r0TXj_Lg)$tq6{&dKFMAJ&f!s=d#KE)4Y#Zatj^ZK>@V%xQWBb>uP!XWd^yg%6tsXJ*o& zO#k}9tk5(l^X$(-QR!5u=y2JfN@gz@TL31L$D9&)~dw1msBY7>t^}58Zcm8SDh^L5+r&20Mhq zAT?!&!H2OSQ2a*g!O2}HBsFR>D4YXBnN)+pmctNanXfzOPz*q;Pqha_Ovq3TUUTp! zl?bIfs}BCTK!6^fRvNVK#zBu&WCyLhu~3?@)Zj8N7^)f<8@!IW3oX%w1_{eSkV(PX zfJsOol=f_CpmI|Hv;`Cl2%`LY}tYM`p}3}g+O444`jL*t$X1EkW^P@1*wfQP;z zg>T~a&*3y6 z^C?dM`$;uuX9v4~r_X+9wY;rgw@(#X$f5U(IPHbj$JF&l)0H7*LRCM-d=GT-dTD=Q zsS=cAS=4_~M-dVn{@9=UW*2l__HBROZh5HhZ)U%5f-Dp~mfGLGc_$>xc-Fs&$Uuzm zvHi3;X(%Hzvj3u=6ofv$-~Xg%8-&Fn{m3~92y`R$tJG|To>^l0i6^!|HQE9FA@4Rr zo8*1^Pb-N+t{Xi1^Pg;jYA2lgTh|LiChZsd-(ojHj34&>$4Ayf_%~MlSf_Q+!8nut zn{{j8B52SrrvC?Qzp2~r{bmKEIBNIbmHQ1gp49CB=T{w3RqfCIwFpW}DD~5P7QhQj zJNt9n=fKy4lKscc1)v07te;RY14e!m>c6c#4a#S(ab#j9!Lq0&&fS#>5K9zrLi~83 zkr$t1-aZB@+H*OjCZnK)em{qsHv-D2c5!Othrz=VOpa6dAn3YG=cLT^gK5KcoP=u} zaIU$EV?yZ#T}w+jua5M9?A#(wQF0gPANP?139-R#$Xm{@Ko(ekD~qGXY6lZ9r*TBj zFhPRJb58o3R`B+rr<^fK28fe?%o!mygHMISIf?yr@aHVT`EAt*iu92<(jTdy2NlEV z-O&KjzXovJpgPbY%ZC#?SPKq6@!$}wYrts8g(I2&6STW^iF18>6{zUs!0{kefE&!L zIXimG!9Uuj9K@sy+@fU2NzN$&4~gknGW~{ejL{1sI?S<60NEnsbgQj zunHy4r^EtKEKioRap@D7n=HlI?D7$GdbovCU780f5QI5Ll|F#;-hcZpBJaS#^UHl2 zoHyW*@m$|$PDIlZZXP@!OWbpB;vOf9eNuYD=*S7dam}rpHw^SVia{bjVz z?C3+VeT>}4dK>{pbYlDVaPNb5^?`i~XYPS&#lC&i7op&eH=ccm=l-`*Bwg#XIE#Qs zA71X0%z;36l4IYKKLGg3&!+F^Wiq&Q)vWJL9ud4@bGpw|m;er+Jkj^m6$b)ZNBiOn zG2lLh1AR7P!QjxA{e1-h5gW1cUdnMu=K~etu-iSeaFtjhH_p{Dfa2q3|_i30dSWx|IjoH$cS- z)PEb@>vz`zR7ic$D_da({$HEh3y7P7%3)w{+_f{H86My3_SOgl{qFSkEE<9h*KYMn znj3%z9KCyg#hwJSOx=3pdjDs=>s{#`(9{E&n&*2*@W;U@CA;3#Djm>S%A!|9{3vKB zY}~7MRU6b@*6;nDc?dL{)aebKJOKI(9PBMSp#^5NtMz^e)c_|OlzadA)X)Fe)tf7` zAEXw@^cJ|Og3hlcdV_OSz_k?7-jS(2U~%k*UhxyV!H40iJ!6O>7zix(kSM$UU*=3t znYcViy20xyyd(>zI}i7`r|bZ`9Qt}H2DXC-%sYG9)TP1rldU}|fs)`h?ZzItLJ2T) zAEn27X)9>EtFq_d=`EnBWJynL=w`4-_)Cv8MFgx}$?K68+XU9mzV4~B7XrIRU-cY$ zx&ajKOX;y^t^+NZi9Nez{{pGhCq3EDe}K(Zk9vAjR)ELf?)A`mmjTs$xF=xG6407W z?D^@j2s}#(?rD5A58REr-Sc=*0C+sQ+4E=bEZ`I3-lOV04TKV%d)6{1fx@7RJ<)>` zz{*Ygo)#4z;Ou7AQ|B=T&@Y+vU^BSDm9qvtt-Zs*FEia9uEG$IXQ17a?>qpIk7@R3 zJ?8+f2UL5mF?)eas!Bb^QaymTf^1KxeHZX>yHwBq$WGwrmMuMMlny{fNVunGeLDcI zu60|SZUdI)m%6=43?OP!(5+Y44CrzB-DQ(>V6l(e{Y$+OptJhBxt>(udrMdMqm+7} ztby6x&!hkyKbyMw;2e_Z)u--n zYGr^~%De7Ww-R7EA-j7qp%|dVq<8;)1D%A3 zZr`krfJ|^mcXDSQ;CCD74io0KId*3i7$wI>A#Jz>;+P9hng>*#m? zGEM@H9M-fjObxG0g_@9pe;?@n_akCGAT+!7oOXUcFFSOW|?{FWmSwGW7gTjFFKjU4g z??M3U-$Pw0oe02N?CrWH3~Ll-Ms;g=6hXN9(n?&=x|r(CwIV`M(mPcy8&4Z!ClMi zT!G(px4V)wT!34Yn_Ux*SAppo_pUjD6A)GH-1RB#5^(0{#V(ba3&55t`z|ZqIbf>7 zs!K)E5g7Yn()CH#9#}3n=$dn}1NN5dc1@r*fM=O@S5meW@V!*CYq{P6P%l;Ol9)6D z@=BDt{^e6_OJuvQ96tm6{Vvt@_=*ug`@W?M3m5|V--WxjrJVxae*eq%sL%&Wzb~_W z2K0cD?{jRGjk(p^klpXQ4M=Rovjgvm19i+h?ELgCfF$b{JNx@)AeimVc3_GCylyvk-jpx^^j%?B zi3$O#1LxV1dp7_>Lw0Nt!*xI@*MfcW@*4U5xG`HfXq8;ZKglkO_)Tt`KE~dfu|(c7 zcZe94<7+ct6 zf~>Puh`r)8PS%uM>wFzBN3{A;p%vrcDqdJg$r$H7j`cUffdKDADZqF3ZcBg&mSDl^DR zle;>TscB^Dyi6yPnL>WDD$!Zf_ktWGw7Ju7>^b?y){UK2vx#J!%pX?s?|5>m;xAU* z#yE2CzFC&o)>!h1LlZ20nHch0-4WI<#VGP|BM$4cY9zVSlFj;~^^lz4*v9&MG=l7Z zmCh>CzfZpES;tZ~4kNq!SFubiLdYn#l(o|iA%BC4Sg+1Od8S5#~a^cFdM_IqWJq$jF>^F3gFXY-7Y)A9jh{e@UO^8+w6k?4iR73pq#r zdix;j0_s4vCaSSm@L94TOqumBmsS+Bi?trGCdVbquyTo(n&;c(lC?8aK`fPD?gjG>thPw!J?_ZeQt@9X;HO@D?vY+Urnl+BzD z`^(44FL$y#Hl5QU$E&t=;B1eOUml@%JU2f~rkt+pxNCHfENoZRv35d>eEn)^hsjY5 za?8!4j#FA{WLNCRjJjcGxNGC0E8|b$D-ACMTt)bsXKYn;iM>dB>LxisZ!N zrycxdd2$KmaR+-wmb}ai?|?>kkk1dH9n9YCt>U z4uinIq^}Q*I@~<|kW8QJcj#SQA&uqgbW~d`liqwi*s)3f7b%pY*0H9!K*Dz@cYIKo zBZYByb!-!#CB0pg>Cjl4BJnnD>sXxPlPqL6caS+e(s%WZ9R5|vf=MHlYQ1Zh zu52K+7-qNs%Ow7FNN*o~R!g$>OllttttP$4#RFO0yqS}|8DoB+{5$!T27jO7dm8C*i+a0pX$tB7uu8lC%NL}@C53jI@aLp3@ty6QTZtr%y^`%( z4)LUMJ+XEzou{N4JE8XfFZ`quk2U7mq_IebNqEKXa>380lSq7qi4FgygcwWGZPQqYWauEiV!c-_>nN?_Uj%bO>2m$XmFhr?oMEK%esnbJB(oZKk%1DXA<;lld=?`t-9Z zlfA`=6iQWM8VwteqK0IdE@dZ41*=lb0|_Tcb33*&3vTO@9JMzwr%jKMDAwzkgYrj7 z&R)OU9?u*mZGz_8c$9;r=ESMCwNx!q;m5JIdW;6Cpkc7h##)U;AL?mCmG+S~u64BC z7O0Re$}!r+>-LZ;b!crjQ! zaGWU3JJGhd%q3cj=(IIZhKVos9c;T0KSTPm?TYNYk#_IhICdrs^6o?4w+giT_R1t59HnnCPuOP;& z*S8w4mJvHGf3`lWE+L-uDQnG&EGB*p|Jv$v{wvWj=TqyyEV5ATyVh-epNZ|m*{us% zABjJOGFoGAK7UbGG#eove+k8kD8y&)dG8QuD}IF}d`{-9L}&L)cFhPGOpWD-*; zV5_F^OQQWKzO}MGji?}cw^br4g(#%y-zw$!f+%Ktqm?H0oOs~&^;QFB0`XSV)mG1E zam4Dp3#~?1V~Ho5&$hP6#}H{VmaX#L{~x@iOtv z{B)v(k&tznDC+u!@!sts5ems?kYvvj#dF>;R$Cm1B@LMjy~wk~`%|e5bu(My?d{JQ zO)FN!ApNI|gI_F&F>a3;X9CQK)Ua@d*gg}Y>Kl~txZ8;Mf=*`qj58!2oWn9c*_d5v&f zrlZABW0f#t*wUiHS|&8yq_&iW{~}bx)U-$(Um&!8`_ZyE@v3FsY?ScsQ%Z~Z%rN0mS7M7@>L4LPD7Hn^x}Wg! zaAXTK*Gphsz2EXWy_<0G9@6s2hD}J%Bekf^cMuMBVp{H|GYMTA0$T{yt%R&YzAZX} zX2RpEo-H{kbi$K+*IJs*X@t-Dms>tf))QvgjxAQtCz${_%EmztX|Wf9`i z1kJ5WF9~&2esgqcI$_rmw|UJtmGF4~K(pG=3&O68-Oa)g&k2-}_U06gM8cE&=H@YK z9D&%=&^!?kOMt{`n*T8fGW35m%YJ%H==UjZHa`D|V4PUcyju`KD6Rg`{3Y%_;j$pN zdHu04g1E}7W}!BeFyxrhT!DcJEF`h{s5D3z&wJAB{Fy|M>wVO$e~v)7x%GZ?^AwiA zFhH6Wqk{=9w@J;)2ksEor(l}9>jMZBYCyBSk3Zq^XvllzOwzXL|z9RHa$f&W_NBRcL-bY)$aV+0pzHwj^w2ZEMcn zX-;Sn6>C2I(S%TVN~k&7%9v0Xu-25oF(kC6FEw2to+3yx1Wol4`h?pXC!6MTbO|H6 zqfMQL#|W_BKoh3z2;o>tcT>%+!vxW$_9pt@1B8`zElp90nuM*#sZARXs1po*YnqN$ z?juAd|7eoEyqEBcUffhTzK0OHzOZQ%qC_~Lo7W^Itw0d?y>4pDkt1}bzG^yqawnm; zC8Y^!+)h|0{H)2_U5a3OGPY^GK!T7N7}<2?{#Jr==KZD{JH-g)9Y~YL8xaC|3%M!l zq%h&)8EjKKbpzonKCr3c+B$;wJKrV`{vZ4cj%QObw1S_Mac!#Gx{UX*b!v)EUBnB} zb4~yF6PZP}O=n7H@xc@3O$TkK@$M?dP0gKre882HO6c#NPw{(szt9@PnV1>E|%bc=z!+y6K-r{HpR4o&SJ}FTOfPx0kNR$HflPZ>HAb zAJ_NLkE>PVv)8fcr5`Kt-TDmrZ~Y(mqro)#bX6%n_iZgb)%H97)L;dDecM<3)UFb` z(zP%6%8OsE9o8HSU-*K`}Z~eL-2EYb9fH^ zZtO~<_>ODi}nT6n`_*p97x7G& zw#NP6&fz1I=#AOO9PsWPb&WkA?eLdnem2q$*x+wnC~L&Lw#28$er;^oYmOH*eQF#{ zGr`{!f8Y2;&KSRJm(zGE-VpyGGNX|wehQB?yl4z~Z~`AJn$Re>UKfAQDy9(zbnrzH z4;x?1Y2!sGVT}O+hwvm}xN&J%3%}Wd*l6IUfiJlq+^E;SAOE=KcH`JtRXix<(|EB) z86Rct(TF$LjW4_J(&$*AfZtkssj*)}9uEmSHfm+;#Ba5rzY)f7#YfucG`jIN<4YnBHZEKj!EbID!9HCpVl04LnNL`%OtgTpJ$ z(Qfum;)FdWX+sVZxT4Ha+OEnmT=>WUP4p-iN6_e@<-Z!jMcnS7ZIvFteamm5sf6|6 zL^tp^F%uWP?hEa5J_CoE=hI3Rn{iJczM*wS zHsWd;GiiBC4LDh;G}IH)+eY7r>r#K_YJv9ACF*xvwJk5UQF^-+Sou+u@5$-Bi zoR(Q0fm=ExO6ym>k1NJ+ps^l>;$D=mQp2YaT(a;lD*qCME4QDeZYd$-);*h`4(=x6 zZuE^%gYV&RV`}}>;?ZDS^qnqhvE3cq#bPG)?#BS!srAiNj6^z=_#j%7uaUhm@(9#|!NrEq5cxl+qhb#dMDSEzQsb#Tvb zo~OoMIfBD|wxh;;IfTRfv7nku9l*ueoS_y5YT#NEPf@!X_T!EZ9;bfauZsJ6Setq- zR2k<2YEobJDB+arRjF@JDBw2j*iF3^Cx?^plA{jtci>KZl%~p9ZO4VKZl$ihl*I9E zM5r%+i{r@8*Hiy7htx+_8YJ>Waf>>O4Q$~}xY3ZA2Dj@Qam!7-hUBm7aEFve8lFh3 zVMA|o8Vr3_u)n^u8#2q6uunvp4V5yBSnDfI4bN}SVfW_NH>mxb!R}u8*$^Z*g*7xU zZwLySzyk5#8q{jWu-${78=lK^v2Hpa8mfYZuhhCbgmY=YPQhV7*-*u8~F!+MD(Z0kmH!y6A8Hv1B` zL8P!A`#dMGVUI8c`(e?yVcMx0J80$AKzdV&J@vx1;rntq_6yIcq0qJzd(QBDgHK8^ zRy@Y8fiY2p<#Q|=77PlplSj`qFdl!xO5Q)!;M<*tz0`5M;fvOLY>9?;Ln-+U))dri z0P1tFe7b6bU}qM#Sb2BD-kUG~Z}F9D*ix8=Euu&_!W^Cj&(q6jBng z`IYM%xTA4c3z^mW+s9+EYrc#1Z$hH6?9!R~^u|bR$F_-jd%1_$1@DpiBJXglUNNV> zJwFWlVry4@{xXVH@?_SZF^91=MNRdQF#tANtf4--lZYj`SJ&I@#bd+2l-K{bjlq7| zTwKrpatFJ~y`aAJPXLzu~(!Zj4zhr{;IyK;|BI+QA&OGZZB-=mS^?< zcvB^wvGtyLuGrt-BI}*zow05b;q@C0u3!gmp!I&Cm#~jY$@LHF&SNh~y@61E~$v_3^d0js~bp?<_l z4$E}>Q#bZt2R82QuezK%X)Jc5pl+9lB$nXDud}uk$EJSc)*T5K!;VM|)U{NLV9y0~ z*J*AL#`aO#>kQ9qz{aSw)QKQ}F`f{$E~<1DbA?q?*RZsVxvNuASE>68^FI1}-CfK) zX7hMq9Xo#(^T<5EZiP36Ir#ETU56U~e@aSboxj&Oru#}--M2I@X0-5m-H*;8%nr%8 zI(Yj4#y23UZqdFE(_J4?r}3~GgV`TixBX`)=0F%&_id#eBg(_FWL=ErO9SCZ{ zXua^STgjzk?kwJ@yT_qoSQp*vD6;h!@6XP4RgSe7sco0)@DF}s1_K=GhJI9FI;hrl zVvA*%Ne#0)-oX-#`h(MT_q@Mh?vI?P>v-`6BV?{qH_-eU^E&fj-9Oe?;Cl7C{RST} zP97?Cu6N&Jyebsx>~nH4al3cc{bFZfhGEINYZ9+8F1=!PMALMPz)-l(o{)mcPyI{j zeVc@dUR|c_?@h!!ah<2AOU7f0%BCnorm>hmisO_k_-M>6c!(1IIuf(g+e-;xKft^< z>ZFKo3CDzFv{HNx!!YD^bP5oNViG;;C|2nZhWWFKLT@5tPV6hAi2o&E%EP}>gtc)P z-_cK$;_JbfV>a(8sxd(r)%Q6R>+;)}6XGu^>U=*;(4AyT#V#LAJtKi4Y2%HtJpP2D zK=iPBFW;lMwYp&9T@gyc-z%7m3KAv!;AKqHUMxl1`2t2cB9Iav?udCd z?o0Xf`7Gv$y%!~-*9J5B$(6EmvlWIebA{q@+#JIoou_!an_!lE>?q2SMi_GwOUkn^ z2AIN}GnCpseT=1;0p+8p9%eO2mvUa`7^b65o05O+2!^SzMX9-e2(ys3j}o7!g*mlx z4@I#<9h2!NPjO${htY1@PPwMG7sELwL6LIUgDH3+N(sR$V&47TKzW-gkEy-+r#9+8 zithWL>Msu9cuOTEnIRz>vum>HDjxvjbY`^x#x%a0Xl;3*TSUvQYJ8ODN<5Gu7?gd(7 zm!f`h#{vzF)yX5=K7p=ru6UUH)3T(|vFQtU)j@gVtHF=lbFV~=khz20 z={pJV_1SaoV8w|> zryozbge3`$c*n=wDVf|xazGomew5z041Av}$B-I%hnufIRe>7{} zUEtE^^qadU&v7df-k8mfXSu$8ugt`?Dcri)XXe_-B<=}QoB0XmI2W`EP$i>_? zn|-nmbI;GIH8Z3Kxla=-%@iY>yK_KmUi_57?F1E@vp-O|*Ug3I$|+>-k&PmAzGEEs zm@wZQvpAGh9}YlgS&=Gt7Mo6o-8$vrcLWG0X9;JR|L=KmXm&wJozq)Q05A{Jz3 zt=h`1X^1j!3E9jY^xI=LMfr0BrQznOxD8yDQ>gj(KSMt9LZDfFdKK5=_eQgOjt}=e zV~u&2Xc>2?dxd$W){E;F<7K{E@4;m^xS2g3yK(#d7n(QpxNuJw+M54-b>fD(&NH9= zW6xc2ahADpt}S=t)M;ju%X}_Aexl*rdiI)QTP12Rb$4RxVxdRaZk8_s9|tghv3dqiqbZ>;8|?7}rP1y*w2*CHBjgz7o* zo4^fABea}lCD9G^J!;Oxvb_z=C>3YCAfjOfP{DC^+Sb5>$~gG!Ee&l*F{f>oe}e%l z;NX(iHelllIL_lf4JPs}&QGp)LkBI7GyY+5Ln-qrXGxrM!*&{+=N;I( z;Zl4i=j6lL4bev~aDw(sZ@8Cmj^kmTtpC3+=^HXu|K(^h2VU{5KJVB`PRWMP^^?br zaeP$+^^1-ta9WnXt^aW>o^x5)S)YE4%Sm#3UjOnai<6!AsJ=Im&S|o{UoT6baJ;kc z)Gs?ixiVDO9pVB ze&f|!#YJ) z9l~iq9j#Y|Z{T=B zf!2q(`*23vV(YCJF5_H1u)qGMjTZ<0AhQ0=Y!A-PePQ)IQ`|U^mZ19lF=tNpo=x@k zLynwJ&FkxT4%l%xyI0k3=(gdw{5$2odODBuVV7rpP|F-n&t2DgSluknhWZf^Nihe{r0-`h7@cRl_a`}@CX zMh4|8dwbM}x~<4hZ2iCKpCoFK9TWSy?p|0w+xF?px+4Ex_BiNi-Od$n*t1@=*4=jL zVh6#S>x$>TVqfoUs5|zjoxKoKQ#WaX3 zcT3&p9qH`r2mI>{YtFN$KU-TD=6sfY72#WVZh8tk>aBO(+0Q50YpL#aAf0O`@9)-F9>ut@9H1ZkG&Ljw%fR=bt922 zm3%khUGePR)n81SX&Ck{{d-gOAcFlgq}O!%A(VZtsmnCI9K^;%zc6jfk7Z+DJ~nMW z6U9D{e_;AZ*~f1G*kpnq*v;O1xZZST<4*R#pK23z;SP3DTDi$`GL(JQR%0Ue1hJ*J zm8O%8f$Z1IWTq&206U~qVCv4?$Zp(v+q9gsj(zCPHPb4ub;uTVC*r01XJ06#==eD!Gdq+I@*)w96TR6V_urR7gIrM-T^Qmy?{Yg6@%)mk%F z3%K@}<#gbCZ7jEqmDcsScHX}GEDz@U+B3_VS+6JF)|O4V!@85%RV#c|&w94#MeSZ) zEz3&vxK^E2&7uZBsC`7LWPN$iRI3Wrvu>g5YaG_t;_f`mh;MJ1};HrMVBPU3vcyONfoG_2qF`hLJtB{ahyN zS6W0ZDxAi`xoxYxmu{*37kOb7?)0zqHDFn39cybZXP{Ww9N$_U63(i%SX!I2 z8p3kCCOV=7qBu zi~rUHc5Y*J>c(rv6v3?cy(2XTk8WZ4z5P-nkKDvsbab%hmV+N_wavSl|C_=@S$B<2 zy_$6=Q?6Px;(iQdSpS-JlMb6zXC#$-Rh?4#go7IgM9`=_I7+(mDg^Ldb(L24HhyCt@U zz3vtB)w6vyr9ax4C%BO{CDl)uk@Lc8Xr~`Cx5|TRdLkb%ArYHu?C0HM-s)LjGvo0c zre)Hq8uhgXCeLMg%|e8Ui7NN3334|w!-0!x+r%q94Z201?xF`>>HW#$#r@{%CYJ-2S&t zzY%f#22;JL#|R9%#ynNkVYHmQ!c2s>8;=>YnK#BC8VgTmGJEq{j5)y z%x}+4#{BBj%<_aPWA*V+|M(^27CMpncu|J&|DN=^np9)LJ2bN#lWbJ;5lr&b z<3=eG%G@S8Y=kZZF~cG_#yd}9n9Kp1@!Q1%%(@Fi8qnpPElZwY?EDwSnD85Cw1m8>o;NtkINJBLy7TroMs#LdH97h# zBWB~h>XPZ77{_0kt9AN+CB>B5>ciAN#(p0|^@!_R#>him_1e~MhB>jMdU%#HA!QuV1FKVgL<~P%RP~*99>aC+p6Z4(w;8L-!>g0l-C&UM zq18V+uQKk>+fwa&;R*v$=~w-KOWcmQwz}m_2IGf~Z*@Rs8e^K#yBf18m9d%XULEl^ zg^}mrQvE(NiQ!pqU%hM7amF*&{AyxP0z>OMr#dtvo?*BQ|}Oh%;F zud3klG{*ghBUM)G$cz(7U#qUaATU6yK2*I)#xkI<-c|LlKrvF&URTKdA;7BcYa8b@;}5MicvH)zjcLj4+R@RYN_# zjDd&QRrgYtGxRCxRahTyhI&J4mF~U=<4NzSsyl2qhUe8|Rab3Y7&mqvuJSB%WCV?| zt7s5AhNXg5#T}o|_}8DT^1n5g;c1Pn(g#^Gm?n7DXqN?}_aLZhIB6Q=%+ly8h5KLn zffswKJWappJ2E1wK-e)lA!J)s}j?^d{0-Gp}0Azcnt2|r%aM=#q{+2*#>jXSNXXzQQQ z)xRyOl3Uy8t?DUN0Q!Bp1L?P+cUCh!&Gm<2y||IS^wE$Zcw0UF^SO_PnVmKC*FpV; ztb{81#J4ww|2y(K%=&jb94M)H2 zp>ywTFsw_Bq=%eaZIC*J(>H~!Fuas+qa*$-F|=$ArYj6?hGP!`>D~zo4Fl)^dh=4T1%$=vB1ohMB?@^m!}(RIb>tl%C!dbE$Qc; zw^r6|nn_Q))?69YIE}6cnJaI`{-s$v)K-dL|EA?Ut*m4)#%N)=y2@{3BQ!T)No7Fl zFwM(eQMq}+7aHiPxN_|F2bw0AS9xT`0BsBCW~D~kOZ(z*wNe@KhW4O6yYhcS;KlXy z$_~Iwnl&u7a(?$S8pkEMavJ3^ZL;H7rDnL5rq4fI>3O_`b`!&?JTT)fP2owe49qgq z`g)0#ZyoAr`=r>)-33NkHw972T4tc#UJ0&@E!NY{eTl9d@z>IBmF}$s8cS%M@jELI zhAU~iHgB&y&{9Zy^LuOMV2p$&t_`T%{z5>@IkUbJiY}lPN3N<|^X?{X)M|NU9rZem z{Lr(~?rRRs;_9MGulP%}Hkec8@K`3Taj|XX$&(jo{k?N5?@m2O+bEw^`6%@?P05;8 zdBgG)Eyi!MVsX}Sn&+>d6?mIOnw#lc1u-X{w)5QQilvTR+KqkhE5vzBnzLPR#akB| zt?^}7Mb~W-Eua6Q;`(9&jZc13VZ+DJ+SasIM0z4=D}UUr2ogeR8e>Dn*CiktF}0=w zCyJqk@2{-5;&p%)<)Eub5$&O!>ng5T;}uC8l*lV?3U|;FS>g(_=Qi5LO}q*fKZxcs zdH`#BX5D>vG>6TL!x-kEmeEwSS6bVnLVg{|P7vZbLD5f%Qwt!Za= zfGaK>v7$Y-j;XjcJc}0dYHtODF@yF?va@2Me+sRQyS?InKjKkvPz9u8och;tQ-v4k z2Nl-7zCzXdjrvBos^UlFS85J>dBq>oN9w_#B^Bnt_tYdyw~F1GcT|15Q$?n457k9% zTahj7qAIxaDxzIpQOTjRE7~r%Q)A{$udud!LM3-hmRlvaQRVWn@}?gx)P;%P%eOP{ zQnfq3lppIgQ;#_emLG!EQCaVL%YE96)NE~cIWOEm?L7Um{7I#r3W|MN-n2$b{q5OS zo+v7zwhlL!4>~ES59-Y2&Y6YOvCFmPv!+O>F?d6H*&zY7eM4Ef=RiL7{B(8sKKM;4 z@u{NR|G_mXM;yfdk{oUfI~TuY-uKVB;TF)NiCX3Qvu z9ZjLavd@(t|8SCe8<$d!L>!~e^*d2M(Qx-8_j-x`Cp~{Ig9Chk1NO{Oh6!pb}*z)#BIJHBtzkIbGOtm_)t31pb zKqc?lQSNjliaNYFq`c_wUaIW-=JG#`UDS-b8_R88g;Q_kuPN`@xt;prpienh8%zz` z|x4(SK>Ia2ATKI$2ITk0^lUtj7zpDJF{ zqc2OdqNdL5)F%$lqF(84*Z+pipgzz)(g)Q~q55av*9ZGfQtpwP^plszDVf{q^(V(i zDJPtb`YP-Yk-6qrP%|DHQQnM^9wule0eX@!dPKDalO2OA3X z@9uO`#^>J9qgK77#17=>uU&pdd0BT+pZ((zCF}MD{Z2$Hg_UqtZ>+sXIT3qG|J|#J zQnC7&e(-z)#nbYzzTjgmrQ#i1Zx>ZfIbovdBQ+Hi=53;Wi$fVDGZCx*oKQ-60YvCA zuT+$n^{O0jz&hcC;Bxv9;|e<1YnJ{(gH_b}l7~ z;_~!i*{ZI+6hc``+2zf7136zlHf_PYKH@wwZZl<<(vk06V7)=HNl8 zkG)t{#au)|2V5xYYFtS1aXDL7s{JSj$m&nYdHFfycoQ? z4F8~=yexP{S)IodGQ!)dtmjZ0xz=iNndwdoIp+JqGK}+GvTcW5SqYPyDu**~f?0E@|lfFT`Bq99*&|EQ}N zm6CtV?$^DD5Rp^Az0s9l<&ncWJ9Ln~TjVu&+I4!rJn}B}BVGHMT=J!x_jUTmm&mhH zn{;5$EV7DSuhX+Hkdxs?UAr-rd^(~+S8jEhtX-$oL10N_+eO8?3h6O2Z)tP6b z$X98}x&Z);+z2_YyH@}rdqo`4F$ZJFr5m`qhZ_%&nH~(?$jLoqh&5UFzZt}t!0Apb z*g>xNfYiN#hmzO6gy<~9TggwGVs#%rZ6X)y_v&P9sJ9LZgtRinc z8={+L?L)qIC{QN{EhV2P_~~r&J;{dvYjvC7xsfmK@YQ*&bRoakxKwwS>qw6A_Ry`b zuqBV#yXxS7tjVnwj=J!0tACHLZFFBQ%p%YFS9OB6O(#=d&eWZ;pF;k9Z>o+Bn;=zH zPiS2W#z>0dpW5?pM@Y^5Z(7~5VUlCcXRUztnRF%fy*8?NkQAKQtF0OCBRSE#wV(ao zlHAcRwVeswBuLCtZKmNBsV2NlJ2}x#0&c#iT@(6*ygq%n(JZGKCW*et+lVx zM$EWNN|~+K9*r=QrcJ7~%yTA^X1GY}*;Gxs+%MH$pH)fXcL=l(BFji!4{vK5&Xklqg+`USnDn;tiKem2 zg;b_*)f5ank}9;#n$64YNFUT@O%8HCX4|0npmpIxIRWaEfi>0w~P=s2ySaG{~01K;9u92t^Z8)At-31WfG9>Y+*?k}mF&}y z?Q}%0EKYiH+)w8mmb@@rrhh#&TsoF|=cN;)@7icO0?!ed_pLNbNT-R0 zhch)RuOtySJ)5feVLV3cdpS{hdhiIbzWZlsoBbi;!`^SD-Jxuv_2B2yVj7)z;>-Ke z(5qyk%SdnO|5n)Gcz3C65JMdJ`?B<;9g^rc^I55VFqC+B?!!_h2}qn_*HU^uJDS+w ze5aI9v5%gXxfYR`q{Tmyo@W_wW`!(!?U=fpyj3O z0gvJm@JmW(#6O6WvfWDaa+~8UPA)9{s%wn9nr>G*>sehKIM2GYXT%t{OKMqq(%uk9 z)6FP-wNW2utpBV26|0Hc_UMXIVv)t4dlyJBhF(Bwz;+y}zAP4foS zqaO<5iWj~8mw>tz2VT{sp116J+}fZQ>YyDtae@1us8?gNNh7c;@&Wt)u0>a z<4&A3t24{a#O=9Qt4@7%DsC6gpbq_fJT5_9rmmiy827wRt^Vy5A4hpoq@D=j#QF9~ z)&DzjZa)R;@OVnxcFTNq=Eb1K@%>coZ1- zgmhMYz&a*w(XmtNCCm56UC%nEt_a;7w?lAPZ3B&n^C;t}eL36X)-==AGt+|Om|Y~b zgclgsJ&aS&EccH)H4~*?(Yih^#ucib*S9(jv<{#y`|T5#9&tdu*mham5PY|K&x$2+ z=Q-i(%^{29qRxe?-veCYcHiEjhEpBm4r%<=*-5r>ZFkqH&*fOhAz!alhZfF>bN#VQ zZK$3ZH)q}w_1ME{aVx#u)MM}d5KeAgsID6OMVJb(Q-{v|NhqUPtIxTAC)_@5slK$~ zD?xj6h8h|1kuah8Tk-)iKseI!t7HqUm*Dwsv}FH@*MvV4LnTWtb`a(|ekw8Wo)h-1 z9VoFceL^tqdRwx-zKwvvca_*YX(4Pp@uH-(w~4U%+LIE8kp===-CDABhKca}UUP}J zeKmpGXD(^;svrbSF_i>w)DZ$*t4f$*Y63YxUxJNM5}IO4OB}F;1SnHklEo4eTrbE< znojTu^CiL(bNX$9e_ejb*}ObLR##rhOldB`@mEgC9_=Ni_O}xRjQmJR=VT&bM-#W?kmX?lypK`xzY!>$PAM65 zXA%}IA(S-vQVC7l&?QuVB0-FSl{^T=5wuCbl9Amg!bpBpNf!V{AQ|_Rq@zFttFDNW zaZ(JSXJT8)O3r@5;G&=s_oKTBOM*9*w5LQ6E}}M+M5k{jtV~*6l657R@T*`&N!HCk z!tYwIk|?1+VNK8ClBe?Zgq&$EC5uW|6MVfLN|smn5WYv)l#JFaC444Zm83R$5?s<} zmb`3nBP1%PmVABWOt5U5D8BpLfzUGivpBA60l{Sdy}04+JVO7bFU9W$ED52A!Q$pm z7KG-ccg5V{sf1MF>*9{lNqqdBSH+gU#_?A_JS!fb9K{bBfKmq%D4J`wB0%Eh!$bZ^x%?RupR; zAL9$qlH%>t;c^HyIkzNs0RPrJ*zljkpUkP znO2;)NRQXC&J-VCq`@PuB^7%uD#rWQ94*drRp7Vx#}^x1r1)fOPO-vSh#v}|7o!&z z;Bzpf;%AOG@zgY2@qCACcy1}Oc&^f8ju++> zXWieASCm;4N8H(s=f0g%Y^sgG)8Vsds+`q$vgd16N`?=C94mOwu#e!DF6yTh&9=C9WIZqO(QC zr8whPSv9E~F%J0DE%mA-&;q;-&8SlBoriC`QK7oA-4btV)~fbxvcSI^FILsBnu_1* zt58jNPU6gPiE7+&9G9HIR~f8Eah&Q~s?aIJxGSHpsm_ml!u2n{qRM&y9>lRQnn_aRL2FDw6&M?!v-js&M&J-2AA_09_1J`F%szDb9p^&e0jS)s-m zT=uBO7bq#znZ-6Vj^lnm zwNh=`l7MrXJ4?k`eh5d}F-`Tq4f_7rq;l0%I<7!7rc{3>;m&{ft{i)b$BCAFRZhQy z#(jf-P(CSz;|}NaDarX@+{*iJlr?FwID3mu<*P#naO*;zD-Gy9xa5S#O4RP1xap-2 zl#Lt1aFrkKDu>)ca3XKB^3AL*I1{>7nKSHMw(aS_F9)JcdC4F z{=1dRIoFor0B2>&D@mR>ajj6)Ee{LWW?IpB=z3AmxG4{*ReIGC$MEM9>7RGh6W zx0r_u`IxSJ@o6^By!@Q9`pFDjQe29XXqbYd3r;8>^Cz$w-3iL+=f|+GT@NY886#LS zjHT4X4q=yErz+QN{)Dx87NYI^;fR5sKxR# z)+u`i4A@^SE0y4TdTiR<<;rZO2D@kf5@puKV(hkyZpvtm0!wXMsC*tH#on>8S1#Eo z#DZhzE7#i>U|n6id?T{VK?UgESh@c0`~Xo zZ$(9*RP2u>Uy7XlQ?N@(gGKx7Ph!*L?~1~|Ct}?{zb=~cI3D|9T}M%}nu8sTZ!c=R z$iObDd{p$m3wvhreo_9OIILUP-J-QCu-H%M8j8+aAhBOsYKnw!A=sr03`M7F0oZJC zS<&*_QP?%N)kT*R_hP5KEh?%7Mq+2JkQJ4#+kxHA5*AVChGNya{Gz^rE!f!Kc|}Vb z0@QM5Mld^Db`||uGla=;2rsgm`3d8I4K4c8Ie=+V zY$?jp_F~FL{foX`c#V0wZGDj|wga;~b5)ULz;jIT^W{a=R!=ZAFR!AFJ*^lxdvOs* ze-D#X?y;|}KeEQg}a*m_JH(5A@jSA$t9uqv{*G+jW zHmMMuRbe)@k11wB<(R)-BZ~DaC79pbuL}1+e9S7-2gT!uw=tKk`xSdcc^F?*k0R}G zE@rH#Q;{Bd3G@5cb484ECT7E)CyMS5=P~&=S`}-n&tO6Zn-x2=PGM{V8x>2?$1#g8 zm=yJE5-_lrRf-jV4`S~7lq&#jEX<)}8bvsdhKXuXDaKhO3}%sBaVP|j5i`Y#|4rb< zwLC>dCk%7n=9c1g5eQR)zouAlEC$o0yR0DY+K;iDm8Cf4xEqrTOH-iVg=6+8&nTv8 zwqgAKCMoErf-r#CV~U&mHe(7UhZPr{{V?msIf}^swU{sa7>Y*CO3WKRSz&o2J_b{KvPE1KY#ctc+ErT*8R&A z#aBL|Uy3~yrxEYbE)$Csi@e{VvjGbg$3MMBZz-}<@N^w$=jrnm=_j6}*C6I70>hu6 z6SNkJ600`!538w)!N>Q|^0*24;Eg-zE5@Jl5^OzM?f6~3b$JbX8t02V<8viCy?IbB z)Rv(mz53)yM@!LxC*R23Lse+p^A7p>8FI97{d2jtS&TlA`B*N!$VWR2JdmRSx6up2 zn&q8NdFZfwv)sKi2VFQ;D__CSMu!8dTy735lXA)07^9L6V?zkxru3(~XZN4TCJVr%3Ub`%x*h)m-`JO31 zJBdXrW76c0YLMtVC1>P)r=Vy@>r?WYZ9w#G#xeQ-9yFxou)Mx*FFMkfEB~AliDq12 z$h)`iKsUW7%X6oOqM^G8a+|s>XtzSN9FQDbuc$W3>-@ zug^ZY)A6O~Md^|9fIv^Q*T*pVqMwVH6pRAN`kk3Mw_%D}N5vQY9q0E%}Rj{mV`6(fte6gmRWo-1vd&H`&VzK;KY- z-ZpZJ1z%7N=dI)$?+>C*f1D{_e!dTNBx;(xXL}Dypq(tlO?0BBE*vkE>0h9(pBO3B za-O2_Jzon`eIKF-J3kh>y=y_;Eb1>jk>7-xx!`S~0Nj9*AL%O0oL`Gd>3mTbeAj@= z4trXtOV*8vY^!b(uTb{GpKP6E{4qKd-$ z*4wB@wz@(|Y98w1v68|ALAj{pw~9jJw`^459%}fQdShlTvslmWoQBJW;5b zNkly$Cl<;KSk%tPhYIm5BHyYQVS6xAW46|Q~;K>e^K6>d$7LhVYz720gwi)tH0 z7AimQL}h`Xh1UEqRB|1l@P7+ju{x@7*^DiyIXCwdc9i*}_%nAFLdfe;j6>TCZ!TPo zV!a6}6g96vN%wCqJb26-WnZ7wP#+I^ z7J7ZOMp1hf72do#2el}AVd3-LGf^{Z?Fu``rlOXunO`WAO(IX^&nest9!JieH?#24 zj8SCEiK&Gpnjxh5(}e6Q_7n0ua!j_}`aKf%;JZv$)r%Yr{wn)Sd5vr;{viA8(1CpD z-Y+YwZ%59*+#?HPKSrLN)+M{{+KOBo|3ao|YDO;TeySt9-IFQr zRU`id-I4Vku0U3n)XCm>=#a`KMwz&!1o`x8g>3DSBIHI(oh;cyhP->CM0Vqz5Scrq zkR`?!Ag{+sWs4WzL_T~WkYzMoMTYLrm(_AEBm3&|WCrIfWL-e6>_mMU@@Y}F%z}Ov zx!5y92DD2?7F;_gqgNeAg65ua!NQqU5EOT)HvgvG~tfPKC(*2L0Y>2cP zS)8y=_P+xkKfF@LDfUKk=*wjtF&;=!-xArpQCH+V>|)u>JSSxFD`(lAEq2IrAP3oj zE^Fk~hc>d?r{*AE?VT&rc+NyZnr6we8>S-X?3ga|BTgblYW_(1Gsh7QTYpI(%SI5) z@=@u7T|Q7Rq^Z`W8>i1HzZ!hATqE~wAUN-`@;KKSB%$9!aIU9w1hGJdg?p?jni`?n?g+6%klBvvkPYgxGt#R=T613c+%% zlA>_sh`TrS(vZIz1k6Pv9k^YL@Vu##LbfOn9xng3;pY+r_@-Ez6)!-TUHDSqf_wz! z)-CB(KN}%fd{G*BIs>tUe?i*kb{_G{GgS($JdL;~N|xpT zlMq8oPe`wQJ&HI`m>|WbA4c^09+H0Z<|5Q8mULe&1EF0FZ%i^bBBLvDz{3}>mw9B0IAI|r#f-yVUvX(Mg(w?TaIoGXoOu|nwN zv!wahS%}j0)1~UsX^8&HKaz~}Kk(SFUy?QMzu-UajY{&gqwvRoVadJ7VR&EXCrM++ zC-_>@d&znBdwA*BUde*#@8I;KuO)qi9q`nwb_u4s9p3NsSYjFV7@j12 zAUWRi0DfR~v!v`$GaOW5mXupG!msWyNm8zx;8tx_5?h~YxB*@+VHnEc{CMKNYKH# z@WTDslDhlZ@UtE1l23>X_;ujhr^#; z0ZBeh0mIY0VkBW%G4O-BeG;tmet2%gF3C>GF8G)B9g@*?;qX(GPzk*{6u$e{7D-X$ zR`}k`0Ey;t06cZ^2FYpE2KZ0)YKhDH)o{TMAIb59KJYW`-V*VIH$0!}A-Q_a1O9cw zRT5>h2!8aEljPA2C-_!xJBh289Xz1ITCzrI4X5mzBbnnr2mbhtg{0VM0Y7|rs>EgI zRCx59NpV!`1dPBN6Ym3$!HWGx#J1hvVe9XG6$^-8VV^J`#bcj7z}}4Zi=E>8VRJLz zivRxVfpL~}i`6Mzu(_2l#XhrN!rnwZ6Vom}g?;XSC_Zfe5Vj%dzBuw`3#`Q9uDI8| z2^Obn5JyVtVX+al;&|U0SYnq!Of9K|wI9}tm;05$nARF`afKQdBvXkegOsox+vH-0 zIvMQrOR@MzxCr*^AYaVCTL3GXds}R~?_=ycpBNg(;mmVmY1( zYc8XUt9vQ1#j#{@UR)eZ`2{Zy>chYeWuV0hA_8`B1zh~54-Atxg2b#6F!qu*p#$@ih2SnCR+KvFN!6EXChbYzEA5%m@fnwEhRG3JAyWPg-s^OPrM;CyiRkTPb(l1&B> zOfG@eTv{y}W-W&94fYYOd*ckX``|4KjB$Y4UH1@K)!RV#g)b7xHq3?A4m*kFiDp6R zJUda4-E?To{`n&RGk+kQ-*ZG`-^L+#c^tJF)_d^x8RXUPMj`mI8q%z)6DEf! zA>S}Y;UR?#0<^6Zu6GnchRix)MM?prF+nYy^Z5qkiLX+)6nYi1s9PqS({Kq=a9JcY ztj>hMB6z}$dFLSq#%~IbOgjTPsk$aS%SeLs;jRb~?MET!9WM$eLJva-Ef<6oIR}!M zoGQ$>Wk8zzQ-t})$&jdzCxqm8c*p`lqVU%~G-MtmUI;CNL3YgJ2$S7F5KRMJcrY~@ zf;dJNuKm0h60)8kECWVD{{7ksXI6(nN_lXhhgS$>I|MAWNDqWq&5sq94f#RlH|-a$ zfvkhE(`@>&jwAKE5_Tv!6Z$b*ExzPLfo;x`LPKxas=tDi8x(jIdB z*;--2VjIZ*?3F_587l~E_j2Lifte8AbT1)h-!zDO&0=A?dJ_CH(M6bKKMsDd(NP$j zI0F9tWr47%<0}}im?v}z{Ro~xvJ?gi`@wHKErgyHZ^5HoQ-n{+UEqkD6M~p~FTkzf zF~N;hPr+C0Mg&C{+rZfmzY5ZZ?tz=KJ_^>x-T`mkJ0K8f>%i}3_X@h~jo^ECx&`kJ zSAYl4z7mwRYr#8qvP1q3!(?-f@65W0#?{;uoEdz0J$|C?6lfn zFlXcsC}w1x;KIINpr)!-g2&=f(2+AM1OpR8AlzPW!5!cyP^z7WfU6t;z3Xrl^iS^v zC5fE`%Msn6Sf-s|gXSd&7cgI7Y55FP^mmRxfq4j8+dNa?q;COzzA{Y^HMa@WkNm@r z!PkRamjB|rR~SJThDZ4o^D03bs)zY*1RcoX{Ad2YiV~1t>>z*VydqGhTOWTeUJCLU ze8bPz3qW6Vo&51R`JkW4FZdpqJkZwtPx-dm98jh6L;k~=*`R~{Eqo|E9YoSL@l~o+ z(ADGy{{1N_pg;R-`Fg+!kkGY?&yXg7QU>+>&tnHcx5_pAz`ZQc*VJNuOg?*hG; zlEs%T3kQWfO5?vf5(?@ToaKMHvjt>0n9Q$t3;;da@$a&Vv>vp?A(7u&whC0ze~52k zu>y3Yg3X@|^a3TO)A{Yf#UMSB%x4cfgVwAi@Slb{fO@84_!bv!Ky6Rq{HdK*pm7

nv!#57Ywe%0X zh`X7cldC)UJ+p#X*A$}6j_wh@f%lo6ilgekjthI-MbI(8G-9N$s zw&Nb~o*U`Fj-X~<@eDH1bzvhfdM_S${kw@*dl?0cYOCgrKZgRh7gg}4ECvGE=XJct zgec%kf||#b?*S%lQ}Q~#L;(K{Zg{qS+kr=aiFo!$gMg2o^LV|+O+Z4~E#Ap#8-eR{ zuJhjQTm#(7&EYv^_yCimvU!ee-oPnqGI%|<9>D6k=Xr@>SD^0WX zFO1+}%SzdFEfu^-QTs2VVMejRU-wj9t%U&Y(@ zO#|qRTESbtz8J99&ztv!Ee9AEdhim8#elR)SKfn9Jix`bPP`%CTY!g6cD!!NHNXMY zeBKS|Wx%W)E1u`OOu%H~EZ$+yG{73nblz3;8NjWGzXhjnB>}=${VoW4aTKt^?q@;0 z{b9iFU*8JsV>kdw&zFLYS#&^1^M?ZWW)i@*w7=l_3_M`Tjkg8JZ72XMrMp0N918eB zeO1t+2LKGQ?FD7S2LP2@9~UrI?E#E>w-yYMA^=S5dj;DB+W;P8jRmNVtpJ<1bp??Q zn*dwy8w(~6YygP#l?BOZs{uO&Wd#rGRsfb|mKJ>a@1E1~7YBe!)?PxqxWf8wL3Nvj9*3O^0vO%=_eBlj#%`>QvPG;%;TAG z<2YV&6rqzyLas4p?%8Iu&1|;WsED5mDO8kDA&J<1-zN%*4my;hl!y{tqDv`45=BB( ze*OQvUeEJ-p68F}`Fx+}{XURhB!u>bt%y2Yl%4uAYy@|($i3ou*b?8wqT0T$uyBX? zBJDK~!#RN*MkDq3Am4 zVi=}AsHixvBJ4yJx+uK%Y}j`dqUh~sO;`yBTI6D(2xI5^6cNedu-a6QBHw&o*v5EJ z(d2bz*sXBqqGKb4VM@G1QHNPx*mc;JqA!FKVFqrSi(cj&3oF{Pu}D~bBrMs~w8;Ep za#*Ip+M<*-Nny>4Mn!ydd>D3Gzvxu@?l8Sk-6B|dRG9XAt)lxq+r#|3|7t9BL&L5= znAae^iD3y%GaB%|ps?`kQ=0D*R9Jr1geLnwJnT!!7tM=l-!PtRShKLjGwd*TKr;~r z3gZ^O*Hq^@g^iwgqk-4hh2^IAY83CS!nPiKuDQ3;B5Y6mV@;i(X;^i1hbB95O&DZ* zn`WidFzheso@Rf`^01{rO&aOShoP63GBqy&_d~V*7HSaN?uH8I^E4SJ8$)-`=4dj{-v~{b&eQ}y zzYr zc&FynBrg;@6sfsm#tKdQv|aNkfExO4FjP~Xlowh!NYW4mCqfek@tS*e$3hu{ff}6; zM?yyi12pUPQbO}T!8Ow^NuiNL5KYOp_|TMLFO7Nj?$A3UU`^bas8G_Vi{^Oy_E57i zfF^pJ5^6ner!ibh4Bhw5TEq4Y3LX6y3cTKl3Ozq% zQw##$s0|ywQC1CqonO^Q|rdQq@*R^ zQ}^UOr_^LLsgIoPqBxywP`|(Tfbx-gLv1?PLh0dMRc~H)hoYyrto~`!KskE0O07iI zQnp+?r(PLXLs@y_teTW}f#PwuNF7~rjw0(&sv&pIP#`^0^{01gis=WTde?6m#dD0S zK4&hXaAuh5+rC_itrksvCY(W;Gd!){mR>;7H_uh~2y!Wr_StH?>MY8T`!O}TGlNo% zNK=DG4^wUs52?TC9Hh)g9#E&*Bv4KyB&Z+x$5CJzd(@LrJ1LOUyVXNScTmy<|EbRl zw^GK6Bh-+~A(WEKTh)q(c#7yYS>65#Luu(Gs9P5i6mVaVnr9BB^o^m_055OK{RMQmYz7HX!a4#njB2DLV638k!Iotm_Ffqb}Yl{!9WhMe_brJ5j_ zBsc$9u3o(Ol^m$2qdwg_LSDXcsk-Ow0C_p+k7{P>9T|)Mr5alCn%o@mQ&nd5f}C}5 zQU&&TLQc&aS8+%k2 zQhf;Kk-t|osBZ6Kl5ux$sFIEplHb3&s`^xTihOnQvdTq~O>WV@pu%1}N?vPQp>n;G zN-lwys)n8&Bp-+s$TO*vUW31B?oRJ>-4cy z0Dm$WGfPu3$id|1H3h1=m_Ty2>nYWZR3te)_=Kt;A4i6(OJPv{hrkvmxd9C8|;%O~{$#-%0>V9`aT&r#wXzg>1Vqtt=1c zh8Vp4u2jV^LY6EUSH|ow2=TBRRZgenhLi^nDR<;#g@hmesAN+!LNL;IN*?cUNb0TE z$~gIfkaq(;N}V(NLTD?VE00yih8%KxtgOEh9U_V7P2JL}A;ZYqt_g?j*T` z|5LsSZ6{sc9ia@|c8`?E-KxwFzfFq0O;+-D)R7cl3Ce>}*GR?|IHg(iWzu~DMk(D{ zNvh9ADhGF!k;X2-luKiZNjv*|l@l>alA)oO@?xxn^cxOV`o-}{PKR8S@;DYrRsvAA z#ZgJ<=XT20xIB`JwvAF0cY+k|ZK(vu9V0a*nk!3UkC67NOqBgG$t1$#HOg^~+C%F0G*F)0xr>yMsHgn$K0vVAETRRjrPAf?77upnh_S&Qg zj~0ci^&$~|@Q%XXVxIV@tWhyx@{_1|cT+)I{he5Da$WJ=V2t>kT%&N(9VTWoE-E~i zd?W_8oL3mnza^6Xlqnj2^b#dLXB0l;&xjUBG>U@ZPU7H2h2l(qJMr^~M8SJ?kLa>R zs0ev>n|NgxSMly)9WhX ziL(!mDRwB7L@(WRg_y`SsJ!eWjak*b97Gbvf>-zR^znXeSVa1Zt0|a`Pe7Ilb~^V_1k`eFLzY#*!hO=;l+^r z$gLj2gN*}n&c&yM?{V+tnd(P`h^jYoZ+08u?_{t1es(kA6Qo;icixkf{9yl{<0#1qi?;ua#BuMnO`dx z^@|8@omb@KE-pc2a#{YafkE(&t&&5}7ZA)Yo|7Mtgz_VNd81V<0egonFJBo=a9GKZ$IgWlaFK=biNR1p z<+(gL=?Rg5pU#n=YzQJap|a$s%29-1{!#f>KAceX{)qfnmMU< zsQk=TeS-aOlKhxThY&~#mTxXtLMSW3%H;~zH}_r!7r6uE1C`H%;Z!?$Bfl$n(;I7f z!m$UzFjq_Yr=2aq>U?v#2c{_)`qD(c&8a?kBXF%8yXtx{G|yOWFmpLr)oUO>`?fL| z3S2HXXf6xhn6E7lJXahHd$mL!#!?2WUH{134oiaJg}-DUxAB85`+myyKv=;Dk11K* zCTegAb3*ohXdW=swv*T0$^T z{YthpA}*Nx^Mz~}vNQN<$TL}y#g5?Z=euMMi($bKtqxiKM^bQfbepWE1sB|W>2#R=DKXy85Ep#vPQPl&?z|P%|+S7xNR`a zyHa-P@#f%hVYv)ZZ5}NCc1BjpTOWLaSR{LMXjO1orBXIPHV9s+CzIU<=?2%vi)06k zmj)Nzak72gialUW}a!B44jWVi4G_+1N` zGAGA(c>Vv5$`0th!p}Awk)8bX9B;evknA7%2`|h(Alq2-03XnoAS=&l!GqxOGOhob z@Vkp*WbVH8_$Q0eGLQAw@wu^)vgK2k@rPTs%c>t&;?LNH$s8|~;n&hbWa+eGeA|~` znP`s^Ur!2>6(A(|@fx%Yw~>#JTZfeO&oJ?($6+$u^Fq8~pRcUo(kVO|=_M1=v+)gO zU|HIpqxjSnt}+MzRQ&!FC)wo<2l1ud_A*>2_NLUT9#;t!v_`{$_j>2_|v-jvh+J}{IV2XnYY{*-_oNc zdvw?X-wI!pdf;90I_DOoDb@fy-Dpml{c8)JaBNx{{mc?i{_tIDTxo_EeWj-X)D&IgE2pe<*br_<%!xxG!zG`4-0`-jh0VdU2cUo1}Z=p5eaR zHA*vlI&oT}o6^XY?YQkru1k$SHseN%3Ijd zh+lM^wkJb6{pd8VtgKKPUvv^zxISN6aX1rKK|LvLLZ##M=dz^d*B!!DCmoaS9ZtfD z-=;}_-i*gJkPb^D8M|>dcMnSWQBk-@?nzRW^LE_z^1af`-(+0>hB&EHS1^vi-X*Qp z1mb=zMoE{aAaNsU5mFC-D9-frR;jy@H;x`nk?Op6!$F=Ar57$a<6N+KscnuuF19gH zno6|By>vrKg&Qq!oOAwC>K79n)dDId)vw0g5&B3!(^ldjD?FtU;d;2Axo%R0trl)- z1}Lqb`W*yL0Z0{hXM<{n?4;q`si4%IHqzn$#)Hy(ETzGK&p|gy8>RU(13|DhQz^IQ zU62-Hoiv&MDoDR>mDFlychFX_p|k?C@+mY^F&T2e5#DM;IF zQKB1FA0!qnNUH6w2kkYQlK>|#2OVQfOLA^i20hZAl$@oN1;w5kmng%EgM5FFN)k3H zgDA&`C3>I5L6y@3lI*Lzpup6A$-NWIAnS>@lK0rcAjE-JlCD*!f{H)CkO}5uI}*C!zo30PZ%Is} z!h@do)k(5!LW6RnYb95{5Q0+ru1IcO#Re5eUzVt{0)ke*tCEDEU_q@rD}iDcxfMNo8tP?B)XH0bRpSJIHV zCP;OVCHW@;4=Vabll1E>4;na9AgO+&6_hY@O0rGx2Mfx|k#vR6VSWE*O3W>OU{B{C zl|Vm^V~zFFB;a$OvF})iBn$fovE!=_N)({?ScEiDVle#*`+VbGNmyMs_WYSxN%D!u z*gFopB+{ZVQNnLvrmfN^hV#}(>UPMtOdqb{cS9TC3S*xqDmqYQA z_!pH};p;$&jjRlNGZrPe9$AdF{NgX!XraWmAAw53-;1$V7kni9N_g1*0#8YB91|O2 z1ePqbEyVtnxk&g!x!6f-C&|>gEUeu{dx>LW23GC8MdATCjNR6}S+eHKeryQQLef^X z7t4IPK@xHx2D^OEddUUn|F91xR!iQEZO3+G8A%2&P_RaN29l-&1gu!3CrNh3Vxz6J zB~xFJ*nO9lNP?@N*eia2#K)7ov4{u1#95ADta12^ICR7rYyD|T{HNR=n{niuI49m3 zYq0dI__>V*c98d3{QH9m_K)R|c)n;gHuCaE@#E-~*g5!n@lkUv-BYt@MWnk3jM)AGO=YdbN>cl*+u0Wb$t=N6CJut82in!|Hy}%}q%i@`Y+kvq5 zD)ELbb%B4PD#S+buLdqol#1WTF9l*wmx!~ro)7Fa)rh|vmIg{LD#XwSn!qywQgKwi zJn&nuP)vr20&@@Y#AY*`z%VVgxUQNWm>{Q%fk~$Wn_LUU88#;aBkt#kMQ@J>dPJWT z)5K|kp+B<3WKv4t73MMVxK2{wHk)*DOw*n~NW)?A`J=l6W5SZfZLX1l9bb~fb;DZ& zkDlHqK2;PFxYuHjcvCn&P+GfN%s0dYt{_K?U$*)O-ub*kJe>^*yqUjUJnZfnIB5|k zzC7w0m~t~jOeg^ax`YwLx5I4%LE}MUZNtrhX>^R(y2UJTeoKIOZRWbbmOF6qTUX=2 zC;$10kAGSbxM|K?Jf_eNyd?GzyOS3&r@(GviuOE4`WPri*H2?64gkakDc>-R753sv zn=hDs6*gjvm!B|&ft$tgtbWYr!Hwe6h&LE^{s!^UA1^TJ*6YQ{iYJ(&yQ{_hQ5_il z7$fmkqx+cpMSZcR`3~knv7Y#LdIP2(p)J1ZP>Tuwutc2mrW#|M_eZpeQ-v|GnHPx= z<(S}>8BzaaG3HVH57Ck`C5ET_T{OF0f{~v8Dr(i^WBP+fMG5sx%z^PCQUCrzj30kM zDcu4xxtEZL5MY;P5vq);%W^LIt|O9&Wp$!$?tbsz?TZ4k}vLSjz4PXdQD22Jnb0!ul+ro6}h$(x;zj zl_g!|EclMDdr%NqSa$38;$9!(Z`PTfcAZ`m(WXzrr(pX?L8z%`=bC-#Vje$=A<05PJ@q8fB| zZ?uSszkpsm9VxP$E=S)7hl?0RCFm#pVWNjP721MJ7JZnKpfA9PqAoQbeR2#Z5@1exxgENU%aj z<}MShH`<7v^jIPay1pLW`T4hy6156FruiiVEiph7x6TNM%5~6_%YO({2}{s#n!X8N ze4j_@WPBAGNq?f!okxY1(C;Ywfgz#Jhc74##elG-U-mS+eu{bxdM-3-=s?ANek^>k^F9i6=8^Eo(z_@`)C1vgSp!PA_P!8| zt3?62nuS}(s!_{mO+o^<3S}M8DBK7xN98Zv6gGDkqwH^77b1=-QAVj(grW@+lppZ2 zu&IHEIzLh+yc^9#MU_?v6@Lp*l-*@Qd`T{fvGI)XX+RcA_mxKII+%`X6DxJ#$j zhRTG8?DnHp8H(8v*iYS+pVR<%P=$@h*5HzjzYcI2lC6Ldi+D(bM1UJgLbY9$Nv zFt(_RElEPkpe3rjV4rX{&kXf3aE~y_@m2-sZbF1#P!5+Kb13G1hB2ZW-5 z!UAqx0C@#KXzz3_K=8y)SaSbTfT`3*I2m(3;A8Y=q51E#0pGS*2sg?!0m!ip!XIFH zK+o0n!n2*ifXi8Hgn$H2z$28gkiL{205n)BY*OV1JnddCeB_lAP^Z=rUU_mX;L~0$ zVM@}GfNh{ff!4C*faSjy1c%fK0ZUru1XsP{0-&6qg2#`e0~#Zy1kDK%0Vi#~3D`@* z0t&~+1Rw=5;A!1wK_xgSV0XcgVBujvfIDSCU>64qz+3bS9Ok_P%09mpED?eOP_?fF zR{+2OyZj!3U$cDxk^Ees+F>1V!{Ujc``gBVyV8L((sT9--ew2PkCdFPAv_Qs?C&1N$ z{ZEFF&zD{le2M>nOn!b|5HSA+Nh~cFr1E-@htkgqj@v#(_68OUcGPzu^GwwO@xt{^v0jC>Y;LQt`ehurU+DL7xjKn5*2D#-IIKqmAY5x94qM0Qpk z65QIIi9CAhpkUKf8gfr~k|3fW1t|gU6C{}=Aq|%85o|lZ2YLVXZh?v4E@VqhwBX94 z9Y|ezq`-FPRwQS4xZv;v3Aw{(t3aHKLnatg1pHNKWa9`?u=flcx%Dnyu*TgN2~uDM zvU~1G$`Q2SXP67JmVgvE4>}-s*}(;VX*Nj0B1B-lY!fo)wYT7d&=mROnup-H%^Kuo zuA5-=%1Y#=Bo~2ufFANY#!0aC=~CozD+d8-_iqH|_ZGqCi5bMUS5|_K6O)L_>zf22 z244{(@IFr~TUaQG2!`RF*CL1LGvbtkzxr_G37NY~&W-Y$+O%(^=22Wx^5XuH4`| zt@A~!mtEs$YTOYIPSo&A>|GFd<1X>fR68L4;HvmpzBY)Hpb9>)*#dzvDdX4SO%Wk~ zO8A?euSOJo()_#jtwgwYD*34cx(NO2GJfp-r3gp0nC~>T;Lj`&@H;bS{K3gwK5prx zzePBUucnXrlMr-%hw-rgJ;y@+GwBEa6KnGMS2n%%&-#6mf1s?#ziBv||HtX6Kla&i ze$tf=|FyR=_?La|``c9<;dkA><9|YUh~J8C@HahqkS}?7-G44AiH{^#`)>;0$8UL2 z=}$xL;af+Q`Fnw4_!0d@{s4=e{DgRgf82^FK4nzo-#-)1Uz5W1Kl5oT|MC>wzw$YS zZ+q;t|IfQ5e%eBgKealTugX2{A6*p0*DOo(Kgz-IkJFOYx@4Bx%zw`PaS`obUpss+C}(KqBj45*F1b;=Td&e zjcGV+>tEho?{DxYxCP#_o1^dw|2f`fpHJ{s&!0S#oA2TF&QrW$@7M6h*57#i8{P1R z4PSZdydT5A8jtc)YahV(=neBKJzLP-0R@`zV-3`K?&hgBd>V| zZkOQqKJ@YmE?2-`z3%3{1fGR^bU)>3Ur@ulJG*!W02#c#t%EmyP5>Xg+s-?0%Z6`l zY~{hvQsK*QH1jTQ&Vw(z(!`rlXTwn!8+m5tN8#-ibv#qqVYr~QmN&8X0KBC5DzAjU z7yeUK%>x?7zv+kALv+3!D;OO(q6j!qV^} zfBM7UFqFK$!w`5RUB-ia^?+}piFv6Bu5bscfR{hu2tQiLSzGIt0za z4ztpD7L}8*49;O5-{vdq4lkMaUNsCO3-|N%)_;WANfLM~xNl)dc|31Kw-;8TiscpO zK80b6ck#e;9WZd|f4ri@_hGRWJ9tB%@4#MN*v`|7ZGeet!g$)Rufrs@WZoM}HSBEz zk;i^e2}`((=WRfi!60o|Uhd5z7^M@^_7cYl-F=xw*?pG`@xS_CZfak zj`;8>`ln&9COmn)r*dF|88FXh_85%!*Oix+d<5353*<2e55l620le(U1eo&%dmipd zEDUMAg*SnThAEw_c!wLpVSb*Qc%7h7*k*roo_09_M!=c!Ow6&c#;|p~WjrM8$j;Tg zj%83-N}>@j`M4LXCe48NwZ8Mlr z&2O$7cpYr&)-UdpG9#Ep#|#(0VFir!@&~twwG4(F`p)h8`v(gBG0uIJItM+mbd1~d zX$q>f>NEFb#5nY^Py4M2V2{oKLJeb63aA9t1YOK4s6YwiZoGw8>I zz1#)uPADa(n_GXh4XVR^%H8_;E_AV|i`yRA2u0R(a7`c8Lfe|#xhPl-RM_3h#a*g` zmJKy?0hZ;^h1n+V5Vshr(7(maSyVtzY^vveKO}~pbGyOy|G;tFn&aT+wTvW&YbHyL`c=?r)0L;|$6yNFBO83)}n zs^T&`qoF~Ia&8hd0-CyB%C)Tug$_82xD6YKP&tav1=6rkaU_SE`4b6!d6>yPvj+;@ zO{a0opLs!DN(#6I2sdazT^<*4$qA}@dXn2~ZU=>pW^-}$%}^VyOs?do88l?$QEpS* zI%u#Lrbfn)}dwz|Yh^l1nY>^TVRTxtsN0`Zey_$`xfi^E;YN;SPRy znP$-CGumg&unC{g&msr2Cb>x=yq58b#+(z$*`qb^*{JG$TK3TLiq&}qMH zCr55_O^)AIf*rTm?6_a*K^yMH{3Cw7oXuS6*g?Nj)fU|Uwk7zbJ~QL~xfSbI`NM>p zWf$#dZ?ca2f)nod#dkG##SF!7`adJ?#$5zIOs)ZUd0U|0+q28L&s~syH`{c$$0UA! zZ@*}9fBp9K!x%5&M#O{srak^}1djlIUv|uMD%@@T98S)16behf%F=00;u15zw1<!V%Sa(iB z%3r_ZJOh7)oLTyov+G|a;uGK%r|tI#NOD*Y#~|)41eX1r18nbsgq1zvI02tRs=GQl z+JX*9=J{OD=_E+1%hfy{dswLauT4o5&%_Sv8ywnL^03bC)>o@7R#+e-`FgBn@(K$$3t4 zX&$81rJS=}_XNcHzq1^(q@$1_dNHTr(P7B<8)}a4zr_m}QgDR)y^z;yWt@joyCHQb zG3VX3D9F210jKN6HVEzvm!sG~hAcc~anMSo+t@&|cVuv6`4*5$<`K@aK@-TP+lM#= z^lHfKZwEQ4r3R3r+?78S`ULVofs=wfL-Pq;pw2#0! zVgA53M~&mWK7P;Fq&twa_T??#nH6Y`lh;k(O#w)brRa(;>o}bA?fV5^M2#Ou6LQYi z@3RjFaIwTU$I6Q%SfTROiFD`m?vwcT2tb^<7M}0d4j^aFis_5jcH;Ep6!?zA9XQ-K zCw*TXv*p9X}+hwT5`s|CHtZrEI4MwL|=TI8OQE?oUc@4!ZFm|>Fe}* zE$7AV2w$D`tN&q)Lwy}WjX1L={|+r21J3p%SYKqvat^->>FcAX%c*pP`le%+af(lS z`TojV!a4FD+1%aV{e?W^nIH3lO2yU^R26&Vl&UK^&Ou3 z#^(Gs^!?9woShQB+;_wAFKl3qmhZ;85%z->e|+}NePRdfnf00R9bn6DP5L~}>}Nk( z|J7%rp^yD8W!Pui@7L_k_76Tw{a>;bR&RY~a$m5~nLR$>d(YU9o;~roru~HN=G5Vn z6V%C0%Ww7JG9R)6Dy4u)6_j;d#)vfGg<~5)F+nd=A1DAZHiY9gwvwW%y&ariI89v2frEF}`A)hyj5_bG_l27zU4Lc?{-p3xGV*8cs^6^QPv!{OU z@Zr@<*fhdcA6G3Ad%lF^vyQ-L6K8^a{%w19HUZ^x^Bt2-FM;`_Indc@KfQg9rWUec z!C;@ejrr`sB4?j4-Bav@A9g;@p*if1AS)k&I*Vvadxtopa|LAQr8qHqk-sesAiDEYu^m+$UBiPuNPrZpf+t?QYkGvJOVeIeO_q{>s zWcJ#}cf1W+iR^V&4c?%2!R#NY*S(eTLF}5A%ig3~44b&V(mO~O#ctbI>P?S8ur2E} z-m5EN>}@OL-XG^7?4&56_b;LkJNg3Kdq=S++x0iqdvOxXeoxHv9>;*#2Q}H=HgX{Q z^>~JN@fd(@>wnmL55j>>;_ml8B(i01e;@CCZ^W7nb=~c~6SkSXjSI1?$+YjVN#7$ZGb0KHU2a+?f47(#JbVypmma9_)=ATft79 zb@twc(qpf{+IzPuwAs00EAM~oBX;+Ix%WQ&B1;dv-n;b7Z&UZlB4nR+aVh5UmWssHLqb^wcPLZH0u&;ATi#n;cXS``_)}uUt#B2?|<*`+FMl4x`5s4Wxu49 z6~QNYf#OP71FwU;PPJ-S#4RYV4Gt=nf8D(J6cOuEkh2%= zI-ixsxAVen;IcNn-t5IY!D6Yc&Alu?(pgLPuk-pDNM)g~8hNd|aGJGmez{lnsytQ# zYMB?{=t&li`Nz|$FPpXe`K;$IR3_`Z*_7v}^G8_@v0pu}8K<)f&kuV(IGW13_w9qH z{rePFzxP|u&cK7LzMLMKNqscS-0qsE$CfCT`+-ZI8#oaxrz;hnfwS9KTC-<78)Cy)^)R*Pu}(6Jk}vf< z;X`7zwevkY&IYqA3|XGLjc}~cutHB*Rv>GiEY~x37{&UpFVpjJ7?K6DPWL>02hJMY zo8oy22xT3uO7v_~__9VP;ykzNd9z?1J3SpUJXnX0MR*1dy0P*aLp?8qy0X$137$Ld zIinA7z)JbGhB znFaGT9#$`hnbUq3Jg$&FF)`WY9<0`n%=E@$k4w;gX5oUuW5cyRW(HL3(c$!liOuGE z+&}x0Iom+@SiZ4`NuSU65R0BOe?f9Q5>`HC5;Bi@oG$EQ=G3KneE!?Pn)N+~Lw?4YFyx2_7xwr248w}e)-IA!>#Tnw{n>jn>+6Q{yG1~QSV-TH;Z{qe$71*eVlot`;zV5n{;YdY*I}ksf!cjbXbO|wBy|t!Il%lj$9KOLnZ)$=V7Vv0-^bjQ zT)G=U8Uw$4qy>l-*2=jp^>Ir=ywe+x}^4vZ9#VxQXtHB|DhS?Q!nG zwC&7QOLw}XjkYooei8145(<-?7V5rgQwS4zk>Ea9MqsWP3Uprt;+bumknZudSY}kX zpZjWm4D$)s(_ObcfN9t6>K;fzFryb8-8)~ym>E7>+*N!0m??)gxnCRiVd5%G-PaxW zVruuVc5l-1V4g8q>0ZNeV_Jsjx{qyeW#$wvaZf38X5PLv4~Dt{nEgMd!IWF}%#Tjr zz?X2g%=@vU;B7tDOon_AjE>vPbbIm+ob}Cuc~j>Vc;SROb2IEYxK)1xGwDbtxL3ZO zDL&r@20N@}o_T*4{GxUhleexBd>3QH+!b64{@HE7G&)rcPTRABSyEdGhWyZFt{p1{ z<4$Wc6Re8BC2O^qn(cCMK-nVWI#URC_WHxPbcYSz**4FhO;f?IBIX!qKpt2<`jhct zXEwMp`v+r}Fax}3ILT;gI|SC0OfZ%#B!LS&zB0Ce;=$M3Mj4KKc7a`@Mi@r29pG={ zpBOzIVc_|^0Y>g$BA8_Ifw96p2s~Q#j&XEv0Qd>wEu&Qq1^;>RiZT7j3!J{cm!Y!= z0(&fZ!I%R(fnm~TjIMZFFcI^k^ev+VQ)ae||kf8TG|2Y2!_X4f~VZ zyX)5(?A!0%lp$9cuO?o(m3*#d=vsBVeapYZSRdNuM%#3Op_||CmRNV5@#bo?n_%lX z25+#@P5WCZ!+zZjx4X7E=t!lTD5#Cee#{4Z~MCd5o zt|=r8KQED+osWpI7|(J0@Pf}cC#Jc5I>KduTJzk%tJw_Ik8HOG)eOdGo1<wB_q*H{J98Kp3?to$$=QrR*jBdz!%Rl=ev(`B z<)aKMMUdMlIh_&P9^e)=naU{m33Xd9I>caX@pjwbmCQ&Db#vSMazDc_*U4=mGm$ZT z(bnya#Xd&H8%sB>yL%YJdS-5Edtw<7ueENjdb=4ZafWW-3(*WJPtWZnIf`-W)>5~1 z(-DlFqYI!P^6d-@lNpeO|5nCr)OQefkirN!^aX@tgfJ>ppFl(qk@3C#JxJMuXKb8) z1#&wP#Bj9g2Cdo>$S@;zfgl|y#@MlT(1lbaqolMMlwju1@O{zj+A;tY*`R`zHjJ2O8KAkFn;BUPhd{M^HZhLb?FZd5-pB|i z$Aebh+Q2Z&+yy$9Xu@bZy92~nzm9?J3_3<7=GWXN#E1%Rd= z=`#XSp&(4wa)yu63)JtZ%UIO{0=2$e#^@XafTpNR83)$cf|9%!>Ekd-yj5gzZ0FkKOu8 zA3E{P^>oS?dTiOK>uame^yWu{uE)EF=-NNtxyDcj=>YRru0qI1x_iKLSEKRwbj!p} z*Y1)&`Z%}E_2afT^pe`Uu6`?C(Y^W_T;JaApkC2yUD%%D>aJZ!mwZiheSNEzeq!|=*N%*9bgcJIS8dQ0 z`j4mxSNiA6^n%<_*X?I7(&tJEt_P#5=#&S6u3aYQ>8!5^*JIDh=~b)##VYJl`bAGq z*UF$Xbioc+SGQ%w^r#b#u1oKz>3StLt{bzJbXkjq>nR^O-C)GT)n!^jkJDf6YIj9M z*SHwC?n@ES8!0-jlg>Q)?X*Rg`=e}nsq~l2UOY&VIQ4t);I3*$CgU3`a9w> zH+Y(EX+7WqFU_MLMfbTpip!;6-P`L@W|KpIMtkbgHjqW{sqAoZFFj7b^{Cb5A6b@8 z9dB|Ou}!CY8P~hG4X4uE-LARZt2ji5hh1_hPD-ZB(kfi;J0GC;h|joqO(fE1YE>@Z zYWC58_exx*(&Fhuvpg51PaOT)2Byo)`Q7w*NP$aT(@y%Y$dfLE`Tx<6WF2>j2#TaX zQ66zISs6iJ)p*dw^4T`J*V}zAhoxb3|AiPAgJ=rfdE|GYO_|Xq+vvO(w>O;3nGk1Ai>qT!BtaI_o^`K*Gj9lL0!1Rlcm%BV#1ESA<)pF5( z2c+8@`~lJ{oahk1EHM0tBOM$x2~39D(+&5I0Us~7rFZ2I0kd9M(^E_Ofrm;q)8}u$ z23|h6iJtJb8|VYsNUxjg0_y9U(I?hF06KJ=(3gAM1M*7N(RC@efXI|J^wEPifKb>f z`V~eEFjwD*9(}F~X!P2EK7OwZI8w2K9@}38)IX+2Z&;86k70G_bEYDotI0CDxhDq* z8eT%TrqF;{H~!LA9?Sz8(|*(XXxYGth;aOCCTZl=yMQH!zx`{y0|-Np)0jbFKx>mRT5cQ>NE!W1+mV9>cHA1KnaGhqF8>p) z{;D5P6+b{jc6kDS_W8gT_m4BylKECm4b2Hw&x1(_hXZ;trbOmmkhO2OiKu zmQ6UHL$}e=Ej~Nn+t^CW^%`(?m~N&W3h8rx*?EVCN$7QcR(_lIH}|QtNp2%eBkyo7 z+fh%my3*>L<9?IIc-Z7zyt0<|@?)Lz%8{!y{rRiTt<5zw>ou30@2fArTb|or$(J_W+l?}^*%XC zckiQ}*!bS5852)?4tnL}yL{?uKkZ}%c; zzeEjAuPP&GS1PVM83?x1D2vZ4|fL4TXchaeMp#7!*okq{u(U5WWP8%d!X#3Nw zoCK$>Y1swlPTP-crlm^OIqiwvL?fLua=Jy?NLzJtxl;_%j8@mK#X-$dkfYM?uTJZ5^z61wi~WNIkke5%6UCBQ>YDlEWAl2 zqz*YwoUWxB<@7rO@~=_r=&v0wpSnT~7I!Oq?SD&WhPX{}G zxt>SOV`CieG~`mxNcXYla-g5HZwa=KT(h!MmtGtY164+#XF0 z2Xs5YW22~N+`1el4(_0K`?NcZ9S^5|^>21?FWg2Q4{UU36@*cHiM0-Aizw7{TdN%& zT?nD>jH-0-uP0J}$CNt!X$z*FPS7~$_28(J$ufuNK`b>WUEuJ05<@M>VmXW~K~pPF z6*_EM6+o?}<~kH@Mo_ERnGOd)aB872%^@EFrQ+qu4nt%Jby}0)AdK;$(n@0;SgBsr zrIr6VJjwT<#$Vp!T2itud z1m7K~*E_)ugUjrx$`8G@H?!mPVpAs#o z#Uq9ezjDl}?PGcl|MPU_(NO;X8=e`%7z}1CgRzWltVu#h$of&Cl7z@w5{VEp^SqyB zB+{aivLq=>n>8X@BvGP5(jug2u|}5S=a296^Us{)aE^mH!~MGN>+(7)m;82|s3lk; zoBVQmk+aw+oqYSx3}-_(BROtyoYVG0GMTeH%DGCCNNyl~;XIY6C2tV=#4%YTntYAg z%NhTVnmi-+n)BPAlDtat1;;)?Fxf@wDd+PUfn*Qahn$vDVzPsL9cR92nXjZ+#fkg) zkN;8mHplwUB0pKRnBz`g;LB%OTmQ#7)Ayc_*w}Ke&A;PA8!b74 z^1b{JTT@P%Sr31$ogwG?t}gy}J6+DV_}Bd7_8Od+i=BMBgEGgZ?j;{~SP_}Of5Go_ zU~u~Xw((hxVw_9Lt$YVZAx^$c3*Xa`z?lqe=5Kdg&`jqy@l70mYsMBo;u9UmG)ta8 z;NNu^(bOJq;JZ5vYECik^WWKj(4?%Z<2%{+XomXK@-N$UYRZ7S{7<%RnzUv(u~W`;lDA6 z(>&FBiC?3CNOO8Bi;wDtX%;A6;G1g)Yvwwh=fBnT)BJMiEPs#sF3q^?GyD$rc1`!E zr})~+TQrj<)AHR$^4TN2AVbP7~fA! zTl3li!k4A0Y4&Tu{8~Xp&0r6RZ%2~VG(oxink5O%?d3=L(u-8hy8Z;d_a6bxgW~c0 z=7-YQtmrg+C@WTyvuNr@sBrFnn={A2c+q;rI6-pWWZD@m4>A-_rL^ zBggju-?Qh9#;ue4`JJ!YHK-5w@z=JuXp~Kc@S$gqGz!&&`BhEz8bcm|{MU`u8WAb} z{Jwj4H0||=3l>aRpX7S4?nClcjbuS#b;i-pmFB7C;#^4Ga7>p9{kmp z(lmHe?)bk?Z(&xXHio1MmIV8yT6 zv_WIXJxl(A-8v2FDGR>thBX>&J#)Ujsh-A>;B|bb)tVX#c_#d|+A12<-nD!YRe242 zh7rF_UP_~Fiy=RTLDR@RX22H~rD)VY*5~sDh#DG8y8NGu3+jF5I()0&zt!KzYVqTL zj;U)`X!3KvjHo{vQ|I6OFsOb_PmN#L^+CNSl+8c(qDOuEb!EQ$lTLMoFN%EX{Wf(2 zH5R|5@`-x7zdV2KjYf6z%S?VzL9M#sCmFurr3&@KO459nGdI;qz6?H;a$WsnjwJsQ zl&>!EQJkM2cS$`~iN-%2aZcUXPm~`Pd{W)&GL>)OlcIj^Gllr_JNtyPm?clw| z0(9T0*+1*XE-AlJgBV>{1EXC{$oDn&T&P8@uc#AyvhYxCe(EJwG*+h;Y}Jm%3|6VJ zQlDe`J-5|VdRnoL)?&4TYR@p=h5|KeEJtmk{t33OFjGx~+Jx~hoL0NK^AXmN znyPlN@B#Lji>W0~HDJFE@zh3b?qkD2@oHJ8>ab@!qt(uRs>L#$!`0res=-_>_o_v5 ztFcJ~e>J!EN(@rz~-cOs7*zbVY`J~)$TUl#!Ba$)SgP*!iK(YR8tGMfeC+H zuhv#kf-yTx)Eddf82!;|wWXccvDpe8wbYVAthrEKE%0vv1~Qe@j=5dII4MlEKLwYu zngqI9)odJao0o6R6ILvJ}LA4Ew!5$AE zR<-*ajj47=s0v#~VJjLuRr#z)EWa{9^~moC>|ueADtlWv_Tr3(s_gAB>sr4~)dvm4LUh-tDh&E#19Ez*oRtQ$GeuLC zm+y<^&M2#@5q4uAhU8Qk{@$3-Ylf=Z!(EutLowA}wkM{1TS)a5?172p5L7z`-Lc{0 z3+xT{+p*FkzuAATZNdYJL ziESIO!{{}3YR!5~@z7=VAtei}V)sS%Rn!by>wK22{@oPIH%VuYZ8gE>RgbZSYS&^` z;xPMwiV+sMkjQ2oGsI4OjbY1;8(`;OA7lr5uEJ6qL)mi=^sob^f$TnQUCbu>CiXa2iVZHvVCg9|_Gz*-W`CH% z{u#xnht1&7+0?E~_*R{y`VMUQ_`dv#4d~S(W3@exqUc z(pCD`Pow;TV=Bm#b0ezxz#>|hThwx;$lCD-nwG1Vp0DY{e0X? z<*-pdx*TPuGGFo$740_ooyz$wO=wU}n{tZ%W0aZq zM7iiPCb9DLdaSM<)?jxy`f;eH?mJ`9jTY6u8DJ zmz&)}^^GHynRPeNC-VE1+t!z&o0bEW+Zu||#xJ{-nKnhJa@$Vjvd7oZ@H<-@6z;@9elG&aX@~CSOWf{P1~n2BRt4%%4Sr_EVG}KpE%*7ou{i&>2+N zXi=#k{S;~~JEKIAIf(|XfH?2voIqngjVRS>q@l5o2bBbF9Y+JNe^AOcNkJ`Bdz3(9 zGD<$!sZ`;_N9(q=DH*;(Q9qL>N{ikIIxg3!BsC1sh`%*T@sSYP*I%xryTC<_n{Fs+ z^OMk|>(`WGB#)xy$1f|1q#wcaSMxrnB4=P;}IEeb8p-RJN!qJZ*fl6HV0d(_!yOo0O z>_@Nb?o>K&6^f3FZB>$fxfkV(J1h13hM=2Y*(uHa3PSxVHz@h?0#U#7>y#uV0#KJD zYm_AN_n^97dP+WP{LmQ-O{L$DccZrzRh0U6_@FzMfu@EmD4uw_9c^~}t$4zF8#=Bvruc5m4Hcq}C>};#QL*m> zir#WADB<~g#gn%-qeC~k6~*l~p_L~(6hHL-hek)VD$X8sLRDOw6#WDp(K>?$MMjQ2 zY9~>nD81GWtsgH_3~bwos&0s2(-Ddn{EX1K z$bE|Nydj$A7NA&rZZ#^l+DFmS&;U(Z0VLC2=%anVTov^~^-!(${}eOHx@h1{TSb>E z+USWiOU3P0TIjVfQ^msfn&?euLq)p;4YWX8S8+8{9ZjZaD27(6qF!H>6vy1zD65&N z_-INQeSVd$IB-S@4MSGIH)|BpIe$S#>MI2_)_R#G86}T?R+?u8)8$Z$zf&y13Rx8G z`^oyfT?VbI{mNSXTMGT0`I%L7o`KHB^s&;{(b4(sU93CrB+#FRFIg%{;^<59XRHs( zG&Jw$Bi7ePqNrb6Jq9y!0tXDTFs7X)>OLChKT4r;Vl|4g76_j&X zhc5}BhZk2YeAXnizV|dsbeMonRj0C^r!FJRvl#2G;S!>Mh{sy<_Ag@S63^=8E+Xo> z(X1C53y2^koJD&vhrAsMVdWhDgIsvHhjoNCi#XobjWkRkJ`x*Q4*SNDyFV;g-BTgZ7xCtSyKBORY@iC%94O5uh@(9^D6r`X-e26$V_$u6~ZbUX-@Kiv; z8W8QMZ3+b{_mSmIn-wIw>yW1!4hn6l_mHF|D}~oKwTODJnS$1zyU4wABZanG)rfVP zzCvAa6;d6{QTW5EL|9gA1^7)l62(+d@JcH~?oLQ4@a*m&KU--E6N|SH`c;ZTS=CKM zD~YJk5OD+1_gIu?YLy~t1~c*xJ{Kbt%D8;xr6S}*|A_qTj_XK4?Vvng;u_+4=7W4- z+g0T6{vP=g`~oDywo{(G@e0CZwaGvGdl^ZeZjygrn}qC~c@g=ce@(t|e-=U#yeyxubpfG%%#!aIK94L{Wyo(SJcoQcaYCLM zbQWn0PL?-N%RrJXf&96F(}G+B=?EozpS;0f8UmsN zBHx{Tv0ASdTs<@3HJBhNbildmt~Bh%My9gZ zmWQeQmq{35>Kn?NRRe@9pex@S4QlD)r0j{M;Of>=M2Yb^{z zyk+X;K1A$C)P7XSS*{C3-aou8H%i!t@H30$zO;oP?C=7)Rp*0|8yj=v9`6Z4w3(T5 z*L4Gt^FL3?y`Aw#rXL-b^LVrevAuxGsiylONH|x{!pj$_*my+liso*lOEyZ*W6FEw z`x++a`M?YL{xDds=)^AM(|JERdv8yqDQuUVf%Z=1lJ$1Ey|X)z0O>7qKc2WF@}mxN zjc2zbO%2v^{ejyM-wbm(7o)An=-#z*!X!5&Wc?~R`fC^Djf9q5Xu%d_%@?+u*x}6x zT&p0rWVZ=Cu)h^bs^jT|C;WXkcZ5T&jjrr-7r$o-;D<}}9=*>bdv z*}Z6iw7WiGl3$r4)@qGR__`T#b*6^7C21Wp_pF>5yxkPB%DKU8(>6ikBCj!d%WIL# zwwIYuj}cNQbCLP-)*9sLNCq>EZ-_jpKf&DLyBeuHnaoTxF+k1*0H&n)DrB#5B6H}g z9->2uVUi!}BA?zxFrzN&ApD#An5zzJBT7&J)6_)^Dca`4OxNNdY8oC)Ba$X^YSxvh z@lhQad-fkQs8$WJ%C==ro>fIageCJuBpa!+Hf7FiRzcp;4VeeDm63@d9p-95C1k!@ zooO@3LZ*)?G4mfNApKrUrc16o(x69YIvtfm(*KDtPkS*Dw+=FsV$ zM?)^_x63l*#gI4up30Ulh#>PXAIj!^pd$4AI@#VvVT2V`CF_5Mf-r4w%bH+9h@e!l z?5=%+$nek=+15>Dq^2rcHpM^yIm$mTdyYXujCP)q9iJs2eVpU6neUh3m_LZ@iHA!t z@mZ2=$F+YjlocoIpY|7?2t6cg9kmF%n}^AUdoIAm)L_}K8|LAOcfPW>HRfQQQcu|? z(Lb<9;x<{W=^6O&rp>aweZOH;!9n)z<7qhgyOpfQjVU;>&P=xP>?9nJY9xC-X#!sF ztuOl_WE>XK<;eQGjloamRb-9Kf5EY>^0M31f5LJXrDPjvKj2%TG}(l?QP|jwA`1_V zz_%$x+1{7mVAk6OnWVa}aKiQ9G6$~@!_Q;KWNu}AfyEt0WY$ANu!HoVjBNNI95M7> z#@cHDPO0dYx$F2D&V)N;jvDvF7q+&_q^o^`kE=Avj7ffkBggK`}#(rqh9|Qo};VD94LPTC-<{th{X?Kp<6OC!+8(j#6$@h zW@aNi;6#&aCukY#ltGG$EaT@E)wP>AUo`eYLO| z^NaMHe+}&L<)idP@4K*l`CI9f9o4WY@0Iiu*D6?X^K)r8=SuiDvsqfpz5;&urBT|| zx*UeeYo#Asl)*;43Te#r4*Yi0P3dz+x8Xy~>(WyOx8T1+m!l0l>W^s zgl{uKrF~gf;rpKgq@`H}a6_q&v;yl2Tps5k9l^?nFWS0Eiz{A+W5k`M|0(9dc73+e z7RtG>;B`ysW|bVcKFU-&Pc<73*P&dvlrF8X_B_0cBq}Yl?i^g&PL}pte-@t1T9W#0odN3x&q=+rKLhVtJtZZ! z=`@_M@Ixxy?G${nd01+<$4U6Y>3*qrpLF=F&pWB1fD%R?4i^pUJBf{txhT}`54SqtdeRwnG9=uyCvm$fe$|@FOo9K$6%MFD^fls zDBS6oE%mAbfgS1Rr84isaQXX_QYB9TEO9+WO5_y;2OdJC?!D*1#TH3YcfWGsL2{fF zaViOx?1+@g{&y5!dvU)MLOlvQ2L(yh$RxtFrtk!X1SsGgMTnJD<8gQnE! z{6i~c3l%ALStMN5D<`$|;2>;Rz>w1IjDYhGh)ETG4u=IzgrveJ55T@l%M65c04{Br zXMB|kgMXf$W?a&0M3m*fukXn-H%osK)4qqB>lZ?_$; zoZQA}-@OfPytkRr5VsX>fE^f%r`_NRXKP0C4OcjuZqD$3>H;UcGh(C+Y=Jjl(Pu3G z-3&|Z=P;V&Hp3l;Y(|gqCK$}gGfcNR!<>gwjNyp?;77-3jKNeVc&i(QVNmP{cgqqP zEzJ(F>!$_!?IC-(;o5Kd7ot7Pju@kdvhCn_;}N=rwJqGdI6(LI+Xz#d-qTyTHn3G{ zH$6Gm8V=jmK|kGK1*gfi(nmjTfD8H`)6Xnf!ndy9rzfkdJVxB5x7nLp_`0qQy>Chv?wByATPWzlzwWN3k8IR| z3EWlmFZ;D&s+|^nb%qv9p{mlK)p6j(mkRVdLz?iHbJFxLVw&({Z*h94sRo?M7N%SH ztHXP~66xNlYOwOnMagGXs_>hr8A*OW8|JPXmpm=Ph86#fNRFDQz!i@NCC>yX!6|RQIlfTxCr1`OxFJt+(nAJ5M#_@3=S#zxEoUT$tEAxU6KRrN zUl{QDZG1_F3fF25+zQlH49C2LC6rfzKRrv zt6YsGsf83+Rmwo}RId<>z15Noq6xttvsERNZ3W>~{w&EqN62urhK%IhTLSQ{5pl^U zLnOHWrm!Sifdo^cNRn+^iLi#rUx}t;1lVkTMndGlGO%qJm$*E;1nl5Z3DjT-m^%zf zRPX%AtCQO z4XWnSB+gx&0`m9y623i?AQploVx=ZQi*16$`>hi|Lg=u>>67EYwKZJg?29pgp4cn# zMPv-zar2kJoPU8=3~!0(l%L>xx4XpcmLFg~%SFPR@&hdUI7u*^zJo>OjS?2eM#0#C zg+y7)2Xfod5`B2#=Ae2A8j7~J{= zoHUV;;GP`a6g!NGAe#T zryuM+HYC2~;3x3X`J=dZwGd+f|3fb>m+F%6Pc= z{l}f4scf%!F0B(BiS`$Nv8w~98heX77rq3KXWYeQCfb2djf?nd%XaW1-bp+w@74jwo;(^~v z=qYZbUE!1g*AEsnb8rWQ<`~o1eYe5U-3BxdRjgStfrG^$?)|u! z^YbFGI(t;CU%Lnlcn^s^PQDJ(6h4a0e7Ocz_4SCw*0|n^}v5oukfZv-mv8dKua4CZ?Hm;WoI<`S#_fO`4MacxQx0Bg`-5D*m z(IXpJoeCFQsJ#T-UH6I+l`eq*n!lJQd=Z4c@Df`b&H{VW+{MN=WdYw!E@Fmd7k~@Z zN$jD_1z_^bM(py@Odxa2LhQxBc`)W+EcV}j=fOj=ftb{tbKrQBmYBZmIj{v$6+6p4 z3n&{|Vw;9DK;5#mn43!m*xM*BR#1Hgh;W6)?3K@eqV*&(lVhjBhJ{7Zn2A&1dF_lS z$@>)8eq>yQ2$tcWGeo zSF0%3Aq|+^Y!U_KsbD3`5`C?d3R<*lM59xW1Ho@)q5*$W!1`;YqItn7;6PBJsP5}y z;H+w%sG!X;P~Cq))Zlh9=*T@IdR;LY4EUsphNtntFL}NwvVei9w>;6|{TP@yA1|8q z4h3J`qeU+|qoA7}E;@P-0gW9YqQ`U*a5;UCXiPQ?5;uE^mWjbD-#2$r3myRSEn7sT zCLqv{If||igg~yXjc9on4|otPMB|)zK(KMG=p#062B zGa_p@#e=tlV5j{wvB5s~n9M?kvopa}1F9Ozg0AkwcH2XuP7MNa0%f{61SA}3^G zLFx8Zk$34aU_hctBvvQ}(A)2e?12sgi`2U!S#!}~w^NyjN^~@cCzp!M{)hr6A6*qu z*c%0MdATAdKOX|u)?X0W>T?Jb&7Bqr=!pac)u|$nwnc&q(U?eN`$528%@YZCJ_sUy z9ucW+jsR{YQ6lcP5kPnE0TIgw;b2KEL?p&C9K7iF6Ir--0G!L&CDO6(0PyhIE;3ym z1|(&-i0m~E1I@1;M6@dRgTtq+Mb;VZ2dpjTBAMl(ph0-8h~1h{u&Y^L#JYSR_yu!B zQrGMQNmgtTjf%a1yeKaswstQ#RwE^1R}}&TVrU|*CLtifkRp;>6AVUv5=0)F2ZQY; z3sj@~L7+P1H+9-72uP`oQAv*jLD;8nRDXv+P=9HFD%KhRggoCAK^(idQ6CDfTC zz98#&0kwK*Hz+F0p+4d724&%yR8`t;P^o>I`tqC)DEo4p`b^OW6y>8-#x-wnaW|J* zy2=}1a!05ccfCMZ*CA?)wHI(c9Y)>Kx(ldp38t#J?*elaKkCMnvBJ|PPinJ|L)VDfesc$C8`h(SnC}1w zu4q!XJaq>`zA9AM-5un}$y0>}wgdex2KC*+?cnYyG3w&qZNOr)5cNRXHc%%-pz0}X z18X183!9g01x4Ix;Y_owK-T=1@Wy9u0Q&t^*m9Q}7`*dYm_OnQY!37ZDyhy3#x0;(s$RHa>lQ%js1jBm+Pw06d0Tieb~A`@ zC>EX&-V81g3WQy9Hi4%4Y~lIUo4|0~dEx0MXCPp7N_fLAXTbWEBHaD+KVVRd2-m~^ z0n4By;Yr#5fW2~@aO_Pd;Pft1_&-}G;Baoga9FP+uyP9$et*yr7>W1_XA3$4cJof* zk{kyh0=5bZ89RV6i%r56&+S3`jGgeUAp4b{-v;5?MLUpmV4d*Eb9P`0XN_>|Dm%a& z&=tP%)E0cq)(|%Iw*|R7m4yWsHUclYoUrD(jX?4RT{zQVBY2!FD!jAR1{~ZdC>#=O z17!a$Q64W_gL`-9D3RILz%y!!61L77Oz8cjRKBqS{IA25Er+at^p$>!G0h6(`Mjfq zm2LnUvTrEkP8-0r&KH!XVN0Nz_LMS=T7oQxhZIjWOCU<9qc9(>2k~{46psITFc5Q# zf-PGBht)-tHJ2^Gwb6XaDr*a{!k?rZ={E;E{mxM&fjKCWJ4u;in}gr4k5N`XHUpOF zFr_-k3;?I2l;eVCpph6$xmmOh%-0{JsBBsX4B|p5pMRQyJ%)jl@l&SY#CIQx>snJ# zRp>!k>@fjv{oE*Xi6&rH&Y5DTVgl%IY$+d`jDc3VC8ask7??SkQvT75fdkQyf>y2t zuJt+;FR!&=d#pNzyKDruuU4XrUo!%(qq3CpEk?lMswCy{^ct|vSA?RPy#{cYWJ-ta z8X)=VpHTaELol2AM@a6hA$V&)DO9=M5L7LF7s~yz8l=~L5$aA~4FaP-3Hh#D4UF`A zh1L!jfTiJALc7uoz|+gmg`S%jfK;z$p_89i0cWWPLiuT{fM9#A5MkXaa6h?1=+2-% zh_tyWbnB!(P+qtuv|ynRS}QLLWq#8GhaxTtfpdC5O6#mp-9|l7@%e<1?YJ)3aw%Cz zK35kEtvt1?H|v5pTB1)*OJuYYW|+)C8Z_s0l?CY686Nk z1%3yu5^U;J08bRP1mB-h02$qEL0dNku=}Kf;GDPuPjF2BN<-kv|LGt=OCb-c2 zo-CBh1U9^GGTWaChD|%jDe6p+GX9Kg^Gz0L6+b3B-jD@P{O^-JEABybMT5Eg{D?$^d!0t7IWe1{5vkkiR<10Hdl*vW%n*s1H9)KHDP=Y&28Jdvc{g z(?^tiG*}wgWpc^GdeY#L>k)F^v=mrRi6R%(OM%JSx2v#Ah5a^&=QJx(CLK0|qGsr3zB|$>E7+H3&BxrFEBJW-+ z2^dSu0+R$u;B$9gpzEasC^$GRK*^N=Upc=7QVvJ}?f$Oyy;-F%rPT4PTO5&}}a zfaGs41O`tflB6_+K$%kvNm@t2mp`bHe#!Z09e}dgczZ+^6|_@qCZstxOCJIuS}D`baFY-=o1NCu)0BH zw35L3*+QaC6$yO2l}Bv6Oaf3y7BMxA1lUR$#Op^$;6Ya!Q8JhW{7&$Rty@XpuN_2u zy@3QSF2)me^hm&@GMd;SM*^K;;lw9GBoL;ymnb|#1Ok0~h}lC#kaNb1$bC%&#?J1< z+mDE#jo?BwC?^8{T1Vo)d?J{Qv>~$25J9Sz1@Rb61j_wuiFVOMP@cJp=o&->cCK2) zq8&ugEvQP|>PTG4Efk1OW-Ff;BTYQ1O9XsoNRenIe9t8Sddp+N+H(YOk$0camP!DsrgsVDFaZ?*x#r)%m_R&0+_KgBJ@)U;K-sL;Ut9s<|;G^>4F51 z7^XsaFF*i`s`7+*5@F?aoBG$gz8$lv&L6Oh6?#@{oZzo6rOw-+BiABC=dbzT&n9EJ*`h8GUB3_#D9!NO11 zkC5jX#f6i{dLfKcJMSL#20HV=ecnp!B~-tAd~V0CXOQhu>RhJBV<@nYGbcj64|%yg z{!*Q;^S-(3xqy zW6e;T|T&h6X79cHCyaCKLbQ#o4+F1@|>%f#*Zq~|$1zf`;&O3LK^9@>AUJ?U0t z#*l_qO_IxD!=cGN`AL;2F9$zuKAyxX3m=^S9+mWHRAg}L2JfUnlahfcTic|%b4~+e zi#kbsp|79aL+MFS8ur;RW$x&(y87pHKK)0hJ0A6)9&A4P<&=N_8l{^@e+MmpIxd=V z)PGCfr{Y^jjs`n#_>?E$dvv|ehmVOg+oNpc=tsBboTJ+s6+Y^35Irg^S@%IbXgm=< z;`PB{!<)pp-*fK^pWjU^PRV+|Rs2$7yOG&@A3<(n!Svg{-m*Q3LC=r$^-9_%ZmMJU zMQUm!o_kpH?$(%KV&W&ycSYgf63nINdJkTHmLL|G)hlzXBw^Jvv)*#`)P!EgcW-yZ zh9x+CN_fji+LTazQsM2=I^6`nUG+VyN~j4(*YEDB=opFr&+K1!!Ht&qW!JoJ`iATA zeUNpxG={~?JpbJF00hR58X{dfYi;7sl&g1zWGlrxxir5yesAH3BYEEnq3`XHmLB0Z z{miN(Q^J>)|^&^89*1i%?Sc)^2?&&=4 z{4Or3`oCif zsyDr~{r4jFFMF)LgMTg7{KlE~wq|bZnH?tWTN*rKHz>V(5gxuOHeQhX!r=`$Hi4%4 zVtn#_OoB=CbL?3~Oc{6ob4AbNF}uFfp1;c76H^jd(bkY-67yc(vu)8`G)8N9vGr=x z=flmf@>^g1s6PC&-=Q_{Me5-mi6756d-oi!3po7@tzCP#v)klZXA|Y{*6{Z&+9~g& zqc!1{BEdV+5k#$)eU?ac0-^mWU*9A8rP|@AialD<1)=g!oy`}b3|>EI=IneCRkCMq z^K1RQC}%pYIkX`%%JEy}6G7pPQEvylpEQdxqSg{gPo6#>JapQjq)F4E@(}0F)~4ln z^pLLA+~cTy?uWXjEbsw{ z^GUc$19o503z~|6*qrAIt z-u2M-@0;&#&JGW?>zuE?;b{~aI8;>K{N~R-KaHK$4H6CeLeG+`YebQKm4=m7y)BOW z4*dvfk2j?~7&S%I127z14SLR=ipK7-E^r zs}TK{ACggNP?7Ni}zMA-wc@L;7sSITI^ ztAafY-OElJjR#d;B9}$jmIduIy?f_{bW~7*KeM7{>-l0eN(NWXjjF--474O6ul79*&Q>f zSF}%e$Y-i_==u(Nu1{!o_VtDbJADM2+^=_-NcxPaie0Zh-0JO7`{dfC1jKu9GWXgI zr}f^OPncd~e46%J(>7lC&+?|1olQw$R&cP_&9T73l^U|w#csvI6XIRFjAweT+MG$- zRqS%+>W+`LyV(7kug*=)dp;`>y1MgqnP=;*M+Lb@_j$VgNGe#VwR>WLW(61ZyLM(s z{k~FSoVxSs(w!^2C^kC>)Wfg5E}Zd*L$$9s(r$R1P#Vr3wDI?FnYxnSWi8_|K-}~H zetO&!kNetjZ#wQT$35b>&l~q@AN-%+8uv`&zGvLKjQfvq4>9fo#=X3_9~bx3;=Wki z+lu>BagQnP6UDurxL*_ZT;je--1~_87jX|F?jyv#fViIz_vGQeI@}wF``d7j8tya0 zy<)iE3-@f{zAM~2h5Mgy4-@V~!o5Ve9|-sK;JzH(TZ8*!aE}Y_Q^CC^xL*YKeBizf z+?+^XqYrJkE2+x#~FI9OsPVyl$%Y9v04}!ue1*rwQjJ;oKseAB1y! zaGnm%wZZu^IOhfDt>D}foIiqdKyV%h&c(p_6gVdW=QZHm1e{-ha|G}`KfbHS_wD%3 z9N&B6yK8*^jPH=~Jutq@#rLuJP8Hva;=4_JKZ)-c@jW5F>%;eT_|6UAo8h}Je1C=S zpzu8sz6-+lIrvTn->cxe5q!Ua?q<(jrXweJ~ZA-#{0o| zPZ#gY;=NV8KZ^G_@jfNqYsCA7c+U^-+u^-8ynlxG!0Ze~_*JKWLBGKj=i|U#QLFFC;&`2*sx@LZixyP}r>n=&$JllwUs&?N~n#$={uW z#`Wf)o}53>OW{Az+sIjH^3@Eaw0Z{eI`$j7-Zu>i>P$ni(Noau-AO2Ab^_90GXV|k z9fyi8j6uAnU(mkqKcPUepHPI(4=8Qpcc^a1D6|kb0&NNZ29+K93TYl1hHi#^fgJpY zpz*DP&`rw$C{g`0cnQ(H+aZCe=a4YJ4Pr~RLYs41pyTYPP~YVz&<2GjsOr=s$cpd~ zdVio1N_%}Day71pG|$|FBt~l>n&n+cIkgJ1ds6`&WtKxNJMTbRXKq2+Pj5i#e@dVS zYQ@k&=j)KsfkH?$r2zVKIUky<$b)E)a-el>m!P z=e9sUCY>R}O-|5>TziQ4b0d^)VhycHw1md)nL|y#O`&pKW2nYw4b*eY0HWQ|gM43U zLoH*PkTXRc8dhLKmvoe%(6tKCRx>8F-Ao#aSWAbl>WD*A3Zl?%iZIkaMuxbrh>+=> zB_1_pk@v@Ejz`d&;c3iF@&fC|c=r>3@Qh4HcuhaQ@FMdDcxIbF@f4@~c#4^Cd1l64 zyhH7syyk#*-nz+FUh~nXyhvgbZyoZ0r?^zlQ;x0WZTMEjOWaY;>$-o7w}oBG8{}Q* zW%d^ELRVep?c!$h_C346J12gQ_u1_}=GXq{ccAp0?ynP$*UA+r$-!*3*Gu44Nx_=|@ zqx}Znw1PQL@24@3Uu(!C0exP9tu`;1puyX8Ple|m!Qw%ROy0|<44!ScIPaa92=836 zATP$6$cumVmz(c5#~u4R&Gio(=l&V_&aDjm%02&ffSc>|k=s_$%TmVzZ$^s6bi^yV6F+(CWrK|QUN3Z5!=I8%`u?7-yG|BtBq@W<+Z{6GF~ zs8mW;DA_ZTy(4??z4zW+uIajR*?aF9DU=bJ*%d-UMP;Utk(EvP_4?et=luSNb8feD zUa!afxqdBpCG~RfZ=v(S-0x2X$2%S4nD%yY-$FNWBbQcj8wm?IS+Z}qwulLw`_U(y zs>d+Sc&s0nCjAC?rl8~B$3rvDU;hOzu(S&IZ(GO>l0idbm+F4V;g%5>Eb}EKWl} z0vE$5ggd#whkN>q0~h~}3HP{+9=D69!r^tV;A9vs;DqN-;T+12umjFJSP!Oktm3Di zSmW?H?8Cd0SdQ^e*m=}@>=gA|EO}Ko7Jt7L%Q0M!B{i?ca?O-si8jSp+KF83vR*oN z|5XB3K_Cj-pB;it{DZ+JTLxl>8@#YumtC-=R<_vF5xvZDHc)RxqPeKQI;_ zr!X8nV;Ir8_n7G1J`59~3v+DMf?*J^!w|`yVfdyWVHhg%F$R7am|>wrOv+{?Ca>ZF zX4M*v3A^HtacFkO#Mn4s4*s*m)Z`mtYDBa!2YpJISd)7g=Wn8zIA?y$(E=x?-ku55 z{Dl@ns(B6bsF@TK!*Uwa8gYo0T-ZXB++RW8%>0gi@N)t!DDn|45Il&+cfLl`owTCQ zNYtaHy(`hL3QEyA{rTvw&2+RlRRa1%AOcOJfkzW;g3uB^-e^UPGy35JYqT!W7_Cpx zMn6U>qqRNmq1DVq(V2>O(2_hHXn{+&(6~ivG(!g&nj(b+ZDsoh^_P1GwY#>8Qmp=g z`sqH2`oa7WCH8RuH5c*?C*%DpHX#Uq%EQtF68wWvHmMGqiR zFVuZdl5d<*H>Ipm=Ff~!+q7D!+(XVzj-_;k1b}Dr~)0zHjx~)G$A$226} zL@d&BiikWjfks~a=!<;N=Ylk8vPPzr7$HStG?8+i3dkBYNn|980J3M76Y1S^3mKeD zjodN0j2xpogJd2*2>O(`5wxwa7=-&h735p+G3dSGKv4EVSI}^1Q;`47>L6lGY0zKU zyr7@`DM7M&(LrZF5Q4;YgMuddJcE8oI|TVWGYhi4t{c=HtQ?d!BOUZvS|}(koja&* zi7`l1f+ol$>~hej{?kFdmk$uU>gx!S(0PPG;{<|waRi}7(T6w`Z$~g#yg)RdDiA%% zMF_3O83@gWI7D|B5mD2JLeLI)Bli0o5qjO`2=+!@g#Qy|gk-8TA{Zlxkh0=JAf#>~ zZc|estd>a;WG_zwB_ekMziY1qUZ(gKSUWrx_&H`UFj%fT@Zn}-pmITFpoelv;I-wf zK=J5=z**L?z)LOYz$Oi!z@MKT19R=n14rj|0^^;O0taU$1Cvbd27Z0Z9#}4RBk*q# zdEgh4bAi&%M*$q&8v&Vg3jxWV69JSjhXWW%dIIXyUj~fC)&yYsN&_nY%MI`lP70`Z z2oH!!zyz$m@Co=j<``hSZ5CidrW3HstQc@ZP$J;H%$)!VCDwp>71{t*WwHQixzhoi zB76R09IO7pl;8Xtk3RW_&h-0#Z}0FQ%YNZ+>09oPlrQk-Bv1AC{1WM}Qh@Vsvi9@u zpm+AS8a4M%4cGCv6;||rGcE4_I*iZXf`i3B?iG!{iRC5#){PUt)(6{uCYP7|5>u!A z>}f{*M$>xyX0E*SiwUdt8{H}KYqrnwlO2fjbK(#2<4#2QB`&-9rQNsolS_2`1Ucr@$Hpp_Vv=K z^lh>Gpe^W_L~^7ZmE^R>0r^8KTI-&aLK#P=Q}x9_+A7<>h% z$$bSH&-zZs?)yktuKFl*&H9|$_~7GJ*XtAG|I){Vui9t)d$G@jj0~S&3Nb!mzk+?< zr}+5{2|4)?hfRG}Ts3`2|H%4G#|ink(sKG#6w>>Yuw3ymdU(pG{l<>>x8$GRt!E~^ z_5I#^7k};cu9R)?4k#-3-Z{?m7B))q<}VNRUfd7zwo-KWPL8$m4ja<-79&&iE>{ur zo(Sgg9;#;WCQgxi@1HyCeV2F7>$cXi*OJ?mmpgIz-vaw9ua?IRUNN=hUW_eyUYNE- zul!b`S41PiORUP(tER}pYb!z9>ksO_*NC;Sm#-YB*H;F5ud92Py{-CVWdfuM)@|=BO>*>O1;MvuzHs^=#Dw5Q5{J05|-iyp|`FCGRSgC6H5+dWcLpL^`plz50zXL#r! zqCDhBFdo;qy*yfRHXibWdLECjD|#$ii+Y?Z=JGi6joxGC2AM~W{)xM2_@;Yp-FNq^ z)1Tb6&-S@{bF{eoD?W2KwJvaH4NP($2`9Qcr3SiBBzX5Vpt znZV>;NT6`{^gQd%YP9S2TH>dhF8x=x-rWH=?)PnOsFG^8`hbUS)3T{7v(Vd2j$Sq zz1LNa{d(cwldNVcC9$;;VfMUB5l@W{Z9NjSBlu zG&%OVS7Pk{p2FCF+jO(vpE9#o>QS@rt&p$}iRHHUbEUJ-zE5g@KyzT1`tzrqbHiu5 zzz2PHt;$Vya-?N;|Mg|s{UJu$iAf^uYJNG}x#Sz$S*a=8rEZGYUCdy&>lUT9YyEK6 z?!a@~7IpfEtyJ0vTLqR^wu#SbZCQkhZ4c{{ZRtcpY#-G4+VXSR+H&UU*t%VowcSSD zvF-oHV7sbJW@}bi_Lk{avSxMESu@&NSp3ENSgz1XB*;E zBOB`|O%GuG9Y-djs?wp%mGR$5ydc$Yzm%;e>P4*lF>F@;Qj}Jc`=_j`Yd0)^xz1Q--Walc z*57K$AN17n)~y^%Tz8bEssqw8>_2DAyE%rIT6YyJ|Mgv#6M9UR+EZ67g`NIbBrL61 zSh;_-C|>Ndu(E5kNEk1*5K~XHFl{DUY_a)SoQt=yNZr)3$kUg$V5;G1&3Eo9niH)A&C?^8 z%WHV7qf?2t}msy3Ag_*dMnwgQE znAvG_cC&jrlxCOjpEC2{UpKX)pECV+YQXehzR9$-=dtNxNt$VUFwvCP(AV@Xr?u(3 zT@BOIuOv)IVmVDE^r%gxDbJXG9oaCUj-NJJRU9<2J!m!wsCZ(+ZklcqbUM_;wcOX_ zP}ACk|CfddNsNREftAxFznRL!M)R~u@5H+CN0%w%sEvN(ABZO7#l2GFw4hYu<;@4i z%WmGr>C+a*t2%1N>usXOgfMi0Lm8$IDrG;(kjFd8eqWprxtlF|IN14E+Xg5j5d4~8p+orX<)m4@Bd&5x&9YZR#wBhwwZo`Re8biC%GlmtF8wL%vQw9+)`VDT@H5wqR z9vNgmPBtLs;tho2Jq#+brUo0%N(O(l1r0t4F&dz$FB>fV-q+`RKd&$NWK{nWu0#KY z)-!#+o7wuv#c=(UYJdF)fj0VbqMG_2x5f2kYS{I$t`z!-3@3V+_bYnR_|JOd+;8;M zN1y9uA`A37=wkJ{n~-`%hK_oczjXDsi86W~)I54!k7)Gv?w-*jYgyMNk(<<=?(Wmg zk+0X4=y<5xCZ3?nUX9TWU~$ncOEJ)WeIl#d=f>d>*2TB z-2XLbukaRYml`K%n+9XFNgg_DKkd@j)|$Dey?nr<9d_-y_6?3R+BIV9T8hdOTA%fL zwLH!1v`*O;YGv8SY6;jQwT7%6w0uoFE;hBKIH1lYe#C#9*b)DAERogE!x$p zhsxE$WYg8cDj%p-(R!+#2{BO%TaZ^1QoEyewVY0k{v3&#q3wohd*g(v+2vkUcI#SI z_R4%!lY=PLcKJY6vuGPto_Ff1f>%UU{WO_Xe@0$b&FOfz<=^9{l*I;DmEN|ED^)z}R{EM%sbo&fQsQ+B zRnpP&R_eK9rj$gcs8qFdM~V3rozhD7S*1(f>x!YWUlk3myipAPTCMo+p19(Sd$=MU zzprA=hPmRSY9+;8kGqOx>^BsfCrK12m9(^Lmlj-gDrHh zcMdkq!EQO&CI|cDU}GHYh=Z+gum=t{zrn6I*zN}V++c$n>}-QAZLpUOHnG9(HQ2TW z`_*8h8thPmt!c0)4K|~}E;QJF2K&xn!x`)}gDqyTw+uFw!EQ3xMh5%GVB;9<7=x{1 zuty9whrzBe*bWB!z+eLy?EHc)U$EB;HhIDBF4)!u`?+8v7wq7Ity{2X3pQ)PE-l!e z1^cpKLl*4Bf-P9E_X;*$!EP(qW(E7JU}LrU-;OHSN(FnUVDl90nu6_8uulp$NWso1 z*b)VMp|25jOa6a5mH*qK{I@p= zHYLGsB-n-o`;TDb5$re?{M%~$-yY+?%|)=Q2(}Z!J|fsa1UrXd%Mk1pf=xoOI|#M~ z!G0jv2n0KTVCxU;`GL(ou*(Ow_rSg$*w6zzd0-0?2DaP4J{#Cz13PPAOAYL$flV~9dj_`6z}`QfEwGyfwz0te71+1}J62$;3hYsV%_*=e^}p??fBR5i0}AXs zfh{Mn*9111!0r;*Rs#D;U?U0aAc3tTuxA7|i@+`s*d7A=LSRD(>;!==Ah7oXHhsWu z57_1b`#WG`2khv8tsJn212%8Kt_|3(0sAyyg9hx(fGruY7Xvn7!0rp!b^-e>V50@> zuz;-;VAtAGrR&?gu_UF!+J94=jD)VZQKta;$c12Z1D@W6ftzB@47fzu8wcHpf8QysYJz(xoDIWW$FV-Box z;E@A!9Ju1Z4hKFsFu;NH4J>cqbpw+dxZA+i27Wd$vVnsQtn2@I*8j|E;8Fv78u-${ zkOodPu%LnW3`}R>HUpa(_{+dp297eYl7WW|%wymh1G^ab#K0g1&M>fqffo!+VBr1& z+ZXt~z~}`IFR*rjrwhzn;Nk-N7WlTnumw&nuxNod3rtzy#sV7__^-ft1&%AQT7kz3 z%vIp30y`D>sK7u4&MB}=fmaGlQs9mPTNL=Azz78nD6l?(=LyVC;Bo?c6Zo3I&;(8< zurPsl2~11iRsx$6_>;hx1db%IB7p}9%tzol0=p6TjKE+7&LXfBftLtOMBp9*+YtDL zz$gR`A+QF4CkV_y-~s~s5BPq-@B>aCu=s$t2TVQS<^dZI_;VQWF%sJr7 z0Xq)(aKL~A&Kt1YfY%00HsG!STMhVWz(@lQ8nDiQX9mnN;F1A*4ESQe5Ccvau)u)# z1xzpCb^)6U_*=l(0*)52vVeyL%q!qp0lNzLRKTDD&J?hufENW!DBwN;+X?thz-R&v z6R?(mrv%I-;35J02>3?8Fak~yu!w*+1WX~|1_2ug_&>n-0gex_dVt3R%pKtB06Pcx zIKaRG&JD0^fL8-d8sN?VTL$<8dG0K)+|4Zvam-U2WcfSUkp1mGV4;{Z4Yz$yS90Wb%ED*)^O-~#{y z0CfJK=B?i4PXo5la3))`L?}A1bbhx0k1wAcj zWuGf`%1zs-Q&$y(wr)K{pE8P|$yZ#uId$pw$FDCTK1}R|(ol&_{v>5_FEB zWdyw4}wMzbbz4s13e#T_CS{h+B?wKfrbura-f9+y&GuSK(_|kG|-=c z#td|1pcMl>7-+sg*9F=w&}V@L3v^bXr2@SaXre&(1llIhFM&o0bV#5z0zDCEhCmkt z+8@yOfQAQjI-tb?y$xt;KsN*07|_3f#szdNpj81q3TRG1R|47*(1(Bq1auytOFR)FhMkK*qgT>Gmp-9yF*noPApnYBG*ve#+z`TDO?j0Ttt`j6$4vxN^tPvjM z&K}*pvqsp!^&UYT#A)0rK}#TqJZq zy?%6aeSwgh@b?hvCeE$>Aj}#L9?~p)C+LXR9g2UMBmBOR1NRiqYi0>wzq=e>NS`4v z_h}#c1x^zRpNYVo1%_>spc-`MkZ$KI0b#Lx(BJumFfBK70QDD+YU2dg%Y_G;=f(&z zTj2-F?H>uhK6}DlhCkydA?UH>K}p{*p&*|5;HT$%!bQXdxYu~{c#u%5IJVC!JwRCJ zZQHLMd`k$Vegt1N{U+Y2^q|^yK+6b1X{|Io$bMF!tvRK9jG_S8AvB=EYnTK&<083B3y;OX%_MjtWP@EPp)QzaZOe2(#Q4zY(%lgj`Pf-!ZM` zgb(c8a2Ip<#E8(vy0>LSV?aQ&PH*)RbP2VrZ?>RbW=lbXP|2RURZ*Zy@Z-d6VYihC zE!=i+N8^|*NBG9izlHlOL+BKu*{Y@lp>EaTBRSsvQi!g`%PYTt zJ0l_8GW>WX@t5hdNBFvOw_mwu9^#b;b>aR9SCWm-pk(|-znYFW7C-lEj6VfGZ1rmu z>XM$7#o&)BUas~`Mc^w(i&sy`{t@j*(QvOcWb^MDgtqCba|jZ@i;`VsCq~n zrj;!1ssTS+U4c!GEi#Udh8K;Cq&jm!Tdi^sW^C#CTwt=d2jsIH7iVdsGmQ@5zQc zsb6+Hcr^*vWkwbb{91s{a=;Wb-mO{`?x(_(=K)!P#q!aQ{_^2oL`8aBYDr@ClsF8%nFLlxX(G4ccI(V~Bl2D`}?{oo>=4IZwI{INrSf>Yx3 zfjc$&d)qjB%6mTo`qpq4W7&TkX)WP;&XB?VT9*1W4zoY;y{hXoE->)b_uoPvaABJj zaMyPAVju3;8v6UZS2s@8$L{;;U@NX|Lly4b;&IP$hr8FmbG>_tdxbrj`%U{8_w3Z- z9Mr)v7w6!su>>GY(Jo_1h}HE$+s{u5VCJx1?l<`#6yFtx-)I_uC%ztwmK8CwpWA zcXqbo(l`fx{%>cwMR76%G~cGF?&4Hk|IR}FoyasRZm0C!Y~4!+T$XbEtV`N;oZrtp zxXVL|UBbQQ_naL)MS{Ek$zay0_b+xAD+Tv@!irniEAKAO`W~%d1CU!Y3zhR&D%P(v zP{)Tm`vvJ7S(}0t)M#NLE4OU+~c3ANw39Tth^3) ze`|&R-uO2crxzFsvALgyrs*=Xux3dOa1SVojm17EjhJR!2*Yahc}**6;;{lzMsO#n zcF_;}{Sx~$r@cG&`TNV$3iS@yp|tHOs2>#7GRE$+yq>y}qJzD#`gDqYR2A#qkP3H& z*B-7M`nL8q+QXI-L|`!j9fpsPwch*iFs#uf3nK#8wM@JJ^5MdD<+Ea8r&`J zaSmeMjn7W3lD)y4Yweq0UvI-adRPPZj4mbB7%IO96Fxy@m?d-9iB`pj7!GA!xO3$G zkb;?IVwzA*jm21#Uzn)U4#TLO+V~3fk2;MAjQe88*BD1{%)`kiU&+W^FlrwX;VyDT z#}u>v+UBduvMy$=L*?rVK@DTq$`ALFSMwz?<;^EwlGubWgqFoG=1*>8-nG8}0(F!_ z1vfDt-xPj9QBq@)1|z?Cg_2=Sr{Ac;DwfvthKpW)0k9+Rt{PHPHXqz?;qJt0}IZMGT*#&7bMQou*R# zLv-{!)92UI*=X;xq@PpHq@btRHpiiUlS!6{wsG$opEbgu0}{)}w_NxVI@1J$^} zg6>Qx8CyM|L$~zAj?I0zhSvTs5bi_Yp--U|QHo=)lnzj34ZLGl$u?2tyHs#D`ZRtP z6^@<%bfo+lW#9SkQ_0bL)a z-ZmB)ePxM9&P_9nGMFNeR&M9ue)dGp0r@y|d?fmgITAtHIfA;bha@X4gS*<;iF?TG zcj%Go1`%YEqy30vJTFrJk2>7jM)A@kWrc5!Xzq|BJx0%tpqtMlUHpFyLmloF;hmt- z#`a<4@=B1r)stb3yt$x=vq^BDE4cMODAv?&SS6z;NSj1`xL2etXt7QZ?smysDuPOA z&JK_67X|h9uf8XV$PDUv@aa9&^S($43o_bz{9b?p8?;oJ`2J?RUy!*63hsR65Y|Co zSJd94=L~~Zss!J&YG?#a2i$=B-@Ys2K^|v*4ZU`|6Lewd(~v+XTTo0+`w-LxJJ?(c zl9xyt;wn2Igua9xvR(ay$eyu-dtn}zWkhDY&`?|cECT6rbLh?cF@%Bw3EUA2bG$-4 z`fvPQo_aGva<1bY*1a0h^`;E&i*xgG5ydH(cT-i#h`(5ecUi5G2rU;)xI0Gl2O#NUDp21s)rL2!`JS7X%gpgSaLKpsv}dY9x@L zST!K&+#48UlsQmH*A|%L`T*{ofBKgN4yEZ2yrV4${9P$EAl#A~$o!TK?x4fh@qsxc zd;NZ)fq_3cX8UI-+ymv+-}Xa&v@)Af;H}Kue%Z(BfhC<`{jIEWfnuv(a5t@Z?RH>_ znq0qb2veXrmb-s$l{!$YngZ^ra~l2&plUMo*4uj}0F&AXch+`PV*#8L zF>lLk2Lc`$2E0X;bp}XgTf+VI3!bL|EnNI>S)7UjN&{%$-pEZ4sOmfgciB}3ga8J+ zk9}$^h=A}HZGC>q?g3XWK7o5}*AT;i=$Gg|@hr6f>~)8}jEZ{!sR&KD<38!)3J?}& z?7P^@5YUl#p|7-;A|T+*Rxi|d$GtrEHyMB3`=x5rKU%S>w=sXgf3YqT?!Iq(5Bu|E zyZ3hKyz#$w)v$M&x5b|`QU>n9_r8?){|F}Uohr}rk3T->F+s%py9IymfjV)rlOX@L z@P;1MHV=O>vZ9_FNL&BKjA*zYkC;;P|5anz!xVGRU-7hh-OrsW^-cJvalfS|9NeKhjduDy zy`cN%zIwgiW}U>FmbP*~j2$c7r$=X|_*uQ$eLejr!mkNA`}%_o*3aTj|7)mQ&!=(p z!xZPg4)iefJFtm-z4B7iuba^i?%6waMEoQkE52q-<@WpOdFM6LD1+aE2rb;XUr{*c zH$1fR>NxPwx4q!gtAye;-#@+`ub}?@(Z-l>(9P6WT-OGCYj$w24EQ>H+(My=B z_%6;zcULM(`I=4ybid=}_vQXz1^4w-8#KPFZw0!g2QK=4>$}lSQT*3Oyq^T_?)&8z zd?-GC>8iT?)hBcERoDH|cRnGDm2i)b(XIE1KTGUlCN1}=q4DfOx8?cB-2OMT_HT_@7V5lPkc*}=o7F#T^Q)bGpX>-*S#8SM-eQubN=+u9lYM#5)?;|bjL zr%W>Wu;Q_uHFi`!zLid$;dAGG1ZQ;M-rsb5&6`S{thy%x?`wLjk-^TPS5!2WC&rp-yn$E#8z7xoHFX^p((m3-UqXH~uChs@i&S0%mZEtFu# z;8``3mkgG^?I?!Qi}xx?8@2s8ubR^JR>(J~KC|kH{rb9 z2SlnyPay}NR;i(K&$&zHt*=7!Jb4=xVGluRF2pm7n!Z&wHqf)B?`-R(yDpwM{Q67C zNuc-A^qkpz{nCm=){|IW{SuKa;Mwbw1N#Zg^)#N+`#vulq)9!!I?Z1)cOH2t#45qA z0=8w=;|JG`m+k@|JZg?eUJ5*VFzSj+#DPn?Y{8+a`UZttUL4JUK8X$kQdpwzrQooWLKi+uBg@AlvAwW zj`Ds4yAWMzobD{mn5LRYI``~3r>5wjOYR@9=)qpZuFASwst;#V9M3m5`bQK^S4cm& zxlH_NgdB+v%?)lw`X3wV;>z6ilRFwU&2!wGK32fK1a>*tEzd5b5%tW+&Fz_Iqm#Rx z+o?kn*qtE%s_2%Rf2VOMR@ANFH(euMg3HZElLYoC>Z2~Xg`b;jkm32`+V9fa(A>M` zIyX=YI~9q$Bd+mz(G5$HuUwf)5e<^m^{#O!TiCDYV9j!!w-IaDeH86FHqO$(#)5S% z)V~6|7M|qRu3ftG^${UDuJj*=>vPxSTy@P`Veg``mDSb2C$+wvf!dYjFTVa2=A7$r zqC4zhyy04MdH3>u{VViWms`es^_@KfE_%OdVIQN#u*$_jbmK*1dZCN_)H={)^z(r}M;61wem;UHy0P z8S#3q7IHkQlP@_>KW(WkcQ|%B{pfLRy}&Og=E4-%_c+@<%oBrhOhv z)#B*>;w9-iU3trQ@hvLJbS2mSbi-rsiCf zjHB0-GwhIv-@E0g6Cqm@k$T0^a^`l;{*S*7!BVuaPojmJark?@Q7zE@-oeIxs#@x7 zr^9&v+iJ)y>BSW}TrDlGR?HuaxhSdkodJf-?<*IdK z?mOJZ^TEzZ_#0*i`j~Uoj#JkhI;nnF`E8zZ2rr(gg8Y-~SLW;kdz-52Xh!V|tV^r# zH@fXt_LE^3rGl>5enZrw>M~`D{nM`|RSz!^?PEg}VK2q`r=5N0XNIb*Q9XN_=!;b+ zP513Hr1vTzN5vn*Y)?@+T!}ZjW>46v zLR*=(beh$JxeD05K`;4Pm2yXvJ!!GEQXUN`lZw)@QpMZB9!?G|pOyElbeYq{4Xe}) zp0b>ri&i&vX<;Yl{*|AWX77GKsqY@Myqf&&Nm{@gOCHnrPar=hyT8~nZKL8zhi|gw zd{@>JL&^u11sM_l-__BwveZ(ye^N8AVX45a`-B7|X<2&d9_;O$%ern^^_A{PE%P}` zliu@BMxSh3cs2eDQ~uB4@hcy(SbRA0c!RCeLL;x^@nT+;1#?a%?DI$vV=Y*Uq913h zqb;<{kdM90TrJk>oM5*nibcsH?$iCpLm@&Iu`B$Klctz0PLbS#J)hW^zvlY#hox^O zR?YdHf0hPwPnd_tkCj5sk7rAxdC@{`Y3ZL*b7$IzrPeZO=4D!mu>WIP>uX-z?NOSu zXl-tB+Pu`3PRl$^Nfma1u>RcUp<`^NBiYx@rPwG-tJ+A+5r|W;7j$y?&CHi&`VoR^ z*h~;V_$ZL4-3&F=0y{z!nmJ~vk24?DnnanolSe$7wh1!p4Gx5Tp&2KAGdc&oNA(VJ zX5z@bT|}&4zi8~qT~p6E$&yX) zTc#Q^+$B#0FPnC3UWZ+yAJvN{&Q3eUUT&XEa@l?qr!c-Uab6rPhP9e6CgAL7p!?MOaW6!^xu%~2Lg*3*UE__(Q z=45R{Mestw>X))KXN*gQ#ZY^|yO&|Ch3@pWej*k4*W^W6yl==#G7 zn_(mVx91)*HnkZ=Z|)R9E)$bYmXVa!$D+#0aHI4GuZn){`y1sp*1}#>e7KfT<=y0> zwH`^M7XJrDBqUr$K}|le<7A0EZFH=yU6l89-LS7vrYK`_(ok`m7xtZ6gc}VF$}SZx zSUfUZJbzR;L`XK|_gF53+^6w255o!Rw}l7eriS;QHWf~+DH&QblodiA)Hezy!`91@ zg(OU5h9}WMg}=BD4UR547eY?dIpL26jI>IH62e^uYLA2q1q7-L_=VXDAwLSi9A$9F z=1gHX6~aL6aI0Yati1tC_FMtvN?A=v8IaF)6%2QA8F0isFSt@lZSY6pVFBb#t=X;X zuN6HgNRgVmCJg0ENgiShyz`$fTAV-T^L{#_9k!;?>d=}mJGI#S%pSh}A z7s`|e`C6f`7j-V&IF7x$Db2Iljx>KjG>sv15Zl$th>l`AxbKU&Ib*4Yp=HBV> z(Rrc_ZKrqICLiVrM0wtJ4bkkgf+aikr(qLh0?T-0{;5Y07e z{GiRh&XEiGT`M%tv|UeM$mN#L(w<1(&#`q6(-vZ1%7I+3=I55$=_dU-Q^Ts-4|iK~ zj#q`XQ?sAuK;GBgn`GJoD{(o>{0Cao*}*yHvh!Mjn%+5(14cA%)3R&R$;q%P*J{Sf z-9ZHXCxr`0R0-lNhV)MhRC< z8I*Rm_7y|TRJ3e1_Zkv_=_Ns>RQ@t$6H>t0_!oLLOR8se-!GwT{e%+x+Snd`+foHNAS;`om1fNwcfmRGXX% z%jDsjQoCpolzF45PwoDsOD5!}1x6OC^(?Dr&g{mhT}Mf01~>$%`H|kqgj}^-!dhx7 z;@2`ov&7Y2eL9_qJz!PSKyGJ1-db|qp(?RwJj4F-f~sKP+YBfB5!DU$ml=@5c0y97 znwwsbk!g^s8fB1_;aGrI4W}k%Kt5aUZ6nnerA`?ayya9E157fWR^C?SQ&!7>+_r4C z)BiA9-i!r{Un+s0Ze@5SeO9^HM4kb8ZoHdSD#+;VbQgvk6 zkRvx_d0Ba1W;)G7e@}^oFq~$rG^Zr;x;qW>V4MN!uVRQA&T7okq7CucUuE zE)8<$Y}*}_BwBpa9u#ORIo)(f+r~;LH4=@|Adhb1&Q+!N7LsYYXAc!KhIrF%j{i^$ zS7JmnyswFiw4! zm!yDSQB8#$Jc|V)1hJa( zDr{cfPJtVn@8J%b)c`P{*z6eU$1dDl0g zDHXjE@?PCRDUh=_(0)ap?X6`>wCKV8@llUO6utlG=R`8(^~JrobpL`;ck&V0 zu3S!Xee$y7ten?qSu*7KDPO9W8?#MJZZI#D^Qs~ympzG=Q~56_8S?#TB(3FM)mSE{ z5me<|uIeUdb_>es`YR+u?w{cO^Ku)CJjwmIP1*7n49TnY6S8Go*ODO*aEPf!7R#`o zl%$^{t6Q*=G!+si>&-fo1UZ4sUrc2~C3}+SPASL+4>l(iaq!7@+E*q)exRNEDOs+( zw4}VKm3vyUQAr+;KHY0yz$QVi;H!`2_afyTl603+@6GHQCj}e@-;1bLPlCKb04$ovS4N`ySa zo8_C*ha7!+m9>!C+P)ZWl*W!);`y=rn=6gKkH1hBcOH{ubjBjmkmY79!#Z&5( zNMKkR;vv70&Min{KB_SO?Us#1lYCmd0!B^Z_kYpxkn5O9yeUy0;~yVz=9~npu}l0- z;<`8~hh;qEJ$^xTi_?5iieKM&DlS_i89(NnF8(Q*KOS-*=`>x%)$HlwkuUYcIrXl@ zmvc#p2P&S4hkVHRV={3I@n3QG9rna_#pmJ%duPQ?-5ZaC+(@sOIx%;nuDI}@d18Go z4RJ`t2(c{u(>TbJ+}be}OKeV$!)nNjHBQCEeJ{8zrho219OO*u%l;LecXW@lh+7n$ z&asJ89v>Ff{A3sh`I9})C8AL#vT>GA<3vphh2y^bLWmZwaK}L|WrU}yXi73wTvM5V zsN4!^+=n@OQD?Q2Sjek)OXy$gzA&nIfV%*%50c zixufItB;*?brfltsECDp%l3Lv5$0d%v9we6LsN*~vys*kO$j)A&M6_))eHZQW!H99OORz2?+Yp-xYCkMwE$mf)mG!YC>*Ny36kP~#QSB|kf;SwDDA{_&{oo%g$ z0#bLmW1_RZ3n-*k)|0^u|DVf<_O)qRT2GtBJ5fKYqGDHN?;uA?qs(z!cTRQWML~XPNyY)+_a`w?x0vVnWJ*G! zK9%?L36`LuAlG!aK9_I3#yQGSB8;!8-71Rwr6=F55yL3RJLPJY;p;l15S1aq!FR$c z8Kqovg>OPtAPRC&{fcIIeTo>P)~NeMn#{OnPw#ta#MwFvhp@Ieu+E`y~K;SIuc2?{QLGNkG@FAQ)PPo`gX8jV9?O>dK?Kkt54|9flUR+juTpat=DmrKyZ?u4Bfc#H@?g6P z-*IK*D$$dqOC$F8^11dy@*^N8c3I7v>q=I9M7*yt7gI%e#KZJ^T(h0Q5s)9t zI&p=|``9ZYFveza~}0PF?dP9CB_Od41V`Z)Jtsu$r<5L1Q+#P1e!Vo4EjijGd^Lf< zmTjpU4tcqj);eqx!R89v(S3#;X7LR=Cj9 zc2*0{E>+YDqdasZ)eD7WmtL5X<;T*KqtP-_HVUWA))x*ci_xV>?R4z5E;?_c# zs?Q&m8`oyTAdk0=;vLI5tI@E)xfd)qVg|xK)#R~kynG!7IlUQbo-7l5jbZzghAdlN zHDMQ~q*(fE%fleQSJ2}UOPhLLn9kkb%wO`;!x*-|GB@rdgh8(Fdt?Rk%es)Tda)Gd zZ*7(9E_9lE`n<2(bVMiQckQ=-@$<9QtPahT^ zMaGnLmMUyZaEEd5C0Q8c3119*&6q2GDy)O&8RMP5hoRELsf^Km+o6y%oOs=VG27#3 zsB5!2qn6@a=p}PO#sTKZP{GW#9_Og+jh@zyyY2Y0)=y%E_J~n8_oQV_l75#>y!aa*qxF z(lU@OnuW@Q{m1ZG&@l8I>Cc-1q1vI4hpce5@g|j!LTFP`!Oa^fGNF{$B5rQ(h=oE< zGVUK>Pd3OK8W$^lQ~w@kXvBH8o38cDp^%>}dAxOlq?RUhH}LC?c(H4t1*=^*7P>Bl zLay@5&q+5f&HopAR||FHbMO%{v(x4V^2RO^@|GnZ-MMkwX@!WUqPcPZ+5)jM^bb8x z_bd@|n0KuQ=>rAFh-3qG^q)3|i43B-^p_e2h>*|BP3lg+so6#3^3$U)W^5(0eio5R0FD62s^9pY%UAtQraWO8A?z%%NabYEZ zPT4Mj2szKcAIsBmc!m+rp5dYUj3N+kT3@5Hi@^{f|Jmi*EbZP)Ut+FXFYVb$58^~; z746c0E=0(MCVB?bN}5>_mpdJ4pTwCG?Widyuq)T=huWRDOh=uZn*9l{S#JYrt>#-tth>$PM!e(?`@H9K|ftU34K_4dK zK|Skrxw#ue$eq5YxJA?aiGp}J<_k@`@fG61P$x~nBqZy3prITOdb6GbqM5LOH!Yqb_{O~VN_qH zDs^cJ5yg*Cz1Dsa0y)^n-wUY38V=fCxQ}(9XzVRpo^07%COH;jJ%nM2R z$V&BxD=WnG^d%~4v9u7#%}%xWLiyb;F63flCuI&kDx~B26H39Nun@@8o;w>vd1?z6 zV!&rbDanEkAu&>C-)<4Arf@p8 z4$(5speQr22;oKrQ@pD-34vVh_GS%=wjkXQ^cO*jsBfAf5BBLOMD^4{Ag>!G{PUWm ztbB;O-ur7wZTCVdy&A6d%SnYmjyLC{uxkrO!XdWp9@pM3-VOORu752N&ldvu-see~ zul2QXgk&&XxF%`K8WJqFPX7ORI?re>|G1B*zl4@Z5v8HDm$XX~NhwlF<+u0V>l$B_ z1`R4Sq(o9w(o{lHQG{q&m642$i0s?d5WC+#^yen^ zLd$?{nmCiD*%JdUod_{0sWA;8_P}@D_chri9v$%P)kc$FYmEX9f3`EBk1+@!cEVS6 z{~c$XG3YmMJG7i1aF(*Y7=|u1Sgx|VH4bIVn?0eSQETzf=f;8s}r1Q zf+tOIqlw*hf&)$Po(ZlqvByqunh72=!CfYH+6j&_!AmB%$i#j-!8s;)#ss&R*mWm3 z!~}1c;0hCa?*u29-~kidUt$NI;P?`}UV_U@?86hBU4o}eaC3>>c!GmV@NNmNEwLw0 zaB2x2Ey0~7cIF9=EWwKcSvvzi9LUUQ%LX#3GN`V^G|RD30@$<1tj|a1m}i{NPy+$MBJx`Vr;6ZF5!@+)FGb{Rh`bBIg(CP*1m}t1 zIT73@g3q+g`0Z}_cI&HzUrzYegnvxjNcen&-$wXeg#SeNK!hJd_#%Wq zLHGoOUQg)egnmuv$b_Ct=&FRiN$8A(-bd(eg#Jb7P=p>t=rV*pLg*BPUO?RK#QjX% zvBW(|+;zl#Mcg^Wy+OS96Yt-|dob}nO1u{m?`On&67jx5yf+Zv-^BMQ@qI>ouMnT_ z#OEx*3n4yt;NAz^^nkk^aGL|}Z@`TWxT68LGTN0q!@zjRv^G0Jj$4o&wxVfV&8A`vC46zzqYqQvkOJ;NAe-6o9({a2o*j z|6#`;_V{5}ANKKK=N|UzVRs((<6#FL_S|8Y9ro2>Cmr_AVYeLi$6-et_P}A+8}_+j zXB+miVfPyLt6_&4_M~AK8up!Gry2H^VK*7}k736c_K0Cu81{i-=NI;RVRskyb72P; z_H1F77WQRfCl>Zz|F_#Z)L(@iRoFv?T~pX6g`H8@3x(ZJ*zbfLPT13gT};@wgq=#* zn}pp+*nfl_N7!S8T}9YOgq=g!D}>!a*bjsqK-lwxT|U^?gPlCsyMx_2*q?(PIoN}P zT{qZggPk?lOM~4r*e`<}GT0M?T`<`9f}Jkd+k)LJ*uR1uE7+rgT`Aayf}JPWYl7V+ z*iV8TB-k^8T_V^Qf}J4P`+?ma*x!L29oWNxT^rb^ft?xHi-Fx2*l&Ry7T8mPT@=_i zft?cA8-d*r*#CeX57^^?T@BdBfSn82tAO1J*pGl62-tIgT?W`!fSm-`JAmB+*dKr$ z0oVh8S$~-4hnant%ZJ%}n6HN!dYF@kS$LRthnaSmTZh?nm_LUZbC@HCS#g*Lhna7f z>xS8Fn9qh8Y?!l#S!$SBD}~unm=A>+P?+gqcN{ON7}&m@kAGLYNbTSwNWggPA^<+k@FWn7@M=JD8(`Svi=8 zgPAv&YlGP}m`{TlG?+7kSu&UxgPAax`-0gnnBRgKEttcCSu2>Qf|)6pi-OrFm~Vm^ zCYV!#StOV@f|(+i8-m#&nE!zpADH8TSsj?ifteeatAW`Wn2&)O7?^W`Sr(XAfteJT zJAv5}m>+=|5tsvkSr3@!fSC=L%YfMnn6H2t3Ye3CSqPYSfSCrETY%XFm_L9S1DGR# zSpk>_fSy0}^`UnU{dwrYL!TXb>Ci8So;dWqp|=hFYv@r!9~yei&`*Y*G4zF@_Y3`9 z=;1=27J9MJZ-t&J^i82R3jI&$aY7#xdX>3W_6_xIs9{5$ z8fwu{Z-$yO)QzDw4E0~A@j@LJYPC?0g_%e;k-YoDgfwu>|FW?OU?*w=YbPn;qZVWv}Lyz^qAo$TY2z+`60opwXyt@WL zdB-3y|1-o0Zy5xa8VA9zxlA#PaVAXxowh#U555G>6Y1dpE# zg64aJ;M1)^AdVdbsh0-9gR_Hx8Zrpd0|!B#b`XR}20z2wHXxG05BoLBje$ zaB|rou(cZme5*mg7&i#U{x=A?odZBwKLD1N4}dH02S9q}063L00LH})fKA~8VAhcV zkg6I01FQk?*Jl7kxekC1hoPTs2f!1v0bo0P0BmgS2V*Py!O3_1Ani#%xO}}IEI!i@ zWOzSd@%q6ipMF4f>Ia+!{b1UpesEl`AH+5G0rAH^(3n2NHB0CNU7>y8sJ0Khq4t5) zt$pCY(mrt4q7OV69AcgQ>;;8+z2H|$FSvKU7tF_dfe*bG*t_+D%muw*z@!)a?&txh zzVv`^&w4;rbPos*=m9NI z0eA9W@TRo`e0tphBBDBgp{xVU+tLC0tvWzpYdd(H-43G9w}Taec7Qv!1C41rm|6P= zfX9EpiQ|8O`++|ob-^F-wZ9D{zHb8yue1TGxDB{Cwt=#-ZD2-aE3mxX3bK$^VC~)t z>?~SAO>GPCy59oC{w-jGM+?ZXYyqvc&7k;RGhk!QAjz#6#F#Y$x60q(YQk@DOZFQu z*8K(rBYuOX_e~%*vI(rBGy(RUCg9fE2udF}f+?U8jCXAWk486w(Zvm5!i5HqM`{2o zY#V@QeLb+gQx7i4>cN{8^&r0I7g&-03#bEr0q*8sV9dy0fSOwe*dcXbsz)6N8e0dV z3w{Dl=uc4X`4gCo{|SB<)&gW`DEryYA@1DRTHuji1FnYDfVizSz;|Q~$jGh+p98AF zl?~OvvbPF2Kdu5c@*ytWqAJi({{wuD`vJ7%AK;zk50GE{9R!^G4r*P$gWkb!AnVCD zutxd~(C2;w8-7%R-1C*dz_Svx8&rZb&nrNcyaH6utpMTQ%0c(Jaxlid925_ffvxw; zfRtSZ+^xz$$@@|;F0d5zEiVNZ>b`0 ze*jOTKY;eFA3#M%5zt&I0m-MIe`D}4X_Zt0jjZYz>&MJfve|h@TBz>C<}cB?k;%+9161mUz`oR z$7X}3q?cgDwwGXOeHN%Zk_Fb@Ek-5o`aqd&w=5UG?2404XiGF1`cqZfknffft1Ln;Mbz3px{+1U>{5c z$$y@J#A8pu-lG?ej|C62uK|y3*Fa=Z3^=nl1~^t+ z1yQuCAhGTW;0vyRiq>c_Oc@PI{#^#X=w%Q(7zH$eQDFRtC~)BDC9v1%63`F1IK*wd z2xKQO0Q<2Q!1Yt-LC)Co;PR{N9Cu$@V%$NVBtw{$NeN2mwf_ETYmyn zKMVnT7li;UJ{att8Vt(Aj|1~D$HB0}$3RriQP3bc3hI9z0T&J)0X;=QV9b^vQ1t9D z*s|m>5XBt=t`>(tK}aAl9t;4T(g1L-#vfGs3_Upjgs%bMUm^}hPr<>5lNi`KfC8xq z1=}hS@W}%KX3up%Z-EY6y{HAPhFb7Pr2+9ZYGAxe4W?(Pz_0l#Ks~PnA^J+dmMB0+ znH((JA_p^4WZ445C40?RfDc)x#W&o5gHJQj+w zANc9>!7x4#>@MPh{VTb^^fCt^!#NGlLEu%%Fq) zK{Rl$jym*RMg{Uj3ivjf0(ymHko%qlwk{?C-Dy8?u;n0V-Ek1CxN`t37;^x8B^Y;gy{uI^yf<*nd+yBoN< z)eQ))YysapT!DeRE2xNe0nGNz;L4WGAmoxWnA5Tes5cEg;Z9)AuZwbgd<>8 zZUB{wH-M1=>p@k~Iv|>{4kXIff=gLzz*^Ha;1qQ=2uofCwhXQWw>?&Z*Oyj+(0T_j zYNZ2Mb$B_LSY!|4r`UsE+-0Eb;ZgwfhWM7-mw<}M#UP?;5zt$>2uxKk1dW*s0N;24 zi1MBf@Thsfw017ow{R}lshk7;rP+a9`gVY{Z8oqzGYf=#u?2}!Z2``h3G{Bw04rOj zgQ?4>gGZWaVAyjT&^OEm+}u1B7#^DfEZ$jz(lORxho=>gpP3BYODw?$b4xIKuLbxQ zISGV+nFwkuhMs-qAmaQ4(DT_0jGJTzKJ76DJI{>=+7BjRw}}a;@)!rEhl~Z|bH;%C z`eVRIr_o>xHVR}vF$N1ejKG$~M!<|`2*Tn>ANP3Nhui<|#ox{7#m)Ei;NwqrT$y>zwoX3b@qKXC`2T73PX8ocvvHBK$B!g0eY z+++C9}ND6S3j)8wcji7OydeXb$L0?AeG^nM@#Yd$zSnPU%%kPhJV3r=Y7Vz zy*}ao+K+hZ)e=1RO))`jaZr$t|7*{~XISLngKOX6 zC&_Q|{J>m1<9ZHG%Xx!8Zg`ESkA97-7rnx(c4p%Pl9zaXSQhS)@?z-2Arq(n$-w`O z&%hm*rsJzUpW`*6G<@U9XZX&+Q-I? z53ulkeoTBHnSmQq>9~kS!w=J`_;v;bf5RZ-?F@x!(Fy2LfO;_7Og6ut`YIldBi!&l&LG6%eexg00?+T+UY%kT}3OYzjDOYomF z7vrzY7vVl57vdNH&BsIQ=i#eL=i+DH&cUOf+Tnh;X5;x6X5p>JZ1Gp>nfP|r4E)IM z>9};$G<@6=8=O34Do!2iwAbSFy>t%+& zSZj(4W{t;l#+u-tyT;-dzK_92=Z?mg-5Z4)UoghQ{f+PFu)&JjliGk z>Ep7x;dptT9^QR#82%<=5OYHYFofKXQJwp+?%BPVvvCjR_mTj0rPYb3lZN_*{e`6*Wn=p>H5tHp}z!tBp$D+-DVVUhev9m?B z*yOu4*sc@R*m`aiR_gKtn>*t>Hh-WJ`~I~8bA4Ejkwb@Qfc#P{!R0IV#pVn4wEGjb zv-l$xkyL_(1{GuLNFT6^D~hnhv4xoE=XW(# zVvjq+vDl1rnA5Sd*cs0=ScF9ww*C8Q?7@vwSb^x|5XIyKHl;5Z^UOMqIUGBN<$D~( zCYc?W*PHM0V+;q?GRlW;6SjA2KYp_t`g9p?8~i|y8Gu>Lh_%(qX8 zah@x%xwss=yg`O#4@j`f>EfZEMHqX%5Zl)`l$3bN!**%8*nyQCY|>vA7L>xo;>8S1 zyMT@j{-R>5u2V2uDjCbNCShh@4q_9}9>DTE_G1o)zL;0mUd#sd!LB;&!HS!`v8Ok7 zVcrxkEZV{oyIi;f+i}bTyXUwa%jtB-!ftQH#xUHlb(6PXQwm+MdqJDAe`}nvwiYKW zI&LG@zt0gHJ7xn`oVgBjSFFVpc55)N(pA{^6DzTqjw>*Ww&hsHHG6FG?q!(Wh^1KF z!^PNs)*{S*;zG>#^?a;GIS-pLYc6J1Vuw8noQ;iHIt!clZ6@~N#0<=7&2)@bXM?Rg zHx*0YI0gIHWQEn9pNtI=j<7E+ldy`56R~g?b4;(*470gtinTb8$K=1qVYed2VrL!4 zV2gi^!thXI%zu>;=J0(acKN6Q_GHlrEa>BZ*a&nuwt9vhW|K3BJ`oO}`eyy;e@}YR z2M2plOTBJ%>GdwO*R2!PHg%vkPq(8dmi<9zd~8Me>K2r3*^Ewn)`V&fHlio{>(M>Y zztF-Bb!dNOEn11!pt7me=#%F^(3FGUQBrRuntq`IEnHcSMtm$q$I8E=YfQeN7Pmj4 zx3+#nn`?{F+JFye=#(P#_mcv2!23P=qB##;dHfwpo%t4B|2zlH_j!Yww7x<|9M4AY zOn-?QJ$->%?8-z->(kMl0nbsjMH=dL_bK|#B^8}k{univJwnq)K13&8zK_mamV(y2 zPDb}0xH~l6a~s`vC<(2Zn26fmx`|F&pMX9uh({;VuA?(MV$rIgYv`UyF{m!#3hKQ& z8vT|Vg-+dn2{mcBfIiZmN5>jPqLa^uqhDs9L){;qLB-Bts9Vu#w3u`XHElY9{-+H= z6GjB1!_FK-M^8P9zP%ZQu5&nyQZfV4)!PEl?2iB)PQlTRdKA4NN6@xDE!r2PL7$FQ zqYEOHsF#fboqI!uK3pV4+aHS2+I1o{_@w}?-pWUt3%Ka*Jsi}gjD@;TnCR46I(mys zL+gK2&@w3*4fyMamTC^7KYRD1@wo5M|8O7bc*qB}9I*$DKjMx49Jveqddw5`H` z=;CX(=$y$j(UP#~sJ+oN)YX3~I=agmJtDM1?^j!*=X@>DIRz6@@n&Y)9Icq5hyFb^h`bo=N1P;m zi2QpGvfr~C>B#6poECQ?o1#0A&e81%328%g^)1NOz0F8ob`vsuStHUEU5^|e^$RIg z|3to3*C3HQtC8W)ejw9le@8k(D-oo(9C^qrL#`EkMK-Vgf}Fqh35gl?5%E(LBYEXT zNbBZ8YbML$BW>petxjQdFS>wAdF++?IR_zrToDGAB*NJQS;xrwO8B_LnL z@kmQS9P)H=EVAl!48m=`g6#B&Mt&tmAr8iukQJN@NW-g0WY^3HMC5-C*-&u?$yyzT zbcdftYT8aBhdfRopAv$R^8bz_5u~Gtergah+w3sXCkRB2y!J<4+5qH%219&{5F}-; z4oMHtAmFPCXE?a_J#1nvo&YForAa0c@5?KEV# znGK?UU<#6Y%?g>>V2L;_wLr`?6Ojw)6OdwkGvtN)c!VB04oUqu2Fad0dWf}djQou? zM67-pAf59^AVK2)ken1fB;)U(j<;$+_g2@Zt4Qn7T_5?ggH!+wkO#PSW;Dw`X3q zu7#GR+i)pU=Tw}o>oR_>qi=eq3)H6Se3BpQDt|uISxtGM8|9s%OFovYGfuywvuID! zmD(lhJP+Q~A)z;P`?Ig>es{&{9OhrsEhSym{RoZLxxS3jk^f%QEwsC!ySpz^S9?5M zSNQa-PTUx#%d!g9z1?<7cN96H>$(-Jvo1ZR>oh#7JG?ST_nLV~_xx;tj`ITOa+)z+ zxfQC5bJOXjD>XXr7?o~SzCu_0Po|q;E7i@~Db`hJg}SYAd>!vSSLgVTt;?Ox(v954 z(Dle^x|k@6t}mOU8}s|1u4uvm-L`eUIxT&#?m+M!-JfJ{-TKd7y7m1#b$@2;&>e8w zuG0wJb=%Ik>53k?>c*69*7Xl;(#6bh()GAF>I}K-b#Ft~>YVPZ)(Hz&>OB59=&H*hNw)6Ml+qAOP|(m6*i(2*a{(=GlyNB5v}wyxQHmaby?Or5{?blqpEjjrbO6y5dP zRywP9mO7VTlXSKtChDF{pPd|{?by^Ked-m)M$fasrZ-@m1Sr@mX6j|D#sEp;(*l zS)@&;6=>y(d~JEqJ8f@7uJ-+nH(H-3ue4`#UTTBBywEQAm7zV>^;~=2AWcg$f2#d5 z^NDukvPaq`#|PRVj}&e3{$%YZ_8sjhMUuAH|CV;j$pmf3`FO2=T%7jB-D}!MPp@jJ zucEat3Zk?hzh2Z{sXnir`a44F)p<_4X7G&m%g8Y8Jd@MfWfmv3EjA%qs@-wz(M3nK zbcY~q$J#^MHJbvo4sJkO>w#(Ay%8;ApH^${r`A59Dz$A)x%L}Zsy!qWYs)1~+wl z?6TLodMwqR-m+MG(rKY~D#UYtEkJHuwCmNIF&)_a_dw%1^a)^}jC zR`AzCyS!l%?}nWaEe+{M+*`^46)e8AN7gwZuJF;x?@ovb-L*H1Im z;DAO{wNE2Y_t7l6xLXsg+@*Qt>8XjCze8hhuw8?E->T6*-J)4=&P5X;bk;m{bZ-IrzYuH51fnqa_Rs49(8O=CNy89T-RqIijRn3N) zBN+yo;81;y3w5~W;nHE6GQ9!yqoQ85TTHh)RMMqB<@i^7YXsk~L4cdJ=_P1B@a zq`6uVh9A@`J`||+ zqVm;&%y;V4MY-zuuGeb!%xrb+u`G3pXQoeS4q8ucHI zO6{;xps+P;CKPK#%$dua@H+f-+_6)A?Y4*d32U4Bu+3Jr!53GxW9Vk}BDYQIl0irHlE>@Sn?!5X zqh_sEhm@^QXNE0T-`=uJ?b*LreKTdDI+ZrZ8vL&O`_CE~OiD3rnQYU?NW}BY+V9cQE zj%UB>$zYF4bLXF``CzBYYE*}6@JXBM0;@&UVD?+}C$mA7Ec~UKHTkE?^L4e#UiL%v zZpt^6Rc^Uzx}sE7IrWQbSMEm@Dlb;~O(|0Sef?hLEXh;3S-w^2XT4FWd9PGgO<$_~ zpJu8i(b82+qcjyaIaOu5_pvIX|A8taHboV^HCeU1<+du|T%syy^-a~r%6Qeiz&KUu z>}#sjw^vjGy#jn{Bhz$R4n{)ble!C$R9X`@sPJeR5L4oXxbdxWaXk$hF-a;~bSh^0yt zF;r7V(NtS*kX3fheya4!{X@}!eJWFPAJzN2-l|RRUMfM&4wVPKUG;O4yUO9-7S%d; z7gcxFCY1=;sJdvjL4_u+RZVnWtzwt1P>H3>Rf`Olsp6s+tBRH{R6Tk-Pvu3Kql*1I zOLaSVrb=WpUG?++RF%1#wW_zwQgvQDN%ecUxvD$dRP}6*iOS*G7!})NlxpWULshfH zK;<%AU*&yPPi0{{s0@G5r_9;hqr6|zrQE~#tGv_xN0|}WsysTrS!r;!QMqnWy>edK zPv!fqHOe7yr*Z@1o6@MQTp5CuDzlBgC?AA>R34mOtV~NPRDM|bUU@a^opP2(u9Eio zwbF;0t<-CLp=2mBlz4xda_5n!$}eM|C@mr%D#zK}SEk1&D`zdbqulf`QE9R6rZO%o zUir%{PFeFlMj5gDic+sMN;!jkQQ21=sXW06SC%xLQI<$Tl_4D`l|AYZ<+R>o%6{yK z^6ap~%5Q-I%4&U}ymACpni}eq>yN9IHpWV2YOqXcJW8T83lS=djrq!L!5k%G#8T3Z z(Up25smi@UBqj5|gUa~^m?UWW_w#plZ zGnBu9jk2-RT6tACSvj_5lG1*^xzeQ2RC(RSMEU3G7-i?;QOcA!L*;Bs1Ldxh|0!4K z=_!j81BzL{dKF6!bSv8PI~Br>9g3?dZHf@v7RADdCdJW_4T_7JIt8P?M)A|PN-^#2 zH^ulh6^ds!OBGWrzbIB5`=~JN`k)A77Aigz=PUA@-YKxVIf|dwuN5PMUn;(LW-4U# zbj7oRXNt77sS4$dM~a`O4;16@dy3XycNE9HlN4poZz^i+ZYZvY#VMxt#wa`)R}`!B zqZDNh7ZuB+BNeU&;R+Mc8O528rxowkom8a91}iwm#}scRL5iABfr`iL{1uz7VT!{e z5d{!v6w8W~if9M9;>87t;&Q)Gv6RYJpxGQnfE`P*KA5gZX`(19caRh>lMg7UroM_t zavw!@iMJxy!AoHnu|u(;bDLtJ&sIgrLsx~p`DVp7g_FXnc!MH#={iOA>D7wz-zyX+ zw=Gw6CM;E07%W!&p)F7x&X}txu(DHpP}?d_6;D^_Ew)iC47OI7)>G9IqDOdFJop7zQAjqj1K;daTFXLiWzCjOCo z3tQysmrZhS%Le%`QJvf&yGFj&vP#}9{3e%VmCLVAER`SQeU{HjFOdh1{~$lhD3JR- z&Xa#PdMmd+_(pDWCtIF2_(DG2D?{#hElqCTo+^)Xek^Y~`#|1QeNTSf{;quDp(Odn z4>#pAr{9ogh~wmD=`r$Yqp!$oeWT>`8yDmkJ0j%AozBUZoeGnmEj=YqntehJWXI*k z=||){j1J4)cL&IaUBTs|dPE*>KlGZ5spMnc$mJvxshs00lFz@!m&Z472kQaZ^8LNC9g+WJ z(@Xx!Zkx2r+PAmL+K&B}-OO%~O&<13ws~!>%uZD$dzt)AX36IxW<<W6l%V!-0pgn&tOp`MhMA z`08z0?#ElQO5+4sqT_YhGQ~BSEa8fbUmhi!YI0E)>>Me(t2!q;bu&yhyZn?)J@$kw zaN}{Ai|mN(W$YnYcZt8OegrN%y8@AQvNST&NTsaqwM?e!6w5MZ31u&K^JM5DwygCY zLpJq0Rc0`jEW5GxpiGbJD>IMqkyU4T%XlrGvRhU=WN}-z$@a?KWZBU!vWDDEvbP{{C`bYTB7BZ8g0kJ-#?m zTDC1gTF1UFy?yAKbitJ?Qr6Qb>Hd!wq=u~#QnB$lX{c?ORIuTcRBvC1)Ju9yx<5Eb zIwdwxdhr>MekewzFB`Q|(SK@b@nnUxeW_HM=O&Vp$$aT;B}e)ogeg_V(4=jT$kN$) z2c;8#_)0VX`bce!cS|=-^^#6rwnLiavQ7GLpPO`m?;_2>H%V8AIZ8#b>!f}US4$1v ztdMfQ*h`PrFOiaZ7D`)<=S$aF&5>@JKTA4%?F=dAZX-?cwU)+kET!)1iPGCaX3}?O zO{B3gW26pujirHUBc;c4^`-8g^rWw<1|+@By^_YBf0A&6PD#)Bc8TSbR>>c`-;yKC z8YCs_>Llf^HIgfyKP1-sD<$6aGKq`ei=<8QQL+#FAkhXDNOqshlQf*mm8^++Epdr` zDKWm4DG5$~F3EoMRPrS4v4oxVKvMMPp5$-d9Z7LfqD1g1L6TW|UGl#2nk1s?ip26~ zlw@!H1nD=TV<9n5o z+#Z=^O^;Z@?iNUP{NqYmJ6V$Lf9Vo>J4NEq<|ld4ykBD2v{zzWzgzOA)=RRXYKKHp zxlQ6%>L$_uzT+fjo}(q+u11m_>kK6SE&ETRup1`1 zV%;we8s8(HZO|nS>}eNYXl@nrtA30BeQXeK%&ikUr`3q{?*0(#Vk*UV&X$QU2YnH{ zsy~VoIUmIDd<(?!?s?*MYjedX=f4(TuzD$`jLH;O^`wcXHKd9yzCIGadvjmB=25bk z5qDeccIKA&7q}sI7RHHv_s59mZ;2K^w!b7Ev^g)<8yzmr=n50Bsy-zayblo{Og$zZ z85blLoC*}5)BrJ$hKlvJYsI@ARASmxxp@9ai8#4MAa4E46*p$E#4$JMVzbi}@kW)O zc#hwG@jK_e;(7CSi#MBii6?h@h!e})#a)?O#Dmv2i?f2A#2dvM#5(V_V)4pVVjC+5 zamc_@amtTH;_&SGV*49zr>5?|xb5X(Gl!~=`0#V#h6Vz)MPvB3vZv46@q@uM@N z#qlyDvG*6~&!>BYGgr77Yd1L28B-tdWG3<{s}`u{|d+W{t<4U-Xh#m-zXeN z{w0)ZYK2!FtAr;Ez6qD-mkH0G{US{D{U{8#`5;_W`(AkH);nRiI7diZ{z};N?}gC* zdAiUc;F+*v^An-i@S*U=yL-Y*r|t;1c_j*;m?a2*e2f#mj*JmzW|FT;etFX)7feQIIkM1}BZi9~3BMktKh z$rHX9%@)Sy(uGb(D8i^se!}|$zQUtVeT0)#-a^JwPob!3yKwo9t-{AtS7E1>v+&PH zM`7aWb;4;|R||IyUm@K1Y?-i8zF6qJV1ZCwGe@{DYL>9mdxp?+l#P&`WhGpzwGiel zHWym{950+1HC9;fHA*NPX(+s%rZ2oD)f3WZ4+u(2djw-ncM1A8bqH>CwhGK{{T8h8 zYYp-Vtn2CkpIlB?$69#0eJp#|S(YMhoVaUKC^deL1<9-}LkRlKg3~D*1y=jk z3+Vl;1>9>Z1Piv<3vM?q7Brk*AgHyUE4ci5mcR^|A#j;$BUtgmN>EL=5bQ887pM}( z3l6xC6$~^Q3rHtN3Xnzm0-u6mf@X0)f3rys-zT|~Z|B+0f7sH(A9lKlZ@8$Q|30sl zzl&eRKWp@jA9kaR@8R-=|GKJ#-w%rTZPxGkv8iwQWT?c_^$g7@ts=$e;^3utE{#Bq!cCps+)}ORVm_U%K7}?h8+Hv%M8B%GAjS) zYd^m6f&KiZW*>e?pf|tX+>@_=b34Cc?N+}0y$e5wvWZ{%X9GX+@LK-riL3ZQHj>pC~ofA z^V~BA;oQmEFfO(6B$w?M%w14$gnM`6A?}}hfZIL;6E3Of8=kMlm z<6pA4KbFzCr7>jg8IyxtBe0LV@%L`7!vQaDeU1nB;0kx{=~!2;zlk$(V*EnMLa5yn5Bev0d1~*>tXzGp)CY^PF1GvCOIEEMHW`8F#Ld zbF;gYGo1XHW0hUZ`7@`G6MQm{^Sv#H)4AsrColB{hdL#l^U(h(C#U)m=aTDv&Z3)l zIbc*0Crp^Yp%%n(+Lpv{oX%Y4c(z~Q*zAtr+9lX%vj z^XL!C3GmW#MkOmbd&bH*B!P%y_m;;=wqtYt9j0@JRgpPwHXP*axU`QG-nE-^$=i!V zz3ajGY3$Bfz;fj*eX)u2*UFKjRjuVbFI>raF>g61=iQH<&v4|PR+5c}8Xa7z^j#a!qC#r84r+imGyCR{ReR<$7d&=%V zY`>e$Y`=j9wzYR1JL*O?yS(=syKHAU`(o@D_T;V-wy%2;d*9`J_N3NacI2kl>`&*i z*dKqUv(K%1#x@In%=Rw3&)&5lnLQp$Vu$4?unVVLXBP-#*r%UgW{(?lk-g(!1bau~ z8TQzoQ|wc2A?)`NN7)56huEi=`Lj*@QMPBkhV3<3$u?t4+2`&H*&heF?9ba+>8_-x%x3ZrHb--F(fBozk?Ky<&wE8v*Ot{yD4JF5_3Q-})|N zn_OGOp42dpU9r@T&Ct$dCuQ2OAB?nSqdP3v`r#AU9%Ux%z0=3Ar?ZXNiAf{aoo#w- zy_Ey3e58lvo7u^V*KcRtcWYt!pJ-%_E39MrnboiaKHpjEE|jzK%f7ItO#R4OOetdN zUCU>kt~jEj<6(W0$Jk=aF%Qo!aBP}%~Bnbvn(^jEUbsm zy5_)P9g{FvixVlVh}wg!3>#log6|&IuCrdO=XoBi`VsD|Pa9lWht-={f9`Hz&G@y3 zWjbvoD|@d!YsKlsEZ*z+EKYgUpG ztNQy07S((>D`x8e^BUH}WZdgy*46xB&bMe`F4@+|?8NGrcycxKb=5a!;e>MLCD$)Z zJ532wd9#pts5Fo1Jt~)3v-TBph2RBqYt(b*)Vx&YgWiYCQS(!nGxy(N_8+^&JpVYJ z*-?9qX*%Hwv(4!eGfW)GY>zt2G=F=V+0z-qyfX6`)4=mEb1~}Av`9di*~J>>l0gNN zG*8O(*dt^P04`H{i^+^Dp)xNF_%S`_>}Te9`7nngyO{m4JD5-N+?lKXx-!*MoS9k| zN9J1LT4v_Cl}v*)d*+zx#mrAe3z*a;bC|b%Y?;r{Y0Thj)=aA$3#RDz1m+>r@l4;9 zW0#wpQB#*C2T49$%oM(E1`2JaijFzD4X7!y^D z!%Jlh)^-uYn9XBI0$7ammuQT@ha|?Lg8hukzkC?^dftr8$vYWJ`)!P-ZCe<#7|x7o zs3W7|>{^Cj;!4JqEPF=m*ToEO>wHF=!5qfADYgtZ`)Q0xTdf&4NfwMg`2>dPaT7+v z<Ej~j3^evD+vI(d6bm{1K|5MZL z#>wfl$znQX7N0(C37a0fhED&rnM`lpae)48-(LDwnm7Fde<%I6VjDdW+d{WG;!Iba za-@extfi}>SJExx?dkrv7t?P(m`{&*W=D6)nn{10V?%FzZ$+;znM98+HKSX7A4fk> zJBm(f7)hVi@*n+9`yj2StCwcj*F`HGY^RC;Yo)z0Xrfga{i0=zuAx!JeWzuQFQ+w{ zeW8_@m(T(x71G))@@Te`b7+&TvT4OunY5kOX|&VUPiSG*4`_R>lWE_ql4$d-5@>5C z$I(VxUZurMilX(HpQo8mI7jOkA4-cDcY@YC`WS7d@nPDyk^Z#w|4`bJVHz5KZ8YPTTWFj#XWFrcjx@oY zwX_L0R?_e*_O#oPi)qoP=hJo{wWHgVaFlUMh8b7ggV&oyzZNriM2+Py?%eQtdxgQ4?}2so&E|sTFrWQKPPX zpiT>aPh}r{OOidQ|Ih>N_BF4M4h@Mg_<$#4%K%2EvkoJJau(j47L9I zWvXA{1?stsaBAqCFzU|BC#fGoj#DjlK~!5#0QJuvj2h&urIsyGQvXhoQj3j+RAm>3 zT2{@Vjwqy1+n*hz#@*OQoqTpTbvN!w_2O=)n(cO@p5L&US~X`QwbgVT^+n%G>fWFB z)Z~K2)b~&3Qi12Ps1ftbs3xZ4s5`rjsb1d=s1|RAQ)6!r zQ2w0lp^VUVQYy%QC|Z|h%9nW!l>Tu)DYYFxC}CeKD8tjgQdVC3NLhNMh|r${_< zDUX)CqP#GBK?&_lqs;vJgra-)fD&;znW6$o6f0^16}36rRf=%2QiFDf|zi+^kYj++N5ix2}jNA21%}`2iM1w3!QgMpI#(OPDGGHNoUB)C8x+X!-L7Eii5~m zaRKCKN{p;^)sp)sD#$pi#%-Ubn?AEYqDLA1(|+! z0+~TFAa z3R2YhuOu$zBdOP}h~(XpN0L6uA??PpNqx?lB%W~^DZ216DKg?d$>-o*Qt9+Wl5Jf) zX?fB$l94o;6z6b}G@>V*G(SCzG%4^TDaYkF$AOggKRig^Vz!cgQ(Z`z)165Bf2<>=UR_11 zBrhlBPF+IMRm>-~U9uxB+CP)D#KMNu{c$qs*x8Asa!*rI*O;-S&u@)L_|Xxh24_9e zlwtjT=4t=@O4J>GzV@wtvCWNs4{p}^g)pl9=Gc7m3;9~=_u%X&zu5m_=+57naKHe7 zr`+bAnR{%*<~B3i%#4lAvHLzq=|BoOx=3`FTq)6kT;(W|loTnFlqe}gMTnFfk?{Tg z1Me^I^SsaVzR&x9-oPH2Na>aAZF7eVbl{oH1l1y&ntCWpE^d&0l-9}q0&mMczpRj* zJ6a}_bH6Ub&s~+_Zsy50gj|rN>1WA?yV7J!si$P`vBzYGekRK%iVw*Q#rtGBnz6Ds zt$SqreG#%E+a0pHku9>b=YwQOs#un>!jm;tvt(5vfwFBtnryUjg3i#S)ZkG#38A0x?j5K(pzaPrCVAt+bO+yrCqv* z)++rs|47Oxcp%;BUoWLC)<}O9R7r#UZ%EHC6id^u6-e2%%hJK$7p1nBv!!H8y3}Ik zw6y)gaj6S2MY>}=Q5urIUuuDglivIkC0#zYOR8zNQ##eVRhoVvSo#+tk=nNNrSM3$ zbWDdXjclMv8)Xz}_ePSms?1%=3~-Y+{z6Ho&pSxR+-#&JgO*a;WDDs*sHrrg%|IF% zrYF?~XiE=O1EkeVWoh~EP13OQ>ylaYip2B%qC~Low*+l4Bl&oLQsN^XlN|UvB8kfz zlwffEl9ms>5}p08B{twriQ2t3NiFY*#C*O@|SGp`$~#tyd;&!JtRq{IEj8eTCy+DNm4j! zE6F@)EurbaBpu~u5^bW9#QYsdvJ|c($=#qKS_u z#5ySiFn#@I{r;w6{dWf9#2`I!<+zskdK5ssby-O~ zb!3y+U3Fc=%la#FHCz;p6wZn`h##VJw=VVadPLjacZrN; z9iq!$o{C0yG>aCd8%3|9?}?%pYehr{GC88e1Leb{amqqpJxuSO&*`g-h zbkXh$r$rOs<054K5fR!XQKWKhpQscPD^e@kBf>!=L{7!qMYFIiq5~x|(Mz~U^sR&| zdI4vO;!FHR(=cBVve--H1oaSYEW(QNA!yO+RY#GviLJ;u-%9iW3>9s@U@E$$Yba{Z z&=ZxbYl}Fi0irfVWzojeO(Ny>HR1aMe}%gj7lf~)XNAkt)50G+CWJS>d==WuhJ}gm zKMHeLeZu(8H$n)dOL+d#bKx7zQ{nsDkA|W6!nmbS z;fBb~LhfgYFq$V23Om?B6#`wDdYdL}hf;)ZFL(+oRNRIC+pNO+8E4_-W_#hc9)z%p z3>SLTLxj0j#=^#2ec=riUE$^f8p6-tRfIMY1tGC>gU|&3Pw?#KAAzgkoFMwtj39n# zQb67@CK!4*A|R3n1rfFH1tE}L0p#2(!OfKp!RpRu0>i#$ft>e4LG7)30z2b7f|!%l zg5>!d0@3CY!AfU=U?=9X;A+uD!BzEaLD;@?g4Hjl1d_mGf}{761@Y#G1kPs?1o!7- z1S&zh1+exofr{fc!M)tg0!KNiU~iZ}ko<-%5Mb$o%$8|2^hiB zb!P!z)n0Ho3L%K;g9#kmA%c5_MgnCeeF1EjjzIN|x}XuQB5=)<7aUw$=bzcK!Vhg* zDoZTR~RTJj&fGv~KCnDDQj0`on;>hi1IHTmCiRQZ!L3jBM% za(rgNKVIF^AKq8y9B-(6hF7%VJI`4-#!I_3!n>n5$San;=WVX*;f<@l;$cHNc!GOR zc|`SQ-rSZ(UUWk}uTj00*S)2Rcl%yBPXZ|Bz1e(?r+YV#2T{4eTasq-@^7EzsmPz? zc?(i`)SF2>@alfv9Y!3_uqcWbFdxCA`Rw57ESG0F#NdtF`SW6v ze0VQkk$AsM3B2LmZoEs6P&_jY2VRs6$xEw*^Ws(@JcOSyuRK?uH}_44r-IhtO{J*t zE_KWEbWAt!_z^4I?G1}uFNNRSN!Aap^y&mR@B3G7iR&=;K*~q1@vC>-QwDFiPeNaE z+itaUFZ_MNb*4Px=B3}~c73ShzJ%W9UW}~Z+TSbXW^5?pKBisa-p|VA9v;Z%YQfUE zyLX-DUaULDJ^L@28%RFH{dgvUi|UQx3JrI2X(3@;h4N7DxtU<@R~HF)(?LG>S2K%S zt{BL*3!rinGrhT&`aHNPMmR2JGn#v^*pVwgX~Q+Kv*K=yw&32WGvPWefw}wfK<>FD zO>R_+D%V6_k$cfcjyrVnALr+bKb%*9InF-%4CiP1B**#9D91}@gk!=P;5^Ij<6z&u z;T!;VagKAJbAr#eaunV^;w0!k;M`^3lac%?_amLPE;r!^xIKOLSILM!o97mflj@*t=PC-#HN9~iC<7L3- z_;Ohs{qz9N-40)lnY=fL=i$K-?Za{qwJw}zQw|&lxD97pkR@lwMRN|O+nCd<4Cc6# zbU88mH8`;~Dje@gdCo9o1BWVHVJD?8vXk3p*^Jd`_B3jO%?tm^K3(vMo!0k(Ed#t` zFO$02TN66jmnz%XS3b9}BSB4URsRNd?BP4?$~)EU+v7LbM~q6?W{d*%>6CnS>)i|N z=M$Oie4{irj((C|mYm8SsZC;!kM3tTg5uaxY83m${s^{W#dfyFUQw*#{e)*u3wy?0;ZucC;^)eJ9S8-Fn@CUGN6T z_FLCvKe1I~D~T1^1}Eg$%Xj{%%+=>uVb~c~(zZ#~mdsI>PSY?eW8x!gP`8h@ z;PHkv5cZOlalW0U{rCxM^JEh%QTIM;C!vl7*>Q_il5vx@e7}Tc__ctg47kjC>T;1q zmu0a^kEO9Xt4^{Wy-Q^sUQJ@D!w>x5CdRR{_eQbKMaYU0 zb6EIfI;*#Y#=>@zS&_eptUY>o77^#l8VYh^QB!SMDP>ly)14Nq;GZU}jk*S`SXUtH zj!2W$a!8eR`I-XD=g9_E)94CwlhPk12=SY_}_FcXFp`Vs=db)_0%%&%vLc6v~DopI21E;=+~Imk$KFMXL6Vg zH!_%a+s`nMj2&khZAxLLLK2w|2>Y0i#e13A3A>r-^I^=A+o8NdpZ3oIb{{iZ_gH zPhK+0``Z~0W}YzeIu zC{to6*KcI(eY#4o>RF=S8=0eL%*@cS|0d}*Dr58|&tLcfCZ_pFVis^y1*XYv^^XQWH9Qvg<8T8VDGxXH4 z<8;TLN9dJHhv-Xk`{+Qmz4Ue6-Sh{>VRSM)lz!DNnBI;S(_08U`e_Q2ZV~8DKg0E* zw@OI#&MofrqA(2IFUpzT5^qOWPPC?*rb6ior%dUM=M3ni^FaE=OPchitE%+c>k9OJ zv{FR^Xm5X@PgYoDA&z zk{Vd^KOM01%l^QhpJM}kKJN*P90?B$9o`mb`)PCF(?Lm~-2gvu+Xq(Q?)L$KzVCbk zXM4N?Bf1HJce~sIyI-IJ8{6#zI9I6_xaI%C zUvOP6@b=Yz0U4M61bCkR9nf;_M}Y3Bi2!u!*8uCpPXSZ$9|8_Xy$$#p_BsH(^+kZG z^jW|>w>cm`urWZ_r#?X9Q4zUlw3sSrkxgawTAcUT%OLAUgoL>0H3l^2vaU zzfuE~#*+f5L;C|ny|DrRub2em?m)MIL=q}s#l=3r-x?7RVFU}1YM2F>$r%RJ&H)4Tzi9>p^s5GNUMK|E zJlqiQwra(ner?hJQpT+R-6PZf*JH;0w`~35|C=-9&ms5wA9LyTKM8x~F9UY?Z<2rN ze{k-Rf9sd~{zGr-{GT`9@;`R#roYbB691U91^z_`^8JfWIuleM~eSX zLr?!o1-w7*7urAXqoaT4Qyc$R)t3H6x#s@V6l4G92z`H5o{m4&7Jg1Odj=H+A-`$VSMxpb$#c@HR<-#m+$ne`2NgK`%SYS z?OvlF=SsbwLu!rR;Lb`vDZR|E8dc=?27JY@ef6T>xi49M*6nG2*%c@K-lV7cjqFYG zdm`BH7mtti`)9hxkFzn{FL5l?Z~yaPKWc^8Zz7H7CyrwJU1R(E)w}rkT?3K)#7lU; z@ei(kzKu?P`!C!2B_>+=ae^%T{&|@AC76Nzp04ZojSj2(y?d*+NGdn z+FQar?ThhG+LM(@TI|PB+H%7%jd}4S?Lgc+T0EzlMsez-ebZ>8iKd%r1s#pFhSGZ4 z_0$?#$mUAgta}-aYfwZxwQ!l1`Q{>RS5+3x;8YszQs_zAG%=N?ZInb)S=>kK?cPg^ zs@P2%ITl8PZVsin;eu%ppqMuBgG<}l&Y*P^_|g9Dr_eTXJZS?qc-nD!SDM0*BaMI8 zhISy$k`}$qoQ5YD)B1t>G~a1$+UZsRtsqZ{b~1V+jZ9so_LweFT^4>*cXs}uMiov_ z{Sv-XmjXUf_gQ?PzWmcmoqPF;`lGOedO!XtRpkGe+GX~DsykmtwS9hzYH;}`^~0VL z>MrjBY7Z!%s`fpH3U11vE~THLR%|&=bwVGZo>4kPZTJvRZK#N*o=x0EMKN|zs~}sb ze`lpsqgDY`>pYwKJ~Z%ua)Cu2V z0re*fNG*V9QsF;Us7X!o)SGA4eQ${V`X*W}_(B(c`d)qV-FG^D%vVD;;=2hs;QMm% zoo`rcx9^AaPG1vgn=jhB#n*hk(Rbu=y>IN98sCrnN?$#TGGEw_LSMy(%f1g&F8cZe zX89KDr}_4MKH)o1k>YzdF41=jai8y3<-NYxo=D#<`8$1sL$~@m+6DQ(TM+uvA8~y1 zkJEi0(rLamAhPd)PaeMdrC8rnkuJWkTpWDIR}jAMp1^!BoHFyZWg7Zk0O|R@9n|#w zR;23NwNt_Og#89z(EMMY{r4AqZYTZndFVamldt^EhtW0S)1Nuua_Mfybh?ex)9+v=0jDf8(#BlH>b=lJxg(S7nesXpj4 z-agm;JbcDgus&2#l#+UVnDQ|ABc;>m9i{sHYs&WQ7nC{rGYU_&nR52o z14?f4UCMs^ZHnXKO-keK5{gko0fh_fYrO1m#;r{if4A%Hiuwf)h1jL=P_q{8Han6ad zkzz|ZwPH#6R%1>9?=+@BO!XwQ8?r(DN^J((< zp>ZsEO?U>K@tnNG-VsRYjJ4D>DiD+vw7XtnN->M1u)*&$Y z3R0IG(yvbbcTAbQ3$=+{JF@EiI&I0j1vlq?di;ks;{1g770<8U6VpT9s+an`}c#jh}1s-g33UJBW72+iAYa`@_|8ZxQXfclF#A?~hkz3XPv zytn3`^qwH6dV9|#ddFSd=bh-e*IP0f>8+Ku)B7@RtM}>`nYZg1p*I=D@kR^;dXJ@0 zy%Uh$-Xm`a-e&vVywMPpw|Tpr_h_WGcOnq#{o{d&H!1||%~I0!CReF@YjTvmZ!c~1 zw!XUR74N;|l|S*@>tfmuuQ2BcFWvWFys{4tc}<%2d+9&z@iN-k<+Z5x+^hW76E7!D zlUK&#J+JmlwO()CtGpV9%e?lc6nQDYuXyclzvxvRmgV(SEzPU8>V#K3BgIQ+_K?@H ztOT!Ds2H!GZ+Cfpi`(IK7qrDod{652ULf$YSz>wda|67DZoXbl{Uoo?3GQBD`WUbF zdMB?{o~@Vaf~D6?wz=00XJaq-Hz2Q)J=$L1)B#>=6^dRnG&!%k<0~Z2u|?8zi&>Ih z^Argy`$j_l9U&=Q93a)8`benmZqnIZour4#ZKS8g&7|v|jU@5lUD8CtZ4zC#f^??3 zgj7H)Ae|k}BQXx=kfsbWNV2-qq;mQ((u;}1q}G%Jr1QpcBtrcjQWGPb1ey#bQBs0Q zfktAIZ5@~NC4fPS9;1=oCz45eAR@`88cPEExR8d1>`4dX5Tu^~7|FfZloWzDAjx`k zNlsxJq@i_XQpkl(q$b-n&)FwSp8te%o+C3qJoArEcsdw<^~}FD=k=?s*D$wVsm6N>5B;ndg*Nk!M2jWzRv(MNe>Nrl(!dSx>{+ z|K(p6w^)J>TiC6B|pH zi3ia0MD3?D#3SrUV#ml=;?(X>#L<8K#QM{{#1QZ+;#kRZA_>(>jBjotrUo_;!#~y% z5j(1g&2wc$r{p5y0l*dF<=l(J3$QF=`0cYqkoyT@e)|#PGW!tG@l!mJ7#2;mo{u0- zCT%CCs)P_1vn50?Q$BG=Ig_}}*`MhCkV2fMcoO4YNINz|E#5&I9B z5fc;)i9geTL{E?=G2*HUakr&B(XV>VV}t9mM|#to#~<>Hhug~u4>sqkhtJ0$58aS{ zkNe|29&Wq4JTm9oJ)RtR;?cFC$)oo8J&!$rS`WpnN{13 zWO{77ea2(P<+um)ezM0|!az|>M%|-vPRZkD z>_(56g?|LS_&ct&uIZ6=`S z9uU-H?h=}R-690+xk;$~QB3$9agCt<{SrZL=Xt{Gv2%okt)~dfBdG*_P!i$nz&^qi z;aleF>-TkqBlecS3r#E8!!;iLh2| zLs&JlB)rdq5KikE5x^OGgk)7MLhDgg!pNHZ{};mR?l*ofyYqI;9v$%YB#2bN9B&C+;h-CU?~<_uS`!weAgPE8PY1W$xVv3*BLJ z`R<(X3+~d-8Sb9KGwy4zj=ASjlHCCh54ek++NsqUFvZ}*4}f;+^+&HZ+*v%8U%oqI^WmHQD*3-`oSV|UIUkh^?@wtMC$ zHTNZ!qC4){26utm3Z7Z9fQOp?!oSJ*ju&ql!#|E2#;=Wkz#E9);x%5r!VeQV@Mmtd z;&sd);bXHJ@HLz6;5%Zg@J(Z7__O>XyleYqd?V%}-ncvyF94s#?>>1PAF`B;x8HdX z|Nea(Ug{f#Z>$f;FT%Is0Xf0=wM}AtXABp=_cI;;he5*&9(m(4Z9VYid2aYi$|(Hy zcsso2s1-h&Wr3f2WQ@1B)yGpVY2z`90KCFpMf|Pd4S1J;72NrT1>76hFWh9tciiB= zQC#KDVVvOY2iy?xEzYyz6)p+Xfy+J8ic6br!UYQ&aDXSZxE$Lm+}{gjIGkJ&P7rY! z$9Q)E2PJ0Wddtt?f_0AL+7Bk9f;aX52oH$Pl_j-dG4zfc5 z7udCq<)i*$-7n2!*VbmRmqRD9`Y*m>BON|r3(ogrZ!h;?^MksuTU*<)%GOV?r_Mga ze*0CAHRIJ_(f2E`)+VLc#pD8P(P$nPLCwLQt4PPb(m0Ksjy{SVdz*xPh}nX*14%Ysdno$yWzGY@w(gRk5}B>+;ZJ^ zh`3k|!n(yYOUgPZcO3ltKa=Vq=_hxf9vXQad!8njx#%nFN6oi@^D^at@H!Pby|xTO#Iz@jeW4ZwyA% zu?w@^YzKxF7lJYDlwevQd<-R?i7D&!!;C{H7{z!ZW@9H7Gic_5$&R(hAUdouS4^Oo zpV1~5vo?KPhKx+3C|T+5#AbKMBq>q^)j>B_6$;ToX0#npl@b?qzRyM`?=T|bijT@mLg zu7a;b*HCAiE8~cZt3kKDYl|tul^O|kt!gxJomBz50);xRdZhr@g*ipnI+C0#JADQH zYH$Ht+)k@Jv1O@2tMR{oFne%87HXR*&^c0%>Iu)&Kn1rqf-G{cj6@xyvybJxxdk6YQ zS_pdTy#(E1&PN}MV4@*+{m}VqWb}eB5pAD|Mf-e2p$SlXG;o(Sx}(kl9kgnU?xEO8xoDPTyTpA@b9vx!(q$wz z#bxyVA(xJ|c$YNqXcxzm5iWHvx4GzRZ*~#!#4d*}ab1#z=q{VhX)fm5yj@z$2`=Pm zj7y1wv&**_TNlN8OBbbOh|4(M$fYbv&&9Vz)1`frs*9zMyvz2JYpCNdmQcq4bEs|f zA1GMHIO^$}&nR!*K~xd95A`Ld8zuMt1xgP54E0&~7*%lTKFags9aOVnH3}jrM{Uk8 zLLC{nj5=a;5w%5Z(;j4Bl!KuzSvqE!2LqX7D0sGq#8sM_-~6t7o+ z>eptY+?fHWz&=|Z#&z}-gI8KDRHjbe$AOyc**(kK(;dobk3R1Jn6jSbc*xlr-z(zYw^yD zm}uv$=m=-cifzujMuVLzOvKKee6I7$bh>lZbE1jFXQdONu2jrbtm1~Y( zpOzd!T62z_q#ur3_KrIa6n}Pf?Hh26QR;KdbnAA^413`ioA=bwt@DxNrcqHO0JHi~{YBpe%ecwO_^LFLnc16;Mw0p{B6 zpt$9QLr284jj|(+<~m z9Cg^3mE=HuxX&T_Ta3dYtw@J(+ztnPXo$nlG>OBpdpw8r5r%_A)z2XhMRsVEdN?#6 zb8{%Kc6Nw)Z|h*T!OG#5wYh@@%gAB>em#fULQRKP9V!l8vzr{M4c6@Ul9ud^!hYMA zWlY=aHGH$*K0IQdr#N6=WB1O!lKa~J)WHsWzoJ(AndeRRaX;_b59`(1+qqZT%eIu- zN1rUP-&vh!@BQ|?{f58i>&g+KKi4V{na&h`)Uh}eUXoo{r+$pdzW)?``#Ked+s{}`v*(9_M40~ z>>Y{9_MTfd+PfV4XQx)aXxH}Qm)*7>-|Z$e$L#3N!*;pc4|dPud+pxmcGt6QR>VEIGrYndu>=}yKKG`x7!GtT5RsTYqXjFao5H` z@wN@r^rnrjYq8CE;8mN#ZMinY#4MZE^Ji^rE05b8Xic`M{&>KqZ8p~Csq!A1QnN6d zJ+51Aj00sh)msHNmIqiisTuw@ZKV{O9}kH(e|xYtKPFH%&(`d0Qh?SrFrYz=dtgQQ2J}6 z+m;R_D!vt|d%6kPf8`$XXiW`L?^y-%On(V-V(Je7xqMb1`Q?f>vbI_cx#O_{a#Qy@;^@dSV*1w{0w*_v*sVQ*IBEU` zanflJv4_-$z_Yp$Gn-!^PDDLLC?!8a>`HGyG+eDke6OlRY-}n;$h|B;eEXP(sF^&E z*t&EMv7&eiaX>E>@jvT{KsqNNB%aZTSb78^M!F3l2oFX;_lXeij&Tr?*@1}Z0$&8X znuNI8h)2A6jz)Zc=YaVB1%c@P2}NA_XM$j;(E8}PK5Lb{ZtK{R7uIdJpIWasKC(7zZ?LxPskPP}sWzgxjo%TY{}$ zMTo2^aUARGNrBcACw#4enIvoLJiN8Vb+om7rGs@>9l|=X32Lp^W@4TFO5b|9PutpO zSk3z2xPtY?pX*k6f0nI|t9?91eI2|Wu;c$p#@e=;dxeO(dVspCY-anlz7srHZ{fS&Z$FI`RVai z;W<%O=K0}P%>|)WzNJA{^%X)ZKn>ft~Qv%9xf_{iLc@&kuR4ce87jEelJQIm^E-S*z2Q3me8QljT2K&MOUA zGS%K$p4WJ7*{t1R`4-q}*{$DXS!a09GTEfY(gjjs`NpEek`KRT*=lvk5{%5YtjOPNcYCDe6~We+CIG7P)bauO%AWV#D13kfXC4<7!Oe~A>!O(de_ z0tsvR+6!fwlg%vyC`OjIDSDQx6irK%kBTMBXOpGCXBF<_^9OF~GYkJj znS!67jKK{k!|-hK2l%3QFP!Av1&{Y?hi8#m;JKcS@Z-e0aGA#~xC!9~ybXUHF2G%Z zzj3<=cfn-BlhJ43cTvaSJx+(={SN!#&+YcY3v43cA&4DtHLDQ#RhR^BXu*RgnK9rm zjcM>rhTd?fJ^^kE#K29po#4yrHt;4@I6Pd*48B3$0G_--7e4V10LLvW!ebXUz;kE+ z!b*S4!!A$Gzz&T~z{sD!z!nDwVOjlsFwom>*wNQ7U;{6n!i?JzU+g@}YHhcLTZ2QHNuxFVmF!i&CU>?WgVWQ+HSkQrRSU_wj47xiA zHo8LyOAlegV3Gh>A=d|{LidD;eQ~fHPZ!t&tUc_xvo);Q#sXFdGloT)fM6CNEm(_& zDvYKi4|}-23I#9yfd>7Wg`S(3f|iYpK`Z))p}E~3pnIP8LYby>eYA;ZsAHRD+(?;B($UawSZKop?)`Em4*TbOg6{gUo z0x(qff)3Q+3;?Qp0SAYov;|if3YAq4q7C``Yfu!-4^YD z7ZxuzJhf<;Z?edkxM#r`tg(>muCTb&T4G^z@0!J_o0lv;U&*$BW~N!Nj-IdxOE_Y& zEBv5^NET<|%-mzK;1y<3gx+d_x0YEvG89NKK)!@7Nd(~0% zyDLNHho|40y9~WC@9pX|4|?>>{9W~9bJuJ4%~R9wm_ImNWj?g0%zQey(0q)MZ~lUq zW1i=bZq741W&Tei)%@JrA#=5v|JkjfDD&qp!_Ac+hMJ=)g3M`oLUaF9Y;(7L0p?me ze9YhSJk5`iapqdgj0mO>@XS6?1UOCi9i7Rmh9v zKaiulXCXGyDM%A-41&W9LyBP^Aj{gl5ZwAp$oA6AdG@)h<;i* zt^iVm(8vWTrhk0G{fv~)oC-ei$~2=l9SBlckVNL!HO|EhudZ5 z0o`skptjj;+q}qZV31=*cot}uR^@BfkwY^3orpJ6-i|g?r91o|7h(3!1Zs9w!NiRF z17x=NR?FJF-xYK#J^3QNzu;t)%@I?^;s;abpC;XSSGb+}CJ&Jm{|J68V-X-{yvCk@j`dfj^f`QVuDwlE8bTBT- z^txo9sgM+7`qy%o>1n`rQ^nuGrcv)jrtJ?orhuYAQ^E;fQ`s((X&4J{y44kJ>SyF& zYPtboIx=cun$clwYFiC5tfgb8L`4Ze^a?ZQm1Yy-;a$B|0#B!$2i$)i`xx-yEhy9-V__U9_1S91+uhMNr_4G#=s+wo8XOi+-)CA83B3cxn78}&EX+(E*l!O#Q+T=X&MF!5M_h3ML7e-t`+c}>kHtH{XfA# z<|LS5`4xQd-yry6Pan9ryc=AU^a7m8eF~03J_37gXaLLg)qra&D!|+$CEyAEHE@LO zCGdz`HrVI=S@7k`E`7OabgPx2EsVzNBxO z|66~3_q6^SuW$P2K_mLK?;rGMntJt*XLjjpY-`s)>DHn@r`D*?7_QU5Qd_M*c&uDs zT~ws+V0&5LYduHbwX|x(d;siZayi_5$jc0X6iazA5P= z8|3u+POX4qB?};VyPu%rYZIX5*Iz)vg@d5_m_E?DcQ**9_X4!zTPx_qy(UoZ$$OxD zQ4J^qSpiB|DF!iLUIiIl$p!UCW`Rz4oCP5?kAof#9|n2d-Vb_^ycYyzMS>2S?*P4; z-3-!rA_kGNxS;J@=%7SrD(Lt|FHlMk9u!rC1~FqCKo(vI(6}}fboH|_h*|>zjV5b> zVwkF+IWu|C_MfYIFCYEUgPohz+bx^YtFRr@8(8_IxB8-APdl$i4;=PVPsgoIZ%wgT zZ|L29z3SpSdNF&e^sK$g^m?=k^>z>E>HVuZua|h}oZhV8Nj;%KieAn5LA|xRaeD4Y z_vr0rhv{WQw(8xSk?PewM8Nd{W)4+EtsX*iB zi9p`@1YpYMXyA3*2;jY?P~fAdLBRVNLSUJc4LoTb0F=#BfR@cf;FmL4V3q&{L__U> zoimm|{sRcG_n0A&!U6(s8fySIO(+2wcjSQSNh`Xov<2Poz@NGbBNMv7iZ8mL_(5HD zQlIW0wQk+FeI2@`g{`^~yP9<2n0vZCay7bpU*6PJx>&565pq>m-8NS@aWPZ(bMqNp z+?iv#$9ac!+syXsu1v=0LhE+v5|g&;GO3$&xjJIqfI*Hfwlq-JFv?eV220Ytw+XKs z+vTDQzi6-fVzaewDAGdr_neXL-X=ZW@5eQDxl9$^I|iF{6~6w{39MYyIT`m$r@`a9 z&Y;q$&V2Wfj$Gb*olRTc=q%ZE>U^1hs?*Z+NGJPvgN}qztD_ID)M+0n(b;w5nvO!u zC7o>C|H;{urgOIQxXz#KWF3L@fKDYWR%c;4QU`T+htBrI5S=uNMCXP&Pv^lqy3XS( zRGs_VymZR#+;z?@pmnx3Ip{bZL+Jbtfa=@;n&@x`K{^Z9wRBELsOkVw@;cdnSGAR% z{Lzj&HLKmloYIDX$Fz42f6^{4?bq&$?9u+`@=_c8@0m8D^|7}7>HFFU)*WpFaFzDj zr&8_yk^=3rU3uCOsPo$JziHaN%_p=IP8`wJq94@03XIdX7}%|yU$|3SW#<;{UG`G# zr}I2*okoT>{|HU{oUga`Lv@1oaIdTO(j`Z2#mz`<6-$`*#%UAnUp4yLZxgh&s|ae^ zhc+o_dv>g8{XMs&b%Xm`i*7irH8DJSjG zYh^0xXtlpk)0#i0pry}Q*L2ih*7O+otx3K%tx4SaP1Dh8L=!yqL36RXSMxNI7PYRx~&<(em67HVo_X*QaF z)Zm)UuS_+QGr^j!Tpi7?Ab{qH4+@&*m)A9FgO)XL=5reNzfNm7lz!95-#MbOhWw}@ z{L!m%<5ri(Y;?PZgG-CXw#5e;nGJOsbqA_7Ub~lTjI0%EOf=_fjHl#i43X0{Iu%c8 z+QT|{>J;Y|b=|oK>hJH=sh^LnR;QxN)#nxp)i2cNt2-s+ zsJCL$)dQDKs=sbXQK#-dq<$Y8uWs>ok9x|3F!hfIwyGoXGWF;czIsg~Q+?u~pSr#~ zS>59wL0$R~qrUf$lll>N8}$?aVCu&nnyMc>1Xd4o*HLHuQ&YElsGz>_&^n+SzYMsr z@*BWuoCc^I{06v(8v)4vegLf8?*(M;?*f=%+W{p@%>Y=#13+Fv9Y6(B4TxGS1H8Ul z2(XOH2gJGL0Gj5`0aj~I0?;ujfbC9)0O`N}CuMK#0d(vR0}R-01&mEg0TUH`z}Ijl zpby~(crxJ)C@muZQnzCOLbwwEK8gfP6~O>ELrei75HLV{SQ~KviW)#HRRGKxuB#pU zu%xDy`&%uWKdq*z_f0LecUbLL<_9%Cvsdk|Mwc3(t4&RMrdh3o_CRf1sZPzjtxAo1 zv`j78t5B_EL%!ORN9WZ(96F~qfjg=8Yw3vE@A`vk)3I@C!_IruI)Cj{yH&kKEp3-n zEfmRDbD3bMt(MT#9&hzlJ77*wvmbU<8@TMKc0`O+gMeXb_urYQ`Dg2^y<=*ti8R#I z`a0#+0#B`}KJ-~qh0Fg|J<&3y`Xy;h72`gvdThC0^<{mJDj@cys*h8f>i(I>s-+e8 zRbTGBqdEnzQkDN&stPJ7P_>ZdsahGHSB1Y%Q#Cn%LRFJ>MD?%wLDk_Gv8qiccB|%) zcdBle+oJ09NTRxMfTwx~!%&Twr>dINc&R>*bXSc;x~i&;JE&g2j!;E!hN`w0o2dGH z0I9a+XsHs}s;V^_@~Wntt13rN{81V6o>d`km{Q4pII8k_-zOCWx?d$?_KiweRj0~e z*fSM?^>0Ijm5A+KEnCm0u(Aj&+*D7n2-|nbTmWP%oJAAsT%)6AU9LLR4&d@xoT=L?W z^4(*Hm0LXbE4Quu&yCjaQhpM>UHQK4X62jXBIOH39OXn=pmGq{R~g^ysjPDjr#wb= zQLf!&uYBN>?zPfrRfm#nXRA_=MU#@(P`y&s#oJ0i_D!XDK(SJ9+Z837BNvqp z<1>|BEu2;|xP4S9C_G820JcwQ@KdxB@KS`5FK3%lyn3)wVY^VN?Fd_G93P-0zerIs zzD-ne496-FVJIcPPqs>|TuUVm8=}Mn7%KU-=_(PE)s-A@N=ioa8 zZ2jk_=u%HsEZXCtsD^M;jQ--J*qd*o=){97p3yK<{M-&!bUC7%o z5N%&pxMVh`(APh$ppo@W!P|dCAx{3I!u6(Jg|7H6g?Wc|1^vlp1x(Qc1&*XnAp%&f zklaw%DpcmgDHPH7DC8)GDI9Cwq7c1b zsvvgeD-fp`3KqpQ1v#0w!jK+8;qEI}h0`Y-6=a@B1>0q)!k-!wh30U5g=0`{1?r%x zf>MsWLTlif{2|39dFRKo@?!~8@;Q!U@?MjlCU8ge3^FCLmO!A!H%Jkc1>GMpWFXweI^CTx(lx6|J^baieZ^0kzfEF4($) zP^i{MQS*PEGv~hVBw*Ekw%_;bzZYhnd(J)g+&g!f^~rtDbKM8myJt4Hxt|}=>aO|o z3U~K)%iM|u74Az($Gb(pSm54y>KwQCn4{fwyNldE-hQN8SU%cq@0;!JdvTb%V8ami zhlK;&&W_&h{Cj%18|&iTU4tEW>~BAHPQUacXUohzPMovDIr`^+cFt}2z4Q2pSDk%- z-s!TF)7&Buh|j+hpD`i+9nhHJ)!rq9m{x$z@Ik34#4sBP__(5Re)LOb6{3*FS7 z6k4<>Hk8=I3T=M!W4rOR5A5)mUG|H+-nLJ@ZM%KM3BR>}o&Jiw{<-JvBhG%xe(A`^ z?6wacw8KBV&;G^IAK7*N@350zy2<|0x39D36A29o=2wF9)r&m%X~m zb}nkPZz!(Aa#~C6tv@NVYgZg=cV^79ul(H%d&K2a>_?B8WG`^W+V4D=W4ARQVJ97t zVc+n^Ks)Q2zV_yMJ?+_EqW$_Ku3fk0bL*q54(qJ9_gXz}+-Y66@Ga}GZ+Xp{ zugJ57aDjZ_qLaa9HCH5F~GUOMSR2pCWPW1wV`=|nxkr{abqS? za|U*yqP3!l`w;~%=0Qqc-01+~Fbw0;-)o!&V}aF$UXJcCh(g^fI((d9JA zT!AREWTE1y($y@~bDQYgb$?E!=Z*!$*zVc(AyCIQAcGY<4}MOMU5b>`Vjn=JQ)Ayo zd|m8g*q;)+9foaI+#V#j7uY+HA+Ch+>+E|F_uM0p?zy)k9-r!t^nL;{;acq6ERV|2 zP%B{wn%2$st`jkoPzt|pj*3pgYxI`ujX|E!P&eT?=FRgais&WmW9le%m6Y%@Q}b0! zvEr_TPj|F88EVgc3j0K@$#=ap6yw+AqDW1otcxWnQr0EjV_Mcntk|WdEI8~3MIsL{ zE{)|}<~@gad_VVT?|M2<;&DCeJ*0=Z28r%3^|;)GDfIT7iZKc2@<5(fV=rMG8r^+C zk2)#g0_J^D#ngmarf!u|LPOJ0lbczSf!M_@W=*zv!x2YKCdFguT1j&(_o#T&+~er0 zP{mL}1AP_6^DubK(gc&^{pR)(`tlg2sF;*6k>00@)6h_@$F%q(;KHxR_fV|ovXkT3 zIBs$Ly?|uMm@$tHlwrmA1>7OnlW^E6rI!8pK*qvQ^@v3d`-y?9_$uw$wM^)_!&%$MdP!dM4BR^8=@_G?-de z`(^GIVNV{t{nA%6PGj3#hzz~#QaiVoU1I0-vgbJ;*z?&WIVdBYjarI=dp`wJ$4X}< zD~;S~^*M-jFKmS-MyixZW3f6Pk-p5;=~#X4fM8c%7d1QCnB5aG>tXd7MsIIF9yQx& z%-F}ix1+3{AE6TVd!ZdsyQhp@Cn8eU)2*H_v)w*V>xl!@%KgQd9S)uE&bE5CKx+@~ zH9l(B2T?hQxe>cKt7kEby|q_G)ULqTt%=wTvU(1~LEGQ!{q3k-4Wj+*#VE&p*^?1v zAH>0O5GPu6hipCVLsNPsIw=RIER5}m4oQv0IL)vU6APe35A?B|lnIGPCeG*uU#jwU3)-e1(B0tYJL~7XFx=0Y2QB6#u4YjO|SFM zw5?FWC6l2}x9u6d=)3n|)FwO8vifK~)IS7+zM^NFcCFaNB(!FX90A%D4JX^Ff}Fk~ z>(o^0O~^yUw&oEEvANa<_Pln+Xp98xBVi0;wl$x?3nWqrh1i&FejpnrPc$5XsBM)H zSWL)jN+&XJ42v6@9&}S8Zl)p;c?dk4Fb|QJU#JOXswP(XYJz`^P3ee6!Z^fitCYZ! z92OcZvNTZh(nu~u3bBQ(O9Xw#mjshdx=TAvcY_AJwuh{oc48qm+gd>IO>^22l`sJN zki??7X%h@Vc^4*O$hwAmdtXYjWh20rQ!^_oduqk%>g?&&4b{yRt<_c8Q)ZXWC@r5_ zIxl-cb45c-O=I(l;#Ccmt#yqJEmq}(GO)|bs*okKuBtjSKPx{gFLO-((z@2N>dN}M zrk3imisluW%PK1~^T$iHp|PPlv$|qwU0Gd2W&NtE>arCTm9=#Z)!&FSYs!S|g)P<1 zE!ij4RkyUPsH@DL+E}@2MRh}KOZL)=mg;(x)RMhm=ECxd=Bib74UOgXbxX_ha&vO? za?5kGYt~3w@uKXKimHm{^3uHNv&!eKs&A>TDxcce)Kp*H%nV=HNS1}e#UGot=9kws z)U}qc9F?0@$(Ajzs;;S6Ro`0PdU8{BOI9sAtfjRI_j8EjG{$TzDq3qHNhiighdNIk zX@{Kw6Ne0U)`W)+9d_>EL4%$0u#+EN?$l>dI6mwg7Is#Lom3G^!%kLsh_hCNMPcWN zu!rv5uTD~2Wlc>hYT43S(NI~rr z6|StUXtv7B(Qd8d%3H-t^L}26N@kbOE?RJOdFjF_Q>K-cTJ?<$%fhl-)u4`eAIn-v z9hxhu>ejNs0#(6sf5pWM0$G`3%7ilM+%nU-Ws%M;i*#<;7jGOYhb?c{%yxtft9zttHi~7gQ{*ueR7Mxns~SRgJ4C*P&^O>noO( zXp@b~Lt4{u~+t}P1?qY-)hH{Igv#dyqFPK)k zpuD(f#;k=U)2v0+b<1j7qdi$#Ucx4A^~;~v+AKYwV>Qt9Ep=_x9Hst|>#_LdVPaML zN7Pl0)?n7OIn&Yg(@IL_mRMi!Y?8g-FvZlVsc)=kjk+(LF=zV1Sw$t?J0mx5T-0bz z(VQ7`iY>p2Xx?S5wHCTYnm^KrGL!>NL=OSc?_KSyBIzr?7dR3k?Ojwdec|kBa~A0F zHcjDNX}~G6q8^QCO`o$cJSCi;H9l)pI4>tRKQ}jbe0W%Mb$vC?M8m_!!%uegilx<6 zRn=9Q`Q_s?m*Ny#SsQMyUR~FM6KpsycU<1saVLZ`S4cZ#;W1wlRUA1CqICEJpwyHH1%{7^M;mo<%aORn`tYOvo z@!`yx8aoKWF~wpGL%s0v;} zEqf%QF;o0OFgxFhO^%x#A4-T#bJOkKc3-ETeURPXKG-=VG{m;DT25ZkTCo(^+U#Sk ziD3-2T3PIMD{E;>ia*2A1XCMnR5at%3vp8ado-8{+EGid== zU!)I~+|AWLC`BuVA0w8!Lli1?K6pYHcUqVt);9 zHH=3zw1pO1!5fjFqnhT56)?g8%c^K?ZLV9osuga(dN>%Sym!NMf`oiU1O9EHWetXc zcJhD;>~6<2hQqPpS?Ejcct_g3+~6&yxe?{~jK^lerw4_sqah5!MjLJ{k2?A@^?ela zh=8c^SBZERJIP>bAGJGWKRei@LaD*{yA*O4e`%1y#wzOXN8Ro6U{|=m-ILwznqg-O zLz;>HzPsIO*s&or7`qP0NQpGXqo+YyuSNi4*AHsinegc6wskL_?o2Rg>4*gTV`~49 z#n(#g4?G)-KUO27o4*z}WX&{AkZz)Uw_)N?TMy&D^^SnTMA=-ya__`jtL@OS+@9EY z94vPlbS4i(t2!=Zg&EOc(uxoX`nzCINV=E)@YEaew-|ON4_%xCe}Q2TNn6m(-}M21 zy#xN1ck_1z{Ot`CV4^kM{M`wEJU-U1Z@?eBoq0H)7|x9kStGjj8`IC|W_M3Y$XY2m z{2gt$;qnkUCZ=Tc!1E&`8q9b(A9lg^yDxCOJg1ocxDIw09!)0y0{9zi1R%>~U>}-u z3+3;??uRB3vWXJS9H-rqJ|Sx>6k)_iU}L%LAJ#4C51%)zUqWYs@n>X%LA`73?KFC# z6RCx-b-L7q>A?~yyB7OC8eFR%g!+iWw5G3ca295IG{jnLO9?neJ93uxRgM+c%|6b` zQgd3{NDl@FBdDu?&nhqmXf!)`0)gH^D|WSyw`LprFztgQfc6R9>=UdCV_!&nyf+F2 z$4cyGpBNpJXc`;o!QkLdr)zzZto6nKlf#xfA){b@lDpX_TbG$+WVDeU433<^q8g{m zOs7AN(r9qxOc9j3_O>H4HJE;o)Q98K50Ty#(TVo9%Kg>O2ge#{eGgHNQC=(4Fus1~ zC&^y??svb1XP}H$E2HW_PdtH}Be|Uk$h`CEb~7aRPXUweGVi0hWjTNsDQLf1244l} zqkuIIN0opZ0M3^XhC&l@pk=iZ@q%qF5nZy5h?C-aBF4elL|lwE5YdFZw+RjQ?~_A^ z`R5uUdy9AwF~hPBC1QsnMW3t4IYPT>iZc}#De?^<)9Vx)6nPIp{h5m2R=i5_dPVjr z?KUYstoW?rHpSNz|ET!3;)jZ#C~|<%U#w!1B5zHo=e3?VNO6SXEXCs$d99+|$%-2k zuTs2S@qWc$E54=pp`wFx7yTTfI7)G{;(Wy=ij9h=DSlV+4#j5`f1~)W;@=fxaT;cM zy%lp63lwJ(agCg#SVA0vdj-YiMC4zka+}KMsC=2?)vCWm z#_R8i7^iO$F`jo3G0y)+MEM~X8^&`25#uGT-3mc$Jqb)+oyP0qLzOpQU)7;)RO5XJ>t`RlHI0`-*od zKA`w>#m5z&RD414CB@$;{$BAd#rG8VD9U_A`TP*cdU%RG6niNSPz);`p_rw}50}i( zds*TP#o3DdkV$=oVx8g&MSj?1I`0jM-&Xvt;^m50E5@?^VgLS$_6$VR-*P^Hj3H)) zhT%M;>5-HD%G}XejoIPcF}b;;$BfMxl@|`@gcLVh2K#^ehO!@0bVmHFPDqS)fT#mU9ahR15Rc6jSki#z}RdFQy| z3B{u}*n=6*+t9ipX6NKk%wEqo-u6))Nswb9 zCqRyc>_K)R$3k`?yO2YWLy$w;?TOZ2&$@Z97joe3)opnj;`Vy@_CK^Zx5G;siY>Pz z78nb3fi5rv3?pAaj%c&b*e1z0^SaA_zqc*U{qc#jHJ|5RGKjqHioDCB{ zc8?ri{KN-y9edn*Z*WJ#kuiJIL+2Lfb)=T6(Owxi-g`Er?X&kjgLv$KO&fac z3;p#a#NCniZs@zu`QY_l_M{Ay?xK}m-}dmkd(Mc(_`zu$!L{2Fu{WZ(SBs+SE+l7z zgW2zn9VYCMeK<3wVkS7fk7RTSc21ag%b_@W7+lWi zG*rPExsuV-nJx1ynz?a1X<~cVQs=p;lw9{v8hb9UqA@&WxL4Xw0b)*u6?if{%fz~U zkQ(dq3>25@cEsHU(G#xACvkFG8ftk9Q7d;}+(WPl4GnpCV6xm#Rm34N^|LrRrwnyH z-b1*b$K}IMXsGA)V``_mO7bp)+O<62bBYzSgH^G;2~eZ>bskwX~x+H-p z;uo;qOJHZ9fN`wN8ETw_L*aL;c>kzU8D&{9qgbmmy`Qn1e(sOG%aP&@XWj1c-j(CB zyuPg4CS}679!HUTuZl6=2G;aGHTJxvO#O-HA9a!tecbz1O!eBB`hb)|eoCx+Efn#+ zv5UEnetzl=MjSOcDSiOt1n^{5NJT+Q^4?}$8&nK=>*=dej);dZ&D|957wmcYJcgAj zCgIu(v00pgC*#+nC4LCX@aw@D5$m#(V@C3DTjPHSO`?51_Vy@fEbAfJL#&7EBv54X z83`jL`FL85X3@N(O`Z*>wb{?G~2`$--O!31| znRNRPsH6KpoNcofy?Jzj9oq#qGq86bOR#NL#ZSHmDnF(+BXIogqn>U5fi|*>I75kV zvP5=cANyI9>%Ml7Z3hYxQ}Of#G?XCs#EEiJf;5yM;Uv}&PU3=u6R#`bB;F^SkcJW< zoFqng9f^l0b)lPppeBZ7g5bo9+eX8Op_l@m2;FFEkFK;4Lq^fmo`!uws!3Xaf6~h& zpxq-C0rO>|5MFxw1d~2pQ`kueXkkqLQw2F25a+my1m2#2IznKwZ5_Q=%n=`>{Dz^Xcu3Jn8E{02n zzJ6^x8{-oZR)yLbfd&4T5%?sG#%pe8q@ORWZfAt=tC7;y&WPV?&8M|9G7cO1l~95W zMosOE9E&X$J=SCmX=i*fHqV#y2S|JSjlAx(c1HXczh#65Y%-WwIflcqjl`B@HS;@O zTyDlHIHhI+wshS8Tpmj3?Cd`@kjj+F*iav@oskk>h;3(NsV}(gj5PZ~sGX6svEgtC z7x;QFG8$PA`o-9dx^HO~_cO(~rB(XYFRNv>ly#h+vQ|3UFSw;m3T9_JR?9l+b-xxZ zr%5d~NGYWRe+aZR1%|*PGoT%7O{kq6$44ae`r39z(tV+=osqCFtZQe47eyHyj7-Fa z!9kep>(@%haVFvj39Chq*~v(oFSNBY!p|g_x9i#&;mm+=T00~6V*`(hzzHIg8;2o* z^^TSFQdX2NT)_Jxu&Q|DzLt21uO@_jbsLe7cd#a~`mkO{JkeJ#0r)j9HI>D|nW~~k zO-12?)$}LtBCVKw6Ap>s8kLwt1Vos{gzI1&vMz__zZ9>39mR_e#Qzg^*BCp?8933Y z&T%ooMxIPqsPt(-ftitgsDIAOVy)(YB~6Cchw#95Q& zBxX6QX42H@BgKeuULInyB=aD~B};S%+8MQY%Ecdd zM0Rr+8^GNhXO9&Qg+NIAN2IbZV~a&;V!5N`wR1~t9f)k`3!fQ60*E1EMSYRB^S?_U zLj_6yn*4PMW0BV{T@Kt(Uwj&wP-28a^UV;-{#oLdKOtD-734ayPreeHtZC`0ni?f+ z8IGA!zvxUjhIIB7C|ylp@3mG(Xm;JHTiq#Ik=CXAH9lkRKc2TmqN1?03_I$JDOpjn zRiq=jj6-TGS2WeH^?TfpvMo`Bp<*4FEFYB3f_B}J2XB3#0M(0=U{xBfy{?6+Hmu*O~)3vb+h(BNYMB5 zNQ$IQK|JWM-vIn6A`X)N*apU5X&?`x)+b0D9Voy=tGn4{qcZr@k4P|f70?9B-F}E= zh2fLsQg6y_Mcm{;)H)iU=fjL>FlqeG6ZFRqx2e$4A3tXqfBf!a@*rx}!XNESFllE& z5%iZD@P{lBf7c*x^3caxB=S{`2`23dD1!dN@W*~){d!)sSn#zKGU=QZ($(Jz)z*g9CO$ABb!d zo?FNj85&I%zd7Axz7;lsR zimMgRQQWBbxZ*a&?TUX<{9G{^Cjgc+Tyc!zBw`HidlaV;G1V3+mJyM!M&*-K7A^kgbn*K|bf1~&ZBI?nh*cYb<%DIa375O)|tdIQlKJYP>cPgTr zyL>~J@eDtlZ}b;d%upPmXgCv`v$UJ6DB~IOY?T)%E>^5itX5p3c#7hgisveRS5d|} z{9dc_jf!_G-lzC;#YYrnyd&RpD$BTs{Hn?_{vrQK<(-OuQIz?B^iNc_IUXU$C?+YU zDjuXbP?4{5X+KOcSCRKK)K63_RP4^7C{z6sMSk*Pz7|EkfTPT}Z^ZKyzoRH`(4fCs z<(m|5Q@m60Zbg3Lq@RZswbu z>52y{4pJPZI8t%6;&{c$ip7d^6}cJ%{T`=yqN1E1pg&3FHHxPwep^vEU$DDUWqyIB zznc_qQ{*>C>K{~mPI0T^4#nMy!V!c0K9%`L{LJqu_EhYxc!;8WgN2=(kARt~=SNQF zpR71Takk>IipMEdDlSuOQfyT`Rq+hP^A#^tyh`yp#ak8cQ2eo?aL`aMIgbG!RsBI6^U7ah&2r#c7H& z6uBq}{U57Xu2`waB}$mypvce6l+RM+3J8=hRJ=m*8pWFwZ&SQe@ovSRDn6w6gyK_* zFDkyQ_*+GO_+`0oDe@CFN^#M{{orMZ`8|uPF(bQfYYGpVJ>LSC%kV8 z;o*Y!(##jVE5jcUe-+LZ7+GNnU(UI@gEv_?1?LMyI9JnSz`05i&egfKKI3Xa@d)s( z#tE0{Cmo^nKk2X@ox9^|&)eHMZqO$iI=sDDJZ9$ww!1eq#og)kOCR419#+^X?Fc7L z?nq54?HG{cRg`x0gOmg*J?ZHsrO;0Xv#1oB4UjxYZc=JqDfUM%nLO>Ly{X_)g`MAR zo4e!skUinjO`$w+yS%uap|mN*Cw8O`n1b!ZjwE0b&;xov7w8U19d+5{6x3$NwjssC zz{4W*DqNgfJOoF=_=pWdio?RgqJ-nwesgik-p+}~b$CajyjZ(nLh=2Zj!%u-8GF#= zj`Snr_h!To%U^)wd7?j#XySs7egmFCENQ?3NXH}QLFWzlC1UQx)V!I~+`VD)qu+ZeR^g86*3oFchT1ds#V*_1qiDx;`)Jgqw)V_@ zSWKnIm`PJEUCJWMmD!ok)YswTuqNEOW-m z2TC{YOgu&5Gr2wBH37j@DC%gCsT56OI<| z8?crUl_U)bM=M*|N+Az_{KB=2*ruVOjwhs}T%{+uLbt+NM)`0-3e`(2ca*wHl4Xam zmXYrn9IXv-g0+k$z&h4_1p9cc$#;c>)&HTGl1Pykc1ytk|WdEI1U7 zRv&o9m_X8H9&cE{jCwl2(R$V+SB;0c2#HwB$UiRE`Ay!Z4~nA>8mKh(UK;Z+?As> zCBo6-Q#IByBJqnHEvd(}19P-qU@^tY(fS24*z7aQ+97+0ylRo7HJXtyQj({mDn2QT zclJIj!Y3Kh0!<27S|<5-Nah1ho+h`# zNLX5_oCtj6;pLne{gl<>xD`*eyv?WMNSd8Tr%1vWUrpmn!0VKoZcTxN7*cEKUH#!+wgtPXmAz zL|`(BSAmcssY1&-L{b+JTCq7++uC+Um}`Gp7VlNSjv)AM7a6a7CB)v1vsQ&J59J-& zemR6Yu*HDI1CfuMEF{r7%_93IcL0Dg@xi730t_-g}NLkm;$eGx11O(Pl2uP-?@WdMPDI7Gf)^I-Yz z8F|zf*0nRT6`O6HNO&C^ax}?N_Cw9VV{wHEBoA4sp`7$lgUOtRLIA?4)Z58j5fvx$$z20~D3J0n%TkkrmdvoCl;M_TU- zZaX6vVgt2?z_yj_KnbQK@Q0%ATdKsp-<>VB(w%-;E%j2C-?yMRG2#~tA{8TkN4Kn% zj$RLi(4`o;6dR~K1i#l?mP7_9O6TC@I}bz&>@AR`+;&Fz&O=5CBU!%C+Rg|`Y)Dz# z&d6k6Sl7*RCh0cz1N4M-zTRzTWW6tV(l>sGG`o@6fm&S&gX_g;ZBsiV zxBEhCJ0pL>W?PF1oRy9RBOH+g9uF&vqc?R%cd*8E11({rM2{uVUkDC}{uD1Yt_C0y z5`kwQKhPu?g0j4Q_%G|}U%ar@|8z~Ou~F7jc#_kn##x=^BnWfJ8%COtFrNw-6NXZ^ z*teKa=)~6$Z;Mz(nNMZ&!F-Bub>g#x{DeKIPZLLq8z*rwb4=n+m`@TD22;0KQQJq8 zhC4ldzElDiUA2Ysl+D;w?v(8`oAGlZyPKW8R+ey_J^9ShFiiaf&Q$M6Q$YHpb-ZB0UFYU?8`ck*5)L^S{rO`uZFxLnQe+i)yh&_45`Q z;>(uUioB4CvR|0%t1OlE56Dg5JfG?RcN8XejQ`0J{bBe+Uxm*UASn6YHId(pqX;1> z((POx&v=iplm2O%oU96n3djUK@QPIb_c>0(0+(T4g(s(k3(xin&xtEMH@5J+n8FQi z;kTW_^M&d3zr=Gwr~Q}bWV*@RI2{g!hYior67m%d7`q%O80R}|2HL%E5)n7|WFryB zr`brTI{2&coWi)Z<6_w+7}ryv2>K&`gx`buLeILeT-Kkri6#%C*2p;gDMmnHqSf8( zN|1T2seB-<0`XwEWru*P@+=fjo#>&*Bj|%!me4ZWH97zYB)?-vQ_k)P{(^ z^AICSVyFL1nY9jV{5h&utE z)8+6tHsH@3Z%^MYlJZN~{Wc;+`+)X==CUpZ8Knuze$c03WBu4aY&(=24H&0YQK?Ix z2Gm{j|K&MFc}~2Be8W5^xz75_=XAM}ce!bx5WNwk6uBRuus_cUR~3!}@|UXNJrKE*zmxRn3Xcutq#L_?mGd{o2n zZB$wK0?=<(`3WM@pI7;H#qC5~%RW&&2q!VhqZCUOPaz_IyP|wAhrCN=bhqS#D2Pjo zAkT;N7go$r{CD%6cuiwHcnu`puJ{ARpD6O$!gO9ch%YF9;EXLGc|$!(;lZ${#6mg$b5#cuf3K zO1YOJ7iOT$#WRR`ienUyQk zag^c&MZ;^FuJSR8vQ`%S7+%u}s;^L7uGpZsM)4HIvlTZe%6SR?u2A_##hVqsuXvZ@ z{fZAN3O^J1`E`}Y_ktonic^;J7x0fNzpMDZ;s=Uck%IQTIU~A?$%;J{`Q?-80~Gne zl(OM{j#GJ};uJ+Lwn4i&iiX$pEtOADtX8a3lttT zBTe@`XI*lyd&6%2*w#dMsyEupVO{6JmUX=x^_++8vR&5lS9aOQnY!M(`)$-UZ|bt$ zx1+AbZCnFtl+=~=!wOR|x9`5KjrEK{y{4g#FK=slsA>A1pPY5_v^smlS$Dg|Dd0}^ z+Ugbm@Y};TEUzWE=+7tHBM#eo(}q9Q4z0Vj*1p`jDo5Bz&fR++K4XKIll-)Gm3^_V z8&>D%vo7|zR?NF&+wcuLzWu}6amCKvIKD#od?csX*U|sBcdo#A#AyS;wKpMRZ^b0o zAd0R#{Lq*1IPKUl5}c9Pg$7RM-u8sh8H%|X`JFpCiAEgHgizd*9GPwmFMLi3<3)0B z>Be16!Ha35nHM((pllud$XGMd9C8Jn-h2Xch3oOE?!Kk9i3RTq;@c|5c|2#j?`U36s4(ukTGu4+ z1m=BD#Z>Q3=G`HMhGb16HbzVW>$FoiK=C%Ob@mNVTh`;;A=q3yG2wLR>>IaJo|nk> zv)ftWFt)@WP~5m3QGO6jd;s?LO%xlkCG=^?Tb9{gfhESH5^S{3pN7LhfK*uKt`%GL|oXi{cU*OX>=W zBhldY_vwnvuw+tIe32h4lX?4P|A47E$d-I)L?lJXinq_Eg3k*6>w>%Jo2UFlX`)ZJ zL(f$y{YLtXNB0RuX{67YdMJ*>Z=_C&#Sl}Zkt~}s`7J5ZOt#J3k3#MtZR6NHK;DM; zkjC-lSd`sETE~_Ayd3qA=JDmll%;)QB>!s4(m=jUdTbAAAz!|cvNS@h_}fHTTEUm! zhm2-O0oZI^%UX|(zuIN@!!8wErsEj737g+0$8U$hrxfKd%P200McXb%#6EE-QtpJ< zlMljK5H`X!7id}y9nTFZXg~fKnXgL=o$7)W1h8cFrU%SH zkr+%q3~B-b}sK zk76$&2YamoXP$&{*q@0F)tc>V{EDmHF-FHX!+xu-iLN-52IT;39{7#m>|o&}N<*TW zp?wAEvZJAw-!ltREXVFkxuQe3&rN z)KVxUa5`xnW~#~xM|F`2!KX?-$l?# zz$H|(EsP!w-`GoFlW=U%feDXmgoBe|z3ijAf0TX#oc(vHuYcjMIY!>Y{7;tpy2S?T zEk0{RCYIwmcyNZ3d?Pq-ppfN`${XdJoHa7XS(fEwhn>cWPU=jj4y$(6%pN@=GcVg& znB|NPuNst{bIc&D&uQCMjEo-VjF6pisFQpq{ea>Ix?3C9_{xXV5xGuHmXjHFmWRhU z$upgk!cI!fh|!tO;w)!WSlDUC%kM1v&;c0-hl`y4;pI~=cfOT%-i89F|4gR_70C+4 zp+KLXG8sRG82L69Awl8w)ECg$qJ*+8yfpcuMpj(+AAO`J{n5u2=J(;EKK?gIX;L~1 zmc#acqY}T*)mq(LQ-5+f>)SN71&a`sHdlfpQ{9J};ne=tUfS_fX<>p%B* z7r(~JT}_ky!63gJ>HqYobnZX%tDJ#TpiBnSC1&(S_;Q>Pm<-rQfA29um-G8hetPl$ z>RMgA(0?*t2)gse+8fY+f<&Z%ah=j`r`MfTE65?$u?O6XdZ048{wcdqr4c?oXVAA;L z8}zpY{`f+b{^-Z}I~Q@22T|*cIJ`y-C`|O~Zg#(dlV@2m4aV+r$iZ?y9f~*4uw%JF zZr%4Fn>=*U-XqFmqioV{K|JX1&Lb=<3?2O?V>8F`AmSzuqSlM>7iL6*NxL6%(BE_L zmjfOBAxp&HbBLQfh+2O^VucxWfwZR)5BmEQ{`f3Je?768`n`rY{jn?t{yiSQO`5WwA$tDq66D0X!;+-Gcr;Jp^mIKxcySXJmsx{lA{8 z7b6e(rfhuQiAE9Qnq@qeXb4OUC>@z`(NzAPUoiYLYnXM-->ci2X6)H$;F@K@;K&P# zsD{6%$39`3@;Xbd-*AiG$-wzQWD65H@3~&cp+q#qNY#&09H%%v0^ zR=h`%=K!X^s3`m-$ozIjz3`8KT>pS_Ut)}9by+_NC;s7@F8m|d6;g(Nn(F7Oyg=m> zRTlmc>{qJ(Jk?*I@|7xIr}Awo|3GEo8KIn?sr-bdbG=X2_a&8IRatmOuzy?SJ(~VE zm4#n~bXhM6`BQK*4NY%EA|d z{DI0HYVY8}#rk+er1w&}pUOj39;UMJBw;^6%8a z8JK>W${SSvE)o82QhY*D)**uauPV#hEs*(l39NUi;wg%lUNVkhE-2>@r14zI@f}vo zQ0&gnl=BAc_zWX_C&d!QZz-Oj*r?c|$nzNU$@v3#vC6z(qy9QYeixv8x8i+@k1IZ@ z_-n=AD!!}uzT&5fyr|G$cYdavU!d=&=_DM`j!Y1uoNs_*R3-y~db5rkKax`>8-qv= z0&%4xNeGnBQ6vk2^0kWH`IQfQH7t)ee8f1#M8!14K8gbs2P+O!9H}@;ajasI;xt84cUaD1#d5_;#pQ|( zimMb)R$Q-mw&HgbFH*cl@dib5gIFG)&4~{v{#+3t>-?JQQ$NZW2Vo-Y88~(@j0E`% z$#l7{aXe9mUAp2;dfxni$nnJUib?O~KQq&xT;CuUs=q2C{g?A^H}d8k4|n+j!?2EhKWiH}s+WM5x@PzH+V@h8wkFsU58pksZQ1Ty+U%WMoHN0EeH{5xb5irXBU5u<-sLRs30~`E;JD7;6>0(Nw~?1S@fQ3}>D#+A+W3p1WV^23ea`X_e)aS%Fks2cWeF^4 zGPtfGa9+1g}cT ze(t9pZ;j#)qVjY3q0Z1yEB;)HotiyW=DBOdZ$}oATVqHucJ25%fCRf1dz+j_|F3z7 z_BP~C1X(f6$Vg}sn=E_qc0^`lOX5?ZFY${^etb6BM~`dlGjc)srUGz zNo9?bTXQQcdpPrc=8H>J9E$$x(UfD^M=;U*+bo|I)}sl(*{P~yj0!8lMXgAM>CrSQ zqJkAw=oz+ug1rWNdlh#6`@69y$L1oiY{k{AQzZqo;+pL+;h%Z>nu zG`{OEnI?Q8ot6C60O^!JVM>Oo`3cjmbXNX^X&{ySRg)KQL{lS$;P*(o{4i=yEkuc~ zXF2_irFL>>YFuSZj z#z-5sWKy6o9tW(nhJYGK)tRDRNn+;!B$66P)wL0I35bOA2Lz~rER*MHrGnjvC>U%} zR->s?2w%R+kmxtS#j_BV5J-0e=@I5CTZJ}gAOdF!=yqN^BmNQL2TU1RfGw5W%c1G9 z(SxFvZcPdfm5JcGQp-b5>6%BHft55lqQ0P%z$&qIL0BXBwOHv%E$9(c;iwn-%dEwQX+yXgTbF4w2a2WG*ww_f z5^q{dq+3jxb!Om1KrPERDLMl% zXQ<`zcAqoUu?8kb)EATzSf4Cxm@@QnFpI#kU3j0V;IlJ z=J_%XiV}TCXBDM-Y%;4D@e2sdD%1U#9nv5t!icnGB5TB1MZDaPN1ENVDQ5zkj6Ke{ z>3QU1HVMVpUyBXtNBbK8RHnMfOyn0O)kWqC{i!Z8S44cf`!tC_7aQj#@i0H$k9dUYi4#;$EKofl67XS+^OeA?82NmfpuduUzmjOJh2HGfdVa9hU1|OOq!jsU71Ii(0e_{z`bGKvNyzoDZ`F|~C4|i% z1rm{SH)9)pQQA(U0=KKMQITzH0{_}IWL<-M)c^jv@xSEPjeUAoMT-zk@fjU0U0zjP zQ^6l~Z9TcEx+SZY9oo`b1%52zcs}G;?-doTwU9W)4ZnD>?Hp`7tyxY|R-RK)kB!{y>qdq)4XXr_} zBeQd}b5L^TF-~ok(|4k?rUqqXXW}0fgTh_>-4e2MCXB*@qq7S}I;*mBorIZK-&82q zhAdf9T)Y4aZ<5N%l{bYzTk~)KapM16j%-V7#jrn#$>-Ytw) z4)`wA_6WN=!bz?))Ytvl*9Tx&3s)rKnzivcuw8%1xRfMwe?Z7@I9D~UT3TPN8e#56 z=(3Rt8D6^7r%Roqr1>t!X1MtkkTLjAEMM9E#L#sC)CgnV40TJ|Ey_Uln}~I1b>v_p zjOIvYiD(;0)-HcxU`?MgWkPruhwp;M#`>0UO=EMosAP6{+KQ#sRaMnh;d#xCmDMdR zjm<5?!}(d`vqpvUa&q%?b92Xshc#E%S68%D4-X%YEZNnXB{RQ#eCE>TiiXPCFi7)t zEp?3z;k?{&d1J?&;D2ktvgDn%63tFQ?h5t-qq z6*FzBNdWR{c0iu-{Di_63ZL%62R^#1;@|R{!NL#jHj#X8aJT7nAX>0qH~z~F_B))f z(ijfM=3&FdQbN9>0b|FzCB|blfp&LjoFJE1U=g;U-R~f8#AbrAI}VDV-8u+`#t3Na z_~Z~D&~F`NSz*ZhT*bQ3j`d%Sjs8q{2tsm1FsQB)K|JWs!vNxWi2jfzQomOar$2Ly{nGsfETEFWG;V)XGla4-%<+=XXxi^%#4$XY01}qqAjTR2$Z{EYOt6cDt6&#z5}`Fw zVxYOK*9KyKK-nL9K8&&4RBWtU(BE2&)5Xx4VEh@`U{L=}aD%(DXHDz*r8#&F(=|OX z;b1~;aMyHm_AvPa6GiM3`~=;96Wm~qIku-Cy4L2aaD)BlQ2&}rZZIEX*~S~OrQ!I; ztITU>8jd&erV6r@yWibbgaF*_O4jWfwqHJZn2Fr!@wmv{WqrumJq&mV1`uB+90EOC z`ahAYyN}0($(DdlAReSROmT|hV#Q^Os}=dlnECi|jA%GY$k&fD@G!;Eiu{01z5J#raH+~G71t~Nh6sP#iTH~5rlN4w zkWaX3z&M;N=r4%~dwzwd%x|~EJjEhK;iSQCp2{aG)+@@|ddMf-GvGC<7w#)$uE|8d zPbwO&>volQDSo18n91K=J2_FDSmGxJz-bVu#|VisTot9z7Lh{y-k6G6@Gv z&s7|+NGb*OWFQddE6O~BY}N#=R=rshv{_}Df3Uki<%<<>SLA9|^lLb%kE^_0@lC~@ zisrY7J5=VvXUxwxD8zV0vLYx8t8Va3N3w<-Qg@%M^vD88q-OYt*BoAVC!>7m$5 zQO*a@AFeVv7d)>VsW?S(y5d~LQbjT{Xm2>HvL+|wX4R9V!SoG^7b#w*XgI6iSNU$m z`xGBmlr=cv=UJ6y4Nl0fsw``8Lf);i;k3qZoquWs27--l%wo;+=~3Dn6h{<`MlrulS1MYl?qV{IlW?#odY>ik~Vv zcx0fzIK>pjG{u7y2P%^3MEg;S6BG*+k5-(eSgN>4k<2LOU!mBlxK{CW#j_O8SG-X1 zYQ^gnZ&Cc7;*S(JDgI3HVMPp=ZX*6%NfiET`ZO>mz0J1h2R zlzw{b3rIOFwhomzH8u>*y4cU5IVF~V`PgQ~eS!q{0{aeRh`WvP+w5x*_uO}7&j;`L zHbfK14?YG`;`!KtA53LvsFnCDX1Ym|zzd+@fvK9cQNMHimSig_-p zB)@;m+uNS!AZ3u1b{rt)(8F1>9na@av6yHqj%XW6_ORf6ulV4Nu2{TirNyuwi}~kTut*1p1s|cM=^j8I zagN1&i+8y&8DmVA8xtIDS{+S}TjQH>qKg;)QK)!{LmyFyIsRJTWSueLv$vT1F~v&D zV_nJ~_D%Q;9{)Up*R>N9!LN-Wxixke=(Gdy;vg=#KCRcoN(B8Dv)bqNCIorCiCuZU zNfD+imUEras|)ECUk)PdTwH<8+Ox{+C3iPKL)QOSA!NkY!d^EUhc6YpASW zRaITKqN1|4uA%xHaRv@Z_QDn{v6g*O9X?>MsH@DL+E}@2MRh}KOZHNHwysA>E!hiZ zE-e3-FL&ruA+X+@zm5i)_v;aW_)fjDam9+phVs@5uo=i0k`CruBi!7Kwfki_tHXy6 z%6M$Z;Deo!S%U`;cBX}$Emqi>GSeAXbEs20le+4xZ0wt|oP#DZ(u0P%OemLxc*>zs z7zR=zxfWg65d6)~s`_fKeCAU^M(6q~lNn`hPF{W&f&sd}qV{>lwU$sbfTDxcce)Kp*HTwY(d zw5+tXq54F8*N*9zD7tNTpuw>eSj=(JA5~1eQHTXk4`is6_?_`qQ zy;hN#6J)dOcZ}@#{grI?$f3-dHfK5p)wGh5xh4DCl2KIOSkW4_FP$-G`odZG+q9tH z+`NFtIYo13%qfochj4VF%$!KcMJ3Z0&Ym`B!2!x1lW+a!^2dS=$B8ZN6QE~B8mM%} zans6Y&nU&LpK^3$NlKws9bl5nc#cw`f~9a693Tf;IYOku7tGdGEnPa*pC#y7jy+93 zfEV_CurSG%pELe|Maq;9P{j7jh&uiI8Cd&surkc80g!hGQ-o)Ae1fdOSd=)^M2dJ* zQo$>>WsgKOW(v+H)oU|n=UcJKakJw?39)Hzy4~CE>-4h^visWy<1coH*j84{$t!T( z0=72$SZiXWMp;=^6|EIk*3y<1pXC%;Pce9A(o@R+>%Ty3zRU9-ngJuAOYraBENd{d z=n4yuNfNr-F^%DHY#z2Rv&(@E^90Kc-U*ufMfNLRlSRVs`dikcknpKqZaHYj^7!4* z)B#azA_T6pV}eQJcgCQ<>(KyP@+)A#U=}$IUpnFe4gF8Xt&*{@gJ9LC533lT*YW-#?i=h+2=s zU+@Osqz#`Y1|||4ZCqh0Gc831meN^jSNSR7tg(s<9!8j zjO8YPA9{W@-qKjuy=n3QSvLk^pt&r!55_YTd|zzJMU|y)W)4BLw!olIAfxfev|tG8 zzX{$FrduGmvOfPE5shh0UqPNyFzml(VX(#7t{kb+;0WU`D08Glg9COLrcGe{vc;mo zkroWf{tIxUAx|j`fo;Td4S7goO(Kx(KDV2^q?^3Dn|whx`MPfM-QDD;yUD-lCjX_I z92@9R)~`=DnQL8{!1SVS^1N=cy#CY-v=4GIDSx}0{SDn@@_9_4{g!U>Z@bBRyUBK7 z3^Tvn-|T-~jgY%|`?G)Yfo`be?k0Fkv!CK0-W=iHCz!dLC|P;4b)b7NK4b>-%FSR< zA-TWkfvfvtLU&m*^H%i$MdJw}SWY)la^gS^kP%OL!HnHR$>={u9q3^=n6vv6w`7$D zI8dqG?p6c#V zc>VMo5hsnU#6v8L=kw4Y%X*C%wyfU~2ZI+z9O9p|@sUD!t)UFddY}43vE~)=Fw6Ro zh?|@a;xJtAiNmqOI1e3x>jrUze=ouBdr3@B!7F7&9E!-OvhWJwTKHNcRX<8`g5pt% zvlL4ek5jBrtX1UsiRGQ5xIytE#VZwWP`p)flcKaM@^4mI+7t4#DoZ;;{Qu-&1)LF$Uad#RrMFM|e(g8xi)etGr$1 z9V!dI3F#lJd@#;Gw4bCXzbOp)43%$Hd`fYLVlpnq%*W+@i2PwY;uJ+$gATIrd4RGO zCh$9&euE-^0+adPP;^{hK2%ZoGe|#4Wm(G&@;xe}nWa4-3d;CG`|w=KcEXep#LySa zP{dFbIY%*HaiU_O;ylF#ipMLKE7mElP;6CPt9Yj3xr$dPUZc2C@m9q<74KI3x#A;= zPb$jz!|}bOvW!2-GX8*Xs9we)~ z6tfib6ua~Krm5bnG0E#M{V!1D^_Oz3Vv}O4qRa=RpRV$Gir-PZRPjp1SRSVr?SF{k z-;9sP)h?ZS3=%Uwvd4@b9S(#D?;!ucyo0fMxw&J+{>ym>Ic!Wkj^}d^-T~J@>-fp# zn+DE3WKQf2?vmebx(~dAxjPm(XRdr|No>V0R-Uzf*w#V6fwnPaEB57sw%HkHFR?O; zD!k%@ikJSZm;Ac!l1&{CyU-U^SQ*q?NBniGJ;ajrznHduq_eG1^8M+Z&W!Evq)PmE z??^TL9Z#o^JoJ2L!M@JU&1)?;y*9w1?=$3E`d{Mpn`3lf1pPy4iBW(VrE zeP6-)zjtmP^P_zQcYf5l`NLE86}<4b&dr-<>??Tt!_Lhs`|d0F@Pp3H*>8PP(DB#K z&AT^!Qt-jv&dqnN|D@p0dpbAQ&-tX_*}rsd9x>pPg759_+`RL>j|N#}fA5Za0K(vJ&%`X1859~V@>(i@0~rwgYUj16zE>4h#%b1VOq) zX%z$kDHWAF4pP+9y#4;vuLIR zf4adRXr_RyZrq#GOf4DRSl!Y@s_D}C$28HIv~DEXHqnzG-LN^*L?6F(V~38&)n2 zG$*_pdvzPARML&9>J8-jsT-Aj8%X0rH$s2bQ`x(2+<#tA_d~j|=|VjX4eG`?swdkw z-6$MbPlNrW^UAEF+dkd6`>Kxey`>8Y)BA4k`)AuXjUldo{&gk&a_>HR)gM#*C^ensKfh z-C!r3bpPHnNiT?v<{GWhI60>_*Rn zl{9{PH*)7x(%H@32ydyN_nOk@#Z*wkTIsy)DrokqZX7vUK|7XpW0i6RT@_28+f`0x zs@;%HET?CSyHWkLoLrQ;@l&Uqp3LpWr={g&JX1PPnQ}TiRk|+U%1C39bl=>{Xu|kz z>_1yZ1*5yMMqEZOBfZgQj(FC#)W4oz3kJCrc0&7^_1?%@=}WL=)%t- zrL?J~3(@6vxv(a7H@xF-k!@ID>u!!z{>cYnDMRem` z7c?dp(SLzmSYK60TYbB*PEttoy`-&aA@%T(p5IeQ@lIXXFr$zjIY@usP(aMO3tCYH zRQgzYf2#s|Y$Sc2b^%Sj*M(E_3MfclI-a(CTB_HDn{oLRc%cgq9r8(0w+q(C^Xbuv zF1Rkrr@}*B@b8gNYWun%NzSADJGzkMoJWzHyO47_kDAwap;j%ArmpHjpMH6?mUTfs z?H_5Yc46U*e{^=CbleyJ(WSXvII>LIpDumgVCnfuU9kWCm)4H!La@(Ynl_>fDcAl| z^PnzNt@%q)eY-GZESq4IF)_0`$5{9`Ao_-rx_?!-j1 zY)bU)#MXV;B;(nM2eYzC*|ifNn*Pv^C!MH_{zK=iIx*e$58W~8#K9wf=;8fNJW={X z_w_sRz4JF+xgvdT;&0ME+lfujeiJ*{3G-9GX~dyUB&qzSoZX!m*5^05Z|#KEk1X1& zAsxR*7WG@%iQMy9 zuE`|H;7&A+$fOB-%8*Td54!aNENF3LW>Biq^a(FvF?EFR@@7l3(+BZt_Ye#-vD%rni zhkj%#X+3MlD63TJXWfnE>$YRj(-i7B(vEbU z6w=$%jyozTRJ^$zGy9~_<~8m3{v(-u#nR)?lc{TAJLX?ZruDPhk-aRL9!+eA)sSSu z$abvGPNH(zcC`5>(U6|)2)>y_vzps*Mk9$-E88$@Y!b2jHWU>lk|?tcUhfiVeo7lo z879)`FKw8ol}L@B+EAyMNC|;$_*9cXPrTY-7@k0To!hY0B7x*=+A#580!13Pp=xdd zoxI(Kh_v9|H;=hvJsWzN;{7MtF+ptpSD>-SkVS>t68m7^P*4|&~7PTS$M?7UO zZo`M?@uV`l4bLvdli|cR++7||@gv%Ba%epD9?*s@IdP=Y)e4b+9BJ3LV&<(lx>eGO z(Hr8(I=dD9<>Sctdn?*YV#y`86}6$UWG`t&sZlIF2x>+C&R9C-)r#C{v9!vm6*=`W zG}21ikBXr`hOPK#9YfD=O9ZgMrTVa1Knl#&65VAI!?5kVw zb5u0_%5Ona!Dkwh(Sq@BKa)7I1uGwXro#~}IJ5mT>A!7(qvB^W^KL;*O%&NWORo=) zB5SJ_%(jdoBf}OP(vG5w*IVE)KZ>@WX~DOSNSbrF1%neKsYR;=8=WFavaSW@rz7c_ zSbAPPl4dKlV9bC>`ZlEnhchDR{OA_=zKWpUvMp%Qiy+I+W~^TuLBndB@oZECJt}BM zbwM~ar#EBm+i*IN&{9~GJ<*J~E}letnxU4=)A9|?@O9ydqh=_cKl-Dz6D{<0KUQvk7xb!$>!_3GY9IQNK@3 zSowwMw+^KV zrj1y2B$RUW8!>!gC_Opbh`b)5wC+$N-lx8&%B_tsbAL}JD;sh0!h2F!(ukGI-;>w$ zMko$@Pcz3fLgw!~a_QfQ;(&KFu&n_pci++Z@&&>1cQZ zOvB%jdtd_$EZxL_4TlLG7U^l%Wpb+1RXau6-Eu19^3Ad0+Kk7?fmN&Qki z_Id=8_tAP-T@0ilTJ=a+5lFhLr1zBzBrL9nW?lgGn^q5t-~d`TvL0#o1L#igdQ8#^ zAist>oS7OxsRec5>)%lM&pHf?enTD6b#NODPPw?Vd)!cv8%)FK5wYN zunzyy{G~dz4(q)9$^Cd8g7p09!Vc+m>-%nm3h()ZmY&H^n@! zfvcW3Ia$}>*g9`IX;6cCW4&qC`5Ls8yrO>xYY_MG6XhXW_i%% zp;egW=RtKHmAG)*gHDxIB5bntvlHUS0X6NoeJD4G0@JP=9^dI z)CqSwbF&ihD(>W=Q;GTg-6?rTB^)x{sBT3idilE1Af-xNyyZp;6Dm=-$&IEDsKkLu zZZxf_0_iobB%fb_ol&mTFSP<0wysnrsetwgSNh^pff5y0a&V}?)&8!e{h$KYQoo&F|>>jNkQ?xCdnzKIp3uP;rSM(w zgc2=E@vX-bT70t0g}=0J)R!k+q-mcZV|o@V?kLGE#T;=)U?K-Hc!UYFqB0DIbKUxJL^cC^l*1WVr7k-BaP zYz^#a>aG$rZ?_|v6(!J~Zbw;jOYpVXmb^!oK=jp?&h{)pfU_;lt|-RL^R|@zs~9g= z*phK%F{X`_9``GTPmv8pIuv8kM;qF9uNV=JZ74&x7~8aMXy>kC6f4`%*X6~yCu2h@ zbBi(gmo+^dRg5TaYpU-q!hibKw5F^GBR5-<`OhMJo@`BtD8jXRE0Xakf>MkXDccsI z+|i15-Y$Zlt`%L>DZ&M^BExM(P#(?xmp1hWj-dwDFyh??=fv2Sb&#z zAJgTAd=zYdOcvSsm_6e$dBo)7QmZNX2IM0=(Uklg^D*4rlsxa{KL4lgLWoTKb40R9TU>e&6Cy(OlW>w9wLUAPre9#{q7MByPt=RCXdMdbRMz}Jfay|c{ro|h+c~G(5v?&lAo3b*K}ht8k7g- zYfNPg|B!dbnAT+f!{hD7kH4mjY{tsKDA5v4*U(9lp_J93F?=ugn5Pwm$>>;Ii z{YB!4hZJb>7oo+5WTN*MUSWo`Px~*NEDcF0HduxKDE1bFs_s zKIyCH!qDJ8{hpkQ&>i<_asOOY&$>_ds&g>6^B%?h%E8%h_oxqY5aM}{M4mb5x^a(m z%yO`K^F4ZeIR`JM+#|1jIp}CIppPqZus^|oKF`Vl+zjZ;&>YOXVnArhhTVDt3dqhz zUj+kt5}l3qyt}05n~nO%cWIMNHky{)rSUhi(JSW;{X3M6vBr1Eb!|4(l<$z%{A?V_ zyiMIBvSEM!Hoa*3gCBEm6aD*x@oBf{TkId4xpRy5zxji>nYSq0?hh7x)2Chff8csk zpJI>v!I)|Kq_qAIoRV&m#ezSWeeEU{jr@bi$v0_9`)?fkdV_BM`;B2&ZqSF=--uDT zL6!c$VHA6vSZ9(g3S0oEdeMGOuRAJNyc{@6STze^=LNL7Wg=VdBK23#gdKl@PEX9lu2UE2i%ce_j<`UhOEb{MpQppg8Tftb zJb8pcxR8KuahK_lqW6ft>TK_m5p67IF#)WhYlh>v89qBOoa++e* z)6w_hX)>Fb4x0(5X}wH3X2tzS?Zv+kclkehmG}!+CjCd6LBB93;S?3x|3bOmDY}01 z7v4`fMZFIFf_btI8Ls+;b2oLUYvwQPo1sG&2K~ae?HQNl?|vF$7M!3nC)3cKb(~&mreUS=ar(I+4OWYfQ@dOmN^_5qeDhCi zG&@EMfB!_7+A&%l{u4_JkJ7pqKk>=>D6KL62~9dmV%?u8EIUGTw)}+YlOr^A@lS|X zAEC<8Kha!sm_E1t09+1}Rn8AsX&$DXQ9p35`4Gu@{lKo5hbY$M2Q;=FqAO>AV11W1 zjotPG+kLg^-I5(jv){33)B(D@^*h|7_EXH_?~uQ+pN5b54mXAUw4?1CloR%mW%f5DT;E4g z5#MlW#y+Zi@eR{|?xkVI-;j52FU>jq4ZccyiEa7@gX}%DPWc-SJ>El_BfddXeGjc} zO2vxe-K3hCidFWzNl}uDt*dsEj9V)HtKCJ}_flcuwu=Ier-I+Ki*Bq-MQi&`63J(J>-AUWOr(n;!9n|nP1xd$tkol7oY?j+WlWwLUD?*EW4y54X zc`cf|ECnMcYLTa63O*-pr!l=#a9e*n-78AQsyW-KATAlBGPe==CZo=H8(Enr? z5@G{3)8Kna7EYeP1Z?3yI}<2O;~j3n$nyNOErCn0mfCQ2wv#L2{s2q@E}sbdmh^-PmuTM}?v zQ5T28mPINT0cPBRtaP<41YeeH~euH14ukrRuC&&#M4u`s#1j11jkF?Z%N z>TeK>tPGN_LoDn}iQ1OOVn0WuqZkXNDn^MtV=>g7(VV;(v~Oc%5EX+48Ai#^W6=7J zqfrlHAbX0V9mirYOP-_0t74#)D5kKfF)+O&rhJ(gBrA(arr--E=8I@T^cUQ;7t#Ee zUr?}4M5=~gu(wT})Q^9`A3t?ky!s1t52@3PXT%2c*E5(WuMR3R6M zw|AAOxHbY!iS}Hq_2@s7C(pFvVo2}b7;H-n6P9HSw90bN@r8|b->VdHl5rJBxud1FH3>R z17?%LNZ=l3(YZPvHJ4{mXey7hvu9E38y-zLGiixA4|BVjq@&AYq2^4o)!>oeJ%c{X z$Hk)$yUZ^lm}#~)#+`!nGE~eV?%J^<)ZF z{e6WJdy+eCq!KYf7bas^6w@&QUM6R6?J2gC$SpwZhu zKv!o1DJy+|!lVhbYS0Jd{2EVNOGDvjF`jnDgyPZK@uc-46c@YXNz)({|Gk%&zLyBa zxpVR~RTPSQGvulFm{54+jHBH8_egaZM2F=)#;y6gWQyZVizHKytB zJCX{wzlHV2k+ekVEq?VGN%{ldVs`ilk`#x)^!f;D`W%ARg(GOTdkFN(D)NM_nM;r@?e9IS{|D45mr1194kvFoit~#Gb zlqDG!fKj()Y5&*&>{F8^|N1xZuOC3o$!{<;U;v3-Gu(Qkb}I;c`cUycKP;TxhdwU# zgJWTDdN|AvL!S30&2nGZX!oZ6F}|2SzBh%t`ywV?hA!y)LeEZy#_#gQ(rq#XWnc6f zB18KJ`Xc9RFRCkijd}VVtkK18rF&!FmrfQKoh;|EH=ap4Sf7*LIH}gbW-Rx{*0=3!xx6>_D7Uj6 z4X<#=uZO^>d|zV6)oM2H;Y-YGsA68)FERCU6_Zzc3AMUPW<2~QbT3x2sqwRRwWOlw&b(Y{vJ4aGoO9`=MMRfJof&RJ1TGIFf>fS#lUgM65z5lVk6Wwvf=r2oXazjS{zsw}X4aXnnvK8KL7&0W6)f-5UTjemf zy>5sYk;B$3azm^`HY=2ML*=+^b|>Ezi(LLNIf*MACjVh>cCHxr@;94t))iqhf3sI> zTye`ci%ps6iUUen>`9Xg_J?G$z9}xap_<9gzj8rnSO)uc*99Y%XRrl(TwocU&J2}Z zFh?VurS*3~LDDZa>7O(B?Z4QukIs0Pp2nVAJ0s~p8q50688Uf4*`Srq*r)T8smVJd zrQ!!WROf`_mwvFjU!5?vQkd=0XQ&NKX4gc|kgJ-^cFH|NC6d^JvZs(= zo5XrVJ%vtEB1?Mu6hC()GP{dUarjRH+o|ys1CJ-Lp^8tDUjCIuw>To|@>g~_)e%YU z@l3(n5zP z8*BaqPnX9q+v86V8UKa#kHEx@dTItM6;YS2eh4tW-Fo`@Vxpnb9?H5(>Fe| zrV9?(F7uhKTkn8<=26Uck^}CKiDH>e_W0@%$;KtyW6``ww!_mNpWa8XN4M;8bVURU z)w0K&#Bla^jy>ddhqK>)2LWhrLbVbxhM^*}p3ZsFMmV>>iF;MpE+JKP@1Gwr2z znBgR0hX&c9dWMAU&$mTJa2VVA$rgDO#+F;#Vo<^-Hs_QrcJ2PehAy*3Wd281HOdwn zFMMRN6*g$@_`sfhwn3E12X^Y24c?6Yz?3iA;M0pxR=>_hS}zS{ffH@81n-$nqcxsy zc+bWqT0=SW9sBa!8aXH5G2I*1@Nam_25q&5^ZmE%)eLL+4SUO2rxmhYLs-%eD=e5F z!gjy5f?HTH`(t1w)nCDE|86T3WCXFa`BwO#6T~!nTfwg>kbTIqM8v~DrWj<2rjdcn z(AW|iUk0$egO-R|9Kgg&EV1wN8)hME2|2Ad?Dt;_l;`=gsi77qyyVYLm|LKSj6ZvR z%mQLtKbEC#fhSY_*q~t+82Q$hsTG+cc(pG(Br(UuwAbvOjXAcSe9c@=nPXeC4+|l4 zTzcfgzKk@-yKz1&wag4-eZ5(Fgc)2oY3pEymC3Kzk27ZIfA|%PUulM#S}*o#tQlG! zcrnka$CxtOi#?8hj5FSzO!wJiWQaW3+6#|yBIzZYu=X)V9Dd0v#y>`0-3u04Yl`m= zU$EP;rpO=rf-x6UjP`rZS}vL5zh%#v|9Vs8eD`456HRgTqz4<&V1jvV?(9vx3Hn&L zv(0WM=vH)RrB_TK|K5$=)il9wO*b}dvI*YhxH6~4M_6*%l}%1~gtUIH%)|W=o;bU( z33`v9ztDx*Y^5>@Djvqj8}Gzy^o(H<^o*5k zFvfv(&zMNj7#p&mGNUFV9Ju_HB_$Zaa==qI#KQ>rZjNk&o)Pw_II{a2j8L8UguR<= z1n*-{SYG2pJZN)ZvI!4y*V=*2bAJezSq@C|>O=eqw`WH+AA;?+XICdZL`0PxGi)%# z2_rjZ9&d=b6YZF_t06|bw`G=>4WY2vmYJ+Kghr7KyQ5%;CwFYv*}4blJI03Xj(vb9 z0oIH;KY-?XYo>7V0Ve&kVl8VPVDwEZmMs4ON+Yb8TlIaM_OoQV(f1L%#*!_1dLL_Y zEm*_Z`zX3@!Gc!ahqs&s`)|yBnERQt2^IHXyVjh2jkpKNUo&>u{vP`2o3Syc@8R+& zGxm<|p;zEzwq?XUglIly1;qw1Dl}zRBnHqoFlF6V2Cx}#${wCDK;nB7)>mYJncGd+ z{UHYMtbD}kzud(dlSeG$++FmW{)h#Sxr>SjWA-584(bmWGtK|*V0^0)>nC>yI`&2^ z?9*-hTxi5j9J`I<$q!lYLANnl_aSq7dkba#9Iq;Wl07s(D6FT!_2I z`c1lm^#0e_%b3eB)X-yU=PpCf^eT%Qbs29GuCP`7CCnXsg@qlzgsRP#+3Z1=&}4Oq zS%h4~>K_+b*}jWNA9ay&y)Ghf&jt3-=K@lk&a*FDFJMXTIo95M9ywFau~}~Ck$mzj z+qm{Tdi$PXI+f>OP_4^u*qy_QCA#dM_#8BDoMr}jXW@YVn4Za5%<26fJEnXVGMcB@ zy7V)cVx_|r@0@}0uam5P+8HcXILX2ibTRGt33l_6E)Mt}XUgMrkyUq$Wrv@JtLPZJ zck(p6?;m9o2A@XD*CXsr$bYaLafGSv`wzMY4zti6(!S>*w&2w%v{Y#`=S`>Jt)|U- zHt4|h{y}!|nGSv@9$-Psb)Y@w0BbKgiCIVYGtT@Z)cp6ctBX&o;+&Z~|J-@7t(ojt% zH%=R_12owU9K_T88Z6`3LHzb#&lU_gh!Z{5vs-TtKt*dEi_|)R&0cF+XUl%PX zy6%Vcj}F+uRr|5ZV>L4<*@qjAtC*AdJ~U~pV*ZQv;gjo17Mi{nG4(6h$6I?bPGbcN zR@{rXuFKhrm_2Z4SjHaf?m>j+GNwCh4;FclR9Egsc{5`p_U%T+X2!C*c43JZ$DY2} zh3HN(+p>NaoOg;@XT?rP{6*}g^-fIfD`G2DcH+CXI!n*mf%s50cKq%R^dGLq%BJps z#c5Th6Q_lP(JJis87*9%sKV9{*TT2!OPT+>?YRD92^+9)J5DZG!nC`#!P#Und;NSH z#uqMq$ax2!hDl^l?TT!@EnY~Hhg2Z4Y_Emoi+J`E!oJm`7 z>Ffel_IWcFCd_A5I-8+Bdp;{0xEUtK^H@&6CQK=s%f4!DLa#M*SwQnf%zZhBJ$Bj% z7nwQi@Uo5Ab!;}9m%jmfKhI*dMjP;A>MZtV&IYI&&Sb}uHKqGMgAKc+36-@o*t=1h zc=2jF)B31^Jp-n*(gPaUr8|vX>!AUcq^Yd)#d^$Bp2}{mTaVthQ&@f3I!tR)WJfL5 z!F;bG`?_!)mhqF>?6kEIDNbhhudl_Ohm+X%@oOPlHj#}FUxVDu6WM{IYtR{@z#RIl z!SQhlEY5p1M&6yk>Nc##pu+KNRP`!s-Y}jmv{{9WAbGZW=_>e*m1o;BRwDlHIJQ%N zB^DHqWm*$gB75^#wmxzN(%z3@s>fGg^rSItV!st|Hy+J8eU{^L%_x?(aXBpaj$)qG z%g`7#lAX6%hL`h3GUcVq;OsDhm8TQ3dyHVNHwikra!gZ!ApSL+RfRL`T``SmJvf9ZS&A|E>tN=-P>gx1gW15JBG|ti z#Lnr7uug6e`#M&HRR#mu#4vR{s*+`A4yt3!L0J~ut%jO}0j$c85Sv8BK_X87xVnH82#FMvio-yW6{~3Y|rGy@c!F_ z&5T+EogF<`^|3|Bv+Cvo`z(UVjV@02)j~uc?c^qEEQIaG4lbcg8Oikm%g9-_Bba@WG=V%?ewF8uIZXseZT zJ$ucC?7T8g{9+C^OfKclubu?!&=}XvmM{ z#&;<|t|ErJ?y7*;hA&(SN&8*V+~nK|sP7leoxVFkTHpW71x%WN8wyceRrq*JoE^!{ zJUkwImqu`VdyL1NmEoL`yF6^Rfb(B259@sg?Y%Tg@kBKekKfgc1LTtFm#C{0PvF1{B`(cBuHJ2sZ57$(zxLlvU;Eq{x zx$FDlsg(tnS=OM2dgHSaj&C$qu0jAoaM3J*muj6yU?pQH2qDu zjUF=ik@JX~vRnoY!ya)BIlb^^l`$7_yBB(1GvXdi=!J^c4>`@Sp16=}$o1dX6Xqig zxrmk?Sf%-ZyYi$5Yz*#mQ&f83X6QZ6(Wjelt1{sJ6?O3=W*Tslr*-jW;di)QM>_c_ zi*9rGT|4-4Pkrv??{>aO{w60G+s==$zRo4=Y~wHYzs9B7wDP_0UF8x}TKKrO%Nz!^ z@Znc4ab6nDd`ayE?x9f=zv}#XZr|rd{(I$FZbpwr-sbEXu7qpgjjB#_9yjWFzYG6y z+uqmleHwJQ=DJ$m`ua)EPN|mP+I5_pb*6@2`S2JQ>|M?43_i*&F0A6i9S(E8idDR( z;vr66yOJN^e~`QTtb%V-KfwL@RnAX}+s7%5DCe*5-pk$CQpWc#+0A`=T*`mGv5TvZ zE#cn}+R07nUBYL(YjNwB7xStr+qsjsiuf;yTe+Jb3VGw>TR5YJ0{&L#CeB2;fcJW` zk$Z3^pO;y@fxF_J$J?i9a0d$h@%zrM=eWuL_#K1RaU%}=B{17DskKs^(=lvrihzz zHIv_JsLs6%%-~Ix)i{NUbiOrPg|nQQ&byc`9$$m-JKOOdfydzw-0B$e3^Z-z)RD+MeI|dGqIT<5(*1Uo@LjyPm=y z^O(hL4N2y=9GuA=u1ez1%g^9+W+(A68PhnO$En;Qw*-E~-YMLctgpQ6ctuWa z)K^|5XA(DdYdr7xd?HtC8pkW2QsAP##PVGWCUB2?#PU6x<+)Ab7+w@Hj_arQh4(QX z%Y6)t=C|w`!yPaG%+HxRn(H^?GcT?k$-Oun#ovz@!Kpe$^4(T)Ty$ClA98d!r!g#o zcUd}&i`5M0`2j;YdI)|*?qJSe+I4?7h#S==;g6XQU`uK<3aO0D?$umFDD@M`fx%{P2)RfYJ7p+7$$rA#cvKHe&*MBKZ@mp5`K5+^S7 z<;!muh|P6h^U%o?ulMxfd+zuv?#S`xgIDH=Uyt?Xzc2nH-nRV}e{^P+xbCqRe?%ce zZ1%;IPZ{+~Jh}TN??3FP*kA1>-!}NWcf1tH>N{hsi> zb_R(bEO+1+-w6=A-mvF?`uK~3gYEdDbYJOboVNVw{;$Pfr`ht_VsCNsK^s2$f|oea z!J2pSekqPlvEuXdo{K~KTk$TFJj5?oSn_e&ZsNx`E%+1eF5AVdA$*j#Zglq@~1DEh)*0a zk2`o-ykqJO{`b}k;(2!0ctee|;`ZKpyxh9e;)ttPcw-G6@vWjueBRdM;sv`e^3x6; z5vRwV=Qp0y7VD{<oNDmLH0jNd3TSUfL* z@diP%;?E+EcRk);yyLZq_nOdGoIOsRcg&O#A2LzpuQ>G-XSFQluSR!?HlJF;r|)kQ zg{3dzhjccI6xS`}<-Kb~2Je;l_5+oo%;^jG;PIuRx%Tt;Wd#Kyz20+qkN1B?pDxel zGj0BeTJmP{#n&@L%G+n~iKl*wjzmu5jgO{^%#^3{V^1cE0^JmOgUfNElp&M(2-9d$ z@$HHHFW(4JYsCcq^Dl|0&w=s$qk$hqvI*n(X`1guvZArPqfL;gkI!hnpuk_$I%X8# zZ^dg-vC#-#=9QNywQ)HAYxE1z+vCId2Ucz(>mNh-ej}Ylr&kW||NqC(~N=-J(BlZD=8~>+H*KSAQ(pex?s!(QGV|{Vl^EiZB#GqZjXIb5C^ULl537 z`<7_#<}S%AA3f2Px$TkzCKp5@{aYl_w@!;n3mYW=9vl~q`dljscGVWCxmQWllJN|3>CXj&58jI#in@xs=U`HYWd;sNGi;E%eQh zyb~=F4SAF%Dd{_3lz05QYlB;(Ev6{%W>OEyQ#iqg(XB+{f3ozeU#`Rm(L)G_0|KYr;;AegVg7Jc91OG@>>0>o2?{m>I?M``c{&vNzUp`yUiu~tL)X4mY7OzTUe+c z9cCYk{$9|>U%Do zlEh}LQ@=UqsAN_Vr*4VG0`E1GH+o@_3_Dz*Mh>B3F7_K16@(faY zA3s_$YUT^IoA-uEmaMf`Q&X3fsK`80tE-Wbh$VVz8@9EF{qWaTdmT{~ruuuGTDMYO zn9k}&Y8&0s!j6|Js96n(4^#RotCo0M5@wZDtJ!~Vh>4*LJy-xM;!lPj^r3$K#hH8Y#B-g5VS1N@KeHEkHKu`nO8Fh8*{U$HQMv9KOuVSU8HdWnVg z6ASCf3G2%V>&*%4&k6g%3H!qd`^5?S#|it%3H!?l`^^da&k6Cs3Gu-R@xlr5!wK=k z3Gu}V@x}@9#|iPs3GvAZ@yZGD%L(z!3GvMd@y-eH&k6a!3HiYZ`N9eL!wLDs3Hikd z`Nj$P#|in!3Hiwh`N|3T%L)0+3Hi+l`OXRX&k1nW&(aQ0neF$?@YjZCg494_<#xgzy!Wv0)H@pPnf_jOyC6Z9h!^duAXB@^@}6Z9t&^r-Y5`2X}N6Z9$*^eYqeEEDuC6Z9?<^e+?i zFcb7K6ZA3@^fMFmG!yhS6ZAF{^fwdqI1}_a6ZAS0^g9#uJQMUi6ZAe4^gk2)02BNH z6Z`@b`~wsG1QYxP6Z{4f{09^K2owAX6Z{Gj{0kHO3={kf6Z{Sn{0|fS5EJ|n6Z{er z{1X%W6chXv6Z{qv{1+4a7!&*%6Z{$z{2LSe925K<6Z{?%{2vqiAQSu{6Z|3*{38?m zBoq846Z|F<{3jFqC=>iC6Z|R@{3{duEED`K6Z|d{{4W#yFcbVS6Z|q0{4*2$G!y)_ z^d0H{{5BK(Hxv9g6Z|<7{5li-I}`jo6Z}0B{5})>KNIQ!OsEeqpJdz+PcWfg!G!t+6Y3dEsBf_UW9clzs!X^jYIk>cD|RF6*xiaPpr|Ma zC`zegcgNV>IksbWcXxMplixdj`-ji_+`g9!csXb9wKVT=)BM9t^AI=9N8B_oant<7 zP4g5t%~#wsZ*kN7#ZB`VH_d0B(+%)fT)BMLx^B_0PhukzTa?||C zP4gr-&6nIXZ*tT8$xZVpH_fNqG_P{g{K`%9EH}-!+%)fU)BMX#^DsBf$J{h8bJP6H zP4hH2&DY#CZ*$Z9%}w(-H_hkVG_P~h{LW4DJU7kv+%)fV)BMj(^FTMv2i-I;bkqFM zP4h%I%@^G?Z*kkyd2HX(L5c^*U`Kk&EL^H9?j>`ydKT((L5i`_tCr`&HvFp z0PP3Rz5wkH&^`g}7tp=|?H|xS0_`Wzz5?wp&^`n0H_*NV?LW{y1no!Az69-0&_2as zuKd}rpnVJ4zo2~#+RvbU4cgzJeGc01pnVV8|Db&k+7F?95!xT2eG=L)p?wqDKcRgT z+E1Z<7202+eHPkpp?w$Hf1!OC+K-`q8QPzreHz-Yp?w?LzoC5`+RveV9opZaeIDBH zp?x3P|Dk;#+7F_AA=)3JeInW~qJ1OUKcamk+E1c=CE8!2eJ0v(qJ1aYf1-UT+K-}r zDcYZ+eJa|oqJ1mczoLCC+RvhWE!y9reJHQHaJeKy)}qkXs2wfM9DM*DEIA4mIgv_D7tbhKYb`*yT{NBelRpGW(8 zw7*CDe6-(3`+l_lM|l904?uYVlpjEO0+cU6c>|O`KzRg*J@6-=fbt3`zku=#DBpnc z4k-VC@(?H=;dGDwQ2qqvQBXbw#z6Ir7Q2qtwVNgB>Q2q(!p`7>sPd*CerBHqf<*87<3gxX({tD%>P(BOgwNQQw<+)J43+25~ z{tM;7P(BRh#ZZ0><;hUK4CT#G{tV^OP(BUi)lhy7<=Ifa4dvZX{te~fP(BXjDp?n?6+oAlO^L6=?$3yu%l-EP~J(TA|`975QL-{|H2SoWmlov$#L6j#%`9hR8 zMEOIMM@0EVlvhOgMU-bm`9_p?MEOUQheY{El$S*LNtCBV`AU?xMEOgU$3*!|l-ET0 zO_b+!x}<;doha{#@}DRVit?c-FN*S`C{K#=r6_NT@~0?|it?!_uZr@kD9?)Wttjt` z@~wJ2|k^0z3Di}JZBuZ!}#D9?-Xy(sUC^1mn#jPk)KFO2fT zC{K*?#VBu#^2aETjPl7SuZ;4`D9?=Y%_#4T^3Ny_jq=ebFOBlkC{K;@)hKU`^4BPj zjq=$juZ{BCD9?@Z-6-#k^4};Aj`HCsFOKr#C{K>^aUd&A)4eHmRz76W%pgs=j=b*k0>hGXF59;@z zz7OjEpgs`l2cfJOnl5$YGAz7gslp*|AoC!xL)>Mx-_6Y4jiz7y&{p*|GqN1?tH z>QA9Q73x=^z7^_Up*|MsXQ93p>TjVw7wUJRz8C6$p*|SuhoQb0>W`s58S0mzz8UJD zp*|Ywr=h+Y>aU?b8|t^Az8mVlp*|ey$DzI)>d&D*9qQMiz8&h{p*|k!=Q-WeKYcya z-$Q*q)bB%mKh*z2eL&O?M14WjA4GjZ)GtJRL)1S+eMHnxM14inUqpRI)Ne$6N7R2r zeMr=gM14urpG191)UQN+OVqzaeN5EPM14)v-$Z>*)bB)nPt^ZJeNfa7MSW4!A4Ppq z)GtMSQ`A32eN@y>MSWG&UqyXZ)Ne(7SJZz+eOT0wMSWS+pGAFI)UQQ-ThzZreO%Pf zMSWe=-$i|1)bB-oU)29aePGlNMtxz_A4Yv*)GtPTW7I!JePq;6Mtx<}Uq*dq)Ne+8 zXVia2eQ4B=Mty1L`}j|P8uh7BzZ&(eQU4nCu~9!8^|eud8}+$SzZ>^-9rf8!za916QU4wF;ZZ*x_2p529`)%_zaI7N zQUBgyGyLh}JIuvD{e0BdNBw=&=STg1)b~gIf5Zbod;r7?K>Ps26F__c#2Y~T0mLIf zd;-KPK>Py4GeCR;#5+Lz1H?l>d<4WxK>P&6Q$TzL#9Ki81;k@OdP;8b3l9t z#Ct&e2gHLwdP^AlR$h4#G63;3B;p7dP~Cvp{?c#JfQJ3&g`fdQ5E({NblfA|`Rw}JQ@h{xfuDgW>}5U&IAJDks7e|R24{@l+6B1@Tr8 ze+BVa5T6C{S`fbl@mvt!1@T@G{{``25FZBdVyN~^;?W>J4dT@x zehuQ;AifRa-5~xA;^81Z4&vn?eh%X4AifUb?I8XR;_)Cp590M8eh=dLFyQ}uAH@4X z{2#;vLVO^^3qt%L#1le%A;cR({2|06LVO~`D?d5EWn_quM~L`@h*yaCg@|W}_=bpg zi1>$yhlu!yh?j`?iHN6&_=?$$B6ihh}Vetjfm%n_>PG8i1?3)2Z{KQh!=_Y zk%%XW_>zb>iTIOc)f_?~8c9i2sXtz=#iwc)^GtjCjJ_`9EJ6 z@rDt981aY^pBV9q5x*Gmj1k`$@s1Jy81ax19~tqI5kDF6lo4MU@s<&P8S$7ApBeF* z5x*JnoDtuduDk#6o)P~U@t_eO8u6kLKN|6*5nmedrV)P{@u(4>8u6+TzZ&tZ8TWs_ zHR4?({x#xZBR)3bWg~tz;%OtkHsWm~{x;%qBR)6cbt8T^;(0ss(m#A}#QR44Z^Q#f zd~n1INBnTa6Gwb;#2ZKaal|7>d~(DqNBnZcGe>-L#5+g)bHqbOe00Q1NBnfeQ%8Jt z#9Jrw|NM2tV@G^;=j;53*N*t@i06*@?uhs9wqW`G}v7c>0L1k9hltzmItQ zh|iCB{fOU>c>aj*k9hxx|BrkC$Pa*g0S?Rek3RtU1dv|<`38`G0Qm@zp8)v^kiP)= z43OUd`3{i(0QnG*9|8FikUs(W6p&v5`4*6W0r?n^p8@$AkiP->9FX4u`5ut}0r?;t z5Wycm1oA~7e+2SLAio6iO(6dS@=+i^1@cuOe+BYcAio9jT_FDj@?ju92J&Sfe+Ket zAioCkZ6N;!@^K(P2l90we+Tk;AioFleIWk_@_`^f2=av>e+cr4AioImjUfLB@{u4v z3G$U7e+lxLAioLnogn`S@}VF<3i72Oe+u%cAioOotswsj^06R43-Yxfe+%-tAioRp zy&(S!^1&cK4D!Vwe+=@;AioUq%^?2_^3fna4f53>e~t6~{l{m6{5HsUE!zZUXsA^#TgaUnk!@^vA97xH-_zZdd-A^#Wh zfgwK_@`WLP81jiBzZmk3A^#Ziks&`B@|7Wf8Sj^OGvq@Ipmi^zB%Nd zLq0m>r$fFvv?}vPU$p43YfXEMse1XUxhzwbe2>WghiF};M&xw4U$lr;4p2+Wse4ohw>Fjm>_&|{#6!}7tKNR^ykzW+~Mv;FM`ACtU z6!}V#zZCgQk>3>gPLcl<`B0G`75P$;KNa~@kzW=0R*`=d`B;&k75Q3`zZLmhk>3^h zUXlM5`CySB7Wrb4KNk69kzW@1W|4mu`Dl@!7WrzCzt(Y){qfl%zb*3JBL6M&;UYgS z^5r6bF7oLjzb^9aBL6P(@ghGj^7SHrFY@^!zc2FrBL6S)0V6*!@&zM*F!BjIIqW}v zVdNV|{$b=JMt)-CD@OietT3BOf;MVNqa^xpRzH;O*M?Q1f{oikneCNo2j(q6IkB)rl$e)gU z>d3E-eCx=+j(qIM&yIZU$ls29?#Ssp<3oeNvRctIhuf)*QIc`W0%P8mgsbVZ!oMZW3v0QVG zVe?~o=N$K)k0sJMI`x11?_a*GaqPd-wadn_|1R&*D31Mi{juHR*nhWQ_g5VI@BYrs zievxX|A$R+?7zoLb2^Uw_xNR=#IgULPpil{_TTdh&JfrBd%m+>;@W@De^=eO_TTHd zs>63+~Qljx3T!OiEq1J$1*-JzInfL zZa+4@C43pn>80^);qzEt?}=~4pT&~oT728|#CiPp@vZ3NSn4K9U~?bF(k*uai}N6s z5tS2Ir+cw1ZIQq>-HGLpZvy*uE0zZ%5?H01&g);0zO*ZU>0O&b==nB+;!e{d`d3M8@W1D)?(wrSzB&YjfSw~r;Da#B0!9?Q@cNiBQJSf=_WHUFm0`!ph{{oBxayah?^TV3b<+L6?X z){5oQg{0QnocHZzQVVu<9yd-hn^?*D*~yyB=9P1PZp$UJg{7RI&&J7YcJWy9cTZ+x z3dd4WiVI`6+{ayuOr!>q96*5p?Vi>4*FlV4+4xh}a?`WVB8qseXI zn;5p;OK!iP$FTc*a%=oJh6AZm*vxy*?}oxD?Apy3PE}7~Nw3Cmu6+tCe<6lTK`G4r zbPQJ~q%i+uG2B>@!Ui6U;nw~XHe^o>cW$Jx@EtMS{g}dfZI0nyl9bkbeGK>WrZksT z&grTtEzVNs*ea!+p6^`0cS;*OD~8*nQkvT|=l&L@wAT}y``?+;CX99-?@~(3Kg@aj z*C}nwK}UNL#ym}B`D?}SS5zvi>lWkW=TnFv;uD8?L0Z}C4yIX~Cwt=h{dN_|Ohy&pyqFL?%=elv>e z`7_wYi&3nqmcb64j3U%MgPlGYMZJIwc4}u7nZ{(W{hOj37j6byyE=+3yE54L#Ze5t zoWZ)zj-uh43|3}J6dB`ZwC|&%c$7V(Z5|xO+VUB#OGp$!O)^@NfGDc=$Y`s&M-g{O zMyuL6ij%W5+OgJAOx&E&YB!Fe#p#T;w^kGxo@BHlu2I~K$Y>MFMlm;iCVO5qiVh_* zS^2zCWUrIS24soiPUlRvGj$YmLNeLwL{YSvlF8D=M3R0@CM)wjl8c8jS-p3WjK7`9 zT0M=V_LofNekYQcWSOnW{K1hVjhDsV^p9kBwk#Ir7l}`~EEd%z zk_?TrSV+4_4tL99FPlc<|5p}kS|^gsv$EKFSLghVSuCbZB)%uJSp6cAqzd< zE3=x*#R$&r&uW>DN8o!St9{=SLE?{D?d;|VmM6|;vsXnxo@~~BK?JudXR~zEBk0>A zn;jk#K~mpr*5j`TmJH8k@%lwjaeg-YyJrMvw`H>&9uat+%VzUiMeyZWHcQhWf|1eL zY!DG-$dujgmy2LU$?R6KXawczWw(*JA~@`s-A<>Eph;MEOOP~z+f$v(V}9ekHoJLz z{muKs*=^9P-vr;uZqx4nChALeTX5w!!;|N*g(rWLq(Bavx$idY~-SsykcQ?O@U0+#Qh9O6U4b^BFm9PP*S5U7yo_ zB>GK-V>zv1=yqKPgrwuT{gjU4y(ecZe7lp^GCui1>92Y1*tH+{CC_JmCx5Uqe?CjR=Lh#)^Vz%&KgiHJpA}gA zgND8H*@|gD7(6ncWgq#&`CO3C#)kah$@YBquICTZpU-D?JN}^N^L#eD$qxdf^VtLY z!GetWEqmD?oN&o+%?teCQ=R-aAkz=Bc;vSQNq%4<`E6Uoce+i^Z%5vJXY8u{cH+Tz z)*oeXS^hf@9~Q7x1;6v@X8|jm`8%7qpDXS zqslkRg%z^G#lBH|Y9ULU{Tun#6te&JADIpnvUO2kNp`D{1-$?2xETvskq2LSm$c+*lgNY#tbQJhlhP7V0K}v67-eUn+n^S zu3xEqvaqFU^_6T73!7i9uTCzcupKDp++V69mbk!Ib{8sQ^)h^A7Da4ug0J*#Q^YoW z`$EHjB6jK77xIlRVsEc~;n%_<7Io|k=XVsb1UtU4>T(476t5o|7Rr(jTZ{@xaXJS!Xlm83Hmlw5` z>Ax^`uXBF9FEqGX)FyuUOwzYSE!&gN&gZ0Jw)paAMrJE!*$;oFdf8$&dGlv}Hz;O5 z7k_3;mtxj-%4dASi`mA(pUE+;m__=3=Hi-SW}QDX^iVMy(D*Z@Zxyo*uAh1Ev6x*e z_L=dCi`&<%pQ(_$xFt#IoL{lHW%%`pQB8|m=9ix+-lMpsz43{Qe-*d5$3M|`W^sGH z?Gx$#DQ+j0ePYY8;x>QUCz{?XZas#6;?39MRwVEfBa@e~$DKcsBYz2-*7y_Ks+O=y zuAivivV>hL`iZ-}N|;ZUPxKyE!oDQ>MAV!T*6;gA#&0fRZ=Zf7)2R~H;mSvrJS<@c z4}GNQ&k~k>(?>R^a0%>l zf8^i!F1D!bN6Kt-vCVltvhIwF?Md~Kyic5C)CXq&cFuqEfn;e*+M-(@7*wRB4L|XL z_g2z6Z~s8Ywk569vJadJC~3c@e4y;;lD6}&56oX!()|5C5PwHW%hvt_JMq?E203LFKq>rI``M7v=#XAj+tXhTehd~xW1^gCBF2I4F8t4H~Zev z;(Td4zV;mxpOv;*v)*w$vb1@Oct>=)GM1~)JIWR-W7j&pqkD}qHnhPzX16P21uDMd zWMCOPnC~6mN0+hYso#-jQ5m}(`Id$|%2>NsZwWeA#x7iY%iO1B%mK%;Kcb8+`R6SU z)0VZ!xo?RrQq~%eeoL5ATdKA#Yu7#A;vP`eQZ#yt|ERK7rP5nQE+}gr`JMaO zR@TB(zh(WIvNkdD4f`HDw|n`9v%j3<)i>NqUCt&Re8ba1kH@tHzXI``4@U?Y0 zt2W{dzx>Ks>cBTd4lif7JG>!kZaJG**EzkpoV6_LTz;~g#m(hh|3Nuhoz%Jg_i|S2 z`)i)2C~r3(z2;W_^49g-YtB|JZ_jqVW?zf))_M7B*7YoJ=O({q_K@;cZoq4X&nj=z zy1&NnpYryi`DzS+qo-P;@7YEw_*h= zbnO*Wn^drB2Vc>vTLo*d?iDt$f;FD`iVV{$SiPaIc(JB}Rq=DKf3Sk(Z}W;#H!4{C z8n0;azJlE;{)+4gD%zS%uXviRqWQ;t#o96zt?0X#_}8y!_iwzUq-RANbND46f}Qg> zykz~vigtL`OMI4Bv=+l&l4nmvyXE(io0lq@dz+U`d|A=XRDX%ZRJ4l4U-BtKC7YY^ zC5ww!vahi(XjHS3)p_%RAMGmHq-!r&6j;g59eCmNCMsF{wJ&(RppuoI@q+Q&Dw+FV zFDQ1VlJ)g@!Kp`;Y-EcUc>ky z=fqD`#afqn&WIdU>}|H^#3@(B!V^4aK!Yk4^ZprMJ*(Kjo6qPKQpG+TddB^URjmEG zXEa-0#rDp4#=+fHEW=;VC~>KZb?@y)_s@635 zGfGykYW==FWpbOUHu?Tj-u13(OHVwd-iWHUe$!Ky%&lr0<~-%+rmD7b*i#yxsA@BP zpR)K~RU6pqDIdR7wGP#u;+E9aN)>#{*xarbmGUW9D!4j-Pdy=PV^Rcr@A7!sb39*GgAQGyDl1_PW{<-zUtt>}rKtJ>kqtS6kuwgxF|T%U0kC zWinK=(J7wLrC2q4^X)NHs#mi*_aC#TO*NZy{4vjZSF^|eJSN$QYL;)-V@l1fW*rAV zrp2aeHonJW`W~-lTbe#*^4)57sp4bSey(QEb3NurVmIga_+xJ6bh95H9`UZ6bNa?3 zVj8&F^8=4a>E&h@S3M$Ih?{Mm{D^`R-E3UQBV3lbSqG0tl-uQIdFwu+;srN*do7IkfNZB;l>t_!sQOMD4o_k3CYFO6o56RLJTRHzB$$MgjM?56*FKnsr zLtf9o(zSfZ^|j8AQk91sIEdZN^Nki@qmVz%@Q7XKw%fN zsw*E5x0adD#0T7NXEveV12zSit?KZA;Ump<*LXmyd1gn8JRt98v*W2B@cy{jfgktz z_paHd`}g_lv)Sxp_oZqw3ai<2_RSsBZWFzQ>N_ zHLT6Rd$iA6!%lX&M?}RMR;vCzXAf4xCYQWN#jZ8%MTUD^3aw$~Bk$rfsfG=Be3z(Y zHEh?(yG+?t!`}aMms}TWShm0Kvf*hBW58W1{jOmhyzX)^RZR=1dzU%|YFc=SyPT?0 z(*~xyOZ{dwE%?_RPIRkjJ`e6tb3jdNe(Vl=r_{7E>+VoyWlc*u^$sid)U?~dcgS?9 zrY-4shf&XKnrDqWe2%DTnF`;bLz-H4EX5rT7p!HzUv5*#wU#Bmb(=BGYuSSRw|UXM zmK9xon_2^F**{}%vv8_&I^Z_nRyvorx=n+vD_gD{EVLx?2SAsqM_0Z?gJgZ5wj$CO4new&24zNf1%nyjR_%RO&ibf5J`L7N}!| z`rKqtl{yyL`X-B;*0GaS9Knru9h;czCilXe>&3sxk4etuFK>`)c^zAQ?gsgH)v<u2sE$ou0vUZN~2FbRA#Uo-VvjhsAZR#PI7h-Coyv_qa~=({*h{!|RlOP}i=N zyiSgRGX7*T^}qo~15#jn5nF+51e_IC8X}9gVok)LZpz>VvCvdSB1nk6fi-y!w`I z)m7eRs&6O9U1ekO`qtn7Dgo8&Tb34ADdAqRZ3&S7?{Ift@IKh2QxbSlY~2 zm{YldwT`$<`6dl)%Kgin@6y1I9J-8mNCSJn{4zhsH?TBL#$e3i23E}XG8wlwFt;X` zS#qj@)hm6OBKI3u!}OQ==W_$A{o@j)6E(C-w=c0NTSLpc?-C_SHMIDPFR`jtL%Toh z5;@y7v`yVEF|Bt)3$J&Hc*7c+Yq3l8nc2{Oq`1VrwGC~}$BWcH(9l|5xyZUJ4ei_Z zi==$n&?e2kh<{{5%RS&CXHqw^wVf_fpgn^x_MPXEHMV$*&y%WkV@o;gJXL!(wlv=7={l&fC989u zu~QpcbfNRCThZ8FB{|QTU5)MRn{&K8*VtB_J4c+yjV*lRIWm85Y;~rdqj=ILmL%vL zt~nhNXsdHHDAUBkDx9NrohFt)^Eo=TZ(=8Zou!L^6Z5`v7VlwA?APA2be-A6MlL*y z$J!>AbjVrS?r&nFyw1}2aubWFaTa^t#C-CfrPS{xb}qqLa-?i(#a^5tQQoFDu4QybIx489|q+P^Mms5z&p-Ai?b%p00o;B**@l!Xq-v>^zC|`3Mx%ea%DmJ$yLr-$1L38KpaFULl zn_EQnlf3TJ+SUkdA8c+HmYrbumFAXl#0jFG zH@DW_CkXl7+$PjI!P^uqY;XP(bk5Vlp2k1H`Eo5R{h` zw6IDekK;S6g;nWxoYQ}|uyVDJQ*ccSD^%b(gZH+uv+>DshI>ov5bqf2dbPATPma=f zP)l2K_$b4tw6w}gkFsM~OFK36D9?Aav=&}RNq4%XU9qE7yVueh=RQi;k1g#$%n?S# zYh^_r9C7wqt!(1{BOEEx%3duv!d=%^R&CG`zBFxR<2oK8Vb@l6q3RJb2Dh^0*^ZER zY%8nz`!L1lx3WIB4pU}hE1R?PFy#-ovYoS>JTG^X&hsl$& zwY^JsnDlvC+sn^~h*z$)-MMs#k9Atx@lA)g)vmRzoqWidATwS7u@hzdJf+oo3sNp_~S`J6n+{d=t~^Qwbv_}JPGjXX$bJa_BreUR!I z-7TudK@t{mw<&oJanjD;!|ges{~6;Q(Hj+%4eCeiA%&x1E>vv+}#U{oc5rnn~JN`APe^pRJAg z`0b~^OB)ss*2;9)L$B*?ZD*xDY<}6+DrDTl*WYbz!U2A_8JINxr1g}1Z9adtCpLObhze;5BQY-bDh z?BeF8c6N65F1{UZXW#noBK5U)mZ{|~3chG(rAzIi%CB}-E5$A+&)D9Yzut*^j`rq$ zVkaIY+gq#UJLy)vy)_)VlO8SGJ9~+pbnn*Q@>ku7S4ewHka;KV#zrO);=9|hu7Z)eZW4pwg7cKV<0U{gZ2Q}k{Jd){(8_uh4|@};&jA;!6V^6gYi)6w?5 z+{S~v9qq@_Z458h(TXnFM*cb-&3(`|4z=lM1KMq)eb0_Ir~EcPg?F?~X`Jg#=xB%D zZFTaU9qsg~tt{Nw(ax>dO2I=N?c~s{ti9~qZ>Oykd)m>~Ro=>)Zyjw~hOOjF)XDmO z+QOX7ovhKhEhI16$#SmQ!hous?DdE(ylB+P{_)&G)6SjD&vgr113Fp0%v(r5w3A)^ zvYEcqI@zELn>o9zljUBwnY`OO+1^o`>3_VFHSe;Sqc=L)gKC>e^{SI~&$5{|zdPBB zubY^kth0Gt+{E4No$cznO=NZHY&LomE$M74yKG`?v(6UZZ4-OFI$Osqn|R%~v;FgR zBN<0@wx1U^Qtj`~=DKbpUMo9W*r<&R`?s@g^xDY6lb!8>>qd6o>THQKZ*=yfovrAX ze|Qkl*=nEvhj+<6to@pQ_?g4Qd`A33jEjc_di+B?bBy^Pd-^;@~f84;2 zz8==#%m&^L_pnkcH*jx;hov66fio*S>}7`yY~SHwyDMy9-U$yIm1YBf-Sn`AZ`af5 zm4_ucvEKRo?_md*tS416PwO*qJx{WETJ|>U*;d@s4wPQckZPXRG5LDxH}SMD&)1R4 z!_$TzTF1ozPfI?39g~K5+T`GM)Sv2U$(pYtW{IZ_Ew+v=TRiP!f^~Qu@wB!N*OKC@ zr|sUomhDeHE#u#7Y4^?3dIhZIR{}5FRevorGkRH^{A(#$$jfR(ui8x`czM6A)y{v1e)l`1xWo;_1W@(g{)k?FPL@B#iu{W#m$=St{9b3gQmoCod z>Q&@&5`jBISJA&|7iW&KiW44PtYPt0WC(Pwmv9xHL%P_p2P;`MrHh5`TFL9hU97x2tVfzXJEPU9H5Z z6%5GR)mC||U_qI#maXy%cGu`?W74kRYKyM+;mvYhb?Iu&jx8smZ&zEpa5+hbceUt{ z<)ok9)fzQlPPS!TZF@ zQimtxZNEz`<;75Md!1w{+opQkmB&l?Yl*l0yJrbCH+$QR8B0iT$lH8-FX6~VZ*#4) zgh3CT`^mM$;R<=%*&mB}9^-A}E-vQpRNbt`n#GW-n|&SXobS@j7Pnu_ShsFgr|e=1 zH|b{2lP%^*r*1a*=^{Gx?q=!sE#mz^=X!rH;;#watdRdAlFsjDtLrRc>bh>0FV`Y6 z?CEB+e=KC?>28+j;zH8i?q-3j7c%ZuH@iG!Au&I@S;=+_2}s=CMwVX4-Avu>dXk0I zF4Wy}KVHC^3f;|n_X3jE>2AxWEucs1?sliw0uFh1w-hxOkg;EPtDMa_e|UHE{4$^I z)4JP`GxLdF(%t4Rn@_FH-R++N^PN0*ciY=?K1VKex1+`86Lr74orpJ|vhTawkvsF~ z7S-K$ZJo#TS1FN&7pR3A4~UOHpR2~*qj}+NmbOxvP_!I z`$|4GquXpw)%CH&)n>EU-N!=G&nBpwk3D!ZiyHlWtj3X9q!{jFi|5Yb>Qo>5(PtL3 z7W-Je`m=D~=-fW{EYj@vvD-gpa`LQ?WxX(y0e5_?^~#wPeeGjo2hHT#PaoUaY9<2{ z^|VLDW|AvoPfHMQCj0aEw7j?frd`>dR%P?we5~Hn8jbmz;mvwlJCDCfbox#d+J+1kk85Ee))2dIK!Qxdttys?)WZcoyQris19_?u#GR|;# zJU#8?yXka!)YIl2ozAHbJ+0@w=@g6ZX{Gy4XI%1L_O;%0o@VW3n{!R4N|9dX^L-i< zEB3Oi=caL|b}u`=Y#Iex^)kQkY4~>OWht6ZV?$ssTU}@xZ~p3KZqZX6PEs#Be|0Jy z=Jm3+>!vbsO)tAQbgILP>t!9=PUY#bUUuDODoL;QvIYsJQv7i*+jVCO^*{Eqyj!Nw zCAyc595aQ`QM!lDYkcK6X_me=yN{5zdv3t#I#X);SZ zeQlZdWaj$&+MOzsnKaPXQly#8U*mkO@{39M&h|CWeUoUp($|JfpG3uNzP7OEBr+ZL zwQWq|%LQLMo?#NF@A=xLHxpU-#@B8hnn>?o&T-a6Dkt)@tGy=@o8He(*PO_aynePP z%S48i^0Sp6CQ!}I&n6t3z?X)8<~MHwE8F>5-98hX?_)p9QFj6{{rv1*_6e*Q=4U%U zkEiYwKl|(Cc%CirGq;7~`D>k@{R$dS`dxnZPyO+%IPPa2xyDoGs-GqOHjX`y{A}at zao7hxYr1$Gha&y#b^meBoVB+NX*iA@nR;8AJmV-@ptsHcK9;#}W1L=xwQ%jwZpo-qt8&G!=gLw&9IN z(>0O5?Z`8l3F-aq$@fug&f{;%&W_@ei@%jvGKzOq{jFi}C=%57x2_FGk;UELf^&~@ zxV8Q^^4mzt1^U~h(<5;m9WdynR z`&-+SBOHFUzqu_K!Ot81mb32&?mhLlUv)+}JU4&4kZlC>qWx|0$Kmu#7GQqIhEp$d zfR&v)-0A-Z*f;;-JS`nyTWStxy<33w$~>Hah5?r2-7reF4X`tZhVjZf!1~P`#^OE! zmf3e0E&mFz9SkGR_yB8`ei-X!1=zEfL!J41fc4)ul+VtvA0J{}11kcC-+nRX@PZI~)h(m+vnjz2{_8QFnJb{)t z-C$a|1lry`e{sA@pmq2Di}G~?EkTOESlBYq=5HTFe9u5D+<6e)`~q!V!a*Dk4YYh4 z2auH zDb>fejSX>f@O^AX=@8o0>tj7{1>@7Ik5w2NOps?E`&BrYaKApb8q5TOT z(Z>?!?oYodeQd>ve)OE*$0`T(qy6eWb|hmz>TK&{we|<$a?G{AZvwf^+iXcAU z=wp+&_2t}?KK7}#d7`f=q@U%P+Mmp12| z`|aV&jhlTfM@nCsKkaK9xAo%WhrU*+LocdC^tGLFda*iTkd<8BlQe0AY(bNrgyaaa zxZixZQ8>st&-0;dxggt8-G}i6S>%fzJZKPP)h6}8#XZP^%k?1CE67&d?#_O{AUivx zJFy`__PStqstpgan6upoo)l!sg1R}m_8?1@r5ksa2U(H>-Xz)-WD(xpxa0X>l z*U!FG^5SI9em3d8r!&XsXSqjsvb$VATU*4F_4Ko17d)8Lpr0-4=fSYn{VZKp4|;g^ zv+x6*sq5R%Zh3bmUvNJwnY1$zL;BgEjh#3@zMma#)rt8t`&sm_j&xtr&&n+7Nb&Xk ztaGi7yxY;whQ8{+nnV3;{-h3cIor?vDcgYzH~QJmo9#LFsGsc~)SiI1{cLOA_GJ9g z&z7HP=kOT&+XTOMv`*gN{L-}Jea8OI=gPJW%hTV|cW6u6;{EMTOdA$f=x=kEx1m7w z{?@F18&);!Z_)4Eo%~yWCtu^vBG3L-qoO1 zzxkYM#hw}c?QZW@WL?zX>Zff*zcu~spB*hZy|uq3?a-2J`}>~HIqwP54r z{?6CA1z+y=w_GZyeVTUIhSv0!lD|^^;@;8v^&^B<20bq(O`>SUZ3c5!8WK~eJvee-9c;tH>ar$rh+WBE7tgdImi=HI(q#{^PF?G8s6dF#N>~Tqk|B0#O>I(F z4zVwdYO|?Eh-Lg(i$;w?tjzRUJZT-`=9xuZq+1y&k%DTSd&S8L#$PT zV)YN#V8+N0tJJLqsV9e6uEaGMJv+pr*H-8Ek`TMzxH>-TLTu$nbGViv7C7CgxIe^7 zS1@Ls2(h;};mgGkTQmR~-VU*bIbp$*5c_b@jW=&YY(iHz%6|{Byb0Y1j|s6&tE;g) zai~>nSdH&#LhavouDE0iwNg`D@ys7;OUk%1sYIwHzgCr<6+$f_q$>9awKG|&5>+qM za_y}`<`$vWyK@yvbqKYsv6ZRe9crJKR;F3+P%BouGVOvxt>cSIbRHaPBgZ<&F`>4) zSS8v`4Yi}^D$;CjsPq3#MQSVywHIkBQfhsuz1v!WEZd!9>k35e3$^Dz%5(2{sNI-T zo}Cv$?QqrdOuiXvEAN%V>rto;A6yQX*P+%fPdR>k4z{oWC*id4azV-XP7f@FHQYIVb*tIX+D<>vos}3^LM2%TXV4#<*J8S)xM>; zP(RF$rz?ebi!f`jy(Hh-huI1Dk__t_X4QVWkkl{C*+aW9v0s>Ftm@+MJHssOZV5(? z46|#4O7MGPm=(=c0^gZo7J9HaHx`E3L9gPttqQZa@rtu#W0<)vFGkG2VHQ}s7;O)R zIemztY&aQa$3_<=>SCBZFI<#*x56yuR1qdW3bS;+MY!}T%yK6$Ldwr!R&YaM$FJZV zn-pe1+;GeNp%816hFiKRg}9bB++s@=A|h+JJ-<|t?D@j&c;A9lE*5T!(-ow7*>DTm zRsip+;byH15L7eV5`NFmpoY%%X69#D%WxY~F+amQgj>0r`54?a+#ZGIBiJ|G#$?Gy z&!BKCvO6zr287#@_Ia`4;np@H4+X|Mk2fz538sgeziS>I&JDK@cXP92X}I|g%FURy z;r1{`Zdz{%w`Tiuk#l#r?dqJ1M~A{KdrVFip9;6IMLFqkDcsrGR5vxAt+e^D*H78@(hOBT^2qf2wCAeZ~QH z;Zar==NMqG|Hs;UfJagFZ^N7HruRxh2_Ym9N_rq|Cqr*4AjLv41`;sR3C*-su%Lnk zQBXus1hFEBh>*FN-SnP7LI?yBLa!FASa{DYcYN^weDC+Y-*vrnU1xuDX3n0OIdf*_ zoL{-`rvp>NLUZK5g9B4P8jvHqnFCV8;&NpF^nlc@$vJYMO+c#GupGI|`(09>9-AY( z5ABkAbz+XJJL{i1@sS+)`qTcYd((2{qrv{EZgX?wuT;O(%!N7f`p5lJzgeCm&(is& z+U4iSG24AbTwsp;hwPjB#>+YKkv5;yV;gehe3MVA`#U-Epq@UdBj3-FFTp!?#qJz= z<73{bJND$r#=pG;zI~2-daGCJcS?@@l;oA_UXmkwp7u-)ug;O*&+|-`j^)S$yL+aN zKba%%JM57S&|0PG>kmQ~^?XMj9&l7H`;|;lT z`YN|n$t71-ySSx>d*{kszi~}<56qPpKIEGEUC&%u`Pn74s!y)$@TN=Zj)+|OzId0^ z74f<9OUIm3N2KJ+MN6Gi-G=4Lzj`^R9vzb__u1x*=Dtecmp0)8<_HNSIw}(6(IplVU^a_MN%%tFsNMJwD5o7uy_2t{9j;YR-*LJr}{rG6EJnpbfs-Y!UcARFD zI-^bO|4o`{l{ib-zh| z(Rnglf0OzR&XaeI{Z&dd=E=`J|BEzySe`ts=x1r{m^`_U?q_M-_&oWt@h552lsx(U zr*28ov^@F213ya9kLSt1{`i9wG$&8q81;kXFh5TYpZ~pdZAqTIZ})dn<;pxc?!rxJ zXMUdiX|J17?wUNg>ti>h`(MnHP48Tn0$$CNTaRCp+BfFOQ9jqC58la>pPF!0dVG7H zeCXvXQsAyU`BvFwspiu>ImB>T%HNwOj~Q}F>ibQeJSXp>R8yEI=N!BsEwtpx&;N8@ zaxTx4UyMF4yNia(YoFWcQASx)51GtQrt?mLqw8-veEb?5SApBe4a_$zsG z$EG%^{AQlK``8&N^`|^J)8mY^=XY_Q_nnry-N}&?>I(0uvTzRgl?zkK<(S;r;!sC@a6 z_nM?}@%i%JmPYBBqZQy_^5w);byCjEe0kzmwbIM8^5w^G)<|#7&6nr)tC69iFPx|46=EHtvYjQj{;JJ_qU9@_hO8BZ}0&CSUfuT_{yHHmf&Ay0-BRxG0{N4G-O}dK z1@eQFK9cs{S0MlR@-C@lLV>)lWT(_Pxj+uS^P$xCaDn`J;)l}t=>_tjr8}exX$A6u zPd|{_XBWuP7v7he=N8C2gWi`a<`u|3k8GC?EGm$5U*9IZmt7#Au6$2=W@Uk#Xn0S0 zJhwo8McOJQnF{1HE8dmd*A&QozuY2t5DVmaSKbl4j|KAXkawg-uN27b)8Ce&Hx$TT zZ*G>ZzgZwlwVR|JZx_h39X3f1Z7q=340%g3yk8){_tcxxXCD^G`}S>=Chjhf&DY+L zzWcO5t_*!cdT~#ITsw1v6!ev7hqqpr_8buHT=$xke5gSF#_=`DtQ5!}4t-S`W-gFl z&Ur;TQd}S}_-ehBP+lO9yS`5Pq^dyfC7izk>I&prGhddTIa(kedFv(VVpDHVD4?M8u| zIpbOBk?#v++c(!puiq+=x74hbihn7PBkfm9w|*D@Pklz}{#SuKa^=&~P@PHMm}ZjF z^(J{keZG`uZ<1dankQ{=GRfKda-dbnj(m8Dv?ItQH@Mfp=1(rbfE^6~p-OOGUq`U=yfZYd@?f8gWN3CScE zzx$Z<`Vfo!vwIou>C(ndHIB80pgtalDApQrEdAx%AzU(z976d5!A`>FPX_oRl|A8n@6SU%WO%+O^mu zub(bdmrF%ERY}tLfCi!$=lGG>9B&WTYAY~Sq0`sQ_${98v~srU_(96hOzRQ;w&#Jh${b(>7`y6E0g&D$pV%Wb`+(k&*r z&OKN+SH=~=Bv%@6xYJt-9okAuDNC_W_?H~I~?jMVC zUHqiBPsIP8_mMvP%p}+U>?JM#!X)p{@RSn2G|8_YbC-VEYm%QF<|gg=$|M{2x=0yc zi+X~cC7*9h^3hiuB^(s}>@Rz1_92sqv$2y5g<}6Hy|i61$rx)ZB^)uy^AGBz3RPU^ z_`i)0SxoY>0e=|J6q)3&9Dg&Wmzd-$7k)Cfm6~L~q92Tpl$+$l?Kh1z6(;$?{A)&I zmAG%yE*n3p7Uz+0!RT6R6866ikga-+G$B%g0CG5&l~T<3m^F|<|myVs8x zC!99PO$!Q*%g%`N9`~*B%{G(#XP*Pcz3nFXIsI40va=@Hp?#0BrNbnzF8s`R@tjHi zW%I|zo99J;UB1is!v&LE_23TUcNa}^MC5kkt)eTF1~H7z9RZj(Obp? zS55NrZEqOgy=IaR=DudkyDsW^c)jtF8zwm_{v~7NO>y0xFBo;-ndH~5uQApL`EB{r z#*N>L{xLS!`0x*+f7mQH`u!;CJG9VPE94_fpD?bzWs-CH&oajTB<@ScbYrWKyWW{< zeCB7-4wEJrLw*tc#(At!5%OcpFyrK3P4bo;qw#`}&&LinF8xik@6{;d??R6Hpr0}C zcaz+GT5scRA+LM&FlOI2$p!M{B{>^aA%FZ{Zw&j>B;WVoA1TiX z`H6Zn<*bl*qB>F%{u1|TTT{wfAzyQ^NNEzXI=?Wb``_X@ys;-GO~~jOJ5sg^`AF4U zDNRD=Ccl*8bVqEToSTv;p9HpJIw1n% zg}h&dynltfpM|`?g}mQ|y#Iyl4~6U>h3qed>_3I`?h3v0| z?7xNV&xP#Yh3xNz?Ei&)9t!z<6!Li~#w=d=~O~E#&iC z7<%`4F68rF$mhL~&wnA`2Zek;6!Lvh$oEGf-zSB9zZCL)Q^@yEA>T)Zd_NWPeO1W! zS0UeLg?zsi@_kpx_g^93hlPAUDtuome19r@pDKL6DtzB6eE%wZA1i!6D|}xoe19u^ zpDTR7EADsS_X^+t3cm*mzYhw(7Ye^0%Hgfn?}@_ii^A`X!tam5?~%gqlfv(n!ta;D z@0r5yo5Js%!tbBL@1er)qr&f{!tbZT@2SG?tHSTC!tbxb@3F$~v%>GS!tb}j@43S7 zyTb3i!tcMr@qi-Fw2luHju#Y;9~6!!6pk+xjyDvJKNOBf6pl|6j#m_pUlfjKloOJ5 ze4}u@qj3DAa6F`Ne57!^q;UMCa6F}Oe5G)_rEvVEa6G1Pe5P=`rf~eGa6G4Qe5Y`{ zr*QnIa6G7Re5i1|sBrwKa6GASe5r7}sc`(Ma6GDTe5!D~s&M?Oa6GGUe5-K0t8o0Q za6GJVe5`Q1tZ@9Sa6GMWe64W2t#JIUa6GPXe6Dc3u5kRWa6GSYe6Mi4uWY18a6Y1Nexh)`qHzAAa6Y4Oexq={qj3JCa6Y7Pexz`| zq;USEa6YAQex-1}rEvbGa6YDRex`7~rf~kIa6YGSey4E0r*QtKa6YJTeyDK1sBr$M za6YMUeyMQ2sc`UBKcG-wpiqCHP@kYszo1ax zpiuvyP#>XCKcP@xp-_LJP@kbtzoAgyp-}&!P#>aDKcY}yqELULP@keuzoJmzqEP>$ zP#>dEKci4zqfmdNP@khvzoSs!qfq~&P#>gFKcrA!q)>mPP@kkwzoby#q)`8)P#>jG zKc!G#rBHvRP@knxzok&$rBMH+P#>mHKc-M$rci&TP@kqyzot;%rcnQ;P#>pIKc`S% zr%->VP@ktzzo$^&r%?Z=P#>sJKd4Y&s8D~XP@kw!zo<~(s8Ii?P#>vKKMCq9LH#AD z&jj_GpuQ8-e}ei@P(KRlOF{i9s80p;tDwFW)W3rISWrI;>T5y$EvU~0^}C?H7u5fP z`e0B$4C;$P{V}Ld2KCFJz8Ta%gZgMtKMm@uLH#wT&j$6|puQW_e}npPP(Kdp%R&7) zs80v=>!7|J)W3uJcu+qN>gz%MJ*dwI_4}Z{AJqSY_5jd60NM*c`vGWA0PPE)y#cg8 zfc6N`J^|V*K>Gz~&j9TkpuGdMe}MK7&^`j%OF;VxXiov{E1HPF&jRgRpuG#U ze}VQe&^`v*%Ru`XXio#}YoNUiw7-G&IM6-^+Ur339ca%3?R%iT548V*_CU}+2-*ul z`ypsg1nrBUy%DrOg7!$zJ_*_@LHi|W&jjt8puH2ce}eW<&^`*!7_Iw7-M)c+fr%+Ur64J!sDd?fam; zAGH62{s5qV0O&6O`VWBq1fYKb=x+e}AAtS{pnn4BuK@Zlfc^}ie*@_60Qx_G{t%#l z1n4gT`cHuV6rg_v=x+h~Ux5A?pnnGFuL1gRfc_kye+TIA0s4P{{ve=#2bfAA7=x+!5-+}&kpno3duLt_?f&P4;e;?@Y2m1ek{(zu=Am}d$ z`VWHsgrI*R=x+%6AAL&Q{*a)5B*`cH!Xl%Rhl z=x+)7UxNOapnoRluL=5Zg8rPKe<$eg3HpD6{-B_LDCjQ=`j3MCq@aH(=x+-8pMw6V zpnodpuL}CFg8r3Rs z4EjHV{?MR*H0Uo4`cH%Y)S!Pg=x+`BUxWVGpno>#uMPTdgZ|v0e>dpw4f=nB{@|d0 zIOs19`j3PD>>!4*I`?{_voGJm@bE`p<*@ z^q_w|=x-1D--G`6pnpE-uMhg~gZ})We?RE&5BmRu@c>|a02nU-#t(q;1Ympt7;gZ^ zAAs=)V0;1?uK>m`fbk4qd;=Ko0LDLn@ep8q1Q;&?#!rCp6kvP>7;gc_Ux4u#V0;D` zuK~tyfbkq)d;09@i1U~3>Ys1#?OH9G+=xU7;gi{-+=KrV0;c3uLH*Kfbl$Fd=D7!1IGV= z@jzgF5Ew56#t(t1wv%q*QFn$Y+=K|xqz<4h({tJu;1LMQMcrh@342&lO z_%<-!4UB&SA?6pFy0P~ zzXRj(!1z2cUJs1l1LOI?_&zY+4~+i<;{n0=Krmhqj2{H!3BmY6Fy0W1KLq0u!T3Zl zUJ;C61mhXO_(m|^5sZHX;~~NLNHAU!jGqMKDZ%(kFy0c3zXank!T3xtUK5Pp1miiu z_)ak16O8`^<3YjrP%vH;j2{K#Nx}G1Fy0i5KLz7a!T3}#UKNaA1>;%4_*O996^wrc z<6*)0STJ4|jGqPLX~FnfFy0pKk6Ghy!FXJljMn&EFkTlOU9IuEU_37v-wVe3g7Lp# zJTMp^48{wC@xx#|F&JMA#v6n2$6!1%7@rKrD}(XNU_3Jz-weh(gYnN`JTw>|4aQ4@ z@zY>DH5gwF##@8&*I+z07@rNsYlHFIU_3V%-wnolgYn;BJUAF14#tav@#A1TIT&9K z#+!rj=U_ZK7@rQttAp|DU_3h*-wwvRgYoZRJUkd555~)b@$+CjJs4jP#@mDO_h39e z7@rTu>x1$8U_3t<-w($7gYo|$9sr0B0OAFJ_yHiE0EjOD;thcK10Ws&h))3G6@d5! zAf5q;Zvf&QfcOU>9s-Du0OBQp_z57M0*J2w;w^yq3m_f?h|d7xHGudHAf5w=?*QUG zfcOs}9t4OF0pdk~_z@tU1c)yI;!S|~6CfT1h))6HRe<;vAf5$?Zvo<6fcO_69tMby z0pewV_!%Ic28gc#;%$KV8$!=*#p3|+IY7J)5WfS&^8oQZK)eqS{{zGW0r5dVybusS z1jG{o@kKzq5fFa_#3KRmNkF_35WfV(GXe2UK)e$W{{+NC0r62lyc7^W1;kSU@l`;) z6%c;~#A5;RSwOrN5WfY)a{=*PK)e?a{{_T@0r6o#yciHa2E>yQdJHSR42U-a;?ID1 zG$1|=h*tyR*MN97AifQVcLUQ;R4++Fa0`ZbS{3H-h3B*?d@s>dRB@mAZ#AgEWnn3&}5YGw3cLMRAK>Q~V z4+_MG0`a0i{3sAl3dENJ@uoohDG-ke#HRxBszCfI5YGz4w*v95K>RBZ4-3S{0`amy z{45Yp3&hs~@wPzxEf9|j#ODI>xRNd4-CWy1M$K@{4fwt48#`$ z@y0;>F%XXo#3uvs%0T=w5YG(6Hv{p`K>RZh4-Lde1M$*8{4@|x4a8Ri@zy~6H4u*t z#AgHX+Ccm^5YG+7cLVX>K>Rll4-UkK1M%WO{5TL#4#bxO@#aAMIS`Ky#HR!C>OlND z5YG<8w*&F+K>Rxp4-dr01M%`e{5%j(55(64@%BLcJrIu%#ODL?`at|X5YG?9_XF|% zK>R-t4-mu$1n~kv{6G*-5X2V*@diQsK@g7+#3uyt3PJor5YG_AHw5txLHt7y4-v#i z1o09<{6r8>5yV#n@fJb+MG%h>#AgKY8bSO<5YG|BcLebsLHtJ$4-&+O1o0w4{74W_ z62zAT@g_n1Nf3_`#HR%DDna~85YH0Cw*>JnLHtV)4->@41o1LK{7eu}6U5g9@isyH zO%RV0#ODO@IzjwS5YJPL|E>6*Al@g4{|VxOg7}~yUMPqk3gU@^_@W@*D2P7_;*o;* zq##}?h+hignS%JHAl@m6e+uHEg7~N)UMh&63gW4P_^Ke@Du}-d;<1AGtRP-1h~En0 zxq|qvAl@s8{|e&4g7~l?UMz?oi>8mQc(NeAEQmJ?;?IJ3v>-k$h*t~Z*MfMqAigb# zcMIa*f_S(fJ}!ut3*zU3c)B3IE{L}a;_rfZydXX=h}R3^_kwu7Aigh%_Y30xf_T6n zJ}`(E4B`iac)}pQFo-t{;tzv(#2`K~h*u2a7lU}lAilBCvs&?vLHuJ74;jQq2JwgSWe|@U#AgQannC<#5YHLJcNY5hBn|Hw#D50yph0|S5HA|Uj|TCi zL40WtZyLm(2Jxstd}jdut9um5HB0V&j#_dL40ixZyUtl z2JyH-d~Oi08^rGh@w`ENZxHVr#Qz5Iz(IU)5HB3W4+rtYL40u#ZydxQ2l2>3d~y)4 z9Kkjm@#jH2dJvx;#H$DK>p?twVYjg2+k<%b zApSjwhY#Z8gLwHMem;n&58~^Cc>BVhXvNknaNIzX16#Kz|1=`B*@H7Lcz6p(s`klzl2w^;e^K>jk0F4-n)B1o;9%{y>mV z5absG`36D$L6DCSyg8ZQ%pD4&LD&8C38s8|$KML}Zg8ZZ)Un$66 z3i6o>J-(IS6y!Sv`A1+j~(P^2l?7T{&tYh z9prZh`QAbPcaRSrD=j~?Ww2l?tj{(6wl9^|(N`R>tU zgN^L<#~u8+%0~V~$dhR{a?+o7aB!533?Vl~i2Pr7u-w;1{#3}xf9PbNzwaQXLnkj5 z(z8M*7YliFk4|>Ka|hLL>E!W3ev+?~pA&LzhECoqvcL?owgWkGR3dWCnC39Z2X^#t&M%8L8r6svF(u}cH7!GK4T+*(;Z*kv%-Wi4E$?VB%h`VX`pzi3ff z|Aba;ud&*yr&dwKth;se*ZyqdINMr>p^Nx~t-+9Mt=JGE3fkEip0#lldHY;ZL}!1W zC}Fa97OMsJ4~xzD_J4{kdG;ek*(v1T2eWi9&zt8#UIRm)~E>+bBM{r5>n?Hp`-d+Hog#UTvy90!WLQ-I;D zqfs2nxu;g>oZ~K@%_mwF=UIipIY>L33p^Wp=U}adi_AJWKc(%x#Q!=vYwd2h%yV^h zepjpN3bUThBelX;tp~O3?JHVEYYc~9v_jV$4+-ID7$%Ci*u;rnn=DW3O%OHep4EQD zVq+^#)pfGY=1I@-qDZjV}fMe6FRTQxle4ji56RJVstuh zt#P$>_Sq};-s!3HeM>uoxKQzHCz4L*r=7L`bg^bL+%e_fo4eQy6&nl-9j(`D6QEs2 zfYvVpwBBI-5r6Zt33K;x(YtqZpK9+V4(n+z?q{gZ#U)j26g}Htr*}_wNpTtLBkJOI zM{#(Ajf;!eZf7I5+lPxn-Q7fkv$UO7+R;PQqOCaj+*8)s?QVslNTTTXE|E5}tMv$W zeO<@;c-eT{46)xd%vGz_)lR2()Q&OM$5xz`o5*UX!mNAzzp@@LuC@^u6XT=()AOa( zHac79*N2HCcy;a&?P+5(*1F%Pmu{?2l$}oJ%Syy~+KRG%eZ+Rrp!ZZQws!gVIT~F> z>)BZgigpyOWli~3sr4pXU4DSJy>m$xD>k}`niwOJL3hh$;x=t<(%l`J$oOZ6wx-o0 z{vm$IcR4e-?3<#os1r zLOZZ_ev`KSvsbM6i)5pltclJ7lmAsfI}Kai>(1@Oz%8FzY z85uPqeMM%}=*)$gOVgKSW<(8tVDi|>X(J|2jGD4EePQ;TMN1cqTE1}hvaCf5vvsqR zXJllqn2{m=5|NdW84({D9~m1lIDS^vvKg7P=VvX>&YY3HbV0=2*|Q_!ldP)?7cI<; z$V{J=H6v@`?D@+xGG{DEpZ!GE!p#3GmFb2jM@`MnT$&v6`Qk{~QB%fEO-o;zu{>+xqO|#0v(jQ?qGMuX(qf|KthDYM^>Ear^o;bS zX_I3|-=8*d`TXq6jIC^-hucoZ#Ml^viLG+=SJ!W1cwa>AEr-_)O$qgrv~ezg9pUuUB>CB zMe5xm^^ZmBdk6Q{KNYDJ2oAQj6Sq4pOjvR1{53(a1ZzHoM? zcCospqQvk;nRABeMvtEwJUlo)GAS}HI5s*aJ|-q6DL8y-=KM@?8~O!L7l)3@Trev$ zBO@~-B0eoCVwUJ%v!4iFnzUOn_Wr4pM&8>q@3~=j`$EiM(HSxpE!R#lOVo1rzTe#!7c2JtSGU$J z9xlrL=TJi@jh_0z$njIyg*q$w&!uXo+}U!I{%JbvW&QWHb@tEyfA6EH|2j+Y@cp|p z|L26q4;?>t{3zYzwBe&hP0@+B(yXW0e0PPl{j;-jGPNi6Zu48uQ@alBIRAbG?mp}P z+&!K3#%fn#ZCUGGx3=Ry58ULb!-tQYJehYHe4Y=ptujXX_%xyDn1O82Mk_QtVr#6%Xytkq`OVbyK zLgEfarY~EzG;7xKWun^u^QD_8sR+Q21yOT(r%Q8P3U9iXmilmj%l6JhiBQkBwbay$ZiKp+b zYrmcKO%v-W}|7igpN6x+1=#GL4#`o0wFo&OQ5x^_{YR<3jD-1nK- zaBqFn{&@Ti1mBxdsoz_wX1f1ULtkYS1Z=F`l3bB zmLJ5t^pJH-0E=l9_~*Xze} z+WFoRNpz#dLRgodM12XJ86mafYKwMF_jEVi0CyXmzH_J8*SV_6dzwr4gpZBxOR=%5 z*sisWc7EFZ(a!DO`T|5h)t-gUrL(@ye5bs3yFvHEozCr=)cQbtc;WdylB) z4LYqY{<9c#+9XqZHtsH+t$8=67jLD1O+rOpdtX_Xr?ocdd~4m^q}Mt8kMa(>u)Di- zI%|1{&YV^1tv%>JoAf#{Prhf-Tc4!=Y|vYugnRQ^PyWxMx8AjT^FG$|(c1s+^6#tH z|Bu$t>wG&4TBTmsMHeO3w0rQZNZz9ThFbUB{jt{jU*9b;oC;m03(dG^tkU@f8}|P& zMEu_llXSWv;xNvlBh8@H?vt(P#7}EdykxZ2w-rs`s!4I`TA$UVc9ojc`k$@0&Uz1Q zg+@YqmuuT&C^co9mLEwuj`Cs3$0%o0Y7dQ8ekElAbyEgwNSobn;cS(+63qB)dLYEpEfe9G0D6#rk({08Q?GXDYdpEJLY zd4+ik^EJ#L)ucGyO-f(!I?(D5)}-i1Rz0)GCun)mpN4V2XkP3843yUXCF&8UYTX`8 z8A>^TQhQdk<0Vl_lp`p|P-?m=t=vPDnUqfb^6 zIptnTm9m(!in5OKEae5t>y*}hDC)KLJ0ZoV(s~^6X|PIf$`Hyvl#!INlu48lrL~`m z`o=P^X?(TwxAt4@INI@rX05aRMb^5%^Zx8&d2uUsw*Eq|$o)}+69xz0v&0OJi5WCF zAv!KTI5^t6{qAo}boAiCqGWt*EdTJhvuWi0qwcD_w4-V7z;Nq(@NQ11+O$R&Q-XM_ z2p8Xl0NsoGqWACpS!WvjK*IgDONKA8dA#ItL;A#euNJX&(Ukf`A)ihQsTaAlsSP$E zk@u~Be0aJpc*wr!!o{P9^oy(S-tu%mXR-fj)5wP4kiP%k9}@bnylqIYf8~Sw4QQC~ z)6+|P{A;VIYf;Yz$B=-3ZGAe#?_YV(5buBG4Iv)?%HQER>W)}1_y6=~h)%sF>(omk zofN57B(q3gi?my$Eh4=t(rS@b$Tn)0NHay6DAEX#5=81RQjlz`dWmEw(r>A@>UELY zQuXRlkxE7SR;15U4XVaMyHTVUM9N9EQx}SqF4ELgdv%ORMvZtxD zIjY}FPU?A)nnkLToK=XlPjXRrinLjBRo97RlHAm6k>*J5>NJrakUZ2OBE?IdYG0AM zNnWbENVbx<`m@nTy&_Vp(O0b(smSQ39x(c=pNO>8*hPKa7@$5Y(kf%1I?vcuO%rL7 zv70*5*j-IB_D~0k6l@GqeT+R-2V<~$J0(~ki}zB`ri7?XDZSP5lu)%$q&+EN>IW%( z)VEUlsxPL5tNAJY)Ws?N)r^z@>cb-4moiXIO^HxrQzF%{lqfYYC0cb&iBWYavFfel zIQ3$3ym~TukXn;GST!dnsQZ%>)!oTS>XzhW_0{AQb#<~)U6CxQS;?|GGkJ(QF?pyu zB6*makUU%+kUT;SN*<|tCy!R`lEW;zIS6#6{}r#3kzT#HDIh;xctc z;&OFj;!1UR;wm*EF-Ps6n5zaQ=Br+b1*%=*)9UXDcE)~M|X&#A`}o>$8f)~bgR zUR1wGcv*cvVZHih!Yk_9gxA!(gbnJVgg4aL32&+oCu~y3C2Uqx6W&o{65dtA65dk- z61J(X3Gb_S2JcXB4c@6<8oWzAIe52PJNOgTJoq#9>%m{By9e)4-yOVHeQoep>YBk{ zt1Ab8qdqzKTlKNQht&rME9%I>P?H9$>cGJkHF$8b>NB`hbr@W(-X2t`-W*h|b_}Xj zn+DaZ6@!kdg@YQ^F9#i0KOA&I-8AT=`tqPwwP4U0b?KmXb zqQ(!priKr?p>`Yeo$4{@2US1lmikNlFY49!-_+Cbx7CLDKh=`>ztw~BI`e1odh_;p zJM$ay4(1o)oy@uMuI7dD?&ewXp603XKIXCUer74Yi#a+z&>R}y-5d}fWOj)UHs6Ws zZN3#3X1*8~Zax{;-&`9v&}@#2GJhQxWBxcU-u!OdVDoEniRNeHQp_vkB=fwuA?CEW zVdhD3Bh91YMw^r4#+f7H?l<>}n_%{fd(i9{H^uyC>_g`7V;?o2kDYFAj(yBr6`O88 z5S@0$0n~FuKM3Wpu0g!{|2i=I9Rd%h4Cirs&J&?C5LexzRVx)1!Yd zkB|PzJS_TG^Wf;)=Kj%tnS-KjEZ)%ui(RyX<@YFO%Z(^E%h@PTOH-7Or6Q_}r7)_i z<;$oZmJg$XEt{iyTh>MOwLBfw-?A(!!ZJ51+A=*V-ZCL7!7@B5*^&^IY8enU)Y3C* zgvBRnw8cK^KFjUM@s^vB4_Z1Rr&^9jK4PhioM92c9+rKPvn;zJ=UCp3%(ASHTwr-7 zaMZRirihRTJXT)2U?<3x^ zoR8RQIT7)`r8;7#MUB{P*&p$lWp~6L%exU@Sze3y#`0{$AV_?Kn-K%1hC1MP~|4sTJ%8w%A%qD>xu^TKUUPQe{)e#|JEY!{_REf{m&QO?sui=X1^On z=lcCn)ZFivqN;wki;ndByJ&wueev#o4#n^Gb18nUpJ(y2{d|j`>K9nNpkI&T^nM}5 zQ~UKP9@npbacaM);@Ez1#eMoE7I*7sEcWO(v{>J7Wbv=z5vDJiT~tcxLg=@F$Dk313+JN_ckh>hM*?E5q}O=Y>C0oEH9E@s#kFipPY%T5Jq| zqc|pfb8%Ss*5bhM_lw=bcNN=)e_H%Y-!F@=_1$0G*7w`uV|`Iv-q%uG*te{BZ{OOlmlFYEGl1IbpOU8#al?)3zRgw_aUNSK3LP>Dg)e^t3?@OG*elGbt^mfUuP+jSz zP`lFBQ0LP6P|wnmP`}bcp;+t_V#jeKK@NXqAzO-aVo0}aW6xN zZ`oHNUCVZd1ea|M2`k$WGN9~*keIUEkc6_uAyQdp$gr|$A!EuWgp4m65i+GLDP&q% zL`Yg$NJwT`mymg7t|3dxY(iF+{n9JH>{_oiW$nFQENklZYFTBkH_OoLowBcbZ7kt{wUM;vMK*9*rEJJuv>XYuupk&aA0|LaL;mca9H_)-~r{I2FI3f4^Aw9 zGdQ*UrQi|err>eq%YrACX9Yi8{#fwL@+rZy%f|+1m8S+TE{_XdQ63(gSKcFdb-8!& zi{%c%ua^JW^Ud-fdTuGd)boS#)}Fh|8+v|GUfT2P^20q3mw(yQT)wksdHI%}wdJq% zY%G7S=c)3Xo@dJ!^}Jl3+4E-kw4OhePw4qa`G}r26-hlEE24V3SA_QTs|f7bt-`%$ zuL^z7@QUAqA}ekN4XQX7lu~gbXjnyU(3py%pa~TRgQiw|9yFt3N6_qw%|Tfe>w^|o ztO;6Cu_`FPVnNWFidjJ~RXh^(dc^}ln<|C{y;qSK^kGFr(5Dq4LHjBKf(}-=1s$od z4Jxhptw(jmjULA;I(nR}IMJiMqNc~CilQDjD-QPfx#II4e^l(~VOzPmhg0P%Jv=Md z^zg4-)uTt{!XBZOvwIAve6&Yw<@g?nl_Pq{l}SBDRYvxBpfa?_l*+&!($|^PS<-z&<>BscSAN-jTjj3qyDGPI|Ge_`?)xjB z?|!&4ue+skY4?iCx!vn4XLfI{oYehH<(TdlDy8n%E91J~s_fVOc4bg^n=0S#j#W^RN23TTs>2ZedmJ-3C@Qb&IR2>Xuw(?l!dQK({efpLLs1^+C6Xsy20dtZIF? z%&Ilr=2xximR+^5TTWF*w`Zyz?e=2Tgl?}@jqJ9mDy7?dRngscR`u!jc~$pr`>VXV z9j-vFoL(%C0x7j&%LG>g%q5RejpkQ2l;am+DPj zeX7@W?OMIMYp?26UHerp>>6F2(KWGpT35MxLf28%BfE~TPU$+eI;QK)>b_kws(W;u zSMAd^yV|j9PW9h`tE+zse6jj!;Oo`xft#z32X3#f4*aOv61b=OVBmr3F9K2hVPHx1 zJApOTuLd?&KNr|qof~+rdP(55>bZfps%Hk?uAUrdTQfG$sYVX;su>g*STi6nxTaTN zcukkU=o+`cgc^OIT=RRtsG9Er#@Ad7c&Mf|U}nwHfXtfmfCV)OSYER~Ag|_=fM;vA z2dt}kE8vZqbpe7oEnr8@s(?>x76t69$qYDDGd;jk^I$+_&FFxmHBvxJOZtzDPq+CTliI|1ovT{U5BG@Be7sEdTVnNBy(vCipL@ z8|nX4ozZ`FU9A60b^ZJ|)b;d#r_SGhN1dzxr*(S&uj+pHJ6!j@Uvb?%3%|eXKJ>G%-{R+9zroMHeyv~6dXrz@`sIGn_4EA_>u387 zsejaOZ2d&P2kS@sJz6jM&8m<0d$PX2Uv_;jzufu&zcuyle(UP({5IDA>ASW5mhaB` zE52XUxBDKbZ}vS>U*lU=U+i07f7tg#{XXCJ`rW=)>bLp+SpSyq?fUh;`i3>WE)6-p zz70!!yEi=H8`hBK8__V;cW}e~zNrnveMdJW`%Y|#@qMHr+&8@;$TzFO&v$8qt8Z?D z-giyIZJ%`wKlr@aaM@>TLz~a8h9;jq4b?v1G!*%$4TpRx8ut1$H0<^{*|5#$T*F&F z*BaLQ{M7KQ&tDC>KK4hK`nVs>^67H)ai8F$5Bu~xI^HMd=t!UBqeh?MN8^0%Kic1C z>d{_4Gmi%N%sJ}ev*@V3&#I$;c|UXXC-0YzUi02?w8MML(H8Fyk2ZLJeze^Cz|kY# zM~)uwE>by^Y6`y+yKUY zdh6IZuWiRpdhI^e;I;Qyh1a2Ds#npmZ@j9H?eS_lw#%#S*jBI0$KLe%;n+H_+sD>; z=^JysTpO2q`88&F1vRF7g*QIp71KD;E4gvB*YL(vulpMZdrfVO@Jee8^LnDOyVsIN zU$2}-7q2yqdaw13w>{r#{Lyn;;}y@{jqRTM8c%p0Zmjn#ZY=YxX*}ZD+<3sVz3~gr zD~&rnZ#8c9{IhYRr(M%JPxq!Zo&im{p1qo~J^MF3=^5WN%TsE4)N^#xgPs$c#(F;5 zG{kduQ=;emrfARQO?^F0O+7u=Hu-yQXma=5(q!-XVbk9pUo`#f@lDeW4|CH6kIJT2 zkH)4(kJC-n9v7R6J-%-`?D2ckS04J~pL)0+-{IkZ{2h;;$2WNNJN}YK?D5qe#^X_Z+5q9u57q6c67HrVdL(4;&(Uy6F;~G zpSa@I|HN6hxDzdI(ut#Pqfb=2J$S<6HvPmQx6Bj!+!meq)NR#?9d4^nY;jw6;tjXA zPONj=e&SiTPfp~y?LV>H4JQ`3m7mCTJ9=WKTkDC3+%BFN@Aln^QEtDVklpkx32tsJ z(QaK@!rgkc1iKAr33MCO;^ii{IJu2&v2~l=a@%!g%PrTrE!SL^w48IzZE1CVuBFlS z)s`C9cUnqZKWu^P7cB=|54P-awX}TXTHUhU^?1u>*Y=jzU9Yyh==xL3YS+J8a$Frx zX1n^Foafr(WQJ?slQUgoPEK`AIXT{S#CEzTvwm$ z>bmZvkL#wBF0SvNG`N0x@-LUKPyXz3I~ z?{epqhl^9Iql<5=jZ0ALZRdWix18fzuRBYv7o5kmo^hVk+Uz{DwcdGdYlZXDR*Q39 z>tW~TTlYJ^-uk)omeyU)yIQw7f7$xB^WoMF&LyocJJ+{9>wK~`-}yr83g_=y7dhW< zeZtvrI^Egh^mOOI(^H&7Pe0%sd3uy{(rMXw#OXxm@uy>*A3Z(5dG_g0=Y^+xIIlYG z@4V);r}HbPot!tHwsqcd`VXhiPyg(6@bpcmqSKe0YEHL1oj85cspIr9ryHlMoqjuA z>STN7h?CoygH8cw_Bn-|`P3=m%!f{iXWnxfc4m{)17}`$dgRPYPP5LeaawRD-)YsE z6;5l;EOuIdCd+B_nb}S|&dhN7{LECRgJ&i<6`dL5RC{Ka(}^=FPUp@Ha=LjY(&_gz z;ZFLtUQX_9-JAm3{G3AD+?}G@9G#NdY@9~4{oy#F?I*`+Z8se=+b%mUYCG$g({{@7 zxwb~f*V<|wx3rZz?rbwVe%W@|@o?MMj-_p1I5xEHc5H3?!0}Ss7RMjj-gNx4?NvvI z_7@$!+gCgGXwP#DZ(rdU*S^>>wLQymZ2N4-DeW^IA8UWuF{^!|k|G{n;V# z>`jNzvzHyB&UQE?pKWy*dG@%&#IyAd)6Z5q%sE@^u;eTp^3EP~c;W0mhYe>xbJ%)z zm&5L}+a10-`;G(7zUfeT_Em?bvoAWdpIzf{?QFioFK1Ue*mNv$aP64q(4`~OA*3VC zA);fNLsG{ShY=m)9VT>)ahTRI%ptQwa#-Av;E>x9T6w(mHXXMgkDO8ei>EwMM8pKtGZevW;&^Xc||&QG_GJ^zrsbbg}!nDh79 zPdPu*KJEMv`zOz**snN0$o`r0(e~@k_qX4CKFof{`C$7m&Udvxbl%Ut%g<)t>m>PsgLuUtBA zc>7X=Vdtf4!`@3}hQdo0L-{2bj$QiJ&~|CR;o7Ay4ZmFa)L?sgm%;t=`-Z^FTMc2C zHydIuzhN+5e$_DM@=Jy(m!C7FU4F(e?{c1D<>gg|)t9pkuUuYec<1tyhMku)4SO%A z8B9jHZ)$IY-qnc-f;c$IK!`(M;i23h8jGs7!BR7BpUi$i8I7ri87>K>2DZ! zrH^6il@LSvl^%u#R{{-BUGX(Md&Sf6+7%bWyH^|xyRYaC`>*`1KXT=^zUs;^`sOP? z=+9lbp}%?MivISM^LqQM?RxL4t@@y=&H8>Tcn?KZJz$IYjgEaUYo67el1P^%(dzI_17NO zzkO}8e&@9b`n}ig(<|3T>npAe*Ee00^=Gf8=x#q8|>yG-h*X{HhuiNOiU;oSYv+KXx9=!gu zZSnOVZR@Y!v~9h9)%NoBi?%;qKWD4E(Pry<ZfvzZ zf8(A1MbUluHF5uc0Kdy*WRVb(5XgWeWRks;`zVScARA>0$R4scNv!jWT4%L5Ypt_t z>!@1y-gVYlwH2*(iwG!7^mo6@FHuFblg%F{`?YFk8B&V)l0BV2*cX zVJ>&2VeWRNVxD#-V!FEGFhgB27{dGU7{>dt82@!z%dFhwtG#AC|*U zKP-j2J}iQVJ}iKVJ@a5j&s><_GYeMqd;?p0JTUq-FF2v68P4iygiCws;D(-Rct%ep zyr`!fUfojyZ|Nz5_x9w&CwlVWKYFIX_j)qnXFcg~ch4mFb59EF)td-2d*fkYZ!E0p zjfQQ#y^U~ zdZqC5UNPL;8w!8z6~MlIJeb`V1dIAOu%?d%JNuaMggyqG+DC(@_EF%zsm!YAL7a`)O^AO|HSxE5dG^G4=60&|e4n=-C1|@zv0!{gJ2rB#Z zJJj@PKQ!ypZ_tuYd!V(Sc0t=d{R-{>v=ch@X*+c7(>CbAr!CNnPn)6MPaC1HpEf|G z{`C;M{|89izZTN=uZEERl~8nl2Q;~V1(e_a9aPo74081^f!g~QK`Z(fLL2%QK)?3S zgAVt%Ll^qzLbv+oK%M=wptt=qpuzrcApC#_@*8kNyn!}IKF|u82b!TV15HrEKm(LD zP!E+3)ItpdHPFm~DrnI_CA4Os0@^xI4(%H#g-#BXKvxHfp}z(Sq2~hyP|v_r=<7fp zqQPuPJD3GI2Q#4P!E|WSU>cM^I0>p6Ood#7DNy@hGPGha5!x`A0R1`` z4;>zigDwolLbnEEpw7W)=^7DMimUpq3U57VNw zQdA?F!JCO%j9P=*hT4xhg}R1%fO>)IMg9Nv|LM*DPhv?>=$(Q9Dh8E?Dn!+wJZQFJ zKB@z?5w#n26m zqqd;2v)@oB(fHC8)L$4s=s#2s8aMlbM$LS&42XsGheRk1mI*o024FO55|#z!W7$v@ z%7x`X?btwQ1!@D93;l`>f{tK=p$n+nSRT}g1uQP6AEAg+XOFDb$3ML9=jjXbDaMtwsHeQ$qW3D(EyW9J+>6Ll1Ep=mky-_2JOF zfY+lY8PEYj7IcP?4P7TpfgTZZp_ha_=p$h&1QQD&3b7Ch zBo;$q#1cqPEQLl9%b{3e1(Z&#gbImOP%W_r@(^pG1;l!&gV+FVA~r$0iOtY4Vk>ls z*aqDtx}m2;5A>e+4Kz%g0TI1sLH=HIAc5ChNafWIS-s{#a_w|=hXrI?6nd);I$e$?X?!V?)3xo&}%*P(rW|M=Y{@Ly*EQ-?=29= zdmAM2-VW)!cS6AXS187N7nJ6`2P*LX4XXCu54pX6hvs=7g1+}Y0{!HD4BF*=96I8C z61w1h8oKR$7V7jq554og2n~8)h6p}aAiB>ri05+yQuzD{nSE|UV}0&I2|o9sET0EZ zsm~**!RH@nrcWod$mc1v+UFUx)#nBDo6jrgq|Y1ZiqAXfzR!E;Kc5fK2cKSO#OD*_ z<2wKa_zpp#zMmnr?-$7K3&ByoSUANO59j(4;c33!aEmVqp5se_m-*7*AAA|`4qqnx zyDtkq_y)m`e0lIoUjh8lHx!0RVwg;l!hs|?EFmdj9Z8KgP_=Lj$pB9#ncxDF z1+FI9VHe2>&m)b3SCAs$4Wvl;SJHU+Few^7Pl|cUUq(t})DFq%NO@eXcbeKlY zgoDUaU>P|NHj?w<(c~gHj$8s~kjvpBawS|#u7;)-|CM!19A3~wU0!Mn*G_$c`s z_#$~0e1|+2enOrHzauYz2g!?I0%a*or!0qgl<#2$Wfg3utcAx=*2D3XpWrOYCb)#M z6|SeC^AzP5_*=?ucopS0cr)byyoYiSK1MkLU#1*~?@~^|Pbp{NF3JV833(YNQm?`c z>J6Ary#*_%cVP?lFL*5V5u8AM3};cF!X?!I;0EeTcn0+iypY-jucCf{H&grIz0`jA zICTiVOdWymQen(fDh|^{C1QrDJ{Tg6jA77d7(R`GQP5ZzGc6D^mKKajpb0Qpv`|b5 zEeumnL+4YP3iB;ZgIPs0U^dgtm_0Nb<`@mZT%wJ}+@X!dJfV%pyracnhS2&o!7mX* z_e;g_{L(OTzbuT&F9#FhHx(1-SA@y%E5#K1O~cgrRb!_6)nOL+HDNmZS}_~_JeXa6 zGcZT|=3p-PwPSAieT#YQw;1!r?>kJt-}e|CeKm$gUxx{zZ@@_Dn=uCZHq0pcPE0I) z7bcDV8>WE%JEod`7~`TJ$F$Q=VV2X+VSc1v!tA79!5pODz?`Mu#@wLa$2_7x#Jr?G z#`MwAa|Gi#hQxS{VKcfgB1R8J!}y4CFa|MEj1f!<1IFeu@Yo857q*!}!p>&UuuB;J z*tHBcb{iuIyN@Bjo@9h#uQ0-}_ZbT8Glm-5&Cp|q8D=ce-;QPY11#Tv3|8Sk9&7fG z!H)5d$Hx07V>A6HV~hPWv334A*y;ZH*aiN@*zf(zu|N4&VSn|n!yfi;!k+hU!~W?% z9s7^}EbMFl|6xD*e~X2gOR!|-ax90r5-Vn|#cG*9Vx7#**a^&^u_?@7u(`}V*b3%; zY%}vPb~f`kb_w$|b`A49b}RET_BZBr>>tc~*n7-J*r&`+Y!~wxc8K{3O9*&} zr3ZY#1_yk?$^wS4#(*!_(E(UoYyc6L7T}932%zDr1N?EW01obd0l~QM0zz=>10=W| z0dm}d05$G(fF5@(z=C@a;K2PCFdFwEAQCqc5RLO@#o_!}$v6RPGET|L!kJllxG}6k zTs*4`m&vNc6|w4YwX9~GhvmY}W6i*=V9mj8V9m$vWG%)WWPOJ_%UX%M&RU0i$l8E= z!P_a#q`#4U;K8>@mFW|1)-Z;L-@>XA`pXI1bWa+0x#%) z1X<8Rf+1)b0R*ii#00G)ObXga$P3y=s0jL%&>XanFe~T~VNuWt!m6Nigv~*h3A=-C z5RL@hA)F6-Ncc183E}Uc=Y*F*Zwb9YJ%q18{RE%j5dt$9OB4iq6BWS}qAA#)7!e#u zoER)1rUi?M=v!f8Ww4gm5^N^U33d{f1V<3p1V<6K1jiBg1g8*>24@g21m_TM1s4+k z2`(qT3a%mc1ve4D2D^zqyjeshZyr&=TTE2&RuE0R)x-$ikHm?*EyOh5PGUZ9FR_w$ zkl4aIPMpmp=yjFv^19ET>Gdyvo>v!tvDYAfg%?h+#)~TW$%`Y{<|PvR z>ZKO!_p%9&ctr|Mc_j!gdSwc(c@+w7dsPb_dbJ6jc+C~O^ja$D@>(P4^V%X9_Sz$W zy^jjKye|kS-ZuqI??(cz_X~m0yGJ1P9ub6l6NN@^y3p<&ER67$3ZuMr!gz0|Fx5Ls znB|=;%=gX~mU@>6tG(-ljoxmd+q+#j%lkXweD5EGOTD)VJG_4r{@{IFxXJsXaEJFT z;a=~5ga^G}3Qu_V3eS6g5nl233c2OY2zlVm3+eQhhP?3Bhje*6Lq2*(g$#QqhhTiN zL%e-TLTEm^6*&~qVw4rV)5A<0(_2!jPtn=GSTPHkQARsA(=ie zLh^h*gp~Mv4yp1Xgf{y4g}QyXp|gD?p$mL8q04;ip{sl%L)ZHxgl_T42>r#UFm#_! zRp=3)*3i>FvqLZWEDF8hvnuqS&&JSye0~l6&*xz1Tc0zby*^h%hkWjZ!oE*Ky?oz> zQhobF1AJi-&(~KZ_6-mzeFY-DuR>(=HHt?20#TH2v?$&;MKsBGifD>&si@GmPE_IR z7S;K-i&}k`iDvk&70vVADq7;ZN7UhaMD&C2Inid{8=_x)ABgt(J`)}BeJ?ugJ1DyB zixuDWC5!L-vc;XgA>tRlN^zI3N&L}ww0OifMvNn+ihW5rVg{*H97w7c3rQZajMOgH zkd}!pq_tu|+9DoD+9Qr59TBIJ&WW>0*Tn^-zr^LFf5mmAcj8vkfOsYeBbi4cNtTiV zBrDN6{*NTNWGl%a*+oJm2S`zp`(Hcu)oM>!k&zfB4udIuVP2FkVKj=DluhxI3MgEulp>aD zC~B#NVv&xbL`cU|Vx{qvNz%!bTxkxaR9Z}_lU7mO(k9AW>2%5x>HjFJrHd(>q#cxB zr0XfaOSe)^Nq12$OMj=_mY$&eBfUU*A-zudAiYN!mOiH7WG^Tb*?S6G)=v@2zETu2 zBGo9PQ4txN8YL4@6J=6rrc6UElv${ivQgA#Srm1KERniEmQGzR%cK4vE2VCg)lm1y zTBt{4GpT1~^QqTl%c%EctEo?98>z2lJE(oK->4(9BUGaNER`m|LJgGPriRKNQI+!l zs3!S4Dv*DqPLO}0Cdmo3EIEZ%C=Z}j%K5Zrc^GYmTtizRx6qc$N72^FC(yRa6KT8U z>9j-gskAflGTIe+9qq2XjrLeRi}q6fEv-ksoHi_9N5d&L)5wZnX)MJ7nm}=aCR1FX z=@mC<4#j<1q@t4+r+7t6Q}odC6hpK!1=g=l;p^vC`1{RO1o3{(_cJI@`Z<-C{KhG7`o$|B_@ycT^~+Pf@hemI`PC^${9H-`eU6esU!-KwJCp+Y zk4hQ+XQh_DS81akQI4UXRmRe^4Wpt)$ z4V|ajL=RK_LRYH}&@HMH^wFw|^k~&hda~*-dY0-by-@XrUa9J%H>yVH(^UjUyNb$K zs$w%%tAvb=Dmi0^O3&D*axjjmA{pmZag6J#$&7odTt=s=l<`Vc%ji+HF@{vL8QAcJ z3{v>_3}*OxMsWBxh9rCsLmhsYVGcjT7!`hnF(Ld8BQg9jBP0AJBR~8Dqda_wQ6G-= zcZZYw=Y%u;7lrfuJHn;@>%+DF+rn-ByTix$9}184KOLUxe>ptI|5kX3|HJSa|7YQ? z{%^x)`F{*w=syzvy+1*{-k+l0=Fd{^^%tm*_)FDi{Wa>V{#Nxp|IzAB|7i6q|0H#< zf2R7gf4&;etWZ;!^=dZLtrjxpsO8LsY6J6owUhaSdOUNhI)S-MozDDSozFa}u3%nN zH!yFgr!)Ujw=OoOJI z>Cg-^BQ@B7i5gNsswN;HTf+}1(#QfTHM)RCjU&LLi46FkCO%-XCOx1-Gc{nnrXpag zrXgULW_rLuO?$ve&9Z=tnl%A8G@AqNYjy>6Y7Pdx)SM3J*8CALsJRmWYaa)AYhMQV zX?p@V+Rp((EuJOQQdwFphh^1DmdbJZ&-m~}W2HA&o zSk5UOnR7|U;@r>)Irnu6PN&Yud7%TG_qqw3eqA!>i!Pf(&=+&a`Wg;X-^K~n&*6yl zi#baDYK~sNiDTFQ%8Ae)E|YH0i%^JbJIdxq3$6 zLVa-H3Vm4MTD>-Kquw64LmwHqS05jESf3GiN?#CoQC}H&L*E>DPd_v8vHsh@=lYJo zclr&1AN4x|KkN4gVhtw(eGQib>4w{Z9K%0>0>jHdsi8MeZ5RnO8HilO;Kz+L1aV^x z5^l0V!_734E|#LB^Yly80>306HGT<4d$5c z2MbJ3gC(YS!79^0u)&1k*-T{KXcLWB-{(mMB|BXq_?=e~V1E#V3ucmlD-kiZFnG5-Ja}}R$ZsqgMbNFKO z628*BhOaYk=3C6W`M`XHA89_%k1^lmCz&7d)66gUQ_LUuh33!vax+m-W2Ot5%)tVW zSt^)q)(hsF5y2Ak1VM*6MX=61MX=FaD)`x4FW7CKE;wMGFF0ymAvkURQE<_`LvYP} zKyb%=O7PHpMexLYPw>M0RPfIHPS9%}5Dc2J!mnnE5O3iKeJvs(-J%wTX)7E;J!3oB%WB_w2xMHRBaVh!1185^?G5+AbHk`Z#yQW$dFQXO)} z(iU>b^1qPlmSrJ#EbBrZTDFCBT7C<8ZaE(E)^a(d$8sm6-_jW}VtEsSwSEfmw!)zl zD>>BP$_@>*hKBO3;h|!yEmUER4Aoc@LQU4pP`kA_bhNcLbiCCa8f$G2O|mWzO|z~K z&9-h2&A09kEwP>ot+ZYVt+U<>ZLvNL^;o+?XIlqD=UH*0#a5bVxs@wgZIy`DTXmw% zR;OsYHA=MGnj+e7%@G~3mWfVU8%5`=Gemz_zZKoEt`yz1ZWKMV{wnIU9u_^fo)f*X z-Vk+LABjF$Ux=uB-voglWeg~lkBiHOLp64OZM9qOAg!CNKV+c zNY2{!N-o)sNv_#0Np9J0OYYk`C4bxAN}k&KCC_cxus1eJShp=O?4wN_He}O=eYH8m zaQ3J$Z+l7@#hw#Jx0i>p>`h@o_L*Tq`=T(3eN~v;zBx>7-xFrA9}TnGFNPuZTVWCQ z$6@2`Z^B~jpTZLC7-_1VBF(UKq&ar6G~ce3me?KAY4#{-jXg!$XwQ+h*~_KV?M>3z z_L~E!e?fudNcC74(ohmzF z=gQ97C9;clo$RU|k=?XM%kJ7!We@CmvVZK;WdGV*WH0QqWpC|EWZm|)vXAy{vO)Vk z*@*pw4CDAiMsVDd`8fWSQ5{_}hGR&^auDP}4!Rs|>B&V7nOx>D%2kfha;;;c+~i1? z+Z=^*#8EAeaJb~-9PRQL$8veR<41Y2W2bzw<9B(c4;T6bEGL>Itr9;9o5QihfCS#Xjcw6mMe!HKPtaEb}F&XgG!?FtkTzcLrHNy zQqr9-l>yE^WuOyM1v^P9p_8o=J4Gs~Q=?Kk9V(48N@Z}SsLak>mEBpP0?uYtgmboP zoO6k4f^)5EqH~)n(Ya5R;ykHJb6!zpI`6A;oX=GG&Tdta^RueV=^Z}J$qcV?3d8H2 zs_a7(UaP9X{7t8a~h25WdhkBYcT-Vfc5>RpA}ZE#a%3d&7Tl9uME( zyd1vCc{hBU^J(}FXIJ6Rg@bt{l9x|PUY-D>27 zZXNQ6Zas2O_Y?9=w;AcyZACuowj*Bpod{FE3lZw~AS(Sn#HK%hjME=NlJrNA9Q|>m zTz?X2(w{+Q>(3!e^cRt}`pd}A`YXtO{dMG&{w8uwe;awAzl%KA-$#1&50S6>zY$+U zC&D&7MMQ>Yh{o^&aT;DB6AW*VRKq)Ds-YXHH1r^ChCbwfhJNHb!yxjbVHnwI7(vh; zBRFTkfSU#!_}hT)Ha2*HPX-@=HIf0rjMOp&0>G#)gWCV*L{7_h`N5v(=EgKefnu-}vfPMK1`HPa;Uz?24F zm@+`GDHD7(Wdo8q2e8d~Ky020wB`bUn2SKPxdco$mx6qAIjAyE11@tVXg61b73Ny7 z!CVJ^H8+66<|c5#+zf7+TS2F}4ZJnG!Jv6M`V#LO;Afc$c$Qf}ZkYqjmbqYzr5z+# z=7B8B0#IuC7BpBEfti-YV3B1hSYufRwpx~heU=sAq@@E~wX6hxSyqAPmNlTqvKD-` z`~ZBd>jB&PBM@1C0$S@v;IwW6(bg?sl65P{w{8Pf*6qM$-2vLIJHZO;FJOap7x>k> z8yvRo0T--$!7b}P&}rQd-dYcULF?}TZ#xL+wnKntI|3B8qrhxC2FBWsg9O_NkZn5& zN^Pe=qwNfsX*&xR+s=VCw)0?{?E=_my9iF%E`h7I%iw|S5AfV}1@zjk0?2+1knGn1 z$9@Bd?KgqW{wF}6Fd)W$8%(y}0R^aP`(5C+-vjgP_rdq}zrauS2Vj@|AvkJ(1TLcP z*#8Dk?Eio+`(rR8 z>m0AZcE@XQ0CmRk2HbGG1&>g#9PhwK6vo*FD9-nQiwbjg0|RQ5^8=WO%5e68B2=BT z7feTe>+Az7QJb9~!CusH=O^$7>YlS7JVSM(Mw|n{8yNrr$RG$ssZkDO2t=V$QF+KP zs6@4*{)c=9%TYg~enA~VM!zz@Yk$-!4(MvX-!pt4b=s74gp z*B^!U_D7-p{ZVL-e-zs1ABFb%N1^@xQE1P96x#P6h4%hO{r``Q;-Dlb9SWdgP-&<_ zR1M05nm_6*=s;~m?M59%T|(VOJstH0yhjbAyheWk{wU$-5fF~Dp~j<K{D-un_}*7SRuaP%@M;;uDBK#YKDsnW&P8 zK2VRE5zz}4qE<)rfGw!sB0hkVs4EfO;4jpF5${0{>Ptiy@E!9Guu!5gZ-EBo9PzV}z=bjYg4?LhF;Bs}F;BqYm`*?# z+X?7n9|Qi_e}H1_-@r2V5g3a~9QzPV8T$Z~jr|KWjlB| z|F{D{Fm69kjoSyTz4AhQa3OwT%g9YOkfsXOtf=%NWfZgNgfn(#_!KLwY!QJt5z|--w!29tt!SMKR z05NJh@Q-o>K~x)1MYRHJR5KVC)dZ5F8bD4|9Vm~g1mq}Vnc#jj1N;~52R=ko!ALY2_{8{tfEX_j8bbi;7#y(2U_cbQFFqw^1j&sVMyACK zA}ulf$efryWLZoP@}Q1kYgVr zfwA`yN$g!j7ke84u{V*J*z3sT*eggu>}8}n_9EhnJ%`MTJ%g->J&A0HJ&ybudjvTg zdk8rndjPo=yAOFBy9ap_y9*hJ-HG5PZbxVnw<19kHzTr%KOx46>ygnD*CBBeS0fn{ zS0Y6dS0J?$mm$+9ERR}Mx0#U@3A?CPZWK3KE5+9d`WW`NEO5(DR`nYuDn>ciyic3aT#U&t{ z<0c||;-ZmbaZ$+SxJcw~TmTjsNQGivR2! zjvsUq6FxZ^3B68!Lbp?q@Xl#Yc;y_M@Z6b@@UJr~q0?EC@VB!*;Vfl;u7bA#D&g|#Cgt*iF2L15@$M(Bu;l;NNjW7 zN^EvMPONvnNvv`9Cr)$XlFFR4q#|cfQod7~l;bocWjaSCr8#4hQk-c?iOzzgiO%Yz z2~JniIA?oOgmZZkaQ>KNckWCwI}auqoM)3X&KpTe=c6R4^JS9Q*_R}ALdobkB012> zP7ZL2lIc!OGR5gg_H{-j6P+o^SZ8kXS4Tziu%kJ7z%e_y&#@%A+p#wJtz%pAOUJ(C zXO5G}osKKXe>?6c|K)g=e8i`yKHq zdmNc5zc`9hesyj&2*%sPIly`COaxp;~mYZF^<`( z;~Yy;BOGf|5y#e4o8z}sljB6H*6~NG%5g7M=6ISaa&)B%97Cx=4#FgsgFcDj2%bcB z$R_zXjFSkC(UUNa*hwSyv`K^Zf=M6k)swpIu1Rn0|C{u}{@tX1?dvD~W8X39f&IXw zyY|zQZrZO+x@vzg>7xC=NoVaJCY`X4Ogduso_xUWKY6cRF!>j|a`Ml1^W;tTF_YKZ z<0r4NXHNd!UNm``y>{|KyJvE{ect5R_7#(-+c!*Zv+tbTXg@f)#(sA4H2d|*CH9At z^X)Gt=h%BDXV||?PPO}_CD@s1v36nFc)Kbs!fr`J>|@ic_V_e|Ju^*hFHV!&Yttll zPnys^FD=NvB8_F=kVd!fOrzKjrg_`Xq~Yw>)4tjsrVZJir+u{bq;=ay(%#s-)1TY? z)1TS|>3`dl>Gy5s^jo$u>DO#=>6dI7>1S<)=_hP8>4$Bu^!>K>^xd}a(s$U_r*E-s zPv2lWkiOP-D!s#YHGP@we)>Y&v-Eb``}CQ%;dHl+kkM?TXVlq(Gb(Mej8dB+qrf&Q zBgYn#k#3uukz$*g5pS!^h_o(Y7^1W80gdupQ43+b(4YY_~JG zw$6+I+nWrUtv|!phRGz@$eEChlR0b^Wqz`1GP|wz%s19?na{0BnVr_`%!k&J%)8e5 z%p2C}nSWU4XP&cupLx={A@hiJXXbwE!OY#(Gnw11*D^O-A7rk#{+GGh+MT)F`Z;s4 zm6$cpO3#{Y`vMQ}HStZsmL=I|ENillTef5$wCu^=YdM;| z({dqui{)1K2FpL$Yb>v_S6KS87hAq&&$IYUnPp*4aa#mank`o5I?ShYmYA>R%s1c9nQi_z$7AlwX)+Jy z)R=L(hyyGTa-a(TyZ;vS|Z-*&4Z<8rIZ=IRRD+2zRb}E$m6)Vc1t$Ge zj>$QdZi<@fYf7GqH)T)#Vl0{3Z>*i#ZFEn4ZETuoMe8jjY-)vl!uQ6`Sml=P}4>2Ch=NixC`x~$3 zla2TC3C5@SUkz{b2MqoB9}IB8YlCmWQ$s+(LxZ5;wn0&F)nF_*ZvX`+4ABJ#4JieC z3{wiW8%hg)GSn5UF}Mqs8`=vN8kQBzHLNX|ZrEDTWY|+sZ8%a;YB*Og)o`OA)9|1m z+3>6&*6_X{(lA(n7_fyV1G!LbU>8aaA%y~ivXEmi719l(3w;eSg;+ys;b(nL;YWRG z;X8eO;d8yG@UgzV@Sc8I;SK%T!i)MXg{Sm;3J>d#6zJSK(UyzlAIG z?+O>{2MXuvF-0Cdsi;XGP*kNC6qV@ZMY(!IQMw)}O4LUcMeCD_BJ^2Bc70KiUSCtB z)VCFh^mB@W^^1#``c*|_{l+4K{+FUJy5EcXb*GBn>;5Qup}SMmse4>>U-zo$hOW2h zl5V8vl#W<@Sm#%~R~J~kT_-Bus0%M%qq7u$r;8|Fpo=Y@t(#Qr(&ZM{>&l9!>FSFM zb)MpEU3+n=ZfS9xZcXtx-R5FMx2xEsJ5(I5J5wB{yIRcG-7RM6I*X~g*TqC#U-4J% zm*N4fS4p?lujHkcThgf&m)zH?OKxZ_B^R|3B`3A9C5N<=O7>`TOMcdtmTb`0m8{ab zOO|Tqmdw*GDVd>NUDBf6R8ph;rKD8*dr6-5R7tw_a!I20cF6?oKP98JFG{T14<%ad zaEVNdD-~)fr5r80)K7~BVYG@;SZgdD)F7qZnyAv3n#9shO=jtRO=0N`O=amtO>^l< z&5Y86ngyl1G|Nl3YJMnPui0AKq1jWqSaYQGf10zU9?iAVM$Ns_O3jnfBF*d4Y)xNj zs%E5gqJ~%&siBoQG=XIXO=y`?qbw6?Ol4dRC}U_Ql=*6s$}pO&vLSV0S&zE1?6tbN z?1_3t*?E&E-)yKI;GP}x@XnX(_$SIWLu-z{6Heq1(3{j$uh z?kTHR50_P_apn1Ha(SkjRi304lt-&&<)hX5a;w@=u2DypOVx4Z0(DwBOPyCvQJ0ky z)OF<};qLN};d9I1hA%FE7QV9lVfcpfTj4v(FNg0dKOKIo{80G$^4;Or%eRH!FJB-2 zw7etyP5GkmzVbQYBjxUJLPdQzwW2(nU6CIytjGvgR3wHQDkg+GD@KKnt1yShSE$3& zDkR}~6~W<%nWVWuIbEDKe|biu@{^qM~Y8USHKC zcUQfXJWUs!cl{(aRI`43fRa(){RUeTpuHGZ-sNO1DU;Tq@YxQ#3uIdG{gVi(8 zg@Mhoi`A8~8`Xuf`_-AU&gw+j%jzgucQqm#tTxKv8imZeMkw>EVaqr*6q&FFCzI6- zOSLs0q}G}j($O{lNGH_XmL}F*mZsO7lIGR?E-kJ3MOss{N!n7gS~{aD}7nxC+)8Bk`B~- z3Hw^p7e=go9Y(F~3}e;a4dd5d4GXJ16Bb^3D9lv5D-5aK95$|YO;}v*(y-Lp_OR?) zPgr4Xeb}_xvatHv+%Q+|q_Ekwv0)2pBf`F`wS=vy4G-H`D+=3Q8yL2?)-UXEEivp= z?TF-3ZLj1;?JLRs+Q*X4+B=dLwSP$7*PfE}*ZwZ~Qu~X9P`6P+u3IHx)-9F<*UgcL z>e?jAx*CbTu1I39%aTOYB}t;|q9loRh$OwvAjz$hOG@ellB&7@NmCt3;;F+(=GF~} z7uLNKuc-T1yteKy@y5FA;vIG8#Cz+Gh!5B85ud8tBEDF+R(zvwnfP8^yZCXPNBq35 zUi_}ERQ$0nNBp@iRgA5V5&PDU7SroZVotqMET|6=OY7NUbv;>Zs>h0v`aw}-{d-Yt z{WDQ={R2^E{SDF7`g5Yv`Xi$1`aPni`mLhr^=n0Q>z9cZ*0+n6*Ske)>gz;5)t8F4 z*H01csZS9dtdAC*s0X6+^+wUvdWGnAy+HJ^K0x%e-dFUx9u|G5?++cQe;fL>{%I(o z;a(`Y;cBRV!4XZ-U4U0mNhS{N!4XvTE4OOAZ4TYf@4H=<% z4GE#e4UwUh4ffE622H4|K@vKvfg3u%!7p@a10i%}!{?Co4Ie@_H@pbh+3+ajw}wAM z4mVr~In{79N?vU<=+K~Q+l8`SA*&+DG&9NpL}jB0!-jBETynA&(tnALbuIJNP( zu(a_vVO8TcVPoSDLU-eL!dZ>&!ugGE;gZHWVMk+$a9v}za8qNla7Sa5a8ILCc(73? zJl-f3o@)#i{?SMm{@F+r-ftWcJZ|g}{MYzG@TT#Rpr`SsV4(4W;A`Vi0lsOEfYh`_ zKyO+jU^gul@SEle#7%7iWmC04*HkF5G-V1vQ-UC}DN+#AWD_JcsRe0GB6OVQ2nw61 zg7PMupr&b%-_+E__cZ;>pWSqyKfmcJe@WA6en->q{B=z``5T*l;{V*#!Qb8VE&o8% z4F1ukM*iuha{k4pT>iDDRQ{c&X#T?{z<<(Y;J;{+@!vJ^_`OXG{$P_A|7+6-58vFw z^KE{?qc=a|v72x5c+KZ|qUIw!dGl_brg<~Z)V!MKXkN^VXr9fBYHs1hHCOUdn)7)X z&1t;c=83$b<_KPSvx!&Jtl%{@3wZ8kCT~`=4{u)c*Wks?eZec5Uj?se{wH`t^R3`5 z%@=}qHXjY%+q@_EVDpyX13Fs0>dkbg^WP+-f;Ab!i=LE@G_gA^_2gETEif=n&D zgX}GvgGRTk3L4+CC@8jNR!~w)b5L4KMNoE2UQm9^q@a?Pn4roQ5LDM<2x@7O1$kO{ zL9<)vLGxOOL5o{HbCq0s~q*1G%lY0|l*@0>!Pz0~M`%12wH%1C6a~0&T5J0zvESz{u8?!06V>!1&gw zfhnz%1Jhe$0&`kN1s1d#0!v$Eft9Vnfpx9)z~)v$pu2ULGqd$Qr@i$VXJPAo&a&34 zoQ~F0oVBe7I2&5GbGEdu=j>?xjsHh=R9xq=DcYgVRyIous^mwXAiYLWPfeF&c?N!VSBe7WK-I9vgvIb z*sQh{?4Y)JY+;*+EorM|%iD_C>b6X_p)HJTEIwKYyieJ zI)LCZ2KcyS0aRCT0K-KOV7UkZL9QXDz}3YRxt=m*u6skp>Zb%JSf{l>JpwlWdd z8fJuR33HrlHZ#W6%#3$cFq2)m%*n14W~OTbGuP#07Pz#`5|@}+;o>l>U1Vmx3ud;s zKKZ*{ul;AZ{_&sV`qO`&>%9L$*J1yqu3!CExPJ0q<@(-#ooj*r2G?}|&8|BCpIycN zzqm5}_qgKy_q)&(qs#1n%%$)@<>LFFb20ocxrqK(UBirL zu9J*su6>M`u5FCBuCYEBf8RkgRXI(r5oG_>1Ov%y50RF9k`d%Bi!xuac&oV zg1eeN(Op1Kbf?i%+_CgD_b7U%+d$88OX>OUAbOFTMlW;Y=+oT&el_kle)aChe$DP% zer@gxe$(AY{ARj$`OS52^qc4I@LT9!;J3s*-S0bhonME$*l)Ev!|w-ooZkj_gx@B& z$#0um?zh9u^V{X7`|WiT{Pw$tXouYIXh+>oXeZovXs6wmXy@I>XqVi3Xjj~uX*b-f zXt&(o((byyq5b8qr~U0Np>?{mX#ctsXwThaX|LR7+B>&`*6rrgdfg1#CpVEc=pLqi zc6U*~x}Q?9p1V|n=Q7pXbDT=@?4?pYo2hiqDk{^nkjnPVpmIG8RGz1VD)eMgMVo*1*O8nqf~k5lv)pg(%=~+ zH+kNXTRl(6ZqFU^H=c{+nVzHMIiB6*cF!jAd`|~?p=SYkiDx=_nWvV#!c#B%6k z_Qa9bc}A1hdyM3tJTmfTPY`*lheqD+!I5`*21vU+Z%BJQk4gJHw@3#(=Shb=he<~~ zzmkr7HjqwwR*=qk=8?{MT%?PhYSLv-0qKfoGU>V}hIG>dNVh#Y(p`^)bl>xTti1(v z8#&nb>o674ri>|tnK^BkIcb<3W;=5B^Jp}ZMjDS}PiED;I_CU&4NRVSP0TT|7G{@N8?#=llUXeGiOCl0 zVZIdWW8M`TWd0^L%se4B%G@J1&P)@VWX6h3GXurGGTp>Tz)Fl4=!@|KWidgpNlX|l z6B7lZV)MaQ(S=}0bP;G5l>pVEOF_QqasWkFf~TTuz-`fW;DV?mI3l_c>=fM$l0~IJ zq^Jz=6_o={q6)xFR0(K{ssMRWHLy-p11uKRLJyeL0h1znpijgAG>I62a*?edOT+}c z5itc1Ma;qPB9`Ech&9+RVhb1|_8>vT5rm3315XhbU@PJVj72K@e;a|YC&`vNQv1zrf=27e0P0qDQyfa8L9!EV8OfF^h!L<>Fy0fLW! zi{N8mA@~I73O++W^?nW{1z&(Af-ixP;43gK@E7P8cmrAl-hv8&cOXaLJ$Nhd0X!0b z;JN??&I+)>0RawR3UEQ9KqepyWC2fsY+xslgMQ+W3)BVjfRsQ!SS3&Z<_i=8l0Xp{ z?w+w~#LI zj)22RJ9tL{6)A#u4EP{9@O}m+NSeIkKo)5Yk~r@K;6obcnFQTP4M-(CQ-Fi?3h6G- zG`NCv0%NKQy*NZLqp-@k!%NQ;mJkS4x;1HIqAf<~lLq)ep0zI_4rk**@0Li+XFG)PB^ zLkjvf1>BLWkPN;}0%fF4NXx!W01>3GU&p~9QX5j$*Uumi>HXI+@C51R*HLf|>Co2^ z0FWqOhd~&U_tzm{kF@pcAkaXP{yG3wBQ5ya4|u=!fw3=r;M130P>)pnr3bLTbb}X2 ze}4G{E`R9)$B}k_=>)Vd9UvMh;7dDj`O*f=zqA5fB!w?6K=Mm7koeLBgpj7D8$ti{ zN6IK{nFc={oRmx)%ICT?5WcSA+f2Re&*F2@<9&Kq%7o>2hE@T?UM%OM%*S z3D`1S3|3ATfqBzty-XK?k*R#pF_i~ur*c8TR1UzVvca>dEO2Kk6I`6)f}>L$uycwH zQl>BvIR$~=)Cb@+^&Xf_y#v})Z-M;O8?bKbFR*y(6%d$u2_`3BfZoaHplR|MD4To& zvL+vc*OQOHgUN^B+T?w3dh#CFH+dJ(C;tTTlXpPKceLMo#jE4cE@lc>T9t^gO2Z0si z0bt&^ANc;+2aJ672A!WhLG5P`Q25ymV4q#U^Uu!U&Syt(>9ajJ_SqKf`fLqSKU;#R z&*s4Yvng=?Yy!+bZw0!ajex>u10eZX4@i900Yaa(z|@!q=pR!9En_O6VoV9-j46P( zV{+ipm<+fvCI!xpZ3YL&HUj3DBuE-t2g1hI0I#u?zHGvh`F znZcudO!v_qruFD2rr~HOQ)RS`xp}mOxni`5DK^@`{613092u!*c8pXqYe&kNg(D?Q zY@~?!d?cUw$4D;o(nvP**a(-odxXtQ9f8c~k@w7ikvB}2k-wN0BQKbGBhQ$MBafLI zMjkSkj@)AkkNnB}GJKmkIDC`YHvBuYYWNB>Z}>9v!|(;>li_pBTf?WB7luzTj|?AU z?ifDIOddYKj2zy_^c~*AbQ<2tG#mbfsWZ%A$`7YA*AJ&MC5DrkLc>YSsiAmg|4{m?2F%4nx=eu~E#~B)I%3qFii#pnOcKfrd83Kc! z8IuDejJ|2IR4}4(A54>fpANY$QG4PxrIPioq)&G#u-+!0U(tn3h*?)tP+kcJm zzW+DIll}{gTm5Gl=lf4G4)-5p?C3wtNbcXyi0t3X@ax~naP9{T^ZpEmZaJ|9MYpC<$MxiOygIWz9`*)uNnSu>9HSul3@ znJ{R5#*COgeMVrPHp8t?gJIRD!Z7GlV5s!TFgEvXVXWxez?j#EK1cMeVvP1KV|4W{ zX4LmCU=;U?F*v8E-p==*v{>Ga+~dO~k6J+!xr?%CT$x9e@9 zZ|!ZMYxLI8WqK>v>Fn+;g9P zv*!=``JS8f!#&sNJ9;kDlY7q7qk2x${dJFr{yM5>{ySLNtb-U89c01Bfb=%VSbz9Ks-6r&e zZX-Im8+~Ejtwp!*R;6$2R-|io%hF}LH`CX3OVSs2qno_Dm(!;{NznU0Eu^=85~Wvt z5~SyS;-!E1^flwzr^$>vpT;sSeHzR-_Ng~x_ovQ`v`?)Wv7bI>1bwQ_aQ{@9Ve_dZ z!{}2%hT5m>45?3?jMbk$WGwvjCWG(Oi;VHECmFq6_cNNh{>Uirx{;C7btU6n*Tsy- zU1u_GcAdz$&~-TDNY}oMon5;#QoBG#bXP`3KvznJTUTO+Rab0=L03eEYF9|cmac$| zm0jK$3%cAhc)Of3K6lz>^mJNgG3e(?pg|F<8}Jcj_2vSJ07LeI_{>&cHBx2 z>bREf(Qzr=rsHh7amR^t^^U{oG9CNU*L3VmU(~@!7wDj+PqkCh``hEvTiYYktJ*`; z^VEGH&=_75^X`OAK)9Tv>(~8@A(ztCMX|LOw(jK(c zrCo2UOgq+ZDvR%TjDYg$@WD+Uaw%ntcwcMiVwp^nrwp^rbY&lI^-g1;SuVp`tr)3xIb2Ee1)0|3cYEGn8 zG)L2No5N`Dn*(W2o4sjwn%!uZn;mE;nyqNRHk;7s%?7l@W-VG+vkJ|pS&rt^yqRX+ zypE>Vyn?3OyqLDRS&X)_S%9{n`Fko~^JMBo(@1JxQ(tOJQ)g;bQ*&y5Q(Y?7RFV3k zsWA0!Q+DdrCRXa{rnjjFnqH)WrbnsNraw|6o35w&H(gG3YdV{1-E=I~sOdnedeiPy znI>lH+NRXh#Z8H+LQT=BUmD4&Lyi9E-&T62);GGOmNeR?W;U9qzG*a0eblIvdb3e2 z^aoTxse2mNr=~ZqNR4k?oJww-m+IXpkm}g@J;khXB1N}xI7PX!CuMVEd&p!4N@sB4U#F<4J%U$8WyLp8^lsxH3+2KZ}^scyuWY!Iys+V1GJnJI zK{BC#Xy6ho~a;-PG@OE!45P zI%;=aIkl;-fLc+PNzJSKK*j1_QD4+OrrxXjllptz@6@w(7paHqPEmK&9j4Oi_EO{O z05!BOmFiWOKy|E(q?*?SQ}ye7s48`?RH-^U>Y6%p>Y_R$s!*L4^=qv%b);5?+Ept_ z{aCw_T3)-Dnp-PI{ZPwCeO~*8a<_Jja;>(Ha<;aEa;UbEva_~|LaQyN#MNd~LTfRK zckOG6W9<`)dF@?_e(iONYV9S8bnR)%+SsvbhSD*=}a{_=}@&_(#~r4BwDpYQhc>V61mza$){Q? z$+=o7$+B8H$*_8Tl6v*>B)RH^Ns`q^Oq{6dN*t(aN^GyHPOPgc zPAsX)PRy=?iSMiaN_r!6_t|-d6k0+tjey0SCvf(4=bw^ZdMj2T&&DaI8g}`_Eo-00F@6Dk}Gc~#8h5M z2(CPv;8l4v!Ljn!1oKK}f~^vdtVsg_@flPNzNx32t1+|u$r zar4R}xT&(}xS_I;xUMqqxW+Q)xQa6CxcsuMaqKefxYuRMagWQS;_j5Kjk{8| zH115~5@F z+4a~BWfx*slpT*2l-k5*mu`#wP^uIA zqEtEdeyMcqjnZ|o7fYAMo+zCcd!Uprc1P({46Sr1Ccd;QCaknE#;>$8#=W#4#;%kT zV_NzqMz8cqjB4p0F|wssVWK`Sr~J=L@?%1$=B#zC8N<9B|XteB`wjB zCDqYEB}LJmC7IDqCGVmwOP)m=mE4WiD!CS|SaL3UOUcpbH6?qamy|G~#Y!mAd?iuQ zQ^i5i!^NJ_pNbu#n~Ke&tBVbyi;LBxvx;S-KNL$wzbIZF{h)Y$^vz=a=*z{^QKyQB zqYf2!MeQnXjLImkjG`3hM@1F0qk@b7it;Lc6y;oeJIcEFa@5x1Q&Bp_2cuMqcSK1S z)1uZF$3-nGCPytO_KgxOc8U5{WF0kDWE|C3q!ra(q!3kKv?;2*XjN2xk$4oRNGR$} z(bveQMWc~-i@GDP7d1y-D5{D)QB)XtpokN>v*=A^TG8Xk#G>1gkww2n1{Ix(^eQ?S z>0GoU(yE9SxwR-RQm2RO<+s1u=6s2rhExFtfSaCL-a z;i8BYg~Acyh2O%33rE9w3cJH63!1`*3M#`t6%>Rw7qG)?3jPW&EqEB7TW~X+Rd6x< zb;0rQCk6Y$?-nq_uNP3mFBU|FpDYLrKUClmzPrFKoL*oOo?M_49$TOkPA=FS?pLrX z+@oMoxI=+ZxJAL&Fyn%eFztd*VJZcUVKN03VUh)TVJi!;utfzg!$b=1hw&C%51YzA zA2yPIG^{6oPgrYyMp%7*Vpw^8SXe>6Zx}blAH2YkgN0N zlS}gW$hmowp{%@t&^LK)q0jPaL+|Gmhu+NNhW?iKCiHCHiBCwF%U zD>pslO>TV1vs`k>{ao*mTe(glS8~lm&gbffoXAxPIhZRIvO9Nm2qSk z;E3Fz;Go>jV4vLjV7J`TVEf#xV2j+h!N$2yf^~9l2dm{?4wlb75xhBfU+~&oM)0!S zq+s#fh+vUizhK^6*Wl?KtKhL5!{GiL_2AANnc$|Jb-}ec62WCT!om4D--0r8MuI-% zbOpW2`55#hr!44hPIl0ZocBS$U;rQ}e85^^Gf zB6IwLLULS#d~>XV+;a?r9COryta4<6Omfx+>E|pC(##PGQp))nD3dcBxFM%AaCJ_7 z;L@CuzyfxContP zDG*#!Y9 z*{pzs?3V$N+4llMvVRZo%RU>hJ^N6AQ}&Jko9vVTv+U>qqwK%{oox32wQQRJ`E28W zE!i3Y>$7D8R%WjYkjRz@n4c{iAe8;ppC^0Re>$tve=Muszdx(Qzbh-#za{I9e|^>? z|H`bJ{>51r{ByI8`g5{&`@hdh^M92U=l>)t#Q$EFr~j=id;hChCjJ+)wERzJ$@?G8 zlJwu7wbXxCmZ(1?>$_iS)~H`%)+fK{tdD-=tTMlVtSmq8that{S&#i3vTpfVWnJ_$ z$vWm|n6<}GJ1fmkH7m|fJ}bm;OO~gfWR|_(sw@+~C0Sa23$o<>&_CMpZ*yj;Z(U}lZ$;)C-{QDanMw6g$&B!k%k=Zv zlIh|jnQ7s(DpTKQX{L&gc;;pw(ae=T0-5M{a6dAh*f8n_KSP&du>| z;=cE;<391O;NJEw=3ey9;~w+QvoT<*xNU!CmZqm@DYLk2~$Pi#y=ObaCV>?zLe@D$_Lc?xoiJbAcm&o7);p5vT*p2M7Lp8cHDo}W1TJ=-`;&qhv?XDuh( zvy$WES;BGj%;%VSW^r^pSsX>r_nZx$e{q(2KI4dbKH_}aewQ=6{T8Ql`!!D8_RE~2 z?dLe0?I$^}wjbr(+kSv^ZTlY1>Fql>`?u3M%dH^jORJ)ng@x?y-cE;33Wl^$_EDdI)jsJoq@Q9-rB3J%-qeJ^I*! z9-r7#?rrRT_a=6Wdp*0#y^5XZUdI05Uc`Rtp3A=Np2@!G&SD>Pf6w0S{+dm5f6k6^ zf6NYazt47a|ATGqev@tJewD52eu=%s{TzFx`ziK(_hW1x_e1Q@Zojg--FC4*x&d~n zTLwGREtUP+jlzE57SI0OEt-ACEu4MOErbo+0@xHcA9lFgcD9e3E8Ee{k!|W`%hq}gkZ_ModWyUkUeUF|B(&Uf9!hOUzAXRd45cU)JnFS#yZ zA9EFF?{=NXrnw5UV_XH;fv!AkH`lK$E7wVuf$JDc#dVmq*|ndw!nK<<&$WX^az)SW zbZKODxzw@hU8-5dF6AtaOEK$}OFrwKOAhO*3zv1u1!L`VdC#J|yk;f1ykv#CJY{*h zJY?Cq++%HZxx>rrIJ$BM&-E`7mop(}U9dc4+{o;h4 zuj(Ytig4P*@^zAAIXSImnK`XuX*(@v$va7~);o!_B%J26gq%cK(~d%{en);*iz5%K z((x;n>o|qIcO1u_IF4dB9fz>|&Gy;z0)E)3l#hrP9DVvp=Iup9O??5uqXcF>-J0s90j$vzGXvyaBS?ISP;`!H;q zeF&y$AB4%;`(tbDeK2u*FO1*b1DmjO!+PwTu|_*btjx|1%e1q>UfWq>5A4jbYj!5s zX}hi1emg^qZl{kW*y&)Qc3RkWI}Oa%P8Bn@Q^wTn6fh|}Ic$}k3^w0x3&vx&2^+JO z#JX(PVfD6auwvVl7~6I^_R@AKcGp${`^{DyJ7K#3+haQqOS2WhVr_-6KwAOK&6W>C z_c3Dnw%?$#?H9Pob_y=Doq(dYpW#=V5jbQs1lw%}V6{yj%(v-*(B>0-YSRgC+qA(8 zHZAaoO%vQ{^ART7)Wb-dTIg$24V`Q%p_xrN)V3*w@;1eAolPNJY?BWKZF1qHbvEp? z&V)_Y99VA6f?3uOzOjA}A6mbIzgxe7XRQB%`>kI>hV^rpVEq(^T0e%K)(@er^#f>Z zeGjTx{|Tk6@4%JTx8Qv1n~=x)IvlmS2D_}Tz&fknV3E}&$g;WsUs#=ke^{M`m#t32 z<5nl(ZmScJW_1ikTOEM`R)?XB)j?=swIAwQ?SqO|d!eM&9=OD67ZkGE0nvS~aKMrY zTPzu{(lP_)Sf;~wmNfXtG8NviOonGIsqmm>5@cE?!X(RhNVbfFUY0S?&N3QqwTy)7 zmJv|eG90e5B*O)kp^(Qi7>-#4!7htHSa0DEi!A&g+rk&Vu<(X|T6n?B7M}39g$LYi z;SOmQZZO)y6$V&1Ll+AtXkp<9buApAqJv2g^;@!YrgWrfc8> z)79{r=_+^{X`kszNH<*pv4mqQQJWzYu6&~zzOFBo~vP}Sgk&@C)t24Pk*rD8MT$^bA@2 z`~s12R6KSXS$ui;%Tg6ony(AbN}Ax=47{QZZg_S#o>h#Utxg!Pheud*raFEjv;i+a zzYA(0uQ2}^^ z$lyQ3(~U|AwICP&8J=4xFU*gRm54Y$U3e$Th|b4DOyS2U#JhVN{ZLldz~SD#gEpC_E3210H=Ytc5D%-84`17+(Ji!W0+v z#tXlk*$eNcC8#B9QC#dCDl8<1mwY9B1LcMJHzH#mk0*NNi4vX}PE;*P9L4a&^E(R6 zcO~&e3oGGUA@>5j%{(zP%@9Ps1$d)*VrOh=+%CiIxEXsj%A)_cj_gEX{75at50v7&N@L zt+U1={BX#i=;AE2@ptr;5p6^s9X-6U0_X(|&T@n$=6JJg_+9?xC-E%e*|I=FjBml} z1@3~2cwBhI1<|-~CW(m|At#!)%Se0+^u+YVtR>Jm5q@FR0Dc}ZG2|EEL4H9QRA|k7 zbPR~n0(fcRg{T%hBO>urS<(5k6`~?KqNsIJB)rHxCG7S1_`IZY+e|r5#h&)FA-Em7^gqs#~DNTamEpToOHsE zlS%k-o*?`B+oABezCHy$62|vzS!jH3QHZP15UmJLT ze@;5cKu>JJVT8m_8sTxeg6BME133JD1n^wMYybz|;n^+l9Bnp$gZU$X=Z?$kc8 zF*igmSMVI(ZPZ+p`;pK?Uy#cchY=FqP}iA0$k25`*v+4TyZ`)xLWW3JDxGktzA8^AHwXV;lNzn=}@nCr9aOrHy9132dT z?D|umU6KDs(m^?1lFAjFMo4H`;P52eIQ?hcIPm$8m!4Y(sB|21(FiwACK7VvI6}B_ z;$1{;9Qe$~E16pX$c^{-8R5o>cNDpC;IketJvaN28}Ds7;l_z~61j2I6KE`jSIpA`>WN-=L&e#qf|2MGf7VY+QUCS&`oykQIw-2$rMU#WQej^d`NOEIgUzE4i2J_W6+)`%5FC90YOQj$&qpK0Wp!m z0cxr$s%okMs>)%hGck+p$}T~nK}i9wYL<2ZPRTJ8a%g~Ad_qDDISJq3e;p(e33WFh zDJ+Z{5E&Oq4MPG{DpV3Njx%4sIM4Fcd`l$xs7jkQZQ`R!q8Aa#cN^Ak;EO^J zMIlM@xft**--+8Evv#ZjZn(@EUNc76kCK~|lu^*;hrMtn?mufM&KM4}26@Kto;Cbt zjNn-#-9UI6_p+g$7e?6Wz%&7)8fB_ckFDw!Ndi42b;hf3m~Ml2oNB~2wYlysHUCDl|^HB?nqbtPqz$T4Iz zPh};2&_F4ZV}r?|q2y3SjR0N6V6*^3A|#W@DUlSk{3O*>b=0(V{3I1)!(!rtsETM& z8B*fIs9_1n6_Su_7=rdmrYXj1;6;!fmXM;MNJ&r(Rn~jx{``vVZ>Tjq>yLVJo1GGQGy$w zF_<9{K}r90oHbN*wSLSXlbIRxAG1?Sn)O%m)9l6|rJxm)+b-BjKwWJxP*S zq5m9 z%EIf$&oDEih-YSoY^G0mXeL7pF0lmvw^^gAqBc7th*|ujS+3R&mhN`j(6y4Ksi~f% z48DHd;^Si|lITrQ5*3p)CswPZQ&M~gS`_g~6xsg^3!F3$y*qzLiHF2XUodYz>6f40 z+3`1alLf+Cck^!D!{aNumAjR*bpdIcn4>7laA&fX|CzP<+xt`YzsvsQHJz=Mv`q^& zA_#vYC-Eqttbpn4$;Ms-JrzmFUW8Xva54W9o~1m?`Bw0(Hc-B`hB8U?v|F9E?t+v-_C!#KedEYzCpTZ8(`|#cYZH>A^22=4wRUASs2!$Kn?o zKUWl%6cmdJp$VcCM5QK01}9Tdwg0DSH7bZ-ouLoXGf9Ks9A+>4NTdzOftN$q5;N)F z+S?{=dqppfdm7@6Q*JGnXT%41VlIkmgbw`lAtkZH+(m6EA}c-=7r{Uf*1M z&2VEY5|QTW^F#JO%56iAtwbS&xpFBekC&TEW;@V+=Q@R)b20pb%FpdHxP(5?p+?~C z!`n62zMVg9gR-PcyGf*FbCvuQJM~i@FZW~*iS%`@Q9s3wq5RMLz4RN2YbQ+*3jY_5ITC_lFiUPmLU&kv2?T$+np^!noDz4cOl2m?OTG{ zH#dGuQEaY#lPHg-QNrBzn@^HR_@C(J624D7;eGmPx{-WPIgz;_ip^zl{xn>qOXpDE zkz*C|oV$ z2_K8U6F+GMGTMGP=0M1)cb1y<@R5Z66&L!uD9Z88tiZord?eAojhQ&U zQvObSGc)~X8=t9vC%&1Z^0O^5vwwViXVX7>$M>(^@{yLz6`Ua-Izn^jU;Ny+7>$qO zPbKhr&HrWl{>#SCKXVB$kCxAmgxgntShMrs<-hELf7yQ@i`nvD=HgrNIVtq_9GtPy z@%SI_o#+GUW-4iO=>LrT*Cp4?Mf87Nwf*;JtDmo?fBFQ7UlIOSC0hUG#Xq0@M`3jF z_a9#T!{vXtXRhMrE)Hg{1LlmGPnffFnistR;O7PWPssRrgcnWbL7eEMHHs50(g~bs z65!*^y9T|WdBD3Ctu>tM&^Zq0di=W!M9JCrY4ot@nQJ!Q#k1!LocPSciJuSAL!(Js zaH5k4{{D&kRS6mqG$rUn(4Al~!AOGmU#alzGYIY^xS!xzf|m&1CisNlJA%0cO9)mI z#LvTc{T&2n#s%3^ggrAJ$QH!=k2o_9h>Hn(1;OBG^W7h#-3K`b=C5or>{tvIMnoZbX+pgzbQH0~&OE+)+R9GcnG2 z1o3kTZsX@;ocL75xtX90K^1};1PusoC1^#^j-VSsPlAC2LkY$ZOdv=jNGG_P;68%K z2%aK1GcQp)uM+khg7*kMBlwCSB*-C{Pq3I^HNkpC3@M})Io=}1j1ZUPM@~05?%z8!k4#GZ2 z@F>AE1TPT0LGTX2hXkJzoLR@HK8&!l3FZ^5Bv?zZnP5A?0fHk0rwGohdsMG5zOE7H z5yZc$#_jb4r3m6*{o{TOf;t3^37QhLC+JKN|4f8$=Swh*U=+bbg2@B{!I>XXpzRJ2 z_7Q^T2woz1o#1VPj|n~}_?93fm`kvbUdLS_BOVZX;+-(4L?hK~I8#1Vaf%6O1RAN)Z1w3BLcG1osj=LhuB^ z^8_ywyh-p6f{zG3BlwmeB$!1ok6;#3251C+wmrvCh`Pw1NnoT ziWk)&Z@gQv4&pBX8;g+@;9kPBQOR~^plJ|Ea_bY7w+WV8Wz~z<)chhVisHWj^AgF8 z(*KNa-24xlcjJbC*pjmHC61%NB(4327u6NNzC?KAihp>2*|_u{w)n=y|FHQtF8qi6 zooFNJ!%TPo&tJBpqL4R!#2EdS2MT=bFdpD1K@s~}<5glLxbSU(@jD3;TqchhSFa<% z^%tHQM=6k?g2)|XssRZa&@LK}Igp@J=Mm%n5E6{=*l8S)L4td@$;OtaN$`$Fr19;? zBv^di*O*yMg5MT985a(bpvF#9<5Np{V8W1=ahX03d=@BYyg!r&@)WN%esPosdZ4Gs z_`c(T&mZs`)B1Se+I15~^CfxV(ZfAPE8ThFyssaPE*;{9r(#Nt&SvsLnR>2~C?6lp zw*AX!6#X8J`sSXI$1e2yH2JGW%2|AH?7~T-U*_|}T+v^RtUUPPgYD`bL>Xg3xKTvQgPNL3sP%Mk9|gLAdD4 zQX>~PA$T}O#EA1;2(E4TV)$UCFogDlh6{fYhP3yshFx94&|JC7P{&OKN?*-2{Emsh zb&K8`8mfsxg`JNLM{bBh=aCzRlB>kv;m~u2oa17!x#FNMTH_&}60X6m(894YX zf#&F^+O=Pnz|@!*1`Su2!tBOB47OV?gZi$Q4J-$j!J^D#1`jSShkNvP8yvD;0sSAO z8Z=L?fL#!D4Q9ine?Ob+U9-L9{jCJ*ag+UVa3Re<-Djr8}sD8hTURrOm; zlwke(E&7i&m7)H*75ZaxDlkucp8lhas_@YM?|MyZ)F6|0L~rj(b@+Qmhu-fiG~mQ& zjh^}{O}HbjKu>R-7BuXFdM`F>L&e}{dUq6cpiBL2J#k%Kc-P~iUY~^?)GaxphaM~i zzuNB96N)l`6Pd|+X21~rJ~LA9^BE&}{GG4f+Q-HaJ$X{^b-`9B{M=M8zjqs4sj98# zy1*0$-4&N?{*R7;_z?$R1x@+NfsJ+-jw|c%8tU6(>E9CDDUr8A1 z-hJc)8&0X{vIYF0`LfNr4u1YU4@=#|oF%r&u_*Ca?V-!?UzpZn}F$SK0c|k{s z6$|YRj_62f$3t6eht7!y3GjqPvQDB*65O00p~JpGfjln0I{P;zL)mIa9oCH$c-h}n zCr*Y2{o1v34n0VNQ898l>$Ec<=t?*RGIc4+IwOB!%XesvR~m--PhVtN&8_P`@VLH#6jrpa7}yc z#UZ${=9G53?-6Jcx=-6m;23;9kfFWy(Q(Mgh}RDFI|hT0=?7hs^isy3zVB9zP7tWCap8QN}Np`Go21#;TOv@fr}2G3BxYqhrg z4k6!&*2OzFpxMa|El$EMxM5SRmcRZT==HQfD@yoJ*lUVubyVGjHRaE=%Kx|zH-+8N zQfEGdIpY_#c-%64a>%>j zk!I1-O1Sm*bYp_l_m08V(oY)wPsZWVVYmLA1mtePF8E9m#T8=&PSJ5zzUWq9SY}Sx^zZ%`Ziq3zMXATUHOBVd^H-P9GQq@rT-3KbF~jDITBu)FvBVDlrK^7Mu{CxeQc=B8 z!wwT#wL$&zYX^)sZ;5)Qi8IEa3#)qmW9h4IsrAqzusy}+)$~?IV@rQMtTyr{ z7L!9yms}c@fU(D@YS)A*SnK@=wKGqWv3+5_YNP%%?D={pwKwxKu!tH{wchs(?D|P< zwLM9{U||mOYWrk%VUI=DtBo}6!S-+$t7Tr?hqdkyRO9nHh~=RtT;5)B1T*~7r~0h+ z7^e5SSylGRNsL9SP!$Y2gH>whsM;x?$5O}Ns!mQ_#BRKNq&h$6H_V@QL-oMKB|Kco?wd#98`^u zJ;y9hn5d3XUSab+wNw{*zrn)R$*G<)d5<}_uT^C#Vp!3=MXH6XI9L-^Ky|lh7Pi-L zQswHG9PEQ&pUTFeeC%*>lZt3p5jJ$8T*b4w6ze8utITVtz|vLUs%)vN#;$&SsB*oo z4)e>suJY^0kJyv5XH|+@o3Sh8gDT9PHf*y7P&q!kS|4 z*DwKsrcrrCmyqEZKm=N}d;DSiV*} zl#U1|ung3al{ThPSUGDVm6r9Uu=s`jl%j&tS$!i;N^5Eutldp!N=mLfSa}6HN>_?@ zv#>V`N^uVRSmA$4DqSi%$a;5viIS}AQ5I*vu+oy66D)fA7e&9IGpvs2K}CVy^DI99 zHbv32%dAqTYQ4@s>UXS?$!J9v2F7|m5}@d{nagtScU62-kj=XJ z$x<;bEuZzcU0?B(bTKQnMOjg_x{Nj6xJj|$Kov{%<8npOt#zy|4PuI?#y_&k>%S|| z9=EWJ8%7jf#dfg5K6Wa&Ds;1Kn(7p+`}$bjEkz3F9}TgrI@k(kDPydV?w1NSMw2YV zfx8NS2!CZ&j$Tm+sUWeHrcWxQ-r#4O^X^kqo2EH__9Gi;k{m3tMX_JV@NcR`ifjXm^)pFArU#kZd5& z<|K(L_-|2WYwzS&_)T1$9e-j%Ui+ICJLY{tI+q-(PuCe)7Ewd%enedHW9@Y#+kl7v-a{rAd173zwy`->+4Y zkCM+|Z$wXPUTF&0Za&N8*ZJ*YyJd*V)6#xrZ@%E-OB|g+u$@TJ~s!9LJ&6P}a9mi6gK@O*Yk2opUK%O18O7o3rfh zD%tbS2Asr!1+u@DY~?)E;FBG8HRlwikIS5>w&s*!Ju<%pIB;HzG|9Z}a^dWCDVH&$ zZs%xU%9dHl>&q$Vcq^lSB9LRH_E_eR&1B9W%$qVHe?@YJ^3KadI>m7$R~?ag`zeW| z6}eN!drvAy|YY$vyIHCtQro2`%b&rp5iaZQt z417*<%N7Cls@;H5C zH>3l(#hjGw=cU<4DmVjw9hQ#wuH|^G-66(>Ukt9s}uK`7fOO0TtIbw%mtT6MI%3vw*A6vGJ@MYeZ4NG%V%x}YFI8kq ztuR#NI$OV!daA0%{r>K;)NvVY?k)9OQqMLRaIOBlAhmk!Hg5Zdqf(ixEV%RwyQH42 zvgL{|p-Hu`apGP%5+mik!JR878YHz?#+&qxE< zue#JBbpQJMozharqA6TM{xwpSfX02hS6s^P41=pLDj+5Ga3}Z8k;yHpxxaGtm-KI; zcOK%tz0k5nSm*?I>&B`r6*6bJ+&}ZSwAx+b{y#jOWtdgxmW225c6WDoSKNYYa0%{# zpa~KzK>`E_P9Ow#3GUkN?(R<0-c7?)-5>K~o@ZumZlF)^^X;{&>aA~--&=dHHUCCr zzkX={`plJxMZ>S#?~lA0(Up1D{#47oh(q&_*jL&-j&N)F-TtSEFCr3lY_bpE^EP6w z?kfACuOlL?FVD9>)E*m=5jfS}$U8aW&$v6xOOrBlLFqO#C#mROa=QJbrlq2kt+VmpF-*{$sYm7+J5I3W@yFYpI>Hq+jH~+*x*cD+fm^ zew$zyl|MYPz-yRY!^p9b9}B|lM!uO8`T7rUyK>*@kuf0-c8_k%iL94hP%5UXl^Heu{@}xOQIT1!SN0p<4%^sTyGC8w^SjN78n39kKWwrIdl(RvAG*p$ zdwW=vhv5PngRujmF1Ady8EHK%Dm-Ph&HdI6gRA*$rhARCnnQ={rux!Zi* zG&{;{f{l&Ulm$_10}O3e2P}(fF;TPmWUxBwlpwM>+qFJwaaEi3&xM<#W+&BJ?}*qD z_3P6j>t}cNL`7dnw>Ce0Fe>z5jP;$}N29WTd2PLX!|AB=iyv4|UUEL_ugTY}SI)c= zb${qt>-!UKMfC(7v9=odU(`>oyRDxOc^ai}x!HRAz}Ha~x~r{!8t^fyOnIU8p95o~ zv_#XbGlwKcE$td(J#=JdRLkc<)@2j&qi!_>Ti=*j8g;D3!}|1+>Zse5w$=|eG)A?T z8(FvSZjD-1u5LZ|ba#|lh1j~|ju72d*Hda@+j*Y&ze2LYZ``<^e{dJaApUN50KmIkrYJmB? z=u6jzSuOp3NwoHxaH}VWe~f;b>0{-Tv@ZHolcUuujm^;ymCda-jNK8fVy|O0@#voD zGyN4-6LSwnFPieT#IfiO}3mnm*%l8=`^RMconSF);jkE^qW2b(`q44} z+B~&LUo$CY&7#{D?|P@l9JqbKB4+R0nC8|K7WIZpV$OvhuyDEdW6bg0J1lmFtdGe~ z-C)s{xH)El5d z?_Lxiv(mJ|{H9@AOw-0v^EEL!G4Han%*SmhjwugJFdyPu6*J}3d-Jh%4KWs9o|vz? z+!_-w=eGIfA9`XgL|ia$vJ}V8aXV=~rdTQVr=thVKU~m^&FN?2E;ZvF}GU znf)%Tj~x_OZe~@!Io5i3u32o%&e*B3NoKq5?~AP;5n(p^%;DI)#OG#?yHCbCOt@#J zx$d9XgzU>^@aQ)izsQ=5D{*01`IndOLwu`R2AH|yX3MXYu&PT}D9u?P09HoM~+ z6T8@Oky)o_a_ogGGt9<#WW|OBjyHSYQ5YK#Gt|u1yCU}RjBvB_{`Ik=ntjZi!dhaN z?shVJIjB3f#=^pE`WR7M%oANR*$kyP_3_GP&zEY(J!tr9`tv4(xL5mHO$Qz{k8^dd zH8r?s7xyK)$h7sDYn;#04Ab0HpSVP|IMdjM;JCzlZ%sd_^pErV{;}yt=V5W8-kYWg z!^gz=UH;d!XvOz&iK9=Lb{?4-m(;c2)cE=QxS%ULO#7EDi&LJs(R7u@nz#Xym8O?N ze~GJjFweAP>Grth1yfCJ|K1a~$aswDvZO!bh9nL$eI`8-cX(HbscP7{xFKO)rt{Wa zj$7DfZ~Ermt+>y3O--#DAH>xy(>DFh{YBhZXN76w%J*^B)n81e{TCBA=h|nJ*pB2l z^`+G&;eE5?oZJgd9_%TKyWgB<;+kF=cl}9>$z|)tIPG8Gm{_lFi>n^`$mE~*U*bG< zZkkvaNaL#t&YPTDrW&t#^SFuS2c7uqKkqj=Z)Otz@Vgx*HXE(uy-hcoT+DEaw{Bcv zV(0G_zw7-xlgq~grd&Jtg8Jfe#s^!lfs$5#Lt@b)%d%#?eQ@KT8-}x z-y46+sn%HMeXFF zr`8QgXx-do6lgU%VaMJIquBUK2}e%k;Vz(=33gXgjN)7uBm_N;G72tSo{${-%INfw zwFz~F4~!azZBE$NdfmuRv@79`>UpCTFaAjQ-tM^3$qj!c?Ci7O=%N3a1pjF}jNZ3h zNLaC9qtV+ZHxgWruQa;1>A!?kkLMd5>i;|;EPI;K9Od^32YbdES*67!EU_ADlzc8F zA$~}>(T~e>5}vH|HR=s5NpL;sZ1l5wO@h-0OQZ7QPYHLL^o_zFcP6|sS2NmmKuDZA zN^JCWp;F?nTRRPN`fDY6-ETCkwlGRuUQupX+H0BUXPRdiQ|OquXMBp`-|svV7yl7u zIQ>dsVrIlEL)n48i7BFohNssJO`O*EhN1DCF^Q|To;Tbza&n@+$|M^^^$B4d$@0+hAZam{}=-P58aZ-b;;VB6&m!P)RAbe zpJDJ1dI4kB#~GCTsz_4JeP-sYW zYgN6H0!t4Y$lQaHl*jBb*f6$V(%M&B4Pw^~OZwS;ox#_?$0iy5v&=v@a!S%Tow)`| z&2y6McTX`WFkg~%w0E?@;gPG8{#ge{V$07-Lz+SjPTbv|v}dW0L3P>Qq(xOu28Jd_ zlFAoY8rY9Nozz>QZ=kjRLej%UY6jU+HGV;r&-SF`n-$OX#(m35cDr<6FW}eWD3E0$zBfs=>4>-Ir%}&F})b&?&R`2 z`}IB@5~sXdw^OgmST$utpI`KDU(!w4skB;efVWx7lJrG-SKipA^!__bFK3KPfD8JK)pe#LsM*Pg7t1+7?Wc6#!Ig>bV^FbaYwz1%sDB6t1R>$ ztXYyWe1yKk#Rk{H~ z&Zc~SxKQ^{)8&-m8#8ntp1zavc}~3U`Jqoz#*Fx&`+fVHlsSRVbplA*qh( zp}PJ`15-P4d~}DWjY!>I;;d_Zeqw55t(ES}l`~T#+YEJ$`z}n~Cf3vq(*7~ELrbn} zRIwq|*}7Nf#q({cM!u~&7Dx7`ei%}x(|_5KRM#1$Iu1k5q>f#aqZ4a$Db;s>vW|!7 zc53>SD4lU7k5YXpU++IWW3@hofOnNG*Et&L|q9nZQp zp80e<``Y*pq~p7wjqgM{z8l*3j-=zeqK)rNI=(wv_ztDxyQGEhR64#}TKJBo`a{9nmEHVah7Z1OwYvGu8A`~6KB09&iqWA{hD|O zWa3?*iFZOK-VK^~M`Yq%p^0}!Cf*&Ic!y--U80G1N+#Ydns~=#;$5SOcTOhWJ(_q2 zW#V0=iFZ;a-c6c#M`hw&rHOY|Cf;3|c!y=;U8ae5S|;9Yns~=$;$5eScU~smeVTX& zX5w9_fp=mi-i;b~M`q$(seyN9Cf=PIc!y@+S(qg>FjHh}MFTTS7G@U>%rIG)Wi&9;WMQ_^z>JfHSw{miPZnk$4a`8VOAjFydAO&v2^HfA?<%y8M5<0m@pxKy3)iIN1V>VUC zjGBX4RUI>H4rW(%%&<9_Wz{j$=3ur}$BdhUSyvr1Zw_W(bzE- zgIQS(Gjk4RXEn^wIhdu@FjMDXwpPQ8or76h4KsHRW^Xmj;5nGZ)i9IiU^Z97jGlv8 zT@5pP4rX^X%w@|~5k&9hJ4Le6Jb`Le|Ai3B@)UcD}VmDF4j*^RAMGZSk zE_N3+>@d05Wz?|K~Oi*%hh0$>J7XSpM^)^Q zdDtaYu~X(@w^YTBnTK6d6+34hc28C8pn2FuRk4%iVK-I9j+%#ERTVpH9(Gq%?67&* zWmU1$=3%#0#g3bYT~`%5Zyt7ERqVid*o9TG6X#(!R>h8-hh13}J98d(XI1RbdDx{@ zu~X+^w^qfDosV5x6+3r6c5hYe;Q83aRj`xiV>eg9j-HQQT?IRPK6ZB%?C|;6-ZLz_^6Mv)J#LIs*dKC}xJXc+m>GE|^x ztw$M}PXV+aWoSSJ(1Mhq2^ByaQieuU0If(Fno$9?BV}kv1<;a|p(zzWTT+I`R0yp} z8Jbfev?pa~P=(NCMpX!{N*S6}A+#%HXjp~NvXr4|6++umhQ?J0txFl2 zS0S`7WoTf9(883Vi4{T{Q-(%X2(3&Rnpq*VGi7LKh0xNJp{W%@TT_O{RtT+48Jb%m zv^QmFaD~v~l%dHLLYq^DMpp=}P8phAA+$SXXn2Lt@|24Da+RRz7DL-rg2r16tyc+}Z!xrAC1}9K(1Mkq z2^T{fR)R)c46RrRnsG6-V|Y}0S&waTDSt5cnP#| z1vK&!XypoM<|WY170}R2prtFIsh2=oS3qMgf!3~o=3WBrT>%Zg1X{cTntTbgc?C53 z5@_`bX!a%0?iJAROQ7W|py`)D+gCv2FM-ytfaYHU?Oy>8pafok0-it#ya5F~f)aQI z3U~%3@D3F45K7@CDBvlS!dpAxL!CR8UV=9B!B!}lz2JcA@52_4alpLN^8N4YuJgPEyRdRS%W$>=#@UY6@Wy#@b zmBHJR!{aK0*CmJNRR-@%4iBshUYH!7SQ%7VIXtp*cx7^UX65kCxhu0>D=T;8yO%4yP9A2Cpo?JP+IXOJKa(H!ecy{IR?&R?B%Hie7;pvsb+mplN zD~H!7hv!!g?@ta7upC~X9G+k~yg@lU!g6?pa(IU2@DAnh5X<2u%Hb)N!&{WYV=RZ) zD1+x%4)0M053(Fyqzs;91-wZaJjx1ql`?pi74R-)@GvXjWy;`bR>0eo!Q-re*C~VN zSpn};1`o6XUZ@P7Xa&4c89dSoc%?FUrWNo`W$;id;HAposaC*SmBC}JfY&O6=UM^p zRR#~X0$!{Po@@oYSs6Uq3V5|LjKdZ1Ze{RrE8ykI;OSPt+m*rNt$^1ngXdcb?^gy7 zxDsBl44!Z$ykQwU;!1eMGI++7@Q!8hkSpOO%it+j!dsTXW3GhPEQ9A<3GZ1354sXw zv<#kfCA?`FJnBk#)iQY2mGG`*@USc4Wy|1cSHjzt!Q-xk*DZtRT?y}71`oUvUbqaN zcqP1X89eezc;zy9=9TcyW$@4|;ib#qsaL^Um%(GNg4ZsC=UxTxT?P-n3SPVno_rO& zc_}>lDtPr$c=lEB?xpbXtKj8J;ptbw+n2)QuY%Vvh38)d?_Y`xKozn8Qe*^4Vrr0$ksu>egRG1M znVA}7XC%nb)F4YEL8hh#*%}ElHZ{oFNRYXyMfOI53{EYwI1*%XYLU&6Afr=@td0bk zomymfB*^g8BFiH|rl%I!9tko&waEHNkol=a_D6yYP%W}R5@dpEkqwd{BUFp5kOY~b zT4aYL$Pm>cOC&+2s215G2{J~t$QntIIjTkWNP-MfEwV@wWRhx;O_Cs^REw;V1ev8; zWS1n!Fx4WW~eSAR|_fte6Cuv3g|3 zB*>7}BTFVhrmP;>G6^zf^~jn@kU6VI_Dq5dT0OF85@gcqkxfG->il|S)g;KQ)g!wm zL58g!SvCnWZS}~uNsw`?N7hY(%v(LOZ(?NN>XC&LBNJDTY@8Swxq4*f#K_FmBReNX zhOQo2Ix#YJ^~lzVk+G{s)=rGfT|KgQVr1|dki`=tlh=T3o){Uu24wZb$m}&ByC+75 zuK`&;F*1D($o7em@oPZVPmIi81G0Z&WB?nG1r#F_*nn)H7#YC^WCg{@3^pJ;C`N{` z0a-#ZGKCGu7K)KEY(UmfjLcyJvWH@15F3z16eE+^fNY`|8N~)<6~)LbHXyqwMuxEg zSw=B3jg81Qiji?_MAlJ^%wr?6k78sX84ejWh1heVq`EIk;N1vli7%DrWhH`Mr1X`$ZR$uyD3J7vk_TN zF*2Qv$aad6@oYraQ;f`KBeI`jWI!8{1r;L`+K6nZ7#YzfWJSfuj5Z-VDn^F130YDx zGNnz(mWq)vZ9>*mjLc~hvZrEXP@9lN6(f_{glwu98Pz6aRmI4xHX*wzMuxQsSynMJ ztxd?biji?`Le^D`%xe>}uVQ3in~;SSBNN+%Y^)d=S=`5}D@JCv3E5dOGPF&|(u$F( zZ9=wIjErp)vbJJmZa*P=D@F$Q6SBBsWO6?tn=3*__Y<``4h6rB4n07A-gO>hPfG8W)U*Y z&B!*3ka2EC)>(wib2GBfB4nVOk%bl^6Wxq#v}F)MMaXD3BdaY!X1f{LZ4olu&B$_#km+tl zwp)aZcQdlyB4oask^L4S1Kx}*xCoi>&&Y<0kP-ikthfl7@z2PPi;yAzj4Zhbnexxb zmWz-v|BS4;2$}QG$exRkLH~>_x(J!{&&Z~WkWv4Pthxx9_0Pzzi;!Xej4ZndnfA}f zwu_K)|BS4=2$}cK$i9n^f&Yvwya<{2&&bA$kdgn4th@-B`OnDCi;$uJj4ZtfnflMj z){Bs_Z$Z{xgv@;lviBln@LQ0@7a^11f^5DB8T}Sy^+m|+w;;POLWaKuS$+{R{VmA$ zi;(eeLDpY{%zq2A{~|B|EnopeU;5ff;B4J0Jo>&;ph~1g4+`Y=H=j zK?_&|5txG(um>VA2rXa{L|_tHz$S>mD71i85P?}}1-l>u!_W$rK?J6u6>NhDj6*9} z2N9TuR)}HO4`7d2w+Uwz?ukPPTIhp2w+g! zz@i9XQrf_#2w+s&z^VvfR@%U>2w+&+z_Oqx;$9or76FV)8(0?s%u5^C7Xb`R8(0_t zOiUZt7y*n-8(0|u%uE~D837DUJ6IY4Oier38Uc(=J6Ib5%uPGk8vzVXJ6Ie6Oinx4 z9080@J6Ih7%uYMl9RUnaJ6Ik8Oiw%59s!I`J6In9%uhSm9{~(dJ6IqAOi(-6AOVa} zJ6ItB%uqYnAps0gJ6IwCOi?@7A_0t1J6IzD%uzeoBLNIjJ6I$EOi~BfBms<42UsNm z%u)x~B>@am2UsQnOj8HgCIO672UsTo%u@&0Cjksp2UsWpOjHNhC;^OA2UsZq%v1;1 zDFF;s2UscrOjQTiDglgD2Usfs%vA^2D*+5v2UsitOjZZjECGyG2Uslu%vJ~3E#dkf zogHAg1TbBlV7mk`UY%gQ1TbHnV7~+~V4YyW1TbNpV8aA3Vx3^c1TbTrV8;Y7WSwBi z1TbZtV9NwBW}RTo1TbfvV9x|FXq{lu1TblxVABLJYMo%!1TbrzVAljNY@J})1Tbx# zVA}*RZk=G=1Tb%%VBZ8VaGhY`1Tb-(VB-WZa$R8M1Tb@5VCMul)?Hxf1Tb}7VCw`h zc3oiY1Tc49VDAJlcwJ!e1TcABVDkhpdR<`k1TcGDVD|(td|hDq1TcMFVEY6xeqCVw z1TcSHVE+U#fL&k#@#jT$fejSE2zG%L6u=C2fgKdU5O#qj6u=aAfh`ok7NYgIyHBFm{7w6u>lggKZSRICg_|6u>-ogMAdh zKz4(L6u?AwgN+oxNOpsj6u?Y&gPjz>P zSpm%K7qGJe7}_sjX$3H~U%=K1U~IpDwH3hJegS(cfWiF&7FPh1`vq*S07mxR6Z{2iumDE*3s_+R%y2K* zVF3(rFIZv$OmQ#RVgZbCFIZy%%yBQ+V*w0uFIZ#&OmZ*SWC4tFFIZ&(%yKW-WdRIx zFIZ*)Omi>TW&w+Omr{UXaS6LFIZ^-%yciwq6=Wszk*E{z^H!(t1f_9{|a_p0K@(bEV}@v{TtYJ0gU@M zu#8fZ6{Bc3%L){|z6r0H*&Nep~^J|2N*-0p|bz zd*1kee?6oo@IUXdHWv8Lcl>8B@W0`15$pxG3=F6F1xy`18hZc`5McKco>O@beh? zPlmwH=bLA#z|ZT(+eU08B4Nb19)X`{S&2f#&v*4tdLn+_tzv5tKmX-_xr_Mw$hHj; z@%Iz-aEOS%ul<82i1_ueo;`23iZGni-Ta%<##OH6#U+p43k7YIzF`v(V z|7nW(yzc35Cg$_|BH2mI=Q(G#znIT=X=8sepZD}Fqs4sw@2X7~^ZT&o%px(rAC@j_ z#r(cJc)Cr@?~ljO17d!k4rQDY^ZS)O?~0h;H^t}w#Qgr5Y6XJMa7{<@p{K__vhjebk$4Ql9_z!yZZbKA4#NPRjSg#3_kVzAx;GbESNL zL@cV3@_pjp)FS2kW$k)F#`n#RUNsrtKeKij%lJN0Qgx8={q*Z$9~s|Q9}N4-`2I>e zJ3_|y*&W*{GQQs?U7s)G`!333wT$mS$-^x&z7Lgx_sRHv%zAZP#`ooq11`$={!EU% zE93jLbNEXc->+4P(K5bo&yCNJ@%?L>St8^6c;?hb8Q;$f^SfnyU;EBh$oc+`DAASk zeQq+}O3wGYU!|Lz?|ZGq!E(O;@74^Ka~{xIHeSy8z_)&uob!Ugie+-n4=)-v$T?3~ zuG}T(d@-o;keu^|wxUj^ra zCC;1IbKI0Tf7*==R^mK5Dsr$A=TrNz@k*RmZ{DA!#QC+*VVM%=+1F<_C~>|Wp|wki z^X|@Fhm<(~F6#VSiSuy#vg=BmkG+Z>DRExb9sgd5^Yi(SiAtQOGXwIJIA1@yR;9#w zJIth2iSzf;KLlmYX~-#``aOJAGEsBnLJJ7tCn_bJmii&eN^Y1yw+;l6ct-*y%5 zUmuzdsQhmqn|NA<`&q`*D=OUA-kCj6;r=#o+Zz?`bJNS>RJh+M56M>HzBl4pxeE6` z8pfJtU-lars>*%S_~uYm?w>o9 zC#rHE-MnayD)&=)#Bx>ctCluDt8#yh+WMO+_t`JGhgG@Xz7061%6(V+$PHEQzfJXz zRk;sO9r{6)`|;R+lT^7cr*!A3a(^zIP_4>+dfly7Rqofvr6M)%+x=&#t8xEc`@mR@ z`?$A?gBthqb#r{wxUctr+((W3`%%>qYTV~n&Y7&n{XX&GJT>n750qA^asRiNv006J zfX3ZDYSagIh>odIFZgA`ziQME+AiHzqn^;x_DqfX!kQtGYSbInA5T@I{?JuXs75{F zt6!ZO^@*K3JJhIG>`jrVQ@_x#)KaIOp}pKpo%+Vnr%vkBJB~^H)v15zj_t2bJw)To zD0S*1zgJ9Er(UwjbD=u*le&#RsZ&qMe79Ad`bxOUAL`Uw%*UTlr~b0>)J1jbF(Zoa zs#Bji>F`pWddQOtTYc;4( zSq#{wLA}c5*ZmsQudcp0sX;yKuZ~L^)VG>^?rTu*dbZ+~2KBF&t1%kX!%mlEXiy)! zYf`E~z07+;qXzXet3SFmsHgq%Uam=ft$&w}CiS*8o|c-_-!vDvYEq9gI31`-eeUY1JWT(zigj#v_?MZL54&_FHfpBhicXi*RSwQ#x?_0iGN#ah%$ zH#x7>qJAnLy-kaHYUAqtTGUs4j-Aw^-kSF0k{0#X)FYWT_1}4^+S=5EcQu-8Qy>1K?4nJ*ILjJ=v;FefndhHH+`07xPUmw+1hx+{f)Db$=>l^YX>rlTx zRXI|`A=pT$R z`KUubVXt|z4*dmXt9%{$4N2D3I`kj%Y+7~bN4VJvy7VXB*{JE#uQ+XOq)Y$ev8A0Z z{R{(hFJ1Z@PmRNL>35vfAErzH(VcI(YryH{z+NePF?yb zBO3nHrN8pI?2In`maLqsy7XVV6Cdc(kD31AjV}F}&c|`O^lQ?tXX(y7YSvuTbdG|2aBCSC4*B%5Y0P`a?s4T=nP|wb=#g(LXBC8mLD<=}XUO zJ^D)%DyQkuZz@Szs7L?l^3$L6=trGDzg3U^RLbssdi1LTRvy=*f0Z)ff*$>>^Fep? z=x<##d#*>nE9YB;9{sNYr73#!!wNqX=+Pg$b*V;=e%Y;EZF=<2^5=>4>8FJcP}irw zmSkzHPrvQZ7dw6WZ`-rI^y$Z)e-Nfmf3ESsFn#)UOBYSlr+=s0Z;n3wyc)yh`tp#$^f4INuwLbmC=TBqx=`U*U z&D5vgcxXzgKK;ia$3}hnk&3o1efpEV?_>t_D@_h+8_>U;In~^NerANNvjP3h2@QS* z^gHE``x(&xEZ8#AfPQH9peY9QM>|yJ8_+KePX5t={^{AHn+)iu+D_SRKz}vP-diI6^{n$M-9~;o0{m<;Z0sY#Z+yn#qxARZt7|_qHomgQ&fA>$VW&`@Y z(Q~7DM{g@k90+(!Z{3J8DQj+wjtPL;BmZ$K5id-~Foh zi6Q-O@9Q57>4(3VkYq@Id}?p5A^mc-E0u=y&(lVIHl&|^r?uCR{`%jim5u1PpY5w} zMF0I>nUxX!_>AA(jOfp+IR_chub&V*(1`y1&81_E=;!OIOgEyxzwg>YBl`W?Lw+)% z|9`b~ixKkx!?*4=Vm{!D(J>?D1z!Aj-iY~u-6L)pF;6hN?1>Tc1%rP1V8pzEpH`9) z^9P=nbB&ls@DHvuVm@JTe6tbr3bSYR8Zp1Hqe;n_d4@Z`>KQZNP^MvJ%)Eo;SyyA` zALhFR8Z!@Z_wfK@<|9M{MjJCPF)e#Y^9^I>HKKbS88g2zXv;fe<~iQ?#v3!=Frv`^`1HkdJ=^-Q$WjCrjQ{STTkzxDCgQ)bL_S--ku#(dX;uDfQ;dmZq5VaEK| zsg;pt%!BQ_nqtO$*sP*_Gv>wg4XVwUAG`Qaz?JQSCnKOT< z|7WT>^LXXA3e1_$+aFVH&b*#_MT+jR^L_t%>02=Gw|%IU1@nJF zGhHp12aH%9V8MK#({KGPm=~OLVx$H0gDb90wqTxc%+t9R%ooa{R#-4^crbmV1@nh> z#XBvSM>MTJXu*7%%Wd1$-L({GQlVqW&*Z_})ppS?9>ffe(#>wH#OF<<*tzR8Mt+abBXSuuY*>eeAE z=5ckmoUvj)_r%C6R?O?>nB2EwemA@7g%$I>#~wslG2g4cHN}c~-vLAOt(gDy(X6s! z9=I^0*^2q#L1(^LF)zGew!)hE;eIwc*31)Ul$lvGUu=8H(VBT<=XpNX%pX@|lVLm+epYb-#i_Z#~X~X>Z`Lsng%#$Bn_LB|sM{Jl! z?|${S4fE;!#$2^wUfrwcz76y1u`6EMFwd^m6KTVId*|;dHq5*4*UqS5ZJF;^KlrmP^ZrfZUAD~suUUW4mOQ}8 z>XWwQ17=OVXiHw;WAtrX@&mB}Pi@H){CM%bE%|~68VR=K4UTWjvL%0DSW;q39wBg8 zy)F5KmfP*N zFdg}~9eEAS(^u@sZ=9;UXGfmnx%Ue@@*O{Jim)T^@%%%Q9r=&bD!F##K{Upe+mR2^ zKiX(VUgTb8ryco`B14Hid6M&!)$Pfbv>Y?ECvTFSYHd&cWQ>NJJ$aPL!vgHdr!;Nr zXHQfOe=Fe~-Z!}=dLI?6kCfimykVo3^$1e`#lcpTomC-@DBl#<}om!6Mv9_)^aU`F$a_N5*PUD&(%yK;zWM$ z@zFF-yU+rZJT*$+YSh>=Ld~9OI1{dEyjuB% zF64VNJgZ&E`?hRvb|L?}B(>XxJaC}3)RlbjjFsxH`ERvefnru^2yiEOm-!&oSZYqmHhH3gQc$Ina#$naV6i} zci(1L^3IRm{pL#kc}vGZSMty&Tu-`^kCx2(*Ok2V+k-b;$xkP~df-Z)+P&_jEBWdI zgGg8M*7^OCT*+U%F3EN!j~(-8i7WZ+#}8{=$!mYkYH=mMy}9d)D|zk-#&S3E-9HCv zx{>#;n_%Qd{`66ShyOCEPZugrT`Ssl{2i?fCt9zbsBj29uecp|{ zdy~&~H}dZzeg1PJ58veZ!i{`eun^>+>v-wTz5}y& z5$^0ixUnbEoqY&vMrXORA7P_Tu{-+`o~Bp3vp>P_ShG9(6lx}PyR%;*M@!%=k-_F+tzUhlzv4CBgH5B6nf{n+cl{*1tOnJ3tPy@Q)HJlU_I_szhQ zeH*dcEIrx3aaVBiWFN=-tzMq&=aBRSd9tr#&AR@c?C;QQ{LYho9=Y?!d$QjnC1;u^ z`##!6&hupd$Kcn?JlO~G&V8*X`$3kR+3d-_kTAt>p6m|^S$)8heIoO6j(M_Q!Ks{Uf>ZyPoVLxv}VpC;Le*M!xZ6UrB^*v?u#ZG=EL@WS_~7>}*f=o0xf( zc(U)L@V6RI_Mb%MG<&iSCDXOrll>@ao5f!2OIZ@D;>G@yIs;uV_Nn~!gQ*w$Rc7C? z^=tt{3}f0`@)eVjs=kyKlVMPt%hc<;A|5{jEt}?5_#c%l2ZQjgn8X7yE5m zMpb*U@1|$bColHjSZ?d|Vjs>A#|3ZpgCP;9sk}SZ}#zwmG<{$KhN*V-+8mICqr$VH~V|~XiW8HpU)fhAH3P` zGgWnoH~W6n6sx`2|C1^F><#wc@M-5ZZ}tQI*SN=j2=7Z2QsvFQBgfZG-t0dbcB;c0?7z|GpT2psAL+w)3Lo|*nOSQ3us><{X9FMhDM>zB z_^@B;@Lvu->|65s!NZ6BOT}&hKI~&U-yZJ6ex_Bg2m7$EY3#01KJ0JmH*As*`<(iy z%=BTu)5zHQKJ0s1yl1%&`=9C~J@a8dl{RYD*;f^r6YazPs^7LI`>@Yy ztaY{z`>pKW7x}R7O8i5W5BslbdmDY&hn07--G}{H8Qx!g*q4&t$w$p1oo+1Div8Q{zQu3>M!^JSmc zkpbg;+3!{QVTv#Nz5)i$@n!$lp|^{C*$37b`lB!V!NxsW@5{chCvIDP*&k+e;WuCQ zi5=2E;LCn7(e9(Z>>FFxe#V#mWA*bc`hxv8S&($Ym;GeLLI3%(uWaV|XTIz&%agtH zWuMvfCDFd@H_MMr@@3!IOqVQQ_Ma8*F7#y|+MKcqU-qMwgf;lGFKzD8R$um~mDcq5 zvQO=YaETxL)rtkD1`dKDe{{runfSuI< zR{60{u3+8&-k&gPHDvjKlayI zAGz+wK0Dt>_x#vz7nb?Nk9~LHZLj^Bl}i2loU&_T#AyN%v!4UhRxLKlbOn zT3zbLKE2($YW&!*H{{qSKlbhQT?7PfdYwP}2?GK)`?IgG*mS2q z`wM^hw%4D1hSHKl{_Hp0^7e#3`wlD4p7Uq_Vc5@?{n>}OWBe_Du>a|b20obS&*M&r~{fA%vzI$7h-zQ*vG zpZwY1c;B+apM8$n#l8OQcbtAs8o<8CL(^0P*#CG>PbYwVkk8|d0@x3EcZX#F`yvkn zI0Udia#FQh0Q)56Cw&9hFL{1&NC5jLZJYZAuz&L4>7fDaqb%(|I)MF@=2a5|*jL$q z-}C_XSB`X@8^AuxKCz1f*l%gL=*Ix|U1o{a2eAKg>*>t_?88*`-WkAt%q?7TrVG+oFQr|%P zK=zf!9(N67e`&u~??CpM9vc%B$bQq$-bJE7|4FvL%Y%g**6=0EjN(;vmauL1KCGwT~isz ze%i_MhCue!F0gJ1WPk05kgh#lz3AH=@hgReq^*uVSh%l<*^;~nyB zXb}5(iyw>%Vqfo=TN8rV-+Sc3)FAfxUOzrNi2c4t_bdov-|zU1%YxYdTee_z5c`0K zj@uB#e&DSkTY}gZyxV$b5c`AY$@d1aPgtwwU=aI-|BN{r#J=I;tEYq5KP=vLK8St9 z?K7_gv7h+4|E(bQ6^~Kgxm8_Ygu=TpYP?0420Y#GeH=MRl`!R&t?aNH%B zeb5I(y@J^feW}ntn0?W|{~8+1{%Bu|{=w{%zV&=aF#Dw&Cyoqe-}IOIal!1LPTMg# zn0?gi3}yzipSt+!++g-q>jy3lW`DKb#}&csv(6vACYb%!%d<8Hv+p``=GI{LUsspx z3}zp8>b$+d?8pAC>|ikavcJta8qEIe0r{tb*{3~X(m%oM*EWm46wJQuhy88@vwvIn z!QEi?aR=Kz3T8jI{o&`q?CZ|@@+O%5-D4I;1hdckKtgOV`@IkQBnPwad)l##VD^7k zx8(-24?JvQaWMPAC*G?FW?#6sN?kDf!&86w6wE&Hz$b0N>=&P-(i68zN(lSOul3Uk0sC)%VUK_cCr>>t8@^k@A;LfDu7VME^#_NO1bIVgmE>Lvx>g|J_Jk=mFL_N}iCo*2UZ z^#SvzhOm!4dH<{s_OqKmm>0sncGs-MA?$DO>|7B7_TPS&(V7tUyC?Z?3}N4U?$|9M zVE-L1F4+;nK6saHyF=Iyzv}4z5cb8dy>d7N?7u_6b7=-=~JK4?p}-RtWp?M_z&;NI8WeC`R$FfCrA?(*L8vQAR zef!6J+d|mCFEi*4VIRL&`_~Zm^XsKcLfO~<-(96p_V+9ARS#vKzwsQMQ1<(m`Wc3@ z?|;6+EEMd&(_RZk7&eFo*HXNB^9 z1KSbvLV4eTao3_y-hc4%((+K=hhRT?btvyg2y0sx%KH)&r+*3M{Rz9nehuY)3NQ0_ zhVp)eE5Gas<$Vi-3=V{X{dYQX_i!lhV>mnHcqs2@n4EVyl=n46toSDs?7vf0@5NBw z=kW56YoWZ~VUXeN(Er`{aQ=QM?|)e7_&AjJL1^519?JV6=6bvd<$V#0?tBR4{SlUK z(V@IgV(-=XP~IhVniNtF48hyq`kUSQ^UvD*l>Y70UZ7 zG9v3jd7nj$=ciEKZ?XJ%Ybfu#c-!3>%KI-q&gc#0eHa^Gio$q5M!vB;jQ3@HTB{Pq z`!oJa&dKm8;*?e<$81ElR$(R?$`$$rH7lrYDlC8GO z!+2jw=8#okyuT!8(b_QHXR_z_jbXgsr1Zk(Fy41k^>SMn?>{-7zAKFPp)}X*2?P7@ z+WuvK81GBDtbRC*_osX_Jr>6MR3uKP!g#;RJ@2z&yl+J*_}?(zzoOjdav1MpdC>2A z81H9M^uHa(`&y)Z?}zdJmK!0D!g!xcm+!MM-tY3sm0kG38-k z|J};ns>66c%~M5v81Jj`DQ*e_`|md4aZ4E3e>c;89bvrRX7BW#Fy41_*5z9m@4uPc zAr9w#IFH}S!+Af>%e^Y$yf0_b7>#h=pYudVC!F``+)mRE=lwdvju?mYzMVaz&BMX| zyDwL=4(EM5?QiVDc|VWsI;U{n*VFFk7S8*7mS=m0^FE*5zx#&sexJcUf#JOG=W1R^ zIPd?tv!hQq?*p3bI3S$&16_(491iy1{pgbK!g+s?lVVgj?-QDJVQe_>7YYoW7|#2K z9;8eT=lw&e3#NzjKBB)mW`*;9qW0hChJ*cg@6lZt4))*u;<+W^yw9lKVMRFaH_E!T zDxCKn&G%Xx&ijv!+}{um_TS?NuT9~+A1U?L)^OgJRPL}NocAXkKlfWW?^CMP-5bvP zl?s2~AI|%he(Lx$ocAwXTkuyn?_=7May*>(Gkp#@9nSljlrEeN=lxBukEZK&#rq@clV~=r19izY;YTf!F_NWiVe;_@uW$Uy1To3)4Xf($9G-dd(8~A$vJyJ z&wc;aZ~fR@U(|K~__?|MsQC+jYpze~nj8LVu3zfx)cof9rr!FasJZ^BqWWdcVgK)V zzH>!${Z#v2sA{gS>QL3(=K8DNIBQ{ZeO8M*EorXb>c_{IH`jM{=kKeU>%Z!-XKizR zST)yfY_1=xTkkE+^<~8#-QFDb|BmvncQuFozhmFRz0LJ&{akaPxxTGSuQ}3O|JEgK zjyKoG_1&o2=K8s|JX|lPuj{wB>c?RJ@4Wek(_;F({;&Lun0~J%E6$4P`?_q`xiS4; zhiWc}=>wbE;F6erutzVrET%8)&daZi=?}|l+&HFBY{+%j#q^6UyRJ!0-`M_ZZjR|6 z`|QfwV*1DqUVLXvKiSH&?uqFu8-CJ#G5uw^2kwvQGrN1kgE9SPkIs$7^qo!mqh(D0 z*{+Y<#Pp$^@m%|ueze5YPBDFH=k(|r)1P+aj_xsiYT0M@is@H-Wn-V1zP0v$_K(5- z-}Ump2F3KTrH>sN)6cf=z7a8fZKu{B9n;_TL-p90KDVQ9B*$R??^-l`QcT}lm+Pm- z^uG<*G(DyduI7^&G5v7OMrXwI#WlPtJElJ_b5U*#_W$mj=fjwOxeHo88q+t|cJJdc z{c~r2@MKIM-Gr{s#Prh*JM>&kU){EMUySLmYuM)Hm_EDWjjzP?+gx@im_HeM~=JTGCH3eSJf!evawyTh{frm_EN9Wq-tA|L=LFbrjS0SN&^# zO#k2ecNE3+0oMPpB&Hwm#JS}$eSy!06*1WVd%oT}JEl)?RIfQP{eoZrGB2iY@R=(X z#`F&!k1vktBdoh}X-q%io6T0l^c9x8vMQ#(@X76KV)_i1wp<_6ZN-F{$BfI`V_DI_raKc#Si8mj=}!_-^_E5 z#q=-s?ot!e$N2Q)wK4sS-G8kc=xh9Z$4P+C=`+slx`g;TYnMap44fJWARrNriU-SFu!9d^UrvEk% z^lyIob`a>}tbL+opr3Qyl-7a1&c40d2KqY(G;JT~^W1iE$3VYl!-JgyeV>2M=@RJw zJn=DQ=ofwH#Q}l7(J}o71^P!3 zT?G0_N39+j=qJ7ZgW-X`(zk|<4D^>if7$3jpJ~GdV*>rAmp?Zy(0BTCi{wE6>AJlW z0)41&e>f@7kGihglt5qV&qt>Q`cp6a&-6f_>KPqV1O2McY@ZS6TYdHU^g#dWowsHN z`dIswW(BbSP0t*e6X6aN6X=s|KIpkXzwC>Po)7fRPU-PtpnrC0=}Un= z+PTeN4)oLZ|Mp)2?En4ASN}WEUwi5cuLk;T?>_Qcpx<`$h&KY*|NCz(eKUalzyH`R zZwLBt`#%3ppdUB3{oO!c?spyD5A^4L_u&VDKHcU=KMY|1AL!HVqd?#8kq{`){*@Ll;o1p0%w?*B2+Cw#~C{|jLMo7MLGInXyeF#b!R zf4Ie`zXtk~1ySx7i^ck;9iUR${4U!W9?0>W0AI=Z- zA0PR5L7)#g@mXP@ANl-WiUQdGX1j}v1O3VU=avMp|IIorD-HB37q2M`VE>y{ZYU4* zFAv=`E6~TBy|E(D&wTZ|%0ORp_Z71P{mo}As0#EscPp+m1O3kf z-{fql*LB{|7%^v?S0! zy=3OnKp*w1PcIAfQ!gL7JkVGD)m7VWl^oc*vY*(OP{PFT#fxhwn{dWiY z$A4P4JJ3h|_M|<5e)2Q+?FsaipOmpT&|m)e;k|)A^A|Gq1^Uge-oG!5a>&<8#@^2PcQxQV4zR^l8X-o`qlS@hXQ@;JvSZ-^shhE z>2RQr{hKcj2m0B+XmBLZ*M8f$BLVDxtXbkn0Q(=Sy5wk}-+lY!qXF!H?B(ca0Q(H*ve?Iwv znm`}@=+v4(KmDdJY65-r`&QKi`s<%M??j-_{-ahW0{!-#rkx1%-DkXYB7pr5ZYw+y z!2So5ww?%J|AV{FstsWOgGcYE4PgI+0ZFw1?0@jfgxUc1KltGB+5q-HIPdM+0QNsP zV`gmt`yV`4P#eJh2d~bn4PgI+8`snZu>V2p?X>~yf3R_XZ2eOlB|AYN+;r|W$-@^YK_P>Syec1mN{_kP`Tlmj|{cqtvANIe6|329N7XJHT|6BOy zf&FjcpAYuGg@0by{}%rFVgFnB_ksOy;olGTzlDEa*#8#({bB!G`164MZ{g1e_P>Qc zFWCPU{`_G7Tl({a{cq{d7xurUKX2Iomj3)<|6BU|fcwjpzm=bF*#B03-eLb+`T2+a zZ{_y^_P>?i57_@!eqUh!TlxKg{cq*>3HHC0-!ItzR({`L|6BR}gZ*#i_YwBLmETX; z|5koqVgFnC{e}H+<@Xu(zqQ|Q*#Fjk-(mk-`~8RgZ|(B{_P@2y2iX7CJ}+SZTl@Tg z{cr8_1opqR&llML);@1w|6BX~f&Fjo^9c68wa+Km|JFXQVE&?eh%wzqQXd z*#Fi(?_mF1`}~9bZ|(CC_P>qKN7(;1J}+Va+xYy1{cq#*6!yQ3&sW(0Ha>4*|J(Td zh5c{i^BDHOjn8M;|296aVgK9s{D%E+qq z2iX5MzAs?^+xY%~{cq#@1opqJ?-$trw!Uv*|J(Zhf&Fjm`v~^Gt?wt;|F*ubVE^0t z{(}8)>-!A$zpd{#*#EY^?_mGi`u>CcZ|nOI_P?#~N7(*#GvP_hA3qd;Wv{Z|`{!_P@R7L)icJo)=;NJ9vJC{qNv;6867?=S$fC4xTq* z|2ug8g#GW}c@*})gXdG&{|=s4VgEaLeue$-;CUAIzk}yn*#8cmcVYiKc>aa`@8EeD z_P>MYW7z)=o|j?&J9vJE{qNv;8uq_~=WE#i4xYDR|2umAhW+p8c^vk?qvvzj|Bjy5 zVgEaNeuw?<=y@LYzoX}S*#C~6_hJ7#dj5y~@92F1_P?X|1K9tL-WOp1J9>YB{qN{~ z0`|Y7_Y2tnj@~z5|2umBfc@|2eFXNuqxTco|Bl{QVE;RMe}Vn)+&BiR2=-j`tiJ9&SC{qN*`3iiK~_bb@{PTsd*|2ujAdbszS zoxG31{&(_z2K(R1`x@+jC+}~t|DC+g!Txvheh2&C$@?Dce<$yMu>YOB55oR;_I?Qa z-`V>j?0;wPkFfupy-&jaclLe>``_97ChUJ_@1L;$oxP93{&)6%3j5#L`zq{zXYa4D z|DCYOC55xX<_I?ce-`V>z?0;wP&#?cUy-&mbckzA= z``^X;Htc^F@87WhUA&LO{&(?y4*TE5`#S7@7w_+||6RP#!~S>ieh>TK#rr<&e;4on zu>W102f+S!aXtY1-^FW11hrs@Kbv^?7-_>~u?0;A1 zC$Rrrou|P5cXhr3``^`h3+#Va=P$7TU7g3k{&#gg1N-0Ac@6A;SLZjd|6QHu!2Wl2 zz61N;)p-x>f0FYb*#9KwL9qWx&WB+Clbjd9{wFyZwa-IeIpX7WC_CLva7wmtM^Do%{Bbxm%;ugIX{E_@8&!W_P?9+HQ4`d&f8%ByE%V@{qN>H4)(vB^Euf6ZqDmq|GPQA zgZ=O3JP-E2oAW)`|8CCvVE?;0|AYPS<~$Jgznk+x*#ByE%V^{qN>H6868l^GVqM?#?S=|GPWCg#GXCJQMc6yYo%h|L)E^VgI{3 z|AhVTekb!#*#GX%M`8cFJ1>R(@9z8*_P@LHRM`LS&R1doyE|`%{qOGl752Zo^H|vb z?#^dn|GPV{h5hgD{1*1VyYpPw|L)FrVgGwL?}h#E;rti&zlZZ+*#92RhhhJFI4_3% z@8SFy_P>YoWZ3^6&X-~TdpK`~{qN!Y8TP-2^Jv)r9?qv>|9d#EhW+p1{2KPZhx2UM z{~pe_VgGwL?}q*F;rtu+zlZa1*#92R$6^0_I4_6&@9F#;_P?j|blCr%&evi8dpd82 z{qO1g9rnMc^LW_*p3diC|9d*GhyCyA{2undr}KQ+|DMkGVgGynJ?}r|m7dQ3VgGx& z4}kse>3#tAzo+{G*#DmH4`Ba$x=(=p@9BO4_P?k52H5|e?jK|=7TEt@?q6X4d%2H+{qN;|2KK*~`x@B)UhZ#T|9iR5f&K60eh2oy zxBDL0|K9F@VE=o&4}$&g?S2UMzqk7$*#F+{k6{0MyHA4s@9lmG_P@9LCfNVp?w?@) zd%KT<{qOC53iiLZ`zqM~-tMnp|9iX7g8lF9ehc=$xBD*G|K9GuVE=o&4}<;h?S2gQ zzqk7`*#AE6&tU)ixKD%q@8fw&HrW3@?%!bl`?!yT{qN&`4)(u~`#RYFKJM>e z|NFSlgZ=O0eh>D)kNZB@|32>jVE_BL4}|^i<9-nKzmNMu*#AE64}bl+ypQ`t*#AE6 z7h(VVxNn60@8kXv_P>w&NZ9|r?k8dY`?{}${qO7k6868Z`%KvXzV0_+|NFY{g#GX9 z{uB1UulrEg|Gw@=VgLKOFNOW@>;4q>zpwjL*#ExnS7HDAx^IR3@9X{*_P?+DSlIu* z?q^~D`?{}%{qO7k7WTid`&`)nzV3Hn|NFY{h5hg6{ulPY-^1*KVgLKNABO$!=e`*B zzn}YK*#Ca+lVSh+xnG9;@8`Z5_P?L|XW0LK?xSJ<`?;Tn{qN_#8uq`R`)k<$e(tkj z|NFV$hW+p7z8m(xpZjmv|9@9(}H z_P@XTci8{_?&D$q`@5fq{qOI-9`?V#`+L~`{_gW(|NFb&hyCyGz906#zx#jK|NiCy zVE_A@4}kseZ(acQzrXnb*#G|K31I*Gn=gR0r0p>Yi{|A`wfc+m} z-UIf3fcX#D{{iMfVE+f24}tw3XkG;Nf1vph*#Cj%Nnrm6nlFLE71hhlBkeVm=P`e~5WG*#9Bs=V1Sbn5TpNA7Z`^_J4?ZJJ|mr z=I>zthnUBM{U2gJ5B7hEc|F+wA?EjB|A(6AgZ&?Bz7O_)sChrw|DoppVE>1j2Za3} zYCaJ5f2esu*#DvC2Vwt*nkR()A8Ni3_J62(L)ibJ<_}^2hnh!({U2&R5%zzmc}3X& zq2?E1|A(4qg#90Cz7h6+sCh@&|Dom|VgHAkhlKqfYCaP7f2es$*#BYXCt?4GnWu#P zA7;K1_J5dpOW6Nm<}YFYhndHO{U2sN6ZU_Yc}>{=Vdghs|A(39g#908z7zI;n0Zgw z|6%4oVgHAj2Zj9~W2_J4$V zW7z)@=8s|jN0>*3{U2dI8TNmKd1cuD5$2a+|3{c-hW#I5z8Us^gn4J!{}JY&VgE;% zhlc$hVLlr6e}s8y*#8mcr(yp`n5TyQA7Q>4_J4$VYuNu0=C5J@N0`Tk{U2dI8}@&s zd2QJLk>duVgE;(2Z#M1X+9kGf24VF*#D8{$6^0R znkR?-A8EcE_J5>#bJ+ip=FegON18{6{U2#Q9rk~ud3D(Tk>=N7|3{ie3VgE;(hll+iX+9qIf0TK7*#A-H=VAXxnWu;SA7#EC_J5Rld)WU`=I>$u zN14Zm{U2pMANGHgd41UbQReqy|3{hUhy5RAz905~lzD&H|54`uVgEYgv4`BaC$s@r2kCIP-{U0r_0Q)~$egXD> zv^)ds|7iIJ*#FV;4zT~D|K=aM1*7F5VE;$UN5KA%mY0D2A1yxt`#)Nq0``BjdYgwF<}2k%V)s;kCxYf{U0sA0sB8%o&)xOw0sBb|7dv+*#FV;AF%(U zBfkRsKSrJf_J53g3+(?Gc^BCKG4e04|6}A~VE@O+$H4xNk(Yt}A0s~l`#(mW z2KIl9d=2dX7WJ^abW+)$mhWRkCE4b{U0O01N%Q#o(J}Stb7mb|5$k+ z*#EKeKd}E}<$+-T$I1u6{*RRxg8d&WKLq2fIC(4B|8eqHu>a%av0(ql$!Ed-kCWGe{U0a41^Yivo(uMW zoO~DT|2TOs*#B|zU$Fn<TKL-0hPM!?*f1G?7?Eg4!KTe(v_J5pwTg$ck#>ub4+r}{ zUOo=?f4saL?EiTAIoSX4@^rBOa%b z3t|7q%NxS}kC#7${U0xn2>U-?J`wgmSzZzLKUsbe_CHyk5%xb>z7h66S>6%$KUw|} z_CHx3681k?J`(mnSzZ$MKUsbf_CHyk681k?z7qC7S>6)%KUw|~_CHx36ZSt@J`?so zSzZ(NKUsbg_CHyk6ZSt@z7zI8S>6-&KUw}0_CHx36!t$^J{0ypSzffu>-&=BM`8by ze}X(J?EeJ$RM`Is@~W`^6XaK6|0l?^!v0T?Z-xDz zAnywMKSBN#_J4vrEbRXT`B>Qh3G%YA{}beAVgDz{)588wkgtXPpCE4w`#(Yc7WRLF zJTC121o>Rp{|WNCu>TX}cVYi0$n(PfPmu40{huK33;RDo{ulOtqC7C{|3vv<*#C+0 z!m$4n<%ePaC(0AU{!f%IhW(!?Zw&iCQT`bAf1*4x?EgghWZ3_S^2)IP6Xlm-|0l{b z!~Rc{Z-)J!DDMpWKT-Y}_J5*0H0=LG`DobxiSp90{}bh>VgDz}Q^WpGl&^;UpD1q) z`#(|s8uovpJT~nAMEPvk|B3S2u>TX~w_*P$$#cX0Pm=G3{huW74f{Vy{u}mxk~}!< z|0MZv*#AlL;;{ddN%Hcr|C8kBVgDz|)5HEx zlCOWbX7?m{d)WU;^7pX+ljZSY|0m1m!~Rc}*N6R|EWZ!?KUtn1_J6W`KkWZxd4Jgd z$@2gF|0mlAz<)N`egOWvlkE%Oe>>U!0RCB%?GxaiJ=uN%{#}#p8{pqP+5Q3kER*>& z-O8VBvi$`7Str|9z@L4x{RRA8CfjGg-)*w}2K-$o+jqd0$H4Dqiv0}yuBO=6!0&E~ z{SEvsr`YGf?{5wJhrxGaiv1XTSEksP!FOk>{TY0hrrM{$cWbKs8hqEL+PA@XZ>s$p zd>5zM$H8}Vs{I^%SEt(7!FPA6{T+Olr`qSicYCV+9(>oQ+V{bCf2#c-JPW4U2g0*q zs{J55E2i2P!n0$l{UJO{rrIaMvt_FNB0OuR^31uJXU|moM|c)ZwU2~n(^UIOcveld zuY_mURQpSKmQA(KglF4So^dzxtea}z3D3T%_Mh-9oN6Bm&&Fx?qwuVpW?u@=&T00i z@GPBXp9;^`Y4)q|tes}x3eVnY_OI|Po@O5l&*o|Nv+%5*W?u`>?rA*3Z{k@#%{~{N z?bGac;aNY;z89YT)9ioYT`X`bUN?Un|QZQw_k^M?R5Kgc=t}Xe}{MRbo+RC zH&5pseIxJc>Gt*T?w)Rc5AX8n_WAH`pKiYo@A~QX{qXLeZvPKwf$8=EaWGlP2c9?E|5NC<$_6c#em~OuiXN~Fh4RQ9EZvPNxk?HmkaWGl^oSjnaPvR_!sND z#Mv*!{wL0YDfU5eHca7+*o3oUihWU>9aHR&;w+hBpA=`y6#Jz(Yo^#Y#o05({wdC) zDfUruHchdginD5peN~)YQ#ixkz*#oMJ}b_)DfU}&)=jbRinDKu{a2iYQ|!ayY@A|0 z7H8#D`?5GYr`n&zSvu7|EzZ`d_G@w0PPK1~vv;cfTb#vH?c?HXo@zfAXZ2M3x;VS1 z+TX=lKGi-i&i1MHdvVrJweO3wf2#do+yzqY1LJOxYCjlvg;e{(xI3iUAI4oG)jl!q z7OD1&ao0%Y&T&0=k5v1|xQnFPN5Xy_;0*iVxEs!} zAC9}?4Ey5#edn|p+##>yE;++KIqsG-xMN<&U2}$gbKE^=*gwZzbcTI&+)ZcLPsd$# zhJAJ1U1!)|$6a=YeRkY!XV`DYU3Z3kcieqv*nh`ec!qs=+>K{&N4}1`@(la(xI53V zKaacg4EyxBThHK*eJywG8TRdQ_nyHW{95kfY4-7PH&3&lkGp!BeSO^B)9ml#E}zDo z{#x$#Y4-bZ*H5$WkGp@G{eR2?(wGTc%WNRcen4ggY4!y&J4mxXkXb^SeS*vu((D&x z){ti3AhU-w`v;jtq}fNvY$DBmLS_|d_7yU_NVC6?Sw@^EfAk!If^vyU|U z51ECe*@wt%B+Y(AW+iF%B{DlnvpAG7Cz#50cqXy8V#Miqh?i zWOkI!4CxwXN$K`UGFwWwUy@lGoMN+e)|Jl37=}eV5F>((S)w7M5-wCbO}0`!N^xdnw(%OlD{4_GdCnOSeyx*;=~& zn#|hL?b~GbmTvzhv$%BoIGN3*+t10YF5SLPW_RiKcQVUMx6hN=Ub_9B%=*&p`(*Z) zZvQ8DA0mGwe@gmYTs#RrWu_epP0z8TPF*dsX*-6|>k3`&gOHW-z0@idk)jeXY!HGwg3= zmYcy$_bO()8TPv}>&>w5mDz8G{jbb|Gwg$9Hk@HUEVJSa`(l|LXV@RhEIGqIS!T-_ z_RBJB&aiKm*>i^dv&^D1?4xBionb#Mv+4}{YMEVU*k8*mJHtL(X4{$e+cN9UwC|SL zcc%Tf%)&G6!(}#}X+JKr@=W`3nVo0apUW&g(>`5h>zVfJGHcJYZTzn58lrhUH5_A~AGW!9f*-!HTOO#6S?1!UR>%x)mleqeS5 znf3*;*N|!7FuR9L`-j;@WZFl}ZX(luVs;go_7$_c$h5zh zT}GyT#_TpS?KfuEk!jyCyN^u!kJ*J}+K0?;B-4Imb|sniC9^xpv_F|$N~V3v>{c@E zS7z6eY2PxtmrVPY*~Mhp$INaf%YJ5dHCgsGv%AT%znNW5mVM6bcCzeuX4jKt-!r?P zEc>6?1!dU>&2A{merR?@S@uP#-HM^`V`>fe*W!Z1dt}DyFYj$5*?7%K(7nWroHoLJb`?1-T zW!aa_?kvmxY<6i`_Gzj>=Lu=6KA)W zWxqJP#%%k>**#|4Kh7>P+dgu3liBu@v#ZRuubkaww*BSoGPCV7XSbPczd5_kZ2QjH zeP-K#&Mq|DK6G}Y+4iHeE6uhqo!x1+{psvdv+Yx7x0-FgI=j|v`_|dLX4}8cE;idf zc6PJb_Or9A&9<+d-EFr0?d)>1+38-&Za3S0cXqwm_Pw+F&9?uYU2wL2@a%@O?T2Sq zoNZq`yW?#8obhdr;?54Brr)O84ZC^dR>ume$ z*=1+jXU}ds+kSg?-P!itv-{4r|DIiVHaqb~?8dY0$7ffbZC^gS^KAR`*`;UOr_XLZ z+kSm^?b-J2vwP3Bf1h1^wtf8U=5y@lXIGzNUq8G19Q*s(<>%Pv&u%}*et&lTIrjat z`_HlepDaL*J^-=-Ir;&}3gqYuAUlwwKY%Pjjy?gh1vz94E+K1>qi=xhL5}_bvIsf) z2*@Vn=qDhnkfX1F>_QG1hKtEEAPbT6w-4b!T8@4M zvJyG^639;E=uaR^k)uz6Y(>uBeuayk&mnVhG1-e8{R?CKL=TzTrxWslHJMG-$9lqSDy#jo?QJNWPNh=eUSah)&D^jC|4f{*`QqgAY_Gd z^@Wff%GDo2mMB-B2-%`s{UT(Ia`lanJ<276bRk)!Tzw>DlXCTwkX6dnS3-6vSAPjv zrd)j{WSesJn~-(N)ptVnDOdjqS*TonC}g8@$w*y5Rw`Ft3fZY#{V8Ora`mZ@t;*G} zLe?r*-wN5QT>UF#v2yjXkj=`~&q7u!S6>U+tz7*rWVv$nxsdJ3)$c;qD_7qO*{@vv zFJ!@T^}&!0%heA$W~u{|s5QTrz3r zlTFLjPeWEMS6>a;wOsu*WZ81{**rbySgw8>vTnKhZpgmn>AxWhm!}VhY+Rmx9I|qG z`f|w5<>}8MOP8llhiqM*ejT!QdHQz9-sO?OJC7`0o<1J3d3pMI$m-?k>mj?Br@x0R zU!Fc6vVD2_eaQOd>H8u3m#6=SEMT5KAhLmZ`hmy_=IIL}JD8_Gh%8~AJ|VJ&dHRLO z8s_O6B72ype~2t%o<1V7iFx{o$SUUPD4Ya+Xur@x6TXP!PMvYmPQoydCT>3bsknWz7WENGrSD6*k>`k}~*=IM(fJDR6I ziY#fKJ}I)LdHSWun&#=7B72%g2K5}WsCoLR$fo9zQ9XyOYM#C-va5OetH`qE>9Zo+ zny252tZSaWE3&V7`me~s=IO&C8=I#ei>z#(zAUn{dHS=+(&p*Y`nl#no_;N|wt4!t z$lm7Z-y(~fr;m$lZd^YXS>3q4F0#9E{as{vU)n zFtWjM{a|E;q{d$9oL^mmO8Fa zjcj#XzZzNVxV|;A*Kz%8WU=G=*vMwb^|O)Hj_Ye9yB*ixMwUCS&y8$%T)!Jx@3_7< zvfpw2Z)Cya`rych$MwUJ6_4wSBRd|~A4irvJ_Mf}+48u4IkM()eRE{b<7Chql0}c} zqa&Lh*H1@QJ+7~g?0Q^(9a;9cK0C7Qas75=-Q)W1$iBz*-;srn>%$`(AJ>mZRz9vT zkL-M0e;!%-xIR6y^>O`rWbNbn_Q>AH_3x3zkL%+jn;+NDM^-l{~L|h*t zY(!i?BCJGQUn1;8Tz?`gMO>dEY(*T#;tW`exV}Z$i@5$pSd6$nM%au{KO?M0sIL)r zBh=pr%Mt2xgzX6RJHmQ|`W|6FLj8}hAfY};*pN^^B&P(LNCN(i&k0CpwRUkS?+>a&Dx3H4jTx`g^JVP8W1 zm#{FQK1|q{P(LQDOsFptb|%!H2}={|(}b-F^=rb~gfKU!!`_7YH(_x?n4HsLb3*-` zusWf>PS~ALel5nxg#8Kif5HNV`aofWLj9nyLZQA;*r8B=C@fK^ zPZYK&)GrEa6v7;x4to^pAB9B<^^w9Rh5AWhl|p@`uuGx-Qdp)?pDAopsNWRUDb#lg z`xL@JodydP>O+N%3iYGHN`){}r@>Bz`cq-4LVc>RRiS=WSgTOqD(qDVgLN7#R;Z5^ zHY?Q63ab_BYlYnkVYp6%W_sb3-!sumWBFdVa-B)v#@8O{#jVGP#-O9TBx5ERxQ+53%eG=u$>Ca7V5KwZ3|)C zPK9*~_1(h0g)nfZ!or36aAD&@{kX7lp}t($x$rmqxv+GhK3&+l5XSBlSi4Z)F6>>X ze-{=n)W-{(7wYGQ)eH6Y!tRCodtv!PeZH`LA&lQCuzsPwU)aA;|1T^c|Go!Kfej4x z1H%f2FoUPS4u<-JVF^Qh!mx#*eqmU{P~R}@VW@u?7BSRE44WA0Cx%rFVHWGdE{6Jx zVHrbx#;}c{eq&h2P~S1^W2pZa7BbX_3>z8hM~0OQ^(DhjhWe9XDMNkAu$7^HWmwBl z-!klFsDBw2Gt|cnn;Gh7hSd!9HN$R(`kP@nLw(M$ogs|p$*`WGzGv9aQ2#S5Xb2N} zGHht59~xFP)E5mq8tRXRB@OjS!&8>cfVO4fSKg%7!qrC&A8!`mf46B4fSus;)eRTVRJ+M+_1W#zHZpvP=7ZpZ>Y~3wl{?FJqgw~)b|bh z8|wdt1rGIr!v=@?!C{3%nBjV`!=e6gSmIEhIBapKUmVsr)He=$9O@s3MGp0m!zPFN z$zhd4edVyrq5g7M=1`wGY;&mJ9M(Df+jqWUf2jW)7CO|24jUcnM~9UT^`*m3hx*fD zsY8A0u+^b{by(|A-#YAd__u%k%fq2QcG&DtKRc{;sIMJ%JJjC}%N@dW*M;p4VZ7_Y zdWZVnVZTHD@37#ZK6u#hP(M7Zc&INPc0AM{4@(~ElZP!2^~=MWhx+DW&qEmWy0GY> zK6=>nP(MAadZ@1+c0JTz56d3vvxjXD_1nX`hx+be-$NMqIK_z*_E4y=3# zGhYXGK7^sK^UH+V5T?EkY<&o0UkBDcgt@N+dmqB!*MY?kVe;$1=7%u)bzt>FnEg7i z`ymW}9a#PlroRqse+c7W2i8A?`L9!3TN}dv|NVc{2~g{QPDenk|9v_GYW?5SAyDf- zk4}MF|M_$b)cWtEbD-9LKOF?M{(0ymsP)fBM?tNBUOEeE{qxgdQ0w1^PJ>$iesmnv z`uC;tpw_=X9SF7lJm^HI_2)xJLaje9IumOB`O%?J>(7%;g%kdK=~y`7&zsJL6aM_^ zU^wCLgHDDM{(k6aIN|S$&W02I{^)Qx;qQ}9hZFvO>3BHd@0-qt6aN0`fH>jjfli1M zem>}kIN|4o&WIC!e&~=m;pd4?i4%Ul=$JSG`ybLdal+3Z9TX@0Jkm)~A0xz^G@eQ4eWnN2S$zG2Rboo{C?1pQRDZ8&WswrKXho+ z_NqsH$S9UC=%-{{<^@%u*yM~&Y{Iyq|me$vrVSGeWuf+#_u;B zAIJT^)A@1S?>`+N$9*2q33A-$105m9eO}NRa@^+!9U{klo;=v=o#Q@V=omTf^M=lm z<34}rAUW>yh)$B@KA-3)Iqvg{&XVIkzvwVI?(>XJljA<$=r}p<^N!Aw<39iBKsoO7 zkWQ52J|F2wIp*_{&Xi+5Kj~08=JS+Jm190%=~y}D^EUPA-;VkGrGw>|&tp1Sj`@71 zqve>-YdTww`TVBC<(SWNI$e(We5d2(n9qAUUyk|wrvv7g?*lqvj`@C|Bj%Xz3p!(t z`Tn3o=9upjI%SUeetGWc+M~X2=$tv~`-cviqrQ*mq&e#QiH@41zOU%4IqLh14x6LC z&*-!{>idn3o1?z(=)5`V`;QKsqrMO6#5wBwk&c|BzAyjz$Ka#BKk3jp>id*Vouj^A z8{O6PsP9`kcaHl0rGw|F?_)Z7j{1J4qlaMG|3W%@j`;qj!{>+ap`+-C=M_4Oj(C2d!{~_T89I%Qc)p?I=!oYXI*$%}{-Fcuu;(Ez3%S=P5ds4tu_$W9hKxEjpJDd;X$>>9FT9I++f8KBJ@Qu;(>8 zn+|(^qr>U2=Q%o^4tu_%agcQI-w4GKBOb+u;)cOqYit1q(kbE z=Se!H4tc($W9pFSO**FzdH$q>>X7GAI;jqMKBc4Tkmpr8s}6a7rNiow=UFyYPRI~%4tc(&W9yLTZ92CO zdH$w@>!9axI=K#dKBuGWpyzcuyAFDOr^D-@=XpB44tl<)8QlKcFM*p!Wqj!w!0XphN7S_X#@14tl?!W9*>!4LZjTdjFtL#C)@$=hjhg4_r6GH+t@1Jzg?e{)PC*6MUr*zcq_r6MJ-G1+{blC0pK1-+Fe($$*-0kp1XW?Gw z7kgLl+Uq=nPQ$&%4=`!@bTw=s?`-JcLffz0ODINZjkZgwDjh&QIu2-0M7r zPQ|^>SLj&W>%4`|#l6m7=wRIIJcdrjz0POoXx!_(hR(*l&Tr^&-0M7tPRG5@cj$QB z>%51~$Gy&f=z!egJcv%nJ?Ndz@d+PtsAk%XuZ8rMsM8(qX#Gc_y8v zyPR**ak|TSC!MFeoPW}Ry32Veov6EUlc`}`{JDo4nF}u@wGo7Qc{ZK4JDqRSal6xbH=VaToqyATyVH3%owz%lkJFL6(|I|a zxjUVo)1kY=c{-iCJDji6vAe^0JDs~boWIk-yTf@roxD4o&(qPn!+AZOy*r%W)8V_r zc|M)KJDl&+@w>x$Kb^ljod44Syu*C}oxnTX56}_3!+imr!8_a^&>_6TeFB}rJKQhO zF}%Zl1D(S=+&|Dkyu*D2oy6PSPtZ}k-F*d}#oOIq&|$pYeFmMz+ud)_alGAq2c5^; z-G9)5yxo1s!u{`UcRxZ$@^<$nbS7_ie?o`ycK0cCDsOkcLdWuU_bqfTZ+HJf2lICK zF?2F-cRxc%^LF<&bT)5ye?y1!cK11SI&XKsL&x)W_dRqzZ*%`c2lO`gL3BcIb3a5! z^fvcJbVhG;e?*7$Hup(%N^f(&M91_t_f2$8Z*%`d2lY1hQFKyob3a8#^)~labXIS3 ze|5)KL$jU`!zbYx4Lhmb9<}%H#)etx{srid#n37I=Z*IucNbjtNS}Tytlf~qtkn<`#n0o zx4Q46^LwlNKRUp-x(}oie5?CGI>NWQFQhYktNTMb#J9Rnq*HvW`$am&x4Lhnb9}4& zM>@#2x{suje5?COI?A`WucWhli~CDD%(uADq|l^UpnA7yAP%lezW^wI^s9GFQzkov-@K@ zBQgcew>c{&F;(T%-`((oDTiX?$hbi-|T*!j{QyU z+v(ijA%VSJ{|v?-1pP@zsdbS z4uDPO0dN9rG9Q2=V3TQkz@f0wJOxgLjpi$GENnDyfpcM_`3oEj8_i?jWY}mv14qL~^BOoCHk#kS;jqy> z2Tq5L<~wjaY&7qI^I@a;4;&C1&4b{C*l0ckN5ls6A~+*9m>>E5&9xiMli-xtV7>&$ z#0K*wI43rkKfytCJPb~Z4d!ETWNa`mbJ@ZBHkhBmp|Qa{4Ni>>=4)_lY%p(wb7O<~8yp<#&Ew$Y zSZ_WDN5^{eIygJlo8Q6VvEDonPLK8GdvJWLH}8Y1K|W&Z$1b|$a?ca zI78N(AHpHB-aHXbk@e<_aEz=sZ*=NEdaXBqgo9+gc_f@9>&++OC|Pe_31`WA^Glnz zUb@~q6Hb%$=9_SwtT*q3^JJa*Cmbm2%tPTsS!X^9N6I?$QaDrAnV-U;vd%mePL*}$ zt8lEWGjD}+Wu5se94zb1W8q|3XFdx@%R2K~I9t}4-@@Ut&O8@Rmv!d5aJ;ND?}hVa zo%t^uFzd{N;e=UdJ`6|9I`d*UW7e4;!y&WIJQ+@zb>_u_v)23@4xF{-;c()tH6Mo~XRUcT zoH=XF&*9KnYn~3L&RX+zICj>Wx5K%!*8Cj~p0(!jaPq7*pNFGot$971J!{SH;qX~& zo)4$b8uNWPe%6@x3x8g<#{3@+pf%maH7}4y#7VTqd?JpbHRcs@7OgSAh{I@&c}AQ@Ys@#|I9g-g5$Dkw z^N%=?)|iLHiL}OiB#xvt<|T0^tua4|Lus{nN}Nio%~y8bxn{L_OPouq&0peRT5TQ^ zC(~;4nK+tOo7cqIwA%b84yV=TIdM9zHs6WkX|;JzoKLIGf8u~zZ5|XS)N1pgIHFdY z7sVO1+WaUEsnzC5aZ0T=Uy5UDwRuyVQ>)FN;-Fe>9u+6mYV)Z$s#cp<#aXq={3;Hs zRpwc7TCFnQisNdPc~_iQtIWURz*=P<7AMv!^RYOxR+*Q@nYGINEDo(z=4o+itukMW zV{4UpTbx^~%-`bRT4f#=C)X&1d6iTWMY!XWI(%+c?}- znCHgnw!(Zjj<*%&z1KIbTw(qj2iywt;5gw{m=DJhx5B(Q&bSrk$8pH5Fi(zCZiV@B z9CItoo8z2YVg4Kk-3s&QIO$fHPsdTW!n``px)tWvaoDXe&yLe>h52?IcPq@hG&G+N@TW;PT=ihSk|2P1b%LCv9TrMAgBXGIA z0M5YW@&h;om&+626kIM}fMamEyaCR^%B)$wS~oTqYlZBXOC$1kS`|@)I}|m&sG$R9q%sfn#x* zyamq1W%3s|7?;Uo;AC7TpMj%snY;$h#%1ywI2@PBbKrDbCf|YMahbda&c|i)A2=YF z$%Ej8TqYlaBXXI%2+qi5@*_ATm&%jilw2xbf@5;2ya~?9rSc~@D3{8k;G|qCpMs-u zsk{o#%BAuvI4qaSv*5H`D&KpOXQJok}i=?!cn?JUI}OE68R+@rc30RcJ&#uM7{~f=@NM-oTp3VpKzcqk%z*G zx|%K^oUn`K!*IkdmKVbryI6h3wu|N2aM~`GZ^LoB zSl$ii?PB>i9Jq_+;c((El8?iYyGULRXYL~TIUKr+9Keg@0dWE^k`KfY zyhvUUXYeBVK^(%1R`ix~KbED>S||^R6M3P0B#z{T@{%}{7s^lKP+llciBox@ zd?k+Mh4Pj-mlw)k;$U7VkBO6cp?oHe=7sW_IGY#BZ{l!XD9?%0d7*qKj^~B)o;aTu z%75a3UMLTW6MCV1==w2NEtD6<8NE<`6o>Rec~YFx3*}33OfQf(#W}q|{xlKaxIi8i zC-nmPR2uod@qpq#reHJ{uc-M0(oGZ;Pd5!afHv87seSrUw#;e_K+-W%upJo#@N@bl!sal+4&562NdPhK2n{5<(_ z9P;zz$#KfhlP||HKTqBq=lneRa~$;Z!_l;;mQDldms6 zaPhpqdHZ^2&y&ADbj~UB=7U(dBKp!}MT=Gq@{L%X-;+9%L*;>&aG z7r64}r{~%?@Y}Bs&$WNxk_{Pi?IXDV+^KWzCukImooipg?^A}%wZEY8`@QGdXV7V0 z=ehP9++LzGbmW$`wpHMO3thx3n zT>Mr2x%MkG*>!x5eG4`B?4M)*!kgLK=GezjlfQP3{R}rYTsp_ThD!&`nPY#${7*{f z*yqsq;9qm>cX+@3|K`~D@WY$m%(4IBrClG-u@BCU)RmC|Dx4hm(Q^esj9Z0qvqt2YWq5# zf9B6>`#biW`%|@j9yh%8b+!E-ciixCHSGVyGroVj+WwE&RNFst!;$XQ_L1~`y+gJABtsr( zQEgwzgUg#%+h4Nh;XA7BGl@58Qf6d?K`<9`=V<5Pae48tZMsEZk}Ji+J2P% zkJVJ!m-5=Z2deB(xp2$&D*IF>zq`K5ew7dUEU&U}<-cdmud;vTjj~x)_OT3oqM+*U zewMbsRoT~)SO5De*#G3kC0|t8=W@<-A6D7#a(&M?tL%HZ_|liF?0?z3?&&J~U|#$0 zBUSdpT$h(sWnaucyG*aLKW4=h$yN5roVI6pmHjg37x%BSZ|20?-K*@MDNpNAWgksO z_ZC(5)6~E1{wn)wW}I`-tj4AI!F&XwWB3XWLiwcH)lN_7|0{Y%<$EqqQ|x&9>iY^Ocv(w(n?3 z%X4PifAsU%(`Li|k9++2Ila^H4 zw^aS^oJ#wbuAWy`X&=+@)AK9sXL_mSua)*SeVg-LrTtCO|GucS&nf@Fhn4m_{c!JF zmG(Wop7F0r`=2KN_H3nnQ2$r=@k-eLaXUNYR@xW!=F2lG?T>n3<)ljcq-NbRrqX_? z?m0s$?VBpE=u>I`RMV@ID($0sBduMf{ZzXuVwLt)HM^l{rTtYokK9pdpVhZ3n^f9w zwY>S&mG)hoc=wV@`>!slcW$M9Sl5p`z0!WHTV~g-v@h$XrbjF6&${Bny%qLpH8^`) zh5cH)^43+@w^gxoS%v*uAC8z`VISA@g%uU{b2aN)RAFD&@uEK}?C<)y#ZMLXc}@A_ zn+p5Au6*dz3j4mwe}AvS{;z4l>lOBaomco$h5cav?euhoePJEvJyKzR*vcW<750fu z+nQ2gzgTVN#0uE|G0&bpy2Adk3*H`FVISFBclN2UpX}HOqds=E34w_O+ECs-9(k z+raP2X4&Vqb4va!``!L=+i$b%d%Jq)_p|JO`|I1UX4wZfD(&N0_QRd=(7Utji~Hr| z*Ji=~kDgfd;w<~*u6_HdS+M`3*Gzb1mVI*{KbSqs{<&#qrOvXCuI0Lkv+Sp9^y}zZ z_SGGJdB`mL>sC$fJIg-1%1+&8*>6{PQ-@iw|Dy{Uw47!CUHOg&X4!|gbne}=VE;$& z|K*lh_T^plpX+AXpV#_@D`wfJmz8tTEZF~1zfL%NmVJBm2cI?z_J7o%Zgpqb$M<`i zqviJV-T2VHa{Kz;zju4N{e9QowV~WTzwd8fS#G~yx7!z$+xK_)j_Pvz|Gv4WtlU1p z=?~^wvMi z?IV1A<}>B?6PA}fR&HP6)$4Q1?JsF~imDxAB;;g^Q z?4L{-^K+Sflvn;av&??Vb(efuW?$uBX&;r@U-`rQcgpOu%)j@wGW#vJy#7*|eU~?# zc)HB~%SXpNR%RdOf!Vob_G3QQEWOOW%$q-(T4sOd_KTCt?9(iJdSsdXnu(f0W%g~( zPwi7?|K>^ClgjMl>^inXnf;tUtZi9lUuV-150=^Axp2+@mD%U{^61;k?Dw3wrAe86 zpChL=F0=nL{m7+d_JMx(_yuM5gC08ftTOvT$9`~Xnf;-A@2*>BpXj^AM@#J&9Y1(~ zsePk8_wOjRe{|3bn@a5?ef;J%rS_9nmM$%|uk^m;`K9)kMrX_}wa;|ow{FG%WCYCr5JSG6g%FLv0z=B4(>#>$$O+9%uk zgS$%Ymz|b#OR0Uc1^uoswSTtxeOHy*N4x5xMy2-CetzV#Gv`d#4Qf zq{Keoe#!5b*zY?jfWlve&cf=d8ov`r3oQp8e`o zCH5!pnBSjw|?cuCyVX7Zua3L#jyW_FS#BaVC*L`ndvHjV9UOTqfKJ6dB7+!3@_WFAU72CJn<*z=)_HXa#(!JO|?vmx5itXoK zHl=N`ecd;m)S}q_?wM~iEB>55@6@~REw|*=G%Q`eDwqN}H11A^TH~#%cwMF)ipVaqgk$vPZ zo_?Une)9f*?JBabd}zkjBKylfxNAd^edgEfTvcSh`I@hm7TI^cV)B9_`_C`AtGdWO z^p_5n7uk>A{?DQ!`_h{~6&2Z^p3?ibBKy=gUh`9t{pxS*`?kow_2-JeEV6(7&$m7) zg8d(OXX*z<_Oq|+@^+DZ?F(*vt;qiN(@uT42=;$q?xyF8?03Jb{K+Ew-f#Htqeb?= z4|z4O$UgXmVP=v2@GnhFEwV5ExdBs(?2j++m|SF^e5Z#-7uhf0@UCG+_RXJn>O z=La_KQv~}zV8i9zi|nWW;nL1U_SF|(+OEj{`pd3pS!AF64~-uxvfuunH#RM@@BaI{ z?k=+b{*vam6~X=wDCl%!k^T5I!57(=zj4x)MfT?pd!$j3efn3tenFA_`i*CvU1Z<> z#EJ$*_U|9tQoqPP{_4}~7TM3g{g&f}_Vp)qKU8Rc|Dp7~h4%SxdT&Re{r*?Z+FWSg z|J#Sx725wl^2Sw#`T(X5Tw16fpx}iCh57=97gZPP4`_R0R-rzDlm|)*VgLJYPR}pY zH}J_%e-!E;`1W6rDPK!c)5pVQ(s8D~znt4qN^+{y(zo$^Y z#Nbu87wVgMas17N`X|oWe|@1oiq(%aF4Rv^d+rs5`YI-WbV;H9id!DIpirMh)9SMe z^;^7>d`6+Zix%}yE!2PU(0}R`>ce=d^@#%g7}sq)QlKy6oM#Ud!2b75x_eK7K8@we zwioEv`0dHf1^PC&-n+g)|Hh<^s|xgS#NJp|pr2!8(xQT2@pUY&Kd(T4$NPWHF3{)k zYfgEAevccP6&L9H*l;vap#S6GAAc0+0~z?(F9rHR&h7kT0qlRD%PyQ*pg$yY%~u8b zL~i`{vjY7hw?6VwfxeN)d%s_xf8>sv-!9Nca!0+_3-psby8K@S`buv8<;4R1B~4y` zwm_drX4aDh`c1AJ@>qeslSZw>0{tfwZpkUohjR8s83nNay&IgATA(jw(B3Hp`cvwz zpHQGrrDoCC0{tr8XOAp^{qKFacxZwCl|zYv1+f3UyZ+U;KtIcoKYJGFYdIbz73gp2 zThysQpUbHg?F#g}oU@=+fxee%t78TFUz+S}R-g~2>52Oa^uxS+&OHVCVuoISM*-}A zue675DbOdgp-+ZX-pLcPAewq%4&o9tdGyAG@ z3iQ`}-SNx^59ss7f8^^28hqcc`TBw; zz4}u=?0?V2hri3$C-mWv|K{r#Dl7alU*AyI+ds?KKXm(>ALZ*Knta*^`TB_(WWAHG zuc-d^H}drt4H@xjzCNQ1mb{#=-{_`ZFXrnzdb{e`eEmmLlAg-fhxA_6Yx=(hH|e%h$iu|IJDH`j{TOJvm=L(^*Ah z^7Sw_A4eNw)Ds2#IA zc$^$$k%VxIp^AZeOJ}3ug=$h_48R*v>MTKCOl~HO$wq)uCR4e0^IRSDccse{1t^C*|woN_x9a zzJ9KY!fo+m_G=_Rj;G z68gd7+tw%ag;lRxlh7abY|p&$ zK|()U!?Jf1`r3{heJi2At;-#6Bw+uOP8s`ZLciNh@BJ&G@9l@BFD3N9eR|0Y34L%U z4R|)8AFlYVrxN<&_O1R$LVw&-H$Ikt{qOpZl!p`g<+lHsm(Vx&Tf>|L?0?t&Lo*Zl z=wAIUEuo+8gVRzI`sywmF)g9LZr^W{6Z-6$HJX^vZ?`RTd_vz{{bgek`tP0zMkVy& zWqvX|p&xI~*+Uch@?Oaql+d4-*wR0tPp|*Lz6t$$11oza^z9Y5>XFdD_s*|L34MI4 z{;x{{_P@)sGYS6V>-*20?GyU@uK%u0LZ9FH_q9sE{&$)5dyvrgcW2w?3H^V=tD7bC z0UjH2e?mWCy`A?a^aZ9pd{07uV6O}BO6U`O=d0Tj`UQKnyEUP2Fn#S!3H^g7Khh+j zkFd7!^$GoiV~egy=qr3+;?)WLg<0ocnb2o=!=INWVE;P@6B{M;9Ts1DaYFy$FBKOg z^dUBS0L+&PeD}TruJF1nht3VYi%`(6`ua=gA5Ei(h?T zFQJbyBd1P6KjXJ;Pel3}`<-_@(%(37&5=l-b#(jGt zeURgJ@M+s2=>3zw!HO`zR5qwt&Q|g*6qDI z(ntAStCf*{%DML}kMvcJY_c@cUpeB6#S!d(r>YAVM*1zkK4*TU@A7EFxsm?MpBh$2 z`Y_j>Jv-8m8D3Bk>C1fPvhqlO<|)^gM*1}O-dP;!*X$Y;M*21zb)J z>t_8K>F2!SpT9@?I=}ex*GPZor=>qf`aCb({8OagbKmJdM*2Qm-Tr-~|Fd47nUOxw zd*c6%^n=d-{Od?x=*C4~M*2f1oc2YePju*mpGEpb3#WY&!TxuA>$8s{{iEyFei-Q^ zednqVBK@SLL*I+^m5zD;oe1{7L+bjsB7LU&ZhkY;Z@ND9^+?}ohreEpVE;Q@(eU4q zKGe}e{uSv*z2e({MzH@KI@EtD(x19v@C%VX)dN307wK0`KmXZC-|B>vrz8EV)$^W= z^s#>4^odA6>;88hkMy;EcgkZC?0<)~(;tcSx&C8S80mL?t6MzM_j+x9ZlwS9%BDGy zKG^5J$%^#DPPs8N(ifZmQF^35_UUWWB7L$2AEie6WvAbm66u?L`I~8x{@ELvPL1@@ z-kv`>(og$Yw@Hz{+SgW1i1gPUnVuZ!vz>j)_z3pD{Uz^?jr85lZ#pJ|{cm4?{-{VF z?iVQ|BmKDf=Z}c= zb{~AvHPR1!BBe{DFSx3C=SY9>MQ3!1^a;;d+9A>}T=(ntk-p(i9%&cB{ zce}eyq@TFgS*;`3|F#v|TSoeef30j0=`+4!W)SH&KKN=Z(s$e@Y#!-9K6S!Fkv`<0 z--D5Uw{^`1=K#_O1ZFc2-k-p`7F1zx?4P{}<_F zexlJmk$&dYm){-fYyS3{yCVI~2X4MI(&s$$-a8`L|2At|-5%+Ce!Ayv5$u1PPe$Jw z!Tz^-AnTS$KXj{?ZjSUtCqBO^(jWa((T$Nl>Bj4uMEa%c)o&8%n;vlE4UzuoCP~*v z`lu(QUl-}8zV3r-BYoAqXI~S+{T&+eaW4TBmLH2j=nn5cm3mAS4H}-?_F?Z zq!0U+bFYl_W53buib!8}?n{?P`m-0#yDZYD{b{4iBK_JsM_d}|+y3gSMv?yQHAgOq z^l?Ae@sdbC_cw1{9O>(Bzx$#{e|Nw37e)HKSG<2=1pD85>G2C9ecwrgE{ODhKk)nc zkv{OZt~x)`4?g1`=S8sptqOLW8|e>!rvJH-KJk*Gb0YoXx%ZwE=^Ov-)3YP}7`pFNRc~+#ayymHfk^b`BQyWJ5%u}8^GlKnZwfc-RBYo$E|2!koe}46) zXGHqY_kGkL(vRN!?go**^xDMfk^c1id!HWZQ{TM#v`D}D*$0AG%(P@$X^}-)d zjr6hi?0ssapS|yaQzCus^IktC(%)VjJ0*hsZ+X|I`Vs7Z%L`tvAL)Ca64a0MzX!Wc zj`YDl^})%Je)tZ3Pmccf#Wy@T(jR|E$w`qu`M!^x6zP}W-}0nL-+Y6UPKxx;zgAo? z(ntUHbM+$q^o{z|i}ckuyt-bbzdmzE-AJGP;6Lg{`t5&uv2LXA{^`+mBiR2I^B$}l z!Tz^+<-)qr|Ficc@KsdT|1)pqB`*sh><9>t9R#uw*_9UvVUaaKL`6d&fq(%*5>`=A z0e1yOMWIIP+LoWCZnah`Rjbx&i`A-stF8WOtD>dg(#B%z|NA|2?!3t(Dk{acKkg?p z-+RtI_uOUf+?hG=+#9U@kNtALwF_(iW9RO+c46&*?2aE;yRh~@Huf587uNpAO3$`- zVeNlx?_6sa*8aynnr!XD+W%PH2x}MC{>K*fw{~Ief9&PX)-J65k3HPV+J&|Mu?}h0 zF0B2J{l&F*VeNlxgl+Ab?pRic8vt0Y-Nv>o`#n&%38V2TWG6l7T9(rm?9j2pdA1{E z5DtaH=Q80UoI?GkGa;0GB@&!%jE|hhvm3sRG7DH*!AjvIpTo?NZ~^m0lHWj*>xLIB zu7h;)qoAAyp4#L<+PRv!yN+ixhtdA0GrFD80gF6!L#W4&%p^qI0+!^u0r6r z>>nT=agRfeh&u}Bl-t2b&2%r1Tn;MjN0hoULT0GDl{SS6Hc3*byPGzgshcC{d89_t z${^)lrNZe@cr_JLck(VuUL6^Wcxrq1sYpA}X+5d!>BvK>d>oqK{vsm%4CRBU?HMJ* zX}@CXvnm`(D`Dy{BZHtY)IB|I3HAR<$;`Am3h$OuLfu=VCdVQ@Wh-majFQhqZbdxe zb_0=aXG7XvlquZ_wN@t580>E&xmk&2FV4(jF0eCLXM0H|>zo8$1}kk>3*DQv#q^~@ zcSKV2zaW!cm&q&D97$Ft6^FA}AKT7cOd?weriXKsSkIJPC5oXboTmgU6&|QWcM|zZ ze3xR!D{&QxK_1b9*Pss=EuVziPrF#Hih%ZzVPM%|oX|P#0IespS`#BIFUYs-7Ix2! zR%uQ~$BdJcTG+*QW)k|nhn1FgBA6JqZ7nBbSlaNk@vYEL%8#G|uAP>A|VvsI<8`5 zIvEmpO+(f>yzJHpFCHPDsC?oq&E?+w;77>0nbt*L|)ak$n8_SAaDW_k&P zGyMd{D!l{(8|>v^Y^9e#IM+{L>-?oYgC*q)nV(Fr(UIKv~ z<0UXQ8wYX_Ocxc`Ggj>-5ZEzZ4#qZm34|?v0%O~~1cK?J;(Eq*cnJj4MaA`uJ>(@2 zOcxc`Gxm&^KrmfYT+bMrjp`!ihdjh=tAubO4py{8+Ds`V5ZF>Lfw4JW0>QMoMA}^A zB@ozBF9%~6c?ks5=8}5GZuAlerp+bN=DWNEf@yP!wD~7q0>QMoMB4mIFM(j%ToPz= z3HW{(f>_APsVAO@1GfcXrm~4=dTav6Kc&rm0O`eGtyDJgTpVB%u243SO$3|3kxwP& z4gi}izE{~qHWX|EM?Iy@=m(pveL>koHWF;YtI8&NSC|7;LMNO#-gz}lphz$T=~E#b zvUYO%un%N3!_&{EG>1)AR(4_8@`~)S6^kos%IYf0vqw)V8DCObSTZ$xdQI8l+IdTA z78Na9JhyJalEt;w++nlIE0)hHN0tE#$}0xsXXR(*4H%R^XF=Vpin&z_s%tA|mDMa7 zFn{jc0r^8Ex_HUriUAd6a~8~6uy}6Ovhs>qi^}F!E?8V~Sd>|#hh?8!TTxS+eb$1C z+S)}6=4KZznY(OJ#p1f!>^Wt%6;&vyHhcPnlS|8L%9kxzyri^h!JN{(+??FJ+|u0a zc`GEX=#=c@vhuQ;(vrNf6HBKqtE#OiFD+bBU0qdC!wjF-mDbkP zESp=$403J5a-E(1QM+A7r*+h+%j({}yHgj%DJA-F*DhV1g;8gh6?KY7IPK0SJ;S3H zjUZ9%5vK|<&zJ0;m5sy+KHXf>&-Cb}LQM9E3L#GOh%dL7lcw1Ig|adY#Apc1IVz&uo9 z^srenN@kf+GRq$&v;0vq>$675ta&RWt>~0lpF2usmDH6j#waSc#!fytIy#!4H8g8r zG%qJNKQ}jbXtYmFMO6icWZ&rN=#=b=MRO|3%PYzU4>=<`V9~s)C1rI3aQ~c8yJTM7ylSxKRxdkY?vk3iij@NvRoyz1ro18S=W zl;;itr>=6@qB+q4^K)^OuPCdTHy|%MU1A`ODlBQIKMwE@Lvt+-r#frd;@SoC7gv-==T?^0_+w*~jE$-#i|0pu z0eTv7vMl7DRqJcXCsO49eHOmP=-C$=U_0D>yd> z^s{_(?^|-U{mU@9VDk9MMe!z=oIHB;n358`+|20BIJtv3VnF*5=`g82r6i&~9voKe zvxA5Bokp1x#BRc#ax#VD#49iz8!bZX6#xwuo7)YSGp40pYi zj;AyBQ~cDnLTfV8n_24uPj)`oM`c7}>qD^(_N>&{&ti|qGOU8MDXED3Orm3(j82Gi z1JR~s1KiP`R;z$UfigbGExSLW;nCg({$dp+_ zw3JuOSvDWj|GXtAK;mU{=3sX9%J4W!vBThLJ3h@p*(=-Z9lg1B~VEsmPvaQ*u1nb9oQ6KSq93~H<)^^yK+6EXV zx+OvG?yznB!&EAewh8fIx!YlPnu?3aa?@~_a&HObLDc$ws%=FX(O}BuH*8Sfdp&Hi zU{N0oIljL85jS}dwSEPCnT%*KX?KGT>iZ<1uQ}38{hmVHlW1aOoyh&AH*63Qx2J~wg1y#qT|=X<2sFM!t#P8l6Ivp;yPTb zJ%~4bhUrbCFGB$M{$#GG{92p^TmSd&H2}$Rj5)Y1y^dQZV8V`noP^doR_k~oVh*m5nSVL=wM7362uM)xm;`!O0?qly1j=7x2q5X366hZ$ z(9b5&@oVAb|HP!Pt$o(3B0s2_c(cUIT@ze+ zuWW*kFT*Cdd>e0q-SmeYUxk|x&gBP%c{z~x07J+pr8lNSnD{v_(1gr+B!t1fkBCX( zLn3a{1|kLl`#D5Q3&ug{SlnyG&UkhZyYROQVAOj~hcF?hQ@*7)PY^lsh@5XixbQuR zm_+#eBtKX2L`9A(@+T;sqR8<@{sKi>sYsu#$mba8ixsa^+^%?s;@yf5D?Y9GoZ`!h zoQJ9JPm0nnp#QG4^ato9wjU_{0K_ybG^RVjE{gpWrzy@>T%vfc;`NGmDL$7{T1idhq8M;vmIQ#IR)*DNZ0}Sn@0*&QZBV%CAxS9Hq}!`f{bOQuUopWcPj2s zyjSr7#a)VzD?X#RTk&PZR~6q>d|Pp!;)jZIAESJ^kAclOj(~Wa3m&W3Rk4p^e?|G( z6Y|59E>Ik!I7P8U@ifIV6)P316l)b%D4wUdLGd!hO^P=t-l%w+;&&A9QT(CePZS?j zl=}(w->vjZigJH}|3{_YQQW8ap(1~JWq+kAwoq)N$e&`F-cK=4QSM9dV@ek)o}@TM zQH<4)<2xtylq*&$%6$s{a;4>d1$~~C9$ zd`9s_#a9&HQ2e9fUlc!3{JWyu_s|>ReGN=k{f#Q9N4=L_ad|L6Bioa3(e~N!l zd`oe!;`@r9C~^X1yZBQ*v6W&+#V(4y6pvHPQyiptf}(hfK+kxkCn-)>6!#CL&sMrz z@hrt9iYpY)Ry<#Eqv92cS1Dev_$|fT6u+amQ}JHKhZJ`yKB@Q%#pe}YQv99b|0?cL z+^a~tLMT1{`~WHaiDW@}?xNkTN#oRB`F!URW9HJ_Wvs2fOnONlg<^*L3w$+EP5q?;Y_bP;NzCa(mgSWQ^yt8l0 z1v~Bi>k6BF%id&>P^;^JwMH`hgzG83rh-fc3WHR?bd!bC4K8%`y&|}3)8pW zTxji&L~bdXvd>CCy}_MQ+>mY+9p=3!MF-mbwa03tg9i7yo1)sQs%t_C+2+3!Z~+V5t(_ME*nef!RjL(!cd;{*2kZ5_H6THQ|1 zymZ~u>%hrGO3s{hX@#d}c3=i)PSK}-`{$>7D*G+?pGx~0Ysbqxmw<7o50{d>X?sThLLumLVqZ*#` za?gw4`pfljZNB^1-^CSc?0g`p_)U>R%5pHKEXVkB%|i}{E=Nw^N#Mh^i|1EN=4Oso9QP3m&|@Ao6RZg}Pgj9^i%VR);S)(vgbq zQ8FA^&syB8!jVWFQ}2t&t9keI$WZ3JU&+kKWla5{ltPcKBo}sPD`ho>9-y8FA{!A; zr4b{vC&^|FoUtI%mQ?4GLk8k`CZ67gQ_XwAw^C)^e?YTc;%9pxkj;+|v_f9oQ}Ljx z*pK2v@2d(vm%WnT52*0sUbYW4o6TzM(rhkT;$_WXFCck4$mV~=$zCtxV6)ZyOi~+|HMH5y zgkAqa#yQAa@a@gMC>{CUBFUFMkK~=z;zeq`m}>G!I!qPvWRgQjUc%IsByF5L@;<~e zs|#~2`!c5Tw{4JlN*)WcWhPGi0-lV+{yx1eThagTF&wSB;l#JB)<&SsFi^a($jAXX z1Ci61@xgt}xD+h9*0riYu6AFcF9m&!T<+t94sEuM zk(Tw7?6}|^aKQ%%u>-Ol<%(z7yyVZ2mP_u@e0As~*F0Nv*~OjYk}FlxQLcE7q;){Q zb(Bl)(PKy-KvV5pNxvQRvAoKi(b{fo`4syaJV4|!KgUkzWquQp)+*gM-33V3<9JDrVa)(b28Cfw!7D+ahu~ za~g>@S>WuDoSiuVRuxId|oyvQ*J5st% z#GN#als&UsH^6u>UxJ42_O#F{oTrACqs#e@#VP4iO<5@^NDrOkhL#bmP#xqZLXPuI zZ)l;0Msh2BxgImMB+As8Qt%KdM7|Uk4en{bhT_8OBeva()$YZn^tv6{*eRS(yo zFKd$VWlat`u|^s@u^KRH;C#u$3!nTBo5uXiRI9ubj3)Sxjku zh2V+Xs6y=AW@+XS|N4I?HF$)E7U1KLipG~nc_j*Imp0>)&A1fMFXuv?yg#t zc15>~&$rR2T=DYle#!axSvz&}D9H6N2^b~8R?#iES6FgtGK=Z0tuG1s86X1S3#f55f<; z=ipmOFajmM0QD{ufoTNZ{!$)L0v~wt?6OWK%)=43mRYf$^^9)BVOxIX&2z-IX3RlK zxuj0TSwa+N7Kh3ba5Lj)ni{w^ck^r0%@-+&i_|tLl4Nb3p48oyjwwPm$2!}sXGESR z*69RRPxwFy)SrbTnVG9mFbS3vA>$k?shj942FI~ht*K|kYyGJNPapV*OEC3CWh_=E z$j<|jLjJj!+&a~h%nz_2O_GJD;Q|lr0ZGb{!D8F-LVMg*RyS0w6KdFLNGGWiFH=B( zsSu(7G%%4h4G1*WfHVmcaGrw$Ly^D>680_#ViG7Z4+pL>fm%ai;YS1^FgQF$;9bW$ zImlv8TiyhPI|FC$I?XWGDP*lO8Kld-9KI6M{Q)IpeU1_)RpP*4G>Xak{038kE&YrJ zGjqbI2B*KXBBeu}BN@WGbAx)kEDtyu)GT2fq(-nDU97 zpvWh3l1seJcm*-I2)qvHZ~}9BcN}BvU&s)sA~0-0SzU!SjX+`BI+eh|f?J2+fAA`Yn=EwM= zZCsuC@x_EmT}Ga>!M2^u5l(fMlbO{iuXm2KBHF2|lODA~uH$6BkB=ip9!Z~o-y|7( zrZ!7?=ci8)&af~zB$@84y(al}5yPed<88#vW z_aNKU?Rz0R%Sp@X?X;NZhMf8|)WP|49m;p!NFCv zNy+N!jE*+a^{i!&I<|99XLU5%yFA=O>DD6SvTXc+cZMO z3yp$na&<|~+`Pt)@4mP4L5|>F4|yKnx+KDLdzXa`;^C}L?2Y<}WqAG9m|fsG+JA5+TTSA%p2NX&qW|w*siCVUOsB||D8Q9C*u!7CDd0a} zJ<1y?@%1x)pEtVgC+?NS``7p5H|qp=6XePToyb~v16NiA)Kt`Bq12K0 zviE#xf`0b-fwuv^42;U?5nG=U+YpIuOpaZc6uT%KyV#9g;>0cu#jdamGIByQGI~Ic zhY5VS7?sf}wmvzwAt|;o9J|nsUF5_rW{#kKzI=R^Tv0}!lGIp6r%`EVWbgy$Nci6S ze)owJL1KbGMK|HD&nth_|6YayEO-)nY2g|K(9rsN~lAm@9;*Ip-Yb^>M^}*fKZ^wg(2ld?oeNpgCFln4mg8E*CK7P(o zU(o;l8PFyVqSj;3S7ZiHAnhr{gZk13;s+q`s1I(Ye*IoXocdT6LkfgC@gito8jn9H z8o8dBc=)rt2}W)o7>t{+6>@hP0%%loTn6jc1NAfQrEjbm2me4E&8r4Th{4x(upxk^ zEVe1o4b}?CVJU$hOq3WHM%F{!EbAsPJAmI72g}XG!MX+Y&FbO(f(o_-qtDO=gZ#tc zf6uzagXukw~dN+xY!OY*MMXnQ~B4 zDk?dS*v=9oJo)Tt`cdIe{JJ?l>EF#BAo4y8;l}PsL`C~6KUeWY#nFmW6=}I){yB>C z73&mNDRTa#+~tZ}6u+&=d5-CKD?Y5qd4v4t6<=3;OL4E_M~a^)@;6=P<2^?dzgXa4 zrHd5l0>JdM6~%8AbiLBz-wj&)%z)yL3KaiS;2xFZH#GIMP~?V3q{k_qt0?}S;NPe8 zqlyiR++&CNxYH1Egd&}RNUu}8kcivsQpGEYnCP$9bn$xxeW%iQYx)nB{;ASWD7{;0 z@pnWy;^zqbSo!}{IsV$ua+(p5-cD)G(WJ$n5$XMuK3>y@DP5?v_%TAhMCmz-OBGiW z(LQdmMZ8@3*D7vPe!b$I%D+eHA1Xef{9h@)toWLyzo968hp6{QN`I^vLD_6?3&plX z9CREYb|)e|OX)nt6O>=1I7M-~rq5I?Q~p9C`lE)J41Zz8)tbIu)2~!|i_-N<->UTY zmA+T$N0feC>E{*SRsKGu4=Bxvg7ruvqFu6m6X?#$@2@ym(?=*hR_TdKpQ7|^BHB}~ zSf~7R6wg=wM#U?Ye}mFDD&D31A1dxr{F$czT=Cb+e@*E(6!$Ct?~0!)-$C72zjPwn z+fM0@ioKPeqc~LYL`@&1c#`s`6VYF%6Y8(otkJ3LO zLf^}Zd{-phNAV;g^f7Q;V)zQmd=Hw>9`gClMdWuHv4>(G#UY9#6h|wLRir-$^PR3Z zM{%B_xIQAiR_P6j7b|X3l=&ZWw=4Z!#UCi%r}(7eFBE^R_@d%litj4EulQF*c@ChQ zFz0C?9m0t8>LALxA7FQ-=^;kGSvPTl(glk0yg>S?O3zj-S6rz`UnlChNbxeoYZR|n zKB4%u;>(J!Dt^)W2YD_*UkaZuz+)A=DvFyV`1wkYR;1?=ur0M5Gq<_KRD-Ki~tSHY>q|15$psWV~%6b4G9qpKZ zvEnktRf=@HWBQef@_Yq-gVJ=iW4ieH1Le62{IT-se8=?NiZ3btR#E);k^a8Y@>~V| z52cgQ2h0zTCP8_wg6^zzPenR7Qcj+)z(GpWVUPUriYF_csyJWqEX7rd=O}JeyhL%c z;x&r5D}Gn;2a5M8{zUOnMfwD?KEF|XQ;{|W^8cdvfuf_&p=3pR22!qrA{_)t4^Yfk z9HL0SL8i-d7g(aSJbyvci;(GODbj6_^tp=k9wfb4ajW8XMfwsleW#*4e?k9PX*v`# z{W-XFrEgTcP4PR5_bC2Q(LARgRhmAL)b|_3R~27Z zd`t0N#rGBesuiL zhW0n@I$)3KRdm4t%Wk{hDjc)l3jet1!FR2sv);9n!HJFCZ`sM$IGfYI^=w1rrq|v{ zvM)Li9%FS(Dk^(7EP3o3pKa)KQ}ZH7hA%h}v0rR(*QH(a+B>27gF4I)Xi3@p+B>N> zB#@hVpKXZVl)2w3D%fu&zxGbVPXE?Z2f{Wuh2VsnU!PiNUyqd*o73O9$;!C?>`|A_ zzIlJd$+)`Nwn?+?;Tc%3l)gWb-t6kNAFld-%dMTakE(Pkw{>W7L$|^fMcs;8Z9hG8 zR6~A_)osFTyK;18=dE02G-|dpyG?wZ(UdESHt&1}KF`*^Yu4RR)Nxz0%~SR~meyh0 zvkf^r-4T(2ZsC@qNY1fE&o;O>z1m>Sp4t#u^J;^ei5`C){W;3&{=|Xg?$>j*)P$2p z;hcse^4Njo?>*bldMA2)9s2rvSg$k!eZB6n14-YTQdCs*>^m9X`{@B^{@q1CE_&^q zjQQwi_Fi&_{nn_H_FIl~wY@F*I`sAYj+N;3bypm4y5En!bdvLmh9gI4{x1*M^IJmt z?xN9&57#_0zeOdf^y^Kzm!XGQ_7z3x*9XhL zq7dzUJ^ao^R#AITUDaG&SM|S@-51YNvX>wiFHSu*-b60gkp1!j7s(Yo?Z_n=Ix>#L{8{CnnTdihyue5V79rd@Dy>(TE zd``)I<=XQRvA=^C7{0tG2CS>%H-*y&Cx4&pKAbf|;Zp$4e7^aZeX=jb>#M_^sQrDi z;WA)3L-|%)AajPBd=@#h_lHisgy%?jqd@XFKzv=*sTAXDnr@lRH+tPNJIZpsEwjf` zK(@?w-ePpfTIzC>f4~y$$Q)KB;)<2Xb>Aa1;_}@)T!0kpe*F-{!?3Ga?oF}?!CP0A z!cN%oCDR>yNmIclT~pq;O3$cEXlVpYG`?g%tjkSyz=(#?;*j>#CAvT@`Hq7IwmxbyeP~fOC)+`;5vN zgW`A;lr|5PeJ-^RMOqrW!CuRX&Lqhk-Z~(9%B9hsWuHgktsv8Brt{VTVdY2qIbhir zNE7nwm~doJ+)p)t-O*M4>DEADw14-ZePT_wDM)# z=971m!jbZbzF4fb<(R$rQOWyq}NE!ASs>nJCf&v^m^&{+Dl%? zyurpjjzq6xgyb8x*D?RgthpqmV}zVWQaa`j%)5r9bc~SONJ_^D`5;MY`kPd>o1`>d z$TocUNVRE^46GX22Cm%+lFhklgpqf_@%lkljSNUOO_Nn4Wgs(`Lz7uG!s|bkt>i0O z3t2Tn%AVP>8=yB7-iHRal2s$Eyj3GD`6j?sJGAmKWhKs2v8tpMSB=yWEG!b*f2g$AQK0`%q4(?%`cE z;_ZMQ2`(ND-qlb`} zt47Qs5|Ay;dI>IBX%$#V(b^=Sk5>X^!d^L`Bv2v-c0$uAiG>iNjd3;!?R$U^U012W3s=BAwGm-xZBUlKP2SiW}32ckDacU9@XPo`zSm&;+XXGl6SX0kPF_hZY znFO!5AOyAqUaMg^Qt)#(3gX%jl2n*#p^eHT4IR9Ws1iyf!QrC}x1I$10N3KOwT!Si z@c)lUyI5{KFO_L+9ELD~3?jC2t|*@7KV zRx_^L!Eytv)Zn5UvREx)lZPZ+5awj~HI9~2!&3;9MsGi~mXThfny{v1gJxX03*d7;VrD{ zkE|Fc1hzngkS>93;0?fqAaydsk?IxTMCwVgpj6x-1GzK=^B`&VkI%zJBF(BgR$Zi? z5%wtvSFUP~)M7fps|AE0mFkO?kE`{7-rFuf17^3ML8MGDjX>LAh;2ksaGvwgKi z3jULZZ#;8waFGIWrKp^SvxNRQha~1-c6k(%6+@pfFiS98q5P)OcR*Rl+5(BMyI$ew zp8pB|7$L#-HWwq~OK$g%C%s&2=K|Xv0gw8AaGiHjqdl-dAUpTiK2GKYr}|ANGwP&I zaF#}UK_c5(5_MW+Im@#~_Ui}QS%G{r`#Gsu&Z?}TxnrHwO`Upl%DcI{vpQ?Y@wv|O z=ylzf=8kFaLlazqivDI`AMr{;#|+ME)}hE~DIq0r&qSzPmm@Z5r>dpC5Rt@}c@ge*Y^& zkBZ-aFdrYnpPz43MrG)RgYxmA{%^ky00SYuF@NGs+tfM$X5eoANB7~!u#nIjXTGw- zI3^)DcE~Vtd=X^ayysJHlSxF}ydI88kb4|59D^npxw#2)^alyPNE*3P$l+&2KlJZv zSy52*V`W_^$NGDpF^Fhb1AXIQwKKs~f%d$hzKPIB9}McF9;0s~;wBHG*5gRb4KPe} zYl7TIP|n|wO)zp>zzCLG-V@H{kYl-@w+`Uy7Ty<4qP|-a^u2%!6a|m^;NIr9<3Yqt z9T2r1gT5#u8cf>#po8`M5c>G#M17yP4&V>ax6}JV5RFFPQwjQd4DfzKraolx>-RF^ z%)_!6u5OJzopJ3c7puT+aKCG05;$OqYP-q)q98s+dBgFGwp4oavTr;z=7&i z10*~EeS-}FH0@=Z0@b$u0y*08O)ybnpu4R6F4iHf19%~NbRED~*>|5N=1g-D4%%m* zS2`Y=+IPP#l6lSe{0*)Hhzb3r)&a_k9J!k_oySzRyhBS3xV#cbT1<49Hj>Lq>i437hh#DP5|x{6}r1FIIY`rk|tqg-Tzh z^tDQFQ<`oJ)O(NeA5i*HrJq##Iim)$8 zR9e267w~mSvRpM~WXShBzNUPm&_t z3rHWMD4rsqX{IJ$<`tl*^gea%p*vbbymQ$m2dW&rw0e;r>%-NDc-8MLvg3#j}#wPq_+q2%X|WSS?O05 zWj+D_9i{0GLitY>;cp}~_f;le<`ZCBrMoH0`YZ71KSDW~Pk=F{W&IUsI+QT|G{rK- z3dJhLYDIdSP=2H06^d6W%D(VOmwn-ZbV8y0Q;M?w3iR_zzpD7U;#-REDt@5&H${4} zP@nM=Z>hAb#{%E@i+58#-CQVtyyA(9qZH})!t|3BXDQBBT%fo}k&ZExU#EDX;-!l8 zlwrE8#{wq$jnj38>Be82zB8m>Q2edp?-h-|_0=aoEA~?y zs(6CpB*kfpWr`Jwixq1W&sO9QdMwAR*SbV$y7};VQm=T2;`bEqQ564i$UUO;V~W2} z{FUNMisDZWc{&YI|6dgUswnHZz_(E+riT@qE4EVXpx9ZFUPqMARUD!?Lecn_k5ziI zA~!l_KDsFpD-^2~`Rz`=@h87P=}Q%je>tjuSpBqb)_J`*=S!4z9uf7xXS4Wao9FjL zrKb`hw_fRsh-?>s*jQ4%s&wAKyhHKR&L5=zHsKKbw9`{j2rf~+Kp(tQwBi3vC@9@? zRiyK7Yk#I|@6U9`6isi)d}ew>`g_yi|2w_Gts0HPK4CPtqrn{wt_xXsXFKmaH)T(x zeXOvcu;o4{6y6Qr-{A!~>|r1C{}G&LJyOJek@8&o2B6&!r+Jg3Ch*$rk|PKB*a?oLiY?fONQzLX;>y$7 zb?c}*;=T_EUx<@?o76GMy%YJ9?bTq}^vduyv?SUQKJe|4_aYv}5$Q-~jN~~a=aVd; z(Q6xylxHYBn&d+`QWxMS4tpGx^YsNJwqO==xJM3Da^X_ig8^|4c0ceAfIk6&eEh;+SI-FFWI?Q~XC&$o zYw8&ph66i&68QQGp=#L~lG>pOXFqt#We-4l+~D_jKM4_Dd$^(ynD<~uvIw}`TQ#p| zJ)@qsnS|qTU>8CH9iAL(nJsmoF6J26p`KB%&|<<&5vy5S&xlu5`c+6^d)XB1cj+;_ z=6fv4N{Hg@u{gvf^uXC;%}|cFa#RTRycc{GP0+hAdP3G!Jlh8{nqgBno8t+G{dqsm zlq{>R#=q<>(*OEhdvqtjiY9;9_b2PG^TYm6E!%09wJ|$8dmw&KcT%F++0L?gPM4Xn zq7eRph~4;yX8%V`{^~5d#Ray0`!d&5{^fX}0dw#_j?XH=FSSkV2N$nGqvHR2H$;p7 z>}-0-+flBGJ>%rZW&Y;g_`iqC&U*2mly$?tIaOzk#&z@fjrua^xFFrFIgYerf&W|m zzrk;P1=#3+SR<<16ef_b)$2E*uP+7=uW0t^!!2|iw* z{Sd{EV|1$J?*x2Dq(0Vb3J#M8QR{agsM7?KRtAQNGpz<4!Pi9-O!N#eg5}PH!H%{g zmdo-?xz&i9JcwF6c!VD(ROyjXb z(a23hr!57~1S3cLBI73Tci$m~0J2<$`)~y7mx=nB{zKHS-xG-A5>x{ud;)!g4FNP| zp}YLC%;bSk{vsn9j2to0JnI?QesjQV2fitn^JA< z!SWq=q6fnl|6gv7taxx_WCZC zSo@Q;%rzlgXV#83eQG80*GA$oMEvOAlL(>y${(o64-(21D2`K{qcV1 zFH*cx@mj@iDc-919YuaSvfRgrxR0Jx`~?vM>N!pSti$p2I62s)7Y z+bPl)p7imGg^CcDa(R!jeCa+N%awiwrYrqLzg_U_pZP{A^7Egx`OSjg|D-Dv`OKv4$n-x*NjKNW{6^85{O0lB zj(pn^x4t`sJpl6a2j@j4eDNLtw_@BNG_o!2yZ5?Co82~6Q)5-Nb3#!`L!_z@M+xjn zgc?e0ymuTB_%E5A?d}KH^JoTT-^G#GVU=E^K+k6F!vm^4;QN;Zr3v^ws!-dU>zXOG< zAm?6dZvrH_FW{VP*CCJ12Z#65KGBZw$0j@Xb;SGQh|ro~=aF1O@&cv~(|@|Yaw#WRT$ln?L&hc-+-1hy9I=hlePsF(0d2zefVrThyY z>PRpRc`Bw+j1zZ)X=sqJiV4hnuxW@llbVJY^|YO0Dg@II>(vbhOhaqy8DUA_6R1|L zM2wy&DaC|B9F7Gm5hGr$ixHF131@Z^t78I1f+0xXhbw*5vQv%^?ut( z<(B4V&s&i_eZtA5MWL2>guYB8fM5YEL&cYJ+@-; z=U8^UT|&{(2mMnATq*ybI^d0tldJwy2f2E>WMiO>|KPClq%qDhnhgO-tT>-%%K1_TocM0|->5045;oi@ z?S#RHzvZ`?Dc_{I=OEvDKGsd(Tvw2h8C&nhHaM}3q1c7?+$UpC#C{fgJjUmG0q54T zin2M_p@0v@@Mtu)V&#BI`BqZ10gb-0K%B`V(GfjOVjzv*C*JEW zr7UY7-m#}bt}Wsb9Gw4&)i?s#t#UjjqTrce()bz})EC2tDPJ_GFBON;cLCxi52Dt3 z=%btoCN0tCGc}+u9l}OmqRodsHa{{-AZMbR5f9dHHuSN5tRL?~qwi+KnI{Ja!z6sO zTxSLoXr}Slp=jjZ#J9{+@Jujri8h~^D3srjCa_$FM4L}#puH`TZtC|0;%H(u^Du0I zzC*G3`~q?>dRgSm`Y{j#&9ln!jeaOLpDpOL?xMjv8GQkkM1%aJHlMi7htGw^HXrYm zC+@@TPu5@C<|DQXT-PxulQtO6SHx+Gv_FxatH{AcdWGV-ikB&FR@|<5hvL18KUREH z@#l)W6@R1nw&GuixX(UN{2LKBtJow^k7NuY(qfAM-B#(2M9`eyn0}nn`AS1gBbx%} z4VIIs$gdyL^34M5uXK(g?<=McS1eQhH_IBTPjL_gP%mX zuVu4I*thZcXf#J`Gu}BjCuh*0LD48oHbV~8W>d(A3tpS@1seMUU0ZZnQG!oUfA|E! zA1G1Z` zIvv2yP7JW;&?W*q%64W6g(s2#G^POf1u1jlIM^-fvNeM5WN#e%6FMMh$Np>p105l zD({X2&s#{yK^_TjAtCAFj8u3F3CW&?o__q`W)FR$Oj6^+R zWj!N3JYr2fBPZg3w-8~X$FCOG9BNN633dZ+lN4zwAU#{LQqio9 zPGY%V%Vss0ZbsPpFE{u2L4$J!ewNKDKR^FaZB`dy+#xiwS<%lZZFjRSF8*HxY*S~A zX>ga=!#{rR5#OgMdAB_@RG8Ud54Riak()+&UPaPBqRzE>kJ%I10m0c<62X(t;f{Q_ zaO|YlA?4VSD5+4Gj=?Z)ZDr+qid*Ee2PN%k}Ez%kXui_9l4Oai2FYT*X1HRP=5u4FNc7;xsgxNW#Fr2 z$~@}q$jxNty^gZ_0za% zotQ@dD_5g<(&9fj$kyj!ZZV$J93qS)f2Fl(QV}#3k4w*|Xpk4rB(k042Lq=U7=#F& zB|4qJ)`Lsny92hnT`ODDQbU6I$WtKOmiLm>X@owKYpGoi^g}nqV8bC$(HFWGd8$t# zaQ4G)!-Tdt;QF+-o)NFkB?PKf_aa7F0~AK!5KZEK=`cGXDxoRc4=WW6LHZtCZ0vE& z^U(!k|0=hl!7v7(hrhb%Cp~%woQh`7`V6O{MxXy;BJer#F(0rL#6R;7Ha^4+0)BQ{ z2L5}^N}hq{E1GzCQKfg|2AaX%QaW~;*g_B)0)H&E*Z77Mwf=}vi|JpmIxKGd3L0LH zv>_~R5JIbD>6>pzS~?hw_;;}Ta8fjZlU#y7(P`hXKhfa-bkonjlP^*5A!fegN8y@d zp7lc&VtgMq!9-64!+W*#Qnus8r72&c$w)SND9Km04PF*Go3z=WOq>baZ>&#%VWP8; z7A*G#e8*2kBA@sX9Bc=12@aD7QL6;TgeW5#OxjtXgZg^3@ZKn>kH1_Qedi-?@*pbz zkCm?+CYZEy!3gTh59s6DiqW?Pag&ESE4rTpV8;G+{IAVPaig|ZKHo~`EvTwGXm6pT_)$=Ya*Fg|CQhvPa&@_|z16 zYm!}q`h$@&pIq5B=wifDAEc=48uVR|Y4Kfy?5QBIXV7?04G8!EP4EeL0G;F!$ls)e zCT^5*g2tM|Vxhs?MM~q%gXsSg_(ykXfz5;XD#C!C!r|F(I29uvA+q0^w%<%kM-u0I z7)I*q8R4q~h?Qa`>EID->KW;V1Ev&0ACF&M&j__AtOw(DfDMJf)I&7boXpDbwFM4H z1h4cuTS}oWwbC$}C1S;d930{S#E4g!V#FkL!kN9|-Odsb5ifQy&B1ciQ|DjispHR= zU&ma-?R_$%aMHQMF`%kq@%*~V6LQoC zM+`lOzL!tj*72oQfd$Po%gd^kRUGmE5)^#se}hZCI8lCzVB@EajPz#W+-asX&VU6O zk=XiBY=eEex4Nrf5ST}5ZI`)I{?m;y=(2w&d&~%Pfq~`=aWvw1V)=pJII#f3L`Q-j z{0`@u8NLVeVb51y>Wko*g2UuN)Y=Jx@9QR*v@$SEoN3(Gy={PDqKSSux8nVo^<%j# z&y>r0n>>hG+z&mAl{RG|JLUXv2jpJ# zsd$|zA84Kx!}s)|*kh_OPP;duFTj$hsSk<6VUJ;-#DnQQk8>pKG58rbFkX3O;^9#2 zF}%OnCwvz8_82oSH!{c==Hd6l8HciIHxYXR@HC~%6e|^%E1s=*k>Zt#*D8KX@m9s} zC_be47!mi;lZw9}Vz57_>0&oPJ>FLSpOybNr9V+R2_46L3_&{p=L6Cl8$@FVkWUQI z{gt1i$oqwI!xak^rC-3Gru4~*#=bH~=>>|56s4b#Z?)1FD_*Whn=#AVs>rWh(swB) z+F2e~{!@y-QZ)9KSCxKU@r&#%iT*TSWLNpTeRX71av5T9U!BjgtK=WLUF9L~x;C<_ zRNuSd?rS4s_E=-mxx0>&FV>aFELc@$aYvoM!K(6vZLBKTM+a7wYFJgKaGaoTFyru6 zv+Q!fhm0iz*i>$WAnYF8dB$61W%kfn&V*1h|F40w2l@OxbS_4M(}Jl5G63AcejJGZ`j`fy-A#v4ugDn$8Yy8tA$X<3dcsnuORXo2(rg0z3?UB( ztS51Yn^Z8^I4r|5ZA{0TKn(wUI`z{}J9PcZo-hyK;vcoG{A+D1-qLM!^jCL<$%x{A z8PCcd`*jv z4wNlb8G?~Zw8_*#uBq{oXp^Z9w3n}RroB%fjwV*K42B)hcPKWQKS1t9FN>U6KL%o; zdDfa{hh~%6flli#8oZOy7hp*=$Ukb6iLZ^~7-(#h@m|{EPBQ*v{k7Ldu`JqP#wboy zoTex?2c*wcnuCk-D-_RFyi9Sk;&#P56z^61vErkOKUdtX_#4GH6hBlvK*as_siN2t zaMQ~EFQ^Y~%dA(F2)^vI13Fvjd`&-5>CsBd+8n+4sh{@}k@E;KQ?b3`SGDC#(flQf zvlM45^5d7~)hZerj`T11o0QLaopSufBHp6-UB$Z;IcG54*mR`7L355E|2akJZ_tUh zoc)^qk>V$coD`U!&$zF;R>>Q^3H$3{FCEYM#XI}^>*NpoT6-dY9iNzDwiWHfs6Y(! z;c0+9j3orvZ&pJPc9U;2ODH^sR4Do9pq$qs?C+UVfduDm3Yk4~=(Gu=jr{+~NHWWd z8*M&d{&vjb?U^%+QL|@G7Z4~hMu@m?P>l=2j8Kcg3~xs~Vb7c?;OojH8h#n<$SXYO z{eM%E%@-##815PmSj(bD~ecQ)Z+` zApgIg3FoM%3~uYg?kU5q4UbxL{>9duufL~F3*S+u!~Y3$&VQ&8=P+((^9}4^<9o$$ z_Z5E?mY8;E)d{-o1h=y};-;E|_Oapno(X(pe)E1aNB6HW*Mo>>jD)XaqZy$(2z>u% z7>&c|Ce81j83BfgCfaDYCvp^tv>o6z+5a}@`@hM9sPzO0zPp=X(#pUvai%T63)rFf z&Ai;)IwZdt{(tW%6>BhMRe{#eAW3Q8;?Qg~_0Y#}BomCjL>oUR@NbTb&i`VE0Tm@U50MpK20!2i*10`>9Op_roy?jeP(XZy`yUOw1whLiQzw$bppL)%7yVv(ZQ62PCSbcG`CWy*^! z0eGI$8x?skG5tox+Z1_EkbjTjgNlzR{#x<>5piF=ruYUCga0i}H#VDpDqn0h(Ax|* z9_3mRL3dIbVxo`t67_O^AaY(IeqGzkG}Uvm;+cwb6c;EiQe3XMTJd7V%N30cW~L^i#hcFeSR;lGeUwN&Cl+3L-3=ixb<$w z?K#@{aIHhX8Yi5*JH2RNkv$y$rRwwp@TS=)-Zbv+)I#hZleT%(!TvNslOPdNf5U}@)EKG`ok715T z@_yuq?;rCf^UtM9Z~vGGg}nV^Xp!;vkI5uqM{-4n%SBSyKV~^0;ueD${ypNle@u7{ zj=r+G!RHEoOu zu2nkR8_T5PIr+KEmZV;21Z)SMKh23=Je?R*KEMxA#NZ!8=r7UfgqTEm>-&MvZP+;o zF&vG(X81#o_tGZ+o}AGr4%?bR=q6EF+0+YB_~zL4EQPw%YlhK$94LXnm&(MQVLE`v zR={z_G^VpS&O|f&DF7(k&W&Xv+m#@94 zOta{gPI*|J)J`lf-ao7I_ayo6^{Dx#O)xMyaMPE#QDX36a*PRDRzAZQMs{jBM2DEh zd%PTWN0_hZPQ+1v#0@iiC;TiQ8qRw`ADT12Ss$9Cd(7x_2#+8MU&l5RQym2Jtvw2H zqnrFX98LMp@EPm9hEfXq;^Gf|Rqy_cSkDBlJCYZF@V3;`5P7mRK83!09ItyvR zax*jWErUe9Q_yC?b`bfSugQa`RSnxmlo1Uk?JUqiebE+8+h)#(oXJBKo1hOx`@y80 z3rsLiQzPS+uepf zG=XV6zNcv9KK%^a%mXS1kia!aLks~lFC~KP9K%9LN!;#=W(|C^=&jCR$t@ttE`f=RTCV`C;FT0P^>_Uc}H zyG@w4_uCVC@9lQleS3FJ*uOXP@ALP5`?QY`f8mjxd*?3Pxp(wJa*=x43yH zYqLvjZut8NBC~M>0~~T{kc7>N`6DO1gl=F?J8~|V?%R+I^_|MIx2rK6hW^Ne_sJT$ zfM++n0Xf_>W-B;bILXgLCjOt&yEDm6ZcDLYI62WV5OYT{+Mkn;D?1wxka@>VoT@Uzw)5BFP`da%sWC^cie4G7k#`*8Ju-{H!#Jx3MN$z`yC)?jcf*pe-%pP(E z8M&Rzf`5V+#Sy{w1C~9i0nq}IT$yH%{vSm7h)<~=zu2Gk<(~BAgnUKha**(@FSn3# zX?O;E`h@JvM{?RYoSIXCl)Hp-Q;?7@Ps0xvQ)tX@;k zh*vuAUq7IG#TuB`vz}3}*=G{?c(JWh2wu}x*rJ>jRr?{M97(9Y8BmQ@-E~8H9*&T; zX(Evwi1;|-B{(A1M-%&gG_G&AdQvxdsS}B8Xh-X#qP`!ErND=M<<+hq8qv0uWH8)BP3!)a^EXRc$ZON(b6O>WMh#oYNd~)91zC-BG|}irI-WvKW(d@7 zm$LkNG|?xGbg%89BiWrom* zu2`+2qn%ar`ivVma3KDZ9ZoCo@9ZYv-1m%u^5-nAGid{z$}H@gHD%1efjFGXdCq{D zqqE0hQ>~Rdz;{-hA94@cQtQ9hXdPb$`pqo>{h~#jU*4iywWO>rKDfTjKgBC8EhrxQ zb^je+(@Q=}ON+;pBrf%gZy*-m8|=_M31u^QG57~seB{m82l*F90~0GJ)q;%HvGw8D z1~<0RiCq|qT|wR;2pzG#xq|(3bSUK32(1z-gA&4j*9;89;X4x{gS#7!PVtrgJ6uTv9D^cpaN`rd{< zwv+lYa2S2JAU5z5tPe=4R0wkXkZ!-8WxBq+zPqi*kZX1Kf)2L z-#*kY6Fk1S8Tx3mG{KZbduQOXTg}nPSBwzQ$Pok0vv#1c7?|zA zZ-s;9vL38kP~Uq<><69+MxUV#2Kk4>mW|sZ5L~GzZSP(%z3EX$!nVzRV*hx7S1KM3 z#kSo6;;cUBkhpC-FjqJBJq#qM{~<06?}resFRwXKY}`N$A+c@uBx0O!?qd2d#RA15 zMb0ryKTWYzu}YESo9X8&Zcw~T@oL4binl1#u*{4h&s?Z^{8yF!lhW@IA@`B;IghbiG3TLN z`kb-dtrh9O#`=h@5ORH#&Le_mpgiviB2)`IXDg9f;Hx=Jj+^_hN z;y)Eb>}TYcHOD|R&iJ`bK1~`#nlFh16o)8|P?Yh7^s!1$R+RAu{^?4WD$)m#`W7oL zQ(UD;11Zz_u1J(|2fRV)Z!6xeDB}+44=BA$QN|zmv_ezQJBq0~jxrRp6$dH~R~)H0 zR`Dc7ntiG73`H7lNy{c;WI9TN}BSs2M_#mza8ZdJ>=hxwqpK3@cns@!5hbb zclP~%_O1lJit2jLyqT9gLJVOMDIh*HC@R??EF!{72mui!Y=TIE0AW#`l ziyK;L=CoICGkQG+00%l-ZCeCM2d z@0mOM%y*X=iq@mF?4AB)?MqgcTvFofTC=it=b1O4B`J#k5cm^H{`Hn~>0^lFclyg` zzjeuSv;t{c%e`+6Lrc&cw6z?^R+hAn-~Z_2AMDt+!rSu95i55&iN^@QIxpPFKCDbCR8;#gfW< zi^m&=cc!#M#iDE#!8C)fz?K}b{sMD+L{kr*&0Z-o`Pow_@~y+~R}r{NVPQAcSA6(S zq5ztsrbCNXQob>0hhig3WTSgG%0ve+YZL8I?C%`;$aP=fI=Z4jtlEiu>~4c9H)`yb zVpwsPktNi$G)#OF30s)B@b4z^ zmN4-{B*b8LtN4@`w+}P171uc#k?nWx)spaQCP4eF)+W1&sX4!-2!17cT>7bP<1N`_ zgkP(AY*~`Oi?(R|Q_&4YxI?DZ@9b?4wa0zdYIS1c)L}=u`EA+qG_mEGvWkqTlP}Fy zt?U%pJe*BHwo4JQCdzSQHFgE$JR*-e?J$R-2PFLkX&3G_XCi?)8#i4Ac}K^Qm?L@5 zB=kY_oOAtpO-n&m`K3jcWIcmm+$Ni$aL3k;>hc%VIZ)B0RaHx2W1v*mQg|s)YHBI4 zH4cqn1XczmDrzb87yCp4PXo`XuBoL^6WCEwLUN^(SWh{XoC$<9DYa}xEd_c+I~9SI zk2*^o{MnQueWEiwVF9A&EL~AcAz05Dx*GW&E`h=ZAmVVY%t4C}S~8BVr8Zhqxw-O% zfSklth{>GPEl!k&bf;*?(PkG`5GodjOfS0OgEKMC7&P1rw#jc<|-^K;KuHDQ;x3X}=X zcM-ySS)c_cnUTBV>W>8PfP2*(Gq`{5_{#FdmAU84Ew8McKX*oM@xmEP=9e$1s?42U zR#`r8?t=2l+;PLlPc2*gMf9_u(SP#H@}-k!mMtyMo;$NVyCA0^r)PGbg6VUsCYR5c zH@Bj)d@=~#?AbGBWEY$y;(~<>%CpPMrq7)`cfpK#OJ@0D^QmX`;x53+QP!$K-hPb8@`41NwN?v(To3 z#+57mi1$rzmhXChtEuXdFZ%VOZx8jWMSnZguMqwBHC5hM;@<38Ue3hg)6~`55xQD; z{wgmm?k&yn`p0pfb=`(r;-G$g3eYG1zr6iMderalX*>7Lq?`JG8groZwO7>qnSesaG6b&GH8CpP*(Zb?mlRU*^726x$5@&@B?|ju*V;aFt=OaO5C-JGUAEV zvBa9x#M+d^x@h8JKXHkdxRebz#Tj{tXlZ&PI=W>dIwma<9or)EV9J<8%Gg9oX(DBG zA|vkXmo}co<@0i?%B!n#8eRQ|+Ih_3#G#aM9F{Re+`T36+uaT(UmlE<@$xEx`FK8< zU|tjW(gg}O3^9DXcZWt^n0XkvzS9t`;?4t5IMbI2CT%DTw!b|1dkKm3$GRAQ{Gc;s zAUeOn2K|YG29w6mJR>vdUO3p^#Cpq-X0JEa-f`ma$@S81)>{qP_IE=n^1)_;Nvndv z_SYRBvV2#izm|x`A2~o%2BPyY{4t*iCT$%Iw!eOsKTzADzi&b|W$5EM`0Lih_I?9t zwm-I4@i?)5tq@K9z5|*5cs?+^jY69m_+$D5h<3hv(wlA%dP4I7B*anqX(|)AUWP{z z?fR8k+lx=MuztUUjKfp`kgyW|`WgkuIx+Ao9r?oWBjo#Ys3r3;zqNVJ$~M9KbO+eY zdUN1hZbF8?^0TRC^FVU4mftW}tcD)ogSg@nrDo?Qw1&&(vh_9G+>( z;K`X{>#gPdNuIylW69vj9<+7rTq}5Jx#?)>^m7~{H)kalO|%bLb5l&6DqRVt&gwaD zd80R4=XCf;Lv_|FKBo9D#fk9Gblzh)mjg~;X&{ZWyCSb`rW|8>>nctgKI^_vxMSNx8m9Czf~r25YkpHuve;_noH(%QFvY07pYFpi|gUNjkref z62T*U_Co39<6w+ zVu4~m#e`z9;s`|&&Gf^`K8WO!iR501OBG4CQs ztuvaS8Q>cNomDqTRFz3 z`L)JuGbdkJ^xD?Qy}S5VY)k_;mB(FnukZ3*#$AOI`F%0eU!aXeuDM8bJ@U&dPoz^3 z@}Sk_Av$qmPoSvxSDKE`<1&)^1}$=n88n|3KYA+*OG9hn3bCZV$SWuOtJ8@{Pd2x7 zVeZ*<(vB~4UJ>u-dm7xA0nTGf#12z`~5Jls834X7m@Hf;z?oN1JRE5 z>Jd<#^kcE^KH>T=XTCGTe4@@{K2&^Px6=$t4}JrFTsoUl5-HcQ9fplH*3ZFPSU(5H zJ+1MmAQqKzL7zAjNN$DB`I*E7HWbY)9f(DNoJkxO$g-Vgv5VX6loFWSxXp#{78ut< z=!fVzRW-E~cm_Z@zm~$hKsmRT0-yd!Szb$FOQ4)r`yK?Yp}`oTI+!uYhG5p8Y@C5n z-fd7puK!p>X`G?JcNQo!YbmS_lsUB&*eZdPd9uoMS!F4Ktqd|?h(b`6Qe+JSPXPT* z7sX)1ClGk1p}EDJaAA+nW&H~=x(%0aD2Q;FQH z3}?x-fBDD%^R(l;$S|EVVB;R92VwG3bk|eCe@*YIXsoB?!opPUZ zKf|fLpBp*74|!g#@6_!6#!h({xa;B6-t~=~zK%Ta)pu%+NMolwGCUe^Y9Eb8PI;Fc zh-huTIY^D2@?h}*wXc7G8aeHZ6-N+xgE4_updD;|8`2`dXV+deo9&C1rhVINb)Xya z8juWoH)+G`1Y?n>psfcXkkWXVzr-G<0aNc z66@Tej1G}+W@HvVoj71~afR*lhvwtbV`ZLxqFR1996f~H$nb3{Q zq;;s!J*HAt+BC@adM6*@IC13TdbvIpA(C^n{q;tnIBX`EG;)--znV?~A4Gp?h{oSq z$fgWLXFLjJQqW-1RzbJ@U2geHN1E|>J!DgcF3M4eyqgI|yaoo_-%aqx?PL8i5RJdv zAhV3QmQO`9#!GqQ z+N@ALEBJE!ip|D^do#$gKgKZe{7Ig_JW|QfoH0yjnw0Z|_mC#qs2a@CW!=9~j`yIw zX>a038ryM(D2`AZtvE$-h9XZo=3k=7Yn1vWit82S%NF)qRli5^$BLU3w<^A*_!q_3 z6?Z6-TI6~>>?2}l#bb!LNgk(oA`v&6d`*{j1n3FXrTqXpi8T5-Q}fSJly(Eym#Hr8 z1jv6Wb*$$K#p{U3_bttLhwAsL{vZ+gA6ERSrvF0IrJVrf|ET(_n(uYRw~0vqK+``` zJ%$UF+h@j{w4sjmNS}A)XInkfPar~;xh_=Qv~#Uj{Tjs^6>AkqC9~c?Qrx5{=Pm48 zRsXHxpA^X?v)n%w<$Q(i@;m~vQzx;lBLCV)oqczRGWHHABOZWe%#@s;(1&Wi@rq{5 zRGI4Kisvexuee6>62{f2R0H#chhD-kBa#B==6elVZMN zZ$(n@O#iAPIe6+7ifa`wRg~vWEO|e` z|8sd#K|zrHv)lU~2<}_;+WRVgxFOaLZC~9caom-&JLdH+>GeVE&6Kw?xA*!W1-KsQ zznLm}1h{_tLzrc+4zuh%gjx3L(BgOOTiwo{_15iYANN)_X)|+A@iG5jG3NjCG5=pN z+5$YB`cl)60cgUHG7+Mk}>{oQ&|Pddfj32;(Ukn_#g}ar75k!ZtPoh9P|1AAvEU=4z%rnC~xy< z4_gC>o(con!|sKg;y)(K=det5c}=?9P{-NG1%exU2)bMJBIGz?jL#Ey@E@@(q}qpS z@p>#DL=4))N|^a~h-sTyb|_OvK!SYmwG^>ha$wQ=Be+rY^D}8Tp&9}jR0tap8@KrI z>Om_FVG<&ma;j=6@U09=bu9%RWGFSY6c!+2A}#{m!d_8JVU^fN6RsEgBEOcx4S^lY zFw{Uo+X-PKB5PH@9Vn<(X|h(8%dJ{f)>yTwyg+JowzwQi2x?VXEwu{11WO5*BBDv? z0-3{XBNXfyEW^MXi`66))Zq-m8HgAGLp+8WZYA)z!g&TfZj#&-zB6QGk;|e%>zV(1$CLyk zJCXw;!p#M|3*`aYKi?l_{HM57igVW zy@uyJ>Z@G(f#F}b6n(o2+H1Y*&B^Bpm_+g z)0gqh&=mXpydK8iV@Y&F4KCZ9eE`1H`CK!L^Fc_I>cOxHP z9ZfJ|84UJ%`JYZc$GKjv&#bo!vMB@6DMvz_f(DaT0ll6-kdB$K(O(*(@wX1LDFe}2 zg9PR?!K7UTgYB=o<fxFygf^*#7##AGeeB*C==zA*d_`Pi$)1e1?wZJtwwosod?2-r~tsb40Lb+i3Ffb;Z3*i10~ zjBe1j?+Y%QFR;lF%*S<8XfS&-FzgR5oBN6TCkT7aWp_kD?xT%}A(w66tML+-Rpn&O zZ2YAA!no|Qs0+E!iHf|ZP@kt*sd%9xKS!8;rJ~`oc`ea?m*V}34=YMvdZhnc_16@I z!;WI?6LsLbMBGF^&~y(wjCzcS@@-TX4iS1+)uoR-^7Yny(l;JD1O4)BAvWY{<7&@R zdd{yyv#d`Z0<^Q90o|s&p8Iy3B>g;Drdk00?-_X0M-b2xhQ8-EU zQxr);uzacFS&CB?XDOboxJYq{;suJU6u+i;rQ-F9H!0q(_#H*u(m~IBG8cEN=HtDl z{=7&hHO3NbHIY(vRWTfoHOpBkCo z=8`k&Vw2CP^GBSJeq4GRKiePVXZerpcGCyfrS}+ImpR${$9g9Pxjp251AW?`aoioT z)?L7_#kTk-kzI59kJ|1HF2p=Q?{CE%Ko|ai+biq!A>n>B4BA^_sJ{TGb{mqwsjWsv z?`5QhoSHP0L{h)U1i6q0oyBB7`gN4>p5rPCgTCph-=GqU$^;X!RJP9yaoJV|k- z*D_gJ{)g(VrI;;GkQ@KEJWB1Z{@|%$3h_T0z><)MbVj2zlfN26*DK8 z`V~m%d7h7s=-Z$!4b+~hUJEsC3Nx25^#Q6gLiI(eY+(yhJ*+Z~4Htph4Jzb=l*5yo zs!pcEeahb4tgi{fAb_eOFu5^@$2T%?c!Vy9_(f_(ErmXTQdLW#f1uRVQYb=1pHBjB z#ZrR8II)i=Oc(p2n6PUz1Ev0~JHcwl5Lho)I70~7^@u@gDWM}Gx>48EQW%Jc?$v}~ z)%f!Rg}?{l|zxwUodTiNr=M0Q3#xe3>@om zEFw5PLQlkqv$Pr@f&1_z5kid-$RpY`*#u;O;Qt zd0ZtCM;h%8^}gNr{}9j@)8H5N*wvqtTRg?}TIG0)a=cdYvvYfAb?$O(7jJRgi|1tL zc~fV3y(gZ20=PvFJ#GJcDZeC7D$)U&P-fwhs(c5Fo?P_eqQH?u{002Rb`K|*F=VmD z?{VT7n43A{%$%~tR=?QKOQ8m5dSmX?WBp^FLdhfNNHNxKjh+aLRGG9T-gj%ez49b{7mqB9%*wpa!uUX3){-y879 z?W4a8MB|U&_AHZ!$j~aIelk4pdk0j9K?ovWALzR z#5VGF9dL~}VR`OzZhszMBI`r^3K1MeHzG3iPT$&^#e<#8d`Rp0h~iHbpH_TP@nywV6#u69mf|~#!Wm;f{GaM6+;7lL z|5G`h(9QfRS(@J5ey4JLQQq`FJwwY+QY5Lv^>K0qB6%RWZ3*C>)0V){1}<+ww? zO?5IwOn*r6r;1N2k~(7g%ZhI(zNttqiRr0|ra!cqKZWEH(~nnd*v~YD`w`D1bACaU z{O0`omaYen4<~|qIqx_0XTQhy%~_cHS^XG$_w3g%F5$De)9ahyPJ{mu3vU{2RkE~X ze4RgFd|mAM&gnPam*o%Mo<6vEd*|X&+k4IMcYU1Y?fSUwF@xQKL+kvL`M2M{gE##p zc+)FnE|AnMX~pDCJGBYs^{B)Dd-*PfU4)?Xc^nM`JLxtIVv2MsfZcOb*c|J*v2vFF zD@>8&M=~K2J)8-V)XSN$lL>=nF~N_L%#4s#jTBakC6%X+7mL;jq&@>s`qcANf5MEs zS9$G@rOfxfs}KWLRVM$q6>1u9mTnk) z>d--v!nDASWf*uT(GH3f1Lso+eGoya68a;`oE3D=nrR0`ilvBFM?{un_6X`iWC@V0 zSW2*xYmDt!2swzLMhQI;(=mE4{bT22r(>1VwU!oMxktliN+N4X%{7ss|y)DA^hARc7O`qJBqdsH( zwa6o(GnTlN5O_ll!Zaf^q5llmM8vt8%R_wW7sr?G-CP9&L6^q87FA~+)iv8|nUkNF z@6C*RN5#Fe;a<;)r;ih+R9Hj~m;c|QOzXW@kik?!6GS0*hRtSvZVr$~49zw)c3#fX_>S?(goJ2Rmh&j+>#)m&UD|wtqlz4H-! zaB!tOwkDWIWbkTbtO2k2V|iH&Y(`8#)lY6oxEJpf>yg+V8a{F4ksAXBFD8;j792Br zO;VM8L3KK!@lE{|0~2jVAjr6*`Q&kg3|R~2!vBJU^ECn)lphWcE^1&Ze>u2Q^2@jAtu6u+%_pCbDx z)8BK7TNPhYlsN{F{<`Wr6yI0$u#;Gxqyh05BChS@6i+1Lg2~r(QUlZzst;FPI5d<$ zQ}sED?D|B%%T!;hC|nu*+@R^gkwKS!e#n2n=0i2>aa3|#^j^k##x*@laZfo?IWF)c z+zN2I`kAG;P|@`Jl;eYZYt{ZW#VZwWRg~j|eD|m>#|!$8RhQ!i{b#Dn@q;eM4=5Zr z@Xwn5s^V_Ne=71M=YH@NTPl)AqMf7WB9io8!#wm)|?!EQ94|ahwHx^9q{FaTep5fKac0XvG5?V!0Tr9oMni znHZ}*7XQb5=&iq>Jr@7G#0Y9&g!=Na7n>&Au=B2k%9JCeE;nkPqY zklgS5C@EGij`HES?A}zuaoIzmB|DDt#lTyM6?#2}P`rz!v*ptCQ*~VS2CgyeE!r>8 zJ_JNBMnQ0yYfv&e5QZklW#5Pdm#O$QGZzSM&^>g}i;#OD#^hZ$@kfXwsq$9h7Ouzg z9K?Xv9L&sgkj9svVAS?Mph9kvn@rM?o=sC8AZ}7_TF&|DL~aB*OFPVh0-ln<C$LDOHv z-vNV$DUv(;V$k#x4F*ly1Ez;3re~FSE#gg#nGR_suscq}Vbg~ON|$HPD_=0XYR)Nn z+Ane64V12b;Dyx_M$xi6jj60XA32@u<7xLC+~1^JatyVh5d&KDAR05xcW@JU2Q17; zPptM5Ya)rYZlowV320#-B<{C9%Fsmyb{JM229tIXEVjRXmcMkQ zaX+)3-#|2FAUa);z}IjSjCd^!w!dNU*AyRjJMytio;r9N2cbD*r`N*SA}vFp4@Q39 znmRyq>X5G=1r6qW;rFmzzfx;^A%@%g9Aq2nDLwZw9FDc-O6u;RfwcDe)W zhwEOxaDcMkfV?Nr&g+eMvLe5dsgG8a{RVxq>ileGy5Z24s=i$Da>ezE*D2npc$?y# zia${Nq2gnTPbxmE_zT4s6<=2ThvH7fI>rAe3Kxp{rsBk8z1hQwC}Y%tom4+c@dU*j z#omf1DHbV8e^QiB;d*c%`8WWlZi>m-c4K_Vkh=+cSo^gZzI?b2whvN4_2C zdl$ohxSo-|cd;#zlSr<8uE`>QR3IzKQ>>0^f8Ac8w>; z&&&fjp9zuFdztVqibc$r<&{YAe#Ko`IG=Vu^=2xu=n*UtOJ!fWB=z(%%YVd0oTs-( z+DpeQFQaJ2EDP_5dWa979rrLh;Q54@PlhT=g4>K)CJ72gisx~P|AH*HVaf9fTiah? z8f64Gb_a^PC%*$Zju`tXlHCDsLM)`pPMyJ+bhxu@0y!p^u1T3Bd|6lA6Lav6o^Q2Ha7E#_HLvmSW&!A|VISbtVvk zty$)Z6V^b9FN(oNNaw*ZP=)xSFb&ZnzUYx|A{f;TkYL%Wny^(jVXJ9qYXurG7&=^8 zk&@`vHQZ<2k(1ku{)DDXX9&0;5PVs3F)fq=!PcL|xqE0#@fS_Lp#^oX<|_=w6d$(g z)YG!PsvNI<+&g=gcS3R`u|?}(RsUnXo|u`AhJQ$1S1y0fY0bK6yw9>VkEYQg`X$%$9nPm&Xj@Z zoQfwfeVSm>X24)%rg8rGcPxVury|W>@AIu;Kwhqw>oedUjHkVa>EZ&v8&$uZ2>tu2qnc7Lo_VYvcC{eS z3F>jhEX5NQa}^5}hbYQ%K)F)Y&s6-X;w;6p6&EQkQIz9?@~c$8MDc5i8x(I)B!R(t zeqZrH#fKH2SCr#~e7{ru4~nlUzOMMT;=78ZK2cMMQ55|%&r+PKNX~`pCv`%U;|r8Nk3c!Tz#BB3v?>4`0+X!6u2=)558UC;n`9qB0Eh#zt1NZsE z>kb=ncwLJDhu1~lEZ&|zvv|9A%;4=A;mF<0s9_H;4oB{iJ?zxpjNIjXheGVhDs}8G z8@+alq5eW1EaBMQTBsN(yBe7>U{{#EV7|j(B(HFX7_fUOvPC$YH&Qqs?l35q{TDG{ zcM{9TQhNfD19oM+^&(~n2JG^^DBunw7g7}N5I#8H3Rb?D5cA0-Vw7&RIQFlG7L8+p zQM&7~%1@r}P$DVU?n^k6!d%PjDIFNOBN(oGE%q;Q=joxyEA`vGLh6h%{I7G07ZY_n0fgQ^* zlt2OjM=)!s-=Qv81KUjH#SWu-`K;wyFsiqrmcr?Xs3jp-T}6$ojt*hRG7Nkt)lt0^ z1LvIFN8U)m!sS6MK$KCvbk3S7kw`Jvv@wt*uq3l%RBuIK37o2}stH?l6SkTrY?V#e z__`p$TJL#W7i((G327y-NG5ZCNa&1ZM5N>!UYHnUk)xra^9WAjL&I>taEfv7hT#Sb zV@8#?_(l8~#alew>&n5m{{PSq!4H~Q3PIL!cyI9ElzlQbx84hm^SS9io??49%=dH6 zZ`hb-JjfVEerMR@ZTWp+0`H6m6~B0B%&j>zc;*FRZ}>&~$!DI2#c*qUa}9iN{f%WX zVgh!2-iBdjCjQ}#MDkwvED3p~QplzZGta=|_ZkWsOxkqlMrP9c$j9+PCKz!F4EB1{ z@xwY=WQGG{5*DGT8MiwziiqV`h7wh76vs!uT5ie|?PtH0x>| z=bu-R@#-C*p(YEgkev#Xi4BRWpus`@k92V<* z<&jB-=J1P0AUpR7?-`Bw#Rg+;m0py?i_;L@X!d^0?GXAo>=3`mDYwWg3jYLbF2DEy z%VGZs4~24M9H`3(CcS{kC-KZA@?J&6d{$A8H|%Ci?l!f*p=jnK zl|$<8L=2BZC{OqEW`*#-Ur| zZwsmN_7RM~Wy66r{+8_oY3o_Gcs;~EkRTtVEFyLe4(=!a7kMe`?vxTXB7Q21*aI2R zKe4Ko!hk@juBA{MD08HHADKjCn^#Mxs}Mm#60R5fC;tq2xnvzf*ofG;eRVvSus_;II;)I|o6)WVw%o_tcmSNy6M5#!M!HUly z#1X-B5(4KK%**X$t(A(T7;Luu0r>`~Dg3cBe$4_=LT4;_WVn?kY&3$Rtv`-)EF$Fg zp}F?veF1ar_1&jqc*kW;&zk*{TJPMO`LE;4oBY@Dp>ex&7cQubXV02hR#lc=Sw5pm z_4(zMm1VP=J#IHS?lyT0gP%aNQ=W{rRl-lHwUF-8{}zXnAATu*V7%w#Vsf{DUJUy# z%H)9u;AbQ0xVhO}9&dyuY=m%N|8tz&S6}u{f}OB0`Ch_zWQKwO!e#LA*+2gn*%+=h z`M4{AP2QU{?FAs)eN8Z85e)k2CrNjKLuqQ9?ii$+GR(+%d9INX!NR1?glc4_a8hmd zhcLm2(_paI`x-tnw;-`S?4Szdu}$Q+peX~<8H(q5oPq|E#&1X4-vfA;;CCzi@sokC z0rVHVqd?Fw8wt#3g7LQs2HW3e%O9^X7L&9duU_|aK+usZD$NI2-Hivf` zbe73OWH=co*j3nvCNPch`-&#tFW_vE$)st__lU|SDS=9uGPH3!7#>2j>-R@%dm)C~ z`z&Oe!(-n>A$eeD;5r#vBO+fIzKwjp54B`I=C?M_NnmFrU?kVn7LoPi@nPL;e=BjG z9uJ!dX1zu?XxsM%hsQc4gD=PLrqE#aW?bdz>u5Bd$_!0>wDcvv2D;^B()&HjSjh~Sw{P&>~T=3~za;t<6VienY|{?GJs z#d(UnC(wSOBCl!cS1R7Dc)Q|ViuWr%thh<>=Zdc>?jT10cm8p_Qnz=t;$@0oSL8j8 z`-A5>k)P{C-h+q_D$0I^{=Dj26o02^`uWLzM!q-HzFX1oY#*r}!HG%#d&;wsFkm@$ zrXupWM?6)rRB@bQ!+w5q)Xt7fEGKgt0?$)jcvtAA-yd$#!f*3BWPS!B?*_zMv|Kyt z$kajY(yT3)6np1d|J~@<^goOH6f~bFyBya8LOq^L`|V|P+k!E_(Nz3-V*>i$;XfN$ zxgV~6FZaWX-pz`1is(N#jydYXi|YJcD@Kgi-gfY??S8R4a7bNj#1QfBgJkl|zc?O+3R3EN?zz7r zt7rbjaV--fssCZZznNhE#c?MRP*+M(jl9UV#jLz=)l} z)OZmJMrKnC{>8ywg}(V0$3iHm(t1M7Z%6R`%Viz@51>VlJ1{}-#I&Ba!)~? z;0J9)x8<|Q;ttG!H4eRHE2@LqK`o@ZmTH2&9zsm7ICX*J7BMrQ*oWN#!5z%ho{-Y# zB2oV6!S1fm@E2wIqsN1RiV?}8{vGOJOR&HntFi2WRUEcFRQo{9=m?e1ua1cB#6p-_ z@zrxYg&q**LU1qyJ;>2TaxG%w1eiE0U?xk_-g*WsoT3>IG3KZ3Xhioc$@?Dj8k^*8 ztM3x~oK^HP`nNnedR+RcZR0Inyexo`^IA-1wUECxe{@lGNBMinz#tV%3A_%10%Hk0IQ*eW>y=V~YJWsb!ic2=W8&{t_+u3Q zEIK)8+oT?5ei2>i*kig`W$w|4(=Q}rX_Kqb8B5^K;no2pFu5b*VOSr2-hyAZWF3J~ z;xut%v7rQ(Y>>k^%Yd^Kt0ZztV6iMjcnA#EjiKqP(4+1vQ=&73h$y}>$!QTP5O|uH zFddmAPFF7X>aQ(>`{$0YEMHuid(K=CcJt@X$SqztW6AvT1yz-~)5|K$=gnPEUYR>? z`1q-1i}#{)=7_n|7nd!@Dsl&p9DC~6+*23Kn73qRxih2x^=q4=T=QFpD}N4MP>P9yuW16o-rf4;3N?jEL>2YU0ybQ?&P_FlgabTX3Rk~ z_lYxSKkblWY;o?;@&)CK%c{y}276^{@mSmg>c6hdz-i^om|r=!aw_&g&K#a3jefa} zr%YwlOz@*f$LT{4^UJE{K$F)*PIiXd-s6~=GBf8qKjOU}&GG)6lHq>moJ@LiAIok&-{Kp`}X^)@D?^# z&S!-Qyrmx;{a(!n;+LH<$NXB@r?_bz6r6dLInY4!U@zACnWQ@*@DtDk)}0}NNIuep z+weAT{`tcDI{ooAk?)PB3`A!r9tZ!Spuwa~hi+sh4Tghbk=F#1HU$QIy)S@hiz6Rj zptwG>-bIj28HmnY^x=t9&|uQ$L%03C2Vw&Bg!r>L^VP7KGIVi?_6efQVA57Xw*C1a z0FA$Nq?!6{u*yJmz5#!;n%K`*Ac{#A^+y7bem_wBNd3of@z8!45$ltQ1EI&Mqh48xy)@qd z#S*piKVZyvrrL#_gD#(bz;o0tf6suvT=TC{yNp7Ho%0IP&vk0YZWNtY2<^OQ5_#?t zp{#23oLvGLS75}98n&KOZ zZ!5m5$Y&?Z@nR&VDw_5IvR$;dS3FAb7)8>TOgHTV(k~M_8AIAfD4O;G(u}m5_5nGM zp_}#r>4y#7v=3aM`Az!(2~w74`!~_F1CUUqPR5k@u;LSnPbt2j_>v+iRp#HJ_>SVg z6!|&H^cITbT&Z_fBT(_f$+uFMsW*XDs*^#dos=u_az(xyQNLC3yNdTH zKB4%O;wy@OQzR|R@^y+ID|&cn(N2<GO)~Vv~!}%EI2sucDRZVzjcvTJujou`T{d z+RBo$zNoOy*H#ue{<3~;V`0Z{HjXq5*gtq9Fl{WCK}CZG&sy{^=AbMztlZ9XX*aW( zITPeA<}$T#KJ9+$)hrQ<@^*-Zl`eo}!%Ayt5%x~jhLzq-?ICv{o>qSL^uWg{P_S~| zI?Bq32 z?gUAFKTL(|ecdVg)0;0op~WJtev3uR`Yjf0z_8jg4zpV!*g}$FS}dgL0^4k7z~(c^ z6|T(`JbDeADR_Q?rzbG^Q=2JxSkQaAqLxDcK&h&wFfdT6Ybg{3N{vjiFdPb4WWu<> zUSUnLFq$u7{5V4chF?qJ>_CatQkZ8_fMJ*j39SGGQ{&HQz?jVX2DPdQYQ?JHFY1Kp zB9;<@b)x};0)0290Yhei=p&h@5Q6nwkes*s0J0kGfEo%y5+NSb922VIei3%d&f=uU*h2Fy*V8~=3V*reK@7W=jG((Y&-ZT zkvKq%dhpHqNt`-w%?A^w-YfqQr*0mVeA{F=4v`!yKDi_mC>k*NdcZ)L-((ETXFq!R z#>P;LXv$E(4UupACKxdR11OjqQTXG>l?f*8Di~~k*TWy{!}@(1r``#f zZfW3;KJP{(<{>gXij7uSLG!QP5!W5v|R0`r%+Shf|+}6?8MsfX1I?64ACF;?&zoTLt$C4`4%1 zU7oSlRJ8%8j=MDi?>GB`Qy)S<;C@Faj#lLTfc6=RtRMAdiWeweu6U*5O^V-Ed_eIh ziccy&tGGq+w~DVQexTS5JBRCKKS*+5JQs-tL|nlAHN9AM>D!F_V^yE1>C;u0IRsE{ zsoGbn{R+kFi12@-;&;`4zhc9=1h%NX;T)!KsU4e9kDKGYivDp~3C0z(6!$fkU8#QM zxM963RbQ=mnc^q)alcj5<#?j}y{gM`g>L4QctY*JR(w&>aN4h^PRfYe|Gwf!iV^NF z*jp$brbr%$_Ku2O73I8uz2SLrlBTocFUygWB9U_$1ck?cq#h^s?MHvHHDgD5mv*~6r`48N$H(vo z_y;h1MX;{a5@)yTaGgV!UtF|n>yxP4QPXxkI=kfczf1dtY>Myl+3&KU;0-aA5a>+^HM=POua)T(GfP(lF*9soJSX2&TEcMsWlo>|aW6->_StMI- zx_+v(U%0WhbQ<&TVp-ppMwXag17q|IEbzDY8{j;}zZ1(;m-jWLad{~+xaF|Lu0dY+ zWZL40E!YO)4p`3Q(JgLcp;MUVj%o38Dg#-@9h=7Ah`NL6`f5bJpsD(ENG=)G3Qjnt~+#-~~@c>}NSwE6U-w~&xf=D;C(+3Y7WSS)$jisiCHa>G$Kja%l zWFD3$_6y|Gi6wzNiUnr{@-5s6xc#xhrZZuo|!v)*?oc ziWw>>UMeZ2e5M4OJsDCM=riKv)v`)~?+Nq~6q;ZPF-KSgf+=Ncgr4{{wJctPh|c!} zx)FO*PC6qof*8DGiy*ZNq{jL-oaLYA*IQL(RdXw==FX@rS+XFQlwhCq5B@JCIL&iR z=*>obi*c;NzQy-29P+CwS>OUUg2s*J1#mSAKrs z35lNB-lQDwNoUo_{L@eMmJRUQEQ$xl1COS zo&5Qh)bCT-)5aHguC=`&>xIS*rqZ3WaB)?fE7-#x!@-G(FTw-eXE+|*7-h+Od0|Go z#Oi2bjh|TSCDug}{JtvegM>1UjBwl@5Tk>!)#cUMBMY3A!%|1Kh@_>o@!PqFyGM8( z+^@JD-A-PY$kDEoQ+e+EsK1$F%pVbIXRr##mSjoS?T1^kYnxUFFUi@3HwQ2 zqks$r0ffuoNwt6G*WhtALGG}26>yTB+w zu9x8fM7w_ce=GM3>u2+tPeHeN&57{W7d8{PP6ixK<_p8uk&j%G2__%W+B_$#Rr7ew zaj0BZ;|ys0Stb!}`@Y~cQ9Ub|y%(7FM_*wc3m%ssP)mm9^c4nOE&GbcJLEN!FLFs% zQ*HE~g19G~CZ8eX274*?S1eQ zi0krcMSeSzqcq$mKc1<-Mnt`LD}JOX{WoDh948a=3FiepOZ8rg{fMv^sXkQo(W;-J z`ZU$yz8+`9`wHvH<4cSyW+|Sin5)=FQT8wL4_1AsVyWUd#j_NrD$0IFxp}I87AHvx zg7vyik>7XJZ&lUV3FH_|6lm03cmnoj7NScM|!dU}1 zsD6Xuw-j$z6h;a83^)0>+BYjcuee3=_lkc~ zJN2uJoY>*M_V=wVdS+9PlIU(X`pl-bC0{FgXRC8V+m-H(ou_&C;tyb7A5rqRzdM^& zaUaVzC`b7!lsp(425^+ppWcn}aC>o zLM%Fj*N5w0ZcxbnA}!7r+?Z2+#fo znKL)Ve+=bQUCxB!_JrMW?&AW%C0`obz=U4UK`%yZF_vnDWVjB&(* z+lQq-gqrqkswdO^S75>$fKmHG4cJRb9nRE;v2X{_?}JoNWLZ(!WjF1FFm()6u$RpE z)&YG)x&DnJhK0LB4N|8-l0YXc1b+nPKv}{-5vLG} zMI1XEzzs)U!r3BDCfpHN2|?W#3kF*}7FG#dR~*rG&Lk`raRQ+V(Q}psBx+E@34~RM zQD+HBREld6!D}XW3x~IaAr6TYDX{_(y?5#Rnn2_cU_n?-`G$OI9LdH3OM=#|sijbj z2wIoGT8X_WC!LYVODXvcki784jKzIM0KSSV@DQK6ce7c1`s5AfnY%Z9Y9H{aIo_hU z*E;Sk%mJTT2xfH**wn1kd!C+~U+h&6&l=;MIUJ1YtdaRWy`@zoRCB#sR}6^!Z!oH# zmm3U*Qp)TOG6}(fVP;VaOn?w{G!6OF1I)>SAC*1QJZ?6a9^!Lws)jwpE^u(EfcVcp z@ce2&>ki4gWl=^}Vs(qenpk3OYGPeV;^JuH5b!+BY_$xNRLm|1lbbBx*uqJF zj7LzxPR@*l^EoAuU24|iviZn_Suk?Ss;U;xoxY?BZkroAAtN3{_4;+%WrHW$!Nt3- zWrZ~uaUgV131Juk!i??reC@!eS;z;T4%w7p<^|Zm+bL);Y15z^nMoX*$kAgan6$|- z*z4uI!Exl}dig@?D=q|@G7z2bqEc}R8cfUue(9)~*?%}RVf~(hjKfp` zkkA7+5PtWWz;!an8OUAtoiU5zuK@n@MtwC#s@*LE`J zF!u?c5%qZ2;I*PY@5=i$g77yuS$W=*SLCrJ;*t>j3K7S*8xfg$sJ)jWpH0j^M3Lto zb$;UzCn}aJ&Qs*wnCTZP@=J#Lm5Mhj-mZ9;;{A#bD{fN!wc_uIQOBv*_Yf!l4o&|j z5jwd8u1|PAU~B9++S?PM$5rp9y6}8Rm%gV+7k&@=NX;j_9_*7R5d}o-AE;UYD$Y2SxdUf}W*1KSY_%dkC>Wu~>1K;wVKq4#+o2^(l(870*$uQmj_I zP;rgo<%;VSzo96+IQ-wH`kjhDQ2e3dX2oX|f2H^v#Xl$-zV`2`%W;E$IbOhz)E?!2 zgl_tblKi25q@wWV(7UTnHi+pbE0PYPe!Aj##WNMBDb7@slANPyjAhrisYkMA2L)#q2+*2slKN??Ymm;eZ`Ly@c}0OWsExfAFle5id_}E zEA~+ArPx<-pkk3C88g~- z`J|@jlkVNCSI@YF&*qgc#(fZ>A+J1iBznJIn|3{VoBHYgoRiV}bpkl$QM;Us(z?u> zO6$@Gd~3+&O(RO~*zLg*yXmH)M>cha7J=pu7y-U`L`ll-j|bBJU`b~%$L!ro_V~|R z(|4qG27BzZMDJG2pm5ghV2;;nzt$cl7Z<&^wcWI5>YQz0jn}v1mv^0m-}%@9^w1|trH9TY(rZpsY! z0?>4y%F_;uG>@mmy9vf0xdhwa zP3@9ABVV(Pzg3V;8T!bFKWuUsOxgvo*#7Ra{G}t!_`3$ODMKfP@W=j3CK!>&$oBUL z{BirZy`RR@c4;P0`wKW_v9yAD;}=+Sv)PjVpy(Fu|$#ILbQKbc-nS2nONU0L|iP#sGhAlJC`wi zfa<3yma2V{>QhyptNH@f**-?U4CJYJ%@Jk419_jK9#_m#JW(-Mk&kocll=}Htol&J zQpItKXDLoqoTE5Tu~KoF;!4HUidQRMr+BmCEsEb!yj$@R#m5z&R{Xi*Zxny0_-Dme z70H!w`~Im&vV?j}v0=a2j%t_VhJ3=S1CLibyEU@B@asUs(+*O*;b~3(S;NzQRnrYm zE91IRev#UjDAp*hRJ=^_>xvr`Z%`z?!}{E<_(R1XD?YBcS@GwJzfvS0#PVj0{|?pP zR;*L}kD`YgF!QG>W-78nChcUEdk*h9^c~`qvde#0_XKh)y%WJW4S0uJ@mz)0hjutH*-w}&Fz9T)oeMvOW@9Jb_ z*7@0{xv9I~<>Va8E8-eqRi7Ci>rI*1196ASe3g zGH1Hvd}LF4$;l-yW(n{ecen3u+3MdA-LWd_-heq|Q!}#JlY>5GekgQ>W&nNrZdm$`hOmjY&zT?1qE7m)oc>+z~j!lZq1U(}6oFN7`j zO%w?F;_@L8;{=jHU)*(6?_@FQje7@Gp66~KmU{|ni(8mk`rE!n6;ag)a-_*z0+M<- z)E2xZ1NM~VTl`A0D}lR~@S%GHYQx5Qr}dd~Tei|}hG?3YXAUY7)57b5vGYab{635 zKqT;~hP;I50xRKp#0YxHnw10>MA&R4CD#>hDpG^TItW>=>{3K9$XwaOfyhI{g0PzM4Y^qsq|MY8)8^LH z(!~ZTH=4j|ioGc(osr1vA~^9xkRuvMjrBKhO+}omx!j|FvNh(t4so-e!p-&#CSv{k z)NJ|yuPToD3Owy!OZmudv15WBwhI;VH=*!9f zNe$iyzl(}z&lj388{@c7sa!a#YE}hIGb)yxG9wtyJ->iipwFsUT992?kv%iN4=h!4 zmdu|X&z_x+ICELq;#t`}7;n}tXVo2Ms{U+Fee6V9Nlf}^YQDe zvf1U?^U4>@u9|a7o^xP&$b!7&ZvEoA$cFt;`#Os-^_vrR!zFFn%xMfhcPC_?!(VVe z+XKeZrsK|NbF}@e`z4=vpWe5&Fe4F}c>w#?_O&~?ei^&g9#sE7d&xTXzRHC_JR`%9 z4&`FYV8m09LumrZI{+UAE0M?-5qz$NT-`{>rVKM)gJ(9M?IxHse)k)hX(xc-<14-i zCXGCSz1~OKIL21c0LTYzq>4dy!MPg@)f2Gef$FTd($!)@#{#l{XGJI+&)3GMO}u`F^CbNqPbKMi>Ri^)lR#XxDGEwY@krVf{8k zwmI8)%jR*m6Oiu(lr@2MV<1|a=e*fW&bBko)1$;gurU5ClZdu`UvRcOR>@%YUSQcD za~fc?<-88o$Rm>s&6(2xRJ`o-7lHLTTRtrtbgk{X=X~u6@JrqjMFsiAM16=N&pqn= z;vpXFe68?-xG-AaL}Gp05}|ic{b<#XQ$1hxKB^~FAEh`>?Nd~rq56E)7ppEjpI(sU z&3L8}dG8_eo<;1SD4$W#yQzM>V!mQ;#S+EgilY_BD^6CNrZ`*i9K|ZdYDID>tjA@F zS1E2#yhHK3ia${Nq2g1D&nj+FS54I7D%TqVVp>H$nBY6sIfBQWX9j`Q$hP$q2DNYZNb6T(8)$KkaR5Cq2b- z-&ed}ag*Xt6`xc5rQ*wqe^w*~ML)Y0KTsq|MZ1riFEOUrO0lhCN5w9RX0Fzrs`pnk z{b+}(ewt##{ZQ0*>&g38!~cNIFE3kQCWj5@hW!LSxS(&} zX7`WfJUs~Y`p4!y@U_@qb{?_3!xr>u^?H=F-RUnMyVIN07IVLj-RYj)_pNoy-2uzq z>bBfN`m(pyE?@T69m{v%pI_0;*1J3}y5(NX>FS=m4Ea9Tn)+5|$A>VRYu+PIL+5<1 z6+@j(Tw{3!<}S#0 z+*9v_cmxul_EfcRp!QOALZB9?%Dn+UP5xRd$*=BX6U} z5kKm3rD6#vECI%n;xI%|poE~Fl`h|cCD08wEP{}AH#hyg8TtQ&<9ZqK z8vF<9MD!T-TEtJ|f1$i12Mjv#m=nF0@zahvErJ#|_rI5K+~2dL?k&amxk$j|sUke2 zs!m1yzM)bz>E1bYYB+UiJ)$x>e`-DR7tAdl@cB@A^D}`rxx$QCVs#|3#y#h$#O6fC zejbx=j-EBB{!7UmItLYZXg|EnBaVH1J7=IT*Hf10>ry+s)OfYFHV6gqwSpL$HX8c_X*_5G=vykvB z%V5MSk!Jh59R9d{tX~GA@%JsrER%=Ga6$_H%O1SFh|V;|yA(~nZ^PLl$q_6}z8`Bo zlhgr~FlA`tdKvgFZ`bb{YkMJv_4^rQn>!qaLga}|;CdNaBO+fIRv_Ptp_bfd%x`U; z(*Zjp0pk&{w?$2*JXNCr|Hv_}|;1aoy zl6B&dN`~fei9G+fkLDmIxy0l{*J2aR%{%D-g#*ItAcEt?V@*6eQm?GcUX`iH6rpUU{zEtr%#fufcuDC(*n~Jw7en;^U#h(&!b9-9x=S18j zwrctxRNtohPDSAnkxzI;)JJ$k=)xZYg*OE9{H4E9iYQ)>50U+b_4Bx~9u4_F*D88xqzT&?X8}flia6h7aC&gnFg|CIZuj;0s=3v!_Do#)| ze4p^OC^uW}%M{O3yhw4KB5uK;Taw2Ms?>*9JL`3e<`aGk2h|+U@P(CgUf}0PpUH3a zKB-S!!e@{Fj^X@5sK;;Z`r*{=S7vktyA|`7lsLzXtBci)tMli1AFg}X+i~1r@58n4 zx~F(MjveeH$J^kwe(8YM^8GD&A4JY_2b@^^;nu7Fz5Cs^D|bCwS+e`@vcF_C%43mm zd`k@V7vQn3!c81J*7?Zcy^Pdw&QJbf2$U8%QSUV-$bam?ZtQz)? z(UB|>OC?{GWVg1m{6D#f^K$SwQ}%a2rz2Lu`2&(~6jp5rmiH4&4T+jrji(GFsdvV7GXphXE%%o**(XI}Q;HQB5s{ z97HfjgaSm^t7|E+H3|6%MPkQ{o&V3?mjG5(T<_oe?t3qf5JFf)RHRRd3JO^;0%F9M zg|NsPKtL&B2?!V`Od?JBh{2ui`FqV%u- z?>lqmzMCgPifmdYnfIM@X6DS?x%-)!b4gJ5ZcJL7n8qr4OY)F@nlp6{TNHA&V39P9 z8cjGE5%UrWry^p$qATs_21YGdBol~eF2OVlhAvwfrvE`Kftwyj#PmD@Hwcsa@GD_= zrY3GzFa&uy{EwKL#?Gw7OZ$N{H5s2nIO+CrD%?4=G|kTMn49NalG7e8CB0*5WjY>K zCU1aQk^J?wG9^7g9=i3!!8@sgz3I<)!*b`~jI;yg81f5@N0d|9hF|Z;auw<$|stw-r z6G&`@{CL#%?GSwDv1LHY+NL{6Xs~Hx!CRV1d{T2FHp4*#=X!YF=nq~438CGK_+=)K4foY8QE82WRplpWCq-o5TYL8lv ze0+$q!5%NE_Ndnb+q)-w)K2K*3xW--lL5u?=$8z+*!Y)|tiMm0Kd^bubFg3VcsUw! zTQBzy`!1+&CpxViWH#7(EpIU>KM?jPTMzN8WPcij_SUyQnR{c3{fQTAV}HVa=5bH^ z689}p>`%bGtv}}DKJ)if?58+bkq`S!AFo)gI9qYP;x&rP6=`E=I1qzxJ0p`^U-*%U^!k} zi0c&BD~f#&^4}=`isD}t-%{MF_@3gw73=js^zika^|VqvUhxD)zJTs&K2$w>5$SI*zi-x*3c}J1TpqA77^>xYOsxDepS&Xkgp@A(@^OaGjlDdMl!#u*YCl; zWmwFw5|-v<8*#+=g443FK+3iaO;thKJl3 zrVTAG!1E;T65zXoE)4Jq(B}tuZtTPW&la&6!8*Z8pk0~u!`mStA>=4RDWd1hTTn-W z9gJ_$5XuoF7)-!aFp{hc{YDsrh`q3&js&mzklVTgAKPI)+-V`~FuU_$UxP$KAh|Y~ zeBN%7=OmMd?Iw9%GI^*?ZUaJ&e>uR6lwA`HL7wv?Lq{xj2i#)!CH)H0VwdC1%)#$8 z&Ja8M?6bXDh2HVC=M3{2=XmGd7VLso|XubpaMV93EwZ(?_)psC>emxEmw-QXO_`V+X(Y8vOc~C+BSd`k0Hwg0!x-4EvSz# z@{^EAeSC+q`Z%w_mI3J$p(9q1&|uRhfVVW0{(yX3qhfLUzP`IbvrHZ$!x?G2xAm;GwKCWn_SQ&t4%Rsm1<*K_s{s<0LSI+Q09hvk4kQ1V zC;tTUaZZ8_HXku?csPsE83_paz{$sc*313Fw%KzCq_ZAE&SkQ}>a)DXp!~qw`gq19 zgC~19$On6v+hYs@Hizf%$VvuJj*KAROy;_=KTP1BNd`|+gFJgM89Z3$S|wTO*OS4s zk9e&~vHb;{4^~u&E82>x%E=c`onGnGd$4e(plmv-;?{GH4)0yGf$mFICzc~6zgTs82V|3bN4%Q{baPGzB- zf%Ws;AWDA&d0dc>D`qR6rkJbPMN#@2`FRguIo>mfe4!+kD_)>zZHE(;m;Oh-OO(G% zak1i3#p@MsRFt`aD0jQ^s}*IxKrZ_Q_=L)zQG7vhqoV8|V#QCy&C=djTP#`NnHZ&v)CqP0cd zqx^%44=b)!T&F1SztG3~4E6qA@fAf{o+#g{_`c#tiZn$rJzbHuH}b6%X`3S7K`~#E zYYr(F8yt}ShRF|79I7bS0o=Fj@rd0Z`Rws(x3?wbxZd+xPd&-2ig8Z3H`{B$8E159 zsO@#TId6R1YinGU%v`;1Y>1X|rrvq5nwGwwc1p=7i{C%16jZOXN;y+6d;AXAR@m^qwN;10lCZI8Zav>#*J|)GW-HQ#$4fW6(JVpG{4A;_<@(eWvDX3h1eh2%G7GIug{JVko6XPRApbO0vHWbT6~?SORnF2-!jo zBbX*(mR=5+&WJiok0fs&n9N5=AZki)kfvd@I!fTSu{@^q838W2AaFz=gyok%_Smt4 zApbOuiX$I@KA<0fmUs6r=cZ2P=1tD;lzW1ANg?Lu98OC zCVt+&7q?eGy&xVY^YXs(4(5(Sf8ri;(Cv90cT;ch#%6DS#hMQwVIh8ZHz$wxeSP(l zd||bd@O>VS&c1zS0BCNn4X=W^(=tGtHYPwbc@gf)oV#L!B}YLJthW>o^>mcNdSi&( z4&rn~TLz?auje>%5*lpUMc{+_R=`NW_XO%oN3{ADfwpBpI?qBM^Vwk2=0gzFcUM4P z2GXp)6`*Yy>i8q{@jc20OY&JasBaDQar@XlJ|kIut3b0%9wNgk>;x`Rv4LrfKT@>$ zdO+C>n@Q7{?@^^~(rV-@unds(GOR%iwl6rRk>w; zHKDYbu}^r-NU_VMIG8ifZ`3aD-Pq4O?rCSjp({vTdOC1=D$rA@)>c-Q))= z^1+_`ctsvu1Ldzvtw2VSnH{&``VDNX^fA&n&k$yV{kS?`p+m zioCY5{9TIoDgH$9r;5K&d{Xgw#a}DFtoUceHx%Di+^+b6VmQ9}Mw>LY`?c5J2 z*OK~D?Ld=#mt=cgvw246&ING^dtb9z3HvibiXEsQzSz4W17C;8+yEb91MtP(iDluF zoKpt98=jK&t~d9CZEsE4u`TP9-cM}bHWA#jb9+DWueO8Wvy9T`AngU|n{%Ig;(@kV z@49oX)Z~5ciO7!6x>C0OiQF>g<(DY3oXC!Fwgx0;>4lklCV#Advu@1h#zqoi;rB$T z*pR?2hA=W3KPmpr#vqqVM}g*cMsz2Djjcpp_blGx;)soCLURk}GI?;LEi804)7gKXEZRU;{vGcuRxja_m=RKc$KNYV3|_t%mtO6OGU!cNSnR|a>K3z zi%Embc;Khy-CUfpyKhVctWns=l!MKNq2eke~ z>gIQOiBv;5b;$J!p3y)`I1#^^?#pT;nZOY z4Y!3-O>?%CZ4uVV&Z}ebd5AE%5vWGwyHnBzi6O+~^J4N86ES|+S{pXuC_iFeJD}z@ zy^nnvFKazqeDmSN4g)X9&F^1ys+W-i3tPU|s1R^^etyxZiO!w8^K-l>okjig2lVk~ z7vej;x%f_RPAG&4c2g%$J8x_iK7=aR`D;AU?$CVuLF`#(FY6q;eKJn@$BFM6?LaN0 zZQ$o38s?QP>GW-%zt(%ujc>gF1?Seq?d1^2tK*@!z3Jif6?f5gIN9EUcRgzjD8|0# zW1bD0L2&rf221vU0I!XH;CD_r2Y@yqyuSE07d~^?GR(~J@ViN9uxVq!TbfB9BVWYa zw#oWwe4+@}y8$osV~~&a@+p_wK}@y1eTsxQDb(QJNLFT)zdVEaa(ee4&uZ%?*2`oV69?d^KxYl!VF8}G^uvAqpN z<4!=^Y_R=od5b~$5!+kxd%WD=N!y!$gAOc*)$26!MG^Ps+_&D;2b)!Y#q$-%Do#?o zSn*QDrHa=p-lQmVuAuKO<$s{KR`Dq!&dX;N`R>fQW;`C*4!%5-e_i<oKV7k#%8QlnrTk#!&r^Pk@=!1B;yK9n@w!6fc}I*ZW-Fein5)=DvAbf4 zqMhqDNco|P7bsRJNlHagiS=zz z{FCC}6nURv`ewx)ik#m>xtzCqn5$;ngG>ExZIoOg54UoAw^4TKk{6e-cN=9l9^`l= zC=h6m`Ef^Ko$&U7{o7u#x?;>}^LEBw%-b1#r|Box z>^c@-%We9}b)R^D9$yCjy${;rTeuR6#3o5@>?yz8GR zD61)R&x!5`M}NC9w)OegQJDMIWJCYsy6p^|*7~7V_(JZZPjoDc>~JHGKGCA=+T!;% zI=8l1=;9l>o_r&>U)dY@M(!f^v226dC_ezh3qWc}t}kALRBsE?Q+?O{g}T&X-TxzP z*B8rVNPkgr8`PIHSMp;VW>ImxD|7}H6@P9e@xMiX`2PsHlK4K*@KSdrN=C!Kz;BvM zuNy8;6~}pqKM3vuu*N%G!3*F^5si1cGnO%VaBLegxLugG9x-+lb#!H^Pr%}q54Mo% zkAcWoFNN(2)>tov?aS0B@#CINy^oOPd_lv~Ae!FUPb~+FMl<7A$9fq?V`;r4#tfZJ z{Gp-qi2tW@BKH9D=K=h{(-amRKg$aDL z6*DM_Zy{o-EMcX{=ghAo!3G4D(1O!S%i|z_h{(+$nr1H_WSfn}$&mVi50LtmU9(Zi zZ}hUoYy;N$vi?;<`i0wrHL0UPNuVwkf<6Lspe&(>kfRBuLJsK*U=JWKVTzEW2=^E% z!L)s*pxNRfkV;@(aYQVzCd?FaIH4BNb7n87BVk%NoUjNn;>@BEmE={3uxlo}g+pR~ zh=Zbulvs_3d4$xx!jRkpEC{JBpK4EyBiSloNtt9xVh$qAx&*dLU`e)pA%Gh0MSj^YW_Tjzy3aOMYm`P89Q?_Re0&YsS2+k~!$TnU{7v2B%)HRxL-b8ubHIMp zT@fCKKE~Bi-fh_L1^fvFb4T0%YnVHtj?{YB1nLbdU99haxeC)uhoByCV0JJT`%+s)ecazXy)5d_eG?Q9*_%4R+j6m8b(7}4wH+P&k^0M9- zBDaG$9WkiyhiFtBG8=5#MGyq_y^aZ4S&&g*I-=FL2(&E&(s=>;n9l~A#z&T*z7GQW zcn$0?jgchz#rS-uysH|1q65j$pp& z*vN+1T{j_LKPuM1dKq{O1-CZ?4YU1+UE{a!Y0%hB)c^?{8#m1EIv)9G=d!`}3o)>H z&d#O{v%9v(ae9JP2DJJDA|ZqFBX-xM-Ie!pZ&@q3DQD&DI|dlcLAnBp%LpH}>D?X>S}xsMb- zRm2OJ)I)<8>!US|c)a2XitQCUD$-QOd|efLC>ATyV#f6I6gh2?{5Zvn6sId*tT8E#&OW3YD1vC|l{TSx5-UvM`p$5+X`R$7pk z7Jsm@<(TJoI-4HfynV^bWpBT=ko#GhsWxNoc%D3|A!##~L)rI9`F-T~wj+0apOjBf zZ_zl)!)f0pF+V&DbrE{gF&pmbnob`NXIe!ik8m?bg0ym@sbmKiyI{lE%fP9^Y`1M@J!WaPa}0xRZ?4|Y>R4@Az3 zC9*n*S=AyThv8Sk$@n#?z8*gOQWs311m-|lLY|OA2;GGoO6C2897!-O8VX7RHL=aE zb3Vaj98Ne7Q7pM6O#Qvj@W6<4&tL5!zqY-8iWl@0-r5{!RG4-p*-$sBJ*+o+7MQv7--8- zv>uVqlQvkg2Lvz~_+e$1ng2ukAzq<;`&_D>mj0ve_Ddz}8UvZt&E$8HFB{PYn>Gr9 zV7(c5is4!}*2{k2b`VqTw9U|{IOH~1eY7P6^{s4~v@`Ol+v-~c+Lob?eCWd_`@yEo zha{-){(!y=q*;9{K-)4@QUrZ}3kWR9eH7HU7W%k-+}=IeY1`sGv>|rdUqkr}=(2(J zGCrzkkzJ}Oo zdpFQd%X!=<*h+!6-hfERp!|rPHfg8j@mSwZ8*mxvk3jNX_T}xge2bx7vq-T_k?%s3 ze^upf&Q@HgxLEN<#hVpxQ@lg* z2Z}#dT&uWF@ma-RDgI9JkBWa+d`)qOqS({1eKeM^Ut)@>^Jb4#x$HOO6T3RFgUa(1 z#l8-?wbP!Xa%-ox^JlG{_M4hssW?e-hT<&6d5Q}a#e{`=u2=ph#ak6=-r@HASn*-S zpDC_WT(9^m#os8>9>nthRNSigFU6gT|55aC-(`OJ_6sme`Id@N_BZZB_V@!U`R(y} zyXwI$WB2oHjZ4VA+e6Rj)~%uT(2hJQK5q{lxMX$DHj(A-nV}oL74vR%mwR)41D%EWw^=(~lh@?L{9NYDkeutE$S6Cj%!QYLu;cCs zyBju!Z;fnS6mf5DzTHd9+z`2S<8isAN9}Y^8}ZP2n2oy@`CF7dUhM90-S;c(%*73_{3qt(^0^JW0wL^jOw6UF@?#Oy{|U(+vi>RQ%@Hmle}c^LPdS5JDDBVW z!jZ+?wX*-kt_p{e&oLnu>BDTXv^YTRsz}RVZeFd_DWy0b=rkOaBQe1eZfvX+6yKBZ zM9D)Jo+#-eGs43Po+z(Gc57Fi2$9akeOWiby&OeicQZle;_@aD8%|c{;w~ZkF0vTQ z>OEwSVQN>Fdm5}xB3% z7))x-CbHKh0q6(mF=r6L7#@f5O1>Hq^E?T>aAW=Yf;tjZ0XcsCz;hCxs39;lLXIZ9V5Ec>5kr_IYda5$A(6nkOn;RVu0e!>lW-j(44ez< zNSGF$N4N_y>MSpfVk#}^`w`J5!umi`vMzs9k!oDjz#z-YzJ&-2GAnz`klZya2&pZf zYMW(2%4}=#iJ^IQRB@A(8%$s`MZP;FZIHbk7}DGht>;?nRT~ zWN_-_@wuhb$IqHNVOniX?zpiv6RJ>CP43XX!w&e=+Arq_6sFmXLa#Ose+8b-uO)r_ zNwIcjhV8UzGQSq4+lgj^?XuaNVB6Pg-ggfZZ2t$GhaQ?4vaoB?ap-?}0_FPec05`R z-2B?l`x)J@t_zY|;q3D~+kG;Xrt{GxMcEjx#zjHMVX0EdonWC9v=9O|(e!*`y5IAeZt+slk$GgI6bo4YEd$bd9QybWX@gC>41%D(`vdxT?pb}bSJ*Pt@oVUN zCm^uo^+*fqTMK>MKDI9t(dw%M%`$n23_ruW@()w`kLf=|4CWh;jhw*(8kolTQ$-a! zzem1)mI1O}hMyn?+qXWjz1TH=`__ZTF0BSgh+{5MSIYodCj$;6=JUgFq%M|-64ptndI7)Gh;)RMADb^~^QKT(}?fACh4T?7@ z-lOx!Ed|E2i8BJDBE7geM|hWs&#am8%K(-db8MLVDNF6Hl2d_a+w zH|lvp@hL@4Q>6SQMcU-Zb21~5CMe<##g7&LpJEsnU#4@3Jh7=_3&mp<+bYtA#eAI= zyDQpxw7rx+S21-yZH3DDEkNp#>kIC2_ISo_6}dg$S7|$W-AeThTRnaDgqal+Pwx!R z3-%j9Uo=0qpi7s6xP-mWkB#9TiBNBTY~Gq{W3Rs3a&BvWo89YJHssy#`7Pe{rVN4a z*B0>f`o^}q=emU+(%#$_o%`mtd*;5iEp6^rd@(4Jg)auVkqxWi)73qb(vQW1Yu?)G zUh-)xGln2lhTV}smlq2fR8s@yy2}1_V{({=B310gP};NXq;TZ>0Pi>y3Rxend1UZ4 z8-cW9KyrdB?_?h5xcNR@WiGQDyPn!&VHqI^hfg=$c0h!ShEjaE{sIxw(Lqu@`@2r^4IU>fi zNz((v2qz=L)=21r=sC5nY-IwBeqM-VZ$xYf!EE#lmygX7+TfS{Z|;~v_y?xpk_RgJ zXK-MJ92qq`Vosc1Q8js7Md$py{Lc9m`MDEki>a|}cy9UF%CR#mhIH=LuVT=ws+tLv z6{XXwtE+JJMS7*KP2O_(-e=GfW^mANJThx8dzQ91-iA5AOCtMr%gefpH+dQIYU z^78UJbSTNo^Je9E-zZF+dQt~W{>;UV#C4P3p5Zd=dUFE<->ex|HGTX=LnhCiV7@t1 zFI!SWJ@MD~i{!>+XBW2n8!Zk;_r(?%+|{CFmYpyuUCaFgKh!*{5(xw`)uIFyC@SM1`j2!bSFQZ zSf9vrig;0#54bvRN05<{=`%5xvQz&8C)y;ff1^-(w0XFtdz5>$*V;YCJ=Q(WYa7A~ zPEO4wQ)|bL1J=$oILT6+is|H3j;$T*9q&~I_7w&rc_#}8IWHwlR;~=m!(?+2q76t^C9F4SKyL)Ct;X$v6<>dOk~%Rrjd zcN1t^2BedL1ipXSV96UG2?<2=zQ-USZNqcOXUkB=dKn%;47RU*V0%IO?Ryq9x~v)?VJGx8#MYM!<$tt=fVNG< zz~(v6!Jd+U@My?eAhLZ~h-@3`^+OED=}A79)E5v5Y3m`gKWu%?>QxYy?~~A8WrFQZ z!yOFUA0NQkKPGTbB|}4Of9z-W5w9V>?a#kXV+b#~vfh`n2444Q^WwP>!U4>FA&LzU zC^kSOav#w~#_JZ-PgmsJ0P;nOy%qZ_p07AoagyT2ikB)bRlHu2=OgvX+HK%n%Kt!d zt>RNeoLfAeiN7M^La|ZP`L0QRlk!`X7h4nbM$u_ZmpPljW5`1;b2h;V!eJtIq5IptD63n;#Ng#oBK%l&lElO8_G3SY^unYd&;FhfjP>{ z99Zx)7%=^8#ZtxIih~u0DUMOBRJ=%Wx}qGmMCT9CduW6}3v zWqOIl}w}xb=ajX&133sa{$tlj^Gp_=P`p!fa zwE28OEG$;faCixFfO`hQ$mO6TH@Wv9d*oWu-*X=%-HwT?Tpr_5OtR!JZTo3|r>5tk z?r)LceHW70^y+*{cvS)2*{8>jA5WSY8@mILtfR}#!c;wYP|6*rY(zZ>Vot`<2Zqfd)?V>^|RlNBR<@UYP6XxGbZ z+?XuW(wmrxjFM(Qi6l&h>-K5EEKN>u`n1Sxj7P8>_nZu4v^yoEncLh=M8)pcG+^k% zB_b=p;v(Oy{#424_3eHwj(780P}hjYBT+@mh?6f9ERSl8ZfTAlYE=M<=_q*yqDN5d zLor~1=B36DytBi2N8o;tWz8hoi~Kx7j*-t1i(ogA4;M2tE^ZVV5-G0Zlw8p~TX!7@mez_Q$gkaO`IyD6aO z*=-3-{wzQ?ZVFby&nG4fJrCdq>>g`EBuVX5pt@HlnOpC&9)-PUwsn_>4I> z0bN4iU?nChny;&Kb0D`{1^p06u!p|g@SvO<#ErBY2D;j&w~;h*ywjM#eh-EqKN1H> zNLIXk>8XwfX<}i&$>U~@or$@N#t4|($4rvkFOws`hBGbAQ?~JHg=@t4sWp>pDlpqL zXA<`N=e?TZ=2uf&35yugaRkY{wXwC6z~SKt$27{|_+1A}X;yqmIOOfh$O*gNlA0Xv zlD=NEiA6oVb~)bTa9--cTnaT^3NYvI>ucRiIxWThcEW`fvz$Y>6n^rw{4V$|J01vV z5|xg}Zb$bA*T~m}kwH9_0>$p?TRfAcs3U1ump1IX`PiHeNeioKv~14j&B;L{aL`O#Q8A={zoLGn z#@>7w*kLoF9rp{X$3YPA8dm4w!zbA96DJq z>$COFNYNL@vsWB48>~LQ0tWRJLJ?l0MIX&2R^MXKwhTyz%Z!-M2Aj4Jf}p;B0eu-r zv-)lVZOedk3ZUu34Fio70>AFs#* zjQlLcMT$!lS18`0NV5a;Kcx7$;&Y0>Q{1HZmf|+W4;BBT=;FYkz9x#tD9T(*$S+i$ zbCIN8A}*MZDAHa<`}I0ampOCbf1~`LG+pM*LEneUf1>F!M-KTL;pCuxnHvY5-^3<= zA`$#)MAVzBD0AZ=FVXaVii0(Mm?Ac_p8XN0r|>-2s4uRVt$3PZuA=NuRPh4E3dKo^Rf;qzQI8nzfLAI1Ek)Vikl&)b>~HWtQvTPOUB1h82X0x`t@oD8dk@@l`@MK27M4cu~5 zck1c8Wl7(~jhk;x4-MRM?^&f=E-x+F+St3cMe}1WDq6e4&B#Ox)@@9?CHh@wtD6=6 zE-mFvH^67>uV-828SG4kDCzU{PYENkc4{@31`!2KcH zt2Xp5;NB5I{U6xSxjqK=Xqg5aipUWcO1l>d#G>x|B;|0g_dDt>8V4OPWPgWw=;TFZH@^5nZ#9eX01$GMxHSw_#cc-Zn6nLKg2=7yh|8|=sELi>qzi6 z3uaCoiR%nAPnLVH1Oxjc;T|Ket|P%4EHn{b5IJUllGucpGW#enhOyPjF>EX>JngB)o_yhGr5Q zjGSBecOi!mHX)*udjlkJe}shMQE0*@OYDZ1hngc3TgT3K=G>8=-{H!ET^IB(KK`_J`KRR{-~Y6HZ)TwvUp653VSJzJY_IHp%6KdG#zQx^ zGiaOj?WJPfRNHL8U<>bN4YJhkciZg2vB`=Za)YlR*=ZrscX7Y9=@jXlVYojG>eg%dFU zHd+4j5_%7@8Zm*_$r(R=Dt(ItOHG_Pb}BLzmG{pXTU$GG^0-;GP}}fu9J1nR4mUm% z3KT7vTiC&wE4#^73bZ#(KD4lXHgHZCy;0d<$pi#=b@v0mIuAl0^Vwk27D5ozHz}Zx=bzPg6KGoor1MMY`&&R@$s3Rs z)HetE*dDeo6Vd9s12oIzAu`;S2A{Dh{m1klBL?%8U?bUAHZYCxF-0q1gM9rg17y7n zk01uyw=l51*foCpo&}9vS`9D(w%vxSr3mBLu_-e;qe{j;zf$n73V1OJ&^gXP+X$8Op(`orqhT)tW&&C@qR_=f23R6=rbyRLGibWFDt&G z__pG9#Saw!qsSAT^;(;0W94aWq1?`~%~k$%#d8!(6bC8}QLIpu{R2JIm9J4uwT;rA zBipZ-Y72cx<<>U;3+10w6x%%Nc}e*{D9Y3PS=%8pP(o!w82*^FV~B-bxSbZf9J_kP}JacUO`7+Y?|mgO1SA8xzhs%a5&Oo1Gk8nAY*P%bM!u{xN zObDgPFb$7m@0^KD2uB`7Lg;9w7V*4=L(zXSITopTOxr5_lhRlV?lEwY6Zx~;28T%y73yCN##uH(o?m zW+7h!HiPD9H^C=rx4em&h0Kk-8);2w@GaqnzloUnd*&%+tx-^!Cz9>MybBSLH{Wsl zl3iuk&dPFAnjVWEK6&v8(LIm8rLwv~#KR=3BYysj=rmrUpP>yCF3n^}2t zUes8H=4alv%s>2hHa{;1&8%GVvkl149l*RNGXDif;Rw&V6`~>*@ zb`uQv@&pyqUKOusf$sGHd-)R=N@Bq@`vr8`g`t}&O%^B9lU z)H&6>#K9y^;K8G_h1vHoxzDR3kz?e9?m`YCBoN_NVL=@UYECh%cNWoZW>lNJeBST_ zYp1hRB6liWyV`vVvohOIW~2nO6?uG+kkAFcY!K!}3l*e&Xx0aFHGx${o%h|ruw>h&K`*2dsGpq*EBZVlmC?`+kihfD zY%ZT_CGdnWRS#8(XfP$a`P*!@1*V5n#1ps)rXzG~+439h;@L-^bV40Pa_%}qt?rZ@ zwjQ>|RLy5V2`phc=scAq&+VjdUT%UZ=x;_+-?%o=m>1Pl_Y+zU#Z|Jv=<@>Kml`*xirQzFn_62a~@CV)FOqNRIdSXpR@}i#g!m zsp;z--*;dKahKus&IyGu16)kebo=`CodW(PW+8LuOrBOft2Wwbgd4{>`z2lDz}lG!q`IFh(BoVdzMERoNp9SWZuaO)TtCirR& zGaObvId*3^F2VlB1HK;?f*OXm1RHGHIS}xj*oJj@^yMojpJ!k;@a@Y3LEAFS`v>Tv zjmHK{j)lO|OxuJ9pqs^L>Cu&0qlyOk@0+qKchKu#Fl! zi;=KihKCV@?MnoRP5ZGpqrS&8Gc9b`6GeU`Tvl<$vm2DT*`Z0{M#!I<-n%?^xGys=Ms zKS&*CsPBQ-J|zD4V+^N4H*N4dE{Hu8OB4qw4p-!h9P>?9oThlG;v&VX6>nBtsd%sA zLyC63_Y2BzRD4D8RmC?Iw<><5=%Ity9$f&x zu>nIqP4mss^m&TkR{1jJS15j8<-8A2-~Ea|SNS^S*DL;7<*z9JSH-O=|3LBoDPsMn z=#45iC8C|jD&JPIgUUNAo~4-3^iswCD#z{ z`Ad}Vr8q#bTydl#?`70KQE`gmC5o3RE>>Ksc!T0iigzpiK=DCEUYn_Zt>QYxXBB^? z_*+F@XPIA)Z{QZ?-&6dzVwA@l($f`>Qk1bY$m7aqE1srk$8c!&WcfnH62)GM<%;Ji zep7L*;#5UBpP*-<@{1L(QCz0DO7Sj5nnGFsPZgh0v|~85#4??8m5DUI5_c%tF&f&9 zDYs)Zvc3X*>R3#X=Ig0Q8!O9=P~?4|{6&g1o|2!hNYg2Knzo5i?gu7f*0GOngJ0ct&u&{X_rq=L=I+>*^-1W@Eyj4O^B#Y2+go$jAeAz2 zIjuRDpT!4=|e> z+aS5ay$Ip(cBaK(3_*vwp~dcB!AJjqG$%?M+k)tyLC%j}j|N>9rE{BkQGT!D(&$!5 z<~nKLV1uu5??bM%0aSUndn@Qzcr$(*$?5x0E79ul9HsZ-&`(-1vGG0J$Th7#0PSSB zSAbJ5$-HSYxKBaWgqK{mh`B}~HsO$$@s!MaW|MQsmN1o%`kBU8GS%};&*YFw8MzC= zHT@ZWjIU(&Z`LP}k3eK_=QcYUvJ7ZzmI0y^MDy#Az$S2S@q!eQ+oo)v+mc&}a?RY6 zGFvqEGLOp~7H#I1yIDA6LfKB^#yud!t_qGegjF7cs<4~%%o1&ndGu{?RHtcf8A5&`1t01iow6wEkE_7RMUO z-C z6Xih)a^fPD6Xiw(Ig!T$^t1-}p*biFGZ0Qj6sOQ6IvQq99f>@{OsXSMV3?{pKI`>H zL~+6Zkz-i^iFroOT9+CUzkV>Og9*%GT*HvM77+sh1UB~bj-yS<@?gpGx@5_6TN2aR z*(-kF_F0G1q(>vdaWr3bCA7jXHyg5ZiQG`o{p<#VhU-#&zJI&uqTaTBUu5$;@{I7~rnJ;uNefWL9Pkgf2M+0$p z9dOcuy;)H?Vd7X=N-JtFsh&^+$1S-02VJ@pj+-^PsuKB60+H#`(2Z6Nd}z zDM1(5$6FWJxW}#SNK60vA#tH|ycQ$CJ|yf@9q9<>@gd8Q1Ui&~+w|Ah=#RO}75$5b z_O9sHb3iXZ&vF`s&1C+H3h7~d+@@y6%-V^vzew>}4r4>3Mc{c`Q#-bHR!wl%4CpniUs3s? z7+lD})gU;wz$XA3c)2gi%t$Qu5?69mp*XX34HhzF6gBQ^fazWEbAWw+bL{~gg6FXF z^icV#4>cTzZsSvO6p?|?8^K_1(T;Nhgv^Hvx`fnxOk+3&F^0Iee0;`9tv7gEw+{t8 z4q&?R!)83zQ2)`0%)>~&4AHg$q%1n*x^o*WSqwo?-*)I*jYR5WA6R`j3F_&ijf!>) z8!TCwlJ9A3c%|*MK-w74!FpGt#FGwxGUsI8J$P*>b+C41(KsU&KGP&%_s^L88!C-mjP6iJiWR3#MKH{~8;}a(&la1cMwY{Fl zaC^Ns&n5CP@pPQSIQ+%7jNL6hvw0lQcQ)%GVwlUp^Qf7}j}xh*%1>A9u2`hlTd}_) zUxBD+tl}iaixp)I1L;eZzh3bs#qTTfJfoh66nXrU|Apdu#TOJeD88)tH^sLVcPX|; zXHw6}ik*nCJ?1N(K}>fXnTL;jeUu+S1V2J~vE72Ft%vz9Ruo$;_^UPljVfPBL_MpB z=wC6qAs;6tvpmg3On;gPy}wdKv+LPFWxpXG&pGDjc}Q%dn621eF;9{AKjte`Oeo6! zgS?;eqZG#|UZ{AHVy)sF#mg11RJ=~{2F33w)+yej_(R2?DE?GY_AlD=r1BdT|DgC+ z#Z8J^6t^jUsQ9rW4Rze^ri!f;Icu46+6jrWJ_cxQ`KPO#mOZ9h8~zaGIeD3K+5fZijOJUbs2JepxpB+-=HXCX^?YGANBr2F?Bu0 zM=IZ?NFyZkXDM>FKKbJmPg0~KaLTO>zCd}}E-CM=I7rcs1<3U#mONguTO>cP#4Lv- z!PMg#mnxB`9^dx3?x^XupCms{3Y*_v7U{TadTs;81iIySY3P{1edaP>Z%kn4!&sq_ z*`zG3tYz7$8!%KA=kd)u6V5}BK2cpZqwICq`FF67vHiH~yRGo+ z((%!Wh}`&KfQ^4RZpyI3V}haM(LnC|j?ZR7D2@9SUl+oU^&MY~1Wye5MN^>+wtQK^ zF^(Cn?|4??0tt=8<+JrV|2s(1177Dr`(EeM177DF zXCWiK&OZapP_OeWoDuXo-$cF6^N!$TuEozkK{e%#%XPBcNocRzooQlDB)We_`}P|4M{}F?NPHGKT5Q9Qd(nfCaoF#e zLZ5Yxt)ymd({b)#?|ru%^|?O+8+omj>|XbHw(WRs3^E=LgCF&s+-C%x+}q_8GBA>9 zo!mFIPVTdk0~prH{Y}Lg94f(ZN6@hm9oYwlN?Oz(DruRzEaNCUSklTa%Q)J2wr|}S z11i*iOi}};6ktdNJ^7vD434TC_bm*tgwmH6;{l|N-#{7q;qc1wUogBv6E}xQh}?%9 zb|FqtIlvEmPQlm*fmbIic_73QJ!j^;IubdEaBxH@K!kiw9f=+yA5JJ1`Rw_1Bv>u< zu*Qi(4kEB}Nb&0jK22kwgkZ`HBe0wqGa)qz5qStk!!S^OkgKaxPB0pV62>E<48bZZ zuOnqN;5beOZf(#<5_#UkqRyZj!-H=Ob3?gNmbYqxWsoev_FM=(6o-U826~?DISh$N zKK$@8y@w>vo=+?@^gMusbo^2s*4@|^Vetzab}AyiaIio=bjsF2PUwah!5R-NIU&h5 zW2X^H5wX)2)RE|I~_FoAVGEE1CRu>A6e zeQyJ|b|~U`hIbNIFyviJJsPPSzG^o?Oj`%fq^Y7dI>kaqFN)1`Fap;}@@5?Hb zo?`a?twToTftk)nzU4AtZ(M?C5c82LW+8{)&tZ|t7Neq@k^qi@)TFB%Bi z%SQ;X+N0-?)Q=DNmFwV<&wqYcXrI0=;D5wc_mUY#JZwgb_--2nU_lM47gyulThI%t(S6JZw+W$2BdR4=6uFUXs~J1!3XvAJ~r7edm1zP zCG_!8)&{F@5d=YfBcLx2GWN@!#*E&Ez6sb48?3$+5Crutg+A^l>Z6IsZtq>7S%!5n z3`j@+p|5RV8sh_sHs7mg)C`+R)0l6q(l&{!==t1j1M6jY6fxMoWr6;~+n?XQ=Ru=6 z)c^^%KwnqO09hvk#|i??c7B6=4H+|9hROy(3EwpMGRF30A+l{jeVbaEmllX6*m^B* zF(^L}V@9?f;#Xyi$hMjNdJ-c0i1!wb8RY|QV7foi#XK6DuNqWT$ZUj)s>;b1Po18e z48!Yxz2^eQ=?fL<*pXv^ZL!aIP5ClDxA;EEbsaqw`za1qMY@<9)v6Rc00x(B; z8CwEhq4`EF6Xi--&JkBQLtQzG)ORsK05 z^vQY{q%)A`^?=CdBqEPdBCi)jdEEzQE6-~?<#OBr3zaWX?4>wBk@q>~zd*4oU9qboP2DWtSCJNP@*D~wrk*D>a8tfWQLc+=$>SNjP15c0 z&SwSYx5s_z@t&)CaEaaRdKbF7ZqV3PUY7>1cUfi5%X(v5o!;JAa(yhLELyg#tY8Da zAK`T`bK=ekckak)^xe%)`SZIPxkK;;bCb2Y^{m-GD54{qJGpv@DPZ+8;wN{Y%b;#I=&F4nOL<6TAU z2X-FDyVz&0e8mAfJvCsw>v#`&-IyFop~z;I45je^@pdA&cg`UE;seRMkl=AF!Ydjl zlC;gt(~c7Rorhb&V5JL3RFWfG70hupMdmvX?~zP?=OJvr^B`-Q+}M*y#;BECdBfpn zQ3tp%+9>N^V&J2HL>4E?6*3E=uYsH&T@CSNQI4L>i}pm`OQXE9V+^Z1H|`qu_sEs@ zYw9xJiAcKw$szNdh*-EK5*j^3$)~PM#v6#A^f^xGGdB(jYgagOr@q8^jbm_6MTrcq zFm!u#M6Pa-W!wjudk%;2UnJX!Y=Wtoi0V;{DtW;$9>rMSGQ`Y(;Kwax(K|sk6>C znCgxM0|#P;8HHk}E5m&Zwm?~~I?L*e662s`8lt=SXo#AXLc}|o(|itvY*< zVi&#K%4OHON3p`A*kCY+!}yUu#?m-t5Gd%I3zrQ$n1m%cA+V{wxdKB(>FA`?F`;@3 zXp*BnEdrxGE&Z1Gqdgc&@)y&{6-qy>QH##Q2v3~I9_MHeQSOeAgY*LjN?@lav=;I_ z0`K2gGgDnhB97=fBMDs)MNXnSA_g!B2}F^T;KL?{AP78n<>SjF*c`~&lDR?-BCt`A z;@1zRA%h8~%uu@}W)z4T<{@H4hhQ`e1?7j9pfJ`!U{Ti@LEuvY$`Gi6%F63V84Y~s z@B=Fkj_8mdiD<_{Y_VV-TbNr;WoUsF@ghhSI-1tmq!LV*&UEV%U`i1qXflRuNb<27 zJxnk?iB&VU;=ssRN2Dht>uCH+NQ#D8(KrxQh;|FCoVyrjBm$2i6WAfa5aeIQ$r*B1 z@b@b+1oKr~{^EZWgKu(E%{Pj%m-e>&#XL&kq+5rNVl>V1X2db-;We39cKWGjc++#d z=5cRYU+)yN=%oo4x_la1gq1CeE}M8lC+`;vau{^sz_oiE~YDpgzXbF^w0n zkqsHs;QX_pRvD1n!SE2z(vn z3&%9*@I96`@FK-B#UY9#6elQ7QJk&F?PU3D6qhTmRJ>Pl zjpEN0pH$@W&+;1-|E~DD;ugj2ivL#pk75X&&GL;Dk5W8A@pQ$(ikxChTV_3*F-``~ zBBq{NBKS*`ze4$?%5w@k(`D=fDD(P(YcyTfKY)Kr^NH;j{Ac7*uZL?gu{ja)*2;@* z7xgnRo#!bLr@0`HE%H2%iSqsm%vQd=VmHM?#S+CsHP&#a)-T5a+WUXXKcx6GMH%Zt z`isiT@c{mh%Kt_2HN`g-<+wn;50u}f_?aRtfb6g4ipMA(ub8daUNKiujvJIaTlpeI zUQ4NOs3IqQlb@t0#}D{9%G1cm^c9Mkwp_F+-U9bXkGy-8}8ex zTf@H@UBDYU-th|r+GFisE643Hazoz3ufE%PE`40B-ge>KxLEuujOj!bHmu=5XIR&1sp51oU+-J63 zHRUbHtT!z0&rZ9~`@@R*{;-%@-7D2A*1z83rpfq^Y-1RE6ZerHVyCnK85d#l$GWI; zqn&UM$1uYE-1{MMhJ|4SIX1$P)=2X>cH|X}Mp-P7F?RjPwcOXSv=M;hfWf)UNRNKu zPIB!Jr!8hSH+Hw=4$A=(3!i`-NuO98w{W5ykFq|oc)VX0oes%7S<`cA^kYacCeV*9 zRi9XGsq${O0}409CzhNmzE3Q!nQ@Du6pk7BgW&S&+N2i~#Ou{0$eMf)mAIvsgXB_` zCQZrqd=&zdAB!NE^reUS$)V+aZ|2sbNgNnwggI=a%GU)kEt9; zZn}Vqg?)kSJIpNX-@%GMt!2o{;NB?ywD{a5{Ff(27QF%uDH{|w?PL$@a0VdxCvBZh8Gd{pJcUl>}D#})MO+UAF2 zL1D;%!0V9s)*{i(FqN{}AYqtEV%F|$n5w$-K#V~|aRMKq@MVyBbtG0JLe3UEX-NF~ z!K4l*FozikAoVOFjQRvN)+B)NgDF`aELmQcELm<#rux?6_F3Orq`M))z0?3=!qEMR z^9((JD%o|m3`jqu>dHY1T~$$+JfDD0fG$-zJFK75gMdqw{-QeCBAvRRvp+Fm=)Oei zg8W<}`yX__F~BNA_XkMea~7Ym)Xx`5HX9!fA>;`;l)wgwpD$`VA5r~$ksODJ5etIZ zxdA_43nAo&#GDTYcKEPghvVwVEkk5i03@N!1 z)=s$c4auGQ&IEBjymzf$+;9ajZZ$Usx!t`?i800A9DffM^r7&|RlQN6L1lo6E!?ip+< zo6<1%VEZyo1^0aNGBiH9xu0J}5_oHJ_Bq7AEYrbClBW|dm0-EaVs%Y+@W)?t{~cLVV)mN6p@2LEF@}g&7YPN5 z7Hqye2uSm>oPqg*j|ld`q9f!mgZW`a%cLEjc^Fw=8KTt<(uskg?aT(7Rt!N<-%9A) zjzpN>r7c!pIe1%!I^x)%V*&z8R;J`T6ADJyjSr-a0UfOOnpSu;Lq66^xvjSbwABsL zS)PWvNocTX)4>Pz72F!RlKCK~P^m=u1FGeKb4T_T2*7mI3Mf z1N!*wTN`ZJ3J8Mwu7N)8C+cg8X!YF%nq_R8K0=|%DgDRv2U7BlL8E3sW&`suu2r=1 z-y`23%K%v~1D}P1?OPG(zZOWd?Ry?Hno|vskd1f8u9g9^P6iC4_{Ti?3y`lN<1cMc z8EuBGQO4Gr1)6OObc0ica)FRxUb3@6ZX;X5x>w6 zS@Pa&)|3Qq!|I1@J<1dH$JZFhKkBRb%49r%(y<(nXfg+!Km_MP|Td|*_?0=+>P+s;w_$uXjzhL>mkPl^!`KhZ&rLq@!yJ{D7xCOcCAP1+Kv-7 zU5+Q{%~QTW@hru26ltC1_7734P#mvl{h3Wyezu|J(G`nEh1c zKUaK8@mWPVzEJ*m%Kt_2RYf_@kiJ#<&lK&rUt=C;NT)fPXvbmfnvZrWKSeQD(XRQR z1)AkJ51&}BXulowP36ZbPEzFR0Op^ic!{DI`5|Ab{Pl`AD$>Nwa`!1dqWG91ZQe|O zNs&fx@~V%r;VKD=)06ys@Pjm%)hbZ`H92O z)Tf9f;Zx7!mMV`c+Vl7U-CvT9lir^1_7=gVhz(iG(lx(xx448c=?i-HD|2~bXmGLW zH_5>m$cqaMio9lUMX(v)>h$*Zq9$dn%8EC@V_QZVklxzD;;-#Z@z)mqMj>sunbV(+DaUc4*p(yv>$W7oCF zSFdi{i;Pz{j9e{zeDn6p$CQmNt1SBi*1O1epQO#|-z|!*8iUAA3kD1}{g%f=3_B1I zPJ0xb7mm=;2-d<}#(n9=cuIszQQYe=n%P2;zDx+Ebz#DJOgKj_gW(9Bj)lKNB}G>o zjoHjIkCKtR1c!$rhj&2-l3YU*jt?Qpv7>NDUR%QzBs)*|w`51p7;{E&AZcu+FhJKqwm@a0K@>()Y~~T=K&=;ot{x z_Ul)04yhwJbY{}08`lRNmAV3`mGugDwDk(t+IWRK#(IU@XGd^yW6*KIYp~xqo=4<9 z3<%c+^;0h)32}HXFh}v1e@^<@zWsod^&jqGYyn#pK7p{Mr83| zxFf*GgWnNfatCB6uB3aed>xUn@8swPjHP?P&bAA-r9I9t-nhUf0_ zLom5txU$P13N#KgaAVs)zU0m^LxJ%eFC)jxjNh4?i($O&;!*B~nw;F+Tn-bqsx9{B z_C3YB1dFdQ6xeQ*mp#H8mE-j;%=KpFoE8dU$nS`cIet=TUx$;-UOk*V)YTh5JOmEs z8ZfMQXuQt_UKbsIQJ1(C#5+&@#a)NQ6Ww7ygqVR_R?rt+x4f__6EkhmuhOSEk0!vn=5TvtxL6_wzXO< zqE!n*!Ig@&|L?o=-S;M8ty}%|?}f>C&vMVbGjnHo_uP91j9|TsxD&9+{UG1g%ducv z23e;BI~QX{$;#+EsAcc?qw^h>!(KaU3~22wu48W*?C~72eTVZMeh>B-lgTD)ZxtB9 z_HBkes2x3+a&2bYy=yuHwzov7PR+7({I*p`QB9= z7^S2AW|7tBaczr@=j>)|hg`d*dwb#=Mh9EFW$*vyEx^X9_2-6i?bbZlC-N8G7rBP3 zFYIv*(_rBUVX1JkaJrD~p#DPP)k2OFkiSM~d`O@-i2jxE3E}g?ZNj&NyM_O2ap`*C zp2p)-A{_YWf9t%&UNL_ThaW{3gUMsz!2H(^gjY@758!z5rwVNxM~>K2f3c7Q_oPjrGvJRz-zxlx@IIlvPJSbr z?{1;gWPb-~?AhxfD%xHbb*~4zKX@D;bj{lV@$EXtV!6im=l{*i&F$K?Yb@6F)UG}w zc4VL61DR}PZJ!`Kf`i@m-(7!Yd}Vz6mce_RD7Jd^4i?7;#!u$@x70V|$NW9hIeTB$ zw62ZnHClJ<;2o`6mF#@8x~%!&9j#lJ?0l{I@%@o2)-^BLxxM<=``s(vXpTsCSCs60 zy_z1wNB4VIq{7Nyuo^BS>o|P(sos_$`@*Lm-{=jLc)i-~L5&Z#rtSTA&++ksct7|I zpV=4QOrPN^!0`T*_agBI@pbScx;u;9wEY?H`d^CbdfcR)Zt9-&bK(U%`V@HU;Yl29 zV&|FFa-gnt9{z;=%E z_EN7aO`ll~LkOzZ5Ne+3e7(&rD4gn2hn}90?>+Qglis~#cRUxRyeP|LPh*y?@w%Ct zRyg(NEaXOCBt*mK5yIhZtSuU*ODx3=FEK&hBD)}SB77Fu_<2u4?c&HQ;LMMF8@d;n zm2~hC4g(QZ{5(1m!-}8xW2lB}#m{rOPSo{}(W`72lKVIC(gwnY+q)yOW57$Jf8H%z zjV$kaX~RhtQOX6=>E`oGB{5{r#+Gp=%f?A^IztB6i27tp+k zG|b0W#(I+dSTq$z>c0TKX-}pNeb>M}iF;>5-(}HI78?S^uV$UwnHm0fjOv88ORN2T zqx3-VI@~}qYJ0Nk*ZMwDW*}l+g99VhArARLBi5Pwj&pGv;_tA*EtN~$;^*5Cc>w9I zBEID3bBR3J;PX+PNGBl&j{%`SHqV(;Rm02(pO{<2jOoqJocT4(@QDl`6k!%Nl$ce+ z%sj(4k?NKjK31zSv%=@IF>FAmN#B(_QCWy9W{H;t`S7ZcVb_P!_PsFE}h& z@H`geYbCr^1eWu?R!Iwd+ejo94Z3eg=VOaFBUXk-t_<_lrB{IFVHpshM<72cK%bBN zf&jf3dA7;gv&{(B39(7n;O`Hy)ptIK=FWHI3#%cECNjxhJ|bfIV3}l#HFG`)x5t0@ z(&pntSYKMA{4q&6tOOLSpMpk%HzTh99#_u%RY`-+|z*Lq3scDtPQj`^R_m%J4ZW z!!Lkl4-4vmG^qvt;#Pyi2e_Z88%#m^UEEy0pwN92dWd{G9xp z&e>h_$4{vmQ$7LFxGKxX;74EfqzMzU^ShhujF~gav&&1zPx*3Ie|>#iP9~lS4)p=S z`f#rBgBau9Ig`;}jE_p8{ml7GG3U~I)NxOR?y`HRPRLnVeY*GKg*o1f&i~)h{64dD$(%pq zT>7uX0<7gqO1MuD^Cl6`uJ*FDFDA_2Q8|#lUNQeBmsTW?$(I)6?`!WM!reXtThK=| zB=7{_1E4UoO~I0S1(!w(E=w)AJW{YUrQnKi!IfUYRdf~=X6A;*W7S!k!eRl15+sq&8&0$D8Cn5P;U!vDi^YV5@p;r3B`7b(RiLCo46lL4`2(nZ&_e} z8$)LI_etc@oLK;q?ts11ECFPlOm%%n{MOQ+eUbTV^@!$0O0t_89i8uJ4;t0$Aoc<* zleP7b_%ha=1?&62vd+x5nf<;kHXb8BcMk76Izrq(<2yPq?%$2DOP>+@7jX;li}W4! zhCTWU`U(dN`JOSuB99;O4dD*q9-$eV zhx`-KAslq-A1eM|zT~G9F?M{Wu!x8Yb)e)N_aZ$;^hDA2TSwKRmk6(ro*A1*xf?{A zF?rA&2cx~8iT|+Z$3#CX`gtPSW!4R0KbT1KK0)L=4v~F~*j#9S1cPoPx}7jrm@n)p zED)OWi*f@*j}eX&P7+=qtP;)@ULw3y$WaTnYlZL!LXLKjf1B`5;eEoN2_F)g{s8?a zML#3_i*TFpE#Xe#yF$}1P~P+hU_{52!<%de*LD+Q!ZyMV!cIanPz=2uqU-uYbO_x3&YON)X3m1t>YiQ{qZIvmzd-972t>fLXhdn;lj zy4@KuvFq+hQ*T8rvvS4{U@VxDB1zYqWFK5SG8_eLlN&M@61bB(LItebG z@3J4b(Qos#g;I>aC6u~^R5*qHL+{tj_dXjX;TNhP5lt}{LDa-WOa?ss9b{fPi)5Rd zVL0_v-}Wd%G;FTSaM)b%(eNBFQ+|#j;agokizDGX@Hf@H9xS&v{`ik1q8q&y%5EVa zc|)*82aqh{lX5<`dbhAhF{SRXw4o&8w8brLPl9}b#|>~RJ$&Fs+q zkf0F+e}~`*V}>UYe8Pt&JBo0SUeXL~8yk`NQ?Q{Y3?kA z{tG}JK5L749z)953RcZLAdy(s>NEc=HfxJzt&Dlv2->nTuuWpy^Rb0+?1{yGejLE0 zfV?Uo=P9TwpG&#+@vK1G&yuR?uBvN(KzBeumxsor7Wj*sA5z%-yPYP(*#@~pVb-k7?#GkM|A7}r|Aqb0lj4?~m#@MB3V-icz#w3=ajXBg( zv@sLs7+L)6F^64>HfDHL>5MXTCTCW^8MCUZ96!LH@0+Qf5e!;4e%b{^SnhvRA72W* zd^>f+0uHa9?i@5WV4^xk6-X{LtHqu;s&ra)`Da>ymF(6>7c;PO^2~~=7~696f&EM< zKc`PoQIA-=K7&TaM$DW!tui)oWzvoE z^J(3_eV`wuZ{X(1duLH*R>6{R!KGfoWub!0U3yJ^TktqS^gULP>6E0GWcmU79xwQ9 z9Zi(|D*Pu^<#VfYf_>(jbvNb=;{I#W$@m+^X5Q?9e5MAI)$0f*^L(3TqF(UXX`ir# z;M+3P%LT!4Fq>?)7Z?}rZgpuH-M>C;{sHfwJ& z^0o}J&egD&#f*}bEdU*~wroL3^uUkNd~=Wn#1T zZbF`A_`b<>Ckm~qV~_H?um$ycp-~sIfD&cg`0Imc(|YLf*xST(4+B*6hZF~wh+*^i5S>D=f#GOnNCVyk@dy!{IG5I+CbLfH^5G0 zM#cfc9D(GS9*|^srl$sJ_OxX3Oiu~YS@2^7 z`!A_v@{BY{lUMsv#XvVc+XPxLD3pWWLCF0cl zR`@g#H;Jv1zbty2X#S?5{2!uutk_O7ehq#)4xrh8BIx5poAGPV?L~KyyinLje2y=% z+&JM(;R50Jgs9fEo7W=SZ;n5Z*9U1kF4{tL8(}*k?p4{?Y1cME?i*PNpK3Nr~4a{BbC z_iv$x8#HP2yBx^p8|h<&#|y1LgLBa-&lcth&6+Imt-r&@$Fpls%-Sr-M@zp{$N^y5 zv+?m}iMH|atUqLl_|_l7AzqfV{t%A9k~V9&fEz?_6h0(;MEI2OS>YdrFA28`-xTf^ zT7Sr=qVeToQ*W9uQ^+A;wx^XaN7z}|L)c4bLajl6kmymubA>a66~cMK1;T5DD}*-+ z*9z|uZV)~wd`S4X@G0R-!dHcF3U>(K6>{x0_tQK#qRIOeE?2|1_p=|VzcnErH#K`d zvp*XSi0cP$j=xyP|C?CD)44k&Oh@+fjKh5#=@4=K&QM%G_+(;VWn8~p6UDD~G{2YL zTFm}rnya-pPk{Q=Flzt7+MCwYji#JK2&Xm!BxCt;i31OF^5Yw5I30fyvHXmig*Obv@>@iqAIq(k&pf z%tD{u86f`&vLU^-ZXwA=yn*{!DmPkB(!}8#L2?GkVm{4Vz1F4zQpKsEsS|q$fv8HxTC=oq$_dJhrS6p_rDu*j=$f(4k72x^ZJcW z2Ai|XHaL=A^aTu*$Fipz$3r$2bDdE+b7IxRSzt|=Rei<;4E2}K&7Pi570?rB&CbuR zoRwXc*A<+q$<@=x$Fe8oVJn+cS}`%Zb1Zu>Hca(AW73T3?%iYA6DL;Bm{5gL`RvMa zgO%Wwl~$Do>FF5sFP&7LJ*|Akq^ikhuF$&75$-@G0}k9kUlnzt7mQiHLYd?*cl= zx|`3kqAPhte)aC81J>p6DPcOu)Zi_`PbUMS*znWZ zqzk|I!5YisoV(szG(Uw8h8HOF=j~kn8whRoLr))M1@b|DyRyGcdV7;3#D18(3 zSTFgu-b&Y_fWrz+m2{=4gC3O8{9f(*xLo?OTHO*?xsCk!atO$fG&4045EAz0)iK zv~|(f5NNh@IrRQ~5IyP#4wuunkz@QysNQ%**gm#{Z4264ibmyuXOpeh(iVgKFT<~7 z>mmMMUTbp$+F#4Bg;ysP>E<)pX0^L{iVBrX1sc^Dzx^SM*uAjMD^m5@E;qAf=!e0rW5I!&5CVWe{ zTlj(S6QPSv#`f12n)MN&jlTj|D*mm)yNMWQ<+u>>ej+-!i7^HJ$3z>y0O;pMzeohV zUG!d|@dJR*$UBsC0Fd^wL?0*G#Fm1*z39_~ap7Ph+QWc0#Ph{B>l|RujOPQZCAZ`H zI1EOg*DA}I^A6;7OFAZOBkUmTBtDJWD3?kO`cTE(Z{gCoX;T$37 z2#~*6c!ltLLenoGze%*|AE56NZTbo5jiOC|0sU*yTZAtNjb9S-zlwfSxI@U{Lbm5$ z!W5oI(Dj5_!X`pKXDM$dBa@cY6w!kdIY z7XC!YVM~_VEZib|LAXu$hLG^G>uEwh9>#q3(0<|v7nT{;`c4tN76la*V#-3P^t5{0VIUEYjD5p< zjY>8i866Ye6Xev2M`m0temt^4EOU@}WGz{V8#Uc88h(i;!r^K{G&~Nn6yp`~Y59$oHG%f`4V~NpElQxEAKNfusB=TSOq7*ZPUw2VT z?IHX+i&EGu^Pb7oCcHNB3V}Z3$MkyE&*u`K6QB5^_(UFL>H`w#B;+u@PUw&A%Zua1 z#;^gX41W{JuiwP+q6Xr4B^8Gzw2<)?P24VD@w}wsu)2!D@oN^$$7aK6^+di`faY!w z2+$*t9~Gd_N1jheTYfR}tlHAH8NoUsHt8Dt{UNr4gy&+h&l8@D<^N~HbNR>D56^YD z1;A@gw85l>mhf4W_`@ccacZ0bKL)MZD>)o-ir}zI)bgr*aBrWr^7a=9Sl%aR) zWvR1H!yo)Mk;ML^5%=2PMmfrn_W#cCx(Vd*Ul?9LV0^usy_EuaXFYPM8 zcgEbmiEm|386R~_Cu8Hgqa82g+fguCy<9Mvk4Q+p;M0`vpiCXHVb~*)#x?SPOLFX% zI`&;Pj=Z%^W&Vy|7GT(HA!I>&vtVx#gtW)DSbM{ew`Gtu8Lub{daRdxTQA2?g7)HQR17?utZXJ2L3=cm1s?4kZp?im>`~7qYmaZ9 zL3>#Nd;Ga<+jj%DWG|d8-^gisJ zW(gqcW#Tw%;Ium(GLCM{{T-Z)0vKtI^5}}DUa(Btg7!K>mGCp(VSXiin#O)&GXIn z^4cP{5VjGv6Xpu@g*}A@!Xd&DLUSHq&#w6}=L7UK$*YCm5%S*3`Y#iHPiW2)`0P)V zuNB@Z{IPI@@XHzl5A!&p{;05l(40^3&3Oc#Bz{++jV%=yZP$K`5`C_4qR@_w&lWvT zXvf0M`9wV&HDr5k6mr0g^hV*6Lc3;zBXE@O64t}>gLHi%$K*(N6`mpNE#wSr$_EIo z55|sl8($3McC6b>z6Nc5F^g1giIBsqv}e~=TqpWQ;Vr`3g&Tw$g})O1TF6mD+WVvM zP2mpVhr*AA=6-aTG4~(oI5lCv!o%2JADz0{*iSK&^19~bo!a%Z-26j~xp&RagM{hG zYY1j#qO!o4J7Y!d`PuTfmpR_#_~en3Zz&wSwbA62g#)%0F7=jr`$K!i?pT)DWlLml zmWwZWgi;X2sVY8nmp8Q$B0UX71g2q#`qXe&XkH^keVV=dQpA+HbzTwVMUV~MqRRmwYT{W&n}7P1yT`0CFmSwxaP!1{ECxWy!SyQ`mvQf^=FMK6*eN)5?} zQ2md<_sIn$FG)z(lB93Xmp(*teu9j^X#Hudcfj?q!23^q2Fh~>lH^jY`g>@35chT~ zNE}G6LdoPojE4F5vpWgGZhAUb25_E#q#e3b3p`R&g9{6yHl9_z#sOU}8_4vR6m(0& z840co=-0TR+sG}5AlenpX4GCCP`~yHfXtJUp9$f<(WO8%k1yw9-gOeGC2|*3L~~6d?3NMYPqKVPpnOHG z^24B)f%-oTx3A!zRyE}KwJsY>WUHdi2ZP#wFaT0gs)tpY#LReX2+A~&IMw7UtBBI& zd#*|B26tn_i6`)EHe=|rRiU(h|NA&(T8I2>%f#7ZkyhAJ@Dr_b+ZtxMXZW-SVVcQ~ zAo%AMalEbuu?!na;42@@UWW}!4+#7{il|u&YnWjJ0!tEXn*#k3S?HM50)Im$XMbb* zJ;9gye>Vn*f8Z+r3=y0LmR40vnH$$M>&kC@1?30z72wMpV@u1*Ox(-Q<1g6kxUIYf z_+Uq@6+Y;Z>!tPd>h<@IS?kT|KP0~cqcdgYWP9~<`s8_|a=h$Vo;PH%_k=TX%=k8^ zcE3Y{@WwAilDyw5qz&nKGj=&tXiULS%b) zcE0MEPBW{k@*Mo>%$9U^W))*Sf-`F{!aOC0^n(-k>1qmepX5g>MwAR6F*e@2-++-oyHg99S}FgbpAMS6;G_hneZ0 zFi`vBA_=y>uW^WwPrgIta9+wfcb!gkjuE~hYmT5XRC|wxk1Q%G89p3Q34?K@%yFO* zb&%6VZs!MI#As;3W|Ij7PA79rXcad_$US<}iZ8Pf~>uiuQ$ z$x}JJ-=IDt2lU3{>?@B_#YbxG?|sAqPX#_9dS^B%Sdvn3X}I7rui$ci;{&{|5R~%! zOOD$S*_0xGt`5 zP4*oj4u&m5**n)_V`_^+D{ZF$O&Pa)g;wtYH0na|Y_fWrz+m2{j`-0Q>|3mt=>crP_I(oA z-$szx_C1L_nllSv(m2>V%@ROcS3~3j&33Mb-k%SmNBuzeaB@*uE||xFZ|mjxVcUZC z#-X3K2hS#3uca*p`Co+J0@VhRJ$gRttB5(p{=(zoCmx|>I+~bM$3mUQWFxkOpCWKy zPJFk$&Xbt6@SgKU`XhLc;&}dWq4}u^+Khh#r-{#d0QKexmkPfp?<5897n`Wv`jdeh>lz#IR|z~bNGk$ zt`bfEGHEkT4LOH+NdH*!dqh7Vn%}sk{I{ab*dFLVihf!0zlq)<+RWXCeKR)~`W`Ms zwkJvi-AME?qE8fklIUE~obO6~GpQEk%|u?%oP$eyOgs*}T8Ow+8Du{u9TT<@b`W+F zb{C!@EEe_^ntlU2=Zh{EP7#{^1Nj`$d1weK=@Cg^^aumyr8`Gj~pYqrO^6IY|N}q;`b633i}HO3C|af7fu!0 zwFC=9FBV=Y zeoJ91A;&$b&v9yEUB8QsSv5uSDj}y@Q-7iGyFxPv4*oTwuNSTs-X^?Lc%SfR!iR*9 z2s!e~dj24^-|pBZ+T2I=-a$PkqP;$Tq~p?r{02ckO82~2ASL`LT@Jo>;k3NY-F)>U z`%$X=he~4Y0{tjhyU=_2+d~|0@|Jz!ZD+%mQe=E71zU^ZOKGy-d;f%wmwYmI$C_yC zEvb8>Zsy)-D6%)|mBfebi)IYp7ag$d<0gB0BR_0k7z|?1yZ$rOVdck--gA3)+!s32_n6>o=$FuELgcr~ zaafVUE)S*4o8~Fl>Lxf#N~!Bc_dx3L8uZ#1;xGIrZ6WZ!4KrSc5r&gmLL!TbXHFz1 zoYI>*Gs*5f*Kkt1fPf3-Uj|ZZ07)0h3M#%qR*Y{)9zVAdKCvIO?~vP(zFyBbDzc~h z=H3S%tpfq8;mM@J;q%z!Xm~In#Z6h_wnUR6{3f0gnFo!9k-s9lAhHqpiz6@K@B9eg z7B7l?3wiigma^d0F7H68y!|7B(`w|SVIHD-(Uf~rDv?Q>PPO||Zi9&am1>e3M26D- z%7Q;l=?XCZl@!=cxj&^R=yda)nGGo}-!nZrbuvt_rwu7&Adfgse!l)QC>6Tj@DZws z&rr9k*&isH;ZdUNq3Q;F(7LBF8$+%E*HXFNNb*kKU^EQ5-7`V*MxMpUZ0_l79Pis% z=~V7%+KOD(PLgMk2o`TUjp%V3iA-aw(1cHC-f>j0KQg0Oa6EV16f_oC@TV+j6->e3nu1MPBj0YW zX2A+m=p~kBp(vW(*a}UduHYa=!}XA9#uFJ0^Y7Qe$5S`36kR)sz*5$+V}eK33Kdny zA#{*%QFJBYqbUpt)i4+mivFWUHYikM8x*PugF;caX;2qOE8t5qw_PnyS%;$szY>1@ zBoogt#^VWVu=y?{=IF73fWUGG`jT>u!cc-OIkbj3s@L%)@x>m#B!V@T^d<2ZqTh`3 z3G6y1P!%)du%RHK3LE%y1D_Z_e+hW(PWTe}0^_6b>*l+XNlDYASezXUo+;bU@colu zDRyX+__XjFbT&&Z!iF$cgjLwEA}18s&$GcY=_LGJfX#Kr5EfxGei*u63fdH$WLz@L zB>gZfatgK-d>aUU7-s!?M-$8i=8Pna#s;6)!Ww4SCiub#yjim_Tr$j>E6W){xCR?O zm9nsg8J-npArT^J`1bc!X0(tZw zjXg{TWnPc@!hvhGy9+;Aj#mwLSv}unmOe2Y^8TE*Htc$LRWtvGv>fDbub$ZUVz1%E zso*@8)*qY)s&n8si^bY{4`7we6Y!gP@S7Rm!vAjgtAv-Pmh&tb6iZ$t<3NKOqtK6+ zW!x;m(H}+t`l?-PpVepN_c%F!e1{xZ2&HvIw_GhJ5O+Co^ge@o?lU{)5{|?F+$UF2 zUWrR8*=)JytaA`}xV1xL#}4gXT%6Z6S^h8%wgbIt=svxD*QK10zU%KO9ck=sI%kQa z{$KQ@W#DG>ZzR_V&CkR~7TW0fMc^~6Ftd5Vl1Ra&DFv5>3oiExmin%=|Bf$>UG*DZ znmI%K>BDp~wkS6L=TU8c2jy0;qw@H9U{XH*2H#QeBr=KbZng{=FJfzIjR$0f$ZNP0 zIm`xvPis9MUCof^bBy-bF8_5A8KqsY6&$j#b(KMG^Hen&*RIOCwl zdRd>Xm*b#8d*dLCfoGGI)%B&_bUc0=Ly7j%uvvSTA#ckd>nwsj>e*yvi@^xCZ+*ZX zuQhA$2IOrS+E@mAmzqaEsicgroWSHD7Rbmdy@Z4H0IZtc4rV#zM*LI-3`z&(Wgjm;ts)HchS8hH)}zl zKTxz;0|I&+X|%6QSV;tbzR>(mhMf07>KPveEA#THxAfPeAB-{w-DV{Xne@vcN5J)b=oNsa?U>KLBe6e^MqrC9L}a*h44GVi-jED zruxLs)1NbME9Pxy(DKjCTLuA$-pJLwj}*20s8 z*0N`ue7et`b_G-y+d=EfvS&S?&hmO~Q3T4$)KobD_C@KtC;- z!}65BD%>U9E97WB@B(Jdzx?Ax9}nFZT{CoF2IvgZd*CgcU$igl?jrCm|M-fJhQdDx zkKuqNkhy0R8EH79?h31D^T*&Xe7yL0cns@p8M7~Z`lx;34vRnjE_{W9KqY*I*UDFT z?ZZ6QW?#bSm3Yrt1Kbg)E_>v7qq=sDD60e*}mjvkN0i-4SckN zEa3!K>XD zP$2a~l*PAPRwEz9L{D6y(Uf1Ld>fgxxm5dQ$}+YDUcp5qH;I&2@K-4@Xd18JZrDzF zDCH#3>2x)Q@>7jf?=7)%adPKVScGlnQkg_QoBiq9#_M=}K^TH&VgA$c$jYi|7S3 z1$l2W1$j!ESOrs%pTknYambWmbFV721+$r9jRnXwu?nW(@MJ+2n#F=wUt|liLz;q@ zvY=Hk1%F@)Hse0>-EtiZt~brR+ZOsA3t6Elw9^zqhx|D*$FMU-!~FaIjb}5t@(pJz z=(?nvv$1t^HnDEbrq<2bEU1e^cL+BpFRZ#z_1MASog&+M(HxOi2>hkgya`*#nLVG#79c+tU=oXQ4^TnXIN)qQKObOHG5-4U zih#UgKK1;@jPMl^*Bu$264yj~FkG_QVM}o?qHC2|R_HpT2^A(glHi|*YPW_qufxU? z@TW4n4jWvb1m50^Kb0BoO28$04@kfIAsdn1WTbrBnUvhm3f@@i@RFXR%eBOmsmd67z85?>y;WBLSuT~Lh5&1HJN#pRBMBuwkWcd}JgPcj!@L6Yz zV+!%m<18QS6tILZPOhfp?)p{|2V)IbH(@(er=WZtHaK4iexI2?A6b*gyBpgPe6yQ; z?Zn?8ZGKz+=iejx#y2}X8!pc5{O)7m(8!)Kb4GbK7uJl?hmF1}XLWJu?D9^1%4ZyY z0VBRJgSp;#rhak0*@ijZ4ESZUa^Ros>1FhX_w|MP^v!Orpl^0_efnk}ub7zE3DibI z-CeQR>k#YYjacmc#+g_E{#Ay*x1zt75%a2YyoT`Eu7uBamwdMWzqxCzFVkP~XMDBE z(24)$WskMI#Ee;&)9Fy1uT!17L#>s5eqRhMqV&CyzSGvM@;uDQjijQ#;{!|RXCH!~8 zkhf*1{8LnPT7Y4*Wp(s+z{sZusdpUog7vOD4*omXYzBT58~1})*N^))3dO*;$<{j) zjG(<2T4L-0JladcX6^AM*p@-oi9$#{o2+ax7(sh)1neEokJ}vf=%=vB+FMn}-utk} z{bT$1d(F0Q9r7%bi;d}LsO;W4$B*)Ru?6+YuoFk)$9)lc1t@D1>t%WXTX26r3G8np z$ZY$bL>|qV1u&^O9JZ%f0%-TQt{-Br?g<3K-dAbw-r_Z{d*uzemsZV#4+zwk`q0O3&K`N9c8b~5VE5iSs3EnF^K zBeZ^8{`h9OUkV=)vhR|=Mfj@l4dD*q9^r?=PlU$rh4S^#sc5IEko}ePnL^{g0)4*d zslrvln}t6i;{JG_@MlC^gvKw0@=uC>mI(Sq(XWVpOEgD#Dd+Gu%kLL${7|4dB1?G_ zBIsj98$T52cB0K%Gtj4r?k#=eheG)wqK!Wa^f>8VAgq>ro@nELg1sw5uatZZ5&M0U zkYo33*8{>|iT`WiQ{w+Y^q+-qi*Ni;DF31O9}BsPhIYAphV?O~F!4n3>FJ=H3zo?5 zBJ3%CAJJzC>4TvD1mR@yjsFDYxs-_VMdB|JUMoHa<|(Itg7y7Kc&GU2W`@suE#-X9 z5VM3aVH@E$erNyqG-Q9racVAXA^cDM&UA>-&bh+z!imD^!V86qgiD0<=&<}U;q}7R z!dry53+ZB^{x5}f=W)>ILix+W*M;V~2j4`$0-AXoKr?>>7*YSH|Apnv^$u(!+Fb9T zt)I1v_&tPX9tY%oM4u%bB|KMHDl8Y$AIJJCgmn0jzEpU%aG8)!AIfhL{-=Iux_nsv zT_GJlq>U32SYLEQA-#r_e@jRg5a~Q&fv{LeKM>_-3ymuh^iXk~bH=tghnBavv=adD?@=H6KNue%1%b5`%!J!$It-IL~Fo9c9M_FT0nb#KfI z#T)O6_87h^^^_I6oa3I`<(}JkSLBr8yHbv8yer&)_%5$U<6WV1hwpOx-?H1CnpPaz z>89Vj`;vLFF1HkJ-~G3#ukUU_WBpw`ju>11a%YK^nd3y=td^7Yr4^gp@Fr=d{OYY?lcjj^-U7tlvAk|PJMw?H05QM zji!DNkeoEIh-LYt_5-s*+f3(jqyI44VKccV8ZLr{iN^XDR2lgcGAA+_e-}oMM|MGk zb6hTtJc7UTBiBLqqR2z26!QZ3@JBS(JD`>NKE#P=tZ##3qOs;dF|CqnYf>%&GlY2o z^a3Lqt51f~_@;?ytnV8sqOlI9xF+Re(CIF3^KLJf4P$x$B$LbAR7M_iXEMuQ)*1W> zvISp}c+4Qv}5#h@a8%azRv7JQ4%sC=6aR03TOCAuTT2AsOFyM~h zDO=9FYc$NcO%2!+qGA61IymLe%rFa%(@)N*vx4{tA!TcSysp6^+~rNMlXRC8Z^9mX z&c&NeW*rC$i1%0lGwj%P9qb&^fcud^@qvEyzD8jv;SMPbtznMpb^PdbnPSy1!RihR z=<)(eB-R*mW`&7m*isn#v~_qDvQJ?{SkiGd%>2$LCf6{-%L9_WHOyq70U(CdFvC|# z5Tk3jW+5LN+Chl>{JAyEaGoNRW+mFBN?|OKxTA1whl#dbLtBSugJj!qtO$>o>@YTv zKSEKNZ3KMTYzvzKE@6<#4q@ed0fhwu&rZ~-cDl5g@3g8R#X|<6J+^EFOq-O3zZ;DB zYyuB`ou*?{&NLSbjM-`$2|3G+F~8tQTM&-mgk7p~&(fUbeIs4kEFThSRYQ6Vier`a z+!|(P_{97gX69kT90daFFiI$3QnC$0Y#ThDRVvgq5H#VpcXU#G zAufGCv4$8n_>l?8=PBZ>HG9dE#hpMz-T}liY>44Ip#28}5yO`h4?W}c+EZXl zqM%8Ku{ekpC;Ju=6?iZ#l9I*2hq8DB?7oQ&wZ@5N*utqSAZGck=}Tni!5n}gV4HLk z{+gi>XITkR<%)^E?y^3}nsgKXzJv{R6b9sRBgCI|*tYxfvnX%k*LxPSCjAkA*`-mw zm?-=GyCJXR*T{01NR#Bi?D)N4);* zVZdX;9B$r1VWK!`?qb^pXANY2ZN@D32JNxp7RdNlW!SRJ4krj?Sj47*P!2if7x;hj zMaeoI+;0}YA9{kt1O$kkJ9avkxFepdKhNTTMejHZiAC>tqtf6q7rmR)$dO9i^?!{C zv0hfpyC8OAs}sHNGnYJ*_XjeEYG-yt6%qw~BBY?;`G z<(%Wq>ghF&b?TCbVACDE**WKQ>D2Yq?Dk%IPF`-OE}gtzAdK`@r{{Tj9rL{JAO>}; z^S8jAmE*OHd2@3*!JIcc)~WO0Q(K(axFgvzbO$D2 znCTW==6}H2d7YRf>Lw5KDd^iKUi$yGwJYiG5Tf}gdX?5#aZ&z ze2bI8t8)%(I83Z^5<1AHw(zN z1???DKRsBzP^*<}J!F0n^E3DpCYi#{w?N#VsKg#kU*oHYVa@t^eEh^Sl}twy!#W0a zHlO#9TJtpyc!#LH{Jyr>zYo&)%xfcr4$bpV#B>{jI9*N%!nVZv{x^du?;?2*VQ(RS z@l!rrc&@NiI9bSfS=8h2JK|#DwZiL!KNPMLZV)~od`S41kV9m&$NobH;6WK zK0q7aFZAz|e52%>ML#QiUVJmx1Ld}h=5vB}_ln*xninbCVdi>3-axeR{em{@Gl8d) z4=fV$UPzjb0pfJwMM5)o1N>`9!@gNV4BD*42YtKrHVPjVa%CUw{Z;q|5&Fhw3;uhe z|0Ow2mpT5tLU|rcKLzsIA&uLPLG$|`bX(Ewg?YkLg}sD@!ePQu!fy*pg_XiN!Ue*` z!mEYLgnX{BUAGAD6y75={TA{~qMsK2Uic^B%fdH>JB05EKN9jL!1_#o2G$qdPmRR2;;Y?wraDi~K(DZxge^2x(q3QqN*NDDF z$blo;zei~1K7sy)XmdS)eoVB9X#x88qRn*y`ZdvS3(fTb{wJc%bpbk+{S25cq;HIL zD`9(Kw$NNBkarhdAS@Qro5u2^h4eX+o+hjoen+@i$mO@xqqCE^Tu65u>Dz=q5#A?! zQ23DWH^L`{TZMlR(w|3re;4i%($z^m9ehOkw}^D^5gQBX@gq$)DY5Pv{zCEN!V$vJ z!g0bfAzg;F!!Jn^mkR0HB)v*_gYY)tox%;mjY2vdS?*ckAB8Uow+r7C?iRi)q??lE zBf?B!BjItvmO?r*soz=HL)c45*Cyq|gy#y+7t+~DIh`cLdBO$4%Y;`7ZxpT--X^?L zxIws4NQWuyJ|%ok_($QZ!tKI$g&zt(719Q`G-0NYK3DQv33G&AE()%8N^5VCZwTcpRb*|pL%L6kd72%BQLM3CI=mPZqO$G<@|uTLB&f;FfVBN z`jg`6t1^~meEVK441L(Gnh=Hn2lBV+UsM)fb+*U(8XW;}o9 zvO0S^dwVw*rWfzn>fA7}cu4U>uuyMH=*A8w+}#`z|2u`o-BK7W{^!ZgMdtB;MlJ40!!;=hiE zS7X6*+mqs*;!cN(EzkVjnN$zo8^HGo+&%GU_C;^Pp7cZ%l1)YX(?4y!|M>S_fkv~P znUOv_ch7mFdCAV#s}X}_6ZW#F)qpe&(u<;<-=uub;zC%xD?ffloL@2cyg!C-~-1o87$6&ev4KyXmi|7w+g&ShS<0 zDD+-~koR5#uj9UOM||g?XU5)e#tS8@x7J&o{sZ^))f!Tc4YUy%y3fA zCDEVkb8a9fn!>`G)8z3dQaDyZ@%zl4cs8?BQB%0%6lVDh3};`&>@m1b!`(O-f{9P& zUC51^M`ASmFT)J~3w0q%3g?KMxF~d~MOs1TM6QI%g^{9TE4pDC)fd!jG4-BSMBB zFU8N-&*L-c9m99h%_Pe8D#nOpezEm|Vt(E)w!tr!>9V!%K$nMyiSKVrE+0@0no&52 zS^hp~(1PS(lKeT)fWIN#Awxl~B8ky2#~sRjdJ(xSu4-~ekmNgh7Js0*BT3R|7T-_Z zQ6wj0YsgtxXOrT4Y8GGi+|fK(oD%B?T{(v&BQRx!q2iuP@)eSIQTaTQsi?7`ndmfz zWP6gB=wt}aRc~nKHW`vr-FWsSeUIcv_~U+?2cjtsY}Q>Q&mRr43&|4JYRJ1lHk>lU zam)Cl;CSqQ*7qqaCpm^B-Kjpw$9C2UDBw<{^cIrs5+onCjeY_?Py7rPDs(xiwK3o3 zTjCMb_+e!Dh-_jtnsUI^+G_UXhuyic1muQ%O zzYcTVzLHOC)Seg@3_)W)0Drg;H0kch2*cDIqaZf;$_Kx|(VTo7%tOqvGlLtLN=NLB zUW++)Z<~yX1P1}JzzUc#KRY2nfkeV63hv%R2oxVU$BwUCm`X>m3PTgKLclZw&6rI# z09iiM5W|F!fphOU%kN&u4A%tE@~|4_Xa)tKlt`x_hlwEszmdxetcnJ^*a{Aq)9mmb3=L}>t9+!tkjlIbJpTc?I-rZ1!nIqHh2^A5ogrO@YyTF98cS9 z=yO+w&s&Kl6B;|i$on?r*#xU=n-jEc>o`=si;V3NE5jpKhIxJ79iZ<)o)>Av@#XA~ zetkZDxcYduS75{R(OJanu;KC{m{(|AGrV3N@Y%lu@UjftgZTL8+b6C_J|S6mVEQm$ z9j-R4;e4WR^s{`>`ijG0%p@LL?iboIm&h9r^7Dz@H{`4A{RfjL&3(u`uakkVk|r)R zCN`L27tSa8CN8Yv{ev}!oCWi3)qM4l?%aUxte{-YnHy+MLe3+=7ZMx+TZF8`nWX%1 zCMzJh_pZRqxL6#l$?zDDP$Q&J<;`Apz+`!h0S07 z;oZO{n&Z!g9oTkbdlwsPwdr88j{|b*1?_zb+abpccz>QLk>7ld=<6EtD&YI|BeSD3 zd@+%)wmNRt<6C?4V(mNxz?vHKnsKsb>k~S8--&t0<~aT=&2zj4(RT~H)0ZJMR`EFR z?uAv}YtFu;3?+jQ z)tZ23!c%q4N9nO+hm{O>>=$T~>YVlVRZsg&PPgO7dC&*YzQnXVMLohq!=jnfDg)D3 zgA-N#&k2nkn~0p0{F0JpDB1~sPOal%YOclcr#9ANB@S+_Ntm-LW|rkS{M*^i4<1{) zC)=5}I8*b=`8lmxU*Q=$cKE=N!;3j7u+X1pn5d`Ld|dx)JqcOj+dB!4J|^@zCwBT* zp8XP0V*ky2%H(v z<-MV4GKG#pm^polih9J_@l=eMiHj#Tab`sf&54yvA75TpR$dkxQZaKvd1d9yiput} z{G9GNU1FVc^YZiZ^18>`Rg_OF$7lN5$Ie5MPUR|+ojwfk=@tV8G;?uRqdo4q)TqmdUJJYL5#{;V>e4K1^oJQ*8 zl$BPMIyvJjE1jG}%`4?O_-0d67_;Fb@tV< z?!3~u=p&;su4j|A*AI+(mI-|01pMHFk!HwKo%YzSy7Nl6U^KCxH3GTK)}2>+ER45I z{Blj|O+uMqz4P1P#|!jWFV$_m97?gak#$aM=r}QEl&owv=%BrfY>YsIM|&I@v-app zv1O2T&W61q%qUse6`+ImTEHHEY0)09MQe}aXtoTp&h41W1SHm9nllCwj zDq*kgywV>xL4;yfrbK((HVSjaf35k^%_|*&34X!-wWc42o#6hi3LL*iklFp+f;@JQ zhr*jzfOdaz7!rM%;+LVfjTt4YM-2SNapt!?y0~9=qn{qEUTfc?t%vlNF|X9t zL;SxqkCgX}L(L=gUs(=0kCeA>bN~4wVu1C=apOGGxRAewNsktm3#SU_2svs(Jzl58 zYlOVcNZ&5pApDi^3E}g?ZNj&Nbb+$`2f|N;Y3NAgX9=4L%_t-Icr+S$J7JFSRAFzS zaX3T&9MM(6?+RB4Zx-God{Jn=GJ*1DUMKKdIFD?XjpfskG;Z9vL|o7uour)Sn{+?X z!$q5UYmko@JxTHlMb8$!Nc5$muNA#Y^jgt(3(b5r*kxP=*1K7HHip;lMgLjyS4F=q z`Xiy4pN8^gJ{pkW9=JcPh@ejvZDRL;HuKXUFOa-Maz^B!{Q%s)dtw@ZGv`0Itg z5dSgJPY7QW|25&8;_nc?C;rF8blgL^?>K*%MAQeTo1t5ZZbO7#d-3zd?=Bjbt2quZ zXOPco9+xa39+QSPgKglq72RH#C;YPJ53iE_8-#p+VEb+n-YL9C_;cYeg})I#DST1* z7vbwdb3cRKk3{bmhIk(VKO!{uG0?|}Huo{mCyDMPmlqV>?1r&I6}zz1k|4_ zoF=sMhUbW0B;;5-^}i=vF1%4_#(yEdRrHUA8-yE$bg(TU${@m zxhT|67jo?yX>*?ja&ii38)GeBbT=XAt5ANHaJbOMT038~xnDzXisA(W>HGliTDMSd&cDMCB1n3JR^FBJ9{4ia+86y@WEoFhg0Xy*_AQ2IX-av~MW z|4hi4Q>32|ZV|p9zAxnTD$1im&Zi=Mys)+KWFeGy=3Per3<~O*uxrC z`~K6Zd$+t;ASLE^=f`5XhVTE)%gycDwQDSvmwRfi&pGn^?hICf;Ul(*pIfruP%JX@ zyEB$vzdjOgyllwiCd<|o_FY=<`x(m$_MD2D-9N>A?z~Hen>di!m)sJqulSGsCTFfN zF(7-SFYoQ9>?~@!Vgq78z8C7;aOLYx)0NNT(|3b+Y_8|DPWyhNl~2c;tZsz)(j9L? z97r$PC4%^nsVmb~$GZGE-eBeP@%m<-bS&N;^Q4_UA1H$Ss4w%*$ti=Gre z4>PE5j^7m@y)X98ag#^yYcXK-c{qn?&AFE&HFR&dgkw; zyO!*C?%KFBEi!3mdg?2ny`A+!!}lG#ZS=n8J%_+X#(>}K_a^;%f686pjM)slWWVEf zJubAfo;PWyo7z48?a8@ulu8}8@7Qsp_eDE8E7H+|tQMi`L&W*d?sr>1hT4|wPjP>< zKlQFg$AxMp>~y__lSjmlg+};pXZ5$^S@FmBd+t;FBPCbvPi-Aq`^?|Nt(_YO75{dB zsH98$mA{84MX`^U9bdXLHFaAF_wuT(uVBv`;uy5soEz^RUtOHJy75o5Zp=XR$*1D0 ziihuuPJ4Nuvkmjw=fAu!9D8B7XV)ko&++EE|H}l$~z9-|o*WnNacwYA%TP zi$7nyee2fvqYa97^!A=QX2Z_c7dC%*@gApW@QxQM3U`!*2JiUWg^?SYKm2mheLJ^9 zcF7*6umJPZBR8b3ZvOCdMFp4>o_?c?`TPwrzx~nlj31<~bTFI!s=~;Mh3~h#xAE#! z%@J?BvXPl1-e_gL)lGlUJf5~XT3l~g^LVuQ>3G^Q&KKWz59f;?W9Ey$vaikNYs`#s zpLQNL?+vD(hF#8=cFzK_78@_DV8Wbn&SCSyDfHxF&NzOgaL)KpUSOdVzPE+>(&2SD zn}Sd(-*CfR67HQjg`99oCf_B)spS;(rmb@pQxHvAX5^`SXAW~fA$;NhaKikp9`4A= z9AW;P40khwAK_H(B(z3M%qy9BD5WzXeHZhex^5Go$03i5xlZWcZVWlBXq<{R zx&?_ZVqS-4GPxIkpUEE{Zf|BeK_j!6WFg5)lE;uNnhlaatQx#dvV=`|nj~NL-8jh^ z*cx!^yxWK5DX5~suSxbL$;Gc(oT}ZA6qo2VU<_loKTp(KBsr|(o<*_|>S{nWcL2%$ zBsuuv4&>f&c%cEua(t4%(z8kt26GVi{8-$Vv&LI$2&oB{T0yGJQkzIIVCGvL;w+2r2kaea%aaj3F^cuyIe3gu}-W`$-@qrXl#a%`(%*4LJ@Z9u{b}A%8@Y zZ^-V*DC+0ff5U2IKEYFGVvPdC$YBkdq*fvYi9DwunV8XBM|GxZt=bkpkl zR-n=iUV-!+_wW;obKFA)*~9>aZ4lq(8YI77NiwVUT;hiOMCCBd1sS=d2Y!=h|LKtv$mR#ZL>#9BzuU|s4$6?ar> zsak7oRZ^{=pVmsPqJr9>sHxEUf1WeXx%VdGQmcOb`gdURJMUTEbLPyMxpQXTd58CC ze~;C3mQAT)fP)Oe>>36J`@+H+1{V6lvKj`~Va1mliQD}6DK!lE=4F$JKbrW(%W4>S z-4_HdCpEbg? zYBVt)IZ^+OCM_3uOwkv7!M4>y2eLYVn6PQ#*`q3BQr>>=|$57(|=p82t6K7RIx# z-&W47SNhcuY&*7dTe*rkEXQkT7+Vue_xC;m{$h7=qBSh{^&?oV#Vo_mV5R@UAhwiu z&um&pgbR#ZSQ#v;3^H77(9O z(AtpW>$d|UvAt-TSw3%Devj0U<68!E@MaqQzRYk0Yb$&PHS}@!k54$);ooC0SU(EG z^(fQ0jYrt@WphooSOz8*Vzm`;gD*6)Z~hzKV823c@ZN-UZXh?xnh$@`2J-ReM_6I& zO0enx&K@LB2M8~;rv-##LwE=Bq743zB2;V!ImwSEq@gT9!zdQyvK=dX4u?GP309f` zQv&H~PC9fD6H>?uP}{xb?1JrBA#5+V1x<>rZ&gfjp*>6Cyl7Jou?vwS0-DW4mGo2?uyHq0l4fsa=jtqf6?`xa?hQ3)3Yrkl} zK`V!Q^nHr{|BR@!Zx8R9jW>A{G$3_ej&dQo;xuOXMwUbl7MZr)_;Vp?A3)|eB6UUGB?tlsJb56wj89b=I;#8cM(>*7**gOA1 zZ%MY773tQ+J2&FB$%Y;74+BGCz5B_^aivCxK=|9rvYZZ(E(%ckWMy`bV{`h$ggC#b zZO7;tH^4miEtuy{>+9X`MiQ-azX_wYYlc|HmJOj@s$j9 z59gc{)|%GzH`j@oVm7qo9l50Ji*0q|jytE%owIPV+0_dsQ#Dc&e4l+uR<;_b2y(>85|i;8ymtRM*Iq_B*$jO~;Sh=h@5hx9^MXWd~-g zcD+6_n2ly&#?ZeP6#j47%l_a0OzyvxAJ&cLm(;)du~$^XA>#5Yw)_rxR^m6~uGajoggP=oyKkX7CZ19{$`S|=QLrIb1 z&T8aiz0A(-ARF7uF2rrT2;%Kx^({q2qP}&VF&ji2^`&C9`u+=HTLwX=0{Z$fpv9(L z202mRX6WOEE%otOwEB2k)|Nrg*#&*HS+I*uYiuw34)k&RsE>EQtiIb3W|{6-xy)*g zS#+cQ#`OEKCg$r2Mdz}B7N&81OjNXUBl5*A&=JXcx%>ia;`Sa$=sz?e*1lZ`qd5x! zvmAiFldJ%;PA<)`CN$gWa)jgTW`Y)*k4)$;=XXc>GcsiV!tdlB!X)Bw^;-RwwjRpg z+sn3aBIpP934b#_*IxE8pUX{rV+p5k%;~V-Fo1b1(7uiPn`|laNe%7VI+4iKRq=hq z{^DS9xHv(aEY1}di_64I#C76&akKbS@m|r`o1uM=O8$+=@yvGrNqk-0E7pl0iM#{C z{KoDKOhIRw?G|}Xq}*3Dc4UwzNIqNS?Fr_)TC5>)!o5NKDTxE}E~P&#d8g#3Bpbhx z&|~bskpE9ge@p4+$rRE*mdv>|>*c(h`iN{xr5l5M0^j)CrLK;UdR`f%-aww zH(Ii>_kuh_GH*RFeTB$pl9c(IMcyplD?Tdj5{(@#^1Unh6VcddA-)w(GSqVviS~Aq z`~%6xJ`3rmQbzywCowJymCtI5bT9 zw`Ff>#yje*P(A$pVS8>6Zxinjd4G@TJH+3L&x-#ozAWw$&G<*T4|Fz_2#NUg2noNEB#P`LI#7{*}$0Hv%Gru{G!J{Sf3z>{J$1#{K`9$$# zkLdmPei^U4@YH_o;McgWG6YV!`cS`298SC36HnxXiqbag}(X zNV@~-yGFcLyk5Lj{FzA01m@o+^_f##X}-5m{^Y14P=(sMznU4 z$4Rz!lDU#k6i*fVi?olRzER>tak4l|JV#t4E){7}!Sa`h72?%mWB;o^Rs8MZ1LDIX zO){wO8SxeI&myffnEt6qdmPGXVwPy_C~3&S^e$pg(b`e=lUyL4A&wNMh%>}<#0BDc z;sxS`;-%u1;s%kXBW%x2;vM4M;=|%EMB0`x|MTL@;;SO?<2zk3{r4 z-BIi=(sq&c+@jy17L+kpwdHeQ7R(wtrxuW`0}U@KhEFB<%paF${MZf=sYb zqpcXs((W-x?#sw9HknAK5kdST%$#w1|Db|)r!hU4Y~KHJ!wXn895lc7!Qkn>l#J#i z@rNJZQm#VwQ1BM~O%4aElJ+AI=Cv%orOaCufeudiBj&tTVjz4OQ?E-h6A{>rC1HZg zZz(?nq__i-*X@Hp{@sAUO4w*YN-c5RQy6dy(=I}Jw=b2uMQJ^WQ;krZM$PVNRP2_Z zQEbbXn;<3H9R=g|NJ)vtMj>l#l$>a66mDp2l#*yn)XZ(}_DlV7emaeT;A7hh!<-5B zO8itpT7qQ}ME}y6Z8aC!CSY!b_@U3rKSMtRoFDP;zv9dLP zyX9r)W%uaTD{tDIvPq@9UB9?=67KYNn>BrUx4e^0aQ=e%4SnHEnm2X&>^bvGzmaEi zaG#PhdU5HZ#X0B9fp3L*bEfAMESSDzUg`X@#W~a9QDH7>TAVX#=;+B)7tO#Ek_D6J z&Y3p3M{f7r9=Vfqb7r1r(xPK?il@$)x@dAqk3qvG7cQB*xOB$kf&~i~&MjTU0y&@i zfHC$sZ_fNV|N2J`Pjg#z=nx3N4Nb!bOR=XEd^~fwColXg+I;wISu$__;=??@iEC@1 z=|A@whVRJ5KEts4Cec$!tRu`54fE&gJQ1|2@u5D`$=pG47cP1dXIj&<2mJ`mhD(h| ztZtKg&aC$8mJL6L-jCbV|#2?I~z}@q+W<5ygBTGUipsJ}~^wAKu`c#`_3~ z&u=K(g+Gt|d*RP_`8>w%{IBl0WGbAw%qoQ+6gYgzo>4k&$*jqrjo~>9PE$-O9H}_j z(-+L+87;BY%tce@Arl^JW=}0ETQq0dk}|0M>I;8C@oQl2L9UBQsQ;Ahb+?eLfR zFy%5!<9tlxay(YtEU+0Sl%=W*LOPRyQMfB|<|oyV&3WMBvs`YzgB2 zRTzma5X0*h>ZAS=thNk-#-8g22DI2TbNyr^!5nl%Btf?MrXnt}-gI0J@%|R;Wqr2Z zWeD3c2s$I7kNNCk)5;K$sIP5;KK|faeU~F_%TNdJ74rV3U2O1DL?r6#3Vm!B+sEU^ z>bnMEmfHKm@~f>4`LC<`B#M8xL zB9DEhPY|byv&E(21>#!qDv`$s%U>(rDBdbQECo0de!SALe%s+b^cK(_7IrGnxx+8_lm(M@va)*A-{Bs)HW0Hd|`@rSF zGu=cq{Db-D24ut=QolkGZ!l5=C*<>QAn9x*c=goOWt53YeuF|V$=qcPCO=0hoHUl@ z!^uYg@u_Gk%kplo7vZ_VqqV%(ZV1%`lSe>6jim&>}u0!Mh~}!kknE?@4-!^>9|&i^=yU?Sh=*(#qA% zMGpU1;H-2qB+g2EFo0RPcMT*yv5(hMDjm*R_gn1!WjCDK`91o%%Bv%cA78I{M7u?$h`E#*sL@* z#r)b+CBH3kkD(2wX!IiWUC(mtlu;%K8KE(wVGVaU;=7KqGMh=H?_0q@8_sf z%O;!4EB1E6lylDfnG5U$bLzBda4njc`u!Z0zqVL;9mXXOtAF`p#Mm6>aC20?(qk7J z9DoR364|9Q=BTZa$m=&;4#ws>yiT=cn3vaiH!z^Zrj#x z66RRk9-iaL#&c9&DkWa|TYY7X^c5!P!)19)-{lC~G6*_Lpzo{9QKvv3+rxgrWpGSi z<2mYaX!sq_X&2VT^?I?p5}yBxbJW3KagI7WVSCv>w*MN>QD=X}Icm*UoTL8nE6!05 zq0_#fqb81AOauIP)-@t1f7u)r=gPy+QF#*e=VlnB9G{%K{j+n_-YPdx94d|#&k}iz zQ~z9XvA9OOR9r7!C*CA(74H!r5`Q7SB)%=yi@bNndRvNZ$t0X##NLV@C>D$V!kjhl ze|ye~O?O;&NFFw(@e-f2@?oi+sQ#5<`^@x@5WFK9bNWOSkIz}3Vq9#_nt@YRe9r1Z z(nOVyPyOj@*FsZ1nKQ}wob?l`37XINU*=x9{hy{6)t4{hSq@fQ5a*<@-6SKbPm6`ujPn84{QS2F*PNU*cbLw>u{O-+Qj= zUo9Qxxhh}T{+H*heb6(U6E=RXTBP{@59h4C{+T%|{G{gkhQ43^oHdUR;1iy+T0g1Y z+Jd$Dvwyg4bH2M_=xk?0aM#}>{q9aS9xPMWp0Tzv|D)Q?`3Gw8P`vJw)xrI%2f3%? zE2-^%;T#urI*qJbb=IkOb%_R|?kV~8!J`h=I{Pkx-Rn+x@pSMSLdve532D6x+!KSR z?|Jhkr_0evl`i~%Iy-~c+!8%D8o1i4yg3>`O!~GTzl#@(;Vt!*)phR;TK?+0OV92Z z?Gtr({~qxlzPEGv{`WFJdGQzf-TZkWVjgN5wA}6B?RI-sBHL21#a%T{NEP5SnE{>dwP{g)yEbDsvp_!W_bHQ z?YXrePG^P%(;-;7@=Yi5?4HL8Iv3pcrg^Q|`8)4O zn4uYTyKtt@8`C{aM8iM0U$PvJ5^?w9Xk^3vl3YlhdBw`!FX={I!KC3#Fz-6{p9URx zRDTo`!bt}WlKC1{{C>$B$l{&CBF5a@D`2pjxos9q-op}ZI0bRILo$w1FxZ(&!@)6# zOmc%4yEMlLMIbpL8XJ^{_)hk!&~}7ZhMvXW6`|XadO?VfJ>mVd5<+mD`v`I+^VKR? zu5Uv)9Q+6VrqFVI5VkOt4qjoouKO*i=0^Cn_I^uh6J&wqx-t2n$5Z;Ohvj-EqSH)^ zV5`oCak&`va&iBPK>C%)=?-Nuin#Q_2)JkP)y>rqo4^+e{D)F4@9bq{A>fXn7{!`# zAv2GpxR&DDn3#@G27NoZg-o4Fu_`7$O_4RaMNHjIv0qI52gU2yDwEm_A>0tRVh%<2 zgzfvR8=T#FpD4j?> ze}RzkDw|})E0Q2y858MXy$RfxnlySx&&Xhdj5r=Q+nbytp^5@Lpqi8xxSg9p+Z=Zi z_rz2_f(Qpcgx03q!QmkPetq+cZ_Y32=lUH@Pk1{3Tiv9gqtT3pZb+McjvrC{z~cyC z*^%U%x$q;p(*z<)AUQ-$0>ZI{_D678MntgszC#(}g#!`@7W}MJQNLtSV#%T!mZZ5S zoQe{*WKj(Svt;5gk6pN8BUqXqL?fWNR6&^Jc!7(y0zN)6Hz%Em#QRw3xsCh?D;(4f zgMYdjhIywIe&LAY&|qfcOQ5tTf{)E*09(Uo=rjwjt6O13TL^X>9YK;26JFnsY>yRL z2w%fWg#3lgy8|nH<`J)(U@^gWT38o31}hXS1eTlNSmHWAmf)r_Gr8SFPuvS|GthLq z70h8b1JS6&EIp8uwV(~G;Yt&nMEEt7Q0wz1wveD^^i#Zo!no2xtF$WuJaw@@NcI^< z12N77i>Cpz{a9j=A4_oGAus#J-||TW+lEfC8{;~YkZu;Hp6xfvMltgt6E!y8IR0Lk zgxY;pc%mah2Q2Wz7d!u^{#LMTtbip?Q-oOsSsw}ydbemucFW8y)x*xkp5L=eLa z40E?}_u!;Z$g?3E%rJM&B88E~Eb#+)G!J0zGShzyjKhiz;~{*ujc34bQ%U^faux># zFHq2H#9*wZ*BB`F<9Q@c@q@%PtR@QsY%Gcr%T4esf};l26BlDO&0@emi|*$XwSynQ_;5H&<;_n(ge9F^<6*bhC@ZnUFL6lNVb~;ozBv~o)egy~ z4Wc`^HMX`!`EAX1_}J0mZ^js+x!DYiHU|977!%)&F;;PcAJkUJXj~~^sPPw+S*X}n z=KoewGUq50&68r{k|@tM<+|<@-Fm#u`;_otQ}l;VPWy8 z$qNe>$9+}C97rC<@8r1YvuAzh&&@OYEcQ<`uw&^xQdb>aqci zp342_K3|RP@&+DEztU4kGk!3mHACpL*0X+$dC(ZE1YevVJ$&GZQIiK27mqBav(r(= z<>{y%u-=_I%VGaBhUk&-__4uWjA<(wGGXB4;X_J>_a8N2aNHNGyr1H$9s~HIs(r}0 zuyD@O1!Z{O6L%F3^I&uCf&~kiKmHzTyq?hm1`I4INqFZqX0OYD*+iqUvElCFo~!aL z=EMiS)}VJ`$)f4TidY^*W6k9O8gI&w5rak#>yO{zK?4T#iFD?`9JK(i(?(`4SQJ6F z$iR8iN@vW#%eIA!7EH(M;tLinJ|U8qeR6isNRRHhdAYf{Cr3Kt&CF7~IDSH8B8udc zsz|rI$tQQ4hIcim&yK)ecFtnFc@XK5+q=g}z0c$iRyx+icT@8ce#Q7B_Qk$M3o`l* zPVJY`F+c5p;T_ia@&1)fgy$}p{%>e8d=&Z|R|mL&_m{+dz!-aN(GFqe!@VK1G|tB~ zF2`f#&7d#K$IJJ|^(J1p*vp%t$_JQbI~wF#<%qHM@>)C5Zg)1Wl(r#nE5zdtm$_VG zyT)L(We{{8L}D!iT5K9G%x#!Sm!pH$P=OYkHUn~Ey{(URoSleZz0A(-AkV{U%OL2a z;WfYr16phvCt`{EUhM2YgQPy*8npT@N7$A@(CGqwnG9&LX_rDy)c00`J|2Ho-)4ku z8LBu1`sUi5pOCf@;Y5A)(8uj#`!cXveYYS?eciEg`Dru9;kQ8T!Zfb5wM@)611~O~ zYcna0={pq$%<>}g4YmTvdb#Ytn%F+)gn0ioN1AQl(+HzE3jwo4umLAo0c4$A(CpY) zraTt;USU9s%||A5mvf+vR#KkjvB_8A9$@I|>*+)EwG2(_>L&|J!#&h19igeznWcxWAXFK^qEai5R&AlAR-6b0zh>&UT%lrk(Z{CiD zTq5~QrJo}%7k?=7dnc^t8p-CH(vWYGe7E?3^8HfsGvdqQZl&*)jNN7WpGPbAL%PW0 zh;nNYrx+u55^+j2GS55A2NQk6s5n$C5=V=Z#p&YN;(T$nc(HheXx<4&J)0z7E8Zyb zw}S03;~0EI@~_0-h_&J$M4pFP?$6@e;=AGjv0mf}g874Drr1I}N<3CPUgWb|mg^z* z5_vn0@k7NT(HtL$KU4BlagI1oEEAWBYsGb9rTAl!H?vsZPsH0qbKD^QKFQ`qZOA(% zKQ8`OG`@S0Zv2*k<~Ra*Uyl0si0_K~MRPnM{qK_bV3heYMRPnsHjkvi_KG*h6=d@a z8_ZRFZ?Ug9KpZ5R;|%$WCG*KE>*Kptzczs){U@n`*RT`B%R4fuli;chWK1cEM#4>T2ST0^9t`n{A(jQB%7Jnk% zEZ!;JBR(WPBK}JJjkrtXJDJ?h#y(B$x8dJW`Um32BA&vTazQaoY$~=A+lY<78K15A z9^%R3sbW+dD$-np?L1SozEAmXC*#i*mxwFG)#4AuD@0nHu-tXx&Ejq1UE+P>uSEN; z`NrRv|4`|F6KTXk{jJ4_*iq~v=7_z;zTyCJkT^mt7HJhj{iWhO@mvwR3C33bypZ|0 zkT`7^-lX5z7L;*OXRqhrGxg-|bU~vf<})?#@IGsDbG!HU^MAQ5dl(Nf9Nb3aq zzHr|?Zw5DoDt_yp%VYAD@Qr+7i7r>h`*4;Mjtrcm4O< z&Oq3mbg-%U(KDh>=eKI%Z*@SE%Ji#Wc{|-@97{T#|FVna5O>+wftd+jXC@7DY2 z{ptd13ZvsqtRLglrJ!BS@y+|@33~d~)veBiMWIvo&g#bbKVJRx+bwQ)J7!+{%G)hw z!EQ6}CfIGhxSHRXkGJH5T`ZS$ZE_X*VfP>2c3kwtEVs`a=-vYSO{or69T^Q* zy9a}L&&SeVkEQ#4=XPjSNlnR{ldkpk6h|kTt#$iC7xV;c!kbw>7JoW)AU;(6vXfSs zQ5~q<9t~A*9O%^jWVL&3^5$3STU4Muw~vWVhIJ=Gv;Ov0pabh*j|8G=QEmytehu%| zy49&wLF}nWMc}%u0=F_T{|neZEMxbNd-@*K{%&ocI;AQLww`Wv8t7IAtHb-<@PL62 z);6m?qAJ|88OBCdK~iN(RT#vWsdi7vti(6&Pf4u|Rl7YymC1-nt}H+B@*SU{u<(X;nZ>*)uI?rgY!_t&>#aof^2kO14#A-G!eTC%vcE&Y(^nP5^W z6OLy>|7pw`Og0}E2qzie_~GO=NQ&E*{tQ{X5*G1oOD8dCZA+h^7B}1laj+(hP>R`> z&PQb2wzM}SCo~i}tZnH=gja@m?QLyKpGNx{*_LLb6khJV6$poeHzoB)mK0-E`qQLK z5Q(>VQ!qn!g11Nvq;S?4yw&8S=c!a zeDMQ{oF%wLObsEF!J8Pq*qNelTgp`K3*1z&sY@U>joX$sWpDU)r5U>!G&ZGMSf)2c zV>ZeQ{J2eN5Who^tWD__Bg+2sbqE>1U{j1a=xzAb%9tM$UxOI4Ddp8!Mt5lTvyQ=! zZ_K8YUd&@QrT+sV;~6%_*p!}%UqEePC(6$U}Xj)2Luqnv?9vBD&52R>>X zuA#sa1Tqpq(|V-QI(?ZHRv_SS7gC_kEPTk|H@na_8|~Ou-X8INu*zWZQ<;SlsXMin%aS@?5tS)EAuEUDLtIHW+U8vU9)ExnK9MZRyGcXP-zHU#Sq%fc4dj{+2O4!$_Is0#-bxr&@fNVFc;-bRg13o02g<4t@Vjul zZP^_NaL^=vES~aitRct$!2D|nb5~f|Znc$>Y!>cMHqL&C-p1Qeo>)hFB(if8#ffEmIgL-Rgm5+1kh28MX>%8Rlj^j7~}R6&g7u zwwrQm)B@AxiMv|OsW8oX&2LTxejeQ#3VZzK5Nb|E;?HA6Vsk2D&3O;m`%d|^*-N#BlfBhq%^nf)+HbHm+3I}TE%VZbdQG?9 zM-$VE(j3NRjPuSI>YWnt24=(5G&~NrrmUH^rk6}WAP_!=f4lR~;NxRfr$Z@+yn^ez zCNsUey_vK>9frGT|E&F~vCHd~2Zt&DE0(AYED%3qN7^gzdppwMlVOKBc=EStM|xO$ zO7wlqJo10jzVu(RRW|37n91iCTd2miw&d&DrT&N5pZ2ytd?0@Zzs&x0tvkdwKt=xk zz3}H-{*DU2e^OSutStL*=Zo*{P|e=M6_{C$$KNnkdpVQmN5}r!e4OqwjGI(uVZOv` zAbX|M74a#47V~$?G5$MYw4-AluB>kaR;wF9=Sei+Z@7-Ki%lDfh(vvL(6{%OL3d5{Z9eK#NVA3)zO5L_eu#vO!vG+HA;)^;WcVoYjb6y^Oc@UVyMIgP?Qh zbL>^mLt3J~OgK};qbj2hE?8swu0%LdUt45iKD*eo%Mp>NFOr}SCU-G?TM)Ko5Olgi z8Sfd}#ingWM54a#(8q4!_F|J_`nDp>GTpIqdAa%F?NuK@T4KJ9n9rSSO89@6#`SU0 zkH!6BR5;8EAp4oiPOORT>z%N@SxB?{gSJl?N(%wAjDxg6fvNhsuz1%-+TcWW^gZf{@nu_lDNNkQqQKs!&Y756HkUT*$ZQz)`SuzJ@YD9G&@unurRZ2FtgOGWnlkxlwV!j6@KOsIR zzNmEGs9d`x~*HoUW>?;LTF$a6aDSuI{HULjf=-s>gbB;Fz3 zEj}#%LVQAeN_ zinZb&MBaa8`>d_*KFP+pHsX0pmg$E?-mIsbEb_ccxvkhqJVERs_7YDO`-{9s%km>c zbKF24FPZ0Qrq2`?hq3L%vn=Ht}BZVUf?GSRoCI3k@#~X8XYACIDrSjCh~~io()l~XeAYJiB+30m-aKYHpURVC z#VO(pk&o$_e!jR`yjc7%alN=jyivSY+%7&Ya^69`&x~>Xr zcd?&XAQpyiP%DHEw&S_O>S4o-NjSI{^D@4NE|PoDb5gQiwngv@dB}2yi~kg{IOUq z((;1aaff)H$oCo<|ETzc__SCnz9#Mwt!?i6lC5p-KO|e*+*DjxQNOj#Z6)~_vAt+* zb9+g)wz>T!Tie_blC5p-c*)bmnWDALJy-H_ag}(9c$v6CyhglMyk5LbyhD6Id{}%` zd_sIyd`^5x{FC^G__p}I_>uT`(Z&3n{TCL~#g^icVnpOOL7Bgcm?QQU`-%g^K_bm< zSZ;ziU7RJBiOa-t@gi}ZSRrl_uN7&*L;ZJ)4~dV6jcsyimci5{kI z%%3b~h|R^L#AC(IVpow?L@eK593l=Eu{*w|4Q_63&q#dvG8^2JPVD8I;C_YgMjqhB zUxE#;^=CR@ZTi|>^}*evXFF@}st;7qv#D1R{L#wVthE>AFRv|Gd&a=?YHtV!>+q{z z>7L?lsJ`3n9U_#Nm z?%8j=m%Q97Xw#bUdl1fQoteAgUFU4dZ@hQu@>}!0f<5pDy1RB%!StwGReYDXFD>u^ ze0*Mw9F_S&lL}9wz3#tz#K1S)Q&ofY!w8=fCM?v-78}9Zh0~@X^SXbb5 z*;?B=YQ4BFj=u2b-(x;q*=axH?>Gani@Xni-L8-ZnuvyfU>9kAtKIPRyi^J#@!7A} z;2S08{it9P{UO2_@>k3jPBIr5;ba<_#El{O=AZWo{}^LP> zgu}tN@Yi_P%tgl3Va&EUX*nWc2bs#LaPV4*fmB|Z!n@`HlM3&eyrO}3%}*ewxq0~O z=DTbdm(Iw`#jQbY>75xGz+f>#>Dd$uC@!YRw=dm+oCooNbCXF>>keWqzoj^p;$Vur z63^h}lskl?dsY+9{oSDyZbzu;!eub5r1WP>i+_Yg7d3(wo zL9v=52*XN>4?%2dj2B0<>>quxhvOQN`x>b|B?i$NhO^I`FR$NxR-+ibY(}fIXb|2#$=!sR+9imYytxugiJtz*upa; zEN=)Vf7ZG&YBCfNZIq#?h9PE$btB?qOLv4|_Cnaa#R+*i*kcQ8q~lC-Ce|e5OE7pT zf}9G&OWML31|Ic=DK$?b@H|#nmk_(L!aiq34FeqHh_}s>E=0x_wx6bqq^+)~Ly)s| zRtaMh;wL6pLToj`VuCe8JHhdXyt@HbhM=vJ$`Napw)o3RV8KT)3oVVvj;7RT!rvW> zVx<-$>pP~@Sc1C|COIo=81O3_i)gdhW?P?!Z2NUs;oETJ7SJC86(em?n-585VFRaO z#hxeFNHlPmZLG(A!7AHgMIM4JW}bMj{1J|wu^{vL|u z*n(*GG}=EDFv}MFRa~qhZYSddI8%~0n{dU5+d%G~fbmO+0G2IS{qlIwD9uJQV%Kl~Fc)x(I6%{0fM1VlLl4>oPC4eGUE8;X;*u=3=RGR~PeB*U&ee|Glt= z{q+TQKeRMazsEe%!OLF%2H%rDtQpnkxTVvfL|1*rQ(upG!%P01e9`r`KM^2*F}~Oq zXb4>Xukvky24-~pE^L7s*a6vrl;~gXi@#U>@9B&VeSH*G{y>MYa>?@%`)jYg+98Jd zFy%5!<9tlxay-^B)-TJ~6?q!hn|P&QuO|j6A7GYAD0G)?6k=?>0}xKM>xi^+oPNj$ z;3|?c7QbC3pe=)-(*y~-8PHt#Q%2w8?T zQQrgcgZjrtgOc+cF3`%Tb8=>|)a{LPVmzDGB=0k!IUR zUqQAEbzF`@#~h}ge}uF|eG8$F+sF20V72;gLYVrxW94!SOg@&`K>?X*T(^lfUj#-% zhqLebx$*&Kxf=O~Spj6dTpq-l*uG^6+uIyzwtY__jOHu^%(5H$PO<`M`=YUZ&k>n; zJ>xL>m_MProO@ef{2>x16JKcGa{#s%T@Ir!A<6`8dnkMp_C07`!V)y?<=mKjVzfCiv&RZ_{RF0@_6zg{k6faj8h# zKc=r0uM)2juN7|;?-sXoCO6IFk)cc6yeAVBVc9@&U$Zz~*LH>u*!#E(BZv13{$4Nd>Ih-O?u-vY@?MKeATzee&UqIty(@wCrmd#pdWYRSB7 z&iFgU`^AUEN5v;Z`cq*3T9NnJDZe4UBi4yu=J(Col0-QEpr^CQM=zA~#NHzB+%vvV z94k%~jSUvkXGvZtmWdaL<>C)Tb3C9N9|cf9A5D?aNu`P_#2_`rdjBJ!C7WnQn4tHq1O zbz+6MMZ8hmDsB@W5FZx#+=67-9PH zVvg8TZ0r|~PfnP>M4TX6TNBO|zQ~V~IiI6EuQ3|>QOfPvGZJ57&u~xt96w6EdiBUN z*}vS6Qluj)!=-+nL1&zETN*z~1#1W5>Fu@Kj*A{~b^6*?KN>!J$l8__H|HluTdWU9 zH$*o^kF4xh_vD&~>YeTn=l837452{xD-e2Q&B(pcv>%4k_FbAjAnMe4850ZoME_Wj zelYn^6i;w}oicLoi12yQr|X08BvTc=CfYOl$bP43+gSPt9SGKIq*f24C)cPisPTjmUM^v@i++yP^ z^;5Py4S!1|;c#WzzKgs!T8Dmgsevw>{1_`)TKT!%&ka6TQ7(A zp4)2Et25!xC%rNq{;RSIs^BXr8Gf0Ps+$#r)*l(os4hWT6G-kUN$AP)11s-rgI*}v zl~H}e{y;|S>gx(xR`;xP(}(VA0nbLQYVeiIK1Wsu4yJxGa_@$)w{K|b$h}XdrS41f z0(D+WpmOBiA)Z^g9pk{Mt6H55|5~a0!@(%NZaKO>+;&ubIKACLCwFvxuM6d>%-V@GvK9bZpC(dJ=MuM1-1u%t55r?t*#m$-B7@7PJ z1EMR8m4Tnf#VBo4$-Pp3An(pg;g9LJIJe-Z0ZY(51HYN>|3KnJapMIx2gW|q4Ua+& z?-rady%X}03+4v{0q-*Y=`za1B=cv=qX!@F^qGtaCgnr9$Ezu?|1uMk9OWrDoV1Wq zIC(xw#ElYeWcg0W5R9C}GQ3R@Y&V2KdUOhQoyg!NjO{j$3WCWa2{-&a;$XF~fXaix zAMi3D92|_uBsb||_ZY~b$;j!1_={5>dKrILg~s9U%Ft5$T@mVx#0x@K<1efh`T$Am zTwaYOw_^Ajx0+#IjwV&RcL8BjNlG~B&ZKf^PvsS0(p^b61GHc`iB;b%F_7AxsrQ)P zpeLu~yHRJ-y-9;nGOaxuyFKLcTG4w3Li&P*c#C;^h!F_)NC@||VPiKCc*x|z6DHbt z!wnR-lgkTG&&8#`%ck8C>keg*UC^{I#WN_brg#u}-C<8cyq@Co6o+%Sy$>HsjB*TSSqMrJ6lUv6y0OgfeLrQ9>ynrJ8kO6GyRshM=xyr&AnF zaSg>}1l%zcX$IIVo2g?d{uN@Tv1}N}{%8_{2+IZ|?51Fh8H`ASvu5L{$cP6iK21gA z*)JdA9!n;_K6)m%rbP-8yRp4zQ5-|DM@)Qx;{KS}Iu+taG4VW#w4QY*v+QdWd4c4M zt#O;CS^tP4YM#Z^SMFmyZtVYGQxQYVohC=S*cifd$#bZ{*3s%L4RAI9k6)ka#3^)3?Q(2r> z&F;IdX#tZ=3pz8vjVM8&h0SJ)FE+(->Uj*69>LR2ILN>M4i-5c&1{m6Pal#MNprJs z;=;#j!;BgNfuE{1=@c>!=Z@^hzB{s}4L@<4+0a0zS=|2^t$CUs?dE1RbDO*4(#9vT z&a5OS*Vy^ANOKtvKh=4PX_c54o%a=-m(fohOno-G4EzKuEqX{gn>GmyJfQ@Vr(Ki4 zy=)hp9WZ+@B$)nLyPwu3gZVnH%@B89MlJktg|QDY-vlQRJgdX$%R8$W*dfiuH4L#W zC=hQFa-l?Q>5dR=ABY(yIF8^iGR!ClDxpP0T-i9QjM2zpmIxajfw;q^X8I9#OMBu3*)~Bk={Sh~;FHhYK^?!v@jz5J2WhNWBs(V!0#yX2uOe z_#6IBZJW`BjllNy6b8#JD%!U}I&D{2_Qzf6F-)C+yo1WXRyLW)2bQXX%sTB z!o(L5mzwx+e_G4?%!K26k1%2CT3XTT#QnZ6>~m;1wg{ zm(?(^-NcV3`16I`MLdcXSyt6B@Pr>f1s%m-Dty_O@cVOx-=DYn@$AdrVfEk|-*nKE zW|NBuzgM7=0lzDXK0(mjtibTJE-*acN=lqSHWH&liIKJtV;sfR^_JBWNmg6VbUpQc*STUXmb`%;1SBkM7 z8*7W1c)yfC(EJlmkv;JseS1Q=qJ(nW%M;5@GWCriSPjN+LA<&#wiu%mOZl~pis$5c z)htZ$2mM*ZMywbV#LZZZtF-tyAIovR6DxKH@hDb&D%P#x>3D+K9q>lTK)o;2tzsZ# z`oDzWZo;PX)2%3rr4qwv;4EQ5+Jh8#VpI=_XfWODa+dXFV#P?Rr`5$)+H;bp# z-+^o#!*-`LY>P3>Uh#Kr!?UV7jVd^lQQeMm242UC(E=}-xt(e#9KwpBM)000GHxzs zAR8+(ZZ_`ADDciIG7=nxGV#_{BJp@}UfF2!mT zvL9|X@g)RzB{p(xx!tEY9OJz+&Te`Yvauva_agv%3PGECAp)0Ug~=_!vl>ipmyw%I zbTPrxKcZLIp8dDrW%tJ_I5%FwHq+{|Wu!kAj0?n>rqN}~NPmyUx|kirc~-z#wSx59ziQcznEHjE zQNJRtzL?FI`W58aSTWWJzpKh(TQUJESsjmVl2u`BJqf(v2RRZrUYNsn@Zn31W~sfV z)ab8XY83a#JEqjA!ah4q#_(pdicKSe3yTyM(U^iBr4u}a*gCl99IeGm6I~MT-H^9WR$9T3e!V?JS z1QYks%5yK(eBODLShf;y>I=4mC2lq)iV437%VJHS zGQWMNdbm~|RfoUadiYUQt;e>#k9LR)MeHVjMbdeR(DCQ5&Jc-iF~qn?))|B?;-fIc~+ z7voFlIp@s5SAyrwnVwUyVEU4IrSr=c=S;)5f#=SdU%EJF)X>qBr!Ja-&m1q9JooEZ zoDZ9W4+<|r6*&WjmkcS%88UzR+$A$go#}lh%_vV{HGrtjKF#P^b zI-~$woHM9&e(9pAWu-IxUYT4_f?r4LCC)c2n!31b^0~Pu!t4kK>-2ex=PaI#zQ~@< zu`+o^>CCA#)Gs@KVd-MTVMr`4n*m#7gfWVwX*ML>E5prpGrqj19kxefSAFe;2w)S{*;D)k8<6)TpP{*^qW3#=P#)QAwIB#6GcT&U~QsMp88G8E3 z$Dy!?d%medkLut5s7^<9@-hRRTy-Sv4BYZG58{tb$ z_!ATUq-?0ywIZh-{&nxx-D{dX{ODZohVpUVpPcM=-u30#2t;xanCZRa%>0>mQF&kQ za3%-%tcce>+dC`U>l*3gUB7DRQO6&1?6KaxZgvN6FxDqlW_z2wh*wcwhG*EW zyQp+AdfL8H(BC;p z&wbS)_PT)r`F6Zm<~K0FkG(xGefHEv4Za2+-}|vV95u1e%pdj~(eQ1A*thBZLDxW! zhNG$W>%RdJKQ*CkJ$v9l0CRg8_RocYg94Av%%7eN<@sCRpeeC2-0}3l_{>9GSUbQ3P#?44gNubjFO*8Ii(83#Q|jbity< zCq(kHPtNWc>CrtmFE=;$IspFD3VjEBHi*PpWF>UkMpO`jw~u&I%n~m z1@j|4a(nkUsW(mZj2+;oSX?KtA|t(t(~pr_ct!BV?>H1>Y;?Wfxc*xXh1T(D|6Wk= zE&Dw^%)1U6GXM8qcsL5(haY6z=Jc05(Zc-FLTHDT`Rs*T<9tlxay-^B)-TJ~6?q!h z`=Tv`G<)sH#}igJf)2m&`K-AJpcGFVj4+<_#+Jb+I8FrlS|NtnsgLdAZIeWOFQd@O z2@y7UcB6bP@ND-||A`$^;yPv`oLKMdY&;EY?$^uuY`y0vltIv`YJ>JMpvBg^1ahLj z?fvi&8FAc>RIFCtI)rT*1f7SVkNNCk)7By)QQwpO;`-8&X7yc%uq}h2^Az;a{=zOc ztqKu|`d;kk_bc0nC!{fbypzN--LY~x`54?XWMx{I#`QkY=Iht~@b5c3s(gT1?nS=X zWDhY`^&EGM(tVGkhriB1d7k%ZyUAlA0Lz4CVoQ(re}QQP#f9Q(ah>?6xJxweD&R!?DrN95Bo2mmmHx5hLz4MSh3RP|+S^ic z8_69d_Y{q7H}d669;AFllE+A%B6+^JSn(?*UnqH<VjoKNp`?{0ri%;$i*%q5j7H{@~NfZ1<63d+~S@YZoz3@uy23AeJb8l4!oIje5>j z`h4*`rC%u7`tjSKc;mkhCy?B$jRoo^%AU-TUEXUd|}a?S0S5s$-pBNZ_cZb?K?d`P<*y{nwT#R6=_jG{a^NO z&s^m*=VjzSPx1xgh2o{+e~IhGO(Jd9SRWsrlDCNV9iMw7KO{aPJ|q5K{2%cZ@pbVn z@vq_s;z1FUL{qQ%9YFo5Ja2;L{15V7T*}9Ze4Il$S2XXmK|W2g`CWiKMDlRa{4OAV zg5+u9OwqjihV*kKFB4aYG+$=Dmx&eP)nem!f%u4-`OR|y@E*wzi1wYJM!%_}!t#{$}|E zoaM|z1kl{=2hHygxK!!O#Wmt3;*}!JB&cVTc&&J|c$;W{r|y%?N8&8^sQ4T4X|eIU zM!OaNx=0&cmjA2xk@$(|;l#*v&TYsHvAKApc(mA2G{0}i-}v1lT31s~R2(iAiD!ya z#o6Lqaj|%wX#Lz?B-#A_LI0JKtHl~|t7!e+J|OvF@p17iWrvpv9bT#3dLV7Huisei{iJ6_lXaRJH^Mv zr^Q-vxA?mFj#wwwi-*KuvfqE!?`@{!7NYfY+gY;pbK6t0^>f=#@^G<894Af^OT{_j zQgOMsM!ZD4QrsYJ5pNW47w;6ei#x=|{%&_E{(13b@l|n;xL4$R793xniXqI6DW{5A z;t}F8Vterfv74AD_7<%l+<}sZiG|`=aiTa)oGC647mLfqRpKS$W#R_$8u423dhr%< zt9Xz2fVfk9T>P#0toWk%NAWM>n<8ISVgG$1y11sMoFwwq70Ru}W5o_)7cocdCH4{X z#i+=4U#O4%RLE)KOmV)rNGumG60Z=i5`QdKi#Lcr75Q=v>v>pwO#HR@toWR`TYO!7 zN30X;#Y18+)z=>u`SuR$Yb$mXJB!`LJh8txP#i86iQ~jc;tX-N$k&5d-v#1D;t$2E z#7c3Cc%!&g+$KICJ}f>a{#txS{JqHcky!s8@jdZ<@o(ba#USogF@IR(3rwcJ#ExQT zF-Pnv_7P7L`Nk8=7mE|bv&2$yj<`@P6Zwi1%dZu$5-Y{c;ui6z;_V{esbcw^;;+Tu zioX|M5MLGlBJLI66F(LYihN0n`ZL6q;*nx|@i?)Ym@D=XPZI};XNY|7i~6UCv&Fe0 zU;SeGYLRb%QLYrL#Op-97{>Iw#RtWoi+oLt>9yi+@pX}}hcW$Q@gE}ZK{1|hjghUy zqs4Y2-yviAi6UPbqdZvTyJM6miqpiIB3~(E`f_oNc!|gt%$UAOBN*YH_o;MdW*GOutv;i)oa9E%N;|$}fqpiF-u8w#M|oi7uXDQBD&1 zrW)lVMZT~`xvQ8b_7+bU2Z(&Hjrqrllf~&G-*RL6c_J>uoB*yZ?ENE%CLPlPLpyJ8 zK^bN2{iU4T+!K38;>(x%N;t81FF*g6`%2i+o~`(-uLLjpqiv}bY4D41WOU-%K;_X< zZ*9M|DQh#=-<}_gHmm4YH)~DS+AH$I(SCK))|9Nh0bUZ$T2nH+Io^7|IBjAOk8uW45GO8ww10lc}LRaqRab}}lTbHaF6KYc@$^D_JoI31d7NX9$)PM49pQmd0U zO`M%pl~#Z^Z2acLpF#2HdccTwF?-d;ko>v6#0dAl7YDexJ=D}M-pd7Au z-ObLXg8FdZ4$*K=x6-RFz%%LC)(7W0>(P$XU)P4J!|)goLhTvGb3oIo zJKEwY!;L1Q=o7 z!Ov_PnT>7fIl4Z*>!|uPr}&`LeN_EX-TyouUIn_A6%-%z0`w_Ra?tHSe*&3Fuh#~v zt}aNbddR$$Ulg4ZEvyfo(Q@{vgGoKzlP45>T&>(OxTsSDYXh;HP{{4R6LvB1Oo6b!L8yptxs{xHl>*Ol;(lTbZjB~ z4y1Y;Ty9giEXu9wzsso}5%u_;19(ID;%zE8>^23eyiI|989{DUcvmreYy{If%`W6N z^_hfin&=Fx51!&yZyuPjKbY~D@ifrVcp3;)9|P|OZK9v;@8 z9yDW>d$asN>pPdf`7Y;A<}eAm^n2sB!VS8ZMX5>f|G>up4sX82&lf=8SYRmN&BN^y zugef71d`83QSU0ooIa5;!K7aTp2z6^^GrPK?^#BfuN`=K zs3F+35E0&FXbpCo#!|s#<6p=P&qf^l2bd>h!C*RD6%M`x9mbmgZ`g)t1>uB7A*np{ z5h7NFmZ8wf5T7!w2sOvw3qri(32y>BkpOQ3&!a%{c!sNuH-T`FU$}z@fd`Y$L?AT- zf07Bkg@Q2Y_a zrzj5H3vnkxnR}qZ9ma;fLvbI);S}jatQnmGjG$Cc$#*Znes~BKW-djXTgV<5inDv> zTL`#C6w4^`L8V(v@j8gjj8lM;n<4U!P%}6MFhULmyhCqPoaWZ&3xpRRf(wUk(TvC1ny;k zcj!55YGHG>tU=66h>-@C=Hm(XryPSu!@E`kZ9|NPECgEEoJPZOh>-@C=7SCQmH_(P zXgHY#*@j_O!(?i(IgN%zaSbf}5;fdfU^QG~HEgsRZl?yD(`b0aXlTWL;2T*tV|81& zKeQ@pt%}#Jih8QBS&a%#WN=wZ6)b)?RkU=UvMQKtwxbIJ?8|%vTG*^c#k9BzzCgl9 z)b7!46AUBM6-%rN&Q*+xYO1hVjf#ikDp>p}syN0iv?`cvTJelk@n@>AS&a%8SKQi= z*HHW&syNQAv?^L4*{C?40d7bXffhEaQ86>FVj+g*at_T=?h97M`Bnvfs(ck&sKRD7 zDt5+Iu=u4^G1@&6$B^j@CYx3~XI1Q_3Y*oaNW~?zHiS>huc3-F-APsjXAVY1cLum2 z0}yCovl5Dr{Dx;#Q;L2#$;Up<*XnG1E00vBMUB z))s${#ceiIJOkIoSi(VmIIA^J-Qghr{zrRZNce~fy)e+TgTASf=!L;}e#rWYUKr@H z;fRKA8CrjiTLzpjaVfE~Bl$<{E;w1JH-X&{m_Qz~2@D{MNg(-KW=bGBws0rnH7laI z36>CiCXE-02)`8G;YB#M@W%t`L>m(t7OoAXrphy+1RumTmB-E|e zT8q?$)?LxM)k3w^s zGvHg`eU7c*7A>wd*mWc3n#1i**q&;{cm(Z>j9ez2puTM`VHB!>(tSxKqGx z<2g|G+|KT~5%epFaEaov--(#O^r_C6*wv<%6iv_MbZt!zDIPwY%LwmVa>zKeg~tXi z;X=fe5>l6m6DT1S9LcavNWOxI>Is_>xlag@2ML9t1GEOCtrj@dp#%{n2^>4oNM(%3 zvAmX)%a9t$uY{RemqWSS2t!hcUn`B@O0TL~PBWnXV*pfpD$60c8UqEmkN3}xJ zf&(yDYqmC}7(~$YG6I{Ap@&m$gPBc4MHa5bFGr_2Jp!Lb#2HNu%rZI{@~lvTcq1Z? zm(N9eutkP)oNWuZ<4_ZOpTa~wO(4v>{sTdhBj~Xpxe36gQ5e-)z#LNRI$X5uxgh(} zzQo`l(xZr)ZF0ki6T3JH+V?^H`ok59$eh5!0}Q zI9&Rf9A!B}2?aPSXwWV5ndpXy5ps*U^piLm5hsVh;bnqM3`2xq-#9(`NsLB>AR%gp za*kmz5Qm1k?Uwnjn|J}Sm!Or+Bye5=v=DRyz9o4B<{f}z4)I^0J1uDX!Sa=>J#c^xq|0;G5lFGD4 zMetY{&O_xRfZp`(Q9v*I4dC$@k)FcV^F~e?cSEPl_29ADl-XJJFskOwHHr(4_$VUI z54BxrrK$~=BMr7wz%v!TVf+y^+_+OWj4_)~fX5ylvGq&YUzEs5mU`V3jNF@2L7$A+ zmFQ#85@Zh!by;<&%W6VhHZ9a;)uAq{33b^tXta=0J&3B;A*P|ruwo38JP8LJB_L^3J5%OTa+l(bIH+BioCuiI+Sp&iC((euHr6M-%tYk0T=D+`Rr{D zFe5mYbbYN(USCf@g>LOgSs*LuvE+?1#Y*1RSSXMx3yKALbk@VHKq@(gQw5W{SSXMh z;|h|cu@GhjQpt9u3MPA#g@a=HeMI!xZ>0n6iHUX%TDhYPKqqP+=b5*dAziFoguWUWVJ7ZM+}?BsRK?B81U88t*^;}t)7o~SJ-lB}c^dKz4WnEmpHH>q$4 z(?=mM8m#i}?Z|Ejr)JK+MH?gD7jOdorX1wIUooJ3(%6z2GiOdKujHBwoxaeD0bM(P zoht@Bflu4Texv^W^t=PODc|%wzj1zYp@5A3T?YD%5|jO=h*f!h!@S$t>|am-L)N_w z^Wb)WcjZF=sD&r`Yv8=U0juj1VN&Vj-wH?nzePr!>t6!Sr;+|eCm#=g{l`%7PgzS) za9!0c)beN+wfv%LiJvk5E#Pu3`K)>n;c)4JFn+SAX^_lM;9-SdxMocJh^xFU-V z|Jwou=b3^xp&)CN->@eXe3Hpk2^LjD!6E*Tp8ipz4)RxH7r`67QSJPD=fnU1@ALBg zE24S+$MXXJfBETGRh&8_)Exb{d zTzI2wf?If_Y4JO;lXBn$-LwScu9`D)t#?;@^}J2|KuVN zN%?v{?C_kI`+Raif$#2`3Bf`d$(0RsWhKXFvXAPn50F|2AmyjO%K?T3QN~x#sFYDuR5YIw%Wsr=lhJ$b(6ACVG7U;0P^~d6!7Ch=hQu=@t(0e zKYn|=+N~cy?%oKzl|(Usc`a}*E6+EvnGl!39{u=_mfZ0|-mh4m-+_qyC`FtozVvZg)4qPz=qRpQZ^fu9E8UUS+i;ML)B7#0Z zm@hPce&io3x`+sRfat-ZPZ2#;I9s?#xKy}|i1OEp{+a08MDue6^B)lXi0D6vepd9$ zqW>ZKZPD+FrkR?@V}AY6mx=LAn&X=KTZ%Tne$eej_Yn3XqQ83!xd;l!dc?a6P_=;NcqmM@M`g|7vK34-Y)*V!bgQqO70KB z=f%fu)Q$_M)zF?JIL=(rErj;168wWiw-@pu#D3vB0P#3sk+8q;B;i=$MB!B7bm1)F zS;7UvMZznDR|{7QuNVG8_$%Q9!u7%@g?xWvd;cQ*tMDzMJ#Ub|O|(64K*xAr2Xd+< zF<01Bm?vx}v~^@4*GY5_VNYSPu#eE5Q;;7b`V`?<;bfsbzaUp7+O2mmPxM0J1wyyp z!Ih$y3x6uSL3oRBjj;anaJ~4C32m-1+F{Q{;7j6f654YSd|U4Z_`dk|d<5;*JMj4& z0nO>P#QlVAg@*_`3GI0aIqtwk`C?&z;Yq?W;W*)RVWsdap{;`hJ@y<0E*Ae1p*>f@ z|EcI3gufQD$v*SCS8~#Y$DuGXwO&3A1wMXA$Rzq zKDU0s7hSiYLghJ;oqDQ;_WT7sU$lD;FA;sYaD~vG$B?hTZh<|A!FTHwJSurxX9xU^ zqTPB0Zk?S?;=e9@OX!}@ABp}{$cevfe*ni>+LbrZTAJHcWPZ5q4axy#HStXn+ zoF}|MXwQ43FBk2e`#%+ZgK(|T*6~5wtw->n_)iF*7S@0Mzb5`>;k&{Qh5r%SdjZn! zeIQ%U)#k#M!UKf|2@e;#^$B{3?kyZ393(th_ygf2;S}KvVU=*M(B2==K6`%v{#g9W zgjWi`>beBGe6K)#FG>GDg#Qx0BYao*vG6}aI?-@EWC*#ZBI#zr*1|SIx;rrc2x0wo z3h4j9{Gr0p!ZE_h!l}YapQIP z6U9GOI9*sNTqrzGc(L$O;nhO79>EQwe=fXDc!%&_;e*1*g})cl3x&t`cj4>8w}c-F zcL@0|Z~Y}~By1+68w>Lf6}t5Yx{B^8EELkuh4Mp%ZvBBVqE8i`CUol$oGH5gIs_Mq zzeGr18S1}5NS7JX>x6E-fhR@NZ-)6V3+X9CdaIBhVM)h?^qV2QkC0w7qz@C)Ploid zLb}V4=2n12dd(0g3h6UL`b;6cWJq5iq_Yg^l|uT=kp7jB9y6pL64FJ6^q++Elp+1P zkPb7XKM{W3IskN&p}h0|r?(90Qel0+fBMcaf3lFyGNjKEI{*HQMALPK`L)9Oe*N^6 zVgCI>I?RxE{`~ZtA^lI`+rq6vdeJaHO-Q#H(k+Dao*~^q*j0F>kWMws?=Ku893iBO z4fCf8=~F}c93fq6NG}o6!-n+r!drxEgmkE3{(2$(YDhmPqUq0P#nEy*5eQiiTAf(F; z>1Tv53jZdgCl2%96>b-PDx_Zy^BW8CSp2en<2|~j+{W`h&u{!F=Qf`A`F`WM`=C)6 zf`P5=Q244hi*$Tr%fO4*#7q4pg^Sad#7YNFNi6QSIC^Qr($z(s7soG+U6xo{xaF@4 z=r^7Vzwzf66fgcoQQ?+n7Yy8dMIvpBpOx79S=X$spLMxx?TWSj)@Xylt-P)SH?Pke zxcT7>e@Ety6R?C?l<0Y19n*V(%)c^n zv-V%mvFSBK5}mJU(RN$o$ZbUfH|G_my;&* zqaFL4|8-m51OA&u4Kh|Vc+<~r03Ycn{Kyk;`Wf_#j&vy9&;Uo1wH1%7Hj%bCmI3hD z#xW(P4T5j_qdR`rwmE#5*Y9}b)I{eqdUq*}K=PQ<%^RbuUMlgfuDH!#c3bOs$vE!6 zK9>8h-&XXXStt!-#N(`>~b%||+*?c1acftYtU{?B{-sPULF>i)ok`9uDnjioo| z-!Lz3tM++`r@-|80hZr>5K6#V`ecBA34c0FFiv_GWBPWq|E(tn5`=_)AN50ek$>7BDdb4a>CJ*HNSf6Xg#tyGwvLTZl&t~%H zO!l~#Nq+2(9aW1Y4q+m}OW1<5iP*J}!XEAR*(DLKv>hcms};}@z# zYy>22zxKP3$anxe?ALw|APR5mU$Gf$MJD%ap9@Lzwtkz6ZckePIuox0k?3P_?{%Pm zILZay){n(GtvK+uR(kxziIk*ZLs}6M(I?`xUS!YiicQ_0jI(g|?C#wn(Wgu(k~3{u zWhDCh_{XRxl1qI(A=2nQB)mvt?<%mdceXQHbN(uWHwrz~qBBy&ji;oD{8%DA#Ng#YiNpe^wB>4@bsX26yBzXf#ICLBF zFbVVFHnK6QZ#IpJjI1C@6Nop8{ce?am>l53JAKfE{Vk|ev6 z2hq#- zI--6ne!DCFlq=4~{8~6s6>q`ImJ_vG{+6v8X=9rIs$0ImZVl)(KISmG$3XXf9NCE& zfB*ZPQTOru?95E=5Kc!>yriVI3(t{v{c}P^8g;k$z41^4WL~8;HaC)OH$| zb86GNzN**`Je*r+Q*c(Xk8@pZ;WiN8mm7$q$5jw5;?Cpy?Z!{lUOC{7N_-w?0bZxi zTf)BWB7^w4%V2`nFdbNV5?#Ri8!q=j1m3^le?Vwu#V);lJ`=AX20Mu}MI|9G1qj=u z3^Z`HZ$eOsc@`cFS$KV{o6m%+WJqnQ65d;q;V`5y&6^M$$EAH; zUMb3tM$Cw;N;n>A4)J(o$kN!*r7@;!Li9qUZw}GyEY=*>;dHUX_E0^u?b(Obym?z- z)#xFDU5k;ygvE$(-I`O&#AS#OAzU8tqqR&d3y4@P6F0gX*EW=JofEZ{!-EF0{tFS| zPD0=#3l(8QN+ebWM0M?*NIZlHA;P1^uZq<&u^}L^mpEz+T3^OivPJNxB&@Wg`4C-; zr0o;V#7zM|)k1UV4aNu`-WKNKH)!B60^5W$Nw^s?9+?G~iZ-=Ovz5pqd}_&I1RgY9 zKoxkr!w@m#2!|pU4vK}YYeH^I?#!fdM7E7O36WA4aMJPqVY!d2+bRk+XU9D^GLbc0-sGQkLi?`5jwIZz#hXOoHtagIfB z=J~d0;V1aL5)qCv1dd2LTey*l^h^$e8%<;ofxQMcd&h#iidf8DMl2T2Ux13~YeQs% zkxu4wA_;k+vp6Bi8t$~XXQ{heg!y~Y&T?$k?pjy>uH*EQAG9jjgcK_|-1s=AAur@M za}!A3wlX3gMB5+#QTu~GO1U4mf_8fqz#Z5Ho{w+{(@#J+8Zpb=_kJqh*_|!F=1nbs z7x8-f4fA{W`{eo4^8BVf{nPUNS^0im%1YX7}R&x&9} z%dDPV_v?CpqMzSllwX~X-6GetYUejt*r_wTMy@xnkv~*d``LMZWq-e8&x$^6JNOwr z=XTw{ZJ&YuOOgD8{EcuU`SZM<{$HYbFdBMZ(z7DiA8|m5+ca|Mj9HZv%WZ!-ZX7u? zpfU5`rMiSXOZuJEXZV0#L&DS8zrbdaAL)08^iCe(?!y+L<#ImIjyq%)UmVN zMwJftv|;7gvG7}g*G* zz{U7z)Eo?axUsiD{vRHS7}j@TJQ67nFYHH`C^P;hyCR}bqOc5pDSk@_+aoxbytc4d%^6u|b9%Y=fPpnMsAc*;5kTYv+jfjGcW^g4eNKxS{Z-jgKriR~Q5w|D5m7b40OeK)R}0q)Irf?VnD7~)^E-J% z^oPR#2xI6Qmdg}27Ul^L79K9_BJ3eNPFNy5K{!%4Q8+_*p^(N3*319r#C1aceJ8zL zcpU$8gRZ~Nm-&t0A~wGfX{+5d8?4)BDCbwRzv+4i?)5XK(7@2Q|13c^zFnn^uO>i@oj!8^t~YZZ_59N zu>O2h^A~}9E^ZTShs`?$wk8ezZG`#4F2W;;XkQT#@_j@P5shJLsQ_l$D4}{}|Q-srmvxH{}&lU1nOFdT#mkWO?yg_)E z@NVHl!bgR_7j6{3Ahhck`d=6QmXH=g*87<-&g%wrhOniuwJ=|3*D>Vm`UMt=f0A&B zke>sokKX`^bA|JSKN7n6_;y`G?i%sk{QIAacJuFV7fm}m_1-UhO!$=W8R2unO~O}& zZvOpN(RSZ}zE4G`@%jVZKuD`7>HUT6gog?{3*Ej2cK?CA`Kezb6+@KoU! zotJ;9%F$HIcCHkz7Sd8p{x5{I>yo}tX#Q@X-9CdG#5cb;@HdHe^YZP!1^&Oqw|Nbq z?fwO{`xcNB30O~4q20eg=ZS77q$QbhZhpS)XA8Pie43V-Z+>vVNuoKof&7_5yRU(^ z`x(&r!PTFKPh&L8adrc7jnLiK9v1yO;U9$02<`rcaxaVir|=EoR^bQ2`t$B-@MgW7 z4?#RYXnt~_>-)zYtNdQVzQO^*VM5LgpgvmAiKh!^3C|KP6rLxfiJkJxg+CR#eQ;@X zXZ||j{lbTZPYRv?oSR?&qWG@}UlY=5Pkqjhj%miYkY;?+Ero4_=1+$-?fT3=T3CO- zKid}(RM$_dxvf=dsNUUX^#6$5y-;bGp_<7H2KK zWKCLW=8{2EvX-nY>bp1%JD)7a47Oij-rAK5hAuuAc-eyM67i+pG5w~*E?u!UhB;zh zSI^6Q({Gl38TZHF46z1FuZuKXx)eK~MB4gS4BWgRBLjP$WGs)Z^50z8z+Zv6Yzgd! zksh}_L^8MLMmm>r&eiSMt0T88Ys%nl8JpJcNNd{^bk^bfmp;8C+S_|G!_R%AuyF9U zmbpW>waj~PN4$4#f&XTI@1Y&pz1I~DE@@NRq4edAzkegrw!sSjn#rZDOVU?V-IiF< z{(${U{t7PUl?^PI^7En*B@gU~VRjfL!S`Y-5?j5*0oxaE^WR(?Ph0U&PSNIG(Ph2+ zZHsmI<;INVnJXGzT~u<}TFh+2-XOW9E7m4TGME0i#9tEWuykV!%o@u{&KmncDYZUi zbH@U1Gu|I?j`7dSn}CFecbdpDW7Pe@Y_S30V8&H@4vlEqkpRCBi@W_a&cL(FuOP?m zr;*^(ES64ZIe!65pUiIsm={LVDQ2Tp08;yD@Y(Hi>Xjetr*R-_2=>#U8?oPm;!tPL zTrXj_=tS%Qt0TtQP1sL^&*3yLw#fFJi1Xh{B;E^p=EwhmoOyA+m!1=E1Wrx-GjPt1 zuf#8AesM}zO#5l{WIEVSBOTvHBC*xpjR3c|M(j6f6)2R^A3w3w-Wqq2Ozo|~e-^QO z)9eoj?yBjFNZ*&n7nn@13N?5|$&E3_fyv;dgP+C!C|)s>e9Oz?tBzMfvWjFQlD!*) z~k_`4|3rn~Y z`A3NJKnAsq@ms_#h?vwevzCeb0%A@r6AuN%l+bd{!(Rh$v+>V}*+S^=1Vo~iiBDaQ zYli9pI~jOvm^2V0x~2?n8{=mZHU~3(T&r-rY!jOi$CW-8Gi8{5$)pAo-nZn4Z2;DY zvaVv*0Imi8v*f=@O!gwM!?>0@aU4ovHpn0(EmY#SwP`w;z>{jL{W1~MaIz#LHAt|f z;b~K(S0cK}6i*}lQix`ny~p__MD~}HWtt<4dBmV@EEDYN4p#(O3p}*`h?r$Uu>ZJN zv7E@}a&pTc*CnAPTU$#OJ(3c|oHvS&LIj_{-oX@{)P@Tz*A5XAl?coa&Ttfz1$vva z!3|jK^5`5)#&KD$QqJRXwW9C)y7qm$R-}Sf|dgb3;cT>C{A_}dduayYl!o3?gNwhkRBJ# zUk3v7S_l+Dc6CT}k`ql0^)ZfhITEW7F{6iYJ0iw8euKcu*C1kE6@h~fJ6zy52o$H% z&~1d|Q^p!XV2N~GXPw(s;q6YL6)F^;gGEDxW-l*0k!e)o0BtugagolT}qc3ASdW@d(#6 zgejox1oAryM*AaJ5T`-DKR2(7pPT1bw1%dVc0=jXWTEGPKci9a9VpOxn~=;`P7 zzpBH*U61W};1JGPX^`LfWdGEBf8TumwymDi)Of*Us(yf6nXQd4GR$PyY@tn74wLq+(d?1C#uhpNwH05uPHDG_QZoYN@Gd7^%4g z=(cZs9!hdv$d_I>)y<%(GZ$g!*$KOt_Mp*GSuqF8D`F1B^oiwTF}Wc%FR0GSrZWf5 zs&?}>cDuYOrWf^_-o=(TO{w`tS2s=0J^AiVuL&lgeBq@`>&{8yg0?%YUFs&OeB+Zu za97Gg46k3>gSRRLK4bPgPoy+^Ty#Y+Po&?sHc#Zcuw?0f)jW~#yM=oL>4Py5dgZWr z+WX>J=Yq>C2BU#v0xyCgdI6q)Fze&RmH)5sYKb@$(Un2c)-HLQ2?du|4%(%ewH!(^ zs7S%(jRzgBH>)MSheM9_vOZUDHPWsOl9B5(B9S~M6kOg+&|!Twn0Jy39`&I}QXg$s zt_+fq^~j{03oh?mFv9vS3hCoD=-PKR(yk13JPUn?+4}>jRNfUxhxM(5J{~9AmyPK3 z-GDUp6(BNjkMmXa&KvXBAco~u;viD*xj`QD>(3L(ZM1juM6M4VZ)50j?Rx@gG-oEj zLK*ZO=?Ea}WB{9T$*>fR7m`#;j`E@IiWHzj3c$oL#5{(eUL2bBU0B~Z2z)!&g|mh8gck`f6|NNiOlbf5 zpvUaaz=ymX5kj$hr&;UQS=$x*Fe}zc%ZPS(9H`OEqbbOws0X4_qy|h z7ZP!ExLo-k8yLm0!2 zhWv!k=6QkMU$k3a@KDh{-I`){YtUAlDr0`~sy1wDG~t-b$w zJVy}f*!ySRe%b3SBJnA`r>rVEZe#j8OIrGidoA{Ncw2vxIA}xK*4$`pYp!2VI^=DC zbmO<9Q-{3mO>O*kZ0@P=+%Wo(cg~x7>N_`1J>;E3=6XGfA%PV`rWQlOheQ-*Vb%Bl zzOlP^L`k=jMq7Np#rL7lmN(bR9CIyFA8m}}6|S9m&&)pm$=m*~X}qqinYoLK4GQ@Fz*l!->uJ*teQWkJk8f$3fq%!sA` zoA1QJ=WgF*wET0#*e_(G&`#wu|w70BS`fsSkOW2&LM63&`M2wbwvxL73 z`S{I2vg%5bO>>EpP1edmQA2lIj1E_PNB(}nIua{@^Kmnj{=E4odn2beL)=4f#r5KGxL8r z%s_WE$ThPNj8|KBh1ErjIe z?1EPl=Jf@U0ev6F+J7*xeQVnlnvKTkp;`+)@hjd5Vnqs5yaA3^lH#4{c?n(+bg4BV27L@wyB1k`sK{*Oi9VA;ntpXzD`zNZ{NY44U{`KC|S1d zetb!`oTjTP=9bgs9k|seZK!4vGuQmCUEt}REahy$sWlCf8vrI-om66py2n|^LW(Q4 zj#Ij`ztT~h_R*o^PsgUJb+!Zqx0stkrW)iHT=*6YZCSY8hwW^9O1Z!%La*$s!bN`J zkD`U=dC`)L!bb}qDO?XH(O#Lz>kfhOoMsX64o5Prct&M)`J9d?c8kOtrk~g#nh|dt zYw9)g_VHVI`+6a5eN$4>xOR|Yu6rBJ*Y8~bsMiu?&xRgru$@^>C! z|ML#m`=P)1P8&yL=oUcoH+VY3_ZS??;f>uweL3ba9D5RSM|XjEj?p}(}ZTzfd09nc^$L9i-pUCHwbSL{#wZKP5H-! zPYa(Fz98Hrd`tXqC!0+XHBR zQ=&ezIe=awdb#9(F1%Iz-v}QT|1r`07DWAKV}L&U=LdR=`1A{5el{*TqWN3`+mMDl zSJ)-rY-*s75nZT!vmqegY-`9rS^4M|J5F8^JYE|gK#odN>W5^=Ap22=@{4!yfYw6Y|R*>0^a9&Oi?kJybYSI7aAfU;K2( z^5*joC|X zKQJ=Cn~+}^N%s}<6C-J}?E>w-l%5)I=x)n*L)YcVv&f_xbA^+@9;$0JwJj($@=fW3U3;Ui8q`oape4#f#T$i)_l?;eR@I z^Qs2jVF^g2V@3A(W2O7N(IT>J?E%{t?HIVZN&nm(-j@A#c<;5#%I(#1hqpcQUQVP* zuLW!U_j3HEJG}Q-tnI%&y1i+yjQ4UfV(;a|3O8pI7H^IfuY-?W>9#~x>9$x;tX-cT zhwhCVxw`#{B~O*K-r{Gsxc`=|(X6ZuM{J88b05~CZ-QEiw@2Tj=EJu|kAK(f2KT`(8fpjzO>@*)oh_|;uVSugP@a{Z5y7j0j}U#!B84BvKA>oCkX z>D-3RZ@}?!{A6-sX|pIZ9PDVXImStEKq7(jNJzgBRLYD%bH4v6fAaW7;?tbxAJ~t{ zR!km#3X{{A?07mA#L~?}+Dmi=4_1Yfs5}<)*@Q%lt2da9f$k%5uKf^+kAuYgcpT|@ zw!Zv1aoQGZ;t%5Y?D%^SgpJ`=5U??9MuGHgC=k2STfy`L$cE?LZAd3#yslwy_*L3` zBr<40jNO)YBeJ5fH~fa=T9MHVj@{U=(~1CQZ=l^cc6%Cc0ht~zNGyuaMl!4q0Ja?H z$l{DF?dD`7@9?ceBj# zBy+E$&cb`Z?QfTVe+ z$pEx+5F)M2IURXWb9ofG`7C8g`oTwnns(=upk#<7%$@%Mkq z))Mmg!(TPpT0*9mkhKK|Uf1-}C`6)U<5WqUw_rhXx)e6e^oHa4&@5!AVXx6pLtG!E z+X0dxA1T-f2oE3zb{D1|LPQ3E<#sm6@SYEo2*C*q;RKsx;6FZCBnS^6Qp3<%rYIgV zRqzceXvT2D0z^MDdrs|TNL-5u`wC&L@n_AeWg<|)cO(m~@p~mA+=vLP5S!DF?DA;F zXP>pC-(WOIwobN?McN>y!Hfc943j}4PA2d!4390s0z@C{23vcmoh4w5VUqVT)JX`M zH_uB}z!&icET0#j1zrt2D$njj#^S{huz2}d=!xG_#BAJS3)>YQe1`qDt|gDxa-+KZ z%E-aBWKTeB5}7^s@@S|KGnv7fQ7fTlcXHrcVEu)N+4%DtQdLV{iSeuI@X2G_a&gk? zRBkO+b#-&tER?XoqGgDUVA={*M-j3oA>y#+)zQpMX0Z3*Sw>JjJIf)@0_$N#h z^jeTNTl?yqe4YrhZ$)epnYFV@W>6he5$@cb9QYPm;WuijWEb1T9^?j>HrsL|A{B})*T3sWIFxpO4hZ2D!UMq(ZI zm$#P&*IV*v>)IQU3Hu@HwIPrcs$)z>t__H!Eizcp-1<0KLiWle{iQ9DVSDWVmc=m( z50kLH@$k^Yg%6rN`}KWmHb-6y-`gB@uK53u;Sj_GBL9*ybPFK)>*RQjnT{)ma^aT> z_e#=NauSPdL*ja;Jd{_0G(I6G!xR{M_#LG=IQ+CjeQeh-MArr+BP)@yUx?w7lk3Ud z1tpwg?1Gb<07kgp)h+RzUG=g)SMMyOT^Z^)4gW3km{4$eXMhgtE5M(pT<~}tD3a8- z7-?4q$;gk9c_!jZxZlUl3;Z?$w zLVh8o9RGL`>B~xdLby@*yzpgJPlaadf!>C= z=*Vv=Y)1sYz38r@i-gW^&-@fn?o9FNJwQD_5=}Dz>B~i5E&4jqH;FdCB-F<}HYxw0 z@*gGQ_@59yqx_eJuM<)39p%3(+@XBh1E?>T2)X+HNNttRkHXCFBHH|sK-*$}sNb!} zI#BsEkx+h&Xj_jJ^mNjgzf~pvIg;Z%5w_zZ(HKs4T)dC+`1lMV;&yD9Cu}F|AnYVO zN_ecWMA%n2S~x~nF02sR^@IB6i#|_yq409yGND~ZkpG2fyPiPbDf)il!$P~hkpHyk z=Y+iH^EfvP-w}QwG&>aXX``Urfx^Rud=`*z*Aws<(Pn@FT`GE@(Ai$ch@K#<5S}ii z5rldd3TYZ3eT9&p|4H8@q{V|YjW5JM2%iyd7TR@({B(`WOkrbTb0JM8)N_o`Z1|vu ziau3%n(&80yUrj-8w<$fmTxSiRfhBtLYier_Y)2h z4inNI!+f_cG3_p-FBa0aLVAtxcS7f1_p0dEh5r`5C#1cFp)c)(;cVolu zdPJ8%{PWkXUBjCNUd#E;&$m{$|N8z@PMH#$a`Bqhr45!APf0AjrRadtC@jZ?TNW*d zE-qdi#d@?EOIIX*T-vfUb7>j&OwWzPx8{16m*&24cm!+BPCIW$=BZe*_0;t3+3znz z8u;$---w=iZjgTO_iw~b{SngMH6`1#x82km`5zQ*&;Gc0d-nFH}i~Uu%_4YTsyU)Tck)l5q{}md3+q>7c+yT9?maV^G$3Ew7i4?yGe*DyR zko(U*KiU%M{dVy^TfHprjYA_I+V`uCnJW^@_w!noBra>Pyk$v)%Q99p!AiSLHY8Ry zxMtY4SmuHqnVz>j8}{++4}VhRZ+KE#y`y_?iyiZ}S;~XG%m0)2@xRvd8nC{Ld3?@$ zbeipDjJiLtmD~N?OW12cG>uOMpW7lQ*P!J)zJDZ&CD)+klfk#CI=xOOKbHO`Wty?n z$#&aKq}f%MNIwO(+m!K&f*73to z0JieZ%uB>h1v6zU=XD*4^B>0iIDLHQ#Vhf9PMm&nHSwGAdv=`f4zQJ91;W|NH=zLR z<2M4*FF*mTOnVQ~Nn81E0$Vw~aj`P(3S`k%el5v+L`E~7qLO=4w(<|D=swxXdx8kr z%6Y$M@a_aZ>wGBkj$*PDysU$nVYc!GBzbLm$FOa8k<6v0p1c9R0y1#bGix~~4`lNJ z6j;k=k>vB(E4&R%zFFn`k-5F7${UmYG&o)n^B$+@BjlRJygPIUzI!FKnD+}v`0g1w z4`en=1?0*g7e@5H6y6e$FrpjjqyB6@L<5qqA=!5)NuImx2a@DZL88y^fr{M!QG0UA z3>=N)*g{5PkRf|=Gy})D8>6t@gRvMau^qb9Hl}9cP()ac+Yvc{ECWKxz<(RC5ECd9 zScsY8nL!4D1$Q&iM78hSoxFqDI&~)gjUv$>Y7?6 zT3eHcv28)?heE;vYYeIx!FMz%8$b*S4NnysVI}Z$7~KYOx;ZAS5lg>@=*G z2?I7of+~g*o<+oN(1hSPYCJm*-kRgk5{Ctw>E_nvAq4*0g2UtdS|(TE#_1zQ4-3)@w*Q=)+&f!z{~RM&uOVGMpH$?V|Z2P@Nj7%u~X&Lu2IjKdT= zFVfDo#|{b(3q%5%IGZ8VdfN&lnRy3_4){`Xb zT14~&;U+}aAf{glvIs1Qg-s^`EHL}Gh-f6?0Yq1l=}m~pBB%IfTEri+%%k(XY7HX;05@znE^MGMnO5d^I%4o)%sD;ZZ;o>P4;+2$kfS;k95~78iSfVAK{08} z+pSUYyX#5%HF;E~)|=gW-gp-anIT=zVW1)p>L842OVDAoAZ4L$?5uzfLZAGv&KU5GWUZ(QvOLeZhBSC^-(q zW5F8>$z)y$()i??3>%t37IMwO!6%`ljcgdwVSQZdX%l!ZxV*_=xHR)Pm!9iRx#039 zfDx{@0PpJj?!|i94?GUyEJRlZ$;fkH<}sn*^3DJq*0%s}Xu04~Uk0Mnw-{+x2Fb`r z&__8JT;3uu!upnk^zj;W`uMW!%1}o-3eo=Hg3G%SjIh4d(8uFr`?3+8z8jHdnF2(H z1MwaHo_hVqeEV+>baH=%683=$lwrJ2==g)+n=-%=K-SB^x8-pAZVDZ5W8}H^J&81$ zGZSE8CG_!=kqfMop%G%J*^y@;$IlinI5}ddyCO52?wzf4HO6U2rwr)yg;i(Ksu#AssK|SR_4I$bYJ&Cki>xNb^2GTqwLi zc$ILa@Mprc!tbiB^kJMo+U_1BqF??f`Z>{m7rjOJf%u<^j^UzXxojfzG!dOAwC}Ir zcM{EI$0*lVI8tafROp#3dX{jJkRMuE&r;FLL|-fVXQFQtjnh`gX2E+cZ5Fvge$pY0 z+mqoz!uG<>!Xt#G!u~=VXDB~h^jM*dH}I#5o-SMue971H|ivHwpPQ zmwbK?B|ap4RQLzsGs0JduL<84ZWZ$TFZHAgvxR262Y+AD&h~h)XnqxBxvoNIdpurr zv9Q1JB;iQmDZ&ZD$wGdBrrxuJ3xtb=7YUaLuM(~h-YmRTc!$vD1VAspT2ue;h0hCL z68=N@FX21FcZEBIHtwOv*)DT9-ay-j8KBJ>0JatX5FtO4Q|@RXzmttb(UW!wCe-(#iIG8o%ySUc71^Ug=m{w0Qzpx4+-5IgWrqZDEzDN??QgM zr~dba{B}<|U0C0S>ef7Mt$dqf0C{Iy<-9tUx48yD`Z1EG?T0v2=+;7|HGq7#25P0~ zGle$C0Qu*McDC0`Mbmu1@;3AQwh(D!t%J3=I6%E|jc*@eE0UL`J`&hp-x@GL< zCD~m!(7p*fXA~=W`qia_-}bS3r$2fy*5@4Zc5HN`x1)2ps^^*SJTi6mJO7-EH9WC? zXKe1^w>{*0Q;&S7bnfhTUYqOn#LAw?_2$wZ=~ni94*t5?O6P_lnXuC4BQSZRX| zA7V|v;eVyQJgIk_OT#^-s^6<*_$*HLnf&kv#1>zQ2R^G@}p$B7hK ze6oATGMNW{)+hM!jw3mmB=3XX@nb-q2eRR8sP%effXNr5hBYLMNNy&{o3mF;GJ)8T z_b#swO$o=5G<$-PV@Q4kevmtlT}ak4*A^5l zC%J{1Z9!3XCyaw!^dY+sg#I@d_RKyy^BC54UM`p!B?dCh0 z1(qm9gr#RDak8aTOI%{iIN?N zqy-LxTM%*L2|Sy7?^`?5`PTBt;3-R(W=V6}49;t{mt2lD4S(oinOp*qD@|-Df$y@m z&?ysa08D52wcy$m8kb1ATzfk=g3s9?-02d#pzW#KfC{+Zo%rI`5j>vEA8SB&-e55I{O0``cFhAmrc+@qF2n% z_uq`PdMT7sSTO1P4u+3Av&BQv^u4R$OX zWG_@uMfb?$0-9PWb1$6wzLX&Ken6>^(0b8rWj3$M$L=(WJpHXlNwa zFU-&oAYkhJi?*h+UlZNcoKwdS$Ux+1fLeYvYQqz zN-O+PtnfU)@cd}uPw+05@hD?=S! zppW0mTyV+D!3gWy0)0F_wl5pe>AN0jmMK7FXoo^e-Jk%?JjP!Mo!nh$)EVHp;Nkz~3+ZHjK+dmL#rXC}Zx8T1|L2%xL05z?V%N0vhFFT0SV zd}w$?4o77LVD1CHtC#18Z42uw!#HgZo(ryCM>`DjzYcp9stpC#djad4SWlGWh5Zo( z_E0M9&3dByLY#eaCt_WDRq|P1&$CbWYskkDzYbefFY3W~;5~{sRA_%QL7NQ$I8A)s z11L9FxLA0xkk=sdZxG%h{I&46!pDS93!fFfAlxK;P574ZJ>h4+ZvCcKNjudLS%k|i2BSQ3G_aq`6-h52a7Hc z&86rlf4t}t(I<&Ux7GPZj9Zn_9LM}-oF{B2>>%tU{HlI!HhxggZ0X}Ofc0J|yi|CF z@Mpqb2-gaE&9L14!iR-V2yI*;|2fgL&r^Q0@Ezd?Lg&}UkA;-W5;hU;BWx{fBQ*a} z$afNboUlmPUwD#mjL_Mdriz{}oF`l;yimyZL$+&`@LJ)`LK}z3zfbf-Lar*va?ZB2 zN%X5iXG{7}G(TxlK0{dF53aTNZG`;hNqJ{WI#zTqA>VVDUm>g(&JoTRo-4di_!Hq( z!WF_Bg*OXt6W$@bPv~q%{OZd3|0H}#xJhXDQN4Fij)BOh3Gt`um!_n1Fr!`kPMy0J zd?CNF&Rx3YS@?Xvv6;a`rM}--uS;Ja6!E8Q*cRI~5_XhcW=A;=E1<>}$9DLijNQC4 z(H6d92`_tVB8qiN{obWRuyX0pZHWOJwm03<3+W--VxVJ2d&l+y6@{#aGCt)01v|-O zi9RKdmXwyX+TzDr-2XGIY}#PMaUVyI>HcxF!!z3(zvuPjnx=uJ1Z$f9khT(HBfJox zOA%x%*$k>RI0~${Wjdir-(OBvu&(LfnGDu7y_U&fT~jkqxOGi!WO<1Pkqz%G z8}G5$DQt2gM(^S@FKv-685(~SB9S=nyw0vdZ|ig79K$tnzA2s^r@txeDvMcA>zdL$ zoEEHW>io0Pew9`QZpP^pORZ(fHC)qDYnfibg1=7d4zRUM?u9c17)8JZ&n8xmnPB9*0VNc?vg zG-C{bLkI3nHMS~c83+_4%nbN*YMEGo2r~tN!wD{C^JVBU?~nTSft!I z^CM@5ON|K1;7lM9G-xDC)mW*Kge8br^E4Vd&XHhQXoKImi16kjQ2g`kFD!B}Vj863 z8pdQ$?8jgSI$9>g(Cd+M}!u_I7C>}<`CIfTHyc|sBsh` zwAT=WgGn|mm7OxCu>%6JK}cC(=khEzz!|*U)={k``ICTEBNiwNlwN??0HZ`%Bm?Pr z^`+T+OAtf0t5zU!r$UI?FMn1iQ$Zq3{}95_Ulg6J}-mzj*dB<+~-SWG1?A~ocMRi&E#Ay{XtIEsp8M@=C6DM}; zc9bQj&zN4`k^485RRl`PP9HyU3Yz(~D8ssl-$;j);D|f*DW6_mIlj7lQqU`7ONL_f zg+Ip!s|4YRH1YJRimI{bh5RWTB|9y!iRV{U^(1_xM?S`nbW8!2#-WpDBg;Pu3v6cQ z`_-_MWiZlK7K{3eGgrkt|C8#;NH5CFM|xZJig1mf1?aX(u?@Y6ANi zh7Q($+`Sb|L*(mRJoC%j)sl8TI#{LLt?IBtwxQ9z$DY`4=!w0C759x)mRHT17TPFJ zwlQ~lfOVI+OlfCbW+h8$9$sABd+5-}E;iZwvX;N#3a)oen~ANiISoUnS8(LAsRdTN zU9Fk93kw?c>+Giv=36tN?c@*EE_i&|?`r%OWw$6?6fgWyTH$%I!t?#Y#eo^^+p(i@ zy|wS{Xm)P+*N5Q{!~|mS_o%L|gZWM_cs;LczgtZK1@|VyH!fF(SvQ$;8>lOTWTXt4c}ys{y!v*ul`wSXLWcS>5S_mBkalH|jMP9M%i3&9At z@0O50eg}5?mLcuRP{&2k_al4slS<`Xj&xYxJTwyQnwBvZQMdiSO-bO>N&i_Q`6*o$P4AlXGV~8t>N#am24; zN8`Aoy`{I1e=14yzc#Txo#KbqqzUD{wyNsMxyr< zohSM*(e-`1j#Iw#@iHG5=o=~daYVF_bM1*$;@1f6e=_*I4>I5E6KIF6mkIhB@o$m5 z*&~quTk)M;f*%;!{y&QUXCXgKlh4oQM9$M-J?{xW5g)_A_`G*9pZ9Gd@At$!VLRb> z&3^Zaj_WnyzlHA!qZ}{jhq$nzu#vEZu$Ay2VS6FJPP05esuPQaoUu>(B;gR@DZ;Tr ze$J*`rO^3~ogitugWR^c|`Cqn*( zr+#{a5cz?f*h<(|xH})QBITC~`R$$M>DEAWcD~a^*SGgA5Z`<#A1_vie|&Js(0z&ZMm=l=GL6Qef9Ri+Y&1WZ_5ImMS2UYg*C<7a&IXH@BHmQ|7bAm zgRmG5ScE+9*ka3#W!3krO0-xHd*P!c`@v$^U_%+!aU8KN)?wlH>tHK92~^Tni2V=E zR(Q$%>}xv~*$Qbo+7|<~et@kopR!)!Rt{e|RB>vA-=QCbqtSF*voQm?{_&@f6H9A? z61Iw?-|KYar2mD56KRieNF>tx15yS;+N*u~B*lWo9O)Ak3l?+CfTCE(34xBEfsc0B z?K%;o=?hL@G@ijK*a~1)K~5fs2i{hBkZ@MP@kpN&UyR?HxNQ;`=Ti|@!Oy^gRq$C< zk$w|cX)A2E!vr>t#}%4L`%T&pkjUWJOuIX630s0y8@ae;+C3tp88n5Z-J6yNFsmT{ z>7?D4b};BnyQ+Gon^u1{IDu8LXZi~03ao-b+B~45#~B}1!8y?39qI9S814xm;@yU- zb3O&-^w{0Ndu@e_~>NRsar^Y<>2%aSDTg^eyCS;E{#KS?HY7qh;;H=-qcfyljwIsHgB zBe?|$uRo8HkN3tENbr5GgzTyfU^O`(EDnh#XCuLTQBx<-jIHC{NCo>MF^mOkXa%%_ zyf<0FcUaH~SV4UDbOpyDF$vMTh$q$x(h=1P79!Eq30T3Qse&xT|191mXS;%vUBMr* zpcAlyS6jj6JVw4-UeAJStv0%uT5V6Ukju0}Z(1RkGw(uT9}dPujKBY9ESstIFL9c~ zrb}8y@f{#Ab7GT3noBXNoSCzESQcHk8#5;_EG~!%NCpltSf>cLBL>z?rtS|Lyq>FE3u6r-IAwLsoIx|n2(%HJs~i*a5TT23nd39D()eYBn~h&n zW81g|b(eu<0e|W38iQ?zMTQUU^wGz%lgnhM|NR3EO0$3P_UlKS$M&oB3Vo>qPjzx)pm6ReYI7PcW1*zxBT8V3j^ z_i+y!A0};lUwnhZFK?s$s@{urY@k?eF?kTO*ao(B?pRpYV7p60_2;b0xraRpL#EO_ zJ2ig30rpGVgze7p-|7H~CmO#^hJ7FpPd?>>SGYZ|=lL!9Lw*NV@Z1mm%s**y^>?>W zzcXonT7d^5QZD$Dw|o2SSFz)U-)CZ|i=h;e^}4VHiHBVykal@RNaIs@GL-CtH$ccW z2M3?vlJ>hHNV_r={xvE(GQ@DnN%iD5L&>MRsCOLX!u4L?681ajWW5PQ9tW|$9rtw< z$^+j8SMLlk!upPTw-5T^Z_V z0e!SnxZv_G2P3TSedy!yv3>l%=JZ{UG|LnqGTed6epRpknExxpu-qgZ#NOC(pNCu_ z%DTXM8P*|&+xJQ6cpD?nweNAH(VUq83oT%hoemwGk`UlzV9+$`K8{80Fb(Cl6)-vEP(dYTD2UP&J>H2W3kF`}mmFBe`b{3Q|h z$J>N=5OEQjT?*wN7yUF5^z)+sD*9id-xB?y=pCZX4h4M~xF4~6QzGbnMVlQ8^r527 z&kXdDqI*f+>`*8_NVM6bK#!B$X~J2`pDWtzPtbRP=%vbENyKrl7XC{7b;5hae^B^@ z_sugtk?<1n`C*>nem))5L z5%%|J;RNAi;pxINgbRd=gck{y2(J>Z5YiGu{XY}Z#6sHHqiL}s{W~FTE~H-+{zGWj zJ^23?ZSy!l+x!h+T;rei7nZl{9oSB^UGJcsowcj@M+#sdZgAnsC5Yik(+FkE70+Dw6Kduu^Lmv6G4G}j8pA)_) zq@{@Y{}%GU$DYMc!d{jBSXwf@#< z1Mg_B>%h%f`}jN3Ke}wK*Ja>lf4^f&2X1b#Zy)?F%pSNI*W1C%N;BR(FLM8{W3ax* z-fWQOmtrl`xevb`!J4K1+{}_76-}nRxw&03OKvVAKeOcZjj=Z~{lXG&`NG@$H?w2# z+wBk?cU@7Uc41f4{{>+CpZS} z&|@Compwl8oNd?m`hmTjYm36pZMTVN+6xf$ZK(ohZ~r~7>sXpivxueJ-64^7CM!s! z9}GxY)_G<7ukyz%>saH|=7e|&d-Nt^TTD~TUR)9}J|Atx(wESd_~W23g$KX$<8L83 zFHSrCIq_lmt%;YSjc3O>g9bKqJ{YlL=}nMI{|GFsSh^hPMC^6^Hb}&lr*#H5<6w%d zOrr^fHuU32UL!J^F`orjrM+*tF>D6Q?Ao;Lpfiz$E<4I&!x&x(AmVLDP8R1Uct

  • h%~NO;Ha<>o?=!QO_)Qth3H**{|LaU{Lb4QI}QahvH5;AUUQtU@-=E6bUL@?I|z zW5Lc@#k@WwY4dJaA%d@74J&8N7MX)WIddr5mrXqpBzl1-K9@a^i1GKo!En1~-EyNTTP!yp4DUsVo6YX_BIJKqT3CtegLDD$G4YA^t{pk2fcT2|fMghh z6zo-m=Me+LD^o8783dNw*&;jI1O^ja$-%WuQ9NXk<=fPBV+|wJAi}S-x|Ruk6#y}( zmWd?+QDe(l(qM(0X|>lPLCYR&O@!NxUsYqa-)93pA*gg1QWhrQH>h+FVKpKYP}c*N z9K^n1V?!1~-aZaB)=&bw1pC}YUDu?+TXs;}XzB=uLcjtgg33m+hMN(w^WZR6!KN`y z45}N6lm%87)KO4NT!#pA@oxc71j(lWL7@?@)@Y=l7F-KX0X$t<=sv_ay7$aTt6G+1 zm5z4BAquXA2k^@lq61z41pUYB+(Ik-MlHpc;vi5Y9K!StTz}v1llSGFKR@5svAS~n z^s2AC6zDNt7cK=lJ+IyV+%WI-JikdEo_St8FR?K0H(J%DV$hf|{%QUFW_kW;J^cgw zpLo>4{@gsjM_$*?2l-X~yZXg>{;_%fwOA5#dcMC62D2EP9G&4J*~rNMHMhsW6!NXQ zGnymg^dU25SEaU-Gv~dpVNuXsF9*7dwKMDOe^|#oG38fShn=)??RhEB>BTdq%{qO0 zRivt7Zh7@tGs{C>kV!wqFJo^?4%+;QDT~`4%wu*KtkDu*Vtr212_#omSw#dY`ziuLR7AEaSn#zq z5XDH4P)jWpt7xsYE)}=BRQjT|t+vuqORIqJg7Rugtp1;8&NKI(L_phG+xPc(lDVJx z&VJ_1*=D|H&c%aDhT~DNZ{J?Ajy#w~&Ye4ZL2TOG`7uO`m0dAu>Xa!{r^JTNpF0_E zrO%ze;H+3dZqMBAv2J`%aN%LHL z0)4>V4)lW`@42mM4T0~kSYyLV;enyIgn0*dEsr3O_pErN#(gDj-(h*@X4Amww8yi@ zZaQRa*fhx2&7d$c;5eu?Hf$0+g5_??#`8Vmv0RpC%e@M2n+8s2Zi?f?=#a5tS3(Zv zHxKh593NzUxMNS`w+e2X22SS|V4aC*9V}K;;Kn z0c5!}yh9DvuPU&;ypgr_`#IdG&OE@Fhmha7Rsd~TP2mny+u4tJzdJ@e#t(E4XB851 z-T=j)aNW;GP^m7*$S>e!oVGp`zKD4)Ov43?Z9U)X%UJibHHu31SMHgl`8?}>+Vj?1 zNLFv2D{*edRkr>ci-{1Hgzk;u7Mx2+jA?N{lWZ5V4T-*Z28l?W<=@j7vpc#Fv6i|OwaH;WI7kBB@T81Gq;k8+fEioX_jiF-x9X~1~R#nZ)Z z;sxRW5+_bG*98uzj00<&!p)dDg;z2uH!o>(9jiN)ejk=F_4Ggcfg&J?c@ z%f*G_P2#u2+r&G>?}%nD6Ztk>?)9`-Aw7_^$ZB;$KCc$Qa-3 zcd)VKrXsJW49^ickVe_A#mUv?DEAUe#4>S^I8@|d8{$J zz$(cb#D;S!_sjo>qUlFS_oQSqmkRk+$-fotJAQwbyjL_MsEB_=vKe52{E1|a2(o_7 z#goKS#ZF?b*h{o?EF3~)`eEW|ahzz*L#fIBi`{18+x~60AGZ|^$M|~`9BYjK+*mBn z`1`;4d3im0V06Dn_x#U2#y^f1@?(tg4_Jj!{^b{9jK5FW%5CE~zQ27#*=UUKZ}2h> z;gzyVw|Dh}?pn9kT8{9iVe|1nYuqcr5)a}i;m;FbEhotl6~j!X#Sn8+toI69_TYD-BiWl)BXeA9(E4R9v3B*M?4OyZnYe*%;#=Qkr?#%{=Ysw?6(^ z*~_nRq(5Rt`Z==iyUe?oW^=>t_d%Bf{XLCG{U40$Uw|6{jO%lH&pQpFp|kq%Hx%In zlxOy|U2~JCE3Yddh8{lVbi0+;hxMt8s?mrnFHY5L<(onoRsnSU6z8AD&_#V2JDiQ2l2Z& zh2Pk_E`_rZm;>O=8Rh_9L#)&ac!k%w6?A`_?rN9!bM~FO@cogQ@J;8udH8`yHG()F zz-jaFgAzmO9E}hEFwz+?@6`Q>@Gb;Ge;HIX9n9o{cm5 zF>bdD@XM2HEVzT{~eBKrr2> zX9UhS5rz>q<**vM7`?%az&zt+7Is_?Ctkr?Ttmn8zEEDX366VU@rDd>A1uCU6|SM< z5nl)eGQR{~#_-02HNg8!Ve&FqypS{n@XH)Yuoz4T5EZZ~_)hVB=X5jku-*?MHo-PR zKz{qHoYNUj4{i_^Vzk@Ea^Pc3CVpeE$eAdHb4YO(LNO~R&;+C5YmAM}$pWT&92To_ZU>kWPJ%lnIGymbL~vpk z2PQ|#5xN)_D_#=IVX@^4Nj4(f^T?ZFk&4&^3vVVgCI`PE<4Uxbse>Qt|FTZjaNhB& zDTROil!CvA3>y1WD<)!ZC00ztsb7QqTrtt?LCyr@pzP*)ZF0R?vCi!{X)rzJwTbyN z3ZZt*QoNSAIo&SzPS5ow=Xy;LHo&_m*W2#Iyy9|itvh?-D!b^yk^RP(4Ie&a_@@>ZOunb`We>sszdO-!ytNYjDTZUcdvnb9P_PzJ zVjuqfFXQ~<1NwfyKF-TLi5mUu<|{BmU{=5U)Z04AX^_OUMWQ-(+M)i08rO3=#)6B- zoQOF7J30T!(++05;CS;6yegb{-r>T`!q7N>-l6ZmZQg-<>HqjDiT_#i4#B$td(Y4h zeSvrO)?`4Sp0qVKtP~!6va)7zbI0N1L`!%?V3}VOb|kD#1E(__7rNba$k?!Hkgc0R z-H-v-!?MPPO@c?T+$k8iJl6Ndu0lMUhI#xR0}e4dWNaA6+=Ka*xAw;*xE<-Rb~{$V zZPUQ%e2o0E=#a5tD{|1Q|3#seJ2Lb&{iHP*Qf9>M%>MSg5o){pn0 zHov>!W|}-$nhYdbg0{AXVYCm3Hr{Gfifv$xjrUV{&~42}h&RXzAj_qB6gF7D4T0_D zQkc9lWov|*Sf;`Cr-^R$Za_L4h_d18TBBo>Q9MP65!|5))qb)Mocs-Ni} zsPFrdKNNWaGVLXr`65 z>W|aEial-7m=3%Kz)4efQ&=lGlh;;s(*2 z_x`bYj>2=ye1`v%c$eWg^Bm{&>`~~){OorbHsQF1InKKbWr=qgR&KjQ?=p?&{O1bl)p()z?Z3G1D>dfwNDG z_-`_FwQn+%mHKZk>^SBOhx4SFt1_F)SwLLtc~a&9($HXz!z{<=M$I%@D8l&z&%8!x z-(6@#pC0U#!LWzjT zbjM&bpQh)ztRCKI;34G}QkVkoCT}wAe2RC%#Wxy^z});d8jQ&ENRw@hdI77-%M@CH zXOAqlKs3zX|7-IXffsbf2ET=w%`dBW%iHHFPn0gZYa&#_M8Y1+00afsSwa!r~e_*80Ni znvHO5fyL-Kaj)@T5Urtuea*~lBuly&UdBwouV0dRje!MV)_`EvDOjc9O3X^o%@Pnq zY&TAJaATU`w>>OE3API-C2ad>QX*M+Vp4)JSUBHbup0n(y^Q_b@@mLOVD$n6bA!`n z8k}Zebr@T3Eij6GOTk7z_FD>ezXc{G%uO0H;Lfz>RqGIg@?IQMUri}|2~!Go-LHRm zO5wO~DeOtXEJIGWYx?xTYYOFF+i99XD9kOu3ku&@HUMAU^k)$M-yN7wj273M67dIq z|B3N(v(x^46Djqk8v^e#9BZQCU-m{rqG|ti^8$&Ptxru19CP~Q?_S2M!PEiLa}h5y z6>-c7gJXR^=|6g^;DmDpJl&souAo2W3iOV`zj3YryXC970$rkcr%Q7tY!ntZ>Bex3 zC1`BC&hVt0&#p9#_nL9}KlWyzA4HpmAyEi?9=FDZmBK?qLndfD?os$~!n@E2Ec0W% zIHqIM!0B)ulihU4*sy7kt(!sV$bf26*4VH~@CcT>DjV7;h{tkSo-McGTtRzPlEJR{{>997xRdCxha5^)QALChL!&bl}Sig>e{5WoA^IH$MO~X8{MSceY z9@e=IVZr)Dm8^tvuAJQ2AyW+j# z4@LHGhQA>GLgcxV{=XG>i+>T{70uW%;(a3dBy=pMJ4-AS`-vBe6G)s$IXptnAaS70 zSNLMdUzhw}lFe8y;?>CCjNL+hRPyuUD~kVX$-5=<9K>=y5?!2ISznHo(VvF(;qg!6 z@HFJPkn;cE<^tZ)cANc;?Kk@y{80Wp!I<_E8;ecFnAl$YtaldTiZ?(UCYpYOa_jXM z$a59GKx{Y{aFhJMC35_Y_5HT^ebLN0!Jk8N41Y>|QQRRmoD2Aa{5h7%bPeYMI6qGR z5c?OHDVjMc$Q!JG5*PiAAd4+Lg5q6lSkPOCRx~h z2y`ix8jt!v7}x#{f;`>?gih(rUpH!w`cUM1Y?M$ck9Ds*L+rS=QN(|TMU-4Y|FHSI zjQ1P*T)K=t(TJJ#h^BJ#Bstp6-Q{uK#B0Gj3vV%<{^xLhLT8sr^o4c2!gBl~XTApz z!7@J4yWqem_#atFIBYstH2iaTrrZiI>EWkb4Uh09_i-dn4f809W`*-Jhav_RNJ3Ee z%xdP_&Pk)Xf4IN|VF)|z0gC5jhM9f4Xc{|UxQ8NVAg@{^OEI?~=Vo#cI^F#fQn>x$ zbevQ91LOV{VxtlG>I)q)_++qDcOVNrpCXHK2eFiED6$gnU{-G%#KtVuy~xyXjgxs2 zymrHri{AQKR$WiN?lx+K^>QNoHc47z zKL+-3CUf=m*cvw<>6+YxY3xw? znm+K(@^e2kqkr>)j3QhjnnoPf$QU#r`t}mj+qoOy=EWmncxQ|8N`k>q8&3qm!Q&Xi z$^>IzRMybE;^>r{R~?y(1J%Q7;7Ayj;X1oOaoBe?KEtsM76Ls0RVv&*N>pE+lG{Hi&V%V*BTat>d8 z-~O22x1Tig%Bv<$89#aAg2@x7OdUUETK@R%-4^yJz*p60mUCrTyhn@H{s%``f8n^X z;au1SA3#_X>o6FXEZ4;_5%MpGay3Vc3gO~dQnDiTDzU(lh2*6$q0@1;q7 z=X#~tK6Yh~?&xW#V*PI#BvT>CnKz<*V)<16Tl7gy=y`qTPMtOl%iY-2pEkB|YHzFJ4~-Yslo5 zPhD7^``In`)p(|M7B7S}pLaYn4{@1>_y05nurWGh?D$k?$a-uwAzXW&x6T|VVjNn^ z<6vza;50WK$I{&$jj&*TvytB_BxHW9i_LEa+`;^Y2^V<{155otE{O*I>rePk1$dAvA)>!8~@CfF21o_$hhUH-s`Eh)P zY4TucGO!bxm=(S#R9)eZ>186XO5acqH$jt$7(w2gUH@xC^Ra%FO~< zw?H#E8SrG^wZ`UWWy_%d7cuU6md)7Eww~|lC5~Pzv&E9etJlKZ9`?+n@f`N7r12c~ zjHL0_OKAWVYdOWB6BWt_lGaZ`ee6dU%Byu|#ewjE~WJjexpIpi7#ns~NBF_s9|DO1u z_=Nb9_)F1_lm1aM&xK5XK>VwijmD|%8>@+TV{VYt~3 zU?0i-#la#UDjDxmaiTa?yhglEH2VedZvPAj>j&0 z4-I){Tll(_GvYIxg+&!rQ4gzepI>o7rQzu}_7 z^}WGZQ8N>#b?1z=Bld>f5qm@JcEFxry<;!NmCkk!<=oJ#x^?`GR=ulp;=5WERA+T> zTzMWs!)00BckK<8HLX0q`kYFq-D&X-@fOvcDtGL4+#P#cPam@H&)0RU?q0d0_VsPM z_NK4iwbv=zQWr+fiwB8S6ujhYUv%^K9Ystwi#X|?8z_^!R->4V}= zV{P%hOT%^E5u`-w*6p0S)I%wCo|ChtRrN`?W!6PYGUAQyxT`K@`tMpj-R6|aZ`VcL z%<5Cuu8uE{qXw&2)_Lwg^4|rY?xnl-o;tmK z>%k=tw;o@zsZH7bRM$P4@j>dkP8*%0DetFlJhgA?y6zie3AcmLly$rIrcCFy6vVSP z4vafz9xBGxy^oadofi-Fjn<{+F-FsBcO$+_-nni3Xe(?*8MdmdXS{Jur?qI8)tA&} zbZ)t}W9cQe(ay1oNZhH)SleiQxF)?W?ftLEJ5@#N8g+N;QVv(dBkP^Iw5H*zd+JiB zN9#gIGwYoD!c|-9oUQM)YFm+7)pGr&y0o&!r6=97D&FLdRdudg5zk!TyYy*n<>{5D zq1|HbnzgySi0`G#Z`y4sM>GDH+aA4b*WRf6VEi$(ZI7+o zJK?RH>Y~%baR+VDy2@$W7_LT#+f>~cZ(WsMmw77sNcT;3>F86<+}@@0jqsKO1 zpIVi9$Hvxa)xT?n_#bCfb+1gV?zF!7x=>yETN~pot2?Z_uP%M{C#_K4){XHqZf{cU z)-1R>r?BzgInvo>DQF5i)XFhwYUB1rxCOH`qukX zpeO#;{Qmn>)6QI*wLj{hmuxNBpN78B0lg(1y`@na{pp9j`SFh0jNL72JoJUs_gePt zhP--g?T&pOI~sZqJ>lc#eRtGGcRw8WD!K1F9nC!2=xD~_l6~pOF|@U5^`YXdzC1ec z4SHyoXXK!UTiJHQ zZtm>3cE{e6R-e4qS>NpT4_Za)oR8D)?6EGTE_5(${bsaGq^{AS%ne>$x^q`u`qn1Z z8SB4M7cP6IE>w1Mb<3LHwK}WP!%^O8b^p?;xKn-hn$Byo?$}c2;W+8I`l-6qva|1K zQPX;VD7v6@$i6>b*?+&6)@4oh{%E)iYya=s+j;d3rM7LXZv@*OKAQUemGL%x8?EWK zu~Aiab@z4ckEXnr)wfYakJhQY!|0rHxP~E(=pt7X8aplhV z8}SROc^=!gyx01sm09suTJ>JPtG3^6?9=PsKralV-{btWHL@G&-Cg(+!d>xd_RHx` zyY#x$Bg5l3=ak|s)2`r-oKmiL6mH~H{H|5k%7QiF>fBqg&)A=i4B5B;sz_Z*AM~NJ z7Nt&G9DN^Pz_k3MuyZm?_&IY;Dd$gHbQV>5cp0P2jW=Cz_ z?iX9-ukr499%XHAjqSSHtxG$cQWtIcwG!`+U3>G|@eJ3jb$;ody(Zkvwb^bTKFV0hLlX&AhO7I;8XMN)}DcJ6;c+>T6ufF>t9$OJ- z`K?XYu6PCK`K{aHKZ&Qro5W-BLZrwj>RDZa_Z`yX+1-2MSc`Qp#2Fv$xi>n!WN*sq zqH464>-O%0EibBEcI3r-`)yH8UwOw;176zTFe%D>~k#-(;LrMNVg_=VnF`m^O|H&J3A%NW5>rCw-w4>KJ0Y^lPysR*0qJ{RqD9 z;ogsM$JxglB^b8~`yc}oN89L#!>2Kq)N&tS>C-75hQoc3;%yXR9ruS1;Fq^xne+N% z8KxgG^j8p@+{?%hQ)D%oaKqdmbCWrL+JqbCKElu*aAi)MjA87bu$EgXj-He6xR0`` z{8$UbZW4Q=W|@~V^f5->>5B+8;?205%bb+wxQ{bw3v5^BBt$jR#YRF*Bi%-6q7D0% zk!)BC+%uv`$9;miT+BO2K18`cy_>(|ns{uKC%M_bLRb^NTIP%6@vPV6FWj*0Ou3%o zy9x18h*^AD$9;-v-EmpGA$Omq;H}xTwCMzhuS1}5-#-tfG^0vHP8!zEqK<@PVtfP# zd!zdS7xXeQ@)4sMW5nTbvY8K$20o9tE!~@Jw6QkYyhJp<`7#et-8Sw6Hrh%XZG9rz z?-7kNJ@_Wf>o(f`Hrlg^XxyjsxPj-npV(+`*k}h6(aZxq!rgIh2kbwy30}H3fgf=6 zH-Vp{T*YYP-N80m7aNUJa(=X%u+M85ZLM2wqg`U7UCU@K*dPxf8gq1Sbxncy*(f_1 z#YqWoL}1I2i22zwm&wV>aBvbc5}dM3u~U|*!70mV{VB_|T-VHjMmVh)Ys9(Abj?+o zdCx}2ozmnSW?)LQabOOUeHp8U1wtEsN2LCmVoguMWan`A;*`;iE;UtX7IE^MhmcKk zI?&942xj87MbHDS)*(3)iblkNzQpWe3$vkwO+O+r&sqrI zKxsTaO=)ywps%MoYgQ~xDaxs#z|HnO3Ug{GG)s6C6cS;Hw0#dJw>o_ zld+GTZIsy#heak2ElVlRsi80?;em#xFe%}IhNdth;elnI0(@(Eq+TRB9`#szpuxD-l zd*D6^o15YcuMCf<4Ab4&$bR{GaC2YV_-GwtuEy^|SoD43by$DbVP{f^;jD@cs#?k| z%S9m&mM^7asV`J5rGqD69IOOO!m@G%I|EMyfv!}wlzoc5AW;lTF@~M&MpzuB1WQj* zFQS{rmMNSLem;-w9IVN5Q?=#mu|MGU-#l1Q*r#T?tWeUK0!C{36RO_OXyH6V!>5CE#$#cnUKRuC5Ul>gP$g<@2^So7< zNY7ifaz8zhOkWU8|9FG+1&Q=2*jE{_&>1488Rx|Wj|J>@oW6^5=q|=liv9G+QaVau zaoQzrGR{i~|AK=f+V(*lx4hgu0t+W$k6YB$7+SW?byHU=sRIi6v1xIqEM1Ch4|$a1%AckeX!X6;*|WH z8oHSrNeLw__7nO&pQm?hBahQVuqb>>;&Q+Pg4)4oF(M1$s1I>IY{*$Kk7QC5cqZ8Ox80HGgFF+jH2r zm!)IxvWptQZZl&vJZrI&A=2whYzlkU3MNvd$CvSvsce&5NY8nGS;>0yz(i}pU;|{> z-K^n(@eb@h*jm_+VX0|Jbde+KL<*g3E)V?FFf*t=o*B+tJ35Ue#k zWZr?@2YV2fhu0C;~9Pu-5!Nb>W9R^I&bAsF=Yz z4S?m^8mwEe4vQeKg>6{&UGTdb_8!>#U>}7|7#tR1Se_FzVOzrTDZeAEIXQxS4(Gyo zysbnMUCfLoe_rTr<%gZar9(Zki z3HDvsT3Bm>VLRdfYuMee@4zxHt|U$hYzAy=Se}$R!3It6{PQ8wg#0Pse^Md0Z?CQw zFPJ)iLD$P?LMQQxnUlMg&YgVK6;tPwFX%c6-xHfXbI#NST}KYMc>KiqQ=ob`cl_*` zlg4+;&&%(YKR&3Uk*sgR#EF`o{_`dbSM|@r%be;hKk^RdI__5GL*Xj!gEU= zh47dOcy38cm=y3URDX2Y*qS_J7s1a+*MBXofct+0TMj2qWC*E>DN zkDM-FR^%PVbs5W!Um5c*%k>_BN0oc8mp&jm7HgKHQvYSjdUNSUxHp^XzG*77+2!Hj zyT9wAZ`}g%k4ua45bsVC?~hAI`vP~-pG_-Oqk0hbER8W_y@~c0(@b!m*0oDpZpq%I zF)t(Lm7CwR0p2y(Gr9Vm8uLyq@+K5{v6we0cB;29*UQQErcCpCRh&M`yLQ?+UAvu{ zcWR#Zd)!p~X=#!7`=#%NQlPg#Y4+U7myf_#F{wpuH24=t@!RTH*H`SSr}pgY@%zf= zNp1dwBK24L{9lwlKh`&yKGiV`n;cWA-&fW*4PQ@B{#d&G{2Xgi!C%VpC)D%zbFY_i zQp3KUx9u~&Uj7wV&4yw=-aB!=$hQOhOQzM@KhXzWlgj>>DI7oB;qMIRQ;Po!CSHLX ziw4)}KtD%;^*+}cT=c{&cJgmj`#<4&CcMQv@p>jDncG6%7|&n*-1#!z2{`fl0Bq|2 z^REIV))TgO+y%k=Zn*grNYfS;PrQzO5^5NaVKisLMqxiIUT4H%nqax_S^@s{$%8r$ zHg7nc7-pn5+rU8B5V$!3Yt3#Hz{g2WdhscPNm#G(u)+MEg?ciFD6Fy0D;vb)y4!zF zx3Q9WTmi3OxeN2)fjn6*%d_P!huh{2r}M{F*cLiuY}jJR_44bD;X3#+KNfHEtAyL8 zfzxqYJI?ZBw973B3+A^9`3*(Im>)JNk>7Wj2dp(;&vBeOHk^zN`!?iYey{iSx0CsC zI@8wAXaGQFbI>e49YY?rQ$S{Zw2zB6-b-g3TgU%J#RH5f>Tv9}O`bz&uztHyKihuI z5N7N5Yq(LJc_uUbtU`Y0S^>1%+Z66VwVfvs?=Q!Q$N2VGVekwn6X(GbyBRv@ez~j% z>lVzf3jOp#_*rAiwX$W<|BKM^Z*Ma;40IgGU&i-Wd7fZ<_=YW%G@s}DtDO*?ZNlqD zVr`S8mi{pxT|YyepC@#4KKe&=_j{o()Oo)^93=AmMgK7(&p(uBi#*Rz<^&;mgIFQn zE^ZLNCq5`XA-*KOB666P`Tap;pQXHC{7`I$Mx=jRk$sl(1)^QsWTNENVg-rw!>wW! ziOzkGNX;we^ApKGmHdKav-SkS&2k1v_ZRu^SG@m~%%N81!=YB@pGHD9-@}B=p;7wh zi^bv)@iLJ^tcp6`qm`Uw-wJ;cvppAApd^iaD|UjIEOx&ey(_} z!j~v~wfxtL=&q)Gh=#m&u|7P9khuIA;<9CUhIp2UL)-YDBgVx6;xO@Iak_Z9IA6S4 zTqfQi-X`85ZW1?(4~dV6Pm0fozY^aNcZ++(1L9$kQzG2%5RVVAiP&6>iS5NMV!qf* zJYVE8%*o;kOzba?632+s#mmKo;$m^N zXxE`P=N077DHxVRtxxiP@iFm9@#o@yi@y{9Anq6cM>OXbD34Rf86u}@DCdZr zlA%0Ktam?<6EKV0WWx{w=xg^bb3H-X` zRpQO!ZQ>o`CXvr7OutpUUwlM-T-+(XChivZh=;@@;@?CUc{6_~NE%|*7Q>UoQ^hmI zv&D18-r|MgK=BfBtT;uSA(o2^#hb+naf8U|BG&Kw;t#}!#Ye?w#OK9dioX##WyE~; zh=;@@;@?CU_k)Z_-Dt9n7!#?iN&h^tKs-+@5vfhhc$bP3#3>@@%^6-UE)l;jQvaIa zcZi$B&EhukA@K?EDUll6O#gFlNI&qnJqj-}@ zU3;eAD1KM`zDVVJhW}K2PJB_^DZVDYDee~E6%UDj75^rNaj$0DOQh01<(Nnneah#E z)YPXuK%{Oy@hSgMq*6ZR7euPzQ{E*~8=vxfBK7Yn zr;1d=r<@~F@t$(NNd0@tagiGLl*fuw#2F$L@fp5ETrGZ6TqmvD?qJKYekT_Iq_?$3K{u9J0;ykfjTqrIUmy0XJRpQNJg?Ou2C2kNm ziJQeO;=STF@geaM@o{mx_^h~7d`)~^d{f*l?h)S+-xUvuN5oq3BeCK0N>ump86tHv z+3wjQU-P5f@HwWv{5y)B#XOO!XG~Wp7Kvt@1pcLx`-y|Zq2fq!v^Y+jAWjkIiBw@@ zc@3YBmdk&IXvSXP)HSu-v zO>wulM|?+oS3D#h5zV*{wlA#bn1;`1S@O>o8$Peq8z(|O9Tl&$NHsUMbAebW7Kz1T zsn|~(Bn}lvilasQd^kb!6mf<)Tbw7Biwni$JwH|`{8q6_w9k{9BySeCi1&)y#D~O3 z#K*<$;+Sr@ip;v@lA2JxJP_Pd{?X$KN2~S!1k{ra#9cv{!|g2L{x zq)Dt5f(1nKjJN-5*9tked!FwR`|Pzsva?VarsoO_I${jZtQFFC$iB*q8)uZwNS(0` zZ&+uv#%dv<%>B`{>>gR?j5-h*(DFcdz^DUWua*Zwy+$2yJ6(JrJf_6~Z_LF9LW^1) za2Gv(*lDt8r+YZd$vm9pO^FXZ5I(8>!82w}IoNjA=7Zm!EL%~{pn!JthWw+Z&u#}sR&CMv-#l4MNOL#%SL z`_RE@iw+%(k9pu-7d1I!mfL&J!5dM+%30eEP95_n)Z#7FV%x##i*_T%+poA6L=J>! zm0`Qe4un8=QOe=$6nwoea%Ftkk?Zb%;+;b`96C6isb?KJcp>sG8?)!_dGY7prfM<% zVZtuQ`Q2{#`3B_%25+64aVR(XS6-Gv{(8cp)Hci@9O0aVS4elsC2-=MaP#%YXk;G! zqNziH~>BRcfn5h)W}0d3`cKg=xGw8PUIC-KOBoZir_T26@K0C!UtD3 z^9zw$*Xelk`))d72x;^@9Pam+VF|^~6t_^EL=o0;zt7Uw!Dg5@zqc~<$FPlgQFrg9 z*cqEjXkOix z5YL>L3@OVnuZ};!90npkhzK+yhY~Z)tK&xGTig(B=rt7i()WW*%Hg`kyoS0z(DX! zar?pM`FNurK9Kx{?;b!hE#eLgp|%3}bc7*mX2p5hQbgnY?&4<=RbA%S`i4%B-{px%R7Z!@Qa zd`Q)MaG>5)(J`hJzl&f|=0&8L%f_~oVZW{y1?oK{Q16Qn#hB6feH0dX^d;F5xsAUC zSx2}Bv3G0Rc||gYWsii#w-y%#qzP!+2dn@c8iX;qXAW;^ovBo@zqI74|*w%iMw{D4&MNA?Gf{2>p|9Km6yt zeemyoAESX*Q-MlQ<`{A;RP^g}kwDe_t zo#*nCT zXW`&F<-Dt~h9~7dnK{KPQj1rn6yF#r{zkZXl~=r)3znDkK&*f9dgaH^O|E}Tb3yYd zQzuz4^@ z^Sd8z=Eqxqnyc}s|LX?%F`W05!FYp^$(2kX!!X+CMR_~h5wFk+Aj_qB1~yo~^1${s zLzu1KYjERXd>&v-E%H0p3Lwj*X$p&Y3DXs0c6$<1G9KdxHqUvjxj*;Q3jVfS?jP1I zm|qzE^aA)&Ngk&Mmr=LbZd)3}}NTVzaR zf1!M~*i|eM%fvzAP;rvTCs(GwLgYD$@Np2&aB66UW@$k)x8xK9%O5LF63u%7@Hg)TfD7c$=YSA&_w4x-qDhZnLwnqD?5+O%8yD>mulQ?5#mX7sTfIZBS30BOuc%i=q;i|XFCKVn zQ!3mwsg*AtZju%`oY5$JIGP?_KejgG-LbXN#bay3vrpQKyXsDt?A%owUcRd~V|$DE zXspnkTjv}(v(7E;fVI0zkER{D{=xA3O~RWWEZyhz?X%A<$*s$J588P1k?N(yx=iZG__jJ@fR9W*%nprK|TmSmo`>@|| z7{Y|zd-3a18NLV(-h2d&iR7KkXFJbL;p#n}8@-ojKJI4ktik*ZMR<&Rq14wH5Tn-x zyy{`)Y;%*tnLDq9*E=tq`ZVHr(a5#*i>8(WnxI6OIR)N~2;uCr5IZ!9p|L)6^6Vb& zJeJO8s71I7FQ-VtiB42$4G|6Vd$wLUd=kT=;nNW@QjLU>b?)8pirh_iwfg|vb`9)E zBytgaqda>=QX|y}3Sl-A_YY1a8VMnYYhb4{G)-bO%2R(NU6C`KNPh-5ig55b?G#iY zv?axSdevJ4pY*x&^6B$9vV^;vbvH66@_UTGllCY}dPK?Cj()O70?88Y?u^Oo{45?- z7M)o4ZOWn%s^Mp`Es%xp_LDv6C(CgEhSFT#t)W@XFT}UdK^kK=_5wQM2+8b)ZFGy- zAk!%xWTFy^yzk89#l`KzI(-keiJ6TpW#|hKv%by9WfaeXZ88&coN?Z6@Dkr-?p5WE zdm+WAD01!Wew4TcO}Tb%gCdH(csVCq@SVG*wlCI^O^9QgKx$>CDwU}KsbW}6($neb#dvu0tt-6d>}Wfb2= zA->2rxt!+gd>nJQo+aHzZIx`k!t*0Kcn|a%94%~wmLJ3CZKm_9$V4|X;qB`fpBu?g zQ^lina3lF9L<<|!R51o0<-pW8F^4-|w>dD>twaC5zL<4#dQ8gG7A(IxRFK7!NxQ>3^6&h&O=In19x)+ zC&Aa>KqFpdBBg}6d{-Nu+m53f5L5{8k{?C>XLSQkyqdTs{ms(i8OL2(933RMcz9-g zMFOrR9#~pDtG*&Z(?BRL(9Hs&5Sw$|aDJKDt~8!)R~m282%lW$vrWqatv%kV5mqGU zg6OU3Kw}<9CxPv47a9KuZmcE#fzAcoK7+(ZoH*f8pX9Iv)1@ z9|him#VX2=FH30`s!47lJP=?^vVh^t^KMwo!4iI+i-UQN`!)QTr{~N^eloT$A!p%Y zR)&e;UdRe;hizmkaBHZzeQ}2xdb|pYCMA9gTQ3~4F_Z8+4HgU9mIGJ&PJ2SajPW}7 zY&5>Z?GX%33R}Uzx3h~8i7}`fqMaO26X}N#bCf%ylA)vEY0Mz}E`r7WSql8#cd`ZE z@twp6upwvBVv>2ljjN@cGe z3VY6?g*9}rNC=B-Y}pXX13MZah+$0qtfI`S7}j&HTUbK}`y_pEizZVCL8 zxx$~`G;E$Ru-F|$m2qB7_?_n}*VKhqZbTv2!-K2!vR1XQT&mKjA1Fi;1*j ztyiGSS}z+b1?xOt>vX7L3Pua`RMznX8_VDZ8yh$t5NHg&?t%?$EWH|REPLQhCf0EL z8bhypU;|y2UJW*uiPUxBGG-lqH^O2U`yPJQjFsZdHycYgqXnXDhxn@TI`N5s@$BIX zCk;g&H-WuQueXd>Viza961$j*{8*R4WemN34;$EOdf8KgiQ|h64$WU9$j>X$UF-pz zg3}duF;ng4}}KZe4m5Oqy9fZtCROGv_UsIu29)U8YZ-+@+wWan6}LXKI(J6DQ3aH`C8# z+!Yfi&*0?i7m*phVgK)40QI;EHxr@UaAp2EzShm;D;CULFdnV)`IZ}{wuBZZ#Vsl> zK&I1rPdiY;8GVgcUhZKv!gkZV8L|BQ0xu)?I;>&%a7He4aj-6}T<;O+-V}`XI$&`|F17gEMn!&J zo683n1)rGLG}oJt9AjO)7P;QFxhUZVu4`ztb>1sm>$ol<~#H1FKAd_vnM(6r~dC~mplKMhR*z{3$UmmH^=m+@#BY=jc|^mwv$|1(`?%p zvj*a{bq4VcX#wyTr=Px)bR*>5>w|lHxUVcG-etyqbN2ty}^G?c72rb7bJu6Vx3lwAV9` zm$%Pa>#$$wI<0hw7ZiFR(Z5rl$o9v8QqccJrJ|G3jJ&f*fu$+%k@)p*Z@wIzqTnr# zy`kd0R^ZOZtV?*%T*Uk;+A!X%a-h+gJ-9d9jZ9j?gVC8^6m}A~b(D%(i#vhjFp7cBSLwphOh@mMa)v*q3pNCT(S7`iDjI%I5qe3TF7SKbjr zP4HuW>997xb#U7>a5`O(-)K5yY#47bgZZsMeylU|J9N6t%M%8`{?MJ--Z{q7EpE?cp1? zP||!Jouac4oo&K%#tC(blGoc4D;C-FIr8LT{`cq?bz=O+e*YoQm)utzD)Pyd;p4=a zA_ouXf1P-}xLUkj+#qtohw&d2pAcUXUlCsy{~-QF+%JA88vPRF*A{Kbe2qQ{XxBUB z`H}u(#g*b(@dfc$;wNHb91u*GP2wb6Pah)<^Q!a*yDQ##lKV*JyLJp8CfQ8iLFRM{ z{f+(w^5@JZhD7|G;&0`@S3D?xPINI|1P3bf<&2ft4#{mKx0Bpa zayQAnNo+4?I7zPY%6yDI1UOFq6U3PcZ}{H0(StyI^PV_(hvIEiy1PW9|A6p%>lvcl z7Zv|i@ps~GrL*sKACUhM61ty%BeDIdI4!W==KXERM&AK)jQ+^qzNgJ8F~&3RWrHOO zFB30PI48=O?rS2a$(ZgcajAHN!oML_$iG^0jmS^5F#V6k?c#F^e^Go@{%?@jzPCth z&%5$JEV)i{1a)LR)5O*!%4sWhkbftUlVl7(UveLDnEc0xlSR8;80X1Y&QkLCYU65D6i4a4^BkpHVBp4*N-faTqv6JCc^tl9wZJG zFA>f86!AFy$^7PtoZ+UtSX?2l67LZ26gP`oM9%6n{d3~W;!g25;_t+_M5}LiK=NU+ zR{Th$o&fW2BDNGy5~(e~@GfG3XkMF#|AmqVihM_a@kfbY6DNu@#MxrGxKLa!t`HmQ z*=>~nUE=q}ABYc$kBHBUKNo*3n(GDX`6tP5i-*J`;@?D9=UM7GaQj+{ZN)Q0D)}(n zTtC2u*AKJ)E&K;4-U!iLPvB3*38tSVUMXHBE*6)ItHp1Mw~BWC5o%sAKfBJzLz3+A8saZk!YofhQ%#%!o3Wnbx-Xfao1>AQ@zFYi(_<%@N3#R{t zNL32Te-x=vLD{Y&NyQ4vsUj68DD$&qB=slAE+W+^C>M)VqM$rNr1}KqX(II}C|@hC z6jzJD3H2PKI&a(SSi|dAOyTXtJdtA^EVocB68njRL~}oic-fTkTx|32ntx7#uNN6J zCb13-JoAi?|7+KQ$*G7vx{DzCdl|yTzorl(D6%|&Y@I#xw-ucch z6S|~5Z_h%`0gFG;fl@i9ks2OyBi}lLk?l?`HYwAoU&21S%V;@ zZ;kJapAml}KB_ijQ1rIv>msW=#7pDZhn>>?hoQrF+m70fn|AF@UmZfu#hae1^HwKA zk-i^n+VgcOt9R6vR_xlFwK`hU7-{m5CZo)&PFweKUFzz1{F%B?SotqgJ;?s&>?l-sErV_ByX@*WQ+^+n`nxP(tgnpVfs{ zr>);nJ7ZHk&N{t}x&`ZX@@*+q?nZ9!a>PGrb?VW~_o6k$wHckC!?uj74QE7ZcGS+> zR2m-~Pqu)A7FdB6h?zRGE~nh~GFmGh9}?fSH)plCVMpz%P0ylimU$uC!EeWQx3ish z?LB?Bb-3nvwL{#r15=-I8|%BHwqg_Nc6is`_R~G2t3o<= zdV$$@$Ukx>TDC(O(}zq8u}&!)BG{VJ+GtK`ZMbt*fqQ4ltz9-`o#Pg{w{^L7*^vYH zZH)KYunT>t_nlt6b5*Rgb45?|u`71EYa$gp_NHugcXx}oi+A3Lb{N=sopUBy04*4v z4yN~vKNinL+ico2H2!=Y^kYr?mY}XZ<3EXq5VFODWClXcx_#H)j;_aA27J$kZztE? z7_M>GqIU&Cy55m`)cqiGM_Fz7a<}Ks_{Ml-&5vH$vA1CBj=eor??MgptFW)QUXqtz z*}b|L+u6A?Z+$novIb>$b9)!pMrY@(?N+($NZEbo84ci;@tk-%j+Z~a-TlsQylwRQ z&2b%ee+s(a!VSYk#-siZD%=>?Q15Jbhfe9uUpH#>RzndE&V@p$zr{V7XF@I*%kXfd z4DigYSIHH|Cza3Vp2zr?a(FQmja)||npy@V7c1iJnKzC19S;N3n{Vd1k$Bi``3eJS!$q|rSTOIevMu>N92@qKWc~hD+(u+j_0~vy zh|ZX3!&Xu}I1a@Y!e)?EEo3aF3^{o_+OHRoz0cO5QQ*m|IV5{OX;XG{+AHScr zEpa}q>s&$%f<-YmFQa3W?@#an2L89=gN}F__Wg-f#yN`HM#GcNT39p!LEUh)_?rML z0bk-Z;~Yw`BJfStXC$lT=Rbnr&V z?=hJUCs+mwU%nKD)9n{BJXy%7WFf?I;$u(Kv?_ED-BnEhhb~<4}09`R2e=Ip}s*wm_Jbg(}_XBZu`IH!ifc388U=-6olEIvjD+c*)G0>?8VTKnFrD6xd6A59C5&Lc*gkr-lM|qaOnsMd3b_ zgYDR|%$8&X1Q_!;exHU#Un5>K&WnlU$)MPr3>IRWk#yBkIs)e>wgvWi@;DvIhW1-$ zB=Rw)Gk$qHhKR%qew{Wat_-%vP!D$#B0T69wqY3^ocX{eZCI9)pHoBOC0JCLVCksU zhGlfH4#;6pvM$5yIRkM%TEYXl92S{_NQqKCI| zKu7Zh=UlHzk#}Wmtk-IqHxmkmn2C!} zE)>RJC^=@r5i5WuqgEfo_m>yt(wEAJP)S6tx!zp*-&Mi>CM3RsawRn%LjO^ix?B?jdCL`-0(rD^=~mc>4Q*w z#aeN4FF5-eZ_Y;Vq?k7?*Nf$Pw=5g&y@!J;eYDr=dThkk#$JZ1uk6F0`+x4uEb`8X zd1L);$@RKl-`2Z!wE6INF6wx4$tf3{=UrIjtynhNs8}9fGYlX6gLd38za-sI`|_)G z&A#w;&FrFI$ra3!T8PI|xHP*Up@WGXcia`tPVmX-`kkSH$|d^4`0@NMw9)^pSJZJ< zL971}X`AvmN|s-^YNa_xB~>f`Ne#*`T}d(nC(7gLNb(~1SvrzcA@6nf-}^o2Pj{fN zbR>EG!;P13&IB+Pg1aN%6o?i!9`B;)PEi2k1#g7RwH1DRK(=WZmFw|S*Tote#^*Vx z5hToZJVE3kUQ75yV3{B5H3`s6?lOT85_o1PwQsTH!w=Hf+IyTHf$c`V7Z4* zg^nZ&V!15OmU{!-HVvFkBh0nL=#a5ty!Q>}w+RiJ1wZDO4r}vU2e(ZFr*k&)V?1kY z7zY!A`E3j2$K%oFw*_vShI#Zxex-IN2EsPO9n5b#^5b^0ekanAT-MD0rUjxI!?I|f z6!VNP^dVY&J{`%{C~%O{5Zn%$7hr?+dm*sBs6t|U-+&vN$K7Yl6y$fV6+qh-P2mnS zgHw%odyf&1@dMq`DLwh~=}2;2xcB$qYe@ilYG)A%S855%EQFV#K|H%A;Yf{uNPN~Mpp>o8zg^Ed{F$d zbR@^2!CBAABu=W+MZ4yjSxYMoYdt95%_L;5SHX1Ek~c}_Tm-{^A{t#w$VP_;G&(z= z{Wi3j=7HQ42O86zCYlK$$h{>G5QmT`_fpB1NuDA33dz?|GF8=|d={NA_P!jW*F8-rBXFS(4 zpL@k0ia!=#6nBWf5_!&Ky4~U)@ql<(tQ9{J8|s{8aepHpt9y2`Q9 z*hd^Gjuyv@wx7JNPb8BACU_Kv7Dpg$0COu=$|HLiP_@GqB%YgFIRFmv8QNsk`Z1ixt};v z94%U1wW*S4i}OTt{2(7Q^9o)s{~N_`ifhCwaf8U&L~hUh;=|&j;#1;t;w$2>#D?GO zvbt;g75<+1f!I)oEsARh%g+#-i>*XXZ!)}-m@l3q7Kvu?4)HFOJWw1da`J%rj29=1 zR<~`AEbbNG6F(3mIMFd5 z`;F!-$=PB|v^vyXBz!7D845eU21IqCz7LZvpq7zHsUGbF?FgDW_9FB74QFJ?@IuysLuUo?%X7o zB!sYv2pAR>kR^eDfT#(}1;QS7q(TURKv^OQf`~#9*J>Mx3xaxiO4XuOT-xVzsaS2b zR;^oK?R&MgeYPqksk;<>_W%2x`JK6w5SFT?ul;k9Gr#kF=R4n7=FFM7XTCXSl+f5# zBRo|!Uwu>mV&VBhV_S{zTG8u;4Q=MOi@!r?ZRNf%`Z3{dAz!95zh4ReDBL6bRCqub z!*3{4f8mM34#HD~J%oHcPx*6%abb~gl90>fP_9H+CR`?5A+)x27mMB~yi)jWVU3XX z0MvVj@O#4hg)|Ug{7-~03SSZaxA3>Zy+XT3^QWQ@2%~AfzL+pu*h+Yk@MK{(VNc;8 zq2052xad(rS}?G@=L+Ww%Y}B&=1S2h)?sZ9Y1l%2tteODCb03n;SOOFnBRW@V(5-+ z6PV2(xA>{<&lhxaPQ)+Df!~kDH_UbCc8I6DZR1X-zkd4pU(4nWe4Mr$7|P+I?nWHl z^S~JGa}3)aU}JO|*xphw0vn?)BqAyQ!J9!O&D=AiDaO>uJckv|V|+AiIDuC-A#EBU zX-&i*y50~Td~2eYk-yh#Iz^*teE*aZh2@YjO^-#*Q)@K3im|aM@42b`CstB*8vtuYjHI{tpOu zEDrt?C(&I8G6Uv8;~2;RCzBbt<1a&yKT|TP(Vakrb4W5jcOuCx@J-nR_(fEfJIT$> zawkUk6D2Lmk~VXnqNdxxaNTS|HmjJu4F|BAyQgHe%>Dmd&3te0fF1lCl*{&}TT-ed#l@Y+2a~tbZ`yUmIr5@W~VX zH;D5VoxieV{+!a1%2K=S(4u9F%oZNVs`j+=8zhmPIOHE+U_FERM`q~80D;N8Kp z@Fpzbw;@Qv)iDl!3zO7ZPotlfN&I(dTHu6hFbw+&mRQK?wbbbCh2?S1s$9OHYC#29 zr4=jBD#eyFWvhEF&8GoAjr-q{`Nm1mOg zxR#bJtt`WvzeQ`xsxGW3!;h|vQZT~$wm0{m ze5el(c!9pH2-`FW8jDIk8d+!KZU7^!Z&yekrg#H=_aJQ3PzUYYI1gu?4RQ`NtZz5; z+4F`b5A;2ZFw?L<(D66-t9$^IV;uccLMt~4%FdSz!OFd)u#I{QayAWlY-hUX;lt&7 zHdJ3e;Mw!>2EwRf1;Dty(07Io%8PV}LkN37{ER1dKEjdi?914e zVl`y2EybS@fxRdmWQsOC*u5zDS_gYk@GT?uqToxH6jMQ@L{XATa$`}hNPyiaxbOj}$3Ue%fpGK&vjat1bT5>}vZE;}!@+Ix z8sekD4iruJ$|f31*~bjKM4Q}3vWdu86TVoACU>An{SBitQa*=ty1M~{TLcNm>Bs|| z%Qv;0RvN=V4mg?2&mDUQg6zqe%)lMT>{gLv_U?F+yWpELKX(FWiXxkwtad=YB5TG; zre?t;6RVN!#+dR&NMM$R(EM5+p1}dEMkkpxb!29YyyT2iH1wg?F`r}#%{ie@XC>#H znuX?^vK!7hH9y3h6Hf!?pOUv7&~4Zr&O`#E8_YSiGOS4iN?=OK;E5(&g~?Vw)xmR7 z%mZ^#1SO0Sl`s}gSbr{xmoDa_2!46^^4d85dcsMC4c5uc!SU2_5$;wUtbd!FF8T`RQT!sCJj@!X$9mr4Uw5)gvw{8^ zx&8!SF#BhwrVgGbY;6DO<&{;F%NH%Ea`ZU*#a6ntR@f+%InBZBP;zRLb7Pu;G{sBK zC>`#Bnrp`fGow(EoCu@7@Qhe^&MY~(R$q5$29Ju5`P3DkK@T-=#S!-Z?7S6Q>$qLD zxgp}_XWVHxa(=@8=H`4<*jc$;Fd63aJRRk77?88~+@7HEvnOypaf_#Z&d*SWp7bnu zs~bV{Dr;|uVT02U7uJ^#ed`fPeJqRBw*XPN2fLZSq7Sl-3eAJfO?MAB5B4AuyVv4G4l{b{A0iz<2lHTmz!(}il^i<{ z_CC^K^6OSaVDihD-gDfKoWnag=D`M&7{X+B9_+775lh*~6tOfK6DQ}vMpE!M6!7Q4 zzD^;39?VR0`FpbNBG=A?(W=jxucO&BlBQI z!8{oAbH`A_+3=anz#YqpFJoTC?EPu6Enqcee(v~f2p(}BjMIt7=fTiWY%JMc@!s== z=fRlx_P4rK`L09H2$+x0F|9z0spMpsnY*e#?Qnb& z>#N%K>8qS+G@V7K&z}$b;%gXu<+Ea@1N}|2Vh7E7)$h3V4a-o|qnHdkKHpX8&te_X zPK)h%e7*}eWIW@TxYdGI^ALMEqk)u4Hg{|9ol=EFrAD{0+lO5~% zt|PBMV4pz$-t%1(QG3qwOc%};E)pJ}??U@v>^N5QUH^yex&}6C*EQ%6>;LEVmHd&v z^>f;xvxVlf?E3%T+%-E^{g=%3mzAepcWT^w&-I3vSN{d~jOw(ST@H5uXi}5%ex?_x ziM}86o_)Vrla$S|YIjrY{pK;RCbG2{tMIqLN6Q{UvB$X9f9h7JN99Xz?2GQks_bvJ zj-MQ#jg`;49!T9^9Dnr$>Gju`=H&h2Oo%h*etU7fuVcS zMh@GPF|6x>HXlsb^ZSc-A9(6?NS>atKX%~c{a5VoyuZl@WA;QM?pYJ|v>C%RMSCLg z%@2&(bAyB!sU$KHw>fx0UtGT`Ux|5e6=0Dl;M+x zLIxjAwgrI?82RO5bUAMHUiWhu5lI$jMr=WQ7xXA(b<= zPBRu`C`7V9M8I{LOhP!aOXa-~grD)QP{w}PFYg0>d7Haj=D#&+@UNHU!=4$tHBpB_F0gv+1cDNB)h}6!dAlW zSQ_*$A;m3*-EkzJB+2FI$CILcWg9L>KY^4xu~mr;bMm?MAQoUEqpl*!p6QbhkmPG8 zcM@Z{NJQ(jfMic>#fEo_dn0xh$P*q#3U@O5l{>RF`-?k;W#xL;t=V7PsU*2-LhBR+ z+-a=mWRe#%r6IYG&k5I%oNg4&XuBDrOCVT5y%(h;{={8iz0AN41l~iSofSBVYmj)j zf8ot1yBb?;EfZccit=1hqzz(Ed>es24E#3&LlJ0aCEK&-C^b{Ahj-UsZc|USsh8T+ z>zUe0Ds_izkg6K~0iNoAQ$g<8V=7pHKszfLt{_wHWa_&X+SJ_0 z$E5zcO??SdTS;5N-AMH`ys43?;6tq7Cdm2~G~^DDjyZ#M2z&tVzVkeD;u(Aak>(73 zj6gdpV9p>{3Qz?rjm?Gvgz%w`!fp%6hTtTM%oT)z?WmC_xsaM$4 zmoc@KRO)sd(X-+Gv-j6$pkxc={K^^fZjc-{S3z?}4w;8A$W7YdT65eOhVHPL?iboQ z!T0XpdG>3oGOZ$kr;3$Tp!^yxTh=6brI#2Yim++->2` z$e3wrhV?}9jGA^CFnMl)mWJ87&uPzq<8<&NSoDrZvHJsWOW5S$C1W8$J8Qf}=}P3d zZ6bJPt>e8Dro{xtAH4g+P$MvjU+&!)Wf3sg#R@BwQCa$yyf%X0klVnv9R|;>r%T!63Hrtwx395P)wa1ld%T^ z!Pj|7Sm$}XB&gGKRz&#lVVo^X#96zRg<)cZSF-@Tt}{#lu8S0OEjTqn1}`pro=<26 zUoRff#&Nt~5AQm&2pi!uofX)PqHCpdp>s;7#MR(zhKGGNht50vAcwPi;WM%2E@W5u zvX6lCoGeBidduo@y3n9k?CMoZrd5{HEAZZd|mw@f!Ri! z^VcS`pA1>!*5k;wgH|@p4@|I_HBU9^ryyk9dK|BWM|0XXMB!``xn?C&Be)hvYD{$| z*F=kJqHK7!c&Y>9+?psGm#v!WOsR=ZtBHa%&UUmEtoSgoOO&0OEr;Iu*t%4#(@%np zl|wNKpherS3ldBxd;&fxra@*Jhwf4rC=ai+lamd7``5V zEmocxF2_%N3?99h;9n{$U6VL&N>ohXDW*6?jALO~Xz&V%d?3Pp5CvRzpJBf;lWh?w z<|p(o_GdxhOb}jy=k*qjW(NuNOI|?_7}hK+Wm##?8t2p8PrCK6#Y{{W&xyAgyth zm4Qu>TuR=Q;6{4(eGW)?@gii~esi8EZfv~p49oQ0*Oz028W4*G@%zej^@ zEzq0zx_4b`vj90rk{B~!nPLKMVI~9tH4GRLkfrHor5hQZj45}`!joE7ra+0 zdn5d+3I9js04gn4I-TjQ zsq&ik_I`^!g#UE$kO;prT2WTHatRhkDJ`8-4&#c+lT zgX?8>aJ|gtLPCvQFS8e{GI8bWj&jO`d=r_nNwIiG7o2T;j*&%Imr)}4*qH>SYjtoz_!zQozY;uod#d{ zoIju+x)%D>!ZM^lI@dED~4C%qpZN#9fxK-VY5$3dkz2I;gmX;R_&J>22ubMH}{$fvlD2_kY!ulMXNY<0(%YwK1?n9XRa^dMVv~ry9*iHeOarBP}t=wsC z8~^s{8OZ^R+X6ZMShtS((me$qE?*4gv+dUcakhM~A&lZw0E~MJ`uP6KI@=a#hM+Gq z?xYj_Uug~HC?9GrXE#jxbHO|Te48)J!Lo&#!Qoyd=YVIO&DYWv!~Cye%^qYMa<=t+ zmghfy2Js#yD#GsIHGJ4Jlg`6W>9F%m&q#7SoRLl-*&e=Q3niUrS}aWSEF_(WRdKt5 zWSelzINaV7{;l<}%kyv;H{;(IS&N7FFWPd95VB8_o+La^SSDO7TqWde2Ia33eoMGb zxLx=?;RC|Qh0h9K75+x}uJ9A#{|cjMFXopaaQk^i^Qx;5BxXDnf2*G^RpDDGwafWenRw5 zmF{)n8{(UF=pko*h6AIx_^7{yu&0pk5~=r0(FLOUhMn>gM9&m`p6GJXtAuOCH|xbi zUyb-%#J^4Soucm-{R7dvMgLgze-hC?c71rW9z4op)`JIrs`vxKC@y7|w;2)XS_(Uh zf4VSVI7snl3C9U13Fi`_Z;^0?aFyaO5?&$vrqHYdkNV$A8tHE*f;Q{GgZ_8PJt}-o za<2+s7ysA7KZwsat*qBaLcV9EezWd7u(jxRMEH)v-on1ZLL%gggp-9c6hB*7E?gqy z+HHA>n_B|G4lc;=e5V7s9v1uN8hGwClb9RdUVnEM(5J zurm?mI$fAA9HjWOgrkMygvCVEYc>(-&3f;k`39CW9rHo68{`O2nqxQ-w@-s+dJOa_ zqPq+8gcxd#TwGWrG~*@G*>4XQiqGdO>R%zeKzOC_8exs_M&X^pyM<=lgq|OWHsdDf z=S7?G6Z9`dzbSl6_$T3?h5Lk`2|bQ?NS`L;D<#t|LK;hu?j_6@4iugv93~tqoG6?w zG;5$i&l1rU!qq}PA2Xkg!YhS032zbZ5Z)!Ey#~|$Sopl~CE@Rde-zdV`Dr54?Gt_` z%;NY9ehcA=!VW^(Ju$wUaIo-fAuUE2Zwz68Gepl8(r$$D%Y_#R*9d7y!uV^2*9mFU zM1DeeyO5S98SY5LUVtD{L$`rLSq=}H}@%E!~IRxDE<;54P+=!TOi`U3Hi)U`T?Q2Pl0|)^fSWO zgs%%5?qBkr_#X*rfkVAbg>8lHh24d{goA}=3nvSw3+D(+g^PvDgbnXk8^otkjj6YA ztME4A9YPw>Q0@o9$AwP{X$r*nUkL4e>rK&(-nSs12G4Y~2qN1177c?)_Y)2k#)Y&2 zV*E@YO@T<;eM#1fHuoolX(Pk<8-+CcA-z-BaQ_in{xJSk;eQE#BcwqP<3A9(yiXvU zBBTKj>9#`J0g=uV76^w6Y4XGP=|Xeg0li!_4S*QGK}aJX($@=VX=}ck6{XuBGOm%^dWtLkoG>LuM*O( zhxE-t8upOBPxz$p$3hhIu;0j^rEvy7yBq8uaz^88MGiWIO>u6&zPUMcN46<`m_K&W z1^l_8Zg?hW?eu#0y$Puo>Iv2WwZN!c52p5I6D6p-xZ${ z_o^R>&w#$@P1$jGYijlS1Mb2f9mrZ3+4`dc(S^?)@D~2`K+3|j{h1$}x%(tH+fs0JdicwxdUk;=?J{kra z;(~pd?Pu(ZjdgF?cp%c{#|Kioq~6jk9=YYm2b?a?9dNt+^gvn{5AvP&XM8YhPb9_L z<|c;ii_M;~FS<9n?OO-DF3%i@!eHhZqQ_EY^hu;=Y-<*wB81a&~IX&UNSsK41K7C(wO!Ovq>&64Fi`u%Z zZMvI=BUZS?F~x1N_0jipV($LPUvl?aEM$M%ig6U%f5e-Q5wkME2A ztR(Jj{>96gTMAHujBN$`vd6aSmr>*3%w^VOZA-6d3SQ=3_soKQvGz@C)_v6ezShP% z`owru{Pg&L#((#A)~)xwy_bE|beX98Fwji{HOesRA7Cd<8(7&%!`7Gvh_I3V3=lm9 zvXKrGd30lDTewKdj~E|GdkqgGQS-!kP6gwmDV%DF&SGrg2E$4F5oP|DPc1XABPW)^ zEzqLXIC!l`P~0rL(6fxeH_7eA-|kV&?>OGTt8hel?f@UTn}>#2bTX-Ev=8HA(f2^5 z+{s+Fxp#n-V$7>gXw%yTmREp|@Jq`6{2>WxD)!xoydg5<_L zS+K(tnHe&QMB_FM8AXE3I)qtcI_gI2MPfQ?3+u&wCSZO9AcDwVXd)mKIJ7Qi@g@=& zf3R8OsYYNDp#UCMhr8A>V5RHZI5GwnD^?(Exr7)qM-3CSHVE4ENgKzV;64qX>cCuV zdQFt!*Wrt>B`gh8E;PrEl?HsnrH;Po%BJddsg&q=iHX~EjmQc^p6{pY440rjUO&ca zWok{7m+GnT#+V0&Yz)(qeLPm|4dv;pP@bE%`|5*SFQ}iZ%Ctp=F!@sFK==txWrZoK zD)XfkQ|S=+$q1N$Fk6K5KVb6#f!=4eHpn7dX zjq~9rnJNsaSA{RBnrauok8@Vc54X&hR7;f?1SKB(RhF2u1=ql5I3GLRFLFLTeCXo%HS2?jp*iPZ@P`l0}yvwCfU0ZxXv&J4m@pI?z+fYmX&7^sGabsXV!!(X*F z!2qiQesYY$5Q7YiOBT17`u@|1P9yj#E(oibMip&Mjiy-z1qd($-;T4OeS*Y00b@w} z1c?s<224<4JmXLk#zkAEAaz*nC=iH%RW;O-;3JUFfLanW0tVEQm>V!)QA&c35NM!> z*4dm4fe7Q4;mDgZP8MO72~HufJ;5cgyTGoGz>Wbf!LPs+0@r5;m*6+f6oP-|`F6xO zPVe!A!_b=WiV033__?SRbBaq$T+EnM7!1>NA<(*Jo0)K7r*XvwqfOJ(bYIXqry&n{F!M zYQvpO@ar>`@RrXd`1RqGsBt{WMerySfenR9paTqV&oGOD^S5Q4Esu>voN??E#qhXA z5|Zf)!s)MRkiLLZy2h~!&4x$*gk<_5;q=uF(hmvJ&qbp7etH7a(N?p7Rkz@r5Szc;~&gaJs2#@oJ*0bg6V zdvnxa4+~kavIHzUhPUBF_9JMxc^w1g@VFLlUPq&95-Z@5D}maLAOq|N&@hVVUrNQc z>p|wab?kh8H{dBVj)M{h3B*6PE;(9EX6K}+;Y-%ohd&Jh7Ta}zPfT!1M`-2421+y@ zQ0xc8Y5dMRooS*bb}G|!Ho?hEqgreU#!8-M~PIo{ly+}yKs zy^P+A&gpmd*dRJb!w5nttuxf>ml-ljp&DL^Ejd#tl@ z4Q)YVm1?y#!&a8$qXIw&Ub5AZO#&fDY?x+s(JP zpgv}A^=(4fra{m-8~X4cI2(5@IAML=Li%_uT79=8Y|~K5cqsc?Bki0(Tv*>g=wm%u zzASjFuc0mI-7WC@9W&3?F)#W@gt>}%qxI3*f^x^Du}VW=zI0E)hs#$GsxOKVls&DTdd%j_^TV=*_1%SjdJcHj z*?cW+G0Z=13!1bA<(P3;ThJpf0cP%mxV-V=#=k$&CW_~si0)_*CcsW4LpDyhaCpCA z{9s|BFfQb*0OMx~ON0xAmBQ7+%Y;`8Zxr4vyi@pq@NwaD!k2}w3x6y8qtMtgp*)|8 zZh;QP@^uojuaY)4Nx%uBXA4V-7%LYFzfMGFzF4?{h;;lROa3O&+eB{{y;Jmm2!AO4 zv!Y)R{Y%k*6mqF?>i<~ue$i2!f9BVOi1?PGI}7uK1;PnJj%`e5Y>I$<*GT#b;q^je zD+E3l6sLY;GX(nIMH^co&_5CVlG6P`^lwF@*-iU#oMJn2>?LwcAhs2nU(}#a5#3#w zC+sgY{S0zNq9+MCab(VukoPCjD})ya*9k8bUN5{!xLvqI$hU#i^RVy<;Zwq22!AE~ zgYaG9Af7Lz=j%!0XyG`au{8$&YohNLeqYFUOiafK58^_hwF%>bQsf&OW8e#-Ulw-5 zpv!n;`wLtr`ck2_wf&9gKMOw;{#EGV1X7Q+S;`T8n$XzVBAzcqDR+)AE-VuA4JqTl zCR`x2HcXYGtqs$9(Hn)=3O5P22yYgCNBCXgk!+csliZ6!Yt!^A(R_u=^41AI7XC%Z zhb+cNg-wOnOVRM#3fl|$4w&-R=4ps%K97+TBns239uD!w!g`WyP7jo4Z$~6%-6*jbuI$8WK!XCoj!u~>Q z!&@NwP_|R&DSn=Ck#MQ7O1N6MPI#&CYT>tp*2d~4(bmT59?=g9|6OQpu6`u?Md2&L zUkTq3z9oD|_-EmV!u`U}g(-M_Z`xIuEo>#EApqk~6ZRJN6%G=fB^)jsC7d9fENp1Y zRVMx-Ax#aK-&*0N!YhO|!W)I#g*${aPGI`Sgii^d5xy$?rSMJRTSA&MF#Tsj56>>7 z(}XRBCkS(dU4=A&p!^WwFyTnycww<{rtoXR1;WKbnov;R#lnrkD}~<{)(E!>Zx!At zyjw^k4C?!#@W;ZR3i%t0@vjNr5dKd1j*$DZQ|?3Ir$SnFke@DWA#5W&S;+m`DVHnE z7oI6RN62-GDK}O)ML0t^M_4LcBCHV7tc2+=6<#Cc{#@kWDBLEb-3j@-g#RvlRQMy| zPlPWBUlzV8d`tKz;h%+{2=@zJ{P<*kDMDP9hqXn#PxtLslxvoJzUh;9M*cu!Tj(Ex zeX9o@$`&zqfG>Y!Tg3JFZ3cIcE#jrSHpSCcPuNqFd0Ba@{_*nIfC+mt+f~P3*caU$ z`BQoZtP>+sYf}cdu8j_!TI=;_T^s2!wbpHyAD>nmnKiA}UGv!cPP4L?XiL}x_HJ0$ z^v#L2(W2~H4?Z$$Vy(NlOWlrkd3C3>E3Ml&t4m$iHJ$6+#b?x|u31%g+M51#cdjX| zy9_>>-nlMqaYfzb>GSG#6m_cm#^S2F%Zn-yURAdvy|nHQ$fOi?uFEm}&UG6hbH(EP zy40e4gjd0r)}1|E>UJz%Rd@LsuQuAwtM%3l ztBs@&t96UAbF=&X@O?MywwEUjpAmQ7EQq&^KXU*5d)+l%ki&qwQx=!jr9ngL;+1uG z%z}1=uUJ!3cR94(v1a>Tcd>is+b<7CZHJ>hTJ?_&D2%)3tox|+KF?VB{guyIrum~T zf1|kniw-cBeb4$wwNh${l+E#sjzf6jYPFxZRloDpe07;s}W?t_t@`AHFr{v1>a zAM>N%al1n;p!fn{^FUz&`IrlC!g(Gh{Tz-vQCDiHtcZ?C;U@ zvR(o-aW^Bq`z;*&mxDz2QzW24-nSVT2u=n+7jUboa3)Fq;&C^TXBJo zs8d8dYaR^aM2yIy&76qgSu~jwG0eBw+eQuJp)Yej1aBtA?=dpxL()*!;mNrvKc#SQ zVJ!yWfw8H1>uE?n&o-Mud%hQ3roGRn`&s(uKAmsrKZDM8q0)WP$n#q;{)V#j38djI z&F9Q!6{zXUM*JK@qM$xW3-)GM2v+3dhD6?e?76tNHmg9^K3RxcN3+5p?V}*kS^gI_ zYtD{xWK+NJ(u?73(Zx6GBBpYWbgrbB*3wNbofyN?i8R@R$iQ^;tV6DjXcuGrLZ*Hp zLqKHGOeFH;Lv6O~0!21Igk7MyFTnhdNLwh_2<8&`KAiS~U~eX!R!M=L=2_Yf72{#vm{Q9%%^W@SamqkzgR*=$c4q18?|k z5ol-lliCCDMuABQMerWh!%HwgqZ8Sl9J+AKyBj>-$`kxz%t+=igE{z`CK8UU37gDE zsfsV`J?Dbe2?qGKAH>=O12k5EZGg2|2-!E-(m+RyIylSaIV&p?4CMMmRf2(hpIDt> zfWsKX)+QL3VYE*r@I-*WBmuT@6*#hP5vO`+4H_|%S<4$&e=|b3MRUv#<^or}P3cs3(Z z9jppLmk5R224Aa#!)JAt?>h#iMmQm-qP$nyD`8OuwI=0QFO zoi0I&7b)@@YcJMhEEE{W8nB#*@h`muDVELWu+*d;3OFn&smI`-_Q9ic6NoAua##q*} zFTAf|EI6cw!b5%>QMH6TW1+w})>6I2A5O#Pz#l5Z=fEF{OzA#CO5_F(^C!g;u{JCV zbM#}Go6VnPG1=n4oY%u+XsmzJNRX>`9#7m7NO71%1<;_K6Xdd0p|g_e*wzP2 zL9ub|al~UQT+|$S;6NF6VcLAK?c7fNUvfRm<7RtDXSUaO%A5uL`hKZxF*my|P3nFU z$+_GcG^C&Rz`EXj;0pTmzY&m^+oxwzw zEX07C^JD*Lu2_FS`U(vM`L8?TZ|sg)ULENkA1)IvA3+t#Mm9StIH3K ze>%`+xQY7Ge5>pC|lK!*}6xL5_dxJvQqrhHvBc zW?zglgzxq@gYYn=W}S`WubC#63490@8;HVlnw?W@)E9$458kFh&`BWTV+Q1GTm@(w zX4G|1^8HW-Hf{;xLTqO*zPsl87v{_SY`*IdwrLP_M&mt04g+#F?jq1(eeF-1} z3&h#-(FO#?sQ?%^ANn{6Z=G!m6q|B^+XlHm1XQxkC?9Grr=T6`4(18q+kAO`Shldf z3iQ)L@T{}>TH0cm|5e!3oop2ww5{hekHz|moskvW!*^_67d z`}1KISkyQUT^s|yh+SPjrh~oJK;a1CSRp5W7;o+C=7{FlL4Ku>?@&lzDZEz5A8+J; zM|h9$LE$69Cxrhcd{?+n7(-i85BK~da@vaTNpplR4fvOczD#(Puv&PX@OI&y!h3}e2%i>m z%w>K*7rrXw1OWMO3f~qQyG`&v5^ee&=)a2gcwRxL3$uhL2u~7r7IIRL^1Xz4!UExN z;TWN@1BLuF(R^vZ^d-VF;Synm(DYZxT_pNy;kSf02)7E&n@seBu&wAlTA>ZOs{}$nP;SS*=!XFA>6TU926Mi5}$AwLOS;98Lc0#juDdJBR&DX}1 zw`;-`iXI^xFDw=|w6B~me!1{`;Yy*ktGrV5w}mxAYgf5l^nJnyg?3HTCq(~T_^R-~ zg})X4S@@yQtZ9n+*|p*L9-H+&N!ZX{k}t9uKTK%tB<&h;UlYGXxLjB%yhv!)G)4GY z(VK)f32zbJExb?o@4`ogKNY?p{BPlJg>MW0By6~LTuVGCus$aUPZ4$(o*_I_I7~QF zI8``PxKL=S{ z>*Lm@)Z5U0vA_7%Zn04G2qA3~m~M`6sqlQ^g~E%4-xPjZXzdcWiTL)b}pim;b3PdHLIMmSkGUARLh3-tQJ|e%(-Dw$q||l-sttN4)j* z?KVY*pR}242%b=LUcC9%7PaXYU0ds1)S@;9i~v)CQD7993XA|_7q!^ds-~skrC-$2 z@G>uIv&}i(c`xT1sqg1BIdPkZmG9amhQ#~FXTBR-IP=}qyH7;fPOOb=d*fZl?HfNc z{?|`G|LYs?rgtG0?ronzesTO&wO@r?Kz;Q2Z- zjSioeZg_=zPcr%@?`>=3t-hrGOzAr*q%YH?ec@fkMT5Lk-@jvsi8Fqodx9E*$l4;mI`!#61c5l4v_YPZ2n`V9d zD$}ar(iX%=tM_HPe|RTyw>#wVms@SU1=mCbef^f&Okm`q=G(gUYhKf0TXw$|HLY)L ziT&zZVok=9dpqoUd~fto_-{V`&U@c>o-k|Uo69un(mc=Q1L|ppQU3sgN%Jh;nBC@D zK2%3ihVxl8lE&#o*ll)1de1zz7cN2&=9lI-KrAJPVliXhnY7#d2@-jGcxc3K^8}`F zW9JZLJ}SFS4rkGwZg)Unx4ATAx4As9+vE@0XhnUy&GVCXn;#(S=nC0w@?l&zrP3vc)gJZJdR zUIhH7A0!l`rpE4)0shQ}sU?9WsaH}Kr146z1V+^6VhHBr>zjH=eQatPfD-${qrnK% zkT;g5!V-yCH;%;IfPrP=NbvVRa;aX&04D)pY*&$BfaMO-LYHwYyYh+=hr)YK)r?KAX z2bO&Xd@>0so-e<8s4xi?{-sN7;Umt9xh%aDz7!~A-RHt56_TP3tmJ0eE2QuBu)gw; zzSjeNY`Svzq&`wfeFfq2y&2Y55z_Z&pl=CMSJl%;DyeT^Sl>HgeXB$I-U;;GjMSV% zv`en?ipe$S1}6*W3em=`#&IotvL2+Auj$7O?}kUOeeV(mc;Y)an_jx)lUVnUQ@eNE z^ri_pu#eibkHO9fiew}AM#N@>#3<4VzNgieUSHemK^E_r5Yu)}Fa@jDNUCX6-gv5N zq~PRbkZNL(7wTYBu>gKvRMk0Ag=XW_yY2K0tJA#~oCNeB(^5PUpTnD$>Ws!d)ik)j zvM0mpmG1>-X+7GB?VD`~O)?%eN0aQkgaLni@SB8THOao9N!S3KgoU*{ z;SqQYc(2i1Fw~hhs*nxos zYgS@OK@xsizWg$7JC5u;4M(;e;ImMuFsf9I1ze3d4!oZ!rWi3;fY`>^PH!8HCqa@} z9l09IBU?!}|88iv*D%ABj5w<~fEt%AUc-_x|K0HE7-4mt8asIAZh7bpri(Bi%flHq zr=9s&UNLxf{II+jc%}e2*t|0AWsJ@dWEL=OZY*)YWOlX+0W+Lmzzk=|im@Vy3@-Md zCIOQfvTDlEmu!%s&t!(Yd2xUYk~hroX=IAXV6Y3WzJQ5qF1X|ZCN4BHVzDFv6IWNb zXueLiTBt32CM#j@t3h%yQ5xfRAg9h;&zJj*K@Q66} z^B^AmK=IJjIp`8WJi0_U9#u20J&sTV7d1y7IDmv*nC=GQ$Z<2@74u=Yx_r)(Mf2wL z&CAW}n>Qz~&w^EbxM_HNdY{8?4BlsW$pvM7MwTrrJ9;zU0r_9v%=cE9`S$*y%zTSx zVs*~NVo40lb}^6M$^{!YdQBG8BNi>Zbfb3xB9@hI+*oeRd>43w7Wihq zFaa(v+qiKoqkJ>png7;pb|mc(X1>Ng(yYN~tT1U-dEAz_Z%(fX@Re2b&sw-_<)A@1 zy%sE3xvaEm(eh=zD$5L3g2yEX!}QX!%1Uf!-fKzOvV~RUXXR>l^RL)m_ir(=J(L-7 z(ujLNJ~nz^Q&x3hMVW8S9dv`n?QlcOU9MOaS5rBO<8$s%(nQ zb@tD0=4)nY!gju^LxVZT^26Kt4$aChNSWBQAZ1c!K}vB(LCWOxp;^NVQl>R8NSU5p zkTRoLLCVam!mNi~?-4g^_|ViD1*tO&Ql}N9PA|yHADUWRkUF^_bz(v4q=Kxj$HZ26 zMcIq6hei?<9e4=RjpVwZ)FwK9ZCrlfz>w;VVed)=Xpf_kpVdy#~BG5X4C_icCOljD> zgwV=GPHfz+_<6|zjH`m&HI@J}U%F@E!{yr%sxPV(ld*vXg&1e3qSTfnn?JU=X3s2Q9YIgWEKc-Gl`Ep0K(|NGk&+fl>M z{osAt!!6AEgf0vu@f`N7r1Sh2G6BPLn&bQQaDU~QNjlGINV5f#&ch0trzA}B; z@dpdz;hYH6CCkUqtIsQ}c*M-Z47YNq~dB3AvweUvaHsNi;JA@pM zDF2x7Dd9817lp3~|3~CATvK)Y^h zq4-6@@xrM>yN>Hz(HsY83b{YkmDoin}tWR4}V;8PYRzEJ};zQ z1@-+-_^z;4Xs!dq?-On9!p*wE;J0DF1GW=(5uPT@6>|Kg91S;!=K26m6+KfpPiXDJ z`9g>Ce33)EOn8;>2H{qr`JMuDcZ+^V_^^=co>9+J!qk4ul=PAEmn1yki zG{<{ljA^f9okMI-WexZj40_LA4Y-sOILnFrb6b=@iEgUHvBU~u7_T5*A{-*Fw;oZV# zgg+C$E&P+v+G!sU-2}fOS)QiCHo|toQ-wW*w2Y$sIl{QGNNCrUoi5t$5k60}U02rH zaaW0N*O~o>=*xsOy<&b_gbCs8!h3|fgpUjDp5ipsV*1yFG}R)#SIB2K(y2n4YLU(n z_7vs{X}ZPuBH=XQETLT|cA03}a#8+r;SEB&F6>Ux_X_Pgus;(0its;$GzO!-4}>0` z9Y|Zd?6#uY3me*F4;4QyY`9))mH4ZLR|&5b-YUFJ_@L0P%Sv-JmghC$AB67;?K-QU zi*AN_3Cgz=a-&_+-GqaLX9>p(i-ojzqx^E=df`Ul^}?HkJB9ZOpAbGJd`ntT0kG1dyK#(h z#ndL?HtC3XteAQkm{>8j39WarVk&2au%mgClYm$;)hA<4>XW3;%i@D=y8CCOcZcKP zKfx2-bs#e)W212fa=^)C25y}C`PiOGjqXS){5nbI=Z+$|1HNf194i~Ik1b(Jec{d>DbaasY_nQEgNd$Y~V z!!ArejguX5IM;G~0jp#7W_!`HMO9yV6{}|*H|LZN9lM?ce8DILMDa~^Wkk7Jo zcs)_i@g7ar2_Cnu;9XQhImXeQ29KXVN0j699@B*L4c{#>Wnf%S9Px7`a69nQkor%6 zrwl#mbKz|n5H$AxoUgOa2KjIq)^`u|@x2@Mu`E{KLWFG^1RXvU@*SXcHts?&Y?yJ+ zqQQP-g+g(B;0x#b8J=5S0+0EUZ}a8ja#$ZfYsmr6IvckUjIh4v@#2w>Lez%`zd#=! zBW)T4ot@A}IqPiPjbMcJ{W_#C{NDF_kh5v1;}PiNJg0Rw_+2o<`u0MfJ#T38pnU&< zFw^A1(`~>ng*R-c1I;-4r-fE-4wRh_o^@94WiS}Fj(fD&G~}_J>0W>jm+zxcefh9w z&&O{NMinanzC)rjY#3$kZ<57 zqS1;2Dw%JHWr8*z5?{r8->&sCu&w7az2NG#G|zC-dG%VD^WoPy_w^p>{tm;)!!I%w+zfOt^~=lmlN?XJ$ot1Uro%;N-Uk6k zh#o7PESw=M6D|=}3cn$|T)0VitME?Yy~6Jc&HEqZ`=sb!3;!hCFHA?nvYcj}AE14Y zQ*WIgbmW1Q1Df|YkQ*tQ%cwKGS=R^g=ZZG#`G8(b8sotg;v-u_vlo)jX9ptt2Qf#; zK1=#^VIQGsPw&0E}XD?b- zx@6`2ve`>ZO3P`L`c)`{iGH7{m1Qd``+R*7Y|fW1D(y3TdFe`8xK{R=S5jF<``1eI z^+UG>ngbo}ei5Y?X-N`6sth#4YH;v{E&4*f`Jmzw8S z3gydJROJL&nKjNAEnHSMKgVSAkDMN|lR~D1EZCtd#5u6=Cl|-(k7UVTRkpgS_YvDI zWWIlV{s?#L2uL&mXB*{1eO{g+3NI;?3ar{1G}g z=UOD1#z1fn@EE4mE$2*T4T!?|sGJ^0Ag*!}wIp7E)*(VeYpy~R^& zBSqL5dyUh_dGCq!?)y2|4?BnZVeihajqS{?O?xD}Hg)jC+LRvHAA4|kf9#UF^sN`x z?cCa_E@SJUx~^MG>b#=4byv^oR@WVSSzj@$KX#hNUf8or>N*$Y)O~YJx4I_5{@MB1 z>$;?_OS`#sm+tI_ovH^zHm5FqXL;RscMh)Wv2y^z=ht1`u2WsKM^4>skV%6~>f*U| z8AauFSFNc+`U|iRci+0xdUUEw*_l&!`{MGtPHP6#od!ML;PSfftf@pi=)r^Qyq%ru zP92<6w-GWClWuNZ=N{d#OZJMo%X_S4H&r1gF^MV|MIX-7vy{slfjQjj73Dknqmr*wbOC;l#{`ClS+!F*W&n#A9l*8zj6* z6ewK8V>Hd|9}r71%iqV+nj=1G+D03Aj~^&$Ey;69+daU|M6?^@doD~&WEf?zF4+Q>&2CfAbePP$xcNzx`zYf19kD?0Zx2>5GB zBEUBa8B-DP_W-XVIg6y(1N?fDBbmtT0scdTLTgF>7G%>6j5T|JuS5-+vT*)dk`Iw& z;ruptTI`mg(dmj81@Laq#TAjsHIBvnl^SM*bJ1`F)${k4d8dmTrwVYt25U z{98u8Kj{^W_vz83CnV#)M*0BhKN$J*Nnb&EpT3MVzXuV`C8@J3a?uojH1gjwG+WB2 zU%<0?b_JWtr|(CX%C6`a(5GjR&JXA=csG+>m`wj9>55!5=G#VpA?9YYE7;aPeL5Nk z`UAQdCUT)apszA?en2nB`&Q@==%##kinTOx3jbv{LJzN{S%0O?Lv4hPlZYP+{?eKp z1I%)o3~*2c@sbIY`^3`@0~{Y3E}@x=6qrXRF#6ynG<|_dVS)PQm%WXKV!}LV;2!D9 z3l^MU2F}+sIjkwUY9{)SSyvEg$`QO09($qBO)x-fWR#J>#mEewfnOW`ByP#Umo!L9 zcncnTq_0je@QzQcO)y}tNoNvaIJ^;>g217R%~FNx$C9Cb$-HMAIXSD#6*Gx`uGsFJ zfl;OiE2|O=jP;4t2?i$m#M%S{GvHyFO5h0!8OpM7(jFtyYzGU2R)n@pzo5!&nLfmi zS)E{@z$exw7?@^MP9sn|k|#G)uSPtpialQ^^Yb+p8ezUsHEs)ziZA{w89!dpP5}b! zc1SbP@|GZAUO79}Q;7E%{S|Y0dUAZ(BH}<3KA)q#aTPc!uW5TB+tZgFLzL`Vi8@6H zux!Y8D)An8Y}{Vh{o^Uv(RO0@k0)c1D{O1q+3frKm@hf@Ss+VerZPfr5UEuuyDwMh3lN4 zR4%-)wZ3FUxh;(^OF8qx-l>ig%a1Z0<*MMjvc}q*9_^^|G|YvPsIY1OOdvZJ&jq-~ zv4iORj3u(=v6pcDW=1Dx3A(SRy}$HAZ8wED3Te;IVytfi0(vBj0@N=~Ry- zw(?6gwp+4gJpfQe0IGXr0yx)Vcz8ZTF7EJ5>@dPdS$æNs76?4Pp{z9e^Y zX4RMwMPb6u2})(dGZk?Zyq{{6pK7>LQ3+B}N#_Kmroj7Wy1rz^5__h7S;|$zBZm>h zs9)RB?US_~jp7LjCg*Ds+SM5h|ED9~+T}e?C|)6qz+hkb4che?F>g5ltNV zcfq5CqlmeF2`A(yOE^IVG&hE4A>%r;2`|BW&f0Ye1~@8!&zryyB*lG#Fccp5iFFAE z*a5+}+OiSgxa~UU5zd46oJ-av81O~Uv!Z-h<^_gA#)9 z6#h2%;tjLBe54g`isi98ix&*(*-5$KR&GX;7q>i?>l%1$kUrFmo(WRb@TkdTB0E|# zmekDw2N!#S)I;!)A5COwe0j!_dOqM_2uP6H3lI5WM3&T-XDq2!0jCHYQmi%Prx35J z7fXt5na=W8tY*he>;?T^Jt%A)^<*6(F0GU@ z6gboo1Lo9=C8atRc5hHe)=xF^hxT9yL7BnfdE|LfEx=(NNvWLR*m9~L7JY_Tl|Zqi z^kBmKzH!WX2R!oe@Ae5&55uDtnIQE#Jmkj`S6YR4r>-_ad236mUWAtKRC>v)Xng$JyE4oEKAqb&mSC?judaBlqafmidErE zf4>U^ZWHK%p+_;Z20lkBq#r|M9S)Wv*PM%nk6j6J_rWuNBJ1d<=VJp-0-t_N&2xen z^fktq#|CnTz%xCOE#jvSOOeZ~$d5tKWO`JibAsF|c%+|7WdA)_id>E$V3)fS#Qh^ixWG^is+*ZOq~)d(XY z>&P1MOh7w0tRpGa0vy(nl*$Q?EvH7;aiLa5tSterW|S{@eqhdz`E7|V#wDalF?UFr zpHcgQSUij-NPVVQqRNQ0j3rgzml_;A874>#hljQaMAbmCq}IZtmf-LnLh4F*$`g}g zDPvhDKI;4O%#jpFES8q2(Msh(0gVf_FUB#}GSt4{*s`m1;IQnZcEBSyaF{=-yWm+m zVsb3CrQ?IIFHfDM^8M18M`4vtIfhHO8-zbz@G%|5=WmMyxjGl)iKfNPb-+hD8L)Nn8bLKAyw*N-c&zWDgpk(EesySTpx3YIR&ma~$hS?gzm{8|y_oXFO z<)F-2<)TXXF}K-uz4Qg%8&{q)Id~lAHD?N>cSqEe)IT$*+NvpGp7!V%ZwDF~tsQJb`!v6aGjU=Mnvh$9YchY4n%>q`g5$ z#3xn5b@p_Pgw1%gYuls5HeNIH$^y^>QQD zIN?&&`xd@p@`_TYVt8d0K3y6%Y;aCDc91E{moKTzS+IOX4pv;w8L@O;+5Gu1-krE& zc_~cTm#?Voo|E5uQ15;@eRK2j^YZcr<#fY$#bq#N@1AomlJqH4l3w|92KAbUHJ?k% zbFftOqDrjFp3^sPVBa$aVq^GB3|8Uqqbq_tk$-PG(puYCSbHKC)}DlgwTrQ^_T;RB zlqpzydn(r6o`$uzr>7TYP4s%1b+*k4+o@9uQl}QwUu64Od~N z|54vt_e8(J-7@%MGaupbvyFY?;kR#;vu-xh@vdosJP>T+aTkD zxQ`n!>Y$*wpeP6uH=;QDf8V-qbvF@5XZhy)fAh?Jp4-1Vr>aiXty_2Ps&k>||JKYB z!a5$S&4ZwG7ydW@mH{m`ZWd%4X4Fmi1N^jVN|X@Cxs8eC&TfHn@n2b8A8=9(O0giS{=rOo8!tIY;7{_(9Xw&@^ zKKeZBHVDIa~s}}UOT<#y%Euk5l5c+BCKLf;Bdk7w}B|zS&^@5IPiDL#$8YL>U$vljy9**DYwqqai)Vuu-2&LLMmD__&2U zR&t>@OX(I#zC^Nl`i7nBB^%#wkooR`cJEjEhb0?dwut{q`XKf@(`As*SCf2%w>3N+b*NAIHUhk-XK;$4o%A3WP#n;4L;>Y4%@ql=E~g--u=6&!WfU0O_lWHN^&EL$QU}TI?Wp7Q2hq2X($=jv}J{v&7M2 zp*T~VFD@3BiOa>C#aqRP#K%OA{A4-Chda1U^4sG3;z#0Mk>3+!zMsSZk3Yz1qV-8# zQ!#}~S$sh}Abus*#w`W&)fdbA zg3goP`h=b*d7)U|xASAtZxlH=miAv4-xl8$4~pN2X-LcT8De9xsn|u#5&MXF;!v?b z5ukIeFU>qw@E6~yXdZSh#Kk!XELXG%Uvv_7S+ z59u?cA0(bBS|8FAB+n4%h~<4pUoZU%@fPuR@lo+{(fW*jUh-SwJK~4pC*rr__o9o3 zCbmnG$N|-q>xjpRO+*f`X8g$_2Ut_?D{_D}<qkL-9-TYw@u7vse-LAS}O%c&yk+Y$3K5PZ7I{{lo#{aMAjtK3DR2;v(^4 zu|&K%~V!4lrkZw~D*OkHu2)ThYTK5YwlK<$YBjCw&vKt$31nns~a{UmPTk z7bl6c#Ph`q#Y@HVzN|Swp7ncFv_7m~l>CF@BF)H3E-YY&MJ}5^oV7 z5FZww6<-wJ65kO&6h9Ha77vM>aKr7XCLSj?5!;FqvD<7z2f8Ilj8H@%i>?e9pdNWe(_uJdocyCxLAG#v5t6**hFk5o+Ne>dx?F; zLE@PrCn(W=k+?{_SS%555N{Xn7XKjrQG8Z>QG82$N8BUs6TcP@iJTzC`cx555L<|C z#goLoVt?^W@hq`OoFy(0FBDgZH;K24cZ*Mp&x$+5UE;Um_o7?PuYZzQPdrw{?eE|G z7Q-L(d|RFA(C6*@lGa%#XSea)=>4v_(Cylv*xpb6+uvg7iEB5O*j(s3cxxa37Q?Um z(t87$T)wE`%d+wdCagxF_BJ3Q_AQ3DxOIV~?R;nrq_ic1Nu^MFjhL+K82$!Rt|emM zVz>oTe8MWucaE3IAOBknpE0-n7Q^STXuiepF$)R>8=4Y=n~l9-0i@)7{FMI|!&u*! zUNc6GkNMJjiRDf>(wE-ZabJ3OqX^7g-G)?Y?hg=t+m{{-_;p`;EbsUF(&Os@_f}^3 zuP;5EDdP*f2j)i*JaiJKm@y5L{$KhQ!z=8@&I9~)4`)=w-gXhjCOGcjH@e|p;{NVG z-w|~>x5f^&!T#mtk@whKIChBp+%9@l5Pti79|NVFHiGm^E3*E2DDk05OG&<6iYdLuz$gAXDu(OzxXv-=HA9<#Rz zVdiOrmCNOLp8N`JXcxwDeMPkC&WEw{Y$C-m-FAg-)E7u+^H68|)td+>)-Rl}y?FeK z)$bF8v5C_Gv+z5MCs_exnOxBPM~n&LJMN>6Nn`qi&2!q|?zan+?E9#KDYr7nx}n_I zG98UJDkjCtO;DMjtq+BN#TcU&M-*UN&sY9CzSWS4qSzk(!aWmTe$TfWvXGo@;*cy1Hp&kbz} zwmbBNJGmV^u(>CH3ZHC;wr0TB+RfcR|H7S{6KTC=eI#LZ`)^t-JQG zog3GFyY=7)%R*Hmfo0CYc8lPdFsxStGDt!Zud>Mq9p<=kIz}=1asUKRSx1`po6zARIAl_8GFUeMoXon?@RSw zD+_I6i#huihm!YQlYus^w;HXKGZ*_m&^yvU!nP=R~;2U)t)fdJnaTIvsL8d3arD*ZwAR zJ8eO44WM4$asO2L&c0xkb^C%j-pBCb#!@utcx;TwEZY4-RF;%$* z?}8s?S~pb0Q%)esjGhdnm_cO0q?L&C-eyeKA;`&(@lpsS4Q8fL$^l667r-Av@|H47 zE8dVJbzk51T$4KZJo5&F5BSn;K+>x;aJ#z_$&-V3;Wx!C#jiUZdN@J7g6eqTcgxxm~%13t~j5ka@?pd4uqIiG~-;y zy^!^p&sg(`UL&50@g%7nOyuwUbyO zF0zJLcvH(y29rq7aAT5>UT|o)$pp+8Iz*7{geC%sVheBH@iLp>y(V0z5ls3^-*(ka zg8qb`b|6vL*Ag6Y3pa5KqF`*{^bCA&nDBGuC6;jHCx-n50|<_K#Mg$eLrw0-ir^yv zD~4dqI0F7AE;VFyz*!oLrXdbr#un0$pF7V+Gj$d?sK#`irzzRok^P&v!yI{~09OiEH449+U89V|TU1m0X zFu{@7CJ6&+rh0>k#U?m{xCATQG0lrIz-@$^CW2dmg5n#)*-T~$p4EI0b%;wS^FePOn7IkeUnCK``1clpAUDBIyvtY~%O8xtH#l$l^Y z!BNVdQ#dcm0GkGTf#A8!b%qjtqvR1Yv7%}dqYTXTg(*=6IGP_Z)1wSLW`x4&Q3m$< z!YJdEhlBO;w+zu3D|+cX6YXurExBa@g#2tk^nYuF+%b7+|M>p748j9^vc$hs3y6iK z*MaROSip|*BUa;Zk^y!Lv%}(@qJVq*eqWy+W#B1as2^oun=jOkGVrM{RF5XJ&HWuP zJIX+&FU&JL`8o*jj27R?Md@ZIzitv0g`y1jJGlskA^1DFsCsla1kR!`eSv{*d|_Uc z`!>Vugn}^O?^_sV;0&yu1H%mX`xb`d`xb_|Z>M0zu|X7LHDxd`&ll!JuR~xBR#qP1 z9!7e?-_Zqxf9i|v^K__~4~Hlk*eu)wJk(%@-~oVBX&zI`x)PesQUHODE=cbBWanmH zh)nn~ka16d+`SBQ-*U&=bPQKTF^nU*Yi%6TztW|+qc)3PzcSZy4`mnrTVkQ-&= z>~>ojMVf`1$NppW4EvkAglE3rO4Ijuq~XD0mcLO}KbwZGU4ZUsJ`SG;5OeW|TK@Y2=3nm^-C@aSvRS0*t z2Nl8*9$d23)8^w@q$AcOXTH<6Zj?dB;Y38RiE%W$QFfhCSeY!lNt8kVTv9;Xh!xi# zVjWhTi(TWniX8`c0JhH{$lZ4jR-8qMAF$%2<(ktz4|&|v5S2|ZpI~F)IC7(F5O~4p z`xEaPJ*xIT0=tcV2yws!2N3=VyvU8RBUZ+m**$#|D5?gJSFn-y-0VgZro@0bPeFmI1QG1qTn7d}CseL}d zBMTe8Aa>4Rnl&h$XA7E)pEVNhgGQK=@v{x9f0E9(g(N#mbCR+BENC27BV+3rz6L99 zM+g>dqj-p}#EO#?!Q!nI7XP4$8bNUTlkmPA_G}euBhUaVPMiy(46re{aOO%?NuLVXrXkHO%ym343G1_|59!g@^X- z(Wr%2CG7Rf^qPmWya8b^E&M>=zJ0w}xh+OyWqHM!UZ{ZRI=e_2JZ@id! z(!$=o0!?&OUsQ3-iG;^fkw5nTDSJ*X0~dT(+Dpx+!Oed#UHP7=20-vSDxY{ z(wRy6#`3gdD4RcRj{N!C5p9o5Z1QGxJ1qC+Fcg1q`+xbpE9!vWAz_wCRv z!%yhlyLXQk1*ZC_>}lH80=ADgxU;th)5$8Zl}e6mrJ6&}h%|2QjS71$(2n_;-kUg0 zKenK=_eZSv%cMb$F_zA94+B*NaUT^5Xr7Il26proYjGZ<^A2hUm z``_-S$aqLPa&*g>Dd(JSofXAmj7O$lekC&Io2jkulcorp)o1)v>+dE$awWla(-Ag* zWiZn8UQ@Fi{J_UbX6qb$8@6?i@l(eajxHWQuJ!4C2lN^+GG{&T=jyUALasAkfftGK=P%TReIUSX}6Hq7Bj2 zj*~fVbn$2>b4(GwR~hrYWB20!^?@>Ir~j?7GTcYFL&7bYzqA7qZ&~b(&FRoHon5{_ zzu?WPU2NQGP?$H$is&5nzx_}XGXEQ(y%1JDSJ^xWI%80QTNuz{<3>ZaVMcj)4gHaM z|LZ5Tad16#M7dWrM7bHi^s_S^>1-Za_@t`igc;CcV`X{ILSu4!&u$+i@Yn zHV=Xh$NN`iK#PrA06Ed#7YX*#5ohhuFM-WN6E$G3C)(OBHjb}P6Yc#7du&(M51Spc zcMHPIgJ`pyg#7` zl=)7G|PXKA#u*ys`wp}Kajjv@|Tjo zm;96D5E_vAE0U;pEy>0w4`eg`1@SEuf1=_$O3sm-FOCw&E1v&7(tfez`I4^|mr1`` z@-33@mHeROjgp_1{IcY~h@XgGi!KgSmdn43$tGfR65G{IGQU$snIFDmx}K8rB@dBo zd~+avg5>FnM>CrJ!J~)!#q=wX{hBggSCHm$9&94HnTS)Di9b<{h`C~aagfOOK(seX zEEG-ug8l-@i$v4Upub9TiFku}m$*)RSp0+dl(<=ZQ{-D9)?=6Wv1s}m^amt=E1G@> zz3FdYI`0nIPO60%)l)H#M#NMLm_lO@Xd89a2oGeZiXNl*F7m1gN z97MtLt`~0>Zx!zr?-L&pH;7M*&x)^#TSSgGp#2@iLHtQf!L@_=&4(w! z>XK`V$B9kEOfg$LSv*DL3t!sf-*sevksp+#JVG2Jo+C~Z`6ig@_%@ilP`p%JB3>un zB;F$4Bl6WE^FJy+E^ZcI5ML9wirdAV;wR$g;#cB#;?JUo6Cle=7b}ak#Cl?5v8mWv zY%6vYPZc>ng?9UkL&XAdta!FKT`U$a5EqG;iC2jw;tk>&ajkftxL({SJ|(^=z9McD ztxur$B!4LG6%UAq#KR)Dm20xd4_{KQCe|0jVl%Oo*k0@?o-XzftxutWl81{U#fhTz zF*HN+9C5LDiFmD8BCZzKhHDY<+M|VhnkNA-I zn7CPdL3~}@CcZCzBpwjI5`PeX64UU^%lc)AHO0E(@uKyK#4%q?-%YeWkn$y$_kC0- z{Y;Ug!kGUGak;os&o0CRP<|iX41K z`_08{vAuYz*iGc{G^QUca)27;$zq{6Q=Bg@7OxPm5jm8N`EM1=`$pOz{S)Hz;>+Tj z;&ySD__4TGJRlwttVtL<5wWa5L5~gb+HWS;3?Zi&vX<|>Yk7#`=4Us%b z94DS5P7`N}bHxkAOT}g4a`7hd7V$1|ooIb7Judk<@g?yM@z3H;@dI&>xKHHRL$=FL zVltjJDW{25#2Vr;qV>_#OmZu+o!CL_Ds~t9iq>b-nUc>E$B7fg^1hoEOMi*DOk6JB zD&8U9Ct9CQPfC79d`Wy&+%E1EKNhWzrynH$B&OgQi|tiGtSZ(N8;Zw^t;8&m!#SDX z`gqEdJWwnUM~P>P=ZGBt$@~k%OT;V0W#V!%D&8jEBi=9mL9{-gHcNg%d_(-Rh|{u} zZ(^SxA)5N&_Q23Shwyz<0531>^Cf(Dv~L@ZFTXjT0)F_jP4eHKPtoOA*1|c$cSozw z5B9qf^C>DuQc98|!EG%fH6tlErIZ9BDJyEO!qDd&xAQpX*g98+YDc`123zhd4Y`5R zkk_^>^u;Y@p%2=YC4yVRW*z)50<2C z39fp)es)=)!f|DRif*Uxx2CMBv9iXBkqxTnIN^?wpAY@?bMr`>$Z;kV+}GXh7;(bX zrmQ+9=bQ$qC96WA66auap|`5$${kKp$)9T{msDRBYU`HNScQ@+gjP8vUUYa_Xv*-i zV8O76)7m-s=Y=&_RzR(s;{qkCBcVtI%pbwFWNeJ|+gr2Ou|Hf~Hli#v@A$(hIZY0y zI6e2K_G)&xR@(yD7*Q5%+2n8_=XiX6yjA+KKU`AQD%f*xQc{z{wQ4mvToq}81=a@g zbv^EI)$=x%x@j4(o?aSC-?lXgvkhu*8kQ5h>Am$!BI`;6=^e^~7i5=(R%e$bPjNn& z73o|SXx*VK@TGf79h6k{aB^Fe^L$LsLNirt9v8n1U%TKELeX>HSg<6Ud~?c^e$zg&R&Eq;;eEzIVB6ene{+uRduvh z-JI&nYOJiAQ)5{w_eaKQTT)im#H@n62m9^KPw%()s?@+iH{|V0O?$1(S@=@qy|RHz zo+x!HWp1gtDz!8itbNS*h|{QDS#VyPvfz|r*eQdKvXkVa83ry&tztEe)iyrY*_>owjVPU}h8aiqu>=7V`~%fYXj0xm8q6vq66}<3Iil$y6YWf9zvn{1@+s=~K=LY&2<{lu`dVc*1N-$a^w3>wPqfxLKWf=%G!(lclUzG8HHegQdxwZadK=*7C7O_47e-CV|A zOp)&g+}@1kT7j>O-9C)nNpTFtz7&6?IECUF6!|(Ry)A2y_W{Hi6g$MkKTzZoyC3@z z#cnaNB8sdy8*>x-GwT^f!rTNSU1%iCO)wH)QdFFSl=)1V1q&7DAf=J`;GaGZYIguD z#KD^BpyLjt_z=Zpii0T96K(p>u;vb?_!o*nByopOArfTU9Lt$0;&i4k~ zCs$!s-iTKTBJd{!s@kO0_!f>tc0VxqK60Or+qJ(wL~r08Mm6psG!3Owe^G zOt5!0z=}U<9rq;n1DY6#@F?aSfItxg>_jCrVUt!n2b$M?6WoyI5Hqp5r?`#KR;Cso zGAB3W8wOa5V{uDX)h0Ey$c9E6!tB{JajHAPn&^&bV`3-+G{L*gsy3-HajS2F8*(bv zZZy%uy_+VuA-ugb8^ZfZvmu|+giUHTsv-1t7+tdBRn#jPNkukwrL}Q{40#$8N zV`3yUYRAx ziM`VgJ2jYe0aDa7DV{Sacn4S0r1Iq|xTA4u@c!hMzh$fX7L@ij);G%8Ym5Ae_9Dh! z8`%3kmNGfO^WMZ*N?$f}cxtUg49_=pu-10-1GDhk-&-0?uI=WzZJb(b5kCiUCo6si z;{(O`%?n_&>O83YvAiiWoUF#hPD4LGx;=-2CS6s*b!ny^&%O0{NY=XpKltD+H$ABU z(Y`hw^{<~^WabSeosizETDSte!*OO&2vdoYdO@)Bij0tU)VWB^QvrDrrXQsrIUA{B zeELxUTbq#}V!v04i|B^OxLMVzxK-Vu70yheb4O7*q z;0{V=pr%SjeOXkk%NM)ImQ{^$wXawVuPbRwyP?oJHUg)h*jAwtI;S&by(EVlU;oG$ z?inmNws2SQ%c)a*YmFIFTO0SB(Gp5!erM^OAzDd3C90&zEoY4pg-}52@b+< zZ1H3B37h@M$x!@9lp~!1bDQrh?L+$c2HAWVvf2mQ*y2}vsi{8gB0d(!056=-1$SdV z{DjqYh7(Qwq(PFmEv|DW!T0%?-!wnUz$Lz(C2%}1k|bJI!6DmTD8!tiZJ`+`g~N@> z$4tQkSy)G`RFkuf)d6t}ZKAdWRy)zcHe+D`>)~(ZuP43VB+dIhNzM7&=}(xGs56Av zU<~v>nt{(yt%fFgFfjpZz?nCjyu?@AT$qeyw}qM7nb<-6A8WcFWJ3Nuf*vn-;LGt;TEaN)eVGn}-af3AC6luBBwjB=BYh~Z_11;8S~O8qhswXDG}?An6a z>SM45ocXg!CPsMrQR3$@elk`J?Ix78*e1o{Z2O<-d))u*pQPWphQ~V>@3GCoTr07% z*OEMQV{kmdlXM8f>CK5bN{I(rb*ow0C%F;77?+aOxM7rqu#=(N61=g)G=ce11_m1a zKw_M)pJzs}Pc-`e1poQMF#bR^Uc*@TXAPTTWtS&AV8z@8q6=1JOO7(o(-(qK2J(C% z5M^KtRtz{NCiwbLbSeVo4$>JyT;%KLMH#rv7v{%~51tNqj3jh3s%Qf{gDt~YR*?IX zy&AIyXGa;}PQx&LyKjyDGU%=`iRJ~O46HSY3JBgKcsNN!6V4kUHXECWdmfmA6%!2t zvHHcEB|qLQMROCHrD$G4vlPuY%`(DNe*nQP!QlGYrdh5s`h5JFg~pp>#WaFGoQ%M* zzYhiwY+#(IiD6hhXZiv&cfxO+Jc3=+fSDa-9G8unE@V$E_YRD-eN6q%?}c}Kl0F-xw=61(f_2GKVh>vmL?Yd@-F__rF1 zNz0W%V}2R2-Om)|ilypzmcgWKtbgFjJuFsmtks@?YBN?`KW#(ujPw}RB%B0KJKoHk zW~zh~Z$o_7sAAj16x*=!#D`1_GF3u1T!_Qozoy4B@yx|rJY`~#sS+~PN2Q>_5;VX3 z;fc&HkDv_Jm3L&Uf?X1In-cUqJ+c_y%Ce}$CDCpzym<&X=0i^Zq!ZlJJGLHFG`_H? z^*NL9?b~xFjcuJXZS0J5$4@OTYCQ&Dyqz*>>iDA819JzB99=jLWBdQXxk`N|;WN2~ zD8iqQ(7M;uu~TM@!*_u@7K|G|vtS(NEVP<5ZhWhDne8&OTeWXDW>Rs%__0$aO)nZ> z0N+ck&K^6qRlAc-aO$+F<6Ci5eZeH($bX;@UVi}S=%V70)20`XJTL1+3=c&&8GCNg zq@s~%i%j#a^j|pOMX!i`KOG&CPOJ3&bi9H6{jnDO(WVUVQ4bSy5!(Kt>=HB}G zoQCDi%suwlfQJcD(+7+#-k)pZd+?e*hpp+H*ES2^lST-?@u@4Z z=`Y2jr^n{>=v&kYGjeEqbn)1UeklxPJ0nNtcOT$?K>gqCX?Enu0e$;)%^B)oHj$Z& zBZdEcbj;W>^OO9ER7cM1@uyYA=IQ+B&LaDVXGI-(1jeRf8IQ&zM|REck#)p3*W=9_ zOM1kVs3Wv?^4C$^85{e^*)|*f6U=H48skS;P}gM7o-k?36w|ZgQ^7`#v=&Ur*zgYm zy0J^xvhvfe%#^}^|L4-p{|$-XOXs7IU3l^Pt+`iuUe|x?+$($&zWn^F#8&;k{<-u2 zwRu==u+w=@#J3b&+F?z+`LVZJe35DXi(n!wFE#dGJk~;(X}E^4`j68HXxWLrbiFkW zoxT6!Yso}=AHd#FTsUcu$*sMDgggj3{EpfM)<{B}|G3T+{&D~>f%)w%yVxv~p-3#Z z16~K@rTgVlZ_DMgvCTspSJrf#Faug_+#JY>_AYDByK&zhi?{ZcAZ+s>=-dl?LmALw zsA7SQc zgOy7IyddgP&K~0*$C{XK{4v-k%%FvFTwf5ScD5rO_qkozE?hQaO{`yK)X%nGHN@HW z`!m9*4x7R(jT`*F`C7w~?qiz?WZk%s=$f&mX(RLlC~HH*m+CB+^j)x619}Rt;p*p({&g7h+yoxeo!X08k5TP2%UmXOy={v!!_ljJ{1 zrXO{d`;O%ICG*uL)9;sjNb--8lhIEYUx7sa8j|ZuZY;T(Wb-X2r0*(yKhbK?{7UgQ>F<~PkhocTGgkxo-<150;_Y0GPo>9DG_yV5ib>cuZnyc4GgwRV zQRieJz76BCwi8bw(LZ{LgGt;#n7J3wPo|7~(-c2f@o&J-^eFBg}H*NJzC_lWDoN5v<_XT+Dp zSH+#;2O|GbVZFZ)e-wEUq&_63i`7I9fMfizVk5D+$k*eHKS}H)@@+Hqe8o(1kQ;fX zI9fDwZ=vU?H^$Eq%b)+Rl75MJqqth+cSxB3PLadrD4Xj5_^jj?#n(l?3}(8I#81To z;#cDL;$KA$ykov9Vjb}q(OeG@-&AsI(Oegx=buo_f2znob}8FAjb}@ zrsL~rk}r)(4)!CBCu#5+$;-qQ;!WaOk@r8$w?TYD2eGSYt~V%$qbylp zJBQF*XCRN0zWnuOw)FGFi^a>uWum?Q+$8xH@gC7$haQ#uxM;3NDE|e?9QMij?GVe) z6|~o(?-lPNEz_Ip5@@bVU{&esh{uS>i_OKh;z{DEVmGn3*iRfH+Bt(`Bu@}IGL`i? zUtBEyPt6tNFjtnhT{PD-gzX%`FQvD01nqV0C+Smo9YeT+SXHbkHWZH+TZvhsy)K?A znd59}ufJ%nmykzEK3lYN1dAlk5*LUUir0!I;!5#mvHV;?J4bM%;-3+p7t7BTd`J5C z#NFa&A_od{dwvw@ABS>^Xy*)8m0V9eRxCevFkAZe;wfTRF;}#63I|C(Qye9Z6VDaT z6X%E*h!=^Mi5%O^`mYi>#F?_4YxtOCJLixipBZoG9KI#_9q~i)6OrShnZ8WqKxoPp zM2?51+(0Zp*O0@c8E@wpa*#CT{vt<3QywRBa5Uvv;sWtPkz=MAe}lMAd{E>FYQ}F9 zIb@phCn85qQ!W$vqJ(l#tRPkrIl!9njYJNwrrciScxuYML=LN_Tp-#xe-kC!Ie$fx z%g^<@R{9e0R`Cw8{MfxIaI~dPBVY=yVdB1 z#-4r7DF1vBR(xZzjmY=itcQ7z19q0&Q|x2ob^nD|N5&_NwU4=V9Xf>L%WuuC%WmJU z?eCpiw+8P*vBc)q*>4qHjk$HflE4yo8Rj%CN!nH+;;slRb(aKJ1WSUe`qtlD_u*1E z6k1k)OJIc?y}JHwrNIi3$Tg9o$jK3>VcYKm6|%k$^a>viHoUjnp{?$z+p3M|-mEOp zBBd1H#NHA((aHRLYj7oOmO7`qorXJga=hj#OJ{Ent;9gOgQbfGIe}>KW)JhtQuifg zToG|HorAj;rR+)df?t48YwD0wd`UkxL%S+jE z>i2g0F`+h%4p(oqquL8!ztKLj*NeETHdTB6>o-p9z84?#>lFIDtCLn5 zO2gg=VJ2M#x8(Y*sc5sIO9GgQ*mB`6=kc6XPOY5K%BtpzN4pjVR|Ib4p1mUEwnZDI zrL6FlIr~me|Fh$k+_G;oW^H0Nr(I94p8t5OyRuf!M)arDEx{G}k(1O5-Hzym zZ4YhTQH^`MwENkSboAU8w}#B#PK%!91XlIidt;zQ&M}c?5vTcxEmb0qN4iBGe;9o# zcz0>Y$v~a3XXZT-xpZPn%-+PlK)8nqyQgvwtU;>%Ta)%ZhH1cX>*B);r=5O{n z?r?BWOY9l!A?%r8xZ&aIZL<)EeTum1h^x+hN7 zI^cL`9U8iw4sG35Z3E5@s6z|ZVc*t@W}akrq}8V>D+AF$$FyY)_Pibm-PGdK(5kfP z>yfjZse7EKFXMUGoR0LZCB6tK@HIwle=t{aFVB^3=s2YC_&zx{SJFIe2U7TM!aIlz zvAL3b>h<_4IyP7GbO@L$S&ybdDZ3!W=Sp77gnTiexsn`eqq&l=GT3SiY~#C3Rhiih zokoO$6KOFRtU=(IfikHQ!gj7?J%*2%D`{S>{M~aUzoUISS2CHx-#u5-n261l3oym_M%uDg`~H}k3YxqEQ);Z;`V0j8i*Cm_n!KE0P$Qzq}O0xBlbfmy>3jro#L@E zk#CFBkx7XwVLQyEMKe9KpOG+W(ag?#6Ic55ADFZsOHIf9RXSgq`QnKXEAmTGc^@G1 zMk8U4rIB7U66RPM={qA~Hl~p};_ zAy&jRN+X9EjBg}`8-Y1stxD1+!<+~SR##b<(i}ehw?(MVD43+95MG^jbtyCF- zOBmqn!AB6NY*SWg3e88*z`}_L2C(u)q5IlKTHxftZ<&#^AVYYgT8XnDn<7xzrmVtQ zkUgN01?H}a)qUefYk{%G!Z2%L4lUS}#=?!h1#U%Wrj8nCd%R_4kG0@G||(&+M3`5W@DlO18j>~2voL7jfn@K zQ7xFgj3#=!e0gs+WVsZTUdXO@Qfa0{~hF3!(nGk+>U5diwz90 z7FBA%giUHpbb>}Em_0-jL*2pF#5hD76SEkgi7hl?lNu8T;wG|@y**8=c2`&vwJ{$`vQ27CjD|+FV0OOYb#HQaS`)?A#HH3mlqPIaW8$H>31;s`6F0kjM`7CH zd23?3HF1z8Y*J$)SSwbG2(stWMAW6LBV(c#qWukFz-$Ntm2FaEVsP99CrAvWi3i== zt%*t2#5`-_TAHv)jfq=*6JMb&%s!MR*1Mn41kX2*GAEDJml)uYx`QTcQgft!>6_q@ z%Iv(hyAQc7@L**&B!DL#vmu-tYOL%$Q(lDC9TuRMBa{7dn|-y-{sgnzq^1Ttp^*t@r$;>ZtiVBQg3)FpzO*JX z@CScoo79+SWrkW*WmEFyHP5*2)IeKYPE1pFL9}Vg0SvGy7tw@GYMSzaxQV^Uet;%s zxpYrtOl-C$-m)e>qY0bTm^d6a!R&Oc=gxNNiO879!0;SXi{ltzE!rVa*(Nn6dO)ML zVD|55VvhSGP4Lt^j5&G6I+p?V%!M>zlbW_DiJM?{2j^UTLi99TK8=Yxtcl01iC1aD zCN(BLh?_`8_B5Kf!d+}ld~Ho6*HbMTAW+#RH72s4(S|U422EV)K5tFrFef);h&3^d zCTvn;VsYFAv)81FtK1MS?Pf!+wDZ^;4d3?E&4L#h16XZFgx^QM427hhXL-;xy){pnH_qU$&Nh#>Mv0Kvs1)z zQ~7sI5Kou{Zl?H8232DuQaWg#}jhLust71WO;xhHincMtt2NSfn zn?HHXA3T`3P4a%)M40UQ=?r4x7s2>n&fMlH26K&wun7(z+L&N}q8(Pua69r#m&cp< ze8QSNaz-~VMVReEY{7}sbCzycup0+m*i;fiyv7iaDz-d?-h#P!=D({cNX@Wa!U%9v zVD7;M3{1p|iGswRte$~`zMk-#1?dqsOBlcRpb!{Yw}4(s`7a^n=Mk(TX3ese=8$mC zWIb68liD|cqZfe!tVl|X!fK|DGvHV0%y|etffY%J%~(wm1}30%==luygdbdsHtOP+ zP2^xTsTtrP8KfpSjs=@bY{80ok@KSr_|+c4YWKm4Bt)L6Hj*&F?SS4kI}D;CX6cOI zZdf@rog9o6b6c+i)=Euo@YQTm-j_2q$-nZkqqBh=Kgi9Rij^te#dht+$}njj|C|9t zy4e=<(Y?+lIAAis>mL)7Ykl=PfPc86lmP5xo>v{5xkj1_a}HSh56%zxoL6w6El4+OJ(yS!LM00xAIONVeVv|0;165&x_~J z`?dU>OpH0r@s!*VW+`8Pb6e&NAk1BflTS=A`3J=F53u=LBEY?D4x4TWM6jYc2|mkV z&Mzj1BQOdp^z6di{U*Kb2RK63LU)&+gm}m#K~@I*?lE99g3n<^>Q@2w7Gvc*1lV1S zzyP1ja9Y84BN5>5ph&^$QW;yj|p&XC}U{^@ZXn1G}+elL+=*RB&#T0fZ>b zi!#6-4Pn0d6lPTj*d!wC>t{z9$Ta#PL#B>gx%17MNtu<}rjI(cT2}2wv4q zMh18u;p}q2Kb;J+M;qFP2c1ro4=!L}x=B3*jbxUDPPopTySqV+d_=AZ_9y)Q23BXP{G1=jgN!tag981Ie!c`0CLLox9_R~$5bE^PDz3BS)3hfJUA z?58KXV8z!M1E$Zhv%!w-bGR(!uwxzY(*&aoR7RIT8iLP6$Qv@ni6z@N0 z#{19opy@v=O_Drf4OZ;#km)~<8GQk<(dgj_fdRk&6tM5G>ZzRClT*L{n=S2C^^agg5(6R*R+CNXO?mYK|+sJAG8S*x(0j5b67FGpD^73Cb{qC zVns;=^RuLQCmv=y@vqcnGjjPCkN!U**dBWjDG4(Y%PB6ljRLi;7tclhwV?pTIXs=< zE0^(v1vViQ@thREd5Uc5ho_U{On7cGv+>aiX{I}wE6w(H-7f2hl z*A0Y2wi?u18@5{q(0y&MMmWfBO*^>CT61vP@W_JX4)tj=4{JpucdUP1fF4_-RI%nb z+1iTxDcai<+!k&J=U{7dtW8^;Fapi7rtlt;jwC4Xa)wVa69Y|fFfj@%z9Q~M8Su{- zgSqp0DZ-_d_{;={6XsS1ULO!NOH2IvcJm2!#GZbnKUm(kIh3H?Sd}R3#)>Kt>}a?s zJ+Xj+EogvP!co{>9*amwuvO5Ub}z(|aku(6p!q~ktjIy|Sn0K(w zV4}9!;+YGg4EXnigLwt-f)yJ`bi-=C$jSh35}_xinBWM4&4v39c0ltQ&KW_ZV>K>7 z7^sOA_p!us6FigPLFG3DJc#UukYP4;Fi{h$=@elEnj8HvqMZrm6aL8)U&&>I@%)Ix zmoRT!oWaC0tgx~m%D`HzXq|NcPl!lOJb@J_x&=`N{5I`RaA)FvJHAi*+k02+Q=Tl% zqq8%B=z`U_U|}F1E1DyIeu~`@+OEnE+1m3SZ-m*y{chbZO7=7jT0rDu#a+dMCz4(PC zpA|1O6(2$HxJkk%m|@r73jYa+w;bq{iK<)(sqlq#U7$|Kmk~4A4yrC#6KYLWXRN8Xb<$>2b+R)Jwq~j zzX_`l78x`(i51IDJz#1Q+tF10-kLD2YGUp}RFlGlniM*yg=$i0x0XfvC;nKm{KKf+ zzMx7qG4~{yrtbNKc62%m`V=dUW`bp5pQjrl40QkqTeZrk;eVt7zd^o%rV@i#@Bvfs zAQr~gwh8@`3Crzss{ThdhKB!#IRpYRhziFoaC=F(_F^bs|PW@DAzn4!{-grEB?9|1a z{P!%u$rx4I6V@PAN2{&XCq9KRtNGh5elq0It%kA|sXCfPtB1wdvypx7Nw~!4DSJXY z#8m@rA#qh~d$}9@28>;Fs4CY4@l-KeR+U&W=JJijE-qA++xmE_m@%tLG-m&ROt^@| zRk161Top5BRWKH^Th5!{i_{;bqiQAA0A3T2Yy5ERddm3aMprzWTCJ-z%*35#M>!aWeLxAr<9qg3&rPH;CCSH*5Ln8{BS>sVCT)39vCQ^j^) zTovo2%;ejO^((5r!()~tO2PicZ#>E%3HMh#3P+qeT%VHj6Y4rj&!Q{8ZO}}hGHLIRleghb$b&P>-ZG? z)W7KXd}7uAE_T<}M*!z8EQr%GGafXWMA=Mvc1}Q+z<>SG{YU$w`xpD7djY=aDs}eG z3wxD@!WUhZR~YshW_rhU_D142>^-?)vG<148NTCgNY91uxKE2Rz3Q3X%&>QE*sB)K z@+N0GfuNh5ne2Uze`PX?X&@u)eeZ@hU)-Zn3oos+H#O6%9rh+>dXHR?d#acA6^tFO zumr{~F232TezP|>vt1+Tc2-~kx4=1Fl}xy$^M;1K7U5&Op}8d|c&|E{ffMRBZqwB( z&OG*5FEz|Uy~^QWzyy|72nXTk9je3hhG#+-(<7b<{ZtHZc_y?trn_i{)%}=e^IkC{ zm#N?=&m{huUi3_8`HWmIwb-kh>s8D3(%BeyrFBMOJ7z3K_;%xMZ#NBktFgJWGutEX zyBQO_9rK5JYu&K76TBVVF@Lf5q`NV+wg)`sozkmKr#8Ksbu;e%IuAE(6^2JWuX)%T z+}YdXOz^6Ny=iQXhF;oG7(WmyhT&ziHhMK;jrMwojrPDS_~6U*hJ?LlnOWIhp1)7R z$!z^OnJ0KR&S#}xPwSkI#4pS!hOp6W!RA?Sd%beKXC1lLh9Q?v%TVH_ILEtYv${ocQot(^#nKEtcIRhrm9p4sZ z!VjqLn=bBIE>;?%oPWySo_~h<6<2!l=!im$KRa8G>HTKFkt1qXJZJiN-&3A3z{7fm{Q>iBVCQ{y8Y_@Sxj^|4!@ z@lze+_zwp~8@lt$;!ie)Tc3V<$8b{~B?G5Tn^F{>Fs(4$HNS7T`?+Jrj~fT0d4u$-=kRvQ7>+g@3#8@BrH^JRDhCk5`sf?M9y53eH@oj-41T z96xhX(WGfp!`WFKvQO%87G8bg*5KEC`0<9}w|w{w^-c(+b;)Sl4P)54wuiCN^z`bu zd{v%w`n1C0@v~d?ZRaFcOzE2%NK397tnSuuYk9TZI&NLJp4TAI&~-A4=A2tRdJI@x z=yReCAv=2KxY5O$}g~;_+78Urqq{Jjq*rF7158er-DLCx-3g zI@8TgxN)?>o=OLpWgQ}}!alc)wU+}0Mu*0hO`S2tA`Q3j&|rkQxjkjQ_@H9*An0_! zlWg?_g$+(9m#$A0_y^(Lt`?ha4CKUehxWk78;?bS}O$79geZzaMu4{e+Tdqs@Y zV&j%WPPEq)_PBklUj|ld?+%2Srwvvv_uwSc*merYjN`gqwCP?y(K)J5KFy zKU)(Q&+PHI#xp%LQD)DIFP`ZciE?G*Ly7I-FKnUs;+Ympl(`q;i-!-PV4$+uN4!?h zCto?Qdj7q^(fsZ4tc``|o&WmI!vp|yIL;w2?>mq46zLOd1&L03v*f!Z-zVAlPD1<> zk~#c^>0gojmSp}VMti#@e=hlJ$^0LJ@d3UXKz`#Z39LyO`mpp(BpV+|h;Jv^{O1Ju zbjf{{o*%uWJ>v@roT~WQ(qACi_(DSb_0r!at{0ycUlX^HsMk)(A4)d9k6`DZHBw7C?u{sI8^`UpXJPrMB}>%>C#ab)~B)2_y8X)~x>8FS@MB_^j;rW!YUMl@E z$;-t%q<=u%AU>)1XGH5$?=8v3ryjz_mmcc>74_g@ktb4?8x$*&h_5ZVzSvUw6Gh`& z2$e0)hP$KR_%{y0aypBc3n4@%@8*S4&=| z_~l|$`tm-2o|67Waf?{q_s>Vt?ip(>2oCa6o*PbTAVCS zQ+$y)Px?zGUn#DVeyw<)_>kfs6Q7p8yl< z41IIa_zHsDLFqb+-4&lFd7wB-`blD;I7{)?chE)B^WK!@<8oriJ88 ziEoSViXV%6#4_eZjn8P5%V#i_-%dP5q*Ds&IaZSFBhqmM<H}` zek*b?74>{LB~wNE#-LnXtSufZHWFKkZN!trP9n!`&<;mnkj8g4I6(3+afC?M8%%ee zXna~jHuvG+Mbcj;E)lO2SBX*aPSNlzK$2>=XXG^v|Qi~P-`wDZlCKh% zh&PC<#9PHX#0SKO#f_qQ&Vb$LCEMqXZIa&>cZna1Ux)|ALn53lnfeA{ll8`zvJEjk z*|3^e-lz8o(zg(;Pwx(ryNcb#GsJvxxM+NRBRoO!WU)xJK2#SxvD;CSo(Ojo3~s?`yTE^nFD8Ts1`UC~=%< zpRcA#o-NK3FBC5omx$Mi*5|5u?m|1?DgC|TBjN_}Y4KU{Rna_;A^&#CJ4Ne*^>fKz ziQkDoi=LiW(#6VREwP^1SZpe`7Tb!Q#V%qGvA38nn&&sv_bkbyMLJAjKc6bj5a)=C z#Y@DiMR<`j`N}`n-7fvzV)^I0r=;I3zAU~bzAe5h+UGs%3wFQsaDr#bw?1KiluRF9 z+@8u}Ezvv&Lf=sG@gkjkG5yJ67cocdE%pm$*NW@KN5v<^P2$VqYvQ}&`{F0!=i))}8_~rBFUwC7)5XeSEwP^1SZpfN z$sO}|6?=+(!~x?=&$(tR>bH8;Zw^t;8(xRI!`bOYAES7Ke$W#qr`4 zak@B1yguZwSq?}#6WyTyItm*RKg52A-Z zx!JBMVun~%q$5SfHxXNjS>nm!DPniAmzXCG6weYzixb5uVzD?|Tp(U3UL`IOZxmOH z^z_L3J|O-<{G<4y_=>nqd|P~9{7BpD83@n(i^P|g#FiUlHFYBGMhNQat~ zFBIuPlk#$rjx;IXEv^?I6`vHJ5$SJ}>E9CRZIkk6BHe3JJ}lD9CglvVrdU^OC>}4; z87I?s6uXHL@eDCv943ws>AI8o3q|_sqS z?iN22=?9eM{V3A$C*?{a{eMz!C^i=}#S_Jo#jav^v5%N14iyW;vEtbx-Hful^Ti9r zOT}x&5^E4y;PZJ|zuGn83B+}n2 z(@zxX_LcJa;)UX+;x*zjaiw^(c)NJFxL$lzd_vqL(z`6ndsEyY?h@&1mhoSS--~}0 zgEjs5kVxmVOkYo=4_eBZVmC1&_7(e!bWF?i<3)O+r94}tLt4uGrZ7prwB&6fz0y*C zOr#rH$}fxbMoW38NT;-vzY*z@mU2j>4_eCg#O7kA*iDRx^he9|!$dlurF^bPKeUt= zigZUyxkRKhTFQ5b^gc`Zagk1FDZeVx7cJ#oB0bSk{#vB#S<1;GJo`lMxiRk5zvK%|FS#%GCiNlQ6Lq-R>nL&OQn%N(^5V~q>Eb0dE!WMtVqwbjGr%FEiM)5$CmNyM7-Ai zo8R^^;}ek{m$f6my_4Oh&B@{T@>}2D$vW}mHvYGIMx`z2-Y4R^_+wX#>ohfEVXfS< zkqITWGid7AZ}0pC-`?p^lKubKI}`XSs=M#c+__0^79e34SuTr+EFlRI0i%Q^7YJJj zhzQ8Oi-JkeNF$p|L9GRX3Ix5l+iDf9^;K&vE^Vm=3+mHq6-BEcL@2m5icfuizcasc z?-COn^bmqP`ue2^BgZd^&A%s2=*=oWs zfF8_<7&*Af?HfRTeIj=3 z^=hy6rd9W?dCciGxEJ={>sD0L>s6olyfvUBTCBYkf3Y8$59 z7ugg^{%NQ-J)@K>lXP-!3EqsBnAASvgi)7a$&p5p=Z`1Nomq5FqyTN^Jx1M?OAK6N;dnd#-YOo$5~8*k{v_>Q<3eEqiS&Tz`FNYpvIK zVD+i)0JAR7pz3KggV$&F>Q|jtlhG@`dMoy@Z*_jO@8FVc20Xba(-Q~ zpzpka(eAhGs&lq?k9-`-js$P&8QEL+_&#^vbh)w4k204(&i@J+UTZd z7_Y9+)+X?22q|al^T$1~a4S>qJ(!7>&oFroMTonG?UHos8+E~bEpFOXH*4+QgN@hh zs++d88Pd0$`{MB+w34lF)P)M24SNqZE!tJLaP4-KzpHMZa%?qs`*9Ec6Sg{7ZE5w^ zy$74Gc@F)e<1O2f|K5Wg<|b`yzxIu~jGU5ryXvae?y9TY+6HAUM$EQFjEVk$nzcrr zE4Cujx|>Aoqr!R>no`qPL=&uI5`%Rip>Q2yotn}S#i z=<$7lS~qnN)(djBpM%wQ`r(Y|em_=xTA3Y1yRW!5va2q0t+VO$4Z$sA>Vm1e>Nf0S zn>*`v)veu%m3K}(D$3 z+=e`l3(R@^D%Lp4sP!6V)SMfsc^F5@-CNgZd%MV#x?s1-b-}()r`$+5^4#%&>-Il0 z(lGKN+UDG%X*J1c8;m{|O{;clwnT!x9GpSb1An}ysHR24oYytwgWE=OYn*P=cMrY) z<%9T8`4;Eq+?uI}sxv0-c4{~>^{R0?XP&)3V)rO;!XA0pqriV@kC1z9M%!N4qdRLe zTIZT$&=`Fv+5P&x!rAHWI@r4?SmW>>+wwN19l+RTM!ePU71d0OvIVX@&?l0&`Lg$%UviQ){9y~aFj;b3+T}Nk zUsp^Jf3PmndyMObZsO-efu#RKEs(;Gmb`R&^)F$xVA2Z+@XWXT17;YXlpizB8;o;7 z1${zE*D`S^1y=wkzAlo-giH9-y$I1fey`*8IG-Z!q#du%d?pU2nD2z#kg0koXuf_5 z2H!$ttc&zAki-wKf;H}1L{C}(kKk7K9>~eTSMZy{&$F@G5aQsLj@NE%Zs;@qnl*c@#C*K^c>Y!kk}o<(08f+p6bvKAoA0+)a$4gQ}x#ESeCY!S(zn> z_#s*vtt{LT4CN{Y>5D5J*DNDcj%ewN?J`3BQAw=qhNxy4A%2pZ_ScxoH@4|!Eu#|d zQU%ns|75697vMcy8b3<%Rem0tM%x2l?Txom__OMdA*XXiqA|>gucFc`u_BSth8Ybj z5*dxJfzm6nB9YNvp#}p|UpoLT1B(omvQ5&lz>pF0@FF5DiTi8RC-D3{?ar9m8;^t2 z_)V7|`b(<(q{~;&!o$y>dYR46}AX`so>2ZezDF`IdpGGQOMfeTOv( zpns(1$5pmnf{M^|sG)x8XQ%s-GvX>Mj13><;0*iftp0z(5ys^GD?AEs!XZ*8l6}$y znB@977sO0UL>=Pzv-(qF4G};v;a8{oZ)#GGA#lHnxMPX15yueB(@bJ%voi`jV_OGE zm_muLWt=$oKOO`!W5Tcfx_!$a$2MA5V!B9Eb=H(}hH6aNZmii(#KpXh?=Cx}y)%l9 zZ4?_FIhfir3+}~II7HaCj6#)B%B!LjSOF8#2|`4*A(z5orcPo79H!u}ic+}2_a|5( zmcS`qK7^x8((D8CWmZKgdW`bt%l!aH!tiTJ|zUmRt_vK>*m9m^<;gTo}J!~`RbCHU#A zX)6ks`Ti>aznLf4W;VI7y~SP{B=83pV;l&VZKwR;H^Oyff%tP%`z z#=jH-zlOw-C9X66Xi5q<8U+)nQ+O6G*6LJtnovZ29|9*>@@vr%vwcH3YC_8@q7>L4 z{Lq5dQ7Yr%a4Hg9b{&->_!S`y$s6z(woQwV;EhxvM|q7>M9Q8VHtBaS85omsH$&6L@hIUJb7PJul- zVLrKpzWlD~%cD#W980i2qelfzUtZw*^Gsjuiv+tiDni@?huE1>3J>~9MnZQl4<&SW zWXkUTJ{%g5IO?a!j3%S^@w0RI6YTvcp*7If_az3yVV8C;<4G{h_?Hs?Nl+Gy#!rIM zgr2`Mp>LPP`!?D;!%VAvo9Xpsp(q7*cZ39^6!Op;afFC-{T`ZW<~3dhh3!mUYXU9} zMk%nTCnF#k{o3|=Mzp=y)SjJp0i0v%n}gW)%Fsin8N<6=lc!D#~VGT?L1-iEH6Z+3c(L z82`zH-&av~ysu7XN95JdlpVhe;v!^wr3tYEE=oX$Fx%IkY3%=O)9-K|*v#tnBaV}% zTnhe3IgyCf^n}XUOyXmHi5>GX3@$@3PXx~CY)=TBX*?a?g~Kdr?6vH$j1lj+;Wi{;L%5R@!=>Z%Hur{4m0Hu z%ZxaNM~+7cS;U8poTxnvEE{z<+fLMrmj>g9Q=%;#k`d1vaT38V?6Ir7Jlto*@n4so zHVG9>sf4g8r9H5cLB?zm4T@r1r`qF>SZi`F&y$Cp7#B> zoV3jNC3f9Y%g~}ujw$GTf>&E)_`sDEI1r%%c058ivpb9^H!Ne}5x=0POa(a9pj8t0 zlQ!Xq{J0tW=9us)1Z@lwCWPcI0O#t(I6?SF8g@yjzf@XI=%c;5Jq zC3ty99<~OYKluf-6Jy^8{4`?;KjIkTRg)%m#`7LRp*9=aVCdiRW*HZ6mJ&7#N9O=W zY;vHfczam`jMmZ{Ug2SEF^UFA;JQWTPIBZ0v z5vLFwB}~Q~CpNi@Hio9?9Cleg@(Fk@tN$79(&V#e<+y5U> zf!1itu5cV>I1=(qrOfMQTeCCciOz6l{QNQsufU=5=t!tM75|9G&SmZ(x;-{D zn>OZ}xFzbZAX>nm591%4x^iZ}$+Ko(HhI?c%VzhOKWlc6{OtVfydJ&tXUwmdJbUKC z`HRbEPsaRRJ?74w*(1NN5iePE$?P7S;cD{yOJ*)yGHdp~_S})Za9hfY#VS$<9u^?fx$TkJu z%&^xc{E*i^JgNP#nH}4B=>^`Hu-7v@$SckUI(nnRnDX$o_8nWd?=k9}cB9)}(ayVc zg4d|nyR^XD?t~_I4T^i6>iymge|~L`o;^4jVtTQ6akh6#*qfW(+j|hBWNPT$;XT@% zHqyHsa@boE_R_=NITP^o()Grf84tS|xwVlsF=ZR$b&BtGv5(8c^z6u={`@h?hM0&= z%nXoTxrvb*3&b3ZCb-P_dl|k~;ltPR7@;+Py7MO|_7hjT(r;iaic!7BekKe2oSPf1 z1LJsQen>+D6S-5Oe_GtXkpB6xj7{0`VllragN(1KCFadE87(ya@-niw&<|;9G?N9U zvyA0Fp3=Ge@e?gIt!3nRai*s6-8W5QDsBSIuAOd*zrvJd-94OomyoihCw;Hld1JU94f|(Sw z*|4jjC+7D>LVkGd7t7E8Puix&`wHausyztsw)x#$FTV`@^UnQa{TjmA{k;b=)8xQ$ z8`T#7Z`n=(ondqji#FcG_Re>j2XiOljX+wv*{VJXkHr0Liu$o#Sii<_wtl~ZjOr`~ z%+|8Qcbf-uG~&H(6M@_ZZX~)}Z2O=y_8p#liEqngJy^GdW^h_}`S(1SehbB#4(-Dh zi*KHj6;~i7&V$Ko#mVNuG#B2J&Vz|j8yk}0(+TuR67T3)0*TMd4blA_&W&^$iAde$ z-%IQ#4iFijRsv7oQb>EAAHmLwsBOSUgT* z0OZFUq=!Dqd7V;8l;1>pOX-*%+Jv7jJy&{f>4nmZq>q+vo}weanex9_{#+c9 zB0DYPohh3B2EADN81X!DsyI_L{SWakk-kE_TD)HTp~!KbbqL^D4u{7wG_pOpVIqUq1@-z9yIX!m&ZQ`TiFGM?k72jB}ycfm#^H;qi|NY`$#E(QXA1%`V zO?nb8!ptvKY%Dex+lcK&J8xBY>1T?4MZWW4etcO#+Ig$YytUA$$$yr3k+?|YdSXmh zC0-@kd8^h+-yq&9-Yz~UJ|g~HwDZ~Wl?(IVExso16%UF0;)C(*JXN1b=fFk(px8jn z5?hIU6~K6>i*}ydJn4L1&+z`@AhB2+C7O9}5pR<88R8uAV)0Uu@9CLum1yU!`o8oV z#r2|@7Z>qwlYXywzsR@v%#ZJH$Y(@5Zxz2yp+Dd3ldp+pzFg?s-@ETzKQu>Bd!tG zi#Ll=@lNppahv#rXy@I1UiuDkk7(!LeM9;_@qkz>^4$*W^{M!!=;6kW{%K-Ev4wc5 z*g@jhAlct(qx)u6T)9Cf1*?>ihD)UfdvV6z>x66Ss+Wo~mC+ zxARoJApJ%0kK*g%yW;!eG11KLi}w0LI$j-__DdBTh)uQ8M*14D{`^$8%KvupKJfwZXW|p$v*NGC--|DcW`1DQ zd%yJh^90w){|gb8FQy$sVk6PaAB=qLyj1PvUw=NTe)2z8{I>b1>^#CV6`!9+^E{{& zmy1`4*NHcZH;Z;2s@tX8d8i(czD;~wd`f&y{Ehgc_>ySnp?XvLe$mW7jC$I6sO&t% zb{;DJ!_56i5z|F8FERX^OK&5#7tavQ{KSZtFWt^l++X@2u~-}>ju$72{Jxy^u=7$~ zCVi>6QoKgIL0l`|BG!ofK%M#7d8rn!d|P~9{6PFf{7mG-BbFBw z)5S(&bJ5OI)n58(BEO(#dOJ_mK zB=Qq}(|+P(;*;WY;%~$k#h1j_#ka)$qMgU;m~=aj)!(F>`I6BN>3BB4@*9cu=dFNS`Lo5*Lb##rpFouaf_@;t#}iA`KZ>o}JI?e(4X1kBLu; z&xpSgY5KtQuZlE&pk6C}D1Ivbr)cN33gI7K#<%lYHI?2{Y$tXUX-2{Ly+u2(RgrW% zuT_ck3&ab>dE!E`T*T_=Cf^m})#CNy55=3s&EoCi-Qok{Ht`AZ7vl5c4)O1u-|ADP z`&@MKEP?HjB-(kc8cVnHTD6mI=e6o8y_a~FI9MDijuyv?c3!I~(&vg7iIrlNc$N5l zajm#PtP!K)J>ri=+R1SLej)x!{H?fKd_{aiwDVZKFZ~1YBk`{yA5Js>pqL?MiY>*~ zVn^|Gk%l`=-%lJM+Ig%>rH>b9igU$F#4@q|d{x)U|3(5X1pYnI{PJ{V05VOQKVtbLMNsMRbp&BUN&Oq7f_)g^<;U=R#~0Wh%7?c*WV?TCGF zPlHYO);^OGsC_1oMcYZQVRg#xhBZ&L&Z`Tgx33E{aL@j1PgYI4&FwZ#ZQFFP6YdxJ z@~?mUvTGzK(%wkH+9J1K#0k?ktESE1i`q7+t_d}UE%vJ`8q|b0zwR`uez|34b=#Uy zuk`A6_)V>DT$5Ivy0O8Q64+Xoz{)xh!6WdajaK4DE#S0w!Wrw=MZ%j`MXry~j&s++ z037W04z(_X&FcNw!_b|PcAsDMw_s!fEY>H~g&uIC?rl4dzi?Ub)}+nP9e<&8)S=)g zZ&P5)i^u;o-~yEL-0|&~Ik&hs?>xS}^wf-YpWpE5sli@@Xr&#zDQW$gk$$jx{Zr|4 z$9E$(>a&5lqrAc1I^;Cqnd7@le}2qOPrfOHvQv+RQd8DHvnREt(WcB>VV{40`ruZP zhBasZw0R_OPF`K8Dz7fNb?>@hgI2TyU-Ll3*|!*yQ&dnF=-<08@R#2lzp4m(1e@dl z8t=K|D~o>k2=)>-)hq6Q?)Z&sRz9*Hmbb~U!FF8Mk?}?!`cvL>=>rc9A9yr9@KK|{ z`bP#G8ZfBv(2&Bn)18kRIo?N&yn%*LpSbdLqy!+QdoLbbT?Y-#|7)6aC+J>} z^Ve;JpIhLu!+6GjU?qDapVI|X_^KCHxT_38oJ8Lnj3-jw86}7fgWMqoDV*Kj>%oBj z^XU^z;`3bZV#wZr?-`$z0E1W3`+^_PCzLdc3hhn3NoT-EM!DWW_yog6O#3#)?o%k< zO|i#fil-u{V4qbKd*CP7cLRP=S@R6u4e`TgSmicFtUxe028BSIjwnf|^XFz`mz(qj zVkOnM57X;8%3IyvKu*Tez4&hjZ%duPj%1gQ&%J8+gcdEv=WaWapMnQueA6WvUvf}p z#MIfyClq)g`C24MySx`7{Vth_(=P9gug`XxNKX2~g=J1)SMoFjI2p|EPDl;*LU5gw zQLOcADma7rnSx(SC|I&7__f4>Ur+urR`44M1@BEP_|0TK>UJ8sy;6yts_3+iJBp!iP_3jon(7x+ zS5YmYdLCTn1QhF*wuHEZ>V+|t57RSe#MIlV&W)+*kg{kmJT?Q#Rv8WU!bbZ)MuWYu z(dwvOftceM^Ljk;%en$FjrJI{%=N6$d8`oU!RNam#~n}gORBsEy60299aqjwE}7;| zpxOx`nS3JcUO@FMs9ChBo=EKpXpL!8J&9UiU8o6clqa)=vS6cZgytzoe?CHe^@mg^ zvakyojgK6fc10*%9%E&@d_3HY@A&xte6yht_z!%u0ti|753{+A+JaqA$(ghtoZHhq z1G{6ApN+^Sc?kt3{~nXus5Uu!BSKF^2hD(^4YE_Jr)1NnbP^+ttmYpLUS9{md>3ig&WW0h3+`t}F)obd zlN{i9$^S9^I{A7k&-yleQ_1n;O1QReY2b4Fj`7w7liRu_ZjRIDE`;wz*sTg*!tg)^ zeoF$EIZnH6N*_y`vc$>77X%&r^my}l7EXes8`52u*|g_4-JYjdd!95-2R949Ns|%m z`^JO*`6m3vR6ptTjA2c}=`OxD3c-4x2KhuR(u8kW2BIvqUSb=t2jB^xVcR@@xX-i z3rzi*B{{if&VlCXnChT08ni_|d~i$8n5FJ{$u{OG=}^%72-fLTRRTN1Qd`GWbcZ#o zTx6GP_OI=At6V3LwvG?2+Svfd3CH#pO<9n^EOD~32|Jt^!sCk#;{d+#`Rc3&4*CTq zFR0_M6NE#gP9(2uet=2u|8xgnG(|A{tCJVBG7-iQj~bEh^kbVJT1wdDUpp@WPiPp; zk0AYY=h<}hj^zo#ul71a=1W`q#O)0z@C$NXBYsy0>ng&0<^XTH$Fqcna1awSR>2|LUMK`t7Jp-*{2(RGxh>{LotFz92$ExbvU7fQaC~);Bk?|k zk?)$Yan-@|s)LkSW2R$mxnNRazSIxFB|D|n!LijrTc5-@-&QYPu3(3=b~y!(;mHmP zA5$H?8uAM^kit$Ih?-G8Y6B^tj($o6Qf9SHwroBgoWG||yaFTf#^n@vMN4*&E%tF9 zo3<_&YeEI(WeeJGgcEHx+vb z>CF9rGnv>77jUkqBzM5UQq87LFm`032_|$bkHJ=7B)G>&U%^Ct=@0WR!teWKRY+$x zwi=6T1cR@v6)UP*l{;x)e%Y#hl%C8v6Lm;FA%qRfe?O2T%VY(=8i~HF##i#Sb<4B` zUQvpfKypX-UsJ86A6E(D*0cE**eP)VZ#CD-C^e2+O|8$m5y>6D#FmoVse`fN=ZS_ffcUlP z*o&7%DeN@ffkOd1z{F;qk z%mdbYY#D~Kg7y$%jI50E81fW>vN+1q;}xS+1)>x_hC_!YkQ9;NpK#pFf17L<)SP(N z#K9gRy4m7wQ5tWH@}&uFfyr3nZBf3=v<3g=MgJvOeatCPY1-lj<6nwjvoZ6oaF_*V z1T8fw`wc&qV5`zT7?=o$L$^Fi!Eccgq5{sOhFK?Nzp;&_<+V^z@bV~y>)=o!{F?1? z{5}bn`#`d}eBV(REJ51r@h~01=E;+F?#@wf1JY#hb-PQ^fuyyK+Tua~> z({A+pjzbHhatuV@BsiYg;h4LUFb4A~JqONQg=|Um{Ej6ts>X1enxpbkKg+eTMyBU? z%#u-A>#vNy^gQ{fZi_BPjKq76M1OzB+1<^?sP!t&JCyNo_R?sh(!XA6dToaLnpWji zW<8v_;!r_Y*RHg#;?kP%Z$mMkov zJ!|UVMT-|NoL$BQJx9!+Q8v8{Mf4mra_q3NJ%{Yfbv!k~W!rQnZ#V4Kn-_Qs z!u-w1_A0_&BV$mUUUALv;lsV9#a`wEmk)svamO~fZM?K%uiFGKZ_Ws>Nhllkyt##; zpXLSw-ks^$FvotUVin|vjQppHV#qfc`A9`J1W$jG;)PeA-PjeLjkKU6WN`)Ng| zAzro7pRLIDa(R*M4@c_rkIQ z?=iO+%!Y~l172Ea&K<*tbsbQ2nwMIT$9hi;d!57iG?boL?B#^Li3MG~N0$}M?$N_* zkc~GJuDf{b%(7gEzj=GwA-PVX zt?<_vL&theECaTjwYv80oKIq#ZAwARUU}%dU~X^F?}Mfn`?lX-wY^qvMG6zm*ohl6 z>bSu=Pk=e|7cSIU63^T}UnV&9ES;hD!s=3k2K5Vf;c*_fXwky*@SH_u;Q^&1!$lX* zm_2LO>{;QGvPCm-0a{d6envPyyKi={a9&Pser|4V-*A_**$ZdmQglXm5|Z?stt372 zr}piEtI8!a=Y`8=UpBvd{-R65dAWV^&gyd^M!XC-{u_+vkW~#c8kql*I1+N>rS#kE zoh!X7-L%4nod)75?Etb|%x&Sd zbWd?xxu<$<1NgrqyZnlaE2hr?E6RM%vl5b5IN7tNS4?-ZXOx%wcFpw6{>ljRzux58 zITdZjyDvU6;Fj+r_G|BS+QWzO?43^ic=itNbi@gLhj=;4FR|Rj+bDa}$YYAvTCuGV z1+;`lTT;fMV|l~jY#ksP8b z=hutZ8lC$zc5rPr-fZZJrN1q=60%JL(HVf94O7r&!}xq4F~1#s_+-t` z52r;ezw05}G!UKX$nRAO+HBbOp(p0|D)K8tAnS+E#$x&13fZQC==8-qyTP_oB!q2( zoS0wBe*SS{e)vQwmfw$*hW&xtmH5A5VZHoV-lK4&jd!r!$!(*bQ9QtGlfx&sjs68f z6YCd7{cQW;rAMrOFG5Cj76WFxFZ|tXqu)ZjH~l2$*R~mH&nX7ncbfm?0f)tD499-J zda!N@&EV8^cAO&k+0Eu>b<0HmpmXd?>rdj=Dp7@=SQCaPmPkEl)+~u9V(sFa7aKKv zKhK39hKgm@HZZr_~tqFb+%x9^I*Z;3M%)SV+(Dg zyTyY|zUbz$&6HDrjK@8GJ=1C3R+$_5*yYwwraM&Rcr#oYs<)MFivRMZbBy_aX=^=^ z`QwD0DlQZ+6_<%uiEG81#Cyd@M4l(iZ-@A@xKBJF9uYqgzYtwCKGQc4PZ7I`)5W{Q zKZy;|HJPp%nS@URL~FBbY&a2~OMi4TKHXsaLg~ha6Z&ZB;}kwc`b_EkjEd>Yq*qB_ zDc#s^B7Cj%%?js4^(^m4(#^+N&>xp>Y&N0)M!K=lL_U9(&QGma?w4W%^iS%>_7dqh zc_(#aa|ykh^c)g;Kk5CY50gGhI=|;(dd{Uut`Tok_(ti*b`tsBD}5V@_I^}+UjDnp zKZvg@{4Mb>;zy!~p@QXRh|R?MwvpNNM|svJa-iZ37srVgDBgu)eVfOXig%sJ=YA}I zqvCH7ITGy~~79SRWCYtdR@t=`y#!=`yrN1HW6W_`Ha*z9BI~G;>zKzlHR6 zVn>m$CYUZ;JWD)V94PW(ziAio0?~}mNIzRTzYb))D?~ddzz?L~ByJM#7VVq>4@>9w zYRu;u@$2RScw6D`iO0lG#QL`W?Kz$z-_yiwF;6^K94HPK&2<9lCP|+v&J!1km7=*$ zApSMd*NFT+lI7nm{!DyAd{*RJUdDS#{Db(GXs#0ouW!504=$Omk=Rb;2a)vWeGX}^ z6JUY#LeX3&;6GCO1tLHAWIA)b06DiWb$-%GUMv1UTqkZ4&2zv^Mtrq?d^1x`O!grQ7QX zKTKu*KNN2fYs5RmdqjS^%J@%;<~jm>m-PP-txf#f(%%z55RZ!Hx`Ol`9P_m{@c8D; z=;rzYxs~)TVs|kj7K`<-FH__{L$ueKi=|&CTATNk(yh(=jnb{n`|Z;27Jni>EIuwi zCH_kMt@x7o2hm)QApco9C+uZA91;I29vAts8^bw=G1*9LBJ%TK`galeeK7U2#erf( z93_^Dlfv5NOpZJ9M3-Nhzhqy=l5AjX$9kEvY zi}2LHtdf|w>Ip*lx}U< ztYyNc^d2ZO)&T&Tr}&|0VH&SS#`~dWJU;`87Rt zYb(x=>Z$h;`Q1GA;UYhur#@5USM<~`6PJmrM1DBWaBBm8oAf)x`nKQC%Kz8mE^&{@ z&+eJudm_KCr(P%WBYWzZBEPk#-cjV|^wh0QH@~W)*(AxS@822TK*X^3jkc5Mt|mUB8`l5-A}s$-Vi&Qym?P$k zh2mgws5n9_5yy!W#L413aiO?atPm^3Dsi=VgINFnla2Db3r};Np(3c3l6N2PT67FbKL} zpvvuY$1%M0hQ;2&J9HOg~qhq!qW-+DF0Sg(d)y_$->ynBVS zx%noy`Xwi6{dFyq*Eib?+rzY`n*-~enu%C#bz)s`L}>(%Kaak?A`Nz{-uf1i=4KUJ zr{l)RDUp^D#7`c5sM)Y~pI`mA@pYl@ryUPCosI`qk2;h(D*JfjEUYvg?l95HC2w=7Y4uyB%-R@hPkWopLOcl8iET z?@2$CI*H zYUAU{s~aCr>GiWm4)58X_1i4xqZG&eD8=3WNNT|Sc=>?Qhu&}bdRFKom^Xfu;x!Hy z9`a@eK3*P3AJk+}0A*%u#p<|cyETFJ?%6IZO3NN7eRuPk)MLS5%Qj0Q zPRD#4TUeGZ%&!ZyhGl8@7RQr&x#t8Co^?FXi`J!w_oUWlxHujgTRxn+y76lIzn;Zf zr`Ne>KUb7`ERg!ro^)eTIt<6DJaX`WvvF_Tgnc-6K`*i*;zqm;Qw}t**|y*L^N$oN`Hc%7s7Wb^bGP52eferOBw_@X`Nd`xg&pMLE4hC zZ$X+IJOm{<_$hu<(h)!Kc(Tjk%)1bZZ^HR_GCh3T(U{zeG3jq?r~*$K*-7~vK7sAZ zVrwjm?Fm`LWMtvXeiqOAS){ok?1@&KO@qkI-H4->9!7rd;D-2(z%SjSTEsfcrJ7GQ z!cY$D=})3r+#w9*Q>Jvj{BVad^Z?b1s19oil~$tZOQ;r8T@A;zS6~}T^**Z5q~3r` z8&u{y?kG0ck5IdemaOe)X8eEfUuj00n0gj2tPNp7S;9IrfCZ%yro%Vm6vXyb{s)%9 zp5&{)hT4DznPZqCr?6^3gUnJ^d=_VX`V9poWc(+qgonMZ-v@` zmZ#&G^i8ADo|IY>+?+MwO0`BihnlfGWf&(H%D9HrJC7B5hiY4@bJ}q$5 zqAZwv0i4^y4WQ9Y7F`i+vN(qVv*6uSmW^t%;2b!}f?fL(xH4wZ-YsGl--mn^Q+^M^ z%@jDnCvU8>Y}CfIh&~q2;##QJ!MQ!$)i#SDI*ZAo1qEht7KAJt)nrj@I+SUP8xet@ z;JSJ4@9d6nA{w(Jiz#qN)-nql)$GWf@hq5}U+TK~u327>&H0$k;3uAU9n*w)a6of1r)$GXhcosiKga?^Lq05KtCW{K21*di~ zS=`GkY*drQJ0=UBoX*oo*OcF6yR(d0=qCtj%2{@$hZ-WR3CFH?V=-r&nCy6|CZ?}D zO>z*cA14Mj{omiJ@MH8I&${rr60X~qYSufolU#oT0KjzAuM zp1wYnc{b zOkDPv7LRz?X3Gy?XEKyZOFK7!ny}Jy!?=o0SKpE|(^_(7Sxe5wwB%&AO{~pk(|E1u z-^`E6iZr)|nN(UNSZubm0chRWZWxPAw5)HhX_^;j9&QP~YM!|tM;um|yB!MrbQ_U6 znNPTJq)dQGuAkN*Y*q+fw!YCkGnuD~b6zsyF>b;#f6UB(4R0(pZBBo$r6$wCAY=ry zvzxyM>->+<{csy(*cFvRnjlF7d(T-~8KqEYl(Nbw1-?5rA$&P784ea?#C32?P12SK z>l?Db4}Fo~-ohHCGHQ35(GzQ+3WiAS06MY1u}$*ekS0W$+b##@NE8Ob!QiJVN}JOw?|NIC}(#Fswya8Kv+f94xYk=dJ%65Z*D$vOttV z9URPL2-FRU;h)ePA-=lU2?vWD;zbjuERfg+v3CrBMn``ASuk!t=heEK1=IaM*ofADn5HLl8cPgFl<3Hyn<0 zRg?mI0gkin4A_}M_?Y=NoQXW*Ti|fSiEVJOC|VY!@R;!*N3bQ}UuA6eUNHV+2sVo` zrQ>0**IiH$YGgKh&{MH0?-mOZZ*mN?TL2L?-(H%ub1ZaOj6#>|}-#NEpYlLMpq-1e2nanBk`g zM%hhxmLey6vSJ)@qpRSz+V{7I8ByS2w#4pg{dkBum~rJ%LsR_{+XnPzBfMg~$8ul& zy^5QF)z2YlqK>f#i#dE&`l+f)g+AWY==@b@}yx@)`}f%3iA>SJ=3?S+v)9L*BRG+3$F&n#u5RchoY_eV% zP&18Jtc$jV+R1p8+E^W+b}?RKt=A0f^BlN@yy&H-s7z>z#feG2raSltoFDp_jTx^$ zF>`wHfG14DL9cHrkKz8oj$JsI!_6n=LNC8ou@<1$H)U*-e5HdhAC~ylK4tfeF*d^` z3<=jlz0r8Z8kb(*Q~`$HW0Fj<8D9tWY2y_;YRt4=E7D6DpR~6!yk3(r2mkQIIt{(* zwIaQ~DPxB7yt3ziy#vnNd@qi%W}{cVmZH};6~gd(&B7e~jAKWa`&X}}==Dt*GyE~Q zuO3(WGXJl11-ly$Dgp*h>&4TM-^?bQI%pS63&;!qV&|;RQHqR}5Q8Tw$Lb`fk})Xy zr*f>p_=Lb86k;X41TS7Tct3$e6d5a_F0D~1_+Sf~U;gl)pV)>#)`nLU*2r#&eyp0^ znnGsXcvav)Vz)%U4hjAYPb{yqxs@|tg#Ftj_g{6)b(jw|I{+sC~;A6}M~W{bgAJPCoYp!`rgiYUW<_G_(dPc#BLi|ZA`CVbc>GzUj+#&(x+ zV&*@_+nDnHFR-!Ywej0*Y)ibw{}XI%&-&lKs__3L``V0zdoX)v)*bgscm*2Uns(tG zDPB6jF%BJ{=K9aKAZRN@UR;04Zn)~2ErQ>~{5l~&u6xD&7~SSK9fY+e4oT}>2J%u9I{OV(b*0A)i4EZHmn?aVt$>@ ziMI>im)iWUgKX0h_X2Uij zUSfXFBR?J|=0__^o8NtqnI;F0+jVUmhwJd!jbU^@6>Yq?!zZ_|-L80m*~Ya$xqU4k z87J0nXF~fmL71)IF36}(tjV?_zq3rv{txTMEekH8+Rh&lZ?6gQe{4K5@n3;0ogMSC zrzQLw!?D~&N%stbeWaPo#V3$MnwlEm@4M!ZS>w~5v+_W^}l``jlKZtQcBeuu(emH*q~A+f%F zuCbp&{ZlaHu>5rKR1*H3#2%ux&$aec{pDYOtz&5Dm<%;bY+H_Q-uOGR&G-(T-)J&F^MNW@ z-;Ot|@J?b6F<0y-o+}oKTttNVn(GC4p7hD$G;ywYkys&e;!37pE#4rS>ka%jO21Eh zKzvkuTzp2fcD*l3e@T2@d`sLf9uhwi&GiT6{!Kcc5wm`2BAoF>i^FA^7tm1326gSb}QC~grS7Oj2o@1*};d{s2pE7a#b z>0FS9`^EQieFJml-$%6e!~9B@@rQ_J zo(bsuAea7=M034^K1ccjv0S`dTqauk;_IdVP`p{(Eb_x-mh%(wDRH~_d+}xQ9dW-{ ze+}XzhtBrQ0>Q*GRY5J3Al6R{8TwYwq9A z#b?D|i@z6N7T*x}i3de<-9tVfORp1M_%Z(^F+;?6ipKvGv5nYCwD!gP^qc9=76*#f z-guPsQjs5pGyZJxQgMlBu8WXYNM9rVK(zB(Y?OYNc%S%?_*3yok)PbM+;6ip-m7?T zi)Q`{$Va8uw==G9SKL__i`ZT4C7vbLUlV(*{LdGsh%-c5Q?UHY#AV_t z(b^OLKswDW82@(hN8(S!Z?hwQLGkQb*fiK+e(#6}#lxaq`}#BKd|<=)L6IgN)LV#c z#SUWqHLqy|!uSKk`fFM*mVbp<-;Veu`EL^IuTlN1{C_Rhw;O&({`I203YfRU-OSWrC zS13LWXPEx`BJF3WZx-(m?-6NM!*IK1^zWs=EYiq^;h%`Ks-bSzf~Ii|^;1Q=_Vek| zX>-Hyvqf6mP#-1QwVtO-r=<X@ z`B#g#h_u^b{QJdcM7!4VJJR=yG~HqR&qSK;P`7I*w~&6SNK+h!XN!Hsb3~fiFuX*h znGN-sV*NFeaoPQ++Og;8|IvK0k60iM6-S8Xc`540uijYCY2qv~Pyc^3rGBDac<;W( z&fEX_cDwLixp^k)x7&pW+oLet(sCcT;7v=+_sBJf*KBJTan|jv8?mD4rkco-wn??= z!BDO1-8s^e&n)$rCT#~;OU1Bln1an@aRLUQy)Htf3<2; zlS8m{UN?Ba-l>PSq`Yeb}2g=5SzQ z_2IyRF^Am+)rZ}se?D^cQn$cG{5ui<-6Pj5eecM%OZOl7{?fPiIJGHFe^i^2)f%fF zhjs^ZKmNd7kc%|#*$n^do~Mtw4flWGE`=R(Y6fcYi#@-qh23el`+kW!dFjVi47l%? zzpM2;_t=-Y5B$=py~^_H>@0es3vvvq1481 zZmRn%tkcT|C)c`Z>9C6qu6yuUW)NXn$;UENl5XAwTke#bu#Xuk$)e()H!TURT8KhgALU zIX=>Wew;1`&9_YrTwyKr|MxeD!d z)zbB7*}IN(gx{S=dnf!lE`4E7{@|ZHJTTHNl80Q-cKzJ5?>cfd^12#vf~eQ*Vz&O# zBSjOp9ho_?c2COT;DRBCy#*3Qgx)%Q+R_2LaXbU4vDZFQsyU;S*h_ne;%Jb=2`R)%(pU-nD3Vu+54{a_y=Vtj(M;A@cacQxB&sZOGXZ zU{BAzX71MyOx){^5nA3K+;df=Fmm;QsfU{^^;^UD-@E6-11?s0ZkRHu)mx_~p3(8M zx#fO$)1+2AYP}R2?$xeN9=-pp$m9dw=D>k3!*?8@g*S#kY(dzZ;+@zMXjdDL6MwLR zb3VsPH)I}71(G@-JP=5E7oOf2=F;DcwZWv0$i};np#x^{H<*&b;7}5mipH|gd~_vi zdxY@;mB*(=UiTuz_Rgo+<9t71cft)l3qP#CZ03dw2EU+ZD99(NNiLS<`w&8MA%2`> zKFwL4%x5vnlKI5w%4ELhs7l7b?|d(r&vKSJDJ`G`Z*ZRmQo5r`!MojUkV8SfvrBb3 zeSkaGJg~vT%**T!N`0{n9fI8?o6teQY~lNSyZ<{&7g_;Y-+zk zv<#Z4&!HB?g*UyDQRh-Uh=1SGm&Me6`0pg6e96U*JC8ff$(YjbW-&%>gM0b(AIDVw z>yiFYOr1@Y)2#ZD*Fepv%yHcL%;_gagLS*nUNai3+l`ilR>+`ryU}u~&9v#}Lu&vF z{RM1<3|QzJ;R*Pr|CNnn)MmIROQ+F@uf9ih4J%?oOK^vi&d2WVMc3fBGj2%I`L@qj zmr>C5BwGB2ti^9? z%=#5Zyu-{Qs)fn748*RaooK|%RbFWtEF)gp^d=bbCfM|{=GfRxPi8s$EE)&~vO63K zzlNjbEXj^-0!(uK@RkH0S`+-L05+Edqx(j*ly<@)4pD(T`~XUq!6ATP=3h0t%`{n# zA#(iO3BRCm1nbD1uyr-o8}Ty7+cFu4C9;@=mHLo_aw|=&c4;)8MXAk#wJVLrGbv?a zyYcM~J`5-Fj5vv4o-CO>Vj5u*(biO=ga{jP5|Quw5`HZwAysT+g=mdJGC0vPg^?5< zObAD;_@?ksLO9N0e`BprejIz7N|!K^4&qA?{aq;`{7O$CzVTqP2)@aI8DKoKQfBrB z9DJF>LO6&OfZqbKCT8*#aNKJ{lht^h+8nH4_FEODu)_Bzu7*SO5leB-wlZamC)&c9 z=oGs8{={QOJfCMNlrg&>X)EC(~96k7XAW|Tr#IAlu{8h=!e!ZhEXm}kVX1dlY# zB^O62@D2dgCin$}X&4G0_)4W&$nj%enHQx{=PL`Nh-}^}A$c0arf}Hnswjo-aPa4O zQEJ2z;xahwK}D28m9JDrDO~L<^P&`1`^v)T%@FQ@gB=s`fbqYyDoTN!4*v1JXU0vx zzm@Q0aZHaGOYohJsTu{pUyU6H(eFzo>_7fFRYLe(X)JOu8@mtt4NSk|-KRXmbf2B@ zN5-Kj1;6{0w@m0h~9Rg}lo9|12QIHaPuFMuG9n2ArJsjpN;<45-bdvrsvY0B$V26N;1L7svG zU^X6P9RTi*Kbj@>sDui9W8TWoNjQu=nmpAof|bNGpAsJ)r*N0@QFZLnVxYnoZB`t+ z*z=N|+YsQ(tZTqoJDLZSN7IH;<}l5$LXZcVJw`b+AuaKThr>4&CLABCyY{A zI~&G2aN~Y$gR}mW{ry}!!jJKdaYlZJIHSHpoY6K8N819^&TEGif`ff|ILWgBZ8FTp zU5mJk1Ha+qP+u-4wGYE>Tn^ldTTCjiA*A9K+qi54j_d&#_mez@Aus009yVo^nbF$j zk(kbpyLO1Z3ZQO-?L`1`(NW~Vp&xRD-JlIxj=45Nxc8?nWF- z6vANybEE8=?;HPd#23aNtMVe$SY0D&GQ>$Nr8EMA(Vk|oa6wzLy^51`#|v1 zIn;-^0nXHiqsnGDO^ZPBJ~-?S!3&6~Q~V?x_Y(YgO5k?Io(;HTu$><4j&*;PzX!BdkT>|s|4UcAgS1M#cadGR}_oM^mu=f!I` znU!P>SrE@l^W_0#(!Zijj^7>SMD6&86|~(bhZq0;C~mCJFNO-?lF(<-xD-pwE|n6c zMjS)%gvTH@n0vPZ4%0Oha>57755S@2;&oeB7$3^`M8Ryl!CwG}!$7c?CSzE>6oWEl z+IFWv$0QpaqEt8zhcJUqvhlIa5%*!MybBjgM1^eqB9IA*aGX>mySiT=gYE9Pa-^N(YaIi}v99Jj!0R^g@N zZ&gPxJv8w{05V+;%|px^f{M5IsEY&Fwphd`k0Yzv`mA1%3WY_`q0RcBVjq) zZAxyg2ea1Z6Gjf{*v*?3_PS>0=6R#Dy=P&@nl=aaw1eRaJ9!PlUU|0HIQ!IIfsQS6 zd-n8}&cRZ#>BZhTe*VRNX-yJK^ZY`+alU7Pk0B;zE^A_bOr7$mn(D`Y{{Dd6{QkLI z(l#xelQUwpcTu+2I@}X=y=r-Zcalg0iWrw}nme29-zOumE z6qvB_a^-eOw%0Q3%_}JN(y~3Pc-yYbZr>vZN6E{aknc^(9zpS$K(Y4|EY`bsS$4qK z01qy&aIl)^)R63M?& z6^$M1uPXc1#dhb+FDtJYcFC;SmHz6wT!NMh@0QKXbN+v=wEOoO`tqJPiv_Tmn=f8a=+J} zU_zX5PE0JCI&#=poFIdSI_lYR6X96AQ3FN|8x=_~8IFZujp6e~7L6J=wWzdobZPvQ z8CNuR+|}Bkqy1!J{kA9UFAhtr zelJ2sbru6=`vCc!WfhQh;+6%MP;IAU_`9vo`+O(=-(xhRSqqo-3hj%{edx?Zms~bAVf@Cw zIrWT+69WCQDS)c;JmI%#EQM?)(uSF~aHo;z{2bF5&f`gPLPv6d7!mo-fc_Iijv>?+ zisj-;@mg`6$Y*nmf4BI6_*3yoafish&iJp0e-ihJ`^68$kHjy<#%M^U=O-5YhOfPN z8kvr@^Avuj^nTI@OEDZB`F||yl|~|;rqWN5-cfoN>E;_o#6L^=0ELeh zFBFaK7vfzZ{rjS^Nrpe4|FJwiBxCu;)(bknlc2s`;V(!xHeU#TP5PS(=VMdGKP;VJ za8T!?ROZjer_{OecyeqaGen+u)Hz0we3D6?CY~YYiu~w<;ii9s#nQ)!=ZTZWY2pI$ z5^;%mg?N?7YZ&vtQCu(HCEh1KB%1R8@y&SvJ}v)WiN6*1i2otJDZV2f6c3A^h@Xl4 z(1`WolU=gDE#?X53BtQ8UXEza6Zl(OOn#}ve5?(oIZvQZmj6uA+F)`i0>&>Fmx{|o zbKW3)jr6smwaKiJ9u@g%6!SCZ56CwR)SnjltrYc_#6O8|iu`zr;U9{hi+>ZX&1GZu zL&P)Z6WB(2C()c&@b4+z+FtgPey&&~4io<`dv5|BRgt#+pVOzahX4s8V1Td)$P%&u zf&>g0T0oSrN6E{+Dk4HyR7en;xKWP$aPnk=-axby|T+d@gjd{XZ^Fp3&aKD zQgOLhe=g_^(pQPMh_{RPi4Tf)j_8w;pA}ya_lnl{>^qYGEY_bZ`i1mgi`MsS0=9|U zW#@=Ck!!Zxkxl?Cm=pta*0?f+Bu`vH|>1st#8^2$t%UH z#B0U%Vzqd)c$@fBK5Cy)zURa};_t<`MC+^efMn~d_K0NTOC52(Lu$sSSbr{Qru13j zPt7GgP5JDc(tp-xt({Z4Sa$53(iM`g7OxZO*oE!iB-%NqcS?Rxd_;Uwd`5gp+#~)` zd`o;^{75_^{#E=&4B+vE?f9v=rY9=jNn(!JL+mFG5QmCqiQ~la;y>%dw*Fkxb+WTT z42yQo={=ISioX^g7k7!zi?4}qihL=V{qh&_bFogezHBiM!Q`{PY||v$Ij7AfXNm1a zzU55&{l!7z5OIV!Ml2O4i8ICX#QJkj`Pww?UnyQMZWQgD(_1A!AU-TUEdU;^X3P#NUd1U7Y#%i64ju#UtWhMZQqZ{MMIkW68&fEyXq>UpZ&~ zo?<_7fH*`vQye3nE%GIGmOo!yC|)GipKE%J^lQY8;*H|1;+-O2cc=Zw#plJB#8<^X zitmVj7Hh>%#jnM0#5g>2nf?;f#in9Qv5i=NZfZ~I`-p{Nk$9#!LM#zW#p&W~vHslE zOQf$5uMk&>>&0sEX3@@Ny;t%BqMg(FgkD>SRkGzo-P)Pqs8&!L~)ilM_eE-7AwS+;#K0c;`QQ2@h0(B z@m}!(al81KxJ!Iq+$;V;>!{RgIbK=Y5E8?HT_rycuC*m>jTd@It z(_{M^i=5Iz+0N0;mE2P-5DUfA#WTdwVu@IP?(VtL+c~_PGsF5;h*yf&h}Vl7#hb)i z#e2l9;;+O<#b?Cl#Fxca#5cr!A}8&zJx9c^#J`Kl_-%>lX(DI!P;MjQcFYOj+F^fR zf@sq5_+WUaekW)`xpDOOr|x+G^YgL>IPWE249Oo8zAh&IP_^ z>+n_$;HS5Ab+e6$m6@R-MaPSX1HPBA{D3qx%% zck|mXzxj6fp&?1Z+ClCqA>Y??d~K4KRN1upjH2YqX4Tb+De(9lULLG&QT3J+U-@dY zgv#XV#QZ>I61-3+rleH6mBH}%y2Lr->w=}{gq-fq;omH8QI&$WIc>bkO`*h4N+^{c zpVM|=4r){QeEvn<1bC?Ka4ezd#A6B0;6q76PC9mcekp8Bs0-2;bWw+60jFDP>#u)V z*DW~sP+Z)J$BsY##AE5m6NF!A-v-JJXmc$6!W~E4SXj*i=yPUNmVV1lGZk(m*-%&J&DyxoA=dqs`;-(@35QL0<*b)k&4-* zX&Xa5AIiZT<<9WvTwE8tWJF!?(T>Mb^4(Lu+#8SCrt?GFF(cgDWBoU~1;Y=$mmhy5 z5YJY0t_$>i$INJLU}m(=Y_;b=ZfGdxAHVluaMQlJSv#>e;@X6=LhVA{^%r6e>A?>R zdB1LkanR*&fi8bA;*Xz$jWYU$Ii%*dE;o@sMSD-^`2%bGEJ#i~e-o;R|1-YJ%`DSp@v9ME z8qeRLFNx>7j+j|`8Vjy+`9DWO7shXJS2KPh;NO{XC#f?{z`wIGu{~m9XN-wR-1v8nnt0kbk?Nj_ z&38{V+ew@JL6ILf3464GdAqidKN^RiYmkqKJAg(uQk+I{AXDF?_-k4^jj5fWYLJ15 zTg22did!fSVk&?8ZNTXpZiwPGitHozbY}iN#VU$}DV8E%+QSsjpvd1#ajJ(njN-c# z<0+m=kt?yK)#1xMD+^)=oYm9*9ufH)S6TpHerhE}t|97+PaxKiPML?Z=(k3~v{fSw z!xf|z?4Qc85nT+Ezb8woj$l!wNo{gPFVV1u~SWExxLj-)sbVnfc>9YrY%J=~D9 zbjY zdLg(UyokEf`Q!acT=a~m;Tss?-(p+_D8uG#G7Fmh(8vNypMu~XXn>wD7Cy5UxW13E z&;gMQo6}h60}U*2H1|gsNDGID(*l3sAI5@}h)iVUazrXG_o{ zGL7GXB)>9W-p#Ddx8jTEw&#(%1>8X|#`lQ8B7D>Fb8}v^Iw6@q=rMVrNiJh@U1 zUf-Z)3bAf?@m>xN9mZU>J7g;RlQME#E}`}Z#sph(yhN~ zc$aSMrlYUmUE23IeOyf5IOc5{bu@jv^+nxGb)(Gz?6v0B&ouM5h;cxDf=$5R$&oEH z4yc(E{|wL_cdPHFaG&9Wvj=W({?RA(6&SIYK>xbK2=79WsXfWds7Wxz^%Vj!1%WVk zESP>?9A<1a0uqRO5d2y5jNRua5VZKC)9JH~^)W=AiH;)v=4+$1jGzSi9!Ub$t6ZTmROE} zdEn({X3+{?&kDJHG)`{t)%O5ur#UU79`jK<8^yGh%{4qEhq8#P>i1bVnm{ zBm(F10_PyWLVTE!DZUU4Gjgsk1j39gMZkgzJ;U4!YKB}Pi1}C zWG((VSdzRv*fGY6XFvBWPC0?yJU5Fbwg*7@7H#r{Mu4UYmLwz->drNl$_wlmwZpTr7U+9 z0_Il|GEru;<{`ozALGWAsw<3Yq&?y|=-3$UD)_Wt5@v*!G5Br6jQ$Sj?lYN|2EvT& zGMS8zY2F25F@-=l=8VzEZVGljx5PhGv2Fn)+$`w1J9&I!3y5KQ2Li#3#T3^i=0Lp1=xNA&*cq3hM)pATpji_+ z>{xjb0w#D4j>nWx#{I^OB3LCZtOUE+P5K?b=AH^h5(Av72q8WA zo(e|zCXz9Zb}>E|0Vfn<9)j@-&&YCLzZ&3ige>;BGp10#`LGjLne<|-;=#yKg&CQ4 zaJkMo99rcFo^x?Um=XUVJ%`}%g4M?=?m}c60*)`@d83CD@CspFe*I%Jw#YzJh9g&i9}FtZC+$VHyyr zZ79Tg8%vcM@Ka|iX05l8H0F0`r1z+*x7}3z%sQBrXJ&hmskgUi*jGiyF;Di35OA)t zTTYeg`_7p=HvL>vWQtI%P z*1vFZyEsyDq}Set>dy!`huB`>DeE^xngpB0r6|2ifj{e97Uj;WfWqR zxp0=VW}_#E@2Gz4qRJw?yQqJcVNLQR!xKtOE&Q?2za5U$!qX@3!PGQHnJcDHCJaJ@ zPtbhxYpbs?^6#-F>;~R4aYOAVR<}P!&vP`ZS%Sc-Vn4BVPr}az0pI7;|9E=-ztz)o zWNydg1!WVB+vnV#{zUixjNj+y9e1dgUf|8m!lZL=ZUHAw1txHN z7Z3Fs-Sdmny~f!sCwXZln5jOuf037wnC)GZm0OtD3oDZT(Rg^i&v<)&)5P!heL6pD zgqU z1IZ2tDwVE%Z_VE8}XTQ&Zh!L1cxk4ugrCZngFN-?jlHw8_mN$Z&-}v*^7DEp{67V9 zelGJcu)Y!m+Xh6P_tEeo{Fh`uHjOvwvGxwbUL$Ng?XeH6y=jQsGKe~zk{xG#jKW42 z)ywxJ{-pfW{Jq9fQ5*9SkF6K)=r~yo{d%dl_5LEJ45H3`&5@50eQdp#LXNeU)t?VE zzCHepYVG;I%&0K%GVHOh?8n+$2Su#C9N3!&9s7lwW9{9AxGjUI)1ig$OOA1VY}##z z$J(obJ?~gQb(Ub9PGm$MYtPD-vHJhSeDgNeu%YceU-{qRuev>|Vt@D_?wRQ4=lHAU z`G|eOa|`E_4~iBycKL&+{g`@w^v32#CZ5M$6~1%9_YLay+Tl;N^mEN|pWFm*qe$kt zCx8K$O5%WPEFLG~ur+gkPb874tMvI|Z;{)_^20>_PCCt7?UJ9CyhnUT{8%(| zR8c?P6gBN=K%(B`C1*-Db5fD7hxA;dlkF}M|4aF1N}eNmk>pDx|3dP$B=*x<(JU1R zdu9$P_>l5#SNdb3nM;cF`g2I%Q~r-dBlD8vKa#Njw&V{b|Aj=pFQn(oEVT2zb1tFp$aL80s(dF)9zepz zAaRWJ6U3R~9HsNEMCQLp`sF0raV3d*)=9rn@)pT=ktp|D@t|ntIHFu<+_SPgKg@^S zXoyq3A+J%?^L~Lezr2DcNri64reh(|?p9YKCx>{(BOm?E0% z3G~e+cM`jb=K6y4lO^{T2Z}>Q{?kJHW5lz?$>MaeOk5%^7cUdni5tWkaf`T3+%E1E z`QJ3_=P&9ce^Dp*i|>oI;-})5;xRG6^FPYPi{?59IbCvd(XR2(L2_r&TmB6flCKa~iIw7dF)Z@sbZ*Dp;{DhP+Y;lrk z*K9an@`YmkH5>T8H0!ZzHLRChE#55JwHoM`i22QR7PQybozmO28g@&zYc;$s*{;>_ zfn;;tg`LBazY_T-IqQk%^$1KB>tBEQ+BwrZi+N%%v7b0VG}mF|KT~r3>#<#%VUE(x zYRJgXb){HOg}74Wi|y2}7sH}mo8d0Wc5Mc}`Of@Li*_xBmnGY^7~YV)UwmJz6+adE z?mX?;>os05HFBEB7pa-vLTn?RD0UNbMY|S5KgoO>pXH0iapHJ!ia0|&U$lO_FO~cY zu}a)5ZWFhQPl|SJg*PPc6FCEb?fFKG*L5&iOc$Gqt;Dt>=M1pC^}F3)@<4Hjc&5ln z1_;KPEmSJ}2%Ge=oiz{zCjL$24^J$YAf|{-#Aae^v7Oje%n?r(`-%g_kT_f%C7vTr5bLj@ zP~TrSr{=Jomy4XCL%B-4S-efG@4x#g>FrtyyCv@x_lxg~oXA7_Uy7X1L)rT4PM6$N z_uN18x?oE<^%KtX!{;>S};>Y4) z@k{ZT$SFe1-%#WPAc(}*Z<7k7%gM9wZ^x?Q7ybBid~ikwVD`5TdQiYPZ0?OFsaCASwliS^eY;KU=A zA1-pH5#=c&Cmc~;C@vE(6|WFiiJX_j{54{I|JC_%GRM1s=d|iir}|;t#kCr6~7u- zc=YK@og2LkaaG>+fg9tl$J~asSB2uLPS{upFW6NroVH18A2+U9>1NXh*wFeK|( zuK0CyokzQ^7@p}> zKiR^oJv|{%%4 zTTV@@XD}cB73Y~|?%H7G&4_zd@s%z-6{l{*`^b4)jwHL7qn)(7u3&3})ro5gLY1K^ z%mq&jV>bK#HnV2A#mx8_qwC^RvoJ&c z;#rW6Lu~nI%u*j+7g&XyGmtZ%KD%!}l9&)Yk{EnvuUnN`8wkc%VfK8(DMfg6x^%}8 ztn+#JljS?mizn<2R*kGn?5bKE_r}t?xMJ3WmdxvTEIlt+onMz+(CJvlaUHQVUdLk@ zGbW==8SQpv{N}UY^?WPi+0TC0D}>qcgAO@`Nn8vFbK^@xN!UhgXNps~dT(m=K5Q*L zTlcQ{lk;d%wR3z?N>%z{FV#7G=cR#--UfL4u5t6Pf=BDq(vmm0YhT4OfHk#Gd%?;Y z^k7QuuvGM5;>M7>IRW$AhoQfE)+J_UUD>lPzU#KS_?pJYoSdHMg#nu zwD3#bKMp0J&EJCFcyF&$b$k(L*eC4?ZX6goxh`-A>#;fxD`!*$_jS1oT5@{WAl zJFWIKQ_Hjwh%Ls+LE?oQO$A8j2|mza953ggqFuDJT2m)~pQhR>tdtx}s%lRq~Nyv;&d7ItC-caW|IMxs5nJuvf|a)>to~M_v4|Hpha<5p+5o zYcgXkTGk{#{lndL?U!@QTJB52p6j$6+Z8_!t4Un&z&spPeQ{jne1(4dDsXoDV{vWW zzF+Qr`m^8Vv2BmAm0fsTeYn?YSMp$Evq}N_^gJGKn9JT_@PU*nr?YeTj^&#(Q>r}L z-@i2!*ql;3F!jbvCwsx3gj&q_N3UVuq+m^p=C==Qbj-!RdFHd<<@m*Jw3H*48&dcN|GhtPV{)v?(nS z$3_1=$=EwZp+!Gq-`rmNazb+L%W0XBebfJ|zzNtlNo_D>qCB zi{?zS4|QYoY~6>p@T`(jJ0#`FFJ8UZ3;*GR1)b3=dPJh!2!;*0C< zUHjn)8P3C z{Qoez_QUzyhIpU=_z=W~^m9IhZ3ttxngt__ z^s14t41|&XW+W^aVWb|o(Q8OQ=SEsb2@5?8WhZn`gMh^zj4%*FT01t>hz;-uN!pVU zv1en5g{at1t))1aZ99W=`FCQ#r4^x;da|y&o9D_Si zau;npT!(rZmqK+d(i-zMj++=MLgaUdq}!Ysv!MAqG`L?}i0D#;wYod8mn6O!mi9XP%6`X{@e=^*&-5^GYX~i%kn+=)B2sh+vny^`o ziMyjFZa{`AnwaRGZcRL4P3*NM67k+py3J}#bmE&tes{9?W}2AdUS&;;K(cAYG)CBp zYMQWFjfqF2CT>H9yJ%vLyW5(0-i2sb1Lk#w8Ym?(lq8^S-R_~(@S8+W2LG0vJe*P2*H6E>?cvD!Dm z1C_;-Y2sP;W}4uUdJ9YPNPUD69;v^j37gd%sr!5rJW^Sle~r1%xgXe89A-%#sUBXQ zG#kv25TRlGmWF!zCqWC*BagAGm zAKXlL#P1vl)#MQnD z?hzJ0Koi%wPtyc1Lz`KWd*lH|*qys*!e%ua^2ewN7C%Z8t6i>=YD^rmCjM?sG-?eK zHmfl~cR|{aX1Mln#di1Z0Dn9*8!`~drZ2`Y!oFBZ6E>^akOz#3M%<7$QJjCQx%;lN zjo8J4+>Spo!tMBy7Hm$_h^AR=gt5TVpU}deUa}ULYAl?@2rUdoB;DpT7G^?&{}Q-M zxmbEL1oyDnf{T%2w%{5@xCM_Ql5TUEEjS1bKUl!!#I%eQFYSc1G4YMvk>>glXpd!@ z`a_BHOw-6ZF}NF-9!FtZ&`n9Hvig-f&~WxN0W8aB8U z{ijy2iCKuoELzjpE?Sdr7p=*#i`F!W$!oUfIHsU)WAxZF=7ar&XQzK$SmqQYVEven z97g&haA6se_vj`;1`O`OH|8o6_h1BT{TRd^K|8}!JREijv!7k(Xj-pHS^6G@oODR(4^5vZI89KjUHtqpKQc1U7W}>(J@3X1a=Y0 zs!(i8g{{+HrY2hHNL#6&5Uq8jt<_I}oyZ3_W~g=);cwA6YaLb9R78!Bv&M}+YI~fu zZS)bli1>SMjUl@eO9I3u+w`E_vq;B2j($`=F(w@ci~osfWM2%w3OhIi&({?Jj{sS z>{7dj*cNUAUwnj{bAs<)nCy)7@b%oZfhIbh7>r;lWn`7FCstcMBhUJJq8EAs9ds5j z+K&=EsL)!%yg!JhkeB&tVgmwONOJEWH^I)On&c4SChNoFc{>7Ei6LJ?!12NNiPj=e zP4c~2j9-GU2;s0M4*A+F^apRIn3G^rP%Bb`Nu4L(FFq#=*sAEWi^zxEuj%M-Y6x z!Fh%-&k@cT!rVqXBZwAe1IKXWbEl)&4_Up;m?|dBvz1dqG&SYTxzR6Q{6polOipt? z^K*{I@-1r`QyV~(auv$TgMY4P1GEt z9A;RL!;Uu3S$J`nPh80lS2F+1D=#GxE04k0TBk{o?X4Bk5)r zj^oLQ!xRhK5WI&s_8BQL`Y{AYG4xBq9LHrwKZ4+WJ=Sz84>PjL*ApDyFv&ge3Iet^ z80LNNM@E>R9A=*ynkO*MB3}8v!&qdLkN!(Plmy@XgVQRf>q6 zCOU%HgecgLHMH(#Tj`WA=O#4sUkk9uGN~t z__kqc_9LLBgg-X1AQ>Yc`TC;($0r*^W+C80kO%lf_U!18MPoQ*OHG#1gg<0aKZooR zqaR23Lw0c>X2_cR430k24@VK<_+zyspB&Ii`v75jKROOaa2%R94Us*1r7Pi;E`;D= zA&M{~9HiJo1W)O(NR%P4B66uwk0ksdj76Uqxx&|T2y@&rJITQdg9P6&L`CIcdsV=` zjSgq@4Tp1`$&bGkVZsbU^bLnIpDU1`@P{+{COVwQMX$T#?8s&d%8{Kz8!fN{I|;Mu za@#L+uy>=wdjy9!Z)UK;gzm};F<#9ldN(wId!UDDr5aXM8Jx06=6nRK){877;0K^4#Ay+mB?x;;<3UQPq2@fw6Vl4 z1T1UmMoyMEtayg}v&k}&@XwI*-EbD#5hG0##}cCvV5K6=h=1cbb}phk<)I^q zas;z17$Y^lp18|I#}WRuJLc}`9Cpl6lVM~KM?s=FAjT0qKf*G>QzH7CXoXPq{mB4@bOUqGJjFB!gazo@B=Ix;hDg_tM;tGt7P&Ma)Mq8;fuC zo#`<46qa}U;STdpb>rAEygs09_A(K0a>MpI!5TLs*+1KlC9=#$l@h$=z~fd$n318r zK6=6~wf7&`NPCjT<;#tno@v~kpBc9&XmlAm!hHDDdoco31p5kuI2ex=n8Oq}S`w+i zvV3jB4?^NuH>%<0m7rl!4W%ijsiO#9L?RX`tn$+cUPdBm_L>s4#HRCl64jtV=EKL| zCI~p{i?~`Kl7$Ue`an5`PRoIQ1g2+4s+yfCcCOVq% z2lCkj2QAK6#G44Xqp2{z3%u{^qoZvcN84ZolZ6rg4rN?)w2k9v+lhc03IFnkGcONY zjyBxN-ce!4n-REkxf4->;HGk5p>p%N0pGep7um6b9Z_UQ3F90ToJxT1A!Z>YYsAfW zGQ*V5^^*zK!crVAt9>=G79qA2<#m2CQG>uz?0?;n6sd{Eg9fipY&SU;0V516NY2NY zr^Kr&_85N=sY1ZHn%IJXn-kYO$M~nq$mN&E1h)~}gtF$d9pAeUV8~baxBNRH;6^I2 zE>PIMutS*QE50fy6(sYa0Y0}TISa~_MA6T^U}?SFtm-9%nCg~d^z+}@m?wFvcsef~1&GVn`yAWc`bCY<#60<|8`nfeSuWJ0xZI!K&rv1B%$auK{ zs(O7(m1?Yi!^EdL-Y~`NxKwML#eQsatC0RN0>%Z4KW2vb7~VL&<43I_W~{d-sQMS0 z#9})Tum`@kKluC6Aq4%lzSFd$m`yVOV>ywr#pcx8RaE^8O=7VFrplkV2WNGkn~dfc zEBvB}g|Oe;pQK_B~3+n_%q zlXi5hig(WTb~#qB-mof)jZ7mV$3InvOwExULe=*fwECEKvn2ls$4<6&P^G?&Rehg9 zW~ClO$YwP~(~L!)w#|nJhB_x!^?eqZRTg2x|L}o>x|q{w0AjsqkT ztDXPhLkfSJi8)nLRf>RYi6oy@5N{M)gg-k5@ROtc`7vfx(Ar3Z7>oADA686@Q%v#* zLdGMfKW3HjrBUONt)gN7*(tJB^PpOa5K|vjOAwN<>V~eg6qoy|V7-ekbC;Q<3+<(v zqM!T1`j=`}#iW?(wnKc(s3Jp!Djw7Ik5uaQgMsZ%mSonL3q4gji`LIo-(a+KWaP4> zZ!j|0sM4v=8nn6U8?^e!Zv?gg%ll>{!;UJQ!0P9!Z`PK^5Ww*DKP>87jODRlC zeb2*xR24b7v5@~0L1Z6LRqp~6%{AIKBC3jXAPf1nA{|Ioy$eP(SHxCS6|u!azO6{F zQC06;AI%l9Mb$?LKk(BG4fu8=eHVSsj~p&k@u$(4dsd2k>W8ZSfxz5NOwv4iAW-yk z&#QkR@V5je#hh&IubMH(236)qO`J^ZkDIY46Q+NTz>|rgc?^j3`};`pe|Ly%CRMT+ zv=(D-X_+j8OQQxOJwjvt4;B%Fsi?A5d|S|5+XR|B2O+v2JhnR2*u~e`aOm z{%(QSsKA?-Wxun$dD&j0EVDdv!E7(3piS$uF$utpFW^*w_?7(58A45eex1WFuK^QX zuTcrn!^Bgw49?6p=;%wSS@GHNUeb!$SmF5c)S)Qy#e!@sxa`fy_L>&-^ro8J@dfeT z0VjLWNH49-o1f*SW#tDtwP1@b%5K{o>oT`)ZHzY04hBr*>*TDUYhr5`4wdecG_xNdwJ_ z(*@&CZ`TD%ue1P5JbPmcypNm}tmyn~FC*Jaeja9DPb`DUI~H&Dj@#^AoZX`xblVfz zeZN_ZEZN?;EbpYO+&r(?@4u{gFS!hz)zRBlJ_C8TnC9+W_!`S47mP%~w-&G1a4y6( z#!M~Dqz(1XMU`1Sxii{ek?G~}Szg`3g4~`hy|)6{@60ys#2VV!Ub8H3R)P1xvNEr1 zhSzil%+#iAhSBTGHhWDXEqp13Eqnk=Utf zoPhYTL^33Vo=1iYEvusws94E5x^PEX4Bc(Pgp!*>$Y{cP?E$b=LH$=S7dJ|Nkvujhie!eSV7%t|m*< zFrmJ8%#9cCyMAg7>sellKyqPP`+<0obwDo^o;)2x-*LMl8h4sM=FjZm#5YJdGbxZ9 zpB`-D9_JqKHFKN0E!-2lR)MxIreR)me%a(HVA*`1vuupZRXf=nM(Hz9=>oXT(@>^8CqjXHJLxX!(EC%$YrRy0wS~ zI@wb%IRE_V7=AIOX3U>_J~H8CnmxI!Z2s&i3(H{k=YKGBf%iIidiFm(L<{=_*#-*c z!?Te2)X&E>emWxXP0^pq$Ng2m-t95>;r8yFk0;hPqQ+5dYUC%3XxcEOVIo1~)4K>y z8Ww`7D?Vy0nG=^V` zHec6%-@hjHv&sjUPYv>MpWBaZ>eEofwr^I<_NF7vZttszqdD_z`Hx}mWGjGndoesB zW0}eA`uk4D8Ry65Bki$5{qqB{?NA<%xUHA_hi!}L2B+>c^bK_OW9?blGFJbeSd+S? zHEd{m&sTcph>2$K@ZWRn$1{68s`1RojFmaEq94!qoE}kl7^zv1*dP9fJrwb!-^s8AhJ(*&ET5UKYXK!hdH=OZa?jZbI>x+fB&;~G{z@7m20OSCz{#bkn<(~ zt7}KUs`C3t90dH!h4t`n7s^K@o3%B0kltATE)9h2+a6uaV4mKv{2%i{v{bKPdT862}^+g_AE! z|3`7Z$l32qKPVoR-mYQk;!tIJV-nljLTo2?QhHahr}TxAi^S2=|CcyJJWuHth)bkj zDfx2ItWk;jYm{!+j=oRn4~ljTX}7`C}^E|DO1ccr^Hp>li8T9l~gILXb$lSt^z8kAsP$%RTU63yC^NH39G zDw;K0c86Aik;ecf=2+KPvePF&=fX-3>*v zmLuXVDPz0ah@F+*Q*s}1i1Z`H@!}+@u>Kv(vOKj+`_Z{{BZkm88hUaJ!Rgzlg&i)zZ&EdC7&ebiao`U zI8+=V@~>ptnwd;iO-8KiGL8^5ciAk zi+>T1h;`!ML@rdsb~hHAiJ4+Mv7^{sH22#mS0K4i94ekAjuGt|`coy(6z7VZs>gQl zr9qOf`jOX(oaRrNFQAcp(Tu!ZChNg7~udC-FV8{+jyuA<)?K zcs~q#DWbXGhs?#AsBb5B5zRlc&~x=Brk^Gb6N^RTD+cNRC3%K;uE^z{SiV9u_xq5q zmb_Lp_x;e{D4AaUa?u4Be_@m*okJa>TAlDQ@u_2#()yhpNK zTmM&*pAerGe=F`5`H~Cmye^vO63FjMt`+%P6!U#49ux6Dn9;|JX=1v_1;AL&___hR zNzN5}iv^;6Ug3M?EH_*nC7vTr5T}c?#S6uS;!<(BXrE_{PaN3)XV>6=M0R$FPmA_> z$N0*D-M!M=wfOf*<~tzVu8%~!7XN3Gxk4J#6U2sMhS)-ECEB(4Pm-J?+UKIal1~*w zBHzMiJzRo~{4a63Xr7Z0pC`FYw9iQul7A^)C2|cn+PhJ_RlHN&DsB_G$Q$#U=O*xX zl3x|y6yFg)5D$un#m_}96GwXqBA3OY+(bM8alW`ntPod< ztHjk}jkra$&v*Areni|M*7phUvh?=3?+wZO#P`LI#3SNg#lMOCN!W~2F-1%lt*?OA zlG}-0#T@Zuv9DMp4i?SxBKF%T$)(~Xk?VW09p{Pj#YJL;xKdmtt`_S*M{=<*+PhDD zSp2oPQ`{x)7Way;i*JkXiRSqdc0ZA9pEJLf{Eb-Ohd?^+$=RN!VtpS1U8L_W_7)4o zL85sMg&p%83XYY2qBvDNSDY&@7B3O65!Z+t#7*L@;+>*-E=7IYBtItZ6rU4c6kicv z6aOT>C)(%LPb6F40>>oV=T_@$prM}cGQ<{QE3u>4Ma&mZ7W<0>#WTd=;#lzlD| z`^1OEUyD1%T_TsSWqIq1;T_3;77vPl5xKxE^V6X+nJ8M{3{50A6SKtjBA3Kvx!z)- zSR@V;i$&|Jp;YoTahAAHyhyxM{DsIxcUj*Cu}0h?-Xm@menbUKJk6=Bk@!5Gx2Nj8V4n1LCj6$HiUZ^WyKsSH-u*{o;pWt$0-YLj1ev zHun29Sxgg~iY>&pVh53neRF^G5evm4afCQVoGQ)~7m62&my1`6YsDMHTg2PN`@{#u zC&g#Pz2YB4u13!GekvXlzZK*0Y6;Vm#dNW$*h*|GW{Y`ZAF-b}NE{-L5ziJUiPOY+ zVwt#9TrOTAt`aN7_2OpnX7Nt(UU8?mOMFrMo%ovgrueS-f%vg_So})-yBNfKZ|uKB zv7wkDW{O#2N3n~TC-xHii37x;;#uN2alAN9oF!f$E)coiJll7c+&rkUxk<0W`UL~#*H;6Uj7Llv@GyisxYxz@t zQRL$Nl;07#hCk&a;#cC|#W=k9$n+$UOZ`)BDV`{vBy!<@ruP%M(m&;5kqiD)o+_Rv zULYZY zHWTS$fazVueDP$lzc^5&&jIEiBhvK%?8IQi^Rbqoh2~; zcyWq2Lp)!+P^9++=D$p&69vla#jtpbc$ave_=vber0)fme_8y4_=ZSN3{3x6{7n2( z{6-8k_w&&;1M?pz(nAB~P9hyOP%aedrh)P(k$xE{&k*UJf$~Kny);l>Bhp6$APK>1yfju6C$Twn#4wln01(#z1+rNS_RpXNq*YK=~4p-WMoeE8ZYhiFC@q^!vm|#2q4iFfe_$ zNLLJ$_lqBiAB&%fUyAhD!2Bs3}P;MmBqXXr3A{{$W?km!*1Ld> zD7O^p&w+A|NN*05PZR0Bf$~_9UK}XT7U|4^@=}qm94KEW(su*pn?<^Cp!~2%PY#ry z7wN}=@>?PuH&FgWr2huWZfl=(<3PEIm?>t7bn3wLe34!pD2GHkbD(^-I7^%((#HeS zFBfkRt3-NyVEV%%eLPTpUZkrB%5RD9i64se0KxQQqL<~%31U;Rg?N(KP3$T55eJLI z#L;4jI8!`NyjUz3uMyXXHR2ZWQSnLfW$_j9p!gRNe-HksPgL_>Ikq3Sy$<|LM&5sd z&(fYfjc-!_E8?>>|NDKG=APWAhwsJor+t=w-Vv4I74aShQJ zXwAmvQ#bFf+rPhm(X|8fR`-G5(ori93@SW&a7CXDc^gAjd8>PG2(9k3ruW*M%24&x zs?G3Q`dJI7-C#(S1LNKvT>W&dmlmpCP&Bx5YIX0bw@%9_a=LV_Ec~q5%AD%W1D&Jp z%E24Eu79!l)Qu@cU$p3O=)i&@l~drm^wQL+MY)xIs-5neir~RCZOXohhc+iThaXvy zSDn9p_rYFQdPlG@P@8*>H1dM$o%SQ^8l^hx8ibn9?hxu8dg_=n(_O#spfmH0StILG zQz>smEHSkMJRjDW^s^xcQ$r>m+~D@^6AHlMEws1#wY~Y_yz1Qtv#;F8nrai8-cy@! ze5=Er(|FJBgTX;#>w;az)dl+uKa3xXLq(xyjs*s}y{`cElZA-De{PCk65=2s4> zE<9SaqB?OXe5S5n;pU&<_THGgDgVYZDqDnZZgzEIQRQiCZ>{yxPjCksU#WvCgJ^l5 z%Dn2+*EY&OrSeuty(*m}sa}gvL8UhW><`DeE5!?K>Dh)46eXT~^I+ zjwQ}SPs|(}nizWiSlY}6=xu1~I@LUbl*W*fXU5&w@cO5i4_-_&ph-h4r)JkN4=k)< z>3s(qp@&nA&A~`yr|DW0{vZYlg-E~#mWy5=Egt3k|({f?Gp!shZC*dDa+VAho=%k3THZ0Zx* ziB`a~@20LBgX`QrH)GTc3v~~7T~qP-r27l125t<(JL~rS$wg~IgW$o{+1W4TbUp>+ zrt97CSbJ%97`?yzmm&JvbT)Qe7u+-MwHoi)4bR@Y!5=@U-6K8P)BKj?wb zp3qCjoIyK}C1Be(z(;3I%|oI4LT6!bbU@oWaq9+QgkR~NG86l9Q|Qc4N@(xi-3R;M zJulR!s?ZsTBjA(`i=1iB`A$Y?U|pj*1M3op4Xg{6I%xYTYfr0clwUcpPi4jDAKrHc zJcKrKa;rTYeRCnq~FHJ?QJwi?vj@i=AtJ{P! zXUB&chPdauU@v!``8JQ)Qp%fn%$CNRv=yOJ9KSGfirB z|IjTDU_ZI=oV&AiXabJYQXHpF``l0#k5bn?wPz?TbaZdw-On6!202x^)r*{Up_hEdweLgxp%eO>x&k7)n4r{;|IgH>+F3w)q|^o>v={ScK53XF;(ma zY~TJIc(<)goeKZ5JR{{-I~^MJJrJ_n7x>QhdDy=Vk{JTtW71EcH4-?zCMU+K4l2{FNnxhM>2d@DS%LjOix^b%H0_VBD#n55K?n zM(3pcdwXv@`eE0q!POZ>Q>!w*a|KwTD?k8ydQ;K2?@vXpsT(tjJ~JM!d6n>LS9ra# z$LKBg$uCOo&D(I!2f5)k9}ca)^}x4TYdk%S-%wl$ z!){-u(!DDF?uTf+sBWXUh+;pc{+=RVFLnD<{2XEm-wt&PIe(g~O>qvQq z)fllD%}seeBJyR46ut@Sr)HvKQ@HY(FRq4|N-wIX(-Qx9PhFBLsk@QjMb)JJ(n#>4 zYNQ>M=tb2?yCF4z7gd~QpoRxk6XD;@DaWxYBff)w6H{)Fh|6)Kn9>N9`l)Ush<&+< zL%3^KP~?0@U*tbMDJMn51^6Q)g|iRcp^31t1tQ}AJ>JevO*Q_`QaYv%$!P4RyM^)V z`CdWtcO96e^oY1t3t(TSLQI55HMmTp*dQvh<@n&uP|WW1U5{b!GTxs28p9nP#;))f z`38XrBnP%hK&Hqi8!;?}NbtTGi!SdhXQaQ;k04ll9-*~Atj!IWoL~WN^+eS~*w1;)9Bc>4HNdxP+5xq>bn4m?o3D&gl zEi7t#q_yoQM2(L`$;byg2gXMc_USX+;dw;Z zWFz?IaDGH&Edm=!u0uet5Tku7kCihr)(8uhh8dZJfF;%+E06Dy8K&@xNrj>rwj|zf zA5szFB6RF!pqGh`Bi=_qGp<<1$N?kFUm9lQ69kyPVi`?S;LE)xE4zbR%$AbeHj}_e zFJE}9oRKLAaHT-ZF#7VPVMdntdSV>{4Usn(^(bO90&G53&d7EI<{@_=U^57H;bY}? z_cM?EY(iu+0*ve|-+{=>Mwnj~X5<}TSQ2LB6JJ;wW(2E)!9Lc)a-1yFm-FX^8Ob*K zu>`O5aBi?P%t)!PzZhWO<5(rQJ}z7yC59RK+~`LV0iF__2?W*?L$s7gM1UWFMqx%u zeEs{3;#_R>yhP3CiP<@uSZnmyHH_R~gtDb!M!1S*WT#Q!%mTA-jv|tbF@XjW93IHH zzdXJ$GfZKUpGM3z(Nbas0-Q9I8BaEAePKzMkmGg9sgOT&z;LqNsEUA}%^n2{Yu zKY@7J=ut5vpZI#hysM7d>ebaSflig245lk*e9jBqd_ z1)hiyIRzsLeNKeT=t6Oh%3mU|6Ul2$!iB*wBOHguFGIUv*p5kNw8PG{hNG>_j1lw? zBmU4s|1jbYJ@ij>=%If&1~~52<-hI zItFYpj@|DcL0_0{!U(d5j;XHRRxLq;js9P0GEdw*VCckwd=>#WGeppgKhX>Eo0EY%LM9)4sVGf3K5a0-nxWPn6aJO<_q7%8* z+;6Op`;NPf@#yXwVRs(}$6TbcFPH<(Hy<8?Jo>2PDZc{(3==Pz=y-yQXJE}|p8L0& z=-3}B&u2>X^%ct);cvYV)-7XXzAvm=#>i3x7$mOs_1l&)!h;%m!msn}==G+UNA`WD z`UwPE0_&^Ff2b|yk-!;E3`IcRP0JWzMR3*`t?z8s*Iwq9F~Z7`|8L7!{SpN10^(U; zzwUeMWIy`X&o$f18R=~*8b|O_3WHmgF~aj08emUnxRlxrMwZLUS@~IhMcc~R0G_F0 zmfYq(dj|oTx0+MuT$4V5*kz)8cs3ti^SSyw4pM?GN!@b{LL;Xt#`xc1tn4!aP4xLk%V2XUynq1X1kWdM-{XdPMrniqTLjOfI2{npOmrOKUol4TjH7$(*Ude4 zf0Jbd!7~uH;`MT#bjqy2$RY%s=LnscUymG3(G&dy-YRgQ^Tfofb7#{Nqlg>?T;M9g ze1Q1Gv>ZLb2yditq9eYrdV6JnK6+i4z)fg{K=W1LW(3>@ZU=TE80S{@*(mmW*&m~6 z1p+#S;IKoV2ICjQqYnjE8}%Z^y19{24W-KvP@Z75(ee;jInoH;z(otfw)w0@pR7ZO za~5!*Gr9=@TSu_R(Csx9?6Ot}Fb?N=*x?jTLBI|tc%_P@+0H=8O%>eg7fdTg5qh$z zsjv+=7m;}gsF9fD*LX)cBhwI|CwRT)FgA~ytiTA|d~UN57~zJ-_Afj23S)gNag~XV zBD6!XH7G(mrnT(Es}Rs<#3~aVMW~uh6?Z_m$JZ10A*48qoHZLN;xjLVA1Ere`su_= z2*xz(G@oJkE3NuC9nt*`K#<%&frQaaL+9om@Z&s#9P z6l)B3n>lrAw;p{=bnXRnr+4G3pry0tPMx!G+VuZ7mMzcE%{I%HPn{zeA>opweU6}1PEbuOz;Wfk;c? z88fTY`-Ltxy=CIj>P$>lhkg@U%6YCWVQ5?vb%DX z^Q0_n0M}$+l+~eYPS?B~h;3W7&*_@Oh4s_2b58Wm%knaZwkh%!XSHq9vVV7PWkrd1 zt$Q@k{)EZn#U)<|9q-HH8ZT@k-vF<&-1*Ve!Xhm z_5D`Wx2mhFt9z!qzVk>$`DxzIE=P`A19|IiZi%{@b8y28eUpfHL0%8<2_DAK84&RR-_uoFL*(x^v>5qrb%?JIeRy4qw>+ojkLbl}_tdR5I5w z-q5jA7xl+Z(n)+j$GGS=AKY>33Va>KN$}h3@6EtrV6P2F*Ln1} z{y*C#J9?yBE{<=!YfBxBdx6W4y`FspFf@bS3THu!5Y@P7QxV_0|zQj9x`#pfaVAwK z&&K_nHtj-)iS;(?iZ5+gyTf`}ANPa29Kn`B)VT#;c_NHxvuT$=PPF&h0N)oL?V$-V zd#e$*We{~9gS|{fwAr*(kQ42_mtc?QqHW(Th}$wW!S})Ev*WbcG=7OswD(WgE?(2wshq4hgwq70|wk^@#Tb=&T zKfB*Uv93e^u*c#X-n5Mih$Z@G=bZ6P{@KlC{TuzWV;08-GkD1g&)!MAY{ME!oXUnx zNW9?FmP95THlyz*o+0)VG3-n_fAuhaw8avU^9J>c#HHdYagDf1yi>eSd`RSYr=35F zyT#YVx5R4ku=uI?Pm%9%(awqdvv*f|UlQ{|e{mp*K|NII<0SK`Chg6Te39gZlKB*# z=~qa;O0w}2347}#-=cKmCldMZm2CV&Lf#?y56b^%$uCIeg8;VgJ@IqV_=QCI6r8k7 z&mbW;mVBDXf2*gSFPt%7AISqG^MMJ|M@u&TAR$kayg)SmA5s1q$s0xE-x2ypB|kx; z{GTNMMe;t$Z%BSm@)60$By)0M`BV~i>q>4SxrO9*l5zOW@#MV7<7&n~$hnGgV-c4F zBexaXi#&Ol?{v|Od&om1j}*s<{4J3Ar;4-0Iifiqkbaru72=P@)goWEp`DE)pV(2} zCYtjEvN=z{N2PyKd`9GTfaP8i&3Oa)4atYZ55zA-bG{&-IbT5QhqVF67i8;)wWZ{? zVr~Dc=50~rKTGL@#3GUJOw!&Y(VS0^FO zg11Y5pZI`i&M%}tA=#W)kYAR(UwljaSga9wQDl95PDJuOPSTubU`xquMRT4(e}?4# z;y}^*T{Y($@|8$GOEl*j^a~~P5i09jCSE0)^AP%?8ISqv8;8q&P;LC{7lwU)4F1 z`F;%RT`VpauM}5_tHt%=jp7~RFU8-A=6@q#_X){-TY~lcS^SH*U$lNy4@tIuR6mvc zxmequY9?&bZUeEo*ivjKb`nn)dyDyEp*U0=DUKH>iqpgk#Cc+wxI|ngUL{^5{#@jn zK5X~RqV=nKx8&{O@5JAWPl|l%%kq1~zl!_Bzl+wd>id%UY?bBA|5bqYe=3qfzCK;d z6q|_6#Z$!&BHv!8y)(r^agaDt93!4D@0Hp zQOQq>yTreUFNym_>qqr{$<~kR=aS9;X~3@eKMm0OPi=tjJnYxT;t%aV^<3FKU;MuQ zQ?FLJYsKru_2MtYyF@PU;Ql-&{!x5RH2=qe^j9SRU3^>QdJvXBD)I|E<)D}*n*Zm3 zzOm$HVq3Aj*j4N0+LkFLK2W`)jl~QJgGZAYLSviWiHQi_67t^N;!q<-1F~Uwlw}TzpFW zllZ)7{x1aW{hQ?!7ph2q)baB-}7 zt~gD+K%6g@i}wFTDkO7J6x(y1xJleB{zAMYH65kQ6 zU(`<|e_wy7T)4&dTR*60NVa}ZqmqY+#o}1;JaLLRQ=Bc9iHk%o4P$**i)+N|#ZBU7 z@lNqqA{Udf{39ZllTqFyzAU~bz9}9Q{~>-TelC6?CgHaQ+Dj3+FpY9E@ieicm@D=W z`-=U=A>uIc9PvD{wm;Mb(p$f%OC&E7uM)2jYx_sNS^C?>yT$F|@5JAWPm0fod&Iwr zuZwSphr|!WPsPtg4?mK#zmmlUVq@_Xv9;Ji%ocl!eZ)axkvK{mCr%cpix-LW#EZpC z#pU9aVr_q_>!rU@tnE+rUg>`$T0g3fN&chwoXC}o?2k9Zcg6R`PsF3*xA{+PilvaW z*FtP7wim76)E<(p-_(ARt>4rl$)m;b;v{jJI9r@Aaw#V3ze4<}_%m^nxLLeg+%E1A zpAerF|17>H?iUY=heWRZWc^8Err1C{Sv*B-Cw3Bhi)V_3;vjL1c#b$#oFUE;7l>SZ z%J%$NyhdCjTEC_@NxohDg}7b3Uwl-2T-+t@7Wa#9iPn$l2a>HH)6XS)_@STeOBOT5 z2I9%$DWdgb+Cg$Rv8Q;JSRjrP$BE~QQ$;SnW&Ml93h_tc8u5DZHgSuHuSehLPv&m@ z4%dMBFh=a}x$q~`t9vBAeXBp29=*DDHQB%2pUjT7s0>4}yFojr37!sie)sV3>$eSW zQ3oCcmaLAf&#Y_~9b9;<@%n<6H#r|xF5guk(863ED{37ni=6KL-CIl8BNp%cl8o)P`>voF5P zkG70 zu3MS4G2AV+vK~IemGw8KREF23ZyJHt!XrXnAc{vvhtrokNAS9QOWdZdT@!7!VMX+( zQTlIq?%e=_;|{NGmJiPrzrucoZ;hVv`H#K`M#sZL&G?$|R;S9nY1gr5E)L$9wBhk% z&lC@g=D7m@^=+CeXJ>P2hv4j{Rr= z_6WX7;1%bL$B!)^@U!jMOZZk<_N&K_U3=B??FZnUBm`e9j>|SO-|*_axsRt6RG(dN zI4$r|-N4%I{j2-+&#xYs5AXMI^z409*DI)Y3N~&}UDvOAKtK1Rx^Dk!w|{<3IM0i+ z?^8CWtq-qp`{dUIJEg#v$yxW*-z)r7b0##kM+ZC_2{=HDH0>UP@Qs_MmPQPgSWw1%IJ3Gn%IQD(GB z^bg0LbX^?RwCG2B0_#%`;fv#@X7@TPQ&#Rcw!HQ8X%8Q9(+jHm7o;8uq;hXM)&x4f zxW|F7jgyS8jSE^_bznra)q2|f`#~pypTse4IU4*?;g5(`H>On<9Q-o!=0WFC_&(CJ z=Ag^}LvtU%iPjjAr_Bi$|A6O-5BNKCFxmX9?1s$01iNAWcf79&xXqc_b4|E@vJ-7VyrwhIztCw^Eo!^@R4&$kBzzpPYk{ z0W8aZ{R(#CvmcK?bO$@nXOzDY2Yanx^Z;5E>}?+E1e0e&1HTvMC+u+WM&!bKz^hRS zykM}(Bsb{_w>#v}5=c&{Gd?Op$@m3xX^3lIE)U(0&m|#NeOc%r;_!Ph4nh)EO`urv zX^j8ey#q+*s-UEe?!An+VSKau6yo7vK60kCKs4}l$bBC4_#e}$^XB6<-KRqjLxDKn zMOA#tv}uepV;cXYEgX0z^dt(TFY1O&&xTkyeNhj*HM`4Xa_Y>UUFrm$3vEV%lR->seOQ?8XV#TkA_*d6hsd^jW z=9~V6Y}OEwF8?{G-i>II+iyBPqtMk`NwI)!<&dbyhp}#droKtB8M@CcWNJI8_)in? zxxv(OipEPwl&RNIJcpSFQoN7iZOlA~nO~rIH^speC!%>-^$~H4DDruZc{{)zO7ZU$ zc@1=jQRKqvtmYU9?(p#ta}djF6%+a2Vp;s*-%p)`%Wf9`2ig~3f>@spJ4W!?+b|fd zzZecXjKp6->o11G4kNur=@R4|$(-}hPxUWBP9trHl(m)nR?G(df#SUs&8m-=nU{V_ zMl8>&f~#l6|oZKci%IpuKV3p=^y`1F{x! z_s6qT4~Qr6$>0!#Vix+_1ngf!b~yi-r6G?We`#pQ$AtV#l}0vaV~$moX329A-2HqS zVM=#LUQ>E7BP`7?{Eci*Tbd*Id;~tFbgN%t={h(0mJWSnu-NMw}lo8h58IeXdr>&cEDZ<4pePom^oo`Ezx1}#)X`54}o3Q1} z5V*OY^J#)u|T4&*HG5a<=b|etwb)a9Xg?%lX)OsMD?$;3FBP; zbDBAh{7P(&BftBaUQU(tnlz9OFGFiQaP}X>NU-(QuqY*EmUo zA*3~Oy^ORpicG^F*u>MU(;SmA!*vJOXO_Axox%0H;LOa-cE8p&4>Q#}-Z@X!@y>bb z$G!0caNHZjMV#Nw-5lfQXMEZ@rnwE1oE+oBr%@Ul4rQTd8+V5Wf9}nk#qOAp&Dk^! z0v?7ZSTH-)jC!`Jxtf6;V!bWmBF4#8D_q#mG5Z*~dWGu*QrGbRwOZN)$7vPYV{~U; zI!(4tLT}(OAD_Y_j}0>$ZozyXL#U7OHe^GL7`PIuF_ESam_TxAu1P?q*cL?$tKbOc z@m&Tn#IU=EP zBiJ~<5fc&`VH)E%VnRYAV8h><0oxF;Xq4bQiuL^jr_8XUX|jqEYi(dPYX*f{^X2~J zoHnhhSU2BdbDeVue?9#91mB6lvg;+rM+skK!^&dfu!)W!K19I!@<76X8~Zg~hZdrK zv$4?y2S%QFrODsb`iEtIKcIyyeiP(%_ zTF%IAzOXdbMpm8BpRt3+J}SWMmg?LT8*r3)_rytrhPSj4`&0)#!>Iz19 zn`0U?vNCuZ;?*{hk@svOTFQ7PYBnVqiI`^iyTLej!z6MjvfsW>n|ObU!s{v+;Voat zL7muV-s0}EiHxwCkaKQja6)D9->HdrY^Z5-1tVJ#Y)ua%uD#z}!HBr77D^I2m9w{dsUv;ygHxP3Po?iHP_Z0TWRm=8&cU z4fLnB;`r27c4@-Y27hx?k;$Lh%9fg`jXiCj~2$;Vssu=M*bp&xOf+-D`3ygD8MZ<_&5RBUj zM(*+T_%s_Yd3zC1G|Y+_e**zU2_8tab2RC9{F<#5j9iQWHx64XLOIQ`j$n+VU5wWt;7Af*AmB(=R58Mx14W@SvfJFM+lzecJAW7Ky7pK68B>SGi4_#zhg}- zuZhi;=2W%8H@Q02@l<|Clg!Fie`QLd^6RHMTlIy=k$AyQ)cZRgn`fA{R>OIDzZk(@ zM{H^8Yn7(zL4*_ZDyQD<2JUbR8!ija$N7D53+5du5GZp_mTp$9@Q1m=k%3_@UDyD?8E1e-P< zarTYfm}cv;w(=6v?LKnOrr)y4b&ZL|!GZvY&=(sM$Q>ITToir+UV9}%z3ul*=OrKOZZ~pw*C8aFTrDztG z=a-_2F8zm&8a%4YVBZyt^MC$iN~e^UO!s?bQsF2}gkM=yKW~2dqy;&r`|f0>%_*Bz zHVN)^;4cP;|0~{QFfd}?WpGX;c$dL1t@!=T3_9rkz;%i@FVCwNG5%%7 z_w~{vUh0Y~&p!KX@6sV&=GH3*dYReHCwm#=;b~;|-?Ra*FHs^HlE`=wKJa`r9)M`2ccuLEXuHFq5dEUD?;5xsLJW;UAOvm+&~iN5!b2Mg58j9SHEP5c4h2uXx~? zp#z4Eo;0AiczAJKKkB=A{wSX^pH4Dj=Dx-22U|C#eA-OEos8u=-|yV-@(m*`!I#LS zNyP(3IrE1vEXQOq(M%Q-?PM`AHd#!JO%@YRG+9iXvB;!F$4&gk$ztND@+osMnM`;7 z&x^>ka=0=ni*%kb2eb2(3rafAE}45l`OGuBo^YCQ@SL>df=LUVnDY(e^<&Z`3{Uvw zn03M2lIannqT>+bIOhMqV-eqxO{_*3hI5T6rH*w?0_OC|{Itb*gbg4ol0eB5BsfMEki57K#!2gvCCY14A}k;{*6jx(@- z|1%=(=(A?@ym_2>kYBmzOLq&py$d^FQA;h;y=k2ZpdCvEE)eP~crX)=RyucNyZg45H2i9H0mz+HBeq$j8~s=TCCJJv23DuM%-v z22t~$nJ+V<&8Gbfa-zLK`Ht}g%l7fvvTfh(h}$xVI-~GyhW|igH=A}d6p8j$_VbSu z?P0fL_U=WTWjG$VZ9m0-rNfu}G^Rg{keKhy)($*v$2X=i{86+iquYGF50O70Lt^_@ z_lx&meWcm_<*!oMz4_MOX4va#1(0=etA~)#4bDr*cfh3hA2uIp&nc#CX^$^&P;yLX zA+TN^N471|UQGx5pD}cHv-YfPnWzssN4~Ur(u=j$*Lugbgz1SjQVu%&vKrsmy7=bB z&R$>VnKLmlJ+X&rk0Ud_d1hoK${ZQ-jXpsz987=sS{|AB<~g-x_F#PT;Mt=UMD_`< zFZ3bOC!TEV4yq-e@D>H%WKQ5>L|=7G$=C(^xSMa(!Czrh(cJsV2EGq<%A9lllRioK zIE=m`IG>TTMV>p9mx@0USBuw+cZ%D^--}O+e-ZbK2gQGgpNRhyQ*kg@Z>HE#Y$mo6 z+lkrY>0&=|sCbTOeUIEM`7N<2PBzvzOfSUZ?b1BpaUsNWWL|{Yu{<+4vGb`ky7gp!C-zzbW~B$$T)t`u{1}#rUP1MxuTE zy@|4UkPO-Q4uITV>Dfx}CHYLr110lX%kpC-PZ#N~oA#H9*NU6On@N=WmE>)bAC&yG z_@Zdm^uyi}aBgDz#bg_(t{UxGV zlMnf7rC%%FB;F$4OCsNc;^U%SgTG7pUK96=X3agy)hNGFswc@QL+Hj|6)~ci24$7ceqYnN_>CcO=lW2!on~wHhPWLx( z3y^t{W;>F_H1Q;{iD<41$k$17H?gN^eeCf08|@7dhlyiEbKOAt6v-uGxya`^EWb?T z5Au}xoP^{<5OTA~M;nyy6CV(Fh);+wh%bx#MRUDE`9qRF5I+--iTJ6{)Whe6tS>{% z68XY6_07do#SUVQc)EC|*iYm`0+#240&=1_S)3`(7MF<2#FgSI(OfTK=LX4D;;o|f z!E=vfbKOM#2PHoyJ}EvY?h*ekzAe5d9u_|njqfbjP2u$itRtQ#b`*2P9-_H!B7Z;0 zypLr0VIu#%k}_X)Cnt;MdJ1`tsCDS4qA`yivSayi2@S{JpqSlOh z$Q2K?|EhRM{6MrmZ2l=Z%6|==$@eJ`Saez2jEEdO#=ZRCqnc{4b>u1=m z<>E?ll~~(X%q`O2A>JeYT6|EnK4hMf{H(ZFd|f;sR*RpDUx=x=H)Q)V#FNA(Vnl2s zb{2EQUSghD+gHpe>Bota#pxm!3$gx1;*Z3ih}Vj1#SNnM8FQ!PUx^Qh4~vhBPl>z5 z7sUPITjC+{1M&O%hT&=_?$2o=mpf5DL+mFG5Q{|X6XqPr=ZQ1K3&jQELUF0MLcB`6 zM!Zg3C*CaHE?S>3_ey?1d|2d?EVlp8qV)mureyk@X8H%>r{d=#7jQ8>Lp(`rBDNIU zid@9S{Jli3<)S=P93!41P8O$&T=K>Ii$yN$qWn{_wr`g$(r*=iE&f*IA~2SJR@^UI zA1++@#q^NK^PD01N!<$0p@xpJ9g>vQE=$v21_MXmv3 z`Cp3$`H1*!zErFal`j0QiE`Fw%0S6n5k~#F;(W1OtnCYh z3&WWI9+3;fC_g50u@~k2qV-|&k!0($Bn{6nn2*c1$QB}3X;ID*xk`(2p@_@oH~K2T zv}y9AdkkxTAC5@hMr@}?V8PYHKhdo;MebxruawMRWL1O~t$=z@Xw z++MdF!J9Bx9slm0rW@T2jiWaoTH!i}9`nK*vJQKJq_xSrlQyhuTJNaa9{D>iFF3j< zC+b8Bj30;aM(>Ez&+R>_`iAt-p?+@j-L0Ctur)cFbu{=M>&-gqfgvye20<5Oy@6Q0 z!9%Np?x9_7qr+Zu%I^J5(xMHHx*b{D6{yWUG|(+Tjr0@Ia6{wup+f__4uw~RQz}!} zrmb-f-@43Q*L0J&c83#M9ci4r8vBwOSmSOyw0cMXn6HWgHQSViZ902ggdpx7uPn&0xO4Arwq$JmQ`;YtPHPi zFzl4iuRJ=uI%C-2>WmENbH~EZLmPZ)YkSOFnSHE2@&${m9h5!07^j~NH{r! zI(F{~q26Zuiwl!By>{<)(YxU%Bd;bn2mT&5!QaC~Xa8BzvuXle;Nzjf&1-^IWF1SY z$6B+Fg;r)AOYZiY?eFi|QSXoS9NbE}A0@jxwxTt$+Rg9_q~8Tu>A26WHjjb^8S1x1sc&)QxEynnc}0D?EC2VC*q3rLr-- zHzZ~64sT4Yni%#DyP>A=;&4TJ@}Z<~%8lNk^o;G%_0jIX9u#dKZ54G|kA$xVc;9&F z)MIJg+%rDglXNKEEsZ`1uMXbsl$BX4>m3Vpd$k_hlw9NX88{&6NFeEN#z#XPXAllji27fzz5XfK?6B_!*KA((tS4R=GnV1xGf3>;u;q<~RAWe9ef!00AM zJI_HB=B5yC_!a29aIhuo4hD;i@!$%i87~YiAcy$82%pGN5&96HOGBynygbwwpG!h# zAn~#g{RG1cLlFzEa;t&lB`BMO!OwVW>gADv)0jLmgo7QBDIDy9&y+%Z1Re;voDMxY zCh%P%JP@M7_r(y4cVkZK)6($~c+kY16!VMV4w>N3Yrcsc2_|B3nDFDiiN|~s>8^2H zkneKOxus*rxViKsT8BR!y8ZZrVidYMc@zuS4*r%}XAZ^wOnsB$c64prUqT%`@q@nv zrY=ONa~H)Z%U)0MAIxn0CH#gW?YV=f7lbLn!NEv2WSOox^&K9q$!l>oWV$YA!X3FzB`%+tOf2cGx+ngJBIDcq1b}rSdOz7 zDDuZeUpz>$eJu5JirF!-4hB{|t|8#B!5qqXW10WFnso)@5hP|Yfo=n{W+O5Rk@_}k z1HQU_IW#iC;>!@+fXio6#>8rC;#OiJ`s&-P4gLbnIB3ucn%IP}8NqGr9#>6(?1pDGP zge^4D+|9#aGCT4(OLEU&WQ2V|pLq3cR$W;-`HPYnbc=YZ0@@ivm5OUrg%UNu4a;WjF=sz&Rj(!`F`ZlZSXnK~zZ=Jj%?LugXGv43Lt4w8$k?c3impd|h<2&%d3G#G= zCUDiT7@u_2(8RcEXv!!3Otwk%-{73=a>bJIztD`cRWnW^%{UpM(e>Q68THe=jFU6Q zgzCA)ZYFji(9kg+5z@GB-)rNfrJaQwxTGnH`6nsp#$6(W+95wriDVTt?hwLtQIHl= zvf)61?h{VrU?I`TKzhtgKpL~tok4!+h63YBpw96w6Eai|mC#o~U5IqrATcv8;=HWw z@F2^&OsH>NCcwpl??mAw>kFY_yj`>}=L&Rb(AYXWpwJ}26GBs)fL@R7i1CDg9{2qq zm~O|kfV-Qox;@}M1iTx(Yde zd>H`_C0Hl-i}p!AdV`u^|Ks1@7gyN>!94L+#r7*Rq1~KI%*HNcC!tIxIRXKTM=z~n zWV|mdF@Hxr*%y{pF;a?v-6JkWFzaAfAac8}=QPA!r`2+hR{+nscySdYyAiO~i`Z-R zA0kp?gr$KhM)=4Tz5G@b?%@xgHDYN3#dG) zI7%iXKoyXR;!I!VN=0!6LNeZlGnQ6ExX$ERVDnI1=c}xx9T3^8Fup{VD6(&%x?C#T z)le;!iXFb+&s8B6MRt6w3GDm;x--Qow|OXre3i9?OlIS$vI7CjehD@Mh+|}3fT;?E6SYyokqrNqsUwd&3IfQu# znVa!=sbXX_8^1LcB4B_KlTCC4aUp_PTF%I&2)Hot2(3i0OUoJOfx@8Rd9lMpClc&m z6d>L}Foqc6zClmaASB_B*{~FxQT8^j5%D&TfWmC?33FsV_RK%w*KDg`WGn(!o^LZN z&ncXbfSn;YAz;bwwhBfTBiNPajITz($wBZI%O)}YGD01$fbZ56uC7`w!f9+z1e+~B zvBJDv%zdphk$4)xtZiq6vl^Cc6P(w~D)f&L`NHT&6Io~h4!K*k4iWz} z9!>DvMPC!!5HO@Fsu+2|*AxC}e6DRU1_;~AR~XSN1UndY#uw3Z2n<5NJV3D9Vc3hE z%MbzyQ#{tjPezux2xtni7y+4rRVxs=&ge%H>x_N@_5zWce0}`z@+~T}ooKY$^n7#( zXSIOSwTf(P_GN_a8miehPaCzly0a3hPh_E~$vV;=#Ba))ZL*I4E?GCDZRlgdKlH^! zSHD?bXMp2nr71Lq*o6Sk8jH!pzS>UR0cXJy&fWJTAimgI!vMDXNMruUG6(!~Q|)NN z?~SPmtYIOnu%Jr;45}*6M691 zI{{qkNnYX+Ut%xyh?jGZdBqOkYE5!TBhDdaHco4AAYcx$st_WaA~3@l<|B@gN$|!A zWBtAgMkbqL#e`;t`^?P1frPSVKRwlh|vyf z{OYK*4PcIK2$YJu9rgK8CJ+a%C(%b_G2`2d?(96fGc(cOGUXoMB zrZLJ~35A-$AT-$GUsX9d+0E{LQ)J?P+l~ETb?gAUbwHdw&=rBxmE96`y%O|HPpmI$ zuFRd0S^QTyhfC38!@qyLGXShR&R@dtB1G2W}2 z?JbCSbtB$_JbtESducQJdi5jTCE2GhDk>`S77g(lJiTb3mytc87|thpOt8wECJgk_ zhIko6+Ig2oI`N}LJFouJo^eajACJ5rGM*%!F`g(MG4W^1vvZMfZ`ulYg?PodpQuX9 zE{5>8@@zV?xG8N0g!{|0y>2VK%)DJWXhxeZXLs=~$@8)zEl=r^JFv?sUAlUe6%Tsv zI}tGA9d+J-A9D{Og)?LJyeZ|*)Y%u&kH-8_rPKQPUImP60rZ;D75F-e3woj(xn{rr53nRZ z(s_=lzw?x-v(7A=H=}&Ue5j_)UwG!Ud8JtT-g!=UW`R6o{>9xpm(A}yJ*NjW*=bk2=*9*zJvE@xgacVX||@cuAk;auYhqH|eE%p=6~DdkfV<*#^% zm^4WvCFWJ(M4ll2Ee8-7i|{8=KBatNne+YqKYU+z568K1_^v)5rp=ps@uc}vO3PQKvFi|H-nq~hz{Li`}URXB^r%>VcED#4#a9p^-TC3pkyZGI)jd$a#L z`IYGTKi#baTo&-Mi{G{Ut-EMp@6lR9!F=|fuy#JCaXSqmjPPywx*|{QdJ}H|?QLi$ zwQW* zt$cvlb|YVr6+mnH3B(iIH=;1!fAy7*Z4!5NP|1wC5C) zBONeSp=^wJ76RLsiNLlcbgMHN<1`AL-K;$;TPEs%2%i$1AL5(sJzw)*;Zvdos$zfm z8;?wU`z}5uS|U69gmVjhO7xBw_w9bYzaU;m+mt(Prk}vaM90if4)a#S!8-aiTa&p(clJ|%&i+>Xj zh#!lei|l09%V$qyy2$>Z+*mwC>?oSGz)0^ed4jk`yh-HmLA3LR_&%A0m)OKlNSriZ zDm?`!8RZO;^-DHuZ6Ti~xs%d+NbVzffaD>P`NJ^n8J`p=KTYyXrSqpArZ1AbT=I`4 zua-sR^_`>+@|!0BtI(tS^Ag7zl#TyUM+qky&C0MV>vMSIVu3|=74R{DJL66vpyyi!~z{mtSpMZ2c;*UD#nRKWgIlAjgL z+E(am`>6O(>Bd(D;>Je>@`Z3yMxPILNsNo8B=p8t1;@4IuFBV2`3j{UESZ0`L_3ot zU#RqXk}s9Kj6}Yxq`yx3^^)z{)w?O9osTH}DRH;>SEauqz9Id)lHV6UC9xka?p3*8 zArf*u$&E{o5y6@0~p`+Kf9MYO&v7D~QE zj~PED%KYpiF^pa zbpGg1@&|vCKk$>*XGL$x{X}zJMLOSEW4;lhxvoOCzMlBnJkuA5mxz~(e2<>#YsB^9 zjp7~RFU4PrzZG|gPl)C^3wy@r6UZkhwEvoDd_F-wDB1jvC*+SL^Nk7S=S@4AET)MK z#Kt1mZ!lk5v6I+UG}mXOTb~vKq#rDf5J!vWiBrUx;%w1ezhQ5YzbAeo9u+xpasRE)3NAdLTu(IDb;$fKX!=QPFY?uX z>br}5#J*xw93qYstuKp-lI?YWmSl6?huw0?_WEBT`A4F;4?w=vl5Y?R*U}-KM{|Ld{dhC&GjFwBe|Yv?gOB2 zA-T4%3oe#n`8=_|I8YoejuIz`=KcWXxU7cdOT|k>w>sHTpmC+7h8%Q#B8yT z*jMDAHnQ9hag;btH0$h;&fnaaZ?0G>E)`dZ*Nf}L+r?jqT)0F#kBGH>XY7{#1#zGF zckvzZJ@FIqsAzp?1o0ye>#;sG>Pc=aHWOQmr-@y~?qVOYuNW1Fh$F=@;zV(>$fa3q z$3k(5xJee+%7&OJ}N#bJ|q4`d`YxEHQtcS#bRvVC*r?E7x%2x zbM+W$eQGq9+)`{Ob`rab)~7~a$^FIJzBDFDKTW()oGWsD8tY#nUM*Um8rMr+FLD7J z^WP=@M*N+)LwrJfR{XR0qPSP&5;)rXhxmzjRCH7Q^dvD|%oH1o&BQihJCTd(Xuprh z|I4Ht6^Du=MJ~HzdWm?cXnknZ_LWhk^jpQ>iN6=QaF6z07Y~Tl;)kO3iSdPGewSjo z+P*Qk@{jsfBA5PAK3zOh>?aNqi^Om9jWI|07KoRKmy1`3E5$Y9_2T#Sov}mZo)Ecq zk^A$q$Teh?4~bkYM)?boYr-hk6S-oMavPBg7b*7?`-=TVu4iQWIPrXOs(7I|SLA9( z=3g#yc_ZcPM6PnAe5Y93*9I3qGW{u$OCKp)9~)fjNZI<>;F3qme3(FnMf?q}k-6-P z`iOYC*jwbfNTyE^xe$`_T#@S`DK8gm``X|#Nv7W{a*-tE`$Vpar2Le~#gUZvif@Pq zM6Q`+`sX57Oj52Ra)~76h{%|hB&YMchlk&=EhCz~#_j!F z<5ru(m8V2oZcJU>y6{&8fwj(uEq?Udg8UD|D*`vBu1nvLdVToD^y>qw!)xoUN#D?N zePzL}M>jNeT4k7rwM~7C_+fZ5H ze7I*tCd#!cOfB5lv~~5HW%Vl~@J!J!eOjS=#LY;l3~YSlh*x)WbW@@8;dv{ZP9658 zZdeoz92yqdSJP(ynyAyoIh?h^Y27qBI9d|TIT}bi{b*qDj$=>c-dph59=GSKX~8c2 zs|)(49|@#;AJz53@Jx|i6X@d{?zSS(gKgQj=Q&tvxjww%r%j!XJ3d^tqNrKw#@m{D zhYEw?4T1H6BY61HXM)qD(Cd)3CjY~?m)GC8F|z^uuw1_)yguv3pN5-8Gb&$owzPO0 z-ccTJ{JfJ^c?)87D&51L7l0RzlU9ej1uIiGCa(>5OR8+J(W|`uNUB%2G6GKqw)=(TUY$624eZe)$KIkYZqJ=(Z!WK9@0 z_pIA>Y|p`Gj_qmt?6E!F)7IzD%&AFj2Hm=6kL^4NUE3Ydzna#+y0HKAX~9kG@q+3B z1%Z$12G(vbsP+ni=$WK-!OG#)uk`jd7S;qi4Xz$EczE^eXQg~pH|3PiuR1!cdf+g$ zHjwdA-3+%6e6sW_MBPbi@y6Z97u?feW6FltoK}S?Yg0FDbQ%=arze{<=kVU;;q|E- zveu>CG`xCEs@pAasDF5P^)u-I&4-@xl6WjqHlyz6;4>w3=1%2|^Rx|J1Q75DzRVGFtac_9b;U9|^l}?s@KA zr*&XsQM6eh{iD>`y$^EIx{=ZDHG#`e>KwQCQ^&4s{h7&!H21Nzg6e*zM^1$oobv}1 zM#Dz};Rp8Ys~No`y(+x1-g>v^mrYYQUK{of4NSgdcjiW?WBx}Qmpyq1UP=!2PkAf~ z?$Cq2%4&j|NWeaWs&!^Vp8w^!D;<+KU7FR}b!=d?b);&zX)m zXS(dZryv7$kKR4JdR@rL-m#}!^xkM*bVl^$gO|3bxAtFe$41TiJv9L*ZGG)g!_o1< zft54U*5_dKK6z{>#?#J&7(Zs*ym8>Un*9CG)f6t{KDXSLxp803pdHxf(EZVRH+73H zy_e_t13b^8y%NrJw>R6&vpmpq(EzqMbmYq(Z1G!roYv#FH!?nHl0T}O%vk_u|7Dy7 z+|#~zyZ#2JgLC-)Whv|H!$-}a)%$89%RG4RN!{ok%1^6mwkpaQV#)5{p^VVrD8~to z>V%w{K+1gue>k=bN3}`xc^=RHthEzrd~HA;jz=K*jXhZ#Z$)h<9pvoth_O@g*{-|7 zhceO%qnNu;SG#3fkEEtgs=f*B3Wo;ZST2liz-S1&Q=`42k3^m8ZqU(u>5OqYnlGJ^ zcr+J9olSQfdMb2xG<@i(>%sofH3vCE7ktYMy{WL`)7-m$cCh98%ngZixp$}^ zEDwMC>J}%hZFk_y);$kq;i$IR#=iN<0gib}D-IanmgYJXbop%AX6egUNhFKH!FKFbMNc1w4A}_1c?jZ6Ik83Izhmji|ewAAM(06HHnP`yL;xd;QGg z_+auVCjW%$bFN{YaMFbo3aFmY9vbTzh>vN5kpV1Qm(fmq56OERbq71oXOupOgS}QT zO1I3x-q#_D#x5t^u!rP8IA}Z;2ZQ5K38XuaX1oJ+ha9>dk`uZI87o5cAiOlhXS|n( zuE*z+&?!i~EVKu4cn4xmcn9LM{p2Q$%OemU63Zh{G9OGQZFZkRayXceoVypLuDUQxw-z~EQ>N7>rIEo?ZeL~F`JLmSJ7=f7eQ;LI`IiKQcibE(aq4+13 zJ)7cAi1o`B&Vj$7@euj5c$RVUV?_SCn`NB*7?D59W*H|xM&vWoEdBuRm)#DrK79!d zrQt7(1YbhKC~d*d99e&1t-~o!z_-1uS7PEXAl6^p6<&ynkVv|R&7=)}`c7YKOVgzO#jEQ5iAfAVc{nRwR zrE@jgR(vl$|3a}0z2u7>af6(-G$#I;BA@xVqj<1epXA>`V-YL#Pt(ZbG|~h5EVItq zh?5{XCvj-5L*QC47d~N7q+uPHDnn{R7m=Sb@(EHON2HO>+L!}T#aZ+g79Z^%w#8qx z#s6W8pV|<`ZPvu%ccADmS^PY=3l6QRy*DzO+D9_N+OJ}9n>DdGi*9G}$?jZR{1>+P zPFwsai`%S;#hYP2I9A;U-Meh@CXG~k4kN66Fd~g?*2Lm0Y8GKV|UIZ0t2Q+QP7J$CsT3Gm-1_ zTDf}F&UNznI1~67upQ=e-(J%I2kqI&+0?Ylm(ORz&8U40xu4lopYdlZpIHmlwFWw3EgtfCF3qQ4=d-*8`cPJRr7`ALL_VmWu3oc}^jze&EF$*a!E zy>R&HzUtjr?!G2>Yoz+QeYpp7H{)ry8oBwViu)FSuQ%-It+KN0aOdlB$ny>eC6nAdqB|1I&PkB0O1W!nDze)HF&3G&_?vm=rUy%_q zTz7DNIv1+j(ivR83$8GkF?T}8`$fVP=6J72S@K#WH%Rs4ZjktBu7P!KbW&}PNDZw= zB>6eQPYv{lgb@&TgM`Bt7ijKe-+K~U+AP6f8Wqi16^=r@Jva*7Fn*k`bAI$965!)# znajvt1Uf$=d6_l|rno+~fmp>!^g zdPTxz5G6+vbfy3=F$62aitud}@mj~SR+=>Wxb3mlw$Y<(Y|BOri`j`>6CFd)JhE=7 zu=TJ_#Z|263#Y1{9(p;R`PdgoUIBLHz(}UIBVSK z>d))=xsxtKn2Q+kk8I%4rn>EVQQOa}gz(8w)jx1aa>U`qvatLL{= zB(!ZyMPk`v%pa!9c;m(Hgrkn7z*;|=U}U8+!pF%bzcm8c_`TpxtwWsS4;gN&V59~C zE)ASpy@y~*FfyOBwKJ9|M}U*0rB#e9_4S0`$_aLmv0}EEFCw_k z1h$y(Afj4=uOY%&($XqM{^9G1OiZe#QbzcW0rs2VYX)#!vb2hk5x%|{7;mEI6Qu~I zC?i4azw4Y62IwgcQG#a|3=+8rY$Dm+s7Dd`2*wB_=AAy|A$c}p91=Quw^i6dMmq^d z^0wHKWM4mmkm}qN8yS?JK?pgcDucz9LH6$F2#I+pPe+%A9ArQ?#@WT3jkbb25EAoK zegVPQJf||qms&Y}S-At^JT8f4HbCA|OGo)W1lu+qG#-`2ay&2*ghU->{@ICb@1=1uCKx->y%UFVv*{Pb_D zYnQQ&V?D;Voo{UUGWVk>L8k5Vjcq^u+icUTfjOR|ecMrE3&#L5ZA~?{eA(Jcm@u|f zaKJu>fC~%3u?wGEORE@p$Jf&{7>^O0{18`|=m=t^iH;k=JuOZ-i zNAT@?qvz4=ik9MBTvx#ey8-@{)>VXBhm1EOPEowB0z6$%HIa^y4+EE0F~WD@AS|h3 zq?Io$tzx7d0typ(zJ75PBm5^PSR%$7efiQVM$Fe=XEd<`0q&s)-om0QmQ*pq7tGN` zM76J9T*dRS#^^^AJSE{xX=xQB4G>Tj;m@4r0>-~EH2cg54~_OYSTzH}Oq04GwTh9Y z2x;ig5ZuayTD4BCqJn2IT1RX((eVV&Y0p`_w2F~Od_8ZE{keG@Pw_T57110b8^JV_ z5l*tuCrq$gDtIdM?$_))BU?p%MQ56A13o#+VpiukebPk75dJt_7)ThWVevAmm z8rwi_Lx3+R!XITsU{lquF(V)GxnmT1Ay#{YdUL+iy!SJ{!R=(ZiOY%I}yHagDuK757?J)YW1n*{XvT#B9c`*A$MzGRLQ z_vtgHm&Ou*LckYJw~7&e`Wu_jkq4mV#U$Y5RFUjhdQ#-%#@iM&oLFU|=M#QMjv@B? zTH+rF_)1z)#fbm?@%;F;;Cy?Bg08ajKaQ>&oA_C!o%tEJQ$IQgy=ON5D6j+pDuO2( zZtsGjaya&+z%d%80xmyWRh-|L79=2r-Kk2Ki|OFHo^Gd$o#N zviDYT4H{%N{xHxE0rN&tDEHJV#=9e6F9_X4jUd;VQLtuJ1tYg0AP=DlVpRnr_ahiv z@VCnNI|!Iyi1!kbxceM6I1N`-#EEv0ze|i~C$lq=g<$=Oo;rCB=~`Q4j~T{xkv&?B^Wd~H zCPoo$5K?vIOPyv_luz}O3D&|=JZwe2niz(VSc>upKbhdK5iDhoB;#nB*?99&j9|_S zkk?)uX?UwG#n_|7DFNNs82jG_0i&GAHr=t*ja@9DM@F-8Y;qrQ9IR?TBJUwU^*U1C zGpXa^Ct@rk%lYSQ+&QX!K4rhqTcgzTO3JG%nTbJycqaQgioiIhZw?m56U*uT!>Tr+ zc;ff^ME$>01?}l}#hS9uxy(-?_&T4c|97gOJ>H+xzPqt@?SnD<6+cn`@6<l5zxBFNUpWIg`Z5$eCrgw^Bz&{}2jcE-f?1Gx>zyq{{Vro@48d=40jD%f^0o-^*w|-Qv*I1!#O*H%cgGgO14fGt*`xg;1BK3+rE zkHC58^>`L@;OUWJ7(%gc0J-o59q}UR&P~wIM0_>^y)#^la47;uh25-LB^4eH5 zYij9~(pe>CUHT6lHF#8)!E>k0UO4@S@jUsz-HqjfoYS*^Kp&Pn@#c`%AkUi}v7Zrd zcDC2R_hgwj%S+2^dCEEXZsmsZ@EHvKh@V{tQ&Yr`bNS)bVWR704l$UYZO|}cknUrs zuRP5vL)jrOW%Z(IUcGE@Mz+^5ucMcm?OmMh%`q86c_HtBGydXYFQeQmjd&T6Zh^K< zPaO`2maV--5icd;U4lkNyz)pVFT<}sEfNfvD%a3krimRZA1~dNG2ImlXE1FjKl<_` zhaY$sOtG$BN;u1FI>f6#q+n?4=Jcz%B^3s}w-&Bw)2v6AE?wZ}b6{()?pAMJw)e`? zY;TJj>5RyW-kpr>U7F`T?rsgg*4s zIy%C`|J|U`p-9L}ok54A-W^M449!0W4V;m8vX_#_rv5xoe#hdeUdDLuLYR-3a;UCl zq>a}l;_bXFFNYo9(R(wH9d3H1Y2SEn?hvnW#G9Gt{o?W!Uil2KVfkLP=?iqQ>s?Vk z#JhAnoSLdlIDTl#_=wjo;*DS7?QpVx?)|<3jrnUJ+k0k7_PH1x7#ZGt9OQ_Xjw6=M z&*6DROgMXm_kx$_4IUpz!o)>CNpi+Gzp$*_@qJP%;{jvS?Kqh;JSRp50ig7 z`HmmyOtWm(r6uK;%rAle&3V%<8U-oGiPt)&fBylaM)|Hcr_WnBb#@6_xDe&K<-!N& z*ZUQv2hSYivoja->%=i-C8cE(FT&(kHfPqfiG}l~Eu2#_x4dlP)G1{pv*CZYY~tu4 zVN?BmysPZXukv=`)ayPo5M>q7UhWOWwMkmp`sU2Bg!Q@|-gog%8ap$-rx(&`GfSpj6g#=c$Ir0;hR#I!9?gk-iSjP&+kA;G zbG?~?)clM#1!+#d9xyhg1ip10w-cgC{e7ppL%TbnI>|#*0;!>_U<3Cgw~^P_ZQ?d{ zPxe{_TDeYk*(Gzzr%VOQOMT9?G5F*yce3e4*U6q*R_0_=k^QwJE4#F0cJ}m=sS7WF zOWhgsP|C!oOr2U3I3CYB+USi)fpZJ#F3`PHc&#W|U5u zgG?AT*;C5POJ_}8SPrw_W22uy-rCxm-|n@_+MDZ^%7-sNW~-f#Hn^RJ5Jvd6d^}dQ z>rK1^#|^mI&Q?B&4*f9 zo6SesbA?H__4Xec;*Dd+*309_wk6to0Y6@MgU)W&o|P>V^*@Av(8kuVq3u0i>6tSo zp25Qp+=-iK&ZM};Gb1xm=E#a~p8wCuF@=W_&3T9Y;cx7r_~w}&OO$yO;+u!nuq`06 zPdI1LKj>HeefsyICvXOe#Q%@I_kgdW+SmSP_U!EJB%37kVuSz|KnYbk2qD=N>AeX^ zM*$;*rbqz0ay*cLh6D&IDk>^qSB@fj>;=?gM-dei&_k?&Sl;JZ^UTf|<@KEZz5jdf z`+nYmmGAnkK5N#@tUcu!_m~&JU|?&FcAJRj^Nr2jojM4olSp*7!nwVep7$Nd9%5AF z)g6ZOniz>)&Ty8<@y+n1;uYd5ajkf#xI^UFWm@i8w79n|C4@o*|wi_7MAvqs5EFTg1=Ade|XY4zK!ov` z0Eu#r$}W{%E}Odx;}c1gV>CHo*Ogsg@l9kmm)%}=7uiwS=aJY?hADi!!Y9i%+FYn- zA#H5`%fuU$ZjHD>yjAgch`iCue2{-YT_wk zIth20$VV<|^Rg@1n?%0B;uvuP2{&1sCoUAPA(4+4TFG_dM#bMM?hqdqpCgg}b@5%X zvKCjV(t8?Q{K7W#C5yGiG!kjk#g<}QF^fdL{vz+g(ypwnbrHj{opVWymu2E#6n>NJ zTgCeo{;2F{NR<16Y@@Y_@;;JnG_er>wd`^d?e;XW!Z;1F-s&XM)sfv;c5@QxTZugs zZnUqE-e_NeqZB_*oI#=;myjrb35j&eW#34m+AJ|qVc)a^!{5-H=g=;mciBG9 z0Z4OIA3R-lQ?ZqZQ>95475j>V#o?kk&!L>jvM&_ph@1nnz9r%n;x*!G(VYK~ZoTYH zqB##D{9)PVdAOVwq^pmnfGnd$PS%#X6!nUn0D*>@&rd zB5&U_UpFyR>?4}jZRVg4Dn)--!EW!eA|?~PFy9f5sSqVaf`TBd_a6e+$BCM zzAU~j?ibDZ9Q7WReN5zpm+isjV8e)L?j$2TUG`}rZwoSgOR>9{CH5Bwi@YPm^y5V{ zPk_x=jv2m0H1h=5eAS!bp2nz|C&1=Y6AUjA&3pm&R@uC<$aubUOa5JaRop9@`2ylU zlKr`8<_!q{M)nWlucCRm8}VlT0H*Rh4DtWG#^_- zJfHnydNaQOhsz!(P84T~v&CF-k!Uo+k^d^$E5%i!nTH^LgY3=X7Lo6!vmFnJJH=fh z-@<3S(GUmUkj)3s7;fe-;3u+;mN;zlemMA@!plTk=k+*|??JtFi$&r_@jh{f_@ua7d`;vNAY6|F;z98T@q`#c8m3DW z>xuQn46(J?P0SRBh$F;FqNg!BSM~z&MloN!RlGyoA$s$e-LlPm2L3l>zb*0(YygfA zhLOLB0iE~FJO*LaWbrG^v zqNn*eR`vwZ%zIG&EZOtKh2k>tN|Emev!7Rs8^v2iPXqK`*$;}3icgE4Cg^Lj-w;0# zKNb&)hsAHjAH`op{)T6}lEf6TmRL`0D4s56h^@trVps9cv_Quz-6V0QI9tpW7m3To ztHgZK(*!M%?P-EODEm>-(*S)&wxVP8Da0IbyDOxwu^XGp$gHTX220iVuj7h);^U z#Xr*u{Y2?L7rzoq#S`K$qNf>}fD5;5M>VmQSYK=;o+Y*rJBVGxY_X3xL>wWWFM1lH z7s{R^E)%a5ZxH_~7K-adPg9iN&|>@V7atHG7oQaWF1{$fA-*l{6F(6>4brb=e=i;v z`P+u|hQul&6;~KuPxLfN&y;?NKjQcZ^CPY|bxo~G$M z*$c&`;tKIP@h{>{Vv$IB8kT>r_@MZx_>|~rp1v&mb@3hX1Mz@(Q2bi_Mm!<@BF5o2 zH|tLj>x!p}r-@C(7GfKbf;!CKOB^5$5l4&XiT9y!5GnJ+{GW?oiKXIk@nTCgcu1t&5!3%F zhNNMdD0-T#HD%Wq8;MQD=3+aslh{Md76*t!#L?pU;uLX)c!@Y)Tp}(LuMuw$J&o5w z*_E|k?^gJI;v?b{;%@Od@m0~&fPGi?hvKK=A@P{_omejZDu!{Pi~SuDtBbY8`eGxo zsn}d>D|Qgi6?=;P#6jXnajZB=oF>i|FA*1sOT;V0Ys6LJ8nIX`5$_Q179S8F5uX%y zi!X|=if@VUiqzj?e;pCO5q}VW7VWBTx%>jsX7L{Je(@3U3Go^6dGR&z4e>p3pZJ;hh4@eL zTk$86w?DZZ;>9GfnpjIbRct6W6EnniVka?EjEWRkV?CqAiQ*LT5^=tGg?Np)R$M3E zDc&RQ5FZww5uX=d6WXf! zx_FT|S6m>j5U&>hDi(;vVu^T%c(=G+d`R3W?h+|+$MtekYcRb`3Xw zoEQ;P#oFR2A~p0_UkkCl*jel;_7Vq*L&Y)TcyW$6S6nP!E?y;GC$19Lh?~VN;{DI%~St9Y|mEZ!#GDc&zWAU-2LFH&)k<-IRbc#!rt;tBB=F@%SB7@sIs z6KjdoD`b2#k&=Y8yNXmMq&-|bU%Wt^Db5z>i;G1H8Z!T1#I@o&ks5}KzgMJ`A??45 zuZnxc_r!hT=i-;*aq(v{4iD?FyabV=hqO->seMTM9FY=;wEK%xIix*Nq}UNc&BZI)=0lij*^?{fkIdL)x`O3J=n5DpF#Qb{COCg0u&U z6cVI8Nu+cj?PVer1ZfwFCE{)3J>vZ$g$9}a8S!QDb&>jljQ>gK3 zDoEB4sUt}HOp!W*v^$BE4y4^*q=F#rsp2d#M_eQ>5h*mt^sB@|alJ^9LB?+rae4QD z)VBmi>3-%oafUcc%n@_NW#X0Mwc<)~mAFRSByJYBh+D-+#hqe%-4Dazw(_?O+O;v? zCUF1!*|!W@wQJL+wMqKt-!j(6$B@-!fQ>ZyD?>Te2#Beb{`_ph46rNH`L7 z?#T?Uvc6fp;*re!X!mdGuLu@G1$zV4;lpcJM4kMU)nR;}!2Oy*BtKl#H#_dbNYRT& z0+Ddhq^wB3gYOw6guSmBj98IkzGl#MMWm=vR$qO~Ahn=AzGZM7zGYyYy(wCy;H|6# z=x~qP_i9-fdjF}LUWURy)W1X4v4hJKOH-|_rKxsXqcYw;`f8cA>eaH~vO#63v#QMe zdwHnwpt8ug*JeCd9@lsk@?Adz-vQ`Cwg3Jzc9%QXWk%17+FdM^!nC)bq)(tIZ$V`| zxGeEVeCpOC@wK22ZpZIIp0Oj!f_?0c&!Q}&V4ea6^T4B}b~sWRj8H4QPg(G+?Z_YA z^lDk#RqsWeqTNRl9DW_4bUD_+DXteR3LLq@c8UU}%kXuCVk_~8V>!)|S9Sm9`sJyG zyU*KQ`-*Z4>8j^fEvOfzKEJd6Z|4n4YZSe$JkWS-*gDePa*p&2EVJUG)mCk)m%Khy zaNCh9oFH6ML6ze8Rryvz{+POvHdaBfI4(cZ#xB@g8gUW}lJISWH_L*%hLnZx!51k` zvrbPe+E-R*+ZoXo(M{32qBYtKj!uleQ5M<%2HHQgEb_{0<@R+$@eP4p<;l}uDz~nC zr93%%Xjw4wMp%IF^x*yKA>|$#} zX-bd7z3hR9-<_L{R-jZn^KhSly*h4Pc3I@?IMjH3W;WVm<*$Zne3ha|=XzOH@`FWt z>r^d9AK{gv)b%UMgH5VqD}=-0BfY~9g4VI-%bmh1>ytMGiv}KEm0-6ScsQY6@W{1@ zaU$3{$+sU#sLrt#hi@I+UYeTpG`{?>Ick@t21iAQn{mcbmV&VsTs92j%%1r)#?G*^ zNZNB4XSNw)}vyabq%5nrrm_`_Q~Fk_*O*&>}A1a0cg8ht7=7SMC+RG zd{o&Jx4wI{b+mI7{d5sZ8Etpq`22Bi4dgk1ahDzFhaP+-`;usKX)t-)-WQ_bVh1D8 zDSqZia&i#se`9h4Ujyj1FQp`c?c8D2?j!M$1K4kFj%4piM*VkTtWPm(W8LiTE!Z=b zRO~TNME`2`8h2lLzC5Y%Z}$^?BcLStNF?>HBayV)u{~s5r9H$xm;1=bY__sDxA|Tx zz59-u=F0+?)=$Yl^!Y2%9Mg&q4^4{>GQQ|R>!}gLhY!E!?z`_!#g_(#?WwYUUs(kE zWQR=-$_W++kE{qcICXRMF??kpZ4bw?jV}!hiZ+U##U2}rHuu?{>F%d*ptpKD=&jDr zW_QFl27>YDemC=e<~*?Xyy!QFB1PQRnSXHf;Zf(Ute3HcQa7!O{{8bvk^czgK>hzZ ze67UY!=L&g<-Xv$Y6tg~wO!WnP}SmH2Y*e!{*d)l72bM4~$G_pYi;- zXdaFU2PyU+X9use!|;U8L|!Y@2Sw(EHXvYWXe2USZgl3Cg!m2L%R+n#7MlBO5D{Ey zzl99(o#`*OdA{Ut2`jkCz5@v3MHI{~?L0)=?Mw{_wfbTT!NpGGgSmG5v+*|yJFy4T zbtr~+J54^WYjXY0(na^iSr}dnB@sDaTh`+Ka!V(i%T*m!;DaNz90LGcc&tYAUkiY_lyPE zd1G}%8Ij3eO5U%j0-^c-T+awZ=8fkTgt97`&2TX~>6@7O51IpGCO@B*#Bb=@1Gx2G z#+AgRyJKc!v@wZK-@38)(&WQ4_CSu7kGKYZt}`vkX>>@?FF73-v@4XMLrp9vnV(jR zR}!NN9Zo@~^}&z(gp-Ov<53VNxl>YSsXr%Gh%fV@iU`bbMXV<|ZOUZZ`Cu^i=F1Ja zwWz>MQU?SI%w@(i0|p~Vj$IRhM6qQvd=OM3n8wvprjHNKAcFWh7C|4Mv_%9Fg>!Sz z$474wLAX^xsWMg%Jh(E1_`yUs;~hb;F6i5A$*ZVz1S@5UCY&CY=Tpx>HuJIytLI#56BZF6so2H_kAt)raq`?PO1;TChNUvzrv&Prz zkzR2oyrQ&`v7+E%Lm*0H$d#hszbHOPDjvRyMe$)@JO-z`uw4_8+N{5?F%?^ZDK^1j z-HE=~5s-LQ-Xi2$>E>KzbcSk}{vJcrfisEdako7W*k<8yTLs6pAUDIIuZU-jcQnBx zB?symAghE_2tj2Q6udK!kLvL;ePhsLc4BKBai0lavZREbhv6WALU28yMZ|94nz8{T zR|LV{`k*GR);2g(I6d#0B;yD^iw;5MB_;HH?S>O!tSL(*xz<=E!aSmdV6wFvOlY9) z%=0$6f1BQf_1_GK>I?Iph37S6`Gz z!im$|@FgYmv~$BJ0qj@oW&|Gwb*y>85_%4s@FB!cCL9}{p6=*=B+4zJhmUt+b&1|y z_%L`V@_|B$OHDWwU+KBt4d+vt4;$}L;srS9Y^}@-bxAAX<~`eNxxqv`I4G;;me7;s z8jDKk8RZ&Fd;*`ts1mcp4bL&UYJ9#C4Izq5I2uCF3vM_;VLWKhc=~wIj>|Plp2^s> zFcy{2Q^z%+iwjSEIP@x!;fCjww1$T-PavG&^M=U0q=cSPZaCo%#PM_BU1UPXbHwo} zL9~*11r8!A)xI5Jwop^H;X z=y8WhPQ*7%a>Bl0f}%KHroo{oVkw--&PQQ6!-GUF;SQ7Bpcy6`-Ea<*58+rf$H@2AWu5gaQxzyy7RW*kQehX^{AxEqeG z;Pa)=nczW$J8H0!^t|PUd!q(9y)hHU^u6_ImqNeH8#pWrt6&zc)^V0B$GtAg-85~U4j~;yn^661=us#ib1ZI;G2R-z#{=)2EZsL++#s(Mp04H zIF^)d5)R_a2xD9?G0u3$5fhDf2*H9;DB%`5gy50yLf&<%U*dAIbxqn|-L4eKR~;;NtM&D0F7&eHIP}Tf+RLv4#;R;BY#$&Dotl zp_l`Tjr69&p&tqN@C>O<_DW0Bg0Vz*ILOi3CG24~31^Ybd0yL$lxIcXjQ9G+gmZ@& z0|%{YViKGYs`Umw=20B;H<=`Z2=_>uW0!F3?}v-C7IN+A<Y(>h6ElL~UZuYEb|_5ty#2-}Mpto^ z8_#o?d*W(oCMCzvU6|_-K{Ok4An4S>qZ31xw}(SKm8<0*6)!g@fA^?pX8ddzQdArX z%>*DHp%j{o;9TxbA;){iY{yz`mt^WZ?-$YJ?0g9v+C*%I3*q=qWmNh(XO6cnvy3n* z4X#T(5|{uQJU~}ym$EO}s)`V=jj>YLi-mBpQfTnNQ;~<(2{<&0sD*ZWjiR6H7E@HE z!S@-Emf)nuOG`gbQL&n6uoEh3^139J1nX>;69ti%OyN=fj~I;wIxALbzKO zvZL6fAHjvtd5e&P{)2G!Vdq*uw*RqdgxB5vQ$ z;s41~G8NA<4NsnO^{|jBl%4Djht<8kb@b^VPQf}B!eMtKHXH9S;#oJ8aA$3pPqy(LBSAB{+X&CKPU#zW6%=j;$kku*YWKk{4Qn8fo$H?CTOXo4@QZl|Y19 z((o5uj)iS@7ydr>FMj(LY@2}jDq!G0C<-{a)3_;97mS;7!GfvHXHJ>gylqC?jMmND zwVgCGcihy;vu5VZn>r49GtH+@p4_}`N8_Dy@tmp6DRVP!rYr6Df4wSSn^qY{m2bk7 zsnaf)KPz_vMa1T1%-}YgmpcWQkKxBAp)k+v3vy?`GTSlEY*VKzRQPI6b1q7EYGybW z!JiI^IVUOiTR}4+Lc3`D!I(LDw2AbAu z*t}y;XHiCT|+(~WcsF>7VQ z2hX~y6=dd6V9Rc;ojK{wDe0NcqV$HHTl8@@<#loPTj^k5=K#17cB!>BKU{VyR&w&(e;j96YfM2?!_s@=79#!l--?>@Bbw!Cz(%Xnv( zo#DIyb-?{gGXep~-MQjj_)cs~3x8ViPispOVLr*Rn9SBtzX09ug}o-tx~M1aQ&gz8 z`4s6Y)XI1(6nKpidCW5cqC z4x13|(Wl?=A=y^W!1;cuw3ybPDbi~~pE*$L>oceINkqw9DZNwc= z*MJ@a`V7F=%`;kL;mFyd*VH*v=U$LIb&9KbIw5Q5pcc`YvvQ}-ojGTEbpD*lxic@G zGw%-s3eAxPD{dqPV?AM1;woedW9_LV#MW!T@bsSPZ8JJ%v`KH>vQ^twty*Qdmt?GTbXWB%+(>CLCNf}67N zg1OV0w@z<95Dv%0uG8nt@7OWD`Lt3Oo;#y! zOUo6vL$CK>ug5ePO~1r?V`!f-*%SKr8QQ~fIp!8`##=O5# z3B+bGN_$qXo;^FIH(_rNyZGW+^U|kXJU1P!NY7T^rVpBX@no#R#dGI1{ZH5&Jn2W^ zPNqx8iNK%f(k*gY1SCuM->FN79{1_W{XbngGoRy~+%Oy_3}$hk2a*9`rf-(B<>ze( zE=zS^GKBM+l2$d2AQ&==jT9jljnc z<}F^_Oayp-#`Q(vc-SGfcyUt^;;;9uvn-3x6|-K}=heFielHKaR_A(_l}?WqFD@6h zzq~c);ui$MSRQW4#>%?^elHKa)>xG1YhEnw8pQd_+w3ck`=Qsq4e04jkz4Y4WUVXQ6n1@Rt%4_d>&0n^O3tkn7jb+-eBi%>zXz|jK7;dp82Rp(b z1lC4K4LH`z?ZdYDy4Bj%ISaF6pTf9`v z6IY6>#r5KyBKINI`-He#d{NvZa@;cAXX0V;nD~SElNiAGWqR}E4p>umL$R%RE{T5b zDfS}qD2UPDLB5f)$C0q7$u@d+u;-6_WNA`$Z&{TKKPsLOe^q<}c4XF}=Wm+5+Qwv6}fN zi8&&#H#2;tc&m6PiG15-^L8xlU9yc{4(!)uzomFyB4c@<%Kl2W(aAyjpJdxO@UXlj z66v{cyK(O(%{T{noTANR0BJ7ZfTzoDDq?Dxb^#Lva=#p9yQaff`oQbh6@II^zTNIXOI zo?AEj6VhcWJSq+phl;#a!ty4Hm36Cf6~0L1Q+7;$gIFNmEN&Fd{)lvU$-Y;7NPJ8* z`z6vnEBimHWA(GjG5aaX4Rb#QBVrA)j@UqKEH)D}#P%W|lVmxWqNisyQ1(!fx00A{ zyvRHAv@aAd5$B6WKNIoGWnU}u))Vus6+JyGKG(?bdqv)`q5ZgMbT(mo`c-=r{+3u- zx9SUp9~HkBkBdC8vHYO;XS!95mF`TjrPx;NES@X&7W;|A#nIwKaf)d4Inka=Wb=jq z+qXo#O1w^7B^upMq$`$PB5oD8iI0d+h|h{Ih3lYk-AX)1>?UT4=ZOQw5u(unh2PWvoUZUW;#~1EF;Bc&yk1-_t`*md zo5VZCd&CFDN5!YaXT(>;J>q+!ryt5EciBJ3#2>|SF^CB!E%l7oX`pF(7juy`s zr->Jef2Q+wgVOy~EELy^w~2R(+eAj~LUiO-2IiJsoq+p_nGpNO8`m#2&Ry~2-+ z{9(`W85FCDp57N9MQ407v6Xm^$Y;|T-&-6g4i(3Up1#*K*%ykJi1WqEMNi)gZ`zph zSBeGV&EiJ!R`G7}KJg*(G4XlvWzp03`dIcq#c#!5MF&6Xxt=Lvb+LiiSZpJ<7ki4m z#G&Fyak4mFoF^_6uMn>hZx)NiJH>m%C&Z`3*Tpx*kHt?#zCFP8`c+K9Z(-Wi#Rg(y zk*^mpzO#6qI8fyK28^FBE)*{l`33^x3&bLEqjn(l|4y3nJ(5M z#V--B5U&w$6!S&Cp~3oZ7q^KIicg47iO-2IiEoPUhzG=j;#Xp+ctZR|jKdF1(|=-R z9jpclZ!DfIwiMfooy9D%w>VH7DvlE;iqpl5#JS=EF;Bcgyiv>-*NGd%&EghuyZDf} zOMF(Wtc&%o!ao#06%UD?9@Y=Ce->?Ab7DV6#8k1ic#6nZaF{MbJV)#(_7Jnhe&Qgp zvM$zCh0hc{eXLyBOT=a3HR26ozIc2)W5wm-RpM50oA{`> zQ{-D-Y{%>3+v5A;C*tSgQPI<%IxhQXF^CIQX1&A|(bJ#eYh;W+Q*0r&5j%^X-c(d} zUvac}zBomkA?Ap=BEMb4`trmZ#e8v{xIyH5ZA`yid`$eC__FxA$QR$3{(y*SuhFlE zX~F?R{CqRKOV?p|{~=Jd;(A_-)~!3VPp?@1Ob4KKyH@QwnB;%118}qxTk*#_09A|v zK>GUlf(FqB#o<+rv+l{n8|2^o6)FJTziG81upwMnr6{~MenXYDfmQMOsjI6LHCX4V z0HowsDY`y0_+d)Xka|_tU0)|9zd=#_x;J_zX5oV%`Q5)Awj$MN0CZcCQs}G+)NN20 zkPbjK=l}$YoUDWbJXs#a+s#hkh!q~UF9Gi}N1z0dzOA^PU9dW87bhHXA`=d;PqvPg zE>9{AhPIRj;}%A(#kdKh{D&bRSSLYdup``(0Nr^s%$^{L`IcAJEP2J7OBZm4HL58%t? zcBvf+7wN%_Gx!GdscuuWXSSq+?mq@wk>jJN){)qVZ(z#zUg9VvC3 zfyZ$1_(&kpE*Kph8yypkl*WhG9S=@icih>(dB?*$vJP8W(Zk8n)5=4QmhI?%IIeqo zd8kdDs@6H~^kZC*aSyLM9>`gD+}>ZOEbz)xJ9-^X9&mbja-;O} z{x&6aKc>-gq$jU^H># zgISS{p$GVu`n0UTO)o_kM4kN`jt9Hv?6`bKz2o+mX=U~e^~*s7P600oNx##XhW zYR4RmuByx9*M*C!u1_eWYQX9w#DxbQzQKXU!jT)CKtbaMS7+JBoCK!;S{NHpV`##E z@+h>6)@1SB^~61aqR5eiU>ZgtMq=H~8inqvWl>FIZDimcY?)xo2Gh~v8pnfatBwaZ)i~~)z3RBLt-*=w zPh7X7$KgPazK4@C86YxM0uM^gVsBH!$(#I z?l`hCQuCODjbFp;J7{^`TQl8#$8B{oTK!r!+Zp2hpMkydQ|E8>6K0GuJ zBlx*!r-Rm6z4s(+j4#<&mbI)+)MajmDMQap!(F z_kOFz!M&ZMrH7n#DMg7{4b~<8=Gc>jV^31lZWB0ShoAYpfk{(bukqne=keGSUzCI# z2?gAvpZcNpeK;cRstW~x)AnZ{s$TpV6aY3JdW63<&7n1D^FDwLIS})}ac>h?@h8v& z$(&Q#BE+#nb76!GtP4C&}9_MO$o6mNOixPJDC4@QQ z;6fH244!5R4_<`0I6Ll2o3FKn#=x>dw<1MeXg~fg4Nb(~%R{`*yd=~Bk(Y&@g&(Q_ zt(bA8eHe(JguHR9A^ZV9Z~4dFWK;p-F?+V+if!H{3J04ZQ9>I21Rf39yiw%b3?uR4 z9DGsv(GUaR$0MOJe;dz_A2Z1HxJiQ-Jd3a%b_dg7Mr7gq%*C$4yPtN)0r<-`u2O?$ zCl<^GR2fRMGh=yIsmc>9r3+(cBB%;3z(7WTvHXTel@&C*G4>sr{N9CqF3lfdCiA5a zyB8DJMnv)zG<(zRNV9->`_SZ@GAR@p=u2w{lBG~&;5=F%qS?uXOxlm;Rx}`aW6b;q z%oHOs&_5Hgi!m0He_%DnSNugeWvE~{JDUC%%&Xh%MWc^AD z530Ix=U^t3f+tp8>nd2O&@vdz?o5G}f$?ldXfn>{GV9=hp5*trhHflPHo-M}Vt$o8 zkexMzoAw==yanulWZr9b&AXVe7Tfv_+z+fN%YM$Q>Se^5sy>3JHXB>rOJ=GW%!7oR zov%UhSZ4RP`K2(ku2T?gvM;2E*(p+1-AihU2=jRhw}?b!=iPaGgw2P>OcAFb+7yvN z4~w`3p6XswQ^bQ6MewG68jF}@|J5tvd9R4~y(0S8LlIt5Q$!&`)QSvbZ_OeW+pl>= z+=FP-iYMt|E52nBUeY?;Xv)s4e1yPWVOPOa-mC;=T1@u3^f3DXc&d9z{n@)CYZkNL zVE6N~uk*5R^|F7$>|RoT_94hRhS_hnZ}77J>SeE%rrLYKQ{79d>~$YSwkP3uT|dc; zm!0OQnq&rx>$mFeMhYI}KZvDz(xj?qQn~(_DBh~cp}}kS^-Nh$m{iLUfyS6(*reJTK!9Dg1dk!*~&V2zXP3L|<4?FkFQ?YtpQnPvIAw=8f zN@VA$#{S;smo`ihj5bAFO%IEBgGG2ry&ifH*?79;mp0tBN(gY5s$bt*E7xuX+ih_};Fc21x^4zH%Np@=n=O{0gE?SQAcm(;ZP7na}_(FxhRv52LC3%nv2ZHlOh)1@im ze0ZvRNlg)V@l0yfrML!P-1{r?x@|5nZQhA!cT2eT>r7sK4^r~oW;bPqNm&|8>Ds|` z7JL$=7QZHoBdr!3--8vhE&rxci_v3=J2TR!dU}$LBXlApS}4L|Bwaj#7Gp$CD(h0^ zx3VtDzm;`K`K_!=YK4hI@TqpI>Q(J(_Nb)Mrh42IZB;#hv0pvOW;h-LY^#u(N%rs% zn^?=2DUJcPnF&ACnG&1C&B=&*Y6;rUGR=bC$6@sMA~IJa!f3_Nb3GhIWJu0UekUR` z7p353ErMxWNf`Qg_Zbny(O3k1El~_2i0*K14*D|P2*Rxj?}?d~>JKMicx#mCWV|B? z)`d4;cji@8I)at5L=#RA%c~?JlVOS&LbNvC;RH)Wt}S_9(XK!Y%U%hGH`NH1k5sGj zyo%gZ6*Ub(F|mc`SiDq6xa}V46^=4C``SIyE6#*hlr}O}6g+GSUa>ReYSHgs6dxoN z4`0Qi_^>Y?d#t;#T`Sym+Y(zh(;fa44`MKywJ$`{c5XMX%Hvy|>ho2x&Bn2IJ)CJU zcq1ITg4hCwQnu#NGXzEA&D|w{O5d87hy!3ZIFpE;C*klSHnH1;Uz%4!&kJrik&6~V z|ASa+)?;a22|ZjXgmazQ$7~MC6+ket$#_Q-55t*C>3P?Lk03rY;S2JNW(-F%Midd! zRv@VxgB2uF;Y=~~m}eMJE7=SVX$bBFCJnn$y|*>b+w%TRn_tmoTk>|pIAHp3!O{|X zsB4AR5VhbOYr&EddK#JVAq2(0pw*FALQgk0{6c{JjkmXnx8R^z5h$UDFVv!y#78C^ zub|Syd6Q!;y1axQ&VXPnEun|A2^e`L^q9GUHHw(!hA%0h=SDbGM{G0UOY%zS;iLfJ z-vPbN_8dpdfWyixEurT|6F!14KRLOQ^lUNV;|TsL!5ZY1(8IBTB8lgWcNAgf;np~U zZ+T-Ci4(>3)D0)xF*mAWoQ>k( z+HDeyBVK_sjirZ!3ymfA8}D$!9cANiF7k%cmOKt2jhiib-nc;FDY~UQU6FuD9boL;^-M|oDp=Xi_A4j+w zc!^z7v4O``95T#S-GXE+{z;I(X;3TSZeg^Bo;_|jpL*gE0h`C$l6WI}RbJ>4ybfllm~qd0w(qb0}^v6TnmS}0Jpxom4|W* zbL%p(x0R8Y+qfGXwg@rHc!zS$Ho-A5w;i_|{iM5{hJFUGyP7Ra&^ohlv~#30Daqee zD465g9lx>je&v+rhnh8%Df3OHp<7~^hMuf=^YhFaTv7bslchAjM6I#J2vhtBX5xdW zwl$XfncKXvUjE(i9Du8XW9S;Y_i4S)Nc{EJdJ8Uh{oPM%7(1&V#Zq62yowaw$p$Gd z^`*G1BE=8rqB6J$-jiYZ^DUMfL~}xL5o^8)%`u_X5K_a0x@mJwC_|dSRkIfP+Udr% zMtG-_#4)@#Tm&~o5EMiVqYzc&2>}wYFX^7rDFS>Y+bm0cw#vD zx-iz=J||n3itUr*TbCT)x_D=dI#!NvU2=Tu(i>Zkhf}2RtxJw?T`F&%1j}2e*eM!8 zD!#5kqMx2wFy|{26#u9cu2086yEmot(&)jeCy_I5#PFbn;-$#65K%+J4++T zTM@655#)8sAM~oWo4;4Jq5Qq7E#vQ1FC&igX1eR^FHU-!z#+)%FPiFTuXtZad#SvR zj`eD9WOIAfJq(%I(ZAfQUK4%2>Q(ORRd3yVz3OH3Ml!n4%joM>FQeD16{oW$rbjrf z51*)M+FUgmbKgc_s94jt_w< zq8=PGLxGFl`X*)^kpY)TEh%VrHbS)5yU=#poEJi6oWFCu@I&>{Jnq@o!l78=dN@-Z zJ)D#yoZ!R^(|=CNzJ`m#xgI6a%dv=!O}O*2kwkYmQw}{mexe*=1ROJ?UG$DIF~f)p zD`GgCyUE0iBRE&Z%#YY;yyFQ@_YmsM_E5ez!-E%nXcqp;-VBF?>~Z!K+DdeTqvWFL zr4s%M;y%HN;0st2t|#Why~$;!qTv;j=iwET=W%SsW;kZ_e$}Be@0Wm4Li4VqFpX&y z{_x7o5;&wKc+DiHy+wml_6j{M*3G$VMF_1jIOHez10AevSg%Io<%+HDM+@Z56kDj04kc3D?UtvgXG8cMMVT7#JgF@KQ z^tXe<;3oJhz>BKrzSV=gZbCI)o2I~XAspu9gf20y$>X+cZCW&j;I?$IBbHQbm@(`i zb_80qCXXJjxql0=+n2$i^~4IeL~C_01dTQ-lhM8s4$*{uLd7nBVsPMN09b!Gu0QY# zoWBIx=uJiwYy)#~lcc%91m(E=xoD@m(L{GR=0Z_s>5aeqQNlGLN5ElQ?#v6##m`Mz zJVK+t@YgJCI4_g=1h{r1;%hiIObdfFbM(!W{Buih-h%m9*f(>Gub4Ud%i?c|lh3_< zzcdzAl(k^-@5?%XLfwO2Y)mjnP4!LL=If-#$-l3uzA4-MKbW$yEH%|PJzwCPp8J~W zo1QQDgXuXB)^1Z{y~=SJh4XbZ569&<_{()whbA?6AG>f5~smc z!`!X=Y5pmC!xDy1gu~Qbvx3Sg7^{hSY{M<~ZO(?V;}cuJS&wfdF$m+%-&O|wH#F?` zzd_M5cR~9&GxPOlB23Qme1{bV{TDZzRdzA0816NdjpA&_*RVP;`z*i>b7c8T4;AiJ3TO`|Sk~uTMEquGGy8`nPNG zCfvWjpyJiUb3RY>aZoSC@yiST0>Qt)`3@I5VD5*DgB~SP(#ur76vtq)EZ+{m*=Vi_ ziXB85qzeHjIW>7dkpBGC#IkhJ$9KWTf0@j8(Z@HS|LD{-17*3h;@GK)L2BwrPEEe1 z`UdqMotjvdntGB`ldq|Na%y@UWxW9BJ1X)bE8n-)d5B)7@}=N}zKNMQ#5M(k_@ffn zLVTOTe?7(f$%z!c(@IY4WK*&GvMgTvI{CFT#=2Kta($a3_YY||IFu7&rIy@iwKc5t2GI1TZZ50QyG>}PP?X}!fCcGMTncz?Oyp}K(86e<3rlC3>E zwHQ8c>fCuPE}99^x!E%(x5&D9^8DFT=j6_7F$v0lvu4hjIH^Ddq+ zYv!a0ty{Hh)wur1a?OzD~Y)&VmU!7tGC_dBLm+m$Y{UV<*p^H*?+u zXy>|GvA@%g#SS0SkHz@#>BpK8DgD@Up&whji!(Fb`LPfS=gV7e$ zRznnS4Tg-4Y&UxA^G~DZj5D&UwCzSQ)64XQXlaJ?ki9j$>r|&o zy4Qd2B(OubFNk&MOD16Bf(+;M70%o)PSq|_@$EIrIXB(u(Z%`M>T6VPS6qWavbk0E zgjvXA3t5N>*lhytSjeq1AbMIeCn?>@9_4gPZ|yvpm*Ko*x!Si^=S@4)d2LCTGo8-^ zUG5lbD$2kY9X;LK50~^cy0^8`F+#AeP`~ZckLtI_pnkgw>bE`)a&8Vls24K2uSx}X z?$miuOty?DtSjqzNvm@v;U-GJO}g|-mk|HzeHz+1ZqspH73>B%9qtIoGYc* z2@_(fp+2452@{574|SDd{Q|ZB)q=U6u<3*eL;LsZk!88Evl957IVWd+ZY%T;(ApKm zjS1}fC3Itfm$XMe{@<$wYXpxuRAQU{H!7`_M00(@%BF+NpI91749CU=kG7SL+SYGU zdaAz?lr`$J6DB}}ms`h`?EM3EVnnrShvvHS&vWL_9&|B+=KaUDf_YB){p$F3Aio^$ z$pw!kU2MA5=;g*rs3b3JQkYeVrTC5Dva9wSi|dy?px3b86S9X48HkaT_Ak$%DWR}Y5yb1Z4hz-O2 zS-P{4rgFXhS-JNcps&&aW?6)>@dPW-;?*04jn{KxOKNv$7vTx^S_t8kjpZ>LFYS1F z;I-N$yIOVhbMfM4`1}mN2JdaxPN&aZymV7w`s=lNTh=B#R?m7_pI7ff_`N*vS{qwf zRysXeytsL={pD?%%11`r@)AL>yzAlj^1y37iSlCiJAH9i!|yL|8_LT;7~98(nZ5GX z!|yMz7G782Jp*s?;tCPqFE4$XyPhl$T^TEH3;fK3V$70!4z8b6Dv$9G!1>eF>1bJ( zxLM3!#?kE(0kf<`y4X`{2=R*E3BSL6P0&8C|Eeh+x67+=7^Cb8v%HJ)+It4bI=NJZ z^Tsmm6xyE(M@O$;L9c-JwybsT{tX2r~7OyA^+l-kyR1mn33VP zQ>}V1*&pu09;#Rz(_?;{TcKicph}Eg%&aw!87I-mY#^Q`wik^?F47N|eS^48+)QG7Y!SDT81Oq3 zzf<Rtn4eS#~_H*}#sFXjd)Sr^r5Cb~D*+W%J!qrtc|x zusA`SqWC$o=gGcY_DYej2D6-E*_&kFE&G1ikI8;g_6xF&<|gvLBb!&USl&U|--|)) zzFg00V!D_ib`krEqr^GlJQC#^%}bQCLblPmguPmJvC?mneYfoUWj`jH53;d5UZ!Qc zUX}fh?ENIh!Dr&P3jayu8@0^G^8wQ(i?tQrNcI`xISS|XNapJ$_EY>I(P&p9ej;tW zjXRS>JLi!IUnJYyABVk?HtJs`Zc@6t#0M1aX;bb}_{$1^UHn+#yvE6T@VdX@4~jn_ zI;e~Bd~liddfJnX6n>W2R_sW^brsDAu8@DQ?BU{665(^ih2j#$FB7j*_!`-T;ueK( z7atcZYev4Q^zVp=lM4xeA~;cr&voogG76c79`j~c2~vs5C@CH#i=CMQ(P!k z)_U|b9#<)!(Rjo-xSck*L*WmLPbvIm@of_Id`My(eXj6h3jbaJSSXfzp-ufNib5XUNhf;dCrm9-eJQTQrxow$)iJ-3SYi91B2xrp`|twq%T zGQ(jTjYZh|mF_d~I}+hPiy@pVX(y4WCq=BI@W!&w6x%DjyVyq@p!gx;ScOlL?P)1q zOdIXHRPlMTua~`wL_5}q>lD9P@ps97P&Q73COvjXLv!9oe$GQ!P8~5#JY8%ma-PO? zn93SP#lGTTk$26RZh|;jyihdr0K_kny+pi1yhdCtt`*I^0Qok_-Yz~Q?i6>4&xe2w;+c?n2K3)*Hr0-h$jiD>2_2=6L8 zD)tpUt?-euXNa>zK6}9O7m0b|6{4A^AbyqXn?*BULHK6bTg2_6rxm_a_Ac>7(bEcl zOZL0s$Kt2rQIYq~+0Gxua?#;@0O9dsvS{Wx2(K&qRPhY4nb=A^N94nLEH6{+BlZ`E zi=)Mf;uLYV=xK#7mhEYUUn%=q(af7rpQjbRQQ^0WJ4D{FX1kseJ+1IpWP4iSX8we9 zA1K_LKYbzlpQ4#hA)T2|f%rM+_M@02RugN94Ma~XyqW9_vAyVNh4Vf#+szy0$#^~*NuDk?70pwe@SFJ@=*{DLD89Ey z84%|8=5wQEPZXz!7l{{(3&cys<>FQ1jbgsIPTU}F7R~$*{`+M=Anp`*i7$$;iXV#m zMKd3S|A_4G#4_<$(c%0F{)m_=))r3@PZOJno_2T}*`9WIH`&=@AF=ZMalFDOi8IC7 z;sWtfak+Svc%zsvnt3JGV}oonzl434?8@`ZzbX7_@g?y!(bEopPxb-vp!k(oDjpYq z7R@{q^(S(^238eoiuJ`tVpFlX*iP&u_7Jnh${OOM6h2OzEKV15#9Z+*F;Bc&yk4xV zAxkIu}u6)bU05${&>-w-&U7hPo&5R z)BTx-co(HJ^IxR*w8Z-<+|v>tDSN6oQ>0cE>+!V1uabS8Sb6?itnd=?4$;#N-y!>9 z@o(bO;tS#{;+x_-qNgSPsqDkz*W&l$agi50+5Vsy5mUuFVw%`kJX54N7xQ-(dy2ip z0pbvm>Rn7fRh%teA}$h_h?Oc5#>ZtoVw!M|?;8Ks+EG6u%Nn zMP5cV{UtUM&k(c3-r_XzLUD<>Ow1Q=61Rw3#b?DA#QmbDE&hXSPfNVAW_WA-=4E@^ ziNnNE;sWtfu~1wuJ}y2fQbCR7eIbVM1C4f~*hKWSwfo8*AkGqV#L61j+Z6tw_=fnl z_?=iL*1~U3)?ZKTAa)VQh~q^{zA^o^;>}{Qc(-_;_&3qhhTbFlE%8(FkobdmLQKF7 z7uHurOcT?^=3*TyTpgZ$Hf=LSH%y- z{o+5xZ^ZyEG_anKSW~PkQWcQ#ZN)BPcd@tFPaGzW5+{h0Md}K&yanP?afNuj=xIH# zmAy{fByJY(5$_kNRLJsoi!X_SFjl9(da7EciyiD!sZ zM`ZqvVh=G}>@N-$M~ml+Q^lF$CE|RMdW$UoI&rnQR@@-oB2tNw=^qkziO-5Ji?54s zi|>n{iigCn#c#x)MH{!zSWj4th-qTF*j#KSb`raZ*h^xgSaie&B0P_=fnNxKI2{{6hSv_^o(C{6&nb?)GDXNa;-W zYns?tJX6dNTZ`SrEU}+BNE{`O6DNz)#W~_!aj|&0c$IjaxJq0jZV+z~w~G&nJ4Jru zm+SSaxL5pG{8TIzzZZWJ`B7NruOe0z>xgM$Q?a>7u~FvhB@Pisi06wJh%>}l;(T$j zxJTV;Li#cpDzI7A#Fo-bY?&J<^h^ToyDGVw}rjaVp_h_{LNi1&*Ri;s&hiLZ(O z5Z@E27t8heO8j0tF2>`b5ymHp6qKc1U!;gE?N(xUF-x2zP7^6H%k-=Zr9DHWJ}vFb#1-Pz;zsdSahLe4NLgFv|5~J| zE$xU%6-&@Sz5;v?b{BK3C}|G7wsUD^(A zkdai{C2NVNiVZ~y@G|~9k&3yrXN%OyrG2GHom|>Ci?@n*h*ZmE{9__DacRFIQW}@` z$KubTjfaI8PQ_gEEU}N+U!*`T;}?q5$)$b0xJBG5Qa+dQZ;RiFWg-=G8Q(~xVlM4- z#O`92NX=Zvj}$4LOZ!6cT5+XFMP0@}EWRbaD^ft0@qq>|siRA~rr1VoFH&BY@fV1B z;uRvrb{T)KNOfJ>yF{w%(tcC?NIW1?W0&#Yi@|i)4vV;qX$5dC4nG4-I=~Q@;|+0H z$q+x!4RIJU#AY^37f%ygifzRXVi&Qu*iYo^xNILz-{xD>Uiq=-(eZ*r#>Fkt|MZ(P zty*4qTCKSZ4%8$mqkraKkENxQ)zOt|) znovA2?L@ug{4w<-`HlC)uS?tT*R&G&G+-rCHAZb8$&%>ELlS>21&bKMf>1Bb=-S!0V{PJge)7B;w1xoP=^v+|g#3PRF zG^?^2U$$A6T!cs7j`d#Qlm^0S#rw+Ac8$cbbw@N|;|izC~fB zTMgTk1;(~63-sBT{rB=K?H~6(lhpHYkDjcpDQerB9Vrb&KE;(Mc+B3ip+ry=hQcWXYhi#98~wnry>Y zJEHZXr$#qM*Q1vUqwkl6Q=c#2yK-Rkx$?b-29<@^zgWKa^g(5zS+Lu_UlvS-z49@} zehHZmloObR^rtiSiBdc1?$U6gRT{S5-`gkpbaX#PNpPLr)H>E=d2n3-tOhzwPu*)3 z_L#A!EVM0LxFU*LBF~raDV&Z{_Z)h|um& zZ5t|lBPsK6cIF33fp1d+`8#?Z&NACQ^RSbNx*e={ad&)OCfvpey?L(ai7Dz z`wTq%QMZI|QxY1SxbFCX!~F(?TPJ^;l5BVGb2zz2_p)%Bl^=(1(agR-wK%P4pVcfY zEk7RLq^X&e%x}?z@NwGZ@kI&i_-&G&@oB|XiugSm=SVa(@bJryQ*i5%mr?VpWi_^8 zEI1ED(>4aVEfRz4;?~EZN32FxoM^DXq93!~Oo_(-Gg@dE#lm(6;S0B6MYvorq z{?VjEoV^=8)FYGqb4FR5TDTgw$dCK8)!rqibexx-_sVOy`yime~|PjzA?kG&Q@@=^LsOAVYD~hV>R!+XG_>>^2}Z*x+2;o zT8hzbt?NBwZ&@fcWp#KRYEQ!mE5rypx(g#Mr4WDH{&dh<7cT5G1O14xvkS4ij$)*k z@$vP+@zKcINb#rJ_m#C>wy&(^E*`0#jAr9#)eXn0b9Ah-JN~%$gCwpCk5yjF&|jSo z?ybJE40{5M`{2GXffauO;rO{c?g!)Z2|Gj~f`A`#Tf>_)8jG|68|mJ@NpJr^j{bfj_XL{0E5RiMTqwmn)eYBOwVTCr|3O< zJiXV^+dPNf2r3G8SV3hD<$d9*$=x4$N ziadk^FNLl~hQx(!km%(QGbb)=*VYQWViH+Nvu4e;0kfo2JsXZK?4lQeM!-hy-~Vt;@ywFcJ29!RqmTq+-2u?Nu{ zOOplIgK4gZt7<+*GlUOYuSKD$d|JgeCchD%+AC&u#Jnf9U(DoF52=G=CLcnm$}i#! zWx?kg3tz+;Mr#izQMaLPqnW&|Gq-(@U(QpQ+c8VjGIF;+F) zh^fj?(HQFjTKp7^v0j9g+LeWlWUoxYq%1X)on*{cX!ehpM_^XPmugHLKjB#wU#l_3 zr7%+KbFGZo4VTJO&qlLc^COtJIOpoPrQXZ(wr_`d2d0SCAB~w-jn@#!VM+OenkL<8 z=CcmZB4JIF(6!%zZPnr+Yy#Jo6}>@0x7x45dl-?m&BN)quv+^egzyS;9WP~FjySX@ z9e6niE&8uQKOJ)_b>0uS?;Hl#!RTU;Xv!*e7 zXZt5F`&KVIFCm-k$C%wq>d&5ztbE`MAG+y`!C_X=L0_8MPoamk_kyR6m(-t~SuG1>FH>^FPac_p@vm(-vAYGl2h**DpbdD+Xo?A37{(bRqxJaxRJ{_M=kr`GIS zY(6|Y#2XJ^(zX1~qm zBOxX`uZ^18fAq4a)IfGGsj^q=j=@lfJg1nk@wB}i_9f${Z=`hh3)dbC+a0xh z_?{1j*;502?%1q6FSweO=ap5n<#@@oj+fM1c^+c;EV5hCGP47Ih=gv#UE4}~0jb;+ zn@tK{HFZnAD%Nkmy%PHnOT@PORA-VZ4Xr-aTi^hg?Ee}I zzm(EFbaN(-bt%977E9`Hzr|9u;^QlPM82B$NtNmq$?zkz;sYu*fBOLy|Cd+H=UU8{ zS6EUV?{h76-H));tNe`?d|J=#3ieAH>qT#K!3M{4>G$7b;UjMN?8-5t(P*A?!}nN7 zo<>cC$*w=0Kxp?7jCa4T;!nU|)KE|&(u{W~akd*uw1hKKoM3Ee1Rvyb2(Q>7C9zm| za9}}#p#(0ap@7v7=F#KUF_>`Mi*Wd3%Ut*%SZL;ihvoMonTacc!nT?ZvM@39IEgR3 zaC-PQ6~YNsvNcu-3vu&}VN#xN@evW?4mcFODKCJoU&H;)8qenyKXbiEY!+@Gwt}rB z-NJ@n3-28YCf|mG;wkYVoMSCsT0##iML6-b@eU`xgJXfD+a&W*1~v(bv&2z2rf7si z$3!^#Nj{MZVLyTorJAo}(DQ>EUIy@?QzRkW)f&sy;v<+)gC}ZXWKbLsNH^Zm1iOy4 zcneoH6E4x(81}+w4}c34(Cr#yDgko?-2MW`s}OW zXP^1=a6EinDU3GXDf0Tk>q>t?gmC1WT)4cGL*5v6GK+HOM>+qEz_C6+p-D7zZj>hkf1U^8#01X` zT$C3Y<>6bsaC?<7nR1YQ2?yog^@|d7GNLp%%DjNfGK@w%KOMM%qPbCe2E*Z2L2&q) za9(YAPT^-(h{bRSFN@N1hiA->(sPezER52#9u7GX+r03(QF`#?jX4o}O?c_TC_Oww z5zgzbcdZ&o@Z7}V5}f^*=AkFYgy$1^Uie(|6D>nc_#lF(u=&j%dic(}6BtBrNFd9n zft_&X5D&t`(-+~yXU02%;0f&p7A}m^L;YRc5D1>!NNvw?3FMFM6GwzT zH(PW3=a9pl#$H8{R}X~bnb4txH}>WRePeIvID~sQm=Vk1<>%GlxFJhB z>TsvX<@n+!6o@H@qVyEN;h2e~UU+iUcLU4im?}0SVP;`_^`T;1LzVn zX7UN$dUMfpW~+8)6r0S35G>nV29-Ux^J5$(fPhqcyrtgPz1@7>?wt;Z&*o3?)U2I|p^Ag0dfiV?N zIM^oSO^a8iAg)&AT+d%bQB&STFq7e4Yv7Qih}>ZOEBe~Ao#AK6uFRKRaak<8d|!6O z%x*gz#t^|A6ELGlY!>omUi=(_51Lf@wj6s#K<7W%o)GYdct#92)y^ko!y!0K@?$Ra z&9^N|yexzMjc_%L-6dmnkiT9NWsrB!16WJe!R|r-Za8m`PIeClc~u)=tCj&z3pm^m zb}UNF&WO_RE>Z==AUN~|F$oS6OZ?&$Jl^GKaQp%@m=~C@;V`Wwc$dTV7Cy5z$A4yx zj|+r`c5f4hf4uhBLG3Vnx{*8}oG7g9Tb`HDsnm@OnW0@s)H6dHKgDHp3nAV+!>=Ql zA^MD%V!T5MJ}JU4VL4GdyYv01!-L3)mscD)kE0e`0<^NBXism3IkX`}H{%^Z^nk;y zWKonJUPe)*oxtL#c>(1*N%Ny{^l&nZaALFZ4k5hj=|GMc&T25AiEH89z>gM1=^5pP z6FgIJx7oOem(Vrlv>8NfG~p%q5jA*tNz^YSzGA%jgm-0}=|tH=nWk9=5FL%Tkhl!a z{1hEMyawVPR{-#8hnf>(;LH)x!-hn7ygkjhyvKy*6HmjL>eBO!7f!I7O?bS&3)siJ zWTH%hS4muEh_B!<4OkSV$NSKdAHOKYt`*JEe;mQVKz4K)$UdduJ;y0KH5lkj$FDct;RiwTcPAq9{FH|BQ&=@7kGLS$os41BuJv+`z0w(M$|WUKUv>c^RBf zR`u3comTW_c8|c}{O!#j*P#C?I3y=Hjl-ESfTY$j+G?};fdun-J1~&YP}sbPo{Qm3 zUijez`g_1(EEA)AQLE8_YWvNLSY7YtQ$VoBD4ytQyn_jzx71=rzNo(0#^JwrH5kaN z0h`u$lm`%W2+kM8xe0@PL3T!BKY$_DYz*hDBp4`8wzCuXYx(0NCVu8zlBZoTFf(?6 zzZLd9aK57I;Iyd^XFp@vtQgMgF|W}iXDaa5vTa1aKdo+THi%jB?qok+`NRLwY?+5{ zgLd~!1o1Jh{p92i|3|ZB9)sbk-!yq-Yv6cCHC6 z4k3s)SX`TJ5U0Wn3S<6qD!JuVU$kuTMf`VVnxd~;!BsyU8GZ>I?(0N1IG&j#Zx8-6 zlSy+-*vz@47au<}IZ?eG4reB>KyP_oTRqNE>zk|2KpVt~3XT*Tl4|4C$Znizu;Yfp z6~c{z8wY1MUdiXfEreSN$Imc#z}amFGJghcC)_TtAQNT7b|Y+$FZ>Yvd=_&At^)2j z9J|AAHjLfFKC#<4RDS~86u9Yd#c*s4yM0YRj*Al;JPkKfcs7TB^B;FI(gy=gQOf_S zWREYLHhSzNh**Yvi$C2{>-u9CunK z|3iMcG|NrTa_eQfnR(DT-s-*{$Q$d{%W`LDnlzb^rJiPlpcAta-9HC%-1HK+IMYqf zbpP&TeY(o%ALm*9<1BaEf|7P_>PHY*ULAfD0?VJxn&6gAaO=J4mSuHpHrB0e1fPdy zx)*0=pXUypFy~TtZy?JJ2b(#=JD@Uc+8F(9w~;ctnx7LI?=5TY|!sTwOOm}dO`(mf!nJTWs71;D=4 zeQ;q;cDG?|+qx6-GMZ;}Y75`0;83^E1owr&&@t>L_7^3>r{%dL>tZA@5(}FWwrgjvD!8=d1}e{ z;>pt|MoOoTEtx!H`mDD8+F+2((HoL+@SmA}xc@)yQb`3uKbRsO>7 zQ{^w5FvrA2h7|s%s{DlmOGZzJYX7)^)sX&{cC@Dt9Tz@E1DWde@PvbD8dYD@YX5U3 zqwzY>_=zJ+|K*C&XH|!u*{K7Dprvt;Oh6BTBBQ62aO8?Jft)5A3am-%k~y!Zc*26GW!R7>ra-n<9C3Gdzs zJC7bedd%d2!!L3Zdd?^=89%p8zm9>#8cF?9f~kphLiL<;oCa<~r;*dxIoCZu*whJR z&6+o@Wb_!Yq}bym>%;CPfvj<(OGXE>#>|3FHv_W#r~Ciw;>&0!zNW|NVImy2jviwF z?NsjqgfN|*;#E(_IBplgCBywtI`2F8Z5N6B#Sg-zYb{}{Hm*V{|KKQqr^^Qh>^)v2)bUbFnx-q-ixEm1Q zFL%)8co2Z~QY@F{*>d?=-R=W#U|X|5Ad?<#Hf}0xe|{bDbd?{-nO`cL&F?1o?LP1Z z_94I1^k}njd=Sx=pj?%HdFTtTYMS$5pL4KXB0ot-^!|$thph+9=Z3mmwrX%gS!nmii|1tgLPud3p z=(^Zu^NR(@;|~x03-p)SCh^U-o)_YpGbSGU|A+oE-v2TE;+4XliEsai{xZiK+l2Rt zZ|g66A0ny=FC);q*8DSi%NPY8eiC>8h8i?UF#73gkRUR#y59FEd9g$DvX`e%) zeH)4AkvO@UDZY*D_Of$icb9#Q>;ba*9Wn&T!=S1$0+~DisutA*5@AC zTf|2c&Sx6T*XSH0-3zi`QTzefe~|s5?7xVA7lSy_Sx%Tlezj$vE4!uGS?nba6i15_ zNaRx_yHxff*~?_#CEMyAKP3A<6#om^J7x2mUe@bX5_6t|3jd?R|0MgYI(?{55>9jO z&+9ttXZ4ORppAaMQ0%C5SBeqw8pZb)uP0FtKI>tAe9puCXUV>aM7}>3?^XOp(dryO zrugmRZt*4YO%nN5*Ev3>c%yfWavV68mmr=)Vn6;&FnN*4=l)FBPV6Rf{=x7;B+~Px zc5;GPUH@(o!{KfcS1H|kaf|qf;vW;A6L*UTNR;!g_>uT$#UB&@E;^Xku-w`t_G>IQ z6Rlp|B}$hgb`u9E-7s;CI8pI8ibmfU{kxbp`q$_hgKKFc{C$r+A}hjQour z9O}P-;mH4166x-gy^chDRQ4l^e_S>$ucn?DeuiO@_f*!up=h4v!oE;;OA%88lMc5e z!-&ZDVz__4c%3*=yiqI`XNwEOCE~5(9pZiBCh;M0tN5I_Tl}r~n)s&pj`*SYv3N@S zQVjAwg5yXO>x+%WX5vL+me^jrLcB^eUwt7z^A#D$MJ>#Kq&PvGBF+>`MLr8>dOi;) zZxinn*NYp)hs3SolcLq@{k7~D#69BcVs+i#!wNql9urTBXGHV60;nGz{h4|ui#5f% zqSf)pc**R`~nkpGAAWJ|p|@qSdoC z_iNO@x{mFo2;=cxF7^`ph~_>G|7h7$MDu$D@R!P-CoUCl5$_aNi0i}+qPdU5|FGm5&jghj#ytjPrN{EC1#12ikFK$ z#E3Xh93qYrCy6t~QnC8)9o(kyJH^!^7b3CVo5U@mnJ*yR>eHHe18nm<2;fUfXZ2}+ zFZ&PTAH~CBrT7=|lxXG^$j{+@8%z+xVlA}>H;F-Pns_7Tne1N#k< zZS`r*JOtrZpLVL^tv>A>*;b!+scfrH`%~GgL^D4@e)jhkwkZ5z(dyOikj>|1JpSiJ zF3+TWP<&VXKs+K=h*q!mZ?eA@`B|Fzq=+@ddZPJV2E;d!ZGWGkmFz6h{7wVXT_L-N z7!mu4`QlKqP^_+7Tcq$3(dySOk$tOphj_PWe!l_r*eKiljsxsRWj`+dLgeqj@%Ud9 zt$ywAWLy2(_hcUuKM_9_tLxTsF3Nlp#hPMW(dyM^%C>s7tz~x(@7d*4PX<~^uS6n3C zB;GFGC0hO5b+R{!TSTj;yG`~k(dz5ID*Jcho8mhn7hSV{$HdRY)8aRxi_b(%$7R`M zeery;sn|-)5-$}m7rTqS#C~GF$c5g_f4n$NoGH!|7l_NmTgBz#YO!35ijRnoiBE}E z5132KS^jI{8{*sIhvLWLr{W3mwD^^nj1P#+FDy0@n~AN&EU}B&Rm>N!6S>x%`Arf_ z#d+dlahdoN@u%V%alQC}_%rb_al80S@mZ0J>skIj@eks=B3Iip{x9MeVwK3x+>B2Y zYlyYQM&fy5bMa!43;4PJm13^gTkJ0m6szkbPgMAgA~gV*-$Lt3;}Ou>OyT zPl!JkDe}SiS44_@(0*5>t_SVoVz9PnCyMD}9kHosb)~apw-{K z)sLPhdx2P8N175KOmFq0sq#U4oA{#minvcaD845i5~&Ho{XZ97e7#4TN+f+Mtti`8|SDJ{ZytIte@5!zOd z`G<6vUs3wKVs#y6N{%qUDv`<~wCjo#2cg|Uqznk{%SDQP(C#Zz?1T15(dsELkZtvo z@0Pt@+$dJpQQoQWU82=b-Yfe(@sM~_tQ4#3CgbtJKcxeS)7l&lvNOySn~N8Vmx%4e zj$$`4SL`kJ75T0=+l%jelcU6OVv$%P&K2j2i^XN)a&fh|MqDpGByJVAi95un#hv0S z;$Cr|cu;&xd{6vD{8VhK=eqT1fec(AU`fwpDb!uo~tO~iL}FIPbK(uMBj3afj$++FLgS`u;BInZa^ zU77BNR}DPB26PuQmL{!z|MVoN$%QwjoD79~M_!GDBhEzusQTR&X>h`IlJ*Tc9l8;k zh{K%Ae^ZqRExtyP12vt_(BTUX>DBvmsP(8w=Y1n9?oAJz_-0AU$y$M}Cu=z+5$5pP z>CocWPA4xPaJtsi8k4yus$}uN6iuw;y%O8?SRuE{57>u=1wh+mXgA%L6HuZZK`7 zyUuOZ?yay<-Q2RoJsC>ou{ADFib5lDTmOos>276ucx{AwgN^qkRVF76k6aN6KzVcE z>Cp8Br$c?7?D1k%0+lywLV45eb2@azhrN#P;I+fjn<$>ja^CC4@Z9ExvQ&v6DIBi|x zs!f$koM7b=xAEH4Ro65MtxAKQWpGtedA$zKs{4^Hd6l#7eJCy#oUXUE;B>9Mf#!h= z>qe5-wTQHhY>Ye{$&ZYR95@|5bl`OI#(}59dta||ZW{NL zq5dbFbo9&RP)2P1+)1bA3stGe)tz`af`00?I&ysfhc!Q|8C>6^;_6`T>Eufss7Agu zE8M)!A(MrMa znpxL8P!-7OUr`tiSN08WtHfu_6Te@aRPL^I+PjrY(;JtkQI#^qt-K@Lzapja{go+o zUqi3%iF^pf(@DFGB4zUZCu^l8VeAZx46>sSI;hEu|0|>KyhtOIki6K1zGP^5y-2M{ zlia6`Qe|jO_ej%7>&Os{8nhIYDluwscGSWiyKD07=!>@7+iOlF{bVS8`~GnG-bnw7 zo6?iYXXS2))F=sHvSL*@vM(LAe;A{FT%`YrKq_3CS9hEx^9v%^ zN8)GDGm)Q~v&cJlUam@Q#yIcXSs5vh@Z34HKfN+s>*309hErbGoXJRieW9)EqfoRh z?_cpwagT~?g3cAJCC_GO)i3tfHY$;OBSo=#ynmGK49&?y8;+*0ONur>8Z>8L&m&>9 z%%ojBvK2@Bns#q<)8%L|c`}e5Su- zAR=78d*iklPwyCdFPmesOfugcI>~n-jCznnC}dv5Ne=x2R>EV*JXG%R-jhI)l+Z@! zLHH9xyh|iGZy?C&fi(C!KE(eplc`bY^yF!ZqT}<_A~nz6&-OL>@Pf0`~f{0YU0p;Y=+y`G8Wep2xJ&$B*MUXWdNQ>WB zr5@&wvoL)aR8 z{+Tuxl8D9%MG@_7*%uNWCd${)J{ZW~Sq#FjD@j_0X;g8yT>)i^4w9GK!+5Lj?_@X+ccEQsQc4 zK^~CLL~I&N3Zp4;IBv4S*f@yJrYOdjnIIhYNq`=2x!!{2B!``eFuUttHxLWliAjj} z6vgN(fzxrg33$o#vOZpu4zpSL)_>0!N4y&{0sW2w8*eqY1UPx940EZHYk!a+V@ zev}?h45)A;ygT5Kgvd3GIFzG|2MPrSf(Od{;s-nwbv4_?`0tGmT&(CB42R{Y#3(q( z{mhTj!=pwxk9Y$dgc(Yr^lbHvxlwv{dB*%GJuksw;1Y-6ut!mp?ZXB^gY8&EPZu}{ zmk?czcOcOl4om*$N9pP7g~!`#i0w|33mcBtQcr=YTSk<|C$Ru%G|{*OO^F;!jDAi# z7+5DubhP0VR4Fjw`2^ocG15r%@D2s71a?gw)7C?X3^>ya^zfIOVa$!v)73NPN9oCh zLo*Pgyzrvv7&82RI0R?PrRTV3%#G5+1;~h* zAEhT~`rnB2)Pfh`MbUcjWP0I5D=&P$k>|%6062L>|FgXBc_NC{LXN05lcw+`d$Hxqc=9oz}V<4a4P%*pH z)7*p?65g1Z?@2m&W2TS;g_m{~9lyj6vqOf#@k`GD^qkqMjc^S*8;d6JcP2ZE`H<`_ zT(b#Qj=`jN?HfkqDVX%~9pf5{XW~F^>!cUPf*(4l6um(6fqK6k6FMS{{WZv%l&}BBB2|P&? z0&^%!Loe%qrXWVa;kw{Nd4iO|F&Pwg==Cn|BZ%E_m@W`|;4qDFq8FoH9R8?`9rbGU z3{$V`3GZtABPYssXGL-M*|x~m*i2*NEjGfompzd1xfF*_$d=mP!!9858fhXt#7YY9CDky}MPrC~r9X;4qMgw@iZ- zFN#gOO?ni_OCGbdmp-JA7ar4%ON^DWqIVJe)YzgrQTByKrf@k->`3TtIe_KA1eb^f zZu0{fQTloLx&U@j;EQ%&wEVnfG9NYY;LcCZ{G#QBU$o1BN}&!zP3G+O}aU#E(@J%>M)S-T4_aJ+cb$7 z;Y^18&Bo4Q-pH4@6}uqc-X;$JZ1nflL$~L?WDfSl&|bfY9`7DC(07mOTdig)ibrBL z9x|F48+O;mH2%$RUyLGyfz{}_|Ej9V*e-?R#?LMs2a%07lgEv3(=n@KR{J)cI*yrK zQaFC>)X7D&#uwswdYg%3$F}Ksx$#b)F@1a+u9z;IJbmoc(sBQDWkvAyfsqv%Id1%f z(WO&MMwZMg8b2#*68maa$vCW`haX+RFC3)Nb z-h`uWH#PI<@Y!9vxbyPdlpGf#8J8vJxi#|K$DEwx z#xX6CEVp5%J1MJ^``W^xeS@tVH*eLpRd%a3ZiKU|V;+Fi^&Sc_+x?Y;TvG4&SZq9~q2QqBewY@t%(>*t{Ns|kPxSJMDa6brS z_I0C+vfK{?nP854BJj+zj{M%4GeYDa@^FCSG%?9 z+x3$6UD~;GveXE5hxTJ@jm<-_d^fcWaM$;wO}%@MJ4ux)?_PV$9SVdqQaByIK~W zOiL`W5hux=1^E^nQ{VB^ebOXSy%;lf#@HJNPA(hY0dZ7&>Ck>;N#I)<#I;Vo73_&} z7@-Wi+brb63qk+^Msg#*D{B%fD?9Fm%EqM8#WAUsxXetfE+!A|Zak{CC&@Bv^2F)m z$7Pxv{9kc?OEm_+IMj|Z9ohVc$Awq-?AayrVvgcLGiFSkl{sNXac1{|ewn?djTt{~ z9I_iwJY($mS+iyo&uW?3G3)ZI4w>!S;S161?8`GRE*?L1Jd|cyW?qk7+K$&QZ90y; zyv>;6(bLCH$}Ao~d-5#E*<`lQzN~%c%Wg2*0N&|+GyiXDb9Bi5Uu}-q zqyy6nvt5M$$#A&SnXRK}VbfiL0QwUZ!F2vvi=EK)R5~Ry%8Dzz>5mDr`Bm5E*wqYk zE2OKBRCt}i+-q5{{&035cmrHdv5g*WHf}U*>u1#8k#3&(qQXmPPAo9D!cA_tikKXy7+)e5@av$L6;Qe&*K>j@yAoXv1p# z#`vvp{&c^?^mZn9(8f5r>e?LL&hsYsHXY05_H#IY{Ra4sw+`ZL{a%6}hsSO)+a1Uc zNn;z!Rt%x#G>@3UR&oGjWIbD{;5@TXCQGhWMfQxmZQwBKVEy zVzBb-&J+^$sVkdbh0|^-+pL|2oh`eQ;=9T2CA+_De#yoC$BNSw&Swb>r)DV2y z#5^%yyiOb`juoef)5XQ&GVv$kPsMx0b>b#*i};whU3^~rjks4d;}FMlSoRU|n0QkB zQv6y>V1HphGakV@vhA9FGaeD%Lg8&i{;$jAK(wI-M>ToEf?<<&AUX{|9;sIijRrgMZPh^`us+GT|6MZE!s8yM`Txs)z|v- zsU`CZ;>Jv-i8aNBBEP(2d^7PPv7Ojav>E{2W%F?~_v80^q|x#LhsYi!juUSbXNa>! zKDXxnH;F$MSBq=JE#kxCcJV3kS@C&skI2W}%>NDXZSk;pL_8*1O#yy?$o=?*5ot9A zQg8vJ&0mWk>x)gqW+ES#Gd@e~EM6h@5F?`11{x@PxHv)_FHRQCvt8t0B71>owFqvP zeV1r7gpj^m_Wk06;^X3z;xi(Du7t<&viPcaKr|Xdh_{*rA1b^;JT6+z0tacCAGNE= zuvk~bZz7uTOtHDxT5K!whX=TS7qO>!wKzaDnndvbtF;c+D1W0_1pj8)4~dV9Pl`Lm zUE<5)tK#p)KZu9K@6$Rst@y9R>RJcpmp2htFVSnK3^7w|DYg+iiCx5=;?<(jK0LqSZXOKz2*9jaXgl;A(|mBl4|B=08FlFHRO`ilyRw zaj|H$m$3gGvaQC!y|Rr46XG9`ZM2wRKPLMr@fne?U9vu}i|>ek6pxFaiPg0X((!?r z`_~cA7n_Rh#ZF>%t%AV{A1+Q2r;BCcLh*L-E^(d6U!7z<9uXfCpAnxEUl$LEe-sak z$HmXYuSI^gGRG;_7x|tl!`q8J#E4iR4i@<$E7MOGttP-y*;WH!o$Tss|930guJwOS z_I~j#@jdZR;!*Lq_?dV{{JY4vXIVeH=D&e#yXL>CY`f;ajqGgkGBHQ&DPApJD;9{u z#2ZAuugmg_#5v-R#HHdbBH!p``nBRlakKcS__+9#_>B0x_#2V$0yDq2#6O8g#pB{< zVwGsu{HJOSd%Adz*htJ2n~QD4Z1FNNN9-wHEnX`Yh}VlF#Yy5+u~f7g0E=Z?4S+jk zuMpRW>%}eN!{Rn^hxjY;*WxSUUeRg*yf6DB@e}bc;$KCp0l*KM?1vg+ZLy)4Azmo9 z6x)d%#jC`gB46%izJtXP;uvwVI8Cgs6|h9%H;Z?O%f+?gec~4JVetv^=i*Lrm&mux zS-;r)PP86~7d}7WslbVxU7;U;~atw$RVN$m5H_!n25xil{`yHj@drJXvryYze3=C$w8 zsUxDW{qWknc6_*kF7Ie?G0HqA(B{u4`me&;ywIxD<)H&oItA=A$(8b%{KV7tOdE}1~r$wMy{S$5|d0$EH`DdK8hG(2c5B926<#hOB|GTx_ zzb3hP4s=O=t+DKaEUFqA7W|XI|P0P(#m0te)hP76O%H7sA%NM*AXdO85=#q?esq5cA z-3_Y?YaI$!y5RH))RY$PCB8F_otTETvr!srqZ!ysvlaX+u|k>%p9=h4r`V|51kAJF2xZpKNG4| z?@Z{DdS~37%g?wQn|!(C%*yROD$;uNsYvbKw93g|ekRzi-kBg$I7s0j#ZB=PJ)2g! zb)73i$Z;cb`~%ib-4cAL@|Hxbfkf-q%dLafuaDNhzlYcQ&Q<*@{!};pq?68G2%{Hv z?5}IqO_e7%jMT>3%B&@!wYBa`T7G--z>M-hMiU2Xu#&GxSuwg{+N!iBHCAPmC$A25 zNL-a#p44GW<73tSrSe4#1vnstq|1a-2u|<2O*KT;)ncw8g z#Z?QoUsI8AP3x-k8-Cu)Xma=g%3Zou8av73dILb8374FK<1wte11o`Bf>u`g(gk zlt1#zTfaEJDxvnr`xDoDV>@)(#j3!{x@_UlX(z`m4|Q-?H9Id6s|TGc`d1vT)4$?F zGhUp(COM(gp-V!igBeMy7JYuh3{~KNQYP#AbfU8phC2jC@{A(<;?UEH z41gamBE|e2tRItZ?DdRE6G(NQL_HjSBY_1ryrE!o((++D-TBsJ1a_KPMqcVHOGw3Zg`Qf(*B2)s2~kHVpHrrDtAB^U|2fk6Ym`F>|$v zMJCR5%<3S`oS1n4bI=--@iLAxn9Ws;DF;kc*qEQS(|P9t6kdq2U$W^9>HNYY`WI zkx7j?8fKtYJ(R=mJNR9P^W<-_M{Ry>a1$bHw`UwZE#Nr}PaT`GZXQCiI6v`ncnY3p zn8WjF=vtElV@(d->0u6c!c)hlG&#I&a;VA3R&bYN-+HFL=LA{dPZ3?uRM@k>Ve)fW z<1)B~aL(W$Ur;p#);UK7UPuq~oC!}Io75EeEJBn8zqHuMEXD30w@YJzMO%})ES@1guY6m-4I+R2= zS#V-$vZzZBv$zGGIyR}vVl6L*UM-ek_gk4oABU=`CX1~$i(lI;+T&Z|IyR}vVgbK5 z_Oe)q-Fb<1Mmgt}^cD25^q081P3qtMIqdopcVFlnv%7y}cmKlfe#yDm z-6qxUHMvBE*O$7uD5aPYzS&&&Q_Sf0{DGSMz9a|k%2=ugO)76pdHzYrK2V>XG7+h~ z(f5E!wFog@O3z+tQno`%YOH%Hx0sYW5aX5X*uPIH_~{NBT>=Lu8K z^YCtocSN4u4mLLDtSh7I#}+c<-q}2mmew`R#nm<>FRGKEBnf?RDNC%0B=jU@;cZ_m zYEHN)+^244nu8!Nism|Jlh7`SHb!cebJk_lY2RK(9sc&Z=^F8c(m@QI^tg$Obs7$* zj>BSWo#$lNr7<*Zn5hRenzPNa>^fc|jGvAQsizW9D`t6)Z`TCoRX@$SE|DI5Cz1^` z}$$5l{PzDB_@E^fUwzqdj&S`mCTF4brTujC(7yZcFeasns5Ziw)fz}3I#Lw zV9xa0jXUu`u+!6v=wV{4t0Op9G2!%ZN8cK0?)RBVTEKSV_t99w!Idpu!UDvZ4P9gk zV4=)^C>$325aZz7K-r=wJzlxPIq%`zg2_oU83+s^I>NbuIg6t7bb`Z*7=qCLh#E)V?hy;$7e(or;DxiF`BgT0i{Lff4a{B`rN>*XHJHF>6Nb-^($f$Q z>4~N$93zSzZ!8RnkA)HOu`q}On`6KnC_2k*P4S;200W;JhM zOdjv_qM+&YN6fwh2(QzzfS8^aP55AfeT~{UzD^%(dzyK&U%jrJ7c^bD7XeuRO|a9T zY!Hfm4i9_?A5M6^SLT@B<2odS`_9q<@$M@Pn(hmtwH^Fc1mJaFX~?Wx&oJQy1bYn& zv~le4@Ggpu@SU^+;wLSyHfF1KX1r+*dIZ5yZBAL=@b--bo55jtK7v!Pw7_0$64JXQ z4JFv13?>i3q5BEu$6(UC$PD$@*Op;VB&cVsUzFH6gQpJ9j3CYGnzQ0l& zMLMeazN4D^d3-OP_SFu>j=dnp7!QME4*nqdiRVwWIRx=xiRE+r!Eeay7;f9zm!Ip) z&++Al3BR}TBp(2WzMlZ_gyzahdtxJa9fF=QDFzTcn-R)Ww;mi5lN>AFL$YNjG5);ah)o^ui_w?1%#IcJX{GK?5?|=(K--RW6WiaF*TrJgS zPJr#pIx+NfU(DQCj2)Q`akGurV79NNIAD28Mhag`&GxkvV>wYn3SUdj_O;Y^dw+Jw zSDNejZSV8`ioAlp6iz&az560XqAx{4JVm_si+rUN`AT8$^M2YeP~og|ndd9TUbB$GSIRtJDe?X(^_5cUD~0{Tdv3!( zsjrk$Unz|B`lr-aN~y1u>iv^~nT>Z$v3U=Ilzr6p0D_cX>}r^TwbfDD z36~O6dpokxfHo&zGuxbe&1`e>HM8AuDh`_S6kh|7m3QX2HKgPg!%Vx#e1N8AtR z21*x2>ES&E(`4dlILUR;yVJxBBKF2(>eW7 zW=>2GXWpVN$P#ygnkVY~wgZ*n_=a}Q6|z{p4q_Y&af&DIqE*~(O;7y){p zdxjlmFe=Q+$q|q>rr+jEzx_Byzn$QqLfF%6_8|f$NHzzfM2Ev=Zv60w!`+HS=XjG0 z4(SMf9x>tcEQT{Xq4Viq2ZuQ_!MT`?vNf^!+bT4KClk(V=j@Cq4IVMd;=yukBx3o` zJP1qB&+!073iJs>Xuau6K|h-(o`Od`2+rm~KifB+0?EzBLfOoiA`(o5&mjC@YPPOu zVh%lo^(J43!`z+lJ`&A=3Jdn}dUuH3Z4f-e;cz%Mi01^S$CNec+`>r4FqJO_5A?zB z2JsGn`>*egG+XB^@8S0TfE3B`JLBvm&(9Rt-E7Q$H{AEn1{uq?MT)ucyyndNZeHt@ z63_YIGaG|cRb8ezS(>eDNwuo_ZjH0ga%*H>s;X}qG{-j$@>SJ04VrV7Y0xvsiwEUv z=vL@G@8f8ECXXNnW1f$+X5)2bsR@epA%h-)!$if`9rpIXV`Qv1kuCCdN6}fjgL!e< z`~A~q-=x^r9VKV!4&Il%OI_@g$ewZvJlb+8C>9tW|j;9fI@q z5HHF6Xs45fUZ(P;7!lMLXYmeWkoOU3FtHr24u0mlTXX-M@q#GBHB*e8N8e82n<>UR zZl13@^fTu&Xcy8pjgHDCF0X2DE3j8LI38uvd9NbEd~%T!PUV>#BR;~A1`r%MmQfuDb9B$ z$A=MXz7Gzw8GG34U{)Jh45D}yrWwR1aQG|}yL|dT)x@*rPSskJ*;ea)2L01nbEkh% z12CIvoy?$rx=P%M)3tAZR<~`s12NT_nL+<_DctEG+&}Z#-`0VXDo&sh0zcw3zy=RT z5QW!#7ZN@;DljRFnUY?n@};0?8}ss=vz(%G6`JqNW>64Q6ntj&-L(9lY8k7~tiG#U zY3$k;A5F|l&nLd;35M_agm0+NKFdw(P2}ZGm18G1gH%=D9KwDc;r-QDRo@)qY#*wlz%$-qGG|6uZmjn=#uf{ zyjB^RI}lTC|BK#6L~ZP}S(9gtgpQo2pY|P1HH?#(rW(ecPgBi2x0j~cZ=k7GKgXSt z>DJFOnrfNQIdkh}y65G%PzO6N(`~oGNQI?lx{;yo^N=9>HKfQ=^B(BXvP0+Yp`d$b zI1A!vU(L$00pFxC;Lo$N+}X?BHz2@UBd5c;?k&O0-JaZ9mODMqlUsA!Wx8p3&@ppU zm$&TSi@8-KbLY)-vShz!>^mS_*21gDfK0bbW_D{glIMPe${d=X6KvJ6O_L_MxO_P7 zxtRuKc|;4(Z-P38g2r0S${F9^O0pF8le8R#eH{y1nl@Bnx0l*?6uflzx4L9Re3%Z@nUJ-cDHw)yF2hqtB!6-mRl>!Ei(VhjL;qA z*ow2z7Z(h7-&?rV-Q;Aoy99sk`wO$&pF10px1ZR0b}xCKA|taXqQi5Y~;v-UIPQ3$Qkt3 zvW;R_`@p|jWeu`u-91^ff&Kb+&kcC8Vp3O|JiVy2BpYo6wD;7`v%{?-nK1IEd9@r1imzyJKgRLQ&2fkrBKzKC^Q*xj2{|{(EW0ak}tB znsG(JY3!Wqo*!)L1hQt$n^rP<3|La^agz06_mV)?xX~q}16gBc%?e~OAj{ulSrE$0 z8aIAS=|l{g2{Vw`_(zW!1ARQdpd91}{pM(h=uI4t9OL_cH-u9cnB|~jQc^s5Olb+S{YN*v7m3**A3=IsN72HY8U_LvAb{!YjIMe*#&Np{ z4(}@dU^@0s^>Pb+(@yK{p>%-RmLr0{`EEB`ZdU~0P4?K9+XbIg@ET}+gm4bQ{J0yR zZ`ys}4ZIr0JFC6`>m5}sT~a!xyWabo+%1+zA^iSwcXY=GuEt)uEYFr}UV!J0+J?0b z1Tw7w+H!A%-=E)$cy>?=VLXmhIGf*6`0YOM2Ie8Z*sCJGxP|ch^E-(AiV(*9aOko8 zR>SYlZ$I)I!osxKxaF|@`Q@Skc$~}+O%%&-BmCT_9UQld;kn8V9@vbddsMXPCgK`2 z6Jd6<>7GUa{dRi`>H1m&v{l^!zrTKcQNLOUWBuwV9qaoWI8>(yFk5pB=+4#vZCSP9 z_fdBW?RqhAA4KI1i1JD#J{m<;vR9o_?GyA zctorezYvWs9LhTf4aIVeeik@P_9zlvJx-(=JvAPtD}Ju*1+srE`wrRn$S#+?MK-@( zV0nDj&-{KV`vuvr$mU}O#{WU~hqC`7{$0ex-sBf1k-oNUqlX2%rNTRlTye*A1I5we z3~`}&6N!47-_Aq&m9p0>ev@o2C}Vzn^vCqi$mWtc+U6JZ5N~v=VDm{G(;pR2iCk-D z>Q5rwxw125bCm_-+seLNc30WGW%rY9^rn!$kT&{plsH-Ovq;3xmAzE<9VF5(7o!S) zNPI$kO7YK#FDU$V*$2cA6<#6!RXnSX6zUVkIm_~EiH%6K2On0kzAa^Ul--p?`W_;` zHf6f&#c`t5hnl8zvlVW2p>9_A-3s3z{!HAe_-*1Z6~2qab>X)p>UmJ%Z_EBj_Hh#R z{7j^u^~CB5!*fWuMq*Qiw~?JKc2{_wI8Yp__(E~K!i!{=h|3gyr+AN8uK1{E^qNpV ztJCxgg&Tb)gzwXSZ;O9a{9&8=%j2#q8vP~M7tltU3&l&t%f&t<(iMnC zX9@Nw#g7w9#JS?FB+{)A*NIWZKOjCS{z812#D4q4x5Ymy{;+sfy(El-B-|D`9_o=e zu7;w~MMAjILjo^jILhftVjLMgB!m|zdl zKQ2BkKCAfWMWb_sbZ^LhTl_PLaHDSoR>|gVp5=tZT4Fu15sCUWC$V2k*&Su$HstLu zn)@#D<9*+>mzW`5D7F-{#Y@GAm?!3o{1T4&O%!hwi^bXE0&$6Wt9XZapSVeUNZcwu zC+-%1E50VaDZV3qD1I!S62BCKyuYE|iDG@RvDi$!NX!!3i&uzOiPwq+qPfo_f3t)f z{MLOQHkUZF{2z%oiRM0!@VjKM6wQ4e;ZfQAvYq>z`#rc__EX}s;`8Dj@pbVH@on*t z_>uUjctSiaekEGH%p~4lQGPA4o@n(lo5*e?B?(b{EY&2>TC~eSh!2Z)p0q>uuSBj#=W)F(exGjU2a5lbSY0>sl)}FhUF6Aplf-nfj(D!vL~J3p z5<7^U#jaux(ag8tzgG4T@p^HLI6<5t&JxSSh2oFJpNK0(GarM0gY5goM@6fj`IPKu z#1}-XpZU7%1LC{l2jUU2Li|j$^R*w+%{*80pC;nP;w54Sv9n0w3-(W*m@i%@-XM+^ ztLtV~pVuu?x|_u6x|#PV+|2h-E~PeDJ{QN6&xlqp^Cj7P!~>$$%Y0w^DWLk9k;jg=qCMPs#pL^*7&;{kC{W{79@6{~~@NR*95-VSCgR8;IwMO~n=>bzzwPav-zOdxkBDE3{EWwXG#1Yn+ld{;Jkjb|j+1Tm zD{ql~yZDf}RisuA%Xw4$Ts$q-#|JJ`5AiZFM;tC%{m1#T7mFLj`^8=2i{fGNh#10W zL6(;+wh&v1y~VyF#f6xDws^C6o47_?FFq%e~3?rR9j;G_KNR{ABe}r&qN0g z^_f0FtRvPJFBDsfmx(#zHDZ5pgg8c=DVB=M#9PIC#d7fx@iFmN;;+TM;y&?x@k8;r z_?hV7!GSqGv7Xpaqz)D1JBVGy9%3J{pEy)36eo%|ipAn=ae=r*yj{FYyjxr=ZWK3* zkBd)=&xp^7zY%{c9uVIY-xog=KNU}iUx-y=BEH~Yd!&jD#B;^w;>BWHv4fZ+b`!4_ zuMrEx!Qu_#XmOG_Rh%Wx5f_R}MGA+pzITiFiJQcS#I52E@o90F_@cO1+$X*zz9&+d zjOG1BJSBc9CgN);(|%%Iv4MEL*i>vSwiT}suM#6-o;X+>E>aqeQs|9#OYv&)8j<>Mj4u^eiT8?>dt?0b zB30jL9~3_mPl*(RV|=FARqP>B8jkT(Me4!Pralo#Jvefuc%QgQq#_*ScZd{*qy4h@ zx_CgW5RZ%D244DFA{FGge;1LGakTr1RF0!PN}MR(DBdLgSll8$EK+ce`~O~~+#Kzb zBHl$ec1Wbm9OD~^=Zj6nE@D@)P#h&vosRq8E>fG0_I)D7=xA>fsYyrs1#yq~x_Csa z5R>r*Hq(biO4-rwBwi_Y7l(;Ah!nbG`XwTj?P#wSDR4*oXX0bxc9FVwjDJt0v>olg zh*Y?v9mM-FWQtfrr0^ZXJBwY#9^!Cugh=f>re7*j0+06H;(BqTNM$_6?-40}NBa|z z8hEs;#2{XdqMayG8jp56F(T%P)V5>%RFR5yv~LorXh-`Vag(@3q^=#~pBAZJNBdQg zB6hU@D1IeUl#Jmm#8zT&v9CxeJEog0Qqhj~ZQ{?wM@0(VG5!tlui_UX_3apcfk=Hj z+8xEK#GWD^qXdF@7J%uANe39>@tz?*)*9mDgdv8tA&N816q}3f#E#-+Vvg8b>?>yJ zIX5oLfgt9THvhKmJ7l-ZjBh`rOP<}KedkUl`48)ouV&>jC1)M+78J_#bjfdnF8Mu? zI?-Jx-d(b%aZ=^dB&TU$rF(L5o|Bz=@|!Mu8uzcbJ$1zS&dT)4RHy&Gz`75Pm6i3c zSemv8n$W+Dgd+VKqH@Kt>2=N}6WuX8LoCI6T+ zrOq*@>`%v+l{q;M(g%_LqvJQ1eSG|uGM4b+{x(i-qvXm22WsHSJCCMSCC+hMJL{&s zbxx$!lg_%kaf?np8A=UQCZwUpDNje1MW|3dd&vjK`jmw$Q$sT&V-7q1{Yvi9{Z6@Cl``kz+~ZFM%I^#8NdDkhm$EMVQ2Su|$y)9Okpk4dE^1$Z+Sf(x z3sC#IsC@xyU)R?Da@O2M`fu01sk5YEaV~V;-K2ddQH$+tyDPj}I9*>x4Fb?4Z=3tV z{uHAyUL0{EM~|*dc2@>YG+7c@pKxy-r+>w&)czIAl2MybaCK;9|BBRe!|h!tS*KT~ zIZGSvj0B^J_wImevgcOMJnZ96`(?8NbjQ@|-* zA}u2WA_<2Azvf7(mAwM-=$}?N!dB>)E;zC-n~yJ@;#|g~`WU_~$Ae`b!R)f>o(Zmh?D{f5=<~mi$bNW{-37->js0|);S6;u* zU5B>32Q8VFpMkbaVOx&Q4X*BAk=B@F7_Au$R4#FF2Drfup?jZ>1S;yE#*q!}}AO*W#aZBV(VZnZekpjLkqc$^7X< zXBuOfYYM-?bV_O7N^=~|*))Go^H=!i%%NEa5vdgKo=c1GX{A!UdmgRrs94I!+_Q`( z-+WFr%Gy8TF>HjHa)PnO9EICe%HLw@uYSi9e?w4kxQfQ|4L4d`qe;{ueGGKj?)lRx{Da)`%lOg?2y zIT(w*mFBIis)^l1b5+dzkS5=!^J3F+%T1j;9c#4~-i#b3@ecewI<;|WTGuaG`;X|< zo>h95Vztz-g_tdsV69xO%+$EnEMv`PrVD`uc!||?UVt*MjN6K)fXwSF#;C467&>A%wV4jdwgBgT6j!92dJ5u0f;$tT*w88uku!EcPQ#**;z z$VY5!!^dmH77$)7IH8Tzq9Do~_Lv+B2ydb62*S&30AVZiZFSie91ekjL@PKW0Lj-e zD9wy;=FD%ku@sl^vKwTxLxNZx;qjVqg&|9WxJWFz7JMuK4aMwFd0ygc3@W4?#G=lA z5X{S`$ib|9EyDeod>QLenQ`I5FiyZ%f zLV~YSpi2lYnP&R{Um0&94~g$Epa^1@@eXATk9eU3e=HLUkp#c@M_R%=)?uiE*|PB8 ztLy+`5FE6K2p$hKUFRDSo#|fqEx;otd}c|Mo^75nH%iabo-rv(&rZ*nYD8ze10O&n znxicwQjNEOs0Rnl&G}J!umA>?C?LFMD!c^VToXEg;FTAtOQQ5l_l&twdS-jZq$oXQ zo-s9g3p~r=(1^r36Fzf(l%9vYaKb-kOp?;M(XZj*+rCgnnjfWyw;d=W@y*J8esb1I-&#)NlK#hlzGP7C_PI(V^Wl!TRdZG^e%YTz@aeWeiM#L z(DR@d&R#xlyoJOmI4D8QkJ97yeqp@#2cYrI#_PgRIJ5@g^)sqY&r~m*-M!fJ66|)2 zq+yskjM$Gf87DTI4nF@o?=6c4|DBoe?`%5^X39o00yq?+Rg|laJO}mX)4Xiib ze8OvG)Se!`t%IYAH{po*2^710vNgRED4+NQE)n7>Wr3zq`Z<7;JsZ-+Y={TpP&a~u z&JCb$^zg8C@p=Vbn+g3LQIT+9);HMP_RSX}YkPjjvt})MZrlA(w%J&zBDi2+d4H09 znHb=U#-4u<$T-`%^xN~)reha3hhrT3k>{X|qyG`b@%qfeh{d5!9QxL#e-|9{u}5Iz zY|~ns_2b5o&>a0`!|C^~=*#9FDDzP0Q;A(;(~`@;T3+N9q`^v1t<#rnGsa^17N-T6U$`Hu~ai7~93XMi^Lr zH6JUOR|NyhbM1+OI`p#V3H%YBFXnYWr002}@_O6+YQe*sU?LVj&4P9q{SD!8VJ0{~ zuu(6eOTT}9VQ+^NRpSw`wG*Ip2mv&Dhr=OH!n+bdc$wq01dhodu12qS3A&Eh3Ws|X zu?r6OC?{%1EG7&bpdI0;qlca8j6iBeVsv z!FUG}-ZcpoU_0})VN2T62bHvE4sH}^4zp$9Kiirbc+fQ0z_o1TEDndfuI6GLalYL#iiC=#9hIHRjXAjE>!`wptenot^d#GIiI=r z8gc2j{`=d$C$GtSo@ZvBGiT16^`3c#;OQDSaiwm3@q(~u3;QcOWdror!uIft7pg;L zE(CLI&j=d^4uf2~(AC`%bZ}RDC%f`&%kEah+_7^f*d}lf@PunZa%Q$H?DJgzO%41> zn1u+B?bX9bp69Ka&UTVtqin2#+s9o>-j1@IbAsePLpAPO&Il{W1agnX3u{Q)47`jl zt?RJj%;Xln6GR2DAVCZBBrnPGcr(17b@1yNHS~Ne$cy0rYiCD>tcA0^lyNj^$!&!yT94L*X8l4waVIT}RsgTwOM1rzgwcf9=I zoUy^-(e44_)ok0n7g2&9~=&xGxDs(W&amD>M*w|U)vY;9CXOZ$=7{l z9Kx|i+~G&p(1nci(IK}Q<~2obG!E_5;~PAHm@AIBLl5kfiu23M>Umm;ue&heYy|#0 zW=)yrIqxkA_cigg+X`VhG?rXXc&V8=r)+xEEUYsDMLW@(%c!|? zXU~t$m^&{DZxYb~=T0q~J{<;z&6_(7p0(!An}1xiIKO9p*Jx2eVR2z$Vb5qMoHong zW9zu+nJChwOhxjFC-uyOyR13WW<}u!Z(X8f7>1 zdL&)9Pe8&^sL*U6GT#A$S1Eb+B3Vz>3oc9~J z>e*61AJe!Ti-7ml-WcxJ-#QX4#k zBOg91!Ba+flf`@1IU)I}i zOurK$Io~$iX|oO7!Ze0QM5ixC#~tDXkn830077#8wkK^bAE;gZo<|&;$LC&KR>0l~ zP5`-1E{zeAn!)=G^1W^;;Xjv;OxiqeR1_}+pu}dwQ$@I5?jP1I+1?FpFh&?Uw>W!F zc1+g)5WYVScZQ8A_M#yg-+&bJhrt&d;o@31lma`VTpG6r2S?KKL-+>a8;?YP=AKI| z-^Vuyc9ZQxo>P*1gCw21af{!+!fQWWo(hvvxF(*LA~@i9jPN@V_5+gbM&dIj8~5CS zM90sS9^K8-dx$0gRxA@|i}S@Fi6b}fFQVCP|L{oTezJZC z@))4ZS{$Av{m3IFm?iCM+pNVzimm*)7vs|XgF9#?`MK^x_c*%T8 z$@Ctg8$aJ)@?i0FakMy2w0?{7vn5xE<}U~Om6ERztHf(XzNg~)uNQ9>?+|}2-Y;$y zpAh-61IzzjwEhkGZOMDZkHpVJH+~*B-d5g?pXb*Sv}eZwc(mj;Vka?I>?)eS9ppbr zazAm9$d65E*NvYaD|wPQO*~tiBQ6lXX&n9KO210HM%*C&OmySvZ>%=uEAtnKCy2epequ}V+-^P=+; z^orzvbsRmtX|rBwV*PRSEv0WQb`Z^v5X#jbN8d;3{Y6gyLi@wSaiSYfKV9-H@jTIu zr(Ys@h4^3M<>Fe=ji;}X{Bx0CBys)siVusAiO-2Ih%bxge+cFFNPbt`FaBAqKaQT? znQ?uoVz!tgI{!pROKvZ6>UWmwBD(SPy(GKw^ruKZRU9FX5q~635ziLqh>OGvMDu5a z_)5vE#jC}Q;%4y{@t5K~;(g+yq8m^DoMbni{`ZpIc>1>`yYciNN#-o_Y!BWrk||=A zc$ip!9DSbjg<=n}L>wTRKP1>4CV7-NS)48|6c>x;4+-V2ki1#ELA+huB0eN;6`v8e zi!X_Df7!`BH0SSnLgd3R%cYCiBES8kJ}Pz+b4Bx)g!CSg z`E?-k4-rR+W5vm$8{f|F2bsT8%`6C4dU(M7V$puA@K?E8Sz!|4e3t@;@!UD83@@7T*&0i64u95&tgo#_ z7K^>bKH@-eh&WO_L!2m170(gpii^Yx#0$ksM1H8s`mYy%CjLUaUECtxCq5)TEd_`bMb{6ze#_@x-&8IASI5)TvIc>T7Lj}!C6?qV^y@A@W;Y%D)ir5bqN27ata%6?cgIxR>SsBz`C!5dSXzL*&=L%-=*jQaoC0 zFLn|O#crbWC(u{&KyipTS{x_x^J1=VwpbxniYvs6#h;3+#r5KK;xEKo#Jj|MMO>E5 zKb?D?hG^@@?U9imhp|3Xg&v^7~9B2`28^~*YPLwb?7CUXPEx?uFi z@Y?j*!)sF}WX8NM-hn+UA_vn0e?v-@*JfiZJ(d;AjzQDtf!NS}%?BOx`A=#m)}}A% zSl6Jm16&9W+?O%vxVj^{PJoSxwJEtB>LR5b>mpuW_A#GdQk$1Da9?U_hq@z<=up=L zc~T}g8z^^jo4O|FJ#f&^Yy|7s2h+1(+~sX(aNX|O=+@4qY1i$(b5-p2gOThWwJA%B zYST9s)uzq%_AH8()JD4WsEz#DKk-Pct4Up2SFGvpO;DF6b&VQ7a@R+@f=y}rvr^w} z`g+rpPY+88K0PcbUeU2Os~~m%sVOPdURBEetRSe0RQtV$?%Pu^bl+Qr-lvCo{-=le z9cz#BB2^t~kIGs8*}PvhT%Wma=)TJXzb?R@IkGy~|5$KjRd#jL13{w!J2N(9RS(@a zB75k*{uw@ES7ZkJGqWNG{PZ2Q>05TxdMkF)wJEcUYa^`+Y9qNvU_1O1Q;^=cF4C1FlRnxN*^r6xH{QAycV?_?vXc5o z4*HFT?t7sGDiA_ufz4xVtuGEB0Axn^+X1R8p=! zpPt z&6nO_I7%djtneLNKu5kQQNFSdRv>Rm?l49lq&9DAXv5wS_~~n*ON?Hz7cS{3IjCdm zMiflF#$Sc(sr)`Fwc4*nJT2uV{BOXot|IrP`8Prcx*<7zZh0X!R3MJ89^&z?E}k)q zYkR=*cn$0=&{mn?tD(@u)+7`0I821`(8RXTM5g}=iunWaFZ|Gr^!s6NWbu`)Kj=gJ zk0E67O`<=Tb(=@=Z}{h*%G8@E^1XsTgsFU!mi0&c^G{=HOIXfY%Ce_Z>;*Bq2Qv?& zxS8T}_~#F&$hu^o$kY*gAeNz6Hs4Hy;!PA!iHk2%L@uTN17bstz!^zP{G6>}B}T@K z+5?GiF&c7Yj7cj^!pIntUZ#YxFr!&{K7MEamh~}_Pt)0a)f0-naRP5>Ls-UeKMsSK z%@Cs8+U@H7c?@#;xEudOaH%|2|BSd6TGW86Dw%K zWi=C3p$YawzSDn&CffQOU2)hX=x$`mk%-*S$SH`>qg0N|+V~u3n&DnjwRjVew`roI z-w~E$c&itFvFr6mxu%QQUv9TE$V4PH z<*QW5=P_#&zQaE&p7RdNS%s7g%NfdElLF+bis#y5xo(Wx3uWH@c})i5-~I8NcUjKY zY%l3j8aP)!`AStgVq`y?H4v}>^JepW{pc_>BCaJLL2OsljT#7Ul@y}X_DoSPGg>? zGKq?C;9IjxFZ7YOuqo3HzwAPMI+MA&AG&38mw=y}vr5*yLDn z$l$X6^>K7#u&Xd!ZjZ;vcm!l>Px2#cOR(blmk;9WYGNVM!!dG?>V)!hXU_pF&d&6=@+}cLeFt!T8k{F>CR^+Q=<9G<-18#yP zxJoiyC4VD}FX2Y7wvA^pvc}UGxe@`ol+D<6TM^ibr2WtWJvk8Nd~ZB40wM4gFRNjM zKZZchRq*#hL|r9l(XFOABHTzcAi)*l>*PajXwp~9EXAzW5Ze&psSR_#SJp7n903F8 zh>lKw5+eLiA77V8Y8c^fv-s+qnCkRf5#c78S^hZM-6}qU=z)MQ?IX4m!lsPxa#m#< z0>4%#&xQ?rt4~uLe?c|LTRQ9)wg@+nYGk&hz6Ji`hOBJ3@5;K$vJU$`S^tW4VdN2E z*8=YhVyzh%ekcQDkdy1T2C<6b-$sO25U@W8-djbyC6#1}nHu9vCG9a5`oIc}{wEN% zjH8M62q<5{Li|A);|&P=jSNHI$gm0KEkQwBUci5@`Y?>eXuM*@l9mfRPHx_&hDxp_ z2lYw&N(wKnTrsQ@tnAk_QOhcQ%`TO!XO3Ipl8Ur&jj&})Tl{AS<~V`XrD?6Kn|#Xw zKM{E+BXGV_3@2ffeE|EM2z%t}o0l`fUso|M;pXLO7=A#3p93Hxu@wP3=jP>%JcW?v ztsa(!aSn`^SZhus`Xb=?SYE>jk4_vPi6e8O+hJx3>$jyX{&SN8Z_)C2M`a3?94|nI zyJqze(thrTp5zf?!va`<3p>Cz1dJCY!u~g&;B^6Kjpa3r@PNgsg5V*G3f;H7FCv3Y zKbn|m`UM!Bg9wi+9L7W|i;gDRBVcHyU&DjA7=b6Q#P&{b+l$JeF1BpLf1WWSIE%P5 z2jb;Qwz?~Q3E3I}XKR9$Mb-+JmF?0Of#*4rw-gxXNSuz4hQ~?VG1xFAUI1`J5@V8* z7-v6d!oJjwpO7{vY+vcMWwFFokLOmmM8H_3Wi^aM5pd!mxaBs^)-?fE!2SB5ha6*$xF56kYl5^BMobR_~03qY4B-V)mK6#hSlfK3h+;lsiS>g~U zudwT}>20Cmw-J(zQ}u$W;-`M9zHNO>*Le>yTWH}ugrs{0s=`{0v@G~X)wdaTMZR{f zqMbvZ1D$E+u*ZqSF!(p2s<*LJsRG~C;hDAGM$%Z=pz&QpRlV(|>U*w(S(7g{_4XDG zhpPCl;VGZbGU)h-*+SK~HEPmTLM80kD>NKGRs0oc_1cfB@3|q&`cDKLK=^M9jfLxo z?|$Z}w_2*c=Q^162fxJeTpd;^-kv-eEVCw#?`2-Gc>j}%p_Y9*)-cLkNksWWU^u@YZE#5)1 zYROA-J?!flJFow{gX8{ZBJr|3&Yn5}uhC{Nm|liSivJ@stCvn$Sk~o~vN_*5HgC%O zib-?JD<)w|=WvkT4>Pa$3mCI^Oi3^$8XPm$#_WwL3ED)1NzvdbFS_Xbp!3)ucgB#` zZG)!iGlKJ@g?)nz%=8@zZm`M2->Sgu*}+W~-&2ua0O1-F{%i^Bvu0qB-GPe1g-H0R z3D0BJ>{`se)}&;6VQ_wa`!1(;3C=GGnhtK;x*)f0@WQfH!9C%$*}-<6HOeyb= zwP_exVz^mi*68w))8-`x*u@8)S#9IhqgpeuBWklvYaVozo>DPwRyZMgd>Zwy408L* z*hOyFjI(CXwmlhdr+;s>W>VweG-5S(8=N#^PWy*r@A`4(bemH9f9tVxyefXz*ty9; zC*KX8JGncqssBIEm(AI&ljh8hkF-eI2mi+pq&o`D$Qze51TMuP;{V;vOB-mI55L>k zQa_)&`8gJ;=?LGIuK;=KuQ&P5$lbT)BA@;60&*GK0dI!EBM_K}f$IyOx)IT`9Ti{d zHVQgdKi*d++bf4X{@zA=%Nh*V=HwcBsI3r1E^ONGtSCfg~8ThM&7FT30HI> zII2?)*m48xp=sia+up{|Bvspc9r^hD>=u`gbjK9aZf}SF2POM7-_>xvtOx6sZ10Qq znEMzyw>W!Fc1+g)5aaEz8A*$4y-*dz&l*nVk(gNUvM?ba7I^HLi6yX}l`OMoB$fc9 z*V;g2dxQ)3OkxSV`Z8NEu>=_PhGw&V!*dJA)AdOto89ETVe9$kn~`rCc$a)R_{t?e zG^IN^tT!Ja6IG6p&G6DzGS54lUy7#<&PmF?L>?~Mm_0NdPE}q6nR2D?Dx&LJ{sAJl ziRF2&BPWW}M0RHC7m3TnD@2|Pn9ldRB#(LW9`QkOoA|7_Q+!!`OZ-$k4xN*Bx{G}J zro34EF^O}rjiCcCrHn3ArS$70UoV+&3YdPUWcpC0yjAjZlKI^Q*Yld>Hzj`{*~S_n z{cn=LP&(hm(q0yc^us0dwJc@6l4kmGl5K1e-%hl*5|9r$Cnogu z=feDv%FPhxif+tKC1tG7#_XW{6_Qtpo0b0-@hLz?M@x2NZEWst*qx{J3&a)5cd=-5R3e`n zOXKFIw7I*X|Fz0JB0jEiPm4RHe_gVhgVM&zpnR>;ZHx@$G;E{oXR#>>eM=JOlXfKf zSHAQ%CI+&Ng+abj!iO~dK=>c zJ2poo(jQm4jb%Z(-${N``QIfGQgFf~+l!?n>`W7Jx(V}%IAxm5^E=D&T1(nnLa>A6 z0L9DA!qXzQ}Jbx!rCosT(_bhV*Xi=v2vPi*v*U;`t)K)1*Cj9jcP-#*S{1e7$(9 zc!%ibV7_1SW8#w{zx<^A*Tj#-Pel55V0yOb=2SjHa-LWy#zedRpqv}a>E=dub0RNQ zzMqJfiuJEIH%Wh+Sbq%Xqtd(Uk6m}L-j}4WfBpGD`VU3B4k7;+k^{uKy$wV+Rqi_lWO{`^EZm8-FQ1zh`7U>yOE7E`3Xpp9C|X8=Kipa!-*T2{ZjP z(amW*PV!`Ny2!7HnZHt8Azm!jpUb#f`Wo>@(amXmuVgo;@psK#yifT*7XKptUF1AG ztY4bgP;4x=6kChmHFt5T^0~2^!zGUvCy0~9*`gb}xk&N_V*N3ktE6{hIjbeth&PJ2 ziuLC*enk3h;C+(Ym6tq^Je~L;!)x;;<4iKBEJG>{*%P|a~DsR-i_&; zExBA=Azm!k5j%%?+|}2-Y@c7bLQV6zAU~b z^2>9ke<<=(bIMP^Q_o5pM`L<*?H!(k9Xa3K{96T#fZYI_rGjRak@B5oGn(0OT-g(KiG^iUg^2#EsRO*UT9+s!++m3 zCb6jago0wr`rTs^R}^DqXwndgxym>uF?~&gs?=2+k@!(KA~DNvmr>PVqhFYE&>PGd z%QB7{x(_aCSEsKJs#?bG!RWolrKj)As7~Fmqc&v=$HKiD!}zz&Kf}nq9L`?W$ZNMI z_VZY4o5QT&?~zjr{~kHBeO+o-zt`V(HNtqd*PFgM;AV_tn-Y7bv>j$K+tdJK5PzJB z(Q6nJm~s-v%8jl~&mL8qo*TsoxX~D6II1?KRognhtAA1|a-|^GN4viCGWR#|vN0l( zV+NmoA0yzl>_$B@>M|c}P#qkfSv~*N*0E`KXI2N-rPicdZ6|se)sb!u_NS%48M`~y zVAJ8HsDJkASW#@oojqfx#=N#&Ya>~OwUJYA>({K#Yx}od+dlnmQRIYE2Ha8WMc*sk zw`*c7vzluP>arh9t?pXdI`#lY`kjFGNUwpdMw9k!$nLr`?O?js;9$Bx9osSt+kx?x z6WXE$hGAPc?vio8#6vD0xjx!8bl>*uwEfxsL!~XP)zD&DC1|;5U5d5Z>rFXol4JkU z4o1>GEqz|&|E9$XV-LmNeZM;WNQ~(74)pwSgLUZ}Q?J`mTd?J#^gnnhRo7!==Q}L| zj4$0$Tf7-HO!qK9nqPH%EW2y!{zyj47+N#*sK7*(5=&HZymI0p1^#J6%kjjD}oN8TC8Yoiy@ z4h^`+-q_`D@H=}4{;wJCkuqwH(7Y30Y(MT&yzjhE)u zH9P#+x)kr&x@OR)7qqKu)()d2Q(kZSQPZtW|JwA{T5nkA+H|jTZHvk6Yg-gVs#Eq4 zjQG7X4yI>h9Zb){jAogUs@1!)Hta^L?6y`|ncg%OsY`zlv)DCC-OxDZ?|-~OCP#S& zX;o!A8>~;=xT7|A^X2I+V`*r&R$Kh8^Gj1OT9@sJakc5`>vwu*dXZJ^&FL-tD(uA| zWmU@l(;K}JTOHdF!#1amik*)3>{grJsu;bwTWwlyac$Z|jqALEZfGTp1}$k)m*sWC zNKlLjg&upwdN;IP*`YnTFLnZYC3)&?0-t>0#2fun_ zX;8f=*63iQ(WU|0cI`%O)2e-JYwqSqUGQLL^+fO1_ZnQ6y3vgUO^;zLXjc0A)YTjf zn!ffpj7e^=D)qf!!&>Zzl+n3pYwU+;+qx9)2eNDI{a{10OI<4V2vV4%S=XL8?sE5} z)=YZ8H)gr(`Cb#A$L(~ZF{OL(f?#>5F}3@LF{Sp*>!7No%oQ*=t%mIWAIo+ELWBr{;7;HL}tKoxJwtbdrgIc%X{=Q))=2{!R2Z_Av zwvnhNU2PJEg_`t;Nf?Q065qi#NH zzRL^6H5B<y%l zF{QU5%|>%R!bl2Ce27Sn%V|R~TiWl0W?>Ub-%1PHo<)P(V9q?GnuWfM(86Rya$HWc zaCyQ4OW#WiPh_F-!{MOL!X{_oVOnrG&B7aIp$WHwUybq|re7L4-I@5aGZD#ACE6mA zN_nUruf4npC zQ)gncGr`&Ib6i$4@yCP-9$ftC%+K@ri-FbR6K5i|iE2@ZNRG>DCeDIJ%^5@S!8B3e z^QDWKSi+JysQ*>Y#Dg^9vYLrc6DCeaalVN4yZanBY9`X~bL1SDH6<}$)s+=xhy z%W5WeCQPvS44R1fA376%cP6s&8?%|{k4TQoY9^*Yqgq^v;%jK)Qojq%LDm+Ru_T-G zI%ne7G~u$E2~OrN6D)oWOE~|~YKAc~^ggceR@1luK{xX_qg#w+BY#Y*>5pKxo zG~u#ZEvAMhSPK@vmnLfb$6PHIuq11-k`dOTnkHOUtHrMpCRltMP2lGgTm@`HwmB0o zI};z!gv;8Lqw%#7{PC2|3;jiYe-`IPe8E!e6NllE&o<&%L~>kK+XzlHFB2?IzlVOM zPd8R(;xv||iOJ4HB~7@jX5#XM2^QzixBmG)-=dg_P0qxf&cw4c;j)^E-3b#cUO*Fz z{cKzS&BOs`BEYv7wjoC$lH;TZMUzip^{{bBJK@?MDZc(Y_ZTNMkM6Hg0YAF93$ zt!X3D8F>nUL)A&%*?w)PdTUt0KpBERCxt`R8RIlpNN}@VVYuBr%Q-<6t$cmb*S2P6 zIFXBBlfKeQj;#|jY%#*`Ba%i~A)kFJg~5Bg+h7$i?5}TfRYug%NG8fLg>M(Ym zMlno>n2LbPKD3;XS4@8VPXdAd?XwTQ5W!-x?GmW2_n)yGq7(h|1p zYHML8qk{2NUL=zmR#m#ks`Lk>Vbm(Ym0P>k-$?#|hZ+&8#y!gu)fn&A!`0XZplwL* z9<#?t6SFajQ1$w{a%^oLTxfWL)x*XSZ(4NhdjKyL&=PDq3<4&aM@&oDIo=yj>_JGw z4L63J)-e7t0*n)1Sadvry5U2;O3aN`;k9K}Dw-fP=FnBlm`1(D+SX9bpI=b};scA? z6r=3-uuX)UcqU;d7jHZ?EJ!7q)lc2_rM#)@rWljb8(M|MZR zxIbcqMTZk>LM?Ges3o2XwTXrp{Y_Tw7TOy|jIlx!h-WNn-9Bu{Vc%5#Im%r|*$6lR5f!E{UuN?#t_=0uYqy#nGtx5h zkm*Mg+?yEFU0K8a%zbJ`-Oj~GZtmMC0uC~wqh&d7Sq&rMJ|Es4(Xiv6F&I&MUd5h6 zlsy1rf(bq|+4QN5tTg>FVqK`Ov~kYYn|?TPtLd>KMji?E1bY!o63x*rH zAlR=mkTVT~DmgcA0yDgFmz!dkyS#pGu1fd#&cG%_c!QW!1FE(n;EGa7@@$oSbz%BLrdv=+ zK7)XJQ6kK`AbugDIw>%%m-# z>I#I2cU~oVO&E_?i|M=*jd^zsFKMgWO$N|KT0rJ7MD1SIMb@u zW-KfbH@FEUZbe9{HdVZP%kY-Cok{VIP*s0tGBd0bfK>#dHaWpemVOt&moMvZDL;C200Z)-V!D4PpV?38kU^v`>uq=b=%~MQ{*ia zZl9crThY%{W0Fo_S2+~{7j3s%Zt7rD#dkDS z-?t{rtD4x2n`$zT?XQ~5ORC8{w_2`p##dK+I>hm&ir<4$rJB^gjnj^f-??H(^JHNQ zi~V<+X9UXKVKo@d`rCVJZ#1jl10ku`F=M?wO4Wa(sw_4S0ek6RYQHfka}5GcW2~yZ zANPi_s`h%=i}zhtv)(SJ>c3G{7F%Ph{H{j_u5Xj&v{wuE=G_~^%JsE&jCVd}tk(;u z`fpT@#dxD}=tmT;<7Nb$OW0cZR*R9W(7-V2dd`)|bcbb(pD3w%1i{_)CucoGbGT$C zu~^cXg(~f{`nl>GPn3?IGFb91GZ^2uRH>bvL8=Z_Tc=NcU}DjG&0>6qTn|wVrCv_>FqL?+Q zwEGPVX9l+pm#e-(r%$>t@kA0DjF)!5h$US#T(0^CogNzqJK^Gf4NEFcm5#ysx$0YV zrIXvAMZ-GAFIjx%u6K?;#AA3u74M5I#QTJ#2BfOqNi>lwzAqE1c#mbF&{n+d+%ITJ z8=uG(x0O)EZSh1I+KTrvs_LDt61n2GoGN)2uvBO)-e9fJ@aV=^kfvp9B5ImsIlPwV zqR9WaAS;`2?v!b>&YDx^P3tvbdfCDW)8XAK@2u%%dByp~`9*o%i>IDdF`;bQ?6b<} zmrcO%{=AvfrsWm)wCJ3vLKfU{zr?fjB9>;0HHH7|#st=XX7x_TNg42G=hxIW~BDX-TAgi*^NlgN6CW9Mj2*Ap2ohxkak! z{>)+r=>pASSH*RoRls+e>8^=IP>Zl(o07hH(=7K^{OfDYPzh1yr~k&Q+UzUt%M$L_zM`(@)$HGQ zL>8V*;3chV(WHucZqX8TphLBI^$QcxBJV4%)27W`fQ$*ZZU1TCc5w%7R&!R`B8Tv< z_P>``HGY+gv0zwm-dfTqyP?;^UH3s=>c7*kTI5aVR?YiQ_*MHRpK3gy^67MKdfC(k zGbf!jXU1Gl@hMZM&MRA(oQmTiS)4L&%AA>H^OIFy*UaXnT^8q8%=7Z6%{}+rGVJN3 zwa%C~SsdBkb?Qz|Ovoi%kq1 zF2^G9k>b1ZtD#jO=b}2N;_Qp<5*yC~N z>c{UzTp2{Yaj?gyGPk%ieh!~(Z`R~+`&d7G_a3)*8{#ZefWT#b7tibFIt65=G2AP< zd^Z<)`28`lxO|T*pG#@g_0WFO=xZdoe&v%B+uH0HTMuQ*A>_i zlh6eCJtuhytVbs_f%VK}nLR791lBW>VD`u;M79af z8T6Cp9l{SdU+t%VLvncD`yXFsU-x0-e3@N^My9W#^&}1~{&Yh5X34*l{2R#+ zN#?J>%>TUPmnEAI8wU=|O8%>4Ou}jDsW^$Sd?tzf%_MVt z7iH(mtdry-rJpSFH*=1`K3)8GeVEnAF2B@bz3vqGxfa*Muan5frGG*4i{e|-?-M^2 zYnA?mn2JM__H#(s;|B?3d+E)04AQ$x?ydAbBHtLX{7A`Xh%==x7tN;(@-0*Ph2rH( zzee%~@mA^Y79SEHQ~HzQ3(~(PdAInH^nVq<6jQKm+&;{7W^7ENUacfY#RBPjiv7e> zlzyscK4VaRlH_Tk`7nci31#pn;$=!VUuKA3EB*D--zeTI{iCA!f`OeKO5Y{^LFs>z zyjT3Y^qeq_>o=b-pnXJ-v}V+UM=QOPFJ1QP0eX-;oqWNw? zdGp-@j#s`(N}nd0?-r!j_t|o}@|%wqq+cibdX;lNT7D({1JXO+EH6m^dvTBWC*|8K zej@!pB>T9T<@PluvEG(qJF%0}bH#4b_mx~Kj*|XI;tcT|rOy>BrN2n>e~IRc1?%6e z^jpL`lzx}^p!82keop*@^zVotiWvTH+xHhS73<*kW{5|U2yI34(SmpZW#lUsPgMFq z$wR~m(wmPK#OFw!uk=OY3hC?nYN?U_X7Nt(UJ~nnKzv;K7bL$ZzAgQJ@iX!7O8YKij7F*V{ z*F7ox0?0hoXeJ}K*q#r9z5~qo0i*`SZ z{LV+?`O>ctFBWaCZ{)j5vibalTqBu3yjwepcZ$CjpAw%F-xB{M+Wj-^9gzGt(e9(6 z=Lem%pC&pVjg2Mqn@*;;5}l96V^`jr;>7pC%3$$BGlg=^{VX<$BC_FgRcG z1>$n?67e!|jmYnNS)SkclGlsoQyB6uCEp|7Cq63LeL3>ccLU4+Ui_o@j%fGiNVjh+ z!M{lVcabMHmgmqel0F5$4MuUIOcDh?ILh~q_im!Q3K z#Ra0>&qKdL^2H+EPcZ+rVvYE7(eCS!eurf9Q4INh$y>!IL^`mbz2A#_#COI0qWLUF zzFNs&i2tgu$WE}q_2r7)M0*ZEysu>QWsJCc4j3x^Skd{Abk74brJp0t6VDfyiWiG3 z#ns}~;zn_^c#HT;@gDI$@iFm9al5!v{Jr?P_^$YYcu@R{_)pQED-h4neRo5#zAs7o zI$(PqD;9{wVsEjJI8YoS9`bnu_MC6Y`p+FJRPLL6ORiJ;M$w)>VDBc$^`ArTm;Pb# zN%2{6r)bY7u;ZRf-jec5`I@Z%e6vvLi^U7YOGNs~;diP%zXEp`+; zi$!90k=}f0&-tz#A$g2AQJg9|AC~7zULc+?{zSY~+$e4qZxU}4etgCW-M zPvSxGFX9&>UwJcMBhmS?JWBF0qCF=epYvteOZt;Udrm_7X_D(dFHMoYOq?y2ix-IQ z`RNkLmx-&ztHn*?^`i56`Af<6T!s2LADE9y|G4;^_=5PFxLbTz{6PG(XwO@)YtLIC zr&eM6H4w8z{BQ5H53mQj})U~ zdofom5Kj<$i>2Z~ai};_JX4$`&JfQQ=ZlNP<>Eymy>zj@*NE4NKND{ee<|KCJ}f>Z zJ}2%HUl!jK-xfa>KN0^f{zFW|yLi?oQ*0_8A<~T))4PcDBSv|kI9ePhP8O$&=Zfcv zOT{0HSBX_39h1@iZQ@aqY-$c5+qs)2BNP4~_ zj}|+K$B6}Eu~;JZ73naKZa{`Q#v*Wwf6 zGvZG1CGmCfkK+5{ev#h#Xzxq0L9hsDQ4Iud05m&Dh_KZ@^(`$T#cWd47M zbTCLcM{FUs65EN#ie1F6BK;Dw{3+t;;s}vm3YlIe&KAqXMdAe_-4-(cl_I?tQvR7p zCx(>o7q^N}h;(Vl^jAgtFr>U+q$@+p{}k!bkaBa8{tPJ}C(?l-CTYy zOp(qEDPJJcdm-g3MLIF0{4wZA>|`Q z`YoiKE7E--7S7DaFK2bDNh&at&s8(k-iEk zUnSBxA?52u`Y5FQYmu%BDen;JsF3noB0UpQ{!FBULdp$9`YEJ*j7Tqql)H*_OGr5; z(mNsLaUz`*Ql2f+MIq(oB7G84UL(>qA?06)^iW9oK9T+jDL*gLAtB{AMfxSAd{Csr zGs-C;?t*S>dQ=s!nu@s#j=$*nmXZAz1%*|9 zyI56^4UvN@`un}BJ-@I;tZ!A**kvudtv_Xr-`n5sH7KZByfX$L{yVo;dp)aqACp^E zSe;*G^A>c(oCSX4ojdjx4VX}yay&fS_a1t{OYasdjXho$8Q}N4GnOAaxNA4k^Ec$e z!A#Rw^T|CoG%d}q>QPN!@S6sl!ubrcy#t?LSX>P|mj(xOBDvKwV>w;Dj$Zo_wK>@% zYjaw8YrDlZ$8L!|R_9%cSrk_7-s@dDqBeW>NO<3mtbMF54ccsIBbSbZ|M(H`A3vft zWj1qY@9xj|lcR$VTlh&8x_riG|uaQrFN-Y561SQqn-@3r%k>f-APH|?%{39~p{l-?Jf?pv$~4yI(ss%yLl zVm)e7_op|yCFXVU4qSO*#{TT|@th%{Jx23hi&~u7Cgw#^t5efrhsB<#OP#rHz=^RE zvQ1kkt=6sD>zLE^y;!lWCuc&+sx~pS-4M6F)N6O|O__-n8-kXb zz#5>f5Ko_wX7#xcxl3MC^U9ePJxheee5yy2TpBKEb|^_&fG?AK+CNZb<36&}%-~L;p%cA1JIUsP=mo zR8{X9x8>mv4qP=OhL+v4yVl#f3-dD!#Ow?o{rD)qc;ld|?5^*$=vNi1?y<@hhckumDk}B z%*c>Z(sNe-n%rx5U=6vk&(Jd?S9ifW@7v?=nNXW^Ok`byRp`B$*sGhfuDv_9dvDrI z^uH^->oV3pS(iQ&+c|SgY*Or*x<)g1)J8WqM0-M8+iCOTNNo%$b7pYeVOKxKytO?x zH-)AVEMyPC>=K)ws0*O&yO~yY@6EY%_ulN89_F1Gh!p=)?v3C&_S-jVQ}!Hj^^V%< z=*>;gt0!+h9CljFe4#D{(y+~M)Ta0K*6!ZhY`~7%*{il%U1rH@%b8p20_ewX_Ru$1 zZr;7O`K6E7c{AHxyA|u$y|?YmU|pM4Z`5WNU@vFys9myZM{VWiqp`Mf6>d`0`Y|LFBS?l*?{}>YMQj@!S`DZ`+Rndl% z*GJavK#NB9`x&K}Q^DJMV$AE@3wj97;BoHvni){LMTEA<6Sy9$xr|iEdGlq8Wu@%Qj3%>y8h>XaA zppm~nJu7AZ3d~%R6ZEV?e_0VhyBA?z?j@=!5OR&!))eF70v5u3| zH?}SH)?{zk7)$9|)h|-@3!JB#Rj1SiI7gj=bHhdHxBRI`P4T)0xRykEXO;5$(kNC~ z)op#T&79F~RnHi%HP<}-Zb|IF{xoo1@ut!5^O)bc_2fT!k3P(6rCqZ$55_P^b*A|0 zKg@$+-yQhr8~E8qB=uRAj5K%*Qg9G?BYlSPe@f~bNC^JHOeaq@O@m)C&s)@ttDq)5 zbsY<*H#i(f%!856f+z4_?f_&9e#dCu8H^5Ow8vSYxjqmu55_}8ddhy3?GCzz^~NNv6I=3xk;22(k2+DB6@0!x78iT$$k<6X#JZqN&qZ_Fjto$|jsB zg02KJIc85rrhC;Ma#t&OkAemMTpul=O3xFaw39eQpwFpfHKQGGtD3RC{?IO~`(&Hb>a1h48~aWCzG>I?!)x&LuX>@*DE7ik zgPQV3`AmrEy|Q{|g(9ov;adnCSYLM;&5!8e8G2>FhGBbdu*TDdYT`sy-9Rv{#LuRuQgq7Uvu z@ZQjiB491smoeh%GNOhtes63^jJOJXqtj@XK<-zUF~Uy=uudXe{TPBaEDKf@U&6Lp zZEeO3aQ_)kYlc`9A*rcQ{ux`vS88_|3SxbPR`Sd;XN5*ox$Rc+!mt`)!-mxxmQ=m% z@seyGe(Z>*B3fH?BrzTVHF;c@X#_wE<}JA3gQL?_8Wd|_eiKF zc)~P8jL?r0yyXy|I6Wi$&>op;mod@|AJE-jXFXjBE(?_W>`MeqKclBkzVnWep==gu;>_Dww&mQ0N;@1HQX24 z1=Fp_3_0_$dEA_5wdI6Ksr*Kp6;mw@OeySX+grWM#kYNcaGGlGj9;r?5k<$(`eq z^IPpzdG;Oj^GyJI2)(qDe+bpYy9j8qFP1RU2pa?sMsoo67iLfNn^CUc;Hs23Zxqz< zyzx&fIEv_t>LLgG5Bmz%o;cJCYTOY=(>&z1BEV%Y5wZO;oJUeKi;f|vC?Q44~f(PHiZVluiBHkId-mn=Hwo62+S9$IL{QbtCY zg<-_1P=E1KMmCt<+^BB}_4h1ggk2n~A;L9|OPs-mv7f(a872~}2Uc_icbYBrw}f9W zqp=9u#+D>jF^;R?a64GIcqt=XANTB1u5lv*iW2)m{n|sWCUF?AzGoR*?{r(y8ANzQ zufAcaJEBnmcRb^K?6#2=SjLsl3s-cHowRw_COOCArlEGM;1)Y~tg-Zo#0M6QABa5v zH@8|$Ai`a{)J`@pLgwML1SLMSQWJ=9U1tynOgoa`1pvpr+SW@)+0V?Z`SJ_Pj3mO0 zcgODc4PZ(x5vEa8;`&Pf}DsTN8gMtM!;c3uuI^M+qcOt zu7@D+-i-3Rf#xI9?Px!P;28t1?)@5f&cNxCCx?o44J0_+hymDqZCGU2FR*dllh!oi)`3&YuI)%9<-ZaCXoc{s5U z0X^>KWsLCXgRpWrBkv*LGDNTo;40?Z`RNNgKTRZfezLkYLWJid6uxgMBSi?PClOw0 z&>lQv^GwA?cV{f*;R$Oq0;*43Z_)Uvrw1B0+*5@$8xZFe94$q#eQE0vkXH|`d>JDf z5yDo3*Jlcw5ztTESr<_@5)U|*=VfxCZPYO05(G?DvAo7z4w=WDRk3PR!j^tm?N|g@ zBUl^MVC`~e8Z}tEoco&ghaiLs>_`fe5m1uQjr%i8-3sF+-KyC4qX=Jf%}r%5OW-9J zTT9_21ej)P-HgD;2>RY;JRg;WH*VymhEfrN%fUDsHj%?^w#xw%wz$25{xKd3J$S8M z?k>L85Xx)baK2W_Qlz4i#JBIeushoh(`xQpmb9Atc!1jCo^$DJI|_|*uUgK?G6W`& zENx!6lgzAI9vTTB1<^6Epwnw%pG;noWlUrX%bU<_|E~MKAHwC`{{#N>x)$c+B@zY} zPA{7=Wx?!3L`81@p%S4F?DFOM(`w&K@)xWpc(I)!``kb1_0*`s` zEgc(Vq`!M=-q9US3l_nHT{Kt_4YHy^ud(LeZcILr%YOy@S7h47QKGHI7g>%V!(gh` z)DPsp(=A7Kn4`i9nH94aBhL3NZ7GhXD0OHKeKIO&?L0A zC|tq(P-<=n>pm}3H8NP4_O>$VGZXs0)ECF?*IPS$>oLi+VGHGi>zr+RsVoi`hqj7l zCWQ@AX>qeYorx#$pIX|y4O%?06Rf7TGW%x@WEHmr+q7eCCFk3^EPetNmelTszi2i4CDR5NSrc3KKc|%UjJ1y_5ykHSJ)Zk!INziQYCD!S(N;+X>Ck3NR zg2HGpG(UJ}=`%sas${=~??&>2YvKHGaWr^nIeZibp6^eYHm$37%ITw{{iDVCJ@dOp ziwX*h3kwT-MmxcgSlN{MWyeL&gfFiyW#>*Un?Aj4dS3CQo_SN@8f@CEC_IXtHUF%+ zbKq97N6`sAeiY3+cgF0wQ!4VNOg-zw`EzGf%qWLyTKR$#;rS0v%ks`GW){dZ$`=;r z%`eZJUf3O)idhTJof^%XS%@%w(Uf^J@`|E)LlJO3IC18j1wDI4^JdIgFlSl?R+cxv z%s3yq=~F7EB+KWP&7VJIW?A0svNg;p+JCAx_@kw|HkB8-@^Wg_@-n4#0%I3h?AO#b(0w;8)b= zb?-_qg@fi4d9Z11I3ErbdH$xtR`LV*M6?S;q6)B_aC!L6-VYOg55L_Hp>~V;$Vml(7_NLHgE1U z^trk7<{$S196!8A$wv4lUxd7G`7U3CD}&&4U)~5$?ha#9%5XG#IAP=2r+;`Do>uIo zHEeKNMkEu{Pc`!o_m2o#_(%FJ{iA}`k+!~jugd>+RGjM-zo#v!;ehTrbzh?I0H;xH5=(xh*{}%7_-1wh(f%yRfyaB zDdMgSqT!sojA(IbmqJdqH#x~3k3&~KzKC;WXkr5DNB>H0acTTHHrZY|>~Z^8Km52F zw|5)jEK`8M<;-L7J-F)>keSACujuksw*7v-2tP!=At>t>SJg+MNUmQc>c__})(@Yn z$LqHfaa5-qu%$=4L;D15jMSuRdvlR*PgunMyLKUyx}}%X>HGO2?0ejy*PFD8udIi{ z|M((I_#))>;v0Pt+GX~eeG%gHZRekV#}^^r8qk;A$zn|8+ehlhie=*2;v$jn2AJ;( zk-s@p-YDKA-XlIJZWEss*`HbNW$`WXGqH}uiSSD?K!@cx;|vnzno4dV8J9>)KUQ*~ z;@@3*W@j9j7B$=PIu%6}%26mp5{G9Uf z(-@}niy7AA9myX^=GPre=fO!f5?hI##UA1SafEmV3Am*x0h5QT2w}^L%JioL4Pm0fq)?cB2N%C&-Es-Di zu-u=;TJa095%(+7n}|n>M~fZB&Z6~S{z#l6@=GhGFA%N& zLS7-+e0M_rspM-!`Yr_xCtP$#3mwt z+@k&%(fK~&*LKwR5bOIq8Y2BLahzyAMp3T5&!h8{zCc_iUMOBJUL`tTNBoJC_4v7X zlgQs7sdv7P9+d2S9X%!aIkCRaqc^30Tih#tB=Sc(+OHMA6a$>#sITwysD<>c#15kK zeN-g5yLh5_vN%{gT^ucr6Q_zZMCbeHJju@Y(Nf7j5ib?_6DRAIP zov+lFCBGr=5uMM}k0gI4)`~vv8)+w1%ocORBSrJ2ihS)QcM=Q5Zld{CMZUh02Z^VN zW5n^|G;yX_F8+V)y$O6()w%w^_t_`O$v`INL5P4TV-hA25gEc^lpz5bOPCdnh#^8m zB!Jf9Ob99=N>HhyqD8cdiWU{oDpF8uTNFjBXoFQitI@Rjf1b6Ub#jO}-P?Qr_ukKM z=ds9lH^ukF zL*l36XX4l5H)33z-@inW9~85{EyYtr*##x=Zi(+5^a z{!V;O1L7m%Ht~0&@ga+HFG;q( zlKv$5P4Rv4Bk@!5Gm&56v;B~mDmD;L5>FOS6FZ4L#52TxVvaam93@T=r-;^f(p<^3 z17Lrah`$uC5m$+8L|O_k|2^V^;#Tnq@oCZeptZh|_DTOo@h$P7_@Q`Mq%8v5`$n`r zY2y=peX7_%Y%aDE>-tEd{Q~P7B#sbAi{r(~;tX+)c#(LCc$s*Gc$K(Ptm_l$9_jBF zw~CL7JH;2px;~I-Wx@V`Bpwkz7rzxf{7_}S1Tk4`EH)S0i5?aNt&k@Ip z6U5o#TyefwBwj9B-$yGYUoV!6*7wmy$(zK7#NUeB#U0`c;>+Tz;v3>S;$Ouo(fUIA zQgV$L#4`boV@OO9tuLe&k~73pMe7@>yX0PCe{qmFLL4nxUrE1^JX@SA&KHZs%f%9r zW;g8bYH^*oUi`IqulSJoTd}SWr9Vjjnz&zlTl_%$n|M_GhxkvC524wwc(Inh%bt}#XpO0iB;k! z;@9FgViMj}u>Mq$rcRVk6EnqbVjt1^TB0o!^N$l}h;zh?#7o4*;!?4$kEL6rUnkxr z-Xqf3itTL|cZx5H`@}zr2gG;9D)AE$x1~R5!+*b?lQdvHl(Em(GP`!q?v_!z{HP6o z_cOZoGTDFJhJVY+Xbe9&x*MG4G{swq&VM^HsvI`_iK~;s^~++ztzpG~;c{B>5A+(q zihq>Tu&jPXoAO_@>=1S`zWwr>Z|kpXQyw_#z^>mtJTTNcoE7dLrap8y&aKVUAZKRF zMr9SDv~Xisw!X7$btrLd%Ia60wACw`q_2jhbs%+h!*xkzxlZ!xHtRxN6IM4^7r#1T zZOUzKR@H$p-enzWwA?uw3OFY_8TD3|h7;GV2wxYbjVZ0eUxBsysHztIUin+_ z{=m^t=&o?9udn&JSO`1YTXxs%$Zej~>g(&jXddh~koMWZn`2h@2=|7?`TpGJYW5;G`m=_$qrDuj z6gBmKre<&MlSkde*qcLWJN{@WK5q3h`w}YB%F}O$Mg0AVInBbU6=y!&C>%JeYjtQz z*Xr07J*$KDn$ZIMn$2P7;C#fKL4B$NXZNfQeELGom4mQGus()|gWk{8EFW~!R$50t zSF`N?=W1@eX8G1bus@E4y|pvwy~F`kg9fmkz-K7|mPlS7Usp*g2kH*$iXr3Bl+QaP#OzNYS(@vD={ zNFdSJvyp`nM;puU{I2 zeb=`m<{m!k$hX}RS6%FM3O6jf_K@?t5BPi193Mfvw8uL_IvJk{#SWva{Rit_^XxJh zXC6(uu}%1-&JB5h_b>iyKN`7VNZidJj$YWkL;QF4Txxxl zswdvSJfWCRn9PUw-sJX(%9z;WW6EI0AST|xXs4-+p2=wE`Ha5KXs;EFcEG>j8Ef!A z5R5yEa6^SihHbHVN*N5kNo6QV|MW4<5s$gW*b~QWLavw!_aUk#GQPom0rA)%U!BJB zb!OnjSoc-XD}yF<@%(IRwnKq9zV%WZpL;OQjPai`W8kIOtHFdt-H_?!SQbuL)Dz#0 z?KYX5#DaoCC-6$_G$c4ltnV(w>hU4H>%^I7p?^`sN$8i~@L!@DR@^lFm*|GyjO7z* zzu~u{8a@!+@Y}I`orBNR7ol=@Fyl@#_5&_1pKPRj#MqFwNC_jB@*2gV>}MfGz9evm zG4&pbV_3^@rXHb)0P|_4HbY1`nc_JVdn2Us0kJ!Z;vE#yS(u!#lO_M=BaZD?wO*EygMxsqLB|ZgA zqZKqe&#%5y-(_!&_$b94?4A)PVp!6A<7MtI^B|^jY}|8MmaeeVE<=;!S#2LYyhytY zO&aMuNU0Op*9q+1Vv5|I-H8;t;Rks--=e$))%#R8abHK~`h3&(E)wexL4-fw>+_vT z27Z4wuvr^&CsT12{g}m@x%IJDrZ^oEo8tM5u=uqsZnN6r-1oTU_zuWz?dG!hE70*b zcKv4%*~-Xo5jnu(HfuxfX=?qSj6rnUxuv%CCitmmTF+vHtq(+`fz4`L=eh?GjQzxE z?p|B`Tw8peExw$^ZB`X;#Ln|2mFYm1n~1GuI=_LX*!kxfVdsw^(wNz7$61u`Vfil0 z?dlG*MLqoXGDZ0#)D-2f&jvPYbaC#|eObJZdyOs5pQfhxL|eRo#cfsk{ zC%P^xX~kWv6_1)$+fmNRaIwBl%oHU1+S;Ulzh434Fd*jCq@ndQ5?y?O6oN|uIt_>! z3L(C+>m?^9Qe+xD?bfCx%DaHcnB=-c>oZHelbxaUGqDwuySOKCS->nQ$2%=ZJ>F?S z+VM^c(ob@;>(k@Ggv5!a5A|c5Y~$UaK_YxC@DOR(9U6S9!<@P9xLBLBaUullX9U}A zs)o?v0QAjjMQreER=B7x+pI&2Ygb^tQ%33w(QStATrpCneiB@wg}XuB!!}eCbiaWn?D;GPNantuhIwxc+qkVK+u_!WG|%0%OdLgy_6&P2MrY zBoiIWjK>h*l^}=o3-N7!WJyO1)-D7K!oX!?2_v?(+)Bn`P2Z5j2y07^)hsNo>N?0$;e1w zm|w}a{Je&tPk~BC?nXdgiLF*|*T>Yg4h?TGy&XgFa}U_&1Sj4ZW@=o#a8+C)Y;ZnoQu zYrj}l!j1fM`}DEjrr5&OPA&`nM_S_56_u?j zVWcmDZHYUJ)_zq9BmN3bC<{(33r4NrsvlfI?wMS9G_kP+akJcp{~T=Wal{Bz9&j!z zCKn?>ZPx@*Qv&~3D8Z!Wal_>LQG&yO@U|0zAMn?S;LmsgeoxnJ6Dq(~l$iSL$QwePoDe!kB&whY* z%}wT%)d`ANr*w2I%p)1U+vFQh+=l==*OE#`c&4BUZ^cFM}|KCU_j#B*wYD z;e#Q^clHpM-L}|ijr+IC+7+F`6=M!?t->;cwc2>B{j5qrUHC5(Jx);EthhCl;Wcx0<&JPFmq?w;U2h?)rYnKhCA z#c^V7^Aqg`F!kFV1|`v;6GXs1P3ST`1idlKTlgP9liZwkq3$PcIA-N};RL5Be|tuT z<$dJh4`=jmW#kM;^lI$N@J_}7w2ew zogMj~NUPIv`yy)O7XHI+KuQRGV^X4F6R9BTS!t_`Nw+rZ(t(KX7;*c<_ z&g8Z@^ z%l7TQto1~Kk=8*MIg#-YZD8t%-2L(>ZDdrD`?*IU`iEt%ZHX5L-gYH8{|MA=rv)-0 z2}@)=t~P0%$}8>bMgH71+xoTAalfA*nk$IiOhlL z{|bF{i9cre}DqCcxgejdyMz@8k?G zKf~MQWGuSO>o~#dG-pK1)?WS49PhG>?0%t#vw{Kd@x(4c*V|pR0`ccf{Mn*mh(BQB ze=O>P`28ln-^3qFoPhkhO#BI>f3;{%r&9)<63O>KQ5Uas7cXy)_m$JfOP}z?IUR?$ zKV@R3cUd2=exIqZch0)HCCr{PT4xQ(>eLp7&%cL>^Yd;f-Af3qx?}jzj{U+TVJF>{ zw#`#AytWxVU^qR(o0Q>YWq6bNbnu>D+Glp>&R)GP-WMpDl<`XsO~!X=69~YT+1S1M zqdosJ4l;~i^UfL3e?*Q0fu^f@GqH7Mp6}2^)R?Q*T8&05S&OF6r=@Lve#DM6KRC~f2qIHGH#C8 zD;vw+{QUm8gR_q__N^VYNLG$lWLqDnwKmkg;qwVBtxYQ@Jia3q(x^SVC-yyme=<9r zZ{KZta$IxA8Hj6z?2c;8la1+htpPh5o-?^^FFuy?>*I?nTi+_gZ5c$Jk*IGkBU)_Q z^^l|M3!PDG&v&)wto*I&N5jD zTxQ~@1MPwA!Ze1*MVs&SRwuTl-lcqiS%zes*p~WPq(=9zANrRH9s7ruC6WHUhB&%2 zA27?Bj1${5ry(_}+s@0#_g7QG|7XXAw8s=v)}DfW7fSBae7M4KVL#Zn==wfthqr>z z*~QjpWy@&&zr&Uqn>T7a@O#5p4r0D>Cq$1_2HgbyLb-wtlGu%zh8(bJSWY# zhUR$q3%5+|;+ZWKEpr5G7td*k*OvbN!)ps|se9BWn{ggcNB-X1{S%p5+pEBFSMuZT zV4W_gpL55B$p&~xEScw;|4Q3zzFMO#ZoXI`ULr0PuM}5_H;ea(Tg9iu7eyWytpA|+ zq45zmo+yyV&90#n3TQID)50ZZBqwJnu7KSmdh~ z%6#ZajuXxK67o#Rh2lby_h-z%TwE#g{)zfE;#$$1N1?x8vN@kZepK@B#OK6U#C_s^ z@on*l__nWq-`PI^Yn=BSd~m$#j09OI|E45HA-?M01@%zMCZ9 zDprVfeFZ!${bQoJ&Y=9ulK&*WDe_xR_Tx)2PUmZD``4mE!f{8gZ>yDOwwRelyE@9u=Pw?e*zJ z$-70mY-j#Ii|>ek6+aWL?R^sRGQYiEwUf;GO{mWndx*nDd!4d2^XE&?4|!S6T#vw8 zC0B@bZR7c+FY`YkJ}>@W+$+8=9uVIZ&GiZKW0JoT|0Txix{@F^5}S!9i~KH={pcdn zbvETQ#IwX4afrxIlbP=qBEL0%?%+Pt@xY;E2) z6>k>r5PvOh7PpAo#U0|G#ka)2iXVzc#LvYV@mn#3hZyW%l2~7CEM|ypMSfz={MH7( zujB#ZFwxq;kC!}IoFUE;3&n-v72<(2&d=&u-$;>P*HfM;TATKZC0m>J#gh3E zKJ(uw*0p8l=k`p0RD4=|R{XvAipa0>ng3n!3-N1_AL28;g~;#mDR&q7Sw7{#BEP(+ zJW1pS_>>Dpeuq!l+L+%Uxm4UBZWJF79}@XRKFj}J{4rZ{ez?#4pNsrHpK_e|b8W@> zT|UeILgeT9l;?|Ai`R;k;$0%Y(r5nXMLut({AZEh=2QMcjKL2E%JCwG zEo#s1-MgEdKW>ZqdK)x`Q%-k-T3gh5;nFR)4@fKvhMSe|I8w6waI=@2B*6|f087J) zP?NC7c~Y0Rs7O00)Gh6+U_qPeP(j*P9vBM-z#!;?fdaP|Eebu@1O9Daiwdv2NjPvA z&x&Btm{^{M8Kz@P>}gGxDo$ zPWBG>cTd{e`Xm?i%@3!46n%W}AhRv8MMf^D0{0cAz?IOK|m@ zPSbFFS)gKilL<~j=`&42rOnGzR)w-LyLM?@+5WIwo)8{`(ZCcmQ@nDgy>sM^WweEC zf%$Timc^7gr`{HZoZKsXCgz78Rn=(deOsquR_k^(Zq6xi-!`Bsen9J*v~E*SM+aEL zUj0>iaA;K^0No{+%XP^qHE}uZaH(xw(-?VzQ~VlGYIw(*#*Mcfbwf!|k$$9qbh6;KDHMUNd{a?$te`X-yy}y(Xqx ztFM3gReDXVlU|d&=(k&G3HpB8n`yz%;)331ao)AnPQQd|Hwy-dWub~4Y2T(fpT#+G zpT)%`RHr!!)!zKLigh`d7WK>^>{yF`lTwki7Te5AF6Vr^NoCEAEo<|#dbDLt?zcB_ zT?@>Nn}s>Ib3>!5R$@+FHwkvEn5Q|oV>jlHEm*Y;7Oa_jTU1~U?O>CW28EqA-7yZZ zVJ+xh9cTd?)=rIUV!OF#1(BXs6X-@e*1zw=4Bc*S*j?M?q4<^QE2)1ojs3r_8b3@c zIQw<{(Lj7f&L8%r8SB-d;TG!#h7Wz{VLQ*?fi2{oin*@agkwsleVADJWXp~@vEi4S zoEA=8m1L|{{Uf14_^fc(FpmeU>w_&SZielu@zG?CCrns?-_Y(eIIwxLm}Zo<{{p8W z!E4TA4@W_mf*UeVXZzqMnAiRsCIn(S8pM_J^w5tAd%alc|6 zp&0WqWGF5dlC@L~#+k>pZILh7pgsNv9%pLC07f5Tw9{lp=Q7&)B1FAl9G?WCOPitd zLP7rC^@2e@j)pV{X)!|)k12I47;njcvRLJ*T^6gc!72!`!7uPXE{#3j7VB<@fS1#F zwrOltw?&zZM&jL=lNotEasp47IKI(l6+2YLhDa4VqN<3*QH3A(t9aJ0BEjXEUiPGY zu~J;z`M7)~@{x}_BpLt1&?V9pmX z&uM_@uPAbpxg#llf{=6_#nH^nr}kVy*po7KA4PNpHlh^ik1vT26x=*!=1<D>9f7uE=?;!e%uqvbeSi7QdTSjCARC&{T1Q ztzv_%Vh5|RSxpu1_*HN$So}U#G1_g9-OY@}F_z?5#3Uoau{Z^hRGZbTNH1uxBCKK? z0>4>xC%JrZZ>kv1lB{B?t%CkjQf*dK#p9-mbk;+sg7trih`ZF7fYMn?eLiKB{0_6G z^PIFjl5?5K>Ebpk-sJRUCp`hoo% z!JpBMw-NYo-_QA5lar2B{5pMk7VB)d8vl4AnuO2@W~vME->v|BQX1PwTYcL9PQ{P}T z)f$Y##MIZMThq|`wH;v#GA(7>4Xynrg+@_^p^a?<1~k%hV;G9T^vy!eh~h}WR|&oq zC`%z`UatlwM0N3qKk=+ zC3>5vnGusUe|Hk@R8!v=B9_OMGme#+m!dF$A^j@G6RaX?W=E7!e{!SylUvCux|+PX zgkQs0Tf=v4M;n<=q`p;a7$KAMHAa3=yslDrQg$yvl%Szsfz0DYil zGeW(H7Dn@}E2-k|SWH^IxRMc`Zp;kUjO_GS6+Y!cSh)WKGwz#6(Y_H8K#*mu4IJo-C#gRyl(X$ zBSPy5V@b@2Z<8{GNHwbh3*)Gb9pdV89bv&m(4Pz}^aAF9)YgpbkPXnOwx(m|#KLU^ zGrZbORd_|zrYeMWH8S{{s<6ats#i^kT;d=C8d_4x$R`M>i8zLU?Nd_8NE568^c?T5 zW+yWz2X+fuq??7k;)r7nY6t$3D=KRT{*t9p1Aj@08TfNei7~`91Q<^*F$2HE=yQo> zMvtyDayX5bidgg zdEDXr8fuM(>ekT6&uWiN*6@9ebun2-|CFre))CW@qKoFv$r(drnF_|Ar~+<+MhLOa zrLZn+QOS4{1nj{?2ZT5z8IxMBQieY;(H9G3F-t1`^K8deAzLHB95#p3hceE(P%XjZ z2iGrx!)|6OWn_l0=V3G-!IXwEE#t)|Y0RB~zxPfhxR0VDVh@6;h>?Q`&=cat}_O^B- zWSfn^pWeu@p@b{UQ$7ucN&a#)3AQBn1a2E{?(DWOb+!pvi13Jv$APv6E|rF~iyWX( zT_IIJUEm(U^H)61UFxPiok3;0fDC5gCmlQkVC*)QFybF) z6Nnu~UtChj2v6*=MkaV_NB%7({DEI>^kax5vw<-$^D0FAE8PTQo7vXmh#d$X=9GwB z+)&SLCAE9O1nvbPY)f492ySN6HQV1X+PT^^c`jkT{BV{OlkfRzyB|e4zu-z%nbdK$ zsrB$ajgkMQGXJNNze-`IFY|w!LhXYHI8+F>{@qN}a=5-zuWgva%~M+d z*HO}ZzTzxhVy~mn7umcEk-iuq>T*MsiWEl`nIB!`dxpy2n7rheg%#gq_}#I$RWrwZ2vMzZ+pRaM@irG# zKhy!HKVphRuBz)G?lCGpmNW}1tuu;Lsp1oERi@V&GS=X4p0T!Ks_Kj)RXdRQ*uJO#craQ#^0^9f)jQeznC* zQ`DiuOB(NaVw@u9^mdhuGFMcN)(}rKs>q6ThnQ; z#M@Buv)-s3k=I1tVev|g!i+LkRE`#?5E?8&^Pm5C&uN!*B(m?k`C|X=60K_)rSF6| zyPJi;wXsXIu2+Cx@=MB4$U19JR7i{{z?r>FHcMhvI_I}Mumz@WLsFmG0d*P@Rx zXrA1~+v#*E8!=)8XU}f%;-bM`VwXi@U>w|IvQ@61Jec!vcNsRqOA2ky?iw11SDe=y zJLRv8UGq&Q{&i88u1HvsI0tWES6)gZ=OYPSav|J!X_stBpC-`E`2*M$cU$G9_Sv0{ zR@!C`H%812GFrB7i3yuW`tVkl4DYEtz5K*$YOc-*3KbtV?A>8fD6CEuj7SX$#%;LyfYQCn^V)M;~9Nq5gT`->m zR)pucN3-%hNL!(;1v0CASdLg2C< zkEtd_?FUR_*e2S1)hD0WUio?D1I$v;`o#9i&mc9rf1Uc(jvrq7Mf&$D;^zx`Cl=?7&K=+Y55E~yCYTXcQ@JPrAvvx}|I z%9hdke}}y?`&GNJceTrZhrKd(FEbu~tK2fR%TKXa=2K6O39l`*SMF9@+^^R+FFwv4 z5ihsjYo2_%xj~Hh8MzVl(H{95k>`*APDn{44jk?mWJ8hm-?ZmDg+wMkXJtC~DYCCP zP#i6e7pI7G#d+f8;tKH^@mBFR@g8xj_>}mPxKI4E_>Oo;JS=`GdKg^xySX?=)eL#GO#LoVt(*L7#Hh-z|E)Fi%7fYf&KCYl_?42RElH6A5{Qb`KZj#TE zJV5dY$zvoN`!nR9Ciw!T7mHU&&yVa_@AZ;zk!rDZa>*p>GxlbX`9ha^zCtGlh@-{2bID#L{X(%syo$tjTPa%m=G!E1 z5Vw$M=W+2_@dc&7EWR%NJCgq@ekT1tMPpxv`Vw&JVf)EqV-oth_GLY#H+E%6A0qi2 zl^Y{Yl76=2xuTid73GYbGkBfytx~$RFS}j(P10``t-bT}O5Y>Cru09F2c5W|(%8!*iQR%-B=SY7MiSyAy68p_^>5bhP5pOL;xvYB%g?Y|+}*q1^6kTUWek-mn6o;P1?za9x)nrQ6Gpf~np z$k##n%v`FF&s4t2qOlW0elDyB!)a*F$B=n#rJmO{(mW>wPm$bS%oh1|EAxfLVd5B( z&+D0P&dcC5$rp&`{0#l2k}ngNiC2l&iM(H9eRqhz7B`Dq#K*)Z#plEq#62SKUs&I} z;s@f#;t}y{k=HTikKy?gZ;PLZ$HcG2Z^UGthtVHCS0<11s{z?u zZ$Lg6XF8uFlYEv;o+L(0QN<7Wf%FC)JgpmVT*twRo*qD*n_t)3+-BqvBJd zxjvyk`~;c({G({DPmtf0T-Po-f#-9io9h$UShDfQ0r|)5qWQ5q%l8w9isy)9#R+1* zI8)^OIxIh5TqIsD*1f*jxzWp%UiUh8kM#G8{05u#|4uyN^$zKOR{Fc*2jVBK)|E>7A_^h}~{DWw(qi;zz*HP5-p=5hK{akXj zXs)Zs=OM5kb?vkpOW#~`k~md7PrOhp6wP%P@e;{biq_uy zM#<*-i@3G>zEk?U#RtTP#BCx!X6E|7EdD{{hyT?7RXi+yDt;k;E%FOl=C}6Wb+6NP z?Y=uJzn%NMmt;HlIZX>#-)M1yI7O^G=Q(W;nE!I|O7U0XjiR;xE|+|}xKZ3B(tLsS zZ5Lk@cZ;uycCPdHC4VFy5kD7c0m1s>#1yf<*h*|8b`ZOWJw!X#`2fjb@f>lC_zQ8m zc)nO5E)eb9=hpsvh4j~ncJA|AB(D>#{rA0+t^M~SlIz-mzaag~B27Rz9&d|(6aOw+ zd+=(>)*jr$Z)cXX_TZ_KPZCcSPZK+dJ;XD_LE=zxv^ZA$g*aV2Un~$8h>OG@vje|F z`F<@vAU-5MD_Xm6n!Rv6?Of+}Zu4W(*R}I*fO}o$Zz7&5TKn!^lKY6mMLT!-RLL{M zOTs5yy%X#OdN}v94YCWzt_EUL~#+X_>@!ZWpb6_$J9)#7D#@ z#ovjvWn%eP#lMILL|Qj7-P()C;5QRxJIA=4OT3Nr9YoIV#(X*A5Rvv#)Xx>|T;Z2W zwsVCqmrRo>=D%5_M?(E9STM<+QJ&Z0*ZwW<}ZB zmuEAghSUQr${(%6dfRFO7UlrIr46R!|yipBI&@ow=xk%n1J-!0M-i?W@& z+s@T}O!}|IZ$#Q@F@L&9D=o^Wh;`@Wrgaw6hl_dQc#%e1Outa1$rk0MB5kxNmx?si zqP$VuEN&5L!Nv5Q;%;%TNP8}(|5c;`7v(QR+Hp~~b7`kZwsUFIyo>4WMH+We?jzEg zi}EOuMqQNc+}RgMo+r}Qi|H%Gwc>3eEx(v<=gPKoWABxo=3Y$yt7zxOJ|>w)Urdh? zY2HP-iAeJ<${j@-bx|H5)}0fZrdv!uUtAzA5^)>x-|81(h<@jf5Y2OD^p9W8v7gh# zS>oyXUDtpz`fQ({U=Hk_U454WKgsVv*R1SpKmU*W9jNYz#;^&x8=QtV8=5(=Z^j(h z$*b#?C9P_S8L&@T;m?2_g6DyhvU=+qb=#O9&iJ2sR75 zXQr2p*_#4;_lzB{R683+RrL=gl{;<9!yAtVlIw-tQ?Ct|g&SkW>$tr=z6vz&{#79H znVKDExV^vJ=brv%V*a3kRYM0Bg}u*Gyv?u?-)mK@+E!gOCfm@xb5rec>b=j*Uq^92mE+6NGeZ;Z-9&)`A$kj!qGsidpIus$#A{OMme10`Nr^ScnVnb zP+>SP>|{76cdHHz?^+$0{P2M1Yp!y?-1l7Kz^eWOlhMweLA8DVU|(omYK2!5YLg!h zl_gc2nbRtqUg2~+dv6NcI(VSE*N$;c%W!_xE%CkfI&Id4SXN2V>Ww>J5_iDhp(ccCYDHc42W zwC=SgURg@TWG5bZJTIm!a5Tva!t;Pr7KB%Y*s|c-1JzA7jIK^97+sw(63@5EHjERJoTfZ5NT{riT7p9vocKOIg9$CSJ9?C{mHnDPMlKIpY?vCmuE z|NOMlz16X)32Rq`mz}?>X2;s+Yj%8?wjQxg*xR~$Yp*{4iRvWh`I^0JA%BS3%RB9= z+1ovSy>t7hs<->z+jL~r;E|c|3-OmTUQK*6acI?$p~;`6B*%Z25;>#}D8xJoH_11+d-EQ4-9LzZ%gE1dfwK_3y#7p2&_Od(K36{D& z$6#yFn?+oyb2uCuTNYa$gOQnHW)*)tyeXW8`P{RsLmy|s7e_Wmcz4Z>oNXMs;Kwgu zZgF^PfIeXKE@m7LIn;8mdKa^*J8gm$gTkZ2C*?c=pAYr+VvhATacjqfdsGJwqvUY+ zj6F41wfWNIM4IbWJc}9F`w!rV^j_8~C#IrDIM8$bfQR>m%Hu1%b%7d81X7k-k?&k_ zsNU^Kw?)r69>Q^vT%J_Qna7jYv=8I_vg(x&yz(LE@5A;>D@`cB2HWo$Y`8;8@x75uydFX zLjB%gq(sh{&{nl)BB@45G#upfOv4l#ZCE$|8v?x8%E5ZzkJYkL~o#YHuP?o zsn1iq6|3tGW-85-aG{21=02yzL~4E3Zze2XO_47N{RzvzqBwz>$FQnw)RMN~(u?3= zq6x%vkuNomnT^P2hyEnsMqE$POm=R>1Z*dNvU4NOftWVG7``c3@m3?j8O2yi=i$eH z>Mz*pIEuI8w{Kc;7MxG8@8{r`qnY{KNc1~qWJCgb$#X%AAGl>3# z>c-*4RE#@6=5YA*HZ_-(y!{aV-vxbrzVY=%rvcxdJctCojdx!-69d_BEL6LZuOZ)< zyw6Al`URr zi$BKVHfwZo7Ns$Rd%Ziv7JtbWf6o^Gn#FC_=;ADTki~Cs`CQbrUJoCqn9iTV2s?ik zB8_a;=;ADD3@vVSciG}&Z1K6a_;MDvSyeo}ANG!qQO4gp?layi)*z$5clffC&JzqB zVEVc4Ho5MJiUHd`BSk3ev)#m)(pw&LWQWj)8rK z@wVhg*g4?@quNA1hQI`p=N*$^itAqn2opPkFR6SV7mUqEKmxH40XC4^N*G}+-}Qvi z)>Jcw2qVCTyrhz~@I@AiZZBcvDg>BSB0aL;JO))Rk%0gc@qVQ3O0KD73Cb~rw9Ows ze>$zKVYWofLNF~dVlMj5WP(*1JtIX3=n3I>YBa&OWF`wEYzPzjqGV+82eZ_epE4PJ zilp&&EdxPgISWx#wXKAa_l$lLpA&E1sDMTmvZ4NkhtIA1ekz=%Q<%_SZ|FvS_!Y4qa>I>m6g9Y0u(oEIh5ri?Vjaxaj;X{~BYrnR z^px$CpN`7I(P@Veorf|n5wXtbvLI$_=SZ!rlZWyKlLu{Kj`VGazZ50gA&surjz_eP z1H-Si>@@R?b9A`AcK?aakFJ}An`Qz+bQ)!T`4H=1D)p&lL4Hkl#K;&7sQ!s~D%y*6 ze3@f=i)q`Jf2?lakC@qek)83YtcNPPORh0Y-^oq%a?zwtyQKj zOiMq-ue&-*X5HzgZa<9c4=vcd9c$((M;I9T;p9pRcHcT4$Z+q1I3kglvviDU7~E3IbO5;!5}yaA>@p`!hs(nN?g%2 z-VQ`2hevAbN~)vw!2M?R#}nLpJZI6;$~wCd&-^E-h@EA>PLO1~TiYS@$1MFYGBXh1 zuVE$dmLIk29p%M=yKA9I9mfxn(J_=6SDTSvF`9)Zw+#pZ?0n=-KR%z&e|Yl2g`TBW zA|T6r@1l<)k%% zgm1rXR!NoLO>@Vk{+JSsKZu|bA(f!Y@7icP9=r)^guq(~>thE7Ip|Uzk%2(ZUfj)E z{ODb1Dss<4pyL|ye1sUdGJ*RTMtP{?bV=|R75p@nR5G&K*Ar_HSORW&81>Hv=Mub8 zz{nFj5R5k+MtA~;o+pgAOf;7#@0JKS@e-{~G>_ov16rOQiV@h}{Tgy%;&<>v{X}xrt6B{1bQ{_X%G7a9>QU zMev- zn}xg@0lOT*9mQ17$R=M;a4#|XU5M;4`g1Y5X6cImvk>U5ho@|wj4-MMhn}rW0(BA| zO}>hNgP-uvLJQqW4vRk)=hmKt;lTAO37PftlP#CMrI*kUnkhI(KAwvU`_V~OpbZAtxdcz|Uf#NjA9&UF!${Y(N6F8DN}z(Gbcgg?ZkqwNsKI+x?XXc1X? zD!4f2s_CQ$hgUef6Uqs0k;PyZ2D(zIyGg^LTV~b4ilRSSQJ|8d(t9TRvmttZkLIAgCq@VSYNY*fRv|NO!4)BhU>L`_cY-#$0 zUni)@EY#m-vW_J-Bd|{-&oR+`V%D_?IL{HhZDgP9?IYrmKJn{t|GX0!lquNfryVImr%&WTqTiiYZH9x}egCko1 zQ>$ei8xZQ=GjPpTBJf7xZm{mnfqi~zHWhx5*tV(vsckc_+BP>BJN z@VgDO97JCK_T~7WZPcHr4y%v4VamWMmS=n{|XYZs=mY!*Uy zgkA`=NU#gnx+_9=1P)5{61{%LD!`v()vduNVJ;TrMR0$fmk4KI@62%vW*08Vym0R9 z1q&{kJ2Nxq;+dCTG<#mrg3KAy7tAi0J8$-a%(279E3frXjr%A-sf(gP|vx8+jR8Ohk0|lc?Mmo_ zs$aTvRmUEgnVGp`2e$DRW_0b)gYJ(ycJG+&y|r|`_oy4{5@_4xBrjpu@S$1wYd^qS zJj_ciTEx{&=#$m*e2z?~3=a;oU%KK6uV@v<)q|U(_>49ud57FC+5LuRW_ojmwP@So zG_>R0T++u|oZ$`X(j#Ep66Gu?f?J@xb4K(Zk>mJoh;W=0_3VCPM?^CUE}nT|-rU8r zvz_m8Mik{^XntPd%xoOvQ_L|w#UA5RBFFfY$T2?U`;PG`a~7Gj@c1b|c#KcUE1EtJ z=YUxe2SalTE}mZG%qX~U;5_(RLRb3xT{iv3Dmp*!T$OpeiM@Yhu-XBBwXD%Nsxd?N zf7d}#K|$f{^YSmnz-mwES{v8kD~s`#et&<{gT@bz~?6aEk25hW)~NA`OZQ1zu!4g zbBrHvk75zH@P~Hv;@?Ta<`GKfvo~aQ^D&LfsR$v2AIsMXdFr;iH|nm=Mu#XLV3r`R z*tD;*i)}Xt3VfmzS(;?yZWJrk2pV4GSs(i~7QvQ5)VUhA1M{L3Hae$HzR&UH(l>a= zZWo(x1{Bflo_0DEXq4@;J=-pA(`^|$ zWCXjucO%X+SqNO7YKKqJ>eR>dhY+Ikwe4_XpF>Y8A7GZX$QSv21`XTg!iOQz{ac3q zr9#L4r6bt>y^J`z6L}o)KI-G9vx{BdG$^9F?KH>t@^9Kqpv_0xV};4vGO_MZHb&gG z%YLwL(e-_V0qP8$U2J_;wv5*QJA4i`v=tlL(ess_e_I^M;o-4b^x~O4yH?|wJu_P7 zo>jYeX3vP0Q;lr{$HQMZLbZ$Mf7lmMcz9zIy?A&8Y0q1{R?z3rcQ1ALX>cM3L%axL z!KvYA`4H;F{5S`66MKvO#jwa{RLnO?%ohtp9^XvoFL3foag}(pc#pVMv_6Dhl>C}_ zQ2bE*MEr;NPm#ZY*Bg4=?K6AyJRifIWk12luhX`$sVnyTA z0OeXz22T|`DLqTZe2ah146+(@E5<2wL+RPvKb|D9-k2D~QO_zXb)kCp!)qV*N)o}u)!#B;WF z*uHO)D0fiu-s(L$1P+Tgm5Lb)0h_{P(i1&#P zioX>f7oQb(iF_)~{_v?d`4{nk$Tw8fSBW(Cp!_e9&loAki|Jw`@g(tNk=7y1-$OLl zQ^@@!4;HNtqp_0t5}xJEbrqZ`xj>vRE)p*nuM+u<3(MammWk`c_2NC^{o=#oW1_k4 zqMjEd?-9-Q7y7?QJ|G?vtHh(?KSaJ}VZV6uOvZ_{iK5K62V^6WCMc9o7CVTXxsQ5t z{RVqW9w-hL&lM+$bHoe8#o|)YT+dP8jgrlE9P*u#9~8HW#%CYW&2=1nRr)u?_rycu z7vk4qg06GPBEOX2dYS7v*iLc>aex>W&lM+$bHoe8h2moIYVlfey?Cc+uG?t$QOV}I z4SAR3SH(BP_rycuG4TtL7EWBBWU-~#TCD4nudnn2#F1jINE0d6cY(NATq<5G-YBjU z*NZf&VtI4@2JLnGIq7N0!t_1jpTsxC_ryb@^#Sym;lmMAt5n~1H%Hlp#_ zhx}b6pDvy$4iLj)-Ru94`39P=az&!`5mX|1rD*RD$|T<^n)?LwZ=>Y<#ovgJicg5o ziRQimTx>126EnqbVsEjpI9MDm=8ETv zG`nMa=6(Y#l)O+Z5w8@l6>k)87R$vA;zn_^Xnh7fCizKmr}(1y2k|xWP4OM^kXR*t zCVnY?Bhv3K*DFCx78{Gr#nxgwF;na&_7VGuL&Onco;Y5dCe9Ks6fYKw#UCBw;HM{u)(24|$<_za$&%ZPoyG2AFEK|PB90cV4) z)-y^RFHRQch!==;eG@H}eua3Ac!RiByiL4IyhnUc+$ugP{!ZK_z9jAw|0upC9uz+m z4~y1^(HD~I`Z7ww4>qoUs@Pa;E?S>Pr%BEfyNP|p0pd{c9PwPy`aGI0dA3*}&KDPn zmy0VzzHeYZZxYMIb>e#Q9`Sy0tN5t+JMlU3C2^1VNAWM>d*UInt}mspr2m%~i{H@f zXM&g}HWXWmtwkDoGk*{9EU~{hL>wWG6(@+(#95;CxpcAQVsVLhrT8oHCb3LhC$1Oo z5$_it79SI7na=*dB<>UcC>{{s75^?C6~7k05$pPDN>BFdZzQ%B+ligUY_Yf4R~#%_ zA5Ju#XMbmkw4JBCM7&14L0ltRA5I%2ZxpwPkBBtBXMNVE(`%CdB-ZuqMC*L!|56OX zs-AL4OcCpg&Baz?JF$b-%Y#^dm*O17LeI#0$iE;zDt;xI*MSA}n{4SSHeq z0QL8X4~kpG$Hk{ax)Wgjy&}B|Q2t2#RQyb=5x*7be1Q4ui_OHAVmq;eNdE)O-&dsn z0m__io}|YCa+XNP1C*DDSBk$9ZxYKy`X^xid&CFDt>P2n(<0pzF#oF}oe@y}K%`Fs z%Ks8$(tJ5yOcNW5bX~yw?L~Sgpxj5KlLE?P#VO)6@qDpBq%Q;JUnbIB0p&80UJEGS zFFq_jCjL%*PNZ`K=KquUj`&ycu=uI?rC1}<-vP^~h;(~E`BX7e>?WQmo-NWl0`upI zlf``TJn=$tfw)Md!vvPUPNd%i%6Ex$pFsIZkscB#?-A)Jf$|}d{t_sEBhn=TLH4!f}_-$2X|+lr@&oy07W-%YUHeqxR|L>wVb5T}UK#989`Vu47jBi6e_ zTqa&6t`x5q>pnl;ApJ&hlek&jCTNeJFT5I_lB;vxaeK#B2QP%@vdQil&)3AlKUUN5 zt0~Dx-DLR23cNk&#cC>6k|xpS}52>*JgwEmp)IO?8rvrn-HM->z4xgJ>hPYIJpK z!IyZEtcwSi|Jm5LUZeEsBu`Ybq z!zmS^O04HWtYboQ1$wg~5oO{IC&VA9?!E;c-Qdgb$`Cz*IY)lGJnnE(>?C-^b26Nh z^RUkFPB;AF0Xu7A=nF3ezVN)@>7xeifw#F`Iq&cD)}^4`;0Aia^WZfuFK2xizV|wg z+)JN(Nz2f}s!>%dl3In|gD<>WlLqZg#`<7<+*xL9+*|FaVC|PgkIa)ClO-GsG zB(^zzJPyK3UQ!FUGWl?lvpWaA2eGZVou;7A?iuK_wiUONdp5UI^3h=O-kitfC2x0l zzUjrgAKo=QW!+shf%M!^+G^)W_vMLe-SAyCZvDxjG0u%m>X&+l2fEif{hP&=)+>)K zTiGP3_rp%YYWN*2YtZerCNX8n6-lcqoFII+HSpXruOd+9!jE2jnTt_qvL&~=!RFlR z)ZI>7=al;4_;u~Vnc)rLd&6VG)55vcNgu--;O4yQq}_XJ+-vgSO>aj{@_8@SIM?j1 zNgjl4Ko5Z*zf_ZS-ZM1`gXl4DPfgM_@Y5GS{_~J`kcYPR?@Op~*IgSfZxUB=Rk-4z z_2Hzo?m_O$7?CrvPj!6ysGIU!O#*85&U-J6J#5gL@F)A+@}z9H^xc&HRfF7PDS_LA z>qk}nc>#PidY!^C@Nw61+JLITfh(KdIVMn+Q{5;PPR7d12dv(gR_?70t&2Sz_S_l| zM_v7jL~Q%?iuyS%!ztyXh9_YB0&OOTFmm3@&Enu)@P=h^6`{3>>*~RWWYP||+X8sP zyV8Rfy!ar-Z&X!$GkC)bC4_lo<-#}Pm5JErz1Y>x;Tw}<%3{i~=dOyy-ZR2%v(v*k zrk2^gCwkBM4;)k2PlK!ahR@B}hNB>UZ|vIs;d8McVdSFrqhQ6WDGSlNpgHc>5893W z>8+ftI0oV>63uZ(pMF;+Tz)9=_7HsGEgKj(GchNCbqs~QvU=qq;|s4IeBt5zwCaHm z^1>4j9jMMZ7+OE)!%xFYt|6H?e4$tzWX-tTx-sGG!(=)N!tLvu&cWS+*n!y z!&h7>UrPmIo}d(nn*+)F7`X#ykLLei%qvLn+A_8O45Nv=n|VUiOe~@%6tjXtD2{KY z91#Oo06foV;=CwZSh!B>lTRK%Jdr z93Lf~nnYho{bFzBlN-$F<3*GZ2tzb0<%{l=CV3w}2nCYnd^ zOb%}TH+-Wol5ZQN7FS%Xx48W#V}Is3ri{)`33=9BX|Wv zrumf(5NU}3J#m_^UsB0PUtdr7n|msu&ArKNZeFus#D0BAY`+$j6kdub-~}fG+mE)9 zIOd2jg7Lt^$OvE0?H$6_f)y>%0Ku#YBW-=5xRMcm*@u)Rm5dBPK#vJpmYOwTgr5bV zCStzPFI-Z|2tNyezIG28&pl+X$$|rs5$+{Xro8>I{TBM0lJIv5w9d$CU(bExPCrU; zAHj}Vdt8lfiGkK;-(JFP%`f+{0~7wXF7&tc5?{{^%)<s$?YD7tXKbH=wjq#efn1R=}z-!lM-WsH1Ls$qbAHzpH?r@COq4 z87cJjQODQzsN-uihQKWS@Sn#QsvtNJI1j+pfqx#L%#}^&MZ))<<8^Jz^wyPi_Hy2? z;Z#I$KlGfXODgN^kUTYgg4uh7x|kG(emucAoX{<}|~Bqu9LSY-FG zDu{sqA_8K7a6|+N`zre`ON4+Cks#uZ$|kZXalsuOWYkec9dyuf!vRIdam8Ih7*I!p zIL>$9)pwoK1Q?zF%s216*ghg=+7;W! zn-s6F=sFS8Ot3HEUuID~Ue0(rvYqW|iRQ3pBf1S}EVH!6e}9kU8)r?ttm2rkw;dX= zT{t?QvDX(^U<@@{?dq-hb-V=6Xg+=0k*?w#?ul>AXG7b3&R-{p#jEg7k zMU+^`-r+E;NpL)u-=v(uxmaeOs)k z48fhoE#?kmgD`B;;UAM8Re>0kr~twJg7m+1|EQ=QfuefAidlG$MzLCFKT2CbvfE5O z$-KtdPryh4@|mSB{$tl*K`JfWrr;8kc}Wd9Yq%Bvq6drrx{#PPrewl+-?7H1!v5$_ zRhq-wCO^-(kT}X`1a?^5X9V^~z-NTnbMhJShoAQuQRtQCwfn1AyJtbHadR&{>ZQVW zM4mS!&pSEVrk*z_3fB>zPhQ-shj(#LFSV0*QBUs=PNb9f8@Fd<^zGJhMAXZTwla<* z78%D8TQ;57yj8Cbt$V;a6?1!f)k@AXeix$Nke;-C3T-cOqux&oI>B#)cm0A+y+S9~ zZrr?O^Ze$gq8jx5a2o%4StjhwF=%a6X}+q|M~08NKB^g#K$T^=NcYfFrW zjg!67PTq(-uQ6Hx{vH z3&4NepT*>vvr3{zxJNj`eL-=bIVFzo=pdfRcubJ%i=(|C{A-Rc%=uhQzaiF3L&ELF z_?dIYPMZ*P2;nMZ5It9qm4S?1b^-Cyb94&6+t5ZjNTon%ykgHt&qQHc@;>tZjaN{u$AeXHA$k z0S=FvMTa9x%L&SIYTHp~oC@DXGsaDh&YCcH%IqmKXGB})w{LxVdwy`l%rE~t7C5Du zpOum6v=7|yc)$Bu9}ixA*E)IV(hix&(6y1{wm>kc8;-jPrKk38>m+BU^iB<>CFh2# zxz*hhyqaz;x3*iys~>9UI(f4%o?bF$ELbwj=VTkAO9v-!{Fst4PTttrvz@$S`FLoP z|6d;ucDJEJVwRKeKY|svMYFKK7F=vP?k9%%T%8Nk1^YR+3&h@*&BJsx@!n*E-(jK{ zk1IqN?=#{{L1Xmtk&eH}kj3<_Sg!$CgZB6x-IdVU#l}s9!iE{g@7GQ?Z!7$iHf}7$ zV7Z%`I?h(~3|TJA<93j9u-ZHbI*%hklmRU^?n1~xd&Q^wkML;^Z)M{4u147ALC|>% z3D_aEi;Y_hMbO^DfV~XF+4}M4qRm4aU%(!JWZA{Wt%4$GZz=3?`&d6VkF|Fq0Vd?B>=$QG7CqR#3M5bKsAJ#2sFT3&oKYTpY zM7?&~MvS*6lvw^>^7+7P$gzArn0x;*eLmnSj)m7D&h_Ov5yFAY{Z3XFYmta-LgFQ6 z3+da49mFnTOyuJs+8H8F5T}Y4i3`Lf;xh3T@gDIJ@wei$;)~)A@eT1q@mujQi3{T2 zMGpsV2p5)A67{SqnLo}c<2GsHPm-K3xt-(!$^5n*)Ax})K=Me*W^OLxr%Rrtcs`S5 z`PYi8MKdQC>F<&JnD|=~`sXC`;R@wllKBdr^2d@7is)#Vax!s}vb;JXA5>8`b7{d2 zl##zs`g0_6m;uxADGTGrN}eRyj9EZDpS3W4q2jNQZ05`&e!cW)ezPBV%5i^~;|}CC zf-=uX(mWpkn@DaZ@}On>X`(saAorBqR~#sg632;C#TlYG4w3&7$=8eKID~$+WOF=1 zzDx3b;%4zN@j1~Pmq>4pOK_L;?};CZd&R$q72=N~$6;`LbH!R>J+Z0STr|fi(w`=| zv&dl~v~!NwTQtWj^g|?%5hsWxVyU=LTr92>&G8F694^6f?iA_hnDQp^3Gpd$oA`og zj$@>MPx5Et9`PITd+{fc&u3W<$DWWUi1o#WVl&bBW&2DgYVmgQF7Y9e?;Tj~v*PpOc5$cpmiVstsraS% zwfLQAe7nG|i<>j;N5l+~Uv4z*DMm%U8le6Zv86~4wbXYKIr@ikA908{LL4X34;IrE zizTA*5d(dh>zd#yNkWVB5|-dT;#w~mOn$B zBVH^n6c>xvi8qR?#I@q>;$7lKag$hi4myXjvV1%D{0+%}7I%xEh#c(7^xuni?m7GP z)TfG>Vl}a*c%s-yeD6Lx$5&I+qvpjNxn{8DcZT}<&y1O^^KA@iN6u;T=i{|Ul9K&zAnBk zzAsjuqyCNb--|zqe5SzTh-0kD>S8^yfoSKZw~*XcY%dmwh2ptlA908{LL4Vf5@(9D z#d+ca@hb5;(auf3SuzKOv;OysmFJ{CBmHyYE8-6EE%9CP3-K%Q8}WM)ANw-pg~fES zidcCLI)|mRejUZibI$uqKUf?mP7>#c7mFO%PJ7G5)#5GU2Jv2z1K*kcN%2K-ySPhy zOWZAfBJLIcB36h$iXNUh(0+WAg$=lG3p$66dc$M5D% zYr5tv$NZqB(Y0F-+_&)M+OOA4!3;ldMHn;u`q#gb9>V=+F>5wYRu!yTlCz)aMHj+%$7@jI_5O0aVXrP`k`<}jYD4D>W92u z3pX#{+;xxJwO~)UOT)u%evLyR#D@^?cB+2JRlLXeZVeB6RWbi6D;c(uVD+t?zjK}} z>>e9c_|WGmYpSmE)`pNGWknb>_j1=2zU7?a9Qfk0taZ7VKUQ})=SyLx(9-gnkH^C0 zHDgXo=fIyXd%o5=F%NU0svdHO=Nxh|ORxIjaKrC+zLw**D(D{iCM9%3g%ka(@bjH1 zYjWcyR9$yACUq4YIRCN}Ha+#lfg8iOX5I2Y{q(}uYer%zD{|IknORCXn5Bd^UV855 z>mqey)i8VO&db7>@s+f)!2!>!9dj|)E`3?wn&C6Dm*uPpx4E`vcc;qomuf~jW~?}+ zW-8`$Rlg~vO=!jCPGm*Oy5tq<_0pDSt_ZEie87b@4ke?FQhL=mlr-YKij!~abHGU- z8XF!P7JE2W^H6wN%|qT-8#X_-xp0qD7~7K-YkWAl;lj-Ydy)#Ghm+gX!X9{VbN4+? z_a=vvb84CWfEH%lV>J(j=GQ#repRa?^vdrxpS>sRye5aU8b%LiwdwQ2k^^@sS5{7~ z3U~gAKP)_a>E?6yB%OQ8;j9ZH2g8va-BS;SQ=i(IvHtPc>9NrI&tfTilQYuS*Z*~P zIcwf&>C?5`RcFWM#$JkfyKg<@6clg1baU-P?%ui;?sfGKJ8j(6-)-*m!_|itcXw9R zKb-p8pEg%R`J;Zg`uqBalX5=YnS6_PYc%#+4);yN;)bzza>6klg)ioG8|Z$M;)W`! zXQ!?Wt?9F8Z&m8=91vOean0lvN$bM-n76ttX+_z$=l`nOn(FJ)Vwf?Ok+R0y+uiez zoUC=;-i#E?zr+4XS}|cqcx@79X4YMZ`E}`-SC^K9`LCFKg?;9>2`$T7Gp_LEni&V( z40lDOKqFV#Z~g785+|A5UmF~{_p)Reucp@W6Emf$d{R){S~uZ69+LtEjV*=Ntk zRZ|YSDcoyqiYFGH^=;8ZtmEdL=f*n34#qzGyhE(bXIbU9e*RuX(blZ;=AUQm=;{rEe;T>irDiMaN% zC9N{E|B}!%a4@m-VIVoY2me#d!{*16-6tV&*h{4jnX zph{az8VoDvgFu&WIWXRuH#aP9dJ<%}3!h2HAg8}VWmg)#o?<#7BZHO zQPc4Q6jKcu%XcLi9Q*3_rZ|(L$KuYT$UA5TALF}yD29+OlamRHD78YeOim{3ONkDW zGX^nfKZ<9U27zyG}7Bf zY9onmUotsM(ZmfjlFfG)CCphI%;wxl0dp3OKxZf!wODZ@uFiq@5fb@g3mhmJW^lKO z-As`Oq#ye-#4I+jFJ|y1ksmC?yIX7$h5-)YadjWWDja<~9_uO;mT@kPe8;#0h|Az( zYG3r&^U1D;M%#$MCMJ9BE#%1In}{Ze%xR54dj^^!uo!_{o3d(8Xm-$mZ-K|x4qDjF z$EC&sV~vH6t%a6&Rhes38Vi>|gZi>SzV_fF(`u%^XNFke8xUR1RM?kqXY%T-aRghD z!7b_S@_DE!@DaqC0{?(O4OThVCNqU~sKLTa_FQDG!R&)vJ_a?}dn4LpAI$)>zm7nz zO=?UWOqhrwyBSVC%FV>lY)pjlF5Q?ofdQJh7J*!w)R?#x8r32XCU`M&FK~;jiA~nT z@2!b;xH#q7q{hT$yj=Mk!k2(OXkw9jqcyP-(WVynFu+=Dp$VJx1nxRzXVzZKex3WO z&A#1c-)*yh!|XO`F#8~6kk4GTaCJknvjI101=q52Nrx2o00u7nh1sFSrd#lCOR`<4mbpI zZBpA>pCB7whun*N{+87+=hvG^?6-k0e+k(yYyi#*PEK$ahTwd|uWx!?6;_`C7B&@u zT$|L?_c3T>VlJ|qiFP-H@^I@no6Kla-xsZk>KN6MYm*uiW1zv88d~9>U)MWKT}z<$ z>*~u_nPkVAnO!43ks7zv#<<^gPUp|hu!5*gl9D8ygNtHv6(nIGB@d&CF~>UTq>OW_ zM$=uWI4PUcu1!KaCEEyTdG0Z%apMI@a2j{Uk<+*{kDSJxm59ZKFdY-kb6pmjUC+(0 zN?}O)P*abbBq!g@1JCsn;RR}2X{yNvYQ>4-)dN|RXbWEt$OlefdK}~F?!aWKYcasK z#)5r?&e_ou$;VtBWDIvA_H@=qC~zW|a#x#cIl8fUiF>(U*A5 z1V<9@V>L+_U~{?7P;9GN*cAP+VuBPg0;}g-R94Oa+Xnijz$T-gyP%wbw~T%e@rAFS zU(WX82L^Cr5G_owKhX{=W`38IGtj};_W=CXEn*XWixo4iuP#e&Tetj5G>f@GIU@-E zgz=pDW#tU8fiOvq?J?H`2NS#(c@8Sa0N=2q35XYb{rqwU*crse5FZ&mHj;s_eLY*R zooSlE1aB9ZcelVyYFlLV1Bm6mettOvoOy(uPuy$tv&zaDc+%Gs{tg+O*daw|FtfDA ze>Og*zY&8>a0KD+18gw^Y0n>SLh7j|8{rvLv2;7eql_dOqG0)!@ulag=Y|`c~wB@^|J^K-U zJEKt;;B6a?m5WAUTQfP^@D8jv90|V-FAlch(AS{nQOo3sqn8b17B-@P91XMEhN^NC zSq^5p6(%q1g^Aa7Aw7Z>2LQo6V~+AlyU0H`hRL|uJ)C5)>+o``j9+}u4kVwqq()2@|e#9oM z&~63TQcP@HiD6X7EcP6uj{BY6Umm!CzZZGxA2X%tPdojYaRH?deKhb zg!%Z5t#UG1_9IJsFzj zfwUz?OHF62xz5Fbdirr}{G#K;Q9lxEhEozKgPH|cvsIsq9Bw)5MD6-OOldsE9$?3B zDIRycN*=$Z7|Q`i$8RZnWY&aFkwjaT1oj6HSY9}hBCtP70{g>WR*@pGKS~1ogG^_G*Paw~ zf=m{>zXIE4cTiy4>>deho81Me@bBWEBBoElR)xxLh;3x3Y@?`A&25LrHEh}qvWGcT z+EKw))t)K;1eth8O2Ng%Y(t=#ttCD;Vp9hiFwpWgRcEA7%iHn-EpJoVmX9|x+kFAn z6vw|}nakBLZf0vX(9E{*Kr`Eo4K%aOXb)|)sm&N@W}DGAv%NJXn||o&b=eGav4)(B zFC~}z;fqNgF7SRpaC6WT-vRjdsv*ZV*sgACB5nTK>Z1gG%c`f#I51(d{Al<1^x1XdH3XHNT1f(GTlv zq-JlM9U-zO)+GM?s$I_Dd06oSh8UTMVc&0o5liXmgF#;D^vh_6363OoVKp8y81Vao zBW+(0srh@6y;K%%k2d`3fd?^IwTA(Ir)@0b#pW@r`0+__@UXGV0DsFsPq4d)?ru|D zN_hCA8%_A#!y&{1tmxmDl{3I=IF3|e6;^FFgKJI90OI~c3_F$EB%*>0zJe8{5dIIF z{)rzpgW2)q@LFss@tFz6`-m;jB!0{1m(N0&zhY1u!v8VTsyy&ZrI+o^v#oMrsWw*p z2IxhyGmpJbY&5}vgx{y18n5rhS|7@6l{RqSgj3)*&vA&NN$!u!Q5q| z%`v;o?34d*`+>WIMR56WzCF7 zU@BHLl2wgFU^LbwG}h@&%Nb;SchOJFX8F)HKm8u%(ve}+MrK$$HY{8BpOqhkXRMmj3 zxw>D{R-mc@TXT=m{o4Us{#7r&EBGF)2rGVU`sMjQhN%vyBDg)U`&UWDI|F_Z5*@JS z;v!toIM^p|P)8t7-o_tcRo>@5W;;;ma6X!8c~AIYo%do_VtP*uaI;#)-3|3Jl# z{yA#fllAL$WF4ar*?kEdGgSSDtIZ<&nOY3Ab!Da4Z3$E?58_y(ivP%`>OWjp7FlF! zQADt3l#5<-LF3@h_Xg#*$E3Jp9!9MBJY$N_^2|~QvC@%6)gqIMSF3ocO6_Gk*?~(J zRh2SQ^>3;?%~aY!R8=aFDt7mdd`e-rVp$~M!gG?1ju?ON$MioDocSHOHt8Nt5{MS(ZU{c1PTZM2FPsSS95wyiye-h?! zqC}gSUAH@qOi2}gu^j)_Vt>#4{H=wy^w1{ogFg5GEb!1KaC{!?*0Kt={4QjCJE>At z1Gj_VttC*^!0q5zw-(y^SD!E0R^0%~cEzzC%+S`q>ml4c*kS_(TJ>>=&mXDc?+8Ae*4|-|sREhmV&CEv!UDaP z&k{j%g7f733@guFyD$7`}Dw;EG_Jr}H3TGA3`9 zP=xO~t>rm0#!Z_ueuDE~hjKsXQ0{c!pWL|Vv!~1+HEGOSjpnC!Tn+asE~( zYA~-S(bNwcRoigLNMEO+7AAD_oIL5iOzR}wZE@Z1v?0=MjO%vAb-(vr)OjVQ952IK zdMa+|jX6DK{egI{cl=zoD&_Hr&*t>p?DgpBJ?m^~-j-XJo#z#s|MNO|>1dxkZ&sdH zH`=)Fi2Qo_^&0i|-dwQW+u}xgM&7OGWkhX@zLd%)etK@aiJvlxjdS6&ZmBn`lb6%U zcW5`vi{*J+v5yKmdDpsI;Pq}hY;@;t+8Uva7cZg>qu6W|kHJ@9(=EN3y(sE+K#`rj zLih|sYm_27&iDP`A`Ht5v%s*{Z3B8iF2NKT3 z;(pBXkMJrM@QF5RRKM>19pl2y_bm1w_bw-oXro5;@7=3Qq2qfzlk2!CGm7Vw324FVu|s>=O3L%6o{z&cG#+;D|m#XLHWcpzVD1%zDkZhPj@Q2 zN;K_dOwYES`zkrjgV@IT&wI|xzzyJde)HI?_&L9M3*FE||I>c+PXB-3ZJxuioOo!2 zhnN1+R|{U7NEtJ z+YPdr@gV)ej_CMfOe)`Mu(v^b%*NlSHV=Z%EX+IX7EsvWgi7fi#lX<}{K2Hm7Pm15 z;b6JhsK{-#{c>5JEw?0)2SH~f8X(Gm7F%vH2*ha9xG74}#L+lA+#wYLUgn+HMXP1u{pNG&$*Cdfg1t?-zI+ev$9qPV@g5N4iM zSh;k~$FmfBP(WrJ*G-~Lw;Tu7h0xi>rh5tshV2qQ4NvE+0NScPfpD;X?NPsM=vcp8 zrDJ_x!iwq?17<0Lz0<7#+Ol#G4piH@3hCZHMmnaq=L(}6ckl<0aU8!bm-S%Xg7yaB zI6VbAyV!EAY#G#JD%Rhvp7i3i^|js+HDP?PM9N{OTF^ke^=y8gF^R>)E0o}ZIix`m z_IP9_7S9}6L77KJV)3v?*e+}je_;zH7SFU;Q087pEFNl)Q_O5N?-j@LlgFEH;}WOw z_{xrGv6FeNtuD2vjOk`31%E^&sv4N%Du1|04cPMAzSJ2VWI1 zz43hqMx}2qJ-^S#?L9+sXUTk?%Y3~h50*Sa@ zzbyIB;^*SGqVdUvbbR2+`tijl>r-7a=OanCyiD>s66wpuhot|FxK(^k@h^(6NnhEg79S{bJB$x4FobiIateuZtPibf z($|sxMDb)2^=+g0_L93v?oGl@UvZ4|Q^gYLOU28iUm}?g1eyOf={fC?_1i4|M)AKD z`G%hHf0X>X__6d~iGLM;Q2bA#@p*;(m3>_`MIC6jrPy9Plf>FZ>?!>~$wS2{($5kv z5f>_cvA9xPE#6C_T;r<>+#>mRivPX%y7(vYa}wzfh{hKciQ`}biS$z?&yjoyiR-lSEroQ(rxenyRJwAdyG!XFlKu(l zpO*YGiF*H0d`tR|N!a^B@;8$IMk2k7+aj4mB3*5^`$)!Z%H+rCVrcHmu*d!Z?bZ~{lWoXNBsUZD zMRd(f`k2^L>?;lwM~UOasiL`0!~R8*&HWnk^^%u~t3`9aM*Llp?-R{^8~Vp2KPSE@ z?htp0?~1#{J>q`xJMjmR)34bs+2RRe9kH>kFX{Kls)X!;Z2Na@Fl zrauAwOv!xP&3t^BOI{{kA>JS^7x^7vrYjd85KaFBdei>^pOO9r@fGn6(ez7@?jy;3 z14O&~#DgN=(NfPhv1F3&_xw~ZWz%l~t4XdWHV|8he2dHU9mTW69%3)Czi9d~NIzQg zc=4G18Kj%9_{&ApuYvvs$;-vc{hPa`zhAVzL?4yRSFx=3^Wt`Kr}(z`zWAy5rD*y; z$p5Y6zlpB;0}(MptS;6Pqhe$6R54#P{UO-zB-!+fAfGL{NE{#z7e|TaO&!wn_dU0B zws?`aP+TltC*CM>Xe0Bj6;1yM@`IB3rjYS`TS)#+{Jr>!xI_Gt_>TCI$lrF%zhC@X zJS6^2Ohy`}OA|2(*2vYxdSU~ynRu$$PV6Aseph$N=ZXD9+y6RW@^h_KxHaMEccWdmYcGXjuK5h-mw9wIw$Y zn}~U0Yw--x_U|}tpXFI!qJt${U!vnAPZDQ{v&4(VOGWET^lHgVMbqy?IqM{w{vYIf zBwOF2nlOh_=LDs z+$O#({!yg2725kqF$-~5vVr8GCS4w}ac!zkm__X+}xJ!IX z+%JADR`x;K9DQBZH&3kWQ`Gtnou&At;!1I|_?Sp{Gqkr`tn9-xn&!th7AyPY954N3 z@k;Sp@m_JG_>%al_?37-%t9ZX^~n`0`?%~U{UDM4ahQIgc%!&NyhFTOd{lfww7w@_ zk^GMMfw*7%T6FP)faTFM5?M{GDK-(CiS5J=;@P70C0W^rR zIKls9#XRv0@l3H$ z>>>6S2a99HiQ;teLa|hwFJ2*DBQ6zJitEI3@gDI3@p17<@j3BDafi4|d{6vP{6hRn z{6_p<{7DSu`0bP`W{Ne$+F}E-iP%bPD|Qsm5_^j0i9^Nn#qr`~ai%z1oF^_2uMn>h z>GO>H_ZD%3c(3>?@z>&S#ovj45MLHw7yl%FAbu?F5%-IK6%UCayq;oxlEq9hN312* z6X~Rl>061N!~*dgv9~x(94Sr^r--w}x#A-6O7VJenYdP5FVagK>+_gMH*u8zD84Da zEq*5M5i7(W#Yj~@e}-6FtS>ef^F%tIV|hKqK4O1yxHw9jBwirS66cDSikFGkiZ_Ti ziEBi9yJPteijRszL`j8d6YYe z!^Dvyedsa%YVmIIevv-&7{5#WSo~Z}!i!ACr;7BbN4bsIR~#tPzaHbuL^{-?yj-M1 zJ<4~9bfHK2agm<%D8DSeCcY`|7rz#>@iLz2tBG{EN4c{|AA6MhilfEx;sxSN@hb5; z@jmfEkskVJ?@uEA^HKh*NQZosBO?9sQLZC46q|~j#jfILalA-(e$0P^NN0YOZx`vk zkMbiTo%m7ygZQfWnz%>YFJ|C@IMZi~^!-P8}v!3Xt+@ksbjl zKOoXEAmyh;`u?N5Q`{|nBGMBe6Oi&ik*)zLPZsI@ zkMflwod8l^BhnWj<&EOA;`1Wi|1tgxk?#K}9~P4_xPWq+NGE`l>xpy%NV%0r*MF4H z7U|%R@-UGO{wPlu>C%t#Vv(NxDBmnTDn237;UD8a7Tr3&oFvk}ALCn!bn{2Kt2kO5 zFJ3F&AZ`>liFEkK{BMhN_(yr4SRwu>(&ZoHtBCacN4cR`AQp;r2*~&u;u3MGNdJF~ z-y+ftAm#1iUhyv?y#q47mUz0@QKYXx#!nFGB#?5cNGE}muM<~^YehW9aYA@@fo_#a z2N>eItC$WdvOKhX(@VLA?A@q%{efXen{m=NI z&(CjnT5EWq|0O=?m*QN&lEgZ~0U64y?wtDNfj+11i(Gek?D|awSEnvbioJu+wxldg ziLI+}oL?V4@XaleJNGX3k`69BC-vap&q!bKPDQv?+R9b2$nuoE*Q7R$xhwF&$phmr zYY}@e629qF_mslq6=C@3-d>ThDHKauk##UTEwpNTg|qa5*m86LtHvU+qKfeFLac7b zLp!~7AMD#OZ$*W(&{-E=-)GO&k>yUx-bhx~-bhB(LT5!zVaDD_>ZbjZ<{j8SX(~7s zz5x&1u+UwXaxgpW9n4Nb2~Nhr>`>~#Y_IyhaL)nz!dtSj_S+Y}zbe*&`#k8pwb@wv z?eng!inaQ_(6DOzLTN=fUrXhFVY@bp)1 z&mXaFg6wv@6L~&C-VMm}De~^!8CsXNFFe)l*mIvZHEmyLUeA5*ywtsslr*;TiliOh zy4t1Ze%>SIu6_OU$htIm*LRk}kN75UZ>VZyMLPV858jcw)?NKxMfA3tB7OEG)pz!0 zWx#)W@@nq!f*!F(v9uU!Gtcd~8~+dO+~C|^*r4!(eI4gHr%vDDt~)t~tq!5>z5e^c z9dgm${n5U;`@CUj!(nL4sc5&UXg_S};(2a+wh`Ov6STvp`>&k$+5W5MeYi7aZ{mGJTY%?7ckY*E>_!4XuBDB)TIdSawBrudZ18S7d-0 zU<8bSVKCe)QSO&JQ`Vm1)-Ft0eqvz`j?3g7DQgE;gzF$x9Ugy~o1XeAavi@E;I3^S zd-U^^@(Vt9e#bM!e0PrlC+uE@|1Lk^hjaC)CFCY=MU;o@jT5TZk^kL@nU)_)n#~CF z7Vwk-j0mNeAyeTbzVY+u+#}RwIwQg<*HDNgbwxxdlEM*Da#oHwek0T?LprZIFE!p$ z=5BBfgLg1^>R8`~86V|F#y}T}g!j>6I6To94nG2AQX~8e-{n4!LBe5S`}kgy3F= zf4&b0()}wkr1y8+MGTCFCWCJ>-OG0)xWS0bw3y_C2a4Xc4&qTqO~U zEo|!0@2^>~w=uld_koMXW4JNNn?GFLZu3V~qk$n*IAH`LzOc;%=zf%0NbVJr3R&X| zo)J25l|#%h!QljlI2dOq4CEr8?+=$Dvu~Z@NEBb@A_P|e#5@x$B3{7iVSa8o$6azv z1(FbNVKw@95vajq5Wl>D+9ueKXphx%X3a0>_2XWn@5?R7GFt$Bq9T1!N_-iO5T@P| z{>F?XSia}XD>fB*1p<8S5dKC&&j2rJ*y4N37+7nH97dQcm^06>$_8K0s;~yIlc-2P zloVeYB7`}z1lxz2K95tovl-?NrWuAwe`gP6llm<=l;GB)kPT(5_jgucAcUI3 zZO;Z)C$P(hn)31QWTfeY6&tz$xY7iR2y+YKvB!X4R#9TF4Yme$Ai%4M=gcW7XCUSa zO$a%&i@61?E7G5{2xMD_(9Wb8K7`r!!E$69eLlZA znUBrN)u&Ju59#Rag;c(>p|4?XcUR%V9pDF%54z$}5}esK(N1E7c2EcfDn zQ#2hs>=1LY!iTbJj?=4+07uyjtjCIcgn!V^cFTD^=Fy7G_E198vGvEA(u;_>SW#cs z9GKh#NKGs;!TyAQjKZKj=wL zAV~Nvc9DOYv%1hH8ZUl9Nf;PO11n9!k%Vtxfp35t0^e_bp?)XRFLnfTtv0bE2tU{S zV6G817k9j$YbbNwVsaG`elA@77+@`NfF&wBl&$L5pvc;?^|sdv+GP%$m%VIG8)vgK z?ib|m{SWf@{ssBZ`v>{Y`vv*?{Db^`Y<^x7+nMbxE+%9Cwh!VpiF+^PEP!tidwp6E zzuqukXA?iGm{h)j%*Xu~a^}w`{p;HNBl6LC7O$zK@(o}%T)_@Nj#W%`(s z38N;qX^m-MXxyV*Q(!m5T~lE91YA>?{g{M!T%xXU-Ra)EPJO-Xo(-Cx=S_)vHS)a4 zQFx|kO`%p4KZD^4;ynKAMRx_6QExW>ck*UOhYp2vg~(ZO-_WvU%X}~OXm~|=-i2_) z&}q^nKh+WcyX1LoP|`$YWy*{wOfj&!Eb1+Cqux&o^1RDkXz3i`va+6D^&ySCZ=8*v zvqB^IuND8*Hz90tn{8=>x_T&vyI@8K(z4AWXn-mh;*=)R@vuK`g@rv@Jo85p=KN{BsxO zmd9!?T!AXNT=>s>Tks!G1pO_P*gF!)8`MAcx6n1Kupp@@ry!|sc0p3VDg{aXvkH<1 zWELb1%qU12lwOcDIIU||sW;z+ONPR($%6`#2Nxs{C`cYykle2zxqm@&Q9*Lwf~>|} z)4Q}ofnz3&8H-0`Ef7rVHgi_Vgwj)cw{?;;Q+lU{(vow-)!gdt30_UNmRsAcz16phx&!eEdUZ?u+3Ar6C-rBnkVVeg*XAvtc*wATtNmqFF=E4I>pWBemngX!jDOu~iC zpoMW>sJ!kUJN&i*Y8z?QJrGIETuJnnZJf#A>I2n6Ue%8 zAp_0j6yaTO0hFkw!$-ZWANLRI7H9@%DUQ=N(AmY>v$ADS|L^eEfXxUjVdJ-@X1rpy zHT@)>IfD|(|8Mwjz^nhj@yk7xSbmBB1~jAD2fT*F{Wl!ZKk+;72_FuXBmHX;=b`ev z2;pGHDPV|UMuvQaP5%u|$V|Ldkv?DSEOr-rioE8~-bitr$b*mii^K)u5^f?Gp`doMRI%bED{$>`mZ6+CUMa*ejUJ(N;g^h>5?y! zJYVvalJP}sQ=XZ(iTrCNZ&3Vwl7B7v8S#(eF2(cF5bN=k_=CvzlH8tDoOq1qgFCVg z3B8$z3AwpsGyf8@c~6P>Lg~*_zVpRt;w2&f zeqQn}@gwnoh}~n_n`a%{-5h@)uNRbgu9D{A0N6xwGqJVEt`O6mC3X{e52c<@L&(wM zc<};prZ`vROCF}bT;#okvN@&k-*c z7m9p}$8xV1?Yw65APIW&U{5nQ8HiOGo3k~z&y#Piyg(TVoV$)4in7)0py<`dAfL^$d}(N$IfFm z=O5%7r00uv#@{ZQ^AGYy$sB9Ics`aVw~E`uS42LmXZ)W;^DqsvIX}VAr2mWfjrgO; z8#(i5iaBCbG=5hQe~RRmVmpx^pkV%P;@RSPVn30C2bgYxI76HzULux>SBp!;o5VHZ zZQ=&;LD9}zeq8dC;_t;jh&#kxVr73Vbnndi?iaro4~xcs3*wV;!DG5AVpWl&BdBjG zwifBgnflIRSCQiR(c5gU}B z6<-qhH4Wm%hs4d|Q{pqCop=0-WIONJ`iJqV*$_gx`3qSE^XqpNyS%+)VMU#I~ZHcWnL2^pyTQk>4|>{h{JmaiTa~ zyihC^=Zlw%SBXD2|M+gDyI=gZ_#2VqfLNcG#GT?B;=AH*@k?=^_^ntWR-SL1k>cCW z7VW&_dXg*8H$Fr9GezsCribLd;y`hPI9lXzC2r3galW`vyh^n5j#o-H{%er0T(a?F z1DWHUXzwxcDe)Qc1@RT}4e`$+2S_phSK>F~_u@|?eZnzax>!Zzh$`ysJmqGRPZf=S z8^pJl+(qmz_7aQ4!Qya{L$qjrhB!}LAXc8=yh{4DBFA(w|3l&y(aw8*Uh+%go8sFd z2Z1raod^AcJ1B^}+4H(EM&f z{qRV|;haYM`vBv&+qRD;mi%`4`KPrzz13;$qS01H?f=hj)v8@P=~`c3$tQ_wUv0;9JJy;ZTa<*92kSGesj znVhjQw6`EVv?3bgxb13}wT(R%Nm})t)21+@aogcdDXWq(ZabX1GUhF95xWkfiN`z3 z>NkoFi?yx@r8lSuRpH3l@Y>}S7=wejhK26(q_utaoR@VcMr&t9oaViEgx0K$xd$W3 z83!Xtk%N)&39&&Hk-7sbA{o)c?)?KQA}tyocH0c92)7tm5w6?da0oiXHtt!;$d`nC zVdVRGXUdw$ElUa`dtE1a?XZX29tzdzbSN~u39Pj8*~abg&CYkKdf!y>npK24dF$Mc zefI3hk6>i8`%M)$6>mPgL^R#stYlp_Xy^Fl} zD#Dx6R$$2MDMNRpuMS~*mS*+Y^J;2nZ)zI8s1d=4_NCjA^Sz2}jHy2Pw(S++g{xz0 zDx9JR;AZC(jGIR5oExnO^heK_! zgE-pj$3x7W4mvS)WrDilVd2$MVX;~D6I?Dei#$o#f*zaObGkMJ-9P<%^oMGFm>6= z!m1b-oq~L!4xK7ObsAQLPUIF;*~C%N<71)Kvtv)7%^Ghl{@mQ(&0!dJ`CG{S3LWub zP_#12#6OIQ#?NsFLqze287$3Bk|hfU^iICLLA6Qkdz9F9^p61_m?a5T1&*vHQqXXDtD z&hCvYZV@xGqs)gij@y^w3W``IK8+wM089N?=9j(*Q$}o_jKp17`TpFrxfHpt+yNAy zfS7|!mQ`X=^xig``<7!%9?yXqeCHGkiMTj*P#xXz(m(zkxX)N5Cu&@oe zU!jGY_gV{&Sqm>(3t!NJO=&Ddc;@SA(^|OBT3Bx_JWLBVrLpiq!UCTy@wt-w(8Jck*VaN(y6R99f$BD;u@Hj> z5C7AUlLz-3$eY`l75Obs*j)ay_k-rNcgR&0lE1x4_&l(ZYUuk1`e*Yb@~Dwy|(30@ZCwV}UMC zFd>dd#vZKuX~A*nD9V_i#}i|Mu1<`JjWl7C8WV3D6SZr?P93wU8Rp`(59$oFt-j35 z**@5<%S+k+=qvz#QoulP&6+%9@(-5ksyVT=xKwD`} z@HH&IX1Y5tnSok?{ALnFZN^|%B({T9sC%5535de$txFq|BXO<4G=tqHFctzMNM7Mh z1QNv;?sW`LBqo~RU}CCCx@=P!1I&lvmQcqRKWSg07^~|HCrV7PAF%){##}EbZ-Fi6 zh(09g3h-Gig2W9b*q2ytg8hhlv6_r&D3zmoF*|{k_iF@$i5m4q8S$kBLKv`3_>~(; zoNTOJJinX)R>gBJE-hz$SQ!ZO%ljd)2rIs++Jnq6We&4tVva$g#F6ph5U7n6<9P|T z(2;Wtc!gq{Vjy9}wr$9{D8fqZ!HN%7vpP{z*a(8-f6bf=2HF{YKcc|bmzMK!Evtg8 zi5m5TEwgmM|6W*8BZB3iyfDesm{qWe!}t?9`y<9I%*kZfEd+NY2IX!jvwO}6Y%aEx z5g73I-tc7D_FHT?!3|MS5!SZ|D;lBT!$nY{dVqSTXu~emMhgW5rNu!t@aFjo5MqzBBp(1aBS2Gy`q1 z!nEB~1X-UQMmvaLy`uapKr(C5tf|iY1uH`ZjSHHVQ%pk%P|cT$mElF7mPqsZ4VK8au;S<^ST`go`3Pj|rK06z zf#TP`${Iy6W=T}D#8mSmXfZ)yKKU6|oQ1>}zS`6{WGvyMdVY;5`ZdNU0euw`nUU6L5zFYD>{KSYi#@{ejG-c84Hb%x&e4z!&OmbtwAVdQ^1+R_4>n z+gPzD3BU2?mY`^}+y)(!^TXF9E#eHbM<3NT>2d_Pq12JAIxZgeTJ!Ts`~Rb)I4gLx z@UTFT@DJVj3(6UYn!-j{3rK<#W?6;*tPZ{rZVoq-u!uX$H-Mv-0p>&-Bn%Ac3Qa#> z>sx}u2?Q2Fg)@2p`GbibLhw3ZhWOj2L3#FC!{k8|F;ksE#CQ`NKrl5@_OiKf=0aw&L{5is}Dq^Y#gHf!Q zG(qqJjJ6MGn7~lmBdZH&*X6E;fE*)a^X_A5znC*YF1v5W!!PDAAh?iiy_v{w9zli1_^*f_gPDT9eOv3kx$W#tU; zXuw^a;K>JTkC!pPqX8!*5izCADl2Co=Id_*{8k)EykxY4iC3^1>kRNjf_35}qsI+} z0ba{toj73hu+G4DzCLmEj6_w;vI+mqZzc06A+CBGAzlVZb712#U?TC4S$KWrm6G%~ zHQqq9_6k;8&v(HLYU+lDag;E3p+izwP5Dw?S2@V5(F~@Nx*P zSs1M?IpU6?Xk*Ray7;EBfJ)_3^$!YRw6^4U*LzzY4g2NAH|jg6e!?1PO{)CMU%ZP( z)el(z@huJs%tCv*eoAAC@DI&+$%$0)VyFt?Pzu}#DAE>G_BLW|(w<*T+$PUI|616$ zD}p_+;?`#~*w`dogU)JN&J;WoCE8RxFP=6T<7TPit)}vgE0{(1^HS13eFoTQT6+m= z;P9kM7Ju$0#-u;fS+E7M5Wnnr)jxvDKWmRr?SVSb$`rr$Rh3(r20k-Uzoa9=qG%|v zsl2!Neav_b>Y~EXVhNl7{KrnXU24Jt9|T6Rvg>ab-l~4W8bVr{4KBg_W(a`O5-I-s zaoY(arjHpn8Qb-j0HFGBb(6aM||MPBw&uWC;ih4RLXo=EWZY=&(W=hc6UdF~@Jx;?HT040cN4c{rk$&knDBAL>=Dgl@xRV$XK^Iba^l8+dUjEK#)$vfS@Xf!_ym)qC&MH@y?Mlj znQ0}OL1QddiVe((nT)9s(IcYG^q(W=%BW!ftFd-+OFWZlY|WiX%#=B5ZbW=85RQ7s z&ZGI?JB!NyWN>^c&{54XQ5OK`h?z!#1J}$cGCSDJC9>#FgG}LXxdCn3`-;)Gi%I@NfR*dD4{x9!*AAG zikn39rNQ^w9If!SZaa7;e?Hp$A;wo+ExziFU! zc&TBQ%IRo>%Sl-A@(DlU{N;G*S|GY|xxvnp?UL~am$glcbd2#0ULDxQ#`S{2yq8i$ z-6oC`MY|qdLWaS$4qQ=~e*k z_U0fQsJ4@WF)|+?BOTM@(2Oq|8)4g_L^EQpieGLv$hrmXz1tYCWTCT*E!WDHLH)mD zZV;v}1s2Jcy z7M~Jd5P3Y)&TjE@aldHhQy~6F$u15krq2{l6Zv3}`u^fL(R|Mhdh?xD(9Gunw=fA#T7pXW^Xy<`{rkurZ!v;1ty)g_zx35ahj+009T+)3&9 z1eN)Rh!e#Uaglfx3H!?=uabP5 zw}#|8lADugw>t~O3r_-PWt5H{WYTxoad>9^e0f^qWc8eM~gp9m9Sy<92aJdOrSh5a{E#ao z(*{>Nj^BJo4CR|~``}582U{pzEAb5J3nkle`-7z)E!yw4&QQ8pqWymBm6ER&&A5D& zXU64&8>t7)_gfKuROvW?iTdYAZ0AcPw(AY)-#`^DfSi3^%CjWPov$@;uLYZIA2^SUL{^9E*Dpcw~Dum_lxYOu$)Il z_D3jh6}O2mi+>c~6wM=Xr2km5x$Z(X*In>y=?{y47qfWXLwv4SOROh07Wv?j>GDN$ zorc_5G9Mo^-h7`MwBO|%EWMq_HdgXPk>eAY??Q2*xL7pvIuU=PWRAmQdUO2;AC$~7 zgVaAE+V661ll+2c=6fRD>yqCUcZ;8k7=&x=eJfUoW*#W=d%UiKeBDOY5bKEzMEhM% zx^87UGanQ@Q*tk{NVMPK94>jh$hU9IZ|AMek-R`O_Z7rnBl&ufLpPakwaDKslku47VUR9IewG&?EUI7$y>zA-`{*y z`q#t{MRVVRoo^*qi2Pwd`(e?3XA}Oojs66&j@U>v_c7#aC%J>j5vH^^P&{8W-yMhE z+`qu-(pSEZEtKAVPjiLjn?;UUrG0z<+9KJ`Q+r;rou{@_GDj&g-zVZ1;`icVk-nyx zE=9zsHX~OR8;VWE%Ja|8k-oP$KpY}go_|&%eW_R`UM_OnE$ef$ST5RmXZK6C^UlnD z4Z3HgH}^G!UzKd`ZwUWcGDq&xK8Gce--;FD-$f5U6d0c&W{W3?bwm#RWx71^H1Q0v zKr9q1f5&`?^drP^;v|t{iD`eHxJbNGyk1-;t`*mdcZv6j9E?nR_PdtbB-`&=+V7md zF8w>A{jR0`j^)?V9}@p2Ca3uJ)5ILHx>#3?iYJMuh;7C8V&(5!o+o`jaj1B{I9{AA z{@i>sJI~C1-*T1mtrhJ&vwI}ld1hNA+j(ZsNw)LMc1X7K%-)myiD>7Y9hCf6@kfyl zTezQ6Me|*C$Q&U~eN;S2JVk6RwiC^F)seoN&T)c3v9$y40tMSt19@Q{PZ* zF6N0GHqZDjA_vM-9w2hOJmpE^OmVizVf2i@O1x2AA#zYXV;n(5L*J$Z`6VQ$-Hfr(9P&MQkZ@@IK>v ziX4tl`FwG_I9cTQe8yiQUMXHHa)>_TZx=aIpYkK(lj2s91Na%gOMF+{Epos<sd1EL~X<3z6Tg<8a_8aHm!Y)a%A(&HH;JIg{ z?7hrAVa4ppIm?vC_cQ`%_#2F$C>SzdkZ zI9`?9lq1x$BzXi#1p8t`*BE%-S1DZn`#iS>tsbfBjxXkFD7&wtt!XfE#PY z?Tp-xS*iGn(77n1&WMU|#~8L?+hKRonXy=`Pwbh)-lS~IhI}^GEY>NOz2eiI+rO;; z!1gceV#{(LI5}2pExtn3X1r72@S8FJhrRQFv#L1%{yF#DyL-1%c0okSr70l0uz(1N zy1;UQ1*9xpl)5x&vWu*^0xB8{CMZ@=7kh~sB*tJ%h+QnNq*$XNhA2fgtR-0`e|>+y zIlsC0?xolg|9SIrK0D_-&y;88%qe^BoM&dx@|j1kJ!W0g^^1$#lNw&#bZzQuxfmy! z|6!Y(nyfn~8i_vfVdM23)_HrL@*1x_3gbhaeOIq+zrM-3TQCYUr9}YaOyAwr3A*!L zZ=aWn*4mC^-hx_hf46q@mf&?M*XOQpQPE(1_h{3W(|NW}N12n|J~-R!AHm4mhl_%@ zG+4_sdlSwqIs?%fuj~rAJg=?HdByodTlU;=1=_lPv(eEraE#6XoZn_RPnn~mouga! zy94T7`|hr6goY6s&SVJ6fcoNpjIo^rf8eJKEdVk$Mli}LhMBLs;SAY-LnJF5076%0;kU8J{aO;XP%jT zr*DM`N&PL;nEvnymop@6mioasRrXE9$EmXC!duOqKTh>?dRq-f4l^Rv>%>tLUJljg zu~!Wq?0T-i9^+JRL+bcA)h?8RLDSh24zkZ6^h?wtxZZsN$;~*`;07~@)Q(dPHn8JV zgE_Hrsvkg2FgNQV7SSeH31HDa1b@ zECYi~`_dDI(oFVNxcz9j$Ns@gPJZO}r>%dl=wY*v&tN{?*)eYx@-fm5N*sV{2CFW?k7u(UkQuAWF6AtK-*AUABY*K` zu?5^=tirtzx#rJl6#m3Gc3Jr%e`IC7#GEGfo>Y7y9xhS2jm@MjNQL%Ssol7t|~aL zXF{464~=?brxFIY?R4oeJxhondC8dw=C&JeQ<(A-^Ne>a!Hy`{!S7s75A!9AK|r+m zzzAz#y!M#oDvx?H1_ygp;u1KR|5sK8dF8>GL`~osZv}d0z+sREp)mr)VmOnz z56V8xlt0N<#pr?Z*yh)J6hW(2tkd$(N;aBcVVvs3q1i`Ba2_6Rc9~I|| z@awSH)ZsytfMCLW2FCI~lP5Eg3}bJtn4v*aTdoc!aNq@0vte@0@r@<;06{a~vBF-x z5bnXyNPE>|JuvwH35NqA*dYA3N;ZT;`i;x!ITjA*i106&C2kdu;|UW!mf)#0`u#(4 zoI-d8!9h3SpZ<{qpZZ9;as@rn(lUNCd)aHT66M|sEe;6&QwB@aXhi90#3CZ%2lqfX0PA7c56L`uun$XdN zuXX~@G218cPD@tnKRQP=MlR~ZAwRL4o+Q?!OH!!G^(eHeRu@teD>t zBM7R-eVC}$JQI9fXCk}Vnqd#^*kb=|%@tsRwBr?FHxK@RnXl&i4)>Yfd(w>3b0*Ee z=##uTGfMNi=XcNVn%ATIv^nLIN~h18v#6|e670|OW=)@-*S(kVE?BsrG>UjnOYV}=`VElD#m;Du&hsceshea;TRU|%k#UQ&>4F#v$$oeypA0F z!sUJP^IBnXoUUCv=XGug$t#O+kC41>L-IQ3c_sN?{>+wMNguDp8n1c2m%irYW*rN< zjq}doIGsH298_h^kd~c$de>tipIumbHj!E5k89q{`@ks=-^$9`u{krnwAYWv%0u3Q zdj~DDakIh)=|<;M1o~^ES=R;yrJpATH+P zGlIo@itS=PFU-c+owXRdgMm9(!{}X&-NAr^9^K7|gZS73JH+H)GuFYJ^dEX4&wua0 z7Jn3whPNz89B_5Wb%Fd*L9qctIK7S;Wpwc6f8qm$x)op`ioHM%xgyXZhSnf+;_5$j zN{jrgo>}Z?VprKe<#&f9kgW{v#{=>%S z@W0*HjnCQXdT-hRI(>WKf8+nox;@6S8&^!i_?jc*bNHrm931)u@dD&;-9-z$8=0*W z_VlxRj2qJ>zU|m|BEJX2Br&^xLh&E{*Cr!deM2F!i_vcLFpgph(ltf^IzP=j7V9+$ z&gOyFc@q_QmmY04ZUJQLXVfpyN7^A>i4x-G!k<{~%dPOfndz6y@^~EN`EZH)-fQ4E z5ro;z#?f9sQQy4$`1leQZ}qK#-{zr?FQKnKJ=$#CYRHNDDiidfnlXKRv$c7sA{*U~ zv@N%rjk^T_iTYMUACHgioDFB|_aOYt(*=%Oqel3hlBAFEw1-VhHx-7yXETE~#?d_| zD%klw((##nj{aujbH*XvUu>Zu>&A^txGbH2HveYh zb2{NVJ=tjRcUE6Qkntvl9~qyM>$E|uuub^PINbOg^D=kX@i};kW8-t^Uok#s0QJDW zy;x*-EM-1-$T{Ky@jP**c%^ua$orD{?iM$RPl_*y|L*ZQi_qAt$5Ijx)bqp@ByPB? z#Op|;+aTGF=lPjr{&Hu$8P9`!PfLD9@xPU9?6(pBXUWEH8}jE$mx`N>AA7p z`1~RH>?QfkCjZmMH<;@W^}0dzs}gS)?-w_Ue2()t%ykL!c};n%xJ~?n_(yTOxJ%qC zek#_A{J=_mSz@l(L~JK^5POKd#r~pMj|zHDlRQea;}|AOo-MMMljU;eXYyR}QgOAo zR=i&1Cts$2Ks47qWOfcQ{MVwn{vp3C`8Dwk@f~r8xKsR__=(6*(bUU-LZrDrzzoUk zaAmmZn*&=(HtSnK&X;WN8^|X~K2?m0#iF@?kj{>4;JX&}vzwbdOI#?PBQ6uaZal*V zrMpAiC_XGcF8*5N=WCX0$2IUBk@9x&>&7#f-ZiA>I}h{GZh<^XjEHST+FUUH1d-n+ zDHn^Q#IfQT;#6^tIA1ImE5wx|`|_!GwYWx19=~A5+acZEihodK&pz`%Dn2PbE50ah z6aOIY5O<1y6F(8Z5Wf^dc(AdYG|`T0$dzozHMEp$$2A-;IeDDkDGKi=7K>)w9?BUj zd7?N?oGH>&g7rC9Tq)Y|4p&J2iFku}lX$y$w@70P>a*h@o|gQ)_^S9@@g32O>qEW| zB<~hK5$(8$FD0`KIv6Av+Hnz0BsUY=i5)~c-mkmlB(uG90HWLm5+|6j!2Vzu}WalgokhnYS_%n}=jO~hv6 z*R9uclG2?jM#W-rq-fXenId_Hc$TYyqKDtRY|m8DuG5n%`53XKc&yk_>?WQl7K(P=o}rRQ zh~vc5#p&WKagkUqo+qvlFBMmdYsKqD+Bore?iYV9{!;vv_>}mP_Y5C@hg#*R4l)tc#POm>?C#(PZUoQziz#r=}I?C{JQZI$?NxArF_?lUpIb&#$P-h zJ8t3y$uEn)6WqZFpUU^=%GAY3dtU0X@Go=1gCPW0yRRcv_|FIm-s!#oe_F6Ha-?Sln`QAw zPsT7O*dl8UA_8qN8j*QgVre0YflR&?2P0Xnkq#@sWYRu1*h*s93DZU;*gC5{qO;rx z^0=p(TEge_%fw?jkndA0h=FLdsy17K| zh1@-a9fBIT?Xq(+yzFDL$D}lHN4aJ^W?LsC;}itqTs3z5H5<5|Lr~#(bcO063C>T@ z&B*ATagtdrA+QYZTy~+0Lo7h?4KIh)Tp<0bekd--UyFjvR&>wogS#*{J>7OYk11{pE-%`uO1nX$Y$DBjAZ`ZQ+CM6LB0IED{5x)iTm(VOAu< zKDOn;2h$D0rX7`#wvKfu6~gi+QEy2?+LD-3DZ|9yMyY?$S0zT9aKr~$sN(TL?{DaV zHZ4Ju7~2#$cpH5%I}oZ!+!E!jxM+{qflOUI1D`z?PM$Ys+T^YUT?)DuOfKj=b7|+% z#bYK%$8{bxb;i`ilS{e|96EW#l6hsNGbR@;T(oFj>0)N+{4M5PowHz0`DB0DceML= zv;%q8aU*S`ZN2PbZ&`kuHm4V~Zs*O;4+QYUnLOEkM8*_*lZW*kJ!taK0jCWF28
    V98Gqf-MCk*W0zjvfPFYwU|7tSk-%v`uQg4#v~%%4^|V+Q629v_s@{Wa(V0EP350_sW}wIX9=zj$o?J zIc2zJB3%o5c0IA@8GN$y)i!aSQvRp28=v-lvzruNlv21VRCsZ)@Di`^M}fj0;{o)8 z%t^{QL(5Am%JUD>kp9!~h~0xdS3D=&_!fcpKL2+E$QOac&8G8TiTv-4jJGcgHm!YY z=!5|Ll#6X!8u}KQmx{;{w1?YPLk<`cEepcTU_-!6| z9e&@cmk?mRi<8o^pLw*6Oo-!m&ct%p;5Cxp5?L<8ZMhdD2fpNQuO(Pq<;374hQ z2PdNtflUzJ5RT;{$kYwx#N7 zVJ{JT_0)?;Tj)$jRoEK;PTL8Z%=4T6bdeV&<)z|sakY4rc$0Xy_^`-(ius=rUlM;S zZWligKN3F{YsD|cAR3zbGQ^|AQ$_Qw8S!UGo-ZyFFDCIkxlFv0#3fWEa(n^xn?5*% zKd$gC3OBz95pL$dL%O#V|DNK_H)F(`jw8hXL-F>T@iDkDsh=C`!F!S9I||9`kc@~t z@05=hJB$1|&v16DkwxMlaky9_mWp#kb6%0JTymwjQoLOJv3Rq1t9XxizxaswnE0aj ziuil+P4RuvoOjgYGs&NeF53;^A(4Gel#do$iPjc@ollJKCH55uh~~b*bKkZviZSVJ z`|=9^9J0@~XLmpO*Y~+r@T7ljpDWhgU|v^7 z9ToxyU5-HSXaef)(C5l|Xw7p!*5`T)TFHwbVZg4nZTd;M$WFknwQa13f}!5b+=3By z4ukvI#Np6e3=5~ySSQ~7YUV7UJ%PGkU!XVA4<&gKD)JZDHj^rti3`x1ODi7J6I%-p z`d*JBg25Y1DZ&28WqM*GkW>E$aZYME_O>UMwo>P(ZbnFD>Pn zcft5&)AJhd8LZP?ij$3DRo}VO^dP@*)D6fLrDA1%>n_!QNk6fFA;&85FYKMQeZk+V zmo`?Be_P+|%sGp3&rY8+e`#WZXKz;iq(L z+kyTm+rP&&bd*QKS>5oOe%WDoy|tT-8-ajCeIG&Jn}}q8A?srGO@ZI$f!BEyy1q%j zEXT)ulYZG}(2w&?`ekW<8es*r**cvMIq^8UC-f___sbr~HSpU!RM7|e`1{vxHf{|9 z67>}&=wnxf)yLmUHV<{szV(~*%Z`RVd)^M$FWVHq&#$%@kIG_s>_Z}X-Eg}f{jF#F zUbAN$-B!^AVi!SU9PGM!4snUcJ1OCK+1qE2H@RPSJoJ5&e%YTO-G{akAnV4BOt>ta zDL5I02yBAz!}ZH%!ssW%=~~H}%W*$H`>>;0SSy zI8B@*@>>tn*)eSwO1@0IUQF(n-K22dQ_RnMhWwrQw)kgpr}%gApJD(P8}o(5Y%y1C zDz*~y#4+Lwu}r*3TqCY0@q97;vf%BMant@nd`#({k<88)#?umy_1Z4^uaemd#Q0Ao ze<|6+4axLbB;q*{4a+T1I1aZ?KOwv97>`@mFe0`Uj~9>h)B5dW&Oh4g2k58m(cSNO zHTxgFpZ1&C#vag5+ZPwwx9X=21VRa&vwZgn1X9^K>qY3dbIpFgepP8U8&Au+g`e_U6_S5#|J5VW{v6!vfPust4KdtGu{R~O{ ze%b+b`)LQV#3TK*p_oZ82Nl)tUPo+j#A5b{#q5!p(}tA{E}2}!iDeJc%f`N)?>TeY z_pq3aFM)ofpZ168r#?0dbGVDk{?RW2|J=}a_{#VcV+Y9^WehB;7NhpW?iF3pw{j`329Ov_|im*nXi}m@ku1Vd~H|@G; z`qizXk3|D(@ez986)QVojlPs?_d3THrL7HOWwBJO(HHE7)$=xnuYD=%U3Fu$&~etg z(Vx}?0^Mo@Lt57chP%B!-xgf&V8yePTS99Koj}n=Mb6dfd-`W`?Y7-312+Y0!l{`x z;b1tL5lxS#*MvilL^njo)rRMd!Af(_?0>H7c%SvLrW(S63Nx(#s~R^u6&gaw7p@71 z-`^I#`Q6&KEAKB#-xJDCy=mS<$42|0E~k7RIIrjDfzzMg|7_Q`o1WSKY<>5XkGH*( z(SLWp{@y3`ybiU&KB4vLdoD`%*1wqHp44}DVc)cxV4C|$J=a^?p*E#i;I-iTCKXqH zn7%%1-CI#_&xPK*IP&zhE>^c2_gcpK0M_AazlH1DJ(rF3?ZRjmtYudp>)K_mUqr-}W;Yp}# zPpn4=f6(~do-WcLU10AvXPtLb`kp{&;6uHmCwv|_ru*lCjNk0v($nqz4;&jxjP&0< z$Q)m%+Q3OJ*7r-_(=Xj!yLns2`pg^MlWq>DM;pBsE?{}>xhCPzzHlt9FPz(xrLeS` zZJFzKIq5~07vK5G?-TYw+S|Ysi^=N}= z{b)|K&xg*hp9tc9Hse4VO%r~VIl>K` z?H^=W@&C$6R+<5%y0} zMEQ<;8pVeA&xiRftT+u`Q~;WWv&>Dt2vtV>go)?z&_?jky5j>uF3+$#lHyc|jj-n4 zC<<3Fjt%9DocJnt2$P!FTOl_73bC_p-M41?+6F>q3)qissn zqB$*2S{UtV<_>FNiue7z$2jv|OWt4KeJDWUyelbo-j&qEc~`=9=UqvwJMT(5)<-qd zuyAISNQMi;9J_F!nad^fD8$Dne94L{!^b&%N79TgwA^wB=P-NyR+w0YYeqNlr(D4t zFB!*WHgFrdu?bypeVUAzB!=Ika_WAb%B}l(s*y@j;>PhV0_(`4NpO+U#W2f2NSu@L{^70K*3Ao!a z3bDs0AC^o|IoAp#nG);$ZRC=E5Y1MIyEX_phgY%pv%d6<|TXBp%T?y6S1T}m@n)UGLc^?kzb;NY($t9^g@mtYF?q&ds6Dq3ON!egr_@@b8rN(HepTi^m%WREn)M$Y0& z@{e#>ziS7;W=ca7DHp|0{UECdrI{^WwF*wX(g!67$&N*1*FS zNQ|TWTR4+{)Y>2$lO}3bwl{lX9waf_q4d3t*c4~v+TaLZU#`*T%ilyF?haOi*A><@ zBdEc{6_;?qpJ_EE+)LLW7Y_&zDJtL<0WaYzz$1+w|Bi`0$B+bx%~ptgc7SDJ1weXo z;qYJ~{6`+b{iKe=#KmwpV}$=u8BH)Lo~uLQHQQY57sKJ72vG@#dviqi!k<4DxG54246J-M@mK)BJFP4Q;}yTJ3j# zto`C=Yb+aqR}D@#@g5vb_lhcd{M-9Xg7+r$J+Xowo=M!VL}OFVIV-B@@o)LD@dxu* zwjb{qvcq_YEp& zHio|sho?*hX|79W=^_(}9pm+!tw?yz#^Qg4_~+p4{RFSs7=AdtjOW7<56KGhW8WXs z%QNWT2eFg=1cJ7}*+&U-n2q6lIwe2r665uNuOQzxX&1+e;%hn@3tQ};uxULLgk3(; zcY*5)$7bW$Jf^I4aarfH=3r3R{5jJ* z7cHE=WPa&_^0Lm;FrCu8ISWe5%xrGoYo@oMb1(y;df|94a}6|plu-#(BY0<33P?ltVgQkTxex`xfVdcRyT6E)BG z9>*euuRHlITDLi--NYdSz06yNVtK*`P#%_L#0rHQ;7f~~;4O;e;RbTu_#$im;&7bV z%&c3OxBy;!^1t{@YIRIXv_f8dQ9C;?+T_Wj29$8cIWz5BJU2pq@QDFU=`7eR&xfl9 zgEkMa-r?|s*z9fxPE!{jTwCY(7nLlY?r0&u18s>Cm+L!-U6ENbu&#AYor2Bj@NJjS z9acJP@{-sRez8iJDf+ZtUwpc{1CB1f1R)O7PGW7g$fTHYmo^7VvDEbNrt$ zzh6&21GVve=J4wr_RF5)b+XGG{vdPy9ei9V@7n+8hm<<}1c!fPc-!)~?xKbH{{*2G z9Mj?dnc0%lF^=1DaACNwOUJRI$>pxJg(1$qqYY6yz-$jA%@!Mp5L@m*_|bD3+crcT zv$%U>gz!Htv#?&Ka~-rB*G%BI47*wH90XWD<3dn=SwaCet`u&4s6#@&d3M13QmkH<-U*>G0hz3?+n7dUQBkbvv- z*o|>?4~sV49r&omPbPM=>3)L%`t8=F>A}}Hd=d!~>o*?tv+ajNiq-E`_)(ojR^JTh zJJAZDEvtc_E*7&M>E4S;@pMd|aQQlYTKc~xjzYLCm-S%X5}Lu87s0m$gxSrOYh}yC z@PCC3QWLA#kY_EvdH%a;EWkr&R^oQxoPNAAC4K(Ww;^Er~=ZH2mT}a#j{ltMJ(v6hN9wEw8 zB$rBFD7joR&pGv6B>76oS4+N0@_piF@j3DL;``!0k)Iq{{#TNNxKSx{_#VqM>z+Yw zF1eFJN&^>ykBRIO^YC>`vl)+{uy$lF&O;@+1=aricp_Um;!~ zUZVKR#p_7uT~DGsv#uD(&D2li|0~LTZjgM2k)~${Y$v&cSRmq7H|e5cu{csR_bc*G zk~~E`TU;WtpOodT6#2iEvblf3wUVzFZxL@3e=7b={H6G~_>{Yc|1emQ^h&rd@*^Q$4eEyTBPj{>tok({F&sRi!=se{Bz>#;@e{Kx{ZHV_!lCr zhnT;y$a%&ocN95KIOX1AR4f*!i8IA>#AV_oqFrzCI?3xq+9y%}BjS_dZ^RcwyT0Nd zB)=tY7k7v>aH2lDzT%gXX?nu&G|{fF*jRE?v6X1oSEPj$^Ys+_iUY)<;s|l7SSrpF z7l}*7^F&%%QU6cG>%?{9?c&|ygW@L9uAlg%n#u1UGZyDqqA zb>^crPQAsi4d1;ccHB&qQ^(?uL(Nou;&gADXa|+r;YXl z&izFliXKNkTJn4AVV%ClIo3JOtEnH%uBq>w5$zg1Df&unaOLRQ`twHA)~|eSe`=c% zwVCrq*Jf5ezdxnTjnVqM203e@qie&RM%M-_pW5$T)-O6F>Yf~g4yJIR=TF;OMuY2N z8NcRT=nCD`IGVl33kB9sf2fHm0Xfft4gYy=PwM~2w#LzxQ5>oBalL-K2L>Lkanp)x zgU4s@S(zPtjV*A)hws)l*`B(7LW?WIk=Ihzw~wO60o2$lsjWY>A6!XoCYT9^!7vyE zX}yk=UI3|gZA)2qyxX)W z6SyAmE6!bwy}KGOvHU@lyun_*1>Q^etcb7OXnv^&LcfIu&%Eu~wHx<9i^o$Ro1Z3) zna!K5okyIn)m~?oKjCtw42N!|5KiU#=5fpPGpYPS?tII1zC~(9$2Ii&Q`IAK7 z2i~5v&%o^B=H1o}Z$U~}ofi_p;7Y!zhl6~-3|#_0=A3x~$wQYTI=I38E&M4#b`Pay z1{-8eg9mo!!5mFE2mEn;c2xL8)eaAgLdbfJ}}r=BJ9rja{%+tv_N#adlvR? zAMDVbY4#BLex3pI@000?A|{hPr|v0K$lr#UUoz9F6xr>V`74> z|5e-LQ#1XwCX)<=tqHPhelzPD2xrAjfcXw*&5)J2-XSb_(F5$zf|p#5K*~2LW?Qg6GIz<&nN-aEKtNiLu5zintKYn5@=E zrijroGG33xbuDB&`T2;R#ygSq;KczeHiAk#XIW(xJ${WQT5So2Zph^HGYU!wdmtrM z@dGJIJdlzq=HPZLoZkeaZ4tc9ZUQX4k_kUgY4l!M(oYT z2fnXsY+P4)Ojp1uub{H6aL7fx4u{}*yTMu$JeDv$M@~6AxXd;K`%B@_W-OjX!`zSf z6b|OZl~wdK#_=IMer3d3n3-86&nYjjvUP({QDqMlLS+?e_bWKq#uBU@!WUJsP*xG) zgkLDq)5D7-!IsumHPJGZrEh>sabQXc167v!u#sV^I$>>)#j*$+PyYu-9=kR;Zf%f$ zHi?b52bfp}qRrMG`(ilSIs&X6E``yge=UtjxRyqnEZ7Z&^RJ~6ViKHh2MNytI9$XL zXlM-=!uPPQ?W*YIb%ypPc(tQQVicS)B&5eY=N)q;&V|U#FuSCe7bMgY%iv6L^!WEi z2?{lvZBJOEvl$D`+&3_i z`<@eBZNZBVOvpN);4Llo8b-WxiXpY~>PNbLNDH{rd^5QEU9E$9wm}a&2z0_dia4!Kxuch79ns z@1HoxdjmFYPcQFtoL3gX*hkm3wlZ;(w79)a|K5{~t>z?at2rrVt2rrVt2v1)?;gxn zbJEPECN4T|(qUKSom7G~Izc&HEfQs&SI4r>ScN58=fyJ9OfYV(SSQ%7HtX9z3G#o_p6tJ2>Z|`Kd$Pp;{Pz7|2+ncB3xOGFz(vpO zX5$7T0Nr}AZ72+RB1qR5A^hD-ePKAhi`zW#ns4E6(4)=9&4FzFjA{cV>#0bajVpzm zSnfR7Lv2X$%Vl}C+zR+@9;*0NI_gJ{HXBzCIZ2f{eR{On zxF11I)YmK$*T?(N){izUHV?c`HT3m3NITz%xI}%OBHzrOtS#&VI-@7UZY+zAulZyb zIBq342!6-6n@#r{1ki7{XONCB<#w~z3vF%^>(@OJKi-Cjv&Z`?{HV?%z-;v!d^3Bp zfk^kB%>>#ykqOP^>}=$}{^K$<)=?}MRW@}?Xa=VV5*)E7ei#I0=XT-uRH)JfsUYT{232Z+TYpE1LA8oM>*H@_AUZ@#-g=G5;@Z|pe063PfaL*dgT&y#HIIS_xIWHg&OZr-~*esi6G zypJh25zVh!$n7L|5Y2Uh@Dn6QMRT1Xe5B+tqPboWK1K3e(OfqOUn2Qjk^ci&kDrLw ziR;8$#XH3ZMRPqN-=mVvbp`oV$-fof65kbfh&#op}Z@f5JG}kM_*=xdhYsa)i^10$lag}(bXs%=ATPOJz(b!2M z{HKyPiI0fC7R~jHbmlq+Ust%XuY_!_XKP51j%e+gT1d8bO=j#O z(&sCj|F4<9x0r0dG(q9!`bRoruL;gk_#)BRZ6e&<2jB{Y|46(-cAn7pro#Uu{zc?x5|;N5(b_TLN52W@CojfliPny(spM8-JCPq+ zn7*gjR~#T(JEl>Rx#ld>PZo`RDCD`4%fzMPa`8g(3h^f*zwA)oZDO)L(^Cq!cA~$P z{JQwQ_<{Jb_;)dY2N(6@+nOOi9Z_yAb`bN#6U1I(p;#pHYZLR27blC;#d+c)ajAHo zc!_B3NUxI2*>$M*CUJv!ulRuYu((-#T6|u7Rs5~^j`$~$pT}6v$KvPW|A;}vF+MCd z5F3fj#a3c_v6Fa$*h}R1H|pa$USx?lPMj=G7w3u#M1HViz6-=l#nqyDe@Tu1Kf;sO zq{rbHT06{K$_e%dwsT}=x32jMJ4Yg4XMa%8y_*aWzTWln zxBe9yF>hVb?AI`Z+mALjj|SIf*R1UCo)p}3k+Ua^8Ee*HHo$#>)rKWd-{Xp(^whu4)ix-Wz%>cW>~% z(R;niNAC@!|7q__%UZR>x2Sz*U$C)y*0O!ov*v>`mEPvNvVo$i1Qaa`uKMHrN|nSF$%)++eSlp0n3Ox$~% z_7}M7>b$KFROdamr}}|)_f_XzeoyrSO}AG+F!%QA2bO(Mowsanb>`NeR!| z??ZgYWxK1>w%${H*<;(QFI#te^<|geRh`!Kuho|!K5f~K>dThxtX{cwL-oqX{!+bi z-Cfnr<#$%EM7%Tij_Q@DpR;Ux^{rcPufFxM52{4nFqR>Q#sjUVcaQD%3AH_qOU)hz~B?SRMUhV|D57jnxC*-d8>2v5nRJ@7q^B z4K3d4 zVAGA&GbX-Yy=v~h>i)&I8U53GqYgN${W@-}p5F1DZBNv=nFIEQw}$qnJ~m))%DT|r z(B+}M!KMTDdUHd21Iq^Nb(f{$3QWOO8LWu}L%0%GeEO>g1M9sT-^JB>hU>0BzQ|qc ztREHaP}H%gc~NkE&c4*NX0O41Wy|nreiZXAp7f`^CoCHZ7DdaVU84Iwa_2t$k-Lm_ z|IxC4Y;#Y2A5uz9FlFbq(4Nae*)?CCGI{qc!N_aQ`c}qXCFI+yWWru06ZR@#CKv|8 zU=R#uy1nA|D$cq#uvc-eZeG;F%(v*QgUt-BRgR%8PwK`eKdOJllRNkQWMlP|j{B-- zqb-Vi@2ftmcw_ajiTkQgo4B!h_*`7+Xs3f;{ZDgN#+xtWPZ7ub|1-~lp!*!?@(0ye z6Hs>t6A|; z^U4!WZH)N1MN1k}|Cqa01CZLQqBrkMKjQ!hC~-a!4jR+)aPT=up~ct*?{xV#pOP7z z5#-OOR9a62X9ia@a~mghCdFAM3Z^Kj*HfG=5lhww`IR)p_n_dM;8yt4TpFQc^&{xQ z7hU|L=H{LQPdY48ItJ*Qf}o7|nC|!h3%!8yhw!+aj64k9j7f~o3tW%58zE=1CT?dF z&)-p5tcu&k$nN+|VvBp#_TJ?U!1RYrvEi7)Pkn8_C|w_AXfzZUh$+!>c?L!G%d zE+375HvC;=(+{JJ|4&xt7?RBNxcm#s_+Mn>cTwg)D3!lbJ#O#XhR;2lDcEt%+ywiw1thmdFCt7g;{*M~-9KWDah?zXs?g^%e z-(obZZh9E09Xkyk=LzxU0hIYGS8^79Y-TTltEZw!WVDNMni^!w5zYjA7B3>3!lVE z1yk$JA{e$a52nTD{0k+S^rUOfKg_a6qa9lKn0W_%F*7~~A7ibB4->Op5UYs>8G9%T zA2dHY-~2iHcrC$@XNQ><^M14hgq1Em8+~Di@jMKHSxDZ7CKa;Aw$||BBRRqN1MPao zn*<|?xp0_ZX!Qzu78~K58CCQw^M%<}^jzo*^Q!2%+!q#A(Q~yglvmNipYNV?PDK?x zxA{V46+Q0*wp!)DOL1v&Ra|$NEDgyvn#9U8SjVl7&+DfSqUBvQbS*Cn*kpt zE+Tjch^5*>lW-K_tA$w-J(K+KxUNw#MewjU1a=EVZ{r<9Ffp2F%?f(>Lj^_(gx~fE zM;fyoi#_WQaz1fKvp|XmeOW;s5 zVvQfZsOma+*gmKZYgP-VlKtxVMY52j;Fl5qF&x^8sD(2oGW@S`4jg9c3Rcnc2pkf% zg$iS4=!_-u;c$5oJSNzKR93~$Q|#nWEz(ijj4FEAR|jEs6+JV2VNex4t9)T-6+L(O z!iXw*p7DjzRrKueh4EGN1pSIms^X9))*R*^#Qi4xyvizicnT2CT6Ze1|+EzC)gV-yzSi z?~v!T?~vz^ZOxv+Fs=ujk26VLx9|@oY4i*K5R#Vz!)@72Z%!6=o8V^nIwq0QF@(Iq z&sR)J$B+aa?D#a>BiOIljQ*M{$CViBe%KpziQ>j3cFEFv<5u)HzB@ z$KV7V?6@}@-+Z3&b&MvZBT8=cbqpXM@%_;R9iyefc?zB#zK)TkbPOQPNIz#y5vhA* zK!T3g?azk{?@`pbFUi{!{vvXL!b#~aA|LU?2a?iVl%Tt>tskEz(l;%C!_m3y<@cm=RXMF!Ca)<9PBy|k^6OLgJpEIiKAX_FM{(RGi9V5Z&I6U!*o^bdd;l`dDFNADCk7(5dEuY+el!A?Lkdm}yk zuY+)69UL>m>W^Ob38KctJ#fbAj~*U9!U-NLDvdgutv&WV;1EmjeA*tCj56Qgqi(Z_hl5&nPurEaXPG3RBxrDGsqRW+n?2zQK~0nDj+!Rb9W_m=J8GI# zchoeg?x<-}-BF9Ax~rzF`v$-6gZ;WwQr(s2AazGglj@F|Cevf1%x@e%&dl?n-lzx}&B^bw^E;>W-Qw)g3iWsyk|$RCm-gsqUyn zQr%Tk)}8-1QTG9U-R*zT_|Y7s?x<-}-BHt|x}&B^bw^E;>W-Qw)g3iWsyk|$RCm>s zbvOU7ozIH=x>HiSE6qXbj+!Rb9W_m=J8GI#choeg?x<-}-BHt|x}z3JbyrPUchwa2 z;WN_Klt0rDiOsyU8(%FR{fS$myc>xF{tOWA{_HGR+p>p>_qY4)Og)cGTUvTZi)?mgg=AT zwAZK@`(d5Uc0%~#0`Hjo0`Dle#s_hGmgjpD^S$GWhnVzUPQIV9v)Axj`?6y>UV_%9 z`QFiW|DHwYX1CZoE&>B_Sb!fB>D(DrMU`PtJ}ck*F9vp84Eu3d zlV6X>?SY5`OLLf<6T`S`&Ru~wH{u-~Dez|Gd+qxaTn&{2yn6R@+S8lQAD?G7Z$Z91 zXfw=@jRA?A`LvsZU3czI;I0RECpzEmTJN0r#clczKB?({uMN6C<7v$F+89pDR{W4N ztscr`Ji(&+Km+ht5r;AQPB_Uu+4nU3g7nUF7N0yE;F(F*yEtpo_bXJ^03ie?I)*b9j63e%Uh$LnDqZ42^73 z7#ej{VW^~WVQ6%t!qAx9!qC{9!qB*eg`x2c3PTg>7ltO*D-4~UT^O2_RTw%WvoLgK zMqy}jdNg~b>%Gi5N@w&-IkPZja$(A(!jv-#QzjOsoL-nRzA$A%VanLTlyQYAqYG2U z6sC+SOerZ$8Bv%r@_)?^ohSDH@##!CryyS*(6etg-)2Ap;J=q(emeM>&c2o;r(+zq z<5#Bw=Kc01CsT$abNTS9&5a8}=i@Y_7_I{TonK0VrO+;Yf?`t~L0<2`TnT?4<( zV^lPO{kc8)32|%SPt?c3&^$iYk6*s5z76nGUl%xT)lJb=pQMlRKZQ$7x4rqnZO=C= z9bmT6Ezome1(4-(dl)XUeqq#)?ZWysgtPT~7JghtivY7VY5C1;&xa%3A8aPjwi%gl zc+QSCj_JoGkST5_qx+Pq`PFq~3tq^86tIx`oiQ)f>xl9u-WfT!KZS!fYVzxE? z(tn7#O?htEKK@22zI_v0^hQX|HsUj+jxDT)YiL>Y_|j z3EG_F6d9XkKC>9ku>vH&sgZrfsK`z^hO;}IoGi{0%fw~krQ((14dR{R{o>EX$HZTY zzZd@^ek_`=2`Il28iw^~PKI#3iN^L950##j!IPDa1EeX_#)0{atuN#=B+pj-e90A( z&zF3KXl&Av&)A}a{5ns)k1C#hjg()MYz#{vza^PHkBm1qyQs&fl0R2G`ym-m+Y;6@ zSMt%4*(=HT4wAb|?k|oKr;3Y2V{40iKbCy6Xueh;{Bg-!NR<1M8#gL;<4fhBD;JUUm{Ku&lYid>)06L5;ZdKAD-VPqUl$F+)i=_krzMH^$<@L z`-?-w;o=l=hRFX>%+LR6PNrC2JW4!9Y%8`G?cAQ$HomvQt!=!yPoQ_C!p;2xd6Hyn8$V03 zwT)jaxz3mloW@j&|RlJ|&z6aOxL zA-cS7k)Ayprv1eFqPgD?-(2#sVn?x?c%pcU*iRfH4j0FY6GdYe2K{Di2)Ih&{Jy~Y z{6t(U-Xv}i?-d^q*=NXno5f#?Pm5c{SH(BPcSO_whWzHf2LGY({bG>!DZHjnvwiv0XT+1kPnmdp=a3?D0=Ax;(NiVH+DXEM^CD|w~3N~C=m_1!4m zDc&nSB>qDDjrgpXJm=?M6~0USO#EC-p5v4DYb@W)oeX}RO+4+}n0}=Ab#r>s{*CD` z7L#q>Z&vuNBJJat{!#H+@kMc)_y>{pb4MOraZ-@W2P;x9xy_vddUzbL*U+POd9lDtdYD}E+^F1q-Q%JM>Dme@c{p7XPv z!aIn`bAHm!lKKXVBgHWy4KEo#M?70xBAzc^AYLY3DPAkyC??PO`GCS75+48JO7HK-l_zq$hvAal9QpOJ!zitlC*-AH0EEAWC z%f$=DE5x6O>qIUU%5v`%?-e(S4~tKVzY$*$Ul!jG-x1#zKM?;Wejd`o;++#~)?{2$SUrMWpSF-N39I>YnClf+ZS zVd6+}vN&BlTU;VuB>qUeR=iQXTl}f`sQ9G#lK6i_TFA40yTpHp`^7Z;HfDU5c#POm z%o7X5Q^o$`NO6ofU7RH@5ziHWBwiuXWS`~VDgIpirTDD)qWFgRj<`$QEAAJ+60^|R zM*R)MmSP*RKs-UjzkM?&g8e-Y(d5VLrQrtsF3Y8iME3VS<}~hJ5Q%SJJEpK(ukQY& z#$P|CuuDtU;=nP5!Al3sUOD@!jlmjca9Yh*y;?@=tqra5qM<#5os?+$n$6*?YtpXG zxGMAN)M)k^XWvN|M51?ugV*eE+7zW?tfA+ntj&pry9L&UYQkRlnv|Mwx?2-YgL%XC zy)Y`UBV4cA6fgx0_Hl0Ph<)&eUbO*)1^T381Xp+xMsW@0sKCGl0cdF&y(Su3=dE2C zb=qv$gplkO(W5aFaUgmoMr5_y?<{S*-&%v4T)e+waLDdJ z0CE@1AKa(yesAd{Xl}RPo7sAQPJ`jQ8x6T_6J}%{f>asD@6Yiz*SO(q=+CSPXTG-0 zSr@+H-P&f`14St}-0;wQ=zfTo)$)r~U*-h|?9L9gLum~!ZJXIPnA^YY{`%d%%1QmC zUh1zm{XOT!oRm-MrMREeb066>aJM@!aN|2U-Y50E=x(onU(^Tf;sw@v>(Msr`__gl z-ILPMT4`u4ckPN#Xa6jF{qWsSXQ!_(D@tFRfqll>Ozbn)rmerFs2;|>d7iuW@3anoMvWv4r8Y0u-6T zY3uelO^ecEGd-uR3-m@kk3l*!({lqe({r$jWB-uDIVpNdv{%$y(*yHNx7}X(q4Vnx z_)cvu<)F*{DfePX5qP?o!1xYxKby6S-0)i5ZXO=Nj@O|d_81fQJo0$#?epy1&m8*Z z@f(A8>P)5yhBz?ZV^N-+`*|a8+i=Lt+!0P~f~ffLxC|y_e@HNb4>XRMSUT8hFuju* z>QDI0#g>9*!e@-On*{-b=2jBnpy?A02G2ER1i7k6s0{wlb?$m730+D5diNptQ!+y% zg1sQ8ZbR14sNh`)*pi?k=7$R3@2hyqSCQ%d z8QCH)HMkQ>@p635)36N3kun4){BgbE1=a9bzK;j_c*e#AhfXl@fmevB4q?_={3g z6v-NJBI<#Z*gMmJQ&tb6+P95_acf4ZhkpSLDllx#NI#+k%K=}y6H+~%Qg<+qV<*Lr zq0cR**c^vc@79?3F~o*LAU=XPeot^$4MRyeoUY?aG+E9Zcs9_(2G{~mu1(qK0)+ey zA=1FyzoLd8aZUxJfj61az+bRN1An6C+LT5^Cxk!)FPj(Od6^onVNX)dW(1vz*qr;} z83j*c{=>_)sTw^4X>mOFo5=Y`=DvlkV{%_?bKgJ@b8m(x*QPWYUh*}t4Yniq4r;iA zJxb;X-eX3#0e@SXBWQphNx3$qIfAwbQ5)=p=OZ}xzO`1viHJ2Cis@l1&V?t}rZgJP zM~K>hx%W}S1MF2YN3n((*#@`M!=rc_o?M&K9L4K#4ZMzdTe`nI3MbcS*kv{R(`w*P zxLljkXyA`E9Yt&8K9(A`PM`)}3nLI~j$%4JJc@4Mg*4(3ypF z^-a2JrmJt#7_W0Q-^sX!OoE=j)YbEM>S;0!dig!==ZDsn+Za`84cF9^)zUo0o8Y%j zQ&XTX^EVrMoP#@{=a^HW@P{3D>JKM9E^}~BB*V?Y(?34o6vIv9<4f`JB{oPkBWaLo zmhxyS`D_hRwKL1top-)|T*O0ALsXTtVRN@2r-9qh9iK75)Fvn76qtdpxfw3Q@kzA1 zLK-s)pW-OvbolW+f}=CsF)8#kjn_WF#y!Lg_nByN4rV21;Gg7F8Aa-Culj3j2mdCs}Zs_0qd3zb#$Ec1osW|S+x9AV06f)5bnsHmdn zJvdI!PQDL^p*jRV*m%zJ9k3w(9Wm=;GOs!)&Xt-vk$Mx>S)(%>j<%gK?1W-3e5~F$LKa zdQfqDW*BTVVRvw4Bl#p91&1^D&2x?A6MTfpHTIk2GXH#?5+Y!7jUfEPDd979h6z1r zy?Nlwh^w#C%#ogM(w<2)fkSvjRSS5!_(FV5fXk8VK{y;5;kV@ZetV&vFqn6FRe%j| z8f^r@Q)34C@~Ajq19=Iaaa_pIVm4~t0*B$qF92)}c!@r60Sqp;t%6`AFdN^1w!qcH z3~>!suB>cY?r?-$t17;9?1MuA1e@i6G}PVcU=cijEVMofO`*PWUwNz8iT^Qlo`Mt@ z>=v(8>^`#18$dI%nc1xHSCVXA_{(kU!f#sH{O^npZR2&{8x92!Q;c^6!DhovJJjAV z2@4FcR(JU+3IDPfPo%(kPQ{8Udi-l-Jg;rqa-cbhOgJ-VK5y@yaGK4ZUjJ?%L-1C{ zW0RN-XJ+%Khqp4qiIs4g&7a;&OiT%}2F{G@qlXQr`|3919YOH0@RYe{1rES$Y>A$5 zP)JnxKLa{^)wx*b7DO~D{3u5nnyQzbM4f2ib}r&FxP4I%Q~CFGPb6TM88aML!!kst(H z(CoS6BhGHD`Up6dHx|xriD9fq;+B|yphx|DoPOUmO#1ikY}T&mY}c;n99z4h^R%gD zrSs-2C@t%JsI@CP&s=KaqT@OrcI}GJL+4CeJazFLsOmqgWN=C6!3(C(TQZ~c$bh}W z4A`4mRzCUcf)o5vd(-Ea%_*BaYx?y3*}Sq27{rGQA~uK**IdFNK6E?aQZ*N!x5aUL zcvwHB1;*`pi;KH>nfX{6#XBp4z?NR~{O~0h7uR&WH!I@RA79Wtd~7h_ZO+Wc=(qn< zR@@K5&yDc=vV8dO&zy;f?Z$tD3EyM<*JkGTK*U}ntj#Qk|FN=sugw~-b)OTE@8b+A zTw7iY|7RK0aYH%v?aU~K|L*eqVa?kdU(h_S?KrPydAYaRjd-785Z~QyczpO`j>=ma zF{ALjj0nf!4dHGucj!5!*M!@^he&!Syozp?xIq(!l(fyPJDe9bBy10=x6*9@o!ztIm%crab86|-X_$Pk6TG4R7!_GskvFWnlaiG>?EkWN zCh%2M=lh?zbCcYxgjGbu%PI&7NeDYCOLEzf)di3}Y_bFhNGXzt*1Z-IR7kABU8_}8 zY^}8|Zmk;@thLsPwbmV^V69Dywg2Zi^PHPW0KxUw_Rsm;x!?1iea@WO-Z@KhC?&B` zxQW};J{|;Gh{Y#`;|ZIhbBr4?L;Djpa+jX4B&s2pb1h z=QRWvj)xFytlu?o2&Oj~>2W`qUIsRs-mS1RP7XGjPA%~1vR-=h--0a|Zt`Kq*ZoZ4 z0AqF_+z2ax%$MdT*n;Joh4R_@YXm=AzGq-Zaf$(BTDCg6@pa=6?iCvewDm#;ny<63 zjsLE79NcZbECntv9I7J}>aHfG!Ds`{!C84Jm_7MKi7r=Wu(=nG;*;WU#8=1!eWd~4po|7>#=U|6P&g0Agzga%={Ayl zoaEM$&HFC=b0l|{e}9pEIhc+acY|=}NTy1a=~A0Ye>46D^7)dfTBSb~sr2XPE|OYP za*OzL@j3Ao@sA|poAGf7zgKdN{Qo7Hy;zuDCW-oJBDR%#7qPq8NB*aY=B*#`>yMWy zQg|~y2L5KP2ynIHm5G-t+y==T#oOh+MSNK9KNo)`_ZK9;B${zC$Y-zo|1N$ae_lMf zpUEV`HIdw0JX!8JVsG&@`41F_%l%Br6UBLQUn-h4A&^g*{4W;2EB}p>?V1pG$=$30 zfp|ZY{FuW1Qv9{tUy=NpXvW7N-pBI)w|K}k9}uo3>VowV6}ysf?tHg`M`fECv@i7RuS@CWWA5i#5L^BQs;hvHI^WyL1|AyqZMKk^d;Xjps z5-yZ1PZ|lgOtGaH6+4kQU%HV9-%Ij9$wNq7PtAB2gqtk?xpFt-T;Tp~g)fu;6_VGH z$bWa0rJBhg> z9?eX=m}u?;2v2P!)0-g95ziBsiYr8Z!D0A|#H+-0V*T-{x5)ht@jmfE(cCYP-lLMA z5}y-)EB;=5U3^nC_YcJXi{wwmkgos9V!GH=JYI~7?L>B2&4CDo#GG0ABhi(kBa90hjgBo{DSyCgEt$oltR_9LWwW3i*ixo7C!P3$R-5J!te zqPgE9{H2nw6wAeHMfTiex_65AiFO>SxzED?QMo@YZWrx1)Za^H*H5OmNBpb!ckxq^ zVYs2QmLYmv8M3b^-CK+G*I4Q%_nu;Zu|OOyo*|woP8980OLHVI6<3HCh!={7yg$Rw zj$f^RpT1Y|%>5enhb8}9{FV5u_=5P7$exGX|38WBEKB)g@n52=`(Z@1_wlBZj~CmB z9mFg#SL`F6CJqxvi4(+g#A)IzaiM7L^C;UY$!kP*=wgGBcErF^D1MVukB^Dq5Z zi0tl5*^WbHuV2d7i?@h(i0lkZ|3^f21*ZIKk)3}jzaiEiU-~b(yLiWCICc#tn~Llh zOu3`TuE3Q0itG_gd6amjI8kIrVfrr;*-e=8g(5o!Q{Eu5e=z0S#e2mEM0Ojd|F1-L z8m9b;$Zo=vKM>hlm@<_qBu3*HripeOXjF3j@t*87%y{EP_8q1?M_eo}6W5BDi0n|z z@S8+-A*Ot{$ezTMe>jFA&+;nDRQ29f~R6FS185(tV_B6L ztpj&&r{z~Vr#SnbzOefZUCN#IU1A+$onwjnGt=Dt zX(?yy!?YsnFoLUW*L$HklWQ`&;5N8nQ!MG4g4oE|V+Y*A=MRMDG~4fBwZ6=IJrHuAL@b2qKVZM(B6b1d zC8V$4UXxSS;F?|UrOes&URvQ~>;vMo++Gtcd;CD^oX3&duJSELK_>bJe7KjcR4V+WFu-q~f0?OeD0y;G2LCQ8+;aQk~5-CfuoLy55Oa6hFj z_hkEf9p-RvI>Z_wuR+L*`?U+Mtb-FPPQc#HMSjI)Ct(j;AdQyDHQdFi+FrA=%*|?P@Y0to2(V)Xj5cq zx>T|}Zl5l(G#uAREMG=cRoM@~Q z%HnemC9&6H6|pXrHV#YNrTo;`&vtHqFYj{f z_2tgS+)b050jPuQs?2WL6w|7vBc|k)x5ZQ zSItLT`e1zDo^3bp4`-Z(eI8X4K7CAV5=M7A?VM{v*WDN!TN9py^J_TkDHb~;_QZh% zo)M-^yM4RFKG=!na;q0$I2cy_8_p4o9HW@IEwMUj_f<)!R=ItXcJ!+Z_d)7hmCuYU z9Ario=2x){C&pUFn#Xe9=~sQ%J3r(*m$}A-UG{o)sYJy$jDrlu6B<3I8!6%IY$%}$ z0X-AF^H7Aw!g^Kk@XST>^htCHC%nKg?=$>>g~lc6a)x<|F6S7vMkJvh!h|A889?oL zLQdJ_J;cA(ry-)pS7EQqXj-49HERZ~yw-cYO7M^Igyt&kM#jS%;|c%FEW+WrL?rwM z91|A79jD1E2YA5ZuI z6P@ahCv>R*aLwQqhwI$ZxJ;DG^7W@B2A5R6?z#gwRBjH%dl<=#)$0sfDwW#qAgXMr zwn$?k+(HKa2}KsdA9Tl~mi9Ne`J?W7K}XPdB6PDE-4oSS!x> zaSo?+j=>vBzq2WEB;PRR$oJHAj`AB$sSWlh?ca#(j$lwOz?&9E2w&`uW095|7aygF zQ1b18TXY&Lz#Yjw`w_%+e2gDOVK@D#BJjn9xRIyvOM@?NgNR{4cfmj7n;#Z*dYTy+ zRDYz89UY|cI(9iaiFP?UiCm73>(5EdIEwK%RET4k&6W@?Mk|i-HzZq?@j#`-O$u!2 zOHI)K;PE$kCcqeCfw4{|R${~YEmxH$_G?*9p)Bsut7SEXtKts%EvqSTVlH&yzN(Z< z;qmJLgojFL;U@z0yd>T>?&q(rrlkc6giKz(AQ4GWU@JmEq60Q0@bU%RGwL2p(zI|l zuuKecjGJuO(B+x%_hCw)43C&HH1lH-%*k_BuQpjmefQdgr^Hi*h1VW=|cat~%m~sv_B}Z#NY{~vocZqFlN0{7%(7eE5?+BwEbuKWMm32J7oUuec&phWW zVxqB*BaBK9fep>xjp6Qa6>lU*u$&kchJ<}{6F`Lr5n=Es8?0 zHci8)#m{{*v!u!phlB95L}`({F&psDyf_|yg$OrB#1mF40!w5R|tUcd@^4I2iW5X$t`qssIRlj#H^2WcYHJr~fzPa+ss zK(Oh<{i-#zY&GuV2<3mbseq47{u2o0|K=g{=T&Q<$#XoxD;MhDUcfjslh+0R`aK?= z#_)7u!$K)Gm(rrPQC3RJ9oTRx608XXDl4Uh2Lr+#rL?F}Wu>(6%8wXt1Bs@sj3d}= z%yMe>U?GUf9)BzWW0?|kK)_S5Vf<1-Vs6W7+Ibnp$xigaW`>-J=T<={mei&Tu#) zaHa{IT5>|SR&7tp>Y6na3;1;D+9$Wm&|EBd(>3R$;hl56)a;W^?b@nq)@k07Y%hIS z*Dk&DaVP5jxIepriT)TJ8>Wc6= zStGKt+92C*T}E~;z)pEsc&KC;`u}^&eS6evIorFa^h57cC)&ETS5_LOt!r1= z3!qPTk9_oC_ZMV2HdbIxZZvDotn;TYot^bnjTP_*2YkkG0Mk9cPS5;93x5QkKpWC4a7*JI?MUMQwuHRnLmCJ$0DXP`55@tYjU5{YU=JG}IgB|O z{}F7s^BI#bTG()1;6OW+M8+^&@JYr#8|!xwT!QJPol=_~ z&q13W`Pnmdbh&PI62s8Zf^|#dg;-B3$|dm z2a(VcMv$Q&H}-8Kt?7u4hX}{;foACp!J|80*bw|P#{sNFJMDak^a4)CYRg06*f@YDP7Bln>x9>g zLyQA3chWx(9tlxjQQtmg1w~3}bBc5r;;Lqf4 z+A-wkB>zVIo%ovghWMWNfoR$};&ZYgmMc|kAT}3G`-gv9$+ll{FUjW1EBpsb9xl!h zO}mHxLdi?SZ;2O(7mJsP-xDjuN|8!@miIRC2O^)-=>DMih`3Gsy#0y!g_G%-aX28q zQc||-*)))B=EsG*UB{+_+_Och{uz&78Av-Wr%>`xkzY;eKUth9&Jh=hOT|^<8u2@# z8LxwM)=ReQ+I(N~jiT*WOobxzJyL(-7ZvVh@lWDg;vUiVD>mbLknRDwhj8y?KGd?3 z_4^mMkvkQu^zSO#e#ZPhMfd*VV9|{8fjhr*(f>?wsyI`eFD??7i{BFYDVp)G7Hz-e zO362hwx9CdlDCLI5p6%^CnP^5?i6i5x7Tb&bw$5<9#Q|cWI6@pPa`sb(KUbV3&K1o#BG{KpUM-f1my6#OH;5a> z&7vJwRDZo4e*9!V`WfPp`YW^d0mIvV z%4XaV4#w8*Bt0i9}ZW3=2Zxh)ag5`Tyd{lf= zd`{dUnsG`9|Egs6pkVyJh&AFTV*UQinRu6F_$H$5*W6n2DPp$RQ|v1a6l3B@af~=o zwEdphrGxn`5m$+8#4E(B#ro^-+$8tg#QN*+u#X7Se?qL^ANnP^zasuwd`H|XekdLg z|1GBC#g*wd5bZiVEhM)V+lyIZuGmLBO~hgO%>Jroy-6M)hQqAe_W2O~O?&0mb~lY4 zslRD{_nvuv@FVv(ZJvV6paP+Oh5b#B$D4ZbgW>DfPD3x#0=Hj6EUmyTYZbc*(+oSU z|NZw*|Gj8h@z0!JJjiDf6DREQIS``1aHw$${GtCCJMmz~ck@^jN|*r2Gmr4L|JXB3 zE1Ym4JwB#=zzigSu3ZmNh$Lh){vmscaio)aimjwI>nuNFdk6{WoE3?gsNuhu9KyGl z^upC}OyomP_*R$iP)TXwSz#`+7@11P+2QXnm9|b~AQ+xwyfCwTq?o>QB}OpZbsPK> zub}I^@N=-IV16Q0#i>XNPZ#`yaj$`xik@Jn(GrDA8nbavXD;k>lE!r1{wx5W+|vf) z&mBPV7TD7HwB`<62Wx1(lhF#~`%?pVY`Db9YuCUX3pBzqxSEjoQ|L#q2 zaNUMP!}Iya{%vq-=(f*joa$wqkTD^#p*z+!qc__*si~*I5p~$i@%ugvg+?YUcQoLH z1_*-Pm3IQYlN!6Jsp#UA!1;zF>3&4`^g^RbW_SilIqbyA>^~LgA(d8l;^g#zi1acp zUyHrL1j*RVIDugivlrTtSxgkTcuhkg7F2xP?TlnxynA6rNj*yBNA#KF5bt2LSABt^& zz*Lim`nbz9f+i@Nv*p;w-KDdZ&s(&3>VkPQrsn15yG?!ciy6TB~$&i znQ@YR!H>I-Ic~IlVMlzSZPjs-`QG>iCx!}?Mjt8dXD;i5&*GEK#DA0R#DA0H6aP(~ zVJH5Ze7K4KCeJ?K_{GkeJa+o5=}V`M%Nsmm>geSQmKDvKTCljdctO!pR`uj@CDRwd zf0i?N)P(4uXnuC@>~7J#oZS4}+}z&Lj!TOc6d|)t(Mbcwj_g{ra7NLrSw*w5@~8IB z!i0f~X3mW+Em|>e8KxSG=H>Rn{qEdo)>z z3<7y}@rwMcWyM*ua(lp~WbX2XGw_}A>-tt1|1fAK^g61~lM9O$E-T_(b7+|U6k-Q| zdyFT`Z-%vB5bHQEvvZ5p`XAy8qp3B2F0#3(sVIXiTE1}n^x|bsya2_678lK)?K_yT zCP@aZZ9vO#NM{zYvHJx&#K%Hs@Ss6`q8)k6$1h&IU|Dqb;-yg>;b@_baCG$2#WOKM z+~TFnI(-F=0(VDT{es^Gd6Be+7sCM=nf)&g_y3O9|B_Jut6gV64>*3!bAX|7*PRC} ze)1jr{%4O3E|$iejDI{$#J`#N&z-&>|82M&+4;;&!*K14&HuwIwlQ7s4;60Ql;F9U z=^uxUVYpEqj?JbGt8+Fs>gTMn*1>QHrnegDoefW>$FkV;_@HUy!0I#%`Lig~PGkM% z1?+UEj_NU5WNf%1$iaMH#DmHXxG`V4+k98TZsWk}{1m#HC@nJ9uLN>1y;~akdS|AG z$GCWUSHf=N!0P+~=>?yWtly>Z3#PX5^%6qeoqXh_XN_j z#|>2;Pw!6H8HeqG=61Xv{TOv<4gI)n6>YdFNNkA>BtM3GRCepN1L15Oy0M;Veugbr zzUKn_%g0N5JgED|E*1m6L8PA64l+*~M31+5$~_V8HCkkBI5Mz%cW*adv$7%%wp!QYoWr@qV@tTi6SR@(1`ZQ#uBgq>@>{d8;Zhw%r$y59}s7kl02 z{TGK6WX-+*I=&;0W4fpsUc*RUJIDp%GVwz35^=qFgLu1mkNBYYi1?`ZlK7VRk(h$U z#C(qvTah?F+lU=VG}K-q--{W3u;dYv&y+k#a*^cul2?*Q_xqBOy^(n?(4Ef&B-;TQ z72AnCrgZNr@}-;dKyj!zQncUG&XIhcxL8~vt`gUZrk;`R)soA_Tf{rWd&LJt(@v6V z%MWK$KD&R1*9-N^`8;}|?%nW&Y|N4MLht&gVm-Z3!+mbJ!Om8(a8*JqGxkjLPGxsY z8|&o6TE~3NP&C&6{^FngJ9^+9^DT-y;)LDn@b6M-ak6o!`v?6{KU~P5t6>z6@4=x? z=E#H+-lt0z{z7)WLSK=Sz?omX)9Eo_AtQv7sPcfS$b3SIByr}O+Chagm<&J8dj2AX zpU~QxN8M}1gtBJ%X*>XTqcwUF7K|P=-^;>bs%;?UAZVf+zSw26Px?KAI7!3sUz&tN z=d4L$E4?7;61c2R;!HE&PQsfVmN$wFfe^mRoz7DujSu;_=D4zR6&IUTBoFr&^oomMI{ncOeF^u zQz>;7Q>j)lRcA%7p=RN&{)yKOOrtW3%BO&8>IiFk)vBf%22@jx>Z_(2A4WCB;{`QU z?QIM)1*oP7UdEuBB06I8$NABAit!jtFo}Z)0P^Jsqko8#uu+3W+Em6=)5fTQbr2w# z2Ms8*c(?TLkE01C5eX(SHjuWIQogMq@aW6v1tcm6h0wjWc1eN`Ryp%f}v zzRZbN__(1H3#X18Iu5lzXh@wI|G$h%({C|HrCf`bWPIVc@l#_1hK`spw$O>|&5V}r zXcTbqbg-hpgpq}##;Xy53V7_U1 z*ep}Nbhr7ggx$tr8ZW>jN{fv3D}fwL@2V#Lvm^I|uW&ZKD`B^BV0Au(2Olo2v3{4r zA(-Cvf%Nc{9Z#>mo{#U-PufHf&RXm1`R+z~JWebhR95ly?o=GM2by2uAQaig1DWY@ z+bY^{UGTcJ1a8*YaF4=)c55~xoQ*>_)(cI2J>S;A{^HQY%lAC&C{8is&~UD^p1#%m z+q}?>;%%NDNjL~cqvzX!%IJ?onj;RMyIH{k9d_sIyd_jC&d|TWjekj(6pNe5LHl}C#Z-Z7J*hTJr#bM$!aiM7Sd#fqq zI#NcW;g^foDcp^cO+RbovqiG$iv;->lAloc=Ovqd*6=qvBBX2kSMzm|<)&f2Jm<(X zk>?-fsMt>IEOr(7iIL&@hy~&h@eGk~x(rt&&J)e?gnNnP)nb`=g=qDPy!JAk8^t@s zyTu2@AB(>b9~ZZaJH^+@nn(eB8D^V030OQ z=z$^ge*0PTIDUryGw<{0Kl6L!*YeMwOl=^o{$y&eGHI*#q!!cYJMe0P?3hE1ibM34 zn;1SGa%2^JFmKvAmIS@!0M466FZPzZlD<jba{#FEtg)!M){< zO~~;zcXB(_gdAT=pJ$rDQR(y8Ma}d`tJP|$BO2%PI2ujf(P->!CP$}?J9x^CgF4dH zmKNOvSkichy2Gj5zIm-0@0I@@edkz#$8>7EQ_|r1#F&%u&!;S_56JhOKClp2pt5|KMotiaHBjNn@t;5)9>Wh0S9Xx48LG{n~~mJcrrbf z#in-_>^2Up4#%gyON)&41D!=>7`<`>0JrCjRUK*AL%iiHP-J^I0VysH;^7*KW%#Tb!sj= zj;8Ni4brp64OJdb?@riR2DS&9pW$8WNz}D9^y9WwwBgnwu_ZQ;{21<0*{#<{2xsHa zjr&1UU#CWe7VCxe_gOl%cBrJDOhATt(qQ-EZJzQZgnNw^85@oa?4HvO9UA(>u{qpP z1XDhigU7<2L$ErtP-%Iz$k_C(Y#DSvrcePOx_SDJW(-A%qMZa_7eM%Xt-uh18|(eoh$bl zk{3uea~UArZ%ZzdKf1)5bRUq6Vi=j{F7x9v0?G4)jEe2V&SF=QujC9jP#h|b6#t9* z(&Zmgm()8N%`r+N|35b;r$>(-(P)16-bX#gGJ0rT()TgOG6wYrMpw>nZbw(n#^}n& zd2CRBxMI0w_;+(5@qpAfCQ#@E-rqepk=@rkU!CNI5|%;=QTO5Zo%2FTmqPHu31&71 zlZDYCdEq3gsJuu*6UL7ueFRB5B={NK=|l!-(h1pwIOl`kcP?}dtwx80aH$XyFf=mK z#iSDEeaj1nsW;oISuNOf#@z3KY~9a7BKA+3f_c!=%$#ua;<@X)vp>AUnDR$qto zIujZ$9TF$uaQom7-}(3lay>E`*Vmq#{Ow5$le$qz}5J*#JivX=xi1A{i5ujndV* z4#)o3G`e5!NXsQXzm)3ebT`U*aC1*Y|1p1{<uOMX+DF3A95uP5Cyr!1FO=Zm;fqUpe!1b4UrO!8)_WAnqqxrNKTm1I=fT72 zjCe`>59){2^S@nXbOP!V_mnz%8;Eg(#}Z>&j%K)qCqW!CYgSE!s7fi1V=^aX6bY{KujzdMf%YEqY z-|K<>4eE=wBOG?Im~m*hu4hl*YW{6rh#o&T=rIW4c9{_VpAAO_cF&0%rM_qgDlNDl zHoZU=#u{}0D)dFHi&|rA&v)_SR}Cxk2-ljgVyq><+GfU+tXrC+8Ebhw;<8S7ZK1xX zQ#>uDTkjD7H_tlfY65~qkWMK(bCpD(Tv zuM*dbJUe^3qV(!i_E``vC;PWkuGm|G*hG?t^fj zTlQW&KcxVxil)8=TV}Ug_l8&fdGE!m#(j`9jA5!iaQfT|pDPPece|mt_J-%*4Bt0R zh{TET9d_$pZ~mY6UNrxfy%()|3tQt45+>d?5TWKH)O^H+Yk1W!cP3ONV(QC5v2f+X z_a#=|;#4;O>mIkyI;2oBkfn$gumsG1-`=8OEW^INg%h{zojLLSotJ*#%x7IB?Y_u+ zJZ^v7yXXUF72PxTyBXf@K_2~|FGPq{N&CY|DLdfTf8jg9eV-Zo`8!Efsg>UDwO&$% zNwacSO?Vq)hY&ldA{nccCRar8AE`*gs-Jhn(y%J&$@ey_%BVcSZBdX>o>JMOAf-IL z@;A+sD>66XLc8zsvIdor^%ap2T1aNht?qxAtDL>gs`B!P|Q;UG+MSN*SjlEf^H@Dkt6-uKb~YT;^{;$clko zOsJ1{x;@V*+`GqJ6=IE!eh4)fQVm8>Lupu@II=&CwtekR)SmH4u4qtoPOC@%`aQ4P z18(2+%IojHwPoX2Xm>)>95z6 zk3HTlTK)0U2WYkZ2-ibE=B8U?B+RkF=ta1L=|{rp$T8vP2!J{FehH_<@Qe6|9{3mO zryyWtgcE)=eI3KLb&}s^xX03|t_`&fC9~sT`0@1DjTlbmB4ObtBu1Qs%jx}O`rAN? zuZz75DPlTSWJ%+`g9uayUrq~OI?~$1%e~@tSZ7h>MB?t16kEfVb_asFSKS721H^RZ z=Uz=;b~H|BY25EoWR;|Uhra75Qpt^R!w}a~WYwgn#6?cVn{J+*%em(`N1P0<+gd@1 zGtXvlHC7`vK_VGgCUpaga5jYWU$THkypDeJCA>zzA25q+SXYA*A^x2~jku8FDcsX* znaAHKc8!bOlOX2D#pM(cN`W7Qn6VNI$zEro8YxdwYdl$Itn4Oup;yal3LD}MSgMr*hf86>xhwUU+?ihz_KD&-Qd6j*M=d#IEauJai8rSL8`6p!!=&!_6RiNXe@KJjyGNapTR zT6hh_f{vL$BV!#$+=k5rp@p+^W0}!F3GR-U0Pf7&uT3P$6s_T<44(rC`tw7>xN7U! z29}N{z<9#1&!TT5x-4B%LSa~iM$n{lUwGkjxt&ys3dF7btx)wEpg3#+SX zxd9vYnz+e#FRtDK%M(UG9<)4#4HZW`XWX%bCoMaCcU##gMs3~ltE(~j`1cDxo?r+p zr5dgcIo=QFcM@Wd2wvs$+AVk5RCDLJGl&qerQ%ADEEF?0>nLK~S({jGOq=G*uzZXS zWg{|hmScs*l4@EwSqy|()wJ*{H-x#>w2bzJ1=Yo{tigt(MDR-=0ql4@Gs_Jx(zw7lyJtE*|L@r4D|5$sblY{-t_?C>T#T6*~I z2k+Qu?idF|;5g0(SY}v>D~xqCOY1k|(Y%wenE3ofuw2N@77x)_IAls!B7`jheMfG) zr8pi&GA_%VZpMWrZiNl$v5=?v)|UXb`oKpvo+r#P(YXP48sGjh)mfvbHwfkZmZ- zo2FdL3^`p%$XV);+*yPlWz)C`maW)OR|KyX*y9Zd$-RXu>)>@$590_n(?FH5t@E;i z7TuqWVnd7W&y_)GKLr~SA$Zy|n7xeAj@ZWV9iLf;oZM>iDeMidI>am3JZDX5H7y80 z_jLe^$Ka%Y$jtiL{vkW7Hj~`=)re>D6m0l{N^nn5h7qKHEgcP4W9%7+E7A3(_9z&^ zwmk?NN~a;_EK?ujhy~ct)ZJ=YR$xoUMIiaZcF7;LH`gOBG>`zNZY`>5bKY_Y5#&tFy#{a`cZGvbf@jQAsuBL1k)h#zlUpOOC= zpAr8In?H{OPY&$UaPlVKK8)194nIWLVGOI2XfUa;bxs^!TafPHHG!};tsbxp#D;4L zvD#GY`q3nBkT^zL%u>3eA)s{=yv!T-z=7OSTH6fQkFITJV{JY>dHeh27-HRc?N-@h z)@^jHTRa@qe<%-(xfU54n{m(t<>$;!R5LgCKt?)d6mnrl@g4W`eVqGB)|veuU9=Y8 zPK%ZnFJ3Uc#LW2mrM|jf<+@|NZ$-1XdMs9iZ4mW}qh4lI_N7s*TiY(zTN1^Wd9P8l zZRDLf=L{b`!b^LqL)Wf3-imB24!gT^{yC?1&F{=bZ?Oz*>wey}?5*W79lClM>v|6G8kBfx!qaLZ8jIN z?KgYU;0`Bt<__J4^=E&FmEZ5g>a#1>d3&5}Zv(RXhf^~0p5eoXkMlAf-aMqccWG%q z?+Jo3p5BR@8j?|KFVrdd7nD2HB~a>-0c4-1@XycU6PfFD}ni|>vshlg6Z`Sq?ZOiTfWV(+c>Z~-H_gnL)0_h z&4THTMta;omM;UFP48~lnI2U^G+q;|xn&y#WcqRYv1r5fJMPf^9-dG*z?dxvH^K@a z^QGB_Em*#@1N+M^t+sqSVMlR_0b@QvdOfWG+PXkB#M?5xyER826Ix_!I5JRO&Wm^= z?+-^L8y}y;GiBws1{8p-A*9^uVPIpT990Mj$$XCOZ$`7woOKR5dC zl>Cz9*Cp>2KM|90BC=c=B;qxf%oVKYPW=U zUM{&*GDku%T$OmIcn^tm9+Lb^@kQ|s5r@gtKhMHL^$Ecx$hhMYV`$nTj#nqirX51= zE}5DGrZY?&BT}PH_gNzEWt10-%fwZpX_xT7Qu6mi(=Oq@S@I9X`^1OEpNqc|pA}ye zso-J$Z;9`TABrD~9*;A^C5cphQ*I>kgCphkqM0)Za*pKQ;;CYRI7B={94Af|r-^gK z^TZNyrC2InB=Uz9a4vIqHbv z|0SAQL?=b``sc{lxy_U~#xOUOZczD$W$=i;F~l^JRV) zikFF3iPS&Sf1}8c!j$h4&Bt-bKaBJLq%ifGri zJx+2|Y$s-kxndvDd;vf@g_7+Ww__!rDV{4%7w3x99J3tD#czpgMSlCD|M$cS@p^Hy zc&GS7ajW={$UeAC=SlHJ@n!Lk;-AI$#l7O+#D9pq{W86CBCWAW$WW8yR7^CG)kFy0&D`{G{lZ{j~hX#7n0L@`}# zC>}4KD7F(jie1HSBKvqS|H0xYajZB|v}@S169~gE5m$+8#7o61#SP*{v0A)Yyj$EN z{z80Qd|rG(d|iA~WG@t!=O1GIHEJ8;ah?86MY}d_d&%s!LjT@kp*U2uYtc@SJY6gj zmy6#Lzaw5Qt{1NnZxnA89~6HgJ}Eve?i7D3{z-gG{G0d>(ZvfX_a{M27aNM~Y(xLU ztufnM{-=uUj>GU{#B;=RMfT63{}OSfxLUkeyi8m#UL#&FZWiwpe<=P)d{}%;{H4eq zLCpX6BKrhU{y=1}Aj&S@X-G5^bRYBe1(az>T%HWs4}daW*_{wx%Ix!I*Suc6dPZx_ zk^1O%&+pm84}Ii5x-0pzg+rEaVAsqoKd}E}_dv6D8-9{dIcQpFf7w8{PhNproDhqZ zl{?{${u(Las=KE7tE7C2RZ^T^6!Jc9(h0l&2C+Miv&cBq{X;*$V%)R5QE-m;^J~G_ zp@g>dFi$GBpI;w(gcByw!+Zp^{ro!8Ba&b~vPY8chE&_nuNso~IRE^9e%%?{@8`$I zfOtQ@KOl&iFVKT4`u3T3ig1`c&mi%Ga_u@PjUYKmmm)@K(%G=CN#dK(1xe4sWp&b} z@cnkuNZ7GX%4!I9os>RPG~ff2 zJBZ!wzE6=kx&_REZ?X-TqgzPvZxlbI7`qMDrf|yqJ^tJwDfsV>tzk#FcSeXt?%0g= z;lveAo3(c6WtxFFs{#$R2m5jP;tTYI$_ltebtlPP+VeJ|#jRI?|G_JqK z3Z6#}x%@8=Z~Z~(ZCGv2Xd>HKClL6~fUC=2-O<&w@f=4Of=L{_#!5RAU<`3GHmL+4TK#V4+skr#Mk;@y5j<2#|6VOF?0?wiTXReKIm=S z;U8u=`SV(843$Hy0VX0*@zi6sxq@&J_G09`7uHuklCsJ)G5l@L~GDTcCxHz=xX`fcJp^ka++c>Z~)S2PcHg2q61zdvZ^$VoOu{<`tJ7KqRm5V{oJWebhhnLy(9)z87*dAz_Cppe0+sGi(kJ~oUhPw~nnOLXR*l^q7K)W^VP#HE3 z-Iy=U)7XOL8z0zT9GZCfUV$CODF%!gkMw$40knCc8O7T?y{|;L_i2%_;mAOVhHW@NzcSk~C|tZW%{|0=$hM{UA}w)T9-Z(^Q+w#W)qB*P<9YmR1~fDQ=GI^lhU z-^T~lM)%YGtY;BC`_`W{;1D-~_!=(lkoFguLx9&feoxO8PZJA8^ZgS3XGxwS&J@`= z8UK87jd+!~UNqk;5$<-$Tg4;IA@I7wy)Et$KNM@kPsK1QoaIRsj}y)Jb-0g`Z04JU zY}amCCHL=;xUO6-ewW0_YQ7(WMo$Nt83_@e^OVqk8wvRt$>zHuWU5N&|C;>YmHdHZ zqilk|`Hqf!vv7hk9h#tiFikSsBi*ASk2~egVpq|;62rZZQ&@kQ}v@eR=&ccl9_$^Q^t)*svxMCzp| zA1}5R?e}OZs_5Ta93U2oiA)#Qe_Ov0O?X~)7|$GUunA?{M4HRJYhLf%-qBifMEz{{ zyk36jBkO0c=RrTBe%1--XU85^KRb!-$|M(de+;^8xPy&D-9PAO`E3+GM6lzq*}KDw z(xuZ#{)ZAW8HNL@L!GA@m!wVN*Lpmyr_-9X&`<6K1Tk9Mf5JjNEfEes$O9P(k3mqQwT(hf;@4#- zX$AgElTu(^lf?c27bHClm(@wvAndo3_+=eh+bbYIYs>3Pejcxo*eE10b1KT z)7Qd6t?gYJ(CwskW}Lgz??X6@?@sGU@rUWX5RO_~c9{&{BN1BLdGx+F{WN%|yQd%y zw6-iI4Nq4Zw=W_Ytt~B4xEQT1)wD&}8ni$f?jUApw6@IAEntQ`pBgYnw~!)Fmj>@q zj6DJ?&yLLX_;ZIaN1hBuYdZiT>S=A0au3$pa?cyP?3&{~kJMbZ3DM-c{QDLD;B-uD z+Ye{!F|94y!ZEGw!mLG$7Zqg{P5=L3VVrsorT&V8xL$lUTHDFc+Rpa1wnx&lni)~+ zEmwSS;lA;~N&mlUThS1p68CkkUzNh$Z(Q+lK>w{uS}03RJN;bB+HY1xJA2+zPB0uF zN*Nzc$Av?W>2OPymQ0`FWG|b$Og0Wzaa5-?Go$qZl4A;xp{6D_8(R9Iv*Xy{+Y*ecYWEgJDkNORp zHmpX6%RaQ$SUWo5qd`Gs%`c=Rom|k%py>$55 z^4$r$jl(piAibl};g%si9w*lGXX$XW@eY5xZ9E9eytr)>*=}fli`T&=zSaEOaN8jT z%Qpm-VdF3$_k-qXY{C7#EU>>gH1Ykduftu5^m;M@8Jkx_$bn)z_afZ;HV|mTk%4CE zT#SR!ACA;VpedSsd3;#5V0up=gJE#9#-?Xw%b@!)9d1*n11g4f^7(bR{=>=iI$i~&LXb&{({TxaTx0l^7kR7T)q^ap>X@Mg>t zWHaUo>AWugx8(m9$!4qv{6CfK;l$*Aq?3r>h(x}F?|JB z>H76!jz8+@8_?-?&#hJIM!$KT?$PzRoy2y9HiE0ZuhZp1+efX_HD503C~~Q54TX#% z*E^N=(`WPl%j$G}Mea}}vVrqSEu{q z^xL@SR;T+=U7hYv>gjYJmQFW{IPL&9ikxT;(&-Ki>U2%l+ad(>b-D%2uvVvQl(*{oeGRM!-=^m;l?lGP2v7Wfcdg9KSzM?2=-mIdm{OtVfysRGiGv<{{ zE}FSuUh%S`$f(t7fg|F##_)T}Q z{r^>`>uYmS_rcYwj28AQ)9@bs0_$;w=zm1VTiXHlzfz}*lj)dF_bbuq9$W7n&#czy zIrwYumwQa7>(_W00JTHh9MkFgy1VVD5!)77ImdLm@g@Qtaj<5nGxjwKHiTD4i%kEp z6Sba(RwM2^{%`lo#iP%W`{nZ4^lQ`U7NVM|W27#hJWHG`&J&O6bWuOJ7#`E72WQM^OETl|suKiE&VSGUih)6LDx&+$9z9=V_H#T>{K=%;JfI{W^XgjnLb z{+Hc7xAFQ0SnJFg&>?o*2DkTuxyP@IU}dv#EOGaMkhjluCPkW;w^(-qRyTX_!f;;0 z@;wEO|pH?@gzvS^2ElhP3jGibj-S(O;Tc*ZRDx$GYvBdq6&`q(sVtF-@5q&S~SrZwZSCjZ0 z^4|0Kfs5Vk?}gmav2$X(-V5FJ^nr`qq}>tk$pcs2)w8B~akrZ0(@?hSpE&Rx*V{eB z8y`D2_NxO|7e063Qpk}cr|S6wm$++VSH_r++xM3TE_Xx7&8c{5XL>BTDy6bPHBv@d z!m-c+@28_<8C4J5xBWfGO{naJ9Gy95ygxAGr!`JyPEDw@+xO`M7tZ->!J`M(7M}Fa zwg32VXHKkl?D5p3jfvHR-XAc?`)dQwD+^ckS?P9b6$@AVId#zcg~l~n(~GOL(Wad1aN;qM&(sW2~apxcoS*UY1_b!mJT@ZQ1dgnpdV&g!-KE z{`%D9@-yClHk4NGVokgB%20ViMdM1;S>MK3f2&PR==8*@Rh{wv(6F~Zk}x&aEruI)>n*Vs zmvyg+JlASc_nO2#&mCCnwm80fP58NPHBEAO1iIIR_T<$xnf4rxpL=>}cY)WofbI!M z<4-$pagr)i4}>pCs2YABQcljl4CR~T_8nF5B#!^zcRH1iqbB|OMTz@{u_Ry0emAAE zFk?qzRYi@nE>guZ+7jNgGgQe^y@Yz@%5bdLP*tc~s3HaRmxB6Rb8mW83*(bsaXj3< zA8E1UxJtAPH@&iBEP~a{A|nQ1!|G*Vc!b-Ft;U7_{+-8ddf#bSaNPRzO$`gu*EdG3 zMi4iBQ>agFO(+%RYvA_%$IcVYs%1^8n!j^gReD7p<}R6u59Rhd%Ii3hT~0^BfiV22 z9yI8_ZYCiKCoM(@^pxkc9bObcLMIO8zZ-c0@J^w<6F+mHr~F<7^=cTt^Frg2^cxp0 z?649#y_EmqgicJS0mBSfZ(NcdWf(I!H{8s#Tm zkJFfVt!L1BCtbUg&>E#{)+MyEV}jRfBmU7X|2_mkfz3p1kuc6Y_M-nK{UYH!#7Wo& zJ9@$MTSLNgv{$*@yM!tP4R3b&H8;`BX@b?y?o7WJ1?K8!cd0wPlbnV`&^w+T#JT!e zbBaGq?}KpY9iPlkLFgUti&*{a40_+2-XGp6?o04=*-_qcegJnGmvg{y^|RAyiNVFp zlH&Gf3acra^>YSLOvIM9jcE+r1)pC-OlN*>0ex}3b<$ZHw~*pB@JKf^lEf%-0^alt zW;mE)M}$k~_1zbn;%PUXV|Uyk+4!%5XjVTP+6+=Ej*(gY%t&h~VfC|NEJ6*0^oJSG zh(Ab#A67pzLQiyANq1R1Bi=yq9_BclRW}U1UebR|aRd{(f+8o-aYwQMTPbp`I$!LM zCmyrh*(jFh14!&E)N*j1jv-bTV&%d4mJu>n4fOrpMgJ42#@aDu(YY#d*FjKF{Bx@f8HghUsoRAwqhKQwY_ zZRlH36Pon}3$=0Pw8n>7Lk(UImr5f!gCLel+vw7=85=!Fo&m-Kf#QaJ2QZ}x!AF1B znLylPg03$srG@d}4(GUO1{>yYA^ccp5p%KmYpdn8tfufj4wqRXYL-#! zZ-k|5s%c?ULA6B}yN@KfV~J)p&01)Q-&6dS{k z?fjw>r^uPR=N||Z6y=PY9N176g8p@vUuyx^RwlrB!msl)S*txvF|fE1EleDR-M5Ao zUVD)sQDEI^IolVmFQsLg5wLknHuPv{Yilp}z(28^)O^ zkTGrW-vJvIl_FS3%>EN585)a8m6ay84cnOXgO@RR_-8mSnU>oQ6F*hkk}6ijmIH%A z3T!d_1=m8=HpSZ5eyUhn3YO=wxz3ryN7%3o-KuI@*eeLa>S|hA`ofxOTKJJ1^*{{t z-B(tRg=MyJKZ{sotfPrl*gU6rO*Jk28jjQH5r7R0`CftJa=kf7%U4#@!fT!9EMHws z%Ok$9rka)~u;D}_p7-5XR@3sTaUV;(Zrsu8IAIwtpC~8x#hBWioy47m7k+2u0|ma7 z`>?`TC$X$-@_1z^Mk*|1psZ*%*TaPcOvGwqB{&|mvn=o;GE6Htle3wzWh1U%2FIBJ zUnZC0+<<$EZzxw{OLRt8gvV5bnfTU#%)~jvnf0eViY=H1WoBi=*tEIVJe;m`4#DGx z<@E^eBU}mIH&9cxhvgg=fwR3~4KjiyK!aRGK4P3F6aF4gVXePyT;o^47vtHEvyBOd z&Nd~~J4?U{N7b;E_$3&_X>pk~3PapstY;F;8I?=;xt{qltbVTJk(n_o@P8RL1SE9D zd#H2-f^x=QxDz}E*mDk{9EL5yS?1)mucnpfJj!WLeKgf+aG8${O}Mn07M^KvCpbwh zBV$!FTFZ^kIAS90F{ zP;P=3G!xKX*>JXx4qVvQmGZ)tj}0lTGbvE$hYcwZylfzab)}nOQDGj57p7Qs#?|In zcYIbs=$bWKVPWII!6I~%s98gcf0~>*MD@zJtlv{irW0*GbViECut{#ihE_o2BN5&a z$o|++RDz9z&b*uy`_2TLt66)F1^K0MKZ{VAt}3lPUnlXr`Vlr{L~O(6VJ7$Lmtc9# zxQ`=vtuRUQbd8#F^PR$&Hu%rRh9gc4G1l<}j~ra>P@TZ;iXX}w?S)y}h zMfj|Wusx8${E)mchbzmQ@U?lfET0(JFB|PmkUkpBzBRNoH<^vE2v4X8w}hR?H_`EB z+Wmt2S3KHTAnSjq!r8`V!yrFnUci4N#6_(W%o=Mzt|XZ(u3)tnn6ZlEl*8v*<2%ke zv2rfMmV!~eolgIIrw)J5i8t9h;J&49aHhawB6!#aw?z!P+2r{k&(~8lZ|lUXS97$8 zV2*5mJa>X_HhfE15CtawWMCdLj1&I22bW;G0vn4LG(SL^);xtoLVh>hV-xLt6BF(E zebjM8zTjxh#~im`5AR#ile`Am-qLI=i03VfcEEglt*}~Ne=KDeZPzw(`kc|Hc_}aD zw`qkH>c&R;=XT8XQnS59*+aD?UD~ibFC{w{F2muG+b~-&>sRHSgE;q$ww~@99;QmU!>r^0*0$*omXESe`eqJYHGpQ{I*C zhml;Yju*x1c*%Ev>$#5k9lZ0iy{7$8oX%cTuEf{bEQ>eH8#&C&!E$;1MlwW)4qPv< zan!rHbgj3`iMH`>#QJ#2XP@gWALhM@`|bCz9^Sv58*(ohUg$M@YA#mDd*gzB-qh?6 zKB~F3>y}YtW0uK-rAI!x&eU5juXf<-|6PwJJE@yp;w;ZW(}<7XJXDXL|J^=NpJzq9 zsZ%j|U#`EdU~$2+62DWLIm&g{$qOuR_Z9S&^3Pj;IXi#tyZE43wzk@~SI5~-8n~oK zHym07G^0>K(}^zLb7|_-v4!K%5EjooZ`{09MNV+lyhC-!;}{lyu|Vd1q&4(D|CE9L z5_*_7@UsV{#@E<$1`it4C)$w>bo}DQ3zkJ^FJ2l&Z?S0M!Wl)gW?@Ok(MuQ4ELyf~ z@zQ0TqWRgqv%5v}a&q%?b1{=k$E8IJim+N_r|2X^=~|>HS@~0YXU$kTebLOh(WONz z<}I7Icu_Pjw^v@zUgw%Mi-L0q2FD@t_V(Fp>kY`*=z7oE#q|dCz|C+vXAW@OF0dvH zTD%nFNV7)fJBjH@Ba=fZiH*Wd+@|hvUUT<&w}pFx*DBP;#aPsDE%e8v9=RXWVaKKN zNM@q~vS$^|SUv{>fM+kppjKm_K4S*!amz?jz&W=UQ zX4q{USeT$$1Af=T9!zf<661cdd>Pnm`R<0D=`k;w?g+4|-f^S9(bR)B+`U-1 zYzZUCFbuaRL^(TAs0v3|0c5^3+pq=8Hx~(K!j0u?gw2+3C+sLrF<{IBq}S65AoHYY zh%HcT=VpZalkxHYY&bGdT~5JC*e5t12X~t<%fYe*(<_PoXRNJ?G;8T$d~tiq2-HRH-NZiP=_1=D$$9yS<|4$`vlm9c4sqkdDT_oBS z)dx&(pWOc@nX|DmTmsrS>o-}XdW+#(lJIXWnbWILwrhNG9S_FqBY(5T7yO4wo}ln( z9wr>GjSO$j1CZA%%KWTP8np%3UUDZfSLDgWa50hhWXk3|04GSEEKU>Wi3`QmVwq^p z3&g)ta=Cb|c(ZuBxJBG5n)3zmAC>%!NUa>p_XqKh;=AG=@vq|F#YDDa#7hwyicQ5< zA|5kMxXz+EuMn??(nsME5ze@5t@jB6t z^S)W~?czP+{o=#o&qekR;Qq5;2KkEknz&E=NIW3^TTEoTM!XcUv1r%$i%M=Mn)4Xp z?HYf*3=NpODkpQMGW~7in2NHLH4nr+(qmra&|+y_ZJJq zks{}Mr2j;5idZCa!bSQo6<3HCh!={NiC2l77n1Qf7c{w9G)i*FcS*iid`Nsmv}^i3 zE%^oUC2^PdC-Hr8ulP67uI(4Xg^cA$6xj)d^6_F+Y$tXWyNW%;KH>neP#htS7S9sx z8hA2081WqOTyd5-S6nPE6W5BDh~E|0iyOu3#rkXe z-6Qw=#h-{j6Q2;D5`QiJMtnuIYyQ0@`8|=HlURSBh#npwDJO}UViWNM@g%W>c#7Cv z>@D^e3&i2#8RFUEWO1fAM_ekd5HAof6t57k7OxREiR^8~{kcc{vG`N*De*b+H{$Qa z*G0Sb-yX^PM7svyza*#N9h~`Ph)u=g#WrFGksZJozOOh)riWiAjh*yj3amIXZ67Lj$C_X6KwF0+EenNas+#&u>{Db(W_^$XD@vq`1B44~& zjwCTvY$P@lPZHaTr-<2NPqD8^T?f-0B~B3Snu60L&l1lQ7mMeM-xk>ikLg`4+BF3? zNxo6MRb(eUhJQ$WN_;&}0Fah5n& zED=|V7mD8z*NfMPH;T84_lXaRkBU!H+O$K$IWY8(fP!N>l&1&R5ZJ; zab=^8=+WJ;KQ{E}2E+Xl(9a&D9WavN#~8^F#u$dgid{7Y+fvKjwq8ZJ())kxoe6vu z)!F}N?%X6d$<0mJ6%ntj3KEjAh=9m?l?bwfA}>1#2*?g1C5RiMRUlN6pg~3DRcjG_ zt$Wd`RjU?!)mpc@6)KSkf_gPp|G(dv-?oF{Y8=Bwk)z!7eR-j`5@#fyPd3{UF=H9tNpK{?;ACFE zw~|i5XpChTojhXOZ>!Spc%sU~SO&+8Wq7hGY(^zugn>Ia8J+%ARhk>axP~0Wj5b19 zKOBP54JhmM=c?R0!WjK95aSwR?h94XK6ynP>0rk+tnPzx4zZ`IGTbLHq9L~|vYz7^ znr(S55l-BVSRB=G=f1p*oU(`R4wuE&57>QCtjjSCdUsBwCvp>ci6O~w+t)F^;i8_8 zRb^sq!{b$MpVf)|{>X-0SlxT+*QJ$bkL|L^Tla2m&)t1OJ(5l1*+-|BW|z4I>w0>t zIG!O~Iw>`tA*=jp*xlEIb^UVK-LsuJp5Y?6YnMeZlA#X%*MTK|q+J$9I7BeQp*}3| z>%%I)wHej$x*63_7o!^Lno$k8r46rhj(7Inuw6}{r=*odG0Gu^BRmFJ9>t2uJ7K_ zVEu$fN4X7qH&~O4Bb2+Q)?P0Z-QM6jw=<4K#qv=0F}c^FCfSIUTiVl(gJAo4H?Rek z@2Xe!>COgaxutb5CgQhzXEV2mu=_aZx{z8JkAweV6vUBuU-8%}oLVoy^i+h>o8F@F~r0seEe0}#`q|aF^nP?>K=S(7!F#@PwI-r<|^OaXi z2hd_ltGq6u)1PLlicYh1fQLJ*<8>-wlHm-~2j)i1t8OIx9&-zaH=FFjIVe)vU2tQ> z!^1$@0wjVF4==)vcQEK;#KXNgLw7MUka(`%o-}E9Vn9+yuqPC?XPuI8dbZVGdH|Sb*y(4orzB;~Bw>co@JEJOc@bh&9UP;rTx|=HLg6BiM_! zF~bGuIDj2ScFjnhSKl>`pcUK88BX}BtG`?dcWUD&Ck-B$W1OQ2s`!Hd+BYhvz}_&} z+TB}H1jj62xZhYmvLD)5ZqqReB|^OWOVSaK0*i=v_m|MY?^>x)3SsOpz9m>V7|%f| zwZ-8=D6t7UlG$8B2hUpw%SxVu<6|p)0mqlvWxaZhU&hTPbPPx4Fs=?1XmhGS@Mlrf zINv%9fZ+!Z189Px@ZKp4d%yLDv3=M@j{!Z72&^Mv7rPtVCVnkQj8p^)*kBX`b!1#2-5VwsM&lNs#BVX zJ?hNT;?eY_50lG<6>GX(Rhj{86Sjczh}i0IoB?aYQv2f!!sRyq>dcU$+4wv45_X*S z#QWG$zf~o4@aqyO1nx#I+IM2Qb;8g?NjmU~6gAuwdAWjMv zj|EAGu{lQ@7`LAvi{xKS!|bVpxTXmB$4iar1dV(tKV=ddTpAuy8fN0}8`(DuX5ya) zWaCCI>5i|@9BH*mqhgZX$u^8`mWE-rIKjMaxgLb$ZS1hZCwS=5rbKt_FyEa=`Ykn_ zU=u-^;K9V1K=_SzmOXkQnEcs;2lqrCH%X1fyqIZPBc zAYv1CTo(_QEJfrMCV?RYk0L71nT$|lFl7Q~U zCYd1w?}=2i_eR>J2X2iUN=Biuld)!xa|8g%p9m-)SV{-4M;Or)ZyV7Vl>?MddsLPu>9 z9BNR63@2ho9t4{VW$S0}RPctc+3fX-eAkuO+k_D|A~#+$5LT4%r(wC@48%(8X6OJN zyiaE0@MnJ9Eb~BfbLW2rUTN^c2oXBp#U9};wy+U=Y}rl1wjAx@=#Cv{IH3{`tS<3j z_?m4K{=bhsczsb$Vz&bVcw$GeTcdqG*%cYtH`?z6ch^98G2A@OZG5_UH?{HU=DBYN z5!i+bmI2wD?c2)tB|>d_ET4b1`Qty%G->-|1n8b=WPgkR%fkGu{r{ozwkM3$QBj<~ z!ohrS`4dBpb2Kp)JMK4A)`0$1ooZn7{$x@J+jPuBNlJi&4c`EQ2m{#j z{v~GhKXSs%YP0&hd~bF>Z0WsOaW5|}_ndf(Brucu&=+-+Sfn$A71onZxMz9#E*s{ zJuT>?aoYJW?27-bz37=<|9r1qKL2-J?q#k*367SfeOFl8=hM=@X>02;{Ht?=cU8$` z+S>QO>-5u4AL7Lx+<00??~|onS=IS*Z$Dh4eY^YbwY2{qnKAU6_VwRBm*!#1dfJiC zoj;?%`JpEDK}-0b!o1#GzX#dQ|4@_qgH7qHW3ftqheBZYr+k|H!%%*o0+%^u=_!8;m(V@+Tt%Mv*uON^f zzggP!Ho|S=!0AM5V~&|awDSgp1=H(}^jJ^UH-_D&cPHFTuK+u@&+FnFE#5@z#xU-` z7OmbH_<%awDk+S5PsnY9wn49-6+q_8Z5#Gr`A!Se7gb7?ZwK5c&Md%eQ5a62Xa$gY zaznFHFSYf8-a9F&T95jH=5pRY`iI%n*Ts2y(jn3dcp0ZH4~3s%?IvFL)thZS-{;@S zrk=kS-)>X?JyUveHcxE$eDM$2)H5<|o4bj9MBa<&KSCTOP8Da0yeCj^nfP;Yt$34o zo48f{Hk>(yd=na%?Y;F;sQ%KN%y8LHLzCiLa$txvaE!o)GBK{4MH!J);5zTJei&q)j zjrU!W_iGZjGDGw354pMI<3)3x!M}s#glNt)_z#lI9$2Pl&NpzZ+2+M5N{FxQ#9ux(!WpgZ^Yk<+r^i}H^p~Eb6z6;$C5u6|0c4-$h42xKs-upCLSji zisn2`o-h7PWQP>P*?mLS98+S>cletzCE$b7 zGv__zCna-9C&oADJ@|^`Ka1weHT-u=t`t8Lt*v^P=Na@OVlAuFZG`k|6BZ{X!^hq&gT{Ch46z-vKyYXw&?XGvs0Y@O~ib$NaR;?hW8VPh$FxoB-HEq%h<=;U(S?nSHy*B3;C|-$Z zZO>OqwzlWLkZf(wH%h)uyhFT4{I&QS@wei$;tL{eL0JEH#J`Fkiu=XS#IHqbd!B^{ zF2;|E^~58^xX7s!sn=R;E1oEJ5qpXWvA;M-94k%~&lS%T7l}*6i^R)BYkR&%vb8U@hdSK@1ks%T(Q2`P;4r;6br=mB29D{ z|1`0t4f=n`f1LPzHt5Twcd>Ydc(r(~SSDIq^jjrcTlBjn(`Ja}ds3`vgZ`@g-w

    )$E{CkM~#DU^yalA;YCgx{t%a=-CF4nX$ zr`Z$rZxrtq|4V#Kd{W#YzAU~Y{zcp;ej>VfHf8#0VlA(udx(R?Vd6M( zk~l-0E&fcrQ2e>LTD)GoQM_BUHs!SRV*byIFNv>;e-_^pE5wgPTqfUXvwf$YpU@>y z(&=Q-rB^J zFf44FTo~T>b=LvAH$(>PjvQHVbl0P!d%dVrk(uSLx*-usz=Cw`jlJD{d14UbFo zOkA8;ml(Fk?Obn9c;v7>-pFhBIE#nv2`zqQkJIX@Jx=F8?s1CuR`zMQrShEOEtQj| z?X8?J4eY$DvPr|+DmP8rh5av;8Le)q%;>zS@|NQFDmN{@rSh_oPAg|`vkTMr)%7y= z)pbe}b@qf8_rg99`w-+aWKXEL&K|eb-pWMhot3wBerTVY4a;3`3-a1j*|MPnE8bfw zTO!Z#BX?G|oOW|%%aL0u$4$Gf^0H~Y_GEM(i2WwS+gsTq3*~F|er3~EJ1cL_x}~yd z@r{+YE#6X@7(&JGNiK(s7tSryDD!U`5yd`Z|7Sp zH+B9?WsBmymE#-ks%(KePej~F$fI}h&dL_3^R2}M5uY0&A3 zdh}}eUS;!Eh=VduK%7&j-BQ^cX*Mt3Re1~AXn8}H2W^BlYreSTz=B`>J~1TWz)t$I zWs$^x?{P-H_o2J^A?$lAC!-9#J8!A%h4jWX+*z4X>~=ycqsEuDx~;N#!*|faXgQV| zHDL=~ws=!z23jct{uALh0j21PQcOb0dNlmQjz{;ovGAU7!|)!jRqs8a&b{}z#c4PX z!Z;5~4t#Z2xNKbFD7Ruy~V8T-P~^nKyT!o&@UyHP%z z8`EyUekslswk_Ib@vh4BX@9=EQ(|JGSE3aDsLQki*m2%WyA{XG?Q|Pjj%8-c?AhU- zd=o4)c;)WTmNERC-x;al7-h?yRK6#ro{ z{B|q@8j%Kgq7J_syM#q(YWhW;@O!amjTnx+&4}+ygpu%xl>ZXr>vE>cf$=VTSbRe$ z(p?3GEKG~Oh>iq&viU0Gp3el&p~xN;cQHl2J7=?D-3wO1Nz*TOGdS+g80rqsVdm~q z3Vje3o3+SsODL5Z>0HNMMv1R}IS(+^%UCnMf#u9diQSNU&TUM{gg#1fP%5+)9*=Xj zQCz{e_fh;km5rE=8+s1SD}1q-;_oP4ZZe|yB9)E!DaA3V(9XD{=e$61C6#ZY_$MkG zaVN#esnAw9lX7?<+$-1;mr`88&?_n4LU9q}8u2LnMB*sYxF?rK@Skl|9P6Cj1@ne? z%EBSfcTb6W^vG@*7b!M(jjO$Xlz#LV9DT5ylVaFc*FN6Sg?RW zA~Mk=s)J91(=XMKQK>kCsbDu=HLy1$m<%kpSYosB`^Ey3^a#S7Ma~f7Y2!PZV7b!R zC`}`D`lT9OT`JyX%yuUJZ^RB8#4W(R*kRQ*tDKHkePLcX9R)Zq5i+ryj)A@~rJRn7 zePMbzZJ}wJgn|>TkTGH`DW_vFcK9y=)*9#V4ZtSfmv|Jr(Wb+%$q<&e5<4QI1ZJx) z?+9jRZ2FzEiH0VD3zn4AG0Ma`o7wTM1*21Dx7j#{5?io)&b%e%boki~t&R1|3`04dzBe153JHXcXyYgqN*UUc; zdGf4HcW%H<)weF>%?#=E;pr0h%WwwIiBZ10FV77gC+PHkiS)~G`Z7>$(|;q}_xb*3 zFkNm;H_wmPhi%=-cb`Ereb$3q=DYhbpZk4x@itJ$pbzul;f8*Hl5G$B)+K>s(BEDl z)CshEA5#$gv!@)wPu~bR;^&j-2VUvBPiLE(j(%rVB5)4$4y4Chk=fSbzm8*qX$|$$ zNX!G(R;LDzUGKoLNTsn6X?%zsWh!PG&HOZq*(PiY_zxf-_TBy1CNaMqipl!EyPv&Q zm`$|~E?=;r8iJ!)4f%={rNP{;yvu(tG)%P@(wUN?T1ggG$ z1NA*MP~U^nNFp7SqaV{?S>WzTs=j?l))W2%$Sl>7tnIr8u->EOA1EtNYqM>{|Gn6e zMt`Qg#82-G*0-@AuYaJveFJIqHwob1M(nC@f0nhopGJSCrTU%`sBhmueGf|GVWh*l zkh}xqyq!fdO}NLhj_Ilw>DO`Y5>j;>5GdaOL^WF;{vU@O7NLZHnXgVY0Uhm;1n!wc zckG_C)HT0`;~~JVdT2Uqc-bqGctkLM!7X14#|D$f2x6;o4kUQN86ox{>V!#S zCbuifpMV4Rk4`IH<+xsMS8sOQJ2LJ~je9xqW-Yv9A`g0#^V@nk`84{3Rcu{M89f6N zH0QT1@~w75rbA ze?n2Kf&wNI&2Q7jD~BcP`wnKgj(ZK`{V=s`n>K9G|Hp zF70x=vbeqnYpOMk zTpU{ex^@mKY_)ysLEcb5XHqX3@nZhydFRiX6qu3vU_)5bJm;vk)6W~Hsi;k}P?J+u zn^~$&>!K;x$Y=_pz4H&wB|UTg44kW+thi=PapS@#?SJv~(cfw7%HOc>vvuw6jd!!U z$C~woO<|9Y_yzn|&L3@05;k367U#orM>{`w-TM=8$nax{XE%Rq4fKuJ&~~odqz9Po2xORgL4XhQ<;GW&VELX4)E7lamG61D zQJh(T*(M^r6RiN+`qqLwP;93RdbHcJo7E!&&E<50A!z|T8^GV@%j3hc1=E{?^OSaM zcC+bO*)r(=Q`ot(T-BRxJ>TbFVdu)JnAjfv#ulpHJkw%9nMa{|^Dt}F(Gb}t{H-|1 z&NXmv#`E~W^F{~4m>Tar|BN}K*)>Re$uq@C;&hSMIKwX#d5uzDE#4sBBHk(TTA>~X zY?H>m5PVJY2Vzn*ujL4@hlZlQ>E^)wE>0P2M&g9*D0Yz^KZMYq15g>ybO%8`OR}+l zg*-*_e9_vy{+u$x&6_8=S%8%+NQ5^@vCEhQI9?kKstWHT2n^an^Ds_@a0&0Nz6pCNgU z!k0)kU&;`Eg=8EK)84$w*zUaVl05&(BShQ^jNDv2UgZ6OdOy_8m7l<bbcrPUVKq}Mf|h)p151A6#31L>9{<; zpgE7hsN_0g1Cbx~sMkuYY4>W*XM|gOS9VEK-<;Rr*^>ETjsE;*MotsW`3?De$;(93 z%?E#eDy06k;te7vNTB~6qP2fD-NNvHSpGk?-7DUMO}?fp4*BFrw)U^)dVqf;`8OAj z7flyE!rM!(Y4>`D{0EC?iFS_W$&#muv&H$MxlWM&GRc>T=6ZoY`^?yG>%?;LW|6&T z48KogPa0+R^O4VrFNm**=CcOE-<7;mtQ0>MzYxC?t-Wj(ez=)FKQ@!!W;feP;nseZ zpNFa6Q!EzG5QmF)PUrEGIn4v(%@pT|HSK6GmH$d{jcDy?Z;*VGc)MurX!*UG`8+PZ zAigNRCcY)^6nBdsi`IVjE6H{aXO2Z-`Z2M-*ihsLa)#%NHRo>bDSvA}dxqq};z)6{ zI9Z$~*0h^lD*xr;O7SZ38gadNlX$DhFZe9)gW}`jQ{oHai{fkITjEY}xA?L6sYsIm zrjPI4hP6dI$8%%JO~h7WzSvRhEYhZc>75}C7e|WY#mVAKagMlHTq@SIt6d}iYs4GG zn?yT@^L>&Z6(1L$6|EiZE0XOT&hJXzDSj$`A%^fE7lJ!ojES|yhGJu}=G@IRqhS1Q zqP3STmONM-E{+z*i_^rJqMfsOvE=3ArQ%hhwVS2g2J^pFyi5ExyV<7{ZtZ7Zl>Cag zQ`{|nEPg6ld)W|dKA3OKxtnX+&C+s&dii2Uv9s7yOo(TQgT;~JXmPSQO`Ibx5NVpi z{8oyq#b1cDRbjZDvw4f;d&NgYYcKn}?UDb*YDb0sFk#wp{_Ixy zg&v6>hED$#PAnhmE;~B0(m5jG9Q*ZWUwu7kY^O&qXZehJ*u4~Vo8#Ypc-GutH)qBa zxe@aS7fR!kh-V(}tlivim{vH=Jko_THc*P7iHMBzfNEno_I7x0LBThcgK6FENG&Z4 z8#yx&DiXfSq!k`(5((1^FCD!Cw2@^VHv=fNxH4sr`(?!XWS$z_CD(p;AhV(yi2x^5nkH=X}3!9RG_ za+}BMWP7orV#CsFxr1FZlRl=T&F%(Iv{wC;)fQ?Xf1HSExlln1DHz6J$d7(>MC!QN z*)$QO8CYhHpMvbgvcA<`j0R!>o3H4>_F_4gFLzPcLZld5x!iR^S*v?yp>}?9Eu($w zw2yYht6E-~!y=ds^~Ra@Gjq0?tHAkLbteYGcuwF8Fu~x!1ZR-U`yRgRG6oY2Vfr|d znlu+1bdb3iaz^~Y1e3!QY7tTqBf*G+4~obTm?v3BPAC;Aj4sHsUuv<2dM$=(}e1cRGJAoP%_N>7~9Bnxqu_ zU;Wj)=C?$9Is_*2`KC(X!|IGlGv-bTd@}u?{|?D}q}_Ng>=DcBeo?sl#a{PILf!GZ z-lHQt|H($zR>s0gpn}2jf6Y@a_KQ9M;|AUy?_)E*}SnSk8mx9^&oiMmD zj9W|Wc#8O5y#nae%s2R(XMY(_fS&&d3J12{cHG=8pXktL!)8OaZU(VW>~ZN3Hf#pm!F;d8)5muB zF<<)Ie3!v(MgMAU%8B(B!G~?uMIj3b1pVfQS5h>`4ci zVchwE9n|A`JhS0vH>>vyJm|I?-@R04m%SSeQJYIntRh$KwjqB)~ zXa&&bh3Khsp1~hMZzmnvtR5Mtp0f>&+Z~=f_rL4=Bxa#@dfLQ5n_j@nID`H_#rMhJ zeYm>y{9L`%UBk+#bYSxiYGJky&&=x0^QZn#d3da3VDm7$(J_##&sQFq>diAx;X%3P z_se=t69ltO{PqnyU8>dnbiet#n0o#@^he9o&0jy7e)+OcH1qzBCg8gQzjN`NAn_^P z5K}XmHA#E5y~}I+3p@%2JPgA|B6g%I5nIUL~#(H;J3YUy1jK z=6pb(l`TKKO}T9Se#v?xpF{NLbn2Aq&B5AA-`k(lp~zSN{{9@UYlZDw`g4j8>dz@> z`HXtloesMEkVcE@nj89a%(q@QQUVS3E;ym%%~1%Y-3Wbe9#gXGuzX4(oVLawqZgG^ zT{}EP)m=MxFfOlLFV1_e#|dNnWmeG3b3X*r%fp}fPz39xFxhazml`89JMrdwFQlAO1t^IU|NMhfv%u5xqPu;2+)*;|J6%m!BzX z_VTdark96~IMkxdz-`C$O)n2qblWq1o^?^?=XRjTlgRY)Tmr8ey*w;wuDc#pac_be zdU=Svh5T2BfABio%X7GwXWpbaQ)ix&m_KvEys78Soa;>JJZj>k1*0a8TQI53)QOYY zw9jv!U(}{!`|(rfjhZxJ`qWu-Cym0-UYm0!OlZ^oB;%ZU-pomDCXE|Eb=1_E6Q<9f zIBC?3aTBJ%Hv1<@%<0v+t+4`cYpuZBrmVo*rmVo*ew!6|+sO+}SYkxm@3aDM+Z#1* zd+MZ_lje+@H)&$qUj2vk9Wti(kb!tpoHJw0jagpAT<-+;HbK+dsR{X9`{m@mlqR`h0G-g@V3y4uIQ#>@~%8 zW+6S=p0Tfl&*;3TGyR%Z#SFo40r_d-G&!|?eJs1^tbsggWJY| z(=4D8r$d_!tJ&wXD$r+<4PBdFDcm*=lc1duvQBL_>}vP~%eOI*9$wQ@>D>aijl)D9 zM0&pocv$C+2n(jS1?k!2h9*y?cQ@ROQ-Gb@`FIC<%>1PKGQ+sn?DOf2#Af>{=D*c@ zM*24BPUzXR>1Tek!6&f?%XfdEzICL>^49G0;o8W2|F9eL<%Z}7_4(96;yX=<|Ig}? zf$BN$qj9^#^ZWXInxWBp9wNPfmvP#BC>-wd`A7SF{HMY1==0&t|0nPB>4am(zLh>= zu{c5;Elv{o9!~wa;)UX+;%e~*@iy@;@xMe~TTJIM@eQ#;{6fsa$wfV5;|n&XjO*3( z`G74b${1KPpha7I%~sXm|%kgEHD*qP+jWm^7RSTyeOP8ew7SN8!u$Alu`*Gzih zQ+(-YsHXFS4ElyvAwsGT=oP;Y=pCqqUyWVDw9p5{?#b|uYlfj%JS_e1-DIEDA&J|G^b!hU*av;13kavADIHcAL9gWDJ|HK5;<$O^oc!@WpbzNZe^D*`j+$o?ko_Or zYTEPQdBbeS;y<2KQt!Dn^%%zOa39d&J|Lb4H)0R=u^jFLVypPqkiDiTAMOKUEBM?0 z9=jj>9DeI$1^)LR-28v?KA>;2`x%7hVc*H&J|MIM`hNaD>;r1w{!o2Dh4FZS@%R7R zaa~0Poiq;Y`|W_7d~@xk?11ci|7BY)o|3lW$kOgp>Z~q{G)UB4leM)^Q)ho}*jt;9|Dm7`-lQUHV#g zUsk%aFUt+DUY8h@I6L89G@%=5nhag}NHVXWeKPcL zCR(6&m6!C<j_CoG-kJ-9>LE8*O|fS-0Sk&+{DCBfZMqmtK{2fMu#vm9;;;D)V!u zlU^12G>SZOzgYQ2MpfiXr{aTxjH=jII3iA{;{BqGD(7?7%CvOF&W;fr1stdJjH*yF ztK!4X8CB_DqST+^Xno>cn_12y!Q&UI_@HQLBCX2%Jfotr+w;jrt0LuTYtyR2pSv4S zkE}?0cWr0`Q$4CGqbm1{%f9l;Bki4vzZSR^9~Lrq=9-T7O{;RhOsjG}4X@4Ez;<>j zK7`KBj?i(_*TpK{XS?9MN!yTyGIl2nDj2bhaEF3p)4bL8y(bOI7 z#`Z^BhtgM-9Qf$2vcyWPI#BDnH~$-46}l&fsG-8DyYeTIxa+v}A@*T0$UxAD#7z%5*r^@Wovkj;1_vcYi<&d!(S1(tvD@b-CMS9) z;wzdV9^QJ%VxoV- zTQ@p!*{&n53$K1NIciy3tl@APK8X6yTVb~hw>oz_Bz`Q|Ywmm1|Ilx3=7Vq}{G{pe z+ic2qk-e^74F6KLi#w@vEOkzq%>UuEHuxCo#i`R{k@3lR2|DP_HnWXHGCCosx;MKu zQ{;R$vS{2!=dpbe(HlYM31`#UjA^!+;U{NSv2!Df5R4w~BZ)AEt{SN$6w}y64=YF3 zGL2LDptt*OxYNU&&jo8gJQrhsc!aCO!Q$~&ri!&6_+tu-#}E^08jdt#=yr)%`+-AC zVev?l-%R&s5Zod-F{g(=X)hoZws9VmW9aVEu%{Or^X zUQuT6c4Fv%P-OP*Nffz=VGdV+=uGK)BVqN2E|j>?W%NI&+VfMy&x0$v8vef61VxLk zW;Q02tD!|Xrq~y^-~l2!iE(=|F4yLYK0{?A-a&B*m5s=isQBf{aeGtwMvChgYQ#?| zUX&8M@De_Rb3AV*$6rX44sT6OeNb53REW|k2 z*jo6n$Ie;cqMS<4ozBDiB*LPfGo}%DL3Co&+lc*Wwv5p|hq`GvM7c)Sh)(P#c=AN( zlhP}pUdxo85uMo6@O%zCR}S>kyNG&ypy%gp#0d}`^Pyxr9M`3EFQM)usWgq~nB_!X zLco(Ly`NF<^;DWh{M@8Ty;rgCN$H+P-3B-|etnGS#HhnBm`C!Mn|e>6UU%sEtkyA3C-ykPpTd4M zbn;BOTyy`)Gbfzyc48dw{|fepQl+|yDcy-u`A5izzk%q)K8D_>*mtFLH&gfhl&%p! zGrIho$UAf{FJP1VGt}*j*Czjn8qtZhfKDsyT$|6=dyjhkQ+h^pVnxv5JY-{1dON5$ zHl=4oCq|vl*snYrg~~zr}soi7iJ;S7JY&cPpd$B~$w#m6{Qq7$ke@u+%#2$tYe*ifz zh+mhmNwGsJMPJ5!2wKl!|170>ywN-@rRmE!&!F`x_G57u_S0-*G$*Gtec7pX1d4QO zN~@vKx*(;_H01im~7vJ<0bee7H-&#!+=qrE7l?aNnC zyH)}Iou1M>!)R_rh+kG;c50mlt@$afZbs|LRC>Prs!4AwG|N(&1C3@yDm`CzYVkSg z$&^-iqs5ndzc#*HhYtv`EvU)8*tv3^Uz>hLy9Gl1GWxPpYZcUw#BZRl)yrs|luFZ= z`!UU0oAIw#N;6?Jm!&j)xs;kQ&cpQ-_8BSdVxxU4LjBx*8NUU%cb|#9ETwso(R?74 zt}p-5q)Sb%G0UHDzq~7qcGFrmU0-%;Z9_3WN@-1W{#6u+3v7(s?@Ib4I!;M^hZnl zfQ70!KN%LPTIJGVCMm;0RU{vpO#oZgZoFY=juM7{bD^q%MqvrV$~Rf9g^ zmm7&9gVfdnE=-6*_$3@+v&33d-I=4G^4Uz;PmC`$sf}YaF)s?i^bu*O4Qm8PD-%4B zQ1%;B+4Gitf(ai=D12Qi+_nrFVq=N1V8iK)W;(Dmy;GxdzCmz`Qr`m&NrAu1z6TnT z!pf9KQKNDS{C&iFPz%cG;Lnw>-nmhEE3|oM?5=Yrkuc7)3EnlZGRe|%I=1`%JOI4v zUFWPRz)a&DO7OZx4ol1F@EdO^8*UqRq>Y-IEl|64CCq!U$z}Dj5;}$&Vb0QWI+!hr zxvV4|m7u^wgjQKr!cufK=?)=yD}w*J5*BHW@gGj`cH%h;mX_1u7iqXHl1V36sHY*g zSZWJkqr*uoL+j!=^Wm%*J1WA)<8N~#XLWKZO13uCy;=7bt5=oyj>f07nCmntr^dU! z7RulGTeQ+qsV3Nw1Hl(zkni>`Sb+si%aO>1Bi(lxQLQVd4|k0`3$bUWCvHD7K80+ zVWI|$!m9zEUoNGiHuh{Z;Q|Mz#2lRZ`S6&A9k*AW-z)%}L^r=2UoNHN2IGGwi{zgw z0|WVexipv`PehX+&o)*+*IavxnIlS(-lUwK?_$qETL-+^(ZzQ#3ZE?Dd^2 z#9e+t2o=PhI3~|vL6Q(~<`H~x#@&F;e!od;IGgvs{EWV%dtp#TkAENmx|+%4&O?UKAYfvlhRPaZ;e5=HIVB!QyR%*W5xkHgY0?dIwRNs?Egce#J$Ej zl7;q*m-=DGZ*(xxHKxv^SZ7uiEw#3U4!#i7Gd~6PR=SV}e=$xs1~Fk&g?QIEhZ25P zqpDkCR4^<5?q;eVH*rR?Y5h76t*-Myabl);gPA33cyNi#dAATHV$f;WajLOIFZ#~v zVhpy$Xb4Ad?6`ah-mCB+L8sYx`R_zzw8EwmIu2mR58|eh^uk8v6u!cavxZ=0jUpYj zvDD1;$B4X z42S=g5;|CS2p5;o;kWBB-gEq0;Amngc2u6=EePwY`Q>66uy`85BZ0H1`hX0rStjK1 zKmuW?glWe_D9jGz3*y$2_0b^MXR)crOYRULZJ>B7)soQ3A@kEfG# z|A&M(t&LV_Qf}jZui`iJ9c<&`O#5c&S=FJ3xNwJ6hYkzI4cy}V%AHxQc+l<14?Vj& z^q^-4-fIGn6TF~#f}pL}rXF+yHz8XBdW|$Uqg0^+PZ(C~JD*6bQs9Pfy?(^chfRXN zczO`DUV&d;>lL_X2fg&GXuZDm*OSo$hcxgTW1|M1wX7HKzG~u&Q%%g9dmQZ^xXlKB z{en^T%VoU+zY5mNW`G-s^{R23_wNKFgP|%>^);1_(l8q8M<~4d_nzTROt^U@_LEGV zS}X$}t$&J#?_eWi$fvtE9+U5l>*_s;l}JZ+ z_2$OC*WkLfq-$F*7i**XQHXtcnh#tEHcP5*(yly^apTb|-}}STGf~u# zhpDc({wM~in3YFoa=lF~n>ml`joJxys)yM8t7qH&zdM!k4_RZ@Uj-HSC=49(M{HG( zVB<(Pe@Ibk@SB;BXZ-YYxg_g12frO+a^*2&dJI0b&@pS#VxX44m}_8|mWE>aKK>A^ z;CwdKg-I2GrLt!YXyT-XJdGJMxX%!*l6&5SbBAEXSjUvN=8!QC{pU)tSP=GyOsP!u z)VMFL9{VH5v-!UXKh@f^{>9}l@;h^0(f_h_XZhgqee2Gya=kM`T6p$fF&Fe9=LF($ z{x_cv=qNns;YkC1UjEizw6M>#$HIep_L;J#9>ch`#12D+@741^;~kvub2#pHv(938 z*tAU;Y=ZjHHcXohOF)K^Kx%8&&T-zxm-G7YK@{^?&vNnY&c=b$p-n(E;9;FpYUrJb zui}3+U&a}$I*o~N2lEYggGX&YU*^YpkPETfwBdBxHg%jh9olTzT*wEdhu0bu(bNOg zNu{?EZW{+qX8_U*df2c_;T=q`F4E)NM{JiUc3Zv;2S;}XH1od)!rN>%y>*a+=}p8d z6zj+I_(j{Mw;686DZtL{vEyJzVNV{&4C8)}X!Y`OV$6o0-K^d=c+hRPjnM071(5l2 zdl-ALeA7`r+kQAKsq#G!H;OY0Fx!Vn??fwrHZLCXK(U>sZGPCgv)c+$cO=pP@ol~= z2g?>rZ!d1XP)%(%-;{?OLI0m(jvtn*db6$P`}{ktJImjSL#{jP|6m?^Iv?J*vGJbw zW7eJR#P~3i>m%}BMR|nCJ}$~r#hKy-;&SnF@mi7BBIDgAZWSL9pA~nAuZn*bcZwC_ zXJT!fL`?Tsk>@An?qYwDALuyViq@?ptynp?&rESHiFh>CrvGxuS4yTyHp9(~ya?YY znO3RPH|uXA`~k_o6JHizBN6_-UaBpC`StQC|S8_uV=`|KxD!fSSCV!fVQ15j44;RPFf3kR<{1=Ot z%73L;D*qeA+vU%GNT&a5`9DUYyiZAfQQ@zMf0q9TB=jmJf1&WN#0;d#`qm<$S6^}y z5_=1=t^7NS3HjS~Du>8_v^Y)Sc3sMa^1n!2rSP@l_42=sL^eqQQyjP%CH->egf^v;vKMB&TC z%jI86LT{bqO$y&E-Yx%!N$5Q$`2~f)D84TLoh0-sBqtUArI>~XP;=Z#=+%?lghacw zmfTU{T_m4IqJI6vVe%hKA|12NBhDwYz9ZxX(pxNEB>k(TZ`O5${zipw5`QT@t{uX3 zACdg5!e0>oDF1g!=|Enc$Q1~s9w3mb{lldI!Y6DLjI>%s+=j{Tq_lkCEJpM0i`toh9S3 z&!mT+1;ePw_YmfDgxE-IE*>xPy@YyvSSAxi^@h;Ik|04VW$>up2@>7zZ70vT7{9l&*miVstfw)KfN~B>h^XGC4WR6H<3Cc%^ zaj}`$T5KzJ6MKq%Me|&ZbU4zH>5UVoh|@*$JdN-RCDWpk`sTSBA$E?IhC}gXx;*Y_N~y zzT!Y}sA$)%H_zM9=b$CV=Lc7k!#_#$ybZ39e5Lpck;8VWcawOl$aSUY|7&rZNCOV~ z|6crqNOKALzahRS?h?)OH^TW5n0i&>*J7TYN9&45iN}a7#8zUVXr9NBURTN8Mf2PZ z|H+b9h*yfG;oO1wvWP<&K;QhY|- zF1{qbE}G|Xq_%LX+Xm#SY?0VqdYpI8rpv<8V)s z%+Z-lXMwm_yimMEthqkCc|J$jjSA-wX{K|p_=xzJ__X+(Xr9yI{-fl##COFC@gp%Q zekrE$`4#R=vF3C8QSv`VY$3K1Ifk3@PZ3WO`-%S{juWSd)5W=>d5%Xq%Oqbca%?Bl zzgoOTTrYCaIKzJ>+UNL(CGQYl7XK=KDDD?O6Kk#qpQ-2D9I>u=gm{eDROG02mZy_= zir7mm7VWz5!z7<2juj`0=ZfZeAL-h4;TOyQBJncuDshc?qiENOzf-bZC;r!x9}*uI zpAx@sz4-T}w@c)>eAfR9(XJD3-Vfle(^b>q8B?k%1! z4iJZnBgMaWz4+ydcd5vk1X$kd#6!MUApCBHKPPS%&HDtxUzcp&DJhu9mK9; zcd@V7UmPl)DVp~Z#GfR&=KIO{^8cB5vA9CKS}YZ7zOURS|2xF3;(a2=r?ULdh%bt- zh@5kR;T7V?;-?~~onUyTSX-*3u~6i66x8o6o-Pg$ zIX?x%$BUc-g7SQkQ$0{#DRN2&%GZmWOo8$ik+UgK{;kLf6e#~yh?HGtu@#3RH;BIgQVcw3P(0#NQLaz+5k!$i&j zKzWJCIRGeMEpp^P<@-dA@u&QZ$T9wu-w-*npYlf{KeSQ~iyXsGxq--0`;=RW9G_45 zWRc(EDGwA!h-Zt-#EV6a(x?8lBFE)ZzFp+#d&-Z9Pl!*89F5QL*TtmxrP#EVAKp^T z7mGxW#Ap0IVn1=9$dUOBpCEE9KIH`>N8VGuTwEot6>k=A6YmnYiVuj7h);-5i+HSb z*f)&on0x?3yq*~1XWtN)zhTY(pt$^-i3K8UKUnTgVps7rv7b0l94d|#CyGEa@B ziMUL>SX?F6>^CysOHrQ93cpj_BHk-*6Q2;D7M~Me72gow7T*{5iU-8a>L;m78P|Yq zzqaiPJDwP?-o9`B)=uqy`1-ANYa=t5w6r%k4tdsd+I+Bgz}05n#vIJsn7;b#NX8m> zZR8i;s%Yt1+rtIn_SvfpHCEU$7eUtZ-jbt_H{xfQ+K%(4Ny`=*`H`?%gt>+##)Odj`k_VtYuqm$t-ZKw1} zhL5_e%DdyDs_^BZ3jCT?^o?9p6@m==&2Hg}9`5)=M#bsj?unf{($?3(ERmRh?m5gq zcV${>XnoksKNmt-?%xqDOE~k4wa>`!MXz{XleR|pPiH1|$vO&pkcB3h+ z#xAQ0pMz5NX>@d`;#4oP-l^!5KCp4!?L(8{);UvpB*W)kf;xB=r)IdFmREUA(<*wU zcS(G-Bctq?vAJgUxMLE@UCR<{6Zc_`xJ%eiW7;w7UJkna0DGkIIQSpth~tPGtZi~J z4|yn!vy6GK({0x_;cRan&H+pe$00YE7>={sczdYRV}|j`xQ;qI=yMi_8DWmNv!D}- zWTXMrbHwrUHYRMuKYzs&GiRJx@x)^fme*!HBBMC?*J&Qp31^rdH#agH!I&eCV|Ot} z+#(_p&Vp*%Qn)cM+^tYgYXq(EM)zU3Q**?<;?EJ+61rFsrHrX!j<^Vj6;Vw8DCUT} zgAre=o+GX+<=2CA#C1kC{<_bknKzDe#C72WatZikH$et&S0;E4#Yf@5EQk324#jhz z=61Uq&J*C}&#Bg(p{G-1_HGY~=VCW=#Py_fg^@5vTrWx-R2}^-9B%L3NN5qo*(s4- za?u4$$b?=>aY8DTADpAlQtZRHjlvMk0AeE!q&O`V%AqPzHkg}WiGNAa48lE?B5m2C z>>zcGcp`33IVj?3OqcyGX!?r~YMTAue}a`CFgeO`XgJJ)^0q?<4=+}7X-0Om0ce!e zh9@8gBXtOde{*t_7DizZ!CN85Xx(2z2hHy=(06l5I_C4B@TecUx#UGSc!xKtbhJRi zP`$q-y=l0dC80e`%7cPmG$aP?)Yb|v48bFm^TQ_XCWwHvA1%sk~>o+p}k!b6F!ts_@-1iueR|fd>AnqJF>sCWDXqseZ|;e zVk35p9bQsS$0qFXe;e3ooP!8{C4nyyMIkYwm}rdMb7n6or-QYHzimS}p=>s0$Im|) zl1yyG?m0_?*^Pc1eg}*{hG)}}Zc-ac__@pr<}$Q8m!VKL8;|oS?8ulE-C&%9Hv)c@ zMiICAzQl{hIqGfT3*#J2u!bQ_$3QY;92tU#69YF1e)xee;a7P?bzz3s6DBbHlr8T! z_TUw8erI8lP+-F%eSUZP5xMfz;F-ypIuhVS?5;C(5#X0##7;Qjg};H3R9^gwXEy4u z$BsA~0l%?^vQ_d-oZ*D|HiqM0efWo0x5e=4wn!Z#mSin<>OL8XRXE3lj4xby% zHW~l@_8WL5oIf}Ym2obx5`N-?suNG0nnxg%&4hEC&;{5XPP5VPF6_8!wv^EEFm~J> zwwNgdC_I53M~h%CMv)Gl8fFTC!iK5aij{3Sj52i1#%j*Nj>L#-jB_}#5j&>gam(5I z2!}AIq@0fW*wK`Pf04{`Q<=fv=7S^|lN%4fQ0zEAc`5phIfPePLzC8Ec$%#d{)db! z?0eupTPL^$RmYHZ+-T(7E|+pW2Ge%#B(aK5-#EAE{aZ_>P33orL+j$F$% zqXu*HkM=Om3q#e;ix*;C7e}mR<$F08))w#W#p2Tnn-;Y#XxpKccP@sx#gFH(FQ{Oo zVT<@#-sX~G?_EsL62m?U&xd=l(1I3Z7Xk1 z+-n@~;0^EU-BFT%46Hj{7sGWrw#PuD;OH+ie&_I*ucCOH0obul{mJLdoPW|u@ivnu z&!0JA-qiDEwwXK0a4!6~u2E2)F=_5x4614~ebUTx=1n=dz&Uu#ml^UM%1W;tuItuw8+b>!N4gE&qrAo;JS^qUJ%7f$apS>xb9_#*E)Lx~Xnn6k zkLAL_Jv^4n95(w~-x3nL0Pv1$Ha-#sH>=0vM0dIZsn^K{!fhWTis24;JJTW1X5MZ# zj87`~ljY-^w@q&|+)S?kJGWeX zXQ8c<-5AEb=2))osKjimBpvE)lN&JGz0m7t1(5l2<3o0^e5>Ns^{tICTfXPvMsa2V z{#NUUjpaHKdT-h|Aj`&$3^bSXQoSEGmMe_&w9usB|Fh`@yo@vGe|RicUFT@D3fqLg z6^9m=N`oBfAk;S1kwz4>MhV0g*&1`cL7YpxM)N3bp7Ecj*J~Die zI9i+_@?>N9d~vyWxp=L}Yms`liCe|PW4X{SxVYKb&Gy05zLEdcW4YKr%yMw!H!a>% zNSq>uxHTEFw}AfUSjpFShdny?3A@MijbK-XK9q}*XhvHuGbMbE?`w5tCme@c%N@V8`!`bmbo+x$^ z*@I920pf6Rq{uFPhMy-c5EqN= zW(*?uhWy_acZn6^0nwbl(6=_z9?vJp{0u?X7mpT?6V|$1?s+vWp*f=KoXMQlF}HPZtM^!$mXJ5&4djJVi8P9^pS% z@zt;i1>0EG+DBQjsx*`2IC1 zCpI+2_=asmctxKn%clHdOL(7i+A)d9zOOsgDa~BvC4Li0t2oW6h4m(5t8>?+CvsNZ znW%lOv-go@@x-P`WbOM-)85%wwbJvlO54HuAY@jmbW3T8kXG9I=;&InG<>bQKD2Id zGSam>_QA<881Cw=kH9ayVQ?~ZXPrddgmWC$zFZb*m$@OM)Hyc1FA~YvkY0LGVnAYG zA}5iZ$Vyz9xC$!-UY?KmUxKw@EHXX2&Aa;$InX7Yq(;Y4&@xOdjN zDR;k`#Hfs)E|__w4mdHrFyN+uCDypB`K} zu-9(4SK4*3kmwpJV@tUB@0PmzB3@c)dYM-`VD}qc!)5(;pV9B@Y_6Yq%okUFdFt-O zscsjptk`dN#;HA$ktJcQ6?o3CYQrYvx6z!k3B7YlWB4B{&Bg!R(!8<_z3Xt@z^r!L zbIP7ihPT~}wE}Cw71_8mF#;tJE*Uz-Y1%L`Ix#=d zH!%!$9>bI2)3;SUQRJTV*^bw<-BVbb*uGGV^=X9|@9lUKDZhy{qZP%`T4iT7&MW(Q zq+z1|c5h!KbX+2eIt@ui`oY$u-w>>I$n_50P6+ct2;a9OZ+!*UIo!~@7S48nnG-N*snE6k}HcKN&R z@}cGec<>=DxWR6uDP-7x>j>-2 zS_RBHU7iKQ9`w%`^=glgl&x`PYyC~%zH(>(ZRLtH9#YpJc z^gn~qh3%m9`*cQ*F6`Le2|Z_&oSf;?=QyF~(>Xl_7L>xjFX77F4~L6Spd7vBa%i9b z@I<;F;*6*TLziMY_~>7|5DM<;tSX=MYagIiKZ-9=dqSPxI-xMNwMyt0>>T7Z^!G51WhA-WTYZV z`N+NQqIQzbqBOzAyBJa(n6%kATO8Nb}pm z3lM$_8{fqL6XVlb%1^_H&XEJ*$&qXUonva~95o9%jZ7N3=2|U+!qKK6zKp9S{4vsK zypS!9Rg{{?>STMdqhiC-Yq^76GhnNklbziSp12O{2NqWf%O5GG$=|HAlpb9EDdXVf zpCWdRD69izmT5|B8SPsqp3P;MveF#0rjtn|y8*(pvpZ*ZNn;qkIaG()#h;8~%ys+L zp-S$tPTx8lAf1=*o)Y!ffNB}#vQXXAuk9J73Z}~lt{R0WKD$&@2xng%Een<1w+_X+ z5dR;0ZvtOcarTd&bI-}m4O~JJ!X6;3Ey`NG|NDK;GxweZ5M0Xp_V;H#nfra7 zXP$Xx&YU@O&Y3(j$M=b;#;xr9Mzl7r{>4&VJSXOhVpH$qQ}7P$0SWvI&3C3+Bn)B+ zf%lcEER~_|ETmO}#W^^Jlaj#utPe* zD`!zv6d5Ee!!NDkV<&`1g&eyV01^Ji5_l${VCoEat14ES{R8w8(>Z(}Oj&{a4~mWP zglB{-d=tP&5cOd4%#KfFkM|ee8)Aq7t8xi36`4Sn@vypyfpL&Z@To5Ksh0D0>Zu;l zdI7YOX*|$XY`xDB(MAL|B*c}b9YITbde#a}iw3MkRcunP6&5X#+Te$Cfo#fp*6kQY zy+Hm&#Go~PojY-zOH*?ZgBF-e*14u*`17!w!=h8X&MjK!nr8CrsQF`-$;Js5rPv2E=9}4nN9=j^<1zL4mi6U)X3!eB&K>R5j}MK8|ElB9L%zObz*9Hazx%sUX#1qmz=pY0$VM8wzMs-q+_P%z}?9AG%*so)bO+$XD}B(h-{ zax(iA1PDH> z1ud^9`sH6`iuq!Qbw?SKpEfy8m>%etf0bS4Q@gc>B$Iy$n!HL{KYr_33HDkM@ijt1 z;@(zlL|Gtkeh}if8tD)s!VfRO-iW+x&P6oA$Ob?*)F+<>n!`{jVmTs*16IxiBV%Qk zBd$PXO-=ZMG%Cc76GSxkW|K~2hc!W_hb@^*w`)=xz*Eeo1w{MndD~cn`{s_WC@HVV zy>vD_qvp+?mRm4?+QNAyrIi)AQ>Rpv%$;3YQjt4q*yu^$%ENE??5X8b%27n_;0ue- zFU~!`blTj7)3M!j--**p7EPQ!Wl>4j+0#q9_Q>gx)2(aI9#dymPAr)=cXnAt$wbV# zb)7kFTGt+Zge;w3TGEvsG81QeMkdaiGHn*B`JEU$Sq)NvBhEdqq_m_Q+qzHpT4ho} zaUoue%I8g*F}r+{w}U56>9lzjvnwW{1#)Jwj~ww;1iU!G3l5%ENJn>O{&`a>XMy9J ztHsqd7>fR2**)R;*tRu180m5-zwMls*n>aYS(<~SHrN!O`|D?AhgQyX8V>WEB=b9C z>-nY77u^dc}mB>wi9u)*g|f4P&}W9A2X zESKu0-1&9v{V?6KvLQ3UluJJtzr6uys5HoEj}uhJ-U`qr4@m1i*xN!vgGpNk-fyoE z_Vz+Xd%X6Hz4f3?9+1`r8Q{%H^rfu^?YEcL)jLkwOGPyHwt%L+JVb`!a6r4Ljy!8H2&VNs$;sIF zp67z+#S7#T!I1@_ex7F`5gaQMtNp#U=RKm9ucY_1TzkKJj?)MnYrc(dWN+qgfN?-^ zm?B>=Dd$)~oUK@@$bX4azFhHo#kGo@I%N6-iVrCo-^izx|C8e16yH_+L{WUyV8=yg zp}qQwoO&TIzG}es%I7K;C>ASDRpg5+^Ifg@s3KodDd!6XeI-&98xV2vwNdOqgkFyF zvN|99Im(M~7kJJhGoSc$fuErKWFq)E%FkE+GUYj)%X~L0imw*zS+-mwenHb7oREUZ&UseP3K1sna}u2J+J(0s`r-SzZ5^x^q8XA zpE8W$fOc9EQBDU%*_RT0T^}gfA0GcwI_m!Lkjs9QXun0Y16)Cb{D;clr1r(P3F&uf zy6jU4{#TkV`%{8{M$`XD1pl(8n|7UX@7$HVc4h+B-HO#XoHsQej<`HCDg zs2@?3>mB?^HNTyc@&Rf<1QT&>7^F70nt+@g55;(dy|r%{jhK;q+yzf;_! z_>$t^72i;NPw`)hUnmB69mC%7_WR{O%_5qgh2kEO+zDAM%5NEzS74K2}nc~kCpHzHW@kPa#6=ic0*g2$pOp$Za zv|o3eOXD~Jd8T4ZMH%-XKVA7QiZbp&-b;CUC@}vp#bU*=ik!n{`c%bB6=nQ`e2MbM z@@b{d1M_cI{ITNQiVrHvI0?O9DgT(_lZt%Srk!1idlY3Hg?z8_^s1oVhl(xs%2lZDen(=kL z@|zX6DBi7jpJH7f)yGx-JH@)=?~5vbS#h7@0mZsLsi_>#P`?bt){17I;G>Se(2uAd zy;GQfs$#jKjK7e}_zPUA^0kULE8d|f<1qAO+yy?N@)s0eRD50WEyWKMKT)JVj2w?* zJ4NF&+D-YMih~r5kwcdE+GKELynuT)&3NDmv9cb(!o#ak3_SG+^@~T&pPG@qoSCl)qE)9>r~nzfhzb6U%=_ zk={(?Usv3xctDX(PE0r7^PnRW`NoR$XCmKK@hrtYiga^g`h|*gWg@+;%vmOaQ#BJ(q9|W`{A$sT%$-@#5%(|_}cPt_u#q~k>pKQ z2dm=`Bb_3-ku8y*M#9}kMkYs!W8wYq5JryhbI)VHJLJyVS(7^RnHuYw=W0@iz)~2V z!~3793D5j(O}!!X%YMEle2sG`>_C4ebcX~Eg#$0|b~e@D$UX5I6bV z%Z%Oeu%li}yYKI6>cOHj^YzGYYn&n1MGox_Z1_jR5&K@MNZLGj-}z2BFR;1*M`dqt zVLNG^yD6OaLBm1&&I`bA+qPHRX9qVp&#QxW#RhCmjl$o0^&N-Y(Cv}2sM*k%+kaGKLS$;h z%C_3#STBVi`ULyz-`51~Pj~;W;oyA(o!=a?Q^SYc@cGbxbGIE$-<15`Rmo}awZ1-- zy(_%w^oVmPEs%UD4W8C%@UTvUr*#+@1|I2ood(bAw7|Q&!y7x>EegVGQA_wJ zo11<6WTH#e(iqvf%`h-3^wb-ef!QK5rL%sMjBx|6->8WIrc+JyQp414;jMZ{NN_ zOr;k|n3b>xljVy-xHs7XvOPdGpvUqBtQJ?OHK1>^a4!i5k7ePyqS+eIM|n6kxn@hY z|GSV@s)d6W^hM@{J9rt>Eyb~9>bs2c+9HDYW>>&tl@WQzNegi=|}pWaxwu< zQH14)@Vpv8ybjUxL+zavC3ACJfDQl1EJgdn)#$qF`$5R^PGluMj|kr+0%!8zn^YB* zDLs@AIjg!-s*1cMSTEE7CgWiaDELznmLsB41-?=WSV~B8U7Rpb1jTqb7ZhBo2xAa= z*u_y&TG8RePY~hQNjQuM|5Q6_8q)89mVtcB5!GjuHQ6ay#}d4XObnwwSyHF51kO#u zF|0C5f-mY|mPASLY7{?L5}cw$Jqg1-d0Dgw1gn9zGDla(Ta^{!^8=bcu@fPWZaE@- zUAuKy3}08)jCIl6G`0#cp+JtUUr(}dhsJiCE0%B|l;f(O6kRuNQ&Xi*xNhlC< z{7}F!Atw@sds1_vVF9@$+>2k&=tROti0GV%YP66>X$?NU1kch)0$Ux@gi$^XN_Z8& zoxIfEi9DJp>p)m*oM-~eVub+hguH|vkX|`)uPq+C=loVg@MI`rmFblMCsw$!ev|y1^9x#|#P9U0^7B&ZjR|;12Dc;nQH?-Y7Ggz#)X)5pXV|_^y)R5CS=Y?(^!q zN^+v46cc73qB_-45^O^ZM5ZaF>_p34f+|U1HK!t?ISI>!EGAqn2M5np5~~qmjldHP zYa6P4rZ@P;{rE+f1tX{gf-ArL;o#&Cets>|0@ga14}444#8bY3$My~UmfIliwCr5C z+BtCjtH^HMHWxmB{rk3S-LAD$mhGg;-iY=3wQcWQlI^s~Zts-$gFhc2$C*0}n;eGv z&veqpF>~V_=hAGaVNPz>9-+q2!S06nJ<0^-otZh#8RPP=zTg6S3*J9|sPlrA*l_9Q@zImd!Q*FZE5c?)2{65t&@HQ@_@9sx5!^e zXfSD$!5f-M=c1w?nacXo_(tO|_jEiGaZaD*%7l~Rd|w`rRyX)4WRuWf%A&u3-(Is0 z3178(NMpOu?g~Vc2c%U5dub#zn6zc!{q|1x+2gfm?5ziF^3cRo*t_{C?YtUketW%P zkM-g4a;C%B+X9;Q@(>wfm=Fq?P63{2jPz&l>v4ho0?14-dfOo&Z9*mVh8qURav2^* z^w)0y>c@6r{rFyC>i2uls7@I`!cN#b5nsPgq4#H#325p>^fi}t9p+63K-d&=WRY@N z57y1s4Ayh#r)?oK!PqmrLBIUp;p@k?xh{SHrZv6N|C42ISM00UUy=QhcKCuwitiutKcoC^#g`Pt#|PuVg(WU;)?_M3gxfUbn(SO`X=SKX!^a%i!Tn+f2I6yH2rDi#TN&5-&FnsMP6X6 z2j8uUe48f9Qa9M^tb863d|&1JD=**HhWt48?rKvlJtW!xW|eAm3=^`ELc<<-LJeuDD2%V?5<6 z6mL{qr?^G&PQ?clw<-QgQTi9`JgNNCiqg*@|FiP1D(+Q$SMhzt&lNd1vR=uG;(H3d zk@Dhu3cii<;)4oa`Xw+&<^0D9?F>}pTn+i*ikw#>KVEUF;ta)kirfi?dP^0TDc+#C zR`E8)A1U6W$Y~MgH$G&)R9^Zo?G-tdM4rz(#E9ZB#nFlvE6!9jK4j9rk?-HN|Kaboy#H3@|F2ljR~6q- zH2WSNQ2ql&{>zH`val8C;s#2d&l5!1b_v)>`4)<;75N`B>TzFYVsAzB4SD|0jPenR zV-&|Lif=B`jSrdG=deuE`Cm5Xze@31#TyiFQoL1hi{hP%=9}~4y9+zpRlY;G(Kk!D*uoo|5Hi(&nx~-(fFJlP~P~Q@n4zLH$G>rm2an* zqiB52_`go-U!*u%@nXfviqjS6DwZi8Z$HADRPR>BI~4CyG(KlPSKj!X{YLqx6rWWz zK4&i~|98bV6#4&I9?vI=|D$N*eTMRSim8gt6B@mj^>`I?z;&i`EX%{S+FD*u$?vx<8ZUsC*s;y)Dua6w4i z-@!_|p_>WH^9|ZDlRO>*%>6$;$J9$)k&eF~WL}@%c_-+L)P;rM)t2wg@GeG~-nTB3 zBDZXvJ1cW_r--$x!TS4WrK~?KQqX#Hr184+_3a})B3T8K_HA}h1PAdcDAUuI@ZiSJG`!Yt0e3S>2`OqAEdLc0#yCg$?Jk^-Hl0` zGvHa|B4)%Kpwo{&N9nNu=s>^pm<_a%h8-2xHH(BcL8~ew7T7tAT-S{(S ze_(CXnw0J%4zKvk+L##&?8uDS_cyHxSxsxgGa7#usA^V|nx0jYYGu@<&S+hea&F_# z?0#9Wkx`QjnUijB9C7%EF<6~}Tn9!RzV>swZ*vTf&1#$(Nr&7d_mJy0stLbguiXKU z9A`6jmfSfh@?s>jdA*IVZwuV!z89#M^_krn<^B+L{%qbusC7*SK7u}K$cV$MK5JYP zKw0%?{Le#>b)R(jhEFFQUiHO4cPDRtCEfWj*JN-`k67&*eP-X6{+V5W!jKj6>l~wZ;yXfmUw!Ga`+!e`El$QOp54zyL4+w1M_;yN`3og@=<152pqj??a87p`Pii zp&i=QVB_G{=>-`vyS@{%8(ur;v)xT)kIB%jsP)eJk<>^iG6;T6>v-Rie(u`00&Q+s z&4=m9B24^nFtY+Jc}+NWForxRW<8Z+UH3z-l|x}VPzzu`~kNg_%9lsavw(|-Xa zZjwBc&<`Lm@G6lc{}eh-DCtI84JGrLO5K|rH(8#*en5pxdB|TvrR+g8$cG-M?I@Cb zZ*scKAo((-U6**4`9C{Ul&<(r$ZbV%-7BRycR#qKT>Q9e?7N_zbUEa%?j*?vS9m}@ z1$i*+M&PN2hwVqGJT$(0B;Qxu^CgL1PcJZan6mVG;zN4UKuRxgJAh8H>5^~LUkJM? zLC#?R5Hfl_^(7I3q&^?Q?6X-SUu)~9L(}d@mQVTh>Fr~m^8!)^fDN+}b^%l8kYy$8 zA!PY#7M@EsBB`Ln>*+jJYnyQJdJ^tS;o$Wo-1#WJ0rzPXj$ZrX12vTS9w%3}1UpgE zCRZ#qD1#5wFmh|bg}Jq;eL*v@|03Hw&Yp)36y{^2mrAE`zT7Fx`)`=dYY*p<@wQ2q zDA}v>3^3s)OcVBYvUi{WkL`~c!PL!QDdH(@xSXo5^US5yi<5S-%t2VJUsyC=rN+I; z9TqKN9|LQpbNuH6tf%)k>e1KO(-Za$(aS@^^tj$$>U|Q|6E=nOcNs(R(@4rpmJXE# zX(K7r<8!Hn{;~$PGN<4$j^W4U-{;Ut?0@)ew>LfuWLCum`B_mi58))@zx>Do(;Vu+?5HMj zIwBlW2;)RvSsf)Y*^{&8&j>k^;2i|)z-ByfZj7!K0I!ypm{M>M16YV>jB_0E&<+$_ z5C~qTi3B}z4xth<@SBN<8WMU6Ifme68f{9#@jNWYQ;6c=Dnb~Ah_6OgM@e{97&9GY zxyYeUVyQ3{S42sy@R(&$64!c6b(F*gL{yh>hbOO!-UH$hVPK2Iqljn-0&h9;kxCLz zcyiQQ0x#zlh&U*McO+xY;p0dWPGh~}>7#r{x?PTxM}%&`@AleJb6n_5rdlA8Tf)uw z-H3=IApDn*g#^xqpOLYxrLYW2zg%%;G!eaH0XHS z@QCh5#JMFrj40iJ1gq=$Y~reTR?Q+zDDRbs4gC4kez=)b$-b_-9$z#hpp=GAzv zF(;Di9n=RGhUp0)*%8=)=zxUVg)BarEndn)C4V8|MI0=B)<8;NZ+H+9HVIE7;$quU zO@fxeTwP6~P>Lub@Pvt+1bYdXd#X*dVn5j80G4Wg`*cg2h`TI_HX`+O5ep&Gn`a33&Q5wN@rk}#X!t5cLDwR{>`P=y4+ zm0$kwSWMW7GFWe37Oa^Gei>_P0%_Kbv(c=d2}5C%#hbgMkrVyp-3y(7wH7%~`R>i1 zG`tfSW5R9uk>PpSP9yB* zH_Vxo1EQsauLw8F#!h~r#WS6ZarlJs1y0(qBImN~+(AxCD4X9iUJOsX9Pz`0^W4&G ze2BQ~Y4~v_=Hxrg@M+?lTx{S6*FF&R>ANt;IWxO!E;WYbI6bm+XA=7ibLx$AQpR=e z*0o(%XHgEmZ`?WWoDt6a95@zsJjeNb+0)MdSUGuJ^71<8cg=IYSeE15h@Jo7)HlOf zY<&8%>-hB1ov=B#0Gv6@Ic-??Me5VHXsELXK79wS=+_DLZsUC%SvLI>AFkfm63_pM zWZAV(Qcis=dGVC;8C}1tk0l$&Htei}CifiuAY=P~Eq}jn>fFam$8(pf<#ngq*@@TR zF|d{TK(H>Ju1pQXRc*m>(NS0~(Cp1n~ZHCuZY$5CWDj!(QA)`HBd!~N$ z3-Q}q3wwNYH^HRQkHl~9IoRWI(jI4YjXl1+F;5;M!vHwEwXbvDn0_y!UvC-=ak||E zrZN6f(a85eZ@6KAESKTui2nNRLH%$jQa?@-nfg5m8r3NSNXTw_V!nQ3p|{6m0>zs|OPy}a@5>+I==ZX^DE$SQcQ;$X!>Me)aK;4P-2 zKj2K2S1MknxKiaOaj)XriU$-wRun%g)Wb&Ous#hGn=9rh zivJYShbuo-alYarA_mT-isBcA&byjCQ1;Y9e(ncA{!SwJ2bC9pDDaOd|AeOVt(5w^ zm48L~y~^)XKBmYQY3gSxwo}Ygte%WFG_U=^q zPgVYN<+m%(`3#o(6cO$9tl}O`|GVP*#QOL@i}D-Buc(vjW6>n7J{5tb(R;>H|=dCJ#Sn=12k1KLU ziTUOF1^!w2zbd}2_?F_o6hBlvtoVguGOq*Jsjn#4H~41C*Y#)YqH?+Jp~rs`Gyh=4 zVTu6U#YlGQN{tJ->&=}iu^w`%m0Pq4#k~{M;#BK&u3ib zlW_rP{2ceG{D9(@iVm+&=+#q9Rg`f8a{iy1>3r5Dc2MlBn5!szjv~FU^88;p^)FN$ zr8rJe#t)=VQ(ndo@TJPjI0F7M<@w)s+B18RnmzJ1sC>zs6^k z|D)nx6pdfw8_K_}_%Fo|73=ypCgTx@_UkLko~7X1DBnr(OvUbsy%Y-+hboR#9IZG} zakAn}McLC7<&-PGNU>V+Dn#&7Zo<)2Y}Uh&V0X3xI8%9}m=-c#P}*=PJH539Vc z|72slXY%-sA0>T5$ahujq1an-pyCk4ixi6#FIN1X;ta((iWQ2B6_+WlP`pO*dPO>? zus(Mv{#5Y+#YYq$Rs1i-XB2lU{#o%=#l4E}D!#ACb#p8)rs(4RntVvHp<*M&Hj3>P z&s5A&q&E%o4^|wec#-00#fufED$Y=xr?^0Isp2xlYZY%$yh-s^Mf&5g{09~3kVF2r zie}HhJ<8J&hv{!C(*K71VMRLNkZ+(!*BkQLigdjp-(B%s#X*W_)|0yT-%x!n;yXF( zCGSVTQOZwNoUSPE4M@)DKq``t=Tl>ZKeCrC5iaUB2T`AUtmuZ8UF|dW*B>ya;UB`11Jjz?zFA z+Yea{(|7$2$78KM`Vn!zzeBs>ID(e?(Q+J(#iROlB<+27{7A&~_nkQ--w(`5N7?^8 zaN2n4ThOwhHSqn=_`>&-$N%KO-E-{sljo$pADr{nfz##;1Qx!ZH0Q1ZcQ3VZj4$mD zzymbAH7zo1Tg`rZ&NdvAq@lI!r62De&;0{8d3_!S+aM^oNnf z+crlo=J~LOZT!oV4RW6jwH^IcFefz2SG(~MWCF0xxd#<->A3YS^u2Ug}jY+J49g;2ZL+)-7 zy44hh+*yDmdGP#+{a;84x_ji8?{>+Vfg95cp%7}qC*U>d6b9N`p-Sdmt85^&o$R{w zy^`vNu148`^~#1q|IO5!R5={_KG~baY@mG_%G-o&Nii01OFEAzr5*DhXkt5jpQ$I4 zKmTgNYShR6AqSgKzn;8G9cuCx>Cv?KfynDuluxq)A2yMkzeQr;BTv7aHa~817ewLN zR^U^i8ps23Of*oDzr#){t*88y+AZ;&=4w>St3g&%Q-fAbr3TGdYHN{tHE1L9`qL{a ztw6RXe}gq>>(Mi5vz?cB6Z5wBXsKC;rlw|{glaI98mEaygDU3qXse<98Eo2RNcQGK zi1tDZ-f8guT|lA$lJqbX?DD-Jmyz9pAG?C=cCvgSuq(+XK`)(Euotoh=Yh@O>9m(H z)gIl5C)2)+485cA0e8z@O70zSjms{x?90j7qvc!fRixSV8nLnLE68%ORwJHtdl`j~ zkd4x4H4AKwN8Cp2UG{QzuDN8#GWAL}@(!};%)5fh6L55m+Jo@epOWR;FZ(L?+2@0J z^XJqVr$rd-Yi#6i`Upe^kk*XXq1}{@K{IheUi1x-Gun4+ltUzkh0uc9;=xro?SALF?Y!D76dz$j? zT697ndQrmn@JS>-0C5M17PQ@xzGFMVwVVOsQxbIfXHFnrMF_qQtEKzXvI=nvBXv^trbgZZSqS=lb|If-2|cyOTq&VOW`a6Xa4LgTMqPD zq|1TsBf+9X!s5Q5ga_INvs`kZqQhd(p@c<`Cc)xYfM{)uOBHT{M5?fp1gr1~2!x=^ zDVSq8G$(wRPwX4+<~!}l{*SqbYJbe#_YL>#_!rz$`N{V48(|#MkF5*Cy(sxHbz!&@ zWn3-Q^E_^N%#XIGsU6+7lHYJ=W@R&KyEz-TW=*a84R@^tQ*jcS@RROE_UNGbqOfAE8C}Ss5)Yh>ga;SlTBvxtYm!=zhy()j9l7mh7s)x2U~-NW zM_@1KNPo_eQE0`(nV{g>MVKR{TtZ+CSxQlq6ivdpkZ^;LMFiFa(zqoMUNwpd;}P*; za>6W8EG8Jc#bVd9Pz;rL$Utw0OQICXN|W9Q^qOl;TrU$;HX2rSbx$`TNkAYO|IH$TD#M0m?qMoHZ1F-xK( z?(vveQ4-rdW^QyBh<%7W#i$O4U2L&e87099Q!vw`BvyOOEb)5X>@jnrTS3ST%9=pf zA@a+sq9iz&z^OTi8p|!kDkk)h13(ER`gzRsD2bsSGfO^AJ<4O|MtSDT5OI8jN|9Go zMM-##S8N&&gG%XV2~jj zu^nRADhsa<)cf+w7Tish67N)vBCuW4aKRO}SDiH$c2A|$yGU3=3EB7!$?;Dl@J0p) z=|GeOtL4y$sUQ4ISvy`pA~#nOJwh}v3G?wI_Z=*|R25>9wV2yqlJu_UafJ1V9AyF9 z5pg-%a?S1m!yItnCFym(C2YLpxv-spVJ#djLmi;_D(FN8l-^n7CiW zV+pJn#fkGYF40-XCMq^A(N)L#3(fqv5L>{>SA67TuHJ~aS_tPN$|4C8<2^Zxzgf;n z{AxMIlG4hG+^JJ4O6JZkEvb;D1yjnWW3$iidfCDMy-k$kd$CrO zO)0M^nKYw&H@JAATlf|{p!p|FFPSlA;oQnem6w&3ROHM;_em^|kY1q+B0je4{+*qa z><-StoKAUe!1=sO4z>$ET!gg_*SkuG2y)Sot@NdY-60=qjTpT zJ(1^?E^p5E=XkVu*!M5U&F$QIcJ9oX$koZI*Drq>vNc4u%d*dM&SxE7>9V4~Ki6l) zIbN;_UM}pg+@6^}gfGDB%laY5ZE{>U7W1GEbz!By#4+x~x`>i~PEk%PT%ES<-vIU) zd(=*yd+FfPN^9Ee@@az>&X`eB?sIyFZ@YD}cS4Tui!1*7n0`IKbea|4_x8v=c`-dY ziI>jNo%s{J3QIyTm8l*5dNnl_hEl^`;54h9X`A*#uaZuO#*Yo;PKQ zXW|>Kl}NM$uCCIB^H8M<>;K(Nr_EXpJ?!|B4va3+mt-N3v@|u@_ZQBcQa+Zaha(X7 zf{ypN#KIw2;37HMeY`U~ZGOp&85aBC+>+9nm9wnGZq5{zluozIR?Uk|A1a=Po!qC* zI=|GK&R$VGdufS`cBUFdur9UuKeb+iH^i@AuQ4#Sw{xypu3-)AiQDPPT(6Pn;-}Va z=#va?qY_TTZwQgE0}On%^9Q5ny;kv|(F@e`KM0w}uk#@{d8qjk`bL$Rvh}460gZn% z#KW8IEh`&Fnm|Hz+GD-=bm_M@3c}lc0z=NMqxS)fr-UKYVDzSe_m}IQj{h&gkCx@K zJX7u>&?XN^tEMsPM?!;1D+lklxBo29cb4|*AsTzvfHrwRS}mb4nS=(D_I>bvd!NJJ zYRG7hhhyyVUsfg$Nb7PaJc_n9!KB>+f#2SBJ-y?ky;MYF?{3h{!}olKvzlX%3ezdT zGmVjcwtl@2@r1nqG82p*{clN|Fdge1;xEq-vRsB=Bl_#N9`#FujP=VvH1&H9G^$eu zkgyf@dKm_2%1Q_AtG4wv^j(a0}WT&8%P;u^)xioAZP|F9zaHTfqL|66gF;-3{iQRF|zsh_DR zz8K)UDL+tgtl~7q1&Z8ojQQ6o-lr)0(n9_R<^QQD{@IYH;CwJ&V@3I(Blteb4^cGh zD`qNRp?Ia@Dk27MzBCj0(#&-ZoPi?VO@v+Xp9U{4&fs@y`tLRUkIL^+{%^{Qzclm@ zs{F9ZW#3oW6GslL;2` z8>}z>e=V4)h=1@3FW>e?dam-l6$dKHzN<(dK_1cg4Nuhc62($QTt=dY;swKsyq7S4 zGewR=kD&MI1W5v4_A5?ru z@p$W4{-k<;QG7>{(~&$586Sb4D$j=n%3Z|c^ztu%pc+HaxQR(2hbz(_koG1i&Qdh{eOD;ISaG@H)rvnu z+3(w|S26p2zoO}8zwdp@A5i>Q@iWB$UgTL`P_cnxx?(fMEXDSUrzz$sn)NGZE8kyn zsN!(NV#TqFmncqEoUJ%dagpLu#VZxRuXuyvTE)8ifd540W2?I>vySQx#A+lYQ?J*>#l2|Un=weNU`p^mPb|o8^xy-pH-wgEAyN6E&G%|py*<9 zh3O$hdb*Ntsn|}jlVVrJe8s+sX1&W0<N|+@VOnTc+<){EOl%ivLu6SMi|YM~ZaUW&UKvRK*O%=8CNpJ1Cy6 zNatSWKU;AS5p92-@)sx;shmE*)Ssp}N3m4#YQAB4Ow<>N?yi@T3#chh)6?Z7okD2-ZsQ9Ad%ZhYnX8Hj|x;vBS zyBje@v4JAJpeb*!c&1{GB7LHnK2UKe5&eTM(v)AUI9YMJ;tIu;iu9YN{;i5z6z^1g zKyjNQ-K(kpq~f!Re^h)?@nyv~6yH{)S2pt>R>W{C^)~NyU?m-o1%kMo1na*4WvaaH zd*JCR@1j`uJ+QaR`za1kEKn>|9HnU9N2I)3>)X2Jck`CE)n4BQp||eM`_0eG>)Eqs zc6N{6y;S}9>)Q^ZZy?0iw>8J?Y3vuF+a8N$?G4^;FK-iZBUbx`1uG^8r)-IZ_YPiu zuhl%#JM!hHUwk=pa_ljAcM%h=>??0`H9$`h)c(ObBbk4(L)-u#>x_N|MduCDW}OjN z;5gElW}VS1)cKe?1LwgU)(HKQOejfSfkMemk)Bv*RFB%f<&U?{D2JrC&gcb_U8j0B z_#TzyVx`eo5LjDufHqxMUK>L$-$H_XwQ+x9KaC8@?u+;hWx6+}(`hH=S4@hpF-lnu znHyhYl+qEp?z;5XSyFp9FmmcH`5XROE_&Ou)XV(mYqGkHTG|9?^I^D zZ=c_Og1Gg3m3u?nQ^dao>Zy%SztfFRk8trh;)HnTKH-xjz9!<@6nFHYbJbB?jpmii zqg#^C1La7cr-VmQEo;Z{@G>q&wY`<%epU&O6{+O6b1?Gt`h>eo!i~vz9>u+DjB^YH z(n;gh62iDt&7N6WGCf=Bcha3=FqnoB{ri}5+%|#Z>%i1z1Fi}VxH@UT_uT<2odG`x z47dS9?Md;0DKD9uQ(3a4GUr%*Fozn`OQtTIIcaw3jQN(*Q>IQWFInVwm62MTh+sqsf4PTdx0JYVNp{;q^5h#-(}on?gbz zMwVBEXzBpcnvBT*BbZ>)=%nnoHyQR;Ba!yl2F4!$mu>QZwD`XPK8c!O(#jw(G}C6_ z!1;eA6HMA%2>j(9gpM@aeHe) zn>-+`Q7DLdCYZDvAn@DU>$8V{&BpEB3EJeLjp?xWv`=8jElBg*I|zF`Pdr|{(#7p< z1(lZhg z2d&x~EZf5i<{iW19QhKwNuzzXU?Mp9hGSc>Y!i+n^qJ|CNcQX=V_ZL$BaOKOTlyf; z0ru*lS{yt6lYDC)V|~&5ybg%ZD!!oj7sU@0Z8ReFBu=aV-R#Oo%R?KoDfqx zj}l4p0qRU6-G2su-K2M^BQtgbmxv^plQ)=7TgrT)WI7rorqeo7dkTNDIr2MnuX5V5 zLpZZZc9}qOFUhW~EoSHFSs*iOYe8UUtr5X>d7}jP0l453pz+ZZ^|*nLo0>`cYfpQ&;CTT$me~J-4!?e0J%~$imWTm9yuUR#>NI z*04IJWO|~Ju!=;#XcAw|gV_~)a|Ta9xca`^nYFsJXWzkWh*witMs(^+MDwO*cb%D! zIQ`!>A?N=XQG9mnyPbZEo8=VVF(%!P(Pz2dPkMow?>ezbxx|Fu5q2>bSvswR*MrU` zvQnq!*~&2|*7d?3R z5qseI%mkBm5d`uWstH%a-WDV_1s_B-_AUW!@=%pNw(pS8VA9IK8=6U6OTcGA6HHp& zdA1H2CpOPE3>C^Y#(>5i-{1Vl;o@B%hjQF`wmGmzJrj(*8zAu8%kJ`iK{yHA7vBVy#mM(eVjd#Ha8&k0=Gk^aueX;)et8@WPa^t{ zw~Oz1LB@}_?mSxznfSJ4f@zDo^K7{%IM4QZD(25%q!|pNOGvpqKdhUt8LWN~4uH%A zQ?B6+`sJtQ*}maCoA>N?)CFrY&&F~8JDz7_ALV@05XE7NV-+VV&Q>f{W9CK1tO7i(;)ca44r4#%-oE_~)Tc&AWN+ zk=wl+UDD#=xbtqkd-nE}k3a9WA7dcG*O+%Zw(lDIr_8%e6PvYvFz>dX=h+VJWj6>U z-3QK_NHe}`79}zvXMETGLP-~98#oWqTvu!}EOCxJFWa z*PbV7eAg}qBQtE9L10delXRG2+aso3PR0da2JLRr88-T^d46S>VcVQem#q|jf5yGt z?2?_rF78InF4^7;+m^To+ka8{M{y4}HjI0R*(EzgX4HNxzH0Pf3qC+wccveJRy~{F z)3WtGindNXX|%C;431D0nGltIJHunl5X z`mS-#(ag7YPAPs3R|HJ^r-mm8emzk5Dy6y_DoybR|?7|9=PKJ7&O)+WN< z|Ayb%eoVmZMZKFM;4^C>t~orB`LqqtJCXUck9^1bRr6{5u6i$1IiP8ay7Ott zCpe$B=LF}|GI4ST9Hm^JNJvv3GNY36?|44#WbX-O=F^@;KjD1S zvHaFznx2e~MZG499TjEo703rGf68wS?Sy$ePBsu_z7x1Y`IU+{D6UmJiGFK+y2oeF zva?TM{>)npntlBFvyYBCf96K8_OmRsA$WV+}RCa#1O6cjJWIGYGEB314uW_Y0nlA9u~seAXWEeAa$Th3#>lwdau6 z{Z-s&4Yw-GeKhW~_5ziEUE61EN8D$Pvsmt937<92^SQrKpEb@>tIt{|7-g_CpddbL zB(fn1vo=1THJ0c3tnvJWSsTx1Z38H8*6bKQYgaL6+-I#F)H&S^pS9p(YfUKFF1{Xg zA(E2i8+~bZQ)YUeg`B9@ny&K1%1ktQVsWUeBpySO{=?UU@?>Fttr;L5c=5q&jlkqO z>p}T!h>rmf+9C$&x;$Ss(%s3iBilF}2LJL~nWrp~zRbG#GIcFMCmw#UBp*j~PU`~I@@Gd_JL z(_OtMRbpRrPQ+lrpqb|Qdefn~M|c#`yN>lgHI3FSyXy!8$Q&*2^4BuuR?R3wC{Bqugf%Bt$ayEhUUS>XqI*jB;BAPmYl#kH#G?n+I zT?pE5Z#wL4K}ODJ1rd$C@A>k8wD>ss4hapWtoh&#&7`Ghphr}PVAA-==`YvCdvDr^W_0)<)K2^Bs3U%OTqi?Jqde!NTR*^h~_xffHrwRT7^iUo(U%HdI?w8jO~c|EcRgHzuPa3<2}pa{eiehk>fV`6^bhrHz z42xg6XPfx%K|hmv7-0Dh%>23CyXSwM^`7~?^7~*ZD8ljQ%~p3rA()i#o&`=vnT@Tk z?;aeH6#3!SU&O-8gR5VQjoP_gc$?c#sU}E-LAnAHjk{9BMb!W-iLN4Mez}hgP$(X+=%0{)4Juy zLgD;a@cyD$cz97PZDM}R-H}!k9NnTOIA9R?qF87++Ir%kSU6l1bHgobf(4Chf|wy2 zgp@&$*sz0k3jB3<=(gky_Qs-Z_U5x8x0AKaM7RRxGp`M^tqd&PD5*U@DFz+`J~Z7)Mo=Src?|G)N1C zab){(#AUQ>jwuOtcuX&$q+R$jMCQiE&Fzg&!L{4$4c$KrbRNxP>m8~IWZ<0P*pfDF z`g!KYEVhIFl9jS4>2}s+WGt=U$XK}Ql}65o4V{e-)d&vS=L{Ya3-wEXca>#Q>~lx# zd%HWeyi~Uzdk$;y>h8=u4mA4hG zY8~1Bmi72k7%05w3)h~58=uWhwXeffx}2A)FTj_xGt%M9IR^U9wNP`+8frWXSxo6y;@z59WGx$$Kad_^q1eQ*ly!Je*-(mX-=0`xeKAwF zrpv|%Z~;wf$Xwgf`46XhsZ1+sYCB<+SAQD0;-)kk9&QCjHD#UZ%M-xprgZ$S|2YJK zF(MD+8+}$_Y*T(zpnfuQj`Q?6>IN=ux&zQ)wiTElRO)(aOcV{Po@`RE48`6ZFSa^f z>~hb{rEGyKo3h$ou`9e{@qINbaFuA+??9thdo*2s1K;=Z79dk#rAJG3eh{zDHC}c2 z`WCoWG*ZP?-J>yg-W4|OJ}`j2bwD!MPvSJDVME8hBqETczfG;P*;0H0Pv1|rAK5iz zUqxN)bI3kJmb35nxgoGT_vx&W-Jk6<0D2ibnf4$mPX^nl3?GQI2b1OhJ2HMi@v$9N)CG`S{dvG_W5khzGV4-7ke1% za06L(H~Rwi$v==?PUYb|`|p$O$U0m|=8WJ zSHU)#U7By%V|d(!cuE4>P1!QAncP*Q19KqQ6S$VB@w*UhLRu64m&k6sn}*2#Uf5sZ zm#zSfe+Hrp34SbMG>E3O(d=Vz+|IYzmms(=FTSqAzC97dDnxspjU#Hj1S0Oz+hi^) z-5G{@IW>-VdR3nSk$YK?;Sc5El>^Ecnx!M|H-(Cn6)+)1`5JOW6!HqHH5AK-tVz*o3vn9vvK4|6-|H<0LD; z5kEkHk2K^r%EHCav_6v2HF{`5b7o1mGi;LupK(AITz)O^6zxVF_ppsxw6bMh}Zl@0ROXP(dYK9~7 zFo@$2r3eyb9#a`5vD{;pL`hudF;!6#8xT>k@=@l-8~%3s+zPLC@{=U^S#1&ALZqT#Ee zBwC;t{QsB0jsy9UD2X#gUQFnL$h^b|BHGQ3k{IeSfq1{6mZ_nsKoF-m*gg??aWqSPow>Zq*O|+gNoRgZaugBvdO4OzXXb`rwl#)b*6XDUmil_>f+}Ax zU9e1g=}yTplHm2y1xuut@^*)_V0tO4$1dRY%Y{pQ{Ss#_(JvP+lYY70%S^ZvQBEQI zMerD9oB2)xPt* zqnZ`vX~e1BQEkqr%b)8NV|26l3b67;~;E7 zgnAv#u-9p!~|uQ0Gl z;(kONCE*c~msLke>=bz+LC4qvK{O?Xh5%0?qGK(xWmx4HD)l7M7ZJx!7$ouqcGO&= zqBI#&o)p^}%g(?_2-Ja~{j~tiCV~AqOAfD)SJh!5$FSRp>z6f#-OTG-V+h{mP^h`( za?t9_VR*L)3{E7PNUv(+waTW*csT)U zK^cq5fDY&-MuGLA9I{GZdKLA$h*|!FKmsp&?{b<*U}>nB+&9^twl&c-E5&S8@A!EY zOQ3_J0fJ0&nA_p9tOm7aVus^g77yz5Bdv&vCAkN*nu zt9ln>etcjHSo!hGgr<(#jf^p0??@C|%+d!Tq5%?$@e7oSEHr3&vnfW!@cznaccY3v zEBI57-p7nR-_tmYJX0z(k&uIkyGV7E#JQe4k&Asu0&`_aY7wCwqBK8=Zl2t)`t|xv zqP%#&c@s9@5xeoXJC3n?5rY_mgZ(>2NmC8&PT;U>l1x?hLw3+pF(P9as+F|DLZ}8S z1hpbbq+^Il@V1Ahu}}{uAQjPfzB#iJl+(DNibhFO4Jw2TUlM8F5$YH<7JNoo{9zi# zeTGI!Qw=HvH7ZG_YKgm8yw!N`=AABRl}Xh|M?Ah()-2e7RRmXl`NILlgbpA&A(|1I z7iRo21I@GZGUDG5*~TUq*;|mYf&V}D-UGghD*gYzbLS?xK!Akay%bSeLLdTalmHaYr%#Jf}p5TEdS5v%;(%Y z1Xy%+zwYn*cV3yipXc;BbLPy(6H{LzdWxXt)O|8`L&aI zfA616`R_AzS$U?WXa5JCEGJ=1%r7fSDPmhW$mS$YWAxWtOe=~rC*1AsxK;bR(^7i0 z#uVPx{1KPqLP7W1l$4O;ZW|PFt45%%N{O7B)4aJmHN&k%j~#VbxMK_5hLHldsL<_DR@A=57n;kHe2@19fUj?Hk-O>v7;vfJT}$8n1DMwfI7c#FtU@0hC^n=~4oiCUIl+zXRP zO9mDe@>fz~zg;rDWL#N+T)p2;F+V55^EP^1$>^yQ@=J0H^2ZoEiN4=fVW#%o?qF;%i0^zJlf#kS#7q@&wCI{7aiFNt^e%&J<3J1)AiYHtv{}E4q5IRzL3*3v#`Jg%+VZV} zY~w%-e1-I0H&0H~Vt&^`_NSNB%R4@%#}CIgy;~Ir)nT?5jtT_!`pz%&;=WO|;T~yu z=(*aDDjZ<8j;%1HVHJ@1a(f87zkCf)z9hJ@d^j!9@;wh3#VH2NHVf%-wvpXzT_nT7 zSM0#u2=|r^1ln+StWn@!K^mVWo&Vy-spBevPv z^ITkW#l(Ew0OpkVHrKT1n1gFtre9~vifyiG8Gbz}!1c5ZhDX>IWDEO!oJ zFdRoa7_X1?LDENv6UFmI-s2c=q4YmVUm<<9^mWqjlzzYTP164+{W9Y;hEc@aIY|6X%df??Q2j+;0?b6YmzE zB+fFAx`tE5)0| zJH&g%N5rSZ=Sl2a#5d&rzPMBTf<*o8C($0_@l3;VS0ka|%cZX-k?zfMzf10SOMgT%<$xb>bc3 zed2@Sv*L^5tKu8t2ja)#*Wz~~Khd&$@uHdW3%#~@3JXNp}j}kd`neOKP26mU;OUxBd7ta>+#qr`Kak^;kdr0ph=?lcg z;?<(L?;+ex(*G=)`ybpnnVRK$T6{_TyZDy4O*HpCgx@9oYwtabgXzme^2i zDz+Beik-!-Vy2iSn)@cwA1Hm8I9wbpjuj_~CF1#_y`L_Seua3oxI(-^TqE8oZV(?3 zH;GS(Pl@LKi}JoK{XOv`@iTFc_?`Hp$O-MNPs~&`Y#?IVsL_uR+lid<&hRITy~TcF zu6VjQLL4ntzJH%5_X|W$p=bI_#5LkN@h{@t;)9~OpF`%Hd&b`?n)^89x21CuKK=KK zKZp+Rhmfm_$zpTS+{fXcCf(e}p=U@p_jBk2r00l3#k0gwVxc%uoFZ~n0Lx+S=iqhH zZxHVg*NgXy4~b8RW{nWy|6Te&#COE^#U0{qk;@R6e-*Kg*g!l=Y$>)AQ^hXg31Tm? zkC-c-E}kvsi{r&f;#BcGah`awc!jt~Tp?aBt`%<+H;DI&kBE(eTJbh)zCfHH7K_ux^F=OtV)(1XtHl-K z8gZS-B~c9jkobi7l=!0fviMK&U2(g(L)rO1U?)Nc@P6>k?eiuZ|+icg4Kzs2~kiEoSVi95vI;#cCgBA0S8 zexg`gtS=rVwiLO(i{ZP9-NjxaSA@}jsCbSzN}M1Ti(ELy@E3{;#jC`t#T6o#l`;Gs z;@u?fJr79VBt9W`u0CVfFbHoe9h2mA>N^!NwHF=DG zugEod)Snh#5nmVI6+aNUT94uPi(IWoy@uFGY$oEd(X=4rC%i8s__a_KGcC7|ALK; z^fXw^uv^qNZRbeDGeYbAPwUvR3x5PEty|YF=_c@zZES?vAalIZrW^QeY}~khZV{|( zY^%St?W*>$#1LOpZCO!K>bMCDsxMicg&(xvbML%C6`^*S6|Evp`dV0yc#*a>PTaS( z?TQnNCd|EQV{W6rH>$fNu=mb+^;foCQUChj&UuM#SG3K}sb~p{5usC@&dXqRqHXqS z6W4W}Q}4LF&I5jK`LPz#E&Fni#R_s(}$^kTgn&$?ipxQn0J`ogD4x4(_t zU--1f*gDG_T;H&~d3G2!Bf_hPqCVOe&EM~|Y}C*>c_mW#;C$3fyDzp@T?tDVCstij zg=}o=W!>CrD;?C!oPBft@;2&(wNQU`+v_^{YJumu(}A_HiY@4hxz$(IUzxbvE9VQJ z25v|B5>Cuc>huU}W57lGo!+0-k6VUX84$XV#!)e;PlQ z^)wBBi4$mvgnp=}0qt2U2py732rf=H)Ca7tc(w7YX&v=f)y}HFwEC*$4Z^EXo3~HT z{yXZTemQHyDH^!r{qutRtNmDYf0f-g?XTK$byl;TPS80S_Db6ALi|9xj4jnyBE^J8 zPU7`LQNH@0Rtt;?WCr>L&VmVnK5$8ZO9DcCzO_2?YKYoCaYLi*YDLZo19$XtVF%{K zimlC!RgTiEAs>g4<~Lisda1tre?D%zs_wG4D~4|lFHKx}=l1H?kIg>jjvah$>)qFD*IhZ#B#CA5Qg=q`pi zgK=T4qc2kpC9GiNwfxt706aoJP;AeYmLb|Q2z6lJ7+TJM-R9#zqL|*=37d~^;m}DO zgA0YskajrK1JQAya9ZW81>(x!5WK;OvC>5PcKs1g}e;fo#HN1a@^Yy@D+R z;V&4gTxu|E#u0C@<~YK};Kq&C97ouUKHj9jiQz03=;q`aJU*J^FoT+FlIuXPl1RVZ z^&EFUw5q33`@9}QR)aZ?J@r_os-0Mdz4gKjQ5XM$Ul{jl#vI3&^-N4N5WCL{Z*ERs z)!Tq*i7?0UjghLaWZD%b1P+!1-8Gncl?UkF7?wG1gp*f-CZ6dJl%Q#SQ-Xi+=$jc= zuLMUK_iC7>76?W>_ZCd2xhMaH;ahldd$7bUJ=v73m1orhC2MV@>Jc8_F(yRy(;3>6 zVVNTz={PjBf;TNB&&~NCoK0Hh=tdzMF3B9sMVEzOYpA|J^#rQ#P<@|i7`q+y;FQcF zI2o*)2~cbCL^|CW_zJ4VW=1Ae7txHdjULoKG#bon7^@xcAX4pOnBFi(JNS*V)(uS7 z811+ZYVFCGTI%#RUuoju%NF2d^R(U^hWY}F)Q4s0g7@KCY-&zlwzNM}y_A9bvEDzT z%Bc)ae+E7eFNd{GKq8*XcgR|&GVUom;QLl0@*M|DA_J)9;z76$zqT}k!p#|!je^yE z9Zr|Suio=ar|xF_e~juqMqP*he8jHH?=XA@uDb-nDhQlt5@_%tv|4=J*bQMY1Z2WR zi@6XwVt4YNXC@_Z`V)NX7D9N4!kO0PGzcHlr6&a1(yrUZhT&3;OX(7U@F;~k5ROSk z=1jW*zlE%Z)?fjI_bDuc@Ersg!C)!)@roUdb8{y&jYcd*BbJ~Mb8p0)O|C;Q9i$O+ zZNwZKF}Fs{sj-c3aw)e37E^t*!kJU*=3INRd}1@q)`HMoW_N@b)XB6 zb1VhsXu_D|q>DLD3d}tjk8+J|+NK1la4{t)q`(p^hJYSUXR*g0#SVp{FS~C*e(8{W$IG$>)QQ&j9^+!+Tw?>gDV-Zo)6j5swH9V^q|K&z0 za1x>>DLh*gP5s6zO#S1|10Krm#4KF8FfXyrp)eOa?M{&Fy^MzvFhI=)uo#ozEf)*I ziDd{%TM;?sluZ8=7(&n%jpspWJ$A$(n7HSG=+Uh$B&^6HY?6a~Ne*I?Hs+x6Xfz03 z%v>82OJA>;6Dv!ujcDBc@o*&|$2{UYv{tiZmI5n)<;yFl#1b1X3in05D0#Jn6~6vd z8HdYSNd};7w-*X9=}pS1@Q6`U-_NGNFPu?dDm)hBYY)nnz_u0RX`71mvisLZb zEc|DMBGf%|DBNU}(z0?2cX`T;atfTm;08)(l~Z^gJ6ZtoisxQjz74{U*wGd%aQs0W z7}ie{A?$8o`mFML5ZLv>ojvO%#vM8T2!RhsrWh2Gup^Rc| z&#H+|!8?sZe5dh>IXs^Wv70~?)_F>qSz-I6r_3m)@S3O0DyP872grlq1E{<&heBP}dKsHm~DsX1m4DA$! zx+wbmVibF`H;RpE6htxGc>FKM9v>(T%!a)g-o*L79u6$NV@`Z2T&VTLjt=Tr6rB^m zVxH9cVuvS>$?InFSed*PC14ui^gw)*a+ZVjh+qUqL%a-IlvC!>!pkcWUICCB=keig zebF3Rm7&tg6d{-32{i{nAsxFH5O!s#WMao72%#s3i{{vyk%?vN_JDfeZDX#f2b>BR zn4!E7JBmekcgjHoZ~w5@Ky1ct>^M-^h8^z2cI>ds5r~Ja8Oq)*D392O-9(|l_KGNc zmE-LR1zIqN0y`%tAI_%mI(F~51qVo_0=u3ueuRjC6|*U@CxYo0A`v@GzsxD8(7X534ha^K}zF`G@w%x{B54U%US1+pg>1zHam zHgmWV4;pb0!FwBAQQ>CeCBvqUI0P#lRZ4iZJD6x~Dq;{@y?5;9R?0?&u(3y-(`|PF z*E`_JLLgmxxj|H>rcV09H$E`E7^XMMDW7ga4<=X%sCXW{ck7N8m)!^7Qg8$W^XA(D zd5wvbNAMW^FAa><)5P+Xb`TuQMqfV98+$Som|DE)l!DRMC*x_4&wAQ}G@d+KW^6r8 z+W5!h*~ZlcC~SZB99bEbKTvl}-sW zt$a$n6b5%fgmjZanNv<71A9DrOm@Su0uP3(*>drp9R`!*mEa}avHU*BmCroGG6~u| zVOX9q%JyXWZJ{viNbI=I@0mkk33fa%6HLRn+YIqyVOxW7w{>O|mV|?>h)l3h#vKWn z?Vy~lf-|~mU*h&);HpSQU^!q$MR@{N-%Y z?Pj{f;RIiGa3a^wnTx`)M>dL0P)&ljc;gD1)bTj$uo`j zU}89SbGM}6MT=e!j5Yu}E;=F?ySW%C6nXA!sw|GL0r>G$S#?w2$-3=PMhbJ+pU*xN;t#tv!^ce;Jz?sYg5eYMM;DEoR1o+rjN}}=P}TenH?I4C)2>a1 zbLufLYXkc=&D|Lhw_2pBJ3Vp?ti{~dAp+wxkLAj=&4V2x-96JbaD640c5NQ%KpQuY z=ccr5+7jw39a7vODQ>$6|94LDTbg+yH|4ppW5>eA46NtOca!E%H@0meh*F}$H^rn&}A+)!^ zlrEidX8)tMZ+td(eunj%!&<#5?A*y1Fd9XxH|9uxv5A{X$3Je8wWNfKIF$LDsMVfI z)^CjE8WX`>7k&#p#=_DFVZ);aEj*04>FE=cV6uxo>}@rPX- z@39CsX0siG|CkwqXFPA?i?4sP;o8HIa=bhl&i`m-AME-moPq`RAmPns8kFZ^)9Vct zlT4yptCWEG9nE@hVQ{9$a&cX>jRP^T9+9}V*KSrE3kNIH?-vzzrRfx`jm;kh*lZcMK#cAMU1kZl}@0VjgDBG7Ku z?_xOk(_4o0Zh#xp<27j0y7P3FR^nTuPGQAquZF;vVPDhYi zeoK5pu#Eyb)8oETwBb6V0ZoCM-E6o=;b6-^zcmOqzy<=DFSm!V`^%Ss^4a>U1wUK9 z=OLpw#emuNAib_u0c~E%kbT7t9CPf?vupDt8hA$}!s$jfUzUSq^QX73!yk5Syc$Bq zX!|90ZP;fV(yonpHaxUl8+6;I-}!g!+MIwg((XhL5tozEPZiG;M~D+dwrR$jEnX-t z5_w(G|2mP^4|QH2@m-OhBN%?C_>I^MZISNAP6C)A-Tbl~bdJW*f1G%p zc(J%tG%zRxA}S6R#F;7H=cbq2DEL zBymwaDH^)~$j|(c9Nb^0JM{PE|FQJF(!Z9@i<0S>>8A)^Q+gc|dNb+m#S_H7;;AIU z4VBLC^GxqtxlfhOfq#bM00;dqlfG0shaBi{Mt|XdtMm=>H{(+9-z@#F@;B@J5&mtt zZzoYtJ4oESzLk3z9U$|qFGj>RVhV}yX1zYbWy<}4b^7o>NA6}_KEf4CKTn)5UM?;Z zuNT*fx06Wk9_bH@e-pQoIF47v3c1_$^Z3ms_W;IkAex~p=toO$Bch8k;f@ot z#s1w$ocNOXq4i>2Z+ak==QXziK2EBynpvK^APVK4s_ zF-IIMP8H7+xx9w;bE|llxKVsad{lf|d|rH2d_#O++%E1C@e}GMpYOyU#RNR-F#l>| z9kGGfTs&Ij`X7crK^!1jdmlrkpCwKar;3&Bd|V^;!WaO@ow>c@e%QHv9eu{*X90}SlNz;wcp|3*_`DHi`Je;ZRysYM>FXy#CBq; z*hM@+%oh8LgTx`?IpQdBoH$XOCe9Qu6fYH*iOa=u@n-Q3alKgC&c~B-e_DJ={JZ#; zxJ~?6+$ru8E5x5f7cT;=&qOgvtS>eeTZpa2RI#&of_SpnM?6K$6;BsOh@-^`VzD?~ zJYT#>Tp%tMuNJQtZxq*wcZhe3_lu8+kBiTUFNj?9$9mZ&ek|@3zYxC`e-ItK3!C;S z9?p(PGx@g=+lU>+bg`RQ*{%qeAu^xS#Zh9RI8mG;&JbsbT&l?Ue-f_|SBf`@YsEXo z4I~*d5RpL!@zg7C};zqf1c`nm=LVQ+yQT$N+MEqR*Qv6Q*QLK~f zrPn~@s$ZtxPV6Lh5l<3(h<(KY;!yD{agH@2t~+LVZW3=3?-K75 z9~7SupAugbUlzH1ndxm8xr&+kk767?eo(I>))MQ9M~N-PwqlCdRXkDbDQ1gY1I_f$ z5V_i!`UJ5|oFUE;FBGp37l~XX&Gc!PMWc)N(#&R=Dxsq*-6MB}8b#ExRR*iFn3GsP^i zuQ)&)Cfaf1e_@BIOXo;zJE9$?u3e7nVuByp4pX=_3W282W8g1mHwe@Xbog}7z)<$( z>$g;d*RQ?o?TW$MS}llM)Td}mMbe^G6@eQ<%Q6?dU6Hf7%93eWkL(T9gk_?6&dwU4 z2ao5e?_~OoBFt^djxq-bG&2x9w2p4BJ%-%HI zsc=qlIxT>Wo`%`iAkLD;PPZ?&j@Yp}=)&63lzDZtVWTL}u<5|>7JiZZZD>H9{lR^i zuxOL~tt&YZa!_&@vNOOr$qN-4;Oq@K0mOfAtGgm`r&Gt>IWN#`j~jHBByMq5gff_F z?*>WVI*pU}2luY)nN<-w>YJ@`D_2!GH{>n|E=kUQqaqY}ai`-{!3+ArMxpF#d+~K+ zZ}WMf6~W`DY;l*rfI8@x6~EZsIoAmCWO#e~R!@-6X z&h0$Xg|IhOJ~w{FWxZEz~(5%2$Zp!S?zf@Oa3oD=NvhfYs>!sTRrgyLZs8`-ab$^!b-xWl56M3af2WDlJ$Zjs z*xCv;iQ5~B^Nz$_d3B(^#gpp%kO3h zj&iOKxU1i;XtixH@*G@|*nTkb7>rtbCi&%L=gR~q_+>)ynT@rAo0Eh4=JX7FnGpDA za*rK>k?xlXZsSl=FL&P@*X`w;d>U*cg^=Q#TdS;UmsMq{vuab;=nYj?I>wF?>g~jT zCNoa3!Z~pvT6;BPMX6KPIUhTym2bA7PQD(Qee1`|vtOtPZF>PW&0gBxAiK`>=^uB> zdTV>9tn;9a$-Za1u}^HSzmPKm-x{2=F|d9m95x%r*uP*?j1aqxd9AumJeTRYPWT1{ zc7wck1%jv3r`=%w4<=OQaPo4-=w3*dP+SkXoI<(B4C9i(p>sDJm&K&Q2~Q)bkY||5 z4JEwG;eEW~1wwV&;D7Kl`Zn)Jkt6b<_GeK{K-5r&i4YN`DdB|EOsb(WA{62j3^yD) z1<~WoC+@`#XSx_uPq3r30kXB7#4l2w?WFh+-C;rLzU0}6AKuKuJdnH=j9;ulL9A(jhXj{jm0EmLFp!XKa$L^Tvd1+!TVsph$fAy zUQD0+>j&XO3rY{vXPK&YXPE!-Y!m%J`9b6ESx|bYzKO}jc)?9xc=P%2;rg2plopg8 zHB$9046)gSz#;RKQjHx5Q6&kP1>Z*rZjF}UgJ=mp^isT+mGM!1t{SasO0eB4fw7?U zu?bz(Sdsd~lYe6PPrbM&G5sB$Y)ZB>TC!bU$vW_ucAF5@xzIy0EGQk1bexmnbe7In~xwjp3uuspjLK(<_WL)3GPBL{1i~ ziicl|=hf-M`hSWl&#Tjy>PJwGL8X4w3gBM57zUO4+n~mv(kayV(Yn?GCOd#CzX{Z0 z3vfGNk7QbgXr!mu`a16EB)SQ89q2^P4n1OS6=C7sNnn?{};QDwZtJMXGcq*-Q z*BZ*Wxjd0yV-Oe5mr(O~bR2Uv29*Z0jn~D9AGEZ9a~8vL0268_so9>|S?U>3>x`R} zF10Q#0kmMs*qjm9;P~pj1E&cHR{v!dr{3T2|4yn8Qf+V-{>LxQ;&0g3TLYQnkoA^B z*av|Yp#qKglSs8NJl2TcIy*u@8M&_Y90j+zupWuoeST36CluRZ@rP$WiW)t z=)$j>$>=ufW!NzM4%(Y8tsz`Mp%H`)5E?S=M*NQX5wu2Jc~9fAjaEW91p=1yvlMJ{ z{813+uK6fM6PBV0OVEV5H(|~u*D}Ot!d#m$$0p3J33F;{wB~A#)r4WrGwH(IZ=%2waKxmkP2ZH_ z9k`fM)WJ)>Io|FN&;tA7Ul-&bnGeBfX}ZU=;T7T6Tj?CI2pm;}eXN8jqjoL z;_zC@4|DY?G{FUhU#EZzuheP?hsHunQVh}9Z%c}Caf$Mkw5hc@)y%Uwbrj>#KZ2ZP zL5uOthTbD^DC1L{TLl|aTLKhL#!ll?WU=*70tT({A1f*e`eS)omfxE%Mpzz62m|MqQ({W=iKUopQ>3#$J@y1x1xGNnXGkg* zFOTu~Oyqe`D#q?x+sMSs{K3Ft!)4I1I+M5oyBjDjE2nUWr_3m)@PMbxDyQ%wcGMN| zrsrNuZF-! zNE{tcOHWgCLkQL|YKbsUMyNc}JN?58A&$q6lV#{t`EVR+bYpt(4w3YxY&{!5;0i|= zD6!rU{l0CXIDxZ>CZ-0?cZ|J@uc0`BGYF)JgFA0dIRz#IcY>ui?y zwdBQG%hU_XW36TCY+q}cI;WhiWuZAeLx^SAVboxjX)WuFdmeF*amPY`3J-Yh_5|R_ zV%47)YdOQ%YP{BxhZ->(Px7z6%9%(v>}cTx8#Q|plHCth@)C`Vm`CuA$Pi>Yc3dYg zH~^s=cBH~1VY6Wv+kD{6#>4W{8Tpuvd7p_L4T|ut`13-h!5-_K9Kt)s!NeEFbvVJM z>;`7dGR@dKW#+2$nk!PFFbX@aM#5{kIkA?DAf^=f$AYxSUK71}d`lV8nGHibbj&no z=yV>}0F&J5JS-lI&lX3l8V9o)SymirW~>4Rvka<$OoTAoB>XSK9v>*dPZ2jMk04rK z?5MBrfbX%#V|_viyeQW)B{4P3MuJdGpN%8|OAF4UX`C@oyd%veim-c$w!G3^d9)L%%yPmB}sEK}1h48ztWaoxqvA8F-EIeCIRByn2GT36Q*aAkStCXBjBlbBn0V zfoC>|dw@N|a7Nl@VOKGx?9XUSP&W*jT|a8?ydPiL|iJIbSi2ezZQtP5Na>ybC- zhWf4z7SuaSgKPvA_mcxdvCuynr)am#KEu0G&mmYg6u{iiS-a>_2^BX)dgVIDX2S$d z!;VHxUmgWSzi+0=@d#ZKlR4Q0Jk-Miec4l?II&C)D1zskb20*DV#n>#DW{N)Js$lH zJFHmL9Jrc|X|PX0!uIyXHXLi7(M%{X0UEwwP_L1tMT7bcVlb@N$|^n4+B}@VFnhXV zPqa)CPqeYTqbG^!6`E4!5sQpC$d_0wPPFE2d0`skdL(Q*UgltR8^!7fVm8J*_>9>j z#!bXV^xaR)@y1Rbs|npvEY8qaoapl(L$J8JBOHs-8|n=xC%R-Gwi|Ivopcu z5j~HU?@fqgHm2+qXIQK_zQ>bc3TJL)W+)@pc6kQ9``bChaC7nH5a(bw1*G7`ik5`2 za0hfL6ZthevwD3(zk z^UE>;2gL$L8w~?88`~&s5Ucx(qej9YdeZRw>RPr5_#XV32M1wr$q{X_yMftrjCEYE zWYI1MLHucQ#0J$$L`*DHD}@x#-5-<(fr~7bee^_cL*VTuLiDKF<-ds?2B?bTyS6rV z7#R%x7{Obi^|E=;ogFNSLnufYW7{C?Y~?=7@6Pc1u*bpbAc9k5P@FDbj2ZqI9Z>-9 zc{SQ2w1!h#Q?6Miamu{K#0O>_5VZ+PgT%2#U&~AfZk+J11$K@Ou!HT7ojp05GOH_k z(}ZlVR$iX7vGbbZ1!Xr@;q%yE$IhyJ3p?w`ZuHxN-S5YWup9ke!Ok1j4(z+Je}Ua@ z^kdp|V>S7=VqZDFgkLbQ0@qp4*~T1dQMm!fL{dcg!(b16+7+<(Z3{E{(K$4#0%V#2slBRZvZOzV_3A}zIW zy79{%nwpzGCck7vUZ*|-M&wMLP+Bl%MAqcu;t2&MjF6g@Kdm6OPr;;ulKirQF{!;y z&FhypA}cTFH!&3RAGSKvHDxqw_TMx*^CX7)VQVGgR!woIMOw7(+zz%?zDl9NnR$aE zZj}tE`%@z0dNyzFPNk8V>j%-`%vULtFCP@?4&@6I{Hj4T%W`=tJ+|gB(EX_}J(JO- zXA5@{9WNP_@)y79nZl)gTDEg*M4F~8ZQ3-w3nFYy`4CoPVlf^cH0;I!?Nd`vNgbO? zdoWcZsqVBww@ONL7|EG_e9P3fZp}#ZwrQQ*Y?gCt%CJ-Y(J#);c$m>UYImon*d*%o zx6x_LCOIRuV~6(5k4o*-zD4^EXSwGMJH|b)znk2DT8Ufkq_|6Adjk#h67oF zih=Q)lQZ108E!uuV@k^)jn2>{N2h>idIpAGy1^RAZ(xDOXFbN+{1}LzyzpDf7+Nx} ztYE~HuCTn3+dJ>S#<+~Xh{l))O8D;?oSD)Ub=l{%A(38@^pxXMI!8KnOiNEoOFKSt zY)Qd{0(1mzB4_o;JvFsp;;4c#V+zJ}NFQ;0hfyW@lSUUsN(!cpD;+m^QlwK_w@zKV zogL{gv2eoV{IU-DqsE<7I=Qf{uozCGi>ID6dU8ow!HfiK8MN#-?E(Gd;hgutTRvhk@8j%f_5EcGA@2kB1?d!l{!+mm#wbr3HpGE;A;- zEZ?smWNd~NRXDC>L}_t;NvS!J2b-VyWgTbgK}n*Qh#GkrU6fyfw$dZFPg=ldQs&bT#$hmEvETs`>A;MZ+8Kk!;cAxGStFnm~^( zxE22%wrINkKW~Z#=F`nn3?A^jEnT#*&qU4Pz$YI2OjJ1>{kR>2J&gTG;rL+4IR1S7 z4_x-KvaiAcW?O@V-?x$AV)M;{j8E>-?bvpBnB*sHxB%ucmE{_Y-Nu1ve#7?~pMw?o zKx$=%<8Q;Bl0?bdtluc8{(NV2#0T`+UcSta$3b!}xQzobFcweH5enL@-xTQn^ls=C zv!zlMem1=YkZl|$aVgTrT4S(t57$0VScoKS$~z%=+|i zw)Sj%UNN!F#mKsUb4?A#TwG%%$*;3z#WvTp48NXaY%#Dtyp1&!+kTEM8ryHN&p4zl z8oopv+7yjB&Fn&ci7grq@X|&IBa@m+DdxKsQ_@H6Mm2Q0Evt0S<%=sK)!ECe}{z50RV>EC7pd6 zb-wh|KOXIfy0K{hy{>eA?4y4x>20KUmTsn4BHlphXN#j0Zi4hF(#>QYX)+G{3pqMx_GJFFBi?)e57mE=7V=A+`Zx>;#1-l@eT2P@naJE zPH~^ye-Pu*0h!|U%X7bQsi(d{cjd;6Ymo56Zt&Ba8HU) zi(AB3L_QNRoau+b&!vAUekcAYhS^UdT%uT8tS>eft?iw3>9o+!c$s3BXl#nXeW3JV zB0noIe1T|ejX^JwK25wpoF^_6IjMy4uNKXH0QybR*NW!80QbA4ZxT0)&xpo$8N$6L zogbf>{s-d6;%K1>!u>+!x`0mGo;xYqRGj>1)Nmh}LG$gVG-n&6)tDXYP~W%W{8BHh4DoESP#iB#5vPjg z{*3&LO*rr}xnC)A8ad0qQmkyt=MK5A7tQ?};UALzxcE2mRq+jRn`rLmh__q%7oxT4 z^MmvRgkgE`d$5K_vgMPeaL0)mVy4(fJVneChl(S`G2*%6WYIhyKt5mkeDM;ovMrw* z<$jBJmuPI$LFVsG^Z2YypC_eTn?5f|w>Ev=lDt6_)vjMK0!`-dMCYiBhDWAf7Dt7W;`q#52S~alFXY zAx!^bagk_k8m*FEF0K`C6Ym!97p={s$ECj@ZWUh_-x94&q>rWV5%-Dv#h=7521Quj zM6tG5UyO*Y#13Mb*iFn3dyDJ7z+Xl+DUn^0Zl&V?}y-(Tdy7V2k6a4~Uz@%C?|hllzd%Qv62zQRD(vrppy+WL=Tt_tYceF=9Khlh{S%`Zb2{C+3jo zD~CuwLmVmh0_o#KW8(?ox%`dk%oD9`rz@l{6|WUni#Lf}HOKh(ikrmE;#1;t;>+S| z;z#1A;$HD9@q00Vu?FT-MXWB?5gUjRv6aZ>dyLmr3Zominob(iCpBz_>YNCi`I72tJ2>PxxSC#t?i~SrGF#-B)a&x z!EjvkN7fgQ5?hK~CP@FTVr3gnTs=ttA>wdxq-bq9ohzMd3mJa4crl4~wNUz1;?;8J z5=4f#ww>;jZf!epWg`8b6f4_w;yOk8zb{%_PP?RkEq*6DSRlyoaUz#DQg0w0CAJjX ziycL-f@Jt!Vt?^8kxL=zpD$Y5O=Z%p?WT*QUoKi(PFxVl_||sQUD7v-Tnb75XGJb} zr2f9ROWZ43TTS0fx3-z;V4#cfT8hVroyD#q9!Gyu8zskTJgL3dQRMeomZzJTA@&sq zh&dv^i!wYX=#l381z03~f>H6%1#hbFf|IC?LzU!=+w5@ULT$oE(?!pd5QpfP#B)4w%;9a2;YVQi2S!b8q zKW~?N=HOky{yDosZENoej!)XeK)HGMt!E+y_ru)&d9Eoz3($;{CezPf99OI9r2wLx9>g% zsjZ#)5nMmt8eD!!RzlW0y8`2%+7+0&cK59_AKL3w3-1kutLzO`xeZ5qF;Z=^Ic`P# za%bn<&=(t$(ol9cDLbzsX?PFpc@>FZA{Yk4Um*ietzztRyj>C4<}B}%UH&o7KqAk{6CVd2R`8d_4fxe(XpZ!`&G|ji{RhPk<`ZHl!Hg_A;mhF`42O)Z^H9hP>xM%d z<%{Dop3p50ubBAIBlw??6dF>q9$drxniU#a^I{eO)-!-WXjsi>jT#EqK;>Vg+$)EQqs8zZdG9d;(Q9(aH+;oMQ0Y%FQH0X1I`6h zpQFk#P-ixKf={t0@{^-8mj&jacj6-Y8nrvs6Qe54zE{s5jk%!n7?@ue6DQ!GGoMM- zMz}=w2A(<+YW3n7u&{6;^R0>kL4}0{qjI#ddhxl^_${n@@ib{oF#?sy3Ue-Ex_MN= zfO9bux|r%YEYl@a`FW}Oxya>G7HNplkcrV~2DR*qLYCNbHm zXa%nN?rBOPP{F`xK zG=O}~$fZSG6IaJe&zMGOV&pR3$j!!h<|`P|_LbulmggPp$a4U>&y!6WD&MJaG8^l1 z0`~a8YMxyqvpNy?G+Uq6kN({7VCk z20NAv5<9SCiKSD{^8aYu2NAT#gEbQbYXrZW>y)1cfjuu$A&QNdL$GHwD|RUGTNzp! zvC@dc34STV65ToF6j)j;zKa!_1vFc%q{CQJo&NO)x} zn`M>_^EALcmJ6Ti%=WKx;R#2UBg-i~>nUT(DZJ?^MP^C*4o{g-xiDU)LpmaFo?sGjk46)%c!H)WMEbr2eBl-Ns`3 z>4_Z;f?)Pl*%@eQZ>*7=Wn-`(IM&3-CD_ui2#w%@pzNms-uWL)jKq$LDl4Z@=k$pah3HUb%pXt#ca#)pQjc6eM$NEH=g)Mf4TKOgj=@XZ6g$< za|+2`A{ZzgL%!p=pGt1`+}W(n#zx3I5N{yM=fztz@I}aM26Sh8X6>6WAghQnf|#ud z{s)a@Iu;|b-u#LZ2t-QWo6?=7mUD9 zoMQGJ&c=u_1%>%jCzOpSJFmE)G^L2A3~LK886Gkoxj1`$Vt!c>G;Ol*xQQt(!*9B^QeJEaF%3Ib-nb1?+$kw;;}rLd6s~}2JgkpfGbOzp<+>?p>24WT z#qck!9sZ@`{~dEu+=bv2lhViC3*mYv zW8j&moN`KUH|dT6eS5ht&d%uQR*$&j`{N;oD`GggAFH^An^j!H?JBO}(N$c-qpP@v zA8r-b@WScFFMH_lf4PclI5L}rRbFHM53dv{oK!HQEG=NxuT)ykF>1oOy|8rR;GgsL z)*v0Q7{jb$D4y19azSBXX`n2>m@&spo;qqmftR*fec`Pt>vZh?^wz@TRk+#B`W3;!%JkzLlH+Y*eSTvg`|~Zsn_&*dpO`Q6 zv-z5_Dd={)2Msr370~8|tMP#Jo^0;Tzhrt-X(DGm+uu{ zdb|d0dK}BOahS%3NU!f9>UlZ*{ONs&^mv>sAD`N7dg~xFJ-(ZBYY)#P+bE#ZkNe%C z4VQt%8dKnAHyds<94OmuJ;DvJ3dnr9ZNly^-)GHZ^;ZjiwtO!@MsbP(vwe^Bx>^Oa zdBHi_mg(IYiM&lgn+-?$sw=Ps6_N?Z`f#s}o%!tY;AfWTyq7*LjNb$l5jwU_2X?kQ?c#mtR=xxCv(o&heX$sRO+h_ zSWQyNkGb*k=6r5m7eTaFo_mt(Y)G12<+tghNqkdmFZa&k31WAV?UV8HM7}>$FAyh) zrQ$r1*DS*=7FUb6hf01-E4;gy7^t(he?-=e6OMje%{=D>miaSK! z3s_Dwj~J|m3y|T>{9))c211SwM=1Pgu|%9EULejB7l>DgOT}x&8^kr@ z?c!g=2SoO%Ea!9LOX6#yX>ag1?G4-|cQgI~-LyZD7bw#SiTrdx-OiUkN_tDNa=Yv< z_g-S<`SL^MewJw3C(<7)eX>|8o-fW3FBLBrSBa*bBAr{M-!7W=3itb^KPo;UJ}15; zzAJtpelC6~?iYU&`FX_Dk63v=d|SDvh{uUE`OSDe#cc6ZagaDt93z@`k9d=%PZMW~ z7mAmP=DI-mCDK=j=K6s9TIuE+9rO*-?-lu>gyq~UJ|n&$z9Q1N3&R=X_TUH7KNIad z`ER7}7x@8+@oI>b=f}5@duuUOH0#0;?*!>I7{qic&yUZQyRmKuf3t23%$IxR`SE7m z82snRe}Q;~c(rKOk0IQV=Es}$V+gld@qX$2cz#3UaeXb?dGTg_8QiO)V>9(9@+%wl z=Hiil%QjQtvP6ECWBj4wIpQd>M4Tq_yB)*ZdGBU@8g%oU=->hC)S&ZOp5bp3H;DI& zkBD~O`*YG?5?>eJ57WatzM6;d^`TZo_{-!Oyu$gjH{;hSpuFd|IZRPpzCn;VJ zk)I}cJoYzi^QGH$aQs+F|MSFo;>99AU($bt$Pbv*?-cDk_Q#|@BfcQMD!w7UCw?S; zC4MV9cz|O1abk5bS!^ga6^|C%h=5toYww>>O?s$a!*%Kx>rh7^dw)&soZhjkHxb1A zKhnIB^e%Rq$&u%c6ybRQTXfz?L%it}-y3&*X!ZP&q3r5e&fF*Pb*^J}p!rYV{PqLUHTqVb)*u7=;uu z?_fSX!f|HJZ8(8ldu&d^*YI=A{047M0v9Gl=OnPVj|(Bsiy>fEf_cgcg(jKwLjMED z_=Wg~SqU4FQ$lDn{)ag$p#efv*-EeItOPtPLmgK0c_7#_RAm=}U{->shO6*~iCGDr znizN?fyaG?BGycIkCI4Y_HbSk2SqbSBB5+A$e$H_hLp+%(GjO^v!E>oH z1E(w1HQ4b;4z-)fZgHUc`HXt}BDe(?hiWteA3*S$PHt#wpi`@w&LF2_O(!SFr>BGv z4=%}B&-89$Do!$y%n~QB!aq1AJ4e^3UCpi0xW+=EIm{<~ezW&|!cRQ#6F!#JM!)DInHrbP z$I-xKJ&t`LT1~L(;+}9$@=`x0v0v@<#Ee87W?bxZK57mv_yW_4d2%50qKt050`ZlU zpf|pRMZF;4)fY~K2=mH>1)U^A(xT;{atP6luX^}qMld;iGYgZ781_fZJs=`|@M+E; zATJugJaQudbF>@t_iujvF`W2d;0FHx}^+m_jjb|&Y2-e#o{OA)s$e;h6=6C!=gB!vD z-)GpN+KnA&j~Ypt7lkq}b~7&tW@17^k1lY`FM#p7fYTmgTrbaR-Kpt;`05F#RtZ*( zuNA7})OG5+4V;EfBd4+3EZD*cq?DdFu`GWSSXSb($VxDJR~AU2nYuvAsM1pJOA8%S z4%;YFV0SNNOu?wBV@HgeR5%&2jhsJf6wK}UKh@v^oL|j{O+J1J^Tj{dg;qUniYQ|s zW%T5UwE5|eRalZg5rOdWECt`uOU8|wTE-7-KY#nZzQ=S#5pnlB;CoEOS8RJ5<+(La zee!#yrZ@i2@nnYK&hG(v*qNT)_<-=5&%uhE4B}7kEu_csM5f300h=DjzHA(b#x(FJ z6tr2tDbTG4#dDekY0p>HtRPFx<9=- zc%b1U6Vt=fUo^d?kZl}@fp3tW|Iy0&{Rw{l^ji7S<8!Vp-z|`B9Ef<5#qs(atau~* z{OP45J)S3)4^PD|#tMd%UHur!U z=JBv)#x~b`gNi!1re#D`gij6}1(o&TZ9Frv%{5=T{5oqewz>F{(gG^$g!d4Br#Ug^ z?WKFTzWuNtZ|prgpvMXC{i7<1#{T1%*au_Z#_u|v#S_Ht;s7yE93~cs6U0(+o_LA4 zSX?dMD&8gDEArZ6IUW<=5_gKEp{Mr-KL4hk!Zku!~rDYoi5#smqRa* zK3@K2Py+GJlYXgazTY7I2c@Gp2aMAsN@qJ^IU-^!v7MMIo-FcuV)%aIsp1gv4DnoX zvN%ngDb5#7y(7J=q%RTIi0j0^h z1mieLeR0ARu$~Q@e_$48p%{6q5vj`CqLcAYfbgFyJ z6u4I57lKfanjEmfni=-lfl$wy?;AB#h2Kj;y`+Y#{J?awq+)dHaeDWz`3XW-b@(l( z^61pla5JM*6e0+g$o!n+m>t`2A~SHhybqC0G?5uNU8%Cg;R1u&jcO31Q~bE%9KY6R z-ssee2=0werBxoC;=v_3{Lbk-z*L-MB6&XlZNNV`{V_Ua>Vf}wUH&mTm6Mu1ZbDf> z$+$^lvt|Cf^uO?z1ODqKKAY!>DQU<3s@cznADuF0zs*$6Kjt6*R+j2MMi%`&J#}xQJ zXPyD&PP-3GpJN^j!<{s&{l%f;IpS!sSe!1-7OxN&i`R*Etm+== z)|UN~(w`Gw7XKlBAv$PWEMJm%lxXH0!#zW~o!e=~s&GAM2G%Ejo5ZqXeOWv9T-uhGHm3V^?p(^T=aY%+EQF*_p8`X5bsUVg`pDyK2v< zhZ(y%Xl9i+c6Bq;`(y0N+`s>rS%tQMzhCyM{>RwWLB9ifnCFYmY5&QwD>JR-kFl%Y zYV67zweo(R^S}|OLrgw0lZm3CIIAeST>j@wraJV%(!s+zm|}$j`4+7okfmK_{!2%k ze%a-2ek=08X?0$)(6;}Lv8&kd)WL^qN3n3o|LaTP`Ml|02j2v`-I_u8@0(}Emhs2f zl|4tekD2X{v8zAEuGkQ6#E#d}==R6hl~)zKPVm+c-ToN6idF^2{y3@`+kU@!R_NPt zd;M2qSLpnI^RcVL&9fSWD&d&XIpQB*v8%M> z((%*j+>Si&D!rw-E~D%J8ek4%hfntmT)IBAAhftgQO(6k%i@*<7dOpLHrAu#=8bB$ zG<;D}{LSeENvamtIvhbo{da$Fji_$l` zivLjjr{X5Xy=x*zpo|VZKaSLIxX0bo@Lu-o)^0(sM&5VT8fQ;r=fq|wZTH20fcU5%lNn78T^G5ytTTbdvIjw3UCwS|k ztK1X3)r)pFzAJlO*3}KxWUaj>=58%?nrwD=#v(W#UVE&N9UI&a9xGx4{lV_>9^xZN z-}zkD+O5vvMa_z`*EQPVc`2JCz4B0Z$Ue$F;p68TX+7-Nh9AA1he5~Snd-Y|Q6={# z&ea+4yfDHJv+>%4_WUS688K6D3LeK$oO00=7=m_1UZ1OCd+p6|K_q%IV@6^4(CaXj zJdxB}knD3qRIktX8RJLWGiEq*_5GoVN&Nw1PDa=}vzjrnC`Us5dJyJ~W(9nT_v3^4 zPes4qlDBr>%**S@5edH#CHS3|F!%!odtSj{4*vpuqo2wZUQlUcd>=#Cu`+&hlmU(F z??6RQm~5^HV$h4e{Tg@81(b>34cE{A(@v0^6Stnw~SYWCt14?a51bxm9={U)0~SDPv^G73DN-Ov;_tM-0q2N*kqDDN%kiB7|Ge_ zEw>LvH$qe+u7BX33?m(fUD~KC{sQtPlAHw`kTfrDG(Ew*2_X)HI_?1Waz5_RjZzcj zT#`Hn?m!l_0c4I@Abb!N#c8N$qe7;h!qnfBq*^^7kAj#Svq1P@)_FldVtsBy9*<$& z94-)UC~oSM!v(?(H7X5)e#si2O1Y1auUrt``dlT>)a-iY;3<(ibyd=SU zHF;+zcnx`>;jIV0O!%q6bncTsLyl$~P>JGwt=ZiO9Ld0q z2n;}gM!L@7JiSr--hh7auO~{`%u+UiFQ~mCxyg&uco6tbgU{qyV|w}p@_v%wHDm@a z?Z%V9Hx0g5g7+2jc1L0$*N_7Z?`-hRg`bq*{X2QNlS{yB$XVn)f-U8+;!=3GzIzk0 zn5M2ls%h%o46v!cN1(Z7watA734CMYu7F3HCLCezNA2+jbEG)~0=j@70gX9_`epck zCAg0?+(VGs!f*$)(>xQWFK0&wGTR%j@d=p$J%=)Jx68$KbQJG&2c9P^gLYg!et0qZ zXxMx`#hS0DhRxSwwawSla^1k1ohIh-`r)PLjSYPLrbtg3zhezZW7BTZ?6UKQ$aLL- zjhH>FB`nlC* zVL6CZ^cUhVV-@`!4g*Wzxr#oKcY2e+!)#qH0+{|xU^-3iOZYraI9|W7&nHZS_neg* z7BMi>5akQ28HgimDpOLrHm@eZ@(imjIFSnOgo`5tbAAF(PGq=o5d(ZcBc4EECY}MV z(TI3L&=~L|Z^E@g2v+`tVJ0||Kvt}tJpw`F7{?Z5sKQr73fmMOU2PkchQ-Mh#ilJ! zaOO8x^tFiMbR87+KHyXMMotCH%qVBJ`ESwZ=;qbDlX9v8_$C5)Z6o*|0QF(eb`FAw zGj1aOS(77cRqounqHSdlOH_6*7FM3moj{VU{9bHi;j0Ylz&5cl2)08dS#`E+e%-=( zKW2l#cPn83jX|0@5D_P@x)fnP3RAITi0N+;xX}G-sh@N41Q*0{=I|qYf_vSpTNZJT<4n!TDp` z*23>?$y*?E!;`R@F>g443KS zvgIILDFJ3W5_=4+g!uvM0wSw~18zAvr=y=Kek5U#2@WNUfcKnp7gaMbDTpUbhsU!1 zB`MtwuV%Q?Bn>BUMK$a(u&9~=HY{|zVC#50s^?sbhj8FX^NLP!My&QnuJ##@qkbvQ z8LRy>SNja}^(4hXV##WM4Z^IyO=tLZLkIcaLYUoZ-^-EBaabKePyhEAlGZ3miuOm|# z2C`9-X$u3qlt5HfGcZ3O7FIKG5N!$ST*}9PJ9C^DL_+;vs{yP~lrJi+V+`I8?>eIh ztR{}k1B-ZgAB0CdVKY4TCs|m{0L3Fd**jD;7{}h>!3u<@Cy(2i_H=QbGuiPQ;jv8! z;bnNwnIG=>GuW1(5$A;)L6cPDvhm*r9=9R_Z&cjz#-!md2cA{I4dqK5ub}NX-5B8I zf>*9Ji5D{7k<2-pyfu~dLmcl(W&;xj&Va`?MHnB%&#&gqiCu-0*Y=n>D^Q4WY$pYA ze-iSR8(!AiI37>VlY>|S>*ez`FNGoIjX1LxTIL+|+X(oGvv7VD@X8=uMdT4ce5K_L zy|>tUp$wZk5dpp86g3wl@7bZ(nFGGd*%ElshF>kh@i!ZpBM5b`WoBCp|INJ$+JZMj>TdW@ z`83=BzdGEA6JF|}gM;&#D+{by*R;5 z8!|zOh*uwTo_T#-FQdS#hrE)|8pXYH<6c&LFn4X5Wqu6` zPH&wzqkT3E1jD?D|6cQ4@H}6i{P$GkdY8Dl-bV|UcvrYfrsQ>N->X&U&Zp#g^Um<< z#l5+?UV}khI!tMi=iRrk()*no2gbeE-9blqH(-~i*WLIL-KJrar^Bv2Yk>C_s`l&i z3nCs?M=-neU_%{l*3;EFw|h5O2XoF~_k0Ax8{zE7rdFF48B=YOXUv#kCk=NX!5D5Q zb8$HB+nx$rQ8}6WB7M!-l)=emTEa${ZG{}O0TWWxU8b>nFUgm*V6QbT)NCr0n2x&l z#cj1l65JEI-eD8!?+31aw!r99S)8YPB;muB42K2#3qv*vWC?nL)WM&z3tclm|g)^5NiPK+cw10Xi)2wG;S$9>_x#67nuZ z*ycgdxd`&wF(7BtmVpk-+W~obh-1I-8npFWkFd>ypmP`GanA+oY#Nm_VR`X_pkFBu z%}&U>6=CLKS#*EIJeJGq$Yc6_@L|5OE%$Bry-|Ds9JDTo zv(C!1w8e1zH(~e9dL^Chy&&elX)h_>GxoWcRPge&?`g8UZ^Q96@>SLz?8SVT-OyJ! zKzOR~EFouBk#D;2Tp^WKjQ@dfh49D1>xH)n?-f2Id`kF&@D<^^!ViW268boKSYCZ$ zLt#^4YoWFC9whoq;S}LKA#HUjZ?(|uc>vn1KnKjhG2xs~e#{fi#4nuqW)B>o+1m+x zCo&zh(PM%hEP5yr^k~szMNboL_P#;-d7?SuPJW&Xl=nl?SBYLP`exC$i#B`Qfd7}G zA6NPd!WR|)y6Cq>?-b1ondM~(j}&$g<`GdZvqug1`iM3Y&_JIi`V8?;7FG(+BclJ# z7cL`0-U_9gy=XvJi@r&GKM~$bMEZkDe^m7El>VIXCB?ry-W1RMAXCXJ(Ggl z1?6TF!QWW)QKH)t!QWokRp|vv?<@Kg(L;&gA1O3@&OrVYrOzOOo+tVO@tM76FxABD zHG_Iwqja;!4CvcQBmL*%|CR7@BIG?w1m6py|0a5$d&+?S6Q!HIWI(5(&gS?N;Ts8? z6On#25%N2TK2G!rMEE|!0YvZ*BZ7aFXtS3L=ySw3OSnjU7YkPkuT=V4;myL^g!d6q z&cj5=eN6PTqW?gIe^F@mk^%pFO5aHY{h87^Plo)dM8r2FLT*#htwiHCWcbj12KnB> ze0&}fn+cl>+X~wY`FtcFZ`#CSA>R#2bNrWR*C3rN`W)eG;anjnuaN%-!sSA9A4dE& zqOTL)CcIPln2@v4DCb$>^TNLhUlqP3+#=j1{7CqjkQ#c* zSA;I_mq@3Qi`YikPI!vY?D2>6(?xT>H2KE~%Y^2Bk9dyAF#Qstx$lF%Li8FT=f0B9 z-1mX^iT=6J-1iaxl<40J&2s?p=Kc?SOYyseb}zHfL_@D-%4s09dzl%9F!I|y%sMH( zi_q>})=#u~K7jvJ(WSz%!WqJIh4Y1+ddPP2J)8I=;d}IC-6x#c4f6=E1hX_v>o+TVFlg;*id+c@F?NY!efP; z)X(;wC@dBZ5)K!R5{?y46wVNyE1WN^5?(00M7Te}PX z!WV=u311PuE!--k*#g`9nJ^9SJft&(IYREE!1$KJw!)6WJmK-e6NN=W?wi2;G>jmQ z7ETgQ6P_!aBdiiG7G5O0On8NGjj&qCHSJi=9m2bXw8UWiW5TC}&kAXp!SvUK?+UjG zKNNl<^y&rtslsewj_^ofOJT0CtMCM2A7Qa@kZ`zgl<;ifc;Pw1S;D!(1wz`EusuH# zUL{;7q_GLp?-c%2_zU4MMo7XDMXOGq0P@}~+jg$;!?T48!y;Q--a z;W@%t!d1d6g%1fI71GXy@;(&)OX%W7o$<79A?65a;6nNsA#GYn_Y%^mh4iUH+Od$H zE2JR{=}UyPT_Js^kj5*d9~HhVd`(FE6{ce^K7%x4A>C5gPS{bHFYGC#wF~(N3&#s5 z2^R{N2-gcY2sa6z5Yh~W^8O;ExHy!A$`B_SHeexG9*KC{;TX_~Nk5i4^@eyuLamuR0kMz6T)+}v>51Zqs zVRKx6^$kwF)miHrtju1KzAEx#Z*^o{>{{5Mo)TGoWU;?4ZwkUk_^X%haaup0)o)Ax z$dXU4+qHO)=MLGjdBLD9ed}HN${`CZJL%1=qAe%+OFvom!O)uQ z<^5{1OG|3f2M?=Be`fg}fAUj%qPKsLb<&oTqZfjIX^4M0_|w6k4*nSUV+Z2@bZAWs z{IO?BYW%8UHU9Kvds0#QQ+v{H4{C73u8TtQmwh-iu*IGJ@J=_=*_rJ;z9;4O$j
    6_B5_%BVDeX`{JGiv;E27}ivcmnVHfPFj zU|sC*ao>NVsk6sx?XJCXkK<-+(B6xr!V`fjZseItuD$FMf`U^5)DG;V%Z#=5Mv z-qs~f=DKTQ@y!|Q+82AMIa=WjugQjmaW*WC(}C&0y)BQkVR@V#dH1=DwH@5Ui!xR< zE6Oys$Elk$*808Be@CFako7TJbkp0}Yn@dMuK8O{Y{i_nokz@G!{)U0-5&v6Dnxl6 z$4zAN54OlO=uFxo$9RRgDQWxwbYq-1hD97XN#5tTxYyxq_Cz+UvW-#H6ky4<~|oXI{aWSd=@C`22?VTMkEzU(8^~G6uIY*ok9jycfXK_!9iX zHu^NgqasET9P|GUX|OLYC&c`JAuY<;bg(JD8SK&H8L`3T$WV&E1^=)q9+bryeX+yQ zpy*(`7fFman&_!nMh^p4g8OpFVFCnZT}m1u127#WoY~>#5@pW zWN90b>2YSPqSD2b_Bk`MG`{vXwG5`jo`_M2&mus*p}X)YTjD85H6`-BzNuv}B`ysz zvcw(8w3`_(b2wyCm zCM@v|_`8|$VJhKGua0L%miQzyS_V_%OD1D8miRFICT4uZl(vnTc-G|L9k8iQG^KSz z3|xx88YLXY+t7E(;5Tgcn!ex7tutzy@WS#tv70q7$E0O$1Y~xS#AOX4v@LeSx^}x5 zLkaA5a{{~F#1#Q>F_Z4*szF!1%{}os%D@GvIge3`OT|Iusp+R3r?hhJK=c!Vb(c; znULYeMGUlnM?4{@bRDBy4yItPHG%206G70p)A7&h!SD^H!}-l^RU=NteAe{xL|V`0 zobT~CJVf!CYOW1u_+|uOfk!OiLlZ0^G&E(MXBx+HL({z>#Z14USt=hBUrLsF;w24D z!m`GKxD+1t6$I8k;>@YysQFta`t&UT4tm2H?Qnp(7dfSbUhpu5nLik4ZWzw#glR!^ z)wMu#RXf87Pn+n4RS;(!JCYp~HUlK>qv0veS*!igt9^!fkgV~YJ=iwg2*O`FeCU`_ zG>;ik$9=sy?i^G%W{C{M;nBlZCQgp^9NaRF6}b~0k#{U&U?ytsI%gAjC_QJPYmUQO zL#(`Y5d+V_qaz7C$evT_Rv(R0X!nQnWk5>Tw$%*xG$oHDl$hX90!M6&nI!`=gLnd8 z6-{oKSu(uPBn>Alg*WYCfDKW5f&)H`5S&LNOsnw6E*T4thOJq|z(hmfGGkzsA?8$t zYyr=$GPZy>A_dkJgquxp7(rdM#&i)+6wjGmSrfTd*o;m1jLeP&3tBe&KFBinKp+O7JOtx?+3N`MFTga2#!wFu^0GkV=O~S#q zuRPqo%5eMUoAw2#2O7)3K{S@v1+FbZ(AcVQV@vHN;5p~{)dy~QaMxUU_o7Q7?|LJ8 zB;jFr({2V{4C0g0IQVNEJCFAOoF4ZZ5j-4R&YSpz$#w=IsOkK0P0!%b2`<+2os`ze z$}+okyihaYaRLx{a^gZAV3QjnaCDGNU~O=GzW9jNI%jzpaSc^f+Y{BCc05&i9|)`q z^#oy6%~ilFG`J#52!$rTqOzKS0Rb_;ngL#<#_o`Tv*B^I5vBz3<<-1egR8K__HCj_ zd#0M&p+3g34lEOWP{hm&6ecc%$7Nr{uC)A<5LgJGgB1p7h*NIe}x~Woe z7Nn$*%`z~NN4FU+0F$s62NI2AK?nPkQx@~Uz7qs`#WohfaB5KXpwfXQk*yh1ShJ>1 zqDr+H!eZErI?pSc%%rtJGJ$771gC>N8}PKM;>o~jqHkepn%~^km3)Xc?q~Ra9Uk^@ zriZI)^>e`EIOKX9KGaH*=EEY{a7G2P0xA1$7rEXtvUs)|_dNdJgU1y>;H?DpFDLTG ziSSrN8@C1jHSjr3P)2Ze*v@52J>+Pt)bh$&XN8e~KMJW+car9-CD|NC1w{pg)NW3) zC>2sW8F`JP5WQ0<1{w*w_{GTP2&%P}q1H~ctcN4L9sIsq%M`wyBw9PaR%`8xOA|bt zOhS3>^l%|{noiPuQ6+nWQ9)Jq)f-IdWvZe=_T3v4!fN3uU~9+MDq9oA@otV}8^!17 zczAn$&Z~8PGG!WkW1Q`#iM5l%Lh3Y!WKdM%y0uX`P9SC9O&}MGh4H^Fo!6QzigAJ5 z#Mym4qV9*!fz{#Ow=$+|f=3ffs_s|zjAqi)@J*bBK@01o+j3dR-SD9+lw|N8k!T_x ziImpZ-WK=WMzXPBJiBc9Fz!yYk#T^;pMTc|5r!U*f1cs? z&N~-jKFq_e7C$r|kwb=(fwg7njByjDOr817SY5*4t@Fr=ve^}#&w*KI#f+&FIv35F zFlR>D%*u++mHHD>zM@ngDn$?MX!%a|^mC(Scy#iKe8 z8#i&>>@mZ;o;-L=$(-pGWfR8~%_=XSUN)NPXc`wNULuU|On zST8+}32Cltt-NF~7nt}ZZNt88)5!l_>%1{zhW0Hg(iXRYsa|c9MVYMbZFU)0b_S-5 zi7dwC)0p}hlh1_JX42wS){=W$e})Y>6K0XM1Sid7Yeff!g0ssi=1i}YO)gqBd}P0b z5oT?Z&xCDi(zei8AttRdL-vS?9YOXo0_AQMx%<7D>|>AYy*3^R7DZVZ(oDN2Qcmr;JF%u3f9?jixFW4j%-3( z=uaS|323rY9_z&yTbl<#hx77Ah9YcmN*%sU5I!sz)nK-S489A7%YCsuBEZLTS)MJI zFL8Ar*9p3EbqQLeDzx# zoNZ(k_y!}dbu5?eLHKa}@=(8Q#Ib%k4q;TM9AMm2kO$U;vwhJ3F`;TZpM&pj z39e+Hkw0|$I_p~>oNeSYZ4TK+21h2@sh&AfVVXxF={$Um9to0t&S%BGZ6m*63lTg? zDUJ8MZ_+k$2<740A0ZqkoFwG6&2*{^h!+ZZEt9@V$ZL`GEy8<+4+)&lTHBYL7}s%R;{LiG8fsqAI^I^j=* z#zqG5w7aLgClvo%(SH>ElIS-@ZzH1p##WL8^SDt^zL`P<%p}bre8tzbkvUHB#x@50 z{YgXK$-)w)j}|>fI8*WSgw`fzvC=P5{1u|t2#rk)%DG$VKUMrMgvLe&>2+;mUK9Vj z!n(FHdla97n=9*IPk0y+@>&UxQG5qszT*3c?k^ms_|d|#inlg4##Rz?=PRDe#IxMX z#BXgSuU5RVnMC@{O20?(KNT8V9JX8O&nx~vNm< z)}oIQc2~Ty(Luf<#Ty$*goi4&zkjPEX_j+k_@aFB4Q zknfR9FBOgz*0oKXt$2<+l7FFaiI8(`82@A8HNxwJw+inN-Y5LI@L?fUos?tl*T82* zb9x)&&74BuyP~%VcMEHTe6b-v$2f`gg;_$5*)jfbVM}3KVJBf1p&3d8e}U*CAqVd$ zXNYjPkdy8hKUp|W_T`8Z3D`R^0{QuwgY-0zY8wCERve-^$bH1~b* zamFU){ZnY}`=EW@M>B-hMzWdc=EAnZ_QI~h?!ps=d|zfcgM_CE&k~+3EE7%@mJ5xI zJ@TI~`U2s_!sSBye6Ti@Hz?lPP@3lj-{(3Tf!|uV{?!6 zk3{pOoczA9uI*(r#WxqW7TV`Yo@nztft(XX8ykGkgG8Su93?c*7o?9DJxMrA$SHuV z*8<@}p|QzF{3W7S39l5|=goDZZxwQ8Amv#b{YOMw8_;J&|55lCp|uHpOY}D3PGODk zQ=x}4SWc=iTbLs}QfO^Rj}@IO>>;!^{B@sC)`oPr`075VCM(`NuMnOs+S-&F+kV9T zK=GFfFBe`VTqnFg>aMb3E}UA&k0`=TAR{;h_*JRoP0}pp9-V+Fd%Jh zN*jo7ENm`}3)>5=jVae|V*Z}OBH;ibXZJF_R5(F6S;*(!kI=`QW7an&Y#?kbY$0qVY%lC2>@Msj z>?=G;I81oDu&ym?h2rN47YTnL`K^|El;`h1RC?pQ1Ty zoANxoOA@WkW_!_`y3P0kAt!5-9wMx3i^&<=Outz8BjIY{I-#|}kB!Rn{*3dPho+OGrXBTLCE>tq^%9)`Jyina@{kg|4_&o-=wb-{z~|W z@Fn3ZLVn|sKSjuC;iL}}aw0hCj>2N$AR*_6GyPoQd|{Q4v&EUdLdf~yq;C+`wRPmQ zai+f`BEJbElzrpaItWyuv&P7kdw;E|63ua zl#_l%$cf~ncM3V5oOCncQNq?j&Ms$q4`FX%KOt^QU&_|bei!BF`yeiCBQ*L4lxNaI zws#y+nLeXp%%pBzb7ysiZC&>+U5@MCBd>e@zHRS%cFWI;8+TyayFw}}p}G$A>`B`@ z|KgLTY=*7V=51cD3-9)KE-rL?Mz=1GWv%h9i2N8kPHw;wc{`q6d~+<%jc#=^|5j75 zaX^u~!r$Sg!m_OX0Qgt8ja|UqIUiUY-I?vD!N%;q;+$=Muk3C9pb^`=LD}29vqo%- zoRz&TGHt{*cUtx~cflLm{RO|;>DKp=gH~y8ZohEBKejJh@YeQ=7QDv&F7K`^KKY)W z#k=2gr~T?ZcY)iJDIY!e2EzBk&)YtE!4}};?Khz8d7EpMd{)UeAEkNIN>Cz8`^WZU z&I*@SxGjbnrJi-u_FJYo+ft|HY)hH;*7jqj6#_?Wi%z?F`z;HcZP5iUKIg94Ra{U! zFw0r(tk-%Eb_tu@+;&RxlMb_mN(_Rg2 zq`g`xtpZ`M222OWfH9yC^h@2I;FP^uWNkOtt3_5dFKQ6%l(}|9V5@cncgl>KoiYa$ z-(Gz0+rKUDSbWagk@dfRn+Ml?-!S0#?j`tlU&RNP*`m%wCjVfT_87l4+}Q2>B#T6+ zf%2*t)nOpmV3xLq34ZiWCYZHq`i^IUpSp|*v8egBilsJ3x}Vs7^LeCs{Ce_Q_6E0i z6N8;b1sRRGmm3?4I9Qx*H1hpMOpE!{m_;Wb%D>6I8&N6#!}w3l_8-k^jMy0GKl_hm zT}W>1V+nBl$FrU`q#xrNYyPiA#?ofYar`H;C?L`rCTA;{_sOiypzFDKB0DZk?t;0j zME4Xh)Q1t+Z44A4CjIvaxVKY$8A)UHbqC2?N%C{s{XddhNzNd7CrN(ar=QNecdY<< zK1kd_K;FYtesyQEs_wlc-7_<~k@Y^46QQi~`Hp)(De5D$%Eya(2UIrN<#y4EP@)mj9*aZ&q@B6%O%zc@VxHsvf@}|h zzyTPFLK?914{T`@-cQd@?z8t5w$@ATmB(jrz5UwKKrd#fPrD~h);?@d{V@4o1J(xJSH?7d>mnH{6h%DEeOO>4&syI5T6ux z7T6PxJP_v-gN|M4+r(A~6v79a-}nrkVI+?%1xz==5rj&3Ox>=mW}qq{=9}%jmIg#s zH3O^Q(MrPlAili%dIVTDW*ifqGQp7q)x?G!hWDKB zS5-3*^v>u|Ly*U~4fwwU9=QlX8OW6^V>IP|0*}3P%BvapEFi{KGeD&$QYKb2&?F$H zR5Q>jAf{KdWz3L4Tf3SPGAN6V||^ zwXW&28%_KuLNGDCgb*~X+^tUb+39TB`-XcoA*eB=u*MxtJw_3zs6~|sLAS!drxe85 z@KNmi2Kyccc?Mu6EP-bgE_=e|@aUjL)eP{gLOkJScxHxq4}-Uvl;MQ?;f;9@1Hn0H zu0ZxqXn!yEVVobD=yAeL( ztQbOk+=MHtHX$3cTRub^XAh{2--uXtH1pdIk2njeSPRNv*jB^lF@o?{R~GL|4;ops ztB65eX3sy^{4Ag6AM27VAN4{UyPBO?R zr4unlwA0jyWu5YK^K-j)>YhJ-YGrBJgy~buE6PgomCy-$W^~Fw-UMgPnpxJVY~1*% zrBnZBC&k*2q6s)-oxQdRiG;QZ!3z+-qO?tjIeby1;}W>bb@PvC*`>Xg9mk#@-i-JW zM|p?k{?^MJbRFh_p4?$t=g!`O+@rm;f-Wbw?tpzdx}MU-OV6EmY8TFG?J%{=)Tv(O zB+NI(1lKMTz;Oqrk-my~qt`7O;sk3Hwswgv9fw+m|D#wNC z8JML#ZgN?t>18t~S57%GFX&G*m$CdL?DkMT1Y4b#_n%cZX;Ou=-+83_m_eGD-f8A# z?svv$f{n9IzrtM1S%bv1 zO=umG8)O{ZWYGV>CKyoZ>~{|g-jlz0p6AJ#JtHsJEijzE-63oo@12g@5y5ExS+lWc zMW<8qos^8!Q_~{#QX2X>ZezEp*UUZ4J={IQYk_I=PHx3{Gb+c82UgAwaEc9a%L^x$ zXR4DszM{g(P3(c8qkU-a3v@J`eViVHa10(dZsP*|ln8+3lfKZEU)x}W&O zX2zIDnI}LHW99V*33YJ7aem@ENNj=_egIP*>vbBu&4ZxBF}@ENkh5uHLEA8sN+5*e zKi1hazE_3I9Sr?UHnb8fm*v@VXCZ9!An0(Nx;O)JHtihHVR@zT$fzXY;QxP+4lY# zVVtAo0ORr-9NhfQbHMjUn+eFe(Gf$*C^o3NL#kC5jh^HGgLJVRI}oGz>o zULag1Tq(R(c$4rB;eEni3Lg=^Bz#v`BjiUr>(N?xEHN7BHHlqG` zv5UkVZF*`kjUn)#qe=VE8%D;Aln)4HMQ_)8VbA?@n93No5fkLiJL3)Jnd%|%-j_xqs%wq=56K&_a zEfsyS@JGVc!u7%p!dry53-1;FO!$!SQK6j&_pE3${~7i8i)fB;uzv3ecL_fd^1;h= zJ0GsTXtRe5;=k;CxIW5n=SL3~ZRSTqo}CvxLGjasW}YdQUlhJ9d{g+2 z(7gA=g7+=fhmMHuF}OkZyByMZNZRKk))Ma4Bc5~zn$M8m{ov;_l;U{}mzd9R7`~ut zeww;|$ym%`C~^y;#py-v;*{zZ#n(H{ik+69fArbsGspgOY|TT?BYfw>tp(0^=i%Sw ziv~xA>pF~+n|qua8^bJ-DDSM^dkoug@)acf=#@IZjT4 z6>k>*f^l+g!jc##=j`UFkFojF5Wv{Dd7JTlGbudgS0gfIIQ}qFelO~q>TkqE%AWyGq_v+m3M?2Y56D=(V5FP^I8vT6pLw6mdLDFr*9>bP5B^|e zkLdCNnU0b2UJS$$lfmNL6D~xMAJiF??-o$}IV9n+dMe2q;WIgi-FqWKk(EvsCuzHV zRv609jst&&%njUOex=j3O#^qRo7ccCiOfYps?Vl1bpJu=*CWDp8xb1u;5Ax@KSVWf z+h#VZ?`0m5IWh%O+-#h+5e-J;-Ot5tPOg$2*AhR!7;-Y0;P<(?+m$-OK zUD*%O4THjtNgvoKKfNFwoe*_cU*piPIJ?g`XZX=Um=|Qi9gYwNeh5s)*kmFJ0lw2> zc$sh%JQf8sNKTGj53NQZ;V2i&q7W!9;*`gT$`~WsjKgYWWC{jcEkkHf%e+$~mBm>{ z8DSTuAHX>gan|tv(AdkrV?mNYM?AIC%u4$@12BEuc-xcOc?;q#x{q!hi6npmH{KvGPWNws{bA^6<)$5{j@v z>a%Q^e6&Z~#DJVlD+3)aw;2?xn-Rxy8E?y-kFd>ypi={RaR%gU8ueyjdGA0TK1+-| zyz3?8U52pDgP_CjU-DUJ(=I|pSYAy?9^Y|o{jNdS=An#sNZ@=E>uivEy0E+$)Yta7 zq01BUeu6Ob@O+@-ciGSRdMC#;`ul~JZyki4D;|R7dsJbYl#WXDv;>gtpnC{DT)%A8 z&-NeRGHrXGMHq*m9AF&x;Ob!sAj_pgcabmQz7M`v5>%3p{GsMKMR;#7L?quYQ3X>j z>%qE(eF499;HV8!qZ{+#qUt5=BOELoE<8iXdk6Wa3oC>d2$u<03e8vv_-_$? zr|_r32ZfIcUlwi^ej;p!lZoZF6?P=z`pgsN6LF#z3r`_}f28QML{AhwRdj`DGd2SL z)ubWUeCL3s3+rC^Za|vn0WmIYBjhn&lH{`oF(Mg-c>+?UcV^`I3E-GOao z9@vL&snfeV`Ucu141X1*812$SA2(YZyXL6k@d*vnysi}w>u3_p2A_MKyhglQ=?Nb^p zQT&gxZZ>4LlR|S5zb5M)(AcyB|1O7zk~ezy4Ukku^c7E&K%lu<0s?fW`N zp2X(bar=?vIcbzp{Y~LeMpclt$dtX(&tg^FlL9K1eKfc^q7$g5x+GOo^N^70v)v8d zpEAn>h=6K}&}a$&?!h0T4ymS0Kj3%*shT44fsHVq?Fko02&yRplS67DQ0B^kYN{22 zZQ&zWq?<_2y;V~!5DV25Ar4Q~6j2#t;f%FaQ%r$s$}+glC`1^yFVz$a54$jJhN};$ zrv80vSB{&B^@Jxn|GTTeqBqA>YC3d6 z7i6?n2c@JcpH)#ge9F{GmEV}M>FcPyf|D_Mw%AosamGN&W=^Gp(`9{u2FuQBKKR93 zzjdV*?uvXj{TvSC7FC()8D^f0y;<@`*$;ZFr749MMhlnug%^2+7yrlgR=lipsnVKQ zHh#`z%#EHj3$uAmc-;8$v&-g&Q>V|G5GKdX9yfDx8K(Ru^Y0zQHN>q%%o%oaC(N3` z6~@E4Ce0o<15AB~otitYvU2v+@pCF6_Di_$lHMvmRBt}^={mxjcSA$L4jvyb{5t0M zEP3cjp8}7YdcsXXC>3vN*4ea^5fPTx9P;=gO?fHsRvw?^HV=XhM_>;|Z#4(XhE2>M zXJwRu4wricUQ;(Cj^#4mmOCF|n+HLs2NL28$l0_?&|!HK8z%KG^^s=fU52pDLlK;3 zfhH%MO}hv&VR@Ayd3+tV^6KiXCL`ftD+GKtSXXbg6!PqGqjti|`-$@80qNS}Akd`R zI?AKJUugMuL)f{NNonMJRAHMm1&!)y2_Va*tE;zK9%^qRq}%${)mv?VydFkE@W(Rg za5!t}nf?sES4>LqXZeVs<~bV|vxw`v7h--OqHvJVOgD*2Uj;mq@i_m_5tfT@foQHeK)GhFCHOc1MS6|W zY1c~H>am_64Y^wtkLuOZ`}}{b*Xr?Y>b1girqYX2i`~V+e5oUgQ?BKlso1*n$9^{U zgmIiVwU<8Y1l;v_ldS7%>$7Sru?B)!>x%@6u0Ep~qoqdnrO#@OQueLS3Y1vAk>6_w zCa+@&gEukQX}pn|$~7eSq0gcY%j&bJ+w#}B)Eg!AS#7eD`mCd~S5Q{#;92S)ll{6O zrO#?7GSFwW&#tAQRD^0cHajdJ)YJxcEvj|KM>5@R1VJ+yhr~%_ds0eo2 zB9e1&eO3-)q0b^v9Q9d5Wi(T*Y{uI9EOKb7RZxe-bgzBsv&a&5VcJZCKcvt4HuPC` z!8|yLv4%8_C(%wnqOU zy;idCtyT*CZ#MuspjPT@X~oPbZFGA7(|Rr5Fu!~Av3Qw<^iqfPTILyd4F0LVuyaZB zO>FWHZ*0cp;h$mZlIX}s9hP-g|L|4yT4N#To78J@QvSi{wPt+7dacgrh`8+(pzXg( zgz-t3a0jc`8UlIQiCjr}UsbO)2J-mbX`Kxo(rX>kYkimIWAPbs5PGdT8xkc)LvgcD z=(YHg|4rz%_BS7EDCASGb4afh^ur;&7Wx5tJ$|UxnXh&Hm(gn--?c|~GhOQ-=4(x1 zVIf<ux{^^T7&PBAMUbEV@q z7C#hg=jJ2E$*kTsYf!M>v9lr->m6rzzrHv&g)1Jvz5VS$JFy1v+uLs$^y;?B3!F~Q zj>i^b+)jV<6}p_V+G<~IavD`s}P@+gO!L&u=a5dRwI6Wdn>c{G1ooj`p0i< zkJeiI*g3%3$C+!m`f=sc_949+@ki+&C9dy8-l;w21UBWt6q|yo?Ec^e!ft2|m`|^E@WRqNkHNmij!XTV?YAjtt>b8jN~Imsy$c{9m=2&GSC z>MhiCJ_3?e!z#^8eHCOT+u`0u5{o8Nbs4P9%o5C^$!2Nhp?H}!izXY2Q}4~9$^U2C zi$#;!RqmZEg68NMcTkL3rukx$)By+NMYwroumceB3;`8`@^{IhjbJY}Uu9_M)SH%Gio2$}# zmCGDk>(%|5tN#0zRz`bqQo-9Pfc&09xD9a!x&z^!#N9!-4biNPfq1Ya9LI*BRweK% z#>%XOV}n>ikZI)z1QTu&LeRDnIA&$mS!Q54JmOgvZxSY+0m?vpB0mBz!$Sv42t;6= zWd>lF%Xo_T1m3K(%s?PwSXji1M#OMJAOhqn8N*JQeWH4qN7T5Z@qY$9 zjt5~GSg_Xfm4F*fa0G$Zomr8Yf%^kuel-J}i=_Y;@VWJ6+AOt;uWu)y1 zgt^W)BA(|y3L@}J!mJz308cE$6JCMWy3q{sG{cobcn{vJ8_fXwRd*D2LCDO%D_X(R z8YihwoM|{q2@BxOV$sQ?Qkv|*T3tQfNLVqDH`L%xu!2Lo#@PE0&g?2;P}AA-4>mt*$4)dgRTUWiqWtVZ@-QEp5au^wq|=daCOqSatZT$M zH_?j>Bg(ku_(yZ$eDlvgwm)R$Pe84+RTbpPE?K zx?ZrX^$l3o`fY60e)XbUZx3)z+^ZjN?ahvN_A+wkCfB&$hBdCA;2PKcbG@v%H!wGn zl3dau82BoiSvGs}d57l7clt)xcL*(TJ$&|rfBVAL`&o`5yf(ERRkY{#S6vL-=EwD6 z*6u#wfTS5t{1R(kfB9+iwVGCIsqFv2gnEAP@YU4Lr|%iMoAYM=#cN;p#oE^&{O8ub zwg>mnIAr3e;aP9oG5C+cA7~u1BY2o61)eS+KKu~3kNT4lZ)KCO5a-6)(8J%R^+#HG zT<(g)pfmv=Cl*1^VO||rFMfX7JP0~3p&-5(S!dJA5MjeidkR9%p|(TLri}v~F84+l zER01#ESKf69mGm_n+HLM`}D;bkh5v!pu_U~Ho>?d<<*0?@-9Ny=0VUI4td!O$l0_X zfDX&c3CZI%XytL-(B`3t36MuUmvuJn$A}2aYXf;~AM2M1Z{^*DF!SWW)7_5w;alp+ zWBT3jVZI+X-1oeB&JDJ8KoHBB?RyREUmz`9zmB2yLUf{jPa}+Tl-+II2*~SU37{>D zQ$p>z%;d|!_YwngmX8=}p3|-w&Q(MYa(R4Mx3Ih^I8Qqu&N?g4(iX$<|BiX{ ztf!x70FPqQeH&|FvwZeX;CQ5xZtwLTcvO4=ZH4*<3TSKeYyC}`VQbX zYZ4>*(MMZY0@Pq;(KQ4p4E*UqlT;|4lY$Q3V1+qJV>i9TA`S!m8r@bwd2EIds}6%^$d z`wigtM3)Jt3TF%F3YQ3%3C;P6{HsK-6IKgv7v3d&MEIESw?eyi_N$_~cmwOVMYvta zF(<}3}FKy=lL_M0XIH^BeKqMVsA7LH8FuNN5&aMf^z7X9~v( zIa0-PIQT@IC%jO2iEy2e>$Q^aej!KnNWUQbv+#A{Tf*(a_l2JcVViF9A1Q1p>?Z6X zaJ=11I1q?Tp_$dxK3Ctyj6II@IK+sg%1li34bg6z3@fh z%ff#M-xat9cpDQqk}OvnL2@^ut;6Veuw@rA-7;VDASL1TK|HLRy9 z-mYamNA!6@jw&+Wa^Y&>Rl;k9*9&hK-X;8*(5_|usOVn{pB37*tp6g~u4VnE=y!xW zg&zn%74k)&^-L9F_|MQeLc6y0QKDN5j}_($dk9Yu_7fHhhYCjuONC>FQ-w2xmBRT# z4$HEhmkC!3uM%D>yk2;_@GjxcgufJWT$l2GC;X%EFG3FVGJTuyW8uGqQGA3kJx$m^ z*jUK1VWxKy9xpsmc#?3SaHw#kaIA2maJsNu_W-#0pU>)xeDFpq4E# zKpZI<#u~2og$VX0$-><}Ec+ai@QzzZ@GE>z!*2yv0}Ocdt!TVW_aI}T)*?Prm4 zw!5Lr7a;d~a2{Hu-0hR@Wgd8u@{a7@Ix9g@HG=U@0+U0dm!S5xoC_8yC+C;6oSS1T z=WNFPTFwP^IGttF?Q3+6EMXU>%>@~J;vHI~{NFmdW*4OVT0?A`9Cu&lbG7W}4vlS1 zo;YvZ>`C9)*jAm97A;a93?wGTZDv+XojkK_V%!Y;9Fz^+cX0XfuV_YRbZ?>a`{37p zs?)VH{o{VG-~J$0I_{C-F|0PBdnRw0-znR zhxd5A^6#}SR0-nnmX&a05!xAwu))EI56j~^Q)7`xy*a-pST5z4!rMFuIz#c+mlBGw z!I^dVMnMO$i5cW9-!#zSax0;F-;6kx%XnKZb(1y^f(~^RaR%gU8g-drc|}n5qbWvS zeV~=M0%4m6LFafRkk2}swj2>*c_Tvd_&RLmnYUP*88{FL&sZU#ZSY!z!}4g~XOCNW zU8p;iCl5%+Z{^>iudSmzdX7gCE#K=9b}ne^EZ-A|VA#45s6V z$C+5)7vOP7%K^qMN2VT@0NS!}ILViAkAd%v1eN3?f2euR3VhoYB9h;xsDh~ zmbV$5R)9F`Y`K=U7>@rY#B38xDygck^x30Dev4Km*? zLSAd6e=2-X_^9w@;a1@%LNo4we8-_9ncs{n00)wWzUEY+Ssw}~?gY|6PG}{+8Akv; zPxJ*!H{%FMUm^N>rQc12+&_v&HEQW~(na&UAYWYAM%Y2vS;#MZ^7RuA6rL&^DLhk1 z6#)5X3FitI2$u*=e}nIG(W`_v3U3wOCA?3FTbvVtM#I)0WUcnyruG}X6|Vb`-YQ>; zsDsj59oOyngVtNMW2e^9TbcFEuURrSx)a;4p6C~6VE4RhYT}Er#(DWPv%b02Uqw$@ zT9dhW(%4%rXg%)wC9f|D);g!aX}H-1_dDNx2ef+~{<<)wj)Oic6*oNW$%YI^p1^-M z_6~Z&i!?JMCCR`%j8F$7sf$64k^>d6qT$P4;JCs*fQ0KhTU7F%0Ln zgEXTVV<3*04A#``&58~t$*Q@1SW&)mWU%6HA<28;)46?LUsjZ3n;9I~a{KYN!lBFz zR^08+dLMc^J6!eit`{gcoNKgoQAYHi?-&#GgN1} zfE>3iiD!}Qx{V2qf5<=bBkI3(S@qgAI1%?WQphl;>Pji7RBN_9~W7k zHFHemxbf4=Dsra;$Coo?aLa$pNv{2l#j@IYS-D4g^Wt4v!?lN3xUt)RrI!DtkgM}mdZ(n$RcG-lf=7p$>`9vGIW$xt*rpYsvGb{GD1$ zKB+h4t>V9a;jQnI-Z13s(R_&yx8p^8Wb!+d?ZEqGLf#65Z5{-jQIJPI>ulO`M1|K zV>0Bu9g48QYmpX~R|9!GPOKk3g%k4bM3{N<;OS0F#r*J)!i;J3zYto!ahRWRF5;}S zd`}>PVe9??zMhrFC@ZmH^taa2nOp^YsVc z8~flRf9SMyvT-oRBC;9cZMldtbqjTaQ;q`o>1>@X*U}cl@&69JAz!2mZDEPt3?lxU z^oT{M^1k$l1&OxlI;rzg!F5f|jzs&@EApwJfyup|#*p0xz8$q5s7VyxDY!kzKhU&6d_-K(IrBo3q$;P(Nl#ph2Ix05ndv^O1NHli;!9Z z*6$(V(?VV!jDJb^ci}t2ZNeB%O!65WB=Bg_{e{DX z;JxB|P_&uRgmTQ>WTbCa`b$cuMvD2iDgGnTpNdY21nKpOD7Oz0@`ee~tXjH0bNs-^ zYnS|SA&)od4#LjD?!sQe!9sKVz&}d#XyF9mWFhbWl*{J@ajEcP;R@juLUTO9w?VWy zo}hmw+8kHVkBWXu_>7QxA(q2?8gZ-epF%2%81J$FfYeeEvxL+fk!~&QAnYtO*8v_7 zw*Mf`@cTk@Jdq!lPTe_x-M`Enz~j30>}iy)2eI~88y?jC>QWci(xs+cdz;au9;KOp zJ~XM>izknLYwUz^*N=NW*fkQu!g^F51D7XwKNeHRSv@MF6MEEF*;|q5qc{mYW94D@ zjr<%59-niOK9l(GN4JsZIG(Lmk7`c!Sd{ut=uv6>k<_D7Gv{&79O+Rxg{cJCWBUwx(I~Pqkf10^r+P8L66EwbfAnL^)Cox_5FL0S9;XAe@UQ6{Vllt%d~{P zleU56@`N7sWs*OvrANIyp+{}V#2-nInw?fia)o$v(s*O^SBklr(W9;s)!Z>tE&bKf zqvG;++!Ij8#GApyYczvZb9>hy$V)JT6%W*^2|a4zdr08*lEKBv z+`bPY$jc*x6?glsLy%WP=Ftcw^{8EwdenJHNcH!rM~x#X+J;9fp+{{_;#tHW(xc*f zZS*DesD`bSGz}ErjQ3-|cd+Sl-h=m@N&=#J0RAM3g-qRJEBNmHE5h$Ds z{S%cj7S32(kIEG2Q3*kfM%fzeLyyWN>QOCAT|KJO{ZKmZvI(d3SSTGg=D;-v;CzEi zW+^mu@-Ivu(xdKgkI2rG=5=OT@u<#UxJP8?qH%M}I-gAapF-61i zqOgxw)33I<00n)K9u<=&?H-y%d+AZ5xbY-4ru(cDYZ}r^VGUcUQ~z^275wjNM8Ceu z*qlV)>iz~_U43d+OgZ3UB2u5$IXSI@80X^`=v4QwLQT$8{qE~gc~kzb>QVm}HZV8> z{mVB=e#g+|2axy=9-5BR5;5enx}CawOrztFDWAFr;>!b1-Es>NXPtdacSJ;3-}N9A z4gA(>3Qrz-mWRiRkq0oY68{IIM|}qJ4n~jqIy&ND^r*Yh@IJOPPzM{FhH$tYOQAG7 z7(HsYsN=+u*E%bYFY#e{f4~Q(?H8!<68*9QVVj3ChC?3ttg~s$5fPU6W=P%_=}{*@ z-ofZmcS9bJ6OY>$=}`wAq#pHq_y{`JHUh|Y&_5vr7`GXG2ct**G}KgKF3393D8zdYhEEP@_&J=!M zxI}n~@G9YY;UPUL`W5%MLweMpA9zn=e|(4ZsCJU6QI8(TmKy2Zx*N^|+frAxMPoyH zRJ(`653z?seeB^-Zv}U7NV{U`_v>A=?2^qjvAd&JURwP4&MY@&rN6U*%XzD*E1O<@ z_s2QqkyY-ADaGFEjhFtdrp;@38))zB=zc-HtB;!+`|*%1E7ON;dB)4!>ZOe?iu9^1 z_E$Gu=d8ZI*@R+u)q}~ykXoBI~$)kMz8uZfIykAGs%g{?n&F7@h%Fc5lKVanA{ z7dGnet@USZ);;yey`L=EeaXEq zK63vjOLsRYXbryW3s>FSV2`u2$?DjeO}nD4AKmr)E_pSL@*3{(c5H04@q^C`7v&vs zFV^_n_1LZ-bwlj?&o|oi!RP%Jb!BYC#6G?=({F$_x9*Et_&46mc3-j>?T(_|Uhm@L zYGNI`eH=^g_Hjz{hI{y52RB z`tAv7J25YP^`hN}-IaEA)3uX}-L3t+dTZ-nGor=KvAdSMv!vZVzYw$!lnCV^V zKFLh2knF8<|HkmGNc1+iyAV$CJ0e4BGw+e?KOtbY%??F`xB3b$@lLPM@mY z`&QTKl4!GE1o!390LEEo^D{HS{dt>V72~Y4XHtAXx_Q|PksUlJx!u`rc`J?zCE%Je_u66|uXJ-4EeIj29g?ZvSt;FJpX7)M?|Lu$@Z>m#^Tg4LUsHRaz_zm#>vR+lz8o;4mrX&RocoA7;eDDt0H6CMTr$X>|g z$6}gs2l}H1LTrPzZH7reM$_!u6fg;h2^^Wy43mJ2Vaa+5oc6<{Cn#}Bkg+V=38_g_ zB>Zs{`({HN!TL-*gCY-6|2URjN^vU1@ode{DDr=ue>}y(_}4{83W?((HjPoajOR~m zby3sXxY9oerGYJ8#xi`Pdpj4o;E!1Gmiz$VNm#BWFIQ(V@jjGpLZX$^Y|Ud8tInml zB!hop9c&m|`Y&$j?QZEd_*1qYwX|d+6HD?dXNPgy@+%(xCN}9v=rx&<5=$X^ZFr=& zf-e85`FHReKW)!MR!e$uoC=MWCn50@)A0oA$p15K<{?Mf2MSwq3#JOT@z0;T{>Vq zh1e2@M7V~}QTMTwu8A+1?yJz_H_ryAbf2eg0rqRy1``KxHz&APvJop&x-U?7O-k3q zYpL6c?lJ|4Vf}AVuLys8Lz^a!g2-zrFQI#PqUhk&uHC10fI}{>IcI7gh5zgsU&916 z;q)~8K1iZA9Ut7xGnk?V*T|-RP`7q%&RD}T%*f-WufbbUI7VnL8(bNk-$b7Co2Z}R zxtVWpZIcs)8Ev@7S#R*UD>I3e!=P^u9u;OnViOsW*fb*IaBrsOsI+-RL}`oGeqqD< zegl78?c;1UTV{BLR!OVcaA9FTSL+_g!BJ1mk^Y!Wr@3Ek2-yFj9ydc(WwkdV4#bFS5r#F2nqNNnVm4sA0EMYgjkf=lfZ*4;({=LQF0X$G>PUr%dp}MbN^05%=DIe^DwOq({m8BL%Dq{Nr?wsdRm^W z!VXKJ%1jQkN>8SP0yiyBEXm5anfFla4m(#dj9K6z`U^y~k+>bvW=CRz4=^|rh`)yU zi;_&d8Rir3hxtpBOne&VUyPkYUsssq(2h2U_?QvV12ORCFHJJRbwR#scVr{6j;&^E zG!fQO71q(g43DP$YY}lYEJ`wQPbe%-GQrVoHm?#B?}ftBBon-+V9yY2n=Q`7P|H6C zwOLq?-*BrOOFW8*;SR)eh?ow@w+->C<&Pt_S@IYnZ12f_GQA;=WqbL6fy)LFx4IYj zN!H!M>K;dQv}7p}ZYxZ>lRf~)x&sh9g@@l#M4K*$2_ARIC)OfnV8liD7D*-!^@!yjBO80r3w3OFH9%?oPP`6gxR5UNqZ7y01?T3G1Tn)V3 z^PYn%r`=-Q{f9FH@%F>Zaah)))!uCJ*bn#JXx9pyLAzUuSD;G~aat0*0mX37ben}~ z*H|7g7ny1)k3arN!XZ!a%!qmOn~>`evBsF3tcj}+TFwUd2R9KmBO7)jB9a7aY{f0w zt<~BXcNP9Ug^4z`{;xx=_xDe2G}<`NY>bMUCIQ(Zj|nU!Xvx2v)I{TF&}SXM|o*GDJ5PGU*4^qCC(0uw}y6AoHr};n z-f`W&;Yl1rBXI?cX7Rj+5tsEFB%+s&Xg+&Va6KoULBw2Ci%8zRkgfnM(8QgHxYrT9 zn_`69A~IC1NU7Gm@Ib`^^B+eEVZ}yk21)2-T1(&cPZVWNV#T#SfwO z8Dib)SF>asYE+MGjcyQmQfGSazAlG%=VOG6c61!AYP)tt{iZxPiFkEaT+O|4h$ z+@<|tiKGA^^=njv%H+omsNPJk`&mIM$8CLUtPNU9?&Yu60TaibZPa*hSj&B zF7@Ui_MmQRD{y0^gxxpZmgbTR5UpYJ&@c*I|CYO$i?ojl-0b~!QQAwLsSU>VSp%Y5 zi#wKEi{xt6N$n!4+nTc0X1m)hrV%y9{Yhga_fE_!w7Vsbu$b4)o@jYZW;(ju;aZMl zZMd(v;#CkYuAW89)M~h!`)~3B6l^qodvIZGk;DCVl-y&bsY}GQ5H}%y)hoJd@KdnG zt8(Nj#2O#jZ565OIE$Y_{KAX9tKv;4zK0m8f;GO3xa(S^F7Yhh>wUmg!N=JKw(U|I ziZ%Xs-6C9Ld4K3xeMf)!yGJWngAIh#e@1%}wJiMbp24fVyP~^%K1T5`%t43+h}{r* z9QQ%&k2nO84{;+AS0F~imasz0nu6ZWn0EkjzUqe<1{~gXOlA4J%C0BQDzB_OY1Y)P z1Lsbie^U9Js>-fYCRdivo;9bu(uU-IrKti-W=)wlc^;|=N9uMxYR=Tz^QV<#ro3;Z z`aO;oo_cuMwDJXI(=eL&;91kk5AKoQBfs0hJ$p=~@aX zJZW;(Oh`BscKJR8j>^iaX?V4Ua&+V3f!Ge7;9(C_DRv6#qYkJR~?J zKd7GwPEG_T<_9ejt%4I0K@$jxpm~0flgK_Rs5LHFm>=XOhK;;B9t-Zz9UAw8&6Puu zzR%LXuFO9$IA!{QL4*9^gWGow@)9r{%*iipU08H#LU7%a-~ zI3rj%J*brkYUK}~+P-UXa4x2GT;V5z&z9x~m-#n_(>k^bDidw7CZ`Mw77q=YUsW85GVCSv9$00Q9EJo;&r#QL`48>+2deZZ|aw zoQ4Z~!f^V78?)w2D_<1O6*%DVGCOn2+?iXJI&;fXXKvY^2HKZRUub2;$CiEJK>M;$ zRg>pT!@2LVHDUYa&6_)K9Nsd8gQ2I)K9Q@E{-%R%04!EjK4AVlSCY=us`5i3|GUG@ z@g}o;#>DyIR?#?U+lzLfRR8eC#EJbz4leZO%s*-LoVXpf)$BX-vqM9)VS~}><*WT? zD{^x8Le#wLXNk4OFk@fG|_USyp6R~e=sUMs80PpTL@dA3)ra?2mx!=NX8MKMD^S%7aQ%=J7fxxPHA!oW2 z7O(R1r%kS!?B!3Xtn~7kkzegd;x_!wf93;E(0nlFKiV+#5FPBU385__^>DAXP*aa( z3<711!9c263Jf7hJsqkWtHJg6j@KXENX4BF+0h?Xg|_ z*YB1=(z^@`ZHZ*KWO)s}WAUo_tUN9e2B$X}Vzk~ZUC|R=H>{WSxq7RRcFWMh3)t`p zCKOy5yF#M&O8bQ4$+;dmh|bG6jeX_w46+uhy`~@|zH&de^t#{kZcx zqz71N)gkn|bu!n3;Wor*`*uXOUjvl6^=0=qn#0X)VJ7Sy>IBfOZ+)aA&GwSedww^1 z)OY6!i+gtp|KBu4+SQwfG}{)nHyg)kXXLry>UFYXH2>@Pen%r`*yy%inE73r$CB5K zUFWe3Z-l$~6bCQbcCF*QLOlNY?F{Z?lEcx+<|NMd{YfbCTE+as#eQP3$ZHDA$BDdl zP(DFiC@vAt6)zGuh#SS9i(Nq7kXXNiBzKj}Z@p8mkK`eehf6+I za+&1ml24Ru^Vebd#gc9QI@GhCGPb{)ukPns&gQ3s{#}yqliow(bK(mm&Y!nP=)W)i zOQda<*Ci1fh!`bf>$yLPgSS>n@Da& zLN_7Wd~zu7uJT?a$=8W690M14Q

    j(EO!vB=N0aJi(&5zdtP_K)P4W|HHQ$-70npFw_7GDpv|{2$^D@l%l_ z@mX&7EwHC#8#xb|Bb`}3Qan!lfyn1|mY*P=EY25~iYvr(#S6tt#r2}y*I@4&$!?xk zyT2jd&GY&@mER{mB)WNC|0wxok^ckO&UeIj#ZSb~#0=gqpjS(5AT|;A6ZyGl>bZGd z3nbh95&1_-9w^#<68XnS9wTxdJ zZxgqO?!Nk%1)U!T*3zD28&J!1lOU1Lr^TfT)_j-f$ej)x^yiMc~e%AY#__X+(_&4z% zqTRQV-YWS6(ai(PKMu4P7i)|4MEVG@yq(xh>?zuP8|B54M~Y*`DdKc-p143 zCH`2fIp6CO%70p<+XCCSP23@VDh63$d6t+bHWFKj39;tbDS&5c`S~#3|w#;yL2A;tk^O#XpGK#P`LFq!$a@Gfbo#3*`wS z-BT!^EYeGb^10$FajkfTxKX4t3-xaie<$80J}CZPq(ck!|0dF}h4M$@XCnW5Fh57E zE7JXi`R&9`;=v-_URd5wq~8nW(c(;Twn(oRmM;^}CUGpDFZqY!rOKys4E3)Qe<5xX z=`O?a$HiyF=f%H^|0jMd{!5JG4*-|X77rDV5b1@(@}tGE;&^d}c%pcgc&_*>@z>%% z#qA>J?WO&=xWCv*r1KBUmxyPIE5!|BQlyU%^&b|W6#pc?DE?i1LwrZ1YY~_C(eX*v z66=U`E@FN{q<0bJ?qZ2pDjq8yFVf+N`g25j98o@9+$dfx(&>ohPl_*zuZRJ>g;<^? z((#CL50Rcnln0B`#S=t2AF=#0k={p?ZxA0A9}~BV?}-iZ$C3I?MLH=_9w^dFiSn`H z1aXRp+ms#u5KRv-;_=3a%bXF1i?Qba(}eOnh#kc)Vu9F0>?QUVi^PFqsW@8fuIKnh zl(EjP{;u5*E$n7K@!?O(hrZ|T=Oc#)eIbev_U=Ppf_`;`)O_U5hdy3>`Az#5AF#w* z`Ole6R@J|3$3@TTsYxgl8NwU4cN@r~G^+N)RWjQO!<{ocapg%;)T zUq60F{KSma@wG3$5pRF?&P+d(Wmy+DKegX}#Z8KLHa)x;ZD>z_d2ie0r`Ou>*c)|c z1n=hgx$owA56JgE55D(#CGf$Y4Ilg^_wCGpKYnh>F*|b0?%x?lI*#&q$%8vH+u!*v z&QUB$9UoR+dh)S1y!J1`X5PAz;@eS6-V-k(hqWA2JQ{7o((ul|AIpA}(uIcKU_-<8 z{wKk9zxc_boZ=P(>TJlpe87%)=Q?Xp*Acm^*SBc5q0u_#WPPxFftTNI%`(tYwDm46ZdJS-HLxxIhNtTFe{(==?ly1G&s%InJMV7F z{EVG`cOTmjgE2O&fX3;uC!0Rk^jB~FWZCj#eHn=w|-)@t>;+mH-DyEOJ8gG_fv)y|G6pG^z?0BzeaaG zJfL5(-@9l>yydG;(nijPGA@U&55#Nb;OhgY{i0EE;|=ZC2XC#&XtJT{`pk8!CLh=4 zqU@(9C!T1$p`aMsHJ0&iUN8zw)#R1wqymjn~HyAA=S^Z$JNtkDqLA-z4x4eCE|!>!ug4eT`qIsI_hy&LXe< zMXxr#^7hxfyE@?7ic1ti-2VakVEjV-(LN7i5%VGe-zJ#KYgs&tT_o-k1%9Tz$YL*4 z;J!^ToNBR*Hdxp`HV|~4g(PNeV_!#nKiCiYp30nf2K~t6=GqOe)Y5hM9e~(K)2VA6L8D?1!dTs9Y}05<*O}!~b0?+)}+fde>Rr!i&-)Ec>PseXfVa6DW1iJhEN=XSfBI!`A1Q_lOk`W z{!likDGC~Jllvts^8yv+-M^a>uMS})3XyPawC=JS4I*MC-GsK4WDS*)wduKt!rvS## z?r$mJQvfFHpny*SjAcm?9!DDTQvfDSqQp-D9LuuvAvFk)@QLV5sFb9T}GlL_|G@_$@&cFvYCaS#&x=hcF* z134(WBbJQKi#6GdG(t<}bAa*Ti2m(sP-jyX@yl^x;cOHvXW?Tvxx&{|g;$|q6APbW zcbF|{6PcLVCs6PT3!iz@6*j}4mC$Sqo2&^p+w)o2y|!cl3tO>4>_g>yJ^ytp7{UTv z2zdVg7dyyDz1-`_=iI#9=^kH~j`Q@RueV2+_q^&Z@Aa#@ygR>nIkh*8IJM&pXrwAo ziUX;p-+GhKOC4Q_p_h8I(2pIC@u6%k@p5#>-e_6VL%vlsgZlyjyVRo_C5cml=?>(F z*l%!hU+FVpoyI62d2zA=D5V1a{NP;Se=M(sB}WsySHK~O;8O7J9F1fu@PbA^Ltv~W zk6!{@A0~+f)`nA;B$>DX(f5vL6WB)`c*tjhmXQzjROpWs91#fmvA}`x`ejTkMnr`K zU)NYZ6F)ZL=LkVJ=NF%JYnS$lPZwfYx5jFbYwI4g zUHhYLLd6!=;`dcVtR}%{G`MD0C7H;y-CwaN$pmk+=3&o73q+ipM1GiGk)&G)A2#6D zM9>=qPNhrin+G?B`Mj0jS%#GnXChi7@72ete zk4YSxxshWtxB9V}%e}{{ab#>>=C*#gulN*TfmS*C4s9W*g|nm7X-8bcA3<@ri_Bxc zi8XWr!Dr3@PIb2Ji!6UU!8gyiDiPssfKz{Z+mGY6Z-(`R6DZLN5gX69je5A{k0WFtGtGMj7GAZC3GRq2tcp3zQ+Nf@Ip;IYOP^^ofxjoILZ(&q zs#Mjk9xQ0V?dPaNJ@-40T2~9xMToq=lH(#}O!Gv;Rp8U5nQ-mzaGIA1KYw`m)1jYj zVjH67RkKaQ6K>doN49QaS$R7OhR|cA|x#o;I}6tiU}1Dv@-mhhq`&d!?XEHAaZjK<)|M1dBV(C z?%9~_*|DzldRTb|5vTArKljseTU&vLBI3Pd{&z>5%hh`LpCdfdCuA^sJS z8#5YsOr-+a5cAeS<2&N7`Q3GxbaTB#JS4HFckz(K4oP`P+K!TkPJlz=S>_Zu?nfP36%B*aA%v^V>+#P^5=j3%NF3Cy zs6*j|Gx{FXAy~DnD%gg{wjVC*-8OjBTLIt4-!JKXd}l88P%N8Hl=q!hbyq=`0%ZI; zR>ktuuIkqH;I5EwGWm(qt||=W8%=&XC0}pyeWzU&G)e@srw5JUI5~7y*ZsKcdMkVR zv{fAr3eI2FJ2>4>1fRo;@=`zaqU_xsUX)nX1;d678x+*Lar}^ArJs)lAM<;o5l=74 zKOndh&Xn`>u>o5KLwZNNDMOF3(3LXkMEQ;RPC6g7?~3OnosK7(N8j9u*jVsm`~TdN za_*cNiM@DG{`;`^{@N_FG_h&?$JHcoFDh>8~K%dA?-34 zaje|4TcjL2d8qx@`b6?x`o%tx{p+sugO8k3WIsOCefvI<*oNQxM7n1l_c(MQGO`hI z$F;ye`O)C?I1Yj7OcheES>zeYB?n7SYF-Hn=T zh`XH#Jy#d~4Wjm%9TKi5?XeTm*}F!|6o3qm!qM!;8un=OCPdQdEozN1aFAVK8RH$I z%YPesB~AcYFGEeA$OPJ#hkUk=ua8{&9zhz-sQ@hWLMQQ|P5@aaLw&?Zv%R^{d)`XI zAE!r#|1rY+-1htC6WP1N_db!~o=I=iAbio6$_Q*Pq(tnGMtZ%0{fZsB8=uHMO{>HE zxm|Pq9iPbVXaaqR`ibl;q0DOvIbNJ7&K7w*vz*-(?cie=J@nZW4Lyv-~0P zkK#+>YvNY%1MyQ4uhwn(I$}qW@0MxTd~d+1lIMx1i%HRZW!MhM?~1i>;L}cHv9oxX zSVZC?JWw1$;vzC$oJeB%S(4{SUL^T6$>y_y}dvKU029Uy+BD z|CIEe5&uv5|CGF4WZkr%OCsV;u+e-jkuhMi^WSsyKW+%W20EkDPTyuPJ&w`n{PVg$0XbJ67uts{~^96ZWZ~; zjrMkm=EDw|FRGZIBQ_M9ifzPpVkgnAt60vitKi|vA0Q4EOU2RR@!~|$`S8t_Tq!OT zmy2hL&WG=ZlAZ7Sk0t+9{JHoW@pkcU@qUrx&A9%~XYX&4ozLD|lHGOsBgxKZZ*RVO z9Kc5V`QjlWXIf!?KhgQmq zNBXCdZxU}2?-1`6olpIvlK&_^E50PYBEBVZjux)(hvFwK}?DqS4sQ76Ymut6dxC#68|i|D83@TE^=rl?R_f7(Gfv8Tg($1i3yPd&Zt+@ zm#;|q1H}@tRGcJE6HgT9iVMY4MUDt%JwFs{`uhDy`PYayiZ_YB6@MpkNGa_(pTIv! z{IQQf@7BY$@eJvA4i}FRIog!^<>G9yLR>DMDV|Sa->j0n zR@|U`j!C7x8^xQ&--;Zi%JN6VC&fRBFNiOR9L!4n?P3faNt83iI%0h>Av)j1ZjyV7 z916?jOT}?wnK(l{QCuJ{7Hj%8*7Rk(PI^BRH;KOy?-1`6Il7kZd0OOvTFP&W979Vv zE^^o`y{(6a|TtrGj-YxN5H*ARB~wOWa}Nnbi2{#Lct4xE|2_JHE} ztmWrstit@HMeyNRGr+@~rC#PL%vtJXt!lh3b}`0CZ~I{Rh&M0EJ+JsD@5X9#cG8;% zX2PGUa$tOo%|E)Tuoym7*_|;T>1OkS`ss4aOd03=qvhuRR1bbi*{$gPbhphu+8kaw z@hMa7tV^i<5Jd7|Iz!JTJw{?T=36lJcv zr>Mn%U;}61jIG0LqMd^^n5XoJ*sAp{Fgt0%#hWl+=m(89u;l*je>kMknu}VoWs{%C zE<~$>8O4R+%%CNh85A>sX1o_q%>bI+r7)Zsw1oNT8ACIXZ!?3|(2pY@Qx^7h+MJWK z#>}AWjw&9gnL(j@#7!S_X3&i7es4E3Xu@U&^*4mGg8FOfJ;CkD?O9mNb}xJX*k9&i z4o`Z@%)>mM&%Ty@dE@n%F*H_d!?-qQXE%K!dqWTS>Y!$<9ei_au2A^qgmZ=V<}9V* zT%p;QZ}*xHY%wqoo;jQ=6f?GlbA`e$r?&a!bSuuj{Ex437&;#R5#m1o_xP9MAf5q{ zCqp#A|E48mxU@8dM%w=d$2o>iWYb7IizS_oWlk)Ey-e{ocmz-R-;74FdD5i(Z(f9I zoZVk3|C^rFIgB~Z|K>RA{E?QA@5ChkwZ{`B{N*2Dx#H~La-l0u7V4BMP8pNtiWBF> zA%57k_{Az%kC~rse{8bj)(;ntbGQh6bU3;s<5lQoT@ zQN5>Z(L66>2J$m@)Z_o}9P7-&%$~2KFkla!o7t1vZe~wQ(;GxHe&%x63upHH6m&Ct za$z^KC#|Js_Iw6Pp4HwQDtX%>`Cfhh6=eH;SZ1ygr2jeo5;TB^OQ0p|~7;|ox6BW^Okn57*4)QB6@AI#FX zkZL>t34aJn{RxeR5JyqqpVTIFsTpcpbM?Tc^t~CzBL2^8S^?ji60?aGH)0ouKb$sS zq}Yu%P2{tCQ}d@eIv+a2aJV#uKg|dlv(u+#GaN=+)43hDvx>)7V6^G-e?TP(G>Xv(`+M@&xEj&H7w?z-{$P;C_!0sc7aS| zViOWSM52Y$Y{^}Vdn1?Tk_`T-913Mi-|m)v$}RmbBjBQ8zp-br0P4TQQTnyXEl zQt0urz|YWxZP-HH1n%geu8G|tdTmaC9=p8Rtr+UwL)|k{x+Y#q-4>TZZ#`nD_Xq0n zZC_~9!~qc5C6Iv~zaLNF|6&)LuP_JY9^G#6fxGBTllbmVbf(FOV@(W4f8(^D4IfH5 z4<#qQq*D$=&O_-$C^w6`&2YBJ=FS19g_~)zWjNEMIoL#Jnrt0<=(I`CG`Zga9({W( zV87!w6Z+n8@6q>$Y=_GOTx_1OgiXJI0+It9t-u!74~Mp6lqbRRxVPOeO^sxwj$IVI zV~GBUm>zN?4v(7e>l*HavBVNYI291Tu%t~f z_*s}s@Is97#02YxE)nkhvBc|^JCfkd7Y$otBY8iw{80o)T_b-{G8YLp3P*rz8*HN% z3+bkfVbio0qtlvvUtxiV)lkGt3^=ZYFAmcsh#YQws@Dz^S5hiN%=PBe2?vu?E`T0$ zXu57R7ur0qxrPnQmq!c0frpk{^{y@~ZebdJX$vbrL^dSvO6DZP#70C6Kqt6?k-sR( z#O;X4C+-XLmnNAAH~naW4m#N0L@r{0(e+6_SDYE<6Dz~~Sdxhw!+e4(qrJwL2CxEq z7FhS4h#1LDgmq&QOeXj~1^KKj57BlR6J0`KagvFFp|B*$L|G^-wHd2;kHXnRu$i_v z6WqGE@H`5H$4x2fu`mt4;f5`i;i@Qpg5gm#pdwv$q#0?%Hoyyi08jS>|W>_I6t1LCDnSdWMUl;BC$*gLsq&CwYU zdEh*bh<)sKraP7*r$`r+6_{2j!FwvsmLYBlo)vAjXhX7J9=x5AsMAU)QpmMV|lu5w8p0HD_{O(Yz1pLwGiU=%O9RhF7PDc;m_lf zcY|n%>ix~m&$j&ach;?g?zGUJ>z$bGKRs1lY7V1t zdI#*%8gs(!&BrO?5rv)zJTKYt72N0f1#LUGJ27TgC-x~JTF|$@` z2Dp?1OllUk^qg>XrkYuOez4HL%BH~5Omn+Bp+p^vLhq|;8_m5+N;}1H)~pfuj#6qu zJF}^leYvYkS7$vumM2b3?apvcxk$0+rc!f`HmO$HE)UltGWDMG1^VBeTP}2=iyR1= zpU}2PxGB@K2HFg7HcMQ3u0hQdXS2@9M@b${*v8?6Z7EM6^HKWNr%21i<%yjFz870k zH@A-0i`Od!-tNBG7ieJJ(xA3;1@ij!#Dd?ZFA$FD@46ch-@oy>AyeDDhv;B;4hU@# zsfRv%3pMpv#&95FHsap&x7AJ6c~?d6Jl_)| z(do6s^YO_}NoCZ#RcTjr0rX0o0J2_&TM(n|+Y#A*4N&IVcR$i-P6c4$IoR75AE0`8 z-SsE85XiPMkde*hUELPzj?AXWclG8W&9+50gZDI!Q>dl_?d&c@^S_RH(fEoz9o*In zbH0sv(YQ^xJ;FdK9rncs2#2R_b6zv5`2dB_8P%sm<8>N=*SN34_h$(0z=vYEI9{A6 z&K7wbQ;+8$d4{-3yhQx5c%8UOyhD6Q{G<3+@eT1q@n2#b2Mg<~EjAE2$b$LpMH`zB zd8lL?gAaM8&}#2<+^Mjm=L#vSClGLCs-zbMHsCDI3@x7d$_-Z0606Hob@_5u2> z>bYC>z97CS{!`^2Oa4r9Hcn8s-@bqfc93koK4>?`Be2|jeIRoL0%gA7=6W3?d936~ zlFKE}m0TrxspNA=Y(M)bDY#zwKN0Ce$$Dyzalc>7+1Pg6d!Cct-^DjY^8rG6%`xm4 zJ!S3YM}2I)CAXD)Ac^*L7JI0?kIHS#I@Wu*j;*+T=GWoYVl_Ax8j}RJ>u`hKZwtW&x`*MUlX^A?}hU^*_B9k+i3zblIIyicq-KiG51x9c(Nb0`+q)2_$hhm!gIC+72;Ph_UZ z;aQZO57GXT?fQ)TLnR*}4j1jZjB>jUgR_)>x_Fl8e2Mr$FxGRmXug<`e<}H9v8IpF zgUbKC__S!(Wi0uo@U3^`9Tih->UnBkjq<&oF z|3}L8M10fNLB3&hUk$8r9j(CxH zv3R+7rFgA)gZL})*Wwn@&FlGl$$t>tJYg?L=D0;}ALn!Qk>s5s$Gx&VTWl;g7ZYL! z@nEq~wD~=;d~eAd7)g60M4Q(W@>I!l#Y%CRc!pThrzoj>&Yw=ZzZ7p4e=q()d_jCk ztT|s;JWJ~<))O0wEyOk=2XnICZsK9$ks?QTvfTL+&6Qj!t`*mbHGPC$Q2tAzo3|^# zA9334Aa)c7i^Ig(VuiR`yhQwsc)NJFc)!TusI2F0k>gP*e=c%BD&+>^-h6C&Nw2ra zQL0?NRODb)$}`2eVx@ShxJ=}jR_d=2*Naz)HRt!@xK`@lDROu#$f2;54;9CX z<3)~!W%)TGhr?1{FWx5JA^uf-Sq$(1P5ms9qh=}h5C@2ZMK`b3NXa-YzmyM7&FAxc zJx4U69dvxS^3=Nrd@*F7d}s;|>DDX3u=n|jK4r%bx*o%R(vGOJv3Kwr+eXA!7SDti z&8iFGMN@lieAbqkS*z9;Pi>XG=040*l=1HJqFQU3ZpgXR@3p2lzIp{e5VLLi>F}Vb zJL1i{4daKycP4k(z)j6EpcPzPV7@c4HSzT$F)L5};$S`IN$DG0e5ZNRx&4cW75jbTu*M}gugr^2z6fhC!dAu=oO`99xZJ!{a&3O0e#Mxx$5ks#hgMJn3IR|3Jt}KGMFRji1jV9Hmukg%xJQKa|*p*Z{VAQ<4x9N zwGP+hn&o)~T#p54y|;>MpqYBgR$vAs&eW5kIc)xKZ!`7m^Af3Jf)PMEPLT-z_4v8T@b$Ia; zHfv5vafZ#B)Bd#_%-w@IeB!k?aQ2?W6FHi@2m70I_mpAoo-)kc1LlI+U^W;B<7Lsg zdva{&x#AJb(X*V-xOR%f{pUcxEq-QNM)e=~2$l2v zjc1J`{LBNnBxb+ipRHKNOUMj1Asuu+77JoVo{uR^Ksx9PMbNS*AApQAV)&)^H$Uhdd5>$+ljp1M)V| zDtvv|K^r?TFUE!8>qCd3SVxKBY&@OvXn?*x9Q_zONE7+M*JlOg&UySFo^wCbm|=&y z0ekeq8Ftubh(GALDE0dx7n-Pn!C!<#9r)w)XQCK6bsvO+KY&e{LGd1n11bK6Vv;rn zQS5|R_YRg8Q(Q>#cPt(JD=0n&u^v~;KZ>RAP~=McLs@zQQuVl&{xFt4O|gWfB@|hZ zM~|H0w$7^u)~83#(JZWVrAf+v1IK#@uXgP|wfT&h zp?sT!C9@v#=}wW=(63#aQ?t-LBfCzxC{%jo;H?KldUHt3$@jxqTn@}Vs$rrw7r=iq zr-9>gj~*syU7Hv2AweVRM?{oHW`V&Dj4TP&Mm60{8asEBCeadX z$UV4{@KqRHNsQRw@ECc{`Z25z0|g|{I4j_ealsC`aEb$#@9Ijzw+$E~NlZaB#|tK= znJ{ljl8FV_@1c(dCm(@uHlnFAu`XIlfvvGp*R05>c39KE&yjqXX~kpFJD#9jn*+vG zfP9)i&*d}0m8dZ{4Es$n?2>3^*2WW|wZ)ie220Tl++Nbwke{~3bx(zESe9NIWCY?ovXYsm}UM=*JdD`76T6J}``otpMVg)qk=ZZxf? zYg)7&Fks;X{6==vr4Zp^P?coj+E7@OWP%;!=4HafeTdkc1Rqq8Uy*zXiEW73TEr)a z@Tgc~lfZ;KeGJhj-2X&)WMU!~CYB zBFRMWFrO$2^W#Y-c-x0Q5uQKC65K$@MH4N&gx~iOu}VbPbj&)#1YaB?pLK)=#-tC@ z)M1g{iW9gow; zN_thtaaCuAD#UE3!d8Z-(*&MF*CKN26gZYJ8J<#OiANE!5r}6Hu_>1&nc(??d}1r2 z=3Qa(eJdG7@V%fpmN3BsEHY}o2iC2>t=}kOJR&a@B(FKRsNS@UiN%PxAm3y@CKSRA zJj$(sDRNcTBf>txJ!kpuppMk*_CnOZgS+F$h|b}Jhw|+vhx4=WXnx7$(4mBB?jQO; zlBhSeEYm{}an@n}tJOooxlu}-zX_YoYuO%(S;UozwvH7rbU_R^Q$ex~Y6y>lk$SUN3^r1ozckSaZoeg-XU5e;;t#FCvlhIp3Etq3L7zR4Qlz04Ez2r&M$#+ zm-$n92C#?dq{&q?^JikC@B7pe4|;yVe(gH93v%;=g^5l<-9*=J2jMrEmf!>vCnbW0 z`9V%1yD+G`;=@^I4IdmV7|KD}mG~VO)EYO-W|8Rqqr!fN^*xLOtM3S>et6iXYxr$y z>WBMG-kh51VT;LIQu1b#H(}}r)H-K+&=AJ+&kCo0_=S}{Zc{&8vTR)NfH%D`7?9t& zW6R(}ud49O^o$R$V@USvr-f5HXb@>?^r%f);Mvg8a6Iq7J3835xQ%qSajf6=nC$=E zF~pH!!ZsS%MhM$@ag8pX6P=tx1L$`hL;eNh#`#_4^n?QGvG*E}zUzQ?4MC0$OHU2; zW(SPbzH1XgcL3LEn;xx>>akQf{CU?=>t=^m)1#tmPP}2msl&1L>B&jl=<;xYeQJ2V zb0|m+%1+t0gjP1XNyFj(-}=C6+$(Ys_cXSe_mnRlTRo`mxM1;raBMYp>vw#L1$F}B zCW3o@82GFh4Y;LPXp3L!VV78_smC&g0}ql9Oua)x*Mv(SU-}D}x-Z z_x1h44Ax6^t_L|6(Jh0dHzd#V5=!K zrO1fd+YzzHbI;jZi?myYHWtCyGPm<1Wvh^m+RN?~t{>Nz9ZAmKMx<%40FmJ%44*x$ z#(rb@&k&<}1u%3n7f@gs-H$YyQvq1m z28BbN0J2Vo`iPNcdk5m3*`KT={Be3@WOI3&abofR0AI1Wdf5)PEo$#=JY2U$o(s;N zlO3b^-;b?sgg+IPya+;1gsCLuo{`S+6lB-zFyqWl%fZ>ZeHAj0kr$uXQjtS5_vetpSJBqt>A zFS)Daq2f642P&T-nO!lo$N#ppf0k%t2qE(Y8q00$AmnQ$|4QWRAuhK?@*|S}Ao)en zjSbvR8Qags1Y$Yf*C^X3?LeEC0r_q$;K3^IO(MTo@=)~6EqYar|4 zb=~R{n~C;69_9N>?j-W$p#C9Zu{cybMr8LI^=62?S5clPE)bWAXNVVwtHdkCABi`J zzYu>X-X%UHJ}UB!9_zK^AGG5id{g=FiXVudi7_5$(5ofZ5u1oDM7|=V-oYaK0V($q z`-%fZ_71VUR6JHZUaUD5nC~2^f2w$fXy+gD*~i23wcxOJaE!(cUjZK2&lavA=kfI9wbn zju)qjcK*Unh2$#H`j?Q;=M&buQoKN1Bieb5@*5=oLaaF!*nBUbcfZP?7Ww>0`}P?F zkiKS=+4V}kC)#^&$Qe2>YmWV`Ie!3Ol5+V$;_>1{(ajrRJ{QnCSNRu;e4EVWe=6Q2 z-Xh*1-Yq^NJ}y2h{zZIQd{s0b4A|c;nIBhVeV>V0xX@6pEt*dTEcCY4Bah|$1S5$z#72CY(1`B_8e5AUM9wQm z{X)^rGtgUdkvLc!CVt)X4Y+v*E|L8!#Es&0;?G1k&%mvc?-K779~Ykz|17>JzAC;c za)bo8!@tCuV}0}RpvUq?V$Jyl@|E9Bbn^-vDY;l2Djp+_5o^vbz#$r}Z@zezc&>Pf zc)56u=;jglwdC8xyT$v(C&fRB+r;<9nqz%AN`&p{Djq5xA@&!G#o^*HB8Qc5`Es%5 zd;uI>!tyi3^Ti*E9Bsn#pNKb#H;Eio!t(pYn)3y4>AQyo*lr-;XAfYKOy$k8UDhpuP%P_9sh(wx6UxVC*Sc-cx~$e zi<_dRios`m+>Tu%1KF5Gyw5XXFH!OTsRYt1mQnpD7LW7UCH=AMBHroz?8!6`%V-8E zZVxAJJlp9gh(8Y_F*lyAGna^G&E*o=8Sfdg_(BSqd~S)igF;{f*y4YO9M}Lh6xyEy z-@dDjp=vg@TXwt$lryg7V%PY5YR&X{&-aV{JJs;ztot<29|xT*jJg`^3bOep!as^) zt&CK%J;a<@b5y|p{k8e9;}7Mdsy`}sGDdiDkz5SfvP2GaOD;psNr<&ZqZWTS6;4O= z>M%76d3AqGG3M3dlUT<51yu9%*rvUYV@eNQibsbuRUgL`9dmS4!}@*$zbNOj{<$2S zlvRDyQFeN;5E`5o_*L7S>Vu4GM@nQ#rJ5t;-rg=U+SCN8-F$O zBEyULPXMo~iRFlyc!c=C>y$*&0{aqm@F?h?C^pToY2g%fgpsV`PduB;l4 zcW}k?=S;1dHFr*>_x%^6=1s0DpVoE2@KHyNnmBM&Y51bjU2g5o{h52Y^liVBoE}bOAHG*jy&$ufRlB|%+s*sA$eTaCmNHZJ zqAX>OZ^kNT%^A(T&YSg~UcR}FQ2moosh3~Ys_FA4Pp!hcxM}5!@JhIH?Bv;zuQjFK zprw}C(+jgNe1%-|Vqo8wN+0>*fozW*@W&r8;P6C89-5=)&YfMEm_B!2qTk5ji9sh# zDW5hCpAsvbH+O1zW#!y?m7Nkj@(;`Jp6FIk*rTwp@UTS3dF8XqCs&qtN*s?xx|VB^ zgL_Oo?BFT$CeN8VGcm7x!K_MLkP_Vrdv!as*AI4i--Zi#DlA8;AFsCG@b`((?EI?o zMOFFHE%E((G}{k+R$w>~5s$a2cLjTT-&Oz}F2iSF2I?(mLc!hkc(V*2NyCCtJO|T0 z-%n77k#aGjYXg$@K4nQH!zKHpENX8Y>=mGp_ShC@ZzR%g86<7Oi1e$x@ls_u@>nnPUA>h^yJe8{u7kY<6AG?uF65}a?E2v&3GLNJboS0h z+AV{m_aN+{>Qr!LE07bl*DPWWUCb$a>yUQK&hYX!{Bx>x;+6 zRQn!A8mm|VSa=Th4s`;^dKs{I>X@fo561t@go4u}Bdg~=O!jrVdbxktHq@I6 z32e0dl$5SFl4VI(4~1{yeOm+At+JZJ8d6Clg4Ed@<_5OM(;7jwElzzNsp$}SJkru3 z@OY%81LrGe{oFob;1)}Vz_wsirgl06c>C5EBDc|UM81D(3%X!-BiD9}Q%isANcX|& zH}vo`@UceWwS(_KcwdU)g))x^lJ$|zNfho+Vl{bPWB%b{KXHgST(mz1(3>cEw#e%Q zmtQQNF0K?W6nVZ%94{jUQ|&3N~F{>nCrW-Z1Z$<72f;Hf-wgas5QIORUd;1#C(PUmktgBS7OU)1Th$a1pmHEVXpAX?4NY7EFJ5WOea z)aHAbAi+Hy%xALgQB1NACFpWIljk#eu`$o|=}&24>wB6<9v-ISWU2CjRKQ7y ziwWmEwUaC|4xi^9cLN-z2ri7tM3$wxWfI6JLX0f3yM7Zc7Y$MQY3zjW`%UIe!#~Km z6KBtwGO=4>L1DMTiG^LKFYG#c=$MJc$95e#dD`T86GwF$Tr#nA{_M)~X%h#|t*Dq? zK937@-QyVaYM07ypx>ms-+WlRquU2_^Mm?{4y_Ix)4pq~Lpt~Aik`y%`96~xUnc&x zdru-aL49I7>`2+&sONvL$07XEpu+i_Dw>M&9+Ms#gJ(k8+DVI;#P`=cysuL$<&??!uk?soQS_OUd? zlKZaw8T%bM1Uy21PNMNV)|C0+&uVx?1TIlf@ za)JAo;a0@x_S@G!mMyTye*rGI^{tN#Y>HI)2zvX{$8u{OJUqe(uWjrxVEed#*tV!W zeitMkc`mqmo$MIR|EBs_N?c{u+LVCy@(fCc|K>gxUTeOvk0rdzSMOut^}gEu)3fpN zU!{+wJKDj%ieBO%aj1B#SSHRA=ZL3@Jb!8DT=6pT3h_E|lW60hq5p{FC&lN)zlpDk zZ;2m?aU5u@uO5kWwxQUR#GkTGVm=AI!$ce3iSjbZ^uMM4X_8^ST3-jB0cfA+1j+M+ zv_DfI&uz-QE|5GoN!J%MRPxc{7}52~oFI9Q$RqeG^}X!lH^q8%@7XJ1VejK!ZVfL~ z)yBQ#z3Yt{a+mjRVgSA_7ObyRd&E!PS~2R_9qo#akNMs1eb+0#c4z$D|7(hzMCQ(n z)m{SM^YVvycf7tWaQ!Wn+~!zcTy-!w1lQSnk@2==RR2ML%Oy}mk46<2iDgWp6wBgx zmEdLQ#`^MnLeI)_6a=?YsoxaK$y!03>zH#~6?3vP4(GzzS-C*ElLZrjctIyF-DMEe zf`v>T%%k6~fK2zbB2clgD~im~TBRO!y;nIpWsu zWx^=04mk}L>#{cnTesc`D9%`LGAsA1HIi zdo>q*$PDOaA$b4G@+y`i#F7-?Lxi$X__dIS-!_Q&TmZrS6?pT~{VsN0KxSyk5~*Ds zO6grs`AO`N?>kw(;Z7FkR{!-5PU-HqC=9E{KvAb;YZuWB7^o3Sdd~DelcBPfU;eQUg+NPy@&fx#G=bn{adop%A zP{r-2U46y>&8`_c(y9$|*+a)l=v4ldyH(OpgV-GZ&AlnPxYkAcQVQI~5acC!aNTA_ zXJ!_il~Htdyy%>uXl1PET>sdIiykU^u;_uJ`-|Ag@}KEr`Q9Jg?J7PzFnpCh7Vc{o zczb2wO*DMOG|}Vxd_E60MWhZRji1fR1!6o}6BWkZB>=mGp_V|45?A7dJ z`6qNa9fDErX<2f=A2*6AG?u zF65}a=U|V|AGG&H<5*_H9`#&s_EsPxYVY-kJ#+)4+P4mAw+wA8fj#3>{!(;$?`7>szyrWeJnNn$~lgOe&yBfs-9N_J6}g1i@oi|KJG_*Ag^a6|6Gvc z#B$O429Uo{@>1~vakY4b==xZ0k^DRH9+Ag6>v=-_llXUWtN1aAbM#-Lj{}bXz^so2 zwDByk)1LXD`P3r6SaP|D#mx@SN7~~v0LgQZY$n=&Cdj-GFuy?LIY`;{r3{f=BJwXW z%O{G{McZ!3=e7Rd?MuNSu2!B4`H6w?7+A(tUL?PIhOi=nsVY8nW8ZQ{=|?R<>xgHYYasFF*>vo=vHJHxz< zv$KLQ^9^dVKSMr72QcY;jPj}DXNMzb;xF6s@g>O2peu69$EXDae@M#5Xd@a=AEWWm zXD5s~6>){KuS8DhCsb=Fmob;2e3Y1vkxBg_)#9W`ehE*>GZAZJ?29=Ov4_SI^fEg7 zG88e^T1BfP?nLq)L@$>q4tA;YV~Q9C!?8LU^A}Ogug6yHy}RZ=>t)2xE8BONzvM6& zo~-C|A!Z^vw<4xDBC0zEDeq{+@rY3mBlgOKT`j9dkO{=<9!3WtryC-d;)Qdg(tw3N z_??0n>Dy@mF@Z=2q!l1{D%0df#E2>_vt7|Ph3!FR>H#ENj5#iBbP3Ro(eM3|zOnH& z?h^hDjIVhZXJ^j|!wU~6#D@)oszgu^zxf69OZqV`Uw&|W@5RHr!!PxJezc8^B>D24 zCFyZ{0vM&9+Ms#gJ(&Kw9ey-dFm+X&>sJ&ZZuNMlNBA?Iu&R)&FosqG98$Yu@Is%?? zm4dF`Nk~WQ-G)Cg{2#@7neXbY*|)>F6cZ?S!P%ROjHtaWk-mv9>f33FiunJ@1!s@X zD^Yt-MC^T0-%e-Pd(|0%4VSFhxAPM0x&4Mso?73lwG98WG1SLS*cTtAYhdi;a1r}u zy^Nbh%fwGJtW?4YAh$C^&Ay%2BkTJ`eLI}f70fChxItC;fDh9zWx*_h8!T*z?xG z&R6N%soAG9g!XVu3>WQ>3uNn~0B0+o*9qz^7Ec#fiWiF3KImN|`9|?(@pkbp@lo+v zGUMO(Q92L@BKv%-PX`=E8SNOO{MnLGjn%{RlJ(W}RcfjH{lt9H{+dCb*K;n%>pyw4 z$m=)dY2r+=LaY+c6m7df|1!xN#Gi=PH-_?GO1A9>`5ws+h`fhspdjxSzZ?9V1_nFh z+gs)q?r30MPA%hkJ7Wb!X)h{kTMS7C+pQ9&;0i6m;ZIf|ul=fXObU zOoqd6ri3F*kHtf;SVdYZ)gqy}>-2GW{J8{KC|jn_f_0 z@Oc!oyQdo;Gx&&-O@}DI2gO?aWSxHq4Q{_L%I`3w@a~{`Y%V{=>dZ*qIZnG|C1$mt7^H8`Hnn;S(Mk`!qBs z)tO>FGP@4XaeXH+neM$|$IBju+o0&*@?%Q(uB4tDtx7j=$Er)!yPH`U{sUbtU+A~Q z>){adTN?VG@mtbG;(NcP@czU{1BS2C?-ISo#Y1zu^t-%|XZLKBHASQjBV|5!yEY(c z|4&YdWVmF1l!cF>)bhMfVQ*jhUH%US{unM|zs}w?NG{ESTXFwi&V+(1n*=#pZx1|h z{6F@-1h9(g>VM|Vyd?`EKoG=;4+shhSs*|_lot}hPFR8>QbPy}UH~TPw9{X^<2|Yb1X5|NGrJci!YBU=+mV<0kWd=bU@) zxp!vnEce`HRzt@9pj__<+fzCXNF%3>ewXdA$9EXoJDlHT2JBH!2c6d%2)yNc)?=?7 z;&l0L1+CN2#sb*;Z;wEeHzCez?^W2-=k0KQmow3pY0H?JzXaRncj26Kz8LGk{a|}ximw_k;{Shn=ag^W$ z!6||l2$l-6LQ;RZAiIXiUn_Wn;O&CSZ-Dsi!apkbv>@v_)9)1gvc}Y~uG1egpNRYz z=pSKCA|?vra#Va*LDfb=Jg;TyWeW0IB!8wLo4VxHaRbf}ewHBHxs1O^@QD2+vGbG; z=_eW5WXV+?Nj;J=J87fQ^Qk7I*9<*73H#{v zlkom)a)Q`&HW_1Y1g*ZL^qk6R1T4zn{+y}&~uXxBErl(w4Wr44h~kK&>U(GB|6-GsTJxQJ&1We&?@``yDtuqkfj82TU&nb$ z%BOOCo{~OKcuJ}8W&2dxI!|d4O4Amf3g;;uZJ)|*ax4h?xXcFaZNtw_#&>ieqYs2~ zzN7G+H`b>z1r7QzZ^LEhecguGxXq|>O zE{DCBJpxVMggCFg>IC662QYXmPA zyiAZyy)Qf#<)W$@)ftPyC|QHEvIY$vk~#PgK9)h*L)z?P+0Is}XZ})GuHxLM@{N5D zZaujA-yP2W)wUD%nZa&P1or=DfN{`wz&IEh@eZ0}0+_}lW@7V)|_LCT~lH6qP!^o8ZPk$JheEK${$@l(9a5ow^ zZtK|O+eeKQtmq4kvtNcr`-5vfHJXw>odmwH{<@@74qo?Z_ok!|e{}AO(Z5x=oX`2y_Y)e>eZQb|yN!tnzObSr; z!9R>%{|P6oj%=$O{pNW?iq$9-btr6p`pq!kg+HaEe&VPI=Li0wL3l1<{K~Hoi%;i( z)@ud-4r$;j`XeJk_;JV4sIQOOK~9gt;F;^F77CsPh&qM1wv5F!cxCVmCr&woXE5qU zeNE8}-3=K=%y4ZRc!DxmjF8<6;5Y4c=KCm0;1Q@80eYA&3%m*P(!d&MUlQO5msNpt zpnGwE^R8-*;CL|hwQA~A@HU7r;$}Tk1hbgErDN!G6(hK@07$vOf!UW^fxB{#AWX%+udbPuL6xmrIOzre&W+&XkHb?o)mSK#M5~+!0$9i&@Tf}K&XO1eKICdJ!n>R+*ajq;}T4U6dEv_t9 zCC!qtP_6^5?UTpcY>GxrD=IF?9XnzA)KP}`>Dw+U{@@~m!+y&&O4h^UQ=C+laS>xNY5bmyL3s#GDGbpIaz*5 zohLV!Y18xaMopXM`TiC^&c&1Jj+FWWp3mq7tE|X@(mvMt75JobfID}0gb z%7_9LV7-e=h(5BE9ZX8OW!TO=>xWKj8DSGSGoW;hHMAi zUv*~(*8>~%@Ls7xtRCYS+Uj5I2i@3wy$^i)+Zgh&Y1`!cfT{NgG&ursUVqkW@Mk@V z$P*xETZH!LzbnM1(|}ap-}-M75_DV%cuh0v9qc%lvD876{CGj|j3k#{6Cud{t02 zQ6b+YJR5Y>dr$CyAY1p8C*Z&ly9k~xIEd(%b)tc1k;kc>AUH+zIMs;h7l?eZ@SH|P zeSXu3@f(D{M);eB|AFxIMNt1f;kOGuFZg>wH983P7+5~mR$`(c>k;{`f~v6zK27*O zf|-JRmQjDWU_@}TV3FYYg2jRt2`&{}CAeDfYQgISZx&?#6Z50vhWHCXdTz)+E%<`q zOM>eBBK|eu-xU12;6A|*1e*lac}BVbj~|e(9U@&r#FGWn1o@1mJWEj51Nx3AA0t>O zI8Bi65Qp>4ZWg^1>ft2m^Amk%cLu>!b;J?H@o-^jDgFecXoOAF8j=+ zZcjYW{np4s5&B;bHteb$FaaLfVdp2m-HkrlPaB@9Ev%oNNH6XBCjV81^{-WptRL%J z)0Eij)%N-IdG@pWBSq_*>``yEA6Y-jx6xSJWKpXozkaNJtt)?ee`M;~CSR}LLo3hG z8ud2Pk7`B7vAe}sjnsc{pI1N1I^X#9etaf!r|;~*oW5h?)J+G1xA-{6AhSWFLqVCxYXj`-S({BRQ)ML=fDO09`3uwv= zeUA{bO$XitME$Z4fHMLe@q1a|A0RIctVW)f1UR=|`(^(INsM3iUWnj}y%s5g)1ZnG ze%~h@B7L{n7qs@v?tuvFk<$yzzzd4O@yibU6l6ba3EziBGh6(!YGv}ljGKooaSKf- z_E%&ta#>!zi5y|*#2zH8+_XxW*H$85q@38fWN&9SL+E|wowS{8=5Xdf(#y0lj2R|z zH9GT5<)3vN!o#0~2HnPxcQAV=bxN?3PD+{{=wMDYlW~3eWMM4aJ*`7cuKWsov|hJt zQVX{%4+~wZ#9a=ZN>ul|m~n!B2&oYWO+InZAnspm(Z7~%DDlUR6a<4BX#t%=74!co_k9&N-#EGfu-S~?QtaLrT z*`}3fVwEqf_dX&!$7&Z=9^Z?`VePN%wK*sp=jI(k)I(ZXuKR=X@m$&=;q}0f|U}SwDvcVs@!j4>NMXsW! z*SE;y-~Damg|EoR`^_IfievnB^6`2f@%lv|4`o!ZtUv~~L;vj&XmSMN;I45)7;Yji z#6sT>nx*Q+g71j2KHhF&t_nz2)2I*GjoroBlsryc=w^mF+Sed z!JzVTD?@s4LUa?m+=P#|0DQy_3=J{N>88fLqwGOY2nqnMBGo2 zzbm*;;;~!G7s-19eUj?@%KediSCOk`C-{ECXA1H@K)o{sM+uG9|`_caI0W|<;FvX z_fP6E5cT=pEP5%FLrI_CjDbV6GdRrfS-#_eL$Y&}V)(Pa@%USm2f zydGZ(*ts`Y`{Z8V!mSO)!sQL8)!x$ZT-0qWmjoOl58ojLQyy~^p&s1AA zc{OWmo~f~x<}F>j^qHmf%T{rJlzAHzo-tg6zg`KN|G*hrg($d2zsn>(e=<2=uoj%P z3%c%i9>2o~JE+b`$ges{Lcw1^E$V^2i-~6PM}5%|+J688+k6dx+jSGcw&yt9JQ(zI z7%aS`KR`}_H2d^m55xs?GYz|6@LuNL3tX0A_ZQ9%<_<9Ibm2lF-lyygmCDyEF*v@` zurnpHYjAwIVP^@K8XP~@um=biHsWZVwK9G^voZYpLE8g^+rcH6m!ecy#16ExN+Ld2 zumoJ&(O)dB^5PQOBO9Et14JpQCd^Jq@vm=9X4xj*|J%4OO}=OFP~f1 zKRZ1;eL(-g*%%--tE_ZUd1ZCkEHrTY&o3?QpFLEO6-z40`j?f=DW6qdQMzd9+_G7V zOG+2u`*%mhn2|RuV|sO2RdvRN~?i_1$h@|Tn@U0haCQ=Q??Va+(ym-dd*8gG^5 zbBoI>%4^ieQI2E)Ktmx7e~jUZ+%SnqxmqkneR~{}Fi|c-PAvjGq$T zU<{M*c>cU4RT!t&e`2-~XcwFq=ZguDP4)hid*l*|Fv zR5`dnQyk`Jq|Ys>DKXOLR9746?zlhih2HkDebmG`rNWPOXnB2lyI^= zGF7oCh>>2pWHE1J-c%Six)@4uJ*Jn`)KrzvSy}_LZ4X~3KhPLYvGsFoG-P;8xnUKk zWgdYh^C0)O|JR{YdpBf!H{`1$?S-&S!=}@KG}sUREC~rZt_-}U8TBi?T!cwT&~YW; zz4^jLsoqzaFZ0v+t^lpmfHc@k&i7g!bX*MtUVE!N_V5Pa+PfOGPD2~-!k#k^hg>vn z18A?kYhjP&V)=O8=FBu``vY59Je0|YQ2H*@37sYgVy^w1f+G?0==+i zfXtWSC)m8@yUDY^JU+U7kAk*5ew$}uuPuI?Cg}YRX?4(LB6@bu$icw~Lr5P0{Q=CE z`Lk@u*9|jJug-9}=KJUoH{184;kV)WiUxi39LbmAr=kCf`|pG(MV@2xyumWsds)PH zG`c~;W6b-p>zDD~E3tS>bo`w+Li{tRq^zGDYp47(K;@qSD*p^FhTe?F`*T0h8z?wT zFjtUepdDWO#F>I6f(rzf30^FCrQr7jd5tjr9fDf~?-SfDH~>3Ny%B;1MBIeN396

    ~& zT}Wo>wbZYr)rNkweed62ZrvUT-O}87!-P*3?Mv_VYi!_`g&}1-w295S?Ig>CaCyyiy z+{CCU9k{q2u0Q4YH_wbiRLAuY^@FJ6N)UW_cG3zdH$ZX?B)E{7kly$cu$gDlrb>7x zSe5Wu5S_GwO87sJNJ3VBy6((e)&-T2l}IHd(McRY~ad>cT>r zQ#mD6Cz5W3ntykC5z)Y0?`s5z_t(-Oya3ai8uEx))Tyma5PmC$h*4! z2p&kBBW#x_JlmmdVnpNs6?hj!VmxUplW+2IUT7Uz-0$!JnM#OY^TdKvfeFLdFsg|V z!3M1)u>np68c@~EK!tDuD;P_Hu~xc3NZ2tZA+=%>l2tV@YKwL5vu){$cKD)(VXG%L zXc5w|+2}Mlr4ED&G~-j0?FjH2aVdxJ^6G|QoQ5Pv?B+Q}PL&DebE-cOk zw2ZNigXpL@hQ7^SCTBHST&<;xtIMm4;cQD^z^c+>aXh@sR@cl$`yTPAL~P72E~!}n z4lgKpl&I=u4Kz=)eO6QaIDDdU{nB(rr+ery=xdgav*Kp-vQDn?S;w7Hj(_n>StIX= zoH|a$aK1*+%yYxFhOxQdEpS~{%Hz}~*Oxelii`P0MdgW#PEvNwxvr#^CgA~Fx~RsT zYTGu4SaI=`-2D8k!Ohw0^ZJZ)prOkIA-4= zXzAPHk@2{y$}8qA(T=H-IdiJYmU&|rEh+V~UmI7~*J{iY&#MmlVLloHzI*CW17f?n zAv+Qs7whZVhX!&ZBKdm4yEyHk`P{^gajQ|3Epe3D;oH03)3E70kyp=Kw(a5 zYZ2$Q=bb0ZX05iz{&t-Pq_G$FxRQ0onfds~Jdt6Y&#!cem&^+^Hco>_vd=by_MH>%JPCVk z@tu7Hz1MXjAj`%;^z5E-6HW%}0ewa~Ux-xMkgpq_MLj*k<)ZdHB1P(a$b1uhXWspx zuZ+iq$HNIcLebEcd92!(7D2L>zBJsMTlb}@#~B+*KGa9nf6iCMDNu;2qEPwLaGraU zhZ5WH)Kk7RV2<#k1Sbei5xhXKRFIX7>6Z&$DtN8n4T84|{#bCkApN{d|Fqx>f;$EO zAow>ywos|BmTw2Dkq*EcMZQ_^$3$G`_X~0igbx?bvl6eyJRts062DvG_X~3DDbv%@ zM6_@LFntmcJZGR0dx)Hqx){&-ZImmI3vjr|M~i&CpmJ70zf|H?(+&E(FEKp_HxSnd zepmEv6aEfCbxU8 z@BOrUjiBA&Zj4dpW0j-1%p3j@VtldOA#Z>$R@E^x z)WAdJ^H(sXFZgG0)-GsTBPQb)6Fyfk!VYqjG`z0olM4lV1EOBnuHY=X8ErkrXe!mr zP`T2!KVe$ieny$FFNe@CKGj;}5lHi=x?_y|-DNnC8e`-?ML0Fa$R8HY8Dr${;T>b- z?WaB7T^KTWuB%P~g0(*3=iF-Gd{ksUNyDys&ibv&%uK?)oXt3$U_*ZE*2 zhlh0=RAW7?+)L$QB>@j>9zn(?bx_mlVUxi;lgGRx-IBaYI~IZ%4+3vrsPA-fE+l1i zW+GM@UgPGOyd$YZmw;7?c+WjSD|BH(I!RSBK9u-cW1h_$l1laqos7f@T0!OaG9(0V=hN9L(ci$Tyr^=5j#P={_2I;?(Wt9qGfbnYE8Uv|lc?$y z^?It4|CDHSUq_W&sfY1kacDX9oHzfoxi z+U`fiC7>Rh`dEQ=L&T*FqY8??yqe3U0W3f{lD!Tny%KC z^oFW&SSYbquiyE6$33lITTiQ+Z{m1bqyA7jE0ves9pV5D`BZF6k7!%R7e+m~+I0z| zpTp(aHdm|io<;{3x?WX9wBk_xI`~fA2N`bDyjABWg(B;Gk@e;UzroUgNng>}K%VpC z{!{(r#A~Apr{S0WH0>jD+Br@ff3;peq4_vwpk9Q81Y2-4P^Y1&2HTZqA0K3`3wqzlIKs+Qr& zUZj;Ij(V~F(|q{1bQ-F2KNw>Dr|)@=AKy{+{=Ntrb+nRc7;0c|h(oGh=E;C+5)!l?(X)HTm}I9O&`+rIg-D$XeQnUh3S@8w2?^Ss<~4fd$Ni@%?pVYK4p1xp z)0lap%^uXw7(LWS)_?jLd5(!~^`8zC{anEULEc+vXQp6@-~z#Af@&-x^sW?M`P0DP zBD@-l2!4z3_X+M69DvHeeAw?p)c#S9p(cL`5!dhKf*i+1zvT}kzL~!i^_gRg8UMWC z4kF~re+v07^04=|pc**`x$^J;O;miwbD#mSi{MFu+Hb1-rO;R3>V%&1rvOJ$4{|P` z&-DEM0x1-eip|6Uhr>%?+Csp zxKEHbQtH$DM@$fGFLE<<2ThGtZkFubYOO7wo+`v9L;s` z<080zQ_j&m+{{Zl)KEPTY%?Ff<|YW}_>T?niGGi|W{8h%_(V$-1XmGk{|p7elaLIK zP$q^Wv_HVI{T!bFCn+C$fcdPAW=LI>A^Sp=&Mu)aWWNK>uA=B}a~;(EX};5gJWYYz zOvBeNcq2{p0*9fU{e`mwxftA;E?g-1CX;8VRG48I!1z*MrbKoPV0@`BOSsek#+UjA z2p2X&w0;s&$1PzthMh-C1A}*hi#NN2G0(t{^c!G?$pIRq`VqdRnEPM;WK*QO36z1gYmy@^c`Zk%^CpaAJ9)>p4@G zIrqnXDR6d8iR8!Ir1%svpPE?mO&L*_kBONXqsuDFsxZ@Rt~0EzIDgt?XY3arcB(NL zou}v-5~eN+84}jd?5rjqs>Yw&6l~e%Y$;L7&BWi{Z#U?MxqD2bt#Z|xRzF&)yuve` z&po8k2Ddb^qbp#w;vVqM%=@AP#oWT89~mXW3`|uR$^KY>Tf&)p=}w3I3Y-djmK|z- zA#Vn`gYk1L=NGyssO?UKugj<_J`DLl@V4E-y1{wwqTd`6>go1QwyWU~jAJ+wpMm#A z&i6ltG1#wxA^1T4Bm2SvKCD{oMO~z(EgCg)c4VBsHc`peGI&L0#O*4w! zZebD9-h5N=&Ylbz^X0o2_k*|+n@$7LxDfWJr-P1L3W3*Nn#UfVjIO**)U}9NaL3 zY&WtE$$XhV%cko*NFxOYtv?9~+Meb$dgVu>jn8sLgFbqWiY_>>1J(u_g>jzP?Q_PJaF3ZvMudD9COvK2dZ{G@I=Prob@K6ecO)+`9ML{t_Pnh z{1`#i4uo8_1A*TW`Gta2g1la7Z?zz=Bl6b?ZWL7QI>=LT!WrLJP&GhsZDf-Ns{KK` zhewh;gKFmqekjQ6viV%XoUDOP!%F>r)?C7YL)zXByOKA8mhCXl{J_f5oQdUJCo&%8 zRS4=;y5>J??~vN8I}(V7@Be|BX&`w=LSwh!k z?D*gy@M=|@#Gq=e%c?jXf-ka&y_{Kqb|`~ zvNgYdc<(Im8e>m=jz8=8S~p9Izl0A3MjMgNSX3PF7W0l!C*65Rc;0y$nd({NHZoIi zQ$D`JjasbeOPNgM^iShF9hHec@M@{AV8Q<;r>PLHg^(w-q(||Od0`njV z2|8{bcug~keYs&05_H@g@ZNkeoI>pf^JRWI-`KY3EwJa^Uu|z`jJ?SodwBJB?Zvi5 zImUgvHUd3O#(05PXyJvH;AV{jr+w065FH~2&(-?o#k{SqHa$eb)uNVYFUDK_)sGG47hJy{Tq~R5y9ZzKvPf z_H07PW*@n3oz@~Jtl1i!PhmHkPhmHkPhp2;T7<0G+H5|B-E2OE-E2OEeVF+ao4F@4 zpTgwyCTXkEljB2Mm8&DEwkiqLR?PzO?P;rWKfS@rA8)H3i*;G$=Bvj2plW^LwyM)1 z`t9w^bov6ny06STZPg=Pi?wA_u8m`*kFde2s@Ip>P{odX-P)wQn|)Pn($6!<`gohv zY2)x6j3FDF_erGNEMp+&<5!2tAj&-gP3A-HZ5#GM+hG@Ee0ReupWC)60+SOz4aBb2%VXrN1(mri$ zlTJm!Ip2SS#$f3Sei5LzZ*^+x23_X-Pv$Yw;wlbsr^U84`=pnICbW{ zhEo^*xZ&=Z|7f@ZxPIY38txgk1|=Bt#QuiTVNaoKm7_}%2A_#zlFtM4=k{ZV{{=S= z=e{BBZ8mj3Vr)!6^LIU>^w3)~@N*=Kw!XQxwVg`Q8RsG;8sc2W)cyzQ5#{`~{c3Fu zJNQ1c4Ea^>b0~Nw)7U{a%k2&Lv3g8^w$1entbWSVVh7b?9%e|5JrCJx{l$=d7c~5< zn9TXUbiigWZqWQQ%$r;q7?n}|f_)4`Xg?(8cq;Y77Po|Y6WDibPKi^K_a`c5YCQe5 zW+4@Q*B2&~R|qp6g7`g5HThbmnikIw@;FSWdbJtQwT)$(?i(#BLKxDQlPK5|o>&9jq`KTp^pC{sI|1yix~X&CL9>LsK~z6%6SV~5uP z{-v+eq}h=>{n^d@mIH?|s25h6bxG^a;$Vvr!FpL#jL%ksi8&$|_kuVNi^qI?b~F}j z0$4qK7|MxJ7CY%tMO;!eE)^-;>p{xNYLGJCggQj^M2Z9^?q4@dVsrH&+% z@@v^D&A)9(DdBD%${>#&Ux#>fiPWt;R)@ej3;EsML!nEH(u_f2RNyYZh7Gd3w}I5* z?gLav#jj6M>Xa&qd*KaUehid-#xJ08#G~Gie=exiaro8c6~(1Xs-vUuKc7>IJ`R2y zWJyIaK3uY>tlC-K6%}2bX6q%x9Bjp>V+&hz)2$WhASR5kPDr;Frps@?bnD!7t8cnB zBYpnhewi6(Wc1I(7l*8FQBRy45Z{10VLLk#^};a=KNTZk?QNsjqvF zx0a+^9n!5zs34|N#aF9e&?)INF>mWzJ+z~|qKF4yeVr%jHLF=rhOfpP>rwQTc}uF# zDOqGxPAjhF&=vyE0J zGdL^Bsu3kJN~2k_=pc_~;+gE6qhr4dk~uJc_ETBiYNT!lh~Nl4If)!@DMeu}{j$&k?=TuZLKt3m5DAdUNAk9s=j zxD60^?LFqP$7Z@N-|e7v8rpam_9nElzqcaJYi|ea@jS77^xkND_kyN9)&~YZ5S$aK)h zq5}lF&NHqKdT(eYpw=ULcF&lLgscZ_0qJ~sepoiIz3r%{gCWyF+ta*8ul#7tlVF*m z!B$NzcW2zA>1bH))vS4*@o2D`9dYg-YicxDhT{;@l9qnH4l4g>{cT=4%UL2&Cx?9; zG*7TF0*Lb*c#L?jp`Wm?Ctlf&d8jv=RpGtwgO0xapl-vS57#s<2Q^f_(;-hu0|)hg2cYA$eX;MAh^Is^bjI6gjV9#?#qG94}ZX zc&_02g5`pX1(yo4pM~kS3I0m3AIr=91akz33#z&Eh@U0=TtPmIn66roE-dm_391hu zgQqi!a&>%w93exV{Yympqln6V2ULS>fQ2IGY!1esFR1D*E?0g0up25~A747FsE;ac zH2?N=&X88eCJk-<+gyW(4$gGk$!%Bw6dEj||*u-Td5sBk?zTjHJT) zw^wd1D6D_);*>p!cHurFVBc!oGImdbKXp%H;H5@;*XBLXPaeM~A-JvJ(SkSrY0Q7= zpP{R^G+9?Yv?ma-n*6tw?+FI2w3iTbU6VckjemwlrR<5fN5KNL?}zrNq5{KLSik4e zx7+8}kGGAcq)!X$cU^2ZB{XbqvPU81D5ff`e}3iI`g7t6>z`Wz`}57)Yx2#Tki&A= z8O7X~)0Pu2$!+LDOQT>Z@NZa|M=OK!pJ_@Qwa1OI4j^VAV@}S0w|znVsKCFvSa;lu zJ$+~83420;(R<>8YYP5r&%2lPD|qRj_WctJt}C#1e%fWjKBM5@d4WwQ%)S-6e_t8= zfp1gx*gtkl*%R`O+7oA`ow%vs#)8GU;IWTz9rpZF!B3jZ`ybiki#MC%9xdEwg)ZC^ zNZ8O6x~j1L^<@S1;{(|DRc|1V!ul7gji$s;^6F<;h4sI!+R|iRwGDOyO$j?p9Ldd1 zf%&D#V}Aaxx)$fY-~N*>BkQqNbd&vouPGsabCa)EuYBwFr<&|uue5)?OKv^ZXK3;r zFx7sV=85@Fw;x%b>-$|7-)&R7=I!}g^#gm}y3E@7dY3i(jFG?3d%4jFCv1Iu_da%~ z7!RIuqdATBoeb8#;M2*x3>CW(1aBDLfH7#}ps4-ncJM5wGy`uc2tCj1!RP-8I6F+e zGcG`CxYfCQuDu(yHKLLd+y5dZ1E`a`MoEJ2A+db|CFk8lNl2|JZ2ypoJ*GiobHNO| zUm3}#NcLY&5}RS?T!mkFpL{(TPQ#hAA<2)6we<3jd-gY!SdB5qP&NAs63db7#5 zo`7AC-ynVYzE4e)jMW>ep%sSjKjy!|8gb?yATYD>V;B)AGMHSVCjNa=gP3S2w)jfw z4ff%89$DVK%pqjgflb(i6y{JW-%a)%#tz#A@@cXwT$T@!L^|frq%I#3$}z7v`ri}j zoLAgW6bI+L;{FF*J9^}YGaXNFA|3LI;{i|j6bj~9+^6+mllYJxiH*TL_e6-=cLUpr zFIvfr zeh%s8kN5cXaZ9HopG$~{*WcsFXD0w%`QqkJ1)Id>cD-x&;!|qQx6zWDFT~qHJNY|m zCx54CK8}+=#pC2xj}SQdiR$rUT#`oQQaP4!$xcPEmciqn2Duwf2L+EmVFFH$&$uB% zq^fNkFeke{VWwD!7}Jc_`aWm4c~1e zaEGu=F%xk_F{A`87-bnZJaiceXV0fVQ3b7vBR59tf}WsNalj{N-3SQB>@2McvyZuE zai$)-%&R;V49Y;bRFN}uc79}m)rV>jgeYMW(zjcIETRGam)*QA4sj!)`Hlpz(r8kCO3%5WaGn7-%C~3N+|qM-?Y@a zBv|Q)t&_1zi4%Db`KWLA5AD7^>pnolL2R9Q7y|5&aie{RW)#+^HBN02U1@wY#pa`gtQG+b46o+X*O zp>gE-WNdt^_6F7m9cF<(N}U?V=;L^YT*~L`*Quf=(COwO#&M$Ah*QC~qG6oOwn@j~*xY>UH{njHTAn zbSoizN>)D-?b65eAKyPCvwP;{8U3xAu$35o=Z>@LewOhIYvm(Yc6pl>#&XPmSe0(A z3=gtOxGM9DO7z!NGpyxdWO8Q4DLp2hoORAAXZ6qOm)U=9{|s2l=-(sbXJ`Ea+P7J2 zVBjCCYBI23nrXtrJUAP(EWf?ugPoDNU(=qBBk9g?Dy%d7*zIaiog`jw2;#p;7l*DF zEjv3rAJTJkg|^dyqB=jCi7y&F5Y-C`>eG9NnhLw9ys}tnE-7Y#)m}KgA+7X*xK13Z zw)~vlq2|vX^PUmMzu}!1o2_r_K;Gp?CZ$Ez#YNVKA{&B{D*}-#{gJEe$kkTl8eil( zvmj}*)zM5!gMW!H6<_jNPObKp@CYC8D^X`nKctVOuf+Rg*Y5@NanWzALnEAyY~yyp zMjdYC$6?cD0BO{q{?H$!gN`eJz-y1r*WHMuJ-*{=d*^`GX+RpkLqu1PK$8n%^!^Ti zQl7`jt@Y+Y&ztXVWVjFIW4@H@e3!@AI~9>($aK*5=p*&od##((5TQMKptZfLLF+Ui zjRGX{gERt%&p5>xxb}ecle&SMo9n zzbD2X^P^9f$TBfJ41eiG4yk?_$L&c$fC~MP*%-|Ld0ZIiHSm@%jPkL~#Qp7rO&`CP zK;v{)0#vAhy&;+bGEWBj#673oxF33L=_{#(^O0}4bk*p5Sq_%XYwt@hb$^3-Y?B{QH8uZpr^xQ2F-3KQ8=>g0Bd^Cite{yMlWJKN5^X zg`?fm1k;JQ2dc5#K=sYGc*BTD{5T?bwO%jMohLjS*0jS`HRBfxulfqWuM&QP#H&6P z=-(_n*XU!qUkW}U_>$m11=WYpkgid96ZL@QWqX8uSSdu<=`Qk~g8fB4iiq?KOvfvL zsLnT#*DiTp&qUSI1@;!cuOK~*j6X{-Uy%1I$|nn|^A28}Z{R|a^WH~2-Dk5-_$vj! zC%94YZo&HmpB8*hkoP&-Q|BMptZxiF-IXv-Xiz|!Ji2JTrjpT>1mNaCrGy|^WjKt z;#-363hou$FZhX|A@w6Dm>}3ukREZ`i>*&|8?aJ|_62;GYGR>mTXpFJ}5Kf^-v;&kzjoyyF3`>o-^xuj@ae6tAy? z*!q8%zP6zQoz64$>#kilwDrEWK||WU4!~R%2A6iW0_WR{`?h~SG-#)>AAW-UVe71d zqQ>x|JZwdcU4dPJ$-rb_2pC$FvNyP}Xs>@^%3iCsXs=oO%Z7r5`y1wAhQ(;i%9vkk zo@GHJ4;mIU@}ObEwgua-ymFbDlRq@S<37vRVP_~SlsUOEG&~pEWN4Ygm^v4fu^+2t z?GKs%dSxHJ?WpRvDz9z+3W#ckmo_D6{)3K@>sbfQz)d`r=rkec^Q(&DQw!vwpXM^e zS$|pD3 zy0akeg?7;7> zD=27oFncF;O0benN}3+%U`{oYQU851Z2@2ur!=B zK)lnTlZl%h8o$xNOA}oS1fFZlsF__yVxE#05vsJD#4079OyJYQGAdWqk+{W?6ZqBu z`3l$33trs<&?~`w=3q<2dw8XhT4VGKg;VP&VNP+bw2o{=3q?vQv9)&PT$H=J`Hi3fNR7I)|Vh+eYIgsu z#;0LJ4*)?_7kE_1C_Pc*Wdv1%s8)JZCu>#4GbgBOQ8tJiY?wwcftZgCvnVEDz6439 zT-Q$ksRC7oV}trcB1-}FiBKmg>Jve#K$QqKs81r&4%8<>ousHw0;xg-zbq`&3yCbH z&!|}iP$3n+K1JD%0Kc1E$|1b`o4EXa#_jz5d`mv-?#TAnCO5`DbqZ>JGkX}%uu}#v4uX?qxiq=eFv^TTe+p@EV?jHySv>O zI>1|*Do~kUU1P{30gvCjykaVy@>2)!XCQyFqhDY+j4!>sVr({=<+WusD=X#m2g=#a zB#z5`(UKC!(GFE+F_u}39Vlg^UdtNuIb7(K)2d31ilvLEm9Q?NWj;DDZ&9SRY^tZf^b#Yvhr%&u)+hfas~{^`3`T2iP*e8^*$6z z*bK}~N{+0vBkQfm24Ca~(>Lk)h&$`xSoqQ1`39xUuFG$_8{M6&ACP0sXRS9lk21sP z0U@4IcyDk*tRCYS+UiH|2VJJ|=DQiZ4*KCa76NUXaj#;dFGUAUj)DO0D>tm`;EZxO z0TMqp+6!Tuj!mZlX>hvqdJ+n1J|Z0$ z$L$G0El+{Joo{YBa6cFx#pW&FT+jY?M4aB=9iVZVDgi1?hP}4<$FG3iUvwfM%f>+T z?4H3~YY3!KgnF7mLV~uZd5vEA(eRJ+d_{vkdXD7F_~t@1FYbS` z8vD=V;RGI`XlOZC00+qvER1~SYc`L`W^C>nBhBy4&0OHkqr~5hipy(&WB-{05#1FE zPbA`8_a;KApU4La4in5393!aw-mp_7e2L%!!6ky12(A%Seov&kMff`ew+P-R_?X}` zL|pUF3;vFX%JquG|5^B5!q*G`FX5Fx6#AbEAHu<8`gTN=ql@sV!k;Sq8Nv?|ewgt2 z!jBbR`AK1KhVXMFe!lP*3BOGE)xx7V&HQuf{9r#>SGd2i{yBACAkUO|Uc=NoQ!rmp zogc{6`2i|F5pb5o&lco;pXo0YtPxxxc$wf@!J7nc6{N?3>3<~npy0!TzZKje_*cQV z1V0jN5=`cCfju>c1IRDjkv~O{_ZadVA51(`aD*WJQIt;?oGmz4FxFqK&Ij~sC4Q~o z6@oVkDz6>%?hyWmg0cQ4C!Q-Z%0+#&d?;A?{PkWrsLGvWckj|BfCXyIndc)HMt zT?AwO)u)S`BZ;X;9~*I`Af0UFrweL7wHl-id91&Bwdk!AyjJjfK@PK~y*fd<>Bv7I z_^99$f*g>}_?HFg$0PriV7*|2Am5h`_f5?Ety(>lda_i#;Nd9&${Pe=fNrRuexd zYP5+T7S`vCDXbqlwy=Kqgu?nkqs$TTXccHrm5`V9Wg2H{2Zd%ziv*_S=SapuJ`8x6K}nf#G{!!Tf`@FYs8ZBHJe4 zSj%Mx51mB!1zqzM2uf;66q)GD3g%^`w_7gN;^ z{*~t8G$j`bazTrz>zW>FYaT^m-ny&`lKm!=q<`G*KZmL8Aidithw3f~+3m^M_WR1B zeGfQ)6*BSPVqOoC{}R%h%uS#J_N({}W-~#@fSQ0{^+j}ONhQAF*)ebrVnO2zo(>&X zOwAM}$5%IdfHQfocYLZuGvU`14t@`G7+XR-*&$>vCi@K89NL|Vbcr|M$2^;CHK=yw z6_`FSVi#Cm`Cu`BK(U>X4D3K*&vDpnVZRSHX$4J1nAT{|U1uHdj?J9<31X6Yt9%K1 zsBV}W2cm;k=*Xwohmc4@COVY~rwyV$6Nd0orV^%t=%5u;!c0gcArqxDVG+-hO2|Po zD&e_Is1;Pg3!@2{XfP8_|FKSZsZMw!6KVyO@E(;AEeRaI%b;&A=c#-c(nQ|(9Cn9N zI{GgE!_RgQUq8NsiuOpWQy)+Tn)eSRHt!$s%yeLP0T(TjX%VS--)irj-e4k=WIger zLjrm?I^tAy%$BJTof6FHu%H6pVA>6DBv4rlAHIXMk?f#ao4=^o{&>kg$-R21nx4rB%1G5g^Hg_ zxE))|E{PDN(j`ICISdyN#$ZG51c7^C8Ou$TC2dKU1j#kn(DgvL4jZ~8O!vUj46j1C z)+>oTkft$%z*p~f7&sD1NlEK+O0RJ59%@-B?h`cds{#$2iVX&8h>n5t2xnt!hp!fT z3{d14I1iKxG?0!B238Oq1G5Mtv9&`b@fe`UF~Ad~0u4}`y#vGoZ0#`c!IO$2Cl&n? zDlipm40qg-IER*MJ|ojTKs+cs5}sYANRsl5sz6z6QXUTOuxYqEOOYg90a69ZVw3Vf za92%LEtMKYl5~|4;D@riSnRUs9>K1J~+;Dp;X0i@~G*w$dX5t}!7_4qXQ8K?92hAoqb$NC1{L)e^UxicOmI)#8$s+JfS3<=Wh>+$vi9chQ1Q>j|cnrNjjskk_I>gX)v5M4?! z-8!&q6c`& zqcqPQoj3H6NvV-_!N~eRWP?9)g&n!lid@AR7`c2DeaZ7KTI(<3>HCIHyZBo57kMAr z`jI~trxtf}H|zw(MxhQmZWIJ?PrAW|<99Xm`1-{gI_>eTmhUP$4M^h-w7M*hK$G+v zYMOeRVIZgr<%uf=?ag-`ItZSGP3Ft|biT_xX+Ro3Mr4?T1f3UO-@W$oPePLkGTMvB zrtMt?TBiYNJP&()NJ!9e>%n{N6~SI6WVFZYP1|FGRHp%H{0sILwsM@mk2tTrb+89j zWiJV+?fn=u?J+Ng^UxN2ImRC2w_)?@odzQpF@XfeaeG2g#Kx`A%h3#w`7%6;&0D@} zQ9gbAIwDS&ZwF|crb>VcJ7JFw8y%P@1N#x6=Y}ABV}EhE=rN7Xe<)i$FRxF9N(87Y}{`^}wrn5#W~#&pv$0Zx-YTTJjGFK176mY=40o z=MKHMMNiF-K>74I_kWAr#KpyO^SzvyLPWZg1$&D8RKX094-;PZ6HF92{gF(6zQijx zDeNu~d9}!w3vLkk_XO$8WjSsY{GrJ2CE{N9Ga~l)zeKLay@P*Fc$^-Up7$f#;k}s1 zdlfM(m?n6JV20peLDg>w{XF4E3r-T8DtNwNvEV#G)v8DOi-o^TkZp99<7&Z8g7jBV zzEx1wPw>AH{sqC;1^+6zS8%@|-Se~)5bP${T`;zuo+a{JLHeSZ{v5&Y2$l%aIn8)g zKY?mIJ5beA;CCgS?riF*E(4$%xCy*l69m* zEl4*!`O$*(#*;r^kiK~GO9bhCC%;CJPI&US2+{>l{wIQTzLS4kkluIlI|X+MzAd;% z@Lz%f*5hFGdIhV}>+6~CM6{=`>#oA53J#Iug2#Vszuv$hPDh>k{p^0d%uGl9v-|aa z+j_s=X!h&fSTMw$je?%N-k$j={fZh>F$bk9Fy-0}2k%BNpPrkNxai7*ccb?&)DQi6 z{Se2VKj^034*K8h?Mt~9y?r~-)3?ZW=c5$XPf|U7-7q7i^UhFaD9fFZg5JId_8WyM zPnm*b?&St0vGR#rox?Jel`+>4%Z-LOi88mwH)1rhD^<_!;0 z$LY;;=s5LQJ6p-on|Bt{NpBwCqZ!NuK55LsFM_cq)K#|N(9ZLJ*DSZ_wOBgB{Qe{4j(0PRyOMx+x3V3J*USn#T$d8 z$DnSU(&5L-jLyF>jKAFIG88v%|#B~m{s*c3H z*kF|Kb4T8M8jq9d6artAnolvJgxPvJ^T@7fp-4$Bw&+YE^yYDj5rr(PH=-vaC}d&L zpNC&JIK`Pt;2|=NnK~*SgcExK;Q|$VE`g;~9d@+28k-+w!5kuzH)2DF9bq#zHHV0V zV|*$o6&U{mZ0N5cY{BNkBrSjnsrc=K4KsWQRoF1CXf}~L-YG_mAA=2<5=3=@N0nj~ za_}3$2CD>7t@Nn!f>j|Ozq~-%vqxmEo+(hwG+T+z!LJIL_+=_jXIliUx&=h%DHTC9 zOKCMr$dY+xGtri_pV7`dX6KZ`?U9Q>)Jm4IDXHS5oB>J&?h=dQ$y4v8w*!%dcT&z$ z$?!uHWIQP;qLw!$RVeeQr79KtxQ-R4R#3vg+jCcJ+4Nf#qtlUx?|@`XuP&>q&bSagh1HA8OEdD9lrCLdR#8)(F$YsN79pqVFZ(0N zUdM`Fo9(Fey|u^ZVA8GjVf4T?wws3@xa+FInS=Wd%!1&ZcIgoOuqr*1-0O<_c@;bB ze&22!VzyVMGvWmmab;DyH7J~&Vdc-WUNL5TXMBdWa^7j!RKMM~x2Nuid%n~ujV{Y} zto!$z{>8&|?X{^>?hw6kUvz?(^uwX&Zrb#bu~W6UCX1Q@)}ni^dGE05pFHIJuWwMV z9bb!@_uKJ-s{1SLa8dwfCH z_O1f0(||NCguOl_B}ZP_C3%Z^I{kZfA)?TdyMC`?bY+c$VE&bfpOeo`|egiZ@5+hGGB&Av3bik2IbSo zuOs4g`F4QDX{rRMupRb>Xa>kU89HF|oOWXm^!}n^oFA=6^z5E-WgGkM9zs2(KVAoI zPxBhR^5b*8qI11ie_HLki&^fh`77p;_uUOczU-UH6)X^(Cdf7t5 z{%MI+7cn}UBAY!v)NumjI4(sdT3$C!&3ILRffI$FA~-{E zmSCA+xnPap3c076Kw;)~YA7{?&yw_ZKZ^PzVa|HY2 zb~jvE>xbRV4P$C|HH2$_*wC}~Zw)J6Dab7uxiO77j4R7ACHwMp>VLlS_V;H;zGMJ&)`8$!#Bi`OayU0!=%e!gl7qDU$)`BcTx;Ty|FefwC zoEG8`26GCTrJ&+@cQB_hr<=)^y6nSX6G}2MiH(tOkej2q9?(iC)f^vy33D}fAGmnl z6V3BjfW2TrAMNg`5sA)pu+tLR_Y(J#u;V&(2jgcr`7f7 z*t9}#Q3|oap;L+KF$6hCH-tfnh>mNY;G z9yYNNA&QNBkBu=N8xvlJj@aPUuY$)$uE)kGkBzY&8xuV?CbnW@vd2cA$Hr)njqx5E z32JpI{=)Q{=gXpI}q{d^|EdhcYpb57o z69=&ycp`O(hqBMujN8VM&!#%QzFk#GP1#&$l2>v5w8@ypfX~`E?cKRcYKkkXmdrik zHSS(fYus7r0ZB?%zu|S68U3ud^w{5d_*_kT{`ibRnA)T_Yeu>?V8%?S4sar^W$9Mm zaKDUAd#TA@8Yih~dlB(iq14d6Mp1gEXb=lnF{3VrGx~+-{W=*Rp zsX+W(=achB`QnoKQ=OSWtxk4oQ;&#enY*g8l0{-q*1$W0P9yK}!FoNkU0l6%ahs+$ z9b(Bm?ys^Dvv!^{`HIt}+TL06)h>#M7oTSHo3iyi706p`Zc<8Qojb^Fe#_O-X^T5PHm)$ASAni3UFoVNE}&^irmJOz8nBqZp#tH68hZTHyYHK^^?f!1kg;uYAV&rt^*w+RBTy=P&M z`^Wv|3z@ceKWL`myCcJ!P~y009T>;$SAtsawuILEO`Z`wfC`By{20vunJ>c=*u3T2 z;n`nQ3AcPZLE|)40#qo1y&;+b>iv!FH@OCSyIRqszGwH0en=RB5ZNF08#0SfsMhlJ zWT8l19x_Lx-=tf!3~b|M@NCOCK_5+rI~Hr^G5=)AojoDm(3Uw+VI<%&;yom$AH{pW zZe`s(Z?yEMpaSvQ;5S8h{)wFhPb4C;Hxd4-ej*U z@fQnTDfm6XTLkYA+#-0N;A4WkPUr`GUhsEB+&Es5_&*E3OZa->|0Vp#!hb4!0uHL$ zeHOnbG$BO6s-);N}19d{t>0{O0j zse);OeFSp^hYRKjjuxCOSS0uz!4koRf)#?x1=V>#{_BKS=L5VtAHaBM7vZ^8b8S%O0a&k`IZI970qpmKe}4&8vXS1w3bCi$g;mk3@ic$MIH z1#cF-O^}X6rvI7XgMtqWJ|*}Y!IuPI5&V%$TVSjR*UC^%JrN)%4LmQKK5Tx-*sxYXInn?}}OKBwF4;8x5p`kwKG zx_(&+&C9P72;GEcOjrVZJ?CBS|_-3qC`#{~Su$ z>2BrJIF`pjj?yh8gzUdE3){Y!fRE@v=;y7_zD2Dp=x0}ey-6)8=sy{e_GXh$*nrLZ zbHM&LeuF0aB+;7#+L)()!G`!CHP1`}KNM8xL$brk?jp;}**xo)ApZvXZ0#~eY{cY_hXk6f+~znzgPzJy5?%X^6G%QX6004irj7(3=!jWSN8(wBSye~kZERRpi~yukWgQ8gT$m;B)LF*G ztLjK}b(l-*NSuugN(Auox zc6eCgjXTw4L>c+H*aAk;Mtk~3oAe6B&)jIAztO%G^cD|KdaL3c{q3M%_wauOji-uh zk2}P@2pCg0+S4}Lq_Y)2W21fEMmq;I&u+kQ`2Ww|nZQR?o&EpbnaO0b5CQ~5j5q?a zC}e?%2oV#Oumu7H5S6m;1_%%!U<6bUQLJFBRY5})w`yD4QeU;!;#zHO3)T8sTUxYk z5TRhLrqbpA`0btmN5L`{OmgVKfr>r2(Jp48HQ0_*x58VjB#u9^ZJ9$NU+aP&{-Ov zXfhi~ajk$0nScJxL?plS%O@dn;7fbfQB4%NGnbj+LnRmFeyoWicfgdTGja#bnE!Fp z^TpmdcvG`rlN>Q8A2!9}s_A&8k2(8r6{jssbMl#OnPj$W@O-y0sDVKk9yAoggI>w& zmUng@>{Ge9bMu0!Il&b>ZfK&l~sS zGj)C1AwbxvdKMsKvtq_~o!MGFjUEHYeoQ8ToPjSU=tl+WhW^ zpK0>2&~3wum4<};82%6zf4nWoWFZsCF^tPoqSQ`iQ}3?W$}E>I(KeRnTVGmSZ2fo# zj7?w3G<4&UAK$WA$1>@fVL`l@yB_iO#H9E(V0_=|IeA&$oiug_W9ebJ+&gwlMGFm^de3qtiDYGqByT1M^s*t&7{6G`29% z*ut>yoSSpSZCyLWV?r@C1M7%=eaZ3HyMe{5N`5wvN6MrQB zRNN)LBK|>qORN_^6pf7q`DUZtSYCS)=c`Vlv9(|)%~yCI5^|AbKIl?5wlAc=Q1V2D zo3Ta+H(jR@ZeBiu#?}J;HHvqm(%m8QT+MtR7he!}kw|aH5@9tOy{k9d4fW@-#r0?{ zn#V%OXGrcM@`WYiohJ?u2a9E5xi~?bEY1<fx(u^qs&GrSqD*c@z-+43M!{TG&Q{qoVzA|P!v%SIBCBG$_`5~eINV1EQ zF5~lAk>qP+@?^1#*iAfFw6?P$l81{IieC}ui1Wnd;$`A`@jCGq@iy^3@mnI_YqNgV zHpaK|lz$_>Dee{jBK}q6n{dW&Cbkys{CXWEcNTNS9%3Kye6d6vDvlP%iC+P2$(Y z+r)2(Gb@M4csi1)108D+L~ zXnXzsgRr%xcCD?AoOMH&jc3yOn%1q>Ik@xkoh831!T78UjL%B%TsyHLS}~y^S~{U2 zd&0zq?81qdJMpT+A$MKcpnaDQa=yO4#Z`xsX1SZz9uB%cNDF*z&Eep{E7M@V-Q0iQ zy8eOMJJZ6oA^0!v|MR^a28L>X*y4=ag0GGw(sU1k=pxPWY(uT$+cG;4z(|?Pjfey)TX7PW|@T@Y9q*d zeg8;p>gF3t`tQ3IrF6VMwYF^EeLYeTBdd`0Va_*~P`dhXustoUcc!J+_Al9-mQkC& zxx=ly_lE9gUD9hiZGNaeHMMNtojqpNr=_LUW^5i;GO1+u-thg%cRfqmy*IMHO}&$v zfimvuF|6KAYf{^~J{*~V+6<{rPAMrVE3q}tM1GrFG{u^w7ed$mWYoKPZRY0Pds7E8 zuaPC0waqtAY)F5gL+eb`o^908-Mu&69ax{1l-Fifz3WcIT$Igg!zE2oiwu|R)y(8K zu_3gFYn(9t=SSe zL<-x~hf{~uC#Ruiv%a6U8(XJ!?Ix7cynXYNFDX8?*J0+fS)&ySZfFTCDZ@{@FL}-rIUsThwg#-Zle!wm#Ktzp~=f zYP0H7L%a88uV;Jg-rM&6hw3Ad&YNe|r=+kP=I-`M$9|fD{k3!Ls`u~xcDK!4ZoSxT zGoZ^2XWshrz0UeJ1J1nRtj#SB2Ay#`yKFx5me9tZ?+x4^=@H4ly`V8+J&bnfoG?b<(tEgDSjUec!osoJ-$ z4+VzQCk0WT_ApiV;i$rlLy?S7?e}&ezx%sxJ{eoXY5xS4!p%?Zb?)zBZ2Cxh|JU9& z_Za5TmR+Cb@xw;Z_%HsQz$I8Re^ zVHIOWk~%PPB$;7d$#Q@+SWa-^G6kmI&_@ z-Sa5EPLVevZeQM>viAcY>0zdS5C0quA6baJ+#-sPKup;~vELquyl+YAjz3TQ1xibu z0%Lstmk{_c&g!Wgn`oq-xCErqY;UB;DbZ|iq&~PVq-H}C>G%5$-3}gTsH3J3tSKrsr51WS0LW3T$W>m7Z6V}XbfToQ~L`%ds2HzgU zoVPJX6O4h4``D^@)X}kc@bC>B?5PCzIdrQif;Z-v3ObXG!ee30;bRg0z6O-L*D8`xi)_WB3V|Fn_4{OM;? z+w$ojY1ZK~hYuQj$guqs=;v`qQ?ot(&{P{&+NSca7}mqMW3BWKgoYijlJs-MY$t`g z;pfh5J7CcN3KkT$byWdsINj9P>uoU~{)de0Wkx?cgxSRO^FXzQ(LWmtGP`*tJvW#@ zFEjdinKUSSF>CsbgKuRyc5%-Qz^ zN4poJ0eHlk4u{UB2UpSa3oOYL*yV!4@39~v!F9ln_TVadKEQ&AkF8>-3kuv7aaka^ z<8k+1Ne^e(N5riwnIi?SHsz1Q%aaN+MLEmwhun&%POU z3fE8AH)99J8aFNUCT$HajKcqzH_Eunl5Xv~<#p>;+U>kz=nFz`~yKi@N2tj7KUV+_myAA1kYJMM9 zCYU-jxUA4C?xLP~!76B?Lxu&H4V^WruUA-Zx7^;RpVscQ+-`02Pdlw!yVK8V-!>O( z7QB$XO3=B4-AbZAJ}b97V)iNRcKVRhW}TLIT4~pISZ|cIDY$fIu+#0c&I^8hRpI|X z-Aw*HI+y$hbt^gXek1YT9-m1M5_1MP@gdbm>-mDYRlmrQ*6FyO`1_L3CTATlFURXk za?lOF>ZTTDbm*7%#r7xpa*kTN*>D%(xlRCIM%cRs?;WiI0UM7uKJ=Rx2O#75Z!PQ% z$Z*92jH6v(hs^{U>m34riWkNFSF~}=jS2fX;LU}(p<%re`;$D3z#B~p@6YCU2}J8> zNGU4X4e!CNvthHK@Rys8d#FmpW4SDk>p`x-V$;CuEQgIWN{^fkqkYn!Url@O-8=L9 zxc(%!AiqqT8EErcpOD`MUw%9eZT%AaliY{=_!MrP&5v(;{Po*{{J4IsA0K0Fe)q%A zG<=SsyB?L>laL?7AHw2~x1hy|^(Wbbc%{r(&h9UX{Ykd@)|dC)wthR|5BmC(bj>D$gFH-n)$#W!|eh0|!a_O%ZZxinqA0&|7b zDNJ{p_zlta8~L{6{}Ii0MSQbe!Dpqn{YGAt{JQv-xL-UZCbQj;K23~@W^6q4=Sn_L zO#Dux*inZd`#oNU@ z#BYk<7HKAAeV-Jc7k@7PTKtXpn)s%;Upyo>h<_79VK4uPm?>t7r--MCoy4<58ZKGC z^TiTzs5n|2Cr%WnigUzy;u3MWc)7S%q-B)l-7MCLcZv^)4~jn$Id>A%Jtw{({#yKv z_?Ea&JS6@_{D;VSmziHvv4z-1Y%3!A$Ij9GG5vjx`d!px&9#u9*IgZcj^E#BdqRJo zlkv2H{yzON`*O;a4~9#sccQ0H1pRwL?xD=2vXU`-zI)*9726LCT5;$==0`;bZ(W_V zKePg~FR#ejA6_x*z&$J8K9IcPF9&v*@Ez~1TirPR1Bf3){2=0oj)-6J+s3i4LF@ox zyNDe)B6izGv1jjc&rd?k5bBC~Ad*hnIc9${(nXF)ciXE28!|U+d)qyKAbQ2v_;2qD z*AHps)~7VXe9lQ7b~>HHha#c$M(f*cmwTRT%7}zoApdy1Lizsne&bd5Jbb;iCWIX7 zcLmuGYGWIYQ7sdG4t3 zu05)D?oqXa-~Jk}nb_}emxsFq+}G1&*BZ+XN?l#kgMXgo`D z18dyhK@R^BQJgTRZCDk472cI$-p^hZX0OqjFu#p_X*do36;5(5UKlsH_aauZxq0yB zq>hB%fhJ`%A_czJ%H$g4Jz6S0@f!GkD+Z?3b0xR8dLMp#&NU3l9gII%jLbj8)kxl? zGfHrWFxCJpO-i71hf?IdTNB=3xWiUJoQ;5ttC`DiX1|`|^^9!9If$3>4~C9rlCi+P@1)1D=if#5lqv%@^bvC0{jIq&gvC&^=^qXw-=BzuLj5p-&WhUng zoa0Q+{o!fGu0y8YP7C(~L`pJ!lFfwSZq}_(Al)aOY#aTT(t4-$NpkU)BHY;tW@O`$ zCb<Qv^zFDKJCIZY~^@a>xwcur4MOQh=;GNB!{&& z4!ej$^F7ITQ}Ab#=9$8|tTQ74=$YyX zm38#Y^@OTAdbo9wrn-)vn?0eXj-Ds6z-&xB=jkWc(X-PNrq|K)jwj5nqvt&=NI^7s z`pLezG{$9M4LV{$6oL=Preu2frUybz9X%tkAQCas(^uDV^(RNgZYI3Dssc@~xgwQ%BFUSTOko@d_5q zqh47@kJl7PP7jX0H|CwltX+-p`F|Hcud zdGUf~y%~P

    ksqpTyj`x=kG&%U`vv< zv*A$5&VoY^cd`#nkR4BhL)%QG4|$vL9Lgg5o-I!AO-h~So5nk-!-nMn)16L{rt(hZ zrt_ShkUh|jgDcId4sJI~KIjdbn3-ng2OG?k4!$)LJje&znJVUw9Bs`nII_%B9gE4X zsJY`$b0tTyU4oAKu*K=RtJ5KASCvEUt|W&(vO{X(u-Zc2!Nh{!!Jq7tKCr)KQELC* zBG#TCHb7M@4ef0#rR|xPoc3p7EA+nQZMzZ60z2W|l${oAirVkiwu{`o#I9`j#DPw- ze_DHBiB;MGJu9CBhhU>L&Px73rPbU6Ppm%dpCEgwh5Plb!}mK|+wV^xJE}|fKee9N zH(}kiZy9W(>f5C3bGGr^7jLs;UnSXH<=!`LGq_i5&&|Dhu(j&6CwOnn9;?0OdsOyz zlAYGiwj#DIwi|2z(co9xw|g_C5$iQ2%);*Kr9Wh|U_ zDV+KPvTy4TH(>%dvf9D~HhjI{mXhGMs^Hc-$sVpg+@#npCAd{{*aY^0TTX@Bz5uuW zi0tR`nF~TSC_z=2Lv{E-l_W#8R6*5rkiFd}P)X%bQISwtxWlUsl{VkB6soR;?DJ+p zC3-_eZZk1}4djDRrEI9y0;t*svgf-8Dp?6Cns?`V*i^QLD))zKPlKwjCi}l4#$OJP zKu6q#&cIz@f9Mor=oqOT`D8En5p+@sbQB9Z3wMMSpwqaG+@b4Y$-ZzLbfN=vq~`W% zvOD|^I`ukqY#MYf?h)%jCokG|2fF$-*(p8=o$d`Cztzwj6s-rKKrEm^A)vx7vTM8p zkV0as5TJ$vY+)M#iW~+sVF9Y-kR9YnK$;FfoI*ez+($M8BwDp)51^7C*-b74qzVPZ zGTYow_LL_9$vOei3IW-0XW0~xPD(!mP_K&YFP{b^3j{XvS$8XJliL9b2Lc)=11gu0-Dhn;YJrWTUT*-oaSu8H zklY>+T}8)@>_qnh(pLiFhXeBCezctSr1vy1!b4yN+?5UjrZ5J^SiT{O>`mVVCOH9& z;ttG$JJdp2g1|O1z&aa&eRcy2xd9uoft9kzZgm+j6%!cCT=N^*v;GB4b{`lm2bc|a zuJwWG7HY%+>lKjw>jYpzJ77d5^)a%G-33fp42&5H%!zy1%hmjVO=E#o^T>|23oxw~ zFfO0!SF*2N1x(BaMz&PhM0U5wfvN8UW9I;K;~uvjFu9;|E3o=2veO*}Om72>FQ>E) zrkYKl0xUrdxPU4MCA;22iUpt+YCtvIC41jCpd@4!{sc^|698ub{EiHih9@Wv-F3EP zAAA6mNDU~G2v8=t8!j#11Zw3OsFn|8Puvxhj20-Gxog*f(?AbYjyb3uM^HV!WPf}F zl+aC3L@A(*aF<*eloE&B5U8dJvRCd0N@@!zDq&eIvSVHgN-GK!m(}VJvTr^HN~{?a zStckmXHaMwpwxI|-h*lzBYWsUpyalJqFXGjLUz*YKuzKq>M_JqFeIn(VCyfRZ!-MJX&P3eE~?P?@TrHuXVunv#9?@1R6)gCb1@Ws1A) zN}yC{NR)$Wy+ZcfJweHC1Vzig;uG0{Z4Xe~+G5>gU;a5L@e)wvL7>cWcYe`QQBdnr zpxPD49=$mz`4vk{K-Jrjo%#e&`g=j~%ZbutzrGnJfee@koM1A*U3-qjS7BOcgsGv8 z?A>d_Br!*12&Rf}FkMVC0$|cGfQdtB(L!*mh{F^j4b#Xvm`XIrZvID@RO(=2iH6Aq z_w*$fI>R*M1yfBR+1cL@lg=8UM3{Pxll}b+n1q~QB2r#ZLw5N)U{cD3iOCHnC*13w zE!YRs)F4b%AIOfs9!y&E1g4oUVDiF!|6rKJ3}GS@p1+jr{#V1KM#03kbDlEs0epZ- z?lMetkucezCqRPV0;WA1nELh;f50A?1ZDW#U@G(`UV#*t6zyPQl%LBczJV5)Br{>6 zJOq;^dI)CB$%bh&AEwST#803JlPEWD1x%&Y#9QD6ld29(taE2K5T8L2OtStk(dzR& zAfAJMm~_iw;thex7ySpq+|OYeegRYQOX5W^hDmt|*ISsH-xFU#I84&!Fi|h(93~!x zt1xNDz{G7e>j&{Ge1l260VeWeFqxxwVKv7TOzZzYwWE*04kme==BNHQ-Q$#x(>_l9 z`16Z4*l);&4_Ej=uLCE1Jo@v8Du564J#6^%o8pC!XVX)}195bEg3_BFr{+!nB7TUH z-#@6p-`^>N-=oAE@oH+As+jshg-v}TJ_(Vj_te|Tw^YsKAn{C?OunSVCSOn=C!Q1k zMC3#lWij!Xl9=cuUW)qh2UOhnJ<4XhiTEmh{A!?X|GG{k|EeP%i#5Nhsfn=)s(GxG z_$>~OouQP*@~OW+vx)cOnov!<*{=OmO@??lK7L(F)qNGF zqQ1^2evXx2XHnlqrkM>RV@&jR>>c^QlpPsl{u=HhK9BU_4yNPqJ*MLDE#moT`%=Tq z{!+$t{c@K0Ke)dfXFmCy$UOZyig-bEKL;}TKYKCzJ~QUj4wwjQuc+ct@l^d}I6^8e%jKy(B&o`=K_5!cZe)`u$bn zDan3c#BhC|%g}tEPW&ZL-_eY-?*bUU@7#&kMBtqbk2iw9N25%E@%HM&qu=at1u-t)k;#1i$zzCZ& z;1l-z^N-)gg6&LZcjK2I7dh6xO(3F>th_6NA z<(1IC{pF$U{rSY>;?W-ws?#4B%GZB{_+83gn1+VF&=1}5LX~)5KK6-*UhSJ38rwG= zf<748zSkk+y^llg^)?Ytj7x8Eh-UA}klDTQ#2-`i+%qKbxm}3ib2H+VdEcWFa=Aw; zB)UhK_-15!#)8MY-v{68?hZx|jZ62HV9oB5VBYQ%#7|T5EF?Ji*^ywQXST#!^RY`S z_*$1-aD102@!72Hnh2VHIuz9Qv^xkrH=a)~1?fIL7bNiXIPu?9Kk*G>KXDA&^~9Wb zaeh2r7u57vJSgKaAMxdAJpK?k`|-2Do<~i@qZ9h*bfEF0;C3G3^$}}-fg|Ih4_9Bwx#&1wK4p8+FXeTsH}C9KciLN-?UYf_<_DZ z`0Cg6pw}<+L9-uvgEl-XxuAMpuA+&A*GzOUvddw&J-47In6`4+Ui^7U-+;t;VSbM$kQAn_ihH4XY4Zff;e-&9L{NU!ch`PAI;@`=70;M!gzu zJ@-Nnll!d_FTGpIUJGvp5y$$Nn3G9_WAKzES1TTc6=kRUbyYP`35kJQV8XJ-F(Hh%c)0 zdcS+b^*ipi*Gq^;iu1ak`}1pi+$*o?62Fw~HC}hcYr}3_*B-l}cdGhoj$8CqmfOCo zhl!7B_EiP9{wqRm7q5&TK~I(am0L&DuM{5PyAn(MRaffFk0jNp9XV7ddIY^z3+i6G zez<(cwc&Cx@m;xJ_Hx~P*}_%yvO4i#HD8)`$-DH*#s5;H3;MBEUW#>@sC9SgtTiRx zEM~2+i&gC}XZhOa&gj$Xy_oM@bCK;FchQM>w$@*ibr!fd*LkSs%VG3yW!6+5_Nqxc zY*^z@yj)`!)*o)au;lQ$3%?JcugmH}!=ZH-3J!5!U=xqmR?i3GVz4zRhl1MQmJ(CdxaqJ zhZR;la%5IqaI~&SC0?;P73PkE=an4m&kGXYnD_Zk2cz><4wC1Sh==T1xrsw{xx7PM zIY04}Z7hFazqq{AezYu>c*}~)4DDHE()N4HIEl|ppzOBY$I=43rc#P{&O%DH?JP@| z*eR4w96=RUKd9mKoFQ^dV*@Z8|uhI2RfqK_@`T<~6tb5?s5 z&Z!Vj+fdtlyk|YK`8w{L=~6VW*v~ZBOeH zpWLF;6IMS?J+XRps?rKQbBU)8S-GFmvobohg!t#UPj&8oTTr&Uu^^Io>F5Hj-F5}S zyLAdiEYVjtm4DW%cTd3yWvOvGxXr8~tqdXIf>b%v&d*_|k zx63rIc9%k4(k}Gj4d?3bYR?thRgwGC96fm+xy9x?b6Mu{xwgcgH=M&~-k$T;tRknu z483|@Io@WbIor(?b5;`H-nZ;0rjN4AO)q3e5)YqWwz}!=?D?kZ+3!uz&o_QD%cSR| zx5?F$+laT1adKj(-N}bL^-h-TM4#WRlY4f)J)yMo?g?Jv`HMSIXY76=+1TWS3-SLg zI3Z&EBWq+wSJvGf=mpHq^54P8GTvdIB}IIJtFj&$&CV(@`k2Wg9>JFAxQztf|e^D&;^d^qfz)eFb#>C55n=+=ClX72=oszGI zzDBc@ZF=e{;(FpK-*nOA_$m3M?xSQ+-7CqPiQh3M`O`+P)4g`=%-9SX1AVkOnJTY zF>d0m)H+tCDRqpgIq#S`@mUTe{L*MmxUX?3Ax8r}mvIU36M%$;8g>cq)zN>cnvkHr zJi$(#H$jPbF<-`asojq+R;!HuX$Zp2v zv2w)USr*%-m>HX=7!m7Dyq;EgR)`<ArMW5*RXxFs^(OPRCM$aXl z(TeEvYjUF*YZ9VOh=24*^oZP^=$mreqf_M2ODYqsEGH7pA;%s4SQdSy@1p!KFM->QH2}lyzjL6na&)A~mGeM)F84i|mp_ z-zrCBfaH$|1Ic$0!o)-Bvo+%8;6+%kLy@yP0g=ZPtYdx*(|YZJe$VEFT;+~Fllr`SPD z(L4K&y=ZAK`^}P0cFhv>(OzepFR5m)SW?6u5k*gJ8aqKWmc3V$V#^VKtsA>}u_HTU zu?^dacx?^X9E-Ktog&KYd=d2Bu3&46h_L5~%wzW~LJ#h5R=}d~EQ3X#SVF{)+rz37 ze#oMP@3D3gZ*Cpy(xe21LSCTbbP>j_ju!wb506o6EEIk1Z);xjV z^o#lE_x(x-&;Ljp&VNG-6Yp;~T|Ms+P0eegcM>1)ZTbWMb^0>@Wjc}{J;CL)1b-1d z!grdk=R<#R7QKfrotEKCqJPdsuW%HdGM7c$&1KN?#5e3mx6JXTGv~O|hlq#RiJmdX zo^I#eN9XXOpLjQ|$!kt?^P134W}~;*koKCrnbw)DN6#fbV=cOfM}zj~QKj{X=U9R6 z=Uz*fbIZ~p+~_}EMGJGUqzAcH(A8Y%MHZutxt7pNxE9kxoajqlNQZMSpv^f2>E*ofM;M zz-dWOuAogOSJGmWtLTs5zO0*&r6VWS(iRg6v;^@|tJ3x38g$&a7Hva()q3=gUz_RM zzYOVQaBlAZWkRp{Wlm3w?WUW-&3SxmAANAlo>m%jqW^-!v-PJtee$O_?ef!)Rwq7e z2L0#x9~`6QqnGKB(d+cK z(cAPQ;@fVcFMNAM)8D#j6XM~1Lx24Gk*@ptm5u_pspZ$-^vbUstZyT{tOjtP9vfN2 z+B+h~k{yv`{Q_6&-C;#m`mhGead;z3k$Aq1S#4h|S=nFqvRsM(`v{Bsix2C`=U~=p zaJ2e-j$!G3PG<3c&SLd}%eC}VF)Qd(70d8b9ZQ&a#P6{#e0<2FKlZRpiC_E^>+^^2 ztg9b>vtq#^YyDv!Tl#|t`{&RKb|biEQ-_q<_Cwlig&_m>G&pHn-`lXW-#fBh-@CCj ziNBm;KYbU=KKm|>?F)`u{dYxdfp^vHmv67LE5L=zc-zS~e%s4l`t}|B12}W*-b}Hh z-*AUpy%7vwMf~V8;f;gJ;i-c<;SR)`ZW;b}z%IOfz%4u%T)plC?C=c(iQ#hwPJ}-P zr*FyY>hPe~_2GuETf!F+|N209?W^JNh*y*07R1ZGFkGWa?o|wpB0l#0h`8Fv5g7}v z<2`-LB4zv5MvnJtMcxA^a#pW(q)YFiNX=fq$l1gnpAuR0ydX00d1a&_@yfSGzVGRc zyxj9KG8$aW);+vYGChl<#=B*r?t!y8t9xsdOSe^&X7}MJUgD>Zj4F9{JSzBEVU!W^ z);C3c?0On?t?OM>Jh-Cwb#X_p?GlNeekv2)22Sa`r`w}FpYDm)eR?EXfcWndqN|_e zMzfz(MDHSA{D;v$9uGt}J^mh@0WNFj$BSY#9{a7oe2b|ZXkM_reKJtn&e#D9q zCw~3Hn41slVp1O7k8vd4{gD{XhcjclIv2(kfonUcbA7B)r*Z7kPP^F8;N-s15fPiz zks0gIQ5LIA{QVDOpSHh=EovW+4F<=zQTy^Zv38ZX;kK=D4d4P#Y4eOb*v5`iYs-k^ zAsGNS;>ubd#W7mn#hHRzT%vV;{Pzb^@l6jj<1@iQ?)tzXe#3)+c>V|R@vp#De&K#? ze8m0x@z(cW#>pmuK{ zVK&JXn0KtAS?U<8S?ic3$rx}xHgT76tnF_4u>x?j``*2EZ0p_bW1@G5k9`J*dqb00 zVp@|*;^8Kv#PuYHAUN^Wo#e!tJ4K1n;Doom)0MdH&X+`vJ6uUm!5v@HsG1bkXq;r$ z=#(TyvI^3ZT5p#p<=?)Oxur`R{-q^LF2rtp%?gQ1j~8yu-I zH^fr+ll%kIRPGzDslD~#sa4?UkF39(YFqy(RiXZKDi_H`kVvb%z9B8*x>cGj$w-J# z0Bf`;b408Rc3nh)f4IaNRC2h`s}Np)BCUR z9KQ%j0&!P19=E?@dtCiWz;Qm3uTXLPO5OeANpEQV23G zCug`{F3;F}xg|rCWH4}KHeXtvnRiJ$)1Txq1Z1wfl$JSBTb0=f2?j;AA2XS?v$L#f zS7phQoCf=>-iwT^nv2<4agcQ2aIq_E{ly8jUGHcvVc-6$6FeF(H zcTbF6czdG#!mN|$ASHo$LGPs11-p~$E-+4VlZ=O}Cofm`oJ^`7Kj}>J9@MiJSMSdL zTIHAB0tpMJsxD-QR6WYJsQQ+@hU7pf=Desh&AC+Rm6HTX3@()wIeL}tIZG;sbG}15 zLu-Y6ZehjFTxNwwt~JSusK}jD(VjbaemJ)tQXDeQE97~fH_bCT@0}+}G9;?=o|Qk! zt1chSiz9gws`(qscjqrI56B;d1c=tMy8NQDo_to>RQ_H_g-|QgDG(^LEBIJS7c@aq zM1E;wK}hM_0?ShFQwk)1!syi768BRLC5fj_LZXC!$)i(dB|lEBDOq%yo8(g1o~|zr zJDpXWf7+L1RJ=JYSIm8eyIA(jYe=K0FY-JCKLI%7S9I}=8Og4gIKxvUc6RWb?%4)N zt;jwXbvE!^$ytkYt!EWTriD=9P@#I^okH8fQ?QN5fPdP;zp2B26(U&|3h?d2(Oj`uj)ziFkTnQ!n@%a%?!mZ1be2(uG!%z+FP!$zW9f?pSUQjKjP&JAqw_^=dk_A*$2vink zc(g#JeXZIJRi{q!Je;8tlb|9mS6_t$k{qZ~22`sZRIMJ#`8Wra+zu5zcHu50l@vpj z$3eBbL)Dv*{EwlU1t$ccBi2J_U=~OmbV?0$Oz%Z|k_#daon!?a#e~knjF3*~w29g@ z=(+%s7vc|{mW0HA>_pu$FyHF6P1!Tj_k}5#D-g;L+JyVijvLBEz1`x64 z#t5QvfI&18D38sBA^D zPZ|NKM{e;aF9qbr928$b@_az_*4ybM6GaM;-V6{w43Ho5QJyw(C2;^FtOI7itdwYA ziW*>yS9gL*ZpwOKlEc6#X}~O)q4K$D7}%y8Smze7PbsiaI2>(>;G+Jv)-W;tNbz0F2n)!b`GPWPvHIfiWY1IWd>z z)%|#2(*R&q2a?f}2~67rjQjn;e3I8<3QWuZMlNf;L9$zTfT`7hu@3@sV~$G$F!^ws z3b6WelIao*OkV_y|Fr!fY$e|S6;K9hAQMzU1j%~&++hc5!5CD-dXoE61WKZ-b7m~( z!x2aZ>I0Q=AJj%2sE$IC2O|zj#26GwC@2%mhUs~v1!`qAsFp<}Cnf`wOcN-YACDhG z(oh4aoC;7oxuALyNPdg}C?Q=?M4q6GFiWNll+yH55l~IsBv&RLl+-m)R3E#VNXCp2 zD6L>nTqVyUN!|=EC^1b?WG9#EMNKyB88 z>Z~GpHhiE&bwH7NfHK8wn|4sDfBP*!wQeOjHz}ZGZ-Js6eYuci-dKRrjR3`4`)UBv zo4P;+w}2Y12UT26vT&ZiJ^^Yu5mYl9)N=r+Xg5&PcA%;)Nk)zXDD6~G+>L`WBrj(b zC~+%LOe{e#xnNFD-={2?W|Cp5i6NOir(x20^4SNbo+Bi`#}y`_Y?z4J zz8I4%A4Qmy9ARQghsg#Uz&~3?}Icn5bV(36hK=1DLb}Vd5_NJ(uJa&4Wo?4<_=XFqva^(X(kznAZP) zYR4R-0+{4+n&S{WTOAeJ<{j> zODR}P&A5>BhpNhupXns_hnn@=j$|dEUo!30Z|aZTotg7j{iZTbkIih~Jw?5KvzlZo zps!LSY=ZK3ImU6yXPi1)(!k+m@r!c%`0ZbQQg`nUD&vUNEMN9_>O)D)EDPaLs(R?^ zzg(r)e}^f`X*p-I^%pAOlsRW)_9v?GML5ZFKtHG6(0fY9a)@*Gx3|>3#3fvd-VIV! z&Bi420ezpdkH4f|YE*N5HhDpncn)$c{`s7WJ1b1GAJ8MbsJXM}a9*d1s&r;w zuCJpEd%Q>{1^QBd|E#96q@T=A_p6|^c5w5Cy)2~yJvB*o1^QRDL(ah0&D%yLbw~0aG}uf9Jig2y)~!S7wto1RN7dP=OzpkA zbKX2Lc`CPrnpbHrL!CKM{V%6#S>;ly@2K$n;W}aJ&tAj%QkC9*ksD2s_Pc+%`#*zH~RQ5XG@M#gIVgcQ}|`hI%d=iN_g2y zX{KO870FIP|Fr(-LZ-+Gp+&Mfe9Z7A28;6jW-+O(0FtqSK5PAwZw$V;o<-j0h8V}D z=ZL5#zhuxJ+9Znw{n#v7aCzwGi}3d}GOiVMim3WuWvu1pAek-b+uq|_#Q1R2X|e6o zT!xHD#^Nc-bVjyo^S^vAnP{3ZYnGg7ZFT_T!}h(RA9CCo?-CM71`PVZjStx{xOqlI znQKiLOE<1qa^TfwhK!Fn$%;Y0xZFGi2H%64B}-zY7+v4qEV(f($_QS#h-Av3uY5I| zlcBg1em-3>5vF>uWU24H;jo{6&;R9zoxjx`mJqKk=5nen%p%!C?5)S`u)5^Df4O2Z zZDnEF5i`WU*%gHC3{(p~iQ@Nv`DgP|O+&|pELVo`>xaH% zM67({uNvw%aPeO*+BJUB(CBPo$+bFjLw}7JNS@g<9r9~q0LcQvJb;QluS23*yCe;C z!09rVN9q%QQ^@3I4U!pzxdEO5#UUbvnNp_nPKGGAHA`(viw`+9^6Ou|TAY(-$N@>4 zRozu~A-SqCtG0eL3t6C7_b+!XNlGPzWw2PoW$_Pi71V7SfmTBxi5u7?T_AkHf z)$Wks1aGU=mi|YAuSi6#p2xNgE^Mt`{a>z|{XwnZQ}cyo|7gespDx-W`)NWn*kHXM z$x^~Rg+_ykAe-%vWve@eg6f(%$;$c@VRT9vc-e0T+muu zr@|L>?zt<;dcwSiZrFAGB7ARc>9J>l>t%nfo!QqEcw9}IWI|ys#I{YR0}rl`kk_$E z4s2Gek#F3`3|uBL@GpNZ26k!VKkKe*pE3+gZT4JOaY-%EJ3IGZF5Qlw0)grBQ|smh z{|RXQB&!hk@l!zkX&aJ7g?SWPGwudlm;|2>?D?F_exvYcydXeRO^9SxVQz)ug3thw zUEYcTvs?mpKh0AN9%VhUBI}KoRZ*zr2+hzHcB$ZJOR-^qDTf7=3vz4 zzVeUF8dTDsZuOt_QcyX^=!$=nxE{&M!n}+Z6)FB45jo2Dn;8CHW%re{?z{T)JQ)9% zllLxnlmE$4OBHu_dHlb}rOI7P|vtK}| z3(4rhoQ}4|uv4__j_OkDSid6CQB|LCKR=P4&{Hqvj{|u2{{C zwZgA3qD$?+9KM?i$9yjrE2*DpeC4}got=7-{R7{9WeNZC`Bok(@U?~C$L6)h`O1A= zsIh&ezi-G6eUc%DIU<@_+kGR3ax}v0RD2cX?rZQii~H&w{Pi!-ue;*g(SU2_nyX`a zk0w56YTh($Iy&;T>|f4bUrE-{qqDfzAJ%3cjsB~=ep|iU(Uws=l3j-RCClSB9=&$s z%6hRbnWOtN-$B5V;L!!nLL}o1b51C;L7(HF+_j{wT79ewPH5>F)%wggzWXmPuzxzr z$1rC32A6s-pR0?FH~6~Q`0x}2k<2vAO<9&E>m!o(a6=Q{0-v@&(;KGzCcX6?y&TV;9Vq@ z@Gp;W!-F~A%QfEUWcZDG@hb~#JkR&s%T-dFWV&Il%L?8SFVhcc8zVfDy;|!VHrCt> z^va3(^e?|KTxF}*;+dOu*ILMX)m3=vRyr*7O4@buU#_9`jseg6Vc&Gw(k-4VW{K-% zeXaCNqqdPOIn0wuGiP{Svd!0{h7NjKU%9V$$kWJkiht~14x)mgi08T!#+#O&oc5^d z2;3ytH|VkC_vwH6h_dok9x>_@n=G|6Jm@V_`dM0G9tPV?NroNf*f2S_c`Q*X)R*a$ z_gJ>5Q-3l}$m7Y^$$xo@>)QL>wWG~8XIkBHf2|+7S*yLoec6w~e>sb~@qX?G8dIA~ zI`_CswyfH+pG()BX=X;U^DsZ>k~Xh)xLT^ML1Qe(u5C$R41rh55p~%p*Okohh92uj66hSQrSdr#NPz(-GQLu<&nY1EG zMdcMi{h#0c=iv9Lg|^AfJ!kK|_FC(no%!_ikvDZ6KfZNb{nL+XXZCS!&*|*<$L$)h zv1{|=o5u}y9O^n_#{6++>u)#CcO3TW><+=M)8P*=47qs(O6z#s9{XvH*@*u9rJvTEgJRw=x-0z-8i?hP3!}sYj02N`Qdx!(T{e&yXV#s z*GK(5Xn=OsBIhl2o2`yo_0-m$$$te#O?d3{o^3`~kNQvht2fTM9Gdu_QQtH;do6zW z)=^8Al=o^oAz{>QUHmuBzx1y-H1f~tA9_{#ULSdDMtbk>rY{^>u)KqI#v|uEwQ1LL zWZ8e`^iDm0*T`*0w)dX1JZkr9FQZAzc%Qaj?ML)}YzyzLv&{>O6d z%t+3SY90Of2z!iL`sLQUM~wgLeCdd9Ge$UmO3}`iZ6Yj|8epkkFQ^Q_we^qtWV77n=$;-$}azZR;4(v>ipVf8+el zJ%c`R7vJ}OpWfxKyH^+e&__3UzB{fURXZb-bFzZs*{`c#xt=_B*RAe}ftgR5T4UYk z2W`4>-e<9U|Il^YEEN`Si!9W@cTzah_-|_vWYK_I2rBn>FjH_0z`me{HY(sdw*MbmN@S zQ70`=jURige{sL7ga3E=YX4pPj}QKJLcVr(DCdW%_+2%X z+2ibW_Pjj*l~^Dqhz(+dSRrQQxv<0%F-2?lNcpdiCNB&%A znV2TFiE(0`m?!o*UyocsP9QgsBghrx40-M>xrCfTZXw5zYsfkBJX&%QIf>jvjv`l) zv*bCoLg@zi>1zC7O-EC40|8-NkO3Sb6#?k`vZOaZn4 zV}Lcl9P&J1un3q0Yyw6BtAJTJBam|?!7^YPuniaotOMqe=Lds@z(impFcMe^%p}hh z21|jdz*b-^uojq0o;M5@1CxQxz-VAKFq=Gw7%T^-1KWY|z^1Z#ph<$10m=r!m$Mvq3XM$abC zfu@(Er=z!{$D`My=ac6{(+koQ(i_qv(ks$4%5$UXCFv>YE$K1oHR(C&Jvr}{UX-4c z-jp7dUX`Ae-j#D<>1F9@>22w8>2>LOIeU^Gm|mEknBJHknO>QmS)NNxFHKKPZ%vO) zuT9S_&#R^vrzfX3r$?t(r)QVvSkueX)6?72y z32+K<3vdi@4R8+fJZ!iKI0?83I10E5I171BHe3dr2HXZ52V4i7hde(UE(A^lZUl}5 zt_03Ro~sR)0;dAE0>=W^0_P&n+lGsQlYyIoqk*e|vyta;!{xx~!0o{C!1ciS$n&}3 zg5ZSUhTw?cir|dox!rI{a7u7Xa7=Jba8B|(Z@4HpDYz*(D!3{*D|ya0To#-b+!h=c zTo;^|JpUUm3{DJg42}%049-lR3l5hCrv|qM#|GC1=LYx2dB|{aaB^^SaCC5WaCY(> zakxA3_emPtyoG9EV94TBWoGIKX=S0J$!l}Zo!m+}& z!nw-x&f#L=WZ`DvXyIz%Y~?xVaJg{0aJz84aJ_K8oQ=x))NsLY!f?ZI#BjxM#&E}+ zV-1%Krwq3Y#|+mD=Pb`thl_@jhMR_?hO36NmglU)Wy5L1ZNqWHb;Ehf^Vi|R;l$y_ z;mG02;mqZ^>~QID>Tv6D>~QUH?r`s%#|;+`Cl5CdM-NvIXD`ojhs%f4hueqahwF#) zm*=~q1)vF_4WJRA6`&c&bKlVt&=k-X&=}Af&>ZA>@MsZe5@-`>6lfJ_7HAioD~^_d zrh&GB#(~y><{{6IM+-p{K^s9MK`TKsk>|>zrJ$*xt)Q`>wV=76y>Om6S`3;D+6)>E zS`C_wJck}F2TccU2aN}<2hB&GPmdOaCWJPGMub*`W+cz8M@vFeLR&&(LTf^ELVM!8 zbxn&BniSd;8Wma(JbXT{b-qJnrNG7oM@eBp7Q*D zv`{orv{5utv{E!vv{TN>M@vOhMO#H- zXuN2>XufE_oX?LIj3$gWj7E%BjAkt72B0OQDWff;F{3r3Im>whXwhiWXwzuaXw_)e zoH5K?0JLm0ZM1DPZnSPRZ#jPeEgVf8Z5)jptsKo<&Lu!gM^i^zM`K58M{`GeXC47s zJeoY(JQ_V(J(|6oV}O>ArjNFd#*fyI<}cj;+I)kgeV_fqpKTRu|Ka;3_l^CBpOgV{2&$l8w?JqvBoS!gu<<{%mkDPu}u5*8S<^Jb7_lt8HxqqIuP1m@e^M|~7jr-fF z&Gc*BZ#i#a|F+y~tjDJ3&i~2!^e%q;Pu5G$VJHaq`jhqSx77M4>-+qm3s+fh&WF_2 z|MHxx><6FP=PLVS!;3dvWxvR|4VUh$Z)HC{^!I{R_SfD9S1bEX&T}Z4`uqRbkFMVP z|HuBUyVdtU_ABR7vVX^%xZ{89=MQ&Xy~6(XF8$~V`(4g|aP=N>g?N};boUkFBRBJ( zKZqAO7b5E0HGdFK13xJHgZS$EMu$I$H_pQ({vMxw^mpRX{olav#OK|^C;U#la&9K^ zdtbMt--+kRof>~5zWw*U_8am3a%8^5ns!}&BOfeiYxs@)P;v9A%j65r;Us^Qw|n6- z`DFf`&dcPN(7idA$v1Ky#b)QuU&%+q`+0sPKMfw;>sRuXoKtc0ix*nRXHlE#TF7q? z)X!}p-^uwEUtej{LOy&V_t#70$45GX^Ec%6fE$3j&yY;i5$>%#qul!$PJ@WMG_7nA~ zX?ONd)GIk>qwnIK7pP}b|M6U)zWp+>_XX;moWIdL`r?n&!|CVu{z!fFjG6x<^-|8| z`2G1?f25vHjQ*pU`dYc{Kr{7L&g*d3yPK)UkGR@5Q=h-M^4Aa4YdOawM_Ky=^}Mlp z><`rUk*kV-px(>*9@noQ`yM=yvuD%y;Dfx06Tb&9$hjX^TMgfXC(gb9-Ffgu^ykn_B6|R@X6etemnh?;2H4P`#&a~ z0iVrG{rWU`jdO3oZ@&$%I1QeAcSX0;;JePBx{~dVr_Ywb`((viA!>7QjoXZP- zeKh>cDe&xw?wwD8Z+9F?IR)O8^G^~kZu=HITu?pjTk!Eh+oRutm*rfPijfz-0Z;1< zd%po+>))UM4R~A5OPPA_ZQp>$TYqmo2|kb87d{DImvdB_2bP@#&wqAL@k#Lg5QF|C zcwf#}dHI_yU(*i^|76P7^anqy-M*$@kaJgN?)~8e{lxOnJ16KbmV7$z1pS7b$1>>$5-@Aa<0pemJ7$}r=D`Xcbxue@49^#(mo0nlJWfB>t@y8F^k>6EpB3;N3ex2*btepAkqF<$uh7xbeCkL$&0)L%^*_wk9N^s92t%({cqj?&K- zA9?I3{q5;fwxjgBa{kPu%+Tlb!_O2i{ha=I$;jcK(=W@pG*2Im{hWUK-mK#d^w(XU z+R{M3E$7wrjO)=rKR#fjIO#+5=O2B1@d*7o=TP$ z;xqUN-;?)$20zhyU&3eb6>?6_sMKwr!e>m0oAD|9#-1sxCOOY%{v&UG1RwR>Ema@EPZ`pm{0P2E&iQ%q`qhK*SyOeN z9faTNkQz7$-zDe&Jn~T2gYaRml;s_SAN$#V@k97BITvVL*76VG(`tr}{t$kx^ik%g`{5J6yu5Kg{G#jR#QpG%oY&4gqNcEAKYZln z&n~?WKe_6g1MkCE$~i@~Ipg1l&%C#b<9+ze5mU0>hwtS4cjg!U@b|tDd}z1Fmxka+ z%ikCkf-jYGjqab77J^Ux?)n)Oes#R(9TmP+&O7R{*{#CI)^xpJg`bVRoT$Rr$~j1% zkA6D{pWD008-(9IAM;cYzE{pinsO*U2p?Se-pP9S;l1zF*25Rexk={_53GkzKK*0+ zdido#)8p#lo8>&E0~K%WgOARypS@4>03;9G2VX7cEbR@)?t{<%ro-3o!EaZ+_11gv z-E#iY_|U-j;KM_%qW9p(Yp=z<2Vc%P`|#(L!*=Y2PaofQ-d^~1!{xzy;oIfBrWJ4K z_rk}|T6^kU`1vj?cD)N?VH4tj%}2UWIx{5$9oV|qON4*JCU-}2r; zuaI-1J|6SY9`uaQ?%A*hedDIY=l7s@$oWynzG|}vJ)}#+)!pbL<}Vv|qn9wJfVomP z{XKIxddiTt{dS|TY_{x2R7o`r6>{?x;m?lk>8M4i`@= z2|aF1hdpnh&o$&Mc?-Rcxe?6KYP#-t3q5anwD~RcJvHmMH_`i;FM&fUtHpY$erV##l3-#}k9jH`bGy;08N3ePBi13hxDxyKvmlh1r` z^Bd@u%(Y-nS5e7V+tD+7r0v*_zFG3qg6-&?a(>rGpOkDz4=p=l+KxW@=XaO4p_eiz zgSlSug=wGDmMylK!j^j79+pudiM(y$FZ_Kwhn*U@K<4}ADKdM$G|m;=`5 zi5Ff+&wcmuldq%i_6@Xu9le+N9O%E@Za%*iJ-DV--HJZk@8p`T=*4nw*jwS!t?0?4 zzqn&7`f}Az@mtZG@0Rn&&b{y7f*u~4Flh_=_`|oAZb2_+&IohK`hAqJ1wH-p>t|m>Uw?F+`Wkw> zoLAPXX3A^m@zDqRyoNr%@Tc~#q1Q9F1pU7K=;qDn`F-m?*o?kE%JlMP^nN+tY*6&T z&3FJFUDRPS9)JhiW^Tp|Cn_X z9)O;wuD*%~K+Z|)ZQk`N9)K-9m%fSzz_Db)t9St9{Io|q-}WjVfRDDuzlsN7P1|#? z-~o_x)du`$<12UodjB;26+8etHV%9R4}hGv_SwBTuiyb#n)&<7cmTeN5>HVI4}hG* zb~SPF%Xk1z-#q?hJOD!;>+v!k06CxSUx(sf#sjd(c0PayV1?&E01tqi+qU<=o&X+z z(@{eMcmO`y*g1d)fLShh0Defgwh<4&?MF{+!~^iqwz`dY0OXvvf96l#hzFo{N#Bil z0J?9wZzCQ6IseW1=j9D}0N#D@=mtChw=UYT0S^E(VekMX4lLh*2VnkJy*J+t~0KHGCW9)O-d-nAYN0JCNA z0IX~C%Q`#&cl0~F4i7-WOK+~j1HjA~JOH~Ndv+ZjfMxZ)*Wm#;(z$3I9soIy?uGHc zuEhgz*?e>@9)NEfcdo?)Am`K-%$l?o4}j;{zH9LSjCs1lT08)9e%;BXt!wZAJhx9g z*(*E%fh&90-~o_x?Y@0!#u_{Te?$*mg9o5)nqv(f06Fij-@2GJcmO&+a{eVe0H>}U zdq8kU@Bs8UaAi3j069PKl|Mtv@c{H||Jrgq z0HH|>m*W9orVt*05AW``91lR*)(4m40r>pxo0j7NVAhZ}Z}9nx%kTg+wm-TI4?y*` zcb4G+kaGyfd^l?v9)Rr!#xBDHaQtZRWq1JOe8OLDwl2d1aBfueGCTkcb$` z?MHoh0H%NXt`84@oPYS3;`QMHn6~U$A0B}3uJrTa0g!VMpZM(-A0B|Q3sZe~06w_y zk0p2j9XQQJOD2pnDHVW zfSdb`c@YnQoa?C6b`(deZYyq_()L9>0PP-6dl3%+v!3t(Tq!=Y2oJ!FZl5l~1Mtz9 zJ&W)F$T^UEzFn{g55TZ{pI?Lr;M+Ar7vTYr^C4Xu?^}ciU~nhRgnZ9r#9)NQ-lNaIvxaWsq3-JIjV+s$zhc6W` z!~;}aI(0g&@5N9^vp01rTY^t}r-55REy0z3e6j%8#2*7rf0L;9?18`Tu(D`@(9&7*Dd^`Z}j(uQ09soHH zbAEQ#d^`ZZ&W)On2VhsyB`+QTIVbb+?jL*c0Nfp0=fwjsMLau<2SCox?DT4t7Z1Sx zEzf%K0K5}?%8Lg;&ei<;=8j%G0Db>k=*0ujPCQ$T2SCo-?Dpwz^Y8$y9eHLR9)Rc5 zKc9yOK+fU(aNV2p@Bla}*U!TP@Ytk9^Y8%3`J6Yc8aEFQz@_~I=HUV8AKiT(9soJF zGxptf^Y8%lD$1RQ2cXm5_<48$7w0CN6kr<+F4#RG7mqTgIR0E5nUor?!R&IR?gw3~|uV8C+ITs#23 zI1}gM0g&@Ty%#Uc!2_`L>yvZv0FIY;!}?6>CN0VwPpn1cu4`L#>u-~nK^ z7#@Ik#!s4q2cY)XQFHJBES=wf4juqGcQosA$2oWa_U;!aqX`ed6R+jZ!2`f7GCTl- zUyGiD2jGkSzt86Rq(?4)KN}B#oKtF9@X2gE0CO(a&&C7r>oc{p@c_vAr6<;}oQ(&d z{}bNXcmPi4O`DAefSG1^0L*9Hv+)2NKGSD59)Oisy3WP}Am^P9>wnj5JOEE`DwvH2 zU`cG&Y&-yR4(h-D{&N-{fbFY)nS}?S=Obrk;Q?Sa8Xkaa#}CcI1CUx@KMM~)_dPpi z;Q^3yQy&qh7vTX&$X+}P55Tp7)wA#b$a$(W3Z9;Y2OuplbQT_f#(SQeg$F>+Sv4=~ zJPQxN>LK^c!UOO`NxNBi0Ob7DMgPv2g$E%0@%UMI02*gptHuMsOg20K4`qB`jR)ZT zl#|tX0FM3IP>lzGS#5X#UbgS6#sg6G#g1w`0B^6^QjG^d&T-8dvAh}&K#!60tMLFd zR#aBw0g&@uW50R28V|tc+lN=<0eEeZs~Qi0ocsF8g8x+G0l0i?r)oR^GmneY;e-c3 z&V&8r*@9|3080ksR^tH(_DieA10d(bx))xr!UOQt{@<$b0Mw`cRD}mX&W}C)?TIQp z00kpHufhXx>{_@A4}hF2yJ<{a6&`^1JJwd=0T^&oO%)yhIdAr_LVpz=fRrA-Dm(yd zW_qje0LVGC9otN;!UNE2>2pUpmpiN7eh(gib$j=D@Bs83_KpV+fSjYd?Z@pNJOJH4+2X+iurTzB2M>Up zuY2vh--8F>j+_-9JOI%Hmw501$ho_lt#dti04A-i^56mZ>8=?bJOFYY?}-;DdGG*~ z4l4KH0hrinyax|}oYNb6V5A2Rz=ghU4<3L6a|V0x0Lb~hvkLlp@Blo$@No|wfS9CS z9y|cd^uq(-?9$DH2jI%JhsE!8*7rN)@ZbTE^M3E%*wKRrVEdMTd+-2!bKpJ?9soH9 zc<{g5d+-3fvG`689)Mlq*?T+yaz5}6Nw;|L0A%iHS*-~q_jWq9xa$T`E?FQj_#04$o3;=u#Zu5Gdh z4}hFM?AxyQ-~kx2IKhJlpm|oj2M>UpOMLh1u^v1CEnmlY@Boar$9V7n$a%$U&qjIh z0Q4LY<-r3`e?{lP10d%Zf8o-3@BqBfPUpb`a4J#f!2`hQfBc6(;{o9NcmVi$JOFa; zF|UUQfY-+Z!296=kn@na9y|bCA07a%7Y~4(lg#JA1Hk9Q1Hk9S10d%ob3gC^aDVUs zaKG>X$hpegPdotJUpxTZZ#)2U-ZJZf2Y~g#1HgLW0g!W;Sx-CwtS=q_)*BCioX^aD zSRgzA><>Hu>=!%$a&9yG2@e4K3l9MM4G(~v=gfY@1Hk^o1HgX81Hk^p1HgX91Hk^q z1HgXA10d%=6AyR*hz~pf#0wq(ITxCE!UI5j;Q=7t@Bqkp(ZnMj0OAu50P%_kK+cgS zp78(>-*^CscRT=czBKs&4*>ZA4*>ZB4}hFIO+LW`Kz_jkK)%5PK>oo4Kt93)Kz_ml zK)%8QAm>z*&+q_{-|zsC@9+S~`PJk@JOJcJJOJcNJOFa8HTe_|0QnUU0QnXV0QnaW z0QndX0QngY0QnjZ0Qnma0Qnpb0Qnsc0QnvdfSiv_J-`D%eZT`iy}$z?=Vnt+@BmO> z@BmP6@Bqkp+SDUF0MsWu0Msiy0CLVY^$ZUH^$iaI^$rh!oWD&y!~;Nm!~;OR!~-Db za#K(708n4?08nr70LXdW)MGpV)Mq>Z)N4Eda*j9k91j5X9S;EY9uI(=?+qTn0{}k2 z0{~vY10d&qgD3C+fG_X>fH&{}fIsj6fJg8EfKTuMfLHJUfM4(cfM@UkfN$^sfOqf! z$ob*mAv^%!BRl}$B|HFft~huK4*>WI4*+-z4}hFE4j#h;06xP50A9lbAm@;S=kNf4 z@9+SC_wWFK|L_2S2k`)a5Agti7x4gqAMpTyC-DG)FYy3?H}L?-dFJ3zJOJQRJOJR; zwZa1ce#HX-p2Y(IzQqFo-o*nT=bwXz@c@92@c@9A@c_uV=-_EQ0N`sp0N`yr0N`&t z0N`;v0N`^x0N`~z0CJ8xcpeV`_#O`ccpnb{_#Y1d{Qw>S`U5-w^b2?ZS2cCWo4*>lg9sv41JOFY&JpCXZ z0Qy5b0Q8G^0OZ_w`bj(h^p|)5=r{2I(0}3qpdZBpK!1t{fPNJZfSfZ=KZ^%|{uU1a z{VpB=Ie(sh7!LsbF&+T=Wjp}%&v*dnr||&LU*iFw-_|?;k$Ls><9Gn*&+!1zuj2ur zf5!trKaU51{vHni{XQN5Io}>W01p8C03HDN0z3e6?tK@*Cukl3!7tzefN#J90RMmo z06qc_0Q>|V0Qd?#0Pq)h0N^w50KjkH0f6to0|5Vl2LL_<4*>iK9su|fJOJ<~cmUv2 z@BqNC-~oVd!29su|&JOJ=ncmUwH z@BqMf;Q@gE!UF&wh6ezC3=aT&86E)mGduwBX?OtO*YE(qx8VVRf5QU+ABP73ehv=+ zd>tMD_&YoR@OgLu;P>zV!1v(+fd9h-03V140Dce;0DK`H0Qf^Z0Pu-;0N@w#0Khlm z0f2wR0{|b12LOH&4*+~69su}DJOJ>ScmUux@c_Vg;sJpF!~*~yiU$CG6b}G=DINg$ zQ#=6hsdxb3SMdPAx8ebSf5ig;ABzV7eijb^d@UXT_**;x@VR&Z;CJx=!1v+-fd9n< z03VD80Dc$`0DLhX0Qh4(0Px9p0N|JL0K^Ht84m#bGadl=XgmP$(|7>jt4|9L0Q@x` z0QhV?0Px#*0N}gv0Kk9a0e}z30{}mc2LQet4*>i*9su}sJOJ?PcmUwr@c_WT;{kw= z#{&RAj|Tw09uENgJstq~d^`Z~`*;B0`|$w4|KkBb55NO}K7a=Ry#NmY`T-sQ^aMNr z=nHrN&>Qdopg-UNK##x!fIfi-0KEba0QvcJ9su+dJOJn`cmU8_@BpB{-~m97!2^Ikg9iY;1`h!G4ITjW96SK%J9q%l zd+-3D|KI^Y55fb0K70KEzi z0Qwak0Q4+80O(tI0MNVe0HA;20YDGK1Asn;2LQbc4*>cZ9su+-JOJoxcmUAb@BpB{ z;Q>I8!vlamhX(+?4i5nO9UcJmJUjsCdw2lQ`|tpu|KR~Z55xn2K8ObZy$}xo`XL?w z^h7)W=!Qgppg-aPK##-&fIf)_0KF0q0Qw~!0Q5{e0O*@|0MI+}0HA;30YDGM z1Asn?2LQbk4*>cp9su-IJOJpccmU8_@c^K|;sHR9#RGsoiw6L`77qaWEgk^$Ts#2i zyLbT5d+`9E|Kb5a55@z4K8yzdy%-Mw`Y|2=^kh5$=*xHj(3|l9pg-dQK##@)fIf`} z0KFOy0Qxl^0Q77;0O;Fz0MNVf0HA;40YDGO1Asn`2LQbs4*>c(9su-oJOJqHcmUAb z@c^K|;{iaA#{+;qj|Tv~9uENeJstq`d^`Z?`*;A*`|$vv|MM?j^LKoYpW$cu9e$VB z&|XWtCa=wV@Ls$p@69!EEnE}V#x-)STr=0sXW+B&nfPpcMm{T_na|EW;9hV~xHsG* z?iKfpd&fQGUUE;lx7=gyHTRr*&l<26tO;ww8nITa8EdDlp;$}Sl(l7zS!>puwPz2o z7uXZ*4fY6og+0UGVGpsF*i-B+_85DOJ;&Z-53(28lk83QD0`JX%id)VvzOV^>}~cq zd!0Sc-X{i#1!98OAV!E4VusiuhKMC%ir6B?h&5u4*dqpsMPicJBu0re5oG`X6bP3|U#lgr8J;Q%UOMofB7GMmp2ABiv0R{n!fJwk6U=*+lm<8+th5^ffX}~sM9Iy_U2kZj| z0t;#4aOKBbefvvz;U@b5g*b58>76X%k&A@12H83044GagC1Ji-+ zz<6LiFdx_t3uFfZ5_3=9?q6N8Px$Y5nKGuRmn4VDH|gRQ~XU~Mor*c%KE76+4q z&B5qkbuc^F9Sjea2h)S?!T4Z(FhAIz9)Mneo`Bwf9)Vtgo`K$h9)ezio`T+j9)n(k zo`c?l9)wFt9*ACuo`~Lv9*JIwo{8Rx z9*SOyo{HWI4*Jt@5@Ju1B_JuAH{JuJN}JuSU0 zJuba2Jukg4Jutm6Ju$s8Ju4bKfr;&g}{lxjlhw>mB5+s`~(~d zTnd~D+zK2ETnn5F+zT8GTnwBH+zcEITn(HJ&u_rtz~#W{!0o{C!1ciS@caiH5L^(P z5Zn+P5nK_R5zmjnA;BfVDZwqlF~K##Ir01n928s>oD|#?92Hy@oE6Wnz+u50ZjpI0gVBz z0nLHu578jdBG4qzCeSF*D$p!=ei01=EdxyhZ3B%1tpm-2=O58P&_d8e&_>Wm&`Quu zczzNM1uX?l1#Jb51+4|mh37BPV9;XFWYA{NXwYiVY3MQBE7M`%cBNoY!FOK41JO=wPNPiRn@79}((v?(+yv???!o?k`7 zLd!zaLfb;)LhC~F;`vuJFtjiGPE)@GoGJCLqkhLQ$t%rV?%30b3=PWgF}l$ zlS7+BqeH7hv*Y<)G(5CCG(EIEG(NOGG(VpIMFT_&L=!|CL?c8iL^I_1VKhXvL^MUT zMKngVMl?sBKSqN@i$s$|n?$2Tt3qhhD`FAvMv~VhI&1t}@AS_@P@Lp7zLR|FLx&=iJr(S`Wu#RXsz!uJyj}@v%>= z?ep=ISNi7nf7ms0K=r`&gLVxLKlRm+b3-q>e;syt_@xm)jyyH0VRZeNEoFdE_!RrTA4;(q*VOM_tD}6tHa&4cnPu%zTwcep# zRXrV#UF)%{`#7hq+h_lo_QG+`rRr9bbIlmg2n~dforsy%X-aUNoCgh&U?wb`hcFfq8ZcSU1axLlU z#1je5_&u?0W0pnfbQAvm=6a87Vh%;?$}4eyO#1EIuYFq%{!;w&wx9AZENf2qVaEC2 z&pvbJ`=(*vee>;rZyLXLojCE;;Nz#i9P`Dc&!;xT9$EI;O`q=kxa*;lA5A=%`r+0C z&iy}z7OD3Hzuq_Jy?ghbty}fZV|(Iuhu*H->DUoh`{|pj-x#&M!?vW?&(zd!S@+t^ z%_BBF_Gca*gs(Pq*cpS?q2cD@`U9bmW^HdvhUj^ zwk5+CZ+o$IQIAD|h1V7gTo9b!ZvF~yoOjy1D|08${d3N&IT>?ao!xQv@mW)5S!W%r zo?Lx<^_i+b)rhLwtFCy$o(-OeFCIrncpkow`ogC{@gdT8gzH+{P7v)Ch38!ml5=8Mx`4nBV3E7ys}uLU0acG!2{ zH$8La_p>w3C;YIiIsd}8pNfAz_)FiGbH7gdE$)w%SK77KUF~u0o9h$)#{0uR1>zhL z&LZJF6V628Touk{;d~d)h&i|4lEzszN5pwI&lHAkG)&Y4@B+r`;moFB#+WSnEhS!n&md1_e&dpqFi z=4?2;<(yIX+C6oh>$>MEoVPbB|L{Y2{y964^9O&pXzeyiJOja5ivID}di*ZV^W|K~ z&CO~r&Zp%07S73RxqWS)N5!)`oca0ZFSh=iJ?a-{r*i)3lNsv=H5Kd{JbnE~Pc0D7 zgYisRQSn8$qWg6i&&T=hxio_3^uD&H}Wc&%)F+eKqH`JWj#^>UA= z-M6(JfBn9ze2brcOE`FowJ`DLl?|gGWz(83(IXYIg8?Y-}N&OiZh8mSejUQrGIfH zGd?&YWLJkRm8<&huUst7y9s^rV`cSCS1LKXg&8pXpFi{We4n4==lMN;pV#5_cwJtf z_u>6`U*4bV;Ci?&u8-^Fdbw_{pU=VP;dAl%_?+736`z~W&wb#2a9_AT+$ZiA_l^6< zedK;}U%9{BXYM!mo%_!^upX=n>%%&+UaTAI$2zi}tSjrwI{IqD`pV}yTUHav0(Q|hdeLKDX2EiY^EjWk=1dlOQa3Sz1 za5C^ZhXps(UGPgj!BN3;!IhmAd>fqICxZ8@72M%-f`5d=ga`dhaH;UInw}?kVYubD z1wTDraNNrTPY%}(U;i(``J)?b7uo~*1^NdX20FxSp(UUPOcb0xygc0clY$?IPKlAr|pP%FB`8|H0 z*WvYeU0$E};r)1D-kdblpGkL%=mxo)nX&%x*6bMg83oZ9CVpPSFmec*m@U${Tq zC+-*bjr+%a)Ob>HU%9{BXYM!mo%_!^upX=n>%%&+UaTAI$2zi}tSjrwI#_A~pM z{mnjSzq9Yz|HJ|DKwJy+5%EM^5nsd^@kZPcf5aj2NL&)1#3}Jg+!DXU zG4V`X6W_!+@lMXx_A2i_ey2Yp;et8zF4W$CLQW@ z+v!T>-R{>q`M;=C?mUpwdC7rFC84Q(=ky(wO8aZh&Zc#hN?F$M&f8{JDwFP**7>7x zl}b{7C{mhaN z7fw+^Gpb8++fGpq&z)0}uy?Yue6hD=bovuP*sEd6F_Wu%<*=I#H?Eu)d^Q){Oao>eZ5*jZ9k_N;R8$=xLz8Yd{X zKT=l`>^eaS-2Gn3@}18pJ#4`eoAntbKjHn7A+yFS*_RHKxSF3PO?1arpz34lgGt zeVi_3?H_vO*7E+!8_p!<{K|gH(`%BI@$t@vK-r6hF9RiZccR6>;| zW$K%cDZ2f6O6z-%DhH!2O65mAl$0)3#rS!5$j!=8peX4u$Vg#us!@_Wf|L@>}fv+P{3w-|;>c(Hdx<@z?Jcp#*lX-L_8xnXy~v(qZ?Z?(tL$0!E_;~0%${a%v&Y%% z?0NP+F+eO36T}8FLaY!o#11h;ED=-07BNPw5p%>IF-R;Dlf))5N~{vI#4a&REEChj zHZe}D6Z6DAIe=V1P9QgsBghrx3~~oKgj_;SA-9lY$Tj2~at}F(TtrSHH<6>rRpcyk z7debvMouHQk>kj9HGT{a^s`=lA%t`2Ie= zFMfU>KQDfNAHOeNZy&EGUca8#7w=ck`-%6j=l#X?)N?)J`s%qpalQ3iuekntu3vnf zdOnZ%eD!=j@pl0*s#Cio;FR^|>)=#Wwko6Sn8)SXOdIwo=vHn5UU+jk<`$6oF zAp1k?mmvE^?4Ka}N9?B{`$_DtAp1+~w;=mX?7txUPwdAa`%&!AAp2A7*C6{Yi`BdarmHaC5 ztxCQX`Bx?XihQh+k41h~!2lv(tK@5uzg6BQUnT#GdZ1Dd zM14@H529YE)C*BRRO*MQCo1(s)EAZdBI=Dwy%F_CrT&O|q*9MWeNw4UqF$-gD^b5x z>X)czD)mg%HYYlx6ZKD}{)u|1QV&IaRH=`mUaHhfQ9o7cr>LhY^;FbXmHH~` ztxCNW^;f0-ih8V4k41e}sn4QbtJG^zzg6nDsOKv6T-0}!`Y!6dO1&5LUj+k*uT?OB z_?`*|5I?Je0mSdBU;y!2Di}b#wh9Ii@1=qP#Cxk?0C6oU7(iT`3I-6@s)7N;wX0wN z@mW+bfcR`G7(jeh6$~Igy9x#n_d*2&hmAaa)q1`xSS z1p|oOrh)-Pu2aDPBKN6a0Fet-Fo4L7s@5O%oUDQYMDA3<03w&FU;vR@RWN|awJI1u z6$~J1kqQP7wMhj7h+3tB0YvRm!2qI` zsbBz6+f*=ssC6nBK-4}J3?OQu3I-6hQPuk6_LV9aK-5kZ3?OQ$3I-6hRRsfxTC0Kq zMD10<0HPMFU;t5@RWN|4)hZZ3)NU0FAZob^1`xGf1p|m$uYv(Y?N>nnkw3o|`98Iu zpQrZo`_z73Z(ro~sr|ekwV(H=_H#Ydey)$&&-GIKxqfOtpNHDd=cD%Xd8z$;eriAW zgWAviq4smXsQui(`pEsH_H%!!{oHSAKlh*7&w5b%Ss!XY>qYHn{iyw{C$*pTrS`Ml z)PB~V+RuKV_Om~z{p=TNKl_K;&wirzv%jeQ>^EvZ`;Xesex&xZKdJrfS86}|m)g&M zruMVHsr~GCYCrp*+D|-C`-u-~Kk-8CCw{2?#1plj_@ed`Z`6L`kJ?W>Qu~QdYCrKx z?I(Vz{lqi1pZKQs6Ytc1;-A`2KA`rKAE^E03u-_4gW69%q4twssQu&{YCrjh+D|^B z_LHBe{p2fZKlzK=Pd=meli#TQ$>-F5@;kMkd{6Bs|5N*^2h@J*1GS%eLG7o0Q2VJT z)PCv99Ne(DpopL#{@r+!iUsb|!F>KnD6dPnW2{!#m>htz)RBekD; zN$sb8Qv0c=)PCwKwV!%R?Wg`y`>Ds&e(E!|pL$L0r+!oWspr&w>N~ZcdQa`w{*B-P z?R)%81TSd6%WFjNg!bCJM+9$Z@69zt@Q8M8Tw?^UXxGkXh~OFRv+)@tct`u}+=B=n z((VoSD1w)?d&fPD;3@6ia*rc;OS|{1K?IL!Yr`5v@S3)EtYHMtX=}?GNARAu_UwTO z9@O>*dnAGvwY|e0ir~rr-&`N!+v0Z2p^l z@KG8z1p`F*Dh<1W0U~^shHb$B5xz^qzF>d|AEserFhGPa)37rbAi}3<*cuEF;oCIq z4F-ttaT+!U14Q^b4ZDK@B7B~P?ZE&MzE8vcV1Ni8sPzV5fCyix^$uWw2%o6+7GQt~ z->CH-U;ug%@)5lW7$Cw|YP|~>Ai`&Ay$u*3!gp%D4;UcAhibhM7$CxzYP}N}Ai}3= zy%qVDUJDEm;a|003=9zAXaB!f6Br=E-)g-a7$Cy$YP}v9Aj1D@y&xDM!Vhb`A{ZdT zA8WlN7$CwgYrQ5IAi_Uuy(kzU!cS|xDj0y?mHI_53kHbr+gh&+28i(AS}zO+i16cD zuM7r=@aI}D4F-tt>sqf328i(QS}zU;i171TuMP%?@b_9T4+ePq-*B zfY_TFM+H{}UWK~?1Hfg0XW_QM0B~L4UAQkW09+V&7;X#<09OWHhC2fTz@>qw;nu(a zBGwe}HryK+04@$Z4mSq|fU5(q!`*=a;PSxpaC=|?xIXYc+#eVKE|7izZV(IrS4h7A zcL)Z6OQfHGTLc5ZHPUauJ%Rz?BI!rqCcyx3mGmocmtX+6O!^tPO)vmlC;blGCl~-O zlzs?qRO^raUoWM9QosOksq|BDt6%`QR{AZtS1dY#T-(CMO0I-RjV zr;9Dr>9UG+y7*$9F2|wM>76>AsZ^&+a_Mwtw@#N*rqfx=b-J_)oi1OzvEHk57<@WM zv|r~i26T?t8l5AnR_BPX(>ZcNI)^^2bC?=*j-*DN!`!5Eq%`Xs))t*3tySm9*G1{{ z`Y4aV5ao$BMR|+`QJ&bsC{I>VlqbG8%9G=W^5~sW9#d(QC&?A%F}tHYDP>U}Yk8C> zts=^k?}>8gy-^{9FDex6j|v$BQK8tHs8CjIR4BeKDwGq73hBd9AyY$CD5)_jWNwNI zr8Gx{tSwQYwAQFlzAjq4f3z;c5Uq+(vY zb;+)1oy8rkOD&7m*~+7J=@rpByRgvez0r;gU$i5}AMMBtL_6YYq8-__(T;?=Xh&`+ z+L0KJcH}igJCYlt9hRnOM{0Al!`2e*NNm|{Gc1u>qu!Wd6> zQH&>{IL4Ffi18#kV?24KF`i^sjK|`R@uZf;cx>e{p7e?skKGd!(tBe<8NQfMj6Wun z8HfqR)x?CdYhywQbuppbP)sN>923fGhzTV(#)K?QF`?Avn2@a{CY0V96SC`Kbq0N` z-e8E;Wtd|1#scwmVXQu@C{`a|9IMZ9#On3VSiPwm8 z&-cXYOx{?h!56E`^T#@k0r9gnvCgbo;i|8Tb>@U(o%(RB)6@{_OlpjEnww&sDb2A? zYfG#%tu@w}uZwdS^l@H;A(UQ=nDH^~*} zHM`@yDP?h9Yk8bEts>5w?}>Amym4WJFV2zYj|&?EaZXcBTsW&XE*xJM7tRUAh4taM zu&E&~oYWW>HaEqEQ<~$#)|R+%T5DW5Ul;E&=;QSnhImhgDPEsh5bre<#_O|-;`Ir| z@%mgxygtzxug@!u*C)H;^%i%$KD8`fZ!3@2r&q-5?Vfm#$s6y?@Wp%b{PE7rK)lyf z6YtEfjdv#0#XECD@y^6>yfd#M-kIDO@3b_Sh8T1L>3`0UF z!<697EJz3&3KP89MG4-7;skH5Bf*>KOz`HFCU}!w30{jk!JAr^;I)+}c+)Eqymn7Q z$mC53XZR9AdH#fOW*{MKs!0fE*CvD$>Jq}ap@eW^I3b+ZkPuF8ObA<=62hs?31M4H zLO8uOA#B%+r8npudXwH@EYRyR3iXDpBE2W0SZ~O2>J6q+y&=h^H<;aeLrR(6U@g}h z(kk?Ze2-q2g)O7s~E5_NfniN36&L{DCEqA$mhs7rPx`b?#Xz9d(o z&+Jb0rIaQ5tmTQmw2DMuz9-R<yNOmO|Ebb&jYFU!OR-R-?uShc3y-B4Rz9dhwKdCe`Ail0iD$TA<@+Q|MmF9-T z--nY*^BR&$lN*ytElo+Ksm)2Hww9#Q^wy+OyFS^MVM_L879>0J3X^@=MaiMO;$&a0 zGuf9{n(RwnY>`Sjm_SwD34H>@VP_jR{Av2I%npczDkX@S`POeLC z$PFhqQk#<-Y%R$R>8;5Pc3q0js82B&3@N%yQ;Nx0kfJvhrkJvdQuLX{ zDW)7pioxhiF_}tJ44JMJli4kPrYyx|El)9}Riv2mJt;b~H^pV}rRXgF6qhlOqBqy1 zxUyah4z8;yZfr@1DzF{?J!X{k$X%n7BIn!~A$riRo~OJi!Ixhd6UZcc5qwxl+u zwWc=a>(V?%eVQr5kmkuWrI|7d(!9pPG*fm_nm4mJ&6Mj%^BJ9Kro7TLU#2U~WO1kY zjb&*jTX~u(y&}zI_oR8u-ZWQ+FU@1|r@1l%X(WC;eY!uxkRHl3rTa4r(!<8WbboeHdN{K<-Jk17 zZ!kL3{duM74VkWVzr~&2Xe>+j+sf1Z=@sdIyC*$l_NF&x_|iibe|lqPAU$lZNpH-q zO%Ge@(i?L_=?&&^dShNgdV{4gz0uN?-e_)4Z?v_DuUpd_?RrCj2xc*B*HBr^hUkO zV04&F#)8ZOV}YsASdd+0beoEe1-TBRF3)K!$SXBE@?6FOi(7nMW-PFk8^gv5V}adc z)S10Tz1e4UnEgg~rnqu*jnSQ5Yjm6IjPBf!QD+Go-FXd0ho#Zzwls;?Xg0cSE#m7| zquZ{_G??_6CX*qv)MUyGWENyPO@*0(?4r!DsW>x`>&P_ZIWq%!rJ1F9uFQbNo#`}} zWd>~JnPGE9X29;rG?=}aCbKWI)a=h}60hJg)nqnh*Jd`F>N1;hLzxCkII}6QAye%2 z%qB}yrpw%%*<@?UY&5rKHre%A1zCnHUA8GpeC8~Dc5zl=jzj#}nN?^i%`#-WvI@;^ z@x8LFLTh=JDZ3)8FyE7m6;l{ z47SFsGILXw$=aM%W^Ktb*;=#8^7YvT*@kRKwkg{!zA7{oW*1tEvYpw**)=)N>>86R zyT|{`JQZt)tl|M`m!B1f418e$aY$5vdgTs*-l$sc5_ZByVM%a zZZH95z=@p~an3U@OZhw3X+$Z526%c2ADS>dgsQeK{VRKPO-dvoAhR%NoVn!+<5_$*u$nm zbFHbsQfG48LMDSbEPl4ZWUw@v%FRvU_nS@S))te?+-fS%*XI@FneyD`!aTjLD9@W$ zoaePU^9n4kyjrt6Pj4y9tF@Nrc`X%rwfUYrhuNFwH2d-#7Jr`G5)i*vlV`Hkim&VP z{I*bDsX3hIGB@Oj{hHTeZpt%Rn)6z$EqQ)RYhFu!vANvpG8b9O%tf|xv&m9nF0%W~ zA+z5cHrJY)%ys5w@h6WZZ1!3j%ppsox!lrZ4p^GatZmR57Qz0l&c6)uCcgmwU#DJou$#%Xlb!DTUu$@g zGON?-wz{n4)(UHJzQ?M|_gV|`eO8^_Z!NF~tor;KYhiw^Rd27e7TQBrLw?v=l;2=A z*c+`y_9m+-zghfVi`8UrwN~WoZ3Q-yt;kkvtFbw4Zkx+iZY#4D+AC~z`5v1i-)nQ{ z`)m%o-{!UlY|i`|TUmas&1tW*mDxkK()_TkJiozKYHzfa+na2z{AOE4ev8dzZ?(1N z>+=ipP5DLn&U|;iE5AIyBEQ(~%@5=Y1Z4N;2kf=^UVB}BjXfm(92Q?UIL*~{$}_By-Q9Vema9-6Gv{ZkoxK8IfC(3x~j zok9G+P*vh15BPbmB9$m`$eySYw-_$Ve_NV~>Dab-n1uejE*_>M>XsZ?BVgZQsc zTyaQTbAz~Qzpg^pD1Is={x+bi5r5~`HR)=_|Lb(k;yW$kx0}RQEuu5mMeE{qQMx!? zj4r{W^TdkoGu{*BiSvkV(IGl-N3|?i7l;WYxOMJWceFd+9rb@aoe6x5_xAsvdFGiJwZ>93 zLM^dxv8R@p#-7?*M5qd(1R=46AjwQ3h|q|oq6nduASKqODvNz-EJf{A6*N^vQH}Nf z&wGCJ{omKC_gu&^!ze-NWi( z^00WAJ!~mjijktHSW`?XmK1Y}t-sda=&$#;_BZvn^f&jno!8DA=k@c}^QQBb^XBt5 zAI-<`(S58wCLfEB*~gZpWf@s|mNm%L?cm8v?iJoEs5qtTTiX0(Nphf?P=<1>1pn1 zJE@&CPU)qRE4@U{4weQnuVwvnx8 z3rmr0$u?)(qO>R@N{_NenW8LF<|tdSR%{gO#nxg|v8C8tY%?^&Fm%Iem<)?yHf#x6 zf{~ynSQAVMmIQNxt*h46=&E><$wcgs=+SJ<8+T7Ze{OwldTx1cer_wRl{QN2rLCn+r7fk+rEQC}MaCk1k#&)2k!6v2 zk*&AZ+vu(Lw)Qslw)8glwiRdvMuA>nEie^W3d{wzCR!7tiQdH8#MH#n#N5P|sbw0O zdZsnglxfK{XWGKFFe6M4vxb?%EMev_+e7W4@lbzgeQ0`Ud1!uU^U}NwFWt-PW%9Ck znZ0alv^B;WeT{XEX^mx#d5vwDHq02N53>$44YLe053}9WZW=fBo7S7Ao0gmAo3@Tx zN28CP4Sj^bG*%8^Edo;f2+UA-{Nofw;k3F z8;AA7*2AX5mc!=5w%S^4qqbh#TH93HQrleHwn5uqY|uAYH<&h9HkdcqLbMPgL=Uls zm_jTe<`CN*?T&Frzhk{)x?{OxzGJJPRWK^(6|5CZ6)Y9Z6>LkjrN&ZysdcGosb#5o zsqHiEGvhP;GwWxj&n%yrKeJuXE*KZ|3)Ty!3ziG!3$~V8OQWUU(%RD0($do0(zaXM zZS2-}TX&mwTXvgw+oot!j4ApQ>lD)z%M|kz+f(hS@l=0meQJ7Yd1`)YE2)(jWt*3+ibmec0b zwnkbbqmkao+Q`(%(#YJ%woTh+Y}2<{x0$wCwwbrt#%tq^@%nh{c++^xc=LGM1MPwF zK!0F;V0vJAV18ip)I1GO-P7u6^0auGJ#DMBRmLiPm35VAm1UKAm2Idt)EKG{wGK56 zwG1^6wO!Y)8`t&g*6XJ0mh0y0w)R?kqrKkV+TPUO(%#(Oc0fB|9MBI~510;E4ww(v zW@)pGS^6yNEYmE@Eb}beEA5r>N`Ga2WqM_KWqxI|YF5LlTdh`;)nYYUZS%Bw#yowV zb)IRSWuAGSt-IFU=&pCSb~kmmbT@am9oLQ<$MxgZn>JfEn>X9WXk&~q`WWjN(-_Mb^BCKG?Y?nezi+*7x^KB}zHh6n zRW>T?m93Rcl`WOcm2E4u6~+pEg>{8#g=K|#g)LAEGy?TNYoIC65@-&zUDhrem-Wlm z%cjeg%jV0rwpv@Gt=`t!*3{P0*4);%U)yi&*Y{iZoAz7woA=wMYtxPC`gH4b({#&p z^K{z_?S=6|e_?%LdSQ8Ceqk%Cl{L!hWvyjRWi4gRWo^k?vXQJOTa!)6mSl6Xt*_SC z=&Sd&_BHjj^fmXjoz>17XZ5qzv!=6_v*xq5W?D0&ncmFW%+$=%%-qbjL)&5O(05pO zn08opn0MGFX_Jge`XuWl(X~t#z$wt!1rwt!=nA+!(G8w+=TAw+uHAx82fi8MpLX)?21qmRsgqHb2eJ z@YDUQekMPQpV`lrtK}NGdagCslxxW~=h|YmSR+=CwZ@uaEwScU+dJ)@@lJndeP?=S zd1roSbG0gKOQmjcm((&gmioqKQu7!ob&!VCMp9Ei9YJ%ctE66FzSIa%letgoG^yRB zo)aI3x=(6BsSl-QlsZysOQ|<)DK)6nrAn^KkNQ<=TB&oD+?QW3sfWeip>CF1TIy@5 zxh2<4Z7%h?)bLW*ORX>UzvQLKMU#If=ZxP(Zkc>CIb`z2|xbNDyq9-fQm<2iX=o}1_AJ$N79i}&L_d0*a} z_vaiq56*@2;hZ=x&W-cq963+UmGkACId9IL^XDG85AKEg;hwlJ?v4B79=T8MmHXwM zxo_^B`$rCt2jl|zKu(YsKG`9ltoN8}RuL{5=c=fk$2=C`9}}X2lN8{Ku^#Y^alMwkI*Od3jIRQ&^PoB{X-AYNAwc?L{HII^cMX^ zkI`rJ8vRDk(RcJ-lmE#79+W>Hlz*Qif1e{imm@!)L%x(8s(elkxmNkyTynDVJ-Os= z$>+-V=aTm&7fgPboH2Q1a?9kK<@s~TOUwJ@lD{UWO`esUMUJSKaMhqv6De}$s$ZqvQRL56`${b% zHL}z!Qb$8=4fQr6zj@T5ZYLlo}qK1jO zCTg8TukxsgqE3q1De9?2|MIB25`E00K1=j7k2)^V*F5UssDY#IjaoPA+o)+1J7&I1kQ+^WmI0FV2ng;~Y6p&Xx1!oH=jmNjZP+fm&4Vh5Mn7mHXn} zME_m)$bE9J+%NY`?Jf7t{UZm+19E|UAScKRa)bOJN5~U$g?u4r$QyEp{2_hHt`fCFHEbHN99?L;TA9z2mdCZ|tN2sI(} zmQY(lj|w#^|G%~Y>;~W5wKslXHFyX{gOgx0_z5P1t6(vB3kLHK|DS)y-|;j2EWg9= z@)>*=N)(#-U&?P9eG#YnRn+5a^CBZWKeEI7AXB^_vc~%&gS(=)inAQ--!qQ1G#Z_ZwHK+?udnY2W%>C&&gdQ@K=*b%-rer|)hk@3Y<)0_)SbNXq{Y0o0#ZGXhiy>cBMxccI)N0xqF zm|Z5VU0^V))@J*W>5f{)mj9_AJfG^Z(B=TK+kuy>m1*y>%=# zy>YxSy>fi67d!Iw7Y=XpGe@HNiQ{kc-;Pg>KOOsxdk#;_?+%CMS4W}cs-uVXq9fCK z*5P40>4>z+G(+1#N2e0|92-jPa9H2l;u!zlI>*`fQXQ>IE_S4robPyDGS(4XD$;SJ z)C5O;Ie~?xgB*`b_i+p;)5Y<98DB@WvP~V1vb7wAW#4!7DEFRYd%3r__EK#-^1&5NoQiJ$7`3wAhmsl4BcJbi^iC43B+UF*tTmrGBy5l{&{(d%sz% z9j+t2HNX+>vSuw4urp2s~TPUtNJ?8TdLSk}0=o?eh z^P`w}Pw$w!p5NB>)WXmnr=|LE)* z4WmE!uzd9F4~u8t{P4Hgel?HHURN`7wpMHD?2)x*%syO8rjFJ2pPf*<-t2p|OU>?9 z=kct~buP}bdGDV!)_c{g6W+*7@T|nT{wIjS`|hY#b65)7Tz$vvKvP_Dx>R zSlQ&tjQ^VKoiV6s%8Wft!)BCk)?>z`W_4y1G~cBloo^h%Dc7Q{<$UF_EWR4vMVTs%d0=D$`KxRp0n2Ek7DG zWzk3Vr`-SO)nt47g2~^sUpx6}`|!!VJA6EOQ-=zZ-*!M(_C)OLI48o^X+Xq?PIV%( zJ3S5e@H-S9>X#Cp=NBAarE}BpNu6I$I@bBrr0Vt+lcw57O*(D&nN;iJw-aZ4e0t*9 zk5^3e_79mj%fIQw^ZqZx>UKFAHoME>u=8Dpgw^fp9X6}$qY3A_W>4_$7B?ZPTfl@f z-6~F~)&1u9$nKlQpX!dDwizGMmaXkl&JJ|Dsapij54jtKRbLie) zVWHN5mZ3ob|Bc-mkTdpmK>XO=pL8F)_LEX$AAfRgOy}Oq#-#KfJm&Y_o?}|{`Sr`V zKIvcn+-KC6wfffkGNNzM=)At$MwjasHhOr!rlT|aJs$PCU)HEz{U?t~?cZY5z5Zat z?vS`oCx@KJo)CV*j*>}Lh5vvDm8}Y}0&=IW$)*BH!urT=a z!1Unv2MrG%F~~D``=Bes{~fe!xIM7{@T9;}!!HG%_@esYIbVz&?Ds|1;FrT*4&FP= zKWNghg+UF6T?#7v+-peM=c9)Nex5nR2ezyoMBh zeo1~~q5P(Q&|dkJm&3B;6UWLYS08-hi%arNN%D>Mz-997SB7twCmA76^!}i9dAh>j zSb5S`14HGhx5?8#9MM~|?ZYL&sxaaPL{XcEpPucFs+>r#{#kN5 zk4I(7Ne!11E7wmPSvkQ7ImudmN6D$C%jy35Ws5$Za@vFC)R)QWpBwX7Zep$6NbgVL z<#ux9mi`+XBsXRa2$S2}EVp<&v|O(bjB?JkmAJ}S5Uc3gzqJh*&HBq35HqE`2c zA{_xDC2=Ax*&;QMCd?8Es@rvlNYi4Gs-q%ZFT>7@q|FkE^Y&jM(sx><@a@D}ANz<@ zjuPoyAyRrur1kZrNg}ybItPmsr-(Ek5~+R~o-GnSLL}YRX^u$!9+Cb#5pP8kHi<^` z?hr28u~xLCK(yu6@R3M zR8V=cpz{Jj>2yKs?*+Bb2znO^iocBRQLUVyy0@VFM}qQw1?@uw^`{H^Cy5nE6Kjwq zR^f`)TSm!^*O8+g^`iWTWXJWlyh!rmuYyL{C`WvzCZ^g>L6Knr}Rv+uXT5`c{<(~`h z-Z>_|d+T`b-5bZox33)bx5bVdZ(cZNym{uR@aBnQ$Lqfxy@ZzL5|F)eH=ZXc5&SO$JgQfr>Vp1pIVOWC+|B3K6%ga z&*QhTUp;;j+wgH=tW1)N4S94j_TAqHVpspYJ+|H7X|b0cCdW>G=!h-zFg$kKU%|0G z{^}Qd_d(}a=YwXk)gM%kJ@9Ag*uj6kiut#wC}wHV<(TG0M`8;8kZl-$q{ZNOZM;7{ z#{Ygu%y0Ml#>CwFD5lyy@0jeneB%p_CT=$>#{Wb4dgRfa;6<_^h z=E|!lXZl{QPidFauPC+kNmOvcyke`HTY z@!>fUvdJ-`$Kg5=j}JW!Pd#)f+wyC*8?AHEB`aib-wqMoqev z>oX}a_wB?Mxu+-I$XPLQZcfO=<~dC#UO)IUEaBkMu;vFBhh6`1NZ8yTy~BKdd^F+4 zf$RzM55!Gqc_3iItsg2*Nc!RC__jZ68jqj7IJ?dGj@fU={rUaTaVx%GG_K3{1I9hs z|G~Jm`)`MSvVU{v%Y9*?TlTdK4czzNSYuz#*gbpW$Bx|FeXPgcQe*S?oEsCqXW5t< zdj^j=yW4Y2?CxK`Y_>c7%UiofeYtp7y)W&%ibg-l+BSN9R@mqPSxrY9S&v8U-#c~-?a!?@!dZo1HQ`|`8G3rcv4eD&tE&j)M{{JivLkI#>8IyIE|qV1**LmzK^ zHe~C@%poBgM-TDZ=r!c>x0iyJe7i8{lW+Zltlz#Id}u?~;OGrw2m5ZQKKS|iOMyGr zCk2MBw+A*@|L>rC>DvdbPaiQTIQ{)WUg@U?URxJCFm+w4frHllF`(kQ)dMc9?K>c4 ztv;aN+I^puT|4fxvuR$RC8wSJv`<>xr^GgA*WBx$ye74Ozcs!3d#rig@51WLe#=%5 z?>A_5xqekv=k=8>g?-nos?|4m)z5uuuZrt)@0%8VGQRn}ci1;6y?wsv-23^;$DjPL za_uKED|>(9zw&iJiIrOe&ZGtfEK9Wp3`yPF>%-KMz3#6l*DG_y!JboBjO*E9MdhCQ ziX%Nve;v_-xN7Lvr@GhqI;S=}xdmY(-dTRO{s+){7AXSahK6hl_&SK3{0GJ-slaP5QzplxtwDw-uzV+**Tdgi6#kbm)RIgQh z(&?5%lP0xnl~lfEsib`^?k)&wK|GndV6D&O1t0tLUU0X0y#@1|n-(-|elxM4S$5*2 zX3G-GHw#bP)AW)LSNyn7A4o;R;S!I>c5(sQSZjwp7nC(7S&Ck zn^>1v_RF~^ynD?Z>)m9o&D&${<~q+4y4AUsaIbbwLPG5g33X~GCLFFcF=1q_0SQ{I z_6h51)=coLX-l~I;iEaTKfFBWgAa4&WY^d9WW;<{D76L;tRpW__w=f_ohKPxV~QhMB=N-1$qD>~znD^8AUTrni> zWQBooqbqcaGgW98msY+}+(+fT;x2oXi<{!1$CdSX;oM&CfwM=sTh79=7o3i=C!E#F z9&~OPpE|AY z1vod9=;G{DqLcHQt(`N{*23vwYvRnb)_3->)^-+JYB(JhPp7A)vU9&t!TG6C&iS{w zv@_BCp3~cGbLQz5=jXcF`NE_-mzqq@rY6mKN@$zWF7`%quKu6qZ2Lcx^TIpbIq{ve zxV*DCH@>ww?Qh?6-gr~mIpa+^XN5NvoI74ucJ_Mh>Ad%HcXHM%?&3WBUx4$A|2}oTd=cdQ`o#!mix;8Jf`22Nq5noXjep~u>Ccm# z9iK0EUKIvn+OsWAk7v7`nNJTodp-*`VQ-v9ot z_}}gwkB_-`Bfi?bC-K>Lt#bnJdd+!W*mBO&!k%+{3WMjIy)%7I*q!7#CGTvSv-S6! zIX!;AJm>!HM{^Qx+Y;*Bu9VlEN1{vq>F4%ImR8qj%R!NV}3{6^cCO)annQcke3N9qY6ueHVRp7nw*iU^Hj{9l) z!ZJUlFWi0l^uocXpD%oU>cd6prvesrI~BR;uaoJEQce~uYICx9(Tx+{U&Wp1|5g1H zF<+fIzU`~2$FF|%foxsNJJu?B%(0QlGDACg&(YlEp-2Bt){nwf^*BV1 zrMKB0oc>_j`t)_%?xhdh)?j_fZDH&4w(eXXx%K(_##?evud^>H+8r@!D9pIb`GN&09AP*!*~7>CJ679Tj#kM*h3)rqc3n2FTy6mY*ox z?6tA6{Kho-&73Wt$fsDp?I)kOQa<@khVO>P@=cNQjd@$cxYLT9s5K|Vntedh}4u{K362@`j4AMnj%E1I*4>xmo*njn=2A`BWIjQUmKA^ed(>- zb0U>%L^@>$cwSqPR%6K$k=&yEbdln4k!C-U>M|)kM8emJq!%BK7OC$o(qDbCE}Ae@ zG-A)u6w!{6q9v_FTP(>Rh~`Wc4LWl?MzpEFXqER@H%=6bmKBJ$rHj@@iuTF&5z)lg zr=E*eo)+y)7cHGG+S*67)_Y+s(cl=-a~iq)Ac)+a=)&_J<9 z-NY)j6YJDStdy5nt8!ws^tgdy!Lpw`5Nmcztl9;!ZYRXb9TaP~Tddv|v3_Y{1(%C8 zOcJXYC)P1atYm~(%TTeJBgA?Ji52}+tZ9H))h=RPJBgK*ol?au#OgK?>sw!}aBZ>1 zHN+}=igm6mR=R>%>vCeXON;fEIr?JBH@>xqRX2-u*Tu@4#M=L#)mOFR?A2g5L+9Y6 z77v-`6E{?I=jF4Gdtk;d*;mZ^QuOj-JpCP^X>V3b_Mf&s&<{d!90U&f2=%1dzsVE zGpL$&_6qV0><8c(*fYj6$k$5-Mbr2*&%odF4E#LLplaaxJf1=As8_qnRc*Z5U95K4 zs$Hh4W}eUDGu4hewd+is|J@WtyK>BpChr{DQ)+fcaE$TO-<}V`B3&^l&ky3 zv0}pu)6Y|0Ij+?ETwg!A*s*bIp3a_>JlUNwHU637&#j5(8OxtI?$`U2UJ2*a@e9;kZ&$RlLKI`cE zt%q$u&`C$GDbmL774~$LG!8npWOXXBd(=M1Ds4lF<&-@ zXWu(`Hq~*kM5~fJH!gN;>X2HJoh|J9SU5V?vF@wjQjWfnjy9P`N?rPMf@8sv`YsvZ z9`?5mazx&ET)O|=K8~d~29z1qt&3y&#qZ1fE4y9_Wp7AXucnT)t&XyLm(+56Ilr*% zqwMz`?>_HQ?uhJxVYf&}ueY(^6_xb}4tf&XBYlcTo9>0N2m4(1U`NbZ*+1gh?qsZe zL0b8b+8>C$RM}La$>Z&@eZLu9f&DR)*da72Irio3#uWoUa>QocNUr#7UwG``=1(iK zTZTO*e#iR7I(B7OdN;Up?A+g~z5m;qX0h`$$NPWE-kGkl>!e|)(y?Ptb zVn*eN%|$U^y)9WKS$5K}52ehtBQZa2IbY?!w^=boV_H=m`b%0&{VFS5x_~_HTRlDI z&t9K@a4ab#=IKv4AH+848&l1%rYE~>>dIaf&qVK-%m3WBl8Qpr+ z)@r+C&keg*Lf4;(9*{E8%e(&f(R&u1^ZF+^J-W|~7S(^19XRY~DSj|Hx^v}!tM}_P zG`hy=z#32e{iC~2$gaVD9Co-22rVD&oHqMIpTy$Xo;PoPxcu|qW|#5ttGQTq=dkCc zMfJ?trPgS*7L-~#d)=OqwKBe&F?-Ga!?n_6uMWFlW|i@u{aZ{z?S4Pio4w=Xd$pT% zDmDAR$KC3%b0=2z#dPZ=S+7zy?{9zFKWp%evEKd4uA0^I%n5IWGgq^MXQj1Htb5hN zf7ZTkMRg}hHY}`j&wA|YnJar|Hi!K&^Y~x3`V-fkocTO$Z2kA=Z=HFe-HH0_@nJX3 zz{v44f2cLDLHX!_nE{jUHF(#q(aa57x;AVgJAM*mf6cCQMN!!&^hWEqpNKN;8rjIB z)8?qU&iqCd6B45Sk{vgB&XA}o=VBT+Xl0KI?|ZZH=+)Jue%RfmDgqxH9`xTm7OUZ`dbC7V2t{32jq z3;(wTk>=mZw`3O)dwEVDi-`>1e!Ar+IfEh(->KIsEUal{;;Z;p-DFP@yL%r0b7R{4 z)9qW&Ik|gUzxWlcs|{W-ZOaEwTeHI`Q1<)etZ6gN`+i27R|85-yXI-M{r1T1sU4aH zw>>ZWjVj6xptS`_QyV?0)UMu`;Hll$hPRuO-D;{&qtor!eZ-!i28lPOBwvs9-E7%8 zW!bx{zGFJZPnrL}mLDa^UL-_K3$?dt^=Odg#6O?!4Gv2Q3e zCw%gOs=YfHB|e_qu*Rki$4Xb2eCFNT4$7{0ciR(jz5mXR@1o{J{Bp?FY4X?s5sk}? z==6>3TG}Lgi&ji~8eXQQhu_>~hr*kb3iV5vm=a!)ljpZf_Aq@fyN#L*Xd0fqV^Ze| z!LKK!K0MYrzTT-xHOW54`|M4vU`sbTYtWo*A|7+Rp#2%&8z@uTm`_Jy;)n;+n!&T?I zY&}0Dtj?*rUD^A@uBDL9kE9UuT-WmzvL_r2^zL@%+qenKZbWs9lATcOWBT`9#R<`) zYjq!e>gM?Rp^@E-KHW5anEh0DWlw)dYcqb?#E2dNBj1i|cKAq-S%pW(&3#b0C%dFZ z%U&mc?*Zdh?mO7CX5k0p9t|$ntKrDop)Jph?8Tlbc0YZxIxIA&xiw(h;Fh6jUO@pz zFa9@n{f(^w2g~J*O_lvn`%A@-?Q^d8Cs$5%AG_GR_LDAMOO0*%-s4X`l>JoCWQSBr z?6NVt=BM=jvE$$|t+n5KAN$dB%qP8C^kH`ud!|agP5*LI@1OfD%^US)6>F`&$zAGw zxp=W;=47wcM%hK>NZB^JUiotU@`i+sE-W#;UzvMNM{hru*>ADzykcL~ME|T&-<;~z zzo63OQN!P)_P?~X#i+2i_xdY8Vz$@rkd5QwJ{|XJa>%4hXFp9_-6G^rX|K=xWLFk@ zuckN18rkjMzRxC93LjZzu0Ejq(WWE!{nK{A{yezdvYCnc=~A>>~zEz2h0&z0CGO3uONmJGMT&xor4g zn?3LgQ~%*xTPFohdRS`sH%%@DvYYFr?BU9)H0O)7*<%N{{mk!+zzbP}eFI+(`|s(? z!N0M$OLlby?VdEO^OA)@1tl8}TU7Q^(AY+WpO+ovHDrM7^h%X|UO9PzpTF&xIpka$ zkIyUIdNyS5)Kf#Z_2}U0%fpA_|MTzoJAQ_r<#+g9K7-HVGx==3gYV)y`EH(pXW^N6 zHlC4Z<(YYQ-hp@Fop?9ik$2^td3Vl$v*1iP8_tNc;>oiGsq4yge)Ob$QCk&tRZvA z9x{k5B9q7_GK#Dsv&b$oj4UJ5$Tl*LtRwTtK01IdpcCi@I)bjCGw2RFgf5{|=oUJL zuAy`29y*9FqLb(*I*P8Mv*<25j4q?o=r%fzuA}qHUj_@n1h4^&04u-@umcPMOTZMc z1&je}z#Om#3<8V5B(MpL0;|9*unPiF#V?)dQd^7!=l_W1bt`uP0#{=~b) z0>lKw2E+)&3d9V=4#W_|62uh57Q`6D8pIsL9>gHTBE%%bCd4SjD#R?rF2pdzGQ>2* zHpDo@I>bE0KEy!8Lc~PGM#MWAuTEtw$Uc_L;V#H*`X2fX3 zYQ${BZp3iJa>R7RcEotZdc=H+2Ot(CCL}f_MkH1wW+Zkbh9s6GrX;o`#w6Ax<|Otc z1|=3HCM7l{MkQ7yW+iqdh9#CIrX{u|#wFGz<|Xze1|}9JCMGr}MkZD!W+rwfh9;IK zrY5!~#wOM#<|g(g1}7FLCMPy0MkiJ$W+!$hh9{OMrYE*1#wXS%=7)QL17H_6e`ZHE zf6wl0ex99p{64$3`8;-T^ZD%N=KI*2$M>_#o9AK2H_ylJZ=RQ(;5*%i?sCqHo#vb$yUsaJcA#^<>_+Fj*_qDyvrC=(V8=T5!|rwN zi=FJ;AG_MQ&(pHQo%?0CJNK=4A9leb4-;iaJo2$XcE=+x>9-OA&-#f#(%#18~NTnX7%65JNpTde`~^} zhv-8;@5v9*kBswW9-=ROWrrd9UxoJ&@pU&G^~Bg2$icdj1MNm+&}n6TD_uB=}wYy!Zxq zo{_ln2KauarSA>!Uh#Y(Kh3xf2M}r^yn=oDBIw7<*eiBdV!wL$zWoJz_O9>RU$Af29i4x{ z-c^$Qme{`{AIYJKJxtkE=Mwg@d!J($v6tOs2PXFO_~jC^0rbiYwI(1Vc)kk8hH+TulUWU zpMa2EgIP0dGV@E3e#Cnx?x%D^^f@FzM|zgB>MF~bs5fWHw{rd9#|M^u|* zKjDu^Rnt%SCqehi{Di;4ZcqG|8y^fljXzWW-s@BNH%EU?KZU=;{!jd$%jNz$i9d8; zWXehWqw~MCIf=i-j!^uk$#vsS;7^5_>Yu>BnyH;Rj=yzA_K4ztZ3z9~IR03(3wg)z z&oY9?9K&DhDZ57T-@5;?=P3T%mEVUR#lLH5(vRZrDPFhk&i+U62OIenAI3kt^mN@} z{6%(_;y*q;^Y{?{^@Q zNjQiu@ zyztmdyu-P3G0@l?^vTf2y_A|e*= zBHm&TE%Dd&M^Cbd$GrYqpGAB&$Y($n@!D?LRZILfw(b6%#B=M-p*xB1mg$~5iT4zb z|M`m89mIo68n@U%eCYSA@H^tgC9?CD`0;>ez<0!xMYG;!5?=cV8XO}PWyMAQAX5#t3Yn9$id_O4r=qBQQmB098QQJ*$04+{G-UtWaZ{NBR z4uGA&Z~!ZR@!ALn(CXjI-@*ZG>9gcpH~{tr!vUPwYW)@t;M8}AHoyV&`zv|_9Kame zEer>+q~i1SZ~z6^}ABF>1RQ+B$96;}<>(k)?em4cD!vRd`?UfD( z(CEUob#MSJmZh$P1ISuDXdN5?dyL@#e&}#vEgZn|zf#u10W7%EZ!H`EyN=-iLPnoW zg9BJ$Nlt?UNGR-+1_z+>HjM+%u7Lw+^;hy5IDn-&{no$%urnDB;Hl?@)o=jz&C6E9 z0XV}4t%d`*CVQ3P045)lY`bs(6YXnO!2$fM2d{zyXd=6p;Q-oqz4r|qK-VJ~-@pNc z$Ax_Z2f%)2IDmscK3@q3(7^YHm2d#Pp2w_&17L?U96*OAC04=#49Yl@3J0)n^s-bq zfLPh{3({IDma?^%Zac-9t`)4F{m| zRaJHj{TdEnb=x{$!vT~sJzNe4z)op6fR@8zm%{-x|GUR>IDoYL^2^}>*2&&!IDo+B zo0q`>+&vw!3=SZ4YlmfU0PLoQ1Gw7!!csT@%hj}{Z~&P{#w~>d_)GRz!vWm=QeO%O zu;1(45;y>7l{HJ?0N5Q42M}|u?GiYEztfE+Z~zxGFQmW$um>9sVD{4R6gYrcVSXua z0OJ;xNr3}kS2i3#^2*G`Z~&(H(Tm{#ZXD>n7!E+?={h|7I~fk(^?$j^Z~!a)Q4 z0AhL+EP?~L_D%XCIDnC@A{W5{u-_XFU|7cw7r_BoGM_Jm1MnYpdLbMDJHX)p?q*D1 z2nP_|uFpa^0FScX3*i6`$ewWc_hrj2B*6jf_1~5R2hgT{d=eahkL(hM1IW=^CBXsw zd$Cj!9KfT$?=FA?Q2EIPZ&DY)0Sx_T@&Y)3-pzY2fCFF`I~>42^Gpli04}EAOoRhy zVPq%50eH)vb~u2;Tf!6J0BRO}k_ZPdXi9@bH~@B=!vU-weP=!#z?Fi$`EUSsN7{Ti z0QR550X#lDWIi0g@PWSb;Q;#jRGAM4z>ah{0R7}I^WXp;&Dl2(4q$uI*Yn^2`pO=4 zIDiLHf%D)1mX2sQ4-R0+va0jo06vpl>u>-|q`C15kO{tbe|o z3kNW)b+5T_00$0BHK1?+H)Ur#9KglH&lBJPvRYqDfCHHOG$#QLfW7W;0E0hEOn?KJ z{(NEr9KhK-0}|i>*!>O%FkxfO1UP_mGi(WP0GX+e=D-1zm;LZ?0A+G==D-1D9o{qt z4#4()@*Fq-cF4m4luZww0|#*9YR@@v0I9=U&Vd79&paGJxlgTg-~ftpp2Wie+?#PD z9uA@Xz z2M4hAxHAq8pzo5&ac}_UZ6R@R02e(5#=!v`Kh`Y{4&eUDc5$wJsb`}&IDpeXc*Vg1 zq;Dw~2M2JZP>*wQ0Fz!g;Q%W1c;JKs=soF{6As{?!V69~fRY&}oNxeZ4jgpC0qm@{ z+X)BI>!&SFH~^K0Z(Mn~6Ar++E6E85Fl}|56Aqxvr6?yHK>yDpoNxeLT7){`03Hk) z;e-R|eJaQa2QXpbr%pJ4K5GJ;Z~!k}cX7f2jN8`92?vn5rJWNF;Lx)cPB?(?lAAc; z0H#FMcftWw+*R8N2e4d55W)fcSJu-B2Vieq*$D>_o>9RG2aq_SoD&XUQA}wk96-#i z_ndG5!;_`PLO6hCUs;@R08g%)op1n~X6Q~hfIg#4PB?%+(=;a>z^wY36AnQBp!1KZZ@ceK9ybl}z?*|9K z`@#Y6{%`=C2OI$B0|&r)!2xi7Z~&Yq902DF2f%s50dW3s0Ne*00QUn2zJs&^I^$ z^bZaIeS`x*Kj8q-S2zIl7Y+b@h66yq;Q-KgH~>{|0v^BtfDdp0-~}82_yGq1p1=Ws zFK__h4IBXY0|x*e!2y6zZ~)*H902$Q2LPVI0f29C0N@=Q0Qd(703N~tfRAth;3XUY z_z4F9p27iuuW$h1EgS&&3kLum!vTQLZ~)*n902$Y2LPVK0f6st0N_0wfU2{>9>4)$ zAK(D67jOXB4>$nq2^;|S1r7jv0|$WpfdjxE!2w{O-~g~!Z~)jZH~{P!902wW4gh-x z2Y~&91Hc}_0bn2D0I-*E0N77B0PHCo0QMCQ0DB7ufc=F7z#hW^V4vXtu-9+^*l#!h z>^U3&_8krYdk+Vo>WlCP-~jLs-~jL!-~jL+-~jL^-~jM1-~jM9-~jMH-~jMP-~jMX z-~jMf-~jMn-~jMv-~jM%-~jM<-~jM{-~jN4-~jNC-~jNK-~jNS-~jNa-~jNi-~jNq z-~jNy-~jN)-~jN?-~jN~-~jO7-~jOF-~jON-~jOV-~d!z75*R`0RABy0RAEz0RAH! z0RAK#0RAN$0RAQ%0RAT&0RAW(0RAZ)0RAc*0RAf+0RAi-0RAl;0RAo<0RAr=0RAu> z0RAx?0RA!@0RA%^0RD6h;Q;Wj;Q;Wr;Q;Wz;Q;W*;Q;W@;Q;X0;Q;X8;Q;XG;Q;XO z;Q;XW;Q&-U8Swxd0Pz7F0PzAG0PzDH0PzGI0PzJJ0PzMK0PzPL0PzSM0PzVN0PzYO z0PzbP0PzeQ0PzhR0PzkS0PznT0PzqU0PztV0PzwW0PzzX0Pz$Y0Pz(Z0Pz+a0Pz!J-i8Ap{)Ph}9)|-UK8FJ!UWWr9euo1fo`(Y{vChE&+xPS4!_H1@L7B&pUrphU3@3s%`@;UJQL5xGxDrFGtbUD@GiU)@5Vdw zuDmnv&KYnPoC#;c8F5ye8E3~Ca+aJaXUiFL)|@$K&mC|V+zEHX9dTFO8F$AWa+lmG zcgr1f*W9_Pn?x3n31kBqK~|6%WCs~SmXIlA3mHS!kU3-z8AKM5Nn{flMOKknWEUAm zmXT>>8yQE|k$Gev9Y7b*33LM;L08ZjbO#+mm(VG63mrq(&^dGu9Yhz=Npuq(MOV>T zbQc{)m(gi-8y!d2(RuhkFaRt76Tk*A0;~Wtzz#43ECEx%7BB{^0dv3}FbFIHlfWi0 z3akRNz%DQhECbWPHZTsX1M|Q>Fc2&R6TwC>608I>!A>v~ECo}+RxlQ<1#`h(Fc>Tb zlfh;%8mtDh!EP`dECQwAg|CIrh3|zAhA)OshHr+ChOdUthVOk#u0`w#;W3lS3$ z8xbQBD-kmhI}t+>OA%8MTM=UsYrz2!dl7>XixHC%n-QZCs}ZviyAi_?%MsHN+Y#dt z>k;#*I(TA1VnSj=Vnkv^Vn$*|Vn||1VoG95VoYL9VoqXDVo+jHVp3vLVpL*PVpd{T zVpw8XVp?KbVq9WfVqRijVqjunVq#)rVq{`vVrF7zVrXJ%VrpV*Vr*hJ8Vt8VCVtQhGVtitKVty(Bn6bnhC1xct4~dya%r#kn46|XF z|H6zH=D0Acg?TK@Tw$&Xvs0Ll!VDDVoK%rnCd?~gCJA##m@UHm5N3oh2ZUK4%=2Jo z2Xi@?y}^79W@s=cgIO5NyI`gTb1Rrl!TbqkOfW}+SrN>_V&(&L9hlv~dUJ?He5(>qRoI6dI>dDF{HzcxMD^j*_iP5(4K()2;o>r6j0JDhWEkY%%nJ8Di)Hv%=5^W`dy;%>F_znDK>fFv|=5U}hIO!fY<| zgc)4u3bVG*7iMaqGtACHZc-%^oSW&=n}K4&?jb6p;OGBLa&%H zg>ErR3jJbc6gtLiDD;dOQ0N-7p3paDI-zsSZbI*v(S+_XiwXT><`O!{Y$f!N8A|9P zvy#w9W+I`J%sxUdnQ??}GRp}4WM+|TPLa$eLQk1Ngsw7c2z_Oy5IW23AoP|QLFg{C zfY4uN{-DFm_Cb%C;e#$Ss|S5%CJ#EjPG;|**UZ>Kx0$7bels%%9cMNUdd>_Sbe&l@ z=sPoQ(0OLpp!dwELHC(OgZ@vHnKNJjvt_^mX2^gA%!&aIm70g-zFPNzUW-vPi++aou*ug9m@PnBrUHi0ah_<0=#0T1enF_ z2ylxT5nvayAiytXK7e7&b^yni;Q*E~s{uS?CIgtp>;-U*84F+=vlPHLW+s4f%tip` zn1KM+G3x-lW2OO^$Ls=dj~NAEAF~L+KV7;K!9ZpUfP>5s01KHF03I?E08FI!A6%rz zA8e$TAAF=|AB?0oADpBIAFQO;9=xQd9?Yb79^9ly9_*wS9{i-|9So(n9UP^H9W13+ z9XzEc9ZaS799*Tx9BieR9DJo`9E_zm9Gs;G9IU0+8@#2b8_cD58{DNw8|a8ce458C<5v8EmGP8GNQ^+0~~ky~*G-J;-1+y~f}*J;h)) zy~E%(J;Go&y};l%J-=W$y}jT#J-lE!y}IBzJ-J}|2*;j`@9Aj;^XXj$_vuju`{_kh{g0}TQS~FLzCzWPs`~s?zn<#5qjr`WTGa=q z`q@-pn(8l8ePXKLOZ9E3{#MmTrTU>%Uz6%jQhi3MUr6=+sQw+*hokywR9}qhZ&7_J zs^3KQji~-v)yF|C20x?vDpY@j>T^*23aalw^$(~%09DVg>he{6y{eN}_3q@Xd1qCB zuIk8DJ-DjtR`uDc&RW$=tGZ`ZzpUzzRXwq)3s&{Ls!mtc+p4-*a$m@Rs$*64sH(11 z)rYD&PgSp}>Mn_&kO5T(sp=V3U81TlRCR*HyT|}>Gcus+?^GR~s)ti`ZK^&^)tRY! zF;({ke}fFDIxJOBrRt(oeUqwFQuRivZb;Sts5%~1kE7~pRDF!9bAhWu22|aNsvl8x zAgZ22)n%yq3RNee>K#83@=GdDr1Cu~Z=>=r zDvzS_Au6w-@)Ii0pz;NZ_gDPA;^Da;WI*xair-c|wc?u;!V#p5bIR`IHeA5}c3 z;wu&JsQ5$011dgG@p6h^Q#_gCyO4L@S@BPbM^b!{;&l{1qj(m@mnhyt@fV7RP<(>o z1yp>m;&c^ntGHRNzccsm-T~i{T^h0*zN33*ylcidv!&UqAv@+fv0FoS&v#2uQJ8QBhq^|7zU{?tH zKiC(-E)e%zZr9!r*%9E{9m2j4_J^n)GS6g&H~*i1$KSDEgr8;C2s7RJ3_gp` zzKid4&jWWo3(v%}@r*nxyG)n?&pYrgyc6%nJMymVK5@?%cbx@i!r5>}oE5uLWM;VQ z3^_~Al(XfGIcv^bW{JD*fV<#MxEt<>yW-BcJMNIXl}jbPQcX=a_|$4x)?bB)W-?qO0hvdoFzECbBmLokq9O z@f6vg@_##Y(0(U>KFFWt?+^0#^7A?TynD_(pO?eu$>-5!)ent0lxo>9Ag8}TbKpsRs za*+>_mt5qLuG0QPGj&+OVj zzS+BhyfYgg3=n-_7YO>nJ`nUJ4}Ed(5kQ~V4T65L9|V14M~G|IJ{TbSn1?>H`vd)C z4+#3|-b;W!vpWR+W`79!o`=4R?z?9AvrhyJV7CYuz@8B>Ky*J33}F8V7{D$PFhIU5 z4-Am+cI^aUUkP|5&&IwHbf29g=)P-rfV@i{7{IO*Fo3-$U;w)jzyS84fQNE6d0+s0 zQosOq5P$*fPXPnir2+=XS?7TP?tKmDejXUW?iDaV?kW!qV5b2Xz6J+AhMPR2DtZ0p!<1XfXHSZ7{DGG zFo2y4V1USS9`=k~GhhIFXTSiF{X8&0bRiE6U^fjIz@8c~Ky)V$3}Al^_EdB$4-61p z%L4;M_gp(4*mvWy$Flnd3}6oq7@+oKh%V=W0qn{F1K6Jf28izGx$QrHM)&#qgYKVa z&w^{$g!}W*eLf%E=ljroz8~G^dC+~HFUS47=swSn?(;tAKJSO_^SbKdBF9vI-h4|JdVLHD^Y_DZnp0^R36(S7b0-RHj1eeNIK zM;_39kqn*KB4>Qmuo)|7~s}FbRT_0_t8&uAAMyn2l|WdyLJS* z^&8zs-_d>7KW;og_rV9(&+69 zox1Veb=Tav8~6S=ME9|$F5N=M-1gR`d+4Cs9=miC9d+Alm+qp& zZhP+1ZFC%62LmwvU;tRapGEia4_sIQ2B^I$&0v7r zU*rB<81DAxT-XiH>>7$ zDLz`w;ZnS`nyaPwX*DNH@znIZ(zm7fYBk47@z!cCmEy0}oGHa)tGQ8%&sKAw6tAu3 zI%T@&K&m-Sisx2ymlWTv<|rxNo1RGe8WsPo<{T*=T+J;~d^kObe5T^X)m$OPkE=OB ziYHfde-vM?=J+VyT+QWC{JEO5qj+>RH%Ia5Y7UO#)zw@Z#jmS5HHv3fb7vIauI9)n z-d)Xw`TzX8d(MmE;nmz0#mB2TEQ*(>rwW-<{JffzqIh~W_eAmaYL1EG?bTco#owzr zBZ|kTX9%59e7>3kqIi8Z*F*99^yr|Iisx5zH=^D1HPjr9Jomf|dScLde19-N&ACu{ z05!Kl*=}LFEgmgW`Qu-ayS|Q27HjXF=r=)Z7G>Pf&9Z zR9->NHBk8lHK#!38PwbXm2XgU1XSKZ%>_{T2i51V@(`+TU*#iIAHK>&M-c`Or^|7nGh3ZRJ`3u!&uJRbFZ(QXwR3Es?YpA|%mETZ(+A7aM-7xy9@*S#= zTID@dU$n}9s6JSPnCyJeVZyDqxvva zUPkp*s{D-VlT>*c)%U3KHL8zMK0}qqQGJ6dpF<5G7@+bx)bxP?D!-%p z^i-Zl_1&p_kLsgSc^}mm_kaGsrl~$Rl?PINYbqb4`p{HfNcEMe{E+GsQ+XoQ_oebh zs*g+MjZ|Nj${(pdE0sr5eN!r*r23##UP<*esr-`aQ&M>*)pw-wO{$Mb<(*Vtkjg)) zKA-=ehjRDrsC<;_!%=xD)mNkPQ>sr!<*8KPi^^B2J{Fa?Qhg~Zf2I0NR31z9ji`K< z>H|@EE!Eed@>{A;L*=p? zPeA3#RNcSIm#I2_l{Zs$`6_>=>g-h>P1Vh-e446*S9vv6*RJwws!mS-irs}*^9!}M5t9+cQ!&Z4YRadR@bE-~S<>^%2v&z@0I%bu(Q+3HIf2Zn< zRUS{(4Xb>fssmPeJyqAM@_VXISLOLs-L1;^sXAJf_fvJTB{a>$L(^(j)ij@)QVP^S z(<=CAT5VrVYiZXsqo<}->aS_uL7LWjgr-?THLY@lrqzqmw6;!7E0L&aRZ}#r!Aec@ zP1m%N8JgyqrD=__HLZQVrjv&t!$`)x_jVGGctXR|hG?QkOFxfpk zO!k^pO?ID}CcECiWUt_3ve))C*<0F8cB7}sUa7yy?j2;Zw;o}#TSHCu$`K}ey(p8t ztJ4;f1s~m6+gEqCwChfzr|zuOUw3*3 z>CV<8bf+~`cUF$jo%N!0XIrQ4ERm=?tETAA1}k-^Z@TU*nV~y9vvg;pY~9&DUw4*1 zsXM*S>&_-ub!W%hy0dJN?yT`dcQz~5oqn2GD_z2z@8Mz2uUXZc?^Dz4EZxAIU%|(m zU)$H5-_mZ*H+q`$EA=<$dk2~GTaPg3TSLwHl_Sjg^`gxAZJp-)5{c&gsww9D1}n|^ zzUk)tk{RZF&n$C(qil12`+ReL>67Msuk+^oCRfe*9dDcS%NCjQYdkUMH!C*h`;{=X z@*aj(tE!>3sA*`W8yH$eA499-YiOv&4eg_JLo1bGXw|X|t#P)Yb;vigGA9kK`gucZdezW6-8QsxMTYj_ z6GLlWY-pWJSnTCJEcRMeE%p{QEn1ld7JEe>i@lDo#onr?#r}SOi@k1;#olIw#cm6= z*sDZX?DeB8_I6H-{k=qs{eu*Xz2QoW{iAe?y;O$9UMLHYah=P@#6jgd?C z7+G@0$c{TkX1p-M9pzHYG#qBSw^E~5{sIXc+^}YqGpARk|`=` zPSa5{&qU1{8#SX`)STs`=7tb88)DRqNl|l7j+zA}YBtrVnb4xsJRnF%^n0G7ytl=Ur+=990ekb0Wg6Buu1^1O9E(|0$_>; zAjbeuWq~-(0WiY@ur2^l7sKaD03b2|m;wNy0ua{#nAZW=GyvE$0Z3W^EZP7R9RS)c z0BH|^Wgmd;0DvwOgQh@?g5em2A~6a_W8xGRqbBeewMxXOT`~quQ!#3aj!`)#MpfCE zIL*bV89qj>3o)uL#=w*mqYybpVM>f5)EE`lV${4Iqc)8gwP(htq!ptU?HE;bVpQ9W zQE4wmE&DNQJBU$TC=MYYF2QhILXo(Hqj3?z;?e{jmsW|mv`faJIVvtq(Qzrq#HA`5 z7w5RRG{eWGbs;X*#W+BuxP-`Y2~*+{p@xsOxHPZFrA;F)?U`{YX~m^QJ1!NSxYTyz zQre44%YIzi4&qW5N&_}IZh?PG@S%_CJAb6 z(j4cKV3tpU4Iv2{Vv>TTB$$(vpr9l{Q%zd1mIMoW5^Nbs&@z)CWhKFqodhK(2|8{P zWV|F;@snUDNP-@eBBwx#8i!L<7D-WMG-XaR2c<~_q@{5OdTv^2}7r41o1HN-T9NNH(KPD=$PEj87&g=lGMK~GCtMp|l_X==_&OG|cIDmiJX zz7p ztHx%`B`#yl@)>JG$XE?ALoG@fYfjEs1tnuO)r_^MWvm4~V{I83t7T@WB`aes*%_HYX5yfD50*B#M0)}@<7|K#GJVnEBj)CDS z3yWC}hG%#fUKe1vF2VqnU>K2M7*k-FP+aMEf`+3VYukPaNC8Y ztOvu(J`8UMFx-X4pF(c^TE8K(}X%M<+O2nULU77jd6O<90z%8oL;oY>7p}E zx7~3m?~T*T{y4oIjMH6c0>Z!qjKLE!icH8jIw4}%ggk*y$g9MJyh~0%1!_W`q9^1W zGa*;m39-OU$TR$eye>@0b#Ve<(u9o26Edbu$b>o}VcLW|uTRLE#)KT=cc5TR$cy%b zTy!SnwmTseya{>PpOCkM3AqbRLPanM7vV`8MJ8<=ofM1Mq+G-&?NwsZ-X$lY5;bX0 z(UW$LnY63yq*&r6?HPX3UKb|qx;P1n(xi>ZlQyPI+JrhO6}3rwUZ1o#jY)gYoCGCn z(q6PD?V>Yjx7|sp zbBfAZQ}B{K1(%#DxZ_S)S#Jtn@u%ROU<&R*(_{`z)46aBS!9|nqtj*%o3?ZKG`&Vl z(-m@>%u~~J|CVQ_=^8t2=DBHlmY=3KglW1VPE$E)nx2!V>4Gv%H`Qq?r%lrf`ZT>| zOw%oMn#x<#^pZVImz-(3<4#+7Z<=25r|F$wn(jd}BnD<^44#p*$c$V@XG{#6u`zr` zUL$7Y3OPd-s2RFI&&YXZMy|0lW`UcLXZaaK&TykdQjyq!&ycv1LpOJTh8Mz0|l0`5}7vWhui_F?(bk;0l zvvv`mwbzJQyF$*AC2E!~(X)1*nYC-|tXbk_?OA@--VkQ(hB!+VrCEDUp0x|gtld;+ zt)ez-FX*%OmN9F$%vq{r&Du-$tX*5xAMGyo> z5fR4_8OIT1l|YbP5`oGT0+(q7$uS60Wf8H=A##~VkaYn;>LLPgDSV!cAee$6go;SG zh9L7gf@~THvS%WoY$3>^jUYt_LE0`Nl|2Mm_7P+|K#(pp2UWowT!rTt6q#dibWW^d zb8;1*V^)bdW|y3UYSbKDqvx0$GsjffIkCpg$u)kCSr_J*x;O`_(i~Ei=NL?xV+eIl zs%mr0ygtWl8gtB^IR|Ri9J6T8F-2#NX}fb$&6{JE{W)ekm}9!oJVbzbn1JUM6q#3W zbY3K|d6~fHl~rP1*(K+pCN&Q?>3Jo`%qvxPUTkvna+9A|)`fYcF3tl&nnwtEUcr=k zg;3`uLJRNpd1cd>SN6<#(6r{2MSET;I`c}~otK*4yt3@iE8D@m(uEeFHduh$@PdOP z3l5Ghh;3{^ZsQBiDzV_~k_%9WT7WzBf|FwwoGQB@cDMz(!!J1N!h%y57eHHDK-%(x zgDDFRp)N>mZ9!@43(lso;OvgDjaWn~as;>%MPJ0D_h30(lVE+rnSs8?PaCpEGr#%*=l;r%8I|N z>;%h74_YDHV1;hOD^3Hu3f-YsoIJDQ)YuiX!>!mI ze#O}kR-A^oLbat8rY)~H1!cu)sw-AoTXEX@inC>`I4yI9>R2mG$6j$t&Wh7%(Jqt?$Na3A zg|l!D$+9?_MRQnIEZ|vomB_NYWHuc0vu2jgvN!LUuc|p_RjsnCG|sJB7{98n3#)2fTt#td zRl?;}6;oDKLS030ZB-)lRdv%?RrkzQ7PnR{++J0S&Z^pWSCO)}Y7zdbx*e>lU1$v| zgEg@XuYoeM=HloYT*lU<0=|Zni8XhZTnpRWnpvjT+#Iv!R@pVW%&l1ke$8DM*4(Kanj)}*Gs=588m?w+}Zyovzq>zyB(~# zU62!Va1PBOIkb%B#3G)9%R~;Xkh!qjb7qdtp?M~U*4P}J=W=F|&!HPa4sA#|u`1`# zf|5gZL=$4T~TV^gS^PE|=b7;xQp&d6zmA#zV_H*b?kVAVQFXrJqnn&_% z8Ow_$JWrR2JX@jiW}eQoc_z=+xV%~7^X!I@XB$#ptjT${pyb)6ny0E-UhL?3cFV}K zEh}%<>^xg?@@&V=Q#CJdcKkfM6Xe+*v>uKp>tYpN2UTQUEu-sj6jp;w_%m|4R=G>a2w(VT9Y=Un!Mo_lnuA3ZZK7CL+a=o z?v}CPw#*H-W^GtCd&4a`8*azlU~1lm)$upnonXW50W3Uy$3zUlFdW0=@QZ{I7`97d zP?5sWB8`bf2E(c>28tYJV>~7m1q`c8n2akJMyTQQG)yLR4BIp?Y|q5tqJ`PGjbTLx z!`d!}6g|u)d<@$TFsus|!t>VxD8dD}h!i*+EuclLAQ$k0jS~fKmn@J)s=yZMf>~q= zT$L?QMXq2M_<~gw3S3<*h()O&m*oOhR0`!aR>3aY1+M56 zxVBqhieABP`UP$~C~#e9GaSD+Q3Bo+31m~l(M>>Ln;3y_N(8Z~?UI{No7zO%^rqNm zHnl3d3EJEy*5)^*wy>$y#Z8!yHWggnlnG^1Bh*cV&^E*IJNz^@wY~7aaI~#W2e&u1 zqO+;B-A$zJZ90U%sci?FS{K?1$B!+RfVWHn+4697iz2Wsj=;Apg4ptQ$t|)?ZLw{7 z%WN}SUX|UV+T0e`=C`c2u;taoEt-(Fl(M{K6UvrHs9Ox7Z7EHC%OQ*{Z_nJK+t!v- zwzs^Zv*oqjEvD^lIZc1d+YYw8E-0c!xF{BpB38zV;roW7TqcTGg)D~e8;WR&E{Y|l zh}GC4C~-x*$QPxOP{bNiQLZXQtf>|`Tr0|Ly~q(p5o?)6xMUUWs$IlNP7&+4MWo~v z?Y3XUc7h_-10}Qsm&6iM;>uV_F5xA+Oq93^RboqY$t*D?uEv$@5?``PLWyfgCAp@Q zxTad-s#;0z=q0Xgl(?2vvTII>>$u_aUditGC2l7uaXn}oYJzRF32%!{WLqnv+n|YU zV@-TpY7*O8h1?F$hqloUy)AZ_ZLP*`gATWib@*+mBW!C8aT{(*+e%g5mYd49)>OBV zrnViP4{a+=V_R#P+i=I)cB=Na+;O(Gj=PO?yltoLZ)-cjw$_7o$R^lfoA8d=M0UI~ zxL_E5O?UNw4>DI9lNRQ zcujSOX=*!4N8fRp#*WuAcj%6_E9DW8nUJt=>oWSv25{JqZ z4$9$~S((A{DvP6K4#&zoj#LF4uS>X!E8(IVt`a&f5eAO$nYdWCa2L06x$NM0+r_1_ zhr5K2OU(esyHGjo8_S>ym*FZ>MyhBTt%kLxikI;!QRa8aa(J#?1~s}2*O)S2Wy@$S zJjyk`%v6OkUl+?_RVu6Hu(ei|GEb;wsj8LLre2oXMw#C;%VNzcyJfp9*PJrncFR)D zE4xjTP$I zC%j#c@OPDFu&Z~WN?5llViT@_CQ^}_Xa#O!6}gF5kS0-4nq(zB*Q=OKxUDOCKrSV5aoMQzFztf^FdLaiuOt)eyciqbYJ{+?N3n^whb+7+(pRQ$GE zQEFbrYx)(X6IA>zQVq+wiZsb;SkBe3oU36uSMeHK4a>P2mU9)U301ryRn@9e#hY4H zZR=HwFsgXVtcGP(#Wq|AZKN)>(K_75>f!s3I?^WU zN}H^Q{a4*=({-xN)U7sKr`ufJZu51fE!6dfSV!AZU2V&CtgY1brdr3_T3u`F^|1e{ z>n*d+wynC`w(DHmsp}oL&bPg~*Y@j9GpOr5r~!3AL+ro}&_Nnf2W`L|tRZ*s2GSuK zN{4KO?X6*U=mync8disG&>gN3p8qzOj?nNMVgv0+4YeaTu#VF3n`#5^Xbr8SH=MT7 z@LOhs?N|-BV>h^t)9^cPBi#Rn*YO)+du#YTf=~#O2;buopc%dkXfg!SWC^s%5m=Ka z@TNd0?XZRs20`qZgxItQsc92((;VPw zHrB-2coT0EO`=UUp$^pq9l8m3m?qL;n`nn?hJ9BP?+8t&EjGor)RfwCQ*J9wr5&Dq zw8PrfG@8Pm-qhM=Q|wqxsbe?8zN;y;!?S}t9@L`t;1<1ywwOJ<#qNnMZclFUdul6u^_CPar-aLC;itI=TGk%YviGo- zvuCv3J*nmGDJ_3bYXy5o7ivLW(1N>g3+*B;yoDeu; z=d^;h+md=-OX>M7trxU{F3}F_Wjid(c376}uq@kQS+>KnY=>pp4$HEwbix|gHrjgE zY=>pm4$G_^mRXzVxb3ja+J1P`IzgN05gnx?bev9DV>(7h?}as^1G-{2=mdqLOe!Qnm9lX_@)kM-mp9zG^|N{{N%;f?JvJwE(u z_PCxMK5~0P&kvVS!zHxvruUridn^387v7Kjn*34zcK3_&+5K4k@JH|d1OMsGzkBt! zUe3JulV`WN~+*Ke?;k`3JY9TYq>{x*;?F=(>K*+W+gTV^_DX z>|g%dm;RLgn~UogA6@vz=l|wh_1qtvwa=`b5l;UlRigghsegU)(n;e)_Qc;m{_l^y zJoZ;d_mBR?k&{RMIZ2Yx;QG-)4z)ALv-UID2iL|8^0obpbg!S49^`%d*A4Y^!~N{> z!RH{y+|L5{`pXP*)xAMJ`{1?uui3v=roWCs?)>1|)&4g0GqC+_806{u%O7NO!{;Al zd6y4zkqY?+!BAhu0Mit`9lLnD?{h;kpkp>;24qe;dMe zA6!2(`2L>_e&1hrKb!vh`jW%zLPbE!Q=kV`dR4yGK1~?eSN}UfBNe_ zxMpUszrXYQgYr1ow*EHsx3#|wgYxUY-a$@%P`(HI+F#$G{13{azdil3>2JefuKF+^ zJvg4f^U8zc{m;PvKR*z@?SN<;f>FJ7^cEJ0UhQEm@rSkLeNnTf-dtA^gw{1 zcVd_?kivX{9Oes@FkhfT&~XiduIdo<$bg^^W|%jy!n}bU<_(-MZ{R}ENe_aq`4IFZ zfS^y%5Cp&wgup`(h73UjIs{SJ5X9g^5JwC_0yzZ5sUc{d9)dQRA!v^sg3fS5&`o{_ zdM*q>U&SFPDGfo3@(@&1hM=}O1fA1{pxgQo^wJoDzMDf(+8TnE?ICE}8G^d*5Ol#C zg6{f5(Cc6b`U!@~Fgrko*#R=l4v-`^Ow#x;$r8gPPYsh3^f0-~43oR;FnN?4CNJ~D z4wEOn zVe*cW$>1X-M~sjHIYP#%5ptd$Avc*3a*rJ$ z&u}B;O@4%YE{u?0#SttKZZ2}VU29u-k!RK(Fyk;Fzt8Xpx|VpQa*QE`GE6<3*2ahDwx zk8-2pWqwqAAdHIdq)~B79u;%Ss904;#pBwjcvT-29~qMJu0p{qhj41 z6;FDj;x&I%d=iX`pP(@jfH4t)$3zSn6A5%oq_8oO!N)|77!w6@OpH@w;ygVjZZc!y z9y=zU;l{+9{FwM$7!$vWV`5So6Bp$%v8arRZFNjMr;UlX^)d0KF(!UD$HcTXCNA4! z;1l!#eXBj#}}VqVoF<|89wey}3uj2$u8orqa?Bj!mj zVqWtj=93^|euAPV08tZxqb7z#O#+RY6c#lZJZf@8)D+058KL6yMEMs9YoEaAj|>40Lmf&Dx&~8f&u6f4xsx4fZkF7nxp}=#sH|o0_YeApesCp z9tr?@F9B#;22frBP)!BU2@OE|I)EM<0QzVFXx0YMh6A963!qaTfUf%hdKv)eGl)TR za11ISF{p{gpwn0kx`D@_XG9G85@rGtR18|6W6%~8gIa71I?KhNTYL<9A;h3>Vhl=2 zF=$DSK_w*yb<`MiUW-9@^ceKYh(SNh7?iPM(25;{cAOa0b7Rm&F9zN7W6+x*2K@qY zavYA6StL%D(KvYoi<6h|IC-CllW(awIZ4OKH6~70*f@ENi<4LQIQdYBlkcTCIW5P@ zyb>pCYMeZw#mRj=PCho`1M zAkS+F@{XP$Ul|GVhnXNVR)Soy6XcGQAbW0tyyzv!dwzm^6C}uAASs6P{$e=qFNX8} z;t?zWt)w_>C&djXDK^}sc*;wP*ZrjUG)Rh{K}wv1Q(^&0iA^*mp2kw*4Ll`2 zBU0iQDkUz^DRGNQi7hrIp5;>FEj}f_5K`hdDJ3q+DY2xa#EzO0&uc01j-C=<87c9H znG!QrN?fs1;*OINdu~d+=%vJaeoA~3q{Lq!ZH9CEW;nNR_UHDGU}^Ibo;L3jY4a_W zHYe${xyGc;3Y#{MacT1kpEe%~Y4g35HmBvZnOD+gO--98w6wXer_IMk+Wcsx%~?Bb zZa8VP;ik<~UfR6wr_HB9+WZVM<{X?c3rNOnq8alvmN9SO8S@#DF~3k5bAis7TTI4m zu^IC$moabg8S{mZF~3RSyuO?8S|BqF@IPYbH&b>J5I*zxf%1K zmoe}88S_n$F@M2unA?FtIByR~3>%D`Zkg~3q{2A6plJP=^; zPJ+Rd41=5kgQ^OH;~EUE>M(d@z~F-ggBcqJ>kbU+E(}h3Fu3N!;7I_3PhdQpDI5nF zG7boI98lOeVDNFk5#vCh#=$&24mO!_u*Z&rGu$}1$&Z8Q!Z`RUje|vb92Avt&{oI6 zIc*%=*2lq1V;p?9#=){Z4z`_f&~?Yb1#cYO^~b^MU>y8}C#Y~vo(kvWDH5BYXncZV zi3y6QC#Y3sg4$&#sH5Bjb(x=_9tacEJ86QNk|(H~GC@_<3F^2uL0#1+s7J;G^}(8; zX6y-S-I<{3?gVwxo1m`w6V#Jng8Bp|DFmLRFl3S<&`FBICMgD=q&Q-d5~xXPo}Q#O znMrDooutlilhjRql6o#oQeUM>YEhn~ipnI_Rwt=*+9Y*bpQK(Ilhk)>l3KPWscmPH z>bjHE1#gnN>rYazgGuTqJSCyXl!T*G5{XSoG(IJ<#FWI-Q_?CkCGE0P(ot?oy39{W z4}>Y{ojfJwlqspIPD#hLDe0;{B|S2xqz~4VG-FRm>&}!^cc-M2-jsCBpOT&gQ_?3e zEg|rW-J_? zu}EyjqVXAvC1xz1p0QS$8EcoFv5s;x)@6RidLYbL@8lUPr_5MYb;dfb%~)6U8S9ZT zV|}n^taWF`s=G7RNpHrw=FeD9f*I=*n6(gi*20iki$G^B3Y)bUeAeQKSxca1t$BLZ z+GJ*}J$BYQ!_8VZ`C03^Fl&94X01gzoD)}Ot+qOAozrHm+xo2a(wMcrTeH@(J!@?{ zvsTxgwJvzG)?I(rdL7JKKVbx9k#O!BMZggZ0he$D+$Rw5mPWuDgMbQ)fMXm2uJ8zW zC?MdyjDWm?fSQVc6B+{cbp$*%5b)7Pz=nf>hKqnx9s;iW2zVMG;4?f23dkI2qI2Lh zHV1CtbKn^<2fk2qV1b?kTg)72v2)-oHwSLC1nnD)H!fon*(?B zIq=Gu13#=euwu`F9cK>o+&OU3n*;a!Iq)W!1Ha&TDvQihWpti8g3VKx@OkP!F;Bgv z=czSjo~p3()G=4~2Q^y*y9lm3gYB&Qm9}d1_yuryd*g)JJ=s+HmHnhC5H4 z^5&`Q{ygxhqWZF*h|um zvn2K0CF!EKB;E6uq&LBm^b20L!g*#ZoM*O3n4EWF8N;XO7BpW(9bO+E`h7qakIISUt+EZkPJ z@Hs6D-`2D6OCt+^x3loJlZCr(7QWzR;k$koejQ}tpU5g5&h^qHwo23ZD$NqBG|#Nk zyX-1`lv|}Q^Q-g&VU>O-uhKbXm9DC*^l@#KzN)X%kBn9NgS|?xJF9fvU8PTYtMoO0 zm3|Ve(x2cp8bj7-0$rmiY>j5{HJT&VXn|g%H<>khk6okBaBK8UevN)EtkGZPHM*#* z(QS2&KBukGxAisprLjhTx7X-xXN~Te9h0v zPlBBM3C_zHl9vfIFH=}vX7Ies5qVjl^YSK>m-pDbe1^-*H~GB$T*%8`<-A-}@^V|v z%jdMbd|S`UFO9tX-OkI~PG0W1dHI5um+$&{`E`(&enHqWfv zyX?Aslv}qi^Xv8lVcmYGtlL#}-9E0Z+gJ5<`;oD3e{k0Ay1Q_c?8}?5GgUcueAHgvA5{|+52@HPAU~q-S z;A0#HU*R$Mp@6~f6%4Ma7<@v*;C&r~9~&6_(ZS$`i@~Qn48HDT@Y4W;KO+UWi5B3~ zSOLC)7vN_^0scZ4;4P*Ax7Y%FmMg%w_yYVwD8S$30$frGa7Qh`=d}WSM=!vyi~{__ zF2FlZ0q(g4_@Y;U@A(DzO;CV;A)9m=-K39ToAf1olfF-E(r=kfy25VK$GA=U3cpD| z6gKJi$|hY?H|Z1FCcUq3(vOWz`lGW+H{4D7l($J=_c!UM!6y9~*`k~17JVAqqHo|^ z^fO|M{=#h0Eq04O%WcuO_$~T{utk59x9F0xMR(LK`n3o!``BIoGrTN zZqXOLE&86nMZXEQ=wC=U7l{_-BUn+sgcs%eL{War6y*wAl#g*m`3hf@9|}eJy;78G zYEeF+73F=sC_gre@<*pAH{7Cp$}7s({i6IdD9WFalH5c~@@cFj-@r@qGomDaVM=m~ zEy-uOl6;FV$uESG{7nhx8P$?}UMtCW^pgC_D9JzUlDy-T>K!w{fyYLzc4#?i`}u$ay#}de#d?x z?AYIwaQ;u-vCnHe_8oo4er4>~Kb#%A=kC}Sy&e0Wzhl1%cI;m$j*u9R&^V5;1di|w zj_k5Ha+Jf7%RG)e5OCz363z*#IC5OWk*hk6JTh?PgM%Y=7e`KdIC9O$ktYF;dmm9$Qn+a5d#7UsIk7HRY>PQ`%}xIj7Z>+j>oTY1EYOPEF~$HRXa= zQ||gT<#kX~exh}U#Oe->*BzFqJ3L!=j&gP9GGBKd2zBS3T6d0Xb?2&HcODsa=Yv~! zPI`6cnqPOG1a;>V(r^g0;ZRt^Vep2-5e-LR8qOZuaL#ZI=O*89o(m1o=U&LBsip637vZKrZ0~a-SfOw=97i;|SymPaqEk z0(q|z$O(-=_H_bzY!Jvtmq1Q=1ajRckf#BGd`6qdX{?Fdz?;Z3qKSM7=d)UD6FJK@ zkz0Hdc_B2BZ%R1Fr8bfCS`)dWH<4FH6ZzpZk)GQ`E_zMmp5H{?1Wn`@y2l*B_Lxif z9&?}AW8SiR%rS0{xx();4~0GEy}HMo(Ds;peUEu;>@gqRJ?50R$6WXKn5V%W^BHY1 zr?D1u18*_Uh!*pOZ82xL7ITYlF)xG`^G#_n9ks=r*ILXSy~VsTTFeip#q``3bJ1%t z_xu*~CTKCg(6({}Yb%%VwsN0nD{tAha*S&$SNOK_P-rXf)wXg%Yb*PDTX}4>m5**) zIpwvL>wa5#8nl(qXh%7Xb(9-;M|nnclrL;YIm>mFTYN`(A#{{)YDYP*b(A}LM|ov* zlpjt<>A4-{qSsOG`5om=&{2M&UFQhabuQsu=RVPO-m+ci7}s^K@LlJj&~@IcUFU?> zb@uhH^VsM*AKk8V%IiAU{jT#g=sKU#o^u-OIXCd0^Ni>@U)Y{=mg_mU_@47Z=sDli zo^xL7Id}A)^UCNsKir;k(d#+){GRhB=sCYI5~XnxWeF1HSrR?Uk?3WfL>~ww`c5U$ z;~I%x)k*Y`L82dA5R*b$V$kDwfJ1QpmL=o#(^dXqnbJ{OLl zU)3Y%Iqe8~TR(!nG>)L(-6QA)?+AL=KZ3pvj-WrWqb!XdWm)1V%X3HB%luLHfp9eZ z&m%|KNWqk`Xo56enL;E6m~*o@DnOWoKOY!gnEWM zq2AR0uIdQLl`-qug3FO3uGclU&P!8@Ve^-rj;gA?jc?4(QMCta2}>GIr3 z_cDLdeIT54-)Se^tNKazk#W-f;GJ}@`6t~c!AbWMddj7+Q!ay_ayjCZE3l{BGu$cn zCV$F(E}U||s;As@+9~(8e#(7moN~Xrr`!wPDfg~_%6%Q2a(`kJdI_h{`vir)&(uy46D>=phD`%pN; zzSqvM`}!I7v2lj|=$&D&`)Amv!5Q{5c9y+?pJksBXW1{@S@srxmVF_dWxuIs+4I_2 z_Ktp*ePx_wf4FDai{4rGo`05o6P#s#VdvCK_&N1HaZY{9ol~#y=hTP7IrY7EPTkkf zsgI3w>PPRKdfh*#J`K*PpRx1m4g9?Nj5x1;;m)hK`19%u;k^1yJFni+&#SMD^Xd=x zyn4|)uio>|t8aqy>M!hqdkMeb-X|`&Z@CNZ75;+zP`Kc}*DkpG`UUr~al!rQU2w1a z7u=`81@|*{(Y=9Rbe|Cy-7nll_ZENAeIZI{SZtIt@m&PURyLSn@>tDiN2bZv)_+^eIE^|D8nR_5y=H6+SxvTnR?vZhs z``}&XuKAa_C&6Xz6Ly7T@GBfgT;T-n3U`yg!aWzRa9_16+->~|_tLn+efO?#cl|5e z>);Ca6Thml#8r*wuWAp3tJ*vLs`kjZs(tXTYS;X$+LPd__6gh97<^yjh<#1q_O+Y* zzV=+$*S>1|+HHMbdui-z-@Se9uD`Fn4)(R5_%)9uu6aCv&3hnR^WN##yhp}0?}LBM zdlFppK4I5A2EXoc#C1>Lu6sB6>)vzWy7yJP?%md}doPXa-goc1ch|q}y$-H>KXC@T zPcYb9p1~dp4EA1Uu*U|2ee@aZX~1Bg@f+AP;s*AGyMf)}Z(uKk8`wAP26jikfxR+r zU_ZPY*ggLS_9nQ2{laf@_lcX_TmB~ZP`Jsx*KcxQ0`Mcgj z;jZ^yzw13V?s^~nyWZ2_uJ;+g=RG6td0+T@-V5QL_f5a&y)y23Km2>%o8X@Ji(qk{ zXYmIDi@(!Z{E@-pAAA;n60rCu{65YR_i=&0k3Sdg<6rgr_)FtH{@uTizYgx>KZyrC zFFfGi=@0lv#smI?|A2oIJm5d!4|$Gw$P4^K{<-jw|EfRaUm6ej@BTynb?}h?Nj%bd z;gSB%c%*;uAL&nmNBSrHvCa{Xb%B4ZKNlYBU-ifOOXIQr-G8jV4j$`2i6=fUJn`Qd zPy7$T6aN$b)aQt&zQ8~Ap9@d@uliH}rSa7N?mzWk2T%Q<1c$#BIQ+fA;U5DI|4cl? zzwpoS7s50AoBj-cWjw=w_|Nb+!8809@tl7vJm=pV&-stRbN(~&g8w4C;J@iF_*cdY z{)hj9e-pgme-SVBx57*Pz42227`)U!6R-3y!Yloo@k;;UztZ0Xuk>HUYyYkA+JA4n z_CE%%{m;Z3|BLX(|7N`Le*|y*Ujk3OGkD@dz!RT{w}c?PCB7POiSNN%;-~RW_z=7k zJ`wK)L3l5GHQo!~gZIME;Dhmr_-F{iN8_vU(fA&GG=37F13~y4d^J7?--FM=PvHyk z&GBjqiC^N|9 zKe}%GQ~g@vqO~vncYl2~_m^W=|I^o7SL`?Ymv8=)zkTW7Ab(2#@gMxn#XtTZ)-PW8 zSC1|%{Wt&k{C@)d%{kbvo|}RG;Oze?*k}HHZSBl|{=W&QH;lie{@>3f>iW#zJGCVK z>y!WTk1w74pTiOKfBK8;iR1t6-#`9;CI9^~;a|Kw_D}!%ua2%C-#_}N|KndA`S1Vh zlSkJ6?ms7o|9~W+gAcK9nf3j`zHN5k8~3f#zInFue^UpB`M@vi+h_+q^1v_rog?X6 zs(n*!;1~9-wZ6I9x7Yf9Vc%lwo2-4CEzCY0_{Dv*wVyXR$fFGW!oKa+H(vYJTi-A2 z4gA8s1=sDHaD5xLZ^RA!!r!@;fnV6S<@&~K-=$1HZ6uB@ zeT(nF<39Ac2YzAiFt7732A=mO_aA-lzV$osi+g&%iJ2 z+k$;#xNi;i&EdX1c;Jr@{KCFX*f)xM1HbSfJJipx4E(}_-wpiYzF&Co-2Q6}{KA9R z?yqCu7xr^Mz5X@~{KCFpe6WoJzwlt&`vzlwU;6tr@C*BXaj(D6gS<@Na_swseZRQx z7ao+=z%M>1!+~Ge_lpn8c;FZQ&P5IU!h>VeKSl$;@Zi|>kKw>C?Aw$F$9Uiub`SGa zp=EhcCkB4uL0#$BnM416;1?d$t$rOF_=Ww9&_Nv>_=N{`vtLICeqrC@z7&D^cfGm#xQHu?*o2&j)%VEpuB$jkB1)Qp$~cJMIPp=4n4_3U-HnK zJoG0IJ<3C$a&WwV`;~{D<)Lpms4u_$%R>+I(8oOVG7ocJho0u4uX*Tg9{QVy9_OHb z|Mof$^J0Vc@Z0wsw3pxh=b;CB=z|`5p@a7K+Y>$XMGw8vLx1$pBR%v<553aE{Mw;s zI_MvMd#8i`Y&?O=T9`^Eh} z;J1H!=;02=mjk=JZ)P9n1P?vk!T9vs+dcGm2jkhF4aT?MUhiQ1`|bG-#>d~@@1g%Y z7*Buuz=QGjAVb;DP9A!~gYo&mF7KP;gYo;fM?4tce|yCs%oxI9jt~j6f+z$5EHsGl z&>bQ|Ylwo#VHzSw8HkLq5D7SljPnqg6d*D!LE^9siK7Z6MpQ@y8YISbNK6`#n6@Bu z*oMqe2QnirWC9N|<34021ISE+A!r01g2s>`D2fh2F>DA*;6qS~7=kj?5II5*kz>pd z8D)pa7&k;F_#rYS43QaWNF0%e#4%+^jH*LoOdApt`jD71hQy3DWRBQF=9n{NM%^JZ z<_(z%f5=P)LuLjZ2BXL@h@is&V8bAe4}&Bz4AS&4HOdTA5q6jY+%OgAhpD76Or_;v zX;c}OBI>XNv|%Z(4@*g7SW4T&)~GXVMciQvc*9oQAGVUgu$6{Kz!)+DqUZ>SVIv@c zkAM_00y6XnHO7okQFeriaU)cMAE8ph2$hjXq%mbgimD@0OdF9B`iPV=Mx=~AVvRW? zR@5D_V%~_A@JFmvFk)qpQ8{KvjXV3@|`aeh< zk041Rf~4691Goqi=Oau~h%jk2q5v(T#Px`hG$KmcjX1!IIB`GXB!h^PMx#g!iy{d; zilm4rl3}AvjEgb}KFXwoD3ej6N=%C?2|cQ$jHr@vqfX3=Itf4Oq=KlE!2lY^0h%NL zn&to-=K-4(0Grl;8rOlEG=Q4+fE)LLn+$-P#$sp!kD)0dhGw`Jo8V(?N{F!;Ev6>) zn3^(TYQ~GX2|wnhf|#4Z<5-f2V`)ClC51Sb*5g{zh-+y-?j?h`m&OxVib!A?KEb7g z1eehhTFOXh89(8rf`peLl6YE3@@XTfr-P)QCQ^7tNbwmXrDuYap9$L^7_`4+*#7!{ zSik*6`t6T|pdl*!_o_4mjWH0EVj*aRgP;TtK~VvMGGQA8gEp89+u-n^4MzHH(1gSx z3ld{CB#t?dm~tU;#Dm0y4~fwL5;GvQzu?dZLqg*V{f}-~91ndkA~e4KKi1wnzRs$8 z+duP3n+_2W0x|?dC_`yl3Z&4ST_{69hA>H>g{DJF3LQcR2y{r*3IRci2nIzdDq2S( z>X!=5vkRz1;R|)7Do6l_f~XZyD}%iEwX*lqpymDj{&@L(Xw&4$8J@F;weIU)Yik}3 zYaX13BQ+26VIGzT=i#QRwb@ODp6sR(>$012>$97N_hvVhHe@%+>$_>#=D~S5Qu8n$ z=3$w6Se2`*s>#)9F4m10lhbFGt1C6+>P9u?>V`Gv>WVG7x{pVRg-Tm)aF~&3#@f`eZIBSkZ&E;ly4o@oNv{fY#rI2Z`FKkEqCTyM|bB3s@CQQ z3O)IO5$p2XACFWyO zp=MZfp{CeUs2SN_sHyHK)Ra35HKV&VA2lyWggIGaPWBhp4%=KM8Y(SYPTLzM<4Rs=w4bY)h$kds_j9)|a;p-%#ErPwci~Tgux;ZY^)C-d^4|x>o(H z#;C_tgZfxCRaFgZsj3>;UR71ySyeTc9z`l{~X8>+fT^;dNd+fvm%a%)w0_4can z(Y5MBHAcOu8q|NPWmwb5_F+xcox_?&_YCVFv3^+p@D0QIM{OC_KXU7^{_5?+`bXD> zdD=33%*giPW2!rcj~U$)=IWN=>ql-KzP@_<@b#l>tJ_C3RJV_63G=n5dh3V{)mukx zN#|?rsFo46BRfabj@~e$XVjJvJtMb|=o#HGvSn1~$QI4pEu*%N+%mdzRKw`)qc&*% zPRZ0{>N2&N*36hpbEYBFk!i`a>r~iGhO>Y<|Ccj=Z&;~wMpx{)ALse5(HXv++sj$K zoX^Xdyqv@Pq|V;uyj{-N9P(&hYI&dlYUT+YVjJY3Ge<=k7&y5)RZ&a~wmTh6ZK zyjsqv0MqUHQq&YUgloLSD64ka^5IsjB>6hXNhutC})OpPAF%CavmsWfO769XMJ+M zCue$cjwfe#a$YBAbY|?o)$aPyKRoVx|K4$4)BpVN_Q}70b%)OJ-BVwme8_Xw+ud@c z^1!&pn;+Ssd$jL1tFiXZ9p^y}ue+h~(aUz66Ln+#=NmsWZZP*E2Yck$jg6mqX~(%z z-);PP;}1W*bl4xUX%j`z_|KVDh>)ju`4Q2C7BiyauJwMfz)?7E*J@VS1)9^F^5i|-+MCXF;oJKl5Jq_ZLp&tP9hOh8GWVhy3P*RHrJ=9piqrc}l8ReQ496?mZhT zsctoIx3Mn2Zn9}nJA9X#}0@j46@3B^}W<;Hj zwS+Y#=tH*Fu;xVFkF|(3De8Z$RjgS-XR@`7H7)9ataYq;Q5R$_WKE3vAZsOSX3(*0 zEoDuOdLe5qYi`sHS&LbdqkhO*&6*u`MAmZF^r$DY*0bgZUCs6a_JpV}vRANY1Rc)y z684m+H?r5T=Y(@pY%gL@iuxma6?<0HA=%5=)1n^9UdNsnbxHO@_Qa@9vRATa1|8A% zQufrKFWO$qo*Q&W+l$$gqkhR=&7K`~O!jj2^r&aD*R$tmg030<{b1BL!}XlgX6Lws z$K$*jDY#$yuoSN495*Cgt&VLaPelAPZY#(NTV*)Si{^M2U-HDA(mfWmy@yg54` zD9pF?+#vRT&Br9_w_&~}QO6DQIX!O{)8b z^(Z|LiM?OzReDZRSkE}m&dyI_@7H>lL|r(nhv|7sVZF37E;)xOtf!oJXXi7q_iMdP z&uwDw*LuwPcf})toJ_Z%3(i9&x;ECMXEE0{UkkKioIX^O{zPG z{U|+;D(qM3IaOglOV6(g`(0WO9rnXipJwmZewm(w74}mf^=kHh?YHT11w{oF@AJM8yqU3Q2EeAKr?ypW#b72=6h?+)=sdhS<U28M97CzJ`wU| zA2~(Hr&C@L^6ivcgnT^Z7a?Ewkz<5>KIIu9-}f>9kA8;eV+hZi`WB*JA^H@eKOy=O zq8}mp5TgGeaG%s~5cAbAu2Nq?^bfPhW1 z_&CPFG2V@FZH!-IoEqcN7JjQ?Vs7ddu}+rsasaaef#G_DHIpTn`4-ZaQo@|y?QN?D9E zE5?}@<1C7CmNVH*t}0uVtI3KzW~)kd+0{Cir72gRZ7MWmn@Ur}K%27Nx#nzlp(Wd0 zY8BgT&-Uj!vi*h5Y=3FBez!YYCEi&j-dQEy*)7h}l<&RY_PM$+CfA&+&ovhsa?PbFxlFMsw^rX- zD+an&40Ls|J-0d6k=tD8%xx~M7BlV6)#TUaYKlF%nzC4EVSTPS-iHpx4F1Ix4E3jXG&H1no>=^Rvf0bRF_{}8k1jJs?WC+ z8uBfrDfvvfDPL1=&i52r@;#;2{OWRher>rUzopQb-%?tguPSxx_txfX#Y$^orKR<{ zt~cLO+>mc6ZxV0q*Y`K)d&FmY#7w)(TlM$0{FdVO{FZW6VRfOVAl6is-G^V(= zSYPZeHWb@SQ;K@8#kz8Hado++xW3d{tkQWbJ;jbjT#db;!rH;~+k{(}YtTdOZ$}Oed zQfsNE++NbXEY*tfY%6t_L}0~x)|b|mdrRHr4W*9qrczzGU;o}*8dKgP&NHB&Z!N7a zZ!77sOWVp#<>qojxkrDtmc@GX=O&$@vbo$@-ll&IlsD+__2u637X96?e{a>_Rhm;Z zVj;DfOJg$YGWFsi4VeMWv$f(On>D|BGo6`jnVw94W73|x!SD8MYgV3pRLO`Wb4XJ*>#2H?7Cb_R%0T&F58}6SM12H z%XenimAkX8g|*q%Tu-*Ov_9Kf?9I03H)LDO{n>%S=IlUjOLm~NH9Jt;mL14%&uScm zIX6agr(ScYLGwp*tD0XG)_m;Id|a=2rMZ>gkZUgYYYuMF9MpU& zZquA%K2_!GHIM2whw6(B`FhQrUd@}{QhUC)*pctecjkM`-T4kN%nr?y4$YAc&5vz` zE%|Mwt@&-56WhwQ8qZ@2RmFxvRk=xXphaW3U1PsfW4Nc#q_M8GrO;H~Qs~#X);dz? zFEf@KG#*@p6;{59@+N}U=z8%ix2KU*|THfTI#vNakL zwOT9dG%m(y4XxMMXwX{Ol&Q-$YmBsHbgwh5*$$19&dh+;+?s4pX06uR=4`LV%!bTn zG3@&6mQ1fc$Byjw%(iT8wmUl}+mvm{_GeqN>$9ENt=SFPE!m9yw>tH!hJIeD|1`#P zF^-GzTa4RcpR^dK#rQ17WicL$aafGMV%!zutr%y;_$tO#F`kNXRE(cu+!W)b7$?Q} zD8@xG9*S{LjDKR>lL>lP8s`LGUW{vEJQL%X7{A20CB`c;PKohJj7wrX6625O!N z5yo3?ipFA-)|O_C!4|C(ts0YBPx2iai=A2n{!Rs zntV&PIp3OHt94~u^jQ7b zTJ7=8`7PO&{D7|6n(fgZ-=cM9OTH>sr(J$Zt~S@28lqxc=2qu>+n4rvYArk||Kug!1LPX_dz z{``jgR{c4U-=d$z@%i#wUG8V2e|YRS_4lKrPd)BT{r%8mw;Q7+ciUC^ZT-2gA2;dE zE_dN$yHB33Hm#LpM`Lyj_?)_&kpZv9dbh(B}HyG0;7u^0zm)rZI z&rg0~TbG;n(!G1#Hodhv!AyWAH)_4CQaKXkd}hdw{~u-|sMu@C&&7%;hI z<~L%+FXtQY{goK-#Nmy{Jk{kkEU!uR=N~`W<+_LO)A;;jUGDL--`n{3qh0PFJ%^+^ z^`XAYy>Zadjh}s>%l&-8S-Q`Yy zVp^(uci!IRW?j_Y_|3I?U+We&K72!$d+~QmQ+<5FsxCKw!|KMWPU+CU{&3^+E4th# z-n=%|(O;h3@i$8N((wzwTh&|8u_Bc z?<#lyn@=>3{o*Ruzt2yMk)s_n-m=PFfAN;ak6ydV9kcS+jo)0p%6;$7-=ut@yG^{| z*S~FSxM-F8)N6leeCSO5z2_f|siQ?)a*SB}1%GW^eAp_tY1yldm+ZI79sY@bHpaa1 z;nFJi@y%~GHoUgdope>E(*38E?ub&(7(Cj>eLr349)54Ja^nwHx`p?ZDpS6@(iM-d zO8H0qXIHwvU0hvRxOSyG?d1`bk9=sQ`{*^JQclu1ccpv$_IFi&bHPgYqXT!XTzKkA zci(-xr95TJVJltZ6MIyi*?XlMn6_tSJNul2Q;t)$aD}_+@CyTbi!%!JB|r4{ab-#*ej1ZYF&zOdXiKYn!O zj2|y|FJI75sq@R-{1+yr{OH_IEqCvJZF1$l>z2F9M=F(-`e|)0cJv^;)$=|Mad%geS$}P`a?biSFl9ZQy_?uU|>A#&>nfmFg-G}GTt~|Zw zYIp6cbIb#Qw)UwDu673$+AEu;TcG~Nm?yLJRto-7IPIuq> zMU~?o?{uFScZGQ-(CTizv(s&zytH!dnof7oBg-o1%IC^#E{zRUO?W-$i-*c5a?ZFSGd~nyr`uUU( zS5(IBI&y0&lPg!buY7M!$`KzQc9na!>DtP)zg+2lHT=5D_kMPzd+71&Qr>vrU01s1 z=Ibl(S#zb^{;nG;FSlRmZusd9=HWn_e9wd{-NFytSh;5RE8V6&ZmN9iwPo&&EjOk7 z@>>rta}%cBTv`6bW$y63*H-qvVVSFWX03TX&^rIryv%*#l8;yRnYhdywco9kgZEhG z{Ij>FJoJZ8FLgJy-d36Am%5+S-Cp_m-Ai5Ox!cVnf_8f9+@)^!nLU;FH!XGluDhdh z@S#iH69adoe0AZUmbimkKVA9d6HDB^``uaDuXl;7d-l$h!%kYf#BI3vvz1ZjE^*K9 zeODzpa*6x%ukT8E?blvi>>j@G?#ds3w%A=)`?*TtJB!_sPkqijC}_KnE?w;0d0(h> zoVVEBwaYz~SC3rmez*Cal>grN$`$T?XMCx0*N?Ao`&F;6e605h_wWAo=2<~2etp3e zZqbQfsa$jV6)v0mYUO8#Ug56tUrl-P9)IX??>_eHmE89`+~j|Lz4C+4b+}W%{f(46 zKX-A5t2v^#a?EiZ?y;A8E0@-GxXZuv&6H1H^pi!drS4mm_uRY4-ShOfDjPn!$o-<{ z+vbTu%l`0*i`?&P{-@Ggx5z#6`2SQMcw?bk(|v!+yD$FsLU-R=8!FpxUg-9H@Vk`- zmoIb+uYABfG-%_0+<&3_pO+u3yz<5Zckh=rR(}4}0{78beJMX5d(#5<$ET9Y-Ip$K zi$3lvuN=R?{rvPz=D9&@Kky&(UDHDkRmz*^yYrVnT>1W&=erY+dL-rXKbt<^^{@Y4 z<-nuoyXmvOUuhma-~Hr0gB~5U`{N$E+|Byfqm|e1xZJHcrN469;>+DtnZepDJo}ft z_i|UW_(zo+U%$+K^!FoA zq<(>?2IjdNj@(@N?fvuIp?}<5dHiGZ+*dyLWAgyP7A8!d=bGO2)5rE=Xvm%8t+ z_+{mx+b?xrpD;v^ccZD>TjLvKDXpI zl`Aft>%KhZ*~-U`o9k|R=GoLAamfp9?$0MbSE;$b&0Y5TbCq>Bw7Kuy`+Vx7IB$HL z8&&(;%GHH7_wUDkTUq|p9QRn)?^3_TZY$@w*MI-}%Gb`C<1YTxA1eDFFvs0_##Zw% z!DjCM!EE=9Z@pOgTF-3v!MQJ0Zo6!@tKW05){PpAH%88O`>%Srvi#XuZg%~jDo^#! za;u;JQ|j|L=v>(qPyS0~uLEbf*Z=vK%1f`#bRYThw$u-D!0j{LAtPR?+%R{ho7(qE zW%JQ9UBkk^nMcal(JxxvH=lg9^5hp=-BGLmUb+6tR(EUtpmz!n)$Q+Ybx*JTXXVA; z&T#!xwpaH2_6+y2ZQIRL1&i9{oEh$(vtFzGx^9O1=f7X8eDE)qxC6fNdg@oX^u|kE zVZ@u2FJ5$sd+>obE02u1#GN+p-{!%BZGG~47rVcG|Ewf&`bhqTTtb67Y)7{=LXH%cd$BvlpCft#86JMX^?)pp4ZFqE=+kVnu z4IsJCMXl4^f>-kH>cgkG>zfL0+4hUvEuS6qc){L=t-Z+2I<4r|O}oe)zOLwYKlmc| z{NIadJ=~pr7rIe*m)zI8FLc-bqvY;9_d>Vz{ezw`Sl%8lwzx(AD7(AA)#5(>{wi0! zs>R*Ct}6BWT)j(+>pE?i>w5YEcjjHg-0Ux2;D)_A%sgbU!AB=u;2J+O+%@GdaQFXp zxck!MA8>o0T%G!dax*^Q?)h`I`}e^ga6dd@g!|>T^W9Uo4|>jEjfa2eeD|%&NcV-) z&UYXD_(=EqF6X<3-;Z=L|2^gN=ef3&g)$ek(3(j$SKK?HAw828p zd+lsjf5k5D;Z0||Pd&1WtGVuM_vd#Hdfm{rPuulu*Zjb)?wDUTyBQ;PbNRcPUCSkd z9yr+Qafdd$Lhjve{a?;<_n-T2_v*LLa_8MMSc^#w(_!u`cS_UlZjZuQ?yfs_cfajF z(>?pr?x{~}?{m&{wKwhIuHXGkx65z#a6kXm8Sd{#)TVx}n%QT#C7WyAn+KiYM(@9; z*7(!iC$1Ru*uj3Q7N73U-(@e?dDQ9d)>(VGN4LM;3M*bKc`#JO2Id zj?cZvJzjXfoAJtf%##O8-t~sl+~;oD+g*41X>Pyg_I6K?I?b)A-zW8(9dhfbuJq(S zZvXR7bqDObuX}CxQ{6!e20eVR=`%mo_j3pD)8vj{KUix@jn|sH zPI1SbROdd@dWyUC);f3T{-?N~JXdF)KUnt@pF7!=R_*W3n|-o-{jvSsgYP}rJ+^fJ7)HYZm)&|-B%Ad z(H;JgLGK_Q!iKx2y25_%b7!|sb&p;CK6m?!`)@zqwSVYf_uP5MyO~cM>|WmGcsFIQK@TEq|H~hn;(EV1#!Wwc ziaY+zF>c$iDQ-j4U@a{*wVT#BcfqrVxHpb>ZuOz^D!x^5A6qu)S;Q;wR%gXct3J$q z|EP+4&j${33twq;e%)XVF51YYmp8ia9(B0eaB!m=z4~zX@(YvQsXsbA^&P%3ZL(W* z$yoQxJtn&g*N=5QKRwPJ^2*rMpZL&e$GOgr9N`Wr9q0b}#1U@UL&v&lwS%5WybSjr zbFBO6SH`)oy)w!D{%_;lN4`GE{burD%`YtIxdSG-6;IT=wr3jL0eg&hkA1SieSOBD zhZ1kZ)DaEtif!ZF`9C_kw%Ez2P2luefKy2V(b< zd&<4#9&@j`=dpg8&w|f{&xX&4&x+41`c(NW`Aqq2`HcCj`OKqE$XH-ZFg6$?j1|UA z@RAxWBx92?%2;L0MjtI>nK8}SW{fk|8S{}7GZ&Z>%njxU zbA>q*eYwmf<`i>_ImTRL&PD$&bCEg8++>b2SDCZX=gVAXPBXWe3s@6a z8(1S)D_Aq4ZHHNi@H7C})vlg)?u{N+e~MS(90tS)*C2S+k>0nzfuYowc1c zp0%DeKkCNp1?&mz4eSx@73>+&cgZS4o)h~4uotl>u{W_tu~)HYMISeN z8G9Og8+#mk9eZB%5wI7sC$cxPN3vJ4X9gdU?WOFg?5*sv?6vH-!`qqghh$)CIh%tyYh&f`v1Y!|l z5@Hi#6k-)(mgs{gmLaAgwjstL)*#3BTpe0ASWO< zAV(lqAZLhm6XX))6yz4<7~~q{9I@X9xd=H4xd}N6xe7T;tivFeA*Ug?A;%%tA?Jy{ z8*(9XB61^gByuHkrdZcOE=5j7Zbgnou0_rj`+ty&k&}^|k)x5Tk+TKgn&oojbmVsA zc;tHIe32`W3z8F(8yqB+<;2R3$&tyG$(dta47oHpHMuo8Hn}!AckGWsE>2EPZcdI) zu1?M#>ukv7$?3`M$??hc$@wE+LkmC?KpQ|KKr28q2tGa263`UT7SI^b8qgeKzZSFz zGzqi`Gzzo|G>cdVgqDG(fwqChf!2ZMacJoKf);`%f;NIif>wfN66=c4QqWY;R?t|` zTF_i#{}{9wG#RuRG#a!TG@IZXG%W{B2W~8XH<0np^CzgBFJ-hc<^shgOGX7wf#x^3e3q_R#py`q2C$Z$%44 z6GR(CBSb4iGmLd(Xo+ZwXp3l!XpLx&vEL6`B$_1JBpM}JC7NZdLqp3%(?r`u<3#I3 z^NhYdv`{orv{5utv{E$FSl5P@il&OTipGl8isl;o523}P$)e4o(W2F&*#_UHX}M^+ zXuD{L`!k`%qsgPq zqtT<)quIwgL$rJ}eYAZvezblx|H$8A0WbmB0E_@u05gbni?9Tk0&D@s0Be9bJh|{V zV-TSO!c3wgKaSb-+BLuM-vm6M>DuNMI!}lUP>?OM$7tR$wf! z7MM%yUj>VS$-rh{G_V?&O{~*|<-l}cJ1`zt56ma}OJPAUA=nU%2v!6$igll`B$yIx z3C09#f;q*0TCgaX6l@Ac1*?Kt#X3@07EBAa1>=Hs!Mvi+6&3~)gN?z+U}Z3~SeFV* zGp6?1AB?fV+F)+6zZWbHCI_2?(ZT9qcCpSCmIu>=?ZNn9eO+RH(T@QOgbBh1VT73a_8Wsm!X#mnFiKeEbz+vW4i}aQ(}ZopIANVI&*=Mwg?cej z*eHw?RthtXb-l1um?~@)#tLhNxyJryuvnNZY!*fftL+rCjdjAXT$nCw7sdMmn-`;p)x+##oi!{U zrVrbP@x%II{u%pkHUEBqf9vND@^fAPAlK{nAEZ`GkM|&tC-%P)4}hL;BhRPj-$)IY zUe88ek6zzKUY}m?MqaO8|3+%N^nNz-e)Rq}^8WOGH}Zb<{;lRq_hTdXL-%JR_eb|@ zBlk=9ZzHu}x}SaAPu<@>?yv55ANO1LzmFO*eI9*$9{POx_Zr zPkp|9e7<7;eSF^f{H>-;c^ z8Z?c^KE|WQXCLEJ1`>eC}gD zYkv1Jzct_cnD5lW;aSpp(8qe9^`VdTLF+{y>xI@2tCiDw(#LwD^`(#XMe9u;>y6eQ ztD)0+)W>=x_TSfVk+J_i)+?=Febm-zJ?mpV)B4uO`lj`+kM)jPJ3Ihd5BpdTwLT`S zk6JGi)=RCQ3AK1yPZQQtt*;5|tJd3u^;YYz)#zzGPFRn%J}0ctTCWq6dxqS2Z|RG;swPI3AKufClcZb#TNLE`XEl|I2NU8!#fJ&;q1b;yyr}pwq1ICIWI{Zt_%b2BRJ@s3yt(p2 zR)eW{G$9^Ue3}rSDqc;9SEABp`Z zY^Ys%jeYFCxdCFFC; z?-KGm<$DSFp7Os0uch+AgnUr>VM2Z=_Meb1Dt}ClZzklM%0I0J zR{3Z`KC1jQAwN~Vnvkz5e@&>3RX&@L&nmx7$ZwVJCgi)yf30R#`EWu$to%43KUTh+ zkS{BLPN=0-KAn(HE5A<2ua$2nt;SaQctSp|{5&B)7yD1h*Ok8~)ZQwePsrz$ z-zVhv%J&oUedYgFlPf(SK@X5Vkf0ApFG$b}q#q>I>Pk;Y&=aIDB!UnJJo1a{UxDBSb9u?9wU7wL7$Oclc3j7GfeHU^qd4e zNBT~Jz9YRSLGO|NV>QLngA(*0=|c(nkl25MUL^e}q1IS>Qi7f&eJMd-lHQb{H%Wi8 z8f58F33`(P6q|5{DA^k9!3EPdFc4~zYK^kQnfsr8ng?9r2@FMIT5>CGO!*=oO411>$< zqen}h_UO}M{~o=Xns92vrDuEeZ0Xw`eOr3BNAH&YZ8hW4!##Sq^l^_qF1_5NmrFnQ z)RIe2_vq=;*FE~W^mdQlF8$qV%%#VB^mys>9(`VVy+^N?e($M0m!9v@^QG^5^nL05 z9=%`szsCb09^l~t;sYK&AYS0%1>y&uT6OUR4^I$Z@bCrk245@QApT%A?BWp~9w9#A z;S*y29$q1S;i+vG&+zaJ@eL2(5byBt4)G7Gc^41y@DTA44<8XP@$eGy6HhI?c#4Oo zh_86~ig=5Mw}`)3jl6h_hsTJ|c=(KXjfdAzGf(Zjc#enXi0^p#j(CrU_lW;kO}%)K zhX;uddH9fck%t$FA9-r+#gjZdNqot}m&BVqyh;4YYVgIQJUmK#%EPC`t313){K`|C zFP`P$S>jtBz9rt};a%ciRoc(R8l zi!XclvUszHH;X@84+QaO504g~_V8)3e-E#wCjz|@#Irp-TYTHYx5c|Xyj%R+dM1d6 zdw96`xQCC6mwR}*__?Q-f_S=zr;D$9__}zzhqsHrdprQ*@g5#8KJVf4;`JV0FMjXo zy&#_N;rZhG9=oj|V`n-Qxk!d+~Sx^xixk0KHd_2S9bP*7HI4!s7wZz43Se zbgw)f0Np!}2SE4I_euuRR_B^@p+^5&A4V9sqqd9uI&%D~|_2pPk18pwH6d z0nlgb@c`(v_ILnPCu2P&G!{G_0F4cg2S8)R;{njv@#X<|tK#vKXl!{r02*r^4}kh( zSPu$~MUMwSW7FdS&{*|&05oN589stb^j|V_= z#p40c-0^q-G?zRc0L?9r2S9Vp;{nJ#Kh=6%XfAp@0GgW~4}j*X#{;0b>+t|+E_*xx zn%f=^fabc#1E6{#>xrSYz~ceX+Tig3Xsz&g0JL^^JOEltJRSh8Eglbm)*6ooK>f3< zhlbW7j|V_&lg9&~waViG(Awqk0B9}qcmTAvc{~7G>pUI+)lGXm09p$@9ssS49uI)l zN{_f(pUZl5Xf5`50JJuHJOEm&Jstq9-5w8s)^d*r zKx@0l1E96u;{j0Jl*a?0y};uE(B9zj0BEo9cmT9_csu~wOFSL`?JXV;fc6@X2SEM5 ztOtnpB98|^dy~flpuNiD0npy%@c?Kq^LPNXw|P7O+Uq_fZ*Lw5Y)t+lTMzj}uJOJ98Jstq<)gBLk_HK^{Kzq5z z1E9U#;{niK@9_X=@3)$A#R47=fMNrW2SBlc#{;0)!Q%l?EaCA0D7Nr;02FI@JOJun zW<5+4i+DT$icLHo0L3aE4}fA9j|V`pjK>3@*v8`lP^{ze0I06sdY&j2@^}Cg8+kkc zij_Pb0L4xo4}fARkDpSpl{bH7--R9zfco!Pj}*mX9uI(GGmi&Av6{yNpxDjh0Z=UG z@pCG+^LPLh>v=o?s-v@>DvAX?9stFL9uI(GMUMwSv7^TWpjgu50Z?q|@c<~+^mqUi zds+_`#iAY$fMQdR2SBl^#{-}~LS8X!MX{{M&#Ktg;{i~t>+t}n&w$4Rpjg=B0Z?r0 z@c<}R_ILmkJ9|6;ilsds0L9iG4}fBAj|YHW>v#YZi+el(ip@P90LALwJOHJc9uI(G zd5;G`vAxFwpjhAI0Z=`m^@LF_;PC(`H}H4>lq+~V0LmRa9suPM9uI(W3y%jtxrWCB zp#DnMLq@rX#{;0;#Nz=_uHx|kD0lIA0F=vkJOIjVJRSh$Ivx*z`Yu?{8RbGA4}fwb zj|V`xlE(v}+{xnsP%h>104TTecmR}Zc{~8>PiH-9l#6*h0Lslg9suQP9uI(WH?JHH zKexxvt=!Jz0Z^{z@c^i<(t6q`7xZ`llpA_H0Lm3T9suQz9uI(WNsk9WxuwSgpj^}A z0Z{H~J#dtZdOQHiO+6j}<*FVJfO1!l2SB;3#{;0;*5d(CuIupts1Jqp%uz1v@c<|{ z_W0wKD|9suR~9uI)(ORXo5v;dC>K-z%E10b!y;{lL%;PC)ROYqbaNL%oD0Hif| zJOJw7XFYtRMR+^_(k46}0BIE-4}i1_j|V_nhQ|XSZNuXMkk;Yx0H`mA#{(cO#Nz>w zHsbLBNGtJp0HmFGJOI*CJRSgPD;^Jkv=)yCfU^Mb07#4RcmSl$C~i0Q@9_XgyYYAc zq~&<(Ii&4)JOI*qJRSgPKh{%7T9C&BAZ^Iw0gzVY@c>9W@^}EGC3!pm(w00P0BKDg z4}kikSq~yX2#{(d3(BlD+R_O5nsBfId10XHY;{lMi=>C25f!4}i2uj|V_nrN;vx?b71`ke2E307%>PcmSkzdOQH?Gh;oMq=kAs z0MbT19sp^j9uI)DQ;!EgTB^qbAZ^v-0g%?}@c^j*oyP+pE!N`!kT&b_07$F#cmSl` zdOQHqay|82(sn%_0BOA*4}j{ft*4W;V2=kt+OWq1Ag$Qr0g!g=@c>9m_ILoKEqgow z(waRU0QG;g9#GPvJstpQ(;g3iv}%tBK-#s(10XHi;{lMi?ePFe>-Km6)K|xPMoA0z zcmSl0dprQr$~_(cY3CjffV6Z^J)N|5j|V_nyT=2d{*u;XN?N?f10ZeQ;{lLX@9_Xg zyZ3kiq~&`&0Mhn79sp_m9uI)(&#fnwSb)a^AU5Ff0EiWMJOE+`9uI(6g2w|Ow&3vq zh&6aT0P0_9J*>ncJRShC36BRrtis~~5WDbr0K_sp9sscoj|V`k!{Y%^A0g{`B^KiG z0EmrvJOE-P9uI)niN^yVmg4aMh^=@$0Aej34}kh(T8}KT7>@@)Y{rYx!2UfR0I?g7 z2S6;x;{g!c@pu5ldORKg)!|!DEwLbv2S9Ad;{gyW@^}EmjyxU!u_TWNKy1n50T65Q zcmUKN(t2=-MR_~`VpARufLN8s10Z(g@c@Wrc{~7OTOJR9SeM5GAogWFyTrmg9ssd1 zZ}qXqtnzpO#Lhe(0I@WW2cY31{r%b>VE-NufcjTjk1w$}j|V_(&f@_PtMhmO)aTOU z0T9dccmTxqJRX3q2UdAJ0AhdEvqvn@;{gyG^mqWo3cZ+Nqu8Ox10a^@@c@V|dOQGP zjUEqx`iEK%F|kOG2S9An;{mwt;4Y5`K*5d&XoAr1A#A-br0I^$- z2S6;>;{g!c^>_eAeyz*n0Z?BC>uDwy?5PJA8}@hr#ELy00I_3_2S6;@;{ka7u`Z7X zK&;v00T6q(9%y3G9uI)nw8sM=R_*Zsh+TU;0Akr54}jRV#{(eN?ePGp50>>z6ASlv z0K~>U9ssd&j|V{P+~WZdOZRvHPTSt)@c@XmdprPQ@77~YEZ&<3;LR>ieZE+|#{(dC z@9_YL<$F8;V*4HsfLOoB1EBhUj|Cw7`+@Lt*gw}l7=9o2&*MEP_Rr(P{&_ywKhF>Q z=k>t;d3~^dUN7vQ*AM&W{lNZtf3SbvFYKT95BukS!2Y>Euz&6s?4SF$G2BnsKlc~* z&;5q|bN^xgd>*iWJ|EaWpBL<(&ky#`=L!4g^M(EMdBgts{9*r$2iQO31NP5&f&DXn zVE>FK*gxY7_Rn~O{WJbx|BOf2KjRbj&v=FXGk#(JjAz(C;~VzRc!&Kn{$c;j2iQOJ z1NP5+=?n7*_RoBR{WHH{|I9boKl2av&wPaaGe2Sf%-6m!e_{X3XV^dU8}`q9hy64E zVgIZLuz%JE*gxw9?4R`m_Ro3(`)7TD{j=V{{#k!u|Ex!SVSR%AvtGgeS-)WatY@%) z);HKc>mBT$^$+&Xde|4%N7z5>CG4N|6ZX$~3j1e$h5fVM!v0x*ldvAc{#l=4|E$-r zf7Wl=&?q_7B)U`$-b^7uY}h4eX!&2lmf? zl!W~W_RoF=`)B`x{j;CJ{@LGP|Lk|LfA&AvKl>rcwu|Ktm>fAR;|KludgpZo&$Prd>B zC;x!`laIju$xmSacwv z|Ky9XfAUAzKlvo=pZpT`PreEJC;x=~laIpw$xmVbkeD`7G?8{1*04zMF*n z7xqs+oP_)s_D{YH`zL>f{gY3_{>iUl|K!`SfAVkGKlwQ9pZpy5PreTOCx3_ilh4Ec z$?swR>vFC_K%(c`$yk^{iAol{?R{R|L7sGfAkU9KY9u5AN>UOkDdbiM_+;cqqo5R(O+Qy z=rOQ=^cmPcdJXI!{RZ}ro&)>vFK_K%(g`$yk`{iAom{?Wf+|L9?`fAlffKYAJL zAN>sWkDdnmM_+^eqqo8S(cfVI=y9-r^f}l+dL8T^{SNkzo(KC!--G?5_rd< zfv|t{LD)ZfA?zRh5cZFr2>VB0g#Dv8!v4`8VgKlnuz&PP*gtwD>>vFS_K%(k`$yk| z{iAon{?R{S|LCExfAmq^ekDi(YebooO750z*3j0Toh5e(?!v4`~VgKm2 zuz&Pi*gyI%>>s@s_K*Gx`$rFk{i6@V{?UtJ|LDiCfAnP7Kl(E4AHA9W@9594fAnbB zKl(K6AH5p(kA4mNN6&`+qi@6h(Ys;)=-;q^^l;ce`Z(+#y&U$Beh&LbPlx@ZufzV) z+hPCc?>^}9uz&P<*gtwb>>vFe_K%(q`$yl0{iFB8{?Y$o|L_3VKYRf84=;fI!w+Ep z@C4XDd;#_kZ-D*7AAH~uuz&aj>>pkM`-fk^{^1$0fA|LMAKn4`hkwBS;UTbp_z3JD zUIP1vpTPd%DX@R|3hW==0{e%*!2aPeuz&ar>>pkO`-k7a{^2>WfA|jUAKnA|hyTF- z;X$x}_z>(LUIhDxAHn|NNw9zT66_z|1p9|S!T#Y>pkQ`-fk_{^41$fA|*c zAKnG~hkwET;bE|U_!#UTUIzPzpTYj&X|R9z8tfn52K$G>pkS`-k7b z{^5DBfA}8kAKnN1hyTI;;eoJ!_#o^bUI_b#AHx3OiLih8BJ3aD2>XXW!v5iruz&a@ z>>pkU`-fk`{^6OhfA}WsAKnT3hkwHU;i0g9_$cfjUJCn%pThp(sjz?eD(oNL3j2q@ z!v5j0uz&b0>>pkW`-k7c{^7Z>fA}u!AKnZ5hyTL<;lZ$f_%Q4rUJUz(AH)9P$*_O; zGVCAT4Eu*a!~WsXuz&b8>>pkY`-fk{{^8lMfA}`+-{S!Y{2TTU4~PB3$6^2Qa@aro z9QF@ShyBCXVgK-U*gyOo_79JT{ln*B|L}U)Kl~o{56_4F!}nqT@P638{U7`Q_A{;t zegXSk9wYb(?6G-{;5V@6<~0OAg1t6gWAH23Yv(-#KZCtD-Xrgo_Z<8Wb}zUm!5?Aw zihCCP6Lv4Tr@>!g_nLbi{1^6F@Rk6Tu&1 zV}&sj{3C;7NnE+#l|vYI`~^`tTX0=|HbA4b0YX- zY_2e8f`7*55_2l}YizDD=Ys#n<|1>Fxyc+2ejS^;%;DhYvANA04}Kq;`>X-M4`gct zYXoZrYew)7*;>My68uHB*0AOT|B+A73>-89qb{&PiA`ydra_~+1|q*6#QtmH?c|w#rW_ufZT=2Wu z-p3vo{BX86vPTBLob8?Lp}|jQdnZCq@r`-ND#h zF?{gzT5L~@AN;-+`;!9%Kd|Kna^~Qlhy7bl9sKo{Ym;*a|Gnkn zBJ${QZ{elk*4vzi9zz0--*@v;s5(v;#DRP)}gm0vbc8H!$r1 z4ITyN&^$u@gJ~gXBB4IQv=TIvP(NW>3Yto&uQ06z z%_Y=dm==R36Y4Wet3k5~^&6(;py`DA4%2$jd_w()X+da0p+3a4A~d5=KVn)Eno_7Q zF|7&BDb$~s7KJ7i>QhXsLbD3>E2d?kX@&Y0)4I^SLj8+rVQ6A#V`yY(WoTxhe#W#k zG__D)V_F-UTd2P=Ee=gC)aRI1hh`V*cTCGe(+l-IruCuuh58@U0?`CReUNE|XojJF z$h1T>#ZX^lS|gfcs6R3-5=}DHCz)1>W*O?2Ov^;mMB7B;4E0W?eWHP)g`$au`Y6*% z(M&`AlxeAGs-eEhv{p1%v{y9PP>*HWEE;X7*D~!E4L8(tnYN3@8|uAG`$Yo|^C(*qmhStIn&P3&_g|)Y3pe0q2A84cQp7=k7wFE8hxnOGwmJ?Kh*P?wvWai>itan zhXI6oKw|?if>1AL>;Q%k>Isc4z!*Zkp|J-TM5sqJHUXmu^@_$WU>KpE(bxuzBh)(@ z`+$LjdPrjobkjz-&VOrm-BDPN?rR z)&uhi^`FLqU_zlj)L0SBDAbP{OM)qd`cl}xF{e;}YAgyS73x!sRl%%6{i?Anm{zE7 zHP!|53iYqX!eC;dKGs;-C1Pfwe%4r;F}1<^T4QZ6w@`m;EDk0Y>T`|N!R$i)uCY9r zUa0Ri*4HKG7wUhF1;PYFeXy}Ym|>_NHkJre4E4pv8exv1{@7R~Ofu9b8>@s_hWce= znJ~>z-)yWC<{9drjfKKQLw&TdQkW_16owk=sg13|SVO(Fu~!&usK+)o3!@G7+Qx2S zxS^ig*e;AW)O#EIg#m|paAU(T;!rPc>==d&ONJ?j`f_8rFz`?hZ)_Y!9_rk}kdw>TZ z^dm5D!fEmV==GXsA@naWF9RNc(BHtk4tM~>{>=k{7XlAJ=#OAt2|NIye}Z`_xSx0{ z@BoB<3+BDR0}%Q#m^b5jc>wfznP(&PZ!j+h9)Qr_!Mq-L0L1>y1A-R>4?yS-VO|kD z0HJ?`c}eg9g#HrdHNgWA`cIe_1rGq;6viiB6+8f;e}#Ej7|(cH@BoB<7v_Dz0}%RQ zm^TIwKJ2CGQ9)Qpf#k^5?07AbM^G@Lb2>n!8U(I6``mLDv3J*Z&$70?rJOFsL zSg-MJ;QH2-X3TrW z{(~0{4?yToV_r2p0HJ@4dD-v);B8}n!|R3zAfBU!7Y+|V=#OJwIXnQNe~x+S@BoDV zI_9;*0}%S}m=_NZ0Ny(%FCZR(&>zUWf_MNz z{~+QC^Av{uLgqEZ0}%QTnHLccKgFnfDS80A5VuvCyB%yqb6bLjNZ7a^e99{hiF~i3cE_ zV}lnI4?yS-WnNJ{0C-1*R{U)q+|ZB9yt#M)LccEa z?&1Lm{k(|p&Ep&TeVO+c4?yS#X5L^t0HI%)d57@;gnnY?Eye>7`i+_Q7!N?`M@D{P z9%a1B%=?Z9053fGu=3*y z9ss=ZcmP8GJoD1y0SNu|%xjMaAoSleFFqasy!qtkc=hoB;N2&G5B>be@6F>M`u&;r z9}ht22WYhccmP7bK=cEvAqf2ht+oIUKS#)Dc9JOH8pqt$}o0SNsetyTmN0JS6NN7Rzw0g%3AH73%V=r?J# zC+JVqqTm4t{VAzUum^0cmP6wORIIk0}#*Yq!tDb0JSmbW7Nvv0SNswt(FE4 zKH?>+PJOH8psntT^ z0SNt3tyT&T0JT%-r(*x~Q?=SEJOH8Js?}cM0SNtA(PynjEA(r%+ATZ)p`R=IuEPTm z`n_817aoAn57uhK@BmONhF(nV7#@JoPu6P7@BoBo!;$E`*#^vku{IXnQ;)2*g1^w&jir{AvC-l4yTe!S@O zR-;F)9v*p?*RuT_D=$~x0lz0F_ ze`Tw+!~+oeFIz1p9ssd_tI?!Z6Au8joA8^^&l$dBHJ+j0v(cgFCKt+9w4>AcmP6waCo8B42S;VR!fWrKzz|^j6=V1t3Ad85c-i@Z89E!(68KT zm+=6Ee&$x&j0Yg}JGa_rJOH5|I(*b>q(i@S_^H)UhkoktRjaWM{noAa8V^9|$8NRR zcmS;Tzj&?HZp#A@`ng+eHy(h{@7-#@@c@K=@bF=)5fA<1t#%v_KRc&o{$HXlAutv()r(7)em`SAdR{{B|$j|U*04@oZoJOK0tz#l-b z06YNn4!}P^F9AFNdTi@4K(7Hj0Q4Tfe?Tt+JOK12z@I>`0z3fpF2KJ)F9SRPV*l3T zfL;f90OGmW^g_T7L2m>+0Q5@0FG24FJOH|v4nGCG74QJiYXQH7?!ChUKraUT82W4+ z9ssd_hhKx<4R`?P<$#}q-VS&G==Ff#Bc78*2#-76iKragXDDC13)hg{515|zym<94g5Bmdkzl(y*TjW(3=Affaa>h13>Q%{5$mW zzym;U5Bxp!`oIGa&kLm&2p#}>gWwO+TH){j&^rVV0KG);6VY1)4}jJhhu=tRkHZ5% zFA}Xuuz!aKfL7^=wa?*yq8ADt0D7a~kD^x!9sqi$ z;Gd$G3LXG@tKhHFTI=utXzg`)0O-YnA4_Yq!vjFC7W`WDZovaUFBkk=^mf4mK(814 zUh&*idcoiaqc;p50D8sX7t`M1@Bq+D1`hzeW$>5LYX%R1*uTSnMlTvX0Q9E8pGL15 zJOK2r!M{c?8$1B?w!z;-2;ot$FHxB+ddgb5&(BA3r&(TW<4}kVohrfjw`2y?^lk(F+I<0KI|m z2huAD4*v6RD4NpB_dSN09|TvF`i@Bq+@ z2|p&ineYJ6s|mj*y_@g=D3){hIqB_$2Y_Br_&wt}y7Yp=4@z$+JOK2H!Y@kiC_DgS z|JGBA-con~=rx7kl-^T#0O&=92Y}vGcmNcuI{d1NT^$|(dRgHC5c_xdTj_O$2SDuK z;eS;u?C=248w-D|Vr7R1fZkd7XBA63JOE<<4u37Zw(tOm{X6`(^y0z;KyNPmx%BEX z4}f}i;oqf~7ajn5d*Sb;*B2guc%Cr5!0-SlH*ola=@o_tfZk#Fhv_AT2Y}vU_>1W^ zh6h0G-{C)|7a1M^dXwQ#rdJsr0D70carm3*b%qB(?BC&krWYC>0D7b0 zkET}|9sqi$;h(0L8Xf?8tKqMv*BTxGD`A1fL?z1`RVP42Y_CG`2FMg z()0qP9)R9}cmU`XNWFlx1BVBIUV?Z4q%An=3+Oe72SDuKQGY-$LOcNUCZs+=T7|;{ zK<`587wBb(2Y}v&cmSkza0USN4-O9iy%4E~pf@5O0D2`-FG24_JOK1kq@IG_ig*C% zwMe~%>MtA~0D3V}k0EWw;Q^pmBlQ~eZo~s1Eyq#ML2pMq0Q7pK-hP@6QIXnRLqNE;$-jsL%=v7I*3cV}w07%Pn z)U(jr5)Xj1F3te3-j{d)q=i{eOnPHVBZK`rX=c>VI6MH-(yXT@y*2Rw&})-=8)V4vQ6@n|62r=v9jcfZny#uhGjE4}jReqrQz^w|D@={vGvi z^uomhKyO^?x}eIdPu z@c@YZJL(VVMT`f4-o(@=(yJH`0KJQ;U!<2Y9sqh9Q{PChV>|$2|Bm`cdLiQh5F2sS zN75@94*(MM$OIAN93B9%e@8tiy`k{{i2Xb2Md=-l2S6;zQBO*5X*>Y*n#Kbl_GCS% z#r_@jsPv}B13<58>Q%+A93B9ASyRtSZ)-dN^tz_rRqV^*0TBCl)WeF6IjfI7X0T_r z*qOrvAeQDnrFzJOE;Gj(S{rbK?OJ`*+mqirqOp0QB;vo|oR< zcmTQ{80`5??{7Q+V*ieMV0we&0T3&6)C1^yw(6*_7Hf5Q0L1bu2y zIRn6Yzl#A|FL*ovV*if%aIs>C2SDuKQ9myB@9+RTuio-_0L1Jl-W?tQv43Yh`PG{r4}jReqh4R^-g@|p{X6RU#rCboKfV6( z0KE0qTV2%u-*nxUt`)yLrF8Srv$`(%=|@MrasFpkEv)I^#m%^3<>U?9YybTEAuE>u zYtQ|r6<1z!@rW_++jY&F&Oc7v@36`D9)IN--+#S+^B=#nWY@X}j{d=8&v$e@@PWy@ zjr`GqIr~0w{1GuOX-sk@I)USB_-5wkG z8P9j$v4tmj{+FLU>4&_Yn@{@kBfP#(KQ}(%_3pXr3mbU-BkDGNi}!Q+k&l0a_cwOh z@UQTG=U%(=9^U_zA0Bfz_u$-rkNgbxU|?1K9o&Oymwx;_gmx{8wgukbBVa!_Tbd z9xU!Wcs2JxZ+|uSfPZrj_&N80>$wN~KKFpf;~wz%+ykDEd%*K^4|qM?1708ZfY-}C z;PrD4ct6|&-XHgX_sc!t{qsLx^F4mXHC)T@@Vh()kHus1*gOZ%#dGr9yarwiuZh>j zYvi@^ntAQK2i^>1O@$rv5MAqd(rtXR5p&r!aLi z@1m&dGMQm7>yJ{u{y0$I9L{wvQ@udXQ}}J=m?78grmsss(~nOda@_>I`NH2TGlpC@ znd=60-O_m7ewnI!x$dEBhg>!%UiRsDnafn|ua{JK;p;;#`)IuE;dohBrus&GU3ho) z=R>Z$FJAXjyzZ?`^(d}u&+_5Mcl)b&-L86vgLfsHsczxry_P*l--{RK^mU21F*&_3 zpQ&D>e-uXK&l+;!Ve!JY^ultc`Z9e&g?);hLoPfoUih)}!qJ&(-hN@+u)Bv`xH4XN ze|q75ndKG5G~~iBav>kdv--k5x;--0`*Pj1{a+b!-IMXUvhJ^4H!f4n4K1wL ze=mJ2zUP0&>&C_FW@M^g<=%XG{}YB>x1YYY=e;0a=QGt`Wn}$k|I3D4cS^i&wZ5>M z-KCrTZEnqx2i!X3!bS1IFUJet%ITf(%>4&!9CBe#yznRKg~d$uBA)u0_x^6kg%8CG zUr#Tr&QyPjM||adqx1^mdwwZic%Z&HI3RQrH|S0j%7-2^do~~5 zT@#)favitTUf-YeMS8O}I5d$bWc2*;9X}l}++E)se8;-kOs2wxM;57v!4*5Q-M)m2uf;A`oY{>UnCaQD#C<|XY>E$8cXIZGeipP2Bq=KF%-UF6_>V0%0 z3JXr&d&u{h_0`Mye#a>jhkTz&Ui}H)(2`S6AM$zg)M zcFk1p#p}+y8;4vsPhZ<2eRsT0gXL>H-Z1y=A=lj!ulr%V?wCwg}q#%yyN{p7q8n(-?TAszh>tD@&*rgV~1QgOkdjzoEk6my6_qOdf^=R zfgu-8h!@U}7nZdQj@Lg5*SM}B7fy>8-WD%>c2uUi#3Sx9W&Mx~*Tf5xc%dJisXmG~ z(|-Jqhg|sec;WB$h23n8zB9P)=@b4nqb@Wn8APLCO&_{{`yuN9RJpJ)w}7B z!iy(N8uI=0=AIdUe^I7-1uy)sC(ImjT}5BpJ-aeq_m@m{KZELx6Rsa}-Q0NHUHZa4 zglBbcSzZdGr`|W@!jHuZ`_l`x7q#-r$4~wBkPGjR7ydO~==C8ayu{^G3krPVTO82O ztDoQ&?Q!DXL%wgfazGC}LEp5Oq*$q%n7MG>`6mszaDRPmTfnrT7oN&Zd+q#%LoPgx z3;Xo|YldE^v5_fU_JL0hxp0ZT&Sc+}ecz~EtMjAYGpa_fI(J~Ey1Jr&Dx%pvlOJ_# z^>Njw?y6r6-`Be+hVK{oekq$hb=R!EDDR&+b=Prve^nFHUvndJ!xirwq@U>Hw+pIu z7s3Vl{lN<|#8R3F`cI$4kpJ$`w9I90<$tIekX+viVEe=FB*8QAfx8w#EFyxD)k`$DPu)ux;_orEPP@O+Dk>Q_r1o;D3)=OO9yghAvq;N71sr*5{!6 zHeQhR_SX4}WK^s0Gt=FD%Kx~OgLj0r~_J>!b;M`f-!a{P>? z{Kg6MmY&mg<*5tjv~}9Ejz4;5-#vO_M!%)s82VU?=gwU^LqFNcqs*8)uT!^UeEo!p znI-cE-_MM>M^4BrXX&vGIl6lv(@wWbd-;QxRdw)Y;56@wEf8hd!D;qkeVjvD0m^PmhCrdOFyrr-Oa^I}P^fbFZ?W zoqWOc|Lb6%e(utl3pE+$@CMFln?0|?2GiMkQFG@nn)&u|qnG>NFV)`t{6z~dt+PKE zAw%B|H{9O$PCncJystcz-H)97=9#2J&u&RRTk;q3Oh#cfy4TQYCa z!nz6L8zvmnaB#=U$R+ys+>R?Jj$P6* zcFy>t^_`{d%NES48+++^{XgfbnTzL+olrOSEd8&k-+1Z5Ws@e=jh#Dp*}~aN^<-n0 zwAtTF^u0MVm(Cpe?*&@kW?tGhc7EH!OP97c*1zqJ9z8f$hTdemHGDdDl;Ha8k~y%vE1+p%$O11 zrF~@!<4&G6-md>xdk1Ije>~UDccb{Jzr%w0pCgfxuE$OHAwKbUeqB4?(89P4I~fm` zIc4h9W9!DSSe&Glz6n4wLJG)1|HoIqbuk3sB`{oYFW{y~L^#a8M`g`f( z!N1$%S6YOYW{zOl$Q&_i$&$Y2#h)9e#Xz+-V#27Wkn0Ul9ngrt!V>~c1(HIYm8j)Q8_x=h||_9o|JO6gayK&Cnt?3`ASv(f!aaHa5%nG~_;IU!PiKq*kdCd66+uj>}D z;jXgY&{bT^J4%gf;++ZwEEKz>)@!`Vq$5ms8754t+b&8+|P7?VVF}<$F5NdwQNSRMqKi3-wMnhN><& zJvz7i`qs^dM#gF7>f1HcL&fgH^qULL-l#w?NoQh>)5_U9J=A+1Iy{gXoW1iyz28Bh z+-c?P-4N=%4V`w4^?n-al|*JzPAz*pUJCT4L2pF?y$=GtSD|OBa*D1VtK=1V{pjV*%jt}(Sybk$h8rz#6>d~=>p9`)C=ZAV|&{mjO zb;0R-*~(ChlE!pDQYNfrkn;X>#gpmBoB_aA}Y?a*6MKyP;pEWW+! zrwZrWH_%%Ty+ZwTc&PW=!pCE3pm*8tVb2xbtH)WP-fL08apTfJZ`|v!SD@d2Kh#4@ zu3!Uba7Fksb%Z2InZl&7V^c<1&Ag5G}MEy zuh4k^`#|rqt6;3aaia^_Z|BRdhF*d3V0U;k^7O7pz6Fk3zd)}YPU!mz=$#bkJ-0dG zcfV}AoE_+GgWie)_1F;T&HE1OQQ-LgIMn+I^jzbjgS$ zK5LIp6Zq}d>fwahTA&_vf!?-9kgpzlf-4_gx4ykekD?y4y{v^}VskZpY#Lk z-A(n}koWBP*w8`k0`<7<6Xjikv133!#u0>3Xyj;uQ@p?REg{R z-yMw#RhoTGCCVWIw=$KcrPOL_M*oEKqOA^BAs+}29C5Bo~9kHPJ$ zgh@hInl(z>_T0lTwn|*@k8$Z&kUrE*a&!&plsVne8PdC%RgP{&`arYJ z(bC^5%yo_iR$|usHb3?aUUXkv-(C&C5IHF8!=a zF3;Id|D5kU5bue&78-HIH`RzMewapF`hFTQ>2+zuqIug)3LMR<=6% z-bu8K$AJ6O?-HzOqlfxf%|=Ytu@Ms$Y{WzD8u7%J7Gz!E$uND|z%QV>=6#keGdy!X z)0R14+A;@BDRaP+G6y^2`1FQ$h(#w31d%%7G1h`Tu zj5$>4FA-7r8A>-0?=a>fr8(W4xZN1O^2GF*7Bz|Q<3391w~4o54iMK}%6BDx53U8J z2N7>I2GfBepFu>UVcJUQi-_Mb=4PeuBEo6x@~a^hV;fsE^Wj5id060j0MPzhVsMubJQL#0!l1i_-L=B+kbh2t>%+5!c|j zDP2W8&zJ#94<(*!%t)mt5zjGZiPCF`*BEo1(zgZ3F#OcP&2dlK26#IK^?C|yfj zZOjCvPbHph%sEP5LR_We(OJgysP5gjcP1Bl_UYO4;68n;`u56Xs)TL#J*%qv^y!ny z^g6hzHvnN$^W}#RtG923;N(Z3rxT}VHk{H$qAB}t`T(=UoMAFqsk;BX1luS>J!u5p zHb1noe4L(nVTDJ{W4wr-WDL7rb~dG#Q5wh6&sb=dhruDDTk#*r`Fd&)rO_2cKX?V* z%1lWES-ia9<-ZkUfFaIsnbNZS#L!K8hUc3tN8l@eQ?1yay zBN}M8#t}eYzJh$@RYUZHD+hSn$PemUL!JiO^Bd?s{1>hv4>nd1{g43xzGq&fHL|xm zzkKA(h%2}QzlP|Aj2Ev$ z{AAR@W|@oz;u;c7fG>k@3^HK7f+cADcsKB(J$nczU0ViDR~*Xdz*=$=sYMv$;-hgg zMO{V-r}SK=nu6@3!={syOs$~KF-RKKo*|sl4`39l7(BuYN4k{m$lNLh&5<;oP022u zpdIsRkVK{rqb)h0b{xv+UND#FI-b$KROmJfQLKURCM`$lzPu!+lh30pSleI~HPXpT zP_-0qRBS`lUQxi~+cbzVMvQmGk>pZXrldr5koHGWO{U{v24-Abb}*ROw>(`#>77cpN{?sSA4o2VecPfrIdRqOT$Y6W zD!wZ{3=EXy(e#lxnzkfA%P+~}`6YQGza&4;FUc>`T=F1Wl3yyRCD|gm*pk2lZkqA2 zofL1D<0sRcLqkdap8f_)!uQbQf2M1|WUqOW_4=1KX{+=*?0TkIC&{a=N%6(kIBGTt z?B;A|KBrUmBx<;~Dd!3n$VKAcKw9oW|~;C6|Ah^4n?Sfc>mSGl1COyjKgB<6n^}|1pT4BZ6<8HG zI$wtA_qAC9!n8}`pfP;eU1rUu9PUBuvUWRzG*NIkxcm1NV01+wbax~l3tWEC~R%MD) zxzwp(affkY|E;k*)GTBAUWtCR^?@<(gq`xZ4)%x2W;8HGQ7k^%@P2qai6RTnvJU> zBx|^80aQ8z%FkxjwPP%YCuRBLtkU3@fOeNFiq9_Zs_(SoR12MELl*DDYkzqAk1 zCC8m$ZE&Rm(KsCuY26>7_t%0*9>2`0OmZsgoyxsX;U9tI_-n1o*-nMa4~P}K-e10$ z&2++pR^m| zf+s}kK%X-U`l)U{XDy1I>gjVz$vN2PoR4y(`um){F*KzP^*J{(RjtqYfaR&@Wmt<@ z@gVA-I?Crfjmo8l`y8%ik{aoAW>IIX&)E%iPL20D$Frs<`5Z2Zl$zpm{>56%@HxD` zrcUK8iz^}LUs7{?&OuBy-{*9t&LW>v$MP)kIj^v$%X|(!kf~KZXA)cNT%Xf}<+;G; z{DnGeJHnbf)Vz7Am`L-NdhCi5ScI#54yRaB*ZG_^Y^0lfPABSo$LDZjE_J)l`2qS_ z>TZuCSI|390y{$QZOSQdrpLGvSm*uhcVSRV;S#ot*kMrGC zuN4QAR3^F(Jk;-OKr2kq;uMVT$gx^p!z%9^{hTbVA(!uJxhuO%H=o~y!R+eBq$SgR$) zrC8D}>h{m0AX(a4p;#E)~9nYq+!w*KBF!GnlsMA}+V0 z3na|V+<&o%%m2wTGsP7fBNKET#{z+ zv2Z^krOm5Rd2{Ss$$aNp)+L&^=0O2_jr@AfMOvWLzSBLossW7#jT*ZCq)q%L&9+bY z9D;TG_<)XD+GJJ`_m z%jNn)A6?%CvT!A#u*|lGq4yKMQn&cUPAmoDH*Kz~$f3>FntYp=ls%7c+pS;E{`nqU z^>{b2piiOtqxiDMOQXi*u?T$BEKVb)^q59{Q@DZOm?!YO(RMATk@fYXb0994PcPcaB>Nxz1Ji{B>P9>=t@%g--IYFG~xAO6ukJ4}^|x zIGy}a0STq0eNC;Gw2my)^7&ooC$G=jgRf_!JIH#5uz^S6{L4GHRTgvr7~rVUufU*@ z>xsE@FFbV8e{e!%k4UcnfSWt@Sr}ZnhE1Q7cR=mAqdhHK341y-E0_&Cnw&3|X`ide ztxDs@!rEi~5~1+gN5aO^e7N>UUeo5~U+`jCE8jZ;5s z^2sCfn#Z0kEMMMPkUM2XAs8o$ouNDx3$&+}A;0K>NhXzJsf!MM)~k=@t^35gi;+jq zoi=mE%;~anRXFtFFuMVD@JQT_WUrC6$NFQM)G^y#(M7yf?4+{c38cNKSo>;22IrSP zn`HaGjPFxqX+E3@SiGxHzk`A7*%WjkdnF6cRVk3)LF5)FxJpS+k$$+d>lEt3eEB!0 zdFP28f~4ngytczlp)TqAf9_64FJ0`~*%bq&(Hq_Gxlut|pJyHpj9i$tQF(}Mqhj^P z>GmwjnvqL_Z8u3XZwON5H?UWY0_TT2+}U2H1<}(fWV@;sIn`Nw|4>P5>1a}Lq_Mpr zwB|oumRsaed!QZW!X$32$s6s0^BgJtRpAP(pXQgHEt9=@kc#BGYvG|5mB}qzmTft` zFy*xZE!pEDcXb7hiyOCsr}U&8?$~4tWlb>$H!@@+wK7C}K9~K%QYpEmzjEzuuWvXQ zvY1LC4Lv2$wxLS4Nv#n%`HSjUGj`PBx-G@C;>EtG8Jkr>Guh&Joh7srj39DChdN>> zI2(%BEl}KewqzkQK~5jnIjj*3L19q}HsZ(i zp(eUn(99pxggPcStx>d}1$h|DL*cS3a5`jkQmbGFvKJGNvdO0Ki3yYSuhbI72{e0wFLbaj;IAbJq#GZQal1K>k zC}Y?k8~kHU>QzC9X`Fr9YlY1Pc%~$D#U7rdY-kv3^%jFe9d68TBsSk(9q2;#hJ)|h zTkY9n8#sFl1AC)E%QKrm2I?`Kj?K5X9`>lm^08db9v&CZE8i^8h3w(6@H~5)J$vx$ zWbN@C3%|arK^LkoUW3T9_n=o_dVyT|wj%D^TMxQW`Cb6uukX`d`S2KK)?O0Ee0!UV z*rSqf?@iAh>*LCIKw$4d$O_e$51;w=lE>xxOKZ>Gu)yBaManlcu-6v$-0^Me+2gw@ z_+|U^n?>xM9@y*Z+1u5#cTHfA?OEt}U}?0x`qp{&sPEeEzQA4w(1qHM9(TX}CV1_) zhi8w^2;!HmZ&wh7%7=$M^6bs>%GbfOSAv1Sw^s+EQ27$j^UJr|E8kw8J^Ippd!vik z+b^)U-m{nS>>VB0n+AJ@>U(5hZ^admW+Y_rFe_J$d*HHaYGO4eY&Nq`q~5y=vHFyDY|5 zh0UG6d`I4|Z#n8kJr}6Qz-N{G@(uIs^@7~llW&WGh8YQ+5GmAt7X|jF!5;NkzG`gF z-km}Ds*BjWEwI<%+3VxkBf>cHNsp1r}IJ-&nJw;!L>F4X^S4D7w{*{k#H{W7rkAndh+ z+y#gwJRaCf9-liN_0XUm&)@d~dmO(CmG7OvUI*B7?Kjl3$9F0H`o3AjUK{B7$G59z z?;%(HhwV6PnKL810LF0ePuYd_vwyY>s$MC=56h03=) zus6*s-w4m%4MF*;iK0c)G+iNINz828)?cMH`52s4j9v^ArhqrExUkW8*0HwE_Y#h=f|A#=gmyF1Xk z0MCQ^?d|^r__5K7sbh&ws-)~>DQ)_|Fg&w~^>4GaC5tp=VSd5#S8XS)^!C8cj_2qG7Uq-&! za2GCWe8a#6XV1|Neg6ObTA)p>_1V-~o=vUQ+0r7^^K~c=WIVS$`?_PG$7;eniY>bVe`5rKR}PKa2H+4cPVc_*C zzy7?F%Z1oX3*^&sLd0S-Barh>D;HvON+9Q*Q!d2j)IiQVpGuFO@cVd>_^^=M1aK#SX8>3X?;BFEAl z43@8vVCe(Q4S94gL;nYZmA5lbSyJhJ%%Ae;L3jtrGOT`u**%X=o1S^}SaW0^J!8NRocqmMGD=FumaReAJib44EA$8g>-mp)@2%cHB!);xN!;W`01{TkDPH;f3j zd`Yu!9^J|G&!Y#JWAo_oW@aAU+N{i@N0`g<=t<_gd31O4a30;&ypTuFGJnaV$C)(d z30z>A+XpniVc`Ph!vgx$faV%qE>M4UKwlit*97!!0nIhMT%f&I0-E2PaDnocC62Pk zAQRC20(y8rPYLK10sZxWzCEBH4d~wnG{3dr0?W(Sw_PC36;WIuT^-PTYuE+K`EIQX zq`6j@3#69@^tyn)F`$1G&|3of_W><`LN!C?#}yD%QGtl_!@B(T5pu53A$M1l4g?^t^GkRCZ7uuw&)D zmF0-Rd_~I<@?MT37aX=Ga^Zo^OQG*LgoToJ_Z8()KRJhdt~;s1hhqQ?Oi3BxzK1$t8HlN8dFne*ADY=H+X9P*~5fIc+Q9Ncw4QhYFJh9Yj*1 zL;4AA{|plbN|G=vhjh2F%F=WJQ{Ve7-VQ--?)(i4)#%U`SdLnHXOKTTN)yMkQD0(S zO{8g5oC0fg^AyHQZhnL7;2u_vY+p^9JnWgI3p8V>W-A=Df*tz9Y=bT+xdy$)Hbr2~ z_6VNX)>pvwl6i~Cb(Hy6i|Z>3{T(d4Li)S*e+k!VZcF+~<$q84w<-T(P5*sOe|wSi zR}@LVR@2|1>F;bzOa4Dl{#~l~L(Tv0B6h!_`d9=~>UB>Mz4fYx2^7)$iPHBrk?u0p zyHEA*SNZ{^f2!qsut>gNSN(@n|6$dCMEQ>@|FOn)<#>5=X`i1J$>&l{4`-Xy564&1 zKcTd%@6VO~h01@a^cJ-n_J@r{_?K(?Cj)!GQX2h3^2Y>~l;`Op<-SDqo>9GLmHxHT zuDzdA+V$h#DE+*)=WjLL3(9}7NV%_8y_Zzal`E|GRjT*0>TOlp>z7i$@VLIBdcV_j zu0CFQ3!Zn^XgaU_a=d?Eq}|pPso%9l_#4!|S6=@0Ps~&O1)LuP4ctX>cjA0wGD>$= z?4{UOu}<+w#j%PfD4wD?TXBivO2svb=)#geh9JQk6fqPDjZ<3?r;Z>FogfaqAevn8 zPm0?VKTzacDC^fkv09Ofrjb8VakAohidQM#qR2T->OZE)XC_I@di%gM<_t;irpRY) zN!KclRpi_y`3;I^E3Q+#R`FIv&Q(%>tKvI~|5R*&xj)J~D0Wfg3XbHDQREyX=`$7i zeIC-6Dc-KgXAH^bvw_4t(BX-PDo#?Ab@su(LFva7|E$;|Wz+RgJXWzm@f(VFE54}6 zmou23tbY&W_g6{JP+X&Ui{dX7xhfp>+G1{q*jMpL#S;`|9ec=^D}AxzHx=(td_E*;5FgL37#l-8euD{aXByKY1CZ+En zeiP3dDE$cWI%A$t`ZvUDjd@AwKNB}%O>?FHLBx2Jz1yKHD8JJ6#8oK2(#I258gr7;vxqC~ zb2qfVob+;IzOM3{6n~`n7;%{~PbvKh@yo{iQR(-IOELZ`U0MP9EL_)!u)hZp7oEM8 z?nXS*m|jZr`I^LHV-8n(6!8pvw?yd~#6|iYh`Dx3bn=u1TrQ>i+#Z=sQ{RE8?pM_> zBcbWT00+rE`Nb@W^Dscqj%EE)Y)wB**e zA3k;4+kZUu*0vhD5HmPCif&=>-Z7#c&Mkwn@UXl!7CB{Dz;`9 zk*p*69c;~K&gp5QBWZjO2tf8yl3r4fy_H;S$!aAp0|`5oQRj*_WpPFOiZLaX(a5M3 zFH4=U5aJ*(QO8~F>W8u}Vp92O)J*wU6%kd-E}YmsI;=ddz|x6j`_ z!-$=*rOXGz4%~eMqtv4aAfX-h8EoJkO*{Y_)Q^TbqpE&1q7rDaD>kSPC-#we!(xDh z4E9ynAU}qva*Sy<*pe~MMzCR)ixi-rKo3lqOSli$vi!JZZ3a(XFmvkBlN(N{UpQxK z!%TR6%+vuBrcGZoVcO(H)4R=_HoaSQ_v-Gwy7j4^GP7aA^r^FE&RZ~j0%ktCoji4F zx9a{9oilgN^lsB9PnkJk=A5as7EYT!VfN&yr_7u){Zlb!h79O2W&u{P>2cc3=?fOj zo;kHg-Q1}QXHTEgu%O43$qS~>LQV^Mj6Q12#L4rgVMV056KBnwGO<_Bs-C@iPVCuZ z#u*~3Kd#5f$q2JNwVF3-{#0+hD_xam%B<6d zpy>;&`{OSQ^zWT%vW!%&TS*E2OUsC5SDO0FSNpMZ5&uGna7R~B-a^JbRwuH#{qC(oZe=j7?I$i;pvt1*Y;7_y%}W#P$O_11KsI(IflIX~5m`IBcu zsdnVi-6uCR%%3@BVFS$WY>;~)DC0&!Lbaj;8KyvV#D-yxLz#q7k1~e+vEc@$Nj)AP zrt$OjuV(HV$IH62ji}j(jW=vAxac4-nmHzLaZCJHgm72HQ`l&aBGZq5g5xL-G%fRsMZS?GwL+0$U4O|-9;5(FCJcf&|h0M2iE9|kJ zEFVuoXKy3oOv5`FhCVpZXSmJ;nlf&;C_24w!`SKIx#0Bf0)ufEGAKkpM*x{G!|mAo z^4;at7tw6_9zq;_c^*K*I3(iV5*J)vm0-9&PZ^(;!8CO?I6b0QJ<|z|Q3d91;JbWV zA-&&q{Z zdWKK8k~U#`*uWObg;=CM&7+VDF}zfqpJtnI%xKM{>W#@*7`#)1(Fc^=eGv3G)+Ers zSh@t}322o_TSS@bE;FVxX()A7es9GAinWSE6^~IItvFfn6h)r{lJ&@1Iqt>AjeeNo1`f1 z2bxzk^2K)mUplcJm#IK|!ZM0G^p9q)~**OvU2x#R6lIe5``Y7VS#Rh9iX z>P~zM^=agTkT(Z5@r`xm-Tt&~$YGcVOQ)iD( z;v_Sie1eVdh0j_js{=a^E4*VfEXS15-#{g4DZhIryXWg$Hjh8F<&b zrsWGSytJd;cIxiEW6k#GK(%@Anb){~1^c$|Z@TUI*N%DPiSkKxlV$F#^_E0`(>dN6 z4d}Q%aah@ws_ltGI^1Tu{`G}tcC>x(%G)gey(fSC`nI#pz49GpsZtWHiLvW8z=w$N zB=G|#)8yOBQF;M1;@?9SA2=9$%&VP@D@-C$dIbe-uNp>&{t;1r&as8e z<<+vFd}RS7=JE!U#9s|l!4&M`4AI!9z-rkXyH-4{&qX%8T$t9of^`KbW7;sm9Bd8P zqOtV&dO?-;apVutUpVw@WKd)J_XVkOJ$Y@N-xU%CVzm_S}6WO*Ra2~X>3_?`8TIn`S zz*$t6pluo2pfwKfF1{(W6GIvsXH1Fgn~3vrmkoO$hFMQSA8fH%xO4*}!-PMEFw*iD z%M2xtvM4dK3LB;|2^U!Y;th;kC;SlvUc+KDZ`lS$Sb$)PmFk#RCGeOdO5mLZ-f*I$ zEf>CqDCS!UG}PpLtF77u!XQa{9Dx_{*qpI^10y!~;|MgXQ?HD&1jvlQ%d$+pGV&eE zC*11zjM%ENsj|W5f2^ZPvSkxy;bJ127V)L7i4kvLdNwR|Tmw_bwJ>#9q-(H6W)vHE zvyBq&l;~*eB{0JbHYgG_?PEdzcpY_N>I1eU>OoU_Ji)L`?}T$y}p z%b>DC)Ur)<6G*n2uf~?-;q|P^4I)_VbS~WOBEYuT_P{m?8>{BRIz%qT#%yTT4}SV~ z7|Rl-V*>k6IOY8rO)w9eIc5Ij`Iy7*G34k`M~>=oq@67PR3^zkr!(%n*_0Xgsk0Z% zTrd$n2Rqr`XaXL6Av*z&?#7!{oq)$JFvckK5{yUvqPTSw&*>hw?w(AL`IF8G-qh*_Mzj5uRw5#8a$fPpda|MqHMOmvpaACZL&!*Om>G zToT9yxr(i|W#cF-vH2%T;#>H%$hs7A@DA! z!$2nWvwjD9Zwj~&#G&&a`VQ;~vS8-yY3>68o@Xd8<06ir`O_D`k(K=>mHUE3)+3Nh z#?t4UDdIk{m7$=qBgOY;_)ZdWuy}ta&HtFsftQ%NiViiaOKZ+4sW~@Qb6&D$O^1*LesgPnj}*`XXQYh0lS5JZ|YFbk#Wi1xTpI{vM4J+)c?~ z#9bQlw_)RRm@YUO@0T!bmJP4t{$(iib_Ivm7~13ih2hv-8br;-xHPr*7%n;~(Ax|H zM?%*Hr#Ar%Ki{g|a1#wZ=F9wCzMMC6X%IF1cyxvl4Ni6%Xy4ve+=I0OkM^2lbM{st z?$RJ?c0pz}jA(E&-XQw+w!z*A@My0bo3pnbahC>BGY0nf+^P#swiXQEUQK&jPui=% z=Im`moN21CF`SOM+|9vpqx=?ZzTTcNayk=epp4sHipn-?q1Vq5K<3MEJ2t<3Ls350 zeyt&M<$DNmRBs+Y!lSUq2^bfcCj%!Myk;=}g5J*f9MitOZ0ma7@wUd2X>jk1PIC@ma;^72j0c zrua9-e<_yeapVjx?Nuu7qUd}vc>F`;2P$?`?58+TQQi-MogUoDV>*(Zh6fD-h{ZAaa76Sf|MQBhn)jM=PG7 z=*|;ybwKYl<#W!P=@uz+LZ0*miky-s&5x=RIsZ=lo+4-8Nk62>sdmy_bDhYEb|Tj% zCURDt$Tif7oKq*ZQRE~#>HQQrjZRwLvjNJukNYimexh57+?~I?Pous&kJ~BTK{2D~ z&gUwns}+bUoKsfeK!4J`sB*nZZ$oIY;Sc{#}`faA=}HB?)#$YHe`ExR_7Og@@`Zy zWP5Ugdmer7Eu*0~8aksP9}US5;f;Iwh4Xi8{>a*R@rCntZ2r*N`Rxnm?%4cSYwI^J zoU>!|2hYMQmu^>6S1Vq*Hd~VY>65G7o;<9@mJ!>NhnOxOzVQ8b%`t87Jz?3N`Hj!N-iGKMBolOc%t zjfl8*3ix>5eIZk%Q*v&kOaBHc=Zt%siWwwHc0HU{=+H`bJI*FN00bU==Ym)8xox1C zWKxElbn;X%Q{%x(T^XGN^^)XIurJ-6x&upv6_-M6eQyIxsbhU_Hr}i?H3tbFzPIy0 zMSY-e4DB#PWvj^S`!mEd*vdFaMg2&Ao8)1X_Fs$WbJ)t~PgIY?dt-A0x8`pFp$fePfg*DCB)(HNYp_j!nFBjM%D;L`(vcUxN)U z95%*xY?N>pwuG6t6d-}c+Xq`@j%Q<^WTS*>*b;bW1R#N$2VslMal-&|dKwOQ5^~iX zI|7VF*zl@{mD#pn?cpmO4OnHPPC6cukI9%~p6|Yoit6N{*w{;OLjua@v*v^FQ?lIT zd1@qs0+Y22o1c;@eO8ryo=F|O^+?%@|+;#j|GH%FF9+!(( zD{h$4sYj0FyEi#}kQR*$B)+_aB){Zah^0MDH&w81}CG>AQzVwxs|J45_-TXiEd0AIt z_M_>amCFn3_xu-JUh?0w*n2j-I1K)u@p++vy!T|j@Ogc*_iXO-F8uDcVK8|3W0ei> zBeoJZ1ui(*ATTg(nGHj6htUsuyMlx1jI6I?IN~l1l^5dgPFs)RqLTu>^HHFK^sf=q zIlT#p`}wXwhLfPje0iJ9dJyMgb7>GY-``oE*Y5T|B<(fF=IpIP+_(1>>>U7}3r@!S zHNSk@V6O^1+AGKA?5#)Kr9ssE4fftH(9XPj_w8kH7svY1UIjL1ZzJNg$GjN+gu-7E z*rS~Dt-jt;&aE?n2Fkec#-8ZHHt6+p1d#bM+>XsJ-vKCJEAUvp*4SM69zq<4X&ykr z0VsT5M*v-3m56(X-AsfYeGM)+J)&1V^FA`8uVFXvUA`;_%jVnbgnrr)JQtijM?3WS zU--OoJ}+Jm@_k-%nGJkiypVlzpVt7`pzo(vv0jl6FOok_ak}Cx#RZBh70*??Sn(Rg z>lHUEeqZr!#d{T>R21I=@@Ujpd9N{cT6biLAF zB7z>H^i;+9iYpb@D$4vH^0|pL^4&}tayr|^Kr>EH`1M{{56UfDqf=a z4aI8|uT$jAFw5h7Tt8O&e#J)>pHOr@+^tH#rub(?&Lz{H>)$EuZ_N}rxlDNn#eEg` zSL6hUI~;(=J=0{)xJH>)OH5_UN#REv>dkhfI+7!B$lN^j#CTz4y1bE#KElw>=r(iub}U zGWR~kV<&Y>Mi?4R^b>U2w-90D`$3fA_H2hZD%k)sj?$~494AtIhyaT@$+Hi?r-Hl} z7AI5U9hKL;YG;$5EWMm5(y8%GkuGJAS638dGT!rni)7map`AFAQh6^d!M_6by)ft< z%fwNdF4;Jpq~|zJCKrq0B>Q%X-j>wG@?My%1qBb)l`v@E5i6C`Xr;a#M!&oDP_6Xd z4zuxQ17Ig{wtGA57En=t=o|Ah?hv9fo-@&aHxciLt&FF9bO=e_@RprI>A)KheHL5! zI!XtT{1BUXs1AD?G1l37sOq+YyxNj@IZVh`EC~;lkh{Ppl;NQgvNy*~by@1jvRx5YxBJ1|tej*U}A))C*tM;#%kUjPOnb`h-owpSOGiBR5+<;Q_~I zgn1TrZP6OSagmuouytG-iO=o= z%V$BDk$Slpy-Fk_2@hf`;R0e<`3q4AEb9%};KgEv@3c_@wUee{#qz8!3$ULkj3IQz z)(nljJ{sC-=ziiYoMxqjCHYcN5@@44w#bYp43p?d6996?n(+iy13o+KB`}RuJdQjo z%{rhuWu;?zZ)&Au5tEQhJBFpQ(yWJw)v%Vme8=0Aww%2{z>P()ipQ@&)SAh<#d6Yd zJP=ko4lxOnu;+;5d#hL$^5Cq)UINJ_*wCb3)+Qy%A*U2RF==DOB~X_F-y|E3JhUwK z5=gGbR*EMc^U^zkpMHfZd+t7_Wrch-4s*7*Wh>Z0RIrm%mzcW!V)Hv!2SzA+vnBK*7wtNvki>mmIL7i`(g72b+bLSP~2>Ip+1@H!ri{y?Z@4o z+=)PV@hR4|)?PsPvWq9u*VeN`$9uPa%M!a&@%;8MyPZFR%4A@-o|J@69X6MaK8#ReKj5UVsKybgEh1tmd3_ z&AFvD=atl~N!6U6thper`HH;7R#BChRM81~wSBPrEZ5LGz3>0;u07KpO@=>U^2{&5 z_-#)bS9=K^v8SH?M{1-;8N>eAI2Y5DURUUZ`91-j3rUUC0-bGPf%vs6lqWkBan3=w zuz43Fb62~9f$1N)^lbwLLpKn*peQbpu^JRXl z2a)%_&NiavMldssXmGMqLHqW~arf2=JlboH&DmRtxJ!emc?9+jU_^tHeHpZGuLJB= zfk%5h@0`6$5O--1HSfS)*8=su2r}Ou7aNAE*sB0Kd;C{Id(4ZWJu>@IaNH=r8Jn;7 zER3Aa1R5yg_5(#_o1u7~d#EFT%$I@w5Wjq*z4mJjnJeFeh@*PEQZULW#(d%Oq-u00&s66pOq@3I|4{T8-Q5C(ii~q{3YmwHL7LT>6ev$RcXFTz;e8&^gop51Tf3roCts6UPS0|_Lp>5r9*!npM9s^C`G=SKsyr@ zrz_w2@fwtWw(>7jyjb~PSCn^jVE0=}yLWYdtojcq|6#>nDj$bO^5>c6`zd%1kj7<0 z5W|&VCq<6wl=o8{s5nIN2*nYKqZN5wVme;Oh^HvdQe2=Y{S)#PO0QP@iXz8*roT*4 z`YY&Ll>V;bor-rW-mmzO;^@6 zwbJfgxWklo@4^jNdZeQCd)VV_IPG#;o#_06OO;-sc%I@{6t7miR`Djq&5GjZhP`{0 zmh%F%d-shK^~~=Nif<}zQ~XeoFW^wm`Mcfu!I^#XHOp%TQ(jyh=KOlXYBE1Ksmn+g;Kzf}bodu+CP?YP-C-6^p(|Yr| z)@Yr|Y10~itEG2g|K!0vciunQ72_vDo_})N9TVTUq@p+9h%3R@T2cvodF71yUGXiJ zUEYe18v9n_)G==*j@lL9WZC7dX#Ci>l1s+Cl^oya?c}M8-rjU--?vjs&UpL!CDCC? zq^N^-5}I|;DuKNe?D5UHUq5-w8x?Icbsg*WscW+>j+@DsT)u~IxSa9!c}t>0euvlx zPj371#q8@+MEa9(y{8lWePQJ9@P6ABY`-Xd7Lz1WbnoH)HgV1;Q|Ew+AEBi7I3&bN zZEH!SQ(vN5x|G+R+)Hi01{Kr&9e0z9e6m!|ktjV?w3GKSZ89kXLpu32FjI8Z;ae_O zz_|OC%S>oRhhk@6%ppeUJIEZwOMC`f`eiZ?BRQ2MhY0(nmz5;xnU89hAj*5`X6I8n zgyelBe?@ZWO^9|ytl2w=Sh9vBud0@uMDkBras^3_!S=H-8%a*1RK5~(AIU#trB9Q5 zBTK#x5}F0QV>yS|XYpAWmP2|5U$R0o*%boJmwEDJ1OMT`A4C|9EjEkhZQxxQn-F{g zZ_2PR;nEF^@XjpoA6XN}GL@C`ZZ8|GbR?yVu;HDgtO$_?VT~d%Egeducp$TZBSs4A z0^`dtj9P0a5%|9bP7Q)B`5BRvoVJ(({vk$frlSbFYR6{5@(qmGqK-mL0xb^1mOuko zj-BowAiTB1h$^R53Hx9_2pc~SLsa=<5n{)?KHlrdxIe#uI4 z7nkF)mJ;^EUiFStmbjvnca-DF9g+}9$C4^%2}CaR2)V+3@hzGE!*9vx<>`}rOXhxj zOQs@o174!((WBRwdi3ZL&&9HK8HuclyUnPX(&-@F@_e3`f}1&Ka8H?m9gIoe!M(ZT zw03PTd@*Q(d@*Q(`(n_9>=%P3OmSZfno#VEK@(=2A+q}8CVcD{gC>k>m^=qx6q?4I z<#W&zC)*?Y$(Mw~S7>UB&5WapJ@aSA!D01ltBcK%|0nbF*-pB1FUE)?0bkj6OWbkB ze&<((`|r=8XS@-RqhW1D+nUv>nsbsh=f*YXao+s1o-fzF^u@a{a%ALQ3bFmMrLo~} zgoJ8E2Trdm7>x5)fq{DdRnA=tc{O%vsCOT>uX_v^weuWamkT zBks~rng0*ZVMK$IO#~Uzk3W9odB7i@9UTdYz1BB%XVNrh;y;IG>DpKA;>VI z!O2bo?c3Ylrtp0ED(Ja1H1Sv1LzT0^$(DiR+e^32*(-<4m2W-bE)9*8pwWKeF5%$K*!%fPjsWqua(o6-ibpGsSDdVPisB;0vlQ1TUZi-b;?;_q6u+f-kK#{> zI4>Vje4L2R{-nx(tMpc--%y%=rdbbpX94>ER631L#q=$Rkng6n%teCUPiZ&zez4N= zjsoO$N*_rCJxb|uO7qcM+UGO3l*=3>=tWAeP`S*#L+;j*L-C}Z?3Ju9$0;KF3o)bE zNwJG!55<3XZke+cw0pAR9L4#HD;3XCWS^t{T1Ea1CjCvtn-#yKc%R~fioaBRO7VHc zmlXe?_$S4`DE?J3V!I)~lw!GJE5+Rv_f+JJ3iUZ25o;9X_<>*?x^(VQBBpna-t2PgSEWeymd8=V7$rni0GCCBo@*Rj+l4D@`+^lp7$%ZV+e=jX~ zn(u*)Av%_hk&0H>UCRg$EN5F=QrL zAPHMQM_)kT1!@+yXp$t#Fg0`Ha%!!eP!e(enBh~OE&V@#m%#si3_pES;l4rB(k_YB z$}Ndi=`Vam&DL&7th}$&*mjWnX3o}f3}R10Jfk839!Si-66z#6mM{(*CTSN%ZZB>=)eY_VCod;=pa4fuo!*ix8&#!N1w(x=QQ0#6~C$z^0QHt!Q8 z%$i*jGr5b2*5G)=B3u#Nje%RZT*$3pwDx~%?nN?-2j1sGAAuvn> zL6JyWE&5_4Ov0YWrx}jT`b15qn*BDAoNrl6l?6(|B<$G-n&FE=Dk5pM=Y`sA(*|r< zBn^8B9k92jXHq$~r5(X$-U}OBh1K-KVvpcC{>8depW|<&@0r+Bi z_jp0~7;8Uab*Sd6@R0d87Ix>tQLo7p=T|Nqhxi{Pz7AheY2H0vv?^{pV>r0a@?$FT z4GX(tD*W^QRTNCO_UwbnS3Z%9nPcn++fSs(lq!Onf~1kab(*45#|GymaSx;-&I?u#k1epa#1rpQC* z_Wb(nmyasPAnreJetB+^HMcyk~QbYH5bUFd2Jskd}hy> zYYTlbXD&ww!?1);GH32zz}@A4FswS;%wRJ%zMAZUlMMm`(=pkQ#!YVx^mYXYf4{SH z!^07GX{gM#3^@1Tf{RW9!^J7@k+2Fz(A?R4Sq_%XxA!Uv)iG;5 zm#@c?s4EYNFXqg1>ql|S$eS~_7r*>DbMV-1=+c;yvHhNNxIDH*&c73PCzj#c14Q(P zuFCJN*iZ3r#bJuaD)LV!?Mzi<=OTTEBF{zA7b;$?c$MOfitNMG`;p=UijOI7QDi@) z-YbglDau?a_-?Md7dj8;AV2Nr%$L$G@;R4?jxEpIf~HTC^c5=Kr1ZCx{=U+8DgA)b zj}uYOUlMT~UQ#|MfM`$VP{IE|Y5c>pbEk@Jh|rVyIABNR%j6#H$~rUP_gB75yn#Pd z)5&wTkdIaQctv@*5PSxfk7EcCT||)QHR+6EC&ey`ZZ5x%(gPHSC?286YZL8^R6Id( zq9UgqDCgg4;+cwkkBIbY#Wjl3zrg>x(wh`-Qv9ys_Z1&dd|2`4icczTReV+P&x-FT z{#9{@V$9=&{7V%p6k990IsJ}GAE4M(QG7H=-(P7?L(<+b#nFo5qXGY9rB74j#3c2X zDRO3#^g2b(Mv}f>k&}|7f2erBB459ju!UxNQ?G+*#f)OH=e{{r zN&S(ElNF~c%A^M5ye?Bu#J?*>8RH z?^m6X(6p~%6Y@a_eGSK)bL$$cx^!iFb^W^f-Rl#V$WzYA^t-JR&EIVmpI;xZ#g{xL zjND#+55DR#YvlG;OWXbl?;`!lj5u${xqrnML1ukr$2lM1iy#v&+_7RCz6etOwH+(p z{o%V&Gkg=I1D|Zh)6$6;ww`}7apjBK%kOI+T~&8k-4%7wm3+>*Y|G8>CYw*#p6oJi zd$Rq?9jpEl9dgw6WRDM?Ov#E$@376K=*fuf8Jz&C1P7Xp>Ie8GxcmmLHr>!v)}W$7HToaxa{{lzReWr6lcESjNoj4?$PJBskkp$_Inq8K- z?2ly12RwLe2gR?*|y*F_zTGL8z?<=Euxi(mCN(cgMR{Y zJ;{htA#Xyg1w9Ftj7F66fLMZ$XP46z8x3K~UywX2OTLAecqFVenozzXE29nh5J-2V zV~ED_bd|4c@Osknci?gHBo6ZSLm>1>;iiLE;d*RGVT+FEJ57>^kA_R4S%|c83i4@= z<++3$>N(6uzU9gNW!~v3CAK4XO*K9?r{kpcL`r&LZ=`J-<5>&1(6Go z=u#$}DY+$a6Dq~*gh(4FltgvlF#P}LAE`Ftf+;()O`D(os-WNn<2-ZcG zHloeoI_XE0OKq^o(thB>7eZiX!y-$IH!#A(DJw4V{_tzq;D{jbXu(0TbOR$a2tM}N z&>As#PYBlZI2u?d+;IeJV6kst9N5{g7h-rao?s1(rvdf_Zy_8|a-#!Z2gf~Iv5SY1 z&A@96`TDdxqx)ckHo=-bmLQ$h98Wk2TWro;zJU>DiFI=btFe`si-(oK^}@JxS2K!m z88&gfFk;(c6k-x+y&jwYHIRcqABD|ZBxnFgTL|8-OQ4obIe#9}mgP7rv`5LZcqb-d z5cZaJl5*r({Esoh6k+KGXRVBNR&v>A^CBy#14*0x7?*H3B8#wjorA2A!Wx0S1d=vk zmc^_s>m;j#8(&0%CL(FIvaNOjSnOU2vv?^{{=S&SixHJTIs0z{eV1tEOSAGz!Mg^V z_fm%3k$`3IttBEy*~aXV=mTO9Ha4Cg*c)89Ji%<`zW}k;*uAHmpA4TGKLTsGR50Y$^__Y#$S>o48{3VIwvm$Y2_jvBAxcw?9 zKhbri{|^uPS-gxp*B{-A0%)B`#4H?{syzr@l1h4qK*F!lfY0z~c6zWAdg z^9%ra429?dF18XnVoyE&-_S^pGKNp$8}hI6No!8-1e|TMp2PN@D-_~R#=8cczC#Sp z-($k#QRwZ8IHo_cJ^|i0xipBH$5ElS9>YZ^1$r-|K*zbtdotdw`}wYbGhiO{m@n^} zSr6h|Y|b{KrVp4IMl?9tX`p?3+xE!$Hkw1`?5#rFrJ;$juy+6>8k~&xb-q0=I8_B6 z%f}meXKy{?E)Ak)8SGtMpq*9?;*r-nC1Z_Tn2l69RXyX z43*ft!)|^FJAxh?8M2mCM{a=x$1LhL7@rO4lp>C8ftGJznW)O3ze! zfzpeWUZwPTN^^3L<+?`svPKbTnF2+=x2gOdmEW&4r}micIpx1XM1B51#5nT4^8cZj zz==nG84-4OB|?7>#RHYkDL%^G8Z1qHdt{30^H~I@3)d?8vhvpuk>7=iS1O;+g)?2a zR*}pdgMYv3Kcu)t^?#$txjx$co#LOBkHao}j%Ac{94B&|BeqkNf83xuDb4Ex<^2=~ zDh^R}KB^H)k5)WUakAnmiqgMfZ=ur8SG7jz3l%R>{Dz|Rcci;c>2E21Tk%ds>G#lk zOzEF1KCSqi;>(J^SNx0OUlsqM$a!YgpL5W}T@*8lofNw$_E608sUlsi@())Wt~gTh zc*PSH<$OW9*-AGk%6S9+N~LAG9<-b{z{`}+S#g$kvm$50NxQX-N?<(>_MLMY{K2^}WDZRHMJrUHC^9I;QX-=L`BYulXm9|=fp{K z8l1>kaN?zkoD3)J&J#|BljiI(1nKYkdy*)-ysqI>;+KJ?~w5M z1^o^Qy?NR1kaS^U>rKOVNa#(&cSu%?;Uv$S)Cb(z?~v%XM_7}@2z`f#er@~hkrAmI zAh7T7*m$$OU_3EW_;`osbg1e(JmY8sAu9Vb_kFiwpTSo4E_PABt=MxAwcfP;B!5M6 zFznfPcsP`mZ=gYWho?PaE&d1|Z*TX(77hCWSn^WL5=ORzcLgFXoq~Ms<8E;5t*t5V zOxxqH1pRYx%OA(il3PWoh==HZ`D+~EdolhSH2jtZE|l4KXzV*RYz_Hm;NFnoaY8(= z|FQ+)+9BXS8KTD#*yyo2W9bG)c(Q>{sF&yn!bog*S!VeLMrb*BS;iVZmavyd#}cgJ zMZV#&G(1>TjwM*br~8JF1v?w8;gL+mOFib|34^fVqwV>h->|Bq2)2Y15RtvACEX)ai0z3^Dud`WmadO4eszk zraZhMBj5AbX9JQ*=zx7fV!R)-VVsKqnK$hW#m1uf!PgrFBZ)6Q?=WZTtcBC2e_s6> zpX%ow^515;usOXE?=Pe`qGHB``c9+uO9*_?pr3tv?VtVHz`y;0^NAB{M;?JSs_GUr82!S5|9;0O`r5(B!$+B&TbU{6k!b8x z_)mQlJS`T?JbBLaX&Gsi|Ni<-yr#LpQF?GiyPDM{HRq&i&P~>w7uT$@OE`VT-#p-4 z))(JAaL2{opnfu+gMS5f*Y8?n;A}H5&SSjjFF_G&a_QI0u_cgQ&Rx zg~~9Z!O2bq?c3wG8#tFld%n+MC1{rhQFAlw9l(eNC;KvJ-`+j2R|OvJ@o%XsALoT! z8br;nVDGpB^}Pr(-`<siicv4#_>E&bZ&$Rm>r|IRlLIA-Mg z9D;8i*kStL_BR{^yPWrCpCIy|1MzUhVT#8po}@TcksXWrXDBXH7-bDf5&6|Et`7*bJbLq#Vk>4ZAe?sYJl}7c% zK6@zh;h06l=_Qy^?4;O5v4>(G#Q};#6y5wf{{_+>|GyKDS3FU1hT^G;ZeE?^D)m<@ zu2JOpNWPnAm*We1qw?iAgT6)S+Z69qyjSt3ioa5PR`Er}R}^1Yd{glsik$LeIns*d zikzh)U-}6!>?b`{ez2nS6X*?A`bb6TFW`?;TKWslT%Ot z&vAZ_992KG|2QA_M1%(Z<6RGZC-V0lCokk`Q5gwXoj%;V9IMY4W$p+M8iUp8Gk197 zu{! zf!-~m?1L>&?r;|F+E~L&#+)xqIAOOETlX?F_fC7 zI`p!HQXlYRYn-@|c`#&Fn(qRB=;*{c9kmi^Fb^ zQLC;Wi$oy%4+jWu&6jctSM;(b4?ZL2!hEqXHk7D7w^A*7>^V@s|4CS@WaJ4 zo9Nuei(THrGCR3y7-<_QspXMc}87D z)s*TPHMLb0aF=vFf6A1u`DaRU*6dkTU8^Qdo>B4DUD#&o?7E3Hb7z~6iX6_W?N4IW z_GZzwg9i`pfBHAFv+-?I@8m(nsJW}I(+U3eUW zezTxE@M!xzV}8M)AJ+FN9(|XdJWmDZ6?Y2sc(ld&eg^QPa#VbO^SGo(HEq z>Efq~dFL-Fz~*SJGZQ@IU-k*bXf{4#@o~i7?(>lj2HyS|PC=xeM*<;Uk1~dih!)**yI)r9X?cA+epfKGyKnLgH4u#fxnY}sKm2(CkT%RhtG_($9j!Iw0V$p z_&@SaCNx-C6=<8L=wdX)+yKKSCqWi0cP0LKu7i-}vOHUE9nv-rlFr*`pePd>tgHrf z&|asOjr;emgr3bq6R9YO|9Ne&vMay{+A9p$!{eb}znhS@d1&Kg*yDd~8*K91U z3_nK<)^B)Vf06X-_dL=#1T_E&QDkb0fA1XVy=*f9ZJmgL-E+8xZ!wrBfZqy{^~*qH z-B7L{@^PNhCt-uNXK9N;{*mzS@p&~C!ctG3qbAtaG}O`X_pzPWJ|^%;#X?j3eJ4Sk zZNxsr_xA<+>IPpr4GQ!>KMoA9hY(KU7K(5U3w!w(wSfV&Uai}66 z`l&xjak}C~ikB#^RJ=~{2E|(y?^67p;zq?MiMYO=Rs1zEMb~aexqnf5D-rZIrT?w; zhf05}^l@lN=0AxDeVJ3IyGq}#c(>wu#SMz=JD87s4e=)O9<)D6k@s*;+q1_5 zq{!{@x?A;l?T4Ubk5_hney%#3#1nNW-&FU)?oFQCSdHrip@DB|;6^nYn#XZ3VM8Fs2l%A^ zLR~jPXN~t7p5it-}yIO?b?oBxu@u9L|{bi#$~r9D21gwI@oB-Tuy0~OR+ zrs_t*GNCaXei9n+b#WeU0-fks@BAL9CvawE!aA3IMI!!na!cQDQYwvXN_2k*f%h$N z%#6uRiR@*}j7d#Tnlgo&R801eD-wD>@iJscncpqX3H>^enN#K$#J0w<03ZbhouD@eFby1O1WT&^h;yB)jDw^LZu8r&#S&EFx}lO#LK=A6av_M)W+ zNRB3XR$EAEGeaD2eYjVNh%Go_)GekmFPxUV`c4AT3DF(iiW9&aNEaX` zI-}Qw$E*pnj;xQRt(jmRi2cBxJK$?H^{B8`U1tJ~7a@Ai;wAM=umtc4+%|8%{%Sy}j8CYFF$-i%9#UshW;+iSkQc(V8PEU(`nnRf}-TtPmj`+apiq%y_w zAghEQZ3iUXvC`z9VHTqQ=gpih*!nAs`_9%+Jzo=#C{^cAoCi<)sG&njhLo8(xKc&+ z>IQu9elhgveuB4MeerV&x}kQ^lg0-&ZOL(|f6Pm3%9h&1UocuiLwQf0STt zv#`4m2bu>0lD@1IY5L1-SlQBX9!JLG!NA{Md3xZZ79YWa_IAM52?2&pR>kRsQ6c{G zvcc+20wY-N0Q_ODgdWRfdE5^o|B2Z=NILoW10H2UgO#xjg7)r%p$zb7F9p%squ;{j zLDCrwd(^YR%IN0^+Iu))FAXwl?}+d;F7WgO$bmbT`2s_mB01`^UF;H`2_L zgUIkSl>QZGkMa$OLA~|(M>2;QG*HG!KMT=@C@NoQ2_W}_fqt3b{%#KJFHQ-+e$OL~ zKgl%!3FBaof2VD*WwihUdVaVLdN2D_tWMMq?4HvF8FRoq0eo97j}Pk>v{wP)8Q|Gq z%eAz{Apd{i)3xOgzf3+{9>4>AxaMvjTSz?k7{LE1I950xdH&N!%VSIwA1?4j(l`&> z6QR^a<=qr{-ci4w;t<6Viu~I|`4mOgk@P&p%N51<2>x27?@+u~@j*qN`^>*d@%M^b z75}BUQ}I2;j}%>;Jj~xrvAyDXiZZ_v^7#33_fw7&_94}id2^t}T?BoZKL`4ED*vnM zzpC`xO7Bzrukw>|q0nwiVgmXO#Z#1jx?(rQLX~sQJoOofyyl5=9D%&PNJkahDf0Rv zKU-0bALw36mn!yG9IiN8@jS(eiqjRV73pT8eR1FcS15h8;%Y_qoz%Nc@eaiY6n~<) zQSos__EpUHTSYpqNWZH1rs8(RJ&GSF(z8YV6h-mXgQgRVe2$S4WnM3^Na@~+)`v`= z9QCRc?fM5bO561h#AOP-CCXo^c#Yy3#qTKIp=i&)A1eKT;v1mhm_fEU1+_`yG zdFi&LrOukt@|#mbYrfgaT@$()Uk>e3y6vjc%l3!d-@KK0RcOsCZ#h@J@>ck?mTyNw zrEe#DHT+<=z^sI?#pw_$&5@PD4#jTbugITcOj2ZCh0|Xxq|3!?xYtGvOwi zt8ClSvX*bBL`vUIP5xG^)^CSH1K&>YjQ>6(iMbO||J%3RRGxfu%8jWvo$RhE*Yyk1 zT5cYW^$kW~-EWpOY}@s)f5o8Iur_SlojnJ_BEM+5eM{u#CsEhtvKF{)p}+mhdF*AL zAJU%c>%Wo=#P|ST{|h`f+=zVMAe69%R4D0v=z4Os^^ra!oNx~Wo~%z(G8tCjaOY%V zPkOv_>&S^DT*SL^UC%)dd0OxaXBcx_f&ulomJkWIB80TcRxkeBIy4jNRB9^ z{09kF$Q2~HY>y!yAjw|dkbgxgm7^E#0On1Z?E(w+dJyoGK;NV4(seSZtgt-4r^4 zxp-s2YSsjk3)5<2x%gP*2a{_g0a@^?AaKu&SKaO-yw83fB+^7(RqpqS=@ zesR*bAbQT~4NI7K3Ng_cw3;^~OiNohM$Ys}DAeZXp0S#i zwp9*R09hnNuw~uVG0!CHhIJDNf0N_{0t-j$=kCef7^m}G%yC_)EB`S2+dEEs%S zK8(VM1Rngph&W^f9%d}GP-71_(v@II;Hfbh5e-gI)w+P{RMEp`IN}0CSS6_Hf`BTY zj3iK1<%@Npq*d8#{Yq^^D0A^Kx@?^KvKVHhH9@4AaH4 z`&Z4XI)r22t`R+PYSpw!^Q!A6@`H=DS<`vEYU`%LFN!p}czQQ4oK!a*RG5b-L5`=_ z8;e3`WJU7wvWvY1gS_M{Z$Y%6=P6%5t7mqbyzH($S9d+-Yu)B%pWk*!*TG)RI4@(6 zS2M_Kx2kxjm)h$rucQ|q30)VZe8t`T!P&fDz{Q@;Jnh4B`OArfCC3kQaRz%T9O&CW z@N1$?T`byn^?xQ8{~;!*W0%cHgVs1Wll*g-t}QpfpkKd`SE~lz%@4H>bY`~7K zE4u=WpuN@sdwlY=_HIJj=An&sut%SX4K_)CRnT51*yH}Oeso7zdv_zvJUNIAtB~m> zdoqEhjB$ga)tin=%>mB_s~7L<|10!{SS29KW%xN_uzop#{e@fIuix`X<1p0#By@uB zvMIj)iO_3`um7VKP4o44!FhVj*Uuvp3!i4bHt!XU`1<1(hK~9A(P>LxcR0TOB2<;W z^Ag2!MfNS^^WO`ReF$-;;(W!$iq|NvR^(q5>ffvQkRp980U~gD?LVWyz-|iExupaJ=9v!t5yF7 z&A(3RyOrLc_=xf!Q(AnxsNZju79THY2JRpG03x~u!3@RLit_&s^7cx1R>UbG`rQ@f zctUTG(jyedC{9qEtayQ3*~C?fYZd7eBfnnpKE?Hla{M8GOzCG7 z*@rRT7DYJ^K+|_X{%eZ672i|*NRb^d^^z1*6^~Pt^8<1@FMwT?-%U}@5Af;Uqn*Ku zGKK_tqSDh9s}&b0(mTg|D;4cnz>P}ZqIjR;dc}toH!5yYd_j@^McRE+agX8$iXSV6 za6h7+cw&Lgl(u6}c1>}*Dyi35kz@X(^A$N4n>4+*!~u#!6zSk3pRQNpG{u>Ua}~u2 z3^_fZ)Vo@7wc@uG=?A9#c15~KNpt-p;zq^C6*no0zZ!D-P^q_7@lD0;iu9yX&Ko2# zNikKil_I~jPB~qz#4{B06blr4EB007GZ*#8Dt<$8lHv@-3l$T2zUuQ0^Dz+Z^)CGe z=uGk(j=gmMG-EG4&g_;Km2l{>mklkX8u4Q<{qb%>a@Wn5m0wf-+j6HpzCC)$ux&j$ zWaFEr+54{i0N*1WJZxM3>Dl|P-j}^^*}EO~r;O>iKRkwG8*k#BgsYMVlns=35+a*Z z%CG|SV64P^LA(8lV^;V5V9VDk@lL{(L(6w!oT5E;9)}4b?6M1Vc~Yd|#EuW56MVIA!11 zV4Ol01n=d^0ETxOl+1euy}Wy%Y2Gt1X(uTUHbXZi8r8FX)f*G3ntTSO-<7nJB*WJa zt19nL#_Gc&Hdg&~Hz#D$#>6AWM2gGqOy5J`9iPE9i#-=@M>>j_%HdZto^mnC@u-7Y z-T8MQ(^w_}L(hp062q*N|;MHs6a}e40NA(LI;zxn~>?jcg|9&F4{cnxBRgHQI_6 z$Br_(gEbk67M9<#1RPdC^{IO*_0Rje)&B+cEnoCmL#;&zBu=OPHxkejNG)DwM%H2{ z5~dc^$P%sY)M71~A<@F}#VU7H^{Jaj{fSjpe;V~IU-a1$(C0}*-2&=QzL)xJ{pCzl zBXJ`Wl}P-67OZB=W#Bvtj#^;uB3hV&PaGQyl!}EdOwhs`NVKq;V&MaD@Y)3Hz$eNI zT9_l{r{Ln3++SmYxd$WB!fHwGi@{-Ne8}qywWfFArIHjJyoTdr=?zEEng?Gh;X5lC z_O+50_O+6hcE#^jL0!`t=ANO0Ycs*adnQp83ADr(V;KZq1g;}1Ve{yD_&lb(A~C@5 z38N)BoWR2)D}OUV%W*?v#&F>4t`$7JjbVHfmI-6Hg1|$G(KCBQJqIg)#|-m<)DJ_D z!Z-+F8lo98W6D%wBvO8eAf>}jOqx2KOOW%^nLy}`DDQ(XVd^x2z!LO*5GL8bqg+BI zVxqIh9f@VYVXfc+5w3*3h`5AfA@^T7Pf-GKc$+*wJHW-5R0w{+Z`6qJh9j33~it#ZI)e&7b9W9yrJ*BF)cJ|!b&e8m=Gqbuy z^Kx?Yb8~agjCPt^Rb7SGKRZXyLze6+&C)f0;+b9XCg-dv)1z~%E}Bt0WA?0QUT$Gt zkHT-TpHD*!j)8UxbpGu7`=&>Wmqm(~Cl#+qEWR?KcxAZwDzErzS&hDgH@c&~X4RK} zLHd)?Z1}(Qg&6OwMm=n>PXXm%uzohIL!z@4B5h@Tkyh6?Qdn!`c=K-*&|th1XSSb* zde6ZY{k%5VdH!?UkH?sZLuSSSiI_;!o(QGWmCy5odc76l1qHC#WA)Y^TV1BIIW)7AVreL4K)Xf5o#E`3yig9dblId=jTAvQHs>vErqQ z%M@2CUZ=Q5QLbO)Tc@;K$Dn_p^n;2&RkY*RPb&R8#Xl;(qWG%f+lv2I{8%x>>kH+` zyNkdUO1D;QqsTD|>UC7iQRL)!@_Q=wQ5>X5k2~dK6wg(xQj~cPkaH-2dK~y6((O-N zsd$~D^gH0+sr0>yKT`a$;**NcD*m71?-emT6 z(%lp}l0&+`;@OHL6>Yy_$E&%9DfKT^jPGA=R(`!A2Y0CdnBp^v&nt2;hjJOx19D7< z^gD_lD*i{2!#b3=P>lb!uk<63cT;(};vhv1^Dw{dH|8ikPm#kqlwYN2`-@wY<{%H{ zKT_l%4(TTprN03E2cbUuKJZB&@ z7&qVb6MU&Sy&JzYk%%`F6GHgf#QgH(cZ6r+ixY#!;tLbU;Y$<8@9-Al%M;_r;!6`9 zcD9>2ZRhftVdxyU!<|_MosK)(FFYULn{fMtp;-nkz9neCM)4<%uBT^4%T6gfwX7As zbDYetP%PwED9*<>DBPZ}A@$ytUB7&q*OF8*j1-=^27!847!5ag#qLt-x``Wjdb*J- zNQDyQW*bWSKB;g5F9}bs;}UsF3Mbu2K_uZcW{Sw$g0UC={tlUUJ+pKjh0^e*;7P`I zPtgu=(keou2 zU5@!W#Zr>Fv{1q%J>AJNGF(dXagr}nxj)P5f>biQWkVK|`uA=J)EP3;XPnm9NF8diP;4Xb=v885Lp^toPM(kCp4*T}1Wfp_}?ulk|# z45%=o`5J~i4m+3f>hlBtCSc%@z|jYM0-~m#kJAecpTMVS`LqQSv=KMZXiSV?E+ge* zx*v>mB&8Q2VgSzt zIc+fqh6b55g^nUDL-d^5CG||0s`9LtK#RQ*gUiANcy*Kw68S1VOlI>xIRL10Uqu` zc*jMlMfV;&rn>C2IiZrtQ!^Er&h%;q2wHhJ81`_)6L*4dNXA(U&yz zj=`~)XrRyJy{IHTvv^rT@$zu-3a|J|^8w%z_SZ*i%*D3ov3Jb;BZIq_gpSzaNevGV zCgdwxuzFp;neeL9qZw>PryvApw7*d|&%8 zq-`E5Uxj=0^-O56vPqzAnxd1jL;UY;gO$-=6D;?omQJJV$?>7X=An%XQK={s8mz1u zbkJTQ9KjjjaX(TJ*)D9~D-dlSB%N=;9`$UnvL#>y?F|UnOM}eX`!>=x4{h8Ed#?l- zHc9_*(B3%MV|`dZJh}V!ZbzDVau697;=k_3xb~xbJz`L=06RH{88lGF_;W>NJNH2^ zcy8JA%%I)Vmde(}|! zUMDCmK3dRRvxM?9h@d%rn{<)VWl9fJdX&=Rl%A~g`AW}G`XZ$-Q`(LJiBA^x>4ji< zG6n?tPNij?G0-vw1UcO&)MH?~@GK^>UnBAyCq@<9DW0L2tyrkoOR-e3zv6I3Ilizr zMd|YuXDQBAT&lQSk>@Duu}YEu+DYH3_4+k3SEMJ3G&^KsOGW$cn2ha#f2#6NSIknR z>x%jMD)JfSVDC8HuH|J?uX!WBS}t!H^woB6{JX$Ca&z;V>Z{#|au6E$YVqBbVer-_ z_k_1Ll7_FYq=)cLl}+Un_C|(O?2W9)8%`T1>Y?_gkgxX`Yg}r+H$(Z7KcAwk4K5yxWcR-y5muzc)N2 z4ffMvpWkfxKX`ASlXs&AiT5^rbEqh1Z|J<-y`jNw&*S!o-yOE?jeOcab#G|c?k#vv z>N@8!c^^)8A?)(G!R1NY4-M(NghYr2#kYic9Nfr1Aobn^JJh)^x1j_X#0Vv&LGBgs zAlUD={Fa=4%vN$CRl`X#4em~ZpNT)Q)<{Vi^yd<5|LE}tjwNO?~)*>$q9A@BCN zk)MKx)!XDO35VrmjD-ILX2Ne#hwu$%EjRj$v94R}9jPQ&Jh(l;$0x42L2x4-kkKvN zj&u|;!fVbwljJ2NyHF~xC_O-OJ;|Q;Ajv)DOypn_jC-*sxLJ0_8D z+oUleb<|s-zDgsv7c57oA^|opeA9#|B9k#FW zElkjMoR8a>9>HAKi*y8G9U|V8SzOPA$u$BgKbTx2nd@rAIN$dQVT~d%?}5JW2)OF| zX3|(YmoOO-Zwe8nA>vITSN4du)c4KgT0|^vMp%ak-?!^K*P~$YT*EsM1e(Fy8Vdjt z*s!d(>zrp8jUeCPT-Y`cq~E1i;$Es5?f<%ymI7|IfgaXvS@_WX^8=d z;`YVuiaXRPwyh_h1-En-EnFLFD6Dcd#WoGgHNj{3_ZVkI5DrqErB8eT_aH8ngr3GV{PThL&yR%mZ5)QdW}oV^Y7J110cS8!g*JelrBL z)rO5_nPFh?s$8sso1znaI5bv877p*mi}C{B?*hM7RsFF*UFyw81tcsjy*S z%L~v3?juhG9)(_(8OJLQ@CP701o3P{?zs&?9*>I+>koZpQ3#IYFE(SIdIhK>&MUW^=h zf7pgczmfN0CQd9F*+1956~r+be|QCD*{`+-25fL9=Q`Nranp?(8L!H98k7_}>l(08 ziN?S6gBMl$jdCVe&z^F@s2K~ZoVaiNe33_6jK3r}-om@Q4eVtPzTO}FVY~$#)v*^I z+GFec*<*wrSwcr_BZ%gYN<;rR6|5eQFVl%+BJeK0UQ%Xb@Aai1Z5~RtBL3Vw4v_R^ zeUOG*&JUY2v34Bvjt3_Jk@i@xVTeI{H=&|;fMvFjw`L!`YFL~HK~q-`D~oqJ$!B@-H~YzgR~ zJuc|D0X*7EL$vnd$6m6K=`Yp@^lWl9(m{J0V2}Grd+CVQ-t9;;51&sNlJRf*-*Lx{ zavt-b-d^}p=P-i?${6FvUaC=8vFZ?5E<^m-%fqN&2KcOBOGI10XOPBW;$e}n9`>3t z_VPOP{%A7+SvLk^VE3Fw_%lpD%Av+y*5f=qO)Qv=wHIJXGRQwR_L3>blWoF#L&LEb z^9T|*_QK9u`kGJko=X?lrf=Vlz3?9f>3)hs6zN1De}du^MV?&b&sSWmc#R^jCCd4S zhJ1U*4w74^& zU#v7;qs%`{>CsA0PCSzoY!6N`F)3tCaq(()CKq+*ss$NclfkzWCn3 zr;C&O^LyoUjF|LmN{bI3G^d!d{08sapdXTX@ZfWmD$1io@H;D=uPEMC*eO%_Q01RP z1iwP*X-ZcUVP~H5mneUk($^}zmI%F@lz*r4?^F6grE&P=II_>;@k~=>e?~g0*iP{b z#cV}6U!li;#ndlV?5{XnakS!jiW3#5D^@FBqR4v+?X6I}T2ant@Odwx{5Hiq6dzDz zA5Hm2#m5!tPbUA9#+Y`gT+VaoH8{UPbKNKAPggun(T*+2c@DXZDFWp@2g;Ztu$St~ z`3{;MY}y;6SfN;{NS8L{b&B+9lfF{%TE*)X>Ex#T9z_{T1pR>0bR1Luv?3kEr0p0J zJ=~<ufb>n1K25Py(Z0WNp3)N)<-CRdOr_}~XMQ$->Ns-=h(%Tey zvnS2(FcRA+Mio0Mo}tKR(Swb#@i~Wf>~+{$={AZ{#deB0iusE1*W&=?4^fQ29xIhU zRWbg0T%i0#inr@|kx9CFV`G3=_O=OQfCb$Pa-tF{QyJHmkMn3f6 z5u5vnHx=RaKF;A7;PMSulsju~j$B>7y4+n;!gn_?8km96z>G*}wRinZ` zESi9?OHJ6DR#CAxtr{bQL$2KK{$R!ag!5DPv`v`hEZZOIhcUx0NqgG5{MOV!Ct*+9 zu(zkJHyN((pYL{)2kgzLj=Yubq@jd#ln_A)o42?(zp^*7?v=f1t4?;WD8ISvyJa_( zIXC0Y4yW1X^Y8_z@%RFiTgY!f(blkSrQSercW+6MFFrYs$-9lRPhpqOjxJw{KRdYR zB1A*`V}m;&jSUF$=Hjv8LiRgPyllJ?yf#WEBQpjBL*&TYR`xqjG>X?gxSCIFY;Y3Q zzRivK&XXAsJO`?LQNi)Q^VD!`a1b)!C6vFi3OY8(4#a-v={gp%PS!p&>nA3;XMyGN zrf-%KCb|)Jx^9o{*z)v^yiZbw3V%p4i&)MTy&DQi$SJ*#1cj7j!b5DL$ISu zew3t)DlR7Zq)*;LlCR7d>5oYM#wVWunOY9JgAlt?#_rIqSOxMANTqf3NhftQnBx$~ z_Nbx$ zeA(9M2no&?Y_u?hzp)rEY~i+aWyCPHoF8TZ*){r5ZJeHnd>Mu)eY1Y(>QTclBtBu% z>~j6k0Vxa!60#66fLK@0M3EsD$YOfE4Y8=6iG_$5awObn_%$+wahLGVBRnGfOBU5L z!BPW5ZJ-=e=m=)NPo(1sCfCAXuJK^|!Q>jrT*l_Pz6c54XfPm1(0vv(`@EXB4+&^c zQPsgmsvEnb2(u7f=Ul?Ih@Nw?EBkgEh(xq*BHp}V`um7zH3Cm546nvUAK7}WBVOQP zTTqUA5x9dP=Mvt6Botv=j)O)W|T* zMQt*$E093DGZE2HhGDuAHEUUom~R7FNaSIwB`1eZAi-0>2F^)2Ht_U6A9y;iuYf4?^Mna8K(D1Nct4U*TD%nL$CbU2CwQ8ET6r%7x`3ZJ-W$_j31 zB)&>jl5ZA;J8&fI6TV0F@28e5d{t)w@vj<|<8J80D8M zepC5$Gt%C7mA*&i-&droiuL0h4C+0qG)^zE$3BgA*`E`6A0W0?ls~ti+bP{iu~4y> zVyR+(#o>zldrf=1*AXWv%J~g?meTVSFIK!ST zC1bS6H(BMg6lIJS{EL;oRFNK9mSe}RZc_SIMf;xAeM-}XOZ|RBJSG07}E(SySu}Y zHRX4dpZH;T`-vZV6|FxESGWGq8*<`@?hCCybQiVVpZGrCzdG^5(Dv3JhAQ4~(Pn?r z2Z?)<65nX?{)6E?N#VBp6W(hV`frQyyGzQF_9P|kXi>f`>HLH}NeNxUy-E|_U6RnH z^pV|eN-|0tjPGMbP~x*&+*|H)VyksE-|QB7{2tbM_#W2a8~f@TUzxNY+Uw$tFHgsH z36Z%L3@ag3p2LCaY0L;%>RI%o45%iK23E8kAhsxIS~&s0?DIzlAO>i}QNx<$$eZv>Ul1Do(_dHXBj2JrD#*geRa7~Y0$l6xD( zI@Te%Z))zDB-sX$<+M=59+4yL$r~u`MY4!wEy)s= z#dm1Uie5r;xI3BsjFECyN6O_siFpxbb%o^VG(UtLFguTA4rCc}8&c-YtKAfc-cag^ zWziFo_e>|X5*zj&DWW%wdd8L{c|UYgS7O7_FJtR$>abcyPspEAFYP{TjLuBz>|+)w zPe`smh|u_WOK>?cFSg9s(O6mRkZ)&6=c9uw#*uz$4w2^t24Hxv_Csr=^sTKyNMbnQ z(t0LF8e(xh6V--TQqROt~dNe^-QcogeAgH5#{4ZOt4h&vGs!~R9@n`3rslP z2__f5d=$$y!q0+)$u*L|@-SdS;GG_?b`fqt^qje|aSqVV4T$jB6IhcbzUMWXr7V=J z;|Z4|dd@;u_LR2tJufC%EJ`3ejL0t|jlv)dk`maOroLm9BaJ%_MBv>Uwk#iZ0^f{b z#<3S|Y=7EOfVOWQli9g^b;~YhrrG)1i zq*|q*)SiU_X(JVHgZ%71crw}Ws7(NQkf;+yY=@YG$ooz)Vqe5^L>>eig1UTurfwl3 zb%r4F9AIPFKpon&w#Fen9&rNVWJDWiqZpBSc?MC&)65386!(~S5jJEn1oubgut(k4>jq_3lc^3`x+D@y$D^Omt8Gicz;4?q6i}H3&L#O#kV@&Kr4>iV=6B_?{jWPB3vcK+hGTIk6CGoui)TSnYJ+Dk{Y_SPZIJbcDt$VTN~M7!8P8RHKWt)ADc z@$sdHRSzJc4tfJD0c5!h46rT861{)Zs{Ud0C$f2sJq;ugi16#uUHPsO(tKTwo+KVY{7 z8j60^2Je30BKbP`kas46&QiKi>9dsXuk;Y5$0~iE(p5^&R9fEsfIab_!~PX2U#W8O zpF{o~rSBlZ$MplHe?o+uiyg6kbUTrLo(R1|z2hX~O3>S{`DHu_b~12*($4Wj$iGhH z{wtrpG17%f_a;KGRQW@dKT_!mrP16C{L*rMp}l#2v)x-Owoz=S*h!K9F{#%}QO+;W z{gsyU4D@KFzwF~Y;uFUH{73gE%;N+)qDapv>8~laQ|zQjS1RSb6$dH~RUEB2PI02* z6vb-A8pTT#mng1KyjqdIT9zm0DUdEz(sG^x<@^M0QapZ`(i+v^}l>3qfb>!DcrWs1D-v%DdS z@z+PC@~0|JSFBd7QLIy3ptwkJrQ$V;s}$EN-l!=3HtKPo((4sBC_be4xZ+ca>-0Rx zBpn#H%FfU4(JdMa{x@VkVcaUeuzP{gKJ+_D{PrV4gLjf@9=ajYo^K(A@fMQTy*v|N zh8exXo0+*Iv~V=O1@pkp@|nALPMi6_&i)H`?>v8@dzJ@{QfPS4D1}BCc|GKPbxVPp zQ#ZCWH2?9^k*`|2^?GUqR1O6p*6fW)ScijB*?Ba_OcKkOg-M6{BOk6@ltRj(t||8 zPta&2ycdvAicQ=%VtAi(sTyewhB?LxYb1er zIbbo;A4~v4{s$!B9S3}rB@EJ78%xMT!~g=p)NP(C<2SU$92k{g(iA$9z%vj-CQIs> zFjZx>B=8!KBJy)3#CC`Y&U-^Tf4!bb>QMxc&>Gt)B6vfIoe-fu6zWW>`cNb#@QEUd z2=%jxT@ayuHq@C^^|O(b5XCkJ5h}x=!lbGULs9}Q@<^H%l7#G%NgYV@<*<;$q10o3 z?f;2idsfx?lj^GEvtoz;ft2~#+1a^>UR{>gJj%qZXfHpa8=rOTdRK z!4Eg$IiAn0$Ag2v1iqh&FYx+Pf2J=HW99!$3Ti@{MvEC}X@| z(ds<|V{@#M%Bc4XO2-67HsPo&e8BU)5jY- zUmMn@DgI_Yn6pjTXZZf+Sig+BaBOw07~Ax7hqJy`5z3=avP5x!A|KevAFVh^ak}Dc zMgH%i-sOtdDc+!XtKwaX-&5SE_#_b>+OvwkCgPmjqVm5ey;bRLO8;AF@%2IfW2ME% z2l@mwChc@k?5i_*NV$>+62?5S9$DD4Nnv>$Mk@+%Z8 z6{YbDXvz$QSlZ<_A@O1LB(Gx{z{Sk0p%|!{$BA6)PZMT*N5S1QU( zC&yRN6#O>=L~ytHzqhgcJqV%-~Vr|TXf3aP@moSrn0>A zBISm$=jeNC(c6C@jD{PmwKEwaIJ4OF-s_Nho%>>oWp|1w2qpc9f*lmt?{IJ=!}~4S zB^OdPoFwlsL=xl`n@G|>A&R-r=yUVvs|!bYS$XtZhs}35%9!jr+1SVgfqHZ&M8eM^ z7o2%=f<(e&!A!UaEKIvz1@(l>nQrhMj+bfWwFH@v?RADYGP@?1oO>WZI?tw)|3lMn z2pQZ<5Sz`I z1<&4#NTq`h3eLKITS4|TB%F0Zjt80k4*0yAv_*8sYz3=%1~wNn!6WxA#0;y@q7A6q z5s`-(nW+P!J5Dk^1c_wY#7tHwnK+@E;fOo`JbrpPp<~*>R?$>0J;RSP)3Ya^a!%HD zXoN`lgwHvrB1ho+&1tcwm1~T9&O#hmj+ltHFj7vRN%4?qB>T0qOK?vuX-%{u`ciwpeE0bqVBujIa#&jfA6ITrb3iOJNI4l+q>{ZNh+ zW=a#7_mGZ7W37VFNwS_pFm=P%o>>ZQsbi7Jvk_4Op%PIXi%giRjzmfVsX__z| zF^s#_*Xx;@iWqWg76T-(c%DxovUR0}yd zzF)Nw%VcTRMK-Hd3ubMkRJpTD9zFw@z%~emApMOHYtxQfcYk^_xUyVcG>Gn}bFet2 zMcHF&tLD~bUofMpw)VmqQ?kouPnmaN)vUVO?8%dAtEy+rs;ZSatB19~%8(h8=T4f7 zBC<<|jv6>Bd*G}o)$^uejq;+3sZ|$MOvQB9t}~`qbKQe) zRTXe0bv=K|l&<+_N^;ihSyf%DCQY7EF~bx>8R!rF?O^X`Ue*Z0!WTlxu(>$z36cuyT`zkI@n24dNa%k{87I3P~l zPuFo}H*7lmC;j~WsZm~K8rWNxe%{}Rj&&o)e5ra|^x5*T=I#dX#P)vO5B9BX7RCR@ zCrGzTDkdvI8m<68Y=9H&C1m7t2m5N;iy)3b4BF%Cq#uE2gO%|S-=-=15pD(l4lryo z-j})(&%eBtuw0gB%bkm~&4Z+K8!8oLLW7mf0v+6sm2f&`fJb`=^QArtd(^YR+FJ@n z(B6#!d;Du^>-Qa`Z64bAE$nf9R2!^p4H!Xt_rV_bll4nSwD#^qntAw?%8(5uwzUnE zG2X9e^04T1gTUnpC@O-SRA)&L}|ggyQ- zwSi?a;54G1A0C6=OFk8AGwKI+&l!h<(G*|mN)&L+m&zj(3!lc9Ivv^KeW~X0?f_pZ zp9IXGKb(s^_vzE*@g?Fk5saU|D}Ov7@22uX#eRxI6h|mdP@JO36O8ufD=t>NMsc+w z`!(v_tN4&2&wKKpP<&2tv*I5VUsc?rDDxhX?+l!n%%4ZZHC>=sM8t(sta6S|k(O@| zK>u8&C#YO}c937F^n8^sS6r(oJ~rsBCynwpC_bigx+PeS%=v(v<2BTKS^57^`YpwG zl`rlZpOdwQ~Ky`H@#$U zxX(NMO7oQ**TfGY>=t8-X2irYY+ExC2=EQBq^=vG3m6XJN>ZVuKZ5d3;>NDSPVch! z9yukGVE_){rAama%NzEXSIfPld$JxqZv-mm}iV1f;$7B?zvm22QD@4LF=Q$jf zt|by)1jU5!!7@C*%b}haeiYjzx?@AVl7!_YL2Nv~y^^S7JijKLEbg7&!iVRV9hb|I zjM#Uc+*Hnrb_<>dFN&DT&dBXSvW6trns*C%C0~n}MpthU>+lF-vtLrTCxw4DLU?|Q zDJ_8jy72r8S!qa2(-e|ZSs}$VO(9o+Oy7)L_Hekv`83;{m-S6dyoLm?jSQgEVjniV zGH^XJQyyXgqC27msw$cOZZq-4hE`TVGO{bxj73QFX2y|&Y(_2&B&Bi9l~z_kG8Rk5 zOqSRev78x4Nok{OrfJM%g_3C@I1FD7FLc1|OfPi6M=f6Hk@zZeV_s-}tGRI>H2veP zteZNs5%08gSh_g-O0*NE!$#R&Hk^b6yv>BRh~k}Q;#5N{s%K&(B3#vkN<^6(%LEO^ zxvGu55tJ?y>3D4YV5B1nQxRQf0)b{4daY-HbCD>FB3zCL-|-@V1pad|rp6KEOmQj* zgAlQh{1RE~q!I*{izl#{1T2q%nX*jMJ_;u+M)aJ;OJtP|vqKZWl0f4;x8a1wP>kY&T>_TJH0nyZOY>;&jyUbCE81zPGDGw{OASHno;)=JG4CbUt zC1T(^*+n4ZYDpHgf;p)|USMbXf{fc4vZxizNfq(}4*fQwf{i>=5o0|h)9jhp-rRZa zY%uV!*l=x#MIH00i(~#P>{GYvxE~pxdZFv3XL)n8u!T?k!)ElUUo#iejX}NBEDO}C zxr312CF#|3sr7G3UoYvMlD-lK(z3j|XRBI{@=LjkG`v2{wD|5&FEyiZ6JH`zUk58Ws&0LNyRG? zi?2*5UKuXF$}7G)RD7-bxy)bYBEMhuuLGZqcICr*A|iwNe`wO&;)W^V6l|&I8S(%< z${0E#Mi39B*9AK95EuuD;1EHAg!(!q%b)F&$fK;`FN!9SKIfs z(l-{gcNQv|8DQAtlsLT+s1Vl$wZZDe``jzxyyN?4?_eok-Ij%VKyKnQn@+NBRATLA?>E)Es8eKpA7a&;2Rr z^|DGpmdo%n#9;jjQNIlESihEtwtkzC#-XnPm;gUx51R(EOokSS(DOqN=)L4qF+J)B zcF)<2j7{;mJ2+2y&DdbewY0?`|JeNHOnKsGo2*1Uz~>&fBD)4xcPp+}{ITLAijOI7Q50V)>?fl!SPm!aiEmM{H4ztt%$tS0lhR#@pnE9Y zOX+f@M=Of&9ePugo~yW2ag}1d;(bJPxZ-oi_|z|yFYY(g<2lmc|4#X@sQ#;pyOjT- z;>XIjzV=jHWZWNF^8)3ZL>g$^PZ^UQc4G;_-^~(vp9Q zVtd6b#XLoND5=*^aj4=5#Y)Agiu74hf4(A}mZYy%q@$Abt%}yS|2?JYzodMlqV?@> zR+>Ib%3oKc>yq^QigpYrMb8_$Dk+x<$Uu55N#`gQE6RBZzC9n$Q9hlO)Tb+&NLMA1 z?@yd!FJpDEY*bg8ZK}1`(Wc!_~$QH3reWTTWqA!lB0?-o#^)iw!%t_z=1cYMx#9`(6@m zW6_5J6h5C23A6fG;hPs3DEhqU$k{421NV`8mO#44d zi%4!plsV=-UqmV&{InaXTf7zIB#`MprEUpHr};bB@Zj)-bcbi~enlOu*?|Xp#1>ZA zvJI$jBQiAZp+AiEwvYBa@tDKD4X%Rb4V~>7cG7qY>y2+|CymSAqcw46Tq-9w4;Rvz zBG3(QLU5%M$cN*U&=%2iE?QL2L?^>16i9M7VF046$;|{U$2sJU;SmI5U<@Hg6h{#9 z5Itv3!_~FBhzK&LoS4OPWBZ zJy+Kr8CYGLyT(5Um`hG5Ml^HDnc}WuJb*V&2`rY)6+%`k(%0ZuY)dXp1h_( zMp-rKScTvtf(hLFUS`B{nWg19r2A(?oCnI

    cO%`L_`PGWQ5=5>?zZtE zW!MCX7bBItcms0VKE46j?+{;uMOer9S*W@E_&G?oQ~bnqJXXcWK)25E#}C2MFFpq8 zc8%}C`^j$cXNKTKVEhB*C=ovuyU#u1t5JbH&in8eJG#!rDNFIw@hkeipRczSOhav0BrW-nXui=o*oprF~S zR{S$$@2^(;LA0RPtoW-)_jM~?+6z6+ieH5Sc*BbS8Y}m|S@Gi&JmfI`C0gh%v}iP; zx2!lHw%>;G5WO4c_aNDKkxj6?XT@n$_kAnQV;euP;+w$v5t`cFD8tNKveCXX-$y3D zKxnHk;mGjmG{`k{M=Oirt?6Mny9Xh7smKuSHyTd7gd{yCpkqEgEuhnUx*?!j`SkLD zc6|EOfNty4KM&}1pWYnM-Ty!C-UPg^s@elT`<|Pd+%!pZGBh31%Wcy_fi`m|C?&~F znx@Uv3>~0yNi(#enaI$I7K&6rKrIf~_e6_|f{KVfLDZ)f1w}+f)F=2Fb z`2YRZ-sjwNZ&SeU|Nr#+{`bo{XRo!_UVB=5?X}n5=S0Jwa^aa8{)!7{SUJJWE$Q?l z&OC(f%-ouu$?&IQ2yaVgg{<5YcINr%lW1AzBNaf`NEq8I&ZG4JYlVuR7jr%eVacpB z@Db%a%=nmruT{=7kj%{bbpGcOyW|Gt?7?~`vmu@TY1}TkMLEA`{JQkF34FV9c0rkC zHk$NzDd(?@UoR!JOFpZdPqV~LCjMUKq(L$=H<Spqx46w<-NLDeq&-p&KT%!^GqB zY8xpzod(9|)jr7dT_%5gUacbxxZA)t1oGJ}@?EtOGQKeV)4~|vRjY-v$lPui;k#+? zg6wC$$-uYbJ8KwGnHL%O_JH$E_EX%zcLbbe=5^rpvdn$yT zq&eKb%G{rxF7S!8JRI${G7qFXIzHt5obi{X&(iTBX8@B<=E3x+j!(C;_k(j5M}78H z43#02HIv{w2{I&lhLS0ICv0Wk!I<~rmd*bJlofYrC=^1IZ)Nj;0cCxWG(UD}vY%o| zc=JC2WqpcS{mKT(-w9GDW>MW_XQ6Ns(%?K7%;txY1Xr+z&3s6-P2rKuC(|E9j1!p+ z`Ujx$T(pMl{cp~#p=^vZ{ zTcW8IefDRQnUxo7iCLL18!+hfQgyvz^3HI+L;?MaiOq5@C`ncuYMp%-L#HwH1%|FbsNh5s$n!IP z%g#NLd0NI0l(-hksO0Ghp3FSf)YlO1IfJP`68PEvjVgnkXJl(LG?QF|O?q`_T zV%^S5qzr+QsFu+)O;sSH*_WblGUf{YQj3IVWqb?uC_It5BI7757%h`44L2i`s|;vl za<$3Y$mBUD*2v_!2GlaS#z00U&oiKr$+d=)k;(H-tdYqY0~(pEHK38nIsN&_Z7_iy- zUL%M%8nE42Mj>c6V3+QO7HQK!$yP1yttM8Bds~M5-S z^UQ4-Z-yYv%3X@#JmYr$XPxkpQm(e@a1VsH;~os}!962vW1V?85T4HmK6d>0awy2J zejx{BD)1ugt67~GZo%N5xma<9*MciP!X2(&2WD2VdOe~J@E`Wfx&d9Mf>+d&>L*}q zg(o1uD*O)IaZ+$0iW@w_uN}_X1S?-%hlJFU4bCJ{rUB4>)d*pIhg};ZiCsdfHS2Du4p%A&@@8do@{8!wg;YCX-p1j zQNEohjTNqnus&@?Y{1WLM-}f<06?FY=%L6#Woo-Iw)u{*8N>f^$M=|!TtdM~g ziIU99P&q=oB#)o#&I&934*}|L8q!%a)O-QgJKsftva(FJ7mFF4m80Yz?UeN8@pIi- zGfnK6a}>5{R;~dj@x?$e5&J+(T0TKapSBqmx?uKFhT@1QxEMW#kMC8W{&PNsbz4@} zEVU1@&eIr_S+kY=ha{K+*RKaSM^UnH-CbuSts zwBIBvBBL9Lxy)ds8lNEMkikeb9w6olgOO^ydoeIq8_Z1d`6Myd7)%Z^Unk~TgUKf5 z31Z%AFswWaJz@WWg=Wd;?-&@eLhlj+7W$Z7Ux-3KOhNijolHyiFNwL?V5B#Ab}aM( zgOMUSY_nSoCf8(klN|@gV&*vW_Zab^TZO=y!~Y?Y8|t<{jOcty1rp@5$tXT71^<)5 zUzZ`pZ8ksGjnBY47g08Ex4!~G43uPB1&`MQ{)FU!!hhCQvrzc&Va^ZTql=LyGT+W* zpVJs6!gU`MLFitCnZuTn(e!zPVFlSzpRxII?PC60hnXcT%9n(|n)5--kipPhb|s?o znJW_%bcI0j6-k5QJZyi6#Sty>UCr31CH}`?5?bPMjqz!TpBS2imUu#AJT38%{UsJ~ zEp9WP#R?+y3n5@vK5akF?4@46Hp!?ZSg)t-mza!cXWomMG4vaqY|d992r z^mzZePU;))-!vE*@2ny_jCsj;52LL@zZL!{L{ISDw;WqQEOc0C-fi>q=jOt+MO~D5clh0hGOJ2cb z5*n8@D9-)CB*u7uEsN2)nB$-j!lKY>WY%r^06#Ll{71}XP{kCZJ?f$+jY zLRI*`p!@>i9Sxksf^l?y+7)+zCioVRq}}%q+>3sXTW;Fdmx4a>OLBaW-Gs75x-nCw zJ*1&v1Z`%eJ*=UO$PX}p(!OKHr4<}n0r1ghz`E!%DEvifkA0N<;+P-Oe#{{Gg~;zG zpAaZF@()xq?PqrhR1kTj6ws3=1ezTQp;6L)!72nw=0y0`Puf!t2~-@p4*i_=^mhe{ zTG=djHv2sLZiGU?FB0Z-mCYGFn+8HQ3!VKCZowDPA!*O91WnN+uxX3aepdrupf2a{ zlgjy`Th8}DX{G&&OaxW^A)$8QnJ75lFhZU8;~Rv+=zQNhg0w?=YY}QpFrMo z>QR=gw4nM3BAs(q10RwwTFEIyWLk#$1fpmieH+iT0>#o(A$}iXnKsLSVeqH=%%p>p zm$*2XD`l+UE;24w7a}4jn0AKxB?2>VUkPNngstpnfe8hFEBBXh&!#>D?J6}7w$032 zFl^Imb@&*xYFfQI9e67{ihC&d15_pZYzej_aiL0US62a?H%u|=kU}awb}l2P(_liV z=DfEO(`7I+n%+xHx4{HKW96u{R`mgJEUv(9=DQ*w*eV3poR?wO7pE;y8zBzPf3i{~ z5=Odwwi(;*d5na#dOy?Ilu8Y$5K(6jHDkN-OY7xU582?n1@D91ob#z)p!C7Vf(U+=|N40D zmmym!=Wg{4@C`pv0mATJh>!~ZC;Aem>*0+c{ffE`(R1fQiKv{Pt5-;S4Ca&-{uJ(5 z5MjUs!rw+1DQ?H8&3Q(BA4G-0oP&Y4p*CWq=3E}&PztKk*n=-pRt_7Cn1lCW*yg<1 zV8kMQXdN&|3jG)2x^3`Pv%$oarrV=!XbJPu8pbDhCZS|F1-2LiXD9L3zD znm^fV<-ASetvMe@$7JN}3lu>*@>x{oqF|ilyhC%~q#K;~c9!-=gTeeBocBXE%sUMR z({OO!#i(4)yEI1S6Y~djPR@G_2IUW01usIs<=iBNDJsOE$elT{2U$n*QTdruT1#1x z1BCW40*N9&gch2)_cDPpA{U~bNL+E`RW{qpP$6dzO9FvUE~v&y+sJ;4-VC=DxoH|naw_oDX#;UgO)MTtU+d(`Kd zVkXoPw#k%(E)3r&67z!OaT7}km9TAd8X*aVq7`jP%)+`7K`K1In3iA zsu~F29g{ph3nlG*Tg?Yi0nfNP-xuvY_s3^5_2cR?re0XfJn~Ux6|OuVsjY&`(FxAa z)P;zidqB$eOZ7q0DkQ`|`QQ@mHrB-oN z(a8_ILfS1tyE?FuwCN}W{)Z8Z5?+pbAj}s9&^zD6!#O{&7({d5ZXQ-PU{=oV>#z)Ou($KoHF|$%2E6{ zN;SU^O5HhM2w23J{c#rYnGhHm2S$dhJ6~m68V5#(S!Fu4_5)-@ZZm&|o3qhl)Mmd( zMju`Z>?WPRX0(=F-f1u{qZT^{=wfo4`QIeiq8ZKE2eTl{S!P!Qna|ckrSe%s==Xf) zAgiC{toJtIfjacszX7#OosR31@TN{@r_Ne=Q>WwlB)qB9*==aNsnZ!U7;oxyMhr%# z&SMzvj&?!>l^9x&LmN2bhDHpn^~6kS47|N4drr{lu|tbd@fsAE)2p*j;@J}i?X8HJ zHvbGhLowTKXN*kGg<6~w&RV5AoOAD7M%gQ2i6uLJf3^J0ec$0mj>NBb<8*$wuO znAzJ`AlcjfneB!(@7(CmY(@;2clt9cB1Stif=VQ_gqU|58cHU!zs~*xvu7FR_wGVn z?-T-S&LRj~t`oN}hAzry*RhXTdG;~Og+3P3!nsScq-l{QriJqvgMo}@iD}_{)?i>- zWQif+7^ehHi!7_42NR3)IVnrg0?vqeQ(r;GVo2nf`BxhfdHei^MBaXqp(tWVpRmG*@p#e---O3u6}|(HTU7X~j8oyq7zf+sIHo82-X-8Ls|;le*k3wIZjI=3 zD?Er29?rFb_}|KweIHLs&AJ71Lcsp|-6Z-OBn-!s>Oh2YeTRjA=zS!zp}Ca(#PcNj z0q277ntIl619Aw4KN{vHLKHcG^=W7&`{@&)EZk~`)dpA{d7ZT#mYr$*;g^Qf^1}*)JDc`Q6I?%3s zV$U(LYoJmQJJ-b4ICTW)8L&RDvk~| z!&uYU=a~3w)19jsf3AtYA>FwHGl#v##2-y}_)4&So{4{Vy7LmopuN__A4_*`X8idk z{^oS25TnqpG4Z#gJGU{u*2LeMp4U`w*>wiIJ>B8|XtrZ&r8M6i>CQb+xOTmXe>vT` z&j#FJVEh~9OpXb5j<^`o&54sGK*-sX#4URbaifs@f?sR|k9CUsIfX&{LRE$-cphI# zwBMwj$DlRq$opY$+81ezEn52lMA~tK5$|lqa&uSTBs4wFhI z%xglx^csvzk7u$M`ZPv~&-~MM!1No8_{{$gQ>eYuqzXee=M6yf*@K3Lo{4$CK%MMM z490BP*xS?w)Udb(4KQ;fl$Jd#1lF8FSlq>Sm-+&toj)Mj-YhYc`>SB6*;@=4%o`dS zv+S)xNtXqi43mY!560M|hAP)N#Bn}mzyfCuTkui?&W6@!ISN)2J1%7k1y2BjPPkkh zMGNRoI4lYLop7bb_&VXu29xN7t2D;f2}cYj(Ft!csS=%VwZSAh;Tnzcb;7jKtq={W<6%>*BPN`YJ`>BS%fFqJLCW>&6suJ86a8|X7L_G6Hnt>5-asJptK%=VS zEzZAGLzv)WuyyjsnX>5XjnEJIdv8W~cHeN1mA{`srr|$H&p+@Xfr7HU&o|~wM&x;v zBmW>zpao^Y!x_MkCI1@L6HRB%%EG&z*TJm z1tV9G(~%*8G9vWP2Hv9Uon>V=0UZi{1|->C5@dm*Y5?H{ydm-*z=VPq00=V6z|}+) zT?&h+pkVx~Kt~!g5uRj_xu1{P6ij_vpkU;`HUiqC-7LA0?HKX}dmoiJ2fiZ&Lct2G z470fppUqPm!QVr76zn^Ms9E)>yegbf@Kc13z*@4xzefpFcz+SHf|~@5QF!GqNcnCE zr7FCpf|O6dX2OZ=bW+~Qh6{gv1BAp1zD)WLWr3#XW^g-N_?aK0JmSMC{H*rcSmNI) zy!!_DF|bUHdUhy+BE2WH&69!e8k2 ztcvhc6opS|%Ie4w=;6YrHMBgk0P<7#tfpKMc@J~{wT@dE8Ha!uKBwbWMb^W)R``5| z`pAEi%U{kAXnmxT?eaIxvpMoDru(}d zUhR>mp<)VO)dQ+4@)+CmA1fu@R=Ae{DdX1P?!2Fs2q>NMVrL)AZJRBDKIg^;fI+3x z?s7Iq0ftQ4A?L+i)?5u`UQo6fRq7C*ZP974hQxM$N1l1&#@_EJGs63KOQ_8NhypRyYz_+4NNJ_5MV zQEQ+a<}5L9Hm#dLFZ1;7tU2ppoBRDryIa|rkS#w zuVUF&SZu&-=lkr|`AU1IbDh6XIwA%vaIRztPBY+a=W8fi;Q~dC#u@VQB7h6cTpV?N zItyTl0T(&jU=0*5GT;)2pD`$0Y`~??RTTTv4OnhvuSID?!Ft@YTi7hE0>6O57A%4u zEj&YQ1A5k{L(rhJUcMf&;d3z~Tj3SZIl*uvWFaG53lYc)e;zWG3uX@?IwbqZ8LDXc zmzm^qXjUt{5_c88wh6TekLRF+!{5Li2l_ry3pIT1dqKG{qiAg=nkJF~mPIu`L^94J z!6=|w4Fw{PL0XIIG!%>+gu*F`X($8_B$nw#_1^?9+1;}e;H z`dE2RHt)lfRn*S{z`lyqfu?Au<`s?n1mmD+mxdNaYB7@)4eI6llE}~*fG%M_1xl7i z{)XwVXg3=Hhpi*eLwt*dbh>IQ_2qkb_I8LBYo(T*;Sg#ir9#rU9F*D zB#!0A?3EhIi2Q6Fpj9A{GM;%Bpw&7qH?pA)&>9UDM6QGo&OVQV0dp|2i_lsP&5^#H zU8^aJBdeMbSEr$9L}7%@j%jF7qyjQAyI!YT63IYeXE*4$rIEMA0Ik*Yak?ZVr}3Q{u+jj3jYbh1Z(0;5Q905Y>tH)bGBT;X1T=y z>VoSLWM@5eHlR0YCxE1Z5|L=eAO($Fns#QpoG(|3UG{^apq!#j|5tQS5U9q=gs6<4kBc| zjBiS=MR-Y+rTTe5*#`ifN$VF7!;5P$dJyKkV`bAIKFfi=2t2LqV~9R`bjKwC7__qA zk9#OM4t2KV{3fKj2>;Xle}L2cE)w3F-$ge0EtbWjK3iuk*%t-d{rG>Le`gZmyFW5*T-?L;kXQqS8y)KZX}s-JXZ8e;$gyTR=VCXw3iR?>`1_)QgiBe>;3Fg3T0K5iR*+{|XeQuPsNI@J^q zRj<|}-QrQ0U%)VY`XY3>YL?An)cpKacEBhwIhJrtaTr5*B!%R`P3A6XXYF5{SS?T|x z8`bWBVh`@(4L|jHXvDHB5Cby#sbQ#WoUOhAIJs4HB80N*&$K*OJ`Aw32e+uuOJWRn zs~wjb39LIg@m$0l#ue}-M#JDIiE|OS1(zBPTzPWhV#GXx%OtL1&T11(1Qr_V$$EiF z#{ww@Mtea?q$KMAvXrhWHKm&Y&2K@aTI$lZmbILMgK>)~6_~w&zp^lo0w=c>tmE7^ z+=PxaESlOEC_!2u9c!DQBh3=h?GJ2Brh~fDbk)q4G&Lx%IuJ=-WI7(h7_yOp8bu+>9km{U!pf}X}3BHHmw=s4#$T!^1`33MAEDGQ~lj9`hhY-(s6*^CY?*_Q0kNy53#;Wc$oO{%V1?W15 zQ;)ipKonws?l*B$cM&{~W49cEttghd>k*8c%Edsf1;tw8&aVJ83k%)m*7&L z&#pnrBkX(LYTJB~1#49~HytY9gj)gS#j2|ZAAW_ilo|cCW)Wi6BFH9IU*1Aql|ad@ zmYUU#ESRavix5*a12+ZnTrmlDt?bJKZs4#RxXuJ(w;(VKng?nut6p^$?X~`VW)?qu z@aHq9aLxO(zSXOaQ%7wIOj%a!esFpZIK84dW$nEs^yf1tz2sS$_s;Oan*#fg<|igi zMXltXyVu%dRV*s@(RE~H-ZIk%>vXfw7%X**PG@Jnq))(JOjb^^D8!;&g(9fyL9j(XK@zo^pF7T7PGANwBZo*-PL#(9?132BLJ8}^jpA9pT>Nr%GA}xFfpLyo4!c6Tws1QvFQQA z6#{n?{x0E4fhP#lGF8>W??%FT9E!^Yz7=o`dffUS)OL3r+q6TK*Q-suwFe*%v51L% zt3S5Fjm5knX>aq#R=Tm&AmsdjKeoz^ZAR?Nh<#4S2KFHLP3cqU&%M?{60yU#8=_pa z6bh$_GNzsldsLT!YRFKnNTzxu-=l&=Z#ZbEe0=Vm?@{bW?8Xbwm;9mEt-v8mT?dA> zZ9b&BTJZ~$mJ<1}Hs0ooV}dU-!OcFTdb>%$fn{0E>aS-b^}F<}N(}Uu^*Qu|I;|d^ zFEi}BWQOIJEt_PPeUHqt{K91{1JrXMP&puG8(|=ApxjjgXJBh%zsVocBem!TapgWB zXQSvXM-W)YD78^1(jwYgiGEO@z+~O1I3(4VwXiON$gZaDENn#i_K@hyBCOkhY@-3E zzN4*<_A+Kf&Z2wnQ`;Ia%hFiN1nw^IQFp7yK+^s>;P_FV@=qX8c^tO`Y*e8|JYIkT z?L8`p^g_#z^dxBC=F#o|Eev=|eNL6Tv{sv+_7>7svkZF>SVG!+mGI2PM}QJM|BG~1 z8I4tr&UO-hSA7sn%bx;HZdETJq}r=L>>~md|B(FV0_ z_Qya&SyPXylbXDiP3{s*pO>|yzY>YJ!tN}Gpq?&TH6EZ=h4!T{Nkz3lBY*2z6hM6! zbY+xk{*JM#CF-jH*D`#52}03ybP#m{ZN0g;RBzyB;6){PxT}>IKUyR3JD4&H$aK($ z5w?PaaftN_>eA0Jdu!8D+%N^Tt8y0a!_bt<*2U{WOcnA~ABTasoU?f@Fp_z$S^`|k zbneEw(|IMQ^W9*8)Kmne2!Oq%!s-I1rXJ{Uk)jM%R3ne%raZeOh*(ZP-Rj_S#5}3gfnuQW zOT>&XK+JPWbTwn#Ic_rzNI#-kiM!xsCC9uO!v>p|f#knN$2Fa{3ZcIUpL2mMqpu

    rCk%Kd=W4|7F_iV0yIOd6@aV{ zu)8h6 zjZ#@pg7Tu3FtLl*N?Dcm$h}}cB=O>VyXdBD9QWJ(6OGx4fqPNTMqq~dK88{k4bFw` zi_y6Ppa5>8$T|c34od2@_4KzP<`n`P43Ld-dVuW*j?KfoR!`>_((o(43u0Z+=>XP2 z@)tB1;1f*%8V&HN5&%sGI97-0Xd7EisraFFcr3k<40MCU-%89fKjuBel=?9rB&N)d z*@#wCEBu%(#H{pVdWl)($BYuQ+K0JVHLr*7?Dwz&=y+H_2j&9t2VSfmM>E)5}{Rirx{*H{5;wnIV&W~h|hgC>HLy&Lfi+AtS|7B3%XDIL+L9xTJO`*xYvRF8UP z4#<9I$T%YjnH0|IQ};oF=N?k@c&m%m`!I~siox^0NXMI%eJ}2zAY~j!%+=zY{26x6 zyqxZkgB53P2qSxuHDktFAkj%C2yqO~!ePa8W}G{t31Xi%6C~im2jTQW>x?XH`~=mE z8KhCbg_j^fF-nuER8u}NGZt7)`DI9#wHyJIXCZoZn427VIb zBw|)ULFNI>U|dr^!TfCSVxYj3Qy3J20ShDyX2GAGlPF(NeiAs_@I!sbW{wvtY3F)r z1;on}(iq5O#*FM4Su>afb!DOFCkh7rU|4>%(MoS(G@y|N^cTBkh|X-(5%3&F(BI3r8Po^4{K zW0#hy^RrU(URG))kWut!X(9(l<*Ay`d+Ve^W%E@!bc>)Yo!jpr!I@oDzCh#Pm`pn3EiYiv)VKn zD#pytG3{i)a}yv|#0emP;+*Fzj#1?uL5&{O~wj-kvL zdKEG%>aRmx0+~0~A)|)rifG^KQFu+3L_l;?s(@rqH}3%we<61v^bOPbN;^d?bO z=(~#&vY^LP+>fAmT3>{Pef0*at zVmTzwT{_H#m;7kSZpNkLE~s@Ls!L#V3*bpEd}5u>a0Z{4tp$&V_xopP{iQpM-UeT< zbYxhMOIhuFR3bWP!5Tl#P&F<@@WFICf+_gB4%gdp&9stT+sBDKhD%u;e2~#eG{DP` z1jliKmXFWinr)rJU4ERgtaci7VUM`{c!*r~5cjU&E!WPCm#C z6h5DN5`z;U$+rA1_Txlp1|10oNfaQEA4@>~%Gzo$;^Fxp0O09!zaJ;+e{rD=_|Sz) zq5xKY_v4wSQhSoi}ApcBzSlWaGLVo4A*W)@#{#F^hTpg6$!jOsA%iQh~F(I|Y7L|I*Yz`!Jyk0`F>#sLBtttX}%zyl2?r{P&xG+EAF29AiQzU@mgGqwc#EHv~ zGqe_0rZpCLw>p1r2GRrcemMxCc6?Agb?q2pDL4=j*xgxK3utBmt}ZxSP}zjKoCa;r;wASq!XSGDwt(3(5Il^vQW; z0PD($5xF3rtSs^VAM0qUdg`_)PMw9u3a~wo?R}Ys$bzjOMekl}c{3Gf6+`AuFr;EG zi)6Z58hUMN5PCm5`E#GF5PvR5Dkc7?VfgFP4;gg~x^(W-<>NkG`b8#P)I2FI{JD5HU)GU7 zH+|~Ujdy9-jg)kbBX`)ABD?}u9jpqvh3omSymgR2G?`PbuW#^wHk2yDi+71sc+AzTM=y&2aHxIT*OkCIakF z)`M+Vjf;6~$8`}d_s4wL*5vEP?Lc@8*ElZsN1U6l8@C6zt8rcH65&alTP`V4Rjv;U}uJ7P_#6{xCy4`7TKk(rh4B%q>u&>--E&^=VE?g|T`(wMz!bMv4 ziT}6D0P9np|9>3MFXXV@?m%+{)L(P5EqJ1-eQ>GL(z3eF_Oed-CvT0T&1Dngy;kg; zvhIog@rknCgZ&c|!-KtL^`pI0!~G+Z6Jx<+q#Gp zb_4}AGCI<~tiNZ+;P&d$)umP2QL&+^zW#rfCAlY987A9@dwO@F_y0d(_OI{iSW9P9 zXIaz80ID!L!k({QSzaE8tWyx0Ohf&9#9zu5ukURCS2at@@M~;ttE+8}$70>p|E3aj zHMKN!{G0Ml)PB{!w*=6F|E2=eH#IhOK?0iE{!ImF-_kh(|Ep{-Z4tbJ6z|zTw_DU;uF25ZF03 zII5wZzTWt7f6v6!ct0(Ycu(IRM8G5@*&f7dvWdyQzWxD(v9}UOsAp~hOnuQPxMX!(s@_=Ganz05BE&6lsJLH9D94Gsx|4(q0t>Z zLoNcw*5u%D|2X2{lQER5QYndm@ z?!KZFjJ{{B2`uoH?^>l6Mi!QxUcO)%{&jPrYM%_KHDw!5TcH11PAiGbU%d0GtB#am zuQfq+6<#3w06wDT$6Y@S?p?NumaJ_F1bk_4vGL7%KjO<;FJ657Jg#pXisBiqC@;6~!&^`FYwQz;O4lx2 z8VLJ{uL`JzRsi3yTN4b1)+6tkTbJ5%QpmO`l#;D%X~rjU*qsg4I8J66pCQ=bv95$oHjxEVV11Ohr6rtNgM+(3j@- zz$Eqi%eGn+OtY_38y1|l;520R%H^eiuTdL>-0_bSk%sq zE?BhK9*^3SQ9CQTAStVlfNIlu5`A94_LbpFK~=IlknY2LGpGvAS-3X|cYWH)!go_Z zEvQ+Vl*_R+h3}9hRq1$|Do8@ymWsF&r$10#$!}trjAV`)-($gupu(AC1wq>W@jX35!l1FesV&~pR^JfEznN+8#_F}XtHQ!Rn``LU+)!Upo(TG|l?iNB zB3PXWE>8qkB!Vjw!BvUiYKz7JOoxj2=+tCIynm!;$56jDHr_wc+e2T&;K<-4i@O_> zRsT?YWNLUv|G3rA(OnTQ*By=ai?gkzX5&+1lh$VReR;gGGG3)A+zM4DDpZ-MP-UV* z_;RmDo2U>zN#S7=6~ebaJZz#um8&66!(%<;{S~lhhNk+h9ivktaHQ;y4-EC}6ahnR z%cnlE{ zN#x%%g2qghq0aTS^=(_?T^+Tpo$DGpj9|1jZ;Lmz#@kvO;w`mZ@bRQb-gK#~%?%x$ zO>M2#@ZbphMbfZW;++_xu2B1XzC6y?!7(Z-tA{4XEB3|5M)#uk`$qSU$T%4ou(~^& zVwLgbx_&H#NbmYB7=q0Z^oji=Fz7Ip;rkjK9kH||p~^jdaoRU-tt(C$Q)$5_f+83l z(|Vw9ViLyLIPOFJBResCC&uIb98B^43b|KW5L1|@t_)XFhO16J4rb%k5}j_o!n8=ss$>U?oL#gg&jq0$Khg%_xJ6@joQ)b85$bx?U_Uy7}GL7 zIXW7j7zRGk4~@`NGVo2qO$@4u^A17TKb^MB&f>TF)m z1r~09uLbAgWK|{AB-|2J?qJlq+Zus7j}P`)Q)6T3XK#?eKM4u7M3`ILB)dk3`r;G2 z1_vfB3HD7v*QbbKtgWTJwj;HrS5b(&n;TGwlpcW|@1TAZ&Du9QMXlrM4Wn78RgwgN zR4R>w%s8xo%*DqC zCk97$>VE8n%7B(mtzu_Kys183K0Uf(dUWOV=qfAWFo<{dPqs}>j!jLjAKbYsm0sGf zwhMz<^noQ^Jkm2Xkvi=)wPMn#ZEm`tp&l>pc5aNVZ`hp5OxFM+*E0-9avaSNmkxyp z4372zbO;cNPaerk_dlfhW>Z6&cZu9c|t1kQ}X#jJ093jkJ!;L0GlNYh#ZJv@i1(qc(FQk;z{i?o#utoZExskYOB|JH(uLX@6*DZ7iqLi!YG0w7#f9|(}QQ! z6D(^C<8x?7Pw#GPQ#s54`e$G?tcrJGDP7+`V0q>V*VeB18zF@@#sJr5QS#^>l5W!C zsr~-O{HX6lJ9GA^jY*w3CYu|&8Zc3=i#2!nHPgi40Sy0%_<{cMQEQ}sFZA?K&wi~p zT&HGQ7_&SpHCldQW~TQ{sx2qWZceG?{pqfj8Uy<+pRgE-Tb=tSx(0i9YvpUywrBaX_5797 z4cFYZ#ciJoG!QNR_!w+r5p#|vi*u+nn=zF!Q_;C7n!D1Qr8(=t!oxldcGP@kid4)D z2Tww}wzYHanXZk*FmR2Ty-7g;qme zSfRjL*Iuff{gZKewBmGg$Uj!#hXrQ zV(49CDvd$kQfp1@9mLq^@3Yw74Ya!A?wsD;S?877#}or`Q!3+>sWmS3!bHKvm^k3j z18l*eaif~iHpW&=Q4l`u1j7UdqKsnLsvOKPR^@ThoF}uf)jB%T(lfD}%dRF+%i3Ab z$3`ZFVQq(X=~Vv|tZ2RTHqz)VeL2N$j>S@|sORPs{p&6^+u9pi;-?wbInk0Y+#`aV%n;2WxSFr+^$z52wMwjiZz}2_6 zXMA8;Wpr5^E;zH#+c`3|dUbT!z`)cH>(nY5 zYoQ$};`I&9wcCUuwcF8&!c!vIab~5d4ev@!zeVA#qoVuOicEVjP$^4nb18?;XCzujIOSRj#hElHN+a4HaA#J zv1W*O(qcZ@)tEF}(KTVkboSbB;5iT{N4fu_T~#cJx?16w2|USFtB2`HsETBVE~zR{Mpapzv2NG6&^8ceeBa#Ut%I9K_gZ>_6Ky5x z9*3TWVI!I*bjOu%;!XI?QkDe?SFd(qxCT>&c2^r8lwoJvx~@2V$0x~QEe!YCdO83TtC!Tw>0n7X2ohp8O&eKU&rS7@ z^zM&O_73fa^*gq|9@AT$Y=KtR_Fk$(&`=oVvW(GNlXNkOI~C@t)hM>@sk~0&8a7i7 z$0gRdW7wNS-}xM413iQAV0bloZQG%9OS~o42@Ob3yU+ddPo(mBXa0#)K8x+2NL2-| zqotU5d^`zvm4x3h0_SUN8?4k$;UMZ->m_lf(R*w5G{ixd zx?I4?xOnoyFy7o2!D1BL&wLs(5 zb+3bq+vK;dqZVqC22g6#Kpl5z^=LuK#;oCfSbEy`IQO(*KaSby)}0Q`H}UyjGl#3W-BJ?e!03VH~5Sc2<0*IK0iG_`12 z23oNz;V)E@1{dGDanEt2Cv2rj3oJV=u6)hm4PCCJ`ME-NB+MEdbGfvXRwm+RCre#t z@ds+#fymbp!S;@}uC`cPv+xs7ukqWDjACu+x4XHSX&T4Om2thU*8U@CTD=&ayaSa(wjLk4?k#H+6b&IB(i_mp)GE000X8+Ob&uPz-*{yA_Z!(HY#$bC} zN0(LKzhi1=%P8c1bX+e1{eC{kwz2)i640i<_TML8Mui%w;{vi1ma0gn6kG2!TCt7_J^%S;q{K8K7I%mC z_G^buir0eEF#97(T_!S-9x@`_-rc!g7V`Lb#>of$%aRX=^}=Q{5^X9f%QFCb^Q2X!XAvc%E4VhJ z*MHhXRaU}NAfCv?rse2sF5IVgrZ)CZcId5GZ7<3uZZBt83r6+$WHjmQ#P|fId^~QP zSZ2RLcA~J}Cx`e5H!!ifV+G8{fUzmHn9A%uebwCkPDAe=Pw?EY?x}&qVFce<1Ww9w z_@c@SB@QAa&LJd@AtX*ABn~00b_?bjaZszimEK8?+-WScl0iCl zZ2_GsPIgillS^;V3VJptG$obh26nh-2@9Q45Id2)Pk=gyP&K$B|%HIX>D zxytQNZygHv#ZsDOj0111yKx2~6b+GssV$|&}ysiSb8i28o8$WYQ{1;4 z(My0-f=cbz*9%rz|GJJcZyFGn7=2^LgO(aWud}$;QX?u)6;Wk*qZC~@ZoG%S10Oz( z+u%Co&2Z$FfOHs^^f*0ok`q6*f|zZ&kz=+;o9a{NBZiqUmV*H zWzxBSc(@;O*^3zwDY->F;>sNM|2pOLt{hX2PmSyzp?}Dz7Evki^HM?Y5!b#xs&Q%W z-G8pmbG3$qzHgEm%T)?&0_SE_T=IavIwEK zLr9)j7U)etb1I8-rMElG&hP+cXKL}fCR}0};+k=KnPR!UVfkio?)@8&=z2`@J}ts5 z6DED?l&Md$y*`Z|#;?ssH~eeUXgk<1pkkQm0|ii1opkKEhM8y9Yej@9){OjVmdqF| zvL9RF-;eb*w=oGhe@~5IT{Q?7IQ*3EzCTZ_^clCV*BYK2U@ObN;*fzZCw8!D4F6{0 z_@XGA4mo;Ge@z^ons^IO@NgfEeoqLt?3HT2n(&~scs0`-4PD$6ritU8!J_oye8+C= zAq=79GH;1a)m~&-R3Q)9DR57=$xeZ3u(6>by;9WYoursO6T@(*>iq(54jvc;How6sNIl~D}IhhH|K^j3E%Iv=GPVY=hlJ!j&T{Cu0-slowU2QWBZoLK= z9KSTqvruOAO|QSFw=bo&5@MNR*UJu2ce`(y**A!jYu?&b64DfBABtx?NyL24GDr#h zc4#=+%N_6U!@j9(jF>(bCC7m}wyOtAYHq?NTG#9p^|0pqPT)YIb?La|3 z$%bPpI&YEE-KR=uYHaQ4x8K+)a@I-?Uuhw?#)##C9%$D@7#?E}4_C1luA0_15(iac zW`HO(xO*s-&`#5y-D>J;iFfQX?o5_nn+l2Jk7#yxjm5>EX&Bdr_U0@1s4=TRd(}P8 zap~a5c)5QV=|c;`ha>Mbc0NQy(+SqOzG+<-9r(uhf?okUVFU4j!GTd(5hSk$^cb$M z?ZT_RbS1UYm86IBm^5(=)_@yA3mY8T*MzDp?*E&~gcTMU^qe+w{LC0{i8I|Eop15# z$~NOtmB-S7h^?LeQRYge7JYgbih{RB$}2ku`>C!DOPPa18B^XKkNxNiXd zT+~=ECow4}6p%NadR?2^Iqp6S{GnRwlTrlgb^ZGP^rnL(@EQ1TEC((9|3r}z>r?Ho zO}G-eVx0|LSp4H93Y@LDo+@`ZnA*F#&cFZQS&y=bmZW9nuvSV^NTxYWNfnO6 zw@@b9r|zB^5ihX!9)P^q(ZQls;P9iYF!`#YKFDDCED;=uk_DT1Z>F)Yy)&13LY>BN zlea;9`{pdUDWtZ>y{c0B!E#|Y$a_k(5loEX1r%=636(l=1gtGQ|g-(J1$^32<+IpB}JkHOU`VfZovZ38ph5|~xS zgJULob3Du1 zp$|$-YUiKc#-keWww_oe(@6hhw;1nPLreEo9`4X`?Y-jRI%deOjqZW(;oW7dqb?FzTD!y!d-d5ZRNh$X*L(kn{>XVqHmPE zhP_B<8LTyP@`5F2N4>^cxWk;nqwhs>bJJws-S;V%y#C ziEa13C$`=Dp4j$NeNSxrz+Q=4w`IF_AD-fSV%t02ZCr6O$s9g0zK8y7?H+>>$@3r_ zq;h~PvHa50ube||Y^uj09Z%GK9)rX#H%K~#LaUklq~uvR&-$b zUWqYh`zOVvku)FY?K?cua-~N#ve54NE2X3n1Q*tu1p7e$dJu2%PTDe(BwHY@qKlVCb zWHSTSbGS?=0^S>fNr$BUI`O1)k=P5wz9|nzo>B=;Gi!=-OwL)QG>ngldv3(r&eNtB zrz%;GV!GnXIYxU!>_>-P|4E$xeVVL%Dlug{jQuU`RO#B!zO2n8#kHKgvZHe*fwYBj zOL6hlzP_QOwpsfUrjNruA(k_VA?wTLpOhUli%FeQI@iZE)qe0MDSyLF$e}vDdSxRf z&+zLH$Ok2~iwZVm!XP$U-t0U2gx8bgozf{DKT7EkUa9Z%4<+;BC~RYQ={w!j2&Z*B zCSGrSqg~$UZjJ%{)(f2<?=5IOKK(52ms>sUaGIB{F)uSFIUhtN zdNy%WV{04EppWt6kNN`^`khO?c)}MOXteL??X@;FwZdb-Zt{zye*$@ZQE(HGIH%puWPJNM0&iu3j0pLm~%>o?d$uc@g~r5_VpCv+Ic+6R(ab)7pY|Q;s#jX6uOhgswCQ9r z#az>ebG6ZyeCESf)s!al7BI4HVbpSB6>rXT;cX3ByiH(fEzX!}t9tVLu6mJ%Q^TIa zz0yp{m>$T(ugrCFS<$(^tduqRw7E{|-5_pEx;sV^HakWVHakWVuHxodifw?SNYLMM zD$dO3dU)$Sb!!|uEUp<7-w1t_y!~eC;u}i7?Y~nPlV*A1?IrZ|as`C9!toZ=8|dnj zH@M)qeFn5bJtkEVZeUTN=+*x_FM9b)YxtM zjWzxHs`r%|FH66aqnu*U(hCvkLfck$ zm^sVm40h)O|4~M9<(l&}Y*laeAy03so?>klI>yN5fg1R@HYNFcPI5Ew94UOCZO!%C zM2p3$6RS{Ao6q;?qYyZ))47?eBt1+L=Wii)qL`D;pU4I|Tbs3lZ&$1)eHL3UrDY$= z%-BZBbZo`K0Zt`+V1(~w;%fl$@m@ITVm#8<-apdUxmo8;zM_-OTA&l3us|t@etpra z=f;&-h<*i*Z@}PdHi&h~Ft4~7kxu9m zBuQE^$=lpmWZ@$a#+hV92QJ`V{7>Up?40NlzWm#T7fdFi*p-OlRo`fXdDS=CuDwO0 z;}d88fADrNzIn)xx&H${{KvL~Ia%4>$Nc#{M1HuuE@yVlkxkPgiSguz(BDWtQIpRR=Ck2DHTNT*avvXl z{Jkz`QO%KX&08{Ru1>GHCRB56TFqO7HP_iS*E3OVPWk0Ii&$s($8aj_uNyz=UYnC! zb5*eBh+Xp*slA^b-=ma&-{SJ)KU;Y1GFVpBCB}0Nt~#`x)TuMGM%Su#hM$HXoA=tc zl{9SOx*1D>cYn7dP>*sR3D&&DuDP1!>?P&bYaWnxs>NqAQ_KBYFys9349|8m!!xN& zDYWccf7&Que_FP$SD%zPrmfFGW2=qq-XuAit}pz3Rp95_pj*jb4u=03Sora4|2_Q1 zxuupOn1&a&`QAMKdtfL#y(JvT4CMt2RG})eXRA4Cu9{~@0t=N@ifx$5o*j5jj_c`x}*X*r~9gC!!V;2V;@ zj-fl{jn7mG`f0W#6B)S-lTEkec-^(HMRD>TK`MvT)0N5b)1ALerqG^6T?Wj&@^+*9 zHKjyVad`98A5}{*d<_v`ub2g>_Kv2?vwyoS!4cTx&+mChAzy>W|A{^y83ql9l7BnS z7?m8MrT!y#f=E4+psD!174s^OZ;vm9L!}IQAjeW{ccByKlsOcXNGNN!a-C4hB8ZAq zgkhbas4^6Zf^nN^`kMLKa|zmL*t4Km9!X>M@ii#;qHy4@REK+Z?7$~S{IOWY`9XX< zYGfxiT7BtH#=xQ5?{b8ev`V3NJSumBh7@Ih|*rP48uzcX-U;Ceke+9#>`?gGyJ(SG2Ma|^!no%p?|?Su<} zAq_9)*MQ5Q_rt6Qc6nbY@Vf>4T>Y{X#4f)lQ}~@YMSW*r9Qx(pDbP))H_}1pmxH@}`SSmO zy7``-!tZb3SKwB{&=Fji!tVt5F<+RzsG##tMc)CQwqQ0 zQ}ElC!tYrhzvVuDSEle=ateNjQuw{>``wztFXPV%IauxE_f61I zUh$CMdhl~)i3m6R<7wz97w*pu|85#Omj`Lx@C*drNWR5ykgjSPx|%cG(k1e(pN0-7 z@8^cQ-yq$<8>HL&2I;PSgLEH$gLItt-bgz?Fby5kxj#h9?}rGueN6=AmMQB6#FJkuE|*_nD!)PegGqN#`S>}Y z^S8^BrOK*-4kSM|qs#A%6n@tXTh>c7IL*&3YDo&e=yGK}3mWq4z~%C*GW^O-`u~T$ zH-WFBI{*J??#*%u5duU-M7Tg?CjS{Gbe(W;6>*jr)bDr~@ z=PYyP%-p#%r=EtFma;*#(H=iD0(y__cJTJy#OCSE4fr?p7wBJKeOWHISpokdQ(R{c zjL^Sh@$vjy0zG7JVIFQve&slv_q>hea^oA;eZ@EzL$4lrz0K1jafpj=OJ2cwMW$ok z*nJ*iS#B0S>_!s0({gOWM407@6X{_oY7(uPE`0uCU$(E{_3IA|=npjdC2^HROEW5rGl^vTgN*(~aee=*Z>b**=ttw4 z41{s@B-!4OK>E-?`cP9|qJM@4^m79GIRX8gfd24+{&1sT5Z4+W4>1tNt9q0D9clEV zajlW@5CdVnt~ptMw9!wrDp&4_EsU!=$@*iBexjGhCX^8hWA97W&kgvK8_*vg(C3Of zv4yc>PPR9}*h}mM6B5b@g`G(O{YgeY(LY=qFhLv9}}CGYGcCA^g#M_vzA~g zXJQxW{w<8xcqiMN;ZH{S#{|-kacZPt?Hv=)F9_%tI33d98W$^wfPP^>zc7$q6i6=$ zq!$O$iv#H;f%L@8Ld7tyPA1oXrt=M1u=Sf6uvZ$;FAb#63Z%~pq|Xkd&vw2m4USni z=}IR3D+}bG8<5KbGFN(uEo@e5ewiz+#1_Vt2-ZKbe{rRg*urMzS zlHAuhS2B<6eX$<6Dvu6jkiCuN@w_mR zKiA2^8lST5zwyox$y~|x#qlyzoWCc@g~7M5);Kxs{$FwB;JGNihwLz%xQih8 zt)~C$P~R7toxi&De{1Q>+PIqcmWreZ`(~(klzo1ky^k>-$y@OBU^}+Ex$~pj`#pFcL3cmB*8_x2=LO#) zgByRlj5oJ`Fs0Ks{@w#*(5`w8nt9}*Uzc})cxntYZNKgTF-AK5GQI03dUSCYh{_B+ z$=SyGUSiPs77_c1TehLu2l%55bE9y#zrCQN`*+_XHM_Wv#50h5ZwO<%x@W}GPX0A% z@E%P*QZaa2bWq3Kb=_5Dtngjd4=Qfd*2XF68JrF=t{gyoctc%bWVQXaZV%AXqhap zr~R%iw87SU&?WY}|BP$wl^1e2^+2{0Ih({Heu-Ewt{2h7PH2_A22MY)+;axO&j{l^ z8STXNL&gpA<3p&f8?8W3EkynsBX{G8+2}l7+E8C@+&le`b;B z-)s^WW7%$@Q&3NGh2uoY4(ku=Z`xtIJ*UaIN&OFh2f%bjx?}FY4J~t=e3l3Qr;=!| z(M4zC_z180EXDs6}XyCF* zUr8bzP2yxAyDFH8EPEZDJdp9=A><~(OwFUG_=agBJgc#3$s_)YPA@nZ3Ek>|to<9hLCk@tx({!a03@j;RI zeK7r(;xpp!#6OC!iGLH{5kC}p{!BY=$TD3#KiSxz9BJVR}IW^*H@nmtmc&2!+_$~1= z@hb5K@rU9L@n_-#;$z~k#NUW7iNC-^M!)!dG5NOmx!5z+#vdw<5sw!6{UY<7Ag&Ql z6)zO85`QfIQhZ5#OZ;5yiHVSQ4;9CVM~jQZTCrW^{X5KenaKNZDDM;>6`vFTB7PvI z;Fv@GY%xdV{Tqxg5f_QIV!L>@c$v6O+$laPJ|})4rr0AuiZjHSVuiR&Tp`wr zO=7#aQQRb+D_$giNBq9HRlG^OMZ812TYN}-LVQ|$Ui^djn)sIZkr={4iR}>)dx_cN z05K|#5GRT!h^xg7;uYdf@e%P^@m+Buz7S*iGsL;#Qn5kYAf6*$B3>i@NZcX*RJ>1o zSllf>Ej}l{B)%bjAbuv|;;8X6O*}vxD&~u&;u3MSc%gW`c>7_&f0vF}0s9udkRR z&Jvf2P2wi;QgNI3Q*pQWqWHG>FEK0ImN!A1B_1!X5lmY0YFmaMNTU;tOif4#h#M{Lu#5ctc#n8dleztgo zST3FOq?JdBhC{~5F5l(#B;>&h}VlRiLZ73s4c&bI6%x1bH%A*kytJsC$12i z#SZZ_akF^2c$Ij)c(Zt$c#rsm_>}k?@%Q2@;@je<;+JCT5L>^VVqbBPI7XZx9wAN_ zOT-Fsnb;sUiyh)=;%4!3@hb5K@iy^Z@#o@h@j3BT@eOgG_?ehK)Yk6+v7b0V94<~0 zj}(s)XNu+G60uHPBc3d-7ta}k?@%Q4(;$OwL#oi-reaDG&#ie3{ zxL!O@yh8kexKn&Yd{%r_d{_KZJZzLL_h@mh*esqYUMyZG{zQCG{I&S9_>TCc*n6}s zXRtV4JVsm~#>8gvOz~pzI`JpsgW{jWed52wqA|AIRPkHlb>i*fBjWSo8{(%T zAGX2c<6+_qajv*TTqS->yjuLR_;c|O;y%$CXYKbDbHpj)Y;mdBD4rpHU%X3vLVQj9 zmzb4n%NZ-q5Ua!$;>qF`@jCG~@qY1F;!EP+#m~gF@wU7iF;AQ!&J&l2t>Px}+v1(# z1LBk73*zhIha$h2Vt-|d1H_Ty6tPV_L%cw|QoKprDZU`SCcYznD1I)6CfM>15DyUt zi-(J2#EIf`u}nNptP|VBZ-^I**N8tB?-rjBpBG;f-xI$S5145EJyaYe9wE*YtHf%t zSv+05Q2d^Fvv`;Ii1>{7vbb0LT&xHw5H6c>mmifhCT;(6lb;*H|%;)CK- z;!EP+#E-?)eCtm?ai};!ED#rnCy8st)5HtK?~6YY?-8FA=TElfEfrUZ>%?=!%fuVS zJH(%hd&HN;ed0gG%qi-3akRKttQOabZQ=&;Oz|9Xt9X-mi+G2)OMFm#R(wU=Cw?LJ zJi_`nNX!vOi+SP{ahg~pmWj*6)#7^bT=6pTM)9ZOqvEsTE8;%!3o&D=^|QY?T%0Tx zh~?r^v0hv!o-JM~ZWV76?-QRCUl3mxKM+GlT7R;{LE>1kSS%AO#2WEr@lx>?@eXm9 z_<;DB_*?N!@dMF4%KFn!94w9z7l}>cCUKkifcT{NJMlg7Ut;Fbww%MoNn(X~l6Z=E zj(Dkfi?~aCOngQBOiY_*%gGjpixb6CaiO?OTqSN0&k?T`e<Jf`PjUeXdvg`PK=BQd*GfKD@&%H&O5P^<9umjf zhshp}^SJmV3HvWd{)6}r5kHwQ`YGZ7ailm_ED|fkMI`F8QgSPa@;8zP;C>JBEb`;vc1qMo;sXvh1M{&UGsN`9V% z-tWbKh#!gR1xP;w&R@32k{INer{I!rINp^^sVAfrQb&$>^KjJkCMp$w9m6fY3Bi;s(MiG7N#{t@Cys?}*Lk@MEk>Zgg z>=a8rmV~`(v4PBSoVDV~B=k=up?9w23ngDe=HPxCa+BlSF8MCWzaf$TkBWa)@n0&w z$4s05022AfkkFs3_#+ixrTCK+ze4fflzg7#nY6WB+4CF3g+N@ zB@*&6l8ePUv4KST1(Lrl`Burdi$5n(kLM--Ui?V>Ogv~7^w6$3;zaQ%a)jf|5Q|9I ztB|~igdfYr2Bo(ueVur&c!7ASc#U|I_!DuL_=xxn3IBdi;+nu8#aBuA^N!^A#RFzr zy*}bl5_;n#PY{d5Qn5mei8bQs;y1+air0&`knnFOiF5K@;(a8_eO&3!Nd7H}c6(Xz ze^>nbB=UbOrk7c{r`S&%Dh?M5#1e5aiE@`ot`nQYQ^aqG=ZN1XQIGGD$bYTkZx(lm zcZ*MnuZnMpABdqj)?P0X=g@t{fr=kV;@ohoI7RVAB+i*i#VQhO^5ev65`L~Fu|_;u z>>%OynM%Jv@^_T}T@vkntN3%pKPEmyBL6Fr-y%`Y$0XJ^pNo;XHohMT{r-}Ni<8Ad zvH;I_6Dt*eB8hw}B(Ig+E_oA)IrMCCv(hhB`ZbboQ2Mk~N0k1I_@ekKiTdm% z(MRuzA1eJzrDv2Q9sczup+7+KU=sNzi8GZxk3`;u;$jl{W0LE|b`thZBj@AyhTEEst>i+?=i&q6Q{*Ddr{bT)zmu^45ArxX`#}uPv+;ezBgA5I74GkqyojuIoZ}_e zksEOTvE+5+G8~5_pGUT09V+=sGUhnfNZujdFYXclEWRUtA@)F<(Eo$PVPc**U7RBx zC)SE5i)V-zidT|P!Y|1`B7fmHKaqSNx!ZAmF8OKl3CH=3lV!L>$xK(tp@%$)7%oMZ4 zsE9+Y(Zl5+LrgJ-*p}k%IH5O{!V;J{ImGF_=)(1*vGZ`4-^NAQE|Fx?w5vNvn7{{tHmbqa`AiO zE#eOGXX3r$Z^akIz2bY~C*l|4!6EDKq2g#US1c4~isfR3xJGOi&k)ZN`J6VkKcDMH z{#<-ad`o;sjE1eAxxW|s=KfxAyy9nwMPivaPdrXML0l`E`+8yLQps0{yTtp%KZ~!6 z*%;XLyT3Ss#Cg#eagun1c#K#qR*A=n{Jk#ouMiu=wPL%tUc7)j*m1rsULk&8yg}se zdZ~Atc!&6~__+9#$mdK^{{`_6;y&>o;-}(2#Z>I;%-2IaL_AE)5l4zgh)0V>VyU=T zJYHNb){1T7DdHL8S>h$)<>EGRyZAFQ>Nxj`kBCo*zY|{)|17>Pekgt_I%(EkirAkV ziuqR@CXNt~By${Rx;RrT6OR{96l=wLaie&K_$~1gajUpZyi@#{__+9__>B0x_y_V4 z$9a<+f&0xxbN@BuPb53(Ha$hm6tl#rm?KUiN8|Sl;xS^eI9FUC9w(k4t`VEXGstm{ zbC!64_-*kD@%!Qp;!WaD#e2k`i;s!F6JHYlF76ZmDY_BsM?}mN4<)fa9xRR!$B0LZ z$B5-(g%}fS#MNSxxL!O>yo|&;`AYFR@ka4h@pf^Sc%S&V_@wxZ_`LWAS>QNtiT@Bk z5}h74Jw@y(_7)Ej4-<35k>XL}46#(4BQ6vdi*;nN<1~mTiyh)Q;`!nh@iOryvJ}tA z6YmgzDn1}SEIup#R{W#*s`$S6v3N*^wSSmcEY1=)kY$c@x_FLwzW6=y8gZMrUHqAN zulTU|xcDN8^MXH#uZw>d{~>-PVz0%g<_hcUy57+kNS zswTa^I8cm=sG3Pf6%66J;Z$*&SRj^&6(U?R`b)%R;&QQ8tQQ-_7O`F2B%Up97B3RF zh?j|5#ckqt@fLB1xKrFE-X}gJJ}T}JpA%mY{~*31{zZIO{6PFf{6ciN9%cWC5iwKD z63y>!p=Z|9Ab+RKd?UrNVxE{U7LXXc5xG# zgX;+5X7M6%i+GuMrFgZtRoo`-5O<2Z#QVgD#7D*5;;+OP#6O6yh<_2^6yFx#6+aO9 z!)n$iMU04@d z+2UsLBGH_WV1BxqGPqUTChj0HU+olkiT8=SNz7Bf68DJDiLa0tmwyr8Br(q37T+Z? z&we0&LSp=VAv$5m*=T>!{2mhP?o7&H7KwQ{TkKC_J{~AW$td;@aU?ku*Z;&k678EW zP9@O})5HQ2^LB|in?!r?`AB31nTP%nmynpxmx;^Ce8;I3>q*S-jbaOl_G=f{lbG*M z6E~3s*q_ABWHGM)h+9Y;2QCw@B+JmB;#LyJg>B+?632&I#2qA#6FbFS&sRzGV@gjD{WpL_zilJYU-yydpFfl6pN~lNO9l=!A@s)}68$iqMEm!G z4YvEyB-*=y9OpPcB+jBhvnq-(Z^Mwa98O6Fo@-!0dHd}HznWN`UApdEUxj!r2%%^Bi zGfyJj%#-7=9#FcO=g__m_cx@ckZ9*D$=M{@J1RMcM7!rn&L`3S<&rB%^n;n7U~f6) z0*rU1w~*);GY=vCBFg9=Gv7eoP8t35sPxVJg8ur8WHW!D-^_dgeKTL6|5C!p2RTBb zAG0O*C()nd^QTOm8cl2yrc9VHdCC!aQzt~Dc_!NapOBX~Wy+Ljbn+xme|g54Gs{a| z7Y(M(#i}qNVNKR%5_oGDwvo;$PP^mIb%zdE-ZG0Zp}7O<`!CNbh4kS5$%od5Z|^_L z)6crgiGKO&M)F|C?C_{bz+)LQB^D)+X&{-9;_8)VV$Deuh#?N8TPr zj()daIV)P4bw5AUbB7@HLFYktZvXXO8UAp}+)!!%^%-{$Xla?nGCZBgUCxk@@dV3` zQkD?CJq7l|u>Y?&?te2xv3qa7LBxaYmQyxz;(bbW`cX(nx7$sl%4~awH@hy8At+_tATt zAsM9wrvC1bv{GlN4Zm~y%X<%7J*4!`K`C#YmlB#fx^&Vfp;-F9tfhJ2u6?sMrtjOb zbi}^l8$a2%YUA~9yBk;SyJ_R~MSn)1e9liNMXQ=zuIjIAdk3`)D4rM+2F!$Zguwlz>-gHyPF{Po>BTMs4c%=Cs zF@F7h&y};@e1qk7w?)i&e5gKxzKh&7Zg1$q$iA!$mh|%8?2SA3y>Y>N`?5Yud+z1E zed1E&kG*02JGW<|Kkt7#bfFuK+`ngUN<96Y7dPzl>7TldsFtS+)Z7S`|&;}Zi)5Hj7yO}vX@Uts_&+~X`M@QJ}XJoZBrL* z`tOzz`kFEdOg*@7vB$Q3xUucd4>vZa{XPx;PBQ*-k1eU@zR8f?Kh^fD+4fVFH`Q3! zS`>OAeeTso$rh&GKX!!^oeB$6@85LxATyLSZj24D{GA_eJTp0G*8PtnXXmmDlJaeP zFB*PjOy3uFez@t(%srdNX6z{#8`%>bo3X-KpIO@8+1Lk0s82!ni51 z=^KBxFS2^ozH>LezVF73Z|qCic<{b08K^-{JC3ONMT5`z@eJ!vfyNJecF$gC3n!YxDCaHj%jC1N-7_d z5YEK9D^z%{iAf*F%#qY%dJyR|;6X}CDqcV6gr}gq@PRX+7QP!w;UQQaIN@htEmUPa@Cx6Gg~a}cc@NE8oy6VO*;X;rKO#Y)O07zN4lggJ`M@#*{R3zgg3&g zfvLwoB2Us-+R~?uloC1j07xfTDH3^>MK80OnGs&aOFhv_Sx$HrvZS8GujJCFrY>KH z>P70Pzk&_KI*zA8ty!B63q?kw5mW2T8TYWv$iYloWo<6nf^-NvEMhFedixjX;8*RRPrw0QWDL3GM_AthvJPczXZ5~(G=>yXi z9)i&tSyS?XfzLnQKTG-2AYR_YO%hgM8G&Po}Po7p-`Y`)CM zarEzanhy=jiu7d*EVVvln=VQ_!AkwnJIoWF2#?a1@!Q9qyre%ct@?ZP&Gb%<)m87* zS}7&+D=4JZ*%Bj>zhaoCt@O%26hkX*m6ft0sq|EXDLZm4r3RbU-wCh543f5bG>m1W zd;?x&r0hUAlf`GG495TP%WyD#!Q%)Xkb-$B2l+En_yD3_E@q?0(4xKR6TceF+Kqqd zR{obKAM9ju=o+PdaLg#VR_1$FjGSU+zE8!-AuAVq@?a}hd2(+n*LX5swUH7zF8v(H zea}Q+M3$t}fxfM1(#Y}YbinENP&jf-djB3+hNCB)NP!7s$IRyC$w;Bm3J=@lW`BxN z5Gj&;wwpZzeG(~_yxGm}gVv6eqz{Fu@UV;A>~RQ0W~Prd@>VzdP^OorPcZU!H#?8{ zXDR;=*kz&Yn=#rV z%VcP4D0>+CC32$VZK3Q&bWG$V$=gHOeEwP_Ci#|7b_?w-Pj5E%c7(DIXTwx0eN#C5 z5$0bZ`Rs7^3z*&_HIg@nv;V|~uk{=aXIHS}>y*AFoQ>D$IFXf-FAHaXOna*&Um4E6 z3_EtDUiq&MXNOpRgVMK#v#(?N>hul9zir{{o-A*T(szWj`Mi}#qvW08Y(7^evNrvj zMt@g0yPoaQr1Xcv*>^F$S>-(%&Thtp8EH}a?r`=)Og}mOTPFXn!r4dCeyh^o4QKz7 z>21pYLHNL9ODmm7yV5@iXaAPz9ZLTqoXzKFN7ki(*Vx;XlKm>vPf5Sp$XinmtSmn*(GQ_E*$Dc6JGq0z}>8nREOWr||AuB%UiJ8CfLI?kn!}xSF+l1WElh8fb z!N}|})_oc}87by#z(~qU^hPL>asxUoBjr{Mwf@^NzTAvYCi19z8nWSFgbXQZmvfw^ z?P2k0w;(#p>Aw*M-JW%GsrnBnIcc}Sj_Y7T!%?DvCQ{wZvNcQ}fq!n=JJ`!ZPWTFx zky(DMNk5?YLZ)9zTWRlMRzUjik$%9eb%;O2y#fCRaB7ExS0EgogbwR<31h;)!KBpd zI}ac>Bjr(}y@%SI>#+ty)p}j_YwEoMk9u9sZxl09-ZpxlP>)|tI)}O&@!xH7-M(;s z;0g?Hx5-#I%v}rxmk)x3yZD4ocibbPG^hoyD0b)31-Ak(IxS(XtK2(j4jbxVRND|8 zeT&UmoYI zvyMq6@tmtDBIi)noSRoxHe49S7pkp9WDferaSwMZ!tbMI&TyA^ow)6$1x6z2Qhe%= zVT5U>4Q!?-@fk^@vg^2~FNVe_nsi3f-XVwKDR6Fun}?f@+iwSL!+T~Fc*#LOhhTUtW*I4&S5THbve*5xbR`$ z@ltiPi5+|e%V0i~gm}&K+!JBTy~@1->D*Abv61JViY)HdP6>nE6WCTi zh$r+{4(=t<`9NBC$-*qeE{)D)A zgRt`Mu7{vu8srP+KGZXVlwqB9Zmzw>>>zw3|Bb0!TpM%Y;S?w&9V zJ`{I-IU;+ro%qnX$*g)gJ|pHc>T$-6N60$2o6aqPXq=DWBKwvebJYruQ{jXiDR_@LTkk2PO&p5As|f6{O6YJqmU5>df%W1}&E@hK_f1sQ zebJ>y+@km}!Hr@{kLI(AFLIaPg}4zsMR8xL=|~BO`4=6Cvz0iX1HTeZ+Ei&GGYs2 zqTJ_aV#H2{v*s=m+Z#ul-Y7uoF+TE zW`8{ma&83_3sIR|-iB=UqZJ4&K+Kn>0#$g#H!6S!f74Cei#)m>>8B%|G8)Ut&Bnh= z5K(}SGYaK-ngx*A32eghcoQ-Y_C%hQ6}o58y%SuQRp*AW;PA#a_w2ayCmQE@H=CKh z=`1q7$bGEZjn71lh<%C~KSIW$e2(>MV|6mx#>y)pD9)?GW-Lc17rn}<@ObKn@*n|B~eFgw<5X2&`RipEv$PZ&9)VBNhV;c6aYN72{~$XLYt zf|2?NBFhkI4ed0BIv^WYF+TZtJRHm2E0M>v>a|GpRySs>qSMVDj1niZryfjp^#PXn zQry*_n-cznNWZJRdCq+-;p$Y_e2*E|9^|?Dm~pia_6+Ol6UNYV%3Q#^zcA@1KsK)T zhlQbZ{VBH!HjL|MBXJxfz1_@nokvdRI^X0{=w8Uf+jGfP*#t)cgfAwHwl zxXQ+41>H~FyFFL=VA^qv?84PFwyF~{MxkNm-I36DzlggU3UL9)%P)RcZ|7u|7K+ci zw9hBox=m;l+p1|Hj^$GkX|CE%KOF-GjvLTJ_0HSnro`mA%4e;<~pZ zw=Lm7Q^G(Tu;Q*xqMFO0LK|nphtRiN8*Zlmc{aS8yXOQOewcnvG+~U#S+sPNtv70C z76s$cNbYU89mTfXG}8tP5LwLTgnN!T%bgzD2AyG#AdZQXy@Xl6M$8Jt%zg<0)H1(l z_8T_z&@r>$XNccH&H56djZmA_6V1JqfrAnF1p~tnc#DDY2&AGSvyMh!Faxs?C}f}t zfhGoG2;9oR8U(&z;1mRm!EYjP0@`HO#R$C4z*PvGkKXhR1GECqBi!OdD{$KW3H$sF zw!-BcNi#!SI{g}vX8iojE-@ZvQduG+E&rJrqlbDK=bDTmOsf8jW8tT}Ad!(J9ta)x z_;|*JCgbEl#>E^GixWE+GtOp4K1dh^QtCRjBW#9U_xZ)kI;wjf41K4FCU0!I;xxWgZP16)$X z%PhovjbkIqc<$T#@9EFNi0k&)1!cX-&U zokTS{Fn}Q}jCr+azFBZ(VhP97UUQvl01vLt0{2$**a2^t`Pb!H?EqdC8^DWSxWji2 zeCoSg4(wtot=a2b74BJdZ!*r>xGwQrdlHdpXSpvS%FReQ4^6qi-Gt+D`l;sN;Bo;! z;9gqcZ0Rg?=d%*#l9tP}AX~y!NE*OzOpyCFSWG?L<+pk+SL*|K)@bX%)^+B&yi$<1 z(X7VY`R*o^*$=m0wZ?US#0*B{eu*|&kEBeVqR)4KjRBN)nd|b5V}MDX=khy{v~Qd9 zA$NhfJa@o7)_d;C*714nB1~dwSJ<;8$L-@D-m72FaIZsqEl%r$6O=5Z;x@aUJ!c>i zmjVxR!o7~_d34V*%q%I2N3*1+xIKF^-bH-cNGJ`&P)hITi;Wx*&pH)t)nl?l8+heV zPh+fSKR4VfVIy<6Nj`wdxcGRWGXjm%+jYzOv4pH4NF9%aJ_p+pQW@JRDkuAuqT`?!7Gf{gDL83Ti$#?n#k5K15HS1jw7q#8|F451^2#_!^l1IFc_|M7pE=hdAzCF zDB8ujp|#537{4KTou&$oWp*0(vX8U*FykTM^g${vfyF(fl$YxyTGQ7Ejx)hukoEWq z+l~`GZ&-s#)-ozgbNT*Eo_ESNxhEQiZ#|phuO)t{#ySqfn40R(Y)e$dj!ZPuKs4r2 z5;0uZ=0`)+sG>N{mP6;J`${t7aYnp|)Df9Ul{&^}6Gar*I?_m?KaW=@IaZ``B2S8a z9bn2U$;DXafFF@r*3S;snTae|;U!ANf+1gnXf^|^Xjvlpn9OMyQgal6A#5Y&`Xe|t z%agsGW=8(Jt`b?;*qF>jaq1NSPkaJ_;YZ)VQwtf94vPjB%&s`h!|>u6-15+E+S~kR}%f~oE?$z4GVl` zAXuzziFm4Fp}<6}f4fldw-3Ex`;cR882{~tW1Qy;4q)b$Yh8OPeFF?K)5zp<8;&|p*P4V1g63@kL$}!kg7$3!L(iFnCHNoT z?EbTm7=sVWB$k`tBBIs=7ZNO##ui@3(2X{M@QPn}9Yc581cHUy91J~Y5*FcqeB(%U zol3$MwAf!zrLUk$e?gVLf-3z5RbH1UXmPw01Z?H1h|BPyQ&qoS5ruCp<=1K2nrXIeatGP8$qpHDoJ8A9e` zk4AI=Ey(%AY@AJSW<&o8)!8KBAB*M~Kq?{c5i;9S{67gFq!QI8$Sm>AUozGREIB?E zr$MHG+;M%QV$_V&RACl!stsq6oRJw%vOI*dNcIZjNjk@PvQhCse8braizck;Eft>W zH0S;Bht8<$66Uv5(EK8NLQYF2$s#Hn3@n)UyMW-T$jcX}2%+lC_~7Zn_>7!; z#ktb!Nz!+U!;Zzelb|LK-4*eJ3NsBb3KdZx#|DQ3BW)1>&DIzHqxf(#W3nyuKRP_@ zoxa-^sThl3u8qZiv-QV+YOt0} zwl4igYe}x@hyZ98WA5{hP2`M@K1wG!Dj}NQT4L? zukHiZhy6!qy^VF!@b;oee=}?`a-u(&n6n9=kh5hzc{V;hoi>LVJ}et`XuN}{$da?1mONwbgHb8`Iag;56gbuv z2z9f0d6AOSbqcIb>)z@LSb>A{Nczy*E1}i+IW);hDrGt!&Ksp_A9|ga?chMRxB_yR zjeb%&J6K0p8x%J)IA|uhJqC61W?-;#KIewU&5j6asTEa6&)LqE?cbHRAI?YLu`cY? zVPE61QKsTq_>BG<<;2)X?s^s$4c5V5(F0zUd2PWfIwL8p5 zLVOD$UuV?H+?6u2!n|2abK=J7en90=UlNZcANx|Np%(t~ndAf1OmZk~P5FHbHosh!h% zDL&{QM;SLS|JTveW&1KO7aZQkHe|bbX`A#9JQ>rZr!rl>UDMF8fxpt<>%(-P8>HSe?>$4vbvhahL*OvW!0@~$E~WV8JB;g z2{tu1)s3sGUeU0up{b^^qqc6@+UlD6hNimzh_QdyNMpl_WpFOwS$^)3xsyEqoZ_R# zFK(-AZ5zL)p{}iMZ9~oYlIEI@wRKJHZR1x|x79Vm`L^+k<}8j?x7KzvG&RRyH8ycV z-h_!0ViU%%JjJAy9yh+Sy0*GCRyA=}d90$Nv8}E)R?>_Ht!rflr4~0gwYN4mjz{DC zw+gOmZ*HyoZx&eIu%flP6^%K*cwSXm)%dcem1sf?sU`D@^N+~Oi=nldT4o2xf2$o5 zZov--|IH>T!5%bzR$WtFYjt~F?SHGrMO78!Tg{+cTho#M->ff7uBvNltD88hx%|Ib zuzv>oFYaTBvE>bUGxzsoVbc&Lfh)~&4WXl#$QZ)mA&%dO{1udTfn&$~c4Y{Jk$7;C@k znv-KII##Yk-gXH4wAS&M605FV2W70;Y@yXH4G>u|d#r%KdjOnNv-%A`<+$0nF$D){ zMf?Ug5RV^*huS5g{?IwS3z7HHXXL@*DG~8!exFt8-JBml-C9Iz9x~V9x`m$p-C0m;krZ1=Z5b&Gddm5 zMsdTxaH7M;C7F5%8N=DrhJ;r~hn43I8ah3E^O?ER!!J3}dDFvNkuUsbCt5H#$$Q)^ z-)}_tTW98m-@?-ouK@Qsxk=^X=5}a&c}8ydQ)q04#uovNk6br*Vz_7S(0n?UmYX)^ zlBLHSKX^#E$DE;v38$T9{?FzAar`&FyU-XW4CB8s;U~|SHaC2)8x22pM(*HvD15sc zh3TX^+!b8kp+kl(9WrF}#Gy;WnbX1@)25>(%4f_CW%>H$r4afo6!OKq z8gi$N&ofrq)4~^?(LO!=xtlvW2Qi`WhUkX8aYLr&gd)Bi`(R^2l8ujOgLQM$VB_P{ zVdLV^SK9byIOxauVZV*P(8dk4F~~aLAI_H}bFu?hGjqHWdzksB-DJL{Q^|LP-RO|K z@I9w5nI7I9%FP=xCMT5QtM7xIay-TyGi-UeY2hE7K5csVkILzH^tnzsU$kXi${g=@ zQP!KCs`ie_G0%20J0%zY!YK8#(=fz0hv9E{eQvl%G|A^pDZ%zVH^tQQ_0v%D)yx&B z<#(84TvE5*gQ)Q8+`)OH$BiEn&dLq9&KWm;{HRHJ;f=YI@fkOMTsR|l+@x`NdEtze zp`N}rd!$qOzd+3R@kzVwuRAF{-zny$PBE``ig_a*!wEZ9wWx5>;;LA?gNGW-tUPvR ziPOQQc3Z>7x>)ndSmJo$v{biNuWj?@*;eS(wa1z|*2dbZ*J4@T<`mB?EiSKgu%>UH zFeNr&eXOjysdk}v$cZ(tSRF%BU2Bt5Q{C7YLpiOny4Kd_)>u6hv9R~qZf{syhvQmf z^@iBmwz?Vz$AH-4sD;HNRip^h8GBZ}Oz(m9exMLeF zR^QxM8*6Sd_G4J!)i_w|#TJ##n^_qvnOR(XH0(zeE0t51n>MG)_h!m4?dPFp>y7KL%A8q1Mb zYh9aJY&gC)Lf^HpSshfmp{W7wit$tHnBH}&W*$4g!m*vXuDY?K&Q~zTk1JDYKl8rTXA&9>0MjL+7_Nb$JQ1GvbFG}Fm_5qZF@b(QjIT}jUKS7{?b^D zwV<{*k8W)VUMTvjrEz1au+bYtlcNp z2Az&JXJOg=$~<*_o3})X)iwv5Fgw+nhL-r)T-n%Moz(hH3wEHj&9xnk=IR22Nv(>3 z2Yrm?xVIVsv6>Z*I`i9uVD4>Btf;xUaer(UmSgIiU$|&yta4`Y%(7!=b~W<6hH0%^ zXJ=3U#H>05@_EC|sckdUr+=d0lTM6`rr;!qX)%zyi}s1dbQo#J+{P}pyP2It*iFde zYtCbNjy5Z{2q!=#bt|1&^A|^pqvpC)bYk9w{0S2#92p(iTGxmZhq_VG6ACNmjjvm~ zqOP{Ku6A60?8tGr!qQYzA4QEDxSK~OPMA9Jh^Z$=$E`KH-Z)%qH03J*B#J<+zE_aSQOlY1#Bu zO&v!b86CHBWk-`4tK(1|4x={2aq{)cIOw!huc{l@Sl6_wy?%P0uitxi*d9_9J*uNCv>n&+L>GIxV008Q&?VBSY?WwiY_dkU079x^Gq|b zwXTmZzAw#LDux{4hfYMN^>RoH1gc?c{joaNO8*Yq~T>QCWv!VC|@>nP;S zu!$p;nbot+G)}3EjT1?tZQxVbYPuVR$RHDYG&~Qw1v;W$z9HyPFZoe zsc+&qm6!l|X#96}=%U4?r86u2BibClx>$21YR-A2({W+Nij}e24zzI1hDI!CC?+3> zc(#n*Yi{h|2y^@^zN*E=#WT@^<|v41q{hxISkss(3^B148``m~3oc0Jm6ey5soi`7 zXKfu8YWASRqh2j8T*tW1<08btX?%;;R5y6TK46iO`mE`8M>leR2xLQGs>;IRMOaMo5D>!);%dyAU+UAZGjde+VS6WzBj;m2lmAODt zjEg44#vq1z?S`gmTy)2dYxV*x!a7&eTb0=6uRq1Y37Q)y$*{uu9V}uCX_J2 zn?0F(qHmAorFst0>W=p2wb=P;)O_u&4XajRb?DnES5`ORK+07!k6jH~DlV+TVK>Ru zZkkuC7jL}O)K~itPiBIMcb>m*6Mc`l#vC;{)a-$ya>3#X)Xh5unh+07^d>2t7I1$u z3kMv>P{X>DWAz*3%K7oo`s-uz2C(vZ}I0Weeu> z;APd ztQc_0i-tC9B3~Z*pEO#{3~pB~JUZGm@5GKn8H0<*8P&;In1}IheW+<{#)*thN;$${ zE7sE7*3P+zU;dc6n0Rsu=9>)vnw8xcD2e?Q??&$=u+lb!!31v|6`xLcHkeo~w>dNCEnY&;I)BAK z9xED*PMq(>zo60KTT_%bJ>nw4!lK2P0=y2Nv4vQ4>;fX zxo7xDr*)+{RN0Q2i$3kV?BZ#HS=(SPY&)f)y{4YKa9#Vcfr|m=5Z~z-2$P(iO?#O$ zG=HDLB0PsVb76^dNvxx3O;htJP57B@aq&^nkvv;lgcI1d=*s5SD9+8IGj(njt*~dz z&8=;t{sX6T{33{V#e9hkKLvr`MsNhvrtTyP$( zBHmv=-oX>EKf)#Wcv~X^@wB2|Sp}&TDFvwu!^dY7q*WB8EiC92De5`bFBEz4|EtPi zn}2ORO8#f{_`j~O(3W)yr?UVoamf9y}0 z{(J@hhOhp7!Sej|;9ZCDek|#{ui7!MeHprbyTSJHr}56ixZQsv-&fiEPo)*|mkQOq zyUlUgHmNw1GOJoGSd2{WV;8t2Z#H+hqwdWL&JkYLtQ7gZNu93>J?yn zt7W|xGFRktd8l!6SG2V`xwz<;%g9_F^tkv=zA%wUPaIL>ry0rXm#N|tF**1+J3Lrl@5;Bz6E<%8g{j97h1lnuwALz z<;ni3@``4cHh9+3WeOeXazWRX87c?PUAt5B7KmLIsv38h#xeqH*{;f9tL%rGv6lSp zShv=`Ud>qReDSnfi~FZat6i->yED7Ly0qK*j0EQy-5KtzjCE;O%Cy}1+`TJJcGLc8 z(xy2@@PBRBoyq-Dj9b*#F<)uyD|Be5(|K%n#`a5*7CCtLzh%6$p1?(+uDqaeZ;03n zLtm%mJKg^})udCXu9PwL={i*6JNvKJ^Ixy(MpGA;x=LkjZ8O?i4S3ATHP=^l6~r9M za=W;cZ8QTjwaJXboHu*Lzs5JpI&%0g@7j2K0p5NcY#j)Gi)4|;x4In{n^$!3D~o?)v(NRhkDFn({6Jp&s~N``f_R=^gq0rDV;Z*+_~6#auhrvv zmwCKjThLx6KHiq10M|vhr82(l_`bE@ff(xW!}2Qd@!KnaoQ03KdG^W?;kUQTXOF&k z_D)6EZ;$r7vUf_r-a|fn^vkn%bHLtm$X(gH5%GTicKhsc-RaqT9$~+KE#26ACSY%m z&mP;`v-fep-X_RAH}^K`aeE&hzke^l9@pFK53b=ods%SK@85Q$b!Ct5{Po*=*JqFI z-{PrSOCB_SX6X)5h2-tf8X_wr%{vCjiXYbX3y?n^ak?w7ty*~!*&4#_HP@+Aa|9SR457@g5aun&_=Gpr=U~iMJ zzJs9b+2e~7p&FlGc6MVg2YUYcZuZ%W`s^(T*n1B4ovChz1^@^k9f9U4nCee^Og?C-h4V06LnYPd2_&C-qnfyW4O=WodN$! zV6PGB-saW!Cjom?VUPPQ{p0@b`S)VL9v@ZPm4Ckt*qiP1Z?w;zi~RofyRRGn{u!`W z;qz~-&)&#@y^(OdEB|t!=N~W2eg5V8>{SKq<-^_*qV5v@LD_4+GXnN5 z>c+o~0ekCx{!R4R`jF|mgj9O zm)o%cdplsSKjOK6Ov8tIJdT|mu-DR!f13jKcKiIB;j?#Zz#iX2#_{fLESK941NQd7 zp11!NAf0;j@3#Sa+q?1a*?_%QeEt>r?0pun$Cu3(Al=(oE;l|e-rpZ@`urwN*_(rO&)&5Gd(&WVi?Lw;dG@{^uos0rwim}=IX<4frvmnV1$$lXAHN9L z8|kw*-)HarfV~%BkLx9G^Za`!U@y;SuL8=Re}jvpS?<-y}1E< zpLAnyR={3?&)y=Ry|#e86#QDOtM+RS*qiOMcdXCeH355B-PrqHz+Q#V9*;L(``sI` zH?SLfKMUAf;uUaEKe6BZdX&A*3#TH#-`*(5UK(}1aQ}eb zSjgU3qMjF?xSx7+_ET@!e(JUDr{2ZT^Xf#uS&zrLfYs)uU5I%9cwUbFSaP7yd;d7xaUSv-1A3mlTLXG`U{RIL6Ax{k-VX!i?!qG$`a_TN#wvWga_sTbxUW3oxuLJgG;Gpq}XT)dkmjQcIpTzkG1{v+G@!5MdU~f=~ zKnd^jrREYB%rsf&T&p=25p{RDh55n z-nIvN7hz8HHm?g^==sONCr_h)v9@J>Y1iwIzR*K6w0QZKp)ro|1kfw155nF)$>i@q zk1tE}HcyX4G4ZY9T(k>*o4O7$SK`BRv+$vBetSES0sTZtEFp{^ z{wDjA5zx=Dj_7|FM~r0s%z%EvGi$$BK);vKkH)R?icDe)qo12IgK}l?39MO~0vyHt(EBJN{WD6rTS^uDbzHcHj`uzj?{f&OYDp%5pEsQG^$@T{r z{gH7MUcpFgVO)Vo)*oo}d0e;KKrdhz#)HC>^#>XKgqCjtM~<))4d_P$`q6;>p#lA& zM*mlFt)cM{17TbNNcJbk=(oqU5)Fzp(*(V}07JPi{b;XVi%;j5EMwdwIqlreJM(UcfMn=j$fx^9(q#g>khzIXypM zFF&D-P}rFg(4P`WpBhM?YV0Ly>0cqy-cbR4o?#}oFwPK@{hMa&C2Bb>p^Q-2nGw+E z8DU}zI|YIC0%I@Hs|5*Vgu+fyK))!EUJ^(zG4>K(l?3!l1Nx}`fNNiy|VW==fc^?|EtN`Ee?>sQCZJzq-T{};uL$~Uov&C1m;bLE-X z!cMdCCo3N1Us1BZf^th-lYuavviU8LeU*t%U)1_W$+X!Q7dakHk|WORNpgmhfy~Tr z^)nsZj$~xcA${=;&;%xGqfS{;dX{rSAiXXipCbJ<<-XHxVStpYP;w;A*3PM=L!W;l4P2 zEKAa_bk0nY7dhT_AKO32I`=1~FL9npl9xJfLFUG0>EkR9JXOd%A}Occ$*ILH>G5Y5 zboJA~@?+?sj)C zVIr@&gV2hde;AZd^X?~1{NB>0`Jbhc&<@^V82DvCLNU3;6Y=&ApiXxTCKS54rO>Cq z8wtDq!I)K|h3AaO+K;&)FNZwMUhB-*YV|U%S3J_WEE{yA z>_aa?{f+iJEs}@fjP3RwsEi-ldmm_bDD(Zuu9un4bwI`~_LXxPx7zPasLwM&md|xk z=t}zzAm$%P*+;IkGj6wU4kC*vvw&6H99i%7IH+lh9$ej)1_kMj37 z-n2s(`bqKd*YqDa)^FbzZ_0nv-p?2>-?(d*H}OGz+8+e_re3gX`1HR|j+@Z8 zH7>uyH5_E{K#}L?p-b$G4nvo!zDS>>^rOUM#B#ApG~)^Sb&^+$=sHu5=~twmFPZCF zmj7K5L*B@@iFb>rx{3d__-FA=ai92s_?d_&LYjQpBF`ULUYC|)bxBHknNemLg)t@u~*6EO`P%Jgh;sF)|t5X;4-V!e2l_$~2!;?3e+ z;v?cS;>+S*@pG{U&b#Q(!Q$cKB(YHB{Y2C|QCuT#5I2igi9Zy7Ch~lb`F|t6D!wEB zQ|yTyka|&ZjCh1NQ>+rJ#b)tzk>`K3^L_C?@t5L@;#!<{QE!8|MZ8Y@iOBOc>it@L zS>$~NjQ>*XjUA8jU~#;7jJQDL_x04{c^Y}Kc%AqY@j>y|;>#lMD`37zx+TBArp)il z$*JOOafw(jt`|3pSBl%kUE*%>1@TSs6EPA|`Qk`%syJI*BG!xR#Vh|W_TB_OiYjgU zuIlb2O-LZDvMEi%ra(v_tO9mc5(yHMpr~jFB#=mem;}X@D5yB1;;1t?Zp?^^J1Q>Y zpy0kcxIQv&j2noKqN2m#_FmVitGcT@ftly`yx;e|-}n0pI{&)QeV_ZRb?Vfq>Mn7E z_=xz9xK9jraMJm!_`dj&_=EVf7{oxzdgw0p5kul&akw~IJW4DSOT{X&R%{TLix-Nk z#oNVA;%nl2;(jp+KiF&XDfT7Nm->rGD!hn9T^ubQukdQ}3d@==d8yb+;_|s!s1yZ{H&Dza>>7!{yOmvh2JZAv-pg-jfDUIBKzQeySPi? z-;zk@p9)XIy=mI_CHtX$#KRSyL-xmUC*~=9I+<=+$BL&YypDwbMUu}ESCE4&>tgXz z5_Z=}f0N`5(%&WiMd43K-Y$M4{!AkOLA0@NDCPxX8VUb>Bp)Vbkgy*i{V2(kB;%{= z#!rcOia1wn7FUv(cU~cRt$3gK6p3_RC5Kto>*Cua^0h4v&l6XWu)kdT zt0ezX`dh?%6#i!tejbB>apP^A%n!xl%k?TtdR%+2l;jzr__K(z{IhwUTd;euKg{k;hxsBjRQf z@t&3bHOX&F{=4MeB;tJ~{-SU{<~9uPEcPLhzro~*c!!;sNg|!`(&tMqmcByaRpe~E z@j+ZbBHn4zpCkEv$*Uz_Ln7X_;_V8*NAjcMGbHl&8d+soZ;9JUr1P=#UrGK>`d<{D z+zWQqSkDr>l8D!jgx?{Ohf5wOIZPs6fmo^V6C~G)jU@b>L)KtjNnA-Hoy(=aR`QL~ z-zMHK{nO$$@jY>uxL4$Z4ooja>?IBqv&2bau~;e25gWv1;!1Iic)fUs_z*cC>vH1b zB+B=^^lwOhPx>9=9)*7|`ClUEz>I&mI7&QHED)!Q$B9*9op_pfmbgM(EnXwuDBeP% z92-g0<7ToR&!CD=lgQVr(r=gif%Km%{CjetW&KP1nMAy#z99T|B_SU|!Y*CmndBm@ zdx~R8*oCE^Cb>-dlN7#yT!MLkxP(N!Go@cC`4Z``R`@#dG|U6U4J6{-Fa2YZpOpR; zg>NUDE$e;p?CfzpqZoFn}dg&$2`jQN1%lgQuT zc?HQ0B-U-umwXv{hGqR$@{Qz5%eqr+K^AtR${4Pj!qLi{a>ImGY8 z8^u3~cZm0h4~dV8FN&{SKKG^d%)DEh~30P#KT0hP7AxkC65qu z#PQ-$V!l`|9w(kGR*Q`!#();_Y;n2B=YM!zevNp&xK6yE#C7;X;^X3z;)~*|;s@eK z;^*Q&#Ggbi=+kd!awx7>#l9k+8)EoKakMy5H0#6A7fLP>XNj}LdEx?bvDhS@DV{6x zd%nE>UL&p*uNT*g{5~=59uYT-X1y8V&q+4x&XC`d{GPZ&+$nw`ek=YU2Du)L_$gvH z(X3M={BX*+J|7|Sc_qpdM6+%Uxll5nSEBv|agJCc^7$p|n?$p&4f$NjD@C);jqocZ zUnSlmnssmJ`8{O%+ax|q;^2Q#Ig59Y}VHyA20b7ajw`PHj2x|72EOCLjP;3%U7hA=Z;-%sh;K6I;cV;-#XwkAn2q zO1@saQ#AKgpnpj6qv8|dGvYS!P4Q!Kr}$6tN3kRChrn-VF+}EIo+a{oc$Blmuvj2Y z6K9C0h;zkyaglhA*eYHu@_T(u=MUsKyxmy5RlGxdRD4`~g`9xvI&r(m@2@fZQ}J{0 z8}WPbXOZ70qkRW4RqP@576*uf#4+LoF)S8{rDB;lTbv`B`$|Z+L2`?@Ok63h64!`V zi{}0l;@>6t0r6q+aq&sMC`d<85w0VCD;a$WY;y`i=?%#=7VvaaT z42#8LsaPq_66c6DVuRQyE)&lYSBq=J-;39YH;cE44~P$oTg0ctmqc^F4&{1R@`vJ1 z@eA=+(Vy(pL$cUO>>>6Rhl=L@9sK7=9xoP?xp*E$tQ2R7b)vbC2fMQ==VLucyjZ+c zyh{ANc$0Xuc&B);_^|jF@hR~+@vq_=;>Y4n@hkCL(cCXY{(h01+|kKzC$Xp4M@$z7 zi=)J`;uJAYJWf1OH1`#eUajN?u~A$ut`IL3uMlq{i*WrX-YJ^?!sU z&3(-2m`_s%$A}Ze64BhxguYVpEU`+QCoUDw6kElWqPed*9rI|(H;R7}?-1`1A1ATS z{G|Az_^SAU_>pMtdtzPqd&;1>{|VZi9J!0wL+mGp#3AA^ak7{z7K^3gNn({aUp!Sj zOfatHt%?Ov~CJZWK3(Pm9ls|3w~;aaR0T+$sK3{82RbO<|vig$u?@ z6}yNT;t(-Y93@T=CyS+GnP~2#!tZR!4I~yb8pUPeIik6b3cb0H3f{!<*%&{>JH>m& zE#gz+i{h)|TjF-{3-N352XVh>^Zq5$Gxt@&?vi_nLrJW64;RgSRmkSPDp;)WQt>3R z8ZVI+7l;eRv&H4&MdEM7E5&QX+r&G?`^AUE$HXVZZQ`5ad*Tjp4_RYbd&QqbJ}AiW zpqL`|6GP%iaz5_6h)0S?i8I6sajrODH1~TE-`wv7S1WvtxK3Oz-X(4n&HY`(dqwgW z;@4tAS0{fR#QtK2m@5{F=6)~y9V>aU*d(qLSBZCv_lYlwe-(cc`Nc`rQ@S`W9WIgW7ihmKeh<_E|5Y7F` zg_iXhWzgKG1izK+>*0haiap3hmepGvAPy48h!ezOatY>ZVx`F6Bw=`+*dU%wo`(6F zc(Hh?c%68Ycn{f(b$0Pl@p180(cGtm-QOuM#dVKp?o&cG_bEY}_wT?2F_G(@mpRWv zbBzJFhs^qLi0r86wlVf*QAQs%>%XYGFy%wE{)_d>GRpn*ymo)Aw^L3>`N=`f4{&gO za2e%cxW7ea>UrsG=eL@8{kN9k%IV9SnjzoQPIGG37!n7HStRNU zRb)6`MAaA>MK{;+r6P)K$C*m#=_4lQ?heW^IEAAt6EbAxHV!NRq21L_O&>zix0nqf9NjTq951M|1{@IT* z7$S4Ajv|_Vg#J35GHCh}`mMQN0GfVPjPD~*4~EHUxX&V*eun;BN*Of$tqk*7%Ao0Y z=-;y`gL6pq^BU3gL-h9s%3vdjesAtGfXgV)M*EAcB#wiX;wrKl?Juq&Yta7US`x>{ z_2N1b$H{te1Gy0GFK#4p+-wpbA#wa{7Ppc(j-D2uCviNzEN&xlT)ipY$#op`U;h3Q z`z?PriT(8>68+Sy_n?0!LC1b+)^E@sb19=AmXrNZUnKh7=_LBwWhDC9z2s0lCqSZK zCGff*{b>k^eq`1c(0{g5M!zxZ1L!A*^12uOVIYcif;7dNu*gI8AUSn zUnzMOiFQDijC~ym=c^>ICebeIC2t_nKAR*zLZY3Xmi#=4_IgwDJ0#le6UnMEjb43BBo;Iq)z2E)wl+`S2h50Eu=lmTbNc zf%fP3{WBzaAc=lDNphG(e>L|jkpJ0~(QjL% zUq&uP|6Vk&s%BAj=8};ivt^IX&K@&%T-Nwep-`3yasFm!WsMy>HWbRq8I?2MgwIJ{ zURYXW+h}NQwl&m>N@%M(qewuvz%~@$K|9JynYK1B?ZH4%hix5;fBok#zjiQx?Tn}Q ztsR~ASdx(vV#2H~81&0RC~6u$h_fa5V8>}z`r5p$`_^V8ZF4*%6+gBs7^XJS#12H{ z*!W$Qez$F1j9u_P_BxrTU+lRdf%J-*5W6GdTp_xNqa14bk@+_uQ~a0tiIS8 z>$f}nW^L-St=qKAtoQ0Vhc<)c*+AO$XQ{Z=vVl zG&{YQV}~?DyM1==>fZIqNE_CsF6oo@9kz8in%=tBT^jC|*B#}xLQd{_)jc1!P#aPI zfoTaxugyzA9-Qv|)MM?!5Hl`|KePhpqJfp$aRs-}lX{qr2>} zJNv$|eZ966?8|6OIO5ya?mW*vGHF=BJ0I@y?7s|I3|RCtav!xw z)|RYI;cx98mxZkXI8683d!HWN9qnO%W81y9g!g5XB^>_kYdj9JHlgP%{ZH)dK~bw$ z58#dI+Jmft3H$AD(u*prM@N_K%gE{&?zJUhzwbMHRKgJjyZwQ0Ukep6?X*p^1_n^7 zyxsnaRrM$D3rq{|wX#-KUm7XjrS)j((U;<=Y0tJbw5qyety>qgZOx!<-hC*0*WZLY z-nVt%s*J7s>M|OqIw4#4Ez9_Br&qrQ`bLkw6?(UB(GT)t>N-wF`^M?x<*?EFah#`Y z@lW$l%ilMEt-~=zo0C>JyQJ=k@1E+yvD4ZT6E?sJJLBkOCENDR8NFxI8PhkwTPlv^ zZhO*vgSKtk7wl#~@N$y%&GW5xM!zEb1n20$e*d@0dHc8BWW9U8J^03O+CVGA9(|&f zFl^v{|2H@~ebw7uNGe88NT2iV&i;tIs&x-qq}v`lFa#cVb+r!vVH@VD-)v~(^IG~G zaubgA&Vwtg!TWuCo!;Oa>*!nNSYJ5H8ur#UJG5tWFL?F&M!wch$UgrC|*XVh}wt(^c#R=B1KW$4h``h;If#>Vs zxvY)n>y_tD#Mp)=M9Yu zE?g+|a*ae^Ac1e!_6L#{b+atLop>i^rvV@L4=sU>-wxLF0DK8Iz+Yeo<{SQDbE)tp z?WO6nm@4>>YGFtq;TN3S15LEgy~u=ou75EmDw!nz99S8mBzz*&Y;-X|Tf)d}tpQP>y`|KQ~985x)68>fX z4S~K4E7&~|;(nVpzKlRHh^czQj}n8y&J=%=m=f&K8{*Fr)2t5sl19QW_J@d^%%sYY zK*#5>)76pZxN-+8B?*PFeW%@wpwzPv&q_TXWwBHHA_Klu-Ujuj_JT5yx))_mNbQ5P z5>wN0X^@o4i@Tr|c$jmybLcc>JL=ZB-GV<>>Pi&bPBmYbOML;^_NR_!1*IOs z@}~Y1CW)zA;WNofIT!V9`|invkJKx%Z>8RbzoFE}@OP_~`UbGWO68ONt#<0Kz&bni z6GYu=r)FW9Y=>icX3W1WfgZQmEKGuFAtrIor4MMfUa#$}T4>p#;5H4U4+Khfqxll)VtSUdGdSo*9$ zEsOB4_n}Rigz7;(BNu%?jh~) zpt;!SDQ#A84ExI=(&hv^({nFr#|MAMxV@#F6s+X}Xdh|ALG%5qz7h*MRZK;B`$;Sg zR-vAKhbnGqr-BM-50kbmSWj(#X)CP`x1nNvAv+1(p)-bx!|ncP&`$ZqmhT9&%j57u z+6=e(n2|qYYeMix_MH)Sj*)jI1TSOeGwmrxUXvJXW*Q^yd?P=S7~GCN=gTr_`ZIPU z29wZFeA$veNesS)Hua4%S@dV@N(`FsD~y)@%f#Tb=pw!x>GvcC4`uu@((g?S_T#$A zSn2mA28U8VPWqn`gXX@+cWqJQu@_N!S|W|BiIK ziHht6h?x}don(hmg=weqpgh^;Xc@5kqvg|{Wy_!9g!ub0#C+$bN+G=&VxEGUcW{Swr{hgtK- z84cnE*U|U!5(AwY8X7I%EMw`*2=-u=`7%<1W7!-_WR(`2#42l)*gg0q`^IS!@e{}a z=A*+P4i!x%Pdx*C91M+cp8ZGEiPH$JCW5yS&UZpQjc|cNqK&Y^3Gp<-N`*ul;X=iV zHo`>;i8jK;PKc)wRw*Rf2)|J*HUca7YP%HE^wQDE89AwSMWsiDc=U0(+OWjpWvxDo%wFJc}n+X^bOv}%-&)1ob1c! z7c^f|ztg_X#62uH5T{<>T{cg~zKl@Nd3mP(@~6`0Zvj5 zvH65nFP@{V-pxogkT}5}fWs=a#GJADdz8M^f8K5lp=S`9Z;RsYB>4L_n&@ay_caDfo$S>lAzdDr=q5zJk52W^XE*!72EB z?xB=+Y7vUjx{`a3W5$FaB)blK2*Mtp6LJbZ5qs-Q*j5ZlTg@K7P3IK+=V-zEBA1Cf z?GXs^+rFz&^gi|)6x@E!woeB8VjU3zcl&igHtgrv(fa)sId^ug#JSM*43wjR``GJH zx%L;f%_pdws9!{*e!-~Lq4qm8%CzmlFtY!QKZlt_GEIX0x1nD^%Wx}^F+w(<_pram zs^l*b$U+QCcNM=gSGlJthQ|hIU@)+(F#lk)kHV-l&{SIs3lKusAk>mo-q(4IYOr0Fkb=;VH3%iM8W7wa zQ9Qu|WzC1DOfaH{tRY9pIvRxA!Yf#vi%kwt$(HY2%RVcTfyKtGub{~L@L`Nb#K`2YyL?Lb=VK=keR8xhVX#Tw4d#8` z7Bq|fOQgnKKaWOI{)H(IffFa?U!0W3nA*2YylN<|vG)D=Yj<;QNU+wKop0b~oay}C z%rIb=jW_x4W(EQjV61%##x;AO6Aj~@i8d5X>qHyqMl*xWKsVYb4qMy^CUgv9WUhm> z9GRJL7k1!$qRrp+!h(a%OHOXQU$zbwb`4TJ(qt^hq_7o%lS~>pCXMTGgiIQM+#@z^ z`GZ$Zna3JuyfHM!6lI(_W&cRojJ4y9+#4NvGBXJm=GVaON%mgmky+zah{^29*s&%* zj-XSp(~6J1!XAd?rhJO9Dckwy75o|Ls*m~x(s=Yjba?DpJU)+tJ^HJ!1!2!4jQz7B z8a9OY78xcRE3qERo`EI!o5+dLSlhhC38xXdWqw(qd?L$fg6Gr(PW3!zs;7oo7;E!q zW$agCBYqZ%_)1K~S4_kU88K|HXJ3EAIk6xBzew(+ItZh;(=2b8$efKi>Aqp2KgZ~} zp28?@Z+FriijZ9hw)xDLljH3%32!$syCceYbK==cgFbLY5ZOm@w+p|@8`zvJ@h+*4a{vYJ|^oaNM`~Y7GnV$IT6({flY3g zn-(4d8NK%}tfhc+x?%j`_*5{AKd0eTQ^1^hmLt%qrht#9<8_do;wAbvBhnL;%@Lbq zWc~~oin|j7m)*^0+MP#iIwraHvk~9jjBie@9pBxI?Dw-!^awgXq+22J z3lHcRpW{?!_i;SCJ?d9DcG{-z~I9I1xh# z;nA@(5^;ngjyHqH2ouphc2X4#5Q%mdFn4qX*-WG=tVAx8jkRB5i%*XAoQs-svNSoy z^W+%Mla1%i5zmud&tvUNFhR7Z$CmS~h|}pY<(zJu{@|3eC&$W)*oY5AB38sitS}J| zK~gBj9v0(-*oa?7BAyTv@dOibyc2O2BUZ&m9E4ejQ~s)$h*c&cpD#g*UvQdG8yoSI zNW|Khh_xo-Sx&?r$dJia8*gJw&%VNUA9BmzO&e3rQGbom3bX|f-YV1l)C z*!|J>ElQKw17TcjvnF$fkC^-=0ZjdTX}GY= zw?Zd`?}pak{~A$}1QC^y=x1=J(go=|+UT9&!3xX!vD(yMzC_cAUCu4b z_WZ1<#ZqLo(WZlci@N@4vwQ@`yN_8lVB#oHZL?B>k^w^W$cjRa}Gk> znTcKOaytz}iEp6QvE!7Ee%Sl9i=!ye)ADzk*zw4YCCGll7>h_8Y>?E=?${Bk1RG(& zRL3r%q#I8%9TW{ByP{pvjYb^@AmT`5KP6!MJDJEG8J;>6k^7-zbb^;4T{>PmBZUMv z1^iZ{$q95FJEnF_>Bw}t9OB7C*Hn|QZc#&A!*+91GTFrO?zryR8Kq_B4(VYJNns}N z9dXLNBUv*M`efQir8qS(Bqd~W+c&|0`SLZp5UjTk2kNh#^(nB!f;Zkh0)qRdUb zguLdC@qnC2A#prrBJV7I)LBL(O2;87UF@!QIPv#+Ci?@Ux$>bk2VHW3jb_d^^*;DF z7udLcb!8rEY>2DCwO$)%$#QnMV{}bk3V&Jd2#>^?8s?2x(k&(%!&LxO4zn>L6IqBc zz$;g>jcQ~^>PgE78^@7ARcIUN;=>t<_oM|&pha@tAXH5n7FK&C%7Vv0&M z`EU)#MVp0*jgK}A#R(>t*qP{c5LZ_GT7cWKObZX)InCu1ee$6y`mBy8n65O1K5?Ct zqY4POd>+Fut3oFC0xeq@no0OD5p>F5?tr z3OMQkxhDqV(>C{>a%Z(`(9d`{mT(PXi^sM@ z5(K-ZlLYrd_&`CpF{9m|wLv2o43+_Qu@~8RL?DPr!KZE3y$6SRM%y}e?>t9AaLVT> zxVP3(5bGlf?%m-i2o}tV5h)jToT42|xCXI};uw?@W(I1_BwX8QFYAubp7?m`{vpJ9 z4jOR7%*XygFVkw-fbuZ9F_#tZ5x(V zthR6sV*5@C4458_?;TA4Z_96@sS@50Ghf1Dot2w;lhe=4lp+MB zqrgsN`=7@ApNvRO+W(h&z>)?#6T$x0wljJ1;2K0b6Av8r!w%MIR&r}npK*g?y3zke z=hm`5N5(p5+B`JK8fQO^oUd?_=UCXJk((7x@?_0$_oPifJb8x{PNqBihK&j*xllxV z@_B`mTrgrd$<<2wM^cgP5$vI+31-2mY3_A}F%$&z;3&9vn4=(=8AriA-Z4iEg1K-M z+K;Z~k_!Gc3^yHSEsok-HIi+V$9fTp4;zO@wrBPQL2e1!#yt31= z5)qjP@w3h@!Afwl%`AWED3C3){TAZ&_%MMRLB~Y}U9e|)5*TQ#7%AXH#ow^@+>l9< zXNhceZUY^d>tya`N$w~15>rGb&n?YCggmQpX$4Y+1xbG%AYuLW^-**^T>tuwav|o>gSCtSTb+vqT0nR%_HYlH`g}Q zFRpDKS$XtKzJ+*c{o*B64fS)YMrCJZkIJsf9y$LEqboXoWO+4TRa`M@YH3y3(uU^R znyP{&NUOGq5k{8Q&uyx1LJ}iqP0xogvVQSAYu?1!HMOVDuBkq~c0_$m?TDProXk-p z#^%heZ<$>?uc5xNxpsDS)1naz=FJ(I-r zs+!vQ)k_;%s#?x$tZmM$<8-3Ar3PPv!#<8m6$k>J4nWMDs^)o1AtCC#B~7(e^A_bm zN<^eHn_FrZRmIy!&9P>LNI0SFwe0T0L+SpM(3G&h>F6o`lu7s%3G{L4zv5#rK2N}9 zwmtCBj6<{i9Ya$F9^pSd6H!9`mP}sQgTOzOWN z^@3~sr-x!na+S~SKGeS~lrcKSc)brdJCL`f$M|fI?|TqD+2{9!Z1UNmT>t4uqlWyy zTABV8%QF`Y>NoN*e}@pfjvSCRs^7pN+5TR${8!nT6H5=vs`Rf}p6MTVqyH|T%PfEM zq>MxTsUhSmcl6|GOw(U7D|@8>kV#Yxi>myuS+o3|LjKy2KNY&rv}yjDkblS|{|TXK z8UBn({*%f6ll;}8(hPr}N&fkidrm^-PQy-@N&Y3FX+sN;t5RRUQ-bIGXv?4{;Fb7* zHxMu_rqtX0_K@*eSt!kzm~OE10O8*w{0L(|HpYHsz|NYI)s!`SNR0cd0``E(BhrUY z9uQOee+b0obY1&)x5eAtjer^H+5TmdVmi-b?FYXSAN`H^fbH=CAI1lK8XxdQ0KIZF zZh=KR>W>IIF{UY2B*cfTPO$xHcofe6{dt+_89!Q?Lx&y4;oN8$?zWFcSB3LT#KG~= z9P;0{JmjAn^8eL3n!DyOE|{L1Uo^EGPfs*dH@9#otU^##esNVrWp3rn3KLS1KeMW= zu)L(KxUf98v?{-JM*g&_g4}!yLuhT&>D3KZg&7(1FT+ve9vb4E9uTEYo3Z_rb zw`!VOs+yygDraSR?lBcba9vb7>eQB{CiLr7`KG1CeQyiS}_IME^w^Jh#iD=n-n#A#-6OVg4D3zMCy z>YAD+%yO#cEm^u4uZUk#Q|t8;iL2aBXLDIqRcMLPqrA0KToo}rP`;g9#^srFDQ|)W z_083D8)_?-ENz-so9pDQytZLUb&bibr#{>5B{M5Z@}1^9pn8;5o_l0QAZ1^Tk0@ri*!G>Y)e!1;^z4XJ)^#+rOxXsQW2~(uL7-Q zI#xw-?zEC)rW#dTHl1EuP!ZFZXm@WsPqh~=W@R1NQGWi+oP+d!s@ttCCmU3cI=J)E z-ttv8)h}33+vK!edF^RSYjKEUe(ZD==KzmXd|bhGkfY#u*uARubWFCZ>Z%vlV6yBS zXljtSIz+vc7aX5kUf5nX9iP+lbC0nqm^!|M?HO=z7!{RFwHh(4Y((o~R57VKhb^uK zFw{g_+#DTN!;-}dLgvrX#m)5#7T4C8-cnw8ESiXen#a9U+^QMVyn&IfaiC+Qys&ge zZb95J!qzB1uCQQ?Ra#N$Nhz)hoklw@w;;d0%5b!v@vOMY86+ZkiVP2KDN351{#A3} zBD7eM<6wTnk~1(eu)VX#dip5FcJ+l)4EfVBF|MD>LAz21kTv7D^8C`6rioT#SmE-{C_w+ftEDM0V8Uu>=#E1d2U zV`EMuJaSE8a`P)oW*mc|TO%+!d3Jm+ub5ieeotE3+*rG~CZ=OL{n2fxskJTnI9L|f zHZ@JG>#7&lFJ91I1)IYx zrtD@^D&#Tj4R#JV^^A7=E=TW!3|9vn+?~=;?F?5OD|8}pyPo$nQ&N6xu`{%Au*r&V z2e($yaZ8#joXW3_IR;SQrgU-j>x?%g&Cw2JW+zjtTM&I-U3HT=nao|MF;3pLfAUf+!MiqNR+@uS9#KRGmF5sts=mJwJ6nB2T%e#`tu1kGz)IvJOgEw#%= zEXtt?98r@!79lNlOBc-zjaZP4Pt6(CP4h>L3XPb74=z|IFIc>E!i3O> z`SX`9p2x+J5zV!R%?PWhZmIUli!g_%UQj#2Dc9sItL?hVNcSpvp0`)T9P8$6F+O(i zh%snyJ`_7~3*A(5f{@WL0!76XV1v+naHD zjs)ji(PH8JeN5b$F490|j#!2nE$4{Qv@o@Frkm}Q%E>ZI<(%^CYnGYXh#zteaQ3g5 zQB)Z@`@1&I4AL_^$4(>NLYXO_D>y@XdxHf=f%pPClVCS04V;OOCrS5A;xTG-)@Ylp zxF%P7axU6#AN1(6qvv6+I+@y!&TOihG#PWVQ(9UQ={0Sxv^ecMNP1MaJ85*XLv_28 z#;AHUPx+i5S-gIUo0i2_c3BlpqH&iFPK*pkY~?7!{~~RpMB6Jg@EyfaajTtv1v#z*q2byI? z=T+{6RD&y~DQGzk130U3+F{WJXQvAGq~dgYXLP~PgqgOtlFc;CdoIOTF~7duX@+}} z&uh1DI$AT==PswqS(dw(9ofUhpR}VRdpVK4vC*t?dKf<(v|F#vwZ5mo(OGlM5QwX5 z=cL2)jWgJBki+$jRZ=;D=e?T?EJtb_&4*?;|nS+rz)nFYFVMZ3a=`xEY8vu66ZJt zrR7yqOK0R^iK`N0c0uj@NDiEenYkDX4{grnp04Jcl+l9iUu48wqMKaLlq+s$+A8{pfa>^QT6Y$J}+)KQ;$&bgob3)=#hgsGJGMD>O!YyI z5_5rTsxQ*)=90s?B9G5kS$WBf@{-CEB4x$-zzwT%GNCGpghuDNUR&o>A8#A8EEMsO z({5^GyrC7kvU0D_+^*nFa$F>Wr>hkYNyIn{oTFB|0s}X}b0x z(|)u57i|m2hxfwH#CM$H+KvN#%K_H|)dyluftrw;CE~cngMUAAnew-L96A^Do=VdQ z?G)A9={*yhNOgKE84I7z0+;DT?Ho`}ofPG_yYl8JO)X|?SvArtdH$oGr|419bMz?B zNjiF#9u+-JkBXkBM~#Vk7#rOk7u_8n-JReq9~We}wy!1F|6uuWW(6i3Y+x>q9JuD) ziclRpBeQd2WFsGBF5Y659#iO?e7p^Gu!&jhc|ST$ixfIq6XUJ?(!$*G$g-<92~QuW za?S#gRUmgR&Ahiamqu5K9XrisUqxlyL_KooJ2R`eKI`-n-q`W%<@ zJENjwrKG)MTSpjr8*kY(9`p#nS;m^0pFc4)l0yxeY3o*E7U8>=#=okqvu0lk@&~9jX&J0uXOb8gJ)2gyySKYgjd?dtlTzv z|L@p(%N>I6gURvr@;{a1+mjEedDEx73?Fyn!)t||(!whP;S2rYi+tgW?M2Dq=fclM zdfBP5VneK07%MJ_6&J>eNHljW{#5g!D9dJ>B;Z~#mqDlJ;CGFarg!iqCw2{Vw|m%! z_j$+BnGDQyM=$46 zw;hF9YHDlmp6T0aqSuh^rQp3Tjn&KJfep;)dSG>%C6ZY8CU)!^N}NHlyY6naQFzMK zrsi-uaq1|hJ`t+r_qN`&&eBdQ(G~kPN~eLG$#@&3>h1vAHVYMP;-l`oS2Jz&PU11M zz&19@!@-RlN1jupdwG5!cmIj0mN1=^)j`_U`hgcZ+obI+ZtO~D8`GFl{~Oyjh5tA9 z^6jaDe-ptyINHBg+4fLnCyl#kY1hbfAg6lUPH7Gt!;|sH;X=Tn^vWO4JdL7Mgs>Vua zCMHptxSQToKX+*h-2UeqexroXR+{g3GFA@%csBFsBjf@2(9V3j1B|z$j@uA?g82M9 zyDZqmryE9?yK(--jpr5q7?``gv)r;m5W@J-h99O^f{)i9CYweFn9cQ92+8YjAN(n{ZY^WtuGyEo$OR>O{Mw1<~QW^E20OTAW=7cHX&=YjZBWn z4SvxhQqQe%{`gKZ&g=NY-M$0Z-4|!acbT>4@6|ZFUa%YLCJMUg@^ugRA31)* z2e9jadhpuS9l&l_oE_hh#$(Xk+;peK+3_ba+iTw?adz*(uD$YJ9cRa%)NIe+<8gKY zJl@@&zt7|By2CEy76Nq3(HZUJt(Tkw*iDSHt2{uuwQ+Ve2e7*`&W`VbYp)zn#M!Mp zfE{1A;w{J32e2E2f_v@O!>+x09soP<@iD8_$zK?C$1$Gu$MNmxIDcE=uRFrsjdt9M z;{4UMM#tU5p?CeA6X);E1Nh@>HN5$2^!OX*@%KQSzg_UhvB=$+F1LH*{4HyZmUjg7 zv}1YsE&+y~`j974ZLW^*4)o@4RV%(qh%fAhVK)*V*WY__{vOD{H5`@NTz_B1 z+3iCkjOGPkoZW8NdDAW9i2@B021emS*DS}+asGx)#Q5SS2EDucuXumAI$zog!zKqG z*Iydy)s2H-tKvxK7fiU%&DEvA&YQow+mJULt6|via?u#;%kFgGkwznV&=A^!U+N&*sMr zG&a6>M#}iTPtWGZ56Z;G_Y5?!^ILu6^qv!l(f5nfM|%pB@mq(+=?`UaWb@-k zRASTTuc<^gztulZ-#@Cvp5F?^=|ge)0de{Par*Q)eR`ZeBTkFtR0Z_Y5H zo8Qb3ymEF_z@Fcn$)iDj&q&Eozd4h7^*j?sH@`J8uDm=GMK^!Ul`j3^WbWDg_(3?1 z0L*?EpRO3cL!i5{9t&InqjMo=~?ne7NT>+&03OmteQNnJ4>S4++^awqGo7`d}`m1G`yU6F%(By%L_ ziqbzJnInBy{Cit6uQj`3y!%Wt^U@XL)xTn7j88ZvBFMBuSByvLk~zkA#rVTF^il7~ zy{%&O;m~$QltN z53tH5JO0wGGh*Zn>xLM4p!HmgJjimdPn`IJt-k08(fkat_yR)q4W{44`u0~|S5T%s zJnE_y(MU4RZPbH5AmL=Cy(fz!NyL0tB$~AYKQ!Uq#&vvq?L1G-yY8K;ao1+O z5A&-y?Wx+_>~Oucxy|7!+PT3IQAKZUc!HugHN1iRGMPtqZ(?|Ybo;^+a)7TII0biZ zN_ebQ>NeqRZc}*T#ND9qXq-f1?mBq1O6x#sC$eXq+Pxjo*2Te%+PwwgadP0B4;~|L zQDRs6Jw`DlI-pgXf*sIO{yfDypsCwW+rPcw$z%LYh4#Lw(%!d-JT4A;%OT#*llitc z8eC(~?FDCzGkLBv?j_H2#z)FL4^ZZIShX`wCeN21ikqRft@Ou@~bg$!h}NMNT{)PSTv0AGRpU9k65gCnW3=X@9(vo)0Hq z&J#$^&`HjeeJA3VvB{ILhN19@;!$F$SRwMf&-k?>=M$7Uk08$xFA>*>zZb6;Zxinq z9}`~`UlTtU_lcZeFrA*_AaRVy`2_Wg#AfkKak+S*c&T`$_U~i1&(*islWa$j{4?-w;0#cZ++(AH<)<5auT=&lHhsH%@)XR*~zE)b9}Yi2Ruola3e? z@w4tGJS>)pbHqlmRa_&k6E})m#ckr(;;&+79QaJXLaY9N zlH=FB>lgkrCC?CNi}m6%@ka4(akKck_z&?{u?q%3=08ImBTf}h5EqL4fpOYjA>JuI zE50M{6+3ru><5UG#TjCa*eqTk{!!d0ZV_J<-xt3We-t|=JLw%FjuG?3V(}QUQan+d zBQ6jZi%Z3G#1-PD;x!_FSC{p3yZC_knE0Idn)t5xsra?{FVWx8@s}#{ZA0{*E@p~H zin-!cak^L`^4&pyN~p3jamyfe8fdhl{x+%3Dn0SSc0fk?>O|`5Y2<0@kUF|7pIYVmNi4?B(Ee3@J4O%W`*+&TC{sm@?&HX zURo)>r|_L5?7oux16hpxiaid2jC4aJ?1o4lNgj=Si^nMZ1QK?0B-fFpcv*&cvBIwr zZxQb%XIR#K;tM4Fyej>6$sb7mT=G{W;`w^vgM22F$D;p>gUMNV%M%IxSjk69E|NTr zM7%16FCZ&$9V0FwXW>ob;w2>fT_dhj_$`t*N`6rCR>{vu-X?iFiFDo<|Do`IO8!yo zh;t0n??J-8x0oZ27jsG2l}auX=P3MC$&1BH#LL9rk%<3C$+w6PDtwFNr^FA$kHjxX z#Q#AuUun<$Ciii|yOWT6iKE4FVwgnyX_9A%RSK_{yhvOnt`@H$5&wG0cZr+Dm&NzQ zuSv9{54R4<{^D@*BHZVfd<=Q9WmQUEEUpr75bqaX60z)I=4rURG{iK~5T|v+kT_5r zCXN)xiW9|Lu~5XJW&D(hb4kqq=8KEO)5H}d=Y8T8;#J~x;!Wah;+^6H;=|%|;!EP| z;@jd5@e}b2@oUlM`U&QP31X_q=N=h8Ks4(_ka<6f;aTE1@klXGrAjaSMvGdDsi>Q`&sm7)|o)QtDN)CyTu2^KZ|Ca3HoOwn{_70uSquROpxD~ z{15RP(X2B;|C8iIuDd`^7WuYp$~{E0z65!gMOA&jDeMCNwNIjolBu9#)#fjn+ zu~;)p1vu+1IC;27ub@6SH z&%4t8OOdaTr~Ip!$aOZz$s%7VPx(-Bs5o5YTjiZ`>%u|aGW&k)ZS zFBDgcX1x%8{vi2A@fPuR@d5E+@p17<@nzAhFT&q{Nq$%SRQz1rBkmP{5%~&8maBu9 zDjp*C71PDR;&^eASRfXQGeon#3IBZOJ+JG`Iw!b9a$p3_ z`@{#u=fs!9*TuI*zT}?Qbzh2mMYC>-a4X5t2SmQ{p7y=O{$hs6civM!LCh5k#Zs|M ztR}NC-iV9D)5J5ybH&TVE5)_q_2NC^{oo3*z5MUQddjiMz#b#UI2(%q?i2 zESmLR$UP(v5r>JR#c|>kF;A=@b1dt4u}YjLnss96mq=bNt`L7CUM{W^*NbL78S(Fx z{Dk<7_=@%_1Rie`NpayQB8rmza?%LcZi>eKahF2UKZ_+j+`Kx_4NYF>Ps0k>+IlQ$>Yf)d?!lG7tMM* z!p-`6v1OgiaIi+K6VD=##`>6ep?HaS9f|AXo5WkiJH*YRS!ajcbCO>Y-xvQb?jv!X zY}VO9KQ3q}CyBkqL&bsOP;sI-MVv`ipqyg0SSv0PPZQ4+&lN8eFA=X4uMuw$|0v!r zn)Q67`=I1Mi%*Eph_8sRiQC2Z#ZSf0#c#y##ROa%~Q4i?~d@K)gu2M!Z)1qj-yWm&h02vs{meo5iQa=f%H@Z;0=T zABvxeyTxzCAH<(UyOZisOclF}y~L0>P|Oj>i(#=qH1|nR4!)<5<(VbU7HdRv{{;GF zlFfY-$SWk9`zVkvr+krRT}57OS+_`kySP!@B%1pxu-{4<_U1kd{QQ^nABZ1`pOdiv ziiEx08H9a;m?EZ$hmf%EN5X!j!bgh}#VKMT3Hzf-*q^NMYOzji5SvNZFC$@pslu-i zZxsI|-Y(uPZW136w}?-PFN&{xniMMD)M#POy@-L6mgMwnz&3nM_eIZEM6&IBd!-Wh#SRC;$Orq;;Z88;&$GSS}tXo+8c_>%~RlIby4Lv3RL? zjcD#yA>9p>>6RL*hU& z(SrSP&U0nFU)zf^=8ho}bB3WL#<(mJZGfqnSsw|LSm(eg->gHFk^P+Kws~K04rQ!E z)RDN3Y9!%o8F_?dwUWbeUx3WCtTkj7UO`Qc!hH-9^VAI_=8+poB>o7AdE8bK^RDMf z%$v56Vas}l#C&H5iFwQ}vIy%mWHIiik(iHIT(2s{yqKJU@{`A+{3Pm~8_O3EgCb6w zCcGDk`a+ST>!dImNEsYTqW(}sLln)_BZ_1=o=kJTYfgqKcXOVnCyOZ~ePq$FjKq3R zr8tX3;=g&qK0*n0`@;bt=lB=^yAPd{ZU+i|HrmFa0Qk zArk#&p!lv2GWy4lWDtJ*Ao@c#iQ~zv}VAhLSKS8~8XFZ>y@dZAR zH6tTSrhbr=k&%R{rv}N5BUFPV z(+^O;rrnW0)9$Ee)6UE<+Y|LYiG&;`hvK-DTt=e)XG@+#q8%C}HC-Zy?eBn@j1~OlWdUsI_I?MYh%2C(#=JU}{mIh%xS5)#>QD^Za}F<=v0` zblTR}_wl^L>q161WAD1^8GC*mWo7(v-bXbVHRB&U(emv*FYn#^yXAj8?~9$*7Qg?f zq;30x+4d2+dt0l6TXOf~@ea9d2d|GTi84~fQyt-*y&GBhlO%Yp9+RSIT zjcqv2HYJ;WQ?`T`ZQIw+-g>`Nri3^B4H<-dwjxL->}a zN3}2{kgx-320p|&B#?WN2}wGWUV{nsQ22vM>uB6H1?QC>7$mF!Pg4m4j_2+>NF`x- zJ$Kh5k%SRvI}W-adFa@+!=`(eSb&p@5()` z4rd@gwr|4}1SOw>H5@BB5rwgnuS4E^R)9aF;k%m=Iy`_7+xJ)tEmz@8VkOTumMrdt?aKH-O&7h}CVA=62l*aZAvj4zn<_rAEec-6owo=Rz*Wosw+)oYozOp&= zb}EBU-`6(F)~TFpN_(9B+fjYKZ_Iw@vix$(_pK9-L)!9vXZGo3pUoSaoz7&o|K(V; zA_ua~2nzuVK0W|u=4{bT!Y49l>(nEP0t zNDOp&2nF_iDlyn4m*Qu}k1r#oYf%A`*eNlsYhL+O%ePBn_b!EW`MJbiT_&<5yG^3L zjDB4f{IBl51ir4STK^0;_uky5Nz+@P6YXu2&dpRpDNsu0HZ*Og6b@Qvg0!;+%&{fwY78q?q(NJm_mUq{dY6^i z$U=@%dbgE%E!CwdeYutSA)4A6Et%U{d#%iym`}R$ud*`fYr@J<`dTaVa_S$W@?W+x z3s{y+r4Lw{*Rk70|(hmefeC|CkCNvJ& z4n#tH8ajX!D>?L#WG@UEK$<+%$iRTlNWGJ}+7I%nW{8j2jnGWS7{2=vw*Q@$jr#_a z1nu|voggMNGsG~FaXek8*as}r{;JCY zMb_jNh#^dca5aF#nh-SY$6PT`BK8{lh` zz6SjFv)X3N()^Zzc^!V{@4$+jj9B)WNErfrX=f&%>@G!M)>ua4_an&7CR>EL9s4ww zHHX4;DP-cjJ(H;(a$DZdLdkXtHx()N!w1-z7$@aW-DO8PY z&*7o=~Z zrkj#OHiS5U&P5Iva-M6^)J{=P(L9s$INjueY*-%4m`C{td9dotn&dqA)X>SJX2d*JnO`0$kB!XZ ztYLYaY8Im=%ofvRP4Zxcu>RhKmQ$qJT1-w@iy^l-g~F{Oi}~VIb19m~+-}O0&cyCy z$47-u;_YJOr;zS6nb&uUEN=-()i4n{wPBuT@^NH@Ba6bu$(+&gCtvHDpD`of0l_a8 zBX=Y4I7N&lCLeK|yPXP(Am$asoA*GGQ$xG8hEC$EOOPYStTp@`OH0hl7F_tAO%F9+VIE;HpGBrG!DLuFama-3^?lT%hP2U9Wgk$*;sDQ|;y zS*9s0h-I2H(!-95!zvFLX>29Gz?;3oTQ2ybd07#VaPo;*E~JVDc!8J zh?sm_il?~a;TKBEJ;5tj8FoY`7J5V{<-$A~H!IEMPgYf8{_zRElX^<7SrE=N$C^c< zYf92sq^T)JL74Y4BN9N1OdExU8jEI~o}7PDvaE!~7Sd!VtRguho{e9#nOVqez?$V~ zXV!T8tpG5GESym;y~sqy49?qg5j_8g_Lab_`CcQ$1XpFw@er;vSNYeDS|_!b>uR9# zykY6w66bqNM+OB{L&dI|1>OjJb3iLmt41Np$c}-wVL?vxWDoAbcz$S%q^de8(ITwp zMIQCisZRDrU=s0&Bb!sbdMlILZn4%n+M1eA^N>in#G5jy=1xxto}RWCqq@i|S{Ys} zJ)<~9##@P(M`1aLrcq1aiOgrbY1Zy%NKTYSErDk+hk<|`e^-D~n3JHIOMIDJsi9^+ z89W$^`GErQ^O#XXj(c!!wT$y+j^$|vVazRwgEk;Ffu~h`=c09H4Jn=%bG&^0g|dvNU$Lcq~gv1<-~6@#DXtK4nDp8haG=PA{w_uqQg! zGZeuOrV!@iH@sM^P&5R=O_}K6h?F9Z*hMK027&92;XRQY%gEpFN=8Q@qqZ@m6er|aXwDvI6vS=9qw_t(4^uWMmiQ_D9?j~ zfJc=B(!>nrD?MM4x_P+tP^7IqT)h#Y9Gf&KHO`LBUhC#Z9+&>?^b!1K;^!X!Q}NWt ze0jL`eUjzA2GwsFyw_uyf5S2e4_&`scx--w+x-&1nb!T3D>(0ER zZQYsIvQ2muYw|vJ>(0EYHf-hG(-!N^gL54ad2O9dM$;+ln`2woH#csL<+L@&atd<` za~I?+EZo%Aw?5X?-qzh4Ti@8zk+Zp}DW~vc33hgM#&WpP$$BVg?{AK+?`UjlrH8El z31y#rZIrI4udL6jbjp%=$kxQ>;uE+2-nORPRth7u|x_Bla=58|?Pn6$J$#va(LZq9vjHA=9)&roA(F z`g%Kku@ASBv3!3tuo%yB8MEn|0JCgLt zAxQ^KbDW*NRK@H#YtITVR_Sk=y%P1N78>@(!4t)&zqCd z{K@a;dHD|J^RC4re*S!h-_US!p7$rE|Brb38zudVlI9jk|D1-C(?6Y*{(*S<`y~C7 zlIA;-{`(qEPX9;CJho~RN0T&*l!Q5JO^-f2WbSw$3^D>q?-qm3K9%m?@52?vLGq;4l= zH-=Uub``9sT#9zxG*T^l>Wd8%g>+dZJ7c2w4W)QWD0{QIIcgEuUDjap(Q>1quA~O7 z(-Z64+Ss1FhjnssrFP4(Rd}?j8oS+k`o5ghO4>Yg1cU0zYs!mJxl~-&Fj5^1*?e^b9c${US7K~qz?4>( zl}9V8SFLnR zx1iLi1NmQIz(~9q(c6mc3?rOZm)CPtd%9b6n1Xtvg(HSFdGwQBT}dT|sLbG;Vn?Xy z>g5Is(b*Ymk2g<&!TnN8{|B~1jpTH+w0AZ3<={f*wBD|kzLsu8HFfu&hJ`yfZtN(e z2^jl` zI=H@T>gsH1+pHVG7cA7JldD+!^{^Aaa~?=I{MGq@ozxvV?9Z4r+|$~}bc*_#N^c80 z)2>d3D;qH%*2%JouAya{=8^Vr_Kst&xZFubI@)mU_3pf+hC6v;F6tR!HjEA{etg*$ zt-!)Esl$6l66(^a0cS*eYe4H2z1U;8XNWrk+{4oZGQkvAVJ*87!$THU&WhGEGxqj1 z_Vqinu-lADg>vh+JBHP2bE3?yuy-xnk5TQef?dA1gdel=^OnqOy}JhYSnMgM<9|Ep zyg96jRa-o7*RbS{?#(~ZUP$Ylg#Q<|ST@pdk?-AOnY4TGmXw#~ttsBocMsm8(!G9V z4`$vXa}VA=E5?4dpTSnXcG1PMGqG0}Z{K|!J%0$FxA(mAL-~J?=IuXk`k`fsfL|*6 z4lk8`hrQ)w-VV>%lel;xBL2yH=f?MW)!6_eAZd}1*dtU0hOQ!#cg##^iC+_rC@^G` z*%79qVHuA!c8?+?Q`}K_@!4@0U&?)Swwu3P*l?*jOhJ-_%-+L9hF%&C6ByZa?>T2! zlBA1-|LdELPC}RGJz?J3=TYcD{J-2S1T_sm%E@~Qz@c*F@tB2Q5Wl}C$8kM0-w5K| z19vXvSb_guxdzbQG3?6q43TRG?cQofF#aH-6Jb6DbB|r8IuB%c`=50{eYF2d{JikRp9DT0iFK%BUJO{ z>Z9*4Hw|@k;5#t-b8-)tS3N}Et7kZ$Wl$g2HLgDTx@Q`9j0M4bHOV{_6|&3Ct$Mj95!b3wQy$AR9^B%U$EQuKIz2`k_BO>{8JUGX6Hy~)sNKHi9vikAT z*#^fY#{@NVuQi_ANb~w*Ec)+KrP;^0x7r4vdobUv_))$JKkl`53D7;r{}O)W=i|q{ z)ea`nql_Ob&3w6++8>n87J9VtQ4&90zKx|mM?OR5t^_^Cs0BfqEy2Ci_-Z_9r#xc~ zeknpaBK&ZCFE%GXq)OZZ&5rNwmAE=dy2kNbgAcvB@vyx21{m#LdJm1)OyXO8xpKpw zA2`Sq z;o=cXx@3{j5yJU_=LI5X%MeaJ90j35hvs+FX`rnfyces;QArx7X2Y7N`vsvxouKij zD4woZrC6`HRxzfyMRA+rd5V`R?p3@-@ym)|Q~Xy&*)IroJ+AaKiV<{J+B;v7``VLU zqLIu-jB2NXZ2DE?d_cfHbFLo?k2ijOJ2p!klWg%daB(iP=n zFVH6_&9xT!HHxy259m&%uUEWX@!N`zDIQVe%kI=OPBBYS{F)-3Z_Z0Tic!V$6)#s5 zKctXg_^{#+ z6@RSwGez#}O*>vx6#t%x7yq8XbSyt8cdQ~m(jq-e5$_NSE#D3zzDVii zifa^OiriP8=?4_WZzt$4C@uaSKp#;0Yl?R%enas=#UCm@qxeh3KPtYeD1JGi*TjHl z{%MMH6i-nsSFBN7uh^-0uA=zSgr2LFzEM&35kmX}N{gRN*dTr~fkzlW2Yxb$p#Q39 z1f2K`BGOMJ;x|Qcp2mw`Or$?W=`ted4a8K#*reE^@qLQo_Y!iKD1DjAeO~da8h@+O zw=2pwrqKI@(!VFdzE_BtBwtf}lL-AEC_jK@CFwLG8BNcsqrrok^Uvc4;5L5jGsz` zKJhn+lfYckz>_q-Oi}zy&M}O7rMD14i(g5|ZzB!7Lh%cVw-cdX{77QSD1Ib?-_!V? z5J5kyD1IVA|AjQ_P4-hl`Y@K~7EVsGuM#kuG~yR1ia$ui%l=BhjVj-)c#+EOA!4a{ zh2r%ZFZ(4y-@T;g7>4YZ1i61#Iq~NR`q!jkm-umn{D-7*vb07ym_bDRG^J-Ko~Bq# zoCm)zM96I-;s#xdVz0)FUq-}>Uq;|pm46Fy9`?6UIoan3--e6)#i1_*(@3CY8HS@enZ^UkxfgMugt~Q2q;wuPNH2oqT30Vp$;b4W@ZP6k8Bo zT~O9Fn2%6ZLL)1|*^08h0e^|o<%*SxXAv>>qlztxTNGt|1O9;0pH;j}@j7CvVSGjL zR>j*D?^k?C@%xHDRQ!qJvx>h_{GH;fimxmFRq=0%{PdRjXDW(69nh1No~bxju|QGw zTZA0H*k$_ViuHAxx3m>9?pDDwMB&Nq`3vlM43iobjC#os*;%NWC&<=kiEx`uZt zI3GlGe91h5e!**cw&x-u+Np?$^V%{Z&QCQ&)W2LWVN%*i8uNTB5%tdiLkR- zQS1fXuC&;TdXae$IKX(+&o0H?M2!E-755Th{8ftA5>anoRy;sN{oSm18xiHWQ}G}X z^?9%2eMFS!0mVZ^*#C&)V?@~dgyPdg)b~#ne@;Zb|4Q)%BI^J5ihm+zs~^`XUy+qi5Na;t2D96)E|CEUGyrA^&i740WO20)!`3w^X`|$F&piFaiDsQUF!Z%Dh#e@*b}srw%s+*R}B;J6p6-x}Ca{kjnfe9^qd zzB;mh$_>^vc%*Xm^!-l`j@kR<;QRxjFJ|9B4`Y#v%8KdYPi)lfp*u)DGH4ti=h?&7 z&KnMox-RSbdyl+y-5W>7ymw|>|rYZPoF*P+xga!mxNmU>*o*8+GET-c%*gD!HQ=O z`**t9pZKnsWn|rO&+N84dKTRix_)5ZxSwxnn^5@$gVtPp*u3uI!}gx`6cP;H$pN9{khmOMM5smyTV2)7t}^thbH6`a$3EC4;_6HGV3gB77G z&6&5pbl)3BM&RkUj~o(94*mKK*zn*>sHfolFR{9>`%*!PRJ#wJH~##3_49-8A1L2_ zN|nFjmxG3Jaml3zGb;8~Tw4)%I#LnaNUMz5Yo3055FL6NYJ5}vGREaEb1139!Epz_ zgIvp>Hl~Ft@}-{5X%|%()1C11gL@C*cku0doXo*eWYdU7y$ z(7xJt4f+9Edi((G=so+f!SVU22T@y}|L~^m-oMPTe3h8)Fhv2M##C!FV=#qF#W3JoK=9KH00m7x<7yr1S^HNeeE?AnzxB;EATFIwqM{C&FOuN@ujRoo^~5$#9x`^3tRvhE10sL<1!fd zF2JWA(r$z`wzw^`IosLdw#>dLh@iMFv*{PicHEX#LcQ;&`S_n=!Z`r6`2WP>`LD!3 z(_hKey#FjL-fcg3R`412^T;>l)L(!d2&OElLW|yQ^$yctv{JsG5oi`f!`ZrV5PoFn_|BvxM zVAxy0NLj@NZ(v-?n%~nB-YrX6_pn;Bfw`Uelu*9lwXi?sEQbmP>E$S8y(5_x{4+|J z@+pTJW7vN{#wi=FrshQ{8@HlDf?Ri}Y+?nmjCV72GYfBJS;23TiqQZ#6$`!x@s!Pu zu1JvAPbsYql^v{RK5bNJWz7!qo@mOJbA_58{D{1>SqWBFe$Yl4Q`(($g+?j^A>WPo zZ*xXY>EL>Ll!+uo{({fiFmNpX`A={X7(p&){e=$Y3tmp%Ne&eZu0y@~7tN7sNekYG ziuIrD@WuomrQ~9V8W-f|B>vNwtCclA$Sr{VOB`x~G_$|hk(?a-3mc}yp(4Q_GhL}e zWd}FWmNF;Z?BE43++XhS<_CHE*1yc5@`L+mOQk~<2I?T$G)27|}3)GcoQXF;cbvqPbESO?mf#s%*n)#mWV8}_x#dCOdy>I*yy zyVHD_W3EK(Xy)_?80k0TU%;V%>e9y<8SIcE^k+BHbZAaQlE~-KsTfg0TMj+JrKdXd z9GA{;Xx^n2`5-oc53C8C1v-;kjtABTXh0^nj|;2|&;VoXAvALjj_JZ&Tn0*%-erbM(Yk?BrFWa*6zB+)1-R#noprexUP$@!0M}o3)&Vn| zL4HLbAoOi!SVsC%O@Gh~PauDpSZHV6Ylb6e&OoK|?=!=^nHV@j`45=kS5Vu5<;p)~ zhI7cTQvM_6xRQ!0Bd|jGkD1{LWE@zj^b=;7n<@pWm44a`&u8&#l>Vt1rbo*_ZGd~H z+gU$1!&5O519i$Du)=?2`g)~zS>fwZ&4C8Zf43FpO}4-)r7yRRVYAR9Uzq+717`*1 ziQ=oQ@E|LCy(&6jg*meXKBe@{R`@X5EU-c8+pO?Mtk|g1cUocIMGb5Wl#9NDR+zia z1sat@XdB1~w~w ztsQ=a-Kka6f7uS7M*G^7f4~m&DNtZbpjzy^*$#8JvcTEOKWK;fv?I{2^u2c2r2QQM zZsucW-DihqvSB)vf5;Bg>u{h;^Lqq*HcYqjAG5>9k$+C0Nzy-IhjVF9kMdu)!_&#{ z)%0)K<5pMH8G%0K58B}z^81zlz8zl8@@@@uh`s?|coF&A0zE<>@Qtg(HzR@Vf%6=G zO1PB#9f1plK9n*J@7f!Ioq@|7zCXN@{Br}`e8|o^L?k5h279KA^Hd{)cd%14@h>BvAx+35u){i?96EMIs(w5Hw|6z70h!7w+*O1(*i)1bBjDl(V@*L_Cn&B6B& z9zP#S%=AIp;%~!nHvA8v5I+A7Ol?8`D3m_U4^KgOuPEeu80-`?w1D@@{RJqP>Hi41 zSpIVnw*4hA4-2&$pfPmPZpc8k=*N^@3&p0NuVz{PI}o<9$^;QA?zdnOZ*Rv3$1TQqTuyV7uq0q@3B65kW`e~ zxIWr~WTB0;8ub(OqeP*`IYI@4hsoPC0p;V`>2cIusEG=3x z=6-}t`dfs1Zut+g30fz<1-99@jmh_QPvj$Ovrkm-^G)Q9T$c(?tVUIueP2hMwJ&WV zH>ooFslwVfX5zP5qy3#ijho0D-ey0W!P+-|((@>oxs64!_Z_@o(%sB(JIiA4yZ3_0 zeW*Ee2gzOdP5OXIcRJkrE|^3I!7lm01(Uh#FweUYg3sbNd3h?x^GQxbnI_XYulZ?` zEhOKdy%$i`zmnvV*&HCr`=yh)>63XO$<-j?stWft@OuFHPibr3ZkRu$#m3b2_=kEm z0w_(yIzQX$BSh?dU%mi1+1__8alCl~{*SSCkeTM&*M60SK+xXT>IeGlea(JjY70~~ zL)9#*GV7?xtYs3%)#B8x;9mrOweaiheS0r}n7!{RfJbf`?=##AImGgjIggN!n;&I- z34J2uQxP%2q{uBDN~8-zH6G<(Hn0w2l#zwz5Z*B_bwof|yxR4T&;@vR3vQ=F+dj26NT% zoq)UW%Sp%WpEmfzdl&@olNwWJ;vaW*DF(}}89v!~6>;35h*bjTJ1D%F55CsG)Cv{h z=0rykITIqIaV^SyiXg(|jt&boFRerF!(MIyEg<(Pq`e4T=0kGP-qv=)IH$qKSlguC zt$sq#I+x&cE&HQpdps%v*^-NV7pUfGe^GXVb%L_ceix!0MzfQ$7UfLvkujPsBBL&i zRVVq~pl5KY`jKf&qF+vPCPlPq?qoa9x)Kq7*0HfagF}2KA8eR&ZbP(>*Y6orG-($T z&rdYtq;GPhVgXqz(+uVo9#HLPwIc5fALRXn42gqFNo=X#*f9y1KyaU=y^9Ph-aIS<{v1pAa z5u1~1-i;axU0~jbIP;Gbnog6LKLtw6G$uoavqvFmtc@1mM<=As9 zp*e{8I4_0hd$!j#p)cXRFvaJ16ckrYFgxXCZtOs#ij|@$9$jg12_d7b*zVR?sei9@i+pU<}xr5 zdNP8ltVDWdL|=p+KYcT#+R$O(g3$FTIT>QJl!Ws<#|hr-1mB666Zd>KY8Kq&(W~HG z$0y#rI0w%D9FF=aq$9>cjmnvc?vxuBg%a1bUXpV{MoQ1a$r|YTu0z2XrjJa6qXXf5 zB4usk{6iAp16UA)^7bb0u?UBO2!2dLobH6j5VM`IAlD(18Y<=3ga7a0mtpi6f6f2v zoVUcE_Ni0$GZi1|4rB0)O*O+9jzU8o8N3RDZpVo4;0I4~1m*;naUm+_*`HxopVv!S z1LVFavibXoJQJA4+Ft@#Is~bKDG?+r!;cDxe3Xo6$jULYuGI-$s}s6bCv+8vE*8`@ zR(o}Ex#l;%!r94Sn6_EQ-Wn>LEN1MjaWyjDRq3XoiBwA-lE^_DzlonK!?5bDrC#cQ zeC@~Rs)d*w)WueHbup}V)zL1^yH14l9}B}?NIcdFXA}PuKXjMJBtSzTluZmmkuVUB zA7c@MUpWH#o_eFm4B^%i9PS#%x`)H9OK{h@9HPUmPjKU{y8+xy_@x*%SNg8>G1wyH znIst;z|U`hgaE@A;TI&`W9`4v_cEv>_-T3u|01NMXOPCa=|Rdtz0~9Fv)MwE&02I0 z)-@06@E#+@zlvdR8SKB0O@m<2mr?|+|A-eqvskhe6}8KcXm<~*sFXjy&DC)N3oRkW(IKxR#3QlY3}Wg zVu}J0GQ92*u{!VF0k=#Y(Ii#S677gJ_V)M0I%1uD(Z=SjNQ!lv$4Mjdz-b1y`RdsMF7*J7td?B0kyI%491?BW*OeOf%@_^j!6>f%r3<>%#1hlFi+-A`C%H!Pl) zHN_sAE6Eo7&$QBU(dAln$bdt|+<7zX{)n9#v9~P-EY6xbt$M-c*0a`4oo1(AB-;FY zsm#Be|8w{+?`WZUWMuK*yqRyG1~l!Bi|w%yD8maRrpXF#YH8_%3plt8>1>KcTTWQu zapu$5-rm*JNLMw{uCtBu6|2_LZ&hV!RdId2QChxwWsUfyDHAVI@O84er>nm^+TGXF zYjiYjkM?%QV$IRBJGxs9X0olVv$<*;TT$4$wt1)VP1*VYl!e7z<( z-P0(puYrr2+RBx6`SHBA#!%$8z8!{k<7n5WEk=@OJoabt>S=UGRmkY*l1ggq?(XRl zZ>O6*p8Dt($?I9LttHxvBE^i({*GvGV+UT6iT0k|)*Wr?>W64?Rb_F#(cRzPOVgYC zTH#_e))Y68HA!ua?Vc>+Zk?EyzIPLC>4}}wAM0$|5pCU>aFLYoBveq4h+U8fo{$I@ zCW0p>f(sMDlM=y2iQvfzH+wzXqm7+?vChs$jO^aC-HK|C^}+Q~tQnn%{%nkn7*|-4ul9OU>W+#VJdfW!w{@27jCRL*qMO<}(GRiLR(E@Q6n=7hkb<37 z+B`l+3Klv;EZJC8MOCa5PS-Fx*p1pcH%p^Om+fT5mR8jnn`3=C8Dl~e-)zxMJDhxy zo$+BVjep8lxf0%m>Q>b>L|4+`Turq^L|vyt^yMfnhm3lehf6WHmtxeM9Un72jm?cc z(eB2c#*SVLNA`1AUbi;d*@edI@9w4#t&x2G>1b%}YHyBW(vh0zWbdzYCmYN;1yWaV zUDe<2%uV9O3XYptSnm+z=!`c#Y8lSljP@8t_(<-f+|B^ckNq)Bh^VK&Sh5eLqtr`H zU3EisX>}FLxd~0`6r$H~T9a;+-8OITiU;FenEhGiDxDs6ZmO-vq_mo6W_V+S3*oX@ zi+2XwjCTJAnrw)d!+7rTsljML8^IAVXC8EanO-{@HyiN!+=kOZZ>+Bmy^4+49d%0) zH{El3XzOLqL!09Hb*YRBIDuW&K-Yj(n92V;riwdRZ&~R<*`uu zuy?g}w)M3&wj;io=b#b{ui6!;%KCLHdG2zGi-FhH)$EKhPa&MDkM?zSMSD9CFJ?P! zP*=UG29>}8xyBjp%ZgX5Fq|`-Gn?@&+1Cp9hwQx~DW|uB1&a~{&aQRNjOWo*QU!OJ zD~eYxE3T`ntmny%F7!C6p{%RDpQjeXJuf+@(OAL@UYT2@1I7m> zPGofT8tdVNgSx0PYD-q3W?ZLgiL*iCWRN%)Bu)j1GeP1+kT?${P6HGe2Q^Su|193oGGNOz@5gVR-Fo#-o!3npE$8$*5i=* z|JV~D#(MLP&c=?mrl<}cj5Rq`@qF56lrG~)<3din6r!&-;`Ev5tnoTMr@&b#=vlfp zAH7lB5+=z*Bif56Gv|cDK7&r&*xqZ190rN_S$C-TjMac;MZ&l7(77ubYmasG4x8qf zNXC*_UdvH}siUsAG}*)7$R`4fv?h3MjLNA{*Rkw=dR?5 zdKJq;y5W}*FEfO*u;mE=)qweIHI{ut&luuO(=DKLe#3eS6=8HYIIAJUv%F+#=Tw8m zj<^Zb(=(Q8a_+<09mB|(*<|fr&vP$(IsTWPvVIlrQ1q^MHzQad-;7{=d^3XeN85~G zeaklCRjgV6v6~UBhckdqEFqeu7xA*dour&;1U;~KTU%dKD>@!e@?0nM@*kJv>}yV+ zkWN|IiDe@+usS{Gq*^)G^~AJ3p=#5P-d4=1oTW+(T}?E{+~MqLH(4pbgq^XTE_8NY z3wf?uWU}dL@vOd=V>#wtO=y+>1Ls3`jis%liwe)Y{)xLUZDfOd^)3;lY zOD`(%*A@Bei~Kc3{@SAS{F0}N9xwV~(PKqFD0;N$`$cdNI0jF}`5C5so8#umJGv$5 z*+siji!KfpT@onztiNb?O3|ghqCIxeWpsg9nZC^0hzznzn6`K!{{55v2=>I^t^tJ?pDo)8atjIz7o6ZEaaF_@V~)o=T$?7e$?{pp z`iS|+%#obSIZiHx#{YE>dU&Ld=H^X*+;ozoP|*ds4+LTwew4#~EIEeCk;h{ee!PS9 z_vG>+Gc;fKX#-gCXA|=g=2Lq2*n6t;tycsQe15?n^IL(RSKnf`eoZ#fRKB3vb&;Ld+gZr@09a;pst9Iom+5N0{t`eVN1D4>Tc_chSo zazqw8_C^rTaqO1kQG~ta;CGg;4zS|k7em?{~ z1TuW!=hn+?$hm0{Z7iJVd}GEi50}R$kzRelO6S|O2xQnUuD(-;=-U8&xvV?`+ngm1SMD5@b2(Q*?vP6WnJ3$2vSM2}hg+Ktbu=GxZ@J>}+1!;6iqEh(8#6+D$U?O#Gem-G zqgI%I;z*S`6I$fGEz0@}4UrESs7B|&m^bAu5jTSJqlU5Pv+V(Be?=hAFmyWv}NY-^1U-MV4WWMqn)-N-q>r~3 zhVWk-LccSFcJGqqHW`l3w4*G~hOf+qEz064y-Trpq~7t9RajhEd;#Vv^Q<6~?twcu zD3YSw+v3iHH0Od-Z>_u9u;gU^nl*1D>b2s>-6?jyc@NET-t!2}HSneq-jAAxf2iXS z7BU>q{06yOaXR_AIQI}Sf0ih&Cg!Ui;Nzq*Y5h*)k0^4yTj+{|M0BwCi8xRAsQ)5rK5 zOB8vICB0FRZ-$d@R}>!~ptmc{a}@cz6faZ!iXz{nCI5cK#}xSq9OM6>IH>5iocM8y z{Cb6Q`HJ$*J?JW>&s1zxASLD~gYdEWAzR4i>q0;FACtvYFhWK2imng1O z6yIaucPjm9#VZuQqIj3$LyAu+{zmbL;)jaqIQO&MQxtO*#a9^OS1R49_-Vx}6z@`e zO7S;}w_y1}z5k|opW+jW;(H7HpDXRdyAhNZUt7TGN*5?rDXvu%-&&B{qI9<+KVqPs z^Az_fUZZ$};!TRTD~iu8qvlR;zPgGo@SfaRGv08DB;#rDKiklU?6nhnS zDehLhLGi1K-&DL`@ma;^6kk+)N%4px-|}U7WSs;2P-#Ec6QDzi{NRoB6h-lU2AZ$Q zGhTe30qKK*w7j(qEK*v0p@CkmwD>{;P1g{Vmvs_wi_)@A0?ki`$QNH|zzdb$t$4Yj z_(lW&8m0Fu-lWJ+@~G#Vir-UwRPiar|4{s;;%^lHsQ9wtJBsfqicd7?Pv^P^I8kwm z;!MT4iVGAMDwZf#DDopg>XG#sutn)Diu^K>e14Tryo88xy+`p2ieFUxisFrmcPQSi z_$|fnDDwL}>U&!8S;glRUsgP#__pG^iu{6)>C+U$in0zwJU{6pUwo$l3zR-lkzeqU zzf7@SQGBoze{OZH-f%W>1z~kRJ>JDe5OI}A*He05#LKm;~#t; ktZ#RoV3d?o@g?xc-@)|~n3$>zYld^*jPbjbzFg)13$h;6tpET3 delta 1262567 zcmd4433wD$);E4@>8{S!-RX3a&fZCfH7wbHKtjj@A?!N>qDg>20)d1O7TG#1Dk>^a z=taO0Mn(|m9C=N2diYN~53^4kgbL(`{-QfGp_|5-${`I8#S7*KF zE_JKw)~%a!o3BWlulz|`7w7GfmzA5FmD{t2+nwpg&HvZ!&d$!vGB}l?j49I?tCjzo zyZ2gWCvIa5_j8bt-!8eV?7I7qK1}+}yZ8Ua_`hK5{mqg87ZQiGy}!Na{wo1^+v;v+ zHj{pB-!z>`zWwDXO!|$x-1RjUxO;;czd|pY!{q;DKl3e+<$pm>?X%~CicuJ%!GUCV%)vVw8;GL z?Ym|&6YihK{71XFU^o-|MgpuQ4<3pX_bh{{_xq*VMgj zdu|%jeEW@`G0nFxoyj!cz72GqI?J>_PiNYh^R2tZ>%N~^eEXnX%;MW`Tfi(^Zf2H! z+061sbL$?GwSl$n4V_uY{kO4@Cz4s%n{Tr4b5od2{gK&{H!xe?3vK%i?=zckhZ3-D zXwU3B-x0eP4hD;T z^92@_ewjt}zKunV0N%807S;4Ei@MFqqIemLdh}-&bqMx13t7}D;D7xBb4u-*(^2AO zPER9q=HA1c172g!@xYwEmpK=nXU;W~nDc=J%(?3k=6wET<~(+pIZuyf&ToEZ(aMi3 z+Vu{L&e*`Bi_Wv?F>pNNYZkqHG>cyUI~M)$DHaWlG5XkNEcz1%i~gyE#n@yP(;<|_ z^gqvHs(P}Rx$RlZ3h!VRvwjYX+4UrgdF>q*^Wk$W=3n=)*wnKuw%}Jv)K1zSnL;87JKzc=CXavT&athYvB9LHF+g--BQL}{P)bYa}sks z`!sX?*}+_2PGWJUJ6T-ZJuEKkV-{Dki^Yvuz~a0!fmrfBi@Oi@r#@qG=LfTR`#UVY z$0IC$g3RLQPiOI)-e&PFKwrL%C8VXXgn?x&;jW)q!k&9r!s#bjV)EB4v2PhmoM~o> zx5_MW$8#+4{j)6b=bKql+G{MS|H~|CCE)h6Ea@*BSkf0VOV)m7$?Za!H@VkyEP3$n zSn^FPS+e&mOTMogOMZGYOFnrgOa5^sOVP|MC9V%k>GUm2>2p6z89S4u%oxs67Efm> zcQ0otkAHZ!+%19O-3VeW~0ncMpgbMr@-d*A)c-BQNfp8);c z29|1yXQ?socv)(`m8DjG#!_$n9ZTJ^n5FKX!%~mj&r;uhfu;WAW|kJYfu*&-jivSK z!_vxup16{w)z4vR&479uOZ&siEbX-ySlW4+dCcvZC#{fqa_(oI{%4tId>Zr2_&xJ1 z0{V^@nCHO_%=6@C=6S`zJSRe#=e&0g^ZaurOAq-SONY8i@A@1|AMhhfzoCSs&$`Ug zoAga^@0-Iq9esp#`s;bt z>AaP7`eiihY@g0Ld(N`Xc^g>g!OyYIH}+wj>)&CWSN_O4Kkymr{P=CG^NUZi&hNd( zI-d(=oiB}N8DYsRBl$U&k$IVA6fa;IV}H*wYBsYB?~=|eb@14`i8CgAN+L-aJ zl&TxYdATr94}-Q9A#bOD61maQC3B; zqpXTHN8o4Vu;75k7xypCtbo6Oz+1VHLR?#ZTG>W2{OH8|Xs<7`hH&6@Jpnf$)>hqs zcw4yvF%vf^|E*l_^&AHkM62@k9A{rI>jSf|8*p}D0i$1UW(6o;&vDLm9p_xvan7}l z!Ea8W-~MCz2bC^xApL+65J~~XDmVcF3Qlfo3xkFsI6bc6^t^`CD}Ym6n&}P9Wq)7= z22@%)E;lG_gB1|A!3v1mU>k1=A* zpt7LIMjE_;&;+kFRU=X4dCP*6Egl}^t`s=|&IBhgGSmsoC2|7Vu&@ef!@z;lBcKrr zrGQ2}Zp@(I?$2Nagk-P+Vlr3(K^ZLnsJzVJ1;mA{pt3Sp*CZKKL59{fNoEBWgrQ}m z=%tG#@`4(>!MY~Npgzvfx+cl&Ym>~b2*~8n0sY60$xI3C9?D7w1lB(HZdaqZi<`oe zd>4{&V@d*b*nqL+`knEf(*D)c1FrFK0dA_EU0UB*U0PQ^brzdZF}0?)p>`TG1cT<( zHqjyKjHzy#-=P1cFs9>(F{R}rD+X3Kl{Hq+onJj?>Mee1!qvEjX;n?t_mAkC#G9L> zEa&vbs@c^Q^J*7YGZ0i&Os}0@&-Xnk#q(|-NbU8wNCzJ^yl0BY{SK^}ejMxyKIkvZU|6dfF zZg+*~EiP3*6BnYt8JEI8`b-JY?{Gx`L*+kzri8W<1)nK)eQ{i*J|r$#?;U65-lK|{ ze|%Jl@Oe}X*1pda(}uW24rtXc#G-$j{(>t}-|9-zZ*h6J_Z7v;8^Q}Bcs=hO&u>S) zj94ePy{(va&6UjUZ!0EVc>*H25F4+*6q~F+7@NZH`4j?J6C2GheQwx?=ykDSdcW9E zzWINYFg-aoM!z>EjBf+6$k$(Dvh^b|NxbrX$i}%CCx78npW(eRp}H+T+awB)SB_9) zxU@)()4L~VeBE+2gpYbyb?R@&Yo`9giYqcjW7QvsPvA9wQq%dD)k?T6lMNg?qNI3e z1@@;ES$xqYwToVq5H4lv{SspMj$D%i-RVmcLU{JgrlHX@>guOd)m2QbpEJF72Ak1X zKfj?OQ{S18q(7Qq$Fe>1zlsZ}&q*VR`| z(*2Hl)&jm-2r1;m-cBk#3G^MAf#?x-(Ko~dWM9em$v4T>}+ zT<_;L@#fWRbP2;cK zqDAw$SIlwxXQ@^Cu(VX(ezV=CFHD;l*H~RuS6W{^y?7L4#z&L@q5mZUqlcf*$#7VXMrK?d%=5ppNAk?S<-jR4DaXwxuFio` zOZ++aaZWT(!K0;*Z!F2B2+922;PqYc^=gx zULTNa=PfI9V)%3T^YF@?SiTm2)?Kix{FarF&`m3ITzmljbj2V0%A6$p(fH*RaI~%x z%q~8h6UJXzkrS`GbCdb16_D`}ry=fIVDWvALX5*!fY0tzfHwhiux}C^bvXlNR^JRq z@ejjMA(qHRBwJ4B*!f*IL5V!qoD<2nHA50DXY3|^FOV6SK{l^;j>uQV^qlNA0xHsv z$m+q@e+bDQyV^U7-}@mrN%{c7ZvHUGrso&L@~u~U$LbMqkoY0wt6>MEd}^m7Tz?_o zrT?RkrazHyL*z$KfoaOyQ89X5J`~K`QL%a<98?_0G3gokQMxtX#V@`U<=~YcgGIPLD=!oS(|DKdkf*wQ ziyqe7rhk=(0b00wTTTe7ib(krkK|yeA^P4tn|^nmi*G%V~x+W!uS^_a^Pe?0S@~0LAPWw`~%QFa)M0wpWn|3IdE&i z5IMYb=!nuG6%&S)=0f)fS8e^y;uPK7Z#vKTN3T%*+rntRJTos-f3P3tnfLcL@#)!l zv3$rcy(0NrS$Q4xhN7SN#j}vg%D?9&@{#MI46c@>^FJR1R^N?z(SpTif0~!Vf7t_; z_nywvc=B%edEwK%Xnk^tL(eSfz(+onXVTpzcE0cLdFlF@;zWMr(L4)p-j(zt zOZe9d`y}wMtx}4G>x9^0<5l zFKo<@3ug^@S(yhN^1w`hi6Sz9u7S^pM1*HK5ELm2GQp*JeV);NpxvonhVKB zF&JXpm`tsoKc@*Ekp=Pm$;N_I{#wU^NM3wI>dcep z7G&`ma|;~$!Lrd|Q)V!Ivay@(7P1W2Ec#ISg+>1$FU57u>B5<&#%x zWOASg2WqPW`Sg_1exj$p&rR$#ZFO3gp z9{6FgSN_14pBrnDw!E{X=EmCMZ`Wk&C2gT5&RkT3RiTt^EeQjSgqb70U)(5PQNBCy z!{vI^Gs3=cW=e*3(hDxYd9xP<7!epO56{4&vtxV|-nt{$2B^;bs_Z&E(I%K@Nu{OS zGN?$jibdd+WjLwGU1iitunoav71;KHbIah6A>_^J>9fqbT z8r^TvA6-&1vj6z3Okvv^pviNk!JAkfl4=y!m4+*e381f;!z>r(QgwK#6iDe)$`HBhgzHwD?NDo@@}*gwe&Z zKtU`2+OF?+R>oj56>O@sB#bd>4;&8VH?MTYc>97tc^GIpDIb3&OIiqkY^nuNE+}xE zF%|`~_D2(NdV{^(Z#r^RQxb?3s|v@(iv&lD1s&O9>JDCIi&g=ks;1gGO`xqU21R9U z1pGu}<5nhvwNpvO94YabT9+H~a8aoKOKqaJ4y4Td6R1n(L6`yas&J5+CxWKRl*b_< zQ~o=kqghOa10=>QJ3z}+^a!wI53}qCJyWqk$(Bm+V=6Hy)p8PzOAX4*lyeZ6slN(7 zOppW9s zJ;Y@B6ji4DlU)A;&8K1ZWshvJLFJgLF#_2WZdnc`XqsWTc3TdiU5!DdTNXmbOtt7x z_H?v_1Da+w395@_B5GF8!g7#3nHCe|(o|;{=CTkx2vxVhuks9Nm}Z}Y->^xLa*;W! z8IrWz4?pG{!+=?aA(d-Ts--g&jJcOVSu7Lvf6Ypm`U>R1Tww5=mLDKFb6@l?dt86xzwQ2E$uPY{)Syg%OHJ8U4pk0)Vg_)p^!U`hqk63wIHAa;utlNp2g#76cax*Tgzszrf@ zU>;{AYO!oW*?5BrvGi2n>S4aYAVV#y!KZnGVHj>H#B?U2f2eg!DU_vok`aqj6ul9F$CrT}u>*cIgMP|-jv*g$h4OS~5dbQ*zg=*7EiC!Z)7NEoa+K&K=XRYMO zhe)&m8UwG2XPe|`MtPZL67){V@fe)m+CX7HO!4fK93@anTDgX0qIeEUj;EoXv_X`> zA<3}|9SkP$hUnF@<8F+8ECsVhc07yejU#%k>~&(HE1q?- z;|=tDqt;1y-Y7e2k)BMRw#kks(9=ys?*LC=sNGETPTA2F%e{i=-Lhi^rc|kw3V-`# zM;R7V70H_w$LAQScM369D~_$0^{GU!Q5+XBfN8!^6~{a%aIKo;>l8-;>Q5(nqvC+c z7)+Z%^d`me0G`-2WWQB$+=vxjOY&`sV+Y8++DvVjh;WDED8U@fB87d5V-V7HL?2Wf zPoTru+6_Ygkm6{@x|u`rql)7>l-E;&uPToDST_wMe?xKn5#@8WDq(+2apd4Vr`AXc z7ZpbfD$FAX-z!n$%SJP;iR70Q$A>7NPx7mZV<_f$fi_DxY*rngp?sm%An0vs)aX*M zU!*NIb^TZBA`Y0XCxyQmQCQmm_y#3O^$eWdk4-%<1iY`e=uhayX|6Zp~Z zL-VtA@k+l3B2;|}er1bV4Q&))50q=nShzMxwo43-%^jeonfV>?qMC1k{={Ow9kXHn z2c&9;+lr8UywIC}gi}B=pA>f$QQ%)O&l4u^Kv|j0Dyo2TXyaHsdJTL^Uh{cO*<1j6 ziuqo!RLx(*uZbx+;4E|r`i+%Vfs!;77;rJbAK0WdAaSL`k2Dky<@HUFj}!1g@p}ewH|00qMnzf-`=~IuB z{)FZ=!WHN+C+tO-R)UlOS(6$iysY3B4&2o!83%3>y$wx`AT|8dC4G%$(uArQM6#qo zeMon=+O7k^8MIx8w!-voJe1c@GfeL_OzWT|ZU@sisS8w=v`6S;;uuyYv~ej;s)qWJ z4tfJbc#9+@O9wIH!>y^}Sj8cf`~*oE>AbKXco<@e6bVPtpCBmk47&v*PLW1qy}aGZ z9g5s!X%>{JbfVSqMm+!5q3C9)a>Mf}%0bd;^m`gxioAXnb4w>sZ-6A-0;;%SR?Z+V zR9y_grAn8O7%GW0%R!iqiR}XIwC$Lmq2gFx-@vS>?~x9pzIUQwfO%|2gH$OI8Y|SK z@RJVg-N^n1{G{v9+ND{djxp~ZDF#brp`ls?s#gsUhY@aX^Ux9Pa-eDr4|j?(M-S~J zZwsU&=~8Q%bObkxP`{lt5@AcAXb1AzOLt<7e=t(O*4<*T@4`~w)y8&W#@$jAO82!n zLW>C~N{aJhsC}@lo1i$L5=J4T02>c6He!?P=f_Yn?P4rL(%69oS&HYN!3cjGe8fV- z6Fs1XC4G$N#$Pqy7z*hnkdpK;=DCho9bSQQ2s^KpV|$fCuz7Vn32wp*u{}sq_)Fje zpG1UDg>{$%?1+oXBB5`c1kmwEh``$APJ@G4>WG=NcH3%jZddqBjnni_ucpp^+uUy}LpfFt@(;TV0o3(5e@(4XDoFQzP9nmh17updW#<7YRBaWBB zi^#8!_lo7aw@KmXAXzwol)=G571408Oht6@;+b+(t8#lwaB6r4f}tJJNMWHRM*pPQ zgTDVmbt4q01rZ7&R2t?>MRW#+(#t>NF3k94p}f$Ac-1&o5uvjdP7uQ-UiEQ)G6t6w z?w1!gI#_EMxe@O%j>8exiQ{GAeA_n3)mCQzW}yF3t~y^+!0nAd?1=7P(0?6v7eH#qqLm#LU35`%jd^+hNf_C5SR!DvlSr5SJUrcEpYRn}Q_2Xhh}w zdj%BUl@btj(8qA1k50h`f-Y;mo}!%U(#68iMYiT3GZQ^c)E{2EOZ53#6V)4eM~Lh!nTn~Oiu zH!1f2KY^vU24=)3ZYb%H-3<3pGV5XDk#W%b?f!8qZ?2SLwu-MXrc;;B=l8h>(RpXqI+E?u70M)7av%6a@urWB*Uec7UqS@Rh$-BB3p zJqDi~_LVibW-^nEK`O_Y)V;fG@#CBXok_CEk8=iYkR}Fj&Vf~GfS+%{DicOaB(ueB zw!n8N;;@@}Tj5?hcAK|(`=!cZeva>!z-W>opJ1*r4py4sBNDV8Y@Sp&v?x_p{VeuK z!3iI{hI3ew`exP6kVE|J{sdYlWUqfd-xe%?&Iw5>%*vjjv@e*UbR2vl^C2ayDOH9~ zZ(B?2k8*JG$7E^#(0(TZO7H_&%6tg3aH}V<)V#7(*p~!~pWC0n;Do{N9$<01a(x3` zk-D$S46K1I*WvvEcz*Sr2o=67kOiE5z=0-kVEv=ImCkMLNMG^S>;q|c-zxEz zM+;-E#tiw21vE|U!adXU;nsu$tM5H7@xHqX8}!5L7jjci$#!7$hOrV~k_Sg`>kmnM zQ*W5E_V|6{BTCAKj$z_WGR&OkdkYF;^nczzXv5uUdI^7tS9s(Iz9Cg!V|90(F>PU0 z88sELIFis!6>0j~lVPHM4qKQp|X>Z0Hewe7=R6A$JJZ^uo z(5-8mSMf)mEc}7Dd|?Xb;qiHv-nUD|R(o-THo&SDM?{poUIcd!Zr_;-h$nKfRV@O& z2(7YV>Ls zgMx4SwOnH^d>dYXurXNOMXN1Ew`xVVn~Ux-fx}5qJ#QCLz#s=bx6cUBD2c#8yb;jJ z`xh4;2Nl;aUvc?6D-wEv&i)f$bm8GVxo<>>(HbH&7hj*;H>#75^iS`)?VEqHHYX~w zwR!rQ{jae{&6aveX1(}#-Sv#$-{hP!Z(g^C3OEO=>SomA{17;+56u4Elad|hJalWE zUNNN}zLTk_opvB;Te+m7zP^2XdwuTqd3@Ck%2B?qhiNHatx0yC*wf_X>lQmzgUoB{ z>XfSZ3QdaQc+6XB^Hsg+VLLClU~)#@0flFQT|Afq*75z7@buFEPT8&>-J$YhKlgF+ zOXE95hL1NChk#NDU%y0!sck>^3Foi&gQv61%?b8S@Qs>qg&Hu30dLq0`Wzsfmf|4_ zfNkUZi=U@{8RQ|;&jUW&`8+%trZnPFS>nf)cmY#*5AiiH0h zlyDJvKuaw3cs~z61$p=sJY)(F-vxP?03Ph*0j`FvF?hfNR9oxX3GGUFNJ;^Tf7R9a zc}V72S#nf}uMPI++mGeNMpp;<8VT}^BATioUyHyOc14(;K7&q?tUJY1$jt^v9*pO7q%p1(8H<)5Zh4jpz@a{Do$*X{?Vbt#pm8sa7}cT;M>C@-LLQeFiPLK+ip4r{mfQA3eGmY1@taf!LX*Le+GIrNsOJ;BSFu-$1WeO z)wB1sHx(r__J&|K?6I5H%w()tzjcqtWJzIc3SUv47^NQtZA+d0&Yt$>nJ|WO#H#Gm@DkyWYtGK9L+1`LN%xkdm0Kna%_iK-f*ovkK`AVy2kQmkn817 zRZ0>1V^0nA;tAt`j^%Mc?08&)4r4D9ZO9|o2SEEaJlW2`j{1h&#(p9i?{^$5Qao;< z93Q(J@QT#~i1a!kce36{FouJT#!1pxXYuw^(S3kCI9w}t{-1%+ZZ;;oE9 z1&9O-5FtUKKd((c6!jp-ZjxiYV}JpC2u$!HVNud>c@zk9D_R-oSgwS#5wV)V`DtJ@ zVI1OA22B`n8s!A^@Wu)C@jU?I0K&n9aIY!&lL>1H=Ky-q07_dZK6x z&LKcPC;S890m7FgsDD(zXD`H$3BMuyg)jond6Xv*b|UOWIDin=iV}MGgoFA^2yY|Y zK)8)?FU~PV#lwVe5}qW)**Ylyo=}Fq0cks7GGQ0OK7{3j;|Zq`HWIEP^sb=;?1a$q zV}#ET{*mxq!cPeCUK#cOMHr?Uw3{%4uovL~!ZCzZ26|aNF_sbDMYx&pQNq21#U>-6 zVT5@5j)BZ0Tt$cz5s?2d;Q_)|2;UV5_5XKbd`GCjd5DHlgdW0D!ZCzX332)k>aQZy z2_GgrKzNMsBf_r`yj;+;t|i<}c#QBPLY%LN{%}4v;?sn0hS2$coEYyD zo+Ug-_%-48gqI0JppQj|Ho|Da1j1B8So2Nj^&~7HED5FaznmDu3C9su5!N6=hh0b5 zfLO)YVv?^T+=3X(*h7R5BZA&8lJ7@^A)BWNpY@W$E2QuN;Tc4Dr2CZc93nXSmgIPW z!JJ1Ry5U+u7>x*ei6qCV!7u?9R-ZDkJIM!<+<{b z8zMN0LCl2#Fv4V#w6 z(cdD%Jso};g8De?9&cV@ePBVSBf`C6C!%{I!kreZGbrT431?a9{9jItb%YEyJm2A( zBM@pppq)_M9fLfP=yXCjF@&DDxdb`1PeB(D77;?N3jRoL@u!gXXu!(RH zVKd=s!nK6!2)7|ZN3(-)H{m|QLxjbL>EKnuHwaq@-y{5p@C@NaMChQt=aIYQSg%Dg zNPLn+wv*6B=q5}j>_V7HScK??yLG~$g!oAf@^LyU;$*^Ugf#|wSpzYe2*s_R2OblU z23$wDk#H;FHo~2Ry9o~x9wIzS_$uKs!WMy0jc4!xI?zuEzaqRyh;JfLj?cS@_?(Mq zA+!@Z3GulX72!p~OZdGIDqJN7&R0Sj=T9Np37v%L zh(+)SO_)iTOIScyM2Mr%s6Ui&Ea3#gN}TzM3eyPd2pb5S5li8joNz7SIzoJXf%2_{ zyAjJ^teEf+Ax;KH{;Py<5PDna;61{R2+t6nBm9c+Dq=ZV zfjE+}odTi$_YvbD;bFp~ggC1iug&ifenfbN@EqY+gx?chBE;bgv{wmnIy7F(aXO>y zg#$M+(h0i|W)kKR;@1gi*q^YRZ~`J+-X;@HBdj58AZ#LBO4tnOMZ-13SW5`NinhU2}GYX1m^adhi3^)Iq z3=7hb5plBtXovJgjv$i)U5H6^*8%888h+9VJ0e0(yAWm~LXIIb0`m|-serHuF@uK4 z0Lzhvk{C)j64Dn%GL~=xB6!2#5i1d)XPib@g9s&6N7#T^#8?yIB19;;rG(9hP=c!o z*C0X^YYDyU@BoT*BjF}QDB7)r+Yq6McM$GGgreR}xDOGE{2<{WM2P+{VF{iEPR7O} zLXl5Lgf=8j+axIeJCWgr1QDTV#pwn`Dw|>N2=_UNP;~7Pq3HS`;>8Ftm$91>p@gtC zW69u0Msg8jk03%xyntB7*!zf(^M4>hhBbU79|q;0fCrGn?ud}HVnoQ%7(~bk1kdCd zbQS&~CU-@M4h_;SB>Y z`Xd(6{R+@ak%l7NO7d-pP?X|E1?1vJ1&UPMhyX2aM4)Kxis4V(a6nt?LUbk~lyo`K zLlqcN#UigGMgt-g{W_w>eF0QK_e^)dW~^({t7kT^>J;NrvU+Cn%6FqX>BCy;y#*K~ zlqht#kY9K&a1@+?F` z_9{@h2Bn&dFvVU5WiiJgm4`;~mAQE$`tNPX>}ITBrNE$^W_;P9^t}ax^tjAke6g<- z8f2U~8>wPLHPQS}bW>tbZgUN~DK)5cGY&H<{SCX0W}F|S3@~I}%pYKu$_*;h9H9a= z$e?n~AEVu1gUT~6!QobAh(U^PyvL%a+fZrPy;vN-z)zx56$W}naZELosW_$?lxn^m z?W&Ceu$bRMx6^&au?gMHFetkjXQL=JhMhClT!>_?A#^bX*5PN$OguNV$Kglqiz!RS zCqNqBxvGQu=-<4vUaJDB%x>iCAIxcKo0!UBrgVSiLKE5a7LR+%vlqv9Z&7%_w+EWgi|>Jn0Syz(DnI$MGu-sF%2*G5 z`$tjyOrysxeaVZr9ZdLP=U@0YBVs*LuHN@_2h&)HXb{gj zY?;R^Kknhyuby55@4@lqiprpO5?c}cMlzGW<>OR6|G7w57~6H=e?DF#McQEq0dgQm zFxC?>QeS>1!6KF|>eVxcAAh-nOU=&C&E&_2I6Hb%gtOLVi`*=Ub^YRE=^e04(51>} zE2GM;G|wtaE_=Rai{*jDurewC`Kr*e5f_;<;(Te`p!4t4jyPZ9GB`I$1J1uwJyyC4 z&POfhL(7M3&zDNXtTH8Mi)9O2QU!|+!Jc1r1=gvNTb_qs={PJGk$dL(8s(y*unZNL zTP(1eP?Ze4EtV@)i)-&<_A-_lFBXbfQtK-FXU%hB<((z9_VT#0%e7)*7_neWUe%S_ zNr{)irgv@0C69e^?UmXs?4N5aWszluy;Am6nX4=vRsuS5?&2!3u!&dX_O4&eZT^(s zmRro}k}1sdJYtpXxzgmHYuQssnfA8jddUZs-CM|QoFe%^!SyfQigW?O6{eZxH6;UBv{%-_FzeL>2<{0RuruH zse8oYP+?_P8X)ppndkOPy)u{7^n$T`k0^>SZXw7En(okuwO5$**vrdn! zje@TM%pla$_1iif4^v#cQnEU+W4=xab8gbHdaCnz8u9Hp!}?lQOM9$ahNCBGey9 z_WLC3J18&LFypx9h4ma9sDns;NU|oPd@#umOL5lC=wJvb9F?qi$Ds~|xG#R{^1g+{ za1tJqtlN+tL3E2`Jq}f+Ed1@0tw*t(sz~0fSf50Hu;_(RF{>3Tey6KWC3=lwor3f< zU#N<;A0}8$@^y-J4a%nzy-~3yVAf_3y-BeS!USu`eyd`&VSu$H-=SFDvpc-$PjFjVLLDpU`SN z>gLnIh7sb$t|W?udQmhJmG1B6LB8oD zLvgT3@FF{6TU#c&4OsM|4vH;uJFrZ!=*0)1q^V-u$fCA@7g+S-XHamILG3%u^JYUO zN8zBVdA{f&JuIphQVR@9jk*J=g$8Ab`T(g#1{EGtop1Q@Zep`#&qD6bzHTMaVFSh#9^dFtO&d zM#_PrhXp!(;aI@!Xtc&x|3)~Cr$mzdjc^)`G>VLH8ZjJY{R>_ro+h+vi^pg_5Kj*b zoha`}*9nZB$f2%CC|qd)1|Y8=Vw_A5fgArIzea;UNLbdmy$|~i*d<(PCiX1a|KTH` z<@NnzpAys-L6y2hne8;ntj>thy9=$LcwKlsly(`a3lm_Cd+Bk*OM`1Tdf$!d$?NOk zpY;LR9jwF&o&u%j28r~kgnZnvng0m8gsavV$$W-~^7=Z%xXx#6VIvZM0L_r|VqqRh zGVKQ{38xi>(rOPD9Kqe{Gf-G!DrkgVRCWPNl0w%4B$Yw>;r%XQrE{s1R1#rhVPViL z5e7x+fByPKu`mN)Iax|bhM5I%?ZHQUDjO8l9jF9YYoT>v2Y&N&N;>a(B+b<&5&SW{ zIZ)WLqvGI*n)`F z13DJIZd|X#NZ%QUvEcSTUw$Yfw#zkaLn@5v&=~w@hg9F^&absSu>bGhG9OQN_U4D` z%$aQlJT>6^W_;ie_%!-gKX*RmeMnA=8Va|p60985FMHDDqJ_0HhAi9zFV>~jFL~j6 zWmKDCe6#G+J2G*`Fkv{@+^;4(Gr$5?RH@1A+uis!8OKoM0&`*Z!WV@81oN=IX;1W> zIlO;zVN%+nekkr9@a6KS@Ky4S3uH~d>8gI6uWa>;S3P>xzn;)P|5ragx1vviUitGz zQ}LKF1BUXd7iFiO`b&oX*?ranbAI`=#G_TRmW z0T}*`Ns89Lw8ik1_j11d1EAtuCH;9C-RR0t>-oAKq=LqK4w z$I}eAaJUwAK?nE01@@c#?8Er_*WgRSN)`Skz)@#cRXV~yc_1;0H>;XGdM7BJf%7&Q zT)+ql47gyZ`*)b5Oh1G(HdhSvM1KxkI>q1!hT!4uuS|%N{thH`W3Ahou8iTGAUd@3 z3yb?Cn0CXxYaR|JC4CD_e`O1dpF#ja*}?Y|O9}i;iKI#$#n984V#(e$6I6;w#R(_^ z1jOm6{vm}!ang?)Yem=+isK zw}++0M)xDOPrV2R>RYe^dgp`0KY(?9S%A^~)-2$tJk(l)&x4)6RM4)2X&@BcWGq~d zyd#~z878$irFVc3_)9B$&ErR(h9NvGh;v+8r6ur!wPq)DAAE1P)Cay2P5MshF2o(h zr!jow0(UY$wM=zzySGm!-xML0!#VXygjC-PJ52|)pT~Xa141FPKfw+nacOqIHQ*DX zvFmlPuxD5vWjzbQ>a!s_jN}!yGfjRHL^Kh2Hxd(D+hjEAl~qA7VSk-b8dm zks*RU_SxtMhul%W2x-tCjR^WKMDT~r1;+ZgVwaxv{sjq;;0ccSKZJ|W3DBzvw-D|k ze2(x|d%7&kKLNR~=e)|}-mklPtBtl$G3KPDQa5Ld9!siIzBs@iUo=}1I zfcE&{i|8TDAuJ^vBM|QYrV?Ww;VMF%@L|FOgs%|3OZa!f?+6t*zeE6p9>N^LQbI9B z7(YyyN{o4gs|X(^JV5vg;ok`r6D34=icq`@2fr7HmY{>ffGmXgF)`9{fL=W4K#U%Q zrG%phD+uQh-a>dQp_mE`esFO$^oPr1A|4_9GvNn>|0E3882qzwP;@|_f#@PkCQK*n zOqfO3pKvhYNW$@ilL@C1))Ow~S+}{JxWLU?;%p|w6?QR#rwRW^_%7kU2rU-SgFT$k zjtKtZ5y8GAVNb#VgkuS(0E#kiAjWdS?S#7#;pP>;GepD{QZWHs>=Y9?MtF+w93igZ zithfe1O?Nr>H?C;`I5fL>%ACB~l!-y#%U z7|6vF8sJ&te@6HtA{51CLVUhO+DvFAbP&c9;vfg=!RT#*IOt3aysV+1r$8Q`D0Se) z$KXc6JyJ69u5T5F@o9-tbSF?rq%{AC=PsO=VkQq14y-CCGKoV)vW@>fQOfRw*8zMx zFA4x`yJzLO{Wsr>S9&v(lL>ETzF8`DkT&t+B)IGQC`lUXHAbx$RpJQ$CHRK{lWLdL z!~@1J2b>Eu;H0_6(6vt&UOKG6A$xlZS{;JL@#AZrubET@c+2xO@e9BLaMA*JEwkdv z9c=^O&DZ`D0x!H9z+rR00A_+42;dY1G6_(>)X@!`#w9g!+N8$o2jYVN{&3@B8CTec zBqPrRgf#{HKzOGxyv5JgtO9>+fh8Uh3(;?b=R3GAz@|zk;1rgcpjAKT8;&0Z^`=yU zuysZFZP+u(rV9Yday;dI!|^y6s-$2&`-bDw!LNeD8*=d?bfIc@;swBBDn%`e_7FhZ za6EoJr{Hrh4aYZ&SG1{vz*5)=bnZ}L^&V&fW46HtAN zjcY@}v+7%HTze9!JT!vW)*8;!Q+wmt17lE{7{Y-i$Ztf_seJCsA97nk9xCxAr4azBS0Tt{9AO4RWoK?@Eyp2EGT`Qhke%i!n&mw+OkW zV1)jQkY5CU3Vvdu4m)O)W)X1U#X}{1aNJEI^A%((!ZsLog5*y2os zOouxa;MiHTMcXwG)HEE@({>x@A=Br*;RC5jMQKX?GE6wS5aA zYxfdqv-OAMwDm;VZ8!@_(}|3UQ(nIy$pM%PyWxFU zXIzLJS0o0{xCD6!CXy_@gvD{AgvyL_S7iGE+o8(Br45fJU}wILpoUdMhFCZ&Y$)r>evndtCpao>F9Y!8ZhKNJS5D{Mrh+*Wz zU8F?bGOUv&t`JzbVKc=ITO)46`SD?$V!QmR*w7NckH9%8v&`#_DPJ=t{J$-i8MxBs zuPm2&YU+@_Lxv22kBz0)k>c0ktx{$ou!m*^u0{FbHH%=L1yxX-*f+qz1>s<55lAMX z3w{4x(Y#l-v@>WJnD5_|l*^~xP#FEpkJ-{^$}>;*lAf1;ZJ5_s4^i(UZRQW=OGW(q zeCYr`Q<;&-i^g;^ds|oQ!_n7KzUAlA{R$Qf-){gH^(OiB+*_3Z~!kXLAclZT60ZuaLW>^~RCSE)!E{d#G5YKd5?z5X zR|^q;?@qJ5Q%C3)@ZC4M#1`Ol**(b4%h#7kvAr{Z?H|#lEMsgJ&13w`OM=W_ zfy-8d&+HhF?AgA9NpUlFpBR^hW<9sR1Zz)qV(dj@-llzklng_9F?_wpoFc{X)8E1a zXB_|6x3Ko0{5*Q|m*)9gCLFcCLlqCM~0BNNZ!>h`qQW!@!>Jg@UiryZx&;@n} z(_otD-1GLR-pImE0TS27E-Ay!}Zw`2=ftP%gW1sKf5d)?8_-VKl%hVaZ z!n@LR%vAwn)CIExWYh@dY%+z0(6qyaNXj<26l zFPHcuLg79X6{ZkFd^ZpD2BO6W_fT@UVF}@RiU?=AKvA+l<5`6KL_)k0AdRO8VkRM0 zFw)|_1F#71gOM>31yFQj2`3X)64nsb5jGKup%AcZCVDmDTEcaN+Yq7XcM$F-+z06k z!6CxKgs&35LD)k09^t2mc6wO?c#-Ju39k}jJ4QY6?j10kXeXgp%%%i^n;7YYcvFmZ zl}A`a*q;zzMWGyfCd3JZlL@C0)(|!jHWA`Q0>)+gh!;p$1)>h2DBUQ4q7ronfn_2M z3E+l$DxpQ+{<_l(icVwz3I|}2h&1L15e(A_`+_Ap!2k1sbv+Xi?3N;e{su(Q7yiJB z@CW(@Xb*G|BG^qM8rwu)bg+gPqSC?9KB5mIg2V2)fuE9y0nM!3o;|sAdxA^J>zT)k zUTELR0qMimI@3IoS;ard9o{#z*nB~TGnML)^6REWZ0v-Wh+VD;8sHt52;2Zs&I_XH_LF@>ej70 z1=0PQ82J9bDj9zBH1^je_T*o_W%lsc2jI2oW|_Bt+gxc9|16p}zinR1yKB-4UXyPQ zm$vftIVm1qS>HqLm|1dj1Dird9o?p{DaOKaU$LzHNN9?X3I zvg8Erp3_5>b{TKEUvt|d)`E(gRA4^C^5g`Q1PM8XM&|2oyX;c=@D_6n-`Ue-@46e* zp=k<_(1t}^n8G61{jc14;G-R%+g0_LZi2%#_|ZkW1s+>RLVR!m?rlmjodHLyjTr&3 z3Zxy{Q#k*qzm)6s&m1O!8OO>rHWe<$OnlGoqw!3|M&qOL66#O)2fD2>siN?3nxe58 z{x`MJJpc2qHVx*%fIJ-U72zy6*e`o$pnul_X50%l+OGl0h8_IDT? zMB|vdzq~Yvo)|>qKZW$yztxZSVjXVrV<5dhh<-hY#&;k74!;YcaiL^?c}ftC3kZ_j zD;g2bG4(g73Zn5FJAXM&y!EGXZ7+X%PZ0fL5PiIrhMNw|F}}(7ckn|Hjb8@%%j1G* zTnx-#j{h6ipT-NVKRwMy<4q3+u+YaK`pzKw!5|tJ81Q$9L%sg=`$6;3!-}j(d9uj&h_@UpA$r{2%7@X0?t{MqzE|<5X9UqW7s6kDR}lSR5RG#q{PkZ#8q41oz`H>T zp9Rr4dBWcTzNPc0Q-bL1AR7L?Yk>X)puPSMW(6tWdr*J*`XG8o5dBOLjjy--?N0~M z7d3e3@K;daI_yu!1ks&>=)OVph#-1u5WO&nzQY3b@1G#P9`L810NS_V)$q9>8s}vA zHk2O^qE83W=Y!}Uaax6MLkDKRdmp4@gXj)HbWRXm7)0aiVc&-SCI->o89@wuQuZ$a zmM)(6D=MbeH{4RuR5hip8lLvyzO|x)1u(1UOcSid)s6Mn==m{ydgH67{vX=j1U`x) zeIM`Yo|&G69Ft5)0tqlA5yKq_VmJ~K62g%Hfp7_G5)Mf)KsZGXCnzebu7Xk9^+aVo z)(cNmJkV8fS9dqw*RBiddVSSJWtBDV?*DnJ-SiUS8GI7JYt}JucA-Zc&?Y#0Rf5o!!;tk8EuU-`mseyX6^P*(!x$EXMEjhcB zE}vUhP&akv%u7(pXW5HzB$yPy$u-35)P(}E&$YNmHr zXkJ-Gc|jficTrqI`xbP~BFgM$;~YF~T+gVEZsg>jm4whPx<+}s=o<~~qO*i{D}OXJ z{Bwf4RYa8e=LC=ZxuQ=V`Lha->{`K;8!o5=^Unz`{8_<;KP$NKM8S|-*i~*tZAG`* zMF{fmQUjW)OSS5dE(+?9QL%kahn#Xk$mkP7PVEv>R$dV9TFMFpbycXmeD0`jYP&&Q z)OLfq=IfP>39?RL~c@Z zYbSQ)F(%EK(soJj+%Rsq>zA#ZiU$Hb7c@65UZNik>KfLrZ8+Ch+0e8K!L%N!YhK;3 zG;*$=N1{a2=4Civ+prRkEK8R~7^8HAxii2`fGw-))`j_GgVdT}I5e%BT{hi)q7F=GtZ>)Hn3LoyL8WUlVNRB>1*o=T>GU?$p*;izZ*8DSQhj`VEIy%TE<_iMr&%)OJwBA0yPJTxs4vu_2& z1^5y~q(3_SnPDN?m;sB>#zZt&1@R2DG4V{aF|iJ9Osq#66C337!(y~C=_P1e;!^l1 zBQC=yJXnAqrkgbtfcXk!MfKpPX!MjI2G(ZppA)Z z(8k2IXk+3!v@vl#+L*Wj?&63W(Zs}a(8R<|XkzUx|6K8$wHa;9h%N5-X>%*unDjQZ zG4VXKEfG!jF|ieGOWcmOC7zGAC0>9gC87s&X5QS1nj`)KHAlPzHAlP@HAi9QWvDs^ z{L-C)H800^4$@Z`Mk8?-Y^8|1QMJS?QMJT2cZQbN`Bu^wqH2jARIT7n!OH}>NY1}LcL}i>!|Ck!^Sfmjc~0~|6}8p#_J~j@Om2joSbpov!!M7wT~G0d#Ayt zPi7%s<;3d49}TXAF*OUp8%N)%A_# zpxWxozOSwcvjh#(>Y4PIky~3|`u+0(hMhib5yEnhwHD?cH6ijeP}b1`WHqpT-n6+o zt|d1YA+>tJy;(V{>b4FuH!D$%%koU0I(^#g#$b6>{j_OQtKLWPl=XW3Uol!^? z%c)lQSpB+({!t%3{%Yy835ay{FP=7Dp9dg(Y}I&FXwkGH9a4&rQ>L9lF-I9Ya@t6S zA8XB}$l-Yc97w@;mF})qzzrkE+!7>QAmRa>5H61^{|Dr6!r~3bd5z+dTF%dVc3Zo`48Hm5Le_waDF}#N|D(Q|?85RfA z;a>b%_`{d2;R=6-at#iKqk=6olrgxZeJIa$k1*Q@S9R2zhne+plogeYzGVy!wdbJ+ zSVvoyWF@J>@PYae$z%U6&x%)tTk89`l$DhL*FyCN8pk%89oBb0Ha^(#-FKVyc}IQX z;h+`~w#f5i<2W7LQLhdsA$Uwu@l)v4D5Wm> z=v5f6cqtk8n^l>WkxS3W+HYu+eMaJTG!x^2q7mLaS~WOl%rxV}{FGoR-$!KVgCDEU zRQ@Xeb_-y7IWcaTHhp<`xM@8YUX9^@d(0f401b=P$Y{UDckO6-=$)|)&^Vd$PF}zQ!etP)M&9tvT zDZS4~be_%qjl2hi%(owh-ri@09AZyo>~lgE*po^AR>)EI*{B8Y^FkKcwB+-?Amn&| z4ZO5?UsR)z#>_4CSAllv_w~{f;JmFd9{0H?sWF-y>_zErVxM=?sKfX~`5df{{pITw~ zPO;do&@N<`GIq2Tb^|U8`73K@8@^M8VOPlJS2#CNTbetQX-ei zeL^-Hao_S9WA9C9A>#wq43;Y3d&=UfdYkrGzNbZ)VSmKb&q(U9$L*&FCE9PF%%*u( zq7#gSEV4gm(SX)B#P>(*ZHoL4YxPf2k++ejUD9~$yGgz(q+c6j`Cf}iv{R|h>ykDc zuwSICHzYdERp(8e4cvp;Co}df;m$YW{*3JP^_ZYt_`Ge=sh6+7H`}uskAQYhRzR(X zR~7pxuXf)Y4=*D2QM|PnzPUpBnN`^E%@ghfdj>_#7cyWEX5s}xrny(_X*wG!_A4?k z6j?)zI6A9#hlA6o!y*q&is5EsIlNjyF&bO=8l#HMq$W)sX@8G>0hw1sHQP__v!jY# zOih|4HemnA*p))2+0T$%CCr)jzx9J(h zw@%0*b~{C{7w!W41~PAu*im*enKueqWF$1P5a)Pk2$4)LQs$Y;3T#Ij^Y5mzlK;W8 zT4kl&ia50qPa=4I)=RZ;VyHi%no{3!qc}jriXzx#s7>y@WA}QzFV11?4xP{lfd%h) z@SddV7<`!<%-bklSPWI>$70A&kcYZlx#HGmY(*AOPA`v9yH&=8Hm<)U1f()Wo65L? zI^aBwG~V9er-^5KUD*Z-@G*OFG}A)LlY0 zr{76ceVtulpElX^1srnfrp7uxO+_91s6JPV8I4RxmG z6$i2Uey8H(E|qL#ttLyI`Ua{AOYb^nvBphBA3*(_mc1afjh zs0WHBq}L@=hQT$&nE0Njri!hIcWTg#hkX|8KIj@q$h2X`gamC%f^;+@DfL~$eRg^} z1@{Gd^-J%xBVpoeZI|8@07fDN``aK9+d!*cB1wv#2x}he^l;?CM-|8vNDMW-E%+jjjkpv!*uCT zH9BJ=`zcE5A+lHC9KY^S;iO#U3HHwyG9<{0K_5_y#~V&~thZ;eyFQWuA^zYvfzb`t z`N*m3Bm&C{`}g)_*tPCLytY|8Vi&w^pO*QrnDuY3Ugukwv`)`Y)-9M`KI+th0_Vt8 z8K*dVT75}j2^rRCpvBR(wT{;JrlOxAc>cssU;NNj(G0AN#w92$J1jMPp)Of+WO_4w=VSQ6mSyPm5ULN7DD%M9?V`;Vgv&K)elE)9nq+_S5w|mt@2q;~# zVZ+9Qjm;x2xUx8+L^=y?z3)}S`-y)vY(mtE;9j zsGU_J-ny1Hen^jd_bwQCIbqe1!Vwad!$ zn^!M6TRMwooL)V32D%CR2fiFMt&1dbX5QrK7yG%PQ%LPHF3MeAx1_PD1>W!~q%Wh& zrN);uHmo&jr?3X6&Y4~}d(*@XXPt%R3QLzY<15A4?6m6|SFc^~_CMYIP0WY|VyctCpN=pa*G%a5YBi)LqB1PG1Ww!klQwh+OqZ0!?+(p=Z|2 zp6T|5`Ln0vigZa9ioww?F~XSApStsk(xvTeo^m$v+!lNVf=N=Jb{79n3NY`0P^+`krjZf6*00h zWB72-iWtMqxLkoTRtO)Xx>>`Sr;FKLC`JhHeJ5Dmb^1>mp1*3f{sd+WTfc16`eAMt z8@6^?vrD_x!tZ6y@Avq!omaM<8gl-y?bHmPuAybl-DjTK&$)QM^`vWEr~TaLH+s`j zPC>?a64Q?y)MtuwWHIdGcKr|xsFt=hdo!H+%26JtbcmVYZ9IujF=hKpf=>0+UVi6z zsY-B;wU2U5?c!PyjVCfAy!kSDvZI_p5EJC?(F13*=md)>f-#is^_9vN2Ie*@i!_yQ;8iIQMX`kZ0@1(NvFpke&Qc>r$d zQcvj?^?Wbac5R}BN3tvGjgKO%zMkC;@UGQ*Jb-*sXCe`*v?Y=#FUwgq)HA@lD9bSF zwCP%6LJpqt(ChnyC(rpNXK+7QrAD_Na6Wq;c9*Ka8|GaaA@%0fp;G~QKU2sQgUneO%cBGTN%9~{O z){PW!)IYGe{q}!&1I{J!NrBqF+8-XI>h_Clg21*!4eJ%|`0A(?3;}b{{U-{|g6E*c zXA8~CI|n`!mOK4@<1(6fq2}PRb%#Xr0?*+Gnswdp&v|;qoO`8q8@4*{DxDW@%IAulpIpSb>5>tUn!MTD<1=k6lFSuLq4}yOdq`OUM`e3J=X9YPoLK?G3z%XoOC4f%z z8Igc%h?pffNN|kc6v6p|X9;c)+#%Q|c&p$8f(HfvMC4W@A4tG)!9= ztl%_3P6&{XE6|DC1TPc3Uhp@9{2oBQmjpiqh8ggK1o+UsN%s`Y6D$;*D5#z0fv;ZZ z&4O15-XwUh;FE&dNgmR@C-moZ&dm&uOMu=h3v@ajR2Y7e;3&azLHdwlJRQss*9dMC zyhw1D;I9O4A>!}Xf_HHu$;7b#kTB4P4h6nTjK}Rq@CXrnbid7bEa=vDgvSJrOFW&y zF}^1e_u^iHCkb+0H^Wa69K&VN3@9feVHFVrI2U*mYl+Bsp~NpH;=Xv6;0lRfFYy-$ zUMYBs;DdtN#~y~w=STy~UgQZf&`$TDz+Z*&D`Fo0Fd9;^0P!T0OlS-nx+*YjJr~_Ul z^tFO}1osNwBe+lSF~KKY47)39Am}BD(1SW?-r$(g$3)cmXM#rsj|u)H$eSwpIC;pn zNE6H!3<>57@`HmJ49m(FBq)-IQo#zrYC(P}q2PKV8cC1Az-FQOxq#uD1h)$A5X4tB z9luKuGopq$1_^MP>E%~YUN;mUVb~NQB5EL?h{ysW6(y!SPv41sfx(tQ5~!1dJ&iO_ zi$P#EX<&$m0?{kzln+Q32^$5~`MjGk-9Ff7#e8ODyr87dp z@e~BQln4R!LN6sk&`zOs*MUIYMZkY2!y)(;iEk$&gN7w*>K5x)+hMDRheDy~suCFS zx^}z;&il`uoNSFQDsr|@9he_xQSlHyN<%)JCT8L@_QhBc!u_E(*K>cPj>h*_a6cd; zH~nx&V^)*?n*MD^2P?KTaQ(^qJ9}3i!0MBKz6;NRE4DNRD>5syV-|tz zd*rI9+%2tGx3YBq@o-~-8V4_z?_o=+fGRw&RAJwr(gJKyv;@4(`YRUM1B>^yM( z{^RupTkyNIpyT`l&DTFT?gDH#wf?{*n=jEH`t|SFOL^Y0^gv_Bk}ZuL4IRznmN129 zaK^jbJBX4yAhm;ARW0dg>=UlEzX^DfUrBx;@^=;9QZB?_J@#-i2KRr&o_BhD8ODufK+ zl@M{hs68?Iy;vqK(y1m^Z!CsipX`^lcLHvX1DN=raXRnj`J>ZDZf7r_31s`0QkCV3u+TlP_iQ;bhytj?^-000(k@E*kMJcSVQ% zc#tu?jV_hv-$JU10?pifKW3HT_D?UI%N^q9BanB(*{laMx4=(NVcupp;V2`HC-I)^ z@oRlRRaWYSejZPM)B?P3UIuRXi=6Kqnxn2X$9SAYb5;Mq*C>at)TS>=Xr1!CbJ<+g zFSQCueC4+87g$!2GQs0KHCOdrJeAy)_E+Gh!^jkVg!4@nzI`gCmhn?;x}c`R$dsNq z@lBQZ$5aX}#C_8w{z;WWFNVGQ$~_LU4-m0Q8Pw08etiaF#7l{rdAM!nZ-v{$!;LWZI2( zt>$g@q}=TM8f@w}&I^P`oWCtlZ-r}E!`tjK031eg`>V7+;2euEEJ5+sMCS!ca+X|KQ)FqTf6TJr_+_E8bb-z?!Do3FUhgD zYx34`Iv-nH5=&&$xj(5I$4GOxC!H^opg7W*yZz}WAr}Rgw4@SxtzNvsP$ksB+PyEF z!S^;b!PT=l<6E+px>TdlTg_sodl2Y8SKS9xbWrKm#2&XM)*D%0AOd~}IZvll+ykJp z9q!^AaYWeTE(pp&YyubMT1Hj@Sm1}SKqp8{jdQkNug-HmUZk!M;*lz&(;pz8uri%B zH{vmW*pczJv*&cx->KIYwATjzJ+;@HgfcVPXf z2zFv`o#8niA|_=ZW}Al?a?cIt{x5^s6_I{M;XFe6xAW(J6|dj*jYQX{-~K<>ss1YF zgKBqAeg6xue*eXdUr(oLiMltuyr62tQ}QXZsmg?ti|E(Y@oMAnD~pE@A6_uLxVXeh z8Fn8|s~PaAPJpdlVh99bvlkt0Wqf?v!jh)9v3$Ez+8(8R^jk9sbSr{{oN8CQn-KQGBsP-tIs+M=BX%eD3Yj%o>k;p9tZz!_t`V6ZxGDqq_sYb?oqz zUKsh-kyMWa=Kdsn*GSBZ;SI&e)?={ zjWa#1-J&v5|AbSF0MTR0K<6f~_xu||V%aP35y8=p=~9m%DmKZcfzH=RGUgje!hway z`z|eA~-g~T?3uV5BSql^)qhF zME)+B$UlUX1DqoV{COCtO7`0Wyf5WozQLWqZ^`wQI;Ea*p=IopE z*AqX$^Cf(j;JtzeTpVk>ECH_(QJZfG>RlF)(Z>@1ogfYLsbH?tf405VDZa=W?6j17 zL%sA=Gc>&kg{Q{6BT?Xk&W&43GJ3rzNB^j?{J_ z;WsLf09R$?O??FRie}TDu;`p&FtOnBc?;VBW0C$d`yRP(U;O>YmpqPF-#d<9j+fv= zum`wPKKX<)e;eY7( z4#WOt6E+zpj}hXpbG#Ki$?YAhVIR_d0KakV;f~d6udgG*N!TLOy4uHE(z3a~{0pAS|9$5XW2j4!vqaf?N>omT< zqNvi??dh*}n^#(Gy{67Q);c>^D}uW56jvtyA^Cav3qOA~CIxojZzbNgYob#Ik?8_f zX7bBa;<2+`RantJ8fVn+$603OF8wCXHjEstkDRYfc*yTZtlLy>*ce@BX63lX?8=@{ zB%J*G;Kp3c$7EKL6|eMq&xYgmJt{ZXcdYH$j0$^|g6yvY@qhiwzj^uBCvX1O*Pm|A z_p+XEmk(%6WEoE$DDs4tOdsSF>t9W#)xR`F`J6xno>DBEVsgYf@4Ur?# z#$)PT&PW5Yty>@2DHCGYhoY-zgw><);0|Lg<$ccIbI*t=pJvNYf21mK{@p%a-2^6cK9pL=AYzpYMU7UE(O0G6Lx*?0}bjh<|`ZA zcGms+Rd23+_;}OfdLMhATN}7)q|S67Y27ibEYer-v9bLA?~K+p>9|GcK#zJHC+bQ} zAQ^>zr|$f;p5cGthGM;gr84{(FDwv#_H z8Fw{|7O@kGAMZw(jC%)ntj@`}Z*YULw&ErylW|+1R9GhCK0-Q~j5`^L+?`OYINa$x zZ(IdF%#xk*PoVEv-0TeB0q`iF{*vJPA13uZ08KGRcS{0zyUx+wf)aMl(Y=O3bk5Oz z62?bMO;{OBBA*q=$wqmy*2DJD8ehwW5jCh0CgNxjiIIz3PLvvYK3qc^#8bUpac zUFsXrioWFk9m?Q~>|*187p>wO^`xE&$o2T2Mkn$`wz2V_#Cj}ZDo!eLmu_EV8yo-W zsCAz^XONrbe;zgJi|k_KFND6n$SyX1HnlIZi;bV3hkcPGr0CuT9$24s4Mf5MbOlH*r9?u&=Pj%1Z{9F zFQy8cp1`c!%T!RIj_pZyNYi^%a4X|0ZGK7S#BFdR(|1nX1}|d#6s;mBZi9YwPE6#v z6TpwDaBvqHrU}E7DtIgUm)$vY8@!J3)e`@_N}E_&ZP?RAz)LFl2{Y`R(G5OIx^qT1 z_zu%|&gcgBlAdKx&2;)I_=IW-QX#tJEwGm^O<0dD6rEE4nuFU=L&t9*^@0} z*?K7n)cbdT~$xtWsJ!bGR3aq!6 zXo368;2Ks<=X`Ill+E8c-y3`zSGe6d-y3|6>6b<{wSxU|?bx03y+M4&!7k*T6TZQ7 z*f^aNzQNaU>Di4U;07yLN(Guk!97;+FN|Mduha_ewSqmUQ0F{wFdmnu-8l~&{EYl7 zZMuQ8av!sT3q830?aqnd;CEzLEg3#<1*fvRc1{Eb|IPR{_I54c6)U)f8LkzDj^bNC z6f5$Nc>MIK$wla(Y{m*Z1n{Dk>MPhud7z>9#0zAXWN_X z>)d#6a1i6qwQtt+L2nvX+#2>~`z|-$7d(aWTkQMXcwf-Z&a%~h%#F8=#1x#x@#;^^ z;#rsjN!%g)Bn~3YGdrhgJ2ijavBW6Y}6kmHX%5ds&xn%NSlMCKM9qV zR#S`N>0d%-rd3RxW7z)|N!dZJ6te##u^}*rk=XEaG{kK%t+EEB5;8w{16ss3g&dMr zgRW@#IoRVH9VisRBax%h*iXF@Sp*7^K8YOf)}HNW(aqe_;ICOFejST%jxA~B^9(!A zU#?@zAj7k31H1+sf+(YPd3a02NBo!ZLXtI}$jSEA5&f}RgLN$7h>L$zd~ zG4ZPJ7y*$N#w}qcTRues9#g@&q*H~4laj;|s1nCJY~mE2@m`!bn`arQp!930Ptbo6 z+AQ;Xl+5(sc?}|cjrdW%^YLr?Zosd{SBpOE_oZVDX*GQX1dKn{**Nh(w}gDkEJg#R zH=tX`4N+W-6z{nc5sA0(hYtsd`WeOVxj<*+c>=1&dmcc9^(%}d@%L|r7FGtXgZPK% zBTcWtpjG@MDhNiO_D<=$1F_2YHPaaB;Z!DjMtw(SE>=|WN7N)T?*N10V|L2-Abw5X z@9@hc=q&M{s(xU~@WgL5-^EGqu@rNjNfkXX#LqQ)C!$#KtrF6gA$Oso;?I|mJ`Cx> z@i%^l1f??QVcY`ZFO-lJhWrJ0{P>F{B$*+pD17`S65>M$9!cUio8Li^tXcTUUcbbM z|D}#M`iy}nSK#z625&GF4JvKapUufX(K;!n< z_#D0VBbEPtDAwbgLz?pY6H&!IHoc~)1pmL0M~`#a13Qj zQuf%q8ljmlpmtQk0&eu;dlA8g??e2;d&cD$MiNf{5aB&|1?DHLe>(}~_isRlNZ9B; z;2QpEXt#uOTs1xZYth#eHo27FUxoY<&UL8-e+mkku;pzC$4iMnmvLK}6-?m$4?^dJ zZOLhNeqWw^{}miGPNGc+cA?UE-(u^fRPN{8pc`?GxFn6Im

    =kX;W){ig#;PlZ1IsoCUq6{l(uwsn`pFv#G zP}y+K2-2T$(l8-aFb5Z2(r_V7y(HU6Do`az*;gess{5JYTPdi2!}kNumG5&jj|roC z=39?ii1STmKR433%pqxm+77Oaw4`ln1zIS$16n49l>>Hkr(h+syCAX|UT_P_nslL% z{ve;8lcL-F1(!imlDo|x#^1!?Tco4=`~{ceN=SU(iG9EOzV?^&@zB@be8174N~f z89bmMvZ6HEcn1_kz4?6iLmZ9CP=oJWe90*-UBfZp@p>=U-Lpe)HcG&btxX zs)oB*oZU-Nl*^%Byyrp`Pyzi-l*pJOn_u6 z2t{1xy)JWe?$u#-!o7@vI>?IGR*u?4H6DpdV2v!MgvC(_k4Sd8->?9W=pM3rT`s$X zdW7#mScZXZqiP~Nnb+J6AW4bNp8)49}%Sc!1s)BE4Bq^iR=<5t3paGc6TM=_@@^l#Iqwl z1g3o5oW)8?lRuelQLLj_oOq8bWEzD`afMJuJN_0@Mjnh#Tp3eD#?t)1vstF-D06px zej|I*6y52==I*+ITGwhl6tS0UmSTaP~r$)<6bC-FQ=bE@4y%KQD`YEV21nwy*@?n z#Cf(-Ne`pDrecy0)qv#F_|Blz(2-Ph z;2~rr4jJ^D;bJ5jb}{n*k7W#fo&9gvtaQDNXIp6VN+;wGrW^IG;f z`NS99b3d`YYr?Vq7-ezcLC?om6O&G#xeshKz?)w%Otb*dBGTT&2S-?Vbs+B%qd zFI&3`jzlo(U=YVJi-Dme;#eaR@B;4N#iofNI1=)Tp-wL@Hi!2tE=^q;Dm_!Z700%i?$?JNhrg!y60*^sf+=4w_ zx5a%#sZAyCjLgAulujjHVqgh&zl~jl_pVa)C0&C)S87p7V^@LU@0B`z;VIQ4sz*>O z-!xzKNI6*;Icd}eTv*Lh$@rj1W?Mn0s@_qK4`P3M(|RKB-%(!3cp&d{+c!f>y9SnYQvKBA5~;~!Oh(pGJN1MJ48wJq!FTF|S`g1_r!&h?L~UTNzZR<>Xl5BPyt zwss@7-Po{h*%D{_FUDjz|9Moskz7g6y2{mSS2nDNlM?6X?O5Sj+RwBd-(#w;GwCta z=*%fg8x+&i;j6`Y`gf|={%amreUy`$THI^@hfk;~ z$$mbrPOY1Dv8~)PvjtIoG-3 z?_>SW%`3+yI|XOpXX8P2vh&bE^{Ml~v+BHH#H$6JPK+2`H*!2f>cO^e-b{B6 z^e(>CIs99-HF@dUrj4i#{H<%kwjWNxLn>|mFP>MX>LJxa@8Zq~+uL*hLocZ5$~pLE zTEa4pStodDKo|$|$ieZm)8j*;9T_JX&oT9crI;_NvIKjNGM~|_F=0^u>>+#*yIA|A zV31uA*`_%%1XC2xPY^|y7c)f+ndIP*-Kmmxj1k@XIWNKlq^eT9u;!W>v!pbZkz;;j z=_xgw@?ZFPPw1BMjGrqE?-^xD37x(;lEN&C*_@Ps1*(XQ&73!u7@=_?sFNPhH0KtV2o3C)9?Xs20u(+K6P|YV+>onntfzgx30AR)tA(M zUIUj~1t)sU)N4*lxje z!>3mR_oP`zY=S4Ll(YQ{D~(MRtJFbc$*iapugyr7e0GkN@G&HO>Ad=PD~(GgVkNXg zLV-v~kCE`}ZW7wtZn-<7&n?|j8*tnnsgz9Tu0>Xs_e;F(v^)KOZ>BkaS!5-L{a~q) z4A^rcDjx2Z!9hfnA}n%HERR2T%W?ta?L;_>%m>|wyaW_6Cb@3<4e5rn?x>aGgxXcW zcNi%H3C`$tmE+xjq&K!b@P5!~L6kSOA65yuZbz;q>(M2KanR%3N7jT~!)VnDravR= zzD7&{Ij^2!p(DQv`Z7ef=;$JlzEBh2!JQeeBIQqry2aT(B^&*dtVa>o=&U&tN%xWW z#=+R0Jm|a#UbAI_c3E=GYvB8M0!CEl*~k1rCm*!AV1+aGH8sHesm%36QaBMiHaiV< zR&L_fYE%I_Ih$~_GvYu=wr4h$PPj$cWsPfbc72i=a7x#yKq6j<^$~7oQFy=7`r*Vmq~m5~Lb_m8WOhs(tY|{pCt;zn)#0 z1Dd%Mvb|a0_{(?L#yiLPmkWK4S>5^5HUGy>*)gk^m1*QS+m2z!@7{1L5_|O4TrWA# zf-5t-TV%G5%vVms=L6EO*=>59%T6)t(<3i}uAIR-(Ri21@sBq1oSL^3zrDEKh+a}y zk?c~utWu0`|HC&tb}L?8si^5%p(!~Peg9lwB|fr-HoO(c;sOG{BCp$Xa@1^B^9RGG%1W6QeC? zV1BoF&Z9(*fKiT%ToQ25NW~Mz%|f?px;LDHN7&t(e4!itzVqzV;(p0%Q6ptK~cS~2guR#;m$Uz1pW^MYCYu;5oGxF9OG51xy zt;<DC};b#c&eQHp6XDzAC6CN`>-<4x#Z8V)pg6xrSR;v@#wCt z#PNo44YAm@ZjUd)935$lEFTg}@vwse$Cnw#S;UF1`+)dz)H`T%G>j{Vr^4EVh;HF$ zx=Q>>dR`In;i(dUjM&xUrwct3Q^lkaevc&hBe4di1VCo+84-dL7!C!sKp-C`<8hs_ zXT?JfyC`uaagJ+`#{#Se9cBg>F=DQi7z(`vIx2XfD29^fk*^w#7Klh!N?e37nTYrn zA|5Izm>F%A@cW4K+`U-haTB5Z_yzb;SpFS<1~On3B4H-+OpL~?vO4kTP~pt}K#dKL z0KZuPuLgpX1g8l?u8xNojks56TqU?g@O;5v2s(l{2;L$1px{$3j&*AV3cN27M+83= z{7UdU!5;+^o#}s7{ibTqKS<7xfGkIy;4;Cp1=k32yI}Hd6XYWaX~%iwuj=Hu4}|>2 z`P*OBRm>6e1K|xHrk`5b%5>PI*EmVna* zn*}cur0G8s+#~pk;Fp3w3I5ja^1UPYso?j5-Z(ctO%R_hVTljH+KB?NOd@Iow+P-R z_>|x)f;I*!rXMA^P4F_oy96H>{GDJNzgi((uO6@k;>kb>SRlAmutjjA;8y31k5oqZ z3LzcAy@GcMz9RU#AV1$So6iN02`Y?>47UXn1=9pWf zlLbc$P7<6WxI}QR;C8`l1@9GnNbos+Nn{2u3I0*=4Z#luzarw2|3>g1#35Yq=BDT3 zDq2{k3-%@=zQ4o|A)=PK9Dz7W;=?7vFkSF;!4-m=1TPZ2T96AQsrX|={5>gnkcfiZ}%A|AR1igKmN>!2!f{d}|UMMugxZiLVr#Be+y>HL(|b^$DIs zM7r$~e}&+U8qxkV|Ij5NW}zg42Z=0+#J?l>nc#QCK5#fE*g*up7p0`Updf81IU-%=RqzA}X9&aTg69ZcK+G|Wiv=$wg8yoX-z#`P@DMT2FkTk?6A}FHO8jSn zKLGXh@54uCYS>e7h+q-%WZYc^ONkIPP2x`zY?SzB!8H=zDtLv2w+UV=;dk_u>;F-S zctY?QVR%jO10wFs9|`@vU=aO-iVqMh6f6~-P8@9*ON4GA;w6CxuO^S-T=bP15JqKb zI$sbXH9bnOf{3eYieQc496|jQjQDz?TZp*I)(dVGY!%!oc$te~<7x@`mEf&{w+r4U z_@Ll(L|iy83jR^>HNp1;KM?#x@C(6j1;5vbi{Rf9VDdp1g87cX%avB?#J+<1DU zw`KS+LB8;l<}@L3qM&{b2R%dR*@BCSXbry3nPHr)l7O{>n+4Akyh!j8!7Bx?5xhz8 zR>22}7zQ2{d|L21!QTu15f~=pTN3b|;D>^r2!1X2t>BM>{}$xB9u6O=g1rU%3Tp3H zh#w^MNWsxGr(i|B)j%A7Rtatt=@r?W?P*`$FXA|fGDqgDsm;~t^a&}u=AQKW%XFU-C?o&ms8BD!9Mpw<^% zt(r7Y>y4fS}<0nqeX zA~e(9U7^rH(oje{AcF!qHfUr_r&Y{&0}&ZQgu$J1b&ViHmW;G67-~=}3|cD;1$IdM zPF(C-lY1m!9}&{t5&F+WD8^Yn3iQbEqOE2@a~_N}S0nLrh)|dgJ;=Y62*vjbeJ2qG zctz;;;XFY}j!D3AB1+`W^DSAuYW>>P&2U2zaU1FSpeQJW4+^zyaDI3=bi+f=C=K~W zA^KkHBNu6Fewb9BpFV9%V^ABO7isJDh!21wZU1alUiVhOEN1n#V-Q03`blHn7JL>UDhmkri_c&`>%+YmRpq_ z+dF>I>FXdi-KIv@V*ErN*YSc~)vIw!v|Br@ z-0R}T!Svqs|TT6`%!6HR78NM-G%_xfe*=vKbLslBR9eQ z2$hE#OE>B4$QxrR-=2UNhCR0QK=b=6w(z%c+|qH4?>F7>ARIre_!WM`^xJ`;6*jk% ziu&z1w|Q){>$QWfIWm97HHTkZb96LkR=N%`4LD!ep*yZts(w?WTMNhQI~rs94L0<& zsj#59buNYhlP9=_{{&qXXVel~h7|*@XE<$p0j3AZo$?GD_BI!Jk2) zQ8%0PR@`a9eCi~i?m6_a&h@@ZQ2S&7{ zpNh~KMl!$Q=|FZO%>=7KZCv(YB*5b`d>f%nm&WomH$gv_PL0sXE}avh#q7QUbjoMY z6lV9-AmtZOrK{Qf+o-hQefY7%r8Wr~x->9JjNScuCW|q<|2@hZYj*!N`72;siwlHi z_oK-_$^IWr!w548Z3we_T4ZUn`w(g~*6jY@Odp=2b<}qEZK$FcyZfLYDPeZcGFZ7V zyXXFrv1a$FjIWmXpE0|SqXIEz_jKbJYj%Gl3KWjDyU!-WEIS_Q=t(t5>&jTO`_HIA zjM+Usv%>7&RS;(PG<}BIy-UOFo-L!z?gvotBAXs3v9+xkJi?-DvwIkK=I$|r11LGh z?w-D4W6ka_VBN-;-4{?`y**3|gxNiJ?u<3NU&st%%Y9Y**)KoVRm1n6@=M6%|v3&?njY^*}c9y zxV_Y-vj*xftqZ82u|4>NwXWC*i+IvtHQyXQA~nB7n?OIv=*ThV2Vn2HQyfGwM8!SAX&+JmWwS$CtX~ ze~{#v9zfVV^#BrQB-4LG+>eM(=6(rr97;3~JBH>78p$k3TwnYo7e{!KC-aOF!^yLF z$}uJGM&?ydk^@;B$DQQWBzfkN=S9fmosqM2ekg?5J%=4wCs#n3^r`56{vqm@;EDI_ z!Edr2gZ-X4sBL(wWh-agiMx;rCm%lw!Z#hwZTPrfhsVdSKz<)zlM{T`LTbdW(yQXi zdmxdIUhb5Ss}oFoSI$6CFYaA}ycpeE#jiFC$u}Bm7(VVup^Wss$U1(l*#{9`)uU(* z87}sr|6{*JWN6|p5B478Cb$gctzS zq*f!Nra#R{$U}Vwp6n$^t48V#R(3D#!+We6bvt6s@a~O$jx%Ku`Cz@&hqq%j?ov%P zLptxMS?U`WVoFpx$6CIws(}#YN}u9NZ+4|m)6#cuMAFgBZEiGa4wCI*(xprq)|$=j zl6HP)+U?Z4KAM)V+DDmoH`B&LGgbc}nvXV6ebu|nXgSn(rwU40keA4)^H}cYu|9i0 zi?W=pj^c)me(E$P7iNZQbyRO*nn;X*3o zO8otqN#`U)^gl%X=~6kn0+H$vdyTbwPq@!!lE2fJ+3sey6TRbhqQ*YYvS{zoH#1Bo z`)p>dz3+0?hx;@@p!#4lBI&pp74Z`TK94Gq1HqgNQ#VGH_}s0;=IpbW>E~|GZFE)m zA6M{tEbY9G*&b88ka%$Rf^%LfM@=Pku#Lh-2)`VO)M3icVR1W{#N2(3(T7e?)F5W( zTB_x8rXt}B`#<0nOSL?jLnmrWHJGB^g9QEYE~E!P%gCJt=}AYe;RsSHIR$VM=R(y0 zj{7i2LjZ!fBY?_pjq755W;-{=nfE#28{yoR-kbYncQrWc(`o<3S)jh!;LJ-Cvwn2> zoMnZuad6)w<1@7J+M3}*GqBQ6eH85F{4{Qizir6Ttb|SpG28rhG4l!epxmFO35!+753bP(~u+e$2_Ic#H zpevWB?7KWTIP+k;^SIK5XnJPFBcy*jf12gATYhK!KgsY+RE}wk{{P>utbfhep-w@% zSrlVlqkcTQlXA4F+2I1!bN`eK(^TQAf|3a(B|H4Eb?Rb?g1CEWpDk5Aox{D%K0V54O=ZlQI%9T0x9z4KdTDpyrM+_hS-s6O z)&BRg%&Sz}m%EajoBEhXozbIJVcVluCMCD5hgFo`+fmz1wW+qA&OiH_OWRIsOLeyQ zGw<=7)x5f)?eA}9wuP=5w0~>JOjmJ{t$jy2_l+N)?p?CDu4$?Bc#c`+^v*SB|D5qx z+b!3W)9fk7xo2NVFXzcz^NGZXmDMw9^gh4XOWO%NSQ2uEo@6d`3X;ZWI**=Y_G#Od z+IN5N0cLOIg#J;Oy4)`t+$PaW{Hlok4M*?D!D}VP1ctUZ^L~zx*KRky>L{O+(yut! z^J23Uo8W4@rJ0>kyZaV*F=?6}jf$uM=s0#A|n%$>rv+fGpn7n*s3=xTuUqcv5LGr{%Z|6M=mQ27DbK6 zDk8fQceQN_K}4hqSgy)0{`YBy~ez&Sk7Jj=OYzV&oB zn^S>l`{c3t{UPRb-Z=y=LtQ<$CG2U}I7_xGPfd3;!la2>@tp4#*s2w?D&m9|cDN(ZF{ zoTEt7pK0(pESiSXr?F{joLkNvo6%N!yC)?!_*xL7+`R`@jPs0<$5&=zJQ<@i?{g7t zW_6Ry4`9_0ae`IS^ANzhDOKamF(QE5%iw>sICQx>o;nn-MsTbOZ^TGQkCEVXlfYN) zt8^*eIeT1S;KxW-0Cr}~_K9TtWVd9WIkR3V%INc0w_MXoI~%LFGc~6u%h~m8VWzV+ zrzkKqJ0>zaMmBDLT?)kwuCy7K`IB-k|1vjSul(lINkkj{_zyaAR3OD^`Wf8~fmZt9 zI)~Uw8B&Umns~2a=|cF6$QvdaAV?oKqVAc89L~#)qvO-M@jQcu?W^}|=))Jl*lau) zhK@ouv&nTvj4-pje?c3#CQwU9n1P|ks@)IXuDE=a){Wa2|>^Xzw4_o!4IRp1AVVWtl)i$ z=3Lp`c(b+SH11oSmC{w!zSwJHds%TmXWyGD$$5)=T0e1$InsGvl?1%3jX>MBhk7}e zd~XHHWA9aLkKslc7MWA2!R$(LH0y19i zM!x}?$#|1yt$ZmoA01M00dZMD(AaF2)2PB^F2Q;X9napx9{-bX6znouRJ*MBXTy)#WLAEiV z$?59Z+n6OZ$4}ZrH3=QkG_Izu%Nmv#c}tDPIyVqD`Atif8F_dr>t|+bqot&Eb=shb zduXm)z0^5;s=2PsNzHI3PcP1NRuq}bor?#Wsci>SGo9cVbBeP#ZhUX&mt)L{ZO2n5 zhIOWxf5c@&g=n=yMQAQGfQSJfm!}b5>W&87IwXN~gddnkdZJrr#NI-);>jN`{1F^P z8m-KB2=gSH0cZs+2*_Hap%iaz@l_(Q+HFZHxRl`-;C2w99q*y>7$?bZqO~ZGsNXBG z_=5_Y$c;Ulh^3esv4{ri*f4l-jO9ucb{#TsBqE{`G)@wPZknDic)DPd;3~l_g69kV zLeLSsLGTW}v<4YHC;?9iz9jg*;1R)31-}yfPVh%TKATW+8aEOL3Z5!hDX49X5MLLT z0BvN10BvLh)J8_Yb0l6H8G+VDMnFC%FaugK6CV8!AXL(f(?S&jtTsFi6Brf4Fv9y`1=H(6x1vK5dV(Qp9mgv5$$iengj&<3Jwt* zD>y}Pp5Ri!wSwA`3K`MgI!pE|!66=(E)wLj1IC}J5!c@;2{=#ia>1Jf?-P7lP=7&y zfDeTJTJYb3Nw^_0gJFUtf-?m9HJ9x9se+RQ=~a>8%LTdkAGz&f zr%s((Z{4NpAj0J$&?tBl5wqmq3f@YD+`SV1m>|C|pkc2QF~IY65|NwxQvOp3|IQ%Z zoa3&M5po4v5pf0KHnYT&h=^Dr;r#?h3esO3zh1mRa0(IfwGzHqaHZe|!P|(%sQ

    zCv7e3BEcFW6wf6he7WHDf;S8Po>+!Yi3PV15${n6-$iVX{lx_LNcgJ~{ytFm|G$ud z2KJ2vBsBw#gj)-C6C6P7X<77p!tl{VT<3YPm16+Zh*OQ}f}Gee9JQ&jR1mhK|04iK zYlKdXy#=cTM-kBrMhi|5oFrH+SSvVBaG_v>;0nRjf@>`I{^fmJjJ=mMdd-7^+XZ(D zJ|nnCaIfHNf(Hc;2_7b*Q+?~+*QGKi?BhijWU64cV6I@1V5wjSLA}Zv@v2Cp?+p?h zE~r1~1%Hgt69lIURvQdkb;6h@sK59{#0H`HqL!U>z2GLn&4T)iV1(Z*^j1MWUtqjl zg3k!PD7aT6`q-PoI4JlPvB2zFLp&<{`RB$!17_$vQ-eZ&AB*^a+NZ$<%^W;HcY!%!o zxJz)4;ERF>i5P7T34SK{m7tzKA^fP&iqjp?e8Wl%3T8U&V_<}Yq32hi`8JrN&MAU= zo&~zE(0XMA=+lKhTTsuxz`sD~DS|TuX9-?PL=V4=UnlWol`yUoyixEb!CM9I6ue(> ziy&Vwb2!s0BY-ap{i@*Gg6|6Ig%ObZLVq2AlW!#8d%>Rt`C$wdW5Z;PLBVA9;!fsv zh@+Gq#xM#MNiRp9bhj=iqBr#*qBm3#(FlhU(e}clc!D-ChFD@*lZYt7Y9h4M5n%w2 z*m2ZH8VMq8jp;-TQ`v&rAdC-4OB+%|gdwGZP)&ov=DrG+X-gs9l>tC)F)Zv&8dyby zp@Rg65@GOgL7fp8KAJR8X9%fGAPt;EL`J3x4&+QV74=Wo4$R3VMC9NKA}n`_u$UeL zSai=2Vc4IEFz6d13`#{^(2$NqB;22f1kWKNL0uxco;$m4-0sS0dN6>OTbb|39 z1(Ac-B!V6pkrO=vB3zGv$dTS6(zy04;t^R}(ZzkTby=>bTi1&2ZvQ9RmW6x5LUemp zDeusGS*OCc=jHkv^}vv0bxW$>u0FO<6{{bdzl8>Zn$+~sc|>kW^~P%FFh-E}*?&|e zR>^@a2`(B%-xB)yONbw)PeulWCZ9;LeL{X<$dZP|E0=!fO}WUQz3~?;Hzl$E=u7yn<3m9Mf~rJ(Nj`c zr%IO8`Ac@xRTlOdl8H4ec@1`#%+yewRnlwGl)rhM#rRDtc?`cf0~4x3mLFh6#M~v- zjYr#t%P&XG9oWM4EMyeJ1*&JCSuBBt26K-siCLE*k#$7KrN+cqQXTPXNY(0)!taUV zMl@UPGj!~5+y78eBnLD&8SXikWcyHMjp_nljPL>4tLCXA@GA0y{S76**&ivbaY#JBCcpX^8rR!3l{E*p zIET}mx3*+0!eeG9>yk>W>==pn;_w4WbnIj5XX}{r{enT8kJ%;RBe{Vgi>jZiNm+!a z%j&r;PaY{szU4@f)%pkZt@A_j_gx2;{D9XD_*LH(4QV%|`EC0@w@UPy7r2jHw*>~T zfO)G``=qxtR^BAMaWzY@jwOH5(=g+}mWXRflY5lj{A0^=ENCd3c1PJW0NXtOmSrl zQ^%ac_>kfDl7p+w0-eQ63U)sf$y`hW4oBO3 zQxp2vEts`!{CBdck-7;hxAHHI6fi187kq>^1nnXlZ5GfpiC|K#9}fl9s>0-l#3;uH?!ukvxdg<~gi>l#lbVma-nFu?Zmqg>B8 za{A39$CLC1BTpr#|CO5KecuPdm&A|0J@c8u_?sEv^ZId3^P~mv)0|IkJ*W0ZsHd1u zYdw!LsSY(feF*VA9r=vb^9+A_uE($A@dj}*hi!lJxrL+bA>oxUCFyhtqc)})VwO!f2Y$fS>jO!rrk{6xrXf0*Q_qAJ(l9rh%B=H1OJ za!G+dndIkQ_k&S(sogxu^_^u`6dgilll~!5eEw;WP5L34+?aqn_AGmv-NWNPd6s=z zhSuoy=|_sJKOHt`U2XQ zF8r;^{|f00p|>ml>t6Sfv+a)Ie;{H~mhT-Fdo^U#1N(UT0@SLloIW>O?7=AVOjKdQZyJ-`6H=Hop9)1Dy=<@Ycw3~Un=cla&8cg_AeEvrs^BD zHO-Hr?(F2dp93rS28vGwZ{W6$cJKk1=?OlEUtcf><4e=ilgj5 zAoDGT@Z4KLS715MLCV|ZP8f@9gzakMrQiXc1QM6b?Yj^3!xxJgORd;=`#ad2$WK9vg64ajqIc> zG?XuAHZ-R!GE`~~_ZmxC5~dD##L9V(qDwi#!97q8ALFMidqz{aIS%edQZ9W?Qw2G^ znNDeVO;bfV^s<$*>Mczb=j1VoYaY_Zw9eT_Evw(vVWl}AgPU@#q1xmep_c1j3q!;% zX=^33ZgV}WU{vxG`t(@{B;ScR$uFBANG7v0CbRsKS@NF0vq-Lg2Xx+LC_%NwVX5K{ z!W`-(FhiY9h_1%9^FljeFa&kp*3QLe=5vvAH9tvFBagQDn}9!cE@S_Q6cNgEt}RF& zhm%|n*QO-X!aNseYGaa4Hy5#Z^QEo_)5P4Eq>B_W^Z15A-Pa_UjW{a&XjJsRCeb_; zxZ2euT1U|jqmsLtBwt}}PD|Fw=w)nva851!CRVx^gZwyRv-4I7L8n>CPUJmqButJ7=XV~w2vZGMQpNvZsdpr+5 zjJ}uBeBIEB%WdpS^qU8)rg#Y~doCrpC?WX+khz`@A<|OeqgKma7pFzH-4fKC(XuX1 z%X+OP3^gqkTfV(58g~fD;jAatx{13jF7Bfd3tFnSEbxQTa>An~YZIgXIvVw0T-0~< zkf~E0g?b6&P9&1?GSJ+5QSmK=N%okDJG#}K;M>P`)6TV{OfmdqjF?`ix32lwgiR=X zjYafNLrsEfF}>s7U=_8n96EZVtW=toQ;^hQ)}AE{!x_%P2~PQLAOJv>RX`i*pC&MLwmS1}M< zn{yAbtv+AoY1=qET*9ao$E`NN*ETvTvB;czh-@ufZQ%BO3?I=%7JbBd8`4R0WMP*Gx7jB1b;f0P&RgH8jU( zhvN%dC6Qg8N{ChZ91EI&1LBn&zbvV{7XEjui%#IW>pzajOD#;zB@Qy@KH`wL^-L#7 zQ3@?LrqJ}#t4;|Kxl4ojD9l<`&XFU8O9N6YCl;9VY+{*v$&1LO)im_O(^jZ z%M((Jb(!@`W0hW{R+%y~9(rTgRuE&i3M|8aG!H>umY3v}fy;xVGml&YR&L`%%Ugv*LPd}T%p-!Q7*bEmcuKuI zA~?j5x>9(`c?l2p8y@VWJa~QQ5sAl(DvpzNe=+Cg_y1{gv*XO=#uB#m2Ul%_Ymolg zc8udBw|I)`>n_{rWYTw7vU}MpNjsZXdNrymE^ngTwU2qG#E|h0$lz?Ozq{t_zDXGu zUO2xioQI)+&ATGFcKX888@>{6+2JX4Q_k*{rfm1+3ste3UY3*^-r`j=*2b;%`p&P0 zuZ>&JwK1TE_lc9a?>Nq`<2buhRdsxK1GbR@6KJ4Q(RdZil@_W-0 zIiIAf8PDlh9y~Cz*+`rZEY+`b=W?I%Jl4cNVyThkSB!U>jVZRVfsay6LF<$nHGaGk z7*mB+Zt+3e5M*%)+_dChkT|H+$cph!>b%6LSdlidyirFUlRUn2>t45wJL7(M7k=aV zs_^idoqe5xPG(JAlOfOAYD75txj#wu+isOqlb+ceD=h1=FP6N;8v^# zUp7~S(XJ0&ZhPIu3+z4a1@-n)_rsQ+m}cHc|6p&|+poEy$L)}D-*xfh_A2+0MRs<| z#EJCT)xGOPxA+N9b2o1>T&R6872ZI{F1DMyd%yIwym6_WpL=Z>`GD#ocYTBX3idj*KWJgB z>~hM)dDh(O$x~<7PnnG2d*7200jw8$6QO5R|U%c zSLJv`iqRK_TQm<`gbmo8s4zkB7v*?qi&2ObhbPv@=~1klS;Xj-g!Q7s$QsGGMTez2 zDB|`lJ_sr!2d|(pYZ@tcL1f)xq>IzTQm2RtZ zJ9{tgA1sGndsQ%-Ue#jN@%AYdDh%%7tIkF zcib|&Fro1>+346MCq@|?j7E}AtjQLPC-?V@?^%~xUkE&ayRJlPET z?)zjEUS)f8=Uh~4Opdu6bOO`udX?SV;mPc)>>_<~-BosOeu6x-vk>4)50Z~wg%R1i z(th2&zFX3@ZinmJWxKoH$o9FD&QJEK3GVw-+UK~dYr6PSl2M^NR=7|0Q#l#e;FR;o z2z!%eyARrV9yhzXZ@T+TKRnu4?Flx;e9?WV3jQ+dI`#2zO-3~8XPTc;2wp7Pp^#QGfpqa)=#ZtjM;+_?Ow0> z`w4MUF|pALN8QckebV#RoPqZsh}Z*v8Tj+ykM#HMEj93NrX~AumuWmuj2;_eBH;_C zXe8=}XtYRHfF7zBsrqmht6?)Vq(hR)a?MU8+2RBZ{ARJ78p4GM8Xk(EAaAjCXYFffw(H27X8zYr~aj6koZM%k8W_;}TT(CR^4nM5PK| zs3R(7h>FNv_8ip6aJ?otlOJeMdnD+I3hjom`DF>ImSg&J$jwMg$?C~3cVi9TgH#)! zgQ<3nN%eZj;eQ=i`bc-x;lh)WPQw!qIB$FbPD?kxsxnds;QK8!BYvlNrkn9lNdebi z-))u%d#<SO&D+jO+1IxL8U>YE0y9dGjL>Ik3w&bsS9=eKD<8L1dAy#2GyU;0wmYF!oX%$zMcsHblSGfJZbMm~!Cb02WTk;X{H{W69 zbsI!{=R2pBd$1dJotV0)OS)Uo-443;MZGiKP2W2$Q%=zu(%~ZKtlOI7+iEt6ro+MZ z-m!;cb+;~%tfD30DSf&%M`%9$;YwpJZp43UgQiQY>*B(*teb=$qQjf(MURw6FG_}j z9P2Unk~iR(ic{T8To-sXjU2Gk`bpw*o|uWzDpy81_K8d@->MM0RMUmpodQ*?)O0Ir zl!P05i!EMNA_w(zn_e7@ZZ4QB69ghpXt;2A*>by0zl0fP!u&I4Zh2gYo>jWLmgC0w zw=3*qcR;9(8ZK=s9)`l!q_glT2XTTaWk24bvDv{j zVOT#xq=GSIV3eLpM66jvL|jFLVcEnM=qN-?9@z2xNCg)t%N`_O*$zWtp&>jI|*`QTgK;p*2L2UM+=SfdK{ugcS%NJE!zas055XaV{Qiy+rU+gmc%$I0f_Do( zAo!Tzp9HmkN9frv^t*yz7z|rSg^`RwfeB^{YCjyHxyv&7eFcXLjuYgUlMG)VxI%E9 z;AX*(1iu#iJ246U|Cm0(8eQUG%i@mJRG2GRCfJpTzaE0UiI5*cg#0wYS;PSLp%7d^ zgj|D!uMylp3}al>%cOyvKU47cBA}N`L-A9jao_kS!RJNpHIdWHq#^eeX$+HkS6AS- zBKNb%HA_J_JOEzCv)l;ASGG zQ6=y)`SVZN`&A+;xNnlQjk|C(mrAd#(cqaBIH97&JB4f z*HdsXv8`nd6C6Q={Q2Dam4bRbHLzYHTt;k%Z4v}mNrd$he!JiU#P*i;2f=MbD1K7H zUlII5P%oSAXj%Ut4g86_5Ho@o4Tgp^7i=R~PV9`!rC<*t>16c4%>@w=#)yDkMh(UDN#kO@NN}0RT_tii3f>{ORq$ECeZ)Rk(JuHF z5$SxW!%_cw*)$U3Hnhx18WEF%EWsQiB5+4rhL;QW7aT_HkIS>5b~6h3@e+Qq;H84N zo?_rJcYn6~tDZU4VRX<*CE);AKTp_qxP|rRPe}mAQ1aB9-TW~uOb+=RS z8DN-NBPl$dO8GplF;EO~IuX_dG6g(*Sk>F>7hXubC{811uo3$Q3wxd2i*dyxc8IZR*pu<)f zPhevQ!LEWm1o;(1fLOnQE;!|AtJ659|?XXc$gSQz)@lRDCpt*5PUv`BI=1LFk9#X z!6LyjLA@yrqXowR!(>bnhTgRXbgj^O<_mhE&`SkZ2(A?5 z*SEZ2Z4$g)@NU5e1-A|?!H)#LCE|*ARFKb_Nb?guVyd8? zS%c0MTFLH8EAN{}D<@`|aa*uV)wPZF#aGyeW84@GBzb4u=Jg3jQdlZ#od} zOEz-+gp2Zgs7x#nED|ge>>$W*m2K`zUBwgNP{HAX`X&YZF+xugoGMr=SSPqpaH-&G zVh;>(f*S-k3EmD2Q$XM403Vcqt%5rRcM0whd{OWq5tElgf}aU~CHSqNz6pYy#d{E- zM=(`yu>?lCFmeUyC5M9i4w|zYeU}96A#`uSL4rdCM+uG=oFF(!P~S~KPp!~Py{LcA zh8oBKt`uA?xL$CB;AX+w1@9GnP;k58PQe$6{n5q*-xNG3_|afF`AqPz;J1Q53i72B z75M~H1yRD5J+Sf27y7wvru8U43qwQ$S?G}~iRf5*?u3rAfi&9XW+Ix^-9*+p5rw^- zh{D-LL|N=1_IHD$@T#)oOML_G)B@FND{@ysq@}OC zy#=d?g}AZ{4kZ@JqblGi(j^#l1;+rx9Ns680h~m{;5k*Wnurq6vrAwdX_Uk~!G%PW z$Wp-uB1&e3;7TG&NY6TfYe=J{)(dVx`nt$Ak%8=NCZgzW7rdK@BD`1dK_ZHBtKfDb zYH_C^E`WNntal0V=|@I-cBwZ3K?(aj2uBHX0h}&beZ4}F_9Y`^7N4*Pr;sj^>kf+S zO42Byn}{f(Eku;ai$s*jr$m%Q3db^(Kx-M(^phOqcqVCNa0L+=yoHF2?bJ_nkRz_Q zV@|S}lQVFIC4$#m=qe&|G*#$oVnB)(^15h|LtQeUb;%&72Sxr65z6&E8{s|$8W|5` zLah@lC!z%OJQ)IGNTVe5d>C{C=^|8($lpyw$>{kl!u9+XC8X!AppP;fB~`#l80aEm zdzp5E9!k0+>c3V5^t=*9sHcq(*g!sta;JpvBBBxL=^n!MbPq+F?SKzDmxvCgD_jM;ttUOX^wxYsUoAH+|11u72Kru)-Kej;SHzaPm@MOCi6&uhl{soyZ?N^?pNHBV(G%h+U@H}X9$h8+c&rqAGAA#b7@wV zZwJ6r1`*E#5AgIEDD`YzjWn9^!L0Ipy&LDj8v;lrIGY@+8GaFP^biB);oJ)HQH!$D z?nGqe$;M7E;7!y~%zMbR9w-y#DOA~L9KjnwgsmVyvO%QoU@6bTsw;zdEwzHY{qG*?4*-?DMP;AubzF z{}nk`2#3qY(>bN`TqT?|at^ygx7Z!RPasX7XQBNe3}{X(bbKJ*YHLIEdhqnNv}vty zxE?&6emp(vgv0gV=_8qHqok2V&b8#+ARMzEd>vKaXwL;SgF84}CzI}O4Y43!m#E-b zC`&tdF@8P4EAZM&mp?>&@LRC2m3img0yA?@~Qq#4>E&lz5lvokdG>a}FVQ-b?kIv7{hpBy!+w z*sUWLfl5rlsVSj&uugJHJ+G!6--d6XtU87Fq zHl^v?>uvb1$z|zaxpR;q_>aIEIDVrjZ-Hb8GS#J9C zxNz-qyFG88%yXgfx zU1hoVy(-Sd zSGiT5%D(Q)`&E%U-&m5+f#wp`t+}9<28RJ5yDkMk07E9&lY+jG1q-}KRQWE_vig~zOP%4imqKw?cT*L zu4|X;Ikji^uI}2W+LVRsb*`iHzcZ|%|Lxt_xXIbLn#$_&9`4sRZgSHOW$->8-HGkQ zJGO;?b=0H1jW-D%zh&EhvSS-INV@o!Hdl+;l`TBvcmw`#?#dRvJZ9s&{YU@nyRt2u z6xkwfYkA4xRQuS%@s@Kq**&{6%`-e3=-n7e>F=zbJ<4b5Gcy_dejNAe6oCIF} zvh*RI1m1Y?lEMkhjbJtvxhMqBmmtU8$5Ik_x$4Q}VH!7c zqzM=At*o}%S2Kq*mP}q;Q(3*`*x&xPBQg-<8eujVwfF9*8SmRMc}I=a{w$pT;k$-@ zBVI*W%;3dNJ8zB_6*Zc&vRqZ?o9CVh4Mpj`<%+WAm1xc=owFFYvx`eWhTAw_!p zADgpnpDBT(xYjS8bZibw;g~Lg?#TOqZ_?*94ybtZShNbct0hapm~70=7E_lXD`-tH z@rT7t?dVt-Hb7<6gkuyO5;Rj8VylOCP4cv2;*=c=P8 zl|v4Ru!3s$?mz|AM2(#KW~G=r5$5L4I5zo*njN~*!j)6N;N>%>)+%R=_f<}*oME*e zy0>x$Yi$r}&E%@r3|3NW$<>a@m2v!nnA~E6)fw>>a!e|zsY;N43_B>4rdm0cSR%SC za81`G!F;;-%NArt3FG@I{ZKb8>@Bro(6DcR8HwN!!*}psHg)o z!n)O7yaYsiDU8~C3~d($inePVzP90*ZoLhMSK@53Zm8oeHr0WW<4W{{9W_~lOey^! z5_&Qs65KBKrs`wyjWmplFA7SRK8R?5H;9);CundecC~Vdb%EHpcN*zi6{Fv12>nc&kUWM2P^`(lSPZzA1@=)rrOg-NAKFcphcR z#{4H%gYF4Cs>2+)^{^2)22}4|j7^c7s^z{0Lr1FR4s@nSwcLyz(bQ8mM0-jjdx})h z>5}gqlZ~EeFA3}V8xSolmO(-n`6qch;(7=NqF*$HK=JE?H=1 z0OL5hh+aRMCY>h!65V5B=hB>0H0j1}#J{Y(Ntv15@QxQf022{Z(!$7mhMOWEzc;bD zJC2nz+NNRI2A(wG@Tdbeo`Wen)3QDbn*E1=g&@4Xg1c(VGXoD;qWcez!qXMJzB-DB zFP_u!Fh9Eg@G3kX^E}OHk^P7F;z5n4J!Se|iDd9nY+y5hFX>h!gtu3>;Ngs?CJjGk z)8XcL03>@37ma{*vgvSV+MqWbhK8&0a0sujPIga!$F2{j6yZT$k?&(@$Ma|Z128nH z*!P7dJ$^dDNop;jKL55 z&v{l-na{0y*Y*`ILvE7VX;G&HuQq%i^HK8a5DA=D;9m5uT~RcgB0WW$&wq0f$X-!P zPA+vHdDrf#*13n@wL7T$-NN_mUg|gQnD^{LTY232_w4qa$D%Nk&X72x{6FL2SkiDI zM;n7i_&j)`X_t)ge^uh{d(X}gB=D(MEa%Yw(7< zK?Sps=q?p}wFJ*4eL=eKN)LWh!ibA;UKDgt6)RQnNl33z!7?PWK?Ns4&t|3Hf9+Ah z8f0^?3eJbgZ>nG;s6#OGE|}x}cr?x2j+f`k`(=AP1P<=zi{Icra)M_gr*`mMv^^(y zStgrf@Kq$>wLBp-Z13Or(ktzZJolmZ?UTZ%qHw*aAG`;!OMLzZDd;F}g^itM{VaNK zk}_?vD0SGGaP}rtsedN&==CYRBBP`%b=07Vi0mTNlD>$GH&ek;G>^8$g-EPbRZ!_Ni1z!`M9o$FW zu7(EeRy+o&tAE@K)tPHiDN1=&dsJTV*DzWIAHuI4d=9^!;QRRXS(#y^p;V?C%neP0 zr=kw6;Q4sguB^;UFs>*yOig5n4-MSXuOgKd2!f+VD1Ka&xtPLgg<4Cg_fQH}@GX?D z3jTy&JNRZ1T7s3i8u?V}HpN#`!E1GU8H!&OoQPjLxF8=*6|Yb4MMbIKX zUwzIfJ5X>|@D*AV+>O3t2fLtcA;!ZfT=j_J%k0cQAlpjqQ28jz;APrielUfi(&v27 z1mo9G$y4e(##o6ifPFU=9(v=g@K-22?41ntD)7j>`HTj~lX_$Capf?nMV9!G84R^SJ!dRJY9;LKB*y82MvL)jzf_Es>AUIK&O z0!MusR%OK_eP+yW)O;O!{El;Fqs^#^|g6R;V24NWMuJ5%jdHqKQ~`yOh29Z8^+ znNZL{$=bn?Dc^Z8G_3mBS1?MoZYneEHyGs;BxnV*(bQG23lc%0wqk>;v$r8QV+1dK zD%a@wp*DjdF9&w88@y9tLc*0Z?uP<0nh0XY}4*n0>k zpPYHr(^EJhaKhPBYZh3l(y(m2E60mSvtl)EXDOYNplO6N zi<+n|cRO3%`9@PlJ9M*D)zMjxkUYJJr^L#mjTk5MkOU9|)s;zDOQ$}j6K zI-^t1vKEHNw#)T}F#977jmQ$m+w^RVy5R!jSblHpf}Q;U^4P zyqK#?gu|Whv#K+Ze>F!~No38VqIrg6D{xpFlbva>w#8=TC5M%

    1Us{GIL0$0jz; zOGS^)#slOu2uEk*DRM3oj?TvG;Dpr*VX?(9vBl1QCdL$V>gLv3YNZxnYO9@7F|=fD zW`SHM(R6Ct&{EY};po(!CTE>+bZW1V(JP&{qR_leu_Q~{DIcFo07BnK~!fNF9 zel1{S3@XKpLQQmbAvllKhX{GhKI@r=p`NooDN!z}=|A~mfb-Y*vuSQ3*gHPk!6Z{>{ zeZddWa2o93PXv7VaRCMw-%~Fl2EP2b1XiZ4!ieUiR18I_hti7B-@9Nm#}_3fR_Hcp zNa+d^lnT{jtWW7?C|q1$!HAdAJp<92O@STCKe-m?!C^?-3YIZ1mS;A=f6+PMr#+0W zmhPYbJkCRf(Ce?~DN}hA!yN@?WA1%#ftByM8l~*x`0inU^DnIjx7i9PRDrocq!O%wfE8TM$_Qql0+5YzT+IT@ zzoz61>_364`a&`s;vL>+QQ$XmSD2~8Z zo-$A0A&J1lUunt?y^8V)JYpzMs5>RM87evSF0Mp@M@>9mXd-GP@YtuB=>ND-g+`<8 z1$LM~f9L^pw7^b71w!4C&%on`N)2^GZURpjs#$0uGxbM91w;EV-UfCVDlOE3Njzz& z^iVPlefo$tG$S+;Wfgb^6ze}T#Ko6^XH8&M$U`-MGE{cxNt8@rx1pMcl0BgI7^+2R z1g=nl=M0q-I)~KrhRO|%CG~=#@*NbUzoV9yNx`8;QRo8})GH>iG}MBk z`;vM6Eh!6e5li6JfTr4odNCKTnXr>XFQJtLUQgFy?L$>8!#7M=htN2Te}T6Q)iJb- zb$P&0okCBteBaSjxTJGvFxo`m-R4?NdFc5fP=}0YMW`8*ct51WP6_eDpTGyENV|m2 zZVl=qBiWVn3@h-7p}K{Bg-b}_Gb7nOw4BC#Zo*Ct<Hn(@7uiOMIOmo$u+&IJ}zsI2rQ|)XZUIa_IM+qv`IH z=NRd`P}4OG=Z%wZuBJa?qYAK_WvF2oLo&9aA$JY5P!}N|{!iIha&fNvzvb`4HlL@= zVCeC8Edm)*^C8MRM0%qLHiT0L&$k$-)tXCYiTlCzILdvr0Zoma?= zg4B%d&cd^&y2ViwS^E}V2JoO(gdlC1YR^+PUYx+Te4yk;n5a< z+wrG5gwdc)?Aww%;G9lNd=)s!_neAfAFVIo?Y8>Lq>HgpFHcp|qA|aUq>Bx$QTXcT zCdoSFQmu(f{@f(_HJZQ5@P>6UP$@s5SC2(SGrW=+tK|eLz2B?ugcJ`BHDwr=)MruY z`@Iq43wE)1OZa8Kk>tuuRg3~KrCZ{Qlx`A=P=!l;(Nf|^k*b?7E}cV+J(96?5qI-N z)4{NTiE4^YrvuLU#l2b?m7Jausf-}H7X%qZS0g^&Y8Ctn?M}U(qICT;IzPl$e~Lzb zJwE#D(daF^Fn?dBMCi1PAF-Nat@@k4Ct576Zl&6yG1}FN(^hzYO8lEm7U}Jf7NX!&8fz@dj@JMd5s+=vIi@^_*eZYZnx)#eick)V*_U zUD0Q#AbXLaYSBU)(DX~_k;#5j=V&E<$1s^6qshE!l9^|f4x@=}l@@#qHgRR2Y8!?v zh1#ID+BmlV(s?wnzY#rz2uCS8Dk|AOD%nPrG4=H-n$z>3c_@qSx~TYi5wC5lb9$qe zrJs#9>fr*8fA=;;?~UkOP^VsuM!z>c`u#D{+m#^pE~Q5xM6`nT~0&Ug)O2 zj>djnVoxaiq_q|{RX4^I#2d^B=3i^;+v=TM-W1zv+nzz`w}h-~+Xf2lw}q^3+lk}> zA*Z(8jDZ9mW$uLW_Sz|JnF0G9Atxc5ui)ZmXW7vj+5kZ=m{T?ANQGft_gS`SCQ}Qq zN4Z0qS4Vs8g@t+_gKXQ_J;B)B!j`sb?97qSy0*s{H&@77B)yoHRy8G^iX!69C@LM3 zSW`dYDoI+(s7j)bDb%@+kfRHAuKP>qC}YW>s3p1p2S<`Nh7A$2&J@vULROn18fwV! z+Nm&T-pUlZ>HP2sr_E4nyO%pKG#{+ZF7gomB;q0(~x8m3mR*a}i~xDkG#+Y1EPyj%idPFvK$GP0?l(GhUuyeNobw1GhfJBQ?&&`O4Sw$In_EzO)N%<&39lOmiOVW znl|>s?ASEF`C&0~UZIPLFC;ldz<^)a9%E~ioKxtqDbIH{LWRBd5-84rO1r@*Mn|%? zQ}K+b;)aM`h|-Upy~>Dof+%;QQBN6B*8i%Atm%EL9Mk*e7JiEhKSE8Sa|-{&{&h{% zhBoSHT>tGxCpv)fIy#2R({Qaa8Eh2YwS_Y{s5Cmf`r2zRHXY~&XR^s}JP;2C~ZviLD7 zg_hzsdNx;W8V@hcj(9g}8}HrdB<m5Vdek7IMEvhK zNvhytZ3~w@rcy+#<-lvz7ZGQfb03j&Y{>ZB&6`!Oc2^Y}HJwpc81Z!CmFC<>!R>NhiK*&V9r~`aH(mxHNUtvrRg=#L?#5 zM?5b+&Eq5XkcdPnbK?!@-$j(sDwik&kWUXl|4R|$il>albJUnxM*P8?`-q%P|8kY+ zsMi_sGU6I@?jt5RONvXgoN3yo8p?@$41w0ti)SK4h^ zV!P!W?w6x#gP+hM_2tA}=G;f*q$@6JTvO2P_5@wd*BfQf_g~bgj)*&P=&nyE=9+UK zG4$^u%IJ_zgFy(Om55&gU@w3?v3$&7mkgj&6F0Keq4*yDKGN@ z^iiOTil-b;%)x|s@bb>1t$`-@SP683Kr;Zmd|IQ^794V}k+RJbB8t#)A!q2U`J;zV7DX$vNSO5k;EW^z+}(t%)1S zWCSDnBbbocQ~s~!Ha}uTY;LdN&8xNgUpnOqxyxTkdOUUkYob4{9`5E6XLPKDc;U*v z@WS~$I%zLlb@ekRYDzoe>e_bV^tzhaCTQWz3%e$gb1$6FKzi#ccHb#=f^puu{+yEN zt?M7DYTSJ6|A8kl;`Zt`IM9ms-}RMtsTC{p^KqQD!9*Wl_opQ~;<_!Ip6IRX;q*kI zPczkwcyC>=XC->;`Vt)Dtt(>m-kGdp*z z{)PWF;}ic?(*;&I##PvzwmPGFe#aTnzsoz;Qzk~_Nm~u?+;N8aUp>9!BK>zuHUHgw z3yAU#wfJ37J(HGC=g+W;&K+BKs2QK2X}tq?V0aP*_hY9gk62MXzRz*~$?m1d@Ui3i zRJ67|ac1m7$b!WDKM&^oM9J43<)n=1Tt0k2pK?lZTe{DIYhg&$vE)*Y(wrPY)-Ln?C)%YQ`BkeC+i3`mBHF1bd!KQnlsdjK8(Z zlCP{?aPucRk%5aBti4~Kp*6&3!A(|6Ok(SFN{l9HCXd_voAJiVQQ_f>*WPc=2X;=d z_`78F!u%@|>aD@6M${zmuJNkp7bNf+y=rq`nI0sj#q7)RN=Hx?#<^^wsC*+Cns&&bEi1Z zDR*LbC&k^>)wwc*)X6}2Lz5BUa zUUw3G!R<}z;c*`s;$*mMuITA?FMP?_u&rG$r&hTayyBedep~5$;C|mC`DC}Ck28AP zsy@zn%6~J?;*0a#v+|3ENg*}ku{^8EFZND1f1k|=G&vYtuI!W8U9O<-HY3D4O zJMW^I182`M4y4?Fe&AGY8+(>B5>lVT%_6U?vEIRc$;%t(8L@Jw|AMzM&O>75{*5=d z@QJ;*K}qD`ye(GYf8-4=q72BXK$E_3Gw=V@v0J>tU)IN~eN)2Cj9<6#{{;tdd{-2k z@L4fc7v`;gL+8tF9A|efF4mK`nPEUSV$kRByWdr4fwH2G034+EG z8^TN7vre+%LeSVm9cM&!=%85Fcuhe@v-yoTw~YB;bb@Sgk{n}&mK$^exzu=lVeJ#| z(h~@BmK~!|%Ow=NHjuOM7&)Eri7Jw_^cXpSna+6IVZHMOEnf$%tuArha1m>*b3dksc@TujfvxaheC< zyRI(cx2}DEr)9)%-J$7D_8D=$@{Fgx9utj=I{F~}7s1+50pkuo^>2Ck?oGgFsuvstwn0=Q}UBYq}+^PVlssGy#o3J2!Kuc7Ttc zHRmUL+zFlfWFO~e?{4E~Z}Y~E9(V7yzMd35FyXPw1jKpVd(-gt{ID)^L&D)<09qM|B61-C!jsU5lXPS8-$Xjw&~flp^58t9QF)(F0}KctOtSMF2k z9eX3*LW##2K_uSg3Gw)Hc#KXt(GlKOXh;_g9DX7i__bzi%H=2%s2I@FFmnLTmg*Qpo2=CZHod;$CFTxZ2A>NNg@W>&-JWYAB7-FepL8AU`{W zZfR8sDhi;Y2vMnm^TCJ_^Ac2y!uJ=ewTe7$Z5eAtZ>XrE3isMJJ#v~w%s!ZkM@J^n z8xmqHjl@7KKE8`2`gCHVK|FQRDk}b%pkil?3eMIdD)bjRpp)JHW7_33)*kTnI-C&o zM?{UZE?%@EQ8RE7Tkd1h8!tG}qE9ohW3!ujLsP>jkBQFZWwFucAr0-hvd_s08nR$m7}seI1~0JBBK@qaOG}u+GzOj6PJP9OF8pA<@U;MGqt-^+^RD)1#$E zj!07XBqa6GU1)EZ%rL1+{6&&_B0=A~y^(qDT9(!4u>=*R5AzdyqoPlYihT(xenud! zqg3%yf{Lz>AP7C4R`iQe@nM3BAOf#hoTLib2~^Mq)+(7!_O!$IO@GkH>F@ zSk@cvUO zqo>qGR20o|XLaS>4i!tnU$W*&)Tb31gR$JD0Zbey-xo+ts zC%qZJ(x4q>_=CT~Nlr<#Qekn31M7M_s}LhY%#o}=m|!dpK(-72i||)SZJbSz&#Q>- zUP5gP;#hFPSkmnJIMzdC{Z3fCc-ZbfvR;g1!QWz{8L8G6aU$@)nB`_qh8bSiKr=dM zZE(Vv7&U0MjuW9%Mt2aS_7*<7x$(r9kok1I1v0g>wjuI)YL+_>QQa5+=A@q$Us9RY zBGGpUXro-#3(ea%8`t^!gyvnEEgJ;mR38q)Q{BREomMKmKQ#n!AUfq(!_$2QBf8a(|fGJJdfu zjAMP%;h@0d!z10z$T)D~m+D?Rt9_n(rrkH$E3$M<=}xlydXhB5%@}F0MPVd$?bAkEWDS`#J|r;$iZ}e zh^HGreIz5yZFwUHWhNxhTsasy7=9aQsyPpTnRxI*zrc}$;jbpphZ5+YA zoFO!CzccY!!v&xtN4ho9vX+Se$F58?(ltV}`DUU~-VqnUvYwUj4m!N6^}f(Wn#Q%g z>E#i|@mB{sZOwCEbvEt+d*NQ${d&5S)Y9DLCfu(^Z;#!{ot)-LTE@M+m(#K0gpT7A zVvC3NIr?tby``N~;BJ`aq?$y&whFZ9L zr^D0itkaOms_A(8x@o!-a*wrlQr&B(Bi80h{M^F;oO#@u>F{zovI38Tdoy%+KLp&x zv%97_r)?Wq?fi~kke8xJ{WHvaR{zE3V+nsPu7%{!G@c2FTS(7>Q#@jO%lb1Bw;`Vh z9wpAUte=VHxCEnZ_%Zw8_u_tBDn=3O%yrLyiMjCj!#Js81mI{voiOO7La!0LT@Vut zE&npHH9Qmu{vgOX5czEddATCZZ3c+df|mlrWUvwXF(DWuc$wgXg1N-GVll8vXcU^| zpNH-6iSv!)06(tfuaU0DhxNpTX2pYl5#|p}crnr;F0ri3=!naYY|>vZUB13ZT!x}0 zUTP*Bblu8sMc1(GJ@nA3tE>eU-jQx4h{@w)q)~Ox6H#Sv3w}XFRh>-4x0n-zUyJm0 zfX*o*J|zJ<2T-7k77-sIAK`l>JW+998jNsV$A~wDG;j_P@h@OJBz&jD*Hwt{JxE^* zd?Nzo5^;c_t}`fjmElN08-$48iy|%-VFI;8gtJbW@EXC*60S?^YCPqT^iY`EX|8_! z>|ZTKiwPb|RR<&kZJ3=(ypS9G8f-3z%vknhadJCFoZLdLmxT8d94>f{Aln%AU1Tt9 z%@79Kiw;;S2xB$9M$i@9B#8S39lk~IaY5ES6WAv>3?)FCjgB~7aDhgY{}saEtcwD- z32qVOg`fPrf?o=@v<<(bAfL2Qu3qqV!S@7z5~LS;%F&g)9mdH}VVp0>yL1Yy5L_>) zJ#B%{yJ3cxcno$H)V^oIA1L(cg69fO7Mw0P6Bwo<-e3|J32Fyept&hL`PT^YHj=b< zj0NQW{G{&?;iL7Dh=b%oA)S*ha8}U{Aq*g5e=@ za*p6w!AXL(g4(eM5(o=@g`oai27K-O7I?Gp?-0C4@FBtNg3lNXTY7VRM0`U6-Vyvz zkedfFXWt7tK0|A#x!|V>-CVFhkV{1vubZIWvm11Op|x9y3sL`P3S*q$G{L!oiv+pZ z3>97}xK8k9!8-)`JdkqS2ZH#l;0uDU3cgEZ|Nl}LM+A=wdT@hJ1sQ@lf`x*mg5`pJ z1P2NZ6C5eXO^v8eJJ$tH2Ce(Q_O1)YOc9tX$eoWE;Yz_q!CwpBEO>_?pJ`H_s~L#T z3cet?Pw-8_kF+;l2p$oJ_O=U}%aN&|rC=w)fr94>P8VDxc#Yt11V0hv11Rdt<9ah- zXTkmf>HkxNp`F-5fc{e`sD0D|cMAQoAiYB{TrZykdT^N}%^O!@nP4x$I>E~X*9+ds z9aI?M9l@^!RWrlaE@2VgM(A?{7YeQt+$4Cv;FE$c3BD!xp5VuV;V&3mVzAwdkGE`94$CWaGKyu!G(e=42G?B!q_Z$zu->6j|C44{wQeUsT2+L38o2# z1ltOB5IjY&hhRUAsQ=T2ah~8*!8w8rg4YRd68yd3cELXhz9#sA;9Snz7W4T5(GZWG+CchEr2-w?)P++46Et`uw(yjAca!Ciu{2)--$7r`F|1KCDj zNU)t?55d#Ia&n#^_j;fK*9zW1#N^}Gg1;e7w5+=%{1L%F3BF9k_2X5+KNBH;NW#As z{HI_zfC)XFz@-Uh5fOo#uh5V_f`f_Zdcy=q5FvNIgijZoO++=$6|5&hZn=c775p`k zzJ`BePOMvq5WGhOb_nh!Vny-`g0B!E_m+fzE_j3(!h>tUe-I((;EskF$rNlY*ojye zh7Wpug6>B|genmjB{+sygqudeNkquaknlx<*9qQ8EWu5!;BSeLzgxn$3GOEH`oEti zZP5q?4-gUIVLb? z5X>RMppyhU6HmoWrr@bW$n}@-vjs08_QdVC;4~uS>Li@&)v0%l;HKO#7ZnGE3V zL`1k>1RfWBS@3NlULUF8Bw*rvuhnvs5crMg!)(LGB!?dVkEWy@-6@mi<&m@k*<2Yg%C+G15iYJM{Y{5$fuNB-Rc#q&?g3k%QDfqeI5#l)* z5e5H2L^^sKL6&Ht^#5X<(DHJ@{({`3%RUzahu~R6C>Sr{wSx1A=i~bj!KFmVT`A!= z2>u`T&OE+~BJKCxefrcnImtPk?BQe~kN^P!1PBlyKtNOih_!Q$|y3Z;5LjRf+FIEsLTv*cz?g@CmZTJ_nmv+_ufC={v_wy zPc2VXS1;97^>o#0;iJNBxl;e{qQe+;918c4Q1HG4{8C7p4Q4c1*pwW{ua!MEClRlm z`1cf^CY&Hd*N~}IT}zMck$DkYc9nDjtAx{qvxW17)xt%>CBmh`6~dLm)xtHxO(g2u z&BAS9oDSQ?VVCd?;a=f>;bGxt!eheYLXJ~VAG@E)G!hkemM~vfC@f|tECaCXkt`Fk z+nDkI;b7qi;V9vFVWn^;i8p}R!iBQC*3{twLH%F~BO}8sUS&4Z=;rt-@`> zox)wh{UmO&gTl{*N69!mj*G+hLf7X-2nwUZG+~Y~Usxn87M7FwmbbnxXnH`wq2fMD zI2w#IV5K-r5t;>g;ZCb1`kOUZ!G$85u2aa1MdtiKd?#BeTrFH9TqoQh+$`McgiS_B8B{co=gK&{i2F+w=V427j!U4kgP}vzF94#C#oFc3e&Lh!4 z;DXTPBH?1;QsJ$_mBLlRHA2&me;UsJ265OV+)koluv7SkaF1}m@SyNBA&u-9@3`=L zq3P#`doaQC=S)a!AmkY0{F{z`I24J8>F|eKDss87LO57BR5(gFT3AJ*VK7}dTR2Zx zEnGy#5pan(EETR0t`x2ot`Tk`(Qw!-+$P*E+$DTNxL3Gecv$!u7^k9R;&5EZNs!p$ zND`(AvxNCV&iT%8#ljL{nXp_)TWW?IEF4XuL4x(JasOjyia1mWX9{Nv7YeI|i-k*s zw+dGX*N|wrJSf~C+$7v8+!iYL0`3%tUBW#=&P`552Ze`)c%WI%gqmT0>8o2_P*#?V z3U4u;P{A!FyXt4I?wvUV&(?Jm@#r!w6Fh0QQpS^EJBb^27l|8m4|$qp?I&@$9wu=W z9wpDxdDryLOh8FR`FcH0M@HD0y8X+267`fEJ3Ste$&A2!hR5rEp|FU=dpPQT!xA#n zGgTnVDC2Dx1z}i0=A!-<4kq(aDG8A!^U5|#I2xSBSEccE04vEhIH$rY5~)uY&LmM@ zvxW0Wl-ojKHHmtBk#I5D9e0VL9(G|_W*p_Zk|MZ@MER~3t|3v*4+__jDDMrzO(YI( zvv4bk^4})hPU1Z56z(E%KHd=S0pmO|d+7k~Cvg`a6dopVQ+*~pO5)-_COl5!Onxu4 z%o(-379}pV-|?LmuNZ$KgO){WKDIPpC2@ien3rap;jihChQ1{i#F@+_aVFc4ID^Ju zA>T9S<4g7=y5j_0O5z0FKo*Og0Zxc955S3N&i5Of0P_Zig1?z^4_wJ4N_>YI)<=+(e=XKP6FO?E@f6tUrm8I-5iZO(Rh<)g(#+$7VU_ zqi!RSM!CopcxaoVnIaBVB#LN>$V*8S)drExIY)_^QwD|m=??9t5f3@YQ-BggW8EZJ zLZT#18yx{|52mgE$ML$5~ z!6Z(>bdgP)6{o^9NfCYp-Em4bd;W22D|c{iOq&t`4pYWCO5!yE*)$n(u1ZBNBXP>c zi(EIOnE)19=t0;oO^c3}n-e!8KsoCyl;o zVMfPJbxVIg+oA|de|Ik{)mML1R5ajpWD++=sX>v|-56(CyxYu$g=-8OrP_bvV18DZ zUre2^*RS%`)Z|Z9y2V|-4yh<)v!&ygv65_C-?GY=o=_iQ!d<@G5W&?a5J6Y3@+CVz z8>qk5cl&;&N38OdaTKdg-LT(u$g49Q z{;8MD<`P_)@WR4gBXNVdT>Zz+#kqz{a8fhC@pI6`<$H|X?reHEfu=3s@)kAr<=x|R z{e5u3yFcQAWA~eHTmrX+E8r9K-;d!ttn5_@KX(I%S<^csfD2Q2%W2MHcBiuEuXqA? zjcrc*8Q4X>9?_}y`mTy6=R?X5{tb?}OG4~{^)(OfGol;1B@D5J_y$83#R3tNLIp_0 zS14jM^geD=UrQ0wLPhj#C91MQerj$lzBwV>L6#3IdPP_Jf;ngNDB75yKFnc`Re}?EG%7URD`4D^7W#sSry4Aj(&TC2f+10*w_PhG?)xObA(A9(P z^R?^nYEuM0T>_5??ahWbRK!tUM$QPD?h35rwNS6R&zI9;Bjbz+CgD;yv#8U!$2U@P zxXKO{2K2uBe8WYJSop088dIOql|H~gR)Vfr-M?S#~9gMt!%Oo1v9Ky3ULL-g*NEBzZDDqYm z4g5$p9-U>8KjF99j=Y3SZnY!ldMkMi!Zj6*TvNb^EAg8jIe;U_N?sh?!b)D>A`({e z%0tPnvLiXjBv$hJ5tk`e@)`>XD|xkn!u`nR6lBW(;b8oRN8tvu{h!j_EV3T@tjNW5 ziJZW$6S)*w^F^*tK?-gp4;jEpUhIwZe|-dzn>?$l|KKZ%bCDgtW1B`hrfJ`R9QZNu z2CE<}?~9^BnMIh@!atO>Ley zuHBVLburtR+Hq-`LAWdZ**0gicLTU*)rosgop&-TwRS7 zyI#i0HA{Du!6go-tyaW`=S=ld?sdW;zzt`!2i;b2Z@w3`+KJ4d+g7u7*F2=IzNvxg zlY{nDDRzvIs^x28fI4l$ymYbS@e5f-_l$0a}R#WYV z7-|Jh7_Joj+L0ajbt3%=agA6h6L<%x_#FFX20Ma`T9F9z7Fh+wj+OE*iquy3+F#Ru zuDR4Y3h+#Ez7rG@QsJ95P~z z!x5>+?H{2w<^4Fbub#5cVHB=^U`2+(!;TEXC5#o$SQJlq}?!XO(41E9>^^yHDLru%4%FpaD zav!-2X<3o6EIKQZqg3js{WU|;fXr5Zx4SUZA8-nAxV-)lj0Oqn8@nldQc7{f+A6`B z#9+^vqg%(*8Mzk)iR0o|p(@qs%dpiB!}f5NG3;_2m=$@5hZos~UnlYoei7pyXjFZj zix^`y4#-ibI^Q$Kw>-LdJRB!mOQo%B~aB1{wBQPsFUpD>rqG$#iK8=)<(71^B69L>Q=L*XuA;m$P4C$GRc zbyYmeHw%G7Yw@FEzS~e#yz>X5uvIoHGm3U-B9A&3&v}YY$PcP!K3)M%0S@tWhR*jD zK}UkCI{6fiEOiG!s2{JBne*w-@t zBCZ@Y#`h>lQ5f`kZ)!IsJ#%Py{lUYb>5KgC>B`#(it?v4bhkaekKH`bGN<2)y zzNJgGxR`wL<4kppxR`w9H_`pp`nuXj_1v|-InE!#`p8;eK`YM1pw@W-y|tyD#x1TM z5f`(zloQe2*ZDfezr*9#39K1_)FMyeDzhW0d>Tdmfqgg97yH4;S12M}l1aF*tFdC# z#bDq$uJeRCY&}Y~$=`4xM1yl4fK%)VltXYXcX3_CT--&$dB)JMz>R%`XH4*lM~z=F zb~UI!T<7Z&{}Azm3(tleK8Mezgd4ube&lO7Tahp#)vmZS2@Y6sDHr!?!ac7bOp~6t z6_zGEvJwRw8@S7)n-oHN>~14DvG*uF?n!R!N@OcxqbI3YoGTk9JmEzQ#_qx) zB|Pa#397?+Vs*y2f%*sHt> zw|Y{O*g5oj){~;Ki}*}Vc%E;zPC;_)9vpANHcv{4-NYpR>`AGyuju!JC#A(oDZS`P z>9H`bwuJ4Tlo9(o?x2L1JSj8w9i<(flohk_98CC&CpC?A&l?Ew9 zN;u?6U1MCpBjKMP5*Jm%w_h7+aEvC&3Ez9FhsKWM&QJKkhY(J|h}hFSh7%DZjf&CGJmJSwBaIHx z&?mvRy@=yO_7UA^LJ&74lbao4 zSARl+#GMyB3|uPc!wHA%t_nLyerW@stcd=QIp;h5q4jUtz0$I3?j}kK^=9^k&zhpu@8ox>N`BppB@>9>qNv zzAF#sr#9>uy>O$iu;=4AuJAy+L7cof%*3!pPIu#u2%p`^=_~#AMpR!V%-$lqWrKrg zLY3dyC+ahnM>TTgz{H$K4ckR7W%CvDx;aMIOA)3P={*Y2aQ-0YjtFa)M$?R~Lo zuB*oQlQ&-Wv~Q{Jm*z#(m>03%#sSaz9t-@;42Q?J`_A|M>lqCTdD+g3IGeqW+1dMc%-eTZ*Yn;rJG&_BF_37#JQ2;!@U@MY{{hkR4G7u4m4 z@Qv-nk9Bagix156qaXTO z>)(8cPht@wN3S}FX`rx|sH>lco}CBrVJ;&0^{XG^1Kh=j@U!+XKDLd%0=N4jr$1Acrl(Bp64fIf@8aqWmEF_yuBpAe`KKH{6R-`|>npowCal7)jekd>y5EUnwBp@A`|0k0!<8pi1LPhf6})kpkk$ybZE z+N_rAWzUyo+JDr^7xhZjw?1E%mi+ojK?ay0x_G>={s>VBGq6fYb3O7&Xx=cxPSfR| z`=b6z#9gYd?%<@QA%%vSTg=1L_UFFT^ef?oaCJvS3oLU)ZLc^f($)q?gc`8!h?YBg z*3(^DIa?k5?e?-(&ZmxU@e-Kf)2D&S{ZLp;q4p>%^p`J|Wja+pee>tOR_Pp}Xy`o} z;mn!nee$G5+Z&veyapMdy-&kKVE1*Yes+47v^4lMJZ^s7AJhkq_)?QUI4Rj2ec;(H znaS)vYnYqjnvs9XOzw7)Yl(5KJju0`t_ii%7dSe(bMI#98%_!|0O@*%M`N6ZnF}Iw zB{(czF|8XM-ut2f5zWS4baRGU?mJ0C84nL(sG$x1;f=!`a}@KrR_NP~`sUizI{YQN z8@ubtf5F@;L%+mTvIaHdLe6bd;1r%}=CaW%;qKgasyF-0&QmRGf|-5B-ll)}(%0HQ zWh|^cJq;svbgkAoOH_&8`c03Be)}t5zMkL3$=Bb0g-L67ba7I2pIcp3bIH1pUih`I zkM2{Lq4el;%ainoH|(h1{I&1*dj2urDt*JcRaPm{vG0(Q!qvDjvLzG`E>>E z{_p8=;!RuWihtmdGXEdGX!TO8HOO1cXOiCk87SrTCk1cM70Ft4`TNw`xD7Yr$TdX#`fUtQ9HnC1?BuA}_ z8p+9Z)4Y2bO0gage@{*|<3QBsWhl+!dcjOzGJtzgZY?hZSyl^?y$m$9PHiN|tg1$G zw)Gp4y##ZtKQ@wctye|%GLUC|MH%T!2J)?dT$^47T3AIQdl@LOPHQ9=S~Lmd=J~g@ zZWh_gKr1tFM1L>A*48WHUkbNmUfLMA(fg14n$~>RG`*%>W`Zsm)g!R{RbP{uXjVea zt}M4^f767T9Zj3*y@z}WH8*C3;ecV3L%vX*fZ8}(Grwta&FM`e;Xy-(_wP5UX#LBDK0*9p5T-@o$^vuuhKDe4fdanxJmZsactoTXRKLfsQ}#i|Cn2t}?{@D`$9EpFH#D|h4)FbiZ9BVTQ z#*2apq5x0u3I?1c3dV_o%Ek&fS%HZ^MdF_?@h_107fSr|PKsBBUJ}dN_|y-+v5E0B zF>3|hSe-$*kVrhX%qLoq@1=Y$Y}Lfye3~`YvYrxoJBiYHS>(4#l;(RPe@3EIzZ98E zlXAe)mkvUI6pXW&)5W0$iDGUoaw&;o?jiCZ62&=GOAq$Rh&Jwwr#Ob(B zG^6PTN04_VY1= z(-$J)pGD#{=8D{o#Az%MxlabJLY~J{#9<_f^L4h!T&dN;`JF2AToUJbp~$}`alUU6 z`A+ge%eqJ8b)c`Pe!I>&9}Mznz)s@6@HVOK1J%Lc4W5 zzd5c!jD(aL6j}LJu2sFkTI-(vPL=Q2{`0a!Sp%OQIN`XvVCEp}b8CO~hHKYZYkdR1 zyHtM@D6!flz7rh6y>SWOUf~>V=Gghxx6W7nju+%7b+3zepgvxY%G#Krcfvz-98r5# zz4pj&t=Aq&9B}P%t01&LVaRt^_>MO5xxMOrVwX2ix5a`&FEckHGsi2RsGMK z!1vwc@1{QgWx%J}6>U)kPeD>$R6FNy-%Yi9Ax^=9$xltSTR7kPz8;(RR8_1ZzF_L@ z6$_@?&22c1$y-pBSdn^4*1*F0yl<&~>>4C8uW~_E_PlYAWDWfBpC^6{!oT`yYl~MJ zZb7e^P(3qP@YKv+xjhG_R3#5=TJ3a6Ns7U}=N0FE9q`S^Zi$HGf5d2~=`(r#PFqqveKm-;- zhdTq2-M)AXa0L5K#+ZuOZodV_CBTsc3}FA=CIabzn~lbSKfMq29)Lc7G42q{eUz^4 zXEIjY4X|?%={19LzpeWI1}f1B49gic4oV4$ta>dbr1?mB0 zY$1B`F8+el0O5&O0>PjAH+5TClA8CIMF)vsv$qEulJ4}pOC1WrNq9uy@h zetjQN`=FtT;;VmD)j(acVoy_wYJzB~sst`+YB`cjS6{&;LscLvnQ9=yWT^sZXsX8H zH>Mtfo@{kH+;bF-TXWSTD1|)5c^;ano1j0QukMGU=87g9EmQ?O3RD+FE>tYFmg){< ztCi}9XsuNVT#6JeqT8tF;L=v%5o@(muVBAeO~HP9MXSON>UrqwsJPH;i7G_+PUk(E*m+Tcw%t}+q1o4OoM-PKe0EmO2??4fA9(o^j~wtA^|5wu*S3hx zmZhG8w!d16=39F#^)!_I%~GGj@oh`_5b_;Moq*$BOTB;;-nA45!S`8;21xPuEEPh6 z`&lo-DhtC3aDCrW|3FF~U<3pa4_b=zYJ6y^D-q<7r9MWG!x(NrkdH0Z1o*^K_aWq` zmKqK{pINE`NgToT#{Nw8=oZ8axDoqS`x1l-@|zWVxy{3lqa!~!4sozL->YWsVphiBhw^ImAO#D3f^MbO|MnZHeDpGWss#Iv8U-vuz{9^}M4_LCw8gZy;D zeoDlogtJaL)3P^<7)>~Z;?p9gC7d-FIeW%i{Iwt}_)pF_V{Z}f!r)>S+*T2bf)6vF z&x%+aH0{LaL@Wt@#Dt$0u{79*g|bb=vLMa+>_3ZGo-kq{^6`Q_5$QPv6$t|SN%?`L>CELmlPRM#Z?uu@lpavv z%=aWG#Y`i!kT*IbN127_xp2am**l2q4oCXVl@Yk4;ZCsZ`O3Z@YbZg%>$ z@V2k#%wM<{%J4IQ&NS@LIGbnldPU`2XFC09`Y29y3R^+^ufo6mWnD-WkdPV7IRY{< zu0fvpIu&)TUp4+*czn;u({NX3n7J#vGBjQYmrcny&kOCvuFTlVd)0WucYIbe#_KM+ zXJ-{Msj}LnvOZ(n9wJV+nmRa%&TA&eyeVnfXmhHaSRVv*UNf`qU*;tHRUItv~*0_GrI~Ai3iZ+c%PaJia`e_6@!XHqSJ-)9~*y+ce5IN%bUpK2_vKgz*!=WN?B#ErG$hqqSyuN? zLVbsIWuNU4N>9mXylQQxtXf-<)p&{7roXU0ZLIM!w%JXrM676wOW9Y#B+-_7b6ytXk8d3WTn}^(k0JrtmLOl8+yn6 zFIOo1X*u*Xsm%S)EJNCpJ%FaNL_uZo5C(cmvPkdP=O&T73=syGjkgWe$+x=f6U#A>DZa#lh0e`vln>&j? zg-+v@y4b?e9xJ>y%$jDw#Co%#oK^XZIU`fcWd8C$4mFj^ww$aLU}tvo2`gIlukz z5`Fc`lmYs@E$D82vz0qeCk=698_#X+Vr`EvUa*t();H6VbW*G=7{0;Af-Qr>-Wo^x zKvr3L+^t*i>8u9J5EaUmMDXfrxC+t4UkJymuQnW4u9@}=;rJM@TSI12zX%tR`Ps#0 z_*AG>=&fAiVu73fKUw~WcS*lUQpF-)?Se&I9H=sqgwT5Z`TkP$=^l7ISgL1UoU&nrJLbcl^o?>5JO9uX6R2Rm(3ez%s%Y_6h2WZhlwKUfnXyo}v$&=$UGd zGNVBiNBnLwD>yz0xb4ON6nZUx*>?53QRPYKTemTwp;wM7kG8L9gBL^u$-_U%hY9%z z{u`1Cp{;K2%gM~mI4OF57t5+ZG)7O+Jw8mzw&&|*{qYUb^beDw?JMCuQ@qo_ z+T8X%N&AzqrW$L8A$s>ZDTQ57!RIeiVC7M(;&f4g{F^Neb@FDtyVy-lIr}89UAf-8 z{^y;P>Hz30G%I5Cm~>LA!P5GS^FFFgbtb~$vCU<a`}k)~dDtF1%}1v*-)L`K_>v z0_EFRD{Xi0mg5##*6($v&B4pCdXF1TXE8&K*DDIm?XaJPIicNl>8#-C#RJBgo5riO z#@?4*vuSNKy|4K4LE+#kX2hX-<&G zwEc82wI*v_R2O4*d^@are~n3=M_ittr{BKPP0`VK&l0)5DE!?3!?_EovneO$gdp5px3K z79>tA%O!+sq@2W6z&qGM?aXjab2JWw=-@OmtS&4EXP_mSkA4JkH!l$g&yr-kp~ADs zI2^``!zAH!AzS#2aFy^n;S%98;Y#5jgd2oU3AYPh5xyaO8;mo7{o-&)_?hr4;c?*! zp=)~?3kjn_-l)`ukd~0Vc`*> z`4p=;CjN&tvdIAMEkh+t5~c{Vgk~aQL@X4!t*}JcO;|4MFErnDA>J^NM+xI&Wv5bj zfzW*Xg$S34JYRUVaIx?f;c_9nJz1iwg?|#VGl=d_2)BBSTQ7>kD?%>M#DIH+9|+kC zN%t>>$Av!%72j;(9~N@#o-!9>B3lUAkwLk{5a++UIP?*oDjX_2OE^|ISy&~UA-r68 zrO&^iGc5k#}~pMg-uWqFvqkeCe0ks;4qQdg-Cbv5eH}{ z(E!a1${-q}#^21840*E1oa4gW|LkF=0`qMpc&Er_@(RdLiTqEY!lRJk(}is1Q@&I9 zfbcQl^TOT2{X%?#InhM?r#So|bnzIbLiQ(<*+OIriE^>#EUpet($_K>%3E{IOD!4xjUm_9ib@6{+$o_5S=md!xft{?RA`w0c znlfhhJp*pt-|Z^Znxu$&%HR4D2vAKw$U<2KuZIAeyixdf&YY_e}OBM-s z?B1P2&2?Md=fj=z^Gl2?e|3kqGZWozolEk);pZY=&FD=jH7LTna1*OXZ_Dn~*RnYb zh@-^jnjUo97qqNzi~~ICKG99`p-Ew@JCP6fI{4OoqFaJu!>HyYgTNCA=CV`Y?mGdY zFsd1H@cxT$Y0Ie~=)Xm8>FH*~`CX1v%=dqIoq{Z2yfT7le%sfVL!fFN61o(N)^oh_ zX5{ZO)e6qD)gQ4xN9{xO%hf}0S)lmnUZ}2t`&Eh`G{n_hULI;H_HET4yN-IA3E`V8 zWKMBKh6KMl1uB$E)f0NTx$#esT2ygBC0WhEZ;BcY?^M+cn$py3h>@<2z$HTsLz&`L!{hPm7~03icO7dH3sfEinU>``Ud-X>IC+iDK6KPuil5A=4v7|v``(Pxj_9L z8VXgB{-&3k7=IoSS}Qhsiqvnh-$o@Ma$D66F6~r0_KVdp?6+6j5UqpadrU{w6zX93 zjqsh+Q2f>oN$y7YQne8YcU2F;y_>ogF5T5O{Fa%q(;kYiUOm;{prM!Q(F;PkYKx$~ z)g0{iQJkTnuVSD6R!c2KJPb+lk$@q|%OPP%vIZeABspC_Q|`8i-v9}tj@_XGqmCSJ z!KfoFJ~-;gXA4FhH$gE*9p8n7QOBHAWq$A|6H^_ag-iI(p7F9|z1_T&7WC%ewtFSV*+Ua;-M)`o6dVYxYUGc; zdUJLC#c$EczOIjZL7*i(9jlqw;ky5vE)6EVq9{oHo;&l#By z>+kku7vshs`n#7py3d_%?#A;6x~DsO%1U?fN!^DvcP~FhR|U(G^v!eJ{N=6P680eO z4E*Y>A?R@|)w?fu=j!~2x}Y1a-W2`i)7+4M;FtJPOV?kG@{a1=SMm<(vr|YsL2>PvXZnTH zXPi5E`lKlrPxcId>Yl;cGy5s+-mO&M{k>bHyXFO&#Ph7||4v(57dmO!^v$1PhYLQPY5?Y zYDRwH1$&>}A^7vf3Kbj_p=P9!tNR+B3%*)=pTAI5(BB&#u=goLVD~QcGr69<4_gYZ zXYVteu66c4oJbG#=U61}xBZ^I&!^CPsk#$Rs6VlPnd*f*XSRA5`*RfAWtXdA_+6k{ zK-WUWHt1FA6S&0Hi)74GTB!@TMn?dj<>FbWIPXA` z`VQ(M>T5)6qShipRJ{Uq$?74fOHthsCRNRXOPXS9HC?sAeuk-fGmYg;mihxUG*$27 zH)bmCY_$w=bJUB7o2%HK%2Q|Hj5JeQpda==Z0!nzsr`u;%?M=s(%sCkEXO z?R~iZPy>6PeaKHkd!Ik!P#W6%{D2%bwD-A*(Hq$Nv_`%f+WW8%prO6bSd?BPdmp|N z{0H_vT;`~uy$=_P5qqDBIJ}?O`><26fxS;P3Z{X*4|``C*!$29?ccTc$>QYJ4eWj9 zu;A+LeR|{SY+&zG!<6dneO6GcxA(b`=cL}==LMG0ziaPvI}51Z-e)N;5WC*q$DHkY zd!O#irLp(%|ATqZ`^LF_oht&m*?4@)er-Va2BSR3s)<+>r3GKsQ^(`QKMy61SwTEg zs{9~Nv`Upgg~2aT94bwGi-J7MDqVbwgZuzkWr%M{kSAGXif?IfA@Z!U#J4Q?7=4?H zZ+UPJ4p7DH1TW!=;Ojav!OeBH1a$ieZcZ{gk5n@WJ<5vQqQ_2fyCk!RK()93j(f>h zaM&L_rhh-dZ5F3tpeiw;eFghfu$Xcukq^S$3@2H2Hd#S56=XABbrJv1R4~k}mWuyT z6&%3$UB&;H3MMl*-NgU63J#}#ck%yT>GFwga@?Vk9^$wt5d4mb_LNAA1Hnm*)Jy!A z1cK)?e7X294Fsprzqk0`8VJs3+4m9u6@eg|WvZ|EuM7mQW9e6j|Eho!?5|&$=;k$F z!f>b938-#;1rG*->rq&0fW$i<2o~z_B=?j!Cn8n@ZGHrt{ClW^W!Tw>l9GjssopZ| zIr!9DhHa))ZyELgF1A3oW{8!_Z>;R#==s=JoXiUC7VN?@Y#>q(j^}(b$;CJzCwK{M z=u$dQM3Dw(@(GQGL&~!Zb*U#IQYkKu;H>Ky=?DBI1?Qds((uBGsSvo!IFlG>zKfu+ z0ZifRb8rExI(%xKvRSvUbX&za`KsF%2Nb;W3B=0q@v-uAMq`=x^D!VsW9-8izz5(o zXv=ENCqli=SmtZ=IoW3H-nx)=He*?xIX7(sqp_wtsOjg7#&VFutc#G>I;*fLStGo_ z_p^YORc1w4zI8TZF}8^7ZN_4Gj9X_j7GsAdZN`v3B2TxnZ8QDlFqn>5zux#Ttt|LiccFGt|K8Rt&3oUz=c=I8?Kq`TQT{AO*L>L-C) z;38&V+MO22qxIL9kp>oDwCtkAm;TcSsYwcnz@$sB8muzIv3jd4C#3H_&+S0ttu)=? zKzTqv{$6=BQXk-d%(kin|3%hU7vO}$fGmrw^7fNRUI-1XuLcpjPxG{Re?O(>zcNJn{txSHk{!4~eDZ1ndC!iPI>TYe=E6~XL3g5L?)q83hV`ZOY zjMbn)Ys{}o_2X0BqBx&pwU$r+4=k{XUa=ZkTfx%6sREK>H`PMGcEW3BfBbIcXj4c z-C+SW_7@DWcwzq3UTWt5eS0bW-CXw@eM?vW-TwzhQ0W@k#pBp(ZGaUJ2Ix-HW0{St zrWV0@y0K|m_3QL#cyoI+{1BRVT>@q+31sVCgQKo}n|`))n^e8^;$Sp<5MkI^$1sWd zrTg7%|8)_|+U*%D(X@f-)^2B`hsdR|Qg5_U8W}64p?aE$OO<*MpIx)YBFjefh8o7E zV9cy085({#Ny8#MO!z#Z1|(CbA?+j$_dr9L(GZ0XUI^;8&4^wJi5d{7PD87cG`tPZ z7d?|E+FmqNk<$akAu2F3QKzD_sGuLWyJ6`vL9bunrY843$?Jsva#lfR`e`R6I+i+M+uL;qVGD6HaEEt`7`t+uDC`A-Z8agQm@G5fg=; z3;zOr>CH~IKL_XYPOsAsAEal6sT2nNW)LV#_q!67Oda6_)peFk#n?BNOuF(iJDOf0 z-h8GzxZ>#TnKJ1Lw^uYwgB(Ubm;T0nNmshP`sjThNAvZ*7cx@x-Ya2v4HKn&KjTLA z)yI5Ib?g#BHjFjMBB(gD5f?O&x zjFd2f4~GhI7$_VnG)7AB=Q}9F86zcdipbN1GliE67YdD$62hBtU(gsSfwzkP?Z!$9 z4y(lBexVrvhPyFR0yl}fF;arOP2?Ry4)!pE?2jPXa3qb95@^PML1Ux@9uxm>jg=G} zaMzd!N@$Ff;BJhRz$|e$MoN$iMK(rCkd2WNXpEG=a`Epk94s_OO7J&EO5j+&yfCMg z!V84PND1!7NC`AXN}w@P0vAg-W26Mx7%73qNC{jm{>DfNvN2Kujgb<#Rs7?|NC^(c zNC`AXN}w50291#tXpEFVW26Kg7X?2G6&`y$5M!hS8Y3mp7%73qNC`AXN}w@P%0sW9 zF;aqqF;W7JkrHT(lt5#o1R5hH&=@I!#z+Y?MoOSDQUZ;U5@?K+Kx3o?8Y3mp7%72U zOonm)8zUt+yeCIsjFcd=+m}bgUR%-_DS;hDHbzR2jgb;)jFdoQqy!oxCD0ftfyPJ) zG)77wjg-v&Z;X`SV2qSNW26KcBPGxnDS^gF2{cAZpfOScjgb;)jFdorZ_5n-D9puE zm2$C=9qg1(1I_(EMjWbybA{InZxgN-J}P`pXcj+*LiSEmaTqTrWUjEEkiD^VpDetT zU*Xc>YH?U5yj!?l_^fcZ@PP13p^dtkdXk0Bg`I@`gd>HMg_kDa{F@Aj!!qGI;Z~tp z>H`Uw6*|EDkQdLa$N{;h$b*IF2+tK>A~XwaAp8Q6uaC>lZ-uLboWqnEds6s@@O|M? zVJ2!uhRYGQ7IqkDx>Aq*!W0u*7$z_1O8_qz7NP9zle693bM zXOnov8!MbhBAi*QJWpSBBj^RPqDB>$TwWNmkS372Mf(R08Ybr%KsI{ zU*;VE39L2=czszspQi2yx6&Onb^j3TaEy`;rt$~(h-@l<$OlC>l|SU8BAdz|vU#D* zs{?E~*Ir;eHk>Gz zlZam_@)RddS-@{elVf}!3B!ny>zk6CN&!5o>!%oY{)h(pPHLr)G-*&yB=Jn8VsTtXwrQSwDml>m{*(x3B z%~45+ak;t$$t_UVB87#DuS8d=AK?;LBXEe8T81#Tn#?0o2l4AuvzcLI_~loBLuODn zds9n%3l%~2GMtiBB_7rh^#UR^F~jdsGiaD>?5|SPhX|9Zl8``}nd~54Ekmv|R0$H! zR5?g8OPT&x)gO9d>R#x{R#(G4NA*U?T(uY)@)SpXni)GH3^kvDV`^?@r)Z&apt?Y1 zAabGVi^wh29AvJQN<*~PsuNs_)RR!xMy-HLTQeNpPOZj%vAP((?bX`|-$BiR&W#A4APA;M`-Vc|L+-sF|iq7-}xS0b!`Q4n~b66SKzwe zJY#6&bq8EA)cglT#8C5iM8r@td*U(Fd_D4nq2|{R1Vhc$2!f&Jy-}oCdclia5iZlQTQH(HTj?IRxH&1D(!$?N0%Jt+qXd27 zEpF%JkEyf0{W-ijq!?bK|9A_A6yHG>{3RwhhZMupD0dS1pbEFb+4OfdiE&6VycFf? z?;`%6sqkjXrQ&~7g|A`!uHt`8g%7hFx{3dB6~2l7-Nhe6ii4M8NO1)ndx+zrK=@K7 z+EXGe4utQee=qT05(u-E=`R=mrGfCn^zSYHw+6z~m}npIUl9n?ZqMIW{8t9TT*Sv; zA^sRr4BxBYUWy^bT?~i0SCKr26vLNYghGcN{$R7y?8o6}pHb(^8Ws~oKn{Eo;CBc( zB+gfm!S{E&??ZI)CO^)g>8IVJB0vkpD|E{mcVVg3H_1$4kk~rO8_rs8CNO9`CIw~U zfawSNV$Q`sq@~y7R|mpD6pqOnhF0(a>?%9!XPmd(=+Dt_{-!LdXI!O%de|FwP`~?| zG8(&J-7cJ6$67_Z$X5U9agQ3BNxUF9J#vnlrN`fkkGF^4;ilU< z+6uda?sV5+80RkcTKj){P~o9f?yI&w@`9bBXFd~6D&}de`%W6&`B^Lz*-rM8&zxbO z*-;lK_>=VLd)+oV?OwM`@BFg&7Ji6at;dJpVJ5kae$+OYfD>-EGBbPa)}~pmF8`=) zQutWD*L%(WL|E6q-Xc|(kHOT!o1Q7lT7GW|LQPFe3V+`qR6r-+o|C$KOIg02cb`9+ z;5HWx`XS7fyL@tY*Ur(q?{f>nN$}xFFLfvCFXyAjy&AVip>BS^Tj1xqk)zqWt)pfB zX#4T4y>~eVZrH891G2fqL2ln8T9Ju1cv(yI{39C6iqWF_iXG?}=FO62LOi&`iH6@m zhhPda6&3n~(P~uRnb0)>yvYIo+S9uer8+iXYv=R+2vO z6()ur@PHc?+5Q@R)j!jft=Cobb}^M|RVy3H@*};v9Ze-VLPXQZRjFA0SPY^jW zMVMj*tYO%%-B_%X@n7$ca;P7e^p;D*N4rz--7fC3d)>5}S7HJGfHV4G#)SCYZo0no zk1ppiH)X^IDy}Pwi=cSa|F}s#8Q%^!2R+-b2;UICE!;0WB>YThx{ML;xX34jF0xB~ zrpp+Nifp=!A?Ju}x{NtNVv#tQK4SzZ6`6g;R8%1xC>$y@UB>V?%|+038G}>A-*g#6 zo++~FGKRcRWYcAwj$WC?;$ZrW5#Uyl(PwNjuu6Ep@Ij&JGDdjQYy?f0F=(2Npy@IO zcS(5DWenN08bQ-#9LJ7nHiD+l7&OgB@LP$`AOkR!uUtB6DQqfiBkUm@A{--}D!f8?qi~IIlW@C`?Kx&ROIRrEY>4yUPaK8{ zFA&ZaUL!Q0w?YwT1f;?zh0l_BG@H*{LGzg_I#G6s|6fTw@ZS->N5Y@qN;$m$k8=m) z0#Qyj9-SoQOcIZ6ZcG4Y%8-=@WmXU*t3i@gB3Vo#5bIvDOjs@)ARG*y$^a-S%fSF> zBZYA1MuoKrBR@tVy%_Hy-lp*1qWdjVX~ozxN#Y~DQVAi|)p=On(|j3H-%+&tM3*eL zYp2fgJ>Dt~$)gAuk#-5$I4WTo17Zb9u=6HV~d#O+o1a$-SrU{jg+^p3i(DC`zvFXN{W-dwE9c*B}ZyEeO6V}{oSc07~o^bwHe6koO*<^*Ez*0HRU^qkQ?BXdgz>5quoc{)^X07>dz0pifqDO zGISpl_?rh!jgN&2??Fs|3-Jwx&Zk%)Vp526DEbRUjGDF0{4GUH3mu?uD^ZmdiZX6% z@y!XHiX!nB1>^IPzJtYU9-?;}6WUi$jfFcogF|2ovXyvlkhuiU46K)%aJ~vEL z-eCA{{8l?*_77EKHLm8+ubz96%53LlL~7EX`+-iUz$5w{_UkNQqb{`7S-?g)*4DrR zmQ`q=8*Avu_4u)alP?6qA%wC>u6Wh>1*2Oj&1cV|Q;-xru>3LDrrm%ff(vKCErsiD*c13BhL-~VV6$20 zrFMoJe2gAU3YccIo68w!^Dw#f$NzZz+x-w4k05vsrXTGg(GhOny`?P+kM<^Ul zZ8+thKJj=Xd(Uge+nHH@wxPMYU(<$->iP-$erf@U?rPkijV7*h`NT9&OU%PZ<~5%E z?x#xlo=zpCd5mHnKC;5NU+I$l8!PE#+V|$sYF!y6C1RB9gMYUB$qKW7Wl*pEEHy{} zcr%)w{o%x|V)-p?GqdX?&(Zu|$8xrM|C}wPu3fmt7(<5aGJW-{{-^6L9&7AI=8&*| zJh!1Ix&@Y=*~g!09@!})QF-8!4Z z7ki@RaCMrML~*$wSelW%Y;ZnnLd*~UeJoJMWr#di1FY1EL*EagpurYFCI zneH&*S(M?J{*yxr*wF zdt*U8dqW_qhn8nY_0gM4X|89M5s7y05Y^|33Nm1d z_HnecUX_;_!5VRG^~gV@^li?zIm7exr=V>$Wv(gGeK z6k9PF(9b-O(pfLQzWd_%2XJukLSx#Nt=OySui!c~etN1~{Bv7sK;BXcf45Ub=F2CIbA zg|mh8gw?`D!X?6`!WF`m!qvhx!c8Qyw^_IiJd+OF#bKAwyu`tMugLp_hlQUBj|q

    )w#OF2iYXS#iYOK&jtNg@$zal+2Mg zhAk=XKVsyF)%Z8!5WeWIZRChU6Hzm<3?Nmko;b4Y(8Q4w%SKt+AVPi(B4p%=Kq!ux zS|-HEi;FByKW}ORgPP0ERpcbI<$WOQ+;)9tk0>OKFkIdi&mMir+!0H<5AJ28i->05 zy^X9oY49cI@Ha(JU+9so$_{ULg!w{zJ+v5_ z<-xmh<5*KvlFFQqqRk)Y>)XYdP6cja6#KekAyBD5(pSe5R;TqKX7&oT?e0e%P9xIS zwp%it*5`q1A7{_r0%o^DMEd%Ss*mGYE819nI*OG&h7mH_SJ9G8gq;3#&|u{QA&UM` zh@zu$V}%0YCilpY86*xZ%`7$J33AWOe8?}47D6-N)z0$h6520NPr^tlTV(lDSw7t* z9&Y#tiH(PJoj-!`aJ)Ht2;2T%%s?ZO_1&E?u(#TA#@j`_Bq6H}4)*0izve20eM&~i zFQ?))e=#+>8^7LVTtq-@t#f+>hW1vE1%|#jwpJS#xnIV!qF>3wa;ayRK6pSZy)2%FpPf!VdN3~UW^>ZzM7vo`X)P&F=5pax1`)6zAhW8v`j3r z44+UIJigMhu*l*TxS4s5LpL}6-prUD*?Fc#*?E`ZgppU`&C8G-ufI2QCtE%ZDq0?1 zlWyBU!x`jnHm4gjys>2C60g zRjPu0Nceeygy#t)+|ZI4N&buhI2hJL1Hd5@4i1dCDKYU^0u%S|78B!f0wzw{SUg+Z zmv(FBRZ4s;y>Gy@17v9=Z(2l{Rz}*C_;pxTmwfJ{Eg|uiVff`+p6i#P5OFmDbDd4=d2JhavEtS>r+wmJq&-M|PmuK*4VZFRU4d;KzL)0# zr`S`iJS%wAShC88p*xQbM%MScvZAU2;T;?fT=F0I6HtK5@B0Z3Apf7QcY! z%r3;3E|=XGcSj%Wi#Ud5=Lxgh7F^M?^Ssf87;`1d?pt-8hy41FFS~EmWoGb;&DF6Q zHCT3-$6wL1V~hvxnBTYTzE#)9;Y71>qS3-Xqe!*d5BX8*-bxTL@H%Zle2F#z8|+F(G+p==QD88F zcW}7#k23O^w}tl!LR_69%7CMDgeWJ{`E>wkh6wNw5vz*Uf;#XHn+P)7_5-qz!-Oxw z6`7b?Tr`uR9OGs*-0sX!j;)}P@Crh(qYZ^-)qQ#-m#i)vgo> z^B_dG(usIdh6{Lyt{tN(3We4TRT8_@ud!~fRoTz2baW-dOL?tUhKHW*OdgE4r1DrVj4--ua3k3aBr}2sgw}% zsJnrhxDI~jyRZz94t6MX@D%20f5^Eyg-e&uy*EI)-4$zMzrbzvvPEUT0XxKAQc z!1_sXG2siBF3C3GtLyBu7whnnHxw_ZWb#Oi1 ziEg80k#G@Qjcwn*?t`ulfplBuOHS*l6C$hn&9 zz)y4%Fou-I@vvE(sd<)%&GPd!`$g<5&eNO}v9q{z@v|Kvux?32(i>uHlr!u|4m>-! zWbqvlKZ`Rpp zHIJcX-HY4mTEK{hkl31ik8R9!E92wvIuJ|K*};Qs=c&G1;i7CmB+J(?A#BXa8rCH< zlx<6jGZ*BsQ7@$xu=Rs@MsR=HJgM%hT?YYDA}nK|DT7M}bZSVM2gMe5#1LK+!XJVh zF;3T!BL=x=#7He%PiU;*;DJzGiCjZRP8xyU7c-%KYopnqgM*ufzY#&Rpgr?S{a6n< zorAk(c%wHLH?P@0jpj?$fb z>U1NwIc3}g_&n12ZrMY z)T)*IEG+zaGn8E1fFhC zmGD*At~)-Wq2(e%l)l74azI1*)a2+xjnX5c!QuCTfRxQaHho50rGw{r=PnK~3vo2k z86{Nem`Oc--Vu(f0C2DF;Ig|L>3Ym?*KkD8DFxUv%@G{{jdf5|5z$8Y*}=UoD)`8j zDn|x2N~pr&3V_NSLjs^;2f61c)5Qt^V;1?qe&pNXDDlA*)Y3670Nl|fLNzky1gYFa zuDs2-S3;`X(`E|*Qn^vNjUO*lseDAbY#2W;PRKuj@JFoVM9d{zHlT*HvaD9<;{NbN z=ExD@ONs}KK!!Z{YQTTPaN!`w4Y*$-J3D2*`x#Vk?+Vr1j8lIINOH%=%*hIT9nbt7!n(IHWIT%;AD?O^ozr$UW#Z6Ow*INBR7GghnpUJctthyb~0pYOD zinBy|dQeYpT2vAtOC@s9MvzArO$z5V|;sGcKhwg&Ve1W={s45;T5JK zTrrRGDhU?^J2VRWQP%oFUP4SxPF@#Sk~RG~KVB`!^QY#C{9`V;a_sD+m819vNoN8b zI4DxSKS?^pn79|PKj%B7dtfXfR(vk;xl`xwP2TWa&*vzo&e8KEwOgN+7=3ZeajGw1|gt48vH~2Ep2F7opl;f;ynv3Uq)C8A*b7Uz7Z2GM{OHqTU6^o7TKNW zXJvU8o<^i}?*gi$2v9rE-;mXYxb$TJh zKgQB{XL;xGj>!MJ^Zb>s3~{&=O`Bw$o4A0x#)UP&x6$m>#1jRbu;hT`SeFmZu9Bq zOfNqL6$IWLd{pHyUM^)C4*#32+z=A2Dd8;r8^qvB;(pqN%YQ_bafJ{a*!jF z0aZGd2S62}yD@?kg=rY!;C8q3NJ>D25pB$hgr=GF|3}-Kz(rNP|KoR=fdNJsU|0nO z!F^$wL0MeDNX<;qtZ*p-5kXOL>63~&xRsTbhm|`DH<&XO`KMMF02O@a0pHM1fP%G z#P?~$7#wn90b&KPfX_j91|N)RM8(TA+D8Sg0M~(*1PZMR-?Nh z=xQw*d~pF=*tf^sdaSZAlWZQ87W7C_SQPDv=rOXZm3`3e&rvHzcC|8PDBy=ic9b^p z{CpFoUyHzH{TBf~ei-3@G_tGx0RdL;zM0g&Z>w2D+b>yiU;SJ4s`bc=FRtHEzi;v4 zdkG96u(tkHeIwZY`XG7mg3icZG)hzrtm5qBVY5R5U9v_xON3pJNCmmo(Bki%VbcOmrua?_7 zCbjr(+3+doDtziN*kiJMT8l(p7mRULB%bM37Jn4u&w{(d&|$Iz)-VJlVc2GV6SsW} zAL8*5-&732yhnWNU^Bq(hf(nq=A&8npmE)zA+smasl2X(4z#| zogys}_`5~ARN(Iy=|ckl1Z(^wsh9VRVj6}_Q8gy_@{WDSbN8VYqx-@`sZ5Vs2ACW;q>()43(T&p@-=koR;P zT*LdTZ&?Ay!T*61O`B}x_D#E;q;78=xsBZJDe@P)cKst)xW1g3=2qSgXLv1`Ym?RA z+F-Mib;z#+PV-FDVrH}=n^vX`$TZK!7SOCj8N5H7Z#ivQvK&Zi$tI*UmR}|cY5cwf zIPzn|@eMz|Rz2m&ceRD%G)}^8N}h{HgPnIk7h0g_;iq!v$p^0E$^U&B^e&pQ_W$!U z7JCHY)^m@Yhr`bGU!CU}ULL!D^o-q3D7rs?_lRA!?$%|vy-?aM$M#)duHuiQd1AAO zWq2XE9&ruy{74tl9|h?{gloncx%%VOv?9ie`!7PuDw_Xj(*F=(2i^TPQ_hnaU#;o_)lD}ElxywX}2e5 zm1IFz#GQhEh*z4nY{M;ulE`oAgh~;I@YgrK60My}Z#VpRdj5rL`0|!Dws`WS{Wa8C z@&SiQej9>Ao(y20HUy#Xn$~50Wb+hCNEebVikaqgLGu_6NbLhEw^xs%)zo=Jlv6}_ zlP_8Q)X9X=y?RtFl#q?UwJ0HEZcu6CYvI+SS>eK~7s$te`hs%LqX60vO>u$}!Y%kF z6B$4OaV2B|^14@VFP+14=39Fd3nkt)Eb(B|y?UQ6u(-HRCX|qm z7GR?l6brB3u?2qj5w-By<@==*)SpI;v|`*qs#t7QGt%!dDihEkKQeUbP_ADbQRZq& zNS`i92|gKa+9INL(Hb-wF^9?KDfv$V;Uau!g+Hz0@mj@L--lN$z*^AW3p%>o zYBz1MMvL|MIIRF51#Jl4$PW0t>ZWxq)`+pJ5GNMkN)UGeVJ1F5xQUl&v`Yl70GENb zFX)Ei6NZo0;H4TZ)(GVF3J^+x{|L|&;gdtOE`HnY)rc<$VgX)UAo-WzJ^B|uQ`{9l zuhE_nv;sW0Knj=(x(D#l8t{TfcUsU1@cRYy2!rMJfuR9vVCz8kaNiyi+rS9!=agDD zH-N?x0HP3C#`rOSb^AIg&SUbV=CXYc=i)9~${fRoT(*>c#PjoGDE-8wO`g<$5I8+Q zjIhj(Er|Ya)@A4*1M^kuqM_|4mg29ByJ)K|HOG%1|BT{FCr+GL=2=p|e*Ff$M6H8s z_B|OM#$D6y z%qLQEO{DeNq#bP7Q|4f8(j;B%e{;r;SFSf{5_-x_?4>x%LDtZ!^$NDIz(166b;XK- zF5~Ko`2_ahh4<90txr!e$Uwb&7tGS{ zergxC>Ah?^6_IV4HB3#jvatzC*awyD&~HOeF|+B=Qv|`cIqoaLNwftb@<7oj%Vw_4T8a6|u_XzyG?E1<}dd4-BmvnZZT_>!D zl$x5%8XNsPhF&Z~Re1DH{!{KG-7F2NYx_ZpYGJ>cQWk8UeIP~NylGCVvN`eV6w~IF zpC(&27xzoG)y>|JVu`EUay98Msw(M9+3ad7yjAM!4r5viOdOmfYTvwc&D*J7& zZc4Up{`R|+$hzs~l&eWBaZYO0=ESwBGK*|X>BJfuQwmr?MRG;mnIoySa^01N)ER1B zhfS#q)w;@qDXjwQipQij#MW)9Os#4gX_2xen-qtT;sU9YlqaP_vCo%EC02eY)xlhE zrcPlEeUKZ{-X8#-l*?SxUVu<}4ynOJJOkJNEga%7Pj(J< zbd)==&nel+lwm+Vz&ayQCMaw;fsJhTFh?hNw>D66mc32MUFGM*Js@({Zpi4w1}mxhDm9Q%AYI8>&L zKs}GCtm_E01mQ)uj&S5DTNU;+;n&OTJxXs;*&j&dUaak{j)-XbF`K5}xDPi&CR+pq zER6#Kf@GF=t0O#mGH|BNH=Z$+@1*iPg;k+EDj4_8G-UwAN$LCwstlOMwo&!}q3UPe zG{jIml8P}qqv=+(GE-rekw}*+EE%c%8@pp98dt?!BXNa2RrV}_jjRzMT!@zmd)dqq zZv(b78$wAAn}sB57g}Zdx_><6iQbSuVYCXcuw6t|!A?-JkC|>qP1&qF5+y-qciax_ zPUgDZ5g{LBjIjMN=bx~B*bf9Y`>@bE96Q;?$v!W#stZ0{40|0lwz2nTbx%4bv9Y5Z zan~~XVUO|wb&rg4fVP0o|aEIZT3hpjJmM6kVu4l5fm9=Qer<4PO>tiA}irc~_B&88#AVoM$2ETh;F$hwY4EBuSVhMbjkoZx7!rlh8`HbgdV zg2T+#O>jiBhsPn8FdohR@-By;mOJ|uayL%^?w!TRJv`oF(JF~8cC=>m?{fIEzQpkh zz?%QSgM76F5b8{4|0#0BvTnrXLlkA>9l@-50?v4I3BJCVfO|B$7;VZgLT+_2Nb-su z{%kUDXNe<}H*r{zBZl2J(b1NzJZm$tM@y*b$*C;91eO0h0oOIA2w#0m^qg%G>c}fX z5jEw=QiS8-%ZpDY9~56u)QUYjx6s>hlwSiVvS?_X559A3X+Pz%kO(d z2?}nZ*5T#{v!*JrnM=`ZUVtZUV&Blk0}N*G6yrwog4!yu#ZJWiT}IE0KTKZmZjqxE zd!^VBW|>(wb!1^t`2_aBcwBAzKwC#P?CVHBwldS_4qCghiVgWuwX(c#thh(Hb_;1Y z{BYtoP{kw3;ttqa(7S-fjxw~`V}(WLaW$gf#*!kmj;Ll}j@zH^RfZvw#7A=>waDRj z*1{IVhJIrWXL(0uQ=msd1pC<(7#?!Wo1r7?d)gWv@`E>iAR9{b3M%oa=RWo`P7p?( zd=I>@EEUithVgl8h9=pu{#gSrAcM|lmXi6krFxYtK?&UtyWOkcGzzraQR-E)>4^JwEb%Hzd>d!ww}UM|tJ>7W zqv9S=T(hx3i64r4@R@hPSK2-3^FQ7Ne}MlQw}2$ON6j$LS1}pyw%w~_6B+Kc$9SW6 zQ6~j+*UqoD+1VRY96{!H0c&r`LNCg0ofWBq-^uk}CF@X9t5yG+S5a@c3M%+*3H#Ek z=!G8CTzY}RuXq)8!?Usl*1Y$8I6Zy$yU;sZks4yf3xGs_7kVROq`Pvb!hR`pgoTau zDwv0uxk!Eq3%yEKqeOd6p7AONT4DZiE6TOQLDs0#{P)>8a3*JWKOo3sc~jo7!U`ud_299b0XO^XM4* zcJl5oV$&Z|TFX^+eP%iOSzNR)LNH#*jwqs|3ZG!f%(vGdnC@pVHk!JT1Ng!n4VHYR zkvfcbC>WI#>oBj+PnxB}HY)d*mgsOC!2!}E8VqA+HX*FiGde*P!L6h^0T&<*mI9@> z1>C^lAn8j1SMdhgq;mo$Pkb=`O!Okqf!iA_g-E2A^TSGTsML+aWNbzBcd%raa&!Xp zS;3gLdAkl55F9R%RhJIx(t@Q3zVf}oaH&|Z36z!kj39i$xsuHtY<>4<=B2z3d@X_^E~ zon5fhS)%Y2I;z?d+(oj1j}BZ9;I2}4RXe}9rQHyE$;Tb@KpKo%4(Kq{fnX^`Y7%f2%s9bPs&rL{d4n8M8xy~N{jGOOq`C5gpCC;d zpu@P5VEiV==rGb?sh3ot!~CsJmq-EThmFcJBw9I}A8`a{N)(jIk8Faoq{BS~!o(}+ z&Fz##puv5lQ=%Muet@AblYi=F4;?Qh7E9Q9qkq|~5flEUjT}dvwZ*XRXKg{GZ3M9| z&tl&z-%aQX(y;W$UC&|+n{@_Tb|rs>QL1Y+mW~;<1f%W&^!5Eoj9}VQZr-yPzVfku z#YqfRn--(ss}2@F_CH@ii)dSnf$aXpDB#2X1z#aI`%bVeSPZtQqo5fKUJTu+AuWuC z{b604$r(LK)uFbIm@vMqf;V;eUl5Lzn&D~DH8(nK?ARjcEPLr|<07a!%jt^`{O2sf ziSAqkE$2r1>P}x6;KyoX_R9;ATUh`$KFWW6p(DB`&e?`7UWf}H_9fa~1{A~4-okEK zh&nN(+#OHjM`A(HoKLOLycPfn0xsR_4d{R$)|+v3xi?)?_oYhXHn_ z3zYQ1`?wNEY72lk5(5BrFL-;gt4b;0n~}PdWx_ZJ#4IYf zAA7|Kf+r|_K&&%}@;3>7P=xOQ=ElC|*hmLIBC3#Y?Ysj0p@7NZpgg2SEKxZRTzFWL zXh25r!}M!cR$?lZKETV(>ihthSD zv`WCWlsQCf?otOQJ>4rPNRy)9tZr<8dL4G;(ja!J`JNv$bG z13FW>Ns@8}Jc81v;p-7_C8f_`PXz&QqI9z)?HBM-O1DVTzXkj|rO#qzZgg*`-zCLT z<~fAqXb35d(&r^Y;3nUZ`B19UHjbsr+k zscFe6Jz3*(KAl3kQor3|fSxPe!zx#x(|Peh^eBfOM1OT*IqV)EuYjfEjR!D%19ej% zJGk7D%H}P1#9Q$L){k>ce$Zi$#rvrrT$JG=^`pV}?>M{vEhp-LeA17GAU2oUx#>Yi zGMn`vI?_wa9f|DA73eEpeZY~#hEUtjJb&gmz{jb?v6ET=T&x6Ax(_9ca&mVbu95`TOo{G_t8UUOeo5V4ev;bh} z&6GRm5JoZ6Lsh%t9>`s9oZaVLXJ1;zR^3NGo3KQXt4~oU6-VZ6Ri#%Zeh_6tP@mF`4B9IBU6tqK7>z zTFHyt6;-!XL^o-bAht?Arjw|`Pr{d(x(>C*vP!G`NlO|YnpSzOpoeb3o4J9PxodyQ zv-XXK+OtrHAN>x@cO$26viw4|N2=Q_6oO%irU$*l@+RF=+=Fb~ICZB59X7uQ?Wy!7 z0h%pVzixnc32KYw4!UD6TSyI1608;{UD+!Fv{{C-vnw6Zu6d|S-EA3yv*ENyEEJTd zo%U_d)4t<*+IJ17MGZ$i&-$LFjq$AS3lL|eCLiNxQ4;KukIOU+C-nP__8hq6m^c)=BzF)&nZDuX4o6FS4{%j(BC2%JM0_*UTy@-C|-- zB9+5f!zxER`4IaCiQ-V1Zw;7svQ9N1nvB;Mpz^$#O(FD0?4cSEpJ6*F>A*gs^S z5~YpGTCWDr&lc8qHE0XiIDqn3Y$0K>R{SPl73>T1Ccz!BDF78aS->NxV+HF$$z?Vi ziK{DKPE+;`_{P<>M`9&opDE`y4MW#!rM-Af{U>UeHwd!^zZcUDb2QAq3DXWQjVbp* z4dVv}YaBc8C40SQq!FUZ#1GZ_Hp@dlwLRAkuprNJ{DwCPkps_ORu*PwNQlhfS zNadAm+Zr_b4)y^hdCnbz{PDvTSPg2sa9t>1_C8j)W;RtKWQ= zvEUfpi6SHBH)?5#5%V=&@+1oN)my>vn>0@~V%iYb3?rtJox&*#KBfjQFcy%CZC+%= zjHC;{*NC}Dr+mPO`HpB-#-ldvn8n|P|`rwpZm$LUhH7%?-6W~&iH zqh#|gBj$N_>~Xw9ONsg5K{}c2w+V@rGywDKAGKftzoaXE<0nIdMpA>G0>b>h0Ug*t zm3?N!kP*TBjS=%M-VyUz9n+WIm^^y+f9NP+f@1IHID51np;cc`oXaYUq?nZpj$As$Tf%=9j%<(|= zLQUqI<)cGdY79C;KZn~q$W{<)oCoTAYD$?0>I~h?netKg%UkAfw*IOKE2G}w=**7& z7}=f$cJ=jTp-(vOQJ$9B)Xg2ESkoPjeFpcU?!WxgG`_TO2CKf>D!T5y^$uT|T{s!@ z*XgRWeFw6lr~8Jm*poKvnxzh(y8qNV&SH^>XGtm672rB(%VT7=^JCTMD&^B*L!Wbm zu!`dj-@2(!JEke@xh9*HyAbPc+2Zgub04RJEqf8e$d%hM(p>VABc7evh1_!j=gaQi z?&!(lwgLwdUuM~kk!A~c+cx;hIPco69t9Pf(8lLp!Z5pqc&}O^Vsvw5e=df`*9X>VvGFw_3#8z$zF*Dm%kZs?F%h+HS*B%ljoSua5?n6MK!l7qYGmZDYd=qrfXwrQ;jVz}m5 zRPoFD--`OsDuJ85O=AnvFFZ`62-qs{Z0jj&54Zm_pY`yS7qN>kJCZRV==_Rf zm|w;1n*K7oX85KE_UJ1x;#l{m+iR9>vbCzx%kX2wvV(I?p)%q$_NTXHmUy3FtD)4N z4gWSK)DORJe#~O>D^Opm2H0(_Y7JyocD}(Ul%?0fWLA4rwnc3>6hc*z&~1_pUAoE^ z*5MAAUcuW@VfGE~WS}E$OQ%af$Ay2P<4Dpb?ZhW;>uu|N%)o=G+HRhKUOc-vPv;we zM#ttpnhflA1N&qazZ-t;-eXi-)Hwr9xPfK`o4#8#KjVI{dZjzW4F^5hZuLvq=GCmz zyjeBLn{AzK29{_83t6r3@4osA+LavjI%AxHJ;uO}jdk~+m79Jx+hb`uo$>0E4LohI zU$5HoaP4fv&*q4XP&{lSN49|@&Ty7Y&>0(v4+1qcXcgUbnXX81J8R%0D^zejvG;tR{N9=Sj_9g?n6AKrlx4cY;I7jD4yg1Go zIC>gR_$t;kz*F1fMUK!tZiJZ)(sTp)DYkGQo?7A_hdqN_&&F%AfhQ8Q#FJ^@vET=3 zyzN(5{2oUHpQ34G?_^-_ZD3FGVz;xDSHVuojgdXuz)piQ6!VVn4lnj@8vCtY?D+=v zYy-Q?i#=Ckuk>QCFtGPGuy6KaAIsTeH+r!zGqC5f9hdsFJkMF2gPp$A$JV*lKsLZ| zmP=k|S*|tmcdxVTHn0yeu(!kT)%bumY3yx)Hs0Z52KK=Q_FOOaeHuHNsg3O48`y^! z*h{?FKjQ42i@eySQ7v!RPy_q@>{J8ZNaw3~BbR#dL>hSV3_P^TuknIStoi_6sV!dY z$p-cj2KM*8*kd?*=Xbo=2N~E$8rXkh@dweFHl*W;78qzC`rL1A1P1WN7GiZ0YGEkQ z#(O&3z>eGNX3z3sFV@(5d9klFu#;5~?+gFUc*hpZ(=Kp~7yA|i`&a|}Lbl^|^eGgG zU~FuIf&4B5`9>xm!V_G508ene7tf~#o&p08%`Gau2enMma z){EVOn-U4O+4vM2*sV|#jc320v0H#PUT~a&y~Mzt?8S~L&u`%2cJpFSH?Wr)*hhM? zL;e$co)>$bfqjyJeYO{SZ_XYz%Zt5~*x8gf9XBHgcF&s#@z~B%4kN_lSuMn);xK#! zH)9gT1h#=9`5pxflJheX5C=;6c-DB>(b1frAW4_lc|?KGZj48O*@R#JURWGrLhA~S zI7)rZH2w@`!Udi)Vbbl?-Yt;?65A`T60mBUMIh=IEIQ#smI=uy^2 znk`_Rez_M+9uU2Z0!;Mq3LQtrV*Q}={pLa64vSdmrMx{ZDb5oi^%Jnx*hGnj68b^7 zaxeHn5Bd%gNqPMsdNP3P2f@cZ=v|$pvt9&nWAH<3Ko^N-CFlp?I(w9NlW6fP{h;y@ z9_2l_r`T9N-&pQKgvx5K3P>W-p*0{?+V55Vp+~t>`pK(YcZ_NLJ-G*2t5K`7J33rC zs2pq4r%N{qgpM37VCsb_Lgj9+^7}o?drO1lf`q-JpI@ ztD*(0HK4!L)2sYukMdlp)T?}fNBID0tylRDcR7B9!O|ek-B)mL!}%KI8VygVd?~er4iCJ9l_y|(tRHA?b3P=IA5ysfJaO3d%$C* zZv{+kqy~~NTt5iDDqxq^;=80UAwxB|K4>V?nH9?XPdYl)e4S-i zQqvjx5_uri)U=*#{#TAp?Azxsl0ig}oxS~)BLZ~T4eA7pUGF^yyUX(@9Nj@4iM@`1 z`u%9AoekWCy6^tdkx=tZW+;mvgZQ2LFJOz>)DRk~^mMYen^4P*&e)n8vuu3Afpr|( zH|7LddfR$B)q9~P)^7uBOl_9H_}Aqwl&*d+G?d3xxyHf8ZT=F*zSlp;=?h*$a8=`7 zU_Cer6BgRN7Yg}a3s#y$QPbba1Cab`BC>+mxuc;xmMV-Tjm25`R0STB^vISFJA38} zgj->P1$_KlusY2z8*mNDV^I094Zyv*B_xQNKJ6q7R&Q(xv9aS%!$yZFEErFp!s#Ab z54&B_D70wXMp!)G*%IQz=aW;_?YM zOq)Nls!7ghO>IazYm2OT10|;^JW87q@fqsc@D-}2DG@aXGw?Xh z+QQh%J8=QY&!ceMF4!cW7V%VOPC;hM8k!)&ZOboj2G#n}m{C%c9;zTd!taEZXKmjL z^<~{~KWfUeEHwccK{aR6BWn6)Sy)^x?(wvA9|lXUnQeQ<5n2wTn@#e=|Fz~ESO#+n61NWp2(#7{WuSM@iW}p)}P{LQWZ7R zQ1)dy2Ljj+$1#ng>NvOL()k3-(9b~q>T$v1N>9nq%@E2xni8PQ))WF|u7DA4Lh?zO zFW?0Nt`hJ<0WTKt5&_>U;QIu8zknYQ@N)FM)CVXl1Oic699}8lRRXRNFoLRh`5FN~ zD&WTiyjH;L1pK6c*9&-qfS(fZCiMNh!lwmdvmn?a;O7MVyntU6u-+g<_;@r35j`B% z8-&p)hxG;_ri#OQgX+-ta)jQZJp$Gngjfq+zC|?PRRQY_GCU%(tSb8joj3k~z#ASR zr+2+B3JlMZ7rY_xhG)w0hXvm7Y&rfdfj2y3j(I@WKXV=YvjYFQxUet8g}rbsJf1&= zjnS=8ycxD%2fy<=_+8h*zj7V?Zs5CL>%@Dn!?3Sz?rF#Ss_S1^T+1H~o{80=D4l~9 z9Rxgv(s`0pAmAyK;v#1V*hT3gED0yzYD$+Pa8JM+DP4x;!vy>?r4K@F6!2lB{VAH0 z_CTZtd`2nWnUezkiBh~P=LGy8O7V^;0r-GEh|pg#S^U(@Cr)tAXf=^J*9Ynn*_XrQard<1pGQu7lm9N5r~f|#gqD6 z!2hNcPw0$*FHwpI^QV9V@XAm;pp8;oS1hHkA%Ic9PD&fFh=_m(Pa&gA3@fJgm2uJNLD0v`t??~K0V-s7EwYEZXf7y13oikU$j7gVQt_o}hKO;b zm7-NL!6^Fj>^u<7Vy3DP;+Tx0mJmnWSxJ3|SoG!Di?q7mq#7)yGnAN2l_n0WfZ<1(Cl)laSf6t6&!+%9sLBVf`(DjV7;44rbSVr5_e;96Nn|^atv9FtA9$?3QFk7SO z*6YhnCS#{Su&P1vz2r0SO|Q86Z>4Vls_B^K4bAdT$I>* zbM5Vb+L3^5_p+yj+sqV^I9A)Dx6*F&85zV^m|QR|yq%oNHcSie$g;n{!Yj7_2}@)R zfvvH{-?Z>VmR)Jb4jjPobspYi!KcC!l+!_M>;HsxFn7WWIhh?eXit!9*ur`Cj;!Lv zBoo^;32V1B%(L5+Gnjq+M_32BH#@My-cg>(;^!l=u;86Y((9(rxA&9rbow+q7Pl-G z9)fO0qE$!EinJLEVZQ0plQo?7&4xME9w$G-HvH-6)Y6aS{D~D2`Cfhp+jnBO?CTD_ zt6wzjSMEwrb*V z{GQ^u#e2)=lz(tJ_}9$h%yL?8n^wCXB4~$Tb!(yp9Cva2-tm_w?{-c8;Ii%4x#Qbrlm711vx_o|=1xint?gHrwgj|(>dGnT)UY-i z?c46!mNlgwTUn^*RJC$KTaPN z-L;-*9P94J#d5c*VCe+?`TJOgwdK4bBbZzll~MBG^KIp|N$QEJnR zgXu0R)dh&pBd&S)EW<~>ohB*@u6)5Y)}|K=u91R^`l(N#9!hdqb_?4O!Io#!%3(Ou zPBuue{SVmq3Ib(xbH&NB1y`<3FXmjdY@8&8P#ft<=HnwTK0m)UuCWFULU!M z%NvT-$J%5~5@lxKLxP6VfARc$6Q#4Yoi7sf$Bs7h!wC0Li8p{Xu6Ir`h@XXnBmZLn z5%4#Vb@p@K?rK$%os>9nav!{rvd>_AD}%ARG!h?mWk5bh!I*d%{{%vZe5zP;6BvmEU8C1HJ8gw=W9wU&V4tF4*0rWLc~1szSyua%QU(Ua2! zaRCY9m;Wk=`_%OabPko}*?jUn7scimz=wsO2X{>{uMELrb}Z$9J%JSr_A|*>xb)@1 z_;yH6v7HqO;{tn&Fy5tY@KFW4e2g`wLw+|wej^0GIzBvt9V2`bJ9U?{qxm#y$zkz3 zJ7LkZOl->Q9Oq0lw?}_k%Y`zFOpAzQ$11|H3vpTm%H=>d=D#psSoc}U&Qe}wgwmDzIL&QNEj-1#PY)mv%5K}shIm`{2Hypdou zW-~k0FEN6Z{yWUZO5ed$*3v(tZR|us1h(56(bdKh6T8`1r^T&pY)dDs0e9%v@Hm#; zs(mu+w7{Zmz=7R?;}_s!jVJc>iX-RQ$DQewFuM4biHFjRLf-*?=8i;%>`NIQrAI#C$h?4Ixh`Vj%AgP>900TI|q%mDXTox zP|4Q@i7f4(i7praI81UDo|t?9S(`4BCsC@yvH4Z(b`eMdD+E_AdE4Wi~9v*~!KCWbErpB@n!oAeMXL%q^a2IpAM}>_viz z3tk#h$mtpg!Rw&X3~D4XnSSW3I`{CpFoJ%ofcMjlX8j4+?-{Ldup_(Vup z{}R5f{Af-3sK2y&lBAI?Raef?1Wp{il|J!;=x0x&>T436^(0z#O`Vm+R0-UBgR-w0A|la$MB9i0o= zs(9ruO01VGywcG*mlfO_786A`+Cw0&yoNwzd~s1MeYIRpHVDOH@ZO^d#Vt?@u)P!) zin}{tq0e?nc1=MguYZe7WGmZ;@kK?shMJ}c#dAv`ys9Dk@D+|8K)(Rn@*qO*$7cUUCpK20R%KI@FcwvxSq*_3CU2*`n!Du0SVQIN(>hoIc| zth1Y}i9=?6&e^T*+#g}RWu=E)_e>9G7g_Gk8be!0_&r5$CQkMYJ5>+X$dwRt`KPf% zR;R0NY%G$5TjVr98~gNF%zqVgy||R~6mwBZx|1DSXz$G8`$dygtYtGsZWSw;3Zc+? z_L!Yn*o;wjP!3CRmnuA0KOt+X)Ybn4z9HM{v3b$n$**4y`Hi+Lf`ph_2}+eyLQX;( z^gn^`cA4Xwi?SwPoYM#So2gPo`e&D<+;s$(wCHNz;^3>j&n z{T1EY9j*{Eu)MM)4%a(62C{wjeHU*?-dlQWOnm{nbOZKCYITCr(DPM6=3@+HWBPxw z^NXEQlPlp1=%|DVt!Sz8i^g)dj@pR675_L)GIcRB?66XIl7}phrbrKcEzHkV0}55P zz?CMcig_|Yitm0v3fEh?da9bt3#cxxb#nDoHTk|s92WCX;;{JALSaHIqKq^xB^0ML z**jBJwAh2Do+>nhR?|*Fccao5+_I$vNY!GB28U`gb>uah?gP?HfluaYc_mQhRrKYt znNb=$*ArT54-hGfbuE=vjg>P{l_Zg3PKO*o`noI@4`1gB2tgsK83fzI>xbS!|6o zKx3_>gX?Aa)^-MHWZ zZzPR8_}OT!a+_W#xN2Q2<)ZWdK#kQla2$e5rzN(zEh3S^P$D|9-%9-z^SAqn@Cjq z#NkWnflX{o7P>eR(@~&QOGUJ4bDIl zBz-#D5f&MCEuA){tu2>14yE;C1vfZPv)6tww~3<1sEcsEY2`*w5nc!5@`JKGQj^>T z1DrN9&A|fL-9@gbL zlHDD3UA8J7y6kb1-W}09$7eu#9s|n!Z}6vL*GxprHf2IQPp6W&b|{HLN4t&1KMSFL zgvFOeM6e2=*~*KdLZz+B0)22M=o?TV&(ieT=b_hrr0KQUT(31(gus8LZB^Nj5Pn1% zDc3C;?CdM&45Oa_)Y!X3Iz^-nB7IM!6opE3KZ^7UrD!)+V!WKxk$viCv9Tk3C@>hK zfMpI?=1ccO_q~>$8$o(*+h8m{vdAwselU#y zO0%$Ka_iFOBJz$wYSRYG$geHULVhjwL2kxw$n}M^Cvs&WJ8Oj}EMV?EKX=5A$J(~T zCI>s~53C=@YB&pU7T|n!oD1YuAT>uCu@hl4JY^)awLOt-j>>|{$uKa}AfxM!#w^XW zJU+Ck(re%2y`{midkV;Zrq|TM_kCk;w|HJccb9iRR+D@u067j{DZ0M;5XzuEt^oz~ zRg#d^{hIQ+1MPVNEarYhX7MGpv_(m!o>{FR7Ttl?lgMNXt-JNs`7UnU!NrspvB!~<<(81@$bE4QHq94Di*-J(`QqBMoB<#u!yoo@+c61w?u|QQ z)4XxVxHr!1i?>4<{?=(8xp##}?n2#;LT7;N_Z2Rk`n$92d|Ho)j0k#)0Naa{FNFp; zN5FbFO21X2qm>saopY@X=`|l-j2+JprrT@vff=dkaeRw2`CYcKYZz%kHQv2oaqlMM zZn9a$MyPqbanId)52$jyzB_G3`QFL8gKd>?u(j-6duj6A$#b|%EyFd5ipio!TNk0H z!(Opc*Zq1=R~&_&?(rDf;a%HlHF)RV(v>m0`R=THg!_zYAZs7rm(^Xz*NsEmz22SF z=it7hdy$iH17(`knniF;SXmHla_>RQLyCk3&8k1fOl2t8o1jP z&_tyf8o0|9K#LD+E;QN%-AbLUrn-JQ~ad*MfWqZQOJzYV%r^}{$x?uJWIwRguQs55)3A-#tr0{e;oX`*@d?zj|^3vt2~RQawmj=AJC zvmL@AMdA|T`c9!1OIX~Yv=FxMOi~Ct7Z!!Kl#M8o83iH5sol4$tocWklAMMEUsmqKm~d*ob%niEs^FNDQ-cW0*XO z#mA>%3{94=FuvuxCMh7TXwP?U5le2dh|$ia@o639KUjPL>~72XuJ7``y6FW@#BQ9f z`*ybT2Kgqv>-Qc(&!gW4M8E?geN?2+h;)}od8iU3*xPKlpCy8&FM^9G@^Vrf+d>Yc zYmJ||pU52olFrW8hDWNYj-G4gckRp?OS+S|c*09uG?%ovi0WZD(_BQAC7N#rgK2k; zjA>eFy*pQl;F0K9Y`+cnlAeQsjE`>jPTgCaIaLb~S$KI71&FxFox=;~PQ5(-vfIP7 zh;eFEmN{e`Shh8>!%G{#MZfDXWA$po&9&5%1g;LkYgy?B535V#xzIqTn z!LgSLf=l<7+G2Adc}jJ;!`lS86J5~4{%zwdx73mL|GFG%$xkE>I@ZAys1C0&O{~`^NYxP`h~J2*0u_MpUIRJb_L*v1@S>$ty;a(6>yfoObuM_3Ls5D^9!lf%Usq2RN7}HzDb(!v37sz zj!BxdL+X+RSZ*apm<|GO3H%x;rP`Gjq?g++bIc%!A!4I8ufs#3t-tz zY@_GvY-Hl%d}I;}(g`$17euZ&AwB+&h;z&D44JnADzOz3mprx^mv5(rT!P9&|_2Vi(C}8!}%c!FG`e2#D_#7 zrJ8$cK6g)b5!N#O)uN`*VT2dr+W(;}{9qZZWhykGL~J!Tnm!PAO|52;uv>?$IRy(e^b;kG{{@ow5 zh;JX|3~cK*N|6*5qIBH2;W@dv(zW!gzsgbviBaF{?rc~0@`Fxn+R;?dH71H~mM%kQ zlMH?6S~7I*3X-AS?u)jsfeVO!cW1c-Weu|+@s4zH#+Ye&;T8dErbRRj-Xt3~;Z}4l z>(Q1F3ub!&(($8oNJp-1?KVVN4AG)2j-aNcno|j@R3LJ~e2WE<>YA>lY8EN3Yt6#; zcDe*D)?zGPV2$m5eV)zKOE1-R-;D{J0GYEox#pE3wJzU}Q%N>+%JNV{ zWf(bL+|C>lYdCv0B^EB$;LFM6HJeCqnr&?KT4$DvTrx#az75lSF7&;^~PrqVTWwPX-UP%MJ>gF z7lBi%OM~=so2Km)z`as}qGkA4Nqdw>ujQ2GR;o>hDp<8&OmCL_YFdf0Gq(AI-Kdwa zVVmvYWLfG-YvJ&oR}b%goT`=XNv4$K7V;KKpXB-Z7D{WmF2X8yMaTHwfX4hox5RTB zoVT?nr33xzGJi`C>LC9h9RnSt72T#~jL<7gYg+fTv)4b44ri-2I-{<&jpsu#;l9lG z-wA=NVWacjYxa1BgTiiPvwHR#z$%t>(kxKyz$WK?Z2z>R*qB;eM^2z6dx?^LpPUoO zW4;FmT5?*o$~nxke|PkjeKZTx&reeq7`F~R6u^!Dlpt+5nb_9Hu+vr)ryWLIfPzIVwW_t5%SedeE zZy2_6kkclgV2#AY4fVU3JlWpSOzWF!hI&@pDaOP`PPQkqm7!8Eyg>m(Eg8_*~0m6bkTF6FvM^rA;wf$F;Lo1T_0X8 z9AZWb%_@0Jo6$0met|NdBmzZY96^e&lM<8JibPe2SvSaYW8&Y7FJq14KEgYKVPo^Asz+4VhAd3MgJABnXRkxX2*q?oSgu7?2^l}?p(7nas zw<298R_UHNO0Q^n6QvSe6K1dQRE#h6##1pJM))A7U-6eYEpI#X*sCu)Z-~D;H#^Z1 z&;PgsG6;R#;6w}W?EHK8`J4GHH5=C4z|NhI31m&bX9lpbuCy3!SXcUrGs106kF${r zYdjwq&eDd52UK%%i~o|(cUgF)b!$uUv{~aSW=tz)uYDMv%7X64w!jbUc2;ZQMRZa6 zI53XJfpfjafu~-vq}RQ%$BBhYv-h>e1e4=1v!{cr1KUs#mSA27GrPp5*P~~;i>AGF zPKKK^qaH$h-iZ=$mZEKA2RRLSih;Sris$rZv76F!@!S^&m}wiD2j6^tWLhXKr>s zHyAOn$)Tv`SW#FaR*I%+FlO3O`E%}>WS>4{?^aiFI1wR6ip)y(JA1Kb6Vh&NnG6&4 z6+Litc4tM}EK)2Z?e54PXF0D@N0xT&j*Ltrrd0AMo}VX^*HxHDT4IW_3ece`)Ttf* zAu@rwwdM(fJuK^yG_+GfOQT|gVE~C5a2#~IC(M~}_=k{$3=9H(GQ$>3Vn^BPuuc#SQ zO<|0l|{#ar1rH``&nZ~DX|{-K}u+e6M7v#cKqWo$xHCU$)vu!bU)<#R4Q9e1E=D_ zwwU8-sdn^$0pL*EP=Ria--`m32CD91n?wG3o@XWJ)KKfZB<&8TaBF_J0a^L8I@b#A4zjPLpX4m03)5 zx#pS3!*u@)C8Ud(Yvsep`|ys*$7BV{w}Z^qA96aCHZuG8kh8z57K|dWh}2{{Kk~Al9zag;fEeR@dSlbN*G}-Aeq!?+3qN zA0*iG1p7$4PA1s5fIXZ}|2W6z6^*t;Z zTHH?@T{6Y}P^KL|kUAzxJMjE`6Q!LrNy8p0j*9Um35g96|6731+s+MncdM8(NyF$r zt(M-m+=p@W#v;b{+U2?d&Fpr)MOc0RvvlO&;DY!F&t)`nwGBWEUO{ObT3{Jg=D)xI9VJW^HhJ z@{VRtAbA3zz{6d*F!=&?P2q7hc_bsYlNDkX2F+`n(C3pC_yxYuq)LKjVBk_^wPs)- zse+BGdBjUC=;0sbRt6Q8O--)AflO8g(w)gd;Ory!ZJ29& z5KYFMU6fIDxv;*lMc~*In#&+?ieGN3oCG6wQR~wBVm${RtH5QsbIs$kfXgI0cdpW% z%W~(Mi|Wgx2Mqi1>zR8dTLuhs{n#{JYF2+&n&k`Ka-V9J5>7=1pm`s33#alYx3FMLiPL z<1)0U8LsE%;%2z7T^9yyYc8W%pv}b{-47s=U$1_fwUgq${f_&Gdso}6==Uyt(2t7; z;ofCv_s)WQ=g03|%Nagu+*3xS?MbN81kqQ&-yT#k@Hp>&(1VgDfxO%Y*=`COx5ysG z3Vum6O@Vw`3LJEacGM#&zT9q;Kq%emK-(~=WHVOu$tYwlQ1=sN6iGcuQZq4Ie980M zB0ie{sTXisRr5bovs1&uBa(PPmu!jUET*@p0+Xp1B^J{zAk8G5O>1ScmYc&c73Gic z2-ijw$eE}MCJ|)mkS#P4&;w{+a9L<po=_%@J`KaP8lD3AZ%hNXUt+IeVEY`+hb10VVrE*mAfz`_I4_*mC;6ll^w~ zTiHjl53^x=oPA)^;p)uNf0GQlvZ-q)boX3~`P3#!rJCev4au{b+i(ir@VA+_0Tj}w z;n&Dk=8zWQ)5;)xuo&r5xOYkTuwzHkOl)<0IJRFPeI|Knnw2f5FD`;;L*NfJeWq$D z2rt}d=iw0*tuq*`m3JzhXN;$WA!JEv!>Q zc%1TrO^BZCXS=qli$Cj3l9|)5OJvR{dg2g0-g5|PNl?O9i*&t6Uli#+kwT*Gi|EDj zTD6ZeOdHfxpm1l#wImWtexO%t=JJoES%Xg-%s5iQ;fu?XN#8kqad~oyhsJaG;*w;e z&U5%;Rq}D*noBGR^(B|5)=w?Eto~M6QaLs0^5WmJO0uRlPvqrLPzX~$0n;LYsY}X#r5Tt8UZ4ScqPSI<(S*|SIQF9qjt1ghfX#UP(bRgU?vg*w-! zqXl&~sOe21gWD3KzVnja0PckLN1fbh&Fdrz*F&7Fvnrav=Ved<;d!kT9VQw3Bg;ieDf-{q3NAjp&Qk68&s`b||-GfF|`asDP}IB-;6;4k8UE!vW2u z5mg)m?j%()o^}fmRV>%5SV>h7{c4v@rxZ0TLk%I+2-1?f;UiBM+*cNe22_DNinA|q z*>p0&esRJ7(X5h3Wgj$u2%Sc{=TVt5)GE?0DgEEhDxr5pk%Ioa(m9-cchxz}bq_o> zLlc%Pg|7LnIbS{LlYcX`&wVrF+5vOG+MA%)H0V@Id4q;|RVzO@GcEztpIc{51ohK1 z<4AM;OoN`8iRiM)`D*mw(WKwLV?9kYy9hfcUyTnMd@~XfpbF~<6!eTtWVLZVCM+tN7)q4hW3i=P}eCYa<@!#FMRydisYy| zdTAi`-xTS`B0bG={C(TTccJ$J#pxm)AX3doi>`*nFK&&1F>-X*?!)Q=yZ7mS@9&Qz zek}bhM3Uvx*Pv7FY-~3F3V^5l)4EQ;eGp?~7YTPQEjNY@4@onGn58WDi!eEzX{lIk zAvT?Dzb%Yb82W2W@(9RS1c_nFBW7ld=QA@fO9L}A#YnJ zO|v3)HV|d4M42C7*DR~3vNUrtEgtX%=5jF1-8hcf8su6!jL8_4r6!kSE|xmer)y{h zW)x^ko6)Qda^YNKriMHA_*vZ(U;KA7HK=AjImFHPJ&#$Ax$`19h8pOhp*w)Uhlgr6#Y6e+^#MBHj*wG*X*;u|yst)CmpoYNJ_{#ly z7$7k{W2h+1*XCykXo$y5jsm~7#3&Y28|jy5fCl+>HbA)^s$8IZUWbR-P>Tg7Ulfl8 zrp%xCP{+`@Vhq_FIbo ze*O9_y=BRep;&}Xy}7rVd7bGWY*Fj9w%#4B$83*VSyD`z-?jJ1qv;*vUExXWfdl@+ z9ltgvZHG2Rj+(C94tYp#rI+n6rB_;?x_?cMf-j!Cq4IKt8|skeif9qM|G6Dkq5pb`d&DpI--jW z$L6Uw+7rz|CP_NV4%~s2WRAgk&kn7Ci+p=WSP8eY;Cx_fe}w{z#9_hS+I| zHKkc4EpDoY(=nBpU9Ztyc1>v^%mSJSFHg}4n~UqGd=Xj?El>R|NUem9xA|iKEEJ&Cus6mo}Gw5n72k_JqlTR@b~(kG872)Duh6)m`e3#pe8P zaJ9@+sk_vM7j)qT#xP&kh1uJ*$#~5r(FnG>-V_zs_kR5#bT3wUQ+^9l<`&N7lT=#5 zg->~e3v;g*g&|QdupLiRjzo4PSNUG7_VdL=6^jJ48VIzaukN;uI&J0uWA4oZqpYs} z@#mR&Ci6@Z!UO_IAV45tGavzynUEkPfMJKQSW&115+GqmfYOS3occ( zwj!bdqJUea%i99(#n(o~rB*F&Ef8COpU=JbnVE#(((n7nZy*YqP^S1{=4|4_P)4#<5uWy`AZfD1Jm5c?9?e34$a`M7^)j%Y+9`Nn*t zPN~8td5UgZ?BjS&Te)u$OCyysZ=7#=xa6)o81k)RF(g~vb$dcSE}9gvyY9h|k6u}h zhkmJVc~ohZZ&g%jhOauRG(Gli4D%cO(Z9w=#jE*KrIeiDqw>=!l^C&mKoxopUsJ-Q zS18g#MXF1qjMx`I#miV9rkqVma$H5Ki}1aVeGLsC;P2ruZKMFWqcoTs-2>8UP4dgD#K4mNz2Q4Eg&;4x!CcL4 zVgsuXJ`q*h7J}VAi0;3WToa2Di3U@`>Sa)Gz9-qHIaT?;>_oL#KDZMQ)arV|O$Nb4 zVI?6!VNRh5Je)2tp24u`}bcp_Ag=3k3nQkAx|2PV6LRrm-~mR;RD9N_qikI&dS0H} ztvi3FY?Tur?#6FeM*4)Ve@@gbK3A72*>8(=k0*EV;DFxGLp0BRLGI_>AGM#?fIU2_ zOrH&JB2i&lqj&F`7C5qLA}59L^5678|Kw$>a|Nl-!VAI zYv86|1DT*;UcnOgmtC>F*0dO>2BaLy16`#&fP*h7fX-L8LngrROBx^($aeVA*UW3G zgk|BJ{H0S3uymO}yF}+hXgJ^$kgt|`YM`n7-6VC@+}|7WScBZ(V_i(2zP^^SKSiia2 zPGeDv5T~!U$Fj>1Ei-&|wUQa~70)_#wXY+ahq4H3Z{KQ`iWKjk;akX&bZNTpXHjh> zzMG;-6MX+BrN)aL1(2jSQu}P zDn1&D#e&2bgug7@3dM_OZ2<*!qrMS5KV5`wH8zxk3RV(#L5moQ7>rvI|5O!Wz!N(P zbW`znO_=ry)p)C>)kSDrW2r}*i$A_qYTVh1_C`&sidpdgGU85ykXx3DaFrt5qzQF# zvyvRTez)Wx`n@|Kz1c45E(pb7bQm21!!DB0X7>I9P(V z9i5!op_xC>(h-B{1C%4o<1mEoIyu+x3-6^8u_nF6D%_DGp7>D$#PZR;v;Z&c{Clap zsQz^O%@(_8>(a~x?b5uN-#Si&OuSYX_~_yIlrXRUHs>#Efodg&ToJkIo-jH zxGieWw}95I<%`4npqFDG^s==5*aw}t$KB-m@&JYWk?RHR`_1I!oU7>R_mmavPQ1_y=vvZ+FAJnN^oxZ24|xgUfr84OCgWhI7RW zhpUG;EEmqMqBXL{dz^`_;Pz~9IhrC{zL%1a)6`&-B!mc=bely;-iLsnwd$;H2C0_vd@;37T7`WW9{^A^x(rp}F6 zeoPyyLojt02cw2qTFvCSxTdFy*rv+N9HN?G0<@Mx5MCb!nO}FRC;;mU6{V{QVvW_08fDCWIbG85Xj>f01&6DlIo+3sL0# z{whp5QMHvSN?j^9VkuLQ?RCX?YS2lFa=N0_r5Q%-t)M!9KmNEC<>bc;PzL&*BAu){ zPB7wPaM*s~LoZ~#6fWdh%A%{TP`QmAo|8M|zh9KUA>GJ^;ZWeQZy3z*d2>GCk3b<3d_tUh_yWtkJ%T=w{Z_8CF-Y`@+fJoKoM%r; z^a%lzp?EQrU(#@t4H z-C_eV$^8n1LV}b_8zX|Unq!oWQAj~hBq<1rQ3`^>RczM3yCQdlDgNl`o02$_j|=>w zQm3oMz_{GxuJ^Kt^Z2Dsf1{g~QIWX2Q}5(a==FiF{#uir(WwjXH%ImBR3a2$xD1w& zN~VYQeDUuNosxZ1HQAh2nbvLM@pp4ObsU(T9{EJP&Zy@0$FVKv}j zHFH~wi_|1>-WVO}^UoH@=tx9yQ+Y4;4r6p)0lBGqMnqz~r2oUXNE}%17KZ(Ozb7uz z>$uOCD=)GV-n(#IBq>$6yce<3^3dz5d0eD4KA^Cc_(GH-D?Yib`xC0dTZa{DZ2C?> z0o+RtYDtxhZE^DSl(gbSb_moG5kukeaDp&xLRUCIZaOZK_9>fTw_^tlTI{e+a5SYAgPPYICkATHXx8^ z$-?BYg1W}`VmBJhJC%=^|9^A+nCs{xwk;pWEW!LM4)4g#H2R<4UWo`q z;Q>xY!AEipkN@~saC*Z}lJp=_^-V?-vOuSnR9Rcechr=s1n@(P&mKUWQ6v$tvYWnx?J%1UdH z9N8L&N)L5p4v5-ahPXK?&_O(KCeSk^br{o&I=W!^TmxIz$O(+h=0J+LJFA@N4XE0a`0zf@*0k>;g?G_ zjB>f(Y1Zh=*!PoI$ivWM9DB{sJ*Mj(GyG1I?oko}IQy~je43%09hQ>eUK|sW;bDWB zr|?I~kSPUON`_3IR>%U4V^h++D{!M+M#A@*rZH|0W=mUCz20-uB|}YjJnYsl8V=*J zy0~$K82GG8nw#CEN}r=NY!W8XilOcTh{xqFoD1J@>wFe#BPFKsSNN}F}gvvz&z_FM#@ zJ3KWdNyvHDf1;BG#GSg^b2B_ukSmwd_@TW>$Gqt|i~FaH&T26Oi=%Ld)yQUYzAZe^ zGd$mlEkEgNiIXRC5qR#|EL-GVo0|?i-+^!C_7=N;hKkLo@NB{k(JJXXB`4b(vH;+6 zZEmLL48+NYq9$8J!5Pw_x0xhmO3t(9IeLY?9~MQ^0e3oPGi=ayjRo>=YsO@qMbV!z z`Q`*7b8i^(KTmM-6-CGUXTd~6d*{+w>U8P;(&|z<_0F4wDN#X^6@($lu&JQy8p636 z*qsrCptZO*P8b@Z{WptdgJ3q1HiWPVg<;2344X*ffpa3)0M{iP0`Aw&3_j0+8&HOD zJfZx>dt|tp{KZp8m<(4lBD&{?QK4#9x{~;lu4F zJArEuspev~<|#ciLc|enKmQ>50hOT58|?3dtwGa3!z@&7%TdBiUFbxrK@pK^bYlfd zh*YCXDpC#4>?a(qgsQ)`pUERcBGov}Eh5!Wqi`jAP4VG0b+1UIn)%#RVS9^6H5*ZN z6T3|~5Wm@d{oyJxp)x6j*!R3k-pKZ+PC~mzu zx7`m32G@*vG)m_26%S^tZZw$rC;rGhn4XpS^%m1_6!UoNrQ|fPbOQgu%;T~}k&ra* zQwq@Q<|`%i*FRKgizoX=pXDJ;G_k&Sfx|lL2MOX*~CXPe|3i6zpU6wF6%=gp}(|@%ZQ9 zDS*a=@_ki@G_$+XUr?eKrwEu?z6vo<2SR+mIl^gRfgtv>{xD1kei6lKCMr7uDb^p3 zu$vMwvbAbG!E*XM8Q~)$;GqT>*tf6Uc3OJb)%OxYb0r>-n<&u%! zPRDS`NS`|5cyP~g265>DWpsFm_m1U6DWi|_mf$@ili+PLyCSiS&{Ph)dZ0S&cqDm>?IFMn9FJ0vM6}Rxr2Z)nuC&nQ%qrNg z>ItNj0zOpF6ykC8MNDinhG%J?k>ugGqT;%_8jVWTW9 zj$cf|B9w9{`%7V;`sY!sE;&cgcbXhQzlEnspIG?5L_-^ZUpT-9&Ej%~QNeme!{+2c zx-+)n4^wU))9os6Z5LNNX!9A)-9VH4M3<@IaT#rXupIx~<6S3C%QKe_D$HCBDgMdW zEtKMaPoOXa@&JwwqCzujrWqq;b_V^h()pzVa%q{JP>bOooti=qpFoh}!?n3x#eHdk zB&&MfmCMBAue!4$m^q@kDBqd@&-fnoi0{!+<0$e3uza?$G@Gd#O+xBf1={{dbjTVb}W6eRwib@0c`!mNvVwCi4| zQ2wFxBaJ=aQ2{7MfOkpd?q0~+Z54vpZgc_a*S!)!4E3IFn3YRK_s=?Jh%FHPMb0{C zQqrG9O9)RGfQfH(%rLXWoEtjy7PXf`EZ%toM)*qOhJj8Ty|iyXVg0;Arul%hXLh~P zw*KwO2v}*}EoJxmU;H6=u$g#{*e+GUz9^~vL)eZm*j3$?e=B=e$z7 zYhXb9c|#ICNh2EB0vP*HCp!`|8wB3DP4M=hzXqddxHNJXBh~LfEDiyUY^2sJ{X7_( zgF0D%O z*yeiLzemNdr%M-J0(>+QJ+qhai=VBjm2p(0P|AidE*H-(6<@>UeFp^4*HRDertlti z?)Wns!YUJLFd`DT^vN8{E)MEfbKS@pIjA*R4q?p%VaP+lyoIkvA=)JjBrr0O<;S#F zg3iJDnq}v)G-4N8;9xHS%N(4q>9$mh=s5Nzz9a0dalUj^`|+wDquTd|fUS!QF-ex;i>Or|GqiQT?{icWl*9G6O zt~+vjNywKq5kXI+PXV~$CeBz=)`^7=@5SxMMMRQZAZY8>x8LhN!6e}_V z?Zwc);{F}Jvva9P|7LKX7GXBT_NSAVtI0?!Z1V=4Z#GJG=K!kp*@Hv+I11Z3DYI3V z7L>*n*KFXd)Kpe~CN}#HI1R*RcedJ(Y$)s3DtK#R@qtBa%kmMde#jyj=wdDvwT}5g zG|Ve0_s@lv0FLJ}pv7FyRZWY`1qC#SFtYya*dCM-n7p~e0Zt>`5fj;&Vj`nqpu6t< z{;^SEDQ_SiFaG0WnY8*dA47J4qX_sFTTS~8)VcBCBhXt{v%w`*vTkn6hn2W>XmF=v zps*76A85vmB=y0zm;0%a8Hwstw=_ObN?fkQwGwx8M8<<+VWK_}CbpG|ZV&_Ld4AF zHx9p!e#9TdzD6PPb`{^^eN{rV3mL*yV`RM^dw?{%bbO005y);mHzTTrSkYxbhw~fr zYx!~MfPg6cH22=t$!DDzEbR)?Aly;!3xoa* z*TVRIFT}=q;iWic*khV@Z1@e)r~bh;tf zHsZGS`4`D4?rdm93SaIO_FB6=ys}o3V^frNw;`6F3=E;IE3k zrcvFYdzI*3)BPc*U3bGMvfCzf;aQv0xoN7qjndu5_?>3mt5Emai5`!#*Co|XFA47P zF6wA1=649Rf_HBy7h8!uO$y5=@n@E4wJ@Sfs9w86ey36Q+7*g0l>evQ#E+sC!XN!$ zg>Wsd?Z>c>{_en(kP{Sw97O4QZ&#Y%_f_c*RXV9kJ5=dCRk|~*6_(MHUTt$XxyvIu zAVe$N1u-GQHr~h~>_g0V#C^zE)N!~diS3+5PSZ^s_5?<^ih?fr&26GrmdK3>Jg$Hm zqqV>l=hXs(-`MrHdjscafge{qXFBu|ha)`4d`HabF(6r#e4d*~{ZT{%EYcVD4R1A? z1xf{+{xP->lc3Z!XGT=O=B;ARDwu{Wg2r`InCXa}Pe8*V6~O<10{GU*y1=|9N&);; zm;srON(Hc}`d0^MO#ojqs(wBFaMDpL1E~TQ>oWs({lGSX&N|L`H{S!CU~m$`<9+P4&e#dBiwvDwHS$2ARDteifG+ymQlkYoJO);A!j00wk%piLBay5WLU_YjQ? zEIygl7jadyB&>x}{;GvU)0J`|F;|?4%l->&kmIsDyLRm91iNG8EcaI-x6a34c`-Nn ze9McldYBO*TB?UnI=p3WhsK&|E$o$Xp!C>L)nH7F1%aRt3#FBESTX!TGsW@vk+Y-GcV;XR;&YL@G4D28ufNi7;&csdcq@Ll}La?dWT80Mk@=E?Kf z!}gYj0<9RH!>m#a-x{&}fMQr8V3{`8Do_Q}b`3Vkm2zb3K~#FEz;YDB zuSm;}{LpHS9u5w{m5eq^K7fw=m~jWu*I6S>k0V2M)(F$$sD4&!1R8|U?QGV9`z*}-oauMsFaA;#)}H61^M{r9!HC z-@$EoTd8>uHCOXKir;{v=Ity79)b9rrmzKTp~e;dg~Xw#geC+U-bBjih!8>j?s&|( z7cvWqT3=csytSVExOFhc}v5uF6|1cfz z2l$zoXK)AOk&z!q$E%IyR-h6>`9FA*UEb|1SsqGw?t11O0H5nvusugeW_$mPQbeQj z97=AgU&A_Hn%6>y(s=9FsLR-&L4rm2$F@m{L>IXYfl)H+^W(mGyU`ajq4KF1qk z+|a5~?z0yL#tvNPsCcj0q|I@!80zlbQpIboESs}=lauS*#*n6$uxgsvn}|hdC`zIP#!E%;55{;62JyZgeAnKamoeoId4wU1e_X8 z5t3aR%Eg(o?CK>Wh;KTN`Fxo#komKVS>GgS4#<2%dCignA7SjfR?G1Aq7B+2aSX=;D8uV4M zvj)(sbZ}q$Siv#^Sl65bZ_|!f?KhiTpW`CZi_W^F)Jb@oa17?~IPV-oz=tly3eW5$ z<`?|O$1=BZvN(Y3C6pjViP!W9>F4%3r!mw17ERKSAnfP%FdJM5kAQ}*Y<2wHp5w5W zv)b`Dn}-`}0K9n|iR0%+QwcK<-LUSF-zeJeu~Iv--5IidXf*RbhPoKb z@;gE{!6eKAx~IGAZV%Z~a2)F5p#fiMOM`-oo<^&y&hSwTX>RQylbb+NAxQm0hm>(A0?)mH8s z6jdtq1*1x{d_$v3GvcV9egS_&ae2OFyvB0gDOgkZxG!LabaA>7_gmDzf%3y}; zDJssHZj|};7Sm12l}=25BH-*#w$8h5FAj_uTu0;Rj8$vvuBp40{v_~Azqa8S_ne{b z%yEdnCOzl0W+Lo4cW*huu%(R&v=wllOKv-O(CjMX{PCS1FHf4JnAX3>1a`Hi0FMaS ze;6A$sMs3cd55jZ$Po=KWNgXS^2d{{mE1f4A2NiTT*&85dB$|!nZQx&!xJBXU-j;ZPv704lqqF+& z$k{SP_M-!!x3~euX!k%D@sVO~*HaBagR_AQHp~R37!5;Olh>zLO8!l>ok~Lj)YDLk?aCiq0X&dytF9M1-KqOMrqe@6JFw&P zn&60Tc)e9GJjI$t-%A7W5p@W8vXz@NBp^!vlF}DJE^-KSb1${^<@?JE%G(!Te|mJb zz@IsoEO`O)3$im#h1}Plo)5&8o!QuLT_DcP2kds?spGYOXlz;xdyx4}i(wBkuW9iP zAjkmRO#;Ixyp;wWW8z%Al~iMY8Bk|Jz=Od6OTM3c2*_&y%tBO|@2B2B7lVTt6LaRf zs6&jB0lXZL*MMhJ9$1i_ztlz909U#o`|J|t3uL}}S*N0crFV?*94%OSBKewA#>f*R z6;(c3nwGGoX^GRK`W%q`o91(@YMF1CU$7V>l@=_v2Iq&6k%w8@si;8?&=4L#bvl5S z8rf14Zs8F2;Im6PNc><>lr}B)4{m~R;vZa4-n0yR%?p~AQF_RJ?C!?fzvD55zU$`j z-fR!!;(Y%@axjX1;3EP?QB!D6L*@59BmIapq>*|=Ge_hvrJ$y6|I86*l?W#v)65YE zWJ%q>nIn{_*X*{-+s``)jKS}_g>xU{n=fOC=y$*1SOB*a-U{V-`vHLTefJRWx<*){ zjEVP4y$3wmQ1$`7RPy;2M4s=00t}yDj<(Xs(|qyRg^d^d$O8}2SWW7{xNGvxG=#^` zjy}M#W1Fy%r2?23hiEE<|M*xYd7yb1*+MBLKAhAsA@m{|As}+?3H2i9El7oloG{Z+ zrLYfScegB0*>=NqT+>ItYaiBJq&n1Ko(inNSMh}JTOpIz4DC(Udo0~o6Pzo#*5V@mf4pRc+ zXkTBJw76L8+s|3ZaX@GwQ{oj8R>u`?8`+CBE#a(gYv2pTd-5#N!wCm?jEuOX`U@Pg1NpCq~Ln ziT)Fd+XiuJr^!q_{vb}JG4;#*`ZT8PEEyvu!@0*elKe!MV{qfnry-a%H!vo2&jNRw z`4eVIuU(1%v%s!gP`RpNRmFmeizXnglwQ13hq?nZ6wzfi0D%JFI$(ubfj>71>TA zWKaj|{4vC7upl)JvGW2qwI;Mhc99^o#ff9{0#ArZ_j%gMa4Z4do%2Ho?UWEgrt5qV zLQ=LHv4FB&ZE38Q?Z#lp3@O`f%MV%zuPe2ti(Yf6|~BA)#c+EZ#O zJdM!FsQ@fesH=4+$BT6qhRhSko`eEr83ZJ)uz;!CQyqG{^4cqfg{z%a|EI+Pcq0)X zVaWO9x@+-Eqm=crPEYGpzGSFR`Ys{r&8lc2ih5LQNDyd&GKM%}f3=6Pta4|gUZd&C z_QefXHbAf8m3ob7*#%3X*O<2^$}M1O7$4{Q(^I1IB~kgw+2YJp{KZje@r5`uEt~wV zp`7@75%3;yW=ggQwIHII8i^VpToJcNoGCeHpaKcW8v*PQXL!Ko2dnvkP(7j6uzDh1 zbJrXzSSmFb^IAgnOyzEy)?iGN8Vp!k0H8Ml)e{-zohT1F;}9oZ{Kv;KLou93zcobY zy4YkfX?AX#kly;@mI-*1WCt$qn&auDkx3<54RT8^x?zJ9`S>tviQ2Um}p6wP^- zqLm-hmU~@!jmW#$o`UD3M6reVYjF(aW=dRA6L-k zFq$n;HF21C!UAJ#?u|aSv4r)m^IChi)A2 z%jW@Q$z69S6!#MpufpHIaaKMqk<3dKQ!Mv=LP}k#Fyg4Vz5{=~L8K^WD9Ra%QkP~K zad(4?_99bU#xhNMnIfH_NOh^ihNiHUpMDLYn zsf+u5tl~jA+s((Y(%Fs~zG+lEFr_6ZJ++xG)fhg`JAvcNPjvY?Nq-Jbo&>lUd39iP zah*GMeo+QA5es#wh{Sv=I8%4qPdX(PbiTH$VeY6CreQZdmQiVH^M3Sip7>N=m!qPPo^!ifQ&H^M2sQ?8_4z;q0g*^} z51`*K71-_@e#1CLgNY2!Sg^NU3T*dtWF;e$;Pgk@Nj@gQb|;I0>A8KPpmvvu4Xg+Q z?Q+@wTLpeMBMNBuVlcSpX(W+B`)ey18VRE5u2b3xqU@5Vid%a^y&=Kx_9{oYze6{r zadtN;Yl*!$<7n`^rDpxG&4CL{vFoo^dZI)Q1CP3dj~VHXt*MROy1v2^PV5bxzN1^^ z_Eno7fTNpJbh;3nQ01Ghk7&sY{bW%lG~EZv4lI&D z?l9;kV*D_JEe2Zh%kpK*Sr~W|MZQz0)EVjr3=6AoIV@~3S_})T47Qww2cR6bv?d%Z zGpebsP!8laGmk5&;UU$nRlZ9k>)2!5#5Go8; z=Nx>y&6uZ2MI;hemtt9C%M}puK3sigu*RjLsJOfzu&y`1hOc0Q<++cYOf!rh^OBaUP?eIm01Ia0s*%-+sn`mbSy<-LFf z(;hE}wmj@$SyBejAbUeVhs_7Io;1+zH4mXmTd;hA3VzIxP1T(l^B%;v zyRHF6)SE+8D{%LyP&D(8%T@r;{ttv^Iq8IEq$NiD7a*gVsv0n)1{|fRbZN|w)by*MFBJa4aF5DWz$d&* zV7N?qp=7vBzt9ZVd0aRd`H3#SE$Pp*0kAzVwlIF<@R^e`7W~v5YoA;&%N=K*bpLdy zyARpza9Y(QjLTSX1sZ3_#u@HeL*0GR_#xYJu;LUIw+C|CVbS^B+W-=d_NKIsUg7;P zBSEy?5xB9nRi(2PP|U?=S7F{6cuE<>^O_uHE2F`D(F(H_Z|@Jp)K}aUC^6xtC^@d& z7U+X#zF00DWzZJ$BeizCRkB>J9Yt+JPX`J`ZVco^HU`AeL9p2w#n_#4>sy*0PUl8| z+#Wa}w+GCZ9cGJ1^kt6Zx#2tJA0An>n(5B!}y z@g?nV5WKnvT+?T&U4pNarF^E^B{09J|MWhX7KQToe8K)4&P#EfW$LGxuGHyWOmSZK z>huv^zfY$x>3VvckWTV!^nX{kOVC-=f34g9qv}VPCP#Z)HC^d2?5u2Q zE?Fi{XMt^39a{$0)w!ZZdW9B9BTCpYa;XX!tsV3eg&8GyCzZ9RIYA#$)Erm@we~`4 z%xe}p8uNxSwp62~04*V?*~3jWWi=J(0$q7r_Ss4fR)897Fo4m zS1q6Gn86?L~#M`!yO}HkFpK`_|+=NfZW;`JuU{9CZ<9Uq-S*R;k7M z^~f%?6tiE7K`jNN`xLVhM%P8L#L5GAB(uMYCuG`GG((X*1)ag{H_GE#|AR`;r^vf@ zNM`T3naA2`k}1bnlJN`S|8<~C$VP)X244g`=QoP6?;~f9P2rGOrt_$VIZko^`$Msm zNzC!8_0CZ2FGxIrJdn{f<4m?r(mXa!$`KlacBF#Gna0CYsvtfNqLk_~JmjQWSQq!Q zh?Tr9?heHb;8{#pqC-g>WizKVA&zp5QyLRDEUGlBO;;T54gB$AK9P_ukIqP7T_QC$`>sdkMC6#QgsZ5 zo;41Q7Y$ogSGV<|VeX||P`lfV%Y=!a8MDQ5$<+NPmrVc#^O_h$qeR9PbHC5v9hAjn3HPpg^C`*B(5laEjU(ltG>_S60Pa|ZAY%ygL26M$=M_gIr`b8q} z6gzEumou165Iriz(Ji;(U> z%BA!Pq{FkFg|s*`qQycQ3Rf(o3BX>|Vj+!CXL2R2QP~T_%?IRC86B}yjv%!U54Y2e zftp;oU{>hu;Md@*;brqf;Uy-Q&CMa)$tvYKe@>`{LO9(0{bQw#P1Q3;oY>QJ<y?Y>W|ydz)c~MZ2=wZ@WM!+@awvQ)?Qtp&{14*c$?I}%I1ftKj>tVwaYmgb zGZ_>9<71iB1e#a|!<40amMbYF`BQk=OvcoF+5852fs<0D15WxaO0JpwayThDiK`#q zR)>?4g@JvRu!rp(i>3(s97;k??s}N61+_PosLqD#YSf$Lc?zAHsi{ovhW-=z$oe>R5xdC+G9A#(VX7GmCGsyczy&_ z5DbTh z6Wguiex_1bi;tL(QdOHD)K5GSC@_nA@Tr3R4b*9&PABVBflE`O!kI?5qt zPMdZq)?gyhZ}|3tK8{CB1QNPHp&pfuBX6lFK#c3oh-MAmifGmijCYOvj*0^0xyn_m zzy^s>FA)3sbwsmX4WRg%3hAB#)+Z3#`t?tJvR2h$MJO?pyiQ#RKko3IvgSVP#6UVwk=SK_>2c(ok!r&IK8k{p-o%?Nf3ESC$vGeYaT6V%b#61l zg+(qpT+%5J?lGT%0`4(u(dKT?{*HUhTWqiuQj+a$k9N&e;Hdr$2;Ixs#eqPQiVV}f zl!vgbcn)M)v*ZxgMpTA8vpB*pO>P0kSiA7;HMtDXko8}of*;eCE2H6ik%#M_J%V)_ zvVIJ}t5GUaZKLdo>^_1DPK4y}y-G?Ah*ahK7b$h9>E*tu#_UM3!sla0-B{{Nh$_wS zUBqF=@%$K@%`N%UY(4OYlkFYDOD+$!!}2BqIlg_0x#dORUMXVq@ySChTGBLLo}Au7lb8Og(S z*e`zbPk7e+9J9+EDuhQ*QB(|jm7^dvfm{S&Byo6MlHYa2FDCt~Lof5F@~!d0!sS)v zTXU!Mtug;tzhZq7y!*bYfB4HloY?{oX^7mFz@$ZaiIdl0ofhe|pVUlt(+?G?hirFgsT? zG%MAVIctj{iw`UsQg(K3{-QGrkHZm~%Y;s0oTW31su!)Dn~x>KkdSQV>Hx~Iuuvb7 zqf@aaXpXIPpkhnfzS4G^+wIvuN1<`>0AXL3@EGq#Z9~xu8UOLI%ni76Cg+$@EN|^l z*;f4T{G8a(V<a8~z!En#FyBeDZreK(O_BL-5((F` zN&zfgj@}wzi5?OfB!8fa--Ica&ditw&vHo1qM`+*2T^ zlK%q8^mfxpWce}UxVferrYTLwrLw4lGwut;ea)hd@4Pn@#|hnmRoWeje}=7Lr)e$` zoG8u9rCla z@W+cOe~C_Mkj(N8I^C|*2X(qvr@v(i&V(Q-KEP(=Z3L)s%Gm+wViy54T0_Txb88=X zYOb0qL9n51YN2j&4;mcUwmvItuyI#Q1gH6PAq6XZ{)YKZu4aA%>JF4bIu7TW!l+IS z;attUFkLv;R9=I=)ujiP9w^UWTCI_u?)xIYJUQ8tUo3FQ}yAR*LMn z1eP946rbYmn!T4{2H)PZNCU{leuBGOt`P4i`kV6wI4pjKNi~^IX za99k7CX0cce7O7j$Ew1BPsX9Y$sa6#$Cg=xCu9Bv*<5KSzocwHY-lHn@GGY{3!WlX z`JGV}2J*iR4ektd41+yA$sV?69(&kcX)I`Yu#N>+@JgF@E_5`I|BcK#K>ie#!AI81 zj#e696RW#L-98w}-Kh24fqZkYrz#EPFJHnikpG3ekO00A!c~5w2=zR^gPd3C`xpoP zD>#WNZVAOvka57CZVbh(#Niz4#Lc1j-;me=dy3B|?FdfAuvCceh!mVe6&J@(h-xg2 z=iZCcHY>g-hZ(6TE8;JRDwW5_N0ny8Cq|W~w;`LZ!e1?GXSBh&B}gHT@e#wCAAhyeHThM+dyInRa(ydT;8`ainmc7Vfb+<>+g;o#d<$N6SXtW%Z{Uq>{ zL!df_VCJuT9zm~H*mLGnk)FGpo&bMx2=pNzK*vO0U<_`RR7X|n!`y*=SokB$b*x+e{nN0kV4Kk(dP9qDZ zFl{Rw73`7WyjnaJexl18aP2>g4~pM+3SP3vO-_h_z?bt6-0&lX4O^YD<>D$jp;*teZ{?(!1jO3 z-Wysl%bK}qtztwa6=MNq#)8AxU@%YXH4K9ZC<# zUd$?sd2ZT=g9uD^4MK0zmb#&E6alU%u=!3<+vq3)+G4&)RP+z_6{*3Tgis1dG`HG` zPW+g0(vd&dh&Oic0 zA*aF@qcNdoQdNZI12?R-6T5i!)lQuftLPr}T}pT9yDn$Jmve)&T3bC3{9ge4KT)KA z+RG9b2ZH|*CC^!a#$PrdK5Zv1swlxO+~g{}-YiOx_$=cRZ0t`Ly(9|19z4{HsfYFm zabeT%#GF-H4A?jZ0x(}!c-vdjA@Lu@`+x`VP)>%2Hk5D69p*;1{0vJA3Aw#(bdEo! z5Ml(K*}FrH^u9veF3b-miYY{Xs_l*yf=2}c*uq*B1^~654tP`-i(|X6q9}a@5PT{O zKo7KB4zcNB(f#3^4AV_WSGYj2x(csrp#+`XGA74Q0N8cZFrf)%a3)ZqJbwqpD@wCe zD{-SdyKxcSRM5o386A&^8P9fVQ@{SAV3yf;1m8qVk|jEImKuw7`D&(^BR7i2hi4{> z)Ay$NefxFWOHn9N$>N=&U_@!o3D6uYrmP>36)MFPkB=uuCVh+)qk~bq_Zm!wRz|^c zBco<{LPo>#f-d>R?J5$BQ)^v=+r@W6eg4|H@J*`5ciW5u_)Z>~QXC&8Ps<;X9MdxM zk(&8cX>TbERWQST3)HC4#!i?!k7_d z4W}vhR8+Y;WOE41yO4cN`w(x7ZN1OLlAt3fWuncKU@QQ+HSn*XkD8WeCXohUBE%v18KDv=wC7?xa~$g-B5yUT3&e?$!SQ0i zrlk0->9yWKSoFeV;Kw^<@Lpj8@H6F%MZt?{q0Fzhn2u2T2j?iLk)P=DW}J`^ z{sH3Pvng9e?N>3;<}q~#tUU3|#lea8@Bss|?e4A^kysoYAiD1F>l1DN*3lzsT?5Y9 zIP3mg`Y7>o_oQ}WT5+)7ZACo?MYI{xj&<4S;0iJK_71(oRbzq=N^g)9o|hx}_#ydR zt_7cM<-_t|hl0SUIrVpq4VIbWla~Sic4uO5zh@2lB&lC|`i9>0$Cx-i*xPd>E~{4l z%9o?o6Yp|>^-o>j#}YforpAlXx&5U8^qUR6dzcl%JPD(bPsXPDU7sX~yW92dC3dGH zLelh;hzdA#T&iEBCjl-0RJ-1pp6wXzMo~8*nBj_VD~7f2-OH1S31BUtGJ+ZAU1EhR zHF?`LIIQ1G6Pd&>24uLB+KRV9h>)mt@24OnDq7wV1BVaDG~>m8W+e53wfyI0{a1^{ zlY&Rg5%sx~d6|b#dJ7eJ{#udvAIu#`OM;0JMeo2-xvB0v7;#e1D@Mg7`$K6)YKvcG z$N%bAS-baI{Ib`S8W~M1Ybs0zE~-f>P742SYxf$DxyGjyKcg{*jL!8&?UNgO%T8-5 zzWvvKzO_MI`%F6S75?L6nWy>k)30T$TrU4~vMV-3=Qjh7o)5KZ32;UJoD1!}#)st&`LrCYbV-xbVq zCUEy(&R!wQODjbjk8+dSbX8(l50*6iq5m5cF`d|B@D_aYhtBnum7_{#Ogh_gRmo*o zG@7sizeT0@7GzD&yzWTsNAYFYIjk|PY>r=Pqu^=8SIG3NrFCOWXV%vo0woS($X~K& zT|cz=%n~%2(@dTXKOO_k6kdSGDCS;1~EBa`?qUAn0)%#UPKU1hWIf&g(n5T!f7uzohCM7y=L^|5|NfM!a zPlx`IS0!CmtEVOjbeYLlcrq@CjonuSKaI@M0@ME7NO7xqc2T4xj@=P6Q~Ys8@X8Qg zTJ*=S-_vCktue9cN1jbG=-)vuTtY-7fcoj!5))HNek&7VK-O008TKTAmOzo2~eoGa(| zAC%r7F4EFyvO^pIp&ywQ>@HjbJnhBbX9eGp3@gMN-x|Xz#AD6mZPA}}qz+vQ7~5FQ z*ht4V=fmHcrfcIJ*{02imq^ikEJb4%UhgVQxCsI=8Rf-N9u`xUz@=F8$@NzR4{1JG zQX2FN7|y1MHOOH%b45W6>?4_fROM4X#9C&Pc(XLvTkQO4j%8*_nCL%ljzQ4zXAlhc zsOUcjtnH*o{3X`&JNv?XCH-eH@t!X+S4@!HciZ!Rf16p!fJ(=YpFf3oG3RG7ojt=L zbs|pniT0v#PSEf91izR*V#R}2d-3$oV*H-fXjb-~*>iE0hnGULUnrhsd;AS(zX$E7 zMfV$GGCb3hv-ks|pU6wt@MY_z#(hjS&5~mF7+2CUYCNpB|=gkj}H$xlH&jmWlCV2nl zonm?`%lK{It=q{jNcWshDKomT8aSrYSDAudDn3B>9?Q7&4|U4vm+jKe1nm}o;Yo&9 zfmtPqNkfuXi;J#vXNkO@$6WIrNq;HtO^v zoqnQIG6kLtZxT~-I;QbDP0}eDI_uMQN}VCgWO+=pb(*Ksp(+)RRRk+TzvdO;&3K+E z?%?Z8ajt)3iq5!b!v!_7oTfoHRF?~xg1%grE106+W?jCKDf$n{2@K3jk9@*7m$~Wb z+3D$9gYy!t;NV=jhZ3UZ8Pi~nO!^p|anx)VCO6&z`GFa@X_~vAybi)qyYWN2bSZB8 zKW$&gs>moU=#o-QQOQV;d|NVarl)sj-Q=%~Y^J8JWj+Oh)$V6F^alL=+T)t>0WJc* z%|GFwAG*ctg~7DYXAr0$T0Mxwst09Qv|7dnms}-5v^t0zWNigk3yW4agV-9$d+CT) z?LY(3Y7!bCTJ7P8kDy(PR*$e%iB`Yk&|%T40i!~+`X$;ut2wCk5Ay_0GiD^2Xv`ZJ zqPEsDylYXkzLxHjo=gzCtZz>|aDFNw*(#&<}fik<8`#5PdyasI#nCs0%@c3VdIO zo*d3|7wN1}4;ST~m>KvoV)#2nW6W`!U~R2!cxHmyv_`oqNt1(oVENGZPJ_HQV(F$;d{H7y=xC>RDcEsNBW5(DP4>YFZmz zuaRs54v#TO7Q@v6u4+B+=Jl?pP-kwY)ylPkmLYs1zD+1Z&B|a^7u-ek$4~by2zBlrRTBz_4WBfjXgH=^(-ikq2UA3LRdBHQwkjAa z9;*so(AwU{)_b>&6rWcGGsOjKz}c^_3APuZbwQt)yDHdAEWW)%d(kvAm?VC;DmY9$ zR2^(9a;^$ih^MYX?&2DJO{fmWiOH+6bF!{F*v6VYdD>X<=heX>;!ia}TcoVP2^?F6 z;Rk)1)Gz9yHoOYVb5EWnhOEY6x2z4uhvDla-YX93a2N!kIpeHcGiGbi-2=pz z>x1n*%gX0e%@My}AM7DEUFtq4w&Z%&iA`RJ6njg9N#-yyry!=c@PBxL%^!&TjKTMG zam)k5+@T*{5bx;+QDux+vDe#Pq@+XWY79bwd99f92dqL0Q6XiS-Qu0iG3~|fe|GYF zy7On@C^*sH6R&KE=>9PjoSA6`LXy_iLS9>?wsn>VacMUmyU-RVYjLT!sU4letnK$H zYI8OO(>g8!b(>GFc+2#~>6a09WC=e!#&p*2`4M7SIZVX;0wtRpH zRDWFT!M@DJrr(1V9M1pq?f!;=xE1olpKhXI8NHA)&&NUus{pCk|kUZ>aUv`(i|u0%ho z3fTWwI<42~3n~p6zto&gbommUl4X&e zx>KfP2u!)<<7x-_Wv8x?D5z*4AQB1wN2hP;^fR4)sZ$G+H|hL3?WWT#oep9OIWM5o ze5P1gQR~Eh)0l>knXfBW>a>zRe0^9i1x=)Q?6S;vf%ScKnyu3u zol1ce?S;C`d0`?YPiH`sfm5RP>r(lx%W(NiZv)_;2^0T z43%!&aQQx z>gF;f`byF1jPxjF{yUL=LrR^Vu_xM$1!kEyJHO)io?DFLd*Vi2bK1y=ZS;+8TI)X5 z)@>C;S~^`7HQXTs0~+#Veg@h3bSZ6Dn=0I=fMW)vbwaMiWc4`|lhJ@u%;1_I2-%eyvIbSezhRNhfoQ)zZLQFU3@nu@r>_SlHX3@bE^L+Xmxz~1QP z)4Q{qZ&EnwP~g2SpM2_D__Z~yF|u4oo7R|Fo?~a%)Kv5tH0^YcY}8jYSCevs1Y?FU z=%(zEr;ID%A#i$A^i6Aa;7!2a{eBwvDP!f#1S2cykeOj*oY>RyWYs}=vb>ngfrQ?1 z@xYngWkvU>IoqzDvTDV$uv6j48OI~bh&P3uqWF$>^Oxr+5h*1Lb<(y~@AEh7hQk2!z? zUn~bc5H)b{XwzCVE8(astM^eO%Q$+Wr06mZN5b#NkPFzJvMwdW%5-?ptWPagC!tRP zHJyt6s_B%1=6{e2BAK?US3-&#hwS`oHX{kw-H# zeqMNDPpJJ!Tqkbrnu^q7qX(DKH6U_oOj)B^UAlG0)%=C4y$lZ3so2NU#FeSutg&>B zTVAU_eD}6IskTq}6YM<(^r3Gtm9A`B(^KAu8u`rAih=!5oLXu0$WV`CO;_DIvl8{X zE>+iczS^n7yHjIibv=r-;;lVA851L2ju&)Cgv>N zcnz_bA6OsLqCRpF>TYb5zW}~?O>5NAjI54Fas3?Jrw5OIlWje)^Dgs+QhRsN1FHUQ zbbp&Ck?bG5!| zKdyAo+3Lu& z6Y|#*r{4(gG2ZCT6({!0#4lP+KG78JtaB;!0|f6-7scm~+bf?to?B-?1w8+y8?Rz2 zrjD7IhSa1H{oEsOFz72guW@BfKBk_qySQPcldHkY%Q;n@*39+I=FAF~@aQVGhel(N zs|)0hp);Olr;4VU9R`0+4d7xtwIumU!PBxjwHP(wQ`#qgY)v)h;HH&lYYJ-a81dJa z)xo2`d5YCFaJ84G>in!DFJWj6V-VGv+|J(o#MiaU+8+lg4jZT6zD~Gaex4lCa^msYZ}(r#ogr-k3N`sU*w4bnBw^_ zH?#-Gg*<#>58jVZalU+x&UD+7*o-D_l~$cdCtiSN!FUaES7uflS#6FLR6qZvg}c$T zvY^_1svB~c^^Sduhd@W!nbjc^L^WZe8ck$oS(3t{`+{hCteZEsqo zo^!0ck4;fbreID%Wm739s55vJW(I!`5q|JQM@)4t-d`x{KlMVP@g|m^&!;Fw{pDGx z{s4LdtMdp@Kxbb7y@GX+)Lp3dfDXMQ3}&ITe~F|wU?FH_Enx#dlt}tT2EK-eSYvrc zVijtA!t^j>IbOr8?YRO`u;dHDpotJYCTCov|DB`F`zEkAtbQa^z^G@)lJj^ z_P z!b=x*mK~3)^wv6fM_WB;sPT60h^{1Wf9!S#cYG}f`*q7l3cD3X2-OauX z=a_CE#C3GHb9)&^54%6EHN!py#c!s)3Ew^KRNT;B_E79P^|rsnRrawL;JdFq43GT+ zyGq=1OE7s{cUBmBSw7QurG%~;RVCK z2AA=oVIRSL|E*ysA$iHL8}N|-XxO8>h@Wl^b_#jWYlfYIj(Xg+@Eqn*ZL-MX+PYB@!f6uTVL64J$-4~DaeOwcg4-EUs9>53y z4UY6T90JehW5fPmy!d}N><^)~`NXiNVeHTF+Jtc5VxIUCZ@Bzi^G@@aYInz8#P++Kc6V$MF4(-=d`-1mv7_03k9k6tcUo~{OAK>oH?B^9Yttd1K$hbwgo&Td+1X4_9m6Z~h*qoOq-8lv#myGPa)M?~{369y9}n zx!+7gcWnK{PWPgCKo{-Uad@T723?Ggn>KQ)VLq*k{_jpny?OVK*o$D!QO3=oeR1*2NVC6RXEN9;xx*05USv z>uRHpEf3UU{!nkIS9Nfl+ud)f=X9_t@Nhn2oex$QRe7Fg`JG`-QFZp!XhUzv$M!^{ zHM*eG@TN(~A86mk`NqK=Rd&2L!*@CIGjlryM#BTWnLakO_8a!Qx0$a3(N^vv75KR^ z!p(itbr^oce)neiI2x?n4Jt4nBhK4G(r;I~-@Pq;cj)*XDzG0d=FOJ)BPtLXMFTlL zzE;7?J*ooNW3YHzi9)Rzn8f(jzK3-DZZq&CGsuk^Fat9fpXYnhO>YK%U;*3sp4H)M zD{w92^L;Pq@Nz5A3$EjB>)WlvwN@ms3C`nf=X+fX_E~{WY_;~1LA4zi3-|PPknkcq zu$}rHeV=LlrFP&1I^EkTs_zNB%=pf}pLP5qPoPmJgu6uJy@9tG-__?sJ<+1M-oT^n zAt;C{_yQkLp_{LjtKbU^bvFI3=%>gWOugP7zG9R=XnQa9U55D3Qp^J0k-AeuBk^Bq z?`7JKkx*-S&-EQgTLiQhl<0kqq;2p9Z{KKcD)1)TtDl6?!NW1|z5OM;RKZUWF7^G; z40=}XG8Jfq+1iVh!!aWDOwt3(3fx!JvY+;pGF=oaw?+ldVn!E;A$WrJlz|ctPbkC$ z=p7{Swe%F{A=ruh8B>P$B9ZS^fj==kM8f-2pa9e*d5Yb*Y%GX{SU1bI?%Y)KrF|y7K zWM9cZ`HLn1R2r6~{_=qj>2!Uw>_Hvl&V7czEefdgTNOFM?Ng zr(mK8mWmr!L`!J}yf`KCPLg=I^$dFHWC^db0_Aj~Dbp=EaDBuIyvb&{N)$F*fp-|5CgB>(b@Quzm+A!Dtw0u=b-KjYTCSVVkPLTQ z0Y3NWohk8qEZ56t`Nr$?d#ylcOkv*H67M-_1&*dUZ`@zhvh@kpWR4g*V+DR?Q_uBX zr4wR&{v*u^JW$jUPcgKApeQ>vnFq`3eRt~UT5q7Tt#kPUMXyBOXAdsaqo!#d8qfCi zQukrR_!H66%HIa_tLgs}y2bW?jji9`7~?D1|2R6bTKQikOn)(ay4v=SCj9=b>h}0cn)~Uhdt*Jq6dQ zUc|i<$Oa~0BT&wrqfsFP{e?RyGQ&{}h0Un&}Y9uc~ zq}f*Oz=0+C91K3Q9j+~5UwN?KNj;1fYx*`aQf6PgY1 zG@Z{#?uFhq2dP)lfK4wzLS;Uv&O*`rQ_;+Ze?KM*<^K`q9Hze!Ck`XIJB~}{ql$m{ zZ2Bq>{^n<@k}2k*q=x@@*y0b%7`vwb@7N-R@QR_Ay{mriCx74~E zt+mvh<_@gamI+P@~@++|3z#q|NGe5{%^4LjPfU=Apy~G-hsPtd(^Th1$rc^DMatM6eEES2)?;Ny^IY1=M zsdK=FnH%Xlv$PJoVUE=o=R4^;*u>XL%5^FBM5+N*>0`uh-+(^k|eNgJo?tVe&M? zT&ZxQ!$UKIzZ=0K~wJbfeWrF0@Z1O+qG$_wri|YxvBl}OTVcnW--J$)y zi0X&-2d<=UXy5i2hIU)n$k@OF9LBU}e(Dwg=0CUk)4VSC7j8;Dv{~+>))*#Z+R&|R z_Tz4{Oh4wHM02;bj!E?xeN{58AEU2}M32!3>%cByW_pnF)w|}`Is=sAN9z}wT8Xib zw}ZWdp0V9VzX$WG`HL&Dv>)$gK}_4#(Ie?g97|1)E3rJ%=6|<%y&_{H%!VRC9y=1X zhLL$bCUM*R-s+0@G-j(CoyQe3$z~#yC&RuTJLw%c9-2#D+6gvu3T)v@ly>2#I775_ zB{+__J>Jw_&D_tyCbSPO8Zlc-?s{2LGh}Z>R2nnUx&HzkGfyW%?p^KA5s^MF55jJ) zI@=13vfI%OI?Zb z!BTn~XWs@al0TZZXfQOBBjAEMTNm25(bh1Iu_2N$n+fxH3>YdB_BLH-ko_nP(OR>K z(Mc)fuWS(QQhd6#q7%Y}xVjAmY z<|e1HJZ5glNIu4??Gl|MDm~u51V39{Uz+F^E5?^5yOJ1Rnj$*dmm=DkrioJ2na0|) zU^2tTCiECRW~Np!GM`1sZ1W0x31ZTiEvui*2ei!DIt|LRz)ryYlRkxgaDy1u2hX;Y z-0VsMUN+@ui;lX~6=6kfh~~D1bsUNH2uy_1G`I5W4p$xI$>(<2;7HLgUDBo=y8#6CnzG#84{0k^xB zGCeRGGVix@ku2~x9wZ*rHGnDCUDoMNp!aBZc}Rl(G*$%Dej3XGw=t5N=fp<6fszoQk5%sk9^wpnZMMobzCLjOl^EatK4fKJqW7Y4oM@8(0YtTYte z-(w47bB(O_IL+`Ex*?TyH9Fbf(+%NSy~$AWpS2HmTRZ|URS8#hg9ZP`5E%X+F|{av z0rsJJCtM_9W-4NvpTmoki3!y=GP8UnOSp-<%I%KGaXVn1sqY(^4R zq_NwP;rT4q%4Ry0oHYt#JmH=WIuyzp9zf_mH^YpqX*mep?-nN0NNfTnej9&;s#++? zL(HC8q-I0xvD;vq$_Xg7s}4WKLiJ-E9*As&T8k1GRDtPZ5$g}+v%&He8|*<&G=@Fj zf)8F(g4hUn&!+#sk82y>(e*|ua$oBuAj@ZW?6U;XO=Uyg$53ZpCkA2U?2Qd#D{tM8i%6}7j z6UBN3H3&TUK4R@Q@P)vxqflx7E?g!#@M<}_FKZB*EwG0!&IZmwo`E;qkeziEQ}5OO zk2yE140CVbZ8>E!?5@;(rxA=a|2y0wFL3A$8oZ2JA99xlpFocV4*yAqlC$nc`2&AG zphKao8J!S1a#V*hvO=&C_>?YX=4NJ%M_mF(zh)?so0WAAj^}~TztfR9Mk-65$_Y00 z1MGS1j~V8#gH-;;OtraTB~t17_PNaU*eK{UzZ`v&6*y6Wx%R2S_hw`k3b)G0{gv1eeL%2OfxF7$5TXA9xX+u+!V0b9L}K%h7J zB;eKiXs18|YwuToLKNq#{cN_7(jzy5!(Ce>4K#Jb7)~CWC%1_oLz`di)y$StM)Kv% zF-t`d5wrtsl`jV~ObJer0tI^CNKJ&qW2fqE2DYg@*@SLbolD&|Xrw@2cYk|h_+Ow@ z4Mc>IT8gd5KF!u1qIav1Ns0=TtH%*czZ!?3z%X4(<(@%wNr7azNc8b+F?B|WM9+?^ zD7jc9?%_iPE>bVSV#dYTL_+;BegY%4hLQON0$G7pY6eb;1M@H}0=ar0t(f)=io@pH z$|mTk_%~%ZZdwai;aNVXh(MXTg(uUw$$<`RlYxo@73U0Ttb&=F=C=K4<@RXPfZ~5- z17jqd9=H{QCoo=u8G*Af{sR?CW}3i{RK8MzaEB`7<*~2R+iGl6|AHcVY)&J|yt)yX zsw>*kww~nOy6m%1WNQLXe_izG{GZWGsz|h}^1r}vQQ>G-`Mgr4dP#7a(WVPe zP%jMB<&0^~;1g0R8x55AI*f=RyTHYb} zlsO^5D09VC`9H%u&58ii^0Dw#_Hk}zDnd>`HyNs_pAJy>)){l^^3J^;J!EdI*PLb| zf3>?#bz_}sn^*l%-4)Q+C|OK&v#|&2iuc9cO6{uC&YcW5F`G2fMK}wZc@{J~=0!D| zG?MD)t%V8{IgjFX0!Hq_eDuG0iJOvzuV%`N>r!44O=;w=K*r`8SCg)Fn3{LiX|9QC z=CwrsKvB=`@QmEn&@o?0s%xLHjfC5y2_uM#c24fjHciqszM#X1CL94`k+=?H4th zPqPuLR3Ca+q)yvdfzfzqAC~!Hq5K$$DpHqvv_5j;rIUHOK37QMiTMw+dSi7`bHxm! zlLH&p;)b?H($<@Gwie^S%kdXAwxpr4TkDN2V;5|$H&%**ZJ;rKyJ)qx)KyEDc-%F*w%N*pR6m?&vk{m8nd+ZtJXDF%+3D;Tgx!-YohCqLjFuaJ|FIM zpCek6fI=RvGn8+-Wvt56Dcd3?3v~_LNMS0l`noBLk@^@@Hh~Yg-Q72u5~^)+;%8mw zs#ZcZ9KiXH8d;}%oymPn?RjG`@mtrMyx)La@-Bt4wZL>6W}1=8Lw;v<9(vN+WGenr z#|{>Qp=4kJ{k5Q{Bcq>>Yq+L={oB2WE3bv0gl~ zby3MIeYRCM6!t(rkB99ob(XU&w@;?!>(sfHn|fwG&u6VXYYUQKSmpDa%4#FQDtDmd zTO4ENia8P26*{;VYgf!g)|cYU+FDzmHGQ^dm zaZWNGB(yeLy3W&}w3~(|qH=EQY>q@Lk@o;6vn>{Xso_|k_ZTa&RSZ|=@4>;vs?paa z(VJbT7}m4V3L=-4KE%H1=0YC~A+fr@E|)j!ipx3M+G{ZiEAL^RjqpcF2NmoD`TMSc zLKvu^fsg78ye|f-@?NA1AG8=n_fO^htq!Uv1nG}%a(zO>uq(`NOnf{lm&f zU0KO{c>T%x$#VUCDl8r0fx~O-_Ck8Y=Gj(Noh7dwZFoH-eEO;eYLc%9Oo9ZfVCXgz zhJy8mM$pjCIzvG*6q)7@u24fuP3tUmQI)K6D_imI89xi~T~BL)&e00CiWV#X7(Cd@ zwW&+r+sm|hHcy(}LHL;mf&p%^%3vsRik2qSSsGwRCqsQ$Jl~e%Vm?m=tupr_6DGs+ zc?`Y4y+n!0uwVlYTk3DVnJ}bO(rd8XZ3vF*jrwrTP^#OFnBNk|^n`OMmB<pR@6^r$}&N16E6s+s8m(rb^0aZ z{IiR~Dtv*o)I2QmBN9f}GwK%m za5z^t>K-eIJ}vHRW@CIsmjbd=v5!dr*Ekm1O`Wgz7u7F3^xI|Q;8IYWmrQnX_ieJf z-d|{w;f4zm{niMlZWTze(#{Ko%eC^ncI0Sx-zLZD{e?C;p`np( zy53C8$KXlUoh2bLs&z@o486b5cJ8XM^YDOu!v*y88cqeSdIss%ex9y9PkC7h@;|l& zoL1*g!cBGlWRBinXp^lQR^qqK`9ER=Q>88mndk1?Bn~IKI%J3cR1)!sWK!D4COOHn zO~|wUlac>MbsDU&r8`zSGnsUqd!9|Y#uwVn{*$BsH%jsU_Y4|1&RhRydqxjD87CPe z4(EEzkgf+Ww6zES8z<97I=BflNSV`Y()HSf+H1QvG}0k3q zC<)2(f0Iz>IMY?mAZJTLa{j+bs3#1`G5NoeqfS`p=8{ahbN@U)S^RHu)I}ZVCd?ow zxch#xvSGsC&MIfS%Ku^M*8i|5AWvL*pU1QH& z5_P-A=h?skbaC6c`DBoizrTaid0)&q<9{nrgWBnwIB4OY8Dy2a?+{{8mnZ62*7`-G6Ie{B|c+BUAZq83@7jXi6D)q%`uwnh{M5M63(LiZqw-RT=P=@Dz6(9PxLYjYN?|`?iKg?y z?L7jKVIqrGc8`RkHhECvCu*zE4c0XdU5=k97q~%v5-+^**tm~Zi5l8Gf@LuSk>+;Qu#VjZtO&cYp5s&k}3g`CAF>qD zw6^YuSq4kpa&vtsZZ%iun_1?$*?mj<8^**LvnP$6cy(cyO8h_9z!FGf=Z>$Kh>+== zoT!>w6AjCGsI4cs`e@O3EMUL?MJ%Q{=V(!Gt$F=5f@5jv9QIB)n$WsG!!MN zD+h0W3O{x0)t-gyqB(|XEAK#T&0=iuGYK1SF1IVVnaxd}$z@}0Gn&C$Aubc^$|6zW zry(`1H?)bk3589vWf= z`~x3qW%}9Cb!nGaYU-##ofp@~Cp3uPVyOtLv(akuKr7R35cjpEE}YW`#j^C~PF=ua z@6@;={A{Tq1wB76xzI{@VRL+wJZ`Hiry}NoRdK0y*=)wl_pPLe`zF2mGM};4ykm#* zR<@2yvdN>O>*hBo=L;TnA+uN+r@!B$hFthqy!3A#HJCNIjGNBg7ULh2b%9&-%E|R5 z`NgBGW&>aEJUGtsgLry3FtA|Ms8ORYvJ#3fEa9+mTWKEmtl&|NN{&blCo4Sg+|rWh zkgMyR`+aI^L1gfilcp57%Q)9(z163dmfYND(Vz=p!W zP5B_sjehc}TmBlSx5TeTUo>}4T(wt0`WxXxepS9{@MV?f;@h`dfu5Y|i~EXS4ZZC3 zuJcUKwug@uO*H+(h7TBa$$-*s&gKWgY0iW%u}IJImm%nt5NCgdAC!sTV2!{*i+iPP z8}&`mZnbU5cSUoRbM#cvgU*BB7k%#OJFH*%FlQFCto@;=Yr?b5!j~y$xeAYTw!UY@ z9uK(6Ve+iJpi{lNbK5&zC;zd2KUAPLa%j<9t$|| zzn~Y1F4-MhW1d7tGp50d{)IuFl*a0f_!oNrrhulA=cs1kU<6&G7Y0B7zivZcJVa6S z=ilVjKrgP2WB$Laq|`C(pVrYC>QQd>*~f$aMfG{Q9&Kvs4f_{*Ra#H4wazs_bD(;S zUTPik*e{6Ev<50@A{+MAOU;oF%I@ox-rApBE< z{IwEekb0N?vy3Yn>M`T1qk8RQGw!Dq>nEn@OJ%sSex9>pN#|giGzRm!ENa7z>h({f zU@`jP?}E7ER%jD?KD@H7p=tZ#I@{6I;GTvCSPwJWBeB(p>k#UVtFz~<$mty%AJeBZ z>Y`$@a+@~Rsc7X=?Iy8V6*epqi|+ceu2Xuvfs0)OPD*y~x~8Pzp><`@QN3e|S05Eq zJpTTSX-b-yTW>;5>=R586ZA&6jbdMU;LNeZ8O3hqWeFdEb7$xpIRF}ar|^-fByKYDbugKa7M+XsM%pD z;Wp9alas=2qx%Jo!y%_plW@}pg2$4>=`n&dXZ9~e88L#8b5&Y6sexd_mqn>Dg4WId zY59gtx@OL_Dra=daHjL{R&2U858tx7AZ*)w3x`v(HJt4XJcVVS`)&=l3``q3XVRQW z^)Zjx;ba}-;4C8K1fk=!_k@G)-j60^Oy?{tfZi+3!%sN6 z^nsbkyt zI4qRvGVl@H*p>|KsBg*K7z>xgSt#(KtlGk`I170(7TUyESQ=-c8W!f$g0tt3J(4>Y zB3Ta9S^2gx$)1l(cA6RE<&vRLaa_hDU?D>+w2!gyWt@dFct)`<`d{NLOpCFAKkw9a zKqk5@w)qypLZ!BlhM3sqTLcSHC%`{N>MWGRSvU?0x&xejMZFtN1qHBIqK#L^8Q&38 zyn-0xE8~pMtg~=eoP`517I->}`s;DBE6&1ZSQx=FblVwc;W#WrM;Z^=Q43#2EjTyc zmX_U{uUUv~moqWR_>&`=EDeqr+p@(0oSf*&rywTQLgLQ)!NC@eTHs)awO}`jI%Z*< zh0(AOEjsUAMJ-H?voHb{ra40^J)z<_3)5mO6vtRt8)u;w7PN=;S`%ksL5zhyF&6g4 zS-?v6-}X%Jwl^;MvY6y0G0ANV3f&0K6MH*n_r_8L4ccyPOtOA4$+|_8LBTt77Z!4m@(O$h##s1FEI_0`i(p|Jhp&9twETP=XYV-d?ZLGG+8c~- zv{g>H_HeE*pL5PZ^XV5Wq$xCG)E;B|!wpKE8>f1Ly?>4~UvmiWg-vzM4}ogbd~%$L zB^UBme&0LIVDCgk#g3Z1FEPm?JC<;0j0r5s(4Z7eV1K@AB0J8++T(_C1V?e27#?Gy zXPk*8ICSlG_CIO|Cv=N5vET$MBBi)E#zbE+!O4uD;g=c4qn+G+ZrM)!4vy11eT(zd zn`YCr%i@YKZ86(&#nc|bvoDS-!ts;!wLmU)Z8;fwIEc=KNPjlp;l57duXkV(L0ubX zT&YTK9DdX==$d1o^@ww0b;~S!3;r$WeDb@jpfmHfb~Dp>O^Aif!WR$z89l)aXMbu! z$287Yj3RMkK}QujYP+vv+659dLPvRZ)L{3mV5i!J@p3bXpTKx$)?H?>1^zA>^YQDl z(>e=aIxEImK_{<0k}gHKE?1}9Tfa#fFi+xA97<@Uy;26o$v-M&yx?--}tQAdWIZ&1ym&T)~QbtD_! z{kZYprpIiw)YN`bag95tfOYooaeV-LmT{@Jm|Q32k)i%$ z8S&wf^^w@aAM-~Uo6yVr&`1gjyj^;or`M_YJre!-SEa+527j_eKTOjaNA>6!PQ_2p z0X)jfhw~iZ?cVD`9$SDpq3;I^Vq8BReuiPJ#PraaW^S!X-Lf zVDSBVG~y2>qgZPLsSrn#e zg<^w?8bv=ez_ZEvdh{_qkud!~6~$`gk7~Q#&;w!WbNr`b>|7ETf1|{6_DVInl^TyV z5S(YcDd7cLq0IQIp#lA02^+7Cs&ZyrWoHHRD)5flhF2gR)zS{>%Z$!FR=9~jdRfsK zWa5IDzB`!kQ&BT#?pL^dcXkG@Ozlh#Cpg!Cg==lNZP>nXgA0ewjaT4BwBu94P2Hr| zCgB>{-O1SSQlXplzT|L62b)IDtY3;Uoi^XV@VSk{9(`%hx#bFv1bJalr)_b;^lK)~ zuIgVoe){xD(~P+5pw3-C7G*oXc7=iQ-Emjk-3x%OKwtcu+#O}m7yt57u%|En zo%b>J^u<4Kk8rBK#<%jezS%3i=XP~=cMU)9bUcB3qchLoO>JL&S>*FxIR2U{ypH!o zk8qAN18wD06o$`FVrgU9m1Y=N^P8TV&Hh2dUK>R)>2t^Br6nsY-z_-yCT1-zVC z5YBggEC@S}zKFQIJ6dFHASnhUg+mcoFnf}HWXAh?#sNhQ#&K3zV;9VLFWoS8?EfEk)o3?oOFCu9>- zu3KoEw9s~3=A|6zT7q@&Uqi0Nv2rBV6*#+It_y&JWEsP&5>Il%JGA55%~w{5;%tLk{x*Jit=aOziS6x;5yuH0XYi=YU^8I7{f2QT_P=o zbtcefRHPt}3a`k2+Yx371FzK=5Uq_huBCurQ--mb4>Em#VU$MO!MQprZv@_yvrWW% zsrNhlh9Xh=6!@RsNfQCmU}ZWyB}LwkrOHLF3y1^*Bs@@fsc?*NqHv~gj_@Yo65%T0 zeaK%I;9=q8!mYxc!ac%wg-3)ZglB|&ijy_dZzBfz&^*H-VKZTlFv10GsGwg*40e}r zSg7C82YIQ42MWuDmk9Mc`=B>L!j;15LcULy`CKQgb{R1ii(r}XZs8iCeyJZ4u9xud zg`0)X33muz67CVcEj%FnPGxgcZW6!kNOkLf%1Pfo>8m72YXaCA?R-4va9t<05!U z$lrLB?-0H$d_%Zj$k!TE?_=TT!mot9g~Rxtg!m(q4krkcEsQ@Zq>F&>x@EYHkav0* z=7Yqfew`uMSHfk&A;L?9R|qSFR|#heuN79~bXpr;B7!@G_XyVt9})guxJAe_Zx*ap z_@3~n@H?SpyLv%kuCPZ$cKQp43nvP165cIL_qc{S3C|G@6mn&H7U&+~df_v|mxOv{ zQs_mFh~R{utIo^@Mhsk z;UmIlgf9!<6@Er?{C_6`3&&(;6cpwP`wNE)Ckn3--Yi@xd_?$+aIf&N@VM{{sK?|x2_7x6_$j-&WvBD|BYlI7hON1+g4+tL-J}rDv_?qy5@I&DdVdQh!IWGKGcv|?2 z(39-eFh$r>m?!KYED#n6`wPp3mk39@#KRRLm?E4byh*rJc&Bic@IK+=!W!WV!d=3* zgdYlz2)Smu`2hO=xCp)z;;c~jrB~Qk*i4usY%A;`ED@e394s6r)GOV>N5)9Fg5>z0 zDuS89dBSBvu0TQO+AMrYctH5Qun~TlP_KostFW(df{wnJza?#(z%{oG-jgc%5*G@P6S|;cnsk!ehdJ2)Sq@GwLQBCLAlA z#<%!T;RfMD!smp0gdYlz3mfAyCDSz%76=CjFBMJ^>eb4j??`x)F!GY@91wmlY?R?< z&_dW%ST39_oG*M#_@eL);RnJWg-Q5{#e(O!j2PWTP%4}xoGn}`ykGdVaF_61;a`M* z7iKhbGt%#HK!)c?xLi0v6a9a)2!1DgQn*+6f$($T_d>h5n?atimvE5q3gHaljlze8 zPm>(~T)~e`vS0X-@Jr#3LVuR47Zhd-+Xy=fy9;{@FA!cToFu#k)Z_nQ5o{7ZFMLh- zo{+C+VnM$Vp4Gw)_Z40!;E z@D<@+;X&bN!Y_m;gg>;9@vmCCB~BD(2=j%7!hXV`LcZ*SHLVoR6)qCqEnFvjO1MM# zV?=iBY}Zh-u%)n*@N8k3@Dkx1VYToM;acI7!WV>}3x5(u+UB?!_YjU1&Jx}%yhr$) z@MYmX;a`Qn2phL@?dA!42>S_#x{Mg(M6gV_PPj$5Pk31Pjqr@n-x?X=$4jCxnYCrRi%EAg)g_mk-F_k}MB@9a(8_c58t2LQ z&!PYcItdHOd|Ve47Lzc1p2S}w97DFpMJM585_&TwJ|etJ=#ZTZ<38bodFX#8ctRAO z7w#gvVrmw?PD1ZpiT_M^g6xi(3ja<*PqhJ2p%h^z*%PN`!d4{oIz~j{Y~euRFfxp* z*uu+6B&d-1D&Ye19K)y|+?u3nO}MO(b|t6y6v9MX1mXtVtr- zAI>NYkx184;yVck3rCOxaM4;gnuPvjiJ#*#Vk{EDO5u9pMzRcNy}}w22L2%NZwU_z zzZCu?wAw;{5MGfZY(ye`8i@+!X`=u6mPQIn$RW7WDJ&zAV3@>@7tRz`3zw0@afd{> zibT2xBz}`{hj6d(5E;1?OQv!MJVGMj-$da@VM05|QNR@Pa@0VWNkTtY;=2p`3d@D# zgwx0|7#+eYP>=r`MBxtMTH!`v4LJcTW(s$Z$oN%>e^2g{#S#hHwsK z9RJ8@7X{Z~ybE6!#dk&VsPH&B*Dy{BPmwVAi^L~&aP2iE=i~HT*ph@^JBimXwm`lE zA`~nzj0=PpisGfBI9WJHxJbBC_^|L9;U7s<>Sf_;Br@JF@kfMwKOrj~!Od~K<0o&z zI2UrEM<#40@%pVdND!9r`NB!UtI1pNj$Gj!66qrnf2Z(K;U;n^^55d_7|)VO@JCU2 zTXoV*=PFFZv;{}&PkYm9lF%o27M_9XAb8)b#PNu)bp$D^q((L07QNjO({1GyZR z(}jykBwQ}>4+@_W{!#cQdADKwN%$^_bRS9lap6zo6qGozGj_lbc@J*G3A0Ef%$N9{ z!cyUI;Y8tF;myKz!cF8O&JABDURs(U%f*1@7?3ekWmpP~Y)_yja5eju*mZ5*|t7^i1FB3c+zIM4)eVA!4S4^{p<1 z7f85TxKy}IxJtN2xK60=bRm5W!#K~|F02*qCL@U0D}sH(L&C$tqrzjtlfqNNGeX03 zGtzgon!ynn2K5~+Fh|1rjuyh55ROoxP$I&@5@D%O-_e3zxrFr{Erdr)cp8ZlO?@W| zoG)R0Ckx?464rOJ5MD0fRVEJ{5Udr!I^hQ4Mq!O`yKoPggO(E>5FQd95grvD7oHTJ z7M|f8OG9|ZUehncEiD}m3G>KYO#H$EVWE)E1TnrusPAYYJXpdbgd>IHgcT9l;loWd zFjH7f;uL6+aG7wqaE(yk*@E7B32zW?7S;%N2y2CVgps|nbC|^8?}+f2@VM}l@U#$r zQ`Y*nkPE;ueX=k^m?g{;@_8caah-Ua!$%B0i^G%oQel~}TsT5FS~yNvDV!#(63!P^ z3l|Bw+B|;?tP!r$ME|cB!A9X`;dbE;;cnp`;XdI3;bGws;YkudDozQ{2n~-b_mdGQ zB#Iy;%n;@X^Mv|lA@mC*92OP}2b1`9!oS^-BZZ@d6+%87#Q2$DggaFtSRkwxE)^~l zt`e>hZXogNW}~o1xLsH)+%4QI+$TKb;rNGv!y-5;JSIFTJSF6+`}~>Y7jn5bhC{+E zVUCdNwlcnxkk9on%qM@y68#oZ?39XNu&`V>j_iYDgm9X0rf|M+fpC#fbfv;i14WJxbUR#wD63OkNeQRUl`$X|KxCPH z+sQ%rmxFM(aF0;mu}1s>2_F_7(Zu*aCW7O_Q^M0izaJUk2PGenAw$9pVU93Q*hyF* z3=4~er9wVTX!3u^Be{cLo}+~o!b;&xVU=)!uv)lOxJ4|MNx#uGmc`3X_Ey!YpB)u$>U^I?zA8`4pu7v!Sp|SS}nP z94(BDlbuT8G+~u+zHljt-|EYRtAuNW>xAot8-<&N+l4!XyIn?%JtEjAJRm$u&cyH( zo)n%Eo)H?2Ts^-qQ5X_t2y=va!b0*I^nY0IU`7*`3I_|zg(HQdg%!d|;Y?wba1n`% z3`>Q}g{y>X$p{qIiC}|pqp(J}U05sJEj&Qt>ck=85#dqcap6hfX(9hG!gO{b$3J%b z*dddJAz>bgs~YWu1;RpMv9Lr~CLAmrAsi_jC#(=w=|7I33+7V*RtpyimkE~(*9g}N z*9$iYHw$ZoyUCmIq@{45@PP1eBF8@zj)>rx@VM}l@U)QcH>AET)+!W9ypCY&jpFI=FB{$C`5rNZUHRl@ZoE(C25ZWh)E z^}mr2Un}7~!o9)+!b8F%!lUFABs|5Pd+_ESq0z(*+rmU)vM@uKCCn4H6Y`}gv{xv^ zsUKe1<@AZ1)65zDRB_Kpu3?O$EMNY^-5$RM8196TNOpxkk@&3v*V4Zg(4hKEeGQ2d z=5-`aWH*pFpWIC1v~N3EhQ=TVVdRlR;65bIaSnm{oZ|=uIP@PQaRfd|;s|@1!~xLY zMU5%&8*)1QhMXyvfpCd8hha>f?a2A~QAA>{3X|y75)vb|jKoMQCzrxal!0YC;ke@{ zxDzcvE=LQH=#Ba0Jx)?N9!Fd8eYj&Jhb6*woIGJW5|?ezTJHTjvKg9N7$$L1qgYr% z=D=ZvWhA;_u&|s&SBwyjB+(_KUEEW6BuceN zh*r>jxJ-!3>%LqiTtlKy*J`3I*Kr4(yI#0~L^U=FH8sT;loxVd@OQQ343-^#X z@7ycgN5U5l2oI6)iNj7anVNiP~oN)xhAiPvNrMABz)yk5$3sc<>6Ik<@@^7+`Fj#w_brJ^CHg^j z8F>qy10t8=e|;pnWHyPeh%Dg_x?nAdrhkD%lcO~aa~+(8M6FPH9WEx(1>+=KL82>` zN_ZKGF4-*M8WP41N%$~{F49iB4*jpa7Ja3iZk;$C`b;|w!rEzaWadJ60eu2}xQ;}4 zJ(-WWSi*Zrbm>V6pCZw<8K$eRuNR|>OLQ1brLO~{uPa4CU++bq>+8740M~JK-|Ne> z2=8DRK5#_z^<`N2g5Pp8NF@7X)JRxgMTKwZtD{Iin({Ingvba4`YI@#MPJ=Scq1d= zGzY}MArj7G&}$KIlW-z^u@T`;48xi9HARF+FbtoXFZv6}31~41>(K!p|mrK09k_M;LSIQ8-gK{|M5sB9q z!qD=#(1r02g+zM&O=vO_VSOd*7BrcJN0acdY63DMj_O#?xk5lU8=?U;qBguhlzo2rR+7r?mz*3WdR^T5n}z8E(8&GQbmZ z7RUH9ee;U}7T+YartT)z(hO z8R5*vSnk(IWXclEvB!nrd3xdkHXlmF9jZ#F?AtalXfdJYO-7xBWl5jH)*Llle(QAs;ih&fD)&V#nff$ z)V8v)qgJHik&{Gc?9`&H2$#;VhhknboA-l`rM#`OA?d{bWwschCH|FJh%h~67=D)N zyMpmQaxyu$it)CGZ)CJzO@pNGVlDAaYK{oM=k{d6SBBQKd1SFdMTob@Bw<%CY+|?n ziJF}-<_tSTjn3D*7Dhnsu@4}C^`VvjYr~1m3a?K3l$nq8@xi&ot2|Eb>~LP>eU#qr z>-(7rbE{QSF3M^5lkg&yG#T01{Uy9qCCzV&aH%h!+2t-%Nf%=lw+HwNbaZ^h%XZHUX{e>9_%3!-lvjU(QLVd52&Qy)9g^+5M8cAD(Mew)?pG~Z6>wA z5z8Jf;YDT=pS83{NHLb0Ng*6e?29G5%#0*oiB`07mzzm7)EwpGLEg$;WhQ;p2;tFU zX`Pw$99#Gb39mPkZh}YIV6q z#mEE^EV7b*fJfRBCA`#1D#83@S44|yC4EQ#m?ZJbt)z)L2v3&qDk}-^)idlXCA`K; z8pWzsO8T`{k_8X8r%3!dD`_&~Blc9^LS4f3R#GWTbd@MnhBNd9_1xE1AAhY_4vqkV(*s_e&E|4qFRK;_?UK?M(DYX-l-)(ZZF ztsQKPG2;migN`@Y1N*+<0BrriOR-G|@;RJ9FmgT6D0m09iNOc4Z5-T!ZBno$I<1M3 zIs(q1Jh!MT;AFwgy8bWe`XA8s|6JGqG`4myfb%g=Fbi96unV@nUTA4DvRDec%l$csY(RW^gYjKqKWx z^qJ>TU8d9uR8M(+ubyU#-=n3BAfKyM!MoWWM(Q9muJSyq-edeL7^_CGhCLBn0)H@r z5rxxGkCEDrE$w+vaj~&ra~Lp!FQN~Xk@^BUPkBC5X(&flYr1Vbo{3iAE(W-uGk(Avy|o->N;X$4DAS0fT!%mNyzU%}~=$7Ax; zI(QZu)Cjg`)q=h07Qye(K4vh8V+6Lk6;jVb1(YY%e26I)BY_dDM*U!mul!V=D)U9g zT!#W0!Tl_Zk@`9U%Cp4$gfRnA*9aPg1qkYUOu;80LOEa6z5blp20j;Tg+L_O10%x- zUWBa*PT_Ut;390T;DgxO!56Ug1mDBf8{}1KpAoV>ZLC|7KJ5hR>1k)}KziHG!dZCQ zkQ_+5YKe35+Hhuw7o%!R=zJPJyDb_JGSz`S_le5`r{at<4g8F}> z$x@N%On5EIGe9KGsdKY)>viFrE@P-V&^4L~C*73A(lb9`;WUSXY zcwM+vWCuNNu$2NWl;Se0D;hd&6neumDptJ~edQS=l4dl}hMA2MNd_gn)9aZalBSg0 zi@xzxxDu5{Nj8R{XOc)lW^TktD@1R5DqWGSn`j&xVTvd0inp~qk6V96 zub8=sNkMk>2J1e9!Nx|)@7TvrTGKH7pfPZ8L+hl?qMhg596Z{!#^RXl+2%@=?)as2 zh3z8AWUXd94=oJmG#SDScS<2<*v`I%;ZVDS$j|dft39kEo4wZ4%tjBKKe;Ak;5dml zgmVY#;c{3aWVj&x$C8_c+}NvcSZ}~g(?QrI9%XSpb#p}ypIe_ZhuO}xH(*3$((jME zk?B99Dv6%mR)35icSOAE+N~QAuiX%CHFz!?3U6wG7VM3;AEJ79w$?;j4|TU;&PO($ z$*#oGF2Vnlc&3PscH5v+7zyV@&SJz&9bu$Dfy0~axx#)2W|L`~bxQdZ6SHTw&CAQk zbhq6Pj*_;AQ^aeoL3d;%Vn*}qaV4f62aizlmMc*{_Qq&-!`q_cfy7K3>Ac5soZ*mt zN5>fHT!qB;)Y^PnHJRDza%5n%cn;WC&`<5Zz;y!jpUjq=UA@zvfH=s<)^LQ!Rs|o% z*uf%(Z7{`quelAenfoxEEAO=*P;(xpAS2kh6*a%pw||3gU?5vONkf824V3KHP$=)N zx1rhW1K3RVzFLU3ZqDl+-aTw@l&g7Tbh7siH)J=5LBqS(4f&gAVQhQf7B|NkILhmN z=LAeQJBGH&^B#JN_MU2tvF`nl`!x6=y2N|<868S)zKI6^yj_Pv&F@DWc#rJSp^WA} z+WS;Lk(!&?oY(ZcN8izLS;-i_fV zkvrfw-ecz?su}N2WO+}Np>bJ0!~0Ex;(Zq_-uY1Weor+sSBm%d2F3d^T0C8#pWFg9 z!}>3De|tE#0Xn^%(~^zw^Iu^v{Rz}E5pM_IgxI95XnC(!@1u2+=3!Fs`qeW!M?2|! z^s+ak9@CxSPx=RAn@TVN8SqY=?`0_S>wgVu%$AOo!YX*P)I>xyvb}B9ml5nGegxn1 z7N{?=Zv;+a>#={(+cVe(&P7u|IjnLyV6R|L^>z1eV$P+i3*<(i9cL!{Ffs`A(7SwC zH>AAf>UIRvrn1n(bSafPFy>Pd87?9(Dw?*Kq7fqDSV>z&$;BeEAu$>$??vh{m~7e$ zo5XXdFj6ZR=~FP)vb?Pn&UcNZ_vxg$dLQYM-$QZCTs!HU9Ef|Wqi7B@*B?n%u)+!X zVN}9frlugNnVX!%M-RON6$cJ_Ihl1ZbJN_mAFbRjZHi8W)))zU_;W|fL&wT)fq7fCSM*RaQueBev9joLDO- zrqtO9tjCiv12~_bS(n$?;M;PkS?_Nv>g&Tx7;H3GY0s z@n%eu{D^s4Rhcmzsd6B>!L0Ad>~1{aQ+J#7otS+Tov7|J>pLy`3O2#Ru?4z}mDvzm zpr+J$E4DyfF+d%OEzo1E#&@v=x*E+CQ9s9)$ZQ3r6f34cTm?oovtkOAM@cIyriDJn ziGgZs)wfViBa8*#-+YBUDyxJoC~&Kf=y-j2l*IhUH7hPbq(8#x*)nqYJh1nqRiP6E z&I4LsN~@)60Yz@71!lm3bFV}4UQC13^Lx1Y%M9%i4b*`WA>muS58Psb&8T*`8&FuXD+qZn;wV;*tFa5+j zL;E_5?+icGyW8cs#E+wjybSWNsp2Fr+wqc@JW+|0(yutfnSWQfuk+m}Saosl5iFgU zxIA3xome@3w$b0|@=H;E*O74ZZG%^b$9tR+eM50Cy+fvBr_Z_CIbPvu z?+o6I+XN5(T9n`^pCpvvz2P523ZMszGMg?LZxMaOX!T07}-%4Yu4E_POP* z{RGNgK0)xZzgmfI=8#F|n?FM3U*CaR-TZvGnWL2-eLmdYSzQB_rq4k(k8Wme54S?I zjNcy4goh<-*I`vNbm-*Pa9ix8vqD{*F@Lpu%qLm<;^s9d=jYFco9WP3FSusY7+Q_= ztXngu{8^N*|5h~fxonp=w}#s|Z~fWrk`_*6JF0*@I=OqDpN+P94wK#R40__oGmzD{ z?t*8~{<>qvJqM%J&tn6b-$C8lI-@>z8@9PSgmm4yvwd@%ryV!@7S7Jcu|g_psP`}# zeG+Y7MEITRb;wzFU-gT~e&+LN!DzkvGOgda?9*@(yYwRGqmQEb{b3s_TgcwL@lvbS zDe$RfPCL9*!`bIk$qB3G;h2SiG3%agS?LKl@z9?#M?KdgJ>^yec#0Vnk94+-D@tE| z3csMW*txpWlkJ=wn4H{xE$m?0H)i2Wdz@9tFYt{uQK>CEwSUB|$eM9QA!p`EkH0S8 z1uOSIlJ2ZI=}B(CF~%S!_&S60VJ+6+Qn#p&$BEbIqOPod+-@AJy_OmDItUTYmg+t` zV)9}oqJ{VIL=53*{WrLIofRkEuJcOZ5`awNi3&IfSQ%>-d7WZm{aBLZm z##qI5hPpEHzXYsWH2G=W5WPmkB|nbjIZ&e$;IyMI`OR_3{mzZM@usX7L>w(^qJAk? z@8{yICeFuy55y{daMfA;NRs2!MSu8@ju78B(uP;|VyjgM3(>}E6}8}OnT}P`i=BtQ z_N1rq3KAilh@_QBP0$w%wt>Q!ggZj4>~ zwQ#7{OL3+K#}t*7Mzk*aw{fNxxdm*`Gcu^4!uqpRi+iGnl&MH^(JkF8wOvXk)I@{o3ofII9(~8tvDD7^@$|CEx6JQ6rwBLM>{w z)@^})apK*&jobHuIJO0rA+u-~6~<&X%jx?X`l4or3Z*>|XX-Gr%cDc}x;M_++L#6@ zim~>lScrCq;dH~h-+I3mmwbIp@?J5?PsJs-QCGDx1@EtG&)=glmG|qH%JpsoacnI& z!f*!EH~@=d4D)^slf%CLp zD=XhT=yUD_d%YWHZZFJ5o4sF*ISa!v*4#+v8@!J%CAw65w2$3)=k@9e?bvD_jw$4T z7^`FBtXAvhPgyPEXs;~N;$C;hSv?wKwJgT!D{;w}x}CZ!F8T48 zN0oFNI6t=zXZOxUFt(DXV6PqQurDu+u{ThXMf-ANeP6~|$hx+E+8YvMp-L=7Te(*E zWy&LQ;(c!G9gGtn&|TI3-MGy1kXf{+hsR`QIp4e)ZkxiJfUzBZTsv^Dt`Nge-KQ|7 z$d|-e;r*r9SU(wy(=ztX-w)-F{yd4 zk|m1f9l{RBYABgk%@7f7-3-2eu}?0fu@xN*v(eri6JwTl)0jH?;lKGNW;k!}4Yy9f z3rh|DuYQ*E+&u|?gnw7#g5Vv^q$mwXi77lg@faa{7FNM3?u%>BxkCdVD?n|pWmSSZKC*@gR&^hva zeoEp5=-?c7Hk6)sR*bc>?CGqlerMIb$35em+CPOe8uO%(FRVf_jARFYWN5DXJ8EAz zs5^sWOF2XN3MeYne|)+~46|5DznjW}iZgVdH@Grsb0AJXVB8~#U6Xvez63ssV%xiWdM4>4lT1&NnM@}E5)$?; z3y@3*kdOre0YVZM5uJo2kVr^E7Fl(oqPPNrQtlU&t6r}Qf;%YSRZ*`Chzc$!Ant(R zRj-Q6_dnGqZ0~;Wd++xRr2lbK;;gq7X+nI=#tw2hLZrGtCmPLW?t=L>lq$XFge? zs&LQ7d0bV*fBl^3(uvGjIPqS#5k@Z^(a*Vd!xM4m#gL_pX4llUd!Fzl_|I#3ex-`t?Q7GY^teVS zS21m6e#25(zxi)u_UJ?MJM$Z*JPMy@YIl@XyXbs$l#_7o%Z?3yhvPC7F=}qESETKO zz<%jU5OJv@8Rs>LGVsOFWtoOpO+LDg|FP;cA3l1VE0-eq)d1y1)~Qk?KHUd-Ho$tO zA0?oQ^!i*J(zZX_aM4TB^pkvLoEW`7J9)^n=P<`xKKQEPn;LrPOFtz+9K=~+a8+kaLR`o4`?D50BaQiVjD zOjCm-I+^KIHV^tSe+c7q?7r2S$l118jo?X@{6R_CpyXr*Fo%&5vQDz?SWJzy0FXFWvU>!$%Cr7k_ z@nyyb*xyEu_-4-VJ)Gf(tW^`+W6XbobQRJC2JzHf-k@3)+h)Z&A!&DjG2rDj1`P+j8`$PWxS7Z3*$c+ z_cDIQ_#31A*bV6=YDhPTn}Ku#%w;TPlwZAp-^lbb#v2*$Vtkl!8{->{A2S|h{Eg9x z)=udq0)uoTzlNg>utO>1EXGDg`BfbJ-Np37jN2GLX8euO>97*o%XoS#I|PMh7#N zGG58Jit$#)I~g}HKEU`0;}*te8Miaiy9tzWT3jXE!?;g=%nHTwx1Pi(k({uC^{aRQ_KY8D=*Gkr1RJjMl# z3mGqCT+S$WYeM+DnZA#a-m#~QY_c$@JkN}OFuun4HX~VJ6yP()uNhA;{?16tvE(m| z(Z%Rxq+`m-y&oej$jbgtCL1~AGL|q-W~8$=$-RcLfw7sfgK;V26^wEhCWO0{={p(k zWqgc~`u~&6*v9x8tb#J~IHNpb z2{e6TLHsWne_^CIn~2|yaTH@E;~d6CjI``W{_l#Q@gFyjGGhnhJB(o%_{lwiaS-EZ z#wy17jB6M-Fh0)s3gdppZy0~0iHFR2q=o$%^BAWx&ShN8cmw0zj4v?0%lIRs4Qs6w zzl$-Mv5+x%0pHAHyo_-bquksC5j@ZIUdFE&e`S<=lE7bgyhKI`$~{MbQ<%P(v7PY- z3xkSa#@&qfF+RljB;!s-dGZk=ev|3FjPe8|@IPnz1mkav;V`i%V?M^-5>fxdn32a= z$~cp;p7Bz~<&0|>*E1eq{EG1hMzWwOVS|z0lP7v0A@%0n?p~s~F|E zL2!Sa=}#HuIYHpZMOz6JFivHh%ea{F4xsG+4>02i#(y#%W<1HL$5;`^G4^I0##qSM z!nlm_DnbnLD;RGe+@vTs%X5N|LX;?$upOfp)4d5X%NW3PHX&vkBbgpgi0Ylp^en-Xp^X`xgx4y{ z)l9D;yaDT=Om8Gyi!&vdmPa|QQ z;&6i!8iWs^?wIaL_z-M3rgIqO8Bp+l3Db)RU%*Z)Os^uuwEGsOHxO=Bl>3?9Lbwfk zO#o&8e}x#BZ~c=!&^I==9g6Y^(?2=hiihc5gfHQkU#7DO z|ADGudII4qXlp(tLPl^gF1!-d^MZ z-9<)Fm_My(aPyF)uHWfBI>eqA2m0*U8N)I}{@&hwgR2n$Z{JhIR2mZ}FLyq9N={$PExZt@7j62Um(RuWk^XSp% z(Yfc*{`2VJ=h2zL^B8I8(Sy#T`=3YmIgd^~k4`?1?tUH}lW-QpSFC3}U);HN!`wuX z7Zqk*)+RMX#GM$0YL!)FSD(amM?E?Qhwt{Yw&l2UAa%ra_~_b}gT8CCCy{B~trDTI zCr0mX0Gnf`9}ZFv4wz34wov+T+delRUPnU{(heQ%6y5R^aPn`KoX{J(!$Eg!1`j)Q zL?bVDB;U0|N07eC<}Er3F<@!Qv*BnT1_N3f*iN@EBZM~S8Y?n7Xv<;$287(K!#@}b zUbTV=mnccp8y}N`f?=Erhkw7cDf`&MU+M>u6_1{bguQwxdVicA{2eTxehaJ% zQ@w{1(gY;g=`(QmI z3H$TtS3urrdLq20>t$#K8M+P~lBr(-pF{QeX|Q;8TDKUkFGGE0>9mn!wtmNG?3kq| z4TU+Xe}=4#(08K5x%%ISLvQP;$nGd?rlTmM^=-(?4n@BluoK^k_>qqn75xrm{2z)Q zj)wS>qSJP^FDv>f)aWaU9tmmgQuOVR!W)YI5sLMuqE{h>rojWpb4Qe zKE!e_I>|@aVG>gLSkW_3r3V!KM`ZL9#D)N$Dms1nd{EJ^MZ-I!=;I-k!-{^J7wZg) zo;-$jmeZ4w?&peLjtclf(Q8qAUttGhNc3w(e+{DkM$ttcLVT;}zd{&C6+IWiI*#`C zWvWIQEx$b_6tJ4!M)>P7LDldgr`V##ieQs!kY$Q3YAB1eMU6pY5q7At+@Dd69Ta{%yKhsCx6yL2LyhIW zLp5j;VlQR)msIzd;!?#v(Q*%_ys8?nQMo5^fHzbljp)ft?^cb;RN^wG-&GAd{SD!gp2ab(w;4A_fxd|8jW**K)G_w1u~K@_W{gBL#@;m+{jkmW zisGvZ-67-KWHXx3T(NhJ<=&|o$LQgTeKs?eYepOT751*NJY1_8-%|v&ob?+ugH92| z-Zhr{YR$M1Y5;rJSoAHLK_)Rii?-<7G~;Wk?0OD=mu9?zCW^glEcf-A5&Ro^751)? zA5^Do)C_v!i@j?s51TaO)^yN~Oh2I+Pmurlq3_BPJ);?Sq=0T>_Z^zCo!px_!Iw0n z7rGnvuCd~KRWn{E_XVM!$nbAyF-AJIu2%MNLNngW5O@BW-M!~Q^4P%<{iYd5(ABVc z4ecL}W^XsX%@7~KpY5j%aS9l%k|dXg(!)+IWk-lHHR9F*{+EOOD4NSc-$xC{F1H^H zeID)xZOLXoB-5lGwH!*^epn`jFKvx~QYC%HuDTIQo{uo;G-y@B{yCF|QAXq!OvW0= zi2RbH@)?5-YHDAFzKK+ADT&4pnIfqA``NU9;vve+XsbW`tvoZVut1)6#N<*&mN`J@jg5IZJdH zoX~epi!ND)JuSMP?8>4`VUk6c$|Q@f7n3Zy-W-+Bn3O}p=)=y5mKN+QGhs_ff+XSE zk2Bq=D$Y5`UBrjTR*V@UM%lZB>*okrxH+dY1L3Z+Tf%+aZVC6_pp)+Gi-?QaTdupH zJOj#*Bgr#{4i;q&|9~OKF!I?au&*-XC`NUADU+2}UMK2TqcPZ0W>5t^$R%B0kB%t>Fw6rRQ+qfdR2cAVP94CerP$nRXq$z?^pFo zPzO<>BO_tdeO^e}{6S{(TN)?yJNi>L--en~^`c=U!hR5~rqk=gc6}h~ITQmlOrKEw zU*90G_o6uQOQ^q3(oM)4_STYXcqzJZ9HBxr^$)~}@9;6|iagz)VB6pp7wP`QBpO6R zBh+XFvZahOiV8tGRjV6SVF(qs!j%Wq^l5# zV)s&OS+*E1G3%iF!UhIaTKJD2O0^u8uYL^|Jp)#lqL0H>)i1`?rnlp&>2v_MU5`U~ z9Qt5fL-hBks7lPm$V}J-_3sEAzb}bm`iq)CDK)}D(bLl?ra?m~rodptq{L*~5aO@u zkM3#EIQFn!8tq1~v)1V!+9;I5szN3Lt~9VeE&t zfJyioZ(D@>Jwe)oA+ZlGQIDg_!g8e_N-t0QnbJ!^rwA*sLdw095=zl-!wQ*0dnYCI zg8>~@#2nh-CLs^93LDED+Tccsw1&5fhvxsEXull5tcw$sZ0QQzd)mLG~sSyUU+s)73tty z%pA&BFkxi@SXIoT9f1;B;=!5C9NMWUA)W+UYjNb3O9_8NeTCIAM+*JMByj32j@(x! z;X_!CVGZnuwysHNBGFyK9NK9nA-I5o&9_)`%cX=X&@{uE*^}II39_56m7+w6)yPQH zcy#Zu1=0gmREPEj6*dclXV_v6MmsJgOd-xv=E!o)BhF>aq3v}Nf>#qO$Shfq^;G<8 zm_u7GB|J-<70jV6mlEC~&b7>;Ete9$CC+usp%z9p-lnNgR*97LZnNh!Dq(A-2g>zr zS_PaEg0U3t4lA78wJ2c#aqeP{tdKFpxraG2j~5VUJ#!3BZJpLcsZo+q&P;gNC_N~? z%@NQQVN*3atUj7r1_DHr(6CjOJ(}`?He`H^Mi};hX6XT^@f0=u2etdrK51*Gm|W<9 zu)oVBkbT&GP}T{>h$QSOD<5(Pql9I|dD`O0t(_9uDBfq7Lt8sped<}s3EEXEA_;4= zMk}+4FHrV%>if@2AByj(5$Nk-o3wm5M^myCAm#;1XuAx9{Jfz(PWh4A;cY7|OPW$U zyw997+TjC>V+)>94^_XtZFPNMWP)pe$iWtzbUv7ZgOle@QEXyVdVsvBI9!?_Xn%?Dtei>i3kG z?DxA!P{(Bg$VIjNK8opmN~FgA4yw*>)yhipHpk+~eWemUC!N(`4_cmN?~Fut!y4HW z?OQ{c57=Lz%um53>YE&RXptTi-`X)$D;L?{g-bLgD{G|y19@1h41@fIgf^rZwwwLP1d+oR z?Exf`c#v`!fzdte9qB>w9VG)PY=^xA&e4<+nZuP-@ONbxhy5>d=OAkGp1x%1gg5;i z{`6~bujotUm~^*>fEa7Q4{y5>SI>QUTa?}0jgp4HVNtsIS{A6c zxMwQ%4-h2$os)>$`#NGu4c|{&O`6Bh(ZWBZTZ(TO>M#7`CnaT=^tOEXC(lVL)|`*N z9e$9)25l)mb18}#e)w(aXqpdVAP+wxH>^xaH1l8_gn#jYbW2j4lyfIlxpO=29QK!q zreVuTgSnGz11II$`8Y223sMpIt9~!!+`0rmMsILPZ!WnK?AA_Tj zIt=^}c~4sf8g8_ia9w>;rf4^MXM>DYDgUGuPofcqdzqwtsYr>2y$sLv7k&WVC|PP_ zF_%)%M70hMk@oOD>M`6z{g4M{n!Hz>--F|@|17V6;OY#LQiJDgwHFjhR1Y+{@O8vp=p5`zIvrVe)n+LdUA%W$H~J6W&09!^>qZt$nEyJ|s>Bb7)(tgs+HG z$sF08eu`5>Ym7fO_#om)9Dz#|y=@adLwZttZ^7J63{O_4CPHj;3*eF>?-5({KBP}Z zW^6v#!_+TOeuyhtLnPRT%7}n@9X?K-hmd6d&dmThUZpOBT8*YWV;?F@*0a>0Rfk?< z3Cb6Kv1*ZVhTjRYnn|DW4(!74T6Kkt#58_JUkabgByl#p{9r0i`$-P$8sKSpTtQTUBmNVi?RGh&gIG1a6K zeIu4wl+9cK5kxGrvZbM8pf}mC>IdFs0-^2KQvE$fUliH{&=$@op1^P%e+pdH`J~zt z{VS+{hD<7YTL`I0X@O#WDafHnJ|6^d^)dW77beo+aL+& za^^%6XDY>hHFM;s`60^TT)`Y^D9y5o6CN1VHk3253XyheuTh*gNiT}87qq1ATx4s7 zYcyq!qNR6{oU5!zXvDTB+>JiqyqP&L4(tidD64Y~b1;V66V_1QS!;3B7~*J!;M{6) zf+})sS7IK`25+5>a^t00j}h6n2lwVZkV#~RrQsCwQa`9m$pL}P8;M%@zNB<>GO`@G z=#ZqG<^d?>$i}H z^f7S7w>rBqdrjM)659MmF<(#?73 z%TbFh%4zzb>7tfW6zFT__w*1uYS~Fi#+qBuj-xKK+N#eqAd;xdf0J&BW>0jmsLoJ` z1B)o;tiGVGcSL!coWsV*KYNaKX-iq_v9!TF| z{{p3R{)B`a_J5OfRK)ABQ{6kM89PZT_LreuqgHw7mL9*mcFjYM?CVhnt~c(ZQF$jW zcGs6TA+SyxO?P&7Ch2kLT%FhAW--JG&JIPNNUYU#_g62B3NSmdYCz2Oboag$w9}@) zOuQYPofy&wV4m#yB?D2%zl9>Gt`c=KrLzQWU(xTxRaIjCg`&D9s<)A^MQB5+>pt}e z`I?E=kB0-q(x>8T(_gi^;rO8_zw2-63l!wW918NN>P0mAcE~}|zeYe+58`UmUkZ~w zcOkl@>nZgFh0vg!RM%E@9EDIvQwX^en*KsA-7g;rXKc!hLE81A+7q7Q1;nSicBxA! z#7R_CP|>GB390%w(3m#8070N0?naw&y{T5hS4=%vuDw#t$D1&uRo4gVW(vMoCej~` zQq>=U#lsNrykKZ(Ymy25N_ zU<04;rp(j117$Hi+Gx}0r3I0hVEyU=-V>B`rBqmUFliuRLrO^~ru z<|k|YQ4jD`G(yq}`&|Typ=jvLGI6cU@=2~g1QgAfJxw=*(XpFl^ z4sxz}?CJC%=W1lm=|Rrb#2h)uw3yrtA|8p{B`!qX zX&`hhl3qw=%d}OLZ@RcH=YTTb_Y$X*IWphdsHI%V9BXVQKg*dz6%GT^wM2Ue>_kei zTT5G`;-b}wAQ~Z3yHSfm%T0KIYG@^glc{|Njpe$TIWo0V#96}}ncBpBaIAF;yDFPk zJXDP97WPA}i_*Vd>xVQFDHGjl>QUH7;epckJ%CZoa0N60_h_mvs#hvG)hlHT^(xH( z*Cs1YG6S5_3~+5`4jQIYngOmSm;*DwDF=NQFF%kO;8bFMg^qPSEi>b7q}iQebo_)w z{T`W$EoO>cw-uT9QM-ZZuts1J&fKYYC zPG?lPm$?yzrwp1$bw7G9MRy4rucCM2nxwD8b%&xq3^=IhF9JGMeLrA5&N3l4Rkvf5 zJqSA^NSn60p9xTOPatNS`}tiI-Ln|m75y>PY^Q;V5-P~O^AYm&J2b1!{mN1DRD^p) zPbz>XWNbQe?0)?n@-!X2R&{^c6Oo`ZQUT>D+xk_7RJ0t#rt1kPtfBO_kAaNbU;G=v zVrRI+)GILhx-0U_6?ZtVb}PnBZt-A}KQTxTtlW_*J)nZz-KC{viaUyZ8S=5T+r_T2 z#^0dz-3Gh*jP7|L-ApDL51>-q(M%@EN7n8b4x4IF3hr2T?JFNxyFKbuE8&60UWmo* zW#=^cyxJYdfrlF2k#O~~Yqos&>^9jo*N8%0y5re3&p4VOZc9ed=s~i(8~ZAC7gj(3 z-Pu=}d@Stl!LF4`Ogl^icak~?@^#@+TtBr4iqu^&PI32_x9C4c0{I!JPK67eZ#s+^ z62KsJrlh}e7#BhQ?!juUq=TzNjGM^A5Vb)vo(VDTMn`w2$wal3gCWKvB(ij-kAxWg zq2=5eGLKryS0TnT-NP;SV9L)S##`he zi#_}nV$f@w?re^rGt~Hi-2LpnJk;n!^LOX4`?aCQ5po~F?l*=Svq;pr?7lkG_>SC1 zvimKeMuH9WDCyouOSvu7_?0}2W)F9T8Y8GC^EiU_p@w6an33Y|7BomQ1!|L&)We|$ zy$;|mKn1uj3aV$#)tWFmyDzplnpD0YQR@saN3N#cK;^2kI5xTPZDN3S zS2IU0b9WMFHiwcU-RLB6YM3L(wMcYpcdcrz2&!_Kn~o=P*IAyh%`T>EozdXTxK0Ra--D+5)*WTaXU$>nSB|?o2ejMn2a@cQ~C>-^g&xw$}x0CfV)-Z z0y7eDAo$DGU1;W(;5%gio+C@SUtw{y#2}SQ3jRuFoe}(17UwL%FK5mf!C%dx&ItY* z=A04y3X5}=+^=O$q-|1{;IHRkBzO$E?xpHs(vV=WFl44y=RB~5R*0ceHO=wdXQPTTWzO^ z_LDyTixm;YjA0-BFV($RO@k(iCNWceqJ9NW(zYM^leb%h628gFeW@dhoRy8ouqcxg*XFn*=x{E$lH z9ldMuJ<$DkIpeXVbT%kdR5c*hMe-KvH%&wT@=vLpS4KAxAHx^(9*hEk!OuXL5c5uMYbW zT%D8$nwu!mm#xID_gPfIz?e%1KoVv#{KhPz%AizYl3|*~EY6i=s`(mn8ncA-jxD9H zVjqktUCh!SC<=Nd+=%I1N>S`U)G=4mZC6HPuDV82c5_7m+?L-bDcz(+)0nHRk~^{3 z1h&KeHR5yLAa9YQAf!kuJxO$d>u~9CGp=?@Gv*p%crQUCjE!ym1@~qM?2*`Zx~1fM zyFqo>(}}X18mcSyQfraJFlp=K*o9%z&8;~9KoEzW0yycZxzq1LBEfsJ;AznlaPu5T zLsC5}Mj?P633a6CTYHjOb2-JJKLcfh1^xF?LeIS>Sl$(=_|=}xUqbQ9g%Qsa)>4Qf z7fn1*uEEfRNuT*PnzQFAi?W*oG2VEdwx|#@_$za?s?MHyy6Fbd>9 zs0g+cx0#L{dtS1rX!8S@kDiw;D#rW-;_|#=QL$zQYQeM1qCBR9gz~CIdCh_dP_J23 zoLNHD>lWoRClmEgi!#j#acF;@H;>BX6U``~=Pip$GU@1a&)XK2YL=6n_WUM&_BE3+ zAbQ?Wp+;;e{md88r9AIiZvD-ns5H-eA<}Jtxt_x9v)l%nom3ScSkxeMFs%`JKC;Nc z=6;IifJF^4*Q1$xK8cXgq?xbefjVfprJK{RUgJ4L7J@A$!yHdO4_hM5G%rPO^Bl2! z4mF$6j67dh)G%{0#qyQqbGZ2~3K8^tZ8>I{pHYo|V>xD<4`GSJ^Q}iF;Wr!5-aNmjK;Gm|3yeu$(B%}LY}ejO^Qab}GH>NhLSQnQ^3_`B70%1qjp%@h2? z>MfP#^%Uu!g)-m_VRaO#`C8*8YEyRA3R`c`%N?E& z4%=vKArXXf*cRgfYGXQwZ4VkrJwS(X;6=tnbUaT42VQ2Jq%1pSVEJC_Pj=9eGPHbK zYAQ8^C>dHy!F#O-pf^1(bux-U@3mq%8?C{463qsqJ+4ktjLsuTxX|L2Gf2x_&do&A zDwUHKp`14nNzaEI_Wrm!X(_@WBs>P^X<1h%1Pu@d$86NtM-D9fOjMHu$r5+xyPJ>q(24|A*1eTQ3aK?g6WHQp2 zPIb^twHAL3V<<*0Pj@C`jWHzU9!&a-fh3k>l~fyzf;WDe{@CK*#n3#9P)n`#7z zOl7jK@jgoK>BZzg<7KMP-b|(`&I!n_!#)L9=S&jJg_7Ak5K8mnMF?Tnt1xgl^k@tKA$Wxz4a8fi&PTXNyZ5;I zZ`?%DnRedqq}3iZ6s7T=unSOH1BT~{}HHs@9*+nNq(ddg|K-KsncL`VEziH&*Xf7 z>h@kVHt!K8?ecwV@8?YF#&sER{Q~ibnQ8vi;7ZE%*D_kNXo^vA?>919s;y}rkl(WF zP@^}>?>)+7cJ$*QZ7FyskxKg`v-1qv`N{helZDYFGL|6s~pHsdYIk((pHTix_- zo;TWdiOk_fo4aI^;*GJjOR`f_B2uA=oK+wrVsRJIPGmEY%e%;!(fNoX)<#VY4HykR z?zczb!|V?o7x#x{XDMco9+brWxs4hVJ+8Vw5~NMN8b0lvh`~4Q2%J23B7dqccm!lX{R>4-iXeHrx*{Q|NEA|3|H?76ZW3(p1089%ubBqzV&oV)=~>me|rv|$Xa?F zqnPg@P-KMb=IhWtzQ0?JPIC<+@jYTuhWRr(r0+3{iZy!;2KBf_`Aj;q%eTd%63tAs zAm5V~m1KTGaXw9Xwxy(+v(UwT&stP3Q-gZ*Z6kGniB)eCsQ8{I(w5T4q?2KM+btWn zulWFpVTVQagR*%S<#CcI?Qs^Xm4fMV8B!p{LyTE>xZmHOGHns0Hi?W+< zB!l8NEOavyeuBP#TFumHeo6813m1kt6`Iet$8w7`2T?TdSd`BUr5x_HDlySqNJ4nm zqLR!lP+7kB9!H6&*e%GN?|qBvWj2z4_HC6}>uqLHoWcDT*~gp-z2N)6qWYqs6exlo zsoCE~d-Z)t@4I_dOt(}}nl<=7(Yen3*}hC7_wv;+CEC*t1s1-+^I;eR~S7I70cyonC8Kx6OGp~)6vBa8Fpi9i_EH|Ix zi~`$Xr=mHmcZh;lqA8l!-vN$iloy>UzHSu!=+~f6Df&S4N6gz^MU?Rky}<9O{(=bA zkt%tjA8nRRKlM^DQs_Nebu_uzZeFOQK94St@J*xRYcam!elB6*EzV zCYw~k#8K$Bqm`PCesHXWKlzG~d6%mN7bQ=IH;$zhqmcc;qHW@6@rSlgH$j1_~$U2ild! zx=ZUCmDWYYCB>5iZ4FE6l!m7E?0_h%7|}!AGc_knOi0Q##g*6jqeqq(O)0FXEH4_X zw6`|Qomh^}FxqY-2(vc)~yK{Z%Z8g(a2vbwjF*MND*icg^%ROfD)JcU(TU}Fa zpsl^RMI2h`D8@FiBkf}N)qbC-%E}E(YHPhT&|0@3(1dcz{AYCKrF~JLp>=_n5)Mgi zKbGYY1M)SOSU*hjhE1MYsX+Mol_Gz7PKcw~`H7xm+juMg+@dx|$+0C{3?Zix7DM$QCLe2w3m zNTP-?WNHc;eM?7sprPr~y4JRaW^wa{XgQO1YoTJ&1vzQr#hqGjvAO^U5nX;kPKsFd zz9UB5?nh!&K?b@Y9+RTSSklfA3mW_$(K22$L~&e*OBmje*md5J@#4+5wN&xU%$%rE z<@wVK#uZKL>UHVV>(T-(4NX+3nHh*NpU#|8+FAp3Y4VybuNe?vMWJ}S7>(mQU#>$R zTShvdU>rV1#X(n9V{_dip~)X9#$4l%i#XF!GR2-w_%!yEipwNcotl#pqS{ zEVlW?!5Mxtvb3nMvI3n|wil7#h#+@T^My=9MCUkdY|n!7fF~Pb*&`K(_KdyTToG;khZJsXkVNz zdN^|9smQvALd@=H#kH}nX>NNxYGq=%m{KvKkG-}gy_GavAJI80XJ}N(q{^c5@~LH& zf#UM~iK4pA-w&y8nU#|v8uvRQMDxv#Ffb0`C2p~0oj+Er_vX69;M=o93}mHdeoKbc zjRPGm;+t7HQ-?y4)^+LT`892UYOBxHcCQ4{@>v&17~JPGm|maNgAW=^?RE8A?IvF*=DeG77Wh#kX2LPVbdxv^@d*f~5TDMc!~ z<|ZfyQg(sb=7mkDF=zy;cG+i}gnJwkI59~Jbrh5q<(G@cMr!c}&UtHUs%uO~(+IRw zx7Uk90{fsQbxTO3f^*B2VmUn`*455kJ0;&Ms(v5g^3d2q!y=C_fica^jW`x1KQ~sG z<23hxqKQ*yK)+Gn&ps_?PLvLNQ|7idceK#J(k7}V+r4qT2t1McT$}ubL+QxHzY$c>f~5VT0Vj^BFa*HBuY%I62f(FLG%3`vv|8v3UXVarCwSVG(?hN` z65t#50_=vZB@6W$m?>*Mba=(qs+=-0cr8Phy)sH71&8-Xap_QZEZA^O4Cpn z4X|5W4gQIuwK&&+_Rxc7hvRTOjEE>7bqzym`H|S@_~^aJFK{IV#-@u;;?oF_oZx_k$Nl&RF-4( zpw@EQz_YYq`WY=a=mm`4J#TePh&#_T#UMFudPPyG*tt_17;f2uV>4le%3=55>snMM z8ed`l8T+uKiHzL3+9Z^`6|JE`8d+%WN<&Q}Bqa}JoHRQpN!(iv)tp%Ezl+phN+eZ> zLKb!V;+8t${#TAiteTxOO8k1G-|3rD0r3=Az3og3hAvI}d$uP5Sva>yQe_p4%de;q zJ?^o`i62{XJk-ZOeMyTKtv_YOQ;;|x{Ty@PnL?o&w&}i=o2@@OAa&znjPz&Pn1^)PM5IihvwhAf5 zv&T5Gz6KiT?y)d{UU?XsWxrjM(<7F25XtRQ%oHjLCr*THF=hpwTT*-NUGo-qW+L3sBtIZ=Gtj+0Z zFPU6WF0~aTdAh~25?3n9^9w4K`OQtuZS~DveYm;B>cXTVECmoKnpQNa5)r^ut*vga zMj2}B7AZvq<%Ma=n2xsMYKT+p49!ijtfI@wBdpVSt?N)cxR??N(C9kQV}&aS7X*u zM|!HcRcUN)nwumqXc7t@E(a`QN*r3|ALCfiQP)u?R!@N`1-%1{B?tED6@~tI@zz+_ z;%lOFqa9Szbg^K8JyC-c#Lb^;F`2CKAT3LYQv;wm0J;MeKxV;mp$S=_lA8WUrCLuK zz~jUf-`Nwy_w#f6iiS@du~8I4nkq7c*b|-GC#1Hy15+{4GSeTMRMR}arMk5)J%EpQVZ?&dG_7URaGTIj6Z5IvVAdlSgABS_?YikltO@i9TI2wxkl%-jd1E95~l% zdi)X0CR$&Gl3snaKUB2M$r;j9&Untu>|iUjw_^BiKQmPpd#?5;3ioy`p=f$h{sgv| z$DUS8^Xgh*J&=MRT?Z?rx?MSKTaAW{-$Z?9!wytqsi>As1UVu(etslJc+y(IZbwT>Jf~SP^_6 z+Zjs}Aq6@YE%09DU#!GVgUiLcc^(KW@Mq}=YRBK8bN>$|KW zr@PkHFxF~0(njnmU29$3p@h6M_XO7kyJ=Air?bxk#k1MM}9^Ue-aS)MPxYsiTZ zza7NvwCbRy$G0n3mnbY(^2^6yn6~BvmZa8Qk~1j`+hkOb{%sZW4mx^@);qI(TIuBJ zV#f(AHypm(5iL3|!6awQu`HkHU4@xIUKT9;fHyZRf?8z-x60fvNBXdI;fU-;!$<>0 zuqAc13ducPX{VK&<~eiP>e|J&gO2XB9N-h3dq+lzo0g(0ufD<`=HuldJYs@bSTU^t zql-05ZGIi29Bf%vl2yw*{7BQZ1ZgSM7vwUQn9|~paW^(&WTJUs6R-bR?P$kOS)uFh zbacnWE(1g7w^=FT;MZAE5wgn%8XM-rPTO=348NyJsgf)F(RnnCViGm9tH)x%uaR-K z)mP6$&r`}KSCkZ=Zs`FU*l9vWaw#dPn25u%AQTkVA?9c2Mv50{&8TezR$FpDgQnd! zFK3RpcfBJ{Bz=X&r{0Y@S;9Q*h)hP?!w|oq1NLq$Oaf^%D76jk^_WLl8Et6Hx!I1d z)N5#@7$H_4#!xF)uw>@1D}}`VDAi(xYp~Y+*4kV{1cqyIV==grsoIr$OeA2(Dicf4 zIIOd-m9r**D2G(}>1X#(l1QfLF)X*27*hiC?b4|uqGQlny40gJ3Zm<7TH*JF7f^ev zkX?7yXO2Z-==GMVERq{@u+F&H79yUTpHmrb%`nE67EKeYXXV6;q;GRV#b!)Eu?Gx(ud+&`elQIqN=M?1{~dHO@F@l3`meh8)3)LPJwdlsLT7kt0@LMa}Jq!|9gG z9BiS=-XLxmi#62Q8CvYR8_~-BSL5<$0ebgaO*yk8s3F4`q&c8iU+3>3#y01~q*^l} zi``}UqYYTb9rtwc_^GUz$g>5TCLU)a4|)S&c%6b&a?a?s4=H zGh1@{n5WeysXjR_Rg{(#6rtX#mtj=Crv+PCh%$1F~f!3N+{r(nPAb_9e`tp-Q7es7)1BlDXAQl&|pj5ywMwol;x=z91(q>-5B< z&RPb>yYp-|6cv?~Po4-fK^jXLY%F1ga1xfnMEceK{^GB>T8tf<8p}_#D2tfg(dW$a z;$MPMPMJ#>=4x47pEM}IMNEINGN9XLj&@1R`l%|nxP zvPi|_L97GrK9Q9uTGnFB-!>L?*0pHk6gx-c#yKrp%CZ)zisIGwb@l#O^Q?t{K*iL8 zf})BFYW7eD>+3L1O#VJ6GKB26$_kntd3&%yA2{98TH8oFwsy&Q%8*>&c&ppXby7?~ z$8~k})64!)ROkvckG9s3$Zk|h3Q94>l9sGB!KUW|A}=i06VG#XerUi;zSaym`AewT z&@~W3>9jHKLN-5#EE-8%Z`hNSx?Kaa#es=1JmcBJpcSQ%Mhzd{XLVVdz%8& z8U^=rpy4|RWf{Dfs5Il?b&sKw&m?hTIBV)xe$X97LB%a79Y zR@m}Zs`*hyeq^ZaxhOq9GEx!MP z+d|@S{GC@1F>H$R!zgk27EjN}fp=o#Umq{v^1Dd52^9>eh+ zp3j!aqf3qJKpxquC{^N$#J(}&u2Q?<7>y^PNz(aXPkfM9xJ^8|+TYs|0Nar4O$cSH z+$R1Yb~D%oVoEw9Z^?2Pw%ToC(#`(fA)8CEZ)Twwb-kyj?TVG+(KkH39Y3tZR$Fw~ zvsiyUqG;SEj>D^M;414#&ze=(GEiyIMFo9E^b@vFH}E%`oLO$z%CC+3&(?HJWf`^@n{-vKVTyT><~%_VU!Z$q4z9y zZzMGFgq86|=HEpauP6@_;xX_x#y1#0W;{xWcz+|L_dA`a6iPUeaUdZQ$Ym@gOhg6< z5wMZ48+}cMN49uhW;r1q*k4PSq$oEMCeuD+z@FGGn=pko90TH!^j(B_!o8lbcTiC_ z(hVMvKS+r886GC=hb`L)@m|dngm@qB8Nz`m86h6H?;ylGE%bIJZSnppA)c+jL5Sz% zy9qO}#VKJX?P>-bO0UcT@gjzkP#icMn)39=xBG7k3*L%X4Cq{k^^6ZQKFheB@nyz; zGVWpA$9RD8GsbTie`3_|{GQSYV{};86ReR zTHJlVKQ8z-lkYKp%=jha_l$oqI??GU*?7jjj9H9h7$-5#V!VWL5#u!$29;ZwaWCVi zjNdT+#At`wpoF6tlNbjx<}zN$IES%~@k+*<8EI!QTNHZi8_YPw7zw>Z37L#VjMK%j z2OzM!n52&u$=g$mZ!#WX{1+o>B^e!KU&buPV#Zd+PR13CD;aOIFsN)~#%9JHjBha> zW<19DGouD|NEtC0y^M*BDU3rHa~a1lj*|$1O=8AWM*5zWB3{P0l5xEl`8V_y4eFPi zeT@AXa~UTwRx!3Q1{rAwatePt;{%L%1SJ168S5D@Wn9j7j8`+>#<-Dj6XOevZ!msnVNm&s8KE%!C?nB~-5FCE`!l974rk0|9K$${aT4QH z#wx}}##V`FJByeRWW0v)CdOMB?_|7>@lnR-79)=+A_tJM1ua zi4o3dFnSpi8S$;5^jFMS%XlT@&5X2HKgIVL;|q*$GJeeXEl}!?UzrgGYnuZ482c~| zXRKswWxSH{e#WO5UtxTo@e9VE7(-yqQ##)MFv97kx43ANzxe_WhCU)`CltbAjEfmp zGOlOb%=i-H`;1>P{>tbSgC6(y33g!8K+#^wxQg)}#+MlPG9G56ozo~B?aL^$$C$-f z!gwL$e8wQ-%@&HikNe%hJF>-fFM1SkXjDd_< zj0KES7z2!Sq6S6q5aW}KI~m_*Jiz!ZqbuDC7th$6kowy|W@IpCGmd5)&p3^-ma&zw zlW`>@?La3p$oLH7D~#_l9tO((c7hpyFgi0hr;L3Whcgy3VmEb}P!(enBb_rs8MvPD zHpcrI>DU2se=&o{>fOxvgz+fjuZ()86~N1w%9z2J$2f^`7ULz1ix{tAyoK@JOdhK@ zG2;csHyA%;{EG1>Mmy%~RDx(mI!A@*A&jFKCo;}roX5C?@wy=2+{X9-uk8zP~WuZ(&f`%8Xr%dl|oFRI{vrk&Gr|I^!tDQpO7zFJWBFct7Klj4w$< z{qJSQFO0Ou9_6$L<6y>-jHQehGG4-XEu&z3nsFE7KE^K@|4m5!Kh$p}7{}O$F^h2t z<28(H7-^q9%IIT^TN&wC5aPeXxS#P8#?Ki~0A>IGjTzxNRzM$PZ^ogFV;IXAFJ^3H zT*7!Q<2uHTjPxlfWo!rIhdJE;KWD~C#y=V9Ykmrlz}Sy5i?N8Yg0Y&hnej5l8yIhA zq^-0l-kl@3|G&YE{fu8Q{=k@;YXum>ID)Z+aXMoiV;kcYjH?;%WPE_}Npb75m@pq> z@)TpjNGrMCj2VpCjH4MRFisud@yk)7`=@<}iycQo z@kPPs1Cwl_A>ysdFt51r1;1M#mYqH{Gi!LZ*mIrTXZL4h7HUMu!V z3_Wgye|pThWbW}kOa5{!V#z`z_0lnA$*FoZ^HkNZ^-JsT81u|tHN{sPi&NvC|7!JB zkNr#O>~ZzCqZW(|AMG1dSa~Yh%=^C-DEPlBQTP8riT-B=`uA}K1=+PE_!MsD9$)c4 zDACy^8Fb8c!*&0$dbS*_nXt9GX2MeZjlkcjDpXhXeFsl9aCJ4DQvt!V>TB|UES*&e zRHy&1O4@hKAuCB73t5tNeD3w9&Q0p9l(J5z6r_l|n#TVoDZ5N6`*@%KCYc_mlli}< z68vwQ-M(X*OlDD6lWRbetNyitn%tj1On;0TT`D!YqqZBU;dND!h5hp0NzM!|`yeAP z_R*(D^;Ul!^~B$eQHw7coxABts=(E#z~IkS&sHs|LR&@`+sa*Rz@dG|)FoSv+n4M@ z%eZYEI#xXOh()vE?{o)x8ZBo9%D?Cmazm|#*Q1AYb;4}v_d>m^ws#$Kp~q+^aH`pW z&^`M=QOjExL;~bA`Glfvtx-~z*1U0W={ySb49ZO2sJrbt7Ak#=s8Lf+&0c!&XPIPI zKW{om%(2DYihr)BERlOsalijo!ohvVbSdIpXf#whU-7dIvaHqnkm$nW51cMhS8^5q zHM!H-IXgMZ$bVK&XZZ?BO+^Wwt!~b=WGAxF2jzDzIduu@e)g$L&X&y+$G=>1^0@J9 z@TY~3EuD9#@?3pP;Xe4yLbmrE3zK300aXPhHE(accCxcT9bx%eGH;FYY<+lPFuFdz zsw?PPc-?m_YDrhLjssmT3H4iRmd;Z%m)4xBzfhlm^pC z&s}0gx`yM~g{)KZTaopxv!A=<6q@Zp-VgNu&uIO=VuN$ki41i< zNr_Xx7*T~oSKCI^D+5AyZ^c!^b<2;PLG=SArQg9*OVttDfYkl!z2!froKUuxVBngH zziRx=$KNycewi(;IOgD)`^dBILxYl7!rl~&ZB|w~pSMnbU4+r^BP6WvURr-4&@Qnn z3+X7`h1cc{h~1qx!2YoTUr7VPcbf-02e@{VA7gh6d_<3ruXY37z(}A03e zqzq8@6dyW;>?(W491=gzNK*$~xaaAgOOrxR>e`}4cX7Pzl<4l&B?p%_e55RCde^rU zBgB%%m_n-++GNM?(k5Mf@6RCjYf{;Z=6Ch-vquK0%n{YE=nDy`*#G3`%n+YaMakPU zmo&u`q6jv02I$zO)s)$#4R?&$w13M%Du8XkOj&^7h;GmPH~D|=bpF-<3R< zH?a2drB9cIP_6bD97!9hhu1w}=13GUlCIHE5S)bDw2 zo$ho3I`8{`zwh_^7o?wi?pf}+OWmrju6yngxR$@_iY7Iyt~;t_4q8>$DWFv+MWVfQ z9TcxvdEJhaqx0|R|Jm!c^R^ zSF0Sa2Qt{=cN(l>i{C3~yxNO&I_|QuohU@jRu?lF39y(>vzcDbWam|`1@6rUFK$7e zXE(Aw!C%7j`0%>)_fa}S^OA2fLrFG9X-ZOe>6TI2a_O#7+5qkR`8~rIY3XuCMLCUK zdTNxmwM5Ih*t-^VqiPGTPVk;WagDyj2ex2k(OS|TZo$gx_>$2$*n*X5ya3{hP@|uc zVyG(Loz&_t^g7-5Sp-dkJy>amv8sHxQ(>UD1@sxK%GZJl=X>)My$R7C$RFhGtmrMe z?*i%%7X7Wd?;-MsC>OZ}tM3x_&rsp-)O|b1zd-oAbzfvMEMX5;*MU8{Z!ZOgi@-iT zS@vLc`TKR>G|G<@`2)IdGl#?|p%3c58|ctzp%3f6muPQ{cd&B!i0%usfyN5I(unwy zC@@Yk))~Gs8XPYUtT%i&u)qt2zTQY-&oG*g?+q$W_Ks1OHyFO_Nly_&n+$AG0s41B zZ#I0rX!sJLw-~-QY}&|F$#~H4eLw>x-nq))R>PM?1Es>RG<}zlKTYU$rmv8mO&5B- z>HC8GvZ$w~ZwK{f2>)i&*Maggh2CKLUI87!9;|NLZZv(jqiWcLmE+6Ixy$t7kv{ie zb@`i2AKx0n7OYE^gPTp?jjYjJ;cqp4-AK<9db{a+g!1#f5hcIV^j*WgSs?s9rtb+I z&q%Nbt6Shc)7Oukvq%K?o4#jhV6pdFW#EA6Yf6VM75;J4$JdRlC8B@AOulH)Sk0;s z{z=n!l>DW_KW+Lhg&}OsTCMC=TE0(pJR`A|c{i$zO;$42YGX3+{?Qfi_`aoq72ZE7 zdXFa=FHLIJO7Aw8pWr)9{wnX^Tz-NN&vZ3wwRexp_hJ`Hq`W-s?Hr~WBjx=CLTZ;n zq)@(^IXFJm%#o!lqLljY(FKks>KT-oA%l#N^m1A5viRM$vb3O>SVZl>74KU2)`j{K2g*TR55 zZ7ht1(vE_?M@u^&M5Ug#1p1YTbu|mcdB<}{=|I3cr4%yhdtuaj30*=J(+`oFN^6L} znO+JtZ^>@A{#N?)EV7i%h5DvHOXf7%Ky}l9pylba6y-aS)iN# z6K?8P=$z$w9CSg`Uj{S7&t|!TeP&cm$xyp+Tv5vT->8}p%tH27{56}c>DRe3WiZ$s zY<)w_;C@Jq#-E;TM-6VMXK;gZx`DmB>g@5v((jMi+r#m=e%D}e zFa#;S?%1p}U(+9=INWYl+D+3Rc8T%LO1o?NBQ7zzS!oYV-|7;>gZWWq)b3Gn7+H3$ z2jw@-K+ot;#hluJMr?$V^j8w2m3)diX4UqH>(on_oLr8q zOpWz?PW5Ni@XXb;_Pk3C$-I+oy5FVBBAHq2mRDV}r1@74P`f*qv;35+u&Vb za=`B~bxEbF6*YqQ* z{$|x~v;uyKX1Vm9<$mJov$LDtg*^Qmbuv@#a{N`WMosY)Hlv7*_szdx+^8zcP=$Qs zHhT#QsnGP}Zjtk}raVdYUt;aN4tCy+(9k>@^0Sm*)Y($C%pI(5{JE+{ZZrQPhTJ~* z#T^*sc!!p8+4Q!0%^?EDsM(g6=K&bH%O^|HiTzA{zApuz6cVC zA=c>vOj0fA)tkWAW{9w5hm#7EhNdw;vo7Ek$>vH7@jD7STOeCF z*>4pz%V`N))bY4F_+3;5=@POPEjp8akB}kfKG{0hA%JdHn@}KDS01J-?Qi%)tgbvF zPgSG?>Xdc%e%Lh4**&09+J9eZe@w~e953wT9T;E{@D*m)WD(J#xR|ZkqY^iw%BHq# zkH*B!_(S1Y#0@IFCX2YoS$rUn<~)eod}q-eMZQ5a33I`yX_z~r%D5a|3v)*_CMxj< zb3x)dm0lAhavo)zGH25!J?ND94R3!tu1)+=tB?uN;mcHM%R=t?htVio`8-imFkZasRZ_3ihaG zcmg$4t;)o1{Gl0giF;IfO)l{nH|;0xGn~@*3tQ0jwr98=bW05qGsT0<>SL8@`V?nO z|BeAQNh5zh{&?_Rd>(9P9-NnXa9-uH#RWCFF_|TF6b?$_ziTh|w+u37q@kT_F_>J2 zllf7>^YQWF8U~XquVXrgS_Jw#Kiyjtw@%yncCpdHneoS>bL!*}WNvO9MTuTcO}?Jt zyzptkV`v(WY6bHOU7uAnMKdh3h#y9=AD}1nP8i+FXpDI!D!1X+w;0vsDBpxa2u{`&ctsD+Bg&bRZ!#H(#lwWwwP^2#|xG?t-dW7;w<>K;4jX>g$e*#n)KH>&@b8-9=n^T*P&8N`Q;FIz>-QAkWDEBwrjS&zay%`Ti+c#h%gL zVozjDLcf$^mbEt}3uX0B7+st&rZ^>_#T(%?f^}uZ>#X9dOm~@C|CAssBouqbc>1MG zfB`eCrv&3H_~AsaI7c`I#TKdchcVA+i{+dBQbJI_jLX(y#oG|hjZ@~l6;tlVa=dHY z1#b1_I1RmiuxODas?bijTm(Q5CVoCXo%i?5Io?59G zm)W2Ma&|2EuHbH6Kj@4(n2_d#zAx}6j_-{x4QP^f&ffC&8Ogjr@~|;p_Pb&y%iE_i zHm{PZ9<#Y+D!)NQFD**AdhO?L@%e`7i`S5Nd}%-mqBs&fWC`aIF59@g-*C@+@jVK7I#3wJ&UBy5c9{WB|;}&?J(5#IeT~7 zX<-lY<4fk=WE-K%lAFYtXxqTV#zxhb9BrE2x`Fy>sI#h64>)^0Da}3GaT~P6+1tH+ znsdUF;_qzrh0mxtMViKyFh)v1mO9#HaM5OI;<m>HbXmyERRsSV11@O(`> zj_#xJX3n-QMq09%)5hagp+qg;{J4wZPrhrY`>mgn&7C!K3*jjw)Uwb%d@vo~Dqll5 z+V$B`i1w({z%vWXLU%3bk-3Hb&Z{rbv>}jZAuZ$d?i0Oy-|NR^0>&7Ivqgp2p*isy zID;s^-l*=fHPacrps0m& zBkf-ZBbO{JYT|S{fdDJM1)eU>b&XQ|&e)C!rL}2MVM?%-vge16d*mp48|XyPdEy+y z@4WfF#~*2<-5QkuQvBWq^urD4T@C2x8_=&eplce?pTyJSL3|ybf%Lx{&?iB&bGG2G z30(A&kb@3qH=uhsRYUsJoi!9GarPo>M7-8IXi<@uqbB&r6Crv~g%8!E2kC7hk24I? z0qr^GSZzVJy5bnQWzMMM15S58vk~*KdzrRq;j)=pDOlw*5!Hd8BxY)HMi9QwsXE#t!#Qvo@ltO(+M}tH z{dNxo$2{7jaW!Hs_`9ETZp>&I0=-rD8xU~Jp9=a#I2aq{YZ}f*tr6bSo+!@nz(Z#Pe|Xt~^7v_AmpAuMuIWMraOQ z8sZS8A&#h6!2u~44yb~mHObPCNYC--z#N!x^m+UX>k01U-p} zCscEYaEwiE1l=X_#A2Zb3aTddqNbo5VL~Y*;_3XQ#5DIyDVNG`pnRcw;p7ehcY%%= zxQ1^c1DC|jL|pfV02x(Y8Gz@U;Tjdgb0X-CMAU4n(7T0JU51(^ux8NDCqlkAu^3}a z=!=NZU%=m>D8LZv%($8e1G|YZ@QUDe1M~p*Qs3x&_tu1K>U}7fOXgDr(*<$m)wr}C zB5G+pOe(psAnK^-;p#U47#JrRY(g5GA;>Nuy-aYm;I)D`3p#>qQp*2H@KM1h1z!|A zBsiPTK&h})kb{Htoq~TA_FA4J3HPYO^i&!g|gq9-BZ7zu&1q%g-3CXx-XgeB@E*ZO1$PQQCHSo15yAHbKNkE-@ZZ1) zo9dKgBx4dG-CVG};CX`Q3yu?9B6zvrwM5kZ2Ei&~TMTC5|5Zbax83V*2J#loL#qyMR}K{7T9ZWF=X zM9eOG1oshP@D<^|C-}8sEfMm+2wJEN9cv;O66_+_JHiAMiUlteoG7?laJAqKf>naI z5mCSnp?3+sD*5jan`+wof*%r5fv<%hIVA~hB1uE7iMYtL73@HSLQi4`e4`N@EqICG z0>PC;e80F{@CqXIuNVG(f`283(EpFP3GFc=1fLXv1A<2d6L4jt1L=aff;|NL3yu*i z5xiXR24YClssy*F{Bm5ym}rf-D}p!plKfn{!7rnRfmqW6zne8S8%xCM8TN~ zox20gXZ1v5kLT16oFZ5v2v1c0Ji!XV<<7Tvm>H4lg;ZA@sBa>Tk-J&&LBXwpI|X@d zrrbWk{etQWg#0&zeqZoI!7l~BanaCzaPIYF1qNcQrtn$=Y$}*3$Zy%q=a+C|7s2j= zg@S#ZC-3i_5g9KeZ_p^t8#H2>An%(vbe9YA{)sei>WS)72~bVpx_X}(SqXzrwEn^mJ7}kTult&&Qox`;Pu1^80xDmkdKilxJhuc z;6sAj1o>MF<@nP(@j1a41z!_fRmW`Su*e>Suq+3rU*6_%oJ=b z*jBKMV0Xa;4R&&!qDUbkLqFU*xfQyz7xU2k#YD975Ms!EtYWlwQbyy4jH>T@b!3C6 z{?8T6BSNv0AZ}EZ0oP z^>&eU7olwYLc})X1DibDlUHuPQoS9YG^ln_?Q*^K9mT84Czbf{?&|MOTC4DGYd!v` z6P4W?N@#e={R(AcRe2^}^=`g8`cAa1-hhqqCzkxGfE2Q-{Lb>~lWp^lJ{lZU=K>7W zxGjOvDTpUiP^Pyd0RXFVP);?N&2em zU(eh%Z5MO~99(t1d1Cdr=1q=1TDWx8^+zL*u3GB-Ho)!GtF;`xdi@Z+)uz@t>aB5e zkaFhfD~Gu6T5BDDJmk>5j-f*^R;@#R^$-p6yW~ZASAJQX{K`4I=DeP{3WeYC=&I|} z2CiC{5Yk)G-l{n*I}Uz3(!iev?v$OyovCr=U3cajdZK*SoWntE%%PmRSUFX{5@X}E zR$U+Jv1;9_IibQ;5qK8D;*6+Q=hv`l`yZrteUJRMbA8U@T(7udT<5aHIoMUs<=1mA z;x<{wI5n&ah`B>&A}8iP60WJewyxi5uRYqJotmG;m8NkvU02c$ttxk&XdLafh+28$ zI?*UjA=)0UqJBuv(P}KL&FG1<7UXF|N-~R1!QF<0vro>rwU74xI zMWk-j(xY)_Q5_kl8aHxf;0{m&wpb0=KL26B7M^K6^7OfJ=3UP+8;n>w*7;1;r}N@8 zIcVL%y6}-+|6#CZ#@UKQCz}HM+>f9Ol=lgyQFqi zbmbDy4jyj7%S(8bN>jFQt?KAOwNfuIYR&IzOZ1wHSC!Y6_=fyg&MDD70kx;2=C8zR z!K06A9e+4vDRo1Ax=S=zz$QHHT9t(hDhVvr7-HhlVhSEzt!&~sow0@^qZ0a=f!~?Y2I~hbOv5!;gCh%l0EDx<+FP zZV<3WqZ#tBM&o6uTm0Ic;I7el9k&MwvPR=k+-fAaYc&1@KNF&BH0Gc%?75211RZNN zzQrAgSNHbiJ8Sk6FuT~!LK&CZQ(E9BHT!O)E9^hudE`?29}vCFUYw?BtL*)#>1z8y zID5Ix2M7_nsShUYllai>v~)fiuzz9`*jz(m**D`)wF%Yi~#Ux3gE`MlR1Tgk*dBdHhn^!M+tT9c{j8+R45VTAl3C=7wE9_?4OX+%YFw16xffz zm9X6k&K26l`0Q=Jj|%j$cOhM5uZ4xa_AW^7(d@=(w7r_m`^{(2l4!_(Xts$Vu}`yK z=K7UqHTzjO@f?0!hRpMt{X9H7pxLh@^JUHEQ|4DRI{;5!1rM$q)a)au@*&Nhi@Lq0 z*$i^{x@NZn9M+K;r|==7N_R&E5c!W14+0L_P!s_dn9?QK-zvnw^PqKhbQy z6aT4Z-+D_=$+{0Q%SAy9@E>`I{*X3e=ln0EmmpVl=<(0quzc>ife%U zozZ;W{z9+Q{TtB%-T^{myZW^p*8{yH09*p(p9bH&k@LNLU}ffP(*3`uz##7wMQ_pl z=fG?4U@@>&_uoqX5alA*0Qu*l8N5Sv&ULf3hR34f37|1w@c z#L_0iKL}&g`#YgG8~(lMZto>RZ!!E&U_^VT3jLtrf1dVAymu&jTMhpf3>|MN_!x-j zJkx&-U7scj>r6i%1bL?mz25X6qJgrgr>1`it1?6QH=BOGv+bQJ^aj&EfP-O{&>Kzv zz3l9A(Z9>|zsCyA_8#VX5Oh8a(1AJL&C0{groSgnIPY9Bu+{VzlAb5@cGKUA^7Fk9 zEBT$KKaDN2K=^x1e<$)6N`d=K{~DZn-bKRSZ~D(8f3Y{RQyDm5`me(2=e<+}j+_4e z6j&k#PME1&1LUm`{z=n6g8ZezKW+MFvPm!VKBMeaTK);-FY~hHQ9%nkB|v|5KnGy7!TAZU4iVP`n=t>GKccNc}`ezdw`Yr$Pq& zd}ZAGnV1Ut?@i<2_}u#^lxpN;`PZ@Uo&20|+sH)BbKWn#9&iGCygzss;f%s=@~GH< zi8U>Cz=#2w_oR@P|4B?r-XF!d?Qh3{b4s{Ae;W?$S|RRY0q-@0?36khon_jb4UL?9 zP^f_=%$}+2NslmlfdVr@F|oOOZ+DvX+N`>fQ|w>Hab=6{qSOHwY2HM8rD9gNb7CWV z9Y`|=bLMVVH%XaRQ{r``eM;HP*{r9IV_C^UZvlNV=oFzJ)Xzl*d}}Njm^0O!>KB8U zGs8ShQiaBxiT7C1cZqGn9U^-;B+~3B;cxoII9m*R%ggY~9tIKJo`Fxpj^NX>Z^x%? zkH9FXH0+j8tHdIxA(*@DXYOE4bfYCkO#1I3VCk2gqLJMg%$1dvZJ|Z6!T4VA^_6`3 zocpbA5Prw+~6JLIjk_>r`YbNe-Y#VR5 z;-1LHXV7i~%OSfNxOw(C49t8R(zt)%BF9SI?u**((e2YXfo%IIPA$Kkge>Us*NTws z#Ywhaw>tuE*6mS%jk>)Aut~RPqpQ`*pZ!+H2sBW%okey_)qpbtB)s0p+F|l$R&|^Z}GJxDj&V z&+dTLQb&y#iX0(i9RW}L|tVQQ*g+~NR1Aom*i7dz z;Y76tEtZ(6v-MCfEo~>JwZ!InHZ;>7LE|)XQu4wrB9CDVVsYSL^a2(K7GMzi9zauD z#rQ~iWE(ou%7=-h?YskRwgkC)(&PFYuwwJa56!+94W`@u(KDu&mI*USPwS6^-K-V5 zMo&7Xdolj(1oRnhzf}JXR{eJgK20r>=3v4|`b<9tm4KDB+PD+qncF}mU2g1#lBKsq z?J_SyVM&#e(}Foaq25VXNKQ6$Hlu};)=5qi=2X!5Rg#m+9R32EbdBURHX_IxftE?S zPO=gpq$OKPD~-qDNb@v&WK~Spl5S9ZEy$l4?WE;K8?;*!`bwkcqN+(ZxfZM}w0`Dx zG-OhhW$q6uL4Jr^xs&=#VG-g$@2DeHMYG7$;?Qn%px=nf0bS_Uc-;#AG zJ9`nD$hUMAKH)+3J&^KUMh29!A1Af!T1DB}iO}*b-=HX8_F@#_TX95<66{Tp*CCu4 z@vZCzZu)c>(~~DWiL`wunjSa!_`pdy0WFj~Wi#@davIJ{uDBf?oxK(3Tk>V>B)U+7 zLX(%d4q4d@0H3_vrR;1kic4PMQoiirlw3sTmjoYvU~S^V{vDJ!|z=g{U2 zF4ZQxh*oZNTcEAxyE_%-dn``IzCXi=$NCG@eA`u$-R$EC_OVs0i8!f}Z`#j>$i}G{ zFfI+?N}c^3yfiA9WJ63vdmBqzD$2@!22-eUnOh%!_EC%!V_B}^rE0!rNO-JBDhuQ} z?aRfOupXwl<*&kl^p8=Bo^o<3pY?D4_K_-4I?2zOUr7C`lpQ7Sw^yz@{Rrl5-E?sk(7U_ z`6y)+`Z?veo4yl0newelXK`z^lz+SVSEG=W?^K#rPU>CZK}rgIO8L>1uyFFHoO09W zqY^2#DxEcY95#?mIqfn=u6?p{x{JADIW`Isfjw} z6CrK?4^5qkox>gbtfsqPD0@au(7zwenewHw$2+c6l3xk8r++5~P0H6o_G)sUv$u1& zY2*+ZIpqh*9oU4eW8@6Md+W&lMY4zco4{8r5OFUQqy3+;_PUVc{nxO*hL98dmyk4t zoZ>GdX$e{4UrWm#Ak{r7xq#j3SLGm_fZ?BovpgkLXnZ;1_r#PY z#uQk`O_RZkUrL%WQ<0UXmXw0A>>CR*>1ULjG?HW~N!}wUGVM)VlTrc($3oK&(3y7Q z)0-fXeHF$T(6=Psta*U^@Z4Sg9Tt#4q#yyz9^ray!a-JJU_vh7Ov zuGv@O#MJFVh#2-)>Uv^XsD!zA2V~N(MkDEFBmv{jo{T2Z>=(h*?WK^!4N;^yO|Sb5 zqD{MCw0AP^J`U0BF>uD*#3WDVex&~VAcQ!vK7pEpVONFxeqMEsbP8&J7*)7?pe|M=i z*(v1h<_T`(w1xMeo^+{p*}U$XPxAqrk&~C5j&s}G<5KN0#ryz!J~q8oPFMD(a+{l` z8ZtVW&%K3HDf{ItoFY!=*<^g%E}&!b~ayhd&|zg5uIng z&A0Q+LoP3n-JMombE#nVYVuxpC9|^AB6Rq$ONO#n)65%pqDrjx?QFd_U8+s?&upN# z-czo%&E_xP<`I`_m;Ej(X1?uGd8jCLk~p_ple55iCjnYbKSRkrvnCfEpN+FrGe1NU z&kj-1WLo>E1BV3q_uq8!rxxBz{`Z`hBer^P&fdwcvTvk0dn2Z2kDUio z37S=dp_kgf!c`o)mx`Uxy}CUD!vF)AOG;CRbBC3d_rh&0+{_<=+BU`h@RMoWUD zu1!@Ht+*o=NM4R2M%5Cn>VE4F)H{< zhQ1x*ZT#qUtM47~#i$zDh9`>ESDhMFL)whN*tGhpQCu~!?RIpT)sHijQMIt`?LezP zO&C?<+un;_wFbD7Q`*k*;i_v5bjb;A2hz;>E>+%kDzDOmT&k>XDS3m{>{vBTOXLXO z2b+zaM?%+f^_492K+Jc(m@$pMFT}ueeLoQOou{>R!1X;cqz&Kmx7>3#>ijG9oPV{R z^U+`ja2|SxqP{2K)U{rV`ksIRWw~d0mH2)*>U%r=0&+*_bQbl;u^fMFZT&fToA)sd zkJ5P(p#k$$bBCJ|!t|x7SsZPhyzG<>hK9RTGeZf?% zk4TSv*)DM09HHcWT>+i=N>2LFeKU!sF&PzEw6LgR1eE)){$XOjO z_|j?9H(cVpP|zs3RY=yuM;EQvU((*Xi|({~t03LXL1NR8gbY2`S^Nj=v)tuaZ*R*s z_1Dt3t-ofzUG?$RfzWOJeL99yUj4Q4?W4=?JE)cPT|3sX`}%sLu{+h-ax*%|XE>w( z6iDZy>FyS;kC?j9dstXbuT%rPo-*)=s}U*t3ocSRw4=UxmAfuF-xLYYK z^AXkSU-8OkuJxbiwn31%z)jo4<@H;=+ZikECx{|(k|+{+V#8tEdGeib*3b|r9<5za zLyAdWBX~4KR+k4o=ds)ct<1^3u}8-E|Fs!0N8k?{hW13lt=l|lPQQQ=zjnUWG(CQK z{od~i=hv-$cGt}p4G$-!cInc!|G3dzFD)%A#YUIYm-ejQ_QT#f$!fjcqJ6BlUr@(% z%}o8Po*$Q2^@KGoj%+nLJhP7cmF4^C#mnbUpE_&N?1f#*ajn6w&$DJ%U^{C?qa9~= zpUxdMvBfa>xHqZucIvbxi?FSy<=orOla`2wE=wxPu;Z$;DZ^+Q>52WYm%0{Vzh_(l zEbg+>vgtAA)aj_YOU;_Ma2m>%3^Z}Y?D?u-Ou^J!x@2~o9$a(P)CQyF3q$NhsE9cHDW&z^|)=x{}moI8*+OXXOI4(LiPk&~BAp4@j< z-%r#6`%psph!-R^d)VYL^%&np8GZWnovhNm6V5KsZN%@+W^vBQ;aFych5W5uCtZi& z&jAK4_*I9ZuFW1cwO(;{t2&29oXwv)fo^sFL{P=3#kuh3EbhE)=zY3&o7AT-m~OO% zK1`{I4=Q!Olx8OOo?O(um0`2VW3~AfU0Bq2ZnxnK)SxGX5^gE#V|XEQ>2gFz-?8$- z@DP2+TNj0E^Hwa!Gidv7@{+ywY@f4=>1c zQfGu6XZMV7#2Gv@JUOX?_D4-!f=%e1Lsu1K?RaNqI9GSZJ_}==%EQUd1D!JC<_JbW za1MH~C-SFLVeI1aa79ww7W6ybDi1Hyosv1>hj+A|8%{Bt-t)ulb}XD9{zP})_=Bg{ zj_nJ>f7W-*UmX66?!5A4*t?_4lJLc-)MI*}`q5vo8}QQb4QkukNC-o|Uy4so0H4)L5|kIc)1IHMUInhgT?5|)Cp5|w2~brvhgj%%Sl|#8JA$m z*=o*H-9zAr_)NwN^MlG#aw6tQ#>{;cS8_(cO=J18f z;-U`>96EUD_sibaR2Jd2Q+e)EyMoycP|V3oyg>HW0EbLYc9rfi<{5!T<_%H)*;{= z%{UO=;>bmAgX!W+E zY3WZi;7o?S~&w5^kF2?c%SZCfiL>dqy^r+ zN86q2E$}~fWORU>vT&q{gRtn=_oM$_~rk{^|?z?a%BZUlrBu;Sa{ zW4N#ha&)0J{-Q3lgdB$4B4nu}YrGo)VI0n+;g}D z+Xp*)uQ+eXZI_1wjHRK4@Mk!wHyLTwr{D7@cLK?5mSs5IknQAO9`+~qmweU|;(xZ% zoD$|wu9vSrX{R|iGk;0F{JpS~jYmImN0N3;J&|J&(eHG+Zm`mwyH9vB6Yd0itKmF+ z!qY*eHyO?=NPC#S$SLiKkPJ2g7btp)vzGM118FJFJ6C%BPUZrS-wE^Mf$u%7VfWjG zMSUZ8OZj+Sfv2oK?e9QVme+(PIK7VupMb{zDj)&*W%z5NrD?Um=s`Z`7V>$SXo7RQ zBMCXkFB1N8q?>4|O|;Sm0*jqub4Xn)A)FaC7II6uqVMTxB>A!cG5F z-jz=+n=!9+MZBf+&mTQ@)QIZY16nqTvo&_c^ck}+o8iov9L}wNdq9$NXl*#X`n9wS zXF@5iADb5SPH+m>hKEMf`WC)}$-ZlZd->al-O=_$OnT1=eOTxdM4XqoXe7#Uff?l{ z30*EUm$6W8kL151`9BDa8++*C-n=Oj5WIj0gA)`3Z{iBgg;OlxHX`J<0=cz%Lq}hv zW9Ra1Mj##!grp!|QDP2)uN(w_C-WmH@Hr9SGin;(^@|3Ih~N(=!huVP;8zNN6OfK@ z$S_m@r_)9tc&azTH4QA~a9HyD3q77#;Lb4-ZX#cS3>w0%p~mgHlz~Etme3n7lrp~$ z93d9DkLnurl~s(z@>~cLnGbw!UXM$TLSA!7HzVST(1wUv8I7p&VHeNpAOKqmSpeyA zf)fO12+k2)Cb(MgTEUwI9l^T<|0MXR;FE$c^1B%ed|NU;75rN8--0Ive-`AAQPgWB z=oeJ0B9WgZv|1GjI!|bh1?u$_466_T$S9VKL4v~tdB;EnJ{u=qB3LFkM{tqgWrF-k zhVl%=pjsUU{+mMcdQSNd1wR-3 zM(~7-5slYe3UbsF69j#NyrwcgDA+(~b(u1uqv|CwQG;mEcCfdjua4RO=~WhZiN161+}%)dv*0el7X{xD{8Er_$y2_O$Hh!R z2Ht0WSnvYDNrH12hMEE^CF2gkzX(1d_@dxDf?o=r5>#OxU?(TRwbw&%fZ#a6>4HlH zuZ&2dTJS!>#{~Z&_`2Xng5L?6xN@=rX@WU|Jp=~`juV_NxI{2=r6j5a?-Tro;Ol}P z37Ytl!~*f=nZh1|rvw}0CYSscf}I6>3l0;Uq2PfgkY^;0xp*Z&;KS&0E2=I*G#&NV7?%KuVH?F!6AYp1;-0c5-br^F$kbH zPv|9rD}n0#uau0d1+N#pMeugPO@et!QF!Y5PV7SO~DTZKNtLlulK8_k&IJ< z{6@}vuV53wLct3JCkkFBxIyqf!AAuT3O2zV4(+xO?3g0we^@ex3QiQ9A-Gql zZGxKw|0?)5!G8$8Ao!}_n}Qz-{)=0+(%|=kwSqbxC@|j^%ogk_*iUer;0(cKg4YWE zP4Feb_XPhX7}0UV$bz^$fY?^ByI_&vaKTA}<${+9-XVCu;5NY>f=>y)Aozxh5$z+% z_*U>2!DQS;(xK*p?FG4xi}~jZjuR{uTqw9k@b`kx3LX@ES0VcUOUXDXn9#&6po8E! zg8c*s3-XONIxulAEJ5u7i$L~w;*MDQvi&;Q>`MwQ@3!G{F@F8HkAdxGBy{vw!! z?+A1tM=)QoNN|MU6v4Sbb^dRZj6VtfP4HR4uLO;NTR^H{NU*D5k>CiyDS|5nuNC~W z;NJss{=Xm@Zwr1Q_@iJVzDclV%>>&E&J$cNxK8jEL9Pm;-a~>r1@{TQm@eo4LCJVi z@IArL1y2Z`5@b|R8ukh{5o{sYNiZxpMDQZPGQmqDlBg8CQSdIozX)3h-rdc1w^{5U?0I@f{}@mm?gMW@Jhid!FvQB65J*Dg5XDj-w2)(w1ch# zO$7%Dj&U)f{Z2Bb3(gT-BY36YwSqSZa$zQGcBkMU1s@mOCCD{>lzUn54I*ya-d2eI ze~*cFn)aCpB;e~R6}TD~zcXnJP7CcUb+$rHFWr9XUni7$hDcFJtxjdjc z|IcLx1P2O^6)X{4Ah=raI>C*C4+uUdc!-#V#h!w16H(wt!v9wAmrObTlbgE^G#6|y zc%I<-g5v~B1s4mhA-2@CwSs&Ll?C1;{JRAo68<*9zcrWhf4>OuwLiu;? z7h*s#D9FcR%;)nvVkaFjFqz1gj9!Ah1qTWa5mb*taC%H}ezy&gq|}oSkQHPD)sqik zrO@ih2k7gCR!=@aZxmWR_yE0G=qe*b&K4Pdp&-vC!&? z2k7HMpAbAPs2+HL&({%odIkiu1Ve&(f}I4<5iC%M0j!>Iz`!73s3#nt#|q7N26;NF z2OGczLaPTGp!uMaeDz=hc#Y61DkSI)LaPTGpf?H4r{hKh8S04!PQRVZ0PYdoCwM?m zJ=g&Mh|uo}ek}O8;Bmndf_&$XXQg_u0rU$U0A4^wmSltk^91=;E%`kKxf3AiV!?re z_%f{-ZK_AUbY3&G+YnNy)@UN!oj{aWQJr5dN^;7w^mN|1Lq?6<5D`NtS1^x=p6w*a z6P`WXQ?M5i%Dn}Pi705GpmG3i4krzKo?rHP$s*dC_D`TXXLT8=AL5S3gDWx3gjCNr@WXgnJPQ=`xCK>S6B!lv{qkLsR%_b=LT~VkZ z!n(yV4h1zCz!7zBgYLp5CZ{eVvm<+SPl zExF?uk1>0Z_y|&U2Jgfsu62>6qWJ}gO!dyZ!t%@kz_K`gEU;B{`(JLY?S{3g3wm`{ zUPK~dos}7jxW#~2wae?r%R1BWuN8QsA9v_S~9QckX=L~F~N zmG3IQ>lk(I-%_@x^ zO?;V)w4CsYY2SIxmH2F&^8`LK2E=y?!hNYtv$kVa`)1Xw#<4&4LhlJ=tg*%OA*;-X)Ow@KADT~TxkcR zX}x3e!BZ;>5qio2N3TAKDq&+_6>SDPdoQhB6C4zb1w6Yhf{0FMGuj45n~Kpk*v#5r z&!}@UFW>kL(+#_X;nMOD4o&Nri0#Dhd^B@V?Fu@UIVi#?ILS4&h^VHwzVc*Vs6Lxq ziGCAn!uSScqu)7O>*#~4=5fs99lZyamxp9 zS9Wxm>C?JvRB8vuNAe~{5%^x+$=64OoD=NLm*Q>LIySB@ixQvnHYFAz< zafA|4ooM4n^E`(NF<^~@yHH&t!bnD!{ajPKQtLSREW%?Ba;IpmHCtiDuoV|%mUKmD zMMv=R(p9s~6Wh>QEe|54I>3a6bO3VL+{}^YhBVvOLXO+E*o~eJ)L#BnP3f@a<$7Vs z1!*N@YO3MQK~O(5862(SKMqY)XdbeZ#{D&QaPY$^{HLq(=*L6`H{{%w$byDMsV?tAB+sTMB zf^!K73y-*JhE4F|kEg_crxvhfp=a3p? zG5TMwWktt0kzZ)`iPCWS;b62ua~3@@n*}}hdS4W}sqR`mjYS1}5I13n3ibmut&ec47>f#aKSj9! zG!_-?CEUPSTxuPQ3bxD-W$fIJUrG=ajC&YckKxxAi3&Cg={t4u&;s6Qk!>*m)RavdX;?*oLX%&Y|`bn zA0=fUV+&AtGIA}ZJ|s3D?)4Mcf}3U)XGT|@;Nh{i!w zus+a0RImv!i>P4#0)?nxSr9=~uyas7L&p=eL z-=PN(6^uax5EYD($PpE+FKUaZVEZA0s9?9kO+*EA_-hTKf+fKlLj4==1*=58YBYNi$~~sp{ZKPR1!J%hLU_mG#D%gBjK~ymQJoXKS+p`JIyuXIWMHZvebp2#|G_%cpr!{*KOj`D9Xb9V$ zjhg%HSCQ@4QjWrct`E~oDSHscu^l-ybX!GUx7VXzOq&~2TlPCVBkhxDn*^=#UdUsY zSr*~9um$jANTfahKlFd;k?oLAoeW$0ab2aqr}Vcf-Goc`^?$qh4DF_Wr_wZYQvZ== zZbDV{A6V|o+RGcW}wj{cGU zcX)&~w}J0z`ePxjzzWv>6Cv%uERvrpL)>0_5TdH+p9$$t?>~01rhhJEAaEsxzYsDQ zC}9=9RD~jjP*z|RMuz^CuzLp7rrKW%*{kV%NF&lv`T#b@_mW*4cm^)(KL|OnDH|0F z{sYfqw!rqtY)T_%cwjv%p&4$SMhEgRpmkly@qq^zR6;j|o)Ea4Y*WZ7fpsJ;Axi>Y zbf@kSvMhZNBGl*!hFem3po0D5H8S89*8T^2V0<86PAiZIfTgGRpEw%JT9q_tBk(jv zncm1y{m*a!fdd#mdXfmNHv;3?C_bUDHv+k|pR7t}(6j)5WYklHzrhID9Ey#F-e?3K zX3hN~f0q&XkOig+y~zlyXP-1lG1@8*Hyh~)9H2YTKa7wAAr7Q~!2y*+J1Xm{Sqo93 zv6rr8;I&P}Q##G5cq%_P}mnD`7{dg5|D$k?naxLS25UM#%APq zGVj>}jo@`?X7gSqajFI%LQ|T5xr7=yRIuuJ)a&!S%D zR+kC{`Fpqd=q2_Dnh6GX(&OzeGb{K{3`g^CE)@!1z~Xm4r3%aq_969zOSK8!h^8~2 zs~y(WR{5 zcC?oH(r)%ljvai4)B*RT^9AQ(V3{wwJb!Qnsn=XyAP5BnGH|J2P-n#tM_kdY;BbsK z)7{=ZClu_5j*12{$PGTrc6iI}?KZ&*PU}Z*Rj#!Sj=`y6zU@-&fbcgMu%dZQ&Y^Yg^J*--1T=?dFgU40HjrNNC#H=hGnj7f;` zh%@B|I3k&;UN_pL;wl+ckwscodyba5R?Mv|X!DW1-h~|h~7OwHNLH(YX_!bY-s<6#Scr2Ea%~){e zd)(O4t>11ceH2rAFRGN;l%wH2^)5VvGh}CT5JnP|BAd_$7j!IcQdNtP6)i4%7TD&q zb)tN0Pd`sY$%#om$$Ff0C3B(mASFv8@^#q{}Qn%T|!up$>~jd)Tu;`E%|kxj9r&g5{=dTrDsIQ1+psc*3&X0fF{qcN@m z)>fT!GmrlGyNky1a8`u4|A_S{d2mN-rH?_`)^43sFOLrRJ4s=N%4*GFV(oTE$-K~E zoQu{|ltioosQ!$8vR;ji$`TC_-!YiuHlpDP^t0Xl1KLO`26Dt)Hc2jmy(obMmulTs_Nm{KIGy@pX$H3Vkg0sAQKuxFP(uS;@gmdpLKinOFJZyQgsWvLKaPp6mB~pM zT-PtVjp~|@lpE-qh?e~*`{o08;$XWl(v;2%sq51RhU-&>>%<2}{P?tLjOh4ms~1Dr z8pv;_FoHksr=?#WGc?e0hvmFB!*B{%gDmzA0Zvf`Wx(&opsvhLVF#xPsOx%*4KU_svXg?7E${hPps?`Oe{6j-h_$7 zZG(4Yaw&8B&ST5%_|e=Cfa|rJAR^U@pGLh%lL_sGJdX3aNS(!*5Vp5UEbzao)PPXEYtEn$9b3d zrFS}f)b+$|=$Q8W#m#!#!&?U3Y|$|;iN)OJKxZ>R4i66PLLQL*%AySu|+gUi1YLZy)$p~C)m!Q-}my@MFvT3 z9UmFQdHRt)=}!LS46mNcm>?NquT5Rh4+E{#R)qr588!qfe1;Y_^B^WkU*B)U`Us(> zjP*fm?WQeaTa{j8wXI$l$zhy{GsA?0T=D;>s%OU6z?q^PCZe;LRyWXiNebyT3|OZH z>&F&3({)~6S!*I*SW!lZEmZo92q$ghqh0)3h!i`s`dFoEs{gm*^G z3Faf+9e+sM#Ge0`6we$~VYd`NvA3JHh{YRA|Q#akQJZiDQ4GP4lTZ-W3iJFLKj1 zal&sXs+viO!T(8#N^zZAN|1Q9lt^4(zr=dIs1yf@B5{bDwur-3dW}UKS-%(0G}6UY z3=%m2(P$R2r%JD}i09TfQZE>e+uDXw%;W1iqusPkEKz9$!`ZY+4{}xw$3p*L?o#c2 zH!hbbGoQH0P5X$vj56>KidV}tO zuLQt}drPJqMaRE2Gu>JHrPa+j_(3=?^0H4Kc8`kxq86^>>(;R|a=uE5%2=@=I5&Ir zVO`z0F|oW&9(|$&%ZUZN`O4OZ&oV6B6V(O5c_=ZKhgD!)FOOokB*ijgdG96Z^5>a}Gv9%U24x8)#G|>Lc>!Ey%xeIBOP(FMg-X>ejHz z?qkA+RdCgK?z-vV79qnc-L-|XScqp zPuJfNm}EwV_cjYAL1-)0=aY zcqn1k9cK9jW~&QaM=Yn}qwxLK^zzb6o#4meKO_$vH!y!{zp3X<9XfW*0_UlZ!vlXU ze9#W#ld#uxT8%60wqw}m;r+VvX-~bIGwI84Kj$A`hMU|rtiX2ut1O)9y!T}|)mi0Ct|2nO$j%1LSKakIpd}jHi#4yxTxR20r^u0cc0ord7#alS31klKM4n&jMAc( z&dpzkcRQ663R^f={WF~DSyWmvz1-O}6mb?_|7ZALJC1!54jDTZe;ckgoWD*jOy1G? zMEGajxwW*=?;M>7dg>41FHGmDFFY+GycLO$0yN@Rg7N&{mgA)cM zZr-LY=oCYDKyC1hig6XC6-$>4!c-Gg^FuAtB^F>RF3JZYNU3t%Le4HRR!N*ce^CVj zO`S~yWlFS=vi>V7W}IEfx$88h%;TSiJsr+!L@e|hFf2~rdHVqTmsZ5Fojsr8_APiie6ERFI3rGnLn<-vbogTD^V)DXMLlymT;WlXww#sU zhFd4bD(oyf84fvDTx>q=M$77SQ~Q9E-?@+F9Q;EwD;C~rigRpQ$BfkZ=ziV|)h-cLBwZ2={FqzUTYxvv9qlhlH2<<_cz;Iik}R@?}tA;+QzSo zE`7o&EiX!Qtmk_LoONHBsd;g7coG(q%YX~`A9F6t(Vy>?;cQ$L_IKVMr-Mh4F`eEG zbb5gfG0v6KYjxP)es`Q2o+QT9814f9V?|AHTK&C8Mge2J(DUfAFHRlLIb-UVH&9=s z)cdS#pnf1u9nb4y>i0BI=iBMIbh^)-4J;gn1wS$)>*(S_c05S!XC?mC3gY0$Am;>nF(R+JY&EgBRrqzw3Y-epZqb^F@7U$3ly)yc63z>KgUz|qE zI2XABCEgJ(92rj+voC94ArNPwmGi=c-pxHhJbRr$VdwOO-q>U>P9i6+jK^UqzKlgs zQ)Tqw2Iui!=E6d>Guy;j__TqAeXy{e1s8nSz(P-02tl(S{@TS^@IoWrhv81YmEnx^ zwhglRt5q*&?^kAkD_wZ10@QK%*0qHh=@T2sABKF18>5aPI^ydx9-eH3Dn03hzv#KX zu7Qc3UaWvpk;?j1HZbuuOjL>qKJbW|cvwszOC3kx=xS&0?-3DcEPUC(!s^xTGZ*@BUYrFwql1nfU2qluoihe! z#Wem(8s8jQ_+kGb*}e%1M6kVk`v0 zg{eOTCOCV?b;`0X(X?4^l)#(K!sQ;+oU!B>W3G6K?oaLrntr?aD)w9n@*V%dUbYB- zd%(y^E)_Z6TN}<|>Th}-`YRrACvqL&~QpiO+>!Ko|VZzO1|qw74o^YR@{-MHAZb%Ay?$yn_+VFsRE0$ zt{mxFTan2{j^TWJrkM;aEF!$6M|({>qoiiqsCpuL$6jfAij#eg(Gu{}2{YTowinL) zbBt`WB@%tUH?t$HR2;9UBbwGqnppI*5ISu4QbJk3d7?IbU~}h~ibh zIofCsi9GMK4cw`ibn++oVz#GKKbZ7(?d*AQ<i3no6zk4FuqRmve2~Hu+h%oVMnHCqlM8)KM6fi(=mhIn;5@N)18ejLLaB;qedIU zguyG0FmA^3?PC661j7Rx#$1crgENhiWyZg~K1g)=ctBBN^5+9GcvB)P@~i8X=B_{M29^WxgX=wXoNM89|%(abrdPZ4^O;AG#7=x?up@l!+&GTS53scKAc#E+mAY7cmH`q8ahT7013Dtr_J!6wGfvJJ(oBbt0@t3 zR}246!JUF{5~ribVJA%Afrxz-H`h#e5;2a5dJ$MHcolKF;rm8J{AZ+*@Fyagg|9r( z7h^RMv-Sj_S&wt1%n$`TT{2D<_*&A~D&0ct02hf8zY`c|MtjJZVc;!pA3q@$8NQE1 zBrIjdNT^GW0vtyg)9EZC zf`wj_}!MTot%hd~6m*pN{zI9zayp!PI~_=!UE z(u?x!0;2Xb2;{4Hq_w9(AZ?2Dxq`e%B7K=){0a$NEx1YWRzY49F@g3p2;3_4qk_8y zwWmSE?-5#i8U+2O(C-R07oapN0d{3vM9nvpP7kP855?P(C0Cp0gQ$S)Dpo(4ge z3#~m3g02#Js9>$2K8HU(F2e_clO&=}P#?$#pRWuuBYhwr*dVk%kPmvT(Av`=Xzghb zc$M(Ar$NxS3avd2g4XBq;|OS1gTTi{;Az1p!PHf)Sd=`S7;A|2wWoxZxZAc3Kjn%n2uGGv?s_dHtDv4F~Kf^{R9UJ z4ig+HI9BjPJpR#&CJSSR;0nR>1TPo7P4E%Hrv+aT{9I7GJVXJV6kmU?U?;&of-~Y0 zSS;8mc)8$%f_!VAHGV@-yEp{>gU~!I!1!FjPJ%Up;{}%ro+lXJD1n;=?-zVR@MXdG z1P==K#gfeohYB7iI6-idV4dLUg7XEJ_!u|N5=Nuog@Ts}{!Z{(!J7r|5aeM37G%5N zZoxf*e-nI5@FT%*G_wC4Ux6psR`4jneuBpcP7u`J8%4%*gACs(!Qp}v1ZM#C_+KQ9vjr~^ zyjt)9!N&yuD)^eJONe8!45!QZA0~ohiD=gGf+vgMbctUqxQ2*-=Lnup zghK755*gn>8h8g08_IhGwUYC^j93gmJA&U3Ae1L@-K(V5!7c2v!q2;U=kIEfI1j zNc;@Jxx}O3Pe*VG5pt^~{$h>je}3(b1=vCChHbatZXyyqFY#{)>JN)Uo*!&C%dp!O z3=tt;Kty~O!9K(uSXBiF5+TRWzU%RSA_GXE-B|+ptvj<94&e$m5Ru?qky|f#z2Mz~ z4-#?P>|w!2h)DOO#J?i=55WV#xY-ZBPssotA|ipAiGL_aNH8kcO>lr8(5rwcA2 zVo$$Za3ygpc1lF(-6(idri}l4g|Soc1;MukKNtL`Uq0XA&k(^z!ApokVf}*oE8a+Oy~N)osQqRlqi0Chz*YobB0~O6 zk^5BeuwVc~-K@nYQ{xiIBqBjR5eiEMwLeYPMCcO*X9+G9JXdgo;EjTJ5l0)wy@C%C zk&pg-H}p<@UIgC~{7mq$U>dHQSs;EgTNg~QpWtx8lLY4ot{~PYj_aShB8~~Q&HxFl z7o0D+Ot3+)QE;u`C4%b(uM*T(bkKK;(3=If5;0fq5Zn#?Uv;2n@G=D%=qo>9gfzxY zo?x+HiC{NH8;3x-FnAG7x=OG{uvT!K-~_=bf^~xW3J;yLj5JVR;Qn9-FA@3* zh3TJyR|#X2;4O*I{{Rnd`hpJ8JB0l#5i5$mkOS@$`c1+21@(m-;tvR|uj4@fB(%Pc z1MTpt1gNj$fV_Lb6{*+W=M%A#EfUn% zYoJ#Pt*_TWuhTRpfb|k_h2XVBW3;YM0JQUjI?-CM9quv)NIaEze7Zi^X49cY}_#;9Zj zaK7L&L45%SexuNQE=9RZ1lJ2*C3vmiokXnBTLiZX?hxE9_>{f?gy0@w>=k@daKGS3 zf}aWgM8x9G+o?pp-B08*8e&8+Pq0{!&tMqeO|V>F0D@5=j4Ht~L~I7e2~HH8A~;L1 zUT~4%GQrh?je_e0FA?NJL~b57#U-#=@J_)81h)$A6x=QNtl%EOeS&WazAyNZ;2~lU z3{OFu7mlFg`Vtj^kT4>GMS{hGrGniAdkfP22Nl&4d*M}W!3lyB1?vQ73C{O1ZY&Z; zgWzhxwSwyedH#;un`;Gc5!@`eMeqT^9fCUrpAyuU($KS4(-{BzB;q4tKiqE>{6_GQ zAn$K7-WJRdFiwFj!q_UfLvXj?Q-b@5)!5buzAyNZ-~qvJ1b-4V zc&&|ej$nphB*4WH5qZMkK|FIP#-|`3e3PyatQM>h93wbRaH8N8!C8X!f{O%~39b!H zLk2Zi49Ebk7ra7H-*o_glhB(5?-YDMaI4@>L46kj>7GrzSXmK?*W#+3F~H9R4+tI- z{7KNpu7+}sAUzA|j^92_P zq7M!8Sh(LDoalIZ#ke6DI-AIXMQti;F`+`g?A>3gndG3`GB zEp-<8Xrar9XqlVz3Wz4zK?YjjRU%s83t}}4ozpLBJb+k(i#Q@`sK54tnxTw_c_QWz zBI2rqMp9kFSwhznQBmC$kk?&-3deO*f}xudHGfkQ>?cCI-s&UX;m#H_|-a3PEhyrN3A`=L@n209SJ73VX zq|uamhYMQoaM7fC;|lsJ#-nNV1{L&9(tR-X5J7)LL`!F|%Rq;S1JM6^;|N9t8EE<` zB2Y)HhBXVljyTkJK|lq1e}^v7+cwbq7>};e+cVGxyAWMe*1KPMU;2fWzg7-o6CL-O zSt&is`}XUb_-eK49M9{GlyJu2Ln$7Xmo_bjP#mGbG$zG?MRYoTc;a#pxFFXn)oW;S>(S@RQ>Bjze)oy zl=EW;GR?y%7W}%la3f2PrswJcHPrh~SAEx`#$$U>Yh@(P?OPch(^!zITcPnmK$f`)^ z`8LKI%7H%{Zm>|>Q?qc7Q{3m>4hG!kjpmU1O$a}2M?%n2PG8(hfcv}?U|sg}7~yu; z8H_Lk%P7iknA(Gvkz=PEl?kE-^7fDmG$+s=BO31W-odS5xX+u*o04>&_cA7p7Vh(|fIvW{4*nyG<9v(qFLvnJVTtoFO0(4A z{I|?`6KT$L_!M`!a|epE%2D`T?ex#4`@FYMySVcK6d6t`N~D~2SzHI42OX9YZ^0S1 zQ^uk>9Ez#VgGdl?b|KbrY;ZChenO^=b24NyozI~(vM$b#U4so0xMyl9f38;7CVjJ!CpLpP-7#rY%nT^-&+ z?dI%4s-vBDNY&l>1M(_!dg7%5xX(L?=pIgI6r!g?7l^%_>By$HGYTc`<9q^jeVsmN z-hR%bsC|XA8L|DH3!!L$GbMxW^L8PdD(7|Z2ReL~Kgi*I=)n#jDDK2nB9!hjoGHi@ z?(@2#hH#%3MseUi@0vK$!hIe;odx%Kyd;MEy!FTw?(5BGU}VS{j==c2Z7pT`$X;6Cp{ z6cg_AJ{9+QbleE{dDkNa+~h(6+@+C7Qj|`5idrPG@9O;am(OYE;gdNV`)x{E&>}yaw5jb1(%1A_;)VXK?;8fyK;4Gb!g& zdKq+HMgJL2x#rx1py{kf(JbeCbfN8d_zf8L48D`$9ONV1HuOl-;QZ4@X)?#2IKgm! zegNgiA|4tGXL0zmG>pu!?9EwO@_QI6w65wS9`@FIA(KFg(~sJ zv1E?Q(z2zYaW%(5v#Z)_y4vf&wCSpYCTl(3VRkYk-#U-C?435Mn~t3o8aHk{oT*9d zBJXX~)JeQvRXH$zG%Mw)zQ`=A6M87a$x&;N%DWg9a`F_r5%uyu1JB7DsI z3KUxp^)kXe(SlB)8Vaf4P$W_6kq4OKc>Ea7Lr|<7{mnS%3UsRFbi*(Fqy34`xzz59 znCvOAlzN)iiq5IpZuq!QITzvAbZ)?}%Q8+gN6C?g%Z1 z;_5r9*@clP-W_xJ{+D=n%=sq^>w9<1ZQ#pr8;&K)yR0c~;3&KP0k!W?Vhp8nWI-sYijc4=W%Ch(xnoY!{Ikov4S_n=OXG5xBAoxvA5(|34mdz$7iQ$E) z51b^@?V)`w!tP1W!2cleZ3u#ME6K9y0>8;#)J?NgzG<5`X^ zJ{2j5AOrV4pUNv(g5tXm_*7BB5Ni38PjxRY*h0~*`kjDSNx|<)ZS$#)1zG4A_YsbH z_$n-TCp$5CXk|hCM0B^iiyJmGb`ps=wzVNJ!!LV{=@*AS|SXhkv#&xKFn?+Ec;lA@Y>)V+v{2qg>FK;oq??0s}yWsbM z#FfJ;yT?yvF+RK)T(10v+GV2SvGw8){#0MIUlA1{hGDqdD*8PmcA5IikQp17E0oY$rUi>3xRd!rbCAYbshK5Uenw_H#mjQ*PR(T>B|_+GF&lp$>W;XT&WPuk%*7__yJqaexY z0gYDU%PnO1e!q1sy({}Ni9=7PR6YdvSrL_Zx_?>_-*<8|QZaCn4zVhu-3{$CE4_0@ zlgBJvJ#;q)XZ#C(vG~18ADLyQCAM`@#Z5l0df2dPEX8PBV@-%iYk*6Y5V5x()^1!X zba;)OSa4e;ugOPGE0-`jeHTej>?Y}nP-IeQq(m5nrL5O{}0`-H2GU8 z{V)BkOq+Se!qdBJCo8?<(`GN4b4K@i1LLV-!OY$*$QCCsw1bwJXDm5w+RO#LAxxV~ z`bF85qR!jUt{%4*G0w$T%I;J(`_)#QkAKDaeMrqd&z!b zaB^iz;=0e^c%yV;<#PJDh$dEBRcTkAQknYD>k})_vL1S3O65H&G2-BW;6v-DR^|l~ zkA0ldme0JJj^Wdl!b$(;7(Oj7d0d}zC;VT^b@KH!JG2<{ZxnJaZ*l&gc@G!Y1#nGA z7Zl=JA{gLp=j0y;S97w~aU2aT;}Z9tmeO0C10?P_uCnRu|4Y*=JC-(|{ZIM~IA-DW z8S_sY$!;Eh*20;|_-#viz7E) zxj2RiWA-2?g|*NJoK-`j$1el2lqS5Z!RCUc#|?0wJ`tZ7_nfj5v+4(h5+x7!iX?Wf zj)ac7q8i&wh#ZA~M9x*j7x0fNu-fUryu`g{@btXhCZtMq*lUmYmLlZ|^}Nc>=5Z9V zlbKh5(5Kf2jzS1aUDMyS)x0$H^Ts;fl=qoOXyBcEeUv=$(bis}qwZ{x49ja%GM+QX z|4l_+op|TVl-&La@LJ}&1Idda#u{Ts*p!@a+_2_)IR|dm$rA_W407CN9$R5!<87hf zo7K&Qk0c%`A6S_305mMphpP{i4-6gs86@hVh#Ap>lTFL#36O01D*^p(qW#YteB==tx?(dtQ6KN+>Asd4s>b3e2vSl5p0qS+m~w=M^Pr(tYnXV1hPBYpC>q+e z(7?|wwrnHb16!$2&CZy6gbI6{VN{EX_AOMb6cy#*@$VR%cN)!pkUy&Dzw?ifTVLiM z5dN+3lk(h^bknE469;xxgu2uq-$q2T@*VLn*?c@;0()5mmi{a6;hzegjZNJ>iRsg< zSa1(#T*!0(Q;}GFnOT^!XAtg%CU%|M??RV_qJW$Ves+FJD98;V`J95yggzC#XCcnz zp45teJWc_(#T8JCzksnsL^#{ZLE+FDNP2q0}2?U$}(u}JU$DdKzu5D{} zy0Kkkuo=Z=@H@y!viMHQZ?Gjt62ZmCpZAxOuH&%Y4U|~uqF<@az zIB`i@n>L9Px>ke}n-*2JN!;GY3~Rwq;+=0H_)H%&6lV_2e-?ZXWHV#@aTf4!Y_6}+ z2+&O1c@nb_ge&do}{mH2&3%9&B&!*1DnW|fa=uxeJ6CrbIqiO6>6c}ce7P#!Vm z6$BYbqmP^pCBiPo5OJ|g8zf-3}93tp7yKi?W0e@(~_1V0n}TJVtI&w~2dG_p%W$1>ZHV2)ssU7e8@Cu>z`9sh*aoZB;#7an*=ut-Yv*4l~Hb|;Io1+ z3FzI;K1i6WlWAodaj{@4+XyyOu@!bXCxRC93nVQP@ir?`bMGG3vLqJBDhm< zkKlfw9*+lv(F;okGaM{9TJRLXdckFaalwlPHwY#KuNVBIARl^B{}X~Q>f>=>{9PEI z3mz79u~BD&T)~cly#$8{>QilyJ5}g;f@cYC6y&F2sPA^ct@?Nz7=IDQUcq+-4+#D& zn33Tt(5KOmu2ks0f;ECC2-XR%7CcAr62YtD65#Vamh1sRKGi4vrQr8OJaRiM_zSTN z*ABc}3%NW&exiuG?6c7Ch7s~~UkQcj;X zgIpEqVoafeH4;CXi1-tTT~K4eNfKWt@$-oh>|T}&<6L4czCSPY)q=MX@y^(tLhI9K z*fc#V^k0eCCG8RVEn?OGKN!^Q|Mi1GJGn7}h3O3z@L8et1`G5)q4fp}^k<}DaR&qs z3H~IAo1i-05!CxASRn6C&=U1N3dmaxpmY6=6d1il081o3TaOo!%RFRPO$yo761)6& z-zkQIZcGR)7e%}(phDQLE>D%QH{oeZTt5dtAR2 zi8m)#77R}t4WVL$>#u2e;-F={abIY-|CwogUj3ZI7bQRDj<+E3*SZkZU#l<+@x-A` zvE~;+{m*|N!Y8~})*W7Qc;%1v6Wgo9*1@crmGuR6{8D)Q)I&C2FUgvn zk3#<|rFoE@q}4Xb%4?sjR6#v{S0$??-=2^ER{|36f4II`#Q^=O;^YVH{dY_8&MC84 z-8zfrcTfLSe4H-bX=M9(FRoU+NYkY9Mblc=Phi4+o zdE4=iUG9%D8$-#U9_keO_8ubKmxPR#&x8#kPSS`_0NF zCOYEg__qg^til(eDR}pOKf?+rE10{g{*8I37?tzVYpxz@?mJl*?L_}e-+LzLmr%|9 zCusD4kJn-UcbpE78+CZzeTNSoJUnCjyrEx*nBmul=aRF1#xb=&%-c41`&|8%@ZqDj zYr$2`f(LK@b|okZSI(&ZZfj3Je0X|A?OAhwoKrcM?NcG?woh-$;H#DMvWDw7l#Ra@ z-2Cm8Cy3_hsBu!?^wQdg=M0#$Y7TV7e;NDDk4q2NZJ!tTV*P+aU(8;a`^EY+DmRCx z4`)wi-~95&Ml8w6y79%2@j6Y5c!sUv+v_5=57+-#f4H7>rmlaR7Qf^gvAp5c@*VQ4 zf6u?y24gNlf3EF51TPHd#jA&A8uuK;%YS%DxQ%Y>tUW=EnS0WKvpTTT(rW!t>1h1{ z{cG<}(a3yYQb+tzpLs+)d6c%LPtDPV@p_~9suB7XW|r!~b=u1M*EQ4|@^7kk+v{ddHau{* zw&2FCZ`*>M4t7Hew)Ndsa8tppXyS5Gn>16t>aGjB7KOz;wfOK^)&V^2>pE@^v$BSp zU2|V#DEaSDT?{ooRPVQ;|J8EFMOlBBCQ4vB| z^=gB3q0tKCH#B;3z0o!Dn2H&(*Y893H5gqpH1)=PS=Ddc$M3rbD1){R`Q{+qwK0EA zD4y&We`4_a$PcrI4d@IO0X1Ek3>6GNyeezh;iZRHC1>cy2al9(8E4!R9o=qJL0vof zEk?L_wEv4X$ggiVx?oifYUK>~hWoFz7lO*KF91K>ichKh`fTuNuFdkE=7+#fYsF96 zR@Df-6dM_%eKf}U7=m}GYH5uoNY;k+?lQV7O50U_yCK|dwExS3bVY_8T4mT-7o-#T z=-(Cvq*Q)=d+-Zd@!Q6AL=hrdw*YN=W&H{3vT6?3d9^?2P6!ER3bsk|Wso=300Ca& z@^4d?kBj&$<%qw=2aJ2-3bVu`!;{ORanINThSkjB@&`LdAzSjO$LDhaNv4){TCZS1 zZO9q=*BZVGgEKkb-SD}ya`qP&uDs#%z{)4TxG>HMaKMo(POo0$tBnKkWBj$(8s5L| z@M0r&cxfdpUA?Gc-u}a9sjlW8v#Y%)u-_e3S)Wyxx<3FMUuW)DkTf2n33AC#uFZa- zxt4R-QX6%|o0RyA;eIZPlm4@krZwE3A5&$1w1%T_d*IF!1!!3zzY+~-19s{0b63{C zG&ilr8L1ANU#*;9f5M!54}bkNC)&f9yIPi+)3d);yDZ$I#(hU zF2()JdF^nIu{1GlZoh)~v^3m}+l$8!hHVFWkHVw2{TMB7;j!eX)B_dZOvP2Z+jg4f zI3w`9!8TK#!Ns^$ji-oi*9JzIf!m6~>4$4?ckpk>u~VMu3C?q!!5MO`<^()!*=+|G z3539qfw%);#gTbhWGGnHD;*Hbp1`0Qh+z8#48}(y*bVpU4C^mQns)RC1X0?KxX4Jc zQ|<3T29&LwSwm14l|J}cT$#9SkHL*ncS0s^EW3j`;VQws4||Ty=mfIb;+ZzpZl*^kl@hr6vK8|Nv{oLLtM1|X?J??V5_n{gC+!xSim2LxcR=Id=XAE@9V1$F*kE?O7 zG46JR(w%s#6k2x~ZZ|Z~O|XY|_(hC3eB*kic!k>`ts`wc4clHtaX?q$Or0p?!3ehTI*hC6Ft zXP#Yg-$Y?vHQXOipM8dVB5eFMP-vjn4R& zr`soKc%sk(bg``kY+qnVl1}mI1`Y_>=_dzX2A#PcotQo`z;l(E!J!DB5@3~#&`v9TaNu+_r?(g8o?flPc!$?3 z9|m%Wmf{=k-ddP%`cR?QDz6LUhY7t-d41bsq^H*ecMg=vz#0Glo+7RG~MU-XV6?G@c%T8`$>K zMWE606ei~M8A7kMykf@B6ndTIT|fo1k|njgcZ)%vCh_YnkNds!(}ljm^4c?gw$N8u z-q~!5c)cjN77W-{`WzA1WO)}+U~b?^UBFwAA*T8Cc@n?H@-8JkU+4!ck56^e7X)6^ z@>?zMYu0$7#P75`e!C<649Rb|<=ugqAfCQR1fH_I+bOU(@P=0KtmW~$p6N>@{($8@ z$oQqA;2SG^((n_E^kou%$nthF{!EGg$?`U{LdygH(E1u}@2`ws5%@&Yo9yrj!%m1B z=?#Hze1Q~?kB`&O3jCnyohjiHju~&HuMAjdNsOmd?;Xak3OJhHnd-ekYg`=&`|$xI zI1ec^IQoNUGSnWS3`KG+Nrv=rr+Mo6#*G`n>lt+seu6yOm~nhkh=!qsvW(#4jJb<4 z&n9Jp^bF}M-_OvE%>R!zoVO%lgn6+?RRzSnm8o(a23e+B-Zh+B>BFO8Q$O6GXD@V25gvBzFeCktkhZs+bJ!13kGSJ~Ml=0UqBFcjwIB}*846E8 z+Mk4qgvX7?^z=_5^TIVFCm88Ji>e~;jS?jNMPiE~jI@TsIU6TB!o$abR6>?|cVjh9 zH{(Kg3y*^>TMj3CGgb}?Rj?(pcX${gQzWti6e3e4vdVA0fTJJi#j3qdte+#Xi^9WB zGSXd#hd<2NGR*jhOml7nX~nQ2#Q%nEQ+m2qZN)I-pGP`Fr?z6ZsPK5^6%=|i=#xRW z5&BNjC|ah_SP}G!5fXh^5w_B@JfX27JW4t&^bQ64zY1l^7(z?Ei6M`nI~iJxP~;VC zOwzL)K9_}MwsWRpLia7RSZCT~neDaCCd=#~v0|AqA;mIFgbc-f)9fg;m}V!@mFLY4 zBm2%0TjV!&sV;;WEA|cbD5(q#H8>Nc(?c&Zu^I`xIFFzr**nwwI((Am8)iSzrVSJG zPleE8nf)biG0XuHD~4Gqq;Hs2LWyAx6jBUxkZ2Oa94xV7nAMtuCor+hArdW?IaEmB zFo%gMG0Yl?q+#~JhCyO0yzeokrw^CdD#Z50c0ppRy<4%3Pp_5On((mNVVM6%3SAqn z;aD3bX!9ncALm>NQX9Rt z`Qvr5;>|{Xf==CR^y7t28vO*JlSY4{&|5GFSn`vEP8$8mIs+?~H2R4`?|_}~d1^)v z*mpd*fkAEb*D$1w{$yBt`Y8_2bmdI%ib`Z`{yQSw1xNGJ>q7jR?v41h-R<~w+@84X zY&6|51lzDa>kUPZ^VzJe%)7AV$|=LBv(@qpT=%(ypcRL^-QU(g8Ll*^3z5&y!sT!QW{`gjVKE1w z5-Rv<9?Ita8O1T&%|)!x(OB9{_k%KCX}i-PWV^@4cqL)c>2L7hhe(`Tj@D=h{_`s& z&f_`o;LrY4ZiIObJZLDNw7qVaRD-6XAkTp>0R}Cl-G0VGdddx^D1T-z#vEV-Q-vz= z;+!voj^ZVt87mEstAS=$rD?KS@2`XDN;?Y0N!l(bQ7}XDt<$^fU>l{~hsI`wc@8|7 zDY1*Z^+5=Sgj{9>zeBO~e!;i46l9UngMN7YO+-Y~AcIkcjz=hRFM2KLsTfk`U)&$u zV2+xLSg*}+MC2)UKPTW#B=Z%`ixY4Utlz-`#a8F}@kqQg=t5P7l#z3>yqcZWljw`c z6%N<`Zi>FE3wopdl{rK`3n}+jZBje%tK66HYq~rpXt|H#`qFm)iVjP0-$FRm{RY1Q zBa#J^H%F_>khov~>`R$9sGq6nN^Qn34WXtn*rJ zt&MHQtc#FG5xuKsj;Mh^l@(`B%)i=tgZYm{bkCoC3*hko6sNW0slYN+B>x3mEw?Vvmtw7Frd!pokYPWJ%llY0W6L6~ZLVV&O2y zEH(`~Hj72nJ=(q-0%LRrDElc^1XodoLq>r)xuvF$G2YFo!eO}zKV_@e2`A5t#f`!{ z&|T&XVdYRrdy$&ub5u4tFJmn*PZN&rgx#3Y%zB?=>n4ALT{lN$(wXXh^u0M(IBDdJ zLDkI#KF2h{i5GqgLpRS5Aq5tD>SU`7H7cq>3uRt}dlKeiEx?XC(|VefJs)Oco+Zh0 zsrv?URtZPf<6&~v2*m%V?pSt$S&Wv7iy@Hw=M0bQUQ71J*$n{{t)x=AZm>q-e{3ipd`GIZ9ht zh^@C(IQguP9#anshc#qd-DkDI8c-C!5qdN0Y0i&m2_t_p7EIgRVwE61i`gxk^%)dK9!53Ij3e_gYWB^hT6*6e-j114kI%nPtUnxFZ}@*jt#XPCRK(p)6f!~QS+ z{A0Hm_fPxUOg-*dNp>1D)8qa_3<&cJodHTQ-M)aTzNRhCwDp|n_sR;aQ|9SD$I^!X z3sw?yj>zc2so!mz9~Yq%Df~41MyM?6ji1aeX-Kn33mEzNxUp%Qr`iu8CX3nXUddqh zFVSgGp51n5^j+ac%@Z z;y-;8gxS*2B9~BekvbL;ZEUNvdIf>ZEBb<2uER#~b#PMc{rdL<{02F(LAFA{n^WA# zd>X^o8bZRzybBYoRip9{HiBXNrrLi&*@A6#a41q|D{GuO6J+56+R_QSl*%7LtH>EI zoK#e_@FH?12uF{p1UV-P$2Q{}RLVL|t%u5@7=ALHwvd>pC5-&`*g6(j?bW~{wBiM< zR!oPXJnJzOhuh68>^`kN>UlH=S}*HU&Cc-nYPeOa#v>*A*!zL~GfHs;p_8*%1v8c% z_uGDo^1C$0+svUfRmfcLL715}UC2CdOFxja)EQbyzIPpzShIzMISfT!sdlaYJr2LY z`%#uuo8vpu4SO_euCAx;*t@Vs+BW7N)F0$LtS*sFsB4=)sQEhilk5ThSbszHGVj^T z+R)!~<^%U)E+}X~C#uW`)sv8R+w_2-`wFZ|xec%tY;S*uVUYQlx((3PcxKerSFl6()y{7}6NscbuQwRtHzLT_X<&o()}Y}Jl^`XVyOY!r^( zFt!^A&bh+To7U1}z*#FCc(gGJhhzT8JYP6^)4ZCg@Zou1wchzeu_?&>jc{l{u+z+y z=51|Z1S$AwyKJVBd8v+v7dwnFC$quK#bT4ivN9Wm-Av}?z6P$ycHw*$cY|=S`rCz{ zuxWnlbK*7@X}hov)yv%Ivs4y2U>lJNED)Jj>eA$P8G%VPv~)T0jxMf3 z_)LHDGNSuPEoTH0Mc?CIXvHc`Injp)f@-)xQyI|>=Db#vVF83^RRa@t=^1vh(3n)@hfgAtu@Q@O7C$Ev{^2mHQ1D7Wv~_r-TE%?U!+Z_* zUi>N}@>@)@;bYZwL=?DaWEH+y-9@Q&m>~>z<}k3_mH0K?4fw@q+zs;%|507Y6opt< zRrqf8cc$op`M_|ypy8D3a;p<}e~(5*l9)o0KdFbAG0kFKSBVslt52C?ro$9Zs$opA5(C(9Pr-7g+`dp{x>@K{A};Sbe?lv*92)Mx5RN z6Jj2L*rW~+`$4@-F&AZ3Vb{zD&;4`&rGCcDpxpB?cu=o=R5F}p{y^EmS~juskCi3y z@L;nek`!ELG5uU~1=GKSrZU{mSr~UVB2c|KXx8u|^JGNlpFNb;mS;T&!W+zb7g%GV z7$eME4$BM|TI@+Pro1mgAlu^M97)sLPLpkCu?ujwz=+I?!|KDu)_KsBZHIeU(_@&E zYiuxk$+ln5$y3ScEgU^3F9?Gpwa9@$pHxeqaE`*aeDfHzO{r83YiwrNP z;_YV5S#E?YeU>R#PvJ6aH40Mn8j96+7AEEJU@gEh4zq4&89z*gCb>!B=*!BV(Vbzr zN#V#vWO#`6XDXt$%%h<#Ji1BISnFU6FZvgL1H%d*?-#(=bSVYL3n!`RSgQ@pt%&L} z)A18N+1Hf+IgBkMocQA%mBsNa*6$Q8iK5Q5K0^|{#D$YL7n+v1@N7Q=)wINglQ$Qd zmbmadk!f1u!t;gGw8VuM3I{73?snXT(Hr*fCg4RPv~b}r4DRp}5z>1ke%&g(%;%VL zOCmhoN`);HRingQ2Ez?Ho-MxGnuwUfk6E{~MUSq=PvkTTht-G|X2Ryf=L$>LgRUmS zYlTCzz?vIgX)R@D%(3mFrSpxjfAfL4U1Gh;+*V>)318MSx3jPh4{vCZTj87`;QY2l zW+MvEB+I`oVJmHf=a6%S2+;_c|8K0XnLi8Bc4j?ld$$%a@=IV=p>X2TyDDSx@D@K6 z*ZB;+&WG<44h$|suk+ytgo9;1Loe!KxqrZAKEsHtFGKbZ>Fjd*j)3y4Gathgrx*1s zSqc3`J*%PRqMmhDoO0N3>Qy~!ahl6;AgF#4{pw+ zp_o7H#ci?7xpVZ4bYKu?l$lufO}C-~((dbM0o#26^Kgp00fwCFzJcj9;O16i>+TrV zgBaBI>es2R59VBD-#w4&?#IRyzU=T@?EW3UI}P_+z<$F`hw?_{wg+rdZa=_Il zc#R8Nj_~*)Cm42`+{ZTb&2~E-H_(wkc39yWMknuyJNjD!^}TpIOVXBjC2_10c0{5}_04!YTcW#p zUynd+j>MLGQ`>{gmDt|inM|7}u@(BQ6+2&ItGp2wVhbd;+8au;P{^9__z|dZk@{Yr zZ^lCbzL;XSmBeGhHRBN-73p#MH50p?#7;0Gy;#R$^&Ofxge#DvR2xpO!)gt?iw%&beYA>c`lA$YX8?5fxH?)h)~9+ruV|O4o|@j8>IE^V>~fu{ z72BWcjWt2{5c>U8Z!kuJ-BXv*ihY#o@f5t>OX5FE^(Yc{;J`(>;s@Ie0 z<9$WoP^w3#_;x=L_$k$UAsuvu#5V@KRgCX1@oNL#eceD0koa{0?*hhGO8g}O?>Cq^ z?J9|1AMkj(-X19NR|LE{1=zaVgGAt}fOjng28+P80dFZrvRy6ln*!c#j2|NLw*FV2kE;30mFZRq!bJt zYW@jUkvARtgUI(Ip=7u^3B8$Z+mlrp8ljLUukBOSTNt}?efKIhi}qBXW9cdS&y1WV z9DPgmt{T?A&S#nW_V;Zp@^s3Ry<|2E7+J)*Pu?N#ayl;3aO zH9E5BCDe>nyHdTzs*O`9<5hmTh<;R~u-UeM?{hNHoLuwmjp`dJT9tvg-}#EDnTj^4 z4&9-MuOZquB^BxVm$n1z<|8y+rv^ei^A}FCH~5;U+Q{EB*f2`$v(yiW&SJB(zjgOt zuEnsP_}#x=NXNSsdt`fqdKOhew`Z|JxZuq~c@pjZRGAWAi%UNHHvK%4Z!*=pAU7+n z>1M3J!yQ(`{-ffWY{m+`nsku2D=w;h&uIb|_dE2RE;APOCL#~}PQ}HPFPCg%&UZ;{ z2P0BV>AQ8+B42Pu-ln{=#La)I%#Jt0g3ZW6KL6)UT_dt+2daz8>3h17#Xf}vehDNZ zOJexV{o)wR3y~GqBAhpC!E_^X7K2RlW(tH>-lQp8Uuj2VKjTEJaIqFy%~#1y++Rzz zhal%*qTfT6nQ^Q0D8#KfnaUsNjrXQgmVbkAbUnH#rGZUO=Zhx*K{^*3K`7gCOq3 zcRx0L_)P^;P%J~OcLuFqWK+n0Kdzhr~ z)^mVcy1Q9J_YFwmHhuAM81+r>B0=tNu{Bzsecu)|m%iPR{eXXi!-&==KHFM(R6M&9 zvJd-AC;A<%FMFF$xzRo_l2UQoDRA6g@SL{ayAGES?$jqQ|0pvUmGbIJyg_ko{+$%8KrR*=7I5 zry^0hOU{1Mr?R8zO!t&e$mbr^*%w9k zq6@R1_o-suLNKyl@TrpM9q9M$7yqm!OQW|k`CZEuSijcE>=^etWN0Qyv}3g!}!t z9?^N2(6ZloO~>_&?q?gm>o;kyXh#gL?Du`i-cjC~$o{~m`b7J}KC(aZCHqFxuwjp9 zf9yy0i(UxB%>KlWtccPnL-wa{>n!?5(_m`ZpTDQ6s_63(P+xwesp{zMw34q6X{sjr zBDMVZPfgWEqimU}ca&|(P4ijam%~8X%1>MG-5Uj&Drx6?$1^q{X%~45Xz-4tT^9G2 zGGA8`H+X-;DxRG#iC24D*qIqRv3}wGX|`Zcr`B(J*;L*}r?z5v;eBNX(3vU^)!_T? zMsPG3!EI;`tjG8b@|I2Tu44S$h&lxmm+h#`kAJS?4>G=Y34VAFD9HP&skVdPU>)YP zU|7?fMuKg1@C9%qd&`g^93#Va^3TO6?46yXGSTW@A!fepJRQa)UCg zd&N15YtY6VkR4>XEB5#SnCzI4CEh6x$asm+rQRJJy_nBc&Y|gubsMqh;o6ZK0yl=fcievH@eH>+tUm;0 zJ1__UTp}Em+lNoK-2LbT!@U5%%Drv`>fzFniRIpdU%dY2R%2$ZTmZ=qPVS)n!06AI zXLGBcL^96!)6jgmLww4N_N@Um)Tiv|SD0jShxt^hVO_vMm|JrLlpytcEF8j)ib&K-drQCUJ2E3&leG<9m&i50-v-epf7o3O4-0vY@o!2AOAH^Dj zZprKAOBvBGk#$~gpR%LNuomX^^C|2ukab=KAAqrtRi&W%OZ`L9&D9{Qe9=hs99UxB zKv)Mv^P=^n2KiLJ?%%v2zGPAK*incZ>Qlwh<(Q50hWS)Uv@>iiuf|VT8vO<(&pXDC z>lXcV2&h_6d`4UzeYzOrNI$Z7w2^fh^WTqYdtQ&ljO{9zqYarX&~9_3DHi!vJ4 z#W02Z5p0kSPX5U!vSIEHfi-D5g6ywCjF9|Oeabe96+`X6LxSh=HDETf)|#6Ui-HIF7&eWsT#%tJlP$b#j&N)wn#g{~)UARh)$R<{ z2Z-s&jWA*uX7Q>yuHT89$z}<1iyWJZsnhOj>Etj`->rWybg!ShuhlAfUrSP#T#B)S zblOZd%r|2E(7ip{*V6@h=o3e+YSJ@0sVDB2V{~gp{*7`pgAtoB0*aK1!7H|Lqw5(n<{}1RHj5EFfIzCvM`Yd3 zMx|2bHCq@RdPp3N|WSSwn&z+SP=BvX_3(_J~M#q zGW4-D}OwHJlrw?(w8hRQ09gkv1>{CtSCWO@2Gj(5eId-Rk{YtH5 z5%Gsg8S!`hxaUxpz$Z#8VjKnyK0b(K{nWbQi2BMe3)yqY?yb7e%nvF3N)1!6&+cZ_ z)@t-mI?MHAQ@JWs4M$9h*;Fo?H%`y-6H^!=B}33MZ~uU~ z18La)6>4&4#CL4gR)d&HNTY@|DeIV2=BMu5l)AUNfZ7L|EL|K4VLkZwCnjIQd0Or>_e22N-K$q?Xs>RruwHTGSSb>*;Hx>Ca#DOW)@38`G4!+Z9;R0u%iOk@?JE z!q<^d+i*NE&Gg6PGNaE!Y|?qnqW4j>&r;U)%x3P}n)@jSRHM(WgW5D~Z_z7P7K44U z*<_70>%NTQ12NwkFE(l7V%C^{E;W;OU9Mi|qK`Tzv|9mRl; zKz?W&Wv63j5U8RC|8qNKPor9aA>2j_?2j zYq$bKYy);U?T2+ihk@XCs@fkT#Lf{QMhNk9dk`aq_^ujnTb#mnQ>y9>44Oc^+iYs^ zTcGMgvW{-aIY>_TmYiS6DQn5OwktS&TXHs&)2}7x0dgu@a(0r_-<;hyap38ct{Y2M zMpT=JF4|YQK$+cDVpspP?Di!o{`Zek_(db^dO$h@(kq4R1hGxEskyT{cUSszNGY8& zMrJjAC`sY+qf|bLBq@$+CI@F!!795*%9bBkVmf@CQRk#TrG&KsIkkVaf3`Y0vG_U_ zNpydwD$uXH6i#HyT7G>AGfLA(noz2yG8smXMB7*U=V$j!S7b7;UVacu$;Jb#Bhf2| zW{}%QKK;}>b>EE}R%f}XiJ>TaKinlhzIs4bVvP$&`sH_r@&g0f8zZyIQWEWk3@AxV zxGmysEN%?+v~8F#79?CK`QLuxB+hR?5n)jb+eEH}{9;lx(Pr$R-2d?LCrK0{!qBw> zVzCadv56i2tB*hZ50rG#UsjT;1 zVwcwW|F0-%)r9&>UjL#c9JWMp>n8kPOjxYzxFST9c5rk%{8u^t3zKnl2mUW5{PoAd z*d-h)M88*8IGqwl@9Eb(JbE=5rDd#nN)NPc3fCpZil+<)a3ocmC6N~~=-uXTh54Tl z8|UY8Bs=o2*~Le)TXjt-hs7X7hFXtIUl?;To5Ln@lSE-+_`f5Z_kSVWsnIxkiRavm`JFVi6C)#>!P>%9-!{va-GA9JfbWQHqkH98hc}PW68hHQU-X4 zDA_y2BeL{OO|m)C`2P*N4r*Erm0z2;BPCj@Gptod{R%542~0;lOX?! z^)IF{!M%bUn*2**QV-V!{%!FAez5#Mwg>)t>Z@Od^7w$dpFFKc{~kTddnek@Q1vayuNIpXiT&l+f-k&NwUit3Mdh3pa=Q*z4hwbfUN&_6 zxU%uuSNDiB#%#RzyWWX=>QqVMwJ$4oG)r$(=bzV1C0>k1h9>@ba9r%vq`7hgDTSR!%)oCrr8#k*{TafL?4LCYc zo?})t^O`>2nbYcfoYR(1pEZ+T=S&=!sq*+CIDDjY8t%Q5huf|Trcaw$k1(zQXU&;C zXW8`m`1TZN8~zGgc{QJDq=2<-)~wS`M|5i9#?C2O@qlK{S-1==2j4C_c3AIz<>er7 z^F)6Pbm`19K_R0fJ`Fm3$%1JMrY~d87^y7M%$aBM!=MnIJ^zduD26c7;WBZ~g432D zE~81Z!j~*;79|H4-@-t(5}SthZ>Ln^?(Zv4S1xOxo#=9?GOZJuKr5VfTEnu_mMrx3 z`t8unvJy88>!0&~sCyImD5|vox2ikoZUPA*>5u>k2@v)z0c7nC0m2?2EFzmEfrJDI z5JFf4w1c294zk!tp`wB^ii!vh3XXuFj4LYRuBZd*sN(>FqT+s^->F}xs|%fX{_os- zKlj!L@~!7Q&w0*Tr%$a%k22<8l1JI)y2{Ln@@09s=oKx|Wj1%agp{ce`RYEyPG;&; z${a4SimF{@bVam2s;soUnZu3XsF3ODXuWKq8ND{_ahJYur7i3w3ESuhAmwo64^^NF ziw-&bRM$srbU0yG8}={9TCyYq(iP zcPPH0>&}>Aet(WUo~*kjxQ1t`9iPjeeRtOITl$U|mFxHWbDc30Zk;{x;j-D2Jc(tq z{GP98_U+p@tC^z-GF|Izr9(HP4|C;j^cVQE9CA^}YOvX%ch1Q&vs)W$o5ae_&v!&c z_J&h<1O;iw}r0cs}gZ^P$Uuu1r>< z9qtIEMp(QfX*aVK=9J2h>JzmE{KBbs?(FbH#JwP4ezP;y+Ff$$x&BH2aMX*iydg?2 z%g*UC)8E1$$n4yrnY4qo0{#@GPt1n$H*|-h^bxxyi|SCQP3DCtJ>TPPX3Nk!QM$ix zR!&ZKXPf!Iq9muX$(5dn_W#BV&yjFzerlri&Koywyu}v$$LQZ`lPzLwZ_&G>^(?=w zTitJlB}JsPJ6fM8*{Wmo&g(UJf8C$^TpMfj8Plu7{^K#eQ4ZtLD|_|XpB3lJbQldM z^qOwG8t?n({u2#+l@8<7oZfEZiF{|`{_DKH{tlzb)LyNPpBwt78&6N|)hl@6&4&9w zO!l2{8i$(rZZ>?=d-dOMr239KjGd*uGWQ45eY>6e%Ubxpbr=g;`8FGmzUj35C>datk{~6XFN5hSHt}!t$o8BMrviRA^RQed^bB{#*XVZ?#i)) z^9PRKoa$(@|HTfzT<88)S-w9z9`EX_>vWFkca?GURCFUF_txkXqvmyg-2SV(``&l# zAKc4VPv8GcZ{Ia_jJq0u1SACad~zvTm$I4o%mky>=TN5jw*8+pR~K5Q4cvNPuVzoRoIw|3MSZ&pmK z+giw75s~8BAmLCBt#&wZ2s>BZ#4%B2(1^?MH}r&j8}S)_Z=H~osY)MeEcA`hwWSXp zy|cDnpcxv{Sj&s^kZ`h*S;x6aSZ8KwJe_2SF0|p?h21XJJs>u=|8u#x8lh!`PovDc zdbLJ*G%`-F?V8x&w}S(h1&d2-jp2;Ql06(iW`)`8%qES>#ZiWOnEE?MMV|6kYZq`& z_#MNn%M%XQy68fidFaIse{xBvZ&_20w|V$?I%^wQM=mr_Xw==7S4{jw&2mT0LrEwXAzS zWM)}8*FC>nnLlr_MTb@E3kQ!Gb!9=};L_?br3)5TR2#XE_RR3qO6$-2Q{16t)cbuL zo$4|dT{jNZ^EC^E7humD(XVj85agnN#k}dW$Ie_@s)ZL^r`BAZ{qpcUbHUup6~E_h z=-{E_`sEjPxxCy}r4?qT@@QiN*lecr;ka-w0{A$a;UV_$)68|h0l4vg?MHTI40Eo!)6-omQsrG>>MCE~L-&&CnI zukHSABYh+E_^O#@Wu;X($tzr-)~I)l@QpOijPf-xG7EewjFne84;vefxBhgWOQ9^-yHnimpHt%~MBpG?Awg(@=^jgB?w z>ud;V%pyJ%AvSnPL@8EnBV-uGGjoyy&q=Vg1wN7b!|;mEBX`+r>+eHb^a7F3!yh+f z3EO)%e?N)8=OrBeQ0!1=#A3b@J*GB4xkkUGy_0)=X^VgCYxDX#;Xuwic(}#c*-t)_QI79c|Hf+?w4d+27U{J5yrgw+D%Lw8X~Rd)CB{NvU=jdQvB^ z&*q_4K?NrIn*`2<8q0%h0(Gt(bn3c<;mbw57GQOpmxK^9>*K8i9h=&fyL+@8?dB_wGq3V<8N@_h^ zuz6VH3Qj%Q(0|qzy_+Qi@(fFD^tw{p*4p188Q7yL!7UnV>-)q*k;FtL$U~vE9y;1Q zjC0GaF6E)E&BIplu#+DA77tTw9(>aOSW8Syn z7VBq8>SbHBC5UDml}}*$L}M*(zQw};i-#|59yW-Fd{x|k**uIB4;c~@6*kb~p}ura zYn8t*9tw=TXCx1zvF4%Ll83<-51nluI!L5EIB+JdCk;_@~W7g?K1Z z9{yqTkZ18Q&f)<}(^y;fxOnJb9PRAz_Of|cB_2W*Jl^6V)#l++jB)O)GubD>)*@_@ z=+bLcB}}kH?{148C6~I@k>u}U^RU&Dfk_q*lWZQmwI1+Tt2Gb1EFPvq3WZ5|FzKQ<5AO}I+2xN zO=~6{XRlHGk|Qzcm@Tc>#%kIO<7k(*iT)!t_uh0}+apfke!Bb*xqsc}qGyrJZ;gKI z9Etu{Z7z;=)U|TyA#hP@aq+3m#hzkKD>q$yWOLD>v#uSH-*vbsv$(iqbCDuhY-=?8 zuu<;pM>KA<;BUr+&)w%Ej^9XUpd>yE~6?FDkJ-4iLw>0 zZf1BJ6@C=1d|yk_4=}u)3O|kT{q~lhi+njJ|euh*eUi1 z|CQlpel{X}Il>bq|0n{k&pC|k@V^z|9U{Unh`qkVxcZ_qU2v_5J53xik#>axx}PsP z)0}D2z2}&6@rzy4($iJVNDAE2wLGLL8z$%SVB?amiD^sB5dO{33TT3s*Nwf?oOY9D z+BBMAq|=RJ@zP)>g8*F~3Xt4><4m_XZ=qci;e7k$>1S%|BTSBpiShn7(&+a|I8-qR3>X4~I78zr{KSKuvMd&%9|D;#O9 zJK7W-wMQco8L1LU4PN`_CPrSVFJ3v_8GKm85)oS-qjixucWC3Z*CJvUsMrUCABg!T zF*o*=`ZA19@W(qt{^ZT@$vPR9d|~?b0bT4-F8e4KHMKUF-i0@(=C>8Vuj~)hnqV>) z-ke%rn|)s+vCP*%Z(#iTgtw6~vdrhQWvHKWh~w7W`h|8Bo!S7K!vQw?0XF-AHv56f z9>=k{4Qv(KQ*>&BZ4m~m2>HQ>A8V98)TSG%bh#l9#{6<$qOCl`l}YG{4NV&!GG=lk zY%WJA`<}H{BWm}sg zUR;dK^c2&e)(>VL;mxT{wb@Tq_8G>!lYah_MGr+9N@!DX@yOcp^t;ptJxlLY4`!|$*wsxyckMrcv zh73GI`_E-RK@0e`GYpVZ6$!XPy%1=Pkj}FrQ{PqVK^e{xAp~fm$^;qVE_;kBv)X8PRqtk*wRc@`V+FTce&d#kQM|2Za$4w)ik4ZT z3?pud7`Y!ur>R>i#z!AUrvxID8l})(5{eP`MtPN~;S?Dyo!J zI=6UQMX7SB?q-O}di$fSYTm-i!piEZ;NM0h)m8Uk7F10y94r?j7RYUtlOILL8TBqj z#~4%Ii*A*Oyw03Evs$@ZSSiIQ-TYIphQ_S9z7|2(;51`Yxii^#Xs&N;GEB{!MBKv( zHcM+{G@R!ff%`Ox#!Z#JhV@};K2K)eYZ?8tp4@HR&=CX26c)%s6@_^N^ZQNI1`N2e zTXtb~;m|RohZN5(sgSA*MVcpfgeppltBl=Vd2Zu|d2+{RZ>6tYaK-wDM&q82j>e2S zzJ|t%qk1Fbn9rADlF%J{T0snBZ4LG=>jl`3B<4)IL+9}~;Rv>%gCh(MMh zQ1Nl|6``0kIblS&baqAQ{feWhKf*_Z2grMvu=}gLO$*9Ea}(HB&I`e3HElDwRTx0P zJq&med`@Q3G62LpuW5tGso+sL?*yNgC6mEt#4&hG#wbwYZ3ADBF^b$p?g7R5387=C zTzv*#(qvgHdHv9FT-Mk{z{?sw)2TUL(X>y%SIx(oWBz8AEao+N?Hn1Dl5{8WD1FT9 za*82@V~i;d8K{PUZ}2r{NeClI%vF`g>d62|)W})yy1lhTNM0 zrOl>*A8J|=C=Nc6KL#xyqP5TGidu!iBAz*d^JmE1w@A|-9j@g!?Ps{ROM zsTNfeBCDD>#F`LU)x=@xgs}5V{l9}9$*I(;=8&A80wt$XDH?K$wsho%=@B{ROY?n{ z80j!RksasR2`{kINtH_!RrRVbNGFz7)f{q-zn&0HDp9qVfTWs&oe$XQPH9>O2a&0%U?xfHt5MKqV*zaETn#g7Jkaz7X*PP-Gy2)WGjKP!Yc6 zKqc%Bhr%Ib0ppJYB?A*c$-op)G7uxQ_OU3)()lD~vPAR?X3j7UsGL3KzYK{|M&yq8BESjlhS^yNQn7^0Ftxadg3M0I4!8@|8ILp_oR+OmZ%X3t7Bz?8>6In+$<@#h2*@SFHwkG9@sfsTb3>ABk zeaV3&mWD<_Mw3^OfvdSQox~+17|tUXlFP^yv z@&)o$@=fw2iTmfs;AiAn@@w*Y@>dd%Qp3J3*?>$|l=@F&Knt=h*_ph8>_he=al0Lk zN04L5iDV&JO3o(dlZ(NCIJlMpE6G2Q>&aWmJIL+i{Upv7k&%5Q&K4m*O};>$Am1i& zpFIG>e=y(-i5un!|AEwlMTr<5}(IGy!K=lvKN_4;uFxY8;Q@aVCPB(Od+R} zv&i}65>kB~TH@VE`DStxc?Wq9`2e|x+)o}>-`N&Ne`UbStsm;ML?D@>=p{dDB1{+({lHUnV~w&yqirc-{w&)5wnGAQHEupr1i5 zB5x!&lY#rV^Emk|`4;&p`7P;kn~ocjt;p`=AaXo8gIq-3NNzS6(C%Zv!NQtbc+M{gr%){2TcWd5Szs zentL5y6T&LV#yRTlf=hikxmxbqrS910{SyxBsq?pL>7@V$O^KGTtZ$)-axJ;Zy~pk zcab~roqc5BA@WfY>jxwJ2>BfO3i&4a0r@$3k^F(gEE9fQWIZy03^d|SCOLwfLe3`F zkoS>~k;ll7$V{1&A;B!tPv(=8$=N0Y+F}N*B-fK$$$QA1 zd4~K-QQH3!1AZmFGTlW9T9G};VdNC@S~5ufiQG@VKz>1fM@A)@{u_cg{(CWCBw0jO zk*mnfITG`2I8Gol$${h; zaxr-$xtYW_;1K^%5|95^8E~3(G&BwBlP$^KWIj2StR$}|?MP{fnzWIM7unMaNxi^#d;a`GnfIr25~L-Gvy zgGpKEMb7n+frexzIe;8VP9|rO*N|9a4Dt7oFOc7mdJ|LMk?c#3R+RRi&VW_qM)EH5 zG4eQhlKhI)Q(1##I@yVwM3$5D$VDKI|78rgg}js8Nj^qCNggGiC-LcU)WB)-Gx99? zHTeTsKh3mnCRE3NR|X6uuOerX%gCMNA@Wu7H2F0d-PBAVh0G+e<~%Z*L*_T-@jrXq@Anzp~Aoq|@lFyMZlW&lJC;vr$PrB31j3lM=_;100Y_cyof}BjwBo~u6kU?@g zd6N8;yg>d$dNRxmGzf5~F_}qrB72hk$$auEavC|0Tu3e_*O0f8caYo3!2R6WP5y;^ zj(nMXoqU%(MV=wQCx0cQo0%o7OD2#_$@V4#S~dfEkbW|cEFh~_O+Kj@(6plrc%FQNJWYN^o+E!C-ObGs#*&F-W3m<5mFz`geIOhK13?`B`3#sq zmXfo{`Q#FE6}gezMm|CwCSM^xCch!wEzArw5~}0BJp=sYjpP>c3G!9)H0j7R9n~kV zAcv7t$hl+TbGN728LtaC!CT}J0CHImi$dlw}km$$r7@HTucU5a_0{u)@_BOt>jK}H~Bbulzf?doqU)4JBcrL z!`~UQej8KnXfmJ;XTT(KCb@)MO>QRtMD8P>Azvd;ljq4_$+Wg+!hOi$iqih`7!V-W zlXsJkkWZ1Xl7A<^B!4CAw=)w;Cp(jU$x&n>h~s}A0|MlF@^11G@+tB|@*MdK*}uJ+ z@KxkYav6Cuc{jONsE+?<81N?f8Tma~w}a_8jm#m3lUUmaZCpm)Ol~C~B9D^qljl0{ z_{SSBaF9S|lHJK6b}Mdpwr0^FHEVhtlitRdHteXD7f zHe`1)uz)+)kvEZB$ot5Bo z$iI_kK^*@-GN4XZv&xdmmSk5FAMZt*jv}unXOq{EtI1o*d&#}zQ{>A+b^M=Xz(2`L zq`RA$U_-Jc*^L}PjvM0}eDXUL0Sl3W=je*(o0 z>$M?6nPfN82d2mq4`d!F_E%G1K`tj(flcJu5iGxfowW#%2!8@4fqmpL@+DBt-CreN z2gUw7>VF00w9M%<=>|pL3>1HDK{==BNM=(%49j1@0E-KO(?FT2&LC&eu$uZ!vXlCh>_2eLOggd9(n zkX2+2xsKdQK1c=*aOYX_4e}H63^-n1z$Pz(lCdADcjkyZQ9eUJ)&)hM07}LigHxmc zWOM4I@7^slPWUwPF zqQNX0TtnVUZU^VeQ9?cdN`il;{%P_x@;$Ip(>^3W0>%EH)L#$=9Mzik4FZJU)4-W4 zvXmf!Y(aJg7t2fDWDigr=1@NjyhhHZ$uZPVq`nkfrfDUjfC>JJf$hew!N*g_P9Y&txLFTJH6dO+bm* zlKO7sKyoyAlRUscP6Wk%I`!3L4S2IGokFew#qO2>4Yree$tS=Ka*KpK3QB~Rs6R=5 z3ipO}!hGf(Pnj=Qdd}mQ1EWQyR1bx5}fJWEbjv)DI`8 zkR{+<@~cW#fRdpF)Gq_KNx~)r+DaPSM1xzvd*vxr@^R%); zkUxVMtOm$`DRCSq?VqS*Y5#QW$p1_gAa^doL2?{Z?gtK)r(r3N0rNHOD$29S#pF%o zR`LPzaq=1R1c=}N4;b(T`5hURCkCQ#KsF`YlRe3S^`CVIeDJENd6Syj^;2U zddPYtmVd((F@tPFb|AZvJ;_`$kIW|vNPNQv{-%(D67H0fOTZ?Ydix4oMR^Umf!suH zCAX0~$z9|=@&I{+JZ3VW7L>yr^&JEVPm!OHXUOy9CGsayK4GiksfX+&KHlMiA1|pM zu4^Vw_d*tCk=+!f{qa2*D00amWIj2LoInN_#$#CiM8<@Mdo{N;AYBr?G5rhBwl-iyqkQK#OrPd58x9i*m;(G zk$exFE|XyLQ}PS)EAm_N7g9cstK!9wab!cXF^N^~b0oRe&lQ)s;$h$x}kGY3@klal^PX2{_ntYagg?x?tNWR#uPJBK^z%`n7j{J)J zf&7JZc}%+)GJ$MJwgTlusU6vc>`vy8{mEe-9RCtwBm>k#u_8~Rj3oncVl|gsL@p(- zCvPOzk++bylXsE3!4S%=vXZS7&(KSMOKlE$m_`KO$M}^7_g4qOx{l3 zL*7SXxkH>f{)K#+e3pELe2sjM{E+;V{6bOM|0@Q3OS)nt0XgT4ArnZfu88oaWOK3| z*@^5<_9pw2gUFHO7%(6Xr(s7X@iWM|WEHuTypFt)yotPp+)Um@-a|eL%DL|2=g4o#A4n|Wh;!jMvLV@+Y)-Z!v92S|jeFO{@h?0588C<( zNsb{WkyFVTf-npL-h#xHmM>ggonwe$rs62$PdAL zrH05a$aCbkoAE73VF6@uK8~CqRFie7W_31D1WMbKkW$O4jih!JD?w>1 zsa3@#ptRX?vId-Ju1XB9fh^9~l2Ut`qe$l7rscY@N!yU0DD zN18fMV+i~kUjtdVFoDUXC|q7opiDe zkcHCwRA=i(s!k}?r!H>@a}h3`FOO86a+~x4$U@aQr8AC$EDWe#D#OSW1PHw`LYa8C z0zERIf->Z&pBU++rI4kQUIR+!yctZYVEgfD>2Pg0#U=7@KI@d5GQLs2IPWLiyCb?^8YnN|UJ0Ckd#|C#k5uBeLo{(nPB5MMl#H&{oT32RW(%o5|rv zc_%1scbxJGP}=Y!G|uUHB3GS_h7QY3m&{ zP*-}S&5ux4S9FSG?53HpnMWA%XC6t$g(kVAl z-U3SJ#J6eSZyzX~^c~6t?_)=L>qQ1!0=G%RE;E7`yjQB2au#@>rgiStqstW;;Vt`$ zp4r{HWp^{q-_)*=o@Ja{uD1(Zyi%%8j(~0oZM0chnO3uJkT!#{^*{3}s8CjAtsJ85uj5wH)aE5-Y`EiZbKI+7eYf=UwfnPo| zvsCL(6(CtWYVBK{aAYJ6g_Zmd{JNw_%eY3BL&{aNOx#4DSVlK`i}+K^%A3s6G8!qj zms>bm{Q6nSpl}IQ)jzgMYBWP7*6T#Ns@E${Ai+yT_e=HB4jarKEedj(?R{A@73+JgHB}4BOX)RI)naOHTof&-~=jG!a`bpXW zsftkIO=kXgi8~_`KN(8Aaq;gYE@=lsiQn;W65oGLt1YL8CHK^Z=pTdf#aUu~_d3hp}f2SbJ%K!Y$(m>Sf%gXzGwWdq3zy2<=9YE_$vgA85 z$4zGac9UFEUF$&6(()(EZ}0CEr>&VLKGNGe--V}|06aC4gB1G>PAn_0X&)zlbKBRIzZva4Cj!gL<8efb zfh-huBGi(TEXmqxWcF{@$g*;$9FEJ%W7>x^-*|dNEm$&dj*QMhDS^=8w(nLo%#J#* zIe#n}IsD0zQRf3=mzCrX?^Cj@eDX~9xedK9ohw`V+}Zj|G312gyUz|>`rNtI5*~-} z+2QcM43CxYlePBGovkPGp{l>(;G*`V9}|XqnYRtxZ>3<)Io^%~5;&PqrMJ z_|XY@`^n+(ftF6Oto)9!A~L-8nEoMA zCJ*=(kvVEznI7wJ#mLmfn0mdpVc;rJIKLE?Bdrhq>YfKg>2O3hlZn4`F6Kq;$3fw6 z<0IqF7cgz_I|Ct6(b+O@b6x|ReoIt{dky9>p6H>NIeOgBiYh89S{CaRYqu^sr?0;J zNy-vy=bI8c;A}P&`#6trc9@J^Tw!r`oP*ts@+azzP4YKdkG|r2q3a(KNps<)Z{5`= zUQ%%lmI=Po)j+Zvr8)7Hi0D4AiH+M6oik8o%ASK_6`d<{C(Y49^WZ{KbU#yac;fN) zd31kMjPi_fi8R2JT$*z%oaJF&FUgNsDRgxaH@d47=M=7ia?;>*)fM+qE-Wb#?ONp) z6W2TP*R46LknWW@^K*NnulfL4!8|m2;z4F*yQCI~p7fj&qdfbi3Zf^QlE?Eb@;Svc zt>-x|2}WOSO7T)kxxg7cbsb#yj4qldmF?*&f1;v@d`An1XCtIi|rWBp5an;uAYd63?G%cb@eiJ@gAITx_qYO_0*M`aQTs}qeY5mkyMi_$CMhWrgrr+ zEmJ)gCBLrzrj+4%8}SAlRPS-O$n>m4Zt~2CZ9MaW%PN`#a0AXY)Qr&0b2TzJ%#?b1 zwj-h8rsR{p9ko;H#+~XK9VccUe3HmD*37<~4oWk-#+g!-=La!#U1_G|@!;N^YrHAd z@dS~Jt4t{-;KA2!ToXdIFcbNo2>*^2@t)UF3zN(YcvV}tCYw@5<56K>_L6rL{ zcZtXexMS;{5O9AWi6vA?Te>H@kpnI9h|}HI{hb{4-f41px^vaO9BE0`(Lfiu=uhG46QhV+^w=TWV*;-Ft(i?;cDCdvtGeI2fX`=xni1_okudhEjh(_jZ7O81)Br?^&sK_i*Zu=-%$o z=Tm=7PwGD?UvrP3{(0Sd0N2yqBN=d9_g;+xkD`1+9H7G&P<})A;@fQQ(e8FC!|&+c zUm%a6zQ*DG92po(d6mQak{lK8am>IPhqpiMucW-z(Xc-*(KuUdaCoO9tCQW`l;=(I zNe9SN=xLk7n+VTWQ{Lh5{)pzAN_nTlTY5y*ViQbQ-L2dKbe%NhqsMFZzkQl==-$@2k+ypuEZHU5TQVQQqS8 zK7+O_XZ)>B?+s}DnbdD{dS8KlmaIvra=63k{WD55n+AKFUfl9`S5V&P^uCJ-bKKLE z{Q;*JA9r!jrT&Q1iwAJr^O)cocj z4W>TY+XVV++_-`0Y;hzyY0SW}TEM;3y~#9id0W9?nfo@=z~xd?YwF!v{7=$o zb#U~@yCkd*#)&!~$)ETnh}cu(2fC*^{_AM*ouO$gf8w#ATOAA~$_5=nY^47uYVl*C z!X4B2t3yWdW!O{B=VK3JN}WSUs|F$lvN{-d;@3mOo+;iH661G<_L5KFD7aP)I}Y7( zhjg6eVkwEIgZ^+pjAEjW$X|yi>O(2N02f_TzQqi#{-wHN?0Q?qUCo8XGooA@WsLE- z;v~I#u7%<^US=(IhGxL*OYy0@)Rj;Pj2UnR0{<>Hy6Yjyu0wOql?3Xp%a!n$s6q0# zksiQZ&Bhp-H77oWQ+NGtF>Rv%jA+B;n3A6q{EqjM^>2k@kUI3kAV@3KiLVb)WAu4V)2lRsW$FJ=xXCm zHl=F0kUvoRo<3dWFH@p;WlwJ@VNLH*3KR(W%h1vE`b=dwL;_1-h})Iv%5Y8~WZ6uv z*of+S9Rb)-=lfutp-+$_O<%2iG?dU&2;GRp{Bp$Tt3xiD>!U=guhsF}j!iBPYgsVK z(D5ZUeWP;GT|zP0(%%pl0W%+)?~_2s#zk5S{Ry<<_F5kmqQI3}y^-{aOk`?`{7)~G zJ^g-!Nij_y512lx(75;^$ljW+@DbEXCe}cLfXl4pqR$z!p5VKg^SjN zv~e&VBgSSr7tM46Oz7Ki+y=g!y4H zZ~Zq^T9oo7z1WQHQf*+yE)Gb+^;kV3wLCev^|Q69)wkH!MQYy2)NnOgZ!b-4rsj=I zt)V4$A`)w+*LHDftbq0jqEC|OEmfatp*otGI}8+h>u_qg(%cOL!xp6WSM0S`&QLZL zyR9YmZD`Kyh}5)Ii1S=+VqNtByRg*ctEl%L;nZ?PegpPisYEli9+9c_3Z>SvH`==o zwUy%R1tdNoGVx4|Mgzo|nb(1cEw@NiGakS&F*KZbJ4w76_A6==9~znX@KEBC+C#|Z zxX9FwA@-iy)W%!PYa~>ktP;bSk$Fgak>hiaaB*A?!pDgA9vtlbFQ>(H>$FH-#G@M$hM2|w)O|_{luQhM8A4OXc?$6_- z!;XXXOLADXeiMCdg|c>T+!biK8{ehVSF*=exBNspy?z75%9d>r@y6Qzj7Jb<7&Z^w z@|Hem|3I;%WwFW=#iEvf#F+UX&_wi%G-LjqdXw~~5*il{P45;VW*E62CMUUdNv>HZ%{cmO z?$ zcu+bE_M<>dZ^S05p>ghSJ(7)G+w^*uIY@zn#%81x5C<6?fEjB4+Ng}+yg-ZpGHN@I zJ=;t*-jb>Zsb(74Cwe5-X1CR45pz|x7RQ7A&3#XQWAE^sa2aD&BleKl1TF72V}1vD%C+9)u^=r>E&kqa4LUd%3L#CQ-h2V@BB z9$C!GBNmy)@!&Lb-vd_sn~178SDD5s;Ejw3ZjFq1d1bHy;z6_XEcP@EuBcIMACWs_kbn;KTU^yDFw`9dBFVto6Gb6RytW`8B##@LXYZ&|5bS+x{c}w-I)&9 z)7(m{0#0HY z;FSNWzAjIvo#{IT?7(!uPXALnDW-8e$kEf&IC$DTKD*WaE;zMo-%&phIr3BF)E2*^ zVJBDqV_*mK)c&_k;h# zQv5$=p6JNejibSije|>8#N+)swGAQhQ--af33Y)1yEx{sRhZDWl4v+=B_?X^?Q*_N zPdTPGLbu@d73nk4Rk4NKPBFz=xf5mleq+P=4z`dSir3r>u8kK8uch&bKP@>}xgzEN zV>J-?f2{^=H3U)4%A@5#Y3MQ9X8*Qs(98O2p43un%qS6Ez9Tv=^Q9n-s|an|W? z6rBHu#(@_#J>Tze%hXMW1RhC?>$dQN^>j@A>i-qh_Zy8mRy-p zH;4nr2G`wL{>Z90BeDEh5s@xRB)>{86sfZ<(l3YHD2=}$^&dXvxh@i-#>_O1N2>*{?ZgueTpr%iI zVCK@&!fMUf)ykh1Y`(T}u=B7Oy-vwe8T39fjvOR)LP=|RSXdg&`ngHn;_1^%7c3~06lWXRU1iSr^?f-B zPD#W#o$61kJAHoP^m%hCD@v@J;ytKraGeh#;D%H{2IMl?~#8{B(NOlbvIA}or7~|Se{-(kA-i|do7WHm! zJaT29MB}apa#}}^?ti7!UwoO~-uUu?oIXMS#uUTu}Ck7K5E~pJNtHx|*M!fI&~ON&WvjGB7> zB+m>pxl_IA?gh;Dt9E1~WD_c1e>}l+6qF-IQe9 zU9LAZeroM+VI(Yw@)~zNrN;!1ZR+2kvZ{1ZXl2SVXfk7Is=u|7+eqrH_wJl{Bej_$ zrZGAV`x3jDHg@2k{C%qy$SS;#atX2=TMmfX#$RUup4aOz}nfl3SfmK{oD zu|sJG|CSw2wJdf4I4u7y!~dnj|3iNPHWfLL`ok@j(Dt8}xSK?< zW$?=XZ3c}kt2@>UbpjN1!vEG2N`ccsTh0pp1Al?v?JYQ?wmF>nA2|G7e>fwz`5P1G zakCQykKUQ+w;T{de=8}R#D|8E2~uH>t>G~w6COgfiA?;ahyS#laaq8US@_HUtsL3> z{eErQ41c$l{yV$&mmgBU>(CfINABvog8lC5Y!tNjcQ#tJ_ovpi{Ja^y_VNQCF(ERV zX8Nzk5C8qfOD+9f_b+JWZ{loFUAm;Y)AZts=>yDZ+W=#CTYsxyT7L5WgKhnZx{~5u0MvNFSA8Y zHJUxqHM!SfTXdf#I)3Xy(eJiJ@1~-+y~7qg&k{Yw68)%g;blEhrrc5?{zJA%`4TBZ zj8S4-FAk;oo-NH)B3Hme+qY~UD#SxBJ>Xhi$iqdW&Z~OswDUIeU1C0g=1q;;n)hs? zuQjp{bxk&oH}4tWG3uId17%pe^^og5;;FWYcZe)Ek*4^(J!Q|@#Puv5np-?fwR!Lu z8;?q=YyPIkcl27~WLo0j;V^5e8FI(E1hvp>g)P-oiwE3*2-U(an}<~@RX^S^wq`oh z5*-~d6den*S~GwztL3W_zslkv$Kv50n}?mDg#CBfJgl{N$hCNQ$>!mRc*sH? zdOv6Lu*u?~zr}-kl2GK(Z@~HJ;M9{18=bdB-zw2n8yVksmny0!=HrYD*^b17{*t7% zm5SVO;Lnj@Yb)&vIgqplThgCzi;f3+RptBV*gPDxlwhdEgJJWqNj#`uF@MnJ;h4q4 zaEphhZ5|HP=Hal-!*Pp;5f%?$+B}@7_3$s7hc_%9Mp-;0OO0Bq5$`#e^^hnUYfZjy z@i5xrp`XnIy0q!RZ}aep#lu*OheDf&l#qwOWSfUG77zGHfbQ{dHWy1e$_FNl)3>E2PWzk9h3__b41l>PvbZ=+7x)3d z)~$yuMUKOj8|n%F&)Do54Ka4V7OHO#m!d>mhAP4( z{Z+>GN~Wmo7-`Jy7}YBJ*wMFcz8B)FSwA)Ovxz3os&e0_Ljrp3EY>bw1 z#5i$(bdhoX<&H@ndew~v>m~enMRa^@8@femx{;0W6Lb5-8%MtH6_@Uo7c8usTfXpQ zZumLSjrlN-pVucob}++DHyewbi4Ddv$gH9|TB7muSI+dLX$&?Iqf$sQ_I7nNv8n1Q zRi<(Ja#b8v8|OsZW5p{~hOzf@Rf1CG8K=K?HgbBkX-3*bXSzPk@LzPMC8nsymBM*T zk^ElB^+SJ1^vS63NK&nAR;_6D)atg$Mooz?O7fKUtr)hm8Mae~LyY2Y#a#z+m;FquMn+tz&ow%- z);pPowWY=ED7-nfESuv{?>B9n@?g$1=9l{t0}&}|_@N7LPHjYF6p^i)QyXQ|<3}pIIknL?J${11n^PMbuo;XEYh}-= zU1`&sADIamIW>&`;mxT{3=6X7R3mse$f<^7s~o`K8s3~*QCN^YrzDR$4G)hP#=@Jk z_Q4J_%&AQeD`n5A&5&pM%?;y71DQJAB19A6JT4(1x8rv*0OMAIywdnWgdC^+i*lyY z%bVB|8xDpjIYGmduAvPX#hH3&gY2U{ei#$v>B^B7{XiJt<4_30`EY{##p|b`4f++- zr^tSSJTr0|Wz4@5M63 zisq^TCfV%O>#;Ntf3l{L%>d_*p$!S%&IHVIWN7;-qfHZJBzq%5pQ&Al(6`d!6?I#bS9@#WE!f(U~ST2+KWCv8)NK1)-tVM%113MI%8^j?I%oAv|cT&3@>HAWxe zh642wxi&)qdFXEv18{Php!L@9nS@#c8H9qAF)K;XabX8%xctH=d34iT>nZ z`j7!e;}QOj#t7}f_9Jy(# zQH`>Hv*{o4IzV10ql{9B0S@Ds4Q9eI8^a0oXGF|m5V1sv1j|8*ui^#GfhlGaGbny0 zz+R@bu#efS$(Ox^20!^I@g+%#FC`aS%^|HWaW#3ALfZmL4alregG1R>{9no9T*Viv z_!e1`)B-U(E?3wMe^189XpOJrV*173pknuh%h#waam*^bVNc(SKz+L1n@-L)X074?X zMfnr*D-t6Q943(&WCyZ0IfNWf;%cEIfE+QPhFniRNIpU0;ujK{K+YqtBiE64k-JG; zU_rcB$PdYL!T=P%Fd$A2bjVG~PUJ{(Dmj8Q-(3j|w-DbkA z$sXij@+z{7TuiPe4f1|+KlvQ_Hu)L(9qCqIqL&gU%NU80wzIBIl1Irm$@lT)03>{x#Mgo#e@%W*{z^v6&l&XU8??g4l-rV>NqjQ|c4Nsx zat0{BShL8$T-3$IC_}+eW1)54v+__$Jd{bk+;axU?;gaME(;L zKVMV+j{FJ4@sE#a!9g>!4Jbcp9mp(D9H_66OSt+Pxo`mON0Wu*9C8)89_%IsB@Iyg zZ5OKJKlI(-gHUwWv?Js(8omNb2Hz*okl%s5WOYUIS5O?+kx2~f8jw}S_$9y_j214LY9NW<>`?0{JF5Qa;&CegKNyXP{*GTQXW+yoKD53^d2iXiaNHwgV+% zHyR8iM}uQE?MiYYD0b7S$EV5QcqO?Wyiz(HX@FwCo%%;j2DHQ2kqO$<azWk@FHf?~HMfye(JXm~3)TfQ4k-buszsXss-1Lw$x&&lJUIDCux&&aRAd7Abe z`6DQH(Q^8Qf;3FT@sFxUzl?SwYI#nbOPImtqaMid;)>Al1pN_}fZ(2f5Q^Kz%C+6NrNd z5FR6+Cr^-XknfYH$j`|$gTzhh zPI0%mS2O|!@NboUNaSEK_d7;X7yP&!+QbjVb7UMZ?L`Y09@+shTg(*;L@X0x!u1nN z#WIoK-Y}j?V8S;MLnU+oISNhA7UzjoVy##&t`ygZjpBOoVRACAe&RN9hqx<)*M9`q zEr4;oFmQ?Ys6Y{skl;H&yO^Cf4@Q8Bt9%|6}O2yMSeTM{q~Cc#a8j4c#OOT zZA@$vKNJ)ET!8`3i0$HeF%a_n!(y(OFLF69K0lO-W#S02T#SnqVx`A~HCqmI#452y zTuIKt=_xjf>&1=YCXtImG5l6>hqzPRE$%f${U7AUwYV6FN5o^|39(H)DSj-T6Wc{A z?8O%lxg;1LaQLMUSuFM=6L1(J2Y$%I0HefmagtaeP8Vm3Ts4eOLbc*jaizFUY!o+$ z8^Hv3d{_>TiQB{-;$HH4Tnofj@t}BEJR%+!Plz9iTzQxAoDt83dH%zJE0OWhD=cy; zUE29#PqA1m6^Do;#8F~goFsDXGCs0#l~%G!tjXm04+k!%N-h;|7w-_iCvw$OhHDay zY$9x~7fSc1#69E!d@v=xBK}HzO?<p$@kEht7r zM>OMt@b4{qfH+9JTuhjOLIjM-VS>oTviNNGE%65NM$rr)!rzP^g15=NLA*=ka-)pr zL9t1EimXHZKjUp!&xw1)m&8}Ze-mF5-xSS&V;zQYWWO)|jl{F$XW|#4kHc|J}3UG_>%Z5(F{;xzc*yRDZURT_|*FsI)JCezlmHLnC@SQ z!EDbq1D0@iWE)*Y*u7;N-7(m>gjl{6-e(|uI5iKeh3En4jz_Xmq;DRb%u{M#^nCQ_ zZ&`72AZ|>^OK@XC4)I>8@^-z7_AtGI#a--D+PLXlL*m}Bk;EBzo5;A{tWLD7 zZ5HgwR7^zu`;f|RI!r|mM^;)^D~YS(A#w(u4@g{8j+3}nw2|nlPm<_C&yeWI+DUX= z7N4ZhAB0JqzPTjMvH}ukLota)TWa3_-J*w0w1rXhKwZU26d`||pZ~+OQG_UI!(0+Y znJ*TQMH&wPi)o`|`-!C_N*IM{m?+~0iW;S8IEqA(my2-{p(lwIB&q;~WH_BfRm>LW zkce!aSVf|0YQ$O+RaEaW;nf}LY9$@OH6-e6o!CgmaXT(r<4D4RBD8W$QeeV!qfWbr;a-X9j3lbi+##XruBVMETSlU))|03rqxX!eIZ7KDcBXPN>o8T341At zsxV_qupgt1DoGqrfL0Q9V+M&3;3RF-QMM0+olBysM#vsTj=^~@yNX2BnIRg4-#|N# zl99g|fpP}gRJ1O991jymVGBZl8b zqVCNA1?)q#(FQ)2zZrl)TgVT1;S0!bqx{R|5GT<%YGl`v*Q1VPo9BPD74v+L1oqP% zZRUjh&Exw5J)XlqoB@Bdp&=yfG7@cRw(L3NygKxBa%d#cxXj}*cGyW9jqI@e&C@R$ zn|Zp0e>>gL=xUZM#cCAGhc3CS*!+yn;P8=GjB?+*Eu$cC#jxR*yJy$g0}~$)LaVW? zl-6K>e7wisqWD|MPvT%LonRdCr}4#2yTi}7SN*)Ip=u0N2Cv_+_U?xJCqZX!%Y^JB zYww>hbyn5*3JNLtr&xonqhEZq_Wp8c*Nv^P`b<05cq4trq_-1awm|60f25>7sw6fAQSqrD#GgpKOc=c6$<^-s#skamx>eO&A%$Ic^*R_II*yp{hf7 z=DxRNRDQx|2Y-W3+HWo)NkOm&d1dou{1f~5x3K3+3W61*v+#FC3@Je{et6~I#V|=h zuxHqlg){cC>ko(W;hz=+>kmKwCE57n34#SUaxFoy?;%kMf<1r>p#;IkA=?)Sf(^z# zR`5Rjv4iI0g5XVE5I)$32p|X+L>?~?1S`scQ%Vr52(c#x!4kgk=h!(d2sWI1rv<@Q zBf}R6g5iRUgv|#b!M?bq@CTp40R@88K*$L4?j{&Kg})F4`%idWAPDw9$b4E5>>g^~ zqy@pY;t0}$U{oDR3xc&Vn`uF?|3b`!PK z2`GXg8x#cl9X(TmV8@WBv>@1@QMPG8uuNJhL9lHoiL@XXAA8e+V65u2AXqL#rUb#> zqLqLm7?bZ8=J)7nK`_n^4^H;{hJ?@1s_?9`FfZ9@nJ|7&la>kNsM%L!!d^!z{!wfc zS97j46~hX#fB1Q(KC98Zxq(Ps6zw25yAegeqIiUHrX<5YVR|Xau-`JDNy)JAU|K1~ zu&GSvI>t}MupTJ+v|<=5>;EW*o#n_;a9$JA?eZlyAsO}q=FU`9N-~TU6|70t6Ypk| zl40R6RlgK^teVmUuR-FDIjbDrZ~X>Bm) z6$baT!4m$G4YrfXBqoJE11JvW4B-xwLl#QI4{8K?1F|GmHT$LvJ=OTT+l1iDWtnfjP_2aykit zIVH?~S_sS;!<}b@c&_y8PU3|S7z-3f?{j{^^sbe?(U-_) zHBbo5q23~dz^MJ;FL~JKoM%jFAu#7P9%otz%*kiWX(2G@Qv=ErHngLcQf^+`73xvR& zyXe14{^$M9y*%RELbsR*8w1V*^j{s~kT{xhAWuSI4W567!q3ut{?HCQi!#sTsUGRz7CVK^-{Vgt3qj15=`7eh z&AFawMf%a_BK(OAXCuN`0&zt6X>m71U}f$I^KC)*D-eqvY3IOv@LqHXR`3LJ z9tfU8g9`^QN0QmWsc@kNS=QzJ-ZwZ6hhqo*OemPZwm*0eGLAd6#}QZ7NJfRQajJs_ zZ$p%Ja1kQ&C4#TQ@LL(atZV*CzYnliZm=FP6bJdzr_~D1htX&Umm?pI&@x+xG_qzh zqELR;yjh4o{By*Sb%Xit7?)R$A!W^HY*a_B!fshr$?MsjNHnY3yYz;`A8;@?>qhSy znjOwzQ7>SOxT2zTcykn)hz(g=PQCGYIJ0yu4=<_!<7=`NLjl4imaY$b18;J}b}zyF_@E&k79SCf6Uy3KX#h zSqS4PLuF2sFRkqNkm`)2ZR1EELA3TtbEMM|8?X0946E?3C>VRCc}uZ*Y2i*2%oO70 zKp}^t?3JDsF1(F}wbILLwpS*ryfVo(WsiuPN*ryzoyGk&VXWk7YNd&Ir-ar=Sh2O3uP z%(J_6fiO%4bz8azY=6X&HaXvMoNGB0XSs(wym;)QIWT2huc` zWw@&!3-)WC)!4O}+Ad*a)I!l)Si}F2*)Zdh*6LDn0RB@xge*7PccipUvS)HP$h{Ph z=qeb+NwaYUiWxEhtrj=Tu%orQfGo#)Zz* zai4WphPP1p#wTLE|DP5rKiWHgg8TWCu|erofVuGaAor%HV&6!+HQQgiH2KBu+U>DF zCt7hXjGJo~$gb-fUsQYbs(V+h#x1y?t6BTQ^zetjiNAKRJUBgEauvQrwNuNHe`?ux zUlt$BUo8Cc`m37`lx>TRy=H9en&;M=eVzzzgWou_JvF%g_OY?Cj z`$~7l3T*f75%z?ASmJkyoiV=h%JH+@8Mllcv2WT>W7BPS+Np1j-}ld5u@$!4_*`ss zbM8A)_xbYjZtjntkG=PGtF$&h`RGLV{SkIwch~M%)IE7K){Sc`@fErqyJO{U>}Ro= zkM4<0+&67cY^-e-A)Ue6@3drJ#rW({sqZ0g(LRiVr+#cTT&Xlt5WhDVe=uWwq!vNr z{_ZxHCC!=eMjT6*!rSV+Kwh^OV?}*5Dm#DS!j*~(*KE)BR?6GdfR*y*E$p71Gy5CfiBy7vL5u!VD9`r0msSRfy4?yF z?-cWnvz&16tjfyE{C?64%P!bOUCq@1PUz9huiRZWCfMB#f7By4XI`iHv)s*V19|SK zD>Aa}aKfR7c&JH77nZltX z!>xvw!%xLz`uw`k%c*VAi+hWRmyPC9d zL+bqymyN>T{1v-v(lYd05%bPF?HDof#eK~W?k;fOxHUGx%}tE%?Y?n1FV~%$6>;3% z8Dom=F7BO6$Bdh?9s4n5c5GY?kib zUwI{V@qm6?)u});iPXD#yUE+PBD{d8^759j2B;5ay_y_Sl@gt5g zFu*A}d?K3p>~POvk%4A9J7}h}gCpf`rnAE~)7ioKa=%G5)7jx}rn7?_jb?miIy<=D zM*Y*lmB-Vfna>XQU&=Pq*4&p}M>~E&C!#2~|K{K5lG}GBZGo2kY)7e2Y zogG}8VBKQF%x4G9e0Fe~+|6`$*au{r>Flu0`)<%oX9vv;0?kayUE_OkmMY~uW>@i`D zl*43kmRKz=5$_Q17q^Jdij*j40^@O}kXMT};tKI@kt+@QEy?vZn0V1PA0J93vxIto)FEq)bKaoPJ`JYFTtMT5V2gW z6z7Q?C}9TIi5tbO;x5pf{|Dr7SUe$qES?v$(HSwqp5hR(T&xu9#dYFFahG^lJYhcA zMTFZky@-D%n(tiUZoX>;kILPA)(ZQ)>@IksWQL-mnYIpll57q@(|?|LqgX56nx*r9 zr5x@S?-L&q9}%~T&x9=I^jzC;`; zP8Q9ybof*5nc>V=pSZ`njW*ao_D9bqfAi5N!flgnKJJ8VW}AbFL-Z)ZTGa~hF4+e? zo$P;*h?p-&$yvBeGU2&oPkfFl-bf`y{TxAIbiN#Pz;ib{B+YhD$|U+e`_fpEAU8;rvID=E{M$>?~qr))1v>h&T+* zbsYYtr{ceq^+=K2o%d$J!An?*Am2LB()epdXc z_=31kL_dbn(hCj{`}4;GMM+FH8z^;?b5kS;z+qGdc%6ieQpKkS-a`%D%Vo#4-~R%u C!Mz0l diff --git a/variants/XMC4700/config/XMC4700_Radar_Baseboard/pins_arduino.h b/variants/XMC4700/config/XMC4700_Radar_Baseboard/pins_arduino.h index 1b73c743..c3f1cde2 100644 --- a/variants/XMC4700/config/XMC4700_Radar_Baseboard/pins_arduino.h +++ b/variants/XMC4700/config/XMC4700_Radar_Baseboard/pins_arduino.h @@ -157,7 +157,7 @@ const XMC_PORT_PIN_t mapping_port_pin[] = }; -#define INTERRUPT_USE_ERU + const XMC_PIN_INTERRUPT_t mapping_interrupt[] = { /* 0 */ {XMC_ERU0, XMC_ERU_ETL_INPUT_A0, XMC_ERU_ETL_INPUT_B3, 2, 3, 0}, @@ -201,7 +201,7 @@ XMC_ADC_t mapping_adc[] = * Serial 0 is Debug port * Serial 1 is on-board port */ -#define SERIAL_USE_U1C1 + RingBuffer rx_buffer_0; RingBuffer tx_buffer_0; From 34e06b70360f9474f14111f97d06b083f3ed9f71 Mon Sep 17 00:00:00 2001 From: mkiessling-ifx <58507517+mkiessling-ifx@users.noreply.github.com> Date: Mon, 25 Jan 2021 12:38:00 +0100 Subject: [PATCH 03/78] small fix, after testing in IDE * small fix, after testing in IDE * merged locally into 1.5 release and tested the examples on HW --- .../src/IFXRadarPulsedDoppler.cpp | 1 - .../src/IFXRadarPulsedDoppler.h | 4 +--- 2 files changed, 1 insertion(+), 4 deletions(-) diff --git a/libraries/BGT24LTR11-Pulsed-Doppler-Radar/src/IFXRadarPulsedDoppler.cpp b/libraries/BGT24LTR11-Pulsed-Doppler-Radar/src/IFXRadarPulsedDoppler.cpp index 6ef03f1c..80872b94 100644 --- a/libraries/BGT24LTR11-Pulsed-Doppler-Radar/src/IFXRadarPulsedDoppler.cpp +++ b/libraries/BGT24LTR11-Pulsed-Doppler-Radar/src/IFXRadarPulsedDoppler.cpp @@ -3,7 +3,6 @@ IFXRadarPulsedDoppler::IFXRadarPulsedDoppler() { - this->result_handler_registered = false; this->error_handler_registered = false; this->outDev = NULL; } diff --git a/libraries/BGT24LTR11-Pulsed-Doppler-Radar/src/IFXRadarPulsedDoppler.h b/libraries/BGT24LTR11-Pulsed-Doppler-Radar/src/IFXRadarPulsedDoppler.h index 6c210b06..0f7e177f 100644 --- a/libraries/BGT24LTR11-Pulsed-Doppler-Radar/src/IFXRadarPulsedDoppler.h +++ b/libraries/BGT24LTR11-Pulsed-Doppler-Radar/src/IFXRadarPulsedDoppler.h @@ -5,9 +5,7 @@ class IFXRadarPulsedDoppler { private: - //bool result_handler_registered; - //bool error_handler_registered; - //bool raw_data_handler_registered; + bool error_handler_registered; Print *outDev; public: From 0f7a2bb1a6b44a66c9a70cc6a90a3f0da0e37e1b Mon Sep 17 00:00:00 2001 From: mkiessling-ifx <58507517+mkiessling-ifx@users.noreply.github.com> Date: Mon, 25 Jan 2021 12:43:48 +0100 Subject: [PATCH 04/78] Update README.md --- README.md | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/README.md b/README.md index ea58a610..13ead5eb 100644 --- a/README.md +++ b/README.md @@ -21,7 +21,7 @@ This repository integrates [Infineon's](https://www.infineon.com/) XMC microcont * [XMC1300 Sense2GoL](https://www.infineon.com/cms/de/product/evaluation-boards/demo-sense2gol/) * [XMC4400 Platform 2Go](https://www.infineon.com/cms/en/product/evaluation-boards/kit_xmc_plt2go_xmc4400//) * [XMC4700 Relax Kit](https://www.infineon.com/cms/en/product/evaluation-boards/kit_xmc47_relax_v1/) -* [DEMO Radar BB XMC4700](https://www.infineon.com/cms/en/product/evaluation-boards/demo-sense2gol-pulse/) +* [Radar BaseBoard XMC4700](https://www.infineon.com/cms/en/product/evaluation-boards/demo-sense2gol-pulse/) ## Additional Information @@ -37,7 +37,7 @@ Please visit also the Wiki for additional information, e.g. datasheets, pin out * Page for [XMC1300 Sense2GoL](https://github.com/Infineon/XMC-for-Arduino/wiki/XMC1300-Sense2GoL) * Page for [XMC4400 Platform 2Go](https://github.com/Infineon/XMC-for-Arduino/wiki/XMC4400-Platform2Go) * Page for [XMC4700 Relax Kit](https://github.com/Infineon/XMC-for-Arduino/wiki/XMC4700-Relax-Kit) -* Page for [DEMO Radar BB XMC4700](https://github.com/Infineon/XMC-for-Arduino/wiki/DEMO-Radar-BB-XMC4700) +* Page for [Radar BaseBoard XMC4700](https://github.com/Infineon/XMC-for-Arduino/wiki/DEMO-Radar-BB-XMC4700) Additionally, please consult the [releases](https://github.com/Infineon/XMC-for-Arduino/releases) for information about the changes and new versions. From f1d3baad7eac584567172e2589bf275ce11c79e8 Mon Sep 17 00:00:00 2001 From: kiessmic Date: Mon, 25 Jan 2021 20:10:43 +0100 Subject: [PATCH 05/78] enhanced examples with Led-Object enhanced examples with Led-Object to switch LEDs --- .../Radar_Pulsed_Doppler_LED.ino | 52 ++++++++++--------- .../Radar_Pulsed_Doppler_plotter.ino | 47 +++++++++-------- .../Radar_Pulsed_Doppler_serial.ino | 48 +++++++++-------- 3 files changed, 78 insertions(+), 69 deletions(-) diff --git a/libraries/BGT24LTR11-Pulsed-Doppler-Radar/examples/Radar_Pulsed_Doppler_LED/Radar_Pulsed_Doppler_LED.ino b/libraries/BGT24LTR11-Pulsed-Doppler-Radar/examples/Radar_Pulsed_Doppler_LED/Radar_Pulsed_Doppler_LED.ino index 2d89ba97..326a9278 100644 --- a/libraries/BGT24LTR11-Pulsed-Doppler-Radar/examples/Radar_Pulsed_Doppler_LED/Radar_Pulsed_Doppler_LED.ino +++ b/libraries/BGT24LTR11-Pulsed-Doppler-Radar/examples/Radar_Pulsed_Doppler_LED/Radar_Pulsed_Doppler_LED.ino @@ -1,16 +1,18 @@ #include +#include // IFX Radar Pulsed Doppler Object IFXRadarPulsedDoppler radarDev; +LED Led; void myErrorCallback( uint32_t error ) { + - // turn on LEDs for error - digitalWrite(LED_GREEN, LOW); - digitalWrite(LED_RED, LOW); - digitalWrite(LED_BLUE, LOW); - + Led.On( LED_GREEN ); + Led.On( LED_RED ); + Led.On( LED_BLUE ); + while( 1 ) ; } @@ -22,44 +24,46 @@ void myResultCallback(void) if(targetDirection == 1) { // turn on Red LED for departing target - digitalWrite(LED_GREEN, HIGH); - digitalWrite(LED_RED, LOW); - digitalWrite(LED_BLUE, HIGH); + Led.Off( LED_GREEN ); + Led.On( LED_RED ); + Led.Off( LED_BLUE ); } else if(targetDirection == 2) { // turn on Green LED for approaching target - digitalWrite(LED_GREEN, LOW); - digitalWrite(LED_RED, HIGH); - digitalWrite(LED_BLUE, HIGH); + Led.On( LED_GREEN ); + Led.Off( LED_RED ); + Led.Off( LED_BLUE ); } else if(radarDev.targetAvailable() == true) { // turn on Blue LED for just normal motion with no meaningful direction - digitalWrite(LED_GREEN, HIGH); - digitalWrite(LED_RED, HIGH); - digitalWrite(LED_BLUE, LOW); + Led.Off( LED_GREEN ); + Led.Off( LED_RED ); + Led.On( LED_BLUE ); } else { // turn off LEDs for no motion - digitalWrite(LED_GREEN, HIGH); - digitalWrite(LED_RED, HIGH); - digitalWrite(LED_BLUE, HIGH); + Led.Off( LED_GREEN ); + Led.Off( LED_RED ); + Led.Off( LED_BLUE ); } } void setup() { + + Led.Add( LED_RED ); + Led.Add( LED_GREEN ); + Led.Add( LED_BLUE ); - pinMode(LED_RED, OUTPUT); - digitalWrite(LED_RED, HIGH); - pinMode(LED_GREEN, OUTPUT); - digitalWrite(LED_GREEN, HIGH); - pinMode(LED_BLUE, OUTPUT); - digitalWrite(LED_BLUE, HIGH); + Led.Off( LED_RED ); + Led.Off( LED_GREEN ); + Led.Off( LED_BLUE ); radarDev.registerResultCallback(myResultCallback); - radarDev.registerErrorCallback( myErrorCallback ); + radarDev.registerErrorCallback(myErrorCallback); + radarDev.initHW(); // start the radarDevice, to read the default parameter diff --git a/libraries/BGT24LTR11-Pulsed-Doppler-Radar/examples/Radar_Pulsed_Doppler_plotter/Radar_Pulsed_Doppler_plotter.ino b/libraries/BGT24LTR11-Pulsed-Doppler-Radar/examples/Radar_Pulsed_Doppler_plotter/Radar_Pulsed_Doppler_plotter.ino index 37ee5918..f02cd7b5 100644 --- a/libraries/BGT24LTR11-Pulsed-Doppler-Radar/examples/Radar_Pulsed_Doppler_plotter/Radar_Pulsed_Doppler_plotter.ino +++ b/libraries/BGT24LTR11-Pulsed-Doppler-Radar/examples/Radar_Pulsed_Doppler_plotter/Radar_Pulsed_Doppler_plotter.ino @@ -1,17 +1,18 @@ #include +#include // IFX Radar Pulsed Doppler Object IFXRadarPulsedDoppler radarDev; +LED Led; void myErrorCallback(uint32_t error) { Serial.print("--- ERROR: 0x"); Serial.println( error, HEX); - // turn on LEDs for error - digitalWrite(LED_GREEN, LOW); - digitalWrite(LED_RED, LOW); - digitalWrite(LED_BLUE, LOW); + Led.On( LED_GREEN ); + Led.On( LED_RED ); + Led.On( LED_BLUE ); while( 1 ) ; @@ -24,30 +25,30 @@ void myResultCallback(void) if(targetDirection == 1) { // turn on Red LED for departing target - digitalWrite(LED_GREEN, HIGH); - digitalWrite(LED_RED, LOW); - digitalWrite(LED_BLUE, HIGH); + Led.Off( LED_GREEN ); + Led.On( LED_RED ); + Led.Off( LED_BLUE ); } else if(targetDirection == 2) { // turn on Green LED for approaching target - digitalWrite(LED_GREEN, LOW); - digitalWrite(LED_RED, HIGH); - digitalWrite(LED_BLUE, HIGH); + Led.On( LED_GREEN ); + Led.Off( LED_RED ); + Led.Off( LED_BLUE ); } else if(radarDev.targetAvailable() == true) { // turn on Blue LED for just normal motion with no meaningful direction - digitalWrite(LED_GREEN, HIGH); - digitalWrite(LED_RED, HIGH); - digitalWrite(LED_BLUE, LOW); + Led.Off( LED_GREEN ); + Led.Off( LED_RED ); + Led.On( LED_BLUE ); } else { // turn off LEDs for no motion - digitalWrite(LED_GREEN, HIGH); - digitalWrite(LED_RED, HIGH); - digitalWrite(LED_BLUE, HIGH); + Led.Off( LED_GREEN ); + Led.Off( LED_RED ); + Led.Off( LED_BLUE ); } } @@ -74,12 +75,13 @@ void myRawDataCallback( raw_data_context_t context ) void setup() { - pinMode(LED_RED, OUTPUT); - digitalWrite(LED_RED, HIGH); - pinMode(LED_GREEN, OUTPUT); - digitalWrite(LED_GREEN, HIGH); - pinMode(LED_BLUE, OUTPUT); - digitalWrite(LED_BLUE, HIGH); + Led.Add( LED_RED ); + Led.Add( LED_GREEN ); + Led.Add( LED_BLUE ); + + Led.Off( LED_RED ); + Led.Off( LED_GREEN ); + Led.Off( LED_BLUE ); Serial.begin(500000); //This baudrate is required to show continuous wave on serial plotter, at minimum framerate (continuous sampling!) @@ -118,3 +120,4 @@ void loop() { // put your main code here, to run repeatedly: radarDev.run(); } + diff --git a/libraries/BGT24LTR11-Pulsed-Doppler-Radar/examples/Radar_Pulsed_Doppler_serial/Radar_Pulsed_Doppler_serial.ino b/libraries/BGT24LTR11-Pulsed-Doppler-Radar/examples/Radar_Pulsed_Doppler_serial/Radar_Pulsed_Doppler_serial.ino index dc9e744a..417eebeb 100644 --- a/libraries/BGT24LTR11-Pulsed-Doppler-Radar/examples/Radar_Pulsed_Doppler_serial/Radar_Pulsed_Doppler_serial.ino +++ b/libraries/BGT24LTR11-Pulsed-Doppler-Radar/examples/Radar_Pulsed_Doppler_serial/Radar_Pulsed_Doppler_serial.ino @@ -1,18 +1,19 @@ #include +#include // IFX Radar Pulsed Doppler Object IFXRadarPulsedDoppler radarDev; +LED Led; void myErrorCallback( uint32_t error ) { Serial.print("--- ERROR: 0x"); Serial.println( error, HEX); - // turn on LEDs for error - digitalWrite(LED_GREEN, LOW); - digitalWrite(LED_RED, LOW); - digitalWrite(LED_BLUE, LOW); - + Led.On( LED_GREEN ); + Led.On( LED_RED ); + Led.On( LED_BLUE ); + while( 1 ) ; } @@ -24,33 +25,33 @@ void myResultCallback(void) if(targetDirection == 1) { // turn on Red LED for departing target - digitalWrite(LED_GREEN, HIGH); - digitalWrite(LED_RED, LOW); - digitalWrite(LED_BLUE, HIGH); + Led.Off( LED_GREEN ); + Led.On( LED_RED ); + Led.Off( LED_BLUE ); Serial.println("departing"); } else if(targetDirection == 2) { // turn on Green LED for approaching target - digitalWrite(LED_GREEN, LOW); - digitalWrite(LED_RED, HIGH); - digitalWrite(LED_BLUE, HIGH); + Led.On( LED_GREEN ); + Led.Off( LED_RED ); + Led.Off( LED_BLUE ); Serial.println("approaching"); } else if(radarDev.targetAvailable() == true) { // turn on Blue LED for just normal motion with no meaningful direction - digitalWrite(LED_GREEN, HIGH); - digitalWrite(LED_RED, HIGH); - digitalWrite(LED_BLUE, LOW); + Led.Off( LED_GREEN ); + Led.Off( LED_RED ); + Led.On( LED_BLUE ); Serial.println("motion"); } else { // turn off LEDs for no motion - digitalWrite(LED_GREEN, HIGH); - digitalWrite(LED_RED, HIGH); - digitalWrite(LED_BLUE, HIGH); + Led.Off( LED_GREEN ); + Led.Off( LED_RED ); + Led.Off( LED_BLUE ); } } @@ -62,12 +63,13 @@ float raw_q[256]; void setup() { - pinMode(LED_RED, OUTPUT); - digitalWrite(LED_RED, HIGH); - pinMode(LED_GREEN, OUTPUT); - digitalWrite(LED_GREEN, HIGH); - pinMode(LED_BLUE, OUTPUT); - digitalWrite(LED_BLUE, HIGH); + Led.Add( LED_RED ); + Led.Add( LED_GREEN ); + Led.Add( LED_BLUE ); + + Led.Off( LED_RED ); + Led.Off( LED_GREEN ); + Led.Off( LED_BLUE ); Serial.begin(115200); From 1096b73a7afc7918efd20ccf7a64e2fc1603510d Mon Sep 17 00:00:00 2001 From: "Kiessling, Michael" Date: Tue, 4 Jan 2022 12:48:28 +0100 Subject: [PATCH 06/78] Update to support RF-Shield Rev. 3.0 --- .../libRadar_S2GL_Pulsed_Doppler_lib.a | Bin 4115816 -> 4151252 bytes 1 file changed, 0 insertions(+), 0 deletions(-) diff --git a/libraries/BGT24LTR11-Pulsed-Doppler-Radar/src/cortex-m4/libRadar_S2GL_Pulsed_Doppler_lib.a b/libraries/BGT24LTR11-Pulsed-Doppler-Radar/src/cortex-m4/libRadar_S2GL_Pulsed_Doppler_lib.a index 8ce26a53bff3f61404167cbaa94e03c1aff223cb..1b6b799fc5f360bde3dfb8ae07bbcd3c02d01211 100644 GIT binary patch delta 464947 zcmdSC349erx;9?beNLawdJ;}HLIMc^5=els2M7=#K-eT~0)mEp6IsJ5%n6DkA}Y*L z8y$2|5m6ZhK|w_YWd>AKRGeYN8Nn5Ia2c0z`JSiyJqa+*{ol`-``zC^(EZfA)LU;Y zU0vN>Rp->L|IkMt{6VkF47YF7wq1vk_Qg3l_>aG{&pA15+jMBt*5!|nRmv<;YU;=T z(Ifm%29It~ipRT4&N+1Ba`m&vg@=@m9#<-*|L=})U4$Pil>WawjG;@^|JAVr`sWJVey{%J5&o}){{fjVy@_&+Ivg5z0FM z2v1fPk9AwmJ?=fEEFRDJ>W;VfDeLVpP9K%k9)XUlRqe49;plPyb`^*oZ>?3fzg*e* ztCijVaNV(euCk-Y`}>qFN6fHYDrWW}6|<&B#cXL`d&KrCQL$m3c-(qe#XfsT#eUpg zCB((6#G+!AG-!}Yn)ilEy6Ky`WB-jRDSCWbs*)3rsCor&)EzI5R`uiveQ{JpkCgni zs`eOJsZypLQYlL}sBp^K=_=*+ES2)$I+d~?;a8JX$~*g1%1;?8HRFg%ZU2T!tyrZ} zF9y!Xan+3~^_J5r^?{8lb^i&Kdc0bto>{HZtO}KuwO6IJIi=DnQdHX5B$amAIF)wA zmn!Y143&28F_pG&kV<=PiAwuuvr7B1y-H7w53BSRU#j%-ttx%oF_pgfgi62RluEzv z9hH8tiAq12rPBYAqcT!5R7T-emC+|&WlR{PGHUj!jLl!Fj90!_8Q+gq^<%$O_3Ix{ z^$TuP^@o11>aWi>4Rs{h6jmD!-Z%IsC3GA9C;jZm4l03Rt=nJ;ZtnIDBus0MMB zszDx((h;h`@b6WFY2#Ic`?snFhgPWuXTDKcnFT7VXtc`ev0P;ho365cbxLL3vrc8b zRI0MjVPz+6R@r$XyFOf z=)=7#r%i#%Sx~HU!n?mzxfvg;+%ZWi_o;2FalIp|@qpE;@jZi7oc&-SP$#iLb|@F3M>_aN0Y^?TK{_c7IUMWt%G4fOsuRMS6iQcXXZteRyPt7hE} zt7eNzRkPoxsAk|d`{1Z*_Ty=lpFCRS=WSB?L&mFc{*)}0e|fyhU-!Mr$Mv57*>Y7- zf4eFu+^7n=?NtRs-cSX1fPQ+bDmXn_HBVKld0DAyzPLm+U$a3qzr9E`-?3UXKk$ZX zVUJTShAGv;sZ=c<-K<(1u23!B%uy{+iiNFiRE1MZRpHeIs_>Rgs&E_Vr&fnm;X7HX z@b9NpQT%9Cl)G0IO(;-BH*Z%(&*iA1FE*%_{$kZK?T~6&0PIquS`Iv*T3%ePTF(Do zwY+A8YPq3OwS2&*T0S#bwS3uDE#Ew*T7EiLweoFKt#aC{R-Ke;HQc9K&EBV4{rXGQ zYV%sv>d*$&>hx*VIwAbAYF(J5TKBb8>+$1N>&wBs>4<8*W20()WRGh7(P&kiT&9ZK zmHy8h;r}Va|4qB$pUYXhCwHm;M@RVoRYIzL&N0=#-8ZWJkX@?%%u3b%>MYg%x8cpI z{jO5g{-sl@{d*%+`)}h_honl?q4_D*p?`(yP?e-QTwbg?+*F`CJovrp@XR39;V;#y z!{<4wW1viR%si|*w%MgR4lGt3C)lcE^#;}PhBs8l-)~hNai{C}Hh4dcR-Ljos!na1 zs80R&s!mg;t4^06Q=QfvR-M8;MUT7os7^c%tox51C0kR}zdFMIO3=AYj_Ul=soJB< zg&WjA9q(>dUH%(K*Tvtfe>$E%rMfi+Xb!M_sJ@_WQ>RyZPqZ>qoZtM~=}o#A>9>+p#FgZm7t>N9NEkYQCL zhV<(1(nYf4qG2@9r7oG^Q`>fL)}NpV%Xs{X@^KqPf)*rd2JNUNwKptSQKG z)#NF&CM@-2P^hYvPhMEPv})4QNwcOnAIvYEursD&POPa~w~nkFmLFL+EUH;+|a`lwA16P;Neb{&Dm63T${^215-2Yed?9$?rc(j6 z3diO%N$QDHC1r^Bl=|vdJTYyo-V~`nJ-go~ z*DGD1j{NvOd~?0B``cpQUs0Z$bC!lVFk}4LIq>v-73GoZrq@Sq@0mW$c6+vbWOT;O)7~1AK z#15Oe{TcoOiJC=Y8ElIb%$Aoicr#AEqc`I0*ZvOQ0jX~k!RTVkeWgdjJ$aJAr{dz&sI*@UdxEnJ+g`2jS0=5 zMI*1k{svL}Gpk*y$ZkZ7BD({!Zw>Nf#fS!Kh)1=zkE7bHN{=eBFGm4cLp`e0euc>o^Qbbke_sLH_`4`J zYs6Ks8OX9m=ZBF~`+GWbk(WVbPe-$`#(I>`{xfZk^L(-G0hC?rQ89K0`gw^*#oBY} zXO$N(-u{~DjL+w_i9$QhVw&LjlHyjKHPNNQc^RlSMlyF$XA-ZkxTg@zvZmid=iF+W z=|z=lyVRq6_Ny$mSzeO1-HEPV7Ik1N3u?AUCD~bM+}50^1G_1kOIg@}1Lj;NJ+Fk$ z`U0gWjd)+IZ$C+GUkF(OBOU{t_z+G3k3JQp(^ZfS)>Zl;%G4g6fC_RW`8+y1N*f*> zZW(1X@)+HsbkL&*M`>Fn`2wQ?b3i9wf_w)?2k1faLbS)gm;gOc_4b*89svW=&@ISt zpv(>9f(-3IrUE@(Ei0rA>d;J> z5A+G7x%4I-noW7%Km(WFszVb|-+_J-f4dHSkNzW2;ksz%?b4wSQP_e0BHyD!S2F&9 zK$v+j^Y-e{Mf7l>DD2ar>!>hD3>?rYz4{JPfx#j_q(c{@DF!YO`mhe&$P5n=`iKq< zLTdOzXdEk}N))yk zp{`76d|-@gaJv!e!?K$o@)|RAA3dEY^eQv7kXfH3^lCHoEFG8}_0$YCg{OfjB41~Q zQmH@HrNd_4jb^BZ2~HD*4Q9yg9;S;KD}RQ_H<_VzXf=VEfl01|o6XRdOyE+H zZ#P5#AU#XyU1sRF)W0lnnXA9Y4E1H*%%(hyBHU+&woqY?BzV9KrLc15ih)CBXb0u< z0*hS(ht1GLIy7J8r_In_$`?rdFU^z-`wmlqYLS0qh7MA`P~_j6A&VJa6j&L9{ukGS zFZ2o(76*RqCa}quGORZYED5Z0=^B6Nuaqwh+~m^x{3*lw3|E0=f!}#@D|CwT%LAJ| zxfNPZ2bTvP@Z2??~D%gdRrZ@$8!;N8I z;&w7@7_Lr81=$tE^rz1Bs7`P`L$nxN&Jeqlm_sD5CCPp)hTTr^))=Jk20i*-ie1Uh zXeezU8}ACY+cC893HWKZp!wNFdJn>}zUOf^Y~L+tq5!ID!NW!ot9MiQo_1?lIpsm}XZCHn)ZCY7wocm$kZ+$=&Wp)KC zrWft{b!;_Ty>%;ElD1w#(6HWxP170)8$N3n&VFT1gxS~?7eJh$%ixJVsC9k)7-&6R zZvcdKtdF;u`dYy|eZSsDS*-6S4#92R}wQiutkv|CL;5`mwh0^bUmF44rb`XQQ z62;LHwz735b2HRcI6Fc^-G+kEu9X~0c>mWeVWQC>S{O~2ipX!MzrtCMuT>pQa#XG6 zcxtYqX3iRf_=j3?-OAMmP!M{)=1q%#RHMI}5xeo+>iLi{_I9xI!cVgRtEu`94%I|| zftIYVtBpJW%pko!Qycp_mQic)^4!QbF!ErKO>+>)!bqx_t~3@RoOAnmu4U_n@KQhI zmNFES?T)|TTN8a5Dpx;Nn{F1QvzYFsC~hyIy*t2L%Y;}1?cIci8FqOyJ=Bkia?|w! zO6Au`(i!02Pdl3t$&GmN*%8D46tkg@ho(M^IA}FEo@eZnKO6g>A~(^z#Py$Rv%$xb zk7(e1G{^$Cyk2+fr2t+ieLPG;=fzXyZ*0+dDE@*aX!ZI{UKmDmW+VqnEvQ(kXTVNV zhR?~yKRMC@vDB}S1_z-iAl(_2B8Af;N21@EfcDo+du14v7WRTvPe*M(=0=V3TMPpK zx3Ku4$2O|r2wNpnIWGlOq_6S8$_2P|(7yN=ZJn{cWyoPmeIMl`br=~}suag0w!2=? zZgmk`!bmr4te@MIb?~5@MkUi!LC?T!8knfv_kY;%ck1x7TkvN&o-n0Va8yrn!42AC!L2br1&9}JR2{4 z(ra`JG#t0C;vqc0ted8>{nw_G17Fde>E>)Uqjj}zssMYUnK0pb8F81H(lsMc=#KRZIZ=UJ~^*e83X-OglDl(It>Mq|3s<17Z=&@0`O%|bMe zQKL6IWsi}-vHZ#;xog_0-3i8cbzTzkFHt@v=O{SBXg?2L>1}Swc`6+qL{8#93_JrJ ztz&jT-f<0YX6}Qc)(L+`(|R|Wh^ac<291Q%<`=Gh@HIfk>rn!UMSe6+t%J;CxT8jE zPi&R$v6!h&`XaQ(pw|^@c5@}{aKX25*(2qo-&_bV5xxGzt;<6heL-Kb;;vY;iH`Ds+S|VPp9vEaK&!zoG#4{M6Ru=UmK|39VKF@6-mTi zUf9JY&Y9BeP~^jKe8V)bwW_4F!V6Xc_|gm9(N4|G_G!*%uXc)$L4J{e7cT zGhQz(9NxCypsLE2J?BqeIAivls{M>moqu7}xj&Y+`Grx}ztw5fFO2%~y}I<5MU8a-w#zSz=?pE_J$_--BgMLj zGkcqE_RHc&p1Qho;exi)W>w8?IpLhD9XECHxaye;s{o$dtJ=)fQnfovR>vFRHn{bn zH}|8r#c=z6ty2u&S&WCyXFR5LlW~T9mI}t;xklVsjKk+M{;ahbn=`PZc|^5pQ)pfv zE;YYWqofCd4v-zJm515+$PF>uc z=QAFS+<$F@)G5_dCRIY-}Ug!wZj%&vASgE}knWkOQq&EExgzJKk9hV%YC z-P0no@5qUqxPG?t&}-(usCZVNcV&({>&kT6EHWAV zK6T5(Mr7Y@@sZKDB}K8gh%H0@mH>MuCY4?3D_dojU1gMAuP=!$d$H^fWe3WhDN9tn z(8)$V-ng8R*=60|OU*zw1bcnojN0L$1Cer-Q5eetIv*^wvPFYd6?J+f@ zy#eN+h~C^UW_2w!6x6y}>JCsFYN<1zHq}x+@17I0wU&DH?tU@bYpIwm{bKgiQe!~v z1C@cC4T{{mCC_Q{XuFiii7iPn$7E5K6?T{6?2Akj8 zNPp=?8V|v-+DJzTHe|ls)_@`=9c^3Qv@_%z*QjEGNnt1*D8tHQ9j>9GCkxB?M zAn6<%r^Ch2cuo_zBEX>q~Nb_eU$sHka4T}@i%uYti zdE6RUDse4cA`($odmwqsS-GcssM|#lo!ugenQvSpgP_|L2gI%uGtV<|E9P%K;7oYl z2&FDRPgGG~scEjrDgU-xQp=Jlc=kt%G|5p()a142#d{DB3&$eK$3xw&hU9FgPEA+p z5Mt6o*;y8DKhMI|+0b(>+LRuk7q*+UZa1kC>{sT(;MB%dEj{?E%m7Iqxy$2(QK}>e~%sN zas;BY%i%O!h~}aK`VhO7a}og*@Z6}0(k{;ImcC~G1znUn?>c8je!U}2Cpo%<(IB#CM~WWj8d1iL`k*J)8YW-Cq~AL5LEdc2-{AE)*I4aKq$iBA(P#WlrAmcCB;!y8Tg| z4Hi$`pQ$P$yB}^89-!_7leH0#qaF(I@pEWP@k=V@IXLQ}a6dSQ=7WbPw_SO>N)>vQ zODEz*geM>1(m~Y=bo4KY58so{F_5g5okNGz2BG=nTu-H{N6t0?-V-8c7h6xIt2fV+ zzjuzjzKTabOO+)!{Pk1=mEug9Y&Pmq4u15H#a4A5y+q=98O>JL3tbA`da98VJf>6K zmnp?ABUin4o`Fv#g6C+Sibo5jBc6U!)l_Itp09ce?Pa{VnsyFdsIC>-tGSlyep4m7 z20cb=^+Mz?yBkLWdkW9FYqyEC+0)}3PTQSx_Ec!=vMHBMn!7Y|I-%{(Q;)u;6PZy1 z7q^Fz7awn=7ezjOJUzTjsT9h_dbbv1w5Joh+`9*o@5;~TgO0|-Qy}JOd+%u&uNi4z z1+m6^_M&_oXah4}#}ij7H5nLY0@KO30&ggZBfU$Vj#QJr#OqfZf?$teOz;wpy$b!m z(3!y4tG#6TY#bCk2cEN8E@*&Wi}XYv}xvLcDYMNFalD z-~joC*f|?nQU-1q@x+;UEr9ghK&misb5X{0yi6jZS9cwPB5%@+!2W^QM{t1PC_%S~ zAxBhKZ?@p&g7D4dUnA)7qNTx&g7*kMB*>X7lphj2E_hP#eZfxzzYzRRFhP6q8wfTR z>?9cOD}gbBRf1ClFBP08xL9z7;3`2!@NU7Kg8Kzu68xLs84ttiCt)NQ;;A5~(lF

    yHNO3$_yMEZ9d7^T=Jj34(J3 zR|s-wL_4=dV-Aw+Xm$N?3bAo>s{>Oq}6HzMv5cK1@gKaIIh$G2G)PD*CQ}H5} z2!#TnTMONhhzsScCaXX$u#Q1;{jf}<^CkQSfBK{RZ-$aD|?L_ErA;O{G6PqHV@x1;Kc$f@C zDU~W%p9qihh)`%N{Qg1@C1Nx(Qg93r`jdpNAtK&tVtagG7FS5ALc>YK{^%bB`3y;Zb0Q4361oc!ZKj9N1Br03Qs{BS2}(^6`ZD4m zTqQ(a|JO5sMivo;-x1MxHVeIjI7F#Ognm}=J;84U7UV`p;4ftoFj|=kiKd+e21iu#ihl`OvKHE5kAN{G4?<~EnTc>cP zkRt^7X`D@dnxH#97W4w4-2okFPUfTD)q>XwMg$$fdx&i?FG6sq;BF7SZ{oZbo+ktN zs^Fgm`L&x(_anhC1iu#K*J?K9IKhx$x*$J6v&9w)wiE2+A_{_En%P7L3Jw<>C1@$g zCr2)L{-BduiPs`6U+5m^OwPh1aH98A$JKM6s_GTt`GP-zc~N>AU5+kqngYCSn<`3&E|#-b!r~+)l)Wyi0Ho5f|`Y z!4eL}{7UsF+DeTj;$AtMh!S=Oc_`rs=@g}2b4Q0L(x1pcQ6?c0i!hgnqH9M)QI!)> zLY#BS61s+nlDUEVt;v% zMtNs2N61MNBIp7ljKQ``mk^P&5kik9B8SyNFCikQZdD-uYSJlE^q@D8M#jUtB*Gpd zO5lLdhlnVNqe34eqC`#${Us44!bq5(|AW%=|pF!dQQ+lrE*Ek47V7gLbk8eGihzMU})KaF8c zNh#E^kfaMVOkNGT=Y%s%sw8KZA~JDHU5<4SS?8P_oyaT6J~gTM-^CnE;a{x z@rtbXnEW75R&1eBD{}}abS-)9t?pE<^n@i=kkn9*Dz&!JwP7ArhC=kQ5u1E!H%Ht6 zGycbM$}*?dhn`nBGd*P~oJ&2*XZ2>hSzZCy){iuM*#^F;#rhHJS=yT&EuBLY&ha9q zSiCcub3Ga6^=DFb-hGG|=n09h8&lTabe_O<5c>MF84Jh$op#p$-q_e_Ol5zwnd$O-C$&cFUPSM>>==vHp;=w<0UaIr2fFPtV{79VhAOB%d?=!Mu1sZ_ybp zZ_^EplJv&N;5X8pHx_0j`Pu${<@CJX2sv{{TR!L5(<$+OejAw@x#NwHb7Fp8lJ4j1 z@0^;R{1iNa_FT^|bXtzSG$r5v8G7-ToHIkxn?$<(HQ&D-9dduC&0c$fGyZQKaw6aV zb+soO!?g8hLD^k)TyWXl7{t1~x zACm%+xe}Lp?Gm;WWYWBkoahp^aWG=K1G=8>J;oP!ozB?)mmxsU^AQuNUBY$?WaeZf zCQI0^MmA*y+t)}_RwwSlog!D;v#rR&x7Qn! zeG&Ve+~gK;+E*564nVJ!*vuE{@=n9#7ZAnQJ8%#&%)He)ab{%3JB=Dw!=A5ipcnI* zw^b+p9@+Et6Rqt!v5ghE@12IZoD1q35D3y)EcHkXkRB*%`*dO?^1(Ze!o!&G1;Rb7 z6S-=^H$>9q3=NEP6F;UCcOlchVIr?F5-}}B`GyO<%1ErCb0fry z)kY#;mH9>rz19dPRlEMJGZOD%%&~!~uH_qz#EVIf6HA+n#GSNsvCx~1MBbx(mk7Pp zNSudK@>L1F%}5;1l*R{YTzlJ%#HC2cH$mhzW@01SA3RYQtIWiP%=#puSDT41QDJh_ zRWorFnt^YM$k&;PTp8e-D)fzJ;xa2T{Jri&Kc?EH!rpEsa+vO$CG;*cF@t_w7P!&% zYmb>Ym?b=0$0KjOS7mgycJ_Y1sZQlwMc<0R%}~P1fHQD0Inftc zajJfpOLJnkpb+X^ixg9=MN7a4y$pS83ELyuRcJG*r5@!A{hib@kFrC3VavMQqvAsw z;gz-GBRGkbWT7I&w|?bO$;xEYv%=}HU#}g4S=Or0E!-$W3&62{?Y_-KV#jIz>S$sq zG`KpN*j)H;T@y|05jbqE@u;NGENWi+18m{W>n>rk)_O9mTKk$w_?R`zN2WQIaj(0Q z>8I#GSFTn_y$u4LdV&^G`I+BLor<$BbqBKOPaVh@%Df7!K(9pTr)ayH6X8=A;-pje zL2jgWbmQ%Z4PWZtamMV%#V~8H=nJJZ%_RqVpk{LXn~TqI?w?+1V=>0?KqU9WEF<5H z^!Tuu(K8U4_Te-7H<7}RvJ8m&10b6AQPZTJOmQJI(hcd=Ul!T;QMUe71}P=blJg-~ARem}Ghvl()W{Jqurt=kl3OZ{5PAbM8Qy>id?(!u$0V_18w8{P;rs z`$+01)Ag3fuRdv=^eWPd?_n}U-Be@BLfRK8%>3<~0}wTUIk~^0DSiy=Loi zQq6Udv9sr=gKfJQt{7^XKRRRa>0fqZcK&y!4etM@+b{F?-}XJ}AoIIpzw=Q&+J?Hv1v)_slLkC?iJFQx?JeBPuRVlG%C zr|hRLJ}2JRO=6};`OeBm+NC>{wl3BioRzj7f-%m^wqC5aJN;t-dz}3-U>vh4Rwo(7rOrdKx|#pS21=cD{u-3)A|0&Ciw2??5J*^;(T(E z88j+Oondjh8C=y1bMpN|nkqGk1EM^=%XyX&+PA_b;OxJm(*kGTBdJNdm&EJ%q|9nu zS$tT%i-?Q(7!emhj^*5*rAMDTKxx;mq`mXA zZ-(>c^$t&(mxO%>M(>D9@}^%oA#bUBWdWyp%Y8^gLQ4R8Jb*I=8M;#9l-|2}jJ7(8(SvAG(#uNyp}n=$`D)#%{qIrKB8 zMjEy2{~sV>`#+$T9pD1=y1`Rt$jsZ2whW${!Kvu_e}0~l(bG7jdG_FGALw#lr`KRB zFa}Y4(KY0O4{5%OcSG<6Fpg9{>|}?O^X$M1q~nV&ArE{XE5PL{zUUhAKpI@}Mc0rAII{F%4LOZs0E!&=qD#mFuhO;X z67qn1qaWmH7DEp*SwbFeANU(1M%R!B9;eah8uCDUCV%!C^6wxvS1`ti!%Wy0;8+ub z$mMX&_VJx&%%?cTGO;9-R^0ob0v??crPEc+LCB$mdnMPmyIR`Q;%94@_IdQkC~bK3 zlqlWEqZdZ$phsU7rEM(Z_KyniZD&F@T=tI+(1Qd%Z1~5x!yFY(+-LfG1iBy-!31Q% zU*?7}LJ7VDp1-GzhH7+hA*1yYdX)}-iL&w64T*z!Orktc&Jx0k=^#5Hf1khwF1<+y zTTd86)IdGxnw%H0?zvTOM-iJuqWjMM7~!Cm(jtxVRVp7 zHT{D`en2Pn>N`mJ2TS}zI@p`}s~cbkZO~zV-3U9#CDQ)75q5AS4Gs-l=6ZZg2anP~ z-3U9lkPg(1u!EDCqY>i3Y9qLq`Xhy2Yb3K~xMDh3MZ;qQi}^Jh3y_Uq8X0vX?BGqb zR5!v7TBPen*ul*#+qw~Ua0cU#53F}R-EIWmMx*oBjj)4%rKfcR?4YJ+9AKmU;d#ak zE}((QQCH1iTU?X=x)FA859M_u>>$Th{%KOS8_XbI$N8sA{EcQ1FV?V+g~&IVLB5;v z&kX$5b#Sv8e3AAsG)MYyV7nRQc-|l&L;8CkpvHz z!Q*sjZnUz^;A+a}1s-(cA2x#pbZEZFPn*FA!bZk0*5@gKe&tXrGXb*dY?au>!bb40)O`8R`4mxFAu!o z$*mx#1^Jf;-t**mZ5-1BK|incnEnj0SMWC_IhrIxZlA)&==KgVDrP<Zurh7aJLZ9X&l(ScwY7;jNA&yZ%f<)1?G6_N~j62yGQr}e6<#M*rV`la5>4{ zw4SB|GxcLkhHo=f3a2>el-m*6NO>Oy?UV?7jKNzOG{aa`kJDfRi}hN>NKXlb^+IR{ zGocb#slP%6vR7=yq_1+9#Tj|N;C)Q&Y9a05?MNqZjrM$r4?acLuN5*O_y(1)6EZQF z2X_MNT@u@H1cO5;j)*uZ$O(#pn}kdbc0>sV93krkdsBI{n>!;fr0P}BudVuzUbgq^ z+d!v$3#U~I+l5ZyibF$ThYaXF>pdIA2VT*iF^?)tM~_N2RM14cz_Hp)#W#}ak>TXO|aa|YxbXR1wzPs?c8-qFEW%^hbJ$mw7*??<4 z)$6EzG#FO5?Rx_jvUDq)bw9lY0{%6`!3#%kL9}e%NOV62XHvE(##x`Q)55Od!8FVl z)D39VwG5-%z>J~&96gO?GFCqa4*%e~yIj-u9ia{@K0}XV0$f4weNsCC)Z98EyQ?c; zP(kWtWwK<2({rL(VcBMBzHZc))n=jvcLr3_e6=&S)crJ;P=IZ>u7 zjM0Toi=KLsF}~2bv!`yMKX6{?sq_5P3(-QIuNdTZ3M#VWcqloa7Xygs-x;T8FP(49 zZR5=Bg=fcyob@Ct+c}Ss{M0#|7os?)808!1TSU>Do!oN7JPzSTM;|tt#1|+v z9@lOj9BbsP@7O5I*8&rc-1qOhlltfqU-%&WHZt*mD)?7HJ{XbjPFV%s05hby4-D}k z!To|S3!W4_Bj`TbK|dK+CFA7^w(&6RPEw~}s0bzq&J$cOc!%H)!To|S3!W4_BdF1f z({83<3&Ade16;&i^CDr)6kH~_M(|d_`ve~od`|Fn!4Cz$6O3gqLk9%;R-QCpx)BEu z!w6g?jG2PV1lI`OD)^Y-bAqo6ekaJ=JPo%HJR|s%pbvc~It0>jfP_cld;OJB5B)kbA$;-U-3ef0)LVk@5fT5i$oX=E^iM*^<3>vTY$Dk;94bH8&%rJjEFo3{F9+m6M~%Kps@c6S)613I=DboD@V zj*qw>{+w~cbiMA6(xBnz4K&x&m z${1vzZY#=<5w~t9N`7-VYbVM_;nI0KQ6l3=_xE9D$$Eylv)u1T7AJ}Mtu^3S);&05 zE6RJA?zvl0a^gnaR+NL8+(idr5)T#jL1dtACrW%FIcq1%*GbjwMA=6BoTL%DQPL3d zYj>QivYZ|xbY>SmebsF)c@uSNH<#Rq)ao{uIQo@Q#a*HF(F> z+j0(#(CdwXK4d@fDiOTD_C@sgMNoNgEDhT&W$U$+BZ z@;?}_ZU?;NWcpFJ177l#ln)IAz&7)a>0~|?Tf=0Nv>L-*HEY#vfR}tR(;XpxtTvLn zQ-7q;YYpf13w3PU>u7XrfNAkfPI5Wvy3OyB7t=`H=6A{2rjs^GH`I>PVU%t(>${3WB;ZDp5y2kFVtG|l9Tsb9C1T{16Z%iGG1JJ}^ySk9JFx_cYVWb1aMOSVbZ z?MRo*Cp_yiY?es3_n65)IH{v`BfZ+`Fj`j`sn+hBN8`&>3O4|=Rs?zi@N|Da5=(j0 zd1;K!475dIr0OS~(_?g2Z%#|p&G>e<2#qSe0c5%vAJ+BIvM$JJf7AovzZPP6hzPH#$cA6&Xp z$~Qx4L7(%;MY=^UKXU6Hw861i#&tO9GLqjTgdNTPu(oTs_1;84nUUj{XYc`xA3@iGLO7VrMAn;(0nnmwAr_qvv6`zYDSq z=MKthNPmcJZeDV3ny2%OM;myL1xLs)%ED|y_p#s`l80TBJ^zkqIrH(DaHG>^KAsPr zhgM_v8sJTat zbbq@x9g2&cGt2QnGk%DZxk4A)hn^bpWzAguSLcEiI^~l+{#E^nX<0-`49--;}Ov_3HK+&g?6?ra4J9IxG1PM=JXEbWOy&8*A@$ zy4C31@Pl8d8eCwiW>u@6ME;?ZP^}v9!r~vMR-wPp9KY^Hjcjn4btk+mY>$UH+>-a+o(KaK z%PSak@BByIFCN$^JD`!iwG1OVW!(dd+QRmV7$qD-TBfxO<17qMKE`}3f7cVx;ZE7Z zpN&KZ9N_Ka-nEC-C_>oWfocNqY-zitXE{%M|m zj?H(I{^=go#O98B{u%u4!`-is;@RFm^9q+LvN7l>)hzov_+j<&sBE|9tO`#x$L>fo{XMFQ{W23A z;86wkMX{g;dhv?v6jsV0PgZQ-O3fi2)!x1fd9*4$s>J@1jt+ee%?zHF+FXEU4fBL$ z%H$FsYea+v=L^h4ql@?9I(ZJtYj0Fh%4=>E7)u?Ms#-={-1^#_T(ZVzZrjy<5me_(@CLSqwXo0cvS8hb$h z1C@Y1pgn!;0o{!D#s{u+?O_k-TXFee4`@$bV}{PKsKOJ4flZ)K;hM)L(4GP|fi9+j z$x&C$5PL^#0`1AM3G{F#I8|uu0bM|crU{Kbp#Oo(FECx=V-M&VbYO zeVyweHi6ztk1iDjYy$lZ8Ynh__7cP<(8)A#S%B|RIOGob**Is5e4iQ0qI`}dh&`Zh zL}!RSpuPCm13I7bd4W6J_}BxwC>7m2Hi7mOunBZqDl8BKb(=tYa%=+Kjq-&e$0pFZ zxb<<%i2|934O+v^S+qM@OrUR?q1wjZUjDXrES=adF8PV zKDlLH7kI4~%g#*XYJM$JtGMD+$=4FzfBRTIUkeoN;S( zn;2f@Oz>*w<~6z~Z9daAY&It&uPCJw8-$zoTh6gHI%~40T9VRx7+QoSI;EcH0ecK? zPexu@=t6p9i*#;E?+aBR#-8K~tG&)P*1im++Zk7|Yl^eIt_GcLsx$gp-6Q-VOD;*+ z*jN8n7G1K?=u$V4t|v6s{3KiggE8swJz+XSyqP7;XQ&f+X{(q@$mUnXj0fSKVQ+l| zLTjlzdWzs|SX_MUv&wO6v8`}@bPF|x)sBEs+-#uz^p%K$=VQKvN_zSN#pm}*t<0c8?nBpa5gzfBksXl;fnb;G^V&+ixIItr`hPZ zhjj_Oux`xA(n(ixD~k3r?=xRZLOvv;k|4s$^YKK5}{cDgTa zx$z?cnVdTs_bY=A`E(;R-OMCpBCbX_4avEQHm?v)HaXk}EN+!>>XCCfeY{FI$>h8W zf8(wePSD7kp)#LArx>?JSQeD6DAo8y6d;oQ9WZ_|$LIVllrAX4_$6PvRJ>hCYAI{f$V*TO zY%2+8AdB@G_|Z?5z*;gBQ8Mw%*nej%LYvYFqjON>)^%Xx_gZn*%ItuGNf;LZKjR4e z(g_pFsl%;BlyxHt0y=+UTb*18ejG2If`sZEme6q2e!?QwAAKK;%1c=IVI<7O)Ks(CY;yUZh}lFtbN@z)5N}js@Hi`Q+plqnQ*;V zcFj}**L}zOzGnp9t7Cl$bf~KvWD7``Ntz{RHm98%hOn@nK>_K+Z&pIh`V0n@^%XiZ zpLH)LG2r^-+>Ll^JTj96i!7sbGuTo;3H1;^i3D5gd%c1S@hw%bSV$fE2yGzPMo7b( zybx@wuSU$YwXhfLqdB>TibIjaSl@sZtJ3%~ zG`Lv*31-q$f?@p>qK4S#1y}0bP)8Mpg2+MeD(%&%FZ4%bK6tf|cBq~gm#g<&LvU*iJ{@RID+d%91QIw84)rm#H}xaHwl>>8ilJP=m=Ra#H%v6+07m2 zl%$n1+gml4wIkd6_4~~BR46HH3(nel5;;XthSZBr^g3h(VgK`h)+7fqmm8f z{^|!d>569ZGgNNyxFl_ddeX#OZVH@Jl7^mJ1>e!!J32ipSYo_Oi+7>@2D`Xn7F!c$ zrqsRM(egu@Q!j#jgtonc>SuV>9q+j_K%_~b_gFB44R*X-+u*u0RFpG9e7p;e60*Km zPGf}3^vY?P;V%2nYk+q45xi@Z7H+}fywvCe3gtD=NJI%(2a!=_okVNErm;GycWW}2 zxrJDQRJ7F_WXr8!#8}^IH1!-khf1gPE?Cjk;OCw}q3cs@i@E&1tWWV; zXp9})@uTA(Qv*@??1y(kyjHsD2zmHJ3hpGASl=z+B=DMOqA!3QUGCNcbzs}o`6D!% zlF&2iwqK7gr<-Cyuk`x#>mWUnLem}B3FS5=!qCgH1D%li;$ zjsWzHYJ_8bEaX;t6&<`4MO{}s3Gm9x<*n5D1R}4rdLcea>n&E=UA3i!468)e)$rPQ zcX_taYv-TfwR9InL!iSCwXUB?pPfZBeFyTOchwpzg52Gu?}1ulyJ(Ca=6Aq#q<68+ zbDeWOTe;rF-y-7tHMjHz(ZeQsI!xo&Kz59~{#Q&t5l6n;48NkJ zHAvUo{7mGZzwPXnc*~gx)SS}-jzK$tEw`P15Rvc$6t!uw#Kw}>3f0@*ZStk=ErOE` z+s|dCmAW#%l4{9A9+xhy*$UlT?1G3$M z^U6>pszpvTP=LS|a=IYEtH=Er47V2eIcGaX6A^G*Rjlu0lvF3Z9I4=4eQimdfWl^^ zuK$Pxypme%=I8*J;r5Ty$HnfQ;axCFpsjun&5myOcBLyYk?oGCRV+6u(OHw6F_Ew}? zswYfbfQ>Bg1g&3#oo=dRI>M9a(Fk5%_qZNSr$;kc`deN4Hqa$CP|Tp>{YVLP*&mwNZr|z<)9m*Iy5h$4;kkGnjuyrpCCup~e!onwG-r`ye^Z>=r(R z6KyRLTWwY0V-jthL|g1eTa0K=Lc$tUE!yJbX1falA-srpucWZbMzAIPb#2nOV)WS= zXt27NHwtgLc=wUGZj(O@yo&_z>ksU%dt{)V>$xva@iQk!(IW)ll=o&(b-w{oL#NGD zu<+XuUn5$N*U@#P^yWT3TK5Q{sU(eAVIconmn~w!7Q6kFYS3Q_0py2IaBw$jbHcDT>ET!<0eo=uy0+XBh-)e@fz%{Z^k*TkJc=_a$dIJ zg%2X>q_Ea(-Q~PHW0TYz)LB}Ye#wjc8X$pvaUVSkP0)X>=Iu%Ircut<)8+KLeAmyM zo&yhQv_@RZ!A9_m!4qCtAYNa6Dev0BW2t&iDj{RQqXe&y@O_))jg%l{b3I<%ZqB(K7?xoZ>&l2l%TQLw7^A-3YhR`0Wh& z84K@+Cc2>!sqXR%75@IA9`U8{r$^mSR(OoEvl#|5)-zZ254A>>_Nx7@4g4NQ{}5yM zc9W5x=h&;Fgy9gv1@tIlh)Kn{0 zYX;cg;5RT*i2IyB{0<+Q_c=pDW~%eu?{r*XAJ|%ra4J*Hlw|7Mhr>|Cza#E*+HBGd z8!_kjH4L2Hza}_0!vPlI`rS)6>DNqs!WsH)`;hZPLo<$Hrf|AX7lv=xtP5IP;>H-c z4RF8<;_Uu)#JMvL*dv^9PHxt@GbbZRWv#|g|Bqgfa0rK?7L^iD;D83s?q6M`(Tv1~ zqus56T=8yWG7oZ zN;v^>^zRLHVurG9cmDJL*3^Li-%XyzPj+THKitv%U+nYo|M{ybdXq2RDV}c>{=#V( zL+<~jKXUTF_){gjk8aaTv=h9$ReHGFc|Y!PK;cI=&i*Bm=an{Na?Hg!IOn!)-MEX{ zHOCy#s%P&WY&XjI&2pc&t)Ww+wOJShG>tL+QjyJL;5uKh)mTeVI-$M9WR z=a|VcIg8KX?s85(pfkGTw@lLVbIoNrjn9!D(>n9qA4)j|D|y8|&e8hH>GYuPfFG~a zP0ke@bixnf#|FQ44nL@yH7?BKKQl3>tgvb4HccMCvi-$_%!>zfA8a;mWzH<^V8riE z*{*NUyYJhf?=h0k{xNs=r`2~??!p~ycb`3anfWiaq1pZ9<9f7V^&Hl#ci(=__bJ_) z?Y{p>z0Cigna9%PfPUV%sj_9(%|B&ey52#Zg^ne+z(|i-tp~=IC8qR@i@bbS$Qgf7 zpVlXK4?U!hn7;9NV0Wa4I3y6P)fXjWp-` zeU|OiK%}#rlb`w1olTzbp%*ayzQWltN2fcdU%-r*5srQlGh)VRjOtu3%3jpT@kj%s z9n~5~y~xE|8u+=v#Bx`@4sxV&=Zi4(v1jOn$NC&B|2I(F=qeV!oViWuPybS%^<}5dN zBcGC&VR;E2e4N2A!*cT$?#&Xv&)}@4=Fz2?L*&f61TnXhj%lydTIUZ?HEtT<&NaIE z6|n7rxbZn>xT3xQv{Aau>GFzhW~?6MJo#jUd>?LMzjG#3nRyBJC=B{Baw$e}c5qhK zG|cji!`<8anS^y_*J@|-s~EBGa#pr88tgvus-CQ|24er0W_{;^*YwlQ_Z(HLQu-fad7Qe2$8e9^oIBT1K4e=n!0*S@w42@aEV(`<9 z*cDHc#8Ra=zKO+#b-yNJV6=(Y0}p@1GTG!1W2rr$jh?c}VJ{H)Yls09(_?%$oql*O zaT!R6RUL~K>(Ybk65_xq7O7SP4H(8{p$r&w_25`6<-kPZP;?SR#Lp6JLL7#NWg-%; zAR@gH#Nnu^OBm><)QvzIb{!cl29e`TiQtw99Bd`DYY+p{O487qPK4D(#F2P=M!e9o z8+(zI)L1F0aadzVc`hP8!TNJX#x=rvtLGF@7 z{z{Ywku!yfd=o<4Dfo;aXSR|5w%`|neDy(oNH9;Zorhu7TNuLyCkb9D7!kZnaHrri zg0Bj`E%=3CyyYdFC0Ha_DmchR)Dss<(!*JT%LUg8ZWP=mxL5G7;2VM;3w|#c9}ouw ziv-=JHArs|=`aH0L@-Nmx!_vCZGw9R4-0-Q=q{Floh-C4w+aNm5e#t54>^DRo#-xA z0djkYFd4l?FidcQpu08&^4|*mq9E5)GM>AsIxrvC3h5Dow+U_&bXRgf{uiM?5NsZY z>y!~Y$9V?&3oa2{CFpJ;4!xU&-Y9sd;8wv01$PS`5ai1j*I_{}-y?1Et0x1A=r)M_ zsz_`m=DZaI@ee(TInH!MT5o@UdWhydxsr zO0Z0DnBZi=MS|A|-sIf&j?N$Y7a@NTw9%W4b2n*<*ed`j?n!4rb-34ZKhSn*8|6aGf{J?LBYL(heZA=5govv1&p9%e?&_4=o;`J3X zR4*i*24|cxVy*}Zg)SDlhaldDxq256k?<(N@q!BlR|~EeyqAcP#^XXC5PTyfoyOZ_ z;KF)e@Jk{*{E-O9Obi()4-&!8B%+}<6l_d{UXjQ<3f)!cK0*&5BHmcxPYpAGdY&mb zn+QWoMBxgd`Hi0muNV4ep*IPAHxYKW3;%H=^`7BujFmP-OH z!4MG%XA=>zvC#jAy*H1pqS)HTyQ=%t=}adl17s!%2@oJa!k946lgy%`AOQtYL1iA5 z1B%lX6-6xvP;o%L;*7=#1@&HVLU0}#6a*0vR1|RfJx_HdMBn>c-&)>xt?!@jtfZgb zyLRoWuCA`GVee{V6Q7C4ku z7zj8kEWOIo4_o?iBH}$~@fC~PiOBG`#60ZwZt({q^!{eUeO#n0#r;p>2_j?~2CkHd zi0v)ECovz>dKL!~p=hKHud?(6OJ8K^nU;=OdWof%TfCDPgQ9zRf&{89uDAHQ#dj@! zW^tFr0~UX>7|wtmTu2(RA?y__<`9uiBO6|3>2^T#{CBsEKE#&jR}-P=bju%W>GLc- zornZx6Cr;Uu^E=`EWL_|1XmLw_n5`!ZTN>4w`bVre;*l$@Es8eAGh=$R?tVqF;_-} zTow_EOD%S{c!tFZ7Ux*J!Qvej@3Z)5CZB&Os&dLj`G&tyx_vv{S&J7V_aF^jKS{M=$HYB)30++uHwLoAN5IMd>#7H_xs zpv5OGuDAG!#nkWZNxhsPq5K>@`+)d5_6|oDXky>9_^HKh77q~7A|AGQ)Z(ueX=T8c zj@Hh^Y>V7+gmg=btu0ns>=IzSF+rf<$$Ixe(IiGg12%9AEnZ=f(+K3#=zw^qMe{K) z(A+PHeDhH+V6~-RviOQcS}9P@?4SUo85-%Y0*p6y3uGMAH-Crx&>n#eY$J(eYG1VYyOO|EiS)?rk1={Ej4xxZ( zk-%oO%Hkx8lP%IXf#ETWS6HOKGWlF6CEjh3tFNRVwz!UnR&#?z?nX}f?Ev+Av92kn z@3c&=BQo%SMYFvG=wp`t%_1!uD3@X}(_*egS~@ViwcdSLG-*mh2a;ngPP9mO5Atd0 zK#b{j-=j#(fV-jnXc>?nS!L_9)*`JCNN=+Ejzu#d2cJd>4FAUBA&d0YCEw+E85p)0 zv1pv>8#?;4??quH4HhWW$zo57eJ#>3f#IiHq`Ewm-YQWh&^%r**t(8q%Z$blrI0^t!OEznU=fA;u4EjSzK!IR{ccSPp5g^ zedGWiB%+yGWASk!nx(ZCpCzIddC}r}BA(*cEN&v=v3$$o79t+Q_bq-*#8YA>T7Wx1 z$5_jEF#x!ih-$gt;vph#`HvQl5^;&9T?E!crrFnSM8rRRdUyc~iOBf%L}d6rA~L#; zhzxSeKW6M}pYKfMG(tErRq^s2Kjx=^qCNyPoxf3o)E6&b^r>u{KZ-(}=bP zN-!1I9Gj=oe>B*Dm1hOUP4xW(YJPa&(SwubFM9IVgL~#@99-5>bXwkX>C3R`EXwQ^ zU03y0{o0LJd!3)~oW!=QjNjw@g1+naM!VzuWv9>_UyeSVXtcWSz+U>XpG7C3^tV5Y zixL}OTeNh;`LCSYC{{38pL0|UiN!^6K_+{i*{e+S!ZZ_I%~42y`oY=s3{DJrVSY~n zKBs({y4OKQ<_+Lc_y-s+Lv3(FUAorG=4UZLhF`-ibqC-eyUirW3+-a$0WPagk1Gr- ze7c7aKjg85{qQQpukktMbd6iDE5zK!$eCMs8c%m4HMjIUo^nqTx5WaUj>o~P^*ME* zOmUAmM{R`?p}yb@je3^(QANln=9AqWNI2B#6A01gbP%HW%~0n;-5&vq#^l`lHPj=Z zq(2ENLOlb@^SQl3s8>M2=d>Bg-U-k_pHub+R0*^QWj?E?IM?T@1JK~99u$qKU-397 z6^Dy~&*|<&@J=}m(dcu^Lh{c=L4;0!)n=tDq(f(HHWU&^tkCFy^8L$D3ZXH9WTMYk zTIkGxiaM^@3v=wv)Lao7HycIb^BIVR&SDwyDl1SZp$WWvStNZr?S&>X2l%>%-yia! zNrAEge`y(N)x&~CD|4)>n z>edtzwCH~e<*d2~Vd=hte$^|WGX3MYA8=T`$B5?odl}d#pz_RZSN#Lg0{;q%4hX1X zpF8NOfdN(GA3)C4NkP0)pS?*nCl`|qajCFWam^nz z>**ncrVT)G!1a{pv{nBBWeV5R7{!e5>1synX`&f-r-yO9@I4K};d^>DljsevEXpqx zX@e=>C+tBjobyE5qqr?_J&iLoTu*OD5yJH}h!5A(+ZeyU$)a&Ry$}h92gIxZ9Hs81 zz(6Yi-&1ZZ3g6Q}!FrMQ2*U^2@DskLK{$L*`KE;HX+XpEv^VLYmWJ!;LSE1?OT+cF zn)+hH!)%MV{Yu&-Ucm?}0N>MdnSqlny+o#+%_|ydGXURH&XvRWl!Z>;(|Wu!#`Vb$ z;d`oBcH?dMA~%ie6ydWh4cF5yy!5jz4cF5T7=J=dPTjN!!zVJF+x^1#G)%@hHUfN4 zX~YZP(;!3eJ)Mo`3cjborNZ}gBr|xP4Zqt>Tg>qD!^2Gm;d)9x47i>K@!@*BKV&6 zVTPvLaJZg6!tfd45B2YVU^CrkNzJm_;Apy)cW!q0A`=^qrmr%5PMD4@bsbIF7sIm= zO54ovdDi!LeJGuq>4xW9PuoQ*?GuJC2-DZoEn2VA*jI+1DLpjcWDk=3 zo{(ru!Kox;>=}p-&mbLk8Vi|WbiB<^ba@bB4U=$K1x7;-0bamK(a#Vvw(3qX3-)*f zLkC=o6Tuju7(G{q4)%@Ezjx>?*SOY2g)hwpVks}Dx6M3WvIUTP2mgXDMnUd-GxxuM z*Tm$$FLN)85idw9-JX;b;6(Hf(txMJF!;p0h`jN~jL}DACX_bhQYL4Sntg&3S;8#(_$`XIyg;q zBE<%RtBhiCZDnA-r%?;tg7a@h(qb{I_)2PNg!p1HADTlTQMxF9aha))#VplxP?oqw z98bX|$ne47oy=uSe!)0Uc`sFV1}~^z_fvE>$YRt5=Q3(3Wig9&;#HiB21(FhD&{&~ zQSN9m*P#}|qJIs~U#3`|sf?Rh8S{SRRc&F9HIL(AvDFA{L1ghhpEKlgGM}sMCIQgS zS@>rMRh*1G1jV&BlZb4YrKAwIabxSf*(B+bYwZfTn=UJeq(hw%m{eI+JD91 zec@FIfpf*PpgLqD_erLs5BG_G;dZ@>K=UGUo%WYOB67&xYUGoj0#ul7rW^B(9<%-t z6`b@HB_@p!vH>dr5kf}c6~T=~;1$7JTPZm82&Vv65z$c$heTYp5Nu|$$a6Z0acJP; zW{G=1m}fkT@!=`60(p!-%QKZ)u%2giMub?_s|ZE3r*Vwi6GUVE&Ek6}i%$vyccI0P zI}`-+MwmdSi+GRe!||b$n2DMdcX1%Wn-HYhNt}!L@WEh>6}$sktkGGU!Oh|$lcl%$ zGCiZC=#5;{>mrQiGm8iK+)BOp4slcU$~bwW&`DpVC5at@$XTcCC`;tne<7=7*~1pcELBP+?9- z;%I)zql0_E(13yG5hs-Lotc^H=dz!h)~c!r!RI8?Yos0h(A^?gH;71IduQTPL2unH z67+pZa_}uFZelg~D_t=~r`!Y&-_CkViprLWVr8PJTUl9Gx4fl0 zw4l^&Q*fp`cp$!Gc)~gzX72?>Lz@q7{wG87tqyF~-8y1lPz;--orw6gBeJf-1nddU zQ6m$r!x4-1=b5ruBUrrG&n@od&Ti=@6cjg-qK?dVA>1PiJG%#U^DLQ_xlf3+Ld^4? zPm@r$R`7iGzR3%&k`x8Zyk8b>4+DE2?Jd=#yOws#`RYCE|bD$?K7g^;;O zPgf7!Bfm?I9@j(`Xs?UN)ms{LNvwXhiM&YYVQ+}I>fudgMCcjKnUm&(MrnF!7_!KWbjmL9@eo_;^RyxIic zU|j}*q@@sG+f#~vUl&f!##dNNrH_x6J<%N|=%1I$Xwpq}Wa9Oz@`5y-d2ZLl7weRPxkXJ^)QN*mg@bpPN#`4&z<*7Yqb8lo-C*&JRr9;APINYW zHPJZ}S~q&SE_|*{Mwc*nb)&DT6P+`AHPKuBB|4|&Cm3V+_2+l;+SOID7AndRl?8)# zzgETYzo=MdOzbNMgIzcJE<~>>R~Ti~MrS7+f3?@YB8Yy`U!w1?6CHK}wb5^Y9MzhR z2Jk_>__d0RxYadm{l&L#e!Wc~@mKqM5JZw*wXSJem)CGwH=jTDfD$lxnK}5cDJd=) zY+TV-R2O>%RnL^7@RSf0r*2R9E|olN_f2Z$fIP{cw$T`pMVTo{9I&RDRyK z3p;UjHN1!y-Z;dhh64Q8Xz8Rz#rasQ`+Wqu#)RTp$>5=t&d|32_%SkckpzDZ6C zgqP`Q*U6kvZZ~un^bI#w2HyY-v1d@B#bx0fJ*JHui5|fdZDcDnJv-aTEPcigZmJO} z(BprAm&5HpxZU;qwz9Qh`g&Dcd6G!iD}QwJ0qX#IX?!H2Z#>H_(;pr|+tzzR=co~m z>cXGgEK#E0Y$x-Jn!)2UC;+y5sko+wz?xqaCzX2qzG%MgeN$yLwiq-Es{sG0cw}w^ z*8C{@0{$7!#v~Qb#k-bfk0lkB@!wdwz|iJJW#oAeQ=KG-8-_A|AfN1%ldwPNkHMcd z5a95Iei-BbEa1$u;b)ofG>4C8&5s%6ev&mm(vSXye*G^r4Kv6}#DA*Ozn=5+pBR{f z$Gzu|LMcv`lW%F(jTFv*)Gj2>oPN=imS;P~Go9iIdS?gu%JNw1={l`aPVmo~G_z_3 z{2=s|mGTaHf;jQ0J8V|su|&zViYMLBfnM(FUAvagN1{EnaPLnMG~!UW<=fe9q!)7T>Y> zrNzA#4-#WY_(#h)ZV~+)lT)*LjPQn*Hmk>=yIPtr9cFx-#d9o9u{hl#XK5(6(Bcw{ z*8pP-xYIJ$SbW|hUnC6w(Bf{3M=f&Bp5f^h8(K7mLf{(%A>bg(Kf~g=7BA&wJr!JQ z8T|A(X=CsMeA?2lS~TBq0pA$*01sIHFBap_Ffx9IMNS)$Zey{B#i16@#O|s_V6tV* zvv{S&TP!|g@kxt)P~E9`xW#iV&arr8(i^UxQ#+*ZzfhETv0~QM`mRam>ahS!a78hAuX7O>0TP*Id_yAfWUKqEg zBy!75*&O$Ovt@i>@l%U1M=^r?Eq-s&IIKXy@0L!(Tbl~AEEZVoV$t}kAl!Ug1z2VI zGl+ct=UK)gi_0zEX7MhI_gmyA)|lW+7T>YRtv|@$WAUg(7i}^55sL*Dn*(FCpJ_z~ zunn;Zc4M&u{VYAm(x+N_w52Cnnme>G0Zt|{{v|}{TTE=~ILj>Gd^-i<583c1;~jm{ z!knZSEjkzhA5RIcfQaJ#*5Y?WL_B80-GqSliAXq|2>CpVjV*Q|B2EvBBZ$y*rln^S zo1+oBgeQ1KEw*?$5rWqT0?uugzSGjil?UOEkVd>0h#0B7Y;g+_;X5quAvVXpNkqI_ zzqj}ku?Z?6-;WfCCn939rH!i(=mw+_v8m;o6(76;xfdes+BuKKcztd7FiW3e=_*Sb zmmj1vl{DflAhHr(!4ve({$cStA{5?AMEE_He!$XCSo#?v;;py*trkDGxX0r67Jswo zV^~PNX+ZN5DzJ>^M7-2nS!_c@M!MMWewH3&=~FE|+R_s(eIXHgrdzzk@~^OXjpbjT z#Fr2RZ?yrdEdJBtQx^Y4gxu>EKeqfYEWOj>KFj~k(%gTN@uC*F)Ihq0#r_e#gupn3 z3>3*YB8DRqEM92&vxpc+&9iug<=ON9RHG@W6^X;KwoNU zu1YcdR=x6)t{IVkT9O@SnW*RY#j}DmOg{v;pKRbEiyZs$A>rtd7`15nC!mWhU1HIE zFcthZmNtgWpp79jaG2$fv^W|Vqv9&d;CdCGB7EJ|pxL(ziEdFTGbc`VXhowyi33L+sF+i@4@#!tF zSYol%B3H^7-rZt9(_sSRB+EF(;^`L0S)5>zYim?6-{Pef&5}6yTpeNEzs=$*i}zdP zLKwrJu=u>OsRrXE%it;(1-RKX@e_+*Smd%9`9D}ZZt-`EA$GVB9%qruYNYcmaygB3 z8;h}y_N1#t(-nlk084X`jS;FWPO`{VKk~WuMqFsoxGaOd!P49To8c=ha%GORv8c{+ z`Z>>9#)}rYDn|ihQVsmj(w|!75*@>hNi`7tEjWNIAM$2~&Kf97vTzrMk%b`6al@O(s-%i4bHcCI(u|@8=KGk;qA+B zQ}ChYmQ;LPtB81trV&vIjq5TrKT8^#`S~s8!ni6!KPM|>i(n>``pYbh(J3BBBxJG= z0h2`}IL-=8AR=KifDA~Lqi(tC->U?STa=!2Or zHhe)&b1kEQh#b#6?}CZbTVB+v!2ZhHw}lmNyABUkv6FC(u28-4%zAGlNjGl*kHV+brz=CL2?&^i>vEf)#Q+(;9wp{o zLyobCb-mCgMs7<*#vs=9!l?}QL+u%G7b?Fy`YuNH!;O(?Z#mNUj8UxDelS8kV-@SY zgA_eu73*=kP0v`xdaog(S9ueodtq8{BX7kzcbM!KI~x}h+8O>9VKB*yUqJH9@F7Eb z@z)}i&{sCpkFQ5^mn9S9ry;S>Zc9evTa*0SlIiiYN$#<#GUEp!JE6VdjV$q^-1uCQ z--Pv-!(_3zM~8>Y*7+PQhK|`7emvhXq2slweXd6hmy^V5y?(gtA2sU2{xV#;Eb1PA zlFl3{5q~9m)S(1p>PiE__)>k!2-&Uh6lN`I*=t4oZqg~1epbYP ztDhbrTgK`!18F`#lI2xFL_W5ar?0S^Zgv+<;&Q%_jRo75$h|l?5t^Ne$R{|;NEYvB zgqBNQWHPf7X@ys~ihPe_I706jKQa-=xX5DUI6jh$x}Fe;$2~}l+-$bajx0dBk;q;s zN_G-T5F#tE5e{AmVN@X@pBCpsd*l>cw-dP?vLf;f^5|lJZ{EU}#Xtln9cF-hO{}FX zCjp!YeVat&Vd#|++6%Z5JQm1KZye(y^KguhMQ%b>NpKR3f5m1oo2vMV6>_KenyL;P zRkZaMk$fCwq&<#EoXhKSk5~_(I8R)q3eB5j~W^46?Uc5uM z$eWN-J#_uiQB@Dpq(1Toib6yh;#5XDpJ{IfOq^}j_;j`}kq$bZJIQ033!DU-=T*8JINhVn8n1?2d1%m-hK z{0v&!_;ZU)SYpNyQuBsD9ruA(8?nsL_f(l-?7RK>FEA@jnQ+{wL5LAqf%@P?zF|dl zycqHoH>M5v^}6t(iW|@Qg2+6mbRyUB0vs%aLuSHh;MYG1SuBa0N!!B=4xi&@Z?vT{ z8_C4Y2{P|xd<jt;~mEP#~ecyW(;Hs*F0e|(=g)-aN{zUUTgx3Gj@X= zcWpp5%IKzNoF;o!vacL>JsaMvO(+C;M@YDw`^dhU1$jq^IdXEi#ig7T5-eT!-zHdp zcbd$LorVDMx#5dHz|RXqiTIqS4Td9YVjH74iZ*1K-eRz`e#fbN1j#hQNs!DVHkt9v z_&I)%%&^+vb9|HJROaX$pL|ELG08g0`zD8Bhy9Cdg@^gfa<&m376|9?lkW0mC0H;n zH~t8ceOXbjlf_T!$o0q(ZEJ#{^+ArZ%pj_t5-zs~34;15lR%VtjrCIua1=FX6*4z- zARLEBClHcHmW5s2}lv)O$Z=@G>`ojr%e{D@)=aq>kUXoj7V5S&oS zHU)dw6ta``6eB(9ivI45S{+ZiM#ovam?vG<9Vd(TLGB6*myL6fqg~+><+D3%3bR05 zptqhbbH!u&;OR1}v>LI*je?H=f9RnYBR@`)6q#(?NWGu? zGvv=O5m_`^=5{fGzc4Tb&tDNg$svB(2)UC%7Moh~8`I+ALNOOb#P1A!h2*H}Pe#i; z(ee{q6*f^dH3MPBR*%+P4Z&|`66j-!rU|M=`{BCyOxZSPIO9}tdi;bu2geoR1U=(S zSw56weQt`()cEU-e|Ce#-de45j8=Y)t^GLOj(JA7JLyr3J>SqLlU}NSI8!zkjdlK5 znVVwrbhnAUlcB@)ps}*Ke9F=DYJ)eL;Q6T5orYJh9xFQt@rT}4C3AxEoW>%%0tJIo zjvFUe7JZ8w5Wg=R!FK=x-8ia>XV{_o7)k z_L_Z0|1nNB73Wqr9WOga{Ac(;Ic4UPnvHbT!=m(WTAGya^)~;_sQ<+mHS>q4_J1=~ zarb|>cO^_~vZ~ikm+f3Nb>j5%E}EdrV=`UuxJ-tt=g*e&T;29S`v1?ynq$tHGiKz# zQ>yx&Hs<8k{RUMHn>A&|L@1ao8$_yRx2Y-{bMnmb7sA7DLiP9aWXGtOpj-SyekW$? zyldo8u~c7hjhusTU+yNX(Pu7|LuKL^{peCT1Tw!ZMIC(JtW4|9*J4uTK0Wwa*(4Ne ziYX*L?^;=eIMXh~w=dTsG*nQDH(9Xl-RGdCSEUbLD;vxH9rcARyvF!6WtZz@lcZ5S zF`~qKrxB`AGyOzSUar^IaZcA8F6}U*+Phxv&pEvd9vlw0Mi5bH%~Ay(8TLpeD(-e7 z9vKc-BpS~tM2x1E5HV(ZhKSMAS451OX#UQ@(o#L(Vfjg|ljDYOi?iGg9a`(1@2Zl4 zY?{!q<*@42%>a19xt<5}<5R&OlG6AxPknu0jZ8o@ zbV7oH6Y&2(G)mFEMkD5Zsl*xf>IpeqMDXk3^shN}oV%7X8c>w+T&V@GkjFi^}#R4*?c(~F|{sSJ@}7)Lr@35rs5JC__Uw3@Lw))GDD z8%}sC)%u}$1YmeL5XpLGtE+mg5$-huEelWL=^-Q|OV8wKIVyx~aZ#Y)ArwDy@c=4I z=yBYMw;z$+W1JOmcZOew2)cps<4JxQ-fT!Oo?nY{zp|lzd`FVIESVVp1g~eeC8P0d zLfx+|nI6wCj=OuTs?7L~xN3KA*zA&kks-H0b}=$s`lu|H{juBVqq02zF<#p-8^w%Z>Brn!uUy*Dx#b zK4-bifRQh7H^JvsngQe2`j5wCw}v;99kpx>7!~uFVrdK*6Ma4IaoHl4$$X{xF95u| z5XXD$F`n{^;ojP%NF=ETicxsqZNzz`D>@raWGn749P?NWg?DrZ17_mfiHv8@&PmQg zWZ|U?PJ~5#6QwDXBE(qsczGfn_dhZYC4^5;E~0)X`Bt!m_q1rspkBzW6M2DpB3Cnq zPJ*c!FPoUjoMjc>PH_%p*Me{&Z;}=H5=R+1h9hE(M5wn%bO$7Vi$tWiUu1e#fs6EkLvHfE-7upEvV zqZ65v8!d-p#^}G9>~fn3$Ba>r$=+-^!I<$!s=h_e03>0l5M##BgB&PExbuUEJcXl- zyp5w5;i|JAS%h>@mbViyX1o;4&@0~|I>wCqpuhgFD9EUqaV3;wv_Oqfvv`VY%;=6d zYBmRx$V|p5xKcIe21EH73VPJs6}}-8Gk(_dpOPi9)woPGzb%+abTJd*QUAhugcfj4 zAoD&!?>C5F9flWBg)E9iGft)Ui#h9tj}m2MBbD$abexn$nHg8(>cR`n7KTN+88jORFWP9r z3NqF*-apqm1S#hwybRAR&ty>$}&= z4zb0!&hYhHz{*NRR{ee9?+_JT!21z1yEh`lb>($phv)rBHNMv>h=MpyqEA5N@avxm zr+mnWf#*TaUC4dHC3QI)5h3CJx}5pQcP!!Ux~x(tPdHMClS|8zggjA)m9rgXkA zxF$93#*lD9T@F3S5^k=`sYH!PSXY-r2gHno-E~;GQL0W7UxoCc*F*L6U4MA(b!khL zTK(D6QVAHPtvIbsQ~8pshZn*aZO3VCp8cDh#Q&mey7i&Iy|;Ny*EFO%KPS8X&8)M3 zs=HjE3iY|Chf;Kf8)~XsJ})oUi)YImedx4~iTcLxo20YPAJS*MAor#W7~E$>Ri69Gk-mAJEYwHV!B=2eQkVa}YnzDT`hv&^s7ugZT2pElZUT35}iF8G(6 zF4OzJpXN5xL%+<7(*@JjE?xGzEDp^qLEEekKhrf$ukRoA^~~30 zLCPey9r(wCWquQur`(^Bay8EDa;NB>XEo2z=epr&(h{mccme)>T^^~I#-&2@yNQwY zQZM4yvQ`8!cdTv{ZF*Ckn0WpjG+xG-a1XFqJkk6FnbtKIod9r*rf4jC$SwqLp@aB{ci4?EDwSuhmhEkxXsAxP?Yt z#hs1fl-d80UGEOC@mKp}DnIG1_j}l|d~zp`c0#qk_mN@&8r1@D>g%{`VXMo&_++ya zdcEiVqG=@xIFn}1dhV1?(H1|p2(rb<7+}?A_pb)vPb1nZf%SHcVRsqC`J03Cdt5)U zz)MT1u|BN{YNA&qG|WiZi#(t}rv~y|nlGO&nuOlT#lEImyd{ehi;;au6hfjnFgLDf zf*BAqmed6^L<8Nx>oiVpeoqwWv)+~s^{yA;moeoBH=-kO~Ji&SDPvPm#+X3CtD)5|be-cP>e)^MwREJIp`~?{Z zJNbIUFO_L})MiYw28~DEXW#jsEZeNvkUzHw|B?CU2!C$kZG?cC{MUwm>f(;+`l`+H zs+eg6B&q;zZ?MKmtf6sRqom7icymkFgg5;Q-RLj!t)`IaaxA?fluPlBKj8Q1?zDK&;*S=& zp92;8cn1(87VBATXpsv@3~y<%oy8s=Euj#=l^-GpiNrH3jXeY+#vC9)`7yD%xt1AJiso#_+&nmJWvlem#q3Q4itemhNV8 zu*J~^asRneMui+u6EC;O4IoH=WbsRj+=hgF8iEj$E#_L}{110><(QD+ort9{X|nWS zVlzy068ZdB@uUQ^ghbHOh>fvLfTfoZi(%Yl>05|s+3v9PgG9WUAF=fFM6{GITly^` zTFR}K-bQSKc~W2tCTLcM8`-83yT?tPb3xVFXV0prF(|3ECeb1@C(|qM(7Hk&zN~AB zSW_=obZy4Jx;a{WQ`dntFHHTs^6A!A}Z2<$kP&57W=dz^u zWHh{9AzM%H+yWd**>HMh>Z8S_MlyV#?)8OS813B<69fhRZZa{GH%M>&LY9h2`u8tn zUdj}x2{rcjnZV5Whw^mkHrYXboTn#llij0x8MmX2n;3swKfO&JXsNToJ;`#1#g9k6 zLxU_ilAphDLW6ye&s@={_!sq-?O581=>yy4^WrJ};11a(Z4b&V8aV@9r_9LI1awFu zNA=MiGC%7c+&Mpzfj(C>@(Ru~BXplHh+MAAc4FnEk3M6kY*gM1DPlK*`e=M3#(g64 zVgZUMGBFKh5P2HMFwAMtzJ`A|j%*}ftsmbB|IS(Zlbu-1is_$s%8mtxpgx=+IM*VJ z`p0i>05VYo#WXH{MYbOPr959O&@X-|o5dbOis5Y0JVasNNmziH@o;jDKe=_NQ@wg_j95gAg8 zMC4Y?$1l2@XQu_cC?{_n^NZBG2I{BU^ApjE%a>F4;^>)93Dz!%ynV4n^c1 z^!7!>*iS`b`9|y-WLLf|xXoWeCUnX7#2pY#%|h`B`H8pz0g?KsAb6dilOQ5vwYOU~ zYO<^Vgp*)azxRlhkV^d#B_!m2K@$%e2}GA?v@#)uE{{AyqrN?;&meH@!W`r+2K606p6W!W8ip^=k*T6 z5MA|ABvv^c5uM1@j2^igM;WQc5hd~%5|iEJ4N#aGXUgz=`4zRFh5PG7X6RvG%a`S< zES<7Po-X3`+HRmI)ipxHtTkV%k^RB1JO93+}dteEumjf!2ovdf=mlri(gUXul`fo-{M)s4W-Uz77 z>}N^68Bkf-`8xRknt^g%c>t@mJN2{!GDl?VYsnm_s|g?IoeX2h8sM zMV+%p=w1h9hvfHhe-nN?gSEG4SoV$jYDkJ9`u>A*PQkxXkO>JQ$l=BDn;OHjEIvc+N)Ia-JK=U7HLf~^tuPmE8|BM-?=;-Fr3 zNajU9M@>p7608fds5t&>z3vb^I;ZK>!?JPmlW2}b511T$3RQVybic#$q@H8Q{Fodk zccH|2V+eG|!Fe^_=DV|4QOvRe*6#ED!A z_t#pvBHzeerO*3bHWAJA4d2U0;ke%Y2driGz|c>gEXGu?|3NMZ<&WTVvIdiz7>V+S zD|h;!RTMpuVC5Kn_AxvQZ|HT$(B_ZPpB|H^rkGs5VRFfSPT@A) zVbMaT^6f1B?k}=sicyy#S?b)TwqvDE`BhFB`Yg3{m$g@OE5hloBSxSaR2pU7jk34E zth^EpJ*26GPCAt)PXS#_dWwGSSJ^5^tFICJ1Z-r@`%QiwT<9f6+q-z>;X;4;4Q=>l z-TZgJXL|JSavzGU?;o;TpyDl~Vi*d#<7d^k{2{YNprgLa%X=4{=xQ{1E_f$~#NVjiLPX929-as{FIUSd71L5f`*R2SG zmz&@rNUK{yBYn2(o*M9182)9J|EBAf%KLNlF&FN|2XvMPEiH6~=RTIR4X+G&T}X&4 z@znR`)6p9r+JHHPI7iEnTY=}eQ^;M@X%B1UZDGhYt&w8`1GzLje)3-kSzQ}a2o1e$ z@PTaIP~oDcR?k!JhuPr^am%H1NQ-J111!2ort0fobbWpKdtQ^jIg$H+$FgEskvr~h zX4qIp3@CP&H>e)e%U%Az^SMU-czZWpSB}NB^|;ZM33|um$|ODH^2)gC`~mKqIK613 zDyd#S!X2Z;QJr_X`yDo}(UCLUA=n~Ak0q99{V1`!*1rSAxq9$ucc@sTR}vo72S&Sd z#N&G6822vmtPY(CYLmX?OoTnF-zN0ed1Kw?VtOz!H)gCG6?63kW8Eg9OHP4{n!atU zTO=DV)Gv*7@qxsJjx$bgc-BwTzd}+vuj@z^whunK$XHd#R*Usm&`GahR)IseGE}w- z&V}VxKT_qs**Ru*VMjnJ-t;u4n1*wSCg3?D9$xc3Fm#ThXt8LbZkCHMH^Prh)0pBZ zB8(}1B%+Nu2|Bp5^y9<=q{fPhx}8OAgbWayz@CWM6m@uP^|2LhQ&DSnQTV>h2(|7| zQPEa!c&W0a`hq*%VUqi61V7hZo^oFC@@4mitADuLoh}r=j@&d$Prk>^t?YxxtJcB;NQ}z0L+*ZXaaUIrzU@;nhYeB#b5Nj<6-q30H zx(lOC3!uBe{{(sBNaISq>Rz-B>oW8^_qw^!SD?pj>~Axnnelo0mwVm$DZ?43qm7do zpH!@`xX<0+au42l?n#zCEdEEl+uT8x97%_F#~th+b(zqp_?z_I_q(~`9lh>;_j&0z z((_ikozuR?l}01%uw_PWK|5R!Dbbr&yZKr3QSg3*ZACP4JI*sBYjG@y9J}QKHz&C* zUObybq%rQ?77>}Qn?2w*Du3N{HN$veipcN00MlP|BL!%tyhtCY!hnNQuc03fqRJ$H zq8B~j_C=01KHzrDccC(rAnLO+V5AX`iV#W^K{1Vs->(ZEbSGm#w)8=_S*!>*E0itr zS-c!*RH62SazuN?_409x)W&T{#@mJWlX|N@(n^vjK~L>D2#H8O*cd?+L?)q?Gy{!c z0cX7vSxJ@|XbiyRLTZtSyhq;MJi9TF%SN9v4i(rAG?pQCb!<6Qrw-RcA95S#Xk3dE zxeBE!oYV}yK2-o6FT1dfP*89(uyRB3_dt$h%PYiXSL? zy(!LtIEu)49A#uKj_7j#tOxwlZ6=Rp>RJDEhh?W4xneU4G4p$o`%!j~o2$3~)6K}f zh&5Y%A~xU#MD9eDhuH)&FCqhU^kKJA>?zb&j3D9>toDev0jZaww1nC(l5ho)tMDj0 zk?G8ulduG;)gkc%rMM}lP)9@?O1*3@`BfAUq}reksAGbw0;z*g!-R^HbP4JANa;euo>}F*@icC6@e=)0(&vBHIA80za+Q7ob?I(un_aAldk$$$G`y?oR3et;wf^$C-50$7T#RQBzF4wm|?yicoK`SOBRY=EmymorP z6K-*G6KIQjdKIn&n~G;2(-%MC=Hz*}r*Y4%Fibz2tMqZt2UJ}4I=%J@w`p<*io6ss zF=WvD5f43N|4Daz^CaAcxYt*k=o#5*q}~Xq%uZw6FW_E3G(lW0Q6>zAH%JLElt zVvPIf1rx6{`$5!_xK9GAMRs4E`V=Hv>CONdZm1_c<+c}h=sTZ6d(Z$E7I)wi6R~r4 zSH0;ew?lFiWfS+C`Fa>e5PNiFt(zlvW$NZ@-PzHtD4Dnf5#;~k_*e83Yu$In5xwMT zw@GvwN-{1>aDPIM9D3>(o_0^~a&ZB;h2jUp&5ggv1KCjUuF0Z;`0wz%#uZtzIQ|&P zVoR39AJD^}ai^y*#>FSai*~I4fq_ATG5Vut+%dS2w$-@R)AYsFZgHp0h@I3|JcA3W zk-HZ4F=@!3SkIw0C!P8yR(z5EtlI4$n&`A=-9~alrtbKxTbw=-MUm7|ep5%^X?i*& z(pTZ4l0K6B)>=(Uz4XJ+x)pL`M)mGz-H%0hA?mYq=CZ@~*5B;#{C8FY_4Oq$x|9EA z(tlp%ub#2a?Uq^H@I!a0_+QzkkK8S(FdV&qAG$)H>m&QnP1=Pa zyL*?+t~1jE%Y4!Rq~3Vr`~?sqUmz4;KjRl9W3 zVRWP}4ZfE==&&0N{eTL4iynU%J*cbun4ORG3h?FeKBl`AD(?#)eBEPQ=OS4$QvZG! zJ*-V3)HKSxmdjl{z5en7Z_95fa9o@ z&??j@oJtkP9H}16u$qEnNSz4{N@1Qe=7iPdVEO78q9rQY#zoXNL`yc7qEWQ~{1ina z%~Zu%^E6ciPP)1mN!C-l!KttK`HT!z37JeqBfKm%3&(8r2=wHrYr)S|S3)vRaj@J# zu`ipiN|0`>Ks^OTh3Y)0XsGzYD^i0Ixma~Ygh; zF6T8@8*pB#Cg8kT~F9rMRM0rn;b1$`wr$TPwWEoi=I{veH)VK&iBgDLTBh zSLcD%K|P9Nh58anR;u%$qNDl>DmtmT$Z2Qw0z$heI?i=fWl-8p-HXK5JL+BtZE)1@ zQ1}YIumG`F9Yqh^*I?iV_?M$DhvdHAU#c19J18qY{w#`;K}C)CZ1Qg_J&Y)CbV^k)w`)`q)t)LfI#d z3L(Ky9d#!neCDVOWcPDNae3woZ14@qZH_91>ezNi{RZw1v()PB#HS>{{nAl4AmUfZ zH?-|?R1YMv+fkPwPhUG~2}JffYA{5;aTML|_c@A&-rqW^Cvv~vQJkPXi2A01p{HI( zys#IMH;D@&j_mAkFDPE`1GmMk@&Y>}^662mUs7x}6s+xqR9<<~4(;rG-ZBY~FrRPnl)Yce&= zKgK-1A#OC}xS;Uf6qg!urvHlWk?PHj-A+w!3yua-=)U5r^6ijFeH^+}n`O8kxW3e8 z2vKbVN~9K(Y8OzLlsy$HRQm@JD~;1jB0Sc`l`1Y&`G-0k2W$PDZ7NTc?1(VXv0Pj4c zAHIZsQR!w~?Fx8L@jliYz^lGOF_u%G&iLVXh5H~rX5(a>rk_vqaw<^?9XVf#)j&7f ztVgyB2UH>IW<9gc-Y(4GdZ$vGJs+(j>0U-G1F6Ug6P&{Wl$GY(Nnc033a(ZCsm0_& zg_)0fyjp}%BUb$}#D_t?U|jy#OXp9-5G{|+abh^b65HOjT$JIz0{@7{kvO(!*Y~A+ z^~GuWg>>%~ain@-J#U21l6ZQ{zMTrbcyXsaFzuAIvSfaCo!7!^5?b5RaSC+G4k#Hz_6|Mmcv_QC272i~ z>BB=aiZG$Ij)LbF<87qNU-V~Gk7?-*N{BON9DK0#4Oe?5`jbj8rMCYguFT1F+m*N0 z!{Sua7;=DLt&>cB>`>aNnu3{2TF0)EUbnjWB76t zj*04B93!SzldNc%6IEeIrYJf?r>c24PgAEMR=V1UtkhGDaUQF$rX%?b)dE79rstKV z)d) zYr02qP})|FK=SR>dhpvTdQW#yzv5V-ID=BD{)udLRGgpeq-Z7B*>tnIC`@*ucf`(W zH}xgbT8|Rngm~y4O@#BCALJL=sNi0;w9Ad2qMFVKeW(cMUb-J{(=_oT=#juGH0kxV0wrCHlJ?z54p`uHHG}(;zOL;e6e|#qqzgr!UtJ zZ^3@AXxz*G=G*5_W8S3dq8{G)g0Bz#TTkzk|DAWm&R$-J%mG72!r=0hVI!-0{@J?x z`rEz2IxmqO>2)OgjjTGgSFfs}L-f{*yqxNeeY{6S{S)DJEjaa_zTP_h!VE7*54p=r zs(z`TH$>>NCSH8x&!(9A;4H{A9^gG0KIP;ActN(+TW5Q7bipHSChG1TmC|ny^x_l$ zq9Eg|hu7O_kujw#Se9se?aKe0iSw}TWU)L^lsUEZs zWBceJ)PrI53VmHV$Sa7Og360(hz@*@w?uxe**GeV`E}P%jO&2C!M{q3>S52c@$}kp z9n$r(W%(X0BT=z}U;jW1_TJvjy>p|YN*68;7bPvjeCB#QoS0Q|;`Q*wVQv5y{2m5d z^BtLvjde^8YC?MIl+G$6?>ErsT-N@E<>AQ!MO{fcFJ9z?&Op5%z5EH-cGEnQ`6;vF z9A5f$Vl#~YP5vUcPL~(^87XC8<2jpZV>>PNV(B*tO~jf^cVqU(WRIT$Sr8>;N)a`LYy~euxJ91czZzpc1bh5>9 z7TKnff1$-$7Ux^M+~SQEZ?m}C;u?!jT71^xOBP=XFy_2r8CxuVXz_E4Us~L25v{k$ z*pC*ETVyR^hWVl(8tWxss--h6@-4yeVuLZft}TOAi2>~`(jR~{-y_8S7Kd0IY4Hq; z<1C(Iaf-$17WtB-o`n`Un3pjy{$UxMzoNh`7FSrj$Krz)*C)+y#tL(LT#KWRWjf@_)4``62@CTZ~vtx0r3Qz+z*Ir50OTyujj2iwi7XYVm4|%PeY(oQz>Q_gk#l$nPnM`_F*qZGf@a z2EEDB*vZd?bA6O@Us&8_@mq`LljR7f*DU4OCK1CHBNqAn8}iMDe!!xbWf*sDFv=}m zVX>RVz81OZ7Zr@OINIV_7SFdh%OdA3DbIOL;!2C`+mVjFX-~FT{LCUJ7%1=y5e+!I zZ=}u2IMxj^EL}{*x=m9{wSfc!$` zf*(`wA(o@)3oFzdmXw(@bk#y;*z~$X>M~?TsdG4$8CKg6;Hw5;C8~xn$BU>R5G`5J z*EgzOg}M~Q&zPpF4vLJLtR2&nxQk!rrQ$Im-xmto)t<7+&jhSw4tLhER!X4F8MDC>6`R;6HXS}v__}x@%T*rDxbq9g5 zQYT1ZtTY=+Fjg82CdNwX0F0H=A&IflZsZYTrB+A*W2HXa?hAvZwvfSKi8F5)EYYhQ zgC)+VVX)K;N-sXr(TmU`jBFj(4&lrUJD2W=QDRif-LR*E4y#!4%|#8`>` zd>AWj0uy7Ubw~kYrQwK&vC>e~P);TP4DJr|P;n~xT5vH~`V}c*utXPZ43@aPGX_g5 zkS7e5K7t4aOOJuVV2Ph#!&qrFBr#T^X+6eD=OPJ?l|BOgkE!JK&|P;bnP2#@@>N;O^I% zPhLYEC+3r%AbDawc@=J1o%!VL!F=)t7Q%`7WbW};XFl1K;EDOO1GgU zK9?|5JsVo;bFU;---ed?EMJvjL)-cdkyDjfJ3an1L$hpXXa5gemdX}!LBier;~JYE z=82beDIn!_3g=tlkxt|pea4wyo0KukYzuJ&W$qU34f(h0JJ0m;W0S}(GtzF+4&@I+ z1yJRd-lhB%kXNluP7qD`mr}ls4d1W)r%1Q8;fIueF5|be;Xf)rg}G^O!;dPTu1PRt zVIjFizbf5%td|mFM@v;&=8~}g3lr^VBV82^zUSS^hA$2KTpUuJZTPaVe;t)}vEes` z{rN2Vt~UJEuzwrFyV>v+VV@gfsO~oW?y&UF)0@Y74GOuErFseOYUUQL3HwjrMD@1u zj)t+BXHu2dEA|1!`ic@a>#<1JpUS3=OAc6CbNp!m zg-D}OH~i^bgi9&LX`(;pcbuo=ZI3+zdCEB4Wz(PU@#!e?Qt!j%_zTQl@kM^>`?|$A zuW{^GB;xUVjQ%ChLAt(+oYk%_WW2%r)T}OWGx*HOkhd!enZ1J0)yQGyT0V2ZN<$WB z>0}49UXay*^1*ULRyErJyWEidE`?M#tT*sOt(n=>6|6U8wq_i=-jKbTk+?jvwN}h7 zkK~Ai1f4P-6G@$Pi}7BTDA4`Jd)w;%be4Apb_+onNM}J{ z(E9i}Ua!A7Yx93)xk3N^T^OoQJI{MgROe3idYaj#>djNI8P@;K^b(dLw4FezUUs4P ztk3VeHLIRF#~UND0P*%bZzwD+^5%PURAL)^4MFJ51*%A|o9{J|E86Pcf5g08S)oeN zNej4u(3YzZ!;ipQd{Lo_h6Z5f02{h3#ZpDIA{3QN+UYxwAjTF34#p(J61r~}iLLtZ z^r8%1&=51Wy^Hkk3%thirgpmPPmrAoCN>z`y0J}@(3?dVe+4TMAM2GDBgIk8Fi;An zF5s%% zcgTxz77~5t8}S@@X6#M*2c zsuoCZmTH7+n5`Z}atqYskhxfKn6pr2f*(^ez`+tZ>ROyf)V~oS*^DEi>TIY>QOlq%RecMYG(|&^bae`ntf%;Lt*-_k zD;X*oGMTCkG-RoZaLiWsLQjsG34X5X1<5?cHSz}P0i5S6fvljR^1S}k-7(*#)|HlO;kBJC5o<|P1QBvG&B9`=1SwdR9%437AlOmE!Az%*-8~4 zTV*N%rBbdYAy!SF`5#EWt$GG!j6U;b1hiNAV0BRE<5-~%AjwMeiPnzleW>W9x+ABZ zRX!xUDB2EmRlkGZ%?xVR<2{OK=rgk`i9Rz8cF}mRYWvJRz(t># zwiW0z&q74>ndvivKJyjG6Z*`Y!9kyy(;MhB-w6tRW`6h=edc<&7w9whLk`(zK3RWp ztv5&%>SouWE7V-~2gKSzCX_7hfDHCDN_q-fLs4;yAv2S1BAH^z+$7F}g;Fh9kkpNF z(`?-0BrXhv(rsu-(g23mv!SI)9Lt63+t9Kk4oX59qJ5BX+oV^K^H8P@u1KN{Kq$*b z?wrKW#K00c$X55Hi8}jwT*4$>0Z5rf*?cRD-dwsq=X&(!1g;^}LL5M@*qcilqW^h4 zdUNSasLV*SHS8@@E0w1$ax zw&BadN&I9%sEZB1DV%gB6YXllZw)7LkQwS`!&iipcCzrh+i>*elD6nim!UUD_xn&U ze1n-~v?iRy5nQOZjdwJh^tsNu!Rytd1*7*B1$cU+-114P3%esq%3hqSnr>Fgsfesj zbhBO|Ih{5W(QEX|8@#N%KX8?5{w?63PnEJ4X{!aR4dtgK>i2H&8mHa|(qn&3UBVUD zbhwo!+~~D{3ti=nUTI}hltXx5xFHlF)9jyQE<`e-8|M-1vR7szaw{sCLCeV!>#Og) z(R)&a(~zcgzUA^&V_o)~4C^H~c`yFWj?CXTe)unXBicCCthvQ&CTKHp%&d2zM^dSm z+~%$P-|3Z<-tH}_S=K_Yq(}9)w|j@W-wQ7z7KdxuKW==tCZ6= zLta@acWt&C;}EE^uR!qlZ8Izxw#bnEscZ-# z)5r(SkL!s$Iub)q+%2b9PYChBAcA6G?jdPEZWk!U4_oHn01G#c%*kv^WUQ5=4W^zeonP4GpLYa<<0ijSsud4YD#@J%DvLN~ksDJH}3 zx5>Fkag!mQ;fCSh>_$5L0b(syJ7Vkz;xJz%xhtBc;%S34ok1D10p5+6XYpV$EAhmh z11x(PX1qyf9tG3_gxK;6u@)c*7Bd)unlXduSPeU7DxPl4K|HI?m`@47+W##ui+wNR z3DdA25PmF8OG4A^frx{&B2lYp21^iHt)>~IIkbA3CJ8@I+h{xk)Il(JED07dEx~16 z5JR)g&>HDz6n8>@IK(!>YtWrdh6cfIl(M<>imwwS(bb*zvcl|OfB1LjtNHpoH+Th; zr=PIf6h4Ar-9@v&6SouW=16RlB_sLxi>N$C+Qg5J?@n3qq}?_v3E{Irj1ok@M))tm zKcitQ>36y5NxMCp6Zz;#Tbj;ypqa)-PeWU?!!G}e9ozrRM#F#O2xnyofIiWUR6J|H z{5M&=r|z@MGo5q^PTZ$ov&+N7!AzYZ z{pu{d)`N;3@n+OSbW5}#hii&bb~ap zk8bdv@NWyenOi|&C3v!gIUjILlKLNj7U5h;c)#zOBEz6bv7cym68fp_4Jvr^w9-XFlq zVq)=X#*n;X$1DP;8$;%9=)HCmK=0KZUidy`1INtW;D~LAM^Mb}jPQf+;UVVID|IV> zz>k>MU14@`6?}^M$-NZn25GfSEEuG)=-@$_amX$_Pm+&CH1fplgbQS*N&v`A^O3sv zwv?bQ%PFBOf!3O$x{zUy7MBvv5~a^Dvz`UeAz}5oDadbi)cvSN=zn;ZOdJVszMD^X zEc}aI+&QL0p-8*8>|snU`wr$X-%RLGDl6Wxzn7a!(*A8@(@3{>?R#xrjfVQ3Jm%wh zGWv*J!G_C`M<64m%fpj1ljVjZb~JAcdG)Y-^awhD-(>EjWOM*W(BP-ZV^yMnZ^De+ zld7egCBb!FK5WGMBFI*9=8O63BGDh&2h4MX9lLq^wmI@xZi7Om1fEO%SEDMhXYpZ= zm~!-Ec1D=ibI__U1__3^c(0jk*@T*a2HqUC0}VV4RmCO^yH?H_3TAsAxz@uZA3s|wGNGHy{)hIuyV>0iz2#Edde z%-CKlW=Mz`zeZ-9wO_OTqpUIQH#;P}+w0_p!nWyVX^uR#h!up(J-fYHEA%)V%4w9} zM5a7c@5&SaPSxEgGkOzP4@b}4W-X}F)2^I?)Kg-i`)PV5f?vW>cw==UJ04pvYxCa1-hr78H)R#^l_@gfB z8QJI$yEuFkF`aPk2e2VC8ulZD!4SO^A<~KZWTO@H6BR*BZz9EvqfiV#of>ZMW|zY` zK(kX2Ob!xj6L7K^61vQou@qd)LOk7=_wYmy^*sUfP;Dqb`(W_ZpL(bl5Lhf3;@}kb zrid%}IUZs*y^>_2mKoac|=ye*}8;jNhHCOL|WHMA`+6wgONvKczm5W zvT-do9JXlHx@~j0_OS+qGA79H_tP=?Y!tep0#6z-FSq1}L7p5|Ht;5=H3qa;5=8B8 znBc1wK1j(>QhKfM@d$X(VB=9u&|qo)#ikS2wD9pE+D(n{f$l^LAGXsI118!o?O5eB z*wOR~F7A?7g!oIWtLzlVGt7QMUJRH!3}NsTMUM+4$atDc{{NHivs7_+Wjc=??66zj`NmsKhFF# z55RM^`ySIz8)@%1Y)($z20_166W8o$g>)Me;CZxtHeKu8Qtu z;!{O;zH?j^DT;>X7ivwDNXXev68Hx^~}V`8SaJ z44sbsmj7ZZ@=ERglI4Gp+-Ev>DgUopGA9M=ODAQ^6y6L|UYDlu0cMm>KAytg4&Oyz zW3j4$7>M3Q2BKdA$t+}(0HW3TMXZI8)MlpAEj zG^{RtCkLnT;=$_D>vZj|0=XLHW@dU6hC5k|_`S#gHaMy<%p_3IzRV=M5mKA*3Q`hi zkB8YnF&K%x<)JjJ_=IIlI?qY|9ZY6h&k0HIY99t6{)8+~=XvZsISD+)w3p57Q_IuO zPJ`7)JS~)(1H4#SHl-tE$;Z-pNtN8C>-TB2F$lAQSWsdTUOC_X_H znrt>#dKA+p${u`X^BRxBETTM4zOL02lPCkYY>~;c^PeM^^~%LaB>QUHoM*ob4LbH# zJiuv0e=MsqIbCUXdnV5@n+my$(0k-@pdId|xOQm&dB}T$d8hq2gjWAGR9Ws;VIdf= zcsAI{DpZ?_r%M*Pshf%G8G90ZBu_zFu;2Peyr-;0sn+hdPPqeltle*&LUTm*_FL1W zjcB_YzEaQNl{r�tqMglvS~M>s5WAAKW3-2v=WGPovRgb<^h>by!IDRkJYvy5Jm z(iDbVILj9*%ueZT$v?7q$41e_v#K%q{SYlE!@1#G@_GY8cGlYHqsZ&~a&$IN4~9^^ zoZBfC5Li>7kX)0^do;R@sCV5CYWihVNiK%9(S`7sLH2mSQtAC2c{-aHn=Y5xIauTU zMwaIAjF3QTSyfihFlZtmC&Q5wa(H#@T#%!*0$RxKm1lCW`udzK%;h+<+5!^2;rU z=HyLdO|30bs{A~k7yre%p#R1C=ye4=0nPbs>%WjX|Nq}FD9gt3gvjH?JnTg7Y00~@ zS}in1!W=0&lG2)2m^`BdpGqE{58ZQ3TV7~(Dv{5$<#Tu^SSKBlkDkHO-q9Qpl*8M> zF}lt|DJZuPCBL=oPZmhZJn2A!Vf-n_k_FOunOn*W_zTc%9XWFfkC$U$u*6=KGeI`X z@|8^zZZzBrl&z7+`W6?k7iFkD{Jd3U7#rlq7ZFNTWNdqWzb{H{C_qbjjOM)S?2kN2 zv}OC&&6OI;O65)E{LS$BsHtoOsvu2#(XVdi`yi?rv`I1mg|LXD1R#`hGVFtFIuH%k z{v36_cIKOAYi(L3tW_pmYWyxI3wg+<4`lB5x{NvxXsww*7KU_^3_{P8^g zF8fNp-jiprpX66Pd1kI!pHFdSQ>}*t+6F1MQk`8$tCB$djx6eheuwNmEHq+DHA$dH z(Y&op%?AmTOeC!=XNz)&m_<|XRVDo*nv@QrSbt3SsjnnSMUc zZlKDjr;|fvLzySzd8?OZgRF@{8gV{kO;t$eJNs1Op%7?yv~@vECaI9*9pDSoL3&ny zO^2*WJBO_S8i%ZTGbN)!GJYc{2L25TI$CN0KVLv%VI zYtmWK)=-U;tT~7nNY+%veu-1Aat2wGPS~(U=#U_5lD)k(Qsa;{3(4asjcZxc8m)22 znj4Y#WnJz}QYnN`N|Vsm6wLsk zG?(zH8i!D-R@kRGvlKssQnKx}rfYWyr9V)FGjxOyN&`N5Q(xZHoaK`*5G;?9KlJ7O z*|oB~AAcv@f~wA9M+y7Pq#-Vvb|Kh>j8?s(CnI@w3EPF(g4dz!Xf7szEQBWFVTAfa zo?@XBcr`=K@y?B4I?}`Jer6$Y(NRW5Xfr}$Mv!KTnLW&;)15-kfz1eY4kJPqIs?QE zouQ&Mf^Q&tW?yR3_J_~`_%TA*?}Py2Z2M=6$~QihQuV8~9AquWHU`=L!=rdI+4YnQ z)Ao3jOhz{b+1#U89IXsOsZ1FFTdTWes{xQ~uf?~u)3p~R*?vxxOpoG8wzLPv&hjWV zlC7O&4?@@pKOqr;k0>P#6oZktMQ$I!JDEj}{B{7(PNrQZc3aO4x#?n=CAa=5gM)ZZ!-3?mUO5Z^XwlXTgJYi1WZ)DQdkL+JQ>yZWS2yq2n&8i;L#e9%52O=B1@+*>JcYrgRS6>XyRNDB%m(eSN zO(lDCzI=kh?9}_^?SpxzMmrH0UzG@AN=r1B41U9V_nklLhl6~%4SruxN6Ms=dR>>*C#AZP;-P#mb4aj7PXAw6 zB6a>9xwv+XG=hr*oxfAeTsDGV=0q+U&wJSN$YdTZw@l*eA>MVK%m?6z!0QQYk{=Ry zNH)2g&xPH?eFT=v%qhGv?l(}jWx-P%s~=N%G+&BcpjVRMn1@rt*LKfJmJdyV!Tao7 zZvo?>TgkMKphM0IGHGZ1OH*1zszXt^p<1^54>=@Kov+<>9 zSr8tBaiGk^!|Yl`6q_%EKl^S}G_%_ZMRA7FXy)>*ph0+i4o%Od84=4{RXqjV${hw) zJA8mVluV}ggP4o8n$WyHPS%-4fVs5OjI7x=A_|d(N<32;fX@<7BLP>a)9$K77eq5# ztODyCaX#|1P?RCni$r_yEKvvYg~e24!P~6I#0ct=L@{~?D=f%B!xnFW#KmlogrMQg z5&uLGu4o21KU%Cnb^_u%gb*uk0%uUrCAA?za#5W45$TQ>HzMK$(HBWc6z3u0B=G?# z$sz-xrHF6Ps8U5+_(~Hrd66!*BK!;y?u%X^Q#=MzmiP>$Y>|j(j-U&Iaz#VDHxNb0 zcb*{00y{tvbVIQe0W}iO;#nY`LeUh8AHZ2emiVw{Cj;chViC%tM07#onh2VoZ7S$W zo@QbvC^$?IiEAO+(SGTc;%Uejt;AxGT8jrjX(L7p5^`kv(rL8%-KIi%3#hu9*)=n+7fAoH9KrK$(sFb)EQW_pFoyj%`OoUtl3+_1FYFo z0AS7D5FTL7z8dkunw{zqtl2+=2UxTJj4)x%PU0i1**79gShK_AB~0e*VSG}Uv)_dR zgE@OgV04%uc#axkEsExtAx0s3ShJ@fURbmL0};ZS-46h3cG?RLYxe!fHmuowz+laO z7G(`<_9nKPm<;hFl8qCg zQQD>$0biEL0~uSD!O5{<4=f@Y8Fj=?xVnbD0?FlzXq@rW>LTOYE~C)O@s48}!I>j= z(Q|&v%kHx*Ch|Ga-B)aSy(uA?^bY6Z=5G@P4a&WD#$W^AT8aI5?TC zLu`sE?>5N5;oxMof!V*nmp1ffp3!+0{9wy~$CVH`M6m=lS4!X&LPHwO2t179$Cd#v z49p(M^B42Xu#bXB)IpR4?m|AXH^5_R9-zI=*c;$Q&^mA#6;X!C?vm`On$zYCx^(s6Ec(+&=4bbk_;^2dEqON zU0%XGb!!g~d_~bWVRR-L?IQ?Whl1lx*ioj7~Xrmd^N)$Y|!;74+AuickB0YM4wpxswG0Y(Y#sNJs%I{_1w1#{0{ z1Z$i?G%y*GQ+Wi(MkWB7fwfh}TfR?a$nRegc1R9WgH|@U3iRn{rV1kLt z9h$lmXhP0C8110JCIq=H%;QWeB=?1R_b|=nW9PvleAQ^1U&4l>C4}xI4N~5`9oyH!!Omoa3^}A5u($v z`8Z9Y+u1{_a%B*hk5lsnHaib5RMev9w~#XEAzDRx?p3 zp(TtqPk1F%tvu8(p`{+BUI{JpCR%nVYq0D6v z#X8Au%g`3Dkt3J!w1iVsI=6Ui3DM;7q$RI~i@9CM`q;!1_LjS@|W`%z&;D>9}+4$_AsZqeGqSo#d~C8CXoq1%OR-g2JN zWFvSmUK|8)MqG<9(k=j>=}do*!lQIKl{MkLAun6byP0=da_e&5Dm)dH&~6BBXYr?C z_8+6+!5uvVKzxlxVThH;B@@aD!?4NO9bbWGS_lJBi96>}yr(-zvO6yu0Z@|ZAQ^Xl zV}<3XzXbp80 z`z^U)1y43_cIDG6ct`VdE`MCX8<-!uk+iG%H>NsW(lj=E>jCProj+gaj_i01|KD}t zJ1*O4Adz$-r(eh0{KfSQwL|E)>-fi3{0(o7 zDSx#T5HIg|vq4aPxrrCzV~6hJbIm(C%WbqbdBc4;8oi{8w^8{d5MGYyuN-fWa@l6= z7Ch#ua+5YgT^rxU+n>A!h&Yb@$sH49U~R)Rxo0zXS+;D!on(0wj#vUXwHXToRb9MI z%FXWw?Je2ueyj)hOAO^X&A0F~(NT|M^dYO)1W#6t>erp*w0rTeYE(Zm1hJ>0+FLcMUj;fasD5*a<~lj(^X&c{;S>B;X2hDc-AuAJNPf zmwMP`wIQxu>jL-pg7E

    GT&w~~h`FFR z;wS1h#1;66(P9;%35W_LHCBn{K`|ekA<+(UMw}=_H1XnUM4TW}k(5L+7nCIN9w^Cb zXLX9&jg=}|!B?6f88%(qhVY^K#i8rV6l5=wCFlx_Y;gvZ9MKEHM6R&G)IcmmzVp<1 zsriC#B5bJi&qm@&1XrLAf-MyB@LME4M?#AQO*=Oh{ZSqzVg%?-)Pe0y)#>xi#J8X{ z7cG&v7UD%u^`m*MR$>-Nty54=qM(rei!&>DAkWF z_@VlRzysCqBJe=<`xAMA>PN?rLG^2gq(JpMge*h#+kl9m`c)t+Q2p8hK=q?h6RO`z z#0%B$R>Vsinc)GdAE{DM{fgwH&+vrs1bl7idh3w^=z6)ppzF;-gA+1cTLQYN506uZc0m!zRRp0_AX`^xqhce$`-$Y!o`JT=q&^pE;)w( zD7-OqO*Q#Gf%pxPfe(#Q7f;jhUypoa9pP?r-jAY(4y}^9P&VDkQ^Ic}&rst~4&WW3 zg4)I?c#@-`t|7@eVh5gk4DmX^Q9~RDsAl39fDKFpQ9OH?XasN+as+L>HFuB^g#RGE zzG?1iM4?%T6G}KJq<0=hn#{e?a2VvLQ=v`szy-v03EmBngT9Uw&jBc8^JQ8O@vlU_ znfdWjVgd_Nd;ICh#Fz_D$07DKKT(j*XffdC>?eBAx-4Nch73WwG>3q@l#WzQ=dTH{c1Z^m9yIJ8Cw70|4wHLjuj*V7s| z(nqbQHQr9{by}lL+08@Y%|xuHDbmCkZf>pB6dxt`dYa;1`Xco-#hv6{Pg5+VMAp+3 zUnKWhP0gVWs3#;NdN3T=GagJW6ibLylo?54h z;~ce46~{ShohpuV)H+of=csk}V&CD4eQ4Rgak+ILPrE>6b+J;v;%TjoKHSZ01_~h5 z2HgS>gkii@yPH+ANF^CC;3+ zsBG!DS#Cd1FNj91aO#vLI?u#ecrh5#cHlMWRFeXho*=ut09|RQob&>8C310A+yRG7 z>6eebz*F*XrN%zW8iY(_t89<5sMrj*CAeHt1v9JUH!twiG{xE0<9viN+1BICyjA8L z;Hl}#{epV#7kKVDY*=K-0p5$5KMHK=;CGv^#Kt_EAO6ghSGrO>0d<$Q7BR8 z4M5zC75|9u%%;TBXh6G`Aut*6!EUKfp@Xv63-u{JqI_SEQuGn}Cf1WC(iuy(DSJg^ z^*xmJ_Grb~h?Nbb($x_aRiXy5D?I0-crdfsns*)wj4i3p8$?@X8#HfYx&0u|3fM$@ zP1CX?M-K8IZKoMkORVqI-O~#FtI1zfz5YE@GIb()zrPr@()tD-=7V@7{#_1>o4>^> z?AQ%FQC7dlok;g%JS!S4bL=-*mBYbN1lCLTty-!Z_^n!_J4o28GW9!v<8m^A-{jK( zWr4PMe~{dF3O7KsQioOD{5`a}@iO#1w7Jmr?JY{ygN1)$-T?kT_LO6 zCMQIWoaRRpQag~Sg`QzPK@7mOqD?oc{v_Xa#YN|+fxNV3>*n6JCG%*aoIV7LfVV|q z5o!okKiblq%e+Ovd;|zhkj}^Rb_~^Mf-^yZCin(wI9C2>`=FgeV_4V8M6vlC#BSe> zzNGf>s$J+2p#HUh1Ju8+A=DXUJmo*ld;XVj`CG*j7 z$!nNzEx;|z_awju<|Fy-CFc7M;1KiCS+4IfUk0KgadsktFG^*;a@d}FW(m+ z7{291@%@6Q>1$20lrKcZn=A@0w5Sn=S8lO* zg$4sR$==Z-qx0RwB}Pf>jO5 zDN<>~J`67y7<&Qu7a%@NHok!Okh=7t<~+qvF^as_q&UAemIs{{n$(y>T^-wczrVfGA+4k<$Uu#dKVRVjBPS z&idIrE(%ELsdOvnCBZyv8QPi*Ht+Kxzl`LCvI`Xp~8 zD~iN96L~2%4(s+h@Q!03QQ%j*?=*p`@|9-qYDGrv2Sf$@Pc+cw?jn&GHm*LGnM7Vy z@yU~6GmiGhXy-NU8>L^JDRBnUh~eQugk{s*W9>CbQ$eX49@Kn3?bWHhC5bkl+qBh_ zbvthcf`nbiCh7oO-We_!A0iaw?;z@8FDThm=^ul{{A5D{Dcz6q}7#`yF@X!cxV0btm0K>y{01OW|0$_O9 z2Y(nIz5u}R&=YMR!vhV2N0D-MtkP%wC_RlSFZNgY@a5YNg5jgyo%zTN$Mh*HR$nG! zuN@v%5OVr7SS^1Mm!d=zWYZ0tIKF^P7ifG~0Kc}y9B|UY+#=bx1l`aIIk`k+cBYdU zZ9hv_j=cjz2#scsBW5#iOyD*`1FWHP9UoIsG1#zUwQFUdOg>+N@!>l}Zig71G!+~P z&S+fmMiN1Q&Iz$o7!@v!547(J=d{w?6parwO=PDr%BmV4Xo8nca|Q5!ibn#U^&&th z3Wde1=(VQf=Cl8yFgw&9>5Jxb-c@KYlyA$`O+>-iRD{Xr(HIp^7dMI%4h{Y2W>+I$ z3DoO5?L&BKsaza`YXY4n;qIZwz5TQS|NdUw$mh)kF5de~qV#{;`9{fkEybJiwKvcg59(y8Wc%d1t;GCL zd7oZ=hIH#Yy3YVyIn;9WdHo{;T8lh0xgPz((cb+jy~%ZETXCnU`fiE7+b_CzZvnEL z*^1Aqy&NbmTM><>vu2DRTQ#<6y|BDEWakbdFY`Y+){jV@a}m&4xhFNnmF1Ioj{MpR z1aXYe%#I>CRE>&)dWw(g{VEk17JV%~E{SLTyc221TwWB6nTm4+z62X}%&rXaxO9FP zRqOY4p%3EaTX&}h+3V{59=V>!1!IOlSU{~(+|ZP(opk;=>fKv$|Z9|oDA+wvpbRl1~3dV+$bajKM%K!4j!s;#~5@D zF66K-BCnbH^2Ryei9Tz6O8t+sE;ln3nMSL|?dS42*U1h;;VmE(S!$|bD-Fvu?4@CU z4F_vDM#Bjj&eCwchSeHgrQsS4)j~Dm+X6gH5kI0G{?O2e0wsE!hN&7V(HHdQ8mEId ziLaA}bRZMqq_+^fSi>zuzSQGYYcu2!Wo* zJ;LwQ@Ieiq*6Mn^AQd zGeP5KjT?Q%T<=nr9Q^7oX7Ma`o40P$QnJO33nw8G{AxwLY$L-kiaQ=^@~@Kv#NB))&daXTayA)w?2v+WNkd^(d zWw$sBqLV~X)Tp%H5fH6a=aR>qbY#P>I~r*YscYodcv#ROm6=~lr|Q9|$r(>>*LiL!hA#lJ-=>1`s}0QdXO#czZv!E^H6H9D z*gqlvjE;j+hZD1l$aBm+z`fT%Q{uaXsDU$huo3iX#CD^1I?NMh0rbF+y$xSMI+B7t zORuaVbPIuJcfhd({~;CZvlPH^{Kv)O!FGiS|B7&uOxbgU4nx3kdE~tND1x|};_+x3dcoY7;yx&TB zCneC!`>m9@cY!96S5@rEVK&G*%?2g2fdB)OSp`4^MRYzzMB@!QfBc_?H#N!VrEn`n zM16LMlFznM$OD0<#Nma$XEII-ZGlkDwNY3COX?AO=Z4V zeaSr_LcxYhiQ+b?^3tf20~(1etS!szMmQWY+v0_e3(Kl;&F%|IPf)Ul;bk#i@XKid z2qj_@0Asl%9vG5e?qte}UINEhbu3AZ3Uu&y^!JH3eX@DC|1>_WYbI+EA7XKAxc?%^ zg_+!F5pN14&<{@}Ze+LCl$_S^gGhOw_^#2NFnO8V#^@6-LmOFq%pxSvG#2L*Tq3(& zjzf&!c&4+Ee+E)`n25H4k9N0m2F8qmc%JiPo;a5UqGikq-%T&nqY8K&)FR_ZX$HSf3z{v$RP^c8r)5kId!aIkC!O({u6Iaid39%RX>WWIsW5tvEu?m z%rP32W;C2_6u5t;slYG(FWiVe0{_wQS2eH3$9Y5=RYNvv$RMa6MW(8WF_aQM2LH?$ zN`O-A8Z*P|86uXUl^OA>JR4E2EzoPTkK(M!v!av7CGyzkZIfi+ZxGjy62Weugj@+Qf;c@B+?_0Ai)&x z-IgEk>YOYeJKhNM5F&Dn|80zkieffF>7q25}DgiJoguum;TLJOu4PU7@PVmW2x5s zrdGyF&8(_U7g)2KTD}}>PEG?kc7RBOaL8~jBDxOLiLd3UXYGXWuLetO+^BT}YhF&5 zmRSvov+^4>fS+R1tjBvR!z4>oCu>2|bI4m6Ynq?Yvb$;3ab9EVpDd>tLP3YY*sKXx%${0h%#lwH5XJW7>6NqPhXX|8zr~VLIu&AA zU{H_IgNKctI%vYgsT0OkMP98C0W)f7B{cI1JqGoV{}?3BkCY4+LzoeG3`^#P^J5csw*-K>y%U&*frR;S%dY_%DPHPxSm8VA_x@@^sc9mJS zf(SfK3-pTC-)-4e19k5H~YjZke$i$&ywft^? zNR@J^Xxd`dgsDxdCd{j9ieyukdW@YqZuV3!8<=bO53b0ee0QigD#zqD+rS3N(4;Q$ zGNp-`kT?yo(ZGlPTKx{;*;=jh<>!(*Hf0YGeI%RwF09YHuaS^A6CB#S7 z_)3tuPq#{zDKHXkQeKaZrgf>Yy7=FL|N1eN0I8su65r7-0P430E?d=fMdyEjpyr0P zQ(pv5!zHDGx{sQ`KfyZ%Uh`{&lzl|A3GuXm`Eav%*siJ@d6s`=1)D_YVS*E0DHQ5o zYC<7#wSFk;5k+q`DRTBZ0#D}`-=xbc=l#iYt zOit|kA5s-WXs$ff0t4$UCwZ`_3K5M#K$M$Q{MY1$mi$n{l_05Kiahp3dI2Ah1PRQW zpIMV(KxM)JFAw`!Hs79QV4J79NEt@H!5Cyn6$iB&Q-)R}!ip_COHRB*lvz=@LmHPS zXIg%|bUtlm%Dc8;9;@m7aSi05`Hdk_yc!>Ll8q+t9F(k$nJTyOjzO6=od-vy>+!`C zK;tmMbDoZi8eSYKF$o1oziMD{Sc;sWacWd?_!Km*k$Z*0vG}Z2+i^yImHc9W$TjoF z%NBz~(z*ee1x;%^21B>9UK6VDHpuIyyc(DV>6hBK&yg^zYZ+D(J&2A5WD~HfhJ7_u z6Fs0`tntwrPStRxhN|?yca_Gk({QbZcW8LOhEI4fZ0yp6eHy;5;Smi<1EYlftf7ta zAUvoc)n>voH7wMSDj?Bmg@Ry(hNCo86F@0p!&smR*J`*%L%MN*Jl?P2lNvs+;b9Fw z*6(T zdkF&HqVdNx9?`g((SiE`jjNd*;53;^Njgmso!w6w(xK%P9!G-;6GJv$2$K44VjZig zhAjz#QB4WKy{E=$@}BsIYJ7yo#}Py~qo#@gr)YO|Rt@-R(V4=dD=x_Y4Hjv?Agt2_ zHHQTJ9>Nj8eocRcAnG%noJa6Yg5dj5yMLkauQmRo#(yOUezmO!5z?vZCb}p!#RS;I zp6UhEjvTjMi|9rqi(?#6MrtNzWm^6`H2`$WUfH6$gQ zD$H*h+PVTM`vK5{8mIXy;>*x5hhP{4HH!+^T077p95IsN4nb1U396<8sG1Jo7)_s~ z;ZzM55k!Tm)^MeU*J-$3!&?Bu#JE8dHfc!qzC_=y;T{cD(*j*JEkM<@0N>H>?`wEm z!!I=?OAre0w1zY-K)A4}E#pN^>jKhhAK^I~s_9+eG)q8q)#Lzaj)3s!e$t@)X%*2?Sf!#r==bJ%}Vl6e~w-1OUnNz{IZ1P$ce*hth_XKzP7pXL z$mG9L<5dI^&Mg{Oqh&M(@2SFtJkjCF4hzLA+VDz{d(<+aNmYyWl6buY&4m==6tM);X;JFYFC@?65+o61gf z?JhfixpVUKN#Au?b6#lw^k)ymKRvbdn_f5WnzS#u$IYGowZ7X|T`u39xaWeqS|59I z%*)xAMlxTzqtB;pQ(v9<_!lj2>DTNq{f0kwTky8@yu5SRJ}x&G#@{TtI#ncv#pK@s#9+9vUr3!mt)o7?`KV zb;H1xc$k`}uAqb;A)fH#2%KLCJi}T}W(K01$SdfT;-pz?>*|^~FD18?9_EUzgsmbh zj19MHM~HQe=NJ^XkmI!*R4@smh*EH!=aynPG$HN6Vu7ASwEL6$^^Ne1S`K_KUVQiA zR{OlwwY)iTY$0)6X$eRYjIF0e;V8_ zOD>;+X~p<;b{uOh_ik&O7^s3}7w1lD z4$|o-_x4KsRF0o6TCTe>GeM@!z;P@v$SNIORU_BSjZa~}V|B1ej6AfdNke(<43YBJ z%nt(R+I~gunIYaWWiy8@m1k#(=H|RuS$u^U?CD`^t`H#-zoTg>9lJIg2Kh?pqx0lz zSBN}biBf-1X`f^E;S!_hDiO_TB_>7DnpdGP*JQV`$<{=#%^&NOp3bS)-=I`qSq&ae zXBdx^13RbZvF37b`^02<2xNx)s-`3qz}oE535^S)-h4c%;Bh*b2W`;4x{ zd6UVw1;GuZ$!}+id-@bpO~5Y${~NIlVk0`?czr9DZHXl^O-|35}oCP@wdPJy}Cq#~_@R zqX@Rru$zVhG#shn6b>*?<&$}Ub z5?;|cA3}w+)9Ag%$Ql!e)K71P1N!NqaI()M_ZlPXUF2gUbx1Xr)>wqNoYsHPO;aJ- zBmwF@w$~Hx8CgF;UcGh87Pdpe9QtX}tN3OxiQRZOC49F{W(F>aR(!9$A4K$>?g80& z0c@ZDBcJ7r^RyCwz;x%i$iA4|nEN zkOmw$0)Iw;jODSMdK2EAAqPNLrz$dMB2Cyv{|go~3q?X>5|^CGC*T}A0G#G`CbMEU z!K--bfzK7;NUmhEPYw0qs!|0JpA`_YIP9=zmD>WYi0ZqzoYiqY)l**;e z-DKXjb#uK1Ltb~FZBU+Bi*w50*BDf5&>-)=QRLv>hCMfm%<@BUvTK?-DP3shG;4rn zz7Wybr{T^$^8_-4;a)SR8B*>wbK8M2;yRJaK9wEUiMh;(JibnpFdVaZbiKGD_g_>A zJ6JyWwes%Baj0X(rO+O}A;LgCZxYwB4v~R3iyuwrCCaK%{XbnNC9bV) zA&YMpuiboy81%Qu7IO3*qKDk@M^R!V>rU~MDZe~vuetd}79APCLAWM6B&Xd23-b38 z4P+np7NMrxBgW7rX!nW%^6O1#o;&Up?HT0Rg2d$Bk-^&p^Kpvc;;jWckD<)YylhNac8SvuS5YCHJP`5+q++Tb|j3`thpl z);FqvTNup0S0_Z={2ZJ%EW({iE0MOI-qdmMJQj>3Y!;O^yIx+kRTR~32x{@Q1H}tx z0#-lbD~kNQRiv1F55DSrbTJ7@!?US#V{R_0gY`ZVW)^j)r^z3tn(`CKX5%4>;*2I9 z>VwU$6X|JlA63vqsv_OyDT+fTAUHGqN>e_{o5qJ*Qy`bqBc~l0tO&j4_MunOS*?;w z=#`ALttQjF5Eg)r1kqj_)3w!1k8L|DSeujuPNSxMv)UHPzl9(BcJ?R$zZpL4`xr?W z!lt27*fMFGh#Q{+2S$>-Cw35IyMel`5F9H`!z-(ZYD`FD8XZYSirPS)N(jA}(9wi8 z$pPy^pguC|W6j8QC;t6Wro3*OXcKNm_ z{~hGR?MBb11LUL=@C=1XgQu4OW$p4Ip(?98DFJ@~^|z8+5o)Z;@gDNS1|k)aHy;rn z*v=0qG}E|GhQa?B8%_+PzSRG~-z zVYe8-zsyEUlk5jH<`H`^rnotn2=mT$d1w#Dl%M6^Jy0D=K~9kyiS4&NXrOOEyf2lZ zy)b5WLUP+HW|Hi?7xZ}{OjoIfOY361LWS1tM|isf&SqhpcaZ1kI0*Y{?T1y%-}jP#~MP$MkBaSL*E$IhBbfU5dMjj((X^ z6uI>kv7BM&V%BRS{D1!j{~rhH>wBC&d`+~HPd}WT6v=;GtYl`iBe%UFirJS+S^D}7 z43P=)_cxIA>rp2X6g9Xi5q;eu^mSWgzeCu=)LPC4;51}3lrx*yc{t<wftS zIX)p^G(|bjTbDCAS{^B9`H`uI#UQ5pt5SJ*UqOo9zGaJ+a;)97FcS5qNOycyRB@@Y z4yDm^m}%Qhsj!%+1kJjf-ZQ(SZldELT_4>Sjd#{ZL~2ZZjA=S#goQrq0x(-|5~*7i zJ#8mQ<&B*wOm5uKEWQUd7%aZyk*NAC2hLV*1$eD>!2H5`IpPD+FE|;YumeZIN~@?b zGa^rafI)?ImY*FFjdKu zA~o{Mui^&5?`T6Su&0(d5K&F1(0r(k>=Jg8pDuC<-UY@l4)8-_=RP*2%@dCYbScnqrEZcnJl;UK?ChfEdlvJ%6n z@TNv8iF`yZ1=(DK`#PK0jd1nEVd9$F3Z0f5yUfXB8IfG!%t#JBg3nDI&j6G?bv#Gp z#!RQrxh=9?^Y$&}#*dN;StA)3>m)_`W;sJlABn=ODIV|1Q5g-B!sGGX5DFfd9q~l_ zNP?p^7BN^w{fJ`ne4K0A6m`jjMK-lo*O^4IIf)b2h2*Q-m5Sm>N+e8n33KV5 z0>idB=AozsUqy_!!GG9JBniu+=?pukJH6gXuen3$m6nO@l8N-%7tD4OEwsErK{J<5 z6Guzl40m)eYTeYe--8=p3KGBB6EkRSk>Ac<1PMzCa24tt04K;7xtG&4g}a2jEOBY9 zM7wvdB@ba&byBz^b`6D9?al@hHbJ>CzCD%eFCmd_SBtD^29 zYBpnsWo5CGVrR36Atx6*xok@0+G6L;fTI>$jV`1NHKz^;`td0DzqrKazwL$ox`HlM z2iBvbb3Vk*>x0GeyKcddeCW>@zbxzFxbln6PSU!rzemgF@21*vW*2At-_y^Hp6Dh; zPIPfjn)1*>Cqwq_?(~k7b$51{a(ht%cE~Mp@@39>=Aug;!Tjo zSzZs*9bQa*@WA}ls`;RgZ=*NBr&0mdBz5ZhqXnu;5t)#w{`VaqR*>R#XCYVV~*Hd3h z>*_K0%LgYqd(5VmoOYR$oUMX*p1OyT;PZmmPeD9L=w^BEWzGmMh=UZwAXEVa5j)8_ z6P!cQsea%E0p1T}{A6bps@a{Bod)cx$ezj04^g=7?(dN}(r4omqQ9plj$Ig)Ae(G+ z9N9OwiRy~tWW}XXzDVc!PBD{}3!Ea^GCj3G?)kkiG16%v?)QXn@y!x6xgio)wUCT) zJ%Kyqhha3wGjeFPa=VW}mHeR^f=8Oy3^&R1mZH&p3In!>yk@vsKKzP_%L&%fmZ**$*$7= zg`WWgIs=XKu%yF#jn1%$5EHkO!66O)YjuWY2nf;$P3Br{$)QGPs3ZrM(+n`$>LdW$ z?pq^{TmsYz)5Fss+L3opgD9id8V%wD^3B{|3Ai@ZeSksW;3cM9{f?Uw)l;qIx;HU7 zRXQ1yX?@>5-<6cyJj?x_&PNIoYK+}qqXBn3GGGsI zNzTSntGDOOu5iBw9)-iJPDv-F!V;H^% z;6mV`@p8qj&h=RT1-YS8Kf0lMB+Qoiw>eYT47uhury;vsK6RTjly!?l-|pNKV{WqL zYX?gHT`i$V#%#xUT3B4rA#%x9r;8;|@AZWuY1^C*>~EQ;keH`Pkl&t4i;7e};{0Y~ z1!>w7Xo2s^T~9c3d0{b53y|y?H&2du5`(8J`#s|p$cN~?P~M4m{uHJFw@CIBM#tgu z8={QD64RA(ASmXsO!>#9zD9gV79=kVHP>Q!>I_yJw-Jg-ysg=Ps8RaTRvCdYbO^UbV9Ymrke6DEp3TIE0*5d zp^(MPy8>=X0wZ*Q`-gH38cs{R*cI}tSDh9mlnB<1IN87eC4qIn3J4j?1tj!EOY->26vMd08~Z9P zHz87b%z4Sj{vp}dPR(q6scdmwRI*iywT^I~qT7&8bh30z+`(<{jQw=Br0e_V7V1O7>C5 zYagcXOG1xn)bjPFKtFME;D?&pwdD6x6%IAE5riJsK}Gv$9@hR$qXC%uP#n&U6vXGy zC(sxA*=2IncTQ0WC4zM)cQiFh0_#C3P)&`Jz{&|F@ga7aeEd5!wP}%o!>OtDiFfz> ztxe4*eRnl%Ew^Vk$&oo9rQ4BhXPp=pY5a?`{z?1$-!;mFenEyax*Dr-!2d(6VH#(kX$+!6M4PBdY7ZdyaUPsOq%<=}U+aYO6C8yN zjnFfLK}0PK(%)Kktn1_{fF>d_Hi)|Lemyoy)WZ|OL39@qW_eO@9T`M7BlmBE=v9~e z!7{Vz$!GMST8NVahDI+v6lN%zUq>T)Y8Z6;>9x|+%*cSD5~!z}1*pRTGml`ia8m*Q z9)iuoV1moL5I3r~FiTK6PAIENEu@Vblgw6ac@v`N-Kc;8!&`7hh#D}w1<^Y?U~YBE zeMx3tjF|7P_-`38rd(5C8ggPqi!wEA?01@*NkYCfzhg5wA;WAUR}@Cg6Y$KP(bi`_ z-qM`u{(m%f+Q(tk3@J5ZtR`n~TAI*+I1&0h4NF>uKNzNXD}sV*L{yo&}bO7>uv^sK{O8;7({-Y zVuOfQ2{#$S#bLYdHOzKc(eJ!;?7B7RIBeHFABCfK-2|j#XkCsp3?@2OFtj=|(bUs$ zGCn~Y5xef$@NNKMcAZ)9z93)$0Swx}C{<)$M~Se>CA&&%?-`H-{bZ)SMUD`R^Qh4;Zf$dI<3Ara{2XHjig@LXN=iF zS$!wnhXo5;ZZMPN1AoOQNz^c8`lV*yCNVwPFap1($&s_tTG}<^%p$jzT`MQ8hk19& z1hWXclRrBFB0-%jo2W#BxjbPN#EB3Iew0Hvd(wgms%2j)zkkkzW?GIt7L>Azs#7OH zOn4lohD|YDwOVdLsy4QhkCOxXb8Nw~8c<7JCP1D_bgAQp23rjXH*a^zSxEhy@idtH^@oL&Fp#_wjd0UuanHR zLnR0U6l9^OnllNehC#QvmSCD0A#*KQH$7tdHGf7W2m?-20bmEf=3y|wWt8F$APnT8 zl27zPCJ9On>X5kbPf%|5)1K{6ls-uF^Zvx}t+>3FAQz}{D9Sd1KfC0Bd(GP{F8m`d zcA;z*zI>paJaVs@*Oy9#*o#C=Z^PwX$P&+>0jH0T_!tdHbNblFK5BtGP9GmLcQirt zG2%Y+TBnZ#?Bgg91AQF34-ey&%~qKCSQhTI6(AM;?3-4Y@5E`#jV3WW*>65!_R?=H ze?P17TGu_ZGDRc(!@Mp~;V`d?vVYaM?%lh$W&B55k z_RnWAd}q??L{l*gPQ?g(A6*(A#W3nBi_;-koR&Klr+Fo2J%6gobF3XiWr;ty*ZGtl^^dgW1i?Ot%|TTDudaM%oHF4HIB%#=qVfUcHO`jf z_W(+hi*TyngNDRx>eLf~`G_}+fG-eKj8o;t1M?HOVzN_s1i`QPUh7$RB|+{s=zs?Z zo*4zZfKMhIi59+$V1|a_ z3wTT?^-iWLwyg?1OYmpbna4UG5=1~n82pal3f5J*oIsUuZ?tfTV1hi1Zbf&Qu-DuT zo%6t6c&u)e@gJF4N%L8BytWGMeFGsQX|C+{k@**1XSaQ37GCEFp7zLDIMu87HciE< za5uYHOKgK<)_cvYjb43v4UXuepHrwZ@7w9A(WwLsM4x9qBap-5c9JO=QySiG{=5Apj z^|BmzGT{XIF^Y-q_Mab{LWp(puTRVwBHy0zsp-km=9o=E@`~lnUY|!<+BdZG{pkJA zkv;#{I5xY^^d0vwMmNzn2zKr#5`EJle&k!eL0a~BIS?X;yvOntX*J{Jy_7%7N?oo6 z@`&Zj)uxPhM3M~3Oq2ThZNdaeaV+ z?O4yX>RyVLX?uFx?KU9@#NM6a+nE=&pZ|cNK$14jbllF{t9>!ygl0ckcYRt3f_7@p z^)-_hb@F{+(4zK?BbX?gIdC#&t~d)Q4#7m(%#{TqBAC$m6|g9wc@YKzDAs76%yV^mX+T8#tLFZr&3rgY)O+YAmn{g)uF_@j4Bs?h_H}3Y1})3>n6i4FFMHXUz9Km|8}ZI{ zmFc=%gd{omOrI_)qjqe$czIg7+$l`U$cB#H*p&UF%$e^igrWP$nZ80e-_aIkzbcn93_TAN!7*anr2~BTcxj4T41E3k9G?~S2JJf0v6&Sseke$t2u`&uHOZZK>chBFmG zWg0{kVD?Qo#V~s=Aol}2IM%oAymagaZP;vm#Dx7dGJxfNHficLgmnEJ_G9W?Xgg+o zO9bTd)S*PZhr?(#!efc#n{XYmzGdP1Z`QYgD0GquTbYw(`=P$L`n#C-d)S)b@?VYG z`X5mf_7en;M@`ra3(^0Kny_nG_XKnx+$t<`$prrjHx=-YCFlwZ@UX~{rt3mk|~ zN1Qlalg|$I6_xNNM9&BLfrcdT795M58d$sq$0GL`N+ssX_+h@DB9|uY+1P{zxu-VV zY(z47n%+j;cC_zo9dml-jsX{#DR+$l7w9GT&-D$GJLmaySw7F#ABN|-^L)jkV{C{l znF#;X?s>jE<1IYXpG4H0;IrgB6qaK^{;&iGiY#)tUUPFmoDo!UFzHyVL= za_-CJ%~PuzS*fF|zao$U!vr%koOS*MCY_$^d)rUDlsE^UYbzt2>mjhxcY%Mr>&RG{ zLqIcHFylgen5a(r1TvgK6tPsR6;gCB4X)q<_*@(-cN06Jmg<`Txu4>}87uVMgq6=9 z>Y1#xPYk$U0AQ>zngOHZQbM{uO|`6ZY{$k5hm*@Q5hdz9AL2OMGZ+c8Je<)G87sYU z{kO5Atb2E>MI0S>k17AMOjEx751+SwGg{EwMa|a>QC)8zHD5nRurzAErsYpBi<+-5 zW8Dr>^EIiF-Z5&vzKLLY%zUi|OT|fpY~}co)z|p0`fspe4>hoH zG>4Sj=>|*MJqC=Z#u-&pI<(W}il20y?5M8{tgJL;!(|w0i@}OSyXX*uVQAMpaFLJy zHoi7EfL~%9KNWU8%E-r3ow+UbpnC_BqfyGrzLO=lE%mjmS2`SGdtFhh^^F`7+tEVQ zYQ0+x0^@14fdTa!(JeZlnz1x3pJAi*qkzLk>jGXnMr#WDVWYLh)JQOL9knwIvqeb6 zF#B9yaf|P?b~mFVHG`ZC`HalV|o%s087s}_mX%oI@i5|{Df0fJ`}B=r#w z61Id_z=MdnENn6hU6tGmFH2~ZVwQ=1}{Y@kfL;A1MfnCIRv+{?xO*Fl=Ow- zU{Jhrm9KSys2y7$fs zuEI-iscycDf+rGIci&aPHxO30-%Y`f5LWkp8ur%!K_{#pz=1y}te(Ju4QR<)%WZba zYF}}jSSE+9@#Twl_UtvjG5Ox%&}#pO7@>=AU2%>se;#F?X}A2q=l9;;FaLiN1O0!{ z*HTYj=mDGjoIT*&+Ftg3pZE&hvSvs{hRpcPS7KYA`M%XO*GPHdpl_g-K2i=mMrf^e>Jb6*#tE|gj~=Wa)>`vDxNt5WN<;&UA%)jj7T zq%mrw((bt1QSJJk=csn|m}(GK?HVq0RJ%DN!m8c0uYA?rqh{xGUrUzokhdE{M@3(guVrE@4A%CVwdNdm&!^Qs&PTcgj!)e@R=;x(8=n#~!g}z@0dQ zvpOJb!SuxG6=7TOD{@i?e|o$1NE5enICes5|4dwnWm|E1F~I{k2+7>}1ozqNJNP$< z`loRB0)h+Dxw(15!)(NX6W(Bz@HNHz@OAumECXtQIx|>DvL^>l;G~YoH3@I{I(`kW zmnxUiyQmXCpLK2#^}M0}_~P-4m~g8qz`cOuZzO!1g1;n8SEsmL!RKHI#}8nG%ak+f zQNqPB_z+d*NQw)=YU*g+EK|v!AT+ zuMfYYR5eAVdt&4rIk5AN!q@5@IoHlR!afIRat-UKcjUnF>K!@PKQK?dr*NKnPt6qB zOSEv?cu(~%(Oe}gVuE^4EfoA6VfCIe6r2hw?7XK;1z${9y{DFnZazdPacV)3p_+JISO z%86zTb4XjCGAv)>IMF)an)9S%ureO6IElIy4O7$&wlQ%yv(UJ?GD_SIcX5c@l5Sz* zHerl^WAmup>IvXIiJKkg#C=Yj$#c%n9SK@SsoVXIm)!*^Z zKEBd#VNUN0EB%GW%gtzlTz5tLTvS;Z*D6hZdqsQ8_!f@S&5CvQUxmVJ<%m`OLO6`3 z{+@!V0-5mKtMEr{Q7f5nd1isJ2OqeSv5)iZ1^4^cVxm%WEEaX+tjsvse~mvD+ppyK z>Z*#cQmicw$`{M5bo=Es{?~sFx$W^9FnucL5Gj-WiWFz^bk|xyPVrly{Pp z0jn5q;XZ@cwG&y-nLG%r;*vGMs(v`dxa4>gbiajW!c3BA5@wRUl?|)yMNT7BCV*gd z?9tSpSBbjv{F?gv$WzNv!OinJaytiDduK6e{kBca{W-Gj##{Q!^R=!+?{$twP zev?sa<}oRr_Gk9zSkw=N`}LSqW%bX)pw}G8e!d8snM}uv{AKv20_M3a{8bpV%sy~o z`m5SW_Ll79!_(E=pEr}@;~U|F@WJ$;uR(#P`ImefcahhJh0=VyG3*|K7YLEiW!P*# z-A7&DFW#5ddVhZB763#&tAm`n0?E`w<`5(ai5~~2(1W;GgQO??cc|jEJlXz4l1ILj6HKtLeaYXCs{5{2G1A9kDHH#6 zII!+~4bZQQ*-TsZy1yFnd5C;YlY?LP2gN$2un#`NvP3$=pVQ=u*Zo*D2byVXwX)6% zX6=yTq2fZA0K`^|{cMInr^%YFAO}~=Axv5$SF*q~xe}0Z5R?RqLvJ##urc+gmk;Zl zv}h)m?`q6V_M|k^t2>oe%TK<^E4=o%U4HwwU2#vJ@b?5(h!8&QJCT8ZJwDsX1E0<| z4E!V%b$7#Oj}ClB3uE9D;oKMSIx_H;IoUL3A_D`z7N^+2zXk=}+}$-i@Ly(aM>@{r z?l|tqz-OQ&27WbrG#w77>#LY(>Z5Ur8O2J`gv&#tUA<>9a%OwDQPeCCZPPP7592t) z^9H(wQEWLfA~Dch$u~?mB1W;Ty8?;zSD~;^8k~-6-+!yE*c|4BukFKZbR`3WJuvqkQX~Kvn-`>>x@!{GC`Q#pm3b z?mT4>7AM}R>3@|Sgu-CJ&%4u8eJ|m0@EmAy$h(11!guT^9l9i_g}@?6?*@vK+yF$k z8kU@bN|?s9_T4~c2X-!MYKTaF)JkCQqPB*;x4|#*CiEwI)tIV}-GxnTDv2S|cGvZa)~P!@FyHC@=`lsaZTt zlRFOKh3bkv1wIdOC-uzF1BFJiPjh+Xy4Sg|3zD_;1Uc#RK!LFs%mFL6JZlE!6Q2hX zG5z=j6nDRxpvlQ?^?c(GeC&xF#LC^FNe z{N-<_`kx&x<#KwcS9#GM=9tMSN}ACihx{0yU#}L8m}hQbOX>O=^B%V3;hnFGtn1)c zUX-Vz#BM%s=IJnK_)B>&>%)ajKj(Pr8%*c90uW{aJ`)BlKeb!kR=rTZG39T`R-Bk6 z#nJejcKh(+^hrMFDK$SQ-RP5jq&U2P^}?pWYU|uT_MAEzpDBvvq@(dI5;&VcpXOtL zT|6dr%A@hcqs{;zuCy5G*dHw?K8=I8%A#9zJ}wgmy2Nygo$08Y$j-&p3hqXjy^DWZ z?0p1&78!t;X%SIo;g@u=%sCccB9i35WAT&3=kkSP@da8lm;5Sd&0koAYKxMhY1&}Kky6Pn<`!oUvQvyK>+ zdnYooK1aqTPl9DE_X}4ixyzG~>wZ5`$Te?jAsO%@qc3I?mMT519H4s-YQ4l-!wFq& z35N=Q}eAEt}HAQ!XOsN%Vmoaop%uV#q|U8Ld&y7(Y_ zHI*R@bn)LzH1*y%#pvQiXvU=`lh>A)-#yE7^nI!T?Mfd#bR&I{oit21hm?VZfTdHUwDWs0=c9N}j z7h(rHm;OeS8ZKm~Z$_!%5Z?dxC^fu|_rD`b4QWc$--=ShyIA+_C^fuFew}PJhc&`T zv2w<4N-l>DiC?GYt^`Mjx~VKCtD%DTOLq;(Yeu43KZK9V{`X7z_~ zm!{51#t2})DaEQz3L-_kk{P9r56KTwtjw;w3GsR+Z$gnl-i6qj86|@Z?hv1u4vdq_n_FAulor-C5fQMN+@53k z(-SGX-21tib@sKQDnbRW_=|5DvXB4 z%ZD8G^-Q3V)}kCoEDJrJfQN_7J}Sk$5ICrfL~*S(buFwAJ)0>{5N(TDJiMsCwvj2P z&18yh%)m)&&sw!Nsg%f?{=*5GUJEBh8tbQ_xOXy39zg@{U~ATF2~>55y72NGR>&T} zOB!q3Ih^C8osD~NmrUj5jjYyoKJ#?%Z)gZ>OVb16HuV)MQSZpY&gz}U0wf^-vQC6>jeiu@Fw1XHg%eIwPPP?mkN0WTcvufr|tTEY_ zigx%E>a|VrInA494>_~a%7o4Lu1c##0^bK@!^co14hG;?Dy{rZ;{b>XmZ$YB{#-no zs3bTYU;?aX)qKpg_$4y9PIO|P7-kKSIaO8(B+P+TmW@@NJk?e%)-G(rQztpF+G;KK z*jHCu_jtr3O=CQ}vc~EqqN`tZR3k z{VFX*ZtiPUV=sY^vD^Vho&ajHb6EPba7P~sbDm3yj z0w=`GXG^)yT%n;Opt4#?XoqQ3>m|jRAn;v7&U~jU%`C1ikiv^g0qG76d9?Vk4un(dw>nvKbU;}?MyL^RqEuu z5T{18=Vq3B5^aTP&zrn-XwL_%pww0EG~PbRQ1-vX7ni z3DcK%UId}pa2MNl02BJV*-YXMpnok>deqr1cba_evqlQem3IEcxW^6?R%B2UVl zJZ+H2Mu3>~uv?C_zBPnw8e($!7;7L_&1zv~%R`r1lN2%e?=r{J_LVGaJ__h|m$9HN zm{_oMqBRKqw*3>W=`fw2Kgk-TJ)A2iy@6$hH&3FplPg<(ilsxX$&hyLj?xuv8wxR9 z8Ru_@OTH0x5sJFtTWpyOa)%}=UvImOXF4dM^jYMOIn@eqF)&CPs!JfW~SrAArB3r*C zywsLvo{yrir&Au{%3F+ZYvg`=9?6Z|Z+)0MHr!Oe{DLiy3xf&fGB(v{`c^F~UvB-) z|29<4nr&tFKaX_}h5PlGy;%42Fz7Y!$K$|+&ahun4qE46LT^xDz~rh*jr?!V$l&F=Jn^Wp9ksJBbSM%MCgF;6a0WJJk)^8;{-{w9k38R#UEpL53_D> zf`3H8^9j;)>Euo%*coqIJi?~t60C7R3bo4!ufc_Ql-Z@I7f;uR15N;lIFVaq$s8-a zUOoMB7W)wC&h!7t=l`9cdj1p4&Bu*9&;J)eYO)FH`CWoAV@DIl-~uzHSbHX|*N zy{8DPhj!p^0pqFF)H1$Jmun7won()>R%(`d2^TgX;W!l4IQ3k^37+G@s~ah&&$ZU! z6U#R9tQ<|#d-Vo-AQU^ zihb}VYnTU-3*Bx9^=*(h-VS+g$%jR{w$>wG{57SOELmn1Y1`T`!VvrN{gz_MnN0bz z4X2K!$|*=O7zj04?pkK$YU#y{#sSG@`p9IL>vEYR!Lt4>#qxqQY5k7mu4yjU3MK5- zvwyr*@4q+m7d^>P+t4{AFN$HfTNLl z2l2>{((axpA91k~MWeKP3NxI2<=oww5m_ctX|blkIcA{Ur2UPSNjwXndod3V@mBL0 z9NJC$OO$qh#@f+^)~g7adL>F2Ubp;VuP3kH?dZSJO6$L&NTZe3sSfF@BC}|H&6#_D zggPUbfEFDu2d6PgE_uWXb}M9w6Utx)R^X$Wr~ehMVEOpQbeFFIC#q#e5t|pjfjIfa zuP(X&5vvSyWKtfrk_G087d&Ql5V`XF$E;(Rn>+Avt0E^CMMWz$JpYZ4mfQ~=h+IMD z(%y8rQVQkj$E|B&2`_oVdfl&WK6N)AMpnLk{x%nL{I`i_@vN34})-4S0)q{1Wy1ffg$Uh6{ zB}SlPbH{4Eg?OS*?WnL5>Mn4C{r;OuKM4K-Y9HMM%rK4i`IOh>I* z9!~R_=?UOC!;^$`*qkxjhc@SjQNjDP?D3wJ-|h}HjbXxRHo)t+1E`8&awa>>)#Ls| zGKR_TD%XtbDsO+!YTuR5hp|98gms3o)xW|`SaEcDV=Np~b%HMM&+I|?F2X4wx-EO( zYMsSSMHTy`PMFB{L?^mADWoNSEBn3=JQygay>I1+`y{I5h)HrIPc7x%_pMgq1^FjW zLuK{{R_}h49*h#Y421B}tCsvD4o0mC5EVXJY?3d=O&UGAIb}$wl8@p(jh=&?lz~iH zC!hSl%FW+_yEFPMbTT$D<8>U2)42cvI@rUMHuC2W!0*0r$!2@3Y}jc#@4?;eki&UO zk+b*U?(UH*c^V;K<>_wu1y41$|3mAbhLt$+@?5W+%7TgK{g zO>)pD)=30owdM2 zESWSA_K?G$Lq*BXcJ!5+F92XHDSc(h7tmJ<<AECrV)OTWa>J}7Iy#8~c|?Px4>n3mzJ3U_vr%XLteoz^~2?nfD;0h}^bF1@AG z751F3tj#_yL3h-OO$yrbM-cJ%W#!mb;TCVvwHuCFa>LQ2hm9h9+XiP?cLiPm!sm(1 zt)mQy5iXcmVrqhUlepMt*ZSB>bmvwdBk!7fdmu4LtQG68!Iqln8xk5s(}?-3+mD3WJ+7#BIy zb2iG(@GwvkB!KZnAOU1;-p`SJau|_*w@bdUD-dY+A?i1ZB-)S4jUtIIXT>p*$V2}g zx%Q`|E@G+t_NSygv0NtooRkUdZ_m>&a=_0?C2d||17DlUlSXg0PLk)H#?)`j=WuQ6 zJpjaEDS`WcPAcwjJ$ewATP!~Yw;Im{S;YkFL0oSpd=E0jL&-8;>maU$s-LQU|#y+yL$S(m%?#b7|L-RoUq z4-&}(G{mYecPHORX;e?1u9@lb89jNRaYr+OQKq)Q%P^9wjfWMC87>IoHIjoO5gU9Y z=NcQ4Y&tvOZ8DNA<1gUJ7;N^Doa??MKH?4bAY)Iw2-_NiSkl1QteR7s;0;H%+e!%g zgHKNoE_c))>`5*(%0t3+LD(PcP2Oy%n3!(y$+4K2T`!kluyrggm%HW$i|hyDliSaY zQ+mg__4+X;O@ng$h>bAUdQ>Q(Rtsin2iWNRvyNT$Xu5@ z2$%*J|H05x=BQ{uIA`6tKjgug-@*k$B0(|Nu_a|?bl<|ui1Qb-AUF!?w!^qPovrKo z$GAg4tC1LU{!Rkq^2}kIo*Z1x_App$mI~>c>G>47Gd!8d#VF*G*J0;xS1(5|oFT+* zQ>Xh-1**)$h5rt`Cp{LY!ddRvAe&j>&i+?~Y_}x2V?C{+`aI?ORgo#2FYLEjHWrzp z!g6DgDdW&tqsWvc1Y?mYROlN;rqFZQC^F?@wrrd1#feO5SdttUqGGLYG*{zf>aCC$ z5C_DvrO9oE^G?JBWta3IJ%P6(CMuXxbpi>Tn51Be`-wCKi>YcYsYJd~i~6roO&hEb z7L{M4Qy6G1|Ftx^plBSb8QsEZn^>TG7&yV4)53sT?p~T)uI&`I|CZ$QJ>JXEqUL(> z6nSu-yx`&FI2nI$zFIQUW5?Z<+#7pk-kY2(Q?k0I$ogl>_sTi17kKSA?@9JG-NLJB z^6TZvmGa(4JEpi9!7{a_)lBxhH#tk5sPlRBv&M{`AZyo~rS|>zCTHq~>mHYDm|W>j z&Xr%TO1>JiK1Sc4JRRKo!~2s584MQ>)0LXlpeyMLR&-^_YS5L-BT~6hgq$#GX;=*k za>k7=*AeBzpmeTvxy9KHt@MFp3(^0z4}esZs>T#mnZslR6*77Ht-y7Mrfih^neydb zWZzrnRb62>yqWT>usc1RJk&4VluMsV{u>joD1{D7x^k`Ybh2$cozhl;|;RxBP_QBjhyR^& z5>Y_TNkjo+MT{u8yCjEYjxbeN`3B|$m8#YnQ-vc;o(^p{N)>9~M9P=VMI)+U1wapu ze2@~O2W6K+`6~tu=`V*)CV$q+8rcUHEIPWR4a4iM@ zlQtw%Taj_9TYGa9j*Ye=V<-f+B2&}g5FbE;lQAc}rH^Tjk^?_V$*-?q>O94gz3Ijp z^Eb3%rgLPii-t>dV7pI+iHvTx<~=3( zi|lijD4&m(dpTV0I(Z^mF1+Ba|7Th8aY{wK>O)rnC5W4S0KE$?go2rHJm61^H6Y7y z28NiEj$<{_68NsgT)LWv61<+^JmxMWs3z;qCrHYi_%9s90)nuoC!R%UA**UjbxVHr zaZ3DvPIxb35f={l0_jQVQ80+4q=R@f;yTvnr%0mB#{r4hNqq=j&)lmCE_K;GKS{|F zd*7&^O!dWKS!$56u- zOL^}O+?%jZxBE1tcm(2x2kZymQ%}&J&%6r{l%Q^C06_yL)$B9n()}qG02%3N*{;VEORgkRO{a{=G#E5vzi!sAN(1PYXjYG;Z)HDc^EBGx5nYbq%(oJ zwAp^aGrnU-?gABaXl(f=uLVLQ)#{(=Eu2MO0)gOQx1YWRLG9zE2<2Y{gmGu!5ETe3 z*{EiW!O6`nQ=agoTSGTs zSU99FE^P8?$BrG@@LU#9vZ4DYUPjjPeTiKPa|-Xp)Hkv_UH_elroI~|gEq{_TE3|+ zSwF^`*RBp3jdp5#kVRrUwXNd)#dd1T;ZAMsFZ`2*-iU;x_~-+Hut(YiG0}I3;PwbX z_i?yD*xRadO`q~YzZD_qzOz{P?Fd2lO_p7fg3ap-*zGQdb_=?C#4MC^xo%QNfE8#o zZWBglO^911&~AbF&i%ffd63@pdNp|Bu10Wx|qU)|zTJ$@V< zstXA`i(dkb4B}rd9KR;WC>;k3;VOab%GraCuAGEz%vD=jP9UfzVJ%|aB?O;lt^%JT z803Q~@HK)e?pKlJ`mYJ!%F+tfP%xo^prXrf5u`250n>2{oK(ivK18a^Rf8kNWlc}*Yj@%|vFUeiA2RegtNDyo%LuAhqrf2q)vHlUBhMtLUX23pHe4OT??%DTFy6yJqT{0hTI1!`l;Bfhgndmg*v%)NJ5`^vR1`QfD|l%* z0BB8iu)iY1Q*wd@O+tZV^Kos=$L-`X`sTP06<&M0l`FH0f57kdo0Xvi35a%#iYj zAXV%}j8A@{5!XCIg0;a}j=SuzeWXp$n~=N)UxuW&0!T>Gd$Yy`9}rdEDHx4!#_rrO z^Ho+>JB!xI$M#>i03I^V2!IiZ2X2Wa4$O z^nTWmagE)*NAL_y>zXKMp9joZ+Y4WMniRe9rFB`hup&*a9fytHukIZz!e)PMOu1-b zg|%!vlCpytI+haLGBlVgts@nN{Hb>^*Z2~jYN1RT7R(hBWo;jP;s&{HJWeHYDWP;J zF2`w*+)wCBne-HJBOUPyxr*P)!XQT zEEz%bfcp}pxwETy{09#uDr&1Gv)W#y%6n<~2VOMe$N?p7AnH!W1eAk0l_pJR zRRyn@Cu;`;gVhZ75oHa?U`(S4S;Zwf5S&bq@e-mVxg88zE+1VFqJrR)vMeRqtYTI#2+;ZHu=u|n=UE7;S%`Rw3#8pijm^Mccj zfCa~@tR0PYKI({08AF3bVz?aAJ6I?u@Opw=iEFi^-d2TDSixz_jYzo=`1F8-PcDT| z#xw}dUFEL(fME;d=$n8=Yvq=8IDH}45t^fLO02cZP7fk(XJgB>czfyv!L3>pp-!e7 za!B)xV$APYc`oj5^N8R-je~gOS14qvrILtGUBZv685a=Jyk`S)??oZ)G$IEuXd*J) zf3i^RMJmNxtI)ydCa1qw(z3p!H&WdsK<>6w!$4fh*_JTrh5*{oLk;4Rt!n94A<-zn zHAJd~DDF`^FL?#^cTt9e%XKLa_!BC+UUYZ^*V*`)T)16yBuLwUNy$~jl@k@|bN6+& zyNwE7uVLUe356=UIC!RzZBLYB$SGSxAvt?U&?B3V2@aD#A5TAJbh4+83665hY`Xvp zJB|%bGd2N_Rz&fr8YmPYQPr~a<>DxH3X1n5SagJVl>}aXtAj>y}XAu&-FdnI%JyutTV{Uzn;06#~(3VY)EiV4A5P=1JG99f7l}kQ{`_m@5NMIhvLw{jEytE`feMFa-~yJEn_}JTWmtPKa?vEGI0(Q`+`cXK>_BFjmg3N^QZF(1HrDcFT9orLQ-N4l^75bjVBGfj3+PsaiB{r9kFIu2w+sK znZ-OTxy_TQm#LBwv4$>s<5yq^obqslfbx)Pcm>5B;UIHoB=Ap|<2Bi0ez3Jxt=WC% zL;MljPL-(G>;4t|wTX~HNj!TN1^d}cuLJcr)2ySFK+=w$xwmWnrTX7>XM&^*yd?S;PCE zrkrq7FayguD1HR)Onx-n;YW*YadYsaF!8{*_G1~;zY!0;qBJ7GmV8%eVP(|d0E0nH z;cb8(=cjTO5^&g0M6y}H49z=^Bb%yZRI-uCaAz?$5*EU!448*6W18u$!YO7XXv5M2 zd2r+(N>X9@=O$d95fy-lCAg7#o=iQ!lde~)mh}~Yj8bBdBLEq+PJ@rpu@w=9W|GF_ zv?Co99lu2eg(2US1QoTRFr=1g5tSr9WM2LhyWzIrcS5{=syHTrV|nr^Z;Kjx>K(y= zklR1P()NmbwY)2MNs}yjX3xDVc)1%>&c0h7oGwdKASstRY%4pvB1ztOFYw|LNBr4$ zFUZS^&EP<*dk6CjMwz_f;M@X70=f*eWuwEpvK-#E#F3~MJJQcK2iyK~u=$^38u0G#il5d`I>f&&!DHLl+zHho}bp`GLLYI^`WeRJshx zTYr;%M#%OL26M7#zi`AGg)_AI2qoQIM7Pg%N=kZz{g4?Q0IigNPOH9_up51LdcOV!+q3`hKlRpda8w5>94 zM!H^3<$7sFmm)djR)_~rJ`)_|qe9gm-vffVS71lR+K{iF`VT~oWF$kJ;pc%k(+QCF zmBJjVTo7l5B18L($%-&RRw-l+Q}HiM3;qjGm@tJW)M-aq(~);l*{o8`G)1o3UZh&} zw$$p8Axv^V2s|{XLE!PImi0O$8sD*9N8m96ygr#Q{f>6R0(K29`6tW+Ja%BXni%Y( zEY*l+QTcOd*15>{XD2dS5v{8Tzi*dr41Ou(w*y*Nor<(Xl4Z|)KG;vliWh?CHx2rM zM&-$o3qv=^5&hf7D4@r_;>F;z8f@Whw}5yxB!hTaa@Q{%bLI9eq*d9ekd`SZWxNb< z=S-mKw=;qn#tM+GZAvntTn-_~pg#(07Evr}L9|ShJ0UH}wUCYE`tgv#HqV49=n}aL zg|ViR;+lUb=?I}`vf3OvU0Gh@&Iku0oP=mBy(CsTJZ`loB<_akgLim(fG+*LgT!4HDB} ztN^2zkQS!#K_EZ5ft#|VUeX_3x<|?t2ZL#6(v^XJd#gJ7P87n>pgLl>d5w>Y!Up4U zv=wS@o3rsXwyr~ZWKC1bnBEGh9SU~nwg^QmFc_mc!Uo`NJUf=pD`ybx~5exH7MrEI-A?f>X zXx~ci98i=e>%J?=mxu2P#@VC351#Kf@_?8{a`Yz!xw7F1to!`|?~&^Wm;MNCC{ND) z5g6J_?&9ejnR66~>g+;OcT^GSsYgN4|MbDvBWoK9as{MRrgV)5Y2_T4Wyer#f=oIV zEL@hERw6Gs7R=M`NtOeTmK4YpdxN^Y{#bCIN3N}QP%{>!3#?2ts>(Vc%=&&S3dk$POgJG_u7sqLB?vjgme3+%$PQxYI zJ6TzxCJqFC4ksn+Kp0ttat4JI5cnr}y#SfezZC-4>XgZ`v@G(yf@+vJ4VNxgUv&g% zzQaVd-eWJME4^OSl8cQYh*cs_fXa`OZ=DFX9!m}*Mr}lfL29d9bP80izBuxsIr!~I zZME6DxP)adh?Z60M855~RX99_AGwNCb{xyDQDx<*zk(S(Rd17+s_T*76o~cNF`5d{ z3$;e4_F|ShKUz+K6X1iO;oGVY_1JJ;=%_BfmxC*?%Izt5Ruo%!#1on!JYf9Qqo&Cx z`&O1Y3LqH6pr+voIcr0;a!Gl}l=t$86=A`XU1jaC+$|FxXTrmBL}hxRF$Tl#M=26QT=jQq2NXGsBF4}-m+J#L zgvsq>*>%k^S*0S)!k$gb6GDZu@21Lt%;?xIAeX!Zu7N2m*eXqHktn|(lvaQR=({C` z3XNl+1FgfZmmO_`_Tj|P60hw02o{&TF)b7uqe=LgOd63|DDUZpHCmKV zF4-9;{Ail%NMyme&q?)%2GY;b0M2%F-k>TFMZyPaEwI*O1 z$^dS9X}6A1-~+5r%TX9@TJq9y(%r^O7^&puk-=a#(GW;OX&FfKAo2_n(TG_pL4Hya zN-s}Dy6B8_muoB!_!H)fOzc9TAsat)JF-PrO8&J3v4T+BP^M@l`?d|0bow4iqE7>k z>ru>4VaNgBC-`d=bfZl_Who~&Uz4N9haQ%*w^w=X;q5|~Yua8R=Z+7+n*|+0 zqcEYiMFmD^d8mKWNEVcFt`5~LqYGt0HG13pHQX?J zszZIH^$pVUI)RFP!U%h~{yK#$NW8n;5NbE?tFVmT@aJRx;V?9^mU)O6(2-|-Tw%fg zSGF`iZCPg|2jo;H*D-m$+>%p43+(955P=uSoLq>$>+N-&L(*^-2dS$G#q3=(DnxwWD6dLoa;Xi_Ka z3KofLP!!e*I_hAp=z~+tT0x0Hqah${tr)>V**(~Avs79{HOl>ch%&nYiA3h`0OEb0ula|QZ4^ngG@ByL0&_|yb z04|)py}*=LUl+=jc>_a5atgt10F_60kDR*)A7$PrGAmQZ|e%$C?zKLU{&v_zw7aGz83pnO{Is?My{F`~%_99>lnCvL61ZQE+VWO!ME5Q~i&;eQr z$Y_THH0UKLZ-fOpg>#NTHyp|Q6Q;6`#_-Y+=%RRem25s+33S!7Lua(7c|i2pjpOa; z$xmct=^`XtL{5`KM&zSNs+TiWT498CTIl-rS?SX>3CF9}7ZH zxEa0qLnXwnMWH%TBy+BVx&U1QCt3Flck;dtJodIF`3Q^1sZ5ed*F$qS48%iJCwMB> zxf_iXsH>F8E=)uS}els_mNve&k00?o~qqKVaUtNLiaZv`)w)b-4U8%Uvy{4 z??&*(#Cu?uU_1nutU#=uvP%S(12g6z3oQ?_5{`xql&4jTJOV zaM>4Zy$*u}7&Fl7SZ_Fal&PX0kZFZus`yIg>@QJq5upq$3%a^_5<^4Nl$Ambd$|}G zWwg!HhC6K5xCbIYV++NK`$E~eW1-k_f7C+JNzN@b(=Z8R|Jm(|<%$Q>!2I`?du4rc zdqWOh9h#-)5;PM02fhez<(otdVHV-@DuU+By#q$w&kW7Gm>GZIYrEA93?SDt$WW?) zTg~>5sRI9EjsLAGpgV|o2?{y$?KDO^4AdQ6fK*nG=mN9YkTCD%>F>J0OGs1}7h|ak zs4!A-gP3vmAa2oUB{x41N`r-Cb0Dn^EV17N(lW91OU{F#R^2{8MbVvlLN3kQYeIK52}`%3uvB4jgIlbY_Ox{!n5E1wQc zH(aTBhjQ+HmASHJJ#<@md-ec%=d2G^BgSJ$ZhJU6*N1`#_|5qql(R;T{t(&O8$y=R z0v?{v9D@2Mjpu1{3X-9w%!NBgZr%e&YG5x8n~^G)Y)mT=A2=&vUM+K;f#CUYiv7u; zPa46wjnKb9V}FSO<$>Qb|=a`OFKU z8NN611^eO`R)EzwxDy`{ILA*8>Ymv!;F{Afq`CVK#5d?~j$IiAQDg zmqImJ40xR&XCsI<+{CnTc}8bwRq`PsK6O-h6XR|T&2q?Z^A@#e0vDg+?|#o555WF zKDcvLKrSY@BqvozSRoNtu2=;p{cd+!o>66Du}lYTzo3Dp5R*5iZh{=J;(Fleu)%Eu za;Bb^0hj%*R**Omzl}1|dI3vM-*&VjPb{&Mj5H|N``!vw>%iI}$rTyF(N~WO$2vwe zBu6BbN$+CitvQah=AL&$uNejSY~_xIL_HW962mm0Z%-nmd2@)Tx-l1!dke2?hcaLH z(gp)vNSU2YZv&v1E<_Q~P2D;g775f~+c`YJLBqPbevB=d%1dutqNSjPlj9=4bjgJG zLTOd2P)l@KkJ8!r`O*k>y#|+Ji0>&hCAu+BoaJ*Q30j)O+5U&*@b^L`7A0EIi>2G+ z%KwXf$9tg@n)ZEI?HT+>>h@EijK6*u8V{-Rqoy(it~&y$F>`Zjf!r($5S`>n&9L9t z7t-9~Ho4(Gv;daH8fga**a{&H7!D9s6{-Nc09a{tKkLZcm&@E@IskqNSF z6jHKb5nSU$jJz%9A_W9=Y7QLVDpF*c+{Gj;A50tIV=|{s6;O)K6nko2Ik0T~fsl@X zPOd|~^NYW!JMPNrYPs`KPiy(p-26nDT~g(hJ--aSF0OLWOQ|tJtzzTO#;1rX;Pf{G z(=KM3Zp;Vdb~CB=B78Jp+7M=#PN1CWrTs33X_OD$J$P`UDzD*X#PV|n03hAvJel?S zan(U2lyWgrBcYU(MkCVz9znY3fTE5Aj%PI!++58J75m={X}-|}RdAdbVje?zQSk=S zU&YUC!Mw_PByuqMHxQI9zYY~yXRu&bs#MS5%HPR8@9WSKw|2ORu(9tCq4h#ORR=+N zMbFgYCZT{fQ1Vu{F&5L%u9jt65aB!FCpbuyaJu=YP=5_;HzfQV8mL*Ra^%mUHi)2L z05^E|6F)=Ic?(GQf`fE7I2LFXrc}BV6l_7OR3}VHTIWF29sCRIirBOggwCjk_w7B0 zK?mj1qrk{s_IJO8ay?P(^I3{3$Aak;iEE}|i?*F-A^-zAcdESmL}=B2KtRy9Mp);j zuQX~;{I4RQV|x7mfPjqa0NGOrSc&Vu#bP!>K;jAi)HK>g2$+qulMv7sLqKs>82vbB z>Q)qV(67sjx1W_-&wdiE$AO&$vHD8d zz`oO%_%Q+~O#I#l>hMp@MVk2-DmcWi57JCpo*d$LEkV*Uhx}1jG8qRdDp~I}fWEaX z+~q}F(laSHgi^DT0xY8FAdC6pH2Y8}b+}vn?D$qrl`G%hJQYIVO&O`DHwg)pK*SdI z4;iWJ+z`)JW~XvD-TfNeW~Di))xgamovR8d;1xL%8|1x!+?kUa6u&!G$2qyCg(^o- z3?f|4zrk~B`j%UwUekV$FUm`OSUFM@ z2R7t@)~WH~Nm898@y{r)E{(+cU>jb}yW7}0^`Ay_yyx>BPD~mFzSw}T0YZ2dA69_6(Z!J5g5WvPBS?nKEc$EDj>{V(R;1iXqWYa2bgPF05*Uc(UzlxkGKi)5;=7p!qNYMRo}9IKMdKUQY#rkX4jQ zR%dTCO2x)5+42N- z>k}cXWmj)DcOEFiz|{%$a5cFvQ1VTCpUoJQ>3m6++p(v@VB*;~6?V$a z$|JK1n{S@Ndc4y{&^b1O9+5}q;t>i#9X5hy*a$j6A*fuIT&T;8hcP%Kj-qN4`>+At z6B=cRTec|&vv8Q7Fl2$F`ql3Jgjo0yMx}Ale25P|kB1l;T$oU>VV@wKE zNJ(a=Mb!{8P$&Ho+Nk;L8N<(F^orwWHXx^sl)cc+Nu-RJ#{oLz=Yzcob!X$|E1Xo< zzf-f?xOoO;$b}RD)jkh>vob?Q_jnNjg^ioFDDrnMZn|yUyaP>(@aKLO4-wrsaEC)K zsPQ%ujjbDMyq7v*2WtoJCGXy)K(Z#B48&KU1tx#JJbVM`g~ z&4#z0FLKGlFRF)(IdfYeD!ighZvIhkA@A&na2&-q`%dP@ZRNwvI}mxz;;O2*!y`l&jC+dEy8ZOVKMf;o+Riwh%kv`1S{vl8u*5-o=i9h zR4uCon|lyEa=Wc8Ul`xhgWwx5$^tN3?&Xo2AIB1G>&DXE$KL1MSy;y|^&ZAfGumdB z-Qabn|AGY&eDN#`VD%N=zpA)Bd$)5P-6B}KEAdId8y z=~6k!?V=$u&IKE>_cC6hf?;oV!-)sHAqO3AHevy~1&}fG7c77$Z3|$_`_ZAE1(0MD zvjB2Kb<6_TRGwMj?TDkjP!~7)b+P&`^fsW;Z(FSw>Ai1Q>b;>saER(f#OQ}m=B{$C z+5QT|kYj0kpb;7V__PQ%IxzekGhjVzB+~F_n*rn4n2ox#urYyV9vd5B z2K-Qd_Ioe#^07`Ko-+A4HLK&@-f+Vi{j7Vvmp7o%&pLXa_lf@wd*6zkF?*jvwSTeq z%{!U=FZRCCkHOx@@3}+DZ=v5Mo+CqEg>SrsU_i@XJjb_T;S0MZC_IC2nPh%sRvg!4**6#L>Z7`GG&?miD z3Aw*p7BY;`B6H=_-o6d9`a*&$mN&b+1s42nFg5>&EqoQv#w>j5tl#Xfyk?p$%*7)R zlvdHcV_Ui7?=I{$rIl~$i{4oV8CFNN>NXjPZw7(uY1DwvDVv|>>cvXk2x&6)C2wh+ z64Rm*+6sF>3U6+`gX*bsJp`mocau?dj^(Zesv*`L+-Fh-C zi)hk=twKKalDDbW72Ahi@=m0+L`6~m25ZThoyFPK-3Ppze`Od~=J+exjV~E9bpFKI zlP6v}*)jM0i!Zx;rmV>+E+W?X<%Bb^#N7I-_cHljhS^x|8JcmK+?(wQTmIK5sa4A^ zZ@{cK(?h5JsWODI9DV~noV8k`z0Q41f%FXwSyMyZ{lZbNPMwAg3# z8cYg}g6u9X?-4DXM9Mnd7Wlfc+1{Jg4NgQ}^TMIw3DS;$1YGK{^6_ z7QdLnoAwn3iLQC5%|?CNID*|60=5``o-aA1vL&zQr$glhb#TUe(bmYx+CIs+G8ncI zy+oofA4{8Pqf)EtsP_)1I#p3~RN8T2CAa#{`;{RKzacJ6k=j!qc^3(J?=kQAhGE6a zM1H_(a@@O6DE&v)Ea_m%*?%pslf?m_%c}g;yHTj!P)AO9=gS>8Wa`kocMgP$ul6%< zp*Gnoe;$Y(b}s^u{x1F(nf=q&apG{*%d3hPqy)6H@uu!gR4EyKmue_frBVT`;zJ3pE0jkot0>*s; z7yzQ`07y|=Oh8?QZqB3ZR5gixblZtYlTFM*S-`2>uJ2G6rzA?QPNhECF6$MX$QC0o zk8PpMZNiauvKLSYjXt24ulXFez8-BznjwEU?F-3q-+0{!83US9y}~JLyx=F?52BlG z*-%d^OPA;U#2hic%+TE97#guNAh}sr^-+ z{t1y7u6cq1`jVcRh{)Q$nm&h-{q8HR654Ak*l5L&5n zKxn<14HO7s0lQD5L2J&|Xu$4eY<3%0vd-=5j$2%QB?f3@m64dm32e>oj+fBpp*STH zu=^ORqXD~%0N|Z&=gqAXDbG>qY#oCaCy3?Uu=2xhloi zLQJ--6knF%qR6ko{h)$)|8vY*(T24r!v{OTEe~b3mYuZn;)bCONYFj8u`DZ1uJif6 zk~?0@2wU6yK7>dflLvyn1;%QxigH{5foN{XS189^gWdBphn0urUV@&}8Q4TPtUOzK z!q~Wfm0X@=fG-|wmW)U@F}%FMXa|Elf;pJ^xQWcUDgm?sHz=Yak;Da?5Ql-)Zy%27 zY7^QN$KzBoT7X=tVG<_qFal zpAXvQrF4Y@*p$Xqi7K4y%nN?vF91_`+@+{uFG}SpBy3v(KR|Gxd?z1#=vtXr;Hwfh zS=9x;51lUR0vg2DA(i-;O&kBawAlY^a_ytze2-eP$oDAF>~Ln8oZZHkDEGAXO>G!l z+qW1W|CYtRx$?|hKT1}I}a(56@v$ zmY{R&K$`!|x`2}qvaOqY`~DC~#JIPwZ(YNrXaSi9tXchh_hOsJPFEAFWPmS2)2flg z`nWG&R<1y}=iGt5Jb4mcSmd~sv#0o)$vp#=%#<=n$xJ(!ff6foOkG|#$d?D{>48Du zTFY%R+$D!B2SxFCqq}S}OsJQnrBBx(gM-5dD=pH5rp(|iSy!0DPfzL@jw)-6YTM*9kC zqc~luP*x33K$8ABz7LJv_#)TKH8-|vET5d~OKjhX-`4O&7{QNv6(<3P?qA={#TS$<&kM0umPt(H&I|2l19aaRy)t&teii zP6KAZVak1&PxM@l;@bqX2=-zt728y0qUm!C;9!7h$Ub zgk|c+jttPWEk5n7gGi(zuJ<1Y-}Wp6tKKFjE(5C`DZ#1-^NV1?WDYIkWD1c}Aur6NSv6FV=mAkK@O;sQ&{$J;ML@NCr{eMd=1km`H}w z8;MN9eHTXR%2nM$p|fU;WP|3S+fJu$?CiDx(*pA;J?M9HlB(-fjcXVC+@LYYdQ=Ij zbf(>Oj&8vs*}k4lI?#!hdeKZ4neI(5CVSLvxrsbgpT&7Pk|Tng0_cJlQ=*-nA_8*L zt>^*LsY6>_ZXymkOxRsU#RR7-&~J%JhFfbsitA!?23{Dn!?UuZa?>hwipov5v25$j zE+_k(B{waXJ61w&`UZ1EqI`ajNAf4wIsFf~h%Pa?N$DY7V{+44IdPRQtEFV8?$vlu z#t~fXB3I3f2MG3HfByS$guu2{zDv`avHvxculC`&jsGcRtDAgH#H$i=R7ZJa7S5~r z{1)9M2Yj8Y8Ul&9g%n3KK_T1+4YjW;vY&G}Ww0rWVGJX99S^{ zuNtQ~-?T$j1hqXYD2F zv$*7COhBM!wN2Wmkp0#zY|Prs$@WBdy9NcGnvAxqy?{lx_13=aU+a?r;`eh+$5zEZyew z)%{gH$^8*;ZhabWx;~e)BfTExRVT_T>FWoy;qYf%qte$XbX#Iluc|d?pzmU}5Q1DM z0MH}S7il^Y9O|;rH4+>e5xzQ#foP97<=%<>zlaY}mpB@eh$_lmV^E)X7-L0uav3hX zi4)h~=gUeT$UeQfh3Nxl@EP@FCwpA=m8mUDa?jVnHnXzzOS5`eRt5Cd-MBfdUnAU3m!cGq9$yNk@9_6j~HeC6a_%quSc#z-^Z0*C5v}q(BYC^a#haLu;q~x=H z9Qb=YB5|*E@Xy#;4d&M%NO|Gkeb)$C^MbEoHk4Z%U+}%@G)6)ph-|0a_zFa+{qnO{ zz=Jmrhb8mH*|20z-VgSRq#n$9pw7nG2rofciXvp6++pWEP^aVU1~UFW8ZxT#9&mr9 z@gnqtG3tbz^|@^#sSmQ}AwT?>Ps@tru({Yeep>FUZVmlp1a$GObIVsq*rar8+dq7L zT?`{lkw5*@7vKGHs-uqo(1m6zBwRvnYn%>y1MGTN9`fB)_d5R97vV#k`vbC3sRa+d zgf}}?dtBfm>!MtPk@|ZW>x>FqbVxzqA}>^X#A5;%Kd(v&9}~Fxpbw7RMtwx!x`{4M zHWEahz)ueQ!ma+o>h8(t)o3PXQAG}FR7p??PQwWP?66AT_I1)-O!@TRAOa11-?vtY zK#LoMvs*8G=)2iY$Y3q}*oOqpA5hsIENiaF)ZvNn%{M-PT!G9S)UaoM0v5j`E##Jy z2O(Ac9)RmTAs)Q26U{~;2n*+z!IZ0Q^~;|J`SOh?KvWqvhkwQ9@RiIXVq287?S8q5 zS$-GVsp21!L&8`C=E{L5z~*;=uuJRNlb-p^_oHsxlVXP6TT3tY8RaVBuTol&=Hvoj zrtJTv@6$Ts=SY0RbAKQvYP}$)a^7^;_vi$Hh9)8)E5jGC6r4{;b5#IxzK1Dd0?ox} zaDL8CQGq6(eO_lxeSs#$na7^CKr=?}I}L%Rh?BLc{V`mrSPDfY^EN z4>&|o5-6-rX16tOpl~7tP^XHCY(>lfHlM&~2sWi`2y;mE^aB-^;5IgB^6f{P`Rg*+ zA*UAxIVop5i^p+%gb51wCmib5Gws`X=%FO>FVM;S4wVkG0N1F|X)4M~Os)a7=FRB4 z*n9@B0ZClhvsQ|yFu?UWnjr~Mzjy2Xf5t7rt>12NRZ5(WLHb5xB`URCN8+Uf?~H(2 z;#zdkHyMfir{(GnS8q1oWq1H5A)W5?$^Ni7BR@{|XLX_6Cn~upF_tOiYV;J{Iq+VB zHxTSW@DqZ!qab<`q=u2wO;)A&i@My*+P-|hO{{grKn4t_a6z$KO*|y!cbu_WqH|k< z4_No7_&vJzQ-ppz(*kMh8~Gpql_5tI^ko+~M6K+`{FPa-6M(p&mr?8v77^?BER0 z%V74Q)zl8o03lFO#sb1qWU!pj;~ZB6s4Y9cV3i$S*9D#G^qhWt>i4X+53yHxs)92x zAKhYjJ#-;qU4dR8>S=0reJpOuGSvhRHEF_enAf34o%t?`OU-9cUSht7YpuBjt&2?> ze?VXBIdG*QHse^J^$!Mvoffldr*RLfKuT8;d^iGXiE}W{c*IcpJ4uO|C5>I`XuPC= zY?1G8fgOKC^Zk82Q}8s=F%`o}NuH7NkNN(r){D_!bm4F=n;zN$?cHg!3Esq372C0e z;8g4DeE)RAMcpPQSdk=T*M0tfgTDW(%ltQl;VHctVxF`DD3&Ff&ERj#(&c zj|J&4k6CCXw%9avqTUe;rLZAAV$;+IaT^ls$wOc)Vjh`xIE+CN)N_5yim=N+r$s1F zoV|&@o~$DwL(q1&7NEEB!aBBk&F@5|gXj z1zdG2@oBO2F#5td9$(hkig*vI`a2q&PF|w1tmD~-!bU8X)#6~c!PN&;#WgKXRg~tO z-O-}wbj6HLT6Q8H^AW5qp2X)&)?E?jIOznWG#%YQO7m@KDsGCDl+maFkVBmq6kV!d zg90hNg=?+(N3EYjQx*p{_!q}oBuKvTs$+a#)zHwdIAgiR>zgPs+4(W;W$4{ILcSbw4_C*%J zoJk2;HUUo?Z0$y0|xkq&qqE0yI} z%WEnJb@1oItFv5l7l;LN&D)@7j}+y&Ra!^i4%P_ExWNCa%cj_XuWiTddcRogB3DSg zW82cUa{r)$7E-Kk<+CP__wN;TV}V$Ly2kZDhjV`*9eOArT3!we!3s4PJwV?Vp;G1O z)}o^26&Q`BvIo2AuE~Vl#&M2yyY9d(PRYu!Ku@KTFsHEl5%moBPpZ4_vu{JtMah*^ zbxazV9VS=CIx~dgQuASymzZ?T*P2_=y4d8lED$T14=lViW2uFea;2PjJlMGNa<*(V zmZOC>__}&)@l&p?uGaP1JU=k|+E3yR^}oeCcmRx{b%j4y{8jE7W#aga>ee3Q)>w6gzd$>Y zD^s_COjgJt&n6ZaPe4>XqEen|WBlr<7snIEGaE)U~-RN}Ax59nP07)U%C-x!3#KqX3= z=P6F7{5_`Eix;!lTt~5D6^fYmW%ai1U1-KKX;4)PwYbctq3}x)h_LzR-;_ z^;&;^rvaRJr$GlK>5qh%|YqCD?t%kZt;eoB|G zZ}4}K(`Wnt?;|!c&Q^LIb9+vlKT(dK;`UmtZ}ZP|%9=mx9yxc3FWK6?5xl@i#{by{ zxn@tOv8ybrwK^5LAm)r$;y-dEuTThv_8B%%^Iq?OYCR8%tzh*cb zy>H!exUoEPX|6|uPW3-8fVb5K=)+w@-nK`kY=If+MI3hByufeIG++bX58VA9)HzQ9=Ki)$eV5}YKfSnqs#Ms z)`Xq@%~~BvS#-n4KZL&${MG+~p)~;<_b%K52n>zVJXU^&&gpA`8_rhBDQ0hG&>v$> z^uXCo9HF}|148QMoNLsTtZ^GFR70IQyig}i>N(ZCUcgE1lV<;ciS&vEs-ufeDLk51 zBe11MRi&QK7jf(K!^Xq!Qqblw7oe%m^x(SGX60Ww;Q)dRMoc56i)w=X33g@Yfm9D>65Jt2J?8(b*lRVl{QpeQw$zg) zev8VDSiqguh(G&#pF^Kx6=}ZzMxev5Bh7Q|QA3J@qpZ@u`kjVRlci1to$t?Od^vLb zKM&ERP(JWHsBfDTmoZ=e00T*XSGs|L3wxDV?X0qx876r)VtY`@;ndF z}A3Y%u+o0x_1UDJGRIBbVD0f33{u6Eq;xBURTmELDHRuz~ zAd}P%EussDi}RDDJo=XZBk_ct6ssXb);T}mV7J!q_~Ed6zlr{T&+X4esXg!dU$K5T z;(t`*=EwITr(S|E&|hBc@_*3xt*nh(mOgic!%oq=A$8uT$qMxI#?@teI{tu>R(_#Z@&w$9CqWUTPR+$;7}h91%?mI8LV= z2z9Zajb*e&7(GxvJ2ec>iBqRCsq}yP&ZzZ79RaRC9JQXf)z-F0jOY39fFx-2l*OO; z+law(>?i(!$yQM=OTP0TZD8z5lumuv>|-(g=C(ycOjrYeGTlsv(s6sG;ea+F8S1mFy?CTjG%QDKSeLe>H4Wco@Z zuHJD;u~By=TAa3RPhp&$Q%!d%?iEEdb?gGL>^wEzPC(Qftr+T~dv|K!j4{~7Hppxw+kp2b68_T3!{YGoxVSl*gv z2JY4ppWuHt*N-=CesI2pb_~|sG8zARs;!YH`o+Jk71_SY&lu5O!N$je-{>TO# zr@--U*F$KE^Rvs*#o3QTY(zVsMYZn(15a}n;r6M4b@~*7x?adx-TGwI#+{t40Xa|OQe2@m6+a0C4tUm_o$QeN;xhu5cX_Do#;TtI;e56TFV#`WTpuQtB3hHEf+oa9a#~iQrEJhp_bs!Tl)M;LijRvX>OdLd0Ji z+_Y^DIVdU6yXZ5H8BLM&MgyHT#=uVirc95twT6)^6@o;UN>oE1$BrPoR2A_a+=*5}>;6v&uk$9mZxm?s)0?BE>3 z@S^e>9Y%Fb57(Cn?C9JkJ0BrPA}XY)xdswYl1QQtVL~{KIvO^m?P06N}m*T zmzYoD8l}&%cn{L299f2CcdcAh7RbuG7~}N&4BG8TXNihR?Q;R|SJan;lVSc;76{kb z)J82#Q5y~DVgS9qmtcw%bvD&NPO}AI>I_`OAcFMarp{&O!2~A}q*2=jDQ~4NCs@N) zE{Umh_1YjkTd7U)PZL9`{Ae~&Ore4=NV}k2(bk!UULy{6C>9X2Y1(pkW z*dJ(Ob?*UjxS>fBspd`Vp`L+qg!96zv6^B0jpdJh0~PeiwC@+V0AI@u@bs2;R7}KLq{bVDi|2%$i+FS6qKpfkzhJneUfH10Z@0lU)Wt^jdf) z@`)Z*`r_IUv)fk4nyj z)|&Itd9g{I6GW!A=|ns-X__2;JQ!$mAv$2ii>RK7lL*FC&qO*(>-%Eb%ZJ7W`gHmh z)uPw^c!F}jkUxk%r|}-j{W6DOUxJhmQ=1d)M^KDQDUzk*@LdCP?6|;Y&o0a$M)297 zaz{#2D`kA(PD5V3CfuPxoGVYh7D$xa0_EN0kST#Z^7K35Lvq>Q@?CP=)WEO?k?bri zI~VCjXE6LqM&)2H-J6WMzaK#am9qlXYu(80h&x=8Z_ff=*UIAA`1cpxy7MiVE^&IW zwlYh$o`eKGk0rs`Ea%+-{bV!hK><5E!@qL!Z;2jb2REU_(l={sv*gPdB7RhxP>gmS znov#+hBtG6hD=?US0KD{_Op4{SUu+ks@=ANap%H7T<}wiOZ)ci;bb`k{W?#!K8CYp z;ASzcW{U!coQVuo7UZh;-nxP-O zAKlSOiFkW48s3k-fRjq(lBIzjaANIS8VI-UiYn3nNib_ZIjujz0R)#3OaMZQ>gND% zA^4t5staUIOJ!{hC#T~l{Y^|Rh7b(mEz;j6cs@ZtN*=m8h7#(IQRzwp8g>sR>xW6x z2V#I2PH;IvIugVPf{zpIEZ5Wp`XWr|P+cHAn!8=axb~Q71WXm_l`+sFcqRtYEuOCP z6;Xc z9^)|ZaG0X_G0$rr&0Qr^HwW@@X5@iq+Z7m>(^9^ncG5Y!NbQ1w)Pp;h{)KpUrP6%i^=$fwVQ5f5zk z0xE&t`=b`C8)Y~rqt;@9MArf%oOiM&YEu}35l#li#sZ0yh0ASp;8bo`Hg54XZz?;I za3X<3-SLD-Aki#m9m;kjQ6$s5aMN6mrEn_e(shyxpktUM9!LZx2?jt8RcGqBE;X;g zpe1HolxxjwTo;@BFaj&#%V>xO5?#Wwo%B7j5>ac=};#Ep8P zMGRCmBB4bt`SeqP@~QviJCBcs7VQKi`lvJod{GZT{=~Z`_``CR`m(5)$+ZOg5nP8- z+JyxBe*$nXN}khrl&Gdh;RM0&}K78151L}h#%I4xYGGCCReu8N5uw3vHB#}{a z?@xhNT5BOc`zi2ndIiRb3)FwY7m!zi|6}d=Iq;^-^%3TXrI!0o2Rec=Bv`ZELD)_o ze$DyY{al+}*gbwSA=p};`Ls0#k!<=!lP2;^a_~EQ>w88j zq85#jVfvTShx&08j3+n&G5-fV!ND*^<)q`bTFy%kwi2JjR0`~}+?S33#+I;JbyMPn zQYfa;a)q2-ne}xEro2Ec0~27l6657gK-!N%`QWEz1(s+Wd?E?jw=F<43C0D8Eo)4l zQBhh}7D-dF(kg8ltb+-iNWdt7gH#;qzynqS02y`Qm(>hP+fK#)qiS*;P{FwX7!z|& zsQ4<~HH!`NIXap|h?)fiiLtoF1&Imlb`Po|#;P`af}O)_YaOO_Mw1A=gpPQT8a@gR zFwUhTCiXJ7jlA`okyap9+xA?!1TBraX!I%Q4O~cjzl#eIaIh=Fg)rx%qDuc zFh6NFS%o+BBuLJayoIg37Cj&HB0t?!nld2U-X%E`@ ze%85N*W(taE7~I?Mk(q7P8yG5JJ6ox2ocEvS*KU33G`faiCced!_;InMdSK6qrAkl zaIH0$qVHmr1`kxk(444u=6y8BwxIotC&#@rOy31tmEtH^6R8rwR<*J@I%&CDB6W}Y z-kCORk9ueN$Y514JcW)b(Q6!@QGrp(J`54P`IJiuHbcGWGY!}60B!SezeMzT6JTl< zJNGA;Mt*=$Z`9I4mNtnkYKK`zf{AitRj_~SuhA^d=j3k8nD#>qEFtLN7}ZMGYMNnX zbPwL{6rbC9gBv1Fqj*^`QI78i;(Dod`}3?3eS+X7B1+|&!C0@hCi6Vo(wV41$OdY#{HauwK6%O$ zLfVuCWkuGCnqZO1w7~)S_YvnTQ-~Qqx;nEJQe|L?^2yE@1P>Sw;lKQ^D)r>Z4fvEm zWim(SclboHh>c6o;2eUEv4{=IRn7!lw5Y-BD)zaEeN?_+NR5<;KvE#hfmMEg9fRB= zQ5*AEwD+G;Ja*dq&wj^Z)Y#P)0N$mFH@7~9^Xj@&&8V+Lr6Ml+F3b^t9Oi8Fs53KA zUTS`h@)DC`bgfA_da-$xK;9-$*B(Hiu1_$+WwN|pop9!&wGQjmPSm^gmHp(Yvhq*p}BJJcfr0^+3aAYOOBijKC$ZZdVJzkmdj^!Xjc*0@{JI(s?h=8V^;*r zMB)m396_H-#O1mipBzMb1*);yQk--aqc!GoU4`%LR5q`uWsGs3&Ti}z%~i`Snzo}h zdR&BZ6S-Ynd*W*_Ie?QMnuu&m*JE8oxV=a{coNBC8OvR;6g-k3pm!bC(lj~-!xf|ET=EZnXu#i6hh_H}U*IbMM-=NIx zl5)brU~tqbwm)IqfhuaNRF)y)+Mt#=h6A3A+thV7KV{q01ucv*e&KLXGUZP^hWg}n z^3{bwWF%R?D45l02CEf^pkXofcFZCwNjj9p(nW*zqs_SS>!5| z%Ej91s^CD~H~|$8!H!sd<>qU#{#MIV*J9z_D66hh%kY}(u>KatDQ}NFdL35UHn8YF zZxh{j+`U?0%%tDRUVERB%Ta?cUgkZ6lyZR3O0{=Y?6Gog2=;NS_19n8wxWG@{1@B$ zCUWjF2>&dv&*)J~RUP|!)WtIiqDbK78hVXGh>w;Nb zzQTh=H;TH~;4SSm3ss4zi)Lq1kRu<3HLPT}FGKDM?@-|F1PDmxCDB4;$E!VXsdLP~|*sK@KQ!kb&?4iFIaG`_R@oRkWrbcfj$*C;X3 zJF!IVc#Eb~V3ah7X+6fneM8LET&=JmX~%`p!4QvN3?d+7k#@4;Ys z8l&d550q6Ed%xSuRSyQw^Mp}(R#JsG9t>u+F2&G)Nvc3Gl)FScJ=q#hs?fx0_E7M@ zEUAJ7@wnv|hRIpH1cK~G_E^VDGYn}>L;7DNPRw$4=p2ATDkpv6J>Lpkx z#u61tuyCYaf`wsrf`yau1PhcVnV|D8c7jgn?}vN~c76q99}E^nHfqBy`s}}mfoCOH zIHJmdh0){nUHypV_|gxcE^M4-asFRnTBhfc>=|y<^YtJ zs9=LylR-|4&2o$cWzix4L2ny+xr|7VT^Z}*L3Y&y<3V<57+62Z&Li(W9&F(uvk~V} z%B{g%$^Rn{9}i}UO!@usU@$9)YEj9^IWZ=Ua;&H#Fdo%ut!3#a!Ir{pjrk;ahf_;v zKt<+>U`70rp; zVPKqMD>;pnff42lfphQV$N^Y`P7Dr)k-Ajb7hTG}h+V}z7Ec_sme&Nk3CsO`@Q5DK zblSBqiz_*@ z6b+G$7QUP;Ldc-bv28G@)_VS!k;>A?gD8??ZWsxfj=3a}nlTtj>G_@=pN( z0;| zfV^YAYGgLcK*}Yl0T~#HqO(mI9LGBd*ZPx0byg z4<eCz7KCkuC+S=SC18^hQMva>b`UzdT9n zn;*`th}sW*AKhR(Kkz8jlsjyasIZlmsa92b=;nyo{kSg_@eYFkPHp!35iSx{_4mYh zyGu^;hu#$r+RR-EF~U6#pA5|XM|@LtXiSW`-+=~|h9l-0rZ@$3y`Cf725}fTKNYt) z&X49a6rdtDvxf*rcd=OiS8NRaBVLSBNhFtDNNylQ!$9Fh%1*RG4C% z^kVZeya%v;Fo39TKT;M2L&2%tSryyzmPi{O3}RRFLGV=d!8jPiC@I=OrkEK9F%RG* zK@+_wQ7?h+j(_lipYWhla(_0KvZ&C%NIn=0W#MSf7xB<6x{^f)J_L&bP2ECmpQFh< zZKiaFLM@T3sC6hb$0@#PFgKHhHQ^Pt9Qft&giwauzarBmXEh6TYC!4cY)Y`2<%WLm zL_P?(nVze+I-Jb*>hffMs2WVWO9AkHGmoE9E5ojWP$4#Za%C_UnGVMf%KOAK&bTPd z$D%ObUKEbmho_Pbuq%`+18&Ogw9Q@?-j$^_sI0Y@h3%1LVSCHa4trUUm$#`$3F$B5 zkmXe`>8&(Jl3W@L2jr)1Ld{iL^r1CkRqU)5t0sRw|W**8BtFXC3{#+6Ywr)(UZi2kyj*pYRJ5G@W=!?qdc@uUi1&|5n0nA)UiR3 z+Pbbo2s!+h$)k;sBw^!&$Y8RzQ>aiLdACTHdpm{Z%hkOzumgTtiws%aIaDDhv_pP{ zyd?lP66{=#M4yGzTfoWEIg}yZv-iZ0#71NU3(lL~0$$E8A&(IRqG!n=T|&9AAnogj zbk7qi3^$i>_1h-XGx7Lc=qhXSGTkzJ3Z4?4(E-Mi{Q3PY6%CoRDGhAR4dK`|C z+(C1hb+~KjIVXtkz%`+ue7bumvV#V^|G=LM{CbD7wk2}S!_5jsf!bSOmGlUmHk0TG z5cBczu-T|h|4?RKFO=gcPL$~EM;~WaKU{%sWRxI+PtXlA5KS#QTVg3rh5}HTNSsxR zIRe|^*(a0Jj#|YUw?Ww*4HdX4m#Usgl+ynOcwi*k3HRRU#dBGm$Va`fsyGi6)S?VDELvnRDoi$o{s?suY z-ELizqXvYs5&HeR0Vi@!8ZjI;$P zzDp1XspVFO9`DaE4e>NRAFsJkO^cTejt6&1JIz6RX*au_AT1a+_$Pp#QiA(9R*dls zxAF&uhBk5;Kq3uEzd%$yWaY%1e-j7yzit9m2}%x42z{-~sT%@^q-T%EkWDWM^==S~ zlIgRDLyw<$glg=UK;o38*1;P>cN;F{T*WTl2I1oxOZK1(%4h*>s*jOs(^$X|nV2ay-Ju6`J{J_pSapX3j*;ILo)raA^t&r*c z!?|+xb;xj8eS0V@GHm}G^2Xi{esWT-$?Z@evaO@HhaPgv)ekpHk$2u5ifjY};!Uj1 z^6Mq#YxG!cimEtP`&!nyUFYK#K}@Ia;-a91(IIlI_FT4RcgKWU zE^5cxZU!wIuMs;|n;4FFx{Eirt~?spCBk=b>m}%Dw8F^f5f@~NkrOWLqqJQf!!XE7 z-2-KtdqP=7)E|rlbrvSD*iDhiNQ@||$qu#8+DJ0!Dobc37v2+Ukva`swEOKtwiEix zhwcfLi)r%1dqV9!s_9|7DOn_Gvemtzyr#6aipnUHPyG>di7JBE;jL5G$=UaUGD_vj zdqYE08Bi_yt9Y^@o-^_@HZ_t-+d`qHd{Z%q;~Jslp@uI8(=S0)+~bwKwuKIQ7UJc^ z5;At2E#mMjkS*>Dy=K>{*pr!vS3+&-{hHH1qWo&PPWWfk+rBWb`;WhId4lM(#xTjaW#DC zKga`5hH|y+7WTqY@-ga{HKNXu^Avk8%48Ux)U*0ZyX_YU75i2j2PuRG?_j&91GADjhYr<0?|E6xk*3Z5u!(wa=)Z z>t7AE@=)#+gGpJmqr#_^cOxC9SEH8;W2mK`;xaG_SOB z-wC}gY>Me|G&HMb*6yRBZ=FbszVkx}TgfnF?vMvI1OGuK722Kx*@V*6Y6347 z$k_xy85u~Gs8Ta_em3mU4j0rTja49x_BLt!r5Hwn^lXFXoX!dTvj2ZLtisOkVjay6w-IvOkD<--z>)Bca>=#DO=WhEthKl97^!1tPiUc# z`&UAtUHyJIV_jvqLLPoU>|eJ!JVE@p?o@cN9C^GI3@6&A0~N5>k=!4eNGbMINfOs3=5- zFhrr5?B;gSBpDZl+OT6^cF1VKImt1dnTp?zMzPMBP0>r+&1w}y4DpFE8wR3=-9$Nv zKUuu#`f&9a{dqvt?xJJmoCx&-wZ#EpF`=x7B^Gew+C43bP`0LZc4WxgLZWbPDZAc6Ebs{Yx z%sPV+mRj04yg*Jkh(nGJ*1~kNw{f^a?2tK2V4v}1fC@^kE_cgqy|WP5ni0+bf>+%{ z9TdnemtBoR>`wR2LRPknu*cA_JS0T4P$GSjGUu$%M6s4u9OD0)K3O==i&figtbgCe z`rS6xe@m=~1IzCVpVVTwpXx1d7nc$0`LI9=eyu}=JX71Mi(DNH7bW$;_YsV&-X-L- z!Ekonm-uvAK5ApgznnOx8QakSjNbxCqv~zDte^*+M?f*eDDvOT5pIL_MIiqq+~UYT zob%6S2OIfSniL!PiP{wr?-c_PV#rU)LLvXXthLXI2l8L89;1JZN^`N?6bc7xC{jQS zps0+H)r8Fi8^;ixx+uf|8}Ho-Z3$*ZPH0JX;A;T(M(~`gf#|nB0lWX3gu{ugIkOlL zLwKduR&%ED_)F%4Z2aE=5e~N$or&+qMZ==Hr&-uUA|e>VE3#p{QD&D1PiBVY zjxP#)^79T5rz=M#$c$#;z6~M`SRjJSok&uk@E=~H{O|%}cRF^h%jMxhgoWn=>5m}s zsxoD+F91||pbQpz;(1NM*(4w~$Wy(6(F*^WrmP z!bl?e$;IGFi7kLkg2+G0-s9+2w#A4UQ>QHI40Xr1#pcH%0FY08xamtE>^WPEW`kyQ zRyWr!HjHFLbl0=;n!bV7*skZJ?89K^*skX!yny~Xs=4dA1Lo6RBiX4LhUpooaOlKI zJ-dcQQlq`=S*L_z?|Rm|$!pt$o79m^AdlRH=^>pMm>5tJDh)_bRG3L0#u;AhJ+c=Mt!t|-)i4r29+kGEf{fUv@P^xEh;v}OI z-4ni%olC+qHK!);FM+&su{=={?jR<~ywY%U&pM10m7JF5(Z*ZlsM2te_(EP&8XhY8 z$U~*!{{3IUWMb&EXcwb0`66N%2i$^ECSODhC&(l%nJSuS1m&)w1lMq+0@nldZI-j! zhF|t@krXRA->pE!%;vJXUHE`qyNk7Jz!FefTo!)Gu06xr4KCJNiRIxxCaCO78vLsN zK@GaijBti^UuAe)1MO%wyN6piapsFW@NzSs^+@;dbCGS#cizynonkQZpFP8$+IyLg z^a@vNaHbXa1y`ueQ=3J25Cx22$O2YmYYEBy0ECNdEn!SQu!KxoOPKIyfz8`ly<-t5`lqwbM)4-NTT2nT`(GKVL#h#3!1IQcALv~-ROp!PDi&^ zb)~9t(SoKYF)BkFwU$+GgEm@y6E4ooUhJ>d;i8LK{2$g9Q{vKX1^Rjp(G>&2<6q!3 zZk=ie*nkQ%L267u24hpA3iLfnfo@HkKs^OoN4I(k^hX5a3iS8VGd3I+AdRu%=1sjM zy>3*pF2VDYzCyvaficZVQn8#jHk{?T3^RzH6i&mSz?1=U6Kb2P7{ERp`Uz|KRMD4U zD-dMLNAl3v@TS(ZQi*{a%1D)zW}IJvbp#Kw^?Z6iwi7&J-7_v+nB=+y)!J`2Fk7Im zo)HB*>fA8pbF;z?le*Y~s$HNP{CpGaOk*{dLV=nrcU}r%vy5ga9(pk3vT!Rg!?qs} zlUpu>#`HMU=}MbWzLTd=gAhO%nQR&XK~~L2)owchz~^!eA=|zrp0SS355IvdnKT?T ziMp@Dzp*Jr$fKlVdwJmhQ1>SAQ59L+c;DN%m+T!#NCLfY3E4;>fv^*HAwpOM*MKM} zTTom^mVlx%iUJB8a6wQ9of$wFm+QhPxH5_g>bQ*}xQsfY2FLAnT>j5fx4VOWzW?`| zk?-gC^)I<~pQ^fbZ}+WJ=hQi;PK_!qF)J?hUa7SV#80iY$InX@@=rhLXdm*I*VNKQ zI}LBTk5`~SDn~xu@fgc>*Gyau8ld---Oa4z`sK+ia68sA&+Q^Dw5gMtbgt`IhCF*d zS)%<}o+h`@T)|5;6^a=BUL$fFZz6F#fJ0(&Mk0=JrZG92OCOZ+&NwA|1)mXN+PAUh zso75}Xt)QVig8*3!t#-4%S6WM+51tRriJCAp1Iun8xO?Jmz* zSp>rqN~m2ofW5#Hb%QsePfF;YGH(QDxf>#Do`h}$XL(9?j=;79o8|{Sjyf!>8ZLWg zb<2|nZf}>PHzgENTXBuPB;N|NW1`Y~ioNKkc2r?@WYb8GfwgDKZoc&MNl~yc>_957@t*$Cp0(Nbp;iTdvyUeL|YodG9xK9`jzVgD%!S0sc@Y z?>*tY2ve)mo&;Ji+nC%b-#rPY0ZM?80*v6qr@%DQp-}}5z&xS*i)8yVI^sjpY_SUB z(+U-s?hWW|wcYYDY9svdl*@{X9phkevn&*jD1@p;8FK{tkY^PXO3Uq(JoW3`G zs=4eh-g~l>giu#q^|OR<^s3S#dHSTXQrR>i9~%ID(J4code!Sor-@OkL@9Pbuk-aVi*sxHMj8u z5SAs$jjwr&JT#4f1zgS|XbslNkfK9mkrxo|EV@tcHUR|p-eMt zD&>}XUygVVdB>Pg>prC8Wrs{`&@yXNx@T>pw@~)IgC4L~wDgh!`TQMklk7jUtWajX zi+O!;8qRj{teIz-?_sEYSwio@SiPGWr@n`Ab`>PIk7OP*2MqHS%2s5`44%Ea#090; zS*Z9e^X?z!E7v};g!Xc!&QeQL$6B2VE)|JRweWrKw>q3F)aY7Q)BS(DQ@K8Z7MPK_ z(5Ymu$5YgKJznLH`%@4(=uf6fT$eL3977ZRsV}Q1b^odURL4qgHSKQePq!n}S*gq4 zKJpgn6LtCWBX4<56EZRKS=#?SR(E3INk_cHwH^N_I?V1?beOvOqFyqf)%)@<(fjwa z&^XN+W9fekgOenTL5q-Qr>Zd}$4*8L`b-VTAH3HKW{5sB6*cV7Gb_n^sWAlaRg*xs zTE)`Fdp~2NTw#(BV=3&W#8?b7h2*^jY}suvSSu1vXdE-w&hmAvdL6eh&Pws$Q&GV< zJH>z1LX_!k{5L~ed!Mh`b0%t8Lh5{6o-t$XSHAMTHhya*eexS-u_cSe-b2WiEEd}i zH_v((*J&Fb#_>GDe@K(&YxF1wh8vmtBy;~IyEWhBpz>H#66y%B;T$#ldt2?)Z~<{| z>8bkyxfkOK?H!e^9NPxSImjNIUH*l|-J%ciwnxL+GPB;7A=kOn z@+4S*c+pL-!1L(UPChKV{_C*P1=2F!nQN}_`_}7@`6V`6&sZ#29M zK4$W`^bPy4tF>An(B})ogK#@L=_Yr3*ynL!ZXDg2#+lh^c#O0=q`tSWBBvPD zj2Vex`(kU@*6xs7d;3n%S`(x8YpAbdZ{g$AmGb1=Z#wk_m+vFb_xEl7WdrwvWgp1g zHJ#GMGsNpicBhSG_q{d1eChbM_YtXbVL9!pP9;&ShF20m;}BmRyjB$B-!#P6BvlJx z-3>}=7i_4JUV^10bD?sZC8dxEZh=<5m3gaZ>{@aTCW^aRIrHI8ZrMH5m#MvJ z*}e|3Jaav+aYK{u5C{l1tJhTlW9zQ^VZLGs?&_|T{&}*5`u?q~e<#mgHL&T@yTg1@ z*v^%y7hws9`+l%%PfK-!FXeA}{pLf3M%UV&U1jHATqW@B$R1x=Xg=KFd(7_e;f)Tr zd|#CIL33yG{ppsHL3h;>8IC(q&HgUWldhI@O~V*I4F%9eaAMy!hSOc%ehV+DXuvmu z-i`7n#_i>*w(%mbHI$Df`W}0&<8@6sjq%lL*T|SLK40HwP(zzfCBaMVhffk-a1T#$ zmPQqewuq2gva~|N#e@`T($eIQV|=9zN+o_NbL*k3PWvk>DL5W5{rn4N+qBE>MCoFd z{*9#y_QN2Yb|?j>622#)vA*S9ynKqw`A`fMp2nfxg5MC58(MG(92nESx0$bw_3g>j z$J(uc5Wm2?W%IH?)cm2zcSuj4I&1EkGsm5C$ywcG=lvZ!$$+!+j?*8_ z-DZcg?=>@g7dh_?V@{JTqt3|-OZhpz68-Bc@n7COE(-x1?rONp$+f;r$8WCg3`bY#IpLCvE^VjlIfCGNf} zSu=gbj+!9$NU+4+9b+r<%-u76yK`mLZJn~@nnk{p2ZQR_HP!IvJp9{kC0alp?o!l2 zcC7Wg&Ai3FJE5-TD+}YzEX7+Jj{jpn5MdUh2>tRLBz7*gN=1{vm*a@~2n#4}q*l21 zM~n88P?}od{yy8l)-osnC0qrRqJ;jgKd^zfm}kY1c!j4{xX#Tyt(eLi87}4Hpt)Z_ z9!TQ9m>5Q(T(Z>H8N_&N1x><{Dfl*F zqr85pZ>fjN>a~e%=@n?(GTX__%Y6Mczxl_@eDKk{NWQt;7ef-fLM215z?Zp5nyuu9 zD}10JyP18Z?=M*{?vkLxY5do*7AXSTwa)jZ_VfN{|Fcg}PGtbGAKI+V`>zT(%ziic z5KMQ|h61m-_eNh-hlBFRH~U8G?wIu3=)2I-R7$0Rc2^`KZ)^m8?dUF}?ux{*y)Wo% zH&}nOgx+$smsNi)^Em7UHd_x_dJBlGs)u}ndX8S8n+c#OWUcgBN{gmGF)XW-d3|EV z>oUS_S+gS&1b5g2?6}Ntv%RCp%+VN0sw?zOQL}Pqq@QL+Z}r{Z4ok$8G3bkXd?{lP zsI0)zwR=sE?v~s1K6A{yzMBwW6Mb%m#XG)cht=F6^bNZm=P5c$Sa>F|fWm5uj^1Id zubG|no1{h;bhLp@A?huX6dk#;SbG7pEHb)`rxqDebcv_vXcZ718NbWA*&4D}E#2DTz3+y5DPbqjI;m7jq zE?Lf zL%urjvF{?Ri#XvEkVVaOxwg1dTy}o~S{OWC4ib1i^%>eq?AXX%tr0g*A3t3xOFG3J zPjMu#-8Qm^Ji{V@f8rGVjsq`* zC+g6^JsN=Q8O-Y6h!+nz>Qxk2+oIM_RXHx&PPG z2u1L*A*fYB+q(I(`-!Y0ioJ@5#~MHtuNsy3>C% z%>R#zy2vMFa$kRjEI2#X%Y3$nf1n|cI>N`t@MM86L7i;>(C0MI=s;QV!md@_epYF1iC`oQ zwYf^gDgKdm=Pi735m|h?zhevE8U&n2nP@6D54z}5AUl^1rnX2JhPMood6NZqo5R zkM;^YfYEaeAH#5sVWPQPQ4^FDMlDd%S-1<(6qGrNd03}{LORG^66PyEa73tq; zP=_Sz&hYopek0GF;U5U&b8eHr7HDNww3}Sgrua*B46yNO{uq)5B$1W4PJ2T6%i20F$Bnz;67LF}XnR$zccrYc>OVNm zf1WnPtT@Y${iCTQ(`^HPO}15fq2H_j+d^F4Pa-_S$LEas=E{rxUnU%UHszIjWZNbF z2jtMD^O3J5+{!D>PUucDO#Xf>L1=7iYW3p z>9^LO(mg50RtMQ`=?|qPwA*6}Wnv1IXK$H^-h#zeu(;#ZH{t)-k6wiWd#4)Y*)=D- z41BPABGDO0CACPd7t3`Qr{8)N3zCcEI5pFoSekT>CAq>mmL^*`$KI$<0YMs$bLPy4 zN0I9xHo%2-iB)ono`VCCp_9WU7RgbpN-dHb%*L%<1>qXY^)YabRU)d}7>_c?7`c6e zzYBKf+xv86Ae`qjo{0<^rhIlNi-M=%5`MJx=>Hj&$kPT>Jwi&&$R!+-q|}UoghN?M z?wYYzHs9c%?unxXZ8URDPLRr^@J4@BE0(@D`g>N6Vc|F(g$}U9%!w&DjPR5cJddzR zZokn#P1|p#-Q+(_hu`1yjsDI^R&NB|4inQthpi;z7XL7p1u3vF# z_2-@bFa8^z`#(;t1XHVV(l|Zzfmv~{|K`Me>Vx}0=Z-!l7|LXID=4u10Z?EA@D7Ut zXFcG@atnF(0T5q<_#Q-Zs?2`SU#1O}1CKZnDz@GawcLaLsACJ1y=Ph5-DZgPVJWsM z2+8(2p*VDYr#%F2xHqw<&<~;1KDUp@Wz>;^xPv=2cefN3h_h$e+nSN%mp&H-$3GNAclCl`e+a&o@2(CNTc3!F=Fj^HqqMw7u|DBD7z zyaQQ@ou{$FW%O(Q!pZ`E+41Q(l9tj*1KI=<&h3O$rDzjbO3g+30$KZ-zdWEs#*;=LVGgdMYwV6 z=3GP(J7oFWZORXMWY-tqVS^>>OVH0fRvdx-PX#@)>`Q+MY$)5l1VJG}9u%o==Z-tV&9KyDfPuDR0Pq{tIWQg1<7TfO5)^uPpL0X;!B1?9Jd0|-GD1n zMAzT-ARG9Sd6xd-6P{Z73#z|U>WfLdpXUA$d7!@~Y|=2s$cXlVjsf=C7H2Dti=8CJ zMQZcUg-)s}7dT&+%i0I3v=d~|e2h7M%uJA_Zk<#~Z}?R)uCUSM)1Bw5G-K@`SumYtD;GYCB?cs*gh^vn;8 z_pHGaYGc^oX-?#Bkel-Z13V}3u4)_44sPT=Z+@H~I6>F0lpckF7?RVhlD%#l{p)eFYN@OWq?-?y1#> zJGh@^p|wl&s^9c-%hq&|J3U8C2-&zLD{qvoMEZ<^eI=&4hNKwA64bb?R)jd$G z4^J2{Tf%fz;U2q=@sK7Ho=vxd*_~mTGNU~Lg#~yFh?5=Vq)~ykfHZ~*CWpw@*XSSuwH1I3jS z_!HEn2(XT@Ckc=S*Q|30d$BZ&|98oviGlJ!545cHW2FEdFMA%LqSF3^7s_5#s{D|- zLr9)>u;T1bQgAZiKT~i6;nxyADNveA^PRO#)>`NvvpZ{Y+DU=g0X0h;!TV)-ko_#L zRj@V}aFl#_Qot7&i+fwasxE`!C;PM%EY1To&Df;CL!~YU?xx#D{yKzef?po6A9q%1 ze!M(TZzMpI?&p_GC0^~>zlBN z^^NT{ms}TUu7a%&B$zVwBF>C~a8y0J*U6YKI+Q>I#I3H)g^vYZb*7KyJO3lz))h$_ zYy?2pAIL;^fVxR|9=vorS8t^xOl9*rlcn`jc{G%{#;#~2skKa)zi1C`qrqiB_EUMV zgiUJj6I#nTr=X?OW_8fz@@PA$%da9r#p zM_A;XjpITm`Z8$n78&_Wz@JA;g0V?sZ%*uVt9>bpo(U9ID*IT96w{S#*OPk29r#aI z_Ay0@lo-=j%VW=g6giY={aA^L)ePk{q}XX5Zj&)XviAjg<{JEohmeXN27k+d+IXUOa!sA-Q#5;M{<+Dh%iS4pNr9mz5M;0&Qo8U&@{Z zDRRM`b^?XeL!j4;9w~S}=r!XObNaJ^yV|)fQKWd+FO)yA8EPwxS}P9+78%E%vLJ-| zH0f~EUnS{>(rTsY50MJpKrBY{T9H9L=h2YxNu#{n4AhRP>> zyTlzYK!38hjokFYq0+A(@*BhSP^XbhtCgc42a35J-fS!fS+xp$5Bi!qNU9J+NG7EP+qr70yLPLE^A2gw-W~4itqZjh{YXqIPw^L; z&!q*&+O>lc$_fTr?09=18@^MBo0R_0+h0Rs{|H$rCFoSVNKhbqwEZO>`k%ub!|@Ed zj-7&9N(p+Ys>AH05|nmYwX@`pm7r&#;>d&&^fa6&l%O4XTG7lV|HRX}OL_VY9x0^+ zoyB`=Zm!n^8UB%pVcah1*}>r8e299BofPsGIUmPyq1r)vf%6NTV-~1rc7Qrqe1RXgldm0{zAD=5DsGLJA_rTEhkv6&6d}5f|D!DD6Ed2gu-f^wW~_O z*9dDkkKQli!7}2%& zrDywK49OW*a(Vk;2Of53*(6Yu&le4QrzAN$dj>q%0JdL?>2G?wQf(FIqew5X&fXi;Bc0f{)JMdi#^zm}y* zEvl2nZpUmCK#O|4J^>V+(xTqY29D99eh!?7HFkujYDW{DPAe%b>J&Dvx#{HsEov9G zZWt%as?ouYUAf_Gi_-?GS?nyt`6B0uI4*Qj>AS$W8Rr-a8UP%L{rIkuH%14$AQVn! zV{jlA35{+H4jMTf^+4->JTX6+fc$79L2X&nk*n2@!jZI|HG(ij>sgF4q77o{J1pHT zZ#II~zm@bc!AYJ$Yt zTvPEVI$~G-YC2d&>JD@AxxxB>pVX~cYnvigpoqL86=f_7TaW-C>b*&QsqGHN-waCsWoKj^qvzj!c7xP!DZZ?I?=1dAOD zK*!diG}ueVFlRYvc&IgVZM`74w+N!QGWK`v)-%}lIVK!}n#986rAEoovhCV)&)DX>;_?gwI5=lIVoO)XWmR|`72&}inU*aE5O>zm`8PFinU*d z_UxPjrdazF7T?J1Bx_$xK>NUtSv&Q!N!Cu$BEi~~kD0~VS2NdQ?Is>6#oCwhX;Oal zSD_YI`%Kv`!Hxl{LtC5bK;53Hq~6!xJSL`4`e|Js5e5 zV&vMt1{0V5I?s8)ZEzRVqquAcwz}JX}$-f()wBE=Iyua3UV1 zU8#JwAy}F_2DP=(Z0QszciWw$NyQDp*@2ox|bs-+a#_d6wbcx`{FdKuvZ9v)CIT?Q<2W|*(u5}eq{^$xz6 zjz0eDjWA}XKL>Z(<@D0vzptJS{`cx>n`MlJU=h<~)}z7K|2uKwd&{%v&c}mTCto8+ zpA254=M9u|p9+rBm%&ZvOMhGrJryi*tT}^LBW)Z)v;_AC^B|Tf?;`52_1l}|dsK8# zan{8ed6*61p2k>&8al8SgU;3_+4vRU*An^*Mwc#7Sy^USjC}K$W9yyNT$|8b&yQ>4 zEOB9D>rcc5qkFgRaQ|PZ73=#VvT;JR&}?@!IM$Iqm;LA{dgNAXvhH@3ql;mnsYPBg z!h+_cN(zKbbr5FoC#u9X9#xEm=&gGHv(!b7-yl(Y-s<&gATnI!e8vctPW~;AZU=r9 zo52~Rz5HaJo`eSM6`TYZ&ymsF>!=OG6OcG@&nDi$ZBXXM;IW69ZeuNyw#j-Yl-Zmo zq0JWOA5pT{$=S#v=V6>LbUuaS0w)uYy@{4!`EB zU}4K9WNAG($)-q>-YmVBkY-@54@>__ zcqtBAU&1eNma&;o&F1s*6*9IE4lU<`2>whNi=^Uf3?A38jS*}z&N=_}Hkt8ta7)9b z%sx>yorUZ{DX2_C)OcE(&OgKHys}8CJ?JACX)+#5m2M-v!aVuEf*?m3wbSLXt7Ewm%n8-2jptv^302Cua|-``0{-b9X$RI|kz(V9!XD-%PpHb_@N|ZX zB4t-d|S5ssD%___=5Cf4KC4afhnA056Nwv_k7LITY_2Z_EHSES_jKDY*QJ7sHq3k#Co z5A2LONiik2Q|Se{ovVHzw=dUA(C<@n`z|&>1#`mtfxdPLx&2+4`@8&tsU!tFf^sl) z8<(>&!|19SGiIVpX|X9{J4xI&=ML0paZ*>j*f|GB?DT%!F#4MxvyJUw@K%1bEb8L5o+)`fOxTMol*E}eg|IhENt{`Kk-EB2c_0gS zv$hlb3MJVq2#2v!0q&B$S}v;#^~`1LC9Q$ETQM)l_Gy z;1t5_6kJExJ_UCZQm?6v;lyL|Ch_|# zuHOwKRQ8!E_#xo|iT4WqL3`6Y&?|)1+HcDDeL^uL(Z2Wv-;_~Sa&h0#ADP)NbT^V$ z`-M7Zy~%beb^cZc!ZOx*`bp!&V6(Zaf2daok*ClL;M(&m^7wbAhHm>0dHny63EI@A zht5gp)t8?ef@g4@JUc6Nk+TGJx5+1!%S*yCYj&ta-+Pvf3KYd<7l7kcaJOdJ94Lx7 zI)GneH3^mNn?5M@=)=#JPf*WM3f2rCtvR8HKCq|s3l_y;#@;pu14QH5axI{4>t(Ik z>w!t@o66*+ztqptxElkYCgQB&dO37oeiQcVDj9Cx(;RAuV+N~9s7>u|jU?4wyVh81 ztSXh>U4r4TVPcvy+|e?heT^*kR{Vc}|6@Ne7+--m58kRY;F|LiBF#MuiMNCNcw0OE-0=)?ovB*DhiPFG1k$%iC;Rb&|a zW0YUyP|GiJl;s!s`o>Uxq3ymwN{AS_KaRVx|Cx72bFcFWyPg-hyAF z{XW^TDO8xNa-)jkA4hinK6!0Z=p?K15mp|U%gW|}&7n+vf~vho`CxY1$M&pqTRS=q zJm|F9I{mjbno;8rYUHaLkEk}nn4)yrC!22z<@Y`&yH;hhd8?W&kNn^e{%bJwS`GZ5 z8W@h6c;utEg(h`V4J=XLeyBrJg_C~QJQdU2O(Qf}(Yaw21iOn`m z4l`?fd14_RW)g{oc(0CC3-R>43TqG?36qDl5>J1(+8PA&pe{@-#cQ3Jx7VzBI`nt| zwn>bCp`32jm2 zCN$$vVyE)cUcniWy_u(ViK)AW|v6Z>wncD~Smd*j&f+qu7D=8)%Lg~{i{g$N@2`eGfq;u4_pjuerw999$ zp>r#h?ROHN>iJC6BDc{LyaJPx^wlZ&DPc$Rs-vM9IePcwv~+cn9{xr@e(NMmtdn@t z?sy|&vrUrKGkg*8q=y?Z<)4xsW=y!9Ova0r5mr%tuq+i}RECWSu(4_D3`&R;i!IbSo-DUV-=CPIx}p~x7MFNds}{v>yGIay^DunwmJwM0@%bEKMr>*#R(dpbiTYhZR7{&TqK3^7`bw0UTLBM&VEM zV?yD78&8t~wa;ebn)_MgLE)dxn_~lJ)w*#B${h1$#`V$8S|wJXga@^#VV^t?JsjgW zKU&5az*>DajzfVn;)F_TKb?>ZDYQW>CHKyF0C&;`ldC>Vh)xYw&(be(mYL5EeIg;5 zdL~5?Z4}`sLXpOjaA~eupfr}b+`lO^sL9nO;pT>(tUO*vb_Qr8lloE%))FfFfGQ=a zWDZZ2u2H49N}IrIUm_eK!#altdbm@m#oSkeFK70V4V@7a;#7VE#qz%fzt5a5Pj(KM zYA?vq&fy(MZY>SprM+N|EeluZfJ-XEF(g|m!kv-qw~}uv!gpl7z;;>{XRY$d;dyxz zCAhM-S-NcUXPHa8gzNmSxr$fz{S|qoxp8zj+b%2a_W%28g8yL-aHVFk#mB~nzq9Ou zZ%hdH(H+f@&70-GtPs`!P6{`{u&{a(XuMSpBXQVHW$BbJ^COM}(DR=!Qyy?fv}Rd4 z86-cr%4R!J=KZN8qOFz#$iWIK=T7 zv=Nr-Zs_80o275_YG;9gXvtN|=8uR)n-_`)b<4uO;P)(CK*DYUVW-(iKMF1* zblc^EW#Oy)DLdXG-p`+b>}fdB6kJZYj%_HonQ(Io9wr>Anf)#Y@#r(`zi@3|NEW{n zahr{6!YAocAmR6q4Y%-}gvTD2^{^%)Ej(n`TSIDHpY*v2ysJsBxd|N__Dd%FrQ&Ar zu32*6!e~T4)XiG(dY}Lr6Sa&_KiE+ga}8`G=2zA_KK+AkYQ?L5QzuK3dl5y}l2^Ss zXsN<>n}6OIzOp@*^QkBbnR42n!aq`mL3FEu=h)H{IwxZ(nEU?}{+-^!ap_NZw-@8R z9Q%RXR*DyjE~vQAa8ygVarOg1Z(ong?BC&{lpCjuIphc_H%`hv=&5`LV2VQ$4#G>(cJ0PrBUGI1+CHfW)TYSQrIAsy8?$6S=1%rTPZ zH)@oJ5>gywodXa0YO*in^$%LB!d*W3v^89tqw-QK#b?S}_hFQ{LtJLqcdp_oYP*M4 zG?wue4%&$n-N=$MxFS~@MaWrkBB%o4CPKv}#}K|uIFht6_7LD%xGd9}w-Vk#I6q%OwriI}vgIbIRZq?eMYHdliXW<7_dz|_|kgD13 zPpazQQVm+z)~*TF-bq#ayQ=kx)u8lzC_Go&W&Zx5FoMyNGyi&_#NjAo4Gc23Fygqr zqRb@^l?58i!TZABYew_9GtZNq&xJQ0m)*Ez)brtpG`{E*#6`S#HRs z34b+`a*ip%Lrk`uV-QR{5tlIfO8B1k2rI5k?A^Lo2irbvCU&w=N7tGj*fxGlnzO__ z@uToU!*M$L>J^H4cI?Er4$~HTt38D5)X4Hr`To;zVT*Ef>A-?y1PSWEFplg(9_E*I zND`7ThKDj%oX9L|7@?vqF^qi2)8sJ1Nh0ogh>6=Um>32Zq66jNi5wL;=P)8`Tf+@7 z1IRnA;d-X=qv0y;Jvr%U*w?ohHMJpI@T+E`x-}{cC1JJzW>V6(meb!tNR_{}oZgAs zWp0<9Xd+O)BF+G zg7?d|VB{ia>mZwLiB}#TQ5lwoP^3g}Zj$G2DU8ca0P^)-c(asjD)c%gm)WqS?`S9z z(N{IeoK1ys$I31?MB}KxurQ*(&{aNprZBD#?k3k>h;)6EWN${gs++}kpMtvNkflbR zQ774tU|Y(b=D~f1{j@vQL?gx81WTISJ~HxSY0^>My(=PganX_%O-vvgB0HUmBBohE zCLHJp=$lF*qFWpN>Mq53kK)y*#7VWfFM~ZdDNZUHVpOhFkO`${cDo{|)kY(Vn1&!L zA!|~SOt@>4az>=wwUwP&bFtMIpyo8GG3kYjpJ+_na__iEM0;Ld z8yE5QeV_gR1oC1|;M{K$s$diRYH75Ed4vPdn#Ex6BMeBl@sUz3S56-v@ddoB zJC<6R7u_ffrC@tZ;nL!A!}!RGesyerJa1P5$Lh3y;lzU16W+u2Rq0m3M^Z2fWp0{H zH>XXA9P+r*z_)bU)?esSouG%irbkv9a!aR3NS>b+IX;`yFqp(5S@T(OH@T@Ynr`l& z9hqTwtmzDy9gb6laHXCXX~a}#=e)>ha0cx>BnxHCd664Z>=43UX6Hw|(6}6Us#~#kwX8lL<>e(xeW;yk9zH*EQGxb= z)TafD3TmpmwK0QZ6o-l%RM&9f0-YhWSIuXyj&!lNbmq(Ar29m?rrr2I_LCUoF}l+n z2Vt~aC2Ic}dj>8_nN2{H6h_ZSxt%JIl-Yzj1^Y87O_@!|J?sHy!)(%zU0UsqXy=6K z$7T~MDHD#>oRTEWCNvBu%qDNk11lr`ZdA5`Fle&@nS9DeNo+dP3Fpc@g5)sIZ&Y)C z$85_wf+b>%8j){VN9@Wvg5URtRguEVZ&6(vPC6Tkvz+${PoNIvJVGT2s;Clo5S}GN zR!7PkI51fDk8F6$S|OxCint#Aoy#hl5ucA{1#?vSd+415YV z;V?Q??LC!ShFV22sahLp*1k74uZ?uhanb2k|25;2si7jvd|*rDHcehS==t|`FF$qB zIQ($5z>#vU!d{tok9D>)pZ@~}W{Z1zwnm~l!~TDAvo9{EZjY2WE-t2l0U<6TvUNMg zk4^I3_Q+^G*pq?FMqwUu^IaG~rl>GwnACoJ7siejFT@@zO4;{;wkTze=AfFqrge#E zGvt~b;ElVimB9Z*K_X7s?pRXN)IG(FQ+8h-#u>_$^8FLXaL}VZ7nWdPvl_Job0+6kwPr}RNM4-Q0*PQH>*zEZi9Qoh1m&1ZTL zc~HL6pb6z`F>VVq1Z9qsWc|~TE(mp~Vpe1`X2q$MTqdCnC->xFkWoOW27}Fn!wE;Q z^f2Kyvi6zC3{Q8ot&L;uEfgqwOV+-Kw{kplC+f(33nZ2~IR!%?lFZXnuz~PQIcZ;{ zM5~Y``>=Q?-`uz_vPRcVly1*QIwLvldARJID3@7io0YusJj}kG&A|T1qFmQlwD+qz zErv{Je6o+fNAzj$M}{P*X!i%CqG_FF@rMN+KyYG7gm8{8a|3JOvSd3z<#&N zcSvMaLCBECBluw_T9db}o3TQzL2f<*VtUYTL(Dzp54FF!gZuhjZ@3Y&1su6Rj-21c z<5&|0QK{g>4Y%T|@zVEWFyljsWxWLvSfwoC^xa}BfJGF~GQgU^!Ba6YfqUtb$nt`u z&*Fv7Xq%`CLc^@BiXk_Z(_*lkE>j)NBhKhcM$0Vp8;!i@G<3B6_&@doZoL@Y8r*s# z6U|AzA;eiO8MHz^b#6p`C`x@QaVZM~SEQ!6^<*?{ABNHtw<^u^%FcTKb`H6eiPifNET&A{oRz7)@`(7*GzHi-l*$-A_HoQ-$BFS8Xvz&4K5tVPl6NL0A*M^bB zaw-WS6j1T~^8h_c#8oa2*Ad2fJH^r|lzS#geRkAWIfc2(17aYa!D7z}ZX{HEU%_;c zyr)@KWJj@UgP7UTISpmJR9QBvF_pCVy@F2?azbL2o`E07L;h{SiwQ^Z$yMdOgp*}n zPP7(#VBC=tJsU~3CptrW*u2OS_340X+eKqY9I;RRnI=2qbM2Te=$9k1?W9pPiW4F2`xx#I^+p z5AqNbw-IDw7&ONNy^F-r2{%kmY^NaOCllM>%WqG?kG)&Aof7r+%|->w6@YBkO(zA* z6@boQuzdh3-7qaemK8;L2E0btL0qRsOZ%$z6XWT#AahQQ&h6U;&1n;F#5G$W*rw5a*@AwMa2m&A3-%zKo`Tm97MmSUi;l?A z8;_G|<@wps1G-H9)Mzj0)LBwBFM7f8QJiABdxmL0FZx?MZ2H$+5WUE`4_$q?M>c-h z5#g&ZjFw<73(tUpbzgP#$U@?q=pukUgpuL+po7hZ2`njPD}4p92NtvYKv(LuY%Y_0 z%I1Q#g34oHKVp%>l@J~S1v21koEKU_c1MFjC+sdqEcXGu94ikuhOaVrUmR`7Q`VQ$ zielMPd`&bNHKSUVR=GhY)mTlu=i#0uCe|Cd94%BeY8T**OvKBhQvKME?m|IImaQSs z+;Jp&4|Ic+ESqp7c!mWPEJ(_-oZ{*O&|*rK{X5%mI~*v0EIUA-k|H6*Uu$9mNlyZt z9t2LvvNTC1WZ9E=nsg+n=j}ANi9ATJX2I-myD z0iwkA_av{(Xb*ghC&B9|v^)u}!C6KTOO+=9d1c0IDO?lvdANemav7M5^2}TrvL@OS zAx>IQ*g#3&in^8$63SEzS_NV2PpITy1?Lkg`B%Y>gkSOQ%46Ul;rH^vn&=GyrR-IF zZhbCtTUklLaykQiEt}UyeVHEo3RZ4rCwY1;o@bXB>!Leg-?&5788sxxGVbVf5-@bx_Vf}qoNyd(gk3_ zQGc!3Z%-7im;S1besjsAWO`d6h^?|50X(lF#Nv_1qm9z^vBQu7Pk{5iA=f+s&UZxK zd;*+rxwWpRaRjzfJ@s^{oSGkZoDQyex+OnvV*aigS$V7m&DYsogvb^j7e{r7XA}2fb`Oi*?rtEHIP+dK|*WQxZt!_n$#w%{ef9C6`qAerjNSAp!OE2F7NY!o@8`Q33Db-V1N@!kANL_SRZ#mc+E!B_O zB>iZ#^H4sUb`7uXik~$59GiA6!3=<`&v_dKsSwI)mx50M=FI1nsx<2k`OVSjh(L@Z z#2RXm&jlOJqJ`Une<18)zI`} zs||6~TDavE)>^n}d2sx-XoitVv5(%A$FNBx;!AlPnP3UalhH}_RTXMooW7<|wol3{ zHc)7-i_>TMlq;QME7;?)A>D3Ii*3!p;+!!>u_P6Nc9hK6JvqnB3(BaE!iDC+qS%Fc z`d+@iZ}8(Umeakl4lSebp44utb{}VH=*X9$hFy6XC~rDYlyX9N6W7?w&R`wgMd8!_ z0dxA#V~*jVM~i`y}P$nC<9a13$f@_I(bIMcAGtB%D=w_~5f(-2A5 zPQMnT{A`}yiJKV}7vmH&;3nkbNnb@Ch|KasHMrmi=o}=D8K?)%@J=ST%0yqRxc6@6 zr)6;_Nb;MGn>*68sISF#<7ul|nvsAYzgvkjv$*0X{WH1W7pu*gi!0#T@B$jZvf7>U ztuGd9UQKhE3}o8?8THCmRttN0#)Cl{j8P2gX#cFM{ms z?;SIsds16XM6qawQFNYwAbg>v#O>{GQ{sZdajOZvyr&#QH7tl#J56+f)M;sOA$8^U z#oiO#{@aSBWA5l1Yt6&pvw3Wa1VfQE87Vm^1k*)^uBrdT!Tc z$ZKP#7XsODz~RgUKXtJsi=UFV?J9PLwTp};0i!XSy{?6A8ZNTjHj3{@WEk~)Znx15 zEjfna95YLjHz@x5lVZhvXsI&tvN#Bk;)_tt$WKu`J=Bd3Z4{qFTwqZ=X5~{Rfx1WH z5^Z3Tx--*JMH@uOSzzWp zcq^|tkxl$Q!FNXyP@;$n426uSYpNjbYQf$Y>{+ z8z#rj$#CW3Idt1EieA-5gDYpnT;|1R$G+Aie6Zq>>^>(pyQNgPgiB_724ez+YORMBIgX(rvT2$9ZrT{w5hj+V0b$X%STD&nFgqR?^#(A+S zj}^UY{nA)6dR4U?-PEDbUV}yGOYTbVjNnDxb0oMe)<*_h8p}-Yg?Fh@=W(A!dhAd5 z!wWf<*@E=aSuh5#G(~#1;VRG@%?$Q4S&)=j$wWY8YDUTcHR!dLiWXEtQ>pzAJXlxhy04lfHOpxfr2D%&rMbsxctw0g?UXW>8lM3ChwoZO8693^lLVgr96WDDA0 z!Y>G4BUHXbbba*XN#(Lwg*L+cK33dIGlMtA=4-B3dGq5#BWc%rPIJhj<*~K$`9bgN zvgFCQOU}G1cH@60nf}!3SU;(FrToxbSRk!8v110Ot&EM9 z0T0Ho(Zx!9wXHJccd=q=T^TE(w*t=xtcsP$zUtyk$=nk2%BoeMn>VZt^#*JKb@Y)j zTVlmpI|=PVa=UCMDwKIZ>$b!)go1>Z2ua8}0 zx9B8Oj-eCnz79otbysQK05c;f1dlDTuIZ(CMH)xC7DXY_Ji54DOC?^1J%|!LDS@hv z%=wv~lt4%El|c)NeqmRB3rT*|hXroO`>gC%M#wh$ApfyH%!5TAFZ0xrIxE?bC3Uta z4yl+BXzC#9sGT3_Fb7hhF&(5*qHbf1L8c;=Ah0U~$fg3RCP^g&*^69H;+lo7Yf-wu z^&N6RDwhF(RH&MCv#%P~ZWw7sIc78KV?}*vi!joX+$)n>DI-0r4pm7eKcGb;BLP7s zQ`kgi7MEIOY3In04YAHzT;^_wb&{dIi*o|3uMOeViYUGy97<-Xh{BNjH-ISGo7dhI z+pZsPa!8Xm`WN??5gTIzudjJokwodbO|db@hjD-+dawJq+$T$}ij|oAH^uhav4dA` zw}JxMaeE9V?IC%F_Np9! z*zNvVT2Q2&U>pA{Exd*A@Do}fT|thc(57f%{q`g+Zl5DfqCH3*p+&EE(bAANba#z8FTSM?GWN@DOJWkyi+^ZMOgZL(9vN6u8B*j zG8Qu@$eg4qV*#7!%Iu^nqe%f~PhN{7*vk|G`uE#UxkKf+A|sHtu^P@t>}rs=Sj}XX zTC9f3yM%({anwpEIF91mSPBmNbyELite|oo3L&C-@ND2a+jtwppl%Q779@_}A`4m$ z&KMjY$rVq=y7i`!3|fvCSQ&Gkkt|BjYUD-Ga!_LkEr$i6<@ks=GixG}^l#+zCu6nH zm6tvh8-%Tl<~)T7(0G(+gIJ$xp7zUd&;}EJL)eTb(}sM2(>ch>Q~JnZEM?5bJlkaxdYfjl8r5lbgIWU2fhR>ljo5^H^pN#=x6585e2_ZU*dN zx63PgW7k!UW6S27ICi+2?Wj{5r?|G0px?+-<@dAPpT;_};V-dKSt>V8Q`uLWpZ_Ix zT}EPamtQOFS8`sJW}g2_Y~nE*jjF??>C(TYJepK%JvK$R zjN<#=hz*D7I7n`nJFXC6K)8KHpSPgrgm>9nP62ZQ~04 zVwkxZ_^Sqnz#H0>o%(Y{R^+b%l6zTk0Rs-{OS)LmzgCFaz4kGvMiSA#rpeCBii;g< z@Dy!I&b{WhZ^w>gC){ZYdQ|rawtbT8ArNK+3>6FhR}aW9gPx{3(6PXr|56oaPEy>Yy3tMpc}o3p7lGUL z8zgPR!7L#ADjbsPkMEdasXsRI)MB@4x$w`ZKenI>h636=K>VYa7}#@NA&y;+4meM$ zKh`VtM_*3uj!}P5d_6|}LFL7<>JJX4DfP#{Y%=GIShS%I*J%9;(e~B&6*DtYN9#}c z9O0h{2XOT1h^#E74pGVyjv86KpQS8$fv`yqei0iwf_4#YI9+izqCAVwsGYzj{2*M~ z9Yzq02gn-6G6g>&oQi8KIGoy%7tJ|e#&$VjXT^{3%QlBek)f>rKK3q|@7gEh>yHcD zHKEpU8IBn+UImY_AFP_?He{6}-mq>$ts#eSf>84n&iH8b;6=_jdT`Q=kgEk1Vably zAjbA>qbzN%R7c&G8G#FWe_KN8Vs#Z-uUwX57edFGxk=)JA1lHRP%kr1r)~m#Pvt7Kvm@$#>k39AwypErK&?l>q4c|1< z68dX*BHeKnko_B;mo?%V2(Qx!499&eV6W2a&tU=9E3&}tI92LrmKL?##PZM(6xp}& zw1Q4&s5Oq4Xzm3}U>diQmykG?-~g>dXVi0M8q*97?YY)4^K4@UFOJw;^9iS`A}~eQ z?+9lkAf{5r!>H$Y1i9(PImXifX!Qlv0M6pAv?_(QNtwfBeqp>KM8>am(|Ommpoz>c+wgnD|B^=wVu%~1gUwfp;_oq@>y+EObeCVSO}Zk3aB1-Xb4q#qmV|<@u}i%E zxKM)ZoKb}SwJDY%`%f&1%7DLR8s^`i8pi~xB+rm{yT#`_yd_-yv-+lRdugtT*TJ)s zE+?`Z=Xz!xVo>JCC0H9bP@t99M078<`b3`NTksI<+Kg4|`nNvN3xZBG%bwbJu^z3H zQ4M9qlG{CA?3f94-d`;0d3i)U>9tuc zq1Ouv9M#==ChgLbO!#5FsAmLmSB)AtY*T%PH{56t&D4qIcVttB#XV;8)Z!j? zv|zc9fJW%}f@iswiQ8~7F%0UhfhYhwFiocP$Z3$nC#|F6dG&9hmSe18&9iJSjI%b! zIHM;o0-^kirQ;Kjgz^uTbM1&@0(6O>lR6nPI$oQj*x`dtsuyf&-`M20qvJJJ=A%|- zruM1q8y$}YsFl?E@dndTH~Swr(fSj9Pq<7xjd5R3-d7vM+?>HY9n8~K!mhl02zg39 z3Ubs$PC#E<3k9#wZy-GHZkLTs8oPe6u7Q*D# z@htPn@$r%@*O~YNzn&|KqWGS3;~D0gXT}$568(GR4f);K@#f>AnKARG$DdAkaeq4_ zK3KJ*#Y-GD-DyZWJS9IOOJ;%6r&~g% z@i0&=gnSfTPlxdOgrQ}c`IS%%1!-IebNgg|9WTi{Q+oLrYN#egp zfn9k%mYsl#U~*+Bu+#3XC%0fCTU5KYr?mM+tn)Hkn5-;aZpR3?-E_#49n&iur&4cd z5A{P6_MSYo_FsC1rxjC~OA58u&F4J~7ij<#Kb48wILby1<7<|=l@q3eL2HN)WR0#;hk{l8`fY z;Y1rq$R8nNlDvK;co&<~hBB8#m}%F=y*xg5hH}Gf;9znU2sBf=S-eEG*?sD)E6DgUaxTqf

    %lKUdin@yCGj`>c`^*eV&?jP(Y1p!Jq)?oQwm+!#|;I7sW&JK=*7p zV_V!;z%d$fAhYy{8`{U+sO4NQ*Kdn=tt6M#`d^M5QlmA(4`9`qgadKV>IrYhS=I>o zC$7;xGUMChUudo;+2SwnaI$1)e5W~ob!mI;KkIBiwIv;1R(68?Ftk$Hl5%AKk?wg? zRTZBkJH~cC@4kEEK^@EVLndY=>t&u9zes}iio$jG$LpjSC(_8X-8|cLe>_in+A<;0 z^+`Mia$E0@d$fC{@1c0Hc8TPk1u1OCFkc~c0J4J>Ry`2+$o<27<#NwiWl@@^^1TQt zW@=}b_1DZv55;fN+27uaca)rm<898qM?WhlG`iK)1T8N?Lvpu)AQnCxuS+lHi{OxR zoi*7XLH=s__1Zy8Fevd=p$C4A_i68qLu#_$!nb5NYH@}AL>43suCrO-c0A2Iw`&oS zwrPDcko|TZtgr~mj%&$f)HBRZ8C>_Ej_R9l;{<(kC=xdC)0l-Wu0~nl@}Leh=Mw>v2G@Y>egq>rUEYnc$q^k=3E((mGH(sn|0Uoyvy_ACISuMyrocw^y3*;-}(=?O5Xhb7_GDpNZEw zX5_-(U3PLi@+Hs28)Z`zW}TOw!PNXt3GIuI7Eh>$A@lcPkbUu(uD-tx)gIp$k2?Me zo^$>&6ZGMd`z(goU3djmNf$o^Q<#EGxY+Iq)fQ_J*$E`UNCz%iD~M|4ruJO?pGKfl#G~m@|b$hwJa|bonmdK_TLm zaM>a3>|H70LiYD~@k9cdhK_>#|QJh0AVPC_je6mr5`?_1?nwR3f=qglz2*NCDRDKz?oSY~? z1bG|h=@^}!dnq2PY(Y(}KfMCf5X}p<0lZEP(a6RSO{j+GvnBLb4ADQxs`um7(%d^Q zA_MyP^2}?u$FDiABep}P*LE5pjSrSN(Pk~Wg5$h^W^i_ z<1dS+#8|NI-uNHntDc>nkh%B8cVcY?M(#3MelQ+|PJi1$4Bx93V4nTbnPpLFcniJw za|unun0yn@4biSDE5^F?PxwSmmgDQ?^Ab6qA9|CFY_^P8Jc^s}ilAG^U8eNRs zQ!u(?qZ(~yUa@wO?BrN~WMjTt?$7rIrO{Dgn8w*FST4znUY85IA{duU>pRbYwe~}I4t%Gydp{oYP)%m-rl30TjWX!vy&o?{5KZ({2oq26Ic>lDrP3>f35R_8 zkN6bn`TsHZCE!sNOWV_D&dE%|B$+H^4@t-}%b9_MKnTdb?*vy6WKmQ$6;u`#3@9op zDu~i9$fBsIsGwX&y@-GdsHku+dKDCd`+^8w6;#y!eYFSuS%C+$Wx+EoymIHAVMG}m z0yi#`?;ip;ZoUcJX!a?@!9}lyky3ORY`9x?7X?_iCt?Q>I*{cyQINTGN7yS4%kERN zkXnQt%E7(+Nm>WI^(^@Fbvf`?888+5((l#UyN{uQdZ0C4Iqr$Ak4Rc4Z<0aI`=cKiO*t% z+hU+3G_i7E#)G~%BXu%>KN{5X6^q&iNkm7Di3%&&I=0H?YNcd^})S zhq#eo3H}ccy}n{0ZHU_dCbL6vGi(1wkhc@J5TvPx z%=I+!K$?$RnGH_&@v!TAco`+XPWRb3N^{y_L?^#D5l3V9%J3CiX>d*Sm0N&B3>Q-p zmR{}iT01x+lxg1rd#QXs!{;+{a&!{UP(N|?=)nADh<784oTv{GR zHKavlvd`jsiMddzc_A$m*@C(=E-g>9!fmOwJhwVLzR_;sG|;(=UwU1>CtGW28H-|L zh$OuS%5G5sv~Kfi-oZ2(zzcb~7_^NRJD1=buG>LT?;4Kcm9D8Eo8x*HnAt9R^{;S^ zL>U(Q4FF;mJ2Un$8{Li;@es+M%6!c`4Pr%H0zFKWfCSP!hXi^!$$$iE5Pn#dF!53{ zBWHNX&%knDP3Mz9BYIL8?!hOOJ?NOoR|v8P(VHEpXfOxCK9njI;xbWgD))62(-cNNkcBkaqMa{6Uhq?XN14;jmnx?PeV56K(|uVHNXCe!5eoSSF_IC)NLD!I z=JB>i7F1_@aHKSBr-n*j8A@1KLs-`+U#SdL`RWiW*1fOKCs$Yb{5bz^G0WefEGwPa zZuxm%NDdbu_h~a}b9>7x=Q0eeZ9iWbLhiz&eLkFYIIkZTvb(|6i;UC}&g`Yt2s1-e znMc0Y&sTuOiCrzTeAolCq(7+R!D7?;`=*Hqexh5Q;(58g_CJNFUCq)tc0f;fAw%hM zKnGu&q`r7_f(t`ClnhDJ>rSt~6R@)wHSr+I7I@80ju!DC%4hg$O^dTg=Vh#jtvo!) z3b#cWz<9%%L8AnzML8<%s049J7!9JVWJl2;%E2thf+!n6qlAfmLW&Py2vcu$8*>bh zjX{)j2RdByK@kh0BxlcYZ3kwy>ps+8q4LuqOm_f?1yObd(eXi)YdiXKTX!JA+ISFU zZ-S4;1IGlx#~K62X3Fn6`g->811);4$5SZTVI!g9!IbQ<(Q%QKNAOg~MN)Er1J?{5 z<|~$Wp5)6DV;NJ4K;wg*difnvTC%i6t$p#NkwmiQ%F+I6Jc(3#t5TlA*<+KRR?O zA&G`m{=Y~DxfycOB$7cXJ3gdxZe2_=BJq$)B^giuUNW9JUNW}V`FeI%lF^F;MWbY> zpyEc!=o1f|RFa`~UQwe;iR?EFqssp`d3fS?QImOcYzejkK}>L-{4E)JcWO5bJUPRC z!6p%m2n3^<`M*RaE*5glCU`)9f%T>S&&YdYeY2xONM6<-?krNZWK~0s*`{qZw(4Z6 z^~%WW<9)9=>!;$~;uLmFUcfY5<~;rnLxHlhOyvbdm=Z{xVB_d+ zM61|ob54_;kF!|JxDqEVHD}4$EJlb8UCN>gYz|+`A{IfgTy_V(afjzYf+zlf7q^+k zi&ND&|(0aK8)E8=Sd1^&$&)2`%xe_Wk}|a zCZ}X^xA*tDf>+DIlYQl#I24Ol_*=A00(J)ProeUp9p2@D z*Wg3_m#k=CCG9XpD<7Ne%Slt%f$HbH4e0b4k$+A0b@8}3CvK{Vm+Ugfmk?QanQw`R z+;WAlm-utb+8O_u9Db=RDX`08SqECfL~yrnonnWqn&+Eo?I?9PrbbiN=J{%kPL*^GiF!HE*ZWGt7jH63f08Scr91n3>5MW5I*TM z=2yyn1Q+Pg$>*^Sz8~kP<(KKe$wkGn=~$$0zHg&fuI`baE6Z>9#kQ$OD2wt~;M7zd z)P*!r+e|tcFGr9q&N|Lxkq%^h4%Ul+-ZR&^pRXu32jke{EMRSH$W+dYqd>=vNpAn_ zY#=6h=T5J~zpv|Slp{nk3fMTZ^4`B`4# ztKYSJvZ!~1j1CD_(mY>2b{8c0dk~wEn0c6}?7^qw8KP=!{F%lK(OTTud^VaP`n*iL z+gCnVc{;i=Byt+M_v}SMbSKCVM-L5W(Sx#eGr(lESlx@Yj}z3EB*7)1OU82e)pui} zK3qP2H$*rDypDH#EGEM2h;h-$6)1>-v{1JY{F0;!{EA>})~ck^ODMBy6P6)-o_h$6 zj&xn-3paCdcy205i@d+acdv+i^RTad6AM{o&@u33MLisj7P7^yt$ijU#-a`mNYwVolnuVNDO#+a+1e;pYA~(jUhIeOZ0ncP z5^}R2487oUCgF9!yMbT2my)dROk)I-CgEj3oK$$nM=ZxyWvU36)^BLxWN@L;{cQAr z!K#RW+qy#*KVOmCaVP8by2}qN##X>@0f6q;@!~e=W5y&)#izJU&b+LRvf*V+O3LNW zFZ&8x90Z;DamuT_1y;PR-h@9%*$FsNw3ap7eC0)SZHUWAay~xIwxUmQIl*5DJ|HjO z=F1lc<^B^-XS6o^z8h;Sx*WYc!v6N$!ehJ5|yP>n2Z zoByhPN}Ile#?*zoUp#*L#0xJP(*}D#R#vw@Z)WRL2b?yh&l#AOY9tiwnmO}W~iBK?E?S#rl1V3{?GD#Rs^G*J}?y9Y*u{^%zTU^ z|8ZXEsUP^pC(CYm;bi&fR$oe1O=WT8Ut{?Hxa9O4xwy(}V_`s~`E5D;YhQDrgHP(~ z@RA@Fzv4AP>eN{BZlOCxc&Z(;t?ro9;0KTqV5PT^I$OW8gjvJzLHMQ0CaLn7L7Hb z(GXpsG*yPNV#8)^Q_ys5DK}eww`_G^urv8G zKXQ)g$6mmHiW{>|wA_1MbnbcQT_Q_T{CV;f%l}m5n*{$BL(C^@4#ftCBFR4!JVBO} zi<11cNS{{=k_{-!;a|Xcyo?-G+035_A1@hEZoU-pA0K0dQj!;~>oESjDOZt2PjBQ$ zS@3RFj+|Picu*}wk{{)={#hZRIZ+;Z2CH0}2P5FYDNgX(;+A;M2fhAAKi3~|Shufz zIWm;yZ*C+Ra?Dkk&E@bke@c#uN_vv-Kc?oWd7LlFE7SaKa~I%EMlFcPSX7Z4P-h$E zYia(%gvG!mJS7jN`Ck(EH0}F^NF_$RS^iUuKQ|pKJ>jKdT)niaX3V9IDHmOMe)0H= zrk_3KTzNRhA27y@k!gPO^4mA36v%bo`<6z!c>{mHe^uj!&_Q}mwE`m@qh5l)In83%?#x$$BJH~ znt70Ky8vJDDI90-&JxnZrf^(5a<(E(Y&}5b>$t6xK#DQ3j{#GwaZv2QF3;kZ4uYfK zB06v5_!phGwPB~R^#F!b;_+xsL0S2DG0k?Wce57=t=1^R^}+=#t3S&+B|Jgp9JoC4 zpx^HnG)YhE}>;_xYLwi%_I^0gM zls&3k2OO({b3NHsfo%znV{IS)L)Q`Hzo9q5et;mdJA?jw?+iZ06wV@Ff(yoTy?ia` zFQ`@6^NF?Kn@_!-O%>=!xfjR>@S(HVqv+~M=TmgD$oA)qSJ39elp7U-y_M8_Hn~k7w{hSJPq`U*$eV zk-mj8>dsCBjo|m zJd95X*-O!FB;B2XIH7_aDNlgtDSUc^Q2$HM=!cU<<)1H!{p6(;k4OVnAt(8AVx86nU*m!FNI#O!Tl7U$_##_Hmx=TQZS3j;* z?1>tPeN6Xx6Z+Jz?HgjZ#QRjBBMmr*fJCONr%6=5!)_4i-$KKVl&f&ph4=(0yNdD{ zd;22Zn*tpvq+x90usGd!pc~;h7AGVOS>XV_2A?b9w|1#pr^0O1x7M&Dg;Z6b}pCj=*1r%jJMJac-_UE=&9fTG7ym$v1 zcBIiN?F+4>f1x}@b%kzRTc&^d<}$h z)c?W|Rr5srRvLDs^#j%PI8_%#^-{b)4ZoxM8w<+2_4sp8KvUf1&=_2Pt#~(E2CRup?~|8s|cF>u2t%s5oyoW)VKQ(CYeMxKB}E9Pd-ZjtnYvO~Lbt@S3kt9Y!*%{Y9C^Y_lmGE+P4( zE5B=`p`ZVdp_US3PM0}<&Q3jHDLt}!u)mvWb*pBE>-yr-3_12QOfo$u`|CupJnLl4 zKZ@m}yj03xPWIbylcZf(QfkZ{rW`ERn|^2lx`tz(72~}sy^);4pDupFCx(00^ekg;sIS4s0T zX<`BA0n&UxOe`Dj{M$#h%^gKQdUUp;j7=S9&YX&9TrM8Oabg}^J*r_`e#h=ilhz=h z96Y6!f-($Bnle^!=}dnf&YaJm2}_bwY;#YeB{_ib-nb=s`b>X$5f`;Yr?@4#1AU3k z1oxx6X4BsKUW-0G{|1=`UncktiF>nc z0c6BOkE#ai2>wK3Rm6skSiDX{l;zB z-~c{Id1!&(6qDro_k5+s>S8S;g&0D+Y9Hh%y*q-61K!Eq5q!qlVkIVsR##gioB|aR z^*@#=LVSJcSoH+2Z= z%~sdl?q6oq+k8zlw^!h|Uxd%`f0&nD1Q=3cg3L*KKb|2@hmBJmSQT4ZqlM>W0Fyp* z0G^;L(AZf>bZlP6P!?x*qV>|+snMN@xTxS9xr{f%DV4Z1&eqznY6MYwwss4PIsoz* zs-mgn+{rF_62Ymm=uUrjYZWUd+=Zxs9NodLO})f`ZO+j!wi^+d(6XHJ+&le6-AnOb zA)%ZT5qO+j=>$(Pr-7UaAt9Ux^0y zqdr5`zsvTV%;`Q9=*X=D@|EAy6rDhmpEVUk1*(%&wdYeCP!tZ16yM{&FUgh5_kztz zcdag+_$OB#R^_$c^(ULEgxCik!k{4Ag^IJ)w#@&riBS{o&CLCaYWJ*Y;a3_f!0Ib;|QjGhd zd8sup9lxh6;Vu$bLR1?|Ou!Q2D7CSKcu{X4i(|vQRxNbYAh~{j^HMG$4mpDTCg$rU z#J{5^y2V6Y3w6?gD2iZ*38b69xWWH%vKSz@e4Cw5U1E8wt6E*uy13DS%%RroP~E1j z?6#>QAm5tUK2>@b+3rZ&7yNe^NoU~wgEO)BigG0n`~h4GUD6pijJOX2a&9ClHsaE0 z;~Wh7c#0R7?wwp*h>y4@lP2GgS5)Q~%gXr$)~Icy(QAuzKu2@B7<>{PYp-E3mUB+e z37+A8UgC=%ReU0B4*{gr9_83rd!f!b-vIn^Ip>}6gvaHab8YiKbIucpjpdyGBvZCQ z52y^q_~sFMGZwXZ#4+^Pj4=kH8?_OCAP?`NGtxN|_wX)yPl+Owa2|C1HvieJxF@w3 zN)OEG5JnGonk7v;BFdP5*lzQ5b=lE3`JpZgcn&`+>c<%hfdi{;#emPK-B|K?s< zzqi6IpEt@g<&CS#+sK^{XC*`qzUALz7@j=2DcBaH@jEbMd&%za!hXe)A1}S+{&!)< zu2ws>aEWgZhS&tJ!;z)s3Bxcki!x%OghYj1z`*}LY+I7g%E*jM(wZEVZXiC7Oxx>! zp_$&M<@Nh8B-ed*!jSB&tgMye_T=~__H4+GZ2rvOVAKcr?)hR?;WHM%@qY&1n#0I% zi*Kh$NWeQrZdVxy4aj~pcp7PDDz1c+WF0(>G_&hSgLPAg*EBXZt;4Kt!>{gFD~ziH zXq@$K>mDGHa&`_b(UBM_XFW)%lGSv|8NH!8klLVwPzO>Q%qn-PGZ2i=iB)GHpf%SG z@uXZ;N8TCj4jd1ZMq;=56CjJLn#e+Xz|j*xGgQEzss`s4EZ?n$5bTlE#~caR^&+YJ z#Ybw)(j8`hRmG9ILGJ&`-#ld~i3XbdbrMCkG!MWY=FD51#6CDaHKRC*P6T<&W{=2z z2mFQJ24Z^?+Z83x<#PG~|I`UIck}@W-%!4oD5b%^lq4olYmlQboJTQm6G1+&7{oC; z33A4bAJmv1px>vAbqZWgu#Fu2wLic9W@10&@av_6O&7%}+P}lV43DCCj}#BP04gd4 zJ_k^HIXcDZ_K|L9oKArsDY{BjjE~bbkPZ&rK(s>zCt~P!r1!&DhPtUsy$v4Xka3rY zcn|uMl8mQ~2MccrioY@<*Z=6hSR3mn9rG{$bMx3g+M*)uEq}gjUDG~G?mJMCAa6Rq z!X3%~#eb*M8eZtYPG@Qd!F7GwdT)O(P=__$um}uARQw!XhRfGQz(!8$t~G5-#pm3f z0vXsXF{%!MDyY&4)ZO~E^@@7#QIRdDq7GZOt2ly1#2?~571$LDc%zfvtirkkw)<|K zoa8Q$Z%oPanRt>Sy{5alH0zbfJ!T-1EEoLh%aa$T2O2kbnwMLi>#VHOaj-^13wh<7 z);W<6(*qA1^&zrM1DIt3-c%hv$N#~aZx0xw-_xML2>d!O&OUhY&e#atlbB(|#OAy` z(ZcyDzhZMHdPH7_4oyA#rSO>Hvr&g-JGDoFaNEFP z;2o!s=1m|5Gy@lFq&z( z`(LcRJxc6xFCn-zt&W#cFG69|S`GE5A=3_^i$uQDr#pgJTe`l$t!}vhoY5KYB^!uy_fbvXq7)Mko`7Svm zJCI!;VP$@{aB}Xi?uew%*bNJ_)eS3nlNJiAZ&;-8&BkAHslzDN_`|$mi7roPpDlIU zhuF4Mm(_!mWyc<*0woLvYA;p8r$~}-U{hVjRtYX4ojHNB0eR>|T-<e^Co=(rt=MnS*#VOW!x&KpSq zhGPxmPkPF3<4XREFp>Xjl+(BkfsK({f`K7I?hja;G!(1-PH#t{NwzwTYzPIOwhZj` zc43>q46E3Wt!U-`Vmm_~YZIt7+%@u`8N|`t)d9biQ-k@s>}~~1tt+w|j_q=Nb)eK( zgRQBoAVP9s*6)y_El{b2avxCe&+#C`rPZyx#yadvl>pQZIqjzmpXF?ULufyNNsX>Yd6H7YCR%423gemyEs zCHM3XFI%iHsZ_QZ{9F1vTjhIlW=iSswo0nlV=1x@~okOo0M@~xjJmg4#NUxG>OYgV(*>u z$cABoWlp5o4m%Cw;%vFd}X9Tdn$RzwH1(O2>7&_G! z4L&(;GOEARJMOfNte+gf7KS*wAydw+3AiFVM+DXwD$F&fx=nS5KXMC8vZ<51k?b#l zR~URcFzEuas25+0bsRb8Phe3hDCKdA$2z?RM$qTZ#++SOlI9%6t>^LEv>2c4^yABj zIlHDPjqyxjxNA zH%a0QdEaQTGdmDn*}e-to=@dF?BIU+@HJrPr80dC*f~|sD=28(i{$?UJ0~+`u&cah zXaH8#jKHb#!Q_HeIlHiRQX`AMIzG_5$yj`_d~;SHEi&cYz#u0=_Q2=1{CGm34AbFN zx8Na)CkDo1+mLw^!T-f_7cZ5vWYP&7zNj1`p*Xw_9G;^&e1hh11n_~wmzLCESCYx- z7(145W1WGD!Ht|$bxOM!P7d#C>cH*9smCeXU0XvrW^IR>V!5g`sMt8FZpn*^m+#ZO z%qbOkc`BL1&__us=8UP^MX1nB9y9emK?^6>qT}k8Ob&H>D{*eu$+$E!aBos8xzOr% z9$~F+-$Suc-Chq!aV;G_;8W$!F-fjW`pA2-Lm7wfx?#TLv&YN zEOx;64oIEKV=Ok4DN_gter{kOEJ`9cRyCLg#u(5KmCzJpSHJt*Xnt6}g*{TY{%I}Ph4ycC0z8Xf!vCk8`O3>Y`j;IEhy zqYG)2-i4=uvjiM$d^K?JVQ?RVMjyry5_0wt-8M%%F8Z^>i&0gp^={O2!SMn8U5*O1 zgAQGE@K&_v#Wc@Xw^6=}g#Pl4`QYF;QDZ(G*Sn+Suk*pd4YJ@G=v{J{`COykr97CM zqI$QtJmVVZU3PGs-ffTz(GuE6>D|ThUIDDl%0&U}yKzlBQ*Jz6+Y}x-m$0qQqhZs`vLW1!s9p?S8f{2U}3<-EnPCfqV@GAQQ~g&=%v z1!dWY1Nc~5!bcT9TeUC`y2$-Ia$q8CPdYo&ZArlI#BwRZs&lietNz&3*gwO{G20_| zB6=)vx;%U5WJ=rWb;*=HhewA7`~{M8tc+jz7VG6Rv}xhPbGW*62t8`{ zeMUC_k!H>1&}D%Vaj%@VERa{GTGg|a!-HA;Tt(mPGCst-Y~Hn5l8}!t3uNUo;M16| zD4TI%-MB{6o-Fq*3xrcC?#2xYg~{ve)R%NEN6gPAIw!r z3m%vB(UF161K5`RVmW(dAb`sQ`m%E+2Cs|duPX!P;^Iizs=!U@t`GU2{PoFi1e4!A z#vl9kMx8fvlui#CbzFLoteRoO@`D!s8Yqn15eaOtFy|cn9E5z`fg+QZ)biX6`QCGw z+>Yv@C%2t8VRAdA2lqBqliTmXkDuzvZK$W7-0p?n;x{$9MJB3f2FGrvwgE4;4_bdI zmhw2kZQD~%aFKN}DCo1^EQ?QYr^u?oz$^>?!36if=0HP^p5T7+?r|fR66f0X9olGd zE{=5H6WHq%(`DhlKv6wo<1h>%svBaHP(v;e?s5Fp4Ga3mVcvuvsXX6;pMYPz7m_&`7Nf!yXmw171CV1I6ND3IVXl%v5VS4sB=fr@%HV_BX?Hw(RP zoLLwvqM+ekM{s3KyxrtyV^vJN-75&*8zuI*PbPR@8Y5UZ*|5~1#H-UNsEN!+SN^u2 z0VRzh^i38h<)a@!yi3{STjef`IoA|j299-sc&}O75Xc_)G8@r>whI4>?xG-@H>1a{ zP&vDjXxGAlMr@Mmv`FD&4m5>VuD=pZL)QcxXq3UEp>kFOWM3JpK81qpUnDm)K=$dp z6CEh~t3jH!mtaSN`v@MAM;joy{IRepAg~MZNk3nf?+={bioc5J!#m&S26iv*i0~IQ zt4RdNpI`Ljum2Fi+vP+1(G$ab#Q+k0jZrFnWaRDrfhTiZ2D)kj`IeCH=ORD+960^Y z3V8%VeurgsYvpi^mDAb;O64FkSO?qX9y2%;m#=wQCp%j~TO>qJ;%U>$i-YZMvLKNc zm2zF19xLo{{ys3qW}h6=Hc$Zvd^iE1$FHNsdcrHFy;Vj-NJoo#anBRoRTA#1ei4s5 z*e_p;^aZ8CMxT`)p=)Z}%Jr|f{MZIbr7AR(24^`FXdQ~laIB2k3< zF}xnwrf~i{jMMR@k4S)R%2+Mq0k%+y2~Y|=6x(13haRk9OHO6A+fvKeZnb+rqiy;% z8P5Z1Q?IZ6Wb{K>jn)QtUeKep(Hzeg4RtYHSTx|OnmPf}ZC=IRO|uIqV5g2if7S$) zjm2`@-GTB+WFA+h@l+ZocKUFhxUuT)#bwz^v9sH2; zB_1@f1)F^c*=7nz(h^dAq(^7S_Q#4oiBm@76E*H9soQ+2Z=;;!pDF4jrJz37Wtu|9 z7rHG6RpU#n%LIbHRF(gDP(MVf=qrB+1j~!Q2DRu$;XM}*l=dyb?gUp5Y%4nkgCQ?} zDAAW#x(m~n%NfC7-&XuZ#9*qqr5wkd1cz_{FQQHQ1}Mc)YM5~ZUz1-2gN5E+pccbO zG>@bFxse<@c%}h!^^$NffXhAMU^y-?Xy|KoiDb75ex7a!r#y5tzu#Z8VrxvMk0ZZkWC08w9;lOfU9Xean$wp>6e# z)u3)<+H%wKmeV^bs^Q1ekAUCJFy0+~fx&+5{Psow;&dRj0kMS=Pf*%Q; z|IURYzw)AV=X=BGNiPG2^R;+w&Zo$7F)s>b5o7p4Rxq;C=zcayO_!5^+nOgIKP!-X z+7{MpKZ)|P#PZ)6Wr^SdR9Fh7eZ(HhiKf(rQMnR9m;t+3+Ox=m_v&2q5wn7Qo5a5oSura(*hF6N*Rz8&twnh}_hZWdEY7G5^o4VRexsp84q>q8 zdjt-Z=cG#ADOldp!O_FhRB$xx;&E+}gwD-h4R=c&Af1yQ-N_Px zUOM#CIFO}xvJB-!V?VEs6wD2-PGZ<+j(q2a;Bm)cWjDtxv?{v)HUhqet*vM-Z(bK{ zAt&4z^tfOYJ4BixTmQXXcD+dWC*BWuk#1nH`n`ahFR>hB^)dpcwTTsKX*I^`>8x;D zSFru>+$|6TlhjIVH216Mj~MsU;i5c)OX$&o0PIw^Fn`5^0irrhxI+dP2J;4ffUNTu^LmL-|IXrcT0?kC)g^&Rax)c9K@XRRaaU^h&8Zw|_FT{uPmW9FcPV7*$V}D)n z@vsL`!w%??@~{Wdo*+#-?J2BP-NSEqy*#uq*hXxUI4xm<9NH%Tc{wV-c{BO=lfjpx zJIep1T=y6|PnKIh4CY3rE)Hfl(MFS(-yduh*>G!crIQOQ4+U*GcWJO}=|e#ihbE>S zMRxFxr7+pB%Y2_go#WnZDt3DBCxd15bI*adL?yc4CWC%V-d2H1C%U^#Zn&)y-RtCG zqE({%9=ZSFpijKem{^QptExwWJ~@}W&`)_d=$6a+7Dlt($7>%9lTe~L#+%=V<7Y$j zf--Ausw0;0K6P#IhX@khZ)W=GmaW0Otm<}usNL6t|K%^UZClRT06*@|dxD{)G`vo6 z1Yb94FZqjL12BDeyl*GjB);Oa1Qm!g1SYoPb2(_h|BtgG%!=5eq_VKw7L$X(|3h$T z^uKf`^|}1g%RKk6sQoVwpxC&3D-%qWEZmF&n4ei?n5Z4*Gr7&D0VRBeGD4!LWnJdm z_;!2EuBol?Sc$Y8&F-nu37Zy=9;qL)F&r?ptnC>E-HFWz_EKPmQ40BBY@yjZmE%ql zjPLM@V0kfn6z$ldk`HzvYCZ(0-uDVaY_+V=&=D_42( zP6X6{-Q8Ec^uwTMN$atRGJJnAuj_9oV&yHjM;hOmm zkxp&!ut2l?^D&k$lMijR?O0kpIQ=%J)sx9((Yjz`TK#{rHj?w#1q(EPpMsYa{2hOj zHieQ20NH)%wU+lA+$*E5SJ!1U{EAx=M;J?~cNh0U>haD>dC-`M`d=vXj$uSoXO!TbNW za=HYkACcHnAXO&MQ!<_)I~Dsqk-E*nsZli_-(^6qTAYB>4coPCS0nfLZS5DOdh$N# zh2SD1X#(H(rFh*R$;F3!8TH^;HARkl#2H-%KixQxK=F4Y%g_Vo3}^?Pbs8}YGjiG! zNn^N_Iicq5U9TX|Vo2DFJ6f*;g(DF; zueW;OJnUe_fbGP0PvtC*_R*%$C!4S4Ux^X*Z6bx?`1KHD?m?3AB%BQyn`xWt@(}A*7 znHl`P(nAHj!Y(JR6B<9oB|#oO@hYz8cY+B8@K(9wK8z82uK1NaO@JDs%OqB2X- zD$vpV9U%FWAC1%9NII{FeadHF2^LIHt#2l_Mqzm;1@;H%X#Oj{=oerDoW9eYq`f#! ztH5g%Ef+KB51bvRT}Il66|L;@YVh<<>TWxU-3p6T|6dAxiw0`*0cbshy;!lk{gbpm zDO$Pn)nI{F^`HWOYcK)9e{n31-A~$48tZ>8IPzRYo3Fxr12Db{)lZ}0PJr?I;9lIR z>=)dxP*E2u>Y=D@p{Oa@Zer1%1^lVc?+^A^6=VFdfNRP#y%EUzM1;8Si?F(`8Qi(t>@;$&H} zIGiho{1$ACIzC+J$}!tkVfmhMCkTE~4%5xQ1=ko!SdMWBE=!y&7vET|bS{Vc*rJH( z$^rzP%aakIb3I@h7$a8!X)Yw4O-%?z%k@u_Nes@eRESWtbZ(nJ0PXC4mBP46NTaNd z5w{WJwrE|Ol3yiC=bozU+t9hFHGh<;PCL8*DAeM{b9ix^-|+sX>EOk!)=;bjl&$C* zNMBG{E7i7}(cN3T)__z>mfJ5ca@vKVWKs-CrD)UTLYu-G8U>+5+u)(Cx>PsNiG$_S zPCJmwVaDj^c?y)|F2oBZmoOUg=I|r6!C+ym(&hi;050i8!&-nRHpYm!$W}?Zw+tn$r*3q)4 zLuZL>c&hnWiDce>kwInl_;kqQ`Wm~@{;4|P%8~m&3E4D~Jkh7QCAB#S-AX6C5Oedm zLFh1Fj5;$-w@ZqScA;1FW$ zd}No(PkP$#%5(ma^?^LN5_6B7K6Y)>%xj1CvA=i9xmB%93?Efna9Z4y0d}1ndult2 zKFfh}`vSj5<_xrZi3RekftYhv>l4cFDAtLjkHc*E5HrurQn6U4rZbTgQlY$*n`dWw zjg`eZleA9fr(c&A&wne>PD*1`wmPg_E~?2kBeMqEZn!CVV);#H*oE=L^l^c#9HXX2 zzBxW2D0j7nFm{@Q34i8r+ppd6>+uTqFG-u2ffJb%RA7d1bBzuRJsB^{`4h`AhF(s< zv{tjigReM4FJy(=LeAghVD1?l3ZmS5H;XauJqduCrm7*sjS-05nPXIAeI)BRpuoOQ zfF)e!W_-g9vn7=i>BQ+Wc?1~rTxsKy!t^+En{qog6IaO7N7&`w>A;DTu0bnKN0ZN$ zH;#ZxIaxk6!fqq}9l7}_8|jh=?8=m_M%r&Q#YwD+&(8iSA3?Hb*}2*!-tcPne~|<6 z--L3UpiboqQC=7+A7g*yl-+nx-|(fuOj&%6U5kWBoW2Sl-#Os8hUgi7gQ!ri$1!{T z#@l{5MZ#I{xxvOB3D@PBzdwrgFj(}Z@ph^BRv*P0(MPdP-H4Fc?`Gm4zmPt?4_->1 z-Y3=RecY{+hq12YVXTPFcv1yu$sZ=#jV25jE!Wv0<__O2hfT6iNotALAZRiCUSV?Z z{=Gv`g?T8yNX#L4yzZnS9Cw&Rbtg3vbmw=dYSf*aVL8u6P1GTHFN@kCNHy9j?l74I zNO9tgD8Nop+SycxSOcOWO*n>Fx5;*{xJ%wR8Ep56d}y*=kVai^9!aIGp~AZd%eN=n zZM=7(h3H1-isHOSWX=>jm^zPGbwCDUU{jxw!=~76j2DD_cyq;>awVd?<+=~-zVf*< z?P1dM8pLu`Vc0F7yTIP#+RlIZubrK$c=Omr_7(EvUf#WO&+1?^xoK=-O4Ip1BELUA0-7?)CDr#lg3>yK4q9A&%zx znZ1!GNiup+zA^j1Va}K$tkoP!&)t7=C^X=4Y}uc0+(0x#jCEr!JvF-j5r+g^_uX?2Y~Dax)sxp@J&Q}L`%das8vRg63S zdV7%O*`aZME#pa)O~tB?L;D1Z6DVN3-xUd^}1=t|myQnujK_xS!x}1drlNJV3AqZtCHhrg)I- z`aD27W*p)n)_wpmg)5=rVS+F?kH~{dU~p1`#bazS8or<8XF(?(C%Ay15$ScC{hLm{ z`0Lu%FCSfQe=A$=3oDEBq^4nC7@O_nqB~mV$l2}6n?>fXvbQ^}b(o4kLwcG+f8KA8 zML_qK`=Nr7YyAK&m2%tzFgj0PvVL!dtQ+7(TG$?JvAy8|yUcn9uA!q+JlD2VzVmWY zNDSg()bbFB;NTecAk-|f8?fU7j-y)z$mkW_ZDD@o@Pl@S2kLd$VH*o38|=mf6E*f@ zD|Wf~2_%0h<+^Z#U7G}l7q-{I8|bPyxBK5v1Rq6R6zu>xU&ITEb8d)$X{}_%+bqX8 zms4wSZi)<@-!``seF#xDrDr0}rZgv&&a6NIocX5eF1FzP5ReJBy!>x=UJ(_XIl@az zF}~n^rgw(|%|uf^`8ROy77~r|(o5P*eD09P{$`hXm1^t~H!*P(#ZypJ1#;w5FfpH_ ziJ4)z)U!Jt`73Dy7`(&M`>Z`#XAHdZcj&OD*yx|BhW+JleOlr4+q*JT<<0{&nXDvE3QXF}HMP@#PkB5dj>?Tmfe>%YniCHmn!$vUPfvJw{<%cPQ?$ z9Be!YweiHmYc(^jP={~SEB&hv551Xv6!$=L=UXi5qYoKr6i+f-3P7`d|facqwKLgE|Vvc1+QjE5z1*NVbY9J@8{EAa0j+5K%? za31j2|vM)8on@Yd_@$QQVkzbibM==r< z=iS#4yDx6D3*}w!**%ha;6;f7Fv-2g@jP&iJkQh?F#4N#aZY8L#%5Z#pu$;8(%6pQ zKa-{>zT!MThmGCVQaScmMOokdtk=`3Ygp8IF5j{k%ci{vfMRqLJPk(g1Q?8dj_Su$ zjE;k4-?#GyzKa_3#;C>WNPLXo!Z=TVN${p9=uWy|y2HHLOQ}F?MIw!7^Oh*5dlQGq z(tY6czsb6N;B@vYI#Y}kr?Vr`CC=%O$yNKn>GWiX?r}~pmap%#PZL41b!QP7+hC6o zO~l-v$zIK~e~>Ht*!j}iJY>lWKd}ci9a~GVb;n5Yr*^FqDfHlNcnH1#BiAuG5e!}? zcYa|rUcBT>u)Viqb2s9)?S3+65spimJt_-l;F5{Yv2X}*BZJGjAvnMD#Zfp3Uh(+w zMjpRR^Y{V9<8mr{m~s}r6q}c6HXo_k9AgUDTvm2!Z$?f%U>}PzdCce9M(*0`%Q0)J z+SkZk12g?Nk4PYb>t1< zJ|7h(J&Ql}~vbFJH4gEm&lL>9khF?0oslu#>t6N^LTP2bxss^35* z;;vW zOVMYr!3$B)od~&czUWoR<8jmdh^K_qh<5;xP$0Jkfv92`u;>;f+ykAe4~8kh+SC7e^(47meZMR z{<~rjK`}C`zx?+Rj2W|K=qNLqp*e{5rMx9n}Q*m1d*M&m_1#-@S}aX#%?3F0M;(BgMY$3746%^ zPSV)RfbFEP?-2XC!m>jJHqcNm{uB@TB|d#&G-WB;J*2IK!H#}+#ru7a*d-eK%TIQW zzS|eXc7w&1H9b=Pv%NPxy3&Nj%Rj#d>r)IKGKjH`u0yA0e7N9 zbXQuaT0S-~6ppM)4;4D~lJ0xWLvUMfmL)l%nQ+D5nG+gn%<3X<9*6xLy}2R3wE%97 zMRNbR=B09MZpg&)(zw^)bK;yx+wRiPrYeli)AsU~OgP2zL>A13V6z%Q7^FTf?H z07XJNh;*<_O!KM9I?gj@1yxx*(uQit45NQ%EYfBe?r6S48bsREtKMCxSL!DoYU3kO zd!n_DyPe(W@S0Cp)ZsO5Qt9v->JPJ4tsk4Nwg8}x8$b!YrnV(DO+B4c#;;1^LxS8! zM`x(E=Sa3vodcSnmXKY=#`Wp|QTIev-59fd-Dl!{#zJonFHm>o@`{>JLH~7lOyicA z_sh*;!&nq0%5;CkXIbo3OVgz}RBXnrQK-OS(fMI4@wPyZN$q3{I#Ce) z2y)O#dqHk#A1W;3za<6{+aBcU9A(5{f(HopmcO(Q)wbeKA%^jBg3xH`^h}DA37$%@ zm|ZCF6eyDPkK{SEp|P!~j>QQ6>#su5rQ^qrf`fi)!EG}tUd6vJlm)kjN1z3 zmB4co2QEO*{B6Z5-Hp%AUCK#pCUIktPguTnTWNZ0@fokv4jixufIlX0uK!gamcFsYGzn z9aRXESX2tZ1V=i|4iDfP{{tr;cxoT2p&PDINb>-Z*ijl6YX(rU06eDE$h{LorA1-f z#QJwU2CsnNckvj!_OftNsG#s-kXuL8@}SC@o6i1@s@S`v7V`8-p?2a|xo}dbCl1$~N?nLdiZy2Bw6Tc)PO4Rm2t~ z0ehOu^Wj!Q)7<;+ey)GBKA3jWrqsf3DD7kHrJ{6Jj@4Hw3|s=3>yjk)?EuJxfZMytuu zUv_9F_tl5;nl4f;k~}wra}!kT%(1INoeZn2lsR%LcBbx{&{!tlUjs$;o)p*OazGBd z7WxWF`k}U^Mghzs>|brYn1jqly_s%rdHC9p&w9E5ETZ?NF00nj1aM?vPde?QS;_E|YUTjK@h?t_ZX(wz*9kpF5+aWYqof3~YnRyktk$>D7N_W;z zz>5?m_*w>LIPnkGi(0QWUFY%jiiCFHB8Wbf5vFDbfpqpjIiARWJ%Q2aCZ5P&j26y* zB#b5U&m;{6j*0wGV(?G=9Z+;lLme`2s!V?8{Y0xoerGni(TV(O0Xm+@{{%?zKp*kq zHoNnJP3!OgfC6Y^jpCz5gV=6Bx=Sce9F1t%$|b1-V4AQyiT`>?$< zjFLEMGJX}}Oa4dK0Ml%i!}v`wbPVS}|d;svP&%0j6@05dB%pXr$SZec`!GGeFl=Jm$n01Q4_q`nGdI~hO!>PB)uz`0f;X;#Y5()PJUfkvv zssr;%K-M9)yI%xwp9Ji2H~qzs-@~bj=)Vc5#G&$`7h!RqCSQIrWVbE`u^7yXdH6Vz zS(*r3%Dn^)oUzOduX(f;a@{-63@Blk}>C1w`p~beC*|LLDR)i$a&8uWXd70hVGX;zbs6M zw0kX7Zy>X`B!Z2NE6>Y@_wDsinJkV}m{{Axf=nsHf3WuSMraVWRNwzW$R}4`gfm5p z&(HSCMOS3HWo<*KSRNv7Dsc!Da?1t8G3O9_Wr`F`i7RIV>*bD-?=^%9tSy*6+$)En zMw}x{_G1Lu4HKeRt|IMD($3l+DrS%+&dn9J6js=W!Dv+$E}dlBhoKuIwYx$e8%r5N zx$cutqU^jol=ug1d_XSV9lF%Y!|S_3uW55B1AN1kL8oHHKo7oX!@3L=&L4q}X9`Xr z4VgdguD+Kv&DcY1Z%CR|;M`M)!-*%jG_G_rTw1O4L}P@m20SwA&F;ZE?ajWE#h5o+ z@pE+F88^a&&}}@#`4K?YPk5f#0hJ7QMy3^YXoA4P_)l+v)z!*%JF3paDYDhup_bx2 zIqdCFu{r?Gn#u7_h}6ll>f18K$r($%32xcx^H4t-`d8>*#)nPB&F8)w8ZTsry`h_$ zM3>6$RXHu>&cXi9k>dA4M-5DZG}C?%sF`^CAk44Y^E z0Yl0~&2XyE3z{Q4DUOs4Oqn&a!tiIu7*bYx{2^&tVa91FW-N<<8LxB3_%N2Vtu?9D zwwfC}Dhp;ePY2JC#h->wGj<7;t1Vk~Zk0I6Bm)`Ng?!V7s|=9yL&b8+y=+=Hqr&+z ziMpRnyy;3O&EJR_q1?-Ei^dALFAtYS?n`Dv&h4EcPNAIF$o)gJvO95E8T_vUf=vcD zfWf#}0WB&~XZ?yYm}(I&7FTb~m1>1BK^$<%Q$GWP(cvxH(Y25`PA>Qi3^r0e@>!^b zm=$^Tv(R#3e9%N3^y-(PF+$#XAT+RPIB0W8xbUg3L$jUGAu)yLm8%bh{BXU!eh7}e zOSOiZayaCdQ*VMA8b2hvSZ*Y^`6lkY*g)mz&osqHijA-}!mb8ruQAYPk8AEpQQTw9 zb<5=`n5q}ZX;5#N_$y8Jv)n>xqh=nD(qvD47gJ=FiD7pdwf^ykvuIW_+t#$fW_kZ? z9?;|Rlp~?P)t`@-cjDiFjLBRF#`~skI?86|CoIRtWX`C5KPJy(3!D-`Dz~N9joq#^ zjXXkX6@Fear~~e8wgo;uCadvVxV17gISzxVXcVYOp!k^Vm+u}0AJI$@1J#&3TqggB zF?qBM{um0w0XqE0P%%=~BA5Rd`a&3o{yIM~Hz@MLvCsoTzWZyaY4(xeSehZnYzrqx zy8af*bt24Aan)2KT&qH95%Yx+6f0Clc&HqEGx*2kMu&&0F-#((*3ST2C#uxa@QXxX z`$CS1$23=Qi<#&sxkZnXJY!dnk}%K~_hs6CyKFC1p$ehBQH_(vpcFae-=PYzEHcar zZ_~O7tktNSN~Q*KoYggzvMwc8uuWZgxXjAI7^fJj zR4ywIhvcQ17>4S!!rGh}_REI(*kxht5HOs#dDwsZp#l>`d5ykd-qdOfQ8}oxxQ5h99zN3i>PTI7 z_>eZjz+j0do+|~_bwlSoBNj6g9Rj!Kfz^`n{w{1}wMoD6J;z7Ek*NKHQScY?L~Io7 zPa5UIi;aRq73a80aA_O`IhSy1mOFkF{5`Y%z>ZB70uy7lAIWUdQLvUh#zsN6ArIw) z*}esVsE#sQS%G4YnugkUWirV?(E1;!tf)WQku6e*uM1>X73hS&!mh${=7}WNcvg!Yukub8xA3hdk zryH`Z%xM>2I%Zl`I}V3cHTwKR#HDB9K3nXRyUq(|L_(pkC9Lo8jxN&{eos6X z6iFX42v>;Wdx3D30XEiote~?bemvP%tT0_13Zb%=5puf*;?l@Rw1k{At)p6ugQSk8 zM#Jj?;Eqr7;;uJod4Zie^EupR6)u)A=L>R7!gka-63CVH2_K+%WdhB)ISFS2Gdp2C zXs<}%AbYvPH3ERSP;h{B1%QI?yN2a%ENj+uZ9=nX4whSmA0`UXMGkBgt~jYR$V9uA z{2u1H9CV^RO}lCMc%F`fj}Q#SLEg+WRIY6mF08qg*jl>llW9GO4)hDBn4;tRxTey7 zB|5P-mBK4Jv(}OPaOAgE;o02BOu1(M!jxDI*?ZfB9}%+pTV%&Ae;FtKWV8!6Q7Frn zD-yFKm$VCaFfr;r+95pC+5k5TPU0BHNY{y2zZujq>|gpoIXK^m0ec-$%Yc$~4&e1~{!|$o<<&O5uJlnUIae zU7%rYP8)^^?G!o91nLk_a>I;p2zz)RhJu!9CqvopOmjF&^$8y9P7Y^A8ajos*M!Qx z8r(e`%f5<<#plg!EH;;P&C7^v?;aMSJ{>$XjW6beKd>i_efUQcKmp$E0wO5je-LT7 zRES3cQC-z`3a0fjD@@lQ;G7oABe?bgX;HlIc5&X?C@q}Zl6E3YlG!~+T zYaB=mptdD}EC5maGbSfL%8z=6D<;r`CE7;CL``jKC?@COqtCuo;8O(a(TPwX)xL+r zf(AJ!_YB29sX;Dk@ubZtIG$igPU{uU%6X4%I`Rf;eOH{Mq{j1fWJRy=8;1Bnc7CF~ zyLLoFT(smaX5X=GYzitAwb zdVWCQ?NpXVv9!4^oGE^iTh2i0;#wkV{&Ao?FC5F3?1$U#RyM{&U7=l)9*d{$R1 z+bE$ZWyBf9A}2j277>WWj;KVORq0NaOV0?$a>d%nX@@-7W_5eSdyO?)1?1r~!c#0i z-a(-nD%#IQ5uA88-Vm6-1tG(w7APC=ij1z&IrwB&m@Yj_whjpS*otsYYvp2Bb8FOn z#4d!JK1=ZQL%f(KH9nwA(cH?EKMW5qNcjylX0>YrYMLP&bKwXW4!a|dj|jU2R`b6( znqMR9r-n0@jtoEZCplp8`fzEaU{tsVa-`1+S2u~#@YLw=9ZrPw{U7Gu1w4vk`5WGu zoypGT0t@5@36KyViDY*Z_Cf*y5r`yKN={`YxydaAp+cao{9uCA`Gx@n4k z4i1{Oo9Z8fv>H>U`g_ICR{8XfJ~&n9>m3Wt2Vl>?#qq_iV>OOcp9(pLK+vCN7b0}* z4j>_z{xU#j7Wm|4<=LW-OO?Lvjy<*6_Mub#XXz_ExoI-v^cFIXFVl>K<2Du9QteNd zPfqvOntT?d_xDA!E)7q_iu$1Nr|vJqG$Bp=#vao;oDkAS=O7t{S)+@1x*a1EySRjDE# zxp-1m;eSazeb`XOZMJ{3EVvQFpYIcR_a(pzzcbwml<=;lS>-*cq+%(Rf>xVU}MmcX~_UWD1{ApHr zV^p7r|F}u1y;46fM)#M>Xfu%6a5JeuvwkIk>E=8_x`&QlF=CI2vMbqOc<5UI3a5V$ zC_IFsdGhA=qB{fxBQD(Ph^AR{6tzzk?k5?RzQcx7HqUss91D=UR^UKZSljy4?S_X8P?WDOdVWXcZ#1>#p>7 z(Qe${Cf8nlmA?p)VrFL;Si>lS-M`3RqpgEEkzM5=az&?G7Aq^!`->rHuTPMt zmMXhIxr#Q&f;R7VX!B>uS9&CA^K8&&X@WLkrc^4XBFxneVZI5BnDbD*Ec-T6C`<3| zVc7N0cdyj!4cGW*$LO-zeTale0kjTrcGt*_%luVlN4&aHC3ickMGt~%lPYv`pDH|R zIyB6;CGC2DaW}Qur&-$^!uf)QVVujiZyBeeFb>Lu>-_`tQ*>E*y?>at!~XDkf1B7T zF4wN+^JB67;&T54O;%jo3g_oHAD5mkr%m!_NZZGKri@#LKTz&~$_wi+|54`DD{7Cy^1KYRX0h@FJ1N=X*Z~9Rl2}30K8Rl&#lq@lY~+s`2E7(Q8>gYx zJc#?)3K-M9q^9o0^AC~Ir~O<1%b5^#a+KZn z4nG1pY+C34FLRS+OujHQxpd;#*;8gtn{wVX*R*pln0oeUQk`26WEOcfN#=@mhd(&fWZow~|~^$-jbWtr_SlT>!OB!#+x&QhcENE*!&9+1l)dJZCQUgy@Bh&sN`Hz6a z(j9F~52rc7xR-vGT_@$Y_z{bL1D=Vo_@SO{JW@RiMf=3JyfExW$cTU9edIWFg%u&+ z@=bh0x(aCxVxlD`Moh6e>O`U$9_Q`HodR|Ot(lmfW~W}jb2hht%{dHXtLerv?&ePz z28jj)MB@sH=HC1KSGA#pGGcR-cClS`e=8D=4Wc<&lZg-d%UWg95KJ0lnhC}3u*Gk> zv02s8hDhm7vKS-NKgB6YP(+^Af*N>0k>aBcq_Cs~DePBL1wsj`IIIv9DI=Y?-{`!3 zTfKdlL?}`8^cFAQp75x@vH88X$&5t)P`+$_Dx58gsv+f8%C7EN9qhVo{(K}8!@qq4 zzDIuWmXsf9BJ;{N=SAl54eBa^xf3cezF|e`F=!J=IFa1V9!|P22p=W9EYGn{WhDw@ zIn)bR%!!1$Ok%@IY51B&9Uf#tA6OKdP?(ExiEmgLw2FDOvt;lS{=y;3+BNbeRB5%| zA6Sf1z;Ve`#I-R*)|ZY+nK3g4j6g;5-|*C04Gk08*kq5~_k@2iGLL@qguj=*T(i4A z>3`1cIf1|Ldi+mIE@cBa<{AHonq0QepM@Bd{##pz9J%9VW5+Asty>-B+JilN%KDd} z%=nPZg}{$5`D@I%un0i6E-Qo`?PY&CmbLjjy10q=d(`p96|cZ3aFPn8&Zu~7t$D@o zGdo~=>jjzhP0s@DJx9@QWUMWC7QO=ccd&0C956ctC&Uf{8J^Y3Ht-k}>{tY@M)@$3 z1(O+U15sr%vk$)N$I|O1sV%iSW|sE}{{g|?u%-zo!YU9DZ|8{gV*8vo{L}OXy0+eh zFB}~Y`#@KofR_~acruic7)CT2uONKRKo`&~t*eHb-r^DQZa{;|2at$}w}&`Y9IN^= z`~=8%9&x&}=EQ>Ktg=+Z1>=5VIwA3>Kp9R%yw_DkysAr3gCAbU!ZIpY7{*7cxA7q$ za|$0R=1izmt-~VXEti+x@^{vMbjcTQ`Fr-KjZKT{xYGQUOv$YEA-Diw$~_oQtKd@m zPJ$P(weQWieTrbVjC|WaRl8R1f7^e8_LQCU5C0a!b0+%4NE%UkdLJ`#a*e&!zB5=P{V(6Nd7G;TLe2dNnYj-gAi3g z=PG5^<#5U)$;%7F!X;WPfxr^DabcI&+>66|4z&xYJ>4$-r$3w&BYC;>Knq(K1+$x` zu$}YaXvn=2*?+*l;gq3xeR!AuTOYqXG=j!ydIhQVB&3_Plw$IxM;}fzUIWPeFWy&A z!a$(regtrWQEr*gtD|$2(m&Q|>g^1q1hi!+!ra6C2RecfWLzRkhecB4 zy4Nz>*>@lGcX4|T;Ma85-zo8X%hI$!2l0Ip_-_?fi2Xe2+cuCaq3`{VF*rz*)C7?# zqUyBt9<3w)XPuS~V0Rp9-~N3@x@`ExU#?Hcbh5yu z{t8Bzp2-j*Dhpg1mNSPOrL_)8qx89%PAa(HU=V&nHvj4`fOCvm#^yd*+|B@VR7x$g zpEqVYnc&WLRhqRJlLL`%ah1%7A#A$E7(xgC-+H;7So^%(U3Q=%^fV2ou;V91wK3d8vtc>o*eIC9k*#!F# z{2Ret1k2f?GPx{rIEJ8nvB3~sTzYAdD~^j_t;_Fn-M5S zXp&uJfkLUw3^00Ge(yk``L*S8U8&L}N=;spA#?ji(q(_B*k@j#NM5l>t?VG~GjPPf zSuU`Lr1y(t%MxZ!{8g$)dJD}EcJgBkvQw57^eHr5m?(~9kh}M12RzzXncpwaNj!Oh zwn@%5`wgY1WgC4;!==)AY;mzn$qVeo!_v-J%^hb@XB4j=(*VUbxZxB)Zq5_#_?8Kk z1r^cJT|E^fgBf82dsyad*>-BM<49%iaU2uZ0M&>GZd6+>nhGEa;{TR?5Gq}DH68$> zNtuoizgJ+;SSF<*GCDV0+|VDbh|S9eQ2z)(G3tMSHTY;LFR?O8Z9Na)l&>(9)`#GY z1Yc)s`BL1{3p17Gd95$OLAXn!I^U1F{cUXI7N}N5kmiQeWZg9(2GgvS+BVUgj=NM| z9Bf)fQn?eMRkQOXf=d!0C%e>T36O#yb&~yax4=85+UftF!cLrJQsko%*`w{Yy#mWM zc{n#ZwDo2f8#ByMO=_Mp5XWa+daAuU5D4okLIjh!X9VC+UKXgqcGLW_z!=#(Aebt9 z%K}3rZ&?_TReFP)o>DA?Y&f&XD93|!-gRb|pu;+Az&g&%0=jM&3KYT@Pw`EMX1>{^ z_(p58H-`eR$GD_8#vpRA!suv}g<`f2+1VWymC}Ko4BM&8|&7^V$s zz%Yvl=^n~u=uN8u#hiPceRfX)8!VITfyKsP6wO8t8p+(87To@kARh44Nkr2udUt?Z z_NqY*b#T}+?nI^8pv(RJ14H^f4nP}2Bm6iZd3WKW)lg&7##(LywFIcrCo8pOEOne4 z3C@zhfWXjHn*6jAIluv3X7$QkVy6xa+~oFf2GL#jwVnoJdxr#&L_BY3pmn@{?K6i4 z-gZkVb59Q$4k_$=ILpAfdL@N-4u=%pE^9|a@6H>6`<-%#_w^$J=}`6$U65UXjmqjV zsMWd_QBxvY!xL5H1iVt z=cg$W8~-(5f@XEYJ92-DSCp{VKF&c4>6Fk;Il!k!=yzIE*sl$@5F4!40!7afh4U$?mQvTTl+=!oDk^TMIA98n9c#0 zxsrcF>7;YaK=j;VewN=3(PU6Wifg3lo`0oDoIr=(X9o zQt}zxj$&jwQVu=YsZgJnVS`K&U}DIOz)lb7wEA)A2*Fv0=?Hi)%WA{Dm}$%oX4z|I z1$Md33HXnXQ-rD1Xq+#y=;H?A$Mqe^u>z3$5J@GjE!>L+w^|9twS_|Byuog9_fEBJ zJTh+)UFF>Q?Ct0hRHU6KeQxEdR6fHM!Wf39m_Myq)WMr2rD6%oP)cPQDOC_pw}iVW4wY4G3Bl_3%e9h*v2OgPH)oL$FF-x)4;CcXzuv0n2lcKhv5- zCm_1E^2|K24(BRerhX!x)xm;h#q0<8e+SM}u-J&c}^72=? z=0cd4w--p8wb?x(8RvI{n@>YJWo6mGV0W#flgXk63|0t%dVTSw^1;IyQ{~{Oz%YCH z)q#3%oFcp4n4m~GSfh0`N_$7kWm%*jBA$%*W!l%>7N@zq4 zNRpW;K$1@rGE5b}kIN``b!~-GL`sMR&A=>jMwD;fuWN9AB3FdM~E)aT3`Om;-^jaYH}_;b4Iv z92*0@v}@FU`o!Bh`gEg6ZrvE@X|4gao+?xJA!oT8iElB=>V5EEnk{ABlCostOS+HQ zs|VZ{=n09cNcL-x>^?QU%g$~|2KINgP+oVVlgky79k+J7T(E7{1__apr`o&k51gGQ zMQz}sHtO*}v*+fHU(y+-C*~zDRVR1!$t%H*mb~(KV6({sT$eeDBvVI&xO(HADZl1~ zNumQAbPwZ~xw$)$FiFt$*v-X9!n27BHIVZ@)PbD2dTS}WdpmnkeM!l?~c7ARqKlZVk^Ge zF$h1}tEfw(Q?(Z5IOV8IgJ8z0kKmOAN$HNwV;{gavkCU)1JDhy%|!{2#-TP4z%$M6)2Y%RSvhh} zx13fA7+l>Ym?x9Vva{`hF9#ln)nl`#i=F*yAXhghz~)yZ^BK`~BY zL1V?vz(~w5qjrK7SIR9r1HEK7bn6?ozlRX7;6@n05eab3#z1%TR=o4e9e&K0&6VIm z@}s#NYqVj?Cql90rd)?5_kt=q6`CEu#12d9dtoErpViaM#l!SHk{`Rj8Q7nMlnw3P z4K(|>C}s?o{;$lq`rW|6hU@U+HR|2>f)0-SfS;a1Q}f=?S)>FliSc2;E%Sko`G!e_ zz^e>8V^pzf;Ay-XCIh_~G!N+2b5xDzO5y}qbK)Y_SPkZnfDAIPyW}KP8ONZL+kZB1 zsdBi>FLk=ASwgdvZ?~m#(_tREKn-H>Sb=i1RvelS$faU?H6$H{+e?!s;d)6@3hL)2 z-Hz+ulIrmw;LyqjKsb<~Sd{j{_#p%;K(X^NF%H$npen|UoL%_Q-bY>XJqz&dz^8cT*FaZw2UCI>HIjxM| zm2!Fl+zl{I4!s|kshwumeGr&tYAJH|9az`?StCE#I#~vvl{-*oeHyq`F3X9e+c$g` z7}ZL_Yd^d?*iFV%1Wh~X^FSM;B`=rkSG;`Me$1+Q^8SAC@FwvefE8xbr#Xf+9)Rto zZS%ysGuN3|&jllIaTvMaf6vH!{yRoC4hGUa%$uzy*0iiLuy6CH*^zSXPq2}GxD-bu zeg)HqJIIHccb2Ykvbw2?VOC?O^ z!D{0oHdyBMM6*0pwVJ2d6Nvqu>Vgfi(}+&x3xls=VHsS`py2ch`whCrVp$kU0n~P& zO5=*Yg4Yeaw+D3QG&EyIp9=+CVyufhq#ttf3_-cJ;6Z<@MnU@B*1iZ^Nu8VJo{4Cd21bz z`US&wd5aRwcM&`_0d6N)05t6ccK%f%CqN%OT$23>FuAuq|L4FV!{bAL-L<*(3{wKG z^WL~GxXt0Wu6po{*5Nn%3U}~%gqd7~9kd!xaJIP|)73%8Kvh$jgxzEhvZF4LWxg;h zQ~i4Qq|yo&$-((>=lZUHFwab~=r6X+3Kqzw_b_)(I~RKfKEysZJ0-hZot#L~VQh2- znb~CiL+~zTG;~Bg*Xm)-+Qca7O|t8u491UH)*V>bgL^mwkv`r{H|$Tk2jLMKP6=*L zLauaJ0Xj;X_QB>O7K*KAwXu4^V1|u?OlfEzyw;>G(uu|2z*!O0O`DIKI#xn&UBw1n zX?X50*bui)QL%H=Mw!rC8NdS!brpM99#UpALvaq_VWYU-dLeHey_M^=V-tGorGW4t zH?pvdmpG(h@SrE4hf%3An#DKPs7Ncl6Vs!y8-V92IoKgs+%SsWV_Ijjrq)+s4CQh) z@`8_+Ld{u=?8ki`zA4;ib~fE+5`2@beW*n4!8i2-f)!1;<)ft1KIVW~=$6`neFqSk zn;_VQkd^7dzS`&Zo9V$^)3XiOx@*+`h)p)dAQJ2s^h#AvOden41aHwqKQ?P*>n!h} zZQh~D6JMBJ9?lDv>u?Kdm){4TL*0UPW_lJ+A#EOooi)WWd%A&TJ`t@TI0n9KwFSXm zF!Pc_aBhCexgdJQ9%q0(4mjR%Od5dYqT-PkTJT6}3m$Q)Eds5N!y|hYkC>_H2-6!o zpx3|03wP)B3?{+1DZeDxtW}alj0&DxS@u+qB60~Ha|sO68%lyNHgG}LfbWqX5IQ~5 znia|dzHBXNt12vRK4U7P5dus^eZRHW0mC5+JSC-rWQ%*~+~SFEvmH{Ft*t zlKqcBaBh<0e%|VH07*Q>em)vRcpJ6xRg;{P%cWj{I*sNExLY+hL;!r$J{9z+mmR^Pplolj!Z>tLKNz4uR z9dpFo;EqJYvU3_DO(>;n>FQvT-E9~qnTC0aK=2M*d_ZTFs0NvHZwxfZ%~y~)19*YV zXAm+}v>bO5tK$Af1V$CAyg1~=Qoei>*Nwwq% zjcbk^IyTtbr#yv}QuQGo*jg{4;lZJB-@h1z??H5Plp99UP2Otn93DJqs0YzqIP%tN z4nEtS3nt5&Y(@mzF54pQU zro02Z)#nF&=Fixycw9E4TAJ?Ylr8&FDb_mNjl4a%ooMd@v2r%*CamjJqJ89SpOriE zb~;XJ_jBZJURqHX$1J?JwAFtT@=oIVp;Y^!7%0_6^rfnR5P<;f|5B>TOY!D_eo^5HI=cU}-XzT+Z{W~X-2 zHk=nM$0-^mG(ofF`t%%`xi-0{`6iU;9EVirI`UGH>Q|7LuPaj39+!N2Vv<e)v16iq3GN0`jCe;nJ~;EBEF4L^Hi&nmrzPEnLw`uO+EqE( z?uyc|G#wKxwlBFPxLz}>@V=Kg1p78$A#6UR4BfnsknZsVa(||%lnX70PA(r+ESh75k)o@3P--48EA8!WaDiLjN8+XHoDm z&3o2<}ngi8ORAK2EyN-Dx2SO|8KnG{_m5y+E5!F4Ttq z_#v1*J4ne=&^?k~?S+5BJl=1WTHY%$Jsd{Y6SNWU}q;q@;;?G4KprS%^B$l=R3-MRp5PZdICjQLceailT z_@(JWGh2&FZKvE`GQE8;U7$vM(Lh?JmGsCD=&c8;p+r0c3^2t=Lb`HO22-3*$S~KS z&7DGoxDqji4VKDA40+A1mu7jLLu}zCu0%}rv#(}d#3B}}5l8<4nU~^ngc8w9dfXZ; zXc&y2a4a+QIkP4JQ5(4hw_FQa+)UI)&ByIx;Ca;%652dyZ%#gmU2E9*B*9E}RpyjD z+$D24;DDTGlAEn5!wB+G*&1=VCKB#VSeaAi5nPx6IlCo~PJmoMCy$k1Zw(GVoqk2y z1U?Qod6IQLjsm%7lI%%C$cXS03l5zOk7lvVGBfw3KG~To?%#-?!K?5;cW*veul=m!9KmUGXF%L{$7=NXF$`*0fWAkiNrP%!$Ke!kgpTt$Ns}H-NFJfC0Ie_45gJb+D)aEQu0V@c z!3jkOu4S{DUwD|zYA=%?3FbDeCek391M*(!DX5%s(9a9wE*~CjxIO^7wT8at|oUGcQd+8@RP<6Xh z;VeZZw~3t}SxB5MXuyL={$s%o{nbw_X7%%^cDgI@U3O2SFU7y`Js~l~t;BU<;Q?Hn zt`By|QA4a@^<1YK|0)Gu?UAw$-A@o-L&hMvc2iP{J!o4n(~CuQs|g<)!e@mh%f1L^ z$T=?rvrL>@nmk+P=R`6DCge(4{RP%@qhAc3+&XpxhRU!Xdoj4kZEk=U!gMJ+$OYT0 z!5Tfii#+jaa5TimvUlK!vjz(^3BQIF+cY`lHJA+Yln~OF_mBY{3VWI>F@bk>q|Zaj zb%)Z&EJ}B|s-)dF!2*4C5BUIyaI#gd5VxVl5kPtsOvI~m3+V>oh#{$2Q22sfvMX4U zB0uhmZPa9jdjHV^P1Y<+%0}qSSrv#guv*HxcFM9p*&94sGmi$1H#y2~Og`O)8qDjI zB@jx_0dmu7n(!;zj|TU-Y>g|sTZl7>HF3W(QVVAL6{u^T?YZybew-Ia+5MQe%17M| zrQX#iq3k}321u^mEG%O>3&U8-XNXCzfw+$=yBp=_4}#GFD^TSKA_^ntypj?`4LIFVIiT5@B+ElV?TM7V}9rBujSrw{!3ah(0 z)xc7qE14T%Q}LaW=zc2kBC+oEiSE-_JuJ~(fv)5gs9c5b=0x`e#5+0GeS4z&<*c5W z=&nFl^50Q;AHF0L=i#p)-uzg1--p4hDeB>`WcBhycLlnVIfqb1p%<3Z{a)hToxoF| zE0s7D`VP(p;yjwb*&x1QktKHeN5L*ha1d@ai6W3FKKrgOf;*Ku(@}o^GPt&NgopA$ zg*sF3#-UyRK`bGBp#Y9`y&CK;uN({(=?nAa*7k)xCHD}3mHF}&0P{+0?jpPy)D(Sv zz9TyxfG1$KBRgJ_vhJ4BTwsSx`zBbZZ_0P%#sZnITZQIhIJo7=4Fo#SBJki?0%Lv) zxgjgBE=rS%UBPy8#|^jMt>~Y@(Kk+(xP0er3dQBq^`kJBMy(7J4W{1qet2X`? z#J3dRGJE51y}umYFaYmVyA5xu3tk*QSS4^N2__zi!rh2zMJtZ7K{uD6Q2C*?UgQPH zm{Po7_l3k6coJ(2lX=Xr>iq=`SUV`Qk>$A;Lp4j2?>O*gBINb$#UZ&^)${xF_Iloy z&=&!NknHgwbJbV|56eNCkkuhgs-$*wC>QAjXR>%zt{xrg38%jYMu!UFcJ?ld$3-85 z%AgdZ(35qk9TOUZ@b7EKgo?E5g@84hp?WmlZYWs(a)K zl-eWmX$|^3C2eX^lt>>Imq;Cp^|FY?bMinfdM2ClUM+fb7X3Jkmn}!J_)v~JE>w$* zW^(6op&BGW`uB0@QY&4@hO+cCbSWPj3Uu`0A86ct^nU!&8uypMPY>YTq3pDeSF4-M41$reJ3WiN}j#W(>d2l{=y)-J4g+*wf4wBl;k=w=d{ z-J{5}z0~nx-Lss%rh-7U_)eFPIQ!65i@Q!;0RYVS02#>gyrR40`D;VIGbRwu=#G)y z)Cu)Gvbp;<3%B{?Z})xdr(CO4&Lx9 zyAy+$)iU5Z1aaSvA9G)7Z965S0JeW{p6Fd2WOyV3fa0xj!ox%IkGk4Y0L zC@!@aclba{Ra0W1Wz7Tee{p>bITc3W4={w63l(#<t5C#NnA1t&g?zu&#tdM@_2?B&BhU~z)xBkW-7gE7#w*5e=I-V#H$ ztXcfSAF}9bj7-YbPPRTA1AW%NlI5$Vp@8!XFCG31FCYF3uN?jhuO9vjuUQo6iC=g< z2C83}yDSta4e)*ZW>xX6;eAZuKkE0`zrkm{3lej?yj-N|1?evHOH1Bf7Mg^#vytmV zLm=!fzCP3q$LeoEp>Ouej_X7DIQH-{8%Img4WYph$!FgX%GdvG$aN@Tgxh=raG&zZ zTQ`Kx&=*@WV0kD{|J5UP%R^Ve=l%2Lp`#%#0ym;~US{7IDrk6^qHxd|WB|?kEP&Ll zlzxLRa%%p`no9gXjUiV%HC{BQehHQ`j=sgIp}0)_4EM&+`<N_VwH!6cn8X<5?|zhzdmtVsrMn*CeWJj8LTTh=u3Cx@y)tp~Y6saq@TO1%VRSCIDO7Omb^N*0TcTkL#$}#K?LYqXA<&mOvt`Yrlnm#! ztjUrOF`V|bn5#ksl?VA}UD>j|6GvU#vc|;+T$+z-eDV{#$u{T6G>mZURQ|&4En3^0 zkN0V=Z&}lpIQO-zAsLxlTGkvRJ6GY&fTp;!LP zKqELP-pR(i8!}|+Jt0$eHX)qbb&a8RcBeZ+PaE?0CSR(&e0j)gk6IsEske&CeZ%H{ zxewnPDoW9oO7X)`*4D^HEH=rDEM7pQClpOGgT+C41ch#mm*lNbY4YU6t*9-PdsqyU zpIFq%v5%mbD>t!NC||HxBNdOL*d&WsY?pUf?2+QfP<$>Ip}_fNdFipxXgzy^blQf& zOJ&A3v{uO@ENaC2IEv|VB8x`3hs9F)iNzW@_6Zc5YUohV0bS5JP?cC?nui!6po#~mmp$P5udbx+iR{4p=PC52z z6ispyi-Yn73f($M`aZ)y;3Qd$5-YBEoBJk{(0y`(=uGH23cE%JkBct<0ROj^9pbjl=tIg*YhES?JHpXmP1gR zwB?fj0%~@T#3~Sco{Pv=FN97nNMxm&QkI5{6|r<^=2z0RKh(SEQ&c9lAZWY?eiIQbLpelP2JHmq6VmrUs4(~g zTC}Pyn5awewQ_LLstKM;P#OCM&ByIE_F!A2@aM;_{NoqAz7KpCAF`r7B#!3=Cm0)gCAZZR1$b}g+^| z1nJU%t2}NJu|&>AgZmJxtEUpx@Ti@qM4VAlbu;NwYPtiga!j`*oJ4q$C;Udt)*4aNXWh3)Zbk8i@D)PO^-UI10T{|e;v)9+CBWupNZnp{)jNA^+V2=C({ah zNa?HLEPHq%!j>VFWk#;Oya*Hw@_PKJ@Emh}rpr~wJ<pTO3roYb|mR` zAh>B(B+cF&2>)QlNVo$@xR0XXBPDW(k+(m5BdJIpdK_o4Yfi?|%y1<9jyD~zm)rE& zQtg2aY4j5rUUekVtywjsLEXFpZ``eW<^a-_lvctR4!tYUpeq@xgt6Q3oW>qb$a%Nr zDMNdVqS4l!*xX+?(u+YkI;qzY#`<-<^-o1D@Fwd6P-<2qD&5Y(Ot)b$@CYDocbZ*! zS*DQ&RSK=c9o)yr!DzU+mJS2@<#AE{2q29o_FXPgGC!KLsi?Lr$^oZX#OX&td@sQZ z306`zzm0F|BssGWJOeo!X-7BVT8nlkf06>p-l;z%TCXAatIIyrC;YSN8KMMw5#X3%GC2^SENrXd12;n%0Rlx&V7<((%|rC^3`)% zd#T#&Nww>Sgv)hv4^+}d*^vsrf=xrib&&n-j)CkimnkfU$>w7ajsa})GIZ9)0?UV$ zfHn*a(kIpBdQtN42^Zktsya$p-!0Q;&W31rj#4fi7Dlw4g`HAm!?18J1U(N^YTwEs z^oGLBm=M}lyZYEL0`?+j$ED$}e~_xM`nQa1cUc9pZM>UZEc1KeDR0y#n8lTIPEDz;+vy@kA@M3m}pS`ak znr6*X*v4yWP~&nngs~cx=7oA8MsUu~C&dm^ku|mcxWJ8$7ko79X$g!CcMiPBHl;hy zN40eZ#?Y!S#w~Xbyu#MO1h*4xl8e}fP6OJo^{A=Co%e?X*huhQ)N9AGbq&Gu>}SS? zKhUvQYCUz^Jt2G*Or?JmY4iW!M&?+H?Uzmr|K^sO>!1fe^L2DK&PwDj%7BB(!Du-I zoC-_7hWFj&!$}~sy-II}F}Z9qDD0yop7B!(#R{2^8p!im`B1c}CW~(|JY#lG4tJM5 zi!(~3dtJCY+VcxC3$=24R$X|o>8QqawPDK_OZwF;iLtGdZAN>?!!2Ry3t#d~8F+g5 zN|V<9;~jnC3BG&HQVxy$UnjI;YNDVt`jRW3-Go-W4h`;otd48N+!Y1Uh1larqGQG( zcPF&OwBl~Ob$oW|GTD66=qUEqtc@%zgH~K<#dID4^Z+VNFYe5+!<@2>wf|riVNGc$P`4 zX3fRuood+UOb=gcc+@QP*D4 z(ZqJ17cS93wf~tNX2#dGn?a*XxpZ880hAC!c635$Y^6o-XGOYHKM-3kn%{!PSF7ag zTps2Ck4r_9=E1ie(mzdhd>dOSntLE~D;Y&q0qFy#(h*0W^8rQyvggU3{d`qh?(W)R@#vm0fZUv16Wa9sXi$k06WTQ8A4q->dsrS)U9+53+O$$f9Buk8w#I|?Rj`L< zouoPzI(cOcBUcS)Y(=fv4fls@(;3pGFhMz`e(W}D~TggF@0b9Wep%qEdh%{Xt{z$57Be{0d5-1a( zJ)EGM1MAwd>!3VjJL^XnO3Gn9D_aT)|A<5D6PzU@x9)a2WR7HaTp-SsL*1|(taFx& z+Z~nr2S?>zqEv3#d1@cSer8#?DYjb7^BtjPhvd*27{(B^r)!1xC}~#$SulK6ctpeB z@H)89M_0C%A02C1mpdoStCnN~3p#H;5TS9C>Y;HD1Ef1te=^Ywlm2@8k3@=V+$1h& z+@yMF+!-jEHEt@j$LMtJh^gFkXN{@cGl&^ixyb?eb#ef7Y^9VKDo6>S{pe%5bvgOw zaNo8iz|fD2E7h8;yE)vutD^pjCOqLA_&U_DWH}8esX;m9?~^0G)!{N9rz7noIt9Io zQBzMwrjPJNZVy#w9Wv%GTsr=JZFsIG*WVGI^4}T6JN>Uq$Jy~T8Ru@#&z4}cPy0mP zCyzaJU08Qcf!fpVq&cK+cP~qp-yN=pma6r|`LvSt;UZaIgFG1%`}WC|c>rPMUW+D^ zE{;&v*M|#q1pV!z7xy%e1~onHD8|r7n46J`F-|ef+J<~n)Qa`IOnCyR2qUzs8}yYg z<->j;dL&Fh)*NkYz+i zDMZJ7Y#HYOGM_-p5n3+77H$rw`z}Xw3uEvid3G~aHpl1>KM)?Pd(?=oyQFM)KcG(aPbQ|nvOWE?{(dj;wOzC@& z$4V!e(lt`uBLhwgnAs~6d6cB|DWI<$3Vl|kQmS$ z{v)t`LY2Lf4f-F%pWclIH|0b^m7U4X)KT5>kd6xpC1BN?A`w_Lke9372W@WcM@S!P=ve{cO0mj~<#@C1XQw#<%TMIqBJO zXYCAo?z7?TZja&|*Py>p6q53jW#C(3Q*iYCSiAmZ%%GC;YIs?z%;omYuZG9R%xJ#X z!=*YluBvyzj8>mcGnzX4zH?W&T!y_FPL-8YaMZ5!4G74lO!;6+Mo(#cBW!4wB$9~f z2N6+yYDQ1EY@kq10eUIP}SoyxXhL#2&n4I8HvSA9YIST4Jw zx5Bdxvv>KD%m`<>_GscBvm3RWahFUdeFxl&yA<-1HjJ&#i5hkLD-pj!ozqeX zo0xOJMztR2W^w^>9N3%Q4{vhE4!*aFEKjx(b@D1rzWF39twP5_FH@zHGLfUl-uG#E zlpE_X{}z#UTEG5k^PxN&kLNz7_&7ZHKg_<&$|uxF`*2O7#E@g7h>k$(h@X{+{uW00@`2u zZu(Wy^m$Ibh^;w8jCbhR#YE3!RnJqEqp6j1$mVY2HGFO4P)4)|1)8G97i(L($%>vr>cA zd&;#@>>&O|Jj3X%(2X0=0#6KFVy546`RcoHmbPCyJ(*Fgd#a@D`*7zr)MfQmPB=Z! zSef{JIMPtI+G;-~cWK zwP8(Y;_56d-=6UA@H&rYIe*Dj{TIq=8?t)6Cf{k1*{ws=Dn)6+=HO8F-}MOGHyg(# z`Rpclq*6yDlFmtyIZ`tpL|Z3^UeD^V;t3G(wxmcAUIxx)7D}ooQY2OH!wfrdZ>L;y zDg0tqO1m$!3iQ;ja$gi-eTzV@-$-qni~_Bb96}#+36!BqS&JGyy{nAwligE)!8wJg z|L&8o#$@$Gpgna2^9Ag<6g!9Kmu~O$f^8&6Mq2R8s%;-ROhYjvD(Ljuf}@I@L@}`9 zA|-SC$Q2C}@a`iPIP zls%V6NwmQPx8v*mT;``oIy*5Rj-kc24(;CGuCo&?J>-s-6nSW+5(kgBivaff+>Sz z;%l2@$`x)zeB7Rg|N56I={E#BbCo)2zZYUB?-B#UL{(?@Qv~G_CmYM>53`#~&3b_d&hO_4nA{qgi2e#PLU|Ix3RY(3gPPu%qs5JxZ`2 z)$rHx^=btB6Ff+ewi0bn6K-oUrnd?g2c+||_wxkE%@yxI65#Cwk0v;n`pXX7B@cJN z1`bP8q|>yUP2&=vcM^Ya2!HUOsB}WVDR3|vylT2pASXmG7r74dOSl7dxLjRvlT77M zn?!BPIqj@&k>UmwgQ@>H2z5koQZuPr>QaasfXi9H@v1>iAr2qk>z8YKMY6-Hb~0=E zfw22kJqQcD0;hE<7d!hwq07}*u4uiuQ&FDfkxmhY- z(|;WPPIn^ClfTV{*qpDzWDmCA&14%6gUkLl86`Map>iXvRK`N{h4eUU%fYkKU$DQc zjHG&G>-^jpe|H|zg1__M&B`_+<>ijPCDY!8Aj*3;Y{`-#k+%@4ZqjAxnGG?1z69?L zlTnO`*8y^CtcnMqS4=z^6p&b1Tu+>8*2Gs9c(t6Ou0&n)6vf4|+u`e@(e8HmdOUCO zSGS0YaX62276p%=&1Z=5_#E8FR~K~eIwC5@2)Lj{dIu`e;%xtXjNu(dR!R8y=Xf~- zYn3Fz5`t&S+M$uofqCpxO`asPdgmv=e-k{9eFm{L84cd4vVUkKXT}+cTK-qOqX{au zzLenD1h|^ugak<2g7=gJ_!PjDp%{8NzMQ%pHkr5-;9CGwZB6QriDXqce8*}Ih-&=Y zDFj_9lW>`e?o$V9~-H`5~kg_$QW6& z6KUtq9v2w`C)Ca3kk;%6hd0-Wc0A_LRp8bbUy9VS#)1+#%wfq5FiJ)W<<~E>O60ra zF$w26i=Z02`h>{M2uzchU4J^|2=3F%OJ%YVI7(_KMLzM8niyIG+W=hYOsa-I%-i@^ zW2M7|i1L8Zi$~!FV9|3s8+0cRy$ZoN@N_mf@o98US9&$4XSlT-gU(p=T)`feXFQ7L zMbB^|W)Z=0jhRWLyg}%wcR}s(?vj&vzm?VgbDZ(W4tOT=7_9Um7KTB70mLcADhu~E{H6uBBD;_?Z9)XzGRrM%VtAQv_GzA9m zIIfgBT(~YwR(NBG=T$iBmh(Kq8ROC)cg|0YCJvv%!BgPF#7m_T?BJY9oS)f6JKLT! zCDP8sLBCdWVQ_fp>oX$fYx2g7NPX+DPxYA*+bv5cg$=mODA&onnc$xqnKd&)ANn0E zaIpPcFwdusUqhqgY}Ox3u#cQwuda@>*;2(ko8dFeEeCAks^}Ziy*+#y);Y|xo7=hH zdSt?099X??ZlrlPAiuu2qh5}<8>0)0<&sXhZ6$AisJm2N6gj1eBt@gZksr(y<*0^w zdM5ts&=g-Lq?=Jfx?%~et&Y*WHx?DPj(50pxi{jmU$``KcPnic%xsK2@3@F} zy)1I9u5W28m!5#^t&IyJbx?FZTmWHNe@U_0CKx8$>G8eb3g|lfVmT=*GMGVc*A)4=hor{N=Qml|P^fZyAt{AQ$cm_-7nz)(k8{))X}e=JeDvA1SXAqO2PH!VZi>j6zerHVWk_h@M^*ZvgkSDQlQgwMC~@Tzp<`UC`yldy9PF2oCY>L` zKPq}fVOx9qEfK@eMoIPSkxsI2ZKQ2tp$cp?11)yaffFr1TFUJ}X_1HW2jZwa zl=Wy%nJn$rMRK)Kc3>Uej_2FP zwcAEw#297Dh00r+^%JiD!acqb(-P})KEpGHuu*1|< z_8{;lei<&21rI{1|LAyW71_HUjLb;_74P^aD<|FgZ#a(QaiK2t2UD}nNGQy8>E#3B z_R~irQyREBJMyD%!0SyovphsVvuc3|9hr0n9eFMwox4AYjRC5zI`z85#(-i5%cN}t zIx^_>SF7C|289wIBvYeRysT|z!P>$o*9Yxzv{9!m*>n(!|Rx^*6*dD?N z405>FVvTYihn=(Uwn(?Y4&b)PH0&j)fvH zJ72)Dw(}+btIPs;3$|OFQE0A#?e#g?wFfn))Am{jx8qqag2?Ot1)qkki=o6UeVa;* zk<}gYUU}xG+U?9N__oY_Ir4%VyJisG&Hjjo79W)@FJ@)*!YNg_wPeUkuSYI#n1L5} zIww|#4eJHJPtJ2%b z&i&D3`O{Ks&t`p@so!y= zk($IMP?@i97Oz@c*-?S*RHU|kAB48F2k?{%vDNXL`C4{d3FTs;qcLx##tdRB+80^q zR(i9%_)(-?+>3x>71ln4zg_b|W|dTa96872pcZKgLmv$&P*!HHx@t5{4?=4{^V`pshk zco15opc<#LFbppL0X+i9LvzS{CpC0AO?6sr ziid3~oZ;V4kwUwi;|P8ez_iX7+1aCg6kwY!cX#_VVkq0?U#m;Vl1@>}PX01-dCQp4 zRRLFBlIHFl4rqFCA za-~wVP>CDZ`iClUkwHBhl>IYDwTxweR9xr7RpM`5(zOvT8x=D9mq@pM_W-N;d}JyW zd9C~j{$;f(6zE#TO8}@Rr;xv#?CTE#OiQ& zf?zz|LPig!fdD0UmF;HKY!$PWipdYx?ax}M!-gkXs!P>uWSgAp=)-D7h^(A7D$=>k zo{1Q@kla4m?Tr>mWlA)4#lPSZrWEAv$*5YHgJoe2>(ttCK2(DZ2~wAx-$3P9`7ea3 zRYKhl``3LfDE>Y95W2KE5=O9u!Ytu0LA*+~FLX{fJSp>`LBrOj9BLL)Z-#8oO^dE4 z;Zu8-ruNY`hfDWJs5k9m<faa;BjO)$Hfk(4A z)4+tB&%!VUtC5ZEfXr%MVtVtja&3CFU&EQGYW4@`G^9n*!{wsx!;hA-hn0zZDXHXm zEiU}2oIAo_sngdIRG#BJ6qKemV3ghDS%7UqY^`qMpp)9tPp1gED>I_yzFBNg`=l4+ zx6>BcOEaRm{}c3W8?yvV-2UH6VjOixZnUmdILg*LM+a%nvC8dl;WSWPmuQi$Y!}$K z_(vutg}i7DBRS+p$G{y8_PzY*Fvs6vU4FDEu2nCf0j1FNU^;kTY1J~VAM$F~KZMoe z1R6~cV0AH8nDvj-w*fk}Z0*-4rd>~TJja*VWd+fJCg!DCMbU)&O6mTsGeWw_1s0|NZY4mOR#w2j^FHop^9#`|)A1_s zJcXuax&II#H?`e_GEGY`w3we+SjHVrq3nFWYtzv6@RW2^>$OopYN<>s)81&R%SxG6 zXCKETl<8Z6t<@xy>4OAo=L2~yzTWR#_MD@lU+BpFQ42$evl0R3LJ{--qXO%_WZtWA)ke(+TW!j$F?in~ewgvUm zA`r>GvtUYI-yPsi)S0W{qW&2y!&t3V$|0bxcs$z9fO>tMvxI9WQ?RH*Qn>l!ixs7{ zlVv?H;C9fT?C+mbqW#0M%`H*NwZ5&b{lS>li>*PNSWrk^_H?9(PY z=PlzFjL;2ho3h-|irzesQz4B-SYg&zMt69*Y$K_}4!o-kzC)xM&6wE^t|OpXn^;&Xrz+$zSD=7CMWtDQ``D(QNhf)1yK_q`zQOkpa5QeX;6N)c_-NLD zq-sDkr}9;{sp!1ax-BJI;o0ZpV)QBlMt^Ps>dRcooItdJHv^&$o_v|e0LY#R^6r3W z=My~WqaE{aG+d55$DLP!RIHqM`3f9FFf)PtcYtYw&}%5Z+$L?a2p8=%K7aCknv5D4 z&8bjTXT++|s&2mno+~ZBo6Z>{S>a71UROQ?y01m|h^juF)!es5HHJ{&d^hT-U&gv# zL>y*o1de@ZVDuPM`*$lc>`gn0)CT|Xi>4|E2uEHcVZ}t+R+H3!s8%6E4Gv-UpN-4KMy=-{tPWimsyLG zpa(+kV-rawi{X4=*25FTNfyH?fu6_=+fP=d3qPV%nEwPujA3!C2oYBFP3bX)eWoTl zEUB4crFeWaEv_|ff1rIQX}<)Eoi+CS@zL#CQUvenCQT$gGp}JEUNP7p4^=QGZYJb7 z)$61>$A1kQ?k}N1ui_=H6e(t=nxw09BVf%d+1c_;K+(*aBZ#529cS;Iix9`VP2Yjr zGh^;;_$?$Rp3SS_xr8{Hbt?I|$Mn#Mp=shbfU2?@1v2Ii>g@}C*e zUT`s?8Bw3xS#BMT<0AX8?{m$S?np z{NkMMDuRT*G$TgVubdq{=xIUL@63)SJU2Q2n9)e-VV+%87err7`Ud~*vGH)W=|gA${hO%tCs)d-Inm(_ie^PX4YoD{*mfR00dC1dT`l;FO6QPNpWLzPOHo}g794xQePHLvOj2yUg&sm)jJ+s^A@3z(XQR$%IZv~x};dhkXLEsds+{0N=2KB?%FhrzJ^1E}KC-Aj;; z<5~qit`DGP`MI)UDkRe*4`OZF4}Ae#W&0f*=#^OSAP&c`H zQ1|`1;tSTG4oxx1ix0s4tMTReSJTnyOk1Awc71%BrDR|@y=wep#doo!^;9=q@xZoM z=i}%Ce?k?@5g=^U4enk7Wcxl4FxcAwt&#HyRXzFokV4SF%~n16x`%jZB4N8`5pi<6 z*{3;20(ZH+^{0Rx!C4ejtY@DKgj~s}nOJRaJHDD#oHcYFwTv!!ND_JJ$K02|&B{W6 z$>^ZHQX$d!k@Yq|0@#gcMxXcyv34gF-v^Y3dPLTfKzf(rIU(+PqPR<=#uT(4HP?=4 z9G(_6-~O2C@M zKl0v>z9=l-?opH{jHdF|Mzx;hf^u#z&?AcXJTPclK%zv0i0F0Kh6g8mKnh33^HAv(bBz89jiAHl# z#GE^DB-3avI8BTj#_V^3!%9mEjJpAIKCmRz9_{P zGOIT1E6!wz(Ns^=^W2Myq(M>b-(R~eQp&$}Tm29Qt!M!VXhkys$paC-W(kAzNY185 zbt@W6A-J9TNpw|hXmohF?KCD%W2c_kSM?<>v*}z(;moG9ny}SN7{du*oLU0fONbmr z>1jlw(DH=69v;>n94!$uosgL7zW!EvfRpQGCuWpZW&}ePZO{;;(9V zOk7-3QQY~T>7B5*qr_-(Rn3kRH?xU7gMxH@tFec_@@^cXTlxX!T;s*3A7B_LiIRnA z5;P24SyD$41CAEw$!eyUeYCh9J8O;w&xqs1Q%*-~7NE7gV-5(fxqRYAKHwFH)}$3+ zsljMr#(6r$Y+Cp1sena6Fqe_VXdI&RZM)wme;d9k~8J5yTzKkoL6 zul%C8qWWIH=b#N(impJ_Vk!DKLDs!~4nkGm>-QEBYVP%G2$I!S@Om-`$hL?c|NDFW zj1i)u>@Y-B-|LqO34guU59cDj#8~Yd*jPK7Y(??UX@F_zeTyRU}pe%eGeS`m*>RzRB8Iet%inN{D+Lq0CJk zlgVrDetsO@%e$ZHT?P_Dui)@Hgy!LR^-aSHK)Zpo(?p|sQ%4h&%kA zepkaudR*Z*;-49(U^E|Ed8$EXRfSE%wZS#__6gkEx47ymyS9e?552sv3YYh_p?mxA zJ})zE%7~%3F7_{%VmGJ3ia2u&r;RS(;nxOB$=VbthL?@inZPOVe(e*?U+g-a37}; zuuw@MS5aJ)0B&C7mjeG^_jZgiwmYW`Bi@?r&N-rIs@ANL8%T3A$LmO0(qaNz(J1Uk z{Ci@M#o7?)gU{1YY)RF!y0jxE<2paw-$$bZ6L_9jegki<`};1{fYcO|Pu75J5H7d; zA9I=C8yOmAYPdKhAc~yWvu11%fmUb!b07SsmyjW`Mr~-XT9c(km~p$G!0mpkswQMp zOZoruioY^eWzW}y!)gKI+4|b$HC-B}w-gh+oX)!7lD`U<7j;KlqHEuuO{=vS_jUyu z18`d4!~mQY?ByR&$u%1}4ErA-YV|vdp%j7}*Zg4seg#OE$KUyYWa=iYxhu`>tbH6b z*R9#dF;;E{A&eWt4_>_inhY<-;Iv(^_6BHcQFoxYzM)n(r5{C6b7yulQQ1&ymhA$P z>BkT;O=Xj4SY(=c+5+goE`f$xca^5u%vk6=h=@G%s(Lii{%73m_i%GNvqZY!PeNjj4oU;-!$?8SW0WyPp{mdWhVB+k9$XNMOrW) zMWJVv;R&2ukL?>!?S@+Ls`x`a}il3_940V~a^dnL_TLsDCq z5OZXZw3a3$OUfLGP>S~fY23-g?4xtQ&bI(9@nSrgq+Cbx$C4Gap8%$W*{62~;GmD= z+Go6IMk6VwK(o(m0E&y<4HE0iC^ht>Na@G!0M-4lIMGLIc~v<{ANDdZv^^-9#u{t{ z#g3(Dg(65{TS&}J#=Brb(^9)UOJXX!k(ehNyi^5*q!+lJdSYB(Eho1X!a2Tm)}t6$ z+5_MSgn@FleHdQGg1GQ^YhSHQcG5?ZW$8A-s$}e#oaFS2-v?s4(zw6&?B86(%kJqY z{+mI2H(~AmX3%9Pw5$JS(8G_ipm<||cD|~~wc3(@W~s4i-$1Q5<5TdRgyzkLPF_Bt zZH8zvSX)G!SaEFSc890x%wX+nSqwT5;5f&wbzzmF?r@lfCS%fZsB5^^9T&Eq9j^7V zt04)mw_bW!@e9u)2aai>zTdaLZZJYqVN#Zjz`d?7LpNTcMaLMsO&ll8Igca_FqRsl zBf&RbG#!aMTf3W^Q*RS<0Lf9mcx`|x*D^Q0%qj_=yHwO$N>+`#y%tnX5$f(m`Q%qY&=U; z(`+0i(Wcqxqd4h9fG`_7K)1hymY^svRB*|;o6=ZM zrX8;K8xVlu6~G)4Nv2G4Jb)PYpn;yHn7hhU6!w>?^(wvPO~iH*faC~?Z*SD12{K5M z<5}RD>-%`%xT7uc1h7RX%mW>Q&ZfwId-O9RS1Hi|`#*<5)xasN22Fp)!vf5;FByX!iF zR4S`&DRAVN!*wsoth7LDE}}kSOPHxob*(4Sn=G;)H7*}RUY%|{lt*p3h{=5;BqY&>AlUK_KzLpP z(LTdWE7-1rNc+q}P?A{%NNf-ihNXLY;K%$>N$))%v!OveC$1EZ(?TYtCAWi#Kaw_Cr@LO(ya0&>2nUQ^m4nTDtSqdXhAoFA`gqX>}73ylHaqzKG1p zk3vk=%$oyg8l`9tTe*ccE2fagi@cb$HiQIN5v;T5Xi)Vtug-w*dr3}Bvvffa(U|_ z+>9#maULRw275h{_dOcFqh!Kg6mG zbfwLms0(;Cd*5VJ+_#HkE3`VkyNPWr!`UN*KI3#x5-Im;tJu%t(R=Y>gRe!-O07Zm zb5Io9E6fKbIo86R)ezub3yiymiE%5nYt+Fc=}q?=LvC;oGNkZKCLmkL1e9h^PT9i3dpFqiJbXWi&tTt zC)flv>uBz5Q`d^=4?#p%v5K4<#j_6q z`LMWVwYCqJM@83YeQuZt-KtRebTlQ5FgSg%dQL?}1><+2X)H8+cc46%8ouFZqLqg4 z85N@m!?%nCAPDw?lW#8hcA?-Z=8>;I$_}UsnSUTYS);YVx2?mKTAlE86p38K>Z3%} z>q%!Cuyx2NS{vuuOWq&)DkgstyYI$Llj9pF4nDu61*giuhqI~*CKAY$VTf> z_&^JqU%CseQEqHu(g?$lBe|K0k$r@jE=I1?nn86|u7immEq1TdN*nG$k;`2THYq$H z31&`?*p8&aWc`Sum9s1Xbx6P|(Re)+a*ybh;q1FEU++M!ekR>p@m5%%wX~M2JH~;?OC%?%kzIq1^kRjw?~McFW%p% z^&U}x!c^pKwmlf)2kyoLG)aA&#Jy;H46sj;57?T(T%{XD^p+{3RuR2#VJ;WZhbE@F zi0*h8MKn(AdRQy>8zr#MqFW`9{fJh^-W6jX!JMe0c>WQs9`+cWd<1J4j|ulCl*4K< zauY;M5Gyxn*Rqx3>?Ra;D-nKFYsg*|ogdX=YD?6x+*;|2eHn6$V{hlJk7`#!=u3}6 z=yu_MOsnUAgmhuHVpOp$i^^cMD1Qvm>=2V5(|XI#WQo@v)9NC+vyUOVH$~oNt&4Xf zsliSoloakLZr!X!%-AZG&7^@b1+i`1j3)Y!cy%)>@woVYGlb3*>f>57`DCUjeH^1V zA!a|Wwe+t+I+^RntDvI1y`iU?*!Q>=%gP18HFqOWNLc12XrpW1HUm;J2MNa$TANVg z20-3149G|z8C{%fNesP7W}dkA2~A^j#XV1Gy^{MwS(y9g+d$!6#OWurtn3pA$K2DO zB2-5tS>lVS1@WKJSY-Z$sJBInb({vO#KY9|IPpmQdqkx0Gf-x@eW3tuu^UWTezXGS zemIPB;VBr+Nc=H$=#1|XOSfp5Y>9Yc3r0*oi9fe!g;|dvxcjpUREDv%%z0QVav$TQ zi?L9qDoVC$13ayX%*c|Tx!-z5^$%yhn22m+V9Z*+NK_8K{L(9&;6A84nbW$c_OJUWk{jZ?aTK;^$=(R&@ z)~geA-sW)9crCU7rW$?>v zQ$UVF0_t!a+bIzJUO;m_FE+dYYkIqQ=LKyYpeegyh0lx1-RL`BK+|ON86%rwn~l~Q zJ1;%}p>qc^EFGW+8x15129Ti#L%i^pn$58b^MK5*p;EVe}BJ>}?TaWNX7D#tgAsX2h#Zx;J<0C(9e+UCZ4Vk70^T!gw_d`iwV z(J%&Qp_oO^ec~WFl_Dz-&L(jaIorew8iMBBo6fqm~1I@WWxsqA0b@(NWBoe)ca zmUk=_H#bxYFbVmzFkYBkx*AhV44Yd)&CA4LEtFZ+uqfWQV`8QPt+Y$h3Ua~l6uB@N zC&@)`o(-A|`%+9U%v?8eVJydzixq-}#4>f1X^}99q4SVQ;d@MZ0W4 zE_$fWmE#1<$c?+e73 z*I+F92N6fZ8K#6F2zKQN02p}2KTQ&e3GtOIR|F@Sq%g6C z%-f1mQtHG4H{iRN_aT@LrIWLX0ar3_DbcTVwlv^P%=;rMO6hEc-^RQ>iQdIYYrnSG z4(7cV6{eI~^qtH*faqN<`Yx90WmFj5EQUSIJ3?HT7|%}Jj&4)wX`v4=?*vL`FAIK~ zc|RvP^*?OR{B}#SSWknr=i_d z7JQf7S{-BLV5#h#N|FaUuQ4RAkiGe+e`Sy*sZ#b%L)9yTEqH_M#TQ~G#j{H)DA+LP zBqP{1**gVYhBCZ5K{oGs%J+!s1lhbhp;5|63tnjRE)-2Cqa4;pfxgZ{udsPvfm$hJ zEciZ~Hwz6wx!y|mgEsH0sC8wmMX$7Zi->-MbC!{e4L0vQiuOi}z75fk{Bah%!{%*H z{5Ls`fl+LyO}sTZ?kj0a$bVUp?6rCSq%4oO0`0eXucgAB;9O=zasYISWTHhsWAhFZ zIaA`w^8(!1Sf#bW2xMvuz0c^274)0B3`;_>; z#6Bw5Sx$N_h-K<2E=Jz96W*@}n z5W_{JR`M^VNw((=$=?f4kAFCx$^J=rdj0e|BSlILLTQ=(b~YI0@1JO7cAk;h zl}2VaQDzhV=in&*19;l~pW*57pTQH~Y=sTw{xm#Y{sKJR{y3gV{;qg>{DbgJ_TP-B z*I$7rqElgBn0*bqjiTF4!+QUGc$t44nuP3MLY7GKJ&zV|-)N*M6|X%K2=W-)NvqWEg@!S^U0y(x3#fO=KLHiT{Fe|7^FNL9k^S$X zYVd>~vN+Pu?5XnF1O<5>W*ZM(YIuT8XxoS{Pa+3QQ%Doh%Hks{}fUJ0LQ$8dKiVKN9aS~Qyxk0l17 z6z!v|m;*#OPH7o!VQ4iba2|zczuv@{8P26VjkS1^h-V7a%zlG~aTDfa3U!l-k!8Zz z2=gzChXErcB^3MBwysEXa42%%xq;+PFgPeXQ*2*Qb~eL8*r!|J(n->*gqdMsf`s`u zVP;tvBOkvKCShTWd@O>p+2>mrS^*2J&nMIZ3q?y{fn9`IXklmxEbzN3rp=76l0Qlo z{#o%@^m}NU{Sn(|P)WQs^u9-ybd&7?sDm6!mV5(6|5@>Z{2a7DdzB@}DDkdT2RkiH zm?Yy(%&d4+7F@hCE8YeA<(VCibv5+s6O+%)PwHz5}0Z*8>hR8*TyQntb%I1DW&hM=~N=Z-L}^!vvKGf=G@7Cd4D7#M>3|aB@);vwz3YrzrGz zalRs6SN_s1a^}Q~m`!w@6K@mhh5B%OT?&SbRw&&}#}7SVx4^u54zlP1-tjYGu)G!d zl5EZ|2Z6)#R-_j?5XZ0Y7*IH3qul=fi2-Fu?mh@&R|eqerV3R~z=Asd{2t`=v(%n& zciEF5dM8sJ9EKlx^1g^x<=||m5uxJsxlojjG-Cr0mOZ^El0@0uc)j!~kmJZ?*Mlud zaTKyM@Oai_ibZqd#qt|T;$<);8c^6iMp$N6aVx^~wJ;8<^e%+yXJPDw=}(xeEQ|t- zl*Al8*=A^Guq~8E4&N5f#7yt>ZSnfahpB{bFjA6P zA`0dqs~g;62wavf?wuFcive+oYV4 znc&b_&l-*#nxSF6gqnvX%?lzM!!D;N#|!(xZe^E~lv7NY#kJG$Mo21^m|%g+qTfUc z*=EL2jFxDH61d|(6L_&Yfp{Z2SZtUdZz-SmiI3;UbLBU=xHLZ=i2p=QGbW$DEPM^6 zpsrji-7P8IJ>^>Iell5fUl7mLN}{05mTM(#I<%YJBiBmW!<5(uKWj(XLHHKNTNY-+q_INV<#gv#ckKMu`4Yv$ zT-#Amu{CMpriJlHyQffHjx)Bi2Fd*{oIG0a#+sH3T5N62aMQ%4nhRd@e`wuUG|9Ey@i#Ye{1@v_|HXnCwvU9X<}ZmKb2xf; z?ANDz6R~|lo1&Fp!~>$qGx3nP`&c~kNcWZS{Ugg!-L}L#sp7spagTU#cf1tqN5^+# zRcMoF`eMA7Sojj~cfA-Nhee}bfxt>q*&aA=i&f+t72oWMufYrSJ6^)N(iy>C2J(XF z4M*nF#JZQUh83D7ek8YOn&|LKd@8=4^6V?%>LOfw;S3Ph?2W(1rd8#<8gIw2@-%!O zuuH}EeGrK4ey_pVB-Xx$Sa1o_e$aMSE!!VYXGqDTuLImKekJFOD0_nz(x!|1-@rmy zd+`lGc72upCW##{rXPTyY2qv#nJ*MK97KwmEELZjjMrmh&7Fc54r1wRyl@@D(w8Gw zk{%E(4`INtwxihcrW_RG55-k`T50wDHTMBTIv)i$_QxEiKo5X;Ncf({9-3jLOifN3 zAxXn9&lrz3g$?E--I>bGcAh zdq2l7Zy}@&Ft%oKO&q(UdEEpJ*kIUN7*3HCmVy$0`l>FMez|x_+Rk6-Yx;_QJ>19g zojY7^`F=Ru%kq7DxQFHY@^E*{ckFOi%lGl&GRyb=;m(%t@Zl>BUqUK6aJbY$zIM2y z<$L*XiRF9YaC^(Q^Ke_s_tfDlEZ>&Htu5c9hg(^`4Ts~FZ_Q!N^4)*9rRBT#a0|<~ z^l-B-mqt-Oi|#z!)I!cb+}QHXIo!zdCC<&<+Mvcib!)vE|M;y%HU1m67S#AhZOyCk z580Y4Zu})aTD14NGM7ikdeXafBr`)lg*750Oz+?uxy}9F_m%;D64te5O>m$N3|;+D zvnH5QfL>6xt4%;ihc%U}cO>OO-IRIFfvMh+lny|7sxC0qJCe);CQuW|;LfI3fIg)) z{O0mtg0>@A>w{mlfj0-rCn=R(;B7FOygwqSt>JtMt~h(NgzhNc0x(tzl@jy;Ofh#f zt%4d);O$|yCvp`zoW$RSl*xR3Op>N>dsLF9@=={7X$CKce-alYLLqoBbiR#w!}@r!#J6^k zq^3Lzd1}TNAV70IydBo1`E_XDE%`a*qnLjLMbY>(NJN}ZL?U$F7>Q`be@FSX=C49# z8@?7Yui)`|`0^89*Its^aTPN6pv^<*OA=4CMDe^V@k1EBy&~}`$lYFv)3Oxya=nYd z*vr)wp|O|iCXBMNm+MQE`9X=tQD287ek1DbEs1YKHr|%_vxxJs#P3D8cO>2b;og<_ z<3M85*DXN4C-L3T&G*5Aw0wZ^9WA#Um3UTxBz-9HFHk_(5w;0w`&i;bp{t)rd^(c$ zsl-=8jXsn3C&(hUiFM1Dq+=3aiy}CVqt;xKP9XZIBz-RNG*spn5~npNY#|Gw=COtB zb%_32;wKRAHxh3LJ^ohWy;D#N-$}d;s^@!&yTN)I`u2UXxaaryABp#oRb_zl2T;8) zLDiLOoZrGPrR=dO?VMu~shUCh+1~JDSgwAKYEw!KF04~BwJYQ+9V~brQ$HnoM+;ua z)Q3@RSVNx#QM87xo=*eZ$vMk_6O~NeMhsUv=NgDjOnsT!cV|n$Hl{vD^e#pcX%SuZ z5xvZ!?_}y;qIb3EyO{bj*7LB2PT9axDN_#-y}L!nuC)$Vc9)bMCcRT^KU0Tda)H%# zGr$3+<`Ue?g5PH93s4oTuAB5DOg%~hdpjRA5`2`YTg2f%5zdD~=F zqvQ;?=oL0~dKbVWEO?$Rrv5-BJkmlew5jJwz$mK#?y{*@=8ESp#_Px*=ZKFl#@nWz zqX=)b__x{A-ZrJp+@erx5qH=XSfnQjlM}3Wo{Ywi})ma3dw7@j= zI82uEl_e^qW~h|tubl@Gs~pQzS6m?yOs^|XP`4 z>8<4Z3q-N3*O!wTi;=S4*=K0FldnW;lwjIcE&mupe2l8afORdRV2Xq8;P1zIInV2KK;C9Oz33N3P`*}RL4M98ry3KG=1 zR-!AIXtyOY+KbN=8{;Vm}UEhVwUYMimpfBhv8DLw7A;% zI`(OXMsCSyuil&^%I$jn#^XAHtDD7Du08_0s&u!&er8g8@Y~U#1}1fte>y!de2m&KCZU#W_@&a=z5|@1IV*)I)U(fcSGu)kK!rwAMsQ;ZBF2v zwj5Q+d^I_Wq&Q$)?JsYo7?~_E1rBtk%63dmLD$27L6OmZ%eJKuhQlbxl;hTOU=Hj< zDKJMuC$5PQEb*skSi|^R==!kcbtPJpV_pWxfrIGunDgMjiB(3GArUYXoUcQwR6Z4L zC&X_?&lcsAVHt|}u=)}@)#uSn;=De3{0hc5VxY2z@qvuOsVGa8x4|>SN8uUe*+r7H zknu!ExJwxy1Lr=*?}Ssy_+zalX+P2h=WWK%!8yu!7_lBhjt-#(IKM2VWZsEfFz0s> zM8zwS9EpoMl%W7Dfy^6VJZIy(z@zX0`ZK4be2iw~{OMbS4R%0jOmm7qoq8<#AdD1V zhMj{PtW>GAROGZV+OH|cRCFSuJ=Y`hwp=lo>zPsN6P!sb)kowmY8wc0dYIXGhM`9g ztH31>@QNy~w@<7^(Kvmq0K!6B(4BgmL3R^@s&h~?&Jd$ArbhP_fni2mFKFx zlQnWf7hr1dWQ}x35LfM;tdZNjVz66pihX-`yY+y4DkdIw>$z!tC;^?!{hEy4Z$w^h zFFtYW=nm_NKizsg`OaKXH%ZT_djYM?)!nA~X)W4yjqNJrEV8Z)$bq%Cdq#f97L$_n zTzOKC5OCu?P$#a@Rs^)zA32Ve=DOa*7|YX<&nZV^EgpJl5y1)Gvq^f##A>ut*93z? zu}-nM(RoG&A`PzT7C*gqh)f~O3=2cA9U^xVW|oDa*A9_K36roeMoKnAqg}N(-bVHk z=JLkdAcB2LsM6}Ns4&zJL zCfmbMFnR^y|F#3*&9-}x3uI@9tpx^Ok#cC3tM=aA$N&mfWhIqfQABn?UtBva485X= zoQeVStc3{yBPA=Y$dk5S5Se)b5qR5CT3)ac*e^rmdiA=d_SD|wYidvJO}?h~)ZXMv z+H;#%ZyGvQ0Fft5k;uSF8%>Ik6mh@{m6_REobs9~6Hd`{x(lSjb=p=49xxAAUL)o= zNyJEVm#*>pA~FH3-*ug}Z`Y_Q+Th|EYw;Kg@w=FxqDK>t!>GE(o11k*9kbA?T!WPh z5SvP}sSx~sqSd-4DkscH_bS)JkVU?O1#!J*3N&?Y4D5(&zlkwkiA18!fjMYmjP>%! zO;mt~EFM}Nx8d-KC{p$8#7U~NcMOsgGS1<+_9&|mRVu}2BxECut?P(#8(_Qg3R<{_ zv?9^wA}`V(K9&sVlMf9@4exOL{N*ok{#qTS6Pn=u{ZAvx49PPILF~$OJUwHf2Fh+-5`9wjK;yhP_#EtAL!_kI z(Hh;HeQ1D+IsqeAcbc)Ok-D(v&Be-8y1bPIV&VMqa!rkTlPVHE?Sq+3l$PJ|c3q9x5VlVy`Uv@KT| zj^>p#>)(*7)VmUC*!lrFRHZH&fM>@Jw1$j%lpfF1>;}ZZ=QpJUjX{+$-Uzj7ll;#> zr#vsRt{`W;3o`Q@XActZ6X;4MzLz>wUJw0LlFUy4K#+mC;$Hzhf6!7$@KnguKomwV z;v@DefSGGyXg5G)Ln$!xEKDk4`lI1^ZnrRWKqNAbLM^Z`^yWG;zo9r2z`*&{jv_0l z=cnaTOv_9T++!G1B1vVUe^AdIeWpDq_g@VL6-Q$&>*OFXykgV?}0lq`0x z^#KRpgZxPR9XwIV-@~?g2kF2E)}oS`clcD|c@WkK7sr`ABck9LH5mBdB;bp@lluS@ z9^W45sqcUhB@pfpHTT|PCRPbQhe}L%r_!B6WcLvG8C^5VQb>y8n z*nrZ)SD~uCvrG*Ng;ztdy|b@3Xqn+zFu&f4Nd^=RuSR;ji>4V+PPiY;hWE~063NUB zFGU0NhVL>pFE6|TYVBQYLiyp2sUjHCjpU!x8bMxWR8<)}IYsgsql23KOT>-=vQCkN$+Gd+ zN{mRh79qqzwg*i9C6x7d4HKKu09_AD`HW4Vs5&(yQMTR~2_+T;&?CT`2r^Vx^u(M-J{K}I%Zj1@_Zkxi){ z>DL(9lp8Ic8Y7!B&cf6f*_4|tjA3LMY-5T!FHjimWQZ(7qfMD;@z7W;l8e)sy|VNc z+H)8Yr_8oU*+e=>m*!FUp#pzozCKnRo~MY3<-Ok&!A%8+>X_FzK7>`1ZijS<9j4569t-%k?L&?uP@-T*CF z<^vFg!hdoB&yS;_LiU~6;`XSX14AG-MfJ=CEjRj-87(iO>U`b1mrFjcwYH%etL45F zi<+k149o6QEow*|OQ6pJGu4BL-oXi zgB-NTO^ju9U%C~zg*u!9hb(FwYvSV89KBT&TKx89SzO(HrG5KIzB(3Hxv`Y(%eJWf zB!9PJ@kNfFo7xuj?rXrlg#Ka4-mY${CqlV;oz$~vl)lF7R|CJ(p$=*+x&SYK9uwD- zI}6_(C3k;JY$CVJBleSfbwlwrxz_{*kHNh*QxuWgp{?i=)31;>v=j?sdLP^%BR-Dl z`Es2WLeA53^RFpIe8Y@mUW#li3_ObF>lyM8-pn(roqB866<=reu&*c?Qn zmcn%U`WqAkP(Nw5GGEUtepUnaUlvwX&rww4Eig@;4x{gzV1Xe_W_*z3U(#G$n~$L- zvb!L^I=ig(_JH8o=);YcHT8ZWb zdVPGXV`u@^@%kozzDF5Z3^^82ccUxz zJ;tcT(_4fXtblK`HG`|8(iwi=H$0YXG zBE9t(;_=Tv1NOi(s3n#*cmX*0YNPwuUI2`w+>Gi;8-6qJK?z1REp6fl@P}W)ydZ5d zc_~r-ki@hpCk#jlf71ofRCA23hPO8t57fnM;~dhKHtinp1R5dLEHH_Ro{vBpV9hb$ zV!T}l;v}UtI0JKjA#|G?yF5Z(Yi2z+Ql4a0-c`362Vp+@0`&BPgmNHigyVnzVTM-_V!9 zcUeXZdiYFds)bXz2G}ONCJ5+&*;U7uNZ*2^yOSl+r;15%1_wcl! zc)Nj~Azv2|-#5@B2^yRSWM-=RF!g6BPQYd@t&CD1?+8#~-3?LKs~e&K9o9vgXi4ikWHdeWFE;}w(` z3wC2qAW?jQ2b}y`7uf?kONen;8I3e^F=A8rDCEx0&!a6kB!3#_x50jF3W6mo!PD## zJl>A5C&3?#VT^Z&sB8>dy%2E)e=<mzLfzS1JkdnYOFRJm2%fjlrKyxhdX4rT^f!3P zLU&h3!*B(0Z?KK1@+*KlLO^IVfA;0CgvUHVYi2?j}&Nz+tKb1|n#;z)?BA zD|?^}9J2Ys?s{WT8+6Jekrz2OPHmAaCN$L>$&Pff7H)?vsR->gxNR})sF+NdOtIkm zWHm&&R1N92*n_f4Yj{DQ1!Kp>bGgFTOz+WQ2Ey_5Kb}D};g68l^oynjNntvVo_=W; zm46J&Xy=jobeSy%qjCWC8tVTANPz`$QP~W7Z=PyW#zUh+6ApqYFax^ILWxYYTHXZ8 zij6iXQ^r4bKq6#7|3dTr1ZVI=lthEjY6t2%+zI9@R7qay8CSq0h8}$xOtdOj4pE`U zOo)e{AnVvHm`Q}Tny9pJ0mZQ0gs`HX0q7|c$_#&z2k2=NiiVq_8bei- zQaP3vzCgKq)`arIE7}6uMNLMI6@+trfL<`6!f-NLXy`>+c%^>eWAS=(J?vQ&1@fgr z2n&8MP6N~BQ*>IP*H0OFQo_H&GKH*{3Ou}^J)k$uO80~-DQfE#gBq@b_7pm7($c~M z(nPNodPbK?9f3V!)>1UAqh3SrZAbA^(&=SF=zSB)58sY*4Sn#F5pO}b5LpNvHKD@r z-C1IL3q6$lZw!({A7z3kn4KoxZ=n~+^K-<-7J9qH@C0g*$IwhA-T}&h;Y=53Re1Du zzz5%g{Y(o_{SN+co*R#8)rv#Mr^C}tND1GH0b|%2WAShy37BEhJYkUuXqGwTQ^RzX zS9rDw`6MNA0W}s*ETYI5#_pNnd81JmVNT-blb1B)JtQo=pgOWKP`~g(6XN0WAfP*{ zBb!wSXpsr2;f5HEh3_11NJ$HCXawjklNQ3sETHY8b+PU#b9Vw|@p&X7um!cvGDhDI zBCms{B5{^)lu7}{L>Xh}0H4d!!O5;*#6-VOnCY@V#nNIuJ@E%LG%ppn3>04;vM;qI zPXRo`$%D>Ennxa}yvb7v&x3^NS?w86O&S5u9wLo{hxVZ5O|AA+RC^Xxdse_RJV8vW z;WJ|01dox9C#yZX;4vcGSM7Nl9vK>!_Ypis5~;Er324Rp(|4SVzDF3ust^-JsnnO(}J=Aca1vo!!I46uwdiKrahu3$@7Z zZ2@yo#o2um7R1qcW?y9id!gsijRiSwIM_IojO<=?ozL5NmFik!ZpI&K6)bI=8C@*}+i*{7!t;l#3DUY%QIOoTBi) zN7%wtWHi><#1x*411PhAH3%5%W&yL1+`Nus$;z|B2VnB^I$1y}YAdhvSPkZFItKZ<9dD~jWR(G%*?4;>#|$YQH%K2F1^-e&52A8$rH!Zu26*(u@z90q!$>y zUSs`WpsiIP#@V6^ubvCu>E(4J4bG8d&-m(g+fz;(DJ zx*2%>ARc;vOl44)U5B8hp+=1Th*r-cXj@TwNS-L3cBKGM&p_CfB9_R7H9Ew|Ftd)t zM-R!<#o(LTR?K;TMXQFj!pfPqA49{HW^r;q!L?4agJNSF{rp&JzTe`XN#)dl&zar} za4wo&YQ(gA91PTq(@ZZl*H)`{mOcD>NB)M zhoR+tIt}gDr>t}5PJOB}uhl0z(o4%am-Q>@KD4aY(EdZq`<3(?+PBNlPCcvc9;V;V zLYJkQq@i7gmUil1a!pmy2>oGaeN`hhmv6? z>910yjvcRR(Nvsm+$LQ#S*Rz8C*H7m#OcB|`BnGatPfAF^B0LtAyJw*dgSP_Q%4WI z>0hHpi?sruh{&3$XWGQUR&B1Tx|q=GI#SJ;{!%Ih^Yz|Nai(h^GeBBf;^pmcliM$0 z@}q~^ztY}|&s@Lk9$yt+qF>E$?clOcoiW#-hcQc$F;EswCt;-S`5?$01o!GFWv;~JK=@E#?LpurYQoX>w7$&k(G(8oJ+0zb4xS!nDGupZxX$6>5dq$*;RS+A<=W0Uf{5o zOVXAy(RNWFSAJ@hSbalrp>jXww>6(mlxH3ir@<)?xLReYjBZ|O~4TTU(+a-x$JCznh(;mLjzKN)X=X%Hr395aYqbehA+jY`rea&si< zdUA6mX&kvRbewcYyPStJKjdQMHH}=13ucmw9<_qpB8+Rvtt(-FE!=weFcrBN)GQ?z z{rC!UFHtg?gMsj(BE&i+#Qztg5~bBTx07p_>Nleam)SIa(}Yii{xVD>1%Jgbu72F<@U7PVWyjq zZn6-!TJ8eNU17NoTkcbqyT@`5TJA@d`<3OMvs_kUCctaC5z8&I+?Ix$kfaV4qL<|k zvfQzjJJoU*TJF7;yUudATJA2(ecf{3x7^Py_l)IUwA{=NNZ=JHs`li8JJNFJTkdMh zec5uqv|L(5B>sjStG4XYA7(3qktU+@s(PwexHhxBSh_x-iUyB{Rk3MIAS(B9h(rBc zL2=h^{qpx)jBCD{HEW7bxXdZ5TU7PUZhg5U@ha+<{U+lbGX6oCR|X48I9t@Ikh@aFk>x{Po8YL3U2J0n?K(?Pd^0u|G+H z*C95!WUiaNdzFB>{R1dcb+XAscBJ#T{t$D95@2wF<@JU~)9SnxdN>5ZX2 zjyIX~h0OCU@s~RDDM}n~^1ztT@utQGT**A=h<>HBg#mA39=iJnr<=_1+n6VDkr=u- z=@v*j-sGWgUg3C?$*_}oI6~rhlS$vjJkJu`&7$vNo>YRnTlBpw**e~2hTqRTdx+lC z;y=JVC#k4=S@7E|;rWqLRBj=TFi$20=u=v`y^d z1-N~-5@|$r95&A?3Odq)7uq~@eiBETtT=3*Q&ec9E&5WMX9m%)v)~mrkHaY%zOJ`T z-Aie`(ZX-DdB)hptk?BAxNY^p*RcV4x>LOHx;}(GR+agNUcdrR6ZUEsYB9|%GJH^a5^*oinuHmTUPmr2HhdveC-o!h{QoDHTO`P|sKxUY~5}{@P zGw|E|iz&I1ayv@asoe%ism$5_4Y>YA5W)PNz$N=X0vYeDT+ldYDcx?8Dm!~#BCZz^ zUiGgBSJdAL2rlaI6Eu{> zVV6)~IKnxHy<%iQ2{aH}4xm;VImMd?^tuBFAT+zg)=}DCf3%xn54C91EHDBH4~iKg$0vUl_g(eEhU zRYo8>F;v|1Is#uo%=BrMtgFTFclD04-zFY@S8r4tg3P46NhF!+?ZK3kZvkr{C#k>! z=&G@#LJMf52=@_e-&!h~9MMC~>8m)NE16k3KcHJ`ZInPOMyJUfQ-jP!B}AVzZ%sa_ z749aOaYWC;7co{H(L1mwsy;b_4PyK*5M}9o-w;=Z z_;YRB|HJ*L|JP5+ZTnJh{x>s>S^D4oBG%hYSYg%cC-qs%KQnP(v#Bj^I=`#2Dz5lb zcUDdNPS@=s=dAvvsOaZVt3p5OAsc3vO@G$uYbtZ#*gYi}(2HdWTpBSh$*zhEKkG%V zG$7+px`_C*OJ=s{a$YZ&yO)Xk&+9$q?tR6#aB-Ks{tNb+EHx*F$A)XF+@QZ$^b018 zuV5^Gqxnsi{lDlcYb1vMXvY_2$zLhh1-(!%?Jw$Gfc38wIj=_x?H^#UjSp-t!Pd%Y zVl5c#3o&f&Cwf2Mc0pCYU-kA8-{)wKG*W(#OgtL#9I-L2Rawo=slAsq3@ODei*a4a z>&_xJs;X6>)l?;gc3iXec!^OrfRlTY@p%^B8SB2dG}R&g9c~p$e2S@yatd}usXqb@ z1RrSm9Fre~E__j{Z%dtzMN~zg5h*3}iAQn1k0ju>)J?$AbqH>d>Y*vx&97UX!nDVp zb2V5M`ZS8&ye!oRx%TSIQf~l}E=$D_*ti4XDx`qE>hdVsEvHiz6ZlHRF_FKIgiPWg zEF4be4G`TFUI^By{0~gAX7F63ex|YAZZ;=lnBYs3AemplgYgH_P*{8-<(Gc}Dh>#u z9PFIlwL17MNU$@(+eX08n?zwqcuPd%S=#5MwrfC=*>P zPjo>pbNGFzqg=imd5ZCJAHxMfLtWXJ&SHCfRIuQa5ecR6+|01QKQfBoH7Fs`MU^UX>)A?WYkKfHh3=jM4bd*1$@_tZHva}MHBSGfom z>nXM2dXDlkvQb}=;cl+79ggNHjZq8@6grHxp>hbE`O0(9)<`)U1gfzj!EgaTZmUqq zhrdmf&wqyoPI$;)UU+3VnOnOrc%Ink!Cl?h%v+fZ8i4Ctw0wAk2YJ*aBfV zoWd3eDv;O$fp#s&76^v`VGD#jIEF0{<^cI&P*CO~FW3X27CgZo2q#c?um?g%L?3$~ zypCpwJrJCT74|^57lETa5Fmg(5Jtf+_CQ#KqQ)KwB@n)n7Homg2d-fYgqeVj2?LcM!E;{bXKqvtXTOj;~(*6bYZGD8j2x*VpK)Y<03z6CPW;|Q85+zR$B zcoWsgd52A}6uk||N>>}6D|*jRuDjV*7l_^r^W_@olsu%SuM2OyA~$#%KLcUKVKo#p zd=4*qe?;**``a+~H!x5L&H*-z{SB_5Y@7pa82cO0Np8*x*GjGr`x``2GzZyq>~FA! z+#GDfbETkn7!}f;HUj$_q>+Llwx8JF;AirCs7+rid1s)$IEUHrGRgZQ85nNEDZ~SzvS&g^zknGJVHu8AbII~Vdn&!E}xgY z{mimdy+-PA;+t&ixhZ+~kmFNaZ*sXx**n2p05*1yxe-563y6EB>m;Y{ae8mc=8;tW z9rmgDbef(%I+|+BcU&30N10DS`kvdQkJHt6+^Ch(LE#(38d zc-mIwvs%v?*9H^=y_0fA#pdjKEjrC0U2hQh70uCk&1P1-OUUl^Dnn04n9rr_O)waL zpRU)%!Pnjly-efn(WQ(-MG&!3!+ymanV~18@^%)c%mtdi_SBf-8qT|YzEOj0uFue$ zr}5V2wb9t8;TtL*&4$sMzK=AWnR>n8SCr>yg*LW`{RFB+*TxT_TKNV13?J0f_?3pM ztQ6s@DEmOH6qOC=9V&5mHx~`U_2x=)hKb`4l2`{SrYudlPD<$eQraUR0bF?5APQ|y znsE%2*l=8!6wC;MTN#6{0w1h!i#>3~t=(W0lr)!g#lC_9XUd1~6X$lIam8?_D0|TX zd6hZ1`jjcK98l;@#;`{~8x$G#2easzMdbYUVWuC~= zlf_S6=3iNQl6cf*CfC%H1JpGt;p`9SrdODJm{cilMxBwEUV)C$>;*2?!kk=FFKOaH zEEJ8==PW*|j&3E6^@4eC0cr6u3M6&#SIB+>qk^Kga4E|CwWglP63nn{JuP!EN*kX) zx{zOd{=>4-;DxEbkE0K*yx|k)A{Hq>L0$M{dZ!P@Q?7w4d|&HewPbDIS{<>WIn1IV7hPnkVb% zdBNlGD`Hwakg;Wm3G-atfV9H6_OnncEA*O}qC9~b?^Zs839pbqTcI;gIXgzYwRktR z6x#8f8`OzPBFK_bK+Q(!1{R0%JPpV~bYnCHJlZD{5whnOmKTJqrxxn8=U3jsJ-g7y zc+Oktzu=JP0#7G*Zh42`xoF{c!ieV*Pm`LfY$|CP0i&L47KfkgT({C6B50l)Je^E0 zYI<&3c-o%BQ~C!71pg7ru;@9#79-DmsmAj?qX{G;=T#5^&kr^z^U0s*qzx)wui2}f zUN`4BdHW+*N3U(xCGaP%j)q9u$lr6;rsjKpGGD2u7xjA`4aM`9jcxCx1zL|FT4pgjq&;pMUMPCchnxFy^cEEhr|X58^Ctu^?Yc97Npd0M_b?@76$;QjR)JmZvAC zyhWXey~(wbat5ImKd?qecS^EZn5P%inM!VbX2m~{a*_0X{sb9D-*btw^MwUvrc5$d z=IKdES71y$l1Y)nrz8%U$l=r@$?up4^Yl12!#tg*m-p9EFyg63;EO$q8qK^zw;-+1 ztIUEz$4a0xS_hB3BUb?LVw&+I(OaXFX39ZyA)*o=pw3|<3P4tF0`E{3LX%UF`DSQ1fL#wbsB}Nnq56rH&hU7p18y7HU+2Ey9hHsCuAg1U^#C^9}T*$U@Wu zDG}I*3A@HjY^Y~}2v&m;qmV|YQ;O?cj4~(fBQC|PXsE}h(I!XYw>IGdCs1|x)hxHES*g&- zKBkj#aXxgW1Es_cQYqae-V^YMeL`Sw1S)eDN{xL=-~|F(P;d{uE+AG-U^4TIs2xT5 z`f|~TMV8rkdTt^JW%zevCdYQcM9xVP8P7;XA&@y9%oG5t$j=bK^=q5%0==ua*kcYV z2xY7}WsIJ1WgI2F%_(CQ(39~lN`N&dU7G+}87rZT(G1MWSPLs--K>nYB;I8pS{W-P z@DBoak)~Dzu0iLNxtZ!lYo4*o1S4Z|q5i7K=9@cpJw+RU28(5Ls%KZgT0h4;rRyW{ z%0_2H|2>92ACLOUwK)w;EPM-;8l%jb@aALzTO> z$ZHV$sY;?La|b}E%NWg9n3NGx)s(%5%I=M~EZyr^F$g!U{H?IV0L8_N%%8w6jvLHRZF6iGEC~1T#s7$m zk$5c(eJi>}!EdHs^(V_?uo7CX8A@v+5I3CJFNx(2y@~_y`4UdKmCn%ZQFK_2R8BzJt9*gZNmHgnYn0Lh>1gE#gepd955HrT z)6fv7><2Yo*#N3fc?M<@lsT}IsJw`4l5!o?WQCp}rzr10r(YQi{WX;T&@y>Ic@`>C zmCi7qrhJc)BV9QTu?(E)gkeIN4xTKfA9!jixu9k%8BkP9p@*-v6$kKjlzX7AEl`O#w+oXHD&qS6B6}oL|qAY~8 zuFy`0hC(Ng6e-^U-&A=8nQEqt#~9UISqhK#2+971^VA3 z&AT`0slnz@jYaq&@EeQpYr%s>_#Frn7UA!Q8Z5$(f*LHs2M|px!Y_oEScE?eH?auM zz==ipXk-J6@Mn<^EW$5`D_Deo4FXt%uLXlxgfBpdu?U|80W88d1Pk^d{@jdwUU#<1 zf!Pyq0?uO%zAXf>22ZOwScCUK0Bi91$OP8l4+Duc_$)wJgZ}{#*5K(O2d%-I{hrqs zHK5&>nOx2W0jmr|v;^f2_{@|aAS5a+fRU76ku@xkLEfPhn8`2b)AL=(gM5Q+MRkp$ z+cWtlPiun+{|8SC(Z$FU-WNK-Xi+UDXukJ?p2GLJl20;PX2N=AjA34R0qco9&GZ-b z`{z%mmpVz-!+h?^|hV6T`pM3ro?U(5yqWgD!BX>Fc<5t<$_V_wqhW1X^;ethPn zm-ObWpSkrVz0UyaljYgainEj9fUG==tD>yKq|K|`L_`D1PH07SID`6I$&|Yhj7m}I z1CdHud5DmTaun>9Ud4~FR0fo7h*2dZYMWzT){BzqPF)dideP_ju2B9%H&nj;Ui0mj z_1Uh2s3M|rpV@Y^p5DD5#YlMyS1bV{OqfH{8-&ulr=cKzAMkahr#GT7d@sT=X$>WD z3*@7B3#3g0sAo%;ef7X6J#RsZ?*Vh~X1!MTBZPd#Li&94L{8djLCHQZ(Y9Mqz&Dmu z@BA-Umf@=)=rs$<^ld>@q}^0Ma3AFR+-$xDi+&fQ%zj(+^15M&g!BPT3Q?9mA3+DG zPT+RTw+S(mKD20F-%iauv_;Qm0rMslM4lo0U)r}bz8o{_6}>1yM(Cuk|BD>P&xT63 zbmDu|XWyPEbLK00yBdD->on~gn9vL@Q10MlD*;G3Xx@on`r#EljXiF9SznB%wWUE$h0+x2Iomy+aH z4z>)Hg3-w-Fgbe%_)eRT?a=Fs$0N;sJM;|kcaQn=4m}BC>P|gH-0$6yy;J{KuH&JO zWscL5-wS}}2pArQgYXn-D!#9I3BVAn9!D`9d=RYi8{+)dqv}JLNGeO&h(4A_AGTkXts0E ztI-nQN&3ajr|L4d=Nmh#=Bs!m*oS?;8|0d6(rah4hC5zsWE8NlY=}<8zy0b;;(8iC zn3ML^kZJ1*DKu$iX1xN#m$jP+dx$ACXZ;?|$dS}bhUTp2yyoZvBiX$UEkm~EtX<8e z1xCYm8IT^YP+vSjA!jElCCKI^zFGTZr37lHC{v(nrg8wi?COL$>-T6!ijswX&aJeBZjZvZI#U{(<%LFyrvMJdD)pc+PPr0g zPAN39gLG1sUzr65YbZw`7*Oc=u~da#SWZ)Np)g(f9HugqVz`{C(1#sa$~N%SRC*%9 z*?gzgTFNl+)aEZ=)KN@mtE5bVc=*nXr|sya;NZ(iWxFK$&NzG%-@T zJpf+|mG@z+3Ev`GSK?5>hO!W5ij#Bx#k^k9COXr;5p`+_rnv+HP=G`bIltlH_SC@OG(T%!=M^-O;moG zYyN81*9~WzbeKIMC=bDR%r%qXAm*CiKmc>iKVSiK&6fDVT+@jPh`DAXK$vSr0m58U zfdJ;3jm=rQu@uLl^@})Pgx6wfZ{YO45J2~4OSXPe1kubaXjdxp$iW> z=@}Oubmk$etC_L~F5^MxhhV{j&K2+u4?1_7?-_SN?wQfxG5qs>o>jgI1)C^NOh@QHtVO{2uf?cRnwR~Fz}H39w^Em)m58#(d34t!np z>HATti5Fo_T|-GsfD?Vhv}q!k=rN}ceCqQSq$Ex<_mmj5x_?B-S1hD2u_>~mZndD~ z#2ctr>UIkXB+@;jy7MWnEF*CUL9ba*X5xpa{OWEhHcWsMYn#nl7)hAM_Gw|XZ_*R> zTn){C6NeHMn*SzlCVQdzZ{mLm`qZjsF^S{NW29w~c>_PWMdDJMlz>Iisb~E=eP|PE%VSWBb6h+l815m$2{Dy_Iz z>B*0fR39}`X@*7lcWm}2 zN{vBm;Eq2^jaV`EPsBFtCs%WrvXA7e^<#utvyG7-vk(02$x66rFWuH=U3c8w#yBLo zmZE-(LfrqS(FT zYM?3lNfbo7d2j2Q@n*$HBR3*9gah7b?p>7~Pnr4SXv~NXn@z^x=c@U@7^4m|t#2v!kHG|Ign48PrZIFB`7+Zn7W1Lc>s#}o z;;|r?nO(*jHKBAm{k(0i!H?rcF6yT>3p!|CAk1+?!1tqAgu8#oy1R@FO-rY;Mh{m& zzvzL=%_BkM*2}mTQe5$lCIt<0bIl90Sk35|E65Z2y?p+YEsPaLnZZiqT2LCX^lJNn zcbnWg>OV`b_6xkWYw6W7fx)=W3W&SByANHh6qa6{>#a=Nea2gi!{y%a-M#ecB*1jg zT>6NgPW$d!dUZ$@eC)Ju?9!{AG-!ZE;ye|EqF& z*NSm%cmQyz+@-ct%Y(OAJN;JK@bAo&-;h95dD4jcw$L?q>*!rtI}K)%xuKAe+}F!0 z$V504$IMFMG_}mqEC2Rj)PwS9bbs#zg6cv8=O;eiO1OBgQf~c1 zS?cI#Mm=AiHAW%AH!%C$a;w7XmId4c;glyq_{JrbT*5mX=W5k1FmR#+2{L!oO zo|R+NvH0DbI5zn_i*&z%xCDzjoo8G|&})5fHa{_JYT@kO0F3&Q0mOQajh%|PCPvyA1Hvh+o*jEdrmt189IPqqv+oZsod zSxGV~a!bdxnp?i-{K`rpEs<-Tjqn8j{A(tUQjlK>_2*yKwZ%p6lvx~h-f&#$(t7)i zs~5+YMRQlwvk$1xUY>F1=ytE(xP0lA8<($-D(lj^_{z=(&t8742jGjOr%UT+&$g8i zzri-w#i3lE>zBoSuKsd*M*J^}gJHzjeeIzig>;_3*5R$YuKDCgfe}RioqoGMfwhiq z-HVI%F7H{EG-5@o^f%r*t0+TK*$w3aI0g}C;RqpH|AuhFg^ry2;I59S7!9`&PP$;7 z?zmuAb5664YYevFK$~(Q;H%hu=ISFXK-WJ{|9QGer`%E@eH?;WQ2xem!(L7rA=GL9 z+mM%=mglwe%}N+Swfeqd7AUXqR`faj{y}oV**Y*L^}NuA(&4Se)=gUHRu$clbP0}y z4qbfZ;Gd@hodUrzRE|PAN=&GKIb68bG}fnmPt&n)t& z0i5jUF>lT>0y_@hXJli46qC&}qJs+eg|gx*ceP6z!BVw~q%DEg)VzFcyt}KE*okr5 zh*!++d@#R#I)c^cXhSr}*LGoJoll68+b*xFQ>g#9PJ!sV&y3^UYb{6#wZ9J@v|^Rs zF1#117Hri*GNK$V$8+!3{Qc6ux5F7S*Q(Vp?=-DC97Rll_H9N zs1xm4kqY|RU8(I;&FAJBDS1idNo^CSC6%*)Qqgxr+ODK60_xj1gmc_(AwWKT!#$%E z{YRL8%`+0@BN#%=Jdaw(ESPV69xjc(ca*c8cdIu?s4}-)KP2Z9`$h;j#Ssy#_UU_55+ZgDbi7DMhiSFQ(u9Z z81*n*iB(TF!+L}|3UixybuS9fr@jZn2`atmo2X8Mqe<%51(=|#%|*PHn4*4@j1pE) zG{lmHnu#I}sI*&Hs(KoQn5MciFxgXSAHfWjZjUq7XP_uc{TYgCs_UUBTg^v+YN_Kf z`L3;=&Bntr^#^FEt3HhRSUq)BIUbg&bc0=A-BcG#7AozumZ!c6{$K+&0l{pj7PiEy zsv3yEmo4h3EPU9amSa{~pgs#H3e`e5(L{B?30>U*Ck%B7loqMWptPy_C8|U-^|4Yc zWvKMx>>fcK2&H=k^#~&Mrl7tXPD>eTQ)KRKLA{7O&3ACq1=)9lg8B!f_X%n;ZG_VNK~S$E<|hT!i;_PjsP{nk8A1IOc7GJqIJp0l zpwg1nSpkQ63HY!@rBBa(L3O(U`LI_#4A--QIqMY?7Lz_Ts-E4CUM6I=X@L|Ije3H2Py0&ocWumqV6(Fpit!=fa z(JqT&{cU)is1>2sgblFajiUB7MR}kNzaVPQlD-Pp2VCD~QJX?_zF5-UMmG^Q%!Zdq+FxnrrbR}xsFAqg z2^($WH%r>MeDnGu!!N$l&`f*;zYnCEI{iN0)a>(!u}U16Y+irFct>2*)ZDumvj8~( z@+Y`FRhI@-THkRuur8u?E(Z9$O;xmd1pZ)yZmkdcqp*`U=+(Rgp0dFh?WF*~)3z#~ zRWHxD4kI6UHC9VQs|x$kWp-U+WQg7t=JX{-USKlSrE9i`qP;*tzFuW+S$p&SB}Nmm zPPXZI6zfF2^2`R08f`4iE@chcC%z)lG8>x@K58VT@tPc_Yy+CUBGLMwCl3o(sO`{K zBpObn+V`l@ER9!auZ>5AEkU;&rr9tmY@23g&80@Y;4kICM=QS|1F>_%YA9pSOf??9 zfI^M1DtxJ2wkmvSHq{Pax((Xl%dkN^e3>?AhcC-k<t=>aR8 zwQQ#=nGiuQC%7-8Ly7shr5Uj-6x=4ZLOZy6l`{zLfMr&2A75q#_g#WNPc_+cBUzlA zX4Y74)Tw`=E!-%##X4&pC@Af1u$$#o2W2rjIh^cCMKOJOs3wvyh6kTj@t)kez z+~^p^L*LWJTcMA8452Tl%HLa=gFMB(TMxR!H`11y>c#prP`lCTi)t3GvRaI*qF%(< zTq&yV2Kd3E>RF6^;cwC_5?Gp~Q@-MMqQ92qDRe-mN{eKbm9pBc49Wz#TRV_u`~~K? zchHYBIanGbwr8Ok$J4bWi*s6-;O$*ybfOO>$ed5}S31>V@CxcO zjLuAb1jC4^K8KD`5@L!RkXX-7K_XUmW=gXVxTJSLb7o6tAtTGlwUM`^IE)p}`ZkIm zP+1RZoDD3D$dAIQ=P`eI+{hEvGBb6h5hG5_Gz(T5X)yuvs+GlQo#Xj&sX2C~QA501 z$6U11s4ce2Fkf3~qy|^!fU~_Mqq4%A-clN}n>4f|kbP}K{6L(20bmB$7=8rhA<9OD zjp0WCJ%H>x2iq8a>SjDzhI5F8Vf_4w4Q+uLYGaV8Y$2%wI$Gxl3uPU~I1n|}Inrk0 z=RNk%Gv_>Eq+$7S{S!tYcog#`=XlOQUQd?3B(LcWeCKpqj34*WkT5fC4ELx5VeYXp z+@s-y3ECJQ<_JvxobzoAKVK+|F!$RSj~I{AX-=pGHj1B@(W|D}_eo=+XDMo*a~-D$ z3BQ<^pENRp@6-owgLIYp9vlLbfM)O9D7}HwrgK1JuC)gIyfhHA1!QNd#4uY)`U}n7 zx!tm0os1byVmoY`ybyG%iaTu#KL>OoDynmrjiF+}hapaL#Z!hm_%jvtZcf6!!|4BH z=Vqw^OhuDDVvQ+sg5?b<8893Dpr&qGWu&&}-*5gR z{bu<#NM44yeo{A5cc;wTjTNNs=vkb@ER4iUcnCTZ=SZ7}SEtox{L`pL^m(Fl9480~ z-=NaT&i?W{P#aCUc|f+J2XRi2Uj__s-wM#PaBC{ z2EYLN;kga9k!f zeAZ{#{QWkQ*Fq*?Wd9l?rA-Eg9mgNXU?iaw0dPBHwjSczNZj!`oIH)JX^qfy9SWn+ z(g^e}ZciLB?0p_cMLXHZtow{nJN_66C9}TZ^2m;w?0Y04Pd72gg6K&=9d?v3`ZhB1 z-Ewn1a0Q*IJnrCnm{olS5T>h*;b)xD9tnqCUsLX#z#jP8w5!j(lZmy;94WL z8P8)s_AxJ&IBgVal4F1k#%uHqonw#<`ZPM*!ZC#1!&N6}gZ$>FYmM5$BZ#SE6kCNn zV@0Yfx}BH?sAm!D8EU8Clxdibpo@G0zIk4z7ZK$DpmKY*z7dY0b{+IF&o;IXzNr@) zf>AY55=^Z`OT{3&3suDP2HOB~VqG*7hOhgs5$`7$q_D_zhK6eO2lV}->O@_INNR?; zc%6~i?+7$_Dn+XA_F16Yi-DPAWB6%sKa~M9*T(Q;>gYTk&paE$$L8n~VD7gud>C0< z-_+J)QvH4#v)OthGiDN5T4HfnXMuV;np4*sX+!@&cs$E*>6e9=-Dq8&$HWcjrs5lw zV_FzFaf%qGl9?cPI?*D&_4<}@lK&&Qb(`^`n*#uXJ!8d6k^aj%>osFO$=||=@#Vn?=1i{ zlXRf&`RVu!@2uB26yu+VqW0cnRY0Hr1ynKb>~}aV*Yh11MpkRW&pGS+xK@Y(bg+^eD4ngHaf~zY(yHe2Z+!wNXp8eNzws zxfEFKz)Kj;<0=T&PWONz^wVg_8}L4{ZV{ra6|%EY&lV0 z%Oc9xxH2K;b<9z;4qPO$UlZb5%k~kMo6BdS;WD)dS5fVXE84(()N7olwFXRy{N2qU zPQ}sdk8seJiBCd1n1aS?F3=*4)(gqtH-L0Kx`-tte3}U;?T&S07b{ui_!9WJCxtZX) z#(pNQ=U|>`s@RaYCN(22CzLStG8zv?8nVJtk zRLgON2yG;%H5Z$c$Ws!jA0;j!kv9=ZK|M#Vs>4A*?nfZ%+Bk7M$O*-*shawv(*U%O zQE|0IX(W84F-*ZAswGKO&e#@9qqmZ@6p0E^45o|PYgE~5NK{00NC zmM6_bJxr=8gQ=l4-Qyb=B$W^*-^TEp2o?iOBOAl}(W7WQT4Ni-r3j@!k}o~>yb&9Gn@pZ^g4Mpsu?`_UM!{)g31hcuFnMIHL^?)-Bpun4 z3a6Yiknf$O2$W;eSahvg7h8$ppU}b)uSRy}1(DzEg6-ND@i{#|&DQthmwmqYbw)JZ?1pXrcQd zid(-V8i2IXHdECAq>ZsLRRfTAmyO{A&`vaB&AM;0&q?hF#a){)b8QS2H0z=(22;jO93yCSS4Hg())q<^$l8a6kXvNSacdD6xwR!WhFgnk1c=Jogw6Wpj^UTvT>1N3MrEh<*ZJ{2oDhGI=( zB6M!Hbkg0CJBfyM?G+ot&vf;41ZJy^!Tpjui3WJhzPYo`bdBkZ!9&}@ory1@wH|NO zfR?=>7{w3ZYoAjL46q4fVvjfJ%YLmKgR|2WBgPyl{UXx z&D0x2!|D+X9>;7Vco+$3XA7u^(_6s_Y4;{l_apiyLH!6$;Ei9o39=yVT}(`m(@au& z_hVwB&3FVg0U@r0W04q7r1!TG(|XhzCLMERgM11d4O9Ce=c3vj7G!m$N=t5U!UD!! zxmN&Ur@n$%Y%fV=Ly-HZt|fQi^FMpl3a5CYc}U@mmXc8;qDqMxTGLYaBNQpZrn;l( z;8)3G%X<0q6DiWB#%RxBc$U02)u*is60F&9vi2~>KPk!v1N`BN6m1J5V=nZZ9Ij43%MjR>Mrk{6eLy6wVrvK*D`jLENiylnB>csd71m2HF zAxr5uomy8?P-rWtbZIk*-o&QQb!i3l0qZt>flHfDbi<}EbZPgX=ahCe z`ZAaHGn$svjML+#^c61cNn&VjGd$_ilon>IS5P=zct~DwX_wJEN~Jc#RhPC`0^G`m z@$z^W)m@5s_!YDZ7v8wTR3V}T5IlA3648TjcO$1UN$9bp)@&RkV`Zr?Ym0J9S_(O- zKRXL8GIQ~M_>0EoU$5XU;_fn#DlC$9)b4fiYLJcL>o6lJgo7=N#K)}pPGIh|F?@u& zlmpBV3u7Hj`+6xbLv0LSXp1NZX1FcI&*AMGL{B7*w3+xpyiXx3(kL4vSzW!bWBMcYv_Uy)%$RY4)QfY{y)p$x zOb@!XeLC3gw%NSe^W@|>8^l6%V}Rpr(1(7Q9Em9>>;&$VQ~nAV#CkT{1p8L3E4hHR zAym>A#C)%Xk@#@-4hlk=Ll|?_RztB0;XaF_S|QA}F}Dg~o~`9pA)$Q%GYD;66K4&=#^Gjaxt_lm{bpwVCiuS zV;vgok)@@~gPIT-5dqqAOA%=%MXOm6NJ$k`8K0@HDCkTBYVF@NJ;i#Grd`y}J#A?s z)i|yX<5q?=okgR;MpMkGuzA@(!r9QJTV=o41{LiAj2Y4rc8Zs|JDM_to6~6W2g^!9 zs}5}7&ls=`kk$_ainNi@uqvh}YP6~*J;!KR#9_tS_Hclk7!7OmBy@W=z~}jGjhOD& zzJX5Z1xDi;J=lASEWc<|(}b93i2Eg;wU}mbM|zFb2_hp-IS?sjdMc$HS#k0 zu3^CNg}vx;?*om@@`b(V@fL(Jw*e*~(Gy5A{#09Z1kqEsBkdb9c90M~osuL&TTeyL zc%4Hs?ver7Qw$~OUkFd4XVL37V!8@n`l6vl>;2f1k*j^k&J(}0B@a$ zQ#`nH^52ER6Q@yOkeMy$c*N;7IF#W(j8Q|JfqD)a4m-XA@5Gs3l7=s0FxZHd14u*A zM0X<2p>)Vo@xGB9lKpg!u{d`=hZO%wv}tjkm2-fgjf9mN?ZGq61SxJJvX4`flaK|q35?@rFP0`R1AQuU#rXR^Q(-v#P$Z1QjU$iQ%v zR_s=50Yt!BiTU$RBQZ!{<;U(=h*1frCi_=41GLNHQT#LEUF>TXr26;O2J{~b3iG!p z1N6EDh5LU&Wslu$L2m!NVnF}3pa}o_$ZqT#7Uc1NLeL%yiu50*hpw@EEzs-Vg;`$g zTjVWHP4-7p#^1J}D1R2}dF(qD6z#9@0D9MgV*JAquh@MS6zl(xT-$F!asC+?mSW$t zpm={JLGN3T&p%%d0{p-N6Z{o%fIhs&%_sX;pzvcqvY>!J0TGV<*n%?rn^3`GKcR&K z)L8$$Wd2hRhids>!aOPVGmBQ+-;vA}wMKjz4> zUt3U)e=FRG{lrN%03EkzdH&^DfKH@vS_40wj~n})714%%dKoYF z2a7Y`|3?O(Qx??7-wD+v7<1^+RlH~k+Hg{{#aW?^Cr2fF33`aOr42xtb>T)vXpdkW11B|G zR>o-2M0MG+<21QBK*g4wq;(`Ssx3QB8%WhZ+?JiCEv2$^vmhDfuT}kwh~cDWa+1H{ z@GfpIa8fgwrjwerb>wIy>&M}Rct3+ydm{csNjha2$Ou}ViP#swg_fxzXk9B}Ie{lA zMXOB_JqXMLvr{f0k&YQ-aiuk&h}In2p0IS!8qtHp)CWZj;>jO@jai0%9>+xYK>JTf zKuOUt(OuCaX#>#D;FxGiqX*M|r;3umteZ<&dkRaGv5D+XGj%sYegj_MuxP6|BD5&X zesEZ{wRr2*euY{b7Hxqs+BmXU!v=lY=jirvSTuD~H1fTHZVZP-Tits=dkc4OI4s%% zGc;WRm|=t2S~|7sOcu1rb+wzwQEZk?&J`kh!Fi`V0N04&6o(NUK2QDhFZIA$lT8FV zZnG1;V%*jBpsJ4g0mm?qQbvP!e^m+weHCctZMZB>EtZ7Povkc_dPv6VN7k>^h8XcOVIO9t!Nc3Mt z9gJ^bL9%}voQ-d3LD(9t9a?>S>G#kD^Bo35ms%%1NQR40%|tbT7A&bBp#970Xw*N4 z+5{POsyUFus~eY*qxkOiA(j>s-}7~H<*hiNdRq|`{QTKnpH|#4*-x9s#P_uz#eb;; zP(O>)?O)LWP=5{u({YQpjz*9HV@Y*kd__l0`282qeBuXFj3}2~NZAm|J`N@EuXF(# zN*-VZ#6J}5@xv|E0sk+Mh#z4=8U8`&*yBf9FNb9NBWnQ~MMZ_v!TqZ+s>P2EQXIte zTz}^xfMYDdd_g{dDjYv{ABgcfs${9JU@-a=|2Y(nuZhJa_*($w(=AB$4@6b)85X4Y zgBTlq%`C|6{}UsHuQ?(JTVDSUbpRD}S`beWyO#oNX|ekJ*CGIwQe8ov_8%vxl?A2n z()N{EoB{v%j-a)*pbY%1;~xBy+zCQzlc)tb+VvfzJEhH zz|Iy}=ntUc`MOw8k-rb}?z_W+icxP8T24it)pck~OsyY)kAj?rqDp8(;Ym{xdTyXF zwZL>Pq0g&GQt4Hq8YT3%AQ{skN~QjR45BpziC_K(^*^Cv4w7gkxTY&CvE?}=)WfJ6 zcsmyQm|B7MC8`hCK{XX*x@%1=`+$p3jmemY0(AC?Vskanv*CB4I9K2O@C{*3m_w>n6yWS{W^CK z9t8+#kl(@8DKA7vn?1H1VgvAf(56mvFE&ccR}{SthTksYbM0sEOhqCo(pv8NX8j)*k(HG44HSq$xtI2`IS#V`(0 zT8J2ft5cqUYs3X|wkyIX)0T;=h?Q$htfn#1)|iE!FvbAeE@C5%L4aIkb_oVAsWI|< z4m2x(jjQFiv6bI^)N63@jMV-eohLT$k&;mKb-B@#l#4n%7bhtbb?F&|e3BT12zt9K zdk@N<{V6fl2Dr?TK{yVOfGm0m47V@DhRo62I-8+sVgZD)Nt~OQ!{l4cZi_iP6JCj< zk*`O zvIS(fzr;sb_6}JJ-rIPwGgoJ~) zn@$GlApULX0y53IVAYM>MkN!@lkEM{-#n(W2_Un#iQNHY14kY3FSG)IF-T}l@_P}8 zCRC$kls~2>KrNEWfy|!+B){mC%hr8y;f%yXzOhH7iMR7nesA#+4;rPw7E4du&WC=~ z;wvP>#8V81S#XJT%cy}ShiyE`s?dNAAZL%=@_Yi(STVi?A=fIvq?2u)Amx;>6i`Yi zqNYfHgYmx#|7=<@zAJeOSm$-RKHc;=T!WRtW(|ls147Ng(VX2Os+B@93P&JZ*J`+q zHg5PWT*&|%XUhpi)XwQ|4F12sKcl0G3f|^+>H2hwUdZ^4VnJw$&pd+IoH^t-nG;GW z22@gC62~{w5p*V~Bd2bht>;Z75K@1k1=9mL~{pSri%~``+3t zw*qw9d5tY=i55-)hyvz3*}B4BB4f7)FGLMRA=sFrH<%ma;?&5!r0^;`_fPQ;6{@-8 zNcud>ZvnU+0p%T$GTMX0p6W}i2;fKPVOe83WF7T?A+9fxl+j8M+S42zq~Dw1>n0%E z)3h8gjrUQKAas~nA8?^KKN;VD5j>CJCLHcd@FN849G*__;{+QVHVLL%57w0Hqf;C^ z1iQczYsL}#fheW|+73rMpv9q0v)tx5LJybD;v`V1qb2I->eRdtwYE*AufVEg8-%D7 z9+KTqof>QyB2$PCgM7dui&LPYi)*rwmoZgHBc^Gv-_K^cSe;3kd`7L}nhCBkHkS_( zrGAO4QYIgauHu>@2qm+KD+r6#SazmVu}lZK;|UZV{kickVwn5gS^pU zBFdWqlf*ti{;kc1sJAt`5ztVr#c!k<>=al0Q<^FiQE!u;$)%0jH2(4!8PvFV3f@*E zA&pNW$U-mtFCuSWz`cDF>c10#p?b(t#H%pJyUBOK(S{>ww5jT=nozSOH1Ecu#M;oo zn`WyJGRWJfo&g@KdGdG=`+mw%tT>EBZtufF)KHG91^_Ngjo=K)`ow4cDI21OWP_IQ z9T=vlB&oUxU09k9`A@7DPl2Eh8NZ?!G({u1gU=X0p$X%4;JWU_?1~+t4uU?2==xu1 zV4o2j`|7=G7deJ-51k$K%i8cL8@3abaH&ch}#+ZY6)^oa7Ow3~+&Z zoveIGjQ10Gk*XI5cM&B4Uk~le-w%AP0|>`TK%2?R#Rtep4p8j~ZmA>H8~i-ybUO7x;&NEgBtkw#vw(8V zdWN(;3%)Z!V!ZTamAW$_bz?&6_JECcE(@t6LN#@mcM1ABT&5MHH{4_=euF~l{icHW z5^yv7At9hcp&a>>|#97kwbH1rm>267DIhoxj(bTqWWT+Zi5$gV13KO|XSNv4p%+gy|Ujl0%GS z%N@2lvKnm3ysbKY~uD+*9%CUxgCCgc4Vfz?c;j^qW>n(5X_P?roSLcmXEBjLqTJjHGKzB-YK^s5}!0xiS=q)O6GBg+m_D`*(cT@LAMA}I7qWP zVaU9fm_FfisB|EE(;5*w&Zju6b3-yjngh77LqTy5W<(8lp=QD^-vg4pCpHJJ4}EKZ zmwJoy4*}OrncoZ=g zk`q&q*iXy{MDBpMYjvgf5TDSHR>T$}ah@1Yh)PGa2secJrND<2>sQVf&uf>K?RIm_b;6y7#=bc}Pbp9kND&iF$Lt+K~*-^1~ zh?U(@jf;Cm9P~7deJ8H@-+C5e3jXh16IMgfIx_c-xUb4w*T0+F1P)rdXWxsFDE58^+Jb)u+;82(|5+Y+*; z=0kWiR&2~ph<_HJ@=ug#%8$9v&Bh>RSk<}|m{;HdYm6q-km@%56;ftvinV}iN9mRi zf`X}fmUM`En>1}JVwc1WBxd8E zz0Q1?ZSs<67J>TLhGTD=V(_9P^n4On!`g%dXe+{!IY8dV&b=entK{7}HV^E7n=*%} zw|O@V+A#id@dXg~IU&BDz4cG=5cM|k=~if{a>!&$$N&}f zt+EPHk)0r4LgGce+R6{Dp=^ivI1*pUKK`e8hqX0K&F7YzW6me7tz{ zc5#vpQE!uO#ig6j?RY7q+u@(h6vN>lzZ#oto4^dF1#EtR+#A=Wz1`< z;ztqQL+xfZ$TtIFKc9hfm2d?RR1-98`w*G0mhKTl%A1FfaZ$K$hRz)&srl^Y z8ruK=uw3+AArv052Kg9>G=ePCVStwa`DTzeRxi=9`g$0}tq&NhEsAxlzWhb>8CCSC ze$@XAW_P7R*>3Au2iYU8E#RssZp;Z3J=VE`Zk@r#p)Nw$=fLg<%R=|8 z2Hci60K7ixop?mw{%F}@KnU8n-sEU(o9q9<9h5u>OQ z@^?0D#2w{8486rs^Whx4P5YCpLvP@j`#4009ErkXBmNQuW7ebe^U_#O=MT+?cs$5| z%IKhl8jhMXqz#&I%GiELGB%`B5|*!8(&I(|bds^ZwGAw<3!uFXyo5^N?_>ir&>z+) zqetkFnM*)B8(2{tSY!b~i*E_+1xo38HW^9*(8dP-04~th267=3D7S%fRDsl%^q3ej zH5CA@Y~Tn&liJ1xvNHj+wSl#zn4R{fqF`+3Q)Os>tj_bK!3yfo=YV2$t7Enire1Z- zUc%&5$HXG?EWbJ?l`xH}W9kv6adk`+!UPMdqjW0u3M$i(L-!OSJ*Yb73MwcYOvM}G zIqE@rBRx&FF~iuHcDNzEfcsQ>7MDt|L8S6`3Wl*yQKZs4c%nXoQ>gz->^Rnua6Dm8UsBG5NK!ga#5<&RYCSU{$S`^F4(X0uAn0ODrhhQVv zrJAstAX*O5f(o~LD_54(2$q4s#g4Q2XpH_J`9`xH$e3?AqtLKn>_6xQ9P!DB=1mfz zix9#3JIpLTR)z4wg-4>~)I}lFz zTr*FRVq)@g1e@X@3fAXxn7Ow}SgiSs4mE}4Mc=`?J9~xq2D!0A$cv`M*8-lv zkWpBT0ki5R1Zpgbf!{%f^atiJ0UP@uX;{hSE!+eZ<=C9XPP2uZSexcUc{1i`&A`Ys zwme9jL}~sYl!#$VTEJkjMYISdApjG*aCk|~ElCaeSQ-u`Q9KN-tR$8PtGUYq(Z;rA zIaNl6@}jw+wmD|rOI}~ccBB|n08)#Q%MP-mEw|Aj--@{ncC5-&n4PIk)dPZYaq0P4 zNvw-G{wbVmkaMEQ)eh%og-VT_?rJMUArjc_7Kq;e7C^7$^hkk6p;!w-Pg0tc-z&%V z$STm@)f|LOA1b$GDDGR8Zyas9bjhrQ#Qr(9x?=JjvmMHC5fTH-mG|$Y2vQwWleC4oP4_XZk_^Y!i^+e+a%cffKse7;c8-m~cl3MZaX7LPWnr zMp~iY+BTkkDQlw8{T_u96&$z+SL@G*pKScITc*&l+Ndg1`9PK5&P8D?7tF{*dWyOD zhiLbXwcp{G9{$vq9Et*&=HL_r`YpE7xLSYco&}7N)$L*yAk;Ef{Z!;PkG;~=m)r|5 zXC{*&1V~8eEg|$0LO`WVAoL==2nre!5}K3%0YQNQMMXhH zP&SH4R8+8X5Dh3ODkusnDk3U+up9*yMFqru-*@eIlF1xB_dfh{_miF9`pWv&+H0-d z%h=ZF>ah02j3jSjxQ?uXnOecAopBsS48t6cORS~W?>7wN4FHC!WX;{(xJ(}o&>N;p zG27N~;;8ExaXEhjRjhlmHOGoeXj&ha=*zCzZ(!w-z$dxw|MJ?o<0kA zO-f61rEnpx6pqatS7T1IPG^{r&hLfe4$nnDclkL3s_>`88`k-``35>J!JHE5d}grg z87k*WH`e6;DQ>vA|DT-0%MtAy`r9gpmy^rJbpYMSYOzEl%T~I}%2vA4e&#l!gUNGg zS)NPF@?2V$=TdV4kcB;gc{gTkTxnil3K{~1nYJPv*HXVV&zf!3-4NDuL%=eyZD7@+ zHWS=l)HM~kq^$Hy%1Xb4Vc7rHQp^uvw$0CxQ)5&sz!gGr1n6 zb-f3wdyU6%{5KO-#h7EPt0H4j{Q%34*gKqs_$y{^EdeuKh(%-fMQrSO)3zVxB-9Rr zE~8e_ZVUGqf6i!#@fObaEF7LU`AYW)2O+*=RN=}wohEwl(?-)g@lN(rOxxepMy=3z8{fH|U1=R$Owq^wUVyUkIi<8X6F zVd?S1t);5cs&Kj722)O)*ICbEehYKNQtYJ4`Lw`O-5h?^itL~Tu(4suqs|Y(dPx&- ztjVP#j$(HAy-1kp68y(WB^_J^o}oq}XjG+@O)piIR(1_k>x|bB;%G_Smz{sGLmB?U zX8wlp{Bec)KQ}L|iJ^4ho&`Wxcm#w|z+R`i)xsSggo(&WY@J?YiR%+zG~|F<_B zOD89N8h%djg<`v|v-x=E%RH@Y=U=U>*LE75=$z1;UCn8#3v*1xWQOE%;)>O&OKSA1 zE-70KA9`?8#3{x6XM4I+Bim)quwL>}XYq;7GfI9w(K+89m;xgkGZXWLn8Oo;#9`)= zCu3&eJQ55~;kFCg>cUXpnc38n#H)zLwKhm~cw(qXTMFcct3O?mbU8gKv5A{t4o?go zwlzeWwq{`?$cnSAI$+Mm+#PdxX^}Lx3!T@ed+N02veAtz^Ek}miOa}Jg^M!F!Aga~ z)n~!1Sa@OuxF)mUaMVs=<3HHKT}3z6f}^<$=4{NpF^|9;p7M~ufCyRBktoDG7xN0t z;VB=9Ntl;nj?^R5f8{BLEyNJn`up+PU%H?ZKD$(rVYIJv<=kM|lrs?hTrGOXh#mInxfMz|asgn>DgODYK8+ zuYcFHw6%(|u_?n7ZOltuHsEZNvNw=AD>d!n_CbE11JmwC!~m4up;1 zLCo)9K8%^Wu<(?CL>^{t`&s$$#1?Fpfq(zh#O#h}ThQ74ZRf84U$<7tTtCB8tE$|k zEUM@v)(TX2#$DXm=bSm&x&3+m0Ppv2#$=sm*0(p?!Sl>|FvD(Ca>MtXE86E7;P%fh z8g-so6R)UH+xg?ZE=|rezg_IB;bhG6v^>xJgC9NbW-~?q@nh%nEgJc2I|nBCnx1FX zS7vvt<4hae>3o|mw9{MDx&GbrE`P`-yW@FQz3|Uq+w;uYvbyJdOEtfoSa7y;D^K9s zSlj3Ees#5T*ExK>c!iNZyCxm)P(I)b^oQx=YtlUxE!+x>@o-i5u8Fl%Cr+GraqDv0 zmt*ak-m8NtO&WLWHegK4<_i~k0uh=19cx$Xn3C3{d-nlt#Cq`acV(|HLlx?y^(x zdopFs@r=(|^9w#qzBb18I`}yRe}t|0Z*=(C_>{CR1M#S3Sq!|5$t762Xfz7>&E{fX zZz^)Vhl~B&LN>=zPl~5piOGV z$r_xssUN9S`HH~Q1N)@xhO$VEnG6^_oIfOOUL zHrZ{u_Dj7jwL$6?!!qh;c&ql$!sLw$hP+p$dn*Jp>t=eZ^hdgNTFbVrFZNdGU%yS8 z`GHGYrw(f7otKhU@8--d-h`qq*L3abz0Mo-Ub`^pJ+derAM;7!qIhww+~f0ltEPBw z52bkHQ@lmt|CLkfw;Sv8HT2n+nE&;?`>ph}({T4J_1+)ql;RzCZG$ZDD*tFy_xSw& z2)5Rro>ni7i*nplf30j2Jgp)cXt%TQm(DdpPsiX{|Hw{x8=Z$`x;mu^D)hY>P^{C{ z=@8GDF|{HTOijh|;SahWjmxS~dc#(!5KkJHRiTvBHmy^=am@9Z@z{h>>Gd8lqxHT} zQ7Z_aTInHgv(esZ?B|<9DNvoY(!EJ$EG{Z5aCM03BUXyH89jell-{~kn+&KfFd%vwy?-85zj&)IzRhhdqyZs|LMWv6y=o z1~W54ZM*cS+o(lmm$a7N3F+R;`e$aet(VrdYlf#zM67S32gy&-ir;W^u8oH;mxs5P z*W%_`xvj!Ye!Gz`2EErGt5E~g1wG?Sjq#pc)Zgd#e$apm^sn6D98Z;qC~N%A@4sO) z^NioFJ~XRQWACh#ERQ$B;h^76yRzIS?qk25+^OMJ<#ffd|GoA3z-y;ww<=fX$7Ai} za&>-M3f%S7ZeUkz$*$i!dwkBoz8xz)eImHg_Dz~RagvkXzhe_;t0%akdVWDs!T6$r z{G7ZQxwGn?O3?(y1 z*;h?28b2u~cYM+0xdk~xMh(pAGo;^Ot4FWiJq8SO{@Ukln|DEAlTfO7!j*` z_e?}_7N!NCsWEzB50fotctO$NIYotYiUt(SEtu+LHVU??hNjJ#TUeAk5lx?yKc{GZ z&iMJ`OU5(`9`QKOPwQC2$!{7QRoh)qw|Y5!b9(j~(Ct!-!=kP8Lz^HDYL|7a=sf~S9U1?$C_kx+75dT^#MA#$+>&d4ut{>ltCtW&xyvkImbAWXyv zDoJS+J;1avqq=Ko17y#-Ajl0xujz~=l)=@q4W5Xj>AgQvw{!XHNuX$vu8*47=za>In^b2v7P)kA*VYt z*L6s8cAvc{wq!(h@WGg*sp#{WZsQf?TO)_}>yhCsabl93lb^&?DyiQa2SjmY>qZG4 zruYau2ps%{C!WOitQ^Q*>dC&<9v+wdX7--!%6L*BCF}t5ti9A{WSLLR2p^u;_O9&9 zUTXJcfO6Necs|_6*!t1tv06E88)Q{azTO_N*A&;ot-$s6;Jr@Q{=xaH2dt0po{e1n zA|j?h4o{s0=&QdU^~n|%YDCzqbDWV?0lUh&fM;?VM62&A%1!TJrDOP}7ZuDaO8*8@AD z2(PFWC%q7xx%9Rf|LkEUmKC9`pp*K5ue!5fV6bVL*%WKdjffGsm3H167;F>6Z9qGx z!2`aUu_l?5=|&kbFxbrT4GPY5Dh>(OD!Fw~aG~wY85FFQ`8V5!$Pyy99NIKYcNPr^ zb|}ctEy_**`|YyXDp=`xvuCGYm5c3V{tRr*igJtQ%yyOKS0>}fC7CcQcUnQt_!)Di z7ZuEMJ)Pod!5YKTO<7U97S{n=O6;V}R(bODvQkWj|FP+DDh&h6_Js07&iyFKDV|~boVx96#8+AgzZB(GgMS-nqSsem~=9YX|ec^DzVv2XU5)o%ncjWdhW{$_td>vQnr7J;6)q*Yp0Eff@4 z);45Y!ECjvK^<9Evj(=gqJ5=fFX&XGLU?(yo%;@SsNr;2&?%vLAzZ=>R6U}QQBj2q zFnKx-k1AntM0PG!xCv)RWgqR_{$jft9cM&kUm1~|7u3VqS4CwnT>ZnNHR|0OmAe?Z z!wpn-^&bz_iQy}tquCUzGagQ;brANxh{^`69})e)ovEFZDn(v~4mhcv&NV94OtHMD|88vU7Mb zdZUQ!?z1Lk!)-(??9LBuJxN({=-S8-n-F4>LNtj8(G7kmt#riBLpeRoNE&@*mxR^{ z4a*v$SwyznsBAlt&1XukcX?FFqY+|@N^Y_G<4tv9cB5iPO~OY?_oKAv}I!F%BZzV@qiSFD#KQ zdL$x3W<-SMQ4w|`!U$7`#!(TDAwr7k&^{tUzo-Za716CGLa(R@e1|W*6cdwukBTs&;_53ts-AUYRQ3d94{ro`uPWS(|BA|97+!>GN24rv zz*5sJ+>xl*DG{-=B4Ym>72z>NNH!6Eii(hd2;nUz?~jLTmyASYC+|iCcbFu=64}Xp zBkIsCB0^?Vgaf4!(xW1bj)>4BBErz92uHLO$^5KEWECbw1n3nJU>5w?_gH2#eTx9@ z`f;5?|F`AAs63~T$6lR?b?Vu_vG^SOT-{_gR%AKMR_h)zwvXcIp-fOH~gc;`A5s9f3)m?C2|>9 zQ?~~1N9Fmw)N=eEEx-JYCE(!oksA?W zOjL;1Z(=20T#i$1enTX(7L(>-o1t2aj|eeQA-J>P^edhPxo(h~=6_@{^Qw8;gUHD(>m)MrY=&o;oors@v?izIBtFA+KLh=p^R`cUKA` z3ag!m+2eeg8%(Q&huMsZXTBaMF)x^wI7g~xRN>IIfs>e>)xgPaRNd!{&I=~kIKZ72 zQ^z?r8wb+Ie)7i0G=S#-=hL6OwVc|gy;Y68%t<}%ZD}`fUS#G4r@aYA9dMSMhTF5J zy(!M1_iWcU!?DkJTN-<|lX?dB%g%VK`WY4%UGmO&TNqniX9;cTgRIMKt4bWj`UCkh`fYJibK#dzfD`2Q1;O;e8CD_+D4R0O zV_IB6+$r4guH?moE#>_)%lkXsJYAA%ly_-wT(T`|_0R{ZIpaKCeAUW3Txc9poWv1L zYdD4fZSP?0b)8f7T4NDmuUS5SCu8R>&zU(eF1eN$Pb`%82&#k~*R-p{pF)n9xQ{KH zym+FlyuGW*idEd5oWup~l0xNOx*3D(2upYaU);etw85-G3MKg!!XtytbZEXp1l9_0{zLNgp-M3j9*RDh9D zcD@%;HhHZ}qU@KH8IkgatWi-8c+E3n^5Rom<(FV|gq1CJX_Wm^>#RIDs%_XKCvVx4 z;YN)&F~>&Q5s>@BvdL@qY>{$qnShkn;y$Nr@>&I^LZxe+*&#&Qxq~R3sw2RJQi%z# zH5oheUfwPZLWx{6G%;SCD7kTz%;%rO6aB|U$$Zc~Jkfq#lzb;-sxmNF#SfTS4@xo4 zD5_f9o!h@jXyA;!$deG_nQ(YwunIbpTY+>{JVe(Ja(JSh&yzZ9`Q&RCr00 zy&y`STh6~`NMBHNLo#6a^plr1s^Ve6N23Bf6D7Z-fZ4{suJxW|4zQ}Yh``UOg(t@U zqnwQOq%wBx;fW5lqvWPha{DN`dz3uLx&4Tp6k@ybf<;v;#hMW1vM5U47$xtIl0S`- zPe;iWxS7(#MX1Mb)3O37n5*K+ye4pF}pi#GTe{wz~;)C?ssY+b30Yl zYHtmKe|TbrW<|+2M#)cvq7>night3*70)8R1v@L4V&o3iSCZ=*xsw%(W4`dj0?qeD zKsSHT>IggYyTdfg>MuDNx~kZPhc1`GU7~K*%yM!M>xOa}dRg~D=ER_h*hBqGGFvtg z7scKvCl9txl#?&9>{#Y@yExJ66T%NwL@I__waUq(t;Xf#QC8b>@<=PIoIJwnS56*o zjVvc)k2Jer`s{+ti8H3=;3Bq@H!Ya{zi%b{uNw&eblV{MGJ5$d=+PI??OBd}L9k}( z-(MW(mF}FpITI$}w(-}~f>-86-?)ps2imA?nRIXSrnxp|XwCTHeb;q)8|tk;}EG;@IyY~rcq+&?`y&>5E7sk)QrbPNV)o;-bW z(duV=4RP-H$gXZ~+O%C=rFV+6^$&MJoD;Kx<3r}-qMnWJbI6_tv75%~=6T3{CfW0_`>=i7CU*-#HiVt* zKtJT;Ss?RelgQVTL_S{AtPek2zO>>tD?e!RgKmCoU;k$SIP$t++#~MyYe-&uAk$d@ zm@SzHlho&nrUH;tAbW7M-H3e5eXyHyE6O1#Xy8vS4WOb3r`6<2ccbmu;(mVB^Dni~ zR`*f;`cJyIVdA#AZvv1_kdI`+WMA@WH$OQ^@;q@F81h`_UPbY2N1;&EFNu<$b+?6a zJKeoX98L)`;Kz!#Cs9Gul&GL-NmP&(ssEh2grpC09GF6);@O~Qx9O^o#jiE8rk)vU zffv;R2t0y%1g;ITg^IyA>?+XBhG<M~r<_cpBDlX~ zn88<1<6g)6=2Yy*YXagT@+CamPQHwzDRK{F@92~40v**BhPI6@%r zaNipA+<*#EUgZu-R>V~3ko$5<+&fyY(bTmOJ1$m(a;63)TF4AaR6Ls%DZ)%YjG4M* zEv^3?mBXk2(RwgwkU@S-@==gYe2j#XSz@%%ampB^X35dSX35c_X31Yf7txOOor9C> zziENp?uM#<=v}V^MI9@D7`NjdQVz@xONn~F!z&f#5M7J8f=_1%M zER4Kc+%IwrG5@FHx8g5iD9&~rYKV9y!DPU_J;UZ=8}S0Mv)E1SBMuaKznlg0MRzhs zED&*}oBEJ>?VJu*$*@r5={WT_iMNS7EvJ5+c%S&N__+9#xI=tF+$-)k3|ZFOQoJvI zEPgJY5Wg4Ch`)(8Mina*D^?Pd#9Cqlv9Z{a3?XA%DJ~MT#2zAFGG+n%d1!K^I7ZAB zCyLX=+2VYW`x@rIUR(}_sNl~wla9Dvd_deRJ}EveJ}2_p0rS5m@|`xy?~9*^{}I0x zfAXOJ>G-P@Hg`IZ&0Y(vBDuO)Pc%Cx*jq}@6g!I9VjppkI8q!dj`xP#0;fnZQ=BLA z(`2mB4dN~09pXCiesQzN$1#|%M0{S{D;^Nv4Hv*48(@alun8mI6TcOI6D!8J_Bvuq zv9oxwI7YluyhdCut`kF#DzRVuNc=|pO{|DbA}dx$Y$@_1bJULzd3TR;k+@X6L)<8C za~ZPsNO4H~LOd<{utQ?NWU-OhUhFCI;Su`fi$&s6@eXmLxXmzxy_gh-#M7b=dks^t z*j^kV=8G*WxPIBp!0#V21a^FT|fjylrFbiDHV_M(iRE6vv8JiI0doM1Fmk z<$3w-TP89pxr!^ro5W|tz2YJ9bCFM?F@J)XA{L5^#V5t*#8<^P`0YOicvp%K#D9xl zir+SY;wdo`$7rlT7x7~8GI6pvU%cKhguR~>>%~XJE#focPVpsipZKPDNc>3r zN<1z8D&o4Psi>di`d>+khGKiMw>VmyA}$y26Q2_Iitmf(#F!+vz^Y;+u@7k0|FKd` z7Z;1G#El}qe#s`@Cw?e?EB+}aB)fiX#XjPt;+5jUWUc?VNpYX}l(<*?U961bZ&n~h z%oK-<LUmWJC$Y{hOSfMHt|kzop`_a zxVS^)4;{0Bz2biH9r0uFxOiIh;M9rv5?qGNnJ*QsW#}OG6o-l9#OdM!@n&(Y_?~!7 z{8s!`4AgcjP~9+uD;-i~ibKV*;$(52c%!&Rd`Wy?^wx0;s3LY22Z}l3Op@zAzY5A0 z*dRV8zASzyo)CFDO#dokeX+F|6eo#u#cRY>;(E}m|C^+ET6|7?QQRjU5JXh ziNA_f>bVt772Aou#8LIM{!f)i&u%)i>t-^ z#E--;#UI4q#XyQ1KT)hLHWEYWN^}srivz?_VxBldoFgs}ZxU}4*NFFvPl`{A&$$d) zFG{gbJS2W9ekGn1e-eKc{i*H}CW*Dg24Z8emDoY-Wf;Pz7^N60juNjBr-*aK>%^PH z+r%~E{o<42)8bBXpZFfh_5UL&J`=wae-rJ7?h*#XWHD82Dz+Bei`n8pakzM?m;;*i ze}WXV#E^KsxLjN%-YY&TJ}bT^9ubd=e~4Am+yzM$+ofs!?U&d?WNfSHFW&d?ub2TQqj!R_q}55C@AR z#W7-@I9V(duM!uDH;A{p3|Z@?ctCtqd`5gp+$SCsKN7zZPm26tHM{f|@h{Qe%+)s+ z`Ln8?4e0*@DT>7F#8u*b;ui4*@lEk#@mujXF|N5=U@h??aimy4a{a$aio3+k;tugO z@dNRM_={Mfg$fdziyg&&;-%tbaXx6)|C^+^OWZ8(5ML8N5YLH$mTti{#j)Z{@jCHN z@nLa?xWA>=|Bt2kUbI`efs@3>;zigZOevRGGaA$AaZlU)BtNO7e&Q=BI*7w;0E6%UCY zipRt+#gpQnVnQdkVs*vlpjrPrOVLLhE-nz)h?~R%;+Nu&;$LE|&Tc_X#P;Gqaf~>x zv)2C`q}U)nEidV4)G1~i1@kqo%oCB?c!FXA{m3-v6w`z z!#yF%jmh=s|E^N>kYYFq$19}IlYW8Z#gbQ&@LMPS2I+T5-X;04K^P)^_u&md~N|yDe z_zsB*9F_bZ@jLNn(Vq>!L_CNhRwj|JrQ~dJgg8lDNQROvYY7wJ^(32=L=87deq8qL z;!g23+253WL_8{R=5!CahWS(=;A%NIk~himDd|h3e_Qf)+x zmzy!0Y=mdS#F65qVy-xo#JT<)@doi`ah14%!~#4@wm|BZvI#j1tdzY zE;&VVW62qP(f@SpBtusj`bi!nd9>uqB~O$*Rq|ZP*GOI_u9Du7yit5o`fVX8UXWrR ziIzA(qKQ9}{+Q$wl24QHJ12dhpX;AUq6KS{u-BKqh4k&jpcv}Q1RMvDC~&M;AcyI) z&ys$T^f!tt#d}D^DHgX#|Fq=&;#=ZJE<+Z72$BW=BEuh&EBA*UOHz$Q;96os5?$6> z_Dt!s#hxVMjSw#<5odzzQ>343^yvRvWmqM{{o

    0iPn5eY^B~q(374r{Wp$Pciml zx8ez6EwQ24lH@OPwU=Uoc(?eD_?`H($QK3JA{E4{VjZ!O*jnsLqQ&}?H~}3b4g<~p zf25HUaCH+0p7fb)F^n0a$Z6Nxe1%55XcXF&W$gNPK zm_}ZQhsq@f#Vf=-5^?xN1uprGk{^=%hHL=rWtMj~JnF+=*UVh?eII9kjTXNq%3#JNrKYRMZ(RP0GIgaV(E;SCb< z+mb&c;doN|A4GeYtM`-euP3I8ZDqeu@&IuNi3&}TJRJ;C5uySG-7LecB=nmkKPGt> z3BP^PACUfI@hj+l0iCa0@Y=MBomx_mJF| zM1_Y+KUVqz68R^~eqBh48>LuFBH#nkKP>%=lJ`nJOv3L|>Hj015q}Zwk#2$UVl}b8 z7;36ShS*W;Ck_-ZA<+W4BnqA&{S0xQxJ0~D+$=sN?i61q`TYN3CU5}yq4!PNJe0kXXk%idiHo-beOfMn?aSkwXrNKAR)nB>gSo zT_gf*lKd2jf?gmoZeA7-O8*fF|6`KB6aNq^jDkG`p%N2dZ4v<+lgQXY@&%HElKYaE z;*d=oBKu{s7f7BW`*q}4?3Bdivfl-o{r~+^Y$j2Gr^y@~pNqR>e^vH(B)>2DGs$0( z$oHFAX|x-!8kvhjII$jy1#CK+>pu(`GIS;LasDn25p&3iIDZ!l#RViPyp)`R*Y(6Z zrGG$tO?;2UZu~>ZUycqzag}9#BgN0;8oa9|Ie=#7n@s$$5DThBF2Z58l? znJmIyPV#VZoH$#&UR=eW9cSPT;$z|t@fGo1@tAm0{8fy-%#D*Qri$reXR)t1QViuO zF+*HHp2bBe$+wbcaAibtF?kvX6q2`+KjDBv@*eU>yvQK=F!_UJeI)rfc?vr9Ql&uSH#0)GDe~JnfRrM zg*SGzqT#RNpCaF8W&WySBe9vwkkv_wF5(bzggAk$fdc_?mN-{jBwj17BI~$s!IJk% zzF&Mqe8Mnme-A2RWxr#L2urS0#m)*q$1H=4z0y3v76Xe93YMn zbHoXvc{2*}=1X2EE)|!Fj=0XeQiTlWl_>Bb8J-q*i2FqIDir+88&EAQ>)+IaUy0v{ zzlnc|exK_XC)N_{g_LL{HWT?_N?xDK7W;|=#1Z0XagsPyyhb$f5$9IQZSeT6c()kh zS6yg$NPI-xDn28=BEBwuNM>5rC*qgl*W$0@pJGgm>t8`ka2c|arKlq|5Sxpw#h{oi z_7N`@@%!zjLYIgI;$*Q3)%|C^SFwk9g_tK!7N?0t;ym%jSbUU+1ud82PVp}B0r6pRhq%ib z*tkoLP(r}1XR??jb`z(F)5Q(q1L7m%6XMh24so}*M|@X&-(|@9M2gSE6XHqnw0KU8 zt>9L;qF7a|E;bgMi&i3i0) zBrgY=*Z;t;WcXG5Q>+xHp(Lh?<~2d&Gp`AP9i+chyj+|r7K$PA0$jTSLrg4};x^F{ z*NKmcPm0fo&x$XKd&L9dLGd%PgJpdwo)mwG?@8E$B0wJ>Ec3hNk#NO3tlM&KkiIot;pXJ<^nw+npZ&~KOy;Pafi#0W!?>i!vPtNipRw7#h*mpvG>5=FIEy0#T2oT z*ivjGb`iT9qW_0UafvuVoFdK_7m6#ym142DQG7})5nmyD;Bf=-9q};9+rghm@tOFw z_?`Hth@YY}fhvfV#0FxTm?>T;_7eMvqs6gch&3B8#YAx~i7P2ri`R-bh-<{V#fQa5 z#b?Fm#l7NdqIvli@!zk^^&g4vX}}egpTu9qKgB>5*KXdvg5T}UdZCv=xlN=JS6Ymu767Lfq6wO<>$iGFhdHEJ+@_S4m zBo5F39u$v>Ux?=ITiCysY$w1U=bP%*EwAv76XS94HPIar|X@ z?sB?>I@fl_J`t=J!f9k*>TotUgv2QaF7lX13&xR6-4A5()T5AcD|9c}#{G~EkExbX z#tw2NiT%`C61#_D61#y-WH!2$#EP_?>}^@Q!8~5e+($)!eIRF`K8%Cf9HSls`8bJj zaf(Fuo+HsM=958arGO0?jbOf+l&^0kO~m`K)K761EvhrjIk+Y@Wlg9~Ldj!K1|PKf ze9>51!Es`~SV-bBK#@34Tp%tMmx?RJJH)l(Jz}xAQQQKCc>2DL3UIr)Q`{}?5f6%o z#3SNS@tF99c#1@So)*uEzl)anz6czAJc|Ys#ALCiSXWFD`6D*;=U2?h_F@MyC}xX2 z#UbJdakPgU6a*M6#W*ovEEJ2xdEx@mTz9}oG}j%#mDGcGh-<}r#7*L3;+D&m*d}fl zcZ&N+4DkcvLGh4yL_8`U7r!-h(y#1LBZTa~OC9hc9M%-`xiQduZVWV^8w1VP#z6D6 zF|e8ZTZtKBd$EHU6#I(iss-{7fo#sVM#wNu%oit#Q^i8DNL(zM%NYo`O!5kGt$2@E zEN&FHnCmUbxJ`=f;!bh5xJNuF9ukj;N5$jfx8f=Bw0KVZT@3IOv8Ks&Re(PMLYcpN zL8g${NSVtapt&3Zwvs+WY%g{Y&E*pKnad?$Pw9t<=5h)2qs{dYB*w}xPRtk0brjgm zbrf)(^b5qr;!<&$xI$bh-XRu?8^zEjB_0#Eh}*>N;!bg&ctAWT9ukj;N5x~}7vd@L zw9AlnPKw{f054l$N#jLxVFt3fE(4}W-$-mGwh}v#*q@l|GoZOX1NM}@uQ$-NQ`{}?5%-A) z#3SNS@tF99cwGEeJSXx3QOJV|m@7n}kJnwmfEX|GyTjDi6;s4UVl%Oo*g*`6*F?Q;2J>Oo3~qzen6e_Q2N({apW%*doO? zakscf+$SCo4~mDxW8xR$aq(O6lz3XSc;N`gF20Zw0Wn^zNuq!1iYX+nVKfrWr7xVz zm`h(^2K6|4YcF;nao7?Rvq>DT^c4G&II0K@P+|y)o$Uy5G?|JGlQ@oSgtbDPL^j2S zNh~CB_-C%Ef##YTcD4(s2N#pr*)0{9k(ucK6>h>>N#gkM4sk7s*r*r}VoYR`7z-0XbBMW)3iSQwB>KDpGO@4gkxg-; zL!wW6k*zH2Y7%{E&epM)e1WHy=sKK(nl3v|qN~j3kkCcm1jy)`$4PXFIgddXR7m9d z-xrsrdESAhZ$%EYtSk~uJ(ENeJ0wr}NHpn7B%1OtiI)4CM2r1FqQxp#1<_IsNVE_Z z+Vb3o7A4U_LCM)D-!v6Z6X-CG#L_L0yqHALV#ymxMB5{IABm%8{HOVxkewnxrTq(d3IIo6`q0eX(S7dVnr4X94$F)^6(26~|;ZNB8KG zWFAw(UXw)Ew3pn0#9Czzx?vCXr2>6bB!_t<`fROab8wuE#qmOq3_cQlm?616iN4I1 z+>=C?4v{>9MAwd!oKK>Q3tc&66)}OnHV2I;U?pYrxjATrTud2#|CpP>+CpLs?2~+e zME`vu*&G96O!$1zBY%L*#abh|8JUk3F*2H}0}~i5J&ghCn{)>kvh&3*{0Py4=kcpVi=8UZ2QR3xG|x&& z*kxn3UO>BBfv5la`Om+yoiWb`Q|+G4!smmHYg{|!;K_K*30MF7WZnKNPx>$GF=ge+ zO3sewgYSk8V!)yIF!}5$ew_bKNJ0{;!aSoa`{(ib9$~BbVjqkJZ2xgMd4J*BTdyD7 zJa*t_uCkt(W{BrCyZ4rPGRn-NBT0J+WT;4rM?SW5--zA+rAtuDAXe zWV8LFko5R7P#v#-I5PVzZ)fLLWE{T@OBd7aaoW>7fs^ov>F!FtKnXU3F+E(#Z+VMR z>6o4s5gTO;yqRU3#oBHAlep#cAK>EqC!)4Ke-@qmi%|o=zmb#pVz5@H6b8HWWmAw9 zc%0H@ZyL!LXpM!B8RJTUzf(Ky9>N%#>@4)GBZ&);a!Sut}&dIw)ouzo=TVE|#{Z|Drq5 zi-DPOsB6b?_4s>}{!Xss3*@4*{?4ux2sFhq`@6VOe4rASv1@a)APIq;%$M!jk^?35 z?BPl^12;2D&(QtGwQeAY+WC9AQoR7X!Qa<)O$pqJo~x`}`NX z`C0{Tqcp&^WdvTs0{I8KQv1L{ETeyjD|HC8XGMp;j7>HgCm2XzZHBqVY|G2r1^y8{ z*N?61AKes#Ccr(i|1x*UtiVqUHpZ2FfqArzbt@4FT!1F^U+zj30;joPSGZDK-~bma z$ITZX_%i|J`^Pc9CoLhcgBf$(N+bueQMy0Rm1@Ls#|0rz>DPmY2gYy%2P)FbXQCW@M@@khMO@t(2LDi=-O&p zUVeYnKa(4{INuUfBhL3c((x=m&et0Mz5hlHV+Zr(t&$Jhf&GXU=ldLDWgBb%RICAqJ|aE(Q3R>!%Ewg`NNLJ$>+-5!m`Jehlb?_uACc|tGM#a zupF=weSuN2t07n2*aH0#7#+(RRGsBT`qEg|z)ITf4RnodQUN7?O3Wn&)5ujdec_e$-A(^2YSVJGIFt<{1WZGW4ju8lbyVq`THpU z7CZS7R-mt`fH!TMoqQAR{bb*6C-W{#pug-paTSr@77Sc0huwDaFLW3nhdp++?!51oFbgdXssxG%#NBGHR`+<5H&dQ0d$BjUH{~g@H=5!%dXqEQFIURG#hZK)<*Aal zd6Ri{J1{NwcIUBIgEjk&r8Gm)_jr@5WBU;(l=nVw@Bo`3gpxCHpCF z@+{hCv+|Yp1#5&BQkv`r%*vB&OPieb}SMC&`MxmKJ`7H-1IfCw>i6 zCU!AXSZ_mCg>Ny);-93$b=CTn6774`X;% zXk{OTPn_?2{PzTW%hCKmKlDa#QsJB3>I7MN>uTZ$_3*QdQ7!m0A@)Og2Z9j?5Zck|E<2}iH5;N1X~|GdfRg9ImfhGM;{D0yi!DuTK6_>J6w3Xfm{s6x zSp(I!3&ejbhTdSc8zT>e;NT&C!Mt zhMC=0*C{*@tXXZAsnAfnt-GXH&Ux;!@Vnx6v3);tVM2)}BYN5A96S)L=3j=f znljM&<^b;D^~4CYx0n)I!Eq~6HgA8s%kebVsZXFQT?|&)-u@;cn8o0IAuE&3wj34u z66(hGP&c}3tOR4=n365k`i`|NN+N4bL_JqQDrj4LFME?e4_lANJ$2CMf=$0j(1 z=fC!cTs^n5wmf3DKjp)U0T?dikU$@q3lH`u7jcvgYt0IAEChxj(b9gqlCuTjLbsHL zJI-+Y+`b#`dxm>3G91RHWq^?USa*XFH7O&BKs^uS4X^*%Z$k5 zSRPQOtjjNz`G{o7AZ%~#vuyT>2$(V#I{WPX5TAwEk$A#fawny2IPh#AG9%siwnhl-!YZfp<7;&U)xh5tj)Dpre0urG(5GMdIp z=V06bMK)&ZB9qJY%!bT1Ws?jjZ7}A+ioi37ZuSFkx5wCab1E@$FKFG(yWZrUgf$_u0rs%FZz^km(WvM( z@UbsLhjd@Y)#WBrjnAQUtFhb!x&+H!z8bgMLy*Tb0H1&}%O5J&0B)PtWs!GA^cITb zGkNxEWOs{jOc5_Y8Clm)u`KpIc51pu({9Ob4h4Phoo*TdurImTn z#N)$fk(J@$qP@4Q;X0t0ADHo)>fws*H5E%l32wz+HG#4yS8c@XuNj9iP?(z5M2Lo% z?KkXP1VK#?pr&!GX$$yRk2~MJhf74;U~>Z=HUam*7Fn})7|iyEWi@Msth{<}H^Ieh zx5+*<1^*1C8|bJBl!lRMD#F588T*)B7kSL^8vtW#Dtm{AAJ#{+VM5Q`$xY+&@~t?P z<2(o1-6Fm=MXZ3*t*i6F;b4QIFq&3zPP`wC4`@)$bpCiBLyTX7cOz9Zk?LZTUs|PhY-Ia!t`a@@ z^FnrQk6F*`XKLYQ%x-RdYnxoXdvVy;^)!cPZ~pLrUEfXj;oiT2o1Vu$PjS-+5!r6& zY0j0VH=lF0(_F(Et}Tt+^bO9xj^NC;3%1*KQ&(kS&t^Aw(_VI73pYKJ@mjg*4>@dG zyXh{hOS+rBgZ0gD(=)ghv~|#Z!ckOGVF?|iLf3!=V zN=RJ|w?4IyC}yH@Eu7iD##CFVzF{H@i5M(OpMFU222-DrNOWf+7l|26Ohe)cCgvmY z2NTyLVItm+1TQ7@S&zgCCN?9%-*AZNc(g+;wrCHu1DBr@H-S&Ho6oQv_^6@X%fq9F z_n={vKD0Mg3jIos;@eFlqD>`hHOAd%5wwFUt2pE`4sc_n^IG>*AhkJ?c3YmU zO2MNHyB$wLT}2gME4>v_%|#L0O65%`yTc-Al!H$e*&SbY8XpbT3EjYWS@)yPuC-qX zgSyJsvB%(V+ZDFM(0?*^pb6$0ylq$c4Xc0$4Q;}Et$xp=3lmRy6WI24{Ex_XaS3<0 z7xF@jd>T;j`IO5qnpLDN13=G*5QGtrHY+mlL2iV`iUbUIm^_xmR)}S_1 zIF#d+fkF0643PNiY@6qH=AuMxUJJ1X+au5umA*2YM4P8UwYgKP%_|+&0Q(12s%oBU zz_UD4gOGbwV~E|H6}-r6+uY`c7(* z#M^`I9cYb8&$`veN{C;KH&q{K^9daPdK}w3e>JnSoQ%WqvCe=Bp8h3AKM6ip&93RJ zJslimw|BD61Z!tqi-H4IVTS+bjGvotV7)nAhFO+oe{V^&3U^x!(b~>%t~?V=Ygp4b z*4dD!yfwm6XIYHhu&}1H1tp^3{bz#ps<i<3JL{tJ zEOlsx-Ss@P9?Y;CIny7ro19<%l8-%EPsKe`IV(PhIxoT$NBVymNlG&)>#>qmW6fD`<;KCYLn!Qqkd(C9;?!tgd}GR z^q#froX=Wk4e}JPb28JxP3xR%!AiT~k7G1z4(0?WG2K(gIhUT*%s%3zw#gc7A9H3B z$DJ36Q%+(AaL&mEJT>oewq_vIkb4|YTZ9^YkE)4KDNftAo+PKREs7p@k8?llp0)Ql zKa$pZr+X$CSnsSNYp!=bBU9EpneD)g_0F|qhxN`oWZ(5p!}j2i_0BAE+ILAu^-dnSc)hcgT)W=!TnHAgcZQK$);sr;+t)iklKW8pMOlOFgU;<2nMM4RIOVkM zV3utO;IZy?-su3}z`ahxj$p#Q&MdO#z0ONy%Dqn2PGGZpOY%BpO|k7m&KsSx(qc01 z#RW9y43kz9%i8TEu0S(n1hW!icDKNe&6#=1o8*j!>{4o^m*iy6NlA>q5p~5z zcP{#CtuymhPo0>>ci`HxGn8F-@Zp$oB?(=#QfgJW5j%3vYJ6M4={P#8PojB?9b!86 z;Z%2YZXca>QRps-n?&=EODTCxoBRfMuuA?uNNN|cZqL^AB!hN^PV*FSH~4J7TiR<&=4mOy`{KBoFL8> zZxGjr4~fr+uZV}mFU7N>9~%J{TwQD;UPy*u=q<%1;skN7c!T(m_>B09_@(IQfiepc zKNi0cPl-Mpk%FEVtJ+)W%P4i_&Ir-`%0tHoQy)#BaewOj-) zk>Vxs-{RL|07s~-Xf?5+*qp?`YAx~xDE&r|XqC}of%G%T+weS}!}@#92%kmwT3q%SgmoMZ$iM=Pm{JW_A*I1u?`NZ9L>&^IS>j>c!e$cv;mZ^bsi1%%#IG{7^FGK?V` z;+wVNRO#oEDBv2&H;cEEjV$up*IL$k$q$L2Ra|=liG0amh=a(y)e41qi!knBR_tTq5~J67nmO z%}cA0-;?}r60&)D6$N}J`6t=Uv(?a>pNxfH5-uIEBK1kgX?$Ld3f^p{B1`N}qNcsY z(bDHhoI4jr}Uv$nLr>up2UprOFl{>@PEYbMDz4G^ycYt zuo*4@(656yhD4l+IpicKoB$yNlMo;v5CTNma+4~=-@Jrj*g=uql`1^s35ouD5&4>SN$g8dcS+`^UR&+ z`TqIxJUPF5mwIdI>gwvQs<*xo`m|su?x$0m$Wt2XngH%^A`&u(*e*j?EOd#;yAZ+e zPxSC@MeqV5;$2Q$W?7Sko-Xtpq3042Z@%CPViFNo31hS1Mj?`Fx=lihPCeA0+m{w7of{7lDUG(VWf;!+V8(Ng}){^q+~)KP32- z@Q({^PV8RKc5xNZ?N5g&39#E+rzt)gs?4 z^rIqwM))rhFG82@W72w!0YrRP6h0REZ$f_~^eG}Do)JvND2MSfh~PIAY(_)|ONjVD z*g>$A2>o6nA8Kga|06_UtO%wPM_Sf3g0qQ;m=yU!q3;oTmC)uOWyIS;8dxd(-9jG} ze20h(eoW*Rr%xFGeojO}Cq&_l&O{}iP$eg2Jj6c zO8A~A91;3UkslNMMfeUzx{T)v#)ydDUa(BCui!Aj%LK1TN?^L+b%Is=1wtbdL_WpmC#~5GT#YVN@Ma<+-r+0wXIO*QB7aEuJBZg{ zTp;)i5qkSX{<_d_iTsf8KPS$_e5FBL|8E#T#2-Z=fVULVDMTn{5?ONMY>W>Cn-QVc zR^$nxyNP^&@GmCbf$@RRQ-}*K>nbAO|I1AP^PHlvns_}%LPBpN&a);mIfCg@-mi5ageSU~&}Ude>+1~kwAA;Op?c(>pqf(Hc;3!V^6!=w)rXe~HY zaJ1mvf)5HlCTPyOMm+pgHkg`tIiBPUF`I8M!9jw<1kLCX@|i-<7c_%M@HwB%_-2p@ zdHaa}5b?-8L_}}+H4(ScFT`AYXXocLe3&RC;)4UX z2Jm&A`vLemy^e^t-~Gfkc(R$#WF=^{{EF2cHACzuU%N`-$e6T;F&q)&_b4*QVRi>% zFSH?IAAIB|_D7FM9Ebr15o5+@iNh@G2=PKx2=O9}dihD_(vcYEG61}cI2uPj5%HWi zF4gc{Ur!p1@DOnd8Z&XKe9J+Ts2v53OWc@ zyW$c(_QR}Zm9rNn4!ZVxb@k{c0y#bMg(DDTU>vCZ{m{L1$dMPe^!427kk#Mlr^>W=w*rX z-3U^!q8WP4vP8phGbn|kPsH^8Wr=1<-s~!B9L_~wMWs8@m!KSo)HBq(09kZb$cAKy$aDnyjeOvzI4Y+HYs*4a*aSZQnr+hofIX6te>6tL106K{@pf zRKK#nqI2NrU9fLO*CVsAey2XOJdu-j0d52pHJ`4mz)anA1tu=OPuKlcBy#Lu()DDZ z3hVhR5}k8v^OHqfeF!6VLF4eaSTiM}JJErc|mgN~Pf+P!>B|l*+<`bjSM= z4b^mg5#f40`@Y2Z{JF@M-CA`Ip+XCGg~C%%6ua1%a0)&Nh3n`a?@Q$7o6&ANVSgP8 zk4T4Fi81XI91n$C=#Cm{=W~qNUewNn!dyFMcM!D-H{4a>nv)E-0*Z-D;2dR zZulboEY#FE{Q+UR{!u5+$)CeW-Bllx(`{~eG9&d6Bd6SO6W!tdMEAN}C}sCjlh8Qb zfPI-N!-PO=j$V3yqCid5Pv4)IYTsX1H(Hr!q$+jKm5BkdmuYx}+HI=V3h&Slu1qws zU&+u1S0>upPsjC{m5KUlj;_1PnCP_1H?d_^;u3YUR;v?t`6liW69Jf5vpUg=CSG5S zOZihw|6_HclWo`6P1YnjC`XT4lNg-i1CS5Pbx{ z;V3`B#-e;ABIPFtc62JPQ$-+p7a<&Ng_J5{(YG`8<_8i3>I{eJih0Z@SK#}ZDc0`V zM8o_yQFVT*d@HG#%RK#zdlT9fj+OFghVHpGF%XMDmaR=RR+IHEL@FAC(yAgw7m--S zf}cD^2Yc!VrPMEAo^!?Yv83p`GIxx2)+L(TE8@CnU814=UL8FUsHWk=c?dHUeG z#7Fj{b@k@;i5>QLvC0t-CT>y)=yxAV^tO*>=!P2-P1G3OeM4e=Ba?E8NqIHurSx$o zTcWN&d3S?8577>8Nc;@-S2p50jnThuOn3lqQ=%ha&Zb0bHCu1plqdxC)~3XAz=X|- z-1v96@sw+`3DJ=)7Rz0)_2xu#$oFqXq#N{!&6uwoqqDXoIs=Ap0kgTDx5Y3Y-IC}K zGkI%evsTp5(r+^LcUuzud~V__?!c{yo-nX%tI6LRJ_H{&ln2N(b|#n@<+u{o`D#-g zz3|~g6W`WUvDHDx^a~Fs+QZh#hZF5o6W!twOl2c$k0ho5_CAtmZR=R&H{ja#rkJk3 zJu%*XthT;odm<}`Z&aZtgG$ZC@I8w^Rwy5-^;SRC(NAoLA+Pe#_QaVi_c6}LS*LV< zcA%cdLY0^f{x0!f%=`b3i&ffu5qR@oTa}>y7b{M%mZH91GRzBB7QLFt&J1ID&8#-( zkDjIHewxVCL%wYvs{HV9;tluTvZ8@TvnyZtd*bG(9jnmZcbGUYuF#8ts)IiK9j4tc zu59&vVvI95KHlSjEKSFSHv>>LjuGe z7^4w;q30m>!J8DZALeR^11yWaF6_a$F^pTNq4=m%89dMHXuJLxuAM&7(9H^TJg-Bs z-oLkFv&uW$d-vGsZ=#CStB6_$<(^~d!B{_%oQ^VLM7J2V8(77ksuA5W++i5eao`^f=$zv| zae_VQkLc+7I#@NL%SApht~{mx(#ac?bP+?@TRj+xOk?*G$wV$x#7uZvfpxr)+jAjJ z+0Ty7-ovetk^4}+R^&>f`925okqc28CqlPF0W0u4SqJ(;vlcxUDZ7bU#b|U|XhoXA zP=&Hmdm*``-CS|sCp-rnQ(q&HHVQ`VZ_LmlZ45N*<9@i3P3D9Nrw_r#XZu^9-;7u6 zI}@grQ&6)7Rd z3iLzR+0U$Hav^ZoIWrUCI_;q2{31izIs>8W{JI$(AudY5O3kIzR{fxvG77P5HI$zH zA~TVk73qPCfwbE*Pl3o~%wZ^UD{~Z%tYd~Ek&R@gS}7-i0X6aiM&<_O^>>FNEvbo* z(kXOjrqnoAWMmM3BKfyNr@mEJy@z<%#H{KeWA%2Uy3{-q9H{G;c{#}!C|<94X%si( z`zq^=N;dMY*0W^U@A7&*L@leq1gP1o1Eyne%0cANEI5p0HEfCWo%ObI9;_09q9|t; z)DWgY3t!j}r+%HVat>DM+4aLl?`QpLnKw**rgOS_4PqwGOZuXOte?gMb?>g;!|E1& zqN|scVT98d>q%Vn0z0C!yLofF{fv55JW2<1eM|@Ysk6|t6&v-vR98a^ra`XuHUiND z1uf=AShbgGYFOh-^xvAiJEFI{B7biY2ZKYQJ0O^z`~=^AiF#ME-}I?DpjqklSzD`i-7mgM4Fr zqGCmt;yx=~!K*)6t%gbX4(O~d)Zt!Uj$h+*Odc+WTH;-OUN3K0^Hxk{fuBkqqVVh) z^*Gv~U!Vn51^ScT*~`luXxiK2n&Q`EMbHI-|FjpV}Cz_SLphUF(Iky3)MXI=Ax4-d>{=`^kX*<>!)| z|Ca+~j&dt8%01VqJa>fmy8Uk%%~pPYvG-w$t{5JQRemzg%L=M(`o~FVJG(3UPWD_| zy`hI*>0Pfj>Q}Gy2HSzYI(w=&NX^qzrg|;#er{HTZk_7I?9Bf9xv5^$U}JpE{z*T6 zBi3b}0$-h@+XUTuI&T`nOLUuQUZGl~FCiSj>Q1jPcpA-bxgI;(DZnDux5=?Ez90G5sXM|e_MBQY zB%}u)zh%_m<5sP~-&d69uXFEnRy10h_rUK@Wqtx~`0%OaOO(b5c`F*P{r#!f`rn^w zx%2m@npHG?fDYb<_G;8Cuh*|9lfV3W;FPr!|4-a^)PaAuLHxgR(y_wwl}AJ6la6gJ z-*v2a`R|V1QC{!Zk_e-^z%$1_FR%3oIOR83`@f2)$fJR;?!c}l%HKO`mp^c{)~d+r z4^Cy}J$3B!Rh@gBI2QXUvMld#vc-k(_wF_LxC+Bcr|_|ues!K#t6l4bOuX>ef`tc< zHCy=ovEMCZgwVV19SxL!f9!KZbw2#@(ZYpR;m%`|7w+oyo_6PZ9W$=JHht%wuLF1O z`QrHCz|I-H;VWUjm(}KnikXpRs&LEayG~f??pr?`+hK^~ zy5W)5z4HF~USpM!O1?=IQ$JYt3B$CfYBO{dOTnyIF)_??SkU)1{5_o&5u`N zr7)mdpH^%j9)i~VakybSh_xh8nak$5ME#KiDdW?xM zni_x`y>{S6neZQRb&tU} zx_uR$?$dmKGx5V#EZ|<`@&vk!b+}aS#V&J@k%J0%#fx6;eU973Jp*Z+>z~~+_YB{# z(9gu_i^J_I9?&XO{0}IR+fC?sD$YZE+!{Z7@lDk4;d0GB{p`gDQopCmNk*q&y^23Z zc`vt)p|`5|HfE#7&t9Czp1FP8zj9bkM|<)14j46#_Tn#5p`R&(Q?Ogbd2E|o<7Y4a zd&&oh{D8{r)@y*}*7(_re}^i(MeC3WGq2bHij>hnEJAOau zky5qE^>&=jJKW2KvC)p-ikR*wp|{%cx~#j=LT|I^%>*Y) zQP()};k@`Y&imp~%CB@UHyPaM#QC!A);RBr_af~(?@Qw1JMk<=nC?z85q3H8S9o!* zk__x~;sumnEeRfgoEfU|=NISvq~>5LBYP<#UAH@a(mc__{|UH2xJ@0yUqzhAmSFopMiI*;p1VKnG7x2IU?C6wgiC*5PnMP#GHW?^*VR{F)1bf?a^DxLIc3>n+kF@z2U z{{3ELTJuS>8%trYlfIlJLq55oicH^L6{=gtd*Ei%>A=5V4)}HV;Wi1kRQ$3T3A~J7 zIQBb*@&mZ-rS8-CN!esvT|@$ZH(JTyLwXx1qkL^%}(htnXF-~-!A*%%Ikk;OePD*er*OhImXv3?|sI2UVmkcld9p)kZc#=OM8e+!4Z9UWiVK_F19R z(5_ISWk|UKP6+AKFEacK{JNQuk(`JMcZNn}l-YEI5#r^fM$;T!B+o^($QWiDHDq=- zN5(ccR5%d&|;T_9ZBK zQqA50i}upY>>5 zDkcU~JfSZSe#~G9j=>NEj=*MFR{mPZUxYk&F9L@UxW_17;4EE`gnrUlx(GNlrQEvS zYSTEUKp~=gz16nyEW9B%qK`wKN(K$zI|ZsC@GvZ-Z^0Fa1fF7$z8-wH!}V2|wbuo) z&{pxwMH}h{yzm!rfUdeQ$anq%(-OLDVEH+ZRlv5O%GeZ!lQeCijBSCQfE&EXOV*v| z!1=joK&P&%M-3zAB-B(d?$%j?P~$-}E!BHFGNCSP$Qs&#|LJL%%Yt{hi7$cRB$$=k z)WWxgLcEG{|B}>LEwzo0`XL6LbUkf_mlfjS zm|nVGxWYRxkNnG#6JCxRS#_!{ZC__ujlPAkiCAXh#ArB581wU zf^Nz&C7f(F;8dAvN)@Sqmsp*J?|>0Pc^RAcU*X+kH^+Aj-+x~^4K?8Wnrc~7Sq(;@ zJtkEv)`OV)20>NC8`@_y<0Y*1rOVAl;@PD6pO8SR$4E*=-$ssyKxj(fSj{GZ9X;-h zGWzLdfOFMj(1|Qpip{eHZMR?^{h#d|e7E2gYQa3VV8?lun2NCQ5}HqBqf%_ZzLd$g zI03^rdVz;WrgillpD8wNW6El!T$C^6wfai2=^E`8)$v-e^S6o=245)1vq(p&JY29A z47M;KRyrDVQ*c`stHG$fNK!onp6WtH{y@wE6{#E8ANW>y*?lXkq0quuX``-(u_`Af zE!h11th}Tj&&=ydry(!vqxXAyxRs&W;6qrWJ8xCW4`M^Nlh&zL=URQ^oH1=&g2_c8 zQG_OEk&rgcxBA9gqx&fYUt;Cxuljb*w@XuXTEEWC^?-w&!d+VxsV=ETAy}ANnyQdw zk6n^X0SRbE^__HoCQmX3Av0SonD`cDuQ ziXG{d_%{*;uEM`<-CS~&PJ1EIpbwuWMiG(B-y8Vt17^DA`xl{a604%~IqR+kbI$)w zz<%|BZm=2?9hV|Aa|FgfFj8Q4s`sW9| ze{~7c&cAnT_b)C%`rr9vX{vAB;2jK4A3JMu(PYcfT{n7-dfe(ni=5e|POTzmW|0%k zliyjTttgmTO4jV6R-p3QT-v%gd_#lcf;(HD+o-KmUeuKTjoReuyJ4x#^T~cxP{wohJGdFn|&c9~{ z>9(z2cRMn3O8JD*<0nrTKeh7ZN4%FqnPbOaGkV-wFAH9f)-|m{+1n#!X+64yhLwdbC<_fK3k@wxE73Ds;U{Sh0@r+jxhC1%9%IKo%qxnm;n+Oyep;GZ1x=jg>y!TXpV^l56{I$OZ}k8&_fRJ~+L zZa{Z<&BhrPh@H7??4h_G`I;ST-V)277$*<^srYAKPWrH5Ra%+LhCW(P&j`8!J!6-b z8q9=XzMi|wD+ra)M2dc7m)9t`GLsHe-Ud6^rXJp7{3*WFXT4akv^NH3I{#US`eSh0 zY*_~L0ExY*zrN~O6m=%pS%$rh?2Y~PUb623`!;_u+Zpl?^w(+6c}+uU1?Zg9bf@RM zMs|7|Jqo;FMH}>{rgUqbgX+8e^$xJ@9&P>gY&T+Y*kavvv0V@x*%5`-&7b!g2e1+> zixY--U|HRX^g8wRj_F=qoT=oER0Vp%Zf}xa-aMA2kH4d0(aTXU{6je{rT3r2L}lz< z6^mSJxU4^2w8z_vR(Eud*IvK%Wh~a_U6Bzm?z0ZzpHBcj25RHc^clicf0X~A^S9Q{ z($n{1u|aifs&0Bm9`Ujo{imi^tykUZ_U`ps=+k?>&T@a8_kuSxIR@q<7}s7&JQtH+ z#1`BvsWyn&b6~_2LPJ`|fY(#l$yb=+MEvuX02qNlyoZxH3W|s9=p^piE55)9o zu62q5RNfgP2C96zb7KhGo}E^C&OYy2+xN1At9zeb`JyLYc0d|0JHU?m#EYJI*#T+1 z>;Rue+rDD^ZGyW6 z-|#W%pC^cfzZSt6L30cs_&K=YSuk^~ACQwkqz4F&6ue1rk>DD^-GUzpel7SU-iGV~ zjKa+B9T1S{cUl)8^@Xvzu)X9vU5IiZ!H9zDB(2|L@1ml8Df%?qLUgILJmZZk*g2pKh z=#`|=upSWPbf2B82fgBTN=9*0Fiwu3@n-{?Cl_$70li;S-dFHq!Eqv=B=j{xUnexb zSTg>6q3;ozAJ1rStxsQSZ4kzGQFub=-9mGbCnLNr^jky}=3PO~=a6oP_hF*(YX}^v zj~s5CnMD7xpAuL&NJO)FL+~vkviPCM|0eW5g#J$GQ$lm^8TDNv>}3dT{LFxEL>k>r zp~&gzILZE}gD|=gVZb<)K}L*28Q^5$Uqu9ctKd2!4AO5b`7aV-@1W412?p?DO?gKm z^t%W>%D8EPfSVMU<2^*w2oEwK{ie_#2yNW3fd3O|82?rHweZAX2O1+n&I8)GP$ggJ z62YN@69hNMiv0)&gmG9zfH=M|6TQv&x&Dm!cN(RR!ZNo>S1{6#`9AwvFt05|sXo&W#< delta 431729 zcmd44349dA+CEy{!A}A`z5>!xBRP>;tf`UgqxE)bZ!Ih&Pz0cEKlOX5wyL#?D_kZX2>wfB8>aDky zuCDH`syXz?zvS`1{3KV_iMDFhwq5(8k~X=yMY;T)dCtvk-Kwa#*x^?s2%$F;VqE6` zt4H+T48D3&2p-3l{^pR`ABq3*7<5F)_%VOCkbmxo)<*b#yO96Ep$!--{?xHKAhenz zdIoXG659X6L%%a1{?rluvl0FmeNUng&e7qB@bDNGaF6SE3D23w*44tpYe%9H2V zUibKUitym@`nR}8j}qbiBgd8dg_p;UVSnl{eA!WflQ5bN5=PfPzdgpT6-NA+vr-sm z9;=oLgU18Vi64J06$X#jH`g3yy(6OLsMsRR_;K@YVLC??ffwfs^F*ewQp$x@G_m%$ z^_Z~Y$17oBsl!)tLimP#Bz)7Wgl}19&5_XLTTydVO%Vx?3=j#gtrbZpM~IZv3K3|9 zEe?eXYF5mZO$h$Z4jIB|`rIXaY!aR0R;eDNR= zp6(IhYY@KqTM=HrMTB>jitq~uMfigx5&mhTNXu9w(h3@iwDJm(HoS+3rcF2|(&p!i zw3S;#+Pz0a+MaTe_C}#d`{bZV`z2qbhe||x(>@}-6ybA5i1bSjiS$|Ti1Zt(MEbfT zB7Mhkk^a}yBK^H7BK^B;k&$p*WHhW48Kp}_#`$AK# z*GEKV!T^yOSsfLbT{eo$OHPW+MM)xa%L$SBcA>~TzFB1cP$9C6u*hl&yznEDHD{y9 zdhC$MI-Mly)ITKZlqVZODe^uGhz5C^MT4t*hz5_26b(K*DI)zhi^z@BMdZ1kMZ>63DH;wh7Y%P} zC>nmgQ8db$C>jmfB^q6`Ml`aMM5E2yMWbg%ibh`x(KuKo8uvRS8eg+mG=A_~(fG+E z(fAD2ympUDQW3y|qd-J^GPo7MUWNOixxi= ziI%}6(Xy~awCufEv>ZKMv|NxYTCT;hbG>N!4(MM7sUsQ>{2#(-jVJ#-2ijb}S^VA+ z{XN0|NBrpTdiHk2@fWuPzbAx9t|ikNhl(pIIY{ zk8T&m-xP_q!HJ@6eps~akty0<{HCYe0|0L4?8mDwuL-EIt=$}#kFX%>W}m#z=(%lnPLn2~F*B!+nl*jw=*n?|!AVmmRmS%As^9$5 zX_rr*Hg(+8%9*34Pn$h%29z9yf8&pxHhZeQYL85h4d^{ow%N9>cT;J9H?Gv*i}uD$ zs2nx3a@zD!m2(8bt&68r&S*8K#w6IIrcM2K35`0k@#AmqThD&uhmb9hO*%{giD^%id#(n^@m@6y|$b6db7#remifb{*(62w(owNw&p2M z@nw^93JR`{&7asfTHb(aqA2qznQQHF?Bi6l-5h8R@W1Te7e8(}?iY)36z!hgTRin= z^-k}o+sBv3l(hW(*RsyZ8c=88-%n3DmNo2L|0_sD9k;4P)}Jaez$IKvLZ`a1ib*47Rcz0sdgoU;d6fC$ z;4h!Jc`VtHG$3i9{{WIuM?486Ez0w9&xoP-&#WlfQ=4bz-P+;lQy$BkoF&U+ohDxt zyJvD)#!~?yG^b!Z@;p4b%ZEVRo^0QBRh_ixj}nja_ky9->%_CPN_+s#8wKbe>IfGM zqd+qs^@39;3E?i|$?*DERdHh zr|A-J#WeV2T>&?|V^~DY-{C z=AA@~S|s0k5mCI8D;=uPnn))uV=-uvB1=Oqy;IzH#lpuxg6DRe^-9LN{5Z~uonWrq zXjO$ItxBAXHf{uA)gx8BJE}5|F|;t+yF$zQ89o^$j75jDV9Ds<$^zDUWX33Usj!uZ zk}x_mSuK)jy@KS7GMCD7s@mx4YGzya!CwQ9U)0RC&SSjpy9LtMA`Pt%kwv428!_K9 zNcD783!w(&a?-_*1dQ&Dma0zUh*~Z{3 zWYlWN)Q2*EQP$RG+8pL)*JG`u&Ec*umbIL+^IXbj87#H)T`IxqNVXSxq$Yy zNWf~yqPWoYCG1p|agj@9qMjH>{}Ck_HAdcyaH0kEY-99o^vAEQDa@oV+GJi zjd5<0mQ}?JkB>VrmjyM!r2^Ik)Ku*%Y%Qg1k}Jy;`eUrb$;~_{e{>90@I1k@m7YuM zE{Kwt+>v1w&`beD45Gib+j?x!#rgZ6l#c7XAvp;f-Xf9nZPUpCEw0WH2cNv}I zv?cr=^L%p@=)kq8FLQ)R4+6c=8qEt#dLUBw>Sh=7Ye<7{BD-d}6GoK=KS!3#u8x)- zsgl8|jMYuii)HX2D%tFAPK&~f9$6}b%a}wD^Jjn_Stf&>VBYL$8ZfIz*2&_5 z8GMNf1C+u(8S2(+fWW=hmG76qyHOD4If_0YgRe2e=PLT34BmpaU=C9BAsNKWOJNQ+ z8#xXik-_uO!ptE`UZn+ZqXR>uim_M=&SQ>-DF>En!M`v^!xgB!E>48E6pn$dsUv`y_C;3uk@k+Mf3KA zhIEI4IcAls;0-=Zg}LSuhu-TA4e2>lnDfjPuG|PdM)_6dYFBOq$I!v~=AEwG6e&NT zQTTZEr%3R8>?eHh;*`Q3%n3RDN0jZ;=^%U}r5QzOIHeRb#J@M z`B{Z>Bf<%uCves*Pj@s?z;cvp`lYBm89Z%ZXlJxTO$*~y81Wd{7=T#D0_MVa2dM@y zjPZ49L$z(V1f=mv68m2x0Qy-&J#*sM`{gyN`5!8&P z5bMUBNZn)n3umv;+rVzZRb>!o$W(YDUz9Ra{s5olM7b1fnc(3)CR08}Ll4R5T9$sWG1; z94on$;3w;$%<5lH^COlfp#2q+TTebuSw)TN2$H>PR4eHGVru5hLx?~4>bR9FEfj>D zA$il{k81RHHDc#YubcrHV{ZYw!Bxz5B{e_7AtF(^4=q{VR1>)$xPE&5eogF~SVk?u zb7QYy?13N~<|0rZgZoBukTwh9oaJY^mMzDiZsm4K3;e}>j>xU_dAGzT2ltl^n8I`~ zLUFqZJ-HRUWlV@Q(9TI{h-Q^Hl7qddE+<_#AVlNoDusOTAEccoayW7zUqM(1a^E61 zB1faf9{+ zBs-uOlsg3#)ER;F1&r468%_pizACXwgbSncWn@M6l#)Yi{wy4)acc?8}H>o)wXWs2V6P31*W&Hept4 zYo}9@54br=LjE0gp`1+nTWamcBed}|=N;K=x!Gvbn~YNSSc>rt3$@D`j5@5luB?Bh zv5<~-XRqZlk~r91js7|6+*d5oCJ8cmcrl+Dp({jjH=N|XPC>bxwpA#*#Lvv`=qMk9o2d~gd99Q<&x2sTi6p(trDOvvaW2J9@@w>63CksKSkg_3 z87%Xz_QW6?JRhcjeiV#mZzUI`+QEc6r-l%$4aqBkxH)=ElX zI0Vvi6-kDZVT*yZ^fL^kd!(M?7*C|}j25Cxl4CxxNm6cN6Wq?uz$%7VsrU_^@D6X{#G7@|G>blJuUcXSvRM`sdHo9S<6k5WnZb+_ijYY$;*rbK9 z^X7-svh!<=WW(8}^^o!qIoueLc!76YBw9z>!$Mj;duovkZL6w!P};wSHA`mO=X5R0 zut!yTlKzd6H4>Gji3OR&3ODTFQv1|%jY45~1998Ch}k%#7*t`uIzOBq%UPHd`*7i6 zJ369@{j{k3-xRHna9L{NA;Z3=QcJh@ww7z{>Eq?x2E+OdA2oW$*jbaNP8&64(wI@0 z=+dfnt5L05j-TC!guNBMs_Nn|X9saQL!8WqhA66c{7cZC(w$OY0(HOD8|0?~% zy3Mce_(yeZc#>tmx~hHSKOE!1cS<7mRoi5fKN=(U_6;2xR8F4tKbHB(@v}!#Hhy-j z?8f@rM&FpEMcZf^`YYi@e~PifLsEt{&l!yEXESz7*>I$0ouPtZXx_ zzd@HLaB=m#i2;VA1(bG1ncXV|$;|DPhnbeZ?t z9N+$Locnai{-V~U2hL_}i5*;CH+JuyV5~)oe_N*&pJ^#GD`(8Qv~tvy<7Uj9G;M0^ z!keeXS`QKK)tV$_&f<70>H1+jDex%Sr! zJ^9-fuW2X~XN(^;W*V-tQIqhs#Utx(d*-%Dy8U$n?e|+6+k(3Ow(7FJZ{*O*(No95 z#y!gJF#w%$B%C_qg&Lv8tZUhNo>h|Lt>xb_oDsew$6|G zrkv*v5&PSNv#boeB3W9oW%uX%D&zdvp8I?I=GRck8+-c}*H9OOT2@0nv~ikmbq&>M zQ*Yne8fw<2-pT9Z6fzUCw;q;tV;^nG_iYB7Bf|c%v zZrPk;5Bs4_X6(S`fNxnmR_x==Io<&nbYwdgvmXlh*4Cuf_95hhjVb-aAJ&nIMDQ+xB#(Q;lMb@v9Jya zqEH3E`E7Kfr14>Z3B=jk5%AFGv=@I*VweAraY9638qx!v{W zl5hZ$Gd~-8#3g&}(dqRw&n~#)c6hxIdw*-F z)8l8Qm_12|D&=%<*n!xol)oZ?@|+IR`RytZ_EY}|HS&H{BE;Y9t#8SYeKOcQHK{K= zMvEB$tts}ZzX!5CLxebNw|ZO7+?KuVBPnxZaz{&?Tj4xCHhRZbvUuCzokQ^`V&4?# zfD5QPU{}0a>WLk!F7)wQ;Ll^fOIh}=fb17*zN@8=uQvHBkB!^a#K*T5{FTRU+0~@p zQkM|$3}w+lQ7-8AU|AfBB|TQ(uCujGZXQdu_NR-UPRGN}$Nlw=-S}9JJ$Y-JK(w#8 z89Wv)pXq`qng@SF8{!#7=Q?sr9Q_TQAWkY8<%9T1cpc{2TkOy&cmw6q{T$jaS~D^A z3-A$hs8VnZq>9PEp+jP+qB#%_iZrp|OatIOq~!UIJVU(t8#+sTr)ZX7P}CLwIwO9R zg_4HuHvS{s{4Bc9Sv21`(}wGCJ;67|q)TxGMULPL;P{XB_(GTRA{;@HC!Va8N1d8^ zODXUU5EK#doubPfx{*jhBc%aX-b6H0v|A!g#h~BN1%e-`sP9&3bHVQ&wRB6dvxbiC zd?G91j9dE4Pc)BNyUP-41}lPdL$=M{-B89lr?iTBR-|n^zGtuV{*u|(&UK4HJ2$rT zshsFc_uA6Xka>-1BV1|1Y&<=Z2A_E#KUdKW&!oY3Xz1Z-4R1?@Kz}0==DQcEh6}Kg z`U`}ZLxdhgj=d^iR2#0|FkUUhNHFSOp&Yrybs*syJR>s#=sLiJMegf24f=)TBR;c5 zzT+_H28u4G90@z|k#H$#bOUGT>h-q*3Y)E>w8ELR;Zl zh4(9bRN)@yg%J$wSB$?Yd|%-w3cpbJjlv%lCZmzkfw~HtDr~QipBE{=K;bBb;}k|O zQ-LcK&Q`cU;bMih!uu5Rl|KzXt&m*^>Gu?#QuwRFWL%(*qY9h47!~amqo=~53fW~a z!c_{dRd}<)bqe`uhkCmezNGMo!hb0IR-uL~nfd_-QU3K6gL6G7;5-syABE>B9IJ4K z!bJ*~D!g6cCWX}spHujT!uJ(^MT{aL4!f9OB02zKuEGL^?G^S^I8-5DeN%s$LVlVd zeWOASFi798aJ$0ZUY9=<7^MQ=RTAeaECWblI#6IP7t72c+BlfuUozOL{Cg6>e7esKVD3 zexPuZ&(*6|xLe^tg>NZ*N8xdWUn=}o;g1Rh2HZ?H>Q{j@g>@C?DQu#!xx!+Fy%q8U z8VwCqc!9!E3dbv)p>V#!l`clbdc}A|;Z7nN(&GwWQ2cikenLd4e6H|2#s8U@h;9)F zk*kHYOYt(A2nRD2oulZ+#1zzjGbe!8eM+H3DRfix03z-rgA`t<UAmY~bnZj?0(EF8`jqx}JEyQFZ zb4tv?)2qT`j9wmQR;V$QcF$_Pg6rUrG6XIn>e@GmF&rFK`iHLE4#CIzufYfk%lL z-t1KPI1zgLl>DILA1A`$lZtL~_TP8$7x4~2b*=&sTBfOf*;W$kV6&oU52JE$ZNIEM%q<}0isqT^bu za48Y>w@l$mB8qvn!Zk!VZuNlP#4gS&4#Yf% zgK4|UUOrIR6~5rNt}E<|#-C}imWLZf$0CdxbAFT`*KymRZHMEL-N2Lwz#Q!AVE(UR zL#UTfP_HGpm=QdeF*Gl#j;jzdppK;nY0%K?f+f4+YXvx_^Vny3Pm!`r_IJ_RwFk!? zs}!ZN{pbg2vw436y?oPDuD7}Y292K(*4sEOBqEH~9#F+DGaBvZ3QLUZ=v#l6a^|Ri z&bT*IXW$A1y^V3o)<-8o&n=EiU1e1qV_nK))Mo{Za|^&Sc>B=D$BSb<%}u!BLZ@^B z#=R6ybR&k1exxS3s+bDS8;m}AEmYm*BAxTWknWThi(Z)gc;o5IJ8GQ0O4_Re-a4_D z-^wDJi}gneIQ_$&us6JJ?;08 z;syNlV+jH8ZuC`aVox6n*;7ibfR{JsN%qq>crxrGx928#*-|q3y~3WpH#?vW3)suE zz3KLeYHz^HrjJ+h?}zNlDQN-k^B!Dg_WRl1ki9p(VL+Pps{0G-@{T=SIU?rRcTY@j z;(f#?#A~+P6OL$ulI^SOc^iAD!;QZ7skC-6+q&43Yv(TVmD%T18Ug#2XMzFy#|PRZ z$ntHMf4E3yaWa>Nf$_}>?@+iY=KHvPUJ^1uX@)|lH^N2SLeZUKlRnO?>0Cy4ub-v2 z!Ll;>489m2{`d}AuT>Gf{Tf|5V&LbIN0BkfneYEFVkY}HA|J8Wi6KXH3-mO@G_|FF1XA`KM!{{wN&Xkwpn#;u8l}bei z(7CxwmAt$^8=l)~%;PzQqDGIj1O`lx;WlD*B*IIfi2M3{vzV znZmbOp26lwC-EaPr5)u%l)OqyS<6(0DtfV&Qit>~<;7Ah<#R;z3|I6rEgInZAWq~@ z=}OBNnd2SHtF@FL7;~huv`$Om5Ycn7qStFF8&NBsOBB6POSuB2tB}{thzo3u%WoR+2T<^-TSm_6v@i1$KhfJN_fpNnkrXQAOC$4)+y8{B5Hij0` zh9JJ420h_P>kntWX&*Cfq33{Qc1wYNSXwhKXS@kG$+Qb$QA^{PKu_xq8=f>KhiP`R zVb;2;7nIWF3y3ZIOD4zPbb*eNKY5LXPVTS~OZ_Tadm00uuNrI58nN@gdKS|%>YmKj zAnE{s==_t70?)#-bgHK_3}%I6%TCslnXv~>KCC?~V;7#P+u>Q1sl4w4m~Ia5Gj`)7 z?_M=jFCm-wd>@SJ)ba*IP4V z?wLP2$%_-o{(Do}?58g^GVEU#bok>p`ad%X?$6HM`wwQ!?WiZa>zGTGX?MS)W7t0V zY{$gvf9Z0$W?wPPlU@CkAUEnwd&P$*1Ey@D2Ov2kV6F zEy=P7lZf6=mgmYMyHyHii&$?c$3R=<-ftw5b1TOf|EL|kZB646MX^xD7V$r17K zLu}Q@nVvSSi;)97n?z6MA%nPr@vwwnKAsu#L|})=IU2oI=B0kc&oHW%bm_8<$Z9*FRt~>q^^?}A2-Cx)A_j#W@wR1X9V`- zZtXr#E6@)nA_ijFIT4xc>o(@u(UEyor}OQ$5qWNu*XmomRA~%@nQC6wRTzL-IL`jz zLFfc{dIe53E3=(vbj>>k*R%c&PBp`w8_|>Kk5e_iGW#i{raO;u@s-)pMo_}i?Dwc< znH`}}JKos>r}R1SLydRpl6F^SCo?s7yu(NSGlx3`sE=|_E51WB&p`}Ne08t+cUmuY zyKs-mMMa)ye08sR80mOQoHuWgBy%X-^2As7n(UlB@zuTNdF+eht9#8^G!tLlYhD9q zJYC%+vdt4{7M}R(Uh^`>!|Gn-G}6%IRv3E1QlQ1 zYc{5t`08HsE+&8G>fUh>>u3lVQ#fy5JmwBIPHBAtE0*UAq~kk=Q-b3NS9&HM1!=mB zV4Thnz8Bzxqs7;Wj*@g~ert7Tk4y7)qC;ygeSVzIap?(h+V9e{o;&Qcxy+r{(C6z zto|AB)!SDkxJ&xE#?#wR$#+Zt$0&Jk?NHahlkx#dzE1|a^|BM2$du^A%vbH;*FTeV z?cmq1F(b8uU;kd(8ElRM=#eAR-vy1pTRZsmA7i?;gJ1vO(3-u&RJuzwKfgPAhbtO` z-&EEJ2fzN8X!#-&pHxAw*8JCyt{wdPlUO3PgJ1swTCN@Z`fp zqWO=Ysd;M$zy3ayM{5Va{wZ{=cJS+ej|yYsuIm0xEb`jHuRlWl+QF~?1nCK?O4jK9 z!Ax+XioaI(a|G#~q~z;#|47KA-pS@oj)&`Ye^2J9cG&Fa1Ws@5u-QL>1}`^lM}L>@ z=h|p*?XcNDgYs!A!F{^F7vBGi|1@)arTL&^u*&1Vlk(Z-7KdKv32+gscaF(du6m@(>)%BA zT=OZ1-s=qv=@}g=yz|T#T?NCxoeEc(ueb_^zYU9QzInuzo5I%$Aulg_UnhpxJ$N%n z_9MxV(`~SMI^BX#_{LJg>(w`vq4sedHjKn5JD`y8IX%EkD%~7c@~vgaG0rD!FS`=& z*HHKEAc-mX!h1eWzI`Maa>+O1q>rzb9bS+R7TyI;XM;zUgDAFOdk76Ix8qCz%kv%1 zSib7K60kgPLLoE&wI>r#mm?g01Yr?Q#TDQQ{{vT~72bpNlEQbwZa}12<^#NL%|TEw zH@n@uFn=Lyi`&b4%*C)^ZgVLN2w1~%l7o|%S zY5Dnu#Jo<@7i{;C2S1B^!Uj&!Um?BgC z{On}jqR61Xgv$3gnbRU65!}XP&;(-1vwMq zj3o1*e4m-*UDSMCWkdK+)A*Y;nOwvuM^)06zXwXoJSJBlq89OqU`HnXfxI1brsT{S z*%`^=ku4o&_>;|1?pe&o6)Mb}8tdT)=5f%q9U_yIgbz2^;CC$co5z^jr z0|fll$H7@(at&hDdlLDPy&2>!sy_1}`%?98965%a++12wCzXLrL zPnv&f(bs>rda8OyJFGx9W?njD()3FEsa&m2b)yp5Q>#ASQD*7Y$z^i(f4WkpdQn%I zB<(G`j6n6eZn8-CZE5DV}eA4?W*Cg0^jb_OXerr2Qq>pSY*V}`?$jq=;lDD_DeGhpb*>~qO$*_-smwd7{ zX7#Ym;>hHJ7%Xe)D=lw0AjBzmE_+d5Jb_}RLtmugO~bn~`-*B$$gUzg-CjlZ(j0vB z<0=XJAh{Fm_rb+l#;*6*Zz6}d}btim@GeyH#pg*q-a z#tSKoC~V_mRCHGiK1NaTQiY2Y#uVPGaGSzs6~3YHLxtZcG!z=&uxhZ{Iy7Hyp)KAc#AM z2FxHrvmp@`(@D|X6itKs{Sc!UT8A1L_=MW0giFGT1$(=?G_odnQ$Q(RwR10v!V zCh+qt6xu09CnD&cita~5#B&rn^EDyASjopI{v0CsH!9qy@Ck+ciH(GKMbYRwof7tl z>K}*7^Rxz0UT`S#7!f7%5D~d}l8Brf_SiGdlM~}_+U)nw!%eAG`*!x=JHz?ajn0>* zOxy@v*&mi~Gwk*wWRtQ^jI4R50Q8;g6XTl*-iMA&cjg_(UsYWMvF^-DkH4zA!d^Q< z*3H+c>Vrq>r4(nrtCv!3XxDuy^`O`O`v}<}+6IcahvKXm5nQsmF%nAH5^xpFoV6w3 zMrhS;3CP##wOax@PfayD0`6ku?i*NUFsgHU*I7FPvOJ~HGRj`U;3KVWbb)z~aRGIW zBybFalcKOCAfFS?+7gg+I%>BBe3fx(b_DE8$7*&2T!=cV-4Spk(mP{Ez->~$^+K5w zc#TRm8~?rUwOd{&>vUW~<(fVI_!XyikH59>zjlwm36$0B@%M{nFS<}R3N&Y_ddytj z8zgo~w0B)7S7|TncK?fHUg|=)X_T9M0ii`i>J7TR;38Q+$ZpQS7H7y3KV_!Aq1z9E z-{4)ANH6mXsPolNDsOd0?M`N?pXl}%)Z<4~qo4V>6Mwf%b-rZvSN5Xg@ROqR-tYQ|8N&SEX~@APk& z@?)u%x)()k3|I6r&3%_&^l?i0TW>u5cdD?fm)_9&JB0O4c#A zBhzUZR~;KAv%7P$hisgV&b$zfC*uytWMe*t%fabKYKReFWCl>UGXDhxIdcU&gm6=o zG#RkFRLJc9>yVJ_zz^|=xd>$^J5Y5Oj&v5K?6?8J4@mw4Id;j55lZKp4%vxPzU4_@ zrP~`SWV1YeuasSA<6W>bIYB{|ll&PWQAb{kZx1pSm+mVvqSfa;k|Q z&Vx$zfpM~){KKEQ{_NwyfALA>KYaMOW0ExW>IRp~4?X|s2Pe-AS?-bR?4DQRv(Y+x z&z1OI6tI(L1B&d6XXCTckM8Jv?Q9IVE9{46V;H_3dy_ovel|Km_Bi`rWFM)E32Dyg zymSt@bL@e0WD~tS+gY~S*uDdlZ*v~DT0)Ix*<0(IIo{HU5Tor?$BJY2&uxwR_LIFj zHLwTm%Sy4A|IHY(+T*cL-sI^~J!PI8V5JUbU89*?MnoI?)E+$7#Ph{M**boUi)}rW z;ce5ZRl8#QngM})d5(R_B3U#+d)LaXx8>v>ZszOlmAH{8a(TYvba9a=`08NN?V{ks z!NfZ^oXXXXHT&dkzA*39mw_L1Dq0+pj&EfVEWdUbWoB=w<_58KgeWnR?XPq=Dvi>|n0@cXel&yRfLtS%NF)DA9J z{5+DQK6wa5_$!{~COXX86W;D6k7C!q$Mc$2k56*Aom2+_ znzui$Xnle+`LkdWC7O9ZUT)|s8NJI@D%9yj@*Nvog@yz1>{O zu-sC@4fHy$<3bH{s<_ zw)UfVj5clzVXa3A7{xB-vC2@^MthgCtZLMQQGzEG$KP?NPosk?3s~<^v(%-+)&2)FEh89;+89m&1`PLUqzNafI zv`(Q38GT%;$a(;|GWxnyvGp=F`;o$H;u5Plz3J}?ONGvLAI88Ki_c>|4cC%9xOnnV zBnh5JP$J3q;FLo3eF*q(!wK79l0FotGej~g!(o0JXG)j;XPnkSOJ5MD{VqKzPFo_tjdnQ-Pi>1Lz(%`Kx}54q8Dpni zx-5cwxzlca^f)2DqsLCW45M*|mZ1!>(=N4i?6eyyM^x;z>(Yy5Xh;I+?uuS2L+yFZ z^f2=gou4K{A5-4bZ0*qNWQfaJqS$G-y~EfjLp`X_TN&6QL;Y!>k4YE#X)^RO>Ap(7 zONNG%?x*CtWvBrzUhK5%Ibla^dWbt6U|(IAUZaPG(ELP|v9)?=FX>52zD^HaOnS1(_wjmU zy&k%S$zP`ATlCOcw#F%n-mZrxQvY(3uRrw2F8zW~5}V>wrLb2I&7{J#c-88mh3EjW zt*-0Pem!(G58WqRxe?ky`Bmm#S8jwFvmMMg zxe+w3B&@Vejv(mcg`M1-A@&izqc|m(l4Qu~OW5+9OWh}uxv{#hD^AH346)a6bU1m# z(FuvUEGCzB{w%0I(-Xbb|+nLt=q}iwW*rg=zB*~CVJ{KpGUyX;-Z$$`u z=(0!2SZp3MXZX--8Us42Sl!8b49CGTjd9xVaFiYLV;^zk-;bs%orK-7SSqab$|*>k#(Q$MjA# z^qF}K&SdPxV~N?{9=lRD$UVj$;GZf1EA%ES?#CMEK1s7Ttdy;MynvbDeEZl+S=eR* z)730CF5Ga#gRsG}Zn-)|ps=5^M+u9=+ zK65$gprUt6k<7KbJ|A+B%+@pU8Gl z%J3x4*G?i(rx8=XTBDyHnS+L1X9Dt;Sfx1i$+^Lc{ycG^V$~z-DwJp9V#NuPgFiGA ziAxkGm7J%MkHqT~$4|~$^pA-*D2@RR?%avO_E3eK4EQnQ#lSvMy>a3QL=<6Kv-J(*1j~O+bw}~jTWY(TO4jDO2R(Wb){C)ZrpZVSJ9Z1s%TkN*-Ge{6t<-`N@?*2&@NSA^A#HAj-#DkJ?L~&75Ei z=&>xund4^6viiZDb-p9Z zwpKBhRc#z9*W%4A`GyjQ%Cl@O2N!c|>vDUV}?B$*4eP0x-@p%Fz7dPl zopj(Yl5-I=ozr^!-Q_xzZGGvVD8Faw6{tbH7DVymB{ITV)Tj#u%Lt-Ke8y{FC5ZG3 z;gElp+>aO;VN5XEijoaYL{9xtxe4m1LT6`F|03zus3)`?nfEVIq!pS=x35!4{ap5N|Axkt0*f>QgVwRHB^MF!+(n+gCTQmw*oK^q4QbXZ`Ne;T~x0Bs7l%jwWEn+P70h1lKw1{{y=_Ai`o8m+FP_ZAMMv);)Gdj zO_`aF&gG7lANrnCb^P5GZMg;2Q*-m0S_AeYm4WVg zWKMJnu`^PUMi{x$jCQDH9jorxa`FGEyfl`gsprZ{Dt#)q!-^aae%?P&=<-vx#k|wd zmY?!kXi(RW_AkGn2BPwzFCzcKYo$ysArC*K;LJx!@Z1PaGOvk-l8dP^m4KzhA8b21 zyP(mCge=R#xv}ILAZ&z9H~8ZVSN`PlsO2WFF*G2`!t8~kiR0n`iY9=}UyE9lgV-qa zRqLZo-$RDwU|L#&qbZ;3ZCZ~7H=5ac8`5U5BnH5vW}L)x zAp!-B5txd=_z?QvLOF;@h=M|J7lJz%K7c8UM6&^4-O3n?5qJcF&5mq{o*)8+@%_J{ ztIZaL+5(R(7R~O2=Eu-%z8-;J5TLjc;RFxMzlFS>zTb{oV96nUPWSnhCE}F8?NmAq znOl+>_~wR^c(5ocpboN@(M4r^^|aBWHZ(vvw-y3k2IF2 zk(S({Y%%|kEupb>HO6+(7`Jq4!dYZ;2Wy%i1Dfy(kUPGFH+(ot_jPt+5kte|e~XH={>sXFTno zZ9tVRSq>IOtyPO9TnDinhbXOjfV>}6t8)?9k3j1S5#Z)ePQhFlMal5~D_Xh*J(n@R zuStGBB>bo%_tm8TJ=4#^(Zp$@-&4Z9p&Wa?VWrs+L}H0IpNzn8aB5q?OHfW`qi!Re zt>ZdJWldW2Vmu7VTvTtd(-=BCw~uSVEPjEt*4dHW51LO(P7{W0{Tt*T)$7`QnI`(w zn&p?b{p6jhG26#6n~9Pxjvi!<_Hl%K1S{r;V$iIeaiH5enH=Es&f2Q6?U)8GjY1US zwGbEJ_UgE?5yqL#Rbxdn$i(F=h)e{W63LAR@)5X-qK*i#jH1pZ#*4Dq2(Xq=HU0?bJI8px&+E%Ar#v=J>OzS zkb+#dV>c1Se+96k;Ctf^Y(j8AOm$_F!0vuroU*If`49od*X-^f9Cb)tsTk}43d zreA5+0Bolri4rE;fvIvnhTQ0+I+LkRV*zh+XxwO{qGS*>zl8mE8mssbXVm{ZG(`bl zC9^}4u!F*ttwg~+V8!5Ln#*FxQt&W%o55@8@CIvhoSK*m$F@WAJag2nHBL?`cSPV* zunPDkZDAI!|4Wqh)}mk^c(gP}SwgSo^lhTqen?nx?#1#ALd{Vaj(7B|h$BrjN!g0G z3C{JyegKYq6g zk`Dkn{~f(UxO-<_0z33({o+`6r#Ag+=ldj)kRq~JCzo7 zS%R)gxon2cG3{xmdCPKnk3{~BDyK3)E`ohyp`6GF2_C)x?kexVIURr8!FuS%D-*ok zNIHNkmkqcZ@6DoIrlH2t%jJ4E?gM~icDLP~F4}veDrn}K^zNe2m=QB?% z9HenAA{#5E{3oOEgas9d*h4;pBJ|JmINgTi?V;Oll#b{r`KmJQSBZRN!lksB{D9f- zEZpM_!HHm_K-Y2X2~y=mNsOH9P=M(wq(G8FC9t1@~x|IScdd5^5tCaHfGz+W+RN#aM1&WeG* zFK`)UXEHQ6-z5+K!q5`cR$lWb3izjmz9Gi$+CtX;`9f(D|BnGZ1pnrtyFEIjg|V3I z>HB23QO`4@GGecqi1Pv(FiABo^)hTRQuUAmIMk{4`N?7h|kfVd5@(Q2+FFJZBc&h1wG6*AR0MwXhn2 zL7bgmF3t^bfJInZeRP97tjiPjBM;zv{Rx$Na*1IKM&l7D?5`e>`OPLeF^2C1yy6CN zc7E+}?tlaK2q)~W56ZmBQxT-H6c??xypC9vFg|d z8+ZJ}t77e~TV=ODJlCP?qw){`>4g2C%|`fBea78;tB@@|KdTPor`l`>y|}&hg`j1i>}?f;F}tzui=zal+z!7_0YU?Q9%Ss-)Fae zxvUJ+1Zr*IFNo59V>Erelr%W|H{2bzf2YiBwqMHhCVBe2+y=jq9>rgrwfYSQ(-3yb zko?{rw^Oza?a^ezF29lQw;$SxC$`h}k2_`K2E!u-k=_wKCAYkwQHNFypIB6U@c{ke zeq{so1}*f-rERt3>TcC?g|x3&)j7TT*ewluFFMmp2rC0y@43`_{ zcMku4%lX|uW3c7g&W)=VJ}2jStLObyzNFc|t`4W#dv_U0cEu|)7hUHyui!s!`c~im ziu6hJWqAqsGnGzr(x=*=6={jpr3YmP-5TXS(zdKwt!&wA-;hn^DEs+0WHY;Ar_8Xu zbea*+4vezX4`E{XY5UX#*c_!~8F&pV?D6FNY=v)q2|w4P!2I4lF+0eFD2oXzp=%MVMxcNplfGX-V!VJF50#PCi8 zcRsnXpEm`x0TuT5wDXZ`r}#}rvDcfNGY-YIPV}nk&H-(Hg?%g8oXBvJ-Bv^R@DFmT zaBFsU|F_F0>K;4)Et%xy<_9isz*}&Qq-BqOOE&b3MyF|C|CWq+m*H_akrQenUK=-y zFP$aX_6bKH9c7U%k3h5pU2K)JVN5AzxydW-bB-WQZ&S5#zP$`w&uk$o?7OM{E(G0T zUAKnpcaC8C{o*{^`E3ZnuhIk^g-1Pt38GgRjr& z@9rx@jXTJmKDTX+#eK;Q55K)2s>R02>ckIdpgl1pF1HHnCVc4 zp!=i3*s~%ygJJO91k(jqHq!v_VnGZy*4s}{ED2o>%K6d6!Lv;8VL1MyoHHfkKhgq? zBmN`Jxu#5lx4|F=F)hxLcel5`SsLPO4(G=x{16cTk-qgTdc#?Cb#n2<#rpy+cjdzv&9#}m(0o58{G9MClA z#DilPbqYGj)|N2D9jGNBayDsTL*h`hU?S`xNhiHwz-R)_myiMOY9I|ej$EJ&BF7x_ z(82mdIM_nbj=>A@2uK=wGl;lks)*+av6y(i5O)%B;XFVb>6T2w#m=j{h!b(I66_ho-d@IQ+Qb6#|pnw z=*6I&dVJ<0Hd5Hu#i;117{e9LQn*CnEeh{bxI^J{3J)v%SRt2cGNBaoFvR)_TPQ43 zc#eZ;sh21Qr+G8N)e4s@yi?)B3ZGQ?io*94eyQ*mg(-OQbR1CVECPZ3GDV+5jDm5A zVoX)Yg{6#mr^1I7KB@3Mg}*3FLCd24VTGS5{HH?hCPBHgq5{}h(QScI3VJBUP=#X@ z-lTA^Laynj{(B0uaE*}erErD9I~6($4j})lqW`9_E}mByuOJc6)C_b|jL8bGRJc&# zQiaPE@_$qr?=K3SeVIW!`!NG|D*h7+-&6RZ!tWFc{@WuBC8FCPI{PjI>noanKS_Rp z!uAS#DCGAy$_FXrXGhZf_hjM>g^Ly5s&J#i$498Z0fp}=OvJkn8sM}$Vrzvx6rQJ$ z9~vlkc0C4Or|6jd{^zpE;I9<MG=0Z#vdNVIPI(D;%$ImcqpfV+!w4_^84c97LmeSux&F__o5Y6#k+x8Lz46K(@j{ zgn2BLVg=|I*rE^W52?`EBsdBj|zPlzR&@`!Zd|-6*f>;6Jjp0!;fd5c}lSDZ3o#M-|8zG5^1{zQpCPJ^ilIJVBxuV-Ex|E1` z0~LP+5!E^}ssa^67@DjUDiu9f(TfzlRM9sp+9tx#J&OMj5y#g5i@f)auBuAIhtEFe z+YV=}iO^djUrjb=yH59d)pvXv8v9#exML9d#_A zSg?Yk0)l+cv(KA|^IP*Rowa`7KVR0$dCpt*yUW>U-*?v|_z&T~K!p8Qgnm!3W{=$L zC&J%8Ajs8gETR-50@|rh&`n8aV?bK4t;o9z_7fZ`IFbnc(SnnSurr64i|4-}xN#N} z5z!^0@E4(13VplKcM;)m{atXK;0_`Te?Tm7oLz#S5@Gi{kslKJsHO4zqsTQCQiurH zoCrf5iG`TS5bREbUVo8~5c*`H#|eG5(6fbJAoQhzD};Xou?7*`&l}*Qf=>%>6?{eT zZNZNOzYsh~M1n(@&2USwpg}O1hy-U5AukcSnb7TlHB{(AMq9_}C4#|3@P`Y1hR_p< zh+qm4`iqGz9p@^cR}vBKCL;9i6kH?n$B9VDMk4f{%Mz#Ibz!_EiXV#N9^rpSgh5s$ zVy0lZU{}FDf+q-$5j;=uV!`Etw`Jq`Ge!52(F6?zktr1XKya_%5y2?N@~M|a9D`XI zp}P`~LrDrfRB*K5EWt|zZ{kEK4XqXYT##J~@^b`B1uF!P7d%C9rr=V+%LQ)`d`R#G z!LJ0}A9Kx1`_*Tr?>#-^HSe)If%f!6!A}ME2p%A!nLI4$p+idA?j-=)ofK&13djdG z5wzby0?mnX@_PvO6&x6#ss0Ju6L^*+m3WdUk(1|xq*>pCf(*(Jl zkMsgTPOOu@O7L328w5GgPWj&j9~I=(J^7qgXM4Flz#6*;f{b@Wuv2iiAZN)a-z#`P z@UWoI4ld*oK~B+=&KKkcP14N-Ib%<{heb2=ph{~oOn4&&Ckaj!oFzEVTzL>>cAJo^ z1v#(Imd!5H0zNJD20>1-Q~svldx9Sda>||Z{es*zMEa;8XWmKM6BkPy)9#QeuHq~l znH>Z<8&A5w;1IzPf}C}ye4@GXkZN}Pl|o)EXuJ0i-z+p2v{8MH;A4Vyf}Cxq{3WyJ zkow&0{6#e}Z(WuU=aT(-Y+-O9GG8xv6A>@vZGx+b zc-j6ccpnk(!WzLxfTm+&&(s7|v}edHFhdi2meicj9y$`djEIEYMnqG&lZXWEBO)Oh zGA5vqh={pZj1dkbBBIemye!ud5yxMNs7w2ZC=3K~+z!E%CF3g#=o&kx#)vzLLM0Ii zm?-oVA`&uB=tV>%=z5`VA|heygnp8k;W%4`eu0RD{!{38h}n2)ERCO{{k%cS<7^(0 z!VDsE&|2tnB64!7rA^OYRet@ROLOfAmtPmaxdJM$bMu;xFa>`lfaXpG2FzlEg#*Wt>=*-2qQTy@Kb|1>+DXt>67& zV%FzU7%Pk|feNf6%09G$72M~)xj z@0Ew|>Y>Zj`!dT4+ZHeq`i4{_oPkK{_ecH>$?+QXguu&!S+DpM-p*t+t*7#K987y{ z&gbnQT!Q_P+#bn6X5EbW)BLoR(j13%^$4a%<5UuSc){`5%7wbU3nlK4v{Nknx>Kmv zgJ5x~^Jh>D^$sZ1S{Mo)7f^m=1_SpADD02qQjbvIL_~||hg`+zQB4u?EJTUbmMB3_ z$B_tMucK;>z6|B9HMjm_f8tVSwndV{O{t;NU$vAU;j!(Z zGXg3SNk%DzMhBWnk#8C9%z%nJ-VcZ%bQax=aAj!h0th3_aZPAE%ZRz$%-|E5eeRv) z=^>#>_WK>!J6T0zlLKQ#k&P^YDFIa$;c+0LskG=~@8l;i8k%OGKK4!?r0g6P1NTn$ zL{>x7gK*e8$s02>wK`n0k%7+Tmx~g4N=YwWak+;Cj(|q)Ye#^uTl`RPLO+D=g^pSen11jLrdAZBcNT*s0e zBQ&-=p2YBD!&TNEwmfp45nCQ5rC$01J~|xB8ZfZsk%uf}%VR)e%i|c*6YG=erQbw) zlE_zh>DQ7zTWD;8e41ICEHpMjj$wpTBs?}j_Fw|1ihQ+~J`M63?1JoLQ;1!V70l5& zqJUkHm87Q&ja`uQY4F_e5Uc;Bm!8UJGehJXz4ThjXG(-yz4S1j%`A~)6XY_=XNOO* z;jsx4qXgLRI!6?+3zA332-U*y;qc?NU5AUw_*#J$#RRJ$({$FhbO%RbOroz89`Hb!!DqF1_6r}LlyY>ea< zMZ8{NCxr(*C-7xYp--2v%Fk>r;`2B+c#$cj+*ANG0^igof65Ta>oFN5|t_UBUnbes*y9=PCq5h~fk^ zm6_~mMEfZ6a#eJudlJK+h~zn%Q(wx-ybLLd&T*?D2&u$MzQg)%C@6gj{SU`00g>2^ zZVTjn?xOrIgmH8=wB4f#NJG=JP;zHH(SQ=S-cNMFl6N1ul)%7N)kn4MWiTE8va!~Gyp;32Qu;WV4K;*4`Sk7*7qPT#=uCM7vV;&45Gjq`Qdo}EgnPS z_{S&C{R!v5YRPk8w#VDp(jLRsoH7YFLX{(Z42=0Ybt#|J*oLGrBHDO}DSI2?)!1i| z3Z7umoEfgS5k~On7hYq;-&%bDWi=Tpcy##Z*pk}YkhRIo+V$WSzRw3SneW2mARBV$ zwBR$~UlINpdm*Yx3CnyJ^h)iH&=K~jU||;{Yy-Bs2p6<}Ww`R76g3Wkg2KFrF><7+ z@D{#B7hMOE14F;X*jRBpl3Lb~Z>IY?T6v6CN)WYL#@FN@v~m*#%i4fUg{9yLU2SW0 z8K)Q=PRrpb_hYIaY%q!Lp3?*R>R^M(2Wj$5@PaD(Fl`u+Wii~mN-J$1Ws0|{Ex1>w zCfC0q+nA$#)_S##6}jLB-oCg6`F9FF;r%4!MISlXgR4FL*=vd!YYQ=hE zSGcz=P!;K^Dovf5cp9Q@mx%RzJT0iaqf?RY!eE8HK|0zWtI41puEd^zR0Jo{(WI7R zC1xkH_Agy>@;l>PbQ{s}=^Q2M^4l_eH);xUx;8n6Q=LSWZpSXF57y&%Z&+53^aji7 zdjt#dd)kHgUUgf?B=rjyVqyN;Mp!L)sJLq)?(J&&wgsLx)t7bEHI*nUELA6T#lLpu z;%BaS6>jYxo;92+t3v2*Z%5&3|5)9TI~oWWcx7-yt%x%(L;qaa$8f>l z$`@->%+U-tV)l<$*`}aR_e4`$fe+_BnBn#}+iz}`Xd1oUGt&%zJKbOTdTpc*y0?4g z$~kt!!P;y$OJ$f%+3w&1{s-tk4Py{e)!y#a&p#{9OP`vpf8l@4n) zq}A`1Tfc>`g5mU<-_&+GSW6x~hVePW;e6EJRQ5V5=L(Eu)pPI(GQ4|GiZ`$vZ<+a} z&}~`sAl8NFm-X=$wDl5;%9^<97?nLrdEZ^o-P`YUFCTJT$L;y;z1R!COU!{CcdnUM;$E?G{L13GYfIguDs#@biR0#snLBCTn6u}MgT|~$bEeLm zxH9$nvbx8bxY1B-%9uc9;-m#rCrqk)rls3U6>??ygqi2gnmJ?AjCpg%%$m7y(ws39 zXD*!K;Dn>0!_B@Dx7mMv_WyNtd7WzQ4p(MqnHx6K+PE*6Uc1uc21l7Eh5F*%I?imm zw@03t)z&RCWAE*eWX3+)-CwzNRmP2dRKyGir|!wN?o1W`&)k@g%H2kFt;*eWmGS%R zIBmzzo!i!Iy1RRhIir2^O!mGdtS5g*cUPUwgM%!f0@_k&1SvxPx10 zR&;QE)3<|LmM{+jy1nhpYzS~9;toKJw}|4{Rutt zLY$_ZXs&g2R?e}JuYqPcB4wr5nb?!1-k651I%_TNcbTdo#p(y)8yP(k-jeTw#m0gR?cAO1ssd5f2kSHr?wG=|*!c zzM-353lSdntol&XD}s#(p}Q+^SSY`(Pco0|PhQiS`Q`w`dI%86Y}9@Gze@D+;R+92)~0M{q!0Js20Wvf@n*u0Y*&uB*AHd3k8=5UMaXj&kaw!L5R?v9HJoJ{HCog5L`67d#{gcggD8X=#Kj5!y~mgYGHx5W%s6XA4djoFi!W z9x?$J2;&k#4snxzhag9!Nk1j{f*^;c$p2K3=OB>Qs1!tQLL!z3+Vw=BdkTF52QI0= zlMsnh1TPY_pB(}JW})r6AkdEsy+v?`AkR9d9Ufdo{6)~N^8uZO7MA=bf;AoF#vU0C z!7!mYJVeEF1kV$^Lhx3>zY2CiHK%?b!P5op+8FT96Z%TQn**$I?ia>-!50PJ72G3u zP%t4BM3f^~C3w6bk0WD3rV5@XXjig;f3wi{Tg3anSr~5!ek{l-C>mn-oR}t9BG_K= zI6)3|Q*XTB9KnkOuM@mW@KIt70&Et>8-gDTelO@^2+bxyutc!E;BkWE1?LD}BzTwL zX2CZEZ$^V+-+vy^$Ow4wB#}ol61NNP5d1*!6Tv-#_NyS!|54~De&HEDE@*eMfbJ;t z@q)t=_~)8rQq>Igc~LFxkSXbh?sBJ}M>9{kK5Bn^z> zr^{`FcQDu9z%3>sWgIk#N0Xa_3gl#0|qBkP=0ukZg5c&H;?-Keeq3!XB2zN;McEb?t zWhTozSd1G+&|0vI;BkUO1Wy;7M9fDsCwMNgjpHmN!p?<4^VmbuD}=s5=v6}Bm&|t% zhSrb)tP{aT!RLg}BU34VL-_v|+%5QxAkUJgo`5OG4Z2Q_$z}%?!6x@CL!h1YZ~YLhyURC_F-j)4lAC8Tw1ciFLCE zx#$I)MLz;nWxOEgviJfm608-p{tEc)XH$NYAU$%@cMEc&i}ZSn=EK2mvl_gA)@=cP zO*U|^Am_J8TQ>$sPn~qCAU$=yo-G6`1i8nW{C z0qpu{&`X47pOAW-6XR=mqu?EacL_cq_>dsy%c#Fu@I}E_1hGsSwH^xp7RJYdp9$_2 z+%IVTDCi#*nlo?=-$*cDut>0_U|T`Xz_H!1ZWi!(kF_2*LquTxEzskHo+3D1aDm`r z!3za173BOK?ODGJc(>4h6MTY*x9lmw%{6lKyx^;XZwUTd@FPLaq|t!=z8vt7(7y_D zYL4;@!92l2!KQ*O1#38Y#{j(qIcGSLJnGj9ULm+#kn?+#uM*@m zAL&N}oa{U$jDHAn`i}}b1g!@O`U9ak^G7)cAc$OzLHtD!^MIC46@>eSwVviLIT&s` zbC}z_81-d1d3Zdh5)pPR5slasVzIenm}_dFHi{(BszH4;Y2a8Qf=v{(!4P~pY2Ykk zu`CbR!;6OqvULLVR^!TD^`5J3?U32!a5?J^<*96_Jcc4oUG`K#!B?1JVTuVaVy zrs4swnaZepYlK_lCf)(>S(V~PF7B8yqul%&o|x?^y$&sd&rL6$UH9v$$cxCY=Z1VZ zJN{Y7t7q5!dT#ha6rR779J}t<^Fx(*iTtKCWS9MVe%Plt61taGIs56Iu?jizB4IAB z@-IdFzFqq3cYc;(?b=^|6Jqr3+FzdwBz?Q~*YC&>Ro64PAATMW1!>DP&c5NC|x=WJYuf$*z_>LRj;ufsx3pKZhiQF^n_pZ@tI-I%q&&+!dLG>TP-2AH@vtZ|+Sp7z#jP&p z+Q?8`*y~jEU!+roeo{q0FfX3swyn982}qB8z|!N&X!qeAytUsKT=x*-NM4I)q}-;e zC!SC223(xjBe<&A%ecC+L_W_L7i;;kGntfFF+2?&+l^~DmIn)w*jsqM39)^+kH!@0 ze`4$~Do0Z6a&C1`j-88mW3l&OD8)(4WxuUbz0Rl)f~DNY6&u6Y0OZ?=Er+g(HHAUX zNz_QHyFm?tIQbI_+^uRIbvbYE#2$oL#rWMXH+BGz)r&0yI}%%mYeH-fuF-C>%TQGk zoy1ydy{h;{v*e8kt=wJeGn(R0l@nWptBPHNs~fu)S44ihDL>84IQJYVyBE0IpcNc# zo??ebYK6n2%~N(Fa`z(P@MQB8eg(k2L^wRzJSB;}wM&J=lg(2S_&6>X4o@~u*<#k7 z=C-ck_NIut$i)HFPR3#;95Q?I!!?1nJ+eIIJ|xM#RyaJeJY^2kah-57$g!Q=l@dof zIXDQ}ac>ZgJ~93$@wXzN-pm!%o^pBqLgr51hb!35W{qP->2NO-Tk2#nJK>H2rLw+a{Ua`C1k zzHsN7lMt*?F5`}jc?9>dt8CTi&u8TLS0DqC2?qR39km7U;rkOGUEy*dvR$b{Ol)vwD#_&;CN7J=EK55JDpzFj(@YA7 ztyIFPCm=*D3HMIyG;$n&Hqwja6WC|y!EV; zkk5oAT*Qh4r?bvLED1};TPi#2Rz#O@!DLJ2XVF7SsO6_q+|r_~O$>L{LQ55A@nFJ) zWovC>O0pJ#n~=SHi4~S*ox}`W9Z*fOD$M1h-99yqQ2+_oaH~-cKU3h|8d4qyU~hcvk!s>miu8x8otap5$w~hNC z#p**^a@E3!c=7MOQygYE`xvz4xK3mF8&OHqDsHeQS4JID-tcg*~%cCBv zl#^q3e(eq`@0OFPXCL)$yMj6>pijfLFpJa&d{f6OzW)4!Lu3Ec4g@Q{6SmYu%91*+ zTB$1V-xdED2EX6rk8$(jHfh)Kp|?h`vOZ?O7`I=*tt0oIfP32*_vh2!=TE>dimx62 zHsXIDS?u?hT0_4u2)lfxbD^Yu*#?!7Aj@opI>L|~zAjU^s9z~%cdKkr-8W<10);uv z#PM!^sx{Tm78mzccJ5;;$74#ak2!a|o9!Nqn#;$#6>6ecKi(~s=V0JBS~Li!V}z9ZSC^r)v6&g@bm0CIri8)S(~e^&0P%B$Bac7w^W&{ zC)B5Jn-woc$#&~g_tXTpi)ziUN2}QlCNsq3H}U%7na$$4426JlE|}!rUdr{S(J#X_ zsR*b-bWnQ_LWGGunS7;=Q&W}sV3J#q^Ed)VUQleH6%PdIGXf0fICY;%Kih4gPOs~6 zw%a`xo&~wK|6dDxE*~ zO-r+Df!p~HoBvY>R3a_8bt#M7j^3a8l4Zu|k@LpQz?zqdPO#Kv%z|;#&Bj_ct8U`? z?s;C_88vQI9AC7&;TrclRb(z*;SN)k=B*X(Le#TA(#ByU01!s4F5_CV!=i^9(CZ+m&up_mQ*A$v|&^l}uc> z>Wb65%$KP&)UIc`_F!DRK=y6M-uU+10nGv0Z2()ckd7xk%%h>E|6 zh&pvM5fwiK9V|t1*iT^Bi2KI4yK@#X%WTNkk{^d(wWJ??3x(!=BGO3oc9Oe=Op5knMm`lX9;I*ZeI{f^ zbP&nU#Z-3mRgzzX??Fkh_hfgHqW839om=Ma^UYoB+=@buSa}B}NF@3!biG3j(UqC+ z*P;8AVNQSC9XQ0=3rA)!$LKzNjVyYRNRW?NN%%mNmk^;}j}Jse3mJDbauG<|sanG# zNQ^L-wo|p(eD}CpUDASTabcrV#c$qwsY0VuwK{BuKY_9SE10hI$kPCy?w|kg!@PYB zR{eF$5lJ#nh*SP|+i)M_NnuWmo-a1+;R?Y4R*u+i+&i(Y5GyBTEdnb)Lvctd#%%{q z>}D8+qz?*3`2~uDQn5Qh)Hv2Dhp0DL%70vSr08Eri4z-!tBUc{JLtsR1&+VLhD@<5 zfc;&HLr}3FVFunT;!?3vT-{h#ToK|3!2cW{(nW90eofr}T5&8X_5dy_)*4mOt%=oWj#l}Lh7CJ3aiE3*VzU}BQaXHf& zZ-vzO7r2iwwf6f_@h#BxYlXv3R-7L;@h`HRYG1LJ74OgTzC@JR%Zk&H_AeCB zKAy{k!(LYWmyoG?(rs14;naw~$o&K?pK;3q;;x{r;*9wQ-toRE^zki)@ z*v*Qc&S+OkB{{T~iE z>xI`^Dw6duqSK3Ri&!!#YqgoS-fdo!i2~P)JA#?q8R{y0>T|e{Z3o+l<&fj}oDK|+ z=DU;0x2<`2-knHB)_yR;3;6IDHHQtt3xkCCStl{bqJWBIaq>2NUO**fv6mP=pC;VW znt0ZFsxDb$$&9Qm$Y*$Iou#s~zDDlC7w}wtG#y!|BM0GHZc$`khD+eXS8cacan>kQ zx$v@EY+_2XG^1F)!^+CCPC#bDR|iy+EPjM8{FgS+a7&w-6;HWcYCfdGHLrt}b1%X~ zz6^f{fFE=Z?B#xg00}*rPn?@P46#Q0+zC|>XOid_5P1qklX%kG49JZH=m&9-GI8m# zoR$cXc+asME=g#f*pHR5J{ULmB%XUL=VBC5;tijKOzL32hq>l#cbsW^gHAD5KI1-N zRy^2v*QH)`dGBY*rbZg^4o=B*8G&p+&U zAw7HlloOTE;6#~g7j$o4w`h~Alv%#neaF;pai2D|7q~@c{#Gng-21AVU03p)+sQRA zY^h2y)tg*xE_lU_)-BuSHg?UNTl9No)l069%*PLUhxTLU)vbTYy<3F_9N+hZKBnST zKdbJ-?e0mg`RP?R-;8|C%`pFd&23>Ge9diZ%6<(s#{#}K3Fg_{&?)BXBz5tP%WxER z`3|=%w6z59t+}=veu8U1ibl-59d41DYGyCf>8iOsvbp)dP`t%IsfPLkugF1da`0l= z|4+RBCd<)(KBWN5{&NxxrFD*W2h{YY|yF7%t5UA?PI-Q6YT9}^QY)dyxo@6PG! z3UlYRZhDV*p@3JY;cq_@u@Nyd5pdrc60ryOY#ZwTx+Bo()+y|JTy;EjBWfyEDc+lI zrh{y>u33xj*jBKUAe}wx4;36GXjiF$KUQe&;HBPNpq&S+6~<+Pc5)F4 z*9m=-;2nbZ2(A&dXFWmR&NTuz3E!@A1O0EIzY#nth&e=zltG~sziPxzf^-N;&l9xE z+Cbkb^n-#M1a}DT7Tha%SkUE1{f1MLvy4I41O?`XlDe0@7G<@JzvT z1kV$^OYlL#^@1A&pBLOA_2v z=i<89PPbXa9hqageBrjM8jZ%zD;Q2oDzdZ~;D$QmC&cGuiq~o?1#Y;Y2{_q!x4i1} z$?-$Cm{ni6&C9kR8GbPvJpc3}Tw1fO^SNTtZ*!5=4Bu$J`og^+-nj&>by4I~GSLTq z#+oczH;-`cjkt#+^5t%X86}`kMwtu-+1hF z{*K0G!CfqheQ8#I?H1---xL)+#^s3d*gD*2$N1Y@6#LP<^EC$Ex)}Exw@Lafct+R+ zi`DKbHl0mp>><P>C#j%3 z#zvF!%)xKmY3f`v@muT~E5u_7=c-nG`ATtQ(pSh-IM058$xppl4aJ!w2 zTJn#`i|>AZ2w z3SQh65V6nGSw?9nDHUshs~hWuD?+R{pMK}IRJ%-kuRCJ!6a2xA-NjMcSduNu*(e{V zEk$zOSM1SRiP^B_zNv17YTA`3AmzTRu0;-Gm*HhXQ;%0i#fF|_o0@CZfA5~A7Mt`R-1ZoI?Eiy1Pz^TMkb1{#{=sdUai|EECVS5yn6KE!PtVLV zhktNO+;)vk(SEnTdv;?pWxso;J2cNE{)l}s+SLB&c2>`sx*y%+I)0C5iEnNv!cB~= zLgMh)Sv;|8X)yLV?jx}{Qd{fBS`yHQUS`_-gjzqy4F1XOlw5|QRnc*aXy9aX^-u2K z68?>HM5Wr_%=Gx#EslKv4L7zJ20h0=&rJUrslU;z`q|CHIQP?p&&|Jnc3Tu2MYzO& z{D2a~H=J|3HwU#Lpklc-rr>}(v(+7_hKVm8u_{@)ektg4x}SA#B6xjF3HKHbIv1G?JP4O*yMzY4_Z|<}1ij`l3h@ zkDP9q!*ee&6^CHuA7;oQcVW?!D38QM6{K)UbR?rsQq=Wua#Qqmv-^~ zu{Y+Nc#3nucJtj~cd*)Sx*c(Inr}z@i7(es;^YrzvA^vrkEbpd^hT`%#dr%mv*d`| z6@luGxYc=AQLhwJbcY-CN+VWpu}S^aZHE43)vxYD>WKN`SB!jjFd0YPk!pM0l%wt? zA+_0j<9h|Ll^F6)Yy1o=??z>ljx<=GoaYkUj5eTZySXUjot$bD`I1c}U54V<&7P3g zM4e<(v{w*F-?Gx#kXD^%dT6g*#YVoX?^?V4!{~{;$x?XF(i2I)Px{}MzK8TH=63D9 zoMz)ncUd5urmgCcYZiySwyD-!mdg?@$9vZGezQL8O>~>*nZk&dUtxpwvca}PTy-9^ z)yt}T`0=Q+u?I9)w^Y4vrboPXfz|$2?Om{uh&2)Kvmi@Lt+hAsqk}Bno#3@o8_k=9 zSBw|+zC;0j8}+IK6Wgtc;VCpx*E7+}Re_C6j~U_j++kyCk~b_+&$F-lad-(37ba`KgjM?*7!@%L@7c2Dv#$= zeMNdD8Z^*shj|8i)jYE)=2ZrTyV3?53U>98GLx9%ogDCQvwWUhPX62!ueIAK-`ttv z6{?TSrWCKSDl|J&yoc56W<}h~QE!_E;$Ee?(|i*5*0`q>m}^tLY#hV*K&sc+Ju}a| zl#29@uPaXT-p&o%b2ae=K05){ZdCVne|YfY|MCP_^E*N%X2a5|h*|Z57dKa**!@q9 z6Xn*mEcdQ!{6CJ))IB}ayFO&z*x~1yjgM9NbzhJ2Zb~q}UZ0U>cD~_f*R46r8?Dtk zlQ7Bq&fR*WIW)-|>b`%Y8FV&q_l@Qj;^7<3mq1l!swR8G&^BI4m}uUe>@8H&&4?-9 zD$IWEn*!<*Gj*yrEHv*qZo}lhRP*{&JVW0kO!HbPj22+K{y?JuI*R^gsAWfv0h&OJ?pv+)iQ?-gfccphps zni$TM*?D((!OxIJ?N5gddgP0UML2bsh?i;?u?Y^!CpNSynfQZV!Hvl(T=&r$Z;mRz20rlZ9K^xjZ!=x? z;7+9%A)$U3w9pL`T~p144|&V#uYl*x?&ofs)jJLE+wt4ztFF)QMcD$yM51Fdc>}ZPl{9$i# zY9EH_Dq)hMM@!9|N4&4&@8XBY8!YVM(a+3`wfIrE%q(B)<*QBR{=~1uy z;CJvF8jsPv$&PVIt0bT*I8Lc3NTdmPuwSU)_QS{2)i$FUK9$Cl$h zJ9aOwMX|5U*N=L6DNXU)@B*4QD8H^^6HVr0UX%2v;jKEcuyqlCWgcSZo1u>(Q7@b6 zk9qx(sK*}jx)%NjL!m^K$>$Cy{V+;8l%(FZnI0Sc&?K$%&QYhCMeDqlHH|3DRfQ}{ z`sgE2Q9^l&XO#M>cpQ2g$GZKu;RopLneg0__am#m{`^~L#8SbA^Ia6<_bRN9eq6xW z=)`U(%lhcukRE6u?{AW~ns=83db#kq5>QvgN52TM>w`Q8HLZ{7_PEzH?@E+|6XRMg z<)kG*taKMO05vtX$1Hi=D|FA!Hn%_SwQ@7F%}bA?C!Dv!6Y#VWImMvg zRM$YBHjb58zpFMu5R0L{V4Waxqhj66;U~N%ZSO%PfHxk6Sbwfw0i?|f{0b@X7hcW*P(R=GKpu%1Mg}# zIxxI@q;0WfIL*yR$k;m`<9ObTc+%V8o|J9U)_bR^Tg~+KUVGKftXl64RGrNi zq;{CRr@W@=KOpaVviAsriP!#x8TFJ`s+yQZPk94WZ?o|!?=JUHj+ywh_ie`zvh9ZN z>q{T|IV4EM9z@>V7>_3KWAEZV5<850RG3WUsuoWALUY+O-kq@~csOos4B~sBkneb9T zW#=Z6dO4tSa(kQFf1rsSX&(58*QMZA6nMhFp0?py=iY~!l<;mqwaKkCzf!ZS}Y<2DBD&rs+2S zEr@SH873sEAmK}*>&)#Ny*JQFnYGDl7N3A}PRLPqPZ9k2j^=Nh@UUkXwb?5u+=aI} zp;Ym?(vkm)WSNl7qaT?bo4q+1bCJvBsOrR*A(-51Jk)I2?2Sf>i?-nDPcT!qcxBx- zB6M_S)tiR(KC7=8|*5MMfZHw1M<(Q*eye4i%j%m8pE6X?qc~0)? z?m5QZ@#d_pUXzTKcqYmJa(_KW(#e>uUZvY5yKcu;?;RB$g(~hkL;pXU6EhXlF!@vO zS&jI^{vIZ~2G?ErqF0^$zdBXhc6nE;x;H-YeoBMi^Wsl%hW=`Deufvc#;gapyU#MG zAMl=czdoz3+V0xj6dYvVa6Wvl1$Ps-ZSu?Ui`)T4&KxH!*H9{n2ICtk50Ac zgv>eucj!gbuq(`^N8k>P=oh#{V54uf;|RQ+gZ*$=oJqZ;XKC`@k&d$(O@3$8s6nRU zf@r>fItC{B$<4WS8-Mi{WH)#qyG~X)UX^T8aNlWcF3R#>N~B|iZ+c>!TA9R2etr#i z^I$>EG8ps?E)AO$p1`jG7Sw!gAv_B$q0ccfuX-xA{Ll&*@kcXs@AEAuTx$DT^~W<41Fb{ zY@|2fK2vui2F9$ zN7%NSo4VTRFK{i_StykX&E*vBHD?<;=(`YoM_q~NJJsmj5Omgk!0Mu}z_n68gD9)? zFa++ZpGC5|>DQs!UEcsHI^*E?)KM6%);A!sjgDRlrA>}L8Cshi-4beB9DNm-TOBZ%}(HA3z?T)@Lit>NO(X*lRs-t@$C9gSpE^_lam{8q;Q^H~N4M&$F z);AqJ0n|SoeLtwT9DP1wdfU+t!`i6X{E>0Kp*#k`W`Yk3{k)ownW4p6-3#<``IF&x3I|j%EH#?OC)+7ZaU(l% zC-;xBY6kat_)&7)E>^0i_ zGCTt;rIO6r(YmMk?k+#moIc0DweF4*f3+93Czm*NX7<8JQ`2^cU;c-^g=-TscKl)G zKfSJ}?!o5%Qk6J&>f{-dCKgSYGH#CP-O@j7e!BYqWi`=%KR$0@D?ddg4xcn*;>eT7 z9Dm}78D`&7zoUt?@lUUt(Z=trO}CT%Xwra5^Lo#kb@HS+bEnQUW7hilb^qw#zvsaj zxw(taF`U#&e;8mK;Wo3j(r=}@Sl484r5}fys`8tK__@g!%+)T~+!J=S=;BM;^ZIEz2G6NUpbMUZ7rFtqtV%ZU0m{M4tqpwDK=jtY4&(rtge!i}Q z>H@t6ob&a3=q%A(N_v4#LWXK|&2X?BeH_dxeH?CG{VZeBX;AWYYg|J*A11W^8rQIX z7y1$XcU+V7>BwnC6*RS(5AP4o3j*9UOT&^utKk=};;Og#ii$JMVeAJp$)ze$t>o^E{l!_E)nI{cXo7(z{@&SaYX(iH;y_spb@U z8K)lM!c4|}Q+*pkHPh^hH`nLjzJ>l6*Or>DY%BdO?py1jxNoDkhHL1+N*c9xU|G z^T6+^zX!isPeUd*I(jOC!G(DZ_Ta+QaLodI7#_?GALbkYd>C#JgAcO`iG&Zs)dTQh z7J>;EhHC`j!o*=8F3j@)xG-lx6E4ga7=;T{hgjjlaC;40n0=t&!mL05W!tm%Q zxG+4R2`)?~jKPJOi~w+98bbvx4ELPDg}DzDT$t6+gbVXPsDt%kwm?W9<}yU(J$5?+ zhPklR_vfsKVk8S}e<5$_8>}=Z4D$0ZQZZ$aU#NdUdi-*8^&r2a_2BdflQP(UI@}E= zU8j@TG1%Y!ryJVFCVz;3+@A?Hpzenu{xtPJwyxJpzia&q zPx1Ggk*E4i>iXW^Aw!w%r(uC<(byId^TlacGmD2^!%<@h*YbS(~pG(|h3@#J|J z-l@fF8prd{X2dy-@=}D$8Muf4%W|Z!^WubV)b!8W+Z~jPcHEbFyw6-@;G9W1bZ#InGe* zaNqD*dXvzlNW^B_#JkxU=7NGy(@-Un*VXK6)On?eoQX^nU7XO<44tRr=GDzF7N##^g`uvh!^+g%SqW?tICMX9WyS6+Q(G7+PqYcDqEKqhRid;)@J7Mg1n&~$o5)BX5?m)}&zA##qtMR_ZWnw* z@Et*pMAOdh0P&@5VeA$BN${{Bdoc_U5sV3D2<8eF3359*_4!*wY%j=OCF!1meJ!Fv zA0&(sf~N|O5jpO1i9mx{DXoHTRzZX!I+>u`2~F2c>$J!UqeNE^b4>;6e|U*1^Wx~ zrSGPg% zd77u!%-1e5u|S`OCh~mU4Yro(mEd2XIbT?#pF=1NBEYKB3t3p2Zl|ZY8rIjHpc&Hh zkt?mSFODNiTn-!2aj=qf1{NU2^ic#$(a#}3Tt5zTsd^R6rRf&XN!Js>$N~Jqq)c*#*T9+Xo8_}x<0k`b$FbKD73XH%js|FKZnFhcs)6j%h zwhw89S5}M|;FWdZkqdCknnDL|SwEx%ZrLPIaLZOe6>ixrFbcQqF{A))*^{8)mT_G$ z+%gUZ!Y$*LF}P)|PWuHI=ZrRhI;Fhr|gj+TQnsCcT;8|c~ z>2yRvuk1y0;S@ikh67_VmP9v2aMwxclQKq(!v8a9`$*{zhqz zNV`Y&p%8SgIw=U;D`F>f^F+IE!pH&0S-y}1BWoGBKmwnT(03%HjYT><@-(G|A|2(# z?lWoU`W;fIFl%kpkEj@4=@+5Mz2@X|{lc2LWS3iQuXLx59EarV3ZZxF$X}qZ+gsxZ z2AcXEME353;J~@k?+?L4jSmrB0r!blPK>Z^26HfKi5yKq4%Y$gn3Cg z@(m;HDuJ#DN9Hq7H<2$7N9e2Q?jm0ij?honJw$$eI5M3Ns;9_r3P+YvUM=$5aBLAD zRWFgR4!e;v%w;qD#>E`N)qNCCt?)|Mgd=t!#MI5*&32zM?-sC4cKRFP8`<6iT#>5hIKw;1EB z1Vl#jT+`H4zIKrr+;5at#&{#M*t&9z6NCFsWOhIy&=Az5$Q(|uq-L6jXZkq>JUS_| zn1^6tA!OQ(NPFb`3`<4Q-Y}oe^qbav3yXdqq&~8gI~g-mkc@^=%`Cfhv3^wZ8idR~ z6Z$fGncay=3q~@t%lL)|_cWLAyz`g<(yY z$>vA8>PIzmZ(<;h%I;`TlTq0`btGzDoaN``@r#*iI3L9C2R!psnmIbl|EN(ujeHsY z8TrJR=BM|N-dhr7T3cgHgS%pS$M0q6Pae>d(~ zcXYAe=YQ>%*9}>MvBcl?%Q5h2>aM@Qe>4(&M8vLkn{~NA+Et^?D_8o%%<4%^LZSNj_a;d}9pVRRSr z`bk_4I{HP7x_%P31$5wQv!4oA`!Fq9=RG)6?lu|Ff~$Q$m?7l{ zleiOLW47i}`Z;?4!CadD06OW~N0b?Q zB$Cod)2qqU-H?-wJ3+HR^EAB1nx|wJ>e;XlS9<~s z73;w;QKBR>U;4)o}R5#H)exj-7KBZ>50-WZ074BQ;r7+aey5p_%mAG%M&xN#& zJ_!A`c6O(oX78+AAHlUkpN3HNuJ#f{-%+z04p)041f6v%SY7mJTr2fQFj1w`k*u!z zc?9mJAAxFjoeIq!`d_&3srQ0kZTmtS9nIDouJ!;(;A;Dz;A-;+46gQR0Jz$-ktMj= zTaiY%+FWP`SNk@Z#GMBnxY}J|AFehBKj3OFhALcb4*S8?u0m?yYL5a1S9>lfxZ1-I z6I|^#U=6M|`$TZH*TWcG?XSUvtNjuJz}4oKIJnxJ=!2{MGs+9DHiy~iYCi_<&IVU| z2)J;ypG82p+LI9wu67Bm!PUMDX@aZGWeRY$Z-fe5Z4P(9)&2`K;cACr8?JUgq>!$5 zKl8!u{t0-eTi$^qBMQtwKut5~gi_S4(7`!j$s1rb6u0xIST31-J;_ud^OHX&nI>dW zGIykf(j{zJGIzd(GDO-uxf`X8MA|x;UBFPLNXwJimkDL5&OyW-lRF^gp==RXCJ&=H zM*??G<|*V@v&d;(x3pLCDJFLnvT&NI1f))&ZlUPHBh%*WRq)7;(qbF+4N^sqEctZv zz$$oTMJTXPxz(memRt*)p$egQ>*U6GkRfd40Gl3JGRM(E9Yp@MPM$%!qsaH_pw8@L)C*+XPj3GE9JRRUcRPUdiQsGG=_hm-S} zm+m585l-Gpc@L3aA5P{#f2gO(Zwe>BMtQZ!Zwn{C$-?g?a(HCPo6UQx;gNkty*^5z z1nH3_v*Q=)E8z}=lfN)Iclv#L7czK%RfHBh-WXB2dPXkt-^K9^p~4_#+q?^fbn zejDs&sk+N=UDXMNAO1320z*hNeT-}_=~2}WLRprRW%I;dRmB7fCr3S6cgJ1+qbkhh z5U#T+m{T3Pv?^>a`K$lTA9hCm^jztm@h=Rl=hpq}UcbffoD5E`=9%34{Ez?hdjhS~b@11WN20It0iqgyUCXc*Pw0JQ%lrS-1H zQoI~+H8>##S7QuAa4cR%^|q4^T#W_14P1?=A0A5^Dze#h-{Lp3J!5P$eGN?XI->OS zL&cGQTGEd`L$XAqk!TIcQX!L~Kk@A>6EYrMM6!vH8Bw0zjLoQlsq836Z$r&Qnjam5 zyoH)a5*8!HShN$}X1?0u=QeT3ZfO_7`}f0uyN$myNtz{zeT6*TDET_ma;uLo6Emc~ z?+{sb9y_@o0=vn55zJ3M3)e{U)40~U$y_CapJJb*{(3Xd%EfUtpCdsj9ELxhdN1H~+&e%Kzn!Jb&sWJKO%Of7#!mOypI6 zlzDPq^uKTW`R@xl&Un?I>;FI0y$6^SMfW$_)!kLyGqXE8%kHwv#(`bfL|AgpNRW(x zz1ws!{?>6avgdQy!g~>dL++?9S$!$?~of_DmR{?&J_!TD)cFVdVIY zo>$;mmQ1N*%U*)#@cS{dJS9)Pg%M;3_Q3I6J_3`%!?Nz%pv1}JgY9HF@okJL#UWUq zDXWdmtwXjfa1*vW+Qm#9=VJHg-X53*Tn zAO*$9VNf9EW=ruAUL`7Pe`MDTjU!^VyAxq>cCG(6dCf=Q?r1p-yI&qr)D-{I6ew2* zO81k*WaYU7(BY`>lSzk_uL6_7p5YFqo=6Mk0a9C81#T42_Ip&g7e~P_=284G+Xq!F zy4zZ$X2iZqq}Z=1DI*YBhj?~^IS0fb*_4@l8!hd{lI@ z^faM!`zS0X^pxCGV&`4vP>lIBpjX<3NAMMs0l-(x!HXp1At$%hVmvaI_&(zMT3t!r zG|qrAIZKo-SDM~=OUo)Z3(F0atb7@Y=eIlb`lj*Ozq1eM@V5sK7?anL8E5Rmza0Zz zyoY@7C96i%|A}3j$t!yQ8=Eazw-}d+#wGCva@nW$chR3ev+uE4XL;vWu*3?>Thh^8 zL#V#d zKlaoAYO`r#Rf6_bP%=n(cDKw_&Qz7cyJep&23JfeHk+80b@SHL^C zlA?)iUs6z7ePXe=y&JuI1fK2Kx%hQsAHpws_X`BjyVoJCcy1p9vw`lNC2L%;GY9?* z&+_@c2x(N9?`d#x8vRE3K?1;ZKb)4|V`(Ydh}{k{rh8&t+|jK;iaP}g4gr50&!L|3 z&I|U47}6NHb4TO1(m?6^!M+aLc<20JH?4LCFXlVz&>)6G-AJ-Xqjg7rtF4p~OK0b! zZ~g#|xZ+$t;BWW4|IbbH{eQ6orks}O{)-u2vMa6R=&axDdzk!gb=7P+dA=DZuVXy0 z{v|Uh`o$mi0#okZ2U{7;{|`j7EdBzMMfWtq)P4e!e28OyKah;eeB_oBurwONc`uwd z3yz?t`FX1Ro%0^dklh6@WF7|~yKVBh@;<@CoRsYkdQ8C2%BaU<0w(?sOh7M>3D{lA z1bkM;1elkSWade`2G}=n0mJ!U=l@BuynO!OvM0Zae05h+K_mu34gUUQ%xQGE&83!T zv@tppARKKAf2GYE^O1nP2hW;)Aa#&tA8dzI3&>%QO9;+gxMi$ z#PNa%r$A?&2N1{x7l+ect^g%w8d9Y5NS6VLB{>|swultlk5VxL89;Cz={4{Ul1>Gz z0xj3XQt?q;kTT8)}JgVpbD{xuIJKn@y4kUOe=Y%n0$k%gFdj%%uyMEA595 zSOrqZVxUm0LM(DCV-;#5kgpY;AY95SG$Trv&YD%g(TqV^=c0YH92U>J{vTx(jy-E~ z`N|&l-~0UkaOmT7xjd1N{ommfqTm#M!QqJQ`}XN3fB(#GC?~&Sx}^g~T=YybFS2>hp+HW(MxOKbK3c6gJrD4 z)hH7>?9B=|bJ2k8=P@dju@1!b+Y=~uDeFMCQ|PY=L~|WlJGSYte$6@zM?#u)ptHBi zS%)KNXz06F%T3kz+e7Li22XU(Aayijf0qtWw`$A{yoPCzS9TU4Ba#Ptw!Z@ER_7xX zHZSlF`KCDPQmyQofqc9zucCa3HwfSu(buwhX5?!MmhSAP(q?aCfqjH$=y3a3;77tU zotKsWeiopv5k|DFc=yFH&K#pbrDb%#I5mm z8ehx;YpBxOYkVp5>bZkcAJMJs6)XT~@XMT*3g67Un(pYdQ#h)y4)W%mbo|{c5c!xg z?5w_}2Jf!@kFY>f`nEkZ zev}3FP+j)a_%YTe@F;zxUYhWx{%E}&T7R*!PqF|RQt>|8zZl0*Pyw#c_+m4VMsL(t z7htIw7$uMA@{~&I+YWZds$|xgf#Qm3cuh0I zqcEIEZ6vgp?-ufKkgQhBYRbb%Y9`&9SWRH^vYI@c{4H9v*~s%k`C8k@K}eV==huXs zHb`zp7*PdSXVkDEU6MF$K z;yFc`x|G_z4tkj$G!qh}GT%1k^mXF@oLMog!F8u3T*-B`S&uV>gD z@YS5j48F;v0E%&nvnK;dnU9xt7SSV0nnK%@oW=7LW~aPt%0@-JdGD1dsB?26#iiTE z(w&vxP}E|i?5wflyr@Gc&|06uLMg;0I=59(SYiqt58`a3qJiy9iCXfxBHq3R?NN2^ zqPvXJzM!fc1Ot}-h>=d)qJdHD^Z~N4E-y%df=Z3x%>-XFii(s7L(Y9?lcwj%9X8o`feqge^QNGM-FVekEdF7ZBeEu}zto zONbv%#6rF@b-@{LTVM^tZ^3HPPu@1ak}l9NEs^JmdT>>oA4g2#)1qb0CDrhs?O9koS$n%x07f;bKYt@ar_8e< zXgir`*7R2{-gQMHU>xZDP){0ZwVcQvx!XlFxIrB>XHjd@&F@UGDIdZ}Po>7%{|63`JGPnoV zNBgpHF8tFdtK#}@5%R$S7*`|(LnozNiR&9hc!mxKj${krna(!l4~~Quk*zH453Y}P z3|nF65#Ee33Hmq3K}1#u46AM%7%cb)5)#U*9<&&diBv72XCi7@0ik}S^?59T32a*eC{R`eyqm9+qIxqyISKLtiYR8;Bh+s zCM$qL*9~jD_TOv;sF@72u5rex5`qcbL>Wxb0l);_OZY^M@3jJFDZxn&9kFO-@3R69 zeVc2w{{buT1NmR4GdyGkR{LbqFkaid;FFgTJnYID!=Sy2m4}A$w<3>H%`b4sq6lmw z%~mlV;2CRP9RXs#MDgsJ>}li{T7kMF;ow zVlCGc#j##5SC8i5>SXI&8t)8{W==L*dUoc z2D9M;*t(dU$8hsm5M!Ix)@5Fe>T`z?Lt9Ewix=}NQf{FzcT}Wo zCd$5wly8ah*6$V5!F##Yew$lP%9x6`a$Q!Dw9$!fAIlFi=Y71UX}tA+U=eZP-)35| ze%LjdJ%L{|Jw|c+wfyRT%_xRu@(wm@Ap6bbcjJK0ALep8p!2eM02AeH1g6VR=J8oL ziecz{fNt`{d}stqWbdlMWSO!6D~eYpk&#gT0`&2tVRe+lm<2p!wXCYmil$dJjAhEK zDE4G7m^)NyCK_dUZQavpviNdlvnRae#nr7+!m`bKIELe!!!0YxSKq>c(jWbvBBCV= z`6Irv)y7k!?G(FV(}vzHbLReHOJ%EehRu(OI?-?Q-i5QXD*!|K{n1?kc9}LO->Py zBJHW-ArxSmcn8nZ#V$128R92oFjLTxH}gb2lzP4>M3{x*9W?QXcpnLQJHMDXN+XQ8 zgWfzMXtmN79Z)1LJ^@LH%1Fo&|3MP2s0ywI_j0S>luj zkg|k>->{(D<*JHgJXaHGc<*fSDl*Fvose{OL0g4th(f$auBd_J@&qj$<%^l9i30Ho z;ueapkY-Im3hP=T54BQT6u`HR*ab?F*a=Eq@c!^le7|Pp7 zSjf1sh=9^WbU+48#X?Y;2|5SAxkx}ZEyT}wftG?SVOxoVptly)5%K^wVWHAs!|C^u}J2czJyaVFghY@84KuTw_Oq?(11^Kq06M$T`-6Wa;NP8~MRK9mGD&M%_c zVdFdquM8V!vKfYra}FZF#@P=58|T{)0XEKmzz;Ug^N=rWoVz0eY@Ej~w15Sp z=Es4-sM!w;M$N>nz^FM3?@9Xy;RmDU&8VDj(7wX(v>!czB02l9i`u@0=SJQEjqxc| z-(neZGt_=kCh}3mrs#o~mdFMfn_W>M9Q&^jM9jzAIbs)lUBh02BJ=rgp#XtyNQUuU zG%tv~AYfw|>OU;%;P-$bE(0h*^#c?$F$Ey9nTeaolL^|TR)R(8#wZcrmxCk%v<_hM zr>XIZnW#HMe1hy@#$>NSRq%sTDbV$JNs}KYlNT`*&xUvvZ(odpeMc$1Oe=tap?EdM zKl+RUA&9{Qna`M_)sGmCY;iS`bHzz~0;K&JLhw)bQ#3kch4BmVXvCtDDnJq?BXp2j*@MgFD|xy(fXfE~Bc~A@cH(MPF*`9x*0m6cbtt9VBIJrp=g2kvXcos@@H@$AUQ zcnMyUd4kaa9{hl^sKvVA+mYdT@K;nJbi-FDe62-ZiFfkio$fh@{{ z`|0iLYW$1{R;Eu@PZf$R%7ZVGe|_!$m5}3B<79=`iP%sRFNok*_$DwTr#G>(FNxp> z4u4bMkMh{TDmIOY{=WwEt2k_&xbI*ZwP<;8d!q7TSNcV+DT? z%3oIV%&Me;gXy^UHk+Ja2ecX9MhD#N1QTVmHBjSc$$@JibN>*MbJy^8k;T-JIx^A* z#@Ku?Q^yUiqNIkZ)9k&w8{>CTsfT$KD;+Fb{06Gb;hIu~D7EO#M|c!7nJAm62qQIx zG~@9kTJcdj7Vc2QbzJw;3y#(#y3H~E583Nho?T-Hef6ughmSnIqddoZ6h?~L_%tDJ zzm;dD{YWP#cRhrMxz7@F*2(W3i@`*T#)H7F~AfRmKuc z(UoyxE%f<2c;9RGmGbPHm&Hq94`% zHg)EenVlMZ4#OLNkkRmJW~T+`(%0Y4Xn2IxQZN^p@Q2jhDQ0$N@LJjbHZ;C{a>i{u zKhhG_4W)N6`e)kX`23v{do@1s0+ zGJ-n`K1S%k8+aGkC|w62hM>Q}gaGf(gfcFGFa)|ghNi>Rc;sEvow*0kX+Oov57zV4 z+$Ry%or_5gZfCKz{`B6K*>Ds6S-Rty1ym0Qxq>qtA%uI+f6f?Pn+lPdsW! zxE7BDx}5EaM_&`aR4N{=Mw5ql^an~or>!XQXcXd25j&9fRPikeFiq|An=a-dn;GIi z2s%?dj3H;9sD@I{7ef(dp%{mZBjOX)@&AKV@v`WcxJs1XJR)dEiY@A(i*fN2NJ4xD ziX-SGYgb%_uN4q^m0#t%j(M_sA8GqxSOzN9E-U+816RP9kohcn0->L-0VaC4Kx#xC`qUGo%Be3-gVaFKK9h!m%&QuSe#p472%vCHL<1DAsmQ~~+f2}L z2h9a7K(r7CP{fvkE}d&7UPcjH3mYL17=q(FK|Fc}RSxm!Zj>A1(E!u{#H04e3gXdI zfrt{11|d&~M;5|BJbDS95Ra}ynIRt0Nlg%s@=+9sM{V%R5RYi9J;bAScom38c>oZP zMj-;kBW&R%@#uEs3-PEvB0xMEi+mv--HssG0!n)lu>}-%FbT8=^aR2{T7pSGNlRIwDvVeS)1_1eJ70L_wXe(Y6^3hg&TgXS9kv8O`-gpVfM{VH; z`DiR^=NmLII)4Y27b|#CWGfz->4`;0kO__gME*?7!yB4{Y^^QP7GzsV++2_yq7Za@ zpChKj7t#mqZ8klz=oL_ydHqO~2nTOaYGm0D%W9--iZ%FjmN$n2BouHZxI7eoT-R z2T5%8P+8_a$|3L)y|no>9l|4~p%^&45EPQwo<}jwgS1*7n1WX|&BI+OP^M}= zv2+NF8Kbyy*iZyh$TwE|#>CPgEM`#q;tD|WEtlEU*}LU38_BO`xy;s+YQ9`%Q>W=B zFuC_No*bdw&}O-awgZ)ImWyZ|$TwLRqCs#LRZ6*p)`NV@B{VwL(=3is5VnJdf5=@I+1@Jc0~C@p!5!Uc6@0^PmjUqPUw&D3TEfo>Q1R}kn5sE`!|x+loLf@>T49Pf;@MKDyM=x_pbc(I9TdWB!3;Uae}P=I&UB8jgipo$Y`wsmMnwW z3+NT`{m|phKZ$d+f^7atoZCyK{F6ABLgT@o#5r&}hWRIPj<)rg6~wv9$c&2pCvh$z zR{r)nuU3QBEzLj4bB)l`%sgZ2Go~oli33;lD{v_m~iWa@et7WJvTBgN65_!q+Y#wWiA|`$-55CD$ z6LK-);7BbJFKkcD`$~TECYH0(T^TsR3o{c4`*h*L1~qi&DWXjmxXv;%(WT@`1N_13^j$ z7#*K_i&t*n6)8KjS5bBl6V+PKoQ(?0N&6iocFF}VG68nx4Z>KFnuo`bQ+x`~X^UmE zw;^!7AjiB7fs1^cC7a-p;l#+DZ}XHZ>3Ab^nAHbwn5F7um_?Onxb+aqCD}1!EH&;% z7PFQiQ0ACPBMIwH5me+xUgRt)S0gWS#&Vf{l2=Jn{#`5hclG?k?8RuWle`l%$2#)% zclh0A^Pp_@F25^6`gHfKL!DPkdiiw0jPJ6ZC=O!+X%CZd=DT|5n zLPg44qI_3@l79>}%R25?*(BTa#`&{QIsI5?k5&+mTv_iml&iOgF24jFiB0po^XU*k zHbaN~9Q}+ftQgirm9fn_>_)lcJ)Rl7NLjw3X{(|q-{Ti;hg0t~EKer=rG(e|+k)V~ z+N7gS^Q|N^zT}R4|1@v#w{ufs=bVpuFD{>$?yvq|;nxpR9J4r$uLe&og7>>Th#wjw&+>4tXbmL-K0?^ZoX+ zl_~Br&$O2xnqnsFAp2R$_kIBLtKRaWB?_2NR<#98spMt0$mLx#AVbM1pqTsX%Uxz_ zvfOElI9}AiFm}sRZCfYG6Tq>`_X&bym2b-Va4t`7h!q62fM=d;DTi?!g?Ong3A!Us zCCJJBlcz^RLX;#{2@&Uq;i4x&%!FjTMC(ScNM9OQ>C$_pv3{4#o78R6z&j^^ZIe6G z#Fas^redEUN@H+ih9{rWS`y^bg#b3$wU;g5wI&afzlM-lvm1m=?QdwFC_Rj*0|MJs zX~-(I_FoQf2&KgQLnu|I5Wf@26G~4b1$`LNeUx|sWZ1y`E0OzV=HGy5N0|R8Hek75Y!CB%7&RDFN>_Pxyh8_GZ%$=fqUM$1_gHo$U~XXju6p)t(cO*tZXJ)uEXSNV>K?bQoACgQa3 z>7`FI^Mp_bT|H2G}2BLY zNU_hL2+r&a2%UgM`GH}Po<=9#vffm{GUM4cWIUUIzP%a&Sbw=QELv241mQ5%{Eh_m z9?Deqhb{jIqd$viZdK9BbUvgiz(#&`tHtIkS_I^s*<#;+9sT~YA?Y7!0sqP22T=^i zr&u(Uha)EcrQxfr+exI!qE4b)bay^*m39` z?DlIzv6}lyFGB`%|#{Q4Xg6lu{u?(qQ;HZr!~rtfC0c?*)GX=1Dr*% z*|``*v@G=pijhFAPGL5C5bcoB2?%sbH~p2H&YnatjKZ`!V5_~y8BmZ&2X+MMohgOo~#UAo?($Ug@moA_rVBu3q+BjZ|$jL0@5k74&H z0EXRj02p>jL5E>?ETUo9T@HX@mv%^F*rhF7B`7JKHer842a5SV!y~i5%t7(|9YHYs z&8h7EUHCQq#D`h_FX34>?6#x0-+zywR^Ss`?rJ4+TU185u-%=O_DK=Z2ytzTIS5JP zZkT*IqkZCF;A6Y=fObP;Iao@IZ!I#i=-5{~z|vHd&cRD4D8ARDD$0mpE7=`^aNf#< z)}rmmDaadV{L{G*p(=sz8j8b^q?* zNC!wYid=%KB73M!qr&?C`SgB1V3FqG?RD-JSI@td`8- ziSk%NIK(@n;`C(@MJKaEzF#p0(aF_uGCnb!rH)7WOGeWJ$hQ~! z#?i15@>KsiS$sM^SYvNYEZSe&mL(@_JGKb^^hfu|)K}L)#IFO2uV|EdeW*5%C)^1V zKILQp^#>i8cO%4-kYVgpizKn{L&`h{Ur>x7*^Tj|C~fUBv$0|Fu58>0L3cyM$Kr%~ z?+-!fZV35fACaxZ zI6}j#G@Pp89D)&KRICX%YPecMwVnz8Z5n@A!{0UZQ+I-YB@L@+sJI)@i!@HhUQxIf z8n)MvIMWDu4AO)V8jjU)qK4|u351)i@r4>L){u4uQ95KvL~w(KWKlx+eHw1paJPn0 zhI7;@05LZN=`at1G>#H{L&JA9Jf-0m8Y;F9;b_XD@N^IsK{|PgU?mMxG|benx`st2 zzCQ&Vs0rgVB%^tvtAhdnAJOG*UZ_scRvCb6W zP7NQ@@Cgl1YxuQ>G^|m0+S`sRdA-Jq4mEn}=;705c{eJA@mGGUf+t%wEtRdzm?SCI zc-JZfBOCS^6(f zCS+S@1J;^$?MGxCYdi%M1c=Egv_xbU6E*WhabZ}dI z+-7K-uOD%K;XkZtH{cR4T6xwA29ZSj5g#3Y`tx(Ew2>$64+DSl3V^+u8cXSMGIT6I_>(+Dg_PJ4wQ9daRa+`0(zylpVEC3vi2~k` z63G}1?8!Tn;s%QCNr|n<*E>$;93|~ZiMV&P9>Q=;y)H34Vhshe>s|uUxfMTl={`Vj zqfzO3+0I3Tv&+xRrbA-vMh6kW^~~LdrGw&&A}7Pw4Uga;9z+yA$^xQpvr6RCmNK+z zXDq_-8C&s-8Q2*}p=NrR?Yu+SEDv)XVl((`4~ua~-sW?cB0WsD4s~@t&%@$TrRFGj z+rLtn`MH!QE!Cy->&a-*nMGONfXCh{&uyUb#ieplVjYiPe6^cM<#4ZHR`qN`@JAT*z z^*EUx2hyVv$8Mw`;~9Mr`lBrAk5T&wp+6aH0{N8*R_YSLNF1v{xy;77GZY&04O~q) z_BP_hQ>SIK>2UyPmFf{Xmx9tKH~eHd9ubPSUjVtIJE&$;FTt)Bw;{mQ`EwhbN=H?s6|mZa)V!H2CJJu;Rgih zKA0?B7WlS~X#q|o+)##B;U=8@mCcw~8m&xYflIKq+%rrh$Q8e2$JMiq?^&v$drvXaL9KQ-5n8~-7*mWeQQ%kY?pC0* z`@c|$G8gVo2@qj^g`g2H1yIx<6@W(7O2#x}4vch-YE9Cs&oFY`KT_|e^oIQxKcbI- zi$T2UvrA(TWmGBED5Zj+{wS{&WAVd`ew6kY?~wqN(lw?)X zNL30Yz>MAmD6*oLzANZ!4-}_F!=r@F91I>8I3P}bXDV+zt9{yI?FWt zq^-%7ua6eb{B2p}pD16{$+vR;RbmADLXJF&>tHS!EGeT#18Z)$RlUq=1(`WHnU+6X zV4CPzQ1?-(t#yo9DYb`KNvrEv(_3`4X4FOyYi78pz7@P2SUz?P4$R82Cf2qR!(D4x z6T_xeA^Jv>Wf#>;Z&R3^kzLJtd|^1Vs3BNc(&?r2AAOm2 zLAT9fv(1gH&kJo1wF#=8SL$CZ&rfQYEhkPCJ7lX#qAH($)$HlD<(e5HQOZf;9a(3L zwMFi3ljO>iW2_ifM0R2E0}&m=hGOL?rD7T1zfN-ew7-xI89y0U?p=5~4R@j<{BZBq zzTLx|5FY`x&}4c16(>PXyi_B^AI6aKGU?*i4~Op@%xCM>ovV33la6H~4;nU+0XRtm zGVu{H6yG|bL*dW0>h4|PYoC&%Q0mJeX0w#TnAoR{fIxKAg7)i$mCCG6joDf?k zr=0R9%hh=1zg9Agy~=`aAE75zcGnmB5)u-T1YU$DcJ;SALCcAsVaU!=%M-p1c+CR{ zmnwS?v9q|1ni}{&7}O1uJ)ZH0NoH(^eWLMiyRBu+Q#_>seey~M#&|#~aIwOLahb+x zE~^9`cqs!u+Q^wMC(aOUiEsaq zh7S`&xF@u~TIm6PMB}e(|Bp3J5`!wCh9qhb9P+< zhSv~8mZX%WkaIM?h#TI-xK-0h4@%)4)%5)u(kcUmf0ZE8eHT#a4n8CT z287c(z*joJj~XXYfg(5iF@PP_&A7t5dSH*+I<2*s;Drr`@3zNFzX4d2x8 zQw>!QK)mxB|3O1yk}17_hDt31T=fXREKSe$px>aiKZ;OaK3&u@IWkD2szZQ0S>w|+ zyivoOH6)IkqN@%8_^ifNhXDSb##M&^eqQ6WU7q3*qfU?(2>~MpNhU;4S`t9wya~_O zkQjQx+iQ5ahCMVSrknf+YdA{7u^L{d;WQ0ZcS2KGLO5A|Dx*6PZdC*{P7UwUaI1#f zH7wQ2D0T?(4r@A{Kum4yxQ29U2jL`u5iHU0tcFU9Lz=iBG~p)=NdTb;F&e7%OW?^G zCozQl3p6BYgz%Ock}N`aFAYo8K|?e?T0>F~6;Qy*nlN3%Qa#a48i(Wn!$NuOB9_;Ej*ooBV}L&t}kBgdbr02W~4yt!WA9XKfl9#%*wC8(@BiOKb$gXt-w@8^#2<&+DTF!L_T0F%E7& zzRP&H%5`Bf4Hs$xIUMfErWohpIy8ss7491_4b9>9wK9xJaFtraiW=^#mXMR-I<_#3 zwJjoO|8-!}4R?8M!?+u6FB-r|xXfCH@gKO(`A|s0orb{K7%siQFkXUtyb#|WZg(}@ zBn6k64O48mGgVW}?%37P1HsK5YZwp1EgoYS zz2RzKh3Ot{_DHM~z`Z^K6AxU?Q8;)AZpmnT|10nlo{Y{8w`>X+X}Iar3}Xx2hf^_r z!!4a@7(?Nz%`%K1;ohGCg&W+=>Ckk*ODe+)C8$V7Qa>Fk{0_ zos01qZpCb{op3eg;QN0+2Q2Au@PKgF48y<;w{8e#b+}eTVJ!|fZXnLngnMoPx-(ph zL9i)@TR#}%FWl-r;BMfWU11pC!X4@jwgK+iUO1p1u1R0R_!{okeumKrZsL_-OW+Ro zN9hv!8^(ysF!RB^+yOHaT!W6-1q^prC&TCpcceXZF>s^W8AcRtQyatR0@tW5?BC&v zI>YiE?v5^o(GzY=SHsu?_v+h&~?&)|-B2eS(|Hqs5;1sttgng;z5 z3yJUlDlnQm>92gHnYc1&a%rT6GWAvXLw&oKh^F%mFdLGmQFcgE9D>lzE!GGGK;qpQrJ~nVV<;9e-m$Cj@P`q67l5}t zSRNuU56`%|h%)ga$tqo8_1XRgQM<-pm0tdaMwbL+RFMwV+`}z%lH``IcD}O`shGx6 zd1{a^QGRoSIR3Zw9<&B4JKZR1%BgpVcV+)2qMq#A``>5|*8Y)+&0L{ zDV8->ibe9k;%atFluxk}SS&Tdgy1g`E*=tXLxtf7uNGe}`+EEU1mH1i&u8Yy4{jDI zRdh&V*eSM&AH1$%#>mWP{aKNqUR90r)Rx5OQ{n_$XxLsu3^j_5u}ndXg$iD+A!Y@I z&(LtLhBs<>tA@90co$%VGTN>Q`!qbP;hP$s*6^H$G~Q4=p<%p+O5g>(P~*xv8h9s- z_tS8+hEtd!>%3Y( zZ%}Vf;hFmdg7U2hB%Z~OQ{3J#|VE><07eXaw8gu zV{?!Ib9&Kd50aQ|1SjAZD||F|I(-l0H$XZG=8WY4F$3}AjH5@?4(ictjW{;RO3wJR z2prcFxcRNgthn_^$UH+&baIXPGoC_>rarlGt*DYlGcW6@3f%w(ghg)lpM`O^w=ndMTI~#{^Ph!zbRYXi=jP7j*L&rWrO8G z1ZKzNo%h0Qa5u(NtTB>sA7mqW{eu-u zuGJW^r&+B+Bw2mC*uXIs8xNH)q05i9i!kfF{vnakVLZI-(!Q?l1#mfdQ0nXRkh;AB z&)i!Nr*6-^z78VJ>zGX8Y^RSL`4B8F=gWByp&otF?;jF187eBgQ%tM62w_As%a6EL z_NFjS{si7!@8^@dM3+IPG{_C8fTNurrIlTY`m9F*5i_XlL{$3)|Q*(#%x9uv=-^4{kP zrpVvcB_>1<>=TKmZ(9G21aTd0@ul_nEBwOqkd3-klhPSq!kgVE*&<&qe-EL)^X?8RNsxD~ zuxs!Uc#V!;%MI179g5C>MohMGa`xBHiTtwt0Bzf)rr7nG>T3g8-{{EaMT*Hu-}8-X zq7jn`r6pzV8Z;J*_)asw9sQcvWCMya5i0DfD9&pX<_tZz9!tMA|CPcx_%YkgRuo4~ zzb>CaG}mbcVA~v@8KIpT6nY5#gc~EY^`LsL3bDtq#t^xt>JH!2V=c(56lWq3ler`< zn67;RB`|H=!=x};Q^$cM$YQVK5t)FI#faDiW#yl_}F9CJ63DQ_63 z!u2GSRNk)2X=)HD&I3+`C`UjYp`c8 zB4j$MB%ogP0HwovBYOZK(Y8m#3ETM$0Zc=Z%<#+Ko`Sa2ceA25zA9#0|MrHBUyq9w z@}5`RO3{=z#OF5l&#;qX*7^Y{ww!-bbTf};$>1zp!&!1tG%>%*lEVlodIz(|mujhQ zLy(2c^swAT^kQ0#I~WUvi8p<01CB#o)OCBu=y?c?Ek&-0{WCpgBYgN>&|+lWcQIA8 z2TK|6UEw)KUQd(@=&b$93?;)+oUhl!t#lu%jphv!VMz(N){+bR_$tfIAB%cr9g|h% zDVR0u6tW@Fj5E097#zYqpNPnRt=PY8lakkcD(cIok0vHY_kAjsG7~rNw)-5LlHT=1 zp3hNkTdw&WrHr5)iHdrRs2k)dP%#_&z5v)K>k{}t9uMKVvdJ}*;^p-q@cRT5M)Ydg zGPKi*kt=?;avnb``mnM$IR0&Riro}jjU?OX&x_vqrATx9Wbnv{6}#7)04G(g?T?W9 z+8RQ&lF<$=3w^mSC>UQR0JBEm$1J37Z<@|V^00C9FFg7YsqJ+7wH=chpUah|-*v7< zu<}7=B`|9d!dXdbP$8wWRTa7$$o6>5v1-x0i$wAWF!ut87)j=;BynpahKfFN(f6Xd zy8p-C?A}A+vJGDi6vN))Hm0J3QJx_We=qWJ*!H>aMfcEPL}!Of5Y&Qy?8s>M3!;#* zI=F62bciV5MvS~^7k6bkrh<9+9fXsjTH~)1KB*k1lQ}9UAWiL02PIS{Wv~t8w&XX&C6nC&RnR`ieWF6(TmqdR24hqrKq+BLLHm-cV+;&Ms%wR<>>2EJ1EgbDHqo3SUF`IpAR8^3$DJEJbcfcY5O5uJZ(D%eEO#A?|8Een&V# z7H42#eVbg9;pFl^a-psB#*$-1#!f#X=hOt>DC@2TuM^G$`GBmO>Ev3|YkBMH>>+tQ zaMnvcNWh35&vdR!j^BchN+U;G)F_P{ugczyoGyRvagA{au(|`7#Y8`8DKAXbBKu z$I>HNeA=}%(?FUolvJ(nxY+zaB~bSlqNBbHjGspo9O0!V_9m8mc!w{g(R}wBc)63w zf1yjW7KyhDkS>oXFZ5d1Am3tl1_1U*xZg9mrJ0jcr52^P$jt#+*tg=>SBxKj29qB) zbMk^ak%+mUzm8Cb|3{hF+{yQ7XEd!ub}gfA7hbr1a#0!Wf~LJCpD3e!rD>hyInX+) zJRb3Av8+9EVoOj4=$7dRf9yjvh9Jqb?4}g_4goDlZ_AcahC2vdB8RtdmS$ap@-isT zum*t|4w3%RLtiBH(Wq$YWSUL(QmFIr(|I6yb_%?(m&bQ156V*I@x97}&?Rz6>(V@a zQF)+odU+_6&VWZAIDUPi?QP}+}=sC zvtWiOtF(8jvZ2xD?VUG*P9aobrcsSVk@5d^F8s@;Ir&fITnUaOCmPq+x!ep)8-Mk+ zSB(je9yfBT+_NoID2JU4`Q!(0;z+T1slga|cYi1I-(E_7q`xy>R_&Ob6g_mMbIz12 z+kp{1_GWU-1IGqAmK?D<&1PZQGR?`BmxeldxY?oVFsG*seVA*@>BF3Ea`G_8#yRWG zbe1Ta4#yyLNZt%!o@p!J9qtrhqS^B{j6RV&K{;_bd;seSDPDCb?1_G#?t0)PgNO z^F__ftbWJ|%cXOi^0ToNKTxl6>FAUf{bY_a-HLQTYdeWV{`v>GV=NkjMUt3VI#8(% z7AAif;jQ-&(JYla)&a39QP5Jkqc=q+)08r~V-bZpPLzSmD5T3FGGx<8)e7mAk5s9Y zdO!N{2CA(xbXX+es*L!BPI7Hh^kX2pgMe#)O3B%{FGFFZl;TBrhJ-<*4WB6cFLbJp ze1J%+TpF8*ZCHc2_GJ8bJ~T2pYLud0Yp=z5-83ex zATrtT_*t%ef1#6-HI+J#8VH6VrvT;3mcEEb8VCX#WJ1Il5h9t5-9pLThNswkc|*iG z(BuiCJ_jO}iShdfp+nKt0xHetspAht>Ry_MC{5Zwfi&k8J43uQU!pYopeZ2D&x)N3 zp-aHM9{vJ2mcUT?<@M;{w8TR_yt~}I$Vp|hq8k=DKlmJ1_3MAZ1juQ_GTTJku5{*G za>r4(w)`VdD}DWRe|mJwt>^_VDG=&58a`dVyw)j@2{->64na;S%*Phib+`x)6aOiR z&W1blHmLdkdIH7r_y#ZqCuNu0mEY|I2FNdN2U8GJ-Ve>Cb!EW_rv^WPx$&+F9dVjG zf4G{q!aD;M@#ke$c;@E1@?}I}N5Mv;|5@o}J#x3~O_a&mr9Cnl+T;v~t5nJ*JcgPk zF5!*xE?F*LsNPt=X~RYyuh1KUn#kMN9MNK>u_wN^QI{uLo6 zC$**(Lz$Fv=Sp#I^XBA{M;@izc?p^V`rBJXgW4LPyt}D&$0;Cb?wmGi5_et*K!3p9$5ezGrN(@Q{a0v8}1 zF`Ge*G3)K`M956?TMXwvDD(F?i$mWLbv`k}q(BaSBA?#lENrdPNoN%JP4t9#l~9Ia zv03ksN-0zMhS9-7RA%&{djR?akAG9neZ;vXUL{>!vGZ;5-4j2NDUUi6*hsnfQKvd2 z*X@rw{aF3S_d55)s=M4wW8*(&x(nA%?q|!f=PS2}4t?HfWyzoIjDN#(-*MQ1GMmJ9 zdFS#f{%G+L=T{rrtOc*2=j@lSyyDE_F$IQEB6q%lo8BkB>g1VUHI%IieAs$TNK7NS z5(s}BYOXtE{A*6O*`ksBkVw7IgJ#H)AmNmn-c9Y~^(WjAdhE{EoLsYSBe}2;lG|63 z-CiS?XJbmt^@R4tvimXgr<@vCvQR>MwAWj>n;?4OxYH{XPwE(&=xls(>Q(b(?>SB~ z3GG$oEvKFG3v&;y7C2&~Nl}qD%*jcRA1?EyM9q(#vCRK0eYzmh=vk&-+X&2}1-!Cp zPEBnlC(%kxL}k-lbu<}p-b<(qwv#}Z%jvVDSJ7}@-m8`Zvq*2NCoy7rEu}|8L|O+z zPx4vVK7&bY1fjNlg5J=zS0N+7o$>F91iXnzv~usge}=^e8Te}vF3?u`mH{lt)>yLzbQ zhYUd7)la3tt)52!(Op9db^W&!+Fd6V<0s`Kx~rFR(C<)EJzZ@GV8{!fI8AC&?yM~Z zVZDQtH)}_E2|NWUZ`Phrvg3@~E(d&y>wGUp8};|)u;}5>oKLwq-jvK&t0Cr;O0sC2 z|B1iNc7l^Eiq`zrxt#r@ULsEwH$EeKop-j%MZbh9%d~mEO3_WOyK5r zxJ$ahk6`^y$_IZ0&zDzCJ~IYABYX**ViS411SZ`hE;)%f_@in|HygZ5RkHHleFaAb>8F@joen^B@K6MI>9PwXh_0KF!UgX$%4QM5wd|%er^@ zZis9h29n*-8EBk$NW8W^{j+P6TGbZ`*&jI6l>L3l?;~d`y*0YV{e+e{UVAqE z?-F`Sqn5uJC3@NkBO-MT(!bgtt8^f_sxuMnGdigle>IBxiAIAkJfS?C#gxRSE*J_- zS6CQZ=DPVcsSvCk`J;zW5m(Xr zE|*^(sa{vMsa-1^JrnQ7vwx%pmfx(ZUs={(Q(r{W=J+PE3LU0Ol3T}y7*)lVXD&K9 za&i?n4@}et&D~jYL<@K&rn=qOUO6(=CDCb5s#{pvTi%omEuNFza+4y> z=o6bu{$likv0UzL1QTx!A8>}hDR ztLUU+{G^bwQ#Bei9NGwOr@1vj4lt!&Xp2KNP87J+YEdCr`;CZ?W=}=%+PP}>R0MWe zS+lp8%qes`quoy`{NHK!QOpS&{$(5Y$sP^eRpm`wVoq2TUAo?9G8wr(*%u8paUlf# zzt`kfGMSrOB~E^rfyI~xZQNp?*9DGtDeD6D<*5h39@T49w{bn$`>w=1)=UO>IF+Mq zE_cJWe*(TVBhA~UvS|XyU$m9Y5Xf4E?^C9&q?LDzI2EgOnjj(CnnaXRZRKS|Sxi5r z+R8_OfPGqt4A5i#tgYNk0e8|gp|zDu5K3z+NvEi_mG!7)dfLja6t+}bNm@*FBodj? zb4YMNKdMPY*Y*M6P;~rgZRKSM#Wyk%s)cR91C#Uz&Kf*KT$&^JM|86b+PdMsLP1OP zm~Ofml+-DWTApI_v_rx=DK>{v+>cd4=qK)D6!(lyD#k4#-%m6eM9xZKLCQP+sYAL5 zUth2-J>9(EVR{R#*7VJlMZMhoI7QRyPhU$W$MtgaJfhZh`hH~cZVfR)G5Y%J!i3Q@LmbXbkI&w`GG+GE_7k>5n}O^-%0i(AZ#l?ct!s zQk}6OB<7LDSu8QjY$*BuMCfDkU~hLzn1%&5mR{EqnAS*9f_#EcO`{2 zyO+TiM%wtLqs!SB;GmLKruV6nc0K?xS><{^qii$CUuC;h`Hv+0G1==%cV{(~@578T zrfXKJsEj>aR058ivj(6mnE6b$9Rl_9PC0gn+k;JwJ~qUCEY+dKAk)bIe^&ol7@a!D zJ!}6}|5;78s+~rJonr1`9Hvd%9~qFjC0apd&WU?n+u4tRjPhzk}K%23=V z8A_B{+e2KQyV9v1ZCmV4F}=HV_dk;o6Fs)b&9lr4ZREmN9I(4fFsH}JE=$~5IDzNj z63pcH$@rVpgg){nOz3aPHMe4kW%EsL$h>fsCml9v0P}WFIt)s-6cc?hWcU4Y56O!$ zvNtGJi>7)VW}4grT$bP@N7?I`lf$M*&o6Zw=f*ce3nX!H1L>_G4(_L=7%!_rR6yq`v$n{mh-1gnug4g?N{^nkg<`!u zYm2vus;n(gN<21+;1}$|a?ml#Jw(9uIA+@>fe)A;LHYf7E>(ptkiS3fh9jgR!o;st zp>7y)G4XGu1hY-|T0$#p)N=13G}$d3(3Vr&lu|{hJC@KYrHWFQ^f8$Dy_ACnCmT9U z{5c5qzj%8S_$aEZeYkIRRd;n~t0dK(1QJMukc1?JKmuXd5(GpCA-I8p0tyJqswgN+ zKv7XqL4=En2#z8u3Mg9cg5!b;2#U%$E--G4qJp9_its(pt?KT;JM;fuGvEK?N2==F zt*Wceea^Y(oO^Fb@N*G6YH_1;aLs?>30#DGqL>RFeUTRC^NC@^;u}cb$Xo>;TS$%( z@?*!m!&=YgE+SU9#P?5LA?H4Aw(iGafcOxJ?o6w@kR_f%1MWTk&Y!UdY3@Bf;yvoX zLGC?1X6{ImxW~6on>V=k_>A}X5g>dUL#*#-K@xYX`5MK$T^#Gp>4lo!a1=SS5@ztQ^i90 z(7Wb9ZA2&6c9Xx$EY{|@wi`Klm#K@zva*}$_EEY1)jX_W)i%`H_y9JX+uU9{M(!O` z=-P00%k=lmB5jLj!&xXtf;3)F*l>#F2BvIj1K}CB;S{H5#H=^`p6sqy8D7lASB?6s ztD1C1IF#FAKkwTnFp3*Q-)4qstYRx>uqCKOuj~)XPp#H7h@MLt2GKH{I7p2fM0>DBVcv{1 z^tiq5X$2CE&xGu`KA3HeG$-N?W`i7hz|2GJ`c*jf=!Am$#c>1Z6(q;T4WRu|Umq7Y zfKqqSFEKfe#ncL)@r~Sdz^uZC;h}?Q@d{aV(EP5U4>^4{%h2nR+8!4!xrAgWp8EyK zQ{uUtiJJN*(%ixmNFviCUm&TZsA@R{ES^g5pIi8Rl7DB1YuI%b>Z~GN&Fls~$7dwF z$H}gcnyH_;rIC9v$<%o6OC&e*IaFN%{z#3=eLt9a)}2h9%NDukU8*A^KbmDN*WsnO zsdq9}$#7MOE9|H4lOujK^IG1{Lf5dWfb~3eAzM;pgrrX{M)gt|J`Oib#`U=wO6EeJ`?&!M7<=JUP4;EC71q|w0cc0-3KA^S|lpp zz;mRl7d1`Y=W-k69Qm)G&58o`rrhKonXF!wOJ~Ax8`&pM{l#oqpx)JVReLCt)ys0} zNu+)9Midk6oriugg%E#{j~q5h`hw?)+EgHSw9a~EScKo#X+H`xxhX=4;-g}{2u=#bj^Fnx}fvr0on{&_vT zRTrK^&v%X1T5fMSUMbK)Y3=C4bUHIvgg^M^R>;ITyb`& z+ES(fWh3r|CR49)K07<~i>|f)FU-OvGJjquC_fn<3OFN%g~n)!QN1&McqrV+ZF!)1 zMw`W7{jCW;7Fn5_u|c+<70Pucj|^35*jspRL#Rk@y(m;{+<|VjN$%|m-^%0%s&$z^ z3d@|GB`1sm!_Jd0@N|bv84bQIc1_6l%kxKrWi!HY>+$%V$t0AKhLlD~OI zV=a6y$s-==5C2H=_qYw2-W>g?G6&O`b`8m6UQ@~8-6VaUJ`Q6VaakA2m}csXZ%#sB zpS)*EsJM&|Ax>V+?=vWskKh{9RF~l+xW+V&q0<)2gHu8$i^a4dw-$25ttCNc#O0wg z{aV3)+o!^E-OUq@LffhrI4G*6l9bHrDGd zlT~*SJDlmdGKZD!=fUkR^q_b{%DoLt zR%1#uLf0L-O9`7a^&zBm{c}Exsk4VCx(j=hFEAV>8Uk?ioO}!#+dtOVjecbkpVUjN6_+V4EG{wr9eT z-Z5@_K1#AGVS85HrTVz;@|i}pvsSK}5^C0|j)VOBQ7MJbBzk$KXg-nafl6$2)iIMx^%!enme*riyFI40+heNS z9+U6(nEcD>tYMFNJJDnAO!OFdAJJnF+y6U+5CoZ;^m2EiyNq|c%T{)m?>(VXwYpJ9 zSyg0a86B}WYkN1~Wsb9Gb*QH+}^ClXotz_F?+KT4O>|zW^aB?ak@dH2zt#oWURQ5Nn%ynCwqJLW`<&W_U3F} zy3w)JjXZm^#?+X-c?4>rFL@E`yX9?bLp{Y@`S#jSo<)W;j>L_`%jFTIimzm|M?)=O zF6;7Ws264h&3rV}3E{?1@Fe8dJORue!|4e*q12>=kmSEcko;n;Vc#!0SBqej#kYtcqni`%woDA|alH>81 zLXlK{)94L$$pVtkvhKsl&WsJAND}t!UG#jYq(D7*na(Fa1p}m9_2lJPVjaUq(qGBH zKM(l-v#ft1G|heVE-Lp6co15sXaAF;J7jqwcY2tRt{E5KWE<#j1iAdPo||NIOVic4c!RQ+>t&|=bfA?o=z zvP{hGOQW)%k(qJ3?`me7!ROIx0&NH*{-2T4+Y{17tmoQ&+w;=3`@YL!uHE*!@ z(klwIp@9{$`W*S&pTjM%7aHulIcAwjmNqBKuKf`!f3rNdf4B^rGhg37+@cfRVS2S^ zk)=DzTR@j9l<}Xq6Bpst%vi$y)&*(diSk3XwB0$}Km4RfzaP&eZWT0(hS9@Q?~*SL z2xm1=_x6%gK4k;&52DBn7P%1@9-Uf~$V(+!dg&>vc)dt@Yu-hj6vo_&+ZEj(UpD1x z(u)=S5@~8OczQnNKG3~V=vfp?RKi*4dnrBH;8Nx1d6;xwg8qUujpkl{J|tesopR~G zaA~Fb@r8c2`v{UPn(wd_^6PjL?~(qDuc=7o|3rGb^TWXKM$w>N3$_zNaqhF2dKYi! z(y4EeaISRAVEIc~iRfA77Qwj5# zpk7vUMSn|Ly{ueCM**SkyUJ7aMWofcYN0^yLDK47x%3Xw>Rq{X5^PYegU_Y8H!eiC zxJEv3Mz~O{mT#SbaDksSC+p1c4m-FRQwy488FEI93(rpa-y)e)c15^2AXomQg)Zl8 zL$Jxr8K9G4rFq(LVQcG*a6O_-@@9tVqME?dEAoYz;Zj5>7Hr3AqOOZ-u;-$xgrmArovK^uz|xOw6!7pbhEf6 z{9dp*LF=KU`0T?1x$UlSEReCIO#h)dHnZ;HX-u;Hp-fATZMG!zVX zx;GTp^%w9lU?@7EPUb&&qK^#F(Tdll^(rOU0hM4c`YSUa#C%%aI3D%jN@kb_Obo=V zBRC~6D;IhG5*`X*>hk$Bd0BpeTXB=X5^I2@b5sNREwWExxLf>q(X!YW*ga-?HL zC-q1mLrS){WB)i4f1zjOb`%wToc*i9w1W9!1$`)QFK%xUVp zv^$;*cQcGbcz0uE-6PGg0?q0QOCEkUTyG3(gU&A(ZO+b=Bc4Ni<@k1T;)04ca?^9+ zVr^zS`63DHc}T(@t_yT>w6&!zXeU!|sc2(tgmGkz-0-QLDK{~FSgyPP>6qKL;dw~H zJKD*|NG?QF6Xf3OdGLL^0Zve}nesdysgvtoIq*VwQxc@vhBv~oS>;OdM%i2t3Bmry1=~);}0!<06m<1;(Lz z=kLbrx(TeOBlI386N}d`Dl4{6<5W`rCRFsK+exHd>DHO4h^9XYj&X)I> zJ2p08G-)}7vxVb6tyQXN;}xv8-3+jZcNwDy3c#6WJF{l_n#hVnKkmuZQ;)Cf=tZ_xlf~+YF12UXqS38 z-Th&9XpbVX42=Bq_HbTn722B>;)7ui0fdog_zlKGY$-dGit8|fRu^m!7g{MGL<6e> z7qNkn+`K*9JWU04T+383B<+Y_ezP5z__@q_80$Y=x5Fi&ZYZiB z%E2II@7v*sQ@bPV7(p7C{_qsi%1CN!=h6?t7YUitBPUsI-yI(PhhiEM3asq$w{V$U z|4c^IIr_KoC59Y-cPlIz+10e*OI@zUYpjyojkgtMTi(&syRu1LcjFuMGm)1t z9FbRi0UEX%0<)1bJMbq|niZf4cV^%&9A^ZcM|~KMxUqaJUUv|$9}usha?Efve1CFU z!)O#u;6V6$7K`IRcoLdR;6Qj9bH~IDM}@3=aoljk*nk8Mgy|+r;6Rvx1i%4?3e)Kt z9K{y}94JFVh&a#<1;UTW-}fiy^{0&}fdk>;tQ*IHu-XAEjsxMJn7hw=s^sus*8QhP zTH!)D=G)}X?E*}V<3PBSP?8yPpGJ3om>tSTAzF-|l5c&RoY$I$bUiD?2O|!cdM{iB zKV?hVp#iu~7TaXH2+g8?jkl$kTRtKP9I&6=<@4PVTONMgnLGFhk%%$#@Y)Y}j*d;qtiVTJ)9(D)GmPoPuM^d!K>-I)u4G3d00KLXtKnWyf z@=g&cMgBEd-v6a9GYerN+Dv+RM3c9jlv*gpJLy`=XC}1rpTa2#?SQyrbne)tV+Sm* z9V~XnC8ex87B1)auEp2i7DpVqaQuZh#5IFY!8Cq{A1LP8p(oJa1w0Vv{EF6JD+mHbq`Z|Cb z!J$HSNltCquo;cO!LtEr8lt67f&vQ%k0+{!s2dxr*<7r(Ux{Jae`A|w~l9(i)Oi3+h;Bq1Q#E||-~W<)y1Z>r zGs}53JJmt=b7r+jy-mPtkdlujfHunO^6|6pknizyzbq_B1^&r`TbtRkj~_d4Z1`L|Lk?wXaf2Sj`Q$l%+bi zl%+j#G&r5CFdfkd>3KN~z3^rH18|6gA$XX^J zu0O{_Q}2vZ0t_eOUOqLexFK*Ma%Kk{G&C#lC9Y=%Hsd%Wum|-4h6j*AFyupGVY?w^ zR(``>$kN++0~-$uD?H55!qorZy^CStZZ=TqfrK7Dk99kkF)aLzxgEWxlEd#Zw<_W6 zUdoqJt+3G4Uq@!rYAgdyT)ahrU06NJZShA@H(Ti8pm(!H3IGXneg&v z90ECV)!&Lk;K_Xct#Jsvo=>D%KFxPW!vjzi#B=I(&nks86=^Y_ZFg0VF$ zQ5(W@1H82GM3$(F1D|@}UUA^d;**^m2R=2>>Kz9@)q0bvh=#F>_owKQjHCFh0H`8QVerlnt zueIvMTDhv$8YmXXgFG#lb#+!LqC69bwpK2xvx?m@L?wRyeGLOXY?O@B+*Fsuc5du#Q&GFH$muDVi~vDffa^w9-pdN^lOd zA7)C=nM~1*Z*bBIm|SFZ&(CtfH2L(@+wT!3t8A*f6zFDa){KS z+1|JcrR2Q>tvt2w2-LWD*d8YHoXyVtn>PbTGoz>vHST$pi-%|K@4p~n3QrGr%CXi+oUDfpZ1mGZfFXi$0aJIpbu z5dyDZ6B<`<6*hF_eXlVY!3+!3I+NpUlYzTX35f=c`$Pk5wZ&gZji z^a`6MAs=d-`@51Ay6R7Pq-9>sTtwL8q|8Y&WssEw!JIS5Drom5pJigmeSexchh-;) zqPRPsU%jx&A-7@Etde5~S$S<$gO`VtuS(gcXetWmkD`*n;WYF$x)+kL5!SjvR$-T+ zAVf7Ap_MA-6#P=riR3hpspEX2hQE3}{?Zr|Cb}?B46%C3lryX{tlashGb~4ZB7Zo; zY9&sU(KB%>m47Cs%&6|woSVOetbMOHCZKM|v>X=0DOYLtb!B!zPOjaD0ZV3bv? zS%tF2O(1GVTe`ScnXt6{LOBs>MwaFCU7*ZY2pKQfoSP+g(5ki1#=05Gl%*9H%G8^! zHUeRX*=+9IB{*Wa?#I+Acri|m;Ak$(twie{9KFCx z7miLrmKRr8$wyIB47Cebzzz8*0AKoRZeqK7@N|`FOa69+mDEl>#BK41P`6p=fsl8bMGAe0Nv&nol~%=2 z1wU_^AA1k3j972Q;fDr%s8H^M8|G9#+BUDSY0?x070Ue`$tI1CP@!DXGRMdlue6%M zy!y8*fj0^tYWb}A&6+u$Rk1rMs_+%4NA1-JZ;Gb@Z^p1tpMQ@x+j+CT9^SkvCrz^o zyPksbF2E%4rZXQWhBsY!d-74*l`Q%v=ItekDL~VJI3amt8W87Vxp6w6W~JQC(}VKJ zbgLvZ0Oj;AX)E6}9b1i7f7Pj8F5H2ok=9*hU1S7rM1xJUnqNQ1I`w!Uf*w>Lzn^PO zY%2W3E$GJ^wo;s-*IMTq#;6m}=%e{ov9SP&JK|<_OP1XTrD&L(b)!;>w(+!F=G_FP z=oZ(czE)1S3FvY|S{#nPz$#4bJUAKxIO^tF);G$Oo1p;RVSE17w~*!Hk+BeFDbKp@ za~{3f>KJyRD4`b3JtH^A-yVC)a@rq^^anRvnavlTN4mvEy&-DSx0 zw;s!N*rXVic>T&i5Z$r!IjZn09{PkxPAji}Ki2)iyKlhk#JXR4WYAnfH2BJVR6Uic^bDB8_b4)1&6sZF7F#RB zcUdPvVwK-zWuMxBhQ$gN74=E{?c!cGlaIfohe@v7gG+X~B>DiwDw31%7jDMf`$%ew zeBmkb*1N1`4a$zQdKVI@Or%hI6pEzRI^_+v@ZcU?9wA9EcgZ5OmGUJUT*JD3NOC0O zlIM~f!NMwc0?9JGTk#N^qQFVvc7GtL052uo5(n`xv)iLy3jGu=Nw`C3#XMPmx0T(X ze*F;^`y0~T-~T&*|F0y~??1|1`T^YEe~cuJ6RGO=`vhq&Ynw`i8nbvo zt&}~a)w^(MOo;cT;bkDeL{|-zGeNx$mmWe|y$?e*a3yK=LR|VL(&~-4^a|4IHwRRE zkCRqE+NJk{#;;b>p7=I>zB%~oBF8MZqAk@+7`g`u+$$|f{jOmo&kEqxT_W#ZZf($j zwgc|53baF*HFys+n#Y}G_gFWZ!SnH={xI5NxrmnX?XYb)@M@8rUyfwbqtV5W?ZtjQk3+A^&+_?JDnCJeU)$2`QrRPFx4|N} zi@wV)GJZjBin5d$-4I%^Ne9}yk>+|KI+eGfCZ`w`~-0Q6HfjVWXHkv3AXC_ zF3C=DaNWZU-Dt@g>=AKrrSt~4a=~^TvaT+2d-*rcWi~}U925n zVY-BrsTbp3#=kUq?T>-hry59Ww8Zo`Boj+aUyp~-?~Bdd3~_>%{ud8|xmF|%EI|T; zF-Y!s#j?A@1B7v-8fF2cL)Vi$=2fr|K?c$n+Jh5^TLuM)E+4o^0Y{$VB-NGPz(>mHiW`Vlg0Np8(s>?RS}o3N7RunAx2kg8+* zg8SHp2wjL%GS<``cF-zm$-9cqtf3ThHYmF2ct~nfX`jgZ4}w$9lRFMt1+BP_i_zv( zWC{@~!^xrn;R0NwUx$kZU&aV&|6mosbkOMsXdCO~xjdaJXZ~RIIkhiqm*w#5i4c9A z8K2`|)G6<{2+>%RaW;N{(W|>#hIh#L0>8mHd7zuZ5l_ZnWcWv`Rlk?mT;J>5j3=4# zG!Dio(oNaTlw3B~?;$sZx3u^}Uj(flIMbIgSja1WwDMtuUHT&){3ZD`Plo*PM?Cl% z`8!YJWd0$XZjmSR)WI2Z$ogE<;2EAGa+|i4o+}6Ci-)c6k28U+{g-upQ>9_|U#$U7 z=r^k&V0_e!qG-blC9ULokzQ;p$Jhd^yEA0xfJh%<9D=B_WMx*nOu6925=&0k(u<+n zuhP;7BE;>WmR^eYvG;FSad{>7pTnfzI)6GA2Mhar<7DLrI*cg(bS}iah{;=E4{;so z`Bj>QsWN+!3P&Lq6ce3grJi0S+jnfE8=LU{u@A&8ftKPGXRe;!IV`PaxhZm1k(r#` zsk%D9(ZATXWQg2cYQe+ap|a8&g0#P(JS`or!HhM=!)S12d`fRSc`z*_yI}!7uD6ow zS@_oI{I7vgAO&;4NZv}W6PTd~H!{OCI-&-o;LT_)fdkYS{c5=4PW__Gz;hcZQ)~H! zZX3#ZD$I*i8(7E{!IyxC8LDNSUSEX{Cg=dy`SS%hmS_mzRRSG2+Mg9Tf|QwoJ}4V^ z7BRF3=s@8YoZ^=Q_b0cMzgih-EiXdZMsYgdl8ndeh0l{%9-=Eg+o<%6)}p1nF+C$s zw2%+-bd`KHJ)^8`AJ+I<1>Lx@Esx2EbTJtJcT>`L;(jEpi-=L9n|e$s-!qv`)bSWeE$ zn4u;X=g1{LCFeMIH_JHZ_=&~s|Bxtc6z*1VUeR;%?b{-GPvvE_*D!;kvSr4-&?R@a z%$TO_&yuI*XACfA<_Pqdy0+L~Ykhu3jj=${n4*!nv>?M~03UlxO+9v8S&l4I?q$*X zf(*+zh>wrmMRJWyIUTgWUyAF8T?qn?*9`?3*nvbfr?&4pfMo4ZitC6iO%<50yJ|YL zkg;;mNhp~e5x(=3Blf9Q8Lt@dV!T?MQ4*+xov?FznLn~qj^3d|Y`8wk=~9wWF*n>6 zFJHWgFZH0OOo{*l1^f{0&?39?D9lTc@9)j)SUk!UmQlSUwiFqyj>U=>eM&ue?gsJiBi4YNXalOH076dT@l;z8hWOOXth}-DbCj(s$v3XUab#iJSL2Cx9lmwXEJJJ-cw;y{&|EImUi=umU42$Omoh7Hlu~^|NL&B{Qk4d zw(_1AGcFh1Wco`P(_o0Z@uiG`#{T;$Mt6Q}wOYCa~&l z0KTD|f@GuHEk568vH-fY*7A1w;wKnUFO&y2pr-Heo>i(|?)Znuaj zTkrDuqG~tS_Ib@GKUn*6MzUPFqasC~zC9x^K9;1s)H`D{b=m%5f3bg*Eu5|;87E<@ zkN54s4WGW9AwPXP(+C4bd}2R%;DIwkK)_MA%SZVLZ6<^jQKdkqcUzohW~CB zjYVZVz%t{&9&t#R#mc5p$9iUPFR~KS^<_~0!#uckTztnDxEduI0{OU{9iV)h6*wR1F-UkHPuB<%peG_k zP3k){3tK*eEbMSVWWX>pX&`E0hl5+t1oiN)vfs|kk_IX>`eGG)j&aHs)rpe|Su`FG zk<<@Qkcfv!QZ~$ZJVX+gO-jT=Btda#6c3R!iS5VZA(E!D@Qwsj$OAhwlk5~0+IbvG zRLHb|>k6lOU|pJcu){%!aF?bFPIe(m$-^1IJ6SD@qH@_FVo|MC_>-uzNV8(IEE zW|6VKHI)MPe>wAuOaOqQ2>`~YVF6F# zO2q--1*Qzm6yE3>0Fd$(QntcKmjD0<0Pv7-M*lN&a5#lKfw(uz(L6ZM)#1o6Y$YPk5wZ&SS$Hy~3tB zmAOxPYXT;lU0C-ikF?AMa@{YP%~GCbou^G&%fjvD`@dwCq(*R0Ew;hZcA0WGv)WC2 z*4uRHpsYU}D;L|GNyr=G)hWAPFugvNObq`%dWgr4n;_iYbW1sIS z9`H|$1!$&@X2zUs9BYu4$`>i-(m6Yr8^Qe#Sw}BMDzZ+6APp zQvnf+bn85XC)_~db^N85;zf!1$td|1Nty~=l1!5RKHiYHk?nAvMLI1kE_pUd&gv02 zF?TviA)K^dGqGt)R95_!nNzQRKpQpLwHU88Tm1qA+2cN^l2$(f!2+nuAi-?)8%h*? zGw2-kBibq&zar-Xx$L*h+zZqLw^LJQx1v;Y^~5gy9q3&3$Q7!VI3rg*u}7WRTs?4m zmDdcfxVgZsg-iD#{hQy(IFcC8b(JLHx61^xMeJA-)1>VZxtX~1ZiKUkjsd*oFvI)V8^A$L~04A9bL^psnbu_SanB$L1E9_eAU>BLwSbuIn!-%uV`Y)(yO+FfZh@z{5aF*Z1>e>NM^cb+T`nUD=NQ z<3?LkEkpT6TT^8)H?cKUrhK5xt{D0~3%wbO*$7pz&|5M14t+p!YYe_a^(?&2D{O|8 zKX!WzzC*oP`0W^chepbZa=TeW2fm4&E_@66R>Uln^Z9O7N06MJmNW*Gn9WYx1$jyQ zC8B}QH-sc>xF9=?BxRtO%fib*CPS(4Ko$U$JPS$UT2|E-=_%vnmU26};VTxo-iPDY z$Z*$(S0sl4sgz3YUR!*(sk8#QBqK^vSCE{~x(i7@5GNleN$t|jeU&6NQWtx_CV3qT z--dnra2wx_dL4h~Z~Bd-dL17z zw;EXLz7DnK>^UUW>-dDZ*MM~2$EV)=NL4RlFMrG{$aG(XB7+oW>P7q`Ta5DgDoLw1 z0ovyqL{hy8wTkUblIl$;@@|sqO(^nNlIo{^&bm8Ds-LRJNI?D6o8`0$yRfDDr3$>u zgRzHK;5`zgb)|f+!hT$gb0)U8yNA5J%l}}sUCiSYaPqs_qyJ5$%Y-S}VY#lG-K(jV z=Of*0cfzQI9~KdGgM%3oxNAB`y4%SCqpTo~xb1t}#YTV7@J$hc=kx~Pj*>fj18{fA zf<6G;LuIaq_Ooas+J0Mv6qWD#SW&%_ZQ=!h&Vgfb49g3+wRcVs3xyEnp-OC zuZ`Mr)7kbF)kpDNPy7ep?3YLeQZ3?1GoDkY;JZBO#-l=Ba*kcu{(g}Dat4({IiAS- z3iDnTF?Dt!K-*N8`T-~71|i=%$8MuNCFGCi*rnQ5;p7jtuhD{=Sjcy~+}SL2%R=!U!kCw-{>wUB27@+#!OlB#a9_L|Pgvbek5l(iWL z<>bwf6Cbr&IP)*C%QPb&&UJ)Bo>SdQel!9fc!(??X%CdOU$imh!i%H2%w1+D%leC> zmb`x?woN!JM=rCm{S*?6D7xh(eDO<}qv=Q4dE(lO(>Qj`~I9YgZy^Ys2NjFvf*udoqvxqOsu`w`W-;bQwZ z!>PP;fqk;&m35s_z$0VH{ZEXrT~8`KVV5O9yNouQ+OKq{rsP^P|u;v&@p*j zem>SN!}?X};~)%HvOvsraI5?6?`C;ZcX-luVjHOMa5BcD4VWltjtl6@7a%xdfG&s> z-)TJHpD-T>Eh_imnlV=<^b()wK$2rFlO9XakqY-MM4r%#!dXAg-Y0@jBICc{px^}i z?^y6~l0B`7eB-=7$^K50{iK~OH(8x6x&Jb|UTy-pl&mr8a=Tbs%aEx!Wh2QEBo&|B z0YUJL%O~rZs95B5u!wY7+eKa#UFPl{xIG`-urS@a+}uj zjXUj9vWN=#oqLrX4}x2~VOO@CE8CVXP0s_v^#cb31WajNZBH@I!dt}6RE&lQ@cV#6 zmh;tWMt_$r{tC+fA>O^#lTKBz1t&K9zh|Mk3sp)`={VT)n>EZ}5T}ItL~iuc(c&-b zgVO$Ucv;Q?77(NjYY6ic4enPk&OSD(>lD?X#v&8rUo>{NxDMq5`inRQ#rsGSl{ol( zV|c(np<>WQhc|JZk3aJ>mgz{6Duvk{O^GV<;u`#gXgv^}NWO-@@VJSUK1a^5r)$Ai zkn>-#)$9fvbNkL56ln?)ZTKS6LGBo88}is3`&@b7GtIloO}~}3blP8I>wW-H`h-qd zF0&204$M|2OH8@(I=def^tuK>hhnwX*8`O5S&VfPSD?u~X8QEAYE6BzG} zAInO$`61aZ2kTRRw7{-yATEghe9ibKC;rpa`;W~|*@IFDr_M(y#DHIh@(BFi#;W^y zP%wqS?`0&~p^&ClH$WWr$*f_bKk*b)VFs>4$FDa8751%W)9&PxnQXUA@%BchDuhEL z^O!Eo8<=LQc?t;T?(0%C$r`tyfWGKBgj;}gk2Py}cl;CPDkdsO1H#E>x7z9H)RRTk zY8?`FDoxA2Z{hy3v3i-jbs$99yi9{4z=~Ftl zyGTB{*q+%`%)9gs`(w>mjyG5%3qG;2VzGpT+$A?ls6ee{`Z5U05p@w=w%-PX8NbZV z7mghHsoe^r{SC`7lKhjbe4!j`-F#}>+(-3JyGW}wW$N3}Hkcba2&9;)kPT}ct|Em% z5wM+@?i{?+&eX9$z@W``zBQ&}hjx=H^5brH1#x><6_;ZB*Q-|8qpGQVocIqCa2Jw+ zHuHGW)Y2#rdz(q=#!6Sg8A4l8T*09o8x?M65mQ$mC$8X-IgP7vzycNUZ2+AJEkSW1 z>WCgl=M+WvpD_0edH20`iS{hEGQ1axP>{-b({N_hYj$hrqQBU?JOwEHMtQn?@qD|3 ze&xvVnA34yNfTU7PT6XEi)P$`FN?*DsQctTgfEK)vL1p~`#EOTK4cHj4p}nwVVDzM zbVb+Xydqt0TxNSJ&S3Pn=`NtWoseI^rkzQ7fT9e@$jMdZx;*Pn)KF4vviq$cl)pc( ztPJW~Pj)6;VfPfyM{Din8X;w~U658;{XagqURC35>Os_j9#p7e^qTUguXbjdPi11{oxnkZZXtUCTp$XSCwy z`Z+F)_~)F?>zJlg4+2ayg(p*|?hO$~`~gKJrU>CIe z7ji_${m7u66jJ69g&@?E!kd`eiGV_>7B-xj8|-gI@M$DBnav8Fk2e0d;%vxM_9!{~ zLqNp^U*)!zE7NmKx&GqFg>ui6rBmdb=Sp(rl+<4fE-%h>ac8Z^iwj<~U-5V`u2;#u7u(tXDy*F`XH&F9zPbQwcr93Aca!$Z zcDivMUi{Z_UgX?2u)ux%8k)f<7BJu&p!|FAwc?7^Xk_@64irf`WeDd0!7l#ql%y_O>_G|rNJ2l#ab~<>|5G!b1_$N4 z9JF97IB2*0cq=$4yAcPSwGF!Xk%uvegMfk)n!~eoV4@dX9jS(r%F~g?gM+SjIp~K* zkcKgT9MYiUC(B`X;_&~Xm}BhLe}}y`4r!f(iWujpDS;PLij-tC4aOluDLRN6 z9+-I(*R+e+q^lE|Ead7$U?C67P|ng2euBHJxp1aV*$JiSN}fy=;bMHsc3q{&p!eYf zFuO#qx(f=xmR)vg&GX1^glM#4xH=IPwlD_)E}~sYatq0BdvN(70{S{nlfQ4UJ2=jJ zcC`pTg*>fES`%2Y&>6lPDs)qo_SJv0&vO89EBshqE$p8c0IU!L z4An;_e~Rn&1g;`uCD`p*r5JIHs4%OwaUPiM0j>quN*q(Fkuh08Rr=e}R)9dI9j$Ru z>Qh%cn(Cs|{nUC~=js?9P=n`HlX?6(;QPR*~b6PtM#gS3T7% z;&k}JK3OzSg*}4TJOY1>{{cQOLl#&Io)BP*TD1!hGaHHeK9tl-ln(7G>cF=znDGNM zdXD2!H?G4M){}71>Sm}E*Sh2?>JYH>#bd5OFv@a&!oi>42j$cXR{k=&*wm)L{_@Fg z?bFy4!WVfmb%qMzM8kwJp7&m=g5QnlyuMr9hdKs_l+f2oaP5lMfKG`T6ptW7)S@Id zyRX8D|Ae`ksdYzjosT~?L0j}XjLSNb=gJjd*?G`opa04(w7B4f7;zsmCg3W3SRVY! z&aP3ZqnY};N=4H`kspHeCAG)l8>Fe_GQ=e;mjvEG?Yez-c9p6T zKR5s%mm1Ad{5v}iVyvhF_Vd+ZnoH{m48%Z z%k?aOK&Ed&d20xooc>^SnQ&(jYHKrO>W^74{C2Od?uO3t!I)IyWD)Zxu!ZKIreB#Mku+eElLoNed3WiWC-zA*HFs zRsBEWgZX>9W)P)d`jtKqTY!}g7C*H&|GBEGm&_PPQVtD0D+*7k=Kx()#7diO4X%5BYpA$-3mCR^lC>}H<@n*%wo{uEIae4|2Y!ij9|bS?jS-u`1Y9@o#iIytk^$I2$?eaWR6+y- zPg3jjGyFyCIe|yr_zNqivV2{GN(sKtR^y|gQe-6iPAk>7U5t zvI}{67gNipy6qi5FbX0IJh>JprK3QJxDVwFDi?tAN7c1l&^(e|H3wxxPo(>N{nQbp z`3e)&Duum~ZfYd!QjtBHB-R^j4u*VN{@grLVo`92;ZGyOAZGq1D{>>bZt5te(%FmD zp-3I2%8p|yl|;4GyHF&<0DVdC+Dt{L#{#!=CbZBjTFJYaFA8bx(smqH+G8Fa&8&A#BO-XO584y zUmm$XDDEQ)=g3d0B33+hVD17~!>0s0m5PmWO225P>|Y((aPmmJ!=LeY;y*C|Cw#ra zJQJtm9Ux=y?a&9_V!m#yleL{9<)bDeQ3V@#<9lT>j18}-WT2^4tYPXesEYc@E=Aw5 z!EObvy$&biR3t#@SdVMhgdNanm=20ra%ZQA4M*RXog!V6X!;bVEJRL!IdWgs40+r9 z$VsyHyJ)iWUgyYeAqPGY35X_0bh&v{q>X%eW2BdJQP;@j%5Ib$7t&FA@0ds+IA;8$ zkyBwFTzI~nC+ByMbZMfE@Tne=eVVaHInnk8=?JTfa3DXjE;0}?E1j}kp}xB=QjCZd zkogqgOVAD8iOY7mmKjR2Ukod?bS3+dgQcj9)k?73W!;5fREl-kKZ2qZ>R54sCTj74 ztUDR3HC2v0R8=H4I*U$@{9Sj&c#gcjUn2$@c~oQ>)g3#>*C>&D`$ZNQ{qSwSix1uJ zcfT}khR2(cdN4x^KEjO8@zLUDq}!0;e-p`CY_Z)tNtlL`f@bg^pc26O9_#;$2iJ^b zv9=m{`L90cA#XYjKzX}db6TXV<^pE+-GhvcxWWR>F_N+% zJT^`;1}sdS$1PkaH)Ul#|~!28SghXS+Kp!K|8^rYtIIU4w1i~9T_OLEUAN!rR-bXlJku+aOYyk^4&`o zA#w7yauZQs5!1NXKwO04*2&D?C+98(Xmy4M{zmFE)c#-@*n(5SGN8f$(wO5~1~|TVmt)l!j^YMCX^Q9F;3qvu*B~B1ak8o3 zPfFK0UV)8Z6{pS`hzGcHc%-)qRu|oDWaZ;QRUm=rPMKXtGTJGslr%M%v5zb2`C%`Bs-)=l-!!62*GC?GoscwHa8wL8d<#X(h*B z3Yj<=>{KM5=j9wQ5#plp^WT)|<0Gxa!XF+zBFscZIhnxT*^9eB&%_$UvV<#qoQY;GUm?7tDH6CoA*GkEcf3Yi}ZA_KHZ6=QnK1fS53p@7zB;d(#7-l70W><6 zamB`sk*pGV@Vdx6<<*Z3Y~xm+8}au2%HSAttI+BJdAOb#9Nfm`p<;u#ksOzYD@d4z znmT3%2_p%4_#x{b<-wJQWJOONPCHH>s-cN6>9heC5wsu=y#N$)m@$p*dh+mEB@g8V zH$)=cS0ht&rNGO_pGiq7x=|d~kt}3xcRErY!Cz?dsS`2OVBxL!3ro5FhRA7FLejm6 z+TqKb@chWDTJU8MO_p@|PWJ^7?10cjNq6rpk->2xr+h3W&YoK%HGZQvpkcl%>1uBW zi|uHG9pUe|9W1t0?!6r>_7OHX28+FxkZAkmpkC1bx4u(t8Qjh75m&5DR$>jx{lSTl zhf1a$k_TCG{JYhb$W`DZ&XiLi<{$$ZA|P@p+_DT$tVO1DtQ*3Mv3EsA8^o7yPc(wxi?0L`qqH*3m`2J~#axLOiww948JOyhL(B+H zRScr;Jk~IS9dJsBI(~X>3JbWRjwW=^2tJpWN)v;)#A?o0msTg|lLH~ysDnYWEe2)e z;}ElcdpelnFINW}1{UH!VJdTDf(OY(jd*aZ{Q7RCgPF@Cr&XNK%)X4ET7s+ag>jNb z|1ihgZZ1b5;qk(myF9W@3(~l*HAQGDxRc<;p!3(25vsT zo3|&Vq@l+(EF~p-D=8^=EU7BPH~{0xR)}|}j%9Q^K|aoWIAX@-9rPbI#3A#Gq_N{UBlTU>tyOu3SjZd|%_eWb(it4O%a zbptQea1tCfk7eCWlfX%HR27{P5!6dK#X?Q4!vp+hi8xd)T94u6RJnRRhLg&F(t9Cl zbdu@oFkxZDt@cIolM#_pXUT@hv%-tPY?8GB0#UAiD`GepRNkYcVxIiELXOqsMGn+ZGDZE6+mDLL|a>&qfAd#IFLL_Aq1AbKsj- z+<>R{r4h^Eh98K+qyb`=8}KxT$z1_tx4Tw|ZE{0(Ip;N~apayMxY2=Q)w*2ye6=YT z%z^nizYGfdWLJDXCaFOp>`MW!5ks4Cx>gJ*Qj6B6bL+gbBMBwvS(V)L-9=8-9# z6~L*8g#^M?9)q!Bqyf9JUY2dk`j;cug&yUX#h<6Ve^QziYIworgk?xpQ07iw13N8o z+35%~enTC?Oj#fLZ0R?oI4bNe2elIkr zF`{6Mt|l{R#8*A0&rbpY?p(+dwqfB($4qoZZ2)Do;bD;qS}?9hy5Y`DHyAgANoyO> zdO-hL9e>6#xLxk~YosmK=t+77FgH+^yb?L73^q}&ek1|PVBztmbP)G85c?rv| zmh)eU{K>ik$)cZzV>XJVTS33%5o3o-jyR+NM*Qe5-R-XW8=_yNm2slQm5ROE_!Zj+AK< zOW<=OY_%1c0@NcrBlX&@h#c?^I>#Zo^EG%n+JDVn^A0)(7Dwp?fjtKa#+?|Yj*;o9 zS+LA(X{O7muVc~u9n3ifJN7OGv2xSv%`o)EFa&X1bwesJ_T?BP*Y%)G=I~@?_v{$N z!gGS_#)FUN-;1m?L_0advG0GE(d%Z zsck7yG+}WGKaJ7}i%a+{`RK=B?FG(TA4l%<2dSF;|H;Gz@_;k(v&hsYbMoHLBLn2^ ztEvmg%DK+hUqmp|ScTNL{tE1hS;B+b#g{qANx>$^mNz-vN~v-B8it>driIMu^&s=)pST%tB)6xXR@Lq$8kpE{rX(48m-OVEk)Q^p!P{GVz|PS+;gH%d_wx z1+=^@mXmwujF6k=oz%}M)1o@ttPDht=QUY&c{z8D1MEfRbAjk<4ejxIPy7d4iyFEJ zQyEV3`2}L*Y$fEh*u0!8$V)#lzwSb`0y{B%dtg7RtZ)}oS|`{K-_hr<;=vtUkJo%X zJuMV9xl9sR@qC`#NgQBBFHmtd5{;E;8Y60Ip|M!}yJb%^n%#9NvfYp|z@{&x;uci6 zy%=PEiCUuiO{BkqKQo0zJF%1e3NrklyxokJSwjuy+Y zprm3o&iBE_u?XgoPcxB>W^97&UFY)IB)KROEi(3C{L)`C!bc9d7RAV9ScFWW*hR83 z8ZE;7B4s2lcIHN-tpYAjY!8(E2|RZC-h_KM`$bWg|rMm~P~Z>QXs2 zl9erob%=gp&}4Vem7C{wjHWg$0u5DaBHlg}xpAblAZ-~Ky>Rk{rlMRGeqr=-Ei+6t z`v}?_zi&c&qcBxV{Ck6FC46Ip=#$;sjN-}El^s&o$8t+-kk=vA*v7^d9fw~pBT00? z0TZcsz&|k;qQLQrGCC zeykHSp=WfO@jRRud*sMZ5WtvR3szh?wFtXuw?-gKx2c^G*!6Wpmm_MUt-0&XgXLLr zd2Q6@)~U6KQ+!??WYYdx1l2wRR(x2BIwW62xWfo!9fr`gS9CUI{^20}4RvS)Blk6^ zv7jz$354NLV;d|tU(vZp9%`Lc=Ga$uM&#^SCr8)NTmyNUD|7lqQ{qtobvKk|>zzA$ z0}9#ySQ|CTZI*EpUNb_xys2#fBg(dVBm(hzlhWMHigkDO06MMWDjfA9$j~Ad`?vGi z1|TP{!f}LwwtK45`X{Wb>!+zE^bttxYkUFXglQs-_VU~pW5Fc+Crl36MNg_|W%vtm za3X3w_3eH6;i=K)+6BV-<<#g#FIvG37Wv;Z&Y-E$)=vI_XfGireVo~pNopepM&~%g z>!YLna?e2+<=VT!*89(dOk69wp9PsXhX$1X4LGQX{f%dVhx(tCZOUa0962)HdZ_O6 zz3s+ZFK9F;tu0J6v)p*=2NQGB5IvymG@L?$r419aWc#_3(i*%;X)v(BNJdGhX3C95Mb1;rsEm1j zkEtAQ#;21g-i3QtHKMG8;5J&VAxN)BqM=5&p5H_HKpGEBgW>`d72R-f7s=&Wm@80G zbf*&}AAg~tBzq9rFm7-}bDVoJQ=AdL{E7)aQMU&K;}Vl@b~4V7=4+mhRv8oj5H}V& zYes-`nkr3y85uo~Fov+BSiq7T*SD1#Ddfn>H%AR;;6>2_KWrCM#z4%jTnv^SAuC5h zFS9NNU(RWhYs&0pwnbj8p>G5>K9XQlTfFJcE6FcH>eEa;K;~T!+4~p8rE<;-n9x); z2f{Z#om-wYHriTlVwE9xq6()4$bMal%a$U%2{GbolG9;tV#$z8qWd*i4vA~F;!Rhv zOBfC*V)g2(D!80i*d-!K_L!a(l{+RxZ#3xh+OH6fySIA`O4Aq+&g07Ep#1;9hl=ZT ziYryDU2MQWp!Ba}wR5MkBp6h#>{_0a?6P1Vr1_`HdorrC8jj~ZHPX=aajfd`-XvT@ ziK8B`rY7hs)f$ztsZ7I=?eX4B6yd)UdCzotkEWEX@TYd1ahY$uPtKSW%@Ef*w@!*) z=2!D)v_A-d4gm1VCUe_sS47W}Ew8~siyuCnl_s}d)vht4eRE~ByC3R$`Uu1()m|N~ zF?<*@jFo%2anr)9qa$FRICyn*AV8*W22R;>(Tr%R*p~3@7R$XeFes>o+=O!$(ae~> zvZ@z6yZxb~dHbQXmvd)Ak#hq9u;TMhP{uq!Uah;&_$yAqtmt!w$5ZlO*PJLTt7BpR z+JTUqI5e6qFS#~4*cgZ||3BPpw;&Ok8w~@{+&Yrdg7@-!tH6?&39c_PG{p@u6WlGV zVH#1^I1cHc;1TJx^I5<(LDSgbx!Jn2e9QzVG{l|a?(I|~I!A~w!Hwt1)QObFRvcp9 zw##^ZJko_x(c`xMWHtN~=ABGTAYE&cF{FDOZ8QeD6c6dhh)LHwKg^3p++`B}@VEhN zSLn=|A05zS-h1=L=sB*!mWa=+y&rSMlb*{6Ip5zDJ>3sGFF-C!Vi|LIMQ)AOE7xzm zI~8T+F+?-fYFPRD4tGAv0VdP~)DVTqNhwQe0cH2kh50T2UDJYxg%fs-mB6|c?vS;I zE0Jj$ks~rVk#j5-6saY~DHH|T<-<43g)5BauqAtgiuEqy?QtimIIVAwexzX>A(osl zj)4F7L@V6x-kQk3Z;wdaj!B1t9Y`QsUqkS z0#|40%Xo;H;^-+s+vom2)O`nd71g@-UeoqY-yvn!Kp>C=5<-v!g0zG#H6S1eM*@PC zE{X~vpx9ACl!b~2Rs>W~j)O`G=s9w%U^$|Kg6&vPK{-~`|9#i&61jSxOML!w|9?ME zX69RMCNtl+*4LM6ZG5c;RrrS4Z4nC3FwesA1U{|?&3;!Ew-Rj|sNzUpF;(1W>=aeS zrOPfdyR(<7!3Ns5cJ?Bf-B|4#&@I>g=FaSyCnq0djXQnzglUr|%$nqyFl*}gspn4{ zk5Fs5XAUF*sNMo{{ax9;9N`r@x#0inO1Q1}J4(2n51oK𝔷sT$la#(G__4C;sAV zDt#ZFP~oT&F0#D7g9;#?T2sj`YSA^7+`U>z*X+yB9PYul*VSt3sNH50j=B>6c1`_O zjc7cg`aAp_Wz7?`ZuiPp)@S>R71vfq&6?7>sg<*wYcI5JU!s@j$U3EU%aR!zvb%Vd zxZ90Ql$x!Beb$CXtJxHijo*}wV4+5;cw=fd8)~+$`v1O)E&VA+#RiP|FDf=uDHuNULN?gFGA!7KkQ54MAiqWE$Hfj^K8o@f7tyx8w! zkBal%!f_1a0yUh2J~MEAf?n-j*=$#~zfBx{a`AKy(;q>f1WvFH`arMtrkt=VyG!~a zmMP>>inMX1-Oma& zJ@rMM=L~`hzmy8?3-oX>jB=(YAm4fu6BM~f2gj6}tdrexU-n-bsU=e=_VxbkD^6~L zN{p|9vVBsg$kMm*-H5`>2LCnX|7Bg-haWq-GPNnIH_KTDO+saQ1@EL-E#$K_~vO1QN->6jkx0nM#eOIe9S*6Rtl`9nNlFcPlDmT+}7_ z%;<14J9vyIc`^*52cRQ3nM$Sm+ng!uQLdtIU9Px~+ygAEiYmiA`FJ?dlghB=_)F-_ z+Fr_>Iwwo)A?>EW4#+nu6fU`-F6DdNbnptFV$*dMb$)Zr*h$0k|vOLjCO!I`x5 zPGuF#LmeyS+F!EAXyY~6Y+zzQmhLKY*HP21zmM;vM>!^X6oFM&Qrt0CDB%&z(>7G- z$JjoqCL_b6leN;vsK`T)*^_M^;$iGk^aU@^X)Mmm|H{U#S>!NSb?tfWMA2;Kr6W_K zD6Eie)g5#Hs05@Y#C}rHymL0;{iXB_AfLR-CLqG7jRlN z!5&+2Ne!F#quXBbg_>Q&j{TBx{0@apXiE|OdB+y`YqG{p5WYKgw-Q}kEgc7_87&~5 zZ5-(PV=eEAakeMr0Hrc>9w_s^`n*@0z%QWRX#rcW0H^FzQ zkT>;2wBVi!AJoV{mtSSKPV(I=;2Hcb zC~7IQTu5iHyh+B%D%v3wwJe28$zg|DYGoB|5Q^DGr*pq2-5Qe+fk9hEBhHP%L1M`cJOS;f?M0S@JHe~z*^iBQ|DD?!Au&T^WL z_@BDu+9u`6C5+d>6OeR(_tdR`3eMrlV_b_uC#gb2xu?nQKA*pgL=v%L90XqSCp@ds z*iobO1?-^}MO0Fu_cXz0<@G)vGIiNc_7f#g0Qcq(YW_sj&FQSpBJl$x^6- z#R28COwT5G)}7h0rMU{ay!#y_>lN`^`p#{LK`P~;3tw^ z#TX6TQm-JWCTA)IlRfhGw!YR#$oouNUykYKKdQm_q#RKH1M{y98hEDB=zn)d-?$T0 zic!DQf6HHP&1_<0_AS%Qdid?Fm3yx*&y&SneAQ56*LLv@m8*Ng89}A#P-ebkT|g5m zcfx%=JHi=3SxSKY=c<$m%W1nqUP-3xP(~CVRN4m|Q{OR_HNml<9GT>WVzC=sq*cPW zng`$$xTgzD&*9xcC&iMiNzZa@DO2RpZvFyoWd@T_4ixqe-F?!eL9(|m>U0H0MNvol zXlRKHPcQMx%s#$Nb@Um{0MZnyFC9N%GEPNkKc+&mrI?IA=2z9+`v@7>9v1jBnun;v zpCT!bxrNOJ79arjH&G~uw>dkOZCP5NQBeo}Vt=c^L+_JV%CkEm!CXL>uz zlgDsm^4Mg*G069%kk8Zy|ClrRZ`=Zh_|BJgo%{(h<$+*|Tp)9m4aT1^YwAVRRw9J` z!s_f+vfDTLgXHvG^n<=4Gfm!nfiFS6_frt2GjDb~dqcHvvnFepqq%yu51Br?ApCLh z>Asfc5ja0=lxtSQKYHKkzG`zdIE{K|x5>&8z6!0zCtu!%bTO+(0Nr!bI~m~Fn{P+! zBO`nUOgn4#`SP@SpPaVcmv3GN7Ne_de-Hdv|K_k5dk~2LI#@c=SD@|o$hJgvaT_T&)BXfgUlo z90-E#a@a7+mXikJ$gfrwB5_@WFF(L)hb`}nZV|Q|DchoK`5rt%j4l5Nt?|&m@Z>SL z=zvg^g4AOSM0Zn|i$ocESQ&s^*41cHXOWWTTW_Jb*3wZv&#KdVl2Ur18kEA#sLaKJ zyt7-$qfW4boAPgDNpZh|rl!N!dyGm{B#e={<9(M^oQKX4ZT|(h4}aoqG)_O86WppSu-@dT)uvuuU201lQ&y-8=32o zuWa#6lMC#U1bL@Xo-L33($2CMT;NL;pvug!z2QP%rnbBd+>4%_>SKPM^l6BD*jSp6 z9p)VpTs;jW*gvR9aQSp!p*A`wn}X70^>k3*WJP_l`avujGq!`6hhULe>d@bNQglNg zgQCA`d33rDL1i1-AOLNLuO*z!#T5w!<}1L&2n8;YOJ{%r4}$u;lLD8@rdK9Rv^UQ5 z`7LZdj3uU7I${}rrK?TEG|-Y*88}eZ*4?zt@RvAu#3&J{;|4n4uSIYlLDzyYX+*hI+Nu?gZHKK=5kud5p7X2awA)U&n#7kY;uOb&$ zt|Y-3CBlczM*)AL4SFQEW<~d6v?7rula&-bC|JBmu&o?(IhLwJ@~X>ybA;Fa`EuW* zx|^(##A(9no$Am4ruyj$R){E};Y74qPnoxlfe!%B7J8egG#t&b@N)v{B0EfD_$744?2 zh%7r7Vc9vuLHp+$EIVE0p=+`1td1-@OPporx%jektz38=kbWPQorXxi`g&g}19uKm>v_0Kvtu)`lLp?JPm+KQw&Cw#xLRFBe zTozpyqCC_R+`QJBj*@v6*TuQk4=4cw4+0S7p_1bmS5lEt4dZ{@z!V~GF!`qU30Iu|FO*1)qsBF&+uUv-|l;^(R^5!J25q5 zPtvRHCsz8F>+mWVyc$9Q-InF*)sR0IXOodaS~WN{uK}-g{7^fOe0`fQS1tx<4hp*9 zvO*L#4?#-Eb{MC{L5Fer4*mn!t(%NfjheV`+k?!#NS#(KtKPzhHC-`S<_=#jf;80B zJvKIVn_-A6)pA024-~5xA*Y|iK}m2>hP~%r-*L-fqdr;JfQ{O@KIE4l4NoY74|dgh z-;20w>IO`dl>T6s!<#2|lDmPyC6fQLmgpipX(%*$$A7h|eixcfU>p{I0 zspBuG26e1t&j{c2Gg?JNad(0yi|TX3;v#ZLO0GDUxw=cC>OQvufF4rUPA7-eK*A!C>snE zvXCrDM;O$~r+j`*B`<_gn&L|RD8C^OZp9i=nFWv68hP}>K!)^|wMBN#Z4lcR$l7fb z+t)gD*dM5#vmFa&t;03dzflCY?#T(6vUH@+YbGLR+mj9jKBIEBnPo5z406ct_~Znn z;zBbWq0n;2$JkKPmQ`aQj9;25-+c>`&+e?>tRWJN(`fs6z0XVT>1a*Iux$ODFY3iz zCaZ2M_ah%|sa!G@xwO0O%1UEu%^&21o!MD+9``N$W*)PiC&PUePr_1rdo#5@Ak9=# zg67UZo!*f}JthMeu*jqXF?5P8T9reFZoxJ*j%p6kMYe{ZV6GRRiC(&gecF=Va3OR4 z;Y+Hs*lQ}k!!2hc5fqwM^=uZ76B$35?xZn%{T zl#{vZBrR!O_V`|JG|s2K>RaUCJeegM%+h`x!a&NKKBj{I%bVbj{8(HN!pFts_?y1M z<@+pf^4)xfv%n16hXv-+K$J%^FT?`#t-~T+i=>^D%qL)hneL$X9;%;;WaV4FmfDhl z63M0UdRDQVv^&@mF$V|U0#9@Vi%J8Y$ie3k@Ax)GGn>fVLk-pw;36I$w72uA@M8&zI z7Xj&$*(IuIQfxhvN~qR`(q$RO863}J%t2wDX>)|%T4E)N1dY8;5@?=b%SCI^b2F~1 z@#h&tuoo?{^YE8&FT3<+E!@M05$L-X0RIvxU^^gjJn=$;{n!(_hUUnFNw`0|?#ES< zS^`dE$9r&##K-JCA3%t6(~t9{Jua0&chYCRs~a8Z@agBiA#(M*8HWAjVc%=C_}_R0 zsJA(j3ZdqU+hxd&3tM1rJqmNvY?=N*d4ZhA>qYR{?dWsDv{nN1Qsv&G;A3uel%J~^ zy|oV5cWczEk||>)y(-O(V8zF&Xh4L8scgk69x&O-9NP=*PsFEkpG^72R{#& zON8ZFfEE#!r;?4q@xbb<_C}AeJU6h|VRwfn2t|Ki*e27=@=J<)UXV6J>Yl*5{ zz-i|aRD8`!f>b1l9<1F1(ChFu$pC)+%{n)=#O-_u`ibo&oGc>%U~{Dy{Lu}xP) z5A$K7zfim=Qs?@aQ?7niF^z7UCE4pFKo?cI?U+?cw@ zndOZ%|8WCci^%lH%?j;rgJTGj&uT`BY}%<=wnR4CPfem~)TZlkQ?3Ll74YjB?!$zH zMHLNDbs?cxB${%0cpvx?V_VKZGyM=7McJ0+0QB7~`3>8W&4v!!GK7~AwnZjq`;(>D z=gS(eLP9($6wOpr6S3ja-gZKO1|7p9Oa{3J{)9&{>Q#qvt)_pjD-MG}{Pw&m7iar( zyqB`H??IG2hA|SKmQQB;!$I0B9R7l&nK+K%X>9Z=GlZTaPo0t7Oa5vlB-{7-{Q0{3 zC>k_wsy{XCuWK~MZpraam3y{;bq2DIwwpEcw}ocrXi>5p-NN5n%#e4r0B({8@J1xs zJfNj3VhUIc!1TscGUg@lH~6>1ZsbNZG8cMc8IUm#)7L;@CAM>zife_Hg%P#PF=Yxi zi?9|%bdlJeVQZ@bvlwcb|AL&i<`X&BFwbKgITbfu)*d_4Y-rV*dpnGmlZySd*cGCC zk=H-KQ2Ankirf(xsJN6bT{Dm43+bG^v?6|INU-!703(uzW|2(b=d;3ali2`bUoUT( zQ4*-LSl_%4s&sO~x=KHfRtqs8hTqSV$8bBRVzf}a^4Dl@eU3tx6~Hm7ouOH*)*`md zvlgQ5Tq<1SZOXsk(TF5oJ8=h2&g4q zjWLW>W+I>wu!^N~ zV&Hay^J1Wdo2E?Rh=U{=pF;3%+iK_cIw@C4H*4C2zCW299eMWEW&RZ>rv%D~`$tZ{ zcy@ai4yVY%-qWyrhE&T@&cqn7zPus%zX~V-{YT^NAhyjD27N#Ibk>2 zlqxf@sIfQg4ps~M{2u-r$ds$hr>TAX(S+e;$Z449lOGOGC}^$dT1nLHU+p3(l6;;P>&bqqOrv_IF(f>P&xhrph4lsd&w z>Quy(Iv)8wnrV~LLQAbp3y@caD>n_yJwbF47s_Dj#i?PKddbq!pH=XSd zcDa;gPn%14Tae8Hf?FeCglx8%RLQ6%=}Qb`Za4D*Cw(M8INRSk?e8ekI=ZQzaiwB^ zh0rAbse_dC-FYhpQ$$4C68 z+icX6rElUd{R)D;2&P{XyYzBe5dG8?fT!{%YWA^7{tcGWjg}U%NFc3}L_dXsmWaW&1hMvwo80 zP^I5qILDut5T(j(3r?U)nLNu|tSx~1`GG*TUAoX;FA`q@IteoW-6DZYhVd!CqOi`z zM+Rx^AjWFuNEE76%rSm`$nAN>Zk?mOH-V~7^1Z@r3lYg zsZ}kh=UeyTy4IqhdY-i$jpthAia>CjEucE3vIq;I zeC0}ipzB2}TWKyt83}GK!Mh@$mbe+k-~p+gPz1*%5PRt#kg?ndM^-MO0YKvpdliqJHb8#IfJDhi zL7S$qBBl7{6<7KDdY{JsBTnaYPPS0`u)Xgp{~ot{Fp4$TohQx3mB=@*4OGgrZ}uOO z4?gwZtapFB6m7UZ&|Fq_3A`;2zLRJ!y9Ss(Y^lFT13GwU9QG1ci&gH&{v>hXV-PWHv;kw#s>y{KxynYjyi@4@IKH)B zG?8sI_Z0Nd-(X3P*=h{)AWnKAi>o+uW7IPV3}EpXDwjY@>>ME?odO07fJ&|+k{Qj< zz)@unG>XsX<*gXrXgime++fJ4xDl5aw_ZK1=K)k>h5K0*8noE~qAenB0BnIem&!F) zXVEY)-`b8&wN{o!g44B@q_{d%fZ`Z*f+fxc$o(a{MGb&A$#2*C^SgB8z?)23;7EL1 z2tF18wZs+#A2%oAq=@f5+y+eI1%Q*@kY_yPZ=Kp6<73rS~e?(@NziH(!vCX61<4ur&6r*=QR5Tw-qD!6yKrL`#u|u zB*@<01G3vXf4GFoXEB=p$YNZ1Q`l$>LE3<@s{+6?36jC^u9w%W^Y?G|9S8nP8S1j| zZ+O=eJZm(-4g~wiFF7z>^~K~tIF7?}dGCyYmlJG;mf{@N-b=91u2}ECNOT&3JBdZg zZF#@jNAmw&hS&x}e5Q~) zuMcF=)6ygFPRTXpo{#)t+3hJDzP+(gc_23>XJ*NF_7!^Nbx--5nlpM&m_0$}_RY(- zE1&jH(N&m;y>+{Pv}S(TjC;E5U09qUE1!m&Z`Ylek><%8clw7S4|w{!1<1?s1#&$b zyP$9k%eK4xMM7IPY-5I8uocbg&w^~a`Q3s{c@VA4hcd|;9}1fpau2HESd`v3)0vgb z5il-Q%S|iuTFPPXVb}$js*pzklTU&94(cM)(!8ef<-wr>IpGaYd{WwNAAi>WNs2&P zZZgt8zuI6@N?-2v8>Qu?*qUygUVw+5`Eb6^p7EN0wN`gM(Q+U@_A309;;-Qk3ve62 zaaBEx1)QqLPh%;kCzx?HkWw$=B!c;gY6fF1OQO4TrlJIs2XkK;RUB)~6>REpI98+1 zO>|cKxERd`p~g6kgF4%CK8t~jiaBg=xL@W#!b9y1CY)A;48zX{@fhSVQ<#3v zM^&Ar;W*#o5?gDL@tTAY%K;6 zq(q!n%Ep7qvr|4wyGNeC&;K{^nBDFz|62*}WvGqt2$d%%+|r+I+0_MJd(nsfj=x8z z(;G{o13vb5le?;eqwT-^%deZFOinlqeQ9zoo!FM{^ye-A0tB~M?p%Sj85CGyt}Ima zBmH@D^%v0ROT`T!iQI(S(L|BoxlQ2Lr}zP_L$(~U!k-TUtNIe!piim-$ujwlFamE# zcE{w>Syq8rh&_QP&D@HUPB}`8%Bw_fu*Z)J+3IJ1ekpYnx{^gf z6ttnD?{qdnRH15V^l%`mMv{VhT?Do0a|B$0s;-Pm0WPr6Q~{Nn%E{V;Ef%taUXn zw+MN$7I?Xlp|EyOJ@ABv_<2(OzpsoGJ1d1#Pac8fVZuG z&o>&?1=1@6Xi$p^e0b&E>rqJtF-iOQbt5ihhO%tyB^;nZVi2YDL&qWPuM)lai88tx z&IzcFWZQaN7AFUS?N)KjO;J6A+O*hsEUIVl@M9Z~o6qx^F%6m><;BT?cA*_879BY0 zh+)tQ;pF7&9iH^C+>spk6G$R`X@QL=r4o~e7IgYhuJHy2%8Xn5P3(E;fv!4SVV}$d zl2pp}S%IOj9fIf=X9aQ_;7N^xC;7mWM;hP>lGqbZ`u_$`5Vf=krTTeMB)Qu`lKl>n z94C_W5%ws5V3dfW%HIP2EvhsR21@15ud{qr%0EeXI3r+UP#EzQucH&gegJxaCDEwo z2y#5nG9ZUsxGOVo>TF_yqr6f`;pC+^lqaEs2}A_?>|jA%r@A^hKAw=rgHc3y+Pq4A zYL|luTO*+6xepzTZE-~CA^U`Y2pdr>D%b~zK*>jRR>1J2`{d1`KZ6MNzj6W#h0M6F zQGq_^HVX_==pca(E$wr214!fdzk(C_1r2cGw!+`y1lcuM+C->hp?$P4aIcnF#20!m z-e-r{%M=wtQ}o&+7v6u=p3-hne%bqS3^%eW0L7m&*$($-m6bHRjd!F8?m z3XbzEN-}dT>h!^cQP~Kki?YFG^V-?f)MLM)(*Al!o1}5Vwm7J2OX6*!mjF51^mk4rbF^shb30B5HN=&J%>Bvljaxl z<+g#o#qY7vSk9R@m}qoU4EzjW$_0_S5~y@iQ)OjIpir}feL+cJO@dolXCR!M?2=n- zFX|j9`_mSNp#9~kf$2h)_G50s1Hn8yt6Lz+z@*r`Dgbvn2u}4%(hibU zTiz3wpU8BwWYs+bnOGesJW-g36o-mSTir9@H6KiOxwgqe2`HWDWu9$xp8!$P`qrvH9BxZ zf_puhY9~pQ_NKD~51$-8%0pFcGj97wAW5cn2_)L{CWFz4QDTxxz%4)C24&^N=LQN4 zIBwr{VPL3sq^bP!!oVf)(w;m8ptneFpOla-Uz`%C&~l4p>SO@nsh~>O4yFe3w9+DZ z7R#ng1zEm>iF}(}$nq80@@2g=AI$a_JqoaGN*`e?KL=jk$!X#yUv08?>n?&Evilt>d(L zA^ZNwLsZt<1^{Ef%~OnDf~}iS7z6fe7i8fd9wvvDT|!6&P3L5t0qPBx=s@FgsA@VB}NwrLA53-tGZ zw^!Sq*4`P%-(^cb@*5pHV%O89o;Jvlba9@~K5}Q^pq@C8-|8*A(Z>|xdZ7g1tOw*8 zfs?*g{(N_!Y28!2<{TAs{^*H*`h0wvnDa+pR0D%&pbV=EC#g6F)5xXMrzGP0v5B>g z?*~_-i0{W$ERFhp4COe&qma6j$C%F14WkWi3mor{mT~8g@o4I@mY_wQ^$w2ntrmUkxucWJUlVAW@)(*xKi?k%Cbf{m)&zPDRP4@af>S?#|3nM^#5PQ` zX{9I?19-{XrFA7Zkl+G>KcTG{v>V_Wg0IW>)&z2zxq!B!ny-o)!}RCbXc$4FaQZ7U zbPpIoC6SDH0NqYQ_w*jJ-#uW=O625w0{!7v@(9|f7(;PZNAw&8p*{T+4x~Vv;L#XJ z<7@i2F>nsSP6WrZ@B0M1#y~$XFP%<2PVEqam>XT9hL5<2AbSC{PrEnJIm1nbq2?<5 zPpI0Z@;w2)R%q^N7f&5Nea=PlXbY|24_&|h(C}w>eL65&kJz#=w36+O+XK}a6k=j0 z_`>r_sHU5l(+ml$cj9JSD&=+o+B>onyzTBvnW_P(8IOcE)0G;1wb9P2?W>e$q1^1; z6ow*4e|`kz5ajn}w}j*4F04D7<)K}H0=au9gnEx23?p$u`)5GzJ@Q;GL~3*6&Vw>N zPy{7VYnQ9sQR3x38(87T9yd^%2Yl_zD{|w%Xuk9^ka9q;=vd+C&$rrb4+Prj?m8fp z$QJUeRyn>pVbN>?;^~S~tUct$bhzchzrZNmN|li5`w8O4RSSD)?obfL1p zfp3bk3dU9EG#Q!=d{Y*)b;LI%Lq2^dP@eVzpLu-LH|1XW>!Con+fnor{oeztrDlQe z2%bjpHe97WPjJ9z0PAt({TPFaLDX{}CiuA={eGaR86ycqHTk;%m>#^J;6e-|IGf;m z@}BntBkP{T&BX{0y0*u+^iE-)k@Q#@O7M2pDsUY^>OI65)_zX#p%~cQ1Mra;cm~0l z9O_IqzJj1)L=|{|;1M<+n`>Y4LExMWcW1tW{~*D0fljhN{5~*RBwcj=xzi?3%02tM z3A1FE9|Jx9jOyO5{3*~^mz9SyuooKVfct*I9AJJ};DQ%Q`d7^}WU>g>AkucKfFtL# zavM(C>)lBGZA7;?;eXi8A^a5ZjjzfHhf4Ca_j2VUoC~U(yIdo{2lvQZ{(e(qxgKn( z-`6~1#(xKO5t^STkDiuOU~a&j9h#S*`Q7$@BUqUoA$-{}6pXuc&OB1+*D5;7S84-o z?4_Y#lIDJz->5>!9_gTUkNaDEP*57R6fRoU35~=$Dk-;%g^JbW6K}LOUIT^ zpOc6!{~=x~TfY7U9@OZ3H=oFGpUso-kmcD|hUZDzii3Jp+uSyc|6y@#U#+B4Zp zW6h1_!2)d_yu!bO_vmri{v2w0~BG>y<>vA?OQtq=Ox0Y z8;g7_pkdjj*L_9>eRWho1AR;Fl|6&!iA1G>ps5=fTp~L?(KHPzY0b~6nVoRbnVuo0 z|CtG-(a&c|baCf80`eNqiUsT)O{#J|0gwB9oZ^f7a5f{gL{ve|c?Tz_(egSBt5>i+ z#-oJ=55h!BAkb!n4C4o$JjQOEln}~$TcgpzWmRFII*VGU`POiBs#U(F^Q>P{GS^y( zBdC>R3?Wo4?&MV?TVA-`e8$zXS)X85S55&&+$?SrjIZsqZo>>fqqEY!E+QN;izA4C zMxS7KOa;nBFE_>~`6es-cyEH7Sd!CO+ouUYPE0AU6I3Se7YM#Zus??%g}>By37)1* z++$N7lOOd77Uhn?e<}uZQGXCuDec%~2*Gy==0iEsH#kBpvajkJeB5&9qp;Bettr18 z6SU-IXEi-lelaBY%I~_Td^t3j`ll99*uG0l7`Ts)1VJSSUGN@Ty3HY|3T<99hn5bG zLevA=T-qU-zq|KaL4p;ANzV*@Ag`+;sIN3R9&;DVJnp$T z#p#ElZ$w?w2cKN0S|t`T^dx&AIiBh`#5hHrjVv^Y>rfq)%_vkwy|QV3tF<1&ah^2; zZRe`=U!a!10EpTv-jJ~V2D>t45mYvdaceGOT&kh6aX>9`AyBcQX`(r+qo#?@^7=`^ z@Hw>7h(2fGZWS0LS@}r!r2%9X!Az8kespQs0FWwFpnoEUC3l~CBT;<-!8DS%7${Mi zPw-XNsKB1i1TTj#e{ev_IV>H{!KoolyD$dQNhEDX45TYu+Qs&w$-z5x_aPK(uH`3b zYhX0PO&0{QrQnLfvc^O+91OI}lA$TVJB%5_Kl2?N6Ru zJTq7=ODDk}^x(|kAZRz+&H_`pTGq}A7KxA4UP$%%VXhx9%>p(r1KWLt+`9p*OI9RJ zWH{u-_D6>{lwtec?50S(dJhyqGcH1`{Hf zv-;Cirzh~$_c(_w4U=&)I-RJss!LS~bEORVqFu8(+L$6H|FhZ1(e+R@sXK8#^!(AI zx}KH*@DLq%@)$!nAo98JPS`pXg^Dz&ma+N+a#=NKQD<4Wp060*T8n0fc@~-3xz;xV zF+ZSUhl0lLX^2KlkEpa4MiCL@grk5RRye zgp#l-Vv3??F)DxJ7L1X+N_MD)*ibIdstx9JQp|b}4&%KSwW5+d93LtDR6LTX+Qfdt zy=sZ+$vT=)y({HowZWd*!1)at{Vu)txX z*_%PhKgTFpn*k@tS&#vl-QYEcl&^Hwwn~t)dCcpAnAv`CC{MezshoCEFdzP740SLs zOpnlU9@Ilz+q4RwojN<%UD*4V1}oiBg6??xi3HuD9GN#3KG>qrUV3|Qph!H1S1qX6 zuZppW6mLLOAEO3qo62_C3=LvzA|3hkPOOcxiD#jQ-kxouI-t+lMj02QiRzWP!s8x` zR`C^&6suEei*Sq|QNt5q8An3y9vRB6qo9Y!;S>O>ZbQg0+Vl1v<6IQRX}mokmjyl? zG)~Lsd}|htwHBAEdDc1{=UQ*z!9d~?K$OG}q63)42XJy@>wJU=; zUEV=Q7GsGU*Z9Q1R zQa|;m%o(zrgtC8quuzVhUzQBlmQF}-&$8kTC=2gE@ZYtwf??C00MQf%Z>)O|&YE{6AehIdEa(^qpUQ_Bu-%@`F_z{1(DYoYG(wfRI2d-fVrFm zK}d&z5c*+WN0~%^RV;>iXyybHMVUn9Efq_fOvPKAWF~PKu3*0xS59O38Mr02I3SPj zcmt17jMi}`@g3B;tOOjROyae;j;2mth_-XB2hb5zk_I5kB<@vA;+SzPiZh8^5E?Lv zSEFA;CXuUaj7cO#AYsVYxIKTwTmGD2@Dko^XicH~y1m|Hm zCx)C0p%XN&V#p~gri_=JpA1HV#`}>mT*cBk98rPW3C@dw7H;AMjVo4@3^jtr?|Cwa zpz$x!s&PT%Ep`Ou$*nZM7c_1oXneN;UT$U={~S^8#EI`wapKVaH%C$?@il|Q;bR{Q z5pM~)a6-i8xEtF!$vxyEUNMORTvLv+X>KtR^1ps#yGRbFVkbg;93#Zvu@D=s_`nBV zX@KkG1Le;dsCoFs&%JFzR zdGZ)ddHRE}@V}$ZWl@xf63G-?*D@X`9u`jjRZz*bcy6c(6}xz+3JY&Hl|^wDk?d}R zu<+Z^uVGmD)3Wue!SXaZCu<)nB_d*43+2>TgQt2^QP?mrT-vV&b4u1=g#Qu&&P8h) zD!iLn8;=0L$<|&A{%=HppZ|7nSECb;9319f*uYp0&#bQ_(cabX1&cLVt+rl26r7F4 z6|vq0GWa&F2q9M zgnL6+I*K-WP1JZUopA5cNVsaOJq{qu@|x?^EWt4yTmGt#1u- zOeuNl_X5GY%UccyZ#b6`4gq|*6MrD95>x?iA3<$&A)(K6%qpk2EzXiLt6TmT8Z-SS=Nd;REWAG%I1Ph)x7ycy z6@2(V9~CZVjp#JezWV#%f|Fa88VEqVwz7Ay_ewX&huSv1IT@iK}-_$jfBcD$SeO^aqpPa*qKTuo{*aGBVf?81A+i0kN z#OtVAGCdK&x+&SjP=+qa!GbIuP(`YthR6osi8I1On~y zSr&J~>P|53ghinS%o-&?rK!;5n<=5zUQRaR)E`kXX=Fu36@l?6PFp1>r-s^yOYJ48A?&!t1-?-dhka*8=>A6Q+InP#&ToLM-LgX+ z47HsFf?kFV4CToc!BDli8tR5U^3Y7E-MpcYvt5NOofT{;YXBlx8cMeUxiJ(n#IG@V z9V$7cd0U0$WV9n{eCwpFqNo9n;bGLNt&meMf<_vC9NfC%^Qgux58Ry6xox4&t%tBj zHw_&$B7(ZFL&x7=H1_Uk=hr*HyffpRBJ4=GvMgIZlNUOa_z=GU6`!4BVmtGg0<9jz zYu918iYw&OQ4w*fAHi~GLnFN%ucHb%rARZ}AMl&S@)j(@_;Ey@14yUdI-;Hnaaf1n zdcKauis6EF=T!iBkWYDv`PVCjxyPW0s?eKsXMKq#E^9oFbr!f+p!c1)uC*S+ah^r5 zp}AJX=XW#!p!e%&KR?u0TxoC24}GSq zZ3!BM=rXZ5^u|d^)xY&9+)h{7%jL~k9*;f0UFd4voR{Hped3^bafeVf9M6$q%BLjj zYdR1P0`yxsdP#IHIfK0!cN8~s&&x*y12qw zZd`&4{UgGmmSDb=h(Q4xZc-D{vkJ^QSRfto8nJBLlSmA*A1)8w99KDa4aI#H4xMfI zjPlO#QBs>kV5UCKJjXEgB!}E}FXP=~GA7cf9UfwnaS}_Y?2IX-$o>Eme_)x%d>-|f zm(Rp0j?RPGi40Ff^|Xd?G_2?$_K2l4E+J&pMRy{iCMqsYA3&wcD#tO({7_zxGC%Zt zovSRDn4&4*M8)adcr+-Th{LfMktdxPkuo-m#VRFIJqA6~RrzSDdrf}T9pAAlI*ImPR4F`eDuX>jIThQ`MwGLsI5UNQ0v&lxCMb0m3p-tf zdthQ;fqp^-K21V#+I~5`2PXE7_8mP!({-i+ZREs$S?|ybjTQ(nu?OV1zM)ZScDIoY zD&2r+Ja}Mej(IJnb8Onc>3lUd86Y?i)6ji;h1)#qv=P?)Xb)7cq!E<`Cq7VlZ#D z5n#$ocJEQ4Volp49!xJU5P#_4d159rwL9l~V?uT#X5JZNLp|)a<3bD@)2e^1MM|udJL9st_N_O@j~tv}8gkQ@pMaaLWYD zlE1qSn}7 zaWKQYSz9?ByKa8v_=Y0Ddt#`-O!ksRaRR*04(-jI63hLQXct}J*-E^J|qZbGE7zIEra}%G((e#_6SnX)~Eko&UyjuIzA!y<0jka10 zkv$|)txQz`kv(4%EKgPZdY(r`p=&^7WWzUSg#7S6XgUKkL!#_EBh<=Erc7*N+jH?8 zDM#hp8KL6b4S)rLy!uIY4LM9aQ?ifkiouN;L-@j~OEE zV|J?NgWo}r+GPiP3ZOTS;7;}xfpPv~zy@~dnDbwC>J?(!?DQcUa#aD&CHBQO} z#9>l?y(OF^&%Gg3DPLU{&XohhMo0lEtAtI%s9WlF%H8?r$v#4b?8~BIi%Y z%$Ai)K`YnF%a(?U#80w)R}ZKu=z-&OFWGb=>JKgjq0DRHat)C)yLs}o=Ud4~CMV=W z1yprQs6ac|OKxYg1-F2R2iVwm&M zQm1l3i*AYNCV*%Mb#hnZ6z553HP@++iDjxkm(7G{K2IK_Jx_*_jzIxY*`H%lYlvXe zJ5XjBYjH$2qL6tM7oHbo^G8BC>5?s)nVZ=w&*L)p%At>hPVqj6V(}nLtMHdpESEkK zD#nbo9ev=exc`yRTJKu6d7Kj7H$cXeFYQ|&4c%*sX3pk18$W3C!v7eVqSJ1MJZOh3 zd&d)@Qqc&sLJlrNzO*HD1~m1dS-Lzp7aMwPkO(W! za!C<n&V=q|F8XD$x zxaJP#Q8WLAM%bVBby@v9roUoB%AZ0v+`G^i`_W#;GLO4AP7yRi9j9&Ni$PH)rdXFY zk+r!!c}c~WqdC{;#TMI+mgtH{SjrO;*YIQ*K|Y1YXn}@shsCRdgX{w+Garygo(~1_ z3X)z3ULyy*2%KIc&wDX+ zdg@OYTnzXY6=E3jJpKb!T@3agq^8R;-UL<+W^a;+mya*NoH;3JycB!IQ0m&x!Ik%F z+5Dx@>)s1EXe|e*qu;{6r1^5_4X0FjGfaU$ElNLoIkeX)J;=5bvE+OIWxw!B=yH$y z9sbjB?sj&_y|ZcO|1oKu^!9}k>`#VV`B5mz9{)C}{bUkQ#in;lj@uuaXm>pj`b@~x zuXw_C@Ap7^=7(XI3#<@xO>H<7s)0H^<^9l5Iip_=b}w8J&XgOjH@tGu`%3bB_c3^`z; zj-wkVeP+DbffmSX#$Xvt`i$dTfrmQHA;}G0!tkc(9hhjBeH7Y|EPBdAM?*1>T1j3= zetJ9XU5g~r7WnKbUt_^a+)k{x3EyZ)Y~oJ=0_a63k8$fy0ZYK}yvI+ex!(q)cVT^$ zTUTy~3rB>JKg!Ft6LB9M;RRT3 zX7iSYdlt&Ec3j7k$Dq<0YezZjJchudo3s-}_8)p~7x&PoyqB(jQX! zM!Ars$-quo(=%X*-YP8Q@cY2rdbyW%3gPR3@Q9Ej!asN-!gEib1_-}f&fFPAc;rPT z!rvK3_}&h}&;C7xpPd?BnItzXY#NZQgW)*81DyBiW#vw^2u0MOygL}qX}$=bK%9lI za~i(Li9g7z1@b^J?Ds0)RLxBXPbkIT7SarbyAIlmez8md)WIk*^F@>b0Ts#{1_e7n z)M~4ppTNmHh9b97kE4g2Oaj^`B+45@;kFqJH#Tz3S5cQJsH?;RUDdWQJ83X=*|{iA zPLyAU!l#L6>Q`=w;=3Y{$W1S z$rprMniqqzUUQh58dN|vH?tsI088lJB#gL`MZ2*X6N(PY_5x|4@??5pxIp_pMb58p zU0_cr48Ny4NHeDR1f(&_Dv;vEdsY^d(^PDH*#qzDjpA^##CP#E1k{nPX==Wd8gjD!g2NoYztr4eU< ztan+TWd4HYiQ)>`r6k;{9Y+*{$V_#|UowXfgE^qmgzyGp2tlO@`9;W^OTw)+59Huc zp;B3M6PVCuYg+F>#*uJ0x#Nt`Chhq@M*|D`hb{T>?p8hI!c)RmHbQgqZijGR`<}A! z9XfNE)gaeO%|M`anY^(gj7Xbw#WGNP67G!RTjhj7VQd=J87O@pRVM`|Q(3(n!)};Y zpgAcpj{&!TYJl5cIk;UTt0v+Wxjnn2%ZJ;Rx#ily;at$rn)9*?#B&P0p{=H-MC`Y# zhJ-H`_PVa&r!)u4YkQo4<#P9BnZ@$^N8mc+P0z82BLFa%tDwNM$3 zy0AXNC(`m+5=HW(XbQ|;g$iJ{(oU4JUYTH^MLCr~S9Xgc`LFEZF{z;gl8?YCj^zE= z@Le`=ko>~FY~^6N!ePf6vyr7yBqwK~kovQ>IWjHvHECtwr zt$d_BSHdj>Ghzr$sSs>{gWsNnmISjRn;s;)uwnzwj^Oi?)a+%*Athmtyu2!$Si+&j zz!+vL33CvK8jrtZ-pN7q6#!FO%Ezk0Z8Ufg|5wER=by#tjYBb4J^WbFsq)4?;n9s? z40iMlO9`AFE<0U`-RHgK;cRoX{-}fD ziyRDpmKdI9IJkZO@CLZO_p3a=(f*W*hyd!6$n@;9_YV(Oi^MEog&-C$jG(v2%?}+> z_Zd_>=%JqYNMHl}0KjQ-O;`CA^wwipp_yIP$-SBt1IR5$14ffEx}hRVqXDC@u?>A- zV*#U7wHUil%z)8O7|(Fz*cL3$L;=is?37#0%N4v-0i#A2Ubdaf()RM#5#gpCmZ1b} z#sUlv9{4C~0DXsNFu^5JY$c|fFQHW=uG5?&t4D@|1Gp%e?ifFO83r&t=BemORiJWJ zNr-?R&z-DIj5LO1OM??6+e)-fxJ+&y8J?njC1i_H;VLmqP8t>NBu2=Uqr$Dc*Px@Q z=tbF%EQ=Y@9*C;YQ} zNhqwCxw#jFKX*bv7hM=0q``ZC?^G;I)h%gQN|*i&Su-tMp&cxe?{0%Tas9M#p?0K5 zmTU*$ogOyC4{?=}<|>x+QDI(@NiVadJ6h+70w+bX(j={ro2G-m@)XOaJ3{&ThyF;o zcL+&;9TgHJgJDdVe59$%vJl$hN*5Y7A?YyI4PhpAqCkivAkqnj%nM%04;&%J8a^PdVgZjzL$56cwYRz&e62 zvUWJN{Tm3rY7bZxE=&?*{){4a`O2_m|F|Sv)JXl$NE@2{d_(&rEW57{W>fuIL*ZgY zcqnYINRu}dW>=)hD-wT+(*|N@pyVkq*F)Sr#UYIY6n6{E>X?wLRIHWM>J(tjqwv`-=y|*N8;QmrxwKTs;+K z3IE0g)h-xjTCy&DOIGTYL9%jAfFY{8s z6L)dQjzsvyQmzko7sCGM`tbB5Iq{l6r^bom>C2XkHRM0GguibDvj%&VwQP8sfY#v@ zxv`@^Q&t{q)k?yM;FDi=?Zic(P!0d~)8Sb%<*86hIi#kQB`bHe@XFkx5>wWgg>HG{ zC*jNG9&cvY&fOO7ubG=e%4-mUvhZoH z4AMmp_KeUX=t6$?TDVzP8e5I&G4!t>IODhIKQoU0BuZme1p9}`;jd$wk7GY+D2Xa0 z2m84~CQ)fYLs7(|Z-j48`I8jkmalvme!FoLktCn!=tn}<2q|=ttG8mW z*xYpmhP?h?;lKSM9oV3QUo{BfH+~Mp4$A|dhv#5BiIIoHL$!G&PCCY|hrur`E^*Q^ zLj9Qu%%_@PTUp|yV^nI-<5@&~rS{b1(nq-uMNH2>8~o5>mCl@c{^gwwWW+ir0lVi= z)9;d1OOX(#6O2%frr-3y>k&Io+}^sSk?V4ebu7HczYLe9In>ermj={Pbxlz~Z;x0= zIy}e?BQup~pDK6#5)PjBF+QRw!GT=Ji9Zkt1q_`_bxiU9JP-mz@(e0KB!xT~=Ep)V zOwZ{$me>+ggc3QFB6J_Scnq&uYv1uu4wM}34 z=-6cW)3M~P@{7qiUFE9moWb&DBj-Z-?v6I^$r*c!OgYZVxvr6_P#dbyuENgsyHS6kv zI;YM#bqaa!_Y?Y3+?ga)CrlnvWum zE4iJKAcE5TUD<(_f@Yw-mOy%$SP^kID;k&ns;8IXE2gq9Q$SOjNo8NAdfEifPd$%~rGUPeaH?1o zbq{vUX6fA&+t0Feo;VhDkMO;TYg2{o2Z5blMR-VNcfX8S5$6}Uy&0WZ{DCZfgT*#+ zCyHxn7f}w&;&KOyFXkgm+?RMzWBnN7pNKz{?Pn5S&-Nz1miR0qsnFdeOS#S16b+w& z|1(|O)8CzLywSxyNfBGBF?^p{1}y{Dla{IoOmP=$GlpJ#t~l7L#VqmQ7F&k#RuA`b z6*-e<_IA(GXTvA%6V+`3O_%j?SE|c9n!#Oz3D$KKuQ1YURUeGZOH5U`qfK|ITRNH{ zUUx7_^F2_b$Cx*F;IdG8=y-Qu<&Zg8D=!*PZ9ZfA zaSGQAcZ&GsgcIqaCb{1g7vE)*TO!JEtYlF-#l87V$8Jdf1{I=r^@Z+1NRWU0Lia3~ z4raQ!eb`h8bVrIiF5d}VNSY%asey3zO#>CZD!oE|rhzQ5$cyo`GjOf{1p@vn(>1gl zSgcEN=ZXei?dH`dY>&jrZ10+mQlArY?HiM9O3f(R84&PwF#&&(`v$9UmHBeTriY%k6K>G$fbM(y=(&3dK@Utk_+F6v&(2`5jO zdeONT4n6FN zxiy%=s=q**GS`GmCt{SUIk!1BIoqX=fuUuRIx?e3i!2x{B>JT?T)U-Mgpv#=S{Rqn|*@#IL;&Z=#QQ@1DH8o>GQ$)l6c=ei|1f{l=o?$^Q39X z;@7qALPZsG54y|6n04+{^|(be9CWu8tJb;G6t{SAojbQAhu^->5%kateiZ^DR$$ontvcXv@-Mym(h2nIY~%wO*gvzTi(m$6M< zpT*GX5Vg;OU_F?hBiP#T29-%-HA*nPZ(bh3ng=#=iQ_B^3FXd66d|6~&w&F9g5te> z*s*rDvG_UncTMpmxvstnIr$ntaWgMe;;17>Z(Y$AcD?GJxdp~A@3>cJ<+M|c#w+~o z2SWQZ(wpM&qlNWa9tyjm6@>N>@yY>rZv7jmw_eGLc#vLq01$X{-srHu57am)-^PYC zC&y@>gJ_KAX|zw!JXKIURa&_m+7$MvX<0luwD(Y_r{fx)NNj3x&|RZ`tB8jWx~pCE z7N|RHBydEBe5(rWkUIb&A3cQOT)HrNvX1&|%KJDdy-2d(quL>FG>@KS0HpbK`d0M?r;Vp}sjEtDKo)^#uqx{Hk39MAhj zh>R)g?umQ)VtPh-6=KD!vvLX$q9u1N-`3sZx7A1SK1fNw{ead#L=~uRDQZFBv{+(H z-v(q&VNn<9^V8%CNpq*Z>IvutL-Ye|v!89^DPOPS%?>;5RgKhd1sY<#3`c8mPuyvx zdSI%!)*Rw^%2zs}@kJis$)V8)0rG#}M6ctdlaFExBJ~Tz#(tiPQB-7SU)*)jMvOOsb+Q-Pp%F{#cC!k9~4L|0zM+=V`_duEXCF%7ka+WQtlHO zWxhP|>_Sg`EpWM5I3yn_wkoSC%q3|JhW{#0e{20s{Mk8F3jFfB@OSD5t&8-IRf%Q@c<((73I^He&kqp1cyq=qmj}IQByObh-|e z{tRlFOn5P24Qr_tr9Unnz24KIgiGp`A(Rc&id@VHYr<4K*)<^nR})Sao*O(1T|t%( zXHOv;N(;n;H+Z@z=NMn!;Ax>Mb40V7JYk%=ny2$_^7w&nFww@FJQpkN4FAoZ+;n?a zbfj7$|7|I;=Pgg6(dDn69QA*lI{Zc{%19)Bv|MuWxz#n3rij#>eezJcGpU23V^z|L(a|pIuBB zMeQ$vref9KJ(cRNO7Y5)qR6uQz;JI>iWc{ITEybR7afkc)ZF%B`W;0PeIBBeriwk^ zM}o?yVsT$3XIVxT^Bf<)4}!zjUZgE8if{|xwGcb+`;aW!oW-sai&^r0gu6@0wVJ2V4OiTf6izaBS@orAch<(i&dI!ybFEb92utggJ8M1A-o#%HFkMsMEWPh6Yb7 zB}E)-@N`puw1{0Ng57#c<%*gg#&6uikFp#@pW;KA(jyH=@>+_OuxFgtQrZ&sV(lW< zZWT{#_e^%>q6cLVOAUwsr(3k$;Rz{uV#E$lRY`YN4rPFd4s)NgPXhKP9FTw)6Alp# zJ3JGW9Y*+R&lnXm$g7|66ymhu8E{^ec-=(5n5XEo7&VHGi=Opd>#{Q&jA{x0ms!pL z%jNxUZhLI04>^2p*zdU^Ht8sS&y%m}nFSbJg#VY8K{4ZirvMX#I}dnfiA|Ln80ny= z1_k2}LhWiRHXnrA)j}-hHj6ujatQQ(BaDaV$c-1(gFbO|0d`p&CT8XqafSbCG_bCU z848s*#c|%S0u0g>rpTP2z8@oSh2#~nsB^AIc&<*GAo7)xK5G{o_GBxq#lj!|2j{fG zM4MhjRr8CDqD8Ke_LFD6mRvzXpk{PU%qp+gs5nCjqVEOTSOD|^8FU!P%Iz)^+E@^G zTF0<9u8rAQ?T}Lh$T+fMqY75X`zcal8rV6!jBj>|@rF;_p_-eWma-pB`66vEVfZ-QE%f8Kl5!|&@<1*tQB)@Ix6SbF2OYtSx~c!C$cEUmxYaT6N+MqEEF=i zGBlCsaW*I(!9FNUrVmpYmW(4=$4owZ7Wrfip_{d5vzF$l z0kt16moGWp-Z~gsr@6hH!9T&%I+5z}7Ab$16L|_DEUq2n@kaH_n_DdZG-Xh$gbdPG z!RKBhHg7EoVqWwM+Hs@$Hylwt=!=V?q@5uMJ^YS2VtYT`t7IB~^?Flsl>1G~RYQgM zH`dgO(((#vxiZ}CysxVDw45qG;y2!kAG{C#PW?d1TYxIi_=PxGci=Zq%;yK9AsCF| zNY+)Xh%dvt06kjy`VuqzzI<0OyP^UNb~ElsFjyD+dUo&$%gjuZ2Y6|kwP<8bO!0^F zd5Ys5l!3c0W|zo6ARcJ%ZRREM)!Po?IA8MEJh|=MTpP`7b8Ih(588W6l@6lgJa4(^ z+rgWPF|D50H+S%+DFeja9lZG^{1KI|WH@q9Y8%4p`*3+DA(c|48*4ux{HOS^gSS{Y zCYp5gjwtya4^{?Ja&a9++Aj$>g;2%8tX)EA7k75_4s%_{Mz!p4j18qXiC;Q;ySn=F zF=z3q*$_u*+l>L8ynR*W3L(09!#F)*o<8W}Ed)yK>Ya+ym0i6vl`D)RUA+}9dm;K& zu?6&h-#{QaDb*+)>TUkJB~qhNOfEG)IuyIk%-HJH1$wcIv$r%!7eBc|eT??!c(-9q zO-6RUkvYO!43`gNR<2mw0XYk>DU?f08RacVIz~Z;UoS_v^L4M-GRljWD3V5d2dO?x zk+^N?jM3goy%ZCR86sm+5(2|Udoz`mlK-5mZ7y|HXER*JHOA}GheEbF<<4Fb9jO>pF{Hx#Q_3mgSqXu%Q8L^JOZA2+JG`mY$6-2QM3zsT-Td zdUJE2ufpbl4dhx^_!>WrmbQb_lVEA9!kz%q*ut~AIN#P2$9cAC zIL@`@qH>PyevvW{jMo5TH!EKQ{N^E`;v70n- zt96%(fp?+2Q2XysO?Tq=&D*m|T>%t0Llw|^j6QQg%| zq>U(#GEGe=?N;xMQaGB(kK)PCyp48|+HT1?dRe=wwxy=hc_M0>0!u&l zzGX}9!58~iys+CPGm869dNR%hn^O*|paJVeI3yHJ>B>2mwQ)r=%r}zk#2b5sIWT~W8(G<4{f63AZBpHyZ zU-H#r*4JP_jvY#8Hadatl_KLwq%6(Emqt9vj<3B{8P}m&=}F#w(t*;OEy8&Mg7<0O z+ba{rgW;)6*_D8c2wzUXe0=|u*TmT;ph!x?dLKUTJt~E3*+{|#FbJl&#QP_pNHUyH z=}T?%0Jtv$KWoe8<8p3Ai^NKRxFe|c29B=FM*3-xUagmPK0)h25k>Yp;C+oW? zO4tb};MIV2xU+=ySsuEa&k{|i=g>;MD`6+Rl+_I^hMf>?96C+JR*v+in+ZAB>mRcd zQtyn}32nSI?SyN1S$P$E{|H}6tGYuz)IOCb#mrCT(Ef^6V6#Qy?Q);5haJQ5d>eJP zdA7%JoNMce)^lth;~G;o$%Qv77JMc9DON`NbX3QzjCQC?6~5le6Ik}`>!$o7wm107 zflgNV+Vo$8@1b;6Xx-q4i~0CbCS$&p@mG{8)l@*q-WfL#$~|fL17&O`?9SQ`2=m3f zcD`aPU3s9LZ$ycks^_5Ls4T-(lRyIQBa9~CG>E(=#iFdzH_Wvj4_Ah;!)NgHCY#05 zN?%tqN$1(L!(4*-T$2{Yhn2pdij^Zt9eiP&TA8P_I{5rRvpV=D;F-_7}(Kw zeukZMU)56bXGt`N(J;uj>31upr?cb7u?1{$|H2nO_Z17*S-#h#KKj_%z5;|2_ENaB z6!g)c7(CopfJ7))4EN1~%sW2ZH%Qbi^=qQX2wx4t6c&&06)EGS#>s43@aY~L;fv}I zVQyDu?o!;fIf_3J<6SU4{$O{(o>D!h1=88Ec#&8*5=^>E9IvxS^*2NDbX)qmLK-_W zI^>7678c7{qHJZ-)nd`P&1Z-MKic~kb)$V-vN7e6Draj1$2NW%RnC~SD=%#;W*&7F z7`I&FE3(=alA`VxPhRfJt(TDtar5I9pi-FnCgP<21#dH9ekA$B{P-*@2C*V;e&pm* zy_L0b^W*pI!=aBu1$JWtdF$ipK5*lNNtB|UpL&Z(uo^0Kd#_q-26D6ohy!g zD1-UY&xdPTjktN1uUYGvK=rn-aGY_>p)v!Em6n=-LkXKC;C#Xy@#7V~ zUdmIV`bu=a)tG*z4_3;H#Y=O2g*bgX7rc0}$e$-suX(AP zQ7tY1G$s@c0>&1{(2Bmsleha${O;fhSS}}8O=JIpDfnFd*{phOIMKOuHL$a-DdBr!69N1$eKYN_gq{9 zG)9z-^dZO5@B=gC&L4(CFXb$PScutF`J~V8xd?@uw-3OM7*);3$9eSC%WzAiM zyVmYs>C02vo2uovhVL}h5-zuPSWPO;nTN|w&2q{X-vV3xV$u(-74PG33;s_1KtZID z1Ok;Y4-lwAo@DMJ>vMRc34uBbw?UvXCdT@A9^wLZKKi$E0+kS`Ls@-2iy=_!ahpSz zhMR6I$CB_y#%zI-m_VgKj|tSL@f~6U^=g)y0##aU;sSLczYP|yqZ)eaT%I)T96S=} zKGey{B4wT}%vGTl+kjPRiU!Ek z3r(5&g(*`nlrpvVQG7wAeL|+rw($`t%AjadIwa)jAi|E6Z2WyP=%Q3Qv6d6ejD1)h z<}3Efpr&dz@}b)%+znOf%SK%Z7m00XR3dq|hSK&{%2Ua^5`IRQLspjXYRM#d{Gfa3ErjSj>hI6%O&uGrlP} zjeS<48=m#G1bXaQ-vqmK)cm?x9ADYC3pVOaDi&$ub0&*lRBx*B>vO(g&F#9d&Y*EiW$dznaYdiG*id!6t-)pCY$ z;49yWu+q*PXpZLkPa9}3hplLXkS%UShiI1RBmB*biFy9Pdh&P@$p;{}D`I{VhaJ`% zjxA9X#uu7U}H<)c`wmSc}*CqHXvvv$N^ zcy#C&vJEF+*5Z-8q*iWiNo`wesONPhEl2nU9Hj8fA$)*Cqc;QN#lt)~G>%k_^IYoK z7F%ERS#P6yJl}Q>ZklI%9oKVh|HN^QjRG6;{SH*bQ`>jowV4*&j+Jp1Z54J6_opI$ z_g$|)x88+26eO24MSL<{GfE}rm}If!Y}Qt>_9WqpgzZ^78CS{Q<3j1c+D8fN2s^U& z4Z=%tP&yHQgR7J!gmNOBh5tgza>8E4{13MyzDUgT`CDZC!an-3%Lu2-R;(`Y`R}Xw zip2wD*QqFmbtML+d*mK|X}PEIi<}A5FmA#ir@)UU;0D6k#shx;ry2h@Uy5VNj4_(H z-c#Dq7*y_WqW+tmj+=-yEs`PbYUj`ULn|p8c~v~w&fiuXT9}DA)t~ZwqP`vWEKj|! zS*j?l#TG#?R{9Hd{RB)gaodOzZ3)gmgzw@U%vxcJZI;dr=?hVlt=8gJ2ia z`SO;u_A&rKuL;DRFQPO%q%HG$LvZ8BkegRgWkvz0GooVabAc%QJYdZmje=_b?u7Hj zHNt<|yg65^D2uI^SC6zez?Bp9dQy*)g!i%rFR~B*PW`CWpofI}e>#EUsKZI!iaQee zcSqa<{hKeHZLjlfbvOo)%O9t> zjNgfCFfBEqxKchr92@5^gc8=Q&fi_RON_1a=avjWk4jZS8_y(cPjN|BO&v$XJRmO7MpwzH*J!ZdYD=ngGyg$F@ zTQ(j*Exlb5ihoML@q`wNc3HcOP*1=HLfQe9fxOoOgH~FlSUujqY}60@Hd4ap(hU4I zdz5f9p|pBS*d4MwO)|NZ^luXOKRio3n{$f>mRa`L1 zAI53XB>ar8imm49@Ff2~Sa_cQVVrtQW}Pv8vj2qNenJZL!aq--UwD)MZ~qB_{?wlMSZ*ndcoc4#Aii61egE-`+oe-=DL`W4gt9I7${A7EP(euPw?Cps@Ih*;mM zidmr3F~fY*Wj+48G<3K|j@%IV-PW@npa50DgGW2$y6x(_7CJhFh30*MR`JlhwPNKzgS|1IlA(E(W@ujfSZLmJ{;ZNV z=tSwk0f!?|I!BtuaG~_xguPh%SJvJmHb3WgyBHd%3}Pu|x+_n-_ng1DgcBb#LXS2| zSMLO@0z0_4Pl#FjC}FLr+yxPRFM3tZVoxrxwrib5T(ZkQ!PO1_1LYhJM=wFCcMT99 z?(!G7nEll(?F`ZEDi-eN{W(<(xl%TB*t!oQx#^Y!v}C@5!q@P}EI3)RT}WlaooJY~ zMNE6%e~wEQA7N>?4Bl?+ecta>Tgl?>GQ6?5?9#lpG#QSTTQUD=ep(BW{*phdoh*7v z-W0$vW8P?D%yDp|4MU>&Ma#{Fya)o$NWKc%@D5XjOcp{u&!VvX4Q$fH_OG(C>K*o0AY6<;0iG1OwHj3UN5C1FKHSYh)&35Um6A>E zG8S(hc77@xR*GM>dWI~qKhHKlvCW99SOTjAs^cn3E!!6lMTHFfwYKCm#5zH(!Lc$n z0U5#W6vwSRVXWav(`c;#GH}v2qW5?#d@mGW!!u%u})R`-cV+5`&3v1i>5akxz&gq$ahivY18u(l|+2=KK$i{%%&2vB`BU$O+E zFXY0gRZZHtl)>U4n=azQz?&hblcW062>tk%IKDhLgb>}duXDgd!T4f8fyIED@qKw< zb|zK?&g>UBW#Py&SB};i`^$;a2do8ZscF;`5ZT&e{R4Gc{e^r}g?Lfx@JCU1>PPK~ zHm(nj_uWwe^?trOzL9q{ z`$~3jihBPMa7?{_k(Z`=zm%78_5M6|t~e;wq262gaBNd5d)KZ+oqnF^Iyg{>rM?#o z4s`EM0S`YGDl8*0eDkBE)B-EjX*l)*PRS*dmh;Jkv_m_T?dgO*qXT8hB9IX_O2Lv{V5{pB)I}bk*7T)pm;Y=ILK&2iBs^{Br_1UOUrD zs<0OQ2@zbzve|*O|B&XrLJ`l;3;bdRZ5^H;=*V45{R;!L#DNh$O{`cLs8M&05@{#1 zkkj$1K!Lt@6m{?MC$oa0?y7*MAgcIq)1ca8wAhF?dO<0(GiEpngX-iq;#U^E)rMj% z1RD%i*gPUDnB4+f+t1}v|30xXbN=$Rv zz_o!!bD0!sZCXR9W$XwuotTU=-mx~2rX?Tbn}+e$GBFWlOivTU%WEJBNVb0vsd6hk zD<`;#;EyL!VJ&BE^#qn{_K$goL%)(`4!O3xG2){uTc6K^8S(KbFXK_hGkJ&1Y*$1X z79!L%IT|=LD)M>}4zVcVScW^qi;DG-Vt*5luZI-NM+0RlRXEz}9F(}qv=;!U049A- zco`vm%jU}Q%L!j6d|YI006l*wx^4)#eaF~#&XcIDgSbliCIPP@gp`=KA#hXY1GrI{ z$LD!cP)xyU!W#&0;7zi2HQ|y3JV@wNjb0lAYg6qb!Gx;ik1yx)8)Kgcj5}j_we6|E zC*r||KYjms>Vf6C5KwEdJQt@&uqHQ9q>MG)O%eE& zc4AF#0J0?qh6poP!r*Ld5xE2FasyGdZF5mFpm_xL-fCKq76|2T7-0>u7$|9&@3gSq zHO9f`0@pXiS}wUDeZf0{gk@>T;t!#ewQb#2WL%6TLtKw;9D65lzpC%V59<;u-wR-C zr=B_X`fYeCk|q-|yd)fuuN5aN&5eohK|7n$DU}ExJPrWzT_;a=Dq@Y~+k^LC#3D0< zcL5s3!UrE`Y0C-dTkWpdZvp}-Gu*I|lJAvWYFtpOufR2z>7u><7_aYEsO7|TvjVG_ zhZXB-G6Hg|xop>dgLn!{+S6rOVkz&xg!KS^(>q1cfq+{n6@784nTN+J1F48H1}nBu zop2T53pgmXg#RM!L=iCL0N^Ct<}_!Aglh?Vi-!&bCX~o!kuqF&IR9mMHqbo9zfwk{yMu{Z16~r#ZjwHSiem)YlRme`U=GTBr z9}e@f8L#*fAR8Jw$?b1<$4)%^B@X<8~@ESAlqg;mB= z6?Q`_$hFJFz`S5?{r9-dO7}!!7#I(LVW2ZAAjP%y) zx;t?#jUt!oJJI-*rTX=NPAb#pYUO(fY3VXoE8Fl5oTWl(9)vTGjRqXRfB$t{Ii*f1 zVIeuYRCH<{T&G+lK58B;_Q`qPko(ZK2PRm~bI^?<;ab956r**1@NYqTwp8Sb{{%%Y z#x}dhIK<^wIQko{x&U=f?c@AuLuU!b*;s~ z<+%|R$uTyr2u8$_e(->sl$z75WT3x}C`z3%< z7{$sw8Oj^EESS*iq*$y#<_fW}2BA$0FAMIn>4Wj6ev+!(AW;8zB*4Tbu+I~z_U)h! z>v3{HeEI%t7}z&EZ(=((HB~t3XR)RFeRvsPs?Xsc58cL7 zEKf0V=9}n4ob)@;Z`?dljDp{oCuWP5^MXNTyQrN9!rzC+N?(c?&Wg-c`!YcbCtXQ& zD=9S;H8TlYqc>#$Aw_G_ZQ>vEf-O2RJj0ZG&1is-_J|?W*xsQ=m&RHNUv~gDO~9s@ zE+yrPCi8Jj!n-eeuGicIRim`uw@PNzyljN3_ zf7m=>(!MybG-x+EEe>9P#_RZ#djzHH6mx9mihgnI zNG?)V-W^2jI{b&AX|au-FMXUrfAb_y!>Aa|ZQ7}&U@LnurN!P;D=-zl_Ww0_E36162e%qtJA^f&g ztt+MX-x&XBu$8qwi*Jat+H>)e8t`}O2Lrh|sgOHBfH89Mia?{LT8Qg}_W z>EUo_FQWqT;vIgK*ftZ*aUJ&_tV4C&doV(J54bJFPZgnR#V*|kgmqhkt$RzIi5>zl z4}KYbl#Niy(m&x1=3k7z^q&c3GJv&&wPN4aU~vrx3Dc*r8a=uW5)Nh; zZxW6{|4J<_9}K88SN}`+HR0q$?e(~FO@$5+9O^pA=M3XxAA^qOY7mb+9_-^9&bBf| zz?EQ6*I2{3EtsO#)2y#-kk?kXGxC7OLGON-Dd54&MJ8JwXU zGs>R|7N*OM+y9&lPI9Plh;jRa$;R~E!Ig@*bxxq;A7Aj$oWZHrgZw6~%jjVnPLkzPQEHJYd z?0zd)seWH6(vBA)#%N!#0P#m7_CccdlnSU^AXC|1Y(%wwZazkLGva@*TsbOSZwIMm z`ri&l)voQuz^{9c_m@j zghQ9#X}#=L<_dvbGf(!e^+cWCR}4E5Y^7w#tOal#KX)QHx`ZA}r4J=-FSJQvz>YaE ztS027Qt8LqgM{^>_M6}o7p?BfP?p|9MY5%M{+nQa3FB~;vpH(M4|a3*Pe4By#yL0v zYY5L0O}_;Vctyu=gKoucjQlouhl>4Qzx+N}h*RDV!7xr;evs&V^R(m#xJ{cI@B9#) zmtn6!e}7JdUW~&AH4WK>KD467*pwQ2?{08KItv$tr7_gb@4N5u(p!uKhfa z8LC878L^@FN$gf7KHt-_Ik}odt*y( z=!P7`;8mA~5x-@Vi{&mD13^wB+G<;|e9nxng5^D7&7{E!YNc zszOtg2aHke zLv9uDijJW$PWPCnXF7)bKp)GKk<=+PFWdecf5kr~f1AmQ#?5DiI;&Vkn{I{Nl}EO4vv%#h!V297-im?x+uasp(rlF5f2X z`=5~7u@^TA!FXGVRQq{A)+35OyG}6ZAiB}Hbb$p^Y698Xi15XaE2~V1K$V80B({I89;}gZ9DEQ4p@ous7+E7q= zNc{8Kkh>FzF6PIkD00xlZu+qqnhLu;ptOu~_Gx+mq+6Tw%cSc>)9XSl)Dx=ca$P9j zjH4TN0RP9EIVI${ph&ojFbT=DLKk(SrNy*;-UpR0>52sOfV+|w@p;lR+KzBU0^UNH zXGE?K^-H(Y=6XgB02&b;#-}2*=Zw7o%5XdOgS{(MZ@_i^u~lsPSCIzWptSw(zX!Cv zNwi!AqDEQ)>6~uf+$Gkm3KhU&`0^@Hd9MVO!;ED*rqM(%!R!#R-|L$NvHVz?2w^tl zHpZrNn%;rsG3PYPvH3Qg(`_KaVl=%f;O*G?^dqXvua1Ctl9tPPP zr;z>lUlj&yAo&z!5jMH0-QvqLb{L_fTD_OAWHNsF(Rh=6@OSD*{Q0U zn#rcJFg~mpM;kZO07@Am4u)2>C#dC9^oOUpA*dWelA zET*&hGx7XWA-7ZIcao*ZJo?pB_&ys&aYJYmEcov>gvwOF^ru6GI8~XabIsE&Plp~v zVW*v;f1v57J42Uw?aW!C{`Ygo#f|+AW8z1lxBgEO%0S#FsK7aZbev_fn-zV;@0wJ zG{^Xl0}d`1^Cz@L)>VQKmSG$~(&%Bv_T!;o2kYFjhkaWQ8XE&ejvW zj%U&R3xPxL#>Ni26Q@R*a}ssddUO!m-=4#-)!&x|_m=S5bkJ$`D&DO)#`EORzL3w- zDExpPL7^TLW1EGe9qCEays5PKsX;YqDq3j1)B_S~Nh4Y7k3sC4b~md7sUM*_S=l4D zHw%YrsC_C|^Nuz6bH0Qo$~AKmYSb{4-oo|iu~{uDfV}8-ycpzb^Pzqptx0yBpF48;RRURacT1J zj;=~>%%UjvyrLZvw-kjhw9e>pi5Ra%ni@A3hlgwWP6&O0l^TrQE@HoPt! zYmFhfPMJVST@4%hm=mZYUa>MWm}?B|5x!harpHM+f**XOc%@f3yFMB3#)_2h7OT4h zjv(I4(8BryOJw{MxadZfyo!6QMdR2;wR5U&eVZj+X0il1dU=DKDOF!BOYCx0lS8i| za@c)1H8PZy_j8s0xmp%2Yt|mD_I2asd%X0MU9Hp5Oe;Q*mv`Y|TFcqE#B^^6%JEHK zKp7b8V_B$8W}!nHg_HgkieS*(%+np>+1}x3hlg06l)89niJK#op4IN-<NfUkNP8ol(*u2gK{Y{Ht?b0~tYTw>+MiG^potatUowo{HqU*cOQp}9p-UnQ| zShTMoPfWSIC{?_ZQPf0C(j(0b?6Y{WYObW-KOtPB>iJ=d1v_)}DMqH9Npf6RJt;g0 zTY(Gwl@onjgrGsMC3!cpLK|hVs^9j%-_+C2hj*`jZ((^DXtWDTdDyran4(V39?Nn)M z1arQ|HeQyDxREU#W{{V|ei_Odhkz+S)|>r2nnS=3yflR>ncXU*DXmRK#(aBD$-O9P zCnRX3c7)7Oy?aPGyKqE#Wr8-bUFq;qy~etMv@>^CY-YxR!<;SP~TeUJ)mzw))*7RvcW= z?yxwvB-}qCS4Bf{B-Pk|M;Ob3`n(&>6-dqF63#orgGIx;5TJE;hHIc*ZnzU{G*|p` zC)miIu-7Bbc)(rZsGgOD|EA6FEftCoV_hof~4?Fs`v7fV%5v5ly(>3Rh;g z!E3=kd^F_&92MFV+9$Y*w1ad?siHbuKeNyfLc ze~vnfy$;8EJ2iv(cE)nev#&wPT>HgnJIBt+?3ES=S0Q6v@W0T?aS%m_pWKD(BrO}( z{^lFQxvgw$kx+7-)CHmB2KXxkHRl_=#~*_Zi({CWurXYL+zfYa3^y;4ieq=SeIA{r zv$4{H@EgJx31zqnC7|mXacE<>rP9%GJs94oih=iJ{lP7K8>#)kt}s$)KOA2Ahj!;N ziGAZE;d>hw)*6Q&4Ii;CI}CE!`%e(|F5%xAo&{q@#zz?C8@3`;)*{C9+Vwb8$kK@= z*fr{-a7ffW9@dmsj3A z+!nF4K&(b7jCcz_&x#_m!*QaHV)Zth<{H(Xgr_U~588}QPlm6znqT^{^r?Le{gwq3>gvL;ANG<;Kk@v~J?Tr2AdWmTj`?>yLK6Mod4#0>TOL_1F5d_1hvbpW)cg1!#J(MpN3u@mk?cku`4}BR zF^lnt*taiS*pEG!$%QAOle7V_I?|TH6)@?NQ@WqdDUxv-IYs))OimFsZ$otahnU1B zHhl{DQF>Lhy{LaU+(FbmAJ(mHS|bN;ZPxEjjD0%uoPCN&`Qbo#koNyR9!b$nF*5Os z)42m%4<=0Ka}8`hc#oRQm?(vlhB>DF0os|xiWya-{Xr6cD{??wa&Q@il`EPO_JuEhMg( zRU#8rF{=bkYB8(C2l(HZRtf7h_%>Q4XFOIHZ>w5?BV-Tf22j4Jxr2|~M4GmaCx^CJ zK~tT!78om@+x`#4s;ealM==c|@;V7kbZ^;=l)Nn#tZ`b2nO zsw_=XWbr)X=M&-EQ)2r`{MWN8QFSz6h8*|r4Hf18CmY4NS|t4c+eTr)Mlr`s8f^S* zkMvRXRX&SlmDt>-SyM4OIZ`JbZ=xYNQllQjZucn>gf@sVDG_W-A?H>y%hKRhW+Ind z7y@rL6S=IBdq2uVF1avTm|67I;jP54Fj>M8Cbzf08#OV@WJg#TVboWr`WkaA3FKJn zV-%-Fj-3ypB(zn)7hK}Wg$znBu!+s%7jl%=O zORQJ%Nip5?OJ15{brCO3lZC}JSu95h7{7rhht`!RO7Bo1VYO>&1nlM>hsEC!mNT`O{=9JF4==&!8Zq8qEp>!d9h44Y#qIBg@ z(+owa(u5%m9K#6tJk!8IBTniNk>-!|>PP>D(#MJ8O7xw|@2K=;7anjV{R907h5@8j zu};FHgzUwHeRRNQjFtY#HXEFm_!0i-))VnLTC#YvF!I3}XrtJwXnDdGVZat~%!){; z&83l9`cz1vRU+e1bIh#DB9*GsXQn4xRTe4G^L?0Nit#CtkcOESwqMzY&}7Lr#Xgg5 zLU6jbGTCOR*fUBq^OEfpi(5yqO3i1o3^t4z-Yly3&PcG#Cs`)T>9ufrkTrlQnzNQcDnlA@foT{}lK+p~BH@RS`KT!G2j2CLQ| z|3XtM`M5;a)$a;j=MP_)EeJ_EguVV!XMvZT@zJtJ_4-^~xC3*F?vfkel z&#~Ua%lNM9Jps`DG@i_eVw|1@(l5pVhJixdVsmN}H3j|IuVdkP8rfP6TI}Z$PL@>= zZgxR9B?d7?(w;;+eKSgvwez(X0FsoJqF?t&bkKV!REkt~x)9|l)D#tD?7@j^R8mH> z9$SK=?oMDQpQN;s_4|QS`6#7SVr96q3fpc+TKXx{l{PA$x)kK@{G<_oNc@FJ>k;{= z75@`Tx$Ju%1Q^+%LZYw(jUGq$G2D~*5hK_$@}bNA8SYXoOa54lz7#QY&WXH#CKkBe z9kXoW$%YnbVn(m#b}?vVq*!!(G%H1P=-u3DxJE@PHN6k?uPtJsjk!U`MIh?M_HmIx z$^nLE3{sD^6Jxn}m=1)aV$boMAR54=9o3Iw_?LTF2hmm;kCI^?WLJ?3j1h5LixT7@ z;D#&8AS7)9GaL>||CJIlj*pMD$wXS-nNdfc=zMvk(e(=w&$A{H$d`IWnkddS9=bfT zRZU)mx1!LW>oc`S2DO3mmf+{M!e;@Mu^Wz{@#oOSO8bE|E(b`;rlTuvx@I7P6|W-} zV*y=l6WV~>>*dLwi>k)KKZOnH9gZ!|qL7)OnS=j07Mp|rH@uA79T**gueX3FhxP-z z)wC;Q?;7=4{SsV5_2b+{zlGQ4j(RqyK3J;)w(k+su8g>YU!Vtlm@HC*WQxytM?aRH z1=AjQVx8Dq-=S0F@hMOpz`H;zIn?{CE zx)AtPGqK+UV1aY z_Y;VN^sjKE(vRQG4RMgZ+88@GQe+)IgRMTNnSLV%*z`BpO2X}c7ETZ>lc7PnWV@qm z=aOyYr6rGkt=mwa-q_CvvLA7vbQR{p8`kU%qhvv(Al2TR zr1jqqHlZkP@dsK&m+_7_#C2HZv$(%Ojf7UmWa<@Qu-8`}jg^QGZS|mtF|=Mr;P7 zI!2qZR=X#;nBW(&R*Z!jKLIUW!<)IV=3lPG918A#+YBu{7BI62gpgZRE;cic-5GH< zjmLUqZ#bRdbFHPw+Qk$g$_>WM4UtQ<gcv&t1a_iz3oL#&kX1(a z74=11c%|<~g%$pFm`z6UsF~{EXKWugsWZ&Ox{DloWM(vti@V+DUKK^r14*I3_~?I`vdl;ncF5iWQ?KCsT7pE`_Nnui`@@J zGP^MjSR1X8*(vv+G+4ATF`m}!+gUsIw=DiJyBTM)xbm8aJPgkL5iOPKIOnEpL=&YO zVG;gP`iTo3j<_?}ozjb?9O0bbC}R1;k&C9BWN{5gj~l^}P8oYBVLASLPHM(x?RG-6 ziopu-my_RL89@Gf3@{ZEZy>?vtYZj=38z6CI#2IsJ&0V)a3Np zc%n(}!Zo7VE@S@-k@ZgH?{bY?SoyvxzrmbYsyb{7?Ngq=N7n*0KPdHf+t zL)l<$3RbrL1HUkc{{a+(_~|CH(i^MBiT?!xO<%~0Z+Trk0r!Jcw-7k=5=rK@6iG2M zpUum7l8i8bG?Dkh1xT7EZjkgEd9y}!&(Rw>b26!W{D0lkDp z$9E$So`KIMt{$}!udOcXBNiMf>TjeUi0o6Boh*hKILV#4?1M<9IB>izQ!7<}7eVHV z51=B!-}nJkBrHNdj1w|f90nC_6AQTsDza7_hAy-gEM$mkXEdmc6~|G6k#kRq8|xN7 zjJU+^NWN3ld>F|WQx|0yi_BYWA+fxwpx8M4VdO0pEjF06=; zk+dg)Vz!CeucLYO%Xp)?ApK`vnktW+fy;prB=#`MCGl{T1c;}SCrw)_`_Y(BsL{np zrOaZd>QZmVPyrX?Y&4rEX9aWZT#qovuA&yU<30eIC+1_MF-kKtTO>KP!P*GmWQ0_& z{5+B$%4W-9vW(=HLMNofu@c>AXK8dBIu%{K_j#nybpmC|V2;6)@Ryb?a*jmYt`}H3 zl!J8+8mG?`J&r_*m54F(NMyAtmo%TrC>9piAB$Xj27?$piKjYFTwg^dpJD}0`8smY zx^zlQr`Z3`uoLv@5(};_)I{!gkq~5kr|%-zi*#s?hA7V3-C?XJNXO{6|GP*5eCXr# zV#sV43W~pv6kxD{kHmLJQAk%ots#J!n zsgGouoBM*Wm$r@ScIZ#0IY{4)rO92*O-o%Fh$J)@oMVIE=Z)}Bk%!|1p56L?9}`8_ zQDBTmG7t}U?#W0?$3navNMhUYZ&K73EmGX9rEvv84P9(E^k&{hOK$ zLIa|9VjGVepb3!VFl>&LtK=M4E}a>5D>p5@Et-|~AsdX-4xvG^vSjH)(Xi`E+^BTn zY)6imH!b}bt;Y*piMCdL6bldj2L{YF4;6J6_3uWSi0`y$#u*Ulj8V;-iIXWU-J;?C zXuc@7MN7oVKDH$B^eE)2Zh87dOHY7)9aSnN3QB>5VL<_|Fyke(t9>##Vg0Sm{5vLdp zh@|EScri!b@6D0-2}#Rx1Yq8sINUWZc9aTn&j9Y9`G20uJL+=E| z*qRo-PBjPM#+b_L>x*)=@+yRaEOxXg5X#mTS>lC^Xe4<7-jPy<*X5E!u-L?r=IHC0 zN%b5Q5n#`-M5`(-A*u{mk`q!a+q|9?n$AH=eHz#1@QZC+K;tlO>Y2RXVLt&BBTUrM z6{3!0gG?G#)N9yCj>zg#UYe?^W>4YPFFNG0qgZyMZR0(fMq)&`|5_Bii|E}HHw46_rqLEytp(yN z6Lq&@Ug2F`m?EEbAvyHYj~$S%3zKRPqavR+>FvdvST=@$9tkteLYC;DWRNf8ARyCW|VNxF$(=f z$a^eSF&aekg20_7^>r7uUbJzDgA=f!SRZ4xH~O&^S_OrFHmu=|pT^L>JzoZynaP6?lhf7sSAO z0I3h~#-$v=yF(vz_;UgwBCZ55Azm7tYzYejVSAB%HuOz5;^K?$k?p+Qs>`*J8&gpiQScpQkV~%*mS{lJ>kuSPL5ns_85v|8?Bf{<$ zAI-%gEEsAIn%056`DTjHOb_p7o+hKXI+~v*)*a4F74xEw)SSx7fA1*TzR1R)yml3* zMki&7`E#Nb!ZA4NOg_nXg+I%5$p`h&iDyWvMo}UZuNmGy_#nuN3wRypgZ2cP&QKgH z2f73w6c9Lc=~^A6pyoHsV!L10<3WvJJmGO6VOBy zHtNZA5n1flqeZ=aI4+@f?R3;Y#->FmJ_$a|iU zJt#fdfefckQHO2Aw3tPz@0K|Z`ru0OW7|0SX*G{+09D7G9^C12kfk6Bee~t&mSLa2e zt%_K*J`sb*RT$caM10ZLxKG>I7+-Y0=rcLmy;C!^Qo7TiB?(+E-Dr%r<4vc;+kHyd z7;m>&?3xS$AHq<({|JHGM2D%-Rey-UPmdakh1_B0SS9w~A5A9L*hIl}&~jqy7vseA z=n1RtLOj1iW`|gINwiYW1&l@94ZZ}levGsp6>nVvS+MCN5WMr!Xb(|04hx`0U;6)0 z_a@*`70cWBoHOTSCi`SxNJv6LGTR9Wgb*}9!mez=gGt}AMAMX$^MeYxg(MGW;yX@DEFdM=A>Grn)n5&3rbKTdR+sXZq^UYZNEV91tAdB0(@IJH~bQ0XISo}29woArWJ3oJi z+aLa)XMSJ_L#%y1C7c{S1~Quozeiqh160E$HhQG)!{^M&j*#B zOa6pTP9HM6m-n8L{M5~_$onTq@0%QHrgjPO*q;D5*rld2 z{9a<5P>ewwTAD6pqiJ1HVqe4Ce7Su>J;z>fF0l^~>z~2fd}6I@cnd>2HdR*O6OZ5~ zKi-(ThL{qZycoudEOQ#|QODeld)NTUiRK=BM8mGa?`N(QeV1c-5eFg&{#`)PZBF`` zJ`~SjMJ_KmRw4Kmh~)*H){TebYfv1c{X=Y6j^%~aYidX`2aTxZMJ>T7{Ksua3tIR0 zQSutVcs8i@WGS~qkAJ$@5z zw0?Zw)8Qr%FK6ujEWLps^;T^_DH_~L@KW)P!1|k$p!O2KcAFSrKNblqN^&|&?90Rs zmRMBMBsdPBE$LHKqE?nH>H5iEZ5c|EKMtI?qNHn_zPkm>k^q(^yH9SDCZdJ~9$#P5 zOOp;cw;b}fZRQF7?gJ&i+0Dj$ytndWYkCOtP@@>Usbr9b$U9!j#PLl~xc12Ph&EQ# zK8%T{V>&bfxfszNru$lno}Vqg>Q+*W(}j-!L~s$^))2c{-iX4U%4JQP5t!dt(jke9 zk1X-(j_^>d6l*FSSZY^>hGLNlq^o(ZB-My{4zH)NJBy`uH5!9YuD6qc53e(}641?; zKxTgfAK`Td)gF5eOGERITzadm%2~u4j(bT%7b=Qm7YJ8F&b0dLhxoDv}D zdZrfT9M!??N;RAvG!tQDZR91qU3otr6I`E@5ktOc)Vtt0L|%$AxR!!-XlwkrFq}=< zRgzf!35x?E?JAmch4FYetWIunJ`oA4^Ky_q84Ro2ES}g^(sqDc!`Eb@VPJr>0&6DRJVluj$(jM%XQe?#3uvC2rY`QMMeF zwSLs)c5swQ-v$YOLGW&t4&Vc(b6CkN5(D|@I|_(c zkBW-7ORAcUir@Ujae>zFlz0uZE|079q^<~ipZb1DoyadK!wTbltmgAY(g$)()PI1V z;>+L~y;mv%iax*s^>ut_msPU|7o z5IQP@Xr5IPT8MSl{$@i9Kc}e_@(t9N{%MgTcUo zvw_5bkelsq@jkSDxrTsY9!ICz>Bptlo{L5>3b^ls$>s(WV79BrC9?45_PhN#eke0N zrJOyqqd6Y{o_LRL>p(W=>KW6CbRKXTKci5do`bb=BOVk?`yXc)y#OWNjfp{`v{lJWSD-HPhkY=XZMTp_xCSJDdp zQ6s)9@isic!fT&F0T)l|)N2WH-j1hLR+T zMWWj7?iTpT?mp9iP#EBJ&om8;pVi9B)mWS5633iwx4zb+4zsI{2C&s5_SUDSi@NSv zE^`hHr{9bE$J~YbPLH^2p1atb2HB3KcC@>Y=Lp=6c+)0Q(ra4fC#R8D-{X;|*}*|( z$t6)G=1PzSQ=-im_Vfr>cyxOnY;Q83e!l~MMWR$q9XJ`j~5 zPK;0Wi(?O`x>i7`YaE=D^~oYKnO*2U>i>o6OruK16eEG};4K1I7X@L((V$C~z( zaLr9Uc~eoLcp}f8BBl%}IVDh+=bo)OruMk_{0lCaF3Nkk-C|~ed#G@CN&VXbu zcR}?A62SCp3;GbG5mq}^@J#_AIf>4XU?lo7KuGsiP-}4nua!qvWn*swMGX9=qWcqk zErI$!wfZwfp5@NLK3=s2Mk1}&fuxd=&J@!uFwz}?jn;p|NJ~58%&o>Zyr%eKciU40 zn5k7@a=9B>Hp@D=-##fOaz#?lOg?||^z&yd@0yk=-hZN1bfC1teTNQJm0O|WaHX4P zDIDj0Sts{cOxR00K^`s^M{p6Y5_g=at^zXzxu|ZP&k!@fR>GBxn8_WAjZRT)w6Pf* z$xW=(5)d{fTYfQ)cTE%04Md(EA^#Kwc64@s6y%?6UH%sTWD0*$Zk(v=>W+ph)rhWO z?$x59t2g~ebbBlHcjzD{iNj_@UrXClE--|KC13le`MXP10G2)vJ?zEHY)yT3&wCe5l zh>=;j(*n=p?*E4VJkl@Rp9cpu>(4bM&J44CSyeEYK)02u^HS^T+;1AOH1%uy&;vf3 zXm_?dZCH2cBoG0dIP4i5e4g(7)Xm%3qY3y3uWmjjO#w?os~c_~*z-vfvL(MM``Fx| ziTOAwW7HrvqP&c@^HwcwhVoXK*NWIe$e2uzGQ7(yUYtf2F9tL@2{Bo(c{lE1Dd3kd zpAfDg?riN$;Tz)4ZOzz2V_$+!VyblaqO!3+!3j88yHZ>*#N9S;AZWA-l1P=#1`_!C z1N;r`#ZD0qq9HiF?jGXyjy#97-G4vR;`gEMoUsx+o>&t; zK8Zi^X%e(0+ymq~{P*IwmvjxJD+$v{(3Y?pNXqPKVY&sR>jgSI<%(hMoGMxSYGR)b z*Os77YTR$4;DvDQD@n&Qc~JW`)NYWqFD5o4F7%EPv?Uw>@*w`R*awpCJkr&GE>3$c_@;$m9*+R%UfGQPn7q?e|?zd;muT@5`PjG4|it{laF{TQcd34 z5=Nm4b)*Nv)!vQJ$XiN~@$mj1T-B?w7GHR>0dX?Dez^b>BAkX@=C3Ht^ z`n+xlw{V!Wn^X%s&_YMq?$^ZbkXSxng0>{!Y#N4TvZRTYKgXLO!cUSg%AKY9>K9i1 zEL>HBwuD7^=wkd2=BSp{za!l*>cL}1xie3ZSchyh5n7i^@~VPu3HPHe4LbLR>z`o# zHXy_gw;A=-kT7KZj^X+W#(+fKJ^24I{Q4eA**8q7U|RxLj|cEy0EJV1QA<)@5T;bH zEs1(wpD(sW6=5|qh5iMi*vbCcwE_epd-bZY#d8_#iP zohs3-CE6#^>?Y5DWJTE%=r{$wV&6Y^)EQuARqup7ZWU~V$`jK$6 z3brNn#kaZ?f>V9>u9E5nRe5f>a-Bqf5w5IYTM~_VFN7=CNGh94e$Tylp?dk`{t{gb zwCZC8+mfirWWyZ3XuSY)iTyA3eg9y(Q&5Nh$h|apx*lI9;N7PPTfC zf^7+m-5iGhmEi^!NXjR|k5cg4d{hD{N8z6ngnF^-By}N1gKAg7wxsPK|5{SHz&_gD zlB^bF=;RZ4s}AzZ-z(9Vglj9TrDdG`i^zyr8=hI1zKcZ2)ui#yUN~z z%_f)?ZVY@s+uhBGD(ZmKWn#oL8@z4As0OU^4DnC{lygJ;%1f#kFwgDNkgkrW*fh~S zY@E1rp1Z`{;kMZ(D+@xY_>!2_{^rI5Sg5L%;|IvJq zv%o#4b;x{BUinvUGr_fARfq7}FI5Ft7v1Bo(PFO053Rj`9#XDjbeW+;H59CcU^8fV z)MD)K@jhfe*Z@GemW4uXwvpyb(u5prZzs)uVnU%d(#yc0FgwgEr&N3zxn~kRcjcFV^LW^l@uREWtX07lun05~N$c)_XIEA0l`w zOZ#kwAhGQs+$QkkeeQooIfkK;7L5aO`4-sOy7l!%iB)fvbP^*rxp%i}^wF!uVZg3ZixW};gS~c4jCl1u7V#P@N*%nBM zQOeSG9kK_|(w2xx5GFEM+QhLaGgFj_f+U7hD?dtoalSIK*;Gt*CkO^*V$fy(woqC-ofE(8V; ztuiMz1XGsKP;MW&iVwp%@wh|=PZ5jGCrYiIe&?-PJAH+sU{LC>_#VN;-@Wk)MpXmI z>#7dk48eb(5#TZmv4e3TJWi&_XVt}DECFDpG*`oKq2-6IWIp!G#ZFw-w zI1GYk8XOcb%{YdN#9i(*X}Ct1>M6iRM~U)X?vC2WV*D<54;&+~VVApY|8kUQ{a9-} z8cO~SA6kEc)cBL>O{WduZWLEvDSU=Dh^21)rwk==9YKaFr7RLTyWJ1T_tJ*2&S)r` zDU~SFh7!DvVDG@EyWNRe!x+|mZx=qZ>AazCRY2){jIr$hP+o=#_n|yRmcPULaZor^ z8xpi-)dBg^A8GRbMAIsLDu{AqBZ)HmOM6h{b_*cm5ddzX|MVKGwE3I z&QkU|*=OU$$I76r7%tAnlu4!Z6e81}hhZ&|_{zUuutl&)S5yygmh|Vo1q(N;g*l zvTq_PG>6hgAuXffAeA>rBV)8eb13bic8;>}9NIv@`Bw)BKf&6{$TsD+0wkmEdv>dY zQcg*D3+6h&z%J&+Feaf{KnDStm*74$cTP}|s_TGn7O4uhY#yn~4Yz-fRHcz59I5)9 zSoa+UwhXok$C$@{jVGxX^Iy`kbl)li;L@No#iHqsflTm#4PDJt|l4|j1@BIA4a zxf6aOb`XsrLpTfm76xA?NOu!e%JXXC_%*aTK0xk?O+;=Y0u3xU?>XcId3PeW`-u&%Qk+c>K(dAbCp+t|=(O za}&PJC^q+COv(YcKpY;DVFVhZJyo%=AMY5I(JJkNiIl(6E{*sAY!~W zEyFDkFP;&Yk>)w9$KFmJqSK$pCdOoX^3?&nI4~P19TEdZOF6&lrgVjPhTSW(Q6e5k z`Zhrrz-T!Qp9szQh{Z+xs9hj24rca6XwEIbAvEV~T!K?ELUSrecr6K3Xb$zm2IUm1 zO9v3?6su1sh0JNLzsqK1PIFYhhJfbe9xwuQsCghT8qcCJ-L3qme!vWaSVnTL&)XC?g0>&&N2z!MerURE9`02VIHv`^2@nm!nfL) z%JRZz#z~5Uq^l@F0%GzC&} zUwovLTU)Tp{oLxb+Q3yMp7N9P6j5HjH+ejF891(B zhPcI#H0X;Dr6-H(tP&q{mm{f*&ojerR_EG~B}LAz^QL!liH)V6I^=QqwbU~R=d=xI zhfB4%vz^C>TyZj`(dulc3l3FZw)2#jH5jFZD%Gs((oQaH({?HIl<04!i-EQ2#fW~s z2_XDVWMIco=-O|}eMs$?+~L-9asxLXuIQ=-CbjoG93aFgT0=Wvf< zBbqZ8I83Jd*_L56$d+X;2y=ia?g=48&eoSmV-B=rmA~TFAgDVZXN9FnhgrSQa4uwP z%YvZONsngzwjgnw^J;?2lj?XWbir*!?r@yo14I(vJDQ7G{i}4%{tjqjyg&`tzfNa` z*#0)XDV-H!q*KlD^pAOeHrx6};$x>@a-L29HeFWTfkOQ|MSlq!{XTsiP;nD&`j7H1 zevxS1%ahUY01I1XX!ZuYhJ2!)lM#AgZiakdCLhvTV$}olBtCZB^cgliU*SLE0}Iss zc(&O_)m_QDh3a0uNKr=UMT&6;ksVKCyj~(n;u#GSytgH4KiR|^y*x#y$ALn-S!|v@jOu6 zdy-vJqU*LhC~A6$so%Ew&u$BU3LXn=9_oQmT%v18zGM_T#5==1SuIUV`0H>_vCK#q z*f_$o(KL_ZZS%$c`8W(=>R8WMSits=^$gOF;rO3ppzK@kahtzjlwsTYn5WRZBHd|I@X&h{3@=&ij;Bh)-{kf1hjSw?9 z&+8M&wu35^Y#|cOywR~Fpq=N*OV!p>(nJ>c)BHJEV(+FjFZ7+`8-1`1+~ui^;V-R? z0*+=Yhfq3zg`$XwF!g^dVafxjruog3jn1mWG8&v`r*m?r9UX1WjmNMCob| zT%a!Z#JKo~W>M%biwiIJ8Wgijp~`Xo>8LBlb)i$wg%5CI~IdU zV_PA~(E?AEIo3tyEEmXqwr_!_&TLBJ!QuN4cvHkS;c|bpeQ6*AdPcC4rbaF9+&Bl!d8yhd?*#k_;%zlEqnddU|^gQ zGNlp+`~W2yH{i={9Kbvvw}ZvsR3X8!Lc0cp2*F`UaAsieHJ)~ca=*O&22UvPt5Sfs zGmXyeLs{BW#r1c2%0=;wp6nPpkTbI^OwG(5BYvIfiK*L*4zmwuKZT4`PouNcfr}y6 z9deufJko^r?LQ+;Ha^1p_H?ENo6i=8s7kl;vQpg z#ZGbh6Q20M;-#Mcb{v}#;_Ou66kyPW!V;dDh&C)(=s^}E0cIYH)F9&U(}=*@xiUXr zjdW z82A^(z}11;hdh%t;aC`*D4yQrNeZ01(({O}7}~n)j|`0?->QOfy~mmf>^IOKlAq5D z3v8~4Ag~Xk10k?!J#mQ$>`tVX14Iez z>4cTQ-unlEeFX|6OVhpsf!&rD!%*HW2Dv}#U9tLZPrmC>+#7d=w7}?>#J;=1UoVQU zaA_?W^4_FRLk#*5xq5BVSAb*S+vZsf24w?USBhH6pf8HitI@z3F=sUx^j5KAH5fDn z6MYH-pjHoQ_2GXjd0%V+e@aKH7e*oR!;klQ2L72z^VfUab_BVGn6yf)UW&v@&E&7j z`2S}CjAhBRg`Pp8>34AL>TUS=v-F+1(1Xkh19DO$()UC&>06|jc11I${Z6bI01sX% zdiN>Lg||9I@0*HqQ^~m@(R=;oKXIz~=A$UD_MPI=pErBj$Gk@_rSf)>lDelo;z=4glkspiF&Kh%I1QHqcC_zApB#fm@YKT_B>idMfk` zT|lOm$($j9Tef;`(;W0(*KK#TU|9`?AzrKvcy_knup-I3y`S)m4nSA9!7h1Iq>gRH zBqm8X>F;US#>Rq*sK z5w*`kY#tRF*=^3V&<%W$riNHTbUU$Q5gfZ$Uknvtwc^hF3f(2Z&q3WFXFIfz#pky2 zvx%ou3z1NSnt_>v3BGI4i~Q@%)}r--=yLhP9UGMVQ>euT7z$4GM-X+qjU zJz3~<(uB6OYETSqp&wgyI_8o^3=_6b$VkU+tp7VvN`XM6hOKvS^Xf;Ul?D-oy5Wqf zR5$T@pP(4R_6)Xe7@cJ61|_%|M*>(Zhj`nH4`1?RHC#s0kiKAxmJ>%rU0B5y9!lb7 zFZJXp1UCgiXEg2c`olr~kCSHx>WxWxlGtT4xp}8=PHKxw3|&w3Gq4DbL!H?32%VXM zX2tB6J(*d*@U4bqP?L$1YwV#Jsi+m}5F1|h6kv7p>dT(&Gi9v?*0RN6tv*lE$6myj zn4iI?#>#fCQtim4^8!g7OXo;^p}OZ}s9&w>_7tbQ;;|Bkqpp5~L}5v6iOXJrt?v`m z(N5*VrsB1djuDib;7bS|6i>e5@k3wzgqJBIb&sd2RGwIP8sFp;EKQRsY*aqin+ful z*7{L_dX?ZjF?$cJg|zK!1GWKc!tj<{7g)c?gPhCb#DTpY4=(y^^5TCDONMb`#A}|m z+PJ{H*E}~RJKp3sX~~iop-bMU1J`}z$<_a3ij`3p%p4U=v9j3?1601{%?-Fd_G~rH zMp#Yi)CqrB)FM*k3z*JqqRTPZ%xc6((;G3N4elP3VU$;Os+5USb;F~^^y^OVb9QaKxGm0`*KienLQE=h#A#97 zF~#UPlfSEOLJHZ8oA6=xaTgU)@eB?%c~LM}fgjXQ$yG&HFrYYP`2~$(MYv)98ZQ7`7FB8>dkVB=`mQK?jZ* zVqUzrxM4Pl?@FSXgjO@I4)nW&pzgefZLAIrTqikGUlSU*&Lsrz2@=OSdlI}iDS;1! z)y$Mfd9F?35R7Kbu(X%`3sB5JLSLtYQnXF*W@>4oYl1feDZPdycneOugQX{=@e8Im z4R4e{c8`9Xcv`^L0HxZ<$>7sya?6$0su=2@uz(R8lP0#K)hubMD^Muf9ANNbb1}7| zDZy(c4go0)Swvyf)(d~4w{0GcZCYoJ+O z;?6|xkW&5%T5rC&#m?4ul)eQYej(zEpgLcJDo&d#sE7Y zFwo`QlIh^aUdu-&tkwvn`0>liQvy$Uy%~Rdj0P}9SD0o|sSSaU(&n_Uy>~3uIOQF@ zgK(M8%QCUQgV%?}h_o_Qh=K|Xs`^5k?e)mW>>#EQySBuJ?W*$AVU4O5JAkn_m8fkh zcn>9Y^p@y5{c4l=JL`{wa&@J*Z>!*-%;-?rAwTjLO4L;;I6lqtPL;@VQ-7Do9XRI< z?=AKYWB7}ngWr#%XFL9z|LL?PhmVct)(p0UR*SqL-pmF%I_WD|E~i_JYMv3R_e1^g zA@S$3*lG4;MWHp-I+x z1;MA~*py@S9x-;PH%q%3ZtvcLtY7g)`jcvMlN0Gv861W&XNavRK7Ai6Z&wptl;J>0 z!sn(z# zY9QgQCn2zVIz}-KVwZd2Emj6c9x<(J0URYS_g3kvdx+9YvWrFCY_HpF?7>u{`$rcQ ziq*5dhW4YFzcIT|KipI71&ui{A8yrRKTtegW<);xK5|;Q;N^wcwnYE5ri7Z2Rw#o3i)%Q>uZ3I1bOpo(@S z!B+^*M}ykj#klN^f7B z{ka&0$dsmc!ReNN4A%5#I&;$tclB;U`Nb8eWg1iR&4W&%donmm!qFv z@XGZU*}@+3ax-K9&}`+=h>g>N5>VFkKxjVVGI3H2QspOY0vqp3S4U>J0`;4`zF2T~ z(zU)UvF?dxnqckN+#U!VL{`#nG0X6yYIgi~k=T2>_JV6>;712jE(2tjn-w9ZT*d;! zY-EAlZwxWzRV;uLBJ2Ob@&JbY0cCc{;EGQvS;Krv+k>=LYkxhp`=>PO>UD3ZwUnq^H2D^d<(Y?m-z?HF`b45kWA{7Bv%iV`QTACcqCr z@+k=4{b*F{cr{9>w8pUot&$B~L~y;h`zddZc7@pXl()Us7(nLn6B=SATM%Bn-&-bJ zdF~p~`JdkGlj5jmv4Vr2#WusuhC4R!0q(TG#XG#O+QrseeVJlx7D9ff_QPqI6JGEZ zVbOon3*MPx!lc|xvHeGf>$Vz19hbf6EfP7);7mKIKXwsZCmb#@=S8HabxsD^Sb(Mj z=G+%lobfOs8;RV5@${Yw5M8eVL^DP0x!4g|%sAt^`Dpr=$p~n!`^mxN5YnpKAnHpH zkc>qNwiEbWud|=;8-m$uhLGHW98;L=#|BYsd z4$R(oMwZN@TPSw#@#Z+^qkpvVP`jDknI7o0E`Vt_qX+Gn*dp5&SEIll&(e?~;&ae| zf2n+{gU3S_-UBRfnv604|JL9Vu|9Ml^-z8&>%%R)RofRU%6T8!k{bg+^71^~K@ye^WwaY3q$a`0kg7 zsWbqmb)@z!`Iaqcm25!r?XRNz2>A9gG4P1Dl~}SDI&+jV^ak>`d3Uv#g_pI!!aL>- z?>&KrH@#QeY4B%wa)?!Npf@-ZU1)s)R^8Xujez9bl2pmB!ZkG0Kte;XGGrrdWs+N6 zi?fi%;25yO#Aae8)8>YmmO_nYv%2}wNg{U_gyt)XVXK=l?5N`y0dgNrGVCP9u=gs4 zouL?Zt76yy7#0awWo&%@q5ogL>>wHsdE*pc_R{~2FTtu5rl+E#?9vk@BuuYGfnwOu z&V%I3ZKMzJ<)s9irnCe*r6i5;Vho%zG7jvsC8t6l7-nsGZwx>v9O;k+#Z=7us7Ut(OWKDz1*hw{it_z z3pf~w%ex71aF0NzPrUd2zsSavyY19(;4jINayMB_9pH`&O#RwBHOSv5jyL0PwHEDI zfowfmt4cRqL8R~Uq;I^7^_UUtxufW~$>FSW9zY?xk>TLRD?~DvgAmE>+4kagKX{8zf0C%$L@uIeYT`s;c2A`3gC1Ff3HAtrPMN~U>=^{1G1FPf z?3Gx9OY~`C;Sb)9S{w1?58fX751RP>2XE0x4tK2!n;VZOBv%paO7MAtmr%RzMlFU4 za|%y-*7~%;EnhUHJw6opF2UQvAoZ=3Nn-AgUO&!I+3+K@>Ke46^LeEJ6jSBh>Yyq(4kX4Ok};nN-qEPbdHSOCzLwh$lJ;eQYC zDU$Y5(td-&bV(~gTN-`r4&whrnC?c>xnOoknIqmk;mw&KYu`+4rNr_{5xIpb@F3y+PWaC9P=s$(!SnEl9`FN@(!-7CAqMut!KcN@4r{>>YW&q-`brL_P43 z&Xqrnf~x`J_rbI1K=CV{mn*4rCG{YbwwBZiw&ie{MomLec_h`jvdw_=U*7kU9MX7b z^N49Pon>O`%GRC#qow;#{$OHBbn5=UO`O!%=MNl9@D2G>d`Ob$@?>UCOWnwpxO_AJ zbg*sUp(Nje;7PXqQ+-%W4--q$eKWDo7M9^`9^N(EGkmF9 zF}@TMHRV^U@Ugcbscuwjt+8V8hpoA%J1x^!qT_s}uJhf+%p!PNZizXxO(<|oG@X{~ z*UF{cJhq9o0tKl!A&x|kAeQ0qr8J0rRml9 z6liuKplMsn;6U^P}KQV2s|p^`Fn%FGQlVG^2DNFnI9Ayf}>` zs0=YVl^3V9+?$u-9>)>V++=nZtJ?drwQLb+@5}Z7&XR$N9Hq1%aH2N{1wqI|?nRk( ziB6!SyDjhF^CWV@(7QU=lr4H9QhIgpxfQZfA>*(md~pX~+b%MzMK}^uCLB$(}Y|H6MFRVuB9_PuP}CEg3euP+zQC|`H*Ww~x(VRzEfvYz;^$gJ@7#W$$0 z@a5{?YJqtbzO6|P&QSXQ_CXZDAllgyKW|r;%2UK=r~C2(*Yxu>X<}YddQM>301OV( z)|P3Sr4hVokZ)|%0nV54;;!1PHeyzt&yB6A0-WTx9Hs}c8?gClr45Ox_H)R{sLOE~ zHroYq*uWH5I~XUTye#ThAi}cd!`6tk1j3xt8usy}wd--*El;ngdokA#M+f`h_NLDJ z`yJ)M)Ml&1;M;M+)tq$ zQ)^xaWWScRm675;-i8tcc2mz7%Zt<4E?YEG@G}Am0BN45i7pd;SupVoo#@NWn+Xcz zg^=Yedh(?<LFVFF_O9Lj=DdIGNxk zg4D_5hOq9#)S#~f$O+1(ZD#4602BCl?Gb|7@c0hGy3p4tj{-w`j5Wr9ljENtNq``8 zq{lY|7F_6?=5Q2%>g1!CKJyid@zZ_ph!yUN|Lko1=WWy@^Ew?BI91IQQ}_8|h4)fl zmDp73jTTL5rWyF^Qs2jRldSitDEI(p#Qbu(uMRF{17`aMAvobqUM7hzXZw8cP~cIs z`kZ{RiKox5!Oww1*ABq};!=6WvWz&=K2=e{jQ7(Q=HE6D!3o&%;X%t6C51!%Y|4Zt z=FQABkhKx9e!);9=aoKZ4E!!&QHwYY7t~i~ipzh?@!^HwG@K{aUh8u!TkpO2eIvGB zxzVmUxuF9d<(5wHROQpq0g&B`SzwsUS@0Y0Lp(Z{fYYp$rz#Jn2oAF6O}q`Urv*T+ z@1&>>o~vvaw6B6e??!3VnfUm#32jGW1}LJ(i#xA_G#o0P!X<&RNX9N{DvQ-7i;u7K zwRMdLPCNB#ylYqd#}5^)uJ?K2yxaSFUwiGJftx?}AvR^;qj2SV<_6#179PzxF8pTFM0SNdN(zuPku3}y`DbxAEpTkPZipj?)ir62xoUxz9wv=6L8E=(c?7lzP#YUk(^5>PZ z8AFO;!=Q)@3ec!Yn#f%V0lG+ZTItIzy%U7S_aUo73aUgwD$#IGRL9u1VO@}+_uAQoBgHYaO;dB(Y3Tyjwrj#*D5gh9$zQBIQY3YQ>?xZ z64Cz!?waoNjTL(i;7*>eRE$fjR!b!ux$E>_G+qisNLktX)RgQ>k6|d2d3e3(U2Rf%@c%f%66LbD+f+&C22Y5u7AWg`K0V&k*$b8$`;JIVb%>KJnEaG7&dag2ch#Sap*Zr-gk*# zpYxrPxDV9E7}q}3jnRd#CSrXbK`CLqk?pUbZCZ-*UDbbzSl)M3C@wa^`Jm0xC&Yvyvjz&c1(#>yXiumbiJ~8JIMD(JgzN(nH z{Gq$!_f3%e##Ih&c#+kA2_XAp_{GEC0;>ohl`ac*^FG9ZT-|~LZDQJUzO3rbELRI0 zuKB|n^o8N*#v2E*cSglmrkjp!L-%Rj+~ zTSzpuzwMfj!^4)EBo}@qbXTB9J zU=``bJ^l;dnKJkwfD@f(*pU`Qh8#5R%yp@=a`T&TzHO?@21hb2+g~UqHDMhx1Lkj> zHoNaYp-UWXg6OJgKup&Jx^m~g16;*%;1&}n-Mgm}SF;VS;Cn=ED>Q=1I~W4C9Ytmu z=HypZ5W?aY@!&;Icgz&7cTs68?+z0;Zyu`LAnELgiO&98kVy;Q`;FJalOR-T|^ z-z(f5@PFsqsN;l9>84Uy(f%)0$@0|9Orrx2DwU_lxJCKrIM#3MkG{GX&QsbNe3Xa7 zXdGB3+U2fJE-Y%~#ZSQ__I%#UObM9NA4RvTz!{k-0Sg;xyE4pgSkM(8;n*hm0dkW&129ubc5)j30u;q5 z(^xLeR4QJ~nQ1)h;tDJJS(F<)T(kj^sUINtoGTO=c0{~#!k6P}MeGYMDwuj<0u1;+ zp78m#y`tzRU;BP+K^dI-qdfiy!ES7TGB=(LYBdBO!G9doS*`XM?hdh#>ocu8g)t>? zd@Hf$CtvqeigL4%o^zU(Qi@Be);2IQ(ceW2RQ$^~MsvuhQ`^>)9x0Y^{pNe%q=rjm z@)z^p_g4j)e)ILv9^LF0_T@*RkUXB{&k<7%KaM@csin)a{Y7Fsg5VJemt^_}@w`)9 z^iNa8=;OX(b3B$xpU6?5pGXy(h#H8=E=3#(4425f&px%w zrMxnFnb>q?GpSsE~?AMEkX8nMc0Ut34T8uSFcO(x6fk>S{JIblD!WS z>>6h8)#4qtK=XxG8)oEWVJ7;|)^fAfLw__vOpv{EEZHSkrHa#^abl zPLJ^TIg-cCeKCl-3NyL>OR5<7jjtH_m*#(wR-$zi$HDV@T#(ao9+AU;W1uY8KO@NQ z+2Yv(e|QD9bjd$6jmq*4>WCG6PFwNYd%2l`_HFzx>J9Z^4Q)CE_+9A0I{Y{P1AktI zj*IL!(6j`NqZNpZp=7FDR)N4DjsoL)qCMvlqnl*}sI3^j84~08gfxTkD5Kjo#298D z?Lt74NL0H*q8x6P4cJXve`LAbA~U%yW?!kjkBa8~D73HE zzQui%;YS5Wru|vhKXBum!lE5gm%-fNtOL&eoQoIk_@2f_o)3afT6*m}#oS_lbeDrH zdBMfufa$_Hf#8clLYH$U(Dq#}K1wf4jfQWleRmK_x0x@9oyGoI?Nkv};_r@(JExWS zYsw#G3)kqJo0FHa`nB>tVPfbm`8iTtC$ZQeenmW4;%{5}G>}>^zV8xLO1l?dN9#?H z+F9D|_|W&H*J=VkCqYW*d0WcsP1kK12`IG=fLjQL_x4(2=Y zNQ(5CVx!wX7NIQh9)GTjKY=!!-*LGUg*d^(Z>Ernr z3HAVJ%ZK&HMjd536tHwjdyuqCC9N3j^Jl83eMW2zl)&`yfy;gV_mYGALB%cDRIT5x zXNlLAbo$Sh@;`6GA}z<}KwXXh8%=EQ?r$%$8}t5i|)c$!;U6PxHI=x~^jH_o>BV5rMH?Me84s{ccnacY%(a<}cKn zx{4`8J%|0vj}aB&FNCkDj9}V#zRQJl_cDg5@koqIKhaer{FusP)ue0n-9AZ#JPX*{nlVtqdL@rT5PhqtEbW2JWi&w>DzV zAqz6_;0E!``poo(^U$BL^3291B-FI1Wb~i%DG5ol0VLDS)-0fO3Ol4wv>174&mM9} zkq#vzNE32M`H3`?C}D?`EWCx`L9O!)CAY36iSj~uo43jf`&@Nu1sDanJ7*5 zn}VQ}O#00(n=Fh|F;TaK>{Cw84f^6BZL0HpzRZ#!aVCY6erpiQv6(bk=u2I#O|%tL zB1Vn(=OC2k^6?N+bJ@~ikWR@oG-_uMJd0p5n~>m{82-uUi$fD2yX>N7B4pP+Y;XjBFC!Ytce0o~(eF-@ zdeAv+p*yh2II4Z!ME^Aj4jaFgGRK`<${oS6EikrY0{30+|5gt0T+v|;vgEXElnadV zQZX#0)D>7T$A6lMk@xC+|4eg&n|=`WT!18ZLn^*IpoM~F1hz>Buy*tD0BBk!YDZC?H$U3F^flY0|~-^x(=%fI%YZg zWqjBLjj9SpJa@AqBcAddBZ?B1Yjjw6#Gl1p=GYC7c#3=D7kq?Ad?jf* z6BBYl8%~-x8rZZ_S_TuLT+q0<3l9Dhtf&S**U-ViKZ>_<@EhPgw7d?V_zv?yjkjh_ zJdFJBCDQnSNT)$lj`=ZAA)hoxTZrj*_zQ>S;X9e%hTYN<2!0oKOY6Zp--q1NsHB)b z$VdQzoXV9idOo2AVy)rN`Ko1F9Zn6^rkLwj#055c{;kZVO|#6PpixC$*3G6xb?B`y8=vUdogui!T zOyIRf{~Nk;V%fgMkCdb*+KAsC^pG+%(K|B-SGXlkz<1Mbg+q9;?4>ey}jjlKelpwy@|r22{W^a-#Z$O)z&P0S5@ z1*|Plv7K+WvHg1j;G<9Yi(E(m9CBlUC_|#vi`(Tl+qI=A6V@AlQtpFeJT}SpMp3y8fS`C$}U5hFK15hhKpF>qSjPA8Rg8Oh3_D=*xqk(V~b~0+% zPa$C_3i}h%v>_%Gh5ZnKpgBSw?rg{?Y`cghUPfWtqs5@T{*2Ss0)ywj#f#JEz>8r> zY3npv;YsEmzFE-qYYvN7OARH;_#7|gNY#s6qd?*OTs*wjpNr(oukQ8doGNY1-k{!s z80)K8(dTl4GUf%||E6iIZ)XTx>@1u9yY>S>ocS6jie7^R;{LJLL&xWMpq1|z)LDe8 z5WE{rXuSy1kvQRLd}zH1&LsF0OJywcs{j)@OK7LDlqQ?R&si#im>?m z_Gf8-UF?3%U+(e~kST+|z~E0jETZ@My`7~rJde{a`ZqW&1N z+^dY+ANlL_PxHiAANdEum1f6^9F+!m+)=+9(H%)V;!>soo`pqHgB*8a_m`R2#AdeN zAEADCRwJ)0U5&i8_-TR(fG2zfy1G6U@Fn9hm?asZfd^*`c?{+;j8f^0^M}OSpZJU7 z;E^-`+hz-eBRI;?fa`kDrVZC2o?Gbr&cDQD=OHhO9A_%_A)+hP@K@KIw3A?*kv|O? z=@!a%z**UN7hR`^vK{zX181qThSU5;UK}s;VmKN}Ek~S6Z*T;#U5+ahex|`656?m` zb4=YWYZ?`R%yq1HpXR}HqF_8d`+L7TE(rzNY0m%^ZHnu^hpHVb)_w2ywWH3W4Pe21 z{M+JrHxammdkE^bMDo3P>18C-T*E|pyUezt(TC%+eFO26Y`+(VraYh3Rg`^|?i4pK zh;oQWe(?XKAJD{_jqXbEn%{cqZ@c~uzBacY(CR1u=#yi+$l6rwIbr39n!|0|ij-S3 zlf|7kB39v+fB9F5+__eJvEgUv$G%_uSL<4x*!&xe%E;3GyMLw_I~FcE^Hh4B#lOQW z;Y4)4Rf6OU7JUmlN6oV^q*(c@`fiReB^^cq= zCcP0ligmSV)tgl1zLLy{0PHAk4}c}8I@u+cdAhR?b@L(=*uMZe9Kd#fG)Gw)GCoU> z2l^L;jn6LQ z$}ukl3cDyP@e0!MH)wK>(ng~|YcB;i%ED$w5$mv0;%G+FI#T#Wj}~5s)dn3nz+vTU za|2Tx))GyBv&C$8af~(YbSv-(~%g?OaJ#nC+$}Ss}I)+mm1!-a0-VQEfd_WmZSB z-bG-&M-}TKI@c%T(wy7ttr+o5$4Mc`^}Q)U^=;Z za=K3mzN!rCZ1Z_^%(3uB$8D;EXRv2=b1WgPX}RNQh}JsNIDj)mji!3nO@ci`lNJl{Mz%*shth8<=bL7kO8? zVnn~3j>+Py>P|U7iM7Ckp;J>rO{Mf)%L) zga2sw0sq+*5)-S%d|GmUb2eup=`jQ#wvYt!n1C+i1&iQ?nJrP zPtLlhi(0RhgK1~9*Rqg*aFN%_N4QpClh^u8(?4tp|E%fY%nO*M);jH^QqMKxp9kAn zebq!cCn+mFa7&q$Wk-?#%#0;sUkC8U z$S;Fz94hv*TmO#mKhM; zEXdC@2dA}Q>p*-{V_nhAq3X`ZEyrWst!lgeU4rP^%NnTvk|1vGWnE@gL?o7EH-B%- zt#1vAtvLWh)7&%zOAE>^lbd31D6#csP;8wV5nIUH9Tr>QB+QaxaVLa|yPnM`LRK_+ zviX*X#G0Wb*3PiRQip_W?`s`vCbq=xepV#XgdAsw4~$qmIo(5^8)aUJeo)ippa{E3 zJwH5Mz5%6Hv`S*8;@=j>y9+=SADj{sE)2Yh zSy0noZYfs^vjG=vdLIy>KC?W?;=Z zSa39ajGjtH&;0oh%*XT0AYvXvsa=|aL+gT9D0FnkKUhGsNjTU1`z$aVoH;Q;-b~2p z=z>c`z)_>JQy*6XuEEYpRY^G1l=cVBc^`1#J}PtI#ddrTr%{NDsTm8kZ}6^BPlCi2 zMX%U~DEcwYjiQElWfVDYP85$ixFU*k@@$)<9{^*K#`)B7J5Z2{SM#0=<(wd6I~q|B z^Kc^yoW^hXjD}A9#u%%(foo)~V;g=Bj++EBtrN?q;XjUM8U=13$UF%O@n8jJ zp*BpVA+RUF_=O~{is9{AHr_cMp9zL`%KNw`(&(jCqg2cq3yHCcU{@q+{IsGgc2J`I z;+F68a>e)@Pe#C3ZynGa-=kL0bW?tE%V#PCqG7fb6_`2By6@!16c(p&LcJ&}IYIn3 zAtOq3zQ8(NG<3?07V+z{;{zGvtXzavzrF5w-BH*3Cou% zv4;2aCRwT4PslaYu~6iXE-}P+>#bDLG(O#B&Vi9?f>_g3P$;&KfUkeegmjlE`vM^d z6_YX2R#H#!8u^0vLrKJyx{$8y3Z5uX!XNdiiA-r9ebuy4nVDpWx1%Y`}tZ@dc zH#=~269!5|A|JsR5v#wl{7BDir3NNVw=@kYh^gvI74mxY1BS*4d2w#yZ?2m=3F(f# zfb3C3bsLJV#@zo878s6gEclTH!zm6iG$fxp9bE24hDJL;cIpv!e}9nSq4=meAD?Jr z0-MqroVW1mlqnr?p~*cmCbj^wMbVS0A?g#{&W)Ofhh7=QHF{`F&>HloF>yao7zT?_ z!@-p|V+ENoy6sF(KDOl^hcn;9s2azMNg9uUZqTYEpy z91`H@a$-&Fz!@DJTk*tLZLa8l zBed5S0~g+n^{V;%|>y(SfgTvbvlc7c^TZ`EIc){-m~wUg`d# zK>A{9v^{zuB1J#NJEw}{HEDTb)l#cY%uCCP6LX@nazyGfXsi3ukalQiRF-sUHMD1V zipO#XQm-u%Nsg=%NV>rrDqv1M1VyEe_zp^$*uE6rfb$$#PIE07C11Mvt!DW$u^IL3 zI~~FFq5l%t?Jd!(;)K_kRjdsQBxPi^(*nONx2iQH8a%$w%F5`}@vl9&wE{E4>{!t; zWbQ^vx%blWGApdXCOcAb3Dwwjic7WwX*Y2n&eeT63v|a}7LZ}W2VpHD)z3tSR!x+y zkenkJFP$}*#-Cs|ZVH&-p;rrdYn_XRz&?WkfPLhO&1rng>W1;8Y{j?(WikaJ_Ocg) z+`LnKc)K+_{t@Cc^VN)=^Ri8&nWq+Kd>1#9;EfmwzvWxrU`F}qOI1!wOZF>kWv*WMM! zKWbGZ_R|e@XQ2E6>nQ`F(s0Pi7LH9;*yU6x_Uq6o6hUyEsNZCb3v%AHTz3kR4@W6) zQs-CfcHNx9zSJG>0SdBPo#YjB77Gl=OOiXxk)r=BPgXkyQ5zv)bOtFj=R{td#xEo^ z4B9pU%?A=3H2Pudx_Fv{%(hAvZ4lo+3=Wb;?MlaN#X*mdgHlA-M$4u32n=ep9G(Q1zUGz zp;L+$iXG2eHC3E+IJ^A$51e%i`(AUF@uHh*@6IuYkYNrJop)NEHgxv{NmnAB#znHs zs8<|B{l>UNEZk{z)emW6=T56H*dhJ}D?xKo;n6WQi1~L}6aThEkwRj`TULxX^cr;e z=v~$sn)qa{Cqdk;XPM&IZflcpcS-%*_Ls!SKE(x-F0P*;25047A?_--T8qV>SXTtL zylma1A&9(o4|My~c=6RzD_!i{13Ph1yy&_NK>n*xUUYf#RL#+1mtGMsZYF-}tCq`T z_V%eN=&0tP<`dSzV55H<<>ecb0^fpv+?Zt4JCkpmLbOc}v+#|bJ z|1L(n`~|u{P9Q<<$H>NSP1W@8ZQ_HNtPByo--?_-LZ%ThuJ@&qqq9m-ewpDFQneQ}cZooXjPDKaP zHeqM4CLXb_O;`=25u7QsNrAOT{;OUU=+)SOb<{e^b6Wq@wdJ>1r4flPAkk|CdbL~N zj*qS1bgbHM{|sG=6O}*5RG%s8KgU!b=~po|3i_&nUNY&DHaF6>*uT~=P|coUb(Ebe zR#jvps_@|d$K01dM^$WV=S=DD4A7B;1V|u|KnR5Hgr35jFc~mNP!v$qfT)OoK|#0* z1{4($H3(9ufI(4EQ9;q;01A$%prCj~MFsUbBEl7C!T zQ=jzNwd<>0yY|MO#yFRF4sJ8WA-rrT45nb9>%XXBEikOlvm@ViX{+Il1Cqi$MJPA^ z7q{6|kRTiz<=RYp`++V&&EjkL*)hJLT~B-)=n?h8qRhbMwQ|B2+XnJ5hpTDF_~H(> zP|=Ps;-$oJyLzZha*268F41iu!Uks>=qx>hg-ASLkB%`t~6K+zRImKX!TQgr*w%-JiPb(;9n_?}=Z! zJn3v96^QL0q-TrzcM=oD=F_oRFzB}~u)mX`vT~1fsnidjBqkq$dVe%vKGtpvVQb!7&eP?7ASa+kwM`C442b|+O6Z8fc6NS}@f!r<`=}*-A z4jaN-lA9`WZs?pU9x;9K1@xA>M1(#J7e^)1Je>E=Y$l2$ZA?4Y@(t0gTD+!T97E#4 zc%d=IG^O4YGm^Bb)THw=;0!7pO*x~)9Ip{@np{RYj@MpiPFMC-ehrz!ba4r7HfK)E z?-~KGxsn&tS#s@W_>47%`w(@ z90ZOjU3*k@$4%)x+Pj*#&h6{as|E#HSjUyRqona9BP8d7Ouh?!Xx(VHaUV%yCapVd zKVBd?Lwx1-jn$5dQ#`&in{MDEUBN}4rlkjTF=lS|X<{80r<*>`$XN1If!pqrRzu4{lt;=;J)hqzM;K9(Tcv(-*B= z+)SMQYnLpwC9&=PmO1pxGRTG4Nhx&3*7Agt(s21Wh^8B~R>W?yC~T z%OY^Fo$0HD)SQ*+!%5ec;>}E7C(N;O5M+s*EMI~3Ce~ZuD*k_3tQ-l$I`Y3*cBc>X zELk7F6Y7cmclzk2li=B^k;9F9sMcoKvo_#*`>PhdV4|4!Ui&E9hjWi*dng8^-bl{G zp+9Ysh}jQkf}4a zz|qx1U3}B6>}Cnru%GiIH3vRlDLe+OOoy!9!TU;ai1)dEU%K|0go*3M6nf#;tegwI z8o$qL9RzY%heIKVfm5&6e~4EFuUK1vIClAc`7|wIWp6QaH)08>0xxSym0%5r##4o> zvJtLox1~Lx{1bF5`D-kZ77R9s^7*+)s|vOh(<8q7t)=|A#fqz1Hm`jQuK~<;EpiMg zgJa8u`7F>~2U);_%8p`dISLFZieri`r47Y?AX>Ox6)2D6OLDDoA+wY@z+~Pkr$QVv zgB)cSSso8^9TT_Nl!<9_qYTvjpsdUABr# z!)YAI+H`*D(^&dJuGz15_l>b!{P*;PPD+P%u+Enu+Kl%7YYBV&>BJLKq>z8^b3hP&U*jpTTrkXu4vSS{{e_qpcBRLL z1wagEeVok=ibEr2)b}h1NOH*mZWq_gan>gwG0tF?vgEssw=tK4az6oqLXfAs3rqq7 z@cW&zJ98Cst$N&p$GOp)r~q|X^!_kZSnFq--YyovOHnUSQ6_(kIr!6(H!?F!l%0!D z@?LbMMM&OGatljKsWr|=LCOY}b|={vcd3NoJ&4J_d{uajl$<&n0=aLvsC)a;-zoC0S+vc82eL%f;2ie{(c(_DB@#&chV4 zdQ#RPyYsoe#V0nn8epWIIaw#m>BGkK(O(m{d>?FW|1riF)UB_;r%T1K3SXWWInGyQ z&Bjogt%lO(ahO38aFmhEeu1yl@;akO)Lh^*v5z4`td%twKHV^Uusq;wVl@~(GejB& zg{W&^jNRvvS#WO0!LvaPo^N5=6CFJB)Zlr_89a8?MZS@)=(x%37U~vXo;Em$Bi92Z z#W4-VM6vK_^9;M|rM_g%A~HGR?5o|&*QmL#MkWx^Rit#+eWXljR}nRiRr}1YMJ#Yz z94(kaLP+A{h#Dt@^McW(608LLL_0F{O;ZNU4su_`G$+X}OuAwBMuu1W4K9BHT2^K5dAM9@5Jl!`+6EALV`LE}Pe|Z31{9}f%(th-BzIP346&7(d zI7R|)T06^E1%F#dX8DFfRXyZt-%v3lyH$!R{18^%gXbo`a@;`Hb+W6 zKrr3hZhEzt{e70#-Z0yT&@_nl5rxw~UGE6qh}ic)VkSB3g^bQ{IWz1A-vX`nQvBW) ze(B@?0H*ix6>9F=P-^@G<&FyTX%^_Nr&;hj3t}qFZ749L42@wD8d@8>aM4G}gVb(| zh5_I$iYV|_Z8S3OudJ8H<_e$m<*mXe!~)7%(b&dXrBnHpri&04k2isdTb(U6&8zrT zK$P{RiBaL$uHz}oCkw!L?; zZ;yc)d(%>&;|d847H(>V@N)aJykhhnzK+ndt*?V3yX-q;tYt=)&=w-24jI;s&}g)h z{7GXPX76S8DoD0yL~+TZ%anMNJnF^tuXq%Dc!$_zHdxmf*))3S@K%&7PSuOyf^aX4 zXR1ZXh2A);Znak}^X+h{z%&b1`CWCFaB|8s*CF_^33TR}C($q6Yv7 zla-%2V`F!gm0qm)uoVixheX(MDR>F{k0NI7$D>e-o=9p2#U zq&L=%_Pi&3XGz`@;JvV@PR_^{XI<%QB5wb(QwIfRdpzY!5!2dacCkyI^8Kt^6I&)E zz)p&ivg%o=8`hogHN~oDp>9B6;AbH-7l`tWzRubgiW8TKg&Tn?Z}pOqq+(w(;iU*^ z>MPLqHWQC5%j*C+Te8VlU=*cCtq{%^b3p563&nFmd*>$Kqe+U%mTqmpWGln2EVH;P zT(hU0o6*t!ajWm3<{|FP!e_I1b3kT`LXLc})?vO_-4$SBT0Hx1aD8KxN9WA8y6_In zY}xi2W*)`GjLnam*hF*hV&XPW5vL5yY&(GRsy6Whyxpti*59l|o@1Sv*bg0Fl}NA( zt16x^*B5A<23=$V{XXqZ+`FZI&U2bB)(^~V1skgG-tcv(q#Gh_&|#GK$0v0l>T82Z zay6OSg{7x(?j4VUCi9S|4fzTrEzp|W%F2?w81_hGRJ>Z7* zGaq&-f9d3JnOPhv{R^a znbLmesze((VDhGHxS)f!3oWGU_^4XJwG8D^wSwE^JnZ>d6WxCBb!>V!AK*cySV)1l z(wZN9S(UWWg-bouD@9MK|HO?JA$dJXy5Lf(1X}ktxsYV{T$Ivaw#g+9*^%TrvFisY z8fxq|hkY9~?J9fMkG`I!i&j2P(2Nu3{u9+KbXd{?YyK90_?|g2fN-o0ZGkBJtz{4U z^`pMSn%Ln@&wgT$KU)`dQ~aiw{fRGMl)yJX=?cVte}7#KI0`6;P4T-1n5~a}rv<_oQ4Iuqs zhJB!&A8}}lUH(;xj62h}WtR9Z)gRktcLt4Pl(Rd&Vb)q;WJMwwZL9`rsJ@M>Cg@L`s)N%?e{7oa-hNuk?9!`MQz^1F_b=?uErWMKsURUVrU5jPmbP-ZGy?@o zTU=@rJK=hD;+we6N<4z5GZPo1^r}SS0Sp%(2w0!X(ef=SMInXj4OBJjYvtL(=x_mE z#g7w0J7pNiRQm{dNz>3te5@o9yQs19G^!-kvb2>Y zMgk^#ZwvoeO0ZoWas)jTI1kEpkD0!1lVX|uD=S-n>XcR z7%t{$#G&rC7^kZ^Bnzx+V0BFm%MEH+j=`|JUkytH>ab8}hBG3umpKeM#^%^?{5d`x zH#@^oORx`FegtkP%J*+e#N>HsfWKvPDCpvUv7K=_F0;&1&Sg`|3b9=1jD5)2o&9T) z$j;hoytzDQQ|2%zjKFX4N-zR{Bc)ppkkVb;U%{~ZJE&*`({oua9Sd-*Q5S{z3On5m z=BofJ#hGftoe zdSP0TwA>++?y<-C{D(|k*Tt~MGfrH~f)g1-{mEizA3xUBLH{F--QmPw$*`A){1<8V zH4*0f))wo2F+j!n8Y`c+K3#xp|e5kKiOYc+lS4gz$*!EXuwfH)P?Gl7yN0-o0%Ef zkNaGFl4+E$Hh3nJe3_*Y?P|6OH-S*=4SCZ7%C^8exQn+x@db4sT+(8vC7FYPY zYaiHeRrs?lS3PR$@aZiB0sa@@m<_gmf8?q4RkU)w9vwxZ_j zk$xJhj7fuybh229;UUI-<}b1j_wx7DR#%+mPtS&709&4vhS$d z2Fl&oDOI(>2|Lv}WBut9oMjbQM%x?P0yRWtWM3Y`jsf9b`TXhauOj={O$ssoFNl zmb1H6iD&E~N>+HT6}iuMsS%|Q`YY@OxBB5vy{>asi>zSRzqI9uh%FDb$})<(mWtVH z+ZR&SHMjdM@n5D{3-RWDb0+_&T%+RmSVu@v5l3lZ9KVVxS z*T8Naki^-o1#9=>MX7C++#?(`7Lbh{=MKjTI~R%|>}q7srWAG)aF0EbIy8;BL88=( zT61Uv#2rh)mpU3M>6V8(_mkqorT)I!e7p4>{w)^#dY>={+OVH^v9Yp9&Zse~iQGjS z1Igm<2mO|)DDTpq?ASxpr@>Ub&F#L#Mb8FO?DOyShhSN`8^=cA7nX7gj9Cq?Nm~t` zoP8N)*3DT6oi~29zXAqC>sLckq&8r~(L!4TiM1CJYfA$TTq%YzI~|+3W%68{x*O(#9(zg4r=;SC*h zIBP3kq2|7VuTZz@N$IZTpo}jhJCO$o54k?m+;_=NOscKHS>z^yOi&iNEH;gvfsEs((euT1 z8^BqApqAF1^X50WbMF$bZt(X#V=i-hlM(Oc5+w)CwLY96H49L(okJ=oy0YXhmJ~T9 z$<^$ljBS!HP`5%G>_1b~@A3~9k8aJ)vU8vG>xq~VPMCQGn772fZJ{hvv8jF}{u=IwYNn0;5{ zWr3CDiUbDCq@vL^qVb=kwk9_F?qnmkj5!LXrOrGq4pTuH+|F>+0>jyx=DvhU)cqR{ z{({P|YH&Sn_PtANdfT6u`#AYTuKa19;~tEPTIB}Za>e34sxNuR-^%+sD^<-w&hxlS za*NLI_;V`b3-AiGQbr7NxjvdC_ZQUyd?rbvJVn-#EOW?JBnODa@AwB#q#1=al8g3A z&i0o%{5~$MTI&~{YhK-Ri($o`mQFV7C z*8ZLBsUP_7(1h>Se?N3?e32x$gTRz-b3^50`v3BZ`uBCU5po=Dk; zp;0Z)*(Z@D*8ecow=M6I_u(yN_db6|)M9md4P8(u_ey zBG2t28^(tZA;tv;l~++XL8KWqzTjfSK@$&y;D}}7Hl<3yG>K(EeThtqd*(4T@fE%b z^1mUPI3RX@=TEQw2vrrD$VDCZk7%TI;}jrBE@G*i5xyizml;|Qssf%vJrAwodQqy= zR5>Yyb^EfAn?6YsNcP(c@^suKWw2vOUPdyJWdFShlM)iHBR!w=0QM!v9haSod;z7& ziyboQ4(E0++YQ4-8^~`tO7c&KoXf#h?T|&Bx-Jkq5BM`j$<^Wn{ubTw4w6b)Ns>eO zN>Z|Lp}0ww^(L}jvaBO-6HosR2Svn`k4v%{$b=@FaZyd{S!af-V-Gs$f6=2iX{;y`SGO)s z6!k}d33sP9?{07Z-G8zss=IrW7JU&&7ez;)w`-*7my}abP4*Oz<`yUMJI)rj9ZEmR zzUip{Mnmcpp_N=8XbHW|!v!$H)r+h2Uvk7Pdhw|cDTv9a#Fa3OV#FDHuQQHZ;7&V9 z$|!wCdvWTgoX0U2H&ycK4z*QH`DCR)43>#QeIN#Rz*V9+_$l_4F0 z&}yH+$moF2@qcll)f6lRNkuUNNfkz7P{Zf=^B~I^V^|sks+=s1D(1w1Dtm{}nuol& z(4uxf)p(SZ6;gdyXtP3@KASByH+3qIN@p=K%>+eB8TBZ>K88#07Oyue4);z(v64WP zLh4k8lt9B#*DVKl53(mmzGosUOA$mQ;mOfO@ATqq@72uiM`>~zh65Is6Vi)wE`AUl zX#JV{HgmaSu4IfG!ohQwL!Lsi-XX6gNh3{F`Bh4i{^+CvpEQ2!W`5h)I*?5{;0Ni@ zx)f)2li6dK-A-krmLwCBxVthIAO6;=`T49DiZ(CHh&3O_>>6)>A`8nZKRO{Sn}%;`{EV66fqNm7F15wVjwxj3GJaIcUN*gtGrP|Ud4ZAZ2&(C!vfNR^2xq-yLf z1;ytlE1c3ZP#oXjU<~2Ju7R#yy9UK`>kA8RxFb-EPYFIArbxpd(Ho zJ;`K(_yh@#EDFzcXi_3dn6wt7kmxUH;+pHw^l+kh5UKW%*m)h=Y!JUOX)W@uM{=pC zWOApN#^fon;(E0F!xXPxj}}eE0g%A0&2K<*zUX~JV3>}Bjtg%HR3UoFr#A#Tw(N(W z&)i+Q3jdx)YalTFY}_Y*t%>}30bi|-JahGc{SC^g=S=3x!Te@`$zMO(?gQrM@W-As zFuOs%j^8Z#D(2Um9Bh!^nfZ%xF)trf*&v^buH?S#|B4}E=e)omeXS<4Zw#D@CF~_P z;@{jZ7Bl%sY+_O(zF?9ln$AZO5~cI;&khmQ^8K>fnhD4 z!&jPD^it+;Wb z#q4Qjv(8X7)na=#KcZ6%Zo)$h?rnNPT7%J@gto>cvG>J5#;~Sns<)-AFj}JnT^idM z5pb6-jcp((_Oma|9l<|L1ED0HrIcf!-TyvEJ$-MDef zj&41+qdHl{cxAGqg$+7t@^YYMzxDj`MbefY9j$PO@T{t%`eQp{Vxvju^)4DYG#`fmOdUOEjL{o8yljP-R|@GFF)a?i7O)}m9g~6DCu>d zl`MXGIp9;@@cOae@W!#<_PvN~uX$buk+PkVu;1TQ&X>&b;rBHA-=uOp zC{FnZzrQ(PxytFxoZoS84t!MQoXQ-=zcf$YqH@S!DFeaHX2m-yXEAb;)``|{1e!t% z?Rz6IPb(Mp8+d-VOMLhS{+$`(2uSSv=5E8kyh~iLEzq{vO8kiCC8y$w=Pf~!k|*v! z0jB+DnRvxV+tBFwCEIZ=6M0NVihm@e9sV1uq+x-J zIiZF*JUjrcMuWy}Fet5F4RcnrRe8glANiF7hvJuredS9S!`9%2IlDyY%|M!VNSyp; zAf$~Fv)&Bk4f>N`cVWY7E!fqBm%&T1t}4J@*5rmco!IKKhB-yzYjmgW6RB?n@_JVD z0k3aZ?q{#_8|M6zb?VyUF=Mliz~eVLPfSD)gQipH+|!`6$vnJHYfZzPeAaoSVGiwa ztPKrwY_a<-yqU209ldH_i#9s~&6_>K-{!4v<6qrmim2FuALRyd^$tu+8^ygl0%84B zkN9v$pl5n>{{LOH?cmPnqc*)>blw?gU(gR()+xu7?82L~&NwFP4lx~-=`>}<&cI=P zohH^7v~SVK+0(}C88C%!VZbByJQYZJa(Cck^Mu?-dE-8Vrs1>@f@hXhdo%1N9|dOV zi)wo{6JBr7Ep|5xdKcA%Tw=#<0k3_^-hh@2f2~8l1$LV&mNQu_zGJdh^xBW)C2=#8 zUE(7o`u;P8?>hh$Q_T7fx#?m%lOmCG07-u_iOFcOiOEEf`aP1l;v6Q6p&>!CN*rOb zQ4BeVWSdxyME`t*IB+lkpW-7#??dQ3UEF*KrTO9`CPC5VpGYdjEGFZ`b|zCr&JRfD zib+fsi%m>ciPXbLHi~nY>=F+n(LWz4jvhwmhewK2f0R$Y{6~~#i|?2eiC#Y;=_zhz zQYk)SGEQ{)8Oc;Ji^&49oe3h-{DNeIn8f5Iv5Cnpk@_otl~Ll{U-=J=5|1Foj@c1p z;~yCE8qex~^Rj{p^|B`?AQ<)tF$NT48fM(>1#GHj{+4KvymVpynMwms=cU{;<3W~LNn zw=iNSAH{->aQ-v90u~1_LNrCqx=^+l-!^!TMb*Snx!W)Hwhg*+9^iDMxw)bTg1K5I zF0RM1`lu0RyI|Lj7lCqi5U6fLePSA5ig_xbmeDE`=e7$L1ZdW-m2JRd7UAP=g^N~B z@=}t6S=x6FZg0lNBbAH&#h&${GW(Zy!E1EaHdG)mozp(}`@emXk)GM?uR8=E)kO2c z;BzN5j2bB0>3_{WwNr4QE{bo0g1nSFPkCZvQLqZp7gD)CiAOn^7aYDZK46799bu zmV+QOF>x!qCFh{*waBzC(!}qfU|Dr1*7)4IAI)$+p&nG!iu)Pn;7?PoY{GkSpNmiO z!+0<)Lb9HuG=G+k6W#!sB6otiv%CEyzqjuS2M<^X3XZQyXe;Ji68ZPt0-n$*2Fa<{ z^$x;+P9sA#%xT*EWO3WdP^rD4JXorU$q##5+wOkBj_L?^g_x6Ah$Gwsf>l;AR441i zmY0K2iw+2Oq-`5_db|UJrPjfgGJFR@DTGh zYfJykEF)6VbxEsmA-#a$J>%tl9`)L!C0@aouerH%4H0!JDcwa|dTB%Act4;9&-jel zF_q~wwxG*ECN8pSTx~*!rA97FqTUb4AddHgj%=a12jQGQ8Izs{u#S>4(k)}qNGGVr zdOv6(y&s%*5}P{S4{iXZh0z?_G`!$XOXhk^xjV=Ooy?J?mA;PKhe>k#Nb5!w9k;wv zCTn)dX~AbK*Ej6=KhK+AjtU|Sc_Vp~#&GuX(Ls37ee>3g)^`56U`x0wOxq0^C*urG ztp;Dt#`bx&;>-QjiZAaE6^Nc=f*q}cI8Ih9#xTSumk0-Bs6m>xp@#J}K-nV6kz)8g znXqo72!;LJNO1LzjOJ-@kQ*w%VO?osavq%CgF38CoAQrkN3nTsy9!bKKq%EN9~b=D ziZW*USh$Uf$dE@3bp6BnCS@9tu3<5BMS3T(@DA8fy)+^CzQvul?smj(_}3vHN6nWlV$}wYekEOtwV^dmToV=YT8MW zOtBx;tX5d^JS(*F=6TxRm1Lg%Xn|XlO^dk2;w(5EtDY9|0)ejo3FB@-IXcc7l~n}z zdT41@zBuw(%g%P)-e6D7?m0WSHBswAq1-0z_+VcVvGCpISvnRLeKImTiG39?x|X&p z&kYKlBv#!Jyw0-lQV%;uSa*Vg*p#{=-Qwml1ob`O0AR`MKpE0hGT&hLRTxEt^I)ac7LlL zSilSZH1`wYn|Z;U+GklNaq1joyGNn5R(>UJslWH!$kKi!H|k{_`0AhxY1IgX`+*4WqI7~HL^kfM!(yW4LL-k|+UgnXQn4*Q;4 zgGUX_?kg7sr!$@_*-DgT;(iUBH3KA^Y&nYH3FhLie&doBx_}R zj|B*2B3Q{V3Ba(~;(@!41qdySZqc1qQ8%__x=3FZywRd1$Da;NSO*FmA`SZZn>z^h zS{CRss+=?~br9?l6c{w1au6)v5O}gZTO7}m`&f~d6;V)|&Rcb|8Be(X!a+uc-6>>cCF79*3iHsaQT=9BF)51`v6YYX8F_o3ia70qVc*Ej}J_YlPH z?o1Ul{NO`mZ}@M7krN?>C|e7ti-?Pd5Y%qn*Ek9_{2R29Tzxr~T3Z!Y_fR&}5?!nn z`_={vxK8^f6kVHrrM%9xfzn8EwD|n;mPHL0Wp@1|!MRaPk?TD!TsW+y33$7e2F2{n zh)UM}QcqJZ%v|Ep4Z+7O8kr_4w_i_^1vK|kyfy$|POo6&=Rp}i<83;?cO?pBC^855 za`6K;4zh*YMNW!~RtbFbn5FCkmhv{{_KRCs_(rm`?(V3p?h6KOQMW_F6BJX}C-IT0HY)FsFjhT~{A!dtBF9(ML z@^T?3RS>~f0H71ZIj;aMELUK;xWO8(71nSsD6WRjQR3k$ap=;_sKx=oBj~_R%IT#F zHNT}$^EkDLTl^QO*)Do5h{Ne}B^OsV04lW5v61F|p?#^?`(Z|sICn?zd}|V4rg&vX zux%|5xB?jSL;!#>xf#ItDNwrN=CkoC0gT7-<$c3S(nb&9mplVtOl}4+b|HxaV?tDY zJ}zc@A=>M-_*6n!=Ri_28GUrt+oHANY@lX|FHD3wW0%rLlJ%n|ZrB;@-n2Ep|FjrP zo+5Va40dfJnY!Cve8b!LD5jQjmr;{a?iOv|4pw?OYiMWDAZ9!IO?ktf^>*-YhK%_1 zpNG0pZhS9zd81cv7r!4IYY+M$ct-T#-Np~8R9FSOiKoPrKFwib`f;!dUTqPN(Eqe{vvpDHv%&Xo#X$o(Mt^iL?9KF5W1I;8+6wWQl@pG zCZ5^fytTMuTT+utpo~p0xcYH0>Ksoe3hS8HG<)P%!P9luR(6@N^u%rFY5P0jf#GHWm zHap}IwFiQ=jZ~T1M-Bu((_wbJ?+|dMjMiSSV%OCC6UwQMqP#W(A#48$<|q{ldC!Qn z+BUhV@7;&9NEOtP7Fb_`XXeY`BVyw(%@J(&0?N+_6HXP8cQW6;K|=bct(! z4PIHxIYpPRAo>QP3Ao`y^-5nusqrbY9Z)G)@K^q4X<=tj6gZ&rV>TvQG-AHqr0P^o z+h;FKNT}r`%~MP9NxGP|snCjI&5L=fu;wP-N~nn?G;XEaH{&vVhuQ6VWI(Mt1y#U@ z(Zl~zpgEy*-a?tR3AF)0??-jujeK0|wO2tTnh7XLG*fVOC9@Z-4k_`Bo5h$TnH@Dl zRQw+7he5yK_h45qEf2Mx^cS}tpQgjbo4*HhwD;`&zXvxPu5;Kvp~HW0i4T@86uVXh zPkmAkbv`k%m)v0UOtcYs2#{=qCfeQ2(3w%))mkf54A-)i*{0a*3Qe^tFcns-lgBbH z(@b}W4waOP+4!)=6Vjpq;HzKg-O18C?CPin9av`V7^Si{(6q z2SPQ$jjZyq%rHAeIaZPQd`*{pC<_i{w<@qkpOlc$S=rWmN44B4O25lUwRa|mE;138 zjG`|q7z_me(p*)mgSzY=CE?CI*t0Cy+K z@dIAAW2kyR3XGO4Eg#E#)5X=W;bBh9P*o~$-BQ~hXK||ZQ;iF7jT)*hm(g;4L=5;| zuIV8}n=vs>>gz#m24!(9#tc=@Q*PrP6~CVp>gt_~Vyzb^;6wPhM~Ys}LOI@#P+u!& zE}tx^y_kU9PBfd*PTqyw^|(vw>5zMHm(1a$Rj?GX9oC~hB3-=IEOZVmY*5k|*;{DC z#oP^zMv9$Vg_cU^^)@2P<6zWCoYVxbFl<;#Zm0^9_MBYUO;+{Ancp4c#$CA(_w^)m z$#nJ5r5<#oE+%mlFzl06hh+~=$9qC~u!odKM=5$??J+F76%JQHM2ot9s4N3NZTu%3 zLPP^U{h@fW2oKVLC+%%{Au|zTcxPcK4i2RRj&uuP2|s6byN+T&r%;{r3PM4XfY=Y% z1E%t{b|HRzptMJj4U9;s2aL!Us1sIIn)VOlV5iZz}yQPEXw^Ru_eO_;lt~@JonMQeC(xlA|(}i!?=Y?4>TWyA&|-_P#niP!m1dz zieu;gq*B0baUl=%Kn{qD)=xkgoc*0$dnuqDUz`#@x}`4aFJm;M3hk6oIxNblDD}OF z-Wn)MOVF=YJ_lSV6{TFxY5hoU#>ex47;_3_E~TV)GIgHSxbqwmw;&e=T5C@U6%|J{ zpeW=iSI@<)EA^wj(RI>fhfI<#kO!?%2UKU*hI-q}Dnr*rT@fTKJ|X;TPpJys`oB7c zXWw>O=r;pv?VHa8AMVCnTrKAGfFh}A1XvKq;ut%&3c-}c!LPAInmrK{ zXZJ|Gs@^ObgL$oJyChhk@A2A`r=|DS#5@s9wdb4_nr><R%aCywoU?V$vOssGATh!ybRC?5_@O17XmdbrE0$KN3lJacb zTOd7jMxym1SUyN{oR~8vlvDcwbNlW^4o9qqs6>&RFg!G~(d4n0Ex1d1#vwh_->DM* z7fCNUq^F8s+n+stiA?3KN|OCh;E@xAB)N6y(asaC$A&Ufh`+RRiEfhGi1M+abd^)h z98ViDW^5>{RMt6%IeZvT8#a+7eeNYBSKvZ?=aKc!V?90^TCYcctz_g&YL`9MdN zH9$wR#qyd^Ol_vdX!;Zk+62*S3RVsusv)@nn{O)kvjXk% z7tBHl%f-D{h5jz449duijX-KSF&#vQom@p~%!ERAd~(;D^;qU=3#S1oX4u%v{&QrYLaqxlLK`bNluNj)TJT-Z5N}j4z=ng z$H3@1bo(x9r4-P(9s;ldnwtKp*1Zru30c5Z0r|7!e+@z;k& z+kI~c%{O4ewtaqRy4ah6cv{$atih<6cvGn3lHG}>@b-d(BI)o(PM8~!4|E`XcgczJ zUQCBytDx-jl(QQKWfwcJHL0nADeAuoWyzTA)_yFXE99`$V4FlQH*#PG<>7Swl2kP? zO=$iL#!o zcmpdam3B2~BeyR*yal;u7)59Ep1Uzdmr1HW4i-EUM<7-%?U|V7GWjLS>j;;-=0fH3 ze+lw2V{$@EG{3>s1&_Api%{3v&rqTvsxwv?$ddJv_O_;9ZRLUhdNDStn(W(J$vkj zmWI+S*E?u%!iK1F7Aw9xgbm9^noz}zPF&*o`p_9R4E>%otUXv{k5qJQ`4G52F4drxiFWAldAQhuy}cB#D|%+%QXv8H0n64qGUqMxX2r5bo} zi0;nMljB5t%09F@^n(lg@mR^X6n{P%YMNM55(-C(7p>dX!gRE$@WL7liUsRJ=OmIL zOkI2rTjSPT006cPVWL}dm&b7-_L?RN*M~}mO+cZuLYa!+9u0c4K~#6{Hh%$S^~2>j z$0TPXOJmi9go(W1Pjf%6iHFuBHp1JQy?cEKwiVok(GmXk#7&9YJQ;dKGtVDC<}xuX zF{gzX|5WIKMrz1aQ0H5%P>z_`DR`q@@=WMn&05-&8oyyXArt?27B6&%7_t!nWi$2V znWE@B(<@%u2n9~hXJM7GtQHr9bcW0MMHy~u1`LdMN>xtHA{rgjt=#9e8R=r%+aa$t zC=qUw#lE+(ka$Je8GEHc7meJ~>oE1`|ghh`Ysy^0ftz8H#yh>wVpbjZt4I2Lbbso41;jD%od4A)UFhNfAZ zwPSH%wZyUN9nZsiIo8IwI}3Ezqb&FiFVnHm7=i+W`@W7cohle?ZRfCs+w}#gIHY-> z6-|^xwdP!;M78Gq`4x_Z24NJKEyToazRE65bEfRsJQJDHdf&lCH1f{UxArNwFl!7X|_REo$1E4fs5I9lXZVNYm`SV*RYmt_`8 zUiL#%{;bm($=8>TC+C+99{|yJq8tfQKc2=8(*7K;eTPknh>Zv`#7=D|P zug^=f4`hU~M4mV*BNfM7LT-D|yP;+#4&KV`!)fn_8f+g9^k*4eVFI^fR*OQh^Zn2| z$XZ4w6lE`@yK2d?kZ+u#!M}e8WwhiahR(_V#*fS?AB*1v+HuZ9;9oB3z`vdh@xX_nY;BYM%7+j!u3Ok&!heT<-~Tl9R-^fM z_2;28mFGKYp}FZFp-)uEv!}kGO0lDu(jzN#$=9K3DpyPa1ENa(V5T_rOehO?e=Qe? z+BcY2Z&SPp!-{V(i#`P*3GXB1)?s2La-e^Nkq`{)!HE>I%t}zcVo(N8xawwx!`s52P8Z-3*WpEr@6pHGjT9y?G#7^?Sepwn`*8MYt5t7*@qjm*; zeWO(n@5NBg!T|iZt_K1o8vub4tm+3?A!cn%V5n0M?kLP9uevQRiJ&kihr|(RCTp)o zCsBp@BfOQ$8U1>_8+mdpJ2zdFmH77QOyIeLiK#**yG5`zzivc0rd(#rNCXAB;z$&>aK zheOR`Ru*~x6`8u=*U)P1gu=KsIAqlI_s|*SNvu--Kl|aYsPH~X>?qAlv8#?ysMZ8w zFg*P0jC@i5Cvd_Bap+Irgt@nuhjEzf_J!Eb8zIt~WaeqBZr>L!u;yaj1f!ve8F|>} zE75RXX!bj9Q_Q_Rm@aCxFzk=RDPn;Z&W0MCW|>+mu@kk>FSUo(=iUTt72wRq<)UVP z##X!92yZoDJE!&*LtP`e@xK_uM#Qk`g)NMj`!481rc^YCD@j-QI<2L0D@(gXD7YyM zG3(w_Hjy6Y8ErgbjLq7l;0#jAy&+`s~7qUY=z7nE{qh6`>7J{~)xe=OUY7ompL zUB^^>9DbaSa*f6q2vWxj{xo+jYO9lKMWEgNN%mcX+e=9jTWI|@;Pw`ha%S&82e&Kn z@jPt%JmJrE*So0ID99-$^$5G{d8y%>PK>d#;``VPeSPVL7hZnB)bn7;En-e+PZP!0 zq&F3NS2RzuPw|F-)gi6YCc!Se_%?#SX5lKuWSg6XD{(3UsF26o6b22ZhdYXOrz0Xy za8X9SwFJoXeFu5M;BQ!8pjA0lUkcbcSIR_DH6$C`g%0Q(7YCh~IuEghoT3pnjVIjR zaS$h#B=Uq?eYlHB;Q5jX$T?@LuZ4KCW!M{Cd`R(#eU)LKbn1+Amk93&^R-stNfu|d zm@7ps(ZB!i`N9Mo6iDW;zqfT?I2BRx(th#nEIMJP%xkbt!@~QHDtin ztSFc5%F!$pa8abWxRUo$LV}BFR*nau0tmDAQFdvXTquEh2$|L-+{cjS-+13}OVM?u zv<24sif6LJ?FPSy265loDnMx|bzs`CUxFUqG|hZCn-VgH*qI738OMIy&#P9M){&w zVR*V#l%9})$Wlb1dkSHnTB&R`vO9%Kab{VD!*(F3)f)UeSjgldTh&xQ zT!o@^7~9%<3L8i{Nj|9R~E!P5M|99B*wG-0XsMze@ zUg4W#YosJm-8;NTLCleT!o|8=3e6DZg<;s6mqXOnbG2^v4OikY=K8O3=xs({h}hDe z2u@w}DzrJ0BRBUAr$Ch{*Fy;qnV8tqpv%G02x89l5_4Ml(B<@uFMweAfdx=M%i+tXbP0dzQHfI=u3faE)~VUeu53 zq}%&Df=z0l!z%&s<6ahE=Mqv%sOsNJuA_z$iq8l5=325eW~V`+3dQGT%yYX2Ac@1y zQr2FD3Q^ek5N{RitY^g->bzJN-&`0;DQLz{O!INsrTG{rE5J(>Z$6EDN>g$3&S2(} zA>o|b(I}0Z_EOkuVN^o+XI}89CBM#02|;r~r*L#>F%b(UjEYzZPiK>qB6bz3rc&Fa zMC{8Tn@|U)uQc8PmVa4A8sS=9UiW>=bRBP*OZoE@0k$J zBDX_F0NP8S3&&NoKb+XSz;%Xj-u^Z4x|-wi+t)?;e6{`z}mMItbInpTC2zr zzJ#@EZ#?Vla4xuCnh6VqYm1ecaJ9Yu>~J3oNcK>5IIiuVvmiao?A8_9erc5y!>##Z z*_iM-7Wo6VPBN^jX;$H7LEJ`FSZ9*bEiPCfZf7wuWuOFO8Si688kdl8TM9`?L>tGj zTwfUknGS}f4HK|}RGqrb+htp+j;gh&20sqN5>0DEklzr)PG;t*M5z+P4o0yy)WNWI zBxQVQiD5q_IcyFpuf#_kOgo+A3-}~mJh>!68^N}1?55|3cj_+rZzSB_2z~0%i^9V+ zap_0R8WT<7?(yN1DPZG3HeH;38Wd3L@*_CuxIApxCrt<+g{wzT4r0Mf!j$1n!(P3Z z^D}JL*G*Ya((Y?Jv~7_(v`{X zFL-6n*3+9P(EIQb+j^qFfdnQHh6JWaj7#95tk{VqYU_zS7TtOxT$m8udU~1Jv8^W> zz2lkgVd9pN0wI&{kYAzo>rrwR*HOh(d7kyn)`dP=ZbKv zp3k#Px){9**={LQdvbef8Ay-R1oYze6ys5I_R#up7nu+@>7ODnJ>0i)Fmng~gq#6r zmc+J-97l3G$&*=nElFyC6=|TEau+U3`;xp~Y?&Tzm3kF>ynz2fQfpm&?POgP%SxLO zZj~l$jbm0D_KcdnkR6iQ7c#r6%0^$3gr7QCP~(%3BsOfhDV3|_-Up1pxbKCyfIvns0LlTRB3zRV4b={W(zYEj5q+(`zfJ+^k(!a-9ES@@Hesn8mM@cBA*L(} zUsPIyd#&OdRQeq}?wRJ0g-|hg2#i$e2$EdID{`S&_&}tUsJ5{*G?SM14;rF=YJrJKr~Dx}t=+K_FlU)4xd-^B zruKZdJr#o1uz33>(U;NUjugM-^K zG0mlH=vJt{2m4j1J{EvyJc^?{9G^8_7q35xS>sMrSIfxB_&?pBuxgLJxV;r059cd| z(>ZGtlImTD0;2XLSW&JE4<07@QM#ulv`dowC`tYgNs=EW$=#O}jy&bd8Y?n5*J71% z>~;hP!ILC+i;e5TS)*m{Nao6ZcC(=*xto)aT7?Ves}xyJ9wbbXb>uCDL_#X&4PVvBT(~gXghlgK zv1tBDpkfHDs*^I(ti5^UYRA9HedSVX^QG z9E6p&wbl2d{f-`)FiN6L#lK@eRJ0|WLi?dZpN89|O557l1UqQ-{o4aNoD@wQzdn zE;Q02DQJ_6&fNH59^%yX5XpZaU+c!wZ6qmSwC-=?HUU|l$5`5vWOv*p*`oaQaLH&& zDDA9QkxPY=hnQ25932TMxwvqLEJ@b8nDta0dCMt2A*Bo#FB`}E+9LZBZ@wPR>Kbp! zIMoeWcL14?IvbZJvQ8~~*M@sOwzJ*{W9QV5PV~l1QnuI`Hco7SDfQIHfozw!>YecU zQb&btaD*byeXzi^@7@)jV!$#MzL}<5PvJ;Iof!5ubfxQdV-&$ii16&-?r^C!5+^PW zBKjA~st`&gWXm;>kEFQ0pD5e(KLkKJ-oN?@S^t<(AhN*Wj`sdpP}&De(-c<9It()oGXy)jnZhK zad`7gTNN(Q-Eg{I-n_sb_H+1qa(eln4yUWxBUl_%;gCfBgNa^P$OPT?wm+fWt$mlj zHRpf}@F8$%_;>6CLRLC<0(l895WN346oB`?1*M;j_Kv!Myr8G?665{%*}`pc#=@lG z)4{B9j&IAF(rQc18Ut8MF+6ckR9#TV+?cxHbP}4I{0lBmVq%)l$uBXf3b3+qiCU`0 zR0P)|OY4C;2?-}9$pp0fd2vvSQlTRH3Fa3@<0iDadn==%GhW z_sVHxESD@k@T=#jSfNL$!$#z=pI@a-XRtBPWB7$W8TSV zQ3KWODWbkdm-NwYwEds_kx8Isn)FnHjj>x$`>))QQKm=DRu|x{^G|bsAttnr;^AX~X3>w6_`DS185u(UtP%_I$WB#+D$p}@n7BFji-IHlDjsf19avq@&M@?h$9 z>q)Luq@CC%^1pINHY6|d(!cMH?7a4oE&s>ek!>!DNOxppI8j&TCA9fVF8f6E$_ckhkjm+zQ-A90P>Opzt8v$O30d(PGBjHm^gbMNA(vK)6Mk zx;7<_kDIzaAW8#~uD%aYuYv2a>rkhG>#=)S8h1VB6H5b;9PbR~_S*|yyApRPv+S1x zk^i3Sv7y}~YZ|TbgzK@cqGQiUiIj;p!qZnYbVBy$yWvaiPkTpJ{2z8gmfJrfosbQ? zAo3SZ$jHTi<%G;XIP#eFJYLstj%U3m$q$pI4+&BO<%fO)yRRfYzy;mMMvsaJP`r+?y;!W{~&C&@J2rL+;$O3 z0vpf4YX>&o2TK1QFVeB0m6DrlBFC8FEw*q=k7dBdT-(Q?aV9AJVpNE(1#5V#w4Yo& zI>roV>s`@_=AOxp9UEE-PEgB{+0ceIs{I@yvM-7hHkHdO$Dwb&7=BTtYn$KEQj2>k zqpnbiY3ZqKD?OF95}PlIlz6##)uaZIrVA;DZEbwyzvr$@^66ERB5)Pm$dgk4m>lI( zX-I3gsfj>AQfDDHZrPLw9G9(0a~zk|T^^~Tld8)jL)A%vo>L?JaoPs%%4k5l?|m)m zWcQ#teIWgmb%8D_>ZdGv`XKJ7YxC6DNAibjq&5ZP@xP*d(uXP*V$nk%$KG;CEkPEgPshV>R zSoK63$Yg>!K#6Mc)XYf1-~p_iQH*{dimzY|93Nl}w>d{vG`WNXwHcI!#VeL#C7&Qk zqxynO^$;5)?wE;r`6I**pEtnQ#A=FdU)Ff^ z-+fK&$%MX7Oqdq@TD(6?pZkA3Xw|iQu(*8uZ2b$_QIA&QtK*s$ z9r3LX|9$xVGEoe=4^97=xtX;VK5Hz-rek4j{e60Y<1l`q-Al*j0s;-Lv0;ME#c!Ac zPDv`Uz8^Rr%TIc-BDt(DgyVX-X8_9wlFhG!GhTjSuD)HyOT{BgH0+OkKu^8CiiK7W zt99yM|7hq8QTai=i`!gWp>eBCKhNgY{5_EL*9n{HxUS11Q}I4K7=?;=+}C+@)}NLPQOXf@gbrIt{% z`dG?UTXkI_i1EEhB z&DZNU?m(Fak{)Q6OA1X3*kCFK%dRT1^05`*#YUU2KnYFD%JNK!X*lcOb%9<99~d0I zK+nss4>IRzR~2H&(w+oWFbybIlU0Z^md?t`UtXZM!{;x6m8A}1(98O%|Mk-4|GA2F zWU}1gza}2EO%97s7wP}|7McIa9y#!Ov4+y}zb)g@ZdcO9)kpN-|CP)2{tgjZ=+B%a&AE76gCqJgQVq)`BJuJox{Q>dGKDEkY%blL`T1)kl z*!gu!165=`sdp6G80;t?^`t%#2U(9iiSGEksJ%?@lCm4$t0;xyGw`p8X3sh!jx(_R z<>n>m+m>Oez#}S_p)Wpw_Qb)kO-_8|=qaEZi@c|RUhBazS#tqyAYrSCalqnb(I9`Y zm^Bse0uqONV<*DE4Qhd76Be9>Sai7FqvCRXXSUeVx?yVhf#rIc8m2BJJ0xi|g)Vvx zj}WUG3$f6r_qm}nha9mwfBz6%f4)Q$1<&hay>%fqqXnl|U|5py4pYO4bKr;mya0hp zZ@K^O&%G!?#@&(>xVFO0sPqxEzxy)-v6=-&fA{AAXwaWGKq~a-$B85T=(GFt%am&M z=Z}cB)t|eoE(WckKd(Z%<6X!_-zfhEp>rIHlbnsfuB=RzTrU7re`C}U9fcs4)yqtV zbj}EMBWD)qFiCRt6!TZ=+39mZVP-RDIGXGQrQ>6mdQT9UDf+VuOzkGGCNlaxAUWNl$|^lKL9HV>>2(&9 zTq(qPs7xcHqY>m|>TLN>%2F2zlCu_3IeQ@i5)UQXx$@V*@lr_PR2L`%z&VNhp8Bw2 z`?4hS+jI+UkR>&t)I~NZC;4j-{D?xO$Wa9sGKjBN>BR~9a<}@F$q)`PX(yyqmn%L5 za@3hL7b2)DY|xeDCh%GFXsaCMNp!P{`kX>_m7_^XdBo~@g&GGRBusJ8KLG>&-Q0EJ_^ zB`e6Y8nlk*BxrG3{tSpRHpq2wsfrf?Om-Kn5Mg5)azoF)Z|4y%#M`zeo@Da=1)i} zOSlqc3NIEpYxN{ib)o+Dzi@bs{##n{e|Nyy<%eI0e8b2KvH zMFel!sHd^3)?9XBJBQ}zh%_#aP};HwRorrh*L15z-X=W?H+p1K4SY+2&}DeTTu(ex z&lz>}G`Y>HiX4sRtD3StU`=owKZ546xxdko8zu?-KLnzVS`plXX3d~>HlA3%ZL_|? zDSt1EEx!cP#lju>^-m|q#4{IyAvIRJRxPn;bb1L}Tz(d*PT#3)n1LU=TsCIHPsqYI zObt2P)_?)-7u7%33tN3c@p^E)YSqyaoR{nxiQ?7#B0QQV2%|clM_#oWVVW&6F|O}W z4Y(8n_B&IjY}hQM?}lVD5%;GI+!hd9YCCY`PU@$@c&l$AiV#XTiH; zK$*aQ1ocEdyrv{g;(uV!n9Nthq^I*;U^W9MTO{djK0_4m)+;9-#ETgx?*Wlqd_UB~ z`2Zw)_;N7y@-}$-_`48K<1Vz17^#)`0pLUY zEP7O!zfyqFkr(0_;Z;DB$&(;T7QeqxlCpWDR0KJE8+vapFT^vC4--dr>rvMV=%NHK zos#$HYqH+})%y~^2%YW3IX46!NPK$^y<+DBvc>0n^qTw|VE0R07oJb_{HoPUuoYV3 z&7qWUB)%DjbWq|U1m8+L3(a##;$i6bJBbe!eUQOd8+AM`@hE~5c!@6_08$>AEnfXZ zk7%EO6yKnI9W{cZbaxS7eWKU!p9FK|3AP(pC0ZuChltRpdQRSGLO;dIP4o)IJ+3m~ zV32>#OY)97W67dC%X5EP8Ir8_O94jq0hk$>mBxC9@<9? z-=}Bc3)J`R)3foN?3MfU95zL~k06gEab~*~KrKpi6LTLxq0Sr^6{ zh(ZdU7Og0FQ4IS`uZd2-go1Cy`-Dst$0?Xv?%1zK7|R!VpQDSf5Dh-p^C3x}&-Esd zWa;Oi86q}NFj^cykT-=yXz!vgiJKw}EdboX7GWE6&k~_8^rm@vsK2wTjouH*C|fsI zj+e3>VD5!t>K9-tiKSoYC3#CI^;TD9Gj*}-z8@Ci>}%&{S?c*&K@Xa!C?UWitOz^!!?Hgx?H{zDDbe z6l=f6guhtq`dV+CF`^L7+JWtZ(@CF&sxbL!)?7nJeM01Xqlfy((W$Tjl)g=pF3_2o z{5_jU>95kR0$zb9%zr1!>mV(vVoKdXNSmnGk4;upaEVobqo~UV=9Ks=QmN1w~gf74WH*=>`RSVPpPL zz*iRLx&qh{DBz%|cSP@MRe7hKZdX|x(c7{2#gQW@zrLt@RIh>!F#V5W5M3r_A4SC% zif@jB#Sr2BUcUvm)Q|Wcs;nj!eXmz%Y$yUGpK9xw$=_S`kZ&)@56OX3_R|97`Obi+8@8Az|3umutI$q!zaFn4H2?VphG?^8lON@ekO*V zKuKf7yc2pIxmT9hbOIBy`^E1k^!kBC5S}HCya{6(FU3RRl|_>u^k`NZ5|U=G1PTRY zUVs56%~@+gYG!9~_YZobP#%7tC*3~~$Ve~+qgB#FQ5bz@y4d%Fu456#eNykzt}P6N zxyRgt6duPwBk>{z40k%fSyI1KP@4%uk(#w1?3jDn8${UxHIaA%^o;+8o+9(7#j_{% zXw{QQ#c)Kuk`s-@`vRl#qcsRnd%#%SVhgczi1R1m8D1Cs6nuJ_C_IIqqQ}LgQ+jdM zTNmwhO z=kmq8pY$4Gv#js@W?8f+Pd@BVMSY`(#HT;OW+#hFKfx1E7NN5UP73|3UZ=mA$Cqs8 zSw?w$$>fNoqLz?Pxy!zHzF;rhx>Da|-9rC6dVX{!stF9KBDxS0wCnLVk!Z&Y9pVF& zQKCak#p$AXU34zY3319M<-ZO~l1rhgmS7g0Eb`9jp$6}QT3(vWl#wQq^taTKuNQTu zrO8w$DgO-IGds(e@)D7q6nCD35uFrs&!OL+6tA7bSbb7_d`{Oh%_<68x7{&b%I`zB z^-&Cp%s#J2bW@M-K##=u71)B@3+0b8DX9EjX8BV7IT^qZ$UE1{Jodbvfn~=B&+FN_ zW+|PlQcBpXXlnMQIcBlbAg+8;e0W|jv6^U*Nfmt^GdFp#I}Z{SRu}FIdIdAY!3+4= zbyEC(0e)dXdHT=#6AUf3?ib8+3dN_t=nIh8?^nG)f=$2bw<9R{P49_d+Hd+Czgdxw zl|P{p2fAL(L&E#JUL46lTe2?{G%qY0|80=Q?nTXNo)lew*V`lelfUZ?GftA!xCDsk z(4^*CT}!kP$j<++4*^-vKlIzJQu0(PC7a_rks-1B5A@lSBJ(1=?G(}eqW&zPpDw~n zpA?}>7))M6_ha`lM(#zq8(kJH)&&Vw>VZ9Lj%HkGBB3fk)DVUJ(b}w~)hFAstJTF* zm*5{xigzwye$$}*^d)_($_|K^uIj(C?&9fdu<7k$%Qbk=pTyB?dUJMuNnz}M_QI0a zV)^W*CHrD^BW=i$+~;PjaszBkBAf4e1t_Ttd!;;=#oi3NTB1HOu9YsEC>M#12V(&- z{S8+9-~M>T%HDtfL-${Ou=ZasGKzn->bY(m!{=V^aH!=|vSTmgiJPmb|MjnDv0#iN zEDkqxB$YQPjkRLsmzu@C3*iIaU)>Vxg5kOHt+6ihj+ew;x5hflyI&F?-5Q&ma_l9H z2++KNf3G-_>%}(>`^IXeoVfw7iHb#7T3y>W)?5DdCE@NDqc5QM=?AW9;zbGy#3c&q ziFW-Fv=on1&{3SCpr zhKgG~C`N0RZx4zUJG%9k@af&-gJMzn%7RBF^;w9GJn5?Coe+n?%W*k*)Cz=f`$W&L-UFfwN@j$sYB-W@!qJau)b4XHW z3PC!WLU@H06k??Qib8nf^Auv9wGfY$_@%K znteqfI@(zZ$rqsi%eAFcDUBj^C8-64=o5F9f4eHyj{V2dYTbGU&TFzrgOc)bt7FNE zw+~zc+n$Qw9mr)ZtM;eiM!g5W%H>FNAhE*Q172F~PZOQ2o+gIBkN$=gR&yVs?0T5e zX;YNkbRwmzjy|ZFdJ)x>o84z(Tmn-lEFo+bY)ve^-a!My7!y|t^p39n|}!IZy^oqsL!ZlUzHE?Trz zqU%}0>%bC*+Ri4}z`VPNpuJ77iFtp4Gg3R)>D!ohAEkG+(|0gm^VS_DwUeE`i+O+Z zA-%H=?`Ga3BtRD%-pjl+)m6LN@csnz9wdg{TwP3w4>0d!w4mDECMc7=pTh{%9yUBj z_BJB=p0)tY*pE8GPG6yTms0v2u9>D7&nw=^RP0DQ zeXZiXi};VS;q{95Iier!GAA?94T^a3wV1!ztAxDsdTS}((PVC8?M%BA??Jom-q<6z-`9IAFyWAs_D)IMl8=4i%hqWuH+()>K| zB%Um=jyi1M13Z<$e6*Pwcn(iT;2k`jfeJiblK&Dsx1$5QK%6q5N#^LrZY549zzF;T zQdO`Tfa=LoY8LTz^kuV%U<{46fh%Z47RZ4-a$t0l_-S1%l=uUt%K}L-XgLtUQwdZj z;|?^%(-ELeqt3uE#9e_Yc=EvgcqRp&#M2#k1<&NbRy;j{3OrK+-{a{G+=dCKPfESd z6!Bix5Bd)rg*Z~+R}w1Vq+ex$5S~gRPz8Y+XoROD&>2r>U?85Zz<4})U=E&1fyeN4 z2Ug>m9C!y$PhdBmDS<>etv2AW3-{EjFKq{45?fve=xB!5*} z`&?Yjm_=vq)U*s#FcU@r&i zVyJLPske|?9iOvvMAZoSrNB>UFeata7{eUjvmhESuq@Z)k0%RkgPEYY{U~3NQqO@8 zbDU=li7dwyqcxr^Fr35)bVD+zj#5s?Wp)!$&4Y@izy^{}O3eW`h6@|$B}-tqsc71B z#sYVuvMf*tk>x-ujAwY7T1cG=`5Cs>Jd>a-Yrsni#85vlt7^(TQQl~#VBJLuD6kl$ z`~`qH=E_GXg@#Qj@COMHXotiNKGDN&zPZSQf~`Qw}u3 zQwiXsxEk7iJOD>v0iMplYO!#AEDwuUudk0q1Itl=M}1`zva6~GBP{kvoLnEv?Q{nA z>}X^rNNK90RQVl61fQq&Xkn2vT0{uaqOzlc%Er*@O7Kl_)0?r}$iiGC zw6|DRs(_k2j)>9&LIr;m3*U^@i=Ty-9UT?AiUvjYQEEb8!3EH&<5r8EOlu~=pUJ@b z+n5Z(+$^rX8H*-%qe&e@?UI9(&<(xCG0eu$5>4Ya{tavNt#ZvHVZ^eR%2sxK&c6uesQJ*l=ZA?00 zx)5fjjWOjNL70S%G3EV}YH**8q4lm{fD|&<#?X3Kuo_|J*%(^y3XWuc(Xu@DxZK_= zzAKMKbNiz894{z`V0w7r=WRurUadTdW|yNWlK*3ozadssxCm1pN4d?&)a*N?>kT$0 zOst<5qc_BIWml4Tctfl$?C8LT>vnX|qPuQK-nT)Q9u~FUj-}x}Q!9Xx4zO^?8Iw+` zR1@9WKgn7@un4T;o1ot~c3BwNY{Sn9v&X_P7gZ%KNi2LPR@+yDY~LtCZgE9ueFetAYiw(#^3n*_S1HZH_gN;~w!4(E2i>?ru^utGQkxOb;95qz2qT zn4UJqL71K5+~!zrozaxg+f0xuT#&kK(#S;W>7ZqD$RihP{D6l1CsgKj(BITZ@0b%uh{~(r$oNckZ1}^BA z9lwEaH|W{Le+ctFhvl$j)*IqmyzbFV3GI?{)ri^Gr2^wu)OD~^yZ9= z*2dgTL*VV~pK|i}AHtdst;n6rJD2AhSn| zeK%HLzAaU}@NO)>OG7jSOOfw@-Yh!z5tvZk5b7gQ`RqRoeN?;3@(rS{BvCudH;9_= z6`}WH`FdR#Kf7DLL7Y?Qx$F`72656!z$fKu|CI2s824T*+O93S7~69r+d0rEJ1pOz zf&L`SFY*nlewx@_xv|K4;@kIP^^5&9SQjh*$eq6(vbavW-X-_IlGdToqrRXpw#On( zX{FkEUb$c`7n8U$yCJDy z1u@xvBa?z>#KG;c!nB!W0e}1lak&WYh!qCujVY_F+)!|V;xF&ABeq<2HAIuj(goTf zVJ{q2{~-2X?~tHf5C3`-*?+&(1nwE-Ge3-d=lnnJizvT!Z){4ayz8l0OAYHCOD3TtX^g}clR zx@S5i$tZRl#CWwp7)eGHdvg1km=;)FGww%7i+dQDo#H|ticfp(5Xo zy-|^8$6l?-v12b*WZSXlD>Cia(-jdr_C!V4jxDJOwcUJ@m!j~kSd2Pd$G9cq&gRq? z=}%=(l2bTPjEysKz}6nXwQZ5|J38~&t*fNUw|Hl{B4XO57hs+*-&AB2CE~ zOz4em5Un6vX2wQRWJULxpds1ra!%qj2yv zI9Vr;KnpJZ8yImu3$^v|tIcVa&>aQ)_%3Ky<2@SFPMQsfr}FuT2lxn-lEw$4vO#{; zz*}_wJ?yv=PrQ;#TWO}E;4uFf-Zq18L}Ntw&bpW*n3qdr@dq*7W%Je$C5QJwd*$+J z7?<++ObiwIydN4N%4rq9fOiFlLSD%wNkzO6wJhcf!KZ|`MTe=(voVpY!h01-QdLf4 zXEk0qQC*U%^PgJb*fHOPk)bBPQWHnqk9H1F${`BrNt6wqStdw8Xb~A^wjNr+uzxBt9Rc zXJK!f>Wdn>aXGOHRaJYt&LP!%4jI)xuG5H1zHN%y)HMQyYNu-gU24W@a(WfbhE-jn zqE%gO1r&)@T??MWw2PG9!iMKD?JYDLR&^(U6|L%O9n%1}a?Ld1VJn!njR;!1%%2_6 z)l7S&4&XL6gSAZih|=4dBGR(1c7#N3XQyvq+I~uJZ>Mi!S_4c4v8rncw2f(p@`Tqg zvYV~IdJ$G{E&Oh#4I#LT4ew=IfGX0}hW9g#-p*n1c9|*Y0jAXwqYWcReljQ?GK}KH z&y;+tYn7S2Sk~sDnXv?Gv0ou;bI^)dfwkc0W$i;4huYtUSIb&0>h=R{c#W)GCVm55 z+f06IWo-fJX^@>>rf7@X03K|^bCjsoiU@|-hC_}g&7!f-Lfg|2;P-Ya*On7_%mzIghpSPK+n}axp=LN? zgK63YxF+=nn^j0Vt&#PebnQW@ax_zWuaSr}HY&?g8;jPBjoLX2$XG7ff zOKac*rfY^ebNC>5J4>Cpwgk31^US<|t25tDwbdE5L0g>#HfXD}&<1UF7TK(D8%++T z>uRx`oN4v#5>p5{noHW<+SCZkw=@-BH@&W1!_IAMH~x3Y8KO$5rQO>~E$u#9Y8di~ z9Pvr1ktyGuE6xC)nA;LXcCd4G)!u`zR6E*WPfLPM{9gDjIojK5i_Uhc)fQbiU7Lel ziB?;5<&OjWr!BhKIyTz^th<|;mFV-#-=ljENfnPZGa9Cv&2h6$YBk6A%?u-vRTZoq ztB-;uf2bM_&8zX0`FnV({2-p3_pE{4b}}DBfhwtAV7PO<_ZkVoc{9hG2Sp20x+Jc zVGOiRzHwd^I@kEkc!qca&s?rz;xG@N3MfIiknxTPmNGsT!3xHQ$0cbO;|mb%W&Cvn z2N?en!C}Mf7NClqSYOVJ<%_ zLJ^@+aBv=1Ivb5F+A_44E5u0i$vm07qCIw%u}X&XdpDrCpvJ_Xl| z$}k0nD|MR^r|qW6eOOAIxw z4KO!ut&C)XP1229DT*(*BTO0Xl`6Od2YsVp@ z#rVkirebPq46aowi^p3VRpcl0#QUv{yvn=KJ(D^rI&yS|R@ftltBVC~j24M8 z^^h{oOrcUIDQ?URBI}@)q-i!it(`|cCd_mjLu==ea*Z$v8)Hhcu>hDG z_lidL6Xu`2qUp%?6QOS0EE;i&VQq~CzB(|yq~}e3Qs_~?VC{_Ps6lWGNiQfr!OLJB zUF(2JY0_$C6>N~!(E|?rcu0C#c?7jUb=E8O(ovm}FutT4x0^;9Q?_zjR9a_`?0`un zZLl%4&Q2}3u$__P^HGVLZ84UF#g=wP<(O$QH*Q9?Oy<8E`AH*e8nfByZClbPn}*hF@#Z{ffO-@hGbiEUtpRVGG}a`5x1jMq zN!--I&=N<{os-6!ln`QvIvlg2$VMvQ1B;zyX@zhwNxLkJx#}M|UmKV`7RFpgjx;8P zeqz&*5Rn7ax%S#LXh>76_tbk(My85~mnEn}?lUQ*&>HfyN!!%Nk(5e;P>#T77%GzX zo0%NycK8Gj8A)`ctyZm%_C0uAq6o7}L?HAumf2%R3qwi7!#M`xDz9B{hZ)<=z)W#`Fp3 z&;{-T`w% z85Y{DQvdjmQZHREwQZ*Oq?3`=W=0G-uB0GGs6DjfajWbz0NSr;J?wv_I4Y;rZ3d9D zuS`(YUPtIoGxyrjfTz?EbvheWD&37{ac8pok(#2qil*#)*r!sm~9I4v~ znAtXl-d9Jqwg6_1jY%a;5xR`$UK>NF79vkjuDLdb-nmA4RTJ~OVd8zbxp*5Tr46By z7FiT(2=kRlQCsnIHzR*ob}3Sp{KH?B0^gw{dLEP8!-Udbf=;xQ31K+P@U(_7zDZVh zlEP;QnoJ2`7rubjOqr5xLOgsP0;No?Y(k!Jw-Pa}yOE#xf@tpA3AVwr@FvXLn`U}^ zA?hRXXYoWMk3oXBuK|28ibiJML9_vgkAe@9_!(FLXvPEM9oi4i^cKLEcqewxg?P)G z0zH|O2@QmcVCLQ_mauC0FEnDpJJkYtcoq!7JI#VT;Wc3EolZRDs1{z1&^x1_38jVa zK~sBYS{4)vkAY!(?;dWZWrmkxob;AWFrnP=tEiXvfvF~x7k(G+!u#MRiFoFRCt)=3 zhUZ(BR}h{Cv-U2qpu+H4zj(ce5lbwGxAi_u!;(4!y}|dvNV4(;!1{JSN3Qt*%u)6I za0x~5qMGzuqAZs;MRzHihsezqW*dGG5Ncr=V)HCq8RJw~*$O%q^tO$Y`4Pfx!vP^| z*wV1?#CM76p7Ay+$$aftHheH2j_xV(`|)H_pg;VKuM<;|ka2<9%l91XN>r!NrE!@7 zoC4!*@s#-h)B6V=g!TGfWK}4~V02C9dzH~*9p7pW7_Ff*#y6lfWS*#oj)cyU!I0%G z)|ax7lV`q-Y&~V!Xxcy!92u{RCc}>&C>Q6Evy8=Xh`v3HewYXT@*(~iTbBUGjLTIh`&TSGAK6DWp+e%QG~*w@qGc)YJler` zh+UxSu=#D9lp0+}}ovP*0-kqt(E=1Y<{5!FtEsLY){{6TaZ=&ms; z=?loqh<2$@=)H^YX*5T-)!7<^Scnr*Wvms&(}qH3|1F;63)oi&7$Yz9Gb=w*N8D(u}i-lj3(W{Tqp#3fAdA^5k%)Bxcm_;{c)=PnTHcnGg*nU^3mBJ*G$=I-u!L=jCF&qAsB(!6LO8b%70LG=l*CamNtnEzO>Csj=A+ zFf_|NT}OZ6FFk24V^_)VwO2_rb4A|ovs2TwCKzS?nw=Wb31|@ zOn5VYnw?x?F3Vz@It3X=VAOc*(DR+;MA(2EBI@fd~u@Lsr8cq*S6tfPVE=iroWCUh7vvL)addK ze_cEMj5DEKO9rBzO>o|+O(25$Ho>n>?Eo=oV5eVnYIjq*Zl_;%Y9CYnn4Mnc(r`_n z zsY`o_(wo}p%Us&n#^P9iqp>`(o`?=Gy34V)V#)xcP(E8nEFWOx7fx&e`hn(|HB~lO zNT$Jy`3Kn;^XGRzaeROgO$15Sp;iK;?SheSVfFrDHiotfM#jOH_;0r`N)loIY6Q#( zn?@zfTJ#A29X3V*2E&BE5A);qVrCl3@LoZ;_m4ISq|j@ywoHFdHYK+|*z3%szWH;7* zj*YSFe#amq+T5)BTr1&*y3eyQ|J3~f3uD%u>NTB>hYg}i;?qG!Rh&=zYY;7qdPHb2 zmf0)iLeS@|EFScEQx#7!wI;H3$EuP4X)`TzBX~%mwQzL>{%LF*l2dO6id0}~hBx)D>nXE%lTcrX@5}aW9w`wPTN-MsIBVs~P!bIhvu- zZ#MsnjC`vcjcBE0%r7x=j`UiG7Xf_P{z06rU8AO1!^kPpYl#z7@+)>~KDLu%w&s7; ztXkkH>c;QjU|O>wMtXxr$S9|d2_S>{D=~HKI@A_*3nM{F9cMxC)AJy8>Ueq)ls==S zSTMvW($@NcvWFcW{exNDy&Vu_^AZwYYvtHhyE z8Z0zWR$mMoYUFAcp!2|-erOLGEwNm%WT??FK{SE;&VxL-GarJa^_vR{eh;*USJ}`J z>bVTX$qR5pk$RehkK<%P_;8@S&HcO??FD;8pY-7Mzfd9Go^mO8j$3h~LG~74*{! zwF}PrgDB^tHCS+NYoZLBl;6PnGQOTP!N;_rd9L~@(Lb99n)JP(Sr~l%97Z1VXI5~% z^}7mNS>N@EuZLmDsSw%^mcNCO8ut!`&tsqszHJfla3!cO_>Ki7g&ojOaH9pe!)@TS zf}1QTIXpEP&}Iwrgk|`f;1&x?3E$%bwAF&V;RguXWd)zKsdz_;o{KkT6gs;>R^HEZwKhYevu(iW23IH7mncV7xQ!!=)k6QJv8=mX{ zbj+fx7rq@v89ZS@^~1-}SAr)k$_8ONArL%erRm}AXz}1_D=ikz#ZT7Yk6C63MmW0- zwZc#NCfF!^n3Qp@*n~>M1F0>4rWY-8v}HI2mK*%DkqNa8J4p$bEv6mAp9ICI;i$|e zQq;AMCQWbcdj^Qvi&%ZNGLl$kR=*giH6S4sd&O(0_Ca%iDzowq*Vf~AV9;sj9i`<^ zs>{whR?CY6|>7ooJ z_)k**E40zow3iCRD|Z-`Z>x=-j%(;>O(i3YreoyHN0Xx5zmy*cF} zZO(!Lq#v_EmEJ@i9%;mDHidUdKV>qYk!~r5p!Cxw15(h-s7Lybc4|FsULDbHlu;nR z)kfSo$_Vy74jW6qW+!*let;)V$DO+hX}7C30##0DHrP{p3pSiC+hA{P9)XGt_SGID zP_@B<+K-jR;ZbM`TJcDC$wN>fIXX&v%Og@oV{yJsx@e5Bd4x3Qm932_*tpV%#P`|o zQdz4@@@pnnCAv)3=p1Rf--fZV<)b|D%4nlg^MT06D_wpI#e`3zQkAamBUNHN`53lP z>Dnd}!cyZ-h*?Qy^g3BxhPDg!I)h;hXPEB36jm1+w+BSQ7h#Vql*mNW z@LC+S{A;kl4Kz;h#~vP-PH4^*P^P~KXI3q=+=&d~fp9RP6%-{I-hg~Ew2pf@ZiGyE%NR-rd7C^yW| zUZHZ5RE`#e-=f;RZ9#?M_ZkD*MAj}xi^30UfHqrDakz6OKwD{Xn!NWnV%VKVIPnAw zH}q~Xn5Dbm7pjGJ{zMh~8eTQDi=tGq_QdBy3sS?E;M+qVS&HZ3H(~9ekF8hXp72&_Pr0su=EPvC1$n{;B7p9)7811ZnJhr|{LYUh0V4zOj0dQ&3XG+h;aS6AGht5b z@1ZDZyE%MCc#g$T4ePMc@V(ayTNMO!-}S-<7Xg}UL0XvZKMBtpYjQ~oPs9Wye7}_z z!aeFhI}$3@&0)RZD{KjZ2Yv@4cn+4qGKM_?8eRk43Y!cu;zBvAVfGm#W&xkiT0x<# zF(V@SYssvTJqH7b{tT;PO(_k!!H!Kla-q$FR77Y!kluVtgA){k%+kFS!6Z^zO%Zey ziwF`)+X&P7dZhRDq``xz6%Rx0GMkW!87pqy z8W-KPq$55!->?$XiNm0De~Uy#D(VV#y3Z?#vu17&Z5b{82+f>5SSqCqo+Z#v@e#rd zw=l(@!924^+Q3Ch8Dj&qGbDSQ4cvFCtC?QCEyDDql7R&3JkE<}5`9RdSIy}lrzy$#SkCw~KnZv>jc?xQXDSaO^} z)?(UnQ_zBbZh*^^u!w?IqQ)e{m02B{DrjRTJdzKfoeiw7C%R2C3KKEtK9?S_Rnll> zMxRY{<4dUY`k38J$@Gvseeratq>BYjj{@B>V#I8+|G_m)0 zmtTDbr$NM`A2S1D@f|_UIThp+nu{8zg87b~&%yhO3ww;H$V;gdb@bhdg<#QbZ(%_69f>bEcfin{`{;#LIKIv``SJ&1%h05Bu?9)<$Tnij z$Y7D|*@cr4gnR&3kxmEw9isN9n89Z568#C^aTFvu-bs=^Y%9F1LB9OzW1{owV6iGN z^EVH<(6@2rf?eV&k)Hv%(o@*imOcm~>$B{Rj>~W;MvU8w3M_kCl3H2!q~;p(K;fw{ z(r~*^#dDRWi)9r?Th_Atc!g0(E?>6aXeG-yyHWn7u`WSQSI(xb;|S4H&r_I-FIQ6t zqrXUDK8|}(7{vqXlM67>qYyrcj%Lu+C>{#Yi!};M&@m~*1TsV+<`J0`!e``Ch+(UM z!s=2}^esecU?`)oCbl_Jh<;g*LUipIh3LMGD8w(7QVKCCqn?$WC6*6Qs#AXPD`P`m z;(0iF8NR#R4tLn$5j*_V4xObIUBC`=?XbEX#_h199rm%q+w5?H9hTYQ0xL{NPuPeT z>~OsuzH5h{+2LV3{K*dgv_n@jORzLM%(uf*I~;0v>5A(2XlX*;;W5CPPGo0 zDAi}1OkB$qkYdNHSm}xjcAIF-S;(d>|m2^W1hwM zBxzDSJJFo*oo)PX<{1tFaW27Px0iV)68o+;yq|fN6W?yG&SvoknCDlLy}O-WCVLK0 z{vI|wNA_eA+|!n0p6sFdGcJ{}E|^)z#Z%x>)uM5C@XtIr4c~T!M`9 z>#7L5Yls@!2Z^d&bwc#*3eWBvHLg}~J@M6U?&nfPA z$D5?KCK*TC__d1Xlq|kNdAOYMq8noT~mah?& z?CN}tsG1?a7AOR-+<*?F+9m};0LoZk0`iyPH*FrsTs=R>GcAU%qQ1n&h`SARMo z4IzU|6mc#kp24z(+Z&I_Yn`Il8?T)B8p-S$dzR#&3-l{(M19#c%2nxGFksh650&Uc zDC`;>u2jiuVyOfveI=o1Te*Lw+-8>9W)_ofHqnK`BXH7}kjN4Sf-SbP6m#G8Jd3S7 z;*d9m*zLDR~Q(Y{|WaZ>EC(ACFMu8|xWj zZ&CbzzZUO*d>4e*Y}uphfR62&i$!xASN%7&_?O=wdHG;0T0W^HK1(g1SUo<{@qe7C zibHkcC&bmoX{lmtL?UynQ~<|a$SrnE!BiA0?LGOSgt2DEzp13#F$-#<#cmzfZy)N@W78klprra!Rb5+1ynK*^@jLYkUz}N0+Yc9qJRkB3K28; z+aWB5@LzzzUHK?7hd-Q&frxK_xOw~mTHVa&bX820Z$n`PydGE=@~tSoh(D2r)dOAx zFHyn=fU+`Q2iH=CGtgA!4?rK)_+aF!&Z|K58l0|CugQN$0kt@tuBpvep^@uw`e0LC z-U5{M%v*}<^B;j}z<*0m&_5C^+H!8O#JHe7B&=IN@6jY;eN&A~c2*zI3($CwzZE4xI4)8s*}I??Y&6 zobX+T3^?FB7MjNa-=EPuIN<9+Yv6!y7PNu`zU|PWINc{-iC5VyNn zb&-Yxz9-PyXJKzaukZ|rpGk~GyE}Wk$T++Up*v?E*M7t$9Po8EbGr7HAOTJ_e16KcAl&) zCNc#xfrqrQ)l$wChzf!v;l5C5?=+)3+&FjMDG43*4b- zx1*Cd$J*(;6s-lNk8{z+UM0F)(fUvY#@p%V6^&k(I49Woe^vawT6a%K&WSd`MPwj? zNjAY{MSGoUG}-l@$*@e-hEnIA4MWpZVP3h=-$2;iR z&SN&{(L7{`$8Av4=&hFXgbk)?eoFnpW)-qJ=SkNKPzb$T><#bWJZ0Cjj7dqG(3f8j zSBA!exKlqcEM6yW8*$lXL56SZ9--Y|UV%RXuVIL7s4~ti0Z;9Q*;%z&bF2Kdd z!q8-#h>nr^IVVRUTPLEON&GG|aiZ1V-Fyx}^Of}~vi4+i_%TmJ<12%=#hd1vyT<<+W!Z7(TR2iHE0#%v(Co$QNW~0-%VNl@}%53OXx$8Tm1gGP{ zlte)S)Vx1j7EU&ybjEj*43fGJEvn3MAT{_rY>Dwb9}y*;zQhx*p7YwMxW<1*-wW{* zC^?s3L#7g5j5eypL5(4ezMxmexP;nmW1K@A&gn)0jqk=2`RFFbT>b`p4UXe}i2$c@ z|3ZM%xH)heD;R$qqdrdK8fZtH#@zx4r*ZoOI*c0aM#zuToo2xerkFp{+=X9-fD)gD zZpwHw*n`YBLs*5s4RKWNLEUj0w>(Q&fK~&vEv?Q*~dUQXnD4GH- z;6PDr7=dRMs;ZXa;eKr$)U0Np1o!%fkUu;DSmwq>o+!sW?vMTc80+z65@-f{+S`MT zdnDxvBJLy1h4$xFpfilfrv65n`kRfXf=ewoV(@bR!07c*n(Ce*)0LtUTg|wgN`2JMk3HRL2Hm0Q zUSeZVDqhe}z<}m{OnwtpNw0>s)RHI6fu6H&LA8=6O~(_WWc>)LS7b}WPK~X92u`6ck&9?C^T9xbPMJgME9!k(I`aXoiOEr_0k(L&(K}K zr<2Pm@l4!|7RmC!1U!>Tn^f)^BAQ}Jp=N!EcJNHKAfELN8PYTh@?zMYMdvy^cYkJ*W@fz)EqlrinNV&P9fbBg@VyD;Wl`vP zkcdZ+kt&Yw2wnTi7VjF_-L?` zxd+MEDNntJ?*NH|KSeVHDNrJsjftmaJPs@Jo-=#2_hon-?|CbJXR^3+Ogue7XF|Qd zm^f_F@m^$8P=xmuaP?lYC^d8?@1It@F{JeVWyUkRV)M55vW1_ClD${VxRl+F)Fpe5 zu!W%3Vi4B*J)>DHG^72A8hVe}psJZelJ~d`i`V-Y8KGE$h8zV>@bFpjNLWTjh4u_E5E$4ffO$R1w(*duzQ2 zRBW)X)|Wul1_x>*iL=87hx%K0LdBi3b7ZeezGVqA(WadiupBR!p9V;iaDVeY zT_talNe)=n#uIb54P!E!j{fIOwqZfQ8ubJHL|NGFhcFCmRk0s;a8iiBRI zMS8zM5Ks`|MHwszb}R_kf`w)mLBR^xzyc^1s)AVlzcaf@F46aUe81=Up67p`WM|Hq zGiT16IWu#1W_L%UcbhRa&!l{dbC4Px3&YHk?<4mz$pc~JjTEKM(}tkO&VwI~R=<$p zJZ?f-QV@0RCrl_f=^V{8n@z}(RD&)kZ}FL6WYS)=gS^dzVw0A@gyd&TC^6|4C`W$I zgj`9<#I&Ad#*;Ehg;d}RCX|s>LTN8k=fjggkRIU<6Ka|CE)~Cv79a2=P|`wD+wRBs z>M8DsxT~n}J%gyC7ZJ^p-$;fAl6nO29aG%#Nd?fNyw_|CE$IkaMt;Y%r{JU&{QMMm zdmlYrCVyy>xRQnwzmM*r;vwR3hNn1M?mM2LqGp_Dosx#fof7%4`fPrAEi zk@YNz6x+v03-sF#x#`Cept1BsGzQyu zHwqif=T3J=`2M2Kw2#_29E2J7QRa84vrPopVl`x7?@>;iSDG=M^nZY8skt)xp!=|c z1P+3lGk$;#u=fc(L*UaG{MZKs7DJ^ORh0T6b@qDzw%i1{rvRuAnc=RJ+0A_AEO%T= ze`?Mf#Y+IRb&@T?#{o&jrs~02d{RPOJ`}hO%+~e3=Jb1qQ z*L?b3P5Ac#TS1A3lC~kI=Lp&&qJ)aYb4azQ<@-nsd=s!Dxrgbz-2!);s58_iX~Uo) z>pQ9)S%HI3U*OJ_t91V80(U#Pt--%ofR&HW`5z11Nri8qq+ppba;VtBG%SnVj*HZh zeF-MPtz}_??0dh2Ka=@YK6gy~OXxwt^Q@eS=?ytc@g#r`>5SKNpZnzy?Fcj@OPK+D z;WRmV?Mjczr{Cso_pevg_s%a);PERx|9bVF-``ew_g}OBpTFM9ao|q*zh+-nVCFF+*lGGJ;iqTI} zIb-n={Pat>ohiieyzXB5go)_(l+5=$>51X1UPcGlH<7>cGIlBLimIa+d1mT?sk8c z9^Ve52JMH?`l*cn(G+6bpQ-a9-?|6-Z;aRq+7}e$^F3b$WY)9e?o8F5j)CCT5T5fr z7LLj>C9Bt?AKM!CL9WAugnf`mjKFF*im)~8gN!HAAsDu84f`NNF!HP8KyPc<2cZ{p zun#gCLkjjmc3@0ZZ$ekLoBJTYVK}mz`yezu+Ox*-gWtQ`c8>(-8#TIaoPatrxwi~=dH8;u+(>_3MhxRc!)FI>9@@d%AJ?IX39p`0jf0K|*da2(iE z;8$@2M(;$8_NSAydgOL$^qGNV?Iq~QrA31_MeB`nQnjx!*r#bnX)e){QIia9HfUOC z`*_F??wB#tAy^x2J~C&CqlMdQZ9$Z+l|x54S`}uNTqu@e% zLk*uLeHAJx((ZzK+H0p!sSes!q!w!nz{jn9id2vG7+?N_+vz-x!uDV(1H7?0F%WWN zb7D9|!{)>o2Y>SicZzQdSl|<*BOx|6AjtX021Gs7fenbIkQ^HjN5BRf5Of+7HXv3& zE^I(_h2F3M!9a-(2pa^)2E=tB!3M;g5EL5_t-%@_5Uo%kHX!IG5gQN*$bb!q0+3(> z;-j9B{ivk5Q0_5Ef$0q!5Z#ai8xXXFgbj#L7~h^}Y}Y(TUCgbj#(fUp5U zyL+?&!Jqxny)yrPFk@;p8wRYl78Ljv0)%GTH^?Mwlp*jU!75h0+Zr>@gr^g=PbI-XG zoNq!4%1&xwIjtp~h%G6*tvi_5;Sv1VbMES_IjExY4*5P*?lOY*QKRDB(b#yjin8BK zbHrwb^ET(*nQg++^2$dh))iZeKA~8*C+V>RNsLddo0V8MUvS>-jhjYnKHZ7h#wi^3jjAIhdS`bKsa?L;OejKM{D9ZByuCcSPY zeN9c^L(-2TiU0PC*cpra)$MFaRg_oBqKZlEJ?edj8S9N<&q-3S!vnzG`6VCnt2-%J zVBWJZOMk^8aBf8XwqM~4vWxufi|)QqT+$`?BW)De1v_G6cfb}{E7-WGIxwP22fz|> zQe^yL{?jFQj@%oc8~x3l?xf8g_NB;26+QraeGGMGMW{l~az5-gJbTr_sIU9Y{hr!J zq7HVG-7IAf0JD^vM785ZDL2`zQs(^S&WR_hVT%Q-@IjaYTVf{(3sL&3f4Pew{cnHa z5wZ@(oe7>27XI9|o?jHUyuOd>!NHU#_+XnS5j3-Ho)md(D8JX{NdUOr=5evP{IJc_ zf<3#|?wP@EtDlJ=HsA}Gr7ZQ~eJ-joaEwd;tK-z{`IP_H9`66*T5@qf!NnBMUB>@( z^rYVC{MD~2@T|A-#78{wT>iQwj=xsyd4RvNP>$g}AMxn*8{M8NneXlplUT2I^mtVq z0a;e&`5A{F=aqZtl*)zWo}cBWZ#BIB;!LtH9Zw>N{1q`=xc4tpZ z<@W*BbI}C@akEZOK&SIFNU*INAxZBvdUy4!syy>@yAPoe3LWM}3Sma?Q3#v{ds^x-Vn)VTjO4sOH z;ThV~puxB1LDNzj0R3iaUJN#^w9%kxEgtY_qj7M{(!K_!t#&PPWovyf7UXCXF*@XG zNsuB>>xQ<<*DmlKb3IA@EOSV#^E|1(2f!IV-3CYspYB7Dz^A(e8-h=_ z8(iSi6@UwTI@-5@Pe%`Tz^9`RxWK3T3Ub4ztAyb2>F8Zm_;gDl34FRJu!c`}8O8{o z?l3aIrwasY_;dq60-x?@{@y%~y-O5|Jtk?iuM3wh0RqCM>j`s%OZNv#fJ;|_0507O zAmP%{v4?Q!ZUO|CPD2K`beTMHzGn@y^R4qe9V0fNJcsrjq>a@c1c6JNv37wc86C~F zz!Q@{5t_puW(ryYdzhUOU=QVjEfPe7|-J zn1?95tj^Pu{lRaq^TZa=`{qopWWV4?*Tja^X^q05D(~03x!bP5|WFvy_S>%b8CmHNhVyO+vFEPL{r5Df(&raFnLsPf@JP$I}ZR`r}hUM4OSzkY9hogtYi? z_|V0kR{cwmS%2C@#>Q_(L+j6)P+~moqUg_?kSm_hOo5p`cP=jw8?}F;|2H!M3o1phiD~pUj#(g(~ zOC7%lf!s5UZ@<~oE$&vL`E)%h7+MRZ1nb9MLD}(rLV5fWPxpj{B-RP)i3yds$Z;A| z=vyI)An+~mr=mesV7Q~ngn42zYpkyqO7BzS`7;2Z{Ff5 zjBHPBd2by=wALY8vsdfGZuNYi1dOBEPx^sQTl)W%(rO&!1tgJur4wEnA3z_&)HU> z9l4lz#rjm~R$#mGKEUGK?A0CQmN>8NeuCEVw<*|Ee`c#^i(y>Cj6x1e2sIG~j1<1@ z6;I=nxko4IacXe~tUu9lMG+Sd!a^`e6^bBJ8Y~Us177u9;*QOV>TCPm>9Wq_)bUm0 zAHFbW>N6MSOqR~BtV>I_w~@}?TG#9RoTbQCFV|$&iD_CCIcW7zX zFE5_1qeGHP#JNJ^>ietwtYfBEAhv@=z-9H#p8c{{W+b^HL_~?Z>Bg(3t zxqSZIqZif=u%B9DFa2eEe%r23Up{}9Xv(S{JyoSZ*x^J&So2V%fS*=%zxdOMIWa%2 z3M9JN2S4~uN~4%u6;u^-|H1D@;ROkR^xy0JZ&O%RM3s5!QM3>#%I_LkExBTc?l^gR zA#>4HN{t^HC~C;ksD8Jfkalf3C)M437yS;yX~hlx;_R~0@-WUeD@nZHUXP0(dfoGK z{j|NFOy&!!c07lzo!SNgC=3t&q#|}v>x`{T#MSISH^oVU? zxK_Uq<|jtOK}{o5*k$F6F8FEUYV)Jgc1S$pO^*?W6LdeU?Na+36)9(C9&m!;sTZ6* zoV?Y3Pg395>ez1avtp~6OB;IK*whyiwn?abEhMVl5qU-P9zNk;53Pr-DrGETGDRy= zENv_+NE`amnzC`peD{9Ohe5C2PqkSD zBSn(vw4xtlMasWq4%0zPa-T;?Q0UkTSy4rY&Z z12Y7pq?R;MV6=UBz>o$tMfnKb)-GC@+ zQ(S~@>Qn8i4NL=Yn4V^@Kv68P(-CxZeODEHd3^!~^C@~%CVY8)Js3^X52RtmR(}Y! zoS}c)4ZghoHRAL1Vcp@&>nRx9eL5WkD(UpCX{LV%H%`_&Cqh|zbv}g9Q=nO!?!^|D zUH3hfgTnPZWY+W+sBf_TR%gs|x`Bej^phyqq3`Sj&qY6kc(|TdiZweu8^uKGHK=ct zUIzt4>oYJg#puh>c(MAeC^$}^iRmp~?*!oz^tan#GSoYv;3WN<1l$|w@8#j%K>xvq zI=OTo{GJq@b}m!(m1u@E{pt?5InWtcWatm#+Cryq@wC*}fKjGi2nDs$FQHvq>qA>& z!B_ti9J2IRvvG5v*Fr1V`fae19Q}N2+#Kk;Dsgk5cgO6Pug?H|f!?_c>j(PEU>{a| z^)skPk$xPu(q1ow5FPYg5TaOr1NCt0w7BBYM}VnUKMSTE^+Yf&(U+Iwra|urrn~XI zesJA`&$~lYuSj~oAi8PLRoLrmFayZ;x}=B0hj>HM%aQp_Nw;CUb|20SSOJ~ymvmGY zcNF>wG~9cV9*RaeAn5~8=0Qn6jzZs;bO$nifWsJo{7};I&=c+`^w(R_9fiICvV0=x z^sxLPNw>G4I||)^Xh$TSL$pr;LA1{#{T%A|xum}eEBZpxKO2dHzm)Vs^opaB{s2^P z3A$QR%TqL^sYigdQ9EeMk05!(zi3i2CW5lx6)r`#z4&R zfz?*}Zf1m~@%}M6XOg66OgFo`b`qGH{x`1th`VQHkFC_#HwzzGSjWuY~!0RpeA=$Va zrV=>Bf;Y*=+oa_h3w}~I+7iE^0q+QYTV>-hQrj>qy-qQH=niprgs`Q`^4gY`r$4m=w07Wf;^SRjuHW@I}q zYPzq4Ot=d%uETg7__dX)8661x#sY(lVHlDEzqLSz5kuf{3yd_TW8?`uVX=xe9(Iua zP6ix8sd&oFXp57S4tZM1Nu}I&*pufPK}L1SBG-%^MEzT1QP*|n*Btf~%TKr9s}JLj zY+MfCdDzqCDq;Eo+WqJ>cs$#PASRkd9R!bOhvUGiKwW!6Bu+E!JWzWMAU&RK48!0a z7^G3pqQ|q1&_v$%h^Hh~n7hNm!<;`Oy%`n^bN)YK8_z3MMR0#S^)+S&W zG4<)PB(U_EBJwusGu2A9^qFRXmOj%h(9&my1zP%SVX=xe1|>(J_?A|3qB#g;3L)@i zNK)^DPd#z+Z)NuxL=>izyxQ@t6Vnd-gzGr;${_-&tg66NX?{si#8 zgI!Q&wUw>6(UvsO!vg!6BJ>m+ayYTdY>ca{RI@R9Y4k)3POLH;qqjz16mM#bK9-V2 zV}SM5A~T&>6;3Bs1@iu%dpzNyJqB2$W_vvFIoe|Y8X|Czb`zQ*+L47~f;Q0?j`YlI zn$XK}mG!~6s`?CEHC=%-Qzz?56kws_a63G^^~#H(AY(F}W)a;N4X>&*=-?^61YGOt zRK2hY%p|q2E0X5?1>)!x81I?ttMn1sXW%U9Q!!04{dQcj3zZ7{QWs|+HM$RG5f;3k zzB!|3p!p;{8-onK_=a2#osMgW)yqn0YEQKwyCPV{^a%*oF?|(+jZD7?m*Xv_C&5iT0EHkp#Pl)b zG@?d*&>Mok?L}fJ>vOtcSi7Jw6Au(*I0{8ziaXRB`Rx z1!Ru-D4F;B($muQIYu))it`tkV4cYriHhPiPFkG8Bgklee$SU!DL9kLw}0tLETJhR zIEW>QA6$YLCa)du5h$qXRQp?ZNSkYD)`Zk=L{WoWMFFXXHeT z;r5p7Bj_NK_D<|stTn7G{#(?W*~=K6N3L%bE%^q0wutGU;VSEAaaHumpi=cE(3DMI ziMU;VSm-NKf~nc7*}cde|0UX$**7qH6k6{CT1ltR1v7mp<|A3(ia}M8BI)26`@@WU znkdztq09qy0v#n{&s0t!kE$lNM%@xVCxLS;lsHxCPk3YYd=n#!ueU!J!si_G19hF;8k_D9PB_%x4}&^;$WmBMtt19cM34WEsQug zidK;ABTWnw9}8ZJ*0hhZFsNdtlyDLq)jrllnI{X4hBe#ASw!M6qe(eD^lMKlyTJ3l z#tqbZ_+IuK1p!GtUHOEho(T=uXIt6ChniOtX0C-15_9p7aTq+XDBf zLhFjyC^m+)2DnMtg|?@otRfFr0)9fNi4u+Qtis?DCmh81Y=7P?!94bSS46}X3+$LJKyrHCpGpYoO1hD0!>96R}NDV5b-;R z7`h!Jn*9eeHSQH2eH?BN%(Cb>%u^~{zP1%O2cVP5Nc$?UbP(_z9HIj(_XCG~1 z%!9C=!Z>0dXVD1T$%NAF6D%5W5LT#auTi&vV`4cjVXXr}P%8+exQAeSs@-?JN@wRp zP_aT+moTo_r-)3b$ZIM+_M5<|tT#>0rsWo6(Vdn{Ot z!SrX)H)VZzXBx)Tnlyg?1bW}sl<_TU1&HA69|CBv38_wKM6&HOACmYYk73H z0ArnYRNnR#i7KbXIoH!r{mothB|2|Sxt|3J*9Cepls+4Sh z(BrFdl~7EuO=S-w)o>RhpIyXJWg`lSHjOq*g2yKyUuTZdNd{Dr*f9Gi(vz0O> zvg?oL_~E@Apw7;(_Y zErjW3VT3Vq!t}Q=^fh|C8e+SO-G}KaF%OrpHBJx=6a-S-MK~vkwiH$kO&E8#M@pKA zBcCsVDngU=DVUV49s3Lok4ZY>l0XL=X_$;{T^V`u0rm^K~* zU*t^m=#YmQL`Iu^glh<0)IIPoLbuRvrFuw3^x0iOnCEw*Ia%m)>`ln3f0+kDeI^=> z>33s*!VF(m4bolgQ6$I5qpLBz;d6;-*I`b?I>HtNaN2}>u^(|{*_6r?fAC}sJ_in= zbux7s>maQ?Fze8pEQ~lkWp5QQi!F>e*5z7srO=x#jBpH`oq$IuEGiN7jEoT`SYeEHP2t;Hid9oq>jT zMnJf*>1HpJoO1}8K?!JQ=SS$QVKe6nNON8Xfx>1j5m2ymY%6{%it@ckG;`8`jXsWX zh&cvsL0o?y^}*5#uJC5*IZwynwL}wwK8w>?J|LPd7`-H&J|hmA3vfsrBVPnQhVC0P z9n-b|gj zj(IN%DAG9!P3@R(T41bmK5Wdf;B}Ff==_s(Q+Gf>E@wVM$E_a;D8*TafyA+#%nI+= zIiG~VIpS6b+e}M$E@}zzHWSKlE;RV7KY2R%renHr-2MfsrIy1=jW=gN0ct+5#=fU$ zQ2z|(s2V4(aX}Tw;LO+6)w%RBs2LrkrH8{bf!QtT>j|}rVihK?j_Dr|Zetx{(=42< z(<=;hyX)#OA+(``w2VuaA$|OJs3bGGvAI-ESq3S7IIc{JtY`sQda_|ih);rk8BS-| zOjHrDcPx^je=?m;6q5A>tB~U{wv=)tV06b>H0(>tp`))!`g5o()3>8FWZk#8 zyU3EpkmY&y0%ZxqaKVh1n1MFYR|^|BEec6Sli^(lCv}^W9X)JXBWJpM!@Ev7W`yW$b53Ac}kuEoFSb_WHmv{zx0jewfXr?5Sl`NCYa) z^!!f9E=4XtI~ZTE>yR8jM+o;dyPs$oGGb5I1zIUmLb=8Xwv?#m1rWy{*qcQ439?K2 zuQW#MP#cmFS#lI>u zgFKV69D^n${Rqqt_nJsR?XQ8>jaqpClH*+H7^)Gg><3^BAhpCRy-+SqYGk-Zf6(`OYtoNrzq9PQ-)#UNvKqTEim0m@d9$f z5W*B%7;$G(69G&+3nNC$fmCvlg%K{S4rLo1EQ~m~>v?F`D7G-o-jhr?Dnh|6qR)z97iFLw`%+}qNd9K%=q`@vGJG`g~qEOW+Q(h-V#4YR# zT#V{QM!l4CKqNev1#BNHo4AK6K|>EW`ZnX#Qwaq=k=TX3jF>UNeg0BS=OJ#}QP7xG8Q&l^rB_pb{gLAJX~4bDk(4O+CgKvn=yOF`9aehC8pusmB;^ z(KJpy#smw~IQ1BlER2|X)}dz`<_(&4qS#?{d}E45BOHyciG-SFqOfWMX`!@Xiai5W zE#-OVJ(0eFh$jS*m0m0Vd^Z5u!20o++<;d;Pj-CvDm_p6%hA1%2eV`MI_Zu zogf+J9UQgo3gr_jY-JI$t+cXr6s3(12Wqu{X+agh{Kvnv7{aXaD=i_dg0l;rsCH+m zKq@t9#8?>9Q-TH`|Aq}Yj2dMqMwW;l(0tT#R9$MhPk8kOPn?e?Y~yK@sd>8DN7cYQ zYhiFN7Mws+w_)8Snx~sZ4#Tuy)GJhQObSg;;nR1a6ft#&TeG1#b%)RLpSr_m6B#T< zOx@vge0v2*b2oOu=9+GNh!pY~(027(OcNnA2C3hm6Nk^60BrQ{Py=VM$A&|fISs+gochu*8qI|6RL=uarK z^3-@@R{|E;Wx~~^-+=3GNv}h2RMOWXsAKw*2sSeP6-s0JAxeXvumQ7+vONpd^aeg1}Zx1PP*({cD1AgT5DjE zL91;_5Tmthw0<}pYNlZQj1T?Q6Ch);ZQQS(L?10|D`6Hcjb944bgTdBF&-vJoI;!NoZjoT=5 ztd-mW+c-SwqQ@<#rSU-*Atr6CD9IMHeo|x?63oSZLH(f&r4D<0+ijmM^F9$teB=h36CaI}}Eh@>7>Qg+c8F z<0k`*=Zkpj-#p2KsnJNfpkH7Q0a7r>v>1{Jgorg=Lg=8T;K^vm$gip)Qx&82$S760 zj^$vePk0*nlj}fA}}J#l5PKGSo~l4;gz21CcV!!ibfsCE%+JH!+GB zikI4f8DU|>z}u=VFe6Qjc?#DySg$h5!ia^cA2B#9W2{`_1hUaS^gv~tMI??O`wD_9 zH&_^P1X-x63}W3;jl`a)Wmq-(jxtdYNO4hc+Y*(2>_wW;&LUa4Mx;>dF2Yo=46r~o ze8PlUNf{_8>1L4hBBzZCHrB!8R3=+w4r4x9VXXy58gcOZlp8HD7Q+t-5?M^xDMBc_ zx*Hg%dI4Jn9hj=F6B(LR-TLLnJYN!3eDjGwBPS(qkO z-)iL|RZF2hRhi44fQY6B=ZnO|_aQt)>FKpEWu2KXlGf7_y1=Vb?lLjvIcR8) zHS9bwnj4I?J55H!nHX(ksc;<==sP^h1OAMB`&~di*o@P9))C}k^yZMV!Q@1&rMRmx zDyJ*6*(D@LkY=e#MGN09$S`1;ExgJCHDe|QL}fMGhbm!)il7SNo+^Um!HvDoZ0SeE zx;#E$VT{#5zKPMCffLmXT2E3QV>IUDL^Y!_2;k$425s7SY=cmFLM%SWX-*>oyp<;z zjn=epwwy}dY^A13kugO5l&D(ddKy$-WJVeW3%eSFtBX-Qg$8jcM%ZD*q#nRH`}6UC zVkoP?JQ^{DXky;zf_@z_^IpVbM@}4uv(6|ARXFJ>=ZHBE2uQ_k93X3^)SRbKWW+pr zvPH&Phg~g0#|U{8q;_>Pt|3&I8r}m$^XUZSnET;cXUQ|pBkpXM;zPDsq;@KX#!q>+ z4Jr7>f%7p8nDU%ckegP})sG>aJa-4NNQuNaE7w&*bmuyZ4)RSDZ4gvm)Js6B(?^^Z zPY{si`~Y24zIm_U7c7Nz1KO_oo(4@wKM^O9Tx>MrDRe>VU%=SaYXPWKro4m@F*jni z#bIo(0PXA&i1;*$Qt_SOBt%Z%FCf+VOf{ex<{h=eIT+nIawZ+bM~AV6yorci&GSK* zA+!Y)QW=I)&R{@@oHZY5(Uqt^PGn}&ZrG!qHSf?RaWfzF z+zQ;};{L@+ALx#H-h@==_rZYbO~~#n#ywfo3uZpexeYBC^`Z&s&S2vCk_iPmQ!(mC zy=+23&UrBPs2wI0>|Eu8FCMki1VfzV&_UEL6AE?Gi*8Z7O(@LSo1i@=n0T86o*^AVM3A4wa{VIngobz_vY((wOB)mcdmogMIHQE zP-Z%}Qt|Jf7f>tbJEy?RqrNxOIyk#x`6cR< zCWRd=x;yarvz)I)K#OAk_0_y6_hes9lyUDbN^Bv0g zhuO<|JC9?miTcy*SN)uaNTq+Z7x@Na`2i3!*GAI@8|$eSGBa}yHD;0EinWkB(pXJL zl;Bi2GxJ#E8W)o7R^|!Dxk`WmR_0n`16jOgWu9itr*d^G?=0gtcnVQLR^EBWR%**& zkykw7^eibbL}V5Z6Ffq^Ls@$tG5Z2Xy4a7*23fofo4-TsoSLPO77)8I2qaMmVXC;uz#!j%>vVnLGS~j(k(F4cmk6wj5N+7Pi zt6GU5q$g?SDnh8IA#P+khEyDVHwftHZFUT%(HEB^Rrg>jmh>VFKC0dY_MquyFoR(I zg+#u`=8g32B%*q#QqtSw%JgO3P`ExN6s@eki7TGsc%lqru!n;(Rf{PJggTrWn8cKR zBm|Y5stZt=3CYewodK1bkm{U=p(dungzyO+12=#%m2ZQW#$tMQ^?{jAM=Ue_8uUY1 z?}$FF=$~LnQ1y;5L7Tn^!-`$MfR2EtB37XaG5w>ED>X7^zyl--eTFP%kf}4t$-pJ% zT1Ws5s?H8UfUYwk&3UpDpur|(u(PHbknegE#7)q1Ie>@sCDt8ch8Du_b^hKFsNtj{ znk&By1T>PWPgBi3n6Y9;kp%FjoaLa28DsKtIX{E>$BZ?hbY~eRvY2t^a~GM;2`vHL zKy8C2cKUwD^cOR}t6+n{4^|s9!OU1Fsp|=xNT;~P1VNtC*gV>za*jl^#1@!Tl2bu) zY@rFM&KlfB#I`pf&G|(Ypbj7qLbhrRsMt(%IO#y4SfAGfBb^Ijd$Aq&3es5TSb|DS zC{DC*Y?(=!=xS;1924ErR&24~i^gBk3+Ta$g(H7K0Yw*}+r7hp2>W!>7a|{(Cjz z*M;wm11>!YRkkgZg^R7wo^-|{U$j6G(Bd(Sz_vv)b(NN_G7w)ZUj;ml&Iq{%)*nb4 z$%GKMy9$N_#4}wa)-jnWa{#p>Cm0aLGfL5i5T{X03L(F^wSj>`KF*YNNNzKE_zeJj z6qiEQ<7!u@U?j`z)D78&;02(MfioEn5zI}7Llk0|A#MxJ2T!ETSuXIMtulp9No*w; z&sK@CAVUf@q?Gv$^r)gbN;+nqj8D)>OmOs=9DSKNbaPUK`o4xV zv%W=s^(`{%OAjJ}%B)B&0C_yveMwnFeaADQ$jo2h^C{Kf77pt)xmEjdtM=n2mYsdL zwO|ip%wyeTG0?LTWXzZh9}F0Zw@62`vmRm>5Owd=0ne4Qsp#eG3}dVbB0S|r=mBgw@0B0LrLsNi-F zyl1u?+_FDKQ?l_gqgEVC7yQ@@7#nkZNCBDnv56SH@oe1+;KU`bFJcg0LQ6^V_qh`R z<`2WgCFn(FAG*EN8~<#QT=nx>j}J*LI3Xk z=))%bF(rS61QU#r@wP*}9pHUL?G9^OARLTY-TtMKT82wD}4uIZ~ z)b*bdiS;BH@fjj?tTq1pBG*Wpb7}42d*;LZy z(sU%1AWB+hI|mT6e4xaoj0V|;#KhBe z4k0>8CF`x6W4$G*3p*JDTw6NL3a^IY|5jo%s6vvul3$0E_loh_4Uk<=Ap)2T=_kP5 zwqf>TIc!NHoDz)p-CiO%*C!C|3Gq51@&w$U;P(j57w}Yq$zNrKg5hd{!>LEM6YxWT zD=?-@AEUnG%Sk&|v)oFY4}?o^88%Vjv{G;JPtB|JS;?40MCM2Rlk*!g(@;XJU-wTf zXh`jW)Qd>{-b|Hep!hxk)6t|erBouKMjvbuIiM>@XA)`CeJAxsvbi9eV38GFNp>Kj zkqUO*eV#?-$7p*}BgJf_R$q(eq#s&dlIKh8Rxm8<<%eWTSbICoe@qyORQ;%5BIS6A za@^~OWGg8LGEo1Lq#o>Y8vtv}NtQ4e$fSBS1xv1k0f-5AjhJvhq4pA!?ww*rzCi7z zfjZ6ys|p1*sR{jwj$4-UfwN$#dXyyqOi0wDKZx^Z0T~NXdM-w!ijr8hnaQ-%tMbtl z>T^RLD9DOA$HXYYu8bzbJK)@Lw@*#;#b`Y?=$f;xRnr=w%94d)ei$Q1)8`K$- zF8NP^z-edAmrZxlbUHzX6vyq$NR%bUY6a+UJ>y{DL;P+K<*J-PTAv z9K>+!C05UJ8;GS|e#Fv7qAesLW+0MDwA-0r>gelF_YBcVIpo1oC+$sy@3H&AH1`|e z#HHXgV$9dO@IgN+d9GUUHsO2c?jXW#xM0>MKW`Nx|G__do9zRm0vl9sS15Ty?j@w> z{)mf7x)zaj_-A|B*#=T}wI7v`j3~zXNVEgYUG;a-OvwZli2e_fZ3Lr-sJM67Q1B6w zvA)fVdmI#XRN6tdsi`z_g-lJD#Whg- z9DAQN*Lv?VQaTa%h~l3MlQKu;Blkc!qq#8G7Gi*{k;z&y5Yq}1bD3rh0i=_VfV~I0 z9I|ctt)t4Ou~z_=P`pzbVy*zR5seMx|HY$xiH(r&MS>U`ETn|7LAXQa$WTOM2+as$ zY8Z)*Rz!p~FzzB6R-dNwr9N4>U_R>2a!I}iF=jHwl&>FB3Q#b698P09n%o`0pmf-u zgJlBQY0aZ@wjxptn79xcXh)-MEa{&#$VM~z_>dTFfi!U|nb58|*tR48iYhRi$cMA* zK;F#3YDm4p!TKI$L3XNzXhDc4k;7ip8WA+5PoiU&rKihq=|{Ym;s5(afqMyo{{WMs z(MS+1Za_q^n1l#fL&Ypah{HbQvj*;p1;CMo9BslC-9&U`EW)BzA!{ER{~N8QKWj&G z{2|upsi;V$xu`#z*A6L18Jm*`6n;%9Q&N!fJrlz=r8LZV*N{``kLba~a>7L>p01^o zel-6jXvqH^8n0V&2gH68j66W*&}v2?$lj8H|C4U#HEC=J)Hmtw8n*%eT0sg z3hGS!+m_1t=K$A$O~DC7$T!8OEOEJyYCMn~$Lz{%vahkK=|EFe3!s9oWhfS@wCF>x z2o3703z$}LSf6XfOd25XMGj(>-wN0axsj6#SmH#>{3fRi!RZ7znX_<9k=G5TK1}0F zh%-h2T^VtOQE8U;F zWqtNmRkN}Y{){? z6hQy1-(GOAFn_fK$+f4N5FY9hLz@sSU(G^~`99!rl*3r?QBV$P56?TXglKTwy;!(A zt?U))Vu^0Z+7LWtHvTgcGX~Z*B(xfsiGvaKF*ameJVv|*0x29e?ztC?SgAZs;|nL4Vug)nXXF?SLs+aGg3VRHO2)zBL&^2ZDyjIX^v zY6PJ=_+us$rq~ZNl=bL}CAKs03TR~_g_b%~#Jb^7b{L9OURRlL(9INTTWJ`Zg8me> z4*qZ+*o~olbit~ZkLo;(&1r%3IPj!&x}O#4Db%J-7tn=+I;z&9BQyUmbSKbXqZV4_ z(Vdf7-f&id)vK8KjF$fy-81=8$e-~mV+6YkwP1gsWX9sq)5VH)%DqJO3y=_E5iG@# zWv%Ve%|Z$d7f84lV~YddTNjIdH2F6qoPZV`kXj_rlw~H2WN-D)!8E*5%yMiPyA%hy zpDj9?p9GzdP8!Mfz>eeRGg=>KL)ks(O}0cZeTL}hB86*=;d2k2ep1w zmiJqhnaw%{E1~WnkF8~Jw+L4dgO#_$yISJgO!2!}B3fYg z299tCvn}P62J-S?Dxn9zF-nQxrMX^hU{8`6Ye(5;?a@%wCcXT)L5$v{_e9jNPopI8 zJcA%Iod(gDYEOLonHY-p=YQmSH!-+^0tDhmA`pKj4YV-QYd*w2#y^<)tq*P>)Tj7|7AP>Kx`F~&@p}!| zW=ub`P^yH5#76N6`wjlnr1QC$H_?LlqSmy*(yt}Iw*NI3xQ4H7r6&B^Y6DT8!oSO( z`a-XNpd>01;7Y!NEq~nYjW=Mb()0Ld(lta^$N2TvX2t2ID~;y`S;hJSDNrySBue&rg>p z2DH#HpNg9c^gR*w1B|$68AQeHdR_Z;&Vy{$rZ6sF0v65b!$k zon8xUP+BN5ri*{VWZ7?&8XJocS5k9hgra!ipNLEG4=+#{ zQxBS{_BrjpE_#m z_-~2V^!el8AGboMuk*HVcF0{bbV)jQ_VRB3x5dy$um86L>-qnD2>t)Vb7pS5+FSmw ztIGbDLuvk}6KuA zxT};6$|~jCd0yon#f2~%VKzdS1$QrTW~i!iQtFN}9`cQDsm#vK>8ONxl_}XnO2MQc zp`cezZjCZ4J4ew6I&*SnYlGUR^z770xy-!EtqZ)$klo05WB;19SZijQdioR^)Nl>&I7p!sv2 zD4#mkMSJ z(R!5ArDPK2iFw&=vvP8QS|Y^r{U&Jd612zX5u3Y3{F`}R#P3zI=siiZH15;ibPnVGHJ%SNN2jxOjf zhtX<6gDLHiS%fD;iS3RjQHZ&+bG|n}H?O23F}-zuNm?7^dB8^sXfqAyq_j?*a^(oW z;tn-$jib#G-zzL4M^^pvoT&opinhO~uyoa?+{(JAB&Q^!v`Y)J0WW3URl9OHnRK|Z z#ycINH%Wf8%0~}@Ej_HV=sq3OGn6T=jxwF3*HE<`DoYzL2l!#$R#~Jwb>r&E(kC~QVIAPk9yjeB1lV^^aQZsV$%tD^X;$0+YOmNa$P#M%j?YKBc3Su=L>gpoD1qo$0TJaXKKnrY)E zj^ck7DXI0&G2T{;UpvV1y4UFL1W^~Z|G)*o8t zohZlsO$XC!g$5?^-=8Rs<%5@d2k@0o77ygE72ZSqmCeO1>kDr4J}&bgwiL&4V{7rF z^{=e*M#}Y<{^PAx`5f*|sjuhWJ6IUi3fya^PMb_D>$~6OJ;-?KW45IFN%wf~SNPdf z`M;k9*X)Qfzf&ecH+XMi{OIJ8NWS|KTLJ%ZqqjKuA5}QLR;uXQ`Kqfscj4RqRHOK= zUByM*lV#U=&wD)%e*0a;8u#As3FW!Fi_7Xy-tTQMmKx$v-+nW^6s?p zkhh9M>X$$6O$6cz?-4nKe8Prb9Uu02U;^*)lsA~?ZuLfT?-uVgUb)rVBaWQ3@=&dG zv0S>6^$je2xAe8rP^m1)#TRb##Uy7-cNg9;}f6tX7U%G@wUwWo7JGo*;7VM$euQ8*0k(@QVLg}_2%$9pY`6z?|t4I zSD*ZxcRu6x=e%+J^Jlz)y+vF3^Jv~j8tmi$MB~?w_=)Ge9e7zi_%E*a#;)D&jp7sQ zy)pb;J{Izm^}&my>yi7rmLf3%F8&ONmO4;dL*1 zbM>K(xP`5wV)%g#O zMEYf+&pY^MS%EAniP215Slo=oNw64e zv556!QQM5gv*7I&LQH7Jq4x!={g4}Lrj0_ZYR2I-IP?=7@Rq_A)mQ}%bjw54Nc7{d zxfzE_tT1g793E@N;Vp1jXK|o=)CNVo-i*T!;2>1V@7-9SH5$U{2DBV4^ILazY~c=v zY4~e;=r2v0PW3CG2y`f;v3Vu?nvzGOJLWgbKGrXLx?lEz&9Vo>OiUg1YsR4#99+mr zI%?s^VOBE^L%|`Pbi_Lh>ELL!%CF!|zieVx9&m$MF6IaKw~gsY59#?=d!1i)x+!na z>x<1weF%IKMaw+jjKfB75IqLDX$)-OaI_hR-3@X_1;JSTRr(E5Vg>I2r1(p>)sHtV z7c}s0(Tv0I;1Ee1TBkPSup1o6>Pf5Eb7bZpVOQ#1NQekB(8(O<9d$3gEN z)QtY5AALJN`i0FT%nTs2DW2af`$fO(*c)sVZ&S1Eg?!r>C8qeHX4$o0n{nKcnddy?-c@2E4zcqh4>0MnyETtx+E#h3vNB*A*$ddN)8# zX$L{)Z^f}_C0AS12D^bA$)aHTn6W>u=GCVo}x2)kxY^Q)|DQCyC64f7ZxU^_m?kbk2 z@n`pXU$!SBxi{lO!dX0bxn&1S=6P;8iQo5^5^kf!WqjM6a>Cku-bkEIau89TYsUM0 zA}8Egs+RDb`@GTYD8E0z9(U&#I9Qf)~Sdlt6BkwFNv@)22c5arv%F5nnMcWvDI=oor zu7lp(5N?stpb2RsiX)QzGb&QGKPV~uM!7J8-ys(|__K8RkS>l7ylO{BBO!IIrk^6Z znm^pX2|!H27S(Ogul4<-A|Bz;Id^5OZGZ;gTFoZgU z;dmUYv|0L9&ERQQ!m@M^zy5>bWZx@S;-wFo!N;4ymz%+1mfz$;9m4UDS*!)G5OAoJ z2e{!!_3U{i%)dO)QTJi+L1u?E!OCpH;nETdjuz>W(mhvZmL6#a(;dwHTN+NRf_Nu&I$$>DMdZbSVskO#-%%GAN_5FU) zKZ0*280Cu}AyxrF4Ab!+j)(Rhv0#^gTT44FnC^?h;X!`^xZy|nX})jDpDj78Im~Rr z94W{_#K5ijkA7wCWSRm0&RTJD!8gd2PUZSs}Qo6~YSXv91ek6w>d87xffJ>yO zu7JBpFJ1vxNjUMw99T^TmD2lH5L8HCTmhF$-(LZj@hykF9m8f0n>J$X$jM`{`ZR3X z^r?Kp5pQe(t%r=BGHl`~thP;`G;P!rY2>hJ!)k_4A3YlJT2R(ZojDE}$4zR?`0x?$ zc)s&9Z=qPFn_i0?qom#gde-2i`wlgIv9`5lVRX`(j?oFc)92nGUW<#?kj^K5>P_aC zJ}U0X_kZry*X*f^{(XRc?Q-NYr0~sa>A%7 zeBoCtZjCP@u736x-kTY}Fv=TNMZEpi>!km>GWhotzxAH~bW7q-AN3CN!5fw2rFd+S z!ex>)l)_u^um**rEAiNSx&cN8d`XTeLX@LmenNYZW!?=YW(r|=}fw@K1j3RmI+>kqsg z22bHC^dbt^pby7V9W;Bcvw#hQb@@C?AX=@&xhbrX){-(@qJ{ z_wN)^X;dQ=7)&AB)IlNIIFdrR%%nMaCTdFIaLIhlbGj)IX+UUVlX>$R_=sf#5I7#J z0|Vg0(ikca#-lw{AZj3t0xD}w1dj^>DG-tiqe4@3CAu2(4v3nhH^EP!b_ku1S_N;m z3V!x>IvI1!8{1PGuNDG&tHEP^={Lh=O^LgEz&$tGYwqOD

    )<(p`(0E{ro z3galO!yC~QE;Ln3>9njuq1y_ptgw$24lzTY@TQ5d)=GdqiH!5C5cVcu>cT{Kj}>mT zLNvF)Lz^Omazwb>3g5B9kFD^S75*SX=>L+12qY^;0WnsXWQDYjOZZk+m}7u_NH(KFLE1YkIi>&Y#E4fQsos$%{7-?PujIVT|@2?;F(5)yh1O=?a;3mrmHP*8ePkS<8^L`6kxAmH{=1QZn; zVg(fe1r!SiRul{9wOj>6MK4y~?|1e$iP!ty|Ns8pwch_)f7T+Od7fwHnYL%n>^A#; zk=I>Wz$e6K#9bnT@MH7O2@?};CYpNanvzZHKJxwxetF*Vhwr%WW9u;4~l*Sg| z^*Hi`_^Vg}>q+Wsh>gXLBCi6`K3u#^Tp-?LiT+6^aAIOT?+-Lh+_}jsMkBJRtH)Co}v^x%rABjsu0TJdx7jF^g_cE+nMwh(8CS69&ZUoORN@g4E+;t!&WpGP`O6|=?WBEP{! zdp~i6I9Gg7d`8^Qb9g2QB>Bt}FB5MRpBDLHXvTkA{7mGnPU=&{Y;n3+B0ehei;j#R z`vEUpk&iyOrI#D^`>|Bp-YjJR8TSv)AdBYr4;Ch|k(EZ9$?i=`9g zh*(if7c<0clE44;rD!P*7cUjB6z>q96!(a4il@bvSfjB3QL&GBk;r|RXulG)CMUkH@rNe{b+u~92OYw~Oi-;>3{_lUNlJ6i%%n@6QMdC2=Qt>8n zqxgi#&t0)V?}=x{xHMm1NvxBm@!vy=5#r@yiFmuXNqkz|FMc4N5dRQU()|p%krxZp zL%dMDET#Z=6J&(j#Es$;;y&>=u_D&rjGryG6bFl=#OuVB;wJGKF~+SG>4^Kjk>83b zReZUo*h=gvUL;NtuM(GukBKjfUx`18ZdL0)hW%^(jM|EQ#Y@EL;x*zu;#Tn`@u+xG zJSV2&l!+C~6}yQ8Ez$q{t_UMsE8Zrq64!`#i;sxUh`Ypn;%nlY;z#0F;u+D!sgoW5 zDGZo=aq&y>r1*pQi)H;PBaFU0S}-^56^?>AMgI-veiUjm7+!0@sUoiqD8|h{r{@j_)8@Y$Ns-M~Ih;CF1SkCh=)8 zwqJn{#FV;z203DDu}EAb-X?AopAh$nKZw=p`TiP-oy7h=W6o$PrixdJH;Ajmd&I}Y zL*h~KOYx-mgUA>C+2rTMxca_a!4mzSDh2n^XT(}!L$Qt6QS2=C6bFbGh!>0FMDEo> zzjMWF#T!YE|K(Dw6*r4p#HYm8;#OhPE3I> z#h*n!XwIgsDMm$Z{6PIMaiVyOxK?~fd_nwBJS93!eLt~E3e*wL6MKpmiBrU@#MR+S^;vZs4Ge4syVpJULGvP2nPVrUoi1>y0qsZG?EO?@rAvO@XH4^Q!#H&b-|D{sgDc&bODIO6& z6TcOI6n_=n7JddvVs$Y~tSdGaTY~=YzZAX1q2hRPmUy*zo48JVNPI?oS$s$QO#Dtf zCnmMj_^;8@FL^_;t=L^0ERGhZiHk&j5`|6sH}QV)DRGZ@So}mh*;3>GS1ICK`HrfJ zb;VXiZWninZ(5@Nk4bS#{7tOT*3Y1pSVwFm z=85Ntoy0C;FL8v(kD0N+^Tg{(j{lWX+#^0M?iJq@kBQu0ijIC06WaN5HL;%9Ml2Nj ziWiBKKs)}gkYcfTySPEzBJL1h6_1Eth-XB%yu|(V??i61Y-xI$R{}2;9`We*~ zTZzTuCE{H1x|jmDiw}$2#eL#2k)Ii1Q-(VEOc(2kEyW^npg2ODC|)VXu2bMH@d5D( z@i{UMkHCw2$g3RZu;h2h5?nWw{Db5`z8|k5iS(67#A_ls&zECPAp>yOM}`5u!I><1 zs^se>FO|GO@+Qg8l4zM1$#`s{DZWa={}IU_ir-tJ|DC9xASh;t4a6p57qM6zLZU_! zB+n#Kfcaz+o*5CZA+N%-Ba&B%cabqfykCkZNI2L@rlKa|OXO8}DxZY?1IeFA{)gmK zlFv&1U2?d&Ak%S7h*yzU;hBHgZ;wggDZ&QvNk!N}R&|`+ z;$9LC4$A(%-LKQA>)3lAB3xFF7i?m*oB=3N}St zDsC2E62B2syZZ6likFZX=>IW(z?mh^6=ULUWKF!(B5o2li(AF#$!qZF1(}T-n&M#+ zEq0WIom*v6{>IAa|DUAzl|;hiZa(XfIoN?yY)>L#SIHNUa5!3=OxD4k>f#I%@fVPY zcfI7BB(Ec5bsT3S10|007zz0)$#0Qx@R9V#r9UTqe0M*75{dMUNyKj>eS7H#OMi*< zW2CJ7yO8i#EO`itd`EG|P6j3`!c0ZD zLcCsFD&8)x6Ymor6}O9f#KR;C_&$ki1|NyXNfhYYm=r&VNj?3DsbUU^h)pH85W9#) zVzI~%7BQo-;v(^C(Gxd{v4_E0Q?Ht|Vqk-+;tAR3Pn<^3qlUS+`6-SdO=v0zBhRR?tMA_5uqOyNIXzHpM-;vk|&9?NyJ}B_II2T zak;okTqiz44#diF;~nJ z^TpmiW6n@1#)&h;tHhhcJIPm3Fv$;+uQ<-5l6R2%9p?qf2g#Qm=Pk*{$d?@FbIIS6 z`_TXYlp;6)ioJN{m1GUbJ@|E#e4bb=P7^(Gmv}_{MXXWm`)e)s6DN?>k?8b4iSF;mPI^F{jrGyHS+ zLFUs}ywqogbGa0&#J`CTdk2Pus>Ys^_^$YYcvAdMJS+YtR(1XSYKZ(E5%X^*b{4yf zeZ^w&GM_PLniTwG5glA3aytad+%188LEI;PBYrDp2mE;U;abGE57&atrROJ$=%Keky(;rU(5DtBL&F4o@o@i>*jLO4L@00>~~k zhl;~Rek+9Or-}SP2iLmSh)XTe|F=qUhqzk2Tf9$vT6|V~LEI<4Cmt2Q7Eg)%ga!*> zB0eKz42nc4_!SB+DYL}-Vq=jXq@cY(>?;k-be$~Di0Al+VvZF2yanYO#bx43@jkK$dx40Li%*L?#TP|>`hxM_ z6+aS>i$BB^_@`Js!B0?A>?-yU`I!tZh8Ky~i8qS;Vg~K*L6kzdfD{W-DdMFn0G z`JD_dsy`OL5Wg0`7k?5lyd8I;cS&CR9B*&a{K~yD^gbM}{$NRDXU}0ICb>~0=8{Qd zeZ4)_2sc+KV<41}dHx4z+?HN6K3a9fBZnH-J48LobcDph?-)7Ie_NCb^3#-udeM7o z4DvR7+hCNJ@@;O3w_#I_Y%eh{|D70qyhmu+GD@`Xi9&DR69uP8Z{HJzJX>-Ji6So+ zmxwou%fyx9o#I+?186VTY?5ND_@ua9+#&83_lo<)*To~^hvG5u@8VbD3Gp;PFv%L6 zk%DiaQVxm{F;Pqr(?xD_!1$SB1F?yiC$<*biJink`??k!bd$oa03i>NJWL!RP7E+q6E=NE5=}mtZ0a}lI|w7&rQ?4Bxiq zxT;{~Q6vhnP;v>$mXN%egtNWA9CP+FfTpqMt;oQhx1xz6oMs>=l4z=Gk~7I{ye%%d z6N#4VDY-9MM=$0h{X)uU$+fa`B4vx(`EfD&-%gNCG5i$4&TnX9JHNq!o!`*ZDK1oy z(@8XWw&Xe_nm$i*YZ6`1S8_3luCUV*(vPBCh=ZPtK{1^H^o^Z=Am2w`K8&jUpTi7kXnpdrRe!920TYi=L&wmvugqvN?F5g|3OAno_fd9$!KRKD% zd)djjivpJ}JDKQB?wRAFe}T2|Pd{J;M+Xp;!Io{ z2cARIFhrbC9Fmz3y2^1wH^N~cv?q+HPGF@M?UA27_BPZmuJa?b=em(1470c{z7&k4 zU`mSX>PsOf@G}Y>*R2A4BaePdna2QB*@UKW#tGfe>WAJ#(Sjjf5sC{9M+riqMcxZN z@~d~?@-^9uNT{h*(h!* z-$1W02klW9YQfEcBCn!Ap;o2Es|!`AwJ!xDC1{mUTVIMqzCw$I+BLLAPmFL{54HDg zDUlSkL8y~2rAPSoX(<108?#zu6^avz#(c4Qgbg3+>_^Rve2J2Wy7*Fd<|G7}DA1D15xl}xfoF@E zq0xV1;cN$u_2W7b+d<=eDHwSj5klkrEF+Q6aWsV{lop@{Mn-6&FQr7{Vl3+Ksm8OCVn(nj!>5WE`2NC<94IFb1$1heor@Ciy79`F)^NkNSKI!K=oxbuOHgTM!0}${lb@VaEgo|@`p}6KhO2p>_Q|gw zi=wR~UBfI~Aa{vLPem(6x`lHPGmv|;NpFfkqC-J}m^0R~7uWYV`XeX-=XP5KDR1H*l6fsdH7J$#cuj7=*`Fw6<~>*z6b+2a=zr7-70MEK<+X(eF8lX5A)1Ekh{`NzaNKDWP}`T zaMN?qrjd&!Z*tS8pyeZ%NZ#zGbNh_*BO|4F*iD~Khoi#Nti!EtdR;cnXxU2w>3is4 zjO4|E^dp$OB4Z^l38a6_wjYO*dPn=AYyZjU6J@?LkiHUQGBQaOSsO@q>3*{88v^O; zX}>glrOkd*AiVzM z!@Ys@X_)OI(-mQVAbmIOGs3r62d@Xx+cSfivY!s5zef8kr9Ts>d_mD5Co)_1vw`$? zX`dteZ-I2~Jr=nl>{)*$v0(afMwlC3YZV)Ul?Qc&gLz?ILJ8!S#HF90{mSq|R^A;~ zc~JMkPGo-gDc>GS|0nGW!q58lP&(fwk1P!D_3dFNkynM{IbIX%GsKY{AE0<1uPfQ0 z9r8T-?2wLk5{ntLBmN{_#857x+c@lY8z;?4oK4F}#<{9APT~@Vtn=F$;w%vVF%IU$ zjTAZc#CK)ZTPY%h{H?r8vXl5qX{hRJJX9CinF8Mlc@@d3;%i<`d=qmJaT0>|;!q?w z0UhE-f_J0e5`vFl-l(=2$E-;>+mb(<3y}=JB}fnqt>U2=I>h`#4?~^eREy1rM^j;Z zAIAM2v7FErI5JKEL8roG`iL`$y)L7@KK_`{w;0Q=6SxDJB=)_)+LOB8MEmXZ75WZi zANKcQPwH_6^wrJX_?y9r86~^};Xo_&S;ghh#GJren0zX(*a>w)aIcMih|xJ!V_k#F zRb2T7k_L{UNEKJ{I#WXMgpGHW@p#3`sbS{huescqN+^Bi7#!s0a_ga{IUf-W_v=A< z@!!RlQ`;j_t?9F8;-i}VSS(ZQWSMTP_h9n`{ox;KVdKt%I{O>8=-^UQ?JV?+IiI2# zgp~KduNh%jZ2l`v`AAvH5j5q%?OmI-aI(Wl1MeMA97A zo&QQROGg=ULr69O$~x#G$J8~&{x|OH8QzyLvuztRfa!MpACCm}$8d`pb0u5qRs3&2 zuX5~|Mdu?*L;7?Y(P4F*ropGl!@VhUigjLWY#TEr{(pu4=Ad;;uh-MY)4V41$^|c5 zz$||bF>FZ(!RDPElwYY%OL%U^niL}7)HE!g;Q@w&3jf(<6}@JI^Q(;=XUj0qv?!}w zp1Bw)%^GtzqvIdk+Z1_b0lR6#zZtU3a5l%iWrk`>!LgA2y!XK1{F<>Raa0;!ghTo9 z|8a!Oudvs*$JSGiK=(0pWp&Gh!ffA-7`AS|F(n6&vj`6_uddF?{P z^1IF&csf!}Kfg+^Y|Oyft>Mmmz|py#rR9R(9N&b&#`D$lcu1gk?3QQd?pwOM_s{NdXgcP^|IS@I!&_tKC)=ZM zBic(W--VcmvUyv>{6yDP;4hnZDa=n?6~`!67>8NWm$^>MZipGl{KRITh@&X`3+T*G zcSGbRn(cR?N6pW48=P49R>uyu+QzV;3CO=g4IZljV~|;2$_1418D4MV1^HPG2SDmL z*)jF(xcZC@l+Tu0i9k>M$0zBzUr27qd-Q_*$}yTYK|PA56tl^i(2^B!?ACdb%F@o^mLT*-!h@DaDW)~oE z0BsX%IR>EtP@S_y9qi6wQLzak%X$T7!AY<$f}Jwj#c7s~Kg*#g#DAwDGAxZ*2$}88 z*6Lf<)J%iX!gH3+<|>wNxG@c>#J>avcvI0VE-U`Uw)ni0*o+4Qi;I*Wc!!7OR~!5j zqIGG_qjR)%(gtne*Lti?wi$9)9wUvAsx|(biRJ{-*a?dF;F?m25*rNVW@r|tv)Adu z{H%=TIK+KN)2*XaW|YwdZ(x2P!L0gI*C5OFNMNo*az6{tX0Z#(KbLg}>SEUZ zYgu{8#Qd|YtZQvqJ78A#9mVdlo*seXUkiJ;IaylRcVYbZ&hpDzmov`8rtFs(jo|!* z_$IG1vakpJ7JJZFK}1_t9_u)Y8p6AI+<4ax&#%&#PUHZoG{A%&?*)rKXJv_f^>}XluFWBTC|0QqU9W?vO+o>JAeup?_ zYL(J*?6c)a#bN1}<7Mk8pE4Jt<`run4%wEAKUg{VZw{EjRqCme7sJ|=+R{G8L2rk8 zBN&|Z-oqns(dj;9>1Xk-&0;TXe{QFHIKnePL`$Wzk>DhOUX@MEKRe_URNJ=mU}5&*E#F#m!LqW%ay^ zF*5g*73o`Bq+PK4@xQb2xt*0Q5*vjTF=x#)wn*OTi}S0Q177?k`B|~w%Cd1?&X+u$ z|8tW(<|1XtEgO>b#Eq@Y<*1S0Bq5iF(E=#_{3F)U{gD5)NfO<0NMoDi5RA4-%7$cV zccDpMiJNXW?@FaEODbjvxNX zn>G@oVGFynzOQod>t-7IVeW=z8u{T@Q3%t-54Yls(bNxDXHlB@;b|;yo*&-N(bB>X z^C<$;(uUDeJ?N=}Ur*G=S;otX&Cx1m3+}u4P1VU(dH|GN*?#^-2)ws zZAuM2-hgHdG(C?ZfZ4Him!4nxq1^>Ne_$xra_5 zyGCikJ~p9?Y3|Pno1ma(KzTyuSh+H$TXSJq%7Hdzo3fPN`q5bF_k?V?Ly}*vp*GT_ zvPgcp&alsimk&F-U%-T~l_k8`CS3EEgnzIpM*nNVEle21X$y0#Rc&a+|v6r%Pu2$~i=$(4eaG)*g>y84P_Uau{IS9>YN zIJJ3W*0h@rjZ&PYqWvE4voZNKVxQ2Ty;kpAd+~fK`RnkTh;K~%b~Hop7cpj1qMUP# zNj{1E&Xl?jIK8UkuuDB1;C)7868{cMpA-(+^LRzo_)hzplNgSbZVZ}7=!B=F{w0fk zF|!*5s4&y;B8lm1PQhNOUcirc3FEN@84O`@$Lk6G?b;;qT4Q*AWiMr9@JGuTU>-qN zBz0_-m`enOC6}bZ6r}$OKm8_(H49gDH_`iT%wR zI9x(2jp4dE!d<96in1^HEi5odZGKa}E3??ii3m>Mn2&&|PS!}IXf z@%3X+zH9KmDnA5I)l7$fbEcBe=CClb8opI83Rnf&LE%AQ=ApA@$(b#?yD zk!>~Z$zSDqzpqSB+qV1O{H+z^x30#OBOH};yp4NnR`r%WnV%QGy-auU{J5&#G3b(Z zm+BBV;thN(CC$rwDnHNNzuFt~RDOT=&}#2-^2ln>eHuKy+8YGo>s%Y3&L3b>yzhu= z_*yEE?JXx7c*g;^=Nhl&b|fiT<6T28S>wG)E?eW}JOl1uzBvex^aT(;KhvID$xt#>=Qd9C*;xpl4A@_BIo zTJIY2&|2?J^4MB0XD9g8T5l$K7Wsq5@lto$Dvc)aku;)#XLh45dF#AEyAikDI`3|> zaGm!(*>j!OKop(DqY~8j`U&z1In3ueMd-8MRMy zc*}2h)3)WklwVRk-ac;z}wGacgXyj_<=YT zCjd-#rMOI7FFq>n65kL%5x*7BiOKlUqd(qs0Ao&bDGI~^;xy5|D}V&INnS5LD(({B z5I+&^Blt)c!R01qSWRpowzI@)x~CMw#7W{jafx`RxLMpT?iY`UUx{Z$`@}m7fF5T- z8i?)47!*CF7$!~<=ZSZUo5k(o5%H`T!8(x{ydm1ht|5Oa`6uyrF@mL2j0w^aATz{l zv7XpOY$Xnu|wnoCUkg+L*C>1@g@@SR>{6z z@@Cl|7N3*;1uJ9xzb^x?*wNwdBx(>rKf4XE&=*rkWRM}bmY7Q-epA_7O70}NI|)C% z#7o36WDExTm@CNZd;D6{ZHjQG_?XCNF__Uovaz0e1>dENf*q6nYsueA{#mk{?57Kn zIEK=|7#-zM!5Waw@LgiD4S5^xOOUYllH6bNFv+7yq#IAd@l45AlSsFOY=LnvE+cQl z?SW*C|4mXnKqA2tlDA8KQL^3V9`?hM-$=NCBe@197 zLu(QxZ724Yeu(5@Bx*QG`l-@iC0--@?Xr8)-z)AF?c?J_Di}cTs@Dtl91utq*VK>Hy^Dfig6xUM0mL=w9REmouOe(EAwMN~x8zqyBs?H~Bt0)Yw-Vb76VzcR-^BHC{fz!0UOAFld~MT%HV!aiKG{bm8=%OuYxk#3&2MEYAK z|4p>tG(ftol#8+Oi7Bw1Lh{6gUA>H?=ygm zK2wBKl7Ap!|3mr&+>UTZ<7SaqiA1_g5{~OjZX&s@pC?sZr?dK(sZi?i2;$m@`xK?~ne43nqhg_3@{| zXOSyorf(?P&r(3{D7l;1PrN`J8B<`AI76H-UMt=#t`hGO?kLB;b(#4D7&kK|(6 zhf6<^oQD3t%nvxzNF=;c5f)3nQTCP6Zy;x2T_A2Ik?wKXpO^fi><6TOpPYr4&&1>8 zZRr1R6yYbUz}`cO5XwXZ)|{M!sZ`7$kzpO#n@esjdsO<~e|#V(*d z|DPa*{lW(ltd;z%XusqE{b!Q-u~Is&Ep`@oUk3JqhX3xdH*Zi@ikN(53zs5lbH{ueZcOz+1T-xb`bb;B%69 ziM*>z`&*)2`d}P>K^e45An<$1yqQaVNUTg^oK_cWi*?Bu47`WS2<=7Q!^Hq~`ieuu zVIptm(mqAxty_*uyP^SakbINKySTKk7kS5)FGI zy99!4mp~xzPZzLRY+(U9$N z(T7*HI^m>~jN%lD?2PLGB$nZKkwuu($)336LiWL$kL-sVuBZeTkM`=I&Dtmuak5;XBhL)EMboMR9KrrqPoGAxqR))sDq!hopNQ zGoqPwdDS6U8})R8JP!yqLCKxq_qb~tY`TDMgW=3{Z(&CC!b+9#^BniPc?Vj&6XwJx zrg>jxM9*t7A7yZou7)F%R3ijqQUkPYAc?Q-29wTUUW!Y~K-y4JPO8_dMzld}F>*3V z_F`GmD`>tzQY+@2R27wsOZq3=g_3q71zyltghCs43%7(yT8^-jbU*%PCq0k9yPc%B zfMZS)7xE=0=^U`ZB>f#pcblX<9Ky$p6SPap?R-o>u`yc4b(5YSOm}mzkaCh{c)!<( zHgP*w@)~DG>yPM)%0!a*>8=zf$k!d*FRn%8#4C}~xZk|Vgp1(cN!ozI!utaLw14{y zJ%Bzp_`#dg^``! z3pJxP%}DPPVzT#p&FI+Lvrq-Mx#^1T3gm7NMc(I>o@ZSIa*u@~xM5o>npN8_id#v2 zA{2QERdich*MZ#Ap-4^d1x9PYC23nl`z;i?8P#^%DOyQ5(#kVgh!$nEj*513IPwv_ zbyBot;Ycs9GoqOx-e_W^cXd{@R_#lfsH^E|OZsp)a)gPx$;sJpWRKsM{~`)UVe7;GB;AydoVkiV;=AhWJmj^Y@_1~%nsWRPGp1E zuy(YrdtN24xOTKdnZFc5u&B^B&2KwllN5 zFLI+Jvqqz)OG-*`To>VxS!P50gxdxidd3@9CtAPt4tTx>3ODKR2raguTX6s|x|{Si zj@k`2v<;!%Hq;=++f@fg{DgGxWF5=^0e|f9EFLNN>Bf>^(yv4$X&ro)q$G8&>@}+! z?OVABPD&QDL_0A|{A@RPx7Cf-ti2np>HFvTOv%;E{dWu>#4ZUq@ii)W2kJ)qnGIfz zdeJ)Oh*wxITC>?9)X+3Dd`Q3vt-+sc!;6dNM`O$%P}UkZbu^`m5zac~-Bd5yu)tn- zNpWop2XfGmHj{3V`V<-{ZKDD!rbc>*N=Ya)~M<=YY^Syj!oV6 zaf9eWgMc@pQM8A9NhR;zM$x+FkoQ`n=-3=v&epb^YjA*ds?9>SHsjDbywleP$%-3C ze@FEGP0)Xbyc?QCqrgi|qV3J0JDNtDo6o(xrqTM)4Qm=*37l*i%}N`~=^^a$5aewq zJec;Sm(?uV5cXcpkmw)YmCd5{AZ=(C?Ff8G<=?!-=2qFNd9+=MEm~8TO=t#o8d=#} z&^+4P*XI98`%d#{cQ~k#XNxz)$1Ofy0@AIY@ixVLbenUYsa(aY)FN8f_jQ?kwF{?u zJz7ND!dI+Cw3VsqJ<%fCfJJK&oeUJUj5c?}soUnZj5cuH%BkMQ*3q#wvT(G-pFyYc zJf#}{IH3%bxQFTHWwnV`cQ38tb!Y=WTegjD6aB4P_&N+Y*E#6Tn2SM+r$$n|Tlz=; z^K%1#eK=ub)4;+1_PGS_fBY~AQ)F!WusB*P-OIhG;eRgHe}0_d=W)?*!(Nxk(dye` zQ=^NL+#@mXkNHvDpO1O{7esk~e%*rT0F%A#v7`9i;}Y>#5)l%yh;XqIXhC8mjwUg37Lzz4JQBn8Q4;goJ~9(m zU`Z?ye;{jPMSvlOy#t(=$p(01ifn|dcVrXfM>fL}k#BFhd5+VVY>BIIWNTbuCC|gP zC$b$TF0uovPj&=5l>6fBoE(5r zGl+qKSmbWow1yv7Iw1H7S}$0- z+PjioBXN^q2t>jg7`YP0U!2{GBFK)4^Vfjcyzd_8F9J6qm$=eJU@D4w90H!JhiThUw)j9+8HZD_QQJ{TL;jf`0MC zUmy$jR~t?)9z4hy=>Fy#u44j!N$jNXu)*r`xaosTQ>!xlXLg-}gEw^w3-Wh~!PKWw zW%qN5k<`v!$Gup{bzrH!w&~s6%v8Qa=6+*ya&ud!9`#o3jn<9X9W;NEwp$vj@8p_@4|i2Ec;@lo4~6hSXC}|Q%AFG6(lclQ}1Lc5+&d4rv8CO zcayAVzL1}K58YLieWjb)o(+&J`A#?WW|kyH@z=VkEm)0I$s1fZb+z~NzG#=&0UiPA zF8eh8EPR;261x|~-w+>%Dy$}<9`kmBe}_46%Y0-U-xfz$FmQW4XcB%v^O=ON*}Vze z$TOI5AHtD@hmk5JVH@g|oiGF5b~_3AP?ea3c*0HKo7!HYG^XpT{!NEJI1KP)cZydXS zfi=r`2|1a&8Oy0L6w%x@K|3)7=0nJ&TWFZbsaXs82R67Su(8wxiKfg6h=wp7I=JwL zG}S9dOkjU$Jhytp#{1U0aes6W7N{TYkJd=BWnR_`H5`s4bqc)jE71qcDetjYqSaEZ zaSBsCfr{jwiT6HuC3iuvFLWj^DcXQS_AbW@!BA*;SK2SPVgG;ao* zV5fZ)eo&o0-nv(#{o5R6wU7RbpUq`{j{e!tQTpMbkT=82el2=I_4iqXvo>iH6(Js~ zye-~suSI({2%?otMPu!CWanFRZEX=N+U_#NZI65BUc(aNId8!0(Q3)oR!6oD$Gt0F zkM_-&LQfrhPo+5xL%G{-@jiS#+B?I(i&y-wc5a9Ud*Oj-Z?|*6yZJ!0Ms4eSf?-2< z!ied_$L`G}!&3rN>~u6ey!{8FnSP7Uvt_s#G4fyXemoEz)G&+HUE=4GjU?YN^aUoC4h zwoUyY+A!dKpX2`5i&Sr8`;L{jZTu*@+uiobvFQ8p-XAN|D|x%OhZ4QWO>T;}^_ytQ zwliNxPXx_k@A$VkKvr&RaXK1y%_gt?_gH`~^d9>@I>7y~r|15FmFx&_;15`VuJNA+ zUG_sX#XZs6yZeV|y|@UjV4v{5dz%koQh%n=iY>>hc#$*Fl(9Hyp z8(f(-Byo&INsOgSNc89RB+f-&AaPE{D>z)C@>t}hU%NRW&VB73fmo@YrXFW8dF)Tj zCf!J^ST84Q!yj1(b2SbUx4Gjzmr(F)+2uXE7;M)rFV9OYZqOixbt?YFVVR154e*{~ zma}+k(|?@q(ez~SrdzjWJiPd;WM@d<_?3bBNsnYal>FL&(^p-RxFzI8R%NY!{_Nu7 z1838Z4LDPB<$%*pLii5j1y*IRueHwgoO;fxob?CJrYt*fw#kNsJL;_CmTcKYy^3;* z7^?7K!b90bv0g=c&pI2Zc<-b;f8EInt8>>pdFsp6-iA0@1bH6C(gz-bc+ zpIX)-aw?_K*;5neKX>Z&rJtP4Tk4$*%&&iH$gA&Pfg*`tj6mo6YWz zzC#Aje~DIzJo_cva`oR@blG+&sQ`0U1N14n6#wumhJH8o(19%zy>GX+sT_L+2L!f+ z`h$IHLfrE{a3f-tZ3efLKQL|_PE?$L-QT@*Gq|78%YkE2-^g`C!!fZ2LLb5bwu$5Q$GDE~!yJypMY-WxWD{b=6+QwLcVcUXcHjnb zcCp|_c=ft`2f0KHmOt$v$Hl{6c96@q8FK>^H^lw81EI!n9}MvVTwI7Nkx+;a5r>_? zrOfyIp(sK)J#HvBnT>GMO>HWN4`D|xVRmJ^%H4??lxp|R*cX4V#^;jmO`1{it*h}}PtAv`C?@zZ3S(fil zcQb8e`_o;BW-8yGZadnse1AG_NKw8&-CESTe1AGVZTqMF>DaI3`_p~TjwsuojyG+} z_ow4-CFT3m@qDU$f4Vi4%J!#Q&cc-KPsdZb^8M+iptt_KKON7k{<1$E?;ZVVe>yrV z+n+9jwJzJA&Ta@-wm;oW7I5g@wzCr={JKQ>{&Y>4P1*i*Unk%&F5jOnK;vKcr{jxy z+Mn(qf~EV@*$x`(9|TUsc2L>=be&o7vi<3*vfdLK+TtWexF9UwpYEj?o1tufx`!y0 z?@!0`9)Ev2Of=jLKQV}1=T<pRg~#T`E^~l6g$qNW9u%BN<=j>|^Di zm9beA29Z^`euV0!a+WVQER~aenI~5^e#A)$hKGi^@l7gsDGUz_vjnMeXz=ibcDF94 z((XXGAbbkdO5<&taG?!j9!Xop6rIB{78HAOnY8VwQMijX`C4q!x}t}}*4by-|WUJvmbc& zo5owE;o;%N*7Hg?jjud}%eSLTiV`m0jV^6A{m06;qf29#gv+<1OFN(PxYD8q(vGqKfaUwurE$ZZSoqTL09(RMfi%7v8ZO_kF6}YOvrzyj|u(NN<_p3|e2WP@F!eedv*8^$IkiQcy->@z%hY@DU z!I?lhH>?YnZ&;Vsl=eBY{}xEQfHl4%Jk>fZ38uB9eQtQBl{W;_xnEs)UU;Ezk4x)H z`<3CVt-L!feNgwJCxRqO|~$++P7m@${*0?@f_;O zzca*HA^v^*Nlru*8?v(n4^KO|U9f0B94rN~(;o|8=S^%NQM#Z{$Z^7_(Hl?||l7uh)mm!bIeh$`7Q z{31Mr7|Mkv1s?Xm9A^?*;w>B})B;sA zp>xQ_4J|-85bA>RVO6#c9uwLwK^(*_d;^SyhQYH5oxq{&h8{vVfJG&Qgl>F~C(cdi zA4Hf2|R)eppnYrwP!1ArJ8hpXX z%wuH&%b$#8&PLmrD=99<{~EtD>3rY1Jr=9MOWURLj#wsF9cJO(i1{A=XZDGQxQJo~ zrmIX|o;FueoIvqA7C1&<+yySP0<9$!6W}G2FEp8}DP91vW;0kj;XmIBsx^7sJjc9Z z+uz9=fhcHNCye@JyNl{z<1HXNuzYO{%nU5QldNW1;cp6d$pR9C%crb#5r_nqPYQv- z!18e+Cu;&+@ezaibcNl#;0gOwAqn=SnvL72SHRAv3IMylk$;kZZ$&SsFmN&XhQ)y*Wf1y{;A^6-}@)uuhps&l9_1q{9p zU5@S60(R@yF6Q4H+p&f0SZ@E8V|%ucJa2k29jg4*2&@B98H~+GYPV1gOTU(S`4qRHXBKMP-4CyWNQ#`>KDU7(&<1gsIUnKrc9@y zNk*Im?DoLJwGn+cVj2BEk8omW#BOZFGB)B|`6n|Y!UHeICu}l?2efZxnHzlu$Jiur zB3#D5THP2P##Y&=%-o2xy3@qm$fNWjcr)f@#$vD$LlYXYZEPxtOGKTjTDXM3lbHpF~*e)^>WOHAgAyL9bMq zh*n=>T(7i(#7>xc8kF08MZ;#MAkj}!A2AHBd^L)LGpDK3xXct+YHH%E>L>O}YpvK# zIhdMxqtozgQgiQ*oPzUWd2C)}hM%)VyKR7vgF!fJKj*-+Wouy|8~-b?y{-oH{aB2T7#ou4>KiTm&<={3OPD#gF>zS%ib^Q4^3+LY1-s`yqnXw^Ac>@1k zCvQFZ6aE`#FhQrTGbe$5IAb$xQ`&GIf9C8zy0`=X>4M}aH_osR09FJ+dSFTfiJth+ z$RNIc?duWQ{`=oMyP(|J1?A2zD0kL^&g_SVjB~-CeeqW|4x2WZzz0yyZ9KH~z2N=l^hbkk6YGytZQ9%~f0d zh#%fSQm4SIhxvC-??8oSf!PxRiP?c!*@2|&z?^1Hv%nS?_h`|&Ns~H7b#kI!t!4!| zEjv%Z3bRw)nz=cF_)Zr$&uiX12bXFCfoabYJp)5JHO{RSsMHLS33Uoxw>+ZxGqI~`xkrP<+%TO(~|%A$c}fgV?iIUey4(~ zRy4h9uUB|HEyX+1t!Cl?9*mtUrgW*8SGYK_@VW|x*C!O-5MQ_?Qg~yyaA~OU*0?Se z3k&0lQwrk-CKtvHs#q8|IH_~Rc`o8rEbI~*R2Uju7%DCd4J@pf*X5vhIKQAO9{>3= zzu-OZooGR(7cMABuGX@Z(`?MFSpY_RKj`y=nyo9V^o^bM)Mi z<3`UOJ#t2iW-VId@!@Twp9vKkFaAIncSW))r3O3VhK2V^VL>kLnw%^ws2{%@no$@# z*#6_%hPcntxgaraD}E0h@A&+Lw94}l!kGr9UH@OX$y?aDAjRG4dY5Natl};EuxT)f zL$NHPH{-i#Rd4%|P)b~OCphtDyy>Q;zJw@$_P5uY@pGVR|Wj-R9^x0X}kA__crx~ zy}U1=4^60zJxP+hO5F-_Os;3PcC704?S@=dHpl7Miq7|^d9xw9#l5`iyA{;KW30>D zx%K02%EPN(-o|+*H*QK>7RPiis1xjfH(~zeepNc|a6Q(&;3jOsl3!FXkxw}~#!GFA zhp|q)>!u`)g3N!M(anm1pQU-rdUQu>Fn>tJh_TlyAgYZr)((bPC?#?~&M_bt%YE)egR zdaGz3GJ~F{u8clGoFnpM9@N{;!DP+Ts0qW$6~?Dt51P<%eY>2DM6k>VBckocMS z5Aj>^C-HYN4yP$BKsE340R_!d=Sj31wm^N8xBN);^!O~t;e{$U*XvST&>>b4qlJlT ziuFmv;gxafJBq!sVaedYkClamAt)LT6!Z_U*en*4ZE5E1d0u|u_}%lo-+i!; z?LO|^%X_9K9HHmXeTjWxG$+yd3SHNOru_?3E8th*ctx(!x9ADl?HxVt)znwuLo984 z+R%;DW#ZO9rtYx6=q0RalX1KOOLzkxp!@lH+yd^^(x88QlFpY$-PGM_Wz|!Ww>SK+ znk&Kl8SdacoWdD=gfFmyZ_v3X&+`SpVU#V)S28N%3-~V%V^J}jowDAA`|uDtUFCQa zM%}Y?8}00r<7cpdQB)w`c`V0EsJA|yhH;4zh0_`ky~xBdeiTwm&(L$|M3*Og-%MpM a?`;2hOVM$)m7aU~K{oO(*wF96)VMY3FchHx From 6d09cf8bd76fcd042a0e0443c2301ce9b859ef72 Mon Sep 17 00:00:00 2001 From: Paul Carpenter Date: Mon, 23 May 2022 10:24:54 +0100 Subject: [PATCH 07/78] Improve Comments on XMC4xxx pins_arduino.h Add extra comments for X1 and X2 connector pins Add comments on known errors for XMC4400 Platform2Go --- .../config/XMC4400_Platform2GO/pins_arduino.h | 169 ++++++------ .../config/XMC4700_Relax_Kit/pins_arduino.h | 247 +++++++++--------- 2 files changed, 205 insertions(+), 211 deletions(-) diff --git a/variants/XMC4400/config/XMC4400_Platform2GO/pins_arduino.h b/variants/XMC4400/config/XMC4400_Platform2GO/pins_arduino.h index 74dadc1c..42ffa34e 100644 --- a/variants/XMC4400/config/XMC4400_Platform2GO/pins_arduino.h +++ b/variants/XMC4400/config/XMC4400_Platform2GO/pins_arduino.h @@ -133,78 +133,78 @@ const XMC_PORT_PIN_t mapping_port_pin[]= /* 24 */ {XMC_GPIO_PORT0, 5}, // USB Debug TX P0.5 //Additional pins for port X1 starting here - /* 25 */ {XMC_GPIO_PORT2, 10}, // GPIO / ETH_LED P2.10 - /* 26 */ {XMC_GPIO_PORT2, 8}, // GPIO / ETH_TXDO P2.8 - /* 27 */ {XMC_GPIO_PORT2, 4}, // GPIO / ETH_RXER P2.4 - /* 28 */ {XMC_GPIO_PORT2, 2}, // GPIO / ETH_RXDO P2.2 - /* 29 */ {XMC_GPIO_PORT2, 0}, // GPIO / ETH_MDIO P2.0 - /* 30 */ {XMC_GPIO_PORT2, 6}, // PWM8 - / PWM / GPIO4_2GO_2 P2.6 - /* 31 */ {XMC_GPIO_PORT5, 2}, // GPIO / RST P5.2 - /* 32 */ {XMC_GPIO_PORT5, 0}, // GPIO1_2GO_1 P5.0 - /* 33 */ {XMC_GPIO_PORT1, 14}, // GPIO / IO_1 P1.14 - /* 34 */ {XMC_GPIO_PORT1, 12}, // GPIO / CAN_TX P1.12 - /* 35 */ {XMC_GPIO_PORT1, 10}, // GPIO / GPIO2_2GO_1 P1.10 - /* 36 */ {XMC_GPIO_PORT1, 4}, // GPIO / QSPI_IO1 P1.4 - /* 37 */ {XMC_GPIO_PORT1, 2}, // GPIO / QSPI_IO3 P1.2 - /* 38 */ {XMC_GPIO_PORT1, 0}, // GPIO / External INT 0 P1.0 - /* 39 */ {XMC_GPIO_PORT1, 8}, // GPIO / SPI-SCK P1.8 - /* 40 */ {XMC_GPIO_PORT1, 6}, // GPIO / IO_0 P1.6 - /* 41 */ {XMC_GPIO_PORT4, 0}, // GPIO / GPIO2_2GO_2 P1.0 - /* 42 */ {XMC_GPIO_PORT2, 14}, // UART TX P2.14 - /* 43 */ {XMC_GPIO_PORT2, 15}, // UART RX P2.15 - /* 44 */ {XMC_GPIO_PORT4, 1}, // GPIO / IO_2 P4.1. - /* 45 */ {XMC_GPIO_PORT1, 7}, // GPIO / SPI_CS_2GO_2 P1.7 (Chip Select - Slot 2) - /* 46 */ {XMC_GPIO_PORT1, 9}, // SPI-MOSI / PWM41-2 / PWM5 P1.9 - /* 47 */ {XMC_GPIO_PORT1, 1}, // GPIO1_2GO_2 P1.1 - /* 48 */ {XMC_GPIO_PORT1, 3}, // GPIO / QSPI_IO3 P1.3 - /* 49 */ {XMC_GPIO_PORT1, 5}, // GPIO / QSPI_IO0 P1.5 - /* 50 */ {XMC_GPIO_PORT1, 11}, // GPIO / QSPI_CS P1.11 - /* 51 */ {XMC_GPIO_PORT1, 13}, // GPIO / CAN_RX P1.13 - /* 52 */ {XMC_GPIO_PORT1, 15}, // USB Debug RX P1.15 - /* 53 */ {XMC_GPIO_PORT5, 1}, // GPIO / ETH_INT P5.1 - /* 54 */ {XMC_GPIO_PORT5, 7}, // PWM8 - / PWM P5.7 - /* 55 */ {XMC_GPIO_PORT2, 7}, // PWM8 - / PWM / ETH_MDC P2.7 - /* 56 */ {XMC_GPIO_PORT2, 1}, // SWV ""DEBUG Do NOT Use ** P2.1 - /* 57 */ {XMC_GPIO_PORT2, 3}, // AREF TODO: / ETH_RXD1 P2.3 - /* 58 */ {XMC_GPIO_PORT2, 5}, // I2C Data - SDA / A4 P2.5 (Hardwired to A4) - /* 59 */ {XMC_GPIO_PORT2, 9}, // PWM8 - / PWM / ETH_TXD1 P2.9 - /* 60 */ {XMC_GPIO_PORT15, 8}, // A16 / ETH_CLK P15.8 + /* 25 */ {XMC_GPIO_PORT2, 10}, // GPIO / ETH_LED P2.10 X1-37 + /* 26 */ {XMC_GPIO_PORT2, 8}, // GPIO / ETH_TXDO P2.8 X1-35 + /* 27 */ {XMC_GPIO_PORT2, 4}, // GPIO / ETH_RXER P2.4 X1-33 + /* 28 */ {XMC_GPIO_PORT2, 2}, // GPIO / ETH_RXDO P2.2 X1-31 + /* 29 */ {XMC_GPIO_PORT2, 0}, // GPIO / ETH_MDIO P2.0 X1-29 + /* 30 */ {XMC_GPIO_PORT2, 6}, // PWM8 - / PWM / GPIO4_2GO_2 P2.6 X1-27 + /* 31 */ {XMC_GPIO_PORT5, 2}, // GPIO / RST P5.2 X1-25 + /* 32 */ {XMC_GPIO_PORT5, 0}, // GPIO1_2GO_1 P5.0 X1-23 + /* 33 */ {XMC_GPIO_PORT1, 14}, // GPIO / IO_1 P1.14 Duplicate X1-21 + /* 34 */ {XMC_GPIO_PORT1, 12}, // GPIO / CAN_TX P1.12 X1-19 + /* 35 */ {XMC_GPIO_PORT1, 10}, // GPIO / GPIO2_2GO_1 P1.10 X1-17 + /* 36 */ {XMC_GPIO_PORT1, 4}, // GPIO / QSPI_IO1 P1.4 X1-15 + /* 37 */ {XMC_GPIO_PORT1, 2}, // GPIO / QSPI_IO3 P1.2 X1-13 + /* 38 */ {XMC_GPIO_PORT1, 0}, // GPIO / External INT 0 P1.0 Duplicate X1-11 + /* 39 */ {XMC_GPIO_PORT1, 8}, // GPIO / SPI-SCK P1.8 Duplicate X1-9 + /* 40 */ {XMC_GPIO_PORT1, 6}, // GPIO / IO_0 P1.6 Duplicate X1-7 + /* 41 */ {XMC_GPIO_PORT4, 0}, // GPIO / GPIO2_2GO_2 P4.0 X1-5 + /* 42 */ {XMC_GPIO_PORT2, 14}, // UART TX P2.14 Duplicate X1-3 + /* 43 */ {XMC_GPIO_PORT2, 15}, // UART RX P2.15 Duplicate X1-4 + /* 44 */ {XMC_GPIO_PORT4, 1}, // GPIO / IO_2 P4.1 Duplicate X1-6 + /* 45 */ {XMC_GPIO_PORT1, 7}, // GPIO / SPI_CS_2GO_2 P1.7 (Chip Select - Slot 2) X1-8 + /* 46 */ {XMC_GPIO_PORT1, 9}, // SPI-MOSI / PWM41-2 / PWM5 P1.9 Duplicate X1-10 + /* 47 */ {XMC_GPIO_PORT1, 1}, // GPIO1_2GO_2 P1.1 X1-12 + /* 48 */ {XMC_GPIO_PORT1, 3}, // GPIO / QSPI_IO3 P1.3 X1-14 + /* 49 */ {XMC_GPIO_PORT1, 5}, // GPIO / QSPI_IO0 P1.5 X1-16 + /* 50 */ {XMC_GPIO_PORT1, 11}, // GPIO / QSPI_CS P1.11 X1-18 + /* 51 */ {XMC_GPIO_PORT1, 13}, // GPIO / CAN_RX P1.13 X1-20 + /* 52 */ {XMC_GPIO_PORT1, 15}, // USB Debug RX P1.15 Duplicate X1-22 + /* 53 */ {XMC_GPIO_PORT5, 1}, // GPIO / ETH_INT P5.1 X1-24 + /* 54 */ {XMC_GPIO_PORT5, 7}, // PWM8 - / PWM P5.7 X1-26 + /* 55 */ {XMC_GPIO_PORT2, 7}, // PWM8 - / PWM / ETH_MDC P2.7 X1-28 + /* 56 */ {XMC_GPIO_PORT2, 1}, // SWV ""DEBUG Do NOT Use ** P2.1 X1-30 + /* 57 */ {XMC_GPIO_PORT2, 3}, // AREF TODO: / ETH_RXD1 P2.3 Duplicate X1-32 + /* 58 */ {XMC_GPIO_PORT2, 5}, // I2C Data - SDA / A4 P2.5 (Hardwired to A4) Duplicate X1-34 + /* 59 */ {XMC_GPIO_PORT2, 9}, // PWM8 - / PWM / ETH_TXD1 P2.9 X1-36 + /* 60 */ {XMC_GPIO_PORT15, 8}, // A16 / ETH_CLK P15.8 X1-38 //Additional pins for port X2 starting here - /* 61 */ {XMC_GPIO_PORT14, 8}, // A14 / DAC 0 Output P14.8 - /* 62 */ {XMC_GPIO_PORT15, 2}, // A12 - ADC Input P15.2 (INPUT ONLY) - /* 63 */ {XMC_GPIO_PORT14, 15}, // A11 - ADC Input P14.15 (INPUT ONLY) - /* 64 */ {XMC_GPIO_PORT15, 9}, // A17 - ADC Input / ETH_CRS P15.9 - /* 65 */ {XMC_GPIO_PORT14, 6}, // A6 / AN1_2GO_1 - ADC Input P14.6 (INPUT ONLY) - /* 66 */ {XMC_GPIO_PORT14, 12}, // A8 / AN1_2GO_2 - ADC Input P14.12 (INPUT ONLY) - /* 67 */ {XMC_GPIO_PORT14, 14}, // A10 / ADC Input P14.14 (INPUT ONLY) - /* 68 */ {XMC_GPIO_PORT3, 0}, // I2C Clk SCL / A5 - ADC Input P3.0 (Hardwired to A5) - /* 69 */ {XMC_GPIO_PORT3, 2}, // BUTTON2 P3.2 - /* 70 */ {XMC_GPIO_PORT0, 10}, // INT / GPIO3_2GO_1 P0.10 - /* 71 */ {XMC_GPIO_PORT0, 1}, // INT P0.1 - /* 72 */ {XMC_GPIO_PORT0, 3}, // INT / GPIO3_2GO_2 P0.3 - /* 73 */ {XMC_GPIO_PORT0, 5}, // USB Debug TX P0.5 - /* 74 */ {XMC_GPIO_PORT0, 11}, // PWM80-31 output / PWM3 P0.11 - /* 75 */ {XMC_GPIO_PORT3, 3}, // PWM42-3 output / PWM1 P3.3 - /* 76 */ {XMC_GPIO_PORT3, 5}, // CS_2GO_1 P3.5 (Chip Select - Slot 1) - /* 77 */ {XMC_GPIO_PORT0, 7}, // LED2 P0.7 - /* 78 */ {XMC_GPIO_PORT0, 8}, // QSPI_CLK P0.8 - /* 79 */ {XMC_GPIO_PORT3, 6}, // PWM42-0(PWM0)/ External INT 1 P3.6 - /* 80 */ {XMC_GPIO_PORT3, 4}, // PWM42-2 output / PWM2 P3.4 - /* 81 */ {XMC_GPIO_PORT0, 12}, // CS_MB P0.12 - /* 82 */ {XMC_GPIO_PORT0, 6}, // LED1 P0.6 - /* 83 */ {XMC_GPIO_PORT0, 4}, // ETH_TXEN P0.4 - /* 84 */ {XMC_GPIO_PORT0, 2}, // SPI-CS / PWM80-01 / PWM4 P0.2 - /* 85 */ {XMC_GPIO_PORT0, 0}, // SPI-MISO P0.0 - /* 86 */ {XMC_GPIO_PORT0, 9}, // GPIO4_2GO_1 / PWM80-01 / PWM P0.9 - /* 87 */ {XMC_GPIO_PORT3, 1}, // BUTTON1 P3.1 - /* 88 */ {XMC_GPIO_PORT14, 4}, // A4 - ADC Input / SDA P14.4 (Hardwired to SDA) - /* 89 */ {XMC_GPIO_PORT14, 13}, // A9 / AN2_2GO_2 - ADC Input P14.13 (INPUT ONLY) - /* 90 */ {XMC_GPIO_PORT14, 7}, // A7 / AN2_2GO_1 - ADC Input P14.7 (INPUT ONLY) - /* 91 */ {XMC_GPIO_PORT14, 5}, // A5 - ADC Input / SCL P14.5 (Hardwired to SCL) - /* 92 */ {XMC_GPIO_PORT14, 3}, // A3 - ADC Input P14.3 (INPUT ONLY) - /* 93 */ {XMC_GPIO_PORT15, 3}, // A13 - ADC Input P15.3 (INPUT ONLY) - /* 94 */ {XMC_GPIO_PORT14, 9} // A15 / DAC 1 Output P14.9 + /* 61 */ {XMC_GPIO_PORT14, 8}, // A14 / DAC 0 Output P14.8 X2-33 + /* 62 */ {XMC_GPIO_PORT15, 2}, // A12 - ADC Input P15.2 (INPUT ONLY) X2-31 + /* 63 */ {XMC_GPIO_PORT14, 15}, // A11 - ADC Input P14.15 (INPUT ONLY) X2-29 + /* 64 */ {XMC_GPIO_PORT15, 9}, // A17 - ADC Input / ETH_CRS P15.9 X2-27 + /* 65 */ {XMC_GPIO_PORT14, 6}, // A6 / AN1_2GO_1 - ADC Input P14.6 (INPUT ONLY) X2-25 + /* 66 */ {XMC_GPIO_PORT14, 12}, // A8 / AN1_2GO_2 - ADC Input P14.12 (INPUT ONLY) X2-23 + /* 67 */ {XMC_GPIO_PORT14, 14}, // A10 / ADC Input P14.14 (INPUT ONLY) X2-21 + /* 68 */ {XMC_GPIO_PORT3, 0}, // I2C Clk SCL / A5 - ADC Input P3.0 (Hardwired to A5) Duplicate X2-19 + /* 69 */ {XMC_GPIO_PORT3, 2}, // BUTTON2 P3.2 X2-17 + /* 70 */ {XMC_GPIO_PORT0, 10}, // INT / GPIO3_2GO_1 P0.10 X2-15 + /* 71 */ {XMC_GPIO_PORT0, 1}, // INT P0.1 X2-13 + /* 72 */ {XMC_GPIO_PORT0, 3}, // INT / GPIO3_2GO_2 P0.3 X2-11 + /* 73 */ {XMC_GPIO_PORT0, 5}, // USB Debug TX P0.5 Duplicate X2-9 + /* 74 */ {XMC_GPIO_PORT0, 11}, // PWM80-31 output / PWM3 P0.11 Duplicate X2-7 + /* 75 */ {XMC_GPIO_PORT3, 3}, // PWM42-3 output / PWM1 P3.3 Duplicate X2-5 + /* 76 */ {XMC_GPIO_PORT3, 5}, // CS_2GO_1 P3.5 (Chip Select - Slot 1) X2-3 + /* 77 */ {XMC_GPIO_PORT0, 7}, // LED2 P0.7 X2-1 + /* 78 */ {XMC_GPIO_PORT0, 8}, // QSPI_CLK P0.8 X2-4 + /* 79 */ {XMC_GPIO_PORT3, 6}, // PWM42-0(PWM0)/ External INT 1 P3.6 Duplicate X2-6 + /* 80 */ {XMC_GPIO_PORT3, 4}, // PWM42-2 output / PWM2 P3.4 Duplicate X2-8 + /* 81 */ {XMC_GPIO_PORT0, 12}, // CS_MB P0.12 X2-10 + /* 82 */ {XMC_GPIO_PORT0, 6}, // LED1 P0.6 X2-12 + /* 83 */ {XMC_GPIO_PORT0, 4}, // ETH_TXEN P0.4 X2-14 + /* 84 */ {XMC_GPIO_PORT0, 2}, // SPI-CS / PWM80-01 / PWM4 P0.2 Duplicate X2-16 + /* 85 */ {XMC_GPIO_PORT0, 0}, // SPI-MISO P0.0 Duplicate X2-18 + /* 86 */ {XMC_GPIO_PORT0, 9}, // GPIO4_2GO_1 / PWM80-01 / PWM P0.9 X2-20 + /* 87 */ {XMC_GPIO_PORT3, 1}, // BUTTON1 P3.1 X2-22 + /* 88 */ {XMC_GPIO_PORT14, 4}, // A4 - ADC Input / SDA P14.4 (Hardwired to SDA) Duplicate X2-24 + /* 89 */ {XMC_GPIO_PORT14, 13}, // A9 / AN2_2GO_2 - ADC Input P14.13 (INPUT ONLY) X2-26 + /* 90 */ {XMC_GPIO_PORT14, 7}, // A7 / AN2_2GO_1 - ADC Input P14.7 (INPUT ONLY) X2-28 + /* 91 */ {XMC_GPIO_PORT14, 5}, // A5 - ADC Input / SCL P14.5 (Hardwired to SCL) Duplicate X2-30 + /* 92 */ {XMC_GPIO_PORT14, 3}, // A3 - ADC Input P14.3 Duplicate X2-32 + /* 93 */ {XMC_GPIO_PORT15, 3}, // A13 - ADC Input P15.3 (INPUT ONLY) X2-34 + /* 94 */ {XMC_GPIO_PORT14, 9} // A15 / DAC 1 Output P14.9 X2-36 }; const uint8_t GND = ( sizeof( mapping_port_pin ) / sizeof( XMC_PORT_PIN_t ) ); const uint8_t NUM_DIGITAL = ( sizeof( mapping_port_pin ) / sizeof( XMC_PORT_PIN_t ) );; @@ -225,11 +225,11 @@ const uint8_t mapping_pin_PWM4[][ 2 ] = { { 3, 0 }, // PWM0 { 5, 1 }, // PWM1 { 6, 2 }, // PWM2 - { 11, 3 }, // PWM5 - { 27, 4 }, // PWM - { 28, 5 }, // PWM - { 57, 6 }, // PWM - { 58, 7 }, // PWM + { 11, 3 }, // PWM5 Actually does pin 27 + { 27, 4 }, // PWM Actually does pin 28 + { 28, 5 }, // PWM Actually does pin 57 + { 57, 6 }, // PWM Actually does pin 58 + { 58, 7 }, // PWM Actually does INVALID DATA of end of array { 255, 255 } }; /* Configurations of PWM channels for CCU4 type */ @@ -239,7 +239,6 @@ XMC_PWM4_t mapping_pwm4[] = {CCU42, CCU42_CC43, 3, mapping_port_pin[5], P3_3_AF_CCU42_OUT3, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 5 P3.3 {CCU42, CCU42_CC42, 2, mapping_port_pin[6], P3_4_AF_CCU42_OUT2, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 6 P3.4 - //additional pwm outputs starting here {CCU41, CCU41_CC41, 1, mapping_port_pin[27], P2_4_AF_CCU41_OUT1, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 27 P2.4 {CCU41, CCU41_CC43, 3, mapping_port_pin[28], P2_2_AF_CCU41_OUT3, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 28 P2.2 {CCU41, CCU41_CC42, 2, mapping_port_pin[57], P2_3_AF_CCU41_OUT2, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 57 P2.3 @@ -251,13 +250,13 @@ const uint8_t NUM_PWM4 = ( sizeof( mapping_pwm4 ) / sizeof( XMC_PWM4_t ) ); const uint8_t mapping_pin_PWM8[][ 2 ] = { { 9, 0 }, // PWM3 { 10, 1 }, // PWM4 - { 26, 2 }, // PWM - { 29, 3 }, // PWM - { 30, 4 }, // PWM - { 54, 5 }, // PWM - { 55, 6 }, // PWM - { 59, 7 }, // PWM - { 86, 8 }, // PWM + { 26, 2 }, // PWM Actually does pin 55 + { 29, 3 }, // PWM Actually does pin 86 + { 30, 4 }, // PWM Actually does pin 30 + { 54, 5 }, // PWM Actually does pin 39 + { 55, 6 }, // PWM Actually does pin 26 + { 59, 7 }, // PWM Actually does pin 54 + { 86, 8 }, // PWM Actually does pin 29 { 255, 255 } }; /* Configurations of PWM channels for CCU8 type */ @@ -266,7 +265,6 @@ XMC_PWM8_t mapping_pwm8[] = {CCU80, CCU80_CC83, 3, XMC_CCU8_SLICE_COMPARE_CHANNEL_2, mapping_port_pin[9], P0_11_AF_CCU80_OUT31, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 9 P0.11 {CCU80, CCU80_CC80, 0, XMC_CCU8_SLICE_COMPARE_CHANNEL_2, mapping_port_pin[10], P0_2_AF_CCU80_OUT01, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 10 P0.2 - //additional pwm outputs starting here {CCU80, CCU80_CC80, 0, XMC_CCU8_SLICE_COMPARE_CHANNEL_1, mapping_port_pin[55], P2_7_AF_CCU80_OUT03, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 55 P2.7 {CCU80, CCU80_CC81, 1, XMC_CCU8_SLICE_COMPARE_CHANNEL_1, mapping_port_pin[86], P0_9_AF_CCU80_OUT12, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 86 P0.9 {CCU80, CCU80_CC81, 1, XMC_CCU8_SLICE_COMPARE_CHANNEL_2, mapping_port_pin[30], P2_6_AF_CCU80_OUT13, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 30 P2.6 @@ -297,16 +295,15 @@ XMC_ARD_DAC_t mapping_dac[] = const uint8_t NUM_ANALOG_OUTPUTS = ( sizeof( mapping_dac ) / sizeof( XMC_ARD_DAC_t ) ); #endif +//Result reg numbers are now equal to channel numbers XMC_ADC_t mapping_adc[] = { - //Result reg numbers are now equal to channel numbers {VADC, 0, VADC_G0, 0, 0, DISABLED}, {VADC, 1, VADC_G0, 0, 1, DISABLED}, {VADC, 2, VADC_G1, 1, 2, DISABLED}, {VADC, 3, VADC_G1, 1, 3, DISABLED}, {VADC, 0, VADC_G2, 2, 0, DISABLED}, {VADC, 1, VADC_G2, 2, 1, DISABLED}, - //Additional ADC channels starting here {VADC, 6, VADC_G2, 2, 6, DISABLED}, {VADC, 5, VADC_G2, 2, 5, DISABLED}, {VADC, 3, VADC_G2, 2, 3, DISABLED}, diff --git a/variants/XMC4700/config/XMC4700_Relax_Kit/pins_arduino.h b/variants/XMC4700/config/XMC4700_Relax_Kit/pins_arduino.h index 2d214182..4ffbfeef 100644 --- a/variants/XMC4700/config/XMC4700_Relax_Kit/pins_arduino.h +++ b/variants/XMC4700/config/XMC4700_Relax_Kit/pins_arduino.h @@ -96,26 +96,26 @@ static const uint8_t SCK_SD = PIN_SPI_SCK_SD; #define A4 4 #define A5 5 //Additional ADC ports starting here -#define A6 6 // ADC G2CH6 on P15.6 -#define A7 7 // ADC G2CH5 on P15.5 -#define A8 8 // ADC G2CH3 on P15.3 -#define A9 9 // ADC G1CH7 on P14.15 -#define A10 10 // ADC G1CH5 on P14.13 -#define A11 11 // ADC G0CH7 on P14.7 -#define A12 12 // ADC G3CH7 on P15.15 -#define A13 13 // ADC G1CH1 on P14.9 -#define A14 14 // ADC G1CH0 on P14.8 -#define A15 15 // ADC G3CH6 on P15.14 -#define A16 16 // ADC G0CH6 on P14.6 -#define A17 17 // ADC G1CH4 on P14.12 -#define A18 18 // ADC G1CH6 on P14.14 -#define A19 19 // ADC G2CH2 on P15.2 -#define A20 20 // ADC G2CH4 on P15.4 -#define A21 21 // ADC G2CH7 on P15.7 -// ADC G3CH0 on P15.8 not available -// ADC G3CH1 on P15.9 not available -// ADC G3CH4 on P15.12 button -// ADC G3CH5 on P15.13 button +#define A6 6 // ADC G2CH6 on P15.6 +#define A7 7 // ADC G2CH5 on P15.5 +#define A8 8 // ADC G2CH3 on P15.3 +#define A9 9 // ADC G1CH7 on P14.15 +#define A10 10 // ADC G1CH5 on P14.13 +#define A11 11 // ADC G0CH7 on P14.7 +#define A12 12 // ADC G3CH7 on P15.15 +#define A13 13 // ADC G1CH1 on P14.9 +#define A14 14 // ADC G1CH0 on P14.8 +#define A15 15 // ADC G3CH6 on P15.14 +#define A16 16 // ADC G0CH6 on P14.6 +#define A17 17 // ADC G1CH4 on P14.12 +#define A18 18 // ADC G1CH6 on P14.14 +#define A19 19 // ADC G2CH2 on P15.2 +#define A20 20 // ADC G2CH4 on P15.4 +#define A21 21 // ADC G2CH7 on P15.7 +// ADC G3CH0 on P15.8 not available +// ADC G3CH1 on P15.9 not available +// ADC G3CH4 on P15.12 button +// ADC G3CH5 on P15.13 button #define LED1 24 // Additional LED1 @@ -173,71 +173,71 @@ const XMC_PORT_PIN_t mapping_port_pin[] = /* 34 */ {XMC_GPIO_PORT1, 4}, // USB Debug RX P1.4 /* 35 */ {XMC_GPIO_PORT1, 5}, // USB Debug TX P1.5 - //Additional pins for port X1 starting here - /* 36 */ {XMC_GPIO_PORT3, 4}, // PWM42-2 / PWM12 P3.4 - /* 37 */ {XMC_GPIO_PORT0, 5}, // I2C_1 SDA // SPI_4 MOSI P0.5 - /* 38 */ {XMC_GPIO_PORT0, 3}, // PWM80-2 / PWM10 P0.3 - /* 39 */ {XMC_GPIO_PORT0, 1}, // PWM80-1 / PWM9 P0.1 - /* 40 */ {XMC_GPIO_PORT0, 10}, // P0.10 - /* 41 */ {XMC_GPIO_PORT3, 2}, // P3.2 - /* 42 */ {XMC_GPIO_PORT3, 1}, // P3.1 - /* 43 */ {XMC_GPIO_PORT15, 6}, // A6 / ADC Input P15.6 (INPUT ONLY) - /* 44 */ {XMC_GPIO_PORT15, 5}, // A7 / ADC Input P15.5 (INPUT ONLY) - /* 45 */ {XMC_GPIO_PORT15, 3}, // A8 / ADC Input P15.3 (INPUT ONLY) - /* 46 */ {XMC_GPIO_PORT14, 15}, // A9 / ADC Input P14.15 (INPUT ONLY) - /* 47 */ {XMC_GPIO_PORT14, 13}, // A10 / ADC Input P14.13 (INPUT ONLY) - /* 48 */ {XMC_GPIO_PORT14, 7}, // A11 / ADC Input P14.7 (INPUT ONLY) - /* 49 */ {XMC_GPIO_PORT15, 15}, // A12 / ADC Input P15.15 (INPUT ONLY) - /* 50 */ {XMC_GPIO_PORT14, 9}, // DAC0 // A13 / ADC Input P14.9 - /* 51 */ {XMC_GPIO_PORT2, 13}, // P2.13 - /* 52 */ {XMC_GPIO_PORT5, 10}, // P5.10 - /* 53 */ {XMC_GPIO_PORT5, 11}, // PWM80-0 / PWM6 P5.11 - /* 54 */ {XMC_GPIO_PORT1, 14}, // P1.14 - /* 55 */ {XMC_GPIO_PORT14, 8}, // DAC1 // A14 / ADC Input P14.8 - /* 56 */ {XMC_GPIO_PORT15, 14}, // A15 / ADC Input P15.14 (INPUT ONLY) - /* 57 */ {XMC_GPIO_PORT14, 6}, // A16 / ADC Input P14.6 (INPUT ONLY) - /* 58 */ {XMC_GPIO_PORT14, 12}, // A17 / ADC Input P14.12 (INPUT ONLY) - /* 59 */ {XMC_GPIO_PORT14, 14}, // A18 / ADC Input P14.14 (INPUT ONLY) - /* 60 */ {XMC_GPIO_PORT15, 2}, // A19 / ADC Input P15.2 (INPUT ONLY) - /* 61 */ {XMC_GPIO_PORT15, 4}, // A20 / ADC Input P15.4 (INPUT ONLY) - /* 62 */ {XMC_GPIO_PORT15, 7}, // A21 / ADC Input P15.7 (INPUT ONLY) - /* 63 */ {XMC_GPIO_PORT3, 0}, // PWM42-0 / PWM7 P3.0 - /* 64 */ {XMC_GPIO_PORT0, 9}, // PWM80-1 / PWM8 P0.9 - /* 65 */ {XMC_GPIO_PORT0, 0}, // P0.0 - /* 66 */ {XMC_GPIO_PORT0, 2}, // P0.2 - /* 67 */ {XMC_GPIO_PORT0, 4}, // SPI_4 MISO P0.4 - /* 68 */ {XMC_GPIO_PORT0, 6}, // PWM80-3 / PWM11 P0.6 - /* 69 */ {XMC_GPIO_PORT0, 11}, // I2C_1 SCL // SPI_4 SCLK P0.11 - - //Additional pins for port X2 starting here - /* 70 */ {XMC_GPIO_PORT3, 13}, // SPI_2 SCLK P3.13 - /* 71 */ {XMC_GPIO_PORT3, 11}, // SPI_2 MOSI P3.11 - /* 72 */ {XMC_GPIO_PORT0, 14}, // PWM40-1 / PWM21 P0.14 - /* 73 */ {XMC_GPIO_PORT3, 14}, // P3.14 - /* 74 */ {XMC_GPIO_PORT0, 7}, // P0.7 - /* 75 */ {XMC_GPIO_PORT1, 2}, // P1.2 - /* 76 */ {XMC_GPIO_PORT6, 1}, // P6.1 - /* 77 */ {XMC_GPIO_PORT5, 3}, // P5.3 - /* 78 */ {XMC_GPIO_PORT6, 5}, // PWM43-0 / PWM17 P6.5 - /* 79 */ {XMC_GPIO_PORT1, 15}, // PWM81-0 / PWM16 P1.15 - /* 80 */ {XMC_GPIO_PORT5, 1}, // SPI_3 MOSI P5.1 - /* 81 */ {XMC_GPIO_PORT5, 3}, // PWM81-2 / PWM15 P5.3 - /* 82 */ {XMC_GPIO_PORT5, 5}, // PWM81-1 / PWM14 P5.5 - /* 83 */ {XMC_GPIO_PORT5, 7}, // PWM81-0 / PWM13 P5.7 - /* 84 */ {XMC_GPIO_PORT2, 6}, // P2.6 - /* 85 */ {XMC_GPIO_PORT5, 6}, // P5.6 - /* 86 */ {XMC_GPIO_PORT5, 4}, // P5.4 - /* 87 */ {XMC_GPIO_PORT5, 2}, // P5.2 - /* 88 */ {XMC_GPIO_PORT5, 0}, // SPI_3 MISO P5.0 - /* 89 */ {XMC_GPIO_PORT6, 6}, // P6.6 - /* 90 */ {XMC_GPIO_PORT6, 4}, // PWM43-1 / PWM18 P6.4 - /* 91 */ {XMC_GPIO_PORT6, 2}, // PWM43-3 / PWM19 P6.2 - /* 92 */ {XMC_GPIO_PORT6, 0}, // P6.0 - /* 93 */ {XMC_GPIO_PORT0, 8}, // SPI_3 SCLK P0.8 - /* 94 */ {XMC_GPIO_PORT3, 3}, // P3.3 - /* 95 */ {XMC_GPIO_PORT0, 15}, // PWM40-0 / PWM20 P0.15 - /* 96 */ {XMC_GPIO_PORT0, 12}, // PWM40-3 / PWM22 P0.12 - /* 97 */ {XMC_GPIO_PORT3, 12} // ECAT0.P1_LINK_ACT P3.12 + //Additional pins for port X1 starting here + /* 36 */ {XMC_GPIO_PORT3, 4}, // PWM42-2 / PWM12 P3.4 X1-1 + /* 37 */ {XMC_GPIO_PORT0, 5}, // I2C_1 SDA // SPI_4 MOSI P0.5 X1-3 + /* 38 */ {XMC_GPIO_PORT0, 3}, // PWM80-2 / PWM10 P0.3 X1-5 + /* 39 */ {XMC_GPIO_PORT0, 1}, // PWM80-1 / PWM9 P0.1 X1-7 + /* 40 */ {XMC_GPIO_PORT0, 10}, // P0.10 X1-9 + /* 41 */ {XMC_GPIO_PORT3, 2}, // P3.2 X1-11 + /* 42 */ {XMC_GPIO_PORT3, 1}, // P3.1 X1-13 + /* 43 */ {XMC_GPIO_PORT15, 6}, // A6 / ADC Input P15.6 X1-15 + /* 44 */ {XMC_GPIO_PORT15, 5}, // A7 / ADC Input P15.5 X1-17 + /* 45 */ {XMC_GPIO_PORT15, 3}, // A8 / ADC Input P15.3 X1-19 + /* 46 */ {XMC_GPIO_PORT14, 15}, // A9 / ADC Input P14.15 X1-21 + /* 47 */ {XMC_GPIO_PORT14, 13}, // A10 / ADC Input P14.13 X1-23 + /* 48 */ {XMC_GPIO_PORT14, 7}, // A11 / ADC Input P14.7 X1-25 + /* 49 */ {XMC_GPIO_PORT15, 15}, // A12 / ADC Input P15.15 X1-27 + /* 50 */ {XMC_GPIO_PORT14, 9}, // DAC0 // A13 / ADC Input P14.9 X1-29 + /* 51 */ {XMC_GPIO_PORT2, 13}, // P2.13 X1-31 + /* 52 */ {XMC_GPIO_PORT5, 10}, // P5.10 X1-33 + /* 53 */ {XMC_GPIO_PORT5, 11}, // PWM80-0 / PWM6 P5.11 X1-34 + /* 54 */ {XMC_GPIO_PORT1, 14}, // P1.14 X1-32 + /* 55 */ {XMC_GPIO_PORT14, 8}, // DAC1 // A14 / ADC Input P14.8 X1-30 + /* 56 */ {XMC_GPIO_PORT15, 14}, // A15 / ADC Input P15.14 X1-28 + /* 57 */ {XMC_GPIO_PORT14, 6}, // A16 / ADC Input P14.6 X1-26 + /* 58 */ {XMC_GPIO_PORT14, 12}, // A17 / ADC Input P14.12 X1-24 + /* 59 */ {XMC_GPIO_PORT14, 14}, // A18 / ADC Input P14.14 X1-22 + /* 60 */ {XMC_GPIO_PORT15, 2}, // A19 / ADC Input P15.2 X1-20 + /* 61 */ {XMC_GPIO_PORT15, 4}, // A20 / ADC Input P15.4 X1-18 + /* 62 */ {XMC_GPIO_PORT15, 7}, // A21 / ADC Input P15.7 X1-16 + /* 63 */ {XMC_GPIO_PORT3, 0}, // PWM42-0 / PWM7 P3.0 X1-14 + /* 64 */ {XMC_GPIO_PORT0, 9}, // PWM80-1 / PWM8 P0.9 X1-12 + /* 65 */ {XMC_GPIO_PORT0, 0}, // P0.0 X1-10 + /* 66 */ {XMC_GPIO_PORT0, 2}, // P0.2 X1-8 + /* 67 */ {XMC_GPIO_PORT0, 4}, // SPI_4 MISO P0.4 X1-6 + /* 68 */ {XMC_GPIO_PORT0, 6}, // PWM80-3 / PWM11 P0.6 X1-4 + /* 69 */ {XMC_GPIO_PORT0, 11}, // I2C_1 SCL // SPI_4 SCLK P0.11 X1-2 + + //Additional pins for port X2 starting here + /* 70 */ {XMC_GPIO_PORT3, 13}, // SPI_2 SCLK P3.13 X2-1 + /* 71 */ {XMC_GPIO_PORT3, 11}, // SPI_2 MOSI P3.11 X2-3 + /* 72 */ {XMC_GPIO_PORT0, 14}, // PWM40-1 / PWM21 P0.14 X2-5 + /* 73 */ {XMC_GPIO_PORT3, 14}, // P3.14 X2-7 + /* 74 */ {XMC_GPIO_PORT0, 7}, // P0.7 X2-9 + /* 75 */ {XMC_GPIO_PORT1, 2}, // P1.2 X2-11 + /* 76 */ {XMC_GPIO_PORT6, 1}, // P6.1 X2-13 + /* 77 */ {XMC_GPIO_PORT5, 3}, // P5.3 X2-15 + /* 78 */ {XMC_GPIO_PORT6, 5}, // PWM43-0 / PWM17 P6.5 X2-17 + /* 79 */ {XMC_GPIO_PORT1, 15}, // PWM81-0 / PWM16 P1.15 X2-19 + /* 80 */ {XMC_GPIO_PORT5, 1}, // SPI_3 MOSI P5.1 X2-21 + /* 81 */ {XMC_GPIO_PORT5, 3}, // PWM81-2 / PWM15 P5.3 X2-23 + /* 82 */ {XMC_GPIO_PORT5, 5}, // PWM81-1 / PWM14 P5.5 X2-25 + /* 83 */ {XMC_GPIO_PORT5, 7}, // PWM81-0 / PWM13 P5.7 X2-27 + /* 84 */ {XMC_GPIO_PORT2, 6}, // P2.6 X2-28 + /* 85 */ {XMC_GPIO_PORT5, 6}, // P5.6 X2-26 + /* 86 */ {XMC_GPIO_PORT5, 4}, // P5.4 X2-24 + /* 87 */ {XMC_GPIO_PORT5, 2}, // P5.2 X2-22 + /* 88 */ {XMC_GPIO_PORT5, 0}, // SPI_3 MISO P5.0 X2-20 + /* 89 */ {XMC_GPIO_PORT6, 6}, // P6.6 X2-18 + /* 90 */ {XMC_GPIO_PORT6, 4}, // PWM43-1 / PWM18 P6.4 X2-16 + /* 91 */ {XMC_GPIO_PORT6, 2}, // PWM43-3 / PWM19 P6.2 X2-14 + /* 92 */ {XMC_GPIO_PORT6, 0}, // P6.0 X2-12 + /* 93 */ {XMC_GPIO_PORT0, 8}, // SPI_3 SCLK P0.8 X2-10 + /* 94 */ {XMC_GPIO_PORT3, 3}, // P3.3 X2-8 + /* 95 */ {XMC_GPIO_PORT0, 15}, // PWM40-0 / PWM20 P0.15 X2-6 + /* 96 */ {XMC_GPIO_PORT0, 12}, // PWM40-3 / PWM22 P0.12 X2-4 + /* 97 */ {XMC_GPIO_PORT3, 12} // ECAT0.P1_LINK_ACT P3.12 X2-2 }; const uint8_t GND = ( sizeof( mapping_port_pin ) / sizeof( XMC_PORT_PIN_t ) ); const uint8_t NUM_DIGITAL = ( sizeof( mapping_port_pin ) / sizeof( XMC_PORT_PIN_t ) );; @@ -274,15 +274,14 @@ XMC_PWM4_t mapping_pwm4[] = {CCU40, CCU40_CC42, 2, mapping_port_pin[3], P1_1_AF_CCU40_OUT2, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 3 P1.1 {CCU41, CCU41_CC40, 0, mapping_port_pin[10], P3_10_AF_CCU41_OUT0, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 10 P3.10 {CCU41, CCU41_CC42, 2, mapping_port_pin[11], P3_8_AF_CCU41_OUT2, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 11 P3.8 - //additional pwm outputs starting here - {CCU40, CCU40_CC40, 0, mapping_port_pin[95], P0_15_AF_CCU40_OUT0, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 95 P0.15 - {CCU40, CCU40_CC41, 1, mapping_port_pin[72], P0_14_AF_CCU40_OUT1, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 72 P0.14 - {CCU40, CCU40_CC43, 3, mapping_port_pin[96], P0_12_AF_CCU40_OUT3, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 96 P0.12 - {CCU42, CCU42_CC40, 0, mapping_port_pin[63], P3_0_AF_CCU42_OUT0, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 63 P3.0 - {CCU42, CCU42_CC42, 2, mapping_port_pin[36], P3_4_AF_CCU42_OUT2, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 36 P3.4 - {CCU43, CCU43_CC40, 0, mapping_port_pin[78], P6_5_AF_CCU43_OUT0, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 78 P6.5 - {CCU43, CCU43_CC41, 1, mapping_port_pin[90], P6_4_AF_CCU43_OUT1, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 90 P6.4 - {CCU43, CCU43_CC43, 3, mapping_port_pin[91], P6_2_AF_CCU43_OUT3, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED} // PWM disabled 91 P6.2 + {CCU40, CCU40_CC40, 0, mapping_port_pin[95], P0_15_AF_CCU40_OUT0, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 95 P0.15 + {CCU40, CCU40_CC41, 1, mapping_port_pin[72], P0_14_AF_CCU40_OUT1, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 72 P0.14 + {CCU40, CCU40_CC43, 3, mapping_port_pin[96], P0_12_AF_CCU40_OUT3, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 96 P0.12 + {CCU42, CCU42_CC40, 0, mapping_port_pin[63], P3_0_AF_CCU42_OUT0, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 63 P3.0 + {CCU42, CCU42_CC42, 2, mapping_port_pin[36], P3_4_AF_CCU42_OUT2, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 36 P3.4 + {CCU43, CCU43_CC40, 0, mapping_port_pin[78], P6_5_AF_CCU43_OUT0, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 78 P6.5 + {CCU43, CCU43_CC41, 1, mapping_port_pin[90], P6_4_AF_CCU43_OUT1, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 90 P6.4 + {CCU43, CCU43_CC43, 3, mapping_port_pin[91], P6_2_AF_CCU43_OUT3, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED} // PWM disabled 91 P6.2 }; const uint8_t NUM_PWM4 = ( sizeof( mapping_pwm4 ) / sizeof( XMC_PWM4_t ) ); @@ -308,16 +307,15 @@ XMC_PWM8_t mapping_pwm8[] = {CCU81, CCU81_CC83, 3, XMC_CCU8_SLICE_COMPARE_CHANNEL_2, mapping_port_pin[5], P2_12_AF_CCU81_OUT33, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 5 P2.12 {CCU80, CCU80_CC82, 2, XMC_CCU8_SLICE_COMPARE_CHANNEL_2, mapping_port_pin[6], P2_11_AF_CCU80_OUT22, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 6 P2.11 {CCU81, CCU81_CC81, 1, XMC_CCU8_SLICE_COMPARE_CHANNEL_1, mapping_port_pin[9], P1_11_AF_CCU81_OUT11, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 9 P1.11 - //additional pwm outputs starting here - {CCU80, CCU80_CC80, 0, XMC_CCU8_SLICE_COMPARE_CHANNEL_1, mapping_port_pin[53], P5_11_AF_CCU80_OUT00, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 53 P5.11 - {CCU80, CCU80_CC81, 1, XMC_CCU8_SLICE_COMPARE_CHANNEL_1, mapping_port_pin[39], P0_1_AF_CCU80_OUT11, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 39 P0.1 - {CCU80, CCU80_CC81, 1, XMC_CCU8_SLICE_COMPARE_CHANNEL_2, mapping_port_pin[64], P0_9_AF_CCU80_OUT12, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 64 P0.9 - {CCU80, CCU80_CC82, 2, XMC_CCU8_SLICE_COMPARE_CHANNEL_1, mapping_port_pin[38], P0_3_AF_CCU80_OUT20, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 38 P0.3 - {CCU80, CCU80_CC83, 3, XMC_CCU8_SLICE_COMPARE_CHANNEL_1, mapping_port_pin[68], P0_6_AF_CCU80_OUT30, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 68 P0.6 - {CCU81, CCU81_CC80, 0, XMC_CCU8_SLICE_COMPARE_CHANNEL_1, mapping_port_pin[79], P1_15_AF_CCU81_OUT00, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 79 P1.15 - {CCU81, CCU81_CC80, 0, XMC_CCU8_SLICE_COMPARE_CHANNEL_2, mapping_port_pin[83], P5_7_AF_CCU81_OUT02, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 83 P5.7 - {CCU81, CCU81_CC81, 1, XMC_CCU8_SLICE_COMPARE_CHANNEL_2, mapping_port_pin[82], P5_5_AF_CCU81_OUT12, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 82 P5.5 - {CCU81, CCU81_CC82, 2, XMC_CCU8_SLICE_COMPARE_CHANNEL_2, mapping_port_pin[81], P5_3_AF_CCU81_OUT22, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED} // PWM disabled 81 P5.3 + {CCU80, CCU80_CC80, 0, XMC_CCU8_SLICE_COMPARE_CHANNEL_1, mapping_port_pin[53], P5_11_AF_CCU80_OUT00, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 53 P5.11 + {CCU80, CCU80_CC81, 1, XMC_CCU8_SLICE_COMPARE_CHANNEL_1, mapping_port_pin[39], P0_1_AF_CCU80_OUT11, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 39 P0.1 + {CCU80, CCU80_CC81, 1, XMC_CCU8_SLICE_COMPARE_CHANNEL_2, mapping_port_pin[64], P0_9_AF_CCU80_OUT12, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 64 P0.9 + {CCU80, CCU80_CC82, 2, XMC_CCU8_SLICE_COMPARE_CHANNEL_1, mapping_port_pin[38], P0_3_AF_CCU80_OUT20, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 38 P0.3 + {CCU80, CCU80_CC83, 3, XMC_CCU8_SLICE_COMPARE_CHANNEL_1, mapping_port_pin[68], P0_6_AF_CCU80_OUT30, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 68 P0.6 + {CCU81, CCU81_CC80, 0, XMC_CCU8_SLICE_COMPARE_CHANNEL_1, mapping_port_pin[79], P1_15_AF_CCU81_OUT00, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 79 P1.15 + {CCU81, CCU81_CC80, 0, XMC_CCU8_SLICE_COMPARE_CHANNEL_2, mapping_port_pin[83], P5_7_AF_CCU81_OUT02, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 83 P5.7 + {CCU81, CCU81_CC81, 1, XMC_CCU8_SLICE_COMPARE_CHANNEL_2, mapping_port_pin[82], P5_5_AF_CCU81_OUT12, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 82 P5.5 + {CCU81, CCU81_CC82, 2, XMC_CCU8_SLICE_COMPARE_CHANNEL_2, mapping_port_pin[81], P5_3_AF_CCU81_OUT22, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED} // PWM disabled 81 P5.3 }; const uint8_t NUM_PWM8 = ( sizeof( mapping_pwm8 ) / sizeof( XMC_PWM8_t ) ); const uint8_t NUM_PWM = ( sizeof( mapping_pwm4 ) / sizeof( XMC_PWM4_t ) ) @@ -331,38 +329,37 @@ const uint8_t mapping_pin_DAC[][ 2 ] = { { 255, 255 } }; XMC_ARD_DAC_t mapping_dac[] = { - {XMC_DAC0, 1, 12}, - {XMC_DAC0, 0, 12} + {XMC_DAC0, 1, 12}, + {XMC_DAC0, 0, 12} }; const uint8_t NUM_ANALOG_OUTPUTS = ( sizeof( mapping_dac ) / sizeof( XMC_ARD_DAC_t ) ); #endif +//Result reg numbers are now equal to channel numbers XMC_ADC_t mapping_adc[] = { - //Result reg numbers are now equal to channel numbers - {VADC, 0, VADC_G0, 0, 0, DISABLED}, + {VADC, 0, VADC_G0, 0, 0, DISABLED}, {VADC, 1, VADC_G0, 0, 1, DISABLED}, {VADC, 2, VADC_G1, 1, 2, DISABLED}, {VADC, 3, VADC_G1, 1, 3, DISABLED}, {VADC, 0, VADC_G2, 2, 0, DISABLED}, {VADC, 1, VADC_G2, 2, 1, DISABLED}, - //Additional ADC channels starting here - {VADC, 6, VADC_G2, 2, 6, DISABLED}, - {VADC, 5, VADC_G2, 2, 5, DISABLED}, - {VADC, 3, VADC_G2, 2, 3, DISABLED}, - {VADC, 7, VADC_G1, 1, 7, DISABLED}, - {VADC, 5, VADC_G1, 1, 5, DISABLED}, - {VADC, 7, VADC_G0, 0, 7, DISABLED}, - {VADC, 7, VADC_G3, 3, 7, DISABLED}, - {VADC, 1, VADC_G1, 1, 1, DISABLED}, - {VADC, 0, VADC_G1, 1, 0, DISABLED}, - {VADC, 6, VADC_G3, 3, 6, DISABLED}, - {VADC, 6, VADC_G0, 0, 6, DISABLED}, - {VADC, 4, VADC_G1, 1, 4, DISABLED}, - {VADC, 6, VADC_G1, 1, 6, DISABLED}, - {VADC, 2, VADC_G2, 2, 2, DISABLED}, - {VADC, 4, VADC_G2, 2, 4, DISABLED}, - {VADC, 7, VADC_G2, 2, 7, DISABLED} + {VADC, 6, VADC_G2, 2, 6, DISABLED}, + {VADC, 5, VADC_G2, 2, 5, DISABLED}, + {VADC, 3, VADC_G2, 2, 3, DISABLED}, + {VADC, 7, VADC_G1, 1, 7, DISABLED}, + {VADC, 5, VADC_G1, 1, 5, DISABLED}, + {VADC, 7, VADC_G0, 0, 7, DISABLED}, + {VADC, 7, VADC_G3, 3, 7, DISABLED}, + {VADC, 1, VADC_G1, 1, 1, DISABLED}, + {VADC, 0, VADC_G1, 1, 0, DISABLED}, + {VADC, 6, VADC_G3, 3, 6, DISABLED}, + {VADC, 6, VADC_G0, 0, 6, DISABLED}, + {VADC, 4, VADC_G1, 1, 4, DISABLED}, + {VADC, 6, VADC_G1, 1, 6, DISABLED}, + {VADC, 2, VADC_G2, 2, 2, DISABLED}, + {VADC, 4, VADC_G2, 2, 4, DISABLED}, + {VADC, 7, VADC_G2, 2, 7, DISABLED} }; const uint8_t NUM_ANALOG_INPUTS = ( sizeof( mapping_adc ) / sizeof( XMC_ADC_t ) ); From 79b18cb6b0c00fa92222f0d9e19c69803e8d8b4b Mon Sep 17 00:00:00 2001 From: boramonideep Date: Fri, 27 May 2022 07:04:15 +0200 Subject: [PATCH 08/78] updated compiler to version 10.3-2021.10 --- package/package_infineon_index.template.json | 29 +++++++++++++++++++- 1 file changed, 28 insertions(+), 1 deletion(-) diff --git a/package/package_infineon_index.template.json b/package/package_infineon_index.template.json index f626b6e2..c341db98 100644 --- a/package/package_infineon_index.template.json +++ b/package/package_infineon_index.template.json @@ -51,7 +51,7 @@ { "packager":"Infineon", "name":"arm-none-eabi-gcc", - "version":"5.4-2016q3" + "version":"10.3-2021.10" }, { "packager":"Infineon", @@ -139,6 +139,33 @@ } ] }, + { + "name":"arm-none-eabi-gcc", + "version":"10.3-2021.10", + "systems":[ + { + "host":"i686-mingw32", + "archiveFileName":"gcc-arm-none-eabi-10.3-2021.10-win32.zip", + "url":"https://developer.arm.com/-/media/Files/downloads/gnu-rm/10.3-2021.10/gcc-arm-none-eabi-10.3-2021.10-win32.zip", + "checksum":"SHA-256:d287439b3090843f3f4e29c7c41f81d958a5323aecefcf705c203bfd8ae3f2e7", + "size":"200578763" + }, + { + "host":"x86_64-apple-darwin", + "url":"https://developer.arm.com/-/media/Files/downloads/gnu-rm/10.3-2021.10/gcc-arm-none-eabi-10.3-2021.10-mac.tar.bz2", + "archiveFileName":"gcc-arm-none-eabi-10.3-2021.10-mac.tar.bz2", + "checksum":"SHA-256:fb613dacb25149f140f73fe9ff6c380bb43328e6bf813473986e9127e2bc283b", + "size":"158961466" + }, + { + "host":"x86_64-pc-linux-gnu", + "url":"https://developer.arm.com/-/media/Files/downloads/gnu-rm/10.3-2021.10/gcc-arm-none-eabi-10.3-2021.10-x86_64-linux.tar.bz2", + "archiveFileName":"gcc-arm-none-eabi-10.3-2021.10-x86_64-linux.tar.bz2", + "checksum":"SHA-256:97dbb4f019ad1650b732faffcc881689cedc14e2b7ee863d390e0a41ef16c9a3", + "size":"157089706" + } + ] + }, { "name":"XMCFlasher", "version":"1.2.0", From f016069488ced9bbe01decebba2b3c4f1a42c238 Mon Sep 17 00:00:00 2001 From: boramonideep Date: Sun, 29 May 2022 00:42:32 +0200 Subject: [PATCH 09/78] enable xmc1400_for_arduino_kit --- boards.txt | 44 ++++++++++++++++++++ package/package_infineon_index.template.json | 3 ++ 2 files changed, 47 insertions(+) diff --git a/boards.txt b/boards.txt index d071a1e3..0e903d65 100644 --- a/boards.txt +++ b/boards.txt @@ -261,6 +261,50 @@ XMC1300_Sense2GoL.menu.LIB.DSP.library.selected=-DARM_LIB_CMSIS_DSP #XMC1400_Boot_Kit.menu.LIB.DSPNN=ARM DSP / ARM NN Framework #XMC1400_Boot_Kit.menu.LIB.DSPNN.library.selected=-DARM_LIB_CMSIS_DSP -DARM_LIB_CMSIS_NN +#################################################### +XMC1400_Arduino_Kit.name=XMC1400 Kit for Arduino +XMC1400_Arduino_Kit.upload.tool=xmcprog +XMC1400_Arduino_Kit.upload.speed=115200 +XMC1400_Arduino_Kit.upload.resetmethod=ck +XMC1400_Arduino_Kit.upload.maximum_size=204800 +XMC1400_Arduino_Kit.upload.wait_for_upload_port=true + +XMC1400_Arduino_Kit.communication=usb +XMC1400_Arduino_Kit.protocol=dragon_isp +XMC1400_Arduino_Kit.program.protocol=dragon_isp +XMC1400_Arduino_Kit.program.tool=xmcprog +XMC1400_Arduino_Kit.program.extra_params=-Pusb + +XMC1400_Arduino_Kit.serial.disableDTR=true +XMC1400_Arduino_Kit.serial.disableRTS=true + +XMC1400_Arduino_Kit.build.mcu=cortex-m0 +XMC1400_Arduino_Kit.build.f_cpu=48000000L +XMC1400_Arduino_Kit.build.board=ARM_XMC +XMC1400_Arduino_Kit.build.board.version=1402 +XMC1400_Arduino_Kit.build.board.type=Q064x0200 +XMC1400_Arduino_Kit.build.board.v=0200 +XMC1400_Arduino_Kit.build.core=./ +XMC1400_Arduino_Kit.build.variant=XMC1400 +XMC1400_Arduino_Kit.build.board_variant=XMC1400_Arduino_Kit +XMC1400_Arduino_Kit.build.flash_size=200K +XMC1400_Arduino_Kit.build.flash_ld=linker_script_200k.ld +XMC1400_Arduino_Kit.build.extra_flags=-DARM_MATH_CM0 -DXMC1_SERIES + +XMC1400_Arduino_Kit.menu.UART.debug=PC +XMC1400_Arduino_Kit.menu.UART.debug.uart.selected=-DSERIAL_HOSTPC +XMC1400_Arduino_Kit.menu.UART.onBoard=On Board +XMC1400_Arduino_Kit.menu.UART.onBoard.uart.selected=-DSERIAL_ONBOARD + +XMC1400_Arduino_Kit.menu.LIB.NONE=None +XMC1400_Arduino_Kit.menu.LIB.NONE.library.selected= +XMC1400_Arduino_Kit.menu.LIB.NN=ARM NN Framework +XMC1400_Arduino_Kit.menu.LIB.NN.library.selected=-DARM_LIB_CMSIS_NN +XMC1400_Arduino_Kit.menu.LIB.DSP=ARM DSP +XMC1400_Arduino_Kit.menu.LIB.DSP.library.selected=-DARM_LIB_CMSIS_DSP +XMC1400_Arduino_Kit.menu.LIB.DSPNN=ARM DSP / ARM NN Framework +XMC1400_Arduino_Kit.menu.LIB.DSPNN.library.selected=-DARM_LIB_CMSIS_DSP -DARM_LIB_CMSIS_NN + #################################################### XMC4400_Platform2GO.name=XMC4400 Platform 2GO diff --git a/package/package_infineon_index.template.json b/package/package_infineon_index.template.json index f626b6e2..0eb56f1c 100644 --- a/package/package_infineon_index.template.json +++ b/package/package_infineon_index.template.json @@ -45,6 +45,9 @@ }, { "name":"XMC4700 DEMO Radar BB" + }, + { + "name":"XMC1400 Kit for Arduino" } ], "toolsDependencies":[ From 9d4025130156398f4de93c9ad2e6bc81128b4048 Mon Sep 17 00:00:00 2001 From: boramonideep Date: Wed, 15 Jun 2022 10:42:44 +0200 Subject: [PATCH 10/78] added pins_arduino.h and made other required changes to core for XMC1400 Kit for Arduino --- boards.txt | 2 +- cores/WInterrupts.c | 13 +- .../config/XMC1400_Arduino_Kit/pins_arduino.h | 298 ++++++++++++++++++ 3 files changed, 311 insertions(+), 2 deletions(-) create mode 100644 variants/XMC1400/config/XMC1400_Arduino_Kit/pins_arduino.h diff --git a/boards.txt b/boards.txt index 0e903d65..9825a22f 100644 --- a/boards.txt +++ b/boards.txt @@ -282,7 +282,7 @@ XMC1400_Arduino_Kit.build.mcu=cortex-m0 XMC1400_Arduino_Kit.build.f_cpu=48000000L XMC1400_Arduino_Kit.build.board=ARM_XMC XMC1400_Arduino_Kit.build.board.version=1402 -XMC1400_Arduino_Kit.build.board.type=Q064x0200 +XMC1400_Arduino_Kit.build.board.type=T038x0200 XMC1400_Arduino_Kit.build.board.v=0200 XMC1400_Arduino_Kit.build.core=./ XMC1400_Arduino_Kit.build.variant=XMC1400 diff --git a/cores/WInterrupts.c b/cores/WInterrupts.c index b89ece71..3201647e 100644 --- a/cores/WInterrupts.c +++ b/cores/WInterrupts.c @@ -145,6 +145,12 @@ void attachInterrupt(uint32_t interrupt_num, interrupt_cb_t callback, uint32_t m XMC_USIC_CH_Enable(XMC_USIC0_CH0); XMC_USIC_CH_SetInputSource(XMC_USIC0_CH0, XMC_USIC_CH_INPUT_DX5, USIC0_C0_DX5_P1_4); XMC_USIC_CH_SetInputSource(XMC_USIC0_CH0, XMC_USIC_CH_INPUT_DX2, USIC0_C0_DX2_DX5INS); +#endif +#if defined(XMC1400_Arduino_Kit) + /* P1_4 external interrupt goes through USIC to CCU4 */ + XMC_USIC_CH_Enable(XMC_USIC0_CH0); + XMC_USIC_CH_SetInputSource(XMC_USIC0_CH0, XMC_USIC_CH_INPUT_DX5, USIC0_C0_DX5_P1_4); + XMC_USIC_CH_SetInputSource(XMC_USIC0_CH0, XMC_USIC_CH_INPUT_DX2, USIC0_C0_DX2_DX5INS); #endif XMC_CCU4_SLICE_EnableMultipleEvents(pin_irq.slice, XMC_CCU4_SLICE_MULTI_IRQ_ID_EVENT0); XMC_CCU4_SLICE_SetInterruptNode(pin_irq.slice, XMC_CCU4_SLICE_IRQ_ID_EVENT0, 0); @@ -159,9 +165,14 @@ void attachInterrupt(uint32_t interrupt_num, interrupt_cb_t callback, uint32_t m else if (pin_irq.irq_num == 1) { #if defined(XMC1300_Boot_Kit) - /* P0_13 external interrupt goes through USIC to CCU4 */ + /* P0_13 external interrupt goes through USIC to CCU4 */ XMC_USIC_CH_Enable(XMC_USIC0_CH0); XMC_USIC_CH_SetInputSource(XMC_USIC0_CH0, XMC_USIC_CH_INPUT_DX2, USIC0_C0_DX2_P0_13); +#endif +#if defined(XMC1400_Arduino_Kit) + /* P1_1 external interrupt goes through USIC to CCU4 */ + XMC_USIC_CH_Enable(XMC_USIC0_CH1); + XMC_USIC_CH_SetInputSource(XMC_USIC0_CH1, XMC_USIC_CH_INPUT_DX2, USIC0_C1_DX2_P1_1); #endif XMC_CCU4_SLICE_EnableMultipleEvents(pin_irq.slice, XMC_CCU4_SLICE_MULTI_IRQ_ID_EVENT1); XMC_CCU4_SLICE_SetInterruptNode(pin_irq.slice, XMC_CCU4_SLICE_IRQ_ID_EVENT1, 1); diff --git a/variants/XMC1400/config/XMC1400_Arduino_Kit/pins_arduino.h b/variants/XMC1400/config/XMC1400_Arduino_Kit/pins_arduino.h new file mode 100644 index 00000000..c3f474bd --- /dev/null +++ b/variants/XMC1400/config/XMC1400_Arduino_Kit/pins_arduino.h @@ -0,0 +1,298 @@ +/* + pins_arduino.h - Pin definition functions for Arduino + Part of Arduino - http://www.arduino.cc/ + + Copyright (c) 2007 David A. Mellis + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General + Public License along with this library; if not, write to the + Free Software Foundation, Inc., 59 Temple Place, Suite 330, + Boston, MA 02111-1307 USA +*/ +#ifndef PINS_ARDUINO_H_ +#define PINS_ARDUINO_H_ + +//**************************************************************************** +// @Project Includes +//**************************************************************************** +#include + +//**************************************************************************** +// @Defines +//**************************************************************************** +// XMC_BOARD for stringifying into serial or other text outputs/logs +// Note the actual name XMC and number MUST have a character between +// to avoid issues with other defined macros e.g. XMC1400 +#define XMC_BOARD XMC 1400 Kit for Arduino + +/* On board LED is ON when digital output is 0, LOW, FALSE, OFF */ +#define XMC_LED_ON 0 + +// Following were defines now evaluated by compilation as const variables +// After definitions of associated mapping arrays +extern const uint8_t NUM_DIGITAL; +extern const uint8_t GND; +extern const uint8_t NUM_PWM4; +extern const uint8_t NUM_PWM8; +extern const uint8_t NUM_PWM; +extern const uint8_t NUM_INTERRUPT; +extern const uint8_t NUM_ANALOG_INPUTS; +#define NUM_LEDS 3 +#define NUM_SERIAL 1 +#define NUM_TONE_PINS 4 +#define NUM_TASKS_VARIANT 8 + +// Indicate unit has RTC/Alarm +#define HAS_RTC 1 + +// Defines will be either set by ArduinoIDE in the menu or manually +#ifdef SERIAL_HOSTPC +// Comment out following line to use Serial on pins (board) +#define SERIAL_DEBUG 1 +#elif SERIAL_ONBOARD +// No SERIAL_DEBUG will be defined, kept here for clarity +#else +// Define the SERIAL_DEBUG as default setting +#define SERIAL_DEBUG 1 +#endif + +#define PWM4_TIMER_PERIOD (2041U) // Generate 490Hz @fCCU=1MHz +#define PWM8_TIMER_PERIOD (2041U) // Generate 490Hz @fCCU=1MHz + +#define PCLK 96000000u //PCLK can go to this max value + +#define PIN_SPI_SS 10 +#define PIN_SPI_MOSI 11 +#define PIN_SPI_MISO 12 +#define PIN_SPI_SCK 13 + +#define A0 0 +#define A1 1 +#define A2 2 +#define A3 3 +#define A4 4 +#define A5 5 + +#define AD_AUX_1 22 // AD_AUX +#define AD_AUX_2 23 // AD_AUX +#define AD_AUX_3 24 // AD_AUX +#define AD_AUX_3 25 // AD_AUX +#define AUX_3 26 // AUX + +#define LED1 13 +#define LED2 26 +#define LED3 27 +#define LED_BUILTIN LED1 + +#define EXT_INTR_0 2 +#define EXT_INTR_1 3 + +#define digitalPinToInterrupt(p) ((p) == 2 ? 0 : ((p) == 3 ? 1 : NOT_AN_INTERRUPT)) + +/* Mapping interrupt handlers. Notice that XMC1400 can have interrupt handlers working in 3 modes, the defines below assumes the mode A. + For details refer to assembly file and reference manual. +*/ +// #define USIC0_0_IRQHandler IRQ9_Handler // UART +#define USIC0_0_IRQn IRQ9_IRQn + +#define CCU40_0_IRQHandler IRQ21_Handler // interrupt 0 +#define CCU40_0_IRQn IRQ21_IRQn + +#define CCU40_1_IRQHandler IRQ22_Handler // interrupt 1 +#define CCU40_1_IRQn IRQ22_IRQn + +#define USIC0_4_IRQHandler IRQ13_Handler // I2C +#define USIC0_4_IRQn IRQ13_IRQn + +#define USIC0_5_IRQHandler IRQ14_Handler // I2C +#define USIC0_5_IRQn IRQ14_IRQn + +#ifdef ARDUINO_MAIN //index is arduino pin count +// Mapping of digital pins and comments +const XMC_PORT_PIN_t mapping_port_pin[] = + { + /* 0 */ {XMC_GPIO_PORT1, 2}, // RX P1.2 + /* 1 */ {XMC_GPIO_PORT1, 3}, // TX P1.3 + /* 2 */ {XMC_GPIO_PORT1 , 4}, // External int 0 P1.4 + /* 3 */ {XMC_GPIO_PORT1 , 1}, // External int 1 / PWM40-1 output P1.1 + /* 4 */ {XMC_GPIO_PORT1 , 0}, // PWM40-0 output P1.0 + /* 5 */ {XMC_GPIO_PORT0 , 2}, // GPIO P0.2 + /* 6 */ {XMC_GPIO_PORT0 , 6}, // PWM80-11 output P0.6 + /* 7 */ {XMC_GPIO_PORT0 , 13}, // GPIO P0.13 + /* 8 */ {XMC_GPIO_PORT0 , 12}, // GPIO P0.12 + /* 9 */ {XMC_GPIO_PORT0 , 7}, // PWM80-10 output P0.7 + /* 10 */ {XMC_GPIO_PORT0 , 4}, // SPI-SS P0.4 + /* 11 */ {XMC_GPIO_PORT0 , 1}, // SPI-MOSI P0.1 + /* 12 */ {XMC_GPIO_PORT0 , 0}, // SPI-MISO P0.0 + /* 13 */ {XMC_GPIO_PORT0 , 3}, // SPI-SCK P0.3 + /* 14 */ {XMC_GPIO_PORT2 , 3}, // AREF P2.3 (INPUT ONLY) + /* 15 */ {XMC_GPIO_PORT2 , 6}, // A0 / ADC Input P2.6 (INPUT ONLY) + /* 16 */ {XMC_GPIO_PORT2 , 8}, // A1 / ADC Input P2.8 (INPUT ONLY) + /* 17 */ {XMC_GPIO_PORT2 , 9}, // A2 / ADC Input P2.9 (INPUT ONLY) + /* 18 */ {XMC_GPIO_PORT2 , 10}, // A3 / ADC Input P2.10 + /* 19 */ {XMC_GPIO_PORT2 , 1}, // A4 / I2C Data / Address SDA P2.1 + /* 20 */ {XMC_GPIO_PORT2 , 0}, // A5 / I2C Clock SCL P2.0 + /* 21 */ {XMC_GPIO_PORT2 , 4}, // RESET input ( DO NOT USE as GPIO ) P2.4 (INPUT ONLY) + /* 22 */ {XMC_GPIO_PORT2 , 11}, // GPIO / AD_AUX Additional Pin P2.11 + /* 23 */ {XMC_GPIO_PORT2 , 7}, // GPIO / AD_AUX Additional Pin P2.7 + /* 24 */ {XMC_GPIO_PORT2 , 5}, // GPIO / AD_AUX Additional Pin P2.5 + /* 25 */ {XMC_GPIO_PORT2 , 2}, // GPIO / AD_AUX Additional Pin P2.2 + /* 26 */ {XMC_GPIO_PORT0 , 5}, // GPIO / LED2 P0.5 / AUX + /* 27 */ {XMC_GPIO_PORT1 , 5} // LED3 P1.5 + }; + + +const uint8_t GND = ( sizeof( mapping_port_pin ) / sizeof( XMC_PORT_PIN_t ) ); +const uint8_t NUM_DIGITAL = ( sizeof( mapping_port_pin ) / sizeof( XMC_PORT_PIN_t ) );; + +const XMC_PIN_INTERRUPT_t mapping_interrupt[] = + { + /* 0 */ {CCU40, CCU40_CC40, 0, 0, CCU40_IN0_U0C0_DX2INS}, + /* 1 */ {CCU40, CCU40_CC41, 1, 1, CCU40_IN1_U0C1_DX2INS} + }; +const uint8_t NUM_INTERRUPT = ( sizeof( mapping_interrupt ) / sizeof( XMC_PIN_INTERRUPT_t ) ); + +/* Mapping of Arduino Pins to PWM4 channels as pin and index in PWM4 channel + mapping array XMC_PWM4_t mapping_pwm4[] + last entry 255 for both parts. + Putting both parts in array means if a PWM4 channel gets reassigned for + another function later a gap in channel numbers will not mess things up */ +const uint8_t mapping_pin_PWM4[][ 2 ] = { + { 3, 0 }, + { 4, 1 }, + { 255, 255 } }; + +/* Configurations of PWM channels for CCU4 type */ +XMC_PWM4_t mapping_pwm4[] = + { + {CCU40, CCU40_CC41, 1, mapping_port_pin[3], P1_1_AF_CCU40_OUT1, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 4 + {CCU40, CCU40_CC40, 0, mapping_port_pin[4], P1_0_AF_CCU40_OUT0, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED} // PWM disabled 4 + }; + +const uint8_t NUM_PWM4 = ( sizeof( mapping_pwm4 ) / sizeof( XMC_PWM4_t ) ); + + +/* Mapping in same manner as PWM4 for PWM8 channels */ +const uint8_t mapping_pin_PWM8[][ 2 ] = { + { 6, 1 }, + { 9, 0 }, + { 255, 255 } }; + +/* Configurations of PWM channels for CCU8 type */ +XMC_PWM8_t mapping_pwm8[] = + {{ CCU80, CCU80_CC81, 1, XMC_CCU8_SLICE_COMPARE_CHANNEL_1, mapping_port_pin[ 6 ], P0_6_AF_CCU80_OUT11, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED }, // PWM disabled 6 P0.6 + { CCU80, CCU80_CC81, 1, XMC_CCU8_SLICE_COMPARE_CHANNEL_1, mapping_port_pin[ 9 ], P0_7_AF_CCU80_OUT10, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED } // PWM disabled 9 P0.7 + }; + +const uint8_t NUM_PWM8 = ( sizeof( mapping_pwm8 ) / sizeof( XMC_PWM8_t ) ); +const uint8_t NUM_PWM = ( sizeof( mapping_pwm4 ) / sizeof( XMC_PWM4_t ) ) + + ( sizeof( mapping_pwm8 ) / sizeof( XMC_PWM8_t ) ); + + +/* Analog Pin mappings and configurations */ +// ADC grouping for XMC 1400 series. +XMC_ADC_t mapping_adc[] = + { + { VADC, 0, VADC_G0, 0, 4, DISABLED }, //A0 + { VADC, 1, VADC_G0, 0, 11, DISABLED }, //A1 + { VADC, 2, VADC_G0, 0, 9, DISABLED }, //A2 + { VADC, 3, VADC_G0, 0, 12, DISABLED }, //A3 + { VADC, 5, VADC_G0, 0, 10, DISABLED }, //A4 + { VADC, 6, VADC_G0, 0, 7, DISABLED }, //A5 + // Additional channels added here + { VADC, 4, VADC_G0, 0, 5, DISABLED }, //AUX 22 + { VADC, 1, VADC_G1, 1, 1, DISABLED }, //AUX 23 + { VADC, 7, VADC_G1, 1, 2, DISABLED }, //AUX 24 + { VADC, 7, VADC_G0, 0, 3, DISABLED } //AUX 25 +}; + +const uint8_t NUM_ANALOG_INPUTS = ( sizeof( mapping_adc ) / sizeof( XMC_ADC_t ) ); + +/* + * UART objects + */ +RingBuffer rx_buffer_0; +RingBuffer tx_buffer_0; + +/* First UART channel pins are swapped between debug and normal use */ +XMC_UART_t XMC_UART_0 = + { + .channel = XMC_UART0_CH1, + .rx = { .port = (XMC_GPIO_PORT_t*)PORT1_BASE, +#ifdef SERIAL_DEBUG + .pin = (uint8_t)3 +#else + .pin = (uint8_t)2 +#endif + }, + .rx_config = { .mode = XMC_GPIO_MODE_INPUT_TRISTATE, + .output_level = XMC_GPIO_OUTPUT_LEVEL_HIGH, + .input_hysteresis = XMC_GPIO_INPUT_HYSTERESIS_STANDARD + }, + .tx = { .port = (XMC_GPIO_PORT_t*)PORT1_BASE, +#ifdef SERIAL_DEBUG + .pin = (uint8_t)2 +#else + .pin = (uint8_t)3 +#endif + }, + .tx_config = { .mode = (XMC_GPIO_MODE_t) XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT7, + .output_level = XMC_GPIO_OUTPUT_LEVEL_HIGH, + .input_hysteresis = XMC_GPIO_INPUT_HYSTERESIS_STANDARD + }, +#ifdef SERIAL_DEBUG + .input_source_dx0 = (XMC_USIC_INPUT_t)USIC0_C1_DX0_P1_3, +#else + .input_source_dx0 = (XMC_USIC_INPUT_t)USIC0_C1_DX0_P1_2, +#endif + .input_source_dx1 = XMC_INPUT_INVALID, + .input_source_dx2 = XMC_INPUT_INVALID, + .input_source_dx3 = XMC_INPUT_INVALID, + .irq_num = USIC0_0_IRQn, + .irq_service_request = 0 + }; + +HardwareSerial Serial( &XMC_UART_0, &rx_buffer_0, &tx_buffer_0 ); + +// Serial Interrupt and event handling +#ifdef __cplusplus +extern "C" { +#endif +void serialEventRun( ); +void serialEvent( ) __attribute__((weak)); + + +void serialEventRun( ) +{ +if( serialEvent ) + { + if( Serial.available( ) ) + serialEvent( ); + } +} + + +void USIC0_0_IRQHandler( ) +{ +Serial.IrqHandler( ); +} +#ifdef __cplusplus +} +#endif +#endif /* ARDUINO_MAIN */ + +#ifdef __cplusplus +extern HardwareSerial Serial; +#endif /* cplusplus */ + +#endif // PINS_ARDUINO_H_ From 448f4cefbbe38b8a4fd9c942516d71401bcb23ee Mon Sep 17 00:00:00 2001 From: boramonideep Date: Wed, 15 Jun 2022 11:15:06 +0200 Subject: [PATCH 11/78] corrected mistake in pins_arduino.h - duplicate defines for AD_AUX --- variants/XMC1400/config/XMC1400_Arduino_Kit/pins_arduino.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/variants/XMC1400/config/XMC1400_Arduino_Kit/pins_arduino.h b/variants/XMC1400/config/XMC1400_Arduino_Kit/pins_arduino.h index c3f474bd..c818d83c 100644 --- a/variants/XMC1400/config/XMC1400_Arduino_Kit/pins_arduino.h +++ b/variants/XMC1400/config/XMC1400_Arduino_Kit/pins_arduino.h @@ -86,8 +86,8 @@ extern const uint8_t NUM_ANALOG_INPUTS; #define AD_AUX_1 22 // AD_AUX #define AD_AUX_2 23 // AD_AUX #define AD_AUX_3 24 // AD_AUX -#define AD_AUX_3 25 // AD_AUX -#define AUX_3 26 // AUX +#define AD_AUX_4 25 // AD_AUX +#define AUX_1 26 // AUX #define LED1 13 #define LED2 26 From 9d2d0cf80a3676000f31fb6307803b099f6cfbed Mon Sep 17 00:00:00 2001 From: boramonideep Date: Wed, 15 Jun 2022 13:42:29 +0200 Subject: [PATCH 12/78] certain changes to core to adapt to XMC1400 Kit for Arduino --- libraries/SPI/src/utility/xmc_spi_conf.c | 40 +++++++++++++++++++ libraries/SPI/src/utility/xmc_spi_conf.h | 4 ++ libraries/Wire/src/utility/xmc_i2c_conf.c | 34 ++++++++++++++++ libraries/Wire/src/utility/xmc_i2c_conf.h | 4 ++ .../config/XMC1400_Arduino_Kit/pins_arduino.h | 3 ++ 5 files changed, 85 insertions(+) diff --git a/libraries/SPI/src/utility/xmc_spi_conf.c b/libraries/SPI/src/utility/xmc_spi_conf.c index da24cde3..b7a89a87 100644 --- a/libraries/SPI/src/utility/xmc_spi_conf.c +++ b/libraries/SPI/src/utility/xmc_spi_conf.c @@ -107,6 +107,46 @@ XMC_SPI_t XMC_SPI_0 = } }; +#elif defined(XMC1400_Arduino_Kit) +XMC_SPI_t XMC_SPI_0 = +{ + .channel = XMC_SPI0_CH1, + .channel_config = { + .baudrate = 15984375U, + .bus_mode = (XMC_SPI_CH_BUS_MODE_t)XMC_SPI_CH_BUS_MODE_MASTER, + .selo_inversion = XMC_SPI_CH_SLAVE_SEL_INV_TO_MSLS, + .parity_mode = XMC_USIC_CH_PARITY_MODE_NONE + }, + .mosi = { + .port = (XMC_GPIO_PORT_t*)PORT0_BASE, + .pin = (uint8_t)1 + }, + .mosi_config = { + .mode = XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT9, + .output_level = XMC_GPIO_OUTPUT_LEVEL_HIGH, + .input_hysteresis = XMC_GPIO_INPUT_HYSTERESIS_STANDARD + }, + .miso = { + .port = (XMC_GPIO_PORT_t*)PORT0_BASE, + .pin = (uint8_t)0 + }, + .miso_config = { + .mode = XMC_GPIO_MODE_INPUT_TRISTATE, + .input_hysteresis = XMC_GPIO_INPUT_HYSTERESIS_STANDARD + }, + .input_source = XMC_INPUT_A, + .sclkout = { + .port = (XMC_GPIO_PORT_t*)PORT0_BASE, + .pin = (uint8_t)3 + }, + .sclkout_config = { + .mode = XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT8, + .output_level = XMC_GPIO_OUTPUT_LEVEL_HIGH, + .input_hysteresis = XMC_GPIO_INPUT_HYSTERESIS_STANDARD + } +}; + + #elif defined(XMC4400_Platform2GO) XMC_SPI_t XMC_SPI_0 = { diff --git a/libraries/SPI/src/utility/xmc_spi_conf.h b/libraries/SPI/src/utility/xmc_spi_conf.h index 29207886..2595a681 100644 --- a/libraries/SPI/src/utility/xmc_spi_conf.h +++ b/libraries/SPI/src/utility/xmc_spi_conf.h @@ -60,6 +60,10 @@ extern XMC_SPI_t XMC_SPI_0; #define NUM_SPI 1 extern XMC_SPI_t XMC_SPI_0; +#elif defined(XMC1400_Arduino_Kit) +#define NUM_SPI 1 +extern XMC_SPI_t XMC_SPI_0; + #elif defined(XMC4400_Platform2GO) #define NUM_SPI 1 extern XMC_SPI_t XMC_SPI_0; diff --git a/libraries/Wire/src/utility/xmc_i2c_conf.c b/libraries/Wire/src/utility/xmc_i2c_conf.c index 22b0864e..cb9ff3fe 100644 --- a/libraries/Wire/src/utility/xmc_i2c_conf.c +++ b/libraries/Wire/src/utility/xmc_i2c_conf.c @@ -197,6 +197,40 @@ XMC_I2C_t XMC_I2C_0 = .protocol_irq_service_request = 5 }; +#elif defined(XMC1400_Arduino_Kit) +XMC_I2C_t XMC_I2C_0 = +{ + .channel = XMC_I2C0_CH0, + .channel_config = { + .baudrate = (uint32_t)(100000U), + .address = 0U + }, + .sda = { + .port = (XMC_GPIO_PORT_t*)PORT2_BASE, + .pin = (uint8_t)1 + }, + .sda_config = { + .mode = XMC_GPIO_MODE_OUTPUT_OPEN_DRAIN_ALT6, + .output_level = XMC_GPIO_OUTPUT_LEVEL_HIGH, + .input_hysteresis = XMC_GPIO_INPUT_HYSTERESIS_STANDARD + }, + .scl = { + .port = (XMC_GPIO_PORT_t*)PORT2_BASE, + .pin = (uint8_t)0 + }, + .scl_config = { + .mode = XMC_GPIO_MODE_OUTPUT_OPEN_DRAIN_ALT7, + .output_level = XMC_GPIO_OUTPUT_LEVEL_HIGH, + .input_hysteresis = XMC_GPIO_INPUT_HYSTERESIS_STANDARD + }, + .input_source_dx0 = XMC_INPUT_F, + .input_source_dx1 = XMC_INPUT_E, + .slave_receive_irq_num = (IRQn_Type) USIC0_4_IRQn, + .slave_receive_irq_service_request = 4 , + .protocol_irq_num = (IRQn_Type) USIC0_5_IRQn, + .protocol_irq_service_request = 5 +}; + #elif defined (XMC4400_Platform2GO) XMC_I2C_t XMC_I2C_0 = diff --git a/libraries/Wire/src/utility/xmc_i2c_conf.h b/libraries/Wire/src/utility/xmc_i2c_conf.h index a7d65b94..8edfe33d 100644 --- a/libraries/Wire/src/utility/xmc_i2c_conf.h +++ b/libraries/Wire/src/utility/xmc_i2c_conf.h @@ -64,6 +64,10 @@ extern XMC_I2C_t XMC_I2C_1; #define NUM_I2C 1 extern XMC_I2C_t XMC_I2C_0; +#elif defined(XMC1400_Arduino_Kit) +#define NUM_I2C 1 +extern XMC_I2C_t XMC_I2C_0; + #elif defined(XMC4400_Platform2GO) #define NUM_I2C 1 extern XMC_I2C_t XMC_I2C_0; diff --git a/variants/XMC1400/config/XMC1400_Arduino_Kit/pins_arduino.h b/variants/XMC1400/config/XMC1400_Arduino_Kit/pins_arduino.h index c818d83c..a3ca2b79 100644 --- a/variants/XMC1400/config/XMC1400_Arduino_Kit/pins_arduino.h +++ b/variants/XMC1400/config/XMC1400_Arduino_Kit/pins_arduino.h @@ -117,6 +117,9 @@ extern const uint8_t NUM_ANALOG_INPUTS; #define USIC0_5_IRQHandler IRQ14_Handler // I2C #define USIC0_5_IRQn IRQ14_IRQn +#define SCU_1_IRQHandler IRQ1_Handler //RTC +#define SCU_1_IRQn IRQ1_IRQn + #ifdef ARDUINO_MAIN //index is arduino pin count // Mapping of digital pins and comments const XMC_PORT_PIN_t mapping_port_pin[] = From 0fcbb59df9165619f36164539046fd74308866e2 Mon Sep 17 00:00:00 2001 From: boramonideep Date: Wed, 15 Jun 2022 15:28:18 +0200 Subject: [PATCH 13/78] made changes to DeviceControlXMC library, specific to the XMC1400 series --- libraries/DeviceControlXMC/src/utility/timer.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/libraries/DeviceControlXMC/src/utility/timer.c b/libraries/DeviceControlXMC/src/utility/timer.c index 4c1a3978..e3577d77 100644 --- a/libraries/DeviceControlXMC/src/utility/timer.c +++ b/libraries/DeviceControlXMC/src/utility/timer.c @@ -49,6 +49,8 @@ #include #include +#include "Arduino.h" // since interrupt symbols are defined in pins_arduino.h for XMC 1400 series instead of the device-specific header file (XMC1400.h). + /********************************************************************************************************************* * API IMPLEMENTATION ********************************************************************************************************************/ From fac00caa86f2f2605e2ddaa295d82640dfc4fc86 Mon Sep 17 00:00:00 2001 From: boramonideep Date: Thu, 16 Jun 2022 08:31:17 +0200 Subject: [PATCH 14/78] added UART IRQ handler to pins_arduino.h --- variants/XMC1400/config/XMC1400_Arduino_Kit/pins_arduino.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/variants/XMC1400/config/XMC1400_Arduino_Kit/pins_arduino.h b/variants/XMC1400/config/XMC1400_Arduino_Kit/pins_arduino.h index a3ca2b79..b55eb61c 100644 --- a/variants/XMC1400/config/XMC1400_Arduino_Kit/pins_arduino.h +++ b/variants/XMC1400/config/XMC1400_Arduino_Kit/pins_arduino.h @@ -102,7 +102,7 @@ extern const uint8_t NUM_ANALOG_INPUTS; /* Mapping interrupt handlers. Notice that XMC1400 can have interrupt handlers working in 3 modes, the defines below assumes the mode A. For details refer to assembly file and reference manual. */ -// #define USIC0_0_IRQHandler IRQ9_Handler // UART +#define USIC0_0_IRQHandler IRQ9_Handler // UART #define USIC0_0_IRQn IRQ9_IRQn #define CCU40_0_IRQHandler IRQ21_Handler // interrupt 0 From 17d03ed6351824a9dd368551e86339040f3b9661 Mon Sep 17 00:00:00 2001 From: boramonideep Date: Thu, 16 Jun 2022 09:25:14 +0200 Subject: [PATCH 15/78] added macros to route reset pin into ERU --- cores/Main.cpp | 5 +++-- cores/reset.c | 2 +- variants/XMC1400/config/XMC1400_Arduino_Kit/pins_arduino.h | 3 +++ 3 files changed, 7 insertions(+), 3 deletions(-) diff --git a/cores/Main.cpp b/cores/Main.cpp index 469da4f8..8fa41c7a 100644 --- a/cores/Main.cpp +++ b/cores/Main.cpp @@ -41,8 +41,9 @@ int main(void) */ wiring_time_init(); wiring_analog_init(); -// Initialize the reset pin for the XMC1100 Boot Kit series -#ifdef XMC1100_Boot_Kit +// Initialize the reset pin for the XMC1100 Boot Kit series and XMC1400 Kit for Arduino as they are based on Arduino form-factor +// Hence, a dedicated reset pin is required. +#if defined(XMC1100_Boot_Kit) || defined(XMC1400_Arduino_Kit) reset_init(); #endif diff --git a/cores/reset.c b/cores/reset.c index 2a3434de..b72daddb 100644 --- a/cores/reset.c +++ b/cores/reset.c @@ -26,7 +26,7 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #include -#ifdef XMC1100_Boot_Kit +#if defined(XMC1100_Boot_Kit) || defined(XMC1400_Arduino_Kit) #include #include diff --git a/variants/XMC1400/config/XMC1400_Arduino_Kit/pins_arduino.h b/variants/XMC1400/config/XMC1400_Arduino_Kit/pins_arduino.h index b55eb61c..e8bd00ac 100644 --- a/variants/XMC1400/config/XMC1400_Arduino_Kit/pins_arduino.h +++ b/variants/XMC1400/config/XMC1400_Arduino_Kit/pins_arduino.h @@ -120,6 +120,9 @@ extern const uint8_t NUM_ANALOG_INPUTS; #define SCU_1_IRQHandler IRQ1_Handler //RTC #define SCU_1_IRQn IRQ1_IRQn +#define ERU0_0_IRQHandler IRQ3_Handler // RESET +#define ERU0_0_IRQn IRQ3_IRQn + #ifdef ARDUINO_MAIN //index is arduino pin count // Mapping of digital pins and comments const XMC_PORT_PIN_t mapping_port_pin[] = From 9d25855bcd61a31ea5952108b37d5f1af0007aab Mon Sep 17 00:00:00 2001 From: boramonideep Date: Thu, 23 Jun 2022 09:48:31 +0200 Subject: [PATCH 16/78] swapped P0.5 and P1.4 due to inconsistency on silkscreen --- .../config/XMC1400_Arduino_Kit/pins_arduino.h | 54 +++++++++---------- 1 file changed, 27 insertions(+), 27 deletions(-) diff --git a/variants/XMC1400/config/XMC1400_Arduino_Kit/pins_arduino.h b/variants/XMC1400/config/XMC1400_Arduino_Kit/pins_arduino.h index e8bd00ac..3e93d84f 100644 --- a/variants/XMC1400/config/XMC1400_Arduino_Kit/pins_arduino.h +++ b/variants/XMC1400/config/XMC1400_Arduino_Kit/pins_arduino.h @@ -97,7 +97,7 @@ extern const uint8_t NUM_ANALOG_INPUTS; #define EXT_INTR_0 2 #define EXT_INTR_1 3 -#define digitalPinToInterrupt(p) ((p) == 2 ? 0 : ((p) == 3 ? 1 : NOT_AN_INTERRUPT)) +#define digitalPinToInterrupt(p) ((p) == 26 ? 0 : ((p) == 3 ? 1 : NOT_AN_INTERRUPT)) /* Mapping interrupt handlers. Notice that XMC1400 can have interrupt handlers working in 3 modes, the defines below assumes the mode A. For details refer to assembly file and reference manual. @@ -127,34 +127,34 @@ extern const uint8_t NUM_ANALOG_INPUTS; // Mapping of digital pins and comments const XMC_PORT_PIN_t mapping_port_pin[] = { - /* 0 */ {XMC_GPIO_PORT1, 2}, // RX P1.2 - /* 1 */ {XMC_GPIO_PORT1, 3}, // TX P1.3 - /* 2 */ {XMC_GPIO_PORT1 , 4}, // External int 0 P1.4 - /* 3 */ {XMC_GPIO_PORT1 , 1}, // External int 1 / PWM40-1 output P1.1 - /* 4 */ {XMC_GPIO_PORT1 , 0}, // PWM40-0 output P1.0 - /* 5 */ {XMC_GPIO_PORT0 , 2}, // GPIO P0.2 - /* 6 */ {XMC_GPIO_PORT0 , 6}, // PWM80-11 output P0.6 - /* 7 */ {XMC_GPIO_PORT0 , 13}, // GPIO P0.13 - /* 8 */ {XMC_GPIO_PORT0 , 12}, // GPIO P0.12 - /* 9 */ {XMC_GPIO_PORT0 , 7}, // PWM80-10 output P0.7 - /* 10 */ {XMC_GPIO_PORT0 , 4}, // SPI-SS P0.4 - /* 11 */ {XMC_GPIO_PORT0 , 1}, // SPI-MOSI P0.1 - /* 12 */ {XMC_GPIO_PORT0 , 0}, // SPI-MISO P0.0 - /* 13 */ {XMC_GPIO_PORT0 , 3}, // SPI-SCK P0.3 - /* 14 */ {XMC_GPIO_PORT2 , 3}, // AREF P2.3 (INPUT ONLY) - /* 15 */ {XMC_GPIO_PORT2 , 6}, // A0 / ADC Input P2.6 (INPUT ONLY) - /* 16 */ {XMC_GPIO_PORT2 , 8}, // A1 / ADC Input P2.8 (INPUT ONLY) - /* 17 */ {XMC_GPIO_PORT2 , 9}, // A2 / ADC Input P2.9 (INPUT ONLY) - /* 18 */ {XMC_GPIO_PORT2 , 10}, // A3 / ADC Input P2.10 + /* 0 */ {XMC_GPIO_PORT1, 2}, // RX P1.2 + /* 1 */ {XMC_GPIO_PORT1, 3}, // TX P1.3 + /* 2 */ {XMC_GPIO_PORT0 , 5}, // GPIO / LED2 P0.5 + /* 3 */ {XMC_GPIO_PORT1 , 1}, // External int 1 / PWM40-1 output P1.1 + /* 4 */ {XMC_GPIO_PORT1 , 0}, // PWM40-0 output P1.0 + /* 5 */ {XMC_GPIO_PORT0 , 2}, // GPIO P0.2 + /* 6 */ {XMC_GPIO_PORT0 , 6}, // PWM80-11 output P0.6 + /* 7 */ {XMC_GPIO_PORT0 , 13}, // GPIO P0.13 + /* 8 */ {XMC_GPIO_PORT0 , 12}, // GPIO P0.12 + /* 9 */ {XMC_GPIO_PORT0 , 7}, // PWM80-10 output P0.7 + /* 10 */ {XMC_GPIO_PORT0 , 4}, // SPI-SS P0.4 + /* 11 */ {XMC_GPIO_PORT0 , 1}, // SPI-MOSI P0.1 + /* 12 */ {XMC_GPIO_PORT0 , 0}, // SPI-MISO P0.0 + /* 13 */ {XMC_GPIO_PORT0 , 3}, // SPI-SCK P0.3 + /* 14 */ {XMC_GPIO_PORT2 , 3}, // AREF P2.3 (INPUT ONLY) + /* 15 */ {XMC_GPIO_PORT2 , 6}, // A0 / ADC Input P2.6 (INPUT ONLY) + /* 16 */ {XMC_GPIO_PORT2 , 8}, // A1 / ADC Input P2.8 (INPUT ONLY) + /* 17 */ {XMC_GPIO_PORT2 , 9}, // A2 / ADC Input P2.9 (INPUT ONLY) + /* 18 */ {XMC_GPIO_PORT2 , 10}, // A3 / ADC Input P2.10 /* 19 */ {XMC_GPIO_PORT2 , 1}, // A4 / I2C Data / Address SDA P2.1 /* 20 */ {XMC_GPIO_PORT2 , 0}, // A5 / I2C Clock SCL P2.0 - /* 21 */ {XMC_GPIO_PORT2 , 4}, // RESET input ( DO NOT USE as GPIO ) P2.4 (INPUT ONLY) - /* 22 */ {XMC_GPIO_PORT2 , 11}, // GPIO / AD_AUX Additional Pin P2.11 - /* 23 */ {XMC_GPIO_PORT2 , 7}, // GPIO / AD_AUX Additional Pin P2.7 - /* 24 */ {XMC_GPIO_PORT2 , 5}, // GPIO / AD_AUX Additional Pin P2.5 - /* 25 */ {XMC_GPIO_PORT2 , 2}, // GPIO / AD_AUX Additional Pin P2.2 - /* 26 */ {XMC_GPIO_PORT0 , 5}, // GPIO / LED2 P0.5 / AUX - /* 27 */ {XMC_GPIO_PORT1 , 5} // LED3 P1.5 + /* 21 */ {XMC_GPIO_PORT2 , 4}, // RESET input ( DO NOT USE as GPIO ) P2.4 (INPUT ONLY) + /* 22 */ {XMC_GPIO_PORT2 , 11}, // GPIO / AD_AUX Additional Pin P2.11 + /* 23 */ {XMC_GPIO_PORT2 , 7}, // GPIO / AD_AUX Additional Pin P2.7 + /* 24 */ {XMC_GPIO_PORT2 , 5}, // GPIO / AD_AUX Additional Pin P2.5 + /* 25 */ {XMC_GPIO_PORT2 , 2}, // GPIO / AD_AUX Additional Pin P2.2 + /* 26 */ {XMC_GPIO_PORT1 , 4}, // External int 0 P1.4 + /* 27 */ {XMC_GPIO_PORT1 , 5} // LED3 P1.5 }; From fac2adf01809503e2b4414226b79dc56405c3232 Mon Sep 17 00:00:00 2001 From: boramonideep Date: Thu, 23 Jun 2022 14:23:37 +0200 Subject: [PATCH 17/78] all PWM outputs from CCU4 --- .../config/XMC1400_Arduino_Kit/pins_arduino.h | 31 ++++++------------- 1 file changed, 9 insertions(+), 22 deletions(-) diff --git a/variants/XMC1400/config/XMC1400_Arduino_Kit/pins_arduino.h b/variants/XMC1400/config/XMC1400_Arduino_Kit/pins_arduino.h index 3e93d84f..dc3d8f2f 100644 --- a/variants/XMC1400/config/XMC1400_Arduino_Kit/pins_arduino.h +++ b/variants/XMC1400/config/XMC1400_Arduino_Kit/pins_arduino.h @@ -67,7 +67,6 @@ extern const uint8_t NUM_ANALOG_INPUTS; #endif #define PWM4_TIMER_PERIOD (2041U) // Generate 490Hz @fCCU=1MHz -#define PWM8_TIMER_PERIOD (2041U) // Generate 490Hz @fCCU=1MHz #define PCLK 96000000u //PCLK can go to this max value @@ -94,7 +93,7 @@ extern const uint8_t NUM_ANALOG_INPUTS; #define LED3 27 #define LED_BUILTIN LED1 -#define EXT_INTR_0 2 +#define EXT_INTR_0 26 #define EXT_INTR_1 3 #define digitalPinToInterrupt(p) ((p) == 26 ? 0 : ((p) == 3 ? 1 : NOT_AN_INTERRUPT)) @@ -133,10 +132,10 @@ const XMC_PORT_PIN_t mapping_port_pin[] = /* 3 */ {XMC_GPIO_PORT1 , 1}, // External int 1 / PWM40-1 output P1.1 /* 4 */ {XMC_GPIO_PORT1 , 0}, // PWM40-0 output P1.0 /* 5 */ {XMC_GPIO_PORT0 , 2}, // GPIO P0.2 - /* 6 */ {XMC_GPIO_PORT0 , 6}, // PWM80-11 output P0.6 + /* 6 */ {XMC_GPIO_PORT0 , 6}, // PWM41-0 output P0.6 /* 7 */ {XMC_GPIO_PORT0 , 13}, // GPIO P0.13 /* 8 */ {XMC_GPIO_PORT0 , 12}, // GPIO P0.12 - /* 9 */ {XMC_GPIO_PORT0 , 7}, // PWM80-10 output P0.7 + /* 9 */ {XMC_GPIO_PORT0 , 7}, // PWM40-1 output P0.7 /* 10 */ {XMC_GPIO_PORT0 , 4}, // SPI-SS P0.4 /* 11 */ {XMC_GPIO_PORT0 , 1}, // SPI-MOSI P0.1 /* 12 */ {XMC_GPIO_PORT0 , 0}, // SPI-MISO P0.0 @@ -176,33 +175,21 @@ const uint8_t NUM_INTERRUPT = ( sizeof( mapping_interrupt ) / sizeof( XMC_PIN_IN const uint8_t mapping_pin_PWM4[][ 2 ] = { { 3, 0 }, { 4, 1 }, + { 6, 2 }, + { 9, 3 }, { 255, 255 } }; /* Configurations of PWM channels for CCU4 type */ XMC_PWM4_t mapping_pwm4[] = { {CCU40, CCU40_CC41, 1, mapping_port_pin[3], P1_1_AF_CCU40_OUT1, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 4 - {CCU40, CCU40_CC40, 0, mapping_port_pin[4], P1_0_AF_CCU40_OUT0, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED} // PWM disabled 4 + {CCU40, CCU40_CC40, 0, mapping_port_pin[4], P1_0_AF_CCU40_OUT0, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 4 + {CCU41, CCU41_CC40, 0, mapping_port_pin[6], P0_6_AF_CCU41_OUT0, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 4 + {CCU40, CCU40_CC41, 1, mapping_port_pin[9], P0_7_AF_CCU40_OUT1, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED} // PWM disabled 4 }; const uint8_t NUM_PWM4 = ( sizeof( mapping_pwm4 ) / sizeof( XMC_PWM4_t ) ); - - -/* Mapping in same manner as PWM4 for PWM8 channels */ -const uint8_t mapping_pin_PWM8[][ 2 ] = { - { 6, 1 }, - { 9, 0 }, - { 255, 255 } }; - -/* Configurations of PWM channels for CCU8 type */ -XMC_PWM8_t mapping_pwm8[] = - {{ CCU80, CCU80_CC81, 1, XMC_CCU8_SLICE_COMPARE_CHANNEL_1, mapping_port_pin[ 6 ], P0_6_AF_CCU80_OUT11, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED }, // PWM disabled 6 P0.6 - { CCU80, CCU80_CC81, 1, XMC_CCU8_SLICE_COMPARE_CHANNEL_1, mapping_port_pin[ 9 ], P0_7_AF_CCU80_OUT10, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED } // PWM disabled 9 P0.7 - }; - -const uint8_t NUM_PWM8 = ( sizeof( mapping_pwm8 ) / sizeof( XMC_PWM8_t ) ); -const uint8_t NUM_PWM = ( sizeof( mapping_pwm4 ) / sizeof( XMC_PWM4_t ) ) - + ( sizeof( mapping_pwm8 ) / sizeof( XMC_PWM8_t ) ); +const uint8_t NUM_PWM = ( sizeof( mapping_pwm4 ) / sizeof( XMC_PWM4_t ) ); /* Analog Pin mappings and configurations */ From 7af49b616d94b26e209cb10cb58951d9fbe30d32 Mon Sep 17 00:00:00 2001 From: boramonideep Date: Thu, 23 Jun 2022 15:43:20 +0200 Subject: [PATCH 18/78] further adjustments --- variants/XMC1400/config/XMC1400_Arduino_Kit/pins_arduino.h | 1 - 1 file changed, 1 deletion(-) diff --git a/variants/XMC1400/config/XMC1400_Arduino_Kit/pins_arduino.h b/variants/XMC1400/config/XMC1400_Arduino_Kit/pins_arduino.h index dc3d8f2f..8c4403af 100644 --- a/variants/XMC1400/config/XMC1400_Arduino_Kit/pins_arduino.h +++ b/variants/XMC1400/config/XMC1400_Arduino_Kit/pins_arduino.h @@ -43,7 +43,6 @@ extern const uint8_t NUM_DIGITAL; extern const uint8_t GND; extern const uint8_t NUM_PWM4; -extern const uint8_t NUM_PWM8; extern const uint8_t NUM_PWM; extern const uint8_t NUM_INTERRUPT; extern const uint8_t NUM_ANALOG_INPUTS; From d69d7ba23adfeda4ada3de56d0a44f0a0595e457 Mon Sep 17 00:00:00 2001 From: boramonideep Date: Fri, 24 Jun 2022 14:11:00 +0200 Subject: [PATCH 19/78] fixed bug in ADC channel mappings --- variants/XMC1400/config/XMC1400_Arduino_Kit/pins_arduino.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/variants/XMC1400/config/XMC1400_Arduino_Kit/pins_arduino.h b/variants/XMC1400/config/XMC1400_Arduino_Kit/pins_arduino.h index 8c4403af..8f1866f8 100644 --- a/variants/XMC1400/config/XMC1400_Arduino_Kit/pins_arduino.h +++ b/variants/XMC1400/config/XMC1400_Arduino_Kit/pins_arduino.h @@ -199,8 +199,8 @@ XMC_ADC_t mapping_adc[] = { VADC, 1, VADC_G0, 0, 11, DISABLED }, //A1 { VADC, 2, VADC_G0, 0, 9, DISABLED }, //A2 { VADC, 3, VADC_G0, 0, 12, DISABLED }, //A3 - { VADC, 5, VADC_G0, 0, 10, DISABLED }, //A4 - { VADC, 6, VADC_G0, 0, 7, DISABLED }, //A5 + { VADC, 6, VADC_G0, 0, 7, DISABLED }, //A4 + { VADC, 5, VADC_G0, 0, 10, DISABLED }, //A5 // Additional channels added here { VADC, 4, VADC_G0, 0, 5, DISABLED }, //AUX 22 { VADC, 1, VADC_G1, 1, 1, DISABLED }, //AUX 23 From 90b6aa32b88a212273b674b43234fe642185159f Mon Sep 17 00:00:00 2001 From: boramonideep Date: Fri, 24 Jun 2022 15:54:45 +0200 Subject: [PATCH 20/78] fixed AD_AUX channels --- .../XMC1400/config/XMC1400_Arduino_Kit/pins_arduino.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/variants/XMC1400/config/XMC1400_Arduino_Kit/pins_arduino.h b/variants/XMC1400/config/XMC1400_Arduino_Kit/pins_arduino.h index 8f1866f8..88985f16 100644 --- a/variants/XMC1400/config/XMC1400_Arduino_Kit/pins_arduino.h +++ b/variants/XMC1400/config/XMC1400_Arduino_Kit/pins_arduino.h @@ -81,10 +81,10 @@ extern const uint8_t NUM_ANALOG_INPUTS; #define A4 4 #define A5 5 -#define AD_AUX_1 22 // AD_AUX -#define AD_AUX_2 23 // AD_AUX -#define AD_AUX_3 24 // AD_AUX -#define AD_AUX_4 25 // AD_AUX +#define AD_AUX_1 6 // AD_AUX +#define AD_AUX_2 7 // AD_AUX +#define AD_AUX_3 8 // AD_AUX +#define AD_AUX_4 9 // AD_AUX #define AUX_1 26 // AUX #define LED1 13 From b58769ae32b7e6ab202e92141f5ca3a9fb327326 Mon Sep 17 00:00:00 2001 From: boramonideep Date: Tue, 28 Jun 2022 15:11:28 +0200 Subject: [PATCH 21/78] fixed SPI USIC channel config --- libraries/SPI/src/utility/xmc_spi_conf.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/libraries/SPI/src/utility/xmc_spi_conf.c b/libraries/SPI/src/utility/xmc_spi_conf.c index b7a89a87..6e95be16 100644 --- a/libraries/SPI/src/utility/xmc_spi_conf.c +++ b/libraries/SPI/src/utility/xmc_spi_conf.c @@ -110,7 +110,7 @@ XMC_SPI_t XMC_SPI_0 = #elif defined(XMC1400_Arduino_Kit) XMC_SPI_t XMC_SPI_0 = { - .channel = XMC_SPI0_CH1, + .channel = XMC_SPI1_CH1, .channel_config = { .baudrate = 15984375U, .bus_mode = (XMC_SPI_CH_BUS_MODE_t)XMC_SPI_CH_BUS_MODE_MASTER, From 755e1bcfee7e6875b3eb37b1197edecded2b5c3d Mon Sep 17 00:00:00 2001 From: boramonideep Date: Tue, 28 Jun 2022 16:10:03 +0200 Subject: [PATCH 22/78] swapped INT0 and INT1 to maintain sequence --- .../config/XMC1400_Arduino_Kit/pins_arduino.h | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/variants/XMC1400/config/XMC1400_Arduino_Kit/pins_arduino.h b/variants/XMC1400/config/XMC1400_Arduino_Kit/pins_arduino.h index 88985f16..95c7671a 100644 --- a/variants/XMC1400/config/XMC1400_Arduino_Kit/pins_arduino.h +++ b/variants/XMC1400/config/XMC1400_Arduino_Kit/pins_arduino.h @@ -92,10 +92,10 @@ extern const uint8_t NUM_ANALOG_INPUTS; #define LED3 27 #define LED_BUILTIN LED1 -#define EXT_INTR_0 26 -#define EXT_INTR_1 3 +#define EXT_INTR_0 3 +#define EXT_INTR_1 26 -#define digitalPinToInterrupt(p) ((p) == 26 ? 0 : ((p) == 3 ? 1 : NOT_AN_INTERRUPT)) +#define digitalPinToInterrupt(p) ((p) == 3 ? 0 : ((p) == 26 ? 1 : NOT_AN_INTERRUPT)) /* Mapping interrupt handlers. Notice that XMC1400 can have interrupt handlers working in 3 modes, the defines below assumes the mode A. For details refer to assembly file and reference manual. @@ -103,10 +103,10 @@ extern const uint8_t NUM_ANALOG_INPUTS; #define USIC0_0_IRQHandler IRQ9_Handler // UART #define USIC0_0_IRQn IRQ9_IRQn -#define CCU40_0_IRQHandler IRQ21_Handler // interrupt 0 +#define CCU40_0_IRQHandler IRQ21_Handler // interrupt 1 #define CCU40_0_IRQn IRQ21_IRQn -#define CCU40_1_IRQHandler IRQ22_Handler // interrupt 1 +#define CCU40_1_IRQHandler IRQ22_Handler // interrupt 0 #define CCU40_1_IRQn IRQ22_IRQn #define USIC0_4_IRQHandler IRQ13_Handler // I2C @@ -128,7 +128,7 @@ const XMC_PORT_PIN_t mapping_port_pin[] = /* 0 */ {XMC_GPIO_PORT1, 2}, // RX P1.2 /* 1 */ {XMC_GPIO_PORT1, 3}, // TX P1.3 /* 2 */ {XMC_GPIO_PORT0 , 5}, // GPIO / LED2 P0.5 - /* 3 */ {XMC_GPIO_PORT1 , 1}, // External int 1 / PWM40-1 output P1.1 + /* 3 */ {XMC_GPIO_PORT1 , 1}, // External int 0 / PWM40-1 output P1.1 /* 4 */ {XMC_GPIO_PORT1 , 0}, // PWM40-0 output P1.0 /* 5 */ {XMC_GPIO_PORT0 , 2}, // GPIO P0.2 /* 6 */ {XMC_GPIO_PORT0 , 6}, // PWM41-0 output P0.6 @@ -151,7 +151,7 @@ const XMC_PORT_PIN_t mapping_port_pin[] = /* 23 */ {XMC_GPIO_PORT2 , 7}, // GPIO / AD_AUX Additional Pin P2.7 /* 24 */ {XMC_GPIO_PORT2 , 5}, // GPIO / AD_AUX Additional Pin P2.5 /* 25 */ {XMC_GPIO_PORT2 , 2}, // GPIO / AD_AUX Additional Pin P2.2 - /* 26 */ {XMC_GPIO_PORT1 , 4}, // External int 0 P1.4 + /* 26 */ {XMC_GPIO_PORT1 , 4}, // External int 1 P1.4 /* 27 */ {XMC_GPIO_PORT1 , 5} // LED3 P1.5 }; @@ -161,8 +161,8 @@ const uint8_t NUM_DIGITAL = ( sizeof( mapping_port_pin ) / sizeof( XMC_PORT_PIN_ const XMC_PIN_INTERRUPT_t mapping_interrupt[] = { - /* 0 */ {CCU40, CCU40_CC40, 0, 0, CCU40_IN0_U0C0_DX2INS}, - /* 1 */ {CCU40, CCU40_CC41, 1, 1, CCU40_IN1_U0C1_DX2INS} + /* 0 */ {CCU40, CCU40_CC41, 1, 1, CCU40_IN1_U0C1_DX2INS}, + /* 1 */ {CCU40, CCU40_CC40, 0, 0, CCU40_IN0_U0C0_DX2INS} }; const uint8_t NUM_INTERRUPT = ( sizeof( mapping_interrupt ) / sizeof( XMC_PIN_INTERRUPT_t ) ); From cf887a2f3fb74df0f72e43a993a8b7732da9e12b Mon Sep 17 00:00:00 2001 From: boramonideep Date: Tue, 28 Jun 2022 16:15:04 +0200 Subject: [PATCH 23/78] added CI/CD checks for XMC1400 Kit for Arduino board for compiling all examples --- .github/workflows/compile-platform-examples.yml | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/.github/workflows/compile-platform-examples.yml b/.github/workflows/compile-platform-examples.yml index 63e9f7c7..8b3fe6e1 100644 --- a/.github/workflows/compile-platform-examples.yml +++ b/.github/workflows/compile-platform-examples.yml @@ -97,6 +97,16 @@ jobs: multiSerial: true dma: true alarmRtc: true + - fqbn: Infineon:arm:XMC1400_Arduino_Kit + i2s: false + dieTemp: true + heapMem: true + sleep1100: true + sleep4700 : false + stackMem: false + multiSerial: false + dma: false + alarmRtc: false # Make board type-specific customizations to the matrix jobs include: From 2f5d26064d1b0b130df10f809d3227521470b38b Mon Sep 17 00:00:00 2001 From: boramonideep Date: Mon, 4 Jul 2022 16:21:10 +0200 Subject: [PATCH 24/78] changes from review comments --- cores/WInterrupts.c | 8 +------ cores/reset.c | 2 +- cores/reset.h | 2 -- .../config/XMC1400_Arduino_Kit/pins_arduino.h | 23 ++++++++++++------- 4 files changed, 17 insertions(+), 18 deletions(-) diff --git a/cores/WInterrupts.c b/cores/WInterrupts.c index 3201647e..07ffaebf 100644 --- a/cores/WInterrupts.c +++ b/cores/WInterrupts.c @@ -140,13 +140,7 @@ void attachInterrupt(uint32_t interrupt_num, interrupt_cb_t callback, uint32_t m if (pin_irq.irq_num == 0) { -#if defined(XMC1100_Boot_Kit) - /* P1_4 external interrupt goes through USIC to CCU4 */ - XMC_USIC_CH_Enable(XMC_USIC0_CH0); - XMC_USIC_CH_SetInputSource(XMC_USIC0_CH0, XMC_USIC_CH_INPUT_DX5, USIC0_C0_DX5_P1_4); - XMC_USIC_CH_SetInputSource(XMC_USIC0_CH0, XMC_USIC_CH_INPUT_DX2, USIC0_C0_DX2_DX5INS); -#endif -#if defined(XMC1400_Arduino_Kit) +#if defined(XMC1100_Boot_Kit) || defined(XMC1400_Arduino_Kit) /* P1_4 external interrupt goes through USIC to CCU4 */ XMC_USIC_CH_Enable(XMC_USIC0_CH0); XMC_USIC_CH_SetInputSource(XMC_USIC0_CH0, XMC_USIC_CH_INPUT_DX5, USIC0_C0_DX5_P1_4); diff --git a/cores/reset.c b/cores/reset.c index b72daddb..172171af 100644 --- a/cores/reset.c +++ b/cores/reset.c @@ -25,7 +25,7 @@ * WHETHER IN CONTRACT, STRICT LIABILITY,OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -#include +#include #if defined(XMC1100_Boot_Kit) || defined(XMC1400_Arduino_Kit) #include #include diff --git a/cores/reset.h b/cores/reset.h index ab9677e4..1ebd26be 100644 --- a/cores/reset.h +++ b/cores/reset.h @@ -29,8 +29,6 @@ #ifndef Reset_h #define Reset_h -#include - //**************************************************************************** // @External Prototypes //**************************************************************************** diff --git a/variants/XMC1400/config/XMC1400_Arduino_Kit/pins_arduino.h b/variants/XMC1400/config/XMC1400_Arduino_Kit/pins_arduino.h index 95c7671a..497ff15b 100644 --- a/variants/XMC1400/config/XMC1400_Arduino_Kit/pins_arduino.h +++ b/variants/XMC1400/config/XMC1400_Arduino_Kit/pins_arduino.h @@ -80,15 +80,22 @@ extern const uint8_t NUM_ANALOG_INPUTS; #define A3 3 #define A4 4 #define A5 5 +//duplicate defines for AD_AUX_n +#define A6 6 +#define A7 7 +#define A8 8 +#define A9 9 + #define AD_AUX_1 6 // AD_AUX #define AD_AUX_2 7 // AD_AUX #define AD_AUX_3 8 // AD_AUX #define AD_AUX_4 9 // AD_AUX + #define AUX_1 26 // AUX #define LED1 13 -#define LED2 26 +#define LED2 2 #define LED3 27 #define LED_BUILTIN LED1 @@ -127,7 +134,7 @@ const XMC_PORT_PIN_t mapping_port_pin[] = { /* 0 */ {XMC_GPIO_PORT1, 2}, // RX P1.2 /* 1 */ {XMC_GPIO_PORT1, 3}, // TX P1.3 - /* 2 */ {XMC_GPIO_PORT0 , 5}, // GPIO / LED2 P0.5 + /* 2 */ {XMC_GPIO_PORT0 , 5}, // GPIO / LED2 output P0.5 /* 3 */ {XMC_GPIO_PORT1 , 1}, // External int 0 / PWM40-1 output P1.1 /* 4 */ {XMC_GPIO_PORT1 , 0}, // PWM40-0 output P1.0 /* 5 */ {XMC_GPIO_PORT0 , 2}, // GPIO P0.2 @@ -139,7 +146,7 @@ const XMC_PORT_PIN_t mapping_port_pin[] = /* 11 */ {XMC_GPIO_PORT0 , 1}, // SPI-MOSI P0.1 /* 12 */ {XMC_GPIO_PORT0 , 0}, // SPI-MISO P0.0 /* 13 */ {XMC_GPIO_PORT0 , 3}, // SPI-SCK P0.3 - /* 14 */ {XMC_GPIO_PORT2 , 3}, // AREF P2.3 (INPUT ONLY) + /* 14 */ {XMC_GPIO_PORT2 , 3}, // AREF * DO NOT USE as GPIO or REF ** P2.3 (INPUT ONLY) /* 15 */ {XMC_GPIO_PORT2 , 6}, // A0 / ADC Input P2.6 (INPUT ONLY) /* 16 */ {XMC_GPIO_PORT2 , 8}, // A1 / ADC Input P2.8 (INPUT ONLY) /* 17 */ {XMC_GPIO_PORT2 , 9}, // A2 / ADC Input P2.9 (INPUT ONLY) @@ -147,12 +154,12 @@ const XMC_PORT_PIN_t mapping_port_pin[] = /* 19 */ {XMC_GPIO_PORT2 , 1}, // A4 / I2C Data / Address SDA P2.1 /* 20 */ {XMC_GPIO_PORT2 , 0}, // A5 / I2C Clock SCL P2.0 /* 21 */ {XMC_GPIO_PORT2 , 4}, // RESET input ( DO NOT USE as GPIO ) P2.4 (INPUT ONLY) - /* 22 */ {XMC_GPIO_PORT2 , 11}, // GPIO / AD_AUX Additional Pin P2.11 - /* 23 */ {XMC_GPIO_PORT2 , 7}, // GPIO / AD_AUX Additional Pin P2.7 - /* 24 */ {XMC_GPIO_PORT2 , 5}, // GPIO / AD_AUX Additional Pin P2.5 - /* 25 */ {XMC_GPIO_PORT2 , 2}, // GPIO / AD_AUX Additional Pin P2.2 + /* 22 */ {XMC_GPIO_PORT2 , 11}, // GPIO / AD_AUX_1 Additional Pin P2.11 + /* 23 */ {XMC_GPIO_PORT2 , 7}, // GPIO / AD_AUX_2 Additional Pin P2.7 + /* 24 */ {XMC_GPIO_PORT2 , 5}, // GPIO / AD_AUX_3 Additional Pin P2.5 + /* 25 */ {XMC_GPIO_PORT2 , 2}, // GPIO / AD_AUX_4 Additional Pin P2.2 /* 26 */ {XMC_GPIO_PORT1 , 4}, // External int 1 P1.4 - /* 27 */ {XMC_GPIO_PORT1 , 5} // LED3 P1.5 + /* 27 */ {XMC_GPIO_PORT1 , 5} // LED3 output P1.5 }; From 1aae745a4ebdb19f51a46e82587a19e6cc9edc18 Mon Sep 17 00:00:00 2001 From: boramonideep Date: Thu, 7 Jul 2022 11:15:28 +0200 Subject: [PATCH 25/78] resolved issues with PWM4 and PWM8 --- cores/wiring_analog.c | 4 +-- .../config/XMC4400_Platform2GO/pins_arduino.h | 33 +++++++++---------- 2 files changed, 17 insertions(+), 20 deletions(-) diff --git a/cores/wiring_analog.c b/cores/wiring_analog.c index 643d4a3d..5fc4b102 100644 --- a/cores/wiring_analog.c +++ b/cores/wiring_analog.c @@ -295,7 +295,7 @@ if( ( resource = scan_map_table( mapping_pin_PWM4, pin ) ) >= 0 ) ( XMC_GPIO_MODE_OUTPUT_PUSH_PULL | pwm4->port_mode ) ); XMC_CCU4_SLICE_StartTimer( pwm4->slice ); } -#ifdef CCU8V2 +#if defined(CCU8V2) || defined(CCU8V1) else if( ( resource = scan_map_table( mapping_pin_PWM8, pin ) ) >= 0 ) { @@ -391,7 +391,7 @@ if( frequency < PCLK ) } ret = 0; } -#ifdef CCU8V2 +#if defined (CCU8V2) || defined (CCU8V1) else if ( ( resource = scan_map_table( mapping_pin_PWM8, pin ) ) >= 0 ) { diff --git a/variants/XMC4400/config/XMC4400_Platform2GO/pins_arduino.h b/variants/XMC4400/config/XMC4400_Platform2GO/pins_arduino.h index 74dadc1c..0c3bca0e 100644 --- a/variants/XMC4400/config/XMC4400_Platform2GO/pins_arduino.h +++ b/variants/XMC4400/config/XMC4400_Platform2GO/pins_arduino.h @@ -117,7 +117,7 @@ const XMC_PORT_PIN_t mapping_port_pin[]= /* 8 */ {XMC_GPIO_PORT4, 1}, // GPIO P4.1 /* 9 */ {XMC_GPIO_PORT0, 11}, // PWM80-31 output / PWM3 P0.11 /* 10 */ {XMC_GPIO_PORT0, 2}, // SPI-SS / PWM80-01 / PWM4 P0.2 - /* 11 */ {XMC_GPIO_PORT1, 9}, // SPI-MOSI / PWM41-2 / PWM5 P1.9 + /* 11 */ {XMC_GPIO_PORT1, 9}, // SPI-MOSI P1.9 /* 12 */ {XMC_GPIO_PORT0, 0}, // SPI-MISO P0.0 /* 13 */ {XMC_GPIO_PORT1, 8}, // SPI-SCK P1.8 /* 14 */ {XMC_GPIO_PORT2, 3}, // AREF TODO: P2.3 @@ -225,11 +225,10 @@ const uint8_t mapping_pin_PWM4[][ 2 ] = { { 3, 0 }, // PWM0 { 5, 1 }, // PWM1 { 6, 2 }, // PWM2 - { 11, 3 }, // PWM5 - { 27, 4 }, // PWM - { 28, 5 }, // PWM - { 57, 6 }, // PWM - { 58, 7 }, // PWM + { 27, 3 }, // PWM + { 28, 4 }, // PWM + { 57, 5 }, // PWM + { 58, 6 }, // PWM { 255, 255 } }; /* Configurations of PWM channels for CCU4 type */ @@ -243,7 +242,7 @@ XMC_PWM4_t mapping_pwm4[] = {CCU41, CCU41_CC41, 1, mapping_port_pin[27], P2_4_AF_CCU41_OUT1, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 27 P2.4 {CCU41, CCU41_CC43, 3, mapping_port_pin[28], P2_2_AF_CCU41_OUT3, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 28 P2.2 {CCU41, CCU41_CC42, 2, mapping_port_pin[57], P2_3_AF_CCU41_OUT2, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 57 P2.3 - {CCU41, CCU41_CC41, 0, mapping_port_pin[58], P2_5_AF_CCU41_OUT0, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 58 P2.5 + {CCU41, CCU41_CC40, 0, mapping_port_pin[58], P2_5_AF_CCU41_OUT0, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 58 P2.5 }; const uint8_t NUM_PWM4 = ( sizeof( mapping_pwm4 ) / sizeof( XMC_PWM4_t ) ); @@ -263,20 +262,18 @@ const uint8_t mapping_pin_PWM8[][ 2 ] = { /* Configurations of PWM channels for CCU8 type */ XMC_PWM8_t mapping_pwm8[] = { - {CCU80, CCU80_CC83, 3, XMC_CCU8_SLICE_COMPARE_CHANNEL_2, mapping_port_pin[9], P0_11_AF_CCU80_OUT31, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 9 P0.11 - {CCU80, CCU80_CC80, 0, XMC_CCU8_SLICE_COMPARE_CHANNEL_2, mapping_port_pin[10], P0_2_AF_CCU80_OUT01, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 10 P0.2 - + {CCU80, CCU80_CC83, 3, XMC_CCU8_SLICE_COMPARE_CHANNEL_1, mapping_port_pin[9], P0_11_AF_CCU80_OUT31, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 9 P0.11 + {CCU80, CCU80_CC80, 0, XMC_CCU8_SLICE_COMPARE_CHANNEL_1, mapping_port_pin[10], P0_2_AF_CCU80_OUT01, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 10 P0.2 //additional pwm outputs starting here - {CCU80, CCU80_CC80, 0, XMC_CCU8_SLICE_COMPARE_CHANNEL_1, mapping_port_pin[55], P2_7_AF_CCU80_OUT03, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 55 P2.7 - {CCU80, CCU80_CC81, 1, XMC_CCU8_SLICE_COMPARE_CHANNEL_1, mapping_port_pin[86], P0_9_AF_CCU80_OUT12, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 86 P0.9 + {CCU80, CCU80_CC83, 3, XMC_CCU8_SLICE_COMPARE_CHANNEL_2, mapping_port_pin[26], P2_8_AF_CCU80_OUT32, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 26 P2.8 + {CCU81, CCU81_CC82, 2, XMC_CCU8_SLICE_COMPARE_CHANNEL_1, mapping_port_pin[29], P2_0_AF_CCU81_OUT21, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 29 P2.0 {CCU80, CCU80_CC81, 1, XMC_CCU8_SLICE_COMPARE_CHANNEL_2, mapping_port_pin[30], P2_6_AF_CCU80_OUT13, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 30 P2.6 - {CCU80, CCU80_CC82, 2, XMC_CCU8_SLICE_COMPARE_CHANNEL_1, mapping_port_pin[59], P2_9_AF_CCU80_OUT22, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 59 P2.9 - {CCU80, CCU80_CC83, 3, XMC_CCU8_SLICE_COMPARE_CHANNEL_1, mapping_port_pin[26], P2_8_AF_CCU80_OUT32, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 26 P2.8 - {CCU81, CCU81_CC80, 0, XMC_CCU8_SLICE_COMPARE_CHANNEL_1, mapping_port_pin[54], P5_7_AF_CCU81_OUT02, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 54 P5.7 - {CCU81, CCU81_CC82, 1, XMC_CCU8_SLICE_COMPARE_CHANNEL_2, mapping_port_pin[29], P2_0_AF_CCU81_OUT21, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED} // PWM disabled 29 P2.0 -/* {CCU81, CCU81_CC81, 1, XMC_CCU8_SLICE_COMPARE_CHANNEL_2, mapping_port_pin[82], P5_5_AF_CCU81_OUT12, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 82 P5.5 - {CCU81, CCU81_CC82, 2, XMC_CCU8_SLICE_COMPARE_CHANNEL_2, mapping_port_pin[81], P5_3_AF_CCU81_OUT22, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED} // PWM disabled 81 P5.3*/ + {CCU81, CCU81_CC80, 0, XMC_CCU8_SLICE_COMPARE_CHANNEL_2, mapping_port_pin[54], P5_7_AF_CCU81_OUT02, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 54 P5.7 + {CCU80, CCU80_CC80, 0, XMC_CCU8_SLICE_COMPARE_CHANNEL_2, mapping_port_pin[55], P2_7_AF_CCU80_OUT03, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 55 P2.7 + {CCU80, CCU80_CC82, 2, XMC_CCU8_SLICE_COMPARE_CHANNEL_2, mapping_port_pin[59], P2_9_AF_CCU80_OUT22, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 59 P2.9 + {CCU80, CCU80_CC81, 1, XMC_CCU8_SLICE_COMPARE_CHANNEL_2, mapping_port_pin[86], P0_9_AF_CCU80_OUT12, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED} // PWM disabled 86 P0.9 }; + const uint8_t NUM_PWM8 = ( sizeof( mapping_pwm8 ) / sizeof( XMC_PWM8_t ) ); const uint8_t NUM_PWM = ( sizeof( mapping_pwm4 ) / sizeof( XMC_PWM4_t ) ) + ( sizeof( mapping_pwm8 ) / sizeof( XMC_PWM8_t ) ); From e9e1b60524b4fc0c92369d4cb76773aa33b379c2 Mon Sep 17 00:00:00 2001 From: boramonideep Date: Mon, 11 Jul 2022 12:13:21 +0200 Subject: [PATCH 26/78] enabled PWM on pin 10 for XMC1100 Boot Kit --- .../XMC1100/config/XMC1100_Boot_Kit/pins_arduino.h | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/variants/XMC1100/config/XMC1100_Boot_Kit/pins_arduino.h b/variants/XMC1100/config/XMC1100_Boot_Kit/pins_arduino.h index 17ac3673..4467647b 100644 --- a/variants/XMC1100/config/XMC1100_Boot_Kit/pins_arduino.h +++ b/variants/XMC1100/config/XMC1100_Boot_Kit/pins_arduino.h @@ -163,15 +163,17 @@ const uint8_t mapping_pin_PWM4[][ 2 ] = { { 4, 1 }, { 6, 2 }, { 9, 3 }, + { 10, 4 }, { 255, 255 } }; /* Configurations of PWM channels for CCU4 type */ XMC_PWM4_t mapping_pwm4[] = { - {CCU40, CCU40_CC40, 0, mapping_port_pin[3], P0_0_AF_CCU40_OUT0, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 3 P0.0 - {CCU40, CCU40_CC41, 1, mapping_port_pin[4], P0_1_AF_CCU40_OUT1, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 4 P0.1 - {CCU40, CCU40_CC43, 3, mapping_port_pin[6], P0_3_AF_CCU40_OUT3, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 6 P0.3 - {CCU40, CCU40_CC42, 2, mapping_port_pin[9], P0_8_AF_CCU40_OUT2, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED} // PWM disabled 9 P0.8 + {CCU40, CCU40_CC40, 0, mapping_port_pin[3], P0_0_AF_CCU40_OUT0, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 3 P0.0 + {CCU40, CCU40_CC41, 1, mapping_port_pin[4], P0_1_AF_CCU40_OUT1, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 4 P0.1 + {CCU40, CCU40_CC43, 3, mapping_port_pin[6], P0_3_AF_CCU40_OUT3, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 6 P0.3 + {CCU40, CCU40_CC42, 2, mapping_port_pin[9], P0_8_AF_CCU40_OUT2, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 9 P0.8 + {CCU40, CCU40_CC43, 3, mapping_port_pin[10], P0_9_AF_CCU40_OUT3, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED} // PWM disabled 10 P0.9 }; const uint8_t NUM_PWM = ( sizeof( mapping_pwm4 ) / sizeof( XMC_PWM4_t ) ); const uint8_t NUM_PWM4 = ( sizeof( mapping_pwm4 ) / sizeof( XMC_PWM4_t ) ); From d248313458f953d36d79be84b9f999f65bb2e835 Mon Sep 17 00:00:00 2001 From: boramonideep Date: Tue, 12 Jul 2022 01:43:58 +0200 Subject: [PATCH 27/78] removed duplicate pin assignments from X1 & X2, yet to reorder pins --- .../config/XMC4400_Platform2GO/pins_arduino.h | 71 +++++++------------ 1 file changed, 25 insertions(+), 46 deletions(-) diff --git a/variants/XMC4400/config/XMC4400_Platform2GO/pins_arduino.h b/variants/XMC4400/config/XMC4400_Platform2GO/pins_arduino.h index 0c3bca0e..2b185e0e 100644 --- a/variants/XMC4400/config/XMC4400_Platform2GO/pins_arduino.h +++ b/variants/XMC4400/config/XMC4400_Platform2GO/pins_arduino.h @@ -106,31 +106,31 @@ extern uint8_t SCK; // Mapping of digital pins and comments const XMC_PORT_PIN_t mapping_port_pin[]= { - /* 0 */ {XMC_GPIO_PORT2, 15}, // RX P2.15 - /* 1 */ {XMC_GPIO_PORT2, 14}, // TX P2.14 - /* 2 */ {XMC_GPIO_PORT1, 0}, // GPIO / External INT 0 P1.0 - /* 3 */ {XMC_GPIO_PORT3, 6}, // PWM42-0(PWM0)/ External INT 1 P3.6 - /* 4 */ {XMC_GPIO_PORT1, 6}, // GPIO P1.6 - /* 5 */ {XMC_GPIO_PORT3, 3}, // PWM42-3 output / PWM1 P3.3 - /* 6 */ {XMC_GPIO_PORT3, 4}, // PWM42-2 output / PWM2 P3.4 - /* 7 */ {XMC_GPIO_PORT1, 14}, // GPIO P1.14 - /* 8 */ {XMC_GPIO_PORT4, 1}, // GPIO P4.1 - /* 9 */ {XMC_GPIO_PORT0, 11}, // PWM80-31 output / PWM3 P0.11 - /* 10 */ {XMC_GPIO_PORT0, 2}, // SPI-SS / PWM80-01 / PWM4 P0.2 - /* 11 */ {XMC_GPIO_PORT1, 9}, // SPI-MOSI P1.9 - /* 12 */ {XMC_GPIO_PORT0, 0}, // SPI-MISO P0.0 - /* 13 */ {XMC_GPIO_PORT1, 8}, // SPI-SCK P1.8 - /* 14 */ {XMC_GPIO_PORT2, 3}, // AREF TODO: P2.3 - /* 15 */ {XMC_GPIO_PORT2, 5}, // I2C Data / Address SDA / A4 P2.5 (Hardwired to A4) - /* 16 */ {XMC_GPIO_PORT3, 0}, // I2C Clock SCL / A5 P3.0 (Hardwired to A5) - /* 17 */ {XMC_GPIO_PORT14, 0}, // A0 / ADC Input P14.0 (INPUT ONLY) - /* 18 */ {XMC_GPIO_PORT14, 1}, // A1 / ADC Input P14.1 (INPUT ONLY) - /* 19 */ {XMC_GPIO_PORT14, 2}, // A2 / ADC Input P14.2 (INPUT ONLY) - /* 20 */ {XMC_GPIO_PORT14, 3}, // A3 / ADC Input P14.3 (INPUT ONLY) - /* 21 */ {XMC_GPIO_PORT14, 4}, // A4 / ADC Input / SDA P14.4 (Hardwired to SDA) - /* 22 */ {XMC_GPIO_PORT14, 5}, // A5 / ADC Input / SCL P14.5 (Hardwired to SCL) - /* 23 */ {XMC_GPIO_PORT1, 15}, // USB Debug RX P1.15 - /* 24 */ {XMC_GPIO_PORT0, 5}, // USB Debug TX P0.5 + /* 0 */ {XMC_GPIO_PORT2, 15}, // RX P2.15 + /* 1 */ {XMC_GPIO_PORT2, 14}, // TX P2.14 + /* 2 */ {XMC_GPIO_PORT1, 0}, // GPIO / External INT 0 P1.0 + /* 3 */ {XMC_GPIO_PORT3, 6}, // PWM42-0(PWM0)/ External INT 1 P3.6 + /* 4 */ {XMC_GPIO_PORT1, 6}, // GPIO / IO_0 P1.6 + /* 5 */ {XMC_GPIO_PORT3, 3}, // PWM42-3 output / PWM1 P3.3 + /* 6 */ {XMC_GPIO_PORT3, 4}, // PWM42-2 output / PWM2 P3.4 + /* 7 */ {XMC_GPIO_PORT1, 14}, // GPIO / / IO_1 P1.14 + /* 8 */ {XMC_GPIO_PORT4, 1}, // GPIO / IO_2 P4.1 + /* 9 */ {XMC_GPIO_PORT0, 11}, // PWM80-31 output / PWM3 P0.11 + /* 10 */ {XMC_GPIO_PORT0, 2}, // SPI-SS / PWM80-01 / PWM4 P0.2 + /* 11 */ {XMC_GPIO_PORT1, 9}, // SPI-MOSI / PWM41-2 / PWM5 P1.9 + /* 12 */ {XMC_GPIO_PORT0, 0}, // SPI-MISO P0.0 + /* 13 */ {XMC_GPIO_PORT1, 8}, // SPI-SCK / GPIO P1.8 + /* 14 */ {XMC_GPIO_PORT2, 3}, // AREF TODO: / ETH_RXD1 P2.3 + /* 15 */ {XMC_GPIO_PORT2, 5}, // I2C Data / Address SDA / A4 P2.5 (Hardwired to A4) + /* 16 */ {XMC_GPIO_PORT3, 0}, // I2C Clock SCL / A5 - ADC Input P3.0 (Hardwired to A5) + /* 17 */ {XMC_GPIO_PORT14, 0}, // A0 / ADC Input P14.0 (INPUT ONLY) + /* 18 */ {XMC_GPIO_PORT14, 1}, // A1 / ADC Input P14.1 (INPUT ONLY) + /* 19 */ {XMC_GPIO_PORT14, 2}, // A2 / ADC Input P14.2 (INPUT ONLY) + /* 20 */ {XMC_GPIO_PORT14, 3}, // A3 / ADC Input P14.3 (INPUT ONLY) + /* 21 */ {XMC_GPIO_PORT14, 4}, // A4 / ADC Input / SDA / GPIO P14.4 (Hardwired to SDA) + /* 22 */ {XMC_GPIO_PORT14, 5}, // A5 / ADC Input / SCL P14.5 (Hardwired to SCL) + /* 23 */ {XMC_GPIO_PORT1, 15}, // USB Debug RX P1.15 + /* 24 */ {XMC_GPIO_PORT0, 5}, // USB Debug TX P0.5 //Additional pins for port X1 starting here /* 25 */ {XMC_GPIO_PORT2, 10}, // GPIO / ETH_LED P2.10 @@ -141,32 +141,22 @@ const XMC_PORT_PIN_t mapping_port_pin[]= /* 30 */ {XMC_GPIO_PORT2, 6}, // PWM8 - / PWM / GPIO4_2GO_2 P2.6 /* 31 */ {XMC_GPIO_PORT5, 2}, // GPIO / RST P5.2 /* 32 */ {XMC_GPIO_PORT5, 0}, // GPIO1_2GO_1 P5.0 - /* 33 */ {XMC_GPIO_PORT1, 14}, // GPIO / IO_1 P1.14 /* 34 */ {XMC_GPIO_PORT1, 12}, // GPIO / CAN_TX P1.12 /* 35 */ {XMC_GPIO_PORT1, 10}, // GPIO / GPIO2_2GO_1 P1.10 /* 36 */ {XMC_GPIO_PORT1, 4}, // GPIO / QSPI_IO1 P1.4 /* 37 */ {XMC_GPIO_PORT1, 2}, // GPIO / QSPI_IO3 P1.2 - /* 38 */ {XMC_GPIO_PORT1, 0}, // GPIO / External INT 0 P1.0 - /* 39 */ {XMC_GPIO_PORT1, 8}, // GPIO / SPI-SCK P1.8 /* 40 */ {XMC_GPIO_PORT1, 6}, // GPIO / IO_0 P1.6 /* 41 */ {XMC_GPIO_PORT4, 0}, // GPIO / GPIO2_2GO_2 P1.0 - /* 42 */ {XMC_GPIO_PORT2, 14}, // UART TX P2.14 - /* 43 */ {XMC_GPIO_PORT2, 15}, // UART RX P2.15 - /* 44 */ {XMC_GPIO_PORT4, 1}, // GPIO / IO_2 P4.1. /* 45 */ {XMC_GPIO_PORT1, 7}, // GPIO / SPI_CS_2GO_2 P1.7 (Chip Select - Slot 2) - /* 46 */ {XMC_GPIO_PORT1, 9}, // SPI-MOSI / PWM41-2 / PWM5 P1.9 /* 47 */ {XMC_GPIO_PORT1, 1}, // GPIO1_2GO_2 P1.1 /* 48 */ {XMC_GPIO_PORT1, 3}, // GPIO / QSPI_IO3 P1.3 /* 49 */ {XMC_GPIO_PORT1, 5}, // GPIO / QSPI_IO0 P1.5 /* 50 */ {XMC_GPIO_PORT1, 11}, // GPIO / QSPI_CS P1.11 /* 51 */ {XMC_GPIO_PORT1, 13}, // GPIO / CAN_RX P1.13 - /* 52 */ {XMC_GPIO_PORT1, 15}, // USB Debug RX P1.15 /* 53 */ {XMC_GPIO_PORT5, 1}, // GPIO / ETH_INT P5.1 /* 54 */ {XMC_GPIO_PORT5, 7}, // PWM8 - / PWM P5.7 /* 55 */ {XMC_GPIO_PORT2, 7}, // PWM8 - / PWM / ETH_MDC P2.7 /* 56 */ {XMC_GPIO_PORT2, 1}, // SWV ""DEBUG Do NOT Use ** P2.1 - /* 57 */ {XMC_GPIO_PORT2, 3}, // AREF TODO: / ETH_RXD1 P2.3 - /* 58 */ {XMC_GPIO_PORT2, 5}, // I2C Data - SDA / A4 P2.5 (Hardwired to A4) /* 59 */ {XMC_GPIO_PORT2, 9}, // PWM8 - / PWM / ETH_TXD1 P2.9 /* 60 */ {XMC_GPIO_PORT15, 8}, // A16 / ETH_CLK P15.8 @@ -178,31 +168,20 @@ const XMC_PORT_PIN_t mapping_port_pin[]= /* 65 */ {XMC_GPIO_PORT14, 6}, // A6 / AN1_2GO_1 - ADC Input P14.6 (INPUT ONLY) /* 66 */ {XMC_GPIO_PORT14, 12}, // A8 / AN1_2GO_2 - ADC Input P14.12 (INPUT ONLY) /* 67 */ {XMC_GPIO_PORT14, 14}, // A10 / ADC Input P14.14 (INPUT ONLY) - /* 68 */ {XMC_GPIO_PORT3, 0}, // I2C Clk SCL / A5 - ADC Input P3.0 (Hardwired to A5) /* 69 */ {XMC_GPIO_PORT3, 2}, // BUTTON2 P3.2 /* 70 */ {XMC_GPIO_PORT0, 10}, // INT / GPIO3_2GO_1 P0.10 /* 71 */ {XMC_GPIO_PORT0, 1}, // INT P0.1 /* 72 */ {XMC_GPIO_PORT0, 3}, // INT / GPIO3_2GO_2 P0.3 - /* 73 */ {XMC_GPIO_PORT0, 5}, // USB Debug TX P0.5 - /* 74 */ {XMC_GPIO_PORT0, 11}, // PWM80-31 output / PWM3 P0.11 - /* 75 */ {XMC_GPIO_PORT3, 3}, // PWM42-3 output / PWM1 P3.3 /* 76 */ {XMC_GPIO_PORT3, 5}, // CS_2GO_1 P3.5 (Chip Select - Slot 1) /* 77 */ {XMC_GPIO_PORT0, 7}, // LED2 P0.7 /* 78 */ {XMC_GPIO_PORT0, 8}, // QSPI_CLK P0.8 - /* 79 */ {XMC_GPIO_PORT3, 6}, // PWM42-0(PWM0)/ External INT 1 P3.6 - /* 80 */ {XMC_GPIO_PORT3, 4}, // PWM42-2 output / PWM2 P3.4 /* 81 */ {XMC_GPIO_PORT0, 12}, // CS_MB P0.12 /* 82 */ {XMC_GPIO_PORT0, 6}, // LED1 P0.6 /* 83 */ {XMC_GPIO_PORT0, 4}, // ETH_TXEN P0.4 - /* 84 */ {XMC_GPIO_PORT0, 2}, // SPI-CS / PWM80-01 / PWM4 P0.2 - /* 85 */ {XMC_GPIO_PORT0, 0}, // SPI-MISO P0.0 /* 86 */ {XMC_GPIO_PORT0, 9}, // GPIO4_2GO_1 / PWM80-01 / PWM P0.9 /* 87 */ {XMC_GPIO_PORT3, 1}, // BUTTON1 P3.1 - /* 88 */ {XMC_GPIO_PORT14, 4}, // A4 - ADC Input / SDA P14.4 (Hardwired to SDA) /* 89 */ {XMC_GPIO_PORT14, 13}, // A9 / AN2_2GO_2 - ADC Input P14.13 (INPUT ONLY) /* 90 */ {XMC_GPIO_PORT14, 7}, // A7 / AN2_2GO_1 - ADC Input P14.7 (INPUT ONLY) - /* 91 */ {XMC_GPIO_PORT14, 5}, // A5 - ADC Input / SCL P14.5 (Hardwired to SCL) - /* 92 */ {XMC_GPIO_PORT14, 3}, // A3 - ADC Input P14.3 (INPUT ONLY) /* 93 */ {XMC_GPIO_PORT15, 3}, // A13 - ADC Input P15.3 (INPUT ONLY) /* 94 */ {XMC_GPIO_PORT14, 9} // A15 / DAC 1 Output P14.9 }; From b24fda413e4e1c9cdb6ce7a030654e0993d4188d Mon Sep 17 00:00:00 2001 From: boramonideep Date: Tue, 12 Jul 2022 13:45:26 +0200 Subject: [PATCH 28/78] ordered the pins in X1 & X2, added info about duplicate pins alongside in comments --- .../config/XMC4400_Platform2GO/pins_arduino.h | 143 +++++++++--------- 1 file changed, 71 insertions(+), 72 deletions(-) diff --git a/variants/XMC4400/config/XMC4400_Platform2GO/pins_arduino.h b/variants/XMC4400/config/XMC4400_Platform2GO/pins_arduino.h index 2b185e0e..f6071284 100644 --- a/variants/XMC4400/config/XMC4400_Platform2GO/pins_arduino.h +++ b/variants/XMC4400/config/XMC4400_Platform2GO/pins_arduino.h @@ -106,84 +106,83 @@ extern uint8_t SCK; // Mapping of digital pins and comments const XMC_PORT_PIN_t mapping_port_pin[]= { - /* 0 */ {XMC_GPIO_PORT2, 15}, // RX P2.15 - /* 1 */ {XMC_GPIO_PORT2, 14}, // TX P2.14 - /* 2 */ {XMC_GPIO_PORT1, 0}, // GPIO / External INT 0 P1.0 - /* 3 */ {XMC_GPIO_PORT3, 6}, // PWM42-0(PWM0)/ External INT 1 P3.6 - /* 4 */ {XMC_GPIO_PORT1, 6}, // GPIO / IO_0 P1.6 - /* 5 */ {XMC_GPIO_PORT3, 3}, // PWM42-3 output / PWM1 P3.3 - /* 6 */ {XMC_GPIO_PORT3, 4}, // PWM42-2 output / PWM2 P3.4 - /* 7 */ {XMC_GPIO_PORT1, 14}, // GPIO / / IO_1 P1.14 - /* 8 */ {XMC_GPIO_PORT4, 1}, // GPIO / IO_2 P4.1 - /* 9 */ {XMC_GPIO_PORT0, 11}, // PWM80-31 output / PWM3 P0.11 - /* 10 */ {XMC_GPIO_PORT0, 2}, // SPI-SS / PWM80-01 / PWM4 P0.2 - /* 11 */ {XMC_GPIO_PORT1, 9}, // SPI-MOSI / PWM41-2 / PWM5 P1.9 - /* 12 */ {XMC_GPIO_PORT0, 0}, // SPI-MISO P0.0 - /* 13 */ {XMC_GPIO_PORT1, 8}, // SPI-SCK / GPIO P1.8 - /* 14 */ {XMC_GPIO_PORT2, 3}, // AREF TODO: / ETH_RXD1 P2.3 - /* 15 */ {XMC_GPIO_PORT2, 5}, // I2C Data / Address SDA / A4 P2.5 (Hardwired to A4) - /* 16 */ {XMC_GPIO_PORT3, 0}, // I2C Clock SCL / A5 - ADC Input P3.0 (Hardwired to A5) - /* 17 */ {XMC_GPIO_PORT14, 0}, // A0 / ADC Input P14.0 (INPUT ONLY) + /* 0 */ {XMC_GPIO_PORT2, 15}, // RX P2.15 X1-4 + /* 1 */ {XMC_GPIO_PORT2, 14}, // TX P2.14 X1-3 + /* 2 */ {XMC_GPIO_PORT1, 0}, // GPIO / External INT 0 P1.0 X1-11 + /* 3 */ {XMC_GPIO_PORT3, 6}, // PWM42-0(PWM0) / External INT 1 P3.6 X2-6 + /* 4 */ {XMC_GPIO_PORT1, 6}, // GPIO / IO_0 P1.6 X1-7 + /* 5 */ {XMC_GPIO_PORT3, 3}, // PWM42-3 output / PWM1 P3.3 X2-5 + /* 6 */ {XMC_GPIO_PORT3, 4}, // PWM42-2 output / PWM2 P3.4 X2-8 + /* 7 */ {XMC_GPIO_PORT1, 14}, // GPIO / IO_1 P1.14 X1-21 + /* 8 */ {XMC_GPIO_PORT4, 1}, // GPIO / IO_2 P4.1 X1-6 + /* 9 */ {XMC_GPIO_PORT0, 11}, // PWM80-31 output / PWM3 P0.11 X2-7 + /* 10 */ {XMC_GPIO_PORT0, 2}, // SPI-SS / PWM80-01 / PWM4 P0.2 X2-16 + /* 11 */ {XMC_GPIO_PORT1, 9}, // SPI-MOSI / PWM41-2 / PWM5 P1.9 X1-10 + /* 12 */ {XMC_GPIO_PORT0, 0}, // SPI-MISO P0.0 X2-12 + /* 13 */ {XMC_GPIO_PORT1, 8}, // SPI-SCK / GPIO P1.8 X1-9 + /* 14 */ {XMC_GPIO_PORT2, 3}, // AREF TODO: / ETH_RXD1 P2.3 X1-32 + /* 15 */ {XMC_GPIO_PORT2, 5}, // I2C Data / Address SDA / A4 P2.5 (Hardwired to A4) X1-34 + /* 16 */ {XMC_GPIO_PORT3, 0}, // I2C Clock SCL / A5 - ADC Input P3.0 (Hardwired to A5) X2-19 + /* 17 */ {XMC_GPIO_PORT14, 0}, // A0 / ADC Input P14.0 (INPUT ONLY) /* 18 */ {XMC_GPIO_PORT14, 1}, // A1 / ADC Input P14.1 (INPUT ONLY) /* 19 */ {XMC_GPIO_PORT14, 2}, // A2 / ADC Input P14.2 (INPUT ONLY) - /* 20 */ {XMC_GPIO_PORT14, 3}, // A3 / ADC Input P14.3 (INPUT ONLY) - /* 21 */ {XMC_GPIO_PORT14, 4}, // A4 / ADC Input / SDA / GPIO P14.4 (Hardwired to SDA) - /* 22 */ {XMC_GPIO_PORT14, 5}, // A5 / ADC Input / SCL P14.5 (Hardwired to SCL) - /* 23 */ {XMC_GPIO_PORT1, 15}, // USB Debug RX P1.15 - /* 24 */ {XMC_GPIO_PORT0, 5}, // USB Debug TX P0.5 + /* 20 */ {XMC_GPIO_PORT14, 3}, // A3 / ADC Input P14.3 (INPUT ONLY) X2-32 + /* 21 */ {XMC_GPIO_PORT14, 4}, // A4 / ADC Input / SDA / GPIO P14.4 (Hardwired to SDA) X2-24 + /* 22 */ {XMC_GPIO_PORT14, 5}, // A5 / ADC Input / SCL P14.5 (Hardwired to SCL) X2-30 + /* 23 */ {XMC_GPIO_PORT1, 15}, // USB Debug RX P1.15 X1-22 + /* 24 */ {XMC_GPIO_PORT0, 5}, // USB Debug TX P0.5 X2-9 //Additional pins for port X1 starting here - /* 25 */ {XMC_GPIO_PORT2, 10}, // GPIO / ETH_LED P2.10 - /* 26 */ {XMC_GPIO_PORT2, 8}, // GPIO / ETH_TXDO P2.8 - /* 27 */ {XMC_GPIO_PORT2, 4}, // GPIO / ETH_RXER P2.4 - /* 28 */ {XMC_GPIO_PORT2, 2}, // GPIO / ETH_RXDO P2.2 - /* 29 */ {XMC_GPIO_PORT2, 0}, // GPIO / ETH_MDIO P2.0 - /* 30 */ {XMC_GPIO_PORT2, 6}, // PWM8 - / PWM / GPIO4_2GO_2 P2.6 - /* 31 */ {XMC_GPIO_PORT5, 2}, // GPIO / RST P5.2 - /* 32 */ {XMC_GPIO_PORT5, 0}, // GPIO1_2GO_1 P5.0 - /* 34 */ {XMC_GPIO_PORT1, 12}, // GPIO / CAN_TX P1.12 - /* 35 */ {XMC_GPIO_PORT1, 10}, // GPIO / GPIO2_2GO_1 P1.10 - /* 36 */ {XMC_GPIO_PORT1, 4}, // GPIO / QSPI_IO1 P1.4 - /* 37 */ {XMC_GPIO_PORT1, 2}, // GPIO / QSPI_IO3 P1.2 - /* 40 */ {XMC_GPIO_PORT1, 6}, // GPIO / IO_0 P1.6 - /* 41 */ {XMC_GPIO_PORT4, 0}, // GPIO / GPIO2_2GO_2 P1.0 - /* 45 */ {XMC_GPIO_PORT1, 7}, // GPIO / SPI_CS_2GO_2 P1.7 (Chip Select - Slot 2) - /* 47 */ {XMC_GPIO_PORT1, 1}, // GPIO1_2GO_2 P1.1 - /* 48 */ {XMC_GPIO_PORT1, 3}, // GPIO / QSPI_IO3 P1.3 - /* 49 */ {XMC_GPIO_PORT1, 5}, // GPIO / QSPI_IO0 P1.5 - /* 50 */ {XMC_GPIO_PORT1, 11}, // GPIO / QSPI_CS P1.11 - /* 51 */ {XMC_GPIO_PORT1, 13}, // GPIO / CAN_RX P1.13 - /* 53 */ {XMC_GPIO_PORT5, 1}, // GPIO / ETH_INT P5.1 - /* 54 */ {XMC_GPIO_PORT5, 7}, // PWM8 - / PWM P5.7 - /* 55 */ {XMC_GPIO_PORT2, 7}, // PWM8 - / PWM / ETH_MDC P2.7 - /* 56 */ {XMC_GPIO_PORT2, 1}, // SWV ""DEBUG Do NOT Use ** P2.1 - /* 59 */ {XMC_GPIO_PORT2, 9}, // PWM8 - / PWM / ETH_TXD1 P2.9 - /* 60 */ {XMC_GPIO_PORT15, 8}, // A16 / ETH_CLK P15.8 + /* 25 */ {XMC_GPIO_PORT2, 10}, // GPIO / ETH_LED P2.10 X1-37 + /* 26 */ {XMC_GPIO_PORT2, 8}, // GPIO / ETH_TXDO P2.8 X1-35 + /* 27 */ {XMC_GPIO_PORT2, 4}, // GPIO / ETH_RXER P2.4 X1-33 + /* 28 */ {XMC_GPIO_PORT2, 2}, // GPIO / ETH_RXDO P2.2 X1-31 + /* 29 */ {XMC_GPIO_PORT2, 0}, // GPIO / ETH_MDIO P2.0 X1-29 + /* 30 */ {XMC_GPIO_PORT2, 6}, // PWM8 - / PWM / GPIO4_2GO_2 P2.6 X1-27 + /* 31 */ {XMC_GPIO_PORT5, 2}, // GPIO / RST P5.2 X1-25 + /* 32 */ {XMC_GPIO_PORT5, 0}, // GPIO1_2GO_1 P5.0 X1-23 + /* 33 */ {XMC_GPIO_PORT1, 12}, // GPIO / CAN_TX P1.12 X1-19 + /* 34 */ {XMC_GPIO_PORT1, 10}, // GPIO / GPIO2_2GO_1 P1.10 X1-17 + /* 35 */ {XMC_GPIO_PORT1, 4}, // GPIO / QSPI_IO1 P1.4 X1-15 + /* 36 */ {XMC_GPIO_PORT1, 2}, // GPIO / QSPI_IO3 P1.2 X1-13 + /* 37 */ {XMC_GPIO_PORT4, 0}, // GPIO / GPIO2_2GO_2 P4.0 X1-5 + /* 38 */ {XMC_GPIO_PORT1, 7}, // GPIO / SPI_CS_2GO_2 P1.7 (Chip Select - Slot 2) X1-8 + /* 39 */ {XMC_GPIO_PORT1, 1}, // GPIO1_2GO_2 P1.1 X1-12 + /* 40 */ {XMC_GPIO_PORT1, 3}, // GPIO / QSPI_IO3 P1.3 X1-14 + /* 41 */ {XMC_GPIO_PORT1, 5}, // GPIO / QSPI_IO0 P1.5 X1-16 + /* 42 */ {XMC_GPIO_PORT1, 11}, // GPIO / QSPI_CS P1.11 X1-18 + /* 43 */ {XMC_GPIO_PORT1, 13}, // GPIO / CAN_RX P1.13 X1-20 + /* 44 */ {XMC_GPIO_PORT5, 1}, // GPIO / ETH_INT P5.1 X1-24 + /* 45 */ {XMC_GPIO_PORT5, 7}, // PWM8 - / PWM P5.7 X1-26 + /* 46 */ {XMC_GPIO_PORT2, 7}, // PWM8 - / PWM / ETH_MDC P2.7 X1-28 + /* 47 */ {XMC_GPIO_PORT2, 1}, // SWV ""DEBUG Do NOT Use ** P2.1 X1-30 + /* 48 */ {XMC_GPIO_PORT2, 9}, // PWM8 - / PWM / ETH_TXD1 P2.9 X1-36 + /* 49 */ {XMC_GPIO_PORT15, 8}, // A16 / ETH_CLK P15.8 X1-38 //Additional pins for port X2 starting here - /* 61 */ {XMC_GPIO_PORT14, 8}, // A14 / DAC 0 Output P14.8 - /* 62 */ {XMC_GPIO_PORT15, 2}, // A12 - ADC Input P15.2 (INPUT ONLY) - /* 63 */ {XMC_GPIO_PORT14, 15}, // A11 - ADC Input P14.15 (INPUT ONLY) - /* 64 */ {XMC_GPIO_PORT15, 9}, // A17 - ADC Input / ETH_CRS P15.9 - /* 65 */ {XMC_GPIO_PORT14, 6}, // A6 / AN1_2GO_1 - ADC Input P14.6 (INPUT ONLY) - /* 66 */ {XMC_GPIO_PORT14, 12}, // A8 / AN1_2GO_2 - ADC Input P14.12 (INPUT ONLY) - /* 67 */ {XMC_GPIO_PORT14, 14}, // A10 / ADC Input P14.14 (INPUT ONLY) - /* 69 */ {XMC_GPIO_PORT3, 2}, // BUTTON2 P3.2 - /* 70 */ {XMC_GPIO_PORT0, 10}, // INT / GPIO3_2GO_1 P0.10 - /* 71 */ {XMC_GPIO_PORT0, 1}, // INT P0.1 - /* 72 */ {XMC_GPIO_PORT0, 3}, // INT / GPIO3_2GO_2 P0.3 - /* 76 */ {XMC_GPIO_PORT3, 5}, // CS_2GO_1 P3.5 (Chip Select - Slot 1) - /* 77 */ {XMC_GPIO_PORT0, 7}, // LED2 P0.7 - /* 78 */ {XMC_GPIO_PORT0, 8}, // QSPI_CLK P0.8 - /* 81 */ {XMC_GPIO_PORT0, 12}, // CS_MB P0.12 - /* 82 */ {XMC_GPIO_PORT0, 6}, // LED1 P0.6 - /* 83 */ {XMC_GPIO_PORT0, 4}, // ETH_TXEN P0.4 - /* 86 */ {XMC_GPIO_PORT0, 9}, // GPIO4_2GO_1 / PWM80-01 / PWM P0.9 - /* 87 */ {XMC_GPIO_PORT3, 1}, // BUTTON1 P3.1 - /* 89 */ {XMC_GPIO_PORT14, 13}, // A9 / AN2_2GO_2 - ADC Input P14.13 (INPUT ONLY) - /* 90 */ {XMC_GPIO_PORT14, 7}, // A7 / AN2_2GO_1 - ADC Input P14.7 (INPUT ONLY) - /* 93 */ {XMC_GPIO_PORT15, 3}, // A13 - ADC Input P15.3 (INPUT ONLY) - /* 94 */ {XMC_GPIO_PORT14, 9} // A15 / DAC 1 Output P14.9 + /* 50 */ {XMC_GPIO_PORT14, 8}, // A14 / DAC 0 Output P14.8 X2-33 + /* 51 */ {XMC_GPIO_PORT15, 2}, // A12 - ADC Input P15.2 (INPUT ONLY) X2-31 + /* 52 */ {XMC_GPIO_PORT14, 15}, // A11 - ADC Input P14.15 (INPUT ONLY) X2-29 + /* 53 */ {XMC_GPIO_PORT15, 9}, // A17 - ADC Input / ETH_CRS P15.9 X2-27 + /* 54 */ {XMC_GPIO_PORT14, 6}, // A6 / AN1_2GO_1 - ADC Input P14.6 (INPUT ONLY) X2-25 + /* 55 */ {XMC_GPIO_PORT14, 12}, // A8 / AN1_2GO_2 - ADC Input P14.12 (INPUT ONLY) X2-23 + /* 56 */ {XMC_GPIO_PORT14, 14}, // A10 / ADC Input P14.14 (INPUT ONLY) X2-21 + /* 57 */ {XMC_GPIO_PORT3, 2}, // BUTTON2 P3.2 X2-17 + /* 58 */ {XMC_GPIO_PORT0, 10}, // INT / GPIO3_2GO_1 P0.10 X2-15 + /* 59 */ {XMC_GPIO_PORT0, 1}, // INT P0.1 X2-13 + /* 60 */ {XMC_GPIO_PORT0, 3}, // INT / GPIO3_2GO_2 P0.3 X2-11 + /* 61 */ {XMC_GPIO_PORT3, 5}, // CS_2GO_1 P3.5 (Chip Select - Slot 1) X2-3 + /* 62 */ {XMC_GPIO_PORT0, 7}, // LED2 P0.7 X2-1 + /* 63 */ {XMC_GPIO_PORT0, 8}, // QSPI_CLK P0.8 X2-4 + /* 64 */ {XMC_GPIO_PORT0, 12}, // CS_MB P0.12 X2-10 + /* 65 */ {XMC_GPIO_PORT0, 6}, // LED1 P0.6 X2-12 + /* 66 */ {XMC_GPIO_PORT0, 4}, // ETH_TXEN P0.4 X2-14 + /* 67 */ {XMC_GPIO_PORT0, 9}, // GPIO4_2GO_1 / PWM80-01 / PWM P0.9 X2-20 + /* 68 */ {XMC_GPIO_PORT3, 1}, // BUTTON1 P3.1 X2-22 + /* 69 */ {XMC_GPIO_PORT14, 13}, // A9 / AN2_2GO_2 - ADC Input P14.13 (INPUT ONLY) X2-26 + /* 70 */ {XMC_GPIO_PORT14, 7}, // A7 / AN2_2GO_1 - ADC Input P14.7 (INPUT ONLY) X2-28 + /* 71 */ {XMC_GPIO_PORT15, 3}, // A13 - ADC Input P15.3 (INPUT ONLY) X2-34 + /* 72 */ {XMC_GPIO_PORT14, 9} // A15 / DAC 1 Output P14.9 X2-36 }; const uint8_t GND = ( sizeof( mapping_port_pin ) / sizeof( XMC_PORT_PIN_t ) ); const uint8_t NUM_DIGITAL = ( sizeof( mapping_port_pin ) / sizeof( XMC_PORT_PIN_t ) );; From a95b5d3d03d868272077735e9d5c801179ded839 Mon Sep 17 00:00:00 2001 From: boramonideep Date: Tue, 12 Jul 2022 13:57:50 +0200 Subject: [PATCH 29/78] highlighted CS for MikroBUS interface --- variants/XMC4400/config/XMC4400_Platform2GO/pins_arduino.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/variants/XMC4400/config/XMC4400_Platform2GO/pins_arduino.h b/variants/XMC4400/config/XMC4400_Platform2GO/pins_arduino.h index f6071284..11ad5b21 100644 --- a/variants/XMC4400/config/XMC4400_Platform2GO/pins_arduino.h +++ b/variants/XMC4400/config/XMC4400_Platform2GO/pins_arduino.h @@ -174,7 +174,7 @@ const XMC_PORT_PIN_t mapping_port_pin[]= /* 61 */ {XMC_GPIO_PORT3, 5}, // CS_2GO_1 P3.5 (Chip Select - Slot 1) X2-3 /* 62 */ {XMC_GPIO_PORT0, 7}, // LED2 P0.7 X2-1 /* 63 */ {XMC_GPIO_PORT0, 8}, // QSPI_CLK P0.8 X2-4 - /* 64 */ {XMC_GPIO_PORT0, 12}, // CS_MB P0.12 X2-10 + /* 64 */ {XMC_GPIO_PORT0, 12}, // CS_MB P0.12 (Chip Select - MikroBUS) X2-10 /* 65 */ {XMC_GPIO_PORT0, 6}, // LED1 P0.6 X2-12 /* 66 */ {XMC_GPIO_PORT0, 4}, // ETH_TXEN P0.4 X2-14 /* 67 */ {XMC_GPIO_PORT0, 9}, // GPIO4_2GO_1 / PWM80-01 / PWM P0.9 X2-20 From 09764a8b2a05fcaa9e665e8e790280761720d61b Mon Sep 17 00:00:00 2001 From: boramonideep Date: Wed, 13 Jul 2022 00:23:45 +0200 Subject: [PATCH 30/78] swapped X2-31 and X2-32 due to inconsistency in manual --- variants/XMC4400/config/XMC4400_Platform2GO/pins_arduino.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/variants/XMC4400/config/XMC4400_Platform2GO/pins_arduino.h b/variants/XMC4400/config/XMC4400_Platform2GO/pins_arduino.h index 11ad5b21..97be3fae 100644 --- a/variants/XMC4400/config/XMC4400_Platform2GO/pins_arduino.h +++ b/variants/XMC4400/config/XMC4400_Platform2GO/pins_arduino.h @@ -126,7 +126,7 @@ const XMC_PORT_PIN_t mapping_port_pin[]= /* 17 */ {XMC_GPIO_PORT14, 0}, // A0 / ADC Input P14.0 (INPUT ONLY) /* 18 */ {XMC_GPIO_PORT14, 1}, // A1 / ADC Input P14.1 (INPUT ONLY) /* 19 */ {XMC_GPIO_PORT14, 2}, // A2 / ADC Input P14.2 (INPUT ONLY) - /* 20 */ {XMC_GPIO_PORT14, 3}, // A3 / ADC Input P14.3 (INPUT ONLY) X2-32 + /* 20 */ {XMC_GPIO_PORT14, 3}, // A3 / ADC Input P14.3 (INPUT ONLY) X2-31 /* 21 */ {XMC_GPIO_PORT14, 4}, // A4 / ADC Input / SDA / GPIO P14.4 (Hardwired to SDA) X2-24 /* 22 */ {XMC_GPIO_PORT14, 5}, // A5 / ADC Input / SCL P14.5 (Hardwired to SCL) X2-30 /* 23 */ {XMC_GPIO_PORT1, 15}, // USB Debug RX P1.15 X1-22 @@ -161,7 +161,7 @@ const XMC_PORT_PIN_t mapping_port_pin[]= //Additional pins for port X2 starting here /* 50 */ {XMC_GPIO_PORT14, 8}, // A14 / DAC 0 Output P14.8 X2-33 - /* 51 */ {XMC_GPIO_PORT15, 2}, // A12 - ADC Input P15.2 (INPUT ONLY) X2-31 + /* 51 */ {XMC_GPIO_PORT15, 2}, // A12 - ADC Input P15.2 (INPUT ONLY) X2-32 /* 52 */ {XMC_GPIO_PORT14, 15}, // A11 - ADC Input P14.15 (INPUT ONLY) X2-29 /* 53 */ {XMC_GPIO_PORT15, 9}, // A17 - ADC Input / ETH_CRS P15.9 X2-27 /* 54 */ {XMC_GPIO_PORT14, 6}, // A6 / AN1_2GO_1 - ADC Input P14.6 (INPUT ONLY) X2-25 From b3ddd8e612e57a5f0d26775f1a856321256a721a Mon Sep 17 00:00:00 2001 From: boramonideep Date: Wed, 13 Jul 2022 14:58:24 +0200 Subject: [PATCH 31/78] changed pin numbers of peripherals as per new pin assignments --- .../config/XMC4400_Platform2GO/pins_arduino.h | 59 ++++++++++--------- 1 file changed, 30 insertions(+), 29 deletions(-) diff --git a/variants/XMC4400/config/XMC4400_Platform2GO/pins_arduino.h b/variants/XMC4400/config/XMC4400_Platform2GO/pins_arduino.h index 97be3fae..73076f1e 100644 --- a/variants/XMC4400/config/XMC4400_Platform2GO/pins_arduino.h +++ b/variants/XMC4400/config/XMC4400_Platform2GO/pins_arduino.h @@ -94,11 +94,12 @@ extern uint8_t SCK; #define A16 16 // ADC G3CH0 on P15.8 #define A17 17 // ADC G3CH1 on P15.9 -#define LED1 82 // Additional LED1 -#define LED2 77 // Additional LED2 +#define LED1 65 // Additional LED1 +#define LED2 62 // Additional LED2 #define LED_BUILTIN LED1 // Standard Arduino LED: Uses LED1 -#define BUTTON1 87 // Additional BUTTON1 -#define BUTTON2 69 // Additional BUTTON2 + +#define BUTTON1 68 // Additional BUTTON1 +#define BUTTON2 57 // Additional BUTTON2 #define digitalPinToInterrupt(p) ((p) == 2 ? 0 : ((p) == 3 ? 1 : NOT_AN_INTERRUPT)) @@ -109,7 +110,7 @@ const XMC_PORT_PIN_t mapping_port_pin[]= /* 0 */ {XMC_GPIO_PORT2, 15}, // RX P2.15 X1-4 /* 1 */ {XMC_GPIO_PORT2, 14}, // TX P2.14 X1-3 /* 2 */ {XMC_GPIO_PORT1, 0}, // GPIO / External INT 0 P1.0 X1-11 - /* 3 */ {XMC_GPIO_PORT3, 6}, // PWM42-0(PWM0) / External INT 1 P3.6 X2-6 + /* 3 */ {XMC_GPIO_PORT3, 6}, // PWM42-0 / PWM0 / External INT 1 P3.6 X2-6 /* 4 */ {XMC_GPIO_PORT1, 6}, // GPIO / IO_0 P1.6 X1-7 /* 5 */ {XMC_GPIO_PORT3, 3}, // PWM42-3 output / PWM1 P3.3 X2-5 /* 6 */ {XMC_GPIO_PORT3, 4}, // PWM42-2 output / PWM2 P3.4 X2-8 @@ -117,11 +118,11 @@ const XMC_PORT_PIN_t mapping_port_pin[]= /* 8 */ {XMC_GPIO_PORT4, 1}, // GPIO / IO_2 P4.1 X1-6 /* 9 */ {XMC_GPIO_PORT0, 11}, // PWM80-31 output / PWM3 P0.11 X2-7 /* 10 */ {XMC_GPIO_PORT0, 2}, // SPI-SS / PWM80-01 / PWM4 P0.2 X2-16 - /* 11 */ {XMC_GPIO_PORT1, 9}, // SPI-MOSI / PWM41-2 / PWM5 P1.9 X1-10 + /* 11 */ {XMC_GPIO_PORT1, 9}, // SPI-MOSI / PWM41-2 P1.9 X1-10 /* 12 */ {XMC_GPIO_PORT0, 0}, // SPI-MISO P0.0 X2-12 /* 13 */ {XMC_GPIO_PORT1, 8}, // SPI-SCK / GPIO P1.8 X1-9 - /* 14 */ {XMC_GPIO_PORT2, 3}, // AREF TODO: / ETH_RXD1 P2.3 X1-32 - /* 15 */ {XMC_GPIO_PORT2, 5}, // I2C Data / Address SDA / A4 P2.5 (Hardwired to A4) X1-34 + /* 14 */ {XMC_GPIO_PORT2, 3}, // AREF TODO: / ETH_RXD1 / PWM41-2 P2.3 X1-32 + /* 15 */ {XMC_GPIO_PORT2, 5}, // I2C Data / Address SDA / A4 / PWM41-0 P2.5 (Hardwired to A4) X1-34 /* 16 */ {XMC_GPIO_PORT3, 0}, // I2C Clock SCL / A5 - ADC Input P3.0 (Hardwired to A5) X2-19 /* 17 */ {XMC_GPIO_PORT14, 0}, // A0 / ADC Input P14.0 (INPUT ONLY) /* 18 */ {XMC_GPIO_PORT14, 1}, // A1 / ADC Input P14.1 (INPUT ONLY) @@ -134,11 +135,11 @@ const XMC_PORT_PIN_t mapping_port_pin[]= //Additional pins for port X1 starting here /* 25 */ {XMC_GPIO_PORT2, 10}, // GPIO / ETH_LED P2.10 X1-37 - /* 26 */ {XMC_GPIO_PORT2, 8}, // GPIO / ETH_TXDO P2.8 X1-35 + /* 26 */ {XMC_GPIO_PORT2, 8}, // GPIO / ETH_TXDO / PWM80-32 P2.8 X1-35 /* 27 */ {XMC_GPIO_PORT2, 4}, // GPIO / ETH_RXER P2.4 X1-33 /* 28 */ {XMC_GPIO_PORT2, 2}, // GPIO / ETH_RXDO P2.2 X1-31 - /* 29 */ {XMC_GPIO_PORT2, 0}, // GPIO / ETH_MDIO P2.0 X1-29 - /* 30 */ {XMC_GPIO_PORT2, 6}, // PWM8 - / PWM / GPIO4_2GO_2 P2.6 X1-27 + /* 29 */ {XMC_GPIO_PORT2, 0}, // GPIO / ETH_MDIO / PWM81-21 P2.0 X1-29 + /* 30 */ {XMC_GPIO_PORT2, 6}, // PWM80-13 / GPIO4_2GO_2 P2.6 X1-27 /* 31 */ {XMC_GPIO_PORT5, 2}, // GPIO / RST P5.2 X1-25 /* 32 */ {XMC_GPIO_PORT5, 0}, // GPIO1_2GO_1 P5.0 X1-23 /* 33 */ {XMC_GPIO_PORT1, 12}, // GPIO / CAN_TX P1.12 X1-19 @@ -153,10 +154,10 @@ const XMC_PORT_PIN_t mapping_port_pin[]= /* 42 */ {XMC_GPIO_PORT1, 11}, // GPIO / QSPI_CS P1.11 X1-18 /* 43 */ {XMC_GPIO_PORT1, 13}, // GPIO / CAN_RX P1.13 X1-20 /* 44 */ {XMC_GPIO_PORT5, 1}, // GPIO / ETH_INT P5.1 X1-24 - /* 45 */ {XMC_GPIO_PORT5, 7}, // PWM8 - / PWM P5.7 X1-26 - /* 46 */ {XMC_GPIO_PORT2, 7}, // PWM8 - / PWM / ETH_MDC P2.7 X1-28 + /* 45 */ {XMC_GPIO_PORT5, 7}, // PWM81-02 P5.7 X1-26 + /* 46 */ {XMC_GPIO_PORT2, 7}, // PWM80-03 / ETH_MDC P2.7 X1-28 /* 47 */ {XMC_GPIO_PORT2, 1}, // SWV ""DEBUG Do NOT Use ** P2.1 X1-30 - /* 48 */ {XMC_GPIO_PORT2, 9}, // PWM8 - / PWM / ETH_TXD1 P2.9 X1-36 + /* 48 */ {XMC_GPIO_PORT2, 9}, // PWM80-22 / ETH_TXD1 P2.9 X1-36 /* 49 */ {XMC_GPIO_PORT15, 8}, // A16 / ETH_CLK P15.8 X1-38 //Additional pins for port X2 starting here @@ -177,7 +178,7 @@ const XMC_PORT_PIN_t mapping_port_pin[]= /* 64 */ {XMC_GPIO_PORT0, 12}, // CS_MB P0.12 (Chip Select - MikroBUS) X2-10 /* 65 */ {XMC_GPIO_PORT0, 6}, // LED1 P0.6 X2-12 /* 66 */ {XMC_GPIO_PORT0, 4}, // ETH_TXEN P0.4 X2-14 - /* 67 */ {XMC_GPIO_PORT0, 9}, // GPIO4_2GO_1 / PWM80-01 / PWM P0.9 X2-20 + /* 67 */ {XMC_GPIO_PORT0, 9}, // GPIO4_2GO_1 / PWM80-12 / PWM P0.9 X2-20 /* 68 */ {XMC_GPIO_PORT3, 1}, // BUTTON1 P3.1 X2-22 /* 69 */ {XMC_GPIO_PORT14, 13}, // A9 / AN2_2GO_2 - ADC Input P14.13 (INPUT ONLY) X2-26 /* 70 */ {XMC_GPIO_PORT14, 7}, // A7 / AN2_2GO_1 - ADC Input P14.7 (INPUT ONLY) X2-28 @@ -205,8 +206,8 @@ const uint8_t mapping_pin_PWM4[][ 2 ] = { { 6, 2 }, // PWM2 { 27, 3 }, // PWM { 28, 4 }, // PWM - { 57, 5 }, // PWM - { 58, 6 }, // PWM + { 14, 5 }, // PWM + { 15, 6 }, // PWM { 255, 255 } }; /* Configurations of PWM channels for CCU4 type */ @@ -219,8 +220,8 @@ XMC_PWM4_t mapping_pwm4[] = //additional pwm outputs starting here {CCU41, CCU41_CC41, 1, mapping_port_pin[27], P2_4_AF_CCU41_OUT1, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 27 P2.4 {CCU41, CCU41_CC43, 3, mapping_port_pin[28], P2_2_AF_CCU41_OUT3, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 28 P2.2 - {CCU41, CCU41_CC42, 2, mapping_port_pin[57], P2_3_AF_CCU41_OUT2, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 57 P2.3 - {CCU41, CCU41_CC40, 0, mapping_port_pin[58], P2_5_AF_CCU41_OUT0, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 58 P2.5 + {CCU41, CCU41_CC42, 2, mapping_port_pin[14], P2_3_AF_CCU41_OUT2, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 14 P2.3 + {CCU41, CCU41_CC40, 0, mapping_port_pin[15], P2_5_AF_CCU41_OUT0, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 15 P2.5 }; const uint8_t NUM_PWM4 = ( sizeof( mapping_pwm4 ) / sizeof( XMC_PWM4_t ) ); @@ -231,10 +232,10 @@ const uint8_t mapping_pin_PWM8[][ 2 ] = { { 26, 2 }, // PWM { 29, 3 }, // PWM { 30, 4 }, // PWM - { 54, 5 }, // PWM - { 55, 6 }, // PWM - { 59, 7 }, // PWM - { 86, 8 }, // PWM + { 45, 5 }, // PWM + { 46, 6 }, // PWM + { 48, 7 }, // PWM + { 67, 8 }, // PWM { 255, 255 } }; /* Configurations of PWM channels for CCU8 type */ @@ -246,10 +247,10 @@ XMC_PWM8_t mapping_pwm8[] = {CCU80, CCU80_CC83, 3, XMC_CCU8_SLICE_COMPARE_CHANNEL_2, mapping_port_pin[26], P2_8_AF_CCU80_OUT32, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 26 P2.8 {CCU81, CCU81_CC82, 2, XMC_CCU8_SLICE_COMPARE_CHANNEL_1, mapping_port_pin[29], P2_0_AF_CCU81_OUT21, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 29 P2.0 {CCU80, CCU80_CC81, 1, XMC_CCU8_SLICE_COMPARE_CHANNEL_2, mapping_port_pin[30], P2_6_AF_CCU80_OUT13, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 30 P2.6 - {CCU81, CCU81_CC80, 0, XMC_CCU8_SLICE_COMPARE_CHANNEL_2, mapping_port_pin[54], P5_7_AF_CCU81_OUT02, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 54 P5.7 - {CCU80, CCU80_CC80, 0, XMC_CCU8_SLICE_COMPARE_CHANNEL_2, mapping_port_pin[55], P2_7_AF_CCU80_OUT03, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 55 P2.7 - {CCU80, CCU80_CC82, 2, XMC_CCU8_SLICE_COMPARE_CHANNEL_2, mapping_port_pin[59], P2_9_AF_CCU80_OUT22, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 59 P2.9 - {CCU80, CCU80_CC81, 1, XMC_CCU8_SLICE_COMPARE_CHANNEL_2, mapping_port_pin[86], P0_9_AF_CCU80_OUT12, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED} // PWM disabled 86 P0.9 + {CCU81, CCU81_CC80, 0, XMC_CCU8_SLICE_COMPARE_CHANNEL_2, mapping_port_pin[45], P5_7_AF_CCU81_OUT02, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 45 P5.7 + {CCU80, CCU80_CC80, 0, XMC_CCU8_SLICE_COMPARE_CHANNEL_2, mapping_port_pin[46], P2_7_AF_CCU80_OUT03, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 46 P2.7 + {CCU80, CCU80_CC82, 2, XMC_CCU8_SLICE_COMPARE_CHANNEL_2, mapping_port_pin[48], P2_9_AF_CCU80_OUT22, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 48 P2.9 + {CCU80, CCU80_CC81, 1, XMC_CCU8_SLICE_COMPARE_CHANNEL_2, mapping_port_pin[67], P0_9_AF_CCU80_OUT12, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED} // PWM disabled 67 P0.9 }; const uint8_t NUM_PWM8 = ( sizeof( mapping_pwm8 ) / sizeof( XMC_PWM8_t ) ); @@ -259,8 +260,8 @@ const uint8_t NUM_PWM = ( sizeof( mapping_pwm4 ) / sizeof( XMC_PWM4_t ) ) /* Analog Pin mappings and configurations */ #ifdef DAC const uint8_t mapping_pin_DAC[][ 2 ] = { - { 61, 0 }, - { 94, 1 }, + { 50, 0 }, + { 72, 1 }, { 255, 255 } }; /* Analog Pin mappings and configurations */ From 975fd66ff0659e72ef5fc979411a807046ef4f9e Mon Sep 17 00:00:00 2001 From: boramonideep Date: Sun, 17 Jul 2022 10:36:42 +0200 Subject: [PATCH 32/78] initial commit with all necessary files for XMC4200_P2GO --- variants/XMC4200/XMC4200.h | 13238 ++++++++++++++++ .../config/XMC4200_Platform2GO/pins_arduino.h | 447 + variants/XMC4200/linker_script.ld | 286 + variants/XMC4200/startup_XMC4200.S | 434 + variants/XMC4200/system_XMC4200.c | 728 + variants/XMC4200/system_XMC4200.h | 111 + 6 files changed, 15244 insertions(+) create mode 100755 variants/XMC4200/XMC4200.h create mode 100644 variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h create mode 100755 variants/XMC4200/linker_script.ld create mode 100755 variants/XMC4200/startup_XMC4200.S create mode 100755 variants/XMC4200/system_XMC4200.c create mode 100755 variants/XMC4200/system_XMC4200.h diff --git a/variants/XMC4200/XMC4200.h b/variants/XMC4200/XMC4200.h new file mode 100755 index 00000000..427a7ce7 --- /dev/null +++ b/variants/XMC4200/XMC4200.h @@ -0,0 +1,13238 @@ +/********************************************************************************************************************* + * Copyright (c) 2011-2020, Infineon Technologies AG + * All rights reserved. + * + * Boost Software License - Version 1.0 - August 17th, 2003 + * + * Permission is hereby granted, free of charge, to any person or organization + * obtaining a copy of the software and accompanying documentation covered by + * this license (the "Software") to use, reproduce, display, distribute, + * execute, and transmit the Software, and to prepare derivative works of the + * Software, and to permit third-parties to whom the Software is furnished to + * do so, all subject to the following: + * + * The copyright notices in the Software and this entire statement, including + * the above license grant, this restriction and the following disclaimer, + * must be included in all copies of the Software, in whole or in part, and + * all derivative works of the Software, unless such copies or derivative + * works are solely in the form of machine-executable object code generated by + * a source language processor. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT + * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE + * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * To improve the quality of the software, users are encouraged to share + * modifications, enhancements or bug fixes with Infineon Technologies AG + * at XMCSupport@infineon.com. + *********************************************************************************************************************/ + + +/****************************************************************************************************//** + * @file XMC4200.h + * + * @brief CMSIS Cortex-M4 Peripheral Access Layer Header File for + * XMC4200 from Infineon. + * + * @version V1.6.2 (Reference Manual v1.6) + * @date 01. Sep 2020 + * + * @note Generated with SVDConv V2.87l + * from CMSIS SVD File 'XMC4200_Processed_SVD.xml' Version 1.6.0 (Reference Manual v1.6), + * added support for ARM Compiler 6 (armclang) + *******************************************************************************************************/ + + + +/** @addtogroup Infineon + * @{ + */ + +/** @addtogroup XMC4200 + * @{ + */ + +#ifndef XMC4200_H +#define XMC4200_H + +#ifdef __cplusplus +extern "C" { +#endif + + +/* ------------------------- Interrupt Number Definition ------------------------ */ + +typedef enum { +/* ------------------- Cortex-M4 Processor Exceptions Numbers ------------------- */ + Reset_IRQn = -15, /*!< 1 Reset Vector, invoked on Power up and warm reset */ + NonMaskableInt_IRQn = -14, /*!< 2 Non maskable Interrupt, cannot be stopped or preempted */ + HardFault_IRQn = -13, /*!< 3 Hard Fault, all classes of Fault */ + MemoryManagement_IRQn = -12, /*!< 4 Memory Management, MPU mismatch, including Access Violation + and No Match */ + BusFault_IRQn = -11, /*!< 5 Bus Fault, Pre-Fetch-, Memory Access Fault, other address/memory + related Fault */ + UsageFault_IRQn = -10, /*!< 6 Usage Fault, i.e. Undef Instruction, Illegal State Transition */ + SVCall_IRQn = -5, /*!< 11 System Service Call via SVC instruction */ + DebugMonitor_IRQn = -4, /*!< 12 Debug Monitor */ + PendSV_IRQn = -2, /*!< 14 Pendable request for system service */ + SysTick_IRQn = -1, /*!< 15 System Tick Timer */ +/* --------------------- XMC4200 Specific Interrupt Numbers --------------------- */ + SCU_0_IRQn = 0, /*!< 0 System Control */ + ERU0_0_IRQn = 1, /*!< 1 External Request Unit 0 */ + ERU0_1_IRQn = 2, /*!< 2 External Request Unit 0 */ + ERU0_2_IRQn = 3, /*!< 3 External Request Unit 0 */ + ERU0_3_IRQn = 4, /*!< 4 External Request Unit 0 */ + ERU1_0_IRQn = 5, /*!< 5 External Request Unit 1 */ + ERU1_1_IRQn = 6, /*!< 6 External Request Unit 1 */ + ERU1_2_IRQn = 7, /*!< 7 External Request Unit 1 */ + ERU1_3_IRQn = 8, /*!< 8 External Request Unit 1 */ + PMU0_0_IRQn = 12, /*!< 12 Program Management Unit */ + VADC0_C0_0_IRQn = 14, /*!< 14 Analog to Digital Converter Common Block 0 */ + VADC0_C0_1_IRQn = 15, /*!< 15 Analog to Digital Converter Common Block 0 */ + VADC0_C0_2_IRQn = 16, /*!< 16 Analog to Digital Converter Common Block 0 */ + VADC0_C0_3_IRQn = 17, /*!< 17 Analog to Digital Converter Common Block 0 */ + VADC0_G0_0_IRQn = 18, /*!< 18 Analog to Digital Converter Group 0 */ + VADC0_G0_1_IRQn = 19, /*!< 19 Analog to Digital Converter Group 0 */ + VADC0_G0_2_IRQn = 20, /*!< 20 Analog to Digital Converter Group 0 */ + VADC0_G0_3_IRQn = 21, /*!< 21 Analog to Digital Converter Group 0 */ + VADC0_G1_0_IRQn = 22, /*!< 22 Analog to Digital Converter Group 1 */ + VADC0_G1_1_IRQn = 23, /*!< 23 Analog to Digital Converter Group 1 */ + VADC0_G1_2_IRQn = 24, /*!< 24 Analog to Digital Converter Group 1 */ + VADC0_G1_3_IRQn = 25, /*!< 25 Analog to Digital Converter Group 1 */ + DAC0_0_IRQn = 42, /*!< 42 Digital to Analog Converter */ + DAC0_1_IRQn = 43, /*!< 43 Digital to Analog Converter */ + CCU40_0_IRQn = 44, /*!< 44 Capture Compare Unit 4 (Module 0) */ + CCU40_1_IRQn = 45, /*!< 45 Capture Compare Unit 4 (Module 0) */ + CCU40_2_IRQn = 46, /*!< 46 Capture Compare Unit 4 (Module 0) */ + CCU40_3_IRQn = 47, /*!< 47 Capture Compare Unit 4 (Module 0) */ + CCU41_0_IRQn = 48, /*!< 48 Capture Compare Unit 4 (Module 1) */ + CCU41_1_IRQn = 49, /*!< 49 Capture Compare Unit 4 (Module 1) */ + CCU41_2_IRQn = 50, /*!< 50 Capture Compare Unit 4 (Module 1) */ + CCU41_3_IRQn = 51, /*!< 51 Capture Compare Unit 4 (Module 1) */ + CCU80_0_IRQn = 60, /*!< 60 Capture Compare Unit 8 (Module 0) */ + CCU80_1_IRQn = 61, /*!< 61 Capture Compare Unit 8 (Module 0) */ + CCU80_2_IRQn = 62, /*!< 62 Capture Compare Unit 8 (Module 0) */ + CCU80_3_IRQn = 63, /*!< 63 Capture Compare Unit 8 (Module 0) */ + POSIF0_0_IRQn = 68, /*!< 68 Position Interface (Module 0) */ + POSIF0_1_IRQn = 69, /*!< 69 Position Interface (Module 0) */ + HRPWM_0_IRQn = 72, /*!< 72 High Resolution Pulse Width Modulation (Module 0) */ + HRPWM_1_IRQn = 73, /*!< 73 High Resolution Pulse Width Modulation (Module 0) */ + HRPWM_2_IRQn = 74, /*!< 74 High Resolution Pulse Width Modulation (Module 0) */ + HRPWM_3_IRQn = 75, /*!< 75 High Resolution Pulse Width Modulation (Module 0) */ + CAN0_0_IRQn = 76, /*!< 76 MultiCAN */ + CAN0_1_IRQn = 77, /*!< 77 MultiCAN */ + CAN0_2_IRQn = 78, /*!< 78 MultiCAN */ + CAN0_3_IRQn = 79, /*!< 79 MultiCAN */ + CAN0_4_IRQn = 80, /*!< 80 MultiCAN */ + CAN0_5_IRQn = 81, /*!< 81 MultiCAN */ + CAN0_6_IRQn = 82, /*!< 82 MultiCAN */ + CAN0_7_IRQn = 83, /*!< 83 MultiCAN */ + USIC0_0_IRQn = 84, /*!< 84 Universal Serial Interface Channel (Module 0) */ + USIC0_1_IRQn = 85, /*!< 85 Universal Serial Interface Channel (Module 0) */ + USIC0_2_IRQn = 86, /*!< 86 Universal Serial Interface Channel (Module 0) */ + USIC0_3_IRQn = 87, /*!< 87 Universal Serial Interface Channel (Module 0) */ + USIC0_4_IRQn = 88, /*!< 88 Universal Serial Interface Channel (Module 0) */ + USIC0_5_IRQn = 89, /*!< 89 Universal Serial Interface Channel (Module 0) */ + USIC1_0_IRQn = 90, /*!< 90 Universal Serial Interface Channel (Module 1) */ + USIC1_1_IRQn = 91, /*!< 91 Universal Serial Interface Channel (Module 1) */ + USIC1_2_IRQn = 92, /*!< 92 Universal Serial Interface Channel (Module 1) */ + USIC1_3_IRQn = 93, /*!< 93 Universal Serial Interface Channel (Module 1) */ + USIC1_4_IRQn = 94, /*!< 94 Universal Serial Interface Channel (Module 1) */ + USIC1_5_IRQn = 95, /*!< 95 Universal Serial Interface Channel (Module 1) */ + LEDTS0_0_IRQn = 102, /*!< 102 LED and Touch Sense Control Unit (Module 0) */ + FCE0_0_IRQn = 104, /*!< 104 Flexible CRC Engine */ + GPDMA0_0_IRQn = 105, /*!< 105 General Purpose DMA Unit 0 */ + USB0_0_IRQn = 107 /*!< 107 Universal Serial Bus (Module 0) */ +} IRQn_Type; + + +/** @addtogroup Configuration_of_CMSIS + * @{ + */ + + +/* ================================================================================ */ +/* ================ Processor and Core Peripheral Section ================ */ +/* ================================================================================ */ + +/* ----------------Configuration of the Cortex-M4 Processor and Core Peripherals---------------- */ +#define __CM4_REV 0x0200 /*!< Cortex-M4 Core Revision */ +#define __MPU_PRESENT 1 /*!< MPU present or not */ +#define __NVIC_PRIO_BITS 6 /*!< Number of Bits used for Priority Levels */ +#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */ +#define __FPU_PRESENT 1 /*!< FPU present or not */ +/** @} */ /* End of group Configuration_of_CMSIS */ + +#include "core_cm4.h" /*!< Cortex-M4 processor and core peripherals */ +#include "system_XMC4200.h" /*!< XMC4200 System */ + + +/* ================================================================================ */ +/* ================ Device Specific Peripheral Section ================ */ +/* ================================================================================ */ +/* Macro to modify desired bitfields of a register */ +#define WR_REG(reg, mask, pos, val) reg = (((uint32_t)val << pos) & \ + ((uint32_t)mask)) | \ + (reg & ((uint32_t)~((uint32_t)mask))) + +/* Macro to modify desired bitfields of a register */ +#define WR_REG_SIZE(reg, mask, pos, val, size) { \ +uint##size##_t VAL1 = (uint##size##_t)((uint##size##_t)val << pos); \ +uint##size##_t VAL2 = (uint##size##_t) (VAL1 & (uint##size##_t)mask); \ +uint##size##_t VAL3 = (uint##size##_t)~((uint##size##_t)mask); \ +uint##size##_t VAL4 = (uint##size##_t) ((uint##size##_t)reg & VAL3); \ +reg = (uint##size##_t) (VAL2 | VAL4);\ +} + +/** Macro to read bitfields from a register */ +#define RD_REG(reg, mask, pos) (((uint32_t)reg & (uint32_t)mask) >> pos) + +/** Macro to read bitfields from a register */ +#define RD_REG_SIZE(reg, mask, pos,size) ((uint##size##_t)(((uint32_t)reg & \ + (uint32_t)mask) >> pos) ) + +/** Macro to set a bit in register */ +#define SET_BIT(reg, pos) (reg |= ((uint32_t)1<= 6010050) + #pragma clang diagnostic push + #pragma clang diagnostic ignored "-Wc11-extensions" + #pragma clang diagnostic ignored "-Wreserved-id-macro" +#elif defined(__ICCARM__) + #pragma language=extended +#elif defined(__GNUC__) + /* anonymous unions are enabled by default */ +#elif defined(__TMS470__) +/* anonymous unions are enabled by default */ +#elif defined(__TASKING__) + #pragma warning 586 +#else + #warning Not supported compiler type +#endif + + + +/* ================================================================================ */ +/* ================ PPB ================ */ +/* ================================================================================ */ + + +/** + * @brief Cortex-M4 Private Peripheral Block (PPB) + */ + +typedef struct { /*!< (@ 0xE000E000) PPB Structure */ + __I uint32_t RESERVED[2]; + __IO uint32_t ACTLR; /*!< (@ 0xE000E008) Auxiliary Control Register */ + __I uint32_t RESERVED1; + __IO uint32_t SYST_CSR; /*!< (@ 0xE000E010) SysTick Control and Status Register */ + __IO uint32_t SYST_RVR; /*!< (@ 0xE000E014) SysTick Reload Value Register */ + __IO uint32_t SYST_CVR; /*!< (@ 0xE000E018) SysTick Current Value Register */ + __IO uint32_t SYST_CALIB; /*!< (@ 0xE000E01C) SysTick Calibration Value Register r */ + __I uint32_t RESERVED2[56]; + __IO uint32_t NVIC_ISER0; /*!< (@ 0xE000E100) Interrupt Set-enable Register 0 */ + __IO uint32_t NVIC_ISER1; /*!< (@ 0xE000E104) Interrupt Set-enable Register 1 */ + __IO uint32_t NVIC_ISER2; /*!< (@ 0xE000E108) Interrupt Set-enable Register 2 */ + __IO uint32_t NVIC_ISER3; /*!< (@ 0xE000E10C) Interrupt Set-enable Register 3 */ + __I uint32_t RESERVED3[28]; + __IO uint32_t NVIC_ICER0; /*!< (@ 0xE000E180) Interrupt Clear-enable Register 0 */ + __IO uint32_t NVIC_ICER1; /*!< (@ 0xE000E184) Interrupt Clear-enable Register 1 */ + __IO uint32_t NVIC_ICER2; /*!< (@ 0xE000E188) Interrupt Clear-enable Register 2 */ + __IO uint32_t NVIC_ICER3; /*!< (@ 0xE000E18C) Interrupt Clear-enable Register 3 */ + __I uint32_t RESERVED4[28]; + __IO uint32_t NVIC_ISPR0; /*!< (@ 0xE000E200) Interrupt Set-pending Register 0 */ + __IO uint32_t NVIC_ISPR1; /*!< (@ 0xE000E204) Interrupt Set-pending Register 1 */ + __IO uint32_t NVIC_ISPR2; /*!< (@ 0xE000E208) Interrupt Set-pending Register 2 */ + __IO uint32_t NVIC_ISPR3; /*!< (@ 0xE000E20C) Interrupt Set-pending Register 3 */ + __I uint32_t RESERVED5[28]; + __IO uint32_t NVIC_ICPR0; /*!< (@ 0xE000E280) Interrupt Clear-pending Register 0 */ + __IO uint32_t NVIC_ICPR1; /*!< (@ 0xE000E284) Interrupt Clear-pending Register 1 */ + __IO uint32_t NVIC_ICPR2; /*!< (@ 0xE000E288) Interrupt Clear-pending Register 2 */ + __IO uint32_t NVIC_ICPR3; /*!< (@ 0xE000E28C) Interrupt Clear-pending Register 3 */ + __I uint32_t RESERVED6[28]; + __IO uint32_t NVIC_IABR0; /*!< (@ 0xE000E300) Interrupt Active Bit Register 0 */ + __IO uint32_t NVIC_IABR1; /*!< (@ 0xE000E304) Interrupt Active Bit Register 1 */ + __IO uint32_t NVIC_IABR2; /*!< (@ 0xE000E308) Interrupt Active Bit Register 2 */ + __IO uint32_t NVIC_IABR3; /*!< (@ 0xE000E30C) Interrupt Active Bit Register 3 */ + __I uint32_t RESERVED7[60]; + __IO uint32_t NVIC_IPR0; /*!< (@ 0xE000E400) Interrupt Priority Register 0 */ + __IO uint32_t NVIC_IPR1; /*!< (@ 0xE000E404) Interrupt Priority Register 1 */ + __IO uint32_t NVIC_IPR2; /*!< (@ 0xE000E408) Interrupt Priority Register 2 */ + __IO uint32_t NVIC_IPR3; /*!< (@ 0xE000E40C) Interrupt Priority Register 3 */ + __IO uint32_t NVIC_IPR4; /*!< (@ 0xE000E410) Interrupt Priority Register 4 */ + __IO uint32_t NVIC_IPR5; /*!< (@ 0xE000E414) Interrupt Priority Register 5 */ + __IO uint32_t NVIC_IPR6; /*!< (@ 0xE000E418) Interrupt Priority Register 6 */ + __IO uint32_t NVIC_IPR7; /*!< (@ 0xE000E41C) Interrupt Priority Register 7 */ + __IO uint32_t NVIC_IPR8; /*!< (@ 0xE000E420) Interrupt Priority Register 8 */ + __IO uint32_t NVIC_IPR9; /*!< (@ 0xE000E424) Interrupt Priority Register 9 */ + __IO uint32_t NVIC_IPR10; /*!< (@ 0xE000E428) Interrupt Priority Register 10 */ + __IO uint32_t NVIC_IPR11; /*!< (@ 0xE000E42C) Interrupt Priority Register 11 */ + __IO uint32_t NVIC_IPR12; /*!< (@ 0xE000E430) Interrupt Priority Register 12 */ + __IO uint32_t NVIC_IPR13; /*!< (@ 0xE000E434) Interrupt Priority Register 13 */ + __IO uint32_t NVIC_IPR14; /*!< (@ 0xE000E438) Interrupt Priority Register 14 */ + __IO uint32_t NVIC_IPR15; /*!< (@ 0xE000E43C) Interrupt Priority Register 15 */ + __IO uint32_t NVIC_IPR16; /*!< (@ 0xE000E440) Interrupt Priority Register 16 */ + __IO uint32_t NVIC_IPR17; /*!< (@ 0xE000E444) Interrupt Priority Register 17 */ + __IO uint32_t NVIC_IPR18; /*!< (@ 0xE000E448) Interrupt Priority Register 18 */ + __IO uint32_t NVIC_IPR19; /*!< (@ 0xE000E44C) Interrupt Priority Register 19 */ + __IO uint32_t NVIC_IPR20; /*!< (@ 0xE000E450) Interrupt Priority Register 20 */ + __IO uint32_t NVIC_IPR21; /*!< (@ 0xE000E454) Interrupt Priority Register 21 */ + __IO uint32_t NVIC_IPR22; /*!< (@ 0xE000E458) Interrupt Priority Register 22 */ + __IO uint32_t NVIC_IPR23; /*!< (@ 0xE000E45C) Interrupt Priority Register 23 */ + __IO uint32_t NVIC_IPR24; /*!< (@ 0xE000E460) Interrupt Priority Register 24 */ + __IO uint32_t NVIC_IPR25; /*!< (@ 0xE000E464) Interrupt Priority Register 25 */ + __IO uint32_t NVIC_IPR26; /*!< (@ 0xE000E468) Interrupt Priority Register 26 */ + __IO uint32_t NVIC_IPR27; /*!< (@ 0xE000E46C) Interrupt Priority Register 27 */ + __I uint32_t RESERVED8[548]; + __I uint32_t CPUID; /*!< (@ 0xE000ED00) CPUID Base Register */ + __IO uint32_t ICSR; /*!< (@ 0xE000ED04) Interrupt Control and State Register */ + __IO uint32_t VTOR; /*!< (@ 0xE000ED08) Vector Table Offset Register */ + __IO uint32_t AIRCR; /*!< (@ 0xE000ED0C) Application Interrupt and Reset Control Register */ + __IO uint32_t SCR; /*!< (@ 0xE000ED10) System Control Register */ + __IO uint32_t CCR; /*!< (@ 0xE000ED14) Configuration and Control Register */ + __IO uint32_t SHPR1; /*!< (@ 0xE000ED18) System Handler Priority Register 1 */ + __IO uint32_t SHPR2; /*!< (@ 0xE000ED1C) System Handler Priority Register 2 */ + __IO uint32_t SHPR3; /*!< (@ 0xE000ED20) System Handler Priority Register 3 */ + __IO uint32_t SHCSR; /*!< (@ 0xE000ED24) System Handler Control and State Register */ + __IO uint32_t CFSR; /*!< (@ 0xE000ED28) Configurable Fault Status Register */ + __IO uint32_t HFSR; /*!< (@ 0xE000ED2C) HardFault Status Register */ + __I uint32_t RESERVED9; + __IO uint32_t MMFAR; /*!< (@ 0xE000ED34) MemManage Fault Address Register */ + __IO uint32_t BFAR; /*!< (@ 0xE000ED38) BusFault Address Register */ + __IO uint32_t AFSR; /*!< (@ 0xE000ED3C) Auxiliary Fault Status Register */ + __I uint32_t RESERVED10[18]; + __IO uint32_t CPACR; /*!< (@ 0xE000ED88) Coprocessor Access Control Register */ + __I uint32_t RESERVED11; + __I uint32_t MPU_TYPE; /*!< (@ 0xE000ED90) MPU Type Register */ + __IO uint32_t MPU_CTRL; /*!< (@ 0xE000ED94) MPU Control Register */ + __IO uint32_t MPU_RNR; /*!< (@ 0xE000ED98) MPU Region Number Register */ + __IO uint32_t MPU_RBAR; /*!< (@ 0xE000ED9C) MPU Region Base Address Register */ + __IO uint32_t MPU_RASR; /*!< (@ 0xE000EDA0) MPU Region Attribute and Size Register */ + __IO uint32_t MPU_RBAR_A1; /*!< (@ 0xE000EDA4) MPU Region Base Address Register A1 */ + __IO uint32_t MPU_RASR_A1; /*!< (@ 0xE000EDA8) MPU Region Attribute and Size Register A1 */ + __IO uint32_t MPU_RBAR_A2; /*!< (@ 0xE000EDAC) MPU Region Base Address Register A2 */ + __IO uint32_t MPU_RASR_A2; /*!< (@ 0xE000EDB0) MPU Region Attribute and Size Register A2 */ + __IO uint32_t MPU_RBAR_A3; /*!< (@ 0xE000EDB4) MPU Region Base Address Register A3 */ + __IO uint32_t MPU_RASR_A3; /*!< (@ 0xE000EDB8) MPU Region Attribute and Size Register A3 */ + __I uint32_t RESERVED12[81]; + __O uint32_t STIR; /*!< (@ 0xE000EF00) Software Trigger Interrupt Register */ + __I uint32_t RESERVED13[12]; + __IO uint32_t FPCCR; /*!< (@ 0xE000EF34) Floating-point Context Control Register */ + __IO uint32_t FPCAR; /*!< (@ 0xE000EF38) Floating-point Context Address Register */ + __IO uint32_t FPDSCR; /*!< (@ 0xE000EF3C) Floating-point Default Status Control Register */ +} PPB_Type; + + +/* ================================================================================ */ +/* ================ DLR ================ */ +/* ================================================================================ */ + + +/** + * @brief DMA Line Router (DLR) + */ + +typedef struct { /*!< (@ 0x50004900) DLR Structure */ + __I uint32_t OVRSTAT; /*!< (@ 0x50004900) Overrun Status */ + __O uint32_t OVRCLR; /*!< (@ 0x50004904) Overrun Clear */ + __IO uint32_t SRSEL0; /*!< (@ 0x50004908) Service Request Selection 0 */ + __I uint32_t RESERVED; + __IO uint32_t LNEN; /*!< (@ 0x50004910) Line Enable */ +} DLR_GLOBAL_TypeDef; + + +/* ================================================================================ */ +/* ================ ERU [ERU0] ================ */ +/* ================================================================================ */ + + +/** + * @brief Event Request Unit 0 (ERU) + */ + +typedef struct { /*!< (@ 0x50004800) ERU Structure */ + __IO uint32_t EXISEL; /*!< (@ 0x50004800) Event Input Select */ + __I uint32_t RESERVED[3]; + __IO uint32_t EXICON[4]; /*!< (@ 0x50004810) Event Input Control */ + __IO uint32_t EXOCON[4]; /*!< (@ 0x50004820) Event Output Trigger Control */ +} ERU_GLOBAL_TypeDef; + + +/* ================================================================================ */ +/* ================ GPDMA0 ================ */ +/* ================================================================================ */ + + +/** + * @brief General Purpose DMA Unit 0 (GPDMA0) + */ + +typedef struct { /*!< (@ 0x500142C0) GPDMA0 Structure */ + __IO uint32_t RAWTFR; /*!< (@ 0x500142C0) Raw IntTfr Status */ + __I uint32_t RESERVED; + __IO uint32_t RAWBLOCK; /*!< (@ 0x500142C8) Raw IntBlock Status */ + __I uint32_t RESERVED1; + __IO uint32_t RAWSRCTRAN; /*!< (@ 0x500142D0) Raw IntSrcTran Status */ + __I uint32_t RESERVED2; + __IO uint32_t RAWDSTTRAN; /*!< (@ 0x500142D8) Raw IntBlock Status */ + __I uint32_t RESERVED3; + __IO uint32_t RAWERR; /*!< (@ 0x500142E0) Raw IntErr Status */ + __I uint32_t RESERVED4; + __I uint32_t STATUSTFR; /*!< (@ 0x500142E8) IntTfr Status */ + __I uint32_t RESERVED5; + __I uint32_t STATUSBLOCK; /*!< (@ 0x500142F0) IntBlock Status */ + __I uint32_t RESERVED6; + __I uint32_t STATUSSRCTRAN; /*!< (@ 0x500142F8) IntSrcTran Status */ + __I uint32_t RESERVED7; + __I uint32_t STATUSDSTTRAN; /*!< (@ 0x50014300) IntBlock Status */ + __I uint32_t RESERVED8; + __I uint32_t STATUSERR; /*!< (@ 0x50014308) IntErr Status */ + __I uint32_t RESERVED9; + __IO uint32_t MASKTFR; /*!< (@ 0x50014310) Mask for Raw IntTfr Status */ + __I uint32_t RESERVED10; + __IO uint32_t MASKBLOCK; /*!< (@ 0x50014318) Mask for Raw IntBlock Status */ + __I uint32_t RESERVED11; + __IO uint32_t MASKSRCTRAN; /*!< (@ 0x50014320) Mask for Raw IntSrcTran Status */ + __I uint32_t RESERVED12; + __IO uint32_t MASKDSTTRAN; /*!< (@ 0x50014328) Mask for Raw IntBlock Status */ + __I uint32_t RESERVED13; + __IO uint32_t MASKERR; /*!< (@ 0x50014330) Mask for Raw IntErr Status */ + __I uint32_t RESERVED14; + __O uint32_t CLEARTFR; /*!< (@ 0x50014338) IntTfr Status */ + __I uint32_t RESERVED15; + __O uint32_t CLEARBLOCK; /*!< (@ 0x50014340) IntBlock Status */ + __I uint32_t RESERVED16; + __O uint32_t CLEARSRCTRAN; /*!< (@ 0x50014348) IntSrcTran Status */ + __I uint32_t RESERVED17; + __O uint32_t CLEARDSTTRAN; /*!< (@ 0x50014350) IntBlock Status */ + __I uint32_t RESERVED18; + __O uint32_t CLEARERR; /*!< (@ 0x50014358) IntErr Status */ + __I uint32_t RESERVED19; + __I uint32_t STATUSINT; /*!< (@ 0x50014360) Combined Interrupt Status Register */ + __I uint32_t RESERVED20; + __IO uint32_t REQSRCREG; /*!< (@ 0x50014368) Source Software Transaction Request Register */ + __I uint32_t RESERVED21; + __IO uint32_t REQDSTREG; /*!< (@ 0x50014370) Destination Software Transaction Request Register */ + __I uint32_t RESERVED22; + __IO uint32_t SGLREQSRCREG; /*!< (@ 0x50014378) Single Source Transaction Request Register */ + __I uint32_t RESERVED23; + __IO uint32_t SGLREQDSTREG; /*!< (@ 0x50014380) Single Destination Transaction Request Register */ + __I uint32_t RESERVED24; + __IO uint32_t LSTSRCREG; /*!< (@ 0x50014388) Last Source Transaction Request Register */ + __I uint32_t RESERVED25; + __IO uint32_t LSTDSTREG; /*!< (@ 0x50014390) Last Destination Transaction Request Register */ + __I uint32_t RESERVED26; + __IO uint32_t DMACFGREG; /*!< (@ 0x50014398) GPDMA Configuration Register */ + __I uint32_t RESERVED27; + __IO uint32_t CHENREG; /*!< (@ 0x500143A0) GPDMA Channel Enable Register */ + __I uint32_t RESERVED28; + __I uint32_t ID; /*!< (@ 0x500143A8) GPDMA0 ID Register */ + __I uint32_t RESERVED29[19]; + __I uint32_t TYPE; /*!< (@ 0x500143F8) GPDMA Component Type */ + __I uint32_t VERSION; /*!< (@ 0x500143FC) DMA Component Version */ +} GPDMA0_GLOBAL_TypeDef; + + +/* ================================================================================ */ +/* ================ GPDMA0_CH0_1 [GPDMA0_CH0] ================ */ +/* ================================================================================ */ + + +/** + * @brief General Purpose DMA Unit 0 (GPDMA0_CH0_1) + */ + +typedef struct { /*!< (@ 0x50014000) GPDMA0_CH0_1 Structure */ + __IO uint32_t SAR; /*!< (@ 0x50014000) Source Address Register */ + __I uint32_t RESERVED; + __IO uint32_t DAR; /*!< (@ 0x50014008) Destination Address Register */ + __I uint32_t RESERVED1; + __IO uint32_t LLP; /*!< (@ 0x50014010) Linked List Pointer Register */ + __I uint32_t RESERVED2; + __IO uint32_t CTLL; /*!< (@ 0x50014018) Control Register Low */ + __IO uint32_t CTLH; /*!< (@ 0x5001401C) Control Register High */ + __IO uint32_t SSTAT; /*!< (@ 0x50014020) Source Status Register */ + __I uint32_t RESERVED3; + __IO uint32_t DSTAT; /*!< (@ 0x50014028) Destination Status Register */ + __I uint32_t RESERVED4; + __IO uint32_t SSTATAR; /*!< (@ 0x50014030) Source Status Address Register */ + __I uint32_t RESERVED5; + __IO uint32_t DSTATAR; /*!< (@ 0x50014038) Destination Status Address Register */ + __I uint32_t RESERVED6; + __IO uint32_t CFGL; /*!< (@ 0x50014040) Configuration Register Low */ + __IO uint32_t CFGH; /*!< (@ 0x50014044) Configuration Register High */ + __IO uint32_t SGR; /*!< (@ 0x50014048) Source Gather Register */ + __I uint32_t RESERVED7; + __IO uint32_t DSR; /*!< (@ 0x50014050) Destination Scatter Register */ +} GPDMA0_CH_TypeDef; + + +/* ================================================================================ */ +/* ================ GPDMA0_CH2_7 [GPDMA0_CH2] ================ */ +/* ================================================================================ */ + + +/** + * @brief General Purpose DMA Unit 0 (GPDMA0_CH2_7) + */ + +typedef struct { /*!< (@ 0x500140B0) GPDMA0_CH2_7 Structure */ + __IO uint32_t SAR; /*!< (@ 0x500140B0) Source Address Register */ + __I uint32_t RESERVED; + __IO uint32_t DAR; /*!< (@ 0x500140B8) Destination Address Register */ + __I uint32_t RESERVED1[3]; + __IO uint32_t CTLL; /*!< (@ 0x500140C8) Control Register Low */ + __IO uint32_t CTLH; /*!< (@ 0x500140CC) Control Register High */ + __I uint32_t RESERVED2[8]; + __IO uint32_t CFGL; /*!< (@ 0x500140F0) Configuration Register Low */ + __IO uint32_t CFGH; /*!< (@ 0x500140F4) Configuration Register High */ +} GPDMA0_CH2_7_Type; + + +/* ================================================================================ */ +/* ================ FCE ================ */ +/* ================================================================================ */ + + +/** + * @brief Flexible CRC Engine (FCE) + */ + +typedef struct { /*!< (@ 0x50020000) FCE Structure */ + __IO uint32_t CLC; /*!< (@ 0x50020000) Clock Control Register */ + __I uint32_t RESERVED; + __I uint32_t ID; /*!< (@ 0x50020008) Module Identification Register */ +} FCE_GLOBAL_TypeDef; + + +/* ================================================================================ */ +/* ================ FCE_KE [FCE_KE0] ================ */ +/* ================================================================================ */ + + +/** + * @brief Flexible CRC Engine (FCE_KE) + */ + +typedef struct { /*!< (@ 0x50020020) FCE_KE Structure */ + __IO uint32_t IR; /*!< (@ 0x50020020) Input Register */ + __I uint32_t RES; /*!< (@ 0x50020024) CRC Result Register */ + __IO uint32_t CFG; /*!< (@ 0x50020028) CRC Configuration Register */ + __IO uint32_t STS; /*!< (@ 0x5002002C) CRC Status Register */ + __IO uint32_t LENGTH; /*!< (@ 0x50020030) CRC Length Register */ + __IO uint32_t CHECK; /*!< (@ 0x50020034) CRC Check Register */ + __IO uint32_t CRC; /*!< (@ 0x50020038) CRC Register */ + __IO uint32_t CTR; /*!< (@ 0x5002003C) CRC Test Register */ +} FCE_KE_TypeDef; + + +/* ================================================================================ */ +/* ================ PBA [PBA0] ================ */ +/* ================================================================================ */ + + +/** + * @brief Peripheral Bridge AHB 0 (PBA) + */ + +typedef struct { /*!< (@ 0x40000000) PBA Structure */ + __IO uint32_t STS; /*!< (@ 0x40000000) Peripheral Bridge Status Register */ + __I uint32_t WADDR; /*!< (@ 0x40000004) PBA Write Error Address Register */ +} PBA_GLOBAL_TypeDef; + + +/* ================================================================================ */ +/* ================ FLASH [FLASH0] ================ */ +/* ================================================================================ */ + + +/** + * @brief Flash Memory Controller (FLASH) + */ + +typedef struct { /*!< (@ 0x58001000) FLASH Structure */ + __I uint32_t RESERVED[1026]; + __I uint32_t ID; /*!< (@ 0x58002008) Flash Module Identification Register */ + __I uint32_t RESERVED1; + __I uint32_t FSR; /*!< (@ 0x58002010) Flash Status Register */ + __IO uint32_t FCON; /*!< (@ 0x58002014) Flash Configuration Register */ + __IO uint32_t MARP; /*!< (@ 0x58002018) Margin Control Register PFLASH */ + __I uint32_t RESERVED2; + __I uint32_t PROCON0; /*!< (@ 0x58002020) Flash Protection Configuration Register User + 0 */ + __I uint32_t PROCON1; /*!< (@ 0x58002024) Flash Protection Configuration Register User + 1 */ + __I uint32_t PROCON2; /*!< (@ 0x58002028) Flash Protection Configuration Register User + 2 */ +} FLASH0_GLOBAL_TypeDef; + + +/* ================================================================================ */ +/* ================ PREF ================ */ +/* ================================================================================ */ + + +/** + * @brief Prefetch Unit (PREF) + */ + +typedef struct { /*!< (@ 0x58004000) PREF Structure */ + __IO uint32_t PCON; /*!< (@ 0x58004000) Prefetch Configuration Register */ +} PREF_GLOBAL_TypeDef; + + +/* ================================================================================ */ +/* ================ PMU [PMU0] ================ */ +/* ================================================================================ */ + + +/** + * @brief Program Management Unit (PMU) + */ + +typedef struct { /*!< (@ 0x58000508) PMU Structure */ + __I uint32_t ID; /*!< (@ 0x58000508) PMU0 Identification Register */ +} PMU0_GLOBAL_TypeDef; + + +/* ================================================================================ */ +/* ================ WDT ================ */ +/* ================================================================================ */ + + +/** + * @brief Watch Dog Timer (WDT) + */ + +typedef struct { /*!< (@ 0x50008000) WDT Structure */ + __I uint32_t ID; /*!< (@ 0x50008000) WDT ID Register */ + __IO uint32_t CTR; /*!< (@ 0x50008004) WDT Control Register */ + __O uint32_t SRV; /*!< (@ 0x50008008) WDT Service Register */ + __I uint32_t TIM; /*!< (@ 0x5000800C) WDT Timer Register */ + __IO uint32_t WLB; /*!< (@ 0x50008010) WDT Window Lower Bound Register */ + __IO uint32_t WUB; /*!< (@ 0x50008014) WDT Window Upper Bound Register */ + __I uint32_t WDTSTS; /*!< (@ 0x50008018) WDT Status Register */ + __O uint32_t WDTCLR; /*!< (@ 0x5000801C) WDT Clear Register */ +} WDT_GLOBAL_TypeDef; + + +/* ================================================================================ */ +/* ================ RTC ================ */ +/* ================================================================================ */ + + +/** + * @brief Real Time Clock (RTC) + */ + +typedef struct { /*!< (@ 0x50004A00) RTC Structure */ + __I uint32_t ID; /*!< (@ 0x50004A00) RTC ID Register */ + __IO uint32_t CTR; /*!< (@ 0x50004A04) RTC Control Register */ + __I uint32_t RAWSTAT; /*!< (@ 0x50004A08) RTC Raw Service Request Register */ + __I uint32_t STSSR; /*!< (@ 0x50004A0C) RTC Service Request Status Register */ + __IO uint32_t MSKSR; /*!< (@ 0x50004A10) RTC Service Request Mask Register */ + __O uint32_t CLRSR; /*!< (@ 0x50004A14) RTC Clear Service Request Register */ + __IO uint32_t ATIM0; /*!< (@ 0x50004A18) RTC Alarm Time Register 0 */ + __IO uint32_t ATIM1; /*!< (@ 0x50004A1C) RTC Alarm Time Register 1 */ + __IO uint32_t TIM0; /*!< (@ 0x50004A20) RTC Time Register 0 */ + __IO uint32_t TIM1; /*!< (@ 0x50004A24) RTC Time Register 1 */ +} RTC_GLOBAL_TypeDef; + + +/* ================================================================================ */ +/* ================ SCU_CLK ================ */ +/* ================================================================================ */ + + +/** + * @brief System Control Unit (SCU_CLK) + */ + +typedef struct { /*!< (@ 0x50004600) SCU_CLK Structure */ + __I uint32_t CLKSTAT; /*!< (@ 0x50004600) Clock Status Register */ + __O uint32_t CLKSET; /*!< (@ 0x50004604) CLK Set Register */ + __O uint32_t CLKCLR; /*!< (@ 0x50004608) CLK Clear Register */ + __IO uint32_t SYSCLKCR; /*!< (@ 0x5000460C) System Clock Control Register */ + __IO uint32_t CPUCLKCR; /*!< (@ 0x50004610) CPU Clock Control Register */ + __IO uint32_t PBCLKCR; /*!< (@ 0x50004614) Peripheral Bus Clock Control Register */ + __IO uint32_t USBCLKCR; /*!< (@ 0x50004618) USB Clock Control Register */ + __I uint32_t RESERVED; + __IO uint32_t CCUCLKCR; /*!< (@ 0x50004620) CCU Clock Control Register */ + __IO uint32_t WDTCLKCR; /*!< (@ 0x50004624) WDT Clock Control Register */ + __IO uint32_t EXTCLKCR; /*!< (@ 0x50004628) External Clock Control */ + __IO uint32_t MLINKCLKCR; /*!< (@ 0x5000462C) Multi-Link Clock Control */ + __IO uint32_t SLEEPCR; /*!< (@ 0x50004630) Sleep Control Register */ + __IO uint32_t DSLEEPCR; /*!< (@ 0x50004634) Deep Sleep Control Register */ + __I uint32_t RESERVED1[2]; + __I uint32_t CGATSTAT0; /*!< (@ 0x50004640) Peripheral 0 Clock Gating Status */ + __O uint32_t CGATSET0; /*!< (@ 0x50004644) Peripheral 0 Clock Gating Set */ + __O uint32_t CGATCLR0; /*!< (@ 0x50004648) Peripheral 0 Clock Gating Clear */ + __I uint32_t CGATSTAT1; /*!< (@ 0x5000464C) Peripheral 1 Clock Gating Status */ + __O uint32_t CGATSET1; /*!< (@ 0x50004650) Peripheral 1 Clock Gating Set */ + __O uint32_t CGATCLR1; /*!< (@ 0x50004654) Peripheral 1 Clock Gating Clear */ + __I uint32_t CGATSTAT2; /*!< (@ 0x50004658) Peripheral 2 Clock Gating Status */ + __O uint32_t CGATSET2; /*!< (@ 0x5000465C) Peripheral 2 Clock Gating Set */ + __O uint32_t CGATCLR2; /*!< (@ 0x50004660) Peripheral 2 Clock Gating Clear */ +} SCU_CLK_TypeDef; + + +/* ================================================================================ */ +/* ================ SCU_OSC ================ */ +/* ================================================================================ */ + + +/** + * @brief System Control Unit (SCU_OSC) + */ + +typedef struct { /*!< (@ 0x50004700) SCU_OSC Structure */ + __I uint32_t OSCHPSTAT; /*!< (@ 0x50004700) OSC_HP Status Register */ + __IO uint32_t OSCHPCTRL; /*!< (@ 0x50004704) OSC_HP Control Register */ + __I uint32_t RESERVED; + __IO uint32_t CLKCALCONST; /*!< (@ 0x5000470C) Clock Calibration Constant Register */ +} SCU_OSC_TypeDef; + + +/* ================================================================================ */ +/* ================ SCU_PLL ================ */ +/* ================================================================================ */ + + +/** + * @brief System Control Unit (SCU_PLL) + */ + +typedef struct { /*!< (@ 0x50004710) SCU_PLL Structure */ + __I uint32_t PLLSTAT; /*!< (@ 0x50004710) PLL Status Register */ + __IO uint32_t PLLCON0; /*!< (@ 0x50004714) PLL Configuration 0 Register */ + __IO uint32_t PLLCON1; /*!< (@ 0x50004718) PLL Configuration 1 Register */ + __IO uint32_t PLLCON2; /*!< (@ 0x5000471C) PLL Configuration 2 Register */ + __I uint32_t USBPLLSTAT; /*!< (@ 0x50004720) USB PLL Status Register */ + __IO uint32_t USBPLLCON; /*!< (@ 0x50004724) USB PLL Configuration Register */ + __I uint32_t RESERVED[4]; + __I uint32_t CLKMXSTAT; /*!< (@ 0x50004738) Clock Multiplexing Status Register */ +} SCU_PLL_TypeDef; + + +/* ================================================================================ */ +/* ================ SCU_GENERAL ================ */ +/* ================================================================================ */ + + +/** + * @brief System Control Unit (SCU_GENERAL) + */ + +typedef struct { /*!< (@ 0x50004000) SCU_GENERAL Structure */ + __I uint32_t ID; /*!< (@ 0x50004000) SCU Module ID Register */ + __I uint32_t IDCHIP; /*!< (@ 0x50004004) Chip ID Register */ + __I uint32_t IDMANUF; /*!< (@ 0x50004008) Manufactory ID Register */ + __I uint32_t RESERVED; + __IO uint32_t STCON; /*!< (@ 0x50004010) Startup Configuration Register */ + __I uint32_t RESERVED1[6]; + __IO uint32_t GPR[2]; /*!< (@ 0x5000402C) General Purpose Register 0 */ + __I uint32_t RESERVED2[6]; + __IO uint32_t CCUCON; /*!< (@ 0x5000404C) CCU Control Register */ + __I uint32_t RESERVED3[15]; + __IO uint32_t DTSCON; /*!< (@ 0x5000408C) Die Temperature Sensor Control Register */ + __I uint32_t DTSSTAT; /*!< (@ 0x50004090) Die Temperature Sensor Status Register */ + __I uint32_t RESERVED4[3]; + __IO uint32_t GORCEN[2]; /*!< (@ 0x500040A0) Out of Range Comparator Enable Register 0 */ + __IO uint32_t DTEMPLIM; /*!< (@ 0x500040A8) Die Temperature Sensor Limit Register */ + __I uint32_t DTEMPALARM; /*!< (@ 0x500040AC) Die Temperature Sensor Alarm Register */ + __I uint32_t RESERVED5[5]; + __I uint32_t MIRRSTS; /*!< (@ 0x500040C4) Mirror Write Status Register */ + __IO uint32_t RMACR; /*!< (@ 0x500040C8) Retention Memory Access Control Register */ + __IO uint32_t RMDATA; /*!< (@ 0x500040CC) Retention Memory Access Data Register */ + __I uint32_t MIRRALLSTAT; /*!< (@ 0x500040D0) Mirror All Status */ + __O uint32_t MIRRALLREQ; /*!< (@ 0x500040D4) Mirror All Request */ +} SCU_GENERAL_TypeDef; + + +/* ================================================================================ */ +/* ================ SCU_INTERRUPT ================ */ +/* ================================================================================ */ + + +/** + * @brief System Control Unit (SCU_INTERRUPT) + */ + +typedef struct { /*!< (@ 0x50004074) SCU_INTERRUPT Structure */ + __I uint32_t SRSTAT; /*!< (@ 0x50004074) SCU Service Request Status */ + __I uint32_t SRRAW; /*!< (@ 0x50004078) SCU Raw Service Request Status */ + __IO uint32_t SRMSK; /*!< (@ 0x5000407C) SCU Service Request Mask */ + __O uint32_t SRCLR; /*!< (@ 0x50004080) SCU Service Request Clear */ + __O uint32_t SRSET; /*!< (@ 0x50004084) SCU Service Request Set */ + __IO uint32_t NMIREQEN; /*!< (@ 0x50004088) SCU Service Request Mask */ +} SCU_INTERRUPT_TypeDef; + + +/* ================================================================================ */ +/* ================ SCU_PARITY ================ */ +/* ================================================================================ */ + + +/** + * @brief System Control Unit (SCU_PARITY) + */ + +typedef struct { /*!< (@ 0x5000413C) SCU_PARITY Structure */ + __IO uint32_t PEEN; /*!< (@ 0x5000413C) Parity Error Enable Register */ + __IO uint32_t MCHKCON; /*!< (@ 0x50004140) Memory Checking Control Register */ + __IO uint32_t PETE; /*!< (@ 0x50004144) Parity Error Trap Enable Register */ + __IO uint32_t PERSTEN; /*!< (@ 0x50004148) Parity Error Reset Enable Register */ + __I uint32_t RESERVED; + __IO uint32_t PEFLAG; /*!< (@ 0x50004150) Parity Error Flag Register */ + __IO uint32_t PMTPR; /*!< (@ 0x50004154) Parity Memory Test Pattern Register */ + __IO uint32_t PMTSR; /*!< (@ 0x50004158) Parity Memory Test Select Register */ +} SCU_PARITY_TypeDef; + + +/* ================================================================================ */ +/* ================ SCU_TRAP ================ */ +/* ================================================================================ */ + + +/** + * @brief System Control Unit (SCU_TRAP) + */ + +typedef struct { /*!< (@ 0x50004160) SCU_TRAP Structure */ + __I uint32_t TRAPSTAT; /*!< (@ 0x50004160) Trap Status Register */ + __I uint32_t TRAPRAW; /*!< (@ 0x50004164) Trap Raw Status Register */ + __IO uint32_t TRAPDIS; /*!< (@ 0x50004168) Trap Disable Register */ + __O uint32_t TRAPCLR; /*!< (@ 0x5000416C) Trap Clear Register */ + __O uint32_t TRAPSET; /*!< (@ 0x50004170) Trap Set Register */ +} SCU_TRAP_TypeDef; + + +/* ================================================================================ */ +/* ================ SCU_HIBERNATE ================ */ +/* ================================================================================ */ + + +/** + * @brief System Control Unit (SCU_HIBERNATE) + */ + +typedef struct { /*!< (@ 0x50004300) SCU_HIBERNATE Structure */ + __I uint32_t HDSTAT; /*!< (@ 0x50004300) Hibernate Domain Status Register */ + __O uint32_t HDCLR; /*!< (@ 0x50004304) Hibernate Domain Status Clear Register */ + __O uint32_t HDSET; /*!< (@ 0x50004308) Hibernate Domain Status Set Register */ + __IO uint32_t HDCR; /*!< (@ 0x5000430C) Hibernate Domain Control Register */ + __I uint32_t RESERVED; + __IO uint32_t OSCSICTRL; /*!< (@ 0x50004314) fOSI Control Register */ + __I uint32_t OSCULSTAT; /*!< (@ 0x50004318) OSC_ULP Status Register */ + __IO uint32_t OSCULCTRL; /*!< (@ 0x5000431C) OSC_ULP Control Register */ + __IO uint32_t LPACCONF; /*!< (@ 0x50004320) Analog Wake-up Configuration Register */ + __IO uint32_t LPACTH0; /*!< (@ 0x50004324) LPAC Threshold Register 0 */ + __IO uint32_t LPACTH1; /*!< (@ 0x50004328) LPAC Threshold Register 1 */ + __I uint32_t LPACST; /*!< (@ 0x5000432C) Hibernate Analog Control State Register */ + __O uint32_t LPACCLR; /*!< (@ 0x50004330) LPAC Control Clear Register */ + __O uint32_t LPACSET; /*!< (@ 0x50004334) LPAC Control Set Register */ + __I uint32_t HINTST; /*!< (@ 0x50004338) Hibernate Internal Control State Register */ + __O uint32_t HINTCLR; /*!< (@ 0x5000433C) Hibernate Internal Control Clear Register */ + __O uint32_t HINTSET; /*!< (@ 0x50004340) Hibernate Internal Control Set Register */ +} SCU_HIBERNATE_TypeDef; + + +/* ================================================================================ */ +/* ================ SCU_POWER ================ */ +/* ================================================================================ */ + + +/** + * @brief System Control Unit (SCU_POWER) + */ + +typedef struct { /*!< (@ 0x50004200) SCU_POWER Structure */ + __I uint32_t PWRSTAT; /*!< (@ 0x50004200) PCU Status Register */ + __O uint32_t PWRSET; /*!< (@ 0x50004204) PCU Set Control Register */ + __O uint32_t PWRCLR; /*!< (@ 0x50004208) PCU Clear Control Register */ + __I uint32_t RESERVED; + __I uint32_t EVRSTAT; /*!< (@ 0x50004210) EVR Status Register */ + __I uint32_t EVRVADCSTAT; /*!< (@ 0x50004214) EVR VADC Status Register */ + __I uint32_t RESERVED1[5]; + __IO uint32_t PWRMON; /*!< (@ 0x5000422C) Power Monitor Control */ +} SCU_POWER_TypeDef; + + +/* ================================================================================ */ +/* ================ SCU_RESET ================ */ +/* ================================================================================ */ + + +/** + * @brief System Control Unit (SCU_RESET) + */ + +typedef struct { /*!< (@ 0x50004400) SCU_RESET Structure */ + __I uint32_t RSTSTAT; /*!< (@ 0x50004400) RCU Reset Status */ + __O uint32_t RSTSET; /*!< (@ 0x50004404) RCU Reset Set Register */ + __O uint32_t RSTCLR; /*!< (@ 0x50004408) RCU Reset Clear Register */ + __I uint32_t PRSTAT0; /*!< (@ 0x5000440C) RCU Peripheral 0 Reset Status */ + __O uint32_t PRSET0; /*!< (@ 0x50004410) RCU Peripheral 0 Reset Set */ + __O uint32_t PRCLR0; /*!< (@ 0x50004414) RCU Peripheral 0 Reset Clear */ + __I uint32_t PRSTAT1; /*!< (@ 0x50004418) RCU Peripheral 1 Reset Status */ + __O uint32_t PRSET1; /*!< (@ 0x5000441C) RCU Peripheral 1 Reset Set */ + __O uint32_t PRCLR1; /*!< (@ 0x50004420) RCU Peripheral 1 Reset Clear */ + __I uint32_t PRSTAT2; /*!< (@ 0x50004424) RCU Peripheral 2 Reset Status */ + __O uint32_t PRSET2; /*!< (@ 0x50004428) RCU Peripheral 2 Reset Set */ + __O uint32_t PRCLR2; /*!< (@ 0x5000442C) RCU Peripheral 2 Reset Clear */ +} SCU_RESET_TypeDef; + + +/* ================================================================================ */ +/* ================ LEDTS [LEDTS0] ================ */ +/* ================================================================================ */ + + +/** + * @brief LED and Touch Sense Unit 0 (LEDTS) + */ + +typedef struct { /*!< (@ 0x48010000) LEDTS Structure */ + __I uint32_t ID; /*!< (@ 0x48010000) Module Identification Register */ + __IO uint32_t GLOBCTL; /*!< (@ 0x48010004) Global Control Register */ + __IO uint32_t FNCTL; /*!< (@ 0x48010008) Function Control Register */ + __O uint32_t EVFR; /*!< (@ 0x4801000C) Event Flag Register */ + __IO uint32_t TSVAL; /*!< (@ 0x48010010) Touch-sense TS-Counter Value */ + __IO uint32_t LINE0; /*!< (@ 0x48010014) Line Pattern Register 0 */ + __IO uint32_t LINE1; /*!< (@ 0x48010018) Line Pattern Register 1 */ + __IO uint32_t LDCMP0; /*!< (@ 0x4801001C) LED Compare Register 0 */ + __IO uint32_t LDCMP1; /*!< (@ 0x48010020) LED Compare Register 1 */ + __IO uint32_t TSCMP0; /*!< (@ 0x48010024) Touch-sense Compare Register 0 */ + __IO uint32_t TSCMP1; /*!< (@ 0x48010028) Touch-sense Compare Register 1 */ +} LEDTS0_GLOBAL_TypeDef; + + +/* ================================================================================ */ +/* ================ USB [USB0] ================ */ +/* ================================================================================ */ + + +/** + * @brief Universal Serial Bus (USB) + */ + +typedef struct { /*!< (@ 0x50040000) USB Structure */ + __I uint32_t RESERVED[2]; + __IO uint32_t GAHBCFG; /*!< (@ 0x50040008) AHB Configuration Register */ + __IO uint32_t GUSBCFG; /*!< (@ 0x5004000C) USB Configuration Register */ + __IO uint32_t GRSTCTL; /*!< (@ 0x50040010) Reset Register */ + __IO uint32_t GINTSTS; /*!< (@ 0x50040014) Interrupt Register */ + __IO uint32_t GINTMSK; /*!< (@ 0x50040018) Interrupt Mask Register */ + __I uint32_t GRXSTSR; /*!< (@ 0x5004001C) Receive Status Debug Read Register */ + __I uint32_t GRXSTSP; /*!< (@ 0x50040020) Receive Status Read and Pop Register */ + __IO uint32_t GRXFSIZ; /*!< (@ 0x50040024) Receive FIFO Size Register */ + __IO uint32_t GNPTXFSIZ; /*!< (@ 0x50040028) Non-Periodic Transmit FIFO Size Register */ + __I uint32_t RESERVED1[4]; + __IO uint32_t GUID; /*!< (@ 0x5004003C) USB Module Identification Register */ + __I uint32_t RESERVED2[7]; + __IO uint32_t GDFIFOCFG; /*!< (@ 0x5004005C) Global DFIFO Software Config Register */ + __I uint32_t RESERVED3[41]; + __IO uint32_t DIEPTXF1; /*!< (@ 0x50040104) Device IN Endpoint 1 Transmit FIFO Size Register */ + __IO uint32_t DIEPTXF2; /*!< (@ 0x50040108) Device IN Endpoint 2 Transmit FIFO Size Register */ + __IO uint32_t DIEPTXF3; /*!< (@ 0x5004010C) Device IN Endpoint 3 Transmit FIFO Size Register */ + __IO uint32_t DIEPTXF4; /*!< (@ 0x50040110) Device IN Endpoint 4 Transmit FIFO Size Register */ + __IO uint32_t DIEPTXF5; /*!< (@ 0x50040114) Device IN Endpoint 5 Transmit FIFO Size Register */ + __IO uint32_t DIEPTXF6; /*!< (@ 0x50040118) Device IN Endpoint 6 Transmit FIFO Size Register */ + __I uint32_t RESERVED4[441]; + __IO uint32_t DCFG; /*!< (@ 0x50040800) Device Configuration Register */ + __IO uint32_t DCTL; /*!< (@ 0x50040804) Device Control Register */ + __I uint32_t DSTS; /*!< (@ 0x50040808) Device Status Register */ + __I uint32_t RESERVED5; + __IO uint32_t DIEPMSK; /*!< (@ 0x50040810) Device IN Endpoint Common Interrupt Mask Register */ + __IO uint32_t DOEPMSK; /*!< (@ 0x50040814) Device OUT Endpoint Common Interrupt Mask Register */ + __I uint32_t DAINT; /*!< (@ 0x50040818) Device All Endpoints Interrupt Register */ + __IO uint32_t DAINTMSK; /*!< (@ 0x5004081C) Device All Endpoints Interrupt Mask Register */ + __I uint32_t RESERVED6[2]; + __IO uint32_t DVBUSDIS; /*!< (@ 0x50040828) Device VBUS Discharge Time Register */ + __IO uint32_t DVBUSPULSE; /*!< (@ 0x5004082C) Device VBUS Pulsing Time Register */ + __I uint32_t RESERVED7; + __IO uint32_t DIEPEMPMSK; /*!< (@ 0x50040834) Device IN Endpoint FIFO Empty Interrupt Mask + Register */ + __I uint32_t RESERVED8[370]; + __IO uint32_t PCGCCTL; /*!< (@ 0x50040E00) Power and Clock Gating Control Register */ +} USB0_GLOBAL_TypeDef; + + +/* ================================================================================ */ +/* ================ USB0_EP0 ================ */ +/* ================================================================================ */ + + +/** + * @brief Universal Serial Bus (USB0_EP0) + */ + +typedef struct { /*!< (@ 0x50040900) USB0_EP0 Structure */ + __IO uint32_t DIEPCTL0; /*!< (@ 0x50040900) Device Control IN Endpoint Control Register */ + __I uint32_t RESERVED; + __IO uint32_t DIEPINT0; /*!< (@ 0x50040908) Device Endpoint Interrupt Register */ + __I uint32_t RESERVED1; + __IO uint32_t DIEPTSIZ0; /*!< (@ 0x50040910) Device IN Endpoint Transfer Size Register */ + __IO uint32_t DIEPDMA0; /*!< (@ 0x50040914) Device Endpoint DMA Address Register */ + __I uint32_t DTXFSTS0; /*!< (@ 0x50040918) Device IN Endpoint Transmit FIFO Status Register */ + __I uint32_t DIEPDMAB0; /*!< (@ 0x5004091C) Device Endpoint DMA Buffer Address Register */ + __I uint32_t RESERVED2[120]; + __IO uint32_t DOEPCTL0; /*!< (@ 0x50040B00) Device Control OUT Endpoint Control Register */ + __I uint32_t RESERVED3; + __IO uint32_t DOEPINT0; /*!< (@ 0x50040B08) Device Endpoint Interrupt Register */ + __I uint32_t RESERVED4; + __IO uint32_t DOEPTSIZ0; /*!< (@ 0x50040B10) Device OUT Endpoint Transfer Size Register */ + __IO uint32_t DOEPDMA0; /*!< (@ 0x50040B14) Device Endpoint DMA Address Register */ + __I uint32_t RESERVED5; + __I uint32_t DOEPDMAB0; /*!< (@ 0x50040B1C) Device Endpoint DMA Buffer Address Register */ +} USB0_EP0_TypeDef; + + +/* ================================================================================ */ +/* ================ USB_EP [USB0_EP1] ================ */ +/* ================================================================================ */ + + +/** + * @brief Universal Serial Bus (USB_EP) + */ + +typedef struct { /*!< (@ 0x50040920) USB_EP Structure */ + + union { + __IO uint32_t DIEPCTL_INTBULK; /*!< (@ 0x50040920) Device Endpoint Control Register [INTBULK] */ + __IO uint32_t DIEPCTL_ISOCONT; /*!< (@ 0x50040920) Device Endpoint Control Register [ISOCONT] */ + }; + __I uint32_t RESERVED; + __IO uint32_t DIEPINT; /*!< (@ 0x50040928) Device Endpoint Interrupt Register */ + __I uint32_t RESERVED1; + __IO uint32_t DIEPTSIZ; /*!< (@ 0x50040930) Device Endpoint Transfer Size Register */ + __IO uint32_t DIEPDMA; /*!< (@ 0x50040934) Device Endpoint DMA Address Register */ + __I uint32_t DTXFSTS; /*!< (@ 0x50040938) Device IN Endpoint Transmit FIFO Status Register */ + __I uint32_t DIEPDMAB; /*!< (@ 0x5004093C) Device Endpoint DMA Buffer Address Register */ + __I uint32_t RESERVED2[120]; + + union { + __IO uint32_t DOEPCTL_INTBULK; /*!< (@ 0x50040B20) Device Endpoint Control Register [INTBULK] */ + __IO uint32_t DOEPCTL_ISOCONT; /*!< (@ 0x50040B20) Device Endpoint Control Register [ISOCONT] */ + }; + __I uint32_t RESERVED3; + __IO uint32_t DOEPINT; /*!< (@ 0x50040B28) Device Endpoint Interrupt Register */ + __I uint32_t RESERVED4; + + union { + __IO uint32_t DOEPTSIZ_CONTROL; /*!< (@ 0x50040B30) Device Endpoint Transfer Size Register [CONT] */ + __IO uint32_t DOEPTSIZ_ISO; /*!< (@ 0x50040B30) Device Endpoint Transfer Size Register [ISO] */ + }; + __IO uint32_t DOEPDMA; /*!< (@ 0x50040B34) Device Endpoint DMA Address Register */ + __I uint32_t RESERVED5; + __I uint32_t DOEPDMAB; /*!< (@ 0x50040B3C) Device Endpoint DMA Buffer Address Register */ +} USB0_EP_TypeDef; + + +/* ================================================================================ */ +/* ================ USIC [USIC0] ================ */ +/* ================================================================================ */ + + +/** + * @brief Universal Serial Interface Controller 0 (USIC) + */ + +typedef struct { /*!< (@ 0x40030008) USIC Structure */ + __I uint32_t ID; /*!< (@ 0x40030008) Module Identification Register */ +} USIC_GLOBAL_TypeDef; + + +/* ================================================================================ */ +/* ================ USIC_CH [USIC0_CH0] ================ */ +/* ================================================================================ */ + + +/** + * @brief Universal Serial Interface Controller 0 (USIC_CH) + */ + +typedef struct { /*!< (@ 0x40030000) USIC_CH Structure */ + __I uint32_t RESERVED; + __I uint32_t CCFG; /*!< (@ 0x40030004) Channel Configuration Register */ + __I uint32_t RESERVED1; + __IO uint32_t KSCFG; /*!< (@ 0x4003000C) Kernel State Configuration Register */ + __IO uint32_t FDR; /*!< (@ 0x40030010) Fractional Divider Register */ + __IO uint32_t BRG; /*!< (@ 0x40030014) Baud Rate Generator Register */ + __IO uint32_t INPR; /*!< (@ 0x40030018) Interrupt Node Pointer Register */ + __IO uint32_t DX0CR; /*!< (@ 0x4003001C) Input Control Register 0 */ + __IO uint32_t DX1CR; /*!< (@ 0x40030020) Input Control Register 1 */ + __IO uint32_t DX2CR; /*!< (@ 0x40030024) Input Control Register 2 */ + __IO uint32_t DX3CR; /*!< (@ 0x40030028) Input Control Register 3 */ + __IO uint32_t DX4CR; /*!< (@ 0x4003002C) Input Control Register 4 */ + __IO uint32_t DX5CR; /*!< (@ 0x40030030) Input Control Register 5 */ + __IO uint32_t SCTR; /*!< (@ 0x40030034) Shift Control Register */ + __IO uint32_t TCSR; /*!< (@ 0x40030038) Transmit Control/Status Register */ + + union { + __IO uint32_t PCR_IICMode; /*!< (@ 0x4003003C) Protocol Control Register [IIC Mode] */ + __IO uint32_t PCR_IISMode; /*!< (@ 0x4003003C) Protocol Control Register [IIS Mode] */ + __IO uint32_t PCR_SSCMode; /*!< (@ 0x4003003C) Protocol Control Register [SSC Mode] */ + __IO uint32_t PCR; /*!< (@ 0x4003003C) Protocol Control Register */ + __IO uint32_t PCR_ASCMode; /*!< (@ 0x4003003C) Protocol Control Register [ASC Mode] */ + }; + __IO uint32_t CCR; /*!< (@ 0x40030040) Channel Control Register */ + __IO uint32_t CMTR; /*!< (@ 0x40030044) Capture Mode Timer Register */ + + union { + __IO uint32_t PSR_IICMode; /*!< (@ 0x40030048) Protocol Status Register [IIC Mode] */ + __IO uint32_t PSR_IISMode; /*!< (@ 0x40030048) Protocol Status Register [IIS Mode] */ + __IO uint32_t PSR_SSCMode; /*!< (@ 0x40030048) Protocol Status Register [SSC Mode] */ + __IO uint32_t PSR; /*!< (@ 0x40030048) Protocol Status Register */ + __IO uint32_t PSR_ASCMode; /*!< (@ 0x40030048) Protocol Status Register [ASC Mode] */ + }; + __O uint32_t PSCR; /*!< (@ 0x4003004C) Protocol Status Clear Register */ + __I uint32_t RBUFSR; /*!< (@ 0x40030050) Receiver Buffer Status Register */ + __I uint32_t RBUF; /*!< (@ 0x40030054) Receiver Buffer Register */ + __I uint32_t RBUFD; /*!< (@ 0x40030058) Receiver Buffer Register for Debugger */ + __I uint32_t RBUF0; /*!< (@ 0x4003005C) Receiver Buffer Register 0 */ + __I uint32_t RBUF1; /*!< (@ 0x40030060) Receiver Buffer Register 1 */ + __I uint32_t RBUF01SR; /*!< (@ 0x40030064) Receiver Buffer 01 Status Register */ + __O uint32_t FMR; /*!< (@ 0x40030068) Flag Modification Register */ + __I uint32_t RESERVED2[5]; + __IO uint32_t TBUF[32]; /*!< (@ 0x40030080) Transmit Buffer */ + __IO uint32_t BYP; /*!< (@ 0x40030100) Bypass Data Register */ + __IO uint32_t BYPCR; /*!< (@ 0x40030104) Bypass Control Register */ + __IO uint32_t TBCTR; /*!< (@ 0x40030108) Transmitter Buffer Control Register */ + __IO uint32_t RBCTR; /*!< (@ 0x4003010C) Receiver Buffer Control Register */ + __I uint32_t TRBPTR; /*!< (@ 0x40030110) Transmit/Receive Buffer Pointer Register */ + __IO uint32_t TRBSR; /*!< (@ 0x40030114) Transmit/Receive Buffer Status Register */ + __O uint32_t TRBSCR; /*!< (@ 0x40030118) Transmit/Receive Buffer Status Clear Register */ + __I uint32_t OUTR; /*!< (@ 0x4003011C) Receiver Buffer Output Register */ + __I uint32_t OUTDR; /*!< (@ 0x40030120) Receiver Buffer Output Register L for Debugger */ + __I uint32_t RESERVED3[23]; + __O uint32_t IN[32]; /*!< (@ 0x40030180) Transmit FIFO Buffer */ +} USIC_CH_TypeDef; + + +/* ================================================================================ */ +/* ================ CAN ================ */ +/* ================================================================================ */ + + +/** + * @brief Controller Area Networks (CAN) + */ + +typedef struct { /*!< (@ 0x48014000) CAN Structure */ + __IO uint32_t CLC; /*!< (@ 0x48014000) CAN Clock Control Register */ + __I uint32_t RESERVED; + __I uint32_t ID; /*!< (@ 0x48014008) Module Identification Register */ + __IO uint32_t FDR; /*!< (@ 0x4801400C) CAN Fractional Divider Register */ + __I uint32_t RESERVED1[60]; + __I uint32_t LIST[8]; /*!< (@ 0x48014100) List Register */ + __I uint32_t RESERVED2[8]; + __IO uint32_t MSPND[8]; /*!< (@ 0x48014140) Message Pending Register */ + __I uint32_t RESERVED3[8]; + __I uint32_t MSID[8]; /*!< (@ 0x48014180) Message Index Register */ + __I uint32_t RESERVED4[8]; + __IO uint32_t MSIMASK; /*!< (@ 0x480141C0) Message Index Mask Register */ + __IO uint32_t PANCTR; /*!< (@ 0x480141C4) Panel Control Register */ + __IO uint32_t MCR; /*!< (@ 0x480141C8) Module Control Register */ + __O uint32_t MITR; /*!< (@ 0x480141CC) Module Interrupt Trigger Register */ +} CAN_GLOBAL_TypeDef; + + +/* ================================================================================ */ +/* ================ CAN_NODE [CAN_NODE0] ================ */ +/* ================================================================================ */ + + +/** + * @brief Controller Area Networks (CAN_NODE) + */ + +typedef struct { /*!< (@ 0x48014200) CAN_NODE Structure */ + __IO uint32_t NCR; /*!< (@ 0x48014200) Node Control Register */ + __IO uint32_t NSR; /*!< (@ 0x48014204) Node Status Register */ + __IO uint32_t NIPR; /*!< (@ 0x48014208) Node Interrupt Pointer Register */ + __IO uint32_t NPCR; /*!< (@ 0x4801420C) Node Port Control Register */ + __IO uint32_t NBTR; /*!< (@ 0x48014210) Node Bit Timing Register */ + __IO uint32_t NECNT; /*!< (@ 0x48014214) Node Error Counter Register */ + __IO uint32_t NFCR; /*!< (@ 0x48014218) Node Frame Counter Register */ +} CAN_NODE_TypeDef; + + +/* ================================================================================ */ +/* ================ CAN_MO [CAN_MO0] ================ */ +/* ================================================================================ */ + + +/** + * @brief Controller Area Networks (CAN_MO) + */ + +typedef struct { /*!< (@ 0x48015000) CAN_MO Structure */ + __IO uint32_t MOFCR; /*!< (@ 0x48015000) Message Object Function Control Register */ + __IO uint32_t MOFGPR; /*!< (@ 0x48015004) Message Object FIFO/Gateway Pointer Register */ + __IO uint32_t MOIPR; /*!< (@ 0x48015008) Message Object Interrupt Pointer Register */ + __IO uint32_t MOAMR; /*!< (@ 0x4801500C) Message Object Acceptance Mask Register */ + __IO uint32_t MODATAL; /*!< (@ 0x48015010) Message Object Data Register Low */ + __IO uint32_t MODATAH; /*!< (@ 0x48015014) Message Object Data Register High */ + __IO uint32_t MOAR; /*!< (@ 0x48015018) Message Object Arbitration Register */ + + union { + __I uint32_t MOSTAT; /*!< (@ 0x4801501C) Message Object Status Register */ + __O uint32_t MOCTR; /*!< (@ 0x4801501C) Message Object Control Register */ + }; +} CAN_MO_TypeDef; + + +/* ================================================================================ */ +/* ================ VADC ================ */ +/* ================================================================================ */ + + +/** + * @brief Analog to Digital Converter (VADC) + */ + +typedef struct { /*!< (@ 0x40004000) VADC Structure */ + __IO uint32_t CLC; /*!< (@ 0x40004000) Clock Control Register */ + __I uint32_t RESERVED; + __I uint32_t ID; /*!< (@ 0x40004008) Module Identification Register */ + __I uint32_t RESERVED1[7]; + __IO uint32_t OCS; /*!< (@ 0x40004028) OCDS Control and Status Register */ + __I uint32_t RESERVED2[21]; + __IO uint32_t GLOBCFG; /*!< (@ 0x40004080) Global Configuration Register */ + __I uint32_t RESERVED3[7]; + __IO uint32_t GLOBICLASS[2]; /*!< (@ 0x400040A0) Input Class Register, Global */ + __I uint32_t RESERVED4[4]; + __IO uint32_t GLOBBOUND; /*!< (@ 0x400040B8) Global Boundary Select Register */ + __I uint32_t RESERVED5[9]; + __IO uint32_t GLOBEFLAG; /*!< (@ 0x400040E0) Global Event Flag Register */ + __I uint32_t RESERVED6[23]; + __IO uint32_t GLOBEVNP; /*!< (@ 0x40004140) Global Event Node Pointer Register */ + __I uint32_t RESERVED7[7]; + __IO uint32_t GLOBTF; /*!< (@ 0x40004160) Global Test Functions Register */ + __I uint32_t RESERVED8[7]; + __IO uint32_t BRSSEL[4]; /*!< (@ 0x40004180) Background Request Source Channel Select Register */ + __I uint32_t RESERVED9[12]; + __IO uint32_t BRSPND[4]; /*!< (@ 0x400041C0) Background Request Source Pending Register */ + __I uint32_t RESERVED10[12]; + __IO uint32_t BRSCTRL; /*!< (@ 0x40004200) Background Request Source Control Register */ + __IO uint32_t BRSMR; /*!< (@ 0x40004204) Background Request Source Mode Register */ + __I uint32_t RESERVED11[30]; + __IO uint32_t GLOBRCR; /*!< (@ 0x40004280) Global Result Control Register */ + __I uint32_t RESERVED12[31]; + __IO uint32_t GLOBRES; /*!< (@ 0x40004300) Global Result Register */ + __I uint32_t RESERVED13[31]; + __IO uint32_t GLOBRESD; /*!< (@ 0x40004380) Global Result Register, Debug */ + __I uint32_t RESERVED14[27]; + __IO uint32_t EMUXSEL; /*!< (@ 0x400043F0) External Multiplexer Select Register */ +} VADC_GLOBAL_TypeDef; + + +/* ================================================================================ */ +/* ================ VADC_G [VADC_G0] ================ */ +/* ================================================================================ */ + + +/** + * @brief Analog to Digital Converter (VADC_G) + */ + +typedef struct { /*!< (@ 0x40004400) VADC_G Structure */ + __I uint32_t RESERVED[32]; + __IO uint32_t ARBCFG; /*!< (@ 0x40004480) Arbitration Configuration Register */ + __IO uint32_t ARBPR; /*!< (@ 0x40004484) Arbitration Priority Register */ + __IO uint32_t CHASS; /*!< (@ 0x40004488) Channel Assignment Register */ + __I uint32_t RESERVED1[5]; + __IO uint32_t ICLASS[2]; /*!< (@ 0x400044A0) Input Class Register */ + __I uint32_t RESERVED2[2]; + __IO uint32_t ALIAS; /*!< (@ 0x400044B0) Alias Register */ + __I uint32_t RESERVED3; + __IO uint32_t BOUND; /*!< (@ 0x400044B8) Boundary Select Register */ + __I uint32_t RESERVED4; + __IO uint32_t SYNCTR; /*!< (@ 0x400044C0) Synchronization Control Register */ + __I uint32_t RESERVED5; + __IO uint32_t BFL; /*!< (@ 0x400044C8) Boundary Flag Register */ + __O uint32_t BFLS; /*!< (@ 0x400044CC) Boundary Flag Software Register */ + __IO uint32_t BFLC; /*!< (@ 0x400044D0) Boundary Flag Control Register */ + __IO uint32_t BFLNP; /*!< (@ 0x400044D4) Boundary Flag Node Pointer Register */ + __I uint32_t RESERVED6[10]; + __IO uint32_t QCTRL0; /*!< (@ 0x40004500) Queue 0 Source Control Register */ + __IO uint32_t QMR0; /*!< (@ 0x40004504) Queue 0 Mode Register */ + __I uint32_t QSR0; /*!< (@ 0x40004508) Queue 0 Status Register */ + __I uint32_t Q0R0; /*!< (@ 0x4000450C) Queue 0 Register 0 */ + + union { + __I uint32_t QBUR0; /*!< (@ 0x40004510) Queue 0 Backup Register */ + __O uint32_t QINR0; /*!< (@ 0x40004510) Queue 0 Input Register */ + }; + __I uint32_t RESERVED7[3]; + __IO uint32_t ASCTRL; /*!< (@ 0x40004520) Autoscan Source Control Register */ + __IO uint32_t ASMR; /*!< (@ 0x40004524) Autoscan Source Mode Register */ + __IO uint32_t ASSEL; /*!< (@ 0x40004528) Autoscan Source Channel Select Register */ + __IO uint32_t ASPND; /*!< (@ 0x4000452C) Autoscan Source Pending Register */ + __I uint32_t RESERVED8[20]; + __IO uint32_t CEFLAG; /*!< (@ 0x40004580) Channel Event Flag Register */ + __IO uint32_t REFLAG; /*!< (@ 0x40004584) Result Event Flag Register */ + __IO uint32_t SEFLAG; /*!< (@ 0x40004588) Source Event Flag Register */ + __I uint32_t RESERVED9; + __O uint32_t CEFCLR; /*!< (@ 0x40004590) Channel Event Flag Clear Register */ + __O uint32_t REFCLR; /*!< (@ 0x40004594) Result Event Flag Clear Register */ + __O uint32_t SEFCLR; /*!< (@ 0x40004598) Source Event Flag Clear Register */ + __I uint32_t RESERVED10; + __IO uint32_t CEVNP0; /*!< (@ 0x400045A0) Channel Event Node Pointer Register 0 */ + __I uint32_t RESERVED11[3]; + __IO uint32_t REVNP0; /*!< (@ 0x400045B0) Result Event Node Pointer Register 0 */ + __IO uint32_t REVNP1; /*!< (@ 0x400045B4) Result Event Node Pointer Register 1 */ + __I uint32_t RESERVED12[2]; + __IO uint32_t SEVNP; /*!< (@ 0x400045C0) Source Event Node Pointer Register */ + __I uint32_t RESERVED13; + __O uint32_t SRACT; /*!< (@ 0x400045C8) Service Request Software Activation Trigger */ + __I uint32_t RESERVED14[9]; + __IO uint32_t EMUXCTR; /*!< (@ 0x400045F0) External Multiplexer Control Register */ + __I uint32_t RESERVED15; + __IO uint32_t VFR; /*!< (@ 0x400045F8) Valid Flag Register */ + __I uint32_t RESERVED16; + __IO uint32_t CHCTR[8]; /*!< (@ 0x40004600) Channel Ctrl. Reg. */ + __I uint32_t RESERVED17[24]; + __IO uint32_t RCR[16]; /*!< (@ 0x40004680) Result Control Register */ + __I uint32_t RESERVED18[16]; + __IO uint32_t RES[16]; /*!< (@ 0x40004700) Result Register */ + __I uint32_t RESERVED19[16]; + __I uint32_t RESD[16]; /*!< (@ 0x40004780) Result Register, Debug */ +} VADC_G_TypeDef; + + +/* ================================================================================ */ +/* ================ DAC ================ */ +/* ================================================================================ */ + + +/** + * @brief Digital to Analog Converter (DAC) + */ + +typedef struct { /*!< (@ 0x48018000) DAC Structure */ + __I uint32_t ID; /*!< (@ 0x48018000) Module Identification Register */ + __IO uint32_t DAC0CFG0; /*!< (@ 0x48018004) DAC0 Configuration Register 0 */ + __IO uint32_t DAC0CFG1; /*!< (@ 0x48018008) DAC0 Configuration Register 1 */ + __IO uint32_t DAC1CFG0; /*!< (@ 0x4801800C) DAC1 Configuration Register 0 */ + __IO uint32_t DAC1CFG1; /*!< (@ 0x48018010) DAC1 Configuration Register 1 */ + __IO uint32_t DAC0DATA; /*!< (@ 0x48018014) DAC0 Data Register */ + __IO uint32_t DAC1DATA; /*!< (@ 0x48018018) DAC1 Data Register */ + __IO uint32_t DAC01DATA; /*!< (@ 0x4801801C) DAC01 Data Register */ + __IO uint32_t DAC0PATL; /*!< (@ 0x48018020) DAC0 Lower Pattern Register */ + __IO uint32_t DAC0PATH; /*!< (@ 0x48018024) DAC0 Higher Pattern Register */ + __IO uint32_t DAC1PATL; /*!< (@ 0x48018028) DAC1 Lower Pattern Register */ + __IO uint32_t DAC1PATH; /*!< (@ 0x4801802C) DAC1 Higher Pattern Register */ +} DAC_GLOBAL_TypeDef; + + +/* ================================================================================ */ +/* ================ CCU4 [CCU40] ================ */ +/* ================================================================================ */ + + +/** + * @brief Capture Compare Unit 4 - Unit 0 (CCU4) + */ + +typedef struct { /*!< (@ 0x4000C000) CCU4 Structure */ + __IO uint32_t GCTRL; /*!< (@ 0x4000C000) Global Control Register */ + __I uint32_t GSTAT; /*!< (@ 0x4000C004) Global Status Register */ + __O uint32_t GIDLS; /*!< (@ 0x4000C008) Global Idle Set */ + __O uint32_t GIDLC; /*!< (@ 0x4000C00C) Global Idle Clear */ + __O uint32_t GCSS; /*!< (@ 0x4000C010) Global Channel Set */ + __O uint32_t GCSC; /*!< (@ 0x4000C014) Global Channel Clear */ + __I uint32_t GCST; /*!< (@ 0x4000C018) Global Channel Status */ + __I uint32_t RESERVED[13]; + __I uint32_t ECRD; /*!< (@ 0x4000C050) Extended Capture Mode Read */ + __I uint32_t RESERVED1[11]; + __I uint32_t MIDR; /*!< (@ 0x4000C080) Module Identification */ +} CCU4_GLOBAL_TypeDef; + + +/* ================================================================================ */ +/* ================ CCU4_CC4 [CCU40_CC40] ================ */ +/* ================================================================================ */ + + +/** + * @brief Capture Compare Unit 4 - Unit 0 (CCU4_CC4) + */ + +typedef struct { /*!< (@ 0x4000C100) CCU4_CC4 Structure */ + __IO uint32_t INS; /*!< (@ 0x4000C100) Input Selector Configuration */ + __IO uint32_t CMC; /*!< (@ 0x4000C104) Connection Matrix Control */ + __I uint32_t TCST; /*!< (@ 0x4000C108) Slice Timer Status */ + __O uint32_t TCSET; /*!< (@ 0x4000C10C) Slice Timer Run Set */ + __O uint32_t TCCLR; /*!< (@ 0x4000C110) Slice Timer Clear */ + __IO uint32_t TC; /*!< (@ 0x4000C114) Slice Timer Control */ + __IO uint32_t PSL; /*!< (@ 0x4000C118) Passive Level Config */ + __I uint32_t DIT; /*!< (@ 0x4000C11C) Dither Config */ + __IO uint32_t DITS; /*!< (@ 0x4000C120) Dither Shadow Register */ + __IO uint32_t PSC; /*!< (@ 0x4000C124) Prescaler Control */ + __IO uint32_t FPC; /*!< (@ 0x4000C128) Floating Prescaler Control */ + __IO uint32_t FPCS; /*!< (@ 0x4000C12C) Floating Prescaler Shadow */ + __I uint32_t PR; /*!< (@ 0x4000C130) Timer Period Value */ + __IO uint32_t PRS; /*!< (@ 0x4000C134) Timer Shadow Period Value */ + __I uint32_t CR; /*!< (@ 0x4000C138) Timer Compare Value */ + __IO uint32_t CRS; /*!< (@ 0x4000C13C) Timer Shadow Compare Value */ + __I uint32_t RESERVED[12]; + __IO uint32_t TIMER; /*!< (@ 0x4000C170) Timer Value */ + __I uint32_t CV[4]; /*!< (@ 0x4000C174) Capture Register 0 */ + __I uint32_t RESERVED1[7]; + __I uint32_t INTS; /*!< (@ 0x4000C1A0) Interrupt Status */ + __IO uint32_t INTE; /*!< (@ 0x4000C1A4) Interrupt Enable Control */ + __IO uint32_t SRS; /*!< (@ 0x4000C1A8) Service Request Selector */ + __O uint32_t SWS; /*!< (@ 0x4000C1AC) Interrupt Status Set */ + __O uint32_t SWR; /*!< (@ 0x4000C1B0) Interrupt Status Clear */ +} CCU4_CC4_TypeDef; + + +/* ================================================================================ */ +/* ================ CCU8 [CCU80] ================ */ +/* ================================================================================ */ + + +/** + * @brief Capture Compare Unit 8 - Unit 0 (CCU8) + */ + +typedef struct { /*!< (@ 0x40020000) CCU8 Structure */ + __IO uint32_t GCTRL; /*!< (@ 0x40020000) Global Control Register */ + __I uint32_t GSTAT; /*!< (@ 0x40020004) Global Status Register */ + __O uint32_t GIDLS; /*!< (@ 0x40020008) Global Idle Set */ + __O uint32_t GIDLC; /*!< (@ 0x4002000C) Global Idle Clear */ + __O uint32_t GCSS; /*!< (@ 0x40020010) Global Channel Set */ + __O uint32_t GCSC; /*!< (@ 0x40020014) Global Channel Clear */ + __I uint32_t GCST; /*!< (@ 0x40020018) Global Channel status */ + __IO uint32_t GPCHK; /*!< (@ 0x4002001C) Parity Checker Configuration */ + __I uint32_t RESERVED[12]; + __I uint32_t ECRD; /*!< (@ 0x40020050) Extended Capture Mode Read */ + __I uint32_t RESERVED1[11]; + __I uint32_t MIDR; /*!< (@ 0x40020080) Module Identification */ +} CCU8_GLOBAL_TypeDef; + + +/* ================================================================================ */ +/* ================ CCU8_CC8 [CCU80_CC80] ================ */ +/* ================================================================================ */ + + +/** + * @brief Capture Compare Unit 8 - Unit 0 (CCU8_CC8) + */ + +typedef struct { /*!< (@ 0x40020100) CCU8_CC8 Structure */ + __IO uint32_t INS; /*!< (@ 0x40020100) Input Selector Configuration */ + __IO uint32_t CMC; /*!< (@ 0x40020104) Connection Matrix Control */ + __I uint32_t TCST; /*!< (@ 0x40020108) Slice Timer Status */ + __O uint32_t TCSET; /*!< (@ 0x4002010C) Slice Timer Run Set */ + __O uint32_t TCCLR; /*!< (@ 0x40020110) Slice Timer Clear */ + __IO uint32_t TC; /*!< (@ 0x40020114) Slice Timer Control */ + __IO uint32_t PSL; /*!< (@ 0x40020118) Passive Level Config */ + __I uint32_t DIT; /*!< (@ 0x4002011C) Dither Config */ + __IO uint32_t DITS; /*!< (@ 0x40020120) Dither Shadow Register */ + __IO uint32_t PSC; /*!< (@ 0x40020124) Prescaler Control */ + __IO uint32_t FPC; /*!< (@ 0x40020128) Floating Prescaler Control */ + __IO uint32_t FPCS; /*!< (@ 0x4002012C) Floating Prescaler Shadow */ + __I uint32_t PR; /*!< (@ 0x40020130) Timer Period Value */ + __IO uint32_t PRS; /*!< (@ 0x40020134) Timer Shadow Period Value */ + __I uint32_t CR1; /*!< (@ 0x40020138) Channel 1 Compare Value */ + __IO uint32_t CR1S; /*!< (@ 0x4002013C) Channel 1 Compare Shadow Value */ + __I uint32_t CR2; /*!< (@ 0x40020140) Channel 2 Compare Value */ + __IO uint32_t CR2S; /*!< (@ 0x40020144) Channel 2 Compare Shadow Value */ + __IO uint32_t CHC; /*!< (@ 0x40020148) Channel Control */ + __IO uint32_t DTC; /*!< (@ 0x4002014C) Dead Time Control */ + __IO uint32_t DC1R; /*!< (@ 0x40020150) Channel 1 Dead Time Values */ + __IO uint32_t DC2R; /*!< (@ 0x40020154) Channel 2 Dead Time Values */ + __I uint32_t RESERVED[6]; + __IO uint32_t TIMER; /*!< (@ 0x40020170) Timer Value */ + __I uint32_t CV[4]; /*!< (@ 0x40020174) Capture Register 0 */ + __I uint32_t RESERVED1[7]; + __I uint32_t INTS; /*!< (@ 0x400201A0) Interrupt Status */ + __IO uint32_t INTE; /*!< (@ 0x400201A4) Interrupt Enable Control */ + __IO uint32_t SRS; /*!< (@ 0x400201A8) Service Request Selector */ + __O uint32_t SWS; /*!< (@ 0x400201AC) Interrupt Status Set */ + __O uint32_t SWR; /*!< (@ 0x400201B0) Interrupt Status Clear */ + __IO uint32_t STC; /*!< (@ 0x400201B4) Shadow transfer control */ +} CCU8_CC8_TypeDef; + + +/* ================================================================================ */ +/* ================ HRPWM0 ================ */ +/* ================================================================================ */ + + +/** + * @brief High Resolution PWM Unit (HRPWM0) + */ + +typedef struct { /*!< (@ 0x40020900) HRPWM0 Structure */ + __IO uint32_t HRBSC; /*!< (@ 0x40020900) Bias and suspend configuration */ + __I uint32_t RESERVED; + __I uint32_t MIDR; /*!< (@ 0x40020908) Module identification register */ + __I uint32_t RESERVED1[2]; + __IO uint32_t GLBANA; /*!< (@ 0x40020914) Global Analog Configuration */ + __I uint32_t RESERVED2[2]; + __IO uint32_t CSGCFG; /*!< (@ 0x40020920) Global CSG configuration */ + __O uint32_t CSGSETG; /*!< (@ 0x40020924) Global CSG run bit set */ + __O uint32_t CSGCLRG; /*!< (@ 0x40020928) Global CSG run bit clear */ + __I uint32_t CSGSTATG; /*!< (@ 0x4002092C) Global CSG run bit status */ + __O uint32_t CSGFCG; /*!< (@ 0x40020930) Global CSG slope/prescaler control */ + __I uint32_t CSGFSG; /*!< (@ 0x40020934) Global CSG slope/prescaler status */ + __O uint32_t CSGTRG; /*!< (@ 0x40020938) Global CSG shadow/switch trigger */ + __O uint32_t CSGTRC; /*!< (@ 0x4002093C) Global CSG shadow trigger clear */ + __I uint32_t CSGTRSG; /*!< (@ 0x40020940) Global CSG shadow/switch status */ + __I uint32_t RESERVED3[7]; + __IO uint32_t HRCCFG; /*!< (@ 0x40020960) Global HRC configuration */ + __O uint32_t HRCSTRG; /*!< (@ 0x40020964) Global HRC shadow trigger set */ + __O uint32_t HRCCTRG; /*!< (@ 0x40020968) Global HRC shadow trigger clear */ + __I uint32_t HRCSTSG; /*!< (@ 0x4002096C) Global HRC shadow transfer status */ + __I uint32_t HRGHRS; /*!< (@ 0x40020970) High Resolution Generation Status */ +} HRPWM0_Type; + + +/* ================================================================================ */ +/* ================ HRPWM0_CSG [HRPWM0_CSG0] ================ */ +/* ================================================================================ */ + + +/** + * @brief High Resolution PWM Unit (HRPWM0_CSG) + */ + +typedef struct { /*!< (@ 0x40020A00) HRPWM0_CSG Structure */ + __IO uint32_t DCI; /*!< (@ 0x40020A00) External input selection */ + __IO uint32_t IES; /*!< (@ 0x40020A04) External input selection */ + __IO uint32_t SC; /*!< (@ 0x40020A08) Slope generation control */ + __I uint32_t PC; /*!< (@ 0x40020A0C) Pulse swallow configuration */ + __I uint32_t DSV1; /*!< (@ 0x40020A10) DAC reference value 1 */ + __IO uint32_t DSV2; /*!< (@ 0x40020A14) DAC reference value 1 */ + __IO uint32_t SDSV1; /*!< (@ 0x40020A18) Shadow reference value 1 */ + __IO uint32_t SPC; /*!< (@ 0x40020A1C) Shadow Pulse swallow value */ + __IO uint32_t CC; /*!< (@ 0x40020A20) Comparator configuration */ + __IO uint32_t PLC; /*!< (@ 0x40020A24) Passive level configuration */ + __IO uint32_t BLV; /*!< (@ 0x40020A28) Comparator blanking value */ + __IO uint32_t SRE; /*!< (@ 0x40020A2C) Service request enable */ + __IO uint32_t SRS; /*!< (@ 0x40020A30) Service request line selector */ + __O uint32_t SWS; /*!< (@ 0x40020A34) Service request SW set */ + __O uint32_t SWC; /*!< (@ 0x40020A38) Service request SW clear */ + __I uint32_t ISTAT; /*!< (@ 0x40020A3C) Service request status */ +} HRPWM0_CSG_Type; + + +/* ================================================================================ */ +/* ================ HRPWM0_HRC [HRPWM0_HRC0] ================ */ +/* ================================================================================ */ + + +/** + * @brief High Resolution PWM Unit (HRPWM0_HRC) + */ + +typedef struct { /*!< (@ 0x40021300) HRPWM0_HRC Structure */ + __IO uint32_t GC; /*!< (@ 0x40021300) HRC mode configuration */ + __IO uint32_t PL; /*!< (@ 0x40021304) HRC output passive level */ + __IO uint32_t GSEL; /*!< (@ 0x40021308) HRC global control selection */ + __IO uint32_t TSEL; /*!< (@ 0x4002130C) HRC timer selection */ + __I uint32_t SC; /*!< (@ 0x40021310) HRC current source for shadow */ + __I uint32_t DCR; /*!< (@ 0x40021314) HRC dead time rising value */ + __I uint32_t DCF; /*!< (@ 0x40021318) HRC dead time falling value */ + __I uint32_t CR1; /*!< (@ 0x4002131C) HRC rising edge value */ + __I uint32_t CR2; /*!< (@ 0x40021320) HRC falling edge value */ + __IO uint32_t SSC; /*!< (@ 0x40021324) HRC next source for shadow */ + __IO uint32_t SDCR; /*!< (@ 0x40021328) HRC shadow dead time rising */ + __IO uint32_t SDCF; /*!< (@ 0x4002132C) HRC shadow dead time falling */ + __IO uint32_t SCR1; /*!< (@ 0x40021330) HRC shadow rising edge value */ + __IO uint32_t SCR2; /*!< (@ 0x40021334) HRC shadow falling edge value */ +} HRPWM0_HRC_Type; + + +/* ================================================================================ */ +/* ================ POSIF [POSIF0] ================ */ +/* ================================================================================ */ + + +/** + * @brief Position Interface 0 (POSIF) + */ + +typedef struct { /*!< (@ 0x40028000) POSIF Structure */ + __IO uint32_t PCONF; /*!< (@ 0x40028000) Service Request Processing configuration */ + __IO uint32_t PSUS; /*!< (@ 0x40028004) Service Request Processing Suspend Config */ + __O uint32_t PRUNS; /*!< (@ 0x40028008) Service Request Processing Run Bit Set */ + __O uint32_t PRUNC; /*!< (@ 0x4002800C) Service Request Processing Run Bit Clear */ + __I uint32_t PRUN; /*!< (@ 0x40028010) Service Request Processing Run Bit Status */ + __I uint32_t RESERVED[3]; + __I uint32_t MIDR; /*!< (@ 0x40028020) Module Identification register */ + __I uint32_t RESERVED1[3]; + __I uint32_t HALP; /*!< (@ 0x40028030) Hall Sensor Patterns */ + __IO uint32_t HALPS; /*!< (@ 0x40028034) Hall Sensor Shadow Patterns */ + __I uint32_t RESERVED2[2]; + __I uint32_t MCM; /*!< (@ 0x40028040) Multi-Channel Pattern */ + __IO uint32_t MCSM; /*!< (@ 0x40028044) Multi-Channel Shadow Pattern */ + __O uint32_t MCMS; /*!< (@ 0x40028048) Multi-Channel Pattern Control set */ + __O uint32_t MCMC; /*!< (@ 0x4002804C) Multi-Channel Pattern Control clear */ + __I uint32_t MCMF; /*!< (@ 0x40028050) Multi-Channel Pattern Control flag */ + __I uint32_t RESERVED3[3]; + __IO uint32_t QDC; /*!< (@ 0x40028060) Quadrature Decoder Control */ + __I uint32_t RESERVED4[3]; + __I uint32_t PFLG; /*!< (@ 0x40028070) Service Request Processing Interrupt Flags */ + __IO uint32_t PFLGE; /*!< (@ 0x40028074) Service Request Processing Interrupt Enable */ + __O uint32_t SPFLG; /*!< (@ 0x40028078) Service Request Processing Interrupt Set */ + __O uint32_t RPFLG; /*!< (@ 0x4002807C) Service Request Processing Interrupt Clear */ + __I uint32_t RESERVED5[32]; + __I uint32_t PDBG; /*!< (@ 0x40028100) POSIF Debug register */ +} POSIF_GLOBAL_TypeDef; + + +/* ================================================================================ */ +/* ================ PORT0 ================ */ +/* ================================================================================ */ + + +/** + * @brief Port 0 (PORT0) + */ + +typedef struct { /*!< (@ 0x48028000) PORT0 Structure */ + __IO uint32_t OUT; /*!< (@ 0x48028000) Port 0 Output Register */ + __O uint32_t OMR; /*!< (@ 0x48028004) Port 0 Output Modification Register */ + __I uint32_t RESERVED[2]; + __IO uint32_t IOCR0; /*!< (@ 0x48028010) Port 0 Input/Output Control Register 0 */ + __IO uint32_t IOCR4; /*!< (@ 0x48028014) Port 0 Input/Output Control Register 4 */ + __IO uint32_t IOCR8; /*!< (@ 0x48028018) Port 0 Input/Output Control Register 8 */ + __I uint32_t RESERVED1[2]; + __I uint32_t IN; /*!< (@ 0x48028024) Port 0 Input Register */ + __I uint32_t RESERVED2[6]; + __IO uint32_t PDR0; /*!< (@ 0x48028040) Port 0 Pad Driver Mode 0 Register */ + __IO uint32_t PDR1; /*!< (@ 0x48028044) Port 0 Pad Driver Mode 1 Register */ + __I uint32_t RESERVED3[6]; + __I uint32_t PDISC; /*!< (@ 0x48028060) Port 0 Pin Function Decision Control Register */ + __I uint32_t RESERVED4[3]; + __IO uint32_t PPS; /*!< (@ 0x48028070) Port 0 Pin Power Save Register */ + __IO uint32_t HWSEL; /*!< (@ 0x48028074) Port 0 Pin Hardware Select Register */ +} PORT0_Type; + + +/* ================================================================================ */ +/* ================ PORT1 ================ */ +/* ================================================================================ */ + + +/** + * @brief Port 1 (PORT1) + */ + +typedef struct { /*!< (@ 0x48028100) PORT1 Structure */ + __IO uint32_t OUT; /*!< (@ 0x48028100) Port 1 Output Register */ + __O uint32_t OMR; /*!< (@ 0x48028104) Port 1 Output Modification Register */ + __I uint32_t RESERVED[2]; + __IO uint32_t IOCR0; /*!< (@ 0x48028110) Port 1 Input/Output Control Register 0 */ + __IO uint32_t IOCR4; /*!< (@ 0x48028114) Port 1 Input/Output Control Register 4 */ + __IO uint32_t IOCR8; /*!< (@ 0x48028118) Port 1 Input/Output Control Register 8 */ + __IO uint32_t IOCR12; /*!< (@ 0x4802811C) Port 1 Input/Output Control Register 12 */ + __I uint32_t RESERVED1; + __I uint32_t IN; /*!< (@ 0x48028124) Port 1 Input Register */ + __I uint32_t RESERVED2[6]; + __IO uint32_t PDR0; /*!< (@ 0x48028140) Port 1 Pad Driver Mode 0 Register */ + __IO uint32_t PDR1; /*!< (@ 0x48028144) Port 1 Pad Driver Mode 1 Register */ + __I uint32_t RESERVED3[6]; + __I uint32_t PDISC; /*!< (@ 0x48028160) Port 1 Pin Function Decision Control Register */ + __I uint32_t RESERVED4[3]; + __IO uint32_t PPS; /*!< (@ 0x48028170) Port 1 Pin Power Save Register */ + __IO uint32_t HWSEL; /*!< (@ 0x48028174) Port 1 Pin Hardware Select Register */ +} PORT1_Type; + + +/* ================================================================================ */ +/* ================ PORT2 ================ */ +/* ================================================================================ */ + + +/** + * @brief Port 2 (PORT2) + */ + +typedef struct { /*!< (@ 0x48028200) PORT2 Structure */ + __IO uint32_t OUT; /*!< (@ 0x48028200) Port 2 Output Register */ + __O uint32_t OMR; /*!< (@ 0x48028204) Port 2 Output Modification Register */ + __I uint32_t RESERVED[2]; + __IO uint32_t IOCR0; /*!< (@ 0x48028210) Port 2 Input/Output Control Register 0 */ + __IO uint32_t IOCR4; /*!< (@ 0x48028214) Port 2 Input/Output Control Register 4 */ + __IO uint32_t IOCR8; /*!< (@ 0x48028218) Port 2 Input/Output Control Register 8 */ + __IO uint32_t IOCR12; /*!< (@ 0x4802821C) Port 2 Input/Output Control Register 12 */ + __I uint32_t RESERVED1; + __I uint32_t IN; /*!< (@ 0x48028224) Port 2 Input Register */ + __I uint32_t RESERVED2[6]; + __IO uint32_t PDR0; /*!< (@ 0x48028240) Port 2 Pad Driver Mode 0 Register */ + __IO uint32_t PDR1; /*!< (@ 0x48028244) Port 2 Pad Driver Mode 1 Register */ + __I uint32_t RESERVED3[6]; + __I uint32_t PDISC; /*!< (@ 0x48028260) Port 2 Pin Function Decision Control Register */ + __I uint32_t RESERVED4[3]; + __IO uint32_t PPS; /*!< (@ 0x48028270) Port 2 Pin Power Save Register */ + __IO uint32_t HWSEL; /*!< (@ 0x48028274) Port 2 Pin Hardware Select Register */ +} PORT2_Type; + + +/* ================================================================================ */ +/* ================ PORT3 ================ */ +/* ================================================================================ */ + + +/** + * @brief Port 3 (PORT3) + */ + +typedef struct { /*!< (@ 0x48028300) PORT3 Structure */ + __IO uint32_t OUT; /*!< (@ 0x48028300) Port 3 Output Register */ + __O uint32_t OMR; /*!< (@ 0x48028304) Port 3 Output Modification Register */ + __I uint32_t RESERVED[2]; + __IO uint32_t IOCR0; /*!< (@ 0x48028310) Port 3 Input/Output Control Register 0 */ + __I uint32_t RESERVED1[4]; + __I uint32_t IN; /*!< (@ 0x48028324) Port 3 Input Register */ + __I uint32_t RESERVED2[6]; + __IO uint32_t PDR0; /*!< (@ 0x48028340) Port 3 Pad Driver Mode 0 Register */ + __I uint32_t RESERVED3[7]; + __I uint32_t PDISC; /*!< (@ 0x48028360) Port 3 Pin Function Decision Control Register */ + __I uint32_t RESERVED4[3]; + __IO uint32_t PPS; /*!< (@ 0x48028370) Port 3 Pin Power Save Register */ + __IO uint32_t HWSEL; /*!< (@ 0x48028374) Port 3 Pin Hardware Select Register */ +} PORT3_Type; + + +/* ================================================================================ */ +/* ================ PORT14 ================ */ +/* ================================================================================ */ + + +/** + * @brief Port 14 (PORT14) + */ + +typedef struct { /*!< (@ 0x48028E00) PORT14 Structure */ + __IO uint32_t OUT; /*!< (@ 0x48028E00) Port 14 Output Register */ + __O uint32_t OMR; /*!< (@ 0x48028E04) Port 14 Output Modification Register */ + __I uint32_t RESERVED[2]; + __IO uint32_t IOCR0; /*!< (@ 0x48028E10) Port 14 Input/Output Control Register 0 */ + __IO uint32_t IOCR4; /*!< (@ 0x48028E14) Port 14 Input/Output Control Register 4 */ + __IO uint32_t IOCR8; /*!< (@ 0x48028E18) Port 14 Input/Output Control Register 8 */ + __IO uint32_t IOCR12; /*!< (@ 0x48028E1C) Port 14 Input/Output Control Register 12 */ + __I uint32_t RESERVED1; + __I uint32_t IN; /*!< (@ 0x48028E24) Port 14 Input Register */ + __I uint32_t RESERVED2[14]; + __IO uint32_t PDISC; /*!< (@ 0x48028E60) Port 14 Pin Function Decision Control Register */ + __I uint32_t RESERVED3[3]; + __IO uint32_t PPS; /*!< (@ 0x48028E70) Port 14 Pin Power Save Register */ + __IO uint32_t HWSEL; /*!< (@ 0x48028E74) Port 14 Pin Hardware Select Register */ +} PORT14_Type; + + +/* -------------------- End of section using anonymous unions ------------------- */ +#if defined(__CC_ARM) + #pragma pop +#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #pragma clang diagnostic pop +#elif defined(__ICCARM__) + /* leave anonymous unions enabled */ +#elif defined(__GNUC__) + /* anonymous unions are enabled by default */ +#elif defined(__TMS470__) + /* anonymous unions are enabled by default */ +#elif defined(__TASKING__) + #pragma warning restore +#else + #warning Not supported compiler type +#endif + + + +/* ================================================================================ */ +/* ================ struct 'PPB' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ---------------------------------- PPB_ACTLR --------------------------------- */ +#define PPB_ACTLR_DISMCYCINT_Pos (0UL) /*!< PPB ACTLR: DISMCYCINT (Bit 0) */ +#define PPB_ACTLR_DISMCYCINT_Msk (0x1UL) /*!< PPB ACTLR: DISMCYCINT (Bitfield-Mask: 0x01) */ +#define PPB_ACTLR_DISDEFWBUF_Pos (1UL) /*!< PPB ACTLR: DISDEFWBUF (Bit 1) */ +#define PPB_ACTLR_DISDEFWBUF_Msk (0x2UL) /*!< PPB ACTLR: DISDEFWBUF (Bitfield-Mask: 0x01) */ +#define PPB_ACTLR_DISFOLD_Pos (2UL) /*!< PPB ACTLR: DISFOLD (Bit 2) */ +#define PPB_ACTLR_DISFOLD_Msk (0x4UL) /*!< PPB ACTLR: DISFOLD (Bitfield-Mask: 0x01) */ +#define PPB_ACTLR_DISFPCA_Pos (8UL) /*!< PPB ACTLR: DISFPCA (Bit 8) */ +#define PPB_ACTLR_DISFPCA_Msk (0x100UL) /*!< PPB ACTLR: DISFPCA (Bitfield-Mask: 0x01) */ +#define PPB_ACTLR_DISOOFP_Pos (9UL) /*!< PPB ACTLR: DISOOFP (Bit 9) */ +#define PPB_ACTLR_DISOOFP_Msk (0x200UL) /*!< PPB ACTLR: DISOOFP (Bitfield-Mask: 0x01) */ + +/* -------------------------------- PPB_SYST_CSR -------------------------------- */ +#define PPB_SYST_CSR_ENABLE_Pos (0UL) /*!< PPB SYST_CSR: ENABLE (Bit 0) */ +#define PPB_SYST_CSR_ENABLE_Msk (0x1UL) /*!< PPB SYST_CSR: ENABLE (Bitfield-Mask: 0x01) */ +#define PPB_SYST_CSR_TICKINT_Pos (1UL) /*!< PPB SYST_CSR: TICKINT (Bit 1) */ +#define PPB_SYST_CSR_TICKINT_Msk (0x2UL) /*!< PPB SYST_CSR: TICKINT (Bitfield-Mask: 0x01) */ +#define PPB_SYST_CSR_CLKSOURCE_Pos (2UL) /*!< PPB SYST_CSR: CLKSOURCE (Bit 2) */ +#define PPB_SYST_CSR_CLKSOURCE_Msk (0x4UL) /*!< PPB SYST_CSR: CLKSOURCE (Bitfield-Mask: 0x01) */ +#define PPB_SYST_CSR_COUNTFLAG_Pos (16UL) /*!< PPB SYST_CSR: COUNTFLAG (Bit 16) */ +#define PPB_SYST_CSR_COUNTFLAG_Msk (0x10000UL) /*!< PPB SYST_CSR: COUNTFLAG (Bitfield-Mask: 0x01) */ + +/* -------------------------------- PPB_SYST_RVR -------------------------------- */ +#define PPB_SYST_RVR_RELOAD_Pos (0UL) /*!< PPB SYST_RVR: RELOAD (Bit 0) */ +#define PPB_SYST_RVR_RELOAD_Msk (0xffffffUL) /*!< PPB SYST_RVR: RELOAD (Bitfield-Mask: 0xffffff) */ + +/* -------------------------------- PPB_SYST_CVR -------------------------------- */ +#define PPB_SYST_CVR_CURRENT_Pos (0UL) /*!< PPB SYST_CVR: CURRENT (Bit 0) */ +#define PPB_SYST_CVR_CURRENT_Msk (0xffffffUL) /*!< PPB SYST_CVR: CURRENT (Bitfield-Mask: 0xffffff) */ + +/* ------------------------------- PPB_SYST_CALIB ------------------------------- */ +#define PPB_SYST_CALIB_TENMS_Pos (0UL) /*!< PPB SYST_CALIB: TENMS (Bit 0) */ +#define PPB_SYST_CALIB_TENMS_Msk (0xffffffUL) /*!< PPB SYST_CALIB: TENMS (Bitfield-Mask: 0xffffff) */ +#define PPB_SYST_CALIB_SKEW_Pos (30UL) /*!< PPB SYST_CALIB: SKEW (Bit 30) */ +#define PPB_SYST_CALIB_SKEW_Msk (0x40000000UL) /*!< PPB SYST_CALIB: SKEW (Bitfield-Mask: 0x01) */ +#define PPB_SYST_CALIB_NOREF_Pos (31UL) /*!< PPB SYST_CALIB: NOREF (Bit 31) */ +#define PPB_SYST_CALIB_NOREF_Msk (0x80000000UL) /*!< PPB SYST_CALIB: NOREF (Bitfield-Mask: 0x01) */ + +/* ------------------------------- PPB_NVIC_ISER0 ------------------------------- */ +#define PPB_NVIC_ISER0_SETENA_Pos (0UL) /*!< PPB NVIC_ISER0: SETENA (Bit 0) */ +#define PPB_NVIC_ISER0_SETENA_Msk (0xffffffffUL) /*!< PPB NVIC_ISER0: SETENA (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------------- PPB_NVIC_ISER1 ------------------------------- */ +#define PPB_NVIC_ISER1_SETENA_Pos (0UL) /*!< PPB NVIC_ISER1: SETENA (Bit 0) */ +#define PPB_NVIC_ISER1_SETENA_Msk (0xffffffffUL) /*!< PPB NVIC_ISER1: SETENA (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------------- PPB_NVIC_ISER2 ------------------------------- */ +#define PPB_NVIC_ISER2_SETENA_Pos (0UL) /*!< PPB NVIC_ISER2: SETENA (Bit 0) */ +#define PPB_NVIC_ISER2_SETENA_Msk (0xffffffffUL) /*!< PPB NVIC_ISER2: SETENA (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------------- PPB_NVIC_ISER3 ------------------------------- */ +#define PPB_NVIC_ISER3_SETENA_Pos (0UL) /*!< PPB NVIC_ISER3: SETENA (Bit 0) */ +#define PPB_NVIC_ISER3_SETENA_Msk (0xffffffffUL) /*!< PPB NVIC_ISER3: SETENA (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------------- PPB_NVIC_ICER0 ------------------------------- */ +#define PPB_NVIC_ICER0_CLRENA_Pos (0UL) /*!< PPB NVIC_ICER0: CLRENA (Bit 0) */ +#define PPB_NVIC_ICER0_CLRENA_Msk (0xffffffffUL) /*!< PPB NVIC_ICER0: CLRENA (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------------- PPB_NVIC_ICER1 ------------------------------- */ +#define PPB_NVIC_ICER1_CLRENA_Pos (0UL) /*!< PPB NVIC_ICER1: CLRENA (Bit 0) */ +#define PPB_NVIC_ICER1_CLRENA_Msk (0xffffffffUL) /*!< PPB NVIC_ICER1: CLRENA (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------------- PPB_NVIC_ICER2 ------------------------------- */ +#define PPB_NVIC_ICER2_CLRENA_Pos (0UL) /*!< PPB NVIC_ICER2: CLRENA (Bit 0) */ +#define PPB_NVIC_ICER2_CLRENA_Msk (0xffffffffUL) /*!< PPB NVIC_ICER2: CLRENA (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------------- PPB_NVIC_ICER3 ------------------------------- */ +#define PPB_NVIC_ICER3_CLRENA_Pos (0UL) /*!< PPB NVIC_ICER3: CLRENA (Bit 0) */ +#define PPB_NVIC_ICER3_CLRENA_Msk (0xffffffffUL) /*!< PPB NVIC_ICER3: CLRENA (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------------- PPB_NVIC_ISPR0 ------------------------------- */ +#define PPB_NVIC_ISPR0_SETPEND_Pos (0UL) /*!< PPB NVIC_ISPR0: SETPEND (Bit 0) */ +#define PPB_NVIC_ISPR0_SETPEND_Msk (0xffffffffUL) /*!< PPB NVIC_ISPR0: SETPEND (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------------- PPB_NVIC_ISPR1 ------------------------------- */ +#define PPB_NVIC_ISPR1_SETPEND_Pos (0UL) /*!< PPB NVIC_ISPR1: SETPEND (Bit 0) */ +#define PPB_NVIC_ISPR1_SETPEND_Msk (0xffffffffUL) /*!< PPB NVIC_ISPR1: SETPEND (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------------- PPB_NVIC_ISPR2 ------------------------------- */ +#define PPB_NVIC_ISPR2_SETPEND_Pos (0UL) /*!< PPB NVIC_ISPR2: SETPEND (Bit 0) */ +#define PPB_NVIC_ISPR2_SETPEND_Msk (0xffffffffUL) /*!< PPB NVIC_ISPR2: SETPEND (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------------- PPB_NVIC_ISPR3 ------------------------------- */ +#define PPB_NVIC_ISPR3_SETPEND_Pos (0UL) /*!< PPB NVIC_ISPR3: SETPEND (Bit 0) */ +#define PPB_NVIC_ISPR3_SETPEND_Msk (0xffffffffUL) /*!< PPB NVIC_ISPR3: SETPEND (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------------- PPB_NVIC_ICPR0 ------------------------------- */ +#define PPB_NVIC_ICPR0_CLRPEND_Pos (0UL) /*!< PPB NVIC_ICPR0: CLRPEND (Bit 0) */ +#define PPB_NVIC_ICPR0_CLRPEND_Msk (0xffffffffUL) /*!< PPB NVIC_ICPR0: CLRPEND (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------------- PPB_NVIC_ICPR1 ------------------------------- */ +#define PPB_NVIC_ICPR1_CLRPEND_Pos (0UL) /*!< PPB NVIC_ICPR1: CLRPEND (Bit 0) */ +#define PPB_NVIC_ICPR1_CLRPEND_Msk (0xffffffffUL) /*!< PPB NVIC_ICPR1: CLRPEND (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------------- PPB_NVIC_ICPR2 ------------------------------- */ +#define PPB_NVIC_ICPR2_CLRPEND_Pos (0UL) /*!< PPB NVIC_ICPR2: CLRPEND (Bit 0) */ +#define PPB_NVIC_ICPR2_CLRPEND_Msk (0xffffffffUL) /*!< PPB NVIC_ICPR2: CLRPEND (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------------- PPB_NVIC_ICPR3 ------------------------------- */ +#define PPB_NVIC_ICPR3_CLRPEND_Pos (0UL) /*!< PPB NVIC_ICPR3: CLRPEND (Bit 0) */ +#define PPB_NVIC_ICPR3_CLRPEND_Msk (0xffffffffUL) /*!< PPB NVIC_ICPR3: CLRPEND (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------------- PPB_NVIC_IABR0 ------------------------------- */ +#define PPB_NVIC_IABR0_ACTIVE_Pos (0UL) /*!< PPB NVIC_IABR0: ACTIVE (Bit 0) */ +#define PPB_NVIC_IABR0_ACTIVE_Msk (0xffffffffUL) /*!< PPB NVIC_IABR0: ACTIVE (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------------- PPB_NVIC_IABR1 ------------------------------- */ +#define PPB_NVIC_IABR1_ACTIVE_Pos (0UL) /*!< PPB NVIC_IABR1: ACTIVE (Bit 0) */ +#define PPB_NVIC_IABR1_ACTIVE_Msk (0xffffffffUL) /*!< PPB NVIC_IABR1: ACTIVE (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------------- PPB_NVIC_IABR2 ------------------------------- */ +#define PPB_NVIC_IABR2_ACTIVE_Pos (0UL) /*!< PPB NVIC_IABR2: ACTIVE (Bit 0) */ +#define PPB_NVIC_IABR2_ACTIVE_Msk (0xffffffffUL) /*!< PPB NVIC_IABR2: ACTIVE (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------------- PPB_NVIC_IABR3 ------------------------------- */ +#define PPB_NVIC_IABR3_ACTIVE_Pos (0UL) /*!< PPB NVIC_IABR3: ACTIVE (Bit 0) */ +#define PPB_NVIC_IABR3_ACTIVE_Msk (0xffffffffUL) /*!< PPB NVIC_IABR3: ACTIVE (Bitfield-Mask: 0xffffffff) */ + +/* -------------------------------- PPB_NVIC_IPR0 ------------------------------- */ +#define PPB_NVIC_IPR0_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR0: PRI_0 (Bit 0) */ +#define PPB_NVIC_IPR0_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR0: PRI_0 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR0_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR0: PRI_1 (Bit 8) */ +#define PPB_NVIC_IPR0_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR0: PRI_1 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR0_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR0: PRI_2 (Bit 16) */ +#define PPB_NVIC_IPR0_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR0: PRI_2 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR0_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR0: PRI_3 (Bit 24) */ +#define PPB_NVIC_IPR0_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR0: PRI_3 (Bitfield-Mask: 0xff) */ + +/* -------------------------------- PPB_NVIC_IPR1 ------------------------------- */ +#define PPB_NVIC_IPR1_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR1: PRI_0 (Bit 0) */ +#define PPB_NVIC_IPR1_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR1: PRI_0 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR1_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR1: PRI_1 (Bit 8) */ +#define PPB_NVIC_IPR1_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR1: PRI_1 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR1_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR1: PRI_2 (Bit 16) */ +#define PPB_NVIC_IPR1_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR1: PRI_2 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR1_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR1: PRI_3 (Bit 24) */ +#define PPB_NVIC_IPR1_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR1: PRI_3 (Bitfield-Mask: 0xff) */ + +/* -------------------------------- PPB_NVIC_IPR2 ------------------------------- */ +#define PPB_NVIC_IPR2_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR2: PRI_0 (Bit 0) */ +#define PPB_NVIC_IPR2_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR2: PRI_0 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR2_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR2: PRI_1 (Bit 8) */ +#define PPB_NVIC_IPR2_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR2: PRI_1 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR2_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR2: PRI_2 (Bit 16) */ +#define PPB_NVIC_IPR2_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR2: PRI_2 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR2_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR2: PRI_3 (Bit 24) */ +#define PPB_NVIC_IPR2_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR2: PRI_3 (Bitfield-Mask: 0xff) */ + +/* -------------------------------- PPB_NVIC_IPR3 ------------------------------- */ +#define PPB_NVIC_IPR3_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR3: PRI_0 (Bit 0) */ +#define PPB_NVIC_IPR3_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR3: PRI_0 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR3_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR3: PRI_1 (Bit 8) */ +#define PPB_NVIC_IPR3_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR3: PRI_1 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR3_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR3: PRI_2 (Bit 16) */ +#define PPB_NVIC_IPR3_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR3: PRI_2 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR3_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR3: PRI_3 (Bit 24) */ +#define PPB_NVIC_IPR3_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR3: PRI_3 (Bitfield-Mask: 0xff) */ + +/* -------------------------------- PPB_NVIC_IPR4 ------------------------------- */ +#define PPB_NVIC_IPR4_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR4: PRI_0 (Bit 0) */ +#define PPB_NVIC_IPR4_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR4: PRI_0 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR4_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR4: PRI_1 (Bit 8) */ +#define PPB_NVIC_IPR4_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR4: PRI_1 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR4_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR4: PRI_2 (Bit 16) */ +#define PPB_NVIC_IPR4_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR4: PRI_2 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR4_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR4: PRI_3 (Bit 24) */ +#define PPB_NVIC_IPR4_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR4: PRI_3 (Bitfield-Mask: 0xff) */ + +/* -------------------------------- PPB_NVIC_IPR5 ------------------------------- */ +#define PPB_NVIC_IPR5_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR5: PRI_0 (Bit 0) */ +#define PPB_NVIC_IPR5_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR5: PRI_0 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR5_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR5: PRI_1 (Bit 8) */ +#define PPB_NVIC_IPR5_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR5: PRI_1 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR5_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR5: PRI_2 (Bit 16) */ +#define PPB_NVIC_IPR5_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR5: PRI_2 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR5_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR5: PRI_3 (Bit 24) */ +#define PPB_NVIC_IPR5_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR5: PRI_3 (Bitfield-Mask: 0xff) */ + +/* -------------------------------- PPB_NVIC_IPR6 ------------------------------- */ +#define PPB_NVIC_IPR6_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR6: PRI_0 (Bit 0) */ +#define PPB_NVIC_IPR6_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR6: PRI_0 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR6_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR6: PRI_1 (Bit 8) */ +#define PPB_NVIC_IPR6_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR6: PRI_1 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR6_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR6: PRI_2 (Bit 16) */ +#define PPB_NVIC_IPR6_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR6: PRI_2 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR6_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR6: PRI_3 (Bit 24) */ +#define PPB_NVIC_IPR6_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR6: PRI_3 (Bitfield-Mask: 0xff) */ + +/* -------------------------------- PPB_NVIC_IPR7 ------------------------------- */ +#define PPB_NVIC_IPR7_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR7: PRI_0 (Bit 0) */ +#define PPB_NVIC_IPR7_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR7: PRI_0 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR7_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR7: PRI_1 (Bit 8) */ +#define PPB_NVIC_IPR7_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR7: PRI_1 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR7_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR7: PRI_2 (Bit 16) */ +#define PPB_NVIC_IPR7_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR7: PRI_2 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR7_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR7: PRI_3 (Bit 24) */ +#define PPB_NVIC_IPR7_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR7: PRI_3 (Bitfield-Mask: 0xff) */ + +/* -------------------------------- PPB_NVIC_IPR8 ------------------------------- */ +#define PPB_NVIC_IPR8_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR8: PRI_0 (Bit 0) */ +#define PPB_NVIC_IPR8_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR8: PRI_0 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR8_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR8: PRI_1 (Bit 8) */ +#define PPB_NVIC_IPR8_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR8: PRI_1 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR8_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR8: PRI_2 (Bit 16) */ +#define PPB_NVIC_IPR8_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR8: PRI_2 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR8_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR8: PRI_3 (Bit 24) */ +#define PPB_NVIC_IPR8_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR8: PRI_3 (Bitfield-Mask: 0xff) */ + +/* -------------------------------- PPB_NVIC_IPR9 ------------------------------- */ +#define PPB_NVIC_IPR9_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR9: PRI_0 (Bit 0) */ +#define PPB_NVIC_IPR9_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR9: PRI_0 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR9_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR9: PRI_1 (Bit 8) */ +#define PPB_NVIC_IPR9_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR9: PRI_1 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR9_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR9: PRI_2 (Bit 16) */ +#define PPB_NVIC_IPR9_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR9: PRI_2 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR9_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR9: PRI_3 (Bit 24) */ +#define PPB_NVIC_IPR9_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR9: PRI_3 (Bitfield-Mask: 0xff) */ + +/* ------------------------------- PPB_NVIC_IPR10 ------------------------------- */ +#define PPB_NVIC_IPR10_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR10: PRI_0 (Bit 0) */ +#define PPB_NVIC_IPR10_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR10: PRI_0 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR10_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR10: PRI_1 (Bit 8) */ +#define PPB_NVIC_IPR10_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR10: PRI_1 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR10_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR10: PRI_2 (Bit 16) */ +#define PPB_NVIC_IPR10_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR10: PRI_2 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR10_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR10: PRI_3 (Bit 24) */ +#define PPB_NVIC_IPR10_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR10: PRI_3 (Bitfield-Mask: 0xff) */ + +/* ------------------------------- PPB_NVIC_IPR11 ------------------------------- */ +#define PPB_NVIC_IPR11_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR11: PRI_0 (Bit 0) */ +#define PPB_NVIC_IPR11_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR11: PRI_0 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR11_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR11: PRI_1 (Bit 8) */ +#define PPB_NVIC_IPR11_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR11: PRI_1 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR11_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR11: PRI_2 (Bit 16) */ +#define PPB_NVIC_IPR11_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR11: PRI_2 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR11_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR11: PRI_3 (Bit 24) */ +#define PPB_NVIC_IPR11_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR11: PRI_3 (Bitfield-Mask: 0xff) */ + +/* ------------------------------- PPB_NVIC_IPR12 ------------------------------- */ +#define PPB_NVIC_IPR12_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR12: PRI_0 (Bit 0) */ +#define PPB_NVIC_IPR12_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR12: PRI_0 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR12_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR12: PRI_1 (Bit 8) */ +#define PPB_NVIC_IPR12_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR12: PRI_1 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR12_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR12: PRI_2 (Bit 16) */ +#define PPB_NVIC_IPR12_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR12: PRI_2 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR12_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR12: PRI_3 (Bit 24) */ +#define PPB_NVIC_IPR12_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR12: PRI_3 (Bitfield-Mask: 0xff) */ + +/* ------------------------------- PPB_NVIC_IPR13 ------------------------------- */ +#define PPB_NVIC_IPR13_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR13: PRI_0 (Bit 0) */ +#define PPB_NVIC_IPR13_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR13: PRI_0 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR13_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR13: PRI_1 (Bit 8) */ +#define PPB_NVIC_IPR13_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR13: PRI_1 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR13_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR13: PRI_2 (Bit 16) */ +#define PPB_NVIC_IPR13_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR13: PRI_2 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR13_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR13: PRI_3 (Bit 24) */ +#define PPB_NVIC_IPR13_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR13: PRI_3 (Bitfield-Mask: 0xff) */ + +/* ------------------------------- PPB_NVIC_IPR14 ------------------------------- */ +#define PPB_NVIC_IPR14_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR14: PRI_0 (Bit 0) */ +#define PPB_NVIC_IPR14_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR14: PRI_0 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR14_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR14: PRI_1 (Bit 8) */ +#define PPB_NVIC_IPR14_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR14: PRI_1 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR14_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR14: PRI_2 (Bit 16) */ +#define PPB_NVIC_IPR14_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR14: PRI_2 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR14_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR14: PRI_3 (Bit 24) */ +#define PPB_NVIC_IPR14_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR14: PRI_3 (Bitfield-Mask: 0xff) */ + +/* ------------------------------- PPB_NVIC_IPR15 ------------------------------- */ +#define PPB_NVIC_IPR15_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR15: PRI_0 (Bit 0) */ +#define PPB_NVIC_IPR15_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR15: PRI_0 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR15_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR15: PRI_1 (Bit 8) */ +#define PPB_NVIC_IPR15_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR15: PRI_1 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR15_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR15: PRI_2 (Bit 16) */ +#define PPB_NVIC_IPR15_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR15: PRI_2 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR15_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR15: PRI_3 (Bit 24) */ +#define PPB_NVIC_IPR15_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR15: PRI_3 (Bitfield-Mask: 0xff) */ + +/* ------------------------------- PPB_NVIC_IPR16 ------------------------------- */ +#define PPB_NVIC_IPR16_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR16: PRI_0 (Bit 0) */ +#define PPB_NVIC_IPR16_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR16: PRI_0 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR16_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR16: PRI_1 (Bit 8) */ +#define PPB_NVIC_IPR16_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR16: PRI_1 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR16_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR16: PRI_2 (Bit 16) */ +#define PPB_NVIC_IPR16_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR16: PRI_2 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR16_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR16: PRI_3 (Bit 24) */ +#define PPB_NVIC_IPR16_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR16: PRI_3 (Bitfield-Mask: 0xff) */ + +/* ------------------------------- PPB_NVIC_IPR17 ------------------------------- */ +#define PPB_NVIC_IPR17_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR17: PRI_0 (Bit 0) */ +#define PPB_NVIC_IPR17_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR17: PRI_0 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR17_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR17: PRI_1 (Bit 8) */ +#define PPB_NVIC_IPR17_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR17: PRI_1 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR17_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR17: PRI_2 (Bit 16) */ +#define PPB_NVIC_IPR17_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR17: PRI_2 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR17_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR17: PRI_3 (Bit 24) */ +#define PPB_NVIC_IPR17_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR17: PRI_3 (Bitfield-Mask: 0xff) */ + +/* ------------------------------- PPB_NVIC_IPR18 ------------------------------- */ +#define PPB_NVIC_IPR18_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR18: PRI_0 (Bit 0) */ +#define PPB_NVIC_IPR18_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR18: PRI_0 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR18_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR18: PRI_1 (Bit 8) */ +#define PPB_NVIC_IPR18_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR18: PRI_1 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR18_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR18: PRI_2 (Bit 16) */ +#define PPB_NVIC_IPR18_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR18: PRI_2 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR18_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR18: PRI_3 (Bit 24) */ +#define PPB_NVIC_IPR18_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR18: PRI_3 (Bitfield-Mask: 0xff) */ + +/* ------------------------------- PPB_NVIC_IPR19 ------------------------------- */ +#define PPB_NVIC_IPR19_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR19: PRI_0 (Bit 0) */ +#define PPB_NVIC_IPR19_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR19: PRI_0 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR19_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR19: PRI_1 (Bit 8) */ +#define PPB_NVIC_IPR19_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR19: PRI_1 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR19_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR19: PRI_2 (Bit 16) */ +#define PPB_NVIC_IPR19_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR19: PRI_2 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR19_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR19: PRI_3 (Bit 24) */ +#define PPB_NVIC_IPR19_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR19: PRI_3 (Bitfield-Mask: 0xff) */ + +/* ------------------------------- PPB_NVIC_IPR20 ------------------------------- */ +#define PPB_NVIC_IPR20_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR20: PRI_0 (Bit 0) */ +#define PPB_NVIC_IPR20_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR20: PRI_0 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR20_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR20: PRI_1 (Bit 8) */ +#define PPB_NVIC_IPR20_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR20: PRI_1 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR20_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR20: PRI_2 (Bit 16) */ +#define PPB_NVIC_IPR20_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR20: PRI_2 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR20_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR20: PRI_3 (Bit 24) */ +#define PPB_NVIC_IPR20_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR20: PRI_3 (Bitfield-Mask: 0xff) */ + +/* ------------------------------- PPB_NVIC_IPR21 ------------------------------- */ +#define PPB_NVIC_IPR21_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR21: PRI_0 (Bit 0) */ +#define PPB_NVIC_IPR21_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR21: PRI_0 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR21_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR21: PRI_1 (Bit 8) */ +#define PPB_NVIC_IPR21_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR21: PRI_1 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR21_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR21: PRI_2 (Bit 16) */ +#define PPB_NVIC_IPR21_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR21: PRI_2 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR21_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR21: PRI_3 (Bit 24) */ +#define PPB_NVIC_IPR21_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR21: PRI_3 (Bitfield-Mask: 0xff) */ + +/* ------------------------------- PPB_NVIC_IPR22 ------------------------------- */ +#define PPB_NVIC_IPR22_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR22: PRI_0 (Bit 0) */ +#define PPB_NVIC_IPR22_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR22: PRI_0 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR22_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR22: PRI_1 (Bit 8) */ +#define PPB_NVIC_IPR22_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR22: PRI_1 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR22_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR22: PRI_2 (Bit 16) */ +#define PPB_NVIC_IPR22_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR22: PRI_2 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR22_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR22: PRI_3 (Bit 24) */ +#define PPB_NVIC_IPR22_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR22: PRI_3 (Bitfield-Mask: 0xff) */ + +/* ------------------------------- PPB_NVIC_IPR23 ------------------------------- */ +#define PPB_NVIC_IPR23_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR23: PRI_0 (Bit 0) */ +#define PPB_NVIC_IPR23_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR23: PRI_0 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR23_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR23: PRI_1 (Bit 8) */ +#define PPB_NVIC_IPR23_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR23: PRI_1 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR23_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR23: PRI_2 (Bit 16) */ +#define PPB_NVIC_IPR23_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR23: PRI_2 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR23_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR23: PRI_3 (Bit 24) */ +#define PPB_NVIC_IPR23_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR23: PRI_3 (Bitfield-Mask: 0xff) */ + +/* ------------------------------- PPB_NVIC_IPR24 ------------------------------- */ +#define PPB_NVIC_IPR24_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR24: PRI_0 (Bit 0) */ +#define PPB_NVIC_IPR24_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR24: PRI_0 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR24_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR24: PRI_1 (Bit 8) */ +#define PPB_NVIC_IPR24_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR24: PRI_1 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR24_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR24: PRI_2 (Bit 16) */ +#define PPB_NVIC_IPR24_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR24: PRI_2 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR24_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR24: PRI_3 (Bit 24) */ +#define PPB_NVIC_IPR24_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR24: PRI_3 (Bitfield-Mask: 0xff) */ + +/* ------------------------------- PPB_NVIC_IPR25 ------------------------------- */ +#define PPB_NVIC_IPR25_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR25: PRI_0 (Bit 0) */ +#define PPB_NVIC_IPR25_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR25: PRI_0 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR25_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR25: PRI_1 (Bit 8) */ +#define PPB_NVIC_IPR25_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR25: PRI_1 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR25_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR25: PRI_2 (Bit 16) */ +#define PPB_NVIC_IPR25_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR25: PRI_2 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR25_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR25: PRI_3 (Bit 24) */ +#define PPB_NVIC_IPR25_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR25: PRI_3 (Bitfield-Mask: 0xff) */ + +/* ------------------------------- PPB_NVIC_IPR26 ------------------------------- */ +#define PPB_NVIC_IPR26_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR26: PRI_0 (Bit 0) */ +#define PPB_NVIC_IPR26_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR26: PRI_0 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR26_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR26: PRI_1 (Bit 8) */ +#define PPB_NVIC_IPR26_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR26: PRI_1 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR26_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR26: PRI_2 (Bit 16) */ +#define PPB_NVIC_IPR26_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR26: PRI_2 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR26_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR26: PRI_3 (Bit 24) */ +#define PPB_NVIC_IPR26_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR26: PRI_3 (Bitfield-Mask: 0xff) */ + +/* ------------------------------- PPB_NVIC_IPR27 ------------------------------- */ +#define PPB_NVIC_IPR27_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR27: PRI_0 (Bit 0) */ +#define PPB_NVIC_IPR27_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR27: PRI_0 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR27_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR27: PRI_1 (Bit 8) */ +#define PPB_NVIC_IPR27_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR27: PRI_1 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR27_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR27: PRI_2 (Bit 16) */ +#define PPB_NVIC_IPR27_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR27: PRI_2 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR27_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR27: PRI_3 (Bit 24) */ +#define PPB_NVIC_IPR27_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR27: PRI_3 (Bitfield-Mask: 0xff) */ + +/* ---------------------------------- PPB_CPUID --------------------------------- */ +#define PPB_CPUID_Revision_Pos (0UL) /*!< PPB CPUID: Revision (Bit 0) */ +#define PPB_CPUID_Revision_Msk (0xfUL) /*!< PPB CPUID: Revision (Bitfield-Mask: 0x0f) */ +#define PPB_CPUID_PartNo_Pos (4UL) /*!< PPB CPUID: PartNo (Bit 4) */ +#define PPB_CPUID_PartNo_Msk (0xfff0UL) /*!< PPB CPUID: PartNo (Bitfield-Mask: 0xfff) */ +#define PPB_CPUID_Constant_Pos (16UL) /*!< PPB CPUID: Constant (Bit 16) */ +#define PPB_CPUID_Constant_Msk (0xf0000UL) /*!< PPB CPUID: Constant (Bitfield-Mask: 0x0f) */ +#define PPB_CPUID_Variant_Pos (20UL) /*!< PPB CPUID: Variant (Bit 20) */ +#define PPB_CPUID_Variant_Msk (0xf00000UL) /*!< PPB CPUID: Variant (Bitfield-Mask: 0x0f) */ +#define PPB_CPUID_Implementer_Pos (24UL) /*!< PPB CPUID: Implementer (Bit 24) */ +#define PPB_CPUID_Implementer_Msk (0xff000000UL) /*!< PPB CPUID: Implementer (Bitfield-Mask: 0xff) */ + +/* ---------------------------------- PPB_ICSR ---------------------------------- */ +#define PPB_ICSR_VECTACTIVE_Pos (0UL) /*!< PPB ICSR: VECTACTIVE (Bit 0) */ +#define PPB_ICSR_VECTACTIVE_Msk (0x1ffUL) /*!< PPB ICSR: VECTACTIVE (Bitfield-Mask: 0x1ff) */ +#define PPB_ICSR_RETTOBASE_Pos (11UL) /*!< PPB ICSR: RETTOBASE (Bit 11) */ +#define PPB_ICSR_RETTOBASE_Msk (0x800UL) /*!< PPB ICSR: RETTOBASE (Bitfield-Mask: 0x01) */ +#define PPB_ICSR_VECTPENDING_Pos (12UL) /*!< PPB ICSR: VECTPENDING (Bit 12) */ +#define PPB_ICSR_VECTPENDING_Msk (0x3f000UL) /*!< PPB ICSR: VECTPENDING (Bitfield-Mask: 0x3f) */ +#define PPB_ICSR_ISRPENDING_Pos (22UL) /*!< PPB ICSR: ISRPENDING (Bit 22) */ +#define PPB_ICSR_ISRPENDING_Msk (0x400000UL) /*!< PPB ICSR: ISRPENDING (Bitfield-Mask: 0x01) */ +#define PPB_ICSR_PENDSTCLR_Pos (25UL) /*!< PPB ICSR: PENDSTCLR (Bit 25) */ +#define PPB_ICSR_PENDSTCLR_Msk (0x2000000UL) /*!< PPB ICSR: PENDSTCLR (Bitfield-Mask: 0x01) */ +#define PPB_ICSR_PENDSTSET_Pos (26UL) /*!< PPB ICSR: PENDSTSET (Bit 26) */ +#define PPB_ICSR_PENDSTSET_Msk (0x4000000UL) /*!< PPB ICSR: PENDSTSET (Bitfield-Mask: 0x01) */ +#define PPB_ICSR_PENDSVCLR_Pos (27UL) /*!< PPB ICSR: PENDSVCLR (Bit 27) */ +#define PPB_ICSR_PENDSVCLR_Msk (0x8000000UL) /*!< PPB ICSR: PENDSVCLR (Bitfield-Mask: 0x01) */ +#define PPB_ICSR_PENDSVSET_Pos (28UL) /*!< PPB ICSR: PENDSVSET (Bit 28) */ +#define PPB_ICSR_PENDSVSET_Msk (0x10000000UL) /*!< PPB ICSR: PENDSVSET (Bitfield-Mask: 0x01) */ +#define PPB_ICSR_NMIPENDSET_Pos (31UL) /*!< PPB ICSR: NMIPENDSET (Bit 31) */ +#define PPB_ICSR_NMIPENDSET_Msk (0x80000000UL) /*!< PPB ICSR: NMIPENDSET (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- PPB_VTOR ---------------------------------- */ +#define PPB_VTOR_TBLOFF_Pos (10UL) /*!< PPB VTOR: TBLOFF (Bit 10) */ +#define PPB_VTOR_TBLOFF_Msk (0xfffffc00UL) /*!< PPB VTOR: TBLOFF (Bitfield-Mask: 0x3fffff) */ + +/* ---------------------------------- PPB_AIRCR --------------------------------- */ +#define PPB_AIRCR_VECTRESET_Pos (0UL) /*!< PPB AIRCR: VECTRESET (Bit 0) */ +#define PPB_AIRCR_VECTRESET_Msk (0x1UL) /*!< PPB AIRCR: VECTRESET (Bitfield-Mask: 0x01) */ +#define PPB_AIRCR_VECTCLRACTIVE_Pos (1UL) /*!< PPB AIRCR: VECTCLRACTIVE (Bit 1) */ +#define PPB_AIRCR_VECTCLRACTIVE_Msk (0x2UL) /*!< PPB AIRCR: VECTCLRACTIVE (Bitfield-Mask: 0x01) */ +#define PPB_AIRCR_SYSRESETREQ_Pos (2UL) /*!< PPB AIRCR: SYSRESETREQ (Bit 2) */ +#define PPB_AIRCR_SYSRESETREQ_Msk (0x4UL) /*!< PPB AIRCR: SYSRESETREQ (Bitfield-Mask: 0x01) */ +#define PPB_AIRCR_PRIGROUP_Pos (8UL) /*!< PPB AIRCR: PRIGROUP (Bit 8) */ +#define PPB_AIRCR_PRIGROUP_Msk (0x700UL) /*!< PPB AIRCR: PRIGROUP (Bitfield-Mask: 0x07) */ +#define PPB_AIRCR_ENDIANNESS_Pos (15UL) /*!< PPB AIRCR: ENDIANNESS (Bit 15) */ +#define PPB_AIRCR_ENDIANNESS_Msk (0x8000UL) /*!< PPB AIRCR: ENDIANNESS (Bitfield-Mask: 0x01) */ +#define PPB_AIRCR_VECTKEY_Pos (16UL) /*!< PPB AIRCR: VECTKEY (Bit 16) */ +#define PPB_AIRCR_VECTKEY_Msk (0xffff0000UL) /*!< PPB AIRCR: VECTKEY (Bitfield-Mask: 0xffff) */ + +/* ----------------------------------- PPB_SCR ---------------------------------- */ +#define PPB_SCR_SLEEPONEXIT_Pos (1UL) /*!< PPB SCR: SLEEPONEXIT (Bit 1) */ +#define PPB_SCR_SLEEPONEXIT_Msk (0x2UL) /*!< PPB SCR: SLEEPONEXIT (Bitfield-Mask: 0x01) */ +#define PPB_SCR_SLEEPDEEP_Pos (2UL) /*!< PPB SCR: SLEEPDEEP (Bit 2) */ +#define PPB_SCR_SLEEPDEEP_Msk (0x4UL) /*!< PPB SCR: SLEEPDEEP (Bitfield-Mask: 0x01) */ +#define PPB_SCR_SEVONPEND_Pos (4UL) /*!< PPB SCR: SEVONPEND (Bit 4) */ +#define PPB_SCR_SEVONPEND_Msk (0x10UL) /*!< PPB SCR: SEVONPEND (Bitfield-Mask: 0x01) */ + +/* ----------------------------------- PPB_CCR ---------------------------------- */ +#define PPB_CCR_NONBASETHRDENA_Pos (0UL) /*!< PPB CCR: NONBASETHRDENA (Bit 0) */ +#define PPB_CCR_NONBASETHRDENA_Msk (0x1UL) /*!< PPB CCR: NONBASETHRDENA (Bitfield-Mask: 0x01) */ +#define PPB_CCR_USERSETMPEND_Pos (1UL) /*!< PPB CCR: USERSETMPEND (Bit 1) */ +#define PPB_CCR_USERSETMPEND_Msk (0x2UL) /*!< PPB CCR: USERSETMPEND (Bitfield-Mask: 0x01) */ +#define PPB_CCR_UNALIGN_TRP_Pos (3UL) /*!< PPB CCR: UNALIGN_TRP (Bit 3) */ +#define PPB_CCR_UNALIGN_TRP_Msk (0x8UL) /*!< PPB CCR: UNALIGN_TRP (Bitfield-Mask: 0x01) */ +#define PPB_CCR_DIV_0_TRP_Pos (4UL) /*!< PPB CCR: DIV_0_TRP (Bit 4) */ +#define PPB_CCR_DIV_0_TRP_Msk (0x10UL) /*!< PPB CCR: DIV_0_TRP (Bitfield-Mask: 0x01) */ +#define PPB_CCR_BFHFNMIGN_Pos (8UL) /*!< PPB CCR: BFHFNMIGN (Bit 8) */ +#define PPB_CCR_BFHFNMIGN_Msk (0x100UL) /*!< PPB CCR: BFHFNMIGN (Bitfield-Mask: 0x01) */ +#define PPB_CCR_STKALIGN_Pos (9UL) /*!< PPB CCR: STKALIGN (Bit 9) */ +#define PPB_CCR_STKALIGN_Msk (0x200UL) /*!< PPB CCR: STKALIGN (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- PPB_SHPR1 --------------------------------- */ +#define PPB_SHPR1_PRI_4_Pos (0UL) /*!< PPB SHPR1: PRI_4 (Bit 0) */ +#define PPB_SHPR1_PRI_4_Msk (0xffUL) /*!< PPB SHPR1: PRI_4 (Bitfield-Mask: 0xff) */ +#define PPB_SHPR1_PRI_5_Pos (8UL) /*!< PPB SHPR1: PRI_5 (Bit 8) */ +#define PPB_SHPR1_PRI_5_Msk (0xff00UL) /*!< PPB SHPR1: PRI_5 (Bitfield-Mask: 0xff) */ +#define PPB_SHPR1_PRI_6_Pos (16UL) /*!< PPB SHPR1: PRI_6 (Bit 16) */ +#define PPB_SHPR1_PRI_6_Msk (0xff0000UL) /*!< PPB SHPR1: PRI_6 (Bitfield-Mask: 0xff) */ + +/* ---------------------------------- PPB_SHPR2 --------------------------------- */ +#define PPB_SHPR2_PRI_11_Pos (24UL) /*!< PPB SHPR2: PRI_11 (Bit 24) */ +#define PPB_SHPR2_PRI_11_Msk (0xff000000UL) /*!< PPB SHPR2: PRI_11 (Bitfield-Mask: 0xff) */ + +/* ---------------------------------- PPB_SHPR3 --------------------------------- */ +#define PPB_SHPR3_PRI_14_Pos (16UL) /*!< PPB SHPR3: PRI_14 (Bit 16) */ +#define PPB_SHPR3_PRI_14_Msk (0xff0000UL) /*!< PPB SHPR3: PRI_14 (Bitfield-Mask: 0xff) */ +#define PPB_SHPR3_PRI_15_Pos (24UL) /*!< PPB SHPR3: PRI_15 (Bit 24) */ +#define PPB_SHPR3_PRI_15_Msk (0xff000000UL) /*!< PPB SHPR3: PRI_15 (Bitfield-Mask: 0xff) */ + +/* ---------------------------------- PPB_SHCSR --------------------------------- */ +#define PPB_SHCSR_MEMFAULTACT_Pos (0UL) /*!< PPB SHCSR: MEMFAULTACT (Bit 0) */ +#define PPB_SHCSR_MEMFAULTACT_Msk (0x1UL) /*!< PPB SHCSR: MEMFAULTACT (Bitfield-Mask: 0x01) */ +#define PPB_SHCSR_BUSFAULTACT_Pos (1UL) /*!< PPB SHCSR: BUSFAULTACT (Bit 1) */ +#define PPB_SHCSR_BUSFAULTACT_Msk (0x2UL) /*!< PPB SHCSR: BUSFAULTACT (Bitfield-Mask: 0x01) */ +#define PPB_SHCSR_USGFAULTACT_Pos (3UL) /*!< PPB SHCSR: USGFAULTACT (Bit 3) */ +#define PPB_SHCSR_USGFAULTACT_Msk (0x8UL) /*!< PPB SHCSR: USGFAULTACT (Bitfield-Mask: 0x01) */ +#define PPB_SHCSR_SVCALLACT_Pos (7UL) /*!< PPB SHCSR: SVCALLACT (Bit 7) */ +#define PPB_SHCSR_SVCALLACT_Msk (0x80UL) /*!< PPB SHCSR: SVCALLACT (Bitfield-Mask: 0x01) */ +#define PPB_SHCSR_MONITORACT_Pos (8UL) /*!< PPB SHCSR: MONITORACT (Bit 8) */ +#define PPB_SHCSR_MONITORACT_Msk (0x100UL) /*!< PPB SHCSR: MONITORACT (Bitfield-Mask: 0x01) */ +#define PPB_SHCSR_PENDSVACT_Pos (10UL) /*!< PPB SHCSR: PENDSVACT (Bit 10) */ +#define PPB_SHCSR_PENDSVACT_Msk (0x400UL) /*!< PPB SHCSR: PENDSVACT (Bitfield-Mask: 0x01) */ +#define PPB_SHCSR_SYSTICKACT_Pos (11UL) /*!< PPB SHCSR: SYSTICKACT (Bit 11) */ +#define PPB_SHCSR_SYSTICKACT_Msk (0x800UL) /*!< PPB SHCSR: SYSTICKACT (Bitfield-Mask: 0x01) */ +#define PPB_SHCSR_USGFAULTPENDED_Pos (12UL) /*!< PPB SHCSR: USGFAULTPENDED (Bit 12) */ +#define PPB_SHCSR_USGFAULTPENDED_Msk (0x1000UL) /*!< PPB SHCSR: USGFAULTPENDED (Bitfield-Mask: 0x01) */ +#define PPB_SHCSR_MEMFAULTPENDED_Pos (13UL) /*!< PPB SHCSR: MEMFAULTPENDED (Bit 13) */ +#define PPB_SHCSR_MEMFAULTPENDED_Msk (0x2000UL) /*!< PPB SHCSR: MEMFAULTPENDED (Bitfield-Mask: 0x01) */ +#define PPB_SHCSR_BUSFAULTPENDED_Pos (14UL) /*!< PPB SHCSR: BUSFAULTPENDED (Bit 14) */ +#define PPB_SHCSR_BUSFAULTPENDED_Msk (0x4000UL) /*!< PPB SHCSR: BUSFAULTPENDED (Bitfield-Mask: 0x01) */ +#define PPB_SHCSR_SVCALLPENDED_Pos (15UL) /*!< PPB SHCSR: SVCALLPENDED (Bit 15) */ +#define PPB_SHCSR_SVCALLPENDED_Msk (0x8000UL) /*!< PPB SHCSR: SVCALLPENDED (Bitfield-Mask: 0x01) */ +#define PPB_SHCSR_MEMFAULTENA_Pos (16UL) /*!< PPB SHCSR: MEMFAULTENA (Bit 16) */ +#define PPB_SHCSR_MEMFAULTENA_Msk (0x10000UL) /*!< PPB SHCSR: MEMFAULTENA (Bitfield-Mask: 0x01) */ +#define PPB_SHCSR_BUSFAULTENA_Pos (17UL) /*!< PPB SHCSR: BUSFAULTENA (Bit 17) */ +#define PPB_SHCSR_BUSFAULTENA_Msk (0x20000UL) /*!< PPB SHCSR: BUSFAULTENA (Bitfield-Mask: 0x01) */ +#define PPB_SHCSR_USGFAULTENA_Pos (18UL) /*!< PPB SHCSR: USGFAULTENA (Bit 18) */ +#define PPB_SHCSR_USGFAULTENA_Msk (0x40000UL) /*!< PPB SHCSR: USGFAULTENA (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- PPB_CFSR ---------------------------------- */ +#define PPB_CFSR_IACCVIOL_Pos (0UL) /*!< PPB CFSR: IACCVIOL (Bit 0) */ +#define PPB_CFSR_IACCVIOL_Msk (0x1UL) /*!< PPB CFSR: IACCVIOL (Bitfield-Mask: 0x01) */ +#define PPB_CFSR_DACCVIOL_Pos (1UL) /*!< PPB CFSR: DACCVIOL (Bit 1) */ +#define PPB_CFSR_DACCVIOL_Msk (0x2UL) /*!< PPB CFSR: DACCVIOL (Bitfield-Mask: 0x01) */ +#define PPB_CFSR_MUNSTKERR_Pos (3UL) /*!< PPB CFSR: MUNSTKERR (Bit 3) */ +#define PPB_CFSR_MUNSTKERR_Msk (0x8UL) /*!< PPB CFSR: MUNSTKERR (Bitfield-Mask: 0x01) */ +#define PPB_CFSR_MSTKERR_Pos (4UL) /*!< PPB CFSR: MSTKERR (Bit 4) */ +#define PPB_CFSR_MSTKERR_Msk (0x10UL) /*!< PPB CFSR: MSTKERR (Bitfield-Mask: 0x01) */ +#define PPB_CFSR_MLSPERR_Pos (5UL) /*!< PPB CFSR: MLSPERR (Bit 5) */ +#define PPB_CFSR_MLSPERR_Msk (0x20UL) /*!< PPB CFSR: MLSPERR (Bitfield-Mask: 0x01) */ +#define PPB_CFSR_MMARVALID_Pos (7UL) /*!< PPB CFSR: MMARVALID (Bit 7) */ +#define PPB_CFSR_MMARVALID_Msk (0x80UL) /*!< PPB CFSR: MMARVALID (Bitfield-Mask: 0x01) */ +#define PPB_CFSR_IBUSERR_Pos (8UL) /*!< PPB CFSR: IBUSERR (Bit 8) */ +#define PPB_CFSR_IBUSERR_Msk (0x100UL) /*!< PPB CFSR: IBUSERR (Bitfield-Mask: 0x01) */ +#define PPB_CFSR_PRECISERR_Pos (9UL) /*!< PPB CFSR: PRECISERR (Bit 9) */ +#define PPB_CFSR_PRECISERR_Msk (0x200UL) /*!< PPB CFSR: PRECISERR (Bitfield-Mask: 0x01) */ +#define PPB_CFSR_IMPRECISERR_Pos (10UL) /*!< PPB CFSR: IMPRECISERR (Bit 10) */ +#define PPB_CFSR_IMPRECISERR_Msk (0x400UL) /*!< PPB CFSR: IMPRECISERR (Bitfield-Mask: 0x01) */ +#define PPB_CFSR_UNSTKERR_Pos (11UL) /*!< PPB CFSR: UNSTKERR (Bit 11) */ +#define PPB_CFSR_UNSTKERR_Msk (0x800UL) /*!< PPB CFSR: UNSTKERR (Bitfield-Mask: 0x01) */ +#define PPB_CFSR_STKERR_Pos (12UL) /*!< PPB CFSR: STKERR (Bit 12) */ +#define PPB_CFSR_STKERR_Msk (0x1000UL) /*!< PPB CFSR: STKERR (Bitfield-Mask: 0x01) */ +#define PPB_CFSR_LSPERR_Pos (13UL) /*!< PPB CFSR: LSPERR (Bit 13) */ +#define PPB_CFSR_LSPERR_Msk (0x2000UL) /*!< PPB CFSR: LSPERR (Bitfield-Mask: 0x01) */ +#define PPB_CFSR_BFARVALID_Pos (15UL) /*!< PPB CFSR: BFARVALID (Bit 15) */ +#define PPB_CFSR_BFARVALID_Msk (0x8000UL) /*!< PPB CFSR: BFARVALID (Bitfield-Mask: 0x01) */ +#define PPB_CFSR_UNDEFINSTR_Pos (16UL) /*!< PPB CFSR: UNDEFINSTR (Bit 16) */ +#define PPB_CFSR_UNDEFINSTR_Msk (0x10000UL) /*!< PPB CFSR: UNDEFINSTR (Bitfield-Mask: 0x01) */ +#define PPB_CFSR_INVSTATE_Pos (17UL) /*!< PPB CFSR: INVSTATE (Bit 17) */ +#define PPB_CFSR_INVSTATE_Msk (0x20000UL) /*!< PPB CFSR: INVSTATE (Bitfield-Mask: 0x01) */ +#define PPB_CFSR_INVPC_Pos (18UL) /*!< PPB CFSR: INVPC (Bit 18) */ +#define PPB_CFSR_INVPC_Msk (0x40000UL) /*!< PPB CFSR: INVPC (Bitfield-Mask: 0x01) */ +#define PPB_CFSR_NOCP_Pos (19UL) /*!< PPB CFSR: NOCP (Bit 19) */ +#define PPB_CFSR_NOCP_Msk (0x80000UL) /*!< PPB CFSR: NOCP (Bitfield-Mask: 0x01) */ +#define PPB_CFSR_UNALIGNED_Pos (24UL) /*!< PPB CFSR: UNALIGNED (Bit 24) */ +#define PPB_CFSR_UNALIGNED_Msk (0x1000000UL) /*!< PPB CFSR: UNALIGNED (Bitfield-Mask: 0x01) */ +#define PPB_CFSR_DIVBYZERO_Pos (25UL) /*!< PPB CFSR: DIVBYZERO (Bit 25) */ +#define PPB_CFSR_DIVBYZERO_Msk (0x2000000UL) /*!< PPB CFSR: DIVBYZERO (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- PPB_HFSR ---------------------------------- */ +#define PPB_HFSR_VECTTBL_Pos (1UL) /*!< PPB HFSR: VECTTBL (Bit 1) */ +#define PPB_HFSR_VECTTBL_Msk (0x2UL) /*!< PPB HFSR: VECTTBL (Bitfield-Mask: 0x01) */ +#define PPB_HFSR_FORCED_Pos (30UL) /*!< PPB HFSR: FORCED (Bit 30) */ +#define PPB_HFSR_FORCED_Msk (0x40000000UL) /*!< PPB HFSR: FORCED (Bitfield-Mask: 0x01) */ +#define PPB_HFSR_DEBUGEVT_Pos (31UL) /*!< PPB HFSR: DEBUGEVT (Bit 31) */ +#define PPB_HFSR_DEBUGEVT_Msk (0x80000000UL) /*!< PPB HFSR: DEBUGEVT (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- PPB_MMFAR --------------------------------- */ +#define PPB_MMFAR_ADDRESS_Pos (0UL) /*!< PPB MMFAR: ADDRESS (Bit 0) */ +#define PPB_MMFAR_ADDRESS_Msk (0xffffffffUL) /*!< PPB MMFAR: ADDRESS (Bitfield-Mask: 0xffffffff) */ + +/* ---------------------------------- PPB_BFAR ---------------------------------- */ +#define PPB_BFAR_ADDRESS_Pos (0UL) /*!< PPB BFAR: ADDRESS (Bit 0) */ +#define PPB_BFAR_ADDRESS_Msk (0xffffffffUL) /*!< PPB BFAR: ADDRESS (Bitfield-Mask: 0xffffffff) */ + +/* ---------------------------------- PPB_AFSR ---------------------------------- */ +#define PPB_AFSR_VALUE_Pos (0UL) /*!< PPB AFSR: VALUE (Bit 0) */ +#define PPB_AFSR_VALUE_Msk (0xffffffffUL) /*!< PPB AFSR: VALUE (Bitfield-Mask: 0xffffffff) */ + +/* ---------------------------------- PPB_CPACR --------------------------------- */ +#define PPB_CPACR_CP10_Pos (20UL) /*!< PPB CPACR: CP10 (Bit 20) */ +#define PPB_CPACR_CP10_Msk (0x300000UL) /*!< PPB CPACR: CP10 (Bitfield-Mask: 0x03) */ +#define PPB_CPACR_CP11_Pos (22UL) /*!< PPB CPACR: CP11 (Bit 22) */ +#define PPB_CPACR_CP11_Msk (0xc00000UL) /*!< PPB CPACR: CP11 (Bitfield-Mask: 0x03) */ + +/* -------------------------------- PPB_MPU_TYPE -------------------------------- */ +#define PPB_MPU_TYPE_SEPARATE_Pos (0UL) /*!< PPB MPU_TYPE: SEPARATE (Bit 0) */ +#define PPB_MPU_TYPE_SEPARATE_Msk (0x1UL) /*!< PPB MPU_TYPE: SEPARATE (Bitfield-Mask: 0x01) */ +#define PPB_MPU_TYPE_DREGION_Pos (8UL) /*!< PPB MPU_TYPE: DREGION (Bit 8) */ +#define PPB_MPU_TYPE_DREGION_Msk (0xff00UL) /*!< PPB MPU_TYPE: DREGION (Bitfield-Mask: 0xff) */ +#define PPB_MPU_TYPE_IREGION_Pos (16UL) /*!< PPB MPU_TYPE: IREGION (Bit 16) */ +#define PPB_MPU_TYPE_IREGION_Msk (0xff0000UL) /*!< PPB MPU_TYPE: IREGION (Bitfield-Mask: 0xff) */ + +/* -------------------------------- PPB_MPU_CTRL -------------------------------- */ +#define PPB_MPU_CTRL_ENABLE_Pos (0UL) /*!< PPB MPU_CTRL: ENABLE (Bit 0) */ +#define PPB_MPU_CTRL_ENABLE_Msk (0x1UL) /*!< PPB MPU_CTRL: ENABLE (Bitfield-Mask: 0x01) */ +#define PPB_MPU_CTRL_HFNMIENA_Pos (1UL) /*!< PPB MPU_CTRL: HFNMIENA (Bit 1) */ +#define PPB_MPU_CTRL_HFNMIENA_Msk (0x2UL) /*!< PPB MPU_CTRL: HFNMIENA (Bitfield-Mask: 0x01) */ +#define PPB_MPU_CTRL_PRIVDEFENA_Pos (2UL) /*!< PPB MPU_CTRL: PRIVDEFENA (Bit 2) */ +#define PPB_MPU_CTRL_PRIVDEFENA_Msk (0x4UL) /*!< PPB MPU_CTRL: PRIVDEFENA (Bitfield-Mask: 0x01) */ + +/* --------------------------------- PPB_MPU_RNR -------------------------------- */ +#define PPB_MPU_RNR_REGION_Pos (0UL) /*!< PPB MPU_RNR: REGION (Bit 0) */ +#define PPB_MPU_RNR_REGION_Msk (0xffUL) /*!< PPB MPU_RNR: REGION (Bitfield-Mask: 0xff) */ + +/* -------------------------------- PPB_MPU_RBAR -------------------------------- */ +#define PPB_MPU_RBAR_REGION_Pos (0UL) /*!< PPB MPU_RBAR: REGION (Bit 0) */ +#define PPB_MPU_RBAR_REGION_Msk (0xfUL) /*!< PPB MPU_RBAR: REGION (Bitfield-Mask: 0x0f) */ +#define PPB_MPU_RBAR_VALID_Pos (4UL) /*!< PPB MPU_RBAR: VALID (Bit 4) */ +#define PPB_MPU_RBAR_VALID_Msk (0x10UL) /*!< PPB MPU_RBAR: VALID (Bitfield-Mask: 0x01) */ +#define PPB_MPU_RBAR_ADDR_Pos (9UL) /*!< PPB MPU_RBAR: ADDR (Bit 9) */ +#define PPB_MPU_RBAR_ADDR_Msk (0xfffffe00UL) /*!< PPB MPU_RBAR: ADDR (Bitfield-Mask: 0x7fffff) */ + +/* -------------------------------- PPB_MPU_RASR -------------------------------- */ +#define PPB_MPU_RASR_ENABLE_Pos (0UL) /*!< PPB MPU_RASR: ENABLE (Bit 0) */ +#define PPB_MPU_RASR_ENABLE_Msk (0x1UL) /*!< PPB MPU_RASR: ENABLE (Bitfield-Mask: 0x01) */ +#define PPB_MPU_RASR_SIZE_Pos (1UL) /*!< PPB MPU_RASR: SIZE (Bit 1) */ +#define PPB_MPU_RASR_SIZE_Msk (0x3eUL) /*!< PPB MPU_RASR: SIZE (Bitfield-Mask: 0x1f) */ +#define PPB_MPU_RASR_SRD_Pos (8UL) /*!< PPB MPU_RASR: SRD (Bit 8) */ +#define PPB_MPU_RASR_SRD_Msk (0xff00UL) /*!< PPB MPU_RASR: SRD (Bitfield-Mask: 0xff) */ +#define PPB_MPU_RASR_B_Pos (16UL) /*!< PPB MPU_RASR: B (Bit 16) */ +#define PPB_MPU_RASR_B_Msk (0x10000UL) /*!< PPB MPU_RASR: B (Bitfield-Mask: 0x01) */ +#define PPB_MPU_RASR_C_Pos (17UL) /*!< PPB MPU_RASR: C (Bit 17) */ +#define PPB_MPU_RASR_C_Msk (0x20000UL) /*!< PPB MPU_RASR: C (Bitfield-Mask: 0x01) */ +#define PPB_MPU_RASR_S_Pos (18UL) /*!< PPB MPU_RASR: S (Bit 18) */ +#define PPB_MPU_RASR_S_Msk (0x40000UL) /*!< PPB MPU_RASR: S (Bitfield-Mask: 0x01) */ +#define PPB_MPU_RASR_TEX_Pos (19UL) /*!< PPB MPU_RASR: TEX (Bit 19) */ +#define PPB_MPU_RASR_TEX_Msk (0x380000UL) /*!< PPB MPU_RASR: TEX (Bitfield-Mask: 0x07) */ +#define PPB_MPU_RASR_AP_Pos (24UL) /*!< PPB MPU_RASR: AP (Bit 24) */ +#define PPB_MPU_RASR_AP_Msk (0x7000000UL) /*!< PPB MPU_RASR: AP (Bitfield-Mask: 0x07) */ +#define PPB_MPU_RASR_XN_Pos (28UL) /*!< PPB MPU_RASR: XN (Bit 28) */ +#define PPB_MPU_RASR_XN_Msk (0x10000000UL) /*!< PPB MPU_RASR: XN (Bitfield-Mask: 0x01) */ + +/* ------------------------------- PPB_MPU_RBAR_A1 ------------------------------ */ +#define PPB_MPU_RBAR_A1_REGION_Pos (0UL) /*!< PPB MPU_RBAR_A1: REGION (Bit 0) */ +#define PPB_MPU_RBAR_A1_REGION_Msk (0xfUL) /*!< PPB MPU_RBAR_A1: REGION (Bitfield-Mask: 0x0f) */ +#define PPB_MPU_RBAR_A1_VALID_Pos (4UL) /*!< PPB MPU_RBAR_A1: VALID (Bit 4) */ +#define PPB_MPU_RBAR_A1_VALID_Msk (0x10UL) /*!< PPB MPU_RBAR_A1: VALID (Bitfield-Mask: 0x01) */ +#define PPB_MPU_RBAR_A1_ADDR_Pos (9UL) /*!< PPB MPU_RBAR_A1: ADDR (Bit 9) */ +#define PPB_MPU_RBAR_A1_ADDR_Msk (0xfffffe00UL) /*!< PPB MPU_RBAR_A1: ADDR (Bitfield-Mask: 0x7fffff) */ + +/* ------------------------------- PPB_MPU_RASR_A1 ------------------------------ */ +#define PPB_MPU_RASR_A1_ENABLE_Pos (0UL) /*!< PPB MPU_RASR_A1: ENABLE (Bit 0) */ +#define PPB_MPU_RASR_A1_ENABLE_Msk (0x1UL) /*!< PPB MPU_RASR_A1: ENABLE (Bitfield-Mask: 0x01) */ +#define PPB_MPU_RASR_A1_SIZE_Pos (1UL) /*!< PPB MPU_RASR_A1: SIZE (Bit 1) */ +#define PPB_MPU_RASR_A1_SIZE_Msk (0x3eUL) /*!< PPB MPU_RASR_A1: SIZE (Bitfield-Mask: 0x1f) */ +#define PPB_MPU_RASR_A1_SRD_Pos (8UL) /*!< PPB MPU_RASR_A1: SRD (Bit 8) */ +#define PPB_MPU_RASR_A1_SRD_Msk (0xff00UL) /*!< PPB MPU_RASR_A1: SRD (Bitfield-Mask: 0xff) */ +#define PPB_MPU_RASR_A1_B_Pos (16UL) /*!< PPB MPU_RASR_A1: B (Bit 16) */ +#define PPB_MPU_RASR_A1_B_Msk (0x10000UL) /*!< PPB MPU_RASR_A1: B (Bitfield-Mask: 0x01) */ +#define PPB_MPU_RASR_A1_C_Pos (17UL) /*!< PPB MPU_RASR_A1: C (Bit 17) */ +#define PPB_MPU_RASR_A1_C_Msk (0x20000UL) /*!< PPB MPU_RASR_A1: C (Bitfield-Mask: 0x01) */ +#define PPB_MPU_RASR_A1_S_Pos (18UL) /*!< PPB MPU_RASR_A1: S (Bit 18) */ +#define PPB_MPU_RASR_A1_S_Msk (0x40000UL) /*!< PPB MPU_RASR_A1: S (Bitfield-Mask: 0x01) */ +#define PPB_MPU_RASR_A1_TEX_Pos (19UL) /*!< PPB MPU_RASR_A1: TEX (Bit 19) */ +#define PPB_MPU_RASR_A1_TEX_Msk (0x380000UL) /*!< PPB MPU_RASR_A1: TEX (Bitfield-Mask: 0x07) */ +#define PPB_MPU_RASR_A1_AP_Pos (24UL) /*!< PPB MPU_RASR_A1: AP (Bit 24) */ +#define PPB_MPU_RASR_A1_AP_Msk (0x7000000UL) /*!< PPB MPU_RASR_A1: AP (Bitfield-Mask: 0x07) */ +#define PPB_MPU_RASR_A1_XN_Pos (28UL) /*!< PPB MPU_RASR_A1: XN (Bit 28) */ +#define PPB_MPU_RASR_A1_XN_Msk (0x10000000UL) /*!< PPB MPU_RASR_A1: XN (Bitfield-Mask: 0x01) */ + +/* ------------------------------- PPB_MPU_RBAR_A2 ------------------------------ */ +#define PPB_MPU_RBAR_A2_REGION_Pos (0UL) /*!< PPB MPU_RBAR_A2: REGION (Bit 0) */ +#define PPB_MPU_RBAR_A2_REGION_Msk (0xfUL) /*!< PPB MPU_RBAR_A2: REGION (Bitfield-Mask: 0x0f) */ +#define PPB_MPU_RBAR_A2_VALID_Pos (4UL) /*!< PPB MPU_RBAR_A2: VALID (Bit 4) */ +#define PPB_MPU_RBAR_A2_VALID_Msk (0x10UL) /*!< PPB MPU_RBAR_A2: VALID (Bitfield-Mask: 0x01) */ +#define PPB_MPU_RBAR_A2_ADDR_Pos (9UL) /*!< PPB MPU_RBAR_A2: ADDR (Bit 9) */ +#define PPB_MPU_RBAR_A2_ADDR_Msk (0xfffffe00UL) /*!< PPB MPU_RBAR_A2: ADDR (Bitfield-Mask: 0x7fffff) */ + +/* ------------------------------- PPB_MPU_RASR_A2 ------------------------------ */ +#define PPB_MPU_RASR_A2_ENABLE_Pos (0UL) /*!< PPB MPU_RASR_A2: ENABLE (Bit 0) */ +#define PPB_MPU_RASR_A2_ENABLE_Msk (0x1UL) /*!< PPB MPU_RASR_A2: ENABLE (Bitfield-Mask: 0x01) */ +#define PPB_MPU_RASR_A2_SIZE_Pos (1UL) /*!< PPB MPU_RASR_A2: SIZE (Bit 1) */ +#define PPB_MPU_RASR_A2_SIZE_Msk (0x3eUL) /*!< PPB MPU_RASR_A2: SIZE (Bitfield-Mask: 0x1f) */ +#define PPB_MPU_RASR_A2_SRD_Pos (8UL) /*!< PPB MPU_RASR_A2: SRD (Bit 8) */ +#define PPB_MPU_RASR_A2_SRD_Msk (0xff00UL) /*!< PPB MPU_RASR_A2: SRD (Bitfield-Mask: 0xff) */ +#define PPB_MPU_RASR_A2_B_Pos (16UL) /*!< PPB MPU_RASR_A2: B (Bit 16) */ +#define PPB_MPU_RASR_A2_B_Msk (0x10000UL) /*!< PPB MPU_RASR_A2: B (Bitfield-Mask: 0x01) */ +#define PPB_MPU_RASR_A2_C_Pos (17UL) /*!< PPB MPU_RASR_A2: C (Bit 17) */ +#define PPB_MPU_RASR_A2_C_Msk (0x20000UL) /*!< PPB MPU_RASR_A2: C (Bitfield-Mask: 0x01) */ +#define PPB_MPU_RASR_A2_S_Pos (18UL) /*!< PPB MPU_RASR_A2: S (Bit 18) */ +#define PPB_MPU_RASR_A2_S_Msk (0x40000UL) /*!< PPB MPU_RASR_A2: S (Bitfield-Mask: 0x01) */ +#define PPB_MPU_RASR_A2_TEX_Pos (19UL) /*!< PPB MPU_RASR_A2: TEX (Bit 19) */ +#define PPB_MPU_RASR_A2_TEX_Msk (0x380000UL) /*!< PPB MPU_RASR_A2: TEX (Bitfield-Mask: 0x07) */ +#define PPB_MPU_RASR_A2_AP_Pos (24UL) /*!< PPB MPU_RASR_A2: AP (Bit 24) */ +#define PPB_MPU_RASR_A2_AP_Msk (0x7000000UL) /*!< PPB MPU_RASR_A2: AP (Bitfield-Mask: 0x07) */ +#define PPB_MPU_RASR_A2_XN_Pos (28UL) /*!< PPB MPU_RASR_A2: XN (Bit 28) */ +#define PPB_MPU_RASR_A2_XN_Msk (0x10000000UL) /*!< PPB MPU_RASR_A2: XN (Bitfield-Mask: 0x01) */ + +/* ------------------------------- PPB_MPU_RBAR_A3 ------------------------------ */ +#define PPB_MPU_RBAR_A3_REGION_Pos (0UL) /*!< PPB MPU_RBAR_A3: REGION (Bit 0) */ +#define PPB_MPU_RBAR_A3_REGION_Msk (0xfUL) /*!< PPB MPU_RBAR_A3: REGION (Bitfield-Mask: 0x0f) */ +#define PPB_MPU_RBAR_A3_VALID_Pos (4UL) /*!< PPB MPU_RBAR_A3: VALID (Bit 4) */ +#define PPB_MPU_RBAR_A3_VALID_Msk (0x10UL) /*!< PPB MPU_RBAR_A3: VALID (Bitfield-Mask: 0x01) */ +#define PPB_MPU_RBAR_A3_ADDR_Pos (9UL) /*!< PPB MPU_RBAR_A3: ADDR (Bit 9) */ +#define PPB_MPU_RBAR_A3_ADDR_Msk (0xfffffe00UL) /*!< PPB MPU_RBAR_A3: ADDR (Bitfield-Mask: 0x7fffff) */ + +/* ------------------------------- PPB_MPU_RASR_A3 ------------------------------ */ +#define PPB_MPU_RASR_A3_ENABLE_Pos (0UL) /*!< PPB MPU_RASR_A3: ENABLE (Bit 0) */ +#define PPB_MPU_RASR_A3_ENABLE_Msk (0x1UL) /*!< PPB MPU_RASR_A3: ENABLE (Bitfield-Mask: 0x01) */ +#define PPB_MPU_RASR_A3_SIZE_Pos (1UL) /*!< PPB MPU_RASR_A3: SIZE (Bit 1) */ +#define PPB_MPU_RASR_A3_SIZE_Msk (0x3eUL) /*!< PPB MPU_RASR_A3: SIZE (Bitfield-Mask: 0x1f) */ +#define PPB_MPU_RASR_A3_SRD_Pos (8UL) /*!< PPB MPU_RASR_A3: SRD (Bit 8) */ +#define PPB_MPU_RASR_A3_SRD_Msk (0xff00UL) /*!< PPB MPU_RASR_A3: SRD (Bitfield-Mask: 0xff) */ +#define PPB_MPU_RASR_A3_B_Pos (16UL) /*!< PPB MPU_RASR_A3: B (Bit 16) */ +#define PPB_MPU_RASR_A3_B_Msk (0x10000UL) /*!< PPB MPU_RASR_A3: B (Bitfield-Mask: 0x01) */ +#define PPB_MPU_RASR_A3_C_Pos (17UL) /*!< PPB MPU_RASR_A3: C (Bit 17) */ +#define PPB_MPU_RASR_A3_C_Msk (0x20000UL) /*!< PPB MPU_RASR_A3: C (Bitfield-Mask: 0x01) */ +#define PPB_MPU_RASR_A3_S_Pos (18UL) /*!< PPB MPU_RASR_A3: S (Bit 18) */ +#define PPB_MPU_RASR_A3_S_Msk (0x40000UL) /*!< PPB MPU_RASR_A3: S (Bitfield-Mask: 0x01) */ +#define PPB_MPU_RASR_A3_TEX_Pos (19UL) /*!< PPB MPU_RASR_A3: TEX (Bit 19) */ +#define PPB_MPU_RASR_A3_TEX_Msk (0x380000UL) /*!< PPB MPU_RASR_A3: TEX (Bitfield-Mask: 0x07) */ +#define PPB_MPU_RASR_A3_AP_Pos (24UL) /*!< PPB MPU_RASR_A3: AP (Bit 24) */ +#define PPB_MPU_RASR_A3_AP_Msk (0x7000000UL) /*!< PPB MPU_RASR_A3: AP (Bitfield-Mask: 0x07) */ +#define PPB_MPU_RASR_A3_XN_Pos (28UL) /*!< PPB MPU_RASR_A3: XN (Bit 28) */ +#define PPB_MPU_RASR_A3_XN_Msk (0x10000000UL) /*!< PPB MPU_RASR_A3: XN (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- PPB_STIR ---------------------------------- */ +#define PPB_STIR_INTID_Pos (0UL) /*!< PPB STIR: INTID (Bit 0) */ +#define PPB_STIR_INTID_Msk (0x1ffUL) /*!< PPB STIR: INTID (Bitfield-Mask: 0x1ff) */ + +/* ---------------------------------- PPB_FPCCR --------------------------------- */ +#define PPB_FPCCR_LSPACT_Pos (0UL) /*!< PPB FPCCR: LSPACT (Bit 0) */ +#define PPB_FPCCR_LSPACT_Msk (0x1UL) /*!< PPB FPCCR: LSPACT (Bitfield-Mask: 0x01) */ +#define PPB_FPCCR_USER_Pos (1UL) /*!< PPB FPCCR: USER (Bit 1) */ +#define PPB_FPCCR_USER_Msk (0x2UL) /*!< PPB FPCCR: USER (Bitfield-Mask: 0x01) */ +#define PPB_FPCCR_THREAD_Pos (3UL) /*!< PPB FPCCR: THREAD (Bit 3) */ +#define PPB_FPCCR_THREAD_Msk (0x8UL) /*!< PPB FPCCR: THREAD (Bitfield-Mask: 0x01) */ +#define PPB_FPCCR_HFRDY_Pos (4UL) /*!< PPB FPCCR: HFRDY (Bit 4) */ +#define PPB_FPCCR_HFRDY_Msk (0x10UL) /*!< PPB FPCCR: HFRDY (Bitfield-Mask: 0x01) */ +#define PPB_FPCCR_MMRDY_Pos (5UL) /*!< PPB FPCCR: MMRDY (Bit 5) */ +#define PPB_FPCCR_MMRDY_Msk (0x20UL) /*!< PPB FPCCR: MMRDY (Bitfield-Mask: 0x01) */ +#define PPB_FPCCR_BFRDY_Pos (6UL) /*!< PPB FPCCR: BFRDY (Bit 6) */ +#define PPB_FPCCR_BFRDY_Msk (0x40UL) /*!< PPB FPCCR: BFRDY (Bitfield-Mask: 0x01) */ +#define PPB_FPCCR_MONRDY_Pos (8UL) /*!< PPB FPCCR: MONRDY (Bit 8) */ +#define PPB_FPCCR_MONRDY_Msk (0x100UL) /*!< PPB FPCCR: MONRDY (Bitfield-Mask: 0x01) */ +#define PPB_FPCCR_LSPEN_Pos (30UL) /*!< PPB FPCCR: LSPEN (Bit 30) */ +#define PPB_FPCCR_LSPEN_Msk (0x40000000UL) /*!< PPB FPCCR: LSPEN (Bitfield-Mask: 0x01) */ +#define PPB_FPCCR_ASPEN_Pos (31UL) /*!< PPB FPCCR: ASPEN (Bit 31) */ +#define PPB_FPCCR_ASPEN_Msk (0x80000000UL) /*!< PPB FPCCR: ASPEN (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- PPB_FPCAR --------------------------------- */ +#define PPB_FPCAR_ADDRESS_Pos (3UL) /*!< PPB FPCAR: ADDRESS (Bit 3) */ +#define PPB_FPCAR_ADDRESS_Msk (0xfffffff8UL) /*!< PPB FPCAR: ADDRESS (Bitfield-Mask: 0x1fffffff) */ + +/* --------------------------------- PPB_FPDSCR --------------------------------- */ +#define PPB_FPDSCR_RMode_Pos (22UL) /*!< PPB FPDSCR: RMode (Bit 22) */ +#define PPB_FPDSCR_RMode_Msk (0xc00000UL) /*!< PPB FPDSCR: RMode (Bitfield-Mask: 0x03) */ +#define PPB_FPDSCR_FZ_Pos (24UL) /*!< PPB FPDSCR: FZ (Bit 24) */ +#define PPB_FPDSCR_FZ_Msk (0x1000000UL) /*!< PPB FPDSCR: FZ (Bitfield-Mask: 0x01) */ +#define PPB_FPDSCR_DN_Pos (25UL) /*!< PPB FPDSCR: DN (Bit 25) */ +#define PPB_FPDSCR_DN_Msk (0x2000000UL) /*!< PPB FPDSCR: DN (Bitfield-Mask: 0x01) */ +#define PPB_FPDSCR_AHP_Pos (26UL) /*!< PPB FPDSCR: AHP (Bit 26) */ +#define PPB_FPDSCR_AHP_Msk (0x4000000UL) /*!< PPB FPDSCR: AHP (Bitfield-Mask: 0x01) */ + + +/* ================================================================================ */ +/* ================ struct 'DLR' Position & Mask ================ */ +/* ================================================================================ */ + + +/* --------------------------------- DLR_OVRSTAT -------------------------------- */ +#define DLR_OVRSTAT_LN0_Pos (0UL) /*!< DLR OVRSTAT: LN0 (Bit 0) */ +#define DLR_OVRSTAT_LN0_Msk (0x1UL) /*!< DLR OVRSTAT: LN0 (Bitfield-Mask: 0x01) */ +#define DLR_OVRSTAT_LN1_Pos (1UL) /*!< DLR OVRSTAT: LN1 (Bit 1) */ +#define DLR_OVRSTAT_LN1_Msk (0x2UL) /*!< DLR OVRSTAT: LN1 (Bitfield-Mask: 0x01) */ +#define DLR_OVRSTAT_LN2_Pos (2UL) /*!< DLR OVRSTAT: LN2 (Bit 2) */ +#define DLR_OVRSTAT_LN2_Msk (0x4UL) /*!< DLR OVRSTAT: LN2 (Bitfield-Mask: 0x01) */ +#define DLR_OVRSTAT_LN3_Pos (3UL) /*!< DLR OVRSTAT: LN3 (Bit 3) */ +#define DLR_OVRSTAT_LN3_Msk (0x8UL) /*!< DLR OVRSTAT: LN3 (Bitfield-Mask: 0x01) */ +#define DLR_OVRSTAT_LN4_Pos (4UL) /*!< DLR OVRSTAT: LN4 (Bit 4) */ +#define DLR_OVRSTAT_LN4_Msk (0x10UL) /*!< DLR OVRSTAT: LN4 (Bitfield-Mask: 0x01) */ +#define DLR_OVRSTAT_LN5_Pos (5UL) /*!< DLR OVRSTAT: LN5 (Bit 5) */ +#define DLR_OVRSTAT_LN5_Msk (0x20UL) /*!< DLR OVRSTAT: LN5 (Bitfield-Mask: 0x01) */ +#define DLR_OVRSTAT_LN6_Pos (6UL) /*!< DLR OVRSTAT: LN6 (Bit 6) */ +#define DLR_OVRSTAT_LN6_Msk (0x40UL) /*!< DLR OVRSTAT: LN6 (Bitfield-Mask: 0x01) */ +#define DLR_OVRSTAT_LN7_Pos (7UL) /*!< DLR OVRSTAT: LN7 (Bit 7) */ +#define DLR_OVRSTAT_LN7_Msk (0x80UL) /*!< DLR OVRSTAT: LN7 (Bitfield-Mask: 0x01) */ + +/* --------------------------------- DLR_OVRCLR --------------------------------- */ +#define DLR_OVRCLR_LN0_Pos (0UL) /*!< DLR OVRCLR: LN0 (Bit 0) */ +#define DLR_OVRCLR_LN0_Msk (0x1UL) /*!< DLR OVRCLR: LN0 (Bitfield-Mask: 0x01) */ +#define DLR_OVRCLR_LN1_Pos (1UL) /*!< DLR OVRCLR: LN1 (Bit 1) */ +#define DLR_OVRCLR_LN1_Msk (0x2UL) /*!< DLR OVRCLR: LN1 (Bitfield-Mask: 0x01) */ +#define DLR_OVRCLR_LN2_Pos (2UL) /*!< DLR OVRCLR: LN2 (Bit 2) */ +#define DLR_OVRCLR_LN2_Msk (0x4UL) /*!< DLR OVRCLR: LN2 (Bitfield-Mask: 0x01) */ +#define DLR_OVRCLR_LN3_Pos (3UL) /*!< DLR OVRCLR: LN3 (Bit 3) */ +#define DLR_OVRCLR_LN3_Msk (0x8UL) /*!< DLR OVRCLR: LN3 (Bitfield-Mask: 0x01) */ +#define DLR_OVRCLR_LN4_Pos (4UL) /*!< DLR OVRCLR: LN4 (Bit 4) */ +#define DLR_OVRCLR_LN4_Msk (0x10UL) /*!< DLR OVRCLR: LN4 (Bitfield-Mask: 0x01) */ +#define DLR_OVRCLR_LN5_Pos (5UL) /*!< DLR OVRCLR: LN5 (Bit 5) */ +#define DLR_OVRCLR_LN5_Msk (0x20UL) /*!< DLR OVRCLR: LN5 (Bitfield-Mask: 0x01) */ +#define DLR_OVRCLR_LN6_Pos (6UL) /*!< DLR OVRCLR: LN6 (Bit 6) */ +#define DLR_OVRCLR_LN6_Msk (0x40UL) /*!< DLR OVRCLR: LN6 (Bitfield-Mask: 0x01) */ +#define DLR_OVRCLR_LN7_Pos (7UL) /*!< DLR OVRCLR: LN7 (Bit 7) */ +#define DLR_OVRCLR_LN7_Msk (0x80UL) /*!< DLR OVRCLR: LN7 (Bitfield-Mask: 0x01) */ + +/* --------------------------------- DLR_SRSEL0 --------------------------------- */ +#define DLR_SRSEL0_RS0_Pos (0UL) /*!< DLR SRSEL0: RS0 (Bit 0) */ +#define DLR_SRSEL0_RS0_Msk (0xfUL) /*!< DLR SRSEL0: RS0 (Bitfield-Mask: 0x0f) */ +#define DLR_SRSEL0_RS1_Pos (4UL) /*!< DLR SRSEL0: RS1 (Bit 4) */ +#define DLR_SRSEL0_RS1_Msk (0xf0UL) /*!< DLR SRSEL0: RS1 (Bitfield-Mask: 0x0f) */ +#define DLR_SRSEL0_RS2_Pos (8UL) /*!< DLR SRSEL0: RS2 (Bit 8) */ +#define DLR_SRSEL0_RS2_Msk (0xf00UL) /*!< DLR SRSEL0: RS2 (Bitfield-Mask: 0x0f) */ +#define DLR_SRSEL0_RS3_Pos (12UL) /*!< DLR SRSEL0: RS3 (Bit 12) */ +#define DLR_SRSEL0_RS3_Msk (0xf000UL) /*!< DLR SRSEL0: RS3 (Bitfield-Mask: 0x0f) */ +#define DLR_SRSEL0_RS4_Pos (16UL) /*!< DLR SRSEL0: RS4 (Bit 16) */ +#define DLR_SRSEL0_RS4_Msk (0xf0000UL) /*!< DLR SRSEL0: RS4 (Bitfield-Mask: 0x0f) */ +#define DLR_SRSEL0_RS5_Pos (20UL) /*!< DLR SRSEL0: RS5 (Bit 20) */ +#define DLR_SRSEL0_RS5_Msk (0xf00000UL) /*!< DLR SRSEL0: RS5 (Bitfield-Mask: 0x0f) */ +#define DLR_SRSEL0_RS6_Pos (24UL) /*!< DLR SRSEL0: RS6 (Bit 24) */ +#define DLR_SRSEL0_RS6_Msk (0xf000000UL) /*!< DLR SRSEL0: RS6 (Bitfield-Mask: 0x0f) */ +#define DLR_SRSEL0_RS7_Pos (28UL) /*!< DLR SRSEL0: RS7 (Bit 28) */ +#define DLR_SRSEL0_RS7_Msk (0xf0000000UL) /*!< DLR SRSEL0: RS7 (Bitfield-Mask: 0x0f) */ + +/* ---------------------------------- DLR_LNEN ---------------------------------- */ +#define DLR_LNEN_LN0_Pos (0UL) /*!< DLR LNEN: LN0 (Bit 0) */ +#define DLR_LNEN_LN0_Msk (0x1UL) /*!< DLR LNEN: LN0 (Bitfield-Mask: 0x01) */ +#define DLR_LNEN_LN1_Pos (1UL) /*!< DLR LNEN: LN1 (Bit 1) */ +#define DLR_LNEN_LN1_Msk (0x2UL) /*!< DLR LNEN: LN1 (Bitfield-Mask: 0x01) */ +#define DLR_LNEN_LN2_Pos (2UL) /*!< DLR LNEN: LN2 (Bit 2) */ +#define DLR_LNEN_LN2_Msk (0x4UL) /*!< DLR LNEN: LN2 (Bitfield-Mask: 0x01) */ +#define DLR_LNEN_LN3_Pos (3UL) /*!< DLR LNEN: LN3 (Bit 3) */ +#define DLR_LNEN_LN3_Msk (0x8UL) /*!< DLR LNEN: LN3 (Bitfield-Mask: 0x01) */ +#define DLR_LNEN_LN4_Pos (4UL) /*!< DLR LNEN: LN4 (Bit 4) */ +#define DLR_LNEN_LN4_Msk (0x10UL) /*!< DLR LNEN: LN4 (Bitfield-Mask: 0x01) */ +#define DLR_LNEN_LN5_Pos (5UL) /*!< DLR LNEN: LN5 (Bit 5) */ +#define DLR_LNEN_LN5_Msk (0x20UL) /*!< DLR LNEN: LN5 (Bitfield-Mask: 0x01) */ +#define DLR_LNEN_LN6_Pos (6UL) /*!< DLR LNEN: LN6 (Bit 6) */ +#define DLR_LNEN_LN6_Msk (0x40UL) /*!< DLR LNEN: LN6 (Bitfield-Mask: 0x01) */ +#define DLR_LNEN_LN7_Pos (7UL) /*!< DLR LNEN: LN7 (Bit 7) */ +#define DLR_LNEN_LN7_Msk (0x80UL) /*!< DLR LNEN: LN7 (Bitfield-Mask: 0x01) */ + + +/* ================================================================================ */ +/* ================ Group 'ERU' Position & Mask ================ */ +/* ================================================================================ */ + + +/* --------------------------------- ERU_EXISEL --------------------------------- */ +#define ERU_EXISEL_EXS0A_Pos (0UL) /*!< ERU EXISEL: EXS0A (Bit 0) */ +#define ERU_EXISEL_EXS0A_Msk (0x3UL) /*!< ERU EXISEL: EXS0A (Bitfield-Mask: 0x03) */ +#define ERU_EXISEL_EXS0B_Pos (2UL) /*!< ERU EXISEL: EXS0B (Bit 2) */ +#define ERU_EXISEL_EXS0B_Msk (0xcUL) /*!< ERU EXISEL: EXS0B (Bitfield-Mask: 0x03) */ +#define ERU_EXISEL_EXS1A_Pos (4UL) /*!< ERU EXISEL: EXS1A (Bit 4) */ +#define ERU_EXISEL_EXS1A_Msk (0x30UL) /*!< ERU EXISEL: EXS1A (Bitfield-Mask: 0x03) */ +#define ERU_EXISEL_EXS1B_Pos (6UL) /*!< ERU EXISEL: EXS1B (Bit 6) */ +#define ERU_EXISEL_EXS1B_Msk (0xc0UL) /*!< ERU EXISEL: EXS1B (Bitfield-Mask: 0x03) */ +#define ERU_EXISEL_EXS2A_Pos (8UL) /*!< ERU EXISEL: EXS2A (Bit 8) */ +#define ERU_EXISEL_EXS2A_Msk (0x300UL) /*!< ERU EXISEL: EXS2A (Bitfield-Mask: 0x03) */ +#define ERU_EXISEL_EXS2B_Pos (10UL) /*!< ERU EXISEL: EXS2B (Bit 10) */ +#define ERU_EXISEL_EXS2B_Msk (0xc00UL) /*!< ERU EXISEL: EXS2B (Bitfield-Mask: 0x03) */ +#define ERU_EXISEL_EXS3A_Pos (12UL) /*!< ERU EXISEL: EXS3A (Bit 12) */ +#define ERU_EXISEL_EXS3A_Msk (0x3000UL) /*!< ERU EXISEL: EXS3A (Bitfield-Mask: 0x03) */ +#define ERU_EXISEL_EXS3B_Pos (14UL) /*!< ERU EXISEL: EXS3B (Bit 14) */ +#define ERU_EXISEL_EXS3B_Msk (0xc000UL) /*!< ERU EXISEL: EXS3B (Bitfield-Mask: 0x03) */ + +/* --------------------------------- ERU_EXICON --------------------------------- */ +#define ERU_EXICON_PE_Pos (0UL) /*!< ERU EXICON: PE (Bit 0) */ +#define ERU_EXICON_PE_Msk (0x1UL) /*!< ERU EXICON: PE (Bitfield-Mask: 0x01) */ +#define ERU_EXICON_LD_Pos (1UL) /*!< ERU EXICON: LD (Bit 1) */ +#define ERU_EXICON_LD_Msk (0x2UL) /*!< ERU EXICON: LD (Bitfield-Mask: 0x01) */ +#define ERU_EXICON_RE_Pos (2UL) /*!< ERU EXICON: RE (Bit 2) */ +#define ERU_EXICON_RE_Msk (0x4UL) /*!< ERU EXICON: RE (Bitfield-Mask: 0x01) */ +#define ERU_EXICON_FE_Pos (3UL) /*!< ERU EXICON: FE (Bit 3) */ +#define ERU_EXICON_FE_Msk (0x8UL) /*!< ERU EXICON: FE (Bitfield-Mask: 0x01) */ +#define ERU_EXICON_OCS_Pos (4UL) /*!< ERU EXICON: OCS (Bit 4) */ +#define ERU_EXICON_OCS_Msk (0x70UL) /*!< ERU EXICON: OCS (Bitfield-Mask: 0x07) */ +#define ERU_EXICON_FL_Pos (7UL) /*!< ERU EXICON: FL (Bit 7) */ +#define ERU_EXICON_FL_Msk (0x80UL) /*!< ERU EXICON: FL (Bitfield-Mask: 0x01) */ +#define ERU_EXICON_SS_Pos (8UL) /*!< ERU EXICON: SS (Bit 8) */ +#define ERU_EXICON_SS_Msk (0x300UL) /*!< ERU EXICON: SS (Bitfield-Mask: 0x03) */ +#define ERU_EXICON_NA_Pos (10UL) /*!< ERU EXICON: NA (Bit 10) */ +#define ERU_EXICON_NA_Msk (0x400UL) /*!< ERU EXICON: NA (Bitfield-Mask: 0x01) */ +#define ERU_EXICON_NB_Pos (11UL) /*!< ERU EXICON: NB (Bit 11) */ +#define ERU_EXICON_NB_Msk (0x800UL) /*!< ERU EXICON: NB (Bitfield-Mask: 0x01) */ + +/* --------------------------------- ERU_EXOCON --------------------------------- */ +#define ERU_EXOCON_ISS_Pos (0UL) /*!< ERU EXOCON: ISS (Bit 0) */ +#define ERU_EXOCON_ISS_Msk (0x3UL) /*!< ERU EXOCON: ISS (Bitfield-Mask: 0x03) */ +#define ERU_EXOCON_GEEN_Pos (2UL) /*!< ERU EXOCON: GEEN (Bit 2) */ +#define ERU_EXOCON_GEEN_Msk (0x4UL) /*!< ERU EXOCON: GEEN (Bitfield-Mask: 0x01) */ +#define ERU_EXOCON_PDR_Pos (3UL) /*!< ERU EXOCON: PDR (Bit 3) */ +#define ERU_EXOCON_PDR_Msk (0x8UL) /*!< ERU EXOCON: PDR (Bitfield-Mask: 0x01) */ +#define ERU_EXOCON_GP_Pos (4UL) /*!< ERU EXOCON: GP (Bit 4) */ +#define ERU_EXOCON_GP_Msk (0x30UL) /*!< ERU EXOCON: GP (Bitfield-Mask: 0x03) */ +#define ERU_EXOCON_IPEN0_Pos (12UL) /*!< ERU EXOCON: IPEN0 (Bit 12) */ +#define ERU_EXOCON_IPEN0_Msk (0x1000UL) /*!< ERU EXOCON: IPEN0 (Bitfield-Mask: 0x01) */ +#define ERU_EXOCON_IPEN1_Pos (13UL) /*!< ERU EXOCON: IPEN1 (Bit 13) */ +#define ERU_EXOCON_IPEN1_Msk (0x2000UL) /*!< ERU EXOCON: IPEN1 (Bitfield-Mask: 0x01) */ +#define ERU_EXOCON_IPEN2_Pos (14UL) /*!< ERU EXOCON: IPEN2 (Bit 14) */ +#define ERU_EXOCON_IPEN2_Msk (0x4000UL) /*!< ERU EXOCON: IPEN2 (Bitfield-Mask: 0x01) */ +#define ERU_EXOCON_IPEN3_Pos (15UL) /*!< ERU EXOCON: IPEN3 (Bit 15) */ +#define ERU_EXOCON_IPEN3_Msk (0x8000UL) /*!< ERU EXOCON: IPEN3 (Bitfield-Mask: 0x01) */ + + +/* ================================================================================ */ +/* ================ struct 'GPDMA0' Position & Mask ================ */ +/* ================================================================================ */ + + +/* -------------------------------- GPDMA0_RAWTFR ------------------------------- */ +#define GPDMA0_RAWTFR_CH0_Pos (0UL) /*!< GPDMA0 RAWTFR: CH0 (Bit 0) */ +#define GPDMA0_RAWTFR_CH0_Msk (0x1UL) /*!< GPDMA0 RAWTFR: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_RAWTFR_CH1_Pos (1UL) /*!< GPDMA0 RAWTFR: CH1 (Bit 1) */ +#define GPDMA0_RAWTFR_CH1_Msk (0x2UL) /*!< GPDMA0 RAWTFR: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_RAWTFR_CH2_Pos (2UL) /*!< GPDMA0 RAWTFR: CH2 (Bit 2) */ +#define GPDMA0_RAWTFR_CH2_Msk (0x4UL) /*!< GPDMA0 RAWTFR: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_RAWTFR_CH3_Pos (3UL) /*!< GPDMA0 RAWTFR: CH3 (Bit 3) */ +#define GPDMA0_RAWTFR_CH3_Msk (0x8UL) /*!< GPDMA0 RAWTFR: CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_RAWTFR_CH4_Pos (4UL) /*!< GPDMA0 RAWTFR: CH4 (Bit 4) */ +#define GPDMA0_RAWTFR_CH4_Msk (0x10UL) /*!< GPDMA0 RAWTFR: CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_RAWTFR_CH5_Pos (5UL) /*!< GPDMA0 RAWTFR: CH5 (Bit 5) */ +#define GPDMA0_RAWTFR_CH5_Msk (0x20UL) /*!< GPDMA0 RAWTFR: CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_RAWTFR_CH6_Pos (6UL) /*!< GPDMA0 RAWTFR: CH6 (Bit 6) */ +#define GPDMA0_RAWTFR_CH6_Msk (0x40UL) /*!< GPDMA0 RAWTFR: CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_RAWTFR_CH7_Pos (7UL) /*!< GPDMA0 RAWTFR: CH7 (Bit 7) */ +#define GPDMA0_RAWTFR_CH7_Msk (0x80UL) /*!< GPDMA0 RAWTFR: CH7 (Bitfield-Mask: 0x01) */ + +/* ------------------------------- GPDMA0_RAWBLOCK ------------------------------ */ +#define GPDMA0_RAWBLOCK_CH0_Pos (0UL) /*!< GPDMA0 RAWBLOCK: CH0 (Bit 0) */ +#define GPDMA0_RAWBLOCK_CH0_Msk (0x1UL) /*!< GPDMA0 RAWBLOCK: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_RAWBLOCK_CH1_Pos (1UL) /*!< GPDMA0 RAWBLOCK: CH1 (Bit 1) */ +#define GPDMA0_RAWBLOCK_CH1_Msk (0x2UL) /*!< GPDMA0 RAWBLOCK: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_RAWBLOCK_CH2_Pos (2UL) /*!< GPDMA0 RAWBLOCK: CH2 (Bit 2) */ +#define GPDMA0_RAWBLOCK_CH2_Msk (0x4UL) /*!< GPDMA0 RAWBLOCK: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_RAWBLOCK_CH3_Pos (3UL) /*!< GPDMA0 RAWBLOCK: CH3 (Bit 3) */ +#define GPDMA0_RAWBLOCK_CH3_Msk (0x8UL) /*!< GPDMA0 RAWBLOCK: CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_RAWBLOCK_CH4_Pos (4UL) /*!< GPDMA0 RAWBLOCK: CH4 (Bit 4) */ +#define GPDMA0_RAWBLOCK_CH4_Msk (0x10UL) /*!< GPDMA0 RAWBLOCK: CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_RAWBLOCK_CH5_Pos (5UL) /*!< GPDMA0 RAWBLOCK: CH5 (Bit 5) */ +#define GPDMA0_RAWBLOCK_CH5_Msk (0x20UL) /*!< GPDMA0 RAWBLOCK: CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_RAWBLOCK_CH6_Pos (6UL) /*!< GPDMA0 RAWBLOCK: CH6 (Bit 6) */ +#define GPDMA0_RAWBLOCK_CH6_Msk (0x40UL) /*!< GPDMA0 RAWBLOCK: CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_RAWBLOCK_CH7_Pos (7UL) /*!< GPDMA0 RAWBLOCK: CH7 (Bit 7) */ +#define GPDMA0_RAWBLOCK_CH7_Msk (0x80UL) /*!< GPDMA0 RAWBLOCK: CH7 (Bitfield-Mask: 0x01) */ + +/* ------------------------------ GPDMA0_RAWSRCTRAN ----------------------------- */ +#define GPDMA0_RAWSRCTRAN_CH0_Pos (0UL) /*!< GPDMA0 RAWSRCTRAN: CH0 (Bit 0) */ +#define GPDMA0_RAWSRCTRAN_CH0_Msk (0x1UL) /*!< GPDMA0 RAWSRCTRAN: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_RAWSRCTRAN_CH1_Pos (1UL) /*!< GPDMA0 RAWSRCTRAN: CH1 (Bit 1) */ +#define GPDMA0_RAWSRCTRAN_CH1_Msk (0x2UL) /*!< GPDMA0 RAWSRCTRAN: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_RAWSRCTRAN_CH2_Pos (2UL) /*!< GPDMA0 RAWSRCTRAN: CH2 (Bit 2) */ +#define GPDMA0_RAWSRCTRAN_CH2_Msk (0x4UL) /*!< GPDMA0 RAWSRCTRAN: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_RAWSRCTRAN_CH3_Pos (3UL) /*!< GPDMA0 RAWSRCTRAN: CH3 (Bit 3) */ +#define GPDMA0_RAWSRCTRAN_CH3_Msk (0x8UL) /*!< GPDMA0 RAWSRCTRAN: CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_RAWSRCTRAN_CH4_Pos (4UL) /*!< GPDMA0 RAWSRCTRAN: CH4 (Bit 4) */ +#define GPDMA0_RAWSRCTRAN_CH4_Msk (0x10UL) /*!< GPDMA0 RAWSRCTRAN: CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_RAWSRCTRAN_CH5_Pos (5UL) /*!< GPDMA0 RAWSRCTRAN: CH5 (Bit 5) */ +#define GPDMA0_RAWSRCTRAN_CH5_Msk (0x20UL) /*!< GPDMA0 RAWSRCTRAN: CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_RAWSRCTRAN_CH6_Pos (6UL) /*!< GPDMA0 RAWSRCTRAN: CH6 (Bit 6) */ +#define GPDMA0_RAWSRCTRAN_CH6_Msk (0x40UL) /*!< GPDMA0 RAWSRCTRAN: CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_RAWSRCTRAN_CH7_Pos (7UL) /*!< GPDMA0 RAWSRCTRAN: CH7 (Bit 7) */ +#define GPDMA0_RAWSRCTRAN_CH7_Msk (0x80UL) /*!< GPDMA0 RAWSRCTRAN: CH7 (Bitfield-Mask: 0x01) */ + +/* ------------------------------ GPDMA0_RAWDSTTRAN ----------------------------- */ +#define GPDMA0_RAWDSTTRAN_CH0_Pos (0UL) /*!< GPDMA0 RAWDSTTRAN: CH0 (Bit 0) */ +#define GPDMA0_RAWDSTTRAN_CH0_Msk (0x1UL) /*!< GPDMA0 RAWDSTTRAN: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_RAWDSTTRAN_CH1_Pos (1UL) /*!< GPDMA0 RAWDSTTRAN: CH1 (Bit 1) */ +#define GPDMA0_RAWDSTTRAN_CH1_Msk (0x2UL) /*!< GPDMA0 RAWDSTTRAN: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_RAWDSTTRAN_CH2_Pos (2UL) /*!< GPDMA0 RAWDSTTRAN: CH2 (Bit 2) */ +#define GPDMA0_RAWDSTTRAN_CH2_Msk (0x4UL) /*!< GPDMA0 RAWDSTTRAN: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_RAWDSTTRAN_CH3_Pos (3UL) /*!< GPDMA0 RAWDSTTRAN: CH3 (Bit 3) */ +#define GPDMA0_RAWDSTTRAN_CH3_Msk (0x8UL) /*!< GPDMA0 RAWDSTTRAN: CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_RAWDSTTRAN_CH4_Pos (4UL) /*!< GPDMA0 RAWDSTTRAN: CH4 (Bit 4) */ +#define GPDMA0_RAWDSTTRAN_CH4_Msk (0x10UL) /*!< GPDMA0 RAWDSTTRAN: CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_RAWDSTTRAN_CH5_Pos (5UL) /*!< GPDMA0 RAWDSTTRAN: CH5 (Bit 5) */ +#define GPDMA0_RAWDSTTRAN_CH5_Msk (0x20UL) /*!< GPDMA0 RAWDSTTRAN: CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_RAWDSTTRAN_CH6_Pos (6UL) /*!< GPDMA0 RAWDSTTRAN: CH6 (Bit 6) */ +#define GPDMA0_RAWDSTTRAN_CH6_Msk (0x40UL) /*!< GPDMA0 RAWDSTTRAN: CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_RAWDSTTRAN_CH7_Pos (7UL) /*!< GPDMA0 RAWDSTTRAN: CH7 (Bit 7) */ +#define GPDMA0_RAWDSTTRAN_CH7_Msk (0x80UL) /*!< GPDMA0 RAWDSTTRAN: CH7 (Bitfield-Mask: 0x01) */ + +/* -------------------------------- GPDMA0_RAWERR ------------------------------- */ +#define GPDMA0_RAWERR_CH0_Pos (0UL) /*!< GPDMA0 RAWERR: CH0 (Bit 0) */ +#define GPDMA0_RAWERR_CH0_Msk (0x1UL) /*!< GPDMA0 RAWERR: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_RAWERR_CH1_Pos (1UL) /*!< GPDMA0 RAWERR: CH1 (Bit 1) */ +#define GPDMA0_RAWERR_CH1_Msk (0x2UL) /*!< GPDMA0 RAWERR: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_RAWERR_CH2_Pos (2UL) /*!< GPDMA0 RAWERR: CH2 (Bit 2) */ +#define GPDMA0_RAWERR_CH2_Msk (0x4UL) /*!< GPDMA0 RAWERR: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_RAWERR_CH3_Pos (3UL) /*!< GPDMA0 RAWERR: CH3 (Bit 3) */ +#define GPDMA0_RAWERR_CH3_Msk (0x8UL) /*!< GPDMA0 RAWERR: CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_RAWERR_CH4_Pos (4UL) /*!< GPDMA0 RAWERR: CH4 (Bit 4) */ +#define GPDMA0_RAWERR_CH4_Msk (0x10UL) /*!< GPDMA0 RAWERR: CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_RAWERR_CH5_Pos (5UL) /*!< GPDMA0 RAWERR: CH5 (Bit 5) */ +#define GPDMA0_RAWERR_CH5_Msk (0x20UL) /*!< GPDMA0 RAWERR: CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_RAWERR_CH6_Pos (6UL) /*!< GPDMA0 RAWERR: CH6 (Bit 6) */ +#define GPDMA0_RAWERR_CH6_Msk (0x40UL) /*!< GPDMA0 RAWERR: CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_RAWERR_CH7_Pos (7UL) /*!< GPDMA0 RAWERR: CH7 (Bit 7) */ +#define GPDMA0_RAWERR_CH7_Msk (0x80UL) /*!< GPDMA0 RAWERR: CH7 (Bitfield-Mask: 0x01) */ + +/* ------------------------------ GPDMA0_STATUSTFR ------------------------------ */ +#define GPDMA0_STATUSTFR_CH0_Pos (0UL) /*!< GPDMA0 STATUSTFR: CH0 (Bit 0) */ +#define GPDMA0_STATUSTFR_CH0_Msk (0x1UL) /*!< GPDMA0 STATUSTFR: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSTFR_CH1_Pos (1UL) /*!< GPDMA0 STATUSTFR: CH1 (Bit 1) */ +#define GPDMA0_STATUSTFR_CH1_Msk (0x2UL) /*!< GPDMA0 STATUSTFR: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSTFR_CH2_Pos (2UL) /*!< GPDMA0 STATUSTFR: CH2 (Bit 2) */ +#define GPDMA0_STATUSTFR_CH2_Msk (0x4UL) /*!< GPDMA0 STATUSTFR: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSTFR_CH3_Pos (3UL) /*!< GPDMA0 STATUSTFR: CH3 (Bit 3) */ +#define GPDMA0_STATUSTFR_CH3_Msk (0x8UL) /*!< GPDMA0 STATUSTFR: CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSTFR_CH4_Pos (4UL) /*!< GPDMA0 STATUSTFR: CH4 (Bit 4) */ +#define GPDMA0_STATUSTFR_CH4_Msk (0x10UL) /*!< GPDMA0 STATUSTFR: CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSTFR_CH5_Pos (5UL) /*!< GPDMA0 STATUSTFR: CH5 (Bit 5) */ +#define GPDMA0_STATUSTFR_CH5_Msk (0x20UL) /*!< GPDMA0 STATUSTFR: CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSTFR_CH6_Pos (6UL) /*!< GPDMA0 STATUSTFR: CH6 (Bit 6) */ +#define GPDMA0_STATUSTFR_CH6_Msk (0x40UL) /*!< GPDMA0 STATUSTFR: CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSTFR_CH7_Pos (7UL) /*!< GPDMA0 STATUSTFR: CH7 (Bit 7) */ +#define GPDMA0_STATUSTFR_CH7_Msk (0x80UL) /*!< GPDMA0 STATUSTFR: CH7 (Bitfield-Mask: 0x01) */ + +/* ----------------------------- GPDMA0_STATUSBLOCK ----------------------------- */ +#define GPDMA0_STATUSBLOCK_CH0_Pos (0UL) /*!< GPDMA0 STATUSBLOCK: CH0 (Bit 0) */ +#define GPDMA0_STATUSBLOCK_CH0_Msk (0x1UL) /*!< GPDMA0 STATUSBLOCK: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSBLOCK_CH1_Pos (1UL) /*!< GPDMA0 STATUSBLOCK: CH1 (Bit 1) */ +#define GPDMA0_STATUSBLOCK_CH1_Msk (0x2UL) /*!< GPDMA0 STATUSBLOCK: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSBLOCK_CH2_Pos (2UL) /*!< GPDMA0 STATUSBLOCK: CH2 (Bit 2) */ +#define GPDMA0_STATUSBLOCK_CH2_Msk (0x4UL) /*!< GPDMA0 STATUSBLOCK: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSBLOCK_CH3_Pos (3UL) /*!< GPDMA0 STATUSBLOCK: CH3 (Bit 3) */ +#define GPDMA0_STATUSBLOCK_CH3_Msk (0x8UL) /*!< GPDMA0 STATUSBLOCK: CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSBLOCK_CH4_Pos (4UL) /*!< GPDMA0 STATUSBLOCK: CH4 (Bit 4) */ +#define GPDMA0_STATUSBLOCK_CH4_Msk (0x10UL) /*!< GPDMA0 STATUSBLOCK: CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSBLOCK_CH5_Pos (5UL) /*!< GPDMA0 STATUSBLOCK: CH5 (Bit 5) */ +#define GPDMA0_STATUSBLOCK_CH5_Msk (0x20UL) /*!< GPDMA0 STATUSBLOCK: CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSBLOCK_CH6_Pos (6UL) /*!< GPDMA0 STATUSBLOCK: CH6 (Bit 6) */ +#define GPDMA0_STATUSBLOCK_CH6_Msk (0x40UL) /*!< GPDMA0 STATUSBLOCK: CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSBLOCK_CH7_Pos (7UL) /*!< GPDMA0 STATUSBLOCK: CH7 (Bit 7) */ +#define GPDMA0_STATUSBLOCK_CH7_Msk (0x80UL) /*!< GPDMA0 STATUSBLOCK: CH7 (Bitfield-Mask: 0x01) */ + +/* ---------------------------- GPDMA0_STATUSSRCTRAN ---------------------------- */ +#define GPDMA0_STATUSSRCTRAN_CH0_Pos (0UL) /*!< GPDMA0 STATUSSRCTRAN: CH0 (Bit 0) */ +#define GPDMA0_STATUSSRCTRAN_CH0_Msk (0x1UL) /*!< GPDMA0 STATUSSRCTRAN: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSSRCTRAN_CH1_Pos (1UL) /*!< GPDMA0 STATUSSRCTRAN: CH1 (Bit 1) */ +#define GPDMA0_STATUSSRCTRAN_CH1_Msk (0x2UL) /*!< GPDMA0 STATUSSRCTRAN: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSSRCTRAN_CH2_Pos (2UL) /*!< GPDMA0 STATUSSRCTRAN: CH2 (Bit 2) */ +#define GPDMA0_STATUSSRCTRAN_CH2_Msk (0x4UL) /*!< GPDMA0 STATUSSRCTRAN: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSSRCTRAN_CH3_Pos (3UL) /*!< GPDMA0 STATUSSRCTRAN: CH3 (Bit 3) */ +#define GPDMA0_STATUSSRCTRAN_CH3_Msk (0x8UL) /*!< GPDMA0 STATUSSRCTRAN: CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSSRCTRAN_CH4_Pos (4UL) /*!< GPDMA0 STATUSSRCTRAN: CH4 (Bit 4) */ +#define GPDMA0_STATUSSRCTRAN_CH4_Msk (0x10UL) /*!< GPDMA0 STATUSSRCTRAN: CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSSRCTRAN_CH5_Pos (5UL) /*!< GPDMA0 STATUSSRCTRAN: CH5 (Bit 5) */ +#define GPDMA0_STATUSSRCTRAN_CH5_Msk (0x20UL) /*!< GPDMA0 STATUSSRCTRAN: CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSSRCTRAN_CH6_Pos (6UL) /*!< GPDMA0 STATUSSRCTRAN: CH6 (Bit 6) */ +#define GPDMA0_STATUSSRCTRAN_CH6_Msk (0x40UL) /*!< GPDMA0 STATUSSRCTRAN: CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSSRCTRAN_CH7_Pos (7UL) /*!< GPDMA0 STATUSSRCTRAN: CH7 (Bit 7) */ +#define GPDMA0_STATUSSRCTRAN_CH7_Msk (0x80UL) /*!< GPDMA0 STATUSSRCTRAN: CH7 (Bitfield-Mask: 0x01) */ + +/* ---------------------------- GPDMA0_STATUSDSTTRAN ---------------------------- */ +#define GPDMA0_STATUSDSTTRAN_CH0_Pos (0UL) /*!< GPDMA0 STATUSDSTTRAN: CH0 (Bit 0) */ +#define GPDMA0_STATUSDSTTRAN_CH0_Msk (0x1UL) /*!< GPDMA0 STATUSDSTTRAN: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSDSTTRAN_CH1_Pos (1UL) /*!< GPDMA0 STATUSDSTTRAN: CH1 (Bit 1) */ +#define GPDMA0_STATUSDSTTRAN_CH1_Msk (0x2UL) /*!< GPDMA0 STATUSDSTTRAN: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSDSTTRAN_CH2_Pos (2UL) /*!< GPDMA0 STATUSDSTTRAN: CH2 (Bit 2) */ +#define GPDMA0_STATUSDSTTRAN_CH2_Msk (0x4UL) /*!< GPDMA0 STATUSDSTTRAN: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSDSTTRAN_CH3_Pos (3UL) /*!< GPDMA0 STATUSDSTTRAN: CH3 (Bit 3) */ +#define GPDMA0_STATUSDSTTRAN_CH3_Msk (0x8UL) /*!< GPDMA0 STATUSDSTTRAN: CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSDSTTRAN_CH4_Pos (4UL) /*!< GPDMA0 STATUSDSTTRAN: CH4 (Bit 4) */ +#define GPDMA0_STATUSDSTTRAN_CH4_Msk (0x10UL) /*!< GPDMA0 STATUSDSTTRAN: CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSDSTTRAN_CH5_Pos (5UL) /*!< GPDMA0 STATUSDSTTRAN: CH5 (Bit 5) */ +#define GPDMA0_STATUSDSTTRAN_CH5_Msk (0x20UL) /*!< GPDMA0 STATUSDSTTRAN: CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSDSTTRAN_CH6_Pos (6UL) /*!< GPDMA0 STATUSDSTTRAN: CH6 (Bit 6) */ +#define GPDMA0_STATUSDSTTRAN_CH6_Msk (0x40UL) /*!< GPDMA0 STATUSDSTTRAN: CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSDSTTRAN_CH7_Pos (7UL) /*!< GPDMA0 STATUSDSTTRAN: CH7 (Bit 7) */ +#define GPDMA0_STATUSDSTTRAN_CH7_Msk (0x80UL) /*!< GPDMA0 STATUSDSTTRAN: CH7 (Bitfield-Mask: 0x01) */ + +/* ------------------------------ GPDMA0_STATUSERR ------------------------------ */ +#define GPDMA0_STATUSERR_CH0_Pos (0UL) /*!< GPDMA0 STATUSERR: CH0 (Bit 0) */ +#define GPDMA0_STATUSERR_CH0_Msk (0x1UL) /*!< GPDMA0 STATUSERR: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSERR_CH1_Pos (1UL) /*!< GPDMA0 STATUSERR: CH1 (Bit 1) */ +#define GPDMA0_STATUSERR_CH1_Msk (0x2UL) /*!< GPDMA0 STATUSERR: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSERR_CH2_Pos (2UL) /*!< GPDMA0 STATUSERR: CH2 (Bit 2) */ +#define GPDMA0_STATUSERR_CH2_Msk (0x4UL) /*!< GPDMA0 STATUSERR: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSERR_CH3_Pos (3UL) /*!< GPDMA0 STATUSERR: CH3 (Bit 3) */ +#define GPDMA0_STATUSERR_CH3_Msk (0x8UL) /*!< GPDMA0 STATUSERR: CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSERR_CH4_Pos (4UL) /*!< GPDMA0 STATUSERR: CH4 (Bit 4) */ +#define GPDMA0_STATUSERR_CH4_Msk (0x10UL) /*!< GPDMA0 STATUSERR: CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSERR_CH5_Pos (5UL) /*!< GPDMA0 STATUSERR: CH5 (Bit 5) */ +#define GPDMA0_STATUSERR_CH5_Msk (0x20UL) /*!< GPDMA0 STATUSERR: CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSERR_CH6_Pos (6UL) /*!< GPDMA0 STATUSERR: CH6 (Bit 6) */ +#define GPDMA0_STATUSERR_CH6_Msk (0x40UL) /*!< GPDMA0 STATUSERR: CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSERR_CH7_Pos (7UL) /*!< GPDMA0 STATUSERR: CH7 (Bit 7) */ +#define GPDMA0_STATUSERR_CH7_Msk (0x80UL) /*!< GPDMA0 STATUSERR: CH7 (Bitfield-Mask: 0x01) */ + +/* ------------------------------- GPDMA0_MASKTFR ------------------------------- */ +#define GPDMA0_MASKTFR_CH0_Pos (0UL) /*!< GPDMA0 MASKTFR: CH0 (Bit 0) */ +#define GPDMA0_MASKTFR_CH0_Msk (0x1UL) /*!< GPDMA0 MASKTFR: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKTFR_CH1_Pos (1UL) /*!< GPDMA0 MASKTFR: CH1 (Bit 1) */ +#define GPDMA0_MASKTFR_CH1_Msk (0x2UL) /*!< GPDMA0 MASKTFR: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKTFR_CH2_Pos (2UL) /*!< GPDMA0 MASKTFR: CH2 (Bit 2) */ +#define GPDMA0_MASKTFR_CH2_Msk (0x4UL) /*!< GPDMA0 MASKTFR: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKTFR_CH3_Pos (3UL) /*!< GPDMA0 MASKTFR: CH3 (Bit 3) */ +#define GPDMA0_MASKTFR_CH3_Msk (0x8UL) /*!< GPDMA0 MASKTFR: CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKTFR_CH4_Pos (4UL) /*!< GPDMA0 MASKTFR: CH4 (Bit 4) */ +#define GPDMA0_MASKTFR_CH4_Msk (0x10UL) /*!< GPDMA0 MASKTFR: CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKTFR_CH5_Pos (5UL) /*!< GPDMA0 MASKTFR: CH5 (Bit 5) */ +#define GPDMA0_MASKTFR_CH5_Msk (0x20UL) /*!< GPDMA0 MASKTFR: CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKTFR_CH6_Pos (6UL) /*!< GPDMA0 MASKTFR: CH6 (Bit 6) */ +#define GPDMA0_MASKTFR_CH6_Msk (0x40UL) /*!< GPDMA0 MASKTFR: CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKTFR_CH7_Pos (7UL) /*!< GPDMA0 MASKTFR: CH7 (Bit 7) */ +#define GPDMA0_MASKTFR_CH7_Msk (0x80UL) /*!< GPDMA0 MASKTFR: CH7 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKTFR_WE_CH0_Pos (8UL) /*!< GPDMA0 MASKTFR: WE_CH0 (Bit 8) */ +#define GPDMA0_MASKTFR_WE_CH0_Msk (0x100UL) /*!< GPDMA0 MASKTFR: WE_CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKTFR_WE_CH1_Pos (9UL) /*!< GPDMA0 MASKTFR: WE_CH1 (Bit 9) */ +#define GPDMA0_MASKTFR_WE_CH1_Msk (0x200UL) /*!< GPDMA0 MASKTFR: WE_CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKTFR_WE_CH2_Pos (10UL) /*!< GPDMA0 MASKTFR: WE_CH2 (Bit 10) */ +#define GPDMA0_MASKTFR_WE_CH2_Msk (0x400UL) /*!< GPDMA0 MASKTFR: WE_CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKTFR_WE_CH3_Pos (11UL) /*!< GPDMA0 MASKTFR: WE_CH3 (Bit 11) */ +#define GPDMA0_MASKTFR_WE_CH3_Msk (0x800UL) /*!< GPDMA0 MASKTFR: WE_CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKTFR_WE_CH4_Pos (12UL) /*!< GPDMA0 MASKTFR: WE_CH4 (Bit 12) */ +#define GPDMA0_MASKTFR_WE_CH4_Msk (0x1000UL) /*!< GPDMA0 MASKTFR: WE_CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKTFR_WE_CH5_Pos (13UL) /*!< GPDMA0 MASKTFR: WE_CH5 (Bit 13) */ +#define GPDMA0_MASKTFR_WE_CH5_Msk (0x2000UL) /*!< GPDMA0 MASKTFR: WE_CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKTFR_WE_CH6_Pos (14UL) /*!< GPDMA0 MASKTFR: WE_CH6 (Bit 14) */ +#define GPDMA0_MASKTFR_WE_CH6_Msk (0x4000UL) /*!< GPDMA0 MASKTFR: WE_CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKTFR_WE_CH7_Pos (15UL) /*!< GPDMA0 MASKTFR: WE_CH7 (Bit 15) */ +#define GPDMA0_MASKTFR_WE_CH7_Msk (0x8000UL) /*!< GPDMA0 MASKTFR: WE_CH7 (Bitfield-Mask: 0x01) */ + +/* ------------------------------ GPDMA0_MASKBLOCK ------------------------------ */ +#define GPDMA0_MASKBLOCK_CH0_Pos (0UL) /*!< GPDMA0 MASKBLOCK: CH0 (Bit 0) */ +#define GPDMA0_MASKBLOCK_CH0_Msk (0x1UL) /*!< GPDMA0 MASKBLOCK: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKBLOCK_CH1_Pos (1UL) /*!< GPDMA0 MASKBLOCK: CH1 (Bit 1) */ +#define GPDMA0_MASKBLOCK_CH1_Msk (0x2UL) /*!< GPDMA0 MASKBLOCK: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKBLOCK_CH2_Pos (2UL) /*!< GPDMA0 MASKBLOCK: CH2 (Bit 2) */ +#define GPDMA0_MASKBLOCK_CH2_Msk (0x4UL) /*!< GPDMA0 MASKBLOCK: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKBLOCK_CH3_Pos (3UL) /*!< GPDMA0 MASKBLOCK: CH3 (Bit 3) */ +#define GPDMA0_MASKBLOCK_CH3_Msk (0x8UL) /*!< GPDMA0 MASKBLOCK: CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKBLOCK_CH4_Pos (4UL) /*!< GPDMA0 MASKBLOCK: CH4 (Bit 4) */ +#define GPDMA0_MASKBLOCK_CH4_Msk (0x10UL) /*!< GPDMA0 MASKBLOCK: CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKBLOCK_CH5_Pos (5UL) /*!< GPDMA0 MASKBLOCK: CH5 (Bit 5) */ +#define GPDMA0_MASKBLOCK_CH5_Msk (0x20UL) /*!< GPDMA0 MASKBLOCK: CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKBLOCK_CH6_Pos (6UL) /*!< GPDMA0 MASKBLOCK: CH6 (Bit 6) */ +#define GPDMA0_MASKBLOCK_CH6_Msk (0x40UL) /*!< GPDMA0 MASKBLOCK: CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKBLOCK_CH7_Pos (7UL) /*!< GPDMA0 MASKBLOCK: CH7 (Bit 7) */ +#define GPDMA0_MASKBLOCK_CH7_Msk (0x80UL) /*!< GPDMA0 MASKBLOCK: CH7 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKBLOCK_WE_CH0_Pos (8UL) /*!< GPDMA0 MASKBLOCK: WE_CH0 (Bit 8) */ +#define GPDMA0_MASKBLOCK_WE_CH0_Msk (0x100UL) /*!< GPDMA0 MASKBLOCK: WE_CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKBLOCK_WE_CH1_Pos (9UL) /*!< GPDMA0 MASKBLOCK: WE_CH1 (Bit 9) */ +#define GPDMA0_MASKBLOCK_WE_CH1_Msk (0x200UL) /*!< GPDMA0 MASKBLOCK: WE_CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKBLOCK_WE_CH2_Pos (10UL) /*!< GPDMA0 MASKBLOCK: WE_CH2 (Bit 10) */ +#define GPDMA0_MASKBLOCK_WE_CH2_Msk (0x400UL) /*!< GPDMA0 MASKBLOCK: WE_CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKBLOCK_WE_CH3_Pos (11UL) /*!< GPDMA0 MASKBLOCK: WE_CH3 (Bit 11) */ +#define GPDMA0_MASKBLOCK_WE_CH3_Msk (0x800UL) /*!< GPDMA0 MASKBLOCK: WE_CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKBLOCK_WE_CH4_Pos (12UL) /*!< GPDMA0 MASKBLOCK: WE_CH4 (Bit 12) */ +#define GPDMA0_MASKBLOCK_WE_CH4_Msk (0x1000UL) /*!< GPDMA0 MASKBLOCK: WE_CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKBLOCK_WE_CH5_Pos (13UL) /*!< GPDMA0 MASKBLOCK: WE_CH5 (Bit 13) */ +#define GPDMA0_MASKBLOCK_WE_CH5_Msk (0x2000UL) /*!< GPDMA0 MASKBLOCK: WE_CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKBLOCK_WE_CH6_Pos (14UL) /*!< GPDMA0 MASKBLOCK: WE_CH6 (Bit 14) */ +#define GPDMA0_MASKBLOCK_WE_CH6_Msk (0x4000UL) /*!< GPDMA0 MASKBLOCK: WE_CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKBLOCK_WE_CH7_Pos (15UL) /*!< GPDMA0 MASKBLOCK: WE_CH7 (Bit 15) */ +#define GPDMA0_MASKBLOCK_WE_CH7_Msk (0x8000UL) /*!< GPDMA0 MASKBLOCK: WE_CH7 (Bitfield-Mask: 0x01) */ + +/* ----------------------------- GPDMA0_MASKSRCTRAN ----------------------------- */ +#define GPDMA0_MASKSRCTRAN_CH0_Pos (0UL) /*!< GPDMA0 MASKSRCTRAN: CH0 (Bit 0) */ +#define GPDMA0_MASKSRCTRAN_CH0_Msk (0x1UL) /*!< GPDMA0 MASKSRCTRAN: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKSRCTRAN_CH1_Pos (1UL) /*!< GPDMA0 MASKSRCTRAN: CH1 (Bit 1) */ +#define GPDMA0_MASKSRCTRAN_CH1_Msk (0x2UL) /*!< GPDMA0 MASKSRCTRAN: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKSRCTRAN_CH2_Pos (2UL) /*!< GPDMA0 MASKSRCTRAN: CH2 (Bit 2) */ +#define GPDMA0_MASKSRCTRAN_CH2_Msk (0x4UL) /*!< GPDMA0 MASKSRCTRAN: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKSRCTRAN_CH3_Pos (3UL) /*!< GPDMA0 MASKSRCTRAN: CH3 (Bit 3) */ +#define GPDMA0_MASKSRCTRAN_CH3_Msk (0x8UL) /*!< GPDMA0 MASKSRCTRAN: CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKSRCTRAN_CH4_Pos (4UL) /*!< GPDMA0 MASKSRCTRAN: CH4 (Bit 4) */ +#define GPDMA0_MASKSRCTRAN_CH4_Msk (0x10UL) /*!< GPDMA0 MASKSRCTRAN: CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKSRCTRAN_CH5_Pos (5UL) /*!< GPDMA0 MASKSRCTRAN: CH5 (Bit 5) */ +#define GPDMA0_MASKSRCTRAN_CH5_Msk (0x20UL) /*!< GPDMA0 MASKSRCTRAN: CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKSRCTRAN_CH6_Pos (6UL) /*!< GPDMA0 MASKSRCTRAN: CH6 (Bit 6) */ +#define GPDMA0_MASKSRCTRAN_CH6_Msk (0x40UL) /*!< GPDMA0 MASKSRCTRAN: CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKSRCTRAN_CH7_Pos (7UL) /*!< GPDMA0 MASKSRCTRAN: CH7 (Bit 7) */ +#define GPDMA0_MASKSRCTRAN_CH7_Msk (0x80UL) /*!< GPDMA0 MASKSRCTRAN: CH7 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKSRCTRAN_WE_CH0_Pos (8UL) /*!< GPDMA0 MASKSRCTRAN: WE_CH0 (Bit 8) */ +#define GPDMA0_MASKSRCTRAN_WE_CH0_Msk (0x100UL) /*!< GPDMA0 MASKSRCTRAN: WE_CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKSRCTRAN_WE_CH1_Pos (9UL) /*!< GPDMA0 MASKSRCTRAN: WE_CH1 (Bit 9) */ +#define GPDMA0_MASKSRCTRAN_WE_CH1_Msk (0x200UL) /*!< GPDMA0 MASKSRCTRAN: WE_CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKSRCTRAN_WE_CH2_Pos (10UL) /*!< GPDMA0 MASKSRCTRAN: WE_CH2 (Bit 10) */ +#define GPDMA0_MASKSRCTRAN_WE_CH2_Msk (0x400UL) /*!< GPDMA0 MASKSRCTRAN: WE_CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKSRCTRAN_WE_CH3_Pos (11UL) /*!< GPDMA0 MASKSRCTRAN: WE_CH3 (Bit 11) */ +#define GPDMA0_MASKSRCTRAN_WE_CH3_Msk (0x800UL) /*!< GPDMA0 MASKSRCTRAN: WE_CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKSRCTRAN_WE_CH4_Pos (12UL) /*!< GPDMA0 MASKSRCTRAN: WE_CH4 (Bit 12) */ +#define GPDMA0_MASKSRCTRAN_WE_CH4_Msk (0x1000UL) /*!< GPDMA0 MASKSRCTRAN: WE_CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKSRCTRAN_WE_CH5_Pos (13UL) /*!< GPDMA0 MASKSRCTRAN: WE_CH5 (Bit 13) */ +#define GPDMA0_MASKSRCTRAN_WE_CH5_Msk (0x2000UL) /*!< GPDMA0 MASKSRCTRAN: WE_CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKSRCTRAN_WE_CH6_Pos (14UL) /*!< GPDMA0 MASKSRCTRAN: WE_CH6 (Bit 14) */ +#define GPDMA0_MASKSRCTRAN_WE_CH6_Msk (0x4000UL) /*!< GPDMA0 MASKSRCTRAN: WE_CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKSRCTRAN_WE_CH7_Pos (15UL) /*!< GPDMA0 MASKSRCTRAN: WE_CH7 (Bit 15) */ +#define GPDMA0_MASKSRCTRAN_WE_CH7_Msk (0x8000UL) /*!< GPDMA0 MASKSRCTRAN: WE_CH7 (Bitfield-Mask: 0x01) */ + +/* ----------------------------- GPDMA0_MASKDSTTRAN ----------------------------- */ +#define GPDMA0_MASKDSTTRAN_CH0_Pos (0UL) /*!< GPDMA0 MASKDSTTRAN: CH0 (Bit 0) */ +#define GPDMA0_MASKDSTTRAN_CH0_Msk (0x1UL) /*!< GPDMA0 MASKDSTTRAN: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKDSTTRAN_CH1_Pos (1UL) /*!< GPDMA0 MASKDSTTRAN: CH1 (Bit 1) */ +#define GPDMA0_MASKDSTTRAN_CH1_Msk (0x2UL) /*!< GPDMA0 MASKDSTTRAN: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKDSTTRAN_CH2_Pos (2UL) /*!< GPDMA0 MASKDSTTRAN: CH2 (Bit 2) */ +#define GPDMA0_MASKDSTTRAN_CH2_Msk (0x4UL) /*!< GPDMA0 MASKDSTTRAN: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKDSTTRAN_CH3_Pos (3UL) /*!< GPDMA0 MASKDSTTRAN: CH3 (Bit 3) */ +#define GPDMA0_MASKDSTTRAN_CH3_Msk (0x8UL) /*!< GPDMA0 MASKDSTTRAN: CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKDSTTRAN_CH4_Pos (4UL) /*!< GPDMA0 MASKDSTTRAN: CH4 (Bit 4) */ +#define GPDMA0_MASKDSTTRAN_CH4_Msk (0x10UL) /*!< GPDMA0 MASKDSTTRAN: CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKDSTTRAN_CH5_Pos (5UL) /*!< GPDMA0 MASKDSTTRAN: CH5 (Bit 5) */ +#define GPDMA0_MASKDSTTRAN_CH5_Msk (0x20UL) /*!< GPDMA0 MASKDSTTRAN: CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKDSTTRAN_CH6_Pos (6UL) /*!< GPDMA0 MASKDSTTRAN: CH6 (Bit 6) */ +#define GPDMA0_MASKDSTTRAN_CH6_Msk (0x40UL) /*!< GPDMA0 MASKDSTTRAN: CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKDSTTRAN_CH7_Pos (7UL) /*!< GPDMA0 MASKDSTTRAN: CH7 (Bit 7) */ +#define GPDMA0_MASKDSTTRAN_CH7_Msk (0x80UL) /*!< GPDMA0 MASKDSTTRAN: CH7 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKDSTTRAN_WE_CH0_Pos (8UL) /*!< GPDMA0 MASKDSTTRAN: WE_CH0 (Bit 8) */ +#define GPDMA0_MASKDSTTRAN_WE_CH0_Msk (0x100UL) /*!< GPDMA0 MASKDSTTRAN: WE_CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKDSTTRAN_WE_CH1_Pos (9UL) /*!< GPDMA0 MASKDSTTRAN: WE_CH1 (Bit 9) */ +#define GPDMA0_MASKDSTTRAN_WE_CH1_Msk (0x200UL) /*!< GPDMA0 MASKDSTTRAN: WE_CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKDSTTRAN_WE_CH2_Pos (10UL) /*!< GPDMA0 MASKDSTTRAN: WE_CH2 (Bit 10) */ +#define GPDMA0_MASKDSTTRAN_WE_CH2_Msk (0x400UL) /*!< GPDMA0 MASKDSTTRAN: WE_CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKDSTTRAN_WE_CH3_Pos (11UL) /*!< GPDMA0 MASKDSTTRAN: WE_CH3 (Bit 11) */ +#define GPDMA0_MASKDSTTRAN_WE_CH3_Msk (0x800UL) /*!< GPDMA0 MASKDSTTRAN: WE_CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKDSTTRAN_WE_CH4_Pos (12UL) /*!< GPDMA0 MASKDSTTRAN: WE_CH4 (Bit 12) */ +#define GPDMA0_MASKDSTTRAN_WE_CH4_Msk (0x1000UL) /*!< GPDMA0 MASKDSTTRAN: WE_CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKDSTTRAN_WE_CH5_Pos (13UL) /*!< GPDMA0 MASKDSTTRAN: WE_CH5 (Bit 13) */ +#define GPDMA0_MASKDSTTRAN_WE_CH5_Msk (0x2000UL) /*!< GPDMA0 MASKDSTTRAN: WE_CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKDSTTRAN_WE_CH6_Pos (14UL) /*!< GPDMA0 MASKDSTTRAN: WE_CH6 (Bit 14) */ +#define GPDMA0_MASKDSTTRAN_WE_CH6_Msk (0x4000UL) /*!< GPDMA0 MASKDSTTRAN: WE_CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKDSTTRAN_WE_CH7_Pos (15UL) /*!< GPDMA0 MASKDSTTRAN: WE_CH7 (Bit 15) */ +#define GPDMA0_MASKDSTTRAN_WE_CH7_Msk (0x8000UL) /*!< GPDMA0 MASKDSTTRAN: WE_CH7 (Bitfield-Mask: 0x01) */ + +/* ------------------------------- GPDMA0_MASKERR ------------------------------- */ +#define GPDMA0_MASKERR_CH0_Pos (0UL) /*!< GPDMA0 MASKERR: CH0 (Bit 0) */ +#define GPDMA0_MASKERR_CH0_Msk (0x1UL) /*!< GPDMA0 MASKERR: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKERR_CH1_Pos (1UL) /*!< GPDMA0 MASKERR: CH1 (Bit 1) */ +#define GPDMA0_MASKERR_CH1_Msk (0x2UL) /*!< GPDMA0 MASKERR: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKERR_CH2_Pos (2UL) /*!< GPDMA0 MASKERR: CH2 (Bit 2) */ +#define GPDMA0_MASKERR_CH2_Msk (0x4UL) /*!< GPDMA0 MASKERR: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKERR_CH3_Pos (3UL) /*!< GPDMA0 MASKERR: CH3 (Bit 3) */ +#define GPDMA0_MASKERR_CH3_Msk (0x8UL) /*!< GPDMA0 MASKERR: CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKERR_CH4_Pos (4UL) /*!< GPDMA0 MASKERR: CH4 (Bit 4) */ +#define GPDMA0_MASKERR_CH4_Msk (0x10UL) /*!< GPDMA0 MASKERR: CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKERR_CH5_Pos (5UL) /*!< GPDMA0 MASKERR: CH5 (Bit 5) */ +#define GPDMA0_MASKERR_CH5_Msk (0x20UL) /*!< GPDMA0 MASKERR: CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKERR_CH6_Pos (6UL) /*!< GPDMA0 MASKERR: CH6 (Bit 6) */ +#define GPDMA0_MASKERR_CH6_Msk (0x40UL) /*!< GPDMA0 MASKERR: CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKERR_CH7_Pos (7UL) /*!< GPDMA0 MASKERR: CH7 (Bit 7) */ +#define GPDMA0_MASKERR_CH7_Msk (0x80UL) /*!< GPDMA0 MASKERR: CH7 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKERR_WE_CH0_Pos (8UL) /*!< GPDMA0 MASKERR: WE_CH0 (Bit 8) */ +#define GPDMA0_MASKERR_WE_CH0_Msk (0x100UL) /*!< GPDMA0 MASKERR: WE_CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKERR_WE_CH1_Pos (9UL) /*!< GPDMA0 MASKERR: WE_CH1 (Bit 9) */ +#define GPDMA0_MASKERR_WE_CH1_Msk (0x200UL) /*!< GPDMA0 MASKERR: WE_CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKERR_WE_CH2_Pos (10UL) /*!< GPDMA0 MASKERR: WE_CH2 (Bit 10) */ +#define GPDMA0_MASKERR_WE_CH2_Msk (0x400UL) /*!< GPDMA0 MASKERR: WE_CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKERR_WE_CH3_Pos (11UL) /*!< GPDMA0 MASKERR: WE_CH3 (Bit 11) */ +#define GPDMA0_MASKERR_WE_CH3_Msk (0x800UL) /*!< GPDMA0 MASKERR: WE_CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKERR_WE_CH4_Pos (12UL) /*!< GPDMA0 MASKERR: WE_CH4 (Bit 12) */ +#define GPDMA0_MASKERR_WE_CH4_Msk (0x1000UL) /*!< GPDMA0 MASKERR: WE_CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKERR_WE_CH5_Pos (13UL) /*!< GPDMA0 MASKERR: WE_CH5 (Bit 13) */ +#define GPDMA0_MASKERR_WE_CH5_Msk (0x2000UL) /*!< GPDMA0 MASKERR: WE_CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKERR_WE_CH6_Pos (14UL) /*!< GPDMA0 MASKERR: WE_CH6 (Bit 14) */ +#define GPDMA0_MASKERR_WE_CH6_Msk (0x4000UL) /*!< GPDMA0 MASKERR: WE_CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKERR_WE_CH7_Pos (15UL) /*!< GPDMA0 MASKERR: WE_CH7 (Bit 15) */ +#define GPDMA0_MASKERR_WE_CH7_Msk (0x8000UL) /*!< GPDMA0 MASKERR: WE_CH7 (Bitfield-Mask: 0x01) */ + +/* ------------------------------- GPDMA0_CLEARTFR ------------------------------ */ +#define GPDMA0_CLEARTFR_CH0_Pos (0UL) /*!< GPDMA0 CLEARTFR: CH0 (Bit 0) */ +#define GPDMA0_CLEARTFR_CH0_Msk (0x1UL) /*!< GPDMA0 CLEARTFR: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_CLEARTFR_CH1_Pos (1UL) /*!< GPDMA0 CLEARTFR: CH1 (Bit 1) */ +#define GPDMA0_CLEARTFR_CH1_Msk (0x2UL) /*!< GPDMA0 CLEARTFR: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_CLEARTFR_CH2_Pos (2UL) /*!< GPDMA0 CLEARTFR: CH2 (Bit 2) */ +#define GPDMA0_CLEARTFR_CH2_Msk (0x4UL) /*!< GPDMA0 CLEARTFR: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_CLEARTFR_CH3_Pos (3UL) /*!< GPDMA0 CLEARTFR: CH3 (Bit 3) */ +#define GPDMA0_CLEARTFR_CH3_Msk (0x8UL) /*!< GPDMA0 CLEARTFR: CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_CLEARTFR_CH4_Pos (4UL) /*!< GPDMA0 CLEARTFR: CH4 (Bit 4) */ +#define GPDMA0_CLEARTFR_CH4_Msk (0x10UL) /*!< GPDMA0 CLEARTFR: CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_CLEARTFR_CH5_Pos (5UL) /*!< GPDMA0 CLEARTFR: CH5 (Bit 5) */ +#define GPDMA0_CLEARTFR_CH5_Msk (0x20UL) /*!< GPDMA0 CLEARTFR: CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_CLEARTFR_CH6_Pos (6UL) /*!< GPDMA0 CLEARTFR: CH6 (Bit 6) */ +#define GPDMA0_CLEARTFR_CH6_Msk (0x40UL) /*!< GPDMA0 CLEARTFR: CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_CLEARTFR_CH7_Pos (7UL) /*!< GPDMA0 CLEARTFR: CH7 (Bit 7) */ +#define GPDMA0_CLEARTFR_CH7_Msk (0x80UL) /*!< GPDMA0 CLEARTFR: CH7 (Bitfield-Mask: 0x01) */ + +/* ------------------------------ GPDMA0_CLEARBLOCK ----------------------------- */ +#define GPDMA0_CLEARBLOCK_CH0_Pos (0UL) /*!< GPDMA0 CLEARBLOCK: CH0 (Bit 0) */ +#define GPDMA0_CLEARBLOCK_CH0_Msk (0x1UL) /*!< GPDMA0 CLEARBLOCK: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_CLEARBLOCK_CH1_Pos (1UL) /*!< GPDMA0 CLEARBLOCK: CH1 (Bit 1) */ +#define GPDMA0_CLEARBLOCK_CH1_Msk (0x2UL) /*!< GPDMA0 CLEARBLOCK: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_CLEARBLOCK_CH2_Pos (2UL) /*!< GPDMA0 CLEARBLOCK: CH2 (Bit 2) */ +#define GPDMA0_CLEARBLOCK_CH2_Msk (0x4UL) /*!< GPDMA0 CLEARBLOCK: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_CLEARBLOCK_CH3_Pos (3UL) /*!< GPDMA0 CLEARBLOCK: CH3 (Bit 3) */ +#define GPDMA0_CLEARBLOCK_CH3_Msk (0x8UL) /*!< GPDMA0 CLEARBLOCK: CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_CLEARBLOCK_CH4_Pos (4UL) /*!< GPDMA0 CLEARBLOCK: CH4 (Bit 4) */ +#define GPDMA0_CLEARBLOCK_CH4_Msk (0x10UL) /*!< GPDMA0 CLEARBLOCK: CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_CLEARBLOCK_CH5_Pos (5UL) /*!< GPDMA0 CLEARBLOCK: CH5 (Bit 5) */ +#define GPDMA0_CLEARBLOCK_CH5_Msk (0x20UL) /*!< GPDMA0 CLEARBLOCK: CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_CLEARBLOCK_CH6_Pos (6UL) /*!< GPDMA0 CLEARBLOCK: CH6 (Bit 6) */ +#define GPDMA0_CLEARBLOCK_CH6_Msk (0x40UL) /*!< GPDMA0 CLEARBLOCK: CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_CLEARBLOCK_CH7_Pos (7UL) /*!< GPDMA0 CLEARBLOCK: CH7 (Bit 7) */ +#define GPDMA0_CLEARBLOCK_CH7_Msk (0x80UL) /*!< GPDMA0 CLEARBLOCK: CH7 (Bitfield-Mask: 0x01) */ + +/* ----------------------------- GPDMA0_CLEARSRCTRAN ---------------------------- */ +#define GPDMA0_CLEARSRCTRAN_CH0_Pos (0UL) /*!< GPDMA0 CLEARSRCTRAN: CH0 (Bit 0) */ +#define GPDMA0_CLEARSRCTRAN_CH0_Msk (0x1UL) /*!< GPDMA0 CLEARSRCTRAN: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_CLEARSRCTRAN_CH1_Pos (1UL) /*!< GPDMA0 CLEARSRCTRAN: CH1 (Bit 1) */ +#define GPDMA0_CLEARSRCTRAN_CH1_Msk (0x2UL) /*!< GPDMA0 CLEARSRCTRAN: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_CLEARSRCTRAN_CH2_Pos (2UL) /*!< GPDMA0 CLEARSRCTRAN: CH2 (Bit 2) */ +#define GPDMA0_CLEARSRCTRAN_CH2_Msk (0x4UL) /*!< GPDMA0 CLEARSRCTRAN: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_CLEARSRCTRAN_CH3_Pos (3UL) /*!< GPDMA0 CLEARSRCTRAN: CH3 (Bit 3) */ +#define GPDMA0_CLEARSRCTRAN_CH3_Msk (0x8UL) /*!< GPDMA0 CLEARSRCTRAN: CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_CLEARSRCTRAN_CH4_Pos (4UL) /*!< GPDMA0 CLEARSRCTRAN: CH4 (Bit 4) */ +#define GPDMA0_CLEARSRCTRAN_CH4_Msk (0x10UL) /*!< GPDMA0 CLEARSRCTRAN: CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_CLEARSRCTRAN_CH5_Pos (5UL) /*!< GPDMA0 CLEARSRCTRAN: CH5 (Bit 5) */ +#define GPDMA0_CLEARSRCTRAN_CH5_Msk (0x20UL) /*!< GPDMA0 CLEARSRCTRAN: CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_CLEARSRCTRAN_CH6_Pos (6UL) /*!< GPDMA0 CLEARSRCTRAN: CH6 (Bit 6) */ +#define GPDMA0_CLEARSRCTRAN_CH6_Msk (0x40UL) /*!< GPDMA0 CLEARSRCTRAN: CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_CLEARSRCTRAN_CH7_Pos (7UL) /*!< GPDMA0 CLEARSRCTRAN: CH7 (Bit 7) */ +#define GPDMA0_CLEARSRCTRAN_CH7_Msk (0x80UL) /*!< GPDMA0 CLEARSRCTRAN: CH7 (Bitfield-Mask: 0x01) */ + +/* ----------------------------- GPDMA0_CLEARDSTTRAN ---------------------------- */ +#define GPDMA0_CLEARDSTTRAN_CH0_Pos (0UL) /*!< GPDMA0 CLEARDSTTRAN: CH0 (Bit 0) */ +#define GPDMA0_CLEARDSTTRAN_CH0_Msk (0x1UL) /*!< GPDMA0 CLEARDSTTRAN: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_CLEARDSTTRAN_CH1_Pos (1UL) /*!< GPDMA0 CLEARDSTTRAN: CH1 (Bit 1) */ +#define GPDMA0_CLEARDSTTRAN_CH1_Msk (0x2UL) /*!< GPDMA0 CLEARDSTTRAN: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_CLEARDSTTRAN_CH2_Pos (2UL) /*!< GPDMA0 CLEARDSTTRAN: CH2 (Bit 2) */ +#define GPDMA0_CLEARDSTTRAN_CH2_Msk (0x4UL) /*!< GPDMA0 CLEARDSTTRAN: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_CLEARDSTTRAN_CH3_Pos (3UL) /*!< GPDMA0 CLEARDSTTRAN: CH3 (Bit 3) */ +#define GPDMA0_CLEARDSTTRAN_CH3_Msk (0x8UL) /*!< GPDMA0 CLEARDSTTRAN: CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_CLEARDSTTRAN_CH4_Pos (4UL) /*!< GPDMA0 CLEARDSTTRAN: CH4 (Bit 4) */ +#define GPDMA0_CLEARDSTTRAN_CH4_Msk (0x10UL) /*!< GPDMA0 CLEARDSTTRAN: CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_CLEARDSTTRAN_CH5_Pos (5UL) /*!< GPDMA0 CLEARDSTTRAN: CH5 (Bit 5) */ +#define GPDMA0_CLEARDSTTRAN_CH5_Msk (0x20UL) /*!< GPDMA0 CLEARDSTTRAN: CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_CLEARDSTTRAN_CH6_Pos (6UL) /*!< GPDMA0 CLEARDSTTRAN: CH6 (Bit 6) */ +#define GPDMA0_CLEARDSTTRAN_CH6_Msk (0x40UL) /*!< GPDMA0 CLEARDSTTRAN: CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_CLEARDSTTRAN_CH7_Pos (7UL) /*!< GPDMA0 CLEARDSTTRAN: CH7 (Bit 7) */ +#define GPDMA0_CLEARDSTTRAN_CH7_Msk (0x80UL) /*!< GPDMA0 CLEARDSTTRAN: CH7 (Bitfield-Mask: 0x01) */ + +/* ------------------------------- GPDMA0_CLEARERR ------------------------------ */ +#define GPDMA0_CLEARERR_CH0_Pos (0UL) /*!< GPDMA0 CLEARERR: CH0 (Bit 0) */ +#define GPDMA0_CLEARERR_CH0_Msk (0x1UL) /*!< GPDMA0 CLEARERR: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_CLEARERR_CH1_Pos (1UL) /*!< GPDMA0 CLEARERR: CH1 (Bit 1) */ +#define GPDMA0_CLEARERR_CH1_Msk (0x2UL) /*!< GPDMA0 CLEARERR: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_CLEARERR_CH2_Pos (2UL) /*!< GPDMA0 CLEARERR: CH2 (Bit 2) */ +#define GPDMA0_CLEARERR_CH2_Msk (0x4UL) /*!< GPDMA0 CLEARERR: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_CLEARERR_CH3_Pos (3UL) /*!< GPDMA0 CLEARERR: CH3 (Bit 3) */ +#define GPDMA0_CLEARERR_CH3_Msk (0x8UL) /*!< GPDMA0 CLEARERR: CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_CLEARERR_CH4_Pos (4UL) /*!< GPDMA0 CLEARERR: CH4 (Bit 4) */ +#define GPDMA0_CLEARERR_CH4_Msk (0x10UL) /*!< GPDMA0 CLEARERR: CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_CLEARERR_CH5_Pos (5UL) /*!< GPDMA0 CLEARERR: CH5 (Bit 5) */ +#define GPDMA0_CLEARERR_CH5_Msk (0x20UL) /*!< GPDMA0 CLEARERR: CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_CLEARERR_CH6_Pos (6UL) /*!< GPDMA0 CLEARERR: CH6 (Bit 6) */ +#define GPDMA0_CLEARERR_CH6_Msk (0x40UL) /*!< GPDMA0 CLEARERR: CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_CLEARERR_CH7_Pos (7UL) /*!< GPDMA0 CLEARERR: CH7 (Bit 7) */ +#define GPDMA0_CLEARERR_CH7_Msk (0x80UL) /*!< GPDMA0 CLEARERR: CH7 (Bitfield-Mask: 0x01) */ + +/* ------------------------------ GPDMA0_STATUSINT ------------------------------ */ +#define GPDMA0_STATUSINT_TFR_Pos (0UL) /*!< GPDMA0 STATUSINT: TFR (Bit 0) */ +#define GPDMA0_STATUSINT_TFR_Msk (0x1UL) /*!< GPDMA0 STATUSINT: TFR (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSINT_BLOCK_Pos (1UL) /*!< GPDMA0 STATUSINT: BLOCK (Bit 1) */ +#define GPDMA0_STATUSINT_BLOCK_Msk (0x2UL) /*!< GPDMA0 STATUSINT: BLOCK (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSINT_SRCT_Pos (2UL) /*!< GPDMA0 STATUSINT: SRCT (Bit 2) */ +#define GPDMA0_STATUSINT_SRCT_Msk (0x4UL) /*!< GPDMA0 STATUSINT: SRCT (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSINT_DSTT_Pos (3UL) /*!< GPDMA0 STATUSINT: DSTT (Bit 3) */ +#define GPDMA0_STATUSINT_DSTT_Msk (0x8UL) /*!< GPDMA0 STATUSINT: DSTT (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSINT_ERR_Pos (4UL) /*!< GPDMA0 STATUSINT: ERR (Bit 4) */ +#define GPDMA0_STATUSINT_ERR_Msk (0x10UL) /*!< GPDMA0 STATUSINT: ERR (Bitfield-Mask: 0x01) */ + +/* ------------------------------ GPDMA0_REQSRCREG ------------------------------ */ +#define GPDMA0_REQSRCREG_CH0_Pos (0UL) /*!< GPDMA0 REQSRCREG: CH0 (Bit 0) */ +#define GPDMA0_REQSRCREG_CH0_Msk (0x1UL) /*!< GPDMA0 REQSRCREG: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_REQSRCREG_CH1_Pos (1UL) /*!< GPDMA0 REQSRCREG: CH1 (Bit 1) */ +#define GPDMA0_REQSRCREG_CH1_Msk (0x2UL) /*!< GPDMA0 REQSRCREG: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_REQSRCREG_CH2_Pos (2UL) /*!< GPDMA0 REQSRCREG: CH2 (Bit 2) */ +#define GPDMA0_REQSRCREG_CH2_Msk (0x4UL) /*!< GPDMA0 REQSRCREG: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_REQSRCREG_CH3_Pos (3UL) /*!< GPDMA0 REQSRCREG: CH3 (Bit 3) */ +#define GPDMA0_REQSRCREG_CH3_Msk (0x8UL) /*!< GPDMA0 REQSRCREG: CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_REQSRCREG_CH4_Pos (4UL) /*!< GPDMA0 REQSRCREG: CH4 (Bit 4) */ +#define GPDMA0_REQSRCREG_CH4_Msk (0x10UL) /*!< GPDMA0 REQSRCREG: CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_REQSRCREG_CH5_Pos (5UL) /*!< GPDMA0 REQSRCREG: CH5 (Bit 5) */ +#define GPDMA0_REQSRCREG_CH5_Msk (0x20UL) /*!< GPDMA0 REQSRCREG: CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_REQSRCREG_CH6_Pos (6UL) /*!< GPDMA0 REQSRCREG: CH6 (Bit 6) */ +#define GPDMA0_REQSRCREG_CH6_Msk (0x40UL) /*!< GPDMA0 REQSRCREG: CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_REQSRCREG_CH7_Pos (7UL) /*!< GPDMA0 REQSRCREG: CH7 (Bit 7) */ +#define GPDMA0_REQSRCREG_CH7_Msk (0x80UL) /*!< GPDMA0 REQSRCREG: CH7 (Bitfield-Mask: 0x01) */ +#define GPDMA0_REQSRCREG_WE_CH0_Pos (8UL) /*!< GPDMA0 REQSRCREG: WE_CH0 (Bit 8) */ +#define GPDMA0_REQSRCREG_WE_CH0_Msk (0x100UL) /*!< GPDMA0 REQSRCREG: WE_CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_REQSRCREG_WE_CH1_Pos (9UL) /*!< GPDMA0 REQSRCREG: WE_CH1 (Bit 9) */ +#define GPDMA0_REQSRCREG_WE_CH1_Msk (0x200UL) /*!< GPDMA0 REQSRCREG: WE_CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_REQSRCREG_WE_CH2_Pos (10UL) /*!< GPDMA0 REQSRCREG: WE_CH2 (Bit 10) */ +#define GPDMA0_REQSRCREG_WE_CH2_Msk (0x400UL) /*!< GPDMA0 REQSRCREG: WE_CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_REQSRCREG_WE_CH3_Pos (11UL) /*!< GPDMA0 REQSRCREG: WE_CH3 (Bit 11) */ +#define GPDMA0_REQSRCREG_WE_CH3_Msk (0x800UL) /*!< GPDMA0 REQSRCREG: WE_CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_REQSRCREG_WE_CH4_Pos (12UL) /*!< GPDMA0 REQSRCREG: WE_CH4 (Bit 12) */ +#define GPDMA0_REQSRCREG_WE_CH4_Msk (0x1000UL) /*!< GPDMA0 REQSRCREG: WE_CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_REQSRCREG_WE_CH5_Pos (13UL) /*!< GPDMA0 REQSRCREG: WE_CH5 (Bit 13) */ +#define GPDMA0_REQSRCREG_WE_CH5_Msk (0x2000UL) /*!< GPDMA0 REQSRCREG: WE_CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_REQSRCREG_WE_CH6_Pos (14UL) /*!< GPDMA0 REQSRCREG: WE_CH6 (Bit 14) */ +#define GPDMA0_REQSRCREG_WE_CH6_Msk (0x4000UL) /*!< GPDMA0 REQSRCREG: WE_CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_REQSRCREG_WE_CH7_Pos (15UL) /*!< GPDMA0 REQSRCREG: WE_CH7 (Bit 15) */ +#define GPDMA0_REQSRCREG_WE_CH7_Msk (0x8000UL) /*!< GPDMA0 REQSRCREG: WE_CH7 (Bitfield-Mask: 0x01) */ + +/* ------------------------------ GPDMA0_REQDSTREG ------------------------------ */ +#define GPDMA0_REQDSTREG_CH0_Pos (0UL) /*!< GPDMA0 REQDSTREG: CH0 (Bit 0) */ +#define GPDMA0_REQDSTREG_CH0_Msk (0x1UL) /*!< GPDMA0 REQDSTREG: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_REQDSTREG_CH1_Pos (1UL) /*!< GPDMA0 REQDSTREG: CH1 (Bit 1) */ +#define GPDMA0_REQDSTREG_CH1_Msk (0x2UL) /*!< GPDMA0 REQDSTREG: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_REQDSTREG_CH2_Pos (2UL) /*!< GPDMA0 REQDSTREG: CH2 (Bit 2) */ +#define GPDMA0_REQDSTREG_CH2_Msk (0x4UL) /*!< GPDMA0 REQDSTREG: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_REQDSTREG_CH3_Pos (3UL) /*!< GPDMA0 REQDSTREG: CH3 (Bit 3) */ +#define GPDMA0_REQDSTREG_CH3_Msk (0x8UL) /*!< GPDMA0 REQDSTREG: CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_REQDSTREG_CH4_Pos (4UL) /*!< GPDMA0 REQDSTREG: CH4 (Bit 4) */ +#define GPDMA0_REQDSTREG_CH4_Msk (0x10UL) /*!< GPDMA0 REQDSTREG: CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_REQDSTREG_CH5_Pos (5UL) /*!< GPDMA0 REQDSTREG: CH5 (Bit 5) */ +#define GPDMA0_REQDSTREG_CH5_Msk (0x20UL) /*!< GPDMA0 REQDSTREG: CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_REQDSTREG_CH6_Pos (6UL) /*!< GPDMA0 REQDSTREG: CH6 (Bit 6) */ +#define GPDMA0_REQDSTREG_CH6_Msk (0x40UL) /*!< GPDMA0 REQDSTREG: CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_REQDSTREG_CH7_Pos (7UL) /*!< GPDMA0 REQDSTREG: CH7 (Bit 7) */ +#define GPDMA0_REQDSTREG_CH7_Msk (0x80UL) /*!< GPDMA0 REQDSTREG: CH7 (Bitfield-Mask: 0x01) */ +#define GPDMA0_REQDSTREG_WE_CH0_Pos (8UL) /*!< GPDMA0 REQDSTREG: WE_CH0 (Bit 8) */ +#define GPDMA0_REQDSTREG_WE_CH0_Msk (0x100UL) /*!< GPDMA0 REQDSTREG: WE_CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_REQDSTREG_WE_CH1_Pos (9UL) /*!< GPDMA0 REQDSTREG: WE_CH1 (Bit 9) */ +#define GPDMA0_REQDSTREG_WE_CH1_Msk (0x200UL) /*!< GPDMA0 REQDSTREG: WE_CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_REQDSTREG_WE_CH2_Pos (10UL) /*!< GPDMA0 REQDSTREG: WE_CH2 (Bit 10) */ +#define GPDMA0_REQDSTREG_WE_CH2_Msk (0x400UL) /*!< GPDMA0 REQDSTREG: WE_CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_REQDSTREG_WE_CH3_Pos (11UL) /*!< GPDMA0 REQDSTREG: WE_CH3 (Bit 11) */ +#define GPDMA0_REQDSTREG_WE_CH3_Msk (0x800UL) /*!< GPDMA0 REQDSTREG: WE_CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_REQDSTREG_WE_CH4_Pos (12UL) /*!< GPDMA0 REQDSTREG: WE_CH4 (Bit 12) */ +#define GPDMA0_REQDSTREG_WE_CH4_Msk (0x1000UL) /*!< GPDMA0 REQDSTREG: WE_CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_REQDSTREG_WE_CH5_Pos (13UL) /*!< GPDMA0 REQDSTREG: WE_CH5 (Bit 13) */ +#define GPDMA0_REQDSTREG_WE_CH5_Msk (0x2000UL) /*!< GPDMA0 REQDSTREG: WE_CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_REQDSTREG_WE_CH6_Pos (14UL) /*!< GPDMA0 REQDSTREG: WE_CH6 (Bit 14) */ +#define GPDMA0_REQDSTREG_WE_CH6_Msk (0x4000UL) /*!< GPDMA0 REQDSTREG: WE_CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_REQDSTREG_WE_CH7_Pos (15UL) /*!< GPDMA0 REQDSTREG: WE_CH7 (Bit 15) */ +#define GPDMA0_REQDSTREG_WE_CH7_Msk (0x8000UL) /*!< GPDMA0 REQDSTREG: WE_CH7 (Bitfield-Mask: 0x01) */ + +/* ----------------------------- GPDMA0_SGLREQSRCREG ---------------------------- */ +#define GPDMA0_SGLREQSRCREG_CH0_Pos (0UL) /*!< GPDMA0 SGLREQSRCREG: CH0 (Bit 0) */ +#define GPDMA0_SGLREQSRCREG_CH0_Msk (0x1UL) /*!< GPDMA0 SGLREQSRCREG: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_SGLREQSRCREG_CH1_Pos (1UL) /*!< GPDMA0 SGLREQSRCREG: CH1 (Bit 1) */ +#define GPDMA0_SGLREQSRCREG_CH1_Msk (0x2UL) /*!< GPDMA0 SGLREQSRCREG: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_SGLREQSRCREG_CH2_Pos (2UL) /*!< GPDMA0 SGLREQSRCREG: CH2 (Bit 2) */ +#define GPDMA0_SGLREQSRCREG_CH2_Msk (0x4UL) /*!< GPDMA0 SGLREQSRCREG: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_SGLREQSRCREG_CH3_Pos (3UL) /*!< GPDMA0 SGLREQSRCREG: CH3 (Bit 3) */ +#define GPDMA0_SGLREQSRCREG_CH3_Msk (0x8UL) /*!< GPDMA0 SGLREQSRCREG: CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_SGLREQSRCREG_CH4_Pos (4UL) /*!< GPDMA0 SGLREQSRCREG: CH4 (Bit 4) */ +#define GPDMA0_SGLREQSRCREG_CH4_Msk (0x10UL) /*!< GPDMA0 SGLREQSRCREG: CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_SGLREQSRCREG_CH5_Pos (5UL) /*!< GPDMA0 SGLREQSRCREG: CH5 (Bit 5) */ +#define GPDMA0_SGLREQSRCREG_CH5_Msk (0x20UL) /*!< GPDMA0 SGLREQSRCREG: CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_SGLREQSRCREG_CH6_Pos (6UL) /*!< GPDMA0 SGLREQSRCREG: CH6 (Bit 6) */ +#define GPDMA0_SGLREQSRCREG_CH6_Msk (0x40UL) /*!< GPDMA0 SGLREQSRCREG: CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_SGLREQSRCREG_CH7_Pos (7UL) /*!< GPDMA0 SGLREQSRCREG: CH7 (Bit 7) */ +#define GPDMA0_SGLREQSRCREG_CH7_Msk (0x80UL) /*!< GPDMA0 SGLREQSRCREG: CH7 (Bitfield-Mask: 0x01) */ +#define GPDMA0_SGLREQSRCREG_WE_CH0_Pos (8UL) /*!< GPDMA0 SGLREQSRCREG: WE_CH0 (Bit 8) */ +#define GPDMA0_SGLREQSRCREG_WE_CH0_Msk (0x100UL) /*!< GPDMA0 SGLREQSRCREG: WE_CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_SGLREQSRCREG_WE_CH1_Pos (9UL) /*!< GPDMA0 SGLREQSRCREG: WE_CH1 (Bit 9) */ +#define GPDMA0_SGLREQSRCREG_WE_CH1_Msk (0x200UL) /*!< GPDMA0 SGLREQSRCREG: WE_CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_SGLREQSRCREG_WE_CH2_Pos (10UL) /*!< GPDMA0 SGLREQSRCREG: WE_CH2 (Bit 10) */ +#define GPDMA0_SGLREQSRCREG_WE_CH2_Msk (0x400UL) /*!< GPDMA0 SGLREQSRCREG: WE_CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_SGLREQSRCREG_WE_CH3_Pos (11UL) /*!< GPDMA0 SGLREQSRCREG: WE_CH3 (Bit 11) */ +#define GPDMA0_SGLREQSRCREG_WE_CH3_Msk (0x800UL) /*!< GPDMA0 SGLREQSRCREG: WE_CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_SGLREQSRCREG_WE_CH4_Pos (12UL) /*!< GPDMA0 SGLREQSRCREG: WE_CH4 (Bit 12) */ +#define GPDMA0_SGLREQSRCREG_WE_CH4_Msk (0x1000UL) /*!< GPDMA0 SGLREQSRCREG: WE_CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_SGLREQSRCREG_WE_CH5_Pos (13UL) /*!< GPDMA0 SGLREQSRCREG: WE_CH5 (Bit 13) */ +#define GPDMA0_SGLREQSRCREG_WE_CH5_Msk (0x2000UL) /*!< GPDMA0 SGLREQSRCREG: WE_CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_SGLREQSRCREG_WE_CH6_Pos (14UL) /*!< GPDMA0 SGLREQSRCREG: WE_CH6 (Bit 14) */ +#define GPDMA0_SGLREQSRCREG_WE_CH6_Msk (0x4000UL) /*!< GPDMA0 SGLREQSRCREG: WE_CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_SGLREQSRCREG_WE_CH7_Pos (15UL) /*!< GPDMA0 SGLREQSRCREG: WE_CH7 (Bit 15) */ +#define GPDMA0_SGLREQSRCREG_WE_CH7_Msk (0x8000UL) /*!< GPDMA0 SGLREQSRCREG: WE_CH7 (Bitfield-Mask: 0x01) */ + +/* ----------------------------- GPDMA0_SGLREQDSTREG ---------------------------- */ +#define GPDMA0_SGLREQDSTREG_CH0_Pos (0UL) /*!< GPDMA0 SGLREQDSTREG: CH0 (Bit 0) */ +#define GPDMA0_SGLREQDSTREG_CH0_Msk (0x1UL) /*!< GPDMA0 SGLREQDSTREG: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_SGLREQDSTREG_CH1_Pos (1UL) /*!< GPDMA0 SGLREQDSTREG: CH1 (Bit 1) */ +#define GPDMA0_SGLREQDSTREG_CH1_Msk (0x2UL) /*!< GPDMA0 SGLREQDSTREG: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_SGLREQDSTREG_CH2_Pos (2UL) /*!< GPDMA0 SGLREQDSTREG: CH2 (Bit 2) */ +#define GPDMA0_SGLREQDSTREG_CH2_Msk (0x4UL) /*!< GPDMA0 SGLREQDSTREG: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_SGLREQDSTREG_CH3_Pos (3UL) /*!< GPDMA0 SGLREQDSTREG: CH3 (Bit 3) */ +#define GPDMA0_SGLREQDSTREG_CH3_Msk (0x8UL) /*!< GPDMA0 SGLREQDSTREG: CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_SGLREQDSTREG_CH4_Pos (4UL) /*!< GPDMA0 SGLREQDSTREG: CH4 (Bit 4) */ +#define GPDMA0_SGLREQDSTREG_CH4_Msk (0x10UL) /*!< GPDMA0 SGLREQDSTREG: CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_SGLREQDSTREG_CH5_Pos (5UL) /*!< GPDMA0 SGLREQDSTREG: CH5 (Bit 5) */ +#define GPDMA0_SGLREQDSTREG_CH5_Msk (0x20UL) /*!< GPDMA0 SGLREQDSTREG: CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_SGLREQDSTREG_CH6_Pos (6UL) /*!< GPDMA0 SGLREQDSTREG: CH6 (Bit 6) */ +#define GPDMA0_SGLREQDSTREG_CH6_Msk (0x40UL) /*!< GPDMA0 SGLREQDSTREG: CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_SGLREQDSTREG_CH7_Pos (7UL) /*!< GPDMA0 SGLREQDSTREG: CH7 (Bit 7) */ +#define GPDMA0_SGLREQDSTREG_CH7_Msk (0x80UL) /*!< GPDMA0 SGLREQDSTREG: CH7 (Bitfield-Mask: 0x01) */ +#define GPDMA0_SGLREQDSTREG_WE_CH0_Pos (8UL) /*!< GPDMA0 SGLREQDSTREG: WE_CH0 (Bit 8) */ +#define GPDMA0_SGLREQDSTREG_WE_CH0_Msk (0x100UL) /*!< GPDMA0 SGLREQDSTREG: WE_CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_SGLREQDSTREG_WE_CH1_Pos (9UL) /*!< GPDMA0 SGLREQDSTREG: WE_CH1 (Bit 9) */ +#define GPDMA0_SGLREQDSTREG_WE_CH1_Msk (0x200UL) /*!< GPDMA0 SGLREQDSTREG: WE_CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_SGLREQDSTREG_WE_CH2_Pos (10UL) /*!< GPDMA0 SGLREQDSTREG: WE_CH2 (Bit 10) */ +#define GPDMA0_SGLREQDSTREG_WE_CH2_Msk (0x400UL) /*!< GPDMA0 SGLREQDSTREG: WE_CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_SGLREQDSTREG_WE_CH3_Pos (11UL) /*!< GPDMA0 SGLREQDSTREG: WE_CH3 (Bit 11) */ +#define GPDMA0_SGLREQDSTREG_WE_CH3_Msk (0x800UL) /*!< GPDMA0 SGLREQDSTREG: WE_CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_SGLREQDSTREG_WE_CH4_Pos (12UL) /*!< GPDMA0 SGLREQDSTREG: WE_CH4 (Bit 12) */ +#define GPDMA0_SGLREQDSTREG_WE_CH4_Msk (0x1000UL) /*!< GPDMA0 SGLREQDSTREG: WE_CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_SGLREQDSTREG_WE_CH5_Pos (13UL) /*!< GPDMA0 SGLREQDSTREG: WE_CH5 (Bit 13) */ +#define GPDMA0_SGLREQDSTREG_WE_CH5_Msk (0x2000UL) /*!< GPDMA0 SGLREQDSTREG: WE_CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_SGLREQDSTREG_WE_CH6_Pos (14UL) /*!< GPDMA0 SGLREQDSTREG: WE_CH6 (Bit 14) */ +#define GPDMA0_SGLREQDSTREG_WE_CH6_Msk (0x4000UL) /*!< GPDMA0 SGLREQDSTREG: WE_CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_SGLREQDSTREG_WE_CH7_Pos (15UL) /*!< GPDMA0 SGLREQDSTREG: WE_CH7 (Bit 15) */ +#define GPDMA0_SGLREQDSTREG_WE_CH7_Msk (0x8000UL) /*!< GPDMA0 SGLREQDSTREG: WE_CH7 (Bitfield-Mask: 0x01) */ + +/* ------------------------------ GPDMA0_LSTSRCREG ------------------------------ */ +#define GPDMA0_LSTSRCREG_CH0_Pos (0UL) /*!< GPDMA0 LSTSRCREG: CH0 (Bit 0) */ +#define GPDMA0_LSTSRCREG_CH0_Msk (0x1UL) /*!< GPDMA0 LSTSRCREG: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_LSTSRCREG_CH1_Pos (1UL) /*!< GPDMA0 LSTSRCREG: CH1 (Bit 1) */ +#define GPDMA0_LSTSRCREG_CH1_Msk (0x2UL) /*!< GPDMA0 LSTSRCREG: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_LSTSRCREG_CH2_Pos (2UL) /*!< GPDMA0 LSTSRCREG: CH2 (Bit 2) */ +#define GPDMA0_LSTSRCREG_CH2_Msk (0x4UL) /*!< GPDMA0 LSTSRCREG: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_LSTSRCREG_CH3_Pos (3UL) /*!< GPDMA0 LSTSRCREG: CH3 (Bit 3) */ +#define GPDMA0_LSTSRCREG_CH3_Msk (0x8UL) /*!< GPDMA0 LSTSRCREG: CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_LSTSRCREG_CH4_Pos (4UL) /*!< GPDMA0 LSTSRCREG: CH4 (Bit 4) */ +#define GPDMA0_LSTSRCREG_CH4_Msk (0x10UL) /*!< GPDMA0 LSTSRCREG: CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_LSTSRCREG_CH5_Pos (5UL) /*!< GPDMA0 LSTSRCREG: CH5 (Bit 5) */ +#define GPDMA0_LSTSRCREG_CH5_Msk (0x20UL) /*!< GPDMA0 LSTSRCREG: CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_LSTSRCREG_CH6_Pos (6UL) /*!< GPDMA0 LSTSRCREG: CH6 (Bit 6) */ +#define GPDMA0_LSTSRCREG_CH6_Msk (0x40UL) /*!< GPDMA0 LSTSRCREG: CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_LSTSRCREG_CH7_Pos (7UL) /*!< GPDMA0 LSTSRCREG: CH7 (Bit 7) */ +#define GPDMA0_LSTSRCREG_CH7_Msk (0x80UL) /*!< GPDMA0 LSTSRCREG: CH7 (Bitfield-Mask: 0x01) */ +#define GPDMA0_LSTSRCREG_WE_CH0_Pos (8UL) /*!< GPDMA0 LSTSRCREG: WE_CH0 (Bit 8) */ +#define GPDMA0_LSTSRCREG_WE_CH0_Msk (0x100UL) /*!< GPDMA0 LSTSRCREG: WE_CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_LSTSRCREG_WE_CH1_Pos (9UL) /*!< GPDMA0 LSTSRCREG: WE_CH1 (Bit 9) */ +#define GPDMA0_LSTSRCREG_WE_CH1_Msk (0x200UL) /*!< GPDMA0 LSTSRCREG: WE_CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_LSTSRCREG_WE_CH2_Pos (10UL) /*!< GPDMA0 LSTSRCREG: WE_CH2 (Bit 10) */ +#define GPDMA0_LSTSRCREG_WE_CH2_Msk (0x400UL) /*!< GPDMA0 LSTSRCREG: WE_CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_LSTSRCREG_WE_CH3_Pos (11UL) /*!< GPDMA0 LSTSRCREG: WE_CH3 (Bit 11) */ +#define GPDMA0_LSTSRCREG_WE_CH3_Msk (0x800UL) /*!< GPDMA0 LSTSRCREG: WE_CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_LSTSRCREG_WE_CH4_Pos (12UL) /*!< GPDMA0 LSTSRCREG: WE_CH4 (Bit 12) */ +#define GPDMA0_LSTSRCREG_WE_CH4_Msk (0x1000UL) /*!< GPDMA0 LSTSRCREG: WE_CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_LSTSRCREG_WE_CH5_Pos (13UL) /*!< GPDMA0 LSTSRCREG: WE_CH5 (Bit 13) */ +#define GPDMA0_LSTSRCREG_WE_CH5_Msk (0x2000UL) /*!< GPDMA0 LSTSRCREG: WE_CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_LSTSRCREG_WE_CH6_Pos (14UL) /*!< GPDMA0 LSTSRCREG: WE_CH6 (Bit 14) */ +#define GPDMA0_LSTSRCREG_WE_CH6_Msk (0x4000UL) /*!< GPDMA0 LSTSRCREG: WE_CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_LSTSRCREG_WE_CH7_Pos (15UL) /*!< GPDMA0 LSTSRCREG: WE_CH7 (Bit 15) */ +#define GPDMA0_LSTSRCREG_WE_CH7_Msk (0x8000UL) /*!< GPDMA0 LSTSRCREG: WE_CH7 (Bitfield-Mask: 0x01) */ + +/* ------------------------------ GPDMA0_LSTDSTREG ------------------------------ */ +#define GPDMA0_LSTDSTREG_CH0_Pos (0UL) /*!< GPDMA0 LSTDSTREG: CH0 (Bit 0) */ +#define GPDMA0_LSTDSTREG_CH0_Msk (0x1UL) /*!< GPDMA0 LSTDSTREG: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_LSTDSTREG_CH1_Pos (1UL) /*!< GPDMA0 LSTDSTREG: CH1 (Bit 1) */ +#define GPDMA0_LSTDSTREG_CH1_Msk (0x2UL) /*!< GPDMA0 LSTDSTREG: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_LSTDSTREG_CH2_Pos (2UL) /*!< GPDMA0 LSTDSTREG: CH2 (Bit 2) */ +#define GPDMA0_LSTDSTREG_CH2_Msk (0x4UL) /*!< GPDMA0 LSTDSTREG: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_LSTDSTREG_CH3_Pos (3UL) /*!< GPDMA0 LSTDSTREG: CH3 (Bit 3) */ +#define GPDMA0_LSTDSTREG_CH3_Msk (0x8UL) /*!< GPDMA0 LSTDSTREG: CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_LSTDSTREG_CH4_Pos (4UL) /*!< GPDMA0 LSTDSTREG: CH4 (Bit 4) */ +#define GPDMA0_LSTDSTREG_CH4_Msk (0x10UL) /*!< GPDMA0 LSTDSTREG: CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_LSTDSTREG_CH5_Pos (5UL) /*!< GPDMA0 LSTDSTREG: CH5 (Bit 5) */ +#define GPDMA0_LSTDSTREG_CH5_Msk (0x20UL) /*!< GPDMA0 LSTDSTREG: CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_LSTDSTREG_CH6_Pos (6UL) /*!< GPDMA0 LSTDSTREG: CH6 (Bit 6) */ +#define GPDMA0_LSTDSTREG_CH6_Msk (0x40UL) /*!< GPDMA0 LSTDSTREG: CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_LSTDSTREG_CH7_Pos (7UL) /*!< GPDMA0 LSTDSTREG: CH7 (Bit 7) */ +#define GPDMA0_LSTDSTREG_CH7_Msk (0x80UL) /*!< GPDMA0 LSTDSTREG: CH7 (Bitfield-Mask: 0x01) */ +#define GPDMA0_LSTDSTREG_WE_CH0_Pos (8UL) /*!< GPDMA0 LSTDSTREG: WE_CH0 (Bit 8) */ +#define GPDMA0_LSTDSTREG_WE_CH0_Msk (0x100UL) /*!< GPDMA0 LSTDSTREG: WE_CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_LSTDSTREG_WE_CH1_Pos (9UL) /*!< GPDMA0 LSTDSTREG: WE_CH1 (Bit 9) */ +#define GPDMA0_LSTDSTREG_WE_CH1_Msk (0x200UL) /*!< GPDMA0 LSTDSTREG: WE_CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_LSTDSTREG_WE_CH2_Pos (10UL) /*!< GPDMA0 LSTDSTREG: WE_CH2 (Bit 10) */ +#define GPDMA0_LSTDSTREG_WE_CH2_Msk (0x400UL) /*!< GPDMA0 LSTDSTREG: WE_CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_LSTDSTREG_WE_CH3_Pos (11UL) /*!< GPDMA0 LSTDSTREG: WE_CH3 (Bit 11) */ +#define GPDMA0_LSTDSTREG_WE_CH3_Msk (0x800UL) /*!< GPDMA0 LSTDSTREG: WE_CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_LSTDSTREG_WE_CH4_Pos (12UL) /*!< GPDMA0 LSTDSTREG: WE_CH4 (Bit 12) */ +#define GPDMA0_LSTDSTREG_WE_CH4_Msk (0x1000UL) /*!< GPDMA0 LSTDSTREG: WE_CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_LSTDSTREG_WE_CH5_Pos (13UL) /*!< GPDMA0 LSTDSTREG: WE_CH5 (Bit 13) */ +#define GPDMA0_LSTDSTREG_WE_CH5_Msk (0x2000UL) /*!< GPDMA0 LSTDSTREG: WE_CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_LSTDSTREG_WE_CH6_Pos (14UL) /*!< GPDMA0 LSTDSTREG: WE_CH6 (Bit 14) */ +#define GPDMA0_LSTDSTREG_WE_CH6_Msk (0x4000UL) /*!< GPDMA0 LSTDSTREG: WE_CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_LSTDSTREG_WE_CH7_Pos (15UL) /*!< GPDMA0 LSTDSTREG: WE_CH7 (Bit 15) */ +#define GPDMA0_LSTDSTREG_WE_CH7_Msk (0x8000UL) /*!< GPDMA0 LSTDSTREG: WE_CH7 (Bitfield-Mask: 0x01) */ + +/* ------------------------------ GPDMA0_DMACFGREG ------------------------------ */ +#define GPDMA0_DMACFGREG_DMA_EN_Pos (0UL) /*!< GPDMA0 DMACFGREG: DMA_EN (Bit 0) */ +#define GPDMA0_DMACFGREG_DMA_EN_Msk (0x1UL) /*!< GPDMA0 DMACFGREG: DMA_EN (Bitfield-Mask: 0x01) */ + +/* ------------------------------- GPDMA0_CHENREG ------------------------------- */ +#define GPDMA0_CHENREG_CH_Pos (0UL) /*!< GPDMA0 CHENREG: CH (Bit 0) */ +#define GPDMA0_CHENREG_CH_Msk (0xffUL) /*!< GPDMA0 CHENREG: CH (Bitfield-Mask: 0xff) */ +#define GPDMA0_CHENREG_WE_CH_Pos (8UL) /*!< GPDMA0 CHENREG: WE_CH (Bit 8) */ +#define GPDMA0_CHENREG_WE_CH_Msk (0xff00UL) /*!< GPDMA0 CHENREG: WE_CH (Bitfield-Mask: 0xff) */ + +/* ---------------------------------- GPDMA0_ID --------------------------------- */ +#define GPDMA0_ID_VALUE_Pos (0UL) /*!< GPDMA0 ID: VALUE (Bit 0) */ +#define GPDMA0_ID_VALUE_Msk (0xffffffffUL) /*!< GPDMA0 ID: VALUE (Bitfield-Mask: 0xffffffff) */ + +/* --------------------------------- GPDMA0_TYPE -------------------------------- */ +#define GPDMA0_TYPE_VALUE_Pos (0UL) /*!< GPDMA0 TYPE: VALUE (Bit 0) */ +#define GPDMA0_TYPE_VALUE_Msk (0xffffffffUL) /*!< GPDMA0 TYPE: VALUE (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------------- GPDMA0_VERSION ------------------------------- */ +#define GPDMA0_VERSION_VALUE_Pos (0UL) /*!< GPDMA0 VERSION: VALUE (Bit 0) */ +#define GPDMA0_VERSION_VALUE_Msk (0xffffffffUL) /*!< GPDMA0 VERSION: VALUE (Bitfield-Mask: 0xffffffff) */ + + +/* ================================================================================ */ +/* ================ Group 'GPDMA0_CH0_1' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ------------------------------ GPDMA0_CH_SAR ------------------------------ */ +#define GPDMA0_CH_SAR_SAR_Pos (0UL) /*!< GPDMA0_CH0_1 SAR: SAR (Bit 0) */ +#define GPDMA0_CH_SAR_SAR_Msk (0xffffffffUL) /*!< GPDMA0_CH0_1 SAR: SAR (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------------ GPDMA0_CH_DAR ------------------------------ */ +#define GPDMA0_CH_DAR_DAR_Pos (0UL) /*!< GPDMA0_CH0_1 DAR: DAR (Bit 0) */ +#define GPDMA0_CH_DAR_DAR_Msk (0xffffffffUL) /*!< GPDMA0_CH0_1 DAR: DAR (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------------ GPDMA0_CH_LLP ------------------------------ */ +#define GPDMA0_CH_LLP_LOC_Pos (2UL) /*!< GPDMA0_CH0_1 LLP: LOC (Bit 2) */ +#define GPDMA0_CH_LLP_LOC_Msk (0xfffffffcUL) /*!< GPDMA0_CH0_1 LLP: LOC (Bitfield-Mask: 0x3fffffff) */ + +/* ------------------------------ GPDMA0_CH_CTLL ----------------------------- */ +#define GPDMA0_CH_CTLL_INT_EN_Pos (0UL) /*!< GPDMA0_CH0_1 CTLL: INT_EN (Bit 0) */ +#define GPDMA0_CH_CTLL_INT_EN_Msk (0x1UL) /*!< GPDMA0_CH0_1 CTLL: INT_EN (Bitfield-Mask: 0x01) */ +#define GPDMA0_CH_CTLL_DST_TR_WIDTH_Pos (1UL) /*!< GPDMA0_CH0_1 CTLL: DST_TR_WIDTH (Bit 1) */ +#define GPDMA0_CH_CTLL_DST_TR_WIDTH_Msk (0xeUL) /*!< GPDMA0_CH0_1 CTLL: DST_TR_WIDTH (Bitfield-Mask: 0x07) */ +#define GPDMA0_CH_CTLL_SRC_TR_WIDTH_Pos (4UL) /*!< GPDMA0_CH0_1 CTLL: SRC_TR_WIDTH (Bit 4) */ +#define GPDMA0_CH_CTLL_SRC_TR_WIDTH_Msk (0x70UL) /*!< GPDMA0_CH0_1 CTLL: SRC_TR_WIDTH (Bitfield-Mask: 0x07) */ +#define GPDMA0_CH_CTLL_DINC_Pos (7UL) /*!< GPDMA0_CH0_1 CTLL: DINC (Bit 7) */ +#define GPDMA0_CH_CTLL_DINC_Msk (0x180UL) /*!< GPDMA0_CH0_1 CTLL: DINC (Bitfield-Mask: 0x03) */ +#define GPDMA0_CH_CTLL_SINC_Pos (9UL) /*!< GPDMA0_CH0_1 CTLL: SINC (Bit 9) */ +#define GPDMA0_CH_CTLL_SINC_Msk (0x600UL) /*!< GPDMA0_CH0_1 CTLL: SINC (Bitfield-Mask: 0x03) */ +#define GPDMA0_CH_CTLL_DEST_MSIZE_Pos (11UL) /*!< GPDMA0_CH0_1 CTLL: DEST_MSIZE (Bit 11) */ +#define GPDMA0_CH_CTLL_DEST_MSIZE_Msk (0x3800UL) /*!< GPDMA0_CH0_1 CTLL: DEST_MSIZE (Bitfield-Mask: 0x07) */ +#define GPDMA0_CH_CTLL_SRC_MSIZE_Pos (14UL) /*!< GPDMA0_CH0_1 CTLL: SRC_MSIZE (Bit 14) */ +#define GPDMA0_CH_CTLL_SRC_MSIZE_Msk (0x1c000UL) /*!< GPDMA0_CH0_1 CTLL: SRC_MSIZE (Bitfield-Mask: 0x07) */ +#define GPDMA0_CH_CTLL_SRC_GATHER_EN_Pos (17UL) /*!< GPDMA0_CH0_1 CTLL: SRC_GATHER_EN (Bit 17) */ +#define GPDMA0_CH_CTLL_SRC_GATHER_EN_Msk (0x20000UL) /*!< GPDMA0_CH0_1 CTLL: SRC_GATHER_EN (Bitfield-Mask: 0x01) */ +#define GPDMA0_CH_CTLL_DST_SCATTER_EN_Pos (18UL) /*!< GPDMA0_CH0_1 CTLL: DST_SCATTER_EN (Bit 18) */ +#define GPDMA0_CH_CTLL_DST_SCATTER_EN_Msk (0x40000UL) /*!< GPDMA0_CH0_1 CTLL: DST_SCATTER_EN (Bitfield-Mask: 0x01) */ +#define GPDMA0_CH_CTLL_TT_FC_Pos (20UL) /*!< GPDMA0_CH0_1 CTLL: TT_FC (Bit 20) */ +#define GPDMA0_CH_CTLL_TT_FC_Msk (0x700000UL) /*!< GPDMA0_CH0_1 CTLL: TT_FC (Bitfield-Mask: 0x07) */ +#define GPDMA0_CH_CTLL_LLP_DST_EN_Pos (27UL) /*!< GPDMA0_CH0_1 CTLL: LLP_DST_EN (Bit 27) */ +#define GPDMA0_CH_CTLL_LLP_DST_EN_Msk (0x8000000UL) /*!< GPDMA0_CH0_1 CTLL: LLP_DST_EN (Bitfield-Mask: 0x01) */ +#define GPDMA0_CH_CTLL_LLP_SRC_EN_Pos (28UL) /*!< GPDMA0_CH0_1 CTLL: LLP_SRC_EN (Bit 28) */ +#define GPDMA0_CH_CTLL_LLP_SRC_EN_Msk (0x10000000UL) /*!< GPDMA0_CH0_1 CTLL: LLP_SRC_EN (Bitfield-Mask: 0x01) */ + +/* ------------------------------ GPDMA0_CH_CTLH ----------------------------- */ +#define GPDMA0_CH_CTLH_BLOCK_TS_Pos (0UL) /*!< GPDMA0_CH0_1 CTLH: BLOCK_TS (Bit 0) */ +#define GPDMA0_CH_CTLH_BLOCK_TS_Msk (0xfffUL) /*!< GPDMA0_CH0_1 CTLH: BLOCK_TS (Bitfield-Mask: 0xfff) */ +#define GPDMA0_CH_CTLH_DONE_Pos (12UL) /*!< GPDMA0_CH0_1 CTLH: DONE (Bit 12) */ +#define GPDMA0_CH_CTLH_DONE_Msk (0x1000UL) /*!< GPDMA0_CH0_1 CTLH: DONE (Bitfield-Mask: 0x01) */ + +/* ----------------------------- GPDMA0_CH_SSTAT ----------------------------- */ +#define GPDMA0_CH_SSTAT_SSTAT_Pos (0UL) /*!< GPDMA0_CH0_1 SSTAT: SSTAT (Bit 0) */ +#define GPDMA0_CH_SSTAT_SSTAT_Msk (0xffffffffUL) /*!< GPDMA0_CH0_1 SSTAT: SSTAT (Bitfield-Mask: 0xffffffff) */ + +/* ----------------------------- GPDMA0_CH_DSTAT ----------------------------- */ +#define GPDMA0_CH_DSTAT_DSTAT_Pos (0UL) /*!< GPDMA0_CH0_1 DSTAT: DSTAT (Bit 0) */ +#define GPDMA0_CH_DSTAT_DSTAT_Msk (0xffffffffUL) /*!< GPDMA0_CH0_1 DSTAT: DSTAT (Bitfield-Mask: 0xffffffff) */ + +/* ---------------------------- GPDMA0_CH_SSTATAR ---------------------------- */ +#define GPDMA0_CH_SSTATAR_SSTATAR_Pos (0UL) /*!< GPDMA0_CH0_1 SSTATAR: SSTATAR (Bit 0) */ +#define GPDMA0_CH_SSTATAR_SSTATAR_Msk (0xffffffffUL) /*!< GPDMA0_CH0_1 SSTATAR: SSTATAR (Bitfield-Mask: 0xffffffff) */ + +/* ---------------------------- GPDMA0_CH_DSTATAR ---------------------------- */ +#define GPDMA0_CH_DSTATAR_DSTATAR_Pos (0UL) /*!< GPDMA0_CH0_1 DSTATAR: DSTATAR (Bit 0) */ +#define GPDMA0_CH_DSTATAR_DSTATAR_Msk (0xffffffffUL) /*!< GPDMA0_CH0_1 DSTATAR: DSTATAR (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------------ GPDMA0_CH_CFGL ----------------------------- */ +#define GPDMA0_CH_CFGL_CH_PRIOR_Pos (5UL) /*!< GPDMA0_CH0_1 CFGL: CH_PRIOR (Bit 5) */ +#define GPDMA0_CH_CFGL_CH_PRIOR_Msk (0xe0UL) /*!< GPDMA0_CH0_1 CFGL: CH_PRIOR (Bitfield-Mask: 0x07) */ +#define GPDMA0_CH_CFGL_CH_SUSP_Pos (8UL) /*!< GPDMA0_CH0_1 CFGL: CH_SUSP (Bit 8) */ +#define GPDMA0_CH_CFGL_CH_SUSP_Msk (0x100UL) /*!< GPDMA0_CH0_1 CFGL: CH_SUSP (Bitfield-Mask: 0x01) */ +#define GPDMA0_CH_CFGL_FIFO_EMPTY_Pos (9UL) /*!< GPDMA0_CH0_1 CFGL: FIFO_EMPTY (Bit 9) */ +#define GPDMA0_CH_CFGL_FIFO_EMPTY_Msk (0x200UL) /*!< GPDMA0_CH0_1 CFGL: FIFO_EMPTY (Bitfield-Mask: 0x01) */ +#define GPDMA0_CH_CFGL_HS_SEL_DST_Pos (10UL) /*!< GPDMA0_CH0_1 CFGL: HS_SEL_DST (Bit 10) */ +#define GPDMA0_CH_CFGL_HS_SEL_DST_Msk (0x400UL) /*!< GPDMA0_CH0_1 CFGL: HS_SEL_DST (Bitfield-Mask: 0x01) */ +#define GPDMA0_CH_CFGL_HS_SEL_SRC_Pos (11UL) /*!< GPDMA0_CH0_1 CFGL: HS_SEL_SRC (Bit 11) */ +#define GPDMA0_CH_CFGL_HS_SEL_SRC_Msk (0x800UL) /*!< GPDMA0_CH0_1 CFGL: HS_SEL_SRC (Bitfield-Mask: 0x01) */ +#define GPDMA0_CH_CFGL_LOCK_CH_L_Pos (12UL) /*!< GPDMA0_CH0_1 CFGL: LOCK_CH_L (Bit 12) */ +#define GPDMA0_CH_CFGL_LOCK_CH_L_Msk (0x3000UL) /*!< GPDMA0_CH0_1 CFGL: LOCK_CH_L (Bitfield-Mask: 0x03) */ +#define GPDMA0_CH_CFGL_LOCK_B_L_Pos (14UL) /*!< GPDMA0_CH0_1 CFGL: LOCK_B_L (Bit 14) */ +#define GPDMA0_CH_CFGL_LOCK_B_L_Msk (0xc000UL) /*!< GPDMA0_CH0_1 CFGL: LOCK_B_L (Bitfield-Mask: 0x03) */ +#define GPDMA0_CH_CFGL_LOCK_CH_Pos (16UL) /*!< GPDMA0_CH0_1 CFGL: LOCK_CH (Bit 16) */ +#define GPDMA0_CH_CFGL_LOCK_CH_Msk (0x10000UL) /*!< GPDMA0_CH0_1 CFGL: LOCK_CH (Bitfield-Mask: 0x01) */ +#define GPDMA0_CH_CFGL_LOCK_B_Pos (17UL) /*!< GPDMA0_CH0_1 CFGL: LOCK_B (Bit 17) */ +#define GPDMA0_CH_CFGL_LOCK_B_Msk (0x20000UL) /*!< GPDMA0_CH0_1 CFGL: LOCK_B (Bitfield-Mask: 0x01) */ +#define GPDMA0_CH_CFGL_DST_HS_POL_Pos (18UL) /*!< GPDMA0_CH0_1 CFGL: DST_HS_POL (Bit 18) */ +#define GPDMA0_CH_CFGL_DST_HS_POL_Msk (0x40000UL) /*!< GPDMA0_CH0_1 CFGL: DST_HS_POL (Bitfield-Mask: 0x01) */ +#define GPDMA0_CH_CFGL_SRC_HS_POL_Pos (19UL) /*!< GPDMA0_CH0_1 CFGL: SRC_HS_POL (Bit 19) */ +#define GPDMA0_CH_CFGL_SRC_HS_POL_Msk (0x80000UL) /*!< GPDMA0_CH0_1 CFGL: SRC_HS_POL (Bitfield-Mask: 0x01) */ +#define GPDMA0_CH_CFGL_MAX_ABRST_Pos (20UL) /*!< GPDMA0_CH0_1 CFGL: MAX_ABRST (Bit 20) */ +#define GPDMA0_CH_CFGL_MAX_ABRST_Msk (0x3ff00000UL) /*!< GPDMA0_CH0_1 CFGL: MAX_ABRST (Bitfield-Mask: 0x3ff) */ +#define GPDMA0_CH_CFGL_RELOAD_SRC_Pos (30UL) /*!< GPDMA0_CH0_1 CFGL: RELOAD_SRC (Bit 30) */ +#define GPDMA0_CH_CFGL_RELOAD_SRC_Msk (0x40000000UL) /*!< GPDMA0_CH0_1 CFGL: RELOAD_SRC (Bitfield-Mask: 0x01) */ +#define GPDMA0_CH_CFGL_RELOAD_DST_Pos (31UL) /*!< GPDMA0_CH0_1 CFGL: RELOAD_DST (Bit 31) */ +#define GPDMA0_CH_CFGL_RELOAD_DST_Msk (0x80000000UL) /*!< GPDMA0_CH0_1 CFGL: RELOAD_DST (Bitfield-Mask: 0x01) */ + +/* ------------------------------ GPDMA0_CH_CFGH ----------------------------- */ +#define GPDMA0_CH_CFGH_FCMODE_Pos (0UL) /*!< GPDMA0_CH0_1 CFGH: FCMODE (Bit 0) */ +#define GPDMA0_CH_CFGH_FCMODE_Msk (0x1UL) /*!< GPDMA0_CH0_1 CFGH: FCMODE (Bitfield-Mask: 0x01) */ +#define GPDMA0_CH_CFGH_FIFO_MODE_Pos (1UL) /*!< GPDMA0_CH0_1 CFGH: FIFO_MODE (Bit 1) */ +#define GPDMA0_CH_CFGH_FIFO_MODE_Msk (0x2UL) /*!< GPDMA0_CH0_1 CFGH: FIFO_MODE (Bitfield-Mask: 0x01) */ +#define GPDMA0_CH_CFGH_PROTCTL_Pos (2UL) /*!< GPDMA0_CH0_1 CFGH: PROTCTL (Bit 2) */ +#define GPDMA0_CH_CFGH_PROTCTL_Msk (0x1cUL) /*!< GPDMA0_CH0_1 CFGH: PROTCTL (Bitfield-Mask: 0x07) */ +#define GPDMA0_CH_CFGH_DS_UPD_EN_Pos (5UL) /*!< GPDMA0_CH0_1 CFGH: DS_UPD_EN (Bit 5) */ +#define GPDMA0_CH_CFGH_DS_UPD_EN_Msk (0x20UL) /*!< GPDMA0_CH0_1 CFGH: DS_UPD_EN (Bitfield-Mask: 0x01) */ +#define GPDMA0_CH_CFGH_SS_UPD_EN_Pos (6UL) /*!< GPDMA0_CH0_1 CFGH: SS_UPD_EN (Bit 6) */ +#define GPDMA0_CH_CFGH_SS_UPD_EN_Msk (0x40UL) /*!< GPDMA0_CH0_1 CFGH: SS_UPD_EN (Bitfield-Mask: 0x01) */ +#define GPDMA0_CH_CFGH_SRC_PER_Pos (7UL) /*!< GPDMA0_CH0_1 CFGH: SRC_PER (Bit 7) */ +#define GPDMA0_CH_CFGH_SRC_PER_Msk (0x780UL) /*!< GPDMA0_CH0_1 CFGH: SRC_PER (Bitfield-Mask: 0x0f) */ +#define GPDMA0_CH_CFGH_DEST_PER_Pos (11UL) /*!< GPDMA0_CH0_1 CFGH: DEST_PER (Bit 11) */ +#define GPDMA0_CH_CFGH_DEST_PER_Msk (0x7800UL) /*!< GPDMA0_CH0_1 CFGH: DEST_PER (Bitfield-Mask: 0x0f) */ + +/* ------------------------------ GPDMA0_CH_SGR ------------------------------ */ +#define GPDMA0_CH_SGR_SGI_Pos (0UL) /*!< GPDMA0_CH0_1 SGR: SGI (Bit 0) */ +#define GPDMA0_CH_SGR_SGI_Msk (0xfffffUL) /*!< GPDMA0_CH0_1 SGR: SGI (Bitfield-Mask: 0xfffff) */ +#define GPDMA0_CH_SGR_SGC_Pos (20UL) /*!< GPDMA0_CH0_1 SGR: SGC (Bit 20) */ +#define GPDMA0_CH_SGR_SGC_Msk (0xfff00000UL) /*!< GPDMA0_CH0_1 SGR: SGC (Bitfield-Mask: 0xfff) */ + +/* ------------------------------ GPDMA0_CH_DSR ------------------------------ */ +#define GPDMA0_CH_DSR_DSI_Pos (0UL) /*!< GPDMA0_CH0_1 DSR: DSI (Bit 0) */ +#define GPDMA0_CH_DSR_DSI_Msk (0xfffffUL) /*!< GPDMA0_CH0_1 DSR: DSI (Bitfield-Mask: 0xfffff) */ +#define GPDMA0_CH_DSR_DSC_Pos (20UL) /*!< GPDMA0_CH0_1 DSR: DSC (Bit 20) */ +#define GPDMA0_CH_DSR_DSC_Msk (0xfff00000UL) /*!< GPDMA0_CH0_1 DSR: DSC (Bitfield-Mask: 0xfff) */ + + +/* ================================================================================ */ +/* ================ struct 'FCE' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ----------------------------------- FCE_CLC ---------------------------------- */ +#define FCE_CLC_DISR_Pos (0UL) /*!< FCE CLC: DISR (Bit 0) */ +#define FCE_CLC_DISR_Msk (0x1UL) /*!< FCE CLC: DISR (Bitfield-Mask: 0x01) */ +#define FCE_CLC_DISS_Pos (1UL) /*!< FCE CLC: DISS (Bit 1) */ +#define FCE_CLC_DISS_Msk (0x2UL) /*!< FCE CLC: DISS (Bitfield-Mask: 0x01) */ + +/* ----------------------------------- FCE_ID ----------------------------------- */ +#define FCE_ID_MOD_REV_Pos (0UL) /*!< FCE ID: MOD_REV (Bit 0) */ +#define FCE_ID_MOD_REV_Msk (0xffUL) /*!< FCE ID: MOD_REV (Bitfield-Mask: 0xff) */ +#define FCE_ID_MOD_TYPE_Pos (8UL) /*!< FCE ID: MOD_TYPE (Bit 8) */ +#define FCE_ID_MOD_TYPE_Msk (0xff00UL) /*!< FCE ID: MOD_TYPE (Bitfield-Mask: 0xff) */ +#define FCE_ID_MOD_NUMBER_Pos (16UL) /*!< FCE ID: MOD_NUMBER (Bit 16) */ +#define FCE_ID_MOD_NUMBER_Msk (0xffff0000UL) /*!< FCE ID: MOD_NUMBER (Bitfield-Mask: 0xffff) */ + + +/* ================================================================================ */ +/* ================ Group 'FCE_KE' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ---------------------------------- FCE_KE_IR --------------------------------- */ +#define FCE_KE_IR_IR_Pos (0UL) /*!< FCE_KE IR: IR (Bit 0) */ +#define FCE_KE_IR_IR_Msk (0xffffffffUL) /*!< FCE_KE IR: IR (Bitfield-Mask: 0xffffffff) */ + +/* --------------------------------- FCE_KE_RES --------------------------------- */ +#define FCE_KE_RES_RES_Pos (0UL) /*!< FCE_KE RES: RES (Bit 0) */ +#define FCE_KE_RES_RES_Msk (0xffffffffUL) /*!< FCE_KE RES: RES (Bitfield-Mask: 0xffffffff) */ + +/* --------------------------------- FCE_KE_CFG --------------------------------- */ +#define FCE_KE_CFG_CMI_Pos (0UL) /*!< FCE_KE CFG: CMI (Bit 0) */ +#define FCE_KE_CFG_CMI_Msk (0x1UL) /*!< FCE_KE CFG: CMI (Bitfield-Mask: 0x01) */ +#define FCE_KE_CFG_CEI_Pos (1UL) /*!< FCE_KE CFG: CEI (Bit 1) */ +#define FCE_KE_CFG_CEI_Msk (0x2UL) /*!< FCE_KE CFG: CEI (Bitfield-Mask: 0x01) */ +#define FCE_KE_CFG_LEI_Pos (2UL) /*!< FCE_KE CFG: LEI (Bit 2) */ +#define FCE_KE_CFG_LEI_Msk (0x4UL) /*!< FCE_KE CFG: LEI (Bitfield-Mask: 0x01) */ +#define FCE_KE_CFG_BEI_Pos (3UL) /*!< FCE_KE CFG: BEI (Bit 3) */ +#define FCE_KE_CFG_BEI_Msk (0x8UL) /*!< FCE_KE CFG: BEI (Bitfield-Mask: 0x01) */ +#define FCE_KE_CFG_CCE_Pos (4UL) /*!< FCE_KE CFG: CCE (Bit 4) */ +#define FCE_KE_CFG_CCE_Msk (0x10UL) /*!< FCE_KE CFG: CCE (Bitfield-Mask: 0x01) */ +#define FCE_KE_CFG_ALR_Pos (5UL) /*!< FCE_KE CFG: ALR (Bit 5) */ +#define FCE_KE_CFG_ALR_Msk (0x20UL) /*!< FCE_KE CFG: ALR (Bitfield-Mask: 0x01) */ +#define FCE_KE_CFG_REFIN_Pos (8UL) /*!< FCE_KE CFG: REFIN (Bit 8) */ +#define FCE_KE_CFG_REFIN_Msk (0x100UL) /*!< FCE_KE CFG: REFIN (Bitfield-Mask: 0x01) */ +#define FCE_KE_CFG_REFOUT_Pos (9UL) /*!< FCE_KE CFG: REFOUT (Bit 9) */ +#define FCE_KE_CFG_REFOUT_Msk (0x200UL) /*!< FCE_KE CFG: REFOUT (Bitfield-Mask: 0x01) */ +#define FCE_KE_CFG_XSEL_Pos (10UL) /*!< FCE_KE CFG: XSEL (Bit 10) */ +#define FCE_KE_CFG_XSEL_Msk (0x400UL) /*!< FCE_KE CFG: XSEL (Bitfield-Mask: 0x01) */ + +/* --------------------------------- FCE_KE_STS --------------------------------- */ +#define FCE_KE_STS_CMF_Pos (0UL) /*!< FCE_KE STS: CMF (Bit 0) */ +#define FCE_KE_STS_CMF_Msk (0x1UL) /*!< FCE_KE STS: CMF (Bitfield-Mask: 0x01) */ +#define FCE_KE_STS_CEF_Pos (1UL) /*!< FCE_KE STS: CEF (Bit 1) */ +#define FCE_KE_STS_CEF_Msk (0x2UL) /*!< FCE_KE STS: CEF (Bitfield-Mask: 0x01) */ +#define FCE_KE_STS_LEF_Pos (2UL) /*!< FCE_KE STS: LEF (Bit 2) */ +#define FCE_KE_STS_LEF_Msk (0x4UL) /*!< FCE_KE STS: LEF (Bitfield-Mask: 0x01) */ +#define FCE_KE_STS_BEF_Pos (3UL) /*!< FCE_KE STS: BEF (Bit 3) */ +#define FCE_KE_STS_BEF_Msk (0x8UL) /*!< FCE_KE STS: BEF (Bitfield-Mask: 0x01) */ + +/* -------------------------------- FCE_KE_LENGTH ------------------------------- */ +#define FCE_KE_LENGTH_LENGTH_Pos (0UL) /*!< FCE_KE LENGTH: LENGTH (Bit 0) */ +#define FCE_KE_LENGTH_LENGTH_Msk (0xffffUL) /*!< FCE_KE LENGTH: LENGTH (Bitfield-Mask: 0xffff) */ + +/* -------------------------------- FCE_KE_CHECK -------------------------------- */ +#define FCE_KE_CHECK_CHECK_Pos (0UL) /*!< FCE_KE CHECK: CHECK (Bit 0) */ +#define FCE_KE_CHECK_CHECK_Msk (0xffffffffUL) /*!< FCE_KE CHECK: CHECK (Bitfield-Mask: 0xffffffff) */ + +/* --------------------------------- FCE_KE_CRC --------------------------------- */ +#define FCE_KE_CRC_CRC_Pos (0UL) /*!< FCE_KE CRC: CRC (Bit 0) */ +#define FCE_KE_CRC_CRC_Msk (0xffffffffUL) /*!< FCE_KE CRC: CRC (Bitfield-Mask: 0xffffffff) */ + +/* --------------------------------- FCE_KE_CTR --------------------------------- */ +#define FCE_KE_CTR_FCM_Pos (0UL) /*!< FCE_KE CTR: FCM (Bit 0) */ +#define FCE_KE_CTR_FCM_Msk (0x1UL) /*!< FCE_KE CTR: FCM (Bitfield-Mask: 0x01) */ +#define FCE_KE_CTR_FRM_CFG_Pos (1UL) /*!< FCE_KE CTR: FRM_CFG (Bit 1) */ +#define FCE_KE_CTR_FRM_CFG_Msk (0x2UL) /*!< FCE_KE CTR: FRM_CFG (Bitfield-Mask: 0x01) */ +#define FCE_KE_CTR_FRM_CHECK_Pos (2UL) /*!< FCE_KE CTR: FRM_CHECK (Bit 2) */ +#define FCE_KE_CTR_FRM_CHECK_Msk (0x4UL) /*!< FCE_KE CTR: FRM_CHECK (Bitfield-Mask: 0x01) */ + + +/* ================================================================================ */ +/* ================ Group 'PBA' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ----------------------------------- PBA_STS ---------------------------------- */ +#define PBA_STS_WERR_Pos (0UL) /*!< PBA STS: WERR (Bit 0) */ +#define PBA_STS_WERR_Msk (0x1UL) /*!< PBA STS: WERR (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- PBA_WADDR --------------------------------- */ +#define PBA_WADDR_WADDR_Pos (0UL) /*!< PBA WADDR: WADDR (Bit 0) */ +#define PBA_WADDR_WADDR_Msk (0xffffffffUL) /*!< PBA WADDR: WADDR (Bitfield-Mask: 0xffffffff) */ + + +/* ================================================================================ */ +/* ================ Group 'FLASH' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ---------------------------------- FLASH_ID ---------------------------------- */ +#define FLASH_ID_MOD_REV_Pos (0UL) /*!< FLASH ID: MOD_REV (Bit 0) */ +#define FLASH_ID_MOD_REV_Msk (0xffUL) /*!< FLASH ID: MOD_REV (Bitfield-Mask: 0xff) */ +#define FLASH_ID_MOD_TYPE_Pos (8UL) /*!< FLASH ID: MOD_TYPE (Bit 8) */ +#define FLASH_ID_MOD_TYPE_Msk (0xff00UL) /*!< FLASH ID: MOD_TYPE (Bitfield-Mask: 0xff) */ +#define FLASH_ID_MOD_NUMBER_Pos (16UL) /*!< FLASH ID: MOD_NUMBER (Bit 16) */ +#define FLASH_ID_MOD_NUMBER_Msk (0xffff0000UL) /*!< FLASH ID: MOD_NUMBER (Bitfield-Mask: 0xffff) */ + +/* ---------------------------------- FLASH_FSR --------------------------------- */ +#define FLASH_FSR_PBUSY_Pos (0UL) /*!< FLASH FSR: PBUSY (Bit 0) */ +#define FLASH_FSR_PBUSY_Msk (0x1UL) /*!< FLASH FSR: PBUSY (Bitfield-Mask: 0x01) */ +#define FLASH_FSR_FABUSY_Pos (1UL) /*!< FLASH FSR: FABUSY (Bit 1) */ +#define FLASH_FSR_FABUSY_Msk (0x2UL) /*!< FLASH FSR: FABUSY (Bitfield-Mask: 0x01) */ +#define FLASH_FSR_PROG_Pos (4UL) /*!< FLASH FSR: PROG (Bit 4) */ +#define FLASH_FSR_PROG_Msk (0x10UL) /*!< FLASH FSR: PROG (Bitfield-Mask: 0x01) */ +#define FLASH_FSR_ERASE_Pos (5UL) /*!< FLASH FSR: ERASE (Bit 5) */ +#define FLASH_FSR_ERASE_Msk (0x20UL) /*!< FLASH FSR: ERASE (Bitfield-Mask: 0x01) */ +#define FLASH_FSR_PFPAGE_Pos (6UL) /*!< FLASH FSR: PFPAGE (Bit 6) */ +#define FLASH_FSR_PFPAGE_Msk (0x40UL) /*!< FLASH FSR: PFPAGE (Bitfield-Mask: 0x01) */ +#define FLASH_FSR_PFOPER_Pos (8UL) /*!< FLASH FSR: PFOPER (Bit 8) */ +#define FLASH_FSR_PFOPER_Msk (0x100UL) /*!< FLASH FSR: PFOPER (Bitfield-Mask: 0x01) */ +#define FLASH_FSR_SQER_Pos (10UL) /*!< FLASH FSR: SQER (Bit 10) */ +#define FLASH_FSR_SQER_Msk (0x400UL) /*!< FLASH FSR: SQER (Bitfield-Mask: 0x01) */ +#define FLASH_FSR_PROER_Pos (11UL) /*!< FLASH FSR: PROER (Bit 11) */ +#define FLASH_FSR_PROER_Msk (0x800UL) /*!< FLASH FSR: PROER (Bitfield-Mask: 0x01) */ +#define FLASH_FSR_PFSBER_Pos (12UL) /*!< FLASH FSR: PFSBER (Bit 12) */ +#define FLASH_FSR_PFSBER_Msk (0x1000UL) /*!< FLASH FSR: PFSBER (Bitfield-Mask: 0x01) */ +#define FLASH_FSR_PFDBER_Pos (14UL) /*!< FLASH FSR: PFDBER (Bit 14) */ +#define FLASH_FSR_PFDBER_Msk (0x4000UL) /*!< FLASH FSR: PFDBER (Bitfield-Mask: 0x01) */ +#define FLASH_FSR_PROIN_Pos (16UL) /*!< FLASH FSR: PROIN (Bit 16) */ +#define FLASH_FSR_PROIN_Msk (0x10000UL) /*!< FLASH FSR: PROIN (Bitfield-Mask: 0x01) */ +#define FLASH_FSR_RPROIN_Pos (18UL) /*!< FLASH FSR: RPROIN (Bit 18) */ +#define FLASH_FSR_RPROIN_Msk (0x40000UL) /*!< FLASH FSR: RPROIN (Bitfield-Mask: 0x01) */ +#define FLASH_FSR_RPRODIS_Pos (19UL) /*!< FLASH FSR: RPRODIS (Bit 19) */ +#define FLASH_FSR_RPRODIS_Msk (0x80000UL) /*!< FLASH FSR: RPRODIS (Bitfield-Mask: 0x01) */ +#define FLASH_FSR_WPROIN0_Pos (21UL) /*!< FLASH FSR: WPROIN0 (Bit 21) */ +#define FLASH_FSR_WPROIN0_Msk (0x200000UL) /*!< FLASH FSR: WPROIN0 (Bitfield-Mask: 0x01) */ +#define FLASH_FSR_WPROIN1_Pos (22UL) /*!< FLASH FSR: WPROIN1 (Bit 22) */ +#define FLASH_FSR_WPROIN1_Msk (0x400000UL) /*!< FLASH FSR: WPROIN1 (Bitfield-Mask: 0x01) */ +#define FLASH_FSR_WPROIN2_Pos (23UL) /*!< FLASH FSR: WPROIN2 (Bit 23) */ +#define FLASH_FSR_WPROIN2_Msk (0x800000UL) /*!< FLASH FSR: WPROIN2 (Bitfield-Mask: 0x01) */ +#define FLASH_FSR_WPRODIS0_Pos (25UL) /*!< FLASH FSR: WPRODIS0 (Bit 25) */ +#define FLASH_FSR_WPRODIS0_Msk (0x2000000UL) /*!< FLASH FSR: WPRODIS0 (Bitfield-Mask: 0x01) */ +#define FLASH_FSR_WPRODIS1_Pos (26UL) /*!< FLASH FSR: WPRODIS1 (Bit 26) */ +#define FLASH_FSR_WPRODIS1_Msk (0x4000000UL) /*!< FLASH FSR: WPRODIS1 (Bitfield-Mask: 0x01) */ +#define FLASH_FSR_SLM_Pos (28UL) /*!< FLASH FSR: SLM (Bit 28) */ +#define FLASH_FSR_SLM_Msk (0x10000000UL) /*!< FLASH FSR: SLM (Bitfield-Mask: 0x01) */ +#define FLASH_FSR_VER_Pos (31UL) /*!< FLASH FSR: VER (Bit 31) */ +#define FLASH_FSR_VER_Msk (0x80000000UL) /*!< FLASH FSR: VER (Bitfield-Mask: 0x01) */ + +/* --------------------------------- FLASH_FCON --------------------------------- */ +#define FLASH_FCON_WSPFLASH_Pos (0UL) /*!< FLASH FCON: WSPFLASH (Bit 0) */ +#define FLASH_FCON_WSPFLASH_Msk (0xfUL) /*!< FLASH FCON: WSPFLASH (Bitfield-Mask: 0x0f) */ +#define FLASH_FCON_WSECPF_Pos (4UL) /*!< FLASH FCON: WSECPF (Bit 4) */ +#define FLASH_FCON_WSECPF_Msk (0x10UL) /*!< FLASH FCON: WSECPF (Bitfield-Mask: 0x01) */ +#define FLASH_FCON_IDLE_Pos (13UL) /*!< FLASH FCON: IDLE (Bit 13) */ +#define FLASH_FCON_IDLE_Msk (0x2000UL) /*!< FLASH FCON: IDLE (Bitfield-Mask: 0x01) */ +#define FLASH_FCON_ESLDIS_Pos (14UL) /*!< FLASH FCON: ESLDIS (Bit 14) */ +#define FLASH_FCON_ESLDIS_Msk (0x4000UL) /*!< FLASH FCON: ESLDIS (Bitfield-Mask: 0x01) */ +#define FLASH_FCON_SLEEP_Pos (15UL) /*!< FLASH FCON: SLEEP (Bit 15) */ +#define FLASH_FCON_SLEEP_Msk (0x8000UL) /*!< FLASH FCON: SLEEP (Bitfield-Mask: 0x01) */ +#define FLASH_FCON_RPA_Pos (16UL) /*!< FLASH FCON: RPA (Bit 16) */ +#define FLASH_FCON_RPA_Msk (0x10000UL) /*!< FLASH FCON: RPA (Bitfield-Mask: 0x01) */ +#define FLASH_FCON_DCF_Pos (17UL) /*!< FLASH FCON: DCF (Bit 17) */ +#define FLASH_FCON_DCF_Msk (0x20000UL) /*!< FLASH FCON: DCF (Bitfield-Mask: 0x01) */ +#define FLASH_FCON_DDF_Pos (18UL) /*!< FLASH FCON: DDF (Bit 18) */ +#define FLASH_FCON_DDF_Msk (0x40000UL) /*!< FLASH FCON: DDF (Bitfield-Mask: 0x01) */ +#define FLASH_FCON_VOPERM_Pos (24UL) /*!< FLASH FCON: VOPERM (Bit 24) */ +#define FLASH_FCON_VOPERM_Msk (0x1000000UL) /*!< FLASH FCON: VOPERM (Bitfield-Mask: 0x01) */ +#define FLASH_FCON_SQERM_Pos (25UL) /*!< FLASH FCON: SQERM (Bit 25) */ +#define FLASH_FCON_SQERM_Msk (0x2000000UL) /*!< FLASH FCON: SQERM (Bitfield-Mask: 0x01) */ +#define FLASH_FCON_PROERM_Pos (26UL) /*!< FLASH FCON: PROERM (Bit 26) */ +#define FLASH_FCON_PROERM_Msk (0x4000000UL) /*!< FLASH FCON: PROERM (Bitfield-Mask: 0x01) */ +#define FLASH_FCON_PFSBERM_Pos (27UL) /*!< FLASH FCON: PFSBERM (Bit 27) */ +#define FLASH_FCON_PFSBERM_Msk (0x8000000UL) /*!< FLASH FCON: PFSBERM (Bitfield-Mask: 0x01) */ +#define FLASH_FCON_PFDBERM_Pos (29UL) /*!< FLASH FCON: PFDBERM (Bit 29) */ +#define FLASH_FCON_PFDBERM_Msk (0x20000000UL) /*!< FLASH FCON: PFDBERM (Bitfield-Mask: 0x01) */ +#define FLASH_FCON_EOBM_Pos (31UL) /*!< FLASH FCON: EOBM (Bit 31) */ +#define FLASH_FCON_EOBM_Msk (0x80000000UL) /*!< FLASH FCON: EOBM (Bitfield-Mask: 0x01) */ + +/* --------------------------------- FLASH_MARP --------------------------------- */ +#define FLASH_MARP_MARGIN_Pos (0UL) /*!< FLASH MARP: MARGIN (Bit 0) */ +#define FLASH_MARP_MARGIN_Msk (0xfUL) /*!< FLASH MARP: MARGIN (Bitfield-Mask: 0x0f) */ +#define FLASH_MARP_TRAPDIS_Pos (15UL) /*!< FLASH MARP: TRAPDIS (Bit 15) */ +#define FLASH_MARP_TRAPDIS_Msk (0x8000UL) /*!< FLASH MARP: TRAPDIS (Bitfield-Mask: 0x01) */ + +/* -------------------------------- FLASH_PROCON0 ------------------------------- */ +#define FLASH_PROCON0_S0L_Pos (0UL) /*!< FLASH PROCON0: S0L (Bit 0) */ +#define FLASH_PROCON0_S0L_Msk (0x1UL) /*!< FLASH PROCON0: S0L (Bitfield-Mask: 0x01) */ +#define FLASH_PROCON0_S1L_Pos (1UL) /*!< FLASH PROCON0: S1L (Bit 1) */ +#define FLASH_PROCON0_S1L_Msk (0x2UL) /*!< FLASH PROCON0: S1L (Bitfield-Mask: 0x01) */ +#define FLASH_PROCON0_S2L_Pos (2UL) /*!< FLASH PROCON0: S2L (Bit 2) */ +#define FLASH_PROCON0_S2L_Msk (0x4UL) /*!< FLASH PROCON0: S2L (Bitfield-Mask: 0x01) */ +#define FLASH_PROCON0_S3L_Pos (3UL) /*!< FLASH PROCON0: S3L (Bit 3) */ +#define FLASH_PROCON0_S3L_Msk (0x8UL) /*!< FLASH PROCON0: S3L (Bitfield-Mask: 0x01) */ +#define FLASH_PROCON0_S4L_Pos (4UL) /*!< FLASH PROCON0: S4L (Bit 4) */ +#define FLASH_PROCON0_S4L_Msk (0x10UL) /*!< FLASH PROCON0: S4L (Bitfield-Mask: 0x01) */ +#define FLASH_PROCON0_S5L_Pos (5UL) /*!< FLASH PROCON0: S5L (Bit 5) */ +#define FLASH_PROCON0_S5L_Msk (0x20UL) /*!< FLASH PROCON0: S5L (Bitfield-Mask: 0x01) */ +#define FLASH_PROCON0_S6L_Pos (6UL) /*!< FLASH PROCON0: S6L (Bit 6) */ +#define FLASH_PROCON0_S6L_Msk (0x40UL) /*!< FLASH PROCON0: S6L (Bitfield-Mask: 0x01) */ +#define FLASH_PROCON0_S7L_Pos (7UL) /*!< FLASH PROCON0: S7L (Bit 7) */ +#define FLASH_PROCON0_S7L_Msk (0x80UL) /*!< FLASH PROCON0: S7L (Bitfield-Mask: 0x01) */ +#define FLASH_PROCON0_S8L_Pos (8UL) /*!< FLASH PROCON0: S8L (Bit 8) */ +#define FLASH_PROCON0_S8L_Msk (0x100UL) /*!< FLASH PROCON0: S8L (Bitfield-Mask: 0x01) */ +#define FLASH_PROCON0_RPRO_Pos (15UL) /*!< FLASH PROCON0: RPRO (Bit 15) */ +#define FLASH_PROCON0_RPRO_Msk (0x8000UL) /*!< FLASH PROCON0: RPRO (Bitfield-Mask: 0x01) */ + +/* -------------------------------- FLASH_PROCON1 ------------------------------- */ +#define FLASH_PROCON1_S0L_Pos (0UL) /*!< FLASH PROCON1: S0L (Bit 0) */ +#define FLASH_PROCON1_S0L_Msk (0x1UL) /*!< FLASH PROCON1: S0L (Bitfield-Mask: 0x01) */ +#define FLASH_PROCON1_S1L_Pos (1UL) /*!< FLASH PROCON1: S1L (Bit 1) */ +#define FLASH_PROCON1_S1L_Msk (0x2UL) /*!< FLASH PROCON1: S1L (Bitfield-Mask: 0x01) */ +#define FLASH_PROCON1_S2L_Pos (2UL) /*!< FLASH PROCON1: S2L (Bit 2) */ +#define FLASH_PROCON1_S2L_Msk (0x4UL) /*!< FLASH PROCON1: S2L (Bitfield-Mask: 0x01) */ +#define FLASH_PROCON1_S3L_Pos (3UL) /*!< FLASH PROCON1: S3L (Bit 3) */ +#define FLASH_PROCON1_S3L_Msk (0x8UL) /*!< FLASH PROCON1: S3L (Bitfield-Mask: 0x01) */ +#define FLASH_PROCON1_S4L_Pos (4UL) /*!< FLASH PROCON1: S4L (Bit 4) */ +#define FLASH_PROCON1_S4L_Msk (0x10UL) /*!< FLASH PROCON1: S4L (Bitfield-Mask: 0x01) */ +#define FLASH_PROCON1_S5L_Pos (5UL) /*!< FLASH PROCON1: S5L (Bit 5) */ +#define FLASH_PROCON1_S5L_Msk (0x20UL) /*!< FLASH PROCON1: S5L (Bitfield-Mask: 0x01) */ +#define FLASH_PROCON1_S6L_Pos (6UL) /*!< FLASH PROCON1: S6L (Bit 6) */ +#define FLASH_PROCON1_S6L_Msk (0x40UL) /*!< FLASH PROCON1: S6L (Bitfield-Mask: 0x01) */ +#define FLASH_PROCON1_S7L_Pos (7UL) /*!< FLASH PROCON1: S7L (Bit 7) */ +#define FLASH_PROCON1_S7L_Msk (0x80UL) /*!< FLASH PROCON1: S7L (Bitfield-Mask: 0x01) */ +#define FLASH_PROCON1_S8L_Pos (8UL) /*!< FLASH PROCON1: S8L (Bit 8) */ +#define FLASH_PROCON1_S8L_Msk (0x100UL) /*!< FLASH PROCON1: S8L (Bitfield-Mask: 0x01) */ + +/* -------------------------------- FLASH_PROCON2 ------------------------------- */ +#define FLASH_PROCON2_S0ROM_Pos (0UL) /*!< FLASH PROCON2: S0ROM (Bit 0) */ +#define FLASH_PROCON2_S0ROM_Msk (0x1UL) /*!< FLASH PROCON2: S0ROM (Bitfield-Mask: 0x01) */ +#define FLASH_PROCON2_S1ROM_Pos (1UL) /*!< FLASH PROCON2: S1ROM (Bit 1) */ +#define FLASH_PROCON2_S1ROM_Msk (0x2UL) /*!< FLASH PROCON2: S1ROM (Bitfield-Mask: 0x01) */ +#define FLASH_PROCON2_S2ROM_Pos (2UL) /*!< FLASH PROCON2: S2ROM (Bit 2) */ +#define FLASH_PROCON2_S2ROM_Msk (0x4UL) /*!< FLASH PROCON2: S2ROM (Bitfield-Mask: 0x01) */ +#define FLASH_PROCON2_S3ROM_Pos (3UL) /*!< FLASH PROCON2: S3ROM (Bit 3) */ +#define FLASH_PROCON2_S3ROM_Msk (0x8UL) /*!< FLASH PROCON2: S3ROM (Bitfield-Mask: 0x01) */ +#define FLASH_PROCON2_S4ROM_Pos (4UL) /*!< FLASH PROCON2: S4ROM (Bit 4) */ +#define FLASH_PROCON2_S4ROM_Msk (0x10UL) /*!< FLASH PROCON2: S4ROM (Bitfield-Mask: 0x01) */ +#define FLASH_PROCON2_S5ROM_Pos (5UL) /*!< FLASH PROCON2: S5ROM (Bit 5) */ +#define FLASH_PROCON2_S5ROM_Msk (0x20UL) /*!< FLASH PROCON2: S5ROM (Bitfield-Mask: 0x01) */ +#define FLASH_PROCON2_S6ROM_Pos (6UL) /*!< FLASH PROCON2: S6ROM (Bit 6) */ +#define FLASH_PROCON2_S6ROM_Msk (0x40UL) /*!< FLASH PROCON2: S6ROM (Bitfield-Mask: 0x01) */ +#define FLASH_PROCON2_S7ROM_Pos (7UL) /*!< FLASH PROCON2: S7ROM (Bit 7) */ +#define FLASH_PROCON2_S7ROM_Msk (0x80UL) /*!< FLASH PROCON2: S7ROM (Bitfield-Mask: 0x01) */ +#define FLASH_PROCON2_S8ROM_Pos (8UL) /*!< FLASH PROCON2: S8ROM (Bit 8) */ +#define FLASH_PROCON2_S8ROM_Msk (0x100UL) /*!< FLASH PROCON2: S8ROM (Bitfield-Mask: 0x01) */ + + +/* ================================================================================ */ +/* ================ struct 'PREF' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ---------------------------------- PREF_PCON --------------------------------- */ +#define PREF_PCON_IBYP_Pos (0UL) /*!< PREF PCON: IBYP (Bit 0) */ +#define PREF_PCON_IBYP_Msk (0x1UL) /*!< PREF PCON: IBYP (Bitfield-Mask: 0x01) */ +#define PREF_PCON_IINV_Pos (1UL) /*!< PREF PCON: IINV (Bit 1) */ +#define PREF_PCON_IINV_Msk (0x2UL) /*!< PREF PCON: IINV (Bitfield-Mask: 0x01) */ +#define PREF_PCON_DBYP_Pos (4UL) /*!< PREF PCON: DBYP (Bit 4) */ +#define PREF_PCON_DBYP_Msk (0x10UL) /*!< PREF PCON: DBYP (Bitfield-Mask: 0x01) */ + + +/* ================================================================================ */ +/* ================ Group 'PMU' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ----------------------------------- PMU_ID ----------------------------------- */ +#define PMU_ID_MOD_REV_Pos (0UL) /*!< PMU ID: MOD_REV (Bit 0) */ +#define PMU_ID_MOD_REV_Msk (0xffUL) /*!< PMU ID: MOD_REV (Bitfield-Mask: 0xff) */ +#define PMU_ID_MOD_TYPE_Pos (8UL) /*!< PMU ID: MOD_TYPE (Bit 8) */ +#define PMU_ID_MOD_TYPE_Msk (0xff00UL) /*!< PMU ID: MOD_TYPE (Bitfield-Mask: 0xff) */ +#define PMU_ID_MOD_NUMBER_Pos (16UL) /*!< PMU ID: MOD_NUMBER (Bit 16) */ +#define PMU_ID_MOD_NUMBER_Msk (0xffff0000UL) /*!< PMU ID: MOD_NUMBER (Bitfield-Mask: 0xffff) */ + + +/* ================================================================================ */ +/* ================ struct 'WDT' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ----------------------------------- WDT_ID ----------------------------------- */ +#define WDT_ID_MOD_REV_Pos (0UL) /*!< WDT ID: MOD_REV (Bit 0) */ +#define WDT_ID_MOD_REV_Msk (0xffUL) /*!< WDT ID: MOD_REV (Bitfield-Mask: 0xff) */ +#define WDT_ID_MOD_TYPE_Pos (8UL) /*!< WDT ID: MOD_TYPE (Bit 8) */ +#define WDT_ID_MOD_TYPE_Msk (0xff00UL) /*!< WDT ID: MOD_TYPE (Bitfield-Mask: 0xff) */ +#define WDT_ID_MOD_NUMBER_Pos (16UL) /*!< WDT ID: MOD_NUMBER (Bit 16) */ +#define WDT_ID_MOD_NUMBER_Msk (0xffff0000UL) /*!< WDT ID: MOD_NUMBER (Bitfield-Mask: 0xffff) */ + +/* ----------------------------------- WDT_CTR ---------------------------------- */ +#define WDT_CTR_ENB_Pos (0UL) /*!< WDT CTR: ENB (Bit 0) */ +#define WDT_CTR_ENB_Msk (0x1UL) /*!< WDT CTR: ENB (Bitfield-Mask: 0x01) */ +#define WDT_CTR_PRE_Pos (1UL) /*!< WDT CTR: PRE (Bit 1) */ +#define WDT_CTR_PRE_Msk (0x2UL) /*!< WDT CTR: PRE (Bitfield-Mask: 0x01) */ +#define WDT_CTR_DSP_Pos (4UL) /*!< WDT CTR: DSP (Bit 4) */ +#define WDT_CTR_DSP_Msk (0x10UL) /*!< WDT CTR: DSP (Bitfield-Mask: 0x01) */ +#define WDT_CTR_SPW_Pos (8UL) /*!< WDT CTR: SPW (Bit 8) */ +#define WDT_CTR_SPW_Msk (0xff00UL) /*!< WDT CTR: SPW (Bitfield-Mask: 0xff) */ + +/* ----------------------------------- WDT_SRV ---------------------------------- */ +#define WDT_SRV_SRV_Pos (0UL) /*!< WDT SRV: SRV (Bit 0) */ +#define WDT_SRV_SRV_Msk (0xffffffffUL) /*!< WDT SRV: SRV (Bitfield-Mask: 0xffffffff) */ + +/* ----------------------------------- WDT_TIM ---------------------------------- */ +#define WDT_TIM_TIM_Pos (0UL) /*!< WDT TIM: TIM (Bit 0) */ +#define WDT_TIM_TIM_Msk (0xffffffffUL) /*!< WDT TIM: TIM (Bitfield-Mask: 0xffffffff) */ + +/* ----------------------------------- WDT_WLB ---------------------------------- */ +#define WDT_WLB_WLB_Pos (0UL) /*!< WDT WLB: WLB (Bit 0) */ +#define WDT_WLB_WLB_Msk (0xffffffffUL) /*!< WDT WLB: WLB (Bitfield-Mask: 0xffffffff) */ + +/* ----------------------------------- WDT_WUB ---------------------------------- */ +#define WDT_WUB_WUB_Pos (0UL) /*!< WDT WUB: WUB (Bit 0) */ +#define WDT_WUB_WUB_Msk (0xffffffffUL) /*!< WDT WUB: WUB (Bitfield-Mask: 0xffffffff) */ + +/* --------------------------------- WDT_WDTSTS --------------------------------- */ +#define WDT_WDTSTS_ALMS_Pos (0UL) /*!< WDT WDTSTS: ALMS (Bit 0) */ +#define WDT_WDTSTS_ALMS_Msk (0x1UL) /*!< WDT WDTSTS: ALMS (Bitfield-Mask: 0x01) */ + +/* --------------------------------- WDT_WDTCLR --------------------------------- */ +#define WDT_WDTCLR_ALMC_Pos (0UL) /*!< WDT WDTCLR: ALMC (Bit 0) */ +#define WDT_WDTCLR_ALMC_Msk (0x1UL) /*!< WDT WDTCLR: ALMC (Bitfield-Mask: 0x01) */ + + +/* ================================================================================ */ +/* ================ struct 'RTC' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ----------------------------------- RTC_ID ----------------------------------- */ +#define RTC_ID_MOD_REV_Pos (0UL) /*!< RTC ID: MOD_REV (Bit 0) */ +#define RTC_ID_MOD_REV_Msk (0xffUL) /*!< RTC ID: MOD_REV (Bitfield-Mask: 0xff) */ +#define RTC_ID_MOD_TYPE_Pos (8UL) /*!< RTC ID: MOD_TYPE (Bit 8) */ +#define RTC_ID_MOD_TYPE_Msk (0xff00UL) /*!< RTC ID: MOD_TYPE (Bitfield-Mask: 0xff) */ +#define RTC_ID_MOD_NUMBER_Pos (16UL) /*!< RTC ID: MOD_NUMBER (Bit 16) */ +#define RTC_ID_MOD_NUMBER_Msk (0xffff0000UL) /*!< RTC ID: MOD_NUMBER (Bitfield-Mask: 0xffff) */ + +/* ----------------------------------- RTC_CTR ---------------------------------- */ +#define RTC_CTR_ENB_Pos (0UL) /*!< RTC CTR: ENB (Bit 0) */ +#define RTC_CTR_ENB_Msk (0x1UL) /*!< RTC CTR: ENB (Bitfield-Mask: 0x01) */ +#define RTC_CTR_TAE_Pos (2UL) /*!< RTC CTR: TAE (Bit 2) */ +#define RTC_CTR_TAE_Msk (0x4UL) /*!< RTC CTR: TAE (Bitfield-Mask: 0x01) */ +#define RTC_CTR_ESEC_Pos (8UL) /*!< RTC CTR: ESEC (Bit 8) */ +#define RTC_CTR_ESEC_Msk (0x100UL) /*!< RTC CTR: ESEC (Bitfield-Mask: 0x01) */ +#define RTC_CTR_EMIC_Pos (9UL) /*!< RTC CTR: EMIC (Bit 9) */ +#define RTC_CTR_EMIC_Msk (0x200UL) /*!< RTC CTR: EMIC (Bitfield-Mask: 0x01) */ +#define RTC_CTR_EHOC_Pos (10UL) /*!< RTC CTR: EHOC (Bit 10) */ +#define RTC_CTR_EHOC_Msk (0x400UL) /*!< RTC CTR: EHOC (Bitfield-Mask: 0x01) */ +#define RTC_CTR_EDAC_Pos (11UL) /*!< RTC CTR: EDAC (Bit 11) */ +#define RTC_CTR_EDAC_Msk (0x800UL) /*!< RTC CTR: EDAC (Bitfield-Mask: 0x01) */ +#define RTC_CTR_EMOC_Pos (13UL) /*!< RTC CTR: EMOC (Bit 13) */ +#define RTC_CTR_EMOC_Msk (0x2000UL) /*!< RTC CTR: EMOC (Bitfield-Mask: 0x01) */ +#define RTC_CTR_EYEC_Pos (14UL) /*!< RTC CTR: EYEC (Bit 14) */ +#define RTC_CTR_EYEC_Msk (0x4000UL) /*!< RTC CTR: EYEC (Bitfield-Mask: 0x01) */ +#define RTC_CTR_DIV_Pos (16UL) /*!< RTC CTR: DIV (Bit 16) */ +#define RTC_CTR_DIV_Msk (0xffff0000UL) /*!< RTC CTR: DIV (Bitfield-Mask: 0xffff) */ + +/* --------------------------------- RTC_RAWSTAT -------------------------------- */ +#define RTC_RAWSTAT_RPSE_Pos (0UL) /*!< RTC RAWSTAT: RPSE (Bit 0) */ +#define RTC_RAWSTAT_RPSE_Msk (0x1UL) /*!< RTC RAWSTAT: RPSE (Bitfield-Mask: 0x01) */ +#define RTC_RAWSTAT_RPMI_Pos (1UL) /*!< RTC RAWSTAT: RPMI (Bit 1) */ +#define RTC_RAWSTAT_RPMI_Msk (0x2UL) /*!< RTC RAWSTAT: RPMI (Bitfield-Mask: 0x01) */ +#define RTC_RAWSTAT_RPHO_Pos (2UL) /*!< RTC RAWSTAT: RPHO (Bit 2) */ +#define RTC_RAWSTAT_RPHO_Msk (0x4UL) /*!< RTC RAWSTAT: RPHO (Bitfield-Mask: 0x01) */ +#define RTC_RAWSTAT_RPDA_Pos (3UL) /*!< RTC RAWSTAT: RPDA (Bit 3) */ +#define RTC_RAWSTAT_RPDA_Msk (0x8UL) /*!< RTC RAWSTAT: RPDA (Bitfield-Mask: 0x01) */ +#define RTC_RAWSTAT_RPMO_Pos (5UL) /*!< RTC RAWSTAT: RPMO (Bit 5) */ +#define RTC_RAWSTAT_RPMO_Msk (0x20UL) /*!< RTC RAWSTAT: RPMO (Bitfield-Mask: 0x01) */ +#define RTC_RAWSTAT_RPYE_Pos (6UL) /*!< RTC RAWSTAT: RPYE (Bit 6) */ +#define RTC_RAWSTAT_RPYE_Msk (0x40UL) /*!< RTC RAWSTAT: RPYE (Bitfield-Mask: 0x01) */ +#define RTC_RAWSTAT_RAI_Pos (8UL) /*!< RTC RAWSTAT: RAI (Bit 8) */ +#define RTC_RAWSTAT_RAI_Msk (0x100UL) /*!< RTC RAWSTAT: RAI (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- RTC_STSSR --------------------------------- */ +#define RTC_STSSR_SPSE_Pos (0UL) /*!< RTC STSSR: SPSE (Bit 0) */ +#define RTC_STSSR_SPSE_Msk (0x1UL) /*!< RTC STSSR: SPSE (Bitfield-Mask: 0x01) */ +#define RTC_STSSR_SPMI_Pos (1UL) /*!< RTC STSSR: SPMI (Bit 1) */ +#define RTC_STSSR_SPMI_Msk (0x2UL) /*!< RTC STSSR: SPMI (Bitfield-Mask: 0x01) */ +#define RTC_STSSR_SPHO_Pos (2UL) /*!< RTC STSSR: SPHO (Bit 2) */ +#define RTC_STSSR_SPHO_Msk (0x4UL) /*!< RTC STSSR: SPHO (Bitfield-Mask: 0x01) */ +#define RTC_STSSR_SPDA_Pos (3UL) /*!< RTC STSSR: SPDA (Bit 3) */ +#define RTC_STSSR_SPDA_Msk (0x8UL) /*!< RTC STSSR: SPDA (Bitfield-Mask: 0x01) */ +#define RTC_STSSR_SPMO_Pos (5UL) /*!< RTC STSSR: SPMO (Bit 5) */ +#define RTC_STSSR_SPMO_Msk (0x20UL) /*!< RTC STSSR: SPMO (Bitfield-Mask: 0x01) */ +#define RTC_STSSR_SPYE_Pos (6UL) /*!< RTC STSSR: SPYE (Bit 6) */ +#define RTC_STSSR_SPYE_Msk (0x40UL) /*!< RTC STSSR: SPYE (Bitfield-Mask: 0x01) */ +#define RTC_STSSR_SAI_Pos (8UL) /*!< RTC STSSR: SAI (Bit 8) */ +#define RTC_STSSR_SAI_Msk (0x100UL) /*!< RTC STSSR: SAI (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- RTC_MSKSR --------------------------------- */ +#define RTC_MSKSR_MPSE_Pos (0UL) /*!< RTC MSKSR: MPSE (Bit 0) */ +#define RTC_MSKSR_MPSE_Msk (0x1UL) /*!< RTC MSKSR: MPSE (Bitfield-Mask: 0x01) */ +#define RTC_MSKSR_MPMI_Pos (1UL) /*!< RTC MSKSR: MPMI (Bit 1) */ +#define RTC_MSKSR_MPMI_Msk (0x2UL) /*!< RTC MSKSR: MPMI (Bitfield-Mask: 0x01) */ +#define RTC_MSKSR_MPHO_Pos (2UL) /*!< RTC MSKSR: MPHO (Bit 2) */ +#define RTC_MSKSR_MPHO_Msk (0x4UL) /*!< RTC MSKSR: MPHO (Bitfield-Mask: 0x01) */ +#define RTC_MSKSR_MPDA_Pos (3UL) /*!< RTC MSKSR: MPDA (Bit 3) */ +#define RTC_MSKSR_MPDA_Msk (0x8UL) /*!< RTC MSKSR: MPDA (Bitfield-Mask: 0x01) */ +#define RTC_MSKSR_MPMO_Pos (5UL) /*!< RTC MSKSR: MPMO (Bit 5) */ +#define RTC_MSKSR_MPMO_Msk (0x20UL) /*!< RTC MSKSR: MPMO (Bitfield-Mask: 0x01) */ +#define RTC_MSKSR_MPYE_Pos (6UL) /*!< RTC MSKSR: MPYE (Bit 6) */ +#define RTC_MSKSR_MPYE_Msk (0x40UL) /*!< RTC MSKSR: MPYE (Bitfield-Mask: 0x01) */ +#define RTC_MSKSR_MAI_Pos (8UL) /*!< RTC MSKSR: MAI (Bit 8) */ +#define RTC_MSKSR_MAI_Msk (0x100UL) /*!< RTC MSKSR: MAI (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- RTC_CLRSR --------------------------------- */ +#define RTC_CLRSR_RPSE_Pos (0UL) /*!< RTC CLRSR: RPSE (Bit 0) */ +#define RTC_CLRSR_RPSE_Msk (0x1UL) /*!< RTC CLRSR: RPSE (Bitfield-Mask: 0x01) */ +#define RTC_CLRSR_RPMI_Pos (1UL) /*!< RTC CLRSR: RPMI (Bit 1) */ +#define RTC_CLRSR_RPMI_Msk (0x2UL) /*!< RTC CLRSR: RPMI (Bitfield-Mask: 0x01) */ +#define RTC_CLRSR_RPHO_Pos (2UL) /*!< RTC CLRSR: RPHO (Bit 2) */ +#define RTC_CLRSR_RPHO_Msk (0x4UL) /*!< RTC CLRSR: RPHO (Bitfield-Mask: 0x01) */ +#define RTC_CLRSR_RPDA_Pos (3UL) /*!< RTC CLRSR: RPDA (Bit 3) */ +#define RTC_CLRSR_RPDA_Msk (0x8UL) /*!< RTC CLRSR: RPDA (Bitfield-Mask: 0x01) */ +#define RTC_CLRSR_RPMO_Pos (5UL) /*!< RTC CLRSR: RPMO (Bit 5) */ +#define RTC_CLRSR_RPMO_Msk (0x20UL) /*!< RTC CLRSR: RPMO (Bitfield-Mask: 0x01) */ +#define RTC_CLRSR_RPYE_Pos (6UL) /*!< RTC CLRSR: RPYE (Bit 6) */ +#define RTC_CLRSR_RPYE_Msk (0x40UL) /*!< RTC CLRSR: RPYE (Bitfield-Mask: 0x01) */ +#define RTC_CLRSR_RAI_Pos (8UL) /*!< RTC CLRSR: RAI (Bit 8) */ +#define RTC_CLRSR_RAI_Msk (0x100UL) /*!< RTC CLRSR: RAI (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- RTC_ATIM0 --------------------------------- */ +#define RTC_ATIM0_ASE_Pos (0UL) /*!< RTC ATIM0: ASE (Bit 0) */ +#define RTC_ATIM0_ASE_Msk (0x3fUL) /*!< RTC ATIM0: ASE (Bitfield-Mask: 0x3f) */ +#define RTC_ATIM0_AMI_Pos (8UL) /*!< RTC ATIM0: AMI (Bit 8) */ +#define RTC_ATIM0_AMI_Msk (0x3f00UL) /*!< RTC ATIM0: AMI (Bitfield-Mask: 0x3f) */ +#define RTC_ATIM0_AHO_Pos (16UL) /*!< RTC ATIM0: AHO (Bit 16) */ +#define RTC_ATIM0_AHO_Msk (0x1f0000UL) /*!< RTC ATIM0: AHO (Bitfield-Mask: 0x1f) */ +#define RTC_ATIM0_ADA_Pos (24UL) /*!< RTC ATIM0: ADA (Bit 24) */ +#define RTC_ATIM0_ADA_Msk (0x1f000000UL) /*!< RTC ATIM0: ADA (Bitfield-Mask: 0x1f) */ + +/* ---------------------------------- RTC_ATIM1 --------------------------------- */ +#define RTC_ATIM1_AMO_Pos (8UL) /*!< RTC ATIM1: AMO (Bit 8) */ +#define RTC_ATIM1_AMO_Msk (0xf00UL) /*!< RTC ATIM1: AMO (Bitfield-Mask: 0x0f) */ +#define RTC_ATIM1_AYE_Pos (16UL) /*!< RTC ATIM1: AYE (Bit 16) */ +#define RTC_ATIM1_AYE_Msk (0xffff0000UL) /*!< RTC ATIM1: AYE (Bitfield-Mask: 0xffff) */ + +/* ---------------------------------- RTC_TIM0 ---------------------------------- */ +#define RTC_TIM0_SE_Pos (0UL) /*!< RTC TIM0: SE (Bit 0) */ +#define RTC_TIM0_SE_Msk (0x3fUL) /*!< RTC TIM0: SE (Bitfield-Mask: 0x3f) */ +#define RTC_TIM0_MI_Pos (8UL) /*!< RTC TIM0: MI (Bit 8) */ +#define RTC_TIM0_MI_Msk (0x3f00UL) /*!< RTC TIM0: MI (Bitfield-Mask: 0x3f) */ +#define RTC_TIM0_HO_Pos (16UL) /*!< RTC TIM0: HO (Bit 16) */ +#define RTC_TIM0_HO_Msk (0x1f0000UL) /*!< RTC TIM0: HO (Bitfield-Mask: 0x1f) */ +#define RTC_TIM0_DA_Pos (24UL) /*!< RTC TIM0: DA (Bit 24) */ +#define RTC_TIM0_DA_Msk (0x1f000000UL) /*!< RTC TIM0: DA (Bitfield-Mask: 0x1f) */ + +/* ---------------------------------- RTC_TIM1 ---------------------------------- */ +#define RTC_TIM1_DAWE_Pos (0UL) /*!< RTC TIM1: DAWE (Bit 0) */ +#define RTC_TIM1_DAWE_Msk (0x7UL) /*!< RTC TIM1: DAWE (Bitfield-Mask: 0x07) */ +#define RTC_TIM1_MO_Pos (8UL) /*!< RTC TIM1: MO (Bit 8) */ +#define RTC_TIM1_MO_Msk (0xf00UL) /*!< RTC TIM1: MO (Bitfield-Mask: 0x0f) */ +#define RTC_TIM1_YE_Pos (16UL) /*!< RTC TIM1: YE (Bit 16) */ +#define RTC_TIM1_YE_Msk (0xffff0000UL) /*!< RTC TIM1: YE (Bitfield-Mask: 0xffff) */ + + +/* ================================================================================ */ +/* ================ struct 'SCU_CLK' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ------------------------------- SCU_CLK_CLKSTAT ------------------------------ */ +#define SCU_CLK_CLKSTAT_USBCST_Pos (0UL) /*!< SCU_CLK CLKSTAT: USBCST (Bit 0) */ +#define SCU_CLK_CLKSTAT_USBCST_Msk (0x1UL) /*!< SCU_CLK CLKSTAT: USBCST (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CLKSTAT_CCUCST_Pos (4UL) /*!< SCU_CLK CLKSTAT: CCUCST (Bit 4) */ +#define SCU_CLK_CLKSTAT_CCUCST_Msk (0x10UL) /*!< SCU_CLK CLKSTAT: CCUCST (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CLKSTAT_WDTCST_Pos (5UL) /*!< SCU_CLK CLKSTAT: WDTCST (Bit 5) */ +#define SCU_CLK_CLKSTAT_WDTCST_Msk (0x20UL) /*!< SCU_CLK CLKSTAT: WDTCST (Bitfield-Mask: 0x01) */ + +/* ------------------------------- SCU_CLK_CLKSET ------------------------------- */ +#define SCU_CLK_CLKSET_USBCEN_Pos (0UL) /*!< SCU_CLK CLKSET: USBCEN (Bit 0) */ +#define SCU_CLK_CLKSET_USBCEN_Msk (0x1UL) /*!< SCU_CLK CLKSET: USBCEN (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CLKSET_CCUCEN_Pos (4UL) /*!< SCU_CLK CLKSET: CCUCEN (Bit 4) */ +#define SCU_CLK_CLKSET_CCUCEN_Msk (0x10UL) /*!< SCU_CLK CLKSET: CCUCEN (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CLKSET_WDTCEN_Pos (5UL) /*!< SCU_CLK CLKSET: WDTCEN (Bit 5) */ +#define SCU_CLK_CLKSET_WDTCEN_Msk (0x20UL) /*!< SCU_CLK CLKSET: WDTCEN (Bitfield-Mask: 0x01) */ + +/* ------------------------------- SCU_CLK_CLKCLR ------------------------------- */ +#define SCU_CLK_CLKCLR_USBCDI_Pos (0UL) /*!< SCU_CLK CLKCLR: USBCDI (Bit 0) */ +#define SCU_CLK_CLKCLR_USBCDI_Msk (0x1UL) /*!< SCU_CLK CLKCLR: USBCDI (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CLKCLR_CCUCDI_Pos (4UL) /*!< SCU_CLK CLKCLR: CCUCDI (Bit 4) */ +#define SCU_CLK_CLKCLR_CCUCDI_Msk (0x10UL) /*!< SCU_CLK CLKCLR: CCUCDI (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CLKCLR_WDTCDI_Pos (5UL) /*!< SCU_CLK CLKCLR: WDTCDI (Bit 5) */ +#define SCU_CLK_CLKCLR_WDTCDI_Msk (0x20UL) /*!< SCU_CLK CLKCLR: WDTCDI (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_CLK_SYSCLKCR ------------------------------ */ +#define SCU_CLK_SYSCLKCR_SYSDIV_Pos (0UL) /*!< SCU_CLK SYSCLKCR: SYSDIV (Bit 0) */ +#define SCU_CLK_SYSCLKCR_SYSDIV_Msk (0xffUL) /*!< SCU_CLK SYSCLKCR: SYSDIV (Bitfield-Mask: 0xff) */ +#define SCU_CLK_SYSCLKCR_SYSSEL_Pos (16UL) /*!< SCU_CLK SYSCLKCR: SYSSEL (Bit 16) */ +#define SCU_CLK_SYSCLKCR_SYSSEL_Msk (0x10000UL) /*!< SCU_CLK SYSCLKCR: SYSSEL (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_CLK_CPUCLKCR ------------------------------ */ +#define SCU_CLK_CPUCLKCR_CPUDIV_Pos (0UL) /*!< SCU_CLK CPUCLKCR: CPUDIV (Bit 0) */ +#define SCU_CLK_CPUCLKCR_CPUDIV_Msk (0x1UL) /*!< SCU_CLK CPUCLKCR: CPUDIV (Bitfield-Mask: 0x01) */ + +/* ------------------------------- SCU_CLK_PBCLKCR ------------------------------ */ +#define SCU_CLK_PBCLKCR_PBDIV_Pos (0UL) /*!< SCU_CLK PBCLKCR: PBDIV (Bit 0) */ +#define SCU_CLK_PBCLKCR_PBDIV_Msk (0x1UL) /*!< SCU_CLK PBCLKCR: PBDIV (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_CLK_USBCLKCR ------------------------------ */ +#define SCU_CLK_USBCLKCR_USBDIV_Pos (0UL) /*!< SCU_CLK USBCLKCR: USBDIV (Bit 0) */ +#define SCU_CLK_USBCLKCR_USBDIV_Msk (0x7UL) /*!< SCU_CLK USBCLKCR: USBDIV (Bitfield-Mask: 0x07) */ +#define SCU_CLK_USBCLKCR_USBSEL_Pos (16UL) /*!< SCU_CLK USBCLKCR: USBSEL (Bit 16) */ +#define SCU_CLK_USBCLKCR_USBSEL_Msk (0x10000UL) /*!< SCU_CLK USBCLKCR: USBSEL (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_CLK_CCUCLKCR ------------------------------ */ +#define SCU_CLK_CCUCLKCR_CCUDIV_Pos (0UL) /*!< SCU_CLK CCUCLKCR: CCUDIV (Bit 0) */ +#define SCU_CLK_CCUCLKCR_CCUDIV_Msk (0x1UL) /*!< SCU_CLK CCUCLKCR: CCUDIV (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_CLK_WDTCLKCR ------------------------------ */ +#define SCU_CLK_WDTCLKCR_WDTDIV_Pos (0UL) /*!< SCU_CLK WDTCLKCR: WDTDIV (Bit 0) */ +#define SCU_CLK_WDTCLKCR_WDTDIV_Msk (0xffUL) /*!< SCU_CLK WDTCLKCR: WDTDIV (Bitfield-Mask: 0xff) */ +#define SCU_CLK_WDTCLKCR_WDTSEL_Pos (16UL) /*!< SCU_CLK WDTCLKCR: WDTSEL (Bit 16) */ +#define SCU_CLK_WDTCLKCR_WDTSEL_Msk (0x30000UL) /*!< SCU_CLK WDTCLKCR: WDTSEL (Bitfield-Mask: 0x03) */ + +/* ------------------------------ SCU_CLK_EXTCLKCR ------------------------------ */ +#define SCU_CLK_EXTCLKCR_ECKSEL_Pos (0UL) /*!< SCU_CLK EXTCLKCR: ECKSEL (Bit 0) */ +#define SCU_CLK_EXTCLKCR_ECKSEL_Msk (0x7UL) /*!< SCU_CLK EXTCLKCR: ECKSEL (Bitfield-Mask: 0x07) */ +#define SCU_CLK_EXTCLKCR_ECKDIV_Pos (16UL) /*!< SCU_CLK EXTCLKCR: ECKDIV (Bit 16) */ +#define SCU_CLK_EXTCLKCR_ECKDIV_Msk (0x1ff0000UL) /*!< SCU_CLK EXTCLKCR: ECKDIV (Bitfield-Mask: 0x1ff) */ + +/* ----------------------------- SCU_CLK_MLINKCLKCR ----------------------------- */ +#define SCU_CLK_MLINKCLKCR_SYSDIV_Pos (0UL) /*!< SCU_CLK MLINKCLKCR: SYSDIV (Bit 0) */ +#define SCU_CLK_MLINKCLKCR_SYSDIV_Msk (0xffUL) /*!< SCU_CLK MLINKCLKCR: SYSDIV (Bitfield-Mask: 0xff) */ +#define SCU_CLK_MLINKCLKCR_SYSSEL_Pos (8UL) /*!< SCU_CLK MLINKCLKCR: SYSSEL (Bit 8) */ +#define SCU_CLK_MLINKCLKCR_SYSSEL_Msk (0x100UL) /*!< SCU_CLK MLINKCLKCR: SYSSEL (Bitfield-Mask: 0x01) */ +#define SCU_CLK_MLINKCLKCR_CPUDIV_Pos (10UL) /*!< SCU_CLK MLINKCLKCR: CPUDIV (Bit 10) */ +#define SCU_CLK_MLINKCLKCR_CPUDIV_Msk (0x400UL) /*!< SCU_CLK MLINKCLKCR: CPUDIV (Bitfield-Mask: 0x01) */ +#define SCU_CLK_MLINKCLKCR_PBDIV_Pos (12UL) /*!< SCU_CLK MLINKCLKCR: PBDIV (Bit 12) */ +#define SCU_CLK_MLINKCLKCR_PBDIV_Msk (0x1000UL) /*!< SCU_CLK MLINKCLKCR: PBDIV (Bitfield-Mask: 0x01) */ +#define SCU_CLK_MLINKCLKCR_CCUDIV_Pos (14UL) /*!< SCU_CLK MLINKCLKCR: CCUDIV (Bit 14) */ +#define SCU_CLK_MLINKCLKCR_CCUDIV_Msk (0x4000UL) /*!< SCU_CLK MLINKCLKCR: CCUDIV (Bitfield-Mask: 0x01) */ +#define SCU_CLK_MLINKCLKCR_WDTDIV_Pos (16UL) /*!< SCU_CLK MLINKCLKCR: WDTDIV (Bit 16) */ +#define SCU_CLK_MLINKCLKCR_WDTDIV_Msk (0xff0000UL) /*!< SCU_CLK MLINKCLKCR: WDTDIV (Bitfield-Mask: 0xff) */ +#define SCU_CLK_MLINKCLKCR_WDTSEL_Pos (24UL) /*!< SCU_CLK MLINKCLKCR: WDTSEL (Bit 24) */ +#define SCU_CLK_MLINKCLKCR_WDTSEL_Msk (0x3000000UL) /*!< SCU_CLK MLINKCLKCR: WDTSEL (Bitfield-Mask: 0x03) */ + +/* ------------------------------- SCU_CLK_SLEEPCR ------------------------------ */ +#define SCU_CLK_SLEEPCR_SYSSEL_Pos (0UL) /*!< SCU_CLK SLEEPCR: SYSSEL (Bit 0) */ +#define SCU_CLK_SLEEPCR_SYSSEL_Msk (0x1UL) /*!< SCU_CLK SLEEPCR: SYSSEL (Bitfield-Mask: 0x01) */ +#define SCU_CLK_SLEEPCR_USBCR_Pos (16UL) /*!< SCU_CLK SLEEPCR: USBCR (Bit 16) */ +#define SCU_CLK_SLEEPCR_USBCR_Msk (0x10000UL) /*!< SCU_CLK SLEEPCR: USBCR (Bitfield-Mask: 0x01) */ +#define SCU_CLK_SLEEPCR_CCUCR_Pos (20UL) /*!< SCU_CLK SLEEPCR: CCUCR (Bit 20) */ +#define SCU_CLK_SLEEPCR_CCUCR_Msk (0x100000UL) /*!< SCU_CLK SLEEPCR: CCUCR (Bitfield-Mask: 0x01) */ +#define SCU_CLK_SLEEPCR_WDTCR_Pos (21UL) /*!< SCU_CLK SLEEPCR: WDTCR (Bit 21) */ +#define SCU_CLK_SLEEPCR_WDTCR_Msk (0x200000UL) /*!< SCU_CLK SLEEPCR: WDTCR (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_CLK_DSLEEPCR ------------------------------ */ +#define SCU_CLK_DSLEEPCR_SYSSEL_Pos (0UL) /*!< SCU_CLK DSLEEPCR: SYSSEL (Bit 0) */ +#define SCU_CLK_DSLEEPCR_SYSSEL_Msk (0x1UL) /*!< SCU_CLK DSLEEPCR: SYSSEL (Bitfield-Mask: 0x01) */ +#define SCU_CLK_DSLEEPCR_FPDN_Pos (11UL) /*!< SCU_CLK DSLEEPCR: FPDN (Bit 11) */ +#define SCU_CLK_DSLEEPCR_FPDN_Msk (0x800UL) /*!< SCU_CLK DSLEEPCR: FPDN (Bitfield-Mask: 0x01) */ +#define SCU_CLK_DSLEEPCR_PLLPDN_Pos (12UL) /*!< SCU_CLK DSLEEPCR: PLLPDN (Bit 12) */ +#define SCU_CLK_DSLEEPCR_PLLPDN_Msk (0x1000UL) /*!< SCU_CLK DSLEEPCR: PLLPDN (Bitfield-Mask: 0x01) */ +#define SCU_CLK_DSLEEPCR_VCOPDN_Pos (13UL) /*!< SCU_CLK DSLEEPCR: VCOPDN (Bit 13) */ +#define SCU_CLK_DSLEEPCR_VCOPDN_Msk (0x2000UL) /*!< SCU_CLK DSLEEPCR: VCOPDN (Bitfield-Mask: 0x01) */ +#define SCU_CLK_DSLEEPCR_USBCR_Pos (16UL) /*!< SCU_CLK DSLEEPCR: USBCR (Bit 16) */ +#define SCU_CLK_DSLEEPCR_USBCR_Msk (0x10000UL) /*!< SCU_CLK DSLEEPCR: USBCR (Bitfield-Mask: 0x01) */ +#define SCU_CLK_DSLEEPCR_CCUCR_Pos (20UL) /*!< SCU_CLK DSLEEPCR: CCUCR (Bit 20) */ +#define SCU_CLK_DSLEEPCR_CCUCR_Msk (0x100000UL) /*!< SCU_CLK DSLEEPCR: CCUCR (Bitfield-Mask: 0x01) */ +#define SCU_CLK_DSLEEPCR_WDTCR_Pos (21UL) /*!< SCU_CLK DSLEEPCR: WDTCR (Bit 21) */ +#define SCU_CLK_DSLEEPCR_WDTCR_Msk (0x200000UL) /*!< SCU_CLK DSLEEPCR: WDTCR (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_CLK_CGATSTAT0 ----------------------------- */ +#define SCU_CLK_CGATSTAT0_VADC_Pos (0UL) /*!< SCU_CLK CGATSTAT0: VADC (Bit 0) */ +#define SCU_CLK_CGATSTAT0_VADC_Msk (0x1UL) /*!< SCU_CLK CGATSTAT0: VADC (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSTAT0_CCU40_Pos (2UL) /*!< SCU_CLK CGATSTAT0: CCU40 (Bit 2) */ +#define SCU_CLK_CGATSTAT0_CCU40_Msk (0x4UL) /*!< SCU_CLK CGATSTAT0: CCU40 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSTAT0_CCU41_Pos (3UL) /*!< SCU_CLK CGATSTAT0: CCU41 (Bit 3) */ +#define SCU_CLK_CGATSTAT0_CCU41_Msk (0x8UL) /*!< SCU_CLK CGATSTAT0: CCU41 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSTAT0_CCU80_Pos (7UL) /*!< SCU_CLK CGATSTAT0: CCU80 (Bit 7) */ +#define SCU_CLK_CGATSTAT0_CCU80_Msk (0x80UL) /*!< SCU_CLK CGATSTAT0: CCU80 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSTAT0_POSIF0_Pos (9UL) /*!< SCU_CLK CGATSTAT0: POSIF0 (Bit 9) */ +#define SCU_CLK_CGATSTAT0_POSIF0_Msk (0x200UL) /*!< SCU_CLK CGATSTAT0: POSIF0 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSTAT0_USIC0_Pos (11UL) /*!< SCU_CLK CGATSTAT0: USIC0 (Bit 11) */ +#define SCU_CLK_CGATSTAT0_USIC0_Msk (0x800UL) /*!< SCU_CLK CGATSTAT0: USIC0 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSTAT0_ERU1_Pos (16UL) /*!< SCU_CLK CGATSTAT0: ERU1 (Bit 16) */ +#define SCU_CLK_CGATSTAT0_ERU1_Msk (0x10000UL) /*!< SCU_CLK CGATSTAT0: ERU1 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSTAT0_HRPWM0_Pos (23UL) /*!< SCU_CLK CGATSTAT0: HRPWM0 (Bit 23) */ +#define SCU_CLK_CGATSTAT0_HRPWM0_Msk (0x800000UL) /*!< SCU_CLK CGATSTAT0: HRPWM0 (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_CLK_CGATSET0 ------------------------------ */ +#define SCU_CLK_CGATSET0_VADC_Pos (0UL) /*!< SCU_CLK CGATSET0: VADC (Bit 0) */ +#define SCU_CLK_CGATSET0_VADC_Msk (0x1UL) /*!< SCU_CLK CGATSET0: VADC (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSET0_CCU40_Pos (2UL) /*!< SCU_CLK CGATSET0: CCU40 (Bit 2) */ +#define SCU_CLK_CGATSET0_CCU40_Msk (0x4UL) /*!< SCU_CLK CGATSET0: CCU40 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSET0_CCU41_Pos (3UL) /*!< SCU_CLK CGATSET0: CCU41 (Bit 3) */ +#define SCU_CLK_CGATSET0_CCU41_Msk (0x8UL) /*!< SCU_CLK CGATSET0: CCU41 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSET0_CCU80_Pos (7UL) /*!< SCU_CLK CGATSET0: CCU80 (Bit 7) */ +#define SCU_CLK_CGATSET0_CCU80_Msk (0x80UL) /*!< SCU_CLK CGATSET0: CCU80 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSET0_POSIF0_Pos (9UL) /*!< SCU_CLK CGATSET0: POSIF0 (Bit 9) */ +#define SCU_CLK_CGATSET0_POSIF0_Msk (0x200UL) /*!< SCU_CLK CGATSET0: POSIF0 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSET0_USIC0_Pos (11UL) /*!< SCU_CLK CGATSET0: USIC0 (Bit 11) */ +#define SCU_CLK_CGATSET0_USIC0_Msk (0x800UL) /*!< SCU_CLK CGATSET0: USIC0 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSET0_ERU1_Pos (16UL) /*!< SCU_CLK CGATSET0: ERU1 (Bit 16) */ +#define SCU_CLK_CGATSET0_ERU1_Msk (0x10000UL) /*!< SCU_CLK CGATSET0: ERU1 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSET0_HRPWM0_Pos (23UL) /*!< SCU_CLK CGATSET0: HRPWM0 (Bit 23) */ +#define SCU_CLK_CGATSET0_HRPWM0_Msk (0x800000UL) /*!< SCU_CLK CGATSET0: HRPWM0 (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_CLK_CGATCLR0 ------------------------------ */ +#define SCU_CLK_CGATCLR0_VADC_Pos (0UL) /*!< SCU_CLK CGATCLR0: VADC (Bit 0) */ +#define SCU_CLK_CGATCLR0_VADC_Msk (0x1UL) /*!< SCU_CLK CGATCLR0: VADC (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATCLR0_CCU40_Pos (2UL) /*!< SCU_CLK CGATCLR0: CCU40 (Bit 2) */ +#define SCU_CLK_CGATCLR0_CCU40_Msk (0x4UL) /*!< SCU_CLK CGATCLR0: CCU40 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATCLR0_CCU41_Pos (3UL) /*!< SCU_CLK CGATCLR0: CCU41 (Bit 3) */ +#define SCU_CLK_CGATCLR0_CCU41_Msk (0x8UL) /*!< SCU_CLK CGATCLR0: CCU41 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATCLR0_CCU80_Pos (7UL) /*!< SCU_CLK CGATCLR0: CCU80 (Bit 7) */ +#define SCU_CLK_CGATCLR0_CCU80_Msk (0x80UL) /*!< SCU_CLK CGATCLR0: CCU80 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATCLR0_POSIF0_Pos (9UL) /*!< SCU_CLK CGATCLR0: POSIF0 (Bit 9) */ +#define SCU_CLK_CGATCLR0_POSIF0_Msk (0x200UL) /*!< SCU_CLK CGATCLR0: POSIF0 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATCLR0_USIC0_Pos (11UL) /*!< SCU_CLK CGATCLR0: USIC0 (Bit 11) */ +#define SCU_CLK_CGATCLR0_USIC0_Msk (0x800UL) /*!< SCU_CLK CGATCLR0: USIC0 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATCLR0_ERU1_Pos (16UL) /*!< SCU_CLK CGATCLR0: ERU1 (Bit 16) */ +#define SCU_CLK_CGATCLR0_ERU1_Msk (0x10000UL) /*!< SCU_CLK CGATCLR0: ERU1 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATCLR0_HRPWM0_Pos (23UL) /*!< SCU_CLK CGATCLR0: HRPWM0 (Bit 23) */ +#define SCU_CLK_CGATCLR0_HRPWM0_Msk (0x800000UL) /*!< SCU_CLK CGATCLR0: HRPWM0 (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_CLK_CGATSTAT1 ----------------------------- */ +#define SCU_CLK_CGATSTAT1_LEDTSCU0_Pos (3UL) /*!< SCU_CLK CGATSTAT1: LEDTSCU0 (Bit 3) */ +#define SCU_CLK_CGATSTAT1_LEDTSCU0_Msk (0x8UL) /*!< SCU_CLK CGATSTAT1: LEDTSCU0 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSTAT1_MCAN0_Pos (4UL) /*!< SCU_CLK CGATSTAT1: MCAN0 (Bit 4) */ +#define SCU_CLK_CGATSTAT1_MCAN0_Msk (0x10UL) /*!< SCU_CLK CGATSTAT1: MCAN0 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSTAT1_DAC_Pos (5UL) /*!< SCU_CLK CGATSTAT1: DAC (Bit 5) */ +#define SCU_CLK_CGATSTAT1_DAC_Msk (0x20UL) /*!< SCU_CLK CGATSTAT1: DAC (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSTAT1_USIC1_Pos (7UL) /*!< SCU_CLK CGATSTAT1: USIC1 (Bit 7) */ +#define SCU_CLK_CGATSTAT1_USIC1_Msk (0x80UL) /*!< SCU_CLK CGATSTAT1: USIC1 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSTAT1_PPORTS_Pos (9UL) /*!< SCU_CLK CGATSTAT1: PPORTS (Bit 9) */ +#define SCU_CLK_CGATSTAT1_PPORTS_Msk (0x200UL) /*!< SCU_CLK CGATSTAT1: PPORTS (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_CLK_CGATSET1 ------------------------------ */ +#define SCU_CLK_CGATSET1_LEDTSCU0_Pos (3UL) /*!< SCU_CLK CGATSET1: LEDTSCU0 (Bit 3) */ +#define SCU_CLK_CGATSET1_LEDTSCU0_Msk (0x8UL) /*!< SCU_CLK CGATSET1: LEDTSCU0 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSET1_MCAN0_Pos (4UL) /*!< SCU_CLK CGATSET1: MCAN0 (Bit 4) */ +#define SCU_CLK_CGATSET1_MCAN0_Msk (0x10UL) /*!< SCU_CLK CGATSET1: MCAN0 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSET1_DAC_Pos (5UL) /*!< SCU_CLK CGATSET1: DAC (Bit 5) */ +#define SCU_CLK_CGATSET1_DAC_Msk (0x20UL) /*!< SCU_CLK CGATSET1: DAC (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSET1_USIC1_Pos (7UL) /*!< SCU_CLK CGATSET1: USIC1 (Bit 7) */ +#define SCU_CLK_CGATSET1_USIC1_Msk (0x80UL) /*!< SCU_CLK CGATSET1: USIC1 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSET1_PPORTS_Pos (9UL) /*!< SCU_CLK CGATSET1: PPORTS (Bit 9) */ +#define SCU_CLK_CGATSET1_PPORTS_Msk (0x200UL) /*!< SCU_CLK CGATSET1: PPORTS (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_CLK_CGATCLR1 ------------------------------ */ +#define SCU_CLK_CGATCLR1_LEDTSCU0_Pos (3UL) /*!< SCU_CLK CGATCLR1: LEDTSCU0 (Bit 3) */ +#define SCU_CLK_CGATCLR1_LEDTSCU0_Msk (0x8UL) /*!< SCU_CLK CGATCLR1: LEDTSCU0 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATCLR1_MCAN0_Pos (4UL) /*!< SCU_CLK CGATCLR1: MCAN0 (Bit 4) */ +#define SCU_CLK_CGATCLR1_MCAN0_Msk (0x10UL) /*!< SCU_CLK CGATCLR1: MCAN0 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATCLR1_DAC_Pos (5UL) /*!< SCU_CLK CGATCLR1: DAC (Bit 5) */ +#define SCU_CLK_CGATCLR1_DAC_Msk (0x20UL) /*!< SCU_CLK CGATCLR1: DAC (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATCLR1_USIC1_Pos (7UL) /*!< SCU_CLK CGATCLR1: USIC1 (Bit 7) */ +#define SCU_CLK_CGATCLR1_USIC1_Msk (0x80UL) /*!< SCU_CLK CGATCLR1: USIC1 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATCLR1_PPORTS_Pos (9UL) /*!< SCU_CLK CGATCLR1: PPORTS (Bit 9) */ +#define SCU_CLK_CGATCLR1_PPORTS_Msk (0x200UL) /*!< SCU_CLK CGATCLR1: PPORTS (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_CLK_CGATSTAT2 ----------------------------- */ +#define SCU_CLK_CGATSTAT2_WDT_Pos (1UL) /*!< SCU_CLK CGATSTAT2: WDT (Bit 1) */ +#define SCU_CLK_CGATSTAT2_WDT_Msk (0x2UL) /*!< SCU_CLK CGATSTAT2: WDT (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSTAT2_DMA0_Pos (4UL) /*!< SCU_CLK CGATSTAT2: DMA0 (Bit 4) */ +#define SCU_CLK_CGATSTAT2_DMA0_Msk (0x10UL) /*!< SCU_CLK CGATSTAT2: DMA0 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSTAT2_FCE_Pos (6UL) /*!< SCU_CLK CGATSTAT2: FCE (Bit 6) */ +#define SCU_CLK_CGATSTAT2_FCE_Msk (0x40UL) /*!< SCU_CLK CGATSTAT2: FCE (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSTAT2_USB_Pos (7UL) /*!< SCU_CLK CGATSTAT2: USB (Bit 7) */ +#define SCU_CLK_CGATSTAT2_USB_Msk (0x80UL) /*!< SCU_CLK CGATSTAT2: USB (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_CLK_CGATSET2 ------------------------------ */ +#define SCU_CLK_CGATSET2_WDT_Pos (1UL) /*!< SCU_CLK CGATSET2: WDT (Bit 1) */ +#define SCU_CLK_CGATSET2_WDT_Msk (0x2UL) /*!< SCU_CLK CGATSET2: WDT (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSET2_DMA0_Pos (4UL) /*!< SCU_CLK CGATSET2: DMA0 (Bit 4) */ +#define SCU_CLK_CGATSET2_DMA0_Msk (0x10UL) /*!< SCU_CLK CGATSET2: DMA0 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSET2_FCE_Pos (6UL) /*!< SCU_CLK CGATSET2: FCE (Bit 6) */ +#define SCU_CLK_CGATSET2_FCE_Msk (0x40UL) /*!< SCU_CLK CGATSET2: FCE (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSET2_USB_Pos (7UL) /*!< SCU_CLK CGATSET2: USB (Bit 7) */ +#define SCU_CLK_CGATSET2_USB_Msk (0x80UL) /*!< SCU_CLK CGATSET2: USB (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_CLK_CGATCLR2 ------------------------------ */ +#define SCU_CLK_CGATCLR2_WDT_Pos (1UL) /*!< SCU_CLK CGATCLR2: WDT (Bit 1) */ +#define SCU_CLK_CGATCLR2_WDT_Msk (0x2UL) /*!< SCU_CLK CGATCLR2: WDT (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATCLR2_DMA0_Pos (4UL) /*!< SCU_CLK CGATCLR2: DMA0 (Bit 4) */ +#define SCU_CLK_CGATCLR2_DMA0_Msk (0x10UL) /*!< SCU_CLK CGATCLR2: DMA0 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATCLR2_FCE_Pos (6UL) /*!< SCU_CLK CGATCLR2: FCE (Bit 6) */ +#define SCU_CLK_CGATCLR2_FCE_Msk (0x40UL) /*!< SCU_CLK CGATCLR2: FCE (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATCLR2_USB_Pos (7UL) /*!< SCU_CLK CGATCLR2: USB (Bit 7) */ +#define SCU_CLK_CGATCLR2_USB_Msk (0x80UL) /*!< SCU_CLK CGATCLR2: USB (Bitfield-Mask: 0x01) */ + + +/* ================================================================================ */ +/* ================ struct 'SCU_OSC' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ------------------------------ SCU_OSC_OSCHPSTAT ----------------------------- */ +#define SCU_OSC_OSCHPSTAT_X1D_Pos (0UL) /*!< SCU_OSC OSCHPSTAT: X1D (Bit 0) */ +#define SCU_OSC_OSCHPSTAT_X1D_Msk (0x1UL) /*!< SCU_OSC OSCHPSTAT: X1D (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_OSC_OSCHPCTRL ----------------------------- */ +#define SCU_OSC_OSCHPCTRL_X1DEN_Pos (0UL) /*!< SCU_OSC OSCHPCTRL: X1DEN (Bit 0) */ +#define SCU_OSC_OSCHPCTRL_X1DEN_Msk (0x1UL) /*!< SCU_OSC OSCHPCTRL: X1DEN (Bitfield-Mask: 0x01) */ +#define SCU_OSC_OSCHPCTRL_SHBY_Pos (1UL) /*!< SCU_OSC OSCHPCTRL: SHBY (Bit 1) */ +#define SCU_OSC_OSCHPCTRL_SHBY_Msk (0x2UL) /*!< SCU_OSC OSCHPCTRL: SHBY (Bitfield-Mask: 0x01) */ +#define SCU_OSC_OSCHPCTRL_MODE_Pos (4UL) /*!< SCU_OSC OSCHPCTRL: MODE (Bit 4) */ +#define SCU_OSC_OSCHPCTRL_MODE_Msk (0x30UL) /*!< SCU_OSC OSCHPCTRL: MODE (Bitfield-Mask: 0x03) */ +#define SCU_OSC_OSCHPCTRL_OSCVAL_Pos (16UL) /*!< SCU_OSC OSCHPCTRL: OSCVAL (Bit 16) */ +#define SCU_OSC_OSCHPCTRL_OSCVAL_Msk (0xf0000UL) /*!< SCU_OSC OSCHPCTRL: OSCVAL (Bitfield-Mask: 0x0f) */ + +/* ----------------------------- SCU_OSC_CLKCALCONST ---------------------------- */ +#define SCU_OSC_CLKCALCONST_CALIBCONST_Pos (0UL) /*!< SCU_OSC CLKCALCONST: CALIBCONST (Bit 0) */ +#define SCU_OSC_CLKCALCONST_CALIBCONST_Msk (0xfUL) /*!< SCU_OSC CLKCALCONST: CALIBCONST (Bitfield-Mask: 0x0f) */ + + +/* ================================================================================ */ +/* ================ struct 'SCU_PLL' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ------------------------------- SCU_PLL_PLLSTAT ------------------------------ */ +#define SCU_PLL_PLLSTAT_VCOBYST_Pos (0UL) /*!< SCU_PLL PLLSTAT: VCOBYST (Bit 0) */ +#define SCU_PLL_PLLSTAT_VCOBYST_Msk (0x1UL) /*!< SCU_PLL PLLSTAT: VCOBYST (Bitfield-Mask: 0x01) */ +#define SCU_PLL_PLLSTAT_PWDSTAT_Pos (1UL) /*!< SCU_PLL PLLSTAT: PWDSTAT (Bit 1) */ +#define SCU_PLL_PLLSTAT_PWDSTAT_Msk (0x2UL) /*!< SCU_PLL PLLSTAT: PWDSTAT (Bitfield-Mask: 0x01) */ +#define SCU_PLL_PLLSTAT_VCOLOCK_Pos (2UL) /*!< SCU_PLL PLLSTAT: VCOLOCK (Bit 2) */ +#define SCU_PLL_PLLSTAT_VCOLOCK_Msk (0x4UL) /*!< SCU_PLL PLLSTAT: VCOLOCK (Bitfield-Mask: 0x01) */ +#define SCU_PLL_PLLSTAT_K1RDY_Pos (4UL) /*!< SCU_PLL PLLSTAT: K1RDY (Bit 4) */ +#define SCU_PLL_PLLSTAT_K1RDY_Msk (0x10UL) /*!< SCU_PLL PLLSTAT: K1RDY (Bitfield-Mask: 0x01) */ +#define SCU_PLL_PLLSTAT_K2RDY_Pos (5UL) /*!< SCU_PLL PLLSTAT: K2RDY (Bit 5) */ +#define SCU_PLL_PLLSTAT_K2RDY_Msk (0x20UL) /*!< SCU_PLL PLLSTAT: K2RDY (Bitfield-Mask: 0x01) */ +#define SCU_PLL_PLLSTAT_BY_Pos (6UL) /*!< SCU_PLL PLLSTAT: BY (Bit 6) */ +#define SCU_PLL_PLLSTAT_BY_Msk (0x40UL) /*!< SCU_PLL PLLSTAT: BY (Bitfield-Mask: 0x01) */ +#define SCU_PLL_PLLSTAT_PLLLV_Pos (7UL) /*!< SCU_PLL PLLSTAT: PLLLV (Bit 7) */ +#define SCU_PLL_PLLSTAT_PLLLV_Msk (0x80UL) /*!< SCU_PLL PLLSTAT: PLLLV (Bitfield-Mask: 0x01) */ +#define SCU_PLL_PLLSTAT_PLLHV_Pos (8UL) /*!< SCU_PLL PLLSTAT: PLLHV (Bit 8) */ +#define SCU_PLL_PLLSTAT_PLLHV_Msk (0x100UL) /*!< SCU_PLL PLLSTAT: PLLHV (Bitfield-Mask: 0x01) */ +#define SCU_PLL_PLLSTAT_PLLSP_Pos (9UL) /*!< SCU_PLL PLLSTAT: PLLSP (Bit 9) */ +#define SCU_PLL_PLLSTAT_PLLSP_Msk (0x200UL) /*!< SCU_PLL PLLSTAT: PLLSP (Bitfield-Mask: 0x01) */ + +/* ------------------------------- SCU_PLL_PLLCON0 ------------------------------ */ +#define SCU_PLL_PLLCON0_VCOBYP_Pos (0UL) /*!< SCU_PLL PLLCON0: VCOBYP (Bit 0) */ +#define SCU_PLL_PLLCON0_VCOBYP_Msk (0x1UL) /*!< SCU_PLL PLLCON0: VCOBYP (Bitfield-Mask: 0x01) */ +#define SCU_PLL_PLLCON0_VCOPWD_Pos (1UL) /*!< SCU_PLL PLLCON0: VCOPWD (Bit 1) */ +#define SCU_PLL_PLLCON0_VCOPWD_Msk (0x2UL) /*!< SCU_PLL PLLCON0: VCOPWD (Bitfield-Mask: 0x01) */ +#define SCU_PLL_PLLCON0_VCOTR_Pos (2UL) /*!< SCU_PLL PLLCON0: VCOTR (Bit 2) */ +#define SCU_PLL_PLLCON0_VCOTR_Msk (0x4UL) /*!< SCU_PLL PLLCON0: VCOTR (Bitfield-Mask: 0x01) */ +#define SCU_PLL_PLLCON0_FINDIS_Pos (4UL) /*!< SCU_PLL PLLCON0: FINDIS (Bit 4) */ +#define SCU_PLL_PLLCON0_FINDIS_Msk (0x10UL) /*!< SCU_PLL PLLCON0: FINDIS (Bitfield-Mask: 0x01) */ +#define SCU_PLL_PLLCON0_OSCDISCDIS_Pos (6UL) /*!< SCU_PLL PLLCON0: OSCDISCDIS (Bit 6) */ +#define SCU_PLL_PLLCON0_OSCDISCDIS_Msk (0x40UL) /*!< SCU_PLL PLLCON0: OSCDISCDIS (Bitfield-Mask: 0x01) */ +#define SCU_PLL_PLLCON0_PLLPWD_Pos (16UL) /*!< SCU_PLL PLLCON0: PLLPWD (Bit 16) */ +#define SCU_PLL_PLLCON0_PLLPWD_Msk (0x10000UL) /*!< SCU_PLL PLLCON0: PLLPWD (Bitfield-Mask: 0x01) */ +#define SCU_PLL_PLLCON0_OSCRES_Pos (17UL) /*!< SCU_PLL PLLCON0: OSCRES (Bit 17) */ +#define SCU_PLL_PLLCON0_OSCRES_Msk (0x20000UL) /*!< SCU_PLL PLLCON0: OSCRES (Bitfield-Mask: 0x01) */ +#define SCU_PLL_PLLCON0_RESLD_Pos (18UL) /*!< SCU_PLL PLLCON0: RESLD (Bit 18) */ +#define SCU_PLL_PLLCON0_RESLD_Msk (0x40000UL) /*!< SCU_PLL PLLCON0: RESLD (Bitfield-Mask: 0x01) */ +#define SCU_PLL_PLLCON0_AOTREN_Pos (19UL) /*!< SCU_PLL PLLCON0: AOTREN (Bit 19) */ +#define SCU_PLL_PLLCON0_AOTREN_Msk (0x80000UL) /*!< SCU_PLL PLLCON0: AOTREN (Bitfield-Mask: 0x01) */ +#define SCU_PLL_PLLCON0_FOTR_Pos (20UL) /*!< SCU_PLL PLLCON0: FOTR (Bit 20) */ +#define SCU_PLL_PLLCON0_FOTR_Msk (0x100000UL) /*!< SCU_PLL PLLCON0: FOTR (Bitfield-Mask: 0x01) */ + +/* ------------------------------- SCU_PLL_PLLCON1 ------------------------------ */ +#define SCU_PLL_PLLCON1_K1DIV_Pos (0UL) /*!< SCU_PLL PLLCON1: K1DIV (Bit 0) */ +#define SCU_PLL_PLLCON1_K1DIV_Msk (0x7fUL) /*!< SCU_PLL PLLCON1: K1DIV (Bitfield-Mask: 0x7f) */ +#define SCU_PLL_PLLCON1_NDIV_Pos (8UL) /*!< SCU_PLL PLLCON1: NDIV (Bit 8) */ +#define SCU_PLL_PLLCON1_NDIV_Msk (0x7f00UL) /*!< SCU_PLL PLLCON1: NDIV (Bitfield-Mask: 0x7f) */ +#define SCU_PLL_PLLCON1_K2DIV_Pos (16UL) /*!< SCU_PLL PLLCON1: K2DIV (Bit 16) */ +#define SCU_PLL_PLLCON1_K2DIV_Msk (0x7f0000UL) /*!< SCU_PLL PLLCON1: K2DIV (Bitfield-Mask: 0x7f) */ +#define SCU_PLL_PLLCON1_PDIV_Pos (24UL) /*!< SCU_PLL PLLCON1: PDIV (Bit 24) */ +#define SCU_PLL_PLLCON1_PDIV_Msk (0xf000000UL) /*!< SCU_PLL PLLCON1: PDIV (Bitfield-Mask: 0x0f) */ + +/* ------------------------------- SCU_PLL_PLLCON2 ------------------------------ */ +#define SCU_PLL_PLLCON2_PINSEL_Pos (0UL) /*!< SCU_PLL PLLCON2: PINSEL (Bit 0) */ +#define SCU_PLL_PLLCON2_PINSEL_Msk (0x1UL) /*!< SCU_PLL PLLCON2: PINSEL (Bitfield-Mask: 0x01) */ +#define SCU_PLL_PLLCON2_K1INSEL_Pos (8UL) /*!< SCU_PLL PLLCON2: K1INSEL (Bit 8) */ +#define SCU_PLL_PLLCON2_K1INSEL_Msk (0x100UL) /*!< SCU_PLL PLLCON2: K1INSEL (Bitfield-Mask: 0x01) */ + +/* ----------------------------- SCU_PLL_USBPLLSTAT ----------------------------- */ +#define SCU_PLL_USBPLLSTAT_VCOBYST_Pos (0UL) /*!< SCU_PLL USBPLLSTAT: VCOBYST (Bit 0) */ +#define SCU_PLL_USBPLLSTAT_VCOBYST_Msk (0x1UL) /*!< SCU_PLL USBPLLSTAT: VCOBYST (Bitfield-Mask: 0x01) */ +#define SCU_PLL_USBPLLSTAT_PWDSTAT_Pos (1UL) /*!< SCU_PLL USBPLLSTAT: PWDSTAT (Bit 1) */ +#define SCU_PLL_USBPLLSTAT_PWDSTAT_Msk (0x2UL) /*!< SCU_PLL USBPLLSTAT: PWDSTAT (Bitfield-Mask: 0x01) */ +#define SCU_PLL_USBPLLSTAT_VCOLOCK_Pos (2UL) /*!< SCU_PLL USBPLLSTAT: VCOLOCK (Bit 2) */ +#define SCU_PLL_USBPLLSTAT_VCOLOCK_Msk (0x4UL) /*!< SCU_PLL USBPLLSTAT: VCOLOCK (Bitfield-Mask: 0x01) */ +#define SCU_PLL_USBPLLSTAT_BY_Pos (6UL) /*!< SCU_PLL USBPLLSTAT: BY (Bit 6) */ +#define SCU_PLL_USBPLLSTAT_BY_Msk (0x40UL) /*!< SCU_PLL USBPLLSTAT: BY (Bitfield-Mask: 0x01) */ +#define SCU_PLL_USBPLLSTAT_VCOLOCKED_Pos (7UL) /*!< SCU_PLL USBPLLSTAT: VCOLOCKED (Bit 7) */ +#define SCU_PLL_USBPLLSTAT_VCOLOCKED_Msk (0x80UL) /*!< SCU_PLL USBPLLSTAT: VCOLOCKED (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_PLL_USBPLLCON ----------------------------- */ +#define SCU_PLL_USBPLLCON_VCOBYP_Pos (0UL) /*!< SCU_PLL USBPLLCON: VCOBYP (Bit 0) */ +#define SCU_PLL_USBPLLCON_VCOBYP_Msk (0x1UL) /*!< SCU_PLL USBPLLCON: VCOBYP (Bitfield-Mask: 0x01) */ +#define SCU_PLL_USBPLLCON_VCOPWD_Pos (1UL) /*!< SCU_PLL USBPLLCON: VCOPWD (Bit 1) */ +#define SCU_PLL_USBPLLCON_VCOPWD_Msk (0x2UL) /*!< SCU_PLL USBPLLCON: VCOPWD (Bitfield-Mask: 0x01) */ +#define SCU_PLL_USBPLLCON_VCOTR_Pos (2UL) /*!< SCU_PLL USBPLLCON: VCOTR (Bit 2) */ +#define SCU_PLL_USBPLLCON_VCOTR_Msk (0x4UL) /*!< SCU_PLL USBPLLCON: VCOTR (Bitfield-Mask: 0x01) */ +#define SCU_PLL_USBPLLCON_FINDIS_Pos (4UL) /*!< SCU_PLL USBPLLCON: FINDIS (Bit 4) */ +#define SCU_PLL_USBPLLCON_FINDIS_Msk (0x10UL) /*!< SCU_PLL USBPLLCON: FINDIS (Bitfield-Mask: 0x01) */ +#define SCU_PLL_USBPLLCON_OSCDISCDIS_Pos (6UL) /*!< SCU_PLL USBPLLCON: OSCDISCDIS (Bit 6) */ +#define SCU_PLL_USBPLLCON_OSCDISCDIS_Msk (0x40UL) /*!< SCU_PLL USBPLLCON: OSCDISCDIS (Bitfield-Mask: 0x01) */ +#define SCU_PLL_USBPLLCON_NDIV_Pos (8UL) /*!< SCU_PLL USBPLLCON: NDIV (Bit 8) */ +#define SCU_PLL_USBPLLCON_NDIV_Msk (0x7f00UL) /*!< SCU_PLL USBPLLCON: NDIV (Bitfield-Mask: 0x7f) */ +#define SCU_PLL_USBPLLCON_PLLPWD_Pos (16UL) /*!< SCU_PLL USBPLLCON: PLLPWD (Bit 16) */ +#define SCU_PLL_USBPLLCON_PLLPWD_Msk (0x10000UL) /*!< SCU_PLL USBPLLCON: PLLPWD (Bitfield-Mask: 0x01) */ +#define SCU_PLL_USBPLLCON_RESLD_Pos (18UL) /*!< SCU_PLL USBPLLCON: RESLD (Bit 18) */ +#define SCU_PLL_USBPLLCON_RESLD_Msk (0x40000UL) /*!< SCU_PLL USBPLLCON: RESLD (Bitfield-Mask: 0x01) */ +#define SCU_PLL_USBPLLCON_PDIV_Pos (24UL) /*!< SCU_PLL USBPLLCON: PDIV (Bit 24) */ +#define SCU_PLL_USBPLLCON_PDIV_Msk (0xf000000UL) /*!< SCU_PLL USBPLLCON: PDIV (Bitfield-Mask: 0x0f) */ + +/* ------------------------------ SCU_PLL_CLKMXSTAT ----------------------------- */ +#define SCU_PLL_CLKMXSTAT_SYSCLKMUX_Pos (0UL) /*!< SCU_PLL CLKMXSTAT: SYSCLKMUX (Bit 0) */ +#define SCU_PLL_CLKMXSTAT_SYSCLKMUX_Msk (0x3UL) /*!< SCU_PLL CLKMXSTAT: SYSCLKMUX (Bitfield-Mask: 0x03) */ + + +/* ================================================================================ */ +/* ================ struct 'SCU_GENERAL' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ------------------------------- SCU_GENERAL_ID ------------------------------- */ +#define SCU_GENERAL_ID_MOD_REV_Pos (0UL) /*!< SCU_GENERAL ID: MOD_REV (Bit 0) */ +#define SCU_GENERAL_ID_MOD_REV_Msk (0xffUL) /*!< SCU_GENERAL ID: MOD_REV (Bitfield-Mask: 0xff) */ +#define SCU_GENERAL_ID_MOD_TYPE_Pos (8UL) /*!< SCU_GENERAL ID: MOD_TYPE (Bit 8) */ +#define SCU_GENERAL_ID_MOD_TYPE_Msk (0xff00UL) /*!< SCU_GENERAL ID: MOD_TYPE (Bitfield-Mask: 0xff) */ +#define SCU_GENERAL_ID_MOD_NUMBER_Pos (16UL) /*!< SCU_GENERAL ID: MOD_NUMBER (Bit 16) */ +#define SCU_GENERAL_ID_MOD_NUMBER_Msk (0xffff0000UL) /*!< SCU_GENERAL ID: MOD_NUMBER (Bitfield-Mask: 0xffff) */ + +/* ----------------------------- SCU_GENERAL_IDCHIP ----------------------------- */ +#define SCU_GENERAL_IDCHIP_IDCHIP_Pos (0UL) /*!< SCU_GENERAL IDCHIP: IDCHIP (Bit 0) */ +#define SCU_GENERAL_IDCHIP_IDCHIP_Msk (0xffffffffUL) /*!< SCU_GENERAL IDCHIP: IDCHIP (Bitfield-Mask: 0xffffffff) */ + +/* ----------------------------- SCU_GENERAL_IDMANUF ---------------------------- */ +#define SCU_GENERAL_IDMANUF_DEPT_Pos (0UL) /*!< SCU_GENERAL IDMANUF: DEPT (Bit 0) */ +#define SCU_GENERAL_IDMANUF_DEPT_Msk (0x1fUL) /*!< SCU_GENERAL IDMANUF: DEPT (Bitfield-Mask: 0x1f) */ +#define SCU_GENERAL_IDMANUF_MANUF_Pos (5UL) /*!< SCU_GENERAL IDMANUF: MANUF (Bit 5) */ +#define SCU_GENERAL_IDMANUF_MANUF_Msk (0xffe0UL) /*!< SCU_GENERAL IDMANUF: MANUF (Bitfield-Mask: 0x7ff) */ + +/* ------------------------------ SCU_GENERAL_STCON ----------------------------- */ +#define SCU_GENERAL_STCON_HWCON_Pos (0UL) /*!< SCU_GENERAL STCON: HWCON (Bit 0) */ +#define SCU_GENERAL_STCON_HWCON_Msk (0x3UL) /*!< SCU_GENERAL STCON: HWCON (Bitfield-Mask: 0x03) */ +#define SCU_GENERAL_STCON_SWCON_Pos (8UL) /*!< SCU_GENERAL STCON: SWCON (Bit 8) */ +#define SCU_GENERAL_STCON_SWCON_Msk (0xf00UL) /*!< SCU_GENERAL STCON: SWCON (Bitfield-Mask: 0x0f) */ + +/* ------------------------------- SCU_GENERAL_GPR ------------------------------ */ +#define SCU_GENERAL_GPR_DAT_Pos (0UL) /*!< SCU_GENERAL GPR: DAT (Bit 0) */ +#define SCU_GENERAL_GPR_DAT_Msk (0xffffffffUL) /*!< SCU_GENERAL GPR: DAT (Bitfield-Mask: 0xffffffff) */ + +/* ----------------------------- SCU_GENERAL_CCUCON ----------------------------- */ +#define SCU_GENERAL_CCUCON_GSC40_Pos (0UL) /*!< SCU_GENERAL CCUCON: GSC40 (Bit 0) */ +#define SCU_GENERAL_CCUCON_GSC40_Msk (0x1UL) /*!< SCU_GENERAL CCUCON: GSC40 (Bitfield-Mask: 0x01) */ +#define SCU_GENERAL_CCUCON_GSC41_Pos (1UL) /*!< SCU_GENERAL CCUCON: GSC41 (Bit 1) */ +#define SCU_GENERAL_CCUCON_GSC41_Msk (0x2UL) /*!< SCU_GENERAL CCUCON: GSC41 (Bitfield-Mask: 0x01) */ +#define SCU_GENERAL_CCUCON_GSC80_Pos (8UL) /*!< SCU_GENERAL CCUCON: GSC80 (Bit 8) */ +#define SCU_GENERAL_CCUCON_GSC80_Msk (0x100UL) /*!< SCU_GENERAL CCUCON: GSC80 (Bitfield-Mask: 0x01) */ +#define SCU_GENERAL_CCUCON_GSHR0_Pos (24UL) /*!< SCU_GENERAL CCUCON: GSHR0 (Bit 24) */ +#define SCU_GENERAL_CCUCON_GSHR0_Msk (0x1000000UL) /*!< SCU_GENERAL CCUCON: GSHR0 (Bitfield-Mask: 0x01) */ + +/* ----------------------------- SCU_GENERAL_DTSCON ----------------------------- */ +#define SCU_GENERAL_DTSCON_PWD_Pos (0UL) /*!< SCU_GENERAL DTSCON: PWD (Bit 0) */ +#define SCU_GENERAL_DTSCON_PWD_Msk (0x1UL) /*!< SCU_GENERAL DTSCON: PWD (Bitfield-Mask: 0x01) */ +#define SCU_GENERAL_DTSCON_START_Pos (1UL) /*!< SCU_GENERAL DTSCON: START (Bit 1) */ +#define SCU_GENERAL_DTSCON_START_Msk (0x2UL) /*!< SCU_GENERAL DTSCON: START (Bitfield-Mask: 0x01) */ +#define SCU_GENERAL_DTSCON_OFFSET_Pos (4UL) /*!< SCU_GENERAL DTSCON: OFFSET (Bit 4) */ +#define SCU_GENERAL_DTSCON_OFFSET_Msk (0x7f0UL) /*!< SCU_GENERAL DTSCON: OFFSET (Bitfield-Mask: 0x7f) */ +#define SCU_GENERAL_DTSCON_GAIN_Pos (11UL) /*!< SCU_GENERAL DTSCON: GAIN (Bit 11) */ +#define SCU_GENERAL_DTSCON_GAIN_Msk (0x1f800UL) /*!< SCU_GENERAL DTSCON: GAIN (Bitfield-Mask: 0x3f) */ +#define SCU_GENERAL_DTSCON_REFTRIM_Pos (17UL) /*!< SCU_GENERAL DTSCON: REFTRIM (Bit 17) */ +#define SCU_GENERAL_DTSCON_REFTRIM_Msk (0xe0000UL) /*!< SCU_GENERAL DTSCON: REFTRIM (Bitfield-Mask: 0x07) */ +#define SCU_GENERAL_DTSCON_BGTRIM_Pos (20UL) /*!< SCU_GENERAL DTSCON: BGTRIM (Bit 20) */ +#define SCU_GENERAL_DTSCON_BGTRIM_Msk (0xf00000UL) /*!< SCU_GENERAL DTSCON: BGTRIM (Bitfield-Mask: 0x0f) */ + +/* ----------------------------- SCU_GENERAL_DTSSTAT ---------------------------- */ +#define SCU_GENERAL_DTSSTAT_RESULT_Pos (0UL) /*!< SCU_GENERAL DTSSTAT: RESULT (Bit 0) */ +#define SCU_GENERAL_DTSSTAT_RESULT_Msk (0x3ffUL) /*!< SCU_GENERAL DTSSTAT: RESULT (Bitfield-Mask: 0x3ff) */ +#define SCU_GENERAL_DTSSTAT_RDY_Pos (14UL) /*!< SCU_GENERAL DTSSTAT: RDY (Bit 14) */ +#define SCU_GENERAL_DTSSTAT_RDY_Msk (0x4000UL) /*!< SCU_GENERAL DTSSTAT: RDY (Bitfield-Mask: 0x01) */ +#define SCU_GENERAL_DTSSTAT_BUSY_Pos (15UL) /*!< SCU_GENERAL DTSSTAT: BUSY (Bit 15) */ +#define SCU_GENERAL_DTSSTAT_BUSY_Msk (0x8000UL) /*!< SCU_GENERAL DTSSTAT: BUSY (Bitfield-Mask: 0x01) */ + +/* ----------------------------- SCU_GENERAL_GORCEN ----------------------------- */ +#define SCU_GENERAL_GORCEN_ENORC6_Pos (6UL) /*!< SCU_GENERAL GORCEN: ENORC6 (Bit 6) */ +#define SCU_GENERAL_GORCEN_ENORC6_Msk (0x40UL) /*!< SCU_GENERAL GORCEN: ENORC6 (Bitfield-Mask: 0x01) */ +#define SCU_GENERAL_GORCEN_ENORC7_Pos (7UL) /*!< SCU_GENERAL GORCEN: ENORC7 (Bit 7) */ +#define SCU_GENERAL_GORCEN_ENORC7_Msk (0x80UL) /*!< SCU_GENERAL GORCEN: ENORC7 (Bitfield-Mask: 0x01) */ + +/* ---------------------------- SCU_GENERAL_DTEMPLIM ---------------------------- */ +#define SCU_GENERAL_DTEMPLIM_LOWER_Pos (0UL) /*!< SCU_GENERAL DTEMPLIM: LOWER (Bit 0) */ +#define SCU_GENERAL_DTEMPLIM_LOWER_Msk (0x3ffUL) /*!< SCU_GENERAL DTEMPLIM: LOWER (Bitfield-Mask: 0x3ff) */ +#define SCU_GENERAL_DTEMPLIM_UPPER_Pos (16UL) /*!< SCU_GENERAL DTEMPLIM: UPPER (Bit 16) */ +#define SCU_GENERAL_DTEMPLIM_UPPER_Msk (0x3ff0000UL) /*!< SCU_GENERAL DTEMPLIM: UPPER (Bitfield-Mask: 0x3ff) */ + +/* --------------------------- SCU_GENERAL_DTEMPALARM --------------------------- */ +#define SCU_GENERAL_DTEMPALARM_UNDERFL_Pos (0UL) /*!< SCU_GENERAL DTEMPALARM: UNDERFL (Bit 0) */ +#define SCU_GENERAL_DTEMPALARM_UNDERFL_Msk (0x1UL) /*!< SCU_GENERAL DTEMPALARM: UNDERFL (Bitfield-Mask: 0x01) */ +#define SCU_GENERAL_DTEMPALARM_OVERFL_Pos (16UL) /*!< SCU_GENERAL DTEMPALARM: OVERFL (Bit 16) */ +#define SCU_GENERAL_DTEMPALARM_OVERFL_Msk (0x10000UL) /*!< SCU_GENERAL DTEMPALARM: OVERFL (Bitfield-Mask: 0x01) */ + +/* ----------------------------- SCU_GENERAL_MIRRSTS ---------------------------- */ +#define SCU_GENERAL_MIRRSTS_HDCLR_Pos (1UL) /*!< SCU_GENERAL MIRRSTS: HDCLR (Bit 1) */ +#define SCU_GENERAL_MIRRSTS_HDCLR_Msk (0x2UL) /*!< SCU_GENERAL MIRRSTS: HDCLR (Bitfield-Mask: 0x01) */ +#define SCU_GENERAL_MIRRSTS_HDSET_Pos (2UL) /*!< SCU_GENERAL MIRRSTS: HDSET (Bit 2) */ +#define SCU_GENERAL_MIRRSTS_HDSET_Msk (0x4UL) /*!< SCU_GENERAL MIRRSTS: HDSET (Bitfield-Mask: 0x01) */ +#define SCU_GENERAL_MIRRSTS_HDCR_Pos (3UL) /*!< SCU_GENERAL MIRRSTS: HDCR (Bit 3) */ +#define SCU_GENERAL_MIRRSTS_HDCR_Msk (0x8UL) /*!< SCU_GENERAL MIRRSTS: HDCR (Bitfield-Mask: 0x01) */ +#define SCU_GENERAL_MIRRSTS_OSCSICTRL_Pos (5UL) /*!< SCU_GENERAL MIRRSTS: OSCSICTRL (Bit 5) */ +#define SCU_GENERAL_MIRRSTS_OSCSICTRL_Msk (0x20UL) /*!< SCU_GENERAL MIRRSTS: OSCSICTRL (Bitfield-Mask: 0x01) */ +#define SCU_GENERAL_MIRRSTS_OSCULCTRL_Pos (7UL) /*!< SCU_GENERAL MIRRSTS: OSCULCTRL (Bit 7) */ +#define SCU_GENERAL_MIRRSTS_OSCULCTRL_Msk (0x80UL) /*!< SCU_GENERAL MIRRSTS: OSCULCTRL (Bitfield-Mask: 0x01) */ +#define SCU_GENERAL_MIRRSTS_RTC_CTR_Pos (8UL) /*!< SCU_GENERAL MIRRSTS: RTC_CTR (Bit 8) */ +#define SCU_GENERAL_MIRRSTS_RTC_CTR_Msk (0x100UL) /*!< SCU_GENERAL MIRRSTS: RTC_CTR (Bitfield-Mask: 0x01) */ +#define SCU_GENERAL_MIRRSTS_RTC_ATIM0_Pos (9UL) /*!< SCU_GENERAL MIRRSTS: RTC_ATIM0 (Bit 9) */ +#define SCU_GENERAL_MIRRSTS_RTC_ATIM0_Msk (0x200UL) /*!< SCU_GENERAL MIRRSTS: RTC_ATIM0 (Bitfield-Mask: 0x01) */ +#define SCU_GENERAL_MIRRSTS_RTC_ATIM1_Pos (10UL) /*!< SCU_GENERAL MIRRSTS: RTC_ATIM1 (Bit 10) */ +#define SCU_GENERAL_MIRRSTS_RTC_ATIM1_Msk (0x400UL) /*!< SCU_GENERAL MIRRSTS: RTC_ATIM1 (Bitfield-Mask: 0x01) */ +#define SCU_GENERAL_MIRRSTS_RTC_TIM0_Pos (11UL) /*!< SCU_GENERAL MIRRSTS: RTC_TIM0 (Bit 11) */ +#define SCU_GENERAL_MIRRSTS_RTC_TIM0_Msk (0x800UL) /*!< SCU_GENERAL MIRRSTS: RTC_TIM0 (Bitfield-Mask: 0x01) */ +#define SCU_GENERAL_MIRRSTS_RTC_TIM1_Pos (12UL) /*!< SCU_GENERAL MIRRSTS: RTC_TIM1 (Bit 12) */ +#define SCU_GENERAL_MIRRSTS_RTC_TIM1_Msk (0x1000UL) /*!< SCU_GENERAL MIRRSTS: RTC_TIM1 (Bitfield-Mask: 0x01) */ +#define SCU_GENERAL_MIRRSTS_RMX_Pos (13UL) /*!< SCU_GENERAL MIRRSTS: RMX (Bit 13) */ +#define SCU_GENERAL_MIRRSTS_RMX_Msk (0x2000UL) /*!< SCU_GENERAL MIRRSTS: RMX (Bitfield-Mask: 0x01) */ +#define SCU_GENERAL_MIRRSTS_RTC_MSKSR_Pos (14UL) /*!< SCU_GENERAL MIRRSTS: RTC_MSKSR (Bit 14) */ +#define SCU_GENERAL_MIRRSTS_RTC_MSKSR_Msk (0x4000UL) /*!< SCU_GENERAL MIRRSTS: RTC_MSKSR (Bitfield-Mask: 0x01) */ +#define SCU_GENERAL_MIRRSTS_RTC_CLRSR_Pos (15UL) /*!< SCU_GENERAL MIRRSTS: RTC_CLRSR (Bit 15) */ +#define SCU_GENERAL_MIRRSTS_RTC_CLRSR_Msk (0x8000UL) /*!< SCU_GENERAL MIRRSTS: RTC_CLRSR (Bitfield-Mask: 0x01) */ +#define SCU_GENERAL_MIRRSTS_LPACCONF_Pos (16UL) /*!< SCU_GENERAL MIRRSTS: LPACCONF (Bit 16) */ +#define SCU_GENERAL_MIRRSTS_LPACCONF_Msk (0x10000UL) /*!< SCU_GENERAL MIRRSTS: LPACCONF (Bitfield-Mask: 0x01) */ +#define SCU_GENERAL_MIRRSTS_LPACTH0_Pos (17UL) /*!< SCU_GENERAL MIRRSTS: LPACTH0 (Bit 17) */ +#define SCU_GENERAL_MIRRSTS_LPACTH0_Msk (0x20000UL) /*!< SCU_GENERAL MIRRSTS: LPACTH0 (Bitfield-Mask: 0x01) */ +#define SCU_GENERAL_MIRRSTS_LPACTH1_Pos (18UL) /*!< SCU_GENERAL MIRRSTS: LPACTH1 (Bit 18) */ +#define SCU_GENERAL_MIRRSTS_LPACTH1_Msk (0x40000UL) /*!< SCU_GENERAL MIRRSTS: LPACTH1 (Bitfield-Mask: 0x01) */ +#define SCU_GENERAL_MIRRSTS_LPACCLR_Pos (20UL) /*!< SCU_GENERAL MIRRSTS: LPACCLR (Bit 20) */ +#define SCU_GENERAL_MIRRSTS_LPACCLR_Msk (0x100000UL) /*!< SCU_GENERAL MIRRSTS: LPACCLR (Bitfield-Mask: 0x01) */ +#define SCU_GENERAL_MIRRSTS_LPACSET_Pos (21UL) /*!< SCU_GENERAL MIRRSTS: LPACSET (Bit 21) */ +#define SCU_GENERAL_MIRRSTS_LPACSET_Msk (0x200000UL) /*!< SCU_GENERAL MIRRSTS: LPACSET (Bitfield-Mask: 0x01) */ +#define SCU_GENERAL_MIRRSTS_HINTCLR_Pos (23UL) /*!< SCU_GENERAL MIRRSTS: HINTCLR (Bit 23) */ +#define SCU_GENERAL_MIRRSTS_HINTCLR_Msk (0x800000UL) /*!< SCU_GENERAL MIRRSTS: HINTCLR (Bitfield-Mask: 0x01) */ +#define SCU_GENERAL_MIRRSTS_HINTSET_Pos (24UL) /*!< SCU_GENERAL MIRRSTS: HINTSET (Bit 24) */ +#define SCU_GENERAL_MIRRSTS_HINTSET_Msk (0x1000000UL) /*!< SCU_GENERAL MIRRSTS: HINTSET (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_GENERAL_RMACR ----------------------------- */ +#define SCU_GENERAL_RMACR_RDWR_Pos (0UL) /*!< SCU_GENERAL RMACR: RDWR (Bit 0) */ +#define SCU_GENERAL_RMACR_RDWR_Msk (0x1UL) /*!< SCU_GENERAL RMACR: RDWR (Bitfield-Mask: 0x01) */ +#define SCU_GENERAL_RMACR_ADDR_Pos (16UL) /*!< SCU_GENERAL RMACR: ADDR (Bit 16) */ +#define SCU_GENERAL_RMACR_ADDR_Msk (0xf0000UL) /*!< SCU_GENERAL RMACR: ADDR (Bitfield-Mask: 0x0f) */ + +/* ----------------------------- SCU_GENERAL_RMDATA ----------------------------- */ +#define SCU_GENERAL_RMDATA_DATA_Pos (0UL) /*!< SCU_GENERAL RMDATA: DATA (Bit 0) */ +#define SCU_GENERAL_RMDATA_DATA_Msk (0xffffffffUL) /*!< SCU_GENERAL RMDATA: DATA (Bitfield-Mask: 0xffffffff) */ + +/* --------------------------- SCU_GENERAL_MIRRALLSTAT -------------------------- */ +#define SCU_GENERAL_MIRRALLSTAT_BUSY_Pos (0UL) /*!< SCU_GENERAL MIRRALLSTAT: BUSY (Bit 0) */ +#define SCU_GENERAL_MIRRALLSTAT_BUSY_Msk (0x1UL) /*!< SCU_GENERAL MIRRALLSTAT: BUSY (Bitfield-Mask: 0x01) */ + +/* --------------------------- SCU_GENERAL_MIRRALLREQ --------------------------- */ +#define SCU_GENERAL_MIRRALLREQ_REQ_Pos (0UL) /*!< SCU_GENERAL MIRRALLREQ: REQ (Bit 0) */ +#define SCU_GENERAL_MIRRALLREQ_REQ_Msk (0x1UL) /*!< SCU_GENERAL MIRRALLREQ: REQ (Bitfield-Mask: 0x01) */ + + +/* ================================================================================ */ +/* ================ struct 'SCU_INTERRUPT' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ---------------------------- SCU_INTERRUPT_SRSTAT ---------------------------- */ +#define SCU_INTERRUPT_SRSTAT_PRWARN_Pos (0UL) /*!< SCU_INTERRUPT SRSTAT: PRWARN (Bit 0) */ +#define SCU_INTERRUPT_SRSTAT_PRWARN_Msk (0x1UL) /*!< SCU_INTERRUPT SRSTAT: PRWARN (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSTAT_PI_Pos (1UL) /*!< SCU_INTERRUPT SRSTAT: PI (Bit 1) */ +#define SCU_INTERRUPT_SRSTAT_PI_Msk (0x2UL) /*!< SCU_INTERRUPT SRSTAT: PI (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSTAT_AI_Pos (2UL) /*!< SCU_INTERRUPT SRSTAT: AI (Bit 2) */ +#define SCU_INTERRUPT_SRSTAT_AI_Msk (0x4UL) /*!< SCU_INTERRUPT SRSTAT: AI (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSTAT_DLROVR_Pos (3UL) /*!< SCU_INTERRUPT SRSTAT: DLROVR (Bit 3) */ +#define SCU_INTERRUPT_SRSTAT_DLROVR_Msk (0x8UL) /*!< SCU_INTERRUPT SRSTAT: DLROVR (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSTAT_LPACCR_Pos (6UL) /*!< SCU_INTERRUPT SRSTAT: LPACCR (Bit 6) */ +#define SCU_INTERRUPT_SRSTAT_LPACCR_Msk (0x40UL) /*!< SCU_INTERRUPT SRSTAT: LPACCR (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSTAT_LPACTH0_Pos (7UL) /*!< SCU_INTERRUPT SRSTAT: LPACTH0 (Bit 7) */ +#define SCU_INTERRUPT_SRSTAT_LPACTH0_Msk (0x80UL) /*!< SCU_INTERRUPT SRSTAT: LPACTH0 (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSTAT_LPACTH1_Pos (8UL) /*!< SCU_INTERRUPT SRSTAT: LPACTH1 (Bit 8) */ +#define SCU_INTERRUPT_SRSTAT_LPACTH1_Msk (0x100UL) /*!< SCU_INTERRUPT SRSTAT: LPACTH1 (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSTAT_LPACST_Pos (9UL) /*!< SCU_INTERRUPT SRSTAT: LPACST (Bit 9) */ +#define SCU_INTERRUPT_SRSTAT_LPACST_Msk (0x200UL) /*!< SCU_INTERRUPT SRSTAT: LPACST (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSTAT_LPACCLR_Pos (10UL) /*!< SCU_INTERRUPT SRSTAT: LPACCLR (Bit 10) */ +#define SCU_INTERRUPT_SRSTAT_LPACCLR_Msk (0x400UL) /*!< SCU_INTERRUPT SRSTAT: LPACCLR (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSTAT_LPACSET_Pos (11UL) /*!< SCU_INTERRUPT SRSTAT: LPACSET (Bit 11) */ +#define SCU_INTERRUPT_SRSTAT_LPACSET_Msk (0x800UL) /*!< SCU_INTERRUPT SRSTAT: LPACSET (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSTAT_HINTST_Pos (12UL) /*!< SCU_INTERRUPT SRSTAT: HINTST (Bit 12) */ +#define SCU_INTERRUPT_SRSTAT_HINTST_Msk (0x1000UL) /*!< SCU_INTERRUPT SRSTAT: HINTST (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSTAT_HINTCLR_Pos (13UL) /*!< SCU_INTERRUPT SRSTAT: HINTCLR (Bit 13) */ +#define SCU_INTERRUPT_SRSTAT_HINTCLR_Msk (0x2000UL) /*!< SCU_INTERRUPT SRSTAT: HINTCLR (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSTAT_HINTSET_Pos (14UL) /*!< SCU_INTERRUPT SRSTAT: HINTSET (Bit 14) */ +#define SCU_INTERRUPT_SRSTAT_HINTSET_Msk (0x4000UL) /*!< SCU_INTERRUPT SRSTAT: HINTSET (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSTAT_HDCLR_Pos (17UL) /*!< SCU_INTERRUPT SRSTAT: HDCLR (Bit 17) */ +#define SCU_INTERRUPT_SRSTAT_HDCLR_Msk (0x20000UL) /*!< SCU_INTERRUPT SRSTAT: HDCLR (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSTAT_HDSET_Pos (18UL) /*!< SCU_INTERRUPT SRSTAT: HDSET (Bit 18) */ +#define SCU_INTERRUPT_SRSTAT_HDSET_Msk (0x40000UL) /*!< SCU_INTERRUPT SRSTAT: HDSET (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSTAT_HDCR_Pos (19UL) /*!< SCU_INTERRUPT SRSTAT: HDCR (Bit 19) */ +#define SCU_INTERRUPT_SRSTAT_HDCR_Msk (0x80000UL) /*!< SCU_INTERRUPT SRSTAT: HDCR (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSTAT_OSCSICTRL_Pos (21UL) /*!< SCU_INTERRUPT SRSTAT: OSCSICTRL (Bit 21) */ +#define SCU_INTERRUPT_SRSTAT_OSCSICTRL_Msk (0x200000UL) /*!< SCU_INTERRUPT SRSTAT: OSCSICTRL (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSTAT_OSCULCTRL_Pos (23UL) /*!< SCU_INTERRUPT SRSTAT: OSCULCTRL (Bit 23) */ +#define SCU_INTERRUPT_SRSTAT_OSCULCTRL_Msk (0x800000UL) /*!< SCU_INTERRUPT SRSTAT: OSCULCTRL (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSTAT_RTC_CTR_Pos (24UL) /*!< SCU_INTERRUPT SRSTAT: RTC_CTR (Bit 24) */ +#define SCU_INTERRUPT_SRSTAT_RTC_CTR_Msk (0x1000000UL) /*!< SCU_INTERRUPT SRSTAT: RTC_CTR (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSTAT_RTC_ATIM0_Pos (25UL) /*!< SCU_INTERRUPT SRSTAT: RTC_ATIM0 (Bit 25) */ +#define SCU_INTERRUPT_SRSTAT_RTC_ATIM0_Msk (0x2000000UL) /*!< SCU_INTERRUPT SRSTAT: RTC_ATIM0 (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSTAT_RTC_ATIM1_Pos (26UL) /*!< SCU_INTERRUPT SRSTAT: RTC_ATIM1 (Bit 26) */ +#define SCU_INTERRUPT_SRSTAT_RTC_ATIM1_Msk (0x4000000UL) /*!< SCU_INTERRUPT SRSTAT: RTC_ATIM1 (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSTAT_RTC_TIM0_Pos (27UL) /*!< SCU_INTERRUPT SRSTAT: RTC_TIM0 (Bit 27) */ +#define SCU_INTERRUPT_SRSTAT_RTC_TIM0_Msk (0x8000000UL) /*!< SCU_INTERRUPT SRSTAT: RTC_TIM0 (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSTAT_RTC_TIM1_Pos (28UL) /*!< SCU_INTERRUPT SRSTAT: RTC_TIM1 (Bit 28) */ +#define SCU_INTERRUPT_SRSTAT_RTC_TIM1_Msk (0x10000000UL) /*!< SCU_INTERRUPT SRSTAT: RTC_TIM1 (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSTAT_RMX_Pos (29UL) /*!< SCU_INTERRUPT SRSTAT: RMX (Bit 29) */ +#define SCU_INTERRUPT_SRSTAT_RMX_Msk (0x20000000UL) /*!< SCU_INTERRUPT SRSTAT: RMX (Bitfield-Mask: 0x01) */ + +/* ----------------------------- SCU_INTERRUPT_SRRAW ---------------------------- */ +#define SCU_INTERRUPT_SRRAW_PRWARN_Pos (0UL) /*!< SCU_INTERRUPT SRRAW: PRWARN (Bit 0) */ +#define SCU_INTERRUPT_SRRAW_PRWARN_Msk (0x1UL) /*!< SCU_INTERRUPT SRRAW: PRWARN (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRRAW_PI_Pos (1UL) /*!< SCU_INTERRUPT SRRAW: PI (Bit 1) */ +#define SCU_INTERRUPT_SRRAW_PI_Msk (0x2UL) /*!< SCU_INTERRUPT SRRAW: PI (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRRAW_AI_Pos (2UL) /*!< SCU_INTERRUPT SRRAW: AI (Bit 2) */ +#define SCU_INTERRUPT_SRRAW_AI_Msk (0x4UL) /*!< SCU_INTERRUPT SRRAW: AI (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRRAW_DLROVR_Pos (3UL) /*!< SCU_INTERRUPT SRRAW: DLROVR (Bit 3) */ +#define SCU_INTERRUPT_SRRAW_DLROVR_Msk (0x8UL) /*!< SCU_INTERRUPT SRRAW: DLROVR (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRRAW_LPACCR_Pos (6UL) /*!< SCU_INTERRUPT SRRAW: LPACCR (Bit 6) */ +#define SCU_INTERRUPT_SRRAW_LPACCR_Msk (0x40UL) /*!< SCU_INTERRUPT SRRAW: LPACCR (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRRAW_LPACTH0_Pos (7UL) /*!< SCU_INTERRUPT SRRAW: LPACTH0 (Bit 7) */ +#define SCU_INTERRUPT_SRRAW_LPACTH0_Msk (0x80UL) /*!< SCU_INTERRUPT SRRAW: LPACTH0 (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRRAW_LPACTH1_Pos (8UL) /*!< SCU_INTERRUPT SRRAW: LPACTH1 (Bit 8) */ +#define SCU_INTERRUPT_SRRAW_LPACTH1_Msk (0x100UL) /*!< SCU_INTERRUPT SRRAW: LPACTH1 (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRRAW_LPACST_Pos (9UL) /*!< SCU_INTERRUPT SRRAW: LPACST (Bit 9) */ +#define SCU_INTERRUPT_SRRAW_LPACST_Msk (0x200UL) /*!< SCU_INTERRUPT SRRAW: LPACST (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRRAW_LPACCLR_Pos (10UL) /*!< SCU_INTERRUPT SRRAW: LPACCLR (Bit 10) */ +#define SCU_INTERRUPT_SRRAW_LPACCLR_Msk (0x400UL) /*!< SCU_INTERRUPT SRRAW: LPACCLR (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRRAW_LPACSET_Pos (11UL) /*!< SCU_INTERRUPT SRRAW: LPACSET (Bit 11) */ +#define SCU_INTERRUPT_SRRAW_LPACSET_Msk (0x800UL) /*!< SCU_INTERRUPT SRRAW: LPACSET (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRRAW_HINTST_Pos (12UL) /*!< SCU_INTERRUPT SRRAW: HINTST (Bit 12) */ +#define SCU_INTERRUPT_SRRAW_HINTST_Msk (0x1000UL) /*!< SCU_INTERRUPT SRRAW: HINTST (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRRAW_HINTCLR_Pos (13UL) /*!< SCU_INTERRUPT SRRAW: HINTCLR (Bit 13) */ +#define SCU_INTERRUPT_SRRAW_HINTCLR_Msk (0x2000UL) /*!< SCU_INTERRUPT SRRAW: HINTCLR (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRRAW_HINTSET_Pos (14UL) /*!< SCU_INTERRUPT SRRAW: HINTSET (Bit 14) */ +#define SCU_INTERRUPT_SRRAW_HINTSET_Msk (0x4000UL) /*!< SCU_INTERRUPT SRRAW: HINTSET (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRRAW_HDCLR_Pos (17UL) /*!< SCU_INTERRUPT SRRAW: HDCLR (Bit 17) */ +#define SCU_INTERRUPT_SRRAW_HDCLR_Msk (0x20000UL) /*!< SCU_INTERRUPT SRRAW: HDCLR (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRRAW_HDSET_Pos (18UL) /*!< SCU_INTERRUPT SRRAW: HDSET (Bit 18) */ +#define SCU_INTERRUPT_SRRAW_HDSET_Msk (0x40000UL) /*!< SCU_INTERRUPT SRRAW: HDSET (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRRAW_HDCR_Pos (19UL) /*!< SCU_INTERRUPT SRRAW: HDCR (Bit 19) */ +#define SCU_INTERRUPT_SRRAW_HDCR_Msk (0x80000UL) /*!< SCU_INTERRUPT SRRAW: HDCR (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRRAW_OSCSICTRL_Pos (21UL) /*!< SCU_INTERRUPT SRRAW: OSCSICTRL (Bit 21) */ +#define SCU_INTERRUPT_SRRAW_OSCSICTRL_Msk (0x200000UL) /*!< SCU_INTERRUPT SRRAW: OSCSICTRL (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRRAW_OSCULCTRL_Pos (23UL) /*!< SCU_INTERRUPT SRRAW: OSCULCTRL (Bit 23) */ +#define SCU_INTERRUPT_SRRAW_OSCULCTRL_Msk (0x800000UL) /*!< SCU_INTERRUPT SRRAW: OSCULCTRL (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRRAW_RTC_CTR_Pos (24UL) /*!< SCU_INTERRUPT SRRAW: RTC_CTR (Bit 24) */ +#define SCU_INTERRUPT_SRRAW_RTC_CTR_Msk (0x1000000UL) /*!< SCU_INTERRUPT SRRAW: RTC_CTR (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRRAW_RTC_ATIM0_Pos (25UL) /*!< SCU_INTERRUPT SRRAW: RTC_ATIM0 (Bit 25) */ +#define SCU_INTERRUPT_SRRAW_RTC_ATIM0_Msk (0x2000000UL) /*!< SCU_INTERRUPT SRRAW: RTC_ATIM0 (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRRAW_RTC_ATIM1_Pos (26UL) /*!< SCU_INTERRUPT SRRAW: RTC_ATIM1 (Bit 26) */ +#define SCU_INTERRUPT_SRRAW_RTC_ATIM1_Msk (0x4000000UL) /*!< SCU_INTERRUPT SRRAW: RTC_ATIM1 (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRRAW_RTC_TIM0_Pos (27UL) /*!< SCU_INTERRUPT SRRAW: RTC_TIM0 (Bit 27) */ +#define SCU_INTERRUPT_SRRAW_RTC_TIM0_Msk (0x8000000UL) /*!< SCU_INTERRUPT SRRAW: RTC_TIM0 (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRRAW_RTC_TIM1_Pos (28UL) /*!< SCU_INTERRUPT SRRAW: RTC_TIM1 (Bit 28) */ +#define SCU_INTERRUPT_SRRAW_RTC_TIM1_Msk (0x10000000UL) /*!< SCU_INTERRUPT SRRAW: RTC_TIM1 (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRRAW_RMX_Pos (29UL) /*!< SCU_INTERRUPT SRRAW: RMX (Bit 29) */ +#define SCU_INTERRUPT_SRRAW_RMX_Msk (0x20000000UL) /*!< SCU_INTERRUPT SRRAW: RMX (Bitfield-Mask: 0x01) */ + +/* ----------------------------- SCU_INTERRUPT_SRMSK ---------------------------- */ +#define SCU_INTERRUPT_SRMSK_PRWARN_Pos (0UL) /*!< SCU_INTERRUPT SRMSK: PRWARN (Bit 0) */ +#define SCU_INTERRUPT_SRMSK_PRWARN_Msk (0x1UL) /*!< SCU_INTERRUPT SRMSK: PRWARN (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRMSK_PI_Pos (1UL) /*!< SCU_INTERRUPT SRMSK: PI (Bit 1) */ +#define SCU_INTERRUPT_SRMSK_PI_Msk (0x2UL) /*!< SCU_INTERRUPT SRMSK: PI (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRMSK_AI_Pos (2UL) /*!< SCU_INTERRUPT SRMSK: AI (Bit 2) */ +#define SCU_INTERRUPT_SRMSK_AI_Msk (0x4UL) /*!< SCU_INTERRUPT SRMSK: AI (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRMSK_DLROVR_Pos (3UL) /*!< SCU_INTERRUPT SRMSK: DLROVR (Bit 3) */ +#define SCU_INTERRUPT_SRMSK_DLROVR_Msk (0x8UL) /*!< SCU_INTERRUPT SRMSK: DLROVR (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRMSK_LPACCR_Pos (6UL) /*!< SCU_INTERRUPT SRMSK: LPACCR (Bit 6) */ +#define SCU_INTERRUPT_SRMSK_LPACCR_Msk (0x40UL) /*!< SCU_INTERRUPT SRMSK: LPACCR (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRMSK_LPACTH0_Pos (7UL) /*!< SCU_INTERRUPT SRMSK: LPACTH0 (Bit 7) */ +#define SCU_INTERRUPT_SRMSK_LPACTH0_Msk (0x80UL) /*!< SCU_INTERRUPT SRMSK: LPACTH0 (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRMSK_LPACTH1_Pos (8UL) /*!< SCU_INTERRUPT SRMSK: LPACTH1 (Bit 8) */ +#define SCU_INTERRUPT_SRMSK_LPACTH1_Msk (0x100UL) /*!< SCU_INTERRUPT SRMSK: LPACTH1 (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRMSK_LPACST_Pos (9UL) /*!< SCU_INTERRUPT SRMSK: LPACST (Bit 9) */ +#define SCU_INTERRUPT_SRMSK_LPACST_Msk (0x200UL) /*!< SCU_INTERRUPT SRMSK: LPACST (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRMSK_LPACCLR_Pos (10UL) /*!< SCU_INTERRUPT SRMSK: LPACCLR (Bit 10) */ +#define SCU_INTERRUPT_SRMSK_LPACCLR_Msk (0x400UL) /*!< SCU_INTERRUPT SRMSK: LPACCLR (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRMSK_LPACSET_Pos (11UL) /*!< SCU_INTERRUPT SRMSK: LPACSET (Bit 11) */ +#define SCU_INTERRUPT_SRMSK_LPACSET_Msk (0x800UL) /*!< SCU_INTERRUPT SRMSK: LPACSET (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRMSK_HINTST_Pos (12UL) /*!< SCU_INTERRUPT SRMSK: HINTST (Bit 12) */ +#define SCU_INTERRUPT_SRMSK_HINTST_Msk (0x1000UL) /*!< SCU_INTERRUPT SRMSK: HINTST (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRMSK_HINTCLR_Pos (13UL) /*!< SCU_INTERRUPT SRMSK: HINTCLR (Bit 13) */ +#define SCU_INTERRUPT_SRMSK_HINTCLR_Msk (0x2000UL) /*!< SCU_INTERRUPT SRMSK: HINTCLR (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRMSK_HINTSET_Pos (14UL) /*!< SCU_INTERRUPT SRMSK: HINTSET (Bit 14) */ +#define SCU_INTERRUPT_SRMSK_HINTSET_Msk (0x4000UL) /*!< SCU_INTERRUPT SRMSK: HINTSET (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRMSK_HDCLR_Pos (17UL) /*!< SCU_INTERRUPT SRMSK: HDCLR (Bit 17) */ +#define SCU_INTERRUPT_SRMSK_HDCLR_Msk (0x20000UL) /*!< SCU_INTERRUPT SRMSK: HDCLR (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRMSK_HDSET_Pos (18UL) /*!< SCU_INTERRUPT SRMSK: HDSET (Bit 18) */ +#define SCU_INTERRUPT_SRMSK_HDSET_Msk (0x40000UL) /*!< SCU_INTERRUPT SRMSK: HDSET (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRMSK_HDCR_Pos (19UL) /*!< SCU_INTERRUPT SRMSK: HDCR (Bit 19) */ +#define SCU_INTERRUPT_SRMSK_HDCR_Msk (0x80000UL) /*!< SCU_INTERRUPT SRMSK: HDCR (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRMSK_OSCSICTRL_Pos (21UL) /*!< SCU_INTERRUPT SRMSK: OSCSICTRL (Bit 21) */ +#define SCU_INTERRUPT_SRMSK_OSCSICTRL_Msk (0x200000UL) /*!< SCU_INTERRUPT SRMSK: OSCSICTRL (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRMSK_OSCULCTRL_Pos (23UL) /*!< SCU_INTERRUPT SRMSK: OSCULCTRL (Bit 23) */ +#define SCU_INTERRUPT_SRMSK_OSCULCTRL_Msk (0x800000UL) /*!< SCU_INTERRUPT SRMSK: OSCULCTRL (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRMSK_RTC_CTR_Pos (24UL) /*!< SCU_INTERRUPT SRMSK: RTC_CTR (Bit 24) */ +#define SCU_INTERRUPT_SRMSK_RTC_CTR_Msk (0x1000000UL) /*!< SCU_INTERRUPT SRMSK: RTC_CTR (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRMSK_RTC_ATIM0_Pos (25UL) /*!< SCU_INTERRUPT SRMSK: RTC_ATIM0 (Bit 25) */ +#define SCU_INTERRUPT_SRMSK_RTC_ATIM0_Msk (0x2000000UL) /*!< SCU_INTERRUPT SRMSK: RTC_ATIM0 (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRMSK_RTC_ATIM1_Pos (26UL) /*!< SCU_INTERRUPT SRMSK: RTC_ATIM1 (Bit 26) */ +#define SCU_INTERRUPT_SRMSK_RTC_ATIM1_Msk (0x4000000UL) /*!< SCU_INTERRUPT SRMSK: RTC_ATIM1 (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRMSK_RTC_TIM0_Pos (27UL) /*!< SCU_INTERRUPT SRMSK: RTC_TIM0 (Bit 27) */ +#define SCU_INTERRUPT_SRMSK_RTC_TIM0_Msk (0x8000000UL) /*!< SCU_INTERRUPT SRMSK: RTC_TIM0 (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRMSK_RTC_TIM1_Pos (28UL) /*!< SCU_INTERRUPT SRMSK: RTC_TIM1 (Bit 28) */ +#define SCU_INTERRUPT_SRMSK_RTC_TIM1_Msk (0x10000000UL) /*!< SCU_INTERRUPT SRMSK: RTC_TIM1 (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRMSK_RMX_Pos (29UL) /*!< SCU_INTERRUPT SRMSK: RMX (Bit 29) */ +#define SCU_INTERRUPT_SRMSK_RMX_Msk (0x20000000UL) /*!< SCU_INTERRUPT SRMSK: RMX (Bitfield-Mask: 0x01) */ + +/* ----------------------------- SCU_INTERRUPT_SRCLR ---------------------------- */ +#define SCU_INTERRUPT_SRCLR_PRWARN_Pos (0UL) /*!< SCU_INTERRUPT SRCLR: PRWARN (Bit 0) */ +#define SCU_INTERRUPT_SRCLR_PRWARN_Msk (0x1UL) /*!< SCU_INTERRUPT SRCLR: PRWARN (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRCLR_PI_Pos (1UL) /*!< SCU_INTERRUPT SRCLR: PI (Bit 1) */ +#define SCU_INTERRUPT_SRCLR_PI_Msk (0x2UL) /*!< SCU_INTERRUPT SRCLR: PI (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRCLR_AI_Pos (2UL) /*!< SCU_INTERRUPT SRCLR: AI (Bit 2) */ +#define SCU_INTERRUPT_SRCLR_AI_Msk (0x4UL) /*!< SCU_INTERRUPT SRCLR: AI (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRCLR_DLROVR_Pos (3UL) /*!< SCU_INTERRUPT SRCLR: DLROVR (Bit 3) */ +#define SCU_INTERRUPT_SRCLR_DLROVR_Msk (0x8UL) /*!< SCU_INTERRUPT SRCLR: DLROVR (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRCLR_LPACCR_Pos (6UL) /*!< SCU_INTERRUPT SRCLR: LPACCR (Bit 6) */ +#define SCU_INTERRUPT_SRCLR_LPACCR_Msk (0x40UL) /*!< SCU_INTERRUPT SRCLR: LPACCR (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRCLR_LPACTH0_Pos (7UL) /*!< SCU_INTERRUPT SRCLR: LPACTH0 (Bit 7) */ +#define SCU_INTERRUPT_SRCLR_LPACTH0_Msk (0x80UL) /*!< SCU_INTERRUPT SRCLR: LPACTH0 (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRCLR_LPACTH1_Pos (8UL) /*!< SCU_INTERRUPT SRCLR: LPACTH1 (Bit 8) */ +#define SCU_INTERRUPT_SRCLR_LPACTH1_Msk (0x100UL) /*!< SCU_INTERRUPT SRCLR: LPACTH1 (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRCLR_LPACST_Pos (9UL) /*!< SCU_INTERRUPT SRCLR: LPACST (Bit 9) */ +#define SCU_INTERRUPT_SRCLR_LPACST_Msk (0x200UL) /*!< SCU_INTERRUPT SRCLR: LPACST (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRCLR_LPACCLR_Pos (10UL) /*!< SCU_INTERRUPT SRCLR: LPACCLR (Bit 10) */ +#define SCU_INTERRUPT_SRCLR_LPACCLR_Msk (0x400UL) /*!< SCU_INTERRUPT SRCLR: LPACCLR (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRCLR_LPACSET_Pos (11UL) /*!< SCU_INTERRUPT SRCLR: LPACSET (Bit 11) */ +#define SCU_INTERRUPT_SRCLR_LPACSET_Msk (0x800UL) /*!< SCU_INTERRUPT SRCLR: LPACSET (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRCLR_HINTST_Pos (12UL) /*!< SCU_INTERRUPT SRCLR: HINTST (Bit 12) */ +#define SCU_INTERRUPT_SRCLR_HINTST_Msk (0x1000UL) /*!< SCU_INTERRUPT SRCLR: HINTST (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRCLR_HINTCLR_Pos (13UL) /*!< SCU_INTERRUPT SRCLR: HINTCLR (Bit 13) */ +#define SCU_INTERRUPT_SRCLR_HINTCLR_Msk (0x2000UL) /*!< SCU_INTERRUPT SRCLR: HINTCLR (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRCLR_HINTSET_Pos (14UL) /*!< SCU_INTERRUPT SRCLR: HINTSET (Bit 14) */ +#define SCU_INTERRUPT_SRCLR_HINTSET_Msk (0x4000UL) /*!< SCU_INTERRUPT SRCLR: HINTSET (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRCLR_HDCLR_Pos (17UL) /*!< SCU_INTERRUPT SRCLR: HDCLR (Bit 17) */ +#define SCU_INTERRUPT_SRCLR_HDCLR_Msk (0x20000UL) /*!< SCU_INTERRUPT SRCLR: HDCLR (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRCLR_HDSET_Pos (18UL) /*!< SCU_INTERRUPT SRCLR: HDSET (Bit 18) */ +#define SCU_INTERRUPT_SRCLR_HDSET_Msk (0x40000UL) /*!< SCU_INTERRUPT SRCLR: HDSET (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRCLR_HDCR_Pos (19UL) /*!< SCU_INTERRUPT SRCLR: HDCR (Bit 19) */ +#define SCU_INTERRUPT_SRCLR_HDCR_Msk (0x80000UL) /*!< SCU_INTERRUPT SRCLR: HDCR (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRCLR_OSCSICTRL_Pos (21UL) /*!< SCU_INTERRUPT SRCLR: OSCSICTRL (Bit 21) */ +#define SCU_INTERRUPT_SRCLR_OSCSICTRL_Msk (0x200000UL) /*!< SCU_INTERRUPT SRCLR: OSCSICTRL (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRCLR_OSCULCTRL_Pos (23UL) /*!< SCU_INTERRUPT SRCLR: OSCULCTRL (Bit 23) */ +#define SCU_INTERRUPT_SRCLR_OSCULCTRL_Msk (0x800000UL) /*!< SCU_INTERRUPT SRCLR: OSCULCTRL (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRCLR_RTC_CTR_Pos (24UL) /*!< SCU_INTERRUPT SRCLR: RTC_CTR (Bit 24) */ +#define SCU_INTERRUPT_SRCLR_RTC_CTR_Msk (0x1000000UL) /*!< SCU_INTERRUPT SRCLR: RTC_CTR (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRCLR_RTC_ATIM0_Pos (25UL) /*!< SCU_INTERRUPT SRCLR: RTC_ATIM0 (Bit 25) */ +#define SCU_INTERRUPT_SRCLR_RTC_ATIM0_Msk (0x2000000UL) /*!< SCU_INTERRUPT SRCLR: RTC_ATIM0 (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRCLR_RTC_ATIM1_Pos (26UL) /*!< SCU_INTERRUPT SRCLR: RTC_ATIM1 (Bit 26) */ +#define SCU_INTERRUPT_SRCLR_RTC_ATIM1_Msk (0x4000000UL) /*!< SCU_INTERRUPT SRCLR: RTC_ATIM1 (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRCLR_RTC_TIM0_Pos (27UL) /*!< SCU_INTERRUPT SRCLR: RTC_TIM0 (Bit 27) */ +#define SCU_INTERRUPT_SRCLR_RTC_TIM0_Msk (0x8000000UL) /*!< SCU_INTERRUPT SRCLR: RTC_TIM0 (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRCLR_RTC_TIM1_Pos (28UL) /*!< SCU_INTERRUPT SRCLR: RTC_TIM1 (Bit 28) */ +#define SCU_INTERRUPT_SRCLR_RTC_TIM1_Msk (0x10000000UL) /*!< SCU_INTERRUPT SRCLR: RTC_TIM1 (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRCLR_RMX_Pos (29UL) /*!< SCU_INTERRUPT SRCLR: RMX (Bit 29) */ +#define SCU_INTERRUPT_SRCLR_RMX_Msk (0x20000000UL) /*!< SCU_INTERRUPT SRCLR: RMX (Bitfield-Mask: 0x01) */ + +/* ----------------------------- SCU_INTERRUPT_SRSET ---------------------------- */ +#define SCU_INTERRUPT_SRSET_PRWARN_Pos (0UL) /*!< SCU_INTERRUPT SRSET: PRWARN (Bit 0) */ +#define SCU_INTERRUPT_SRSET_PRWARN_Msk (0x1UL) /*!< SCU_INTERRUPT SRSET: PRWARN (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSET_PI_Pos (1UL) /*!< SCU_INTERRUPT SRSET: PI (Bit 1) */ +#define SCU_INTERRUPT_SRSET_PI_Msk (0x2UL) /*!< SCU_INTERRUPT SRSET: PI (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSET_AI_Pos (2UL) /*!< SCU_INTERRUPT SRSET: AI (Bit 2) */ +#define SCU_INTERRUPT_SRSET_AI_Msk (0x4UL) /*!< SCU_INTERRUPT SRSET: AI (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSET_DLROVR_Pos (3UL) /*!< SCU_INTERRUPT SRSET: DLROVR (Bit 3) */ +#define SCU_INTERRUPT_SRSET_DLROVR_Msk (0x8UL) /*!< SCU_INTERRUPT SRSET: DLROVR (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSET_LPACCR_Pos (6UL) /*!< SCU_INTERRUPT SRSET: LPACCR (Bit 6) */ +#define SCU_INTERRUPT_SRSET_LPACCR_Msk (0x40UL) /*!< SCU_INTERRUPT SRSET: LPACCR (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSET_LPACTH0_Pos (7UL) /*!< SCU_INTERRUPT SRSET: LPACTH0 (Bit 7) */ +#define SCU_INTERRUPT_SRSET_LPACTH0_Msk (0x80UL) /*!< SCU_INTERRUPT SRSET: LPACTH0 (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSET_LPACTH1_Pos (8UL) /*!< SCU_INTERRUPT SRSET: LPACTH1 (Bit 8) */ +#define SCU_INTERRUPT_SRSET_LPACTH1_Msk (0x100UL) /*!< SCU_INTERRUPT SRSET: LPACTH1 (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSET_LPACST_Pos (9UL) /*!< SCU_INTERRUPT SRSET: LPACST (Bit 9) */ +#define SCU_INTERRUPT_SRSET_LPACST_Msk (0x200UL) /*!< SCU_INTERRUPT SRSET: LPACST (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSET_LPACCLR_Pos (10UL) /*!< SCU_INTERRUPT SRSET: LPACCLR (Bit 10) */ +#define SCU_INTERRUPT_SRSET_LPACCLR_Msk (0x400UL) /*!< SCU_INTERRUPT SRSET: LPACCLR (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSET_LPACSET_Pos (11UL) /*!< SCU_INTERRUPT SRSET: LPACSET (Bit 11) */ +#define SCU_INTERRUPT_SRSET_LPACSET_Msk (0x800UL) /*!< SCU_INTERRUPT SRSET: LPACSET (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSET_HINTST_Pos (12UL) /*!< SCU_INTERRUPT SRSET: HINTST (Bit 12) */ +#define SCU_INTERRUPT_SRSET_HINTST_Msk (0x1000UL) /*!< SCU_INTERRUPT SRSET: HINTST (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSET_HINTCLR_Pos (13UL) /*!< SCU_INTERRUPT SRSET: HINTCLR (Bit 13) */ +#define SCU_INTERRUPT_SRSET_HINTCLR_Msk (0x2000UL) /*!< SCU_INTERRUPT SRSET: HINTCLR (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSET_HINTSET_Pos (14UL) /*!< SCU_INTERRUPT SRSET: HINTSET (Bit 14) */ +#define SCU_INTERRUPT_SRSET_HINTSET_Msk (0x4000UL) /*!< SCU_INTERRUPT SRSET: HINTSET (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSET_HDCRCLR_Pos (17UL) /*!< SCU_INTERRUPT SRSET: HDCRCLR (Bit 17) */ +#define SCU_INTERRUPT_SRSET_HDCRCLR_Msk (0x20000UL) /*!< SCU_INTERRUPT SRSET: HDCRCLR (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSET_HDCRSET_Pos (18UL) /*!< SCU_INTERRUPT SRSET: HDCRSET (Bit 18) */ +#define SCU_INTERRUPT_SRSET_HDCRSET_Msk (0x40000UL) /*!< SCU_INTERRUPT SRSET: HDCRSET (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSET_HDCR_Pos (19UL) /*!< SCU_INTERRUPT SRSET: HDCR (Bit 19) */ +#define SCU_INTERRUPT_SRSET_HDCR_Msk (0x80000UL) /*!< SCU_INTERRUPT SRSET: HDCR (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSET_OSCSICTRL_Pos (21UL) /*!< SCU_INTERRUPT SRSET: OSCSICTRL (Bit 21) */ +#define SCU_INTERRUPT_SRSET_OSCSICTRL_Msk (0x200000UL) /*!< SCU_INTERRUPT SRSET: OSCSICTRL (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSET_OSCULCTRL_Pos (23UL) /*!< SCU_INTERRUPT SRSET: OSCULCTRL (Bit 23) */ +#define SCU_INTERRUPT_SRSET_OSCULCTRL_Msk (0x800000UL) /*!< SCU_INTERRUPT SRSET: OSCULCTRL (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSET_RTC_CTR_Pos (24UL) /*!< SCU_INTERRUPT SRSET: RTC_CTR (Bit 24) */ +#define SCU_INTERRUPT_SRSET_RTC_CTR_Msk (0x1000000UL) /*!< SCU_INTERRUPT SRSET: RTC_CTR (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSET_RTC_ATIM0_Pos (25UL) /*!< SCU_INTERRUPT SRSET: RTC_ATIM0 (Bit 25) */ +#define SCU_INTERRUPT_SRSET_RTC_ATIM0_Msk (0x2000000UL) /*!< SCU_INTERRUPT SRSET: RTC_ATIM0 (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSET_RTC_ATIM1_Pos (26UL) /*!< SCU_INTERRUPT SRSET: RTC_ATIM1 (Bit 26) */ +#define SCU_INTERRUPT_SRSET_RTC_ATIM1_Msk (0x4000000UL) /*!< SCU_INTERRUPT SRSET: RTC_ATIM1 (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSET_RTC_TIM0_Pos (27UL) /*!< SCU_INTERRUPT SRSET: RTC_TIM0 (Bit 27) */ +#define SCU_INTERRUPT_SRSET_RTC_TIM0_Msk (0x8000000UL) /*!< SCU_INTERRUPT SRSET: RTC_TIM0 (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSET_RTC_TIM1_Pos (28UL) /*!< SCU_INTERRUPT SRSET: RTC_TIM1 (Bit 28) */ +#define SCU_INTERRUPT_SRSET_RTC_TIM1_Msk (0x10000000UL) /*!< SCU_INTERRUPT SRSET: RTC_TIM1 (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSET_RMX_Pos (29UL) /*!< SCU_INTERRUPT SRSET: RMX (Bit 29) */ +#define SCU_INTERRUPT_SRSET_RMX_Msk (0x20000000UL) /*!< SCU_INTERRUPT SRSET: RMX (Bitfield-Mask: 0x01) */ + +/* --------------------------- SCU_INTERRUPT_NMIREQEN --------------------------- */ +#define SCU_INTERRUPT_NMIREQEN_PRWARN_Pos (0UL) /*!< SCU_INTERRUPT NMIREQEN: PRWARN (Bit 0) */ +#define SCU_INTERRUPT_NMIREQEN_PRWARN_Msk (0x1UL) /*!< SCU_INTERRUPT NMIREQEN: PRWARN (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_NMIREQEN_PI_Pos (1UL) /*!< SCU_INTERRUPT NMIREQEN: PI (Bit 1) */ +#define SCU_INTERRUPT_NMIREQEN_PI_Msk (0x2UL) /*!< SCU_INTERRUPT NMIREQEN: PI (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_NMIREQEN_AI_Pos (2UL) /*!< SCU_INTERRUPT NMIREQEN: AI (Bit 2) */ +#define SCU_INTERRUPT_NMIREQEN_AI_Msk (0x4UL) /*!< SCU_INTERRUPT NMIREQEN: AI (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_NMIREQEN_ERU00_Pos (16UL) /*!< SCU_INTERRUPT NMIREQEN: ERU00 (Bit 16) */ +#define SCU_INTERRUPT_NMIREQEN_ERU00_Msk (0x10000UL) /*!< SCU_INTERRUPT NMIREQEN: ERU00 (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_NMIREQEN_ERU01_Pos (17UL) /*!< SCU_INTERRUPT NMIREQEN: ERU01 (Bit 17) */ +#define SCU_INTERRUPT_NMIREQEN_ERU01_Msk (0x20000UL) /*!< SCU_INTERRUPT NMIREQEN: ERU01 (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_NMIREQEN_ERU02_Pos (18UL) /*!< SCU_INTERRUPT NMIREQEN: ERU02 (Bit 18) */ +#define SCU_INTERRUPT_NMIREQEN_ERU02_Msk (0x40000UL) /*!< SCU_INTERRUPT NMIREQEN: ERU02 (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_NMIREQEN_ERU03_Pos (19UL) /*!< SCU_INTERRUPT NMIREQEN: ERU03 (Bit 19) */ +#define SCU_INTERRUPT_NMIREQEN_ERU03_Msk (0x80000UL) /*!< SCU_INTERRUPT NMIREQEN: ERU03 (Bitfield-Mask: 0x01) */ + + +/* ================================================================================ */ +/* ================ struct 'SCU_PARITY' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ------------------------------- SCU_PARITY_PEEN ------------------------------ */ +#define SCU_PARITY_PEEN_PEENPS_Pos (0UL) /*!< SCU_PARITY PEEN: PEENPS (Bit 0) */ +#define SCU_PARITY_PEEN_PEENPS_Msk (0x1UL) /*!< SCU_PARITY PEEN: PEENPS (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PEEN_PEENDS1_Pos (1UL) /*!< SCU_PARITY PEEN: PEENDS1 (Bit 1) */ +#define SCU_PARITY_PEEN_PEENDS1_Msk (0x2UL) /*!< SCU_PARITY PEEN: PEENDS1 (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PEEN_PEENU0_Pos (8UL) /*!< SCU_PARITY PEEN: PEENU0 (Bit 8) */ +#define SCU_PARITY_PEEN_PEENU0_Msk (0x100UL) /*!< SCU_PARITY PEEN: PEENU0 (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PEEN_PEENU1_Pos (9UL) /*!< SCU_PARITY PEEN: PEENU1 (Bit 9) */ +#define SCU_PARITY_PEEN_PEENU1_Msk (0x200UL) /*!< SCU_PARITY PEEN: PEENU1 (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PEEN_PEENMC_Pos (12UL) /*!< SCU_PARITY PEEN: PEENMC (Bit 12) */ +#define SCU_PARITY_PEEN_PEENMC_Msk (0x1000UL) /*!< SCU_PARITY PEEN: PEENMC (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PEEN_PEENPPRF_Pos (13UL) /*!< SCU_PARITY PEEN: PEENPPRF (Bit 13) */ +#define SCU_PARITY_PEEN_PEENPPRF_Msk (0x2000UL) /*!< SCU_PARITY PEEN: PEENPPRF (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PEEN_PEENUSB_Pos (16UL) /*!< SCU_PARITY PEEN: PEENUSB (Bit 16) */ +#define SCU_PARITY_PEEN_PEENUSB_Msk (0x10000UL) /*!< SCU_PARITY PEEN: PEENUSB (Bitfield-Mask: 0x01) */ + +/* ----------------------------- SCU_PARITY_MCHKCON ----------------------------- */ +#define SCU_PARITY_MCHKCON_SELPS_Pos (0UL) /*!< SCU_PARITY MCHKCON: SELPS (Bit 0) */ +#define SCU_PARITY_MCHKCON_SELPS_Msk (0x1UL) /*!< SCU_PARITY MCHKCON: SELPS (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_MCHKCON_SELDS1_Pos (1UL) /*!< SCU_PARITY MCHKCON: SELDS1 (Bit 1) */ +#define SCU_PARITY_MCHKCON_SELDS1_Msk (0x2UL) /*!< SCU_PARITY MCHKCON: SELDS1 (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_MCHKCON_USIC0DRA_Pos (8UL) /*!< SCU_PARITY MCHKCON: USIC0DRA (Bit 8) */ +#define SCU_PARITY_MCHKCON_USIC0DRA_Msk (0x100UL) /*!< SCU_PARITY MCHKCON: USIC0DRA (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_MCHKCON_USIC1DRA_Pos (9UL) /*!< SCU_PARITY MCHKCON: USIC1DRA (Bit 9) */ +#define SCU_PARITY_MCHKCON_USIC1DRA_Msk (0x200UL) /*!< SCU_PARITY MCHKCON: USIC1DRA (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_MCHKCON_MCANDRA_Pos (12UL) /*!< SCU_PARITY MCHKCON: MCANDRA (Bit 12) */ +#define SCU_PARITY_MCHKCON_MCANDRA_Msk (0x1000UL) /*!< SCU_PARITY MCHKCON: MCANDRA (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_MCHKCON_PPRFDRA_Pos (13UL) /*!< SCU_PARITY MCHKCON: PPRFDRA (Bit 13) */ +#define SCU_PARITY_MCHKCON_PPRFDRA_Msk (0x2000UL) /*!< SCU_PARITY MCHKCON: PPRFDRA (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_MCHKCON_SELUSB_Pos (16UL) /*!< SCU_PARITY MCHKCON: SELUSB (Bit 16) */ +#define SCU_PARITY_MCHKCON_SELUSB_Msk (0x10000UL) /*!< SCU_PARITY MCHKCON: SELUSB (Bitfield-Mask: 0x01) */ + +/* ------------------------------- SCU_PARITY_PETE ------------------------------ */ +#define SCU_PARITY_PETE_PETEPS_Pos (0UL) /*!< SCU_PARITY PETE: PETEPS (Bit 0) */ +#define SCU_PARITY_PETE_PETEPS_Msk (0x1UL) /*!< SCU_PARITY PETE: PETEPS (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PETE_PETEDS1_Pos (1UL) /*!< SCU_PARITY PETE: PETEDS1 (Bit 1) */ +#define SCU_PARITY_PETE_PETEDS1_Msk (0x2UL) /*!< SCU_PARITY PETE: PETEDS1 (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PETE_PETEU0_Pos (8UL) /*!< SCU_PARITY PETE: PETEU0 (Bit 8) */ +#define SCU_PARITY_PETE_PETEU0_Msk (0x100UL) /*!< SCU_PARITY PETE: PETEU0 (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PETE_PETEU1_Pos (9UL) /*!< SCU_PARITY PETE: PETEU1 (Bit 9) */ +#define SCU_PARITY_PETE_PETEU1_Msk (0x200UL) /*!< SCU_PARITY PETE: PETEU1 (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PETE_PETEMC_Pos (12UL) /*!< SCU_PARITY PETE: PETEMC (Bit 12) */ +#define SCU_PARITY_PETE_PETEMC_Msk (0x1000UL) /*!< SCU_PARITY PETE: PETEMC (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PETE_PETEPPRF_Pos (13UL) /*!< SCU_PARITY PETE: PETEPPRF (Bit 13) */ +#define SCU_PARITY_PETE_PETEPPRF_Msk (0x2000UL) /*!< SCU_PARITY PETE: PETEPPRF (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PETE_PETEUSB_Pos (16UL) /*!< SCU_PARITY PETE: PETEUSB (Bit 16) */ +#define SCU_PARITY_PETE_PETEUSB_Msk (0x10000UL) /*!< SCU_PARITY PETE: PETEUSB (Bitfield-Mask: 0x01) */ + +/* ----------------------------- SCU_PARITY_PERSTEN ----------------------------- */ +#define SCU_PARITY_PERSTEN_RSEN_Pos (0UL) /*!< SCU_PARITY PERSTEN: RSEN (Bit 0) */ +#define SCU_PARITY_PERSTEN_RSEN_Msk (0x1UL) /*!< SCU_PARITY PERSTEN: RSEN (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_PARITY_PEFLAG ----------------------------- */ +#define SCU_PARITY_PEFLAG_PEFPS_Pos (0UL) /*!< SCU_PARITY PEFLAG: PEFPS (Bit 0) */ +#define SCU_PARITY_PEFLAG_PEFPS_Msk (0x1UL) /*!< SCU_PARITY PEFLAG: PEFPS (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PEFLAG_PEFDS1_Pos (1UL) /*!< SCU_PARITY PEFLAG: PEFDS1 (Bit 1) */ +#define SCU_PARITY_PEFLAG_PEFDS1_Msk (0x2UL) /*!< SCU_PARITY PEFLAG: PEFDS1 (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PEFLAG_PEFU0_Pos (8UL) /*!< SCU_PARITY PEFLAG: PEFU0 (Bit 8) */ +#define SCU_PARITY_PEFLAG_PEFU0_Msk (0x100UL) /*!< SCU_PARITY PEFLAG: PEFU0 (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PEFLAG_PEFU1_Pos (9UL) /*!< SCU_PARITY PEFLAG: PEFU1 (Bit 9) */ +#define SCU_PARITY_PEFLAG_PEFU1_Msk (0x200UL) /*!< SCU_PARITY PEFLAG: PEFU1 (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PEFLAG_PEFMC_Pos (12UL) /*!< SCU_PARITY PEFLAG: PEFMC (Bit 12) */ +#define SCU_PARITY_PEFLAG_PEFMC_Msk (0x1000UL) /*!< SCU_PARITY PEFLAG: PEFMC (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PEFLAG_PEFPPRF_Pos (13UL) /*!< SCU_PARITY PEFLAG: PEFPPRF (Bit 13) */ +#define SCU_PARITY_PEFLAG_PEFPPRF_Msk (0x2000UL) /*!< SCU_PARITY PEFLAG: PEFPPRF (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PEFLAG_PEUSB_Pos (16UL) /*!< SCU_PARITY PEFLAG: PEUSB (Bit 16) */ +#define SCU_PARITY_PEFLAG_PEUSB_Msk (0x10000UL) /*!< SCU_PARITY PEFLAG: PEUSB (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_PARITY_PMTPR ------------------------------ */ +#define SCU_PARITY_PMTPR_PWR_Pos (0UL) /*!< SCU_PARITY PMTPR: PWR (Bit 0) */ +#define SCU_PARITY_PMTPR_PWR_Msk (0xffUL) /*!< SCU_PARITY PMTPR: PWR (Bitfield-Mask: 0xff) */ +#define SCU_PARITY_PMTPR_PRD_Pos (8UL) /*!< SCU_PARITY PMTPR: PRD (Bit 8) */ +#define SCU_PARITY_PMTPR_PRD_Msk (0xff00UL) /*!< SCU_PARITY PMTPR: PRD (Bitfield-Mask: 0xff) */ + +/* ------------------------------ SCU_PARITY_PMTSR ------------------------------ */ +#define SCU_PARITY_PMTSR_MTENPS_Pos (0UL) /*!< SCU_PARITY PMTSR: MTENPS (Bit 0) */ +#define SCU_PARITY_PMTSR_MTENPS_Msk (0x1UL) /*!< SCU_PARITY PMTSR: MTENPS (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PMTSR_MTENDS1_Pos (1UL) /*!< SCU_PARITY PMTSR: MTENDS1 (Bit 1) */ +#define SCU_PARITY_PMTSR_MTENDS1_Msk (0x2UL) /*!< SCU_PARITY PMTSR: MTENDS1 (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PMTSR_MTEU0_Pos (8UL) /*!< SCU_PARITY PMTSR: MTEU0 (Bit 8) */ +#define SCU_PARITY_PMTSR_MTEU0_Msk (0x100UL) /*!< SCU_PARITY PMTSR: MTEU0 (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PMTSR_MTEU1_Pos (9UL) /*!< SCU_PARITY PMTSR: MTEU1 (Bit 9) */ +#define SCU_PARITY_PMTSR_MTEU1_Msk (0x200UL) /*!< SCU_PARITY PMTSR: MTEU1 (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PMTSR_MTEMC_Pos (12UL) /*!< SCU_PARITY PMTSR: MTEMC (Bit 12) */ +#define SCU_PARITY_PMTSR_MTEMC_Msk (0x1000UL) /*!< SCU_PARITY PMTSR: MTEMC (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PMTSR_MTEPPRF_Pos (13UL) /*!< SCU_PARITY PMTSR: MTEPPRF (Bit 13) */ +#define SCU_PARITY_PMTSR_MTEPPRF_Msk (0x2000UL) /*!< SCU_PARITY PMTSR: MTEPPRF (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PMTSR_MTUSB_Pos (16UL) /*!< SCU_PARITY PMTSR: MTUSB (Bit 16) */ +#define SCU_PARITY_PMTSR_MTUSB_Msk (0x10000UL) /*!< SCU_PARITY PMTSR: MTUSB (Bitfield-Mask: 0x01) */ + + +/* ================================================================================ */ +/* ================ struct 'SCU_TRAP' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ------------------------------ SCU_TRAP_TRAPSTAT ----------------------------- */ +#define SCU_TRAP_TRAPSTAT_SOSCWDGT_Pos (0UL) /*!< SCU_TRAP TRAPSTAT: SOSCWDGT (Bit 0) */ +#define SCU_TRAP_TRAPSTAT_SOSCWDGT_Msk (0x1UL) /*!< SCU_TRAP TRAPSTAT: SOSCWDGT (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPSTAT_SVCOLCKT_Pos (2UL) /*!< SCU_TRAP TRAPSTAT: SVCOLCKT (Bit 2) */ +#define SCU_TRAP_TRAPSTAT_SVCOLCKT_Msk (0x4UL) /*!< SCU_TRAP TRAPSTAT: SVCOLCKT (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPSTAT_UVCOLCKT_Pos (3UL) /*!< SCU_TRAP TRAPSTAT: UVCOLCKT (Bit 3) */ +#define SCU_TRAP_TRAPSTAT_UVCOLCKT_Msk (0x8UL) /*!< SCU_TRAP TRAPSTAT: UVCOLCKT (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPSTAT_PET_Pos (4UL) /*!< SCU_TRAP TRAPSTAT: PET (Bit 4) */ +#define SCU_TRAP_TRAPSTAT_PET_Msk (0x10UL) /*!< SCU_TRAP TRAPSTAT: PET (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPSTAT_BRWNT_Pos (5UL) /*!< SCU_TRAP TRAPSTAT: BRWNT (Bit 5) */ +#define SCU_TRAP_TRAPSTAT_BRWNT_Msk (0x20UL) /*!< SCU_TRAP TRAPSTAT: BRWNT (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPSTAT_ULPWDGT_Pos (6UL) /*!< SCU_TRAP TRAPSTAT: ULPWDGT (Bit 6) */ +#define SCU_TRAP_TRAPSTAT_ULPWDGT_Msk (0x40UL) /*!< SCU_TRAP TRAPSTAT: ULPWDGT (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPSTAT_BWERR0T_Pos (7UL) /*!< SCU_TRAP TRAPSTAT: BWERR0T (Bit 7) */ +#define SCU_TRAP_TRAPSTAT_BWERR0T_Msk (0x80UL) /*!< SCU_TRAP TRAPSTAT: BWERR0T (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPSTAT_BWERR1T_Pos (8UL) /*!< SCU_TRAP TRAPSTAT: BWERR1T (Bit 8) */ +#define SCU_TRAP_TRAPSTAT_BWERR1T_Msk (0x100UL) /*!< SCU_TRAP TRAPSTAT: BWERR1T (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPSTAT_TEMPHIT_Pos (12UL) /*!< SCU_TRAP TRAPSTAT: TEMPHIT (Bit 12) */ +#define SCU_TRAP_TRAPSTAT_TEMPHIT_Msk (0x1000UL) /*!< SCU_TRAP TRAPSTAT: TEMPHIT (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPSTAT_TEMPLOT_Pos (13UL) /*!< SCU_TRAP TRAPSTAT: TEMPLOT (Bit 13) */ +#define SCU_TRAP_TRAPSTAT_TEMPLOT_Msk (0x2000UL) /*!< SCU_TRAP TRAPSTAT: TEMPLOT (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_TRAP_TRAPRAW ------------------------------ */ +#define SCU_TRAP_TRAPRAW_SOSCWDGT_Pos (0UL) /*!< SCU_TRAP TRAPRAW: SOSCWDGT (Bit 0) */ +#define SCU_TRAP_TRAPRAW_SOSCWDGT_Msk (0x1UL) /*!< SCU_TRAP TRAPRAW: SOSCWDGT (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPRAW_SVCOLCKT_Pos (2UL) /*!< SCU_TRAP TRAPRAW: SVCOLCKT (Bit 2) */ +#define SCU_TRAP_TRAPRAW_SVCOLCKT_Msk (0x4UL) /*!< SCU_TRAP TRAPRAW: SVCOLCKT (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPRAW_UVCOLCKT_Pos (3UL) /*!< SCU_TRAP TRAPRAW: UVCOLCKT (Bit 3) */ +#define SCU_TRAP_TRAPRAW_UVCOLCKT_Msk (0x8UL) /*!< SCU_TRAP TRAPRAW: UVCOLCKT (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPRAW_PET_Pos (4UL) /*!< SCU_TRAP TRAPRAW: PET (Bit 4) */ +#define SCU_TRAP_TRAPRAW_PET_Msk (0x10UL) /*!< SCU_TRAP TRAPRAW: PET (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPRAW_BRWNT_Pos (5UL) /*!< SCU_TRAP TRAPRAW: BRWNT (Bit 5) */ +#define SCU_TRAP_TRAPRAW_BRWNT_Msk (0x20UL) /*!< SCU_TRAP TRAPRAW: BRWNT (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPRAW_ULPWDGT_Pos (6UL) /*!< SCU_TRAP TRAPRAW: ULPWDGT (Bit 6) */ +#define SCU_TRAP_TRAPRAW_ULPWDGT_Msk (0x40UL) /*!< SCU_TRAP TRAPRAW: ULPWDGT (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPRAW_BWERR0T_Pos (7UL) /*!< SCU_TRAP TRAPRAW: BWERR0T (Bit 7) */ +#define SCU_TRAP_TRAPRAW_BWERR0T_Msk (0x80UL) /*!< SCU_TRAP TRAPRAW: BWERR0T (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPRAW_BWERR1T_Pos (8UL) /*!< SCU_TRAP TRAPRAW: BWERR1T (Bit 8) */ +#define SCU_TRAP_TRAPRAW_BWERR1T_Msk (0x100UL) /*!< SCU_TRAP TRAPRAW: BWERR1T (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPRAW_TEMPHIT_Pos (12UL) /*!< SCU_TRAP TRAPRAW: TEMPHIT (Bit 12) */ +#define SCU_TRAP_TRAPRAW_TEMPHIT_Msk (0x1000UL) /*!< SCU_TRAP TRAPRAW: TEMPHIT (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPRAW_TEMPLOT_Pos (13UL) /*!< SCU_TRAP TRAPRAW: TEMPLOT (Bit 13) */ +#define SCU_TRAP_TRAPRAW_TEMPLOT_Msk (0x2000UL) /*!< SCU_TRAP TRAPRAW: TEMPLOT (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_TRAP_TRAPDIS ------------------------------ */ +#define SCU_TRAP_TRAPDIS_SOSCWDGT_Pos (0UL) /*!< SCU_TRAP TRAPDIS: SOSCWDGT (Bit 0) */ +#define SCU_TRAP_TRAPDIS_SOSCWDGT_Msk (0x1UL) /*!< SCU_TRAP TRAPDIS: SOSCWDGT (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPDIS_SVCOLCKT_Pos (2UL) /*!< SCU_TRAP TRAPDIS: SVCOLCKT (Bit 2) */ +#define SCU_TRAP_TRAPDIS_SVCOLCKT_Msk (0x4UL) /*!< SCU_TRAP TRAPDIS: SVCOLCKT (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPDIS_UVCOLCKT_Pos (3UL) /*!< SCU_TRAP TRAPDIS: UVCOLCKT (Bit 3) */ +#define SCU_TRAP_TRAPDIS_UVCOLCKT_Msk (0x8UL) /*!< SCU_TRAP TRAPDIS: UVCOLCKT (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPDIS_PET_Pos (4UL) /*!< SCU_TRAP TRAPDIS: PET (Bit 4) */ +#define SCU_TRAP_TRAPDIS_PET_Msk (0x10UL) /*!< SCU_TRAP TRAPDIS: PET (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPDIS_BRWNT_Pos (5UL) /*!< SCU_TRAP TRAPDIS: BRWNT (Bit 5) */ +#define SCU_TRAP_TRAPDIS_BRWNT_Msk (0x20UL) /*!< SCU_TRAP TRAPDIS: BRWNT (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPDIS_ULPWDGT_Pos (6UL) /*!< SCU_TRAP TRAPDIS: ULPWDGT (Bit 6) */ +#define SCU_TRAP_TRAPDIS_ULPWDGT_Msk (0x40UL) /*!< SCU_TRAP TRAPDIS: ULPWDGT (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPDIS_BWERR0T_Pos (7UL) /*!< SCU_TRAP TRAPDIS: BWERR0T (Bit 7) */ +#define SCU_TRAP_TRAPDIS_BWERR0T_Msk (0x80UL) /*!< SCU_TRAP TRAPDIS: BWERR0T (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPDIS_BWERR1T_Pos (8UL) /*!< SCU_TRAP TRAPDIS: BWERR1T (Bit 8) */ +#define SCU_TRAP_TRAPDIS_BWERR1T_Msk (0x100UL) /*!< SCU_TRAP TRAPDIS: BWERR1T (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPDIS_TEMPHIT_Pos (12UL) /*!< SCU_TRAP TRAPDIS: TEMPHIT (Bit 12) */ +#define SCU_TRAP_TRAPDIS_TEMPHIT_Msk (0x1000UL) /*!< SCU_TRAP TRAPDIS: TEMPHIT (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPDIS_TEMPLOT_Pos (13UL) /*!< SCU_TRAP TRAPDIS: TEMPLOT (Bit 13) */ +#define SCU_TRAP_TRAPDIS_TEMPLOT_Msk (0x2000UL) /*!< SCU_TRAP TRAPDIS: TEMPLOT (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_TRAP_TRAPCLR ------------------------------ */ +#define SCU_TRAP_TRAPCLR_SOSCWDGT_Pos (0UL) /*!< SCU_TRAP TRAPCLR: SOSCWDGT (Bit 0) */ +#define SCU_TRAP_TRAPCLR_SOSCWDGT_Msk (0x1UL) /*!< SCU_TRAP TRAPCLR: SOSCWDGT (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPCLR_SVCOLCKT_Pos (2UL) /*!< SCU_TRAP TRAPCLR: SVCOLCKT (Bit 2) */ +#define SCU_TRAP_TRAPCLR_SVCOLCKT_Msk (0x4UL) /*!< SCU_TRAP TRAPCLR: SVCOLCKT (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPCLR_UVCOLCKT_Pos (3UL) /*!< SCU_TRAP TRAPCLR: UVCOLCKT (Bit 3) */ +#define SCU_TRAP_TRAPCLR_UVCOLCKT_Msk (0x8UL) /*!< SCU_TRAP TRAPCLR: UVCOLCKT (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPCLR_PET_Pos (4UL) /*!< SCU_TRAP TRAPCLR: PET (Bit 4) */ +#define SCU_TRAP_TRAPCLR_PET_Msk (0x10UL) /*!< SCU_TRAP TRAPCLR: PET (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPCLR_BRWNT_Pos (5UL) /*!< SCU_TRAP TRAPCLR: BRWNT (Bit 5) */ +#define SCU_TRAP_TRAPCLR_BRWNT_Msk (0x20UL) /*!< SCU_TRAP TRAPCLR: BRWNT (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPCLR_ULPWDGT_Pos (6UL) /*!< SCU_TRAP TRAPCLR: ULPWDGT (Bit 6) */ +#define SCU_TRAP_TRAPCLR_ULPWDGT_Msk (0x40UL) /*!< SCU_TRAP TRAPCLR: ULPWDGT (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPCLR_BWERR0T_Pos (7UL) /*!< SCU_TRAP TRAPCLR: BWERR0T (Bit 7) */ +#define SCU_TRAP_TRAPCLR_BWERR0T_Msk (0x80UL) /*!< SCU_TRAP TRAPCLR: BWERR0T (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPCLR_BWERR1T_Pos (8UL) /*!< SCU_TRAP TRAPCLR: BWERR1T (Bit 8) */ +#define SCU_TRAP_TRAPCLR_BWERR1T_Msk (0x100UL) /*!< SCU_TRAP TRAPCLR: BWERR1T (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPCLR_TEMPHIT_Pos (12UL) /*!< SCU_TRAP TRAPCLR: TEMPHIT (Bit 12) */ +#define SCU_TRAP_TRAPCLR_TEMPHIT_Msk (0x1000UL) /*!< SCU_TRAP TRAPCLR: TEMPHIT (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPCLR_TEMPLOT_Pos (13UL) /*!< SCU_TRAP TRAPCLR: TEMPLOT (Bit 13) */ +#define SCU_TRAP_TRAPCLR_TEMPLOT_Msk (0x2000UL) /*!< SCU_TRAP TRAPCLR: TEMPLOT (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_TRAP_TRAPSET ------------------------------ */ +#define SCU_TRAP_TRAPSET_SOSCWDGT_Pos (0UL) /*!< SCU_TRAP TRAPSET: SOSCWDGT (Bit 0) */ +#define SCU_TRAP_TRAPSET_SOSCWDGT_Msk (0x1UL) /*!< SCU_TRAP TRAPSET: SOSCWDGT (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPSET_SVCOLCKT_Pos (2UL) /*!< SCU_TRAP TRAPSET: SVCOLCKT (Bit 2) */ +#define SCU_TRAP_TRAPSET_SVCOLCKT_Msk (0x4UL) /*!< SCU_TRAP TRAPSET: SVCOLCKT (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPSET_UVCOLCKT_Pos (3UL) /*!< SCU_TRAP TRAPSET: UVCOLCKT (Bit 3) */ +#define SCU_TRAP_TRAPSET_UVCOLCKT_Msk (0x8UL) /*!< SCU_TRAP TRAPSET: UVCOLCKT (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPSET_PET_Pos (4UL) /*!< SCU_TRAP TRAPSET: PET (Bit 4) */ +#define SCU_TRAP_TRAPSET_PET_Msk (0x10UL) /*!< SCU_TRAP TRAPSET: PET (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPSET_BRWNT_Pos (5UL) /*!< SCU_TRAP TRAPSET: BRWNT (Bit 5) */ +#define SCU_TRAP_TRAPSET_BRWNT_Msk (0x20UL) /*!< SCU_TRAP TRAPSET: BRWNT (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPSET_ULPWDT_Pos (6UL) /*!< SCU_TRAP TRAPSET: ULPWDT (Bit 6) */ +#define SCU_TRAP_TRAPSET_ULPWDT_Msk (0x40UL) /*!< SCU_TRAP TRAPSET: ULPWDT (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPSET_BWERR0T_Pos (7UL) /*!< SCU_TRAP TRAPSET: BWERR0T (Bit 7) */ +#define SCU_TRAP_TRAPSET_BWERR0T_Msk (0x80UL) /*!< SCU_TRAP TRAPSET: BWERR0T (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPSET_BWERR1T_Pos (8UL) /*!< SCU_TRAP TRAPSET: BWERR1T (Bit 8) */ +#define SCU_TRAP_TRAPSET_BWERR1T_Msk (0x100UL) /*!< SCU_TRAP TRAPSET: BWERR1T (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPSET_TEMPHIT_Pos (12UL) /*!< SCU_TRAP TRAPSET: TEMPHIT (Bit 12) */ +#define SCU_TRAP_TRAPSET_TEMPHIT_Msk (0x1000UL) /*!< SCU_TRAP TRAPSET: TEMPHIT (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPSET_TEMPLOT_Pos (13UL) /*!< SCU_TRAP TRAPSET: TEMPLOT (Bit 13) */ +#define SCU_TRAP_TRAPSET_TEMPLOT_Msk (0x2000UL) /*!< SCU_TRAP TRAPSET: TEMPLOT (Bitfield-Mask: 0x01) */ + + +/* ================================================================================ */ +/* ================ struct 'SCU_HIBERNATE' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ---------------------------- SCU_HIBERNATE_HDSTAT ---------------------------- */ +#define SCU_HIBERNATE_HDSTAT_EPEV_Pos (0UL) /*!< SCU_HIBERNATE HDSTAT: EPEV (Bit 0) */ +#define SCU_HIBERNATE_HDSTAT_EPEV_Msk (0x1UL) /*!< SCU_HIBERNATE HDSTAT: EPEV (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HDSTAT_ENEV_Pos (1UL) /*!< SCU_HIBERNATE HDSTAT: ENEV (Bit 1) */ +#define SCU_HIBERNATE_HDSTAT_ENEV_Msk (0x2UL) /*!< SCU_HIBERNATE HDSTAT: ENEV (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HDSTAT_RTCEV_Pos (2UL) /*!< SCU_HIBERNATE HDSTAT: RTCEV (Bit 2) */ +#define SCU_HIBERNATE_HDSTAT_RTCEV_Msk (0x4UL) /*!< SCU_HIBERNATE HDSTAT: RTCEV (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HDSTAT_ULPWDG_Pos (3UL) /*!< SCU_HIBERNATE HDSTAT: ULPWDG (Bit 3) */ +#define SCU_HIBERNATE_HDSTAT_ULPWDG_Msk (0x8UL) /*!< SCU_HIBERNATE HDSTAT: ULPWDG (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HDSTAT_HIBNOUT_Pos (4UL) /*!< SCU_HIBERNATE HDSTAT: HIBNOUT (Bit 4) */ +#define SCU_HIBERNATE_HDSTAT_HIBNOUT_Msk (0x10UL) /*!< SCU_HIBERNATE HDSTAT: HIBNOUT (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HDSTAT_VBATPEV_Pos (8UL) /*!< SCU_HIBERNATE HDSTAT: VBATPEV (Bit 8) */ +#define SCU_HIBERNATE_HDSTAT_VBATPEV_Msk (0x100UL) /*!< SCU_HIBERNATE HDSTAT: VBATPEV (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HDSTAT_VBATNEV_Pos (9UL) /*!< SCU_HIBERNATE HDSTAT: VBATNEV (Bit 9) */ +#define SCU_HIBERNATE_HDSTAT_VBATNEV_Msk (0x200UL) /*!< SCU_HIBERNATE HDSTAT: VBATNEV (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HDSTAT_AHIBIO0PEV_Pos (10UL) /*!< SCU_HIBERNATE HDSTAT: AHIBIO0PEV (Bit 10) */ +#define SCU_HIBERNATE_HDSTAT_AHIBIO0PEV_Msk (0x400UL) /*!< SCU_HIBERNATE HDSTAT: AHIBIO0PEV (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HDSTAT_AHIBIO0NEV_Pos (11UL) /*!< SCU_HIBERNATE HDSTAT: AHIBIO0NEV (Bit 11) */ +#define SCU_HIBERNATE_HDSTAT_AHIBIO0NEV_Msk (0x800UL) /*!< SCU_HIBERNATE HDSTAT: AHIBIO0NEV (Bitfield-Mask: 0x01) */ + +/* ----------------------------- SCU_HIBERNATE_HDCLR ---------------------------- */ +#define SCU_HIBERNATE_HDCLR_EPEV_Pos (0UL) /*!< SCU_HIBERNATE HDCLR: EPEV (Bit 0) */ +#define SCU_HIBERNATE_HDCLR_EPEV_Msk (0x1UL) /*!< SCU_HIBERNATE HDCLR: EPEV (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HDCLR_ENEV_Pos (1UL) /*!< SCU_HIBERNATE HDCLR: ENEV (Bit 1) */ +#define SCU_HIBERNATE_HDCLR_ENEV_Msk (0x2UL) /*!< SCU_HIBERNATE HDCLR: ENEV (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HDCLR_RTCEV_Pos (2UL) /*!< SCU_HIBERNATE HDCLR: RTCEV (Bit 2) */ +#define SCU_HIBERNATE_HDCLR_RTCEV_Msk (0x4UL) /*!< SCU_HIBERNATE HDCLR: RTCEV (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HDCLR_ULPWDG_Pos (3UL) /*!< SCU_HIBERNATE HDCLR: ULPWDG (Bit 3) */ +#define SCU_HIBERNATE_HDCLR_ULPWDG_Msk (0x8UL) /*!< SCU_HIBERNATE HDCLR: ULPWDG (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HDCLR_VBATPEV_Pos (8UL) /*!< SCU_HIBERNATE HDCLR: VBATPEV (Bit 8) */ +#define SCU_HIBERNATE_HDCLR_VBATPEV_Msk (0x100UL) /*!< SCU_HIBERNATE HDCLR: VBATPEV (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HDCLR_VBATNEV_Pos (9UL) /*!< SCU_HIBERNATE HDCLR: VBATNEV (Bit 9) */ +#define SCU_HIBERNATE_HDCLR_VBATNEV_Msk (0x200UL) /*!< SCU_HIBERNATE HDCLR: VBATNEV (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HDCLR_AHIBIO0PEV_Pos (10UL) /*!< SCU_HIBERNATE HDCLR: AHIBIO0PEV (Bit 10) */ +#define SCU_HIBERNATE_HDCLR_AHIBIO0PEV_Msk (0x400UL) /*!< SCU_HIBERNATE HDCLR: AHIBIO0PEV (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HDCLR_AHIBIO0NEV_Pos (11UL) /*!< SCU_HIBERNATE HDCLR: AHIBIO0NEV (Bit 11) */ +#define SCU_HIBERNATE_HDCLR_AHIBIO0NEV_Msk (0x800UL) /*!< SCU_HIBERNATE HDCLR: AHIBIO0NEV (Bitfield-Mask: 0x01) */ + +/* ----------------------------- SCU_HIBERNATE_HDSET ---------------------------- */ +#define SCU_HIBERNATE_HDSET_EPEV_Pos (0UL) /*!< SCU_HIBERNATE HDSET: EPEV (Bit 0) */ +#define SCU_HIBERNATE_HDSET_EPEV_Msk (0x1UL) /*!< SCU_HIBERNATE HDSET: EPEV (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HDSET_ENEV_Pos (1UL) /*!< SCU_HIBERNATE HDSET: ENEV (Bit 1) */ +#define SCU_HIBERNATE_HDSET_ENEV_Msk (0x2UL) /*!< SCU_HIBERNATE HDSET: ENEV (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HDSET_RTCEV_Pos (2UL) /*!< SCU_HIBERNATE HDSET: RTCEV (Bit 2) */ +#define SCU_HIBERNATE_HDSET_RTCEV_Msk (0x4UL) /*!< SCU_HIBERNATE HDSET: RTCEV (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HDSET_ULPWDG_Pos (3UL) /*!< SCU_HIBERNATE HDSET: ULPWDG (Bit 3) */ +#define SCU_HIBERNATE_HDSET_ULPWDG_Msk (0x8UL) /*!< SCU_HIBERNATE HDSET: ULPWDG (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HDSET_VBATPEV_Pos (8UL) /*!< SCU_HIBERNATE HDSET: VBATPEV (Bit 8) */ +#define SCU_HIBERNATE_HDSET_VBATPEV_Msk (0x100UL) /*!< SCU_HIBERNATE HDSET: VBATPEV (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HDSET_VBATNEV_Pos (9UL) /*!< SCU_HIBERNATE HDSET: VBATNEV (Bit 9) */ +#define SCU_HIBERNATE_HDSET_VBATNEV_Msk (0x200UL) /*!< SCU_HIBERNATE HDSET: VBATNEV (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HDSET_AHIBIO0PEV_Pos (10UL) /*!< SCU_HIBERNATE HDSET: AHIBIO0PEV (Bit 10) */ +#define SCU_HIBERNATE_HDSET_AHIBIO0PEV_Msk (0x400UL) /*!< SCU_HIBERNATE HDSET: AHIBIO0PEV (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HDSET_AHIBIO0NEV_Pos (11UL) /*!< SCU_HIBERNATE HDSET: AHIBIO0NEV (Bit 11) */ +#define SCU_HIBERNATE_HDSET_AHIBIO0NEV_Msk (0x800UL) /*!< SCU_HIBERNATE HDSET: AHIBIO0NEV (Bitfield-Mask: 0x01) */ + +/* ----------------------------- SCU_HIBERNATE_HDCR ----------------------------- */ +#define SCU_HIBERNATE_HDCR_WKPEP_Pos (0UL) /*!< SCU_HIBERNATE HDCR: WKPEP (Bit 0) */ +#define SCU_HIBERNATE_HDCR_WKPEP_Msk (0x1UL) /*!< SCU_HIBERNATE HDCR: WKPEP (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HDCR_WKPEN_Pos (1UL) /*!< SCU_HIBERNATE HDCR: WKPEN (Bit 1) */ +#define SCU_HIBERNATE_HDCR_WKPEN_Msk (0x2UL) /*!< SCU_HIBERNATE HDCR: WKPEN (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HDCR_RTCE_Pos (2UL) /*!< SCU_HIBERNATE HDCR: RTCE (Bit 2) */ +#define SCU_HIBERNATE_HDCR_RTCE_Msk (0x4UL) /*!< SCU_HIBERNATE HDCR: RTCE (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HDCR_ULPWDGEN_Pos (3UL) /*!< SCU_HIBERNATE HDCR: ULPWDGEN (Bit 3) */ +#define SCU_HIBERNATE_HDCR_ULPWDGEN_Msk (0x8UL) /*!< SCU_HIBERNATE HDCR: ULPWDGEN (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HDCR_HIB_Pos (4UL) /*!< SCU_HIBERNATE HDCR: HIB (Bit 4) */ +#define SCU_HIBERNATE_HDCR_HIB_Msk (0x10UL) /*!< SCU_HIBERNATE HDCR: HIB (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HDCR_XTALGPI1SEL_Pos (5UL) /*!< SCU_HIBERNATE HDCR: XTALGPI1SEL (Bit 5) */ +#define SCU_HIBERNATE_HDCR_XTALGPI1SEL_Msk (0x20UL) /*!< SCU_HIBERNATE HDCR: XTALGPI1SEL (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HDCR_RCS_Pos (6UL) /*!< SCU_HIBERNATE HDCR: RCS (Bit 6) */ +#define SCU_HIBERNATE_HDCR_RCS_Msk (0x40UL) /*!< SCU_HIBERNATE HDCR: RCS (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HDCR_STDBYSEL_Pos (7UL) /*!< SCU_HIBERNATE HDCR: STDBYSEL (Bit 7) */ +#define SCU_HIBERNATE_HDCR_STDBYSEL_Msk (0x80UL) /*!< SCU_HIBERNATE HDCR: STDBYSEL (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HDCR_WKUPSEL_Pos (8UL) /*!< SCU_HIBERNATE HDCR: WKUPSEL (Bit 8) */ +#define SCU_HIBERNATE_HDCR_WKUPSEL_Msk (0x100UL) /*!< SCU_HIBERNATE HDCR: WKUPSEL (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HDCR_GPI0SEL_Pos (10UL) /*!< SCU_HIBERNATE HDCR: GPI0SEL (Bit 10) */ +#define SCU_HIBERNATE_HDCR_GPI0SEL_Msk (0x400UL) /*!< SCU_HIBERNATE HDCR: GPI0SEL (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HDCR_HIBIO0POL_Pos (12UL) /*!< SCU_HIBERNATE HDCR: HIBIO0POL (Bit 12) */ +#define SCU_HIBERNATE_HDCR_HIBIO0POL_Msk (0x1000UL) /*!< SCU_HIBERNATE HDCR: HIBIO0POL (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HDCR_ADIG0SEL_Pos (14UL) /*!< SCU_HIBERNATE HDCR: ADIG0SEL (Bit 14) */ +#define SCU_HIBERNATE_HDCR_ADIG0SEL_Msk (0x4000UL) /*!< SCU_HIBERNATE HDCR: ADIG0SEL (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HDCR_HIBIO0SEL_Pos (16UL) /*!< SCU_HIBERNATE HDCR: HIBIO0SEL (Bit 16) */ +#define SCU_HIBERNATE_HDCR_HIBIO0SEL_Msk (0xf0000UL) /*!< SCU_HIBERNATE HDCR: HIBIO0SEL (Bitfield-Mask: 0x0f) */ +#define SCU_HIBERNATE_HDCR_VBATLO_Pos (24UL) /*!< SCU_HIBERNATE HDCR: VBATLO (Bit 24) */ +#define SCU_HIBERNATE_HDCR_VBATLO_Msk (0x1000000UL) /*!< SCU_HIBERNATE HDCR: VBATLO (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HDCR_VBATHI_Pos (25UL) /*!< SCU_HIBERNATE HDCR: VBATHI (Bit 25) */ +#define SCU_HIBERNATE_HDCR_VBATHI_Msk (0x2000000UL) /*!< SCU_HIBERNATE HDCR: VBATHI (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HDCR_AHIBIO0LO_Pos (26UL) /*!< SCU_HIBERNATE HDCR: AHIBIO0LO (Bit 26) */ +#define SCU_HIBERNATE_HDCR_AHIBIO0LO_Msk (0x4000000UL) /*!< SCU_HIBERNATE HDCR: AHIBIO0LO (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HDCR_AHIBIO0HI_Pos (27UL) /*!< SCU_HIBERNATE HDCR: AHIBIO0HI (Bit 27) */ +#define SCU_HIBERNATE_HDCR_AHIBIO0HI_Msk (0x8000000UL) /*!< SCU_HIBERNATE HDCR: AHIBIO0HI (Bitfield-Mask: 0x01) */ + +/* --------------------------- SCU_HIBERNATE_OSCSICTRL -------------------------- */ +#define SCU_HIBERNATE_OSCSICTRL_PWD_Pos (0UL) /*!< SCU_HIBERNATE OSCSICTRL: PWD (Bit 0) */ +#define SCU_HIBERNATE_OSCSICTRL_PWD_Msk (0x1UL) /*!< SCU_HIBERNATE OSCSICTRL: PWD (Bitfield-Mask: 0x01) */ + +/* --------------------------- SCU_HIBERNATE_OSCULSTAT -------------------------- */ +#define SCU_HIBERNATE_OSCULSTAT_X1D_Pos (0UL) /*!< SCU_HIBERNATE OSCULSTAT: X1D (Bit 0) */ +#define SCU_HIBERNATE_OSCULSTAT_X1D_Msk (0x1UL) /*!< SCU_HIBERNATE OSCULSTAT: X1D (Bitfield-Mask: 0x01) */ + +/* --------------------------- SCU_HIBERNATE_OSCULCTRL -------------------------- */ +#define SCU_HIBERNATE_OSCULCTRL_X1DEN_Pos (0UL) /*!< SCU_HIBERNATE OSCULCTRL: X1DEN (Bit 0) */ +#define SCU_HIBERNATE_OSCULCTRL_X1DEN_Msk (0x1UL) /*!< SCU_HIBERNATE OSCULCTRL: X1DEN (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_OSCULCTRL_MODE_Pos (4UL) /*!< SCU_HIBERNATE OSCULCTRL: MODE (Bit 4) */ +#define SCU_HIBERNATE_OSCULCTRL_MODE_Msk (0x30UL) /*!< SCU_HIBERNATE OSCULCTRL: MODE (Bitfield-Mask: 0x03) */ + +/* --------------------------- SCU_HIBERNATE_LPACCONF --------------------------- */ +#define SCU_HIBERNATE_LPACCONF_CMPEN_Pos (0UL) /*!< SCU_HIBERNATE LPACCONF: CMPEN (Bit 0) */ +#define SCU_HIBERNATE_LPACCONF_CMPEN_Msk (0x7UL) /*!< SCU_HIBERNATE LPACCONF: CMPEN (Bitfield-Mask: 0x07) */ +#define SCU_HIBERNATE_LPACCONF_TRIGSEL_Pos (4UL) /*!< SCU_HIBERNATE LPACCONF: TRIGSEL (Bit 4) */ +#define SCU_HIBERNATE_LPACCONF_TRIGSEL_Msk (0x70UL) /*!< SCU_HIBERNATE LPACCONF: TRIGSEL (Bitfield-Mask: 0x07) */ +#define SCU_HIBERNATE_LPACCONF_CONVDEL_Pos (12UL) /*!< SCU_HIBERNATE LPACCONF: CONVDEL (Bit 12) */ +#define SCU_HIBERNATE_LPACCONF_CONVDEL_Msk (0x1000UL) /*!< SCU_HIBERNATE LPACCONF: CONVDEL (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_LPACCONF_INTERVCNT_Pos (16UL) /*!< SCU_HIBERNATE LPACCONF: INTERVCNT (Bit 16) */ +#define SCU_HIBERNATE_LPACCONF_INTERVCNT_Msk (0xfff0000UL) /*!< SCU_HIBERNATE LPACCONF: INTERVCNT (Bitfield-Mask: 0xfff) */ +#define SCU_HIBERNATE_LPACCONF_SETTLECNT_Pos (28UL) /*!< SCU_HIBERNATE LPACCONF: SETTLECNT (Bit 28) */ +#define SCU_HIBERNATE_LPACCONF_SETTLECNT_Msk (0xf0000000UL) /*!< SCU_HIBERNATE LPACCONF: SETTLECNT (Bitfield-Mask: 0x0f) */ + +/* ---------------------------- SCU_HIBERNATE_LPACTH0 --------------------------- */ +#define SCU_HIBERNATE_LPACTH0_VBATLO_Pos (0UL) /*!< SCU_HIBERNATE LPACTH0: VBATLO (Bit 0) */ +#define SCU_HIBERNATE_LPACTH0_VBATLO_Msk (0x3fUL) /*!< SCU_HIBERNATE LPACTH0: VBATLO (Bitfield-Mask: 0x3f) */ +#define SCU_HIBERNATE_LPACTH0_VBATHI_Pos (8UL) /*!< SCU_HIBERNATE LPACTH0: VBATHI (Bit 8) */ +#define SCU_HIBERNATE_LPACTH0_VBATHI_Msk (0x3f00UL) /*!< SCU_HIBERNATE LPACTH0: VBATHI (Bitfield-Mask: 0x3f) */ + +/* ---------------------------- SCU_HIBERNATE_LPACTH1 --------------------------- */ +#define SCU_HIBERNATE_LPACTH1_AHIBIO0LO_Pos (0UL) /*!< SCU_HIBERNATE LPACTH1: AHIBIO0LO (Bit 0) */ +#define SCU_HIBERNATE_LPACTH1_AHIBIO0LO_Msk (0x3fUL) /*!< SCU_HIBERNATE LPACTH1: AHIBIO0LO (Bitfield-Mask: 0x3f) */ +#define SCU_HIBERNATE_LPACTH1_AHIBIO0HI_Pos (8UL) /*!< SCU_HIBERNATE LPACTH1: AHIBIO0HI (Bit 8) */ +#define SCU_HIBERNATE_LPACTH1_AHIBIO0HI_Msk (0x3f00UL) /*!< SCU_HIBERNATE LPACTH1: AHIBIO0HI (Bitfield-Mask: 0x3f) */ + +/* ---------------------------- SCU_HIBERNATE_LPACST ---------------------------- */ +#define SCU_HIBERNATE_LPACST_VBATSCMP_Pos (0UL) /*!< SCU_HIBERNATE LPACST: VBATSCMP (Bit 0) */ +#define SCU_HIBERNATE_LPACST_VBATSCMP_Msk (0x1UL) /*!< SCU_HIBERNATE LPACST: VBATSCMP (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_LPACST_AHIBIO0SCMP_Pos (1UL) /*!< SCU_HIBERNATE LPACST: AHIBIO0SCMP (Bit 1) */ +#define SCU_HIBERNATE_LPACST_AHIBIO0SCMP_Msk (0x2UL) /*!< SCU_HIBERNATE LPACST: AHIBIO0SCMP (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_LPACST_VBATVAL_Pos (16UL) /*!< SCU_HIBERNATE LPACST: VBATVAL (Bit 16) */ +#define SCU_HIBERNATE_LPACST_VBATVAL_Msk (0x10000UL) /*!< SCU_HIBERNATE LPACST: VBATVAL (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_LPACST_AHIBIO0VAL_Pos (17UL) /*!< SCU_HIBERNATE LPACST: AHIBIO0VAL (Bit 17) */ +#define SCU_HIBERNATE_LPACST_AHIBIO0VAL_Msk (0x20000UL) /*!< SCU_HIBERNATE LPACST: AHIBIO0VAL (Bitfield-Mask: 0x01) */ + +/* ---------------------------- SCU_HIBERNATE_LPACCLR --------------------------- */ +#define SCU_HIBERNATE_LPACCLR_VBATSCMP_Pos (0UL) /*!< SCU_HIBERNATE LPACCLR: VBATSCMP (Bit 0) */ +#define SCU_HIBERNATE_LPACCLR_VBATSCMP_Msk (0x1UL) /*!< SCU_HIBERNATE LPACCLR: VBATSCMP (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_LPACCLR_AHIBIO0SCMP_Pos (1UL) /*!< SCU_HIBERNATE LPACCLR: AHIBIO0SCMP (Bit 1) */ +#define SCU_HIBERNATE_LPACCLR_AHIBIO0SCMP_Msk (0x2UL) /*!< SCU_HIBERNATE LPACCLR: AHIBIO0SCMP (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_LPACCLR_VBATVAL_Pos (16UL) /*!< SCU_HIBERNATE LPACCLR: VBATVAL (Bit 16) */ +#define SCU_HIBERNATE_LPACCLR_VBATVAL_Msk (0x10000UL) /*!< SCU_HIBERNATE LPACCLR: VBATVAL (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_LPACCLR_AHIBIO0VAL_Pos (17UL) /*!< SCU_HIBERNATE LPACCLR: AHIBIO0VAL (Bit 17) */ +#define SCU_HIBERNATE_LPACCLR_AHIBIO0VAL_Msk (0x20000UL) /*!< SCU_HIBERNATE LPACCLR: AHIBIO0VAL (Bitfield-Mask: 0x01) */ + +/* ---------------------------- SCU_HIBERNATE_LPACSET --------------------------- */ +#define SCU_HIBERNATE_LPACSET_VBATSCMP_Pos (0UL) /*!< SCU_HIBERNATE LPACSET: VBATSCMP (Bit 0) */ +#define SCU_HIBERNATE_LPACSET_VBATSCMP_Msk (0x1UL) /*!< SCU_HIBERNATE LPACSET: VBATSCMP (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_LPACSET_AHIBIO0SCMP_Pos (1UL) /*!< SCU_HIBERNATE LPACSET: AHIBIO0SCMP (Bit 1) */ +#define SCU_HIBERNATE_LPACSET_AHIBIO0SCMP_Msk (0x2UL) /*!< SCU_HIBERNATE LPACSET: AHIBIO0SCMP (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_LPACSET_VBATVAL_Pos (16UL) /*!< SCU_HIBERNATE LPACSET: VBATVAL (Bit 16) */ +#define SCU_HIBERNATE_LPACSET_VBATVAL_Msk (0x10000UL) /*!< SCU_HIBERNATE LPACSET: VBATVAL (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_LPACSET_AHIBIO0VAL_Pos (17UL) /*!< SCU_HIBERNATE LPACSET: AHIBIO0VAL (Bit 17) */ +#define SCU_HIBERNATE_LPACSET_AHIBIO0VAL_Msk (0x20000UL) /*!< SCU_HIBERNATE LPACSET: AHIBIO0VAL (Bitfield-Mask: 0x01) */ + +/* ---------------------------- SCU_HIBERNATE_HINTST ---------------------------- */ +#define SCU_HIBERNATE_HINTST_HIBNINT_Pos (0UL) /*!< SCU_HIBERNATE HINTST: HIBNINT (Bit 0) */ +#define SCU_HIBERNATE_HINTST_HIBNINT_Msk (0x1UL) /*!< SCU_HIBERNATE HINTST: HIBNINT (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HINTST_FLASHOFF_Pos (2UL) /*!< SCU_HIBERNATE HINTST: FLASHOFF (Bit 2) */ +#define SCU_HIBERNATE_HINTST_FLASHOFF_Msk (0x4UL) /*!< SCU_HIBERNATE HINTST: FLASHOFF (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HINTST_FLASHPD_Pos (3UL) /*!< SCU_HIBERNATE HINTST: FLASHPD (Bit 3) */ +#define SCU_HIBERNATE_HINTST_FLASHPD_Msk (0x8UL) /*!< SCU_HIBERNATE HINTST: FLASHPD (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HINTST_POFFD_Pos (4UL) /*!< SCU_HIBERNATE HINTST: POFFD (Bit 4) */ +#define SCU_HIBERNATE_HINTST_POFFD_Msk (0x10UL) /*!< SCU_HIBERNATE HINTST: POFFD (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HINTST_PPODEL_Pos (16UL) /*!< SCU_HIBERNATE HINTST: PPODEL (Bit 16) */ +#define SCU_HIBERNATE_HINTST_PPODEL_Msk (0x30000UL) /*!< SCU_HIBERNATE HINTST: PPODEL (Bitfield-Mask: 0x03) */ +#define SCU_HIBERNATE_HINTST_POFFH_Pos (20UL) /*!< SCU_HIBERNATE HINTST: POFFH (Bit 20) */ +#define SCU_HIBERNATE_HINTST_POFFH_Msk (0x100000UL) /*!< SCU_HIBERNATE HINTST: POFFH (Bitfield-Mask: 0x01) */ + +/* ---------------------------- SCU_HIBERNATE_HINTCLR --------------------------- */ +#define SCU_HIBERNATE_HINTCLR_HIBNINT_Pos (0UL) /*!< SCU_HIBERNATE HINTCLR: HIBNINT (Bit 0) */ +#define SCU_HIBERNATE_HINTCLR_HIBNINT_Msk (0x1UL) /*!< SCU_HIBERNATE HINTCLR: HIBNINT (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HINTCLR_FLASHOFF_Pos (2UL) /*!< SCU_HIBERNATE HINTCLR: FLASHOFF (Bit 2) */ +#define SCU_HIBERNATE_HINTCLR_FLASHOFF_Msk (0x4UL) /*!< SCU_HIBERNATE HINTCLR: FLASHOFF (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HINTCLR_FLASHPD_Pos (3UL) /*!< SCU_HIBERNATE HINTCLR: FLASHPD (Bit 3) */ +#define SCU_HIBERNATE_HINTCLR_FLASHPD_Msk (0x8UL) /*!< SCU_HIBERNATE HINTCLR: FLASHPD (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HINTCLR_POFFD_Pos (4UL) /*!< SCU_HIBERNATE HINTCLR: POFFD (Bit 4) */ +#define SCU_HIBERNATE_HINTCLR_POFFD_Msk (0x10UL) /*!< SCU_HIBERNATE HINTCLR: POFFD (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HINTCLR_PPODEL_Pos (16UL) /*!< SCU_HIBERNATE HINTCLR: PPODEL (Bit 16) */ +#define SCU_HIBERNATE_HINTCLR_PPODEL_Msk (0x30000UL) /*!< SCU_HIBERNATE HINTCLR: PPODEL (Bitfield-Mask: 0x03) */ +#define SCU_HIBERNATE_HINTCLR_POFFH_Pos (20UL) /*!< SCU_HIBERNATE HINTCLR: POFFH (Bit 20) */ +#define SCU_HIBERNATE_HINTCLR_POFFH_Msk (0x100000UL) /*!< SCU_HIBERNATE HINTCLR: POFFH (Bitfield-Mask: 0x01) */ + +/* ---------------------------- SCU_HIBERNATE_HINTSET --------------------------- */ +#define SCU_HIBERNATE_HINTSET_HIBNINT_Pos (0UL) /*!< SCU_HIBERNATE HINTSET: HIBNINT (Bit 0) */ +#define SCU_HIBERNATE_HINTSET_HIBNINT_Msk (0x1UL) /*!< SCU_HIBERNATE HINTSET: HIBNINT (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HINTSET_VCOREOFF_Pos (1UL) /*!< SCU_HIBERNATE HINTSET: VCOREOFF (Bit 1) */ +#define SCU_HIBERNATE_HINTSET_VCOREOFF_Msk (0x2UL) /*!< SCU_HIBERNATE HINTSET: VCOREOFF (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HINTSET_FLASHOFF_Pos (2UL) /*!< SCU_HIBERNATE HINTSET: FLASHOFF (Bit 2) */ +#define SCU_HIBERNATE_HINTSET_FLASHOFF_Msk (0x4UL) /*!< SCU_HIBERNATE HINTSET: FLASHOFF (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HINTSET_FLASHPD_Pos (3UL) /*!< SCU_HIBERNATE HINTSET: FLASHPD (Bit 3) */ +#define SCU_HIBERNATE_HINTSET_FLASHPD_Msk (0x8UL) /*!< SCU_HIBERNATE HINTSET: FLASHPD (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HINTSET_POFFD_Pos (4UL) /*!< SCU_HIBERNATE HINTSET: POFFD (Bit 4) */ +#define SCU_HIBERNATE_HINTSET_POFFD_Msk (0x10UL) /*!< SCU_HIBERNATE HINTSET: POFFD (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HINTSET_PPODEL_Pos (16UL) /*!< SCU_HIBERNATE HINTSET: PPODEL (Bit 16) */ +#define SCU_HIBERNATE_HINTSET_PPODEL_Msk (0x30000UL) /*!< SCU_HIBERNATE HINTSET: PPODEL (Bitfield-Mask: 0x03) */ +#define SCU_HIBERNATE_HINTSET_POFFH_Pos (20UL) /*!< SCU_HIBERNATE HINTSET: POFFH (Bit 20) */ +#define SCU_HIBERNATE_HINTSET_POFFH_Msk (0x100000UL) /*!< SCU_HIBERNATE HINTSET: POFFH (Bitfield-Mask: 0x01) */ + + +/* ================================================================================ */ +/* ================ struct 'SCU_POWER' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ------------------------------ SCU_POWER_PWRSTAT ----------------------------- */ +#define SCU_POWER_PWRSTAT_HIBEN_Pos (0UL) /*!< SCU_POWER PWRSTAT: HIBEN (Bit 0) */ +#define SCU_POWER_PWRSTAT_HIBEN_Msk (0x1UL) /*!< SCU_POWER PWRSTAT: HIBEN (Bitfield-Mask: 0x01) */ +#define SCU_POWER_PWRSTAT_USBPHYPDQ_Pos (16UL) /*!< SCU_POWER PWRSTAT: USBPHYPDQ (Bit 16) */ +#define SCU_POWER_PWRSTAT_USBPHYPDQ_Msk (0x10000UL) /*!< SCU_POWER PWRSTAT: USBPHYPDQ (Bitfield-Mask: 0x01) */ +#define SCU_POWER_PWRSTAT_USBPUWQ_Pos (18UL) /*!< SCU_POWER PWRSTAT: USBPUWQ (Bit 18) */ +#define SCU_POWER_PWRSTAT_USBPUWQ_Msk (0x40000UL) /*!< SCU_POWER PWRSTAT: USBPUWQ (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_POWER_PWRSET ------------------------------ */ +#define SCU_POWER_PWRSET_HIB_Pos (0UL) /*!< SCU_POWER PWRSET: HIB (Bit 0) */ +#define SCU_POWER_PWRSET_HIB_Msk (0x1UL) /*!< SCU_POWER PWRSET: HIB (Bitfield-Mask: 0x01) */ +#define SCU_POWER_PWRSET_USBPHYPDQ_Pos (16UL) /*!< SCU_POWER PWRSET: USBPHYPDQ (Bit 16) */ +#define SCU_POWER_PWRSET_USBPHYPDQ_Msk (0x10000UL) /*!< SCU_POWER PWRSET: USBPHYPDQ (Bitfield-Mask: 0x01) */ +#define SCU_POWER_PWRSET_USBPUWQ_Pos (18UL) /*!< SCU_POWER PWRSET: USBPUWQ (Bit 18) */ +#define SCU_POWER_PWRSET_USBPUWQ_Msk (0x40000UL) /*!< SCU_POWER PWRSET: USBPUWQ (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_POWER_PWRCLR ------------------------------ */ +#define SCU_POWER_PWRCLR_HIB_Pos (0UL) /*!< SCU_POWER PWRCLR: HIB (Bit 0) */ +#define SCU_POWER_PWRCLR_HIB_Msk (0x1UL) /*!< SCU_POWER PWRCLR: HIB (Bitfield-Mask: 0x01) */ +#define SCU_POWER_PWRCLR_USBPHYPDQ_Pos (16UL) /*!< SCU_POWER PWRCLR: USBPHYPDQ (Bit 16) */ +#define SCU_POWER_PWRCLR_USBPHYPDQ_Msk (0x10000UL) /*!< SCU_POWER PWRCLR: USBPHYPDQ (Bitfield-Mask: 0x01) */ +#define SCU_POWER_PWRCLR_USBPUWQ_Pos (18UL) /*!< SCU_POWER PWRCLR: USBPUWQ (Bit 18) */ +#define SCU_POWER_PWRCLR_USBPUWQ_Msk (0x40000UL) /*!< SCU_POWER PWRCLR: USBPUWQ (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_POWER_EVRSTAT ----------------------------- */ +#define SCU_POWER_EVRSTAT_OV13_Pos (1UL) /*!< SCU_POWER EVRSTAT: OV13 (Bit 1) */ +#define SCU_POWER_EVRSTAT_OV13_Msk (0x2UL) /*!< SCU_POWER EVRSTAT: OV13 (Bitfield-Mask: 0x01) */ + +/* ---------------------------- SCU_POWER_EVRVADCSTAT --------------------------- */ +#define SCU_POWER_EVRVADCSTAT_VADC13V_Pos (0UL) /*!< SCU_POWER EVRVADCSTAT: VADC13V (Bit 0) */ +#define SCU_POWER_EVRVADCSTAT_VADC13V_Msk (0xffUL) /*!< SCU_POWER EVRVADCSTAT: VADC13V (Bitfield-Mask: 0xff) */ +#define SCU_POWER_EVRVADCSTAT_VADC33V_Pos (8UL) /*!< SCU_POWER EVRVADCSTAT: VADC33V (Bit 8) */ +#define SCU_POWER_EVRVADCSTAT_VADC33V_Msk (0xff00UL) /*!< SCU_POWER EVRVADCSTAT: VADC33V (Bitfield-Mask: 0xff) */ + +/* ------------------------------ SCU_POWER_PWRMON ------------------------------ */ +#define SCU_POWER_PWRMON_THRS_Pos (0UL) /*!< SCU_POWER PWRMON: THRS (Bit 0) */ +#define SCU_POWER_PWRMON_THRS_Msk (0xffUL) /*!< SCU_POWER PWRMON: THRS (Bitfield-Mask: 0xff) */ +#define SCU_POWER_PWRMON_INTV_Pos (8UL) /*!< SCU_POWER PWRMON: INTV (Bit 8) */ +#define SCU_POWER_PWRMON_INTV_Msk (0xff00UL) /*!< SCU_POWER PWRMON: INTV (Bitfield-Mask: 0xff) */ +#define SCU_POWER_PWRMON_ENB_Pos (16UL) /*!< SCU_POWER PWRMON: ENB (Bit 16) */ +#define SCU_POWER_PWRMON_ENB_Msk (0x10000UL) /*!< SCU_POWER PWRMON: ENB (Bitfield-Mask: 0x01) */ + + +/* ================================================================================ */ +/* ================ struct 'SCU_RESET' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ------------------------------ SCU_RESET_RSTSTAT ----------------------------- */ +#define SCU_RESET_RSTSTAT_RSTSTAT_Pos (0UL) /*!< SCU_RESET RSTSTAT: RSTSTAT (Bit 0) */ +#define SCU_RESET_RSTSTAT_RSTSTAT_Msk (0xffUL) /*!< SCU_RESET RSTSTAT: RSTSTAT (Bitfield-Mask: 0xff) */ +#define SCU_RESET_RSTSTAT_HIBWK_Pos (8UL) /*!< SCU_RESET RSTSTAT: HIBWK (Bit 8) */ +#define SCU_RESET_RSTSTAT_HIBWK_Msk (0x100UL) /*!< SCU_RESET RSTSTAT: HIBWK (Bitfield-Mask: 0x01) */ +#define SCU_RESET_RSTSTAT_HIBRS_Pos (9UL) /*!< SCU_RESET RSTSTAT: HIBRS (Bit 9) */ +#define SCU_RESET_RSTSTAT_HIBRS_Msk (0x200UL) /*!< SCU_RESET RSTSTAT: HIBRS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_RSTSTAT_LCKEN_Pos (10UL) /*!< SCU_RESET RSTSTAT: LCKEN (Bit 10) */ +#define SCU_RESET_RSTSTAT_LCKEN_Msk (0x400UL) /*!< SCU_RESET RSTSTAT: LCKEN (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_RESET_RSTSET ------------------------------ */ +#define SCU_RESET_RSTSET_HIBWK_Pos (8UL) /*!< SCU_RESET RSTSET: HIBWK (Bit 8) */ +#define SCU_RESET_RSTSET_HIBWK_Msk (0x100UL) /*!< SCU_RESET RSTSET: HIBWK (Bitfield-Mask: 0x01) */ +#define SCU_RESET_RSTSET_HIBRS_Pos (9UL) /*!< SCU_RESET RSTSET: HIBRS (Bit 9) */ +#define SCU_RESET_RSTSET_HIBRS_Msk (0x200UL) /*!< SCU_RESET RSTSET: HIBRS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_RSTSET_LCKEN_Pos (10UL) /*!< SCU_RESET RSTSET: LCKEN (Bit 10) */ +#define SCU_RESET_RSTSET_LCKEN_Msk (0x400UL) /*!< SCU_RESET RSTSET: LCKEN (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_RESET_RSTCLR ------------------------------ */ +#define SCU_RESET_RSTCLR_RSCLR_Pos (0UL) /*!< SCU_RESET RSTCLR: RSCLR (Bit 0) */ +#define SCU_RESET_RSTCLR_RSCLR_Msk (0x1UL) /*!< SCU_RESET RSTCLR: RSCLR (Bitfield-Mask: 0x01) */ +#define SCU_RESET_RSTCLR_HIBWK_Pos (8UL) /*!< SCU_RESET RSTCLR: HIBWK (Bit 8) */ +#define SCU_RESET_RSTCLR_HIBWK_Msk (0x100UL) /*!< SCU_RESET RSTCLR: HIBWK (Bitfield-Mask: 0x01) */ +#define SCU_RESET_RSTCLR_HIBRS_Pos (9UL) /*!< SCU_RESET RSTCLR: HIBRS (Bit 9) */ +#define SCU_RESET_RSTCLR_HIBRS_Msk (0x200UL) /*!< SCU_RESET RSTCLR: HIBRS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_RSTCLR_LCKEN_Pos (10UL) /*!< SCU_RESET RSTCLR: LCKEN (Bit 10) */ +#define SCU_RESET_RSTCLR_LCKEN_Msk (0x400UL) /*!< SCU_RESET RSTCLR: LCKEN (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_RESET_PRSTAT0 ----------------------------- */ +#define SCU_RESET_PRSTAT0_VADCRS_Pos (0UL) /*!< SCU_RESET PRSTAT0: VADCRS (Bit 0) */ +#define SCU_RESET_PRSTAT0_VADCRS_Msk (0x1UL) /*!< SCU_RESET PRSTAT0: VADCRS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSTAT0_CCU40RS_Pos (2UL) /*!< SCU_RESET PRSTAT0: CCU40RS (Bit 2) */ +#define SCU_RESET_PRSTAT0_CCU40RS_Msk (0x4UL) /*!< SCU_RESET PRSTAT0: CCU40RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSTAT0_CCU41RS_Pos (3UL) /*!< SCU_RESET PRSTAT0: CCU41RS (Bit 3) */ +#define SCU_RESET_PRSTAT0_CCU41RS_Msk (0x8UL) /*!< SCU_RESET PRSTAT0: CCU41RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSTAT0_CCU80RS_Pos (7UL) /*!< SCU_RESET PRSTAT0: CCU80RS (Bit 7) */ +#define SCU_RESET_PRSTAT0_CCU80RS_Msk (0x80UL) /*!< SCU_RESET PRSTAT0: CCU80RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSTAT0_POSIF0RS_Pos (9UL) /*!< SCU_RESET PRSTAT0: POSIF0RS (Bit 9) */ +#define SCU_RESET_PRSTAT0_POSIF0RS_Msk (0x200UL) /*!< SCU_RESET PRSTAT0: POSIF0RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSTAT0_USIC0RS_Pos (11UL) /*!< SCU_RESET PRSTAT0: USIC0RS (Bit 11) */ +#define SCU_RESET_PRSTAT0_USIC0RS_Msk (0x800UL) /*!< SCU_RESET PRSTAT0: USIC0RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSTAT0_ERU1RS_Pos (16UL) /*!< SCU_RESET PRSTAT0: ERU1RS (Bit 16) */ +#define SCU_RESET_PRSTAT0_ERU1RS_Msk (0x10000UL) /*!< SCU_RESET PRSTAT0: ERU1RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSTAT0_HRPWM0RS_Pos (23UL) /*!< SCU_RESET PRSTAT0: HRPWM0RS (Bit 23) */ +#define SCU_RESET_PRSTAT0_HRPWM0RS_Msk (0x800000UL) /*!< SCU_RESET PRSTAT0: HRPWM0RS (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_RESET_PRSET0 ------------------------------ */ +#define SCU_RESET_PRSET0_VADCRS_Pos (0UL) /*!< SCU_RESET PRSET0: VADCRS (Bit 0) */ +#define SCU_RESET_PRSET0_VADCRS_Msk (0x1UL) /*!< SCU_RESET PRSET0: VADCRS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSET0_CCU40RS_Pos (2UL) /*!< SCU_RESET PRSET0: CCU40RS (Bit 2) */ +#define SCU_RESET_PRSET0_CCU40RS_Msk (0x4UL) /*!< SCU_RESET PRSET0: CCU40RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSET0_CCU41RS_Pos (3UL) /*!< SCU_RESET PRSET0: CCU41RS (Bit 3) */ +#define SCU_RESET_PRSET0_CCU41RS_Msk (0x8UL) /*!< SCU_RESET PRSET0: CCU41RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSET0_CCU80RS_Pos (7UL) /*!< SCU_RESET PRSET0: CCU80RS (Bit 7) */ +#define SCU_RESET_PRSET0_CCU80RS_Msk (0x80UL) /*!< SCU_RESET PRSET0: CCU80RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSET0_POSIF0RS_Pos (9UL) /*!< SCU_RESET PRSET0: POSIF0RS (Bit 9) */ +#define SCU_RESET_PRSET0_POSIF0RS_Msk (0x200UL) /*!< SCU_RESET PRSET0: POSIF0RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSET0_USIC0RS_Pos (11UL) /*!< SCU_RESET PRSET0: USIC0RS (Bit 11) */ +#define SCU_RESET_PRSET0_USIC0RS_Msk (0x800UL) /*!< SCU_RESET PRSET0: USIC0RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSET0_ERU1RS_Pos (16UL) /*!< SCU_RESET PRSET0: ERU1RS (Bit 16) */ +#define SCU_RESET_PRSET0_ERU1RS_Msk (0x10000UL) /*!< SCU_RESET PRSET0: ERU1RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSET0_HRPWM0RS_Pos (23UL) /*!< SCU_RESET PRSET0: HRPWM0RS (Bit 23) */ +#define SCU_RESET_PRSET0_HRPWM0RS_Msk (0x800000UL) /*!< SCU_RESET PRSET0: HRPWM0RS (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_RESET_PRCLR0 ------------------------------ */ +#define SCU_RESET_PRCLR0_VADCRS_Pos (0UL) /*!< SCU_RESET PRCLR0: VADCRS (Bit 0) */ +#define SCU_RESET_PRCLR0_VADCRS_Msk (0x1UL) /*!< SCU_RESET PRCLR0: VADCRS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRCLR0_CCU40RS_Pos (2UL) /*!< SCU_RESET PRCLR0: CCU40RS (Bit 2) */ +#define SCU_RESET_PRCLR0_CCU40RS_Msk (0x4UL) /*!< SCU_RESET PRCLR0: CCU40RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRCLR0_CCU41RS_Pos (3UL) /*!< SCU_RESET PRCLR0: CCU41RS (Bit 3) */ +#define SCU_RESET_PRCLR0_CCU41RS_Msk (0x8UL) /*!< SCU_RESET PRCLR0: CCU41RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRCLR0_CCU80RS_Pos (7UL) /*!< SCU_RESET PRCLR0: CCU80RS (Bit 7) */ +#define SCU_RESET_PRCLR0_CCU80RS_Msk (0x80UL) /*!< SCU_RESET PRCLR0: CCU80RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRCLR0_POSIF0RS_Pos (9UL) /*!< SCU_RESET PRCLR0: POSIF0RS (Bit 9) */ +#define SCU_RESET_PRCLR0_POSIF0RS_Msk (0x200UL) /*!< SCU_RESET PRCLR0: POSIF0RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRCLR0_USIC0RS_Pos (11UL) /*!< SCU_RESET PRCLR0: USIC0RS (Bit 11) */ +#define SCU_RESET_PRCLR0_USIC0RS_Msk (0x800UL) /*!< SCU_RESET PRCLR0: USIC0RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRCLR0_ERU1RS_Pos (16UL) /*!< SCU_RESET PRCLR0: ERU1RS (Bit 16) */ +#define SCU_RESET_PRCLR0_ERU1RS_Msk (0x10000UL) /*!< SCU_RESET PRCLR0: ERU1RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRCLR0_HRPWM0RS_Pos (23UL) /*!< SCU_RESET PRCLR0: HRPWM0RS (Bit 23) */ +#define SCU_RESET_PRCLR0_HRPWM0RS_Msk (0x800000UL) /*!< SCU_RESET PRCLR0: HRPWM0RS (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_RESET_PRSTAT1 ----------------------------- */ +#define SCU_RESET_PRSTAT1_LEDTSCU0RS_Pos (3UL) /*!< SCU_RESET PRSTAT1: LEDTSCU0RS (Bit 3) */ +#define SCU_RESET_PRSTAT1_LEDTSCU0RS_Msk (0x8UL) /*!< SCU_RESET PRSTAT1: LEDTSCU0RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSTAT1_MCAN0RS_Pos (4UL) /*!< SCU_RESET PRSTAT1: MCAN0RS (Bit 4) */ +#define SCU_RESET_PRSTAT1_MCAN0RS_Msk (0x10UL) /*!< SCU_RESET PRSTAT1: MCAN0RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSTAT1_DACRS_Pos (5UL) /*!< SCU_RESET PRSTAT1: DACRS (Bit 5) */ +#define SCU_RESET_PRSTAT1_DACRS_Msk (0x20UL) /*!< SCU_RESET PRSTAT1: DACRS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSTAT1_USIC1RS_Pos (7UL) /*!< SCU_RESET PRSTAT1: USIC1RS (Bit 7) */ +#define SCU_RESET_PRSTAT1_USIC1RS_Msk (0x80UL) /*!< SCU_RESET PRSTAT1: USIC1RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSTAT1_PPORTSRS_Pos (9UL) /*!< SCU_RESET PRSTAT1: PPORTSRS (Bit 9) */ +#define SCU_RESET_PRSTAT1_PPORTSRS_Msk (0x200UL) /*!< SCU_RESET PRSTAT1: PPORTSRS (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_RESET_PRSET1 ------------------------------ */ +#define SCU_RESET_PRSET1_LEDTSCU0RS_Pos (3UL) /*!< SCU_RESET PRSET1: LEDTSCU0RS (Bit 3) */ +#define SCU_RESET_PRSET1_LEDTSCU0RS_Msk (0x8UL) /*!< SCU_RESET PRSET1: LEDTSCU0RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSET1_MCAN0RS_Pos (4UL) /*!< SCU_RESET PRSET1: MCAN0RS (Bit 4) */ +#define SCU_RESET_PRSET1_MCAN0RS_Msk (0x10UL) /*!< SCU_RESET PRSET1: MCAN0RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSET1_DACRS_Pos (5UL) /*!< SCU_RESET PRSET1: DACRS (Bit 5) */ +#define SCU_RESET_PRSET1_DACRS_Msk (0x20UL) /*!< SCU_RESET PRSET1: DACRS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSET1_USIC1RS_Pos (7UL) /*!< SCU_RESET PRSET1: USIC1RS (Bit 7) */ +#define SCU_RESET_PRSET1_USIC1RS_Msk (0x80UL) /*!< SCU_RESET PRSET1: USIC1RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSET1_PPORTSRS_Pos (9UL) /*!< SCU_RESET PRSET1: PPORTSRS (Bit 9) */ +#define SCU_RESET_PRSET1_PPORTSRS_Msk (0x200UL) /*!< SCU_RESET PRSET1: PPORTSRS (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_RESET_PRCLR1 ------------------------------ */ +#define SCU_RESET_PRCLR1_LEDTSCU0RS_Pos (3UL) /*!< SCU_RESET PRCLR1: LEDTSCU0RS (Bit 3) */ +#define SCU_RESET_PRCLR1_LEDTSCU0RS_Msk (0x8UL) /*!< SCU_RESET PRCLR1: LEDTSCU0RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRCLR1_MCAN0RS_Pos (4UL) /*!< SCU_RESET PRCLR1: MCAN0RS (Bit 4) */ +#define SCU_RESET_PRCLR1_MCAN0RS_Msk (0x10UL) /*!< SCU_RESET PRCLR1: MCAN0RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRCLR1_DACRS_Pos (5UL) /*!< SCU_RESET PRCLR1: DACRS (Bit 5) */ +#define SCU_RESET_PRCLR1_DACRS_Msk (0x20UL) /*!< SCU_RESET PRCLR1: DACRS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRCLR1_USIC1RS_Pos (7UL) /*!< SCU_RESET PRCLR1: USIC1RS (Bit 7) */ +#define SCU_RESET_PRCLR1_USIC1RS_Msk (0x80UL) /*!< SCU_RESET PRCLR1: USIC1RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRCLR1_PPORTSRS_Pos (9UL) /*!< SCU_RESET PRCLR1: PPORTSRS (Bit 9) */ +#define SCU_RESET_PRCLR1_PPORTSRS_Msk (0x200UL) /*!< SCU_RESET PRCLR1: PPORTSRS (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_RESET_PRSTAT2 ----------------------------- */ +#define SCU_RESET_PRSTAT2_WDTRS_Pos (1UL) /*!< SCU_RESET PRSTAT2: WDTRS (Bit 1) */ +#define SCU_RESET_PRSTAT2_WDTRS_Msk (0x2UL) /*!< SCU_RESET PRSTAT2: WDTRS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSTAT2_DMA0RS_Pos (4UL) /*!< SCU_RESET PRSTAT2: DMA0RS (Bit 4) */ +#define SCU_RESET_PRSTAT2_DMA0RS_Msk (0x10UL) /*!< SCU_RESET PRSTAT2: DMA0RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSTAT2_FCERS_Pos (6UL) /*!< SCU_RESET PRSTAT2: FCERS (Bit 6) */ +#define SCU_RESET_PRSTAT2_FCERS_Msk (0x40UL) /*!< SCU_RESET PRSTAT2: FCERS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSTAT2_USBRS_Pos (7UL) /*!< SCU_RESET PRSTAT2: USBRS (Bit 7) */ +#define SCU_RESET_PRSTAT2_USBRS_Msk (0x80UL) /*!< SCU_RESET PRSTAT2: USBRS (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_RESET_PRSET2 ------------------------------ */ +#define SCU_RESET_PRSET2_WDTRS_Pos (1UL) /*!< SCU_RESET PRSET2: WDTRS (Bit 1) */ +#define SCU_RESET_PRSET2_WDTRS_Msk (0x2UL) /*!< SCU_RESET PRSET2: WDTRS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSET2_DMA0RS_Pos (4UL) /*!< SCU_RESET PRSET2: DMA0RS (Bit 4) */ +#define SCU_RESET_PRSET2_DMA0RS_Msk (0x10UL) /*!< SCU_RESET PRSET2: DMA0RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSET2_FCERS_Pos (6UL) /*!< SCU_RESET PRSET2: FCERS (Bit 6) */ +#define SCU_RESET_PRSET2_FCERS_Msk (0x40UL) /*!< SCU_RESET PRSET2: FCERS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSET2_USBRS_Pos (7UL) /*!< SCU_RESET PRSET2: USBRS (Bit 7) */ +#define SCU_RESET_PRSET2_USBRS_Msk (0x80UL) /*!< SCU_RESET PRSET2: USBRS (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_RESET_PRCLR2 ------------------------------ */ +#define SCU_RESET_PRCLR2_WDTRS_Pos (1UL) /*!< SCU_RESET PRCLR2: WDTRS (Bit 1) */ +#define SCU_RESET_PRCLR2_WDTRS_Msk (0x2UL) /*!< SCU_RESET PRCLR2: WDTRS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRCLR2_DMA0RS_Pos (4UL) /*!< SCU_RESET PRCLR2: DMA0RS (Bit 4) */ +#define SCU_RESET_PRCLR2_DMA0RS_Msk (0x10UL) /*!< SCU_RESET PRCLR2: DMA0RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRCLR2_FCERS_Pos (6UL) /*!< SCU_RESET PRCLR2: FCERS (Bit 6) */ +#define SCU_RESET_PRCLR2_FCERS_Msk (0x40UL) /*!< SCU_RESET PRCLR2: FCERS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRCLR2_USBRS_Pos (7UL) /*!< SCU_RESET PRCLR2: USBRS (Bit 7) */ +#define SCU_RESET_PRCLR2_USBRS_Msk (0x80UL) /*!< SCU_RESET PRCLR2: USBRS (Bitfield-Mask: 0x01) */ + + +/* ================================================================================ */ +/* ================ Group 'LEDTS' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ---------------------------------- LEDTS_ID ---------------------------------- */ +#define LEDTS_ID_MOD_REV_Pos (0UL) /*!< LEDTS ID: MOD_REV (Bit 0) */ +#define LEDTS_ID_MOD_REV_Msk (0xffUL) /*!< LEDTS ID: MOD_REV (Bitfield-Mask: 0xff) */ +#define LEDTS_ID_MOD_TYPE_Pos (8UL) /*!< LEDTS ID: MOD_TYPE (Bit 8) */ +#define LEDTS_ID_MOD_TYPE_Msk (0xff00UL) /*!< LEDTS ID: MOD_TYPE (Bitfield-Mask: 0xff) */ +#define LEDTS_ID_MOD_NUMBER_Pos (16UL) /*!< LEDTS ID: MOD_NUMBER (Bit 16) */ +#define LEDTS_ID_MOD_NUMBER_Msk (0xffff0000UL) /*!< LEDTS ID: MOD_NUMBER (Bitfield-Mask: 0xffff) */ + +/* -------------------------------- LEDTS_GLOBCTL ------------------------------- */ +#define LEDTS_GLOBCTL_TS_EN_Pos (0UL) /*!< LEDTS GLOBCTL: TS_EN (Bit 0) */ +#define LEDTS_GLOBCTL_TS_EN_Msk (0x1UL) /*!< LEDTS GLOBCTL: TS_EN (Bitfield-Mask: 0x01) */ +#define LEDTS_GLOBCTL_LD_EN_Pos (1UL) /*!< LEDTS GLOBCTL: LD_EN (Bit 1) */ +#define LEDTS_GLOBCTL_LD_EN_Msk (0x2UL) /*!< LEDTS GLOBCTL: LD_EN (Bitfield-Mask: 0x01) */ +#define LEDTS_GLOBCTL_CMTR_Pos (2UL) /*!< LEDTS GLOBCTL: CMTR (Bit 2) */ +#define LEDTS_GLOBCTL_CMTR_Msk (0x4UL) /*!< LEDTS GLOBCTL: CMTR (Bitfield-Mask: 0x01) */ +#define LEDTS_GLOBCTL_ENSYNC_Pos (3UL) /*!< LEDTS GLOBCTL: ENSYNC (Bit 3) */ +#define LEDTS_GLOBCTL_ENSYNC_Msk (0x8UL) /*!< LEDTS GLOBCTL: ENSYNC (Bitfield-Mask: 0x01) */ +#define LEDTS_GLOBCTL_SUSCFG_Pos (8UL) /*!< LEDTS GLOBCTL: SUSCFG (Bit 8) */ +#define LEDTS_GLOBCTL_SUSCFG_Msk (0x100UL) /*!< LEDTS GLOBCTL: SUSCFG (Bitfield-Mask: 0x01) */ +#define LEDTS_GLOBCTL_MASKVAL_Pos (9UL) /*!< LEDTS GLOBCTL: MASKVAL (Bit 9) */ +#define LEDTS_GLOBCTL_MASKVAL_Msk (0xe00UL) /*!< LEDTS GLOBCTL: MASKVAL (Bitfield-Mask: 0x07) */ +#define LEDTS_GLOBCTL_FENVAL_Pos (12UL) /*!< LEDTS GLOBCTL: FENVAL (Bit 12) */ +#define LEDTS_GLOBCTL_FENVAL_Msk (0x1000UL) /*!< LEDTS GLOBCTL: FENVAL (Bitfield-Mask: 0x01) */ +#define LEDTS_GLOBCTL_ITS_EN_Pos (13UL) /*!< LEDTS GLOBCTL: ITS_EN (Bit 13) */ +#define LEDTS_GLOBCTL_ITS_EN_Msk (0x2000UL) /*!< LEDTS GLOBCTL: ITS_EN (Bitfield-Mask: 0x01) */ +#define LEDTS_GLOBCTL_ITF_EN_Pos (14UL) /*!< LEDTS GLOBCTL: ITF_EN (Bit 14) */ +#define LEDTS_GLOBCTL_ITF_EN_Msk (0x4000UL) /*!< LEDTS GLOBCTL: ITF_EN (Bitfield-Mask: 0x01) */ +#define LEDTS_GLOBCTL_ITP_EN_Pos (15UL) /*!< LEDTS GLOBCTL: ITP_EN (Bit 15) */ +#define LEDTS_GLOBCTL_ITP_EN_Msk (0x8000UL) /*!< LEDTS GLOBCTL: ITP_EN (Bitfield-Mask: 0x01) */ +#define LEDTS_GLOBCTL_CLK_PS_Pos (16UL) /*!< LEDTS GLOBCTL: CLK_PS (Bit 16) */ +#define LEDTS_GLOBCTL_CLK_PS_Msk (0xffff0000UL) /*!< LEDTS GLOBCTL: CLK_PS (Bitfield-Mask: 0xffff) */ + +/* --------------------------------- LEDTS_FNCTL -------------------------------- */ +#define LEDTS_FNCTL_PADT_Pos (0UL) /*!< LEDTS FNCTL: PADT (Bit 0) */ +#define LEDTS_FNCTL_PADT_Msk (0x7UL) /*!< LEDTS FNCTL: PADT (Bitfield-Mask: 0x07) */ +#define LEDTS_FNCTL_PADTSW_Pos (3UL) /*!< LEDTS FNCTL: PADTSW (Bit 3) */ +#define LEDTS_FNCTL_PADTSW_Msk (0x8UL) /*!< LEDTS FNCTL: PADTSW (Bitfield-Mask: 0x01) */ +#define LEDTS_FNCTL_EPULL_Pos (4UL) /*!< LEDTS FNCTL: EPULL (Bit 4) */ +#define LEDTS_FNCTL_EPULL_Msk (0x10UL) /*!< LEDTS FNCTL: EPULL (Bitfield-Mask: 0x01) */ +#define LEDTS_FNCTL_FNCOL_Pos (5UL) /*!< LEDTS FNCTL: FNCOL (Bit 5) */ +#define LEDTS_FNCTL_FNCOL_Msk (0xe0UL) /*!< LEDTS FNCTL: FNCOL (Bitfield-Mask: 0x07) */ +#define LEDTS_FNCTL_ACCCNT_Pos (16UL) /*!< LEDTS FNCTL: ACCCNT (Bit 16) */ +#define LEDTS_FNCTL_ACCCNT_Msk (0xf0000UL) /*!< LEDTS FNCTL: ACCCNT (Bitfield-Mask: 0x0f) */ +#define LEDTS_FNCTL_TSCCMP_Pos (20UL) /*!< LEDTS FNCTL: TSCCMP (Bit 20) */ +#define LEDTS_FNCTL_TSCCMP_Msk (0x100000UL) /*!< LEDTS FNCTL: TSCCMP (Bitfield-Mask: 0x01) */ +#define LEDTS_FNCTL_TSOEXT_Pos (21UL) /*!< LEDTS FNCTL: TSOEXT (Bit 21) */ +#define LEDTS_FNCTL_TSOEXT_Msk (0x600000UL) /*!< LEDTS FNCTL: TSOEXT (Bitfield-Mask: 0x03) */ +#define LEDTS_FNCTL_TSCTRR_Pos (23UL) /*!< LEDTS FNCTL: TSCTRR (Bit 23) */ +#define LEDTS_FNCTL_TSCTRR_Msk (0x800000UL) /*!< LEDTS FNCTL: TSCTRR (Bitfield-Mask: 0x01) */ +#define LEDTS_FNCTL_TSCTRSAT_Pos (24UL) /*!< LEDTS FNCTL: TSCTRSAT (Bit 24) */ +#define LEDTS_FNCTL_TSCTRSAT_Msk (0x1000000UL) /*!< LEDTS FNCTL: TSCTRSAT (Bitfield-Mask: 0x01) */ +#define LEDTS_FNCTL_NR_TSIN_Pos (25UL) /*!< LEDTS FNCTL: NR_TSIN (Bit 25) */ +#define LEDTS_FNCTL_NR_TSIN_Msk (0xe000000UL) /*!< LEDTS FNCTL: NR_TSIN (Bitfield-Mask: 0x07) */ +#define LEDTS_FNCTL_COLLEV_Pos (28UL) /*!< LEDTS FNCTL: COLLEV (Bit 28) */ +#define LEDTS_FNCTL_COLLEV_Msk (0x10000000UL) /*!< LEDTS FNCTL: COLLEV (Bitfield-Mask: 0x01) */ +#define LEDTS_FNCTL_NR_LEDCOL_Pos (29UL) /*!< LEDTS FNCTL: NR_LEDCOL (Bit 29) */ +#define LEDTS_FNCTL_NR_LEDCOL_Msk (0xe0000000UL) /*!< LEDTS FNCTL: NR_LEDCOL (Bitfield-Mask: 0x07) */ + +/* --------------------------------- LEDTS_EVFR --------------------------------- */ +#define LEDTS_EVFR_TSF_Pos (0UL) /*!< LEDTS EVFR: TSF (Bit 0) */ +#define LEDTS_EVFR_TSF_Msk (0x1UL) /*!< LEDTS EVFR: TSF (Bitfield-Mask: 0x01) */ +#define LEDTS_EVFR_TFF_Pos (1UL) /*!< LEDTS EVFR: TFF (Bit 1) */ +#define LEDTS_EVFR_TFF_Msk (0x2UL) /*!< LEDTS EVFR: TFF (Bitfield-Mask: 0x01) */ +#define LEDTS_EVFR_TPF_Pos (2UL) /*!< LEDTS EVFR: TPF (Bit 2) */ +#define LEDTS_EVFR_TPF_Msk (0x4UL) /*!< LEDTS EVFR: TPF (Bitfield-Mask: 0x01) */ +#define LEDTS_EVFR_TSCTROVF_Pos (3UL) /*!< LEDTS EVFR: TSCTROVF (Bit 3) */ +#define LEDTS_EVFR_TSCTROVF_Msk (0x8UL) /*!< LEDTS EVFR: TSCTROVF (Bitfield-Mask: 0x01) */ +#define LEDTS_EVFR_CTSF_Pos (16UL) /*!< LEDTS EVFR: CTSF (Bit 16) */ +#define LEDTS_EVFR_CTSF_Msk (0x10000UL) /*!< LEDTS EVFR: CTSF (Bitfield-Mask: 0x01) */ +#define LEDTS_EVFR_CTFF_Pos (17UL) /*!< LEDTS EVFR: CTFF (Bit 17) */ +#define LEDTS_EVFR_CTFF_Msk (0x20000UL) /*!< LEDTS EVFR: CTFF (Bitfield-Mask: 0x01) */ +#define LEDTS_EVFR_CTPF_Pos (18UL) /*!< LEDTS EVFR: CTPF (Bit 18) */ +#define LEDTS_EVFR_CTPF_Msk (0x40000UL) /*!< LEDTS EVFR: CTPF (Bitfield-Mask: 0x01) */ + +/* --------------------------------- LEDTS_TSVAL -------------------------------- */ +#define LEDTS_TSVAL_TSCTRVALR_Pos (0UL) /*!< LEDTS TSVAL: TSCTRVALR (Bit 0) */ +#define LEDTS_TSVAL_TSCTRVALR_Msk (0xffffUL) /*!< LEDTS TSVAL: TSCTRVALR (Bitfield-Mask: 0xffff) */ +#define LEDTS_TSVAL_TSCTRVAL_Pos (16UL) /*!< LEDTS TSVAL: TSCTRVAL (Bit 16) */ +#define LEDTS_TSVAL_TSCTRVAL_Msk (0xffff0000UL) /*!< LEDTS TSVAL: TSCTRVAL (Bitfield-Mask: 0xffff) */ + +/* --------------------------------- LEDTS_LINE0 -------------------------------- */ +#define LEDTS_LINE0_LINE_0_Pos (0UL) /*!< LEDTS LINE0: LINE_0 (Bit 0) */ +#define LEDTS_LINE0_LINE_0_Msk (0xffUL) /*!< LEDTS LINE0: LINE_0 (Bitfield-Mask: 0xff) */ +#define LEDTS_LINE0_LINE_1_Pos (8UL) /*!< LEDTS LINE0: LINE_1 (Bit 8) */ +#define LEDTS_LINE0_LINE_1_Msk (0xff00UL) /*!< LEDTS LINE0: LINE_1 (Bitfield-Mask: 0xff) */ +#define LEDTS_LINE0_LINE_2_Pos (16UL) /*!< LEDTS LINE0: LINE_2 (Bit 16) */ +#define LEDTS_LINE0_LINE_2_Msk (0xff0000UL) /*!< LEDTS LINE0: LINE_2 (Bitfield-Mask: 0xff) */ +#define LEDTS_LINE0_LINE_3_Pos (24UL) /*!< LEDTS LINE0: LINE_3 (Bit 24) */ +#define LEDTS_LINE0_LINE_3_Msk (0xff000000UL) /*!< LEDTS LINE0: LINE_3 (Bitfield-Mask: 0xff) */ + +/* --------------------------------- LEDTS_LINE1 -------------------------------- */ +#define LEDTS_LINE1_LINE_4_Pos (0UL) /*!< LEDTS LINE1: LINE_4 (Bit 0) */ +#define LEDTS_LINE1_LINE_4_Msk (0xffUL) /*!< LEDTS LINE1: LINE_4 (Bitfield-Mask: 0xff) */ +#define LEDTS_LINE1_LINE_5_Pos (8UL) /*!< LEDTS LINE1: LINE_5 (Bit 8) */ +#define LEDTS_LINE1_LINE_5_Msk (0xff00UL) /*!< LEDTS LINE1: LINE_5 (Bitfield-Mask: 0xff) */ +#define LEDTS_LINE1_LINE_6_Pos (16UL) /*!< LEDTS LINE1: LINE_6 (Bit 16) */ +#define LEDTS_LINE1_LINE_6_Msk (0xff0000UL) /*!< LEDTS LINE1: LINE_6 (Bitfield-Mask: 0xff) */ +#define LEDTS_LINE1_LINE_A_Pos (24UL) /*!< LEDTS LINE1: LINE_A (Bit 24) */ +#define LEDTS_LINE1_LINE_A_Msk (0xff000000UL) /*!< LEDTS LINE1: LINE_A (Bitfield-Mask: 0xff) */ + +/* -------------------------------- LEDTS_LDCMP0 -------------------------------- */ +#define LEDTS_LDCMP0_CMP_LD0_Pos (0UL) /*!< LEDTS LDCMP0: CMP_LD0 (Bit 0) */ +#define LEDTS_LDCMP0_CMP_LD0_Msk (0xffUL) /*!< LEDTS LDCMP0: CMP_LD0 (Bitfield-Mask: 0xff) */ +#define LEDTS_LDCMP0_CMP_LD1_Pos (8UL) /*!< LEDTS LDCMP0: CMP_LD1 (Bit 8) */ +#define LEDTS_LDCMP0_CMP_LD1_Msk (0xff00UL) /*!< LEDTS LDCMP0: CMP_LD1 (Bitfield-Mask: 0xff) */ +#define LEDTS_LDCMP0_CMP_LD2_Pos (16UL) /*!< LEDTS LDCMP0: CMP_LD2 (Bit 16) */ +#define LEDTS_LDCMP0_CMP_LD2_Msk (0xff0000UL) /*!< LEDTS LDCMP0: CMP_LD2 (Bitfield-Mask: 0xff) */ +#define LEDTS_LDCMP0_CMP_LD3_Pos (24UL) /*!< LEDTS LDCMP0: CMP_LD3 (Bit 24) */ +#define LEDTS_LDCMP0_CMP_LD3_Msk (0xff000000UL) /*!< LEDTS LDCMP0: CMP_LD3 (Bitfield-Mask: 0xff) */ + +/* -------------------------------- LEDTS_LDCMP1 -------------------------------- */ +#define LEDTS_LDCMP1_CMP_LD4_Pos (0UL) /*!< LEDTS LDCMP1: CMP_LD4 (Bit 0) */ +#define LEDTS_LDCMP1_CMP_LD4_Msk (0xffUL) /*!< LEDTS LDCMP1: CMP_LD4 (Bitfield-Mask: 0xff) */ +#define LEDTS_LDCMP1_CMP_LD5_Pos (8UL) /*!< LEDTS LDCMP1: CMP_LD5 (Bit 8) */ +#define LEDTS_LDCMP1_CMP_LD5_Msk (0xff00UL) /*!< LEDTS LDCMP1: CMP_LD5 (Bitfield-Mask: 0xff) */ +#define LEDTS_LDCMP1_CMP_LD6_Pos (16UL) /*!< LEDTS LDCMP1: CMP_LD6 (Bit 16) */ +#define LEDTS_LDCMP1_CMP_LD6_Msk (0xff0000UL) /*!< LEDTS LDCMP1: CMP_LD6 (Bitfield-Mask: 0xff) */ +#define LEDTS_LDCMP1_CMP_LDA_TSCOM_Pos (24UL) /*!< LEDTS LDCMP1: CMP_LDA_TSCOM (Bit 24) */ +#define LEDTS_LDCMP1_CMP_LDA_TSCOM_Msk (0xff000000UL) /*!< LEDTS LDCMP1: CMP_LDA_TSCOM (Bitfield-Mask: 0xff) */ + +/* -------------------------------- LEDTS_TSCMP0 -------------------------------- */ +#define LEDTS_TSCMP0_CMP_TS0_Pos (0UL) /*!< LEDTS TSCMP0: CMP_TS0 (Bit 0) */ +#define LEDTS_TSCMP0_CMP_TS0_Msk (0xffUL) /*!< LEDTS TSCMP0: CMP_TS0 (Bitfield-Mask: 0xff) */ +#define LEDTS_TSCMP0_CMP_TS1_Pos (8UL) /*!< LEDTS TSCMP0: CMP_TS1 (Bit 8) */ +#define LEDTS_TSCMP0_CMP_TS1_Msk (0xff00UL) /*!< LEDTS TSCMP0: CMP_TS1 (Bitfield-Mask: 0xff) */ +#define LEDTS_TSCMP0_CMP_TS2_Pos (16UL) /*!< LEDTS TSCMP0: CMP_TS2 (Bit 16) */ +#define LEDTS_TSCMP0_CMP_TS2_Msk (0xff0000UL) /*!< LEDTS TSCMP0: CMP_TS2 (Bitfield-Mask: 0xff) */ +#define LEDTS_TSCMP0_CMP_TS3_Pos (24UL) /*!< LEDTS TSCMP0: CMP_TS3 (Bit 24) */ +#define LEDTS_TSCMP0_CMP_TS3_Msk (0xff000000UL) /*!< LEDTS TSCMP0: CMP_TS3 (Bitfield-Mask: 0xff) */ + +/* -------------------------------- LEDTS_TSCMP1 -------------------------------- */ +#define LEDTS_TSCMP1_CMP_TS4_Pos (0UL) /*!< LEDTS TSCMP1: CMP_TS4 (Bit 0) */ +#define LEDTS_TSCMP1_CMP_TS4_Msk (0xffUL) /*!< LEDTS TSCMP1: CMP_TS4 (Bitfield-Mask: 0xff) */ +#define LEDTS_TSCMP1_CMP_TS5_Pos (8UL) /*!< LEDTS TSCMP1: CMP_TS5 (Bit 8) */ +#define LEDTS_TSCMP1_CMP_TS5_Msk (0xff00UL) /*!< LEDTS TSCMP1: CMP_TS5 (Bitfield-Mask: 0xff) */ +#define LEDTS_TSCMP1_CMP_TS6_Pos (16UL) /*!< LEDTS TSCMP1: CMP_TS6 (Bit 16) */ +#define LEDTS_TSCMP1_CMP_TS6_Msk (0xff0000UL) /*!< LEDTS TSCMP1: CMP_TS6 (Bitfield-Mask: 0xff) */ +#define LEDTS_TSCMP1_CMP_TS7_Pos (24UL) /*!< LEDTS TSCMP1: CMP_TS7 (Bit 24) */ +#define LEDTS_TSCMP1_CMP_TS7_Msk (0xff000000UL) /*!< LEDTS TSCMP1: CMP_TS7 (Bitfield-Mask: 0xff) */ + + +/* ================================================================================ */ +/* ================ Group 'USB' Position & Mask ================ */ +/* ================================================================================ */ + + +/* --------------------------------- USB_GAHBCFG -------------------------------- */ +#define USB_GAHBCFG_GlblIntrMsk_Pos (0UL) /*!< USB GAHBCFG: GlblIntrMsk (Bit 0) */ +#define USB_GAHBCFG_GlblIntrMsk_Msk (0x1UL) /*!< USB GAHBCFG: GlblIntrMsk (Bitfield-Mask: 0x01) */ +#define USB_GAHBCFG_HBstLen_Pos (1UL) /*!< USB GAHBCFG: HBstLen (Bit 1) */ +#define USB_GAHBCFG_HBstLen_Msk (0x1eUL) /*!< USB GAHBCFG: HBstLen (Bitfield-Mask: 0x0f) */ +#define USB_GAHBCFG_DMAEn_Pos (5UL) /*!< USB GAHBCFG: DMAEn (Bit 5) */ +#define USB_GAHBCFG_DMAEn_Msk (0x20UL) /*!< USB GAHBCFG: DMAEn (Bitfield-Mask: 0x01) */ +#define USB_GAHBCFG_NPTxFEmpLvl_Pos (7UL) /*!< USB GAHBCFG: NPTxFEmpLvl (Bit 7) */ +#define USB_GAHBCFG_NPTxFEmpLvl_Msk (0x80UL) /*!< USB GAHBCFG: NPTxFEmpLvl (Bitfield-Mask: 0x01) */ +#define USB_GAHBCFG_AHBSingle_Pos (23UL) /*!< USB GAHBCFG: AHBSingle (Bit 23) */ +#define USB_GAHBCFG_AHBSingle_Msk (0x800000UL) /*!< USB GAHBCFG: AHBSingle (Bitfield-Mask: 0x01) */ + +/* --------------------------------- USB_GUSBCFG -------------------------------- */ +#define USB_GUSBCFG_TOutCal_Pos (0UL) /*!< USB GUSBCFG: TOutCal (Bit 0) */ +#define USB_GUSBCFG_TOutCal_Msk (0x7UL) /*!< USB GUSBCFG: TOutCal (Bitfield-Mask: 0x07) */ +#define USB_GUSBCFG_PHYSel_Pos (6UL) /*!< USB GUSBCFG: PHYSel (Bit 6) */ +#define USB_GUSBCFG_PHYSel_Msk (0x40UL) /*!< USB GUSBCFG: PHYSel (Bitfield-Mask: 0x01) */ +#define USB_GUSBCFG_USBTrdTim_Pos (10UL) /*!< USB GUSBCFG: USBTrdTim (Bit 10) */ +#define USB_GUSBCFG_USBTrdTim_Msk (0x3c00UL) /*!< USB GUSBCFG: USBTrdTim (Bitfield-Mask: 0x0f) */ +#define USB_GUSBCFG_TxEndDelay_Pos (28UL) /*!< USB GUSBCFG: TxEndDelay (Bit 28) */ +#define USB_GUSBCFG_TxEndDelay_Msk (0x10000000UL) /*!< USB GUSBCFG: TxEndDelay (Bitfield-Mask: 0x01) */ +#define USB_GUSBCFG_ForceDevMode_Pos (30UL) /*!< USB GUSBCFG: ForceDevMode (Bit 30) */ +#define USB_GUSBCFG_ForceDevMode_Msk (0x40000000UL) /*!< USB GUSBCFG: ForceDevMode (Bitfield-Mask: 0x01) */ +#define USB_GUSBCFG_CTP_Pos (31UL) /*!< USB GUSBCFG: CTP (Bit 31) */ +#define USB_GUSBCFG_CTP_Msk (0x80000000UL) /*!< USB GUSBCFG: CTP (Bitfield-Mask: 0x01) */ + +/* --------------------------------- USB_GRSTCTL -------------------------------- */ +#define USB_GRSTCTL_CSftRst_Pos (0UL) /*!< USB GRSTCTL: CSftRst (Bit 0) */ +#define USB_GRSTCTL_CSftRst_Msk (0x1UL) /*!< USB GRSTCTL: CSftRst (Bitfield-Mask: 0x01) */ +#define USB_GRSTCTL_RxFFlsh_Pos (4UL) /*!< USB GRSTCTL: RxFFlsh (Bit 4) */ +#define USB_GRSTCTL_RxFFlsh_Msk (0x10UL) /*!< USB GRSTCTL: RxFFlsh (Bitfield-Mask: 0x01) */ +#define USB_GRSTCTL_TxFFlsh_Pos (5UL) /*!< USB GRSTCTL: TxFFlsh (Bit 5) */ +#define USB_GRSTCTL_TxFFlsh_Msk (0x20UL) /*!< USB GRSTCTL: TxFFlsh (Bitfield-Mask: 0x01) */ +#define USB_GRSTCTL_TxFNum_Pos (6UL) /*!< USB GRSTCTL: TxFNum (Bit 6) */ +#define USB_GRSTCTL_TxFNum_Msk (0x7c0UL) /*!< USB GRSTCTL: TxFNum (Bitfield-Mask: 0x1f) */ +#define USB_GRSTCTL_DMAReq_Pos (30UL) /*!< USB GRSTCTL: DMAReq (Bit 30) */ +#define USB_GRSTCTL_DMAReq_Msk (0x40000000UL) /*!< USB GRSTCTL: DMAReq (Bitfield-Mask: 0x01) */ +#define USB_GRSTCTL_AHBIdle_Pos (31UL) /*!< USB GRSTCTL: AHBIdle (Bit 31) */ +#define USB_GRSTCTL_AHBIdle_Msk (0x80000000UL) /*!< USB GRSTCTL: AHBIdle (Bitfield-Mask: 0x01) */ + +/* --------------------------------- USB_GINTSTS -------------------------------- */ +#define USB_GINTSTS_CurMod_Pos (0UL) /*!< USB GINTSTS: CurMod (Bit 0) */ +#define USB_GINTSTS_CurMod_Msk (0x1UL) /*!< USB GINTSTS: CurMod (Bitfield-Mask: 0x01) */ +#define USB_GINTSTS_Sof_Pos (3UL) /*!< USB GINTSTS: Sof (Bit 3) */ +#define USB_GINTSTS_Sof_Msk (0x8UL) /*!< USB GINTSTS: Sof (Bitfield-Mask: 0x01) */ +#define USB_GINTSTS_RxFLvl_Pos (4UL) /*!< USB GINTSTS: RxFLvl (Bit 4) */ +#define USB_GINTSTS_RxFLvl_Msk (0x10UL) /*!< USB GINTSTS: RxFLvl (Bitfield-Mask: 0x01) */ +#define USB_GINTSTS_GINNakEff_Pos (6UL) /*!< USB GINTSTS: GINNakEff (Bit 6) */ +#define USB_GINTSTS_GINNakEff_Msk (0x40UL) /*!< USB GINTSTS: GINNakEff (Bitfield-Mask: 0x01) */ +#define USB_GINTSTS_GOUTNakEff_Pos (7UL) /*!< USB GINTSTS: GOUTNakEff (Bit 7) */ +#define USB_GINTSTS_GOUTNakEff_Msk (0x80UL) /*!< USB GINTSTS: GOUTNakEff (Bitfield-Mask: 0x01) */ +#define USB_GINTSTS_ErlySusp_Pos (10UL) /*!< USB GINTSTS: ErlySusp (Bit 10) */ +#define USB_GINTSTS_ErlySusp_Msk (0x400UL) /*!< USB GINTSTS: ErlySusp (Bitfield-Mask: 0x01) */ +#define USB_GINTSTS_USBSusp_Pos (11UL) /*!< USB GINTSTS: USBSusp (Bit 11) */ +#define USB_GINTSTS_USBSusp_Msk (0x800UL) /*!< USB GINTSTS: USBSusp (Bitfield-Mask: 0x01) */ +#define USB_GINTSTS_USBRst_Pos (12UL) /*!< USB GINTSTS: USBRst (Bit 12) */ +#define USB_GINTSTS_USBRst_Msk (0x1000UL) /*!< USB GINTSTS: USBRst (Bitfield-Mask: 0x01) */ +#define USB_GINTSTS_EnumDone_Pos (13UL) /*!< USB GINTSTS: EnumDone (Bit 13) */ +#define USB_GINTSTS_EnumDone_Msk (0x2000UL) /*!< USB GINTSTS: EnumDone (Bitfield-Mask: 0x01) */ +#define USB_GINTSTS_ISOOutDrop_Pos (14UL) /*!< USB GINTSTS: ISOOutDrop (Bit 14) */ +#define USB_GINTSTS_ISOOutDrop_Msk (0x4000UL) /*!< USB GINTSTS: ISOOutDrop (Bitfield-Mask: 0x01) */ +#define USB_GINTSTS_EOPF_Pos (15UL) /*!< USB GINTSTS: EOPF (Bit 15) */ +#define USB_GINTSTS_EOPF_Msk (0x8000UL) /*!< USB GINTSTS: EOPF (Bitfield-Mask: 0x01) */ +#define USB_GINTSTS_IEPInt_Pos (18UL) /*!< USB GINTSTS: IEPInt (Bit 18) */ +#define USB_GINTSTS_IEPInt_Msk (0x40000UL) /*!< USB GINTSTS: IEPInt (Bitfield-Mask: 0x01) */ +#define USB_GINTSTS_OEPInt_Pos (19UL) /*!< USB GINTSTS: OEPInt (Bit 19) */ +#define USB_GINTSTS_OEPInt_Msk (0x80000UL) /*!< USB GINTSTS: OEPInt (Bitfield-Mask: 0x01) */ +#define USB_GINTSTS_incompISOIN_Pos (20UL) /*!< USB GINTSTS: incompISOIN (Bit 20) */ +#define USB_GINTSTS_incompISOIN_Msk (0x100000UL) /*!< USB GINTSTS: incompISOIN (Bitfield-Mask: 0x01) */ +#define USB_GINTSTS_incomplSOOUT_Pos (21UL) /*!< USB GINTSTS: incomplSOOUT (Bit 21) */ +#define USB_GINTSTS_incomplSOOUT_Msk (0x200000UL) /*!< USB GINTSTS: incomplSOOUT (Bitfield-Mask: 0x01) */ +#define USB_GINTSTS_WkUpInt_Pos (31UL) /*!< USB GINTSTS: WkUpInt (Bit 31) */ +#define USB_GINTSTS_WkUpInt_Msk (0x80000000UL) /*!< USB GINTSTS: WkUpInt (Bitfield-Mask: 0x01) */ + +/* --------------------------------- USB_GINTMSK -------------------------------- */ +#define USB_GINTMSK_SofMsk_Pos (3UL) /*!< USB GINTMSK: SofMsk (Bit 3) */ +#define USB_GINTMSK_SofMsk_Msk (0x8UL) /*!< USB GINTMSK: SofMsk (Bitfield-Mask: 0x01) */ +#define USB_GINTMSK_RxFLvlMsk_Pos (4UL) /*!< USB GINTMSK: RxFLvlMsk (Bit 4) */ +#define USB_GINTMSK_RxFLvlMsk_Msk (0x10UL) /*!< USB GINTMSK: RxFLvlMsk (Bitfield-Mask: 0x01) */ +#define USB_GINTMSK_GINNakEffMsk_Pos (6UL) /*!< USB GINTMSK: GINNakEffMsk (Bit 6) */ +#define USB_GINTMSK_GINNakEffMsk_Msk (0x40UL) /*!< USB GINTMSK: GINNakEffMsk (Bitfield-Mask: 0x01) */ +#define USB_GINTMSK_GOUTNakEffMsk_Pos (7UL) /*!< USB GINTMSK: GOUTNakEffMsk (Bit 7) */ +#define USB_GINTMSK_GOUTNakEffMsk_Msk (0x80UL) /*!< USB GINTMSK: GOUTNakEffMsk (Bitfield-Mask: 0x01) */ +#define USB_GINTMSK_ErlySuspMsk_Pos (10UL) /*!< USB GINTMSK: ErlySuspMsk (Bit 10) */ +#define USB_GINTMSK_ErlySuspMsk_Msk (0x400UL) /*!< USB GINTMSK: ErlySuspMsk (Bitfield-Mask: 0x01) */ +#define USB_GINTMSK_USBSuspMsk_Pos (11UL) /*!< USB GINTMSK: USBSuspMsk (Bit 11) */ +#define USB_GINTMSK_USBSuspMsk_Msk (0x800UL) /*!< USB GINTMSK: USBSuspMsk (Bitfield-Mask: 0x01) */ +#define USB_GINTMSK_USBRstMsk_Pos (12UL) /*!< USB GINTMSK: USBRstMsk (Bit 12) */ +#define USB_GINTMSK_USBRstMsk_Msk (0x1000UL) /*!< USB GINTMSK: USBRstMsk (Bitfield-Mask: 0x01) */ +#define USB_GINTMSK_EnumDoneMsk_Pos (13UL) /*!< USB GINTMSK: EnumDoneMsk (Bit 13) */ +#define USB_GINTMSK_EnumDoneMsk_Msk (0x2000UL) /*!< USB GINTMSK: EnumDoneMsk (Bitfield-Mask: 0x01) */ +#define USB_GINTMSK_ISOOutDropMsk_Pos (14UL) /*!< USB GINTMSK: ISOOutDropMsk (Bit 14) */ +#define USB_GINTMSK_ISOOutDropMsk_Msk (0x4000UL) /*!< USB GINTMSK: ISOOutDropMsk (Bitfield-Mask: 0x01) */ +#define USB_GINTMSK_EOPFMsk_Pos (15UL) /*!< USB GINTMSK: EOPFMsk (Bit 15) */ +#define USB_GINTMSK_EOPFMsk_Msk (0x8000UL) /*!< USB GINTMSK: EOPFMsk (Bitfield-Mask: 0x01) */ +#define USB_GINTMSK_IEPIntMsk_Pos (18UL) /*!< USB GINTMSK: IEPIntMsk (Bit 18) */ +#define USB_GINTMSK_IEPIntMsk_Msk (0x40000UL) /*!< USB GINTMSK: IEPIntMsk (Bitfield-Mask: 0x01) */ +#define USB_GINTMSK_OEPIntMsk_Pos (19UL) /*!< USB GINTMSK: OEPIntMsk (Bit 19) */ +#define USB_GINTMSK_OEPIntMsk_Msk (0x80000UL) /*!< USB GINTMSK: OEPIntMsk (Bitfield-Mask: 0x01) */ +#define USB_GINTMSK_incompISOINMsk_Pos (20UL) /*!< USB GINTMSK: incompISOINMsk (Bit 20) */ +#define USB_GINTMSK_incompISOINMsk_Msk (0x100000UL) /*!< USB GINTMSK: incompISOINMsk (Bitfield-Mask: 0x01) */ +#define USB_GINTMSK_incomplSOOUTMsk_Pos (21UL) /*!< USB GINTMSK: incomplSOOUTMsk (Bit 21) */ +#define USB_GINTMSK_incomplSOOUTMsk_Msk (0x200000UL) /*!< USB GINTMSK: incomplSOOUTMsk (Bitfield-Mask: 0x01) */ +#define USB_GINTMSK_WkUpIntMsk_Pos (31UL) /*!< USB GINTMSK: WkUpIntMsk (Bit 31) */ +#define USB_GINTMSK_WkUpIntMsk_Msk (0x80000000UL) /*!< USB GINTMSK: WkUpIntMsk (Bitfield-Mask: 0x01) */ + +/* --------------------------------- USB_GRXSTSR -------------------------------- */ +#define USB_GRXSTSR_EPNum_Pos (0UL) /*!< USB GRXSTSR: EPNum (Bit 0) */ +#define USB_GRXSTSR_EPNum_Msk (0xfUL) /*!< USB GRXSTSR: EPNum (Bitfield-Mask: 0x0f) */ +#define USB_GRXSTSR_BCnt_Pos (4UL) /*!< USB GRXSTSR: BCnt (Bit 4) */ +#define USB_GRXSTSR_BCnt_Msk (0x7ff0UL) /*!< USB GRXSTSR: BCnt (Bitfield-Mask: 0x7ff) */ +#define USB_GRXSTSR_DPID_Pos (15UL) /*!< USB GRXSTSR: DPID (Bit 15) */ +#define USB_GRXSTSR_DPID_Msk (0x18000UL) /*!< USB GRXSTSR: DPID (Bitfield-Mask: 0x03) */ +#define USB_GRXSTSR_PktSts_Pos (17UL) /*!< USB GRXSTSR: PktSts (Bit 17) */ +#define USB_GRXSTSR_PktSts_Msk (0x1e0000UL) /*!< USB GRXSTSR: PktSts (Bitfield-Mask: 0x0f) */ +#define USB_GRXSTSR_FN_Pos (21UL) /*!< USB GRXSTSR: FN (Bit 21) */ +#define USB_GRXSTSR_FN_Msk (0x1e00000UL) /*!< USB GRXSTSR: FN (Bitfield-Mask: 0x0f) */ + +/* --------------------------------- USB_GRXSTSP -------------------------------- */ +#define USB_GRXSTSP_EPNum_Pos (0UL) /*!< USB GRXSTSP: EPNum (Bit 0) */ +#define USB_GRXSTSP_EPNum_Msk (0xfUL) /*!< USB GRXSTSP: EPNum (Bitfield-Mask: 0x0f) */ +#define USB_GRXSTSP_BCnt_Pos (4UL) /*!< USB GRXSTSP: BCnt (Bit 4) */ +#define USB_GRXSTSP_BCnt_Msk (0x7ff0UL) /*!< USB GRXSTSP: BCnt (Bitfield-Mask: 0x7ff) */ +#define USB_GRXSTSP_DPID_Pos (15UL) /*!< USB GRXSTSP: DPID (Bit 15) */ +#define USB_GRXSTSP_DPID_Msk (0x18000UL) /*!< USB GRXSTSP: DPID (Bitfield-Mask: 0x03) */ +#define USB_GRXSTSP_PktSts_Pos (17UL) /*!< USB GRXSTSP: PktSts (Bit 17) */ +#define USB_GRXSTSP_PktSts_Msk (0x1e0000UL) /*!< USB GRXSTSP: PktSts (Bitfield-Mask: 0x0f) */ +#define USB_GRXSTSP_FN_Pos (21UL) /*!< USB GRXSTSP: FN (Bit 21) */ +#define USB_GRXSTSP_FN_Msk (0x1e00000UL) /*!< USB GRXSTSP: FN (Bitfield-Mask: 0x0f) */ + +/* --------------------------------- USB_GRXFSIZ -------------------------------- */ +#define USB_GRXFSIZ_RxFDep_Pos (0UL) /*!< USB GRXFSIZ: RxFDep (Bit 0) */ +#define USB_GRXFSIZ_RxFDep_Msk (0xffffUL) /*!< USB GRXFSIZ: RxFDep (Bitfield-Mask: 0xffff) */ + +/* -------------------------------- USB_GNPTXFSIZ ------------------------------- */ +#define USB_GNPTXFSIZ_INEPTxF0StAddr_Pos (0UL) /*!< USB GNPTXFSIZ: INEPTxF0StAddr (Bit 0) */ +#define USB_GNPTXFSIZ_INEPTxF0StAddr_Msk (0xffffUL) /*!< USB GNPTXFSIZ: INEPTxF0StAddr (Bitfield-Mask: 0xffff) */ +#define USB_GNPTXFSIZ_INEPTxF0Dep_Pos (16UL) /*!< USB GNPTXFSIZ: INEPTxF0Dep (Bit 16) */ +#define USB_GNPTXFSIZ_INEPTxF0Dep_Msk (0xffff0000UL) /*!< USB GNPTXFSIZ: INEPTxF0Dep (Bitfield-Mask: 0xffff) */ + +/* ---------------------------------- USB_GUID ---------------------------------- */ +#define USB_GUID_MOD_REV_Pos (0UL) /*!< USB GUID: MOD_REV (Bit 0) */ +#define USB_GUID_MOD_REV_Msk (0xffUL) /*!< USB GUID: MOD_REV (Bitfield-Mask: 0xff) */ +#define USB_GUID_MOD_TYPE_Pos (8UL) /*!< USB GUID: MOD_TYPE (Bit 8) */ +#define USB_GUID_MOD_TYPE_Msk (0xff00UL) /*!< USB GUID: MOD_TYPE (Bitfield-Mask: 0xff) */ +#define USB_GUID_MOD_NUMBER_Pos (16UL) /*!< USB GUID: MOD_NUMBER (Bit 16) */ +#define USB_GUID_MOD_NUMBER_Msk (0xffff0000UL) /*!< USB GUID: MOD_NUMBER (Bitfield-Mask: 0xffff) */ + +/* -------------------------------- USB_GDFIFOCFG ------------------------------- */ +#define USB_GDFIFOCFG_GDFIFOCfg_Pos (0UL) /*!< USB GDFIFOCFG: GDFIFOCfg (Bit 0) */ +#define USB_GDFIFOCFG_GDFIFOCfg_Msk (0xffffUL) /*!< USB GDFIFOCFG: GDFIFOCfg (Bitfield-Mask: 0xffff) */ +#define USB_GDFIFOCFG_EPInfoBaseAddr_Pos (16UL) /*!< USB GDFIFOCFG: EPInfoBaseAddr (Bit 16) */ +#define USB_GDFIFOCFG_EPInfoBaseAddr_Msk (0xffff0000UL) /*!< USB GDFIFOCFG: EPInfoBaseAddr (Bitfield-Mask: 0xffff) */ + +/* -------------------------------- USB_DIEPTXF1 -------------------------------- */ +#define USB_DIEPTXF1_INEPnTxFStAddr_Pos (0UL) /*!< USB DIEPTXF1: INEPnTxFStAddr (Bit 0) */ +#define USB_DIEPTXF1_INEPnTxFStAddr_Msk (0xffffUL) /*!< USB DIEPTXF1: INEPnTxFStAddr (Bitfield-Mask: 0xffff) */ +#define USB_DIEPTXF1_INEPnTxFDep_Pos (16UL) /*!< USB DIEPTXF1: INEPnTxFDep (Bit 16) */ +#define USB_DIEPTXF1_INEPnTxFDep_Msk (0xffff0000UL) /*!< USB DIEPTXF1: INEPnTxFDep (Bitfield-Mask: 0xffff) */ + +/* -------------------------------- USB_DIEPTXF2 -------------------------------- */ +#define USB_DIEPTXF2_INEPnTxFStAddr_Pos (0UL) /*!< USB DIEPTXF2: INEPnTxFStAddr (Bit 0) */ +#define USB_DIEPTXF2_INEPnTxFStAddr_Msk (0xffffUL) /*!< USB DIEPTXF2: INEPnTxFStAddr (Bitfield-Mask: 0xffff) */ +#define USB_DIEPTXF2_INEPnTxFDep_Pos (16UL) /*!< USB DIEPTXF2: INEPnTxFDep (Bit 16) */ +#define USB_DIEPTXF2_INEPnTxFDep_Msk (0xffff0000UL) /*!< USB DIEPTXF2: INEPnTxFDep (Bitfield-Mask: 0xffff) */ + +/* -------------------------------- USB_DIEPTXF3 -------------------------------- */ +#define USB_DIEPTXF3_INEPnTxFStAddr_Pos (0UL) /*!< USB DIEPTXF3: INEPnTxFStAddr (Bit 0) */ +#define USB_DIEPTXF3_INEPnTxFStAddr_Msk (0xffffUL) /*!< USB DIEPTXF3: INEPnTxFStAddr (Bitfield-Mask: 0xffff) */ +#define USB_DIEPTXF3_INEPnTxFDep_Pos (16UL) /*!< USB DIEPTXF3: INEPnTxFDep (Bit 16) */ +#define USB_DIEPTXF3_INEPnTxFDep_Msk (0xffff0000UL) /*!< USB DIEPTXF3: INEPnTxFDep (Bitfield-Mask: 0xffff) */ + +/* -------------------------------- USB_DIEPTXF4 -------------------------------- */ +#define USB_DIEPTXF4_INEPnTxFStAddr_Pos (0UL) /*!< USB DIEPTXF4: INEPnTxFStAddr (Bit 0) */ +#define USB_DIEPTXF4_INEPnTxFStAddr_Msk (0xffffUL) /*!< USB DIEPTXF4: INEPnTxFStAddr (Bitfield-Mask: 0xffff) */ +#define USB_DIEPTXF4_INEPnTxFDep_Pos (16UL) /*!< USB DIEPTXF4: INEPnTxFDep (Bit 16) */ +#define USB_DIEPTXF4_INEPnTxFDep_Msk (0xffff0000UL) /*!< USB DIEPTXF4: INEPnTxFDep (Bitfield-Mask: 0xffff) */ + +/* -------------------------------- USB_DIEPTXF5 -------------------------------- */ +#define USB_DIEPTXF5_INEPnTxFStAddr_Pos (0UL) /*!< USB DIEPTXF5: INEPnTxFStAddr (Bit 0) */ +#define USB_DIEPTXF5_INEPnTxFStAddr_Msk (0xffffUL) /*!< USB DIEPTXF5: INEPnTxFStAddr (Bitfield-Mask: 0xffff) */ +#define USB_DIEPTXF5_INEPnTxFDep_Pos (16UL) /*!< USB DIEPTXF5: INEPnTxFDep (Bit 16) */ +#define USB_DIEPTXF5_INEPnTxFDep_Msk (0xffff0000UL) /*!< USB DIEPTXF5: INEPnTxFDep (Bitfield-Mask: 0xffff) */ + +/* -------------------------------- USB_DIEPTXF6 -------------------------------- */ +#define USB_DIEPTXF6_INEPnTxFStAddr_Pos (0UL) /*!< USB DIEPTXF6: INEPnTxFStAddr (Bit 0) */ +#define USB_DIEPTXF6_INEPnTxFStAddr_Msk (0xffffUL) /*!< USB DIEPTXF6: INEPnTxFStAddr (Bitfield-Mask: 0xffff) */ +#define USB_DIEPTXF6_INEPnTxFDep_Pos (16UL) /*!< USB DIEPTXF6: INEPnTxFDep (Bit 16) */ +#define USB_DIEPTXF6_INEPnTxFDep_Msk (0xffff0000UL) /*!< USB DIEPTXF6: INEPnTxFDep (Bitfield-Mask: 0xffff) */ + +/* ---------------------------------- USB_DCFG ---------------------------------- */ +#define USB_DCFG_DevSpd_Pos (0UL) /*!< USB DCFG: DevSpd (Bit 0) */ +#define USB_DCFG_DevSpd_Msk (0x3UL) /*!< USB DCFG: DevSpd (Bitfield-Mask: 0x03) */ +#define USB_DCFG_NZStsOUTHShk_Pos (2UL) /*!< USB DCFG: NZStsOUTHShk (Bit 2) */ +#define USB_DCFG_NZStsOUTHShk_Msk (0x4UL) /*!< USB DCFG: NZStsOUTHShk (Bitfield-Mask: 0x01) */ +#define USB_DCFG_DevAddr_Pos (4UL) /*!< USB DCFG: DevAddr (Bit 4) */ +#define USB_DCFG_DevAddr_Msk (0x7f0UL) /*!< USB DCFG: DevAddr (Bitfield-Mask: 0x7f) */ +#define USB_DCFG_PerFrInt_Pos (11UL) /*!< USB DCFG: PerFrInt (Bit 11) */ +#define USB_DCFG_PerFrInt_Msk (0x1800UL) /*!< USB DCFG: PerFrInt (Bitfield-Mask: 0x03) */ +#define USB_DCFG_DescDMA_Pos (23UL) /*!< USB DCFG: DescDMA (Bit 23) */ +#define USB_DCFG_DescDMA_Msk (0x800000UL) /*!< USB DCFG: DescDMA (Bitfield-Mask: 0x01) */ +#define USB_DCFG_PerSchIntvl_Pos (24UL) /*!< USB DCFG: PerSchIntvl (Bit 24) */ +#define USB_DCFG_PerSchIntvl_Msk (0x3000000UL) /*!< USB DCFG: PerSchIntvl (Bitfield-Mask: 0x03) */ + +/* ---------------------------------- USB_DCTL ---------------------------------- */ +#define USB_DCTL_RmtWkUpSig_Pos (0UL) /*!< USB DCTL: RmtWkUpSig (Bit 0) */ +#define USB_DCTL_RmtWkUpSig_Msk (0x1UL) /*!< USB DCTL: RmtWkUpSig (Bitfield-Mask: 0x01) */ +#define USB_DCTL_SftDiscon_Pos (1UL) /*!< USB DCTL: SftDiscon (Bit 1) */ +#define USB_DCTL_SftDiscon_Msk (0x2UL) /*!< USB DCTL: SftDiscon (Bitfield-Mask: 0x01) */ +#define USB_DCTL_GNPINNakSts_Pos (2UL) /*!< USB DCTL: GNPINNakSts (Bit 2) */ +#define USB_DCTL_GNPINNakSts_Msk (0x4UL) /*!< USB DCTL: GNPINNakSts (Bitfield-Mask: 0x01) */ +#define USB_DCTL_GOUTNakSts_Pos (3UL) /*!< USB DCTL: GOUTNakSts (Bit 3) */ +#define USB_DCTL_GOUTNakSts_Msk (0x8UL) /*!< USB DCTL: GOUTNakSts (Bitfield-Mask: 0x01) */ +#define USB_DCTL_SGNPInNak_Pos (7UL) /*!< USB DCTL: SGNPInNak (Bit 7) */ +#define USB_DCTL_SGNPInNak_Msk (0x80UL) /*!< USB DCTL: SGNPInNak (Bitfield-Mask: 0x01) */ +#define USB_DCTL_CGNPInNak_Pos (8UL) /*!< USB DCTL: CGNPInNak (Bit 8) */ +#define USB_DCTL_CGNPInNak_Msk (0x100UL) /*!< USB DCTL: CGNPInNak (Bitfield-Mask: 0x01) */ +#define USB_DCTL_SGOUTNak_Pos (9UL) /*!< USB DCTL: SGOUTNak (Bit 9) */ +#define USB_DCTL_SGOUTNak_Msk (0x200UL) /*!< USB DCTL: SGOUTNak (Bitfield-Mask: 0x01) */ +#define USB_DCTL_CGOUTNak_Pos (10UL) /*!< USB DCTL: CGOUTNak (Bit 10) */ +#define USB_DCTL_CGOUTNak_Msk (0x400UL) /*!< USB DCTL: CGOUTNak (Bitfield-Mask: 0x01) */ +#define USB_DCTL_GMC_Pos (13UL) /*!< USB DCTL: GMC (Bit 13) */ +#define USB_DCTL_GMC_Msk (0x6000UL) /*!< USB DCTL: GMC (Bitfield-Mask: 0x03) */ +#define USB_DCTL_IgnrFrmNum_Pos (15UL) /*!< USB DCTL: IgnrFrmNum (Bit 15) */ +#define USB_DCTL_IgnrFrmNum_Msk (0x8000UL) /*!< USB DCTL: IgnrFrmNum (Bitfield-Mask: 0x01) */ +#define USB_DCTL_NakOnBble_Pos (16UL) /*!< USB DCTL: NakOnBble (Bit 16) */ +#define USB_DCTL_NakOnBble_Msk (0x10000UL) /*!< USB DCTL: NakOnBble (Bitfield-Mask: 0x01) */ +#define USB_DCTL_EnContOnBNA_Pos (17UL) /*!< USB DCTL: EnContOnBNA (Bit 17) */ +#define USB_DCTL_EnContOnBNA_Msk (0x20000UL) /*!< USB DCTL: EnContOnBNA (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- USB_DSTS ---------------------------------- */ +#define USB_DSTS_SuspSts_Pos (0UL) /*!< USB DSTS: SuspSts (Bit 0) */ +#define USB_DSTS_SuspSts_Msk (0x1UL) /*!< USB DSTS: SuspSts (Bitfield-Mask: 0x01) */ +#define USB_DSTS_EnumSpd_Pos (1UL) /*!< USB DSTS: EnumSpd (Bit 1) */ +#define USB_DSTS_EnumSpd_Msk (0x6UL) /*!< USB DSTS: EnumSpd (Bitfield-Mask: 0x03) */ +#define USB_DSTS_ErrticErr_Pos (3UL) /*!< USB DSTS: ErrticErr (Bit 3) */ +#define USB_DSTS_ErrticErr_Msk (0x8UL) /*!< USB DSTS: ErrticErr (Bitfield-Mask: 0x01) */ +#define USB_DSTS_SOFFN_Pos (8UL) /*!< USB DSTS: SOFFN (Bit 8) */ +#define USB_DSTS_SOFFN_Msk (0x3fff00UL) /*!< USB DSTS: SOFFN (Bitfield-Mask: 0x3fff) */ + +/* --------------------------------- USB_DIEPMSK -------------------------------- */ +#define USB_DIEPMSK_XferComplMsk_Pos (0UL) /*!< USB DIEPMSK: XferComplMsk (Bit 0) */ +#define USB_DIEPMSK_XferComplMsk_Msk (0x1UL) /*!< USB DIEPMSK: XferComplMsk (Bitfield-Mask: 0x01) */ +#define USB_DIEPMSK_EPDisbldMsk_Pos (1UL) /*!< USB DIEPMSK: EPDisbldMsk (Bit 1) */ +#define USB_DIEPMSK_EPDisbldMsk_Msk (0x2UL) /*!< USB DIEPMSK: EPDisbldMsk (Bitfield-Mask: 0x01) */ +#define USB_DIEPMSK_AHBErrMsk_Pos (2UL) /*!< USB DIEPMSK: AHBErrMsk (Bit 2) */ +#define USB_DIEPMSK_AHBErrMsk_Msk (0x4UL) /*!< USB DIEPMSK: AHBErrMsk (Bitfield-Mask: 0x01) */ +#define USB_DIEPMSK_TimeOUTMsk_Pos (3UL) /*!< USB DIEPMSK: TimeOUTMsk (Bit 3) */ +#define USB_DIEPMSK_TimeOUTMsk_Msk (0x8UL) /*!< USB DIEPMSK: TimeOUTMsk (Bitfield-Mask: 0x01) */ +#define USB_DIEPMSK_INTknTXFEmpMsk_Pos (4UL) /*!< USB DIEPMSK: INTknTXFEmpMsk (Bit 4) */ +#define USB_DIEPMSK_INTknTXFEmpMsk_Msk (0x10UL) /*!< USB DIEPMSK: INTknTXFEmpMsk (Bitfield-Mask: 0x01) */ +#define USB_DIEPMSK_INEPNakEffMsk_Pos (6UL) /*!< USB DIEPMSK: INEPNakEffMsk (Bit 6) */ +#define USB_DIEPMSK_INEPNakEffMsk_Msk (0x40UL) /*!< USB DIEPMSK: INEPNakEffMsk (Bitfield-Mask: 0x01) */ +#define USB_DIEPMSK_TxfifoUndrnMsk_Pos (8UL) /*!< USB DIEPMSK: TxfifoUndrnMsk (Bit 8) */ +#define USB_DIEPMSK_TxfifoUndrnMsk_Msk (0x100UL) /*!< USB DIEPMSK: TxfifoUndrnMsk (Bitfield-Mask: 0x01) */ +#define USB_DIEPMSK_BNAInIntrMsk_Pos (9UL) /*!< USB DIEPMSK: BNAInIntrMsk (Bit 9) */ +#define USB_DIEPMSK_BNAInIntrMsk_Msk (0x200UL) /*!< USB DIEPMSK: BNAInIntrMsk (Bitfield-Mask: 0x01) */ +#define USB_DIEPMSK_NAKMsk_Pos (13UL) /*!< USB DIEPMSK: NAKMsk (Bit 13) */ +#define USB_DIEPMSK_NAKMsk_Msk (0x2000UL) /*!< USB DIEPMSK: NAKMsk (Bitfield-Mask: 0x01) */ + +/* --------------------------------- USB_DOEPMSK -------------------------------- */ +#define USB_DOEPMSK_XferComplMsk_Pos (0UL) /*!< USB DOEPMSK: XferComplMsk (Bit 0) */ +#define USB_DOEPMSK_XferComplMsk_Msk (0x1UL) /*!< USB DOEPMSK: XferComplMsk (Bitfield-Mask: 0x01) */ +#define USB_DOEPMSK_EPDisbldMsk_Pos (1UL) /*!< USB DOEPMSK: EPDisbldMsk (Bit 1) */ +#define USB_DOEPMSK_EPDisbldMsk_Msk (0x2UL) /*!< USB DOEPMSK: EPDisbldMsk (Bitfield-Mask: 0x01) */ +#define USB_DOEPMSK_AHBErrMsk_Pos (2UL) /*!< USB DOEPMSK: AHBErrMsk (Bit 2) */ +#define USB_DOEPMSK_AHBErrMsk_Msk (0x4UL) /*!< USB DOEPMSK: AHBErrMsk (Bitfield-Mask: 0x01) */ +#define USB_DOEPMSK_SetUPMsk_Pos (3UL) /*!< USB DOEPMSK: SetUPMsk (Bit 3) */ +#define USB_DOEPMSK_SetUPMsk_Msk (0x8UL) /*!< USB DOEPMSK: SetUPMsk (Bitfield-Mask: 0x01) */ +#define USB_DOEPMSK_OUTTknEPdisMsk_Pos (4UL) /*!< USB DOEPMSK: OUTTknEPdisMsk (Bit 4) */ +#define USB_DOEPMSK_OUTTknEPdisMsk_Msk (0x10UL) /*!< USB DOEPMSK: OUTTknEPdisMsk (Bitfield-Mask: 0x01) */ +#define USB_DOEPMSK_Back2BackSETup_Pos (6UL) /*!< USB DOEPMSK: Back2BackSETup (Bit 6) */ +#define USB_DOEPMSK_Back2BackSETup_Msk (0x40UL) /*!< USB DOEPMSK: Back2BackSETup (Bitfield-Mask: 0x01) */ +#define USB_DOEPMSK_OutPktErrMsk_Pos (8UL) /*!< USB DOEPMSK: OutPktErrMsk (Bit 8) */ +#define USB_DOEPMSK_OutPktErrMsk_Msk (0x100UL) /*!< USB DOEPMSK: OutPktErrMsk (Bitfield-Mask: 0x01) */ +#define USB_DOEPMSK_BnaOutIntrMsk_Pos (9UL) /*!< USB DOEPMSK: BnaOutIntrMsk (Bit 9) */ +#define USB_DOEPMSK_BnaOutIntrMsk_Msk (0x200UL) /*!< USB DOEPMSK: BnaOutIntrMsk (Bitfield-Mask: 0x01) */ +#define USB_DOEPMSK_BbleErrMsk_Pos (12UL) /*!< USB DOEPMSK: BbleErrMsk (Bit 12) */ +#define USB_DOEPMSK_BbleErrMsk_Msk (0x1000UL) /*!< USB DOEPMSK: BbleErrMsk (Bitfield-Mask: 0x01) */ +#define USB_DOEPMSK_NAKMsk_Pos (13UL) /*!< USB DOEPMSK: NAKMsk (Bit 13) */ +#define USB_DOEPMSK_NAKMsk_Msk (0x2000UL) /*!< USB DOEPMSK: NAKMsk (Bitfield-Mask: 0x01) */ +#define USB_DOEPMSK_NYETMsk_Pos (14UL) /*!< USB DOEPMSK: NYETMsk (Bit 14) */ +#define USB_DOEPMSK_NYETMsk_Msk (0x4000UL) /*!< USB DOEPMSK: NYETMsk (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- USB_DAINT --------------------------------- */ +#define USB_DAINT_InEpInt_Pos (0UL) /*!< USB DAINT: InEpInt (Bit 0) */ +#define USB_DAINT_InEpInt_Msk (0xffffUL) /*!< USB DAINT: InEpInt (Bitfield-Mask: 0xffff) */ +#define USB_DAINT_OutEPInt_Pos (16UL) /*!< USB DAINT: OutEPInt (Bit 16) */ +#define USB_DAINT_OutEPInt_Msk (0xffff0000UL) /*!< USB DAINT: OutEPInt (Bitfield-Mask: 0xffff) */ + +/* -------------------------------- USB_DAINTMSK -------------------------------- */ +#define USB_DAINTMSK_InEpMsk_Pos (0UL) /*!< USB DAINTMSK: InEpMsk (Bit 0) */ +#define USB_DAINTMSK_InEpMsk_Msk (0xffffUL) /*!< USB DAINTMSK: InEpMsk (Bitfield-Mask: 0xffff) */ +#define USB_DAINTMSK_OutEpMsk_Pos (16UL) /*!< USB DAINTMSK: OutEpMsk (Bit 16) */ +#define USB_DAINTMSK_OutEpMsk_Msk (0xffff0000UL) /*!< USB DAINTMSK: OutEpMsk (Bitfield-Mask: 0xffff) */ + +/* -------------------------------- USB_DVBUSDIS -------------------------------- */ +#define USB_DVBUSDIS_DVBUSDis_Pos (0UL) /*!< USB DVBUSDIS: DVBUSDis (Bit 0) */ +#define USB_DVBUSDIS_DVBUSDis_Msk (0xffffUL) /*!< USB DVBUSDIS: DVBUSDis (Bitfield-Mask: 0xffff) */ + +/* ------------------------------- USB_DVBUSPULSE ------------------------------- */ +#define USB_DVBUSPULSE_DVBUSPulse_Pos (0UL) /*!< USB DVBUSPULSE: DVBUSPulse (Bit 0) */ +#define USB_DVBUSPULSE_DVBUSPulse_Msk (0xfffUL) /*!< USB DVBUSPULSE: DVBUSPulse (Bitfield-Mask: 0xfff) */ + +/* ------------------------------- USB_DIEPEMPMSK ------------------------------- */ +#define USB_DIEPEMPMSK_InEpTxfEmpMsk_Pos (0UL) /*!< USB DIEPEMPMSK: InEpTxfEmpMsk (Bit 0) */ +#define USB_DIEPEMPMSK_InEpTxfEmpMsk_Msk (0xffffUL) /*!< USB DIEPEMPMSK: InEpTxfEmpMsk (Bitfield-Mask: 0xffff) */ + +/* --------------------------------- USB_PCGCCTL -------------------------------- */ +#define USB_PCGCCTL_StopPclk_Pos (0UL) /*!< USB PCGCCTL: StopPclk (Bit 0) */ +#define USB_PCGCCTL_StopPclk_Msk (0x1UL) /*!< USB PCGCCTL: StopPclk (Bitfield-Mask: 0x01) */ +#define USB_PCGCCTL_GateHclk_Pos (1UL) /*!< USB PCGCCTL: GateHclk (Bit 1) */ +#define USB_PCGCCTL_GateHclk_Msk (0x2UL) /*!< USB PCGCCTL: GateHclk (Bitfield-Mask: 0x01) */ + + +/* ================================================================================ */ +/* ================ struct 'USB0_EP0' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ------------------------------ USB_EP_DIEPCTL0 ----------------------------- */ +#define USB_EP_DIEPCTL0_MPS_Pos (0UL) /*!< USB0_EP0 DIEPCTL0: MPS (Bit 0) */ +#define USB_EP_DIEPCTL0_MPS_Msk (0x3UL) /*!< USB0_EP0 DIEPCTL0: MPS (Bitfield-Mask: 0x03) */ +#define USB_EP_DIEPCTL0_USBActEP_Pos (15UL) /*!< USB0_EP0 DIEPCTL0: USBActEP (Bit 15) */ +#define USB_EP_DIEPCTL0_USBActEP_Msk (0x8000UL) /*!< USB0_EP0 DIEPCTL0: USBActEP (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPCTL0_NAKSts_Pos (17UL) /*!< USB0_EP0 DIEPCTL0: NAKSts (Bit 17) */ +#define USB_EP_DIEPCTL0_NAKSts_Msk (0x20000UL) /*!< USB0_EP0 DIEPCTL0: NAKSts (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPCTL0_EPType_Pos (18UL) /*!< USB0_EP0 DIEPCTL0: EPType (Bit 18) */ +#define USB_EP_DIEPCTL0_EPType_Msk (0xc0000UL) /*!< USB0_EP0 DIEPCTL0: EPType (Bitfield-Mask: 0x03) */ +#define USB_EP_DIEPCTL0_Stall_Pos (21UL) /*!< USB0_EP0 DIEPCTL0: Stall (Bit 21) */ +#define USB_EP_DIEPCTL0_Stall_Msk (0x200000UL) /*!< USB0_EP0 DIEPCTL0: Stall (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPCTL0_TxFNum_Pos (22UL) /*!< USB0_EP0 DIEPCTL0: TxFNum (Bit 22) */ +#define USB_EP_DIEPCTL0_TxFNum_Msk (0x3c00000UL) /*!< USB0_EP0 DIEPCTL0: TxFNum (Bitfield-Mask: 0x0f) */ +#define USB_EP_DIEPCTL0_CNAK_Pos (26UL) /*!< USB0_EP0 DIEPCTL0: CNAK (Bit 26) */ +#define USB_EP_DIEPCTL0_CNAK_Msk (0x4000000UL) /*!< USB0_EP0 DIEPCTL0: CNAK (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPCTL0_SNAK_Pos (27UL) /*!< USB0_EP0 DIEPCTL0: SNAK (Bit 27) */ +#define USB_EP_DIEPCTL0_SNAK_Msk (0x8000000UL) /*!< USB0_EP0 DIEPCTL0: SNAK (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPCTL0_EPDis_Pos (30UL) /*!< USB0_EP0 DIEPCTL0: EPDis (Bit 30) */ +#define USB_EP_DIEPCTL0_EPDis_Msk (0x40000000UL) /*!< USB0_EP0 DIEPCTL0: EPDis (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPCTL0_EPEna_Pos (31UL) /*!< USB0_EP0 DIEPCTL0: EPEna (Bit 31) */ +#define USB_EP_DIEPCTL0_EPEna_Msk (0x80000000UL) /*!< USB0_EP0 DIEPCTL0: EPEna (Bitfield-Mask: 0x01) */ + +/* ------------------------------ USB_EP_DIEPINT0 ----------------------------- */ +#define USB_EP_DIEPINT0_XferCompl_Pos (0UL) /*!< USB0_EP0 DIEPINT0: XferCompl (Bit 0) */ +#define USB_EP_DIEPINT0_XferCompl_Msk (0x1UL) /*!< USB0_EP0 DIEPINT0: XferCompl (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPINT0_EPDisbld_Pos (1UL) /*!< USB0_EP0 DIEPINT0: EPDisbld (Bit 1) */ +#define USB_EP_DIEPINT0_EPDisbld_Msk (0x2UL) /*!< USB0_EP0 DIEPINT0: EPDisbld (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPINT0_AHBErr_Pos (2UL) /*!< USB0_EP0 DIEPINT0: AHBErr (Bit 2) */ +#define USB_EP_DIEPINT0_AHBErr_Msk (0x4UL) /*!< USB0_EP0 DIEPINT0: AHBErr (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPINT0_TimeOUT_Pos (3UL) /*!< USB0_EP0 DIEPINT0: TimeOUT (Bit 3) */ +#define USB_EP_DIEPINT0_TimeOUT_Msk (0x8UL) /*!< USB0_EP0 DIEPINT0: TimeOUT (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPINT0_INTknTXFEmp_Pos (4UL) /*!< USB0_EP0 DIEPINT0: INTknTXFEmp (Bit 4) */ +#define USB_EP_DIEPINT0_INTknTXFEmp_Msk (0x10UL) /*!< USB0_EP0 DIEPINT0: INTknTXFEmp (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPINT0_INEPNakEff_Pos (6UL) /*!< USB0_EP0 DIEPINT0: INEPNakEff (Bit 6) */ +#define USB_EP_DIEPINT0_INEPNakEff_Msk (0x40UL) /*!< USB0_EP0 DIEPINT0: INEPNakEff (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPINT0_TxFEmp_Pos (7UL) /*!< USB0_EP0 DIEPINT0: TxFEmp (Bit 7) */ +#define USB_EP_DIEPINT0_TxFEmp_Msk (0x80UL) /*!< USB0_EP0 DIEPINT0: TxFEmp (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPINT0_BNAIntr_Pos (9UL) /*!< USB0_EP0 DIEPINT0: BNAIntr (Bit 9) */ +#define USB_EP_DIEPINT0_BNAIntr_Msk (0x200UL) /*!< USB0_EP0 DIEPINT0: BNAIntr (Bitfield-Mask: 0x01) */ + +/* ----------------------------- USB_EP_DIEPTSIZ0 ----------------------------- */ +#define USB_EP_DIEPTSIZ0_XferSize_Pos (0UL) /*!< USB0_EP0 DIEPTSIZ0: XferSize (Bit 0) */ +#define USB_EP_DIEPTSIZ0_XferSize_Msk (0x7fUL) /*!< USB0_EP0 DIEPTSIZ0: XferSize (Bitfield-Mask: 0x7f) */ +#define USB_EP_DIEPTSIZ0_PktCnt_Pos (19UL) /*!< USB0_EP0 DIEPTSIZ0: PktCnt (Bit 19) */ +#define USB_EP_DIEPTSIZ0_PktCnt_Msk (0x180000UL) /*!< USB0_EP0 DIEPTSIZ0: PktCnt (Bitfield-Mask: 0x03) */ + +/* ------------------------------ USB_EP_DIEPDMA0 ----------------------------- */ +#define USB_EP_DIEPDMA0_DMAAddr_Pos (0UL) /*!< USB0_EP0 DIEPDMA0: DMAAddr (Bit 0) */ +#define USB_EP_DIEPDMA0_DMAAddr_Msk (0xffffffffUL) /*!< USB0_EP0 DIEPDMA0: DMAAddr (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------------ USB_EP_DTXFSTS0 ----------------------------- */ +#define USB_EP_DTXFSTS0_INEPTxFSpcAvail_Pos (0UL) /*!< USB0_EP0 DTXFSTS0: INEPTxFSpcAvail (Bit 0) */ +#define USB_EP_DTXFSTS0_INEPTxFSpcAvail_Msk (0xffffUL) /*!< USB0_EP0 DTXFSTS0: INEPTxFSpcAvail (Bitfield-Mask: 0xffff) */ + +/* ----------------------------- USB_EP_DIEPDMAB0 ----------------------------- */ +#define USB_EP_DIEPDMAB0_DMABufferAddr_Pos (0UL) /*!< USB0_EP0 DIEPDMAB0: DMABufferAddr (Bit 0) */ +#define USB_EP_DIEPDMAB0_DMABufferAddr_Msk (0xffffffffUL) /*!< USB0_EP0 DIEPDMAB0: DMABufferAddr (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------------ USB_EP_DOEPCTL0 ----------------------------- */ +#define USB_EP_DOEPCTL0_MPS_Pos (0UL) /*!< USB0_EP0 DOEPCTL0: MPS (Bit 0) */ +#define USB_EP_DOEPCTL0_MPS_Msk (0x3UL) /*!< USB0_EP0 DOEPCTL0: MPS (Bitfield-Mask: 0x03) */ +#define USB_EP_DOEPCTL0_USBActEP_Pos (15UL) /*!< USB0_EP0 DOEPCTL0: USBActEP (Bit 15) */ +#define USB_EP_DOEPCTL0_USBActEP_Msk (0x8000UL) /*!< USB0_EP0 DOEPCTL0: USBActEP (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPCTL0_NAKSts_Pos (17UL) /*!< USB0_EP0 DOEPCTL0: NAKSts (Bit 17) */ +#define USB_EP_DOEPCTL0_NAKSts_Msk (0x20000UL) /*!< USB0_EP0 DOEPCTL0: NAKSts (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPCTL0_EPType_Pos (18UL) /*!< USB0_EP0 DOEPCTL0: EPType (Bit 18) */ +#define USB_EP_DOEPCTL0_EPType_Msk (0xc0000UL) /*!< USB0_EP0 DOEPCTL0: EPType (Bitfield-Mask: 0x03) */ +#define USB_EP_DOEPCTL0_Snp_Pos (20UL) /*!< USB0_EP0 DOEPCTL0: Snp (Bit 20) */ +#define USB_EP_DOEPCTL0_Snp_Msk (0x100000UL) /*!< USB0_EP0 DOEPCTL0: Snp (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPCTL0_Stall_Pos (21UL) /*!< USB0_EP0 DOEPCTL0: Stall (Bit 21) */ +#define USB_EP_DOEPCTL0_Stall_Msk (0x200000UL) /*!< USB0_EP0 DOEPCTL0: Stall (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPCTL0_CNAK_Pos (26UL) /*!< USB0_EP0 DOEPCTL0: CNAK (Bit 26) */ +#define USB_EP_DOEPCTL0_CNAK_Msk (0x4000000UL) /*!< USB0_EP0 DOEPCTL0: CNAK (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPCTL0_SNAK_Pos (27UL) /*!< USB0_EP0 DOEPCTL0: SNAK (Bit 27) */ +#define USB_EP_DOEPCTL0_SNAK_Msk (0x8000000UL) /*!< USB0_EP0 DOEPCTL0: SNAK (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPCTL0_EPDis_Pos (30UL) /*!< USB0_EP0 DOEPCTL0: EPDis (Bit 30) */ +#define USB_EP_DOEPCTL0_EPDis_Msk (0x40000000UL) /*!< USB0_EP0 DOEPCTL0: EPDis (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPCTL0_EPEna_Pos (31UL) /*!< USB0_EP0 DOEPCTL0: EPEna (Bit 31) */ +#define USB_EP_DOEPCTL0_EPEna_Msk (0x80000000UL) /*!< USB0_EP0 DOEPCTL0: EPEna (Bitfield-Mask: 0x01) */ + +/* ------------------------------ USB_EP_DOEPINT0 ----------------------------- */ +#define USB_EP_DOEPINT0_XferCompl_Pos (0UL) /*!< USB0_EP0 DOEPINT0: XferCompl (Bit 0) */ +#define USB_EP_DOEPINT0_XferCompl_Msk (0x1UL) /*!< USB0_EP0 DOEPINT0: XferCompl (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPINT0_EPDisbld_Pos (1UL) /*!< USB0_EP0 DOEPINT0: EPDisbld (Bit 1) */ +#define USB_EP_DOEPINT0_EPDisbld_Msk (0x2UL) /*!< USB0_EP0 DOEPINT0: EPDisbld (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPINT0_AHBErr_Pos (2UL) /*!< USB0_EP0 DOEPINT0: AHBErr (Bit 2) */ +#define USB_EP_DOEPINT0_AHBErr_Msk (0x4UL) /*!< USB0_EP0 DOEPINT0: AHBErr (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPINT0_SetUp_Pos (3UL) /*!< USB0_EP0 DOEPINT0: SetUp (Bit 3) */ +#define USB_EP_DOEPINT0_SetUp_Msk (0x8UL) /*!< USB0_EP0 DOEPINT0: SetUp (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPINT0_OUTTknEPdis_Pos (4UL) /*!< USB0_EP0 DOEPINT0: OUTTknEPdis (Bit 4) */ +#define USB_EP_DOEPINT0_OUTTknEPdis_Msk (0x10UL) /*!< USB0_EP0 DOEPINT0: OUTTknEPdis (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPINT0_StsPhseRcvd_Pos (5UL) /*!< USB0_EP0 DOEPINT0: StsPhseRcvd (Bit 5) */ +#define USB_EP_DOEPINT0_StsPhseRcvd_Msk (0x20UL) /*!< USB0_EP0 DOEPINT0: StsPhseRcvd (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPINT0_Back2BackSETup_Pos (6UL) /*!< USB0_EP0 DOEPINT0: Back2BackSETup (Bit 6) */ +#define USB_EP_DOEPINT0_Back2BackSETup_Msk (0x40UL) /*!< USB0_EP0 DOEPINT0: Back2BackSETup (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPINT0_BNAIntr_Pos (9UL) /*!< USB0_EP0 DOEPINT0: BNAIntr (Bit 9) */ +#define USB_EP_DOEPINT0_BNAIntr_Msk (0x200UL) /*!< USB0_EP0 DOEPINT0: BNAIntr (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPINT0_PktDrpSts_Pos (11UL) /*!< USB0_EP0 DOEPINT0: PktDrpSts (Bit 11) */ +#define USB_EP_DOEPINT0_PktDrpSts_Msk (0x800UL) /*!< USB0_EP0 DOEPINT0: PktDrpSts (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPINT0_BbleErrIntrpt_Pos (12UL) /*!< USB0_EP0 DOEPINT0: BbleErrIntrpt (Bit 12) */ +#define USB_EP_DOEPINT0_BbleErrIntrpt_Msk (0x1000UL) /*!< USB0_EP0 DOEPINT0: BbleErrIntrpt (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPINT0_NAKIntrpt_Pos (13UL) /*!< USB0_EP0 DOEPINT0: NAKIntrpt (Bit 13) */ +#define USB_EP_DOEPINT0_NAKIntrpt_Msk (0x2000UL) /*!< USB0_EP0 DOEPINT0: NAKIntrpt (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPINT0_NYETIntrpt_Pos (14UL) /*!< USB0_EP0 DOEPINT0: NYETIntrpt (Bit 14) */ +#define USB_EP_DOEPINT0_NYETIntrpt_Msk (0x4000UL) /*!< USB0_EP0 DOEPINT0: NYETIntrpt (Bitfield-Mask: 0x01) */ + +/* ----------------------------- USB_EP_DOEPTSIZ0 ----------------------------- */ +#define USB_EP_DOEPTSIZ0_XferSize_Pos (0UL) /*!< USB0_EP0 DOEPTSIZ0: XferSize (Bit 0) */ +#define USB_EP_DOEPTSIZ0_XferSize_Msk (0x7fUL) /*!< USB0_EP0 DOEPTSIZ0: XferSize (Bitfield-Mask: 0x7f) */ +#define USB_EP_DOEPTSIZ0_PktCnt_Pos (19UL) /*!< USB0_EP0 DOEPTSIZ0: PktCnt (Bit 19) */ +#define USB_EP_DOEPTSIZ0_PktCnt_Msk (0x180000UL) /*!< USB0_EP0 DOEPTSIZ0: PktCnt (Bitfield-Mask: 0x03) */ +#define USB_EP_DOEPTSIZ0_SUPCnt_Pos (29UL) /*!< USB0_EP0 DOEPTSIZ0: SUPCnt (Bit 29) */ +#define USB_EP_DOEPTSIZ0_SUPCnt_Msk (0x60000000UL) /*!< USB0_EP0 DOEPTSIZ0: SUPCnt (Bitfield-Mask: 0x03) */ + +/* ------------------------------ USB_EP_DOEPDMA0 ----------------------------- */ +#define USB_EP_DOEPDMA0_DMAAddr_Pos (0UL) /*!< USB0_EP0 DOEPDMA0: DMAAddr (Bit 0) */ +#define USB_EP_DOEPDMA0_DMAAddr_Msk (0xffffffffUL) /*!< USB0_EP0 DOEPDMA0: DMAAddr (Bitfield-Mask: 0xffffffff) */ + +/* ----------------------------- USB_EP_DOEPDMAB0 ----------------------------- */ +#define USB_EP_DOEPDMAB0_DMABufferAddr_Pos (0UL) /*!< USB0_EP0 DOEPDMAB0: DMABufferAddr (Bit 0) */ +#define USB_EP_DOEPDMAB0_DMABufferAddr_Msk (0xffffffffUL) /*!< USB0_EP0 DOEPDMAB0: DMABufferAddr (Bitfield-Mask: 0xffffffff) */ + + +/* ================================================================================ */ +/* ================ Group 'USB_EP' Position & Mask ================ */ +/* ================================================================================ */ + + +/* --------------------------- USB_EP_DIEPCTL_ISOCONT --------------------------- */ +#define USB_EP_DIEPCTL_ISOCONT_MPS_Pos (0UL) /*!< USB_EP DIEPCTL_ISOCONT: MPS (Bit 0) */ +#define USB_EP_DIEPCTL_ISOCONT_MPS_Msk (0x7ffUL) /*!< USB_EP DIEPCTL_ISOCONT: MPS (Bitfield-Mask: 0x7ff) */ +#define USB_EP_DIEPCTL_ISOCONT_USBActEP_Pos (15UL) /*!< USB_EP DIEPCTL_ISOCONT: USBActEP (Bit 15) */ +#define USB_EP_DIEPCTL_ISOCONT_USBActEP_Msk (0x8000UL) /*!< USB_EP DIEPCTL_ISOCONT: USBActEP (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPCTL_ISOCONT_EO_FrNum_Pos (16UL) /*!< USB_EP DIEPCTL_ISOCONT: EO_FrNum (Bit 16) */ +#define USB_EP_DIEPCTL_ISOCONT_EO_FrNum_Msk (0x10000UL) /*!< USB_EP DIEPCTL_ISOCONT: EO_FrNum (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPCTL_ISOCONT_NAKSts_Pos (17UL) /*!< USB_EP DIEPCTL_ISOCONT: NAKSts (Bit 17) */ +#define USB_EP_DIEPCTL_ISOCONT_NAKSts_Msk (0x20000UL) /*!< USB_EP DIEPCTL_ISOCONT: NAKSts (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPCTL_ISOCONT_EPType_Pos (18UL) /*!< USB_EP DIEPCTL_ISOCONT: EPType (Bit 18) */ +#define USB_EP_DIEPCTL_ISOCONT_EPType_Msk (0xc0000UL) /*!< USB_EP DIEPCTL_ISOCONT: EPType (Bitfield-Mask: 0x03) */ +#define USB_EP_DIEPCTL_ISOCONT_Snp_Pos (20UL) /*!< USB_EP DIEPCTL_ISOCONT: Snp (Bit 20) */ +#define USB_EP_DIEPCTL_ISOCONT_Snp_Msk (0x100000UL) /*!< USB_EP DIEPCTL_ISOCONT: Snp (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPCTL_ISOCONT_Stall_Pos (21UL) /*!< USB_EP DIEPCTL_ISOCONT: Stall (Bit 21) */ +#define USB_EP_DIEPCTL_ISOCONT_Stall_Msk (0x200000UL) /*!< USB_EP DIEPCTL_ISOCONT: Stall (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPCTL_ISOCONT_TxFNum_Pos (22UL) /*!< USB_EP DIEPCTL_ISOCONT: TxFNum (Bit 22) */ +#define USB_EP_DIEPCTL_ISOCONT_TxFNum_Msk (0x3c00000UL) /*!< USB_EP DIEPCTL_ISOCONT: TxFNum (Bitfield-Mask: 0x0f) */ +#define USB_EP_DIEPCTL_ISOCONT_CNAK_Pos (26UL) /*!< USB_EP DIEPCTL_ISOCONT: CNAK (Bit 26) */ +#define USB_EP_DIEPCTL_ISOCONT_CNAK_Msk (0x4000000UL) /*!< USB_EP DIEPCTL_ISOCONT: CNAK (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPCTL_ISOCONT_SNAK_Pos (27UL) /*!< USB_EP DIEPCTL_ISOCONT: SNAK (Bit 27) */ +#define USB_EP_DIEPCTL_ISOCONT_SNAK_Msk (0x8000000UL) /*!< USB_EP DIEPCTL_ISOCONT: SNAK (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPCTL_ISOCONT_SetEvenFr_Pos (28UL) /*!< USB_EP DIEPCTL_ISOCONT: SetEvenFr (Bit 28) */ +#define USB_EP_DIEPCTL_ISOCONT_SetEvenFr_Msk (0x10000000UL) /*!< USB_EP DIEPCTL_ISOCONT: SetEvenFr (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPCTL_ISOCONT_SetOddFr_Pos (29UL) /*!< USB_EP DIEPCTL_ISOCONT: SetOddFr (Bit 29) */ +#define USB_EP_DIEPCTL_ISOCONT_SetOddFr_Msk (0x20000000UL) /*!< USB_EP DIEPCTL_ISOCONT: SetOddFr (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPCTL_ISOCONT_EPDis_Pos (30UL) /*!< USB_EP DIEPCTL_ISOCONT: EPDis (Bit 30) */ +#define USB_EP_DIEPCTL_ISOCONT_EPDis_Msk (0x40000000UL) /*!< USB_EP DIEPCTL_ISOCONT: EPDis (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPCTL_ISOCONT_EPEna_Pos (31UL) /*!< USB_EP DIEPCTL_ISOCONT: EPEna (Bit 31) */ +#define USB_EP_DIEPCTL_ISOCONT_EPEna_Msk (0x80000000UL) /*!< USB_EP DIEPCTL_ISOCONT: EPEna (Bitfield-Mask: 0x01) */ + +/* --------------------------- USB_EP_DIEPCTL_INTBULK --------------------------- */ +#define USB_EP_DIEPCTL_INTBULK_MPS_Pos (0UL) /*!< USB_EP DIEPCTL_INTBULK: MPS (Bit 0) */ +#define USB_EP_DIEPCTL_INTBULK_MPS_Msk (0x7ffUL) /*!< USB_EP DIEPCTL_INTBULK: MPS (Bitfield-Mask: 0x7ff) */ +#define USB_EP_DIEPCTL_INTBULK_USBActEP_Pos (15UL) /*!< USB_EP DIEPCTL_INTBULK: USBActEP (Bit 15) */ +#define USB_EP_DIEPCTL_INTBULK_USBActEP_Msk (0x8000UL) /*!< USB_EP DIEPCTL_INTBULK: USBActEP (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPCTL_INTBULK_DPID_Pos (16UL) /*!< USB_EP DIEPCTL_INTBULK: DPID (Bit 16) */ +#define USB_EP_DIEPCTL_INTBULK_DPID_Msk (0x10000UL) /*!< USB_EP DIEPCTL_INTBULK: DPID (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPCTL_INTBULK_NAKSts_Pos (17UL) /*!< USB_EP DIEPCTL_INTBULK: NAKSts (Bit 17) */ +#define USB_EP_DIEPCTL_INTBULK_NAKSts_Msk (0x20000UL) /*!< USB_EP DIEPCTL_INTBULK: NAKSts (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPCTL_INTBULK_EPType_Pos (18UL) /*!< USB_EP DIEPCTL_INTBULK: EPType (Bit 18) */ +#define USB_EP_DIEPCTL_INTBULK_EPType_Msk (0xc0000UL) /*!< USB_EP DIEPCTL_INTBULK: EPType (Bitfield-Mask: 0x03) */ +#define USB_EP_DIEPCTL_INTBULK_Snp_Pos (20UL) /*!< USB_EP DIEPCTL_INTBULK: Snp (Bit 20) */ +#define USB_EP_DIEPCTL_INTBULK_Snp_Msk (0x100000UL) /*!< USB_EP DIEPCTL_INTBULK: Snp (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPCTL_INTBULK_Stall_Pos (21UL) /*!< USB_EP DIEPCTL_INTBULK: Stall (Bit 21) */ +#define USB_EP_DIEPCTL_INTBULK_Stall_Msk (0x200000UL) /*!< USB_EP DIEPCTL_INTBULK: Stall (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPCTL_INTBULK_TxFNum_Pos (22UL) /*!< USB_EP DIEPCTL_INTBULK: TxFNum (Bit 22) */ +#define USB_EP_DIEPCTL_INTBULK_TxFNum_Msk (0x3c00000UL) /*!< USB_EP DIEPCTL_INTBULK: TxFNum (Bitfield-Mask: 0x0f) */ +#define USB_EP_DIEPCTL_INTBULK_CNAK_Pos (26UL) /*!< USB_EP DIEPCTL_INTBULK: CNAK (Bit 26) */ +#define USB_EP_DIEPCTL_INTBULK_CNAK_Msk (0x4000000UL) /*!< USB_EP DIEPCTL_INTBULK: CNAK (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPCTL_INTBULK_SNAK_Pos (27UL) /*!< USB_EP DIEPCTL_INTBULK: SNAK (Bit 27) */ +#define USB_EP_DIEPCTL_INTBULK_SNAK_Msk (0x8000000UL) /*!< USB_EP DIEPCTL_INTBULK: SNAK (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPCTL_INTBULK_SetD0PID_Pos (28UL) /*!< USB_EP DIEPCTL_INTBULK: SetD0PID (Bit 28) */ +#define USB_EP_DIEPCTL_INTBULK_SetD0PID_Msk (0x10000000UL) /*!< USB_EP DIEPCTL_INTBULK: SetD0PID (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPCTL_INTBULK_SetD1PID_Pos (29UL) /*!< USB_EP DIEPCTL_INTBULK: SetD1PID (Bit 29) */ +#define USB_EP_DIEPCTL_INTBULK_SetD1PID_Msk (0x20000000UL) /*!< USB_EP DIEPCTL_INTBULK: SetD1PID (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPCTL_INTBULK_EPDis_Pos (30UL) /*!< USB_EP DIEPCTL_INTBULK: EPDis (Bit 30) */ +#define USB_EP_DIEPCTL_INTBULK_EPDis_Msk (0x40000000UL) /*!< USB_EP DIEPCTL_INTBULK: EPDis (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPCTL_INTBULK_EPEna_Pos (31UL) /*!< USB_EP DIEPCTL_INTBULK: EPEna (Bit 31) */ +#define USB_EP_DIEPCTL_INTBULK_EPEna_Msk (0x80000000UL) /*!< USB_EP DIEPCTL_INTBULK: EPEna (Bitfield-Mask: 0x01) */ + +/* ------------------------------- USB_EP_DIEPINT ------------------------------- */ +#define USB_EP_DIEPINT_XferCompl_Pos (0UL) /*!< USB_EP DIEPINT: XferCompl (Bit 0) */ +#define USB_EP_DIEPINT_XferCompl_Msk (0x1UL) /*!< USB_EP DIEPINT: XferCompl (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPINT_EPDisbld_Pos (1UL) /*!< USB_EP DIEPINT: EPDisbld (Bit 1) */ +#define USB_EP_DIEPINT_EPDisbld_Msk (0x2UL) /*!< USB_EP DIEPINT: EPDisbld (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPINT_AHBErr_Pos (2UL) /*!< USB_EP DIEPINT: AHBErr (Bit 2) */ +#define USB_EP_DIEPINT_AHBErr_Msk (0x4UL) /*!< USB_EP DIEPINT: AHBErr (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPINT_TimeOUT_Pos (3UL) /*!< USB_EP DIEPINT: TimeOUT (Bit 3) */ +#define USB_EP_DIEPINT_TimeOUT_Msk (0x8UL) /*!< USB_EP DIEPINT: TimeOUT (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPINT_INTknTXFEmp_Pos (4UL) /*!< USB_EP DIEPINT: INTknTXFEmp (Bit 4) */ +#define USB_EP_DIEPINT_INTknTXFEmp_Msk (0x10UL) /*!< USB_EP DIEPINT: INTknTXFEmp (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPINT_INEPNakEff_Pos (6UL) /*!< USB_EP DIEPINT: INEPNakEff (Bit 6) */ +#define USB_EP_DIEPINT_INEPNakEff_Msk (0x40UL) /*!< USB_EP DIEPINT: INEPNakEff (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPINT_TxFEmp_Pos (7UL) /*!< USB_EP DIEPINT: TxFEmp (Bit 7) */ +#define USB_EP_DIEPINT_TxFEmp_Msk (0x80UL) /*!< USB_EP DIEPINT: TxFEmp (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPINT_BNAIntr_Pos (9UL) /*!< USB_EP DIEPINT: BNAIntr (Bit 9) */ +#define USB_EP_DIEPINT_BNAIntr_Msk (0x200UL) /*!< USB_EP DIEPINT: BNAIntr (Bitfield-Mask: 0x01) */ + +/* ------------------------------- USB_EP_DIEPTSIZ ------------------------------ */ +#define USB_EP_DIEPTSIZ_XferSize_Pos (0UL) /*!< USB_EP DIEPTSIZ: XferSize (Bit 0) */ +#define USB_EP_DIEPTSIZ_XferSize_Msk (0x7ffffUL) /*!< USB_EP DIEPTSIZ: XferSize (Bitfield-Mask: 0x7ffff) */ +#define USB_EP_DIEPTSIZ_PktCnt_Pos (19UL) /*!< USB_EP DIEPTSIZ: PktCnt (Bit 19) */ +#define USB_EP_DIEPTSIZ_PktCnt_Msk (0x1ff80000UL) /*!< USB_EP DIEPTSIZ: PktCnt (Bitfield-Mask: 0x3ff) */ + +/* ------------------------------- USB_EP_DIEPDMA ------------------------------- */ +#define USB_EP_DIEPDMA_DMAAddr_Pos (0UL) /*!< USB_EP DIEPDMA: DMAAddr (Bit 0) */ +#define USB_EP_DIEPDMA_DMAAddr_Msk (0xffffffffUL) /*!< USB_EP DIEPDMA: DMAAddr (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------------- USB_EP_DTXFSTS ------------------------------- */ +#define USB_EP_DTXFSTS_INEPTxFSpcAvail_Pos (0UL) /*!< USB_EP DTXFSTS: INEPTxFSpcAvail (Bit 0) */ +#define USB_EP_DTXFSTS_INEPTxFSpcAvail_Msk (0xffffUL) /*!< USB_EP DTXFSTS: INEPTxFSpcAvail (Bitfield-Mask: 0xffff) */ + +/* ------------------------------- USB_EP_DIEPDMAB ------------------------------ */ +#define USB_EP_DIEPDMAB_DMABufferAddr_Pos (0UL) /*!< USB_EP DIEPDMAB: DMABufferAddr (Bit 0) */ +#define USB_EP_DIEPDMAB_DMABufferAddr_Msk (0xffffffffUL) /*!< USB_EP DIEPDMAB: DMABufferAddr (Bitfield-Mask: 0xffffffff) */ + +/* --------------------------- USB_EP_DOEPCTL_ISOCONT --------------------------- */ +#define USB_EP_DOEPCTL_ISOCONT_MPS_Pos (0UL) /*!< USB_EP DOEPCTL_ISOCONT: MPS (Bit 0) */ +#define USB_EP_DOEPCTL_ISOCONT_MPS_Msk (0x7ffUL) /*!< USB_EP DOEPCTL_ISOCONT: MPS (Bitfield-Mask: 0x7ff) */ +#define USB_EP_DOEPCTL_ISOCONT_USBActEP_Pos (15UL) /*!< USB_EP DOEPCTL_ISOCONT: USBActEP (Bit 15) */ +#define USB_EP_DOEPCTL_ISOCONT_USBActEP_Msk (0x8000UL) /*!< USB_EP DOEPCTL_ISOCONT: USBActEP (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPCTL_ISOCONT_EO_FrNum_Pos (16UL) /*!< USB_EP DOEPCTL_ISOCONT: EO_FrNum (Bit 16) */ +#define USB_EP_DOEPCTL_ISOCONT_EO_FrNum_Msk (0x10000UL) /*!< USB_EP DOEPCTL_ISOCONT: EO_FrNum (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPCTL_ISOCONT_NAKSts_Pos (17UL) /*!< USB_EP DOEPCTL_ISOCONT: NAKSts (Bit 17) */ +#define USB_EP_DOEPCTL_ISOCONT_NAKSts_Msk (0x20000UL) /*!< USB_EP DOEPCTL_ISOCONT: NAKSts (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPCTL_ISOCONT_EPType_Pos (18UL) /*!< USB_EP DOEPCTL_ISOCONT: EPType (Bit 18) */ +#define USB_EP_DOEPCTL_ISOCONT_EPType_Msk (0xc0000UL) /*!< USB_EP DOEPCTL_ISOCONT: EPType (Bitfield-Mask: 0x03) */ +#define USB_EP_DOEPCTL_ISOCONT_Snp_Pos (20UL) /*!< USB_EP DOEPCTL_ISOCONT: Snp (Bit 20) */ +#define USB_EP_DOEPCTL_ISOCONT_Snp_Msk (0x100000UL) /*!< USB_EP DOEPCTL_ISOCONT: Snp (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPCTL_ISOCONT_Stall_Pos (21UL) /*!< USB_EP DOEPCTL_ISOCONT: Stall (Bit 21) */ +#define USB_EP_DOEPCTL_ISOCONT_Stall_Msk (0x200000UL) /*!< USB_EP DOEPCTL_ISOCONT: Stall (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPCTL_ISOCONT_TxFNum_Pos (22UL) /*!< USB_EP DOEPCTL_ISOCONT: TxFNum (Bit 22) */ +#define USB_EP_DOEPCTL_ISOCONT_TxFNum_Msk (0x3c00000UL) /*!< USB_EP DOEPCTL_ISOCONT: TxFNum (Bitfield-Mask: 0x0f) */ +#define USB_EP_DOEPCTL_ISOCONT_CNAK_Pos (26UL) /*!< USB_EP DOEPCTL_ISOCONT: CNAK (Bit 26) */ +#define USB_EP_DOEPCTL_ISOCONT_CNAK_Msk (0x4000000UL) /*!< USB_EP DOEPCTL_ISOCONT: CNAK (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPCTL_ISOCONT_SNAK_Pos (27UL) /*!< USB_EP DOEPCTL_ISOCONT: SNAK (Bit 27) */ +#define USB_EP_DOEPCTL_ISOCONT_SNAK_Msk (0x8000000UL) /*!< USB_EP DOEPCTL_ISOCONT: SNAK (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPCTL_ISOCONT_SetEvenFr_Pos (28UL) /*!< USB_EP DOEPCTL_ISOCONT: SetEvenFr (Bit 28) */ +#define USB_EP_DOEPCTL_ISOCONT_SetEvenFr_Msk (0x10000000UL) /*!< USB_EP DOEPCTL_ISOCONT: SetEvenFr (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPCTL_ISOCONT_SetOddFr_Pos (29UL) /*!< USB_EP DOEPCTL_ISOCONT: SetOddFr (Bit 29) */ +#define USB_EP_DOEPCTL_ISOCONT_SetOddFr_Msk (0x20000000UL) /*!< USB_EP DOEPCTL_ISOCONT: SetOddFr (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPCTL_ISOCONT_EPDis_Pos (30UL) /*!< USB_EP DOEPCTL_ISOCONT: EPDis (Bit 30) */ +#define USB_EP_DOEPCTL_ISOCONT_EPDis_Msk (0x40000000UL) /*!< USB_EP DOEPCTL_ISOCONT: EPDis (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPCTL_ISOCONT_EPEna_Pos (31UL) /*!< USB_EP DOEPCTL_ISOCONT: EPEna (Bit 31) */ +#define USB_EP_DOEPCTL_ISOCONT_EPEna_Msk (0x80000000UL) /*!< USB_EP DOEPCTL_ISOCONT: EPEna (Bitfield-Mask: 0x01) */ + +/* --------------------------- USB_EP_DOEPCTL_INTBULK --------------------------- */ +#define USB_EP_DOEPCTL_INTBULK_MPS_Pos (0UL) /*!< USB_EP DOEPCTL_INTBULK: MPS (Bit 0) */ +#define USB_EP_DOEPCTL_INTBULK_MPS_Msk (0x7ffUL) /*!< USB_EP DOEPCTL_INTBULK: MPS (Bitfield-Mask: 0x7ff) */ +#define USB_EP_DOEPCTL_INTBULK_USBActEP_Pos (15UL) /*!< USB_EP DOEPCTL_INTBULK: USBActEP (Bit 15) */ +#define USB_EP_DOEPCTL_INTBULK_USBActEP_Msk (0x8000UL) /*!< USB_EP DOEPCTL_INTBULK: USBActEP (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPCTL_INTBULK_DPID_Pos (16UL) /*!< USB_EP DOEPCTL_INTBULK: DPID (Bit 16) */ +#define USB_EP_DOEPCTL_INTBULK_DPID_Msk (0x10000UL) /*!< USB_EP DOEPCTL_INTBULK: DPID (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPCTL_INTBULK_NAKSts_Pos (17UL) /*!< USB_EP DOEPCTL_INTBULK: NAKSts (Bit 17) */ +#define USB_EP_DOEPCTL_INTBULK_NAKSts_Msk (0x20000UL) /*!< USB_EP DOEPCTL_INTBULK: NAKSts (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPCTL_INTBULK_EPType_Pos (18UL) /*!< USB_EP DOEPCTL_INTBULK: EPType (Bit 18) */ +#define USB_EP_DOEPCTL_INTBULK_EPType_Msk (0xc0000UL) /*!< USB_EP DOEPCTL_INTBULK: EPType (Bitfield-Mask: 0x03) */ +#define USB_EP_DOEPCTL_INTBULK_Snp_Pos (20UL) /*!< USB_EP DOEPCTL_INTBULK: Snp (Bit 20) */ +#define USB_EP_DOEPCTL_INTBULK_Snp_Msk (0x100000UL) /*!< USB_EP DOEPCTL_INTBULK: Snp (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPCTL_INTBULK_Stall_Pos (21UL) /*!< USB_EP DOEPCTL_INTBULK: Stall (Bit 21) */ +#define USB_EP_DOEPCTL_INTBULK_Stall_Msk (0x200000UL) /*!< USB_EP DOEPCTL_INTBULK: Stall (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPCTL_INTBULK_TxFNum_Pos (22UL) /*!< USB_EP DOEPCTL_INTBULK: TxFNum (Bit 22) */ +#define USB_EP_DOEPCTL_INTBULK_TxFNum_Msk (0x3c00000UL) /*!< USB_EP DOEPCTL_INTBULK: TxFNum (Bitfield-Mask: 0x0f) */ +#define USB_EP_DOEPCTL_INTBULK_CNAK_Pos (26UL) /*!< USB_EP DOEPCTL_INTBULK: CNAK (Bit 26) */ +#define USB_EP_DOEPCTL_INTBULK_CNAK_Msk (0x4000000UL) /*!< USB_EP DOEPCTL_INTBULK: CNAK (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPCTL_INTBULK_SNAK_Pos (27UL) /*!< USB_EP DOEPCTL_INTBULK: SNAK (Bit 27) */ +#define USB_EP_DOEPCTL_INTBULK_SNAK_Msk (0x8000000UL) /*!< USB_EP DOEPCTL_INTBULK: SNAK (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPCTL_INTBULK_SetD0PID_Pos (28UL) /*!< USB_EP DOEPCTL_INTBULK: SetD0PID (Bit 28) */ +#define USB_EP_DOEPCTL_INTBULK_SetD0PID_Msk (0x10000000UL) /*!< USB_EP DOEPCTL_INTBULK: SetD0PID (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPCTL_INTBULK_SetD1PID_Pos (29UL) /*!< USB_EP DOEPCTL_INTBULK: SetD1PID (Bit 29) */ +#define USB_EP_DOEPCTL_INTBULK_SetD1PID_Msk (0x20000000UL) /*!< USB_EP DOEPCTL_INTBULK: SetD1PID (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPCTL_INTBULK_EPDis_Pos (30UL) /*!< USB_EP DOEPCTL_INTBULK: EPDis (Bit 30) */ +#define USB_EP_DOEPCTL_INTBULK_EPDis_Msk (0x40000000UL) /*!< USB_EP DOEPCTL_INTBULK: EPDis (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPCTL_INTBULK_EPEna_Pos (31UL) /*!< USB_EP DOEPCTL_INTBULK: EPEna (Bit 31) */ +#define USB_EP_DOEPCTL_INTBULK_EPEna_Msk (0x80000000UL) /*!< USB_EP DOEPCTL_INTBULK: EPEna (Bitfield-Mask: 0x01) */ + +/* ------------------------------- USB_EP_DOEPINT ------------------------------- */ +#define USB_EP_DOEPINT_XferCompl_Pos (0UL) /*!< USB_EP DOEPINT: XferCompl (Bit 0) */ +#define USB_EP_DOEPINT_XferCompl_Msk (0x1UL) /*!< USB_EP DOEPINT: XferCompl (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPINT_EPDisbld_Pos (1UL) /*!< USB_EP DOEPINT: EPDisbld (Bit 1) */ +#define USB_EP_DOEPINT_EPDisbld_Msk (0x2UL) /*!< USB_EP DOEPINT: EPDisbld (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPINT_AHBErr_Pos (2UL) /*!< USB_EP DOEPINT: AHBErr (Bit 2) */ +#define USB_EP_DOEPINT_AHBErr_Msk (0x4UL) /*!< USB_EP DOEPINT: AHBErr (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPINT_SetUp_Pos (3UL) /*!< USB_EP DOEPINT: SetUp (Bit 3) */ +#define USB_EP_DOEPINT_SetUp_Msk (0x8UL) /*!< USB_EP DOEPINT: SetUp (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPINT_OUTTknEPdis_Pos (4UL) /*!< USB_EP DOEPINT: OUTTknEPdis (Bit 4) */ +#define USB_EP_DOEPINT_OUTTknEPdis_Msk (0x10UL) /*!< USB_EP DOEPINT: OUTTknEPdis (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPINT_StsPhseRcvd_Pos (5UL) /*!< USB_EP DOEPINT: StsPhseRcvd (Bit 5) */ +#define USB_EP_DOEPINT_StsPhseRcvd_Msk (0x20UL) /*!< USB_EP DOEPINT: StsPhseRcvd (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPINT_Back2BackSETup_Pos (6UL) /*!< USB_EP DOEPINT: Back2BackSETup (Bit 6) */ +#define USB_EP_DOEPINT_Back2BackSETup_Msk (0x40UL) /*!< USB_EP DOEPINT: Back2BackSETup (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPINT_BNAIntr_Pos (9UL) /*!< USB_EP DOEPINT: BNAIntr (Bit 9) */ +#define USB_EP_DOEPINT_BNAIntr_Msk (0x200UL) /*!< USB_EP DOEPINT: BNAIntr (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPINT_PktDrpSts_Pos (11UL) /*!< USB_EP DOEPINT: PktDrpSts (Bit 11) */ +#define USB_EP_DOEPINT_PktDrpSts_Msk (0x800UL) /*!< USB_EP DOEPINT: PktDrpSts (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPINT_BbleErrIntrpt_Pos (12UL) /*!< USB_EP DOEPINT: BbleErrIntrpt (Bit 12) */ +#define USB_EP_DOEPINT_BbleErrIntrpt_Msk (0x1000UL) /*!< USB_EP DOEPINT: BbleErrIntrpt (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPINT_NAKIntrpt_Pos (13UL) /*!< USB_EP DOEPINT: NAKIntrpt (Bit 13) */ +#define USB_EP_DOEPINT_NAKIntrpt_Msk (0x2000UL) /*!< USB_EP DOEPINT: NAKIntrpt (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPINT_NYETIntrpt_Pos (14UL) /*!< USB_EP DOEPINT: NYETIntrpt (Bit 14) */ +#define USB_EP_DOEPINT_NYETIntrpt_Msk (0x4000UL) /*!< USB_EP DOEPINT: NYETIntrpt (Bitfield-Mask: 0x01) */ + +/* ----------------------------- USB_EP_DOEPTSIZ_ISO ---------------------------- */ +#define USB_EP_DOEPTSIZ_ISO_XferSize_Pos (0UL) /*!< USB_EP DOEPTSIZ_ISO: XferSize (Bit 0) */ +#define USB_EP_DOEPTSIZ_ISO_XferSize_Msk (0x7ffffUL) /*!< USB_EP DOEPTSIZ_ISO: XferSize (Bitfield-Mask: 0x7ffff) */ +#define USB_EP_DOEPTSIZ_ISO_PktCnt_Pos (19UL) /*!< USB_EP DOEPTSIZ_ISO: PktCnt (Bit 19) */ +#define USB_EP_DOEPTSIZ_ISO_PktCnt_Msk (0x1ff80000UL) /*!< USB_EP DOEPTSIZ_ISO: PktCnt (Bitfield-Mask: 0x3ff) */ +#define USB_EP_DOEPTSIZ_ISO_RxDPID_Pos (29UL) /*!< USB_EP DOEPTSIZ_ISO: RxDPID (Bit 29) */ +#define USB_EP_DOEPTSIZ_ISO_RxDPID_Msk (0x60000000UL) /*!< USB_EP DOEPTSIZ_ISO: RxDPID (Bitfield-Mask: 0x03) */ + +/* --------------------------- USB_EP_DOEPTSIZ_CONTROL -------------------------- */ +#define USB_EP_DOEPTSIZ_CONTROL_XferSize_Pos (0UL) /*!< USB_EP DOEPTSIZ_CONTROL: XferSize (Bit 0) */ +#define USB_EP_DOEPTSIZ_CONTROL_XferSize_Msk (0x7ffffUL) /*!< USB_EP DOEPTSIZ_CONTROL: XferSize (Bitfield-Mask: 0x7ffff) */ +#define USB_EP_DOEPTSIZ_CONTROL_PktCnt_Pos (19UL) /*!< USB_EP DOEPTSIZ_CONTROL: PktCnt (Bit 19) */ +#define USB_EP_DOEPTSIZ_CONTROL_PktCnt_Msk (0x1ff80000UL) /*!< USB_EP DOEPTSIZ_CONTROL: PktCnt (Bitfield-Mask: 0x3ff) */ +#define USB_EP_DOEPTSIZ_CONTROL_SUPCnt_Pos (29UL) /*!< USB_EP DOEPTSIZ_CONTROL: SUPCnt (Bit 29) */ +#define USB_EP_DOEPTSIZ_CONTROL_SUPCnt_Msk (0x60000000UL) /*!< USB_EP DOEPTSIZ_CONTROL: SUPCnt (Bitfield-Mask: 0x03) */ + +/* ------------------------------- USB_EP_DOEPDMA ------------------------------- */ +#define USB_EP_DOEPDMA_DMAAddr_Pos (0UL) /*!< USB_EP DOEPDMA: DMAAddr (Bit 0) */ +#define USB_EP_DOEPDMA_DMAAddr_Msk (0xffffffffUL) /*!< USB_EP DOEPDMA: DMAAddr (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------------- USB_EP_DOEPDMAB ------------------------------ */ +#define USB_EP_DOEPDMAB_DMABufferAddr_Pos (0UL) /*!< USB_EP DOEPDMAB: DMABufferAddr (Bit 0) */ +#define USB_EP_DOEPDMAB_DMABufferAddr_Msk (0xffffffffUL) /*!< USB_EP DOEPDMAB: DMABufferAddr (Bitfield-Mask: 0xffffffff) */ + + +/* ================================================================================ */ +/* ================ Group 'USIC' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ----------------------------------- USIC_ID ---------------------------------- */ +#define USIC_ID_MOD_REV_Pos (0UL) /*!< USIC ID: MOD_REV (Bit 0) */ +#define USIC_ID_MOD_REV_Msk (0xffUL) /*!< USIC ID: MOD_REV (Bitfield-Mask: 0xff) */ +#define USIC_ID_MOD_TYPE_Pos (8UL) /*!< USIC ID: MOD_TYPE (Bit 8) */ +#define USIC_ID_MOD_TYPE_Msk (0xff00UL) /*!< USIC ID: MOD_TYPE (Bitfield-Mask: 0xff) */ +#define USIC_ID_MOD_NUMBER_Pos (16UL) /*!< USIC ID: MOD_NUMBER (Bit 16) */ +#define USIC_ID_MOD_NUMBER_Msk (0xffff0000UL) /*!< USIC ID: MOD_NUMBER (Bitfield-Mask: 0xffff) */ + + +/* ================================================================================ */ +/* ================ Group 'USIC_CH' Position & Mask ================ */ +/* ================================================================================ */ + + +/* -------------------------------- USIC_CH_CCFG -------------------------------- */ +#define USIC_CH_CCFG_SSC_Pos (0UL) /*!< USIC_CH CCFG: SSC (Bit 0) */ +#define USIC_CH_CCFG_SSC_Msk (0x1UL) /*!< USIC_CH CCFG: SSC (Bitfield-Mask: 0x01) */ +#define USIC_CH_CCFG_ASC_Pos (1UL) /*!< USIC_CH CCFG: ASC (Bit 1) */ +#define USIC_CH_CCFG_ASC_Msk (0x2UL) /*!< USIC_CH CCFG: ASC (Bitfield-Mask: 0x01) */ +#define USIC_CH_CCFG_IIC_Pos (2UL) /*!< USIC_CH CCFG: IIC (Bit 2) */ +#define USIC_CH_CCFG_IIC_Msk (0x4UL) /*!< USIC_CH CCFG: IIC (Bitfield-Mask: 0x01) */ +#define USIC_CH_CCFG_IIS_Pos (3UL) /*!< USIC_CH CCFG: IIS (Bit 3) */ +#define USIC_CH_CCFG_IIS_Msk (0x8UL) /*!< USIC_CH CCFG: IIS (Bitfield-Mask: 0x01) */ +#define USIC_CH_CCFG_RB_Pos (6UL) /*!< USIC_CH CCFG: RB (Bit 6) */ +#define USIC_CH_CCFG_RB_Msk (0x40UL) /*!< USIC_CH CCFG: RB (Bitfield-Mask: 0x01) */ +#define USIC_CH_CCFG_TB_Pos (7UL) /*!< USIC_CH CCFG: TB (Bit 7) */ +#define USIC_CH_CCFG_TB_Msk (0x80UL) /*!< USIC_CH CCFG: TB (Bitfield-Mask: 0x01) */ + +/* -------------------------------- USIC_CH_KSCFG ------------------------------- */ +#define USIC_CH_KSCFG_MODEN_Pos (0UL) /*!< USIC_CH KSCFG: MODEN (Bit 0) */ +#define USIC_CH_KSCFG_MODEN_Msk (0x1UL) /*!< USIC_CH KSCFG: MODEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_KSCFG_BPMODEN_Pos (1UL) /*!< USIC_CH KSCFG: BPMODEN (Bit 1) */ +#define USIC_CH_KSCFG_BPMODEN_Msk (0x2UL) /*!< USIC_CH KSCFG: BPMODEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_KSCFG_NOMCFG_Pos (4UL) /*!< USIC_CH KSCFG: NOMCFG (Bit 4) */ +#define USIC_CH_KSCFG_NOMCFG_Msk (0x30UL) /*!< USIC_CH KSCFG: NOMCFG (Bitfield-Mask: 0x03) */ +#define USIC_CH_KSCFG_BPNOM_Pos (7UL) /*!< USIC_CH KSCFG: BPNOM (Bit 7) */ +#define USIC_CH_KSCFG_BPNOM_Msk (0x80UL) /*!< USIC_CH KSCFG: BPNOM (Bitfield-Mask: 0x01) */ +#define USIC_CH_KSCFG_SUMCFG_Pos (8UL) /*!< USIC_CH KSCFG: SUMCFG (Bit 8) */ +#define USIC_CH_KSCFG_SUMCFG_Msk (0x300UL) /*!< USIC_CH KSCFG: SUMCFG (Bitfield-Mask: 0x03) */ +#define USIC_CH_KSCFG_BPSUM_Pos (11UL) /*!< USIC_CH KSCFG: BPSUM (Bit 11) */ +#define USIC_CH_KSCFG_BPSUM_Msk (0x800UL) /*!< USIC_CH KSCFG: BPSUM (Bitfield-Mask: 0x01) */ + +/* --------------------------------- USIC_CH_FDR -------------------------------- */ +#define USIC_CH_FDR_STEP_Pos (0UL) /*!< USIC_CH FDR: STEP (Bit 0) */ +#define USIC_CH_FDR_STEP_Msk (0x3ffUL) /*!< USIC_CH FDR: STEP (Bitfield-Mask: 0x3ff) */ +#define USIC_CH_FDR_DM_Pos (14UL) /*!< USIC_CH FDR: DM (Bit 14) */ +#define USIC_CH_FDR_DM_Msk (0xc000UL) /*!< USIC_CH FDR: DM (Bitfield-Mask: 0x03) */ +#define USIC_CH_FDR_RESULT_Pos (16UL) /*!< USIC_CH FDR: RESULT (Bit 16) */ +#define USIC_CH_FDR_RESULT_Msk (0x3ff0000UL) /*!< USIC_CH FDR: RESULT (Bitfield-Mask: 0x3ff) */ + +/* --------------------------------- USIC_CH_BRG -------------------------------- */ +#define USIC_CH_BRG_CLKSEL_Pos (0UL) /*!< USIC_CH BRG: CLKSEL (Bit 0) */ +#define USIC_CH_BRG_CLKSEL_Msk (0x3UL) /*!< USIC_CH BRG: CLKSEL (Bitfield-Mask: 0x03) */ +#define USIC_CH_BRG_TMEN_Pos (3UL) /*!< USIC_CH BRG: TMEN (Bit 3) */ +#define USIC_CH_BRG_TMEN_Msk (0x8UL) /*!< USIC_CH BRG: TMEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_BRG_PPPEN_Pos (4UL) /*!< USIC_CH BRG: PPPEN (Bit 4) */ +#define USIC_CH_BRG_PPPEN_Msk (0x10UL) /*!< USIC_CH BRG: PPPEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_BRG_CTQSEL_Pos (6UL) /*!< USIC_CH BRG: CTQSEL (Bit 6) */ +#define USIC_CH_BRG_CTQSEL_Msk (0xc0UL) /*!< USIC_CH BRG: CTQSEL (Bitfield-Mask: 0x03) */ +#define USIC_CH_BRG_PCTQ_Pos (8UL) /*!< USIC_CH BRG: PCTQ (Bit 8) */ +#define USIC_CH_BRG_PCTQ_Msk (0x300UL) /*!< USIC_CH BRG: PCTQ (Bitfield-Mask: 0x03) */ +#define USIC_CH_BRG_DCTQ_Pos (10UL) /*!< USIC_CH BRG: DCTQ (Bit 10) */ +#define USIC_CH_BRG_DCTQ_Msk (0x7c00UL) /*!< USIC_CH BRG: DCTQ (Bitfield-Mask: 0x1f) */ +#define USIC_CH_BRG_PDIV_Pos (16UL) /*!< USIC_CH BRG: PDIV (Bit 16) */ +#define USIC_CH_BRG_PDIV_Msk (0x3ff0000UL) /*!< USIC_CH BRG: PDIV (Bitfield-Mask: 0x3ff) */ +#define USIC_CH_BRG_SCLKOSEL_Pos (28UL) /*!< USIC_CH BRG: SCLKOSEL (Bit 28) */ +#define USIC_CH_BRG_SCLKOSEL_Msk (0x10000000UL) /*!< USIC_CH BRG: SCLKOSEL (Bitfield-Mask: 0x01) */ +#define USIC_CH_BRG_MCLKCFG_Pos (29UL) /*!< USIC_CH BRG: MCLKCFG (Bit 29) */ +#define USIC_CH_BRG_MCLKCFG_Msk (0x20000000UL) /*!< USIC_CH BRG: MCLKCFG (Bitfield-Mask: 0x01) */ +#define USIC_CH_BRG_SCLKCFG_Pos (30UL) /*!< USIC_CH BRG: SCLKCFG (Bit 30) */ +#define USIC_CH_BRG_SCLKCFG_Msk (0xc0000000UL) /*!< USIC_CH BRG: SCLKCFG (Bitfield-Mask: 0x03) */ + +/* -------------------------------- USIC_CH_INPR -------------------------------- */ +#define USIC_CH_INPR_TSINP_Pos (0UL) /*!< USIC_CH INPR: TSINP (Bit 0) */ +#define USIC_CH_INPR_TSINP_Msk (0x7UL) /*!< USIC_CH INPR: TSINP (Bitfield-Mask: 0x07) */ +#define USIC_CH_INPR_TBINP_Pos (4UL) /*!< USIC_CH INPR: TBINP (Bit 4) */ +#define USIC_CH_INPR_TBINP_Msk (0x70UL) /*!< USIC_CH INPR: TBINP (Bitfield-Mask: 0x07) */ +#define USIC_CH_INPR_RINP_Pos (8UL) /*!< USIC_CH INPR: RINP (Bit 8) */ +#define USIC_CH_INPR_RINP_Msk (0x700UL) /*!< USIC_CH INPR: RINP (Bitfield-Mask: 0x07) */ +#define USIC_CH_INPR_AINP_Pos (12UL) /*!< USIC_CH INPR: AINP (Bit 12) */ +#define USIC_CH_INPR_AINP_Msk (0x7000UL) /*!< USIC_CH INPR: AINP (Bitfield-Mask: 0x07) */ +#define USIC_CH_INPR_PINP_Pos (16UL) /*!< USIC_CH INPR: PINP (Bit 16) */ +#define USIC_CH_INPR_PINP_Msk (0x70000UL) /*!< USIC_CH INPR: PINP (Bitfield-Mask: 0x07) */ + +/* -------------------------------- USIC_CH_DX0CR ------------------------------- */ +#define USIC_CH_DX0CR_DSEL_Pos (0UL) /*!< USIC_CH DX0CR: DSEL (Bit 0) */ +#define USIC_CH_DX0CR_DSEL_Msk (0x7UL) /*!< USIC_CH DX0CR: DSEL (Bitfield-Mask: 0x07) */ +#define USIC_CH_DX0CR_INSW_Pos (4UL) /*!< USIC_CH DX0CR: INSW (Bit 4) */ +#define USIC_CH_DX0CR_INSW_Msk (0x10UL) /*!< USIC_CH DX0CR: INSW (Bitfield-Mask: 0x01) */ +#define USIC_CH_DX0CR_DFEN_Pos (5UL) /*!< USIC_CH DX0CR: DFEN (Bit 5) */ +#define USIC_CH_DX0CR_DFEN_Msk (0x20UL) /*!< USIC_CH DX0CR: DFEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_DX0CR_DSEN_Pos (6UL) /*!< USIC_CH DX0CR: DSEN (Bit 6) */ +#define USIC_CH_DX0CR_DSEN_Msk (0x40UL) /*!< USIC_CH DX0CR: DSEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_DX0CR_DPOL_Pos (8UL) /*!< USIC_CH DX0CR: DPOL (Bit 8) */ +#define USIC_CH_DX0CR_DPOL_Msk (0x100UL) /*!< USIC_CH DX0CR: DPOL (Bitfield-Mask: 0x01) */ +#define USIC_CH_DX0CR_SFSEL_Pos (9UL) /*!< USIC_CH DX0CR: SFSEL (Bit 9) */ +#define USIC_CH_DX0CR_SFSEL_Msk (0x200UL) /*!< USIC_CH DX0CR: SFSEL (Bitfield-Mask: 0x01) */ +#define USIC_CH_DX0CR_CM_Pos (10UL) /*!< USIC_CH DX0CR: CM (Bit 10) */ +#define USIC_CH_DX0CR_CM_Msk (0xc00UL) /*!< USIC_CH DX0CR: CM (Bitfield-Mask: 0x03) */ +#define USIC_CH_DX0CR_DXS_Pos (15UL) /*!< USIC_CH DX0CR: DXS (Bit 15) */ +#define USIC_CH_DX0CR_DXS_Msk (0x8000UL) /*!< USIC_CH DX0CR: DXS (Bitfield-Mask: 0x01) */ + +/* -------------------------------- USIC_CH_DX1CR ------------------------------- */ +#define USIC_CH_DX1CR_DSEL_Pos (0UL) /*!< USIC_CH DX1CR: DSEL (Bit 0) */ +#define USIC_CH_DX1CR_DSEL_Msk (0x7UL) /*!< USIC_CH DX1CR: DSEL (Bitfield-Mask: 0x07) */ +#define USIC_CH_DX1CR_DCEN_Pos (3UL) /*!< USIC_CH DX1CR: DCEN (Bit 3) */ +#define USIC_CH_DX1CR_DCEN_Msk (0x8UL) /*!< USIC_CH DX1CR: DCEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_DX1CR_INSW_Pos (4UL) /*!< USIC_CH DX1CR: INSW (Bit 4) */ +#define USIC_CH_DX1CR_INSW_Msk (0x10UL) /*!< USIC_CH DX1CR: INSW (Bitfield-Mask: 0x01) */ +#define USIC_CH_DX1CR_DFEN_Pos (5UL) /*!< USIC_CH DX1CR: DFEN (Bit 5) */ +#define USIC_CH_DX1CR_DFEN_Msk (0x20UL) /*!< USIC_CH DX1CR: DFEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_DX1CR_DSEN_Pos (6UL) /*!< USIC_CH DX1CR: DSEN (Bit 6) */ +#define USIC_CH_DX1CR_DSEN_Msk (0x40UL) /*!< USIC_CH DX1CR: DSEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_DX1CR_DPOL_Pos (8UL) /*!< USIC_CH DX1CR: DPOL (Bit 8) */ +#define USIC_CH_DX1CR_DPOL_Msk (0x100UL) /*!< USIC_CH DX1CR: DPOL (Bitfield-Mask: 0x01) */ +#define USIC_CH_DX1CR_SFSEL_Pos (9UL) /*!< USIC_CH DX1CR: SFSEL (Bit 9) */ +#define USIC_CH_DX1CR_SFSEL_Msk (0x200UL) /*!< USIC_CH DX1CR: SFSEL (Bitfield-Mask: 0x01) */ +#define USIC_CH_DX1CR_CM_Pos (10UL) /*!< USIC_CH DX1CR: CM (Bit 10) */ +#define USIC_CH_DX1CR_CM_Msk (0xc00UL) /*!< USIC_CH DX1CR: CM (Bitfield-Mask: 0x03) */ +#define USIC_CH_DX1CR_DXS_Pos (15UL) /*!< USIC_CH DX1CR: DXS (Bit 15) */ +#define USIC_CH_DX1CR_DXS_Msk (0x8000UL) /*!< USIC_CH DX1CR: DXS (Bitfield-Mask: 0x01) */ + +/* -------------------------------- USIC_CH_DX2CR ------------------------------- */ +#define USIC_CH_DX2CR_DSEL_Pos (0UL) /*!< USIC_CH DX2CR: DSEL (Bit 0) */ +#define USIC_CH_DX2CR_DSEL_Msk (0x7UL) /*!< USIC_CH DX2CR: DSEL (Bitfield-Mask: 0x07) */ +#define USIC_CH_DX2CR_INSW_Pos (4UL) /*!< USIC_CH DX2CR: INSW (Bit 4) */ +#define USIC_CH_DX2CR_INSW_Msk (0x10UL) /*!< USIC_CH DX2CR: INSW (Bitfield-Mask: 0x01) */ +#define USIC_CH_DX2CR_DFEN_Pos (5UL) /*!< USIC_CH DX2CR: DFEN (Bit 5) */ +#define USIC_CH_DX2CR_DFEN_Msk (0x20UL) /*!< USIC_CH DX2CR: DFEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_DX2CR_DSEN_Pos (6UL) /*!< USIC_CH DX2CR: DSEN (Bit 6) */ +#define USIC_CH_DX2CR_DSEN_Msk (0x40UL) /*!< USIC_CH DX2CR: DSEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_DX2CR_DPOL_Pos (8UL) /*!< USIC_CH DX2CR: DPOL (Bit 8) */ +#define USIC_CH_DX2CR_DPOL_Msk (0x100UL) /*!< USIC_CH DX2CR: DPOL (Bitfield-Mask: 0x01) */ +#define USIC_CH_DX2CR_SFSEL_Pos (9UL) /*!< USIC_CH DX2CR: SFSEL (Bit 9) */ +#define USIC_CH_DX2CR_SFSEL_Msk (0x200UL) /*!< USIC_CH DX2CR: SFSEL (Bitfield-Mask: 0x01) */ +#define USIC_CH_DX2CR_CM_Pos (10UL) /*!< USIC_CH DX2CR: CM (Bit 10) */ +#define USIC_CH_DX2CR_CM_Msk (0xc00UL) /*!< USIC_CH DX2CR: CM (Bitfield-Mask: 0x03) */ +#define USIC_CH_DX2CR_DXS_Pos (15UL) /*!< USIC_CH DX2CR: DXS (Bit 15) */ +#define USIC_CH_DX2CR_DXS_Msk (0x8000UL) /*!< USIC_CH DX2CR: DXS (Bitfield-Mask: 0x01) */ + +/* -------------------------------- USIC_CH_DX3CR ------------------------------- */ +#define USIC_CH_DX3CR_DSEL_Pos (0UL) /*!< USIC_CH DX3CR: DSEL (Bit 0) */ +#define USIC_CH_DX3CR_DSEL_Msk (0x7UL) /*!< USIC_CH DX3CR: DSEL (Bitfield-Mask: 0x07) */ +#define USIC_CH_DX3CR_INSW_Pos (4UL) /*!< USIC_CH DX3CR: INSW (Bit 4) */ +#define USIC_CH_DX3CR_INSW_Msk (0x10UL) /*!< USIC_CH DX3CR: INSW (Bitfield-Mask: 0x01) */ +#define USIC_CH_DX3CR_DFEN_Pos (5UL) /*!< USIC_CH DX3CR: DFEN (Bit 5) */ +#define USIC_CH_DX3CR_DFEN_Msk (0x20UL) /*!< USIC_CH DX3CR: DFEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_DX3CR_DSEN_Pos (6UL) /*!< USIC_CH DX3CR: DSEN (Bit 6) */ +#define USIC_CH_DX3CR_DSEN_Msk (0x40UL) /*!< USIC_CH DX3CR: DSEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_DX3CR_DPOL_Pos (8UL) /*!< USIC_CH DX3CR: DPOL (Bit 8) */ +#define USIC_CH_DX3CR_DPOL_Msk (0x100UL) /*!< USIC_CH DX3CR: DPOL (Bitfield-Mask: 0x01) */ +#define USIC_CH_DX3CR_SFSEL_Pos (9UL) /*!< USIC_CH DX3CR: SFSEL (Bit 9) */ +#define USIC_CH_DX3CR_SFSEL_Msk (0x200UL) /*!< USIC_CH DX3CR: SFSEL (Bitfield-Mask: 0x01) */ +#define USIC_CH_DX3CR_CM_Pos (10UL) /*!< USIC_CH DX3CR: CM (Bit 10) */ +#define USIC_CH_DX3CR_CM_Msk (0xc00UL) /*!< USIC_CH DX3CR: CM (Bitfield-Mask: 0x03) */ +#define USIC_CH_DX3CR_DXS_Pos (15UL) /*!< USIC_CH DX3CR: DXS (Bit 15) */ +#define USIC_CH_DX3CR_DXS_Msk (0x8000UL) /*!< USIC_CH DX3CR: DXS (Bitfield-Mask: 0x01) */ + +/* -------------------------------- USIC_CH_DX4CR ------------------------------- */ +#define USIC_CH_DX4CR_DSEL_Pos (0UL) /*!< USIC_CH DX4CR: DSEL (Bit 0) */ +#define USIC_CH_DX4CR_DSEL_Msk (0x7UL) /*!< USIC_CH DX4CR: DSEL (Bitfield-Mask: 0x07) */ +#define USIC_CH_DX4CR_INSW_Pos (4UL) /*!< USIC_CH DX4CR: INSW (Bit 4) */ +#define USIC_CH_DX4CR_INSW_Msk (0x10UL) /*!< USIC_CH DX4CR: INSW (Bitfield-Mask: 0x01) */ +#define USIC_CH_DX4CR_DFEN_Pos (5UL) /*!< USIC_CH DX4CR: DFEN (Bit 5) */ +#define USIC_CH_DX4CR_DFEN_Msk (0x20UL) /*!< USIC_CH DX4CR: DFEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_DX4CR_DSEN_Pos (6UL) /*!< USIC_CH DX4CR: DSEN (Bit 6) */ +#define USIC_CH_DX4CR_DSEN_Msk (0x40UL) /*!< USIC_CH DX4CR: DSEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_DX4CR_DPOL_Pos (8UL) /*!< USIC_CH DX4CR: DPOL (Bit 8) */ +#define USIC_CH_DX4CR_DPOL_Msk (0x100UL) /*!< USIC_CH DX4CR: DPOL (Bitfield-Mask: 0x01) */ +#define USIC_CH_DX4CR_SFSEL_Pos (9UL) /*!< USIC_CH DX4CR: SFSEL (Bit 9) */ +#define USIC_CH_DX4CR_SFSEL_Msk (0x200UL) /*!< USIC_CH DX4CR: SFSEL (Bitfield-Mask: 0x01) */ +#define USIC_CH_DX4CR_CM_Pos (10UL) /*!< USIC_CH DX4CR: CM (Bit 10) */ +#define USIC_CH_DX4CR_CM_Msk (0xc00UL) /*!< USIC_CH DX4CR: CM (Bitfield-Mask: 0x03) */ +#define USIC_CH_DX4CR_DXS_Pos (15UL) /*!< USIC_CH DX4CR: DXS (Bit 15) */ +#define USIC_CH_DX4CR_DXS_Msk (0x8000UL) /*!< USIC_CH DX4CR: DXS (Bitfield-Mask: 0x01) */ + +/* -------------------------------- USIC_CH_DX5CR ------------------------------- */ +#define USIC_CH_DX5CR_DSEL_Pos (0UL) /*!< USIC_CH DX5CR: DSEL (Bit 0) */ +#define USIC_CH_DX5CR_DSEL_Msk (0x7UL) /*!< USIC_CH DX5CR: DSEL (Bitfield-Mask: 0x07) */ +#define USIC_CH_DX5CR_INSW_Pos (4UL) /*!< USIC_CH DX5CR: INSW (Bit 4) */ +#define USIC_CH_DX5CR_INSW_Msk (0x10UL) /*!< USIC_CH DX5CR: INSW (Bitfield-Mask: 0x01) */ +#define USIC_CH_DX5CR_DFEN_Pos (5UL) /*!< USIC_CH DX5CR: DFEN (Bit 5) */ +#define USIC_CH_DX5CR_DFEN_Msk (0x20UL) /*!< USIC_CH DX5CR: DFEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_DX5CR_DSEN_Pos (6UL) /*!< USIC_CH DX5CR: DSEN (Bit 6) */ +#define USIC_CH_DX5CR_DSEN_Msk (0x40UL) /*!< USIC_CH DX5CR: DSEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_DX5CR_DPOL_Pos (8UL) /*!< USIC_CH DX5CR: DPOL (Bit 8) */ +#define USIC_CH_DX5CR_DPOL_Msk (0x100UL) /*!< USIC_CH DX5CR: DPOL (Bitfield-Mask: 0x01) */ +#define USIC_CH_DX5CR_SFSEL_Pos (9UL) /*!< USIC_CH DX5CR: SFSEL (Bit 9) */ +#define USIC_CH_DX5CR_SFSEL_Msk (0x200UL) /*!< USIC_CH DX5CR: SFSEL (Bitfield-Mask: 0x01) */ +#define USIC_CH_DX5CR_CM_Pos (10UL) /*!< USIC_CH DX5CR: CM (Bit 10) */ +#define USIC_CH_DX5CR_CM_Msk (0xc00UL) /*!< USIC_CH DX5CR: CM (Bitfield-Mask: 0x03) */ +#define USIC_CH_DX5CR_DXS_Pos (15UL) /*!< USIC_CH DX5CR: DXS (Bit 15) */ +#define USIC_CH_DX5CR_DXS_Msk (0x8000UL) /*!< USIC_CH DX5CR: DXS (Bitfield-Mask: 0x01) */ + +/* -------------------------------- USIC_CH_SCTR -------------------------------- */ +#define USIC_CH_SCTR_SDIR_Pos (0UL) /*!< USIC_CH SCTR: SDIR (Bit 0) */ +#define USIC_CH_SCTR_SDIR_Msk (0x1UL) /*!< USIC_CH SCTR: SDIR (Bitfield-Mask: 0x01) */ +#define USIC_CH_SCTR_PDL_Pos (1UL) /*!< USIC_CH SCTR: PDL (Bit 1) */ +#define USIC_CH_SCTR_PDL_Msk (0x2UL) /*!< USIC_CH SCTR: PDL (Bitfield-Mask: 0x01) */ +#define USIC_CH_SCTR_DSM_Pos (2UL) /*!< USIC_CH SCTR: DSM (Bit 2) */ +#define USIC_CH_SCTR_DSM_Msk (0xcUL) /*!< USIC_CH SCTR: DSM (Bitfield-Mask: 0x03) */ +#define USIC_CH_SCTR_HPCDIR_Pos (4UL) /*!< USIC_CH SCTR: HPCDIR (Bit 4) */ +#define USIC_CH_SCTR_HPCDIR_Msk (0x10UL) /*!< USIC_CH SCTR: HPCDIR (Bitfield-Mask: 0x01) */ +#define USIC_CH_SCTR_DOCFG_Pos (6UL) /*!< USIC_CH SCTR: DOCFG (Bit 6) */ +#define USIC_CH_SCTR_DOCFG_Msk (0xc0UL) /*!< USIC_CH SCTR: DOCFG (Bitfield-Mask: 0x03) */ +#define USIC_CH_SCTR_TRM_Pos (8UL) /*!< USIC_CH SCTR: TRM (Bit 8) */ +#define USIC_CH_SCTR_TRM_Msk (0x300UL) /*!< USIC_CH SCTR: TRM (Bitfield-Mask: 0x03) */ +#define USIC_CH_SCTR_FLE_Pos (16UL) /*!< USIC_CH SCTR: FLE (Bit 16) */ +#define USIC_CH_SCTR_FLE_Msk (0x3f0000UL) /*!< USIC_CH SCTR: FLE (Bitfield-Mask: 0x3f) */ +#define USIC_CH_SCTR_WLE_Pos (24UL) /*!< USIC_CH SCTR: WLE (Bit 24) */ +#define USIC_CH_SCTR_WLE_Msk (0xf000000UL) /*!< USIC_CH SCTR: WLE (Bitfield-Mask: 0x0f) */ + +/* -------------------------------- USIC_CH_TCSR -------------------------------- */ +#define USIC_CH_TCSR_WLEMD_Pos (0UL) /*!< USIC_CH TCSR: WLEMD (Bit 0) */ +#define USIC_CH_TCSR_WLEMD_Msk (0x1UL) /*!< USIC_CH TCSR: WLEMD (Bitfield-Mask: 0x01) */ +#define USIC_CH_TCSR_SELMD_Pos (1UL) /*!< USIC_CH TCSR: SELMD (Bit 1) */ +#define USIC_CH_TCSR_SELMD_Msk (0x2UL) /*!< USIC_CH TCSR: SELMD (Bitfield-Mask: 0x01) */ +#define USIC_CH_TCSR_FLEMD_Pos (2UL) /*!< USIC_CH TCSR: FLEMD (Bit 2) */ +#define USIC_CH_TCSR_FLEMD_Msk (0x4UL) /*!< USIC_CH TCSR: FLEMD (Bitfield-Mask: 0x01) */ +#define USIC_CH_TCSR_WAMD_Pos (3UL) /*!< USIC_CH TCSR: WAMD (Bit 3) */ +#define USIC_CH_TCSR_WAMD_Msk (0x8UL) /*!< USIC_CH TCSR: WAMD (Bitfield-Mask: 0x01) */ +#define USIC_CH_TCSR_HPCMD_Pos (4UL) /*!< USIC_CH TCSR: HPCMD (Bit 4) */ +#define USIC_CH_TCSR_HPCMD_Msk (0x10UL) /*!< USIC_CH TCSR: HPCMD (Bitfield-Mask: 0x01) */ +#define USIC_CH_TCSR_SOF_Pos (5UL) /*!< USIC_CH TCSR: SOF (Bit 5) */ +#define USIC_CH_TCSR_SOF_Msk (0x20UL) /*!< USIC_CH TCSR: SOF (Bitfield-Mask: 0x01) */ +#define USIC_CH_TCSR_EOF_Pos (6UL) /*!< USIC_CH TCSR: EOF (Bit 6) */ +#define USIC_CH_TCSR_EOF_Msk (0x40UL) /*!< USIC_CH TCSR: EOF (Bitfield-Mask: 0x01) */ +#define USIC_CH_TCSR_TDV_Pos (7UL) /*!< USIC_CH TCSR: TDV (Bit 7) */ +#define USIC_CH_TCSR_TDV_Msk (0x80UL) /*!< USIC_CH TCSR: TDV (Bitfield-Mask: 0x01) */ +#define USIC_CH_TCSR_TDSSM_Pos (8UL) /*!< USIC_CH TCSR: TDSSM (Bit 8) */ +#define USIC_CH_TCSR_TDSSM_Msk (0x100UL) /*!< USIC_CH TCSR: TDSSM (Bitfield-Mask: 0x01) */ +#define USIC_CH_TCSR_TDEN_Pos (10UL) /*!< USIC_CH TCSR: TDEN (Bit 10) */ +#define USIC_CH_TCSR_TDEN_Msk (0xc00UL) /*!< USIC_CH TCSR: TDEN (Bitfield-Mask: 0x03) */ +#define USIC_CH_TCSR_TDVTR_Pos (12UL) /*!< USIC_CH TCSR: TDVTR (Bit 12) */ +#define USIC_CH_TCSR_TDVTR_Msk (0x1000UL) /*!< USIC_CH TCSR: TDVTR (Bitfield-Mask: 0x01) */ +#define USIC_CH_TCSR_WA_Pos (13UL) /*!< USIC_CH TCSR: WA (Bit 13) */ +#define USIC_CH_TCSR_WA_Msk (0x2000UL) /*!< USIC_CH TCSR: WA (Bitfield-Mask: 0x01) */ +#define USIC_CH_TCSR_TSOF_Pos (24UL) /*!< USIC_CH TCSR: TSOF (Bit 24) */ +#define USIC_CH_TCSR_TSOF_Msk (0x1000000UL) /*!< USIC_CH TCSR: TSOF (Bitfield-Mask: 0x01) */ +#define USIC_CH_TCSR_TV_Pos (26UL) /*!< USIC_CH TCSR: TV (Bit 26) */ +#define USIC_CH_TCSR_TV_Msk (0x4000000UL) /*!< USIC_CH TCSR: TV (Bitfield-Mask: 0x01) */ +#define USIC_CH_TCSR_TVC_Pos (27UL) /*!< USIC_CH TCSR: TVC (Bit 27) */ +#define USIC_CH_TCSR_TVC_Msk (0x8000000UL) /*!< USIC_CH TCSR: TVC (Bitfield-Mask: 0x01) */ +#define USIC_CH_TCSR_TE_Pos (28UL) /*!< USIC_CH TCSR: TE (Bit 28) */ +#define USIC_CH_TCSR_TE_Msk (0x10000000UL) /*!< USIC_CH TCSR: TE (Bitfield-Mask: 0x01) */ + +/* --------------------------------- USIC_CH_PCR -------------------------------- */ +#define USIC_CH_PCR_CTR0_Pos (0UL) /*!< USIC_CH PCR: CTR0 (Bit 0) */ +#define USIC_CH_PCR_CTR0_Msk (0x1UL) /*!< USIC_CH PCR: CTR0 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_CTR1_Pos (1UL) /*!< USIC_CH PCR: CTR1 (Bit 1) */ +#define USIC_CH_PCR_CTR1_Msk (0x2UL) /*!< USIC_CH PCR: CTR1 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_CTR2_Pos (2UL) /*!< USIC_CH PCR: CTR2 (Bit 2) */ +#define USIC_CH_PCR_CTR2_Msk (0x4UL) /*!< USIC_CH PCR: CTR2 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_CTR3_Pos (3UL) /*!< USIC_CH PCR: CTR3 (Bit 3) */ +#define USIC_CH_PCR_CTR3_Msk (0x8UL) /*!< USIC_CH PCR: CTR3 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_CTR4_Pos (4UL) /*!< USIC_CH PCR: CTR4 (Bit 4) */ +#define USIC_CH_PCR_CTR4_Msk (0x10UL) /*!< USIC_CH PCR: CTR4 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_CTR5_Pos (5UL) /*!< USIC_CH PCR: CTR5 (Bit 5) */ +#define USIC_CH_PCR_CTR5_Msk (0x20UL) /*!< USIC_CH PCR: CTR5 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_CTR6_Pos (6UL) /*!< USIC_CH PCR: CTR6 (Bit 6) */ +#define USIC_CH_PCR_CTR6_Msk (0x40UL) /*!< USIC_CH PCR: CTR6 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_CTR7_Pos (7UL) /*!< USIC_CH PCR: CTR7 (Bit 7) */ +#define USIC_CH_PCR_CTR7_Msk (0x80UL) /*!< USIC_CH PCR: CTR7 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_CTR8_Pos (8UL) /*!< USIC_CH PCR: CTR8 (Bit 8) */ +#define USIC_CH_PCR_CTR8_Msk (0x100UL) /*!< USIC_CH PCR: CTR8 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_CTR9_Pos (9UL) /*!< USIC_CH PCR: CTR9 (Bit 9) */ +#define USIC_CH_PCR_CTR9_Msk (0x200UL) /*!< USIC_CH PCR: CTR9 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_CTR10_Pos (10UL) /*!< USIC_CH PCR: CTR10 (Bit 10) */ +#define USIC_CH_PCR_CTR10_Msk (0x400UL) /*!< USIC_CH PCR: CTR10 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_CTR11_Pos (11UL) /*!< USIC_CH PCR: CTR11 (Bit 11) */ +#define USIC_CH_PCR_CTR11_Msk (0x800UL) /*!< USIC_CH PCR: CTR11 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_CTR12_Pos (12UL) /*!< USIC_CH PCR: CTR12 (Bit 12) */ +#define USIC_CH_PCR_CTR12_Msk (0x1000UL) /*!< USIC_CH PCR: CTR12 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_CTR13_Pos (13UL) /*!< USIC_CH PCR: CTR13 (Bit 13) */ +#define USIC_CH_PCR_CTR13_Msk (0x2000UL) /*!< USIC_CH PCR: CTR13 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_CTR14_Pos (14UL) /*!< USIC_CH PCR: CTR14 (Bit 14) */ +#define USIC_CH_PCR_CTR14_Msk (0x4000UL) /*!< USIC_CH PCR: CTR14 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_CTR15_Pos (15UL) /*!< USIC_CH PCR: CTR15 (Bit 15) */ +#define USIC_CH_PCR_CTR15_Msk (0x8000UL) /*!< USIC_CH PCR: CTR15 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_CTR16_Pos (16UL) /*!< USIC_CH PCR: CTR16 (Bit 16) */ +#define USIC_CH_PCR_CTR16_Msk (0x10000UL) /*!< USIC_CH PCR: CTR16 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_CTR17_Pos (17UL) /*!< USIC_CH PCR: CTR17 (Bit 17) */ +#define USIC_CH_PCR_CTR17_Msk (0x20000UL) /*!< USIC_CH PCR: CTR17 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_CTR18_Pos (18UL) /*!< USIC_CH PCR: CTR18 (Bit 18) */ +#define USIC_CH_PCR_CTR18_Msk (0x40000UL) /*!< USIC_CH PCR: CTR18 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_CTR19_Pos (19UL) /*!< USIC_CH PCR: CTR19 (Bit 19) */ +#define USIC_CH_PCR_CTR19_Msk (0x80000UL) /*!< USIC_CH PCR: CTR19 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_CTR20_Pos (20UL) /*!< USIC_CH PCR: CTR20 (Bit 20) */ +#define USIC_CH_PCR_CTR20_Msk (0x100000UL) /*!< USIC_CH PCR: CTR20 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_CTR21_Pos (21UL) /*!< USIC_CH PCR: CTR21 (Bit 21) */ +#define USIC_CH_PCR_CTR21_Msk (0x200000UL) /*!< USIC_CH PCR: CTR21 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_CTR22_Pos (22UL) /*!< USIC_CH PCR: CTR22 (Bit 22) */ +#define USIC_CH_PCR_CTR22_Msk (0x400000UL) /*!< USIC_CH PCR: CTR22 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_CTR23_Pos (23UL) /*!< USIC_CH PCR: CTR23 (Bit 23) */ +#define USIC_CH_PCR_CTR23_Msk (0x800000UL) /*!< USIC_CH PCR: CTR23 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_CTR24_Pos (24UL) /*!< USIC_CH PCR: CTR24 (Bit 24) */ +#define USIC_CH_PCR_CTR24_Msk (0x1000000UL) /*!< USIC_CH PCR: CTR24 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_CTR25_Pos (25UL) /*!< USIC_CH PCR: CTR25 (Bit 25) */ +#define USIC_CH_PCR_CTR25_Msk (0x2000000UL) /*!< USIC_CH PCR: CTR25 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_CTR26_Pos (26UL) /*!< USIC_CH PCR: CTR26 (Bit 26) */ +#define USIC_CH_PCR_CTR26_Msk (0x4000000UL) /*!< USIC_CH PCR: CTR26 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_CTR27_Pos (27UL) /*!< USIC_CH PCR: CTR27 (Bit 27) */ +#define USIC_CH_PCR_CTR27_Msk (0x8000000UL) /*!< USIC_CH PCR: CTR27 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_CTR28_Pos (28UL) /*!< USIC_CH PCR: CTR28 (Bit 28) */ +#define USIC_CH_PCR_CTR28_Msk (0x10000000UL) /*!< USIC_CH PCR: CTR28 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_CTR29_Pos (29UL) /*!< USIC_CH PCR: CTR29 (Bit 29) */ +#define USIC_CH_PCR_CTR29_Msk (0x20000000UL) /*!< USIC_CH PCR: CTR29 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_CTR30_Pos (30UL) /*!< USIC_CH PCR: CTR30 (Bit 30) */ +#define USIC_CH_PCR_CTR30_Msk (0x40000000UL) /*!< USIC_CH PCR: CTR30 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_CTR31_Pos (31UL) /*!< USIC_CH PCR: CTR31 (Bit 31) */ +#define USIC_CH_PCR_CTR31_Msk (0x80000000UL) /*!< USIC_CH PCR: CTR31 (Bitfield-Mask: 0x01) */ + +/* ----------------------------- USIC_CH_PCR_ASCMode ---------------------------- */ +#define USIC_CH_PCR_ASCMode_SMD_Pos (0UL) /*!< USIC_CH PCR_ASCMode: SMD (Bit 0) */ +#define USIC_CH_PCR_ASCMode_SMD_Msk (0x1UL) /*!< USIC_CH PCR_ASCMode: SMD (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_ASCMode_STPB_Pos (1UL) /*!< USIC_CH PCR_ASCMode: STPB (Bit 1) */ +#define USIC_CH_PCR_ASCMode_STPB_Msk (0x2UL) /*!< USIC_CH PCR_ASCMode: STPB (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_ASCMode_IDM_Pos (2UL) /*!< USIC_CH PCR_ASCMode: IDM (Bit 2) */ +#define USIC_CH_PCR_ASCMode_IDM_Msk (0x4UL) /*!< USIC_CH PCR_ASCMode: IDM (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_ASCMode_SBIEN_Pos (3UL) /*!< USIC_CH PCR_ASCMode: SBIEN (Bit 3) */ +#define USIC_CH_PCR_ASCMode_SBIEN_Msk (0x8UL) /*!< USIC_CH PCR_ASCMode: SBIEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_ASCMode_CDEN_Pos (4UL) /*!< USIC_CH PCR_ASCMode: CDEN (Bit 4) */ +#define USIC_CH_PCR_ASCMode_CDEN_Msk (0x10UL) /*!< USIC_CH PCR_ASCMode: CDEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_ASCMode_RNIEN_Pos (5UL) /*!< USIC_CH PCR_ASCMode: RNIEN (Bit 5) */ +#define USIC_CH_PCR_ASCMode_RNIEN_Msk (0x20UL) /*!< USIC_CH PCR_ASCMode: RNIEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_ASCMode_FEIEN_Pos (6UL) /*!< USIC_CH PCR_ASCMode: FEIEN (Bit 6) */ +#define USIC_CH_PCR_ASCMode_FEIEN_Msk (0x40UL) /*!< USIC_CH PCR_ASCMode: FEIEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_ASCMode_FFIEN_Pos (7UL) /*!< USIC_CH PCR_ASCMode: FFIEN (Bit 7) */ +#define USIC_CH_PCR_ASCMode_FFIEN_Msk (0x80UL) /*!< USIC_CH PCR_ASCMode: FFIEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_ASCMode_SP_Pos (8UL) /*!< USIC_CH PCR_ASCMode: SP (Bit 8) */ +#define USIC_CH_PCR_ASCMode_SP_Msk (0x1f00UL) /*!< USIC_CH PCR_ASCMode: SP (Bitfield-Mask: 0x1f) */ +#define USIC_CH_PCR_ASCMode_PL_Pos (13UL) /*!< USIC_CH PCR_ASCMode: PL (Bit 13) */ +#define USIC_CH_PCR_ASCMode_PL_Msk (0xe000UL) /*!< USIC_CH PCR_ASCMode: PL (Bitfield-Mask: 0x07) */ +#define USIC_CH_PCR_ASCMode_RSTEN_Pos (16UL) /*!< USIC_CH PCR_ASCMode: RSTEN (Bit 16) */ +#define USIC_CH_PCR_ASCMode_RSTEN_Msk (0x10000UL) /*!< USIC_CH PCR_ASCMode: RSTEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_ASCMode_TSTEN_Pos (17UL) /*!< USIC_CH PCR_ASCMode: TSTEN (Bit 17) */ +#define USIC_CH_PCR_ASCMode_TSTEN_Msk (0x20000UL) /*!< USIC_CH PCR_ASCMode: TSTEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_ASCMode_MCLK_Pos (31UL) /*!< USIC_CH PCR_ASCMode: MCLK (Bit 31) */ +#define USIC_CH_PCR_ASCMode_MCLK_Msk (0x80000000UL) /*!< USIC_CH PCR_ASCMode: MCLK (Bitfield-Mask: 0x01) */ + +/* ----------------------------- USIC_CH_PCR_SSCMode ---------------------------- */ +#define USIC_CH_PCR_SSCMode_MSLSEN_Pos (0UL) /*!< USIC_CH PCR_SSCMode: MSLSEN (Bit 0) */ +#define USIC_CH_PCR_SSCMode_MSLSEN_Msk (0x1UL) /*!< USIC_CH PCR_SSCMode: MSLSEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_SSCMode_SELCTR_Pos (1UL) /*!< USIC_CH PCR_SSCMode: SELCTR (Bit 1) */ +#define USIC_CH_PCR_SSCMode_SELCTR_Msk (0x2UL) /*!< USIC_CH PCR_SSCMode: SELCTR (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_SSCMode_SELINV_Pos (2UL) /*!< USIC_CH PCR_SSCMode: SELINV (Bit 2) */ +#define USIC_CH_PCR_SSCMode_SELINV_Msk (0x4UL) /*!< USIC_CH PCR_SSCMode: SELINV (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_SSCMode_FEM_Pos (3UL) /*!< USIC_CH PCR_SSCMode: FEM (Bit 3) */ +#define USIC_CH_PCR_SSCMode_FEM_Msk (0x8UL) /*!< USIC_CH PCR_SSCMode: FEM (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_SSCMode_CTQSEL1_Pos (4UL) /*!< USIC_CH PCR_SSCMode: CTQSEL1 (Bit 4) */ +#define USIC_CH_PCR_SSCMode_CTQSEL1_Msk (0x30UL) /*!< USIC_CH PCR_SSCMode: CTQSEL1 (Bitfield-Mask: 0x03) */ +#define USIC_CH_PCR_SSCMode_PCTQ1_Pos (6UL) /*!< USIC_CH PCR_SSCMode: PCTQ1 (Bit 6) */ +#define USIC_CH_PCR_SSCMode_PCTQ1_Msk (0xc0UL) /*!< USIC_CH PCR_SSCMode: PCTQ1 (Bitfield-Mask: 0x03) */ +#define USIC_CH_PCR_SSCMode_DCTQ1_Pos (8UL) /*!< USIC_CH PCR_SSCMode: DCTQ1 (Bit 8) */ +#define USIC_CH_PCR_SSCMode_DCTQ1_Msk (0x1f00UL) /*!< USIC_CH PCR_SSCMode: DCTQ1 (Bitfield-Mask: 0x1f) */ +#define USIC_CH_PCR_SSCMode_PARIEN_Pos (13UL) /*!< USIC_CH PCR_SSCMode: PARIEN (Bit 13) */ +#define USIC_CH_PCR_SSCMode_PARIEN_Msk (0x2000UL) /*!< USIC_CH PCR_SSCMode: PARIEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_SSCMode_MSLSIEN_Pos (14UL) /*!< USIC_CH PCR_SSCMode: MSLSIEN (Bit 14) */ +#define USIC_CH_PCR_SSCMode_MSLSIEN_Msk (0x4000UL) /*!< USIC_CH PCR_SSCMode: MSLSIEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_SSCMode_DX2TIEN_Pos (15UL) /*!< USIC_CH PCR_SSCMode: DX2TIEN (Bit 15) */ +#define USIC_CH_PCR_SSCMode_DX2TIEN_Msk (0x8000UL) /*!< USIC_CH PCR_SSCMode: DX2TIEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_SSCMode_SELO_Pos (16UL) /*!< USIC_CH PCR_SSCMode: SELO (Bit 16) */ +#define USIC_CH_PCR_SSCMode_SELO_Msk (0xff0000UL) /*!< USIC_CH PCR_SSCMode: SELO (Bitfield-Mask: 0xff) */ +#define USIC_CH_PCR_SSCMode_TIWEN_Pos (24UL) /*!< USIC_CH PCR_SSCMode: TIWEN (Bit 24) */ +#define USIC_CH_PCR_SSCMode_TIWEN_Msk (0x1000000UL) /*!< USIC_CH PCR_SSCMode: TIWEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_SSCMode_SLPHSEL_Pos (25UL) /*!< USIC_CH PCR_SSCMode: SLPHSEL (Bit 25) */ +#define USIC_CH_PCR_SSCMode_SLPHSEL_Msk (0x2000000UL) /*!< USIC_CH PCR_SSCMode: SLPHSEL (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_SSCMode_MCLK_Pos (31UL) /*!< USIC_CH PCR_SSCMode: MCLK (Bit 31) */ +#define USIC_CH_PCR_SSCMode_MCLK_Msk (0x80000000UL) /*!< USIC_CH PCR_SSCMode: MCLK (Bitfield-Mask: 0x01) */ + +/* ----------------------------- USIC_CH_PCR_IICMode ---------------------------- */ +#define USIC_CH_PCR_IICMode_SLAD_Pos (0UL) /*!< USIC_CH PCR_IICMode: SLAD (Bit 0) */ +#define USIC_CH_PCR_IICMode_SLAD_Msk (0xffffUL) /*!< USIC_CH PCR_IICMode: SLAD (Bitfield-Mask: 0xffff) */ +#define USIC_CH_PCR_IICMode_ACK00_Pos (16UL) /*!< USIC_CH PCR_IICMode: ACK00 (Bit 16) */ +#define USIC_CH_PCR_IICMode_ACK00_Msk (0x10000UL) /*!< USIC_CH PCR_IICMode: ACK00 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_IICMode_STIM_Pos (17UL) /*!< USIC_CH PCR_IICMode: STIM (Bit 17) */ +#define USIC_CH_PCR_IICMode_STIM_Msk (0x20000UL) /*!< USIC_CH PCR_IICMode: STIM (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_IICMode_SCRIEN_Pos (18UL) /*!< USIC_CH PCR_IICMode: SCRIEN (Bit 18) */ +#define USIC_CH_PCR_IICMode_SCRIEN_Msk (0x40000UL) /*!< USIC_CH PCR_IICMode: SCRIEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_IICMode_RSCRIEN_Pos (19UL) /*!< USIC_CH PCR_IICMode: RSCRIEN (Bit 19) */ +#define USIC_CH_PCR_IICMode_RSCRIEN_Msk (0x80000UL) /*!< USIC_CH PCR_IICMode: RSCRIEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_IICMode_PCRIEN_Pos (20UL) /*!< USIC_CH PCR_IICMode: PCRIEN (Bit 20) */ +#define USIC_CH_PCR_IICMode_PCRIEN_Msk (0x100000UL) /*!< USIC_CH PCR_IICMode: PCRIEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_IICMode_NACKIEN_Pos (21UL) /*!< USIC_CH PCR_IICMode: NACKIEN (Bit 21) */ +#define USIC_CH_PCR_IICMode_NACKIEN_Msk (0x200000UL) /*!< USIC_CH PCR_IICMode: NACKIEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_IICMode_ARLIEN_Pos (22UL) /*!< USIC_CH PCR_IICMode: ARLIEN (Bit 22) */ +#define USIC_CH_PCR_IICMode_ARLIEN_Msk (0x400000UL) /*!< USIC_CH PCR_IICMode: ARLIEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_IICMode_SRRIEN_Pos (23UL) /*!< USIC_CH PCR_IICMode: SRRIEN (Bit 23) */ +#define USIC_CH_PCR_IICMode_SRRIEN_Msk (0x800000UL) /*!< USIC_CH PCR_IICMode: SRRIEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_IICMode_ERRIEN_Pos (24UL) /*!< USIC_CH PCR_IICMode: ERRIEN (Bit 24) */ +#define USIC_CH_PCR_IICMode_ERRIEN_Msk (0x1000000UL) /*!< USIC_CH PCR_IICMode: ERRIEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_IICMode_SACKDIS_Pos (25UL) /*!< USIC_CH PCR_IICMode: SACKDIS (Bit 25) */ +#define USIC_CH_PCR_IICMode_SACKDIS_Msk (0x2000000UL) /*!< USIC_CH PCR_IICMode: SACKDIS (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_IICMode_HDEL_Pos (26UL) /*!< USIC_CH PCR_IICMode: HDEL (Bit 26) */ +#define USIC_CH_PCR_IICMode_HDEL_Msk (0x3c000000UL) /*!< USIC_CH PCR_IICMode: HDEL (Bitfield-Mask: 0x0f) */ +#define USIC_CH_PCR_IICMode_ACKIEN_Pos (30UL) /*!< USIC_CH PCR_IICMode: ACKIEN (Bit 30) */ +#define USIC_CH_PCR_IICMode_ACKIEN_Msk (0x40000000UL) /*!< USIC_CH PCR_IICMode: ACKIEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_IICMode_MCLK_Pos (31UL) /*!< USIC_CH PCR_IICMode: MCLK (Bit 31) */ +#define USIC_CH_PCR_IICMode_MCLK_Msk (0x80000000UL) /*!< USIC_CH PCR_IICMode: MCLK (Bitfield-Mask: 0x01) */ + +/* ----------------------------- USIC_CH_PCR_IISMode ---------------------------- */ +#define USIC_CH_PCR_IISMode_WAGEN_Pos (0UL) /*!< USIC_CH PCR_IISMode: WAGEN (Bit 0) */ +#define USIC_CH_PCR_IISMode_WAGEN_Msk (0x1UL) /*!< USIC_CH PCR_IISMode: WAGEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_IISMode_DTEN_Pos (1UL) /*!< USIC_CH PCR_IISMode: DTEN (Bit 1) */ +#define USIC_CH_PCR_IISMode_DTEN_Msk (0x2UL) /*!< USIC_CH PCR_IISMode: DTEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_IISMode_SELINV_Pos (2UL) /*!< USIC_CH PCR_IISMode: SELINV (Bit 2) */ +#define USIC_CH_PCR_IISMode_SELINV_Msk (0x4UL) /*!< USIC_CH PCR_IISMode: SELINV (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_IISMode_WAFEIEN_Pos (4UL) /*!< USIC_CH PCR_IISMode: WAFEIEN (Bit 4) */ +#define USIC_CH_PCR_IISMode_WAFEIEN_Msk (0x10UL) /*!< USIC_CH PCR_IISMode: WAFEIEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_IISMode_WAREIEN_Pos (5UL) /*!< USIC_CH PCR_IISMode: WAREIEN (Bit 5) */ +#define USIC_CH_PCR_IISMode_WAREIEN_Msk (0x20UL) /*!< USIC_CH PCR_IISMode: WAREIEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_IISMode_ENDIEN_Pos (6UL) /*!< USIC_CH PCR_IISMode: ENDIEN (Bit 6) */ +#define USIC_CH_PCR_IISMode_ENDIEN_Msk (0x40UL) /*!< USIC_CH PCR_IISMode: ENDIEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_IISMode_DX2TIEN_Pos (15UL) /*!< USIC_CH PCR_IISMode: DX2TIEN (Bit 15) */ +#define USIC_CH_PCR_IISMode_DX2TIEN_Msk (0x8000UL) /*!< USIC_CH PCR_IISMode: DX2TIEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_IISMode_TDEL_Pos (16UL) /*!< USIC_CH PCR_IISMode: TDEL (Bit 16) */ +#define USIC_CH_PCR_IISMode_TDEL_Msk (0x3f0000UL) /*!< USIC_CH PCR_IISMode: TDEL (Bitfield-Mask: 0x3f) */ +#define USIC_CH_PCR_IISMode_MCLK_Pos (31UL) /*!< USIC_CH PCR_IISMode: MCLK (Bit 31) */ +#define USIC_CH_PCR_IISMode_MCLK_Msk (0x80000000UL) /*!< USIC_CH PCR_IISMode: MCLK (Bitfield-Mask: 0x01) */ + +/* --------------------------------- USIC_CH_CCR -------------------------------- */ +#define USIC_CH_CCR_MODE_Pos (0UL) /*!< USIC_CH CCR: MODE (Bit 0) */ +#define USIC_CH_CCR_MODE_Msk (0xfUL) /*!< USIC_CH CCR: MODE (Bitfield-Mask: 0x0f) */ +#define USIC_CH_CCR_HPCEN_Pos (6UL) /*!< USIC_CH CCR: HPCEN (Bit 6) */ +#define USIC_CH_CCR_HPCEN_Msk (0xc0UL) /*!< USIC_CH CCR: HPCEN (Bitfield-Mask: 0x03) */ +#define USIC_CH_CCR_PM_Pos (8UL) /*!< USIC_CH CCR: PM (Bit 8) */ +#define USIC_CH_CCR_PM_Msk (0x300UL) /*!< USIC_CH CCR: PM (Bitfield-Mask: 0x03) */ +#define USIC_CH_CCR_RSIEN_Pos (10UL) /*!< USIC_CH CCR: RSIEN (Bit 10) */ +#define USIC_CH_CCR_RSIEN_Msk (0x400UL) /*!< USIC_CH CCR: RSIEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_CCR_DLIEN_Pos (11UL) /*!< USIC_CH CCR: DLIEN (Bit 11) */ +#define USIC_CH_CCR_DLIEN_Msk (0x800UL) /*!< USIC_CH CCR: DLIEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_CCR_TSIEN_Pos (12UL) /*!< USIC_CH CCR: TSIEN (Bit 12) */ +#define USIC_CH_CCR_TSIEN_Msk (0x1000UL) /*!< USIC_CH CCR: TSIEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_CCR_TBIEN_Pos (13UL) /*!< USIC_CH CCR: TBIEN (Bit 13) */ +#define USIC_CH_CCR_TBIEN_Msk (0x2000UL) /*!< USIC_CH CCR: TBIEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_CCR_RIEN_Pos (14UL) /*!< USIC_CH CCR: RIEN (Bit 14) */ +#define USIC_CH_CCR_RIEN_Msk (0x4000UL) /*!< USIC_CH CCR: RIEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_CCR_AIEN_Pos (15UL) /*!< USIC_CH CCR: AIEN (Bit 15) */ +#define USIC_CH_CCR_AIEN_Msk (0x8000UL) /*!< USIC_CH CCR: AIEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_CCR_BRGIEN_Pos (16UL) /*!< USIC_CH CCR: BRGIEN (Bit 16) */ +#define USIC_CH_CCR_BRGIEN_Msk (0x10000UL) /*!< USIC_CH CCR: BRGIEN (Bitfield-Mask: 0x01) */ + +/* -------------------------------- USIC_CH_CMTR -------------------------------- */ +#define USIC_CH_CMTR_CTV_Pos (0UL) /*!< USIC_CH CMTR: CTV (Bit 0) */ +#define USIC_CH_CMTR_CTV_Msk (0x3ffUL) /*!< USIC_CH CMTR: CTV (Bitfield-Mask: 0x3ff) */ + +/* --------------------------------- USIC_CH_PSR -------------------------------- */ +#define USIC_CH_PSR_ST0_Pos (0UL) /*!< USIC_CH PSR: ST0 (Bit 0) */ +#define USIC_CH_PSR_ST0_Msk (0x1UL) /*!< USIC_CH PSR: ST0 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_ST1_Pos (1UL) /*!< USIC_CH PSR: ST1 (Bit 1) */ +#define USIC_CH_PSR_ST1_Msk (0x2UL) /*!< USIC_CH PSR: ST1 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_ST2_Pos (2UL) /*!< USIC_CH PSR: ST2 (Bit 2) */ +#define USIC_CH_PSR_ST2_Msk (0x4UL) /*!< USIC_CH PSR: ST2 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_ST3_Pos (3UL) /*!< USIC_CH PSR: ST3 (Bit 3) */ +#define USIC_CH_PSR_ST3_Msk (0x8UL) /*!< USIC_CH PSR: ST3 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_ST4_Pos (4UL) /*!< USIC_CH PSR: ST4 (Bit 4) */ +#define USIC_CH_PSR_ST4_Msk (0x10UL) /*!< USIC_CH PSR: ST4 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_ST5_Pos (5UL) /*!< USIC_CH PSR: ST5 (Bit 5) */ +#define USIC_CH_PSR_ST5_Msk (0x20UL) /*!< USIC_CH PSR: ST5 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_ST6_Pos (6UL) /*!< USIC_CH PSR: ST6 (Bit 6) */ +#define USIC_CH_PSR_ST6_Msk (0x40UL) /*!< USIC_CH PSR: ST6 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_ST7_Pos (7UL) /*!< USIC_CH PSR: ST7 (Bit 7) */ +#define USIC_CH_PSR_ST7_Msk (0x80UL) /*!< USIC_CH PSR: ST7 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_ST8_Pos (8UL) /*!< USIC_CH PSR: ST8 (Bit 8) */ +#define USIC_CH_PSR_ST8_Msk (0x100UL) /*!< USIC_CH PSR: ST8 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_ST9_Pos (9UL) /*!< USIC_CH PSR: ST9 (Bit 9) */ +#define USIC_CH_PSR_ST9_Msk (0x200UL) /*!< USIC_CH PSR: ST9 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_RSIF_Pos (10UL) /*!< USIC_CH PSR: RSIF (Bit 10) */ +#define USIC_CH_PSR_RSIF_Msk (0x400UL) /*!< USIC_CH PSR: RSIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_DLIF_Pos (11UL) /*!< USIC_CH PSR: DLIF (Bit 11) */ +#define USIC_CH_PSR_DLIF_Msk (0x800UL) /*!< USIC_CH PSR: DLIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_TSIF_Pos (12UL) /*!< USIC_CH PSR: TSIF (Bit 12) */ +#define USIC_CH_PSR_TSIF_Msk (0x1000UL) /*!< USIC_CH PSR: TSIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_TBIF_Pos (13UL) /*!< USIC_CH PSR: TBIF (Bit 13) */ +#define USIC_CH_PSR_TBIF_Msk (0x2000UL) /*!< USIC_CH PSR: TBIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_RIF_Pos (14UL) /*!< USIC_CH PSR: RIF (Bit 14) */ +#define USIC_CH_PSR_RIF_Msk (0x4000UL) /*!< USIC_CH PSR: RIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_AIF_Pos (15UL) /*!< USIC_CH PSR: AIF (Bit 15) */ +#define USIC_CH_PSR_AIF_Msk (0x8000UL) /*!< USIC_CH PSR: AIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_BRGIF_Pos (16UL) /*!< USIC_CH PSR: BRGIF (Bit 16) */ +#define USIC_CH_PSR_BRGIF_Msk (0x10000UL) /*!< USIC_CH PSR: BRGIF (Bitfield-Mask: 0x01) */ + +/* ----------------------------- USIC_CH_PSR_ASCMode ---------------------------- */ +#define USIC_CH_PSR_ASCMode_TXIDLE_Pos (0UL) /*!< USIC_CH PSR_ASCMode: TXIDLE (Bit 0) */ +#define USIC_CH_PSR_ASCMode_TXIDLE_Msk (0x1UL) /*!< USIC_CH PSR_ASCMode: TXIDLE (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_ASCMode_RXIDLE_Pos (1UL) /*!< USIC_CH PSR_ASCMode: RXIDLE (Bit 1) */ +#define USIC_CH_PSR_ASCMode_RXIDLE_Msk (0x2UL) /*!< USIC_CH PSR_ASCMode: RXIDLE (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_ASCMode_SBD_Pos (2UL) /*!< USIC_CH PSR_ASCMode: SBD (Bit 2) */ +#define USIC_CH_PSR_ASCMode_SBD_Msk (0x4UL) /*!< USIC_CH PSR_ASCMode: SBD (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_ASCMode_COL_Pos (3UL) /*!< USIC_CH PSR_ASCMode: COL (Bit 3) */ +#define USIC_CH_PSR_ASCMode_COL_Msk (0x8UL) /*!< USIC_CH PSR_ASCMode: COL (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_ASCMode_RNS_Pos (4UL) /*!< USIC_CH PSR_ASCMode: RNS (Bit 4) */ +#define USIC_CH_PSR_ASCMode_RNS_Msk (0x10UL) /*!< USIC_CH PSR_ASCMode: RNS (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_ASCMode_FER0_Pos (5UL) /*!< USIC_CH PSR_ASCMode: FER0 (Bit 5) */ +#define USIC_CH_PSR_ASCMode_FER0_Msk (0x20UL) /*!< USIC_CH PSR_ASCMode: FER0 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_ASCMode_FER1_Pos (6UL) /*!< USIC_CH PSR_ASCMode: FER1 (Bit 6) */ +#define USIC_CH_PSR_ASCMode_FER1_Msk (0x40UL) /*!< USIC_CH PSR_ASCMode: FER1 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_ASCMode_RFF_Pos (7UL) /*!< USIC_CH PSR_ASCMode: RFF (Bit 7) */ +#define USIC_CH_PSR_ASCMode_RFF_Msk (0x80UL) /*!< USIC_CH PSR_ASCMode: RFF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_ASCMode_TFF_Pos (8UL) /*!< USIC_CH PSR_ASCMode: TFF (Bit 8) */ +#define USIC_CH_PSR_ASCMode_TFF_Msk (0x100UL) /*!< USIC_CH PSR_ASCMode: TFF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_ASCMode_BUSY_Pos (9UL) /*!< USIC_CH PSR_ASCMode: BUSY (Bit 9) */ +#define USIC_CH_PSR_ASCMode_BUSY_Msk (0x200UL) /*!< USIC_CH PSR_ASCMode: BUSY (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_ASCMode_RSIF_Pos (10UL) /*!< USIC_CH PSR_ASCMode: RSIF (Bit 10) */ +#define USIC_CH_PSR_ASCMode_RSIF_Msk (0x400UL) /*!< USIC_CH PSR_ASCMode: RSIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_ASCMode_DLIF_Pos (11UL) /*!< USIC_CH PSR_ASCMode: DLIF (Bit 11) */ +#define USIC_CH_PSR_ASCMode_DLIF_Msk (0x800UL) /*!< USIC_CH PSR_ASCMode: DLIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_ASCMode_TSIF_Pos (12UL) /*!< USIC_CH PSR_ASCMode: TSIF (Bit 12) */ +#define USIC_CH_PSR_ASCMode_TSIF_Msk (0x1000UL) /*!< USIC_CH PSR_ASCMode: TSIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_ASCMode_TBIF_Pos (13UL) /*!< USIC_CH PSR_ASCMode: TBIF (Bit 13) */ +#define USIC_CH_PSR_ASCMode_TBIF_Msk (0x2000UL) /*!< USIC_CH PSR_ASCMode: TBIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_ASCMode_RIF_Pos (14UL) /*!< USIC_CH PSR_ASCMode: RIF (Bit 14) */ +#define USIC_CH_PSR_ASCMode_RIF_Msk (0x4000UL) /*!< USIC_CH PSR_ASCMode: RIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_ASCMode_AIF_Pos (15UL) /*!< USIC_CH PSR_ASCMode: AIF (Bit 15) */ +#define USIC_CH_PSR_ASCMode_AIF_Msk (0x8000UL) /*!< USIC_CH PSR_ASCMode: AIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_ASCMode_BRGIF_Pos (16UL) /*!< USIC_CH PSR_ASCMode: BRGIF (Bit 16) */ +#define USIC_CH_PSR_ASCMode_BRGIF_Msk (0x10000UL) /*!< USIC_CH PSR_ASCMode: BRGIF (Bitfield-Mask: 0x01) */ + +/* ----------------------------- USIC_CH_PSR_SSCMode ---------------------------- */ +#define USIC_CH_PSR_SSCMode_MSLS_Pos (0UL) /*!< USIC_CH PSR_SSCMode: MSLS (Bit 0) */ +#define USIC_CH_PSR_SSCMode_MSLS_Msk (0x1UL) /*!< USIC_CH PSR_SSCMode: MSLS (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_SSCMode_DX2S_Pos (1UL) /*!< USIC_CH PSR_SSCMode: DX2S (Bit 1) */ +#define USIC_CH_PSR_SSCMode_DX2S_Msk (0x2UL) /*!< USIC_CH PSR_SSCMode: DX2S (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_SSCMode_MSLSEV_Pos (2UL) /*!< USIC_CH PSR_SSCMode: MSLSEV (Bit 2) */ +#define USIC_CH_PSR_SSCMode_MSLSEV_Msk (0x4UL) /*!< USIC_CH PSR_SSCMode: MSLSEV (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_SSCMode_DX2TEV_Pos (3UL) /*!< USIC_CH PSR_SSCMode: DX2TEV (Bit 3) */ +#define USIC_CH_PSR_SSCMode_DX2TEV_Msk (0x8UL) /*!< USIC_CH PSR_SSCMode: DX2TEV (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_SSCMode_PARERR_Pos (4UL) /*!< USIC_CH PSR_SSCMode: PARERR (Bit 4) */ +#define USIC_CH_PSR_SSCMode_PARERR_Msk (0x10UL) /*!< USIC_CH PSR_SSCMode: PARERR (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_SSCMode_RSIF_Pos (10UL) /*!< USIC_CH PSR_SSCMode: RSIF (Bit 10) */ +#define USIC_CH_PSR_SSCMode_RSIF_Msk (0x400UL) /*!< USIC_CH PSR_SSCMode: RSIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_SSCMode_DLIF_Pos (11UL) /*!< USIC_CH PSR_SSCMode: DLIF (Bit 11) */ +#define USIC_CH_PSR_SSCMode_DLIF_Msk (0x800UL) /*!< USIC_CH PSR_SSCMode: DLIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_SSCMode_TSIF_Pos (12UL) /*!< USIC_CH PSR_SSCMode: TSIF (Bit 12) */ +#define USIC_CH_PSR_SSCMode_TSIF_Msk (0x1000UL) /*!< USIC_CH PSR_SSCMode: TSIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_SSCMode_TBIF_Pos (13UL) /*!< USIC_CH PSR_SSCMode: TBIF (Bit 13) */ +#define USIC_CH_PSR_SSCMode_TBIF_Msk (0x2000UL) /*!< USIC_CH PSR_SSCMode: TBIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_SSCMode_RIF_Pos (14UL) /*!< USIC_CH PSR_SSCMode: RIF (Bit 14) */ +#define USIC_CH_PSR_SSCMode_RIF_Msk (0x4000UL) /*!< USIC_CH PSR_SSCMode: RIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_SSCMode_AIF_Pos (15UL) /*!< USIC_CH PSR_SSCMode: AIF (Bit 15) */ +#define USIC_CH_PSR_SSCMode_AIF_Msk (0x8000UL) /*!< USIC_CH PSR_SSCMode: AIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_SSCMode_BRGIF_Pos (16UL) /*!< USIC_CH PSR_SSCMode: BRGIF (Bit 16) */ +#define USIC_CH_PSR_SSCMode_BRGIF_Msk (0x10000UL) /*!< USIC_CH PSR_SSCMode: BRGIF (Bitfield-Mask: 0x01) */ + +/* ----------------------------- USIC_CH_PSR_IICMode ---------------------------- */ +#define USIC_CH_PSR_IICMode_SLSEL_Pos (0UL) /*!< USIC_CH PSR_IICMode: SLSEL (Bit 0) */ +#define USIC_CH_PSR_IICMode_SLSEL_Msk (0x1UL) /*!< USIC_CH PSR_IICMode: SLSEL (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_IICMode_WTDF_Pos (1UL) /*!< USIC_CH PSR_IICMode: WTDF (Bit 1) */ +#define USIC_CH_PSR_IICMode_WTDF_Msk (0x2UL) /*!< USIC_CH PSR_IICMode: WTDF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_IICMode_SCR_Pos (2UL) /*!< USIC_CH PSR_IICMode: SCR (Bit 2) */ +#define USIC_CH_PSR_IICMode_SCR_Msk (0x4UL) /*!< USIC_CH PSR_IICMode: SCR (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_IICMode_RSCR_Pos (3UL) /*!< USIC_CH PSR_IICMode: RSCR (Bit 3) */ +#define USIC_CH_PSR_IICMode_RSCR_Msk (0x8UL) /*!< USIC_CH PSR_IICMode: RSCR (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_IICMode_PCR_Pos (4UL) /*!< USIC_CH PSR_IICMode: PCR (Bit 4) */ +#define USIC_CH_PSR_IICMode_PCR_Msk (0x10UL) /*!< USIC_CH PSR_IICMode: PCR (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_IICMode_NACK_Pos (5UL) /*!< USIC_CH PSR_IICMode: NACK (Bit 5) */ +#define USIC_CH_PSR_IICMode_NACK_Msk (0x20UL) /*!< USIC_CH PSR_IICMode: NACK (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_IICMode_ARL_Pos (6UL) /*!< USIC_CH PSR_IICMode: ARL (Bit 6) */ +#define USIC_CH_PSR_IICMode_ARL_Msk (0x40UL) /*!< USIC_CH PSR_IICMode: ARL (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_IICMode_SRR_Pos (7UL) /*!< USIC_CH PSR_IICMode: SRR (Bit 7) */ +#define USIC_CH_PSR_IICMode_SRR_Msk (0x80UL) /*!< USIC_CH PSR_IICMode: SRR (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_IICMode_ERR_Pos (8UL) /*!< USIC_CH PSR_IICMode: ERR (Bit 8) */ +#define USIC_CH_PSR_IICMode_ERR_Msk (0x100UL) /*!< USIC_CH PSR_IICMode: ERR (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_IICMode_ACK_Pos (9UL) /*!< USIC_CH PSR_IICMode: ACK (Bit 9) */ +#define USIC_CH_PSR_IICMode_ACK_Msk (0x200UL) /*!< USIC_CH PSR_IICMode: ACK (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_IICMode_RSIF_Pos (10UL) /*!< USIC_CH PSR_IICMode: RSIF (Bit 10) */ +#define USIC_CH_PSR_IICMode_RSIF_Msk (0x400UL) /*!< USIC_CH PSR_IICMode: RSIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_IICMode_DLIF_Pos (11UL) /*!< USIC_CH PSR_IICMode: DLIF (Bit 11) */ +#define USIC_CH_PSR_IICMode_DLIF_Msk (0x800UL) /*!< USIC_CH PSR_IICMode: DLIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_IICMode_TSIF_Pos (12UL) /*!< USIC_CH PSR_IICMode: TSIF (Bit 12) */ +#define USIC_CH_PSR_IICMode_TSIF_Msk (0x1000UL) /*!< USIC_CH PSR_IICMode: TSIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_IICMode_TBIF_Pos (13UL) /*!< USIC_CH PSR_IICMode: TBIF (Bit 13) */ +#define USIC_CH_PSR_IICMode_TBIF_Msk (0x2000UL) /*!< USIC_CH PSR_IICMode: TBIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_IICMode_RIF_Pos (14UL) /*!< USIC_CH PSR_IICMode: RIF (Bit 14) */ +#define USIC_CH_PSR_IICMode_RIF_Msk (0x4000UL) /*!< USIC_CH PSR_IICMode: RIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_IICMode_AIF_Pos (15UL) /*!< USIC_CH PSR_IICMode: AIF (Bit 15) */ +#define USIC_CH_PSR_IICMode_AIF_Msk (0x8000UL) /*!< USIC_CH PSR_IICMode: AIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_IICMode_BRGIF_Pos (16UL) /*!< USIC_CH PSR_IICMode: BRGIF (Bit 16) */ +#define USIC_CH_PSR_IICMode_BRGIF_Msk (0x10000UL) /*!< USIC_CH PSR_IICMode: BRGIF (Bitfield-Mask: 0x01) */ + +/* ----------------------------- USIC_CH_PSR_IISMode ---------------------------- */ +#define USIC_CH_PSR_IISMode_WA_Pos (0UL) /*!< USIC_CH PSR_IISMode: WA (Bit 0) */ +#define USIC_CH_PSR_IISMode_WA_Msk (0x1UL) /*!< USIC_CH PSR_IISMode: WA (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_IISMode_DX2S_Pos (1UL) /*!< USIC_CH PSR_IISMode: DX2S (Bit 1) */ +#define USIC_CH_PSR_IISMode_DX2S_Msk (0x2UL) /*!< USIC_CH PSR_IISMode: DX2S (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_IISMode_DX2TEV_Pos (3UL) /*!< USIC_CH PSR_IISMode: DX2TEV (Bit 3) */ +#define USIC_CH_PSR_IISMode_DX2TEV_Msk (0x8UL) /*!< USIC_CH PSR_IISMode: DX2TEV (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_IISMode_WAFE_Pos (4UL) /*!< USIC_CH PSR_IISMode: WAFE (Bit 4) */ +#define USIC_CH_PSR_IISMode_WAFE_Msk (0x10UL) /*!< USIC_CH PSR_IISMode: WAFE (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_IISMode_WARE_Pos (5UL) /*!< USIC_CH PSR_IISMode: WARE (Bit 5) */ +#define USIC_CH_PSR_IISMode_WARE_Msk (0x20UL) /*!< USIC_CH PSR_IISMode: WARE (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_IISMode_END_Pos (6UL) /*!< USIC_CH PSR_IISMode: END (Bit 6) */ +#define USIC_CH_PSR_IISMode_END_Msk (0x40UL) /*!< USIC_CH PSR_IISMode: END (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_IISMode_RSIF_Pos (10UL) /*!< USIC_CH PSR_IISMode: RSIF (Bit 10) */ +#define USIC_CH_PSR_IISMode_RSIF_Msk (0x400UL) /*!< USIC_CH PSR_IISMode: RSIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_IISMode_DLIF_Pos (11UL) /*!< USIC_CH PSR_IISMode: DLIF (Bit 11) */ +#define USIC_CH_PSR_IISMode_DLIF_Msk (0x800UL) /*!< USIC_CH PSR_IISMode: DLIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_IISMode_TSIF_Pos (12UL) /*!< USIC_CH PSR_IISMode: TSIF (Bit 12) */ +#define USIC_CH_PSR_IISMode_TSIF_Msk (0x1000UL) /*!< USIC_CH PSR_IISMode: TSIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_IISMode_TBIF_Pos (13UL) /*!< USIC_CH PSR_IISMode: TBIF (Bit 13) */ +#define USIC_CH_PSR_IISMode_TBIF_Msk (0x2000UL) /*!< USIC_CH PSR_IISMode: TBIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_IISMode_RIF_Pos (14UL) /*!< USIC_CH PSR_IISMode: RIF (Bit 14) */ +#define USIC_CH_PSR_IISMode_RIF_Msk (0x4000UL) /*!< USIC_CH PSR_IISMode: RIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_IISMode_AIF_Pos (15UL) /*!< USIC_CH PSR_IISMode: AIF (Bit 15) */ +#define USIC_CH_PSR_IISMode_AIF_Msk (0x8000UL) /*!< USIC_CH PSR_IISMode: AIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_IISMode_BRGIF_Pos (16UL) /*!< USIC_CH PSR_IISMode: BRGIF (Bit 16) */ +#define USIC_CH_PSR_IISMode_BRGIF_Msk (0x10000UL) /*!< USIC_CH PSR_IISMode: BRGIF (Bitfield-Mask: 0x01) */ + +/* -------------------------------- USIC_CH_PSCR -------------------------------- */ +#define USIC_CH_PSCR_CST0_Pos (0UL) /*!< USIC_CH PSCR: CST0 (Bit 0) */ +#define USIC_CH_PSCR_CST0_Msk (0x1UL) /*!< USIC_CH PSCR: CST0 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSCR_CST1_Pos (1UL) /*!< USIC_CH PSCR: CST1 (Bit 1) */ +#define USIC_CH_PSCR_CST1_Msk (0x2UL) /*!< USIC_CH PSCR: CST1 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSCR_CST2_Pos (2UL) /*!< USIC_CH PSCR: CST2 (Bit 2) */ +#define USIC_CH_PSCR_CST2_Msk (0x4UL) /*!< USIC_CH PSCR: CST2 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSCR_CST3_Pos (3UL) /*!< USIC_CH PSCR: CST3 (Bit 3) */ +#define USIC_CH_PSCR_CST3_Msk (0x8UL) /*!< USIC_CH PSCR: CST3 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSCR_CST4_Pos (4UL) /*!< USIC_CH PSCR: CST4 (Bit 4) */ +#define USIC_CH_PSCR_CST4_Msk (0x10UL) /*!< USIC_CH PSCR: CST4 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSCR_CST5_Pos (5UL) /*!< USIC_CH PSCR: CST5 (Bit 5) */ +#define USIC_CH_PSCR_CST5_Msk (0x20UL) /*!< USIC_CH PSCR: CST5 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSCR_CST6_Pos (6UL) /*!< USIC_CH PSCR: CST6 (Bit 6) */ +#define USIC_CH_PSCR_CST6_Msk (0x40UL) /*!< USIC_CH PSCR: CST6 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSCR_CST7_Pos (7UL) /*!< USIC_CH PSCR: CST7 (Bit 7) */ +#define USIC_CH_PSCR_CST7_Msk (0x80UL) /*!< USIC_CH PSCR: CST7 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSCR_CST8_Pos (8UL) /*!< USIC_CH PSCR: CST8 (Bit 8) */ +#define USIC_CH_PSCR_CST8_Msk (0x100UL) /*!< USIC_CH PSCR: CST8 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSCR_CST9_Pos (9UL) /*!< USIC_CH PSCR: CST9 (Bit 9) */ +#define USIC_CH_PSCR_CST9_Msk (0x200UL) /*!< USIC_CH PSCR: CST9 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSCR_CRSIF_Pos (10UL) /*!< USIC_CH PSCR: CRSIF (Bit 10) */ +#define USIC_CH_PSCR_CRSIF_Msk (0x400UL) /*!< USIC_CH PSCR: CRSIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSCR_CDLIF_Pos (11UL) /*!< USIC_CH PSCR: CDLIF (Bit 11) */ +#define USIC_CH_PSCR_CDLIF_Msk (0x800UL) /*!< USIC_CH PSCR: CDLIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSCR_CTSIF_Pos (12UL) /*!< USIC_CH PSCR: CTSIF (Bit 12) */ +#define USIC_CH_PSCR_CTSIF_Msk (0x1000UL) /*!< USIC_CH PSCR: CTSIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSCR_CTBIF_Pos (13UL) /*!< USIC_CH PSCR: CTBIF (Bit 13) */ +#define USIC_CH_PSCR_CTBIF_Msk (0x2000UL) /*!< USIC_CH PSCR: CTBIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSCR_CRIF_Pos (14UL) /*!< USIC_CH PSCR: CRIF (Bit 14) */ +#define USIC_CH_PSCR_CRIF_Msk (0x4000UL) /*!< USIC_CH PSCR: CRIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSCR_CAIF_Pos (15UL) /*!< USIC_CH PSCR: CAIF (Bit 15) */ +#define USIC_CH_PSCR_CAIF_Msk (0x8000UL) /*!< USIC_CH PSCR: CAIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSCR_CBRGIF_Pos (16UL) /*!< USIC_CH PSCR: CBRGIF (Bit 16) */ +#define USIC_CH_PSCR_CBRGIF_Msk (0x10000UL) /*!< USIC_CH PSCR: CBRGIF (Bitfield-Mask: 0x01) */ + +/* ------------------------------- USIC_CH_RBUFSR ------------------------------- */ +#define USIC_CH_RBUFSR_WLEN_Pos (0UL) /*!< USIC_CH RBUFSR: WLEN (Bit 0) */ +#define USIC_CH_RBUFSR_WLEN_Msk (0xfUL) /*!< USIC_CH RBUFSR: WLEN (Bitfield-Mask: 0x0f) */ +#define USIC_CH_RBUFSR_SOF_Pos (6UL) /*!< USIC_CH RBUFSR: SOF (Bit 6) */ +#define USIC_CH_RBUFSR_SOF_Msk (0x40UL) /*!< USIC_CH RBUFSR: SOF (Bitfield-Mask: 0x01) */ +#define USIC_CH_RBUFSR_PAR_Pos (8UL) /*!< USIC_CH RBUFSR: PAR (Bit 8) */ +#define USIC_CH_RBUFSR_PAR_Msk (0x100UL) /*!< USIC_CH RBUFSR: PAR (Bitfield-Mask: 0x01) */ +#define USIC_CH_RBUFSR_PERR_Pos (9UL) /*!< USIC_CH RBUFSR: PERR (Bit 9) */ +#define USIC_CH_RBUFSR_PERR_Msk (0x200UL) /*!< USIC_CH RBUFSR: PERR (Bitfield-Mask: 0x01) */ +#define USIC_CH_RBUFSR_RDV0_Pos (13UL) /*!< USIC_CH RBUFSR: RDV0 (Bit 13) */ +#define USIC_CH_RBUFSR_RDV0_Msk (0x2000UL) /*!< USIC_CH RBUFSR: RDV0 (Bitfield-Mask: 0x01) */ +#define USIC_CH_RBUFSR_RDV1_Pos (14UL) /*!< USIC_CH RBUFSR: RDV1 (Bit 14) */ +#define USIC_CH_RBUFSR_RDV1_Msk (0x4000UL) /*!< USIC_CH RBUFSR: RDV1 (Bitfield-Mask: 0x01) */ +#define USIC_CH_RBUFSR_DS_Pos (15UL) /*!< USIC_CH RBUFSR: DS (Bit 15) */ +#define USIC_CH_RBUFSR_DS_Msk (0x8000UL) /*!< USIC_CH RBUFSR: DS (Bitfield-Mask: 0x01) */ + +/* -------------------------------- USIC_CH_RBUF -------------------------------- */ +#define USIC_CH_RBUF_DSR_Pos (0UL) /*!< USIC_CH RBUF: DSR (Bit 0) */ +#define USIC_CH_RBUF_DSR_Msk (0xffffUL) /*!< USIC_CH RBUF: DSR (Bitfield-Mask: 0xffff) */ + +/* -------------------------------- USIC_CH_RBUFD ------------------------------- */ +#define USIC_CH_RBUFD_DSR_Pos (0UL) /*!< USIC_CH RBUFD: DSR (Bit 0) */ +#define USIC_CH_RBUFD_DSR_Msk (0xffffUL) /*!< USIC_CH RBUFD: DSR (Bitfield-Mask: 0xffff) */ + +/* -------------------------------- USIC_CH_RBUF0 ------------------------------- */ +#define USIC_CH_RBUF0_DSR0_Pos (0UL) /*!< USIC_CH RBUF0: DSR0 (Bit 0) */ +#define USIC_CH_RBUF0_DSR0_Msk (0xffffUL) /*!< USIC_CH RBUF0: DSR0 (Bitfield-Mask: 0xffff) */ + +/* -------------------------------- USIC_CH_RBUF1 ------------------------------- */ +#define USIC_CH_RBUF1_DSR1_Pos (0UL) /*!< USIC_CH RBUF1: DSR1 (Bit 0) */ +#define USIC_CH_RBUF1_DSR1_Msk (0xffffUL) /*!< USIC_CH RBUF1: DSR1 (Bitfield-Mask: 0xffff) */ + +/* ------------------------------ USIC_CH_RBUF01SR ------------------------------ */ +#define USIC_CH_RBUF01SR_WLEN0_Pos (0UL) /*!< USIC_CH RBUF01SR: WLEN0 (Bit 0) */ +#define USIC_CH_RBUF01SR_WLEN0_Msk (0xfUL) /*!< USIC_CH RBUF01SR: WLEN0 (Bitfield-Mask: 0x0f) */ +#define USIC_CH_RBUF01SR_SOF0_Pos (6UL) /*!< USIC_CH RBUF01SR: SOF0 (Bit 6) */ +#define USIC_CH_RBUF01SR_SOF0_Msk (0x40UL) /*!< USIC_CH RBUF01SR: SOF0 (Bitfield-Mask: 0x01) */ +#define USIC_CH_RBUF01SR_PAR0_Pos (8UL) /*!< USIC_CH RBUF01SR: PAR0 (Bit 8) */ +#define USIC_CH_RBUF01SR_PAR0_Msk (0x100UL) /*!< USIC_CH RBUF01SR: PAR0 (Bitfield-Mask: 0x01) */ +#define USIC_CH_RBUF01SR_PERR0_Pos (9UL) /*!< USIC_CH RBUF01SR: PERR0 (Bit 9) */ +#define USIC_CH_RBUF01SR_PERR0_Msk (0x200UL) /*!< USIC_CH RBUF01SR: PERR0 (Bitfield-Mask: 0x01) */ +#define USIC_CH_RBUF01SR_RDV00_Pos (13UL) /*!< USIC_CH RBUF01SR: RDV00 (Bit 13) */ +#define USIC_CH_RBUF01SR_RDV00_Msk (0x2000UL) /*!< USIC_CH RBUF01SR: RDV00 (Bitfield-Mask: 0x01) */ +#define USIC_CH_RBUF01SR_RDV01_Pos (14UL) /*!< USIC_CH RBUF01SR: RDV01 (Bit 14) */ +#define USIC_CH_RBUF01SR_RDV01_Msk (0x4000UL) /*!< USIC_CH RBUF01SR: RDV01 (Bitfield-Mask: 0x01) */ +#define USIC_CH_RBUF01SR_DS0_Pos (15UL) /*!< USIC_CH RBUF01SR: DS0 (Bit 15) */ +#define USIC_CH_RBUF01SR_DS0_Msk (0x8000UL) /*!< USIC_CH RBUF01SR: DS0 (Bitfield-Mask: 0x01) */ +#define USIC_CH_RBUF01SR_WLEN1_Pos (16UL) /*!< USIC_CH RBUF01SR: WLEN1 (Bit 16) */ +#define USIC_CH_RBUF01SR_WLEN1_Msk (0xf0000UL) /*!< USIC_CH RBUF01SR: WLEN1 (Bitfield-Mask: 0x0f) */ +#define USIC_CH_RBUF01SR_SOF1_Pos (22UL) /*!< USIC_CH RBUF01SR: SOF1 (Bit 22) */ +#define USIC_CH_RBUF01SR_SOF1_Msk (0x400000UL) /*!< USIC_CH RBUF01SR: SOF1 (Bitfield-Mask: 0x01) */ +#define USIC_CH_RBUF01SR_PAR1_Pos (24UL) /*!< USIC_CH RBUF01SR: PAR1 (Bit 24) */ +#define USIC_CH_RBUF01SR_PAR1_Msk (0x1000000UL) /*!< USIC_CH RBUF01SR: PAR1 (Bitfield-Mask: 0x01) */ +#define USIC_CH_RBUF01SR_PERR1_Pos (25UL) /*!< USIC_CH RBUF01SR: PERR1 (Bit 25) */ +#define USIC_CH_RBUF01SR_PERR1_Msk (0x2000000UL) /*!< USIC_CH RBUF01SR: PERR1 (Bitfield-Mask: 0x01) */ +#define USIC_CH_RBUF01SR_RDV10_Pos (29UL) /*!< USIC_CH RBUF01SR: RDV10 (Bit 29) */ +#define USIC_CH_RBUF01SR_RDV10_Msk (0x20000000UL) /*!< USIC_CH RBUF01SR: RDV10 (Bitfield-Mask: 0x01) */ +#define USIC_CH_RBUF01SR_RDV11_Pos (30UL) /*!< USIC_CH RBUF01SR: RDV11 (Bit 30) */ +#define USIC_CH_RBUF01SR_RDV11_Msk (0x40000000UL) /*!< USIC_CH RBUF01SR: RDV11 (Bitfield-Mask: 0x01) */ +#define USIC_CH_RBUF01SR_DS1_Pos (31UL) /*!< USIC_CH RBUF01SR: DS1 (Bit 31) */ +#define USIC_CH_RBUF01SR_DS1_Msk (0x80000000UL) /*!< USIC_CH RBUF01SR: DS1 (Bitfield-Mask: 0x01) */ + +/* --------------------------------- USIC_CH_FMR -------------------------------- */ +#define USIC_CH_FMR_MTDV_Pos (0UL) /*!< USIC_CH FMR: MTDV (Bit 0) */ +#define USIC_CH_FMR_MTDV_Msk (0x3UL) /*!< USIC_CH FMR: MTDV (Bitfield-Mask: 0x03) */ +#define USIC_CH_FMR_ATVC_Pos (4UL) /*!< USIC_CH FMR: ATVC (Bit 4) */ +#define USIC_CH_FMR_ATVC_Msk (0x10UL) /*!< USIC_CH FMR: ATVC (Bitfield-Mask: 0x01) */ +#define USIC_CH_FMR_CRDV0_Pos (14UL) /*!< USIC_CH FMR: CRDV0 (Bit 14) */ +#define USIC_CH_FMR_CRDV0_Msk (0x4000UL) /*!< USIC_CH FMR: CRDV0 (Bitfield-Mask: 0x01) */ +#define USIC_CH_FMR_CRDV1_Pos (15UL) /*!< USIC_CH FMR: CRDV1 (Bit 15) */ +#define USIC_CH_FMR_CRDV1_Msk (0x8000UL) /*!< USIC_CH FMR: CRDV1 (Bitfield-Mask: 0x01) */ +#define USIC_CH_FMR_SIO0_Pos (16UL) /*!< USIC_CH FMR: SIO0 (Bit 16) */ +#define USIC_CH_FMR_SIO0_Msk (0x10000UL) /*!< USIC_CH FMR: SIO0 (Bitfield-Mask: 0x01) */ +#define USIC_CH_FMR_SIO1_Pos (17UL) /*!< USIC_CH FMR: SIO1 (Bit 17) */ +#define USIC_CH_FMR_SIO1_Msk (0x20000UL) /*!< USIC_CH FMR: SIO1 (Bitfield-Mask: 0x01) */ +#define USIC_CH_FMR_SIO2_Pos (18UL) /*!< USIC_CH FMR: SIO2 (Bit 18) */ +#define USIC_CH_FMR_SIO2_Msk (0x40000UL) /*!< USIC_CH FMR: SIO2 (Bitfield-Mask: 0x01) */ +#define USIC_CH_FMR_SIO3_Pos (19UL) /*!< USIC_CH FMR: SIO3 (Bit 19) */ +#define USIC_CH_FMR_SIO3_Msk (0x80000UL) /*!< USIC_CH FMR: SIO3 (Bitfield-Mask: 0x01) */ +#define USIC_CH_FMR_SIO4_Pos (20UL) /*!< USIC_CH FMR: SIO4 (Bit 20) */ +#define USIC_CH_FMR_SIO4_Msk (0x100000UL) /*!< USIC_CH FMR: SIO4 (Bitfield-Mask: 0x01) */ +#define USIC_CH_FMR_SIO5_Pos (21UL) /*!< USIC_CH FMR: SIO5 (Bit 21) */ +#define USIC_CH_FMR_SIO5_Msk (0x200000UL) /*!< USIC_CH FMR: SIO5 (Bitfield-Mask: 0x01) */ + +/* -------------------------------- USIC_CH_TBUF -------------------------------- */ +#define USIC_CH_TBUF_TDATA_Pos (0UL) /*!< USIC_CH TBUF: TDATA (Bit 0) */ +#define USIC_CH_TBUF_TDATA_Msk (0xffffUL) /*!< USIC_CH TBUF: TDATA (Bitfield-Mask: 0xffff) */ + +/* --------------------------------- USIC_CH_BYP -------------------------------- */ +#define USIC_CH_BYP_BDATA_Pos (0UL) /*!< USIC_CH BYP: BDATA (Bit 0) */ +#define USIC_CH_BYP_BDATA_Msk (0xffffUL) /*!< USIC_CH BYP: BDATA (Bitfield-Mask: 0xffff) */ + +/* -------------------------------- USIC_CH_BYPCR ------------------------------- */ +#define USIC_CH_BYPCR_BWLE_Pos (0UL) /*!< USIC_CH BYPCR: BWLE (Bit 0) */ +#define USIC_CH_BYPCR_BWLE_Msk (0xfUL) /*!< USIC_CH BYPCR: BWLE (Bitfield-Mask: 0x0f) */ +#define USIC_CH_BYPCR_BDSSM_Pos (8UL) /*!< USIC_CH BYPCR: BDSSM (Bit 8) */ +#define USIC_CH_BYPCR_BDSSM_Msk (0x100UL) /*!< USIC_CH BYPCR: BDSSM (Bitfield-Mask: 0x01) */ +#define USIC_CH_BYPCR_BDEN_Pos (10UL) /*!< USIC_CH BYPCR: BDEN (Bit 10) */ +#define USIC_CH_BYPCR_BDEN_Msk (0xc00UL) /*!< USIC_CH BYPCR: BDEN (Bitfield-Mask: 0x03) */ +#define USIC_CH_BYPCR_BDVTR_Pos (12UL) /*!< USIC_CH BYPCR: BDVTR (Bit 12) */ +#define USIC_CH_BYPCR_BDVTR_Msk (0x1000UL) /*!< USIC_CH BYPCR: BDVTR (Bitfield-Mask: 0x01) */ +#define USIC_CH_BYPCR_BPRIO_Pos (13UL) /*!< USIC_CH BYPCR: BPRIO (Bit 13) */ +#define USIC_CH_BYPCR_BPRIO_Msk (0x2000UL) /*!< USIC_CH BYPCR: BPRIO (Bitfield-Mask: 0x01) */ +#define USIC_CH_BYPCR_BDV_Pos (15UL) /*!< USIC_CH BYPCR: BDV (Bit 15) */ +#define USIC_CH_BYPCR_BDV_Msk (0x8000UL) /*!< USIC_CH BYPCR: BDV (Bitfield-Mask: 0x01) */ +#define USIC_CH_BYPCR_BSELO_Pos (16UL) /*!< USIC_CH BYPCR: BSELO (Bit 16) */ +#define USIC_CH_BYPCR_BSELO_Msk (0x1f0000UL) /*!< USIC_CH BYPCR: BSELO (Bitfield-Mask: 0x1f) */ +#define USIC_CH_BYPCR_BHPC_Pos (21UL) /*!< USIC_CH BYPCR: BHPC (Bit 21) */ +#define USIC_CH_BYPCR_BHPC_Msk (0xe00000UL) /*!< USIC_CH BYPCR: BHPC (Bitfield-Mask: 0x07) */ + +/* -------------------------------- USIC_CH_TBCTR ------------------------------- */ +#define USIC_CH_TBCTR_DPTR_Pos (0UL) /*!< USIC_CH TBCTR: DPTR (Bit 0) */ +#define USIC_CH_TBCTR_DPTR_Msk (0x3fUL) /*!< USIC_CH TBCTR: DPTR (Bitfield-Mask: 0x3f) */ +#define USIC_CH_TBCTR_LIMIT_Pos (8UL) /*!< USIC_CH TBCTR: LIMIT (Bit 8) */ +#define USIC_CH_TBCTR_LIMIT_Msk (0x3f00UL) /*!< USIC_CH TBCTR: LIMIT (Bitfield-Mask: 0x3f) */ +#define USIC_CH_TBCTR_STBTM_Pos (14UL) /*!< USIC_CH TBCTR: STBTM (Bit 14) */ +#define USIC_CH_TBCTR_STBTM_Msk (0x4000UL) /*!< USIC_CH TBCTR: STBTM (Bitfield-Mask: 0x01) */ +#define USIC_CH_TBCTR_STBTEN_Pos (15UL) /*!< USIC_CH TBCTR: STBTEN (Bit 15) */ +#define USIC_CH_TBCTR_STBTEN_Msk (0x8000UL) /*!< USIC_CH TBCTR: STBTEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_TBCTR_STBINP_Pos (16UL) /*!< USIC_CH TBCTR: STBINP (Bit 16) */ +#define USIC_CH_TBCTR_STBINP_Msk (0x70000UL) /*!< USIC_CH TBCTR: STBINP (Bitfield-Mask: 0x07) */ +#define USIC_CH_TBCTR_ATBINP_Pos (19UL) /*!< USIC_CH TBCTR: ATBINP (Bit 19) */ +#define USIC_CH_TBCTR_ATBINP_Msk (0x380000UL) /*!< USIC_CH TBCTR: ATBINP (Bitfield-Mask: 0x07) */ +#define USIC_CH_TBCTR_SIZE_Pos (24UL) /*!< USIC_CH TBCTR: SIZE (Bit 24) */ +#define USIC_CH_TBCTR_SIZE_Msk (0x7000000UL) /*!< USIC_CH TBCTR: SIZE (Bitfield-Mask: 0x07) */ +#define USIC_CH_TBCTR_LOF_Pos (28UL) /*!< USIC_CH TBCTR: LOF (Bit 28) */ +#define USIC_CH_TBCTR_LOF_Msk (0x10000000UL) /*!< USIC_CH TBCTR: LOF (Bitfield-Mask: 0x01) */ +#define USIC_CH_TBCTR_STBIEN_Pos (30UL) /*!< USIC_CH TBCTR: STBIEN (Bit 30) */ +#define USIC_CH_TBCTR_STBIEN_Msk (0x40000000UL) /*!< USIC_CH TBCTR: STBIEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_TBCTR_TBERIEN_Pos (31UL) /*!< USIC_CH TBCTR: TBERIEN (Bit 31) */ +#define USIC_CH_TBCTR_TBERIEN_Msk (0x80000000UL) /*!< USIC_CH TBCTR: TBERIEN (Bitfield-Mask: 0x01) */ + +/* -------------------------------- USIC_CH_RBCTR ------------------------------- */ +#define USIC_CH_RBCTR_DPTR_Pos (0UL) /*!< USIC_CH RBCTR: DPTR (Bit 0) */ +#define USIC_CH_RBCTR_DPTR_Msk (0x3fUL) /*!< USIC_CH RBCTR: DPTR (Bitfield-Mask: 0x3f) */ +#define USIC_CH_RBCTR_LIMIT_Pos (8UL) /*!< USIC_CH RBCTR: LIMIT (Bit 8) */ +#define USIC_CH_RBCTR_LIMIT_Msk (0x3f00UL) /*!< USIC_CH RBCTR: LIMIT (Bitfield-Mask: 0x3f) */ +#define USIC_CH_RBCTR_SRBTM_Pos (14UL) /*!< USIC_CH RBCTR: SRBTM (Bit 14) */ +#define USIC_CH_RBCTR_SRBTM_Msk (0x4000UL) /*!< USIC_CH RBCTR: SRBTM (Bitfield-Mask: 0x01) */ +#define USIC_CH_RBCTR_SRBTEN_Pos (15UL) /*!< USIC_CH RBCTR: SRBTEN (Bit 15) */ +#define USIC_CH_RBCTR_SRBTEN_Msk (0x8000UL) /*!< USIC_CH RBCTR: SRBTEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_RBCTR_SRBINP_Pos (16UL) /*!< USIC_CH RBCTR: SRBINP (Bit 16) */ +#define USIC_CH_RBCTR_SRBINP_Msk (0x70000UL) /*!< USIC_CH RBCTR: SRBINP (Bitfield-Mask: 0x07) */ +#define USIC_CH_RBCTR_ARBINP_Pos (19UL) /*!< USIC_CH RBCTR: ARBINP (Bit 19) */ +#define USIC_CH_RBCTR_ARBINP_Msk (0x380000UL) /*!< USIC_CH RBCTR: ARBINP (Bitfield-Mask: 0x07) */ +#define USIC_CH_RBCTR_RCIM_Pos (22UL) /*!< USIC_CH RBCTR: RCIM (Bit 22) */ +#define USIC_CH_RBCTR_RCIM_Msk (0xc00000UL) /*!< USIC_CH RBCTR: RCIM (Bitfield-Mask: 0x03) */ +#define USIC_CH_RBCTR_SIZE_Pos (24UL) /*!< USIC_CH RBCTR: SIZE (Bit 24) */ +#define USIC_CH_RBCTR_SIZE_Msk (0x7000000UL) /*!< USIC_CH RBCTR: SIZE (Bitfield-Mask: 0x07) */ +#define USIC_CH_RBCTR_RNM_Pos (27UL) /*!< USIC_CH RBCTR: RNM (Bit 27) */ +#define USIC_CH_RBCTR_RNM_Msk (0x8000000UL) /*!< USIC_CH RBCTR: RNM (Bitfield-Mask: 0x01) */ +#define USIC_CH_RBCTR_LOF_Pos (28UL) /*!< USIC_CH RBCTR: LOF (Bit 28) */ +#define USIC_CH_RBCTR_LOF_Msk (0x10000000UL) /*!< USIC_CH RBCTR: LOF (Bitfield-Mask: 0x01) */ +#define USIC_CH_RBCTR_ARBIEN_Pos (29UL) /*!< USIC_CH RBCTR: ARBIEN (Bit 29) */ +#define USIC_CH_RBCTR_ARBIEN_Msk (0x20000000UL) /*!< USIC_CH RBCTR: ARBIEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_RBCTR_SRBIEN_Pos (30UL) /*!< USIC_CH RBCTR: SRBIEN (Bit 30) */ +#define USIC_CH_RBCTR_SRBIEN_Msk (0x40000000UL) /*!< USIC_CH RBCTR: SRBIEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_RBCTR_RBERIEN_Pos (31UL) /*!< USIC_CH RBCTR: RBERIEN (Bit 31) */ +#define USIC_CH_RBCTR_RBERIEN_Msk (0x80000000UL) /*!< USIC_CH RBCTR: RBERIEN (Bitfield-Mask: 0x01) */ + +/* ------------------------------- USIC_CH_TRBPTR ------------------------------- */ +#define USIC_CH_TRBPTR_TDIPTR_Pos (0UL) /*!< USIC_CH TRBPTR: TDIPTR (Bit 0) */ +#define USIC_CH_TRBPTR_TDIPTR_Msk (0x3fUL) /*!< USIC_CH TRBPTR: TDIPTR (Bitfield-Mask: 0x3f) */ +#define USIC_CH_TRBPTR_TDOPTR_Pos (8UL) /*!< USIC_CH TRBPTR: TDOPTR (Bit 8) */ +#define USIC_CH_TRBPTR_TDOPTR_Msk (0x3f00UL) /*!< USIC_CH TRBPTR: TDOPTR (Bitfield-Mask: 0x3f) */ +#define USIC_CH_TRBPTR_RDIPTR_Pos (16UL) /*!< USIC_CH TRBPTR: RDIPTR (Bit 16) */ +#define USIC_CH_TRBPTR_RDIPTR_Msk (0x3f0000UL) /*!< USIC_CH TRBPTR: RDIPTR (Bitfield-Mask: 0x3f) */ +#define USIC_CH_TRBPTR_RDOPTR_Pos (24UL) /*!< USIC_CH TRBPTR: RDOPTR (Bit 24) */ +#define USIC_CH_TRBPTR_RDOPTR_Msk (0x3f000000UL) /*!< USIC_CH TRBPTR: RDOPTR (Bitfield-Mask: 0x3f) */ + +/* -------------------------------- USIC_CH_TRBSR ------------------------------- */ +#define USIC_CH_TRBSR_SRBI_Pos (0UL) /*!< USIC_CH TRBSR: SRBI (Bit 0) */ +#define USIC_CH_TRBSR_SRBI_Msk (0x1UL) /*!< USIC_CH TRBSR: SRBI (Bitfield-Mask: 0x01) */ +#define USIC_CH_TRBSR_RBERI_Pos (1UL) /*!< USIC_CH TRBSR: RBERI (Bit 1) */ +#define USIC_CH_TRBSR_RBERI_Msk (0x2UL) /*!< USIC_CH TRBSR: RBERI (Bitfield-Mask: 0x01) */ +#define USIC_CH_TRBSR_ARBI_Pos (2UL) /*!< USIC_CH TRBSR: ARBI (Bit 2) */ +#define USIC_CH_TRBSR_ARBI_Msk (0x4UL) /*!< USIC_CH TRBSR: ARBI (Bitfield-Mask: 0x01) */ +#define USIC_CH_TRBSR_REMPTY_Pos (3UL) /*!< USIC_CH TRBSR: REMPTY (Bit 3) */ +#define USIC_CH_TRBSR_REMPTY_Msk (0x8UL) /*!< USIC_CH TRBSR: REMPTY (Bitfield-Mask: 0x01) */ +#define USIC_CH_TRBSR_RFULL_Pos (4UL) /*!< USIC_CH TRBSR: RFULL (Bit 4) */ +#define USIC_CH_TRBSR_RFULL_Msk (0x10UL) /*!< USIC_CH TRBSR: RFULL (Bitfield-Mask: 0x01) */ +#define USIC_CH_TRBSR_RBUS_Pos (5UL) /*!< USIC_CH TRBSR: RBUS (Bit 5) */ +#define USIC_CH_TRBSR_RBUS_Msk (0x20UL) /*!< USIC_CH TRBSR: RBUS (Bitfield-Mask: 0x01) */ +#define USIC_CH_TRBSR_SRBT_Pos (6UL) /*!< USIC_CH TRBSR: SRBT (Bit 6) */ +#define USIC_CH_TRBSR_SRBT_Msk (0x40UL) /*!< USIC_CH TRBSR: SRBT (Bitfield-Mask: 0x01) */ +#define USIC_CH_TRBSR_STBI_Pos (8UL) /*!< USIC_CH TRBSR: STBI (Bit 8) */ +#define USIC_CH_TRBSR_STBI_Msk (0x100UL) /*!< USIC_CH TRBSR: STBI (Bitfield-Mask: 0x01) */ +#define USIC_CH_TRBSR_TBERI_Pos (9UL) /*!< USIC_CH TRBSR: TBERI (Bit 9) */ +#define USIC_CH_TRBSR_TBERI_Msk (0x200UL) /*!< USIC_CH TRBSR: TBERI (Bitfield-Mask: 0x01) */ +#define USIC_CH_TRBSR_TEMPTY_Pos (11UL) /*!< USIC_CH TRBSR: TEMPTY (Bit 11) */ +#define USIC_CH_TRBSR_TEMPTY_Msk (0x800UL) /*!< USIC_CH TRBSR: TEMPTY (Bitfield-Mask: 0x01) */ +#define USIC_CH_TRBSR_TFULL_Pos (12UL) /*!< USIC_CH TRBSR: TFULL (Bit 12) */ +#define USIC_CH_TRBSR_TFULL_Msk (0x1000UL) /*!< USIC_CH TRBSR: TFULL (Bitfield-Mask: 0x01) */ +#define USIC_CH_TRBSR_TBUS_Pos (13UL) /*!< USIC_CH TRBSR: TBUS (Bit 13) */ +#define USIC_CH_TRBSR_TBUS_Msk (0x2000UL) /*!< USIC_CH TRBSR: TBUS (Bitfield-Mask: 0x01) */ +#define USIC_CH_TRBSR_STBT_Pos (14UL) /*!< USIC_CH TRBSR: STBT (Bit 14) */ +#define USIC_CH_TRBSR_STBT_Msk (0x4000UL) /*!< USIC_CH TRBSR: STBT (Bitfield-Mask: 0x01) */ +#define USIC_CH_TRBSR_RBFLVL_Pos (16UL) /*!< USIC_CH TRBSR: RBFLVL (Bit 16) */ +#define USIC_CH_TRBSR_RBFLVL_Msk (0x7f0000UL) /*!< USIC_CH TRBSR: RBFLVL (Bitfield-Mask: 0x7f) */ +#define USIC_CH_TRBSR_TBFLVL_Pos (24UL) /*!< USIC_CH TRBSR: TBFLVL (Bit 24) */ +#define USIC_CH_TRBSR_TBFLVL_Msk (0x7f000000UL) /*!< USIC_CH TRBSR: TBFLVL (Bitfield-Mask: 0x7f) */ + +/* ------------------------------- USIC_CH_TRBSCR ------------------------------- */ +#define USIC_CH_TRBSCR_CSRBI_Pos (0UL) /*!< USIC_CH TRBSCR: CSRBI (Bit 0) */ +#define USIC_CH_TRBSCR_CSRBI_Msk (0x1UL) /*!< USIC_CH TRBSCR: CSRBI (Bitfield-Mask: 0x01) */ +#define USIC_CH_TRBSCR_CRBERI_Pos (1UL) /*!< USIC_CH TRBSCR: CRBERI (Bit 1) */ +#define USIC_CH_TRBSCR_CRBERI_Msk (0x2UL) /*!< USIC_CH TRBSCR: CRBERI (Bitfield-Mask: 0x01) */ +#define USIC_CH_TRBSCR_CARBI_Pos (2UL) /*!< USIC_CH TRBSCR: CARBI (Bit 2) */ +#define USIC_CH_TRBSCR_CARBI_Msk (0x4UL) /*!< USIC_CH TRBSCR: CARBI (Bitfield-Mask: 0x01) */ +#define USIC_CH_TRBSCR_CSTBI_Pos (8UL) /*!< USIC_CH TRBSCR: CSTBI (Bit 8) */ +#define USIC_CH_TRBSCR_CSTBI_Msk (0x100UL) /*!< USIC_CH TRBSCR: CSTBI (Bitfield-Mask: 0x01) */ +#define USIC_CH_TRBSCR_CTBERI_Pos (9UL) /*!< USIC_CH TRBSCR: CTBERI (Bit 9) */ +#define USIC_CH_TRBSCR_CTBERI_Msk (0x200UL) /*!< USIC_CH TRBSCR: CTBERI (Bitfield-Mask: 0x01) */ +#define USIC_CH_TRBSCR_CBDV_Pos (10UL) /*!< USIC_CH TRBSCR: CBDV (Bit 10) */ +#define USIC_CH_TRBSCR_CBDV_Msk (0x400UL) /*!< USIC_CH TRBSCR: CBDV (Bitfield-Mask: 0x01) */ +#define USIC_CH_TRBSCR_FLUSHRB_Pos (14UL) /*!< USIC_CH TRBSCR: FLUSHRB (Bit 14) */ +#define USIC_CH_TRBSCR_FLUSHRB_Msk (0x4000UL) /*!< USIC_CH TRBSCR: FLUSHRB (Bitfield-Mask: 0x01) */ +#define USIC_CH_TRBSCR_FLUSHTB_Pos (15UL) /*!< USIC_CH TRBSCR: FLUSHTB (Bit 15) */ +#define USIC_CH_TRBSCR_FLUSHTB_Msk (0x8000UL) /*!< USIC_CH TRBSCR: FLUSHTB (Bitfield-Mask: 0x01) */ + +/* -------------------------------- USIC_CH_OUTR -------------------------------- */ +#define USIC_CH_OUTR_DSR_Pos (0UL) /*!< USIC_CH OUTR: DSR (Bit 0) */ +#define USIC_CH_OUTR_DSR_Msk (0xffffUL) /*!< USIC_CH OUTR: DSR (Bitfield-Mask: 0xffff) */ +#define USIC_CH_OUTR_RCI_Pos (16UL) /*!< USIC_CH OUTR: RCI (Bit 16) */ +#define USIC_CH_OUTR_RCI_Msk (0x1f0000UL) /*!< USIC_CH OUTR: RCI (Bitfield-Mask: 0x1f) */ + +/* -------------------------------- USIC_CH_OUTDR ------------------------------- */ +#define USIC_CH_OUTDR_DSR_Pos (0UL) /*!< USIC_CH OUTDR: DSR (Bit 0) */ +#define USIC_CH_OUTDR_DSR_Msk (0xffffUL) /*!< USIC_CH OUTDR: DSR (Bitfield-Mask: 0xffff) */ +#define USIC_CH_OUTDR_RCI_Pos (16UL) /*!< USIC_CH OUTDR: RCI (Bit 16) */ +#define USIC_CH_OUTDR_RCI_Msk (0x1f0000UL) /*!< USIC_CH OUTDR: RCI (Bitfield-Mask: 0x1f) */ + +/* --------------------------------- USIC_CH_IN --------------------------------- */ +#define USIC_CH_IN_TDATA_Pos (0UL) /*!< USIC_CH IN: TDATA (Bit 0) */ +#define USIC_CH_IN_TDATA_Msk (0xffffUL) /*!< USIC_CH IN: TDATA (Bitfield-Mask: 0xffff) */ + + +/* ================================================================================ */ +/* ================ struct 'CAN' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ----------------------------------- CAN_CLC ---------------------------------- */ +#define CAN_CLC_DISR_Pos (0UL) /*!< CAN CLC: DISR (Bit 0) */ +#define CAN_CLC_DISR_Msk (0x1UL) /*!< CAN CLC: DISR (Bitfield-Mask: 0x01) */ +#define CAN_CLC_DISS_Pos (1UL) /*!< CAN CLC: DISS (Bit 1) */ +#define CAN_CLC_DISS_Msk (0x2UL) /*!< CAN CLC: DISS (Bitfield-Mask: 0x01) */ +#define CAN_CLC_EDIS_Pos (3UL) /*!< CAN CLC: EDIS (Bit 3) */ +#define CAN_CLC_EDIS_Msk (0x8UL) /*!< CAN CLC: EDIS (Bitfield-Mask: 0x01) */ +#define CAN_CLC_SBWE_Pos (4UL) /*!< CAN CLC: SBWE (Bit 4) */ +#define CAN_CLC_SBWE_Msk (0x10UL) /*!< CAN CLC: SBWE (Bitfield-Mask: 0x01) */ + +/* ----------------------------------- CAN_ID ----------------------------------- */ +#define CAN_ID_MOD_REV_Pos (0UL) /*!< CAN ID: MOD_REV (Bit 0) */ +#define CAN_ID_MOD_REV_Msk (0xffUL) /*!< CAN ID: MOD_REV (Bitfield-Mask: 0xff) */ +#define CAN_ID_MOD_TYPE_Pos (8UL) /*!< CAN ID: MOD_TYPE (Bit 8) */ +#define CAN_ID_MOD_TYPE_Msk (0xff00UL) /*!< CAN ID: MOD_TYPE (Bitfield-Mask: 0xff) */ +#define CAN_ID_MOD_NUMBER_Pos (16UL) /*!< CAN ID: MOD_NUMBER (Bit 16) */ +#define CAN_ID_MOD_NUMBER_Msk (0xffff0000UL) /*!< CAN ID: MOD_NUMBER (Bitfield-Mask: 0xffff) */ + +/* ----------------------------------- CAN_FDR ---------------------------------- */ +#define CAN_FDR_STEP_Pos (0UL) /*!< CAN FDR: STEP (Bit 0) */ +#define CAN_FDR_STEP_Msk (0x3ffUL) /*!< CAN FDR: STEP (Bitfield-Mask: 0x3ff) */ +#define CAN_FDR_SM_Pos (11UL) /*!< CAN FDR: SM (Bit 11) */ +#define CAN_FDR_SM_Msk (0x800UL) /*!< CAN FDR: SM (Bitfield-Mask: 0x01) */ +#define CAN_FDR_SC_Pos (12UL) /*!< CAN FDR: SC (Bit 12) */ +#define CAN_FDR_SC_Msk (0x3000UL) /*!< CAN FDR: SC (Bitfield-Mask: 0x03) */ +#define CAN_FDR_DM_Pos (14UL) /*!< CAN FDR: DM (Bit 14) */ +#define CAN_FDR_DM_Msk (0xc000UL) /*!< CAN FDR: DM (Bitfield-Mask: 0x03) */ +#define CAN_FDR_RESULT_Pos (16UL) /*!< CAN FDR: RESULT (Bit 16) */ +#define CAN_FDR_RESULT_Msk (0x3ff0000UL) /*!< CAN FDR: RESULT (Bitfield-Mask: 0x3ff) */ +#define CAN_FDR_SUSACK_Pos (28UL) /*!< CAN FDR: SUSACK (Bit 28) */ +#define CAN_FDR_SUSACK_Msk (0x10000000UL) /*!< CAN FDR: SUSACK (Bitfield-Mask: 0x01) */ +#define CAN_FDR_SUSREQ_Pos (29UL) /*!< CAN FDR: SUSREQ (Bit 29) */ +#define CAN_FDR_SUSREQ_Msk (0x20000000UL) /*!< CAN FDR: SUSREQ (Bitfield-Mask: 0x01) */ +#define CAN_FDR_ENHW_Pos (30UL) /*!< CAN FDR: ENHW (Bit 30) */ +#define CAN_FDR_ENHW_Msk (0x40000000UL) /*!< CAN FDR: ENHW (Bitfield-Mask: 0x01) */ +#define CAN_FDR_DISCLK_Pos (31UL) /*!< CAN FDR: DISCLK (Bit 31) */ +#define CAN_FDR_DISCLK_Msk (0x80000000UL) /*!< CAN FDR: DISCLK (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- CAN_LIST ---------------------------------- */ +#define CAN_LIST_BEGIN_Pos (0UL) /*!< CAN LIST: BEGIN (Bit 0) */ +#define CAN_LIST_BEGIN_Msk (0xffUL) /*!< CAN LIST: BEGIN (Bitfield-Mask: 0xff) */ +#define CAN_LIST_END_Pos (8UL) /*!< CAN LIST: END (Bit 8) */ +#define CAN_LIST_END_Msk (0xff00UL) /*!< CAN LIST: END (Bitfield-Mask: 0xff) */ +#define CAN_LIST_SIZE_Pos (16UL) /*!< CAN LIST: SIZE (Bit 16) */ +#define CAN_LIST_SIZE_Msk (0xff0000UL) /*!< CAN LIST: SIZE (Bitfield-Mask: 0xff) */ +#define CAN_LIST_EMPTY_Pos (24UL) /*!< CAN LIST: EMPTY (Bit 24) */ +#define CAN_LIST_EMPTY_Msk (0x1000000UL) /*!< CAN LIST: EMPTY (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- CAN_MSPND --------------------------------- */ +#define CAN_MSPND_PND_Pos (0UL) /*!< CAN MSPND: PND (Bit 0) */ +#define CAN_MSPND_PND_Msk (0xffffffffUL) /*!< CAN MSPND: PND (Bitfield-Mask: 0xffffffff) */ + +/* ---------------------------------- CAN_MSID ---------------------------------- */ +#define CAN_MSID_INDEX_Pos (0UL) /*!< CAN MSID: INDEX (Bit 0) */ +#define CAN_MSID_INDEX_Msk (0x3fUL) /*!< CAN MSID: INDEX (Bitfield-Mask: 0x3f) */ + +/* --------------------------------- CAN_MSIMASK -------------------------------- */ +#define CAN_MSIMASK_IM_Pos (0UL) /*!< CAN MSIMASK: IM (Bit 0) */ +#define CAN_MSIMASK_IM_Msk (0xffffffffUL) /*!< CAN MSIMASK: IM (Bitfield-Mask: 0xffffffff) */ + +/* --------------------------------- CAN_PANCTR --------------------------------- */ +#define CAN_PANCTR_PANCMD_Pos (0UL) /*!< CAN PANCTR: PANCMD (Bit 0) */ +#define CAN_PANCTR_PANCMD_Msk (0xffUL) /*!< CAN PANCTR: PANCMD (Bitfield-Mask: 0xff) */ +#define CAN_PANCTR_BUSY_Pos (8UL) /*!< CAN PANCTR: BUSY (Bit 8) */ +#define CAN_PANCTR_BUSY_Msk (0x100UL) /*!< CAN PANCTR: BUSY (Bitfield-Mask: 0x01) */ +#define CAN_PANCTR_RBUSY_Pos (9UL) /*!< CAN PANCTR: RBUSY (Bit 9) */ +#define CAN_PANCTR_RBUSY_Msk (0x200UL) /*!< CAN PANCTR: RBUSY (Bitfield-Mask: 0x01) */ +#define CAN_PANCTR_PANAR1_Pos (16UL) /*!< CAN PANCTR: PANAR1 (Bit 16) */ +#define CAN_PANCTR_PANAR1_Msk (0xff0000UL) /*!< CAN PANCTR: PANAR1 (Bitfield-Mask: 0xff) */ +#define CAN_PANCTR_PANAR2_Pos (24UL) /*!< CAN PANCTR: PANAR2 (Bit 24) */ +#define CAN_PANCTR_PANAR2_Msk (0xff000000UL) /*!< CAN PANCTR: PANAR2 (Bitfield-Mask: 0xff) */ + +/* ----------------------------------- CAN_MCR ---------------------------------- */ +#define CAN_MCR_MPSEL_Pos (12UL) /*!< CAN MCR: MPSEL (Bit 12) */ +#define CAN_MCR_MPSEL_Msk (0xf000UL) /*!< CAN MCR: MPSEL (Bitfield-Mask: 0x0f) */ + +/* ---------------------------------- CAN_MITR ---------------------------------- */ +#define CAN_MITR_IT_Pos (0UL) /*!< CAN MITR: IT (Bit 0) */ +#define CAN_MITR_IT_Msk (0xffUL) /*!< CAN MITR: IT (Bitfield-Mask: 0xff) */ + + +/* ================================================================================ */ +/* ================ Group 'CAN_NODE' Position & Mask ================ */ +/* ================================================================================ */ + + +/* -------------------------------- CAN_NODE_NCR -------------------------------- */ +#define CAN_NODE_NCR_INIT_Pos (0UL) /*!< CAN_NODE NCR: INIT (Bit 0) */ +#define CAN_NODE_NCR_INIT_Msk (0x1UL) /*!< CAN_NODE NCR: INIT (Bitfield-Mask: 0x01) */ +#define CAN_NODE_NCR_TRIE_Pos (1UL) /*!< CAN_NODE NCR: TRIE (Bit 1) */ +#define CAN_NODE_NCR_TRIE_Msk (0x2UL) /*!< CAN_NODE NCR: TRIE (Bitfield-Mask: 0x01) */ +#define CAN_NODE_NCR_LECIE_Pos (2UL) /*!< CAN_NODE NCR: LECIE (Bit 2) */ +#define CAN_NODE_NCR_LECIE_Msk (0x4UL) /*!< CAN_NODE NCR: LECIE (Bitfield-Mask: 0x01) */ +#define CAN_NODE_NCR_ALIE_Pos (3UL) /*!< CAN_NODE NCR: ALIE (Bit 3) */ +#define CAN_NODE_NCR_ALIE_Msk (0x8UL) /*!< CAN_NODE NCR: ALIE (Bitfield-Mask: 0x01) */ +#define CAN_NODE_NCR_CANDIS_Pos (4UL) /*!< CAN_NODE NCR: CANDIS (Bit 4) */ +#define CAN_NODE_NCR_CANDIS_Msk (0x10UL) /*!< CAN_NODE NCR: CANDIS (Bitfield-Mask: 0x01) */ +#define CAN_NODE_NCR_CCE_Pos (6UL) /*!< CAN_NODE NCR: CCE (Bit 6) */ +#define CAN_NODE_NCR_CCE_Msk (0x40UL) /*!< CAN_NODE NCR: CCE (Bitfield-Mask: 0x01) */ +#define CAN_NODE_NCR_CALM_Pos (7UL) /*!< CAN_NODE NCR: CALM (Bit 7) */ +#define CAN_NODE_NCR_CALM_Msk (0x80UL) /*!< CAN_NODE NCR: CALM (Bitfield-Mask: 0x01) */ +#define CAN_NODE_NCR_SUSEN_Pos (8UL) /*!< CAN_NODE NCR: SUSEN (Bit 8) */ +#define CAN_NODE_NCR_SUSEN_Msk (0x100UL) /*!< CAN_NODE NCR: SUSEN (Bitfield-Mask: 0x01) */ + +/* -------------------------------- CAN_NODE_NSR -------------------------------- */ +#define CAN_NODE_NSR_LEC_Pos (0UL) /*!< CAN_NODE NSR: LEC (Bit 0) */ +#define CAN_NODE_NSR_LEC_Msk (0x7UL) /*!< CAN_NODE NSR: LEC (Bitfield-Mask: 0x07) */ +#define CAN_NODE_NSR_TXOK_Pos (3UL) /*!< CAN_NODE NSR: TXOK (Bit 3) */ +#define CAN_NODE_NSR_TXOK_Msk (0x8UL) /*!< CAN_NODE NSR: TXOK (Bitfield-Mask: 0x01) */ +#define CAN_NODE_NSR_RXOK_Pos (4UL) /*!< CAN_NODE NSR: RXOK (Bit 4) */ +#define CAN_NODE_NSR_RXOK_Msk (0x10UL) /*!< CAN_NODE NSR: RXOK (Bitfield-Mask: 0x01) */ +#define CAN_NODE_NSR_ALERT_Pos (5UL) /*!< CAN_NODE NSR: ALERT (Bit 5) */ +#define CAN_NODE_NSR_ALERT_Msk (0x20UL) /*!< CAN_NODE NSR: ALERT (Bitfield-Mask: 0x01) */ +#define CAN_NODE_NSR_EWRN_Pos (6UL) /*!< CAN_NODE NSR: EWRN (Bit 6) */ +#define CAN_NODE_NSR_EWRN_Msk (0x40UL) /*!< CAN_NODE NSR: EWRN (Bitfield-Mask: 0x01) */ +#define CAN_NODE_NSR_BOFF_Pos (7UL) /*!< CAN_NODE NSR: BOFF (Bit 7) */ +#define CAN_NODE_NSR_BOFF_Msk (0x80UL) /*!< CAN_NODE NSR: BOFF (Bitfield-Mask: 0x01) */ +#define CAN_NODE_NSR_LLE_Pos (8UL) /*!< CAN_NODE NSR: LLE (Bit 8) */ +#define CAN_NODE_NSR_LLE_Msk (0x100UL) /*!< CAN_NODE NSR: LLE (Bitfield-Mask: 0x01) */ +#define CAN_NODE_NSR_LOE_Pos (9UL) /*!< CAN_NODE NSR: LOE (Bit 9) */ +#define CAN_NODE_NSR_LOE_Msk (0x200UL) /*!< CAN_NODE NSR: LOE (Bitfield-Mask: 0x01) */ +#define CAN_NODE_NSR_SUSACK_Pos (10UL) /*!< CAN_NODE NSR: SUSACK (Bit 10) */ +#define CAN_NODE_NSR_SUSACK_Msk (0x400UL) /*!< CAN_NODE NSR: SUSACK (Bitfield-Mask: 0x01) */ + +/* -------------------------------- CAN_NODE_NIPR ------------------------------- */ +#define CAN_NODE_NIPR_ALINP_Pos (0UL) /*!< CAN_NODE NIPR: ALINP (Bit 0) */ +#define CAN_NODE_NIPR_ALINP_Msk (0x7UL) /*!< CAN_NODE NIPR: ALINP (Bitfield-Mask: 0x07) */ +#define CAN_NODE_NIPR_LECINP_Pos (4UL) /*!< CAN_NODE NIPR: LECINP (Bit 4) */ +#define CAN_NODE_NIPR_LECINP_Msk (0x70UL) /*!< CAN_NODE NIPR: LECINP (Bitfield-Mask: 0x07) */ +#define CAN_NODE_NIPR_TRINP_Pos (8UL) /*!< CAN_NODE NIPR: TRINP (Bit 8) */ +#define CAN_NODE_NIPR_TRINP_Msk (0x700UL) /*!< CAN_NODE NIPR: TRINP (Bitfield-Mask: 0x07) */ +#define CAN_NODE_NIPR_CFCINP_Pos (12UL) /*!< CAN_NODE NIPR: CFCINP (Bit 12) */ +#define CAN_NODE_NIPR_CFCINP_Msk (0x7000UL) /*!< CAN_NODE NIPR: CFCINP (Bitfield-Mask: 0x07) */ + +/* -------------------------------- CAN_NODE_NPCR ------------------------------- */ +#define CAN_NODE_NPCR_RXSEL_Pos (0UL) /*!< CAN_NODE NPCR: RXSEL (Bit 0) */ +#define CAN_NODE_NPCR_RXSEL_Msk (0x7UL) /*!< CAN_NODE NPCR: RXSEL (Bitfield-Mask: 0x07) */ +#define CAN_NODE_NPCR_LBM_Pos (8UL) /*!< CAN_NODE NPCR: LBM (Bit 8) */ +#define CAN_NODE_NPCR_LBM_Msk (0x100UL) /*!< CAN_NODE NPCR: LBM (Bitfield-Mask: 0x01) */ + +/* -------------------------------- CAN_NODE_NBTR ------------------------------- */ +#define CAN_NODE_NBTR_BRP_Pos (0UL) /*!< CAN_NODE NBTR: BRP (Bit 0) */ +#define CAN_NODE_NBTR_BRP_Msk (0x3fUL) /*!< CAN_NODE NBTR: BRP (Bitfield-Mask: 0x3f) */ +#define CAN_NODE_NBTR_SJW_Pos (6UL) /*!< CAN_NODE NBTR: SJW (Bit 6) */ +#define CAN_NODE_NBTR_SJW_Msk (0xc0UL) /*!< CAN_NODE NBTR: SJW (Bitfield-Mask: 0x03) */ +#define CAN_NODE_NBTR_TSEG1_Pos (8UL) /*!< CAN_NODE NBTR: TSEG1 (Bit 8) */ +#define CAN_NODE_NBTR_TSEG1_Msk (0xf00UL) /*!< CAN_NODE NBTR: TSEG1 (Bitfield-Mask: 0x0f) */ +#define CAN_NODE_NBTR_TSEG2_Pos (12UL) /*!< CAN_NODE NBTR: TSEG2 (Bit 12) */ +#define CAN_NODE_NBTR_TSEG2_Msk (0x7000UL) /*!< CAN_NODE NBTR: TSEG2 (Bitfield-Mask: 0x07) */ +#define CAN_NODE_NBTR_DIV8_Pos (15UL) /*!< CAN_NODE NBTR: DIV8 (Bit 15) */ +#define CAN_NODE_NBTR_DIV8_Msk (0x8000UL) /*!< CAN_NODE NBTR: DIV8 (Bitfield-Mask: 0x01) */ + +/* ------------------------------- CAN_NODE_NECNT ------------------------------- */ +#define CAN_NODE_NECNT_REC_Pos (0UL) /*!< CAN_NODE NECNT: REC (Bit 0) */ +#define CAN_NODE_NECNT_REC_Msk (0xffUL) /*!< CAN_NODE NECNT: REC (Bitfield-Mask: 0xff) */ +#define CAN_NODE_NECNT_TEC_Pos (8UL) /*!< CAN_NODE NECNT: TEC (Bit 8) */ +#define CAN_NODE_NECNT_TEC_Msk (0xff00UL) /*!< CAN_NODE NECNT: TEC (Bitfield-Mask: 0xff) */ +#define CAN_NODE_NECNT_EWRNLVL_Pos (16UL) /*!< CAN_NODE NECNT: EWRNLVL (Bit 16) */ +#define CAN_NODE_NECNT_EWRNLVL_Msk (0xff0000UL) /*!< CAN_NODE NECNT: EWRNLVL (Bitfield-Mask: 0xff) */ +#define CAN_NODE_NECNT_LETD_Pos (24UL) /*!< CAN_NODE NECNT: LETD (Bit 24) */ +#define CAN_NODE_NECNT_LETD_Msk (0x1000000UL) /*!< CAN_NODE NECNT: LETD (Bitfield-Mask: 0x01) */ +#define CAN_NODE_NECNT_LEINC_Pos (25UL) /*!< CAN_NODE NECNT: LEINC (Bit 25) */ +#define CAN_NODE_NECNT_LEINC_Msk (0x2000000UL) /*!< CAN_NODE NECNT: LEINC (Bitfield-Mask: 0x01) */ + +/* -------------------------------- CAN_NODE_NFCR ------------------------------- */ +#define CAN_NODE_NFCR_CFC_Pos (0UL) /*!< CAN_NODE NFCR: CFC (Bit 0) */ +#define CAN_NODE_NFCR_CFC_Msk (0xffffUL) /*!< CAN_NODE NFCR: CFC (Bitfield-Mask: 0xffff) */ +#define CAN_NODE_NFCR_CFSEL_Pos (16UL) /*!< CAN_NODE NFCR: CFSEL (Bit 16) */ +#define CAN_NODE_NFCR_CFSEL_Msk (0x70000UL) /*!< CAN_NODE NFCR: CFSEL (Bitfield-Mask: 0x07) */ +#define CAN_NODE_NFCR_CFMOD_Pos (19UL) /*!< CAN_NODE NFCR: CFMOD (Bit 19) */ +#define CAN_NODE_NFCR_CFMOD_Msk (0x180000UL) /*!< CAN_NODE NFCR: CFMOD (Bitfield-Mask: 0x03) */ +#define CAN_NODE_NFCR_CFCIE_Pos (22UL) /*!< CAN_NODE NFCR: CFCIE (Bit 22) */ +#define CAN_NODE_NFCR_CFCIE_Msk (0x400000UL) /*!< CAN_NODE NFCR: CFCIE (Bitfield-Mask: 0x01) */ +#define CAN_NODE_NFCR_CFCOV_Pos (23UL) /*!< CAN_NODE NFCR: CFCOV (Bit 23) */ +#define CAN_NODE_NFCR_CFCOV_Msk (0x800000UL) /*!< CAN_NODE NFCR: CFCOV (Bitfield-Mask: 0x01) */ + + +/* ================================================================================ */ +/* ================ Group 'CAN_MO' Position & Mask ================ */ +/* ================================================================================ */ + + +/* -------------------------------- CAN_MO_MOFCR -------------------------------- */ +#define CAN_MO_MOFCR_MMC_Pos (0UL) /*!< CAN_MO MOFCR: MMC (Bit 0) */ +#define CAN_MO_MOFCR_MMC_Msk (0xfUL) /*!< CAN_MO MOFCR: MMC (Bitfield-Mask: 0x0f) */ +#define CAN_MO_MOFCR_GDFS_Pos (8UL) /*!< CAN_MO MOFCR: GDFS (Bit 8) */ +#define CAN_MO_MOFCR_GDFS_Msk (0x100UL) /*!< CAN_MO MOFCR: GDFS (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOFCR_IDC_Pos (9UL) /*!< CAN_MO MOFCR: IDC (Bit 9) */ +#define CAN_MO_MOFCR_IDC_Msk (0x200UL) /*!< CAN_MO MOFCR: IDC (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOFCR_DLCC_Pos (10UL) /*!< CAN_MO MOFCR: DLCC (Bit 10) */ +#define CAN_MO_MOFCR_DLCC_Msk (0x400UL) /*!< CAN_MO MOFCR: DLCC (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOFCR_DATC_Pos (11UL) /*!< CAN_MO MOFCR: DATC (Bit 11) */ +#define CAN_MO_MOFCR_DATC_Msk (0x800UL) /*!< CAN_MO MOFCR: DATC (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOFCR_RXIE_Pos (16UL) /*!< CAN_MO MOFCR: RXIE (Bit 16) */ +#define CAN_MO_MOFCR_RXIE_Msk (0x10000UL) /*!< CAN_MO MOFCR: RXIE (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOFCR_TXIE_Pos (17UL) /*!< CAN_MO MOFCR: TXIE (Bit 17) */ +#define CAN_MO_MOFCR_TXIE_Msk (0x20000UL) /*!< CAN_MO MOFCR: TXIE (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOFCR_OVIE_Pos (18UL) /*!< CAN_MO MOFCR: OVIE (Bit 18) */ +#define CAN_MO_MOFCR_OVIE_Msk (0x40000UL) /*!< CAN_MO MOFCR: OVIE (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOFCR_FRREN_Pos (20UL) /*!< CAN_MO MOFCR: FRREN (Bit 20) */ +#define CAN_MO_MOFCR_FRREN_Msk (0x100000UL) /*!< CAN_MO MOFCR: FRREN (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOFCR_RMM_Pos (21UL) /*!< CAN_MO MOFCR: RMM (Bit 21) */ +#define CAN_MO_MOFCR_RMM_Msk (0x200000UL) /*!< CAN_MO MOFCR: RMM (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOFCR_SDT_Pos (22UL) /*!< CAN_MO MOFCR: SDT (Bit 22) */ +#define CAN_MO_MOFCR_SDT_Msk (0x400000UL) /*!< CAN_MO MOFCR: SDT (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOFCR_STT_Pos (23UL) /*!< CAN_MO MOFCR: STT (Bit 23) */ +#define CAN_MO_MOFCR_STT_Msk (0x800000UL) /*!< CAN_MO MOFCR: STT (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOFCR_DLC_Pos (24UL) /*!< CAN_MO MOFCR: DLC (Bit 24) */ +#define CAN_MO_MOFCR_DLC_Msk (0xf000000UL) /*!< CAN_MO MOFCR: DLC (Bitfield-Mask: 0x0f) */ + +/* -------------------------------- CAN_MO_MOFGPR ------------------------------- */ +#define CAN_MO_MOFGPR_BOT_Pos (0UL) /*!< CAN_MO MOFGPR: BOT (Bit 0) */ +#define CAN_MO_MOFGPR_BOT_Msk (0xffUL) /*!< CAN_MO MOFGPR: BOT (Bitfield-Mask: 0xff) */ +#define CAN_MO_MOFGPR_TOP_Pos (8UL) /*!< CAN_MO MOFGPR: TOP (Bit 8) */ +#define CAN_MO_MOFGPR_TOP_Msk (0xff00UL) /*!< CAN_MO MOFGPR: TOP (Bitfield-Mask: 0xff) */ +#define CAN_MO_MOFGPR_CUR_Pos (16UL) /*!< CAN_MO MOFGPR: CUR (Bit 16) */ +#define CAN_MO_MOFGPR_CUR_Msk (0xff0000UL) /*!< CAN_MO MOFGPR: CUR (Bitfield-Mask: 0xff) */ +#define CAN_MO_MOFGPR_SEL_Pos (24UL) /*!< CAN_MO MOFGPR: SEL (Bit 24) */ +#define CAN_MO_MOFGPR_SEL_Msk (0xff000000UL) /*!< CAN_MO MOFGPR: SEL (Bitfield-Mask: 0xff) */ + +/* -------------------------------- CAN_MO_MOIPR -------------------------------- */ +#define CAN_MO_MOIPR_RXINP_Pos (0UL) /*!< CAN_MO MOIPR: RXINP (Bit 0) */ +#define CAN_MO_MOIPR_RXINP_Msk (0x7UL) /*!< CAN_MO MOIPR: RXINP (Bitfield-Mask: 0x07) */ +#define CAN_MO_MOIPR_TXINP_Pos (4UL) /*!< CAN_MO MOIPR: TXINP (Bit 4) */ +#define CAN_MO_MOIPR_TXINP_Msk (0x70UL) /*!< CAN_MO MOIPR: TXINP (Bitfield-Mask: 0x07) */ +#define CAN_MO_MOIPR_MPN_Pos (8UL) /*!< CAN_MO MOIPR: MPN (Bit 8) */ +#define CAN_MO_MOIPR_MPN_Msk (0xff00UL) /*!< CAN_MO MOIPR: MPN (Bitfield-Mask: 0xff) */ +#define CAN_MO_MOIPR_CFCVAL_Pos (16UL) /*!< CAN_MO MOIPR: CFCVAL (Bit 16) */ +#define CAN_MO_MOIPR_CFCVAL_Msk (0xffff0000UL) /*!< CAN_MO MOIPR: CFCVAL (Bitfield-Mask: 0xffff) */ + +/* -------------------------------- CAN_MO_MOAMR -------------------------------- */ +#define CAN_MO_MOAMR_AM_Pos (0UL) /*!< CAN_MO MOAMR: AM (Bit 0) */ +#define CAN_MO_MOAMR_AM_Msk (0x1fffffffUL) /*!< CAN_MO MOAMR: AM (Bitfield-Mask: 0x1fffffff) */ +#define CAN_MO_MOAMR_MIDE_Pos (29UL) /*!< CAN_MO MOAMR: MIDE (Bit 29) */ +#define CAN_MO_MOAMR_MIDE_Msk (0x20000000UL) /*!< CAN_MO MOAMR: MIDE (Bitfield-Mask: 0x01) */ + +/* ------------------------------- CAN_MO_MODATAL ------------------------------- */ +#define CAN_MO_MODATAL_DB0_Pos (0UL) /*!< CAN_MO MODATAL: DB0 (Bit 0) */ +#define CAN_MO_MODATAL_DB0_Msk (0xffUL) /*!< CAN_MO MODATAL: DB0 (Bitfield-Mask: 0xff) */ +#define CAN_MO_MODATAL_DB1_Pos (8UL) /*!< CAN_MO MODATAL: DB1 (Bit 8) */ +#define CAN_MO_MODATAL_DB1_Msk (0xff00UL) /*!< CAN_MO MODATAL: DB1 (Bitfield-Mask: 0xff) */ +#define CAN_MO_MODATAL_DB2_Pos (16UL) /*!< CAN_MO MODATAL: DB2 (Bit 16) */ +#define CAN_MO_MODATAL_DB2_Msk (0xff0000UL) /*!< CAN_MO MODATAL: DB2 (Bitfield-Mask: 0xff) */ +#define CAN_MO_MODATAL_DB3_Pos (24UL) /*!< CAN_MO MODATAL: DB3 (Bit 24) */ +#define CAN_MO_MODATAL_DB3_Msk (0xff000000UL) /*!< CAN_MO MODATAL: DB3 (Bitfield-Mask: 0xff) */ + +/* ------------------------------- CAN_MO_MODATAH ------------------------------- */ +#define CAN_MO_MODATAH_DB4_Pos (0UL) /*!< CAN_MO MODATAH: DB4 (Bit 0) */ +#define CAN_MO_MODATAH_DB4_Msk (0xffUL) /*!< CAN_MO MODATAH: DB4 (Bitfield-Mask: 0xff) */ +#define CAN_MO_MODATAH_DB5_Pos (8UL) /*!< CAN_MO MODATAH: DB5 (Bit 8) */ +#define CAN_MO_MODATAH_DB5_Msk (0xff00UL) /*!< CAN_MO MODATAH: DB5 (Bitfield-Mask: 0xff) */ +#define CAN_MO_MODATAH_DB6_Pos (16UL) /*!< CAN_MO MODATAH: DB6 (Bit 16) */ +#define CAN_MO_MODATAH_DB6_Msk (0xff0000UL) /*!< CAN_MO MODATAH: DB6 (Bitfield-Mask: 0xff) */ +#define CAN_MO_MODATAH_DB7_Pos (24UL) /*!< CAN_MO MODATAH: DB7 (Bit 24) */ +#define CAN_MO_MODATAH_DB7_Msk (0xff000000UL) /*!< CAN_MO MODATAH: DB7 (Bitfield-Mask: 0xff) */ + +/* --------------------------------- CAN_MO_MOAR -------------------------------- */ +#define CAN_MO_MOAR_ID_Pos (0UL) /*!< CAN_MO MOAR: ID (Bit 0) */ +#define CAN_MO_MOAR_ID_Msk (0x1fffffffUL) /*!< CAN_MO MOAR: ID (Bitfield-Mask: 0x1fffffff) */ +#define CAN_MO_MOAR_IDE_Pos (29UL) /*!< CAN_MO MOAR: IDE (Bit 29) */ +#define CAN_MO_MOAR_IDE_Msk (0x20000000UL) /*!< CAN_MO MOAR: IDE (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOAR_PRI_Pos (30UL) /*!< CAN_MO MOAR: PRI (Bit 30) */ +#define CAN_MO_MOAR_PRI_Msk (0xc0000000UL) /*!< CAN_MO MOAR: PRI (Bitfield-Mask: 0x03) */ + +/* -------------------------------- CAN_MO_MOCTR -------------------------------- */ +#define CAN_MO_MOCTR_RESRXPND_Pos (0UL) /*!< CAN_MO MOCTR: RESRXPND (Bit 0) */ +#define CAN_MO_MOCTR_RESRXPND_Msk (0x1UL) /*!< CAN_MO MOCTR: RESRXPND (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOCTR_RESTXPND_Pos (1UL) /*!< CAN_MO MOCTR: RESTXPND (Bit 1) */ +#define CAN_MO_MOCTR_RESTXPND_Msk (0x2UL) /*!< CAN_MO MOCTR: RESTXPND (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOCTR_RESRXUPD_Pos (2UL) /*!< CAN_MO MOCTR: RESRXUPD (Bit 2) */ +#define CAN_MO_MOCTR_RESRXUPD_Msk (0x4UL) /*!< CAN_MO MOCTR: RESRXUPD (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOCTR_RESNEWDAT_Pos (3UL) /*!< CAN_MO MOCTR: RESNEWDAT (Bit 3) */ +#define CAN_MO_MOCTR_RESNEWDAT_Msk (0x8UL) /*!< CAN_MO MOCTR: RESNEWDAT (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOCTR_RESMSGLST_Pos (4UL) /*!< CAN_MO MOCTR: RESMSGLST (Bit 4) */ +#define CAN_MO_MOCTR_RESMSGLST_Msk (0x10UL) /*!< CAN_MO MOCTR: RESMSGLST (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOCTR_RESMSGVAL_Pos (5UL) /*!< CAN_MO MOCTR: RESMSGVAL (Bit 5) */ +#define CAN_MO_MOCTR_RESMSGVAL_Msk (0x20UL) /*!< CAN_MO MOCTR: RESMSGVAL (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOCTR_RESRTSEL_Pos (6UL) /*!< CAN_MO MOCTR: RESRTSEL (Bit 6) */ +#define CAN_MO_MOCTR_RESRTSEL_Msk (0x40UL) /*!< CAN_MO MOCTR: RESRTSEL (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOCTR_RESRXEN_Pos (7UL) /*!< CAN_MO MOCTR: RESRXEN (Bit 7) */ +#define CAN_MO_MOCTR_RESRXEN_Msk (0x80UL) /*!< CAN_MO MOCTR: RESRXEN (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOCTR_RESTXRQ_Pos (8UL) /*!< CAN_MO MOCTR: RESTXRQ (Bit 8) */ +#define CAN_MO_MOCTR_RESTXRQ_Msk (0x100UL) /*!< CAN_MO MOCTR: RESTXRQ (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOCTR_RESTXEN0_Pos (9UL) /*!< CAN_MO MOCTR: RESTXEN0 (Bit 9) */ +#define CAN_MO_MOCTR_RESTXEN0_Msk (0x200UL) /*!< CAN_MO MOCTR: RESTXEN0 (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOCTR_RESTXEN1_Pos (10UL) /*!< CAN_MO MOCTR: RESTXEN1 (Bit 10) */ +#define CAN_MO_MOCTR_RESTXEN1_Msk (0x400UL) /*!< CAN_MO MOCTR: RESTXEN1 (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOCTR_RESDIR_Pos (11UL) /*!< CAN_MO MOCTR: RESDIR (Bit 11) */ +#define CAN_MO_MOCTR_RESDIR_Msk (0x800UL) /*!< CAN_MO MOCTR: RESDIR (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOCTR_SETRXPND_Pos (16UL) /*!< CAN_MO MOCTR: SETRXPND (Bit 16) */ +#define CAN_MO_MOCTR_SETRXPND_Msk (0x10000UL) /*!< CAN_MO MOCTR: SETRXPND (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOCTR_SETTXPND_Pos (17UL) /*!< CAN_MO MOCTR: SETTXPND (Bit 17) */ +#define CAN_MO_MOCTR_SETTXPND_Msk (0x20000UL) /*!< CAN_MO MOCTR: SETTXPND (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOCTR_SETRXUPD_Pos (18UL) /*!< CAN_MO MOCTR: SETRXUPD (Bit 18) */ +#define CAN_MO_MOCTR_SETRXUPD_Msk (0x40000UL) /*!< CAN_MO MOCTR: SETRXUPD (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOCTR_SETNEWDAT_Pos (19UL) /*!< CAN_MO MOCTR: SETNEWDAT (Bit 19) */ +#define CAN_MO_MOCTR_SETNEWDAT_Msk (0x80000UL) /*!< CAN_MO MOCTR: SETNEWDAT (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOCTR_SETMSGLST_Pos (20UL) /*!< CAN_MO MOCTR: SETMSGLST (Bit 20) */ +#define CAN_MO_MOCTR_SETMSGLST_Msk (0x100000UL) /*!< CAN_MO MOCTR: SETMSGLST (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOCTR_SETMSGVAL_Pos (21UL) /*!< CAN_MO MOCTR: SETMSGVAL (Bit 21) */ +#define CAN_MO_MOCTR_SETMSGVAL_Msk (0x200000UL) /*!< CAN_MO MOCTR: SETMSGVAL (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOCTR_SETRTSEL_Pos (22UL) /*!< CAN_MO MOCTR: SETRTSEL (Bit 22) */ +#define CAN_MO_MOCTR_SETRTSEL_Msk (0x400000UL) /*!< CAN_MO MOCTR: SETRTSEL (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOCTR_SETRXEN_Pos (23UL) /*!< CAN_MO MOCTR: SETRXEN (Bit 23) */ +#define CAN_MO_MOCTR_SETRXEN_Msk (0x800000UL) /*!< CAN_MO MOCTR: SETRXEN (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOCTR_SETTXRQ_Pos (24UL) /*!< CAN_MO MOCTR: SETTXRQ (Bit 24) */ +#define CAN_MO_MOCTR_SETTXRQ_Msk (0x1000000UL) /*!< CAN_MO MOCTR: SETTXRQ (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOCTR_SETTXEN0_Pos (25UL) /*!< CAN_MO MOCTR: SETTXEN0 (Bit 25) */ +#define CAN_MO_MOCTR_SETTXEN0_Msk (0x2000000UL) /*!< CAN_MO MOCTR: SETTXEN0 (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOCTR_SETTXEN1_Pos (26UL) /*!< CAN_MO MOCTR: SETTXEN1 (Bit 26) */ +#define CAN_MO_MOCTR_SETTXEN1_Msk (0x4000000UL) /*!< CAN_MO MOCTR: SETTXEN1 (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOCTR_SETDIR_Pos (27UL) /*!< CAN_MO MOCTR: SETDIR (Bit 27) */ +#define CAN_MO_MOCTR_SETDIR_Msk (0x8000000UL) /*!< CAN_MO MOCTR: SETDIR (Bitfield-Mask: 0x01) */ + +/* -------------------------------- CAN_MO_MOSTAT ------------------------------- */ +#define CAN_MO_MOSTAT_RXPND_Pos (0UL) /*!< CAN_MO MOSTAT: RXPND (Bit 0) */ +#define CAN_MO_MOSTAT_RXPND_Msk (0x1UL) /*!< CAN_MO MOSTAT: RXPND (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOSTAT_TXPND_Pos (1UL) /*!< CAN_MO MOSTAT: TXPND (Bit 1) */ +#define CAN_MO_MOSTAT_TXPND_Msk (0x2UL) /*!< CAN_MO MOSTAT: TXPND (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOSTAT_RXUPD_Pos (2UL) /*!< CAN_MO MOSTAT: RXUPD (Bit 2) */ +#define CAN_MO_MOSTAT_RXUPD_Msk (0x4UL) /*!< CAN_MO MOSTAT: RXUPD (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOSTAT_NEWDAT_Pos (3UL) /*!< CAN_MO MOSTAT: NEWDAT (Bit 3) */ +#define CAN_MO_MOSTAT_NEWDAT_Msk (0x8UL) /*!< CAN_MO MOSTAT: NEWDAT (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOSTAT_MSGLST_Pos (4UL) /*!< CAN_MO MOSTAT: MSGLST (Bit 4) */ +#define CAN_MO_MOSTAT_MSGLST_Msk (0x10UL) /*!< CAN_MO MOSTAT: MSGLST (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOSTAT_MSGVAL_Pos (5UL) /*!< CAN_MO MOSTAT: MSGVAL (Bit 5) */ +#define CAN_MO_MOSTAT_MSGVAL_Msk (0x20UL) /*!< CAN_MO MOSTAT: MSGVAL (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOSTAT_RTSEL_Pos (6UL) /*!< CAN_MO MOSTAT: RTSEL (Bit 6) */ +#define CAN_MO_MOSTAT_RTSEL_Msk (0x40UL) /*!< CAN_MO MOSTAT: RTSEL (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOSTAT_RXEN_Pos (7UL) /*!< CAN_MO MOSTAT: RXEN (Bit 7) */ +#define CAN_MO_MOSTAT_RXEN_Msk (0x80UL) /*!< CAN_MO MOSTAT: RXEN (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOSTAT_TXRQ_Pos (8UL) /*!< CAN_MO MOSTAT: TXRQ (Bit 8) */ +#define CAN_MO_MOSTAT_TXRQ_Msk (0x100UL) /*!< CAN_MO MOSTAT: TXRQ (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOSTAT_TXEN0_Pos (9UL) /*!< CAN_MO MOSTAT: TXEN0 (Bit 9) */ +#define CAN_MO_MOSTAT_TXEN0_Msk (0x200UL) /*!< CAN_MO MOSTAT: TXEN0 (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOSTAT_TXEN1_Pos (10UL) /*!< CAN_MO MOSTAT: TXEN1 (Bit 10) */ +#define CAN_MO_MOSTAT_TXEN1_Msk (0x400UL) /*!< CAN_MO MOSTAT: TXEN1 (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOSTAT_DIR_Pos (11UL) /*!< CAN_MO MOSTAT: DIR (Bit 11) */ +#define CAN_MO_MOSTAT_DIR_Msk (0x800UL) /*!< CAN_MO MOSTAT: DIR (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOSTAT_LIST_Pos (12UL) /*!< CAN_MO MOSTAT: LIST (Bit 12) */ +#define CAN_MO_MOSTAT_LIST_Msk (0xf000UL) /*!< CAN_MO MOSTAT: LIST (Bitfield-Mask: 0x0f) */ +#define CAN_MO_MOSTAT_PPREV_Pos (16UL) /*!< CAN_MO MOSTAT: PPREV (Bit 16) */ +#define CAN_MO_MOSTAT_PPREV_Msk (0xff0000UL) /*!< CAN_MO MOSTAT: PPREV (Bitfield-Mask: 0xff) */ +#define CAN_MO_MOSTAT_PNEXT_Pos (24UL) /*!< CAN_MO MOSTAT: PNEXT (Bit 24) */ +#define CAN_MO_MOSTAT_PNEXT_Msk (0xff000000UL) /*!< CAN_MO MOSTAT: PNEXT (Bitfield-Mask: 0xff) */ + + +/* ================================================================================ */ +/* ================ struct 'VADC' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ---------------------------------- VADC_CLC ---------------------------------- */ +#define VADC_CLC_DISR_Pos (0UL) /*!< VADC CLC: DISR (Bit 0) */ +#define VADC_CLC_DISR_Msk (0x1UL) /*!< VADC CLC: DISR (Bitfield-Mask: 0x01) */ +#define VADC_CLC_DISS_Pos (1UL) /*!< VADC CLC: DISS (Bit 1) */ +#define VADC_CLC_DISS_Msk (0x2UL) /*!< VADC CLC: DISS (Bitfield-Mask: 0x01) */ +#define VADC_CLC_EDIS_Pos (3UL) /*!< VADC CLC: EDIS (Bit 3) */ +#define VADC_CLC_EDIS_Msk (0x8UL) /*!< VADC CLC: EDIS (Bitfield-Mask: 0x01) */ + +/* ----------------------------------- VADC_ID ---------------------------------- */ +#define VADC_ID_MOD_REV_Pos (0UL) /*!< VADC ID: MOD_REV (Bit 0) */ +#define VADC_ID_MOD_REV_Msk (0xffUL) /*!< VADC ID: MOD_REV (Bitfield-Mask: 0xff) */ +#define VADC_ID_MOD_TYPE_Pos (8UL) /*!< VADC ID: MOD_TYPE (Bit 8) */ +#define VADC_ID_MOD_TYPE_Msk (0xff00UL) /*!< VADC ID: MOD_TYPE (Bitfield-Mask: 0xff) */ +#define VADC_ID_MOD_NUMBER_Pos (16UL) /*!< VADC ID: MOD_NUMBER (Bit 16) */ +#define VADC_ID_MOD_NUMBER_Msk (0xffff0000UL) /*!< VADC ID: MOD_NUMBER (Bitfield-Mask: 0xffff) */ + +/* ---------------------------------- VADC_OCS ---------------------------------- */ +#define VADC_OCS_TGS_Pos (0UL) /*!< VADC OCS: TGS (Bit 0) */ +#define VADC_OCS_TGS_Msk (0x3UL) /*!< VADC OCS: TGS (Bitfield-Mask: 0x03) */ +#define VADC_OCS_TGB_Pos (2UL) /*!< VADC OCS: TGB (Bit 2) */ +#define VADC_OCS_TGB_Msk (0x4UL) /*!< VADC OCS: TGB (Bitfield-Mask: 0x01) */ +#define VADC_OCS_TG_P_Pos (3UL) /*!< VADC OCS: TG_P (Bit 3) */ +#define VADC_OCS_TG_P_Msk (0x8UL) /*!< VADC OCS: TG_P (Bitfield-Mask: 0x01) */ +#define VADC_OCS_SUS_Pos (24UL) /*!< VADC OCS: SUS (Bit 24) */ +#define VADC_OCS_SUS_Msk (0xf000000UL) /*!< VADC OCS: SUS (Bitfield-Mask: 0x0f) */ +#define VADC_OCS_SUS_P_Pos (28UL) /*!< VADC OCS: SUS_P (Bit 28) */ +#define VADC_OCS_SUS_P_Msk (0x10000000UL) /*!< VADC OCS: SUS_P (Bitfield-Mask: 0x01) */ +#define VADC_OCS_SUSSTA_Pos (29UL) /*!< VADC OCS: SUSSTA (Bit 29) */ +#define VADC_OCS_SUSSTA_Msk (0x20000000UL) /*!< VADC OCS: SUSSTA (Bitfield-Mask: 0x01) */ + +/* -------------------------------- VADC_GLOBCFG -------------------------------- */ +#define VADC_GLOBCFG_DIVA_Pos (0UL) /*!< VADC GLOBCFG: DIVA (Bit 0) */ +#define VADC_GLOBCFG_DIVA_Msk (0x1fUL) /*!< VADC GLOBCFG: DIVA (Bitfield-Mask: 0x1f) */ +#define VADC_GLOBCFG_DCMSB_Pos (7UL) /*!< VADC GLOBCFG: DCMSB (Bit 7) */ +#define VADC_GLOBCFG_DCMSB_Msk (0x80UL) /*!< VADC GLOBCFG: DCMSB (Bitfield-Mask: 0x01) */ +#define VADC_GLOBCFG_DIVD_Pos (8UL) /*!< VADC GLOBCFG: DIVD (Bit 8) */ +#define VADC_GLOBCFG_DIVD_Msk (0x300UL) /*!< VADC GLOBCFG: DIVD (Bitfield-Mask: 0x03) */ +#define VADC_GLOBCFG_DIVWC_Pos (15UL) /*!< VADC GLOBCFG: DIVWC (Bit 15) */ +#define VADC_GLOBCFG_DIVWC_Msk (0x8000UL) /*!< VADC GLOBCFG: DIVWC (Bitfield-Mask: 0x01) */ +#define VADC_GLOBCFG_DPCAL0_Pos (16UL) /*!< VADC GLOBCFG: DPCAL0 (Bit 16) */ +#define VADC_GLOBCFG_DPCAL0_Msk (0x10000UL) /*!< VADC GLOBCFG: DPCAL0 (Bitfield-Mask: 0x01) */ +#define VADC_GLOBCFG_DPCAL1_Pos (17UL) /*!< VADC GLOBCFG: DPCAL1 (Bit 17) */ +#define VADC_GLOBCFG_DPCAL1_Msk (0x20000UL) /*!< VADC GLOBCFG: DPCAL1 (Bitfield-Mask: 0x01) */ +#define VADC_GLOBCFG_DPCAL2_Pos (18UL) /*!< VADC GLOBCFG: DPCAL2 (Bit 18) */ +#define VADC_GLOBCFG_DPCAL2_Msk (0x40000UL) /*!< VADC GLOBCFG: DPCAL2 (Bitfield-Mask: 0x01) */ +#define VADC_GLOBCFG_DPCAL3_Pos (19UL) /*!< VADC GLOBCFG: DPCAL3 (Bit 19) */ +#define VADC_GLOBCFG_DPCAL3_Msk (0x80000UL) /*!< VADC GLOBCFG: DPCAL3 (Bitfield-Mask: 0x01) */ +#define VADC_GLOBCFG_SUCAL_Pos (31UL) /*!< VADC GLOBCFG: SUCAL (Bit 31) */ +#define VADC_GLOBCFG_SUCAL_Msk (0x80000000UL) /*!< VADC GLOBCFG: SUCAL (Bitfield-Mask: 0x01) */ + +/* ------------------------------- VADC_GLOBICLASS ------------------------------ */ +#define VADC_GLOBICLASS_STCS_Pos (0UL) /*!< VADC GLOBICLASS: STCS (Bit 0) */ +#define VADC_GLOBICLASS_STCS_Msk (0x1fUL) /*!< VADC GLOBICLASS: STCS (Bitfield-Mask: 0x1f) */ +#define VADC_GLOBICLASS_CMS_Pos (8UL) /*!< VADC GLOBICLASS: CMS (Bit 8) */ +#define VADC_GLOBICLASS_CMS_Msk (0x700UL) /*!< VADC GLOBICLASS: CMS (Bitfield-Mask: 0x07) */ +#define VADC_GLOBICLASS_STCE_Pos (16UL) /*!< VADC GLOBICLASS: STCE (Bit 16) */ +#define VADC_GLOBICLASS_STCE_Msk (0x1f0000UL) /*!< VADC GLOBICLASS: STCE (Bitfield-Mask: 0x1f) */ +#define VADC_GLOBICLASS_CME_Pos (24UL) /*!< VADC GLOBICLASS: CME (Bit 24) */ +#define VADC_GLOBICLASS_CME_Msk (0x7000000UL) /*!< VADC GLOBICLASS: CME (Bitfield-Mask: 0x07) */ + +/* ------------------------------- VADC_GLOBBOUND ------------------------------- */ +#define VADC_GLOBBOUND_BOUNDARY0_Pos (0UL) /*!< VADC GLOBBOUND: BOUNDARY0 (Bit 0) */ +#define VADC_GLOBBOUND_BOUNDARY0_Msk (0xfffUL) /*!< VADC GLOBBOUND: BOUNDARY0 (Bitfield-Mask: 0xfff) */ +#define VADC_GLOBBOUND_BOUNDARY1_Pos (16UL) /*!< VADC GLOBBOUND: BOUNDARY1 (Bit 16) */ +#define VADC_GLOBBOUND_BOUNDARY1_Msk (0xfff0000UL) /*!< VADC GLOBBOUND: BOUNDARY1 (Bitfield-Mask: 0xfff) */ + +/* ------------------------------- VADC_GLOBEFLAG ------------------------------- */ +#define VADC_GLOBEFLAG_SEVGLB_Pos (0UL) /*!< VADC GLOBEFLAG: SEVGLB (Bit 0) */ +#define VADC_GLOBEFLAG_SEVGLB_Msk (0x1UL) /*!< VADC GLOBEFLAG: SEVGLB (Bitfield-Mask: 0x01) */ +#define VADC_GLOBEFLAG_REVGLB_Pos (8UL) /*!< VADC GLOBEFLAG: REVGLB (Bit 8) */ +#define VADC_GLOBEFLAG_REVGLB_Msk (0x100UL) /*!< VADC GLOBEFLAG: REVGLB (Bitfield-Mask: 0x01) */ +#define VADC_GLOBEFLAG_SEVGLBCLR_Pos (16UL) /*!< VADC GLOBEFLAG: SEVGLBCLR (Bit 16) */ +#define VADC_GLOBEFLAG_SEVGLBCLR_Msk (0x10000UL) /*!< VADC GLOBEFLAG: SEVGLBCLR (Bitfield-Mask: 0x01) */ +#define VADC_GLOBEFLAG_REVGLBCLR_Pos (24UL) /*!< VADC GLOBEFLAG: REVGLBCLR (Bit 24) */ +#define VADC_GLOBEFLAG_REVGLBCLR_Msk (0x1000000UL) /*!< VADC GLOBEFLAG: REVGLBCLR (Bitfield-Mask: 0x01) */ + +/* -------------------------------- VADC_GLOBEVNP ------------------------------- */ +#define VADC_GLOBEVNP_SEV0NP_Pos (0UL) /*!< VADC GLOBEVNP: SEV0NP (Bit 0) */ +#define VADC_GLOBEVNP_SEV0NP_Msk (0xfUL) /*!< VADC GLOBEVNP: SEV0NP (Bitfield-Mask: 0x0f) */ +#define VADC_GLOBEVNP_REV0NP_Pos (16UL) /*!< VADC GLOBEVNP: REV0NP (Bit 16) */ +#define VADC_GLOBEVNP_REV0NP_Msk (0xf0000UL) /*!< VADC GLOBEVNP: REV0NP (Bitfield-Mask: 0x0f) */ + +/* --------------------------------- VADC_GLOBTF -------------------------------- */ +#define VADC_GLOBTF_CDGR_Pos (4UL) /*!< VADC GLOBTF: CDGR (Bit 4) */ +#define VADC_GLOBTF_CDGR_Msk (0xf0UL) /*!< VADC GLOBTF: CDGR (Bitfield-Mask: 0x0f) */ +#define VADC_GLOBTF_CDEN_Pos (8UL) /*!< VADC GLOBTF: CDEN (Bit 8) */ +#define VADC_GLOBTF_CDEN_Msk (0x100UL) /*!< VADC GLOBTF: CDEN (Bitfield-Mask: 0x01) */ +#define VADC_GLOBTF_CDSEL_Pos (9UL) /*!< VADC GLOBTF: CDSEL (Bit 9) */ +#define VADC_GLOBTF_CDSEL_Msk (0x600UL) /*!< VADC GLOBTF: CDSEL (Bitfield-Mask: 0x03) */ +#define VADC_GLOBTF_CDWC_Pos (15UL) /*!< VADC GLOBTF: CDWC (Bit 15) */ +#define VADC_GLOBTF_CDWC_Msk (0x8000UL) /*!< VADC GLOBTF: CDWC (Bitfield-Mask: 0x01) */ +#define VADC_GLOBTF_PDD_Pos (16UL) /*!< VADC GLOBTF: PDD (Bit 16) */ +#define VADC_GLOBTF_PDD_Msk (0x10000UL) /*!< VADC GLOBTF: PDD (Bitfield-Mask: 0x01) */ +#define VADC_GLOBTF_MDWC_Pos (23UL) /*!< VADC GLOBTF: MDWC (Bit 23) */ +#define VADC_GLOBTF_MDWC_Msk (0x800000UL) /*!< VADC GLOBTF: MDWC (Bitfield-Mask: 0x01) */ + +/* --------------------------------- VADC_BRSSEL -------------------------------- */ +#define VADC_BRSSEL_CHSELG0_Pos (0UL) /*!< VADC BRSSEL: CHSELG0 (Bit 0) */ +#define VADC_BRSSEL_CHSELG0_Msk (0x1UL) /*!< VADC BRSSEL: CHSELG0 (Bitfield-Mask: 0x01) */ +#define VADC_BRSSEL_CHSELG1_Pos (1UL) /*!< VADC BRSSEL: CHSELG1 (Bit 1) */ +#define VADC_BRSSEL_CHSELG1_Msk (0x2UL) /*!< VADC BRSSEL: CHSELG1 (Bitfield-Mask: 0x01) */ +#define VADC_BRSSEL_CHSELG2_Pos (2UL) /*!< VADC BRSSEL: CHSELG2 (Bit 2) */ +#define VADC_BRSSEL_CHSELG2_Msk (0x4UL) /*!< VADC BRSSEL: CHSELG2 (Bitfield-Mask: 0x01) */ +#define VADC_BRSSEL_CHSELG3_Pos (3UL) /*!< VADC BRSSEL: CHSELG3 (Bit 3) */ +#define VADC_BRSSEL_CHSELG3_Msk (0x8UL) /*!< VADC BRSSEL: CHSELG3 (Bitfield-Mask: 0x01) */ +#define VADC_BRSSEL_CHSELG4_Pos (4UL) /*!< VADC BRSSEL: CHSELG4 (Bit 4) */ +#define VADC_BRSSEL_CHSELG4_Msk (0x10UL) /*!< VADC BRSSEL: CHSELG4 (Bitfield-Mask: 0x01) */ +#define VADC_BRSSEL_CHSELG5_Pos (5UL) /*!< VADC BRSSEL: CHSELG5 (Bit 5) */ +#define VADC_BRSSEL_CHSELG5_Msk (0x20UL) /*!< VADC BRSSEL: CHSELG5 (Bitfield-Mask: 0x01) */ +#define VADC_BRSSEL_CHSELG6_Pos (6UL) /*!< VADC BRSSEL: CHSELG6 (Bit 6) */ +#define VADC_BRSSEL_CHSELG6_Msk (0x40UL) /*!< VADC BRSSEL: CHSELG6 (Bitfield-Mask: 0x01) */ +#define VADC_BRSSEL_CHSELG7_Pos (7UL) /*!< VADC BRSSEL: CHSELG7 (Bit 7) */ +#define VADC_BRSSEL_CHSELG7_Msk (0x80UL) /*!< VADC BRSSEL: CHSELG7 (Bitfield-Mask: 0x01) */ + +/* --------------------------------- VADC_BRSPND -------------------------------- */ +#define VADC_BRSPND_CHPNDG0_Pos (0UL) /*!< VADC BRSPND: CHPNDG0 (Bit 0) */ +#define VADC_BRSPND_CHPNDG0_Msk (0x1UL) /*!< VADC BRSPND: CHPNDG0 (Bitfield-Mask: 0x01) */ +#define VADC_BRSPND_CHPNDG1_Pos (1UL) /*!< VADC BRSPND: CHPNDG1 (Bit 1) */ +#define VADC_BRSPND_CHPNDG1_Msk (0x2UL) /*!< VADC BRSPND: CHPNDG1 (Bitfield-Mask: 0x01) */ +#define VADC_BRSPND_CHPNDG2_Pos (2UL) /*!< VADC BRSPND: CHPNDG2 (Bit 2) */ +#define VADC_BRSPND_CHPNDG2_Msk (0x4UL) /*!< VADC BRSPND: CHPNDG2 (Bitfield-Mask: 0x01) */ +#define VADC_BRSPND_CHPNDG3_Pos (3UL) /*!< VADC BRSPND: CHPNDG3 (Bit 3) */ +#define VADC_BRSPND_CHPNDG3_Msk (0x8UL) /*!< VADC BRSPND: CHPNDG3 (Bitfield-Mask: 0x01) */ +#define VADC_BRSPND_CHPNDG4_Pos (4UL) /*!< VADC BRSPND: CHPNDG4 (Bit 4) */ +#define VADC_BRSPND_CHPNDG4_Msk (0x10UL) /*!< VADC BRSPND: CHPNDG4 (Bitfield-Mask: 0x01) */ +#define VADC_BRSPND_CHPNDG5_Pos (5UL) /*!< VADC BRSPND: CHPNDG5 (Bit 5) */ +#define VADC_BRSPND_CHPNDG5_Msk (0x20UL) /*!< VADC BRSPND: CHPNDG5 (Bitfield-Mask: 0x01) */ +#define VADC_BRSPND_CHPNDG6_Pos (6UL) /*!< VADC BRSPND: CHPNDG6 (Bit 6) */ +#define VADC_BRSPND_CHPNDG6_Msk (0x40UL) /*!< VADC BRSPND: CHPNDG6 (Bitfield-Mask: 0x01) */ +#define VADC_BRSPND_CHPNDG7_Pos (7UL) /*!< VADC BRSPND: CHPNDG7 (Bit 7) */ +#define VADC_BRSPND_CHPNDG7_Msk (0x80UL) /*!< VADC BRSPND: CHPNDG7 (Bitfield-Mask: 0x01) */ + +/* -------------------------------- VADC_BRSCTRL -------------------------------- */ +#define VADC_BRSCTRL_SRCRESREG_Pos (0UL) /*!< VADC BRSCTRL: SRCRESREG (Bit 0) */ +#define VADC_BRSCTRL_SRCRESREG_Msk (0xfUL) /*!< VADC BRSCTRL: SRCRESREG (Bitfield-Mask: 0x0f) */ +#define VADC_BRSCTRL_XTSEL_Pos (8UL) /*!< VADC BRSCTRL: XTSEL (Bit 8) */ +#define VADC_BRSCTRL_XTSEL_Msk (0xf00UL) /*!< VADC BRSCTRL: XTSEL (Bitfield-Mask: 0x0f) */ +#define VADC_BRSCTRL_XTLVL_Pos (12UL) /*!< VADC BRSCTRL: XTLVL (Bit 12) */ +#define VADC_BRSCTRL_XTLVL_Msk (0x1000UL) /*!< VADC BRSCTRL: XTLVL (Bitfield-Mask: 0x01) */ +#define VADC_BRSCTRL_XTMODE_Pos (13UL) /*!< VADC BRSCTRL: XTMODE (Bit 13) */ +#define VADC_BRSCTRL_XTMODE_Msk (0x6000UL) /*!< VADC BRSCTRL: XTMODE (Bitfield-Mask: 0x03) */ +#define VADC_BRSCTRL_XTWC_Pos (15UL) /*!< VADC BRSCTRL: XTWC (Bit 15) */ +#define VADC_BRSCTRL_XTWC_Msk (0x8000UL) /*!< VADC BRSCTRL: XTWC (Bitfield-Mask: 0x01) */ +#define VADC_BRSCTRL_GTSEL_Pos (16UL) /*!< VADC BRSCTRL: GTSEL (Bit 16) */ +#define VADC_BRSCTRL_GTSEL_Msk (0xf0000UL) /*!< VADC BRSCTRL: GTSEL (Bitfield-Mask: 0x0f) */ +#define VADC_BRSCTRL_GTLVL_Pos (20UL) /*!< VADC BRSCTRL: GTLVL (Bit 20) */ +#define VADC_BRSCTRL_GTLVL_Msk (0x100000UL) /*!< VADC BRSCTRL: GTLVL (Bitfield-Mask: 0x01) */ +#define VADC_BRSCTRL_GTWC_Pos (23UL) /*!< VADC BRSCTRL: GTWC (Bit 23) */ +#define VADC_BRSCTRL_GTWC_Msk (0x800000UL) /*!< VADC BRSCTRL: GTWC (Bitfield-Mask: 0x01) */ + +/* --------------------------------- VADC_BRSMR --------------------------------- */ +#define VADC_BRSMR_ENGT_Pos (0UL) /*!< VADC BRSMR: ENGT (Bit 0) */ +#define VADC_BRSMR_ENGT_Msk (0x3UL) /*!< VADC BRSMR: ENGT (Bitfield-Mask: 0x03) */ +#define VADC_BRSMR_ENTR_Pos (2UL) /*!< VADC BRSMR: ENTR (Bit 2) */ +#define VADC_BRSMR_ENTR_Msk (0x4UL) /*!< VADC BRSMR: ENTR (Bitfield-Mask: 0x01) */ +#define VADC_BRSMR_ENSI_Pos (3UL) /*!< VADC BRSMR: ENSI (Bit 3) */ +#define VADC_BRSMR_ENSI_Msk (0x8UL) /*!< VADC BRSMR: ENSI (Bitfield-Mask: 0x01) */ +#define VADC_BRSMR_SCAN_Pos (4UL) /*!< VADC BRSMR: SCAN (Bit 4) */ +#define VADC_BRSMR_SCAN_Msk (0x10UL) /*!< VADC BRSMR: SCAN (Bitfield-Mask: 0x01) */ +#define VADC_BRSMR_LDM_Pos (5UL) /*!< VADC BRSMR: LDM (Bit 5) */ +#define VADC_BRSMR_LDM_Msk (0x20UL) /*!< VADC BRSMR: LDM (Bitfield-Mask: 0x01) */ +#define VADC_BRSMR_REQGT_Pos (7UL) /*!< VADC BRSMR: REQGT (Bit 7) */ +#define VADC_BRSMR_REQGT_Msk (0x80UL) /*!< VADC BRSMR: REQGT (Bitfield-Mask: 0x01) */ +#define VADC_BRSMR_CLRPND_Pos (8UL) /*!< VADC BRSMR: CLRPND (Bit 8) */ +#define VADC_BRSMR_CLRPND_Msk (0x100UL) /*!< VADC BRSMR: CLRPND (Bitfield-Mask: 0x01) */ +#define VADC_BRSMR_LDEV_Pos (9UL) /*!< VADC BRSMR: LDEV (Bit 9) */ +#define VADC_BRSMR_LDEV_Msk (0x200UL) /*!< VADC BRSMR: LDEV (Bitfield-Mask: 0x01) */ +#define VADC_BRSMR_RPTDIS_Pos (16UL) /*!< VADC BRSMR: RPTDIS (Bit 16) */ +#define VADC_BRSMR_RPTDIS_Msk (0x10000UL) /*!< VADC BRSMR: RPTDIS (Bitfield-Mask: 0x01) */ + +/* -------------------------------- VADC_GLOBRCR -------------------------------- */ +#define VADC_GLOBRCR_DRCTR_Pos (16UL) /*!< VADC GLOBRCR: DRCTR (Bit 16) */ +#define VADC_GLOBRCR_DRCTR_Msk (0xf0000UL) /*!< VADC GLOBRCR: DRCTR (Bitfield-Mask: 0x0f) */ +#define VADC_GLOBRCR_WFR_Pos (24UL) /*!< VADC GLOBRCR: WFR (Bit 24) */ +#define VADC_GLOBRCR_WFR_Msk (0x1000000UL) /*!< VADC GLOBRCR: WFR (Bitfield-Mask: 0x01) */ +#define VADC_GLOBRCR_SRGEN_Pos (31UL) /*!< VADC GLOBRCR: SRGEN (Bit 31) */ +#define VADC_GLOBRCR_SRGEN_Msk (0x80000000UL) /*!< VADC GLOBRCR: SRGEN (Bitfield-Mask: 0x01) */ + +/* -------------------------------- VADC_GLOBRES -------------------------------- */ +#define VADC_GLOBRES_RESULT_Pos (0UL) /*!< VADC GLOBRES: RESULT (Bit 0) */ +#define VADC_GLOBRES_RESULT_Msk (0xffffUL) /*!< VADC GLOBRES: RESULT (Bitfield-Mask: 0xffff) */ +#define VADC_GLOBRES_GNR_Pos (16UL) /*!< VADC GLOBRES: GNR (Bit 16) */ +#define VADC_GLOBRES_GNR_Msk (0xf0000UL) /*!< VADC GLOBRES: GNR (Bitfield-Mask: 0x0f) */ +#define VADC_GLOBRES_CHNR_Pos (20UL) /*!< VADC GLOBRES: CHNR (Bit 20) */ +#define VADC_GLOBRES_CHNR_Msk (0x1f00000UL) /*!< VADC GLOBRES: CHNR (Bitfield-Mask: 0x1f) */ +#define VADC_GLOBRES_EMUX_Pos (25UL) /*!< VADC GLOBRES: EMUX (Bit 25) */ +#define VADC_GLOBRES_EMUX_Msk (0xe000000UL) /*!< VADC GLOBRES: EMUX (Bitfield-Mask: 0x07) */ +#define VADC_GLOBRES_CRS_Pos (28UL) /*!< VADC GLOBRES: CRS (Bit 28) */ +#define VADC_GLOBRES_CRS_Msk (0x30000000UL) /*!< VADC GLOBRES: CRS (Bitfield-Mask: 0x03) */ +#define VADC_GLOBRES_FCR_Pos (30UL) /*!< VADC GLOBRES: FCR (Bit 30) */ +#define VADC_GLOBRES_FCR_Msk (0x40000000UL) /*!< VADC GLOBRES: FCR (Bitfield-Mask: 0x01) */ +#define VADC_GLOBRES_VF_Pos (31UL) /*!< VADC GLOBRES: VF (Bit 31) */ +#define VADC_GLOBRES_VF_Msk (0x80000000UL) /*!< VADC GLOBRES: VF (Bitfield-Mask: 0x01) */ + +/* -------------------------------- VADC_GLOBRESD ------------------------------- */ +#define VADC_GLOBRESD_RESULT_Pos (0UL) /*!< VADC GLOBRESD: RESULT (Bit 0) */ +#define VADC_GLOBRESD_RESULT_Msk (0xffffUL) /*!< VADC GLOBRESD: RESULT (Bitfield-Mask: 0xffff) */ +#define VADC_GLOBRESD_GNR_Pos (16UL) /*!< VADC GLOBRESD: GNR (Bit 16) */ +#define VADC_GLOBRESD_GNR_Msk (0xf0000UL) /*!< VADC GLOBRESD: GNR (Bitfield-Mask: 0x0f) */ +#define VADC_GLOBRESD_CHNR_Pos (20UL) /*!< VADC GLOBRESD: CHNR (Bit 20) */ +#define VADC_GLOBRESD_CHNR_Msk (0x1f00000UL) /*!< VADC GLOBRESD: CHNR (Bitfield-Mask: 0x1f) */ +#define VADC_GLOBRESD_EMUX_Pos (25UL) /*!< VADC GLOBRESD: EMUX (Bit 25) */ +#define VADC_GLOBRESD_EMUX_Msk (0xe000000UL) /*!< VADC GLOBRESD: EMUX (Bitfield-Mask: 0x07) */ +#define VADC_GLOBRESD_CRS_Pos (28UL) /*!< VADC GLOBRESD: CRS (Bit 28) */ +#define VADC_GLOBRESD_CRS_Msk (0x30000000UL) /*!< VADC GLOBRESD: CRS (Bitfield-Mask: 0x03) */ +#define VADC_GLOBRESD_FCR_Pos (30UL) /*!< VADC GLOBRESD: FCR (Bit 30) */ +#define VADC_GLOBRESD_FCR_Msk (0x40000000UL) /*!< VADC GLOBRESD: FCR (Bitfield-Mask: 0x01) */ +#define VADC_GLOBRESD_VF_Pos (31UL) /*!< VADC GLOBRESD: VF (Bit 31) */ +#define VADC_GLOBRESD_VF_Msk (0x80000000UL) /*!< VADC GLOBRESD: VF (Bitfield-Mask: 0x01) */ + +/* -------------------------------- VADC_EMUXSEL -------------------------------- */ +#define VADC_EMUXSEL_EMUXGRP0_Pos (0UL) /*!< VADC EMUXSEL: EMUXGRP0 (Bit 0) */ +#define VADC_EMUXSEL_EMUXGRP0_Msk (0xfUL) /*!< VADC EMUXSEL: EMUXGRP0 (Bitfield-Mask: 0x0f) */ +#define VADC_EMUXSEL_EMUXGRP1_Pos (4UL) /*!< VADC EMUXSEL: EMUXGRP1 (Bit 4) */ +#define VADC_EMUXSEL_EMUXGRP1_Msk (0xf0UL) /*!< VADC EMUXSEL: EMUXGRP1 (Bitfield-Mask: 0x0f) */ + + +/* ================================================================================ */ +/* ================ Group 'VADC_G' Position & Mask ================ */ +/* ================================================================================ */ + + +/* -------------------------------- VADC_G_ARBCFG ------------------------------- */ +#define VADC_G_ARBCFG_ANONC_Pos (0UL) /*!< VADC_G ARBCFG: ANONC (Bit 0) */ +#define VADC_G_ARBCFG_ANONC_Msk (0x3UL) /*!< VADC_G ARBCFG: ANONC (Bitfield-Mask: 0x03) */ +#define VADC_G_ARBCFG_ARBRND_Pos (4UL) /*!< VADC_G ARBCFG: ARBRND (Bit 4) */ +#define VADC_G_ARBCFG_ARBRND_Msk (0x30UL) /*!< VADC_G ARBCFG: ARBRND (Bitfield-Mask: 0x03) */ +#define VADC_G_ARBCFG_ARBM_Pos (7UL) /*!< VADC_G ARBCFG: ARBM (Bit 7) */ +#define VADC_G_ARBCFG_ARBM_Msk (0x80UL) /*!< VADC_G ARBCFG: ARBM (Bitfield-Mask: 0x01) */ +#define VADC_G_ARBCFG_ANONS_Pos (16UL) /*!< VADC_G ARBCFG: ANONS (Bit 16) */ +#define VADC_G_ARBCFG_ANONS_Msk (0x30000UL) /*!< VADC_G ARBCFG: ANONS (Bitfield-Mask: 0x03) */ +#define VADC_G_ARBCFG_CAL_Pos (28UL) /*!< VADC_G ARBCFG: CAL (Bit 28) */ +#define VADC_G_ARBCFG_CAL_Msk (0x10000000UL) /*!< VADC_G ARBCFG: CAL (Bitfield-Mask: 0x01) */ +#define VADC_G_ARBCFG_BUSY_Pos (30UL) /*!< VADC_G ARBCFG: BUSY (Bit 30) */ +#define VADC_G_ARBCFG_BUSY_Msk (0x40000000UL) /*!< VADC_G ARBCFG: BUSY (Bitfield-Mask: 0x01) */ +#define VADC_G_ARBCFG_SAMPLE_Pos (31UL) /*!< VADC_G ARBCFG: SAMPLE (Bit 31) */ +#define VADC_G_ARBCFG_SAMPLE_Msk (0x80000000UL) /*!< VADC_G ARBCFG: SAMPLE (Bitfield-Mask: 0x01) */ + +/* -------------------------------- VADC_G_ARBPR -------------------------------- */ +#define VADC_G_ARBPR_PRIO0_Pos (0UL) /*!< VADC_G ARBPR: PRIO0 (Bit 0) */ +#define VADC_G_ARBPR_PRIO0_Msk (0x3UL) /*!< VADC_G ARBPR: PRIO0 (Bitfield-Mask: 0x03) */ +#define VADC_G_ARBPR_CSM0_Pos (3UL) /*!< VADC_G ARBPR: CSM0 (Bit 3) */ +#define VADC_G_ARBPR_CSM0_Msk (0x8UL) /*!< VADC_G ARBPR: CSM0 (Bitfield-Mask: 0x01) */ +#define VADC_G_ARBPR_PRIO1_Pos (4UL) /*!< VADC_G ARBPR: PRIO1 (Bit 4) */ +#define VADC_G_ARBPR_PRIO1_Msk (0x30UL) /*!< VADC_G ARBPR: PRIO1 (Bitfield-Mask: 0x03) */ +#define VADC_G_ARBPR_CSM1_Pos (7UL) /*!< VADC_G ARBPR: CSM1 (Bit 7) */ +#define VADC_G_ARBPR_CSM1_Msk (0x80UL) /*!< VADC_G ARBPR: CSM1 (Bitfield-Mask: 0x01) */ +#define VADC_G_ARBPR_PRIO2_Pos (8UL) /*!< VADC_G ARBPR: PRIO2 (Bit 8) */ +#define VADC_G_ARBPR_PRIO2_Msk (0x300UL) /*!< VADC_G ARBPR: PRIO2 (Bitfield-Mask: 0x03) */ +#define VADC_G_ARBPR_CSM2_Pos (11UL) /*!< VADC_G ARBPR: CSM2 (Bit 11) */ +#define VADC_G_ARBPR_CSM2_Msk (0x800UL) /*!< VADC_G ARBPR: CSM2 (Bitfield-Mask: 0x01) */ +#define VADC_G_ARBPR_ASEN0_Pos (24UL) /*!< VADC_G ARBPR: ASEN0 (Bit 24) */ +#define VADC_G_ARBPR_ASEN0_Msk (0x1000000UL) /*!< VADC_G ARBPR: ASEN0 (Bitfield-Mask: 0x01) */ +#define VADC_G_ARBPR_ASEN1_Pos (25UL) /*!< VADC_G ARBPR: ASEN1 (Bit 25) */ +#define VADC_G_ARBPR_ASEN1_Msk (0x2000000UL) /*!< VADC_G ARBPR: ASEN1 (Bitfield-Mask: 0x01) */ +#define VADC_G_ARBPR_ASEN2_Pos (26UL) /*!< VADC_G ARBPR: ASEN2 (Bit 26) */ +#define VADC_G_ARBPR_ASEN2_Msk (0x4000000UL) /*!< VADC_G ARBPR: ASEN2 (Bitfield-Mask: 0x01) */ + +/* -------------------------------- VADC_G_CHASS -------------------------------- */ +#define VADC_G_CHASS_ASSCH0_Pos (0UL) /*!< VADC_G CHASS: ASSCH0 (Bit 0) */ +#define VADC_G_CHASS_ASSCH0_Msk (0x1UL) /*!< VADC_G CHASS: ASSCH0 (Bitfield-Mask: 0x01) */ +#define VADC_G_CHASS_ASSCH1_Pos (1UL) /*!< VADC_G CHASS: ASSCH1 (Bit 1) */ +#define VADC_G_CHASS_ASSCH1_Msk (0x2UL) /*!< VADC_G CHASS: ASSCH1 (Bitfield-Mask: 0x01) */ +#define VADC_G_CHASS_ASSCH2_Pos (2UL) /*!< VADC_G CHASS: ASSCH2 (Bit 2) */ +#define VADC_G_CHASS_ASSCH2_Msk (0x4UL) /*!< VADC_G CHASS: ASSCH2 (Bitfield-Mask: 0x01) */ +#define VADC_G_CHASS_ASSCH3_Pos (3UL) /*!< VADC_G CHASS: ASSCH3 (Bit 3) */ +#define VADC_G_CHASS_ASSCH3_Msk (0x8UL) /*!< VADC_G CHASS: ASSCH3 (Bitfield-Mask: 0x01) */ +#define VADC_G_CHASS_ASSCH4_Pos (4UL) /*!< VADC_G CHASS: ASSCH4 (Bit 4) */ +#define VADC_G_CHASS_ASSCH4_Msk (0x10UL) /*!< VADC_G CHASS: ASSCH4 (Bitfield-Mask: 0x01) */ +#define VADC_G_CHASS_ASSCH5_Pos (5UL) /*!< VADC_G CHASS: ASSCH5 (Bit 5) */ +#define VADC_G_CHASS_ASSCH5_Msk (0x20UL) /*!< VADC_G CHASS: ASSCH5 (Bitfield-Mask: 0x01) */ +#define VADC_G_CHASS_ASSCH6_Pos (6UL) /*!< VADC_G CHASS: ASSCH6 (Bit 6) */ +#define VADC_G_CHASS_ASSCH6_Msk (0x40UL) /*!< VADC_G CHASS: ASSCH6 (Bitfield-Mask: 0x01) */ +#define VADC_G_CHASS_ASSCH7_Pos (7UL) /*!< VADC_G CHASS: ASSCH7 (Bit 7) */ +#define VADC_G_CHASS_ASSCH7_Msk (0x80UL) /*!< VADC_G CHASS: ASSCH7 (Bitfield-Mask: 0x01) */ + +/* -------------------------------- VADC_G_ICLASS ------------------------------- */ +#define VADC_G_ICLASS_STCS_Pos (0UL) /*!< VADC_G ICLASS: STCS (Bit 0) */ +#define VADC_G_ICLASS_STCS_Msk (0x1fUL) /*!< VADC_G ICLASS: STCS (Bitfield-Mask: 0x1f) */ +#define VADC_G_ICLASS_CMS_Pos (8UL) /*!< VADC_G ICLASS: CMS (Bit 8) */ +#define VADC_G_ICLASS_CMS_Msk (0x700UL) /*!< VADC_G ICLASS: CMS (Bitfield-Mask: 0x07) */ +#define VADC_G_ICLASS_STCE_Pos (16UL) /*!< VADC_G ICLASS: STCE (Bit 16) */ +#define VADC_G_ICLASS_STCE_Msk (0x1f0000UL) /*!< VADC_G ICLASS: STCE (Bitfield-Mask: 0x1f) */ +#define VADC_G_ICLASS_CME_Pos (24UL) /*!< VADC_G ICLASS: CME (Bit 24) */ +#define VADC_G_ICLASS_CME_Msk (0x7000000UL) /*!< VADC_G ICLASS: CME (Bitfield-Mask: 0x07) */ + +/* -------------------------------- VADC_G_ALIAS -------------------------------- */ +#define VADC_G_ALIAS_ALIAS0_Pos (0UL) /*!< VADC_G ALIAS: ALIAS0 (Bit 0) */ +#define VADC_G_ALIAS_ALIAS0_Msk (0x1fUL) /*!< VADC_G ALIAS: ALIAS0 (Bitfield-Mask: 0x1f) */ +#define VADC_G_ALIAS_ALIAS1_Pos (8UL) /*!< VADC_G ALIAS: ALIAS1 (Bit 8) */ +#define VADC_G_ALIAS_ALIAS1_Msk (0x1f00UL) /*!< VADC_G ALIAS: ALIAS1 (Bitfield-Mask: 0x1f) */ + +/* -------------------------------- VADC_G_BOUND -------------------------------- */ +#define VADC_G_BOUND_BOUNDARY0_Pos (0UL) /*!< VADC_G BOUND: BOUNDARY0 (Bit 0) */ +#define VADC_G_BOUND_BOUNDARY0_Msk (0xfffUL) /*!< VADC_G BOUND: BOUNDARY0 (Bitfield-Mask: 0xfff) */ +#define VADC_G_BOUND_BOUNDARY1_Pos (16UL) /*!< VADC_G BOUND: BOUNDARY1 (Bit 16) */ +#define VADC_G_BOUND_BOUNDARY1_Msk (0xfff0000UL) /*!< VADC_G BOUND: BOUNDARY1 (Bitfield-Mask: 0xfff) */ + +/* -------------------------------- VADC_G_SYNCTR ------------------------------- */ +#define VADC_G_SYNCTR_STSEL_Pos (0UL) /*!< VADC_G SYNCTR: STSEL (Bit 0) */ +#define VADC_G_SYNCTR_STSEL_Msk (0x3UL) /*!< VADC_G SYNCTR: STSEL (Bitfield-Mask: 0x03) */ +#define VADC_G_SYNCTR_EVALR1_Pos (4UL) /*!< VADC_G SYNCTR: EVALR1 (Bit 4) */ +#define VADC_G_SYNCTR_EVALR1_Msk (0x10UL) /*!< VADC_G SYNCTR: EVALR1 (Bitfield-Mask: 0x01) */ +#define VADC_G_SYNCTR_EVALR2_Pos (5UL) /*!< VADC_G SYNCTR: EVALR2 (Bit 5) */ +#define VADC_G_SYNCTR_EVALR2_Msk (0x20UL) /*!< VADC_G SYNCTR: EVALR2 (Bitfield-Mask: 0x01) */ +#define VADC_G_SYNCTR_EVALR3_Pos (6UL) /*!< VADC_G SYNCTR: EVALR3 (Bit 6) */ +#define VADC_G_SYNCTR_EVALR3_Msk (0x40UL) /*!< VADC_G SYNCTR: EVALR3 (Bitfield-Mask: 0x01) */ + +/* --------------------------------- VADC_G_BFL --------------------------------- */ +#define VADC_G_BFL_BFL0_Pos (0UL) /*!< VADC_G BFL: BFL0 (Bit 0) */ +#define VADC_G_BFL_BFL0_Msk (0x1UL) /*!< VADC_G BFL: BFL0 (Bitfield-Mask: 0x01) */ +#define VADC_G_BFL_BFL1_Pos (1UL) /*!< VADC_G BFL: BFL1 (Bit 1) */ +#define VADC_G_BFL_BFL1_Msk (0x2UL) /*!< VADC_G BFL: BFL1 (Bitfield-Mask: 0x01) */ +#define VADC_G_BFL_BFL2_Pos (2UL) /*!< VADC_G BFL: BFL2 (Bit 2) */ +#define VADC_G_BFL_BFL2_Msk (0x4UL) /*!< VADC_G BFL: BFL2 (Bitfield-Mask: 0x01) */ +#define VADC_G_BFL_BFL3_Pos (3UL) /*!< VADC_G BFL: BFL3 (Bit 3) */ +#define VADC_G_BFL_BFL3_Msk (0x8UL) /*!< VADC_G BFL: BFL3 (Bitfield-Mask: 0x01) */ +#define VADC_G_BFL_BFA0_Pos (8UL) /*!< VADC_G BFL: BFA0 (Bit 8) */ +#define VADC_G_BFL_BFA0_Msk (0x100UL) /*!< VADC_G BFL: BFA0 (Bitfield-Mask: 0x01) */ +#define VADC_G_BFL_BFA1_Pos (9UL) /*!< VADC_G BFL: BFA1 (Bit 9) */ +#define VADC_G_BFL_BFA1_Msk (0x200UL) /*!< VADC_G BFL: BFA1 (Bitfield-Mask: 0x01) */ +#define VADC_G_BFL_BFA2_Pos (10UL) /*!< VADC_G BFL: BFA2 (Bit 10) */ +#define VADC_G_BFL_BFA2_Msk (0x400UL) /*!< VADC_G BFL: BFA2 (Bitfield-Mask: 0x01) */ +#define VADC_G_BFL_BFA3_Pos (11UL) /*!< VADC_G BFL: BFA3 (Bit 11) */ +#define VADC_G_BFL_BFA3_Msk (0x800UL) /*!< VADC_G BFL: BFA3 (Bitfield-Mask: 0x01) */ +#define VADC_G_BFL_BFI0_Pos (16UL) /*!< VADC_G BFL: BFI0 (Bit 16) */ +#define VADC_G_BFL_BFI0_Msk (0x10000UL) /*!< VADC_G BFL: BFI0 (Bitfield-Mask: 0x01) */ +#define VADC_G_BFL_BFI1_Pos (17UL) /*!< VADC_G BFL: BFI1 (Bit 17) */ +#define VADC_G_BFL_BFI1_Msk (0x20000UL) /*!< VADC_G BFL: BFI1 (Bitfield-Mask: 0x01) */ +#define VADC_G_BFL_BFI2_Pos (18UL) /*!< VADC_G BFL: BFI2 (Bit 18) */ +#define VADC_G_BFL_BFI2_Msk (0x40000UL) /*!< VADC_G BFL: BFI2 (Bitfield-Mask: 0x01) */ +#define VADC_G_BFL_BFI3_Pos (19UL) /*!< VADC_G BFL: BFI3 (Bit 19) */ +#define VADC_G_BFL_BFI3_Msk (0x80000UL) /*!< VADC_G BFL: BFI3 (Bitfield-Mask: 0x01) */ + +/* --------------------------------- VADC_G_BFLS -------------------------------- */ +#define VADC_G_BFLS_BFC0_Pos (0UL) /*!< VADC_G BFLS: BFC0 (Bit 0) */ +#define VADC_G_BFLS_BFC0_Msk (0x1UL) /*!< VADC_G BFLS: BFC0 (Bitfield-Mask: 0x01) */ +#define VADC_G_BFLS_BFC1_Pos (1UL) /*!< VADC_G BFLS: BFC1 (Bit 1) */ +#define VADC_G_BFLS_BFC1_Msk (0x2UL) /*!< VADC_G BFLS: BFC1 (Bitfield-Mask: 0x01) */ +#define VADC_G_BFLS_BFC2_Pos (2UL) /*!< VADC_G BFLS: BFC2 (Bit 2) */ +#define VADC_G_BFLS_BFC2_Msk (0x4UL) /*!< VADC_G BFLS: BFC2 (Bitfield-Mask: 0x01) */ +#define VADC_G_BFLS_BFC3_Pos (3UL) /*!< VADC_G BFLS: BFC3 (Bit 3) */ +#define VADC_G_BFLS_BFC3_Msk (0x8UL) /*!< VADC_G BFLS: BFC3 (Bitfield-Mask: 0x01) */ +#define VADC_G_BFLS_BFS0_Pos (16UL) /*!< VADC_G BFLS: BFS0 (Bit 16) */ +#define VADC_G_BFLS_BFS0_Msk (0x10000UL) /*!< VADC_G BFLS: BFS0 (Bitfield-Mask: 0x01) */ +#define VADC_G_BFLS_BFS1_Pos (17UL) /*!< VADC_G BFLS: BFS1 (Bit 17) */ +#define VADC_G_BFLS_BFS1_Msk (0x20000UL) /*!< VADC_G BFLS: BFS1 (Bitfield-Mask: 0x01) */ +#define VADC_G_BFLS_BFS2_Pos (18UL) /*!< VADC_G BFLS: BFS2 (Bit 18) */ +#define VADC_G_BFLS_BFS2_Msk (0x40000UL) /*!< VADC_G BFLS: BFS2 (Bitfield-Mask: 0x01) */ +#define VADC_G_BFLS_BFS3_Pos (19UL) /*!< VADC_G BFLS: BFS3 (Bit 19) */ +#define VADC_G_BFLS_BFS3_Msk (0x80000UL) /*!< VADC_G BFLS: BFS3 (Bitfield-Mask: 0x01) */ + +/* --------------------------------- VADC_G_BFLC -------------------------------- */ +#define VADC_G_BFLC_BFM0_Pos (0UL) /*!< VADC_G BFLC: BFM0 (Bit 0) */ +#define VADC_G_BFLC_BFM0_Msk (0xfUL) /*!< VADC_G BFLC: BFM0 (Bitfield-Mask: 0x0f) */ +#define VADC_G_BFLC_BFM1_Pos (4UL) /*!< VADC_G BFLC: BFM1 (Bit 4) */ +#define VADC_G_BFLC_BFM1_Msk (0xf0UL) /*!< VADC_G BFLC: BFM1 (Bitfield-Mask: 0x0f) */ +#define VADC_G_BFLC_BFM2_Pos (8UL) /*!< VADC_G BFLC: BFM2 (Bit 8) */ +#define VADC_G_BFLC_BFM2_Msk (0xf00UL) /*!< VADC_G BFLC: BFM2 (Bitfield-Mask: 0x0f) */ +#define VADC_G_BFLC_BFM3_Pos (12UL) /*!< VADC_G BFLC: BFM3 (Bit 12) */ +#define VADC_G_BFLC_BFM3_Msk (0xf000UL) /*!< VADC_G BFLC: BFM3 (Bitfield-Mask: 0x0f) */ + +/* -------------------------------- VADC_G_BFLNP -------------------------------- */ +#define VADC_G_BFLNP_BFL0NP_Pos (0UL) /*!< VADC_G BFLNP: BFL0NP (Bit 0) */ +#define VADC_G_BFLNP_BFL0NP_Msk (0xfUL) /*!< VADC_G BFLNP: BFL0NP (Bitfield-Mask: 0x0f) */ +#define VADC_G_BFLNP_BFL1NP_Pos (4UL) /*!< VADC_G BFLNP: BFL1NP (Bit 4) */ +#define VADC_G_BFLNP_BFL1NP_Msk (0xf0UL) /*!< VADC_G BFLNP: BFL1NP (Bitfield-Mask: 0x0f) */ +#define VADC_G_BFLNP_BFL2NP_Pos (8UL) /*!< VADC_G BFLNP: BFL2NP (Bit 8) */ +#define VADC_G_BFLNP_BFL2NP_Msk (0xf00UL) /*!< VADC_G BFLNP: BFL2NP (Bitfield-Mask: 0x0f) */ +#define VADC_G_BFLNP_BFL3NP_Pos (12UL) /*!< VADC_G BFLNP: BFL3NP (Bit 12) */ +#define VADC_G_BFLNP_BFL3NP_Msk (0xf000UL) /*!< VADC_G BFLNP: BFL3NP (Bitfield-Mask: 0x0f) */ + +/* -------------------------------- VADC_G_QCTRL0 ------------------------------- */ +#define VADC_G_QCTRL0_SRCRESREG_Pos (0UL) /*!< VADC_G QCTRL0: SRCRESREG (Bit 0) */ +#define VADC_G_QCTRL0_SRCRESREG_Msk (0xfUL) /*!< VADC_G QCTRL0: SRCRESREG (Bitfield-Mask: 0x0f) */ +#define VADC_G_QCTRL0_XTSEL_Pos (8UL) /*!< VADC_G QCTRL0: XTSEL (Bit 8) */ +#define VADC_G_QCTRL0_XTSEL_Msk (0xf00UL) /*!< VADC_G QCTRL0: XTSEL (Bitfield-Mask: 0x0f) */ +#define VADC_G_QCTRL0_XTLVL_Pos (12UL) /*!< VADC_G QCTRL0: XTLVL (Bit 12) */ +#define VADC_G_QCTRL0_XTLVL_Msk (0x1000UL) /*!< VADC_G QCTRL0: XTLVL (Bitfield-Mask: 0x01) */ +#define VADC_G_QCTRL0_XTMODE_Pos (13UL) /*!< VADC_G QCTRL0: XTMODE (Bit 13) */ +#define VADC_G_QCTRL0_XTMODE_Msk (0x6000UL) /*!< VADC_G QCTRL0: XTMODE (Bitfield-Mask: 0x03) */ +#define VADC_G_QCTRL0_XTWC_Pos (15UL) /*!< VADC_G QCTRL0: XTWC (Bit 15) */ +#define VADC_G_QCTRL0_XTWC_Msk (0x8000UL) /*!< VADC_G QCTRL0: XTWC (Bitfield-Mask: 0x01) */ +#define VADC_G_QCTRL0_GTSEL_Pos (16UL) /*!< VADC_G QCTRL0: GTSEL (Bit 16) */ +#define VADC_G_QCTRL0_GTSEL_Msk (0xf0000UL) /*!< VADC_G QCTRL0: GTSEL (Bitfield-Mask: 0x0f) */ +#define VADC_G_QCTRL0_GTLVL_Pos (20UL) /*!< VADC_G QCTRL0: GTLVL (Bit 20) */ +#define VADC_G_QCTRL0_GTLVL_Msk (0x100000UL) /*!< VADC_G QCTRL0: GTLVL (Bitfield-Mask: 0x01) */ +#define VADC_G_QCTRL0_GTWC_Pos (23UL) /*!< VADC_G QCTRL0: GTWC (Bit 23) */ +#define VADC_G_QCTRL0_GTWC_Msk (0x800000UL) /*!< VADC_G QCTRL0: GTWC (Bitfield-Mask: 0x01) */ +#define VADC_G_QCTRL0_TMEN_Pos (28UL) /*!< VADC_G QCTRL0: TMEN (Bit 28) */ +#define VADC_G_QCTRL0_TMEN_Msk (0x10000000UL) /*!< VADC_G QCTRL0: TMEN (Bitfield-Mask: 0x01) */ +#define VADC_G_QCTRL0_TMWC_Pos (31UL) /*!< VADC_G QCTRL0: TMWC (Bit 31) */ +#define VADC_G_QCTRL0_TMWC_Msk (0x80000000UL) /*!< VADC_G QCTRL0: TMWC (Bitfield-Mask: 0x01) */ + +/* --------------------------------- VADC_G_QMR0 -------------------------------- */ +#define VADC_G_QMR0_ENGT_Pos (0UL) /*!< VADC_G QMR0: ENGT (Bit 0) */ +#define VADC_G_QMR0_ENGT_Msk (0x3UL) /*!< VADC_G QMR0: ENGT (Bitfield-Mask: 0x03) */ +#define VADC_G_QMR0_ENTR_Pos (2UL) /*!< VADC_G QMR0: ENTR (Bit 2) */ +#define VADC_G_QMR0_ENTR_Msk (0x4UL) /*!< VADC_G QMR0: ENTR (Bitfield-Mask: 0x01) */ +#define VADC_G_QMR0_CLRV_Pos (8UL) /*!< VADC_G QMR0: CLRV (Bit 8) */ +#define VADC_G_QMR0_CLRV_Msk (0x100UL) /*!< VADC_G QMR0: CLRV (Bitfield-Mask: 0x01) */ +#define VADC_G_QMR0_TREV_Pos (9UL) /*!< VADC_G QMR0: TREV (Bit 9) */ +#define VADC_G_QMR0_TREV_Msk (0x200UL) /*!< VADC_G QMR0: TREV (Bitfield-Mask: 0x01) */ +#define VADC_G_QMR0_FLUSH_Pos (10UL) /*!< VADC_G QMR0: FLUSH (Bit 10) */ +#define VADC_G_QMR0_FLUSH_Msk (0x400UL) /*!< VADC_G QMR0: FLUSH (Bitfield-Mask: 0x01) */ +#define VADC_G_QMR0_CEV_Pos (11UL) /*!< VADC_G QMR0: CEV (Bit 11) */ +#define VADC_G_QMR0_CEV_Msk (0x800UL) /*!< VADC_G QMR0: CEV (Bitfield-Mask: 0x01) */ +#define VADC_G_QMR0_RPTDIS_Pos (16UL) /*!< VADC_G QMR0: RPTDIS (Bit 16) */ +#define VADC_G_QMR0_RPTDIS_Msk (0x10000UL) /*!< VADC_G QMR0: RPTDIS (Bitfield-Mask: 0x01) */ + +/* --------------------------------- VADC_G_QSR0 -------------------------------- */ +#define VADC_G_QSR0_FILL_Pos (0UL) /*!< VADC_G QSR0: FILL (Bit 0) */ +#define VADC_G_QSR0_FILL_Msk (0xfUL) /*!< VADC_G QSR0: FILL (Bitfield-Mask: 0x0f) */ +#define VADC_G_QSR0_EMPTY_Pos (5UL) /*!< VADC_G QSR0: EMPTY (Bit 5) */ +#define VADC_G_QSR0_EMPTY_Msk (0x20UL) /*!< VADC_G QSR0: EMPTY (Bitfield-Mask: 0x01) */ +#define VADC_G_QSR0_REQGT_Pos (7UL) /*!< VADC_G QSR0: REQGT (Bit 7) */ +#define VADC_G_QSR0_REQGT_Msk (0x80UL) /*!< VADC_G QSR0: REQGT (Bitfield-Mask: 0x01) */ +#define VADC_G_QSR0_EV_Pos (8UL) /*!< VADC_G QSR0: EV (Bit 8) */ +#define VADC_G_QSR0_EV_Msk (0x100UL) /*!< VADC_G QSR0: EV (Bitfield-Mask: 0x01) */ + +/* --------------------------------- VADC_G_Q0R0 -------------------------------- */ +#define VADC_G_Q0R0_REQCHNR_Pos (0UL) /*!< VADC_G Q0R0: REQCHNR (Bit 0) */ +#define VADC_G_Q0R0_REQCHNR_Msk (0x1fUL) /*!< VADC_G Q0R0: REQCHNR (Bitfield-Mask: 0x1f) */ +#define VADC_G_Q0R0_RF_Pos (5UL) /*!< VADC_G Q0R0: RF (Bit 5) */ +#define VADC_G_Q0R0_RF_Msk (0x20UL) /*!< VADC_G Q0R0: RF (Bitfield-Mask: 0x01) */ +#define VADC_G_Q0R0_ENSI_Pos (6UL) /*!< VADC_G Q0R0: ENSI (Bit 6) */ +#define VADC_G_Q0R0_ENSI_Msk (0x40UL) /*!< VADC_G Q0R0: ENSI (Bitfield-Mask: 0x01) */ +#define VADC_G_Q0R0_EXTR_Pos (7UL) /*!< VADC_G Q0R0: EXTR (Bit 7) */ +#define VADC_G_Q0R0_EXTR_Msk (0x80UL) /*!< VADC_G Q0R0: EXTR (Bitfield-Mask: 0x01) */ +#define VADC_G_Q0R0_V_Pos (8UL) /*!< VADC_G Q0R0: V (Bit 8) */ +#define VADC_G_Q0R0_V_Msk (0x100UL) /*!< VADC_G Q0R0: V (Bitfield-Mask: 0x01) */ + +/* -------------------------------- VADC_G_QINR0 -------------------------------- */ +#define VADC_G_QINR0_REQCHNR_Pos (0UL) /*!< VADC_G QINR0: REQCHNR (Bit 0) */ +#define VADC_G_QINR0_REQCHNR_Msk (0x1fUL) /*!< VADC_G QINR0: REQCHNR (Bitfield-Mask: 0x1f) */ +#define VADC_G_QINR0_RF_Pos (5UL) /*!< VADC_G QINR0: RF (Bit 5) */ +#define VADC_G_QINR0_RF_Msk (0x20UL) /*!< VADC_G QINR0: RF (Bitfield-Mask: 0x01) */ +#define VADC_G_QINR0_ENSI_Pos (6UL) /*!< VADC_G QINR0: ENSI (Bit 6) */ +#define VADC_G_QINR0_ENSI_Msk (0x40UL) /*!< VADC_G QINR0: ENSI (Bitfield-Mask: 0x01) */ +#define VADC_G_QINR0_EXTR_Pos (7UL) /*!< VADC_G QINR0: EXTR (Bit 7) */ +#define VADC_G_QINR0_EXTR_Msk (0x80UL) /*!< VADC_G QINR0: EXTR (Bitfield-Mask: 0x01) */ + +/* -------------------------------- VADC_G_QBUR0 -------------------------------- */ +#define VADC_G_QBUR0_REQCHNR_Pos (0UL) /*!< VADC_G QBUR0: REQCHNR (Bit 0) */ +#define VADC_G_QBUR0_REQCHNR_Msk (0x1fUL) /*!< VADC_G QBUR0: REQCHNR (Bitfield-Mask: 0x1f) */ +#define VADC_G_QBUR0_RF_Pos (5UL) /*!< VADC_G QBUR0: RF (Bit 5) */ +#define VADC_G_QBUR0_RF_Msk (0x20UL) /*!< VADC_G QBUR0: RF (Bitfield-Mask: 0x01) */ +#define VADC_G_QBUR0_ENSI_Pos (6UL) /*!< VADC_G QBUR0: ENSI (Bit 6) */ +#define VADC_G_QBUR0_ENSI_Msk (0x40UL) /*!< VADC_G QBUR0: ENSI (Bitfield-Mask: 0x01) */ +#define VADC_G_QBUR0_EXTR_Pos (7UL) /*!< VADC_G QBUR0: EXTR (Bit 7) */ +#define VADC_G_QBUR0_EXTR_Msk (0x80UL) /*!< VADC_G QBUR0: EXTR (Bitfield-Mask: 0x01) */ +#define VADC_G_QBUR0_V_Pos (8UL) /*!< VADC_G QBUR0: V (Bit 8) */ +#define VADC_G_QBUR0_V_Msk (0x100UL) /*!< VADC_G QBUR0: V (Bitfield-Mask: 0x01) */ + +/* -------------------------------- VADC_G_ASCTRL ------------------------------- */ +#define VADC_G_ASCTRL_SRCRESREG_Pos (0UL) /*!< VADC_G ASCTRL: SRCRESREG (Bit 0) */ +#define VADC_G_ASCTRL_SRCRESREG_Msk (0xfUL) /*!< VADC_G ASCTRL: SRCRESREG (Bitfield-Mask: 0x0f) */ +#define VADC_G_ASCTRL_XTSEL_Pos (8UL) /*!< VADC_G ASCTRL: XTSEL (Bit 8) */ +#define VADC_G_ASCTRL_XTSEL_Msk (0xf00UL) /*!< VADC_G ASCTRL: XTSEL (Bitfield-Mask: 0x0f) */ +#define VADC_G_ASCTRL_XTLVL_Pos (12UL) /*!< VADC_G ASCTRL: XTLVL (Bit 12) */ +#define VADC_G_ASCTRL_XTLVL_Msk (0x1000UL) /*!< VADC_G ASCTRL: XTLVL (Bitfield-Mask: 0x01) */ +#define VADC_G_ASCTRL_XTMODE_Pos (13UL) /*!< VADC_G ASCTRL: XTMODE (Bit 13) */ +#define VADC_G_ASCTRL_XTMODE_Msk (0x6000UL) /*!< VADC_G ASCTRL: XTMODE (Bitfield-Mask: 0x03) */ +#define VADC_G_ASCTRL_XTWC_Pos (15UL) /*!< VADC_G ASCTRL: XTWC (Bit 15) */ +#define VADC_G_ASCTRL_XTWC_Msk (0x8000UL) /*!< VADC_G ASCTRL: XTWC (Bitfield-Mask: 0x01) */ +#define VADC_G_ASCTRL_GTSEL_Pos (16UL) /*!< VADC_G ASCTRL: GTSEL (Bit 16) */ +#define VADC_G_ASCTRL_GTSEL_Msk (0xf0000UL) /*!< VADC_G ASCTRL: GTSEL (Bitfield-Mask: 0x0f) */ +#define VADC_G_ASCTRL_GTLVL_Pos (20UL) /*!< VADC_G ASCTRL: GTLVL (Bit 20) */ +#define VADC_G_ASCTRL_GTLVL_Msk (0x100000UL) /*!< VADC_G ASCTRL: GTLVL (Bitfield-Mask: 0x01) */ +#define VADC_G_ASCTRL_GTWC_Pos (23UL) /*!< VADC_G ASCTRL: GTWC (Bit 23) */ +#define VADC_G_ASCTRL_GTWC_Msk (0x800000UL) /*!< VADC_G ASCTRL: GTWC (Bitfield-Mask: 0x01) */ +#define VADC_G_ASCTRL_TMEN_Pos (28UL) /*!< VADC_G ASCTRL: TMEN (Bit 28) */ +#define VADC_G_ASCTRL_TMEN_Msk (0x10000000UL) /*!< VADC_G ASCTRL: TMEN (Bitfield-Mask: 0x01) */ +#define VADC_G_ASCTRL_TMWC_Pos (31UL) /*!< VADC_G ASCTRL: TMWC (Bit 31) */ +#define VADC_G_ASCTRL_TMWC_Msk (0x80000000UL) /*!< VADC_G ASCTRL: TMWC (Bitfield-Mask: 0x01) */ + +/* --------------------------------- VADC_G_ASMR -------------------------------- */ +#define VADC_G_ASMR_ENGT_Pos (0UL) /*!< VADC_G ASMR: ENGT (Bit 0) */ +#define VADC_G_ASMR_ENGT_Msk (0x3UL) /*!< VADC_G ASMR: ENGT (Bitfield-Mask: 0x03) */ +#define VADC_G_ASMR_ENTR_Pos (2UL) /*!< VADC_G ASMR: ENTR (Bit 2) */ +#define VADC_G_ASMR_ENTR_Msk (0x4UL) /*!< VADC_G ASMR: ENTR (Bitfield-Mask: 0x01) */ +#define VADC_G_ASMR_ENSI_Pos (3UL) /*!< VADC_G ASMR: ENSI (Bit 3) */ +#define VADC_G_ASMR_ENSI_Msk (0x8UL) /*!< VADC_G ASMR: ENSI (Bitfield-Mask: 0x01) */ +#define VADC_G_ASMR_SCAN_Pos (4UL) /*!< VADC_G ASMR: SCAN (Bit 4) */ +#define VADC_G_ASMR_SCAN_Msk (0x10UL) /*!< VADC_G ASMR: SCAN (Bitfield-Mask: 0x01) */ +#define VADC_G_ASMR_LDM_Pos (5UL) /*!< VADC_G ASMR: LDM (Bit 5) */ +#define VADC_G_ASMR_LDM_Msk (0x20UL) /*!< VADC_G ASMR: LDM (Bitfield-Mask: 0x01) */ +#define VADC_G_ASMR_REQGT_Pos (7UL) /*!< VADC_G ASMR: REQGT (Bit 7) */ +#define VADC_G_ASMR_REQGT_Msk (0x80UL) /*!< VADC_G ASMR: REQGT (Bitfield-Mask: 0x01) */ +#define VADC_G_ASMR_CLRPND_Pos (8UL) /*!< VADC_G ASMR: CLRPND (Bit 8) */ +#define VADC_G_ASMR_CLRPND_Msk (0x100UL) /*!< VADC_G ASMR: CLRPND (Bitfield-Mask: 0x01) */ +#define VADC_G_ASMR_LDEV_Pos (9UL) /*!< VADC_G ASMR: LDEV (Bit 9) */ +#define VADC_G_ASMR_LDEV_Msk (0x200UL) /*!< VADC_G ASMR: LDEV (Bitfield-Mask: 0x01) */ +#define VADC_G_ASMR_RPTDIS_Pos (16UL) /*!< VADC_G ASMR: RPTDIS (Bit 16) */ +#define VADC_G_ASMR_RPTDIS_Msk (0x10000UL) /*!< VADC_G ASMR: RPTDIS (Bitfield-Mask: 0x01) */ + +/* -------------------------------- VADC_G_ASSEL -------------------------------- */ +#define VADC_G_ASSEL_CHSEL0_Pos (0UL) /*!< VADC_G ASSEL: CHSEL0 (Bit 0) */ +#define VADC_G_ASSEL_CHSEL0_Msk (0x1UL) /*!< VADC_G ASSEL: CHSEL0 (Bitfield-Mask: 0x01) */ +#define VADC_G_ASSEL_CHSEL1_Pos (1UL) /*!< VADC_G ASSEL: CHSEL1 (Bit 1) */ +#define VADC_G_ASSEL_CHSEL1_Msk (0x2UL) /*!< VADC_G ASSEL: CHSEL1 (Bitfield-Mask: 0x01) */ +#define VADC_G_ASSEL_CHSEL2_Pos (2UL) /*!< VADC_G ASSEL: CHSEL2 (Bit 2) */ +#define VADC_G_ASSEL_CHSEL2_Msk (0x4UL) /*!< VADC_G ASSEL: CHSEL2 (Bitfield-Mask: 0x01) */ +#define VADC_G_ASSEL_CHSEL3_Pos (3UL) /*!< VADC_G ASSEL: CHSEL3 (Bit 3) */ +#define VADC_G_ASSEL_CHSEL3_Msk (0x8UL) /*!< VADC_G ASSEL: CHSEL3 (Bitfield-Mask: 0x01) */ +#define VADC_G_ASSEL_CHSEL4_Pos (4UL) /*!< VADC_G ASSEL: CHSEL4 (Bit 4) */ +#define VADC_G_ASSEL_CHSEL4_Msk (0x10UL) /*!< VADC_G ASSEL: CHSEL4 (Bitfield-Mask: 0x01) */ +#define VADC_G_ASSEL_CHSEL5_Pos (5UL) /*!< VADC_G ASSEL: CHSEL5 (Bit 5) */ +#define VADC_G_ASSEL_CHSEL5_Msk (0x20UL) /*!< VADC_G ASSEL: CHSEL5 (Bitfield-Mask: 0x01) */ +#define VADC_G_ASSEL_CHSEL6_Pos (6UL) /*!< VADC_G ASSEL: CHSEL6 (Bit 6) */ +#define VADC_G_ASSEL_CHSEL6_Msk (0x40UL) /*!< VADC_G ASSEL: CHSEL6 (Bitfield-Mask: 0x01) */ +#define VADC_G_ASSEL_CHSEL7_Pos (7UL) /*!< VADC_G ASSEL: CHSEL7 (Bit 7) */ +#define VADC_G_ASSEL_CHSEL7_Msk (0x80UL) /*!< VADC_G ASSEL: CHSEL7 (Bitfield-Mask: 0x01) */ + +/* -------------------------------- VADC_G_ASPND -------------------------------- */ +#define VADC_G_ASPND_CHPND0_Pos (0UL) /*!< VADC_G ASPND: CHPND0 (Bit 0) */ +#define VADC_G_ASPND_CHPND0_Msk (0x1UL) /*!< VADC_G ASPND: CHPND0 (Bitfield-Mask: 0x01) */ +#define VADC_G_ASPND_CHPND1_Pos (1UL) /*!< VADC_G ASPND: CHPND1 (Bit 1) */ +#define VADC_G_ASPND_CHPND1_Msk (0x2UL) /*!< VADC_G ASPND: CHPND1 (Bitfield-Mask: 0x01) */ +#define VADC_G_ASPND_CHPND2_Pos (2UL) /*!< VADC_G ASPND: CHPND2 (Bit 2) */ +#define VADC_G_ASPND_CHPND2_Msk (0x4UL) /*!< VADC_G ASPND: CHPND2 (Bitfield-Mask: 0x01) */ +#define VADC_G_ASPND_CHPND3_Pos (3UL) /*!< VADC_G ASPND: CHPND3 (Bit 3) */ +#define VADC_G_ASPND_CHPND3_Msk (0x8UL) /*!< VADC_G ASPND: CHPND3 (Bitfield-Mask: 0x01) */ +#define VADC_G_ASPND_CHPND4_Pos (4UL) /*!< VADC_G ASPND: CHPND4 (Bit 4) */ +#define VADC_G_ASPND_CHPND4_Msk (0x10UL) /*!< VADC_G ASPND: CHPND4 (Bitfield-Mask: 0x01) */ +#define VADC_G_ASPND_CHPND5_Pos (5UL) /*!< VADC_G ASPND: CHPND5 (Bit 5) */ +#define VADC_G_ASPND_CHPND5_Msk (0x20UL) /*!< VADC_G ASPND: CHPND5 (Bitfield-Mask: 0x01) */ +#define VADC_G_ASPND_CHPND6_Pos (6UL) /*!< VADC_G ASPND: CHPND6 (Bit 6) */ +#define VADC_G_ASPND_CHPND6_Msk (0x40UL) /*!< VADC_G ASPND: CHPND6 (Bitfield-Mask: 0x01) */ +#define VADC_G_ASPND_CHPND7_Pos (7UL) /*!< VADC_G ASPND: CHPND7 (Bit 7) */ +#define VADC_G_ASPND_CHPND7_Msk (0x80UL) /*!< VADC_G ASPND: CHPND7 (Bitfield-Mask: 0x01) */ + +/* -------------------------------- VADC_G_CEFLAG ------------------------------- */ +#define VADC_G_CEFLAG_CEV0_Pos (0UL) /*!< VADC_G CEFLAG: CEV0 (Bit 0) */ +#define VADC_G_CEFLAG_CEV0_Msk (0x1UL) /*!< VADC_G CEFLAG: CEV0 (Bitfield-Mask: 0x01) */ +#define VADC_G_CEFLAG_CEV1_Pos (1UL) /*!< VADC_G CEFLAG: CEV1 (Bit 1) */ +#define VADC_G_CEFLAG_CEV1_Msk (0x2UL) /*!< VADC_G CEFLAG: CEV1 (Bitfield-Mask: 0x01) */ +#define VADC_G_CEFLAG_CEV2_Pos (2UL) /*!< VADC_G CEFLAG: CEV2 (Bit 2) */ +#define VADC_G_CEFLAG_CEV2_Msk (0x4UL) /*!< VADC_G CEFLAG: CEV2 (Bitfield-Mask: 0x01) */ +#define VADC_G_CEFLAG_CEV3_Pos (3UL) /*!< VADC_G CEFLAG: CEV3 (Bit 3) */ +#define VADC_G_CEFLAG_CEV3_Msk (0x8UL) /*!< VADC_G CEFLAG: CEV3 (Bitfield-Mask: 0x01) */ +#define VADC_G_CEFLAG_CEV4_Pos (4UL) /*!< VADC_G CEFLAG: CEV4 (Bit 4) */ +#define VADC_G_CEFLAG_CEV4_Msk (0x10UL) /*!< VADC_G CEFLAG: CEV4 (Bitfield-Mask: 0x01) */ +#define VADC_G_CEFLAG_CEV5_Pos (5UL) /*!< VADC_G CEFLAG: CEV5 (Bit 5) */ +#define VADC_G_CEFLAG_CEV5_Msk (0x20UL) /*!< VADC_G CEFLAG: CEV5 (Bitfield-Mask: 0x01) */ +#define VADC_G_CEFLAG_CEV6_Pos (6UL) /*!< VADC_G CEFLAG: CEV6 (Bit 6) */ +#define VADC_G_CEFLAG_CEV6_Msk (0x40UL) /*!< VADC_G CEFLAG: CEV6 (Bitfield-Mask: 0x01) */ +#define VADC_G_CEFLAG_CEV7_Pos (7UL) /*!< VADC_G CEFLAG: CEV7 (Bit 7) */ +#define VADC_G_CEFLAG_CEV7_Msk (0x80UL) /*!< VADC_G CEFLAG: CEV7 (Bitfield-Mask: 0x01) */ + +/* -------------------------------- VADC_G_REFLAG ------------------------------- */ +#define VADC_G_REFLAG_REV0_Pos (0UL) /*!< VADC_G REFLAG: REV0 (Bit 0) */ +#define VADC_G_REFLAG_REV0_Msk (0x1UL) /*!< VADC_G REFLAG: REV0 (Bitfield-Mask: 0x01) */ +#define VADC_G_REFLAG_REV1_Pos (1UL) /*!< VADC_G REFLAG: REV1 (Bit 1) */ +#define VADC_G_REFLAG_REV1_Msk (0x2UL) /*!< VADC_G REFLAG: REV1 (Bitfield-Mask: 0x01) */ +#define VADC_G_REFLAG_REV2_Pos (2UL) /*!< VADC_G REFLAG: REV2 (Bit 2) */ +#define VADC_G_REFLAG_REV2_Msk (0x4UL) /*!< VADC_G REFLAG: REV2 (Bitfield-Mask: 0x01) */ +#define VADC_G_REFLAG_REV3_Pos (3UL) /*!< VADC_G REFLAG: REV3 (Bit 3) */ +#define VADC_G_REFLAG_REV3_Msk (0x8UL) /*!< VADC_G REFLAG: REV3 (Bitfield-Mask: 0x01) */ +#define VADC_G_REFLAG_REV4_Pos (4UL) /*!< VADC_G REFLAG: REV4 (Bit 4) */ +#define VADC_G_REFLAG_REV4_Msk (0x10UL) /*!< VADC_G REFLAG: REV4 (Bitfield-Mask: 0x01) */ +#define VADC_G_REFLAG_REV5_Pos (5UL) /*!< VADC_G REFLAG: REV5 (Bit 5) */ +#define VADC_G_REFLAG_REV5_Msk (0x20UL) /*!< VADC_G REFLAG: REV5 (Bitfield-Mask: 0x01) */ +#define VADC_G_REFLAG_REV6_Pos (6UL) /*!< VADC_G REFLAG: REV6 (Bit 6) */ +#define VADC_G_REFLAG_REV6_Msk (0x40UL) /*!< VADC_G REFLAG: REV6 (Bitfield-Mask: 0x01) */ +#define VADC_G_REFLAG_REV7_Pos (7UL) /*!< VADC_G REFLAG: REV7 (Bit 7) */ +#define VADC_G_REFLAG_REV7_Msk (0x80UL) /*!< VADC_G REFLAG: REV7 (Bitfield-Mask: 0x01) */ +#define VADC_G_REFLAG_REV8_Pos (8UL) /*!< VADC_G REFLAG: REV8 (Bit 8) */ +#define VADC_G_REFLAG_REV8_Msk (0x100UL) /*!< VADC_G REFLAG: REV8 (Bitfield-Mask: 0x01) */ +#define VADC_G_REFLAG_REV9_Pos (9UL) /*!< VADC_G REFLAG: REV9 (Bit 9) */ +#define VADC_G_REFLAG_REV9_Msk (0x200UL) /*!< VADC_G REFLAG: REV9 (Bitfield-Mask: 0x01) */ +#define VADC_G_REFLAG_REV10_Pos (10UL) /*!< VADC_G REFLAG: REV10 (Bit 10) */ +#define VADC_G_REFLAG_REV10_Msk (0x400UL) /*!< VADC_G REFLAG: REV10 (Bitfield-Mask: 0x01) */ +#define VADC_G_REFLAG_REV11_Pos (11UL) /*!< VADC_G REFLAG: REV11 (Bit 11) */ +#define VADC_G_REFLAG_REV11_Msk (0x800UL) /*!< VADC_G REFLAG: REV11 (Bitfield-Mask: 0x01) */ +#define VADC_G_REFLAG_REV12_Pos (12UL) /*!< VADC_G REFLAG: REV12 (Bit 12) */ +#define VADC_G_REFLAG_REV12_Msk (0x1000UL) /*!< VADC_G REFLAG: REV12 (Bitfield-Mask: 0x01) */ +#define VADC_G_REFLAG_REV13_Pos (13UL) /*!< VADC_G REFLAG: REV13 (Bit 13) */ +#define VADC_G_REFLAG_REV13_Msk (0x2000UL) /*!< VADC_G REFLAG: REV13 (Bitfield-Mask: 0x01) */ +#define VADC_G_REFLAG_REV14_Pos (14UL) /*!< VADC_G REFLAG: REV14 (Bit 14) */ +#define VADC_G_REFLAG_REV14_Msk (0x4000UL) /*!< VADC_G REFLAG: REV14 (Bitfield-Mask: 0x01) */ +#define VADC_G_REFLAG_REV15_Pos (15UL) /*!< VADC_G REFLAG: REV15 (Bit 15) */ +#define VADC_G_REFLAG_REV15_Msk (0x8000UL) /*!< VADC_G REFLAG: REV15 (Bitfield-Mask: 0x01) */ + +/* -------------------------------- VADC_G_SEFLAG ------------------------------- */ +#define VADC_G_SEFLAG_SEV0_Pos (0UL) /*!< VADC_G SEFLAG: SEV0 (Bit 0) */ +#define VADC_G_SEFLAG_SEV0_Msk (0x1UL) /*!< VADC_G SEFLAG: SEV0 (Bitfield-Mask: 0x01) */ +#define VADC_G_SEFLAG_SEV1_Pos (1UL) /*!< VADC_G SEFLAG: SEV1 (Bit 1) */ +#define VADC_G_SEFLAG_SEV1_Msk (0x2UL) /*!< VADC_G SEFLAG: SEV1 (Bitfield-Mask: 0x01) */ + +/* -------------------------------- VADC_G_CEFCLR ------------------------------- */ +#define VADC_G_CEFCLR_CEV0_Pos (0UL) /*!< VADC_G CEFCLR: CEV0 (Bit 0) */ +#define VADC_G_CEFCLR_CEV0_Msk (0x1UL) /*!< VADC_G CEFCLR: CEV0 (Bitfield-Mask: 0x01) */ +#define VADC_G_CEFCLR_CEV1_Pos (1UL) /*!< VADC_G CEFCLR: CEV1 (Bit 1) */ +#define VADC_G_CEFCLR_CEV1_Msk (0x2UL) /*!< VADC_G CEFCLR: CEV1 (Bitfield-Mask: 0x01) */ +#define VADC_G_CEFCLR_CEV2_Pos (2UL) /*!< VADC_G CEFCLR: CEV2 (Bit 2) */ +#define VADC_G_CEFCLR_CEV2_Msk (0x4UL) /*!< VADC_G CEFCLR: CEV2 (Bitfield-Mask: 0x01) */ +#define VADC_G_CEFCLR_CEV3_Pos (3UL) /*!< VADC_G CEFCLR: CEV3 (Bit 3) */ +#define VADC_G_CEFCLR_CEV3_Msk (0x8UL) /*!< VADC_G CEFCLR: CEV3 (Bitfield-Mask: 0x01) */ +#define VADC_G_CEFCLR_CEV4_Pos (4UL) /*!< VADC_G CEFCLR: CEV4 (Bit 4) */ +#define VADC_G_CEFCLR_CEV4_Msk (0x10UL) /*!< VADC_G CEFCLR: CEV4 (Bitfield-Mask: 0x01) */ +#define VADC_G_CEFCLR_CEV5_Pos (5UL) /*!< VADC_G CEFCLR: CEV5 (Bit 5) */ +#define VADC_G_CEFCLR_CEV5_Msk (0x20UL) /*!< VADC_G CEFCLR: CEV5 (Bitfield-Mask: 0x01) */ +#define VADC_G_CEFCLR_CEV6_Pos (6UL) /*!< VADC_G CEFCLR: CEV6 (Bit 6) */ +#define VADC_G_CEFCLR_CEV6_Msk (0x40UL) /*!< VADC_G CEFCLR: CEV6 (Bitfield-Mask: 0x01) */ +#define VADC_G_CEFCLR_CEV7_Pos (7UL) /*!< VADC_G CEFCLR: CEV7 (Bit 7) */ +#define VADC_G_CEFCLR_CEV7_Msk (0x80UL) /*!< VADC_G CEFCLR: CEV7 (Bitfield-Mask: 0x01) */ + +/* -------------------------------- VADC_G_REFCLR ------------------------------- */ +#define VADC_G_REFCLR_REV0_Pos (0UL) /*!< VADC_G REFCLR: REV0 (Bit 0) */ +#define VADC_G_REFCLR_REV0_Msk (0x1UL) /*!< VADC_G REFCLR: REV0 (Bitfield-Mask: 0x01) */ +#define VADC_G_REFCLR_REV1_Pos (1UL) /*!< VADC_G REFCLR: REV1 (Bit 1) */ +#define VADC_G_REFCLR_REV1_Msk (0x2UL) /*!< VADC_G REFCLR: REV1 (Bitfield-Mask: 0x01) */ +#define VADC_G_REFCLR_REV2_Pos (2UL) /*!< VADC_G REFCLR: REV2 (Bit 2) */ +#define VADC_G_REFCLR_REV2_Msk (0x4UL) /*!< VADC_G REFCLR: REV2 (Bitfield-Mask: 0x01) */ +#define VADC_G_REFCLR_REV3_Pos (3UL) /*!< VADC_G REFCLR: REV3 (Bit 3) */ +#define VADC_G_REFCLR_REV3_Msk (0x8UL) /*!< VADC_G REFCLR: REV3 (Bitfield-Mask: 0x01) */ +#define VADC_G_REFCLR_REV4_Pos (4UL) /*!< VADC_G REFCLR: REV4 (Bit 4) */ +#define VADC_G_REFCLR_REV4_Msk (0x10UL) /*!< VADC_G REFCLR: REV4 (Bitfield-Mask: 0x01) */ +#define VADC_G_REFCLR_REV5_Pos (5UL) /*!< VADC_G REFCLR: REV5 (Bit 5) */ +#define VADC_G_REFCLR_REV5_Msk (0x20UL) /*!< VADC_G REFCLR: REV5 (Bitfield-Mask: 0x01) */ +#define VADC_G_REFCLR_REV6_Pos (6UL) /*!< VADC_G REFCLR: REV6 (Bit 6) */ +#define VADC_G_REFCLR_REV6_Msk (0x40UL) /*!< VADC_G REFCLR: REV6 (Bitfield-Mask: 0x01) */ +#define VADC_G_REFCLR_REV7_Pos (7UL) /*!< VADC_G REFCLR: REV7 (Bit 7) */ +#define VADC_G_REFCLR_REV7_Msk (0x80UL) /*!< VADC_G REFCLR: REV7 (Bitfield-Mask: 0x01) */ +#define VADC_G_REFCLR_REV8_Pos (8UL) /*!< VADC_G REFCLR: REV8 (Bit 8) */ +#define VADC_G_REFCLR_REV8_Msk (0x100UL) /*!< VADC_G REFCLR: REV8 (Bitfield-Mask: 0x01) */ +#define VADC_G_REFCLR_REV9_Pos (9UL) /*!< VADC_G REFCLR: REV9 (Bit 9) */ +#define VADC_G_REFCLR_REV9_Msk (0x200UL) /*!< VADC_G REFCLR: REV9 (Bitfield-Mask: 0x01) */ +#define VADC_G_REFCLR_REV10_Pos (10UL) /*!< VADC_G REFCLR: REV10 (Bit 10) */ +#define VADC_G_REFCLR_REV10_Msk (0x400UL) /*!< VADC_G REFCLR: REV10 (Bitfield-Mask: 0x01) */ +#define VADC_G_REFCLR_REV11_Pos (11UL) /*!< VADC_G REFCLR: REV11 (Bit 11) */ +#define VADC_G_REFCLR_REV11_Msk (0x800UL) /*!< VADC_G REFCLR: REV11 (Bitfield-Mask: 0x01) */ +#define VADC_G_REFCLR_REV12_Pos (12UL) /*!< VADC_G REFCLR: REV12 (Bit 12) */ +#define VADC_G_REFCLR_REV12_Msk (0x1000UL) /*!< VADC_G REFCLR: REV12 (Bitfield-Mask: 0x01) */ +#define VADC_G_REFCLR_REV13_Pos (13UL) /*!< VADC_G REFCLR: REV13 (Bit 13) */ +#define VADC_G_REFCLR_REV13_Msk (0x2000UL) /*!< VADC_G REFCLR: REV13 (Bitfield-Mask: 0x01) */ +#define VADC_G_REFCLR_REV14_Pos (14UL) /*!< VADC_G REFCLR: REV14 (Bit 14) */ +#define VADC_G_REFCLR_REV14_Msk (0x4000UL) /*!< VADC_G REFCLR: REV14 (Bitfield-Mask: 0x01) */ +#define VADC_G_REFCLR_REV15_Pos (15UL) /*!< VADC_G REFCLR: REV15 (Bit 15) */ +#define VADC_G_REFCLR_REV15_Msk (0x8000UL) /*!< VADC_G REFCLR: REV15 (Bitfield-Mask: 0x01) */ + +/* -------------------------------- VADC_G_SEFCLR ------------------------------- */ +#define VADC_G_SEFCLR_SEV0_Pos (0UL) /*!< VADC_G SEFCLR: SEV0 (Bit 0) */ +#define VADC_G_SEFCLR_SEV0_Msk (0x1UL) /*!< VADC_G SEFCLR: SEV0 (Bitfield-Mask: 0x01) */ +#define VADC_G_SEFCLR_SEV1_Pos (1UL) /*!< VADC_G SEFCLR: SEV1 (Bit 1) */ +#define VADC_G_SEFCLR_SEV1_Msk (0x2UL) /*!< VADC_G SEFCLR: SEV1 (Bitfield-Mask: 0x01) */ + +/* -------------------------------- VADC_G_CEVNP0 ------------------------------- */ +#define VADC_G_CEVNP0_CEV0NP_Pos (0UL) /*!< VADC_G CEVNP0: CEV0NP (Bit 0) */ +#define VADC_G_CEVNP0_CEV0NP_Msk (0xfUL) /*!< VADC_G CEVNP0: CEV0NP (Bitfield-Mask: 0x0f) */ +#define VADC_G_CEVNP0_CEV1NP_Pos (4UL) /*!< VADC_G CEVNP0: CEV1NP (Bit 4) */ +#define VADC_G_CEVNP0_CEV1NP_Msk (0xf0UL) /*!< VADC_G CEVNP0: CEV1NP (Bitfield-Mask: 0x0f) */ +#define VADC_G_CEVNP0_CEV2NP_Pos (8UL) /*!< VADC_G CEVNP0: CEV2NP (Bit 8) */ +#define VADC_G_CEVNP0_CEV2NP_Msk (0xf00UL) /*!< VADC_G CEVNP0: CEV2NP (Bitfield-Mask: 0x0f) */ +#define VADC_G_CEVNP0_CEV3NP_Pos (12UL) /*!< VADC_G CEVNP0: CEV3NP (Bit 12) */ +#define VADC_G_CEVNP0_CEV3NP_Msk (0xf000UL) /*!< VADC_G CEVNP0: CEV3NP (Bitfield-Mask: 0x0f) */ +#define VADC_G_CEVNP0_CEV4NP_Pos (16UL) /*!< VADC_G CEVNP0: CEV4NP (Bit 16) */ +#define VADC_G_CEVNP0_CEV4NP_Msk (0xf0000UL) /*!< VADC_G CEVNP0: CEV4NP (Bitfield-Mask: 0x0f) */ +#define VADC_G_CEVNP0_CEV5NP_Pos (20UL) /*!< VADC_G CEVNP0: CEV5NP (Bit 20) */ +#define VADC_G_CEVNP0_CEV5NP_Msk (0xf00000UL) /*!< VADC_G CEVNP0: CEV5NP (Bitfield-Mask: 0x0f) */ +#define VADC_G_CEVNP0_CEV6NP_Pos (24UL) /*!< VADC_G CEVNP0: CEV6NP (Bit 24) */ +#define VADC_G_CEVNP0_CEV6NP_Msk (0xf000000UL) /*!< VADC_G CEVNP0: CEV6NP (Bitfield-Mask: 0x0f) */ +#define VADC_G_CEVNP0_CEV7NP_Pos (28UL) /*!< VADC_G CEVNP0: CEV7NP (Bit 28) */ +#define VADC_G_CEVNP0_CEV7NP_Msk (0xf0000000UL) /*!< VADC_G CEVNP0: CEV7NP (Bitfield-Mask: 0x0f) */ + +/* -------------------------------- VADC_G_REVNP0 ------------------------------- */ +#define VADC_G_REVNP0_REV0NP_Pos (0UL) /*!< VADC_G REVNP0: REV0NP (Bit 0) */ +#define VADC_G_REVNP0_REV0NP_Msk (0xfUL) /*!< VADC_G REVNP0: REV0NP (Bitfield-Mask: 0x0f) */ +#define VADC_G_REVNP0_REV1NP_Pos (4UL) /*!< VADC_G REVNP0: REV1NP (Bit 4) */ +#define VADC_G_REVNP0_REV1NP_Msk (0xf0UL) /*!< VADC_G REVNP0: REV1NP (Bitfield-Mask: 0x0f) */ +#define VADC_G_REVNP0_REV2NP_Pos (8UL) /*!< VADC_G REVNP0: REV2NP (Bit 8) */ +#define VADC_G_REVNP0_REV2NP_Msk (0xf00UL) /*!< VADC_G REVNP0: REV2NP (Bitfield-Mask: 0x0f) */ +#define VADC_G_REVNP0_REV3NP_Pos (12UL) /*!< VADC_G REVNP0: REV3NP (Bit 12) */ +#define VADC_G_REVNP0_REV3NP_Msk (0xf000UL) /*!< VADC_G REVNP0: REV3NP (Bitfield-Mask: 0x0f) */ +#define VADC_G_REVNP0_REV4NP_Pos (16UL) /*!< VADC_G REVNP0: REV4NP (Bit 16) */ +#define VADC_G_REVNP0_REV4NP_Msk (0xf0000UL) /*!< VADC_G REVNP0: REV4NP (Bitfield-Mask: 0x0f) */ +#define VADC_G_REVNP0_REV5NP_Pos (20UL) /*!< VADC_G REVNP0: REV5NP (Bit 20) */ +#define VADC_G_REVNP0_REV5NP_Msk (0xf00000UL) /*!< VADC_G REVNP0: REV5NP (Bitfield-Mask: 0x0f) */ +#define VADC_G_REVNP0_REV6NP_Pos (24UL) /*!< VADC_G REVNP0: REV6NP (Bit 24) */ +#define VADC_G_REVNP0_REV6NP_Msk (0xf000000UL) /*!< VADC_G REVNP0: REV6NP (Bitfield-Mask: 0x0f) */ +#define VADC_G_REVNP0_REV7NP_Pos (28UL) /*!< VADC_G REVNP0: REV7NP (Bit 28) */ +#define VADC_G_REVNP0_REV7NP_Msk (0xf0000000UL) /*!< VADC_G REVNP0: REV7NP (Bitfield-Mask: 0x0f) */ + +/* -------------------------------- VADC_G_REVNP1 ------------------------------- */ +#define VADC_G_REVNP1_REV8NP_Pos (0UL) /*!< VADC_G REVNP1: REV8NP (Bit 0) */ +#define VADC_G_REVNP1_REV8NP_Msk (0xfUL) /*!< VADC_G REVNP1: REV8NP (Bitfield-Mask: 0x0f) */ +#define VADC_G_REVNP1_REV9NP_Pos (4UL) /*!< VADC_G REVNP1: REV9NP (Bit 4) */ +#define VADC_G_REVNP1_REV9NP_Msk (0xf0UL) /*!< VADC_G REVNP1: REV9NP (Bitfield-Mask: 0x0f) */ +#define VADC_G_REVNP1_REV10NP_Pos (8UL) /*!< VADC_G REVNP1: REV10NP (Bit 8) */ +#define VADC_G_REVNP1_REV10NP_Msk (0xf00UL) /*!< VADC_G REVNP1: REV10NP (Bitfield-Mask: 0x0f) */ +#define VADC_G_REVNP1_REV11NP_Pos (12UL) /*!< VADC_G REVNP1: REV11NP (Bit 12) */ +#define VADC_G_REVNP1_REV11NP_Msk (0xf000UL) /*!< VADC_G REVNP1: REV11NP (Bitfield-Mask: 0x0f) */ +#define VADC_G_REVNP1_REV12NP_Pos (16UL) /*!< VADC_G REVNP1: REV12NP (Bit 16) */ +#define VADC_G_REVNP1_REV12NP_Msk (0xf0000UL) /*!< VADC_G REVNP1: REV12NP (Bitfield-Mask: 0x0f) */ +#define VADC_G_REVNP1_REV13NP_Pos (20UL) /*!< VADC_G REVNP1: REV13NP (Bit 20) */ +#define VADC_G_REVNP1_REV13NP_Msk (0xf00000UL) /*!< VADC_G REVNP1: REV13NP (Bitfield-Mask: 0x0f) */ +#define VADC_G_REVNP1_REV14NP_Pos (24UL) /*!< VADC_G REVNP1: REV14NP (Bit 24) */ +#define VADC_G_REVNP1_REV14NP_Msk (0xf000000UL) /*!< VADC_G REVNP1: REV14NP (Bitfield-Mask: 0x0f) */ +#define VADC_G_REVNP1_REV15NP_Pos (28UL) /*!< VADC_G REVNP1: REV15NP (Bit 28) */ +#define VADC_G_REVNP1_REV15NP_Msk (0xf0000000UL) /*!< VADC_G REVNP1: REV15NP (Bitfield-Mask: 0x0f) */ + +/* -------------------------------- VADC_G_SEVNP -------------------------------- */ +#define VADC_G_SEVNP_SEV0NP_Pos (0UL) /*!< VADC_G SEVNP: SEV0NP (Bit 0) */ +#define VADC_G_SEVNP_SEV0NP_Msk (0xfUL) /*!< VADC_G SEVNP: SEV0NP (Bitfield-Mask: 0x0f) */ +#define VADC_G_SEVNP_SEV1NP_Pos (4UL) /*!< VADC_G SEVNP: SEV1NP (Bit 4) */ +#define VADC_G_SEVNP_SEV1NP_Msk (0xf0UL) /*!< VADC_G SEVNP: SEV1NP (Bitfield-Mask: 0x0f) */ + +/* -------------------------------- VADC_G_SRACT -------------------------------- */ +#define VADC_G_SRACT_AGSR0_Pos (0UL) /*!< VADC_G SRACT: AGSR0 (Bit 0) */ +#define VADC_G_SRACT_AGSR0_Msk (0x1UL) /*!< VADC_G SRACT: AGSR0 (Bitfield-Mask: 0x01) */ +#define VADC_G_SRACT_AGSR1_Pos (1UL) /*!< VADC_G SRACT: AGSR1 (Bit 1) */ +#define VADC_G_SRACT_AGSR1_Msk (0x2UL) /*!< VADC_G SRACT: AGSR1 (Bitfield-Mask: 0x01) */ +#define VADC_G_SRACT_AGSR2_Pos (2UL) /*!< VADC_G SRACT: AGSR2 (Bit 2) */ +#define VADC_G_SRACT_AGSR2_Msk (0x4UL) /*!< VADC_G SRACT: AGSR2 (Bitfield-Mask: 0x01) */ +#define VADC_G_SRACT_AGSR3_Pos (3UL) /*!< VADC_G SRACT: AGSR3 (Bit 3) */ +#define VADC_G_SRACT_AGSR3_Msk (0x8UL) /*!< VADC_G SRACT: AGSR3 (Bitfield-Mask: 0x01) */ +#define VADC_G_SRACT_ASSR0_Pos (8UL) /*!< VADC_G SRACT: ASSR0 (Bit 8) */ +#define VADC_G_SRACT_ASSR0_Msk (0x100UL) /*!< VADC_G SRACT: ASSR0 (Bitfield-Mask: 0x01) */ +#define VADC_G_SRACT_ASSR1_Pos (9UL) /*!< VADC_G SRACT: ASSR1 (Bit 9) */ +#define VADC_G_SRACT_ASSR1_Msk (0x200UL) /*!< VADC_G SRACT: ASSR1 (Bitfield-Mask: 0x01) */ +#define VADC_G_SRACT_ASSR2_Pos (10UL) /*!< VADC_G SRACT: ASSR2 (Bit 10) */ +#define VADC_G_SRACT_ASSR2_Msk (0x400UL) /*!< VADC_G SRACT: ASSR2 (Bitfield-Mask: 0x01) */ +#define VADC_G_SRACT_ASSR3_Pos (11UL) /*!< VADC_G SRACT: ASSR3 (Bit 11) */ +#define VADC_G_SRACT_ASSR3_Msk (0x800UL) /*!< VADC_G SRACT: ASSR3 (Bitfield-Mask: 0x01) */ + +/* ------------------------------- VADC_G_EMUXCTR ------------------------------- */ +#define VADC_G_EMUXCTR_EMUXSET_Pos (0UL) /*!< VADC_G EMUXCTR: EMUXSET (Bit 0) */ +#define VADC_G_EMUXCTR_EMUXSET_Msk (0x7UL) /*!< VADC_G EMUXCTR: EMUXSET (Bitfield-Mask: 0x07) */ +#define VADC_G_EMUXCTR_EMUXACT_Pos (8UL) /*!< VADC_G EMUXCTR: EMUXACT (Bit 8) */ +#define VADC_G_EMUXCTR_EMUXACT_Msk (0x700UL) /*!< VADC_G EMUXCTR: EMUXACT (Bitfield-Mask: 0x07) */ +#define VADC_G_EMUXCTR_EMUXCH_Pos (16UL) /*!< VADC_G EMUXCTR: EMUXCH (Bit 16) */ +#define VADC_G_EMUXCTR_EMUXCH_Msk (0x3ff0000UL) /*!< VADC_G EMUXCTR: EMUXCH (Bitfield-Mask: 0x3ff) */ +#define VADC_G_EMUXCTR_EMUXMODE_Pos (26UL) /*!< VADC_G EMUXCTR: EMUXMODE (Bit 26) */ +#define VADC_G_EMUXCTR_EMUXMODE_Msk (0xc000000UL) /*!< VADC_G EMUXCTR: EMUXMODE (Bitfield-Mask: 0x03) */ +#define VADC_G_EMUXCTR_EMXCOD_Pos (28UL) /*!< VADC_G EMUXCTR: EMXCOD (Bit 28) */ +#define VADC_G_EMUXCTR_EMXCOD_Msk (0x10000000UL) /*!< VADC_G EMUXCTR: EMXCOD (Bitfield-Mask: 0x01) */ +#define VADC_G_EMUXCTR_EMXST_Pos (29UL) /*!< VADC_G EMUXCTR: EMXST (Bit 29) */ +#define VADC_G_EMUXCTR_EMXST_Msk (0x20000000UL) /*!< VADC_G EMUXCTR: EMXST (Bitfield-Mask: 0x01) */ +#define VADC_G_EMUXCTR_EMXCSS_Pos (30UL) /*!< VADC_G EMUXCTR: EMXCSS (Bit 30) */ +#define VADC_G_EMUXCTR_EMXCSS_Msk (0x40000000UL) /*!< VADC_G EMUXCTR: EMXCSS (Bitfield-Mask: 0x01) */ +#define VADC_G_EMUXCTR_EMXWC_Pos (31UL) /*!< VADC_G EMUXCTR: EMXWC (Bit 31) */ +#define VADC_G_EMUXCTR_EMXWC_Msk (0x80000000UL) /*!< VADC_G EMUXCTR: EMXWC (Bitfield-Mask: 0x01) */ + +/* --------------------------------- VADC_G_VFR --------------------------------- */ +#define VADC_G_VFR_VF0_Pos (0UL) /*!< VADC_G VFR: VF0 (Bit 0) */ +#define VADC_G_VFR_VF0_Msk (0x1UL) /*!< VADC_G VFR: VF0 (Bitfield-Mask: 0x01) */ +#define VADC_G_VFR_VF1_Pos (1UL) /*!< VADC_G VFR: VF1 (Bit 1) */ +#define VADC_G_VFR_VF1_Msk (0x2UL) /*!< VADC_G VFR: VF1 (Bitfield-Mask: 0x01) */ +#define VADC_G_VFR_VF2_Pos (2UL) /*!< VADC_G VFR: VF2 (Bit 2) */ +#define VADC_G_VFR_VF2_Msk (0x4UL) /*!< VADC_G VFR: VF2 (Bitfield-Mask: 0x01) */ +#define VADC_G_VFR_VF3_Pos (3UL) /*!< VADC_G VFR: VF3 (Bit 3) */ +#define VADC_G_VFR_VF3_Msk (0x8UL) /*!< VADC_G VFR: VF3 (Bitfield-Mask: 0x01) */ +#define VADC_G_VFR_VF4_Pos (4UL) /*!< VADC_G VFR: VF4 (Bit 4) */ +#define VADC_G_VFR_VF4_Msk (0x10UL) /*!< VADC_G VFR: VF4 (Bitfield-Mask: 0x01) */ +#define VADC_G_VFR_VF5_Pos (5UL) /*!< VADC_G VFR: VF5 (Bit 5) */ +#define VADC_G_VFR_VF5_Msk (0x20UL) /*!< VADC_G VFR: VF5 (Bitfield-Mask: 0x01) */ +#define VADC_G_VFR_VF6_Pos (6UL) /*!< VADC_G VFR: VF6 (Bit 6) */ +#define VADC_G_VFR_VF6_Msk (0x40UL) /*!< VADC_G VFR: VF6 (Bitfield-Mask: 0x01) */ +#define VADC_G_VFR_VF7_Pos (7UL) /*!< VADC_G VFR: VF7 (Bit 7) */ +#define VADC_G_VFR_VF7_Msk (0x80UL) /*!< VADC_G VFR: VF7 (Bitfield-Mask: 0x01) */ +#define VADC_G_VFR_VF8_Pos (8UL) /*!< VADC_G VFR: VF8 (Bit 8) */ +#define VADC_G_VFR_VF8_Msk (0x100UL) /*!< VADC_G VFR: VF8 (Bitfield-Mask: 0x01) */ +#define VADC_G_VFR_VF9_Pos (9UL) /*!< VADC_G VFR: VF9 (Bit 9) */ +#define VADC_G_VFR_VF9_Msk (0x200UL) /*!< VADC_G VFR: VF9 (Bitfield-Mask: 0x01) */ +#define VADC_G_VFR_VF10_Pos (10UL) /*!< VADC_G VFR: VF10 (Bit 10) */ +#define VADC_G_VFR_VF10_Msk (0x400UL) /*!< VADC_G VFR: VF10 (Bitfield-Mask: 0x01) */ +#define VADC_G_VFR_VF11_Pos (11UL) /*!< VADC_G VFR: VF11 (Bit 11) */ +#define VADC_G_VFR_VF11_Msk (0x800UL) /*!< VADC_G VFR: VF11 (Bitfield-Mask: 0x01) */ +#define VADC_G_VFR_VF12_Pos (12UL) /*!< VADC_G VFR: VF12 (Bit 12) */ +#define VADC_G_VFR_VF12_Msk (0x1000UL) /*!< VADC_G VFR: VF12 (Bitfield-Mask: 0x01) */ +#define VADC_G_VFR_VF13_Pos (13UL) /*!< VADC_G VFR: VF13 (Bit 13) */ +#define VADC_G_VFR_VF13_Msk (0x2000UL) /*!< VADC_G VFR: VF13 (Bitfield-Mask: 0x01) */ +#define VADC_G_VFR_VF14_Pos (14UL) /*!< VADC_G VFR: VF14 (Bit 14) */ +#define VADC_G_VFR_VF14_Msk (0x4000UL) /*!< VADC_G VFR: VF14 (Bitfield-Mask: 0x01) */ +#define VADC_G_VFR_VF15_Pos (15UL) /*!< VADC_G VFR: VF15 (Bit 15) */ +#define VADC_G_VFR_VF15_Msk (0x8000UL) /*!< VADC_G VFR: VF15 (Bitfield-Mask: 0x01) */ + +/* -------------------------------- VADC_G_CHCTR -------------------------------- */ +#define VADC_G_CHCTR_ICLSEL_Pos (0UL) /*!< VADC_G CHCTR: ICLSEL (Bit 0) */ +#define VADC_G_CHCTR_ICLSEL_Msk (0x3UL) /*!< VADC_G CHCTR: ICLSEL (Bitfield-Mask: 0x03) */ +#define VADC_G_CHCTR_BNDSELL_Pos (4UL) /*!< VADC_G CHCTR: BNDSELL (Bit 4) */ +#define VADC_G_CHCTR_BNDSELL_Msk (0x30UL) /*!< VADC_G CHCTR: BNDSELL (Bitfield-Mask: 0x03) */ +#define VADC_G_CHCTR_BNDSELU_Pos (6UL) /*!< VADC_G CHCTR: BNDSELU (Bit 6) */ +#define VADC_G_CHCTR_BNDSELU_Msk (0xc0UL) /*!< VADC_G CHCTR: BNDSELU (Bitfield-Mask: 0x03) */ +#define VADC_G_CHCTR_CHEVMODE_Pos (8UL) /*!< VADC_G CHCTR: CHEVMODE (Bit 8) */ +#define VADC_G_CHCTR_CHEVMODE_Msk (0x300UL) /*!< VADC_G CHCTR: CHEVMODE (Bitfield-Mask: 0x03) */ +#define VADC_G_CHCTR_SYNC_Pos (10UL) /*!< VADC_G CHCTR: SYNC (Bit 10) */ +#define VADC_G_CHCTR_SYNC_Msk (0x400UL) /*!< VADC_G CHCTR: SYNC (Bitfield-Mask: 0x01) */ +#define VADC_G_CHCTR_REFSEL_Pos (11UL) /*!< VADC_G CHCTR: REFSEL (Bit 11) */ +#define VADC_G_CHCTR_REFSEL_Msk (0x800UL) /*!< VADC_G CHCTR: REFSEL (Bitfield-Mask: 0x01) */ +#define VADC_G_CHCTR_RESREG_Pos (16UL) /*!< VADC_G CHCTR: RESREG (Bit 16) */ +#define VADC_G_CHCTR_RESREG_Msk (0xf0000UL) /*!< VADC_G CHCTR: RESREG (Bitfield-Mask: 0x0f) */ +#define VADC_G_CHCTR_RESTBS_Pos (20UL) /*!< VADC_G CHCTR: RESTBS (Bit 20) */ +#define VADC_G_CHCTR_RESTBS_Msk (0x100000UL) /*!< VADC_G CHCTR: RESTBS (Bitfield-Mask: 0x01) */ +#define VADC_G_CHCTR_RESPOS_Pos (21UL) /*!< VADC_G CHCTR: RESPOS (Bit 21) */ +#define VADC_G_CHCTR_RESPOS_Msk (0x200000UL) /*!< VADC_G CHCTR: RESPOS (Bitfield-Mask: 0x01) */ +#define VADC_G_CHCTR_BWDCH_Pos (28UL) /*!< VADC_G CHCTR: BWDCH (Bit 28) */ +#define VADC_G_CHCTR_BWDCH_Msk (0x30000000UL) /*!< VADC_G CHCTR: BWDCH (Bitfield-Mask: 0x03) */ +#define VADC_G_CHCTR_BWDEN_Pos (30UL) /*!< VADC_G CHCTR: BWDEN (Bit 30) */ +#define VADC_G_CHCTR_BWDEN_Msk (0x40000000UL) /*!< VADC_G CHCTR: BWDEN (Bitfield-Mask: 0x01) */ + +/* --------------------------------- VADC_G_RCR --------------------------------- */ +#define VADC_G_RCR_DRCTR_Pos (16UL) /*!< VADC_G RCR: DRCTR (Bit 16) */ +#define VADC_G_RCR_DRCTR_Msk (0xf0000UL) /*!< VADC_G RCR: DRCTR (Bitfield-Mask: 0x0f) */ +#define VADC_G_RCR_DMM_Pos (20UL) /*!< VADC_G RCR: DMM (Bit 20) */ +#define VADC_G_RCR_DMM_Msk (0x300000UL) /*!< VADC_G RCR: DMM (Bitfield-Mask: 0x03) */ +#define VADC_G_RCR_WFR_Pos (24UL) /*!< VADC_G RCR: WFR (Bit 24) */ +#define VADC_G_RCR_WFR_Msk (0x1000000UL) /*!< VADC_G RCR: WFR (Bitfield-Mask: 0x01) */ +#define VADC_G_RCR_FEN_Pos (25UL) /*!< VADC_G RCR: FEN (Bit 25) */ +#define VADC_G_RCR_FEN_Msk (0x6000000UL) /*!< VADC_G RCR: FEN (Bitfield-Mask: 0x03) */ +#define VADC_G_RCR_SRGEN_Pos (31UL) /*!< VADC_G RCR: SRGEN (Bit 31) */ +#define VADC_G_RCR_SRGEN_Msk (0x80000000UL) /*!< VADC_G RCR: SRGEN (Bitfield-Mask: 0x01) */ + +/* --------------------------------- VADC_G_RES --------------------------------- */ +#define VADC_G_RES_RESULT_Pos (0UL) /*!< VADC_G RES: RESULT (Bit 0) */ +#define VADC_G_RES_RESULT_Msk (0xffffUL) /*!< VADC_G RES: RESULT (Bitfield-Mask: 0xffff) */ +#define VADC_G_RES_DRC_Pos (16UL) /*!< VADC_G RES: DRC (Bit 16) */ +#define VADC_G_RES_DRC_Msk (0xf0000UL) /*!< VADC_G RES: DRC (Bitfield-Mask: 0x0f) */ +#define VADC_G_RES_CHNR_Pos (20UL) /*!< VADC_G RES: CHNR (Bit 20) */ +#define VADC_G_RES_CHNR_Msk (0x1f00000UL) /*!< VADC_G RES: CHNR (Bitfield-Mask: 0x1f) */ +#define VADC_G_RES_EMUX_Pos (25UL) /*!< VADC_G RES: EMUX (Bit 25) */ +#define VADC_G_RES_EMUX_Msk (0xe000000UL) /*!< VADC_G RES: EMUX (Bitfield-Mask: 0x07) */ +#define VADC_G_RES_CRS_Pos (28UL) /*!< VADC_G RES: CRS (Bit 28) */ +#define VADC_G_RES_CRS_Msk (0x30000000UL) /*!< VADC_G RES: CRS (Bitfield-Mask: 0x03) */ +#define VADC_G_RES_FCR_Pos (30UL) /*!< VADC_G RES: FCR (Bit 30) */ +#define VADC_G_RES_FCR_Msk (0x40000000UL) /*!< VADC_G RES: FCR (Bitfield-Mask: 0x01) */ +#define VADC_G_RES_VF_Pos (31UL) /*!< VADC_G RES: VF (Bit 31) */ +#define VADC_G_RES_VF_Msk (0x80000000UL) /*!< VADC_G RES: VF (Bitfield-Mask: 0x01) */ + +/* --------------------------------- VADC_G_RESD -------------------------------- */ +#define VADC_G_RESD_RESULT_Pos (0UL) /*!< VADC_G RESD: RESULT (Bit 0) */ +#define VADC_G_RESD_RESULT_Msk (0xffffUL) /*!< VADC_G RESD: RESULT (Bitfield-Mask: 0xffff) */ +#define VADC_G_RESD_DRC_Pos (16UL) /*!< VADC_G RESD: DRC (Bit 16) */ +#define VADC_G_RESD_DRC_Msk (0xf0000UL) /*!< VADC_G RESD: DRC (Bitfield-Mask: 0x0f) */ +#define VADC_G_RESD_CHNR_Pos (20UL) /*!< VADC_G RESD: CHNR (Bit 20) */ +#define VADC_G_RESD_CHNR_Msk (0x1f00000UL) /*!< VADC_G RESD: CHNR (Bitfield-Mask: 0x1f) */ +#define VADC_G_RESD_EMUX_Pos (25UL) /*!< VADC_G RESD: EMUX (Bit 25) */ +#define VADC_G_RESD_EMUX_Msk (0xe000000UL) /*!< VADC_G RESD: EMUX (Bitfield-Mask: 0x07) */ +#define VADC_G_RESD_CRS_Pos (28UL) /*!< VADC_G RESD: CRS (Bit 28) */ +#define VADC_G_RESD_CRS_Msk (0x30000000UL) /*!< VADC_G RESD: CRS (Bitfield-Mask: 0x03) */ +#define VADC_G_RESD_FCR_Pos (30UL) /*!< VADC_G RESD: FCR (Bit 30) */ +#define VADC_G_RESD_FCR_Msk (0x40000000UL) /*!< VADC_G RESD: FCR (Bitfield-Mask: 0x01) */ +#define VADC_G_RESD_VF_Pos (31UL) /*!< VADC_G RESD: VF (Bit 31) */ +#define VADC_G_RESD_VF_Msk (0x80000000UL) /*!< VADC_G RESD: VF (Bitfield-Mask: 0x01) */ + + +/* ================================================================================ */ +/* ================ struct 'DAC' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ----------------------------------- DAC_ID ----------------------------------- */ +#define DAC_ID_MODR_Pos (0UL) /*!< DAC ID: MODR (Bit 0) */ +#define DAC_ID_MODR_Msk (0xffUL) /*!< DAC ID: MODR (Bitfield-Mask: 0xff) */ +#define DAC_ID_MODT_Pos (8UL) /*!< DAC ID: MODT (Bit 8) */ +#define DAC_ID_MODT_Msk (0xff00UL) /*!< DAC ID: MODT (Bitfield-Mask: 0xff) */ +#define DAC_ID_MODN_Pos (16UL) /*!< DAC ID: MODN (Bit 16) */ +#define DAC_ID_MODN_Msk (0xffff0000UL) /*!< DAC ID: MODN (Bitfield-Mask: 0xffff) */ + +/* -------------------------------- DAC_DAC0CFG0 -------------------------------- */ +#define DAC_DAC0CFG0_FREQ_Pos (0UL) /*!< DAC DAC0CFG0: FREQ (Bit 0) */ +#define DAC_DAC0CFG0_FREQ_Msk (0xfffffUL) /*!< DAC DAC0CFG0: FREQ (Bitfield-Mask: 0xfffff) */ +#define DAC_DAC0CFG0_MODE_Pos (20UL) /*!< DAC DAC0CFG0: MODE (Bit 20) */ +#define DAC_DAC0CFG0_MODE_Msk (0x700000UL) /*!< DAC DAC0CFG0: MODE (Bitfield-Mask: 0x07) */ +#define DAC_DAC0CFG0_SIGN_Pos (23UL) /*!< DAC DAC0CFG0: SIGN (Bit 23) */ +#define DAC_DAC0CFG0_SIGN_Msk (0x800000UL) /*!< DAC DAC0CFG0: SIGN (Bitfield-Mask: 0x01) */ +#define DAC_DAC0CFG0_FIFOIND_Pos (24UL) /*!< DAC DAC0CFG0: FIFOIND (Bit 24) */ +#define DAC_DAC0CFG0_FIFOIND_Msk (0x3000000UL) /*!< DAC DAC0CFG0: FIFOIND (Bitfield-Mask: 0x03) */ +#define DAC_DAC0CFG0_FIFOEMP_Pos (26UL) /*!< DAC DAC0CFG0: FIFOEMP (Bit 26) */ +#define DAC_DAC0CFG0_FIFOEMP_Msk (0x4000000UL) /*!< DAC DAC0CFG0: FIFOEMP (Bitfield-Mask: 0x01) */ +#define DAC_DAC0CFG0_FIFOFUL_Pos (27UL) /*!< DAC DAC0CFG0: FIFOFUL (Bit 27) */ +#define DAC_DAC0CFG0_FIFOFUL_Msk (0x8000000UL) /*!< DAC DAC0CFG0: FIFOFUL (Bitfield-Mask: 0x01) */ +#define DAC_DAC0CFG0_NEGATE_Pos (28UL) /*!< DAC DAC0CFG0: NEGATE (Bit 28) */ +#define DAC_DAC0CFG0_NEGATE_Msk (0x10000000UL) /*!< DAC DAC0CFG0: NEGATE (Bitfield-Mask: 0x01) */ +#define DAC_DAC0CFG0_SIGNEN_Pos (29UL) /*!< DAC DAC0CFG0: SIGNEN (Bit 29) */ +#define DAC_DAC0CFG0_SIGNEN_Msk (0x20000000UL) /*!< DAC DAC0CFG0: SIGNEN (Bitfield-Mask: 0x01) */ +#define DAC_DAC0CFG0_SREN_Pos (30UL) /*!< DAC DAC0CFG0: SREN (Bit 30) */ +#define DAC_DAC0CFG0_SREN_Msk (0x40000000UL) /*!< DAC DAC0CFG0: SREN (Bitfield-Mask: 0x01) */ +#define DAC_DAC0CFG0_RUN_Pos (31UL) /*!< DAC DAC0CFG0: RUN (Bit 31) */ +#define DAC_DAC0CFG0_RUN_Msk (0x80000000UL) /*!< DAC DAC0CFG0: RUN (Bitfield-Mask: 0x01) */ + +/* -------------------------------- DAC_DAC0CFG1 -------------------------------- */ +#define DAC_DAC0CFG1_SCALE_Pos (0UL) /*!< DAC DAC0CFG1: SCALE (Bit 0) */ +#define DAC_DAC0CFG1_SCALE_Msk (0x7UL) /*!< DAC DAC0CFG1: SCALE (Bitfield-Mask: 0x07) */ +#define DAC_DAC0CFG1_MULDIV_Pos (3UL) /*!< DAC DAC0CFG1: MULDIV (Bit 3) */ +#define DAC_DAC0CFG1_MULDIV_Msk (0x8UL) /*!< DAC DAC0CFG1: MULDIV (Bitfield-Mask: 0x01) */ +#define DAC_DAC0CFG1_OFFS_Pos (4UL) /*!< DAC DAC0CFG1: OFFS (Bit 4) */ +#define DAC_DAC0CFG1_OFFS_Msk (0xff0UL) /*!< DAC DAC0CFG1: OFFS (Bitfield-Mask: 0xff) */ +#define DAC_DAC0CFG1_TRIGSEL_Pos (12UL) /*!< DAC DAC0CFG1: TRIGSEL (Bit 12) */ +#define DAC_DAC0CFG1_TRIGSEL_Msk (0x7000UL) /*!< DAC DAC0CFG1: TRIGSEL (Bitfield-Mask: 0x07) */ +#define DAC_DAC0CFG1_DATMOD_Pos (15UL) /*!< DAC DAC0CFG1: DATMOD (Bit 15) */ +#define DAC_DAC0CFG1_DATMOD_Msk (0x8000UL) /*!< DAC DAC0CFG1: DATMOD (Bitfield-Mask: 0x01) */ +#define DAC_DAC0CFG1_SWTRIG_Pos (16UL) /*!< DAC DAC0CFG1: SWTRIG (Bit 16) */ +#define DAC_DAC0CFG1_SWTRIG_Msk (0x10000UL) /*!< DAC DAC0CFG1: SWTRIG (Bitfield-Mask: 0x01) */ +#define DAC_DAC0CFG1_TRIGMOD_Pos (17UL) /*!< DAC DAC0CFG1: TRIGMOD (Bit 17) */ +#define DAC_DAC0CFG1_TRIGMOD_Msk (0x60000UL) /*!< DAC DAC0CFG1: TRIGMOD (Bitfield-Mask: 0x03) */ +#define DAC_DAC0CFG1_ANACFG_Pos (19UL) /*!< DAC DAC0CFG1: ANACFG (Bit 19) */ +#define DAC_DAC0CFG1_ANACFG_Msk (0xf80000UL) /*!< DAC DAC0CFG1: ANACFG (Bitfield-Mask: 0x1f) */ +#define DAC_DAC0CFG1_ANAEN_Pos (24UL) /*!< DAC DAC0CFG1: ANAEN (Bit 24) */ +#define DAC_DAC0CFG1_ANAEN_Msk (0x1000000UL) /*!< DAC DAC0CFG1: ANAEN (Bitfield-Mask: 0x01) */ +#define DAC_DAC0CFG1_REFCFGL_Pos (28UL) /*!< DAC DAC0CFG1: REFCFGL (Bit 28) */ +#define DAC_DAC0CFG1_REFCFGL_Msk (0xf0000000UL) /*!< DAC DAC0CFG1: REFCFGL (Bitfield-Mask: 0x0f) */ + +/* -------------------------------- DAC_DAC1CFG0 -------------------------------- */ +#define DAC_DAC1CFG0_FREQ_Pos (0UL) /*!< DAC DAC1CFG0: FREQ (Bit 0) */ +#define DAC_DAC1CFG0_FREQ_Msk (0xfffffUL) /*!< DAC DAC1CFG0: FREQ (Bitfield-Mask: 0xfffff) */ +#define DAC_DAC1CFG0_MODE_Pos (20UL) /*!< DAC DAC1CFG0: MODE (Bit 20) */ +#define DAC_DAC1CFG0_MODE_Msk (0x700000UL) /*!< DAC DAC1CFG0: MODE (Bitfield-Mask: 0x07) */ +#define DAC_DAC1CFG0_SIGN_Pos (23UL) /*!< DAC DAC1CFG0: SIGN (Bit 23) */ +#define DAC_DAC1CFG0_SIGN_Msk (0x800000UL) /*!< DAC DAC1CFG0: SIGN (Bitfield-Mask: 0x01) */ +#define DAC_DAC1CFG0_FIFOIND_Pos (24UL) /*!< DAC DAC1CFG0: FIFOIND (Bit 24) */ +#define DAC_DAC1CFG0_FIFOIND_Msk (0x3000000UL) /*!< DAC DAC1CFG0: FIFOIND (Bitfield-Mask: 0x03) */ +#define DAC_DAC1CFG0_FIFOEMP_Pos (26UL) /*!< DAC DAC1CFG0: FIFOEMP (Bit 26) */ +#define DAC_DAC1CFG0_FIFOEMP_Msk (0x4000000UL) /*!< DAC DAC1CFG0: FIFOEMP (Bitfield-Mask: 0x01) */ +#define DAC_DAC1CFG0_FIFOFUL_Pos (27UL) /*!< DAC DAC1CFG0: FIFOFUL (Bit 27) */ +#define DAC_DAC1CFG0_FIFOFUL_Msk (0x8000000UL) /*!< DAC DAC1CFG0: FIFOFUL (Bitfield-Mask: 0x01) */ +#define DAC_DAC1CFG0_NEGATE_Pos (28UL) /*!< DAC DAC1CFG0: NEGATE (Bit 28) */ +#define DAC_DAC1CFG0_NEGATE_Msk (0x10000000UL) /*!< DAC DAC1CFG0: NEGATE (Bitfield-Mask: 0x01) */ +#define DAC_DAC1CFG0_SIGNEN_Pos (29UL) /*!< DAC DAC1CFG0: SIGNEN (Bit 29) */ +#define DAC_DAC1CFG0_SIGNEN_Msk (0x20000000UL) /*!< DAC DAC1CFG0: SIGNEN (Bitfield-Mask: 0x01) */ +#define DAC_DAC1CFG0_SREN_Pos (30UL) /*!< DAC DAC1CFG0: SREN (Bit 30) */ +#define DAC_DAC1CFG0_SREN_Msk (0x40000000UL) /*!< DAC DAC1CFG0: SREN (Bitfield-Mask: 0x01) */ +#define DAC_DAC1CFG0_RUN_Pos (31UL) /*!< DAC DAC1CFG0: RUN (Bit 31) */ +#define DAC_DAC1CFG0_RUN_Msk (0x80000000UL) /*!< DAC DAC1CFG0: RUN (Bitfield-Mask: 0x01) */ + +/* -------------------------------- DAC_DAC1CFG1 -------------------------------- */ +#define DAC_DAC1CFG1_SCALE_Pos (0UL) /*!< DAC DAC1CFG1: SCALE (Bit 0) */ +#define DAC_DAC1CFG1_SCALE_Msk (0x7UL) /*!< DAC DAC1CFG1: SCALE (Bitfield-Mask: 0x07) */ +#define DAC_DAC1CFG1_MULDIV_Pos (3UL) /*!< DAC DAC1CFG1: MULDIV (Bit 3) */ +#define DAC_DAC1CFG1_MULDIV_Msk (0x8UL) /*!< DAC DAC1CFG1: MULDIV (Bitfield-Mask: 0x01) */ +#define DAC_DAC1CFG1_OFFS_Pos (4UL) /*!< DAC DAC1CFG1: OFFS (Bit 4) */ +#define DAC_DAC1CFG1_OFFS_Msk (0xff0UL) /*!< DAC DAC1CFG1: OFFS (Bitfield-Mask: 0xff) */ +#define DAC_DAC1CFG1_TRIGSEL_Pos (12UL) /*!< DAC DAC1CFG1: TRIGSEL (Bit 12) */ +#define DAC_DAC1CFG1_TRIGSEL_Msk (0x7000UL) /*!< DAC DAC1CFG1: TRIGSEL (Bitfield-Mask: 0x07) */ +#define DAC_DAC1CFG1_SWTRIG_Pos (16UL) /*!< DAC DAC1CFG1: SWTRIG (Bit 16) */ +#define DAC_DAC1CFG1_SWTRIG_Msk (0x10000UL) /*!< DAC DAC1CFG1: SWTRIG (Bitfield-Mask: 0x01) */ +#define DAC_DAC1CFG1_TRIGMOD_Pos (17UL) /*!< DAC DAC1CFG1: TRIGMOD (Bit 17) */ +#define DAC_DAC1CFG1_TRIGMOD_Msk (0x60000UL) /*!< DAC DAC1CFG1: TRIGMOD (Bitfield-Mask: 0x03) */ +#define DAC_DAC1CFG1_ANACFG_Pos (19UL) /*!< DAC DAC1CFG1: ANACFG (Bit 19) */ +#define DAC_DAC1CFG1_ANACFG_Msk (0xf80000UL) /*!< DAC DAC1CFG1: ANACFG (Bitfield-Mask: 0x1f) */ +#define DAC_DAC1CFG1_ANAEN_Pos (24UL) /*!< DAC DAC1CFG1: ANAEN (Bit 24) */ +#define DAC_DAC1CFG1_ANAEN_Msk (0x1000000UL) /*!< DAC DAC1CFG1: ANAEN (Bitfield-Mask: 0x01) */ +#define DAC_DAC1CFG1_REFCFGH_Pos (28UL) /*!< DAC DAC1CFG1: REFCFGH (Bit 28) */ +#define DAC_DAC1CFG1_REFCFGH_Msk (0xf0000000UL) /*!< DAC DAC1CFG1: REFCFGH (Bitfield-Mask: 0x0f) */ + +/* -------------------------------- DAC_DAC0DATA -------------------------------- */ +#define DAC_DAC0DATA_DATA0_Pos (0UL) /*!< DAC DAC0DATA: DATA0 (Bit 0) */ +#define DAC_DAC0DATA_DATA0_Msk (0xfffUL) /*!< DAC DAC0DATA: DATA0 (Bitfield-Mask: 0xfff) */ + +/* -------------------------------- DAC_DAC1DATA -------------------------------- */ +#define DAC_DAC1DATA_DATA1_Pos (0UL) /*!< DAC DAC1DATA: DATA1 (Bit 0) */ +#define DAC_DAC1DATA_DATA1_Msk (0xfffUL) /*!< DAC DAC1DATA: DATA1 (Bitfield-Mask: 0xfff) */ + +/* -------------------------------- DAC_DAC01DATA ------------------------------- */ +#define DAC_DAC01DATA_DATA0_Pos (0UL) /*!< DAC DAC01DATA: DATA0 (Bit 0) */ +#define DAC_DAC01DATA_DATA0_Msk (0xfffUL) /*!< DAC DAC01DATA: DATA0 (Bitfield-Mask: 0xfff) */ +#define DAC_DAC01DATA_DATA1_Pos (16UL) /*!< DAC DAC01DATA: DATA1 (Bit 16) */ +#define DAC_DAC01DATA_DATA1_Msk (0xfff0000UL) /*!< DAC DAC01DATA: DATA1 (Bitfield-Mask: 0xfff) */ + +/* -------------------------------- DAC_DAC0PATL -------------------------------- */ +#define DAC_DAC0PATL_PAT0_Pos (0UL) /*!< DAC DAC0PATL: PAT0 (Bit 0) */ +#define DAC_DAC0PATL_PAT0_Msk (0x1fUL) /*!< DAC DAC0PATL: PAT0 (Bitfield-Mask: 0x1f) */ +#define DAC_DAC0PATL_PAT1_Pos (5UL) /*!< DAC DAC0PATL: PAT1 (Bit 5) */ +#define DAC_DAC0PATL_PAT1_Msk (0x3e0UL) /*!< DAC DAC0PATL: PAT1 (Bitfield-Mask: 0x1f) */ +#define DAC_DAC0PATL_PAT2_Pos (10UL) /*!< DAC DAC0PATL: PAT2 (Bit 10) */ +#define DAC_DAC0PATL_PAT2_Msk (0x7c00UL) /*!< DAC DAC0PATL: PAT2 (Bitfield-Mask: 0x1f) */ +#define DAC_DAC0PATL_PAT3_Pos (15UL) /*!< DAC DAC0PATL: PAT3 (Bit 15) */ +#define DAC_DAC0PATL_PAT3_Msk (0xf8000UL) /*!< DAC DAC0PATL: PAT3 (Bitfield-Mask: 0x1f) */ +#define DAC_DAC0PATL_PAT4_Pos (20UL) /*!< DAC DAC0PATL: PAT4 (Bit 20) */ +#define DAC_DAC0PATL_PAT4_Msk (0x1f00000UL) /*!< DAC DAC0PATL: PAT4 (Bitfield-Mask: 0x1f) */ +#define DAC_DAC0PATL_PAT5_Pos (25UL) /*!< DAC DAC0PATL: PAT5 (Bit 25) */ +#define DAC_DAC0PATL_PAT5_Msk (0x3e000000UL) /*!< DAC DAC0PATL: PAT5 (Bitfield-Mask: 0x1f) */ + +/* -------------------------------- DAC_DAC0PATH -------------------------------- */ +#define DAC_DAC0PATH_PAT6_Pos (0UL) /*!< DAC DAC0PATH: PAT6 (Bit 0) */ +#define DAC_DAC0PATH_PAT6_Msk (0x1fUL) /*!< DAC DAC0PATH: PAT6 (Bitfield-Mask: 0x1f) */ +#define DAC_DAC0PATH_PAT7_Pos (5UL) /*!< DAC DAC0PATH: PAT7 (Bit 5) */ +#define DAC_DAC0PATH_PAT7_Msk (0x3e0UL) /*!< DAC DAC0PATH: PAT7 (Bitfield-Mask: 0x1f) */ +#define DAC_DAC0PATH_PAT8_Pos (10UL) /*!< DAC DAC0PATH: PAT8 (Bit 10) */ +#define DAC_DAC0PATH_PAT8_Msk (0x7c00UL) /*!< DAC DAC0PATH: PAT8 (Bitfield-Mask: 0x1f) */ + +/* -------------------------------- DAC_DAC1PATL -------------------------------- */ +#define DAC_DAC1PATL_PAT0_Pos (0UL) /*!< DAC DAC1PATL: PAT0 (Bit 0) */ +#define DAC_DAC1PATL_PAT0_Msk (0x1fUL) /*!< DAC DAC1PATL: PAT0 (Bitfield-Mask: 0x1f) */ +#define DAC_DAC1PATL_PAT1_Pos (5UL) /*!< DAC DAC1PATL: PAT1 (Bit 5) */ +#define DAC_DAC1PATL_PAT1_Msk (0x3e0UL) /*!< DAC DAC1PATL: PAT1 (Bitfield-Mask: 0x1f) */ +#define DAC_DAC1PATL_PAT2_Pos (10UL) /*!< DAC DAC1PATL: PAT2 (Bit 10) */ +#define DAC_DAC1PATL_PAT2_Msk (0x7c00UL) /*!< DAC DAC1PATL: PAT2 (Bitfield-Mask: 0x1f) */ +#define DAC_DAC1PATL_PAT3_Pos (15UL) /*!< DAC DAC1PATL: PAT3 (Bit 15) */ +#define DAC_DAC1PATL_PAT3_Msk (0xf8000UL) /*!< DAC DAC1PATL: PAT3 (Bitfield-Mask: 0x1f) */ +#define DAC_DAC1PATL_PAT4_Pos (20UL) /*!< DAC DAC1PATL: PAT4 (Bit 20) */ +#define DAC_DAC1PATL_PAT4_Msk (0x1f00000UL) /*!< DAC DAC1PATL: PAT4 (Bitfield-Mask: 0x1f) */ +#define DAC_DAC1PATL_PAT5_Pos (25UL) /*!< DAC DAC1PATL: PAT5 (Bit 25) */ +#define DAC_DAC1PATL_PAT5_Msk (0x3e000000UL) /*!< DAC DAC1PATL: PAT5 (Bitfield-Mask: 0x1f) */ + +/* -------------------------------- DAC_DAC1PATH -------------------------------- */ +#define DAC_DAC1PATH_PAT6_Pos (0UL) /*!< DAC DAC1PATH: PAT6 (Bit 0) */ +#define DAC_DAC1PATH_PAT6_Msk (0x1fUL) /*!< DAC DAC1PATH: PAT6 (Bitfield-Mask: 0x1f) */ +#define DAC_DAC1PATH_PAT7_Pos (5UL) /*!< DAC DAC1PATH: PAT7 (Bit 5) */ +#define DAC_DAC1PATH_PAT7_Msk (0x3e0UL) /*!< DAC DAC1PATH: PAT7 (Bitfield-Mask: 0x1f) */ +#define DAC_DAC1PATH_PAT8_Pos (10UL) /*!< DAC DAC1PATH: PAT8 (Bit 10) */ +#define DAC_DAC1PATH_PAT8_Msk (0x7c00UL) /*!< DAC DAC1PATH: PAT8 (Bitfield-Mask: 0x1f) */ + + +/* ================================================================================ */ +/* ================ Group 'CCU4' Position & Mask ================ */ +/* ================================================================================ */ + + +/* --------------------------------- CCU4_GCTRL --------------------------------- */ +#define CCU4_GCTRL_PRBC_Pos (0UL) /*!< CCU4 GCTRL: PRBC (Bit 0) */ +#define CCU4_GCTRL_PRBC_Msk (0x7UL) /*!< CCU4 GCTRL: PRBC (Bitfield-Mask: 0x07) */ +#define CCU4_GCTRL_PCIS_Pos (4UL) /*!< CCU4 GCTRL: PCIS (Bit 4) */ +#define CCU4_GCTRL_PCIS_Msk (0x30UL) /*!< CCU4 GCTRL: PCIS (Bitfield-Mask: 0x03) */ +#define CCU4_GCTRL_SUSCFG_Pos (8UL) /*!< CCU4 GCTRL: SUSCFG (Bit 8) */ +#define CCU4_GCTRL_SUSCFG_Msk (0x300UL) /*!< CCU4 GCTRL: SUSCFG (Bitfield-Mask: 0x03) */ +#define CCU4_GCTRL_MSE0_Pos (10UL) /*!< CCU4 GCTRL: MSE0 (Bit 10) */ +#define CCU4_GCTRL_MSE0_Msk (0x400UL) /*!< CCU4 GCTRL: MSE0 (Bitfield-Mask: 0x01) */ +#define CCU4_GCTRL_MSE1_Pos (11UL) /*!< CCU4 GCTRL: MSE1 (Bit 11) */ +#define CCU4_GCTRL_MSE1_Msk (0x800UL) /*!< CCU4 GCTRL: MSE1 (Bitfield-Mask: 0x01) */ +#define CCU4_GCTRL_MSE2_Pos (12UL) /*!< CCU4 GCTRL: MSE2 (Bit 12) */ +#define CCU4_GCTRL_MSE2_Msk (0x1000UL) /*!< CCU4 GCTRL: MSE2 (Bitfield-Mask: 0x01) */ +#define CCU4_GCTRL_MSE3_Pos (13UL) /*!< CCU4 GCTRL: MSE3 (Bit 13) */ +#define CCU4_GCTRL_MSE3_Msk (0x2000UL) /*!< CCU4 GCTRL: MSE3 (Bitfield-Mask: 0x01) */ +#define CCU4_GCTRL_MSDE_Pos (14UL) /*!< CCU4 GCTRL: MSDE (Bit 14) */ +#define CCU4_GCTRL_MSDE_Msk (0xc000UL) /*!< CCU4 GCTRL: MSDE (Bitfield-Mask: 0x03) */ + +/* --------------------------------- CCU4_GSTAT --------------------------------- */ +#define CCU4_GSTAT_S0I_Pos (0UL) /*!< CCU4 GSTAT: S0I (Bit 0) */ +#define CCU4_GSTAT_S0I_Msk (0x1UL) /*!< CCU4 GSTAT: S0I (Bitfield-Mask: 0x01) */ +#define CCU4_GSTAT_S1I_Pos (1UL) /*!< CCU4 GSTAT: S1I (Bit 1) */ +#define CCU4_GSTAT_S1I_Msk (0x2UL) /*!< CCU4 GSTAT: S1I (Bitfield-Mask: 0x01) */ +#define CCU4_GSTAT_S2I_Pos (2UL) /*!< CCU4 GSTAT: S2I (Bit 2) */ +#define CCU4_GSTAT_S2I_Msk (0x4UL) /*!< CCU4 GSTAT: S2I (Bitfield-Mask: 0x01) */ +#define CCU4_GSTAT_S3I_Pos (3UL) /*!< CCU4 GSTAT: S3I (Bit 3) */ +#define CCU4_GSTAT_S3I_Msk (0x8UL) /*!< CCU4 GSTAT: S3I (Bitfield-Mask: 0x01) */ +#define CCU4_GSTAT_PRB_Pos (8UL) /*!< CCU4 GSTAT: PRB (Bit 8) */ +#define CCU4_GSTAT_PRB_Msk (0x100UL) /*!< CCU4 GSTAT: PRB (Bitfield-Mask: 0x01) */ + +/* --------------------------------- CCU4_GIDLS --------------------------------- */ +#define CCU4_GIDLS_SS0I_Pos (0UL) /*!< CCU4 GIDLS: SS0I (Bit 0) */ +#define CCU4_GIDLS_SS0I_Msk (0x1UL) /*!< CCU4 GIDLS: SS0I (Bitfield-Mask: 0x01) */ +#define CCU4_GIDLS_SS1I_Pos (1UL) /*!< CCU4 GIDLS: SS1I (Bit 1) */ +#define CCU4_GIDLS_SS1I_Msk (0x2UL) /*!< CCU4 GIDLS: SS1I (Bitfield-Mask: 0x01) */ +#define CCU4_GIDLS_SS2I_Pos (2UL) /*!< CCU4 GIDLS: SS2I (Bit 2) */ +#define CCU4_GIDLS_SS2I_Msk (0x4UL) /*!< CCU4 GIDLS: SS2I (Bitfield-Mask: 0x01) */ +#define CCU4_GIDLS_SS3I_Pos (3UL) /*!< CCU4 GIDLS: SS3I (Bit 3) */ +#define CCU4_GIDLS_SS3I_Msk (0x8UL) /*!< CCU4 GIDLS: SS3I (Bitfield-Mask: 0x01) */ +#define CCU4_GIDLS_CPRB_Pos (8UL) /*!< CCU4 GIDLS: CPRB (Bit 8) */ +#define CCU4_GIDLS_CPRB_Msk (0x100UL) /*!< CCU4 GIDLS: CPRB (Bitfield-Mask: 0x01) */ +#define CCU4_GIDLS_PSIC_Pos (9UL) /*!< CCU4 GIDLS: PSIC (Bit 9) */ +#define CCU4_GIDLS_PSIC_Msk (0x200UL) /*!< CCU4 GIDLS: PSIC (Bitfield-Mask: 0x01) */ + +/* --------------------------------- CCU4_GIDLC --------------------------------- */ +#define CCU4_GIDLC_CS0I_Pos (0UL) /*!< CCU4 GIDLC: CS0I (Bit 0) */ +#define CCU4_GIDLC_CS0I_Msk (0x1UL) /*!< CCU4 GIDLC: CS0I (Bitfield-Mask: 0x01) */ +#define CCU4_GIDLC_CS1I_Pos (1UL) /*!< CCU4 GIDLC: CS1I (Bit 1) */ +#define CCU4_GIDLC_CS1I_Msk (0x2UL) /*!< CCU4 GIDLC: CS1I (Bitfield-Mask: 0x01) */ +#define CCU4_GIDLC_CS2I_Pos (2UL) /*!< CCU4 GIDLC: CS2I (Bit 2) */ +#define CCU4_GIDLC_CS2I_Msk (0x4UL) /*!< CCU4 GIDLC: CS2I (Bitfield-Mask: 0x01) */ +#define CCU4_GIDLC_CS3I_Pos (3UL) /*!< CCU4 GIDLC: CS3I (Bit 3) */ +#define CCU4_GIDLC_CS3I_Msk (0x8UL) /*!< CCU4 GIDLC: CS3I (Bitfield-Mask: 0x01) */ +#define CCU4_GIDLC_SPRB_Pos (8UL) /*!< CCU4 GIDLC: SPRB (Bit 8) */ +#define CCU4_GIDLC_SPRB_Msk (0x100UL) /*!< CCU4 GIDLC: SPRB (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- CCU4_GCSS --------------------------------- */ +#define CCU4_GCSS_S0SE_Pos (0UL) /*!< CCU4 GCSS: S0SE (Bit 0) */ +#define CCU4_GCSS_S0SE_Msk (0x1UL) /*!< CCU4 GCSS: S0SE (Bitfield-Mask: 0x01) */ +#define CCU4_GCSS_S0DSE_Pos (1UL) /*!< CCU4 GCSS: S0DSE (Bit 1) */ +#define CCU4_GCSS_S0DSE_Msk (0x2UL) /*!< CCU4 GCSS: S0DSE (Bitfield-Mask: 0x01) */ +#define CCU4_GCSS_S0PSE_Pos (2UL) /*!< CCU4 GCSS: S0PSE (Bit 2) */ +#define CCU4_GCSS_S0PSE_Msk (0x4UL) /*!< CCU4 GCSS: S0PSE (Bitfield-Mask: 0x01) */ +#define CCU4_GCSS_S1SE_Pos (4UL) /*!< CCU4 GCSS: S1SE (Bit 4) */ +#define CCU4_GCSS_S1SE_Msk (0x10UL) /*!< CCU4 GCSS: S1SE (Bitfield-Mask: 0x01) */ +#define CCU4_GCSS_S1DSE_Pos (5UL) /*!< CCU4 GCSS: S1DSE (Bit 5) */ +#define CCU4_GCSS_S1DSE_Msk (0x20UL) /*!< CCU4 GCSS: S1DSE (Bitfield-Mask: 0x01) */ +#define CCU4_GCSS_S1PSE_Pos (6UL) /*!< CCU4 GCSS: S1PSE (Bit 6) */ +#define CCU4_GCSS_S1PSE_Msk (0x40UL) /*!< CCU4 GCSS: S1PSE (Bitfield-Mask: 0x01) */ +#define CCU4_GCSS_S2SE_Pos (8UL) /*!< CCU4 GCSS: S2SE (Bit 8) */ +#define CCU4_GCSS_S2SE_Msk (0x100UL) /*!< CCU4 GCSS: S2SE (Bitfield-Mask: 0x01) */ +#define CCU4_GCSS_S2DSE_Pos (9UL) /*!< CCU4 GCSS: S2DSE (Bit 9) */ +#define CCU4_GCSS_S2DSE_Msk (0x200UL) /*!< CCU4 GCSS: S2DSE (Bitfield-Mask: 0x01) */ +#define CCU4_GCSS_S2PSE_Pos (10UL) /*!< CCU4 GCSS: S2PSE (Bit 10) */ +#define CCU4_GCSS_S2PSE_Msk (0x400UL) /*!< CCU4 GCSS: S2PSE (Bitfield-Mask: 0x01) */ +#define CCU4_GCSS_S3SE_Pos (12UL) /*!< CCU4 GCSS: S3SE (Bit 12) */ +#define CCU4_GCSS_S3SE_Msk (0x1000UL) /*!< CCU4 GCSS: S3SE (Bitfield-Mask: 0x01) */ +#define CCU4_GCSS_S3DSE_Pos (13UL) /*!< CCU4 GCSS: S3DSE (Bit 13) */ +#define CCU4_GCSS_S3DSE_Msk (0x2000UL) /*!< CCU4 GCSS: S3DSE (Bitfield-Mask: 0x01) */ +#define CCU4_GCSS_S3PSE_Pos (14UL) /*!< CCU4 GCSS: S3PSE (Bit 14) */ +#define CCU4_GCSS_S3PSE_Msk (0x4000UL) /*!< CCU4 GCSS: S3PSE (Bitfield-Mask: 0x01) */ +#define CCU4_GCSS_S0STS_Pos (16UL) /*!< CCU4 GCSS: S0STS (Bit 16) */ +#define CCU4_GCSS_S0STS_Msk (0x10000UL) /*!< CCU4 GCSS: S0STS (Bitfield-Mask: 0x01) */ +#define CCU4_GCSS_S1STS_Pos (17UL) /*!< CCU4 GCSS: S1STS (Bit 17) */ +#define CCU4_GCSS_S1STS_Msk (0x20000UL) /*!< CCU4 GCSS: S1STS (Bitfield-Mask: 0x01) */ +#define CCU4_GCSS_S2STS_Pos (18UL) /*!< CCU4 GCSS: S2STS (Bit 18) */ +#define CCU4_GCSS_S2STS_Msk (0x40000UL) /*!< CCU4 GCSS: S2STS (Bitfield-Mask: 0x01) */ +#define CCU4_GCSS_S3STS_Pos (19UL) /*!< CCU4 GCSS: S3STS (Bit 19) */ +#define CCU4_GCSS_S3STS_Msk (0x80000UL) /*!< CCU4 GCSS: S3STS (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- CCU4_GCSC --------------------------------- */ +#define CCU4_GCSC_S0SC_Pos (0UL) /*!< CCU4 GCSC: S0SC (Bit 0) */ +#define CCU4_GCSC_S0SC_Msk (0x1UL) /*!< CCU4 GCSC: S0SC (Bitfield-Mask: 0x01) */ +#define CCU4_GCSC_S0DSC_Pos (1UL) /*!< CCU4 GCSC: S0DSC (Bit 1) */ +#define CCU4_GCSC_S0DSC_Msk (0x2UL) /*!< CCU4 GCSC: S0DSC (Bitfield-Mask: 0x01) */ +#define CCU4_GCSC_S0PSC_Pos (2UL) /*!< CCU4 GCSC: S0PSC (Bit 2) */ +#define CCU4_GCSC_S0PSC_Msk (0x4UL) /*!< CCU4 GCSC: S0PSC (Bitfield-Mask: 0x01) */ +#define CCU4_GCSC_S1SC_Pos (4UL) /*!< CCU4 GCSC: S1SC (Bit 4) */ +#define CCU4_GCSC_S1SC_Msk (0x10UL) /*!< CCU4 GCSC: S1SC (Bitfield-Mask: 0x01) */ +#define CCU4_GCSC_S1DSC_Pos (5UL) /*!< CCU4 GCSC: S1DSC (Bit 5) */ +#define CCU4_GCSC_S1DSC_Msk (0x20UL) /*!< CCU4 GCSC: S1DSC (Bitfield-Mask: 0x01) */ +#define CCU4_GCSC_S1PSC_Pos (6UL) /*!< CCU4 GCSC: S1PSC (Bit 6) */ +#define CCU4_GCSC_S1PSC_Msk (0x40UL) /*!< CCU4 GCSC: S1PSC (Bitfield-Mask: 0x01) */ +#define CCU4_GCSC_S2SC_Pos (8UL) /*!< CCU4 GCSC: S2SC (Bit 8) */ +#define CCU4_GCSC_S2SC_Msk (0x100UL) /*!< CCU4 GCSC: S2SC (Bitfield-Mask: 0x01) */ +#define CCU4_GCSC_S2DSC_Pos (9UL) /*!< CCU4 GCSC: S2DSC (Bit 9) */ +#define CCU4_GCSC_S2DSC_Msk (0x200UL) /*!< CCU4 GCSC: S2DSC (Bitfield-Mask: 0x01) */ +#define CCU4_GCSC_S2PSC_Pos (10UL) /*!< CCU4 GCSC: S2PSC (Bit 10) */ +#define CCU4_GCSC_S2PSC_Msk (0x400UL) /*!< CCU4 GCSC: S2PSC (Bitfield-Mask: 0x01) */ +#define CCU4_GCSC_S3SC_Pos (12UL) /*!< CCU4 GCSC: S3SC (Bit 12) */ +#define CCU4_GCSC_S3SC_Msk (0x1000UL) /*!< CCU4 GCSC: S3SC (Bitfield-Mask: 0x01) */ +#define CCU4_GCSC_S3DSC_Pos (13UL) /*!< CCU4 GCSC: S3DSC (Bit 13) */ +#define CCU4_GCSC_S3DSC_Msk (0x2000UL) /*!< CCU4 GCSC: S3DSC (Bitfield-Mask: 0x01) */ +#define CCU4_GCSC_S3PSC_Pos (14UL) /*!< CCU4 GCSC: S3PSC (Bit 14) */ +#define CCU4_GCSC_S3PSC_Msk (0x4000UL) /*!< CCU4 GCSC: S3PSC (Bitfield-Mask: 0x01) */ +#define CCU4_GCSC_S0STC_Pos (16UL) /*!< CCU4 GCSC: S0STC (Bit 16) */ +#define CCU4_GCSC_S0STC_Msk (0x10000UL) /*!< CCU4 GCSC: S0STC (Bitfield-Mask: 0x01) */ +#define CCU4_GCSC_S1STC_Pos (17UL) /*!< CCU4 GCSC: S1STC (Bit 17) */ +#define CCU4_GCSC_S1STC_Msk (0x20000UL) /*!< CCU4 GCSC: S1STC (Bitfield-Mask: 0x01) */ +#define CCU4_GCSC_S2STC_Pos (18UL) /*!< CCU4 GCSC: S2STC (Bit 18) */ +#define CCU4_GCSC_S2STC_Msk (0x40000UL) /*!< CCU4 GCSC: S2STC (Bitfield-Mask: 0x01) */ +#define CCU4_GCSC_S3STC_Pos (19UL) /*!< CCU4 GCSC: S3STC (Bit 19) */ +#define CCU4_GCSC_S3STC_Msk (0x80000UL) /*!< CCU4 GCSC: S3STC (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- CCU4_GCST --------------------------------- */ +#define CCU4_GCST_S0SS_Pos (0UL) /*!< CCU4 GCST: S0SS (Bit 0) */ +#define CCU4_GCST_S0SS_Msk (0x1UL) /*!< CCU4 GCST: S0SS (Bitfield-Mask: 0x01) */ +#define CCU4_GCST_S0DSS_Pos (1UL) /*!< CCU4 GCST: S0DSS (Bit 1) */ +#define CCU4_GCST_S0DSS_Msk (0x2UL) /*!< CCU4 GCST: S0DSS (Bitfield-Mask: 0x01) */ +#define CCU4_GCST_S0PSS_Pos (2UL) /*!< CCU4 GCST: S0PSS (Bit 2) */ +#define CCU4_GCST_S0PSS_Msk (0x4UL) /*!< CCU4 GCST: S0PSS (Bitfield-Mask: 0x01) */ +#define CCU4_GCST_S1SS_Pos (4UL) /*!< CCU4 GCST: S1SS (Bit 4) */ +#define CCU4_GCST_S1SS_Msk (0x10UL) /*!< CCU4 GCST: S1SS (Bitfield-Mask: 0x01) */ +#define CCU4_GCST_S1DSS_Pos (5UL) /*!< CCU4 GCST: S1DSS (Bit 5) */ +#define CCU4_GCST_S1DSS_Msk (0x20UL) /*!< CCU4 GCST: S1DSS (Bitfield-Mask: 0x01) */ +#define CCU4_GCST_S1PSS_Pos (6UL) /*!< CCU4 GCST: S1PSS (Bit 6) */ +#define CCU4_GCST_S1PSS_Msk (0x40UL) /*!< CCU4 GCST: S1PSS (Bitfield-Mask: 0x01) */ +#define CCU4_GCST_S2SS_Pos (8UL) /*!< CCU4 GCST: S2SS (Bit 8) */ +#define CCU4_GCST_S2SS_Msk (0x100UL) /*!< CCU4 GCST: S2SS (Bitfield-Mask: 0x01) */ +#define CCU4_GCST_S2DSS_Pos (9UL) /*!< CCU4 GCST: S2DSS (Bit 9) */ +#define CCU4_GCST_S2DSS_Msk (0x200UL) /*!< CCU4 GCST: S2DSS (Bitfield-Mask: 0x01) */ +#define CCU4_GCST_S2PSS_Pos (10UL) /*!< CCU4 GCST: S2PSS (Bit 10) */ +#define CCU4_GCST_S2PSS_Msk (0x400UL) /*!< CCU4 GCST: S2PSS (Bitfield-Mask: 0x01) */ +#define CCU4_GCST_S3SS_Pos (12UL) /*!< CCU4 GCST: S3SS (Bit 12) */ +#define CCU4_GCST_S3SS_Msk (0x1000UL) /*!< CCU4 GCST: S3SS (Bitfield-Mask: 0x01) */ +#define CCU4_GCST_S3DSS_Pos (13UL) /*!< CCU4 GCST: S3DSS (Bit 13) */ +#define CCU4_GCST_S3DSS_Msk (0x2000UL) /*!< CCU4 GCST: S3DSS (Bitfield-Mask: 0x01) */ +#define CCU4_GCST_S3PSS_Pos (14UL) /*!< CCU4 GCST: S3PSS (Bit 14) */ +#define CCU4_GCST_S3PSS_Msk (0x4000UL) /*!< CCU4 GCST: S3PSS (Bitfield-Mask: 0x01) */ +#define CCU4_GCST_CC40ST_Pos (16UL) /*!< CCU4 GCST: CC40ST (Bit 16) */ +#define CCU4_GCST_CC40ST_Msk (0x10000UL) /*!< CCU4 GCST: CC40ST (Bitfield-Mask: 0x01) */ +#define CCU4_GCST_CC41ST_Pos (17UL) /*!< CCU4 GCST: CC41ST (Bit 17) */ +#define CCU4_GCST_CC41ST_Msk (0x20000UL) /*!< CCU4 GCST: CC41ST (Bitfield-Mask: 0x01) */ +#define CCU4_GCST_CC42ST_Pos (18UL) /*!< CCU4 GCST: CC42ST (Bit 18) */ +#define CCU4_GCST_CC42ST_Msk (0x40000UL) /*!< CCU4 GCST: CC42ST (Bitfield-Mask: 0x01) */ +#define CCU4_GCST_CC43ST_Pos (19UL) /*!< CCU4 GCST: CC43ST (Bit 19) */ +#define CCU4_GCST_CC43ST_Msk (0x80000UL) /*!< CCU4 GCST: CC43ST (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- CCU4_ECRD --------------------------------- */ +#define CCU4_ECRD_CAPV_Pos (0UL) /*!< CCU4 ECRD: CAPV (Bit 0) */ +#define CCU4_ECRD_CAPV_Msk (0xffffUL) /*!< CCU4 ECRD: CAPV (Bitfield-Mask: 0xffff) */ +#define CCU4_ECRD_FPCV_Pos (16UL) /*!< CCU4 ECRD: FPCV (Bit 16) */ +#define CCU4_ECRD_FPCV_Msk (0xf0000UL) /*!< CCU4 ECRD: FPCV (Bitfield-Mask: 0x0f) */ +#define CCU4_ECRD_SPTR_Pos (20UL) /*!< CCU4 ECRD: SPTR (Bit 20) */ +#define CCU4_ECRD_SPTR_Msk (0x300000UL) /*!< CCU4 ECRD: SPTR (Bitfield-Mask: 0x03) */ +#define CCU4_ECRD_VPTR_Pos (22UL) /*!< CCU4 ECRD: VPTR (Bit 22) */ +#define CCU4_ECRD_VPTR_Msk (0xc00000UL) /*!< CCU4 ECRD: VPTR (Bitfield-Mask: 0x03) */ +#define CCU4_ECRD_FFL_Pos (24UL) /*!< CCU4 ECRD: FFL (Bit 24) */ +#define CCU4_ECRD_FFL_Msk (0x1000000UL) /*!< CCU4 ECRD: FFL (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- CCU4_MIDR --------------------------------- */ +#define CCU4_MIDR_MODR_Pos (0UL) /*!< CCU4 MIDR: MODR (Bit 0) */ +#define CCU4_MIDR_MODR_Msk (0xffUL) /*!< CCU4 MIDR: MODR (Bitfield-Mask: 0xff) */ +#define CCU4_MIDR_MODT_Pos (8UL) /*!< CCU4 MIDR: MODT (Bit 8) */ +#define CCU4_MIDR_MODT_Msk (0xff00UL) /*!< CCU4 MIDR: MODT (Bitfield-Mask: 0xff) */ +#define CCU4_MIDR_MODN_Pos (16UL) /*!< CCU4 MIDR: MODN (Bit 16) */ +#define CCU4_MIDR_MODN_Msk (0xffff0000UL) /*!< CCU4 MIDR: MODN (Bitfield-Mask: 0xffff) */ + + +/* ================================================================================ */ +/* ================ Group 'CCU4_CC4' Position & Mask ================ */ +/* ================================================================================ */ + + +/* -------------------------------- CCU4_CC4_INS -------------------------------- */ +#define CCU4_CC4_INS_EV0IS_Pos (0UL) /*!< CCU4_CC4 INS: EV0IS (Bit 0) */ +#define CCU4_CC4_INS_EV0IS_Msk (0xfUL) /*!< CCU4_CC4 INS: EV0IS (Bitfield-Mask: 0x0f) */ +#define CCU4_CC4_INS_EV1IS_Pos (4UL) /*!< CCU4_CC4 INS: EV1IS (Bit 4) */ +#define CCU4_CC4_INS_EV1IS_Msk (0xf0UL) /*!< CCU4_CC4 INS: EV1IS (Bitfield-Mask: 0x0f) */ +#define CCU4_CC4_INS_EV2IS_Pos (8UL) /*!< CCU4_CC4 INS: EV2IS (Bit 8) */ +#define CCU4_CC4_INS_EV2IS_Msk (0xf00UL) /*!< CCU4_CC4 INS: EV2IS (Bitfield-Mask: 0x0f) */ +#define CCU4_CC4_INS_EV0EM_Pos (16UL) /*!< CCU4_CC4 INS: EV0EM (Bit 16) */ +#define CCU4_CC4_INS_EV0EM_Msk (0x30000UL) /*!< CCU4_CC4 INS: EV0EM (Bitfield-Mask: 0x03) */ +#define CCU4_CC4_INS_EV1EM_Pos (18UL) /*!< CCU4_CC4 INS: EV1EM (Bit 18) */ +#define CCU4_CC4_INS_EV1EM_Msk (0xc0000UL) /*!< CCU4_CC4 INS: EV1EM (Bitfield-Mask: 0x03) */ +#define CCU4_CC4_INS_EV2EM_Pos (20UL) /*!< CCU4_CC4 INS: EV2EM (Bit 20) */ +#define CCU4_CC4_INS_EV2EM_Msk (0x300000UL) /*!< CCU4_CC4 INS: EV2EM (Bitfield-Mask: 0x03) */ +#define CCU4_CC4_INS_EV0LM_Pos (22UL) /*!< CCU4_CC4 INS: EV0LM (Bit 22) */ +#define CCU4_CC4_INS_EV0LM_Msk (0x400000UL) /*!< CCU4_CC4 INS: EV0LM (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_INS_EV1LM_Pos (23UL) /*!< CCU4_CC4 INS: EV1LM (Bit 23) */ +#define CCU4_CC4_INS_EV1LM_Msk (0x800000UL) /*!< CCU4_CC4 INS: EV1LM (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_INS_EV2LM_Pos (24UL) /*!< CCU4_CC4 INS: EV2LM (Bit 24) */ +#define CCU4_CC4_INS_EV2LM_Msk (0x1000000UL) /*!< CCU4_CC4 INS: EV2LM (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_INS_LPF0M_Pos (25UL) /*!< CCU4_CC4 INS: LPF0M (Bit 25) */ +#define CCU4_CC4_INS_LPF0M_Msk (0x6000000UL) /*!< CCU4_CC4 INS: LPF0M (Bitfield-Mask: 0x03) */ +#define CCU4_CC4_INS_LPF1M_Pos (27UL) /*!< CCU4_CC4 INS: LPF1M (Bit 27) */ +#define CCU4_CC4_INS_LPF1M_Msk (0x18000000UL) /*!< CCU4_CC4 INS: LPF1M (Bitfield-Mask: 0x03) */ +#define CCU4_CC4_INS_LPF2M_Pos (29UL) /*!< CCU4_CC4 INS: LPF2M (Bit 29) */ +#define CCU4_CC4_INS_LPF2M_Msk (0x60000000UL) /*!< CCU4_CC4 INS: LPF2M (Bitfield-Mask: 0x03) */ + +/* -------------------------------- CCU4_CC4_CMC -------------------------------- */ +#define CCU4_CC4_CMC_STRTS_Pos (0UL) /*!< CCU4_CC4 CMC: STRTS (Bit 0) */ +#define CCU4_CC4_CMC_STRTS_Msk (0x3UL) /*!< CCU4_CC4 CMC: STRTS (Bitfield-Mask: 0x03) */ +#define CCU4_CC4_CMC_ENDS_Pos (2UL) /*!< CCU4_CC4 CMC: ENDS (Bit 2) */ +#define CCU4_CC4_CMC_ENDS_Msk (0xcUL) /*!< CCU4_CC4 CMC: ENDS (Bitfield-Mask: 0x03) */ +#define CCU4_CC4_CMC_CAP0S_Pos (4UL) /*!< CCU4_CC4 CMC: CAP0S (Bit 4) */ +#define CCU4_CC4_CMC_CAP0S_Msk (0x30UL) /*!< CCU4_CC4 CMC: CAP0S (Bitfield-Mask: 0x03) */ +#define CCU4_CC4_CMC_CAP1S_Pos (6UL) /*!< CCU4_CC4 CMC: CAP1S (Bit 6) */ +#define CCU4_CC4_CMC_CAP1S_Msk (0xc0UL) /*!< CCU4_CC4 CMC: CAP1S (Bitfield-Mask: 0x03) */ +#define CCU4_CC4_CMC_GATES_Pos (8UL) /*!< CCU4_CC4 CMC: GATES (Bit 8) */ +#define CCU4_CC4_CMC_GATES_Msk (0x300UL) /*!< CCU4_CC4 CMC: GATES (Bitfield-Mask: 0x03) */ +#define CCU4_CC4_CMC_UDS_Pos (10UL) /*!< CCU4_CC4 CMC: UDS (Bit 10) */ +#define CCU4_CC4_CMC_UDS_Msk (0xc00UL) /*!< CCU4_CC4 CMC: UDS (Bitfield-Mask: 0x03) */ +#define CCU4_CC4_CMC_LDS_Pos (12UL) /*!< CCU4_CC4 CMC: LDS (Bit 12) */ +#define CCU4_CC4_CMC_LDS_Msk (0x3000UL) /*!< CCU4_CC4 CMC: LDS (Bitfield-Mask: 0x03) */ +#define CCU4_CC4_CMC_CNTS_Pos (14UL) /*!< CCU4_CC4 CMC: CNTS (Bit 14) */ +#define CCU4_CC4_CMC_CNTS_Msk (0xc000UL) /*!< CCU4_CC4 CMC: CNTS (Bitfield-Mask: 0x03) */ +#define CCU4_CC4_CMC_OFS_Pos (16UL) /*!< CCU4_CC4 CMC: OFS (Bit 16) */ +#define CCU4_CC4_CMC_OFS_Msk (0x10000UL) /*!< CCU4_CC4 CMC: OFS (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_CMC_TS_Pos (17UL) /*!< CCU4_CC4 CMC: TS (Bit 17) */ +#define CCU4_CC4_CMC_TS_Msk (0x20000UL) /*!< CCU4_CC4 CMC: TS (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_CMC_MOS_Pos (18UL) /*!< CCU4_CC4 CMC: MOS (Bit 18) */ +#define CCU4_CC4_CMC_MOS_Msk (0xc0000UL) /*!< CCU4_CC4 CMC: MOS (Bitfield-Mask: 0x03) */ +#define CCU4_CC4_CMC_TCE_Pos (20UL) /*!< CCU4_CC4 CMC: TCE (Bit 20) */ +#define CCU4_CC4_CMC_TCE_Msk (0x100000UL) /*!< CCU4_CC4 CMC: TCE (Bitfield-Mask: 0x01) */ + +/* -------------------------------- CCU4_CC4_TCST ------------------------------- */ +#define CCU4_CC4_TCST_TRB_Pos (0UL) /*!< CCU4_CC4 TCST: TRB (Bit 0) */ +#define CCU4_CC4_TCST_TRB_Msk (0x1UL) /*!< CCU4_CC4 TCST: TRB (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_TCST_CDIR_Pos (1UL) /*!< CCU4_CC4 TCST: CDIR (Bit 1) */ +#define CCU4_CC4_TCST_CDIR_Msk (0x2UL) /*!< CCU4_CC4 TCST: CDIR (Bitfield-Mask: 0x01) */ + +/* ------------------------------- CCU4_CC4_TCSET ------------------------------- */ +#define CCU4_CC4_TCSET_TRBS_Pos (0UL) /*!< CCU4_CC4 TCSET: TRBS (Bit 0) */ +#define CCU4_CC4_TCSET_TRBS_Msk (0x1UL) /*!< CCU4_CC4 TCSET: TRBS (Bitfield-Mask: 0x01) */ + +/* ------------------------------- CCU4_CC4_TCCLR ------------------------------- */ +#define CCU4_CC4_TCCLR_TRBC_Pos (0UL) /*!< CCU4_CC4 TCCLR: TRBC (Bit 0) */ +#define CCU4_CC4_TCCLR_TRBC_Msk (0x1UL) /*!< CCU4_CC4 TCCLR: TRBC (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_TCCLR_TCC_Pos (1UL) /*!< CCU4_CC4 TCCLR: TCC (Bit 1) */ +#define CCU4_CC4_TCCLR_TCC_Msk (0x2UL) /*!< CCU4_CC4 TCCLR: TCC (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_TCCLR_DITC_Pos (2UL) /*!< CCU4_CC4 TCCLR: DITC (Bit 2) */ +#define CCU4_CC4_TCCLR_DITC_Msk (0x4UL) /*!< CCU4_CC4 TCCLR: DITC (Bitfield-Mask: 0x01) */ + +/* --------------------------------- CCU4_CC4_TC -------------------------------- */ +#define CCU4_CC4_TC_TCM_Pos (0UL) /*!< CCU4_CC4 TC: TCM (Bit 0) */ +#define CCU4_CC4_TC_TCM_Msk (0x1UL) /*!< CCU4_CC4 TC: TCM (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_TC_TSSM_Pos (1UL) /*!< CCU4_CC4 TC: TSSM (Bit 1) */ +#define CCU4_CC4_TC_TSSM_Msk (0x2UL) /*!< CCU4_CC4 TC: TSSM (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_TC_CLST_Pos (2UL) /*!< CCU4_CC4 TC: CLST (Bit 2) */ +#define CCU4_CC4_TC_CLST_Msk (0x4UL) /*!< CCU4_CC4 TC: CLST (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_TC_CMOD_Pos (3UL) /*!< CCU4_CC4 TC: CMOD (Bit 3) */ +#define CCU4_CC4_TC_CMOD_Msk (0x8UL) /*!< CCU4_CC4 TC: CMOD (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_TC_ECM_Pos (4UL) /*!< CCU4_CC4 TC: ECM (Bit 4) */ +#define CCU4_CC4_TC_ECM_Msk (0x10UL) /*!< CCU4_CC4 TC: ECM (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_TC_CAPC_Pos (5UL) /*!< CCU4_CC4 TC: CAPC (Bit 5) */ +#define CCU4_CC4_TC_CAPC_Msk (0x60UL) /*!< CCU4_CC4 TC: CAPC (Bitfield-Mask: 0x03) */ +#define CCU4_CC4_TC_ENDM_Pos (8UL) /*!< CCU4_CC4 TC: ENDM (Bit 8) */ +#define CCU4_CC4_TC_ENDM_Msk (0x300UL) /*!< CCU4_CC4 TC: ENDM (Bitfield-Mask: 0x03) */ +#define CCU4_CC4_TC_STRM_Pos (10UL) /*!< CCU4_CC4 TC: STRM (Bit 10) */ +#define CCU4_CC4_TC_STRM_Msk (0x400UL) /*!< CCU4_CC4 TC: STRM (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_TC_SCE_Pos (11UL) /*!< CCU4_CC4 TC: SCE (Bit 11) */ +#define CCU4_CC4_TC_SCE_Msk (0x800UL) /*!< CCU4_CC4 TC: SCE (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_TC_CCS_Pos (12UL) /*!< CCU4_CC4 TC: CCS (Bit 12) */ +#define CCU4_CC4_TC_CCS_Msk (0x1000UL) /*!< CCU4_CC4 TC: CCS (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_TC_DITHE_Pos (13UL) /*!< CCU4_CC4 TC: DITHE (Bit 13) */ +#define CCU4_CC4_TC_DITHE_Msk (0x6000UL) /*!< CCU4_CC4 TC: DITHE (Bitfield-Mask: 0x03) */ +#define CCU4_CC4_TC_DIM_Pos (15UL) /*!< CCU4_CC4 TC: DIM (Bit 15) */ +#define CCU4_CC4_TC_DIM_Msk (0x8000UL) /*!< CCU4_CC4 TC: DIM (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_TC_FPE_Pos (16UL) /*!< CCU4_CC4 TC: FPE (Bit 16) */ +#define CCU4_CC4_TC_FPE_Msk (0x10000UL) /*!< CCU4_CC4 TC: FPE (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_TC_TRAPE_Pos (17UL) /*!< CCU4_CC4 TC: TRAPE (Bit 17) */ +#define CCU4_CC4_TC_TRAPE_Msk (0x20000UL) /*!< CCU4_CC4 TC: TRAPE (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_TC_TRPSE_Pos (21UL) /*!< CCU4_CC4 TC: TRPSE (Bit 21) */ +#define CCU4_CC4_TC_TRPSE_Msk (0x200000UL) /*!< CCU4_CC4 TC: TRPSE (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_TC_TRPSW_Pos (22UL) /*!< CCU4_CC4 TC: TRPSW (Bit 22) */ +#define CCU4_CC4_TC_TRPSW_Msk (0x400000UL) /*!< CCU4_CC4 TC: TRPSW (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_TC_EMS_Pos (23UL) /*!< CCU4_CC4 TC: EMS (Bit 23) */ +#define CCU4_CC4_TC_EMS_Msk (0x800000UL) /*!< CCU4_CC4 TC: EMS (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_TC_EMT_Pos (24UL) /*!< CCU4_CC4 TC: EMT (Bit 24) */ +#define CCU4_CC4_TC_EMT_Msk (0x1000000UL) /*!< CCU4_CC4 TC: EMT (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_TC_MCME_Pos (25UL) /*!< CCU4_CC4 TC: MCME (Bit 25) */ +#define CCU4_CC4_TC_MCME_Msk (0x2000000UL) /*!< CCU4_CC4 TC: MCME (Bitfield-Mask: 0x01) */ + +/* -------------------------------- CCU4_CC4_PSL -------------------------------- */ +#define CCU4_CC4_PSL_PSL_Pos (0UL) /*!< CCU4_CC4 PSL: PSL (Bit 0) */ +#define CCU4_CC4_PSL_PSL_Msk (0x1UL) /*!< CCU4_CC4 PSL: PSL (Bitfield-Mask: 0x01) */ + +/* -------------------------------- CCU4_CC4_DIT -------------------------------- */ +#define CCU4_CC4_DIT_DCV_Pos (0UL) /*!< CCU4_CC4 DIT: DCV (Bit 0) */ +#define CCU4_CC4_DIT_DCV_Msk (0xfUL) /*!< CCU4_CC4 DIT: DCV (Bitfield-Mask: 0x0f) */ +#define CCU4_CC4_DIT_DCNT_Pos (8UL) /*!< CCU4_CC4 DIT: DCNT (Bit 8) */ +#define CCU4_CC4_DIT_DCNT_Msk (0xf00UL) /*!< CCU4_CC4 DIT: DCNT (Bitfield-Mask: 0x0f) */ + +/* -------------------------------- CCU4_CC4_DITS ------------------------------- */ +#define CCU4_CC4_DITS_DCVS_Pos (0UL) /*!< CCU4_CC4 DITS: DCVS (Bit 0) */ +#define CCU4_CC4_DITS_DCVS_Msk (0xfUL) /*!< CCU4_CC4 DITS: DCVS (Bitfield-Mask: 0x0f) */ + +/* -------------------------------- CCU4_CC4_PSC -------------------------------- */ +#define CCU4_CC4_PSC_PSIV_Pos (0UL) /*!< CCU4_CC4 PSC: PSIV (Bit 0) */ +#define CCU4_CC4_PSC_PSIV_Msk (0xfUL) /*!< CCU4_CC4 PSC: PSIV (Bitfield-Mask: 0x0f) */ + +/* -------------------------------- CCU4_CC4_FPC -------------------------------- */ +#define CCU4_CC4_FPC_PCMP_Pos (0UL) /*!< CCU4_CC4 FPC: PCMP (Bit 0) */ +#define CCU4_CC4_FPC_PCMP_Msk (0xfUL) /*!< CCU4_CC4 FPC: PCMP (Bitfield-Mask: 0x0f) */ +#define CCU4_CC4_FPC_PVAL_Pos (8UL) /*!< CCU4_CC4 FPC: PVAL (Bit 8) */ +#define CCU4_CC4_FPC_PVAL_Msk (0xf00UL) /*!< CCU4_CC4 FPC: PVAL (Bitfield-Mask: 0x0f) */ + +/* -------------------------------- CCU4_CC4_FPCS ------------------------------- */ +#define CCU4_CC4_FPCS_PCMP_Pos (0UL) /*!< CCU4_CC4 FPCS: PCMP (Bit 0) */ +#define CCU4_CC4_FPCS_PCMP_Msk (0xfUL) /*!< CCU4_CC4 FPCS: PCMP (Bitfield-Mask: 0x0f) */ + +/* --------------------------------- CCU4_CC4_PR -------------------------------- */ +#define CCU4_CC4_PR_PR_Pos (0UL) /*!< CCU4_CC4 PR: PR (Bit 0) */ +#define CCU4_CC4_PR_PR_Msk (0xffffUL) /*!< CCU4_CC4 PR: PR (Bitfield-Mask: 0xffff) */ + +/* -------------------------------- CCU4_CC4_PRS -------------------------------- */ +#define CCU4_CC4_PRS_PRS_Pos (0UL) /*!< CCU4_CC4 PRS: PRS (Bit 0) */ +#define CCU4_CC4_PRS_PRS_Msk (0xffffUL) /*!< CCU4_CC4 PRS: PRS (Bitfield-Mask: 0xffff) */ + +/* --------------------------------- CCU4_CC4_CR -------------------------------- */ +#define CCU4_CC4_CR_CR_Pos (0UL) /*!< CCU4_CC4 CR: CR (Bit 0) */ +#define CCU4_CC4_CR_CR_Msk (0xffffUL) /*!< CCU4_CC4 CR: CR (Bitfield-Mask: 0xffff) */ + +/* -------------------------------- CCU4_CC4_CRS -------------------------------- */ +#define CCU4_CC4_CRS_CRS_Pos (0UL) /*!< CCU4_CC4 CRS: CRS (Bit 0) */ +#define CCU4_CC4_CRS_CRS_Msk (0xffffUL) /*!< CCU4_CC4 CRS: CRS (Bitfield-Mask: 0xffff) */ + +/* ------------------------------- CCU4_CC4_TIMER ------------------------------- */ +#define CCU4_CC4_TIMER_TVAL_Pos (0UL) /*!< CCU4_CC4 TIMER: TVAL (Bit 0) */ +#define CCU4_CC4_TIMER_TVAL_Msk (0xffffUL) /*!< CCU4_CC4 TIMER: TVAL (Bitfield-Mask: 0xffff) */ + +/* --------------------------------- CCU4_CC4_CV -------------------------------- */ +#define CCU4_CC4_CV_CAPTV_Pos (0UL) /*!< CCU4_CC4 CV: CAPTV (Bit 0) */ +#define CCU4_CC4_CV_CAPTV_Msk (0xffffUL) /*!< CCU4_CC4 CV: CAPTV (Bitfield-Mask: 0xffff) */ +#define CCU4_CC4_CV_FPCV_Pos (16UL) /*!< CCU4_CC4 CV: FPCV (Bit 16) */ +#define CCU4_CC4_CV_FPCV_Msk (0xf0000UL) /*!< CCU4_CC4 CV: FPCV (Bitfield-Mask: 0x0f) */ +#define CCU4_CC4_CV_FFL_Pos (20UL) /*!< CCU4_CC4 CV: FFL (Bit 20) */ +#define CCU4_CC4_CV_FFL_Msk (0x100000UL) /*!< CCU4_CC4 CV: FFL (Bitfield-Mask: 0x01) */ + +/* -------------------------------- CCU4_CC4_INTS ------------------------------- */ +#define CCU4_CC4_INTS_PMUS_Pos (0UL) /*!< CCU4_CC4 INTS: PMUS (Bit 0) */ +#define CCU4_CC4_INTS_PMUS_Msk (0x1UL) /*!< CCU4_CC4 INTS: PMUS (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_INTS_OMDS_Pos (1UL) /*!< CCU4_CC4 INTS: OMDS (Bit 1) */ +#define CCU4_CC4_INTS_OMDS_Msk (0x2UL) /*!< CCU4_CC4 INTS: OMDS (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_INTS_CMUS_Pos (2UL) /*!< CCU4_CC4 INTS: CMUS (Bit 2) */ +#define CCU4_CC4_INTS_CMUS_Msk (0x4UL) /*!< CCU4_CC4 INTS: CMUS (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_INTS_CMDS_Pos (3UL) /*!< CCU4_CC4 INTS: CMDS (Bit 3) */ +#define CCU4_CC4_INTS_CMDS_Msk (0x8UL) /*!< CCU4_CC4 INTS: CMDS (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_INTS_E0AS_Pos (8UL) /*!< CCU4_CC4 INTS: E0AS (Bit 8) */ +#define CCU4_CC4_INTS_E0AS_Msk (0x100UL) /*!< CCU4_CC4 INTS: E0AS (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_INTS_E1AS_Pos (9UL) /*!< CCU4_CC4 INTS: E1AS (Bit 9) */ +#define CCU4_CC4_INTS_E1AS_Msk (0x200UL) /*!< CCU4_CC4 INTS: E1AS (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_INTS_E2AS_Pos (10UL) /*!< CCU4_CC4 INTS: E2AS (Bit 10) */ +#define CCU4_CC4_INTS_E2AS_Msk (0x400UL) /*!< CCU4_CC4 INTS: E2AS (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_INTS_TRPF_Pos (11UL) /*!< CCU4_CC4 INTS: TRPF (Bit 11) */ +#define CCU4_CC4_INTS_TRPF_Msk (0x800UL) /*!< CCU4_CC4 INTS: TRPF (Bitfield-Mask: 0x01) */ + +/* -------------------------------- CCU4_CC4_INTE ------------------------------- */ +#define CCU4_CC4_INTE_PME_Pos (0UL) /*!< CCU4_CC4 INTE: PME (Bit 0) */ +#define CCU4_CC4_INTE_PME_Msk (0x1UL) /*!< CCU4_CC4 INTE: PME (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_INTE_OME_Pos (1UL) /*!< CCU4_CC4 INTE: OME (Bit 1) */ +#define CCU4_CC4_INTE_OME_Msk (0x2UL) /*!< CCU4_CC4 INTE: OME (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_INTE_CMUE_Pos (2UL) /*!< CCU4_CC4 INTE: CMUE (Bit 2) */ +#define CCU4_CC4_INTE_CMUE_Msk (0x4UL) /*!< CCU4_CC4 INTE: CMUE (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_INTE_CMDE_Pos (3UL) /*!< CCU4_CC4 INTE: CMDE (Bit 3) */ +#define CCU4_CC4_INTE_CMDE_Msk (0x8UL) /*!< CCU4_CC4 INTE: CMDE (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_INTE_E0AE_Pos (8UL) /*!< CCU4_CC4 INTE: E0AE (Bit 8) */ +#define CCU4_CC4_INTE_E0AE_Msk (0x100UL) /*!< CCU4_CC4 INTE: E0AE (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_INTE_E1AE_Pos (9UL) /*!< CCU4_CC4 INTE: E1AE (Bit 9) */ +#define CCU4_CC4_INTE_E1AE_Msk (0x200UL) /*!< CCU4_CC4 INTE: E1AE (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_INTE_E2AE_Pos (10UL) /*!< CCU4_CC4 INTE: E2AE (Bit 10) */ +#define CCU4_CC4_INTE_E2AE_Msk (0x400UL) /*!< CCU4_CC4 INTE: E2AE (Bitfield-Mask: 0x01) */ + +/* -------------------------------- CCU4_CC4_SRS -------------------------------- */ +#define CCU4_CC4_SRS_POSR_Pos (0UL) /*!< CCU4_CC4 SRS: POSR (Bit 0) */ +#define CCU4_CC4_SRS_POSR_Msk (0x3UL) /*!< CCU4_CC4 SRS: POSR (Bitfield-Mask: 0x03) */ +#define CCU4_CC4_SRS_CMSR_Pos (2UL) /*!< CCU4_CC4 SRS: CMSR (Bit 2) */ +#define CCU4_CC4_SRS_CMSR_Msk (0xcUL) /*!< CCU4_CC4 SRS: CMSR (Bitfield-Mask: 0x03) */ +#define CCU4_CC4_SRS_E0SR_Pos (8UL) /*!< CCU4_CC4 SRS: E0SR (Bit 8) */ +#define CCU4_CC4_SRS_E0SR_Msk (0x300UL) /*!< CCU4_CC4 SRS: E0SR (Bitfield-Mask: 0x03) */ +#define CCU4_CC4_SRS_E1SR_Pos (10UL) /*!< CCU4_CC4 SRS: E1SR (Bit 10) */ +#define CCU4_CC4_SRS_E1SR_Msk (0xc00UL) /*!< CCU4_CC4 SRS: E1SR (Bitfield-Mask: 0x03) */ +#define CCU4_CC4_SRS_E2SR_Pos (12UL) /*!< CCU4_CC4 SRS: E2SR (Bit 12) */ +#define CCU4_CC4_SRS_E2SR_Msk (0x3000UL) /*!< CCU4_CC4 SRS: E2SR (Bitfield-Mask: 0x03) */ + +/* -------------------------------- CCU4_CC4_SWS -------------------------------- */ +#define CCU4_CC4_SWS_SPM_Pos (0UL) /*!< CCU4_CC4 SWS: SPM (Bit 0) */ +#define CCU4_CC4_SWS_SPM_Msk (0x1UL) /*!< CCU4_CC4 SWS: SPM (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_SWS_SOM_Pos (1UL) /*!< CCU4_CC4 SWS: SOM (Bit 1) */ +#define CCU4_CC4_SWS_SOM_Msk (0x2UL) /*!< CCU4_CC4 SWS: SOM (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_SWS_SCMU_Pos (2UL) /*!< CCU4_CC4 SWS: SCMU (Bit 2) */ +#define CCU4_CC4_SWS_SCMU_Msk (0x4UL) /*!< CCU4_CC4 SWS: SCMU (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_SWS_SCMD_Pos (3UL) /*!< CCU4_CC4 SWS: SCMD (Bit 3) */ +#define CCU4_CC4_SWS_SCMD_Msk (0x8UL) /*!< CCU4_CC4 SWS: SCMD (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_SWS_SE0A_Pos (8UL) /*!< CCU4_CC4 SWS: SE0A (Bit 8) */ +#define CCU4_CC4_SWS_SE0A_Msk (0x100UL) /*!< CCU4_CC4 SWS: SE0A (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_SWS_SE1A_Pos (9UL) /*!< CCU4_CC4 SWS: SE1A (Bit 9) */ +#define CCU4_CC4_SWS_SE1A_Msk (0x200UL) /*!< CCU4_CC4 SWS: SE1A (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_SWS_SE2A_Pos (10UL) /*!< CCU4_CC4 SWS: SE2A (Bit 10) */ +#define CCU4_CC4_SWS_SE2A_Msk (0x400UL) /*!< CCU4_CC4 SWS: SE2A (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_SWS_STRPF_Pos (11UL) /*!< CCU4_CC4 SWS: STRPF (Bit 11) */ +#define CCU4_CC4_SWS_STRPF_Msk (0x800UL) /*!< CCU4_CC4 SWS: STRPF (Bitfield-Mask: 0x01) */ + +/* -------------------------------- CCU4_CC4_SWR -------------------------------- */ +#define CCU4_CC4_SWR_RPM_Pos (0UL) /*!< CCU4_CC4 SWR: RPM (Bit 0) */ +#define CCU4_CC4_SWR_RPM_Msk (0x1UL) /*!< CCU4_CC4 SWR: RPM (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_SWR_ROM_Pos (1UL) /*!< CCU4_CC4 SWR: ROM (Bit 1) */ +#define CCU4_CC4_SWR_ROM_Msk (0x2UL) /*!< CCU4_CC4 SWR: ROM (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_SWR_RCMU_Pos (2UL) /*!< CCU4_CC4 SWR: RCMU (Bit 2) */ +#define CCU4_CC4_SWR_RCMU_Msk (0x4UL) /*!< CCU4_CC4 SWR: RCMU (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_SWR_RCMD_Pos (3UL) /*!< CCU4_CC4 SWR: RCMD (Bit 3) */ +#define CCU4_CC4_SWR_RCMD_Msk (0x8UL) /*!< CCU4_CC4 SWR: RCMD (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_SWR_RE0A_Pos (8UL) /*!< CCU4_CC4 SWR: RE0A (Bit 8) */ +#define CCU4_CC4_SWR_RE0A_Msk (0x100UL) /*!< CCU4_CC4 SWR: RE0A (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_SWR_RE1A_Pos (9UL) /*!< CCU4_CC4 SWR: RE1A (Bit 9) */ +#define CCU4_CC4_SWR_RE1A_Msk (0x200UL) /*!< CCU4_CC4 SWR: RE1A (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_SWR_RE2A_Pos (10UL) /*!< CCU4_CC4 SWR: RE2A (Bit 10) */ +#define CCU4_CC4_SWR_RE2A_Msk (0x400UL) /*!< CCU4_CC4 SWR: RE2A (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_SWR_RTRPF_Pos (11UL) /*!< CCU4_CC4 SWR: RTRPF (Bit 11) */ +#define CCU4_CC4_SWR_RTRPF_Msk (0x800UL) /*!< CCU4_CC4 SWR: RTRPF (Bitfield-Mask: 0x01) */ + + +/* ================================================================================ */ +/* ================ Group 'CCU8' Position & Mask ================ */ +/* ================================================================================ */ + + +/* --------------------------------- CCU8_GCTRL --------------------------------- */ +#define CCU8_GCTRL_PRBC_Pos (0UL) /*!< CCU8 GCTRL: PRBC (Bit 0) */ +#define CCU8_GCTRL_PRBC_Msk (0x7UL) /*!< CCU8 GCTRL: PRBC (Bitfield-Mask: 0x07) */ +#define CCU8_GCTRL_PCIS_Pos (4UL) /*!< CCU8 GCTRL: PCIS (Bit 4) */ +#define CCU8_GCTRL_PCIS_Msk (0x30UL) /*!< CCU8 GCTRL: PCIS (Bitfield-Mask: 0x03) */ +#define CCU8_GCTRL_SUSCFG_Pos (8UL) /*!< CCU8 GCTRL: SUSCFG (Bit 8) */ +#define CCU8_GCTRL_SUSCFG_Msk (0x300UL) /*!< CCU8 GCTRL: SUSCFG (Bitfield-Mask: 0x03) */ +#define CCU8_GCTRL_MSE0_Pos (10UL) /*!< CCU8 GCTRL: MSE0 (Bit 10) */ +#define CCU8_GCTRL_MSE0_Msk (0x400UL) /*!< CCU8 GCTRL: MSE0 (Bitfield-Mask: 0x01) */ +#define CCU8_GCTRL_MSE1_Pos (11UL) /*!< CCU8 GCTRL: MSE1 (Bit 11) */ +#define CCU8_GCTRL_MSE1_Msk (0x800UL) /*!< CCU8 GCTRL: MSE1 (Bitfield-Mask: 0x01) */ +#define CCU8_GCTRL_MSE2_Pos (12UL) /*!< CCU8 GCTRL: MSE2 (Bit 12) */ +#define CCU8_GCTRL_MSE2_Msk (0x1000UL) /*!< CCU8 GCTRL: MSE2 (Bitfield-Mask: 0x01) */ +#define CCU8_GCTRL_MSE3_Pos (13UL) /*!< CCU8 GCTRL: MSE3 (Bit 13) */ +#define CCU8_GCTRL_MSE3_Msk (0x2000UL) /*!< CCU8 GCTRL: MSE3 (Bitfield-Mask: 0x01) */ +#define CCU8_GCTRL_MSDE_Pos (14UL) /*!< CCU8 GCTRL: MSDE (Bit 14) */ +#define CCU8_GCTRL_MSDE_Msk (0xc000UL) /*!< CCU8 GCTRL: MSDE (Bitfield-Mask: 0x03) */ + +/* --------------------------------- CCU8_GSTAT --------------------------------- */ +#define CCU8_GSTAT_S0I_Pos (0UL) /*!< CCU8 GSTAT: S0I (Bit 0) */ +#define CCU8_GSTAT_S0I_Msk (0x1UL) /*!< CCU8 GSTAT: S0I (Bitfield-Mask: 0x01) */ +#define CCU8_GSTAT_S1I_Pos (1UL) /*!< CCU8 GSTAT: S1I (Bit 1) */ +#define CCU8_GSTAT_S1I_Msk (0x2UL) /*!< CCU8 GSTAT: S1I (Bitfield-Mask: 0x01) */ +#define CCU8_GSTAT_S2I_Pos (2UL) /*!< CCU8 GSTAT: S2I (Bit 2) */ +#define CCU8_GSTAT_S2I_Msk (0x4UL) /*!< CCU8 GSTAT: S2I (Bitfield-Mask: 0x01) */ +#define CCU8_GSTAT_S3I_Pos (3UL) /*!< CCU8 GSTAT: S3I (Bit 3) */ +#define CCU8_GSTAT_S3I_Msk (0x8UL) /*!< CCU8 GSTAT: S3I (Bitfield-Mask: 0x01) */ +#define CCU8_GSTAT_PRB_Pos (8UL) /*!< CCU8 GSTAT: PRB (Bit 8) */ +#define CCU8_GSTAT_PRB_Msk (0x100UL) /*!< CCU8 GSTAT: PRB (Bitfield-Mask: 0x01) */ +#define CCU8_GSTAT_PCRB_Pos (10UL) /*!< CCU8 GSTAT: PCRB (Bit 10) */ +#define CCU8_GSTAT_PCRB_Msk (0x400UL) /*!< CCU8 GSTAT: PCRB (Bitfield-Mask: 0x01) */ + +/* --------------------------------- CCU8_GIDLS --------------------------------- */ +#define CCU8_GIDLS_SS0I_Pos (0UL) /*!< CCU8 GIDLS: SS0I (Bit 0) */ +#define CCU8_GIDLS_SS0I_Msk (0x1UL) /*!< CCU8 GIDLS: SS0I (Bitfield-Mask: 0x01) */ +#define CCU8_GIDLS_SS1I_Pos (1UL) /*!< CCU8 GIDLS: SS1I (Bit 1) */ +#define CCU8_GIDLS_SS1I_Msk (0x2UL) /*!< CCU8 GIDLS: SS1I (Bitfield-Mask: 0x01) */ +#define CCU8_GIDLS_SS2I_Pos (2UL) /*!< CCU8 GIDLS: SS2I (Bit 2) */ +#define CCU8_GIDLS_SS2I_Msk (0x4UL) /*!< CCU8 GIDLS: SS2I (Bitfield-Mask: 0x01) */ +#define CCU8_GIDLS_SS3I_Pos (3UL) /*!< CCU8 GIDLS: SS3I (Bit 3) */ +#define CCU8_GIDLS_SS3I_Msk (0x8UL) /*!< CCU8 GIDLS: SS3I (Bitfield-Mask: 0x01) */ +#define CCU8_GIDLS_CPRB_Pos (8UL) /*!< CCU8 GIDLS: CPRB (Bit 8) */ +#define CCU8_GIDLS_CPRB_Msk (0x100UL) /*!< CCU8 GIDLS: CPRB (Bitfield-Mask: 0x01) */ +#define CCU8_GIDLS_PSIC_Pos (9UL) /*!< CCU8 GIDLS: PSIC (Bit 9) */ +#define CCU8_GIDLS_PSIC_Msk (0x200UL) /*!< CCU8 GIDLS: PSIC (Bitfield-Mask: 0x01) */ +#define CCU8_GIDLS_CPCH_Pos (10UL) /*!< CCU8 GIDLS: CPCH (Bit 10) */ +#define CCU8_GIDLS_CPCH_Msk (0x400UL) /*!< CCU8 GIDLS: CPCH (Bitfield-Mask: 0x01) */ + +/* --------------------------------- CCU8_GIDLC --------------------------------- */ +#define CCU8_GIDLC_CS0I_Pos (0UL) /*!< CCU8 GIDLC: CS0I (Bit 0) */ +#define CCU8_GIDLC_CS0I_Msk (0x1UL) /*!< CCU8 GIDLC: CS0I (Bitfield-Mask: 0x01) */ +#define CCU8_GIDLC_CS1I_Pos (1UL) /*!< CCU8 GIDLC: CS1I (Bit 1) */ +#define CCU8_GIDLC_CS1I_Msk (0x2UL) /*!< CCU8 GIDLC: CS1I (Bitfield-Mask: 0x01) */ +#define CCU8_GIDLC_CS2I_Pos (2UL) /*!< CCU8 GIDLC: CS2I (Bit 2) */ +#define CCU8_GIDLC_CS2I_Msk (0x4UL) /*!< CCU8 GIDLC: CS2I (Bitfield-Mask: 0x01) */ +#define CCU8_GIDLC_CS3I_Pos (3UL) /*!< CCU8 GIDLC: CS3I (Bit 3) */ +#define CCU8_GIDLC_CS3I_Msk (0x8UL) /*!< CCU8 GIDLC: CS3I (Bitfield-Mask: 0x01) */ +#define CCU8_GIDLC_SPRB_Pos (8UL) /*!< CCU8 GIDLC: SPRB (Bit 8) */ +#define CCU8_GIDLC_SPRB_Msk (0x100UL) /*!< CCU8 GIDLC: SPRB (Bitfield-Mask: 0x01) */ +#define CCU8_GIDLC_SPCH_Pos (10UL) /*!< CCU8 GIDLC: SPCH (Bit 10) */ +#define CCU8_GIDLC_SPCH_Msk (0x400UL) /*!< CCU8 GIDLC: SPCH (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- CCU8_GCSS --------------------------------- */ +#define CCU8_GCSS_S0SE_Pos (0UL) /*!< CCU8 GCSS: S0SE (Bit 0) */ +#define CCU8_GCSS_S0SE_Msk (0x1UL) /*!< CCU8 GCSS: S0SE (Bitfield-Mask: 0x01) */ +#define CCU8_GCSS_S0DSE_Pos (1UL) /*!< CCU8 GCSS: S0DSE (Bit 1) */ +#define CCU8_GCSS_S0DSE_Msk (0x2UL) /*!< CCU8 GCSS: S0DSE (Bitfield-Mask: 0x01) */ +#define CCU8_GCSS_S0PSE_Pos (2UL) /*!< CCU8 GCSS: S0PSE (Bit 2) */ +#define CCU8_GCSS_S0PSE_Msk (0x4UL) /*!< CCU8 GCSS: S0PSE (Bitfield-Mask: 0x01) */ +#define CCU8_GCSS_S1SE_Pos (4UL) /*!< CCU8 GCSS: S1SE (Bit 4) */ +#define CCU8_GCSS_S1SE_Msk (0x10UL) /*!< CCU8 GCSS: S1SE (Bitfield-Mask: 0x01) */ +#define CCU8_GCSS_S1DSE_Pos (5UL) /*!< CCU8 GCSS: S1DSE (Bit 5) */ +#define CCU8_GCSS_S1DSE_Msk (0x20UL) /*!< CCU8 GCSS: S1DSE (Bitfield-Mask: 0x01) */ +#define CCU8_GCSS_S1PSE_Pos (6UL) /*!< CCU8 GCSS: S1PSE (Bit 6) */ +#define CCU8_GCSS_S1PSE_Msk (0x40UL) /*!< CCU8 GCSS: S1PSE (Bitfield-Mask: 0x01) */ +#define CCU8_GCSS_S2SE_Pos (8UL) /*!< CCU8 GCSS: S2SE (Bit 8) */ +#define CCU8_GCSS_S2SE_Msk (0x100UL) /*!< CCU8 GCSS: S2SE (Bitfield-Mask: 0x01) */ +#define CCU8_GCSS_S2DSE_Pos (9UL) /*!< CCU8 GCSS: S2DSE (Bit 9) */ +#define CCU8_GCSS_S2DSE_Msk (0x200UL) /*!< CCU8 GCSS: S2DSE (Bitfield-Mask: 0x01) */ +#define CCU8_GCSS_S2PSE_Pos (10UL) /*!< CCU8 GCSS: S2PSE (Bit 10) */ +#define CCU8_GCSS_S2PSE_Msk (0x400UL) /*!< CCU8 GCSS: S2PSE (Bitfield-Mask: 0x01) */ +#define CCU8_GCSS_S3SE_Pos (12UL) /*!< CCU8 GCSS: S3SE (Bit 12) */ +#define CCU8_GCSS_S3SE_Msk (0x1000UL) /*!< CCU8 GCSS: S3SE (Bitfield-Mask: 0x01) */ +#define CCU8_GCSS_S3DSE_Pos (13UL) /*!< CCU8 GCSS: S3DSE (Bit 13) */ +#define CCU8_GCSS_S3DSE_Msk (0x2000UL) /*!< CCU8 GCSS: S3DSE (Bitfield-Mask: 0x01) */ +#define CCU8_GCSS_S3PSE_Pos (14UL) /*!< CCU8 GCSS: S3PSE (Bit 14) */ +#define CCU8_GCSS_S3PSE_Msk (0x4000UL) /*!< CCU8 GCSS: S3PSE (Bitfield-Mask: 0x01) */ +#define CCU8_GCSS_S0ST1S_Pos (16UL) /*!< CCU8 GCSS: S0ST1S (Bit 16) */ +#define CCU8_GCSS_S0ST1S_Msk (0x10000UL) /*!< CCU8 GCSS: S0ST1S (Bitfield-Mask: 0x01) */ +#define CCU8_GCSS_S1ST1S_Pos (17UL) /*!< CCU8 GCSS: S1ST1S (Bit 17) */ +#define CCU8_GCSS_S1ST1S_Msk (0x20000UL) /*!< CCU8 GCSS: S1ST1S (Bitfield-Mask: 0x01) */ +#define CCU8_GCSS_S2ST1S_Pos (18UL) /*!< CCU8 GCSS: S2ST1S (Bit 18) */ +#define CCU8_GCSS_S2ST1S_Msk (0x40000UL) /*!< CCU8 GCSS: S2ST1S (Bitfield-Mask: 0x01) */ +#define CCU8_GCSS_S3ST1S_Pos (19UL) /*!< CCU8 GCSS: S3ST1S (Bit 19) */ +#define CCU8_GCSS_S3ST1S_Msk (0x80000UL) /*!< CCU8 GCSS: S3ST1S (Bitfield-Mask: 0x01) */ +#define CCU8_GCSS_S0ST2S_Pos (20UL) /*!< CCU8 GCSS: S0ST2S (Bit 20) */ +#define CCU8_GCSS_S0ST2S_Msk (0x100000UL) /*!< CCU8 GCSS: S0ST2S (Bitfield-Mask: 0x01) */ +#define CCU8_GCSS_S1ST2S_Pos (21UL) /*!< CCU8 GCSS: S1ST2S (Bit 21) */ +#define CCU8_GCSS_S1ST2S_Msk (0x200000UL) /*!< CCU8 GCSS: S1ST2S (Bitfield-Mask: 0x01) */ +#define CCU8_GCSS_S2ST2S_Pos (22UL) /*!< CCU8 GCSS: S2ST2S (Bit 22) */ +#define CCU8_GCSS_S2ST2S_Msk (0x400000UL) /*!< CCU8 GCSS: S2ST2S (Bitfield-Mask: 0x01) */ +#define CCU8_GCSS_S3ST2S_Pos (23UL) /*!< CCU8 GCSS: S3ST2S (Bit 23) */ +#define CCU8_GCSS_S3ST2S_Msk (0x800000UL) /*!< CCU8 GCSS: S3ST2S (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- CCU8_GCSC --------------------------------- */ +#define CCU8_GCSC_S0SC_Pos (0UL) /*!< CCU8 GCSC: S0SC (Bit 0) */ +#define CCU8_GCSC_S0SC_Msk (0x1UL) /*!< CCU8 GCSC: S0SC (Bitfield-Mask: 0x01) */ +#define CCU8_GCSC_S0DSC_Pos (1UL) /*!< CCU8 GCSC: S0DSC (Bit 1) */ +#define CCU8_GCSC_S0DSC_Msk (0x2UL) /*!< CCU8 GCSC: S0DSC (Bitfield-Mask: 0x01) */ +#define CCU8_GCSC_S0PSC_Pos (2UL) /*!< CCU8 GCSC: S0PSC (Bit 2) */ +#define CCU8_GCSC_S0PSC_Msk (0x4UL) /*!< CCU8 GCSC: S0PSC (Bitfield-Mask: 0x01) */ +#define CCU8_GCSC_S1SC_Pos (4UL) /*!< CCU8 GCSC: S1SC (Bit 4) */ +#define CCU8_GCSC_S1SC_Msk (0x10UL) /*!< CCU8 GCSC: S1SC (Bitfield-Mask: 0x01) */ +#define CCU8_GCSC_S1DSC_Pos (5UL) /*!< CCU8 GCSC: S1DSC (Bit 5) */ +#define CCU8_GCSC_S1DSC_Msk (0x20UL) /*!< CCU8 GCSC: S1DSC (Bitfield-Mask: 0x01) */ +#define CCU8_GCSC_S1PSC_Pos (6UL) /*!< CCU8 GCSC: S1PSC (Bit 6) */ +#define CCU8_GCSC_S1PSC_Msk (0x40UL) /*!< CCU8 GCSC: S1PSC (Bitfield-Mask: 0x01) */ +#define CCU8_GCSC_S2SC_Pos (8UL) /*!< CCU8 GCSC: S2SC (Bit 8) */ +#define CCU8_GCSC_S2SC_Msk (0x100UL) /*!< CCU8 GCSC: S2SC (Bitfield-Mask: 0x01) */ +#define CCU8_GCSC_S2DSC_Pos (9UL) /*!< CCU8 GCSC: S2DSC (Bit 9) */ +#define CCU8_GCSC_S2DSC_Msk (0x200UL) /*!< CCU8 GCSC: S2DSC (Bitfield-Mask: 0x01) */ +#define CCU8_GCSC_S2PSC_Pos (10UL) /*!< CCU8 GCSC: S2PSC (Bit 10) */ +#define CCU8_GCSC_S2PSC_Msk (0x400UL) /*!< CCU8 GCSC: S2PSC (Bitfield-Mask: 0x01) */ +#define CCU8_GCSC_S3SC_Pos (12UL) /*!< CCU8 GCSC: S3SC (Bit 12) */ +#define CCU8_GCSC_S3SC_Msk (0x1000UL) /*!< CCU8 GCSC: S3SC (Bitfield-Mask: 0x01) */ +#define CCU8_GCSC_S3DSC_Pos (13UL) /*!< CCU8 GCSC: S3DSC (Bit 13) */ +#define CCU8_GCSC_S3DSC_Msk (0x2000UL) /*!< CCU8 GCSC: S3DSC (Bitfield-Mask: 0x01) */ +#define CCU8_GCSC_S3PSC_Pos (14UL) /*!< CCU8 GCSC: S3PSC (Bit 14) */ +#define CCU8_GCSC_S3PSC_Msk (0x4000UL) /*!< CCU8 GCSC: S3PSC (Bitfield-Mask: 0x01) */ +#define CCU8_GCSC_S0ST1C_Pos (16UL) /*!< CCU8 GCSC: S0ST1C (Bit 16) */ +#define CCU8_GCSC_S0ST1C_Msk (0x10000UL) /*!< CCU8 GCSC: S0ST1C (Bitfield-Mask: 0x01) */ +#define CCU8_GCSC_S1ST1C_Pos (17UL) /*!< CCU8 GCSC: S1ST1C (Bit 17) */ +#define CCU8_GCSC_S1ST1C_Msk (0x20000UL) /*!< CCU8 GCSC: S1ST1C (Bitfield-Mask: 0x01) */ +#define CCU8_GCSC_S2ST1C_Pos (18UL) /*!< CCU8 GCSC: S2ST1C (Bit 18) */ +#define CCU8_GCSC_S2ST1C_Msk (0x40000UL) /*!< CCU8 GCSC: S2ST1C (Bitfield-Mask: 0x01) */ +#define CCU8_GCSC_S3ST1C_Pos (19UL) /*!< CCU8 GCSC: S3ST1C (Bit 19) */ +#define CCU8_GCSC_S3ST1C_Msk (0x80000UL) /*!< CCU8 GCSC: S3ST1C (Bitfield-Mask: 0x01) */ +#define CCU8_GCSC_S0ST2C_Pos (20UL) /*!< CCU8 GCSC: S0ST2C (Bit 20) */ +#define CCU8_GCSC_S0ST2C_Msk (0x100000UL) /*!< CCU8 GCSC: S0ST2C (Bitfield-Mask: 0x01) */ +#define CCU8_GCSC_S1ST2C_Pos (21UL) /*!< CCU8 GCSC: S1ST2C (Bit 21) */ +#define CCU8_GCSC_S1ST2C_Msk (0x200000UL) /*!< CCU8 GCSC: S1ST2C (Bitfield-Mask: 0x01) */ +#define CCU8_GCSC_S2ST2C_Pos (22UL) /*!< CCU8 GCSC: S2ST2C (Bit 22) */ +#define CCU8_GCSC_S2ST2C_Msk (0x400000UL) /*!< CCU8 GCSC: S2ST2C (Bitfield-Mask: 0x01) */ +#define CCU8_GCSC_S3ST2C_Pos (23UL) /*!< CCU8 GCSC: S3ST2C (Bit 23) */ +#define CCU8_GCSC_S3ST2C_Msk (0x800000UL) /*!< CCU8 GCSC: S3ST2C (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- CCU8_GCST --------------------------------- */ +#define CCU8_GCST_S0SS_Pos (0UL) /*!< CCU8 GCST: S0SS (Bit 0) */ +#define CCU8_GCST_S0SS_Msk (0x1UL) /*!< CCU8 GCST: S0SS (Bitfield-Mask: 0x01) */ +#define CCU8_GCST_S0DSS_Pos (1UL) /*!< CCU8 GCST: S0DSS (Bit 1) */ +#define CCU8_GCST_S0DSS_Msk (0x2UL) /*!< CCU8 GCST: S0DSS (Bitfield-Mask: 0x01) */ +#define CCU8_GCST_S0PSS_Pos (2UL) /*!< CCU8 GCST: S0PSS (Bit 2) */ +#define CCU8_GCST_S0PSS_Msk (0x4UL) /*!< CCU8 GCST: S0PSS (Bitfield-Mask: 0x01) */ +#define CCU8_GCST_S1SS_Pos (4UL) /*!< CCU8 GCST: S1SS (Bit 4) */ +#define CCU8_GCST_S1SS_Msk (0x10UL) /*!< CCU8 GCST: S1SS (Bitfield-Mask: 0x01) */ +#define CCU8_GCST_S1DSS_Pos (5UL) /*!< CCU8 GCST: S1DSS (Bit 5) */ +#define CCU8_GCST_S1DSS_Msk (0x20UL) /*!< CCU8 GCST: S1DSS (Bitfield-Mask: 0x01) */ +#define CCU8_GCST_S1PSS_Pos (6UL) /*!< CCU8 GCST: S1PSS (Bit 6) */ +#define CCU8_GCST_S1PSS_Msk (0x40UL) /*!< CCU8 GCST: S1PSS (Bitfield-Mask: 0x01) */ +#define CCU8_GCST_S2SS_Pos (8UL) /*!< CCU8 GCST: S2SS (Bit 8) */ +#define CCU8_GCST_S2SS_Msk (0x100UL) /*!< CCU8 GCST: S2SS (Bitfield-Mask: 0x01) */ +#define CCU8_GCST_S2DSS_Pos (9UL) /*!< CCU8 GCST: S2DSS (Bit 9) */ +#define CCU8_GCST_S2DSS_Msk (0x200UL) /*!< CCU8 GCST: S2DSS (Bitfield-Mask: 0x01) */ +#define CCU8_GCST_S2PSS_Pos (10UL) /*!< CCU8 GCST: S2PSS (Bit 10) */ +#define CCU8_GCST_S2PSS_Msk (0x400UL) /*!< CCU8 GCST: S2PSS (Bitfield-Mask: 0x01) */ +#define CCU8_GCST_S3SS_Pos (12UL) /*!< CCU8 GCST: S3SS (Bit 12) */ +#define CCU8_GCST_S3SS_Msk (0x1000UL) /*!< CCU8 GCST: S3SS (Bitfield-Mask: 0x01) */ +#define CCU8_GCST_S3DSS_Pos (13UL) /*!< CCU8 GCST: S3DSS (Bit 13) */ +#define CCU8_GCST_S3DSS_Msk (0x2000UL) /*!< CCU8 GCST: S3DSS (Bitfield-Mask: 0x01) */ +#define CCU8_GCST_S3PSS_Pos (14UL) /*!< CCU8 GCST: S3PSS (Bit 14) */ +#define CCU8_GCST_S3PSS_Msk (0x4000UL) /*!< CCU8 GCST: S3PSS (Bitfield-Mask: 0x01) */ +#define CCU8_GCST_CC80ST1_Pos (16UL) /*!< CCU8 GCST: CC80ST1 (Bit 16) */ +#define CCU8_GCST_CC80ST1_Msk (0x10000UL) /*!< CCU8 GCST: CC80ST1 (Bitfield-Mask: 0x01) */ +#define CCU8_GCST_CC81ST1_Pos (17UL) /*!< CCU8 GCST: CC81ST1 (Bit 17) */ +#define CCU8_GCST_CC81ST1_Msk (0x20000UL) /*!< CCU8 GCST: CC81ST1 (Bitfield-Mask: 0x01) */ +#define CCU8_GCST_CC82ST1_Pos (18UL) /*!< CCU8 GCST: CC82ST1 (Bit 18) */ +#define CCU8_GCST_CC82ST1_Msk (0x40000UL) /*!< CCU8 GCST: CC82ST1 (Bitfield-Mask: 0x01) */ +#define CCU8_GCST_CC83ST1_Pos (19UL) /*!< CCU8 GCST: CC83ST1 (Bit 19) */ +#define CCU8_GCST_CC83ST1_Msk (0x80000UL) /*!< CCU8 GCST: CC83ST1 (Bitfield-Mask: 0x01) */ +#define CCU8_GCST_CC80ST2_Pos (20UL) /*!< CCU8 GCST: CC80ST2 (Bit 20) */ +#define CCU8_GCST_CC80ST2_Msk (0x100000UL) /*!< CCU8 GCST: CC80ST2 (Bitfield-Mask: 0x01) */ +#define CCU8_GCST_CC81ST2_Pos (21UL) /*!< CCU8 GCST: CC81ST2 (Bit 21) */ +#define CCU8_GCST_CC81ST2_Msk (0x200000UL) /*!< CCU8 GCST: CC81ST2 (Bitfield-Mask: 0x01) */ +#define CCU8_GCST_CC82ST2_Pos (22UL) /*!< CCU8 GCST: CC82ST2 (Bit 22) */ +#define CCU8_GCST_CC82ST2_Msk (0x400000UL) /*!< CCU8 GCST: CC82ST2 (Bitfield-Mask: 0x01) */ +#define CCU8_GCST_CC83ST2_Pos (23UL) /*!< CCU8 GCST: CC83ST2 (Bit 23) */ +#define CCU8_GCST_CC83ST2_Msk (0x800000UL) /*!< CCU8 GCST: CC83ST2 (Bitfield-Mask: 0x01) */ + +/* --------------------------------- CCU8_GPCHK --------------------------------- */ +#define CCU8_GPCHK_PASE_Pos (0UL) /*!< CCU8 GPCHK: PASE (Bit 0) */ +#define CCU8_GPCHK_PASE_Msk (0x1UL) /*!< CCU8 GPCHK: PASE (Bitfield-Mask: 0x01) */ +#define CCU8_GPCHK_PACS_Pos (1UL) /*!< CCU8 GPCHK: PACS (Bit 1) */ +#define CCU8_GPCHK_PACS_Msk (0x6UL) /*!< CCU8 GPCHK: PACS (Bitfield-Mask: 0x03) */ +#define CCU8_GPCHK_PISEL_Pos (3UL) /*!< CCU8 GPCHK: PISEL (Bit 3) */ +#define CCU8_GPCHK_PISEL_Msk (0x18UL) /*!< CCU8 GPCHK: PISEL (Bitfield-Mask: 0x03) */ +#define CCU8_GPCHK_PCDS_Pos (5UL) /*!< CCU8 GPCHK: PCDS (Bit 5) */ +#define CCU8_GPCHK_PCDS_Msk (0x60UL) /*!< CCU8 GPCHK: PCDS (Bitfield-Mask: 0x03) */ +#define CCU8_GPCHK_PCTS_Pos (7UL) /*!< CCU8 GPCHK: PCTS (Bit 7) */ +#define CCU8_GPCHK_PCTS_Msk (0x80UL) /*!< CCU8 GPCHK: PCTS (Bitfield-Mask: 0x01) */ +#define CCU8_GPCHK_PCST_Pos (15UL) /*!< CCU8 GPCHK: PCST (Bit 15) */ +#define CCU8_GPCHK_PCST_Msk (0x8000UL) /*!< CCU8 GPCHK: PCST (Bitfield-Mask: 0x01) */ +#define CCU8_GPCHK_PCSEL0_Pos (16UL) /*!< CCU8 GPCHK: PCSEL0 (Bit 16) */ +#define CCU8_GPCHK_PCSEL0_Msk (0xf0000UL) /*!< CCU8 GPCHK: PCSEL0 (Bitfield-Mask: 0x0f) */ +#define CCU8_GPCHK_PCSEL1_Pos (20UL) /*!< CCU8 GPCHK: PCSEL1 (Bit 20) */ +#define CCU8_GPCHK_PCSEL1_Msk (0xf00000UL) /*!< CCU8 GPCHK: PCSEL1 (Bitfield-Mask: 0x0f) */ +#define CCU8_GPCHK_PCSEL2_Pos (24UL) /*!< CCU8 GPCHK: PCSEL2 (Bit 24) */ +#define CCU8_GPCHK_PCSEL2_Msk (0xf000000UL) /*!< CCU8 GPCHK: PCSEL2 (Bitfield-Mask: 0x0f) */ +#define CCU8_GPCHK_PCSEL3_Pos (28UL) /*!< CCU8 GPCHK: PCSEL3 (Bit 28) */ +#define CCU8_GPCHK_PCSEL3_Msk (0xf0000000UL) /*!< CCU8 GPCHK: PCSEL3 (Bitfield-Mask: 0x0f) */ + +/* ---------------------------------- CCU8_ECRD --------------------------------- */ +#define CCU8_ECRD_CAPV_Pos (0UL) /*!< CCU8 ECRD: CAPV (Bit 0) */ +#define CCU8_ECRD_CAPV_Msk (0xffffUL) /*!< CCU8 ECRD: CAPV (Bitfield-Mask: 0xffff) */ +#define CCU8_ECRD_FPCV_Pos (16UL) /*!< CCU8 ECRD: FPCV (Bit 16) */ +#define CCU8_ECRD_FPCV_Msk (0xf0000UL) /*!< CCU8 ECRD: FPCV (Bitfield-Mask: 0x0f) */ +#define CCU8_ECRD_SPTR_Pos (20UL) /*!< CCU8 ECRD: SPTR (Bit 20) */ +#define CCU8_ECRD_SPTR_Msk (0x300000UL) /*!< CCU8 ECRD: SPTR (Bitfield-Mask: 0x03) */ +#define CCU8_ECRD_VPTR_Pos (22UL) /*!< CCU8 ECRD: VPTR (Bit 22) */ +#define CCU8_ECRD_VPTR_Msk (0xc00000UL) /*!< CCU8 ECRD: VPTR (Bitfield-Mask: 0x03) */ +#define CCU8_ECRD_FFL_Pos (24UL) /*!< CCU8 ECRD: FFL (Bit 24) */ +#define CCU8_ECRD_FFL_Msk (0x1000000UL) /*!< CCU8 ECRD: FFL (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- CCU8_MIDR --------------------------------- */ +#define CCU8_MIDR_MODR_Pos (0UL) /*!< CCU8 MIDR: MODR (Bit 0) */ +#define CCU8_MIDR_MODR_Msk (0xffUL) /*!< CCU8 MIDR: MODR (Bitfield-Mask: 0xff) */ +#define CCU8_MIDR_MODT_Pos (8UL) /*!< CCU8 MIDR: MODT (Bit 8) */ +#define CCU8_MIDR_MODT_Msk (0xff00UL) /*!< CCU8 MIDR: MODT (Bitfield-Mask: 0xff) */ +#define CCU8_MIDR_MODN_Pos (16UL) /*!< CCU8 MIDR: MODN (Bit 16) */ +#define CCU8_MIDR_MODN_Msk (0xffff0000UL) /*!< CCU8 MIDR: MODN (Bitfield-Mask: 0xffff) */ + + +/* ================================================================================ */ +/* ================ Group 'CCU8_CC8' Position & Mask ================ */ +/* ================================================================================ */ + + +/* -------------------------------- CCU8_CC8_INS -------------------------------- */ +#define CCU8_CC8_INS_EV0IS_Pos (0UL) /*!< CCU8_CC8 INS: EV0IS (Bit 0) */ +#define CCU8_CC8_INS_EV0IS_Msk (0xfUL) /*!< CCU8_CC8 INS: EV0IS (Bitfield-Mask: 0x0f) */ +#define CCU8_CC8_INS_EV1IS_Pos (4UL) /*!< CCU8_CC8 INS: EV1IS (Bit 4) */ +#define CCU8_CC8_INS_EV1IS_Msk (0xf0UL) /*!< CCU8_CC8 INS: EV1IS (Bitfield-Mask: 0x0f) */ +#define CCU8_CC8_INS_EV2IS_Pos (8UL) /*!< CCU8_CC8 INS: EV2IS (Bit 8) */ +#define CCU8_CC8_INS_EV2IS_Msk (0xf00UL) /*!< CCU8_CC8 INS: EV2IS (Bitfield-Mask: 0x0f) */ +#define CCU8_CC8_INS_EV0EM_Pos (16UL) /*!< CCU8_CC8 INS: EV0EM (Bit 16) */ +#define CCU8_CC8_INS_EV0EM_Msk (0x30000UL) /*!< CCU8_CC8 INS: EV0EM (Bitfield-Mask: 0x03) */ +#define CCU8_CC8_INS_EV1EM_Pos (18UL) /*!< CCU8_CC8 INS: EV1EM (Bit 18) */ +#define CCU8_CC8_INS_EV1EM_Msk (0xc0000UL) /*!< CCU8_CC8 INS: EV1EM (Bitfield-Mask: 0x03) */ +#define CCU8_CC8_INS_EV2EM_Pos (20UL) /*!< CCU8_CC8 INS: EV2EM (Bit 20) */ +#define CCU8_CC8_INS_EV2EM_Msk (0x300000UL) /*!< CCU8_CC8 INS: EV2EM (Bitfield-Mask: 0x03) */ +#define CCU8_CC8_INS_EV0LM_Pos (22UL) /*!< CCU8_CC8 INS: EV0LM (Bit 22) */ +#define CCU8_CC8_INS_EV0LM_Msk (0x400000UL) /*!< CCU8_CC8 INS: EV0LM (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_INS_EV1LM_Pos (23UL) /*!< CCU8_CC8 INS: EV1LM (Bit 23) */ +#define CCU8_CC8_INS_EV1LM_Msk (0x800000UL) /*!< CCU8_CC8 INS: EV1LM (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_INS_EV2LM_Pos (24UL) /*!< CCU8_CC8 INS: EV2LM (Bit 24) */ +#define CCU8_CC8_INS_EV2LM_Msk (0x1000000UL) /*!< CCU8_CC8 INS: EV2LM (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_INS_LPF0M_Pos (25UL) /*!< CCU8_CC8 INS: LPF0M (Bit 25) */ +#define CCU8_CC8_INS_LPF0M_Msk (0x6000000UL) /*!< CCU8_CC8 INS: LPF0M (Bitfield-Mask: 0x03) */ +#define CCU8_CC8_INS_LPF1M_Pos (27UL) /*!< CCU8_CC8 INS: LPF1M (Bit 27) */ +#define CCU8_CC8_INS_LPF1M_Msk (0x18000000UL) /*!< CCU8_CC8 INS: LPF1M (Bitfield-Mask: 0x03) */ +#define CCU8_CC8_INS_LPF2M_Pos (29UL) /*!< CCU8_CC8 INS: LPF2M (Bit 29) */ +#define CCU8_CC8_INS_LPF2M_Msk (0x60000000UL) /*!< CCU8_CC8 INS: LPF2M (Bitfield-Mask: 0x03) */ + +/* -------------------------------- CCU8_CC8_CMC -------------------------------- */ +#define CCU8_CC8_CMC_STRTS_Pos (0UL) /*!< CCU8_CC8 CMC: STRTS (Bit 0) */ +#define CCU8_CC8_CMC_STRTS_Msk (0x3UL) /*!< CCU8_CC8 CMC: STRTS (Bitfield-Mask: 0x03) */ +#define CCU8_CC8_CMC_ENDS_Pos (2UL) /*!< CCU8_CC8 CMC: ENDS (Bit 2) */ +#define CCU8_CC8_CMC_ENDS_Msk (0xcUL) /*!< CCU8_CC8 CMC: ENDS (Bitfield-Mask: 0x03) */ +#define CCU8_CC8_CMC_CAP0S_Pos (4UL) /*!< CCU8_CC8 CMC: CAP0S (Bit 4) */ +#define CCU8_CC8_CMC_CAP0S_Msk (0x30UL) /*!< CCU8_CC8 CMC: CAP0S (Bitfield-Mask: 0x03) */ +#define CCU8_CC8_CMC_CAP1S_Pos (6UL) /*!< CCU8_CC8 CMC: CAP1S (Bit 6) */ +#define CCU8_CC8_CMC_CAP1S_Msk (0xc0UL) /*!< CCU8_CC8 CMC: CAP1S (Bitfield-Mask: 0x03) */ +#define CCU8_CC8_CMC_GATES_Pos (8UL) /*!< CCU8_CC8 CMC: GATES (Bit 8) */ +#define CCU8_CC8_CMC_GATES_Msk (0x300UL) /*!< CCU8_CC8 CMC: GATES (Bitfield-Mask: 0x03) */ +#define CCU8_CC8_CMC_UDS_Pos (10UL) /*!< CCU8_CC8 CMC: UDS (Bit 10) */ +#define CCU8_CC8_CMC_UDS_Msk (0xc00UL) /*!< CCU8_CC8 CMC: UDS (Bitfield-Mask: 0x03) */ +#define CCU8_CC8_CMC_LDS_Pos (12UL) /*!< CCU8_CC8 CMC: LDS (Bit 12) */ +#define CCU8_CC8_CMC_LDS_Msk (0x3000UL) /*!< CCU8_CC8 CMC: LDS (Bitfield-Mask: 0x03) */ +#define CCU8_CC8_CMC_CNTS_Pos (14UL) /*!< CCU8_CC8 CMC: CNTS (Bit 14) */ +#define CCU8_CC8_CMC_CNTS_Msk (0xc000UL) /*!< CCU8_CC8 CMC: CNTS (Bitfield-Mask: 0x03) */ +#define CCU8_CC8_CMC_OFS_Pos (16UL) /*!< CCU8_CC8 CMC: OFS (Bit 16) */ +#define CCU8_CC8_CMC_OFS_Msk (0x10000UL) /*!< CCU8_CC8 CMC: OFS (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_CMC_TS_Pos (17UL) /*!< CCU8_CC8 CMC: TS (Bit 17) */ +#define CCU8_CC8_CMC_TS_Msk (0x20000UL) /*!< CCU8_CC8 CMC: TS (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_CMC_MOS_Pos (18UL) /*!< CCU8_CC8 CMC: MOS (Bit 18) */ +#define CCU8_CC8_CMC_MOS_Msk (0xc0000UL) /*!< CCU8_CC8 CMC: MOS (Bitfield-Mask: 0x03) */ +#define CCU8_CC8_CMC_TCE_Pos (20UL) /*!< CCU8_CC8 CMC: TCE (Bit 20) */ +#define CCU8_CC8_CMC_TCE_Msk (0x100000UL) /*!< CCU8_CC8 CMC: TCE (Bitfield-Mask: 0x01) */ + +/* -------------------------------- CCU8_CC8_TCST ------------------------------- */ +#define CCU8_CC8_TCST_TRB_Pos (0UL) /*!< CCU8_CC8 TCST: TRB (Bit 0) */ +#define CCU8_CC8_TCST_TRB_Msk (0x1UL) /*!< CCU8_CC8 TCST: TRB (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_TCST_CDIR_Pos (1UL) /*!< CCU8_CC8 TCST: CDIR (Bit 1) */ +#define CCU8_CC8_TCST_CDIR_Msk (0x2UL) /*!< CCU8_CC8 TCST: CDIR (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_TCST_DTR1_Pos (3UL) /*!< CCU8_CC8 TCST: DTR1 (Bit 3) */ +#define CCU8_CC8_TCST_DTR1_Msk (0x8UL) /*!< CCU8_CC8 TCST: DTR1 (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_TCST_DTR2_Pos (4UL) /*!< CCU8_CC8 TCST: DTR2 (Bit 4) */ +#define CCU8_CC8_TCST_DTR2_Msk (0x10UL) /*!< CCU8_CC8 TCST: DTR2 (Bitfield-Mask: 0x01) */ + +/* ------------------------------- CCU8_CC8_TCSET ------------------------------- */ +#define CCU8_CC8_TCSET_TRBS_Pos (0UL) /*!< CCU8_CC8 TCSET: TRBS (Bit 0) */ +#define CCU8_CC8_TCSET_TRBS_Msk (0x1UL) /*!< CCU8_CC8 TCSET: TRBS (Bitfield-Mask: 0x01) */ + +/* ------------------------------- CCU8_CC8_TCCLR ------------------------------- */ +#define CCU8_CC8_TCCLR_TRBC_Pos (0UL) /*!< CCU8_CC8 TCCLR: TRBC (Bit 0) */ +#define CCU8_CC8_TCCLR_TRBC_Msk (0x1UL) /*!< CCU8_CC8 TCCLR: TRBC (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_TCCLR_TCC_Pos (1UL) /*!< CCU8_CC8 TCCLR: TCC (Bit 1) */ +#define CCU8_CC8_TCCLR_TCC_Msk (0x2UL) /*!< CCU8_CC8 TCCLR: TCC (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_TCCLR_DITC_Pos (2UL) /*!< CCU8_CC8 TCCLR: DITC (Bit 2) */ +#define CCU8_CC8_TCCLR_DITC_Msk (0x4UL) /*!< CCU8_CC8 TCCLR: DITC (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_TCCLR_DTC1C_Pos (3UL) /*!< CCU8_CC8 TCCLR: DTC1C (Bit 3) */ +#define CCU8_CC8_TCCLR_DTC1C_Msk (0x8UL) /*!< CCU8_CC8 TCCLR: DTC1C (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_TCCLR_DTC2C_Pos (4UL) /*!< CCU8_CC8 TCCLR: DTC2C (Bit 4) */ +#define CCU8_CC8_TCCLR_DTC2C_Msk (0x10UL) /*!< CCU8_CC8 TCCLR: DTC2C (Bitfield-Mask: 0x01) */ + +/* --------------------------------- CCU8_CC8_TC -------------------------------- */ +#define CCU8_CC8_TC_TCM_Pos (0UL) /*!< CCU8_CC8 TC: TCM (Bit 0) */ +#define CCU8_CC8_TC_TCM_Msk (0x1UL) /*!< CCU8_CC8 TC: TCM (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_TC_TSSM_Pos (1UL) /*!< CCU8_CC8 TC: TSSM (Bit 1) */ +#define CCU8_CC8_TC_TSSM_Msk (0x2UL) /*!< CCU8_CC8 TC: TSSM (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_TC_CLST_Pos (2UL) /*!< CCU8_CC8 TC: CLST (Bit 2) */ +#define CCU8_CC8_TC_CLST_Msk (0x4UL) /*!< CCU8_CC8 TC: CLST (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_TC_CMOD_Pos (3UL) /*!< CCU8_CC8 TC: CMOD (Bit 3) */ +#define CCU8_CC8_TC_CMOD_Msk (0x8UL) /*!< CCU8_CC8 TC: CMOD (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_TC_ECM_Pos (4UL) /*!< CCU8_CC8 TC: ECM (Bit 4) */ +#define CCU8_CC8_TC_ECM_Msk (0x10UL) /*!< CCU8_CC8 TC: ECM (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_TC_CAPC_Pos (5UL) /*!< CCU8_CC8 TC: CAPC (Bit 5) */ +#define CCU8_CC8_TC_CAPC_Msk (0x60UL) /*!< CCU8_CC8 TC: CAPC (Bitfield-Mask: 0x03) */ +#define CCU8_CC8_TC_TLS_Pos (7UL) /*!< CCU8_CC8 TC: TLS (Bit 7) */ +#define CCU8_CC8_TC_TLS_Msk (0x80UL) /*!< CCU8_CC8 TC: TLS (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_TC_ENDM_Pos (8UL) /*!< CCU8_CC8 TC: ENDM (Bit 8) */ +#define CCU8_CC8_TC_ENDM_Msk (0x300UL) /*!< CCU8_CC8 TC: ENDM (Bitfield-Mask: 0x03) */ +#define CCU8_CC8_TC_STRM_Pos (10UL) /*!< CCU8_CC8 TC: STRM (Bit 10) */ +#define CCU8_CC8_TC_STRM_Msk (0x400UL) /*!< CCU8_CC8 TC: STRM (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_TC_SCE_Pos (11UL) /*!< CCU8_CC8 TC: SCE (Bit 11) */ +#define CCU8_CC8_TC_SCE_Msk (0x800UL) /*!< CCU8_CC8 TC: SCE (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_TC_CCS_Pos (12UL) /*!< CCU8_CC8 TC: CCS (Bit 12) */ +#define CCU8_CC8_TC_CCS_Msk (0x1000UL) /*!< CCU8_CC8 TC: CCS (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_TC_DITHE_Pos (13UL) /*!< CCU8_CC8 TC: DITHE (Bit 13) */ +#define CCU8_CC8_TC_DITHE_Msk (0x6000UL) /*!< CCU8_CC8 TC: DITHE (Bitfield-Mask: 0x03) */ +#define CCU8_CC8_TC_DIM_Pos (15UL) /*!< CCU8_CC8 TC: DIM (Bit 15) */ +#define CCU8_CC8_TC_DIM_Msk (0x8000UL) /*!< CCU8_CC8 TC: DIM (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_TC_FPE_Pos (16UL) /*!< CCU8_CC8 TC: FPE (Bit 16) */ +#define CCU8_CC8_TC_FPE_Msk (0x10000UL) /*!< CCU8_CC8 TC: FPE (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_TC_TRAPE0_Pos (17UL) /*!< CCU8_CC8 TC: TRAPE0 (Bit 17) */ +#define CCU8_CC8_TC_TRAPE0_Msk (0x20000UL) /*!< CCU8_CC8 TC: TRAPE0 (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_TC_TRAPE1_Pos (18UL) /*!< CCU8_CC8 TC: TRAPE1 (Bit 18) */ +#define CCU8_CC8_TC_TRAPE1_Msk (0x40000UL) /*!< CCU8_CC8 TC: TRAPE1 (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_TC_TRAPE2_Pos (19UL) /*!< CCU8_CC8 TC: TRAPE2 (Bit 19) */ +#define CCU8_CC8_TC_TRAPE2_Msk (0x80000UL) /*!< CCU8_CC8 TC: TRAPE2 (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_TC_TRAPE3_Pos (20UL) /*!< CCU8_CC8 TC: TRAPE3 (Bit 20) */ +#define CCU8_CC8_TC_TRAPE3_Msk (0x100000UL) /*!< CCU8_CC8 TC: TRAPE3 (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_TC_TRPSE_Pos (21UL) /*!< CCU8_CC8 TC: TRPSE (Bit 21) */ +#define CCU8_CC8_TC_TRPSE_Msk (0x200000UL) /*!< CCU8_CC8 TC: TRPSE (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_TC_TRPSW_Pos (22UL) /*!< CCU8_CC8 TC: TRPSW (Bit 22) */ +#define CCU8_CC8_TC_TRPSW_Msk (0x400000UL) /*!< CCU8_CC8 TC: TRPSW (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_TC_EMS_Pos (23UL) /*!< CCU8_CC8 TC: EMS (Bit 23) */ +#define CCU8_CC8_TC_EMS_Msk (0x800000UL) /*!< CCU8_CC8 TC: EMS (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_TC_EMT_Pos (24UL) /*!< CCU8_CC8 TC: EMT (Bit 24) */ +#define CCU8_CC8_TC_EMT_Msk (0x1000000UL) /*!< CCU8_CC8 TC: EMT (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_TC_MCME1_Pos (25UL) /*!< CCU8_CC8 TC: MCME1 (Bit 25) */ +#define CCU8_CC8_TC_MCME1_Msk (0x2000000UL) /*!< CCU8_CC8 TC: MCME1 (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_TC_MCME2_Pos (26UL) /*!< CCU8_CC8 TC: MCME2 (Bit 26) */ +#define CCU8_CC8_TC_MCME2_Msk (0x4000000UL) /*!< CCU8_CC8 TC: MCME2 (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_TC_EME_Pos (27UL) /*!< CCU8_CC8 TC: EME (Bit 27) */ +#define CCU8_CC8_TC_EME_Msk (0x18000000UL) /*!< CCU8_CC8 TC: EME (Bitfield-Mask: 0x03) */ +#define CCU8_CC8_TC_STOS_Pos (29UL) /*!< CCU8_CC8 TC: STOS (Bit 29) */ +#define CCU8_CC8_TC_STOS_Msk (0x60000000UL) /*!< CCU8_CC8 TC: STOS (Bitfield-Mask: 0x03) */ + +/* -------------------------------- CCU8_CC8_PSL -------------------------------- */ +#define CCU8_CC8_PSL_PSL11_Pos (0UL) /*!< CCU8_CC8 PSL: PSL11 (Bit 0) */ +#define CCU8_CC8_PSL_PSL11_Msk (0x1UL) /*!< CCU8_CC8 PSL: PSL11 (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_PSL_PSL12_Pos (1UL) /*!< CCU8_CC8 PSL: PSL12 (Bit 1) */ +#define CCU8_CC8_PSL_PSL12_Msk (0x2UL) /*!< CCU8_CC8 PSL: PSL12 (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_PSL_PSL21_Pos (2UL) /*!< CCU8_CC8 PSL: PSL21 (Bit 2) */ +#define CCU8_CC8_PSL_PSL21_Msk (0x4UL) /*!< CCU8_CC8 PSL: PSL21 (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_PSL_PSL22_Pos (3UL) /*!< CCU8_CC8 PSL: PSL22 (Bit 3) */ +#define CCU8_CC8_PSL_PSL22_Msk (0x8UL) /*!< CCU8_CC8 PSL: PSL22 (Bitfield-Mask: 0x01) */ + +/* -------------------------------- CCU8_CC8_DIT -------------------------------- */ +#define CCU8_CC8_DIT_DCV_Pos (0UL) /*!< CCU8_CC8 DIT: DCV (Bit 0) */ +#define CCU8_CC8_DIT_DCV_Msk (0xfUL) /*!< CCU8_CC8 DIT: DCV (Bitfield-Mask: 0x0f) */ +#define CCU8_CC8_DIT_DCNT_Pos (8UL) /*!< CCU8_CC8 DIT: DCNT (Bit 8) */ +#define CCU8_CC8_DIT_DCNT_Msk (0xf00UL) /*!< CCU8_CC8 DIT: DCNT (Bitfield-Mask: 0x0f) */ + +/* -------------------------------- CCU8_CC8_DITS ------------------------------- */ +#define CCU8_CC8_DITS_DCVS_Pos (0UL) /*!< CCU8_CC8 DITS: DCVS (Bit 0) */ +#define CCU8_CC8_DITS_DCVS_Msk (0xfUL) /*!< CCU8_CC8 DITS: DCVS (Bitfield-Mask: 0x0f) */ + +/* -------------------------------- CCU8_CC8_PSC -------------------------------- */ +#define CCU8_CC8_PSC_PSIV_Pos (0UL) /*!< CCU8_CC8 PSC: PSIV (Bit 0) */ +#define CCU8_CC8_PSC_PSIV_Msk (0xfUL) /*!< CCU8_CC8 PSC: PSIV (Bitfield-Mask: 0x0f) */ + +/* -------------------------------- CCU8_CC8_FPC -------------------------------- */ +#define CCU8_CC8_FPC_PCMP_Pos (0UL) /*!< CCU8_CC8 FPC: PCMP (Bit 0) */ +#define CCU8_CC8_FPC_PCMP_Msk (0xfUL) /*!< CCU8_CC8 FPC: PCMP (Bitfield-Mask: 0x0f) */ +#define CCU8_CC8_FPC_PVAL_Pos (8UL) /*!< CCU8_CC8 FPC: PVAL (Bit 8) */ +#define CCU8_CC8_FPC_PVAL_Msk (0xf00UL) /*!< CCU8_CC8 FPC: PVAL (Bitfield-Mask: 0x0f) */ + +/* -------------------------------- CCU8_CC8_FPCS ------------------------------- */ +#define CCU8_CC8_FPCS_PCMP_Pos (0UL) /*!< CCU8_CC8 FPCS: PCMP (Bit 0) */ +#define CCU8_CC8_FPCS_PCMP_Msk (0xfUL) /*!< CCU8_CC8 FPCS: PCMP (Bitfield-Mask: 0x0f) */ + +/* --------------------------------- CCU8_CC8_PR -------------------------------- */ +#define CCU8_CC8_PR_PR_Pos (0UL) /*!< CCU8_CC8 PR: PR (Bit 0) */ +#define CCU8_CC8_PR_PR_Msk (0xffffUL) /*!< CCU8_CC8 PR: PR (Bitfield-Mask: 0xffff) */ + +/* -------------------------------- CCU8_CC8_PRS -------------------------------- */ +#define CCU8_CC8_PRS_PRS_Pos (0UL) /*!< CCU8_CC8 PRS: PRS (Bit 0) */ +#define CCU8_CC8_PRS_PRS_Msk (0xffffUL) /*!< CCU8_CC8 PRS: PRS (Bitfield-Mask: 0xffff) */ + +/* -------------------------------- CCU8_CC8_CR1 -------------------------------- */ +#define CCU8_CC8_CR1_CR1_Pos (0UL) /*!< CCU8_CC8 CR1: CR1 (Bit 0) */ +#define CCU8_CC8_CR1_CR1_Msk (0xffffUL) /*!< CCU8_CC8 CR1: CR1 (Bitfield-Mask: 0xffff) */ + +/* -------------------------------- CCU8_CC8_CR1S ------------------------------- */ +#define CCU8_CC8_CR1S_CR1S_Pos (0UL) /*!< CCU8_CC8 CR1S: CR1S (Bit 0) */ +#define CCU8_CC8_CR1S_CR1S_Msk (0xffffUL) /*!< CCU8_CC8 CR1S: CR1S (Bitfield-Mask: 0xffff) */ + +/* -------------------------------- CCU8_CC8_CR2 -------------------------------- */ +#define CCU8_CC8_CR2_CR2_Pos (0UL) /*!< CCU8_CC8 CR2: CR2 (Bit 0) */ +#define CCU8_CC8_CR2_CR2_Msk (0xffffUL) /*!< CCU8_CC8 CR2: CR2 (Bitfield-Mask: 0xffff) */ + +/* -------------------------------- CCU8_CC8_CR2S ------------------------------- */ +#define CCU8_CC8_CR2S_CR2S_Pos (0UL) /*!< CCU8_CC8 CR2S: CR2S (Bit 0) */ +#define CCU8_CC8_CR2S_CR2S_Msk (0xffffUL) /*!< CCU8_CC8 CR2S: CR2S (Bitfield-Mask: 0xffff) */ + +/* -------------------------------- CCU8_CC8_CHC -------------------------------- */ +#define CCU8_CC8_CHC_ASE_Pos (0UL) /*!< CCU8_CC8 CHC: ASE (Bit 0) */ +#define CCU8_CC8_CHC_ASE_Msk (0x1UL) /*!< CCU8_CC8 CHC: ASE (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_CHC_OCS1_Pos (1UL) /*!< CCU8_CC8 CHC: OCS1 (Bit 1) */ +#define CCU8_CC8_CHC_OCS1_Msk (0x2UL) /*!< CCU8_CC8 CHC: OCS1 (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_CHC_OCS2_Pos (2UL) /*!< CCU8_CC8 CHC: OCS2 (Bit 2) */ +#define CCU8_CC8_CHC_OCS2_Msk (0x4UL) /*!< CCU8_CC8 CHC: OCS2 (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_CHC_OCS3_Pos (3UL) /*!< CCU8_CC8 CHC: OCS3 (Bit 3) */ +#define CCU8_CC8_CHC_OCS3_Msk (0x8UL) /*!< CCU8_CC8 CHC: OCS3 (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_CHC_OCS4_Pos (4UL) /*!< CCU8_CC8 CHC: OCS4 (Bit 4) */ +#define CCU8_CC8_CHC_OCS4_Msk (0x10UL) /*!< CCU8_CC8 CHC: OCS4 (Bitfield-Mask: 0x01) */ + +/* -------------------------------- CCU8_CC8_DTC -------------------------------- */ +#define CCU8_CC8_DTC_DTE1_Pos (0UL) /*!< CCU8_CC8 DTC: DTE1 (Bit 0) */ +#define CCU8_CC8_DTC_DTE1_Msk (0x1UL) /*!< CCU8_CC8 DTC: DTE1 (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_DTC_DTE2_Pos (1UL) /*!< CCU8_CC8 DTC: DTE2 (Bit 1) */ +#define CCU8_CC8_DTC_DTE2_Msk (0x2UL) /*!< CCU8_CC8 DTC: DTE2 (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_DTC_DCEN1_Pos (2UL) /*!< CCU8_CC8 DTC: DCEN1 (Bit 2) */ +#define CCU8_CC8_DTC_DCEN1_Msk (0x4UL) /*!< CCU8_CC8 DTC: DCEN1 (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_DTC_DCEN2_Pos (3UL) /*!< CCU8_CC8 DTC: DCEN2 (Bit 3) */ +#define CCU8_CC8_DTC_DCEN2_Msk (0x8UL) /*!< CCU8_CC8 DTC: DCEN2 (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_DTC_DCEN3_Pos (4UL) /*!< CCU8_CC8 DTC: DCEN3 (Bit 4) */ +#define CCU8_CC8_DTC_DCEN3_Msk (0x10UL) /*!< CCU8_CC8 DTC: DCEN3 (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_DTC_DCEN4_Pos (5UL) /*!< CCU8_CC8 DTC: DCEN4 (Bit 5) */ +#define CCU8_CC8_DTC_DCEN4_Msk (0x20UL) /*!< CCU8_CC8 DTC: DCEN4 (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_DTC_DTCC_Pos (6UL) /*!< CCU8_CC8 DTC: DTCC (Bit 6) */ +#define CCU8_CC8_DTC_DTCC_Msk (0xc0UL) /*!< CCU8_CC8 DTC: DTCC (Bitfield-Mask: 0x03) */ + +/* -------------------------------- CCU8_CC8_DC1R ------------------------------- */ +#define CCU8_CC8_DC1R_DT1R_Pos (0UL) /*!< CCU8_CC8 DC1R: DT1R (Bit 0) */ +#define CCU8_CC8_DC1R_DT1R_Msk (0xffUL) /*!< CCU8_CC8 DC1R: DT1R (Bitfield-Mask: 0xff) */ +#define CCU8_CC8_DC1R_DT1F_Pos (8UL) /*!< CCU8_CC8 DC1R: DT1F (Bit 8) */ +#define CCU8_CC8_DC1R_DT1F_Msk (0xff00UL) /*!< CCU8_CC8 DC1R: DT1F (Bitfield-Mask: 0xff) */ + +/* -------------------------------- CCU8_CC8_DC2R ------------------------------- */ +#define CCU8_CC8_DC2R_DT2R_Pos (0UL) /*!< CCU8_CC8 DC2R: DT2R (Bit 0) */ +#define CCU8_CC8_DC2R_DT2R_Msk (0xffUL) /*!< CCU8_CC8 DC2R: DT2R (Bitfield-Mask: 0xff) */ +#define CCU8_CC8_DC2R_DT2F_Pos (8UL) /*!< CCU8_CC8 DC2R: DT2F (Bit 8) */ +#define CCU8_CC8_DC2R_DT2F_Msk (0xff00UL) /*!< CCU8_CC8 DC2R: DT2F (Bitfield-Mask: 0xff) */ + +/* ------------------------------- CCU8_CC8_TIMER ------------------------------- */ +#define CCU8_CC8_TIMER_TVAL_Pos (0UL) /*!< CCU8_CC8 TIMER: TVAL (Bit 0) */ +#define CCU8_CC8_TIMER_TVAL_Msk (0xffffUL) /*!< CCU8_CC8 TIMER: TVAL (Bitfield-Mask: 0xffff) */ + +/* --------------------------------- CCU8_CC8_CV -------------------------------- */ +#define CCU8_CC8_CV_CAPTV_Pos (0UL) /*!< CCU8_CC8 CV: CAPTV (Bit 0) */ +#define CCU8_CC8_CV_CAPTV_Msk (0xffffUL) /*!< CCU8_CC8 CV: CAPTV (Bitfield-Mask: 0xffff) */ +#define CCU8_CC8_CV_FPCV_Pos (16UL) /*!< CCU8_CC8 CV: FPCV (Bit 16) */ +#define CCU8_CC8_CV_FPCV_Msk (0xf0000UL) /*!< CCU8_CC8 CV: FPCV (Bitfield-Mask: 0x0f) */ +#define CCU8_CC8_CV_FFL_Pos (20UL) /*!< CCU8_CC8 CV: FFL (Bit 20) */ +#define CCU8_CC8_CV_FFL_Msk (0x100000UL) /*!< CCU8_CC8 CV: FFL (Bitfield-Mask: 0x01) */ + +/* -------------------------------- CCU8_CC8_INTS ------------------------------- */ +#define CCU8_CC8_INTS_PMUS_Pos (0UL) /*!< CCU8_CC8 INTS: PMUS (Bit 0) */ +#define CCU8_CC8_INTS_PMUS_Msk (0x1UL) /*!< CCU8_CC8 INTS: PMUS (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_INTS_OMDS_Pos (1UL) /*!< CCU8_CC8 INTS: OMDS (Bit 1) */ +#define CCU8_CC8_INTS_OMDS_Msk (0x2UL) /*!< CCU8_CC8 INTS: OMDS (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_INTS_CMU1S_Pos (2UL) /*!< CCU8_CC8 INTS: CMU1S (Bit 2) */ +#define CCU8_CC8_INTS_CMU1S_Msk (0x4UL) /*!< CCU8_CC8 INTS: CMU1S (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_INTS_CMD1S_Pos (3UL) /*!< CCU8_CC8 INTS: CMD1S (Bit 3) */ +#define CCU8_CC8_INTS_CMD1S_Msk (0x8UL) /*!< CCU8_CC8 INTS: CMD1S (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_INTS_CMU2S_Pos (4UL) /*!< CCU8_CC8 INTS: CMU2S (Bit 4) */ +#define CCU8_CC8_INTS_CMU2S_Msk (0x10UL) /*!< CCU8_CC8 INTS: CMU2S (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_INTS_CMD2S_Pos (5UL) /*!< CCU8_CC8 INTS: CMD2S (Bit 5) */ +#define CCU8_CC8_INTS_CMD2S_Msk (0x20UL) /*!< CCU8_CC8 INTS: CMD2S (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_INTS_E0AS_Pos (8UL) /*!< CCU8_CC8 INTS: E0AS (Bit 8) */ +#define CCU8_CC8_INTS_E0AS_Msk (0x100UL) /*!< CCU8_CC8 INTS: E0AS (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_INTS_E1AS_Pos (9UL) /*!< CCU8_CC8 INTS: E1AS (Bit 9) */ +#define CCU8_CC8_INTS_E1AS_Msk (0x200UL) /*!< CCU8_CC8 INTS: E1AS (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_INTS_E2AS_Pos (10UL) /*!< CCU8_CC8 INTS: E2AS (Bit 10) */ +#define CCU8_CC8_INTS_E2AS_Msk (0x400UL) /*!< CCU8_CC8 INTS: E2AS (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_INTS_TRPF_Pos (11UL) /*!< CCU8_CC8 INTS: TRPF (Bit 11) */ +#define CCU8_CC8_INTS_TRPF_Msk (0x800UL) /*!< CCU8_CC8 INTS: TRPF (Bitfield-Mask: 0x01) */ + +/* -------------------------------- CCU8_CC8_INTE ------------------------------- */ +#define CCU8_CC8_INTE_PME_Pos (0UL) /*!< CCU8_CC8 INTE: PME (Bit 0) */ +#define CCU8_CC8_INTE_PME_Msk (0x1UL) /*!< CCU8_CC8 INTE: PME (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_INTE_OME_Pos (1UL) /*!< CCU8_CC8 INTE: OME (Bit 1) */ +#define CCU8_CC8_INTE_OME_Msk (0x2UL) /*!< CCU8_CC8 INTE: OME (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_INTE_CMU1E_Pos (2UL) /*!< CCU8_CC8 INTE: CMU1E (Bit 2) */ +#define CCU8_CC8_INTE_CMU1E_Msk (0x4UL) /*!< CCU8_CC8 INTE: CMU1E (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_INTE_CMD1E_Pos (3UL) /*!< CCU8_CC8 INTE: CMD1E (Bit 3) */ +#define CCU8_CC8_INTE_CMD1E_Msk (0x8UL) /*!< CCU8_CC8 INTE: CMD1E (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_INTE_CMU2E_Pos (4UL) /*!< CCU8_CC8 INTE: CMU2E (Bit 4) */ +#define CCU8_CC8_INTE_CMU2E_Msk (0x10UL) /*!< CCU8_CC8 INTE: CMU2E (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_INTE_CMD2E_Pos (5UL) /*!< CCU8_CC8 INTE: CMD2E (Bit 5) */ +#define CCU8_CC8_INTE_CMD2E_Msk (0x20UL) /*!< CCU8_CC8 INTE: CMD2E (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_INTE_E0AE_Pos (8UL) /*!< CCU8_CC8 INTE: E0AE (Bit 8) */ +#define CCU8_CC8_INTE_E0AE_Msk (0x100UL) /*!< CCU8_CC8 INTE: E0AE (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_INTE_E1AE_Pos (9UL) /*!< CCU8_CC8 INTE: E1AE (Bit 9) */ +#define CCU8_CC8_INTE_E1AE_Msk (0x200UL) /*!< CCU8_CC8 INTE: E1AE (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_INTE_E2AE_Pos (10UL) /*!< CCU8_CC8 INTE: E2AE (Bit 10) */ +#define CCU8_CC8_INTE_E2AE_Msk (0x400UL) /*!< CCU8_CC8 INTE: E2AE (Bitfield-Mask: 0x01) */ + +/* -------------------------------- CCU8_CC8_SRS -------------------------------- */ +#define CCU8_CC8_SRS_POSR_Pos (0UL) /*!< CCU8_CC8 SRS: POSR (Bit 0) */ +#define CCU8_CC8_SRS_POSR_Msk (0x3UL) /*!< CCU8_CC8 SRS: POSR (Bitfield-Mask: 0x03) */ +#define CCU8_CC8_SRS_CM1SR_Pos (2UL) /*!< CCU8_CC8 SRS: CM1SR (Bit 2) */ +#define CCU8_CC8_SRS_CM1SR_Msk (0xcUL) /*!< CCU8_CC8 SRS: CM1SR (Bitfield-Mask: 0x03) */ +#define CCU8_CC8_SRS_CM2SR_Pos (4UL) /*!< CCU8_CC8 SRS: CM2SR (Bit 4) */ +#define CCU8_CC8_SRS_CM2SR_Msk (0x30UL) /*!< CCU8_CC8 SRS: CM2SR (Bitfield-Mask: 0x03) */ +#define CCU8_CC8_SRS_E0SR_Pos (8UL) /*!< CCU8_CC8 SRS: E0SR (Bit 8) */ +#define CCU8_CC8_SRS_E0SR_Msk (0x300UL) /*!< CCU8_CC8 SRS: E0SR (Bitfield-Mask: 0x03) */ +#define CCU8_CC8_SRS_E1SR_Pos (10UL) /*!< CCU8_CC8 SRS: E1SR (Bit 10) */ +#define CCU8_CC8_SRS_E1SR_Msk (0xc00UL) /*!< CCU8_CC8 SRS: E1SR (Bitfield-Mask: 0x03) */ +#define CCU8_CC8_SRS_E2SR_Pos (12UL) /*!< CCU8_CC8 SRS: E2SR (Bit 12) */ +#define CCU8_CC8_SRS_E2SR_Msk (0x3000UL) /*!< CCU8_CC8 SRS: E2SR (Bitfield-Mask: 0x03) */ + +/* -------------------------------- CCU8_CC8_SWS -------------------------------- */ +#define CCU8_CC8_SWS_SPM_Pos (0UL) /*!< CCU8_CC8 SWS: SPM (Bit 0) */ +#define CCU8_CC8_SWS_SPM_Msk (0x1UL) /*!< CCU8_CC8 SWS: SPM (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_SWS_SOM_Pos (1UL) /*!< CCU8_CC8 SWS: SOM (Bit 1) */ +#define CCU8_CC8_SWS_SOM_Msk (0x2UL) /*!< CCU8_CC8 SWS: SOM (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_SWS_SCM1U_Pos (2UL) /*!< CCU8_CC8 SWS: SCM1U (Bit 2) */ +#define CCU8_CC8_SWS_SCM1U_Msk (0x4UL) /*!< CCU8_CC8 SWS: SCM1U (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_SWS_SCM1D_Pos (3UL) /*!< CCU8_CC8 SWS: SCM1D (Bit 3) */ +#define CCU8_CC8_SWS_SCM1D_Msk (0x8UL) /*!< CCU8_CC8 SWS: SCM1D (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_SWS_SCM2U_Pos (4UL) /*!< CCU8_CC8 SWS: SCM2U (Bit 4) */ +#define CCU8_CC8_SWS_SCM2U_Msk (0x10UL) /*!< CCU8_CC8 SWS: SCM2U (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_SWS_SCM2D_Pos (5UL) /*!< CCU8_CC8 SWS: SCM2D (Bit 5) */ +#define CCU8_CC8_SWS_SCM2D_Msk (0x20UL) /*!< CCU8_CC8 SWS: SCM2D (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_SWS_SE0A_Pos (8UL) /*!< CCU8_CC8 SWS: SE0A (Bit 8) */ +#define CCU8_CC8_SWS_SE0A_Msk (0x100UL) /*!< CCU8_CC8 SWS: SE0A (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_SWS_SE1A_Pos (9UL) /*!< CCU8_CC8 SWS: SE1A (Bit 9) */ +#define CCU8_CC8_SWS_SE1A_Msk (0x200UL) /*!< CCU8_CC8 SWS: SE1A (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_SWS_SE2A_Pos (10UL) /*!< CCU8_CC8 SWS: SE2A (Bit 10) */ +#define CCU8_CC8_SWS_SE2A_Msk (0x400UL) /*!< CCU8_CC8 SWS: SE2A (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_SWS_STRPF_Pos (11UL) /*!< CCU8_CC8 SWS: STRPF (Bit 11) */ +#define CCU8_CC8_SWS_STRPF_Msk (0x800UL) /*!< CCU8_CC8 SWS: STRPF (Bitfield-Mask: 0x01) */ + +/* -------------------------------- CCU8_CC8_SWR -------------------------------- */ +#define CCU8_CC8_SWR_RPM_Pos (0UL) /*!< CCU8_CC8 SWR: RPM (Bit 0) */ +#define CCU8_CC8_SWR_RPM_Msk (0x1UL) /*!< CCU8_CC8 SWR: RPM (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_SWR_ROM_Pos (1UL) /*!< CCU8_CC8 SWR: ROM (Bit 1) */ +#define CCU8_CC8_SWR_ROM_Msk (0x2UL) /*!< CCU8_CC8 SWR: ROM (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_SWR_RCM1U_Pos (2UL) /*!< CCU8_CC8 SWR: RCM1U (Bit 2) */ +#define CCU8_CC8_SWR_RCM1U_Msk (0x4UL) /*!< CCU8_CC8 SWR: RCM1U (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_SWR_RCM1D_Pos (3UL) /*!< CCU8_CC8 SWR: RCM1D (Bit 3) */ +#define CCU8_CC8_SWR_RCM1D_Msk (0x8UL) /*!< CCU8_CC8 SWR: RCM1D (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_SWR_RCM2U_Pos (4UL) /*!< CCU8_CC8 SWR: RCM2U (Bit 4) */ +#define CCU8_CC8_SWR_RCM2U_Msk (0x10UL) /*!< CCU8_CC8 SWR: RCM2U (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_SWR_RCM2D_Pos (5UL) /*!< CCU8_CC8 SWR: RCM2D (Bit 5) */ +#define CCU8_CC8_SWR_RCM2D_Msk (0x20UL) /*!< CCU8_CC8 SWR: RCM2D (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_SWR_RE0A_Pos (8UL) /*!< CCU8_CC8 SWR: RE0A (Bit 8) */ +#define CCU8_CC8_SWR_RE0A_Msk (0x100UL) /*!< CCU8_CC8 SWR: RE0A (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_SWR_RE1A_Pos (9UL) /*!< CCU8_CC8 SWR: RE1A (Bit 9) */ +#define CCU8_CC8_SWR_RE1A_Msk (0x200UL) /*!< CCU8_CC8 SWR: RE1A (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_SWR_RE2A_Pos (10UL) /*!< CCU8_CC8 SWR: RE2A (Bit 10) */ +#define CCU8_CC8_SWR_RE2A_Msk (0x400UL) /*!< CCU8_CC8 SWR: RE2A (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_SWR_RTRPF_Pos (11UL) /*!< CCU8_CC8 SWR: RTRPF (Bit 11) */ +#define CCU8_CC8_SWR_RTRPF_Msk (0x800UL) /*!< CCU8_CC8 SWR: RTRPF (Bitfield-Mask: 0x01) */ + +/* -------------------------------- CCU8_CC8_STC -------------------------------- */ +#define CCU8_CC8_STC_CSE_Pos (0UL) /*!< CCU8_CC8 STC: CSE (Bit 0) */ +#define CCU8_CC8_STC_CSE_Msk (0x1UL) /*!< CCU8_CC8 STC: CSE (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_STC_STM_Pos (1UL) /*!< CCU8_CC8 STC: STM (Bit 1) */ +#define CCU8_CC8_STC_STM_Msk (0x6UL) /*!< CCU8_CC8 STC: STM (Bitfield-Mask: 0x03) */ + + +/* ================================================================================ */ +/* ================ struct 'HRPWM0' Position & Mask ================ */ +/* ================================================================================ */ + + +/* -------------------------------- HRPWM0_HRBSC -------------------------------- */ +#define HRPWM0_HRBSC_SUSCFG_Pos (0UL) /*!< HRPWM0 HRBSC: SUSCFG (Bit 0) */ +#define HRPWM0_HRBSC_SUSCFG_Msk (0x7UL) /*!< HRPWM0 HRBSC: SUSCFG (Bitfield-Mask: 0x07) */ +#define HRPWM0_HRBSC_HRBE_Pos (8UL) /*!< HRPWM0 HRBSC: HRBE (Bit 8) */ +#define HRPWM0_HRBSC_HRBE_Msk (0x100UL) /*!< HRPWM0 HRBSC: HRBE (Bitfield-Mask: 0x01) */ + +/* --------------------------------- HRPWM0_MIDR -------------------------------- */ +#define HRPWM0_MIDR_MODR_Pos (0UL) /*!< HRPWM0 MIDR: MODR (Bit 0) */ +#define HRPWM0_MIDR_MODR_Msk (0xffUL) /*!< HRPWM0 MIDR: MODR (Bitfield-Mask: 0xff) */ +#define HRPWM0_MIDR_MODT_Pos (8UL) /*!< HRPWM0 MIDR: MODT (Bit 8) */ +#define HRPWM0_MIDR_MODT_Msk (0xff00UL) /*!< HRPWM0 MIDR: MODT (Bitfield-Mask: 0xff) */ +#define HRPWM0_MIDR_MODN_Pos (16UL) /*!< HRPWM0 MIDR: MODN (Bit 16) */ +#define HRPWM0_MIDR_MODN_Msk (0xffff0000UL) /*!< HRPWM0 MIDR: MODN (Bitfield-Mask: 0xffff) */ + +/* -------------------------------- HRPWM0_GLBANA ------------------------------- */ +#define HRPWM0_GLBANA_SLDLY_Pos (0UL) /*!< HRPWM0 GLBANA: SLDLY (Bit 0) */ +#define HRPWM0_GLBANA_SLDLY_Msk (0x3UL) /*!< HRPWM0 GLBANA: SLDLY (Bitfield-Mask: 0x03) */ +#define HRPWM0_GLBANA_FUP_Pos (2UL) /*!< HRPWM0 GLBANA: FUP (Bit 2) */ +#define HRPWM0_GLBANA_FUP_Msk (0x4UL) /*!< HRPWM0 GLBANA: FUP (Bitfield-Mask: 0x01) */ +#define HRPWM0_GLBANA_FDN_Pos (3UL) /*!< HRPWM0 GLBANA: FDN (Bit 3) */ +#define HRPWM0_GLBANA_FDN_Msk (0x8UL) /*!< HRPWM0 GLBANA: FDN (Bitfield-Mask: 0x01) */ +#define HRPWM0_GLBANA_SLCP_Pos (6UL) /*!< HRPWM0 GLBANA: SLCP (Bit 6) */ +#define HRPWM0_GLBANA_SLCP_Msk (0x1c0UL) /*!< HRPWM0 GLBANA: SLCP (Bitfield-Mask: 0x07) */ +#define HRPWM0_GLBANA_SLIBLDO_Pos (9UL) /*!< HRPWM0 GLBANA: SLIBLDO (Bit 9) */ +#define HRPWM0_GLBANA_SLIBLDO_Msk (0x600UL) /*!< HRPWM0 GLBANA: SLIBLDO (Bitfield-Mask: 0x03) */ +#define HRPWM0_GLBANA_SLIBLF_Pos (11UL) /*!< HRPWM0 GLBANA: SLIBLF (Bit 11) */ +#define HRPWM0_GLBANA_SLIBLF_Msk (0x1800UL) /*!< HRPWM0 GLBANA: SLIBLF (Bitfield-Mask: 0x03) */ +#define HRPWM0_GLBANA_SLVREF_Pos (13UL) /*!< HRPWM0 GLBANA: SLVREF (Bit 13) */ +#define HRPWM0_GLBANA_SLVREF_Msk (0xe000UL) /*!< HRPWM0 GLBANA: SLVREF (Bitfield-Mask: 0x07) */ +#define HRPWM0_GLBANA_TRIBIAS_Pos (16UL) /*!< HRPWM0 GLBANA: TRIBIAS (Bit 16) */ +#define HRPWM0_GLBANA_TRIBIAS_Msk (0x30000UL) /*!< HRPWM0 GLBANA: TRIBIAS (Bitfield-Mask: 0x03) */ +#define HRPWM0_GLBANA_GHREN_Pos (18UL) /*!< HRPWM0 GLBANA: GHREN (Bit 18) */ +#define HRPWM0_GLBANA_GHREN_Msk (0x40000UL) /*!< HRPWM0 GLBANA: GHREN (Bitfield-Mask: 0x01) */ + +/* -------------------------------- HRPWM0_CSGCFG ------------------------------- */ +#define HRPWM0_CSGCFG_C0PM_Pos (0UL) /*!< HRPWM0 CSGCFG: C0PM (Bit 0) */ +#define HRPWM0_CSGCFG_C0PM_Msk (0x3UL) /*!< HRPWM0 CSGCFG: C0PM (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSGCFG_C1PM_Pos (2UL) /*!< HRPWM0 CSGCFG: C1PM (Bit 2) */ +#define HRPWM0_CSGCFG_C1PM_Msk (0xcUL) /*!< HRPWM0 CSGCFG: C1PM (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSGCFG_C2PM_Pos (4UL) /*!< HRPWM0 CSGCFG: C2PM (Bit 4) */ +#define HRPWM0_CSGCFG_C2PM_Msk (0x30UL) /*!< HRPWM0 CSGCFG: C2PM (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSGCFG_C0CD_Pos (16UL) /*!< HRPWM0 CSGCFG: C0CD (Bit 16) */ +#define HRPWM0_CSGCFG_C0CD_Msk (0x10000UL) /*!< HRPWM0 CSGCFG: C0CD (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSGCFG_C1CD_Pos (17UL) /*!< HRPWM0 CSGCFG: C1CD (Bit 17) */ +#define HRPWM0_CSGCFG_C1CD_Msk (0x20000UL) /*!< HRPWM0 CSGCFG: C1CD (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSGCFG_C2CD_Pos (18UL) /*!< HRPWM0 CSGCFG: C2CD (Bit 18) */ +#define HRPWM0_CSGCFG_C2CD_Msk (0x40000UL) /*!< HRPWM0 CSGCFG: C2CD (Bitfield-Mask: 0x01) */ + +/* ------------------------------- HRPWM0_CSGSETG ------------------------------- */ +#define HRPWM0_CSGSETG_SD0R_Pos (0UL) /*!< HRPWM0 CSGSETG: SD0R (Bit 0) */ +#define HRPWM0_CSGSETG_SD0R_Msk (0x1UL) /*!< HRPWM0 CSGSETG: SD0R (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSGSETG_SC0R_Pos (1UL) /*!< HRPWM0 CSGSETG: SC0R (Bit 1) */ +#define HRPWM0_CSGSETG_SC0R_Msk (0x2UL) /*!< HRPWM0 CSGSETG: SC0R (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSGSETG_SC0P_Pos (2UL) /*!< HRPWM0 CSGSETG: SC0P (Bit 2) */ +#define HRPWM0_CSGSETG_SC0P_Msk (0x4UL) /*!< HRPWM0 CSGSETG: SC0P (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSGSETG_SD1R_Pos (4UL) /*!< HRPWM0 CSGSETG: SD1R (Bit 4) */ +#define HRPWM0_CSGSETG_SD1R_Msk (0x10UL) /*!< HRPWM0 CSGSETG: SD1R (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSGSETG_SC1R_Pos (5UL) /*!< HRPWM0 CSGSETG: SC1R (Bit 5) */ +#define HRPWM0_CSGSETG_SC1R_Msk (0x20UL) /*!< HRPWM0 CSGSETG: SC1R (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSGSETG_SC1P_Pos (6UL) /*!< HRPWM0 CSGSETG: SC1P (Bit 6) */ +#define HRPWM0_CSGSETG_SC1P_Msk (0x40UL) /*!< HRPWM0 CSGSETG: SC1P (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSGSETG_SD2R_Pos (8UL) /*!< HRPWM0 CSGSETG: SD2R (Bit 8) */ +#define HRPWM0_CSGSETG_SD2R_Msk (0x100UL) /*!< HRPWM0 CSGSETG: SD2R (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSGSETG_SC2R_Pos (9UL) /*!< HRPWM0 CSGSETG: SC2R (Bit 9) */ +#define HRPWM0_CSGSETG_SC2R_Msk (0x200UL) /*!< HRPWM0 CSGSETG: SC2R (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSGSETG_SC2P_Pos (10UL) /*!< HRPWM0 CSGSETG: SC2P (Bit 10) */ +#define HRPWM0_CSGSETG_SC2P_Msk (0x400UL) /*!< HRPWM0 CSGSETG: SC2P (Bitfield-Mask: 0x01) */ + +/* ------------------------------- HRPWM0_CSGCLRG ------------------------------- */ +#define HRPWM0_CSGCLRG_CD0R_Pos (0UL) /*!< HRPWM0 CSGCLRG: CD0R (Bit 0) */ +#define HRPWM0_CSGCLRG_CD0R_Msk (0x1UL) /*!< HRPWM0 CSGCLRG: CD0R (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSGCLRG_CC0R_Pos (1UL) /*!< HRPWM0 CSGCLRG: CC0R (Bit 1) */ +#define HRPWM0_CSGCLRG_CC0R_Msk (0x2UL) /*!< HRPWM0 CSGCLRG: CC0R (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSGCLRG_CC0P_Pos (2UL) /*!< HRPWM0 CSGCLRG: CC0P (Bit 2) */ +#define HRPWM0_CSGCLRG_CC0P_Msk (0x4UL) /*!< HRPWM0 CSGCLRG: CC0P (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSGCLRG_CD1R_Pos (4UL) /*!< HRPWM0 CSGCLRG: CD1R (Bit 4) */ +#define HRPWM0_CSGCLRG_CD1R_Msk (0x10UL) /*!< HRPWM0 CSGCLRG: CD1R (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSGCLRG_CC1R_Pos (5UL) /*!< HRPWM0 CSGCLRG: CC1R (Bit 5) */ +#define HRPWM0_CSGCLRG_CC1R_Msk (0x20UL) /*!< HRPWM0 CSGCLRG: CC1R (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSGCLRG_CC1P_Pos (6UL) /*!< HRPWM0 CSGCLRG: CC1P (Bit 6) */ +#define HRPWM0_CSGCLRG_CC1P_Msk (0x40UL) /*!< HRPWM0 CSGCLRG: CC1P (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSGCLRG_CD2R_Pos (8UL) /*!< HRPWM0 CSGCLRG: CD2R (Bit 8) */ +#define HRPWM0_CSGCLRG_CD2R_Msk (0x100UL) /*!< HRPWM0 CSGCLRG: CD2R (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSGCLRG_CC2R_Pos (9UL) /*!< HRPWM0 CSGCLRG: CC2R (Bit 9) */ +#define HRPWM0_CSGCLRG_CC2R_Msk (0x200UL) /*!< HRPWM0 CSGCLRG: CC2R (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSGCLRG_CC2P_Pos (10UL) /*!< HRPWM0 CSGCLRG: CC2P (Bit 10) */ +#define HRPWM0_CSGCLRG_CC2P_Msk (0x400UL) /*!< HRPWM0 CSGCLRG: CC2P (Bitfield-Mask: 0x01) */ + +/* ------------------------------- HRPWM0_CSGSTATG ------------------------------ */ +#define HRPWM0_CSGSTATG_D0RB_Pos (0UL) /*!< HRPWM0 CSGSTATG: D0RB (Bit 0) */ +#define HRPWM0_CSGSTATG_D0RB_Msk (0x1UL) /*!< HRPWM0 CSGSTATG: D0RB (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSGSTATG_C0RB_Pos (1UL) /*!< HRPWM0 CSGSTATG: C0RB (Bit 1) */ +#define HRPWM0_CSGSTATG_C0RB_Msk (0x2UL) /*!< HRPWM0 CSGSTATG: C0RB (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSGSTATG_PSLS0_Pos (2UL) /*!< HRPWM0 CSGSTATG: PSLS0 (Bit 2) */ +#define HRPWM0_CSGSTATG_PSLS0_Msk (0x4UL) /*!< HRPWM0 CSGSTATG: PSLS0 (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSGSTATG_D1RB_Pos (4UL) /*!< HRPWM0 CSGSTATG: D1RB (Bit 4) */ +#define HRPWM0_CSGSTATG_D1RB_Msk (0x10UL) /*!< HRPWM0 CSGSTATG: D1RB (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSGSTATG_C1RB_Pos (5UL) /*!< HRPWM0 CSGSTATG: C1RB (Bit 5) */ +#define HRPWM0_CSGSTATG_C1RB_Msk (0x20UL) /*!< HRPWM0 CSGSTATG: C1RB (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSGSTATG_PSLS1_Pos (6UL) /*!< HRPWM0 CSGSTATG: PSLS1 (Bit 6) */ +#define HRPWM0_CSGSTATG_PSLS1_Msk (0x40UL) /*!< HRPWM0 CSGSTATG: PSLS1 (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSGSTATG_D2RB_Pos (8UL) /*!< HRPWM0 CSGSTATG: D2RB (Bit 8) */ +#define HRPWM0_CSGSTATG_D2RB_Msk (0x100UL) /*!< HRPWM0 CSGSTATG: D2RB (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSGSTATG_C2RB_Pos (9UL) /*!< HRPWM0 CSGSTATG: C2RB (Bit 9) */ +#define HRPWM0_CSGSTATG_C2RB_Msk (0x200UL) /*!< HRPWM0 CSGSTATG: C2RB (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSGSTATG_PSLS2_Pos (10UL) /*!< HRPWM0 CSGSTATG: PSLS2 (Bit 10) */ +#define HRPWM0_CSGSTATG_PSLS2_Msk (0x400UL) /*!< HRPWM0 CSGSTATG: PSLS2 (Bitfield-Mask: 0x01) */ + +/* -------------------------------- HRPWM0_CSGFCG ------------------------------- */ +#define HRPWM0_CSGFCG_S0STR_Pos (0UL) /*!< HRPWM0 CSGFCG: S0STR (Bit 0) */ +#define HRPWM0_CSGFCG_S0STR_Msk (0x1UL) /*!< HRPWM0 CSGFCG: S0STR (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSGFCG_S0STP_Pos (1UL) /*!< HRPWM0 CSGFCG: S0STP (Bit 1) */ +#define HRPWM0_CSGFCG_S0STP_Msk (0x2UL) /*!< HRPWM0 CSGFCG: S0STP (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSGFCG_PS0STR_Pos (2UL) /*!< HRPWM0 CSGFCG: PS0STR (Bit 2) */ +#define HRPWM0_CSGFCG_PS0STR_Msk (0x4UL) /*!< HRPWM0 CSGFCG: PS0STR (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSGFCG_PS0STP_Pos (3UL) /*!< HRPWM0 CSGFCG: PS0STP (Bit 3) */ +#define HRPWM0_CSGFCG_PS0STP_Msk (0x8UL) /*!< HRPWM0 CSGFCG: PS0STP (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSGFCG_PS0CLR_Pos (4UL) /*!< HRPWM0 CSGFCG: PS0CLR (Bit 4) */ +#define HRPWM0_CSGFCG_PS0CLR_Msk (0x10UL) /*!< HRPWM0 CSGFCG: PS0CLR (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSGFCG_S1STR_Pos (8UL) /*!< HRPWM0 CSGFCG: S1STR (Bit 8) */ +#define HRPWM0_CSGFCG_S1STR_Msk (0x100UL) /*!< HRPWM0 CSGFCG: S1STR (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSGFCG_S1STP_Pos (9UL) /*!< HRPWM0 CSGFCG: S1STP (Bit 9) */ +#define HRPWM0_CSGFCG_S1STP_Msk (0x200UL) /*!< HRPWM0 CSGFCG: S1STP (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSGFCG_PS1STR_Pos (10UL) /*!< HRPWM0 CSGFCG: PS1STR (Bit 10) */ +#define HRPWM0_CSGFCG_PS1STR_Msk (0x400UL) /*!< HRPWM0 CSGFCG: PS1STR (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSGFCG_PS1STP_Pos (11UL) /*!< HRPWM0 CSGFCG: PS1STP (Bit 11) */ +#define HRPWM0_CSGFCG_PS1STP_Msk (0x800UL) /*!< HRPWM0 CSGFCG: PS1STP (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSGFCG_PS1CLR_Pos (12UL) /*!< HRPWM0 CSGFCG: PS1CLR (Bit 12) */ +#define HRPWM0_CSGFCG_PS1CLR_Msk (0x1000UL) /*!< HRPWM0 CSGFCG: PS1CLR (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSGFCG_S2STR_Pos (16UL) /*!< HRPWM0 CSGFCG: S2STR (Bit 16) */ +#define HRPWM0_CSGFCG_S2STR_Msk (0x10000UL) /*!< HRPWM0 CSGFCG: S2STR (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSGFCG_S2STP_Pos (17UL) /*!< HRPWM0 CSGFCG: S2STP (Bit 17) */ +#define HRPWM0_CSGFCG_S2STP_Msk (0x20000UL) /*!< HRPWM0 CSGFCG: S2STP (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSGFCG_PS2STR_Pos (18UL) /*!< HRPWM0 CSGFCG: PS2STR (Bit 18) */ +#define HRPWM0_CSGFCG_PS2STR_Msk (0x40000UL) /*!< HRPWM0 CSGFCG: PS2STR (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSGFCG_PS2STP_Pos (19UL) /*!< HRPWM0 CSGFCG: PS2STP (Bit 19) */ +#define HRPWM0_CSGFCG_PS2STP_Msk (0x80000UL) /*!< HRPWM0 CSGFCG: PS2STP (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSGFCG_PS2CLR_Pos (20UL) /*!< HRPWM0 CSGFCG: PS2CLR (Bit 20) */ +#define HRPWM0_CSGFCG_PS2CLR_Msk (0x100000UL) /*!< HRPWM0 CSGFCG: PS2CLR (Bitfield-Mask: 0x01) */ + +/* -------------------------------- HRPWM0_CSGFSG ------------------------------- */ +#define HRPWM0_CSGFSG_S0RB_Pos (0UL) /*!< HRPWM0 CSGFSG: S0RB (Bit 0) */ +#define HRPWM0_CSGFSG_S0RB_Msk (0x1UL) /*!< HRPWM0 CSGFSG: S0RB (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSGFSG_P0RB_Pos (1UL) /*!< HRPWM0 CSGFSG: P0RB (Bit 1) */ +#define HRPWM0_CSGFSG_P0RB_Msk (0x2UL) /*!< HRPWM0 CSGFSG: P0RB (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSGFSG_S1RB_Pos (8UL) /*!< HRPWM0 CSGFSG: S1RB (Bit 8) */ +#define HRPWM0_CSGFSG_S1RB_Msk (0x100UL) /*!< HRPWM0 CSGFSG: S1RB (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSGFSG_P1RB_Pos (9UL) /*!< HRPWM0 CSGFSG: P1RB (Bit 9) */ +#define HRPWM0_CSGFSG_P1RB_Msk (0x200UL) /*!< HRPWM0 CSGFSG: P1RB (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSGFSG_S2RB_Pos (16UL) /*!< HRPWM0 CSGFSG: S2RB (Bit 16) */ +#define HRPWM0_CSGFSG_S2RB_Msk (0x10000UL) /*!< HRPWM0 CSGFSG: S2RB (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSGFSG_P2RB_Pos (17UL) /*!< HRPWM0 CSGFSG: P2RB (Bit 17) */ +#define HRPWM0_CSGFSG_P2RB_Msk (0x20000UL) /*!< HRPWM0 CSGFSG: P2RB (Bitfield-Mask: 0x01) */ + +/* -------------------------------- HRPWM0_CSGTRG ------------------------------- */ +#define HRPWM0_CSGTRG_D0SES_Pos (0UL) /*!< HRPWM0 CSGTRG: D0SES (Bit 0) */ +#define HRPWM0_CSGTRG_D0SES_Msk (0x1UL) /*!< HRPWM0 CSGTRG: D0SES (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSGTRG_D0SVS_Pos (1UL) /*!< HRPWM0 CSGTRG: D0SVS (Bit 1) */ +#define HRPWM0_CSGTRG_D0SVS_Msk (0x2UL) /*!< HRPWM0 CSGTRG: D0SVS (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSGTRG_D1SES_Pos (4UL) /*!< HRPWM0 CSGTRG: D1SES (Bit 4) */ +#define HRPWM0_CSGTRG_D1SES_Msk (0x10UL) /*!< HRPWM0 CSGTRG: D1SES (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSGTRG_D1SVS_Pos (5UL) /*!< HRPWM0 CSGTRG: D1SVS (Bit 5) */ +#define HRPWM0_CSGTRG_D1SVS_Msk (0x20UL) /*!< HRPWM0 CSGTRG: D1SVS (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSGTRG_D2SES_Pos (8UL) /*!< HRPWM0 CSGTRG: D2SES (Bit 8) */ +#define HRPWM0_CSGTRG_D2SES_Msk (0x100UL) /*!< HRPWM0 CSGTRG: D2SES (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSGTRG_D2SVS_Pos (9UL) /*!< HRPWM0 CSGTRG: D2SVS (Bit 9) */ +#define HRPWM0_CSGTRG_D2SVS_Msk (0x200UL) /*!< HRPWM0 CSGTRG: D2SVS (Bitfield-Mask: 0x01) */ + +/* -------------------------------- HRPWM0_CSGTRC ------------------------------- */ +#define HRPWM0_CSGTRC_D0SEC_Pos (0UL) /*!< HRPWM0 CSGTRC: D0SEC (Bit 0) */ +#define HRPWM0_CSGTRC_D0SEC_Msk (0x1UL) /*!< HRPWM0 CSGTRC: D0SEC (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSGTRC_D1SEC_Pos (4UL) /*!< HRPWM0 CSGTRC: D1SEC (Bit 4) */ +#define HRPWM0_CSGTRC_D1SEC_Msk (0x10UL) /*!< HRPWM0 CSGTRC: D1SEC (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSGTRC_D2SEC_Pos (8UL) /*!< HRPWM0 CSGTRC: D2SEC (Bit 8) */ +#define HRPWM0_CSGTRC_D2SEC_Msk (0x100UL) /*!< HRPWM0 CSGTRC: D2SEC (Bitfield-Mask: 0x01) */ + +/* ------------------------------- HRPWM0_CSGTRSG ------------------------------- */ +#define HRPWM0_CSGTRSG_D0STE_Pos (0UL) /*!< HRPWM0 CSGTRSG: D0STE (Bit 0) */ +#define HRPWM0_CSGTRSG_D0STE_Msk (0x1UL) /*!< HRPWM0 CSGTRSG: D0STE (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSGTRSG_SW0ST_Pos (1UL) /*!< HRPWM0 CSGTRSG: SW0ST (Bit 1) */ +#define HRPWM0_CSGTRSG_SW0ST_Msk (0x2UL) /*!< HRPWM0 CSGTRSG: SW0ST (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSGTRSG_D1STE_Pos (4UL) /*!< HRPWM0 CSGTRSG: D1STE (Bit 4) */ +#define HRPWM0_CSGTRSG_D1STE_Msk (0x10UL) /*!< HRPWM0 CSGTRSG: D1STE (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSGTRSG_SW1ST_Pos (5UL) /*!< HRPWM0 CSGTRSG: SW1ST (Bit 5) */ +#define HRPWM0_CSGTRSG_SW1ST_Msk (0x20UL) /*!< HRPWM0 CSGTRSG: SW1ST (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSGTRSG_D2STE_Pos (8UL) /*!< HRPWM0 CSGTRSG: D2STE (Bit 8) */ +#define HRPWM0_CSGTRSG_D2STE_Msk (0x100UL) /*!< HRPWM0 CSGTRSG: D2STE (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSGTRSG_SW2ST_Pos (9UL) /*!< HRPWM0 CSGTRSG: SW2ST (Bit 9) */ +#define HRPWM0_CSGTRSG_SW2ST_Msk (0x200UL) /*!< HRPWM0 CSGTRSG: SW2ST (Bitfield-Mask: 0x01) */ + +/* -------------------------------- HRPWM0_HRCCFG ------------------------------- */ +#define HRPWM0_HRCCFG_HRCPM_Pos (0UL) /*!< HRPWM0 HRCCFG: HRCPM (Bit 0) */ +#define HRPWM0_HRCCFG_HRCPM_Msk (0x1UL) /*!< HRPWM0 HRCCFG: HRCPM (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRCCFG_HRC0E_Pos (4UL) /*!< HRPWM0 HRCCFG: HRC0E (Bit 4) */ +#define HRPWM0_HRCCFG_HRC0E_Msk (0x10UL) /*!< HRPWM0 HRCCFG: HRC0E (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRCCFG_HRC1E_Pos (5UL) /*!< HRPWM0 HRCCFG: HRC1E (Bit 5) */ +#define HRPWM0_HRCCFG_HRC1E_Msk (0x20UL) /*!< HRPWM0 HRCCFG: HRC1E (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRCCFG_HRC2E_Pos (6UL) /*!< HRPWM0 HRCCFG: HRC2E (Bit 6) */ +#define HRPWM0_HRCCFG_HRC2E_Msk (0x40UL) /*!< HRPWM0 HRCCFG: HRC2E (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRCCFG_HRC3E_Pos (7UL) /*!< HRPWM0 HRCCFG: HRC3E (Bit 7) */ +#define HRPWM0_HRCCFG_HRC3E_Msk (0x80UL) /*!< HRPWM0 HRCCFG: HRC3E (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRCCFG_CLKC_Pos (16UL) /*!< HRPWM0 HRCCFG: CLKC (Bit 16) */ +#define HRPWM0_HRCCFG_CLKC_Msk (0x70000UL) /*!< HRPWM0 HRCCFG: CLKC (Bitfield-Mask: 0x07) */ +#define HRPWM0_HRCCFG_LRC0E_Pos (20UL) /*!< HRPWM0 HRCCFG: LRC0E (Bit 20) */ +#define HRPWM0_HRCCFG_LRC0E_Msk (0x100000UL) /*!< HRPWM0 HRCCFG: LRC0E (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRCCFG_LRC1E_Pos (21UL) /*!< HRPWM0 HRCCFG: LRC1E (Bit 21) */ +#define HRPWM0_HRCCFG_LRC1E_Msk (0x200000UL) /*!< HRPWM0 HRCCFG: LRC1E (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRCCFG_LRC2E_Pos (22UL) /*!< HRPWM0 HRCCFG: LRC2E (Bit 22) */ +#define HRPWM0_HRCCFG_LRC2E_Msk (0x400000UL) /*!< HRPWM0 HRCCFG: LRC2E (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRCCFG_LRC3E_Pos (23UL) /*!< HRPWM0 HRCCFG: LRC3E (Bit 23) */ +#define HRPWM0_HRCCFG_LRC3E_Msk (0x800000UL) /*!< HRPWM0 HRCCFG: LRC3E (Bitfield-Mask: 0x01) */ + +/* ------------------------------- HRPWM0_HRCSTRG ------------------------------- */ +#define HRPWM0_HRCSTRG_H0ES_Pos (0UL) /*!< HRPWM0 HRCSTRG: H0ES (Bit 0) */ +#define HRPWM0_HRCSTRG_H0ES_Msk (0x1UL) /*!< HRPWM0 HRCSTRG: H0ES (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRCSTRG_H0DES_Pos (1UL) /*!< HRPWM0 HRCSTRG: H0DES (Bit 1) */ +#define HRPWM0_HRCSTRG_H0DES_Msk (0x2UL) /*!< HRPWM0 HRCSTRG: H0DES (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRCSTRG_H1ES_Pos (4UL) /*!< HRPWM0 HRCSTRG: H1ES (Bit 4) */ +#define HRPWM0_HRCSTRG_H1ES_Msk (0x10UL) /*!< HRPWM0 HRCSTRG: H1ES (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRCSTRG_H1DES_Pos (5UL) /*!< HRPWM0 HRCSTRG: H1DES (Bit 5) */ +#define HRPWM0_HRCSTRG_H1DES_Msk (0x20UL) /*!< HRPWM0 HRCSTRG: H1DES (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRCSTRG_H2ES_Pos (8UL) /*!< HRPWM0 HRCSTRG: H2ES (Bit 8) */ +#define HRPWM0_HRCSTRG_H2ES_Msk (0x100UL) /*!< HRPWM0 HRCSTRG: H2ES (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRCSTRG_H2DES_Pos (9UL) /*!< HRPWM0 HRCSTRG: H2DES (Bit 9) */ +#define HRPWM0_HRCSTRG_H2DES_Msk (0x200UL) /*!< HRPWM0 HRCSTRG: H2DES (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRCSTRG_H3ES_Pos (12UL) /*!< HRPWM0 HRCSTRG: H3ES (Bit 12) */ +#define HRPWM0_HRCSTRG_H3ES_Msk (0x1000UL) /*!< HRPWM0 HRCSTRG: H3ES (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRCSTRG_H3DES_Pos (13UL) /*!< HRPWM0 HRCSTRG: H3DES (Bit 13) */ +#define HRPWM0_HRCSTRG_H3DES_Msk (0x2000UL) /*!< HRPWM0 HRCSTRG: H3DES (Bitfield-Mask: 0x01) */ + +/* ------------------------------- HRPWM0_HRCCTRG ------------------------------- */ +#define HRPWM0_HRCCTRG_H0EC_Pos (0UL) /*!< HRPWM0 HRCCTRG: H0EC (Bit 0) */ +#define HRPWM0_HRCCTRG_H0EC_Msk (0x1UL) /*!< HRPWM0 HRCCTRG: H0EC (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRCCTRG_H0DEC_Pos (1UL) /*!< HRPWM0 HRCCTRG: H0DEC (Bit 1) */ +#define HRPWM0_HRCCTRG_H0DEC_Msk (0x2UL) /*!< HRPWM0 HRCCTRG: H0DEC (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRCCTRG_H1EC_Pos (4UL) /*!< HRPWM0 HRCCTRG: H1EC (Bit 4) */ +#define HRPWM0_HRCCTRG_H1EC_Msk (0x10UL) /*!< HRPWM0 HRCCTRG: H1EC (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRCCTRG_H1DEC_Pos (5UL) /*!< HRPWM0 HRCCTRG: H1DEC (Bit 5) */ +#define HRPWM0_HRCCTRG_H1DEC_Msk (0x20UL) /*!< HRPWM0 HRCCTRG: H1DEC (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRCCTRG_H2CEC_Pos (8UL) /*!< HRPWM0 HRCCTRG: H2CEC (Bit 8) */ +#define HRPWM0_HRCCTRG_H2CEC_Msk (0x100UL) /*!< HRPWM0 HRCCTRG: H2CEC (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRCCTRG_H2DEC_Pos (9UL) /*!< HRPWM0 HRCCTRG: H2DEC (Bit 9) */ +#define HRPWM0_HRCCTRG_H2DEC_Msk (0x200UL) /*!< HRPWM0 HRCCTRG: H2DEC (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRCCTRG_H3EC_Pos (12UL) /*!< HRPWM0 HRCCTRG: H3EC (Bit 12) */ +#define HRPWM0_HRCCTRG_H3EC_Msk (0x1000UL) /*!< HRPWM0 HRCCTRG: H3EC (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRCCTRG_H3DEC_Pos (13UL) /*!< HRPWM0 HRCCTRG: H3DEC (Bit 13) */ +#define HRPWM0_HRCCTRG_H3DEC_Msk (0x2000UL) /*!< HRPWM0 HRCCTRG: H3DEC (Bitfield-Mask: 0x01) */ + +/* ------------------------------- HRPWM0_HRCSTSG ------------------------------- */ +#define HRPWM0_HRCSTSG_H0STE_Pos (0UL) /*!< HRPWM0 HRCSTSG: H0STE (Bit 0) */ +#define HRPWM0_HRCSTSG_H0STE_Msk (0x1UL) /*!< HRPWM0 HRCSTSG: H0STE (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRCSTSG_H0DSTE_Pos (1UL) /*!< HRPWM0 HRCSTSG: H0DSTE (Bit 1) */ +#define HRPWM0_HRCSTSG_H0DSTE_Msk (0x2UL) /*!< HRPWM0 HRCSTSG: H0DSTE (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRCSTSG_H1STE_Pos (4UL) /*!< HRPWM0 HRCSTSG: H1STE (Bit 4) */ +#define HRPWM0_HRCSTSG_H1STE_Msk (0x10UL) /*!< HRPWM0 HRCSTSG: H1STE (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRCSTSG_H1DSTE_Pos (5UL) /*!< HRPWM0 HRCSTSG: H1DSTE (Bit 5) */ +#define HRPWM0_HRCSTSG_H1DSTE_Msk (0x20UL) /*!< HRPWM0 HRCSTSG: H1DSTE (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRCSTSG_H2STE_Pos (8UL) /*!< HRPWM0 HRCSTSG: H2STE (Bit 8) */ +#define HRPWM0_HRCSTSG_H2STE_Msk (0x100UL) /*!< HRPWM0 HRCSTSG: H2STE (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRCSTSG_H2DSTE_Pos (9UL) /*!< HRPWM0 HRCSTSG: H2DSTE (Bit 9) */ +#define HRPWM0_HRCSTSG_H2DSTE_Msk (0x200UL) /*!< HRPWM0 HRCSTSG: H2DSTE (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRCSTSG_H3STE_Pos (12UL) /*!< HRPWM0 HRCSTSG: H3STE (Bit 12) */ +#define HRPWM0_HRCSTSG_H3STE_Msk (0x1000UL) /*!< HRPWM0 HRCSTSG: H3STE (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRCSTSG_H3DSTE_Pos (13UL) /*!< HRPWM0 HRCSTSG: H3DSTE (Bit 13) */ +#define HRPWM0_HRCSTSG_H3DSTE_Msk (0x2000UL) /*!< HRPWM0 HRCSTSG: H3DSTE (Bitfield-Mask: 0x01) */ + +/* -------------------------------- HRPWM0_HRGHRS ------------------------------- */ +#define HRPWM0_HRGHRS_HRGR_Pos (0UL) /*!< HRPWM0 HRGHRS: HRGR (Bit 0) */ +#define HRPWM0_HRGHRS_HRGR_Msk (0x1UL) /*!< HRPWM0 HRGHRS: HRGR (Bitfield-Mask: 0x01) */ + + +/* ================================================================================ */ +/* ================ Group 'HRPWM0_CSG' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ------------------------------- HRPWM0_CSG_DCI ------------------------------- */ +#define HRPWM0_CSG_DCI_SVIS_Pos (0UL) /*!< HRPWM0_CSG DCI: SVIS (Bit 0) */ +#define HRPWM0_CSG_DCI_SVIS_Msk (0xfUL) /*!< HRPWM0_CSG DCI: SVIS (Bitfield-Mask: 0x0f) */ +#define HRPWM0_CSG_DCI_STRIS_Pos (4UL) /*!< HRPWM0_CSG DCI: STRIS (Bit 4) */ +#define HRPWM0_CSG_DCI_STRIS_Msk (0xf0UL) /*!< HRPWM0_CSG DCI: STRIS (Bitfield-Mask: 0x0f) */ +#define HRPWM0_CSG_DCI_STPIS_Pos (8UL) /*!< HRPWM0_CSG DCI: STPIS (Bit 8) */ +#define HRPWM0_CSG_DCI_STPIS_Msk (0xf00UL) /*!< HRPWM0_CSG DCI: STPIS (Bitfield-Mask: 0x0f) */ +#define HRPWM0_CSG_DCI_TRGIS_Pos (12UL) /*!< HRPWM0_CSG DCI: TRGIS (Bit 12) */ +#define HRPWM0_CSG_DCI_TRGIS_Msk (0xf000UL) /*!< HRPWM0_CSG DCI: TRGIS (Bitfield-Mask: 0x0f) */ +#define HRPWM0_CSG_DCI_STIS_Pos (16UL) /*!< HRPWM0_CSG DCI: STIS (Bit 16) */ +#define HRPWM0_CSG_DCI_STIS_Msk (0xf0000UL) /*!< HRPWM0_CSG DCI: STIS (Bitfield-Mask: 0x0f) */ +#define HRPWM0_CSG_DCI_SCS_Pos (20UL) /*!< HRPWM0_CSG DCI: SCS (Bit 20) */ +#define HRPWM0_CSG_DCI_SCS_Msk (0x300000UL) /*!< HRPWM0_CSG DCI: SCS (Bitfield-Mask: 0x03) */ + +/* ------------------------------- HRPWM0_CSG_IES ------------------------------- */ +#define HRPWM0_CSG_IES_SVLS_Pos (0UL) /*!< HRPWM0_CSG IES: SVLS (Bit 0) */ +#define HRPWM0_CSG_IES_SVLS_Msk (0x3UL) /*!< HRPWM0_CSG IES: SVLS (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG_IES_STRES_Pos (2UL) /*!< HRPWM0_CSG IES: STRES (Bit 2) */ +#define HRPWM0_CSG_IES_STRES_Msk (0xcUL) /*!< HRPWM0_CSG IES: STRES (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG_IES_STPES_Pos (4UL) /*!< HRPWM0_CSG IES: STPES (Bit 4) */ +#define HRPWM0_CSG_IES_STPES_Msk (0x30UL) /*!< HRPWM0_CSG IES: STPES (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG_IES_TRGES_Pos (6UL) /*!< HRPWM0_CSG IES: TRGES (Bit 6) */ +#define HRPWM0_CSG_IES_TRGES_Msk (0xc0UL) /*!< HRPWM0_CSG IES: TRGES (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG_IES_STES_Pos (8UL) /*!< HRPWM0_CSG IES: STES (Bit 8) */ +#define HRPWM0_CSG_IES_STES_Msk (0x300UL) /*!< HRPWM0_CSG IES: STES (Bitfield-Mask: 0x03) */ + +/* -------------------------------- HRPWM0_CSG_SC ------------------------------- */ +#define HRPWM0_CSG_SC_PSRM_Pos (0UL) /*!< HRPWM0_CSG SC: PSRM (Bit 0) */ +#define HRPWM0_CSG_SC_PSRM_Msk (0x3UL) /*!< HRPWM0_CSG SC: PSRM (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG_SC_PSTM_Pos (2UL) /*!< HRPWM0_CSG SC: PSTM (Bit 2) */ +#define HRPWM0_CSG_SC_PSTM_Msk (0xcUL) /*!< HRPWM0_CSG SC: PSTM (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG_SC_FPD_Pos (4UL) /*!< HRPWM0_CSG SC: FPD (Bit 4) */ +#define HRPWM0_CSG_SC_FPD_Msk (0x10UL) /*!< HRPWM0_CSG SC: FPD (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG_SC_PSV_Pos (5UL) /*!< HRPWM0_CSG SC: PSV (Bit 5) */ +#define HRPWM0_CSG_SC_PSV_Msk (0x60UL) /*!< HRPWM0_CSG SC: PSV (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG_SC_SCM_Pos (8UL) /*!< HRPWM0_CSG SC: SCM (Bit 8) */ +#define HRPWM0_CSG_SC_SCM_Msk (0x300UL) /*!< HRPWM0_CSG SC: SCM (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG_SC_SSRM_Pos (10UL) /*!< HRPWM0_CSG SC: SSRM (Bit 10) */ +#define HRPWM0_CSG_SC_SSRM_Msk (0xc00UL) /*!< HRPWM0_CSG SC: SSRM (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG_SC_SSTM_Pos (12UL) /*!< HRPWM0_CSG SC: SSTM (Bit 12) */ +#define HRPWM0_CSG_SC_SSTM_Msk (0x3000UL) /*!< HRPWM0_CSG SC: SSTM (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG_SC_SVSC_Pos (14UL) /*!< HRPWM0_CSG SC: SVSC (Bit 14) */ +#define HRPWM0_CSG_SC_SVSC_Msk (0xc000UL) /*!< HRPWM0_CSG SC: SVSC (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG_SC_SWSM_Pos (16UL) /*!< HRPWM0_CSG SC: SWSM (Bit 16) */ +#define HRPWM0_CSG_SC_SWSM_Msk (0x30000UL) /*!< HRPWM0_CSG SC: SWSM (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG_SC_GCFG_Pos (18UL) /*!< HRPWM0_CSG SC: GCFG (Bit 18) */ +#define HRPWM0_CSG_SC_GCFG_Msk (0xc0000UL) /*!< HRPWM0_CSG SC: GCFG (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG_SC_IST_Pos (20UL) /*!< HRPWM0_CSG SC: IST (Bit 20) */ +#define HRPWM0_CSG_SC_IST_Msk (0x100000UL) /*!< HRPWM0_CSG SC: IST (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG_SC_PSE_Pos (21UL) /*!< HRPWM0_CSG SC: PSE (Bit 21) */ +#define HRPWM0_CSG_SC_PSE_Msk (0x200000UL) /*!< HRPWM0_CSG SC: PSE (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG_SC_PSWM_Pos (24UL) /*!< HRPWM0_CSG SC: PSWM (Bit 24) */ +#define HRPWM0_CSG_SC_PSWM_Msk (0x3000000UL) /*!< HRPWM0_CSG SC: PSWM (Bitfield-Mask: 0x03) */ + +/* -------------------------------- HRPWM0_CSG_PC ------------------------------- */ +#define HRPWM0_CSG_PC_PSWV_Pos (0UL) /*!< HRPWM0_CSG PC: PSWV (Bit 0) */ +#define HRPWM0_CSG_PC_PSWV_Msk (0x3fUL) /*!< HRPWM0_CSG PC: PSWV (Bitfield-Mask: 0x3f) */ + +/* ------------------------------- HRPWM0_CSG_DSV1 ------------------------------ */ +#define HRPWM0_CSG_DSV1_DSV1_Pos (0UL) /*!< HRPWM0_CSG DSV1: DSV1 (Bit 0) */ +#define HRPWM0_CSG_DSV1_DSV1_Msk (0x3ffUL) /*!< HRPWM0_CSG DSV1: DSV1 (Bitfield-Mask: 0x3ff) */ + +/* ------------------------------- HRPWM0_CSG_DSV2 ------------------------------ */ +#define HRPWM0_CSG_DSV2_DSV2_Pos (0UL) /*!< HRPWM0_CSG DSV2: DSV2 (Bit 0) */ +#define HRPWM0_CSG_DSV2_DSV2_Msk (0x3ffUL) /*!< HRPWM0_CSG DSV2: DSV2 (Bitfield-Mask: 0x3ff) */ + +/* ------------------------------ HRPWM0_CSG_SDSV1 ------------------------------ */ +#define HRPWM0_CSG_SDSV1_SDSV1_Pos (0UL) /*!< HRPWM0_CSG SDSV1: SDSV1 (Bit 0) */ +#define HRPWM0_CSG_SDSV1_SDSV1_Msk (0x3ffUL) /*!< HRPWM0_CSG SDSV1: SDSV1 (Bitfield-Mask: 0x3ff) */ + +/* ------------------------------- HRPWM0_CSG_SPC ------------------------------- */ +#define HRPWM0_CSG_SPC_SPSWV_Pos (0UL) /*!< HRPWM0_CSG SPC: SPSWV (Bit 0) */ +#define HRPWM0_CSG_SPC_SPSWV_Msk (0x3fUL) /*!< HRPWM0_CSG SPC: SPSWV (Bitfield-Mask: 0x3f) */ + +/* -------------------------------- HRPWM0_CSG_CC ------------------------------- */ +#define HRPWM0_CSG_CC_IBS_Pos (0UL) /*!< HRPWM0_CSG CC: IBS (Bit 0) */ +#define HRPWM0_CSG_CC_IBS_Msk (0xfUL) /*!< HRPWM0_CSG CC: IBS (Bitfield-Mask: 0x0f) */ +#define HRPWM0_CSG_CC_IMCS_Pos (8UL) /*!< HRPWM0_CSG CC: IMCS (Bit 8) */ +#define HRPWM0_CSG_CC_IMCS_Msk (0x100UL) /*!< HRPWM0_CSG CC: IMCS (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG_CC_IMCC_Pos (9UL) /*!< HRPWM0_CSG CC: IMCC (Bit 9) */ +#define HRPWM0_CSG_CC_IMCC_Msk (0x600UL) /*!< HRPWM0_CSG CC: IMCC (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG_CC_ESE_Pos (11UL) /*!< HRPWM0_CSG CC: ESE (Bit 11) */ +#define HRPWM0_CSG_CC_ESE_Msk (0x800UL) /*!< HRPWM0_CSG CC: ESE (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG_CC_OIE_Pos (12UL) /*!< HRPWM0_CSG CC: OIE (Bit 12) */ +#define HRPWM0_CSG_CC_OIE_Msk (0x1000UL) /*!< HRPWM0_CSG CC: OIE (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG_CC_OSE_Pos (13UL) /*!< HRPWM0_CSG CC: OSE (Bit 13) */ +#define HRPWM0_CSG_CC_OSE_Msk (0x2000UL) /*!< HRPWM0_CSG CC: OSE (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG_CC_BLMC_Pos (14UL) /*!< HRPWM0_CSG CC: BLMC (Bit 14) */ +#define HRPWM0_CSG_CC_BLMC_Msk (0xc000UL) /*!< HRPWM0_CSG CC: BLMC (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG_CC_EBE_Pos (16UL) /*!< HRPWM0_CSG CC: EBE (Bit 16) */ +#define HRPWM0_CSG_CC_EBE_Msk (0x10000UL) /*!< HRPWM0_CSG CC: EBE (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG_CC_COFE_Pos (17UL) /*!< HRPWM0_CSG CC: COFE (Bit 17) */ +#define HRPWM0_CSG_CC_COFE_Msk (0x20000UL) /*!< HRPWM0_CSG CC: COFE (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG_CC_COFM_Pos (18UL) /*!< HRPWM0_CSG CC: COFM (Bit 18) */ +#define HRPWM0_CSG_CC_COFM_Msk (0x3c0000UL) /*!< HRPWM0_CSG CC: COFM (Bitfield-Mask: 0x0f) */ +#define HRPWM0_CSG_CC_COFC_Pos (24UL) /*!< HRPWM0_CSG CC: COFC (Bit 24) */ +#define HRPWM0_CSG_CC_COFC_Msk (0x3000000UL) /*!< HRPWM0_CSG CC: COFC (Bitfield-Mask: 0x03) */ + +/* ------------------------------- HRPWM0_CSG_PLC ------------------------------- */ +#define HRPWM0_CSG_PLC_IPLS_Pos (0UL) /*!< HRPWM0_CSG PLC: IPLS (Bit 0) */ +#define HRPWM0_CSG_PLC_IPLS_Msk (0xfUL) /*!< HRPWM0_CSG PLC: IPLS (Bitfield-Mask: 0x0f) */ +#define HRPWM0_CSG_PLC_PLCL_Pos (8UL) /*!< HRPWM0_CSG PLC: PLCL (Bit 8) */ +#define HRPWM0_CSG_PLC_PLCL_Msk (0x300UL) /*!< HRPWM0_CSG PLC: PLCL (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG_PLC_PSL_Pos (10UL) /*!< HRPWM0_CSG PLC: PSL (Bit 10) */ +#define HRPWM0_CSG_PLC_PSL_Msk (0x400UL) /*!< HRPWM0_CSG PLC: PSL (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG_PLC_PLSW_Pos (11UL) /*!< HRPWM0_CSG PLC: PLSW (Bit 11) */ +#define HRPWM0_CSG_PLC_PLSW_Msk (0x800UL) /*!< HRPWM0_CSG PLC: PLSW (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG_PLC_PLEC_Pos (12UL) /*!< HRPWM0_CSG PLC: PLEC (Bit 12) */ +#define HRPWM0_CSG_PLC_PLEC_Msk (0x3000UL) /*!< HRPWM0_CSG PLC: PLEC (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG_PLC_PLXC_Pos (14UL) /*!< HRPWM0_CSG PLC: PLXC (Bit 14) */ +#define HRPWM0_CSG_PLC_PLXC_Msk (0xc000UL) /*!< HRPWM0_CSG PLC: PLXC (Bitfield-Mask: 0x03) */ + +/* ------------------------------- HRPWM0_CSG_BLV ------------------------------- */ +#define HRPWM0_CSG_BLV_BLV_Pos (0UL) /*!< HRPWM0_CSG BLV: BLV (Bit 0) */ +#define HRPWM0_CSG_BLV_BLV_Msk (0xffUL) /*!< HRPWM0_CSG BLV: BLV (Bitfield-Mask: 0xff) */ + +/* ------------------------------- HRPWM0_CSG_SRE ------------------------------- */ +#define HRPWM0_CSG_SRE_VLS1E_Pos (0UL) /*!< HRPWM0_CSG SRE: VLS1E (Bit 0) */ +#define HRPWM0_CSG_SRE_VLS1E_Msk (0x1UL) /*!< HRPWM0_CSG SRE: VLS1E (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG_SRE_VLS2E_Pos (1UL) /*!< HRPWM0_CSG SRE: VLS2E (Bit 1) */ +#define HRPWM0_CSG_SRE_VLS2E_Msk (0x2UL) /*!< HRPWM0_CSG SRE: VLS2E (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG_SRE_TRGSE_Pos (2UL) /*!< HRPWM0_CSG SRE: TRGSE (Bit 2) */ +#define HRPWM0_CSG_SRE_TRGSE_Msk (0x4UL) /*!< HRPWM0_CSG SRE: TRGSE (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG_SRE_STRSE_Pos (3UL) /*!< HRPWM0_CSG SRE: STRSE (Bit 3) */ +#define HRPWM0_CSG_SRE_STRSE_Msk (0x8UL) /*!< HRPWM0_CSG SRE: STRSE (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG_SRE_STPSE_Pos (4UL) /*!< HRPWM0_CSG SRE: STPSE (Bit 4) */ +#define HRPWM0_CSG_SRE_STPSE_Msk (0x10UL) /*!< HRPWM0_CSG SRE: STPSE (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG_SRE_STDE_Pos (5UL) /*!< HRPWM0_CSG SRE: STDE (Bit 5) */ +#define HRPWM0_CSG_SRE_STDE_Msk (0x20UL) /*!< HRPWM0_CSG SRE: STDE (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG_SRE_CRSE_Pos (6UL) /*!< HRPWM0_CSG SRE: CRSE (Bit 6) */ +#define HRPWM0_CSG_SRE_CRSE_Msk (0x40UL) /*!< HRPWM0_CSG SRE: CRSE (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG_SRE_CFSE_Pos (7UL) /*!< HRPWM0_CSG SRE: CFSE (Bit 7) */ +#define HRPWM0_CSG_SRE_CFSE_Msk (0x80UL) /*!< HRPWM0_CSG SRE: CFSE (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG_SRE_CSEE_Pos (8UL) /*!< HRPWM0_CSG SRE: CSEE (Bit 8) */ +#define HRPWM0_CSG_SRE_CSEE_Msk (0x100UL) /*!< HRPWM0_CSG SRE: CSEE (Bitfield-Mask: 0x01) */ + +/* ------------------------------- HRPWM0_CSG_SRS ------------------------------- */ +#define HRPWM0_CSG_SRS_VLS1S_Pos (0UL) /*!< HRPWM0_CSG SRS: VLS1S (Bit 0) */ +#define HRPWM0_CSG_SRS_VLS1S_Msk (0x3UL) /*!< HRPWM0_CSG SRS: VLS1S (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG_SRS_VLS2S_Pos (2UL) /*!< HRPWM0_CSG SRS: VLS2S (Bit 2) */ +#define HRPWM0_CSG_SRS_VLS2S_Msk (0xcUL) /*!< HRPWM0_CSG SRS: VLS2S (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG_SRS_TRLS_Pos (4UL) /*!< HRPWM0_CSG SRS: TRLS (Bit 4) */ +#define HRPWM0_CSG_SRS_TRLS_Msk (0x30UL) /*!< HRPWM0_CSG SRS: TRLS (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG_SRS_SSLS_Pos (6UL) /*!< HRPWM0_CSG SRS: SSLS (Bit 6) */ +#define HRPWM0_CSG_SRS_SSLS_Msk (0xc0UL) /*!< HRPWM0_CSG SRS: SSLS (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG_SRS_STLS_Pos (8UL) /*!< HRPWM0_CSG SRS: STLS (Bit 8) */ +#define HRPWM0_CSG_SRS_STLS_Msk (0x300UL) /*!< HRPWM0_CSG SRS: STLS (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG_SRS_CRFLS_Pos (10UL) /*!< HRPWM0_CSG SRS: CRFLS (Bit 10) */ +#define HRPWM0_CSG_SRS_CRFLS_Msk (0xc00UL) /*!< HRPWM0_CSG SRS: CRFLS (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG_SRS_CSLS_Pos (12UL) /*!< HRPWM0_CSG SRS: CSLS (Bit 12) */ +#define HRPWM0_CSG_SRS_CSLS_Msk (0x3000UL) /*!< HRPWM0_CSG SRS: CSLS (Bitfield-Mask: 0x03) */ + +/* ------------------------------- HRPWM0_CSG_SWS ------------------------------- */ +#define HRPWM0_CSG_SWS_SVLS1_Pos (0UL) /*!< HRPWM0_CSG SWS: SVLS1 (Bit 0) */ +#define HRPWM0_CSG_SWS_SVLS1_Msk (0x1UL) /*!< HRPWM0_CSG SWS: SVLS1 (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG_SWS_SVLS2_Pos (1UL) /*!< HRPWM0_CSG SWS: SVLS2 (Bit 1) */ +#define HRPWM0_CSG_SWS_SVLS2_Msk (0x2UL) /*!< HRPWM0_CSG SWS: SVLS2 (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG_SWS_STRGS_Pos (2UL) /*!< HRPWM0_CSG SWS: STRGS (Bit 2) */ +#define HRPWM0_CSG_SWS_STRGS_Msk (0x4UL) /*!< HRPWM0_CSG SWS: STRGS (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG_SWS_SSTRS_Pos (3UL) /*!< HRPWM0_CSG SWS: SSTRS (Bit 3) */ +#define HRPWM0_CSG_SWS_SSTRS_Msk (0x8UL) /*!< HRPWM0_CSG SWS: SSTRS (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG_SWS_SSTPS_Pos (4UL) /*!< HRPWM0_CSG SWS: SSTPS (Bit 4) */ +#define HRPWM0_CSG_SWS_SSTPS_Msk (0x10UL) /*!< HRPWM0_CSG SWS: SSTPS (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG_SWS_SSTD_Pos (5UL) /*!< HRPWM0_CSG SWS: SSTD (Bit 5) */ +#define HRPWM0_CSG_SWS_SSTD_Msk (0x20UL) /*!< HRPWM0_CSG SWS: SSTD (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG_SWS_SCRS_Pos (6UL) /*!< HRPWM0_CSG SWS: SCRS (Bit 6) */ +#define HRPWM0_CSG_SWS_SCRS_Msk (0x40UL) /*!< HRPWM0_CSG SWS: SCRS (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG_SWS_SCFS_Pos (7UL) /*!< HRPWM0_CSG SWS: SCFS (Bit 7) */ +#define HRPWM0_CSG_SWS_SCFS_Msk (0x80UL) /*!< HRPWM0_CSG SWS: SCFS (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG_SWS_SCSS_Pos (8UL) /*!< HRPWM0_CSG SWS: SCSS (Bit 8) */ +#define HRPWM0_CSG_SWS_SCSS_Msk (0x100UL) /*!< HRPWM0_CSG SWS: SCSS (Bitfield-Mask: 0x01) */ + +/* ------------------------------- HRPWM0_CSG_SWC ------------------------------- */ +#define HRPWM0_CSG_SWC_CVLS1_Pos (0UL) /*!< HRPWM0_CSG SWC: CVLS1 (Bit 0) */ +#define HRPWM0_CSG_SWC_CVLS1_Msk (0x1UL) /*!< HRPWM0_CSG SWC: CVLS1 (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG_SWC_CVLS2_Pos (1UL) /*!< HRPWM0_CSG SWC: CVLS2 (Bit 1) */ +#define HRPWM0_CSG_SWC_CVLS2_Msk (0x2UL) /*!< HRPWM0_CSG SWC: CVLS2 (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG_SWC_CTRGS_Pos (2UL) /*!< HRPWM0_CSG SWC: CTRGS (Bit 2) */ +#define HRPWM0_CSG_SWC_CTRGS_Msk (0x4UL) /*!< HRPWM0_CSG SWC: CTRGS (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG_SWC_CSTRS_Pos (3UL) /*!< HRPWM0_CSG SWC: CSTRS (Bit 3) */ +#define HRPWM0_CSG_SWC_CSTRS_Msk (0x8UL) /*!< HRPWM0_CSG SWC: CSTRS (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG_SWC_CSTPS_Pos (4UL) /*!< HRPWM0_CSG SWC: CSTPS (Bit 4) */ +#define HRPWM0_CSG_SWC_CSTPS_Msk (0x10UL) /*!< HRPWM0_CSG SWC: CSTPS (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG_SWC_CSTD_Pos (5UL) /*!< HRPWM0_CSG SWC: CSTD (Bit 5) */ +#define HRPWM0_CSG_SWC_CSTD_Msk (0x20UL) /*!< HRPWM0_CSG SWC: CSTD (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG_SWC_CCRS_Pos (6UL) /*!< HRPWM0_CSG SWC: CCRS (Bit 6) */ +#define HRPWM0_CSG_SWC_CCRS_Msk (0x40UL) /*!< HRPWM0_CSG SWC: CCRS (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG_SWC_CCFS_Pos (7UL) /*!< HRPWM0_CSG SWC: CCFS (Bit 7) */ +#define HRPWM0_CSG_SWC_CCFS_Msk (0x80UL) /*!< HRPWM0_CSG SWC: CCFS (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG_SWC_CCSS_Pos (8UL) /*!< HRPWM0_CSG SWC: CCSS (Bit 8) */ +#define HRPWM0_CSG_SWC_CCSS_Msk (0x100UL) /*!< HRPWM0_CSG SWC: CCSS (Bitfield-Mask: 0x01) */ + +/* ------------------------------ HRPWM0_CSG_ISTAT ------------------------------ */ +#define HRPWM0_CSG_ISTAT_VLS1S_Pos (0UL) /*!< HRPWM0_CSG ISTAT: VLS1S (Bit 0) */ +#define HRPWM0_CSG_ISTAT_VLS1S_Msk (0x1UL) /*!< HRPWM0_CSG ISTAT: VLS1S (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG_ISTAT_VLS2S_Pos (1UL) /*!< HRPWM0_CSG ISTAT: VLS2S (Bit 1) */ +#define HRPWM0_CSG_ISTAT_VLS2S_Msk (0x2UL) /*!< HRPWM0_CSG ISTAT: VLS2S (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG_ISTAT_TRGSS_Pos (2UL) /*!< HRPWM0_CSG ISTAT: TRGSS (Bit 2) */ +#define HRPWM0_CSG_ISTAT_TRGSS_Msk (0x4UL) /*!< HRPWM0_CSG ISTAT: TRGSS (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG_ISTAT_STRSS_Pos (3UL) /*!< HRPWM0_CSG ISTAT: STRSS (Bit 3) */ +#define HRPWM0_CSG_ISTAT_STRSS_Msk (0x8UL) /*!< HRPWM0_CSG ISTAT: STRSS (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG_ISTAT_STPSS_Pos (4UL) /*!< HRPWM0_CSG ISTAT: STPSS (Bit 4) */ +#define HRPWM0_CSG_ISTAT_STPSS_Msk (0x10UL) /*!< HRPWM0_CSG ISTAT: STPSS (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG_ISTAT_STDS_Pos (5UL) /*!< HRPWM0_CSG ISTAT: STDS (Bit 5) */ +#define HRPWM0_CSG_ISTAT_STDS_Msk (0x20UL) /*!< HRPWM0_CSG ISTAT: STDS (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG_ISTAT_CRSS_Pos (6UL) /*!< HRPWM0_CSG ISTAT: CRSS (Bit 6) */ +#define HRPWM0_CSG_ISTAT_CRSS_Msk (0x40UL) /*!< HRPWM0_CSG ISTAT: CRSS (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG_ISTAT_CFSS_Pos (7UL) /*!< HRPWM0_CSG ISTAT: CFSS (Bit 7) */ +#define HRPWM0_CSG_ISTAT_CFSS_Msk (0x80UL) /*!< HRPWM0_CSG ISTAT: CFSS (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG_ISTAT_CSES_Pos (8UL) /*!< HRPWM0_CSG ISTAT: CSES (Bit 8) */ +#define HRPWM0_CSG_ISTAT_CSES_Msk (0x100UL) /*!< HRPWM0_CSG ISTAT: CSES (Bitfield-Mask: 0x01) */ + + +/* ================================================================================ */ +/* ================ struct 'HRPWM0_CSG0' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ------------------------------- HRPWM0_CSG0_DCI ------------------------------ */ +#define HRPWM0_CSG0_DCI_SVIS_Pos (0UL) /*!< HRPWM0_CSG0 DCI: SVIS (Bit 0) */ +#define HRPWM0_CSG0_DCI_SVIS_Msk (0xfUL) /*!< HRPWM0_CSG0 DCI: SVIS (Bitfield-Mask: 0x0f) */ +#define HRPWM0_CSG0_DCI_STRIS_Pos (4UL) /*!< HRPWM0_CSG0 DCI: STRIS (Bit 4) */ +#define HRPWM0_CSG0_DCI_STRIS_Msk (0xf0UL) /*!< HRPWM0_CSG0 DCI: STRIS (Bitfield-Mask: 0x0f) */ +#define HRPWM0_CSG0_DCI_STPIS_Pos (8UL) /*!< HRPWM0_CSG0 DCI: STPIS (Bit 8) */ +#define HRPWM0_CSG0_DCI_STPIS_Msk (0xf00UL) /*!< HRPWM0_CSG0 DCI: STPIS (Bitfield-Mask: 0x0f) */ +#define HRPWM0_CSG0_DCI_TRGIS_Pos (12UL) /*!< HRPWM0_CSG0 DCI: TRGIS (Bit 12) */ +#define HRPWM0_CSG0_DCI_TRGIS_Msk (0xf000UL) /*!< HRPWM0_CSG0 DCI: TRGIS (Bitfield-Mask: 0x0f) */ +#define HRPWM0_CSG0_DCI_STIS_Pos (16UL) /*!< HRPWM0_CSG0 DCI: STIS (Bit 16) */ +#define HRPWM0_CSG0_DCI_STIS_Msk (0xf0000UL) /*!< HRPWM0_CSG0 DCI: STIS (Bitfield-Mask: 0x0f) */ +#define HRPWM0_CSG0_DCI_SCS_Pos (20UL) /*!< HRPWM0_CSG0 DCI: SCS (Bit 20) */ +#define HRPWM0_CSG0_DCI_SCS_Msk (0x300000UL) /*!< HRPWM0_CSG0 DCI: SCS (Bitfield-Mask: 0x03) */ + +/* ------------------------------- HRPWM0_CSG0_IES ------------------------------ */ +#define HRPWM0_CSG0_IES_SVLS_Pos (0UL) /*!< HRPWM0_CSG0 IES: SVLS (Bit 0) */ +#define HRPWM0_CSG0_IES_SVLS_Msk (0x3UL) /*!< HRPWM0_CSG0 IES: SVLS (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG0_IES_STRES_Pos (2UL) /*!< HRPWM0_CSG0 IES: STRES (Bit 2) */ +#define HRPWM0_CSG0_IES_STRES_Msk (0xcUL) /*!< HRPWM0_CSG0 IES: STRES (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG0_IES_STPES_Pos (4UL) /*!< HRPWM0_CSG0 IES: STPES (Bit 4) */ +#define HRPWM0_CSG0_IES_STPES_Msk (0x30UL) /*!< HRPWM0_CSG0 IES: STPES (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG0_IES_TRGES_Pos (6UL) /*!< HRPWM0_CSG0 IES: TRGES (Bit 6) */ +#define HRPWM0_CSG0_IES_TRGES_Msk (0xc0UL) /*!< HRPWM0_CSG0 IES: TRGES (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG0_IES_STES_Pos (8UL) /*!< HRPWM0_CSG0 IES: STES (Bit 8) */ +#define HRPWM0_CSG0_IES_STES_Msk (0x300UL) /*!< HRPWM0_CSG0 IES: STES (Bitfield-Mask: 0x03) */ + +/* ------------------------------- HRPWM0_CSG0_SC ------------------------------- */ +#define HRPWM0_CSG0_SC_PSRM_Pos (0UL) /*!< HRPWM0_CSG0 SC: PSRM (Bit 0) */ +#define HRPWM0_CSG0_SC_PSRM_Msk (0x3UL) /*!< HRPWM0_CSG0 SC: PSRM (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG0_SC_PSTM_Pos (2UL) /*!< HRPWM0_CSG0 SC: PSTM (Bit 2) */ +#define HRPWM0_CSG0_SC_PSTM_Msk (0xcUL) /*!< HRPWM0_CSG0 SC: PSTM (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG0_SC_FPD_Pos (4UL) /*!< HRPWM0_CSG0 SC: FPD (Bit 4) */ +#define HRPWM0_CSG0_SC_FPD_Msk (0x10UL) /*!< HRPWM0_CSG0 SC: FPD (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG0_SC_PSV_Pos (5UL) /*!< HRPWM0_CSG0 SC: PSV (Bit 5) */ +#define HRPWM0_CSG0_SC_PSV_Msk (0x60UL) /*!< HRPWM0_CSG0 SC: PSV (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG0_SC_SCM_Pos (8UL) /*!< HRPWM0_CSG0 SC: SCM (Bit 8) */ +#define HRPWM0_CSG0_SC_SCM_Msk (0x300UL) /*!< HRPWM0_CSG0 SC: SCM (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG0_SC_SSRM_Pos (10UL) /*!< HRPWM0_CSG0 SC: SSRM (Bit 10) */ +#define HRPWM0_CSG0_SC_SSRM_Msk (0xc00UL) /*!< HRPWM0_CSG0 SC: SSRM (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG0_SC_SSTM_Pos (12UL) /*!< HRPWM0_CSG0 SC: SSTM (Bit 12) */ +#define HRPWM0_CSG0_SC_SSTM_Msk (0x3000UL) /*!< HRPWM0_CSG0 SC: SSTM (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG0_SC_SVSC_Pos (14UL) /*!< HRPWM0_CSG0 SC: SVSC (Bit 14) */ +#define HRPWM0_CSG0_SC_SVSC_Msk (0xc000UL) /*!< HRPWM0_CSG0 SC: SVSC (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG0_SC_SWSM_Pos (16UL) /*!< HRPWM0_CSG0 SC: SWSM (Bit 16) */ +#define HRPWM0_CSG0_SC_SWSM_Msk (0x30000UL) /*!< HRPWM0_CSG0 SC: SWSM (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG0_SC_GCFG_Pos (18UL) /*!< HRPWM0_CSG0 SC: GCFG (Bit 18) */ +#define HRPWM0_CSG0_SC_GCFG_Msk (0xc0000UL) /*!< HRPWM0_CSG0 SC: GCFG (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG0_SC_IST_Pos (20UL) /*!< HRPWM0_CSG0 SC: IST (Bit 20) */ +#define HRPWM0_CSG0_SC_IST_Msk (0x100000UL) /*!< HRPWM0_CSG0 SC: IST (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG0_SC_PSE_Pos (21UL) /*!< HRPWM0_CSG0 SC: PSE (Bit 21) */ +#define HRPWM0_CSG0_SC_PSE_Msk (0x200000UL) /*!< HRPWM0_CSG0 SC: PSE (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG0_SC_PSWM_Pos (24UL) /*!< HRPWM0_CSG0 SC: PSWM (Bit 24) */ +#define HRPWM0_CSG0_SC_PSWM_Msk (0x3000000UL) /*!< HRPWM0_CSG0 SC: PSWM (Bitfield-Mask: 0x03) */ + +/* ------------------------------- HRPWM0_CSG0_PC ------------------------------- */ +#define HRPWM0_CSG0_PC_PSWV_Pos (0UL) /*!< HRPWM0_CSG0 PC: PSWV (Bit 0) */ +#define HRPWM0_CSG0_PC_PSWV_Msk (0x3fUL) /*!< HRPWM0_CSG0 PC: PSWV (Bitfield-Mask: 0x3f) */ + +/* ------------------------------ HRPWM0_CSG0_DSV1 ------------------------------ */ +#define HRPWM0_CSG0_DSV1_DSV1_Pos (0UL) /*!< HRPWM0_CSG0 DSV1: DSV1 (Bit 0) */ +#define HRPWM0_CSG0_DSV1_DSV1_Msk (0x3ffUL) /*!< HRPWM0_CSG0 DSV1: DSV1 (Bitfield-Mask: 0x3ff) */ + +/* ------------------------------ HRPWM0_CSG0_DSV2 ------------------------------ */ +#define HRPWM0_CSG0_DSV2_DSV2_Pos (0UL) /*!< HRPWM0_CSG0 DSV2: DSV2 (Bit 0) */ +#define HRPWM0_CSG0_DSV2_DSV2_Msk (0x3ffUL) /*!< HRPWM0_CSG0 DSV2: DSV2 (Bitfield-Mask: 0x3ff) */ + +/* ------------------------------ HRPWM0_CSG0_SDSV1 ----------------------------- */ +#define HRPWM0_CSG0_SDSV1_SDSV1_Pos (0UL) /*!< HRPWM0_CSG0 SDSV1: SDSV1 (Bit 0) */ +#define HRPWM0_CSG0_SDSV1_SDSV1_Msk (0x3ffUL) /*!< HRPWM0_CSG0 SDSV1: SDSV1 (Bitfield-Mask: 0x3ff) */ + +/* ------------------------------- HRPWM0_CSG0_SPC ------------------------------ */ +#define HRPWM0_CSG0_SPC_SPSWV_Pos (0UL) /*!< HRPWM0_CSG0 SPC: SPSWV (Bit 0) */ +#define HRPWM0_CSG0_SPC_SPSWV_Msk (0x3fUL) /*!< HRPWM0_CSG0 SPC: SPSWV (Bitfield-Mask: 0x3f) */ + +/* ------------------------------- HRPWM0_CSG0_CC ------------------------------- */ +#define HRPWM0_CSG0_CC_IBS_Pos (0UL) /*!< HRPWM0_CSG0 CC: IBS (Bit 0) */ +#define HRPWM0_CSG0_CC_IBS_Msk (0xfUL) /*!< HRPWM0_CSG0 CC: IBS (Bitfield-Mask: 0x0f) */ +#define HRPWM0_CSG0_CC_IMCS_Pos (8UL) /*!< HRPWM0_CSG0 CC: IMCS (Bit 8) */ +#define HRPWM0_CSG0_CC_IMCS_Msk (0x100UL) /*!< HRPWM0_CSG0 CC: IMCS (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG0_CC_IMCC_Pos (9UL) /*!< HRPWM0_CSG0 CC: IMCC (Bit 9) */ +#define HRPWM0_CSG0_CC_IMCC_Msk (0x600UL) /*!< HRPWM0_CSG0 CC: IMCC (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG0_CC_ESE_Pos (11UL) /*!< HRPWM0_CSG0 CC: ESE (Bit 11) */ +#define HRPWM0_CSG0_CC_ESE_Msk (0x800UL) /*!< HRPWM0_CSG0 CC: ESE (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG0_CC_OIE_Pos (12UL) /*!< HRPWM0_CSG0 CC: OIE (Bit 12) */ +#define HRPWM0_CSG0_CC_OIE_Msk (0x1000UL) /*!< HRPWM0_CSG0 CC: OIE (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG0_CC_OSE_Pos (13UL) /*!< HRPWM0_CSG0 CC: OSE (Bit 13) */ +#define HRPWM0_CSG0_CC_OSE_Msk (0x2000UL) /*!< HRPWM0_CSG0 CC: OSE (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG0_CC_BLMC_Pos (14UL) /*!< HRPWM0_CSG0 CC: BLMC (Bit 14) */ +#define HRPWM0_CSG0_CC_BLMC_Msk (0xc000UL) /*!< HRPWM0_CSG0 CC: BLMC (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG0_CC_EBE_Pos (16UL) /*!< HRPWM0_CSG0 CC: EBE (Bit 16) */ +#define HRPWM0_CSG0_CC_EBE_Msk (0x10000UL) /*!< HRPWM0_CSG0 CC: EBE (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG0_CC_COFE_Pos (17UL) /*!< HRPWM0_CSG0 CC: COFE (Bit 17) */ +#define HRPWM0_CSG0_CC_COFE_Msk (0x20000UL) /*!< HRPWM0_CSG0 CC: COFE (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG0_CC_COFM_Pos (18UL) /*!< HRPWM0_CSG0 CC: COFM (Bit 18) */ +#define HRPWM0_CSG0_CC_COFM_Msk (0x3c0000UL) /*!< HRPWM0_CSG0 CC: COFM (Bitfield-Mask: 0x0f) */ +#define HRPWM0_CSG0_CC_COFC_Pos (24UL) /*!< HRPWM0_CSG0 CC: COFC (Bit 24) */ +#define HRPWM0_CSG0_CC_COFC_Msk (0x3000000UL) /*!< HRPWM0_CSG0 CC: COFC (Bitfield-Mask: 0x03) */ + +/* ------------------------------- HRPWM0_CSG0_PLC ------------------------------ */ +#define HRPWM0_CSG0_PLC_IPLS_Pos (0UL) /*!< HRPWM0_CSG0 PLC: IPLS (Bit 0) */ +#define HRPWM0_CSG0_PLC_IPLS_Msk (0xfUL) /*!< HRPWM0_CSG0 PLC: IPLS (Bitfield-Mask: 0x0f) */ +#define HRPWM0_CSG0_PLC_PLCL_Pos (8UL) /*!< HRPWM0_CSG0 PLC: PLCL (Bit 8) */ +#define HRPWM0_CSG0_PLC_PLCL_Msk (0x300UL) /*!< HRPWM0_CSG0 PLC: PLCL (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG0_PLC_PSL_Pos (10UL) /*!< HRPWM0_CSG0 PLC: PSL (Bit 10) */ +#define HRPWM0_CSG0_PLC_PSL_Msk (0x400UL) /*!< HRPWM0_CSG0 PLC: PSL (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG0_PLC_PLSW_Pos (11UL) /*!< HRPWM0_CSG0 PLC: PLSW (Bit 11) */ +#define HRPWM0_CSG0_PLC_PLSW_Msk (0x800UL) /*!< HRPWM0_CSG0 PLC: PLSW (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG0_PLC_PLEC_Pos (12UL) /*!< HRPWM0_CSG0 PLC: PLEC (Bit 12) */ +#define HRPWM0_CSG0_PLC_PLEC_Msk (0x3000UL) /*!< HRPWM0_CSG0 PLC: PLEC (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG0_PLC_PLXC_Pos (14UL) /*!< HRPWM0_CSG0 PLC: PLXC (Bit 14) */ +#define HRPWM0_CSG0_PLC_PLXC_Msk (0xc000UL) /*!< HRPWM0_CSG0 PLC: PLXC (Bitfield-Mask: 0x03) */ + +/* ------------------------------- HRPWM0_CSG0_BLV ------------------------------ */ +#define HRPWM0_CSG0_BLV_BLV_Pos (0UL) /*!< HRPWM0_CSG0 BLV: BLV (Bit 0) */ +#define HRPWM0_CSG0_BLV_BLV_Msk (0xffUL) /*!< HRPWM0_CSG0 BLV: BLV (Bitfield-Mask: 0xff) */ + +/* ------------------------------- HRPWM0_CSG0_SRE ------------------------------ */ +#define HRPWM0_CSG0_SRE_VLS1E_Pos (0UL) /*!< HRPWM0_CSG0 SRE: VLS1E (Bit 0) */ +#define HRPWM0_CSG0_SRE_VLS1E_Msk (0x1UL) /*!< HRPWM0_CSG0 SRE: VLS1E (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG0_SRE_VLS2E_Pos (1UL) /*!< HRPWM0_CSG0 SRE: VLS2E (Bit 1) */ +#define HRPWM0_CSG0_SRE_VLS2E_Msk (0x2UL) /*!< HRPWM0_CSG0 SRE: VLS2E (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG0_SRE_TRGSE_Pos (2UL) /*!< HRPWM0_CSG0 SRE: TRGSE (Bit 2) */ +#define HRPWM0_CSG0_SRE_TRGSE_Msk (0x4UL) /*!< HRPWM0_CSG0 SRE: TRGSE (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG0_SRE_STRSE_Pos (3UL) /*!< HRPWM0_CSG0 SRE: STRSE (Bit 3) */ +#define HRPWM0_CSG0_SRE_STRSE_Msk (0x8UL) /*!< HRPWM0_CSG0 SRE: STRSE (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG0_SRE_STPSE_Pos (4UL) /*!< HRPWM0_CSG0 SRE: STPSE (Bit 4) */ +#define HRPWM0_CSG0_SRE_STPSE_Msk (0x10UL) /*!< HRPWM0_CSG0 SRE: STPSE (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG0_SRE_STDE_Pos (5UL) /*!< HRPWM0_CSG0 SRE: STDE (Bit 5) */ +#define HRPWM0_CSG0_SRE_STDE_Msk (0x20UL) /*!< HRPWM0_CSG0 SRE: STDE (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG0_SRE_CRSE_Pos (6UL) /*!< HRPWM0_CSG0 SRE: CRSE (Bit 6) */ +#define HRPWM0_CSG0_SRE_CRSE_Msk (0x40UL) /*!< HRPWM0_CSG0 SRE: CRSE (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG0_SRE_CFSE_Pos (7UL) /*!< HRPWM0_CSG0 SRE: CFSE (Bit 7) */ +#define HRPWM0_CSG0_SRE_CFSE_Msk (0x80UL) /*!< HRPWM0_CSG0 SRE: CFSE (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG0_SRE_CSEE_Pos (8UL) /*!< HRPWM0_CSG0 SRE: CSEE (Bit 8) */ +#define HRPWM0_CSG0_SRE_CSEE_Msk (0x100UL) /*!< HRPWM0_CSG0 SRE: CSEE (Bitfield-Mask: 0x01) */ + +/* ------------------------------- HRPWM0_CSG0_SRS ------------------------------ */ +#define HRPWM0_CSG0_SRS_VLS1S_Pos (0UL) /*!< HRPWM0_CSG0 SRS: VLS1S (Bit 0) */ +#define HRPWM0_CSG0_SRS_VLS1S_Msk (0x3UL) /*!< HRPWM0_CSG0 SRS: VLS1S (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG0_SRS_VLS2S_Pos (2UL) /*!< HRPWM0_CSG0 SRS: VLS2S (Bit 2) */ +#define HRPWM0_CSG0_SRS_VLS2S_Msk (0xcUL) /*!< HRPWM0_CSG0 SRS: VLS2S (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG0_SRS_TRLS_Pos (4UL) /*!< HRPWM0_CSG0 SRS: TRLS (Bit 4) */ +#define HRPWM0_CSG0_SRS_TRLS_Msk (0x30UL) /*!< HRPWM0_CSG0 SRS: TRLS (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG0_SRS_SSLS_Pos (6UL) /*!< HRPWM0_CSG0 SRS: SSLS (Bit 6) */ +#define HRPWM0_CSG0_SRS_SSLS_Msk (0xc0UL) /*!< HRPWM0_CSG0 SRS: SSLS (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG0_SRS_STLS_Pos (8UL) /*!< HRPWM0_CSG0 SRS: STLS (Bit 8) */ +#define HRPWM0_CSG0_SRS_STLS_Msk (0x300UL) /*!< HRPWM0_CSG0 SRS: STLS (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG0_SRS_CRFLS_Pos (10UL) /*!< HRPWM0_CSG0 SRS: CRFLS (Bit 10) */ +#define HRPWM0_CSG0_SRS_CRFLS_Msk (0xc00UL) /*!< HRPWM0_CSG0 SRS: CRFLS (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG0_SRS_CSLS_Pos (12UL) /*!< HRPWM0_CSG0 SRS: CSLS (Bit 12) */ +#define HRPWM0_CSG0_SRS_CSLS_Msk (0x3000UL) /*!< HRPWM0_CSG0 SRS: CSLS (Bitfield-Mask: 0x03) */ + +/* ------------------------------- HRPWM0_CSG0_SWS ------------------------------ */ +#define HRPWM0_CSG0_SWS_SVLS1_Pos (0UL) /*!< HRPWM0_CSG0 SWS: SVLS1 (Bit 0) */ +#define HRPWM0_CSG0_SWS_SVLS1_Msk (0x1UL) /*!< HRPWM0_CSG0 SWS: SVLS1 (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG0_SWS_SVLS2_Pos (1UL) /*!< HRPWM0_CSG0 SWS: SVLS2 (Bit 1) */ +#define HRPWM0_CSG0_SWS_SVLS2_Msk (0x2UL) /*!< HRPWM0_CSG0 SWS: SVLS2 (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG0_SWS_STRGS_Pos (2UL) /*!< HRPWM0_CSG0 SWS: STRGS (Bit 2) */ +#define HRPWM0_CSG0_SWS_STRGS_Msk (0x4UL) /*!< HRPWM0_CSG0 SWS: STRGS (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG0_SWS_SSTRS_Pos (3UL) /*!< HRPWM0_CSG0 SWS: SSTRS (Bit 3) */ +#define HRPWM0_CSG0_SWS_SSTRS_Msk (0x8UL) /*!< HRPWM0_CSG0 SWS: SSTRS (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG0_SWS_SSTPS_Pos (4UL) /*!< HRPWM0_CSG0 SWS: SSTPS (Bit 4) */ +#define HRPWM0_CSG0_SWS_SSTPS_Msk (0x10UL) /*!< HRPWM0_CSG0 SWS: SSTPS (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG0_SWS_SSTD_Pos (5UL) /*!< HRPWM0_CSG0 SWS: SSTD (Bit 5) */ +#define HRPWM0_CSG0_SWS_SSTD_Msk (0x20UL) /*!< HRPWM0_CSG0 SWS: SSTD (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG0_SWS_SCRS_Pos (6UL) /*!< HRPWM0_CSG0 SWS: SCRS (Bit 6) */ +#define HRPWM0_CSG0_SWS_SCRS_Msk (0x40UL) /*!< HRPWM0_CSG0 SWS: SCRS (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG0_SWS_SCFS_Pos (7UL) /*!< HRPWM0_CSG0 SWS: SCFS (Bit 7) */ +#define HRPWM0_CSG0_SWS_SCFS_Msk (0x80UL) /*!< HRPWM0_CSG0 SWS: SCFS (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG0_SWS_SCSS_Pos (8UL) /*!< HRPWM0_CSG0 SWS: SCSS (Bit 8) */ +#define HRPWM0_CSG0_SWS_SCSS_Msk (0x100UL) /*!< HRPWM0_CSG0 SWS: SCSS (Bitfield-Mask: 0x01) */ + +/* ------------------------------- HRPWM0_CSG0_SWC ------------------------------ */ +#define HRPWM0_CSG0_SWC_CVLS1_Pos (0UL) /*!< HRPWM0_CSG0 SWC: CVLS1 (Bit 0) */ +#define HRPWM0_CSG0_SWC_CVLS1_Msk (0x1UL) /*!< HRPWM0_CSG0 SWC: CVLS1 (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG0_SWC_CVLS2_Pos (1UL) /*!< HRPWM0_CSG0 SWC: CVLS2 (Bit 1) */ +#define HRPWM0_CSG0_SWC_CVLS2_Msk (0x2UL) /*!< HRPWM0_CSG0 SWC: CVLS2 (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG0_SWC_CTRGS_Pos (2UL) /*!< HRPWM0_CSG0 SWC: CTRGS (Bit 2) */ +#define HRPWM0_CSG0_SWC_CTRGS_Msk (0x4UL) /*!< HRPWM0_CSG0 SWC: CTRGS (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG0_SWC_CSTRS_Pos (3UL) /*!< HRPWM0_CSG0 SWC: CSTRS (Bit 3) */ +#define HRPWM0_CSG0_SWC_CSTRS_Msk (0x8UL) /*!< HRPWM0_CSG0 SWC: CSTRS (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG0_SWC_CSTPS_Pos (4UL) /*!< HRPWM0_CSG0 SWC: CSTPS (Bit 4) */ +#define HRPWM0_CSG0_SWC_CSTPS_Msk (0x10UL) /*!< HRPWM0_CSG0 SWC: CSTPS (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG0_SWC_CSTD_Pos (5UL) /*!< HRPWM0_CSG0 SWC: CSTD (Bit 5) */ +#define HRPWM0_CSG0_SWC_CSTD_Msk (0x20UL) /*!< HRPWM0_CSG0 SWC: CSTD (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG0_SWC_CCRS_Pos (6UL) /*!< HRPWM0_CSG0 SWC: CCRS (Bit 6) */ +#define HRPWM0_CSG0_SWC_CCRS_Msk (0x40UL) /*!< HRPWM0_CSG0 SWC: CCRS (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG0_SWC_CCFS_Pos (7UL) /*!< HRPWM0_CSG0 SWC: CCFS (Bit 7) */ +#define HRPWM0_CSG0_SWC_CCFS_Msk (0x80UL) /*!< HRPWM0_CSG0 SWC: CCFS (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG0_SWC_CCSS_Pos (8UL) /*!< HRPWM0_CSG0 SWC: CCSS (Bit 8) */ +#define HRPWM0_CSG0_SWC_CCSS_Msk (0x100UL) /*!< HRPWM0_CSG0 SWC: CCSS (Bitfield-Mask: 0x01) */ + +/* ------------------------------ HRPWM0_CSG0_ISTAT ----------------------------- */ +#define HRPWM0_CSG0_ISTAT_VLS1S_Pos (0UL) /*!< HRPWM0_CSG0 ISTAT: VLS1S (Bit 0) */ +#define HRPWM0_CSG0_ISTAT_VLS1S_Msk (0x1UL) /*!< HRPWM0_CSG0 ISTAT: VLS1S (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG0_ISTAT_VLS2S_Pos (1UL) /*!< HRPWM0_CSG0 ISTAT: VLS2S (Bit 1) */ +#define HRPWM0_CSG0_ISTAT_VLS2S_Msk (0x2UL) /*!< HRPWM0_CSG0 ISTAT: VLS2S (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG0_ISTAT_TRGSS_Pos (2UL) /*!< HRPWM0_CSG0 ISTAT: TRGSS (Bit 2) */ +#define HRPWM0_CSG0_ISTAT_TRGSS_Msk (0x4UL) /*!< HRPWM0_CSG0 ISTAT: TRGSS (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG0_ISTAT_STRSS_Pos (3UL) /*!< HRPWM0_CSG0 ISTAT: STRSS (Bit 3) */ +#define HRPWM0_CSG0_ISTAT_STRSS_Msk (0x8UL) /*!< HRPWM0_CSG0 ISTAT: STRSS (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG0_ISTAT_STPSS_Pos (4UL) /*!< HRPWM0_CSG0 ISTAT: STPSS (Bit 4) */ +#define HRPWM0_CSG0_ISTAT_STPSS_Msk (0x10UL) /*!< HRPWM0_CSG0 ISTAT: STPSS (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG0_ISTAT_STDS_Pos (5UL) /*!< HRPWM0_CSG0 ISTAT: STDS (Bit 5) */ +#define HRPWM0_CSG0_ISTAT_STDS_Msk (0x20UL) /*!< HRPWM0_CSG0 ISTAT: STDS (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG0_ISTAT_CRSS_Pos (6UL) /*!< HRPWM0_CSG0 ISTAT: CRSS (Bit 6) */ +#define HRPWM0_CSG0_ISTAT_CRSS_Msk (0x40UL) /*!< HRPWM0_CSG0 ISTAT: CRSS (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG0_ISTAT_CFSS_Pos (7UL) /*!< HRPWM0_CSG0 ISTAT: CFSS (Bit 7) */ +#define HRPWM0_CSG0_ISTAT_CFSS_Msk (0x80UL) /*!< HRPWM0_CSG0 ISTAT: CFSS (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG0_ISTAT_CSES_Pos (8UL) /*!< HRPWM0_CSG0 ISTAT: CSES (Bit 8) */ +#define HRPWM0_CSG0_ISTAT_CSES_Msk (0x100UL) /*!< HRPWM0_CSG0 ISTAT: CSES (Bitfield-Mask: 0x01) */ + + +/* ================================================================================ */ +/* ================ struct 'HRPWM0_CSG1' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ------------------------------- HRPWM0_CSG1_DCI ------------------------------ */ +#define HRPWM0_CSG1_DCI_SVIS_Pos (0UL) /*!< HRPWM0_CSG1 DCI: SVIS (Bit 0) */ +#define HRPWM0_CSG1_DCI_SVIS_Msk (0xfUL) /*!< HRPWM0_CSG1 DCI: SVIS (Bitfield-Mask: 0x0f) */ +#define HRPWM0_CSG1_DCI_STRIS_Pos (4UL) /*!< HRPWM0_CSG1 DCI: STRIS (Bit 4) */ +#define HRPWM0_CSG1_DCI_STRIS_Msk (0xf0UL) /*!< HRPWM0_CSG1 DCI: STRIS (Bitfield-Mask: 0x0f) */ +#define HRPWM0_CSG1_DCI_STPIS_Pos (8UL) /*!< HRPWM0_CSG1 DCI: STPIS (Bit 8) */ +#define HRPWM0_CSG1_DCI_STPIS_Msk (0xf00UL) /*!< HRPWM0_CSG1 DCI: STPIS (Bitfield-Mask: 0x0f) */ +#define HRPWM0_CSG1_DCI_TRGIS_Pos (12UL) /*!< HRPWM0_CSG1 DCI: TRGIS (Bit 12) */ +#define HRPWM0_CSG1_DCI_TRGIS_Msk (0xf000UL) /*!< HRPWM0_CSG1 DCI: TRGIS (Bitfield-Mask: 0x0f) */ +#define HRPWM0_CSG1_DCI_STIS_Pos (16UL) /*!< HRPWM0_CSG1 DCI: STIS (Bit 16) */ +#define HRPWM0_CSG1_DCI_STIS_Msk (0xf0000UL) /*!< HRPWM0_CSG1 DCI: STIS (Bitfield-Mask: 0x0f) */ +#define HRPWM0_CSG1_DCI_SCS_Pos (20UL) /*!< HRPWM0_CSG1 DCI: SCS (Bit 20) */ +#define HRPWM0_CSG1_DCI_SCS_Msk (0x300000UL) /*!< HRPWM0_CSG1 DCI: SCS (Bitfield-Mask: 0x03) */ + +/* ------------------------------- HRPWM0_CSG1_IES ------------------------------ */ +#define HRPWM0_CSG1_IES_SVLS_Pos (0UL) /*!< HRPWM0_CSG1 IES: SVLS (Bit 0) */ +#define HRPWM0_CSG1_IES_SVLS_Msk (0x3UL) /*!< HRPWM0_CSG1 IES: SVLS (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG1_IES_STRES_Pos (2UL) /*!< HRPWM0_CSG1 IES: STRES (Bit 2) */ +#define HRPWM0_CSG1_IES_STRES_Msk (0xcUL) /*!< HRPWM0_CSG1 IES: STRES (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG1_IES_STPES_Pos (4UL) /*!< HRPWM0_CSG1 IES: STPES (Bit 4) */ +#define HRPWM0_CSG1_IES_STPES_Msk (0x30UL) /*!< HRPWM0_CSG1 IES: STPES (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG1_IES_TRGES_Pos (6UL) /*!< HRPWM0_CSG1 IES: TRGES (Bit 6) */ +#define HRPWM0_CSG1_IES_TRGES_Msk (0xc0UL) /*!< HRPWM0_CSG1 IES: TRGES (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG1_IES_STES_Pos (8UL) /*!< HRPWM0_CSG1 IES: STES (Bit 8) */ +#define HRPWM0_CSG1_IES_STES_Msk (0x300UL) /*!< HRPWM0_CSG1 IES: STES (Bitfield-Mask: 0x03) */ + +/* ------------------------------- HRPWM0_CSG1_SC ------------------------------- */ +#define HRPWM0_CSG1_SC_PSRM_Pos (0UL) /*!< HRPWM0_CSG1 SC: PSRM (Bit 0) */ +#define HRPWM0_CSG1_SC_PSRM_Msk (0x3UL) /*!< HRPWM0_CSG1 SC: PSRM (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG1_SC_PSTM_Pos (2UL) /*!< HRPWM0_CSG1 SC: PSTM (Bit 2) */ +#define HRPWM0_CSG1_SC_PSTM_Msk (0xcUL) /*!< HRPWM0_CSG1 SC: PSTM (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG1_SC_FPD_Pos (4UL) /*!< HRPWM0_CSG1 SC: FPD (Bit 4) */ +#define HRPWM0_CSG1_SC_FPD_Msk (0x10UL) /*!< HRPWM0_CSG1 SC: FPD (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG1_SC_PSV_Pos (5UL) /*!< HRPWM0_CSG1 SC: PSV (Bit 5) */ +#define HRPWM0_CSG1_SC_PSV_Msk (0x60UL) /*!< HRPWM0_CSG1 SC: PSV (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG1_SC_SCM_Pos (8UL) /*!< HRPWM0_CSG1 SC: SCM (Bit 8) */ +#define HRPWM0_CSG1_SC_SCM_Msk (0x300UL) /*!< HRPWM0_CSG1 SC: SCM (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG1_SC_SSRM_Pos (10UL) /*!< HRPWM0_CSG1 SC: SSRM (Bit 10) */ +#define HRPWM0_CSG1_SC_SSRM_Msk (0xc00UL) /*!< HRPWM0_CSG1 SC: SSRM (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG1_SC_SSTM_Pos (12UL) /*!< HRPWM0_CSG1 SC: SSTM (Bit 12) */ +#define HRPWM0_CSG1_SC_SSTM_Msk (0x3000UL) /*!< HRPWM0_CSG1 SC: SSTM (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG1_SC_SVSC_Pos (14UL) /*!< HRPWM0_CSG1 SC: SVSC (Bit 14) */ +#define HRPWM0_CSG1_SC_SVSC_Msk (0xc000UL) /*!< HRPWM0_CSG1 SC: SVSC (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG1_SC_SWSM_Pos (16UL) /*!< HRPWM0_CSG1 SC: SWSM (Bit 16) */ +#define HRPWM0_CSG1_SC_SWSM_Msk (0x30000UL) /*!< HRPWM0_CSG1 SC: SWSM (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG1_SC_GCFG_Pos (18UL) /*!< HRPWM0_CSG1 SC: GCFG (Bit 18) */ +#define HRPWM0_CSG1_SC_GCFG_Msk (0xc0000UL) /*!< HRPWM0_CSG1 SC: GCFG (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG1_SC_IST_Pos (20UL) /*!< HRPWM0_CSG1 SC: IST (Bit 20) */ +#define HRPWM0_CSG1_SC_IST_Msk (0x100000UL) /*!< HRPWM0_CSG1 SC: IST (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG1_SC_PSE_Pos (21UL) /*!< HRPWM0_CSG1 SC: PSE (Bit 21) */ +#define HRPWM0_CSG1_SC_PSE_Msk (0x200000UL) /*!< HRPWM0_CSG1 SC: PSE (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG1_SC_PSWM_Pos (24UL) /*!< HRPWM0_CSG1 SC: PSWM (Bit 24) */ +#define HRPWM0_CSG1_SC_PSWM_Msk (0x3000000UL) /*!< HRPWM0_CSG1 SC: PSWM (Bitfield-Mask: 0x03) */ + +/* ------------------------------- HRPWM0_CSG1_PC ------------------------------- */ +#define HRPWM0_CSG1_PC_PSWV_Pos (0UL) /*!< HRPWM0_CSG1 PC: PSWV (Bit 0) */ +#define HRPWM0_CSG1_PC_PSWV_Msk (0x3fUL) /*!< HRPWM0_CSG1 PC: PSWV (Bitfield-Mask: 0x3f) */ + +/* ------------------------------ HRPWM0_CSG1_DSV1 ------------------------------ */ +#define HRPWM0_CSG1_DSV1_DSV1_Pos (0UL) /*!< HRPWM0_CSG1 DSV1: DSV1 (Bit 0) */ +#define HRPWM0_CSG1_DSV1_DSV1_Msk (0x3ffUL) /*!< HRPWM0_CSG1 DSV1: DSV1 (Bitfield-Mask: 0x3ff) */ + +/* ------------------------------ HRPWM0_CSG1_DSV2 ------------------------------ */ +#define HRPWM0_CSG1_DSV2_DSV2_Pos (0UL) /*!< HRPWM0_CSG1 DSV2: DSV2 (Bit 0) */ +#define HRPWM0_CSG1_DSV2_DSV2_Msk (0x3ffUL) /*!< HRPWM0_CSG1 DSV2: DSV2 (Bitfield-Mask: 0x3ff) */ + +/* ------------------------------ HRPWM0_CSG1_SDSV1 ----------------------------- */ +#define HRPWM0_CSG1_SDSV1_SDSV1_Pos (0UL) /*!< HRPWM0_CSG1 SDSV1: SDSV1 (Bit 0) */ +#define HRPWM0_CSG1_SDSV1_SDSV1_Msk (0x3ffUL) /*!< HRPWM0_CSG1 SDSV1: SDSV1 (Bitfield-Mask: 0x3ff) */ + +/* ------------------------------- HRPWM0_CSG1_SPC ------------------------------ */ +#define HRPWM0_CSG1_SPC_SPSWV_Pos (0UL) /*!< HRPWM0_CSG1 SPC: SPSWV (Bit 0) */ +#define HRPWM0_CSG1_SPC_SPSWV_Msk (0x3fUL) /*!< HRPWM0_CSG1 SPC: SPSWV (Bitfield-Mask: 0x3f) */ + +/* ------------------------------- HRPWM0_CSG1_CC ------------------------------- */ +#define HRPWM0_CSG1_CC_IBS_Pos (0UL) /*!< HRPWM0_CSG1 CC: IBS (Bit 0) */ +#define HRPWM0_CSG1_CC_IBS_Msk (0xfUL) /*!< HRPWM0_CSG1 CC: IBS (Bitfield-Mask: 0x0f) */ +#define HRPWM0_CSG1_CC_IMCS_Pos (8UL) /*!< HRPWM0_CSG1 CC: IMCS (Bit 8) */ +#define HRPWM0_CSG1_CC_IMCS_Msk (0x100UL) /*!< HRPWM0_CSG1 CC: IMCS (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG1_CC_IMCC_Pos (9UL) /*!< HRPWM0_CSG1 CC: IMCC (Bit 9) */ +#define HRPWM0_CSG1_CC_IMCC_Msk (0x600UL) /*!< HRPWM0_CSG1 CC: IMCC (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG1_CC_ESE_Pos (11UL) /*!< HRPWM0_CSG1 CC: ESE (Bit 11) */ +#define HRPWM0_CSG1_CC_ESE_Msk (0x800UL) /*!< HRPWM0_CSG1 CC: ESE (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG1_CC_OIE_Pos (12UL) /*!< HRPWM0_CSG1 CC: OIE (Bit 12) */ +#define HRPWM0_CSG1_CC_OIE_Msk (0x1000UL) /*!< HRPWM0_CSG1 CC: OIE (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG1_CC_OSE_Pos (13UL) /*!< HRPWM0_CSG1 CC: OSE (Bit 13) */ +#define HRPWM0_CSG1_CC_OSE_Msk (0x2000UL) /*!< HRPWM0_CSG1 CC: OSE (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG1_CC_BLMC_Pos (14UL) /*!< HRPWM0_CSG1 CC: BLMC (Bit 14) */ +#define HRPWM0_CSG1_CC_BLMC_Msk (0xc000UL) /*!< HRPWM0_CSG1 CC: BLMC (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG1_CC_EBE_Pos (16UL) /*!< HRPWM0_CSG1 CC: EBE (Bit 16) */ +#define HRPWM0_CSG1_CC_EBE_Msk (0x10000UL) /*!< HRPWM0_CSG1 CC: EBE (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG1_CC_COFE_Pos (17UL) /*!< HRPWM0_CSG1 CC: COFE (Bit 17) */ +#define HRPWM0_CSG1_CC_COFE_Msk (0x20000UL) /*!< HRPWM0_CSG1 CC: COFE (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG1_CC_COFM_Pos (18UL) /*!< HRPWM0_CSG1 CC: COFM (Bit 18) */ +#define HRPWM0_CSG1_CC_COFM_Msk (0x3c0000UL) /*!< HRPWM0_CSG1 CC: COFM (Bitfield-Mask: 0x0f) */ +#define HRPWM0_CSG1_CC_COFC_Pos (24UL) /*!< HRPWM0_CSG1 CC: COFC (Bit 24) */ +#define HRPWM0_CSG1_CC_COFC_Msk (0x3000000UL) /*!< HRPWM0_CSG1 CC: COFC (Bitfield-Mask: 0x03) */ + +/* ------------------------------- HRPWM0_CSG1_PLC ------------------------------ */ +#define HRPWM0_CSG1_PLC_IPLS_Pos (0UL) /*!< HRPWM0_CSG1 PLC: IPLS (Bit 0) */ +#define HRPWM0_CSG1_PLC_IPLS_Msk (0xfUL) /*!< HRPWM0_CSG1 PLC: IPLS (Bitfield-Mask: 0x0f) */ +#define HRPWM0_CSG1_PLC_PLCL_Pos (8UL) /*!< HRPWM0_CSG1 PLC: PLCL (Bit 8) */ +#define HRPWM0_CSG1_PLC_PLCL_Msk (0x300UL) /*!< HRPWM0_CSG1 PLC: PLCL (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG1_PLC_PSL_Pos (10UL) /*!< HRPWM0_CSG1 PLC: PSL (Bit 10) */ +#define HRPWM0_CSG1_PLC_PSL_Msk (0x400UL) /*!< HRPWM0_CSG1 PLC: PSL (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG1_PLC_PLSW_Pos (11UL) /*!< HRPWM0_CSG1 PLC: PLSW (Bit 11) */ +#define HRPWM0_CSG1_PLC_PLSW_Msk (0x800UL) /*!< HRPWM0_CSG1 PLC: PLSW (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG1_PLC_PLEC_Pos (12UL) /*!< HRPWM0_CSG1 PLC: PLEC (Bit 12) */ +#define HRPWM0_CSG1_PLC_PLEC_Msk (0x3000UL) /*!< HRPWM0_CSG1 PLC: PLEC (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG1_PLC_PLXC_Pos (14UL) /*!< HRPWM0_CSG1 PLC: PLXC (Bit 14) */ +#define HRPWM0_CSG1_PLC_PLXC_Msk (0xc000UL) /*!< HRPWM0_CSG1 PLC: PLXC (Bitfield-Mask: 0x03) */ + +/* ------------------------------- HRPWM0_CSG1_BLV ------------------------------ */ +#define HRPWM0_CSG1_BLV_BLV_Pos (0UL) /*!< HRPWM0_CSG1 BLV: BLV (Bit 0) */ +#define HRPWM0_CSG1_BLV_BLV_Msk (0xffUL) /*!< HRPWM0_CSG1 BLV: BLV (Bitfield-Mask: 0xff) */ + +/* ------------------------------- HRPWM0_CSG1_SRE ------------------------------ */ +#define HRPWM0_CSG1_SRE_VLS1E_Pos (0UL) /*!< HRPWM0_CSG1 SRE: VLS1E (Bit 0) */ +#define HRPWM0_CSG1_SRE_VLS1E_Msk (0x1UL) /*!< HRPWM0_CSG1 SRE: VLS1E (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG1_SRE_VLS2E_Pos (1UL) /*!< HRPWM0_CSG1 SRE: VLS2E (Bit 1) */ +#define HRPWM0_CSG1_SRE_VLS2E_Msk (0x2UL) /*!< HRPWM0_CSG1 SRE: VLS2E (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG1_SRE_TRGSE_Pos (2UL) /*!< HRPWM0_CSG1 SRE: TRGSE (Bit 2) */ +#define HRPWM0_CSG1_SRE_TRGSE_Msk (0x4UL) /*!< HRPWM0_CSG1 SRE: TRGSE (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG1_SRE_STRSE_Pos (3UL) /*!< HRPWM0_CSG1 SRE: STRSE (Bit 3) */ +#define HRPWM0_CSG1_SRE_STRSE_Msk (0x8UL) /*!< HRPWM0_CSG1 SRE: STRSE (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG1_SRE_STPSE_Pos (4UL) /*!< HRPWM0_CSG1 SRE: STPSE (Bit 4) */ +#define HRPWM0_CSG1_SRE_STPSE_Msk (0x10UL) /*!< HRPWM0_CSG1 SRE: STPSE (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG1_SRE_STDE_Pos (5UL) /*!< HRPWM0_CSG1 SRE: STDE (Bit 5) */ +#define HRPWM0_CSG1_SRE_STDE_Msk (0x20UL) /*!< HRPWM0_CSG1 SRE: STDE (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG1_SRE_CRSE_Pos (6UL) /*!< HRPWM0_CSG1 SRE: CRSE (Bit 6) */ +#define HRPWM0_CSG1_SRE_CRSE_Msk (0x40UL) /*!< HRPWM0_CSG1 SRE: CRSE (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG1_SRE_CFSE_Pos (7UL) /*!< HRPWM0_CSG1 SRE: CFSE (Bit 7) */ +#define HRPWM0_CSG1_SRE_CFSE_Msk (0x80UL) /*!< HRPWM0_CSG1 SRE: CFSE (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG1_SRE_CSEE_Pos (8UL) /*!< HRPWM0_CSG1 SRE: CSEE (Bit 8) */ +#define HRPWM0_CSG1_SRE_CSEE_Msk (0x100UL) /*!< HRPWM0_CSG1 SRE: CSEE (Bitfield-Mask: 0x01) */ + +/* ------------------------------- HRPWM0_CSG1_SRS ------------------------------ */ +#define HRPWM0_CSG1_SRS_VLS1S_Pos (0UL) /*!< HRPWM0_CSG1 SRS: VLS1S (Bit 0) */ +#define HRPWM0_CSG1_SRS_VLS1S_Msk (0x3UL) /*!< HRPWM0_CSG1 SRS: VLS1S (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG1_SRS_VLS2S_Pos (2UL) /*!< HRPWM0_CSG1 SRS: VLS2S (Bit 2) */ +#define HRPWM0_CSG1_SRS_VLS2S_Msk (0xcUL) /*!< HRPWM0_CSG1 SRS: VLS2S (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG1_SRS_TRLS_Pos (4UL) /*!< HRPWM0_CSG1 SRS: TRLS (Bit 4) */ +#define HRPWM0_CSG1_SRS_TRLS_Msk (0x30UL) /*!< HRPWM0_CSG1 SRS: TRLS (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG1_SRS_SSLS_Pos (6UL) /*!< HRPWM0_CSG1 SRS: SSLS (Bit 6) */ +#define HRPWM0_CSG1_SRS_SSLS_Msk (0xc0UL) /*!< HRPWM0_CSG1 SRS: SSLS (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG1_SRS_STLS_Pos (8UL) /*!< HRPWM0_CSG1 SRS: STLS (Bit 8) */ +#define HRPWM0_CSG1_SRS_STLS_Msk (0x300UL) /*!< HRPWM0_CSG1 SRS: STLS (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG1_SRS_CRFLS_Pos (10UL) /*!< HRPWM0_CSG1 SRS: CRFLS (Bit 10) */ +#define HRPWM0_CSG1_SRS_CRFLS_Msk (0xc00UL) /*!< HRPWM0_CSG1 SRS: CRFLS (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG1_SRS_CSLS_Pos (12UL) /*!< HRPWM0_CSG1 SRS: CSLS (Bit 12) */ +#define HRPWM0_CSG1_SRS_CSLS_Msk (0x3000UL) /*!< HRPWM0_CSG1 SRS: CSLS (Bitfield-Mask: 0x03) */ + +/* ------------------------------- HRPWM0_CSG1_SWS ------------------------------ */ +#define HRPWM0_CSG1_SWS_SVLS1_Pos (0UL) /*!< HRPWM0_CSG1 SWS: SVLS1 (Bit 0) */ +#define HRPWM0_CSG1_SWS_SVLS1_Msk (0x1UL) /*!< HRPWM0_CSG1 SWS: SVLS1 (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG1_SWS_SVLS2_Pos (1UL) /*!< HRPWM0_CSG1 SWS: SVLS2 (Bit 1) */ +#define HRPWM0_CSG1_SWS_SVLS2_Msk (0x2UL) /*!< HRPWM0_CSG1 SWS: SVLS2 (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG1_SWS_STRGS_Pos (2UL) /*!< HRPWM0_CSG1 SWS: STRGS (Bit 2) */ +#define HRPWM0_CSG1_SWS_STRGS_Msk (0x4UL) /*!< HRPWM0_CSG1 SWS: STRGS (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG1_SWS_SSTRS_Pos (3UL) /*!< HRPWM0_CSG1 SWS: SSTRS (Bit 3) */ +#define HRPWM0_CSG1_SWS_SSTRS_Msk (0x8UL) /*!< HRPWM0_CSG1 SWS: SSTRS (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG1_SWS_SSTPS_Pos (4UL) /*!< HRPWM0_CSG1 SWS: SSTPS (Bit 4) */ +#define HRPWM0_CSG1_SWS_SSTPS_Msk (0x10UL) /*!< HRPWM0_CSG1 SWS: SSTPS (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG1_SWS_SSTD_Pos (5UL) /*!< HRPWM0_CSG1 SWS: SSTD (Bit 5) */ +#define HRPWM0_CSG1_SWS_SSTD_Msk (0x20UL) /*!< HRPWM0_CSG1 SWS: SSTD (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG1_SWS_SCRS_Pos (6UL) /*!< HRPWM0_CSG1 SWS: SCRS (Bit 6) */ +#define HRPWM0_CSG1_SWS_SCRS_Msk (0x40UL) /*!< HRPWM0_CSG1 SWS: SCRS (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG1_SWS_SCFS_Pos (7UL) /*!< HRPWM0_CSG1 SWS: SCFS (Bit 7) */ +#define HRPWM0_CSG1_SWS_SCFS_Msk (0x80UL) /*!< HRPWM0_CSG1 SWS: SCFS (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG1_SWS_SCSS_Pos (8UL) /*!< HRPWM0_CSG1 SWS: SCSS (Bit 8) */ +#define HRPWM0_CSG1_SWS_SCSS_Msk (0x100UL) /*!< HRPWM0_CSG1 SWS: SCSS (Bitfield-Mask: 0x01) */ + +/* ------------------------------- HRPWM0_CSG1_SWC ------------------------------ */ +#define HRPWM0_CSG1_SWC_CVLS1_Pos (0UL) /*!< HRPWM0_CSG1 SWC: CVLS1 (Bit 0) */ +#define HRPWM0_CSG1_SWC_CVLS1_Msk (0x1UL) /*!< HRPWM0_CSG1 SWC: CVLS1 (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG1_SWC_CVLS2_Pos (1UL) /*!< HRPWM0_CSG1 SWC: CVLS2 (Bit 1) */ +#define HRPWM0_CSG1_SWC_CVLS2_Msk (0x2UL) /*!< HRPWM0_CSG1 SWC: CVLS2 (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG1_SWC_CTRGS_Pos (2UL) /*!< HRPWM0_CSG1 SWC: CTRGS (Bit 2) */ +#define HRPWM0_CSG1_SWC_CTRGS_Msk (0x4UL) /*!< HRPWM0_CSG1 SWC: CTRGS (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG1_SWC_CSTRS_Pos (3UL) /*!< HRPWM0_CSG1 SWC: CSTRS (Bit 3) */ +#define HRPWM0_CSG1_SWC_CSTRS_Msk (0x8UL) /*!< HRPWM0_CSG1 SWC: CSTRS (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG1_SWC_CSTPS_Pos (4UL) /*!< HRPWM0_CSG1 SWC: CSTPS (Bit 4) */ +#define HRPWM0_CSG1_SWC_CSTPS_Msk (0x10UL) /*!< HRPWM0_CSG1 SWC: CSTPS (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG1_SWC_CSTD_Pos (5UL) /*!< HRPWM0_CSG1 SWC: CSTD (Bit 5) */ +#define HRPWM0_CSG1_SWC_CSTD_Msk (0x20UL) /*!< HRPWM0_CSG1 SWC: CSTD (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG1_SWC_CCRS_Pos (6UL) /*!< HRPWM0_CSG1 SWC: CCRS (Bit 6) */ +#define HRPWM0_CSG1_SWC_CCRS_Msk (0x40UL) /*!< HRPWM0_CSG1 SWC: CCRS (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG1_SWC_CCFS_Pos (7UL) /*!< HRPWM0_CSG1 SWC: CCFS (Bit 7) */ +#define HRPWM0_CSG1_SWC_CCFS_Msk (0x80UL) /*!< HRPWM0_CSG1 SWC: CCFS (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG1_SWC_CCSS_Pos (8UL) /*!< HRPWM0_CSG1 SWC: CCSS (Bit 8) */ +#define HRPWM0_CSG1_SWC_CCSS_Msk (0x100UL) /*!< HRPWM0_CSG1 SWC: CCSS (Bitfield-Mask: 0x01) */ + +/* ------------------------------ HRPWM0_CSG1_ISTAT ----------------------------- */ +#define HRPWM0_CSG1_ISTAT_VLS1S_Pos (0UL) /*!< HRPWM0_CSG1 ISTAT: VLS1S (Bit 0) */ +#define HRPWM0_CSG1_ISTAT_VLS1S_Msk (0x1UL) /*!< HRPWM0_CSG1 ISTAT: VLS1S (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG1_ISTAT_VLS2S_Pos (1UL) /*!< HRPWM0_CSG1 ISTAT: VLS2S (Bit 1) */ +#define HRPWM0_CSG1_ISTAT_VLS2S_Msk (0x2UL) /*!< HRPWM0_CSG1 ISTAT: VLS2S (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG1_ISTAT_TRGSS_Pos (2UL) /*!< HRPWM0_CSG1 ISTAT: TRGSS (Bit 2) */ +#define HRPWM0_CSG1_ISTAT_TRGSS_Msk (0x4UL) /*!< HRPWM0_CSG1 ISTAT: TRGSS (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG1_ISTAT_STRSS_Pos (3UL) /*!< HRPWM0_CSG1 ISTAT: STRSS (Bit 3) */ +#define HRPWM0_CSG1_ISTAT_STRSS_Msk (0x8UL) /*!< HRPWM0_CSG1 ISTAT: STRSS (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG1_ISTAT_STPSS_Pos (4UL) /*!< HRPWM0_CSG1 ISTAT: STPSS (Bit 4) */ +#define HRPWM0_CSG1_ISTAT_STPSS_Msk (0x10UL) /*!< HRPWM0_CSG1 ISTAT: STPSS (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG1_ISTAT_STDS_Pos (5UL) /*!< HRPWM0_CSG1 ISTAT: STDS (Bit 5) */ +#define HRPWM0_CSG1_ISTAT_STDS_Msk (0x20UL) /*!< HRPWM0_CSG1 ISTAT: STDS (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG1_ISTAT_CRSS_Pos (6UL) /*!< HRPWM0_CSG1 ISTAT: CRSS (Bit 6) */ +#define HRPWM0_CSG1_ISTAT_CRSS_Msk (0x40UL) /*!< HRPWM0_CSG1 ISTAT: CRSS (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG1_ISTAT_CFSS_Pos (7UL) /*!< HRPWM0_CSG1 ISTAT: CFSS (Bit 7) */ +#define HRPWM0_CSG1_ISTAT_CFSS_Msk (0x80UL) /*!< HRPWM0_CSG1 ISTAT: CFSS (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG1_ISTAT_CSES_Pos (8UL) /*!< HRPWM0_CSG1 ISTAT: CSES (Bit 8) */ +#define HRPWM0_CSG1_ISTAT_CSES_Msk (0x100UL) /*!< HRPWM0_CSG1 ISTAT: CSES (Bitfield-Mask: 0x01) */ + + +/* ================================================================================ */ +/* ================ struct 'HRPWM0_CSG2' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ------------------------------- HRPWM0_CSG2_DCI ------------------------------ */ +#define HRPWM0_CSG2_DCI_SVIS_Pos (0UL) /*!< HRPWM0_CSG2 DCI: SVIS (Bit 0) */ +#define HRPWM0_CSG2_DCI_SVIS_Msk (0xfUL) /*!< HRPWM0_CSG2 DCI: SVIS (Bitfield-Mask: 0x0f) */ +#define HRPWM0_CSG2_DCI_STRIS_Pos (4UL) /*!< HRPWM0_CSG2 DCI: STRIS (Bit 4) */ +#define HRPWM0_CSG2_DCI_STRIS_Msk (0xf0UL) /*!< HRPWM0_CSG2 DCI: STRIS (Bitfield-Mask: 0x0f) */ +#define HRPWM0_CSG2_DCI_STPIS_Pos (8UL) /*!< HRPWM0_CSG2 DCI: STPIS (Bit 8) */ +#define HRPWM0_CSG2_DCI_STPIS_Msk (0xf00UL) /*!< HRPWM0_CSG2 DCI: STPIS (Bitfield-Mask: 0x0f) */ +#define HRPWM0_CSG2_DCI_TRGIS_Pos (12UL) /*!< HRPWM0_CSG2 DCI: TRGIS (Bit 12) */ +#define HRPWM0_CSG2_DCI_TRGIS_Msk (0xf000UL) /*!< HRPWM0_CSG2 DCI: TRGIS (Bitfield-Mask: 0x0f) */ +#define HRPWM0_CSG2_DCI_STIS_Pos (16UL) /*!< HRPWM0_CSG2 DCI: STIS (Bit 16) */ +#define HRPWM0_CSG2_DCI_STIS_Msk (0xf0000UL) /*!< HRPWM0_CSG2 DCI: STIS (Bitfield-Mask: 0x0f) */ +#define HRPWM0_CSG2_DCI_SCS_Pos (20UL) /*!< HRPWM0_CSG2 DCI: SCS (Bit 20) */ +#define HRPWM0_CSG2_DCI_SCS_Msk (0x300000UL) /*!< HRPWM0_CSG2 DCI: SCS (Bitfield-Mask: 0x03) */ + +/* ------------------------------- HRPWM0_CSG2_IES ------------------------------ */ +#define HRPWM0_CSG2_IES_SVLS_Pos (0UL) /*!< HRPWM0_CSG2 IES: SVLS (Bit 0) */ +#define HRPWM0_CSG2_IES_SVLS_Msk (0x3UL) /*!< HRPWM0_CSG2 IES: SVLS (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG2_IES_STRES_Pos (2UL) /*!< HRPWM0_CSG2 IES: STRES (Bit 2) */ +#define HRPWM0_CSG2_IES_STRES_Msk (0xcUL) /*!< HRPWM0_CSG2 IES: STRES (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG2_IES_STPES_Pos (4UL) /*!< HRPWM0_CSG2 IES: STPES (Bit 4) */ +#define HRPWM0_CSG2_IES_STPES_Msk (0x30UL) /*!< HRPWM0_CSG2 IES: STPES (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG2_IES_TRGES_Pos (6UL) /*!< HRPWM0_CSG2 IES: TRGES (Bit 6) */ +#define HRPWM0_CSG2_IES_TRGES_Msk (0xc0UL) /*!< HRPWM0_CSG2 IES: TRGES (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG2_IES_STES_Pos (8UL) /*!< HRPWM0_CSG2 IES: STES (Bit 8) */ +#define HRPWM0_CSG2_IES_STES_Msk (0x300UL) /*!< HRPWM0_CSG2 IES: STES (Bitfield-Mask: 0x03) */ + +/* ------------------------------- HRPWM0_CSG2_SC ------------------------------- */ +#define HRPWM0_CSG2_SC_PSRM_Pos (0UL) /*!< HRPWM0_CSG2 SC: PSRM (Bit 0) */ +#define HRPWM0_CSG2_SC_PSRM_Msk (0x3UL) /*!< HRPWM0_CSG2 SC: PSRM (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG2_SC_PSTM_Pos (2UL) /*!< HRPWM0_CSG2 SC: PSTM (Bit 2) */ +#define HRPWM0_CSG2_SC_PSTM_Msk (0xcUL) /*!< HRPWM0_CSG2 SC: PSTM (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG2_SC_FPD_Pos (4UL) /*!< HRPWM0_CSG2 SC: FPD (Bit 4) */ +#define HRPWM0_CSG2_SC_FPD_Msk (0x10UL) /*!< HRPWM0_CSG2 SC: FPD (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG2_SC_PSV_Pos (5UL) /*!< HRPWM0_CSG2 SC: PSV (Bit 5) */ +#define HRPWM0_CSG2_SC_PSV_Msk (0x60UL) /*!< HRPWM0_CSG2 SC: PSV (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG2_SC_SCM_Pos (8UL) /*!< HRPWM0_CSG2 SC: SCM (Bit 8) */ +#define HRPWM0_CSG2_SC_SCM_Msk (0x300UL) /*!< HRPWM0_CSG2 SC: SCM (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG2_SC_SSRM_Pos (10UL) /*!< HRPWM0_CSG2 SC: SSRM (Bit 10) */ +#define HRPWM0_CSG2_SC_SSRM_Msk (0xc00UL) /*!< HRPWM0_CSG2 SC: SSRM (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG2_SC_SSTM_Pos (12UL) /*!< HRPWM0_CSG2 SC: SSTM (Bit 12) */ +#define HRPWM0_CSG2_SC_SSTM_Msk (0x3000UL) /*!< HRPWM0_CSG2 SC: SSTM (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG2_SC_SVSC_Pos (14UL) /*!< HRPWM0_CSG2 SC: SVSC (Bit 14) */ +#define HRPWM0_CSG2_SC_SVSC_Msk (0xc000UL) /*!< HRPWM0_CSG2 SC: SVSC (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG2_SC_SWSM_Pos (16UL) /*!< HRPWM0_CSG2 SC: SWSM (Bit 16) */ +#define HRPWM0_CSG2_SC_SWSM_Msk (0x30000UL) /*!< HRPWM0_CSG2 SC: SWSM (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG2_SC_GCFG_Pos (18UL) /*!< HRPWM0_CSG2 SC: GCFG (Bit 18) */ +#define HRPWM0_CSG2_SC_GCFG_Msk (0xc0000UL) /*!< HRPWM0_CSG2 SC: GCFG (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG2_SC_IST_Pos (20UL) /*!< HRPWM0_CSG2 SC: IST (Bit 20) */ +#define HRPWM0_CSG2_SC_IST_Msk (0x100000UL) /*!< HRPWM0_CSG2 SC: IST (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG2_SC_PSE_Pos (21UL) /*!< HRPWM0_CSG2 SC: PSE (Bit 21) */ +#define HRPWM0_CSG2_SC_PSE_Msk (0x200000UL) /*!< HRPWM0_CSG2 SC: PSE (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG2_SC_PSWM_Pos (24UL) /*!< HRPWM0_CSG2 SC: PSWM (Bit 24) */ +#define HRPWM0_CSG2_SC_PSWM_Msk (0x3000000UL) /*!< HRPWM0_CSG2 SC: PSWM (Bitfield-Mask: 0x03) */ + +/* ------------------------------- HRPWM0_CSG2_PC ------------------------------- */ +#define HRPWM0_CSG2_PC_PSWV_Pos (0UL) /*!< HRPWM0_CSG2 PC: PSWV (Bit 0) */ +#define HRPWM0_CSG2_PC_PSWV_Msk (0x3fUL) /*!< HRPWM0_CSG2 PC: PSWV (Bitfield-Mask: 0x3f) */ + +/* ------------------------------ HRPWM0_CSG2_DSV1 ------------------------------ */ +#define HRPWM0_CSG2_DSV1_DSV1_Pos (0UL) /*!< HRPWM0_CSG2 DSV1: DSV1 (Bit 0) */ +#define HRPWM0_CSG2_DSV1_DSV1_Msk (0x3ffUL) /*!< HRPWM0_CSG2 DSV1: DSV1 (Bitfield-Mask: 0x3ff) */ + +/* ------------------------------ HRPWM0_CSG2_DSV2 ------------------------------ */ +#define HRPWM0_CSG2_DSV2_DSV2_Pos (0UL) /*!< HRPWM0_CSG2 DSV2: DSV2 (Bit 0) */ +#define HRPWM0_CSG2_DSV2_DSV2_Msk (0x3ffUL) /*!< HRPWM0_CSG2 DSV2: DSV2 (Bitfield-Mask: 0x3ff) */ + +/* ------------------------------ HRPWM0_CSG2_SDSV1 ----------------------------- */ +#define HRPWM0_CSG2_SDSV1_SDSV1_Pos (0UL) /*!< HRPWM0_CSG2 SDSV1: SDSV1 (Bit 0) */ +#define HRPWM0_CSG2_SDSV1_SDSV1_Msk (0x3ffUL) /*!< HRPWM0_CSG2 SDSV1: SDSV1 (Bitfield-Mask: 0x3ff) */ + +/* ------------------------------- HRPWM0_CSG2_SPC ------------------------------ */ +#define HRPWM0_CSG2_SPC_SPSWV_Pos (0UL) /*!< HRPWM0_CSG2 SPC: SPSWV (Bit 0) */ +#define HRPWM0_CSG2_SPC_SPSWV_Msk (0x3fUL) /*!< HRPWM0_CSG2 SPC: SPSWV (Bitfield-Mask: 0x3f) */ + +/* ------------------------------- HRPWM0_CSG2_CC ------------------------------- */ +#define HRPWM0_CSG2_CC_IBS_Pos (0UL) /*!< HRPWM0_CSG2 CC: IBS (Bit 0) */ +#define HRPWM0_CSG2_CC_IBS_Msk (0xfUL) /*!< HRPWM0_CSG2 CC: IBS (Bitfield-Mask: 0x0f) */ +#define HRPWM0_CSG2_CC_IMCS_Pos (8UL) /*!< HRPWM0_CSG2 CC: IMCS (Bit 8) */ +#define HRPWM0_CSG2_CC_IMCS_Msk (0x100UL) /*!< HRPWM0_CSG2 CC: IMCS (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG2_CC_IMCC_Pos (9UL) /*!< HRPWM0_CSG2 CC: IMCC (Bit 9) */ +#define HRPWM0_CSG2_CC_IMCC_Msk (0x600UL) /*!< HRPWM0_CSG2 CC: IMCC (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG2_CC_ESE_Pos (11UL) /*!< HRPWM0_CSG2 CC: ESE (Bit 11) */ +#define HRPWM0_CSG2_CC_ESE_Msk (0x800UL) /*!< HRPWM0_CSG2 CC: ESE (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG2_CC_OIE_Pos (12UL) /*!< HRPWM0_CSG2 CC: OIE (Bit 12) */ +#define HRPWM0_CSG2_CC_OIE_Msk (0x1000UL) /*!< HRPWM0_CSG2 CC: OIE (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG2_CC_OSE_Pos (13UL) /*!< HRPWM0_CSG2 CC: OSE (Bit 13) */ +#define HRPWM0_CSG2_CC_OSE_Msk (0x2000UL) /*!< HRPWM0_CSG2 CC: OSE (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG2_CC_BLMC_Pos (14UL) /*!< HRPWM0_CSG2 CC: BLMC (Bit 14) */ +#define HRPWM0_CSG2_CC_BLMC_Msk (0xc000UL) /*!< HRPWM0_CSG2 CC: BLMC (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG2_CC_EBE_Pos (16UL) /*!< HRPWM0_CSG2 CC: EBE (Bit 16) */ +#define HRPWM0_CSG2_CC_EBE_Msk (0x10000UL) /*!< HRPWM0_CSG2 CC: EBE (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG2_CC_COFE_Pos (17UL) /*!< HRPWM0_CSG2 CC: COFE (Bit 17) */ +#define HRPWM0_CSG2_CC_COFE_Msk (0x20000UL) /*!< HRPWM0_CSG2 CC: COFE (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG2_CC_COFM_Pos (18UL) /*!< HRPWM0_CSG2 CC: COFM (Bit 18) */ +#define HRPWM0_CSG2_CC_COFM_Msk (0x3c0000UL) /*!< HRPWM0_CSG2 CC: COFM (Bitfield-Mask: 0x0f) */ +#define HRPWM0_CSG2_CC_COFC_Pos (24UL) /*!< HRPWM0_CSG2 CC: COFC (Bit 24) */ +#define HRPWM0_CSG2_CC_COFC_Msk (0x3000000UL) /*!< HRPWM0_CSG2 CC: COFC (Bitfield-Mask: 0x03) */ + +/* ------------------------------- HRPWM0_CSG2_PLC ------------------------------ */ +#define HRPWM0_CSG2_PLC_IPLS_Pos (0UL) /*!< HRPWM0_CSG2 PLC: IPLS (Bit 0) */ +#define HRPWM0_CSG2_PLC_IPLS_Msk (0xfUL) /*!< HRPWM0_CSG2 PLC: IPLS (Bitfield-Mask: 0x0f) */ +#define HRPWM0_CSG2_PLC_PLCL_Pos (8UL) /*!< HRPWM0_CSG2 PLC: PLCL (Bit 8) */ +#define HRPWM0_CSG2_PLC_PLCL_Msk (0x300UL) /*!< HRPWM0_CSG2 PLC: PLCL (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG2_PLC_PSL_Pos (10UL) /*!< HRPWM0_CSG2 PLC: PSL (Bit 10) */ +#define HRPWM0_CSG2_PLC_PSL_Msk (0x400UL) /*!< HRPWM0_CSG2 PLC: PSL (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG2_PLC_PLSW_Pos (11UL) /*!< HRPWM0_CSG2 PLC: PLSW (Bit 11) */ +#define HRPWM0_CSG2_PLC_PLSW_Msk (0x800UL) /*!< HRPWM0_CSG2 PLC: PLSW (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG2_PLC_PLEC_Pos (12UL) /*!< HRPWM0_CSG2 PLC: PLEC (Bit 12) */ +#define HRPWM0_CSG2_PLC_PLEC_Msk (0x3000UL) /*!< HRPWM0_CSG2 PLC: PLEC (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG2_PLC_PLXC_Pos (14UL) /*!< HRPWM0_CSG2 PLC: PLXC (Bit 14) */ +#define HRPWM0_CSG2_PLC_PLXC_Msk (0xc000UL) /*!< HRPWM0_CSG2 PLC: PLXC (Bitfield-Mask: 0x03) */ + +/* ------------------------------- HRPWM0_CSG2_BLV ------------------------------ */ +#define HRPWM0_CSG2_BLV_BLV_Pos (0UL) /*!< HRPWM0_CSG2 BLV: BLV (Bit 0) */ +#define HRPWM0_CSG2_BLV_BLV_Msk (0xffUL) /*!< HRPWM0_CSG2 BLV: BLV (Bitfield-Mask: 0xff) */ + +/* ------------------------------- HRPWM0_CSG2_SRE ------------------------------ */ +#define HRPWM0_CSG2_SRE_VLS1E_Pos (0UL) /*!< HRPWM0_CSG2 SRE: VLS1E (Bit 0) */ +#define HRPWM0_CSG2_SRE_VLS1E_Msk (0x1UL) /*!< HRPWM0_CSG2 SRE: VLS1E (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG2_SRE_VLS2E_Pos (1UL) /*!< HRPWM0_CSG2 SRE: VLS2E (Bit 1) */ +#define HRPWM0_CSG2_SRE_VLS2E_Msk (0x2UL) /*!< HRPWM0_CSG2 SRE: VLS2E (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG2_SRE_TRGSE_Pos (2UL) /*!< HRPWM0_CSG2 SRE: TRGSE (Bit 2) */ +#define HRPWM0_CSG2_SRE_TRGSE_Msk (0x4UL) /*!< HRPWM0_CSG2 SRE: TRGSE (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG2_SRE_STRSE_Pos (3UL) /*!< HRPWM0_CSG2 SRE: STRSE (Bit 3) */ +#define HRPWM0_CSG2_SRE_STRSE_Msk (0x8UL) /*!< HRPWM0_CSG2 SRE: STRSE (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG2_SRE_STPSE_Pos (4UL) /*!< HRPWM0_CSG2 SRE: STPSE (Bit 4) */ +#define HRPWM0_CSG2_SRE_STPSE_Msk (0x10UL) /*!< HRPWM0_CSG2 SRE: STPSE (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG2_SRE_STDE_Pos (5UL) /*!< HRPWM0_CSG2 SRE: STDE (Bit 5) */ +#define HRPWM0_CSG2_SRE_STDE_Msk (0x20UL) /*!< HRPWM0_CSG2 SRE: STDE (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG2_SRE_CRSE_Pos (6UL) /*!< HRPWM0_CSG2 SRE: CRSE (Bit 6) */ +#define HRPWM0_CSG2_SRE_CRSE_Msk (0x40UL) /*!< HRPWM0_CSG2 SRE: CRSE (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG2_SRE_CFSE_Pos (7UL) /*!< HRPWM0_CSG2 SRE: CFSE (Bit 7) */ +#define HRPWM0_CSG2_SRE_CFSE_Msk (0x80UL) /*!< HRPWM0_CSG2 SRE: CFSE (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG2_SRE_CSEE_Pos (8UL) /*!< HRPWM0_CSG2 SRE: CSEE (Bit 8) */ +#define HRPWM0_CSG2_SRE_CSEE_Msk (0x100UL) /*!< HRPWM0_CSG2 SRE: CSEE (Bitfield-Mask: 0x01) */ + +/* ------------------------------- HRPWM0_CSG2_SRS ------------------------------ */ +#define HRPWM0_CSG2_SRS_VLS1S_Pos (0UL) /*!< HRPWM0_CSG2 SRS: VLS1S (Bit 0) */ +#define HRPWM0_CSG2_SRS_VLS1S_Msk (0x3UL) /*!< HRPWM0_CSG2 SRS: VLS1S (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG2_SRS_VLS2S_Pos (2UL) /*!< HRPWM0_CSG2 SRS: VLS2S (Bit 2) */ +#define HRPWM0_CSG2_SRS_VLS2S_Msk (0xcUL) /*!< HRPWM0_CSG2 SRS: VLS2S (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG2_SRS_TRLS_Pos (4UL) /*!< HRPWM0_CSG2 SRS: TRLS (Bit 4) */ +#define HRPWM0_CSG2_SRS_TRLS_Msk (0x30UL) /*!< HRPWM0_CSG2 SRS: TRLS (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG2_SRS_SSLS_Pos (6UL) /*!< HRPWM0_CSG2 SRS: SSLS (Bit 6) */ +#define HRPWM0_CSG2_SRS_SSLS_Msk (0xc0UL) /*!< HRPWM0_CSG2 SRS: SSLS (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG2_SRS_STLS_Pos (8UL) /*!< HRPWM0_CSG2 SRS: STLS (Bit 8) */ +#define HRPWM0_CSG2_SRS_STLS_Msk (0x300UL) /*!< HRPWM0_CSG2 SRS: STLS (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG2_SRS_CRFLS_Pos (10UL) /*!< HRPWM0_CSG2 SRS: CRFLS (Bit 10) */ +#define HRPWM0_CSG2_SRS_CRFLS_Msk (0xc00UL) /*!< HRPWM0_CSG2 SRS: CRFLS (Bitfield-Mask: 0x03) */ +#define HRPWM0_CSG2_SRS_CSLS_Pos (12UL) /*!< HRPWM0_CSG2 SRS: CSLS (Bit 12) */ +#define HRPWM0_CSG2_SRS_CSLS_Msk (0x3000UL) /*!< HRPWM0_CSG2 SRS: CSLS (Bitfield-Mask: 0x03) */ + +/* ------------------------------- HRPWM0_CSG2_SWS ------------------------------ */ +#define HRPWM0_CSG2_SWS_SVLS1_Pos (0UL) /*!< HRPWM0_CSG2 SWS: SVLS1 (Bit 0) */ +#define HRPWM0_CSG2_SWS_SVLS1_Msk (0x1UL) /*!< HRPWM0_CSG2 SWS: SVLS1 (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG2_SWS_SVLS2_Pos (1UL) /*!< HRPWM0_CSG2 SWS: SVLS2 (Bit 1) */ +#define HRPWM0_CSG2_SWS_SVLS2_Msk (0x2UL) /*!< HRPWM0_CSG2 SWS: SVLS2 (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG2_SWS_STRGS_Pos (2UL) /*!< HRPWM0_CSG2 SWS: STRGS (Bit 2) */ +#define HRPWM0_CSG2_SWS_STRGS_Msk (0x4UL) /*!< HRPWM0_CSG2 SWS: STRGS (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG2_SWS_SSTRS_Pos (3UL) /*!< HRPWM0_CSG2 SWS: SSTRS (Bit 3) */ +#define HRPWM0_CSG2_SWS_SSTRS_Msk (0x8UL) /*!< HRPWM0_CSG2 SWS: SSTRS (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG2_SWS_SSTPS_Pos (4UL) /*!< HRPWM0_CSG2 SWS: SSTPS (Bit 4) */ +#define HRPWM0_CSG2_SWS_SSTPS_Msk (0x10UL) /*!< HRPWM0_CSG2 SWS: SSTPS (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG2_SWS_SSTD_Pos (5UL) /*!< HRPWM0_CSG2 SWS: SSTD (Bit 5) */ +#define HRPWM0_CSG2_SWS_SSTD_Msk (0x20UL) /*!< HRPWM0_CSG2 SWS: SSTD (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG2_SWS_SCRS_Pos (6UL) /*!< HRPWM0_CSG2 SWS: SCRS (Bit 6) */ +#define HRPWM0_CSG2_SWS_SCRS_Msk (0x40UL) /*!< HRPWM0_CSG2 SWS: SCRS (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG2_SWS_SCFS_Pos (7UL) /*!< HRPWM0_CSG2 SWS: SCFS (Bit 7) */ +#define HRPWM0_CSG2_SWS_SCFS_Msk (0x80UL) /*!< HRPWM0_CSG2 SWS: SCFS (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG2_SWS_SCSS_Pos (8UL) /*!< HRPWM0_CSG2 SWS: SCSS (Bit 8) */ +#define HRPWM0_CSG2_SWS_SCSS_Msk (0x100UL) /*!< HRPWM0_CSG2 SWS: SCSS (Bitfield-Mask: 0x01) */ + +/* ------------------------------- HRPWM0_CSG2_SWC ------------------------------ */ +#define HRPWM0_CSG2_SWC_CVLS1_Pos (0UL) /*!< HRPWM0_CSG2 SWC: CVLS1 (Bit 0) */ +#define HRPWM0_CSG2_SWC_CVLS1_Msk (0x1UL) /*!< HRPWM0_CSG2 SWC: CVLS1 (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG2_SWC_CVLS2_Pos (1UL) /*!< HRPWM0_CSG2 SWC: CVLS2 (Bit 1) */ +#define HRPWM0_CSG2_SWC_CVLS2_Msk (0x2UL) /*!< HRPWM0_CSG2 SWC: CVLS2 (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG2_SWC_CTRGS_Pos (2UL) /*!< HRPWM0_CSG2 SWC: CTRGS (Bit 2) */ +#define HRPWM0_CSG2_SWC_CTRGS_Msk (0x4UL) /*!< HRPWM0_CSG2 SWC: CTRGS (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG2_SWC_CSTRS_Pos (3UL) /*!< HRPWM0_CSG2 SWC: CSTRS (Bit 3) */ +#define HRPWM0_CSG2_SWC_CSTRS_Msk (0x8UL) /*!< HRPWM0_CSG2 SWC: CSTRS (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG2_SWC_CSTPS_Pos (4UL) /*!< HRPWM0_CSG2 SWC: CSTPS (Bit 4) */ +#define HRPWM0_CSG2_SWC_CSTPS_Msk (0x10UL) /*!< HRPWM0_CSG2 SWC: CSTPS (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG2_SWC_CSTD_Pos (5UL) /*!< HRPWM0_CSG2 SWC: CSTD (Bit 5) */ +#define HRPWM0_CSG2_SWC_CSTD_Msk (0x20UL) /*!< HRPWM0_CSG2 SWC: CSTD (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG2_SWC_CCRS_Pos (6UL) /*!< HRPWM0_CSG2 SWC: CCRS (Bit 6) */ +#define HRPWM0_CSG2_SWC_CCRS_Msk (0x40UL) /*!< HRPWM0_CSG2 SWC: CCRS (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG2_SWC_CCFS_Pos (7UL) /*!< HRPWM0_CSG2 SWC: CCFS (Bit 7) */ +#define HRPWM0_CSG2_SWC_CCFS_Msk (0x80UL) /*!< HRPWM0_CSG2 SWC: CCFS (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG2_SWC_CCSS_Pos (8UL) /*!< HRPWM0_CSG2 SWC: CCSS (Bit 8) */ +#define HRPWM0_CSG2_SWC_CCSS_Msk (0x100UL) /*!< HRPWM0_CSG2 SWC: CCSS (Bitfield-Mask: 0x01) */ + +/* ------------------------------ HRPWM0_CSG2_ISTAT ----------------------------- */ +#define HRPWM0_CSG2_ISTAT_VLS1S_Pos (0UL) /*!< HRPWM0_CSG2 ISTAT: VLS1S (Bit 0) */ +#define HRPWM0_CSG2_ISTAT_VLS1S_Msk (0x1UL) /*!< HRPWM0_CSG2 ISTAT: VLS1S (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG2_ISTAT_VLS2S_Pos (1UL) /*!< HRPWM0_CSG2 ISTAT: VLS2S (Bit 1) */ +#define HRPWM0_CSG2_ISTAT_VLS2S_Msk (0x2UL) /*!< HRPWM0_CSG2 ISTAT: VLS2S (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG2_ISTAT_TRGSS_Pos (2UL) /*!< HRPWM0_CSG2 ISTAT: TRGSS (Bit 2) */ +#define HRPWM0_CSG2_ISTAT_TRGSS_Msk (0x4UL) /*!< HRPWM0_CSG2 ISTAT: TRGSS (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG2_ISTAT_STRSS_Pos (3UL) /*!< HRPWM0_CSG2 ISTAT: STRSS (Bit 3) */ +#define HRPWM0_CSG2_ISTAT_STRSS_Msk (0x8UL) /*!< HRPWM0_CSG2 ISTAT: STRSS (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG2_ISTAT_STPSS_Pos (4UL) /*!< HRPWM0_CSG2 ISTAT: STPSS (Bit 4) */ +#define HRPWM0_CSG2_ISTAT_STPSS_Msk (0x10UL) /*!< HRPWM0_CSG2 ISTAT: STPSS (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG2_ISTAT_STDS_Pos (5UL) /*!< HRPWM0_CSG2 ISTAT: STDS (Bit 5) */ +#define HRPWM0_CSG2_ISTAT_STDS_Msk (0x20UL) /*!< HRPWM0_CSG2 ISTAT: STDS (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG2_ISTAT_CRSS_Pos (6UL) /*!< HRPWM0_CSG2 ISTAT: CRSS (Bit 6) */ +#define HRPWM0_CSG2_ISTAT_CRSS_Msk (0x40UL) /*!< HRPWM0_CSG2 ISTAT: CRSS (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG2_ISTAT_CFSS_Pos (7UL) /*!< HRPWM0_CSG2 ISTAT: CFSS (Bit 7) */ +#define HRPWM0_CSG2_ISTAT_CFSS_Msk (0x80UL) /*!< HRPWM0_CSG2 ISTAT: CFSS (Bitfield-Mask: 0x01) */ +#define HRPWM0_CSG2_ISTAT_CSES_Pos (8UL) /*!< HRPWM0_CSG2 ISTAT: CSES (Bit 8) */ +#define HRPWM0_CSG2_ISTAT_CSES_Msk (0x100UL) /*!< HRPWM0_CSG2 ISTAT: CSES (Bitfield-Mask: 0x01) */ + + +/* ================================================================================ */ +/* ================ Group 'HRPWM0_HRC' Position & Mask ================ */ +/* ================================================================================ */ + + +/* -------------------------------- HRPWM0_HRC_GC ------------------------------- */ +#define HRPWM0_HRC_GC_HRM0_Pos (0UL) /*!< HRPWM0_HRC GC: HRM0 (Bit 0) */ +#define HRPWM0_HRC_GC_HRM0_Msk (0x3UL) /*!< HRPWM0_HRC GC: HRM0 (Bitfield-Mask: 0x03) */ +#define HRPWM0_HRC_GC_HRM1_Pos (2UL) /*!< HRPWM0_HRC GC: HRM1 (Bit 2) */ +#define HRPWM0_HRC_GC_HRM1_Msk (0xcUL) /*!< HRPWM0_HRC GC: HRM1 (Bitfield-Mask: 0x03) */ +#define HRPWM0_HRC_GC_DTE_Pos (8UL) /*!< HRPWM0_HRC GC: DTE (Bit 8) */ +#define HRPWM0_HRC_GC_DTE_Msk (0x100UL) /*!< HRPWM0_HRC GC: DTE (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRC_GC_TR0E_Pos (9UL) /*!< HRPWM0_HRC GC: TR0E (Bit 9) */ +#define HRPWM0_HRC_GC_TR0E_Msk (0x200UL) /*!< HRPWM0_HRC GC: TR0E (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRC_GC_TR1E_Pos (10UL) /*!< HRPWM0_HRC GC: TR1E (Bit 10) */ +#define HRPWM0_HRC_GC_TR1E_Msk (0x400UL) /*!< HRPWM0_HRC GC: TR1E (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRC_GC_STC_Pos (11UL) /*!< HRPWM0_HRC GC: STC (Bit 11) */ +#define HRPWM0_HRC_GC_STC_Msk (0x800UL) /*!< HRPWM0_HRC GC: STC (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRC_GC_DSTC_Pos (12UL) /*!< HRPWM0_HRC GC: DSTC (Bit 12) */ +#define HRPWM0_HRC_GC_DSTC_Msk (0x1000UL) /*!< HRPWM0_HRC GC: DSTC (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRC_GC_OCS0_Pos (13UL) /*!< HRPWM0_HRC GC: OCS0 (Bit 13) */ +#define HRPWM0_HRC_GC_OCS0_Msk (0x2000UL) /*!< HRPWM0_HRC GC: OCS0 (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRC_GC_OCS1_Pos (14UL) /*!< HRPWM0_HRC GC: OCS1 (Bit 14) */ +#define HRPWM0_HRC_GC_OCS1_Msk (0x4000UL) /*!< HRPWM0_HRC GC: OCS1 (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRC_GC_DTUS_Pos (16UL) /*!< HRPWM0_HRC GC: DTUS (Bit 16) */ +#define HRPWM0_HRC_GC_DTUS_Msk (0x10000UL) /*!< HRPWM0_HRC GC: DTUS (Bitfield-Mask: 0x01) */ + +/* -------------------------------- HRPWM0_HRC_PL ------------------------------- */ +#define HRPWM0_HRC_PL_PSL0_Pos (0UL) /*!< HRPWM0_HRC PL: PSL0 (Bit 0) */ +#define HRPWM0_HRC_PL_PSL0_Msk (0x1UL) /*!< HRPWM0_HRC PL: PSL0 (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRC_PL_PSL1_Pos (1UL) /*!< HRPWM0_HRC PL: PSL1 (Bit 1) */ +#define HRPWM0_HRC_PL_PSL1_Msk (0x2UL) /*!< HRPWM0_HRC PL: PSL1 (Bitfield-Mask: 0x01) */ + +/* ------------------------------- HRPWM0_HRC_GSEL ------------------------------ */ +#define HRPWM0_HRC_GSEL_C0SS_Pos (0UL) /*!< HRPWM0_HRC GSEL: C0SS (Bit 0) */ +#define HRPWM0_HRC_GSEL_C0SS_Msk (0x7UL) /*!< HRPWM0_HRC GSEL: C0SS (Bitfield-Mask: 0x07) */ +#define HRPWM0_HRC_GSEL_C0CS_Pos (3UL) /*!< HRPWM0_HRC GSEL: C0CS (Bit 3) */ +#define HRPWM0_HRC_GSEL_C0CS_Msk (0x38UL) /*!< HRPWM0_HRC GSEL: C0CS (Bitfield-Mask: 0x07) */ +#define HRPWM0_HRC_GSEL_S0M_Pos (6UL) /*!< HRPWM0_HRC GSEL: S0M (Bit 6) */ +#define HRPWM0_HRC_GSEL_S0M_Msk (0xc0UL) /*!< HRPWM0_HRC GSEL: S0M (Bitfield-Mask: 0x03) */ +#define HRPWM0_HRC_GSEL_C0M_Pos (8UL) /*!< HRPWM0_HRC GSEL: C0M (Bit 8) */ +#define HRPWM0_HRC_GSEL_C0M_Msk (0x300UL) /*!< HRPWM0_HRC GSEL: C0M (Bitfield-Mask: 0x03) */ +#define HRPWM0_HRC_GSEL_S0ES_Pos (10UL) /*!< HRPWM0_HRC GSEL: S0ES (Bit 10) */ +#define HRPWM0_HRC_GSEL_S0ES_Msk (0xc00UL) /*!< HRPWM0_HRC GSEL: S0ES (Bitfield-Mask: 0x03) */ +#define HRPWM0_HRC_GSEL_C0ES_Pos (12UL) /*!< HRPWM0_HRC GSEL: C0ES (Bit 12) */ +#define HRPWM0_HRC_GSEL_C0ES_Msk (0x3000UL) /*!< HRPWM0_HRC GSEL: C0ES (Bitfield-Mask: 0x03) */ +#define HRPWM0_HRC_GSEL_C1SS_Pos (16UL) /*!< HRPWM0_HRC GSEL: C1SS (Bit 16) */ +#define HRPWM0_HRC_GSEL_C1SS_Msk (0x70000UL) /*!< HRPWM0_HRC GSEL: C1SS (Bitfield-Mask: 0x07) */ +#define HRPWM0_HRC_GSEL_C1CS_Pos (19UL) /*!< HRPWM0_HRC GSEL: C1CS (Bit 19) */ +#define HRPWM0_HRC_GSEL_C1CS_Msk (0x380000UL) /*!< HRPWM0_HRC GSEL: C1CS (Bitfield-Mask: 0x07) */ +#define HRPWM0_HRC_GSEL_S1M_Pos (22UL) /*!< HRPWM0_HRC GSEL: S1M (Bit 22) */ +#define HRPWM0_HRC_GSEL_S1M_Msk (0xc00000UL) /*!< HRPWM0_HRC GSEL: S1M (Bitfield-Mask: 0x03) */ +#define HRPWM0_HRC_GSEL_C1M_Pos (24UL) /*!< HRPWM0_HRC GSEL: C1M (Bit 24) */ +#define HRPWM0_HRC_GSEL_C1M_Msk (0x3000000UL) /*!< HRPWM0_HRC GSEL: C1M (Bitfield-Mask: 0x03) */ +#define HRPWM0_HRC_GSEL_S1ES_Pos (26UL) /*!< HRPWM0_HRC GSEL: S1ES (Bit 26) */ +#define HRPWM0_HRC_GSEL_S1ES_Msk (0xc000000UL) /*!< HRPWM0_HRC GSEL: S1ES (Bitfield-Mask: 0x03) */ +#define HRPWM0_HRC_GSEL_C1ES_Pos (28UL) /*!< HRPWM0_HRC GSEL: C1ES (Bit 28) */ +#define HRPWM0_HRC_GSEL_C1ES_Msk (0x30000000UL) /*!< HRPWM0_HRC GSEL: C1ES (Bitfield-Mask: 0x03) */ + +/* ------------------------------- HRPWM0_HRC_TSEL ------------------------------ */ +#define HRPWM0_HRC_TSEL_TSEL0_Pos (0UL) /*!< HRPWM0_HRC TSEL: TSEL0 (Bit 0) */ +#define HRPWM0_HRC_TSEL_TSEL0_Msk (0x7UL) /*!< HRPWM0_HRC TSEL: TSEL0 (Bitfield-Mask: 0x07) */ +#define HRPWM0_HRC_TSEL_TSEL1_Pos (3UL) /*!< HRPWM0_HRC TSEL: TSEL1 (Bit 3) */ +#define HRPWM0_HRC_TSEL_TSEL1_Msk (0x38UL) /*!< HRPWM0_HRC TSEL: TSEL1 (Bitfield-Mask: 0x07) */ +#define HRPWM0_HRC_TSEL_TS0E_Pos (16UL) /*!< HRPWM0_HRC TSEL: TS0E (Bit 16) */ +#define HRPWM0_HRC_TSEL_TS0E_Msk (0x10000UL) /*!< HRPWM0_HRC TSEL: TS0E (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRC_TSEL_TS1E_Pos (17UL) /*!< HRPWM0_HRC TSEL: TS1E (Bit 17) */ +#define HRPWM0_HRC_TSEL_TS1E_Msk (0x20000UL) /*!< HRPWM0_HRC TSEL: TS1E (Bitfield-Mask: 0x01) */ + +/* -------------------------------- HRPWM0_HRC_SC ------------------------------- */ +#define HRPWM0_HRC_SC_ST_Pos (0UL) /*!< HRPWM0_HRC SC: ST (Bit 0) */ +#define HRPWM0_HRC_SC_ST_Msk (0x1UL) /*!< HRPWM0_HRC SC: ST (Bitfield-Mask: 0x01) */ + +/* ------------------------------- HRPWM0_HRC_DCR ------------------------------- */ +#define HRPWM0_HRC_DCR_DTRV_Pos (0UL) /*!< HRPWM0_HRC DCR: DTRV (Bit 0) */ +#define HRPWM0_HRC_DCR_DTRV_Msk (0xffffUL) /*!< HRPWM0_HRC DCR: DTRV (Bitfield-Mask: 0xffff) */ + +/* ------------------------------- HRPWM0_HRC_DCF ------------------------------- */ +#define HRPWM0_HRC_DCF_DTFV_Pos (0UL) /*!< HRPWM0_HRC DCF: DTFV (Bit 0) */ +#define HRPWM0_HRC_DCF_DTFV_Msk (0xffffUL) /*!< HRPWM0_HRC DCF: DTFV (Bitfield-Mask: 0xffff) */ + +/* ------------------------------- HRPWM0_HRC_CR1 ------------------------------- */ +#define HRPWM0_HRC_CR1_CR1_Pos (0UL) /*!< HRPWM0_HRC CR1: CR1 (Bit 0) */ +#define HRPWM0_HRC_CR1_CR1_Msk (0xffUL) /*!< HRPWM0_HRC CR1: CR1 (Bitfield-Mask: 0xff) */ + +/* ------------------------------- HRPWM0_HRC_CR2 ------------------------------- */ +#define HRPWM0_HRC_CR2_CR2_Pos (0UL) /*!< HRPWM0_HRC CR2: CR2 (Bit 0) */ +#define HRPWM0_HRC_CR2_CR2_Msk (0xffUL) /*!< HRPWM0_HRC CR2: CR2 (Bitfield-Mask: 0xff) */ + +/* ------------------------------- HRPWM0_HRC_SSC ------------------------------- */ +#define HRPWM0_HRC_SSC_SST_Pos (0UL) /*!< HRPWM0_HRC SSC: SST (Bit 0) */ +#define HRPWM0_HRC_SSC_SST_Msk (0x1UL) /*!< HRPWM0_HRC SSC: SST (Bitfield-Mask: 0x01) */ + +/* ------------------------------- HRPWM0_HRC_SDCR ------------------------------ */ +#define HRPWM0_HRC_SDCR_SDTRV_Pos (0UL) /*!< HRPWM0_HRC SDCR: SDTRV (Bit 0) */ +#define HRPWM0_HRC_SDCR_SDTRV_Msk (0xffffUL) /*!< HRPWM0_HRC SDCR: SDTRV (Bitfield-Mask: 0xffff) */ + +/* ------------------------------- HRPWM0_HRC_SDCF ------------------------------ */ +#define HRPWM0_HRC_SDCF_SDTFV_Pos (0UL) /*!< HRPWM0_HRC SDCF: SDTFV (Bit 0) */ +#define HRPWM0_HRC_SDCF_SDTFV_Msk (0xffffUL) /*!< HRPWM0_HRC SDCF: SDTFV (Bitfield-Mask: 0xffff) */ + +/* ------------------------------- HRPWM0_HRC_SCR1 ------------------------------ */ +#define HRPWM0_HRC_SCR1_SCR1_Pos (0UL) /*!< HRPWM0_HRC SCR1: SCR1 (Bit 0) */ +#define HRPWM0_HRC_SCR1_SCR1_Msk (0xffUL) /*!< HRPWM0_HRC SCR1: SCR1 (Bitfield-Mask: 0xff) */ + +/* ------------------------------- HRPWM0_HRC_SCR2 ------------------------------ */ +#define HRPWM0_HRC_SCR2_SCR2_Pos (0UL) /*!< HRPWM0_HRC SCR2: SCR2 (Bit 0) */ +#define HRPWM0_HRC_SCR2_SCR2_Msk (0xffUL) /*!< HRPWM0_HRC SCR2: SCR2 (Bitfield-Mask: 0xff) */ + + +/* ================================================================================ */ +/* ================ struct 'HRPWM0_HRC0' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ------------------------------- HRPWM0_HRC0_GC ------------------------------- */ +#define HRPWM0_HRC0_GC_HRM0_Pos (0UL) /*!< HRPWM0_HRC0 GC: HRM0 (Bit 0) */ +#define HRPWM0_HRC0_GC_HRM0_Msk (0x3UL) /*!< HRPWM0_HRC0 GC: HRM0 (Bitfield-Mask: 0x03) */ +#define HRPWM0_HRC0_GC_HRM1_Pos (2UL) /*!< HRPWM0_HRC0 GC: HRM1 (Bit 2) */ +#define HRPWM0_HRC0_GC_HRM1_Msk (0xcUL) /*!< HRPWM0_HRC0 GC: HRM1 (Bitfield-Mask: 0x03) */ +#define HRPWM0_HRC0_GC_DTE_Pos (8UL) /*!< HRPWM0_HRC0 GC: DTE (Bit 8) */ +#define HRPWM0_HRC0_GC_DTE_Msk (0x100UL) /*!< HRPWM0_HRC0 GC: DTE (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRC0_GC_TR0E_Pos (9UL) /*!< HRPWM0_HRC0 GC: TR0E (Bit 9) */ +#define HRPWM0_HRC0_GC_TR0E_Msk (0x200UL) /*!< HRPWM0_HRC0 GC: TR0E (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRC0_GC_TR1E_Pos (10UL) /*!< HRPWM0_HRC0 GC: TR1E (Bit 10) */ +#define HRPWM0_HRC0_GC_TR1E_Msk (0x400UL) /*!< HRPWM0_HRC0 GC: TR1E (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRC0_GC_STC_Pos (11UL) /*!< HRPWM0_HRC0 GC: STC (Bit 11) */ +#define HRPWM0_HRC0_GC_STC_Msk (0x800UL) /*!< HRPWM0_HRC0 GC: STC (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRC0_GC_DSTC_Pos (12UL) /*!< HRPWM0_HRC0 GC: DSTC (Bit 12) */ +#define HRPWM0_HRC0_GC_DSTC_Msk (0x1000UL) /*!< HRPWM0_HRC0 GC: DSTC (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRC0_GC_OCS0_Pos (13UL) /*!< HRPWM0_HRC0 GC: OCS0 (Bit 13) */ +#define HRPWM0_HRC0_GC_OCS0_Msk (0x2000UL) /*!< HRPWM0_HRC0 GC: OCS0 (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRC0_GC_OCS1_Pos (14UL) /*!< HRPWM0_HRC0 GC: OCS1 (Bit 14) */ +#define HRPWM0_HRC0_GC_OCS1_Msk (0x4000UL) /*!< HRPWM0_HRC0 GC: OCS1 (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRC0_GC_DTUS_Pos (16UL) /*!< HRPWM0_HRC0 GC: DTUS (Bit 16) */ +#define HRPWM0_HRC0_GC_DTUS_Msk (0x10000UL) /*!< HRPWM0_HRC0 GC: DTUS (Bitfield-Mask: 0x01) */ + +/* ------------------------------- HRPWM0_HRC0_PL ------------------------------- */ +#define HRPWM0_HRC0_PL_PSL0_Pos (0UL) /*!< HRPWM0_HRC0 PL: PSL0 (Bit 0) */ +#define HRPWM0_HRC0_PL_PSL0_Msk (0x1UL) /*!< HRPWM0_HRC0 PL: PSL0 (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRC0_PL_PSL1_Pos (1UL) /*!< HRPWM0_HRC0 PL: PSL1 (Bit 1) */ +#define HRPWM0_HRC0_PL_PSL1_Msk (0x2UL) /*!< HRPWM0_HRC0 PL: PSL1 (Bitfield-Mask: 0x01) */ + +/* ------------------------------ HRPWM0_HRC0_GSEL ------------------------------ */ +#define HRPWM0_HRC0_GSEL_C0SS_Pos (0UL) /*!< HRPWM0_HRC0 GSEL: C0SS (Bit 0) */ +#define HRPWM0_HRC0_GSEL_C0SS_Msk (0x7UL) /*!< HRPWM0_HRC0 GSEL: C0SS (Bitfield-Mask: 0x07) */ +#define HRPWM0_HRC0_GSEL_C0CS_Pos (3UL) /*!< HRPWM0_HRC0 GSEL: C0CS (Bit 3) */ +#define HRPWM0_HRC0_GSEL_C0CS_Msk (0x38UL) /*!< HRPWM0_HRC0 GSEL: C0CS (Bitfield-Mask: 0x07) */ +#define HRPWM0_HRC0_GSEL_S0M_Pos (6UL) /*!< HRPWM0_HRC0 GSEL: S0M (Bit 6) */ +#define HRPWM0_HRC0_GSEL_S0M_Msk (0xc0UL) /*!< HRPWM0_HRC0 GSEL: S0M (Bitfield-Mask: 0x03) */ +#define HRPWM0_HRC0_GSEL_C0M_Pos (8UL) /*!< HRPWM0_HRC0 GSEL: C0M (Bit 8) */ +#define HRPWM0_HRC0_GSEL_C0M_Msk (0x300UL) /*!< HRPWM0_HRC0 GSEL: C0M (Bitfield-Mask: 0x03) */ +#define HRPWM0_HRC0_GSEL_S0ES_Pos (10UL) /*!< HRPWM0_HRC0 GSEL: S0ES (Bit 10) */ +#define HRPWM0_HRC0_GSEL_S0ES_Msk (0xc00UL) /*!< HRPWM0_HRC0 GSEL: S0ES (Bitfield-Mask: 0x03) */ +#define HRPWM0_HRC0_GSEL_C0ES_Pos (12UL) /*!< HRPWM0_HRC0 GSEL: C0ES (Bit 12) */ +#define HRPWM0_HRC0_GSEL_C0ES_Msk (0x3000UL) /*!< HRPWM0_HRC0 GSEL: C0ES (Bitfield-Mask: 0x03) */ +#define HRPWM0_HRC0_GSEL_C1SS_Pos (16UL) /*!< HRPWM0_HRC0 GSEL: C1SS (Bit 16) */ +#define HRPWM0_HRC0_GSEL_C1SS_Msk (0x70000UL) /*!< HRPWM0_HRC0 GSEL: C1SS (Bitfield-Mask: 0x07) */ +#define HRPWM0_HRC0_GSEL_C1CS_Pos (19UL) /*!< HRPWM0_HRC0 GSEL: C1CS (Bit 19) */ +#define HRPWM0_HRC0_GSEL_C1CS_Msk (0x380000UL) /*!< HRPWM0_HRC0 GSEL: C1CS (Bitfield-Mask: 0x07) */ +#define HRPWM0_HRC0_GSEL_S1M_Pos (22UL) /*!< HRPWM0_HRC0 GSEL: S1M (Bit 22) */ +#define HRPWM0_HRC0_GSEL_S1M_Msk (0xc00000UL) /*!< HRPWM0_HRC0 GSEL: S1M (Bitfield-Mask: 0x03) */ +#define HRPWM0_HRC0_GSEL_C1M_Pos (24UL) /*!< HRPWM0_HRC0 GSEL: C1M (Bit 24) */ +#define HRPWM0_HRC0_GSEL_C1M_Msk (0x3000000UL) /*!< HRPWM0_HRC0 GSEL: C1M (Bitfield-Mask: 0x03) */ +#define HRPWM0_HRC0_GSEL_S1ES_Pos (26UL) /*!< HRPWM0_HRC0 GSEL: S1ES (Bit 26) */ +#define HRPWM0_HRC0_GSEL_S1ES_Msk (0xc000000UL) /*!< HRPWM0_HRC0 GSEL: S1ES (Bitfield-Mask: 0x03) */ +#define HRPWM0_HRC0_GSEL_C1ES_Pos (28UL) /*!< HRPWM0_HRC0 GSEL: C1ES (Bit 28) */ +#define HRPWM0_HRC0_GSEL_C1ES_Msk (0x30000000UL) /*!< HRPWM0_HRC0 GSEL: C1ES (Bitfield-Mask: 0x03) */ + +/* ------------------------------ HRPWM0_HRC0_TSEL ------------------------------ */ +#define HRPWM0_HRC0_TSEL_TSEL0_Pos (0UL) /*!< HRPWM0_HRC0 TSEL: TSEL0 (Bit 0) */ +#define HRPWM0_HRC0_TSEL_TSEL0_Msk (0x7UL) /*!< HRPWM0_HRC0 TSEL: TSEL0 (Bitfield-Mask: 0x07) */ +#define HRPWM0_HRC0_TSEL_TSEL1_Pos (3UL) /*!< HRPWM0_HRC0 TSEL: TSEL1 (Bit 3) */ +#define HRPWM0_HRC0_TSEL_TSEL1_Msk (0x38UL) /*!< HRPWM0_HRC0 TSEL: TSEL1 (Bitfield-Mask: 0x07) */ +#define HRPWM0_HRC0_TSEL_TS0E_Pos (16UL) /*!< HRPWM0_HRC0 TSEL: TS0E (Bit 16) */ +#define HRPWM0_HRC0_TSEL_TS0E_Msk (0x10000UL) /*!< HRPWM0_HRC0 TSEL: TS0E (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRC0_TSEL_TS1E_Pos (17UL) /*!< HRPWM0_HRC0 TSEL: TS1E (Bit 17) */ +#define HRPWM0_HRC0_TSEL_TS1E_Msk (0x20000UL) /*!< HRPWM0_HRC0 TSEL: TS1E (Bitfield-Mask: 0x01) */ + +/* ------------------------------- HRPWM0_HRC0_SC ------------------------------- */ +#define HRPWM0_HRC0_SC_ST_Pos (0UL) /*!< HRPWM0_HRC0 SC: ST (Bit 0) */ +#define HRPWM0_HRC0_SC_ST_Msk (0x1UL) /*!< HRPWM0_HRC0 SC: ST (Bitfield-Mask: 0x01) */ + +/* ------------------------------- HRPWM0_HRC0_DCR ------------------------------ */ +#define HRPWM0_HRC0_DCR_DTRV_Pos (0UL) /*!< HRPWM0_HRC0 DCR: DTRV (Bit 0) */ +#define HRPWM0_HRC0_DCR_DTRV_Msk (0xffffUL) /*!< HRPWM0_HRC0 DCR: DTRV (Bitfield-Mask: 0xffff) */ + +/* ------------------------------- HRPWM0_HRC0_DCF ------------------------------ */ +#define HRPWM0_HRC0_DCF_DTFV_Pos (0UL) /*!< HRPWM0_HRC0 DCF: DTFV (Bit 0) */ +#define HRPWM0_HRC0_DCF_DTFV_Msk (0xffffUL) /*!< HRPWM0_HRC0 DCF: DTFV (Bitfield-Mask: 0xffff) */ + +/* ------------------------------- HRPWM0_HRC0_CR1 ------------------------------ */ +#define HRPWM0_HRC0_CR1_CR1_Pos (0UL) /*!< HRPWM0_HRC0 CR1: CR1 (Bit 0) */ +#define HRPWM0_HRC0_CR1_CR1_Msk (0xffUL) /*!< HRPWM0_HRC0 CR1: CR1 (Bitfield-Mask: 0xff) */ + +/* ------------------------------- HRPWM0_HRC0_CR2 ------------------------------ */ +#define HRPWM0_HRC0_CR2_CR2_Pos (0UL) /*!< HRPWM0_HRC0 CR2: CR2 (Bit 0) */ +#define HRPWM0_HRC0_CR2_CR2_Msk (0xffUL) /*!< HRPWM0_HRC0 CR2: CR2 (Bitfield-Mask: 0xff) */ + +/* ------------------------------- HRPWM0_HRC0_SSC ------------------------------ */ +#define HRPWM0_HRC0_SSC_SST_Pos (0UL) /*!< HRPWM0_HRC0 SSC: SST (Bit 0) */ +#define HRPWM0_HRC0_SSC_SST_Msk (0x1UL) /*!< HRPWM0_HRC0 SSC: SST (Bitfield-Mask: 0x01) */ + +/* ------------------------------ HRPWM0_HRC0_SDCR ------------------------------ */ +#define HRPWM0_HRC0_SDCR_SDTRV_Pos (0UL) /*!< HRPWM0_HRC0 SDCR: SDTRV (Bit 0) */ +#define HRPWM0_HRC0_SDCR_SDTRV_Msk (0xffffUL) /*!< HRPWM0_HRC0 SDCR: SDTRV (Bitfield-Mask: 0xffff) */ + +/* ------------------------------ HRPWM0_HRC0_SDCF ------------------------------ */ +#define HRPWM0_HRC0_SDCF_SDTFV_Pos (0UL) /*!< HRPWM0_HRC0 SDCF: SDTFV (Bit 0) */ +#define HRPWM0_HRC0_SDCF_SDTFV_Msk (0xffffUL) /*!< HRPWM0_HRC0 SDCF: SDTFV (Bitfield-Mask: 0xffff) */ + +/* ------------------------------ HRPWM0_HRC0_SCR1 ------------------------------ */ +#define HRPWM0_HRC0_SCR1_SCR1_Pos (0UL) /*!< HRPWM0_HRC0 SCR1: SCR1 (Bit 0) */ +#define HRPWM0_HRC0_SCR1_SCR1_Msk (0xffUL) /*!< HRPWM0_HRC0 SCR1: SCR1 (Bitfield-Mask: 0xff) */ + +/* ------------------------------ HRPWM0_HRC0_SCR2 ------------------------------ */ +#define HRPWM0_HRC0_SCR2_SCR2_Pos (0UL) /*!< HRPWM0_HRC0 SCR2: SCR2 (Bit 0) */ +#define HRPWM0_HRC0_SCR2_SCR2_Msk (0xffUL) /*!< HRPWM0_HRC0 SCR2: SCR2 (Bitfield-Mask: 0xff) */ + + +/* ================================================================================ */ +/* ================ struct 'HRPWM0_HRC1' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ------------------------------- HRPWM0_HRC1_GC ------------------------------- */ +#define HRPWM0_HRC1_GC_HRM0_Pos (0UL) /*!< HRPWM0_HRC1 GC: HRM0 (Bit 0) */ +#define HRPWM0_HRC1_GC_HRM0_Msk (0x3UL) /*!< HRPWM0_HRC1 GC: HRM0 (Bitfield-Mask: 0x03) */ +#define HRPWM0_HRC1_GC_HRM1_Pos (2UL) /*!< HRPWM0_HRC1 GC: HRM1 (Bit 2) */ +#define HRPWM0_HRC1_GC_HRM1_Msk (0xcUL) /*!< HRPWM0_HRC1 GC: HRM1 (Bitfield-Mask: 0x03) */ +#define HRPWM0_HRC1_GC_DTE_Pos (8UL) /*!< HRPWM0_HRC1 GC: DTE (Bit 8) */ +#define HRPWM0_HRC1_GC_DTE_Msk (0x100UL) /*!< HRPWM0_HRC1 GC: DTE (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRC1_GC_TR0E_Pos (9UL) /*!< HRPWM0_HRC1 GC: TR0E (Bit 9) */ +#define HRPWM0_HRC1_GC_TR0E_Msk (0x200UL) /*!< HRPWM0_HRC1 GC: TR0E (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRC1_GC_TR1E_Pos (10UL) /*!< HRPWM0_HRC1 GC: TR1E (Bit 10) */ +#define HRPWM0_HRC1_GC_TR1E_Msk (0x400UL) /*!< HRPWM0_HRC1 GC: TR1E (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRC1_GC_STC_Pos (11UL) /*!< HRPWM0_HRC1 GC: STC (Bit 11) */ +#define HRPWM0_HRC1_GC_STC_Msk (0x800UL) /*!< HRPWM0_HRC1 GC: STC (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRC1_GC_DSTC_Pos (12UL) /*!< HRPWM0_HRC1 GC: DSTC (Bit 12) */ +#define HRPWM0_HRC1_GC_DSTC_Msk (0x1000UL) /*!< HRPWM0_HRC1 GC: DSTC (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRC1_GC_OCS0_Pos (13UL) /*!< HRPWM0_HRC1 GC: OCS0 (Bit 13) */ +#define HRPWM0_HRC1_GC_OCS0_Msk (0x2000UL) /*!< HRPWM0_HRC1 GC: OCS0 (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRC1_GC_OCS1_Pos (14UL) /*!< HRPWM0_HRC1 GC: OCS1 (Bit 14) */ +#define HRPWM0_HRC1_GC_OCS1_Msk (0x4000UL) /*!< HRPWM0_HRC1 GC: OCS1 (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRC1_GC_DTUS_Pos (16UL) /*!< HRPWM0_HRC1 GC: DTUS (Bit 16) */ +#define HRPWM0_HRC1_GC_DTUS_Msk (0x10000UL) /*!< HRPWM0_HRC1 GC: DTUS (Bitfield-Mask: 0x01) */ + +/* ------------------------------- HRPWM0_HRC1_PL ------------------------------- */ +#define HRPWM0_HRC1_PL_PSL0_Pos (0UL) /*!< HRPWM0_HRC1 PL: PSL0 (Bit 0) */ +#define HRPWM0_HRC1_PL_PSL0_Msk (0x1UL) /*!< HRPWM0_HRC1 PL: PSL0 (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRC1_PL_PSL1_Pos (1UL) /*!< HRPWM0_HRC1 PL: PSL1 (Bit 1) */ +#define HRPWM0_HRC1_PL_PSL1_Msk (0x2UL) /*!< HRPWM0_HRC1 PL: PSL1 (Bitfield-Mask: 0x01) */ + +/* ------------------------------ HRPWM0_HRC1_GSEL ------------------------------ */ +#define HRPWM0_HRC1_GSEL_C0SS_Pos (0UL) /*!< HRPWM0_HRC1 GSEL: C0SS (Bit 0) */ +#define HRPWM0_HRC1_GSEL_C0SS_Msk (0x7UL) /*!< HRPWM0_HRC1 GSEL: C0SS (Bitfield-Mask: 0x07) */ +#define HRPWM0_HRC1_GSEL_C0CS_Pos (3UL) /*!< HRPWM0_HRC1 GSEL: C0CS (Bit 3) */ +#define HRPWM0_HRC1_GSEL_C0CS_Msk (0x38UL) /*!< HRPWM0_HRC1 GSEL: C0CS (Bitfield-Mask: 0x07) */ +#define HRPWM0_HRC1_GSEL_S0M_Pos (6UL) /*!< HRPWM0_HRC1 GSEL: S0M (Bit 6) */ +#define HRPWM0_HRC1_GSEL_S0M_Msk (0xc0UL) /*!< HRPWM0_HRC1 GSEL: S0M (Bitfield-Mask: 0x03) */ +#define HRPWM0_HRC1_GSEL_C0M_Pos (8UL) /*!< HRPWM0_HRC1 GSEL: C0M (Bit 8) */ +#define HRPWM0_HRC1_GSEL_C0M_Msk (0x300UL) /*!< HRPWM0_HRC1 GSEL: C0M (Bitfield-Mask: 0x03) */ +#define HRPWM0_HRC1_GSEL_S0ES_Pos (10UL) /*!< HRPWM0_HRC1 GSEL: S0ES (Bit 10) */ +#define HRPWM0_HRC1_GSEL_S0ES_Msk (0xc00UL) /*!< HRPWM0_HRC1 GSEL: S0ES (Bitfield-Mask: 0x03) */ +#define HRPWM0_HRC1_GSEL_C0ES_Pos (12UL) /*!< HRPWM0_HRC1 GSEL: C0ES (Bit 12) */ +#define HRPWM0_HRC1_GSEL_C0ES_Msk (0x3000UL) /*!< HRPWM0_HRC1 GSEL: C0ES (Bitfield-Mask: 0x03) */ +#define HRPWM0_HRC1_GSEL_C1SS_Pos (16UL) /*!< HRPWM0_HRC1 GSEL: C1SS (Bit 16) */ +#define HRPWM0_HRC1_GSEL_C1SS_Msk (0x70000UL) /*!< HRPWM0_HRC1 GSEL: C1SS (Bitfield-Mask: 0x07) */ +#define HRPWM0_HRC1_GSEL_C1CS_Pos (19UL) /*!< HRPWM0_HRC1 GSEL: C1CS (Bit 19) */ +#define HRPWM0_HRC1_GSEL_C1CS_Msk (0x380000UL) /*!< HRPWM0_HRC1 GSEL: C1CS (Bitfield-Mask: 0x07) */ +#define HRPWM0_HRC1_GSEL_S1M_Pos (22UL) /*!< HRPWM0_HRC1 GSEL: S1M (Bit 22) */ +#define HRPWM0_HRC1_GSEL_S1M_Msk (0xc00000UL) /*!< HRPWM0_HRC1 GSEL: S1M (Bitfield-Mask: 0x03) */ +#define HRPWM0_HRC1_GSEL_C1M_Pos (24UL) /*!< HRPWM0_HRC1 GSEL: C1M (Bit 24) */ +#define HRPWM0_HRC1_GSEL_C1M_Msk (0x3000000UL) /*!< HRPWM0_HRC1 GSEL: C1M (Bitfield-Mask: 0x03) */ +#define HRPWM0_HRC1_GSEL_S1ES_Pos (26UL) /*!< HRPWM0_HRC1 GSEL: S1ES (Bit 26) */ +#define HRPWM0_HRC1_GSEL_S1ES_Msk (0xc000000UL) /*!< HRPWM0_HRC1 GSEL: S1ES (Bitfield-Mask: 0x03) */ +#define HRPWM0_HRC1_GSEL_C1ES_Pos (28UL) /*!< HRPWM0_HRC1 GSEL: C1ES (Bit 28) */ +#define HRPWM0_HRC1_GSEL_C1ES_Msk (0x30000000UL) /*!< HRPWM0_HRC1 GSEL: C1ES (Bitfield-Mask: 0x03) */ + +/* ------------------------------ HRPWM0_HRC1_TSEL ------------------------------ */ +#define HRPWM0_HRC1_TSEL_TSEL0_Pos (0UL) /*!< HRPWM0_HRC1 TSEL: TSEL0 (Bit 0) */ +#define HRPWM0_HRC1_TSEL_TSEL0_Msk (0x7UL) /*!< HRPWM0_HRC1 TSEL: TSEL0 (Bitfield-Mask: 0x07) */ +#define HRPWM0_HRC1_TSEL_TSEL1_Pos (3UL) /*!< HRPWM0_HRC1 TSEL: TSEL1 (Bit 3) */ +#define HRPWM0_HRC1_TSEL_TSEL1_Msk (0x38UL) /*!< HRPWM0_HRC1 TSEL: TSEL1 (Bitfield-Mask: 0x07) */ +#define HRPWM0_HRC1_TSEL_TS0E_Pos (16UL) /*!< HRPWM0_HRC1 TSEL: TS0E (Bit 16) */ +#define HRPWM0_HRC1_TSEL_TS0E_Msk (0x10000UL) /*!< HRPWM0_HRC1 TSEL: TS0E (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRC1_TSEL_TS1E_Pos (17UL) /*!< HRPWM0_HRC1 TSEL: TS1E (Bit 17) */ +#define HRPWM0_HRC1_TSEL_TS1E_Msk (0x20000UL) /*!< HRPWM0_HRC1 TSEL: TS1E (Bitfield-Mask: 0x01) */ + +/* ------------------------------- HRPWM0_HRC1_SC ------------------------------- */ +#define HRPWM0_HRC1_SC_ST_Pos (0UL) /*!< HRPWM0_HRC1 SC: ST (Bit 0) */ +#define HRPWM0_HRC1_SC_ST_Msk (0x1UL) /*!< HRPWM0_HRC1 SC: ST (Bitfield-Mask: 0x01) */ + +/* ------------------------------- HRPWM0_HRC1_DCR ------------------------------ */ +#define HRPWM0_HRC1_DCR_DTRV_Pos (0UL) /*!< HRPWM0_HRC1 DCR: DTRV (Bit 0) */ +#define HRPWM0_HRC1_DCR_DTRV_Msk (0xffffUL) /*!< HRPWM0_HRC1 DCR: DTRV (Bitfield-Mask: 0xffff) */ + +/* ------------------------------- HRPWM0_HRC1_DCF ------------------------------ */ +#define HRPWM0_HRC1_DCF_DTFV_Pos (0UL) /*!< HRPWM0_HRC1 DCF: DTFV (Bit 0) */ +#define HRPWM0_HRC1_DCF_DTFV_Msk (0xffffUL) /*!< HRPWM0_HRC1 DCF: DTFV (Bitfield-Mask: 0xffff) */ + +/* ------------------------------- HRPWM0_HRC1_CR1 ------------------------------ */ +#define HRPWM0_HRC1_CR1_CR1_Pos (0UL) /*!< HRPWM0_HRC1 CR1: CR1 (Bit 0) */ +#define HRPWM0_HRC1_CR1_CR1_Msk (0xffUL) /*!< HRPWM0_HRC1 CR1: CR1 (Bitfield-Mask: 0xff) */ + +/* ------------------------------- HRPWM0_HRC1_CR2 ------------------------------ */ +#define HRPWM0_HRC1_CR2_CR2_Pos (0UL) /*!< HRPWM0_HRC1 CR2: CR2 (Bit 0) */ +#define HRPWM0_HRC1_CR2_CR2_Msk (0xffUL) /*!< HRPWM0_HRC1 CR2: CR2 (Bitfield-Mask: 0xff) */ + +/* ------------------------------- HRPWM0_HRC1_SSC ------------------------------ */ +#define HRPWM0_HRC1_SSC_SST_Pos (0UL) /*!< HRPWM0_HRC1 SSC: SST (Bit 0) */ +#define HRPWM0_HRC1_SSC_SST_Msk (0x1UL) /*!< HRPWM0_HRC1 SSC: SST (Bitfield-Mask: 0x01) */ + +/* ------------------------------ HRPWM0_HRC1_SDCR ------------------------------ */ +#define HRPWM0_HRC1_SDCR_SDTRV_Pos (0UL) /*!< HRPWM0_HRC1 SDCR: SDTRV (Bit 0) */ +#define HRPWM0_HRC1_SDCR_SDTRV_Msk (0xffffUL) /*!< HRPWM0_HRC1 SDCR: SDTRV (Bitfield-Mask: 0xffff) */ + +/* ------------------------------ HRPWM0_HRC1_SDCF ------------------------------ */ +#define HRPWM0_HRC1_SDCF_SDTFV_Pos (0UL) /*!< HRPWM0_HRC1 SDCF: SDTFV (Bit 0) */ +#define HRPWM0_HRC1_SDCF_SDTFV_Msk (0xffffUL) /*!< HRPWM0_HRC1 SDCF: SDTFV (Bitfield-Mask: 0xffff) */ + +/* ------------------------------ HRPWM0_HRC1_SCR1 ------------------------------ */ +#define HRPWM0_HRC1_SCR1_SCR1_Pos (0UL) /*!< HRPWM0_HRC1 SCR1: SCR1 (Bit 0) */ +#define HRPWM0_HRC1_SCR1_SCR1_Msk (0xffUL) /*!< HRPWM0_HRC1 SCR1: SCR1 (Bitfield-Mask: 0xff) */ + +/* ------------------------------ HRPWM0_HRC1_SCR2 ------------------------------ */ +#define HRPWM0_HRC1_SCR2_SCR2_Pos (0UL) /*!< HRPWM0_HRC1 SCR2: SCR2 (Bit 0) */ +#define HRPWM0_HRC1_SCR2_SCR2_Msk (0xffUL) /*!< HRPWM0_HRC1 SCR2: SCR2 (Bitfield-Mask: 0xff) */ + + +/* ================================================================================ */ +/* ================ struct 'HRPWM0_HRC2' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ------------------------------- HRPWM0_HRC2_GC ------------------------------- */ +#define HRPWM0_HRC2_GC_HRM0_Pos (0UL) /*!< HRPWM0_HRC2 GC: HRM0 (Bit 0) */ +#define HRPWM0_HRC2_GC_HRM0_Msk (0x3UL) /*!< HRPWM0_HRC2 GC: HRM0 (Bitfield-Mask: 0x03) */ +#define HRPWM0_HRC2_GC_HRM1_Pos (2UL) /*!< HRPWM0_HRC2 GC: HRM1 (Bit 2) */ +#define HRPWM0_HRC2_GC_HRM1_Msk (0xcUL) /*!< HRPWM0_HRC2 GC: HRM1 (Bitfield-Mask: 0x03) */ +#define HRPWM0_HRC2_GC_DTE_Pos (8UL) /*!< HRPWM0_HRC2 GC: DTE (Bit 8) */ +#define HRPWM0_HRC2_GC_DTE_Msk (0x100UL) /*!< HRPWM0_HRC2 GC: DTE (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRC2_GC_TR0E_Pos (9UL) /*!< HRPWM0_HRC2 GC: TR0E (Bit 9) */ +#define HRPWM0_HRC2_GC_TR0E_Msk (0x200UL) /*!< HRPWM0_HRC2 GC: TR0E (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRC2_GC_TR1E_Pos (10UL) /*!< HRPWM0_HRC2 GC: TR1E (Bit 10) */ +#define HRPWM0_HRC2_GC_TR1E_Msk (0x400UL) /*!< HRPWM0_HRC2 GC: TR1E (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRC2_GC_STC_Pos (11UL) /*!< HRPWM0_HRC2 GC: STC (Bit 11) */ +#define HRPWM0_HRC2_GC_STC_Msk (0x800UL) /*!< HRPWM0_HRC2 GC: STC (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRC2_GC_DSTC_Pos (12UL) /*!< HRPWM0_HRC2 GC: DSTC (Bit 12) */ +#define HRPWM0_HRC2_GC_DSTC_Msk (0x1000UL) /*!< HRPWM0_HRC2 GC: DSTC (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRC2_GC_OCS0_Pos (13UL) /*!< HRPWM0_HRC2 GC: OCS0 (Bit 13) */ +#define HRPWM0_HRC2_GC_OCS0_Msk (0x2000UL) /*!< HRPWM0_HRC2 GC: OCS0 (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRC2_GC_OCS1_Pos (14UL) /*!< HRPWM0_HRC2 GC: OCS1 (Bit 14) */ +#define HRPWM0_HRC2_GC_OCS1_Msk (0x4000UL) /*!< HRPWM0_HRC2 GC: OCS1 (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRC2_GC_DTUS_Pos (16UL) /*!< HRPWM0_HRC2 GC: DTUS (Bit 16) */ +#define HRPWM0_HRC2_GC_DTUS_Msk (0x10000UL) /*!< HRPWM0_HRC2 GC: DTUS (Bitfield-Mask: 0x01) */ + +/* ------------------------------- HRPWM0_HRC2_PL ------------------------------- */ +#define HRPWM0_HRC2_PL_PSL0_Pos (0UL) /*!< HRPWM0_HRC2 PL: PSL0 (Bit 0) */ +#define HRPWM0_HRC2_PL_PSL0_Msk (0x1UL) /*!< HRPWM0_HRC2 PL: PSL0 (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRC2_PL_PSL1_Pos (1UL) /*!< HRPWM0_HRC2 PL: PSL1 (Bit 1) */ +#define HRPWM0_HRC2_PL_PSL1_Msk (0x2UL) /*!< HRPWM0_HRC2 PL: PSL1 (Bitfield-Mask: 0x01) */ + +/* ------------------------------ HRPWM0_HRC2_GSEL ------------------------------ */ +#define HRPWM0_HRC2_GSEL_C0SS_Pos (0UL) /*!< HRPWM0_HRC2 GSEL: C0SS (Bit 0) */ +#define HRPWM0_HRC2_GSEL_C0SS_Msk (0x7UL) /*!< HRPWM0_HRC2 GSEL: C0SS (Bitfield-Mask: 0x07) */ +#define HRPWM0_HRC2_GSEL_C0CS_Pos (3UL) /*!< HRPWM0_HRC2 GSEL: C0CS (Bit 3) */ +#define HRPWM0_HRC2_GSEL_C0CS_Msk (0x38UL) /*!< HRPWM0_HRC2 GSEL: C0CS (Bitfield-Mask: 0x07) */ +#define HRPWM0_HRC2_GSEL_S0M_Pos (6UL) /*!< HRPWM0_HRC2 GSEL: S0M (Bit 6) */ +#define HRPWM0_HRC2_GSEL_S0M_Msk (0xc0UL) /*!< HRPWM0_HRC2 GSEL: S0M (Bitfield-Mask: 0x03) */ +#define HRPWM0_HRC2_GSEL_C0M_Pos (8UL) /*!< HRPWM0_HRC2 GSEL: C0M (Bit 8) */ +#define HRPWM0_HRC2_GSEL_C0M_Msk (0x300UL) /*!< HRPWM0_HRC2 GSEL: C0M (Bitfield-Mask: 0x03) */ +#define HRPWM0_HRC2_GSEL_S0ES_Pos (10UL) /*!< HRPWM0_HRC2 GSEL: S0ES (Bit 10) */ +#define HRPWM0_HRC2_GSEL_S0ES_Msk (0xc00UL) /*!< HRPWM0_HRC2 GSEL: S0ES (Bitfield-Mask: 0x03) */ +#define HRPWM0_HRC2_GSEL_C0ES_Pos (12UL) /*!< HRPWM0_HRC2 GSEL: C0ES (Bit 12) */ +#define HRPWM0_HRC2_GSEL_C0ES_Msk (0x3000UL) /*!< HRPWM0_HRC2 GSEL: C0ES (Bitfield-Mask: 0x03) */ +#define HRPWM0_HRC2_GSEL_C1SS_Pos (16UL) /*!< HRPWM0_HRC2 GSEL: C1SS (Bit 16) */ +#define HRPWM0_HRC2_GSEL_C1SS_Msk (0x70000UL) /*!< HRPWM0_HRC2 GSEL: C1SS (Bitfield-Mask: 0x07) */ +#define HRPWM0_HRC2_GSEL_C1CS_Pos (19UL) /*!< HRPWM0_HRC2 GSEL: C1CS (Bit 19) */ +#define HRPWM0_HRC2_GSEL_C1CS_Msk (0x380000UL) /*!< HRPWM0_HRC2 GSEL: C1CS (Bitfield-Mask: 0x07) */ +#define HRPWM0_HRC2_GSEL_S1M_Pos (22UL) /*!< HRPWM0_HRC2 GSEL: S1M (Bit 22) */ +#define HRPWM0_HRC2_GSEL_S1M_Msk (0xc00000UL) /*!< HRPWM0_HRC2 GSEL: S1M (Bitfield-Mask: 0x03) */ +#define HRPWM0_HRC2_GSEL_C1M_Pos (24UL) /*!< HRPWM0_HRC2 GSEL: C1M (Bit 24) */ +#define HRPWM0_HRC2_GSEL_C1M_Msk (0x3000000UL) /*!< HRPWM0_HRC2 GSEL: C1M (Bitfield-Mask: 0x03) */ +#define HRPWM0_HRC2_GSEL_S1ES_Pos (26UL) /*!< HRPWM0_HRC2 GSEL: S1ES (Bit 26) */ +#define HRPWM0_HRC2_GSEL_S1ES_Msk (0xc000000UL) /*!< HRPWM0_HRC2 GSEL: S1ES (Bitfield-Mask: 0x03) */ +#define HRPWM0_HRC2_GSEL_C1ES_Pos (28UL) /*!< HRPWM0_HRC2 GSEL: C1ES (Bit 28) */ +#define HRPWM0_HRC2_GSEL_C1ES_Msk (0x30000000UL) /*!< HRPWM0_HRC2 GSEL: C1ES (Bitfield-Mask: 0x03) */ + +/* ------------------------------ HRPWM0_HRC2_TSEL ------------------------------ */ +#define HRPWM0_HRC2_TSEL_TSEL0_Pos (0UL) /*!< HRPWM0_HRC2 TSEL: TSEL0 (Bit 0) */ +#define HRPWM0_HRC2_TSEL_TSEL0_Msk (0x7UL) /*!< HRPWM0_HRC2 TSEL: TSEL0 (Bitfield-Mask: 0x07) */ +#define HRPWM0_HRC2_TSEL_TSEL1_Pos (3UL) /*!< HRPWM0_HRC2 TSEL: TSEL1 (Bit 3) */ +#define HRPWM0_HRC2_TSEL_TSEL1_Msk (0x38UL) /*!< HRPWM0_HRC2 TSEL: TSEL1 (Bitfield-Mask: 0x07) */ +#define HRPWM0_HRC2_TSEL_TS0E_Pos (16UL) /*!< HRPWM0_HRC2 TSEL: TS0E (Bit 16) */ +#define HRPWM0_HRC2_TSEL_TS0E_Msk (0x10000UL) /*!< HRPWM0_HRC2 TSEL: TS0E (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRC2_TSEL_TS1E_Pos (17UL) /*!< HRPWM0_HRC2 TSEL: TS1E (Bit 17) */ +#define HRPWM0_HRC2_TSEL_TS1E_Msk (0x20000UL) /*!< HRPWM0_HRC2 TSEL: TS1E (Bitfield-Mask: 0x01) */ + +/* ------------------------------- HRPWM0_HRC2_SC ------------------------------- */ +#define HRPWM0_HRC2_SC_ST_Pos (0UL) /*!< HRPWM0_HRC2 SC: ST (Bit 0) */ +#define HRPWM0_HRC2_SC_ST_Msk (0x1UL) /*!< HRPWM0_HRC2 SC: ST (Bitfield-Mask: 0x01) */ + +/* ------------------------------- HRPWM0_HRC2_DCR ------------------------------ */ +#define HRPWM0_HRC2_DCR_DTRV_Pos (0UL) /*!< HRPWM0_HRC2 DCR: DTRV (Bit 0) */ +#define HRPWM0_HRC2_DCR_DTRV_Msk (0xffffUL) /*!< HRPWM0_HRC2 DCR: DTRV (Bitfield-Mask: 0xffff) */ + +/* ------------------------------- HRPWM0_HRC2_DCF ------------------------------ */ +#define HRPWM0_HRC2_DCF_DTFV_Pos (0UL) /*!< HRPWM0_HRC2 DCF: DTFV (Bit 0) */ +#define HRPWM0_HRC2_DCF_DTFV_Msk (0xffffUL) /*!< HRPWM0_HRC2 DCF: DTFV (Bitfield-Mask: 0xffff) */ + +/* ------------------------------- HRPWM0_HRC2_CR1 ------------------------------ */ +#define HRPWM0_HRC2_CR1_CR1_Pos (0UL) /*!< HRPWM0_HRC2 CR1: CR1 (Bit 0) */ +#define HRPWM0_HRC2_CR1_CR1_Msk (0xffUL) /*!< HRPWM0_HRC2 CR1: CR1 (Bitfield-Mask: 0xff) */ + +/* ------------------------------- HRPWM0_HRC2_CR2 ------------------------------ */ +#define HRPWM0_HRC2_CR2_CR2_Pos (0UL) /*!< HRPWM0_HRC2 CR2: CR2 (Bit 0) */ +#define HRPWM0_HRC2_CR2_CR2_Msk (0xffUL) /*!< HRPWM0_HRC2 CR2: CR2 (Bitfield-Mask: 0xff) */ + +/* ------------------------------- HRPWM0_HRC2_SSC ------------------------------ */ +#define HRPWM0_HRC2_SSC_SST_Pos (0UL) /*!< HRPWM0_HRC2 SSC: SST (Bit 0) */ +#define HRPWM0_HRC2_SSC_SST_Msk (0x1UL) /*!< HRPWM0_HRC2 SSC: SST (Bitfield-Mask: 0x01) */ + +/* ------------------------------ HRPWM0_HRC2_SDCR ------------------------------ */ +#define HRPWM0_HRC2_SDCR_SDTRV_Pos (0UL) /*!< HRPWM0_HRC2 SDCR: SDTRV (Bit 0) */ +#define HRPWM0_HRC2_SDCR_SDTRV_Msk (0xffffUL) /*!< HRPWM0_HRC2 SDCR: SDTRV (Bitfield-Mask: 0xffff) */ + +/* ------------------------------ HRPWM0_HRC2_SDCF ------------------------------ */ +#define HRPWM0_HRC2_SDCF_SDTFV_Pos (0UL) /*!< HRPWM0_HRC2 SDCF: SDTFV (Bit 0) */ +#define HRPWM0_HRC2_SDCF_SDTFV_Msk (0xffffUL) /*!< HRPWM0_HRC2 SDCF: SDTFV (Bitfield-Mask: 0xffff) */ + +/* ------------------------------ HRPWM0_HRC2_SCR1 ------------------------------ */ +#define HRPWM0_HRC2_SCR1_SCR1_Pos (0UL) /*!< HRPWM0_HRC2 SCR1: SCR1 (Bit 0) */ +#define HRPWM0_HRC2_SCR1_SCR1_Msk (0xffUL) /*!< HRPWM0_HRC2 SCR1: SCR1 (Bitfield-Mask: 0xff) */ + +/* ------------------------------ HRPWM0_HRC2_SCR2 ------------------------------ */ +#define HRPWM0_HRC2_SCR2_SCR2_Pos (0UL) /*!< HRPWM0_HRC2 SCR2: SCR2 (Bit 0) */ +#define HRPWM0_HRC2_SCR2_SCR2_Msk (0xffUL) /*!< HRPWM0_HRC2 SCR2: SCR2 (Bitfield-Mask: 0xff) */ + + +/* ================================================================================ */ +/* ================ struct 'HRPWM0_HRC3' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ------------------------------- HRPWM0_HRC3_GC ------------------------------- */ +#define HRPWM0_HRC3_GC_HRM0_Pos (0UL) /*!< HRPWM0_HRC3 GC: HRM0 (Bit 0) */ +#define HRPWM0_HRC3_GC_HRM0_Msk (0x3UL) /*!< HRPWM0_HRC3 GC: HRM0 (Bitfield-Mask: 0x03) */ +#define HRPWM0_HRC3_GC_HRM1_Pos (2UL) /*!< HRPWM0_HRC3 GC: HRM1 (Bit 2) */ +#define HRPWM0_HRC3_GC_HRM1_Msk (0xcUL) /*!< HRPWM0_HRC3 GC: HRM1 (Bitfield-Mask: 0x03) */ +#define HRPWM0_HRC3_GC_DTE_Pos (8UL) /*!< HRPWM0_HRC3 GC: DTE (Bit 8) */ +#define HRPWM0_HRC3_GC_DTE_Msk (0x100UL) /*!< HRPWM0_HRC3 GC: DTE (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRC3_GC_TR0E_Pos (9UL) /*!< HRPWM0_HRC3 GC: TR0E (Bit 9) */ +#define HRPWM0_HRC3_GC_TR0E_Msk (0x200UL) /*!< HRPWM0_HRC3 GC: TR0E (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRC3_GC_TR1E_Pos (10UL) /*!< HRPWM0_HRC3 GC: TR1E (Bit 10) */ +#define HRPWM0_HRC3_GC_TR1E_Msk (0x400UL) /*!< HRPWM0_HRC3 GC: TR1E (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRC3_GC_STC_Pos (11UL) /*!< HRPWM0_HRC3 GC: STC (Bit 11) */ +#define HRPWM0_HRC3_GC_STC_Msk (0x800UL) /*!< HRPWM0_HRC3 GC: STC (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRC3_GC_DSTC_Pos (12UL) /*!< HRPWM0_HRC3 GC: DSTC (Bit 12) */ +#define HRPWM0_HRC3_GC_DSTC_Msk (0x1000UL) /*!< HRPWM0_HRC3 GC: DSTC (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRC3_GC_OCS0_Pos (13UL) /*!< HRPWM0_HRC3 GC: OCS0 (Bit 13) */ +#define HRPWM0_HRC3_GC_OCS0_Msk (0x2000UL) /*!< HRPWM0_HRC3 GC: OCS0 (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRC3_GC_OCS1_Pos (14UL) /*!< HRPWM0_HRC3 GC: OCS1 (Bit 14) */ +#define HRPWM0_HRC3_GC_OCS1_Msk (0x4000UL) /*!< HRPWM0_HRC3 GC: OCS1 (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRC3_GC_DTUS_Pos (16UL) /*!< HRPWM0_HRC3 GC: DTUS (Bit 16) */ +#define HRPWM0_HRC3_GC_DTUS_Msk (0x10000UL) /*!< HRPWM0_HRC3 GC: DTUS (Bitfield-Mask: 0x01) */ + +/* ------------------------------- HRPWM0_HRC3_PL ------------------------------- */ +#define HRPWM0_HRC3_PL_PSL0_Pos (0UL) /*!< HRPWM0_HRC3 PL: PSL0 (Bit 0) */ +#define HRPWM0_HRC3_PL_PSL0_Msk (0x1UL) /*!< HRPWM0_HRC3 PL: PSL0 (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRC3_PL_PSL1_Pos (1UL) /*!< HRPWM0_HRC3 PL: PSL1 (Bit 1) */ +#define HRPWM0_HRC3_PL_PSL1_Msk (0x2UL) /*!< HRPWM0_HRC3 PL: PSL1 (Bitfield-Mask: 0x01) */ + +/* ------------------------------ HRPWM0_HRC3_GSEL ------------------------------ */ +#define HRPWM0_HRC3_GSEL_C0SS_Pos (0UL) /*!< HRPWM0_HRC3 GSEL: C0SS (Bit 0) */ +#define HRPWM0_HRC3_GSEL_C0SS_Msk (0x7UL) /*!< HRPWM0_HRC3 GSEL: C0SS (Bitfield-Mask: 0x07) */ +#define HRPWM0_HRC3_GSEL_C0CS_Pos (3UL) /*!< HRPWM0_HRC3 GSEL: C0CS (Bit 3) */ +#define HRPWM0_HRC3_GSEL_C0CS_Msk (0x38UL) /*!< HRPWM0_HRC3 GSEL: C0CS (Bitfield-Mask: 0x07) */ +#define HRPWM0_HRC3_GSEL_S0M_Pos (6UL) /*!< HRPWM0_HRC3 GSEL: S0M (Bit 6) */ +#define HRPWM0_HRC3_GSEL_S0M_Msk (0xc0UL) /*!< HRPWM0_HRC3 GSEL: S0M (Bitfield-Mask: 0x03) */ +#define HRPWM0_HRC3_GSEL_C0M_Pos (8UL) /*!< HRPWM0_HRC3 GSEL: C0M (Bit 8) */ +#define HRPWM0_HRC3_GSEL_C0M_Msk (0x300UL) /*!< HRPWM0_HRC3 GSEL: C0M (Bitfield-Mask: 0x03) */ +#define HRPWM0_HRC3_GSEL_S0ES_Pos (10UL) /*!< HRPWM0_HRC3 GSEL: S0ES (Bit 10) */ +#define HRPWM0_HRC3_GSEL_S0ES_Msk (0xc00UL) /*!< HRPWM0_HRC3 GSEL: S0ES (Bitfield-Mask: 0x03) */ +#define HRPWM0_HRC3_GSEL_C0ES_Pos (12UL) /*!< HRPWM0_HRC3 GSEL: C0ES (Bit 12) */ +#define HRPWM0_HRC3_GSEL_C0ES_Msk (0x3000UL) /*!< HRPWM0_HRC3 GSEL: C0ES (Bitfield-Mask: 0x03) */ +#define HRPWM0_HRC3_GSEL_C1SS_Pos (16UL) /*!< HRPWM0_HRC3 GSEL: C1SS (Bit 16) */ +#define HRPWM0_HRC3_GSEL_C1SS_Msk (0x70000UL) /*!< HRPWM0_HRC3 GSEL: C1SS (Bitfield-Mask: 0x07) */ +#define HRPWM0_HRC3_GSEL_C1CS_Pos (19UL) /*!< HRPWM0_HRC3 GSEL: C1CS (Bit 19) */ +#define HRPWM0_HRC3_GSEL_C1CS_Msk (0x380000UL) /*!< HRPWM0_HRC3 GSEL: C1CS (Bitfield-Mask: 0x07) */ +#define HRPWM0_HRC3_GSEL_S1M_Pos (22UL) /*!< HRPWM0_HRC3 GSEL: S1M (Bit 22) */ +#define HRPWM0_HRC3_GSEL_S1M_Msk (0xc00000UL) /*!< HRPWM0_HRC3 GSEL: S1M (Bitfield-Mask: 0x03) */ +#define HRPWM0_HRC3_GSEL_C1M_Pos (24UL) /*!< HRPWM0_HRC3 GSEL: C1M (Bit 24) */ +#define HRPWM0_HRC3_GSEL_C1M_Msk (0x3000000UL) /*!< HRPWM0_HRC3 GSEL: C1M (Bitfield-Mask: 0x03) */ +#define HRPWM0_HRC3_GSEL_S1ES_Pos (26UL) /*!< HRPWM0_HRC3 GSEL: S1ES (Bit 26) */ +#define HRPWM0_HRC3_GSEL_S1ES_Msk (0xc000000UL) /*!< HRPWM0_HRC3 GSEL: S1ES (Bitfield-Mask: 0x03) */ +#define HRPWM0_HRC3_GSEL_C1ES_Pos (28UL) /*!< HRPWM0_HRC3 GSEL: C1ES (Bit 28) */ +#define HRPWM0_HRC3_GSEL_C1ES_Msk (0x30000000UL) /*!< HRPWM0_HRC3 GSEL: C1ES (Bitfield-Mask: 0x03) */ + +/* ------------------------------ HRPWM0_HRC3_TSEL ------------------------------ */ +#define HRPWM0_HRC3_TSEL_TSEL0_Pos (0UL) /*!< HRPWM0_HRC3 TSEL: TSEL0 (Bit 0) */ +#define HRPWM0_HRC3_TSEL_TSEL0_Msk (0x7UL) /*!< HRPWM0_HRC3 TSEL: TSEL0 (Bitfield-Mask: 0x07) */ +#define HRPWM0_HRC3_TSEL_TSEL1_Pos (3UL) /*!< HRPWM0_HRC3 TSEL: TSEL1 (Bit 3) */ +#define HRPWM0_HRC3_TSEL_TSEL1_Msk (0x38UL) /*!< HRPWM0_HRC3 TSEL: TSEL1 (Bitfield-Mask: 0x07) */ +#define HRPWM0_HRC3_TSEL_TS0E_Pos (16UL) /*!< HRPWM0_HRC3 TSEL: TS0E (Bit 16) */ +#define HRPWM0_HRC3_TSEL_TS0E_Msk (0x10000UL) /*!< HRPWM0_HRC3 TSEL: TS0E (Bitfield-Mask: 0x01) */ +#define HRPWM0_HRC3_TSEL_TS1E_Pos (17UL) /*!< HRPWM0_HRC3 TSEL: TS1E (Bit 17) */ +#define HRPWM0_HRC3_TSEL_TS1E_Msk (0x20000UL) /*!< HRPWM0_HRC3 TSEL: TS1E (Bitfield-Mask: 0x01) */ + +/* ------------------------------- HRPWM0_HRC3_SC ------------------------------- */ +#define HRPWM0_HRC3_SC_ST_Pos (0UL) /*!< HRPWM0_HRC3 SC: ST (Bit 0) */ +#define HRPWM0_HRC3_SC_ST_Msk (0x1UL) /*!< HRPWM0_HRC3 SC: ST (Bitfield-Mask: 0x01) */ + +/* ------------------------------- HRPWM0_HRC3_DCR ------------------------------ */ +#define HRPWM0_HRC3_DCR_DTRV_Pos (0UL) /*!< HRPWM0_HRC3 DCR: DTRV (Bit 0) */ +#define HRPWM0_HRC3_DCR_DTRV_Msk (0xffffUL) /*!< HRPWM0_HRC3 DCR: DTRV (Bitfield-Mask: 0xffff) */ + +/* ------------------------------- HRPWM0_HRC3_DCF ------------------------------ */ +#define HRPWM0_HRC3_DCF_DTFV_Pos (0UL) /*!< HRPWM0_HRC3 DCF: DTFV (Bit 0) */ +#define HRPWM0_HRC3_DCF_DTFV_Msk (0xffffUL) /*!< HRPWM0_HRC3 DCF: DTFV (Bitfield-Mask: 0xffff) */ + +/* ------------------------------- HRPWM0_HRC3_CR1 ------------------------------ */ +#define HRPWM0_HRC3_CR1_CR1_Pos (0UL) /*!< HRPWM0_HRC3 CR1: CR1 (Bit 0) */ +#define HRPWM0_HRC3_CR1_CR1_Msk (0xffUL) /*!< HRPWM0_HRC3 CR1: CR1 (Bitfield-Mask: 0xff) */ + +/* ------------------------------- HRPWM0_HRC3_CR2 ------------------------------ */ +#define HRPWM0_HRC3_CR2_CR2_Pos (0UL) /*!< HRPWM0_HRC3 CR2: CR2 (Bit 0) */ +#define HRPWM0_HRC3_CR2_CR2_Msk (0xffUL) /*!< HRPWM0_HRC3 CR2: CR2 (Bitfield-Mask: 0xff) */ + +/* ------------------------------- HRPWM0_HRC3_SSC ------------------------------ */ +#define HRPWM0_HRC3_SSC_SST_Pos (0UL) /*!< HRPWM0_HRC3 SSC: SST (Bit 0) */ +#define HRPWM0_HRC3_SSC_SST_Msk (0x1UL) /*!< HRPWM0_HRC3 SSC: SST (Bitfield-Mask: 0x01) */ + +/* ------------------------------ HRPWM0_HRC3_SDCR ------------------------------ */ +#define HRPWM0_HRC3_SDCR_SDTRV_Pos (0UL) /*!< HRPWM0_HRC3 SDCR: SDTRV (Bit 0) */ +#define HRPWM0_HRC3_SDCR_SDTRV_Msk (0xffffUL) /*!< HRPWM0_HRC3 SDCR: SDTRV (Bitfield-Mask: 0xffff) */ + +/* ------------------------------ HRPWM0_HRC3_SDCF ------------------------------ */ +#define HRPWM0_HRC3_SDCF_SDTFV_Pos (0UL) /*!< HRPWM0_HRC3 SDCF: SDTFV (Bit 0) */ +#define HRPWM0_HRC3_SDCF_SDTFV_Msk (0xffffUL) /*!< HRPWM0_HRC3 SDCF: SDTFV (Bitfield-Mask: 0xffff) */ + +/* ------------------------------ HRPWM0_HRC3_SCR1 ------------------------------ */ +#define HRPWM0_HRC3_SCR1_SCR1_Pos (0UL) /*!< HRPWM0_HRC3 SCR1: SCR1 (Bit 0) */ +#define HRPWM0_HRC3_SCR1_SCR1_Msk (0xffUL) /*!< HRPWM0_HRC3 SCR1: SCR1 (Bitfield-Mask: 0xff) */ + +/* ------------------------------ HRPWM0_HRC3_SCR2 ------------------------------ */ +#define HRPWM0_HRC3_SCR2_SCR2_Pos (0UL) /*!< HRPWM0_HRC3 SCR2: SCR2 (Bit 0) */ +#define HRPWM0_HRC3_SCR2_SCR2_Msk (0xffUL) /*!< HRPWM0_HRC3 SCR2: SCR2 (Bitfield-Mask: 0xff) */ + + +/* ================================================================================ */ +/* ================ Group 'POSIF' Position & Mask ================ */ +/* ================================================================================ */ + + +/* --------------------------------- POSIF_PCONF -------------------------------- */ +#define POSIF_PCONF_FSEL_Pos (0UL) /*!< POSIF PCONF: FSEL (Bit 0) */ +#define POSIF_PCONF_FSEL_Msk (0x3UL) /*!< POSIF PCONF: FSEL (Bitfield-Mask: 0x03) */ +#define POSIF_PCONF_QDCM_Pos (2UL) /*!< POSIF PCONF: QDCM (Bit 2) */ +#define POSIF_PCONF_QDCM_Msk (0x4UL) /*!< POSIF PCONF: QDCM (Bitfield-Mask: 0x01) */ +#define POSIF_PCONF_HIDG_Pos (4UL) /*!< POSIF PCONF: HIDG (Bit 4) */ +#define POSIF_PCONF_HIDG_Msk (0x10UL) /*!< POSIF PCONF: HIDG (Bitfield-Mask: 0x01) */ +#define POSIF_PCONF_MCUE_Pos (5UL) /*!< POSIF PCONF: MCUE (Bit 5) */ +#define POSIF_PCONF_MCUE_Msk (0x20UL) /*!< POSIF PCONF: MCUE (Bitfield-Mask: 0x01) */ +#define POSIF_PCONF_INSEL0_Pos (8UL) /*!< POSIF PCONF: INSEL0 (Bit 8) */ +#define POSIF_PCONF_INSEL0_Msk (0x300UL) /*!< POSIF PCONF: INSEL0 (Bitfield-Mask: 0x03) */ +#define POSIF_PCONF_INSEL1_Pos (10UL) /*!< POSIF PCONF: INSEL1 (Bit 10) */ +#define POSIF_PCONF_INSEL1_Msk (0xc00UL) /*!< POSIF PCONF: INSEL1 (Bitfield-Mask: 0x03) */ +#define POSIF_PCONF_INSEL2_Pos (12UL) /*!< POSIF PCONF: INSEL2 (Bit 12) */ +#define POSIF_PCONF_INSEL2_Msk (0x3000UL) /*!< POSIF PCONF: INSEL2 (Bitfield-Mask: 0x03) */ +#define POSIF_PCONF_DSEL_Pos (16UL) /*!< POSIF PCONF: DSEL (Bit 16) */ +#define POSIF_PCONF_DSEL_Msk (0x10000UL) /*!< POSIF PCONF: DSEL (Bitfield-Mask: 0x01) */ +#define POSIF_PCONF_SPES_Pos (17UL) /*!< POSIF PCONF: SPES (Bit 17) */ +#define POSIF_PCONF_SPES_Msk (0x20000UL) /*!< POSIF PCONF: SPES (Bitfield-Mask: 0x01) */ +#define POSIF_PCONF_MSETS_Pos (18UL) /*!< POSIF PCONF: MSETS (Bit 18) */ +#define POSIF_PCONF_MSETS_Msk (0x1c0000UL) /*!< POSIF PCONF: MSETS (Bitfield-Mask: 0x07) */ +#define POSIF_PCONF_MSES_Pos (21UL) /*!< POSIF PCONF: MSES (Bit 21) */ +#define POSIF_PCONF_MSES_Msk (0x200000UL) /*!< POSIF PCONF: MSES (Bitfield-Mask: 0x01) */ +#define POSIF_PCONF_MSYNS_Pos (22UL) /*!< POSIF PCONF: MSYNS (Bit 22) */ +#define POSIF_PCONF_MSYNS_Msk (0xc00000UL) /*!< POSIF PCONF: MSYNS (Bitfield-Mask: 0x03) */ +#define POSIF_PCONF_EWIS_Pos (24UL) /*!< POSIF PCONF: EWIS (Bit 24) */ +#define POSIF_PCONF_EWIS_Msk (0x3000000UL) /*!< POSIF PCONF: EWIS (Bitfield-Mask: 0x03) */ +#define POSIF_PCONF_EWIE_Pos (26UL) /*!< POSIF PCONF: EWIE (Bit 26) */ +#define POSIF_PCONF_EWIE_Msk (0x4000000UL) /*!< POSIF PCONF: EWIE (Bitfield-Mask: 0x01) */ +#define POSIF_PCONF_EWIL_Pos (27UL) /*!< POSIF PCONF: EWIL (Bit 27) */ +#define POSIF_PCONF_EWIL_Msk (0x8000000UL) /*!< POSIF PCONF: EWIL (Bitfield-Mask: 0x01) */ +#define POSIF_PCONF_LPC_Pos (28UL) /*!< POSIF PCONF: LPC (Bit 28) */ +#define POSIF_PCONF_LPC_Msk (0x70000000UL) /*!< POSIF PCONF: LPC (Bitfield-Mask: 0x07) */ + +/* --------------------------------- POSIF_PSUS --------------------------------- */ +#define POSIF_PSUS_QSUS_Pos (0UL) /*!< POSIF PSUS: QSUS (Bit 0) */ +#define POSIF_PSUS_QSUS_Msk (0x3UL) /*!< POSIF PSUS: QSUS (Bitfield-Mask: 0x03) */ +#define POSIF_PSUS_MSUS_Pos (2UL) /*!< POSIF PSUS: MSUS (Bit 2) */ +#define POSIF_PSUS_MSUS_Msk (0xcUL) /*!< POSIF PSUS: MSUS (Bitfield-Mask: 0x03) */ + +/* --------------------------------- POSIF_PRUNS -------------------------------- */ +#define POSIF_PRUNS_SRB_Pos (0UL) /*!< POSIF PRUNS: SRB (Bit 0) */ +#define POSIF_PRUNS_SRB_Msk (0x1UL) /*!< POSIF PRUNS: SRB (Bitfield-Mask: 0x01) */ + +/* --------------------------------- POSIF_PRUNC -------------------------------- */ +#define POSIF_PRUNC_CRB_Pos (0UL) /*!< POSIF PRUNC: CRB (Bit 0) */ +#define POSIF_PRUNC_CRB_Msk (0x1UL) /*!< POSIF PRUNC: CRB (Bitfield-Mask: 0x01) */ +#define POSIF_PRUNC_CSM_Pos (1UL) /*!< POSIF PRUNC: CSM (Bit 1) */ +#define POSIF_PRUNC_CSM_Msk (0x2UL) /*!< POSIF PRUNC: CSM (Bitfield-Mask: 0x01) */ + +/* --------------------------------- POSIF_PRUN --------------------------------- */ +#define POSIF_PRUN_RB_Pos (0UL) /*!< POSIF PRUN: RB (Bit 0) */ +#define POSIF_PRUN_RB_Msk (0x1UL) /*!< POSIF PRUN: RB (Bitfield-Mask: 0x01) */ + +/* --------------------------------- POSIF_MIDR --------------------------------- */ +#define POSIF_MIDR_MODR_Pos (0UL) /*!< POSIF MIDR: MODR (Bit 0) */ +#define POSIF_MIDR_MODR_Msk (0xffUL) /*!< POSIF MIDR: MODR (Bitfield-Mask: 0xff) */ +#define POSIF_MIDR_MODT_Pos (8UL) /*!< POSIF MIDR: MODT (Bit 8) */ +#define POSIF_MIDR_MODT_Msk (0xff00UL) /*!< POSIF MIDR: MODT (Bitfield-Mask: 0xff) */ +#define POSIF_MIDR_MODN_Pos (16UL) /*!< POSIF MIDR: MODN (Bit 16) */ +#define POSIF_MIDR_MODN_Msk (0xffff0000UL) /*!< POSIF MIDR: MODN (Bitfield-Mask: 0xffff) */ + +/* --------------------------------- POSIF_HALP --------------------------------- */ +#define POSIF_HALP_HCP_Pos (0UL) /*!< POSIF HALP: HCP (Bit 0) */ +#define POSIF_HALP_HCP_Msk (0x7UL) /*!< POSIF HALP: HCP (Bitfield-Mask: 0x07) */ +#define POSIF_HALP_HEP_Pos (3UL) /*!< POSIF HALP: HEP (Bit 3) */ +#define POSIF_HALP_HEP_Msk (0x38UL) /*!< POSIF HALP: HEP (Bitfield-Mask: 0x07) */ + +/* --------------------------------- POSIF_HALPS -------------------------------- */ +#define POSIF_HALPS_HCPS_Pos (0UL) /*!< POSIF HALPS: HCPS (Bit 0) */ +#define POSIF_HALPS_HCPS_Msk (0x7UL) /*!< POSIF HALPS: HCPS (Bitfield-Mask: 0x07) */ +#define POSIF_HALPS_HEPS_Pos (3UL) /*!< POSIF HALPS: HEPS (Bit 3) */ +#define POSIF_HALPS_HEPS_Msk (0x38UL) /*!< POSIF HALPS: HEPS (Bitfield-Mask: 0x07) */ + +/* ---------------------------------- POSIF_MCM --------------------------------- */ +#define POSIF_MCM_MCMP_Pos (0UL) /*!< POSIF MCM: MCMP (Bit 0) */ +#define POSIF_MCM_MCMP_Msk (0xffffUL) /*!< POSIF MCM: MCMP (Bitfield-Mask: 0xffff) */ + +/* --------------------------------- POSIF_MCSM --------------------------------- */ +#define POSIF_MCSM_MCMPS_Pos (0UL) /*!< POSIF MCSM: MCMPS (Bit 0) */ +#define POSIF_MCSM_MCMPS_Msk (0xffffUL) /*!< POSIF MCSM: MCMPS (Bitfield-Mask: 0xffff) */ + +/* --------------------------------- POSIF_MCMS --------------------------------- */ +#define POSIF_MCMS_MNPS_Pos (0UL) /*!< POSIF MCMS: MNPS (Bit 0) */ +#define POSIF_MCMS_MNPS_Msk (0x1UL) /*!< POSIF MCMS: MNPS (Bitfield-Mask: 0x01) */ +#define POSIF_MCMS_STHR_Pos (1UL) /*!< POSIF MCMS: STHR (Bit 1) */ +#define POSIF_MCMS_STHR_Msk (0x2UL) /*!< POSIF MCMS: STHR (Bitfield-Mask: 0x01) */ +#define POSIF_MCMS_STMR_Pos (2UL) /*!< POSIF MCMS: STMR (Bit 2) */ +#define POSIF_MCMS_STMR_Msk (0x4UL) /*!< POSIF MCMS: STMR (Bitfield-Mask: 0x01) */ + +/* --------------------------------- POSIF_MCMC --------------------------------- */ +#define POSIF_MCMC_MNPC_Pos (0UL) /*!< POSIF MCMC: MNPC (Bit 0) */ +#define POSIF_MCMC_MNPC_Msk (0x1UL) /*!< POSIF MCMC: MNPC (Bitfield-Mask: 0x01) */ +#define POSIF_MCMC_MPC_Pos (1UL) /*!< POSIF MCMC: MPC (Bit 1) */ +#define POSIF_MCMC_MPC_Msk (0x2UL) /*!< POSIF MCMC: MPC (Bitfield-Mask: 0x01) */ + +/* --------------------------------- POSIF_MCMF --------------------------------- */ +#define POSIF_MCMF_MSS_Pos (0UL) /*!< POSIF MCMF: MSS (Bit 0) */ +#define POSIF_MCMF_MSS_Msk (0x1UL) /*!< POSIF MCMF: MSS (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- POSIF_QDC --------------------------------- */ +#define POSIF_QDC_PALS_Pos (0UL) /*!< POSIF QDC: PALS (Bit 0) */ +#define POSIF_QDC_PALS_Msk (0x1UL) /*!< POSIF QDC: PALS (Bitfield-Mask: 0x01) */ +#define POSIF_QDC_PBLS_Pos (1UL) /*!< POSIF QDC: PBLS (Bit 1) */ +#define POSIF_QDC_PBLS_Msk (0x2UL) /*!< POSIF QDC: PBLS (Bitfield-Mask: 0x01) */ +#define POSIF_QDC_PHS_Pos (2UL) /*!< POSIF QDC: PHS (Bit 2) */ +#define POSIF_QDC_PHS_Msk (0x4UL) /*!< POSIF QDC: PHS (Bitfield-Mask: 0x01) */ +#define POSIF_QDC_ICM_Pos (4UL) /*!< POSIF QDC: ICM (Bit 4) */ +#define POSIF_QDC_ICM_Msk (0x30UL) /*!< POSIF QDC: ICM (Bitfield-Mask: 0x03) */ +#define POSIF_QDC_DVAL_Pos (8UL) /*!< POSIF QDC: DVAL (Bit 8) */ +#define POSIF_QDC_DVAL_Msk (0x100UL) /*!< POSIF QDC: DVAL (Bitfield-Mask: 0x01) */ + +/* --------------------------------- POSIF_PFLG --------------------------------- */ +#define POSIF_PFLG_CHES_Pos (0UL) /*!< POSIF PFLG: CHES (Bit 0) */ +#define POSIF_PFLG_CHES_Msk (0x1UL) /*!< POSIF PFLG: CHES (Bitfield-Mask: 0x01) */ +#define POSIF_PFLG_WHES_Pos (1UL) /*!< POSIF PFLG: WHES (Bit 1) */ +#define POSIF_PFLG_WHES_Msk (0x2UL) /*!< POSIF PFLG: WHES (Bitfield-Mask: 0x01) */ +#define POSIF_PFLG_HIES_Pos (2UL) /*!< POSIF PFLG: HIES (Bit 2) */ +#define POSIF_PFLG_HIES_Msk (0x4UL) /*!< POSIF PFLG: HIES (Bitfield-Mask: 0x01) */ +#define POSIF_PFLG_MSTS_Pos (4UL) /*!< POSIF PFLG: MSTS (Bit 4) */ +#define POSIF_PFLG_MSTS_Msk (0x10UL) /*!< POSIF PFLG: MSTS (Bitfield-Mask: 0x01) */ +#define POSIF_PFLG_INDXS_Pos (8UL) /*!< POSIF PFLG: INDXS (Bit 8) */ +#define POSIF_PFLG_INDXS_Msk (0x100UL) /*!< POSIF PFLG: INDXS (Bitfield-Mask: 0x01) */ +#define POSIF_PFLG_ERRS_Pos (9UL) /*!< POSIF PFLG: ERRS (Bit 9) */ +#define POSIF_PFLG_ERRS_Msk (0x200UL) /*!< POSIF PFLG: ERRS (Bitfield-Mask: 0x01) */ +#define POSIF_PFLG_CNTS_Pos (10UL) /*!< POSIF PFLG: CNTS (Bit 10) */ +#define POSIF_PFLG_CNTS_Msk (0x400UL) /*!< POSIF PFLG: CNTS (Bitfield-Mask: 0x01) */ +#define POSIF_PFLG_DIRS_Pos (11UL) /*!< POSIF PFLG: DIRS (Bit 11) */ +#define POSIF_PFLG_DIRS_Msk (0x800UL) /*!< POSIF PFLG: DIRS (Bitfield-Mask: 0x01) */ +#define POSIF_PFLG_PCLKS_Pos (12UL) /*!< POSIF PFLG: PCLKS (Bit 12) */ +#define POSIF_PFLG_PCLKS_Msk (0x1000UL) /*!< POSIF PFLG: PCLKS (Bitfield-Mask: 0x01) */ + +/* --------------------------------- POSIF_PFLGE -------------------------------- */ +#define POSIF_PFLGE_ECHE_Pos (0UL) /*!< POSIF PFLGE: ECHE (Bit 0) */ +#define POSIF_PFLGE_ECHE_Msk (0x1UL) /*!< POSIF PFLGE: ECHE (Bitfield-Mask: 0x01) */ +#define POSIF_PFLGE_EWHE_Pos (1UL) /*!< POSIF PFLGE: EWHE (Bit 1) */ +#define POSIF_PFLGE_EWHE_Msk (0x2UL) /*!< POSIF PFLGE: EWHE (Bitfield-Mask: 0x01) */ +#define POSIF_PFLGE_EHIE_Pos (2UL) /*!< POSIF PFLGE: EHIE (Bit 2) */ +#define POSIF_PFLGE_EHIE_Msk (0x4UL) /*!< POSIF PFLGE: EHIE (Bitfield-Mask: 0x01) */ +#define POSIF_PFLGE_EMST_Pos (4UL) /*!< POSIF PFLGE: EMST (Bit 4) */ +#define POSIF_PFLGE_EMST_Msk (0x10UL) /*!< POSIF PFLGE: EMST (Bitfield-Mask: 0x01) */ +#define POSIF_PFLGE_EINDX_Pos (8UL) /*!< POSIF PFLGE: EINDX (Bit 8) */ +#define POSIF_PFLGE_EINDX_Msk (0x100UL) /*!< POSIF PFLGE: EINDX (Bitfield-Mask: 0x01) */ +#define POSIF_PFLGE_EERR_Pos (9UL) /*!< POSIF PFLGE: EERR (Bit 9) */ +#define POSIF_PFLGE_EERR_Msk (0x200UL) /*!< POSIF PFLGE: EERR (Bitfield-Mask: 0x01) */ +#define POSIF_PFLGE_ECNT_Pos (10UL) /*!< POSIF PFLGE: ECNT (Bit 10) */ +#define POSIF_PFLGE_ECNT_Msk (0x400UL) /*!< POSIF PFLGE: ECNT (Bitfield-Mask: 0x01) */ +#define POSIF_PFLGE_EDIR_Pos (11UL) /*!< POSIF PFLGE: EDIR (Bit 11) */ +#define POSIF_PFLGE_EDIR_Msk (0x800UL) /*!< POSIF PFLGE: EDIR (Bitfield-Mask: 0x01) */ +#define POSIF_PFLGE_EPCLK_Pos (12UL) /*!< POSIF PFLGE: EPCLK (Bit 12) */ +#define POSIF_PFLGE_EPCLK_Msk (0x1000UL) /*!< POSIF PFLGE: EPCLK (Bitfield-Mask: 0x01) */ +#define POSIF_PFLGE_CHESEL_Pos (16UL) /*!< POSIF PFLGE: CHESEL (Bit 16) */ +#define POSIF_PFLGE_CHESEL_Msk (0x10000UL) /*!< POSIF PFLGE: CHESEL (Bitfield-Mask: 0x01) */ +#define POSIF_PFLGE_WHESEL_Pos (17UL) /*!< POSIF PFLGE: WHESEL (Bit 17) */ +#define POSIF_PFLGE_WHESEL_Msk (0x20000UL) /*!< POSIF PFLGE: WHESEL (Bitfield-Mask: 0x01) */ +#define POSIF_PFLGE_HIESEL_Pos (18UL) /*!< POSIF PFLGE: HIESEL (Bit 18) */ +#define POSIF_PFLGE_HIESEL_Msk (0x40000UL) /*!< POSIF PFLGE: HIESEL (Bitfield-Mask: 0x01) */ +#define POSIF_PFLGE_MSTSEL_Pos (20UL) /*!< POSIF PFLGE: MSTSEL (Bit 20) */ +#define POSIF_PFLGE_MSTSEL_Msk (0x100000UL) /*!< POSIF PFLGE: MSTSEL (Bitfield-Mask: 0x01) */ +#define POSIF_PFLGE_INDSEL_Pos (24UL) /*!< POSIF PFLGE: INDSEL (Bit 24) */ +#define POSIF_PFLGE_INDSEL_Msk (0x1000000UL) /*!< POSIF PFLGE: INDSEL (Bitfield-Mask: 0x01) */ +#define POSIF_PFLGE_ERRSEL_Pos (25UL) /*!< POSIF PFLGE: ERRSEL (Bit 25) */ +#define POSIF_PFLGE_ERRSEL_Msk (0x2000000UL) /*!< POSIF PFLGE: ERRSEL (Bitfield-Mask: 0x01) */ +#define POSIF_PFLGE_CNTSEL_Pos (26UL) /*!< POSIF PFLGE: CNTSEL (Bit 26) */ +#define POSIF_PFLGE_CNTSEL_Msk (0x4000000UL) /*!< POSIF PFLGE: CNTSEL (Bitfield-Mask: 0x01) */ +#define POSIF_PFLGE_DIRSEL_Pos (27UL) /*!< POSIF PFLGE: DIRSEL (Bit 27) */ +#define POSIF_PFLGE_DIRSEL_Msk (0x8000000UL) /*!< POSIF PFLGE: DIRSEL (Bitfield-Mask: 0x01) */ +#define POSIF_PFLGE_PCLSEL_Pos (28UL) /*!< POSIF PFLGE: PCLSEL (Bit 28) */ +#define POSIF_PFLGE_PCLSEL_Msk (0x10000000UL) /*!< POSIF PFLGE: PCLSEL (Bitfield-Mask: 0x01) */ + +/* --------------------------------- POSIF_SPFLG -------------------------------- */ +#define POSIF_SPFLG_SCHE_Pos (0UL) /*!< POSIF SPFLG: SCHE (Bit 0) */ +#define POSIF_SPFLG_SCHE_Msk (0x1UL) /*!< POSIF SPFLG: SCHE (Bitfield-Mask: 0x01) */ +#define POSIF_SPFLG_SWHE_Pos (1UL) /*!< POSIF SPFLG: SWHE (Bit 1) */ +#define POSIF_SPFLG_SWHE_Msk (0x2UL) /*!< POSIF SPFLG: SWHE (Bitfield-Mask: 0x01) */ +#define POSIF_SPFLG_SHIE_Pos (2UL) /*!< POSIF SPFLG: SHIE (Bit 2) */ +#define POSIF_SPFLG_SHIE_Msk (0x4UL) /*!< POSIF SPFLG: SHIE (Bitfield-Mask: 0x01) */ +#define POSIF_SPFLG_SMST_Pos (4UL) /*!< POSIF SPFLG: SMST (Bit 4) */ +#define POSIF_SPFLG_SMST_Msk (0x10UL) /*!< POSIF SPFLG: SMST (Bitfield-Mask: 0x01) */ +#define POSIF_SPFLG_SINDX_Pos (8UL) /*!< POSIF SPFLG: SINDX (Bit 8) */ +#define POSIF_SPFLG_SINDX_Msk (0x100UL) /*!< POSIF SPFLG: SINDX (Bitfield-Mask: 0x01) */ +#define POSIF_SPFLG_SERR_Pos (9UL) /*!< POSIF SPFLG: SERR (Bit 9) */ +#define POSIF_SPFLG_SERR_Msk (0x200UL) /*!< POSIF SPFLG: SERR (Bitfield-Mask: 0x01) */ +#define POSIF_SPFLG_SCNT_Pos (10UL) /*!< POSIF SPFLG: SCNT (Bit 10) */ +#define POSIF_SPFLG_SCNT_Msk (0x400UL) /*!< POSIF SPFLG: SCNT (Bitfield-Mask: 0x01) */ +#define POSIF_SPFLG_SDIR_Pos (11UL) /*!< POSIF SPFLG: SDIR (Bit 11) */ +#define POSIF_SPFLG_SDIR_Msk (0x800UL) /*!< POSIF SPFLG: SDIR (Bitfield-Mask: 0x01) */ +#define POSIF_SPFLG_SPCLK_Pos (12UL) /*!< POSIF SPFLG: SPCLK (Bit 12) */ +#define POSIF_SPFLG_SPCLK_Msk (0x1000UL) /*!< POSIF SPFLG: SPCLK (Bitfield-Mask: 0x01) */ + +/* --------------------------------- POSIF_RPFLG -------------------------------- */ +#define POSIF_RPFLG_RCHE_Pos (0UL) /*!< POSIF RPFLG: RCHE (Bit 0) */ +#define POSIF_RPFLG_RCHE_Msk (0x1UL) /*!< POSIF RPFLG: RCHE (Bitfield-Mask: 0x01) */ +#define POSIF_RPFLG_RWHE_Pos (1UL) /*!< POSIF RPFLG: RWHE (Bit 1) */ +#define POSIF_RPFLG_RWHE_Msk (0x2UL) /*!< POSIF RPFLG: RWHE (Bitfield-Mask: 0x01) */ +#define POSIF_RPFLG_RHIE_Pos (2UL) /*!< POSIF RPFLG: RHIE (Bit 2) */ +#define POSIF_RPFLG_RHIE_Msk (0x4UL) /*!< POSIF RPFLG: RHIE (Bitfield-Mask: 0x01) */ +#define POSIF_RPFLG_RMST_Pos (4UL) /*!< POSIF RPFLG: RMST (Bit 4) */ +#define POSIF_RPFLG_RMST_Msk (0x10UL) /*!< POSIF RPFLG: RMST (Bitfield-Mask: 0x01) */ +#define POSIF_RPFLG_RINDX_Pos (8UL) /*!< POSIF RPFLG: RINDX (Bit 8) */ +#define POSIF_RPFLG_RINDX_Msk (0x100UL) /*!< POSIF RPFLG: RINDX (Bitfield-Mask: 0x01) */ +#define POSIF_RPFLG_RERR_Pos (9UL) /*!< POSIF RPFLG: RERR (Bit 9) */ +#define POSIF_RPFLG_RERR_Msk (0x200UL) /*!< POSIF RPFLG: RERR (Bitfield-Mask: 0x01) */ +#define POSIF_RPFLG_RCNT_Pos (10UL) /*!< POSIF RPFLG: RCNT (Bit 10) */ +#define POSIF_RPFLG_RCNT_Msk (0x400UL) /*!< POSIF RPFLG: RCNT (Bitfield-Mask: 0x01) */ +#define POSIF_RPFLG_RDIR_Pos (11UL) /*!< POSIF RPFLG: RDIR (Bit 11) */ +#define POSIF_RPFLG_RDIR_Msk (0x800UL) /*!< POSIF RPFLG: RDIR (Bitfield-Mask: 0x01) */ +#define POSIF_RPFLG_RPCLK_Pos (12UL) /*!< POSIF RPFLG: RPCLK (Bit 12) */ +#define POSIF_RPFLG_RPCLK_Msk (0x1000UL) /*!< POSIF RPFLG: RPCLK (Bitfield-Mask: 0x01) */ + +/* --------------------------------- POSIF_PDBG --------------------------------- */ +#define POSIF_PDBG_QCSV_Pos (0UL) /*!< POSIF PDBG: QCSV (Bit 0) */ +#define POSIF_PDBG_QCSV_Msk (0x3UL) /*!< POSIF PDBG: QCSV (Bitfield-Mask: 0x03) */ +#define POSIF_PDBG_QPSV_Pos (2UL) /*!< POSIF PDBG: QPSV (Bit 2) */ +#define POSIF_PDBG_QPSV_Msk (0xcUL) /*!< POSIF PDBG: QPSV (Bitfield-Mask: 0x03) */ +#define POSIF_PDBG_IVAL_Pos (4UL) /*!< POSIF PDBG: IVAL (Bit 4) */ +#define POSIF_PDBG_IVAL_Msk (0x10UL) /*!< POSIF PDBG: IVAL (Bitfield-Mask: 0x01) */ +#define POSIF_PDBG_HSP_Pos (5UL) /*!< POSIF PDBG: HSP (Bit 5) */ +#define POSIF_PDBG_HSP_Msk (0xe0UL) /*!< POSIF PDBG: HSP (Bitfield-Mask: 0x07) */ +#define POSIF_PDBG_LPP0_Pos (8UL) /*!< POSIF PDBG: LPP0 (Bit 8) */ +#define POSIF_PDBG_LPP0_Msk (0x3f00UL) /*!< POSIF PDBG: LPP0 (Bitfield-Mask: 0x3f) */ +#define POSIF_PDBG_LPP1_Pos (16UL) /*!< POSIF PDBG: LPP1 (Bit 16) */ +#define POSIF_PDBG_LPP1_Msk (0x3f0000UL) /*!< POSIF PDBG: LPP1 (Bitfield-Mask: 0x3f) */ +#define POSIF_PDBG_LPP2_Pos (22UL) /*!< POSIF PDBG: LPP2 (Bit 22) */ +#define POSIF_PDBG_LPP2_Msk (0xfc00000UL) /*!< POSIF PDBG: LPP2 (Bitfield-Mask: 0x3f) */ + + +/* ================================================================================ */ +/* ================ struct 'PORT0' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ---------------------------------- PORT0_OUT --------------------------------- */ +#define PORT0_OUT_P0_Pos (0UL) /*!< PORT0 OUT: P0 (Bit 0) */ +#define PORT0_OUT_P0_Msk (0x1UL) /*!< PORT0 OUT: P0 (Bitfield-Mask: 0x01) */ +#define PORT0_OUT_P1_Pos (1UL) /*!< PORT0 OUT: P1 (Bit 1) */ +#define PORT0_OUT_P1_Msk (0x2UL) /*!< PORT0 OUT: P1 (Bitfield-Mask: 0x01) */ +#define PORT0_OUT_P2_Pos (2UL) /*!< PORT0 OUT: P2 (Bit 2) */ +#define PORT0_OUT_P2_Msk (0x4UL) /*!< PORT0 OUT: P2 (Bitfield-Mask: 0x01) */ +#define PORT0_OUT_P3_Pos (3UL) /*!< PORT0 OUT: P3 (Bit 3) */ +#define PORT0_OUT_P3_Msk (0x8UL) /*!< PORT0 OUT: P3 (Bitfield-Mask: 0x01) */ +#define PORT0_OUT_P4_Pos (4UL) /*!< PORT0 OUT: P4 (Bit 4) */ +#define PORT0_OUT_P4_Msk (0x10UL) /*!< PORT0 OUT: P4 (Bitfield-Mask: 0x01) */ +#define PORT0_OUT_P5_Pos (5UL) /*!< PORT0 OUT: P5 (Bit 5) */ +#define PORT0_OUT_P5_Msk (0x20UL) /*!< PORT0 OUT: P5 (Bitfield-Mask: 0x01) */ +#define PORT0_OUT_P6_Pos (6UL) /*!< PORT0 OUT: P6 (Bit 6) */ +#define PORT0_OUT_P6_Msk (0x40UL) /*!< PORT0 OUT: P6 (Bitfield-Mask: 0x01) */ +#define PORT0_OUT_P7_Pos (7UL) /*!< PORT0 OUT: P7 (Bit 7) */ +#define PORT0_OUT_P7_Msk (0x80UL) /*!< PORT0 OUT: P7 (Bitfield-Mask: 0x01) */ +#define PORT0_OUT_P8_Pos (8UL) /*!< PORT0 OUT: P8 (Bit 8) */ +#define PORT0_OUT_P8_Msk (0x100UL) /*!< PORT0 OUT: P8 (Bitfield-Mask: 0x01) */ +#define PORT0_OUT_P9_Pos (9UL) /*!< PORT0 OUT: P9 (Bit 9) */ +#define PORT0_OUT_P9_Msk (0x200UL) /*!< PORT0 OUT: P9 (Bitfield-Mask: 0x01) */ +#define PORT0_OUT_P10_Pos (10UL) /*!< PORT0 OUT: P10 (Bit 10) */ +#define PORT0_OUT_P10_Msk (0x400UL) /*!< PORT0 OUT: P10 (Bitfield-Mask: 0x01) */ +#define PORT0_OUT_P11_Pos (11UL) /*!< PORT0 OUT: P11 (Bit 11) */ +#define PORT0_OUT_P11_Msk (0x800UL) /*!< PORT0 OUT: P11 (Bitfield-Mask: 0x01) */ +#define PORT0_OUT_P12_Pos (12UL) /*!< PORT0 OUT: P12 (Bit 12) */ +#define PORT0_OUT_P12_Msk (0x1000UL) /*!< PORT0 OUT: P12 (Bitfield-Mask: 0x01) */ +#define PORT0_OUT_P13_Pos (13UL) /*!< PORT0 OUT: P13 (Bit 13) */ +#define PORT0_OUT_P13_Msk (0x2000UL) /*!< PORT0 OUT: P13 (Bitfield-Mask: 0x01) */ +#define PORT0_OUT_P14_Pos (14UL) /*!< PORT0 OUT: P14 (Bit 14) */ +#define PORT0_OUT_P14_Msk (0x4000UL) /*!< PORT0 OUT: P14 (Bitfield-Mask: 0x01) */ +#define PORT0_OUT_P15_Pos (15UL) /*!< PORT0 OUT: P15 (Bit 15) */ +#define PORT0_OUT_P15_Msk (0x8000UL) /*!< PORT0 OUT: P15 (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- PORT0_OMR --------------------------------- */ +#define PORT0_OMR_PS0_Pos (0UL) /*!< PORT0 OMR: PS0 (Bit 0) */ +#define PORT0_OMR_PS0_Msk (0x1UL) /*!< PORT0 OMR: PS0 (Bitfield-Mask: 0x01) */ +#define PORT0_OMR_PS1_Pos (1UL) /*!< PORT0 OMR: PS1 (Bit 1) */ +#define PORT0_OMR_PS1_Msk (0x2UL) /*!< PORT0 OMR: PS1 (Bitfield-Mask: 0x01) */ +#define PORT0_OMR_PS2_Pos (2UL) /*!< PORT0 OMR: PS2 (Bit 2) */ +#define PORT0_OMR_PS2_Msk (0x4UL) /*!< PORT0 OMR: PS2 (Bitfield-Mask: 0x01) */ +#define PORT0_OMR_PS3_Pos (3UL) /*!< PORT0 OMR: PS3 (Bit 3) */ +#define PORT0_OMR_PS3_Msk (0x8UL) /*!< PORT0 OMR: PS3 (Bitfield-Mask: 0x01) */ +#define PORT0_OMR_PS4_Pos (4UL) /*!< PORT0 OMR: PS4 (Bit 4) */ +#define PORT0_OMR_PS4_Msk (0x10UL) /*!< PORT0 OMR: PS4 (Bitfield-Mask: 0x01) */ +#define PORT0_OMR_PS5_Pos (5UL) /*!< PORT0 OMR: PS5 (Bit 5) */ +#define PORT0_OMR_PS5_Msk (0x20UL) /*!< PORT0 OMR: PS5 (Bitfield-Mask: 0x01) */ +#define PORT0_OMR_PS6_Pos (6UL) /*!< PORT0 OMR: PS6 (Bit 6) */ +#define PORT0_OMR_PS6_Msk (0x40UL) /*!< PORT0 OMR: PS6 (Bitfield-Mask: 0x01) */ +#define PORT0_OMR_PS7_Pos (7UL) /*!< PORT0 OMR: PS7 (Bit 7) */ +#define PORT0_OMR_PS7_Msk (0x80UL) /*!< PORT0 OMR: PS7 (Bitfield-Mask: 0x01) */ +#define PORT0_OMR_PS8_Pos (8UL) /*!< PORT0 OMR: PS8 (Bit 8) */ +#define PORT0_OMR_PS8_Msk (0x100UL) /*!< PORT0 OMR: PS8 (Bitfield-Mask: 0x01) */ +#define PORT0_OMR_PS9_Pos (9UL) /*!< PORT0 OMR: PS9 (Bit 9) */ +#define PORT0_OMR_PS9_Msk (0x200UL) /*!< PORT0 OMR: PS9 (Bitfield-Mask: 0x01) */ +#define PORT0_OMR_PS10_Pos (10UL) /*!< PORT0 OMR: PS10 (Bit 10) */ +#define PORT0_OMR_PS10_Msk (0x400UL) /*!< PORT0 OMR: PS10 (Bitfield-Mask: 0x01) */ +#define PORT0_OMR_PS11_Pos (11UL) /*!< PORT0 OMR: PS11 (Bit 11) */ +#define PORT0_OMR_PS11_Msk (0x800UL) /*!< PORT0 OMR: PS11 (Bitfield-Mask: 0x01) */ +#define PORT0_OMR_PS12_Pos (12UL) /*!< PORT0 OMR: PS12 (Bit 12) */ +#define PORT0_OMR_PS12_Msk (0x1000UL) /*!< PORT0 OMR: PS12 (Bitfield-Mask: 0x01) */ +#define PORT0_OMR_PS13_Pos (13UL) /*!< PORT0 OMR: PS13 (Bit 13) */ +#define PORT0_OMR_PS13_Msk (0x2000UL) /*!< PORT0 OMR: PS13 (Bitfield-Mask: 0x01) */ +#define PORT0_OMR_PS14_Pos (14UL) /*!< PORT0 OMR: PS14 (Bit 14) */ +#define PORT0_OMR_PS14_Msk (0x4000UL) /*!< PORT0 OMR: PS14 (Bitfield-Mask: 0x01) */ +#define PORT0_OMR_PS15_Pos (15UL) /*!< PORT0 OMR: PS15 (Bit 15) */ +#define PORT0_OMR_PS15_Msk (0x8000UL) /*!< PORT0 OMR: PS15 (Bitfield-Mask: 0x01) */ +#define PORT0_OMR_PR0_Pos (16UL) /*!< PORT0 OMR: PR0 (Bit 16) */ +#define PORT0_OMR_PR0_Msk (0x10000UL) /*!< PORT0 OMR: PR0 (Bitfield-Mask: 0x01) */ +#define PORT0_OMR_PR1_Pos (17UL) /*!< PORT0 OMR: PR1 (Bit 17) */ +#define PORT0_OMR_PR1_Msk (0x20000UL) /*!< PORT0 OMR: PR1 (Bitfield-Mask: 0x01) */ +#define PORT0_OMR_PR2_Pos (18UL) /*!< PORT0 OMR: PR2 (Bit 18) */ +#define PORT0_OMR_PR2_Msk (0x40000UL) /*!< PORT0 OMR: PR2 (Bitfield-Mask: 0x01) */ +#define PORT0_OMR_PR3_Pos (19UL) /*!< PORT0 OMR: PR3 (Bit 19) */ +#define PORT0_OMR_PR3_Msk (0x80000UL) /*!< PORT0 OMR: PR3 (Bitfield-Mask: 0x01) */ +#define PORT0_OMR_PR4_Pos (20UL) /*!< PORT0 OMR: PR4 (Bit 20) */ +#define PORT0_OMR_PR4_Msk (0x100000UL) /*!< PORT0 OMR: PR4 (Bitfield-Mask: 0x01) */ +#define PORT0_OMR_PR5_Pos (21UL) /*!< PORT0 OMR: PR5 (Bit 21) */ +#define PORT0_OMR_PR5_Msk (0x200000UL) /*!< PORT0 OMR: PR5 (Bitfield-Mask: 0x01) */ +#define PORT0_OMR_PR6_Pos (22UL) /*!< PORT0 OMR: PR6 (Bit 22) */ +#define PORT0_OMR_PR6_Msk (0x400000UL) /*!< PORT0 OMR: PR6 (Bitfield-Mask: 0x01) */ +#define PORT0_OMR_PR7_Pos (23UL) /*!< PORT0 OMR: PR7 (Bit 23) */ +#define PORT0_OMR_PR7_Msk (0x800000UL) /*!< PORT0 OMR: PR7 (Bitfield-Mask: 0x01) */ +#define PORT0_OMR_PR8_Pos (24UL) /*!< PORT0 OMR: PR8 (Bit 24) */ +#define PORT0_OMR_PR8_Msk (0x1000000UL) /*!< PORT0 OMR: PR8 (Bitfield-Mask: 0x01) */ +#define PORT0_OMR_PR9_Pos (25UL) /*!< PORT0 OMR: PR9 (Bit 25) */ +#define PORT0_OMR_PR9_Msk (0x2000000UL) /*!< PORT0 OMR: PR9 (Bitfield-Mask: 0x01) */ +#define PORT0_OMR_PR10_Pos (26UL) /*!< PORT0 OMR: PR10 (Bit 26) */ +#define PORT0_OMR_PR10_Msk (0x4000000UL) /*!< PORT0 OMR: PR10 (Bitfield-Mask: 0x01) */ +#define PORT0_OMR_PR11_Pos (27UL) /*!< PORT0 OMR: PR11 (Bit 27) */ +#define PORT0_OMR_PR11_Msk (0x8000000UL) /*!< PORT0 OMR: PR11 (Bitfield-Mask: 0x01) */ +#define PORT0_OMR_PR12_Pos (28UL) /*!< PORT0 OMR: PR12 (Bit 28) */ +#define PORT0_OMR_PR12_Msk (0x10000000UL) /*!< PORT0 OMR: PR12 (Bitfield-Mask: 0x01) */ +#define PORT0_OMR_PR13_Pos (29UL) /*!< PORT0 OMR: PR13 (Bit 29) */ +#define PORT0_OMR_PR13_Msk (0x20000000UL) /*!< PORT0 OMR: PR13 (Bitfield-Mask: 0x01) */ +#define PORT0_OMR_PR14_Pos (30UL) /*!< PORT0 OMR: PR14 (Bit 30) */ +#define PORT0_OMR_PR14_Msk (0x40000000UL) /*!< PORT0 OMR: PR14 (Bitfield-Mask: 0x01) */ +#define PORT0_OMR_PR15_Pos (31UL) /*!< PORT0 OMR: PR15 (Bit 31) */ +#define PORT0_OMR_PR15_Msk (0x80000000UL) /*!< PORT0 OMR: PR15 (Bitfield-Mask: 0x01) */ + +/* --------------------------------- PORT0_IOCR0 -------------------------------- */ +#define PORT0_IOCR0_PC0_Pos (3UL) /*!< PORT0 IOCR0: PC0 (Bit 3) */ +#define PORT0_IOCR0_PC0_Msk (0xf8UL) /*!< PORT0 IOCR0: PC0 (Bitfield-Mask: 0x1f) */ +#define PORT0_IOCR0_PC1_Pos (11UL) /*!< PORT0 IOCR0: PC1 (Bit 11) */ +#define PORT0_IOCR0_PC1_Msk (0xf800UL) /*!< PORT0 IOCR0: PC1 (Bitfield-Mask: 0x1f) */ +#define PORT0_IOCR0_PC2_Pos (19UL) /*!< PORT0 IOCR0: PC2 (Bit 19) */ +#define PORT0_IOCR0_PC2_Msk (0xf80000UL) /*!< PORT0 IOCR0: PC2 (Bitfield-Mask: 0x1f) */ +#define PORT0_IOCR0_PC3_Pos (27UL) /*!< PORT0 IOCR0: PC3 (Bit 27) */ +#define PORT0_IOCR0_PC3_Msk (0xf8000000UL) /*!< PORT0 IOCR0: PC3 (Bitfield-Mask: 0x1f) */ + +/* --------------------------------- PORT0_IOCR4 -------------------------------- */ +#define PORT0_IOCR4_PC4_Pos (3UL) /*!< PORT0 IOCR4: PC4 (Bit 3) */ +#define PORT0_IOCR4_PC4_Msk (0xf8UL) /*!< PORT0 IOCR4: PC4 (Bitfield-Mask: 0x1f) */ +#define PORT0_IOCR4_PC5_Pos (11UL) /*!< PORT0 IOCR4: PC5 (Bit 11) */ +#define PORT0_IOCR4_PC5_Msk (0xf800UL) /*!< PORT0 IOCR4: PC5 (Bitfield-Mask: 0x1f) */ +#define PORT0_IOCR4_PC6_Pos (19UL) /*!< PORT0 IOCR4: PC6 (Bit 19) */ +#define PORT0_IOCR4_PC6_Msk (0xf80000UL) /*!< PORT0 IOCR4: PC6 (Bitfield-Mask: 0x1f) */ +#define PORT0_IOCR4_PC7_Pos (27UL) /*!< PORT0 IOCR4: PC7 (Bit 27) */ +#define PORT0_IOCR4_PC7_Msk (0xf8000000UL) /*!< PORT0 IOCR4: PC7 (Bitfield-Mask: 0x1f) */ + +/* --------------------------------- PORT0_IOCR8 -------------------------------- */ +#define PORT0_IOCR8_PC8_Pos (3UL) /*!< PORT0 IOCR8: PC8 (Bit 3) */ +#define PORT0_IOCR8_PC8_Msk (0xf8UL) /*!< PORT0 IOCR8: PC8 (Bitfield-Mask: 0x1f) */ +#define PORT0_IOCR8_PC9_Pos (11UL) /*!< PORT0 IOCR8: PC9 (Bit 11) */ +#define PORT0_IOCR8_PC9_Msk (0xf800UL) /*!< PORT0 IOCR8: PC9 (Bitfield-Mask: 0x1f) */ +#define PORT0_IOCR8_PC10_Pos (19UL) /*!< PORT0 IOCR8: PC10 (Bit 19) */ +#define PORT0_IOCR8_PC10_Msk (0xf80000UL) /*!< PORT0 IOCR8: PC10 (Bitfield-Mask: 0x1f) */ +#define PORT0_IOCR8_PC11_Pos (27UL) /*!< PORT0 IOCR8: PC11 (Bit 27) */ +#define PORT0_IOCR8_PC11_Msk (0xf8000000UL) /*!< PORT0 IOCR8: PC11 (Bitfield-Mask: 0x1f) */ + +/* ---------------------------------- PORT0_IN ---------------------------------- */ +#define PORT0_IN_P0_Pos (0UL) /*!< PORT0 IN: P0 (Bit 0) */ +#define PORT0_IN_P0_Msk (0x1UL) /*!< PORT0 IN: P0 (Bitfield-Mask: 0x01) */ +#define PORT0_IN_P1_Pos (1UL) /*!< PORT0 IN: P1 (Bit 1) */ +#define PORT0_IN_P1_Msk (0x2UL) /*!< PORT0 IN: P1 (Bitfield-Mask: 0x01) */ +#define PORT0_IN_P2_Pos (2UL) /*!< PORT0 IN: P2 (Bit 2) */ +#define PORT0_IN_P2_Msk (0x4UL) /*!< PORT0 IN: P2 (Bitfield-Mask: 0x01) */ +#define PORT0_IN_P3_Pos (3UL) /*!< PORT0 IN: P3 (Bit 3) */ +#define PORT0_IN_P3_Msk (0x8UL) /*!< PORT0 IN: P3 (Bitfield-Mask: 0x01) */ +#define PORT0_IN_P4_Pos (4UL) /*!< PORT0 IN: P4 (Bit 4) */ +#define PORT0_IN_P4_Msk (0x10UL) /*!< PORT0 IN: P4 (Bitfield-Mask: 0x01) */ +#define PORT0_IN_P5_Pos (5UL) /*!< PORT0 IN: P5 (Bit 5) */ +#define PORT0_IN_P5_Msk (0x20UL) /*!< PORT0 IN: P5 (Bitfield-Mask: 0x01) */ +#define PORT0_IN_P6_Pos (6UL) /*!< PORT0 IN: P6 (Bit 6) */ +#define PORT0_IN_P6_Msk (0x40UL) /*!< PORT0 IN: P6 (Bitfield-Mask: 0x01) */ +#define PORT0_IN_P7_Pos (7UL) /*!< PORT0 IN: P7 (Bit 7) */ +#define PORT0_IN_P7_Msk (0x80UL) /*!< PORT0 IN: P7 (Bitfield-Mask: 0x01) */ +#define PORT0_IN_P8_Pos (8UL) /*!< PORT0 IN: P8 (Bit 8) */ +#define PORT0_IN_P8_Msk (0x100UL) /*!< PORT0 IN: P8 (Bitfield-Mask: 0x01) */ +#define PORT0_IN_P9_Pos (9UL) /*!< PORT0 IN: P9 (Bit 9) */ +#define PORT0_IN_P9_Msk (0x200UL) /*!< PORT0 IN: P9 (Bitfield-Mask: 0x01) */ +#define PORT0_IN_P10_Pos (10UL) /*!< PORT0 IN: P10 (Bit 10) */ +#define PORT0_IN_P10_Msk (0x400UL) /*!< PORT0 IN: P10 (Bitfield-Mask: 0x01) */ +#define PORT0_IN_P11_Pos (11UL) /*!< PORT0 IN: P11 (Bit 11) */ +#define PORT0_IN_P11_Msk (0x800UL) /*!< PORT0 IN: P11 (Bitfield-Mask: 0x01) */ +#define PORT0_IN_P12_Pos (12UL) /*!< PORT0 IN: P12 (Bit 12) */ +#define PORT0_IN_P12_Msk (0x1000UL) /*!< PORT0 IN: P12 (Bitfield-Mask: 0x01) */ +#define PORT0_IN_P13_Pos (13UL) /*!< PORT0 IN: P13 (Bit 13) */ +#define PORT0_IN_P13_Msk (0x2000UL) /*!< PORT0 IN: P13 (Bitfield-Mask: 0x01) */ +#define PORT0_IN_P14_Pos (14UL) /*!< PORT0 IN: P14 (Bit 14) */ +#define PORT0_IN_P14_Msk (0x4000UL) /*!< PORT0 IN: P14 (Bitfield-Mask: 0x01) */ +#define PORT0_IN_P15_Pos (15UL) /*!< PORT0 IN: P15 (Bit 15) */ +#define PORT0_IN_P15_Msk (0x8000UL) /*!< PORT0 IN: P15 (Bitfield-Mask: 0x01) */ + +/* --------------------------------- PORT0_PDR0 --------------------------------- */ +#define PORT0_PDR0_PD0_Pos (0UL) /*!< PORT0 PDR0: PD0 (Bit 0) */ +#define PORT0_PDR0_PD0_Msk (0x7UL) /*!< PORT0 PDR0: PD0 (Bitfield-Mask: 0x07) */ +#define PORT0_PDR0_PD1_Pos (4UL) /*!< PORT0 PDR0: PD1 (Bit 4) */ +#define PORT0_PDR0_PD1_Msk (0x70UL) /*!< PORT0 PDR0: PD1 (Bitfield-Mask: 0x07) */ +#define PORT0_PDR0_PD2_Pos (8UL) /*!< PORT0 PDR0: PD2 (Bit 8) */ +#define PORT0_PDR0_PD2_Msk (0x700UL) /*!< PORT0 PDR0: PD2 (Bitfield-Mask: 0x07) */ +#define PORT0_PDR0_PD3_Pos (12UL) /*!< PORT0 PDR0: PD3 (Bit 12) */ +#define PORT0_PDR0_PD3_Msk (0x7000UL) /*!< PORT0 PDR0: PD3 (Bitfield-Mask: 0x07) */ +#define PORT0_PDR0_PD4_Pos (16UL) /*!< PORT0 PDR0: PD4 (Bit 16) */ +#define PORT0_PDR0_PD4_Msk (0x70000UL) /*!< PORT0 PDR0: PD4 (Bitfield-Mask: 0x07) */ +#define PORT0_PDR0_PD5_Pos (20UL) /*!< PORT0 PDR0: PD5 (Bit 20) */ +#define PORT0_PDR0_PD5_Msk (0x700000UL) /*!< PORT0 PDR0: PD5 (Bitfield-Mask: 0x07) */ +#define PORT0_PDR0_PD6_Pos (24UL) /*!< PORT0 PDR0: PD6 (Bit 24) */ +#define PORT0_PDR0_PD6_Msk (0x7000000UL) /*!< PORT0 PDR0: PD6 (Bitfield-Mask: 0x07) */ +#define PORT0_PDR0_PD7_Pos (28UL) /*!< PORT0 PDR0: PD7 (Bit 28) */ +#define PORT0_PDR0_PD7_Msk (0x70000000UL) /*!< PORT0 PDR0: PD7 (Bitfield-Mask: 0x07) */ + +/* --------------------------------- PORT0_PDR1 --------------------------------- */ +#define PORT0_PDR1_PD8_Pos (0UL) /*!< PORT0 PDR1: PD8 (Bit 0) */ +#define PORT0_PDR1_PD8_Msk (0x7UL) /*!< PORT0 PDR1: PD8 (Bitfield-Mask: 0x07) */ +#define PORT0_PDR1_PD9_Pos (4UL) /*!< PORT0 PDR1: PD9 (Bit 4) */ +#define PORT0_PDR1_PD9_Msk (0x70UL) /*!< PORT0 PDR1: PD9 (Bitfield-Mask: 0x07) */ +#define PORT0_PDR1_PD10_Pos (8UL) /*!< PORT0 PDR1: PD10 (Bit 8) */ +#define PORT0_PDR1_PD10_Msk (0x700UL) /*!< PORT0 PDR1: PD10 (Bitfield-Mask: 0x07) */ +#define PORT0_PDR1_PD11_Pos (12UL) /*!< PORT0 PDR1: PD11 (Bit 12) */ +#define PORT0_PDR1_PD11_Msk (0x7000UL) /*!< PORT0 PDR1: PD11 (Bitfield-Mask: 0x07) */ +#define PORT0_PDR1_PD12_Pos (16UL) /*!< PORT0 PDR1: PD12 (Bit 16) */ +#define PORT0_PDR1_PD12_Msk (0x70000UL) /*!< PORT0 PDR1: PD12 (Bitfield-Mask: 0x07) */ +#define PORT0_PDR1_PD13_Pos (20UL) /*!< PORT0 PDR1: PD13 (Bit 20) */ +#define PORT0_PDR1_PD13_Msk (0x700000UL) /*!< PORT0 PDR1: PD13 (Bitfield-Mask: 0x07) */ +#define PORT0_PDR1_PD14_Pos (24UL) /*!< PORT0 PDR1: PD14 (Bit 24) */ +#define PORT0_PDR1_PD14_Msk (0x7000000UL) /*!< PORT0 PDR1: PD14 (Bitfield-Mask: 0x07) */ +#define PORT0_PDR1_PD15_Pos (28UL) /*!< PORT0 PDR1: PD15 (Bit 28) */ +#define PORT0_PDR1_PD15_Msk (0x70000000UL) /*!< PORT0 PDR1: PD15 (Bitfield-Mask: 0x07) */ + +/* --------------------------------- PORT0_PDISC -------------------------------- */ +#define PORT0_PDISC_PDIS0_Pos (0UL) /*!< PORT0 PDISC: PDIS0 (Bit 0) */ +#define PORT0_PDISC_PDIS0_Msk (0x1UL) /*!< PORT0 PDISC: PDIS0 (Bitfield-Mask: 0x01) */ +#define PORT0_PDISC_PDIS1_Pos (1UL) /*!< PORT0 PDISC: PDIS1 (Bit 1) */ +#define PORT0_PDISC_PDIS1_Msk (0x2UL) /*!< PORT0 PDISC: PDIS1 (Bitfield-Mask: 0x01) */ +#define PORT0_PDISC_PDIS2_Pos (2UL) /*!< PORT0 PDISC: PDIS2 (Bit 2) */ +#define PORT0_PDISC_PDIS2_Msk (0x4UL) /*!< PORT0 PDISC: PDIS2 (Bitfield-Mask: 0x01) */ +#define PORT0_PDISC_PDIS3_Pos (3UL) /*!< PORT0 PDISC: PDIS3 (Bit 3) */ +#define PORT0_PDISC_PDIS3_Msk (0x8UL) /*!< PORT0 PDISC: PDIS3 (Bitfield-Mask: 0x01) */ +#define PORT0_PDISC_PDIS4_Pos (4UL) /*!< PORT0 PDISC: PDIS4 (Bit 4) */ +#define PORT0_PDISC_PDIS4_Msk (0x10UL) /*!< PORT0 PDISC: PDIS4 (Bitfield-Mask: 0x01) */ +#define PORT0_PDISC_PDIS5_Pos (5UL) /*!< PORT0 PDISC: PDIS5 (Bit 5) */ +#define PORT0_PDISC_PDIS5_Msk (0x20UL) /*!< PORT0 PDISC: PDIS5 (Bitfield-Mask: 0x01) */ +#define PORT0_PDISC_PDIS6_Pos (6UL) /*!< PORT0 PDISC: PDIS6 (Bit 6) */ +#define PORT0_PDISC_PDIS6_Msk (0x40UL) /*!< PORT0 PDISC: PDIS6 (Bitfield-Mask: 0x01) */ +#define PORT0_PDISC_PDIS7_Pos (7UL) /*!< PORT0 PDISC: PDIS7 (Bit 7) */ +#define PORT0_PDISC_PDIS7_Msk (0x80UL) /*!< PORT0 PDISC: PDIS7 (Bitfield-Mask: 0x01) */ +#define PORT0_PDISC_PDIS8_Pos (8UL) /*!< PORT0 PDISC: PDIS8 (Bit 8) */ +#define PORT0_PDISC_PDIS8_Msk (0x100UL) /*!< PORT0 PDISC: PDIS8 (Bitfield-Mask: 0x01) */ +#define PORT0_PDISC_PDIS9_Pos (9UL) /*!< PORT0 PDISC: PDIS9 (Bit 9) */ +#define PORT0_PDISC_PDIS9_Msk (0x200UL) /*!< PORT0 PDISC: PDIS9 (Bitfield-Mask: 0x01) */ +#define PORT0_PDISC_PDIS10_Pos (10UL) /*!< PORT0 PDISC: PDIS10 (Bit 10) */ +#define PORT0_PDISC_PDIS10_Msk (0x400UL) /*!< PORT0 PDISC: PDIS10 (Bitfield-Mask: 0x01) */ +#define PORT0_PDISC_PDIS11_Pos (11UL) /*!< PORT0 PDISC: PDIS11 (Bit 11) */ +#define PORT0_PDISC_PDIS11_Msk (0x800UL) /*!< PORT0 PDISC: PDIS11 (Bitfield-Mask: 0x01) */ +#define PORT0_PDISC_PDIS12_Pos (12UL) /*!< PORT0 PDISC: PDIS12 (Bit 12) */ +#define PORT0_PDISC_PDIS12_Msk (0x1000UL) /*!< PORT0 PDISC: PDIS12 (Bitfield-Mask: 0x01) */ +#define PORT0_PDISC_PDIS13_Pos (13UL) /*!< PORT0 PDISC: PDIS13 (Bit 13) */ +#define PORT0_PDISC_PDIS13_Msk (0x2000UL) /*!< PORT0 PDISC: PDIS13 (Bitfield-Mask: 0x01) */ +#define PORT0_PDISC_PDIS14_Pos (14UL) /*!< PORT0 PDISC: PDIS14 (Bit 14) */ +#define PORT0_PDISC_PDIS14_Msk (0x4000UL) /*!< PORT0 PDISC: PDIS14 (Bitfield-Mask: 0x01) */ +#define PORT0_PDISC_PDIS15_Pos (15UL) /*!< PORT0 PDISC: PDIS15 (Bit 15) */ +#define PORT0_PDISC_PDIS15_Msk (0x8000UL) /*!< PORT0 PDISC: PDIS15 (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- PORT0_PPS --------------------------------- */ +#define PORT0_PPS_PPS0_Pos (0UL) /*!< PORT0 PPS: PPS0 (Bit 0) */ +#define PORT0_PPS_PPS0_Msk (0x1UL) /*!< PORT0 PPS: PPS0 (Bitfield-Mask: 0x01) */ +#define PORT0_PPS_PPS1_Pos (1UL) /*!< PORT0 PPS: PPS1 (Bit 1) */ +#define PORT0_PPS_PPS1_Msk (0x2UL) /*!< PORT0 PPS: PPS1 (Bitfield-Mask: 0x01) */ +#define PORT0_PPS_PPS2_Pos (2UL) /*!< PORT0 PPS: PPS2 (Bit 2) */ +#define PORT0_PPS_PPS2_Msk (0x4UL) /*!< PORT0 PPS: PPS2 (Bitfield-Mask: 0x01) */ +#define PORT0_PPS_PPS3_Pos (3UL) /*!< PORT0 PPS: PPS3 (Bit 3) */ +#define PORT0_PPS_PPS3_Msk (0x8UL) /*!< PORT0 PPS: PPS3 (Bitfield-Mask: 0x01) */ +#define PORT0_PPS_PPS4_Pos (4UL) /*!< PORT0 PPS: PPS4 (Bit 4) */ +#define PORT0_PPS_PPS4_Msk (0x10UL) /*!< PORT0 PPS: PPS4 (Bitfield-Mask: 0x01) */ +#define PORT0_PPS_PPS5_Pos (5UL) /*!< PORT0 PPS: PPS5 (Bit 5) */ +#define PORT0_PPS_PPS5_Msk (0x20UL) /*!< PORT0 PPS: PPS5 (Bitfield-Mask: 0x01) */ +#define PORT0_PPS_PPS6_Pos (6UL) /*!< PORT0 PPS: PPS6 (Bit 6) */ +#define PORT0_PPS_PPS6_Msk (0x40UL) /*!< PORT0 PPS: PPS6 (Bitfield-Mask: 0x01) */ +#define PORT0_PPS_PPS7_Pos (7UL) /*!< PORT0 PPS: PPS7 (Bit 7) */ +#define PORT0_PPS_PPS7_Msk (0x80UL) /*!< PORT0 PPS: PPS7 (Bitfield-Mask: 0x01) */ +#define PORT0_PPS_PPS8_Pos (8UL) /*!< PORT0 PPS: PPS8 (Bit 8) */ +#define PORT0_PPS_PPS8_Msk (0x100UL) /*!< PORT0 PPS: PPS8 (Bitfield-Mask: 0x01) */ +#define PORT0_PPS_PPS9_Pos (9UL) /*!< PORT0 PPS: PPS9 (Bit 9) */ +#define PORT0_PPS_PPS9_Msk (0x200UL) /*!< PORT0 PPS: PPS9 (Bitfield-Mask: 0x01) */ +#define PORT0_PPS_PPS10_Pos (10UL) /*!< PORT0 PPS: PPS10 (Bit 10) */ +#define PORT0_PPS_PPS10_Msk (0x400UL) /*!< PORT0 PPS: PPS10 (Bitfield-Mask: 0x01) */ +#define PORT0_PPS_PPS11_Pos (11UL) /*!< PORT0 PPS: PPS11 (Bit 11) */ +#define PORT0_PPS_PPS11_Msk (0x800UL) /*!< PORT0 PPS: PPS11 (Bitfield-Mask: 0x01) */ +#define PORT0_PPS_PPS12_Pos (12UL) /*!< PORT0 PPS: PPS12 (Bit 12) */ +#define PORT0_PPS_PPS12_Msk (0x1000UL) /*!< PORT0 PPS: PPS12 (Bitfield-Mask: 0x01) */ +#define PORT0_PPS_PPS13_Pos (13UL) /*!< PORT0 PPS: PPS13 (Bit 13) */ +#define PORT0_PPS_PPS13_Msk (0x2000UL) /*!< PORT0 PPS: PPS13 (Bitfield-Mask: 0x01) */ +#define PORT0_PPS_PPS14_Pos (14UL) /*!< PORT0 PPS: PPS14 (Bit 14) */ +#define PORT0_PPS_PPS14_Msk (0x4000UL) /*!< PORT0 PPS: PPS14 (Bitfield-Mask: 0x01) */ +#define PORT0_PPS_PPS15_Pos (15UL) /*!< PORT0 PPS: PPS15 (Bit 15) */ +#define PORT0_PPS_PPS15_Msk (0x8000UL) /*!< PORT0 PPS: PPS15 (Bitfield-Mask: 0x01) */ + +/* --------------------------------- PORT0_HWSEL -------------------------------- */ +#define PORT0_HWSEL_HW0_Pos (0UL) /*!< PORT0 HWSEL: HW0 (Bit 0) */ +#define PORT0_HWSEL_HW0_Msk (0x3UL) /*!< PORT0 HWSEL: HW0 (Bitfield-Mask: 0x03) */ +#define PORT0_HWSEL_HW1_Pos (2UL) /*!< PORT0 HWSEL: HW1 (Bit 2) */ +#define PORT0_HWSEL_HW1_Msk (0xcUL) /*!< PORT0 HWSEL: HW1 (Bitfield-Mask: 0x03) */ +#define PORT0_HWSEL_HW2_Pos (4UL) /*!< PORT0 HWSEL: HW2 (Bit 4) */ +#define PORT0_HWSEL_HW2_Msk (0x30UL) /*!< PORT0 HWSEL: HW2 (Bitfield-Mask: 0x03) */ +#define PORT0_HWSEL_HW3_Pos (6UL) /*!< PORT0 HWSEL: HW3 (Bit 6) */ +#define PORT0_HWSEL_HW3_Msk (0xc0UL) /*!< PORT0 HWSEL: HW3 (Bitfield-Mask: 0x03) */ +#define PORT0_HWSEL_HW4_Pos (8UL) /*!< PORT0 HWSEL: HW4 (Bit 8) */ +#define PORT0_HWSEL_HW4_Msk (0x300UL) /*!< PORT0 HWSEL: HW4 (Bitfield-Mask: 0x03) */ +#define PORT0_HWSEL_HW5_Pos (10UL) /*!< PORT0 HWSEL: HW5 (Bit 10) */ +#define PORT0_HWSEL_HW5_Msk (0xc00UL) /*!< PORT0 HWSEL: HW5 (Bitfield-Mask: 0x03) */ +#define PORT0_HWSEL_HW6_Pos (12UL) /*!< PORT0 HWSEL: HW6 (Bit 12) */ +#define PORT0_HWSEL_HW6_Msk (0x3000UL) /*!< PORT0 HWSEL: HW6 (Bitfield-Mask: 0x03) */ +#define PORT0_HWSEL_HW7_Pos (14UL) /*!< PORT0 HWSEL: HW7 (Bit 14) */ +#define PORT0_HWSEL_HW7_Msk (0xc000UL) /*!< PORT0 HWSEL: HW7 (Bitfield-Mask: 0x03) */ +#define PORT0_HWSEL_HW8_Pos (16UL) /*!< PORT0 HWSEL: HW8 (Bit 16) */ +#define PORT0_HWSEL_HW8_Msk (0x30000UL) /*!< PORT0 HWSEL: HW8 (Bitfield-Mask: 0x03) */ +#define PORT0_HWSEL_HW9_Pos (18UL) /*!< PORT0 HWSEL: HW9 (Bit 18) */ +#define PORT0_HWSEL_HW9_Msk (0xc0000UL) /*!< PORT0 HWSEL: HW9 (Bitfield-Mask: 0x03) */ +#define PORT0_HWSEL_HW10_Pos (20UL) /*!< PORT0 HWSEL: HW10 (Bit 20) */ +#define PORT0_HWSEL_HW10_Msk (0x300000UL) /*!< PORT0 HWSEL: HW10 (Bitfield-Mask: 0x03) */ +#define PORT0_HWSEL_HW11_Pos (22UL) /*!< PORT0 HWSEL: HW11 (Bit 22) */ +#define PORT0_HWSEL_HW11_Msk (0xc00000UL) /*!< PORT0 HWSEL: HW11 (Bitfield-Mask: 0x03) */ +#define PORT0_HWSEL_HW12_Pos (24UL) /*!< PORT0 HWSEL: HW12 (Bit 24) */ +#define PORT0_HWSEL_HW12_Msk (0x3000000UL) /*!< PORT0 HWSEL: HW12 (Bitfield-Mask: 0x03) */ +#define PORT0_HWSEL_HW13_Pos (26UL) /*!< PORT0 HWSEL: HW13 (Bit 26) */ +#define PORT0_HWSEL_HW13_Msk (0xc000000UL) /*!< PORT0 HWSEL: HW13 (Bitfield-Mask: 0x03) */ +#define PORT0_HWSEL_HW14_Pos (28UL) /*!< PORT0 HWSEL: HW14 (Bit 28) */ +#define PORT0_HWSEL_HW14_Msk (0x30000000UL) /*!< PORT0 HWSEL: HW14 (Bitfield-Mask: 0x03) */ +#define PORT0_HWSEL_HW15_Pos (30UL) /*!< PORT0 HWSEL: HW15 (Bit 30) */ +#define PORT0_HWSEL_HW15_Msk (0xc0000000UL) /*!< PORT0 HWSEL: HW15 (Bitfield-Mask: 0x03) */ + + +/* ================================================================================ */ +/* ================ struct 'PORT1' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ---------------------------------- PORT1_OUT --------------------------------- */ +#define PORT1_OUT_P0_Pos (0UL) /*!< PORT1 OUT: P0 (Bit 0) */ +#define PORT1_OUT_P0_Msk (0x1UL) /*!< PORT1 OUT: P0 (Bitfield-Mask: 0x01) */ +#define PORT1_OUT_P1_Pos (1UL) /*!< PORT1 OUT: P1 (Bit 1) */ +#define PORT1_OUT_P1_Msk (0x2UL) /*!< PORT1 OUT: P1 (Bitfield-Mask: 0x01) */ +#define PORT1_OUT_P2_Pos (2UL) /*!< PORT1 OUT: P2 (Bit 2) */ +#define PORT1_OUT_P2_Msk (0x4UL) /*!< PORT1 OUT: P2 (Bitfield-Mask: 0x01) */ +#define PORT1_OUT_P3_Pos (3UL) /*!< PORT1 OUT: P3 (Bit 3) */ +#define PORT1_OUT_P3_Msk (0x8UL) /*!< PORT1 OUT: P3 (Bitfield-Mask: 0x01) */ +#define PORT1_OUT_P4_Pos (4UL) /*!< PORT1 OUT: P4 (Bit 4) */ +#define PORT1_OUT_P4_Msk (0x10UL) /*!< PORT1 OUT: P4 (Bitfield-Mask: 0x01) */ +#define PORT1_OUT_P5_Pos (5UL) /*!< PORT1 OUT: P5 (Bit 5) */ +#define PORT1_OUT_P5_Msk (0x20UL) /*!< PORT1 OUT: P5 (Bitfield-Mask: 0x01) */ +#define PORT1_OUT_P6_Pos (6UL) /*!< PORT1 OUT: P6 (Bit 6) */ +#define PORT1_OUT_P6_Msk (0x40UL) /*!< PORT1 OUT: P6 (Bitfield-Mask: 0x01) */ +#define PORT1_OUT_P7_Pos (7UL) /*!< PORT1 OUT: P7 (Bit 7) */ +#define PORT1_OUT_P7_Msk (0x80UL) /*!< PORT1 OUT: P7 (Bitfield-Mask: 0x01) */ +#define PORT1_OUT_P8_Pos (8UL) /*!< PORT1 OUT: P8 (Bit 8) */ +#define PORT1_OUT_P8_Msk (0x100UL) /*!< PORT1 OUT: P8 (Bitfield-Mask: 0x01) */ +#define PORT1_OUT_P9_Pos (9UL) /*!< PORT1 OUT: P9 (Bit 9) */ +#define PORT1_OUT_P9_Msk (0x200UL) /*!< PORT1 OUT: P9 (Bitfield-Mask: 0x01) */ +#define PORT1_OUT_P10_Pos (10UL) /*!< PORT1 OUT: P10 (Bit 10) */ +#define PORT1_OUT_P10_Msk (0x400UL) /*!< PORT1 OUT: P10 (Bitfield-Mask: 0x01) */ +#define PORT1_OUT_P11_Pos (11UL) /*!< PORT1 OUT: P11 (Bit 11) */ +#define PORT1_OUT_P11_Msk (0x800UL) /*!< PORT1 OUT: P11 (Bitfield-Mask: 0x01) */ +#define PORT1_OUT_P12_Pos (12UL) /*!< PORT1 OUT: P12 (Bit 12) */ +#define PORT1_OUT_P12_Msk (0x1000UL) /*!< PORT1 OUT: P12 (Bitfield-Mask: 0x01) */ +#define PORT1_OUT_P13_Pos (13UL) /*!< PORT1 OUT: P13 (Bit 13) */ +#define PORT1_OUT_P13_Msk (0x2000UL) /*!< PORT1 OUT: P13 (Bitfield-Mask: 0x01) */ +#define PORT1_OUT_P14_Pos (14UL) /*!< PORT1 OUT: P14 (Bit 14) */ +#define PORT1_OUT_P14_Msk (0x4000UL) /*!< PORT1 OUT: P14 (Bitfield-Mask: 0x01) */ +#define PORT1_OUT_P15_Pos (15UL) /*!< PORT1 OUT: P15 (Bit 15) */ +#define PORT1_OUT_P15_Msk (0x8000UL) /*!< PORT1 OUT: P15 (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- PORT1_OMR --------------------------------- */ +#define PORT1_OMR_PS0_Pos (0UL) /*!< PORT1 OMR: PS0 (Bit 0) */ +#define PORT1_OMR_PS0_Msk (0x1UL) /*!< PORT1 OMR: PS0 (Bitfield-Mask: 0x01) */ +#define PORT1_OMR_PS1_Pos (1UL) /*!< PORT1 OMR: PS1 (Bit 1) */ +#define PORT1_OMR_PS1_Msk (0x2UL) /*!< PORT1 OMR: PS1 (Bitfield-Mask: 0x01) */ +#define PORT1_OMR_PS2_Pos (2UL) /*!< PORT1 OMR: PS2 (Bit 2) */ +#define PORT1_OMR_PS2_Msk (0x4UL) /*!< PORT1 OMR: PS2 (Bitfield-Mask: 0x01) */ +#define PORT1_OMR_PS3_Pos (3UL) /*!< PORT1 OMR: PS3 (Bit 3) */ +#define PORT1_OMR_PS3_Msk (0x8UL) /*!< PORT1 OMR: PS3 (Bitfield-Mask: 0x01) */ +#define PORT1_OMR_PS4_Pos (4UL) /*!< PORT1 OMR: PS4 (Bit 4) */ +#define PORT1_OMR_PS4_Msk (0x10UL) /*!< PORT1 OMR: PS4 (Bitfield-Mask: 0x01) */ +#define PORT1_OMR_PS5_Pos (5UL) /*!< PORT1 OMR: PS5 (Bit 5) */ +#define PORT1_OMR_PS5_Msk (0x20UL) /*!< PORT1 OMR: PS5 (Bitfield-Mask: 0x01) */ +#define PORT1_OMR_PS6_Pos (6UL) /*!< PORT1 OMR: PS6 (Bit 6) */ +#define PORT1_OMR_PS6_Msk (0x40UL) /*!< PORT1 OMR: PS6 (Bitfield-Mask: 0x01) */ +#define PORT1_OMR_PS7_Pos (7UL) /*!< PORT1 OMR: PS7 (Bit 7) */ +#define PORT1_OMR_PS7_Msk (0x80UL) /*!< PORT1 OMR: PS7 (Bitfield-Mask: 0x01) */ +#define PORT1_OMR_PS8_Pos (8UL) /*!< PORT1 OMR: PS8 (Bit 8) */ +#define PORT1_OMR_PS8_Msk (0x100UL) /*!< PORT1 OMR: PS8 (Bitfield-Mask: 0x01) */ +#define PORT1_OMR_PS9_Pos (9UL) /*!< PORT1 OMR: PS9 (Bit 9) */ +#define PORT1_OMR_PS9_Msk (0x200UL) /*!< PORT1 OMR: PS9 (Bitfield-Mask: 0x01) */ +#define PORT1_OMR_PS10_Pos (10UL) /*!< PORT1 OMR: PS10 (Bit 10) */ +#define PORT1_OMR_PS10_Msk (0x400UL) /*!< PORT1 OMR: PS10 (Bitfield-Mask: 0x01) */ +#define PORT1_OMR_PS11_Pos (11UL) /*!< PORT1 OMR: PS11 (Bit 11) */ +#define PORT1_OMR_PS11_Msk (0x800UL) /*!< PORT1 OMR: PS11 (Bitfield-Mask: 0x01) */ +#define PORT1_OMR_PS12_Pos (12UL) /*!< PORT1 OMR: PS12 (Bit 12) */ +#define PORT1_OMR_PS12_Msk (0x1000UL) /*!< PORT1 OMR: PS12 (Bitfield-Mask: 0x01) */ +#define PORT1_OMR_PS13_Pos (13UL) /*!< PORT1 OMR: PS13 (Bit 13) */ +#define PORT1_OMR_PS13_Msk (0x2000UL) /*!< PORT1 OMR: PS13 (Bitfield-Mask: 0x01) */ +#define PORT1_OMR_PS14_Pos (14UL) /*!< PORT1 OMR: PS14 (Bit 14) */ +#define PORT1_OMR_PS14_Msk (0x4000UL) /*!< PORT1 OMR: PS14 (Bitfield-Mask: 0x01) */ +#define PORT1_OMR_PS15_Pos (15UL) /*!< PORT1 OMR: PS15 (Bit 15) */ +#define PORT1_OMR_PS15_Msk (0x8000UL) /*!< PORT1 OMR: PS15 (Bitfield-Mask: 0x01) */ +#define PORT1_OMR_PR0_Pos (16UL) /*!< PORT1 OMR: PR0 (Bit 16) */ +#define PORT1_OMR_PR0_Msk (0x10000UL) /*!< PORT1 OMR: PR0 (Bitfield-Mask: 0x01) */ +#define PORT1_OMR_PR1_Pos (17UL) /*!< PORT1 OMR: PR1 (Bit 17) */ +#define PORT1_OMR_PR1_Msk (0x20000UL) /*!< PORT1 OMR: PR1 (Bitfield-Mask: 0x01) */ +#define PORT1_OMR_PR2_Pos (18UL) /*!< PORT1 OMR: PR2 (Bit 18) */ +#define PORT1_OMR_PR2_Msk (0x40000UL) /*!< PORT1 OMR: PR2 (Bitfield-Mask: 0x01) */ +#define PORT1_OMR_PR3_Pos (19UL) /*!< PORT1 OMR: PR3 (Bit 19) */ +#define PORT1_OMR_PR3_Msk (0x80000UL) /*!< PORT1 OMR: PR3 (Bitfield-Mask: 0x01) */ +#define PORT1_OMR_PR4_Pos (20UL) /*!< PORT1 OMR: PR4 (Bit 20) */ +#define PORT1_OMR_PR4_Msk (0x100000UL) /*!< PORT1 OMR: PR4 (Bitfield-Mask: 0x01) */ +#define PORT1_OMR_PR5_Pos (21UL) /*!< PORT1 OMR: PR5 (Bit 21) */ +#define PORT1_OMR_PR5_Msk (0x200000UL) /*!< PORT1 OMR: PR5 (Bitfield-Mask: 0x01) */ +#define PORT1_OMR_PR6_Pos (22UL) /*!< PORT1 OMR: PR6 (Bit 22) */ +#define PORT1_OMR_PR6_Msk (0x400000UL) /*!< PORT1 OMR: PR6 (Bitfield-Mask: 0x01) */ +#define PORT1_OMR_PR7_Pos (23UL) /*!< PORT1 OMR: PR7 (Bit 23) */ +#define PORT1_OMR_PR7_Msk (0x800000UL) /*!< PORT1 OMR: PR7 (Bitfield-Mask: 0x01) */ +#define PORT1_OMR_PR8_Pos (24UL) /*!< PORT1 OMR: PR8 (Bit 24) */ +#define PORT1_OMR_PR8_Msk (0x1000000UL) /*!< PORT1 OMR: PR8 (Bitfield-Mask: 0x01) */ +#define PORT1_OMR_PR9_Pos (25UL) /*!< PORT1 OMR: PR9 (Bit 25) */ +#define PORT1_OMR_PR9_Msk (0x2000000UL) /*!< PORT1 OMR: PR9 (Bitfield-Mask: 0x01) */ +#define PORT1_OMR_PR10_Pos (26UL) /*!< PORT1 OMR: PR10 (Bit 26) */ +#define PORT1_OMR_PR10_Msk (0x4000000UL) /*!< PORT1 OMR: PR10 (Bitfield-Mask: 0x01) */ +#define PORT1_OMR_PR11_Pos (27UL) /*!< PORT1 OMR: PR11 (Bit 27) */ +#define PORT1_OMR_PR11_Msk (0x8000000UL) /*!< PORT1 OMR: PR11 (Bitfield-Mask: 0x01) */ +#define PORT1_OMR_PR12_Pos (28UL) /*!< PORT1 OMR: PR12 (Bit 28) */ +#define PORT1_OMR_PR12_Msk (0x10000000UL) /*!< PORT1 OMR: PR12 (Bitfield-Mask: 0x01) */ +#define PORT1_OMR_PR13_Pos (29UL) /*!< PORT1 OMR: PR13 (Bit 29) */ +#define PORT1_OMR_PR13_Msk (0x20000000UL) /*!< PORT1 OMR: PR13 (Bitfield-Mask: 0x01) */ +#define PORT1_OMR_PR14_Pos (30UL) /*!< PORT1 OMR: PR14 (Bit 30) */ +#define PORT1_OMR_PR14_Msk (0x40000000UL) /*!< PORT1 OMR: PR14 (Bitfield-Mask: 0x01) */ +#define PORT1_OMR_PR15_Pos (31UL) /*!< PORT1 OMR: PR15 (Bit 31) */ +#define PORT1_OMR_PR15_Msk (0x80000000UL) /*!< PORT1 OMR: PR15 (Bitfield-Mask: 0x01) */ + +/* --------------------------------- PORT1_IOCR0 -------------------------------- */ +#define PORT1_IOCR0_PC0_Pos (3UL) /*!< PORT1 IOCR0: PC0 (Bit 3) */ +#define PORT1_IOCR0_PC0_Msk (0xf8UL) /*!< PORT1 IOCR0: PC0 (Bitfield-Mask: 0x1f) */ +#define PORT1_IOCR0_PC1_Pos (11UL) /*!< PORT1 IOCR0: PC1 (Bit 11) */ +#define PORT1_IOCR0_PC1_Msk (0xf800UL) /*!< PORT1 IOCR0: PC1 (Bitfield-Mask: 0x1f) */ +#define PORT1_IOCR0_PC2_Pos (19UL) /*!< PORT1 IOCR0: PC2 (Bit 19) */ +#define PORT1_IOCR0_PC2_Msk (0xf80000UL) /*!< PORT1 IOCR0: PC2 (Bitfield-Mask: 0x1f) */ +#define PORT1_IOCR0_PC3_Pos (27UL) /*!< PORT1 IOCR0: PC3 (Bit 27) */ +#define PORT1_IOCR0_PC3_Msk (0xf8000000UL) /*!< PORT1 IOCR0: PC3 (Bitfield-Mask: 0x1f) */ + +/* --------------------------------- PORT1_IOCR4 -------------------------------- */ +#define PORT1_IOCR4_PC4_Pos (3UL) /*!< PORT1 IOCR4: PC4 (Bit 3) */ +#define PORT1_IOCR4_PC4_Msk (0xf8UL) /*!< PORT1 IOCR4: PC4 (Bitfield-Mask: 0x1f) */ +#define PORT1_IOCR4_PC5_Pos (11UL) /*!< PORT1 IOCR4: PC5 (Bit 11) */ +#define PORT1_IOCR4_PC5_Msk (0xf800UL) /*!< PORT1 IOCR4: PC5 (Bitfield-Mask: 0x1f) */ +#define PORT1_IOCR4_PC6_Pos (19UL) /*!< PORT1 IOCR4: PC6 (Bit 19) */ +#define PORT1_IOCR4_PC6_Msk (0xf80000UL) /*!< PORT1 IOCR4: PC6 (Bitfield-Mask: 0x1f) */ +#define PORT1_IOCR4_PC7_Pos (27UL) /*!< PORT1 IOCR4: PC7 (Bit 27) */ +#define PORT1_IOCR4_PC7_Msk (0xf8000000UL) /*!< PORT1 IOCR4: PC7 (Bitfield-Mask: 0x1f) */ + +/* --------------------------------- PORT1_IOCR8 -------------------------------- */ +#define PORT1_IOCR8_PC8_Pos (3UL) /*!< PORT1 IOCR8: PC8 (Bit 3) */ +#define PORT1_IOCR8_PC8_Msk (0xf8UL) /*!< PORT1 IOCR8: PC8 (Bitfield-Mask: 0x1f) */ +#define PORT1_IOCR8_PC9_Pos (11UL) /*!< PORT1 IOCR8: PC9 (Bit 11) */ +#define PORT1_IOCR8_PC9_Msk (0xf800UL) /*!< PORT1 IOCR8: PC9 (Bitfield-Mask: 0x1f) */ +#define PORT1_IOCR8_PC10_Pos (19UL) /*!< PORT1 IOCR8: PC10 (Bit 19) */ +#define PORT1_IOCR8_PC10_Msk (0xf80000UL) /*!< PORT1 IOCR8: PC10 (Bitfield-Mask: 0x1f) */ +#define PORT1_IOCR8_PC11_Pos (27UL) /*!< PORT1 IOCR8: PC11 (Bit 27) */ +#define PORT1_IOCR8_PC11_Msk (0xf8000000UL) /*!< PORT1 IOCR8: PC11 (Bitfield-Mask: 0x1f) */ + +/* -------------------------------- PORT1_IOCR12 -------------------------------- */ +#define PORT1_IOCR12_PC12_Pos (3UL) /*!< PORT1 IOCR12: PC12 (Bit 3) */ +#define PORT1_IOCR12_PC12_Msk (0xf8UL) /*!< PORT1 IOCR12: PC12 (Bitfield-Mask: 0x1f) */ +#define PORT1_IOCR12_PC13_Pos (11UL) /*!< PORT1 IOCR12: PC13 (Bit 11) */ +#define PORT1_IOCR12_PC13_Msk (0xf800UL) /*!< PORT1 IOCR12: PC13 (Bitfield-Mask: 0x1f) */ +#define PORT1_IOCR12_PC14_Pos (19UL) /*!< PORT1 IOCR12: PC14 (Bit 19) */ +#define PORT1_IOCR12_PC14_Msk (0xf80000UL) /*!< PORT1 IOCR12: PC14 (Bitfield-Mask: 0x1f) */ +#define PORT1_IOCR12_PC15_Pos (27UL) /*!< PORT1 IOCR12: PC15 (Bit 27) */ +#define PORT1_IOCR12_PC15_Msk (0xf8000000UL) /*!< PORT1 IOCR12: PC15 (Bitfield-Mask: 0x1f) */ + +/* ---------------------------------- PORT1_IN ---------------------------------- */ +#define PORT1_IN_P0_Pos (0UL) /*!< PORT1 IN: P0 (Bit 0) */ +#define PORT1_IN_P0_Msk (0x1UL) /*!< PORT1 IN: P0 (Bitfield-Mask: 0x01) */ +#define PORT1_IN_P1_Pos (1UL) /*!< PORT1 IN: P1 (Bit 1) */ +#define PORT1_IN_P1_Msk (0x2UL) /*!< PORT1 IN: P1 (Bitfield-Mask: 0x01) */ +#define PORT1_IN_P2_Pos (2UL) /*!< PORT1 IN: P2 (Bit 2) */ +#define PORT1_IN_P2_Msk (0x4UL) /*!< PORT1 IN: P2 (Bitfield-Mask: 0x01) */ +#define PORT1_IN_P3_Pos (3UL) /*!< PORT1 IN: P3 (Bit 3) */ +#define PORT1_IN_P3_Msk (0x8UL) /*!< PORT1 IN: P3 (Bitfield-Mask: 0x01) */ +#define PORT1_IN_P4_Pos (4UL) /*!< PORT1 IN: P4 (Bit 4) */ +#define PORT1_IN_P4_Msk (0x10UL) /*!< PORT1 IN: P4 (Bitfield-Mask: 0x01) */ +#define PORT1_IN_P5_Pos (5UL) /*!< PORT1 IN: P5 (Bit 5) */ +#define PORT1_IN_P5_Msk (0x20UL) /*!< PORT1 IN: P5 (Bitfield-Mask: 0x01) */ +#define PORT1_IN_P6_Pos (6UL) /*!< PORT1 IN: P6 (Bit 6) */ +#define PORT1_IN_P6_Msk (0x40UL) /*!< PORT1 IN: P6 (Bitfield-Mask: 0x01) */ +#define PORT1_IN_P7_Pos (7UL) /*!< PORT1 IN: P7 (Bit 7) */ +#define PORT1_IN_P7_Msk (0x80UL) /*!< PORT1 IN: P7 (Bitfield-Mask: 0x01) */ +#define PORT1_IN_P8_Pos (8UL) /*!< PORT1 IN: P8 (Bit 8) */ +#define PORT1_IN_P8_Msk (0x100UL) /*!< PORT1 IN: P8 (Bitfield-Mask: 0x01) */ +#define PORT1_IN_P9_Pos (9UL) /*!< PORT1 IN: P9 (Bit 9) */ +#define PORT1_IN_P9_Msk (0x200UL) /*!< PORT1 IN: P9 (Bitfield-Mask: 0x01) */ +#define PORT1_IN_P10_Pos (10UL) /*!< PORT1 IN: P10 (Bit 10) */ +#define PORT1_IN_P10_Msk (0x400UL) /*!< PORT1 IN: P10 (Bitfield-Mask: 0x01) */ +#define PORT1_IN_P11_Pos (11UL) /*!< PORT1 IN: P11 (Bit 11) */ +#define PORT1_IN_P11_Msk (0x800UL) /*!< PORT1 IN: P11 (Bitfield-Mask: 0x01) */ +#define PORT1_IN_P12_Pos (12UL) /*!< PORT1 IN: P12 (Bit 12) */ +#define PORT1_IN_P12_Msk (0x1000UL) /*!< PORT1 IN: P12 (Bitfield-Mask: 0x01) */ +#define PORT1_IN_P13_Pos (13UL) /*!< PORT1 IN: P13 (Bit 13) */ +#define PORT1_IN_P13_Msk (0x2000UL) /*!< PORT1 IN: P13 (Bitfield-Mask: 0x01) */ +#define PORT1_IN_P14_Pos (14UL) /*!< PORT1 IN: P14 (Bit 14) */ +#define PORT1_IN_P14_Msk (0x4000UL) /*!< PORT1 IN: P14 (Bitfield-Mask: 0x01) */ +#define PORT1_IN_P15_Pos (15UL) /*!< PORT1 IN: P15 (Bit 15) */ +#define PORT1_IN_P15_Msk (0x8000UL) /*!< PORT1 IN: P15 (Bitfield-Mask: 0x01) */ + +/* --------------------------------- PORT1_PDR0 --------------------------------- */ +#define PORT1_PDR0_PD0_Pos (0UL) /*!< PORT1 PDR0: PD0 (Bit 0) */ +#define PORT1_PDR0_PD0_Msk (0x7UL) /*!< PORT1 PDR0: PD0 (Bitfield-Mask: 0x07) */ +#define PORT1_PDR0_PD1_Pos (4UL) /*!< PORT1 PDR0: PD1 (Bit 4) */ +#define PORT1_PDR0_PD1_Msk (0x70UL) /*!< PORT1 PDR0: PD1 (Bitfield-Mask: 0x07) */ +#define PORT1_PDR0_PD2_Pos (8UL) /*!< PORT1 PDR0: PD2 (Bit 8) */ +#define PORT1_PDR0_PD2_Msk (0x700UL) /*!< PORT1 PDR0: PD2 (Bitfield-Mask: 0x07) */ +#define PORT1_PDR0_PD3_Pos (12UL) /*!< PORT1 PDR0: PD3 (Bit 12) */ +#define PORT1_PDR0_PD3_Msk (0x7000UL) /*!< PORT1 PDR0: PD3 (Bitfield-Mask: 0x07) */ +#define PORT1_PDR0_PD4_Pos (16UL) /*!< PORT1 PDR0: PD4 (Bit 16) */ +#define PORT1_PDR0_PD4_Msk (0x70000UL) /*!< PORT1 PDR0: PD4 (Bitfield-Mask: 0x07) */ +#define PORT1_PDR0_PD5_Pos (20UL) /*!< PORT1 PDR0: PD5 (Bit 20) */ +#define PORT1_PDR0_PD5_Msk (0x700000UL) /*!< PORT1 PDR0: PD5 (Bitfield-Mask: 0x07) */ +#define PORT1_PDR0_PD6_Pos (24UL) /*!< PORT1 PDR0: PD6 (Bit 24) */ +#define PORT1_PDR0_PD6_Msk (0x7000000UL) /*!< PORT1 PDR0: PD6 (Bitfield-Mask: 0x07) */ +#define PORT1_PDR0_PD7_Pos (28UL) /*!< PORT1 PDR0: PD7 (Bit 28) */ +#define PORT1_PDR0_PD7_Msk (0x70000000UL) /*!< PORT1 PDR0: PD7 (Bitfield-Mask: 0x07) */ + +/* --------------------------------- PORT1_PDR1 --------------------------------- */ +#define PORT1_PDR1_PD8_Pos (0UL) /*!< PORT1 PDR1: PD8 (Bit 0) */ +#define PORT1_PDR1_PD8_Msk (0x7UL) /*!< PORT1 PDR1: PD8 (Bitfield-Mask: 0x07) */ +#define PORT1_PDR1_PD9_Pos (4UL) /*!< PORT1 PDR1: PD9 (Bit 4) */ +#define PORT1_PDR1_PD9_Msk (0x70UL) /*!< PORT1 PDR1: PD9 (Bitfield-Mask: 0x07) */ +#define PORT1_PDR1_PD10_Pos (8UL) /*!< PORT1 PDR1: PD10 (Bit 8) */ +#define PORT1_PDR1_PD10_Msk (0x700UL) /*!< PORT1 PDR1: PD10 (Bitfield-Mask: 0x07) */ +#define PORT1_PDR1_PD11_Pos (12UL) /*!< PORT1 PDR1: PD11 (Bit 12) */ +#define PORT1_PDR1_PD11_Msk (0x7000UL) /*!< PORT1 PDR1: PD11 (Bitfield-Mask: 0x07) */ +#define PORT1_PDR1_PD12_Pos (16UL) /*!< PORT1 PDR1: PD12 (Bit 16) */ +#define PORT1_PDR1_PD12_Msk (0x70000UL) /*!< PORT1 PDR1: PD12 (Bitfield-Mask: 0x07) */ +#define PORT1_PDR1_PD13_Pos (20UL) /*!< PORT1 PDR1: PD13 (Bit 20) */ +#define PORT1_PDR1_PD13_Msk (0x700000UL) /*!< PORT1 PDR1: PD13 (Bitfield-Mask: 0x07) */ +#define PORT1_PDR1_PD14_Pos (24UL) /*!< PORT1 PDR1: PD14 (Bit 24) */ +#define PORT1_PDR1_PD14_Msk (0x7000000UL) /*!< PORT1 PDR1: PD14 (Bitfield-Mask: 0x07) */ +#define PORT1_PDR1_PD15_Pos (28UL) /*!< PORT1 PDR1: PD15 (Bit 28) */ +#define PORT1_PDR1_PD15_Msk (0x70000000UL) /*!< PORT1 PDR1: PD15 (Bitfield-Mask: 0x07) */ + +/* --------------------------------- PORT1_PDISC -------------------------------- */ +#define PORT1_PDISC_PDIS0_Pos (0UL) /*!< PORT1 PDISC: PDIS0 (Bit 0) */ +#define PORT1_PDISC_PDIS0_Msk (0x1UL) /*!< PORT1 PDISC: PDIS0 (Bitfield-Mask: 0x01) */ +#define PORT1_PDISC_PDIS1_Pos (1UL) /*!< PORT1 PDISC: PDIS1 (Bit 1) */ +#define PORT1_PDISC_PDIS1_Msk (0x2UL) /*!< PORT1 PDISC: PDIS1 (Bitfield-Mask: 0x01) */ +#define PORT1_PDISC_PDIS2_Pos (2UL) /*!< PORT1 PDISC: PDIS2 (Bit 2) */ +#define PORT1_PDISC_PDIS2_Msk (0x4UL) /*!< PORT1 PDISC: PDIS2 (Bitfield-Mask: 0x01) */ +#define PORT1_PDISC_PDIS3_Pos (3UL) /*!< PORT1 PDISC: PDIS3 (Bit 3) */ +#define PORT1_PDISC_PDIS3_Msk (0x8UL) /*!< PORT1 PDISC: PDIS3 (Bitfield-Mask: 0x01) */ +#define PORT1_PDISC_PDIS4_Pos (4UL) /*!< PORT1 PDISC: PDIS4 (Bit 4) */ +#define PORT1_PDISC_PDIS4_Msk (0x10UL) /*!< PORT1 PDISC: PDIS4 (Bitfield-Mask: 0x01) */ +#define PORT1_PDISC_PDIS5_Pos (5UL) /*!< PORT1 PDISC: PDIS5 (Bit 5) */ +#define PORT1_PDISC_PDIS5_Msk (0x20UL) /*!< PORT1 PDISC: PDIS5 (Bitfield-Mask: 0x01) */ +#define PORT1_PDISC_PDIS6_Pos (6UL) /*!< PORT1 PDISC: PDIS6 (Bit 6) */ +#define PORT1_PDISC_PDIS6_Msk (0x40UL) /*!< PORT1 PDISC: PDIS6 (Bitfield-Mask: 0x01) */ +#define PORT1_PDISC_PDIS7_Pos (7UL) /*!< PORT1 PDISC: PDIS7 (Bit 7) */ +#define PORT1_PDISC_PDIS7_Msk (0x80UL) /*!< PORT1 PDISC: PDIS7 (Bitfield-Mask: 0x01) */ +#define PORT1_PDISC_PDIS8_Pos (8UL) /*!< PORT1 PDISC: PDIS8 (Bit 8) */ +#define PORT1_PDISC_PDIS8_Msk (0x100UL) /*!< PORT1 PDISC: PDIS8 (Bitfield-Mask: 0x01) */ +#define PORT1_PDISC_PDIS9_Pos (9UL) /*!< PORT1 PDISC: PDIS9 (Bit 9) */ +#define PORT1_PDISC_PDIS9_Msk (0x200UL) /*!< PORT1 PDISC: PDIS9 (Bitfield-Mask: 0x01) */ +#define PORT1_PDISC_PDIS10_Pos (10UL) /*!< PORT1 PDISC: PDIS10 (Bit 10) */ +#define PORT1_PDISC_PDIS10_Msk (0x400UL) /*!< PORT1 PDISC: PDIS10 (Bitfield-Mask: 0x01) */ +#define PORT1_PDISC_PDIS11_Pos (11UL) /*!< PORT1 PDISC: PDIS11 (Bit 11) */ +#define PORT1_PDISC_PDIS11_Msk (0x800UL) /*!< PORT1 PDISC: PDIS11 (Bitfield-Mask: 0x01) */ +#define PORT1_PDISC_PDIS12_Pos (12UL) /*!< PORT1 PDISC: PDIS12 (Bit 12) */ +#define PORT1_PDISC_PDIS12_Msk (0x1000UL) /*!< PORT1 PDISC: PDIS12 (Bitfield-Mask: 0x01) */ +#define PORT1_PDISC_PDIS13_Pos (13UL) /*!< PORT1 PDISC: PDIS13 (Bit 13) */ +#define PORT1_PDISC_PDIS13_Msk (0x2000UL) /*!< PORT1 PDISC: PDIS13 (Bitfield-Mask: 0x01) */ +#define PORT1_PDISC_PDIS14_Pos (14UL) /*!< PORT1 PDISC: PDIS14 (Bit 14) */ +#define PORT1_PDISC_PDIS14_Msk (0x4000UL) /*!< PORT1 PDISC: PDIS14 (Bitfield-Mask: 0x01) */ +#define PORT1_PDISC_PDIS15_Pos (15UL) /*!< PORT1 PDISC: PDIS15 (Bit 15) */ +#define PORT1_PDISC_PDIS15_Msk (0x8000UL) /*!< PORT1 PDISC: PDIS15 (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- PORT1_PPS --------------------------------- */ +#define PORT1_PPS_PPS0_Pos (0UL) /*!< PORT1 PPS: PPS0 (Bit 0) */ +#define PORT1_PPS_PPS0_Msk (0x1UL) /*!< PORT1 PPS: PPS0 (Bitfield-Mask: 0x01) */ +#define PORT1_PPS_PPS1_Pos (1UL) /*!< PORT1 PPS: PPS1 (Bit 1) */ +#define PORT1_PPS_PPS1_Msk (0x2UL) /*!< PORT1 PPS: PPS1 (Bitfield-Mask: 0x01) */ +#define PORT1_PPS_PPS2_Pos (2UL) /*!< PORT1 PPS: PPS2 (Bit 2) */ +#define PORT1_PPS_PPS2_Msk (0x4UL) /*!< PORT1 PPS: PPS2 (Bitfield-Mask: 0x01) */ +#define PORT1_PPS_PPS3_Pos (3UL) /*!< PORT1 PPS: PPS3 (Bit 3) */ +#define PORT1_PPS_PPS3_Msk (0x8UL) /*!< PORT1 PPS: PPS3 (Bitfield-Mask: 0x01) */ +#define PORT1_PPS_PPS4_Pos (4UL) /*!< PORT1 PPS: PPS4 (Bit 4) */ +#define PORT1_PPS_PPS4_Msk (0x10UL) /*!< PORT1 PPS: PPS4 (Bitfield-Mask: 0x01) */ +#define PORT1_PPS_PPS5_Pos (5UL) /*!< PORT1 PPS: PPS5 (Bit 5) */ +#define PORT1_PPS_PPS5_Msk (0x20UL) /*!< PORT1 PPS: PPS5 (Bitfield-Mask: 0x01) */ +#define PORT1_PPS_PPS6_Pos (6UL) /*!< PORT1 PPS: PPS6 (Bit 6) */ +#define PORT1_PPS_PPS6_Msk (0x40UL) /*!< PORT1 PPS: PPS6 (Bitfield-Mask: 0x01) */ +#define PORT1_PPS_PPS7_Pos (7UL) /*!< PORT1 PPS: PPS7 (Bit 7) */ +#define PORT1_PPS_PPS7_Msk (0x80UL) /*!< PORT1 PPS: PPS7 (Bitfield-Mask: 0x01) */ +#define PORT1_PPS_PPS8_Pos (8UL) /*!< PORT1 PPS: PPS8 (Bit 8) */ +#define PORT1_PPS_PPS8_Msk (0x100UL) /*!< PORT1 PPS: PPS8 (Bitfield-Mask: 0x01) */ +#define PORT1_PPS_PPS9_Pos (9UL) /*!< PORT1 PPS: PPS9 (Bit 9) */ +#define PORT1_PPS_PPS9_Msk (0x200UL) /*!< PORT1 PPS: PPS9 (Bitfield-Mask: 0x01) */ +#define PORT1_PPS_PPS10_Pos (10UL) /*!< PORT1 PPS: PPS10 (Bit 10) */ +#define PORT1_PPS_PPS10_Msk (0x400UL) /*!< PORT1 PPS: PPS10 (Bitfield-Mask: 0x01) */ +#define PORT1_PPS_PPS11_Pos (11UL) /*!< PORT1 PPS: PPS11 (Bit 11) */ +#define PORT1_PPS_PPS11_Msk (0x800UL) /*!< PORT1 PPS: PPS11 (Bitfield-Mask: 0x01) */ +#define PORT1_PPS_PPS12_Pos (12UL) /*!< PORT1 PPS: PPS12 (Bit 12) */ +#define PORT1_PPS_PPS12_Msk (0x1000UL) /*!< PORT1 PPS: PPS12 (Bitfield-Mask: 0x01) */ +#define PORT1_PPS_PPS13_Pos (13UL) /*!< PORT1 PPS: PPS13 (Bit 13) */ +#define PORT1_PPS_PPS13_Msk (0x2000UL) /*!< PORT1 PPS: PPS13 (Bitfield-Mask: 0x01) */ +#define PORT1_PPS_PPS14_Pos (14UL) /*!< PORT1 PPS: PPS14 (Bit 14) */ +#define PORT1_PPS_PPS14_Msk (0x4000UL) /*!< PORT1 PPS: PPS14 (Bitfield-Mask: 0x01) */ +#define PORT1_PPS_PPS15_Pos (15UL) /*!< PORT1 PPS: PPS15 (Bit 15) */ +#define PORT1_PPS_PPS15_Msk (0x8000UL) /*!< PORT1 PPS: PPS15 (Bitfield-Mask: 0x01) */ + +/* --------------------------------- PORT1_HWSEL -------------------------------- */ +#define PORT1_HWSEL_HW0_Pos (0UL) /*!< PORT1 HWSEL: HW0 (Bit 0) */ +#define PORT1_HWSEL_HW0_Msk (0x3UL) /*!< PORT1 HWSEL: HW0 (Bitfield-Mask: 0x03) */ +#define PORT1_HWSEL_HW1_Pos (2UL) /*!< PORT1 HWSEL: HW1 (Bit 2) */ +#define PORT1_HWSEL_HW1_Msk (0xcUL) /*!< PORT1 HWSEL: HW1 (Bitfield-Mask: 0x03) */ +#define PORT1_HWSEL_HW2_Pos (4UL) /*!< PORT1 HWSEL: HW2 (Bit 4) */ +#define PORT1_HWSEL_HW2_Msk (0x30UL) /*!< PORT1 HWSEL: HW2 (Bitfield-Mask: 0x03) */ +#define PORT1_HWSEL_HW3_Pos (6UL) /*!< PORT1 HWSEL: HW3 (Bit 6) */ +#define PORT1_HWSEL_HW3_Msk (0xc0UL) /*!< PORT1 HWSEL: HW3 (Bitfield-Mask: 0x03) */ +#define PORT1_HWSEL_HW4_Pos (8UL) /*!< PORT1 HWSEL: HW4 (Bit 8) */ +#define PORT1_HWSEL_HW4_Msk (0x300UL) /*!< PORT1 HWSEL: HW4 (Bitfield-Mask: 0x03) */ +#define PORT1_HWSEL_HW5_Pos (10UL) /*!< PORT1 HWSEL: HW5 (Bit 10) */ +#define PORT1_HWSEL_HW5_Msk (0xc00UL) /*!< PORT1 HWSEL: HW5 (Bitfield-Mask: 0x03) */ +#define PORT1_HWSEL_HW6_Pos (12UL) /*!< PORT1 HWSEL: HW6 (Bit 12) */ +#define PORT1_HWSEL_HW6_Msk (0x3000UL) /*!< PORT1 HWSEL: HW6 (Bitfield-Mask: 0x03) */ +#define PORT1_HWSEL_HW7_Pos (14UL) /*!< PORT1 HWSEL: HW7 (Bit 14) */ +#define PORT1_HWSEL_HW7_Msk (0xc000UL) /*!< PORT1 HWSEL: HW7 (Bitfield-Mask: 0x03) */ +#define PORT1_HWSEL_HW8_Pos (16UL) /*!< PORT1 HWSEL: HW8 (Bit 16) */ +#define PORT1_HWSEL_HW8_Msk (0x30000UL) /*!< PORT1 HWSEL: HW8 (Bitfield-Mask: 0x03) */ +#define PORT1_HWSEL_HW9_Pos (18UL) /*!< PORT1 HWSEL: HW9 (Bit 18) */ +#define PORT1_HWSEL_HW9_Msk (0xc0000UL) /*!< PORT1 HWSEL: HW9 (Bitfield-Mask: 0x03) */ +#define PORT1_HWSEL_HW10_Pos (20UL) /*!< PORT1 HWSEL: HW10 (Bit 20) */ +#define PORT1_HWSEL_HW10_Msk (0x300000UL) /*!< PORT1 HWSEL: HW10 (Bitfield-Mask: 0x03) */ +#define PORT1_HWSEL_HW11_Pos (22UL) /*!< PORT1 HWSEL: HW11 (Bit 22) */ +#define PORT1_HWSEL_HW11_Msk (0xc00000UL) /*!< PORT1 HWSEL: HW11 (Bitfield-Mask: 0x03) */ +#define PORT1_HWSEL_HW12_Pos (24UL) /*!< PORT1 HWSEL: HW12 (Bit 24) */ +#define PORT1_HWSEL_HW12_Msk (0x3000000UL) /*!< PORT1 HWSEL: HW12 (Bitfield-Mask: 0x03) */ +#define PORT1_HWSEL_HW13_Pos (26UL) /*!< PORT1 HWSEL: HW13 (Bit 26) */ +#define PORT1_HWSEL_HW13_Msk (0xc000000UL) /*!< PORT1 HWSEL: HW13 (Bitfield-Mask: 0x03) */ +#define PORT1_HWSEL_HW14_Pos (28UL) /*!< PORT1 HWSEL: HW14 (Bit 28) */ +#define PORT1_HWSEL_HW14_Msk (0x30000000UL) /*!< PORT1 HWSEL: HW14 (Bitfield-Mask: 0x03) */ +#define PORT1_HWSEL_HW15_Pos (30UL) /*!< PORT1 HWSEL: HW15 (Bit 30) */ +#define PORT1_HWSEL_HW15_Msk (0xc0000000UL) /*!< PORT1 HWSEL: HW15 (Bitfield-Mask: 0x03) */ + + +/* ================================================================================ */ +/* ================ struct 'PORT2' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ---------------------------------- PORT2_OUT --------------------------------- */ +#define PORT2_OUT_P0_Pos (0UL) /*!< PORT2 OUT: P0 (Bit 0) */ +#define PORT2_OUT_P0_Msk (0x1UL) /*!< PORT2 OUT: P0 (Bitfield-Mask: 0x01) */ +#define PORT2_OUT_P1_Pos (1UL) /*!< PORT2 OUT: P1 (Bit 1) */ +#define PORT2_OUT_P1_Msk (0x2UL) /*!< PORT2 OUT: P1 (Bitfield-Mask: 0x01) */ +#define PORT2_OUT_P2_Pos (2UL) /*!< PORT2 OUT: P2 (Bit 2) */ +#define PORT2_OUT_P2_Msk (0x4UL) /*!< PORT2 OUT: P2 (Bitfield-Mask: 0x01) */ +#define PORT2_OUT_P3_Pos (3UL) /*!< PORT2 OUT: P3 (Bit 3) */ +#define PORT2_OUT_P3_Msk (0x8UL) /*!< PORT2 OUT: P3 (Bitfield-Mask: 0x01) */ +#define PORT2_OUT_P4_Pos (4UL) /*!< PORT2 OUT: P4 (Bit 4) */ +#define PORT2_OUT_P4_Msk (0x10UL) /*!< PORT2 OUT: P4 (Bitfield-Mask: 0x01) */ +#define PORT2_OUT_P5_Pos (5UL) /*!< PORT2 OUT: P5 (Bit 5) */ +#define PORT2_OUT_P5_Msk (0x20UL) /*!< PORT2 OUT: P5 (Bitfield-Mask: 0x01) */ +#define PORT2_OUT_P6_Pos (6UL) /*!< PORT2 OUT: P6 (Bit 6) */ +#define PORT2_OUT_P6_Msk (0x40UL) /*!< PORT2 OUT: P6 (Bitfield-Mask: 0x01) */ +#define PORT2_OUT_P7_Pos (7UL) /*!< PORT2 OUT: P7 (Bit 7) */ +#define PORT2_OUT_P7_Msk (0x80UL) /*!< PORT2 OUT: P7 (Bitfield-Mask: 0x01) */ +#define PORT2_OUT_P8_Pos (8UL) /*!< PORT2 OUT: P8 (Bit 8) */ +#define PORT2_OUT_P8_Msk (0x100UL) /*!< PORT2 OUT: P8 (Bitfield-Mask: 0x01) */ +#define PORT2_OUT_P9_Pos (9UL) /*!< PORT2 OUT: P9 (Bit 9) */ +#define PORT2_OUT_P9_Msk (0x200UL) /*!< PORT2 OUT: P9 (Bitfield-Mask: 0x01) */ +#define PORT2_OUT_P10_Pos (10UL) /*!< PORT2 OUT: P10 (Bit 10) */ +#define PORT2_OUT_P10_Msk (0x400UL) /*!< PORT2 OUT: P10 (Bitfield-Mask: 0x01) */ +#define PORT2_OUT_P11_Pos (11UL) /*!< PORT2 OUT: P11 (Bit 11) */ +#define PORT2_OUT_P11_Msk (0x800UL) /*!< PORT2 OUT: P11 (Bitfield-Mask: 0x01) */ +#define PORT2_OUT_P12_Pos (12UL) /*!< PORT2 OUT: P12 (Bit 12) */ +#define PORT2_OUT_P12_Msk (0x1000UL) /*!< PORT2 OUT: P12 (Bitfield-Mask: 0x01) */ +#define PORT2_OUT_P13_Pos (13UL) /*!< PORT2 OUT: P13 (Bit 13) */ +#define PORT2_OUT_P13_Msk (0x2000UL) /*!< PORT2 OUT: P13 (Bitfield-Mask: 0x01) */ +#define PORT2_OUT_P14_Pos (14UL) /*!< PORT2 OUT: P14 (Bit 14) */ +#define PORT2_OUT_P14_Msk (0x4000UL) /*!< PORT2 OUT: P14 (Bitfield-Mask: 0x01) */ +#define PORT2_OUT_P15_Pos (15UL) /*!< PORT2 OUT: P15 (Bit 15) */ +#define PORT2_OUT_P15_Msk (0x8000UL) /*!< PORT2 OUT: P15 (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- PORT2_OMR --------------------------------- */ +#define PORT2_OMR_PS0_Pos (0UL) /*!< PORT2 OMR: PS0 (Bit 0) */ +#define PORT2_OMR_PS0_Msk (0x1UL) /*!< PORT2 OMR: PS0 (Bitfield-Mask: 0x01) */ +#define PORT2_OMR_PS1_Pos (1UL) /*!< PORT2 OMR: PS1 (Bit 1) */ +#define PORT2_OMR_PS1_Msk (0x2UL) /*!< PORT2 OMR: PS1 (Bitfield-Mask: 0x01) */ +#define PORT2_OMR_PS2_Pos (2UL) /*!< PORT2 OMR: PS2 (Bit 2) */ +#define PORT2_OMR_PS2_Msk (0x4UL) /*!< PORT2 OMR: PS2 (Bitfield-Mask: 0x01) */ +#define PORT2_OMR_PS3_Pos (3UL) /*!< PORT2 OMR: PS3 (Bit 3) */ +#define PORT2_OMR_PS3_Msk (0x8UL) /*!< PORT2 OMR: PS3 (Bitfield-Mask: 0x01) */ +#define PORT2_OMR_PS4_Pos (4UL) /*!< PORT2 OMR: PS4 (Bit 4) */ +#define PORT2_OMR_PS4_Msk (0x10UL) /*!< PORT2 OMR: PS4 (Bitfield-Mask: 0x01) */ +#define PORT2_OMR_PS5_Pos (5UL) /*!< PORT2 OMR: PS5 (Bit 5) */ +#define PORT2_OMR_PS5_Msk (0x20UL) /*!< PORT2 OMR: PS5 (Bitfield-Mask: 0x01) */ +#define PORT2_OMR_PS6_Pos (6UL) /*!< PORT2 OMR: PS6 (Bit 6) */ +#define PORT2_OMR_PS6_Msk (0x40UL) /*!< PORT2 OMR: PS6 (Bitfield-Mask: 0x01) */ +#define PORT2_OMR_PS7_Pos (7UL) /*!< PORT2 OMR: PS7 (Bit 7) */ +#define PORT2_OMR_PS7_Msk (0x80UL) /*!< PORT2 OMR: PS7 (Bitfield-Mask: 0x01) */ +#define PORT2_OMR_PS8_Pos (8UL) /*!< PORT2 OMR: PS8 (Bit 8) */ +#define PORT2_OMR_PS8_Msk (0x100UL) /*!< PORT2 OMR: PS8 (Bitfield-Mask: 0x01) */ +#define PORT2_OMR_PS9_Pos (9UL) /*!< PORT2 OMR: PS9 (Bit 9) */ +#define PORT2_OMR_PS9_Msk (0x200UL) /*!< PORT2 OMR: PS9 (Bitfield-Mask: 0x01) */ +#define PORT2_OMR_PS10_Pos (10UL) /*!< PORT2 OMR: PS10 (Bit 10) */ +#define PORT2_OMR_PS10_Msk (0x400UL) /*!< PORT2 OMR: PS10 (Bitfield-Mask: 0x01) */ +#define PORT2_OMR_PS11_Pos (11UL) /*!< PORT2 OMR: PS11 (Bit 11) */ +#define PORT2_OMR_PS11_Msk (0x800UL) /*!< PORT2 OMR: PS11 (Bitfield-Mask: 0x01) */ +#define PORT2_OMR_PS12_Pos (12UL) /*!< PORT2 OMR: PS12 (Bit 12) */ +#define PORT2_OMR_PS12_Msk (0x1000UL) /*!< PORT2 OMR: PS12 (Bitfield-Mask: 0x01) */ +#define PORT2_OMR_PS13_Pos (13UL) /*!< PORT2 OMR: PS13 (Bit 13) */ +#define PORT2_OMR_PS13_Msk (0x2000UL) /*!< PORT2 OMR: PS13 (Bitfield-Mask: 0x01) */ +#define PORT2_OMR_PS14_Pos (14UL) /*!< PORT2 OMR: PS14 (Bit 14) */ +#define PORT2_OMR_PS14_Msk (0x4000UL) /*!< PORT2 OMR: PS14 (Bitfield-Mask: 0x01) */ +#define PORT2_OMR_PS15_Pos (15UL) /*!< PORT2 OMR: PS15 (Bit 15) */ +#define PORT2_OMR_PS15_Msk (0x8000UL) /*!< PORT2 OMR: PS15 (Bitfield-Mask: 0x01) */ +#define PORT2_OMR_PR0_Pos (16UL) /*!< PORT2 OMR: PR0 (Bit 16) */ +#define PORT2_OMR_PR0_Msk (0x10000UL) /*!< PORT2 OMR: PR0 (Bitfield-Mask: 0x01) */ +#define PORT2_OMR_PR1_Pos (17UL) /*!< PORT2 OMR: PR1 (Bit 17) */ +#define PORT2_OMR_PR1_Msk (0x20000UL) /*!< PORT2 OMR: PR1 (Bitfield-Mask: 0x01) */ +#define PORT2_OMR_PR2_Pos (18UL) /*!< PORT2 OMR: PR2 (Bit 18) */ +#define PORT2_OMR_PR2_Msk (0x40000UL) /*!< PORT2 OMR: PR2 (Bitfield-Mask: 0x01) */ +#define PORT2_OMR_PR3_Pos (19UL) /*!< PORT2 OMR: PR3 (Bit 19) */ +#define PORT2_OMR_PR3_Msk (0x80000UL) /*!< PORT2 OMR: PR3 (Bitfield-Mask: 0x01) */ +#define PORT2_OMR_PR4_Pos (20UL) /*!< PORT2 OMR: PR4 (Bit 20) */ +#define PORT2_OMR_PR4_Msk (0x100000UL) /*!< PORT2 OMR: PR4 (Bitfield-Mask: 0x01) */ +#define PORT2_OMR_PR5_Pos (21UL) /*!< PORT2 OMR: PR5 (Bit 21) */ +#define PORT2_OMR_PR5_Msk (0x200000UL) /*!< PORT2 OMR: PR5 (Bitfield-Mask: 0x01) */ +#define PORT2_OMR_PR6_Pos (22UL) /*!< PORT2 OMR: PR6 (Bit 22) */ +#define PORT2_OMR_PR6_Msk (0x400000UL) /*!< PORT2 OMR: PR6 (Bitfield-Mask: 0x01) */ +#define PORT2_OMR_PR7_Pos (23UL) /*!< PORT2 OMR: PR7 (Bit 23) */ +#define PORT2_OMR_PR7_Msk (0x800000UL) /*!< PORT2 OMR: PR7 (Bitfield-Mask: 0x01) */ +#define PORT2_OMR_PR8_Pos (24UL) /*!< PORT2 OMR: PR8 (Bit 24) */ +#define PORT2_OMR_PR8_Msk (0x1000000UL) /*!< PORT2 OMR: PR8 (Bitfield-Mask: 0x01) */ +#define PORT2_OMR_PR9_Pos (25UL) /*!< PORT2 OMR: PR9 (Bit 25) */ +#define PORT2_OMR_PR9_Msk (0x2000000UL) /*!< PORT2 OMR: PR9 (Bitfield-Mask: 0x01) */ +#define PORT2_OMR_PR10_Pos (26UL) /*!< PORT2 OMR: PR10 (Bit 26) */ +#define PORT2_OMR_PR10_Msk (0x4000000UL) /*!< PORT2 OMR: PR10 (Bitfield-Mask: 0x01) */ +#define PORT2_OMR_PR11_Pos (27UL) /*!< PORT2 OMR: PR11 (Bit 27) */ +#define PORT2_OMR_PR11_Msk (0x8000000UL) /*!< PORT2 OMR: PR11 (Bitfield-Mask: 0x01) */ +#define PORT2_OMR_PR12_Pos (28UL) /*!< PORT2 OMR: PR12 (Bit 28) */ +#define PORT2_OMR_PR12_Msk (0x10000000UL) /*!< PORT2 OMR: PR12 (Bitfield-Mask: 0x01) */ +#define PORT2_OMR_PR13_Pos (29UL) /*!< PORT2 OMR: PR13 (Bit 29) */ +#define PORT2_OMR_PR13_Msk (0x20000000UL) /*!< PORT2 OMR: PR13 (Bitfield-Mask: 0x01) */ +#define PORT2_OMR_PR14_Pos (30UL) /*!< PORT2 OMR: PR14 (Bit 30) */ +#define PORT2_OMR_PR14_Msk (0x40000000UL) /*!< PORT2 OMR: PR14 (Bitfield-Mask: 0x01) */ +#define PORT2_OMR_PR15_Pos (31UL) /*!< PORT2 OMR: PR15 (Bit 31) */ +#define PORT2_OMR_PR15_Msk (0x80000000UL) /*!< PORT2 OMR: PR15 (Bitfield-Mask: 0x01) */ + +/* --------------------------------- PORT2_IOCR0 -------------------------------- */ +#define PORT2_IOCR0_PC0_Pos (3UL) /*!< PORT2 IOCR0: PC0 (Bit 3) */ +#define PORT2_IOCR0_PC0_Msk (0xf8UL) /*!< PORT2 IOCR0: PC0 (Bitfield-Mask: 0x1f) */ +#define PORT2_IOCR0_PC1_Pos (11UL) /*!< PORT2 IOCR0: PC1 (Bit 11) */ +#define PORT2_IOCR0_PC1_Msk (0xf800UL) /*!< PORT2 IOCR0: PC1 (Bitfield-Mask: 0x1f) */ +#define PORT2_IOCR0_PC2_Pos (19UL) /*!< PORT2 IOCR0: PC2 (Bit 19) */ +#define PORT2_IOCR0_PC2_Msk (0xf80000UL) /*!< PORT2 IOCR0: PC2 (Bitfield-Mask: 0x1f) */ +#define PORT2_IOCR0_PC3_Pos (27UL) /*!< PORT2 IOCR0: PC3 (Bit 27) */ +#define PORT2_IOCR0_PC3_Msk (0xf8000000UL) /*!< PORT2 IOCR0: PC3 (Bitfield-Mask: 0x1f) */ + +/* --------------------------------- PORT2_IOCR4 -------------------------------- */ +#define PORT2_IOCR4_PC4_Pos (3UL) /*!< PORT2 IOCR4: PC4 (Bit 3) */ +#define PORT2_IOCR4_PC4_Msk (0xf8UL) /*!< PORT2 IOCR4: PC4 (Bitfield-Mask: 0x1f) */ +#define PORT2_IOCR4_PC5_Pos (11UL) /*!< PORT2 IOCR4: PC5 (Bit 11) */ +#define PORT2_IOCR4_PC5_Msk (0xf800UL) /*!< PORT2 IOCR4: PC5 (Bitfield-Mask: 0x1f) */ +#define PORT2_IOCR4_PC6_Pos (19UL) /*!< PORT2 IOCR4: PC6 (Bit 19) */ +#define PORT2_IOCR4_PC6_Msk (0xf80000UL) /*!< PORT2 IOCR4: PC6 (Bitfield-Mask: 0x1f) */ +#define PORT2_IOCR4_PC7_Pos (27UL) /*!< PORT2 IOCR4: PC7 (Bit 27) */ +#define PORT2_IOCR4_PC7_Msk (0xf8000000UL) /*!< PORT2 IOCR4: PC7 (Bitfield-Mask: 0x1f) */ + +/* --------------------------------- PORT2_IOCR8 -------------------------------- */ +#define PORT2_IOCR8_PC8_Pos (3UL) /*!< PORT2 IOCR8: PC8 (Bit 3) */ +#define PORT2_IOCR8_PC8_Msk (0xf8UL) /*!< PORT2 IOCR8: PC8 (Bitfield-Mask: 0x1f) */ +#define PORT2_IOCR8_PC9_Pos (11UL) /*!< PORT2 IOCR8: PC9 (Bit 11) */ +#define PORT2_IOCR8_PC9_Msk (0xf800UL) /*!< PORT2 IOCR8: PC9 (Bitfield-Mask: 0x1f) */ +#define PORT2_IOCR8_PC10_Pos (19UL) /*!< PORT2 IOCR8: PC10 (Bit 19) */ +#define PORT2_IOCR8_PC10_Msk (0xf80000UL) /*!< PORT2 IOCR8: PC10 (Bitfield-Mask: 0x1f) */ +#define PORT2_IOCR8_PC11_Pos (27UL) /*!< PORT2 IOCR8: PC11 (Bit 27) */ +#define PORT2_IOCR8_PC11_Msk (0xf8000000UL) /*!< PORT2 IOCR8: PC11 (Bitfield-Mask: 0x1f) */ + +/* -------------------------------- PORT2_IOCR12 -------------------------------- */ +#define PORT2_IOCR12_PC12_Pos (3UL) /*!< PORT2 IOCR12: PC12 (Bit 3) */ +#define PORT2_IOCR12_PC12_Msk (0xf8UL) /*!< PORT2 IOCR12: PC12 (Bitfield-Mask: 0x1f) */ +#define PORT2_IOCR12_PC13_Pos (11UL) /*!< PORT2 IOCR12: PC13 (Bit 11) */ +#define PORT2_IOCR12_PC13_Msk (0xf800UL) /*!< PORT2 IOCR12: PC13 (Bitfield-Mask: 0x1f) */ +#define PORT2_IOCR12_PC14_Pos (19UL) /*!< PORT2 IOCR12: PC14 (Bit 19) */ +#define PORT2_IOCR12_PC14_Msk (0xf80000UL) /*!< PORT2 IOCR12: PC14 (Bitfield-Mask: 0x1f) */ +#define PORT2_IOCR12_PC15_Pos (27UL) /*!< PORT2 IOCR12: PC15 (Bit 27) */ +#define PORT2_IOCR12_PC15_Msk (0xf8000000UL) /*!< PORT2 IOCR12: PC15 (Bitfield-Mask: 0x1f) */ + +/* ---------------------------------- PORT2_IN ---------------------------------- */ +#define PORT2_IN_P0_Pos (0UL) /*!< PORT2 IN: P0 (Bit 0) */ +#define PORT2_IN_P0_Msk (0x1UL) /*!< PORT2 IN: P0 (Bitfield-Mask: 0x01) */ +#define PORT2_IN_P1_Pos (1UL) /*!< PORT2 IN: P1 (Bit 1) */ +#define PORT2_IN_P1_Msk (0x2UL) /*!< PORT2 IN: P1 (Bitfield-Mask: 0x01) */ +#define PORT2_IN_P2_Pos (2UL) /*!< PORT2 IN: P2 (Bit 2) */ +#define PORT2_IN_P2_Msk (0x4UL) /*!< PORT2 IN: P2 (Bitfield-Mask: 0x01) */ +#define PORT2_IN_P3_Pos (3UL) /*!< PORT2 IN: P3 (Bit 3) */ +#define PORT2_IN_P3_Msk (0x8UL) /*!< PORT2 IN: P3 (Bitfield-Mask: 0x01) */ +#define PORT2_IN_P4_Pos (4UL) /*!< PORT2 IN: P4 (Bit 4) */ +#define PORT2_IN_P4_Msk (0x10UL) /*!< PORT2 IN: P4 (Bitfield-Mask: 0x01) */ +#define PORT2_IN_P5_Pos (5UL) /*!< PORT2 IN: P5 (Bit 5) */ +#define PORT2_IN_P5_Msk (0x20UL) /*!< PORT2 IN: P5 (Bitfield-Mask: 0x01) */ +#define PORT2_IN_P6_Pos (6UL) /*!< PORT2 IN: P6 (Bit 6) */ +#define PORT2_IN_P6_Msk (0x40UL) /*!< PORT2 IN: P6 (Bitfield-Mask: 0x01) */ +#define PORT2_IN_P7_Pos (7UL) /*!< PORT2 IN: P7 (Bit 7) */ +#define PORT2_IN_P7_Msk (0x80UL) /*!< PORT2 IN: P7 (Bitfield-Mask: 0x01) */ +#define PORT2_IN_P8_Pos (8UL) /*!< PORT2 IN: P8 (Bit 8) */ +#define PORT2_IN_P8_Msk (0x100UL) /*!< PORT2 IN: P8 (Bitfield-Mask: 0x01) */ +#define PORT2_IN_P9_Pos (9UL) /*!< PORT2 IN: P9 (Bit 9) */ +#define PORT2_IN_P9_Msk (0x200UL) /*!< PORT2 IN: P9 (Bitfield-Mask: 0x01) */ +#define PORT2_IN_P10_Pos (10UL) /*!< PORT2 IN: P10 (Bit 10) */ +#define PORT2_IN_P10_Msk (0x400UL) /*!< PORT2 IN: P10 (Bitfield-Mask: 0x01) */ +#define PORT2_IN_P11_Pos (11UL) /*!< PORT2 IN: P11 (Bit 11) */ +#define PORT2_IN_P11_Msk (0x800UL) /*!< PORT2 IN: P11 (Bitfield-Mask: 0x01) */ +#define PORT2_IN_P12_Pos (12UL) /*!< PORT2 IN: P12 (Bit 12) */ +#define PORT2_IN_P12_Msk (0x1000UL) /*!< PORT2 IN: P12 (Bitfield-Mask: 0x01) */ +#define PORT2_IN_P13_Pos (13UL) /*!< PORT2 IN: P13 (Bit 13) */ +#define PORT2_IN_P13_Msk (0x2000UL) /*!< PORT2 IN: P13 (Bitfield-Mask: 0x01) */ +#define PORT2_IN_P14_Pos (14UL) /*!< PORT2 IN: P14 (Bit 14) */ +#define PORT2_IN_P14_Msk (0x4000UL) /*!< PORT2 IN: P14 (Bitfield-Mask: 0x01) */ +#define PORT2_IN_P15_Pos (15UL) /*!< PORT2 IN: P15 (Bit 15) */ +#define PORT2_IN_P15_Msk (0x8000UL) /*!< PORT2 IN: P15 (Bitfield-Mask: 0x01) */ + +/* --------------------------------- PORT2_PDR0 --------------------------------- */ +#define PORT2_PDR0_PD0_Pos (0UL) /*!< PORT2 PDR0: PD0 (Bit 0) */ +#define PORT2_PDR0_PD0_Msk (0x7UL) /*!< PORT2 PDR0: PD0 (Bitfield-Mask: 0x07) */ +#define PORT2_PDR0_PD1_Pos (4UL) /*!< PORT2 PDR0: PD1 (Bit 4) */ +#define PORT2_PDR0_PD1_Msk (0x70UL) /*!< PORT2 PDR0: PD1 (Bitfield-Mask: 0x07) */ +#define PORT2_PDR0_PD2_Pos (8UL) /*!< PORT2 PDR0: PD2 (Bit 8) */ +#define PORT2_PDR0_PD2_Msk (0x700UL) /*!< PORT2 PDR0: PD2 (Bitfield-Mask: 0x07) */ +#define PORT2_PDR0_PD3_Pos (12UL) /*!< PORT2 PDR0: PD3 (Bit 12) */ +#define PORT2_PDR0_PD3_Msk (0x7000UL) /*!< PORT2 PDR0: PD3 (Bitfield-Mask: 0x07) */ +#define PORT2_PDR0_PD4_Pos (16UL) /*!< PORT2 PDR0: PD4 (Bit 16) */ +#define PORT2_PDR0_PD4_Msk (0x70000UL) /*!< PORT2 PDR0: PD4 (Bitfield-Mask: 0x07) */ +#define PORT2_PDR0_PD5_Pos (20UL) /*!< PORT2 PDR0: PD5 (Bit 20) */ +#define PORT2_PDR0_PD5_Msk (0x700000UL) /*!< PORT2 PDR0: PD5 (Bitfield-Mask: 0x07) */ +#define PORT2_PDR0_PD6_Pos (24UL) /*!< PORT2 PDR0: PD6 (Bit 24) */ +#define PORT2_PDR0_PD6_Msk (0x7000000UL) /*!< PORT2 PDR0: PD6 (Bitfield-Mask: 0x07) */ +#define PORT2_PDR0_PD7_Pos (28UL) /*!< PORT2 PDR0: PD7 (Bit 28) */ +#define PORT2_PDR0_PD7_Msk (0x70000000UL) /*!< PORT2 PDR0: PD7 (Bitfield-Mask: 0x07) */ + +/* --------------------------------- PORT2_PDR1 --------------------------------- */ +#define PORT2_PDR1_PD8_Pos (0UL) /*!< PORT2 PDR1: PD8 (Bit 0) */ +#define PORT2_PDR1_PD8_Msk (0x7UL) /*!< PORT2 PDR1: PD8 (Bitfield-Mask: 0x07) */ +#define PORT2_PDR1_PD9_Pos (4UL) /*!< PORT2 PDR1: PD9 (Bit 4) */ +#define PORT2_PDR1_PD9_Msk (0x70UL) /*!< PORT2 PDR1: PD9 (Bitfield-Mask: 0x07) */ +#define PORT2_PDR1_PD10_Pos (8UL) /*!< PORT2 PDR1: PD10 (Bit 8) */ +#define PORT2_PDR1_PD10_Msk (0x700UL) /*!< PORT2 PDR1: PD10 (Bitfield-Mask: 0x07) */ +#define PORT2_PDR1_PD11_Pos (12UL) /*!< PORT2 PDR1: PD11 (Bit 12) */ +#define PORT2_PDR1_PD11_Msk (0x7000UL) /*!< PORT2 PDR1: PD11 (Bitfield-Mask: 0x07) */ +#define PORT2_PDR1_PD12_Pos (16UL) /*!< PORT2 PDR1: PD12 (Bit 16) */ +#define PORT2_PDR1_PD12_Msk (0x70000UL) /*!< PORT2 PDR1: PD12 (Bitfield-Mask: 0x07) */ +#define PORT2_PDR1_PD13_Pos (20UL) /*!< PORT2 PDR1: PD13 (Bit 20) */ +#define PORT2_PDR1_PD13_Msk (0x700000UL) /*!< PORT2 PDR1: PD13 (Bitfield-Mask: 0x07) */ +#define PORT2_PDR1_PD14_Pos (24UL) /*!< PORT2 PDR1: PD14 (Bit 24) */ +#define PORT2_PDR1_PD14_Msk (0x7000000UL) /*!< PORT2 PDR1: PD14 (Bitfield-Mask: 0x07) */ +#define PORT2_PDR1_PD15_Pos (28UL) /*!< PORT2 PDR1: PD15 (Bit 28) */ +#define PORT2_PDR1_PD15_Msk (0x70000000UL) /*!< PORT2 PDR1: PD15 (Bitfield-Mask: 0x07) */ + +/* --------------------------------- PORT2_PDISC -------------------------------- */ +#define PORT2_PDISC_PDIS0_Pos (0UL) /*!< PORT2 PDISC: PDIS0 (Bit 0) */ +#define PORT2_PDISC_PDIS0_Msk (0x1UL) /*!< PORT2 PDISC: PDIS0 (Bitfield-Mask: 0x01) */ +#define PORT2_PDISC_PDIS1_Pos (1UL) /*!< PORT2 PDISC: PDIS1 (Bit 1) */ +#define PORT2_PDISC_PDIS1_Msk (0x2UL) /*!< PORT2 PDISC: PDIS1 (Bitfield-Mask: 0x01) */ +#define PORT2_PDISC_PDIS2_Pos (2UL) /*!< PORT2 PDISC: PDIS2 (Bit 2) */ +#define PORT2_PDISC_PDIS2_Msk (0x4UL) /*!< PORT2 PDISC: PDIS2 (Bitfield-Mask: 0x01) */ +#define PORT2_PDISC_PDIS3_Pos (3UL) /*!< PORT2 PDISC: PDIS3 (Bit 3) */ +#define PORT2_PDISC_PDIS3_Msk (0x8UL) /*!< PORT2 PDISC: PDIS3 (Bitfield-Mask: 0x01) */ +#define PORT2_PDISC_PDIS4_Pos (4UL) /*!< PORT2 PDISC: PDIS4 (Bit 4) */ +#define PORT2_PDISC_PDIS4_Msk (0x10UL) /*!< PORT2 PDISC: PDIS4 (Bitfield-Mask: 0x01) */ +#define PORT2_PDISC_PDIS5_Pos (5UL) /*!< PORT2 PDISC: PDIS5 (Bit 5) */ +#define PORT2_PDISC_PDIS5_Msk (0x20UL) /*!< PORT2 PDISC: PDIS5 (Bitfield-Mask: 0x01) */ +#define PORT2_PDISC_PDIS6_Pos (6UL) /*!< PORT2 PDISC: PDIS6 (Bit 6) */ +#define PORT2_PDISC_PDIS6_Msk (0x40UL) /*!< PORT2 PDISC: PDIS6 (Bitfield-Mask: 0x01) */ +#define PORT2_PDISC_PDIS7_Pos (7UL) /*!< PORT2 PDISC: PDIS7 (Bit 7) */ +#define PORT2_PDISC_PDIS7_Msk (0x80UL) /*!< PORT2 PDISC: PDIS7 (Bitfield-Mask: 0x01) */ +#define PORT2_PDISC_PDIS8_Pos (8UL) /*!< PORT2 PDISC: PDIS8 (Bit 8) */ +#define PORT2_PDISC_PDIS8_Msk (0x100UL) /*!< PORT2 PDISC: PDIS8 (Bitfield-Mask: 0x01) */ +#define PORT2_PDISC_PDIS9_Pos (9UL) /*!< PORT2 PDISC: PDIS9 (Bit 9) */ +#define PORT2_PDISC_PDIS9_Msk (0x200UL) /*!< PORT2 PDISC: PDIS9 (Bitfield-Mask: 0x01) */ +#define PORT2_PDISC_PDIS10_Pos (10UL) /*!< PORT2 PDISC: PDIS10 (Bit 10) */ +#define PORT2_PDISC_PDIS10_Msk (0x400UL) /*!< PORT2 PDISC: PDIS10 (Bitfield-Mask: 0x01) */ +#define PORT2_PDISC_PDIS11_Pos (11UL) /*!< PORT2 PDISC: PDIS11 (Bit 11) */ +#define PORT2_PDISC_PDIS11_Msk (0x800UL) /*!< PORT2 PDISC: PDIS11 (Bitfield-Mask: 0x01) */ +#define PORT2_PDISC_PDIS12_Pos (12UL) /*!< PORT2 PDISC: PDIS12 (Bit 12) */ +#define PORT2_PDISC_PDIS12_Msk (0x1000UL) /*!< PORT2 PDISC: PDIS12 (Bitfield-Mask: 0x01) */ +#define PORT2_PDISC_PDIS13_Pos (13UL) /*!< PORT2 PDISC: PDIS13 (Bit 13) */ +#define PORT2_PDISC_PDIS13_Msk (0x2000UL) /*!< PORT2 PDISC: PDIS13 (Bitfield-Mask: 0x01) */ +#define PORT2_PDISC_PDIS14_Pos (14UL) /*!< PORT2 PDISC: PDIS14 (Bit 14) */ +#define PORT2_PDISC_PDIS14_Msk (0x4000UL) /*!< PORT2 PDISC: PDIS14 (Bitfield-Mask: 0x01) */ +#define PORT2_PDISC_PDIS15_Pos (15UL) /*!< PORT2 PDISC: PDIS15 (Bit 15) */ +#define PORT2_PDISC_PDIS15_Msk (0x8000UL) /*!< PORT2 PDISC: PDIS15 (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- PORT2_PPS --------------------------------- */ +#define PORT2_PPS_PPS0_Pos (0UL) /*!< PORT2 PPS: PPS0 (Bit 0) */ +#define PORT2_PPS_PPS0_Msk (0x1UL) /*!< PORT2 PPS: PPS0 (Bitfield-Mask: 0x01) */ +#define PORT2_PPS_PPS1_Pos (1UL) /*!< PORT2 PPS: PPS1 (Bit 1) */ +#define PORT2_PPS_PPS1_Msk (0x2UL) /*!< PORT2 PPS: PPS1 (Bitfield-Mask: 0x01) */ +#define PORT2_PPS_PPS2_Pos (2UL) /*!< PORT2 PPS: PPS2 (Bit 2) */ +#define PORT2_PPS_PPS2_Msk (0x4UL) /*!< PORT2 PPS: PPS2 (Bitfield-Mask: 0x01) */ +#define PORT2_PPS_PPS3_Pos (3UL) /*!< PORT2 PPS: PPS3 (Bit 3) */ +#define PORT2_PPS_PPS3_Msk (0x8UL) /*!< PORT2 PPS: PPS3 (Bitfield-Mask: 0x01) */ +#define PORT2_PPS_PPS4_Pos (4UL) /*!< PORT2 PPS: PPS4 (Bit 4) */ +#define PORT2_PPS_PPS4_Msk (0x10UL) /*!< PORT2 PPS: PPS4 (Bitfield-Mask: 0x01) */ +#define PORT2_PPS_PPS5_Pos (5UL) /*!< PORT2 PPS: PPS5 (Bit 5) */ +#define PORT2_PPS_PPS5_Msk (0x20UL) /*!< PORT2 PPS: PPS5 (Bitfield-Mask: 0x01) */ +#define PORT2_PPS_PPS6_Pos (6UL) /*!< PORT2 PPS: PPS6 (Bit 6) */ +#define PORT2_PPS_PPS6_Msk (0x40UL) /*!< PORT2 PPS: PPS6 (Bitfield-Mask: 0x01) */ +#define PORT2_PPS_PPS7_Pos (7UL) /*!< PORT2 PPS: PPS7 (Bit 7) */ +#define PORT2_PPS_PPS7_Msk (0x80UL) /*!< PORT2 PPS: PPS7 (Bitfield-Mask: 0x01) */ +#define PORT2_PPS_PPS8_Pos (8UL) /*!< PORT2 PPS: PPS8 (Bit 8) */ +#define PORT2_PPS_PPS8_Msk (0x100UL) /*!< PORT2 PPS: PPS8 (Bitfield-Mask: 0x01) */ +#define PORT2_PPS_PPS9_Pos (9UL) /*!< PORT2 PPS: PPS9 (Bit 9) */ +#define PORT2_PPS_PPS9_Msk (0x200UL) /*!< PORT2 PPS: PPS9 (Bitfield-Mask: 0x01) */ +#define PORT2_PPS_PPS10_Pos (10UL) /*!< PORT2 PPS: PPS10 (Bit 10) */ +#define PORT2_PPS_PPS10_Msk (0x400UL) /*!< PORT2 PPS: PPS10 (Bitfield-Mask: 0x01) */ +#define PORT2_PPS_PPS11_Pos (11UL) /*!< PORT2 PPS: PPS11 (Bit 11) */ +#define PORT2_PPS_PPS11_Msk (0x800UL) /*!< PORT2 PPS: PPS11 (Bitfield-Mask: 0x01) */ +#define PORT2_PPS_PPS12_Pos (12UL) /*!< PORT2 PPS: PPS12 (Bit 12) */ +#define PORT2_PPS_PPS12_Msk (0x1000UL) /*!< PORT2 PPS: PPS12 (Bitfield-Mask: 0x01) */ +#define PORT2_PPS_PPS13_Pos (13UL) /*!< PORT2 PPS: PPS13 (Bit 13) */ +#define PORT2_PPS_PPS13_Msk (0x2000UL) /*!< PORT2 PPS: PPS13 (Bitfield-Mask: 0x01) */ +#define PORT2_PPS_PPS14_Pos (14UL) /*!< PORT2 PPS: PPS14 (Bit 14) */ +#define PORT2_PPS_PPS14_Msk (0x4000UL) /*!< PORT2 PPS: PPS14 (Bitfield-Mask: 0x01) */ +#define PORT2_PPS_PPS15_Pos (15UL) /*!< PORT2 PPS: PPS15 (Bit 15) */ +#define PORT2_PPS_PPS15_Msk (0x8000UL) /*!< PORT2 PPS: PPS15 (Bitfield-Mask: 0x01) */ + +/* --------------------------------- PORT2_HWSEL -------------------------------- */ +#define PORT2_HWSEL_HW0_Pos (0UL) /*!< PORT2 HWSEL: HW0 (Bit 0) */ +#define PORT2_HWSEL_HW0_Msk (0x3UL) /*!< PORT2 HWSEL: HW0 (Bitfield-Mask: 0x03) */ +#define PORT2_HWSEL_HW1_Pos (2UL) /*!< PORT2 HWSEL: HW1 (Bit 2) */ +#define PORT2_HWSEL_HW1_Msk (0xcUL) /*!< PORT2 HWSEL: HW1 (Bitfield-Mask: 0x03) */ +#define PORT2_HWSEL_HW2_Pos (4UL) /*!< PORT2 HWSEL: HW2 (Bit 4) */ +#define PORT2_HWSEL_HW2_Msk (0x30UL) /*!< PORT2 HWSEL: HW2 (Bitfield-Mask: 0x03) */ +#define PORT2_HWSEL_HW3_Pos (6UL) /*!< PORT2 HWSEL: HW3 (Bit 6) */ +#define PORT2_HWSEL_HW3_Msk (0xc0UL) /*!< PORT2 HWSEL: HW3 (Bitfield-Mask: 0x03) */ +#define PORT2_HWSEL_HW4_Pos (8UL) /*!< PORT2 HWSEL: HW4 (Bit 8) */ +#define PORT2_HWSEL_HW4_Msk (0x300UL) /*!< PORT2 HWSEL: HW4 (Bitfield-Mask: 0x03) */ +#define PORT2_HWSEL_HW5_Pos (10UL) /*!< PORT2 HWSEL: HW5 (Bit 10) */ +#define PORT2_HWSEL_HW5_Msk (0xc00UL) /*!< PORT2 HWSEL: HW5 (Bitfield-Mask: 0x03) */ +#define PORT2_HWSEL_HW6_Pos (12UL) /*!< PORT2 HWSEL: HW6 (Bit 12) */ +#define PORT2_HWSEL_HW6_Msk (0x3000UL) /*!< PORT2 HWSEL: HW6 (Bitfield-Mask: 0x03) */ +#define PORT2_HWSEL_HW7_Pos (14UL) /*!< PORT2 HWSEL: HW7 (Bit 14) */ +#define PORT2_HWSEL_HW7_Msk (0xc000UL) /*!< PORT2 HWSEL: HW7 (Bitfield-Mask: 0x03) */ +#define PORT2_HWSEL_HW8_Pos (16UL) /*!< PORT2 HWSEL: HW8 (Bit 16) */ +#define PORT2_HWSEL_HW8_Msk (0x30000UL) /*!< PORT2 HWSEL: HW8 (Bitfield-Mask: 0x03) */ +#define PORT2_HWSEL_HW9_Pos (18UL) /*!< PORT2 HWSEL: HW9 (Bit 18) */ +#define PORT2_HWSEL_HW9_Msk (0xc0000UL) /*!< PORT2 HWSEL: HW9 (Bitfield-Mask: 0x03) */ +#define PORT2_HWSEL_HW10_Pos (20UL) /*!< PORT2 HWSEL: HW10 (Bit 20) */ +#define PORT2_HWSEL_HW10_Msk (0x300000UL) /*!< PORT2 HWSEL: HW10 (Bitfield-Mask: 0x03) */ +#define PORT2_HWSEL_HW11_Pos (22UL) /*!< PORT2 HWSEL: HW11 (Bit 22) */ +#define PORT2_HWSEL_HW11_Msk (0xc00000UL) /*!< PORT2 HWSEL: HW11 (Bitfield-Mask: 0x03) */ +#define PORT2_HWSEL_HW12_Pos (24UL) /*!< PORT2 HWSEL: HW12 (Bit 24) */ +#define PORT2_HWSEL_HW12_Msk (0x3000000UL) /*!< PORT2 HWSEL: HW12 (Bitfield-Mask: 0x03) */ +#define PORT2_HWSEL_HW13_Pos (26UL) /*!< PORT2 HWSEL: HW13 (Bit 26) */ +#define PORT2_HWSEL_HW13_Msk (0xc000000UL) /*!< PORT2 HWSEL: HW13 (Bitfield-Mask: 0x03) */ +#define PORT2_HWSEL_HW14_Pos (28UL) /*!< PORT2 HWSEL: HW14 (Bit 28) */ +#define PORT2_HWSEL_HW14_Msk (0x30000000UL) /*!< PORT2 HWSEL: HW14 (Bitfield-Mask: 0x03) */ +#define PORT2_HWSEL_HW15_Pos (30UL) /*!< PORT2 HWSEL: HW15 (Bit 30) */ +#define PORT2_HWSEL_HW15_Msk (0xc0000000UL) /*!< PORT2 HWSEL: HW15 (Bitfield-Mask: 0x03) */ + + +/* ================================================================================ */ +/* ================ struct 'PORT3' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ---------------------------------- PORT3_OUT --------------------------------- */ +#define PORT3_OUT_P0_Pos (0UL) /*!< PORT3 OUT: P0 (Bit 0) */ +#define PORT3_OUT_P0_Msk (0x1UL) /*!< PORT3 OUT: P0 (Bitfield-Mask: 0x01) */ +#define PORT3_OUT_P1_Pos (1UL) /*!< PORT3 OUT: P1 (Bit 1) */ +#define PORT3_OUT_P1_Msk (0x2UL) /*!< PORT3 OUT: P1 (Bitfield-Mask: 0x01) */ +#define PORT3_OUT_P2_Pos (2UL) /*!< PORT3 OUT: P2 (Bit 2) */ +#define PORT3_OUT_P2_Msk (0x4UL) /*!< PORT3 OUT: P2 (Bitfield-Mask: 0x01) */ +#define PORT3_OUT_P3_Pos (3UL) /*!< PORT3 OUT: P3 (Bit 3) */ +#define PORT3_OUT_P3_Msk (0x8UL) /*!< PORT3 OUT: P3 (Bitfield-Mask: 0x01) */ +#define PORT3_OUT_P4_Pos (4UL) /*!< PORT3 OUT: P4 (Bit 4) */ +#define PORT3_OUT_P4_Msk (0x10UL) /*!< PORT3 OUT: P4 (Bitfield-Mask: 0x01) */ +#define PORT3_OUT_P5_Pos (5UL) /*!< PORT3 OUT: P5 (Bit 5) */ +#define PORT3_OUT_P5_Msk (0x20UL) /*!< PORT3 OUT: P5 (Bitfield-Mask: 0x01) */ +#define PORT3_OUT_P6_Pos (6UL) /*!< PORT3 OUT: P6 (Bit 6) */ +#define PORT3_OUT_P6_Msk (0x40UL) /*!< PORT3 OUT: P6 (Bitfield-Mask: 0x01) */ +#define PORT3_OUT_P7_Pos (7UL) /*!< PORT3 OUT: P7 (Bit 7) */ +#define PORT3_OUT_P7_Msk (0x80UL) /*!< PORT3 OUT: P7 (Bitfield-Mask: 0x01) */ +#define PORT3_OUT_P8_Pos (8UL) /*!< PORT3 OUT: P8 (Bit 8) */ +#define PORT3_OUT_P8_Msk (0x100UL) /*!< PORT3 OUT: P8 (Bitfield-Mask: 0x01) */ +#define PORT3_OUT_P9_Pos (9UL) /*!< PORT3 OUT: P9 (Bit 9) */ +#define PORT3_OUT_P9_Msk (0x200UL) /*!< PORT3 OUT: P9 (Bitfield-Mask: 0x01) */ +#define PORT3_OUT_P10_Pos (10UL) /*!< PORT3 OUT: P10 (Bit 10) */ +#define PORT3_OUT_P10_Msk (0x400UL) /*!< PORT3 OUT: P10 (Bitfield-Mask: 0x01) */ +#define PORT3_OUT_P11_Pos (11UL) /*!< PORT3 OUT: P11 (Bit 11) */ +#define PORT3_OUT_P11_Msk (0x800UL) /*!< PORT3 OUT: P11 (Bitfield-Mask: 0x01) */ +#define PORT3_OUT_P12_Pos (12UL) /*!< PORT3 OUT: P12 (Bit 12) */ +#define PORT3_OUT_P12_Msk (0x1000UL) /*!< PORT3 OUT: P12 (Bitfield-Mask: 0x01) */ +#define PORT3_OUT_P13_Pos (13UL) /*!< PORT3 OUT: P13 (Bit 13) */ +#define PORT3_OUT_P13_Msk (0x2000UL) /*!< PORT3 OUT: P13 (Bitfield-Mask: 0x01) */ +#define PORT3_OUT_P14_Pos (14UL) /*!< PORT3 OUT: P14 (Bit 14) */ +#define PORT3_OUT_P14_Msk (0x4000UL) /*!< PORT3 OUT: P14 (Bitfield-Mask: 0x01) */ +#define PORT3_OUT_P15_Pos (15UL) /*!< PORT3 OUT: P15 (Bit 15) */ +#define PORT3_OUT_P15_Msk (0x8000UL) /*!< PORT3 OUT: P15 (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- PORT3_OMR --------------------------------- */ +#define PORT3_OMR_PS0_Pos (0UL) /*!< PORT3 OMR: PS0 (Bit 0) */ +#define PORT3_OMR_PS0_Msk (0x1UL) /*!< PORT3 OMR: PS0 (Bitfield-Mask: 0x01) */ +#define PORT3_OMR_PS1_Pos (1UL) /*!< PORT3 OMR: PS1 (Bit 1) */ +#define PORT3_OMR_PS1_Msk (0x2UL) /*!< PORT3 OMR: PS1 (Bitfield-Mask: 0x01) */ +#define PORT3_OMR_PS2_Pos (2UL) /*!< PORT3 OMR: PS2 (Bit 2) */ +#define PORT3_OMR_PS2_Msk (0x4UL) /*!< PORT3 OMR: PS2 (Bitfield-Mask: 0x01) */ +#define PORT3_OMR_PS3_Pos (3UL) /*!< PORT3 OMR: PS3 (Bit 3) */ +#define PORT3_OMR_PS3_Msk (0x8UL) /*!< PORT3 OMR: PS3 (Bitfield-Mask: 0x01) */ +#define PORT3_OMR_PS4_Pos (4UL) /*!< PORT3 OMR: PS4 (Bit 4) */ +#define PORT3_OMR_PS4_Msk (0x10UL) /*!< PORT3 OMR: PS4 (Bitfield-Mask: 0x01) */ +#define PORT3_OMR_PS5_Pos (5UL) /*!< PORT3 OMR: PS5 (Bit 5) */ +#define PORT3_OMR_PS5_Msk (0x20UL) /*!< PORT3 OMR: PS5 (Bitfield-Mask: 0x01) */ +#define PORT3_OMR_PS6_Pos (6UL) /*!< PORT3 OMR: PS6 (Bit 6) */ +#define PORT3_OMR_PS6_Msk (0x40UL) /*!< PORT3 OMR: PS6 (Bitfield-Mask: 0x01) */ +#define PORT3_OMR_PS7_Pos (7UL) /*!< PORT3 OMR: PS7 (Bit 7) */ +#define PORT3_OMR_PS7_Msk (0x80UL) /*!< PORT3 OMR: PS7 (Bitfield-Mask: 0x01) */ +#define PORT3_OMR_PS8_Pos (8UL) /*!< PORT3 OMR: PS8 (Bit 8) */ +#define PORT3_OMR_PS8_Msk (0x100UL) /*!< PORT3 OMR: PS8 (Bitfield-Mask: 0x01) */ +#define PORT3_OMR_PS9_Pos (9UL) /*!< PORT3 OMR: PS9 (Bit 9) */ +#define PORT3_OMR_PS9_Msk (0x200UL) /*!< PORT3 OMR: PS9 (Bitfield-Mask: 0x01) */ +#define PORT3_OMR_PS10_Pos (10UL) /*!< PORT3 OMR: PS10 (Bit 10) */ +#define PORT3_OMR_PS10_Msk (0x400UL) /*!< PORT3 OMR: PS10 (Bitfield-Mask: 0x01) */ +#define PORT3_OMR_PS11_Pos (11UL) /*!< PORT3 OMR: PS11 (Bit 11) */ +#define PORT3_OMR_PS11_Msk (0x800UL) /*!< PORT3 OMR: PS11 (Bitfield-Mask: 0x01) */ +#define PORT3_OMR_PS12_Pos (12UL) /*!< PORT3 OMR: PS12 (Bit 12) */ +#define PORT3_OMR_PS12_Msk (0x1000UL) /*!< PORT3 OMR: PS12 (Bitfield-Mask: 0x01) */ +#define PORT3_OMR_PS13_Pos (13UL) /*!< PORT3 OMR: PS13 (Bit 13) */ +#define PORT3_OMR_PS13_Msk (0x2000UL) /*!< PORT3 OMR: PS13 (Bitfield-Mask: 0x01) */ +#define PORT3_OMR_PS14_Pos (14UL) /*!< PORT3 OMR: PS14 (Bit 14) */ +#define PORT3_OMR_PS14_Msk (0x4000UL) /*!< PORT3 OMR: PS14 (Bitfield-Mask: 0x01) */ +#define PORT3_OMR_PS15_Pos (15UL) /*!< PORT3 OMR: PS15 (Bit 15) */ +#define PORT3_OMR_PS15_Msk (0x8000UL) /*!< PORT3 OMR: PS15 (Bitfield-Mask: 0x01) */ +#define PORT3_OMR_PR0_Pos (16UL) /*!< PORT3 OMR: PR0 (Bit 16) */ +#define PORT3_OMR_PR0_Msk (0x10000UL) /*!< PORT3 OMR: PR0 (Bitfield-Mask: 0x01) */ +#define PORT3_OMR_PR1_Pos (17UL) /*!< PORT3 OMR: PR1 (Bit 17) */ +#define PORT3_OMR_PR1_Msk (0x20000UL) /*!< PORT3 OMR: PR1 (Bitfield-Mask: 0x01) */ +#define PORT3_OMR_PR2_Pos (18UL) /*!< PORT3 OMR: PR2 (Bit 18) */ +#define PORT3_OMR_PR2_Msk (0x40000UL) /*!< PORT3 OMR: PR2 (Bitfield-Mask: 0x01) */ +#define PORT3_OMR_PR3_Pos (19UL) /*!< PORT3 OMR: PR3 (Bit 19) */ +#define PORT3_OMR_PR3_Msk (0x80000UL) /*!< PORT3 OMR: PR3 (Bitfield-Mask: 0x01) */ +#define PORT3_OMR_PR4_Pos (20UL) /*!< PORT3 OMR: PR4 (Bit 20) */ +#define PORT3_OMR_PR4_Msk (0x100000UL) /*!< PORT3 OMR: PR4 (Bitfield-Mask: 0x01) */ +#define PORT3_OMR_PR5_Pos (21UL) /*!< PORT3 OMR: PR5 (Bit 21) */ +#define PORT3_OMR_PR5_Msk (0x200000UL) /*!< PORT3 OMR: PR5 (Bitfield-Mask: 0x01) */ +#define PORT3_OMR_PR6_Pos (22UL) /*!< PORT3 OMR: PR6 (Bit 22) */ +#define PORT3_OMR_PR6_Msk (0x400000UL) /*!< PORT3 OMR: PR6 (Bitfield-Mask: 0x01) */ +#define PORT3_OMR_PR7_Pos (23UL) /*!< PORT3 OMR: PR7 (Bit 23) */ +#define PORT3_OMR_PR7_Msk (0x800000UL) /*!< PORT3 OMR: PR7 (Bitfield-Mask: 0x01) */ +#define PORT3_OMR_PR8_Pos (24UL) /*!< PORT3 OMR: PR8 (Bit 24) */ +#define PORT3_OMR_PR8_Msk (0x1000000UL) /*!< PORT3 OMR: PR8 (Bitfield-Mask: 0x01) */ +#define PORT3_OMR_PR9_Pos (25UL) /*!< PORT3 OMR: PR9 (Bit 25) */ +#define PORT3_OMR_PR9_Msk (0x2000000UL) /*!< PORT3 OMR: PR9 (Bitfield-Mask: 0x01) */ +#define PORT3_OMR_PR10_Pos (26UL) /*!< PORT3 OMR: PR10 (Bit 26) */ +#define PORT3_OMR_PR10_Msk (0x4000000UL) /*!< PORT3 OMR: PR10 (Bitfield-Mask: 0x01) */ +#define PORT3_OMR_PR11_Pos (27UL) /*!< PORT3 OMR: PR11 (Bit 27) */ +#define PORT3_OMR_PR11_Msk (0x8000000UL) /*!< PORT3 OMR: PR11 (Bitfield-Mask: 0x01) */ +#define PORT3_OMR_PR12_Pos (28UL) /*!< PORT3 OMR: PR12 (Bit 28) */ +#define PORT3_OMR_PR12_Msk (0x10000000UL) /*!< PORT3 OMR: PR12 (Bitfield-Mask: 0x01) */ +#define PORT3_OMR_PR13_Pos (29UL) /*!< PORT3 OMR: PR13 (Bit 29) */ +#define PORT3_OMR_PR13_Msk (0x20000000UL) /*!< PORT3 OMR: PR13 (Bitfield-Mask: 0x01) */ +#define PORT3_OMR_PR14_Pos (30UL) /*!< PORT3 OMR: PR14 (Bit 30) */ +#define PORT3_OMR_PR14_Msk (0x40000000UL) /*!< PORT3 OMR: PR14 (Bitfield-Mask: 0x01) */ +#define PORT3_OMR_PR15_Pos (31UL) /*!< PORT3 OMR: PR15 (Bit 31) */ +#define PORT3_OMR_PR15_Msk (0x80000000UL) /*!< PORT3 OMR: PR15 (Bitfield-Mask: 0x01) */ + +/* --------------------------------- PORT3_IOCR0 -------------------------------- */ +#define PORT3_IOCR0_PC0_Pos (3UL) /*!< PORT3 IOCR0: PC0 (Bit 3) */ +#define PORT3_IOCR0_PC0_Msk (0xf8UL) /*!< PORT3 IOCR0: PC0 (Bitfield-Mask: 0x1f) */ +#define PORT3_IOCR0_PC1_Pos (11UL) /*!< PORT3 IOCR0: PC1 (Bit 11) */ +#define PORT3_IOCR0_PC1_Msk (0xf800UL) /*!< PORT3 IOCR0: PC1 (Bitfield-Mask: 0x1f) */ +#define PORT3_IOCR0_PC2_Pos (19UL) /*!< PORT3 IOCR0: PC2 (Bit 19) */ +#define PORT3_IOCR0_PC2_Msk (0xf80000UL) /*!< PORT3 IOCR0: PC2 (Bitfield-Mask: 0x1f) */ +#define PORT3_IOCR0_PC3_Pos (27UL) /*!< PORT3 IOCR0: PC3 (Bit 27) */ +#define PORT3_IOCR0_PC3_Msk (0xf8000000UL) /*!< PORT3 IOCR0: PC3 (Bitfield-Mask: 0x1f) */ + +/* ---------------------------------- PORT3_IN ---------------------------------- */ +#define PORT3_IN_P0_Pos (0UL) /*!< PORT3 IN: P0 (Bit 0) */ +#define PORT3_IN_P0_Msk (0x1UL) /*!< PORT3 IN: P0 (Bitfield-Mask: 0x01) */ +#define PORT3_IN_P1_Pos (1UL) /*!< PORT3 IN: P1 (Bit 1) */ +#define PORT3_IN_P1_Msk (0x2UL) /*!< PORT3 IN: P1 (Bitfield-Mask: 0x01) */ +#define PORT3_IN_P2_Pos (2UL) /*!< PORT3 IN: P2 (Bit 2) */ +#define PORT3_IN_P2_Msk (0x4UL) /*!< PORT3 IN: P2 (Bitfield-Mask: 0x01) */ +#define PORT3_IN_P3_Pos (3UL) /*!< PORT3 IN: P3 (Bit 3) */ +#define PORT3_IN_P3_Msk (0x8UL) /*!< PORT3 IN: P3 (Bitfield-Mask: 0x01) */ +#define PORT3_IN_P4_Pos (4UL) /*!< PORT3 IN: P4 (Bit 4) */ +#define PORT3_IN_P4_Msk (0x10UL) /*!< PORT3 IN: P4 (Bitfield-Mask: 0x01) */ +#define PORT3_IN_P5_Pos (5UL) /*!< PORT3 IN: P5 (Bit 5) */ +#define PORT3_IN_P5_Msk (0x20UL) /*!< PORT3 IN: P5 (Bitfield-Mask: 0x01) */ +#define PORT3_IN_P6_Pos (6UL) /*!< PORT3 IN: P6 (Bit 6) */ +#define PORT3_IN_P6_Msk (0x40UL) /*!< PORT3 IN: P6 (Bitfield-Mask: 0x01) */ +#define PORT3_IN_P7_Pos (7UL) /*!< PORT3 IN: P7 (Bit 7) */ +#define PORT3_IN_P7_Msk (0x80UL) /*!< PORT3 IN: P7 (Bitfield-Mask: 0x01) */ +#define PORT3_IN_P8_Pos (8UL) /*!< PORT3 IN: P8 (Bit 8) */ +#define PORT3_IN_P8_Msk (0x100UL) /*!< PORT3 IN: P8 (Bitfield-Mask: 0x01) */ +#define PORT3_IN_P9_Pos (9UL) /*!< PORT3 IN: P9 (Bit 9) */ +#define PORT3_IN_P9_Msk (0x200UL) /*!< PORT3 IN: P9 (Bitfield-Mask: 0x01) */ +#define PORT3_IN_P10_Pos (10UL) /*!< PORT3 IN: P10 (Bit 10) */ +#define PORT3_IN_P10_Msk (0x400UL) /*!< PORT3 IN: P10 (Bitfield-Mask: 0x01) */ +#define PORT3_IN_P11_Pos (11UL) /*!< PORT3 IN: P11 (Bit 11) */ +#define PORT3_IN_P11_Msk (0x800UL) /*!< PORT3 IN: P11 (Bitfield-Mask: 0x01) */ +#define PORT3_IN_P12_Pos (12UL) /*!< PORT3 IN: P12 (Bit 12) */ +#define PORT3_IN_P12_Msk (0x1000UL) /*!< PORT3 IN: P12 (Bitfield-Mask: 0x01) */ +#define PORT3_IN_P13_Pos (13UL) /*!< PORT3 IN: P13 (Bit 13) */ +#define PORT3_IN_P13_Msk (0x2000UL) /*!< PORT3 IN: P13 (Bitfield-Mask: 0x01) */ +#define PORT3_IN_P14_Pos (14UL) /*!< PORT3 IN: P14 (Bit 14) */ +#define PORT3_IN_P14_Msk (0x4000UL) /*!< PORT3 IN: P14 (Bitfield-Mask: 0x01) */ +#define PORT3_IN_P15_Pos (15UL) /*!< PORT3 IN: P15 (Bit 15) */ +#define PORT3_IN_P15_Msk (0x8000UL) /*!< PORT3 IN: P15 (Bitfield-Mask: 0x01) */ + +/* --------------------------------- PORT3_PDR0 --------------------------------- */ +#define PORT3_PDR0_PD0_Pos (0UL) /*!< PORT3 PDR0: PD0 (Bit 0) */ +#define PORT3_PDR0_PD0_Msk (0x7UL) /*!< PORT3 PDR0: PD0 (Bitfield-Mask: 0x07) */ +#define PORT3_PDR0_PD1_Pos (4UL) /*!< PORT3 PDR0: PD1 (Bit 4) */ +#define PORT3_PDR0_PD1_Msk (0x70UL) /*!< PORT3 PDR0: PD1 (Bitfield-Mask: 0x07) */ +#define PORT3_PDR0_PD2_Pos (8UL) /*!< PORT3 PDR0: PD2 (Bit 8) */ +#define PORT3_PDR0_PD2_Msk (0x700UL) /*!< PORT3 PDR0: PD2 (Bitfield-Mask: 0x07) */ +#define PORT3_PDR0_PD3_Pos (12UL) /*!< PORT3 PDR0: PD3 (Bit 12) */ +#define PORT3_PDR0_PD3_Msk (0x7000UL) /*!< PORT3 PDR0: PD3 (Bitfield-Mask: 0x07) */ +#define PORT3_PDR0_PD4_Pos (16UL) /*!< PORT3 PDR0: PD4 (Bit 16) */ +#define PORT3_PDR0_PD4_Msk (0x70000UL) /*!< PORT3 PDR0: PD4 (Bitfield-Mask: 0x07) */ +#define PORT3_PDR0_PD5_Pos (20UL) /*!< PORT3 PDR0: PD5 (Bit 20) */ +#define PORT3_PDR0_PD5_Msk (0x700000UL) /*!< PORT3 PDR0: PD5 (Bitfield-Mask: 0x07) */ +#define PORT3_PDR0_PD6_Pos (24UL) /*!< PORT3 PDR0: PD6 (Bit 24) */ +#define PORT3_PDR0_PD6_Msk (0x7000000UL) /*!< PORT3 PDR0: PD6 (Bitfield-Mask: 0x07) */ +#define PORT3_PDR0_PD7_Pos (28UL) /*!< PORT3 PDR0: PD7 (Bit 28) */ +#define PORT3_PDR0_PD7_Msk (0x70000000UL) /*!< PORT3 PDR0: PD7 (Bitfield-Mask: 0x07) */ + +/* --------------------------------- PORT3_PDISC -------------------------------- */ +#define PORT3_PDISC_PDIS0_Pos (0UL) /*!< PORT3 PDISC: PDIS0 (Bit 0) */ +#define PORT3_PDISC_PDIS0_Msk (0x1UL) /*!< PORT3 PDISC: PDIS0 (Bitfield-Mask: 0x01) */ +#define PORT3_PDISC_PDIS1_Pos (1UL) /*!< PORT3 PDISC: PDIS1 (Bit 1) */ +#define PORT3_PDISC_PDIS1_Msk (0x2UL) /*!< PORT3 PDISC: PDIS1 (Bitfield-Mask: 0x01) */ +#define PORT3_PDISC_PDIS2_Pos (2UL) /*!< PORT3 PDISC: PDIS2 (Bit 2) */ +#define PORT3_PDISC_PDIS2_Msk (0x4UL) /*!< PORT3 PDISC: PDIS2 (Bitfield-Mask: 0x01) */ +#define PORT3_PDISC_PDIS3_Pos (3UL) /*!< PORT3 PDISC: PDIS3 (Bit 3) */ +#define PORT3_PDISC_PDIS3_Msk (0x8UL) /*!< PORT3 PDISC: PDIS3 (Bitfield-Mask: 0x01) */ +#define PORT3_PDISC_PDIS4_Pos (4UL) /*!< PORT3 PDISC: PDIS4 (Bit 4) */ +#define PORT3_PDISC_PDIS4_Msk (0x10UL) /*!< PORT3 PDISC: PDIS4 (Bitfield-Mask: 0x01) */ +#define PORT3_PDISC_PDIS5_Pos (5UL) /*!< PORT3 PDISC: PDIS5 (Bit 5) */ +#define PORT3_PDISC_PDIS5_Msk (0x20UL) /*!< PORT3 PDISC: PDIS5 (Bitfield-Mask: 0x01) */ +#define PORT3_PDISC_PDIS6_Pos (6UL) /*!< PORT3 PDISC: PDIS6 (Bit 6) */ +#define PORT3_PDISC_PDIS6_Msk (0x40UL) /*!< PORT3 PDISC: PDIS6 (Bitfield-Mask: 0x01) */ +#define PORT3_PDISC_PDIS7_Pos (7UL) /*!< PORT3 PDISC: PDIS7 (Bit 7) */ +#define PORT3_PDISC_PDIS7_Msk (0x80UL) /*!< PORT3 PDISC: PDIS7 (Bitfield-Mask: 0x01) */ +#define PORT3_PDISC_PDIS8_Pos (8UL) /*!< PORT3 PDISC: PDIS8 (Bit 8) */ +#define PORT3_PDISC_PDIS8_Msk (0x100UL) /*!< PORT3 PDISC: PDIS8 (Bitfield-Mask: 0x01) */ +#define PORT3_PDISC_PDIS9_Pos (9UL) /*!< PORT3 PDISC: PDIS9 (Bit 9) */ +#define PORT3_PDISC_PDIS9_Msk (0x200UL) /*!< PORT3 PDISC: PDIS9 (Bitfield-Mask: 0x01) */ +#define PORT3_PDISC_PDIS10_Pos (10UL) /*!< PORT3 PDISC: PDIS10 (Bit 10) */ +#define PORT3_PDISC_PDIS10_Msk (0x400UL) /*!< PORT3 PDISC: PDIS10 (Bitfield-Mask: 0x01) */ +#define PORT3_PDISC_PDIS11_Pos (11UL) /*!< PORT3 PDISC: PDIS11 (Bit 11) */ +#define PORT3_PDISC_PDIS11_Msk (0x800UL) /*!< PORT3 PDISC: PDIS11 (Bitfield-Mask: 0x01) */ +#define PORT3_PDISC_PDIS12_Pos (12UL) /*!< PORT3 PDISC: PDIS12 (Bit 12) */ +#define PORT3_PDISC_PDIS12_Msk (0x1000UL) /*!< PORT3 PDISC: PDIS12 (Bitfield-Mask: 0x01) */ +#define PORT3_PDISC_PDIS13_Pos (13UL) /*!< PORT3 PDISC: PDIS13 (Bit 13) */ +#define PORT3_PDISC_PDIS13_Msk (0x2000UL) /*!< PORT3 PDISC: PDIS13 (Bitfield-Mask: 0x01) */ +#define PORT3_PDISC_PDIS14_Pos (14UL) /*!< PORT3 PDISC: PDIS14 (Bit 14) */ +#define PORT3_PDISC_PDIS14_Msk (0x4000UL) /*!< PORT3 PDISC: PDIS14 (Bitfield-Mask: 0x01) */ +#define PORT3_PDISC_PDIS15_Pos (15UL) /*!< PORT3 PDISC: PDIS15 (Bit 15) */ +#define PORT3_PDISC_PDIS15_Msk (0x8000UL) /*!< PORT3 PDISC: PDIS15 (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- PORT3_PPS --------------------------------- */ +#define PORT3_PPS_PPS0_Pos (0UL) /*!< PORT3 PPS: PPS0 (Bit 0) */ +#define PORT3_PPS_PPS0_Msk (0x1UL) /*!< PORT3 PPS: PPS0 (Bitfield-Mask: 0x01) */ +#define PORT3_PPS_PPS1_Pos (1UL) /*!< PORT3 PPS: PPS1 (Bit 1) */ +#define PORT3_PPS_PPS1_Msk (0x2UL) /*!< PORT3 PPS: PPS1 (Bitfield-Mask: 0x01) */ +#define PORT3_PPS_PPS2_Pos (2UL) /*!< PORT3 PPS: PPS2 (Bit 2) */ +#define PORT3_PPS_PPS2_Msk (0x4UL) /*!< PORT3 PPS: PPS2 (Bitfield-Mask: 0x01) */ +#define PORT3_PPS_PPS3_Pos (3UL) /*!< PORT3 PPS: PPS3 (Bit 3) */ +#define PORT3_PPS_PPS3_Msk (0x8UL) /*!< PORT3 PPS: PPS3 (Bitfield-Mask: 0x01) */ +#define PORT3_PPS_PPS4_Pos (4UL) /*!< PORT3 PPS: PPS4 (Bit 4) */ +#define PORT3_PPS_PPS4_Msk (0x10UL) /*!< PORT3 PPS: PPS4 (Bitfield-Mask: 0x01) */ +#define PORT3_PPS_PPS5_Pos (5UL) /*!< PORT3 PPS: PPS5 (Bit 5) */ +#define PORT3_PPS_PPS5_Msk (0x20UL) /*!< PORT3 PPS: PPS5 (Bitfield-Mask: 0x01) */ +#define PORT3_PPS_PPS6_Pos (6UL) /*!< PORT3 PPS: PPS6 (Bit 6) */ +#define PORT3_PPS_PPS6_Msk (0x40UL) /*!< PORT3 PPS: PPS6 (Bitfield-Mask: 0x01) */ +#define PORT3_PPS_PPS7_Pos (7UL) /*!< PORT3 PPS: PPS7 (Bit 7) */ +#define PORT3_PPS_PPS7_Msk (0x80UL) /*!< PORT3 PPS: PPS7 (Bitfield-Mask: 0x01) */ +#define PORT3_PPS_PPS8_Pos (8UL) /*!< PORT3 PPS: PPS8 (Bit 8) */ +#define PORT3_PPS_PPS8_Msk (0x100UL) /*!< PORT3 PPS: PPS8 (Bitfield-Mask: 0x01) */ +#define PORT3_PPS_PPS9_Pos (9UL) /*!< PORT3 PPS: PPS9 (Bit 9) */ +#define PORT3_PPS_PPS9_Msk (0x200UL) /*!< PORT3 PPS: PPS9 (Bitfield-Mask: 0x01) */ +#define PORT3_PPS_PPS10_Pos (10UL) /*!< PORT3 PPS: PPS10 (Bit 10) */ +#define PORT3_PPS_PPS10_Msk (0x400UL) /*!< PORT3 PPS: PPS10 (Bitfield-Mask: 0x01) */ +#define PORT3_PPS_PPS11_Pos (11UL) /*!< PORT3 PPS: PPS11 (Bit 11) */ +#define PORT3_PPS_PPS11_Msk (0x800UL) /*!< PORT3 PPS: PPS11 (Bitfield-Mask: 0x01) */ +#define PORT3_PPS_PPS12_Pos (12UL) /*!< PORT3 PPS: PPS12 (Bit 12) */ +#define PORT3_PPS_PPS12_Msk (0x1000UL) /*!< PORT3 PPS: PPS12 (Bitfield-Mask: 0x01) */ +#define PORT3_PPS_PPS13_Pos (13UL) /*!< PORT3 PPS: PPS13 (Bit 13) */ +#define PORT3_PPS_PPS13_Msk (0x2000UL) /*!< PORT3 PPS: PPS13 (Bitfield-Mask: 0x01) */ +#define PORT3_PPS_PPS14_Pos (14UL) /*!< PORT3 PPS: PPS14 (Bit 14) */ +#define PORT3_PPS_PPS14_Msk (0x4000UL) /*!< PORT3 PPS: PPS14 (Bitfield-Mask: 0x01) */ +#define PORT3_PPS_PPS15_Pos (15UL) /*!< PORT3 PPS: PPS15 (Bit 15) */ +#define PORT3_PPS_PPS15_Msk (0x8000UL) /*!< PORT3 PPS: PPS15 (Bitfield-Mask: 0x01) */ + +/* --------------------------------- PORT3_HWSEL -------------------------------- */ +#define PORT3_HWSEL_HW0_Pos (0UL) /*!< PORT3 HWSEL: HW0 (Bit 0) */ +#define PORT3_HWSEL_HW0_Msk (0x3UL) /*!< PORT3 HWSEL: HW0 (Bitfield-Mask: 0x03) */ +#define PORT3_HWSEL_HW1_Pos (2UL) /*!< PORT3 HWSEL: HW1 (Bit 2) */ +#define PORT3_HWSEL_HW1_Msk (0xcUL) /*!< PORT3 HWSEL: HW1 (Bitfield-Mask: 0x03) */ +#define PORT3_HWSEL_HW2_Pos (4UL) /*!< PORT3 HWSEL: HW2 (Bit 4) */ +#define PORT3_HWSEL_HW2_Msk (0x30UL) /*!< PORT3 HWSEL: HW2 (Bitfield-Mask: 0x03) */ +#define PORT3_HWSEL_HW3_Pos (6UL) /*!< PORT3 HWSEL: HW3 (Bit 6) */ +#define PORT3_HWSEL_HW3_Msk (0xc0UL) /*!< PORT3 HWSEL: HW3 (Bitfield-Mask: 0x03) */ +#define PORT3_HWSEL_HW4_Pos (8UL) /*!< PORT3 HWSEL: HW4 (Bit 8) */ +#define PORT3_HWSEL_HW4_Msk (0x300UL) /*!< PORT3 HWSEL: HW4 (Bitfield-Mask: 0x03) */ +#define PORT3_HWSEL_HW5_Pos (10UL) /*!< PORT3 HWSEL: HW5 (Bit 10) */ +#define PORT3_HWSEL_HW5_Msk (0xc00UL) /*!< PORT3 HWSEL: HW5 (Bitfield-Mask: 0x03) */ +#define PORT3_HWSEL_HW6_Pos (12UL) /*!< PORT3 HWSEL: HW6 (Bit 12) */ +#define PORT3_HWSEL_HW6_Msk (0x3000UL) /*!< PORT3 HWSEL: HW6 (Bitfield-Mask: 0x03) */ +#define PORT3_HWSEL_HW7_Pos (14UL) /*!< PORT3 HWSEL: HW7 (Bit 14) */ +#define PORT3_HWSEL_HW7_Msk (0xc000UL) /*!< PORT3 HWSEL: HW7 (Bitfield-Mask: 0x03) */ +#define PORT3_HWSEL_HW8_Pos (16UL) /*!< PORT3 HWSEL: HW8 (Bit 16) */ +#define PORT3_HWSEL_HW8_Msk (0x30000UL) /*!< PORT3 HWSEL: HW8 (Bitfield-Mask: 0x03) */ +#define PORT3_HWSEL_HW9_Pos (18UL) /*!< PORT3 HWSEL: HW9 (Bit 18) */ +#define PORT3_HWSEL_HW9_Msk (0xc0000UL) /*!< PORT3 HWSEL: HW9 (Bitfield-Mask: 0x03) */ +#define PORT3_HWSEL_HW10_Pos (20UL) /*!< PORT3 HWSEL: HW10 (Bit 20) */ +#define PORT3_HWSEL_HW10_Msk (0x300000UL) /*!< PORT3 HWSEL: HW10 (Bitfield-Mask: 0x03) */ +#define PORT3_HWSEL_HW11_Pos (22UL) /*!< PORT3 HWSEL: HW11 (Bit 22) */ +#define PORT3_HWSEL_HW11_Msk (0xc00000UL) /*!< PORT3 HWSEL: HW11 (Bitfield-Mask: 0x03) */ +#define PORT3_HWSEL_HW12_Pos (24UL) /*!< PORT3 HWSEL: HW12 (Bit 24) */ +#define PORT3_HWSEL_HW12_Msk (0x3000000UL) /*!< PORT3 HWSEL: HW12 (Bitfield-Mask: 0x03) */ +#define PORT3_HWSEL_HW13_Pos (26UL) /*!< PORT3 HWSEL: HW13 (Bit 26) */ +#define PORT3_HWSEL_HW13_Msk (0xc000000UL) /*!< PORT3 HWSEL: HW13 (Bitfield-Mask: 0x03) */ +#define PORT3_HWSEL_HW14_Pos (28UL) /*!< PORT3 HWSEL: HW14 (Bit 28) */ +#define PORT3_HWSEL_HW14_Msk (0x30000000UL) /*!< PORT3 HWSEL: HW14 (Bitfield-Mask: 0x03) */ +#define PORT3_HWSEL_HW15_Pos (30UL) /*!< PORT3 HWSEL: HW15 (Bit 30) */ +#define PORT3_HWSEL_HW15_Msk (0xc0000000UL) /*!< PORT3 HWSEL: HW15 (Bitfield-Mask: 0x03) */ + + +/* ================================================================================ */ +/* ================ struct 'PORT14' Position & Mask ================ */ +/* ================================================================================ */ + + +/* --------------------------------- PORT14_OUT --------------------------------- */ +#define PORT14_OUT_P0_Pos (0UL) /*!< PORT14 OUT: P0 (Bit 0) */ +#define PORT14_OUT_P0_Msk (0x1UL) /*!< PORT14 OUT: P0 (Bitfield-Mask: 0x01) */ +#define PORT14_OUT_P1_Pos (1UL) /*!< PORT14 OUT: P1 (Bit 1) */ +#define PORT14_OUT_P1_Msk (0x2UL) /*!< PORT14 OUT: P1 (Bitfield-Mask: 0x01) */ +#define PORT14_OUT_P2_Pos (2UL) /*!< PORT14 OUT: P2 (Bit 2) */ +#define PORT14_OUT_P2_Msk (0x4UL) /*!< PORT14 OUT: P2 (Bitfield-Mask: 0x01) */ +#define PORT14_OUT_P3_Pos (3UL) /*!< PORT14 OUT: P3 (Bit 3) */ +#define PORT14_OUT_P3_Msk (0x8UL) /*!< PORT14 OUT: P3 (Bitfield-Mask: 0x01) */ +#define PORT14_OUT_P4_Pos (4UL) /*!< PORT14 OUT: P4 (Bit 4) */ +#define PORT14_OUT_P4_Msk (0x10UL) /*!< PORT14 OUT: P4 (Bitfield-Mask: 0x01) */ +#define PORT14_OUT_P5_Pos (5UL) /*!< PORT14 OUT: P5 (Bit 5) */ +#define PORT14_OUT_P5_Msk (0x20UL) /*!< PORT14 OUT: P5 (Bitfield-Mask: 0x01) */ +#define PORT14_OUT_P6_Pos (6UL) /*!< PORT14 OUT: P6 (Bit 6) */ +#define PORT14_OUT_P6_Msk (0x40UL) /*!< PORT14 OUT: P6 (Bitfield-Mask: 0x01) */ +#define PORT14_OUT_P7_Pos (7UL) /*!< PORT14 OUT: P7 (Bit 7) */ +#define PORT14_OUT_P7_Msk (0x80UL) /*!< PORT14 OUT: P7 (Bitfield-Mask: 0x01) */ +#define PORT14_OUT_P8_Pos (8UL) /*!< PORT14 OUT: P8 (Bit 8) */ +#define PORT14_OUT_P8_Msk (0x100UL) /*!< PORT14 OUT: P8 (Bitfield-Mask: 0x01) */ +#define PORT14_OUT_P9_Pos (9UL) /*!< PORT14 OUT: P9 (Bit 9) */ +#define PORT14_OUT_P9_Msk (0x200UL) /*!< PORT14 OUT: P9 (Bitfield-Mask: 0x01) */ +#define PORT14_OUT_P10_Pos (10UL) /*!< PORT14 OUT: P10 (Bit 10) */ +#define PORT14_OUT_P10_Msk (0x400UL) /*!< PORT14 OUT: P10 (Bitfield-Mask: 0x01) */ +#define PORT14_OUT_P11_Pos (11UL) /*!< PORT14 OUT: P11 (Bit 11) */ +#define PORT14_OUT_P11_Msk (0x800UL) /*!< PORT14 OUT: P11 (Bitfield-Mask: 0x01) */ +#define PORT14_OUT_P12_Pos (12UL) /*!< PORT14 OUT: P12 (Bit 12) */ +#define PORT14_OUT_P12_Msk (0x1000UL) /*!< PORT14 OUT: P12 (Bitfield-Mask: 0x01) */ +#define PORT14_OUT_P13_Pos (13UL) /*!< PORT14 OUT: P13 (Bit 13) */ +#define PORT14_OUT_P13_Msk (0x2000UL) /*!< PORT14 OUT: P13 (Bitfield-Mask: 0x01) */ +#define PORT14_OUT_P14_Pos (14UL) /*!< PORT14 OUT: P14 (Bit 14) */ +#define PORT14_OUT_P14_Msk (0x4000UL) /*!< PORT14 OUT: P14 (Bitfield-Mask: 0x01) */ +#define PORT14_OUT_P15_Pos (15UL) /*!< PORT14 OUT: P15 (Bit 15) */ +#define PORT14_OUT_P15_Msk (0x8000UL) /*!< PORT14 OUT: P15 (Bitfield-Mask: 0x01) */ + +/* --------------------------------- PORT14_OMR --------------------------------- */ +#define PORT14_OMR_PS0_Pos (0UL) /*!< PORT14 OMR: PS0 (Bit 0) */ +#define PORT14_OMR_PS0_Msk (0x1UL) /*!< PORT14 OMR: PS0 (Bitfield-Mask: 0x01) */ +#define PORT14_OMR_PS1_Pos (1UL) /*!< PORT14 OMR: PS1 (Bit 1) */ +#define PORT14_OMR_PS1_Msk (0x2UL) /*!< PORT14 OMR: PS1 (Bitfield-Mask: 0x01) */ +#define PORT14_OMR_PS2_Pos (2UL) /*!< PORT14 OMR: PS2 (Bit 2) */ +#define PORT14_OMR_PS2_Msk (0x4UL) /*!< PORT14 OMR: PS2 (Bitfield-Mask: 0x01) */ +#define PORT14_OMR_PS3_Pos (3UL) /*!< PORT14 OMR: PS3 (Bit 3) */ +#define PORT14_OMR_PS3_Msk (0x8UL) /*!< PORT14 OMR: PS3 (Bitfield-Mask: 0x01) */ +#define PORT14_OMR_PS4_Pos (4UL) /*!< PORT14 OMR: PS4 (Bit 4) */ +#define PORT14_OMR_PS4_Msk (0x10UL) /*!< PORT14 OMR: PS4 (Bitfield-Mask: 0x01) */ +#define PORT14_OMR_PS5_Pos (5UL) /*!< PORT14 OMR: PS5 (Bit 5) */ +#define PORT14_OMR_PS5_Msk (0x20UL) /*!< PORT14 OMR: PS5 (Bitfield-Mask: 0x01) */ +#define PORT14_OMR_PS6_Pos (6UL) /*!< PORT14 OMR: PS6 (Bit 6) */ +#define PORT14_OMR_PS6_Msk (0x40UL) /*!< PORT14 OMR: PS6 (Bitfield-Mask: 0x01) */ +#define PORT14_OMR_PS7_Pos (7UL) /*!< PORT14 OMR: PS7 (Bit 7) */ +#define PORT14_OMR_PS7_Msk (0x80UL) /*!< PORT14 OMR: PS7 (Bitfield-Mask: 0x01) */ +#define PORT14_OMR_PS8_Pos (8UL) /*!< PORT14 OMR: PS8 (Bit 8) */ +#define PORT14_OMR_PS8_Msk (0x100UL) /*!< PORT14 OMR: PS8 (Bitfield-Mask: 0x01) */ +#define PORT14_OMR_PS9_Pos (9UL) /*!< PORT14 OMR: PS9 (Bit 9) */ +#define PORT14_OMR_PS9_Msk (0x200UL) /*!< PORT14 OMR: PS9 (Bitfield-Mask: 0x01) */ +#define PORT14_OMR_PS10_Pos (10UL) /*!< PORT14 OMR: PS10 (Bit 10) */ +#define PORT14_OMR_PS10_Msk (0x400UL) /*!< PORT14 OMR: PS10 (Bitfield-Mask: 0x01) */ +#define PORT14_OMR_PS11_Pos (11UL) /*!< PORT14 OMR: PS11 (Bit 11) */ +#define PORT14_OMR_PS11_Msk (0x800UL) /*!< PORT14 OMR: PS11 (Bitfield-Mask: 0x01) */ +#define PORT14_OMR_PS12_Pos (12UL) /*!< PORT14 OMR: PS12 (Bit 12) */ +#define PORT14_OMR_PS12_Msk (0x1000UL) /*!< PORT14 OMR: PS12 (Bitfield-Mask: 0x01) */ +#define PORT14_OMR_PS13_Pos (13UL) /*!< PORT14 OMR: PS13 (Bit 13) */ +#define PORT14_OMR_PS13_Msk (0x2000UL) /*!< PORT14 OMR: PS13 (Bitfield-Mask: 0x01) */ +#define PORT14_OMR_PS14_Pos (14UL) /*!< PORT14 OMR: PS14 (Bit 14) */ +#define PORT14_OMR_PS14_Msk (0x4000UL) /*!< PORT14 OMR: PS14 (Bitfield-Mask: 0x01) */ +#define PORT14_OMR_PS15_Pos (15UL) /*!< PORT14 OMR: PS15 (Bit 15) */ +#define PORT14_OMR_PS15_Msk (0x8000UL) /*!< PORT14 OMR: PS15 (Bitfield-Mask: 0x01) */ +#define PORT14_OMR_PR0_Pos (16UL) /*!< PORT14 OMR: PR0 (Bit 16) */ +#define PORT14_OMR_PR0_Msk (0x10000UL) /*!< PORT14 OMR: PR0 (Bitfield-Mask: 0x01) */ +#define PORT14_OMR_PR1_Pos (17UL) /*!< PORT14 OMR: PR1 (Bit 17) */ +#define PORT14_OMR_PR1_Msk (0x20000UL) /*!< PORT14 OMR: PR1 (Bitfield-Mask: 0x01) */ +#define PORT14_OMR_PR2_Pos (18UL) /*!< PORT14 OMR: PR2 (Bit 18) */ +#define PORT14_OMR_PR2_Msk (0x40000UL) /*!< PORT14 OMR: PR2 (Bitfield-Mask: 0x01) */ +#define PORT14_OMR_PR3_Pos (19UL) /*!< PORT14 OMR: PR3 (Bit 19) */ +#define PORT14_OMR_PR3_Msk (0x80000UL) /*!< PORT14 OMR: PR3 (Bitfield-Mask: 0x01) */ +#define PORT14_OMR_PR4_Pos (20UL) /*!< PORT14 OMR: PR4 (Bit 20) */ +#define PORT14_OMR_PR4_Msk (0x100000UL) /*!< PORT14 OMR: PR4 (Bitfield-Mask: 0x01) */ +#define PORT14_OMR_PR5_Pos (21UL) /*!< PORT14 OMR: PR5 (Bit 21) */ +#define PORT14_OMR_PR5_Msk (0x200000UL) /*!< PORT14 OMR: PR5 (Bitfield-Mask: 0x01) */ +#define PORT14_OMR_PR6_Pos (22UL) /*!< PORT14 OMR: PR6 (Bit 22) */ +#define PORT14_OMR_PR6_Msk (0x400000UL) /*!< PORT14 OMR: PR6 (Bitfield-Mask: 0x01) */ +#define PORT14_OMR_PR7_Pos (23UL) /*!< PORT14 OMR: PR7 (Bit 23) */ +#define PORT14_OMR_PR7_Msk (0x800000UL) /*!< PORT14 OMR: PR7 (Bitfield-Mask: 0x01) */ +#define PORT14_OMR_PR8_Pos (24UL) /*!< PORT14 OMR: PR8 (Bit 24) */ +#define PORT14_OMR_PR8_Msk (0x1000000UL) /*!< PORT14 OMR: PR8 (Bitfield-Mask: 0x01) */ +#define PORT14_OMR_PR9_Pos (25UL) /*!< PORT14 OMR: PR9 (Bit 25) */ +#define PORT14_OMR_PR9_Msk (0x2000000UL) /*!< PORT14 OMR: PR9 (Bitfield-Mask: 0x01) */ +#define PORT14_OMR_PR10_Pos (26UL) /*!< PORT14 OMR: PR10 (Bit 26) */ +#define PORT14_OMR_PR10_Msk (0x4000000UL) /*!< PORT14 OMR: PR10 (Bitfield-Mask: 0x01) */ +#define PORT14_OMR_PR11_Pos (27UL) /*!< PORT14 OMR: PR11 (Bit 27) */ +#define PORT14_OMR_PR11_Msk (0x8000000UL) /*!< PORT14 OMR: PR11 (Bitfield-Mask: 0x01) */ +#define PORT14_OMR_PR12_Pos (28UL) /*!< PORT14 OMR: PR12 (Bit 28) */ +#define PORT14_OMR_PR12_Msk (0x10000000UL) /*!< PORT14 OMR: PR12 (Bitfield-Mask: 0x01) */ +#define PORT14_OMR_PR13_Pos (29UL) /*!< PORT14 OMR: PR13 (Bit 29) */ +#define PORT14_OMR_PR13_Msk (0x20000000UL) /*!< PORT14 OMR: PR13 (Bitfield-Mask: 0x01) */ +#define PORT14_OMR_PR14_Pos (30UL) /*!< PORT14 OMR: PR14 (Bit 30) */ +#define PORT14_OMR_PR14_Msk (0x40000000UL) /*!< PORT14 OMR: PR14 (Bitfield-Mask: 0x01) */ +#define PORT14_OMR_PR15_Pos (31UL) /*!< PORT14 OMR: PR15 (Bit 31) */ +#define PORT14_OMR_PR15_Msk (0x80000000UL) /*!< PORT14 OMR: PR15 (Bitfield-Mask: 0x01) */ + +/* -------------------------------- PORT14_IOCR0 -------------------------------- */ +#define PORT14_IOCR0_PC0_Pos (3UL) /*!< PORT14 IOCR0: PC0 (Bit 3) */ +#define PORT14_IOCR0_PC0_Msk (0xf8UL) /*!< PORT14 IOCR0: PC0 (Bitfield-Mask: 0x1f) */ +#define PORT14_IOCR0_PC1_Pos (11UL) /*!< PORT14 IOCR0: PC1 (Bit 11) */ +#define PORT14_IOCR0_PC1_Msk (0xf800UL) /*!< PORT14 IOCR0: PC1 (Bitfield-Mask: 0x1f) */ +#define PORT14_IOCR0_PC2_Pos (19UL) /*!< PORT14 IOCR0: PC2 (Bit 19) */ +#define PORT14_IOCR0_PC2_Msk (0xf80000UL) /*!< PORT14 IOCR0: PC2 (Bitfield-Mask: 0x1f) */ +#define PORT14_IOCR0_PC3_Pos (27UL) /*!< PORT14 IOCR0: PC3 (Bit 27) */ +#define PORT14_IOCR0_PC3_Msk (0xf8000000UL) /*!< PORT14 IOCR0: PC3 (Bitfield-Mask: 0x1f) */ + +/* -------------------------------- PORT14_IOCR4 -------------------------------- */ +#define PORT14_IOCR4_PC4_Pos (3UL) /*!< PORT14 IOCR4: PC4 (Bit 3) */ +#define PORT14_IOCR4_PC4_Msk (0xf8UL) /*!< PORT14 IOCR4: PC4 (Bitfield-Mask: 0x1f) */ +#define PORT14_IOCR4_PC5_Pos (11UL) /*!< PORT14 IOCR4: PC5 (Bit 11) */ +#define PORT14_IOCR4_PC5_Msk (0xf800UL) /*!< PORT14 IOCR4: PC5 (Bitfield-Mask: 0x1f) */ +#define PORT14_IOCR4_PC6_Pos (19UL) /*!< PORT14 IOCR4: PC6 (Bit 19) */ +#define PORT14_IOCR4_PC6_Msk (0xf80000UL) /*!< PORT14 IOCR4: PC6 (Bitfield-Mask: 0x1f) */ +#define PORT14_IOCR4_PC7_Pos (27UL) /*!< PORT14 IOCR4: PC7 (Bit 27) */ +#define PORT14_IOCR4_PC7_Msk (0xf8000000UL) /*!< PORT14 IOCR4: PC7 (Bitfield-Mask: 0x1f) */ + +/* -------------------------------- PORT14_IOCR8 -------------------------------- */ +#define PORT14_IOCR8_PC8_Pos (3UL) /*!< PORT14 IOCR8: PC8 (Bit 3) */ +#define PORT14_IOCR8_PC8_Msk (0xf8UL) /*!< PORT14 IOCR8: PC8 (Bitfield-Mask: 0x1f) */ +#define PORT14_IOCR8_PC9_Pos (11UL) /*!< PORT14 IOCR8: PC9 (Bit 11) */ +#define PORT14_IOCR8_PC9_Msk (0xf800UL) /*!< PORT14 IOCR8: PC9 (Bitfield-Mask: 0x1f) */ +#define PORT14_IOCR8_PC10_Pos (19UL) /*!< PORT14 IOCR8: PC10 (Bit 19) */ +#define PORT14_IOCR8_PC10_Msk (0xf80000UL) /*!< PORT14 IOCR8: PC10 (Bitfield-Mask: 0x1f) */ +#define PORT14_IOCR8_PC11_Pos (27UL) /*!< PORT14 IOCR8: PC11 (Bit 27) */ +#define PORT14_IOCR8_PC11_Msk (0xf8000000UL) /*!< PORT14 IOCR8: PC11 (Bitfield-Mask: 0x1f) */ + +/* -------------------------------- PORT14_IOCR12 ------------------------------- */ +#define PORT14_IOCR12_PC12_Pos (3UL) /*!< PORT14 IOCR12: PC12 (Bit 3) */ +#define PORT14_IOCR12_PC12_Msk (0xf8UL) /*!< PORT14 IOCR12: PC12 (Bitfield-Mask: 0x1f) */ +#define PORT14_IOCR12_PC13_Pos (11UL) /*!< PORT14 IOCR12: PC13 (Bit 11) */ +#define PORT14_IOCR12_PC13_Msk (0xf800UL) /*!< PORT14 IOCR12: PC13 (Bitfield-Mask: 0x1f) */ +#define PORT14_IOCR12_PC14_Pos (19UL) /*!< PORT14 IOCR12: PC14 (Bit 19) */ +#define PORT14_IOCR12_PC14_Msk (0xf80000UL) /*!< PORT14 IOCR12: PC14 (Bitfield-Mask: 0x1f) */ +#define PORT14_IOCR12_PC15_Pos (27UL) /*!< PORT14 IOCR12: PC15 (Bit 27) */ +#define PORT14_IOCR12_PC15_Msk (0xf8000000UL) /*!< PORT14 IOCR12: PC15 (Bitfield-Mask: 0x1f) */ + +/* ---------------------------------- PORT14_IN --------------------------------- */ +#define PORT14_IN_P0_Pos (0UL) /*!< PORT14 IN: P0 (Bit 0) */ +#define PORT14_IN_P0_Msk (0x1UL) /*!< PORT14 IN: P0 (Bitfield-Mask: 0x01) */ +#define PORT14_IN_P1_Pos (1UL) /*!< PORT14 IN: P1 (Bit 1) */ +#define PORT14_IN_P1_Msk (0x2UL) /*!< PORT14 IN: P1 (Bitfield-Mask: 0x01) */ +#define PORT14_IN_P2_Pos (2UL) /*!< PORT14 IN: P2 (Bit 2) */ +#define PORT14_IN_P2_Msk (0x4UL) /*!< PORT14 IN: P2 (Bitfield-Mask: 0x01) */ +#define PORT14_IN_P3_Pos (3UL) /*!< PORT14 IN: P3 (Bit 3) */ +#define PORT14_IN_P3_Msk (0x8UL) /*!< PORT14 IN: P3 (Bitfield-Mask: 0x01) */ +#define PORT14_IN_P4_Pos (4UL) /*!< PORT14 IN: P4 (Bit 4) */ +#define PORT14_IN_P4_Msk (0x10UL) /*!< PORT14 IN: P4 (Bitfield-Mask: 0x01) */ +#define PORT14_IN_P5_Pos (5UL) /*!< PORT14 IN: P5 (Bit 5) */ +#define PORT14_IN_P5_Msk (0x20UL) /*!< PORT14 IN: P5 (Bitfield-Mask: 0x01) */ +#define PORT14_IN_P6_Pos (6UL) /*!< PORT14 IN: P6 (Bit 6) */ +#define PORT14_IN_P6_Msk (0x40UL) /*!< PORT14 IN: P6 (Bitfield-Mask: 0x01) */ +#define PORT14_IN_P7_Pos (7UL) /*!< PORT14 IN: P7 (Bit 7) */ +#define PORT14_IN_P7_Msk (0x80UL) /*!< PORT14 IN: P7 (Bitfield-Mask: 0x01) */ +#define PORT14_IN_P8_Pos (8UL) /*!< PORT14 IN: P8 (Bit 8) */ +#define PORT14_IN_P8_Msk (0x100UL) /*!< PORT14 IN: P8 (Bitfield-Mask: 0x01) */ +#define PORT14_IN_P9_Pos (9UL) /*!< PORT14 IN: P9 (Bit 9) */ +#define PORT14_IN_P9_Msk (0x200UL) /*!< PORT14 IN: P9 (Bitfield-Mask: 0x01) */ +#define PORT14_IN_P10_Pos (10UL) /*!< PORT14 IN: P10 (Bit 10) */ +#define PORT14_IN_P10_Msk (0x400UL) /*!< PORT14 IN: P10 (Bitfield-Mask: 0x01) */ +#define PORT14_IN_P11_Pos (11UL) /*!< PORT14 IN: P11 (Bit 11) */ +#define PORT14_IN_P11_Msk (0x800UL) /*!< PORT14 IN: P11 (Bitfield-Mask: 0x01) */ +#define PORT14_IN_P12_Pos (12UL) /*!< PORT14 IN: P12 (Bit 12) */ +#define PORT14_IN_P12_Msk (0x1000UL) /*!< PORT14 IN: P12 (Bitfield-Mask: 0x01) */ +#define PORT14_IN_P13_Pos (13UL) /*!< PORT14 IN: P13 (Bit 13) */ +#define PORT14_IN_P13_Msk (0x2000UL) /*!< PORT14 IN: P13 (Bitfield-Mask: 0x01) */ +#define PORT14_IN_P14_Pos (14UL) /*!< PORT14 IN: P14 (Bit 14) */ +#define PORT14_IN_P14_Msk (0x4000UL) /*!< PORT14 IN: P14 (Bitfield-Mask: 0x01) */ +#define PORT14_IN_P15_Pos (15UL) /*!< PORT14 IN: P15 (Bit 15) */ +#define PORT14_IN_P15_Msk (0x8000UL) /*!< PORT14 IN: P15 (Bitfield-Mask: 0x01) */ + +/* -------------------------------- PORT14_PDISC -------------------------------- */ +#define PORT14_PDISC_PDIS0_Pos (0UL) /*!< PORT14 PDISC: PDIS0 (Bit 0) */ +#define PORT14_PDISC_PDIS0_Msk (0x1UL) /*!< PORT14 PDISC: PDIS0 (Bitfield-Mask: 0x01) */ +#define PORT14_PDISC_PDIS1_Pos (1UL) /*!< PORT14 PDISC: PDIS1 (Bit 1) */ +#define PORT14_PDISC_PDIS1_Msk (0x2UL) /*!< PORT14 PDISC: PDIS1 (Bitfield-Mask: 0x01) */ +#define PORT14_PDISC_PDIS2_Pos (2UL) /*!< PORT14 PDISC: PDIS2 (Bit 2) */ +#define PORT14_PDISC_PDIS2_Msk (0x4UL) /*!< PORT14 PDISC: PDIS2 (Bitfield-Mask: 0x01) */ +#define PORT14_PDISC_PDIS3_Pos (3UL) /*!< PORT14 PDISC: PDIS3 (Bit 3) */ +#define PORT14_PDISC_PDIS3_Msk (0x8UL) /*!< PORT14 PDISC: PDIS3 (Bitfield-Mask: 0x01) */ +#define PORT14_PDISC_PDIS4_Pos (4UL) /*!< PORT14 PDISC: PDIS4 (Bit 4) */ +#define PORT14_PDISC_PDIS4_Msk (0x10UL) /*!< PORT14 PDISC: PDIS4 (Bitfield-Mask: 0x01) */ +#define PORT14_PDISC_PDIS5_Pos (5UL) /*!< PORT14 PDISC: PDIS5 (Bit 5) */ +#define PORT14_PDISC_PDIS5_Msk (0x20UL) /*!< PORT14 PDISC: PDIS5 (Bitfield-Mask: 0x01) */ +#define PORT14_PDISC_PDIS6_Pos (6UL) /*!< PORT14 PDISC: PDIS6 (Bit 6) */ +#define PORT14_PDISC_PDIS6_Msk (0x40UL) /*!< PORT14 PDISC: PDIS6 (Bitfield-Mask: 0x01) */ +#define PORT14_PDISC_PDIS7_Pos (7UL) /*!< PORT14 PDISC: PDIS7 (Bit 7) */ +#define PORT14_PDISC_PDIS7_Msk (0x80UL) /*!< PORT14 PDISC: PDIS7 (Bitfield-Mask: 0x01) */ +#define PORT14_PDISC_PDIS8_Pos (8UL) /*!< PORT14 PDISC: PDIS8 (Bit 8) */ +#define PORT14_PDISC_PDIS8_Msk (0x100UL) /*!< PORT14 PDISC: PDIS8 (Bitfield-Mask: 0x01) */ +#define PORT14_PDISC_PDIS9_Pos (9UL) /*!< PORT14 PDISC: PDIS9 (Bit 9) */ +#define PORT14_PDISC_PDIS9_Msk (0x200UL) /*!< PORT14 PDISC: PDIS9 (Bitfield-Mask: 0x01) */ +#define PORT14_PDISC_PDIS10_Pos (10UL) /*!< PORT14 PDISC: PDIS10 (Bit 10) */ +#define PORT14_PDISC_PDIS10_Msk (0x400UL) /*!< PORT14 PDISC: PDIS10 (Bitfield-Mask: 0x01) */ +#define PORT14_PDISC_PDIS11_Pos (11UL) /*!< PORT14 PDISC: PDIS11 (Bit 11) */ +#define PORT14_PDISC_PDIS11_Msk (0x800UL) /*!< PORT14 PDISC: PDIS11 (Bitfield-Mask: 0x01) */ +#define PORT14_PDISC_PDIS12_Pos (12UL) /*!< PORT14 PDISC: PDIS12 (Bit 12) */ +#define PORT14_PDISC_PDIS12_Msk (0x1000UL) /*!< PORT14 PDISC: PDIS12 (Bitfield-Mask: 0x01) */ +#define PORT14_PDISC_PDIS13_Pos (13UL) /*!< PORT14 PDISC: PDIS13 (Bit 13) */ +#define PORT14_PDISC_PDIS13_Msk (0x2000UL) /*!< PORT14 PDISC: PDIS13 (Bitfield-Mask: 0x01) */ +#define PORT14_PDISC_PDIS14_Pos (14UL) /*!< PORT14 PDISC: PDIS14 (Bit 14) */ +#define PORT14_PDISC_PDIS14_Msk (0x4000UL) /*!< PORT14 PDISC: PDIS14 (Bitfield-Mask: 0x01) */ +#define PORT14_PDISC_PDIS15_Pos (15UL) /*!< PORT14 PDISC: PDIS15 (Bit 15) */ +#define PORT14_PDISC_PDIS15_Msk (0x8000UL) /*!< PORT14 PDISC: PDIS15 (Bitfield-Mask: 0x01) */ + +/* --------------------------------- PORT14_PPS --------------------------------- */ +#define PORT14_PPS_PPS0_Pos (0UL) /*!< PORT14 PPS: PPS0 (Bit 0) */ +#define PORT14_PPS_PPS0_Msk (0x1UL) /*!< PORT14 PPS: PPS0 (Bitfield-Mask: 0x01) */ +#define PORT14_PPS_PPS1_Pos (1UL) /*!< PORT14 PPS: PPS1 (Bit 1) */ +#define PORT14_PPS_PPS1_Msk (0x2UL) /*!< PORT14 PPS: PPS1 (Bitfield-Mask: 0x01) */ +#define PORT14_PPS_PPS2_Pos (2UL) /*!< PORT14 PPS: PPS2 (Bit 2) */ +#define PORT14_PPS_PPS2_Msk (0x4UL) /*!< PORT14 PPS: PPS2 (Bitfield-Mask: 0x01) */ +#define PORT14_PPS_PPS3_Pos (3UL) /*!< PORT14 PPS: PPS3 (Bit 3) */ +#define PORT14_PPS_PPS3_Msk (0x8UL) /*!< PORT14 PPS: PPS3 (Bitfield-Mask: 0x01) */ +#define PORT14_PPS_PPS4_Pos (4UL) /*!< PORT14 PPS: PPS4 (Bit 4) */ +#define PORT14_PPS_PPS4_Msk (0x10UL) /*!< PORT14 PPS: PPS4 (Bitfield-Mask: 0x01) */ +#define PORT14_PPS_PPS5_Pos (5UL) /*!< PORT14 PPS: PPS5 (Bit 5) */ +#define PORT14_PPS_PPS5_Msk (0x20UL) /*!< PORT14 PPS: PPS5 (Bitfield-Mask: 0x01) */ +#define PORT14_PPS_PPS6_Pos (6UL) /*!< PORT14 PPS: PPS6 (Bit 6) */ +#define PORT14_PPS_PPS6_Msk (0x40UL) /*!< PORT14 PPS: PPS6 (Bitfield-Mask: 0x01) */ +#define PORT14_PPS_PPS7_Pos (7UL) /*!< PORT14 PPS: PPS7 (Bit 7) */ +#define PORT14_PPS_PPS7_Msk (0x80UL) /*!< PORT14 PPS: PPS7 (Bitfield-Mask: 0x01) */ +#define PORT14_PPS_PPS8_Pos (8UL) /*!< PORT14 PPS: PPS8 (Bit 8) */ +#define PORT14_PPS_PPS8_Msk (0x100UL) /*!< PORT14 PPS: PPS8 (Bitfield-Mask: 0x01) */ +#define PORT14_PPS_PPS9_Pos (9UL) /*!< PORT14 PPS: PPS9 (Bit 9) */ +#define PORT14_PPS_PPS9_Msk (0x200UL) /*!< PORT14 PPS: PPS9 (Bitfield-Mask: 0x01) */ +#define PORT14_PPS_PPS10_Pos (10UL) /*!< PORT14 PPS: PPS10 (Bit 10) */ +#define PORT14_PPS_PPS10_Msk (0x400UL) /*!< PORT14 PPS: PPS10 (Bitfield-Mask: 0x01) */ +#define PORT14_PPS_PPS11_Pos (11UL) /*!< PORT14 PPS: PPS11 (Bit 11) */ +#define PORT14_PPS_PPS11_Msk (0x800UL) /*!< PORT14 PPS: PPS11 (Bitfield-Mask: 0x01) */ +#define PORT14_PPS_PPS12_Pos (12UL) /*!< PORT14 PPS: PPS12 (Bit 12) */ +#define PORT14_PPS_PPS12_Msk (0x1000UL) /*!< PORT14 PPS: PPS12 (Bitfield-Mask: 0x01) */ +#define PORT14_PPS_PPS13_Pos (13UL) /*!< PORT14 PPS: PPS13 (Bit 13) */ +#define PORT14_PPS_PPS13_Msk (0x2000UL) /*!< PORT14 PPS: PPS13 (Bitfield-Mask: 0x01) */ +#define PORT14_PPS_PPS14_Pos (14UL) /*!< PORT14 PPS: PPS14 (Bit 14) */ +#define PORT14_PPS_PPS14_Msk (0x4000UL) /*!< PORT14 PPS: PPS14 (Bitfield-Mask: 0x01) */ +#define PORT14_PPS_PPS15_Pos (15UL) /*!< PORT14 PPS: PPS15 (Bit 15) */ +#define PORT14_PPS_PPS15_Msk (0x8000UL) /*!< PORT14 PPS: PPS15 (Bitfield-Mask: 0x01) */ + +/* -------------------------------- PORT14_HWSEL -------------------------------- */ +#define PORT14_HWSEL_HW0_Pos (0UL) /*!< PORT14 HWSEL: HW0 (Bit 0) */ +#define PORT14_HWSEL_HW0_Msk (0x3UL) /*!< PORT14 HWSEL: HW0 (Bitfield-Mask: 0x03) */ +#define PORT14_HWSEL_HW1_Pos (2UL) /*!< PORT14 HWSEL: HW1 (Bit 2) */ +#define PORT14_HWSEL_HW1_Msk (0xcUL) /*!< PORT14 HWSEL: HW1 (Bitfield-Mask: 0x03) */ +#define PORT14_HWSEL_HW2_Pos (4UL) /*!< PORT14 HWSEL: HW2 (Bit 4) */ +#define PORT14_HWSEL_HW2_Msk (0x30UL) /*!< PORT14 HWSEL: HW2 (Bitfield-Mask: 0x03) */ +#define PORT14_HWSEL_HW3_Pos (6UL) /*!< PORT14 HWSEL: HW3 (Bit 6) */ +#define PORT14_HWSEL_HW3_Msk (0xc0UL) /*!< PORT14 HWSEL: HW3 (Bitfield-Mask: 0x03) */ +#define PORT14_HWSEL_HW4_Pos (8UL) /*!< PORT14 HWSEL: HW4 (Bit 8) */ +#define PORT14_HWSEL_HW4_Msk (0x300UL) /*!< PORT14 HWSEL: HW4 (Bitfield-Mask: 0x03) */ +#define PORT14_HWSEL_HW5_Pos (10UL) /*!< PORT14 HWSEL: HW5 (Bit 10) */ +#define PORT14_HWSEL_HW5_Msk (0xc00UL) /*!< PORT14 HWSEL: HW5 (Bitfield-Mask: 0x03) */ +#define PORT14_HWSEL_HW6_Pos (12UL) /*!< PORT14 HWSEL: HW6 (Bit 12) */ +#define PORT14_HWSEL_HW6_Msk (0x3000UL) /*!< PORT14 HWSEL: HW6 (Bitfield-Mask: 0x03) */ +#define PORT14_HWSEL_HW7_Pos (14UL) /*!< PORT14 HWSEL: HW7 (Bit 14) */ +#define PORT14_HWSEL_HW7_Msk (0xc000UL) /*!< PORT14 HWSEL: HW7 (Bitfield-Mask: 0x03) */ +#define PORT14_HWSEL_HW8_Pos (16UL) /*!< PORT14 HWSEL: HW8 (Bit 16) */ +#define PORT14_HWSEL_HW8_Msk (0x30000UL) /*!< PORT14 HWSEL: HW8 (Bitfield-Mask: 0x03) */ +#define PORT14_HWSEL_HW9_Pos (18UL) /*!< PORT14 HWSEL: HW9 (Bit 18) */ +#define PORT14_HWSEL_HW9_Msk (0xc0000UL) /*!< PORT14 HWSEL: HW9 (Bitfield-Mask: 0x03) */ +#define PORT14_HWSEL_HW10_Pos (20UL) /*!< PORT14 HWSEL: HW10 (Bit 20) */ +#define PORT14_HWSEL_HW10_Msk (0x300000UL) /*!< PORT14 HWSEL: HW10 (Bitfield-Mask: 0x03) */ +#define PORT14_HWSEL_HW11_Pos (22UL) /*!< PORT14 HWSEL: HW11 (Bit 22) */ +#define PORT14_HWSEL_HW11_Msk (0xc00000UL) /*!< PORT14 HWSEL: HW11 (Bitfield-Mask: 0x03) */ +#define PORT14_HWSEL_HW12_Pos (24UL) /*!< PORT14 HWSEL: HW12 (Bit 24) */ +#define PORT14_HWSEL_HW12_Msk (0x3000000UL) /*!< PORT14 HWSEL: HW12 (Bitfield-Mask: 0x03) */ +#define PORT14_HWSEL_HW13_Pos (26UL) /*!< PORT14 HWSEL: HW13 (Bit 26) */ +#define PORT14_HWSEL_HW13_Msk (0xc000000UL) /*!< PORT14 HWSEL: HW13 (Bitfield-Mask: 0x03) */ +#define PORT14_HWSEL_HW14_Pos (28UL) /*!< PORT14 HWSEL: HW14 (Bit 28) */ +#define PORT14_HWSEL_HW14_Msk (0x30000000UL) /*!< PORT14 HWSEL: HW14 (Bitfield-Mask: 0x03) */ +#define PORT14_HWSEL_HW15_Pos (30UL) /*!< PORT14 HWSEL: HW15 (Bit 30) */ +#define PORT14_HWSEL_HW15_Msk (0xc0000000UL) /*!< PORT14 HWSEL: HW15 (Bitfield-Mask: 0x03) */ + + + +/* ================================================================================ */ +/* ================ Peripheral memory map ================ */ +/* ================================================================================ */ + +#define PPB_BASE 0xE000E000UL +#define DLR_BASE 0x50004900UL +#define ERU0_BASE 0x50004800UL +#define ERU1_BASE 0x40044000UL +#define GPDMA0_BASE 0x500142C0UL +#define GPDMA0_CH0_BASE 0x50014000UL +#define GPDMA0_CH1_BASE 0x50014058UL +#define GPDMA0_CH2_BASE 0x500140B0UL +#define GPDMA0_CH3_BASE 0x50014108UL +#define GPDMA0_CH4_BASE 0x50014160UL +#define GPDMA0_CH5_BASE 0x500141B8UL +#define GPDMA0_CH6_BASE 0x50014210UL +#define GPDMA0_CH7_BASE 0x50014268UL +#define FCE_BASE 0x50020000UL +#define FCE_KE0_BASE 0x50020020UL +#define FCE_KE1_BASE 0x50020040UL +#define FCE_KE2_BASE 0x50020060UL +#define FCE_KE3_BASE 0x50020080UL +#define PBA0_BASE 0x40000000UL +#define PBA1_BASE 0x48000000UL +#define FLASH0_BASE 0x58001000UL +#define PREF_BASE 0x58004000UL +#define PMU0_BASE 0x58000508UL +#define WDT_BASE 0x50008000UL +#define RTC_BASE 0x50004A00UL +#define SCU_CLK_BASE 0x50004600UL +#define SCU_OSC_BASE 0x50004700UL +#define SCU_PLL_BASE 0x50004710UL +#define SCU_GENERAL_BASE 0x50004000UL +#define SCU_INTERRUPT_BASE 0x50004074UL +#define SCU_PARITY_BASE 0x5000413CUL +#define SCU_TRAP_BASE 0x50004160UL +#define SCU_HIBERNATE_BASE 0x50004300UL +#define SCU_POWER_BASE 0x50004200UL +#define SCU_RESET_BASE 0x50004400UL +#define LEDTS0_BASE 0x48010000UL +#define USB0_BASE 0x50040000UL +#define USB_EP_BASE 0x50040900UL +#define USB0_EP1_BASE 0x50040920UL +#define USB0_EP2_BASE 0x50040940UL +#define USB0_EP3_BASE 0x50040960UL +#define USB0_EP4_BASE 0x50040980UL +#define USB0_EP5_BASE 0x500409A0UL +#define USB0_EP6_BASE 0x500409C0UL +#define USIC0_BASE 0x40030008UL +#define USIC1_BASE 0x48020008UL +#define USIC0_CH0_BASE 0x40030000UL +#define USIC0_CH1_BASE 0x40030200UL +#define USIC1_CH0_BASE 0x48020000UL +#define USIC1_CH1_BASE 0x48020200UL +#define CAN_BASE 0x48014000UL +#define CAN_NODE0_BASE 0x48014200UL +#define CAN_NODE1_BASE 0x48014300UL +#define CAN_MO0_BASE 0x48015000UL +#define CAN_MO1_BASE 0x48015020UL +#define CAN_MO2_BASE 0x48015040UL +#define CAN_MO3_BASE 0x48015060UL +#define CAN_MO4_BASE 0x48015080UL +#define CAN_MO5_BASE 0x480150A0UL +#define CAN_MO6_BASE 0x480150C0UL +#define CAN_MO7_BASE 0x480150E0UL +#define CAN_MO8_BASE 0x48015100UL +#define CAN_MO9_BASE 0x48015120UL +#define CAN_MO10_BASE 0x48015140UL +#define CAN_MO11_BASE 0x48015160UL +#define CAN_MO12_BASE 0x48015180UL +#define CAN_MO13_BASE 0x480151A0UL +#define CAN_MO14_BASE 0x480151C0UL +#define CAN_MO15_BASE 0x480151E0UL +#define CAN_MO16_BASE 0x48015200UL +#define CAN_MO17_BASE 0x48015220UL +#define CAN_MO18_BASE 0x48015240UL +#define CAN_MO19_BASE 0x48015260UL +#define CAN_MO20_BASE 0x48015280UL +#define CAN_MO21_BASE 0x480152A0UL +#define CAN_MO22_BASE 0x480152C0UL +#define CAN_MO23_BASE 0x480152E0UL +#define CAN_MO24_BASE 0x48015300UL +#define CAN_MO25_BASE 0x48015320UL +#define CAN_MO26_BASE 0x48015340UL +#define CAN_MO27_BASE 0x48015360UL +#define CAN_MO28_BASE 0x48015380UL +#define CAN_MO29_BASE 0x480153A0UL +#define CAN_MO30_BASE 0x480153C0UL +#define CAN_MO31_BASE 0x480153E0UL +#define CAN_MO32_BASE 0x48015400UL +#define CAN_MO33_BASE 0x48015420UL +#define CAN_MO34_BASE 0x48015440UL +#define CAN_MO35_BASE 0x48015460UL +#define CAN_MO36_BASE 0x48015480UL +#define CAN_MO37_BASE 0x480154A0UL +#define CAN_MO38_BASE 0x480154C0UL +#define CAN_MO39_BASE 0x480154E0UL +#define CAN_MO40_BASE 0x48015500UL +#define CAN_MO41_BASE 0x48015520UL +#define CAN_MO42_BASE 0x48015540UL +#define CAN_MO43_BASE 0x48015560UL +#define CAN_MO44_BASE 0x48015580UL +#define CAN_MO45_BASE 0x480155A0UL +#define CAN_MO46_BASE 0x480155C0UL +#define CAN_MO47_BASE 0x480155E0UL +#define CAN_MO48_BASE 0x48015600UL +#define CAN_MO49_BASE 0x48015620UL +#define CAN_MO50_BASE 0x48015640UL +#define CAN_MO51_BASE 0x48015660UL +#define CAN_MO52_BASE 0x48015680UL +#define CAN_MO53_BASE 0x480156A0UL +#define CAN_MO54_BASE 0x480156C0UL +#define CAN_MO55_BASE 0x480156E0UL +#define CAN_MO56_BASE 0x48015700UL +#define CAN_MO57_BASE 0x48015720UL +#define CAN_MO58_BASE 0x48015740UL +#define CAN_MO59_BASE 0x48015760UL +#define CAN_MO60_BASE 0x48015780UL +#define CAN_MO61_BASE 0x480157A0UL +#define CAN_MO62_BASE 0x480157C0UL +#define CAN_MO63_BASE 0x480157E0UL +#define VADC_BASE 0x40004000UL +#define VADC_G0_BASE 0x40004400UL +#define VADC_G1_BASE 0x40004800UL +#define DAC_BASE 0x48018000UL +#define CCU40_BASE 0x4000C000UL +#define CCU41_BASE 0x40010000UL +#define CCU40_CC40_BASE 0x4000C100UL +#define CCU40_CC41_BASE 0x4000C200UL +#define CCU40_CC42_BASE 0x4000C300UL +#define CCU40_CC43_BASE 0x4000C400UL +#define CCU41_CC40_BASE 0x40010100UL +#define CCU41_CC41_BASE 0x40010200UL +#define CCU41_CC42_BASE 0x40010300UL +#define CCU41_CC43_BASE 0x40010400UL +#define CCU80_BASE 0x40020000UL +#define CCU80_CC80_BASE 0x40020100UL +#define CCU80_CC81_BASE 0x40020200UL +#define CCU80_CC82_BASE 0x40020300UL +#define CCU80_CC83_BASE 0x40020400UL +#define HRPWM0_BASE 0x40020900UL +#define HRPWM0_CSG0_BASE 0x40020A00UL +#define HRPWM0_CSG1_BASE 0x40020B00UL +#define HRPWM0_CSG2_BASE 0x40020C00UL +#define HRPWM0_HRC0_BASE 0x40021300UL +#define HRPWM0_HRC1_BASE 0x40021400UL +#define HRPWM0_HRC2_BASE 0x40021500UL +#define HRPWM0_HRC3_BASE 0x40021600UL +#define POSIF0_BASE 0x40028000UL +#define PORT0_BASE 0x48028000UL +#define PORT1_BASE 0x48028100UL +#define PORT2_BASE 0x48028200UL +#define PORT3_BASE 0x48028300UL +#define PORT14_BASE 0x48028E00UL + + +/* ================================================================================ */ +/* ================ Peripheral declaration ================ */ +/* ================================================================================ */ + +#define PPB ((PPB_Type *) PPB_BASE) +#define DLR ((DLR_GLOBAL_TypeDef *) DLR_BASE) +#define ERU0 ((ERU_GLOBAL_TypeDef *) ERU0_BASE) +#define ERU1 ((ERU_GLOBAL_TypeDef *) ERU1_BASE) +#define GPDMA0 ((GPDMA0_GLOBAL_TypeDef *) GPDMA0_BASE) +#define GPDMA0_CH0 ((GPDMA0_CH_TypeDef *) GPDMA0_CH0_BASE) +#define GPDMA0_CH1 ((GPDMA0_CH_TypeDef *) GPDMA0_CH1_BASE) +#define GPDMA0_CH2 ((GPDMA0_CH_TypeDef *) GPDMA0_CH2_BASE) +#define GPDMA0_CH3 ((GPDMA0_CH_TypeDef *) GPDMA0_CH3_BASE) +#define GPDMA0_CH4 ((GPDMA0_CH_TypeDef *) GPDMA0_CH4_BASE) +#define GPDMA0_CH5 ((GPDMA0_CH_TypeDef *) GPDMA0_CH5_BASE) +#define GPDMA0_CH6 ((GPDMA0_CH_TypeDef *) GPDMA0_CH6_BASE) +#define GPDMA0_CH7 ((GPDMA0_CH_TypeDef *) GPDMA0_CH7_BASE) +#define FCE ((FCE_GLOBAL_TypeDef *) FCE_BASE) +#define FCE_KE0 ((FCE_KE_TypeDef *) FCE_KE0_BASE) +#define FCE_KE1 ((FCE_KE_TypeDef *) FCE_KE1_BASE) +#define FCE_KE2 ((FCE_KE_TypeDef *) FCE_KE2_BASE) +#define FCE_KE3 ((FCE_KE_TypeDef *) FCE_KE3_BASE) +#define PBA0 ((PBA_GLOBAL_TypeDef *) PBA0_BASE) +#define PBA1 ((PBA_GLOBAL_TypeDef *) PBA1_BASE) +#define FLASH0 ((FLASH0_GLOBAL_TypeDef *) FLASH0_BASE) +#define PREF ((PREF_GLOBAL_TypeDef *) PREF_BASE) +#define PMU0 ((PMU0_GLOBAL_TypeDef *) PMU0_BASE) +#define WDT ((WDT_GLOBAL_TypeDef *) WDT_BASE) +#define RTC ((RTC_GLOBAL_TypeDef *) RTC_BASE) +#define SCU_CLK ((SCU_CLK_TypeDef *) SCU_CLK_BASE) +#define SCU_OSC ((SCU_OSC_TypeDef *) SCU_OSC_BASE) +#define SCU_PLL ((SCU_PLL_TypeDef *) SCU_PLL_BASE) +#define SCU_GENERAL ((SCU_GENERAL_TypeDef *) SCU_GENERAL_BASE) +#define SCU_INTERRUPT ((SCU_INTERRUPT_TypeDef *) SCU_INTERRUPT_BASE) +#define SCU_PARITY ((SCU_PARITY_TypeDef *) SCU_PARITY_BASE) +#define SCU_TRAP ((SCU_TRAP_TypeDef *) SCU_TRAP_BASE) +#define SCU_HIBERNATE ((SCU_HIBERNATE_TypeDef *) SCU_HIBERNATE_BASE) +#define SCU_POWER ((SCU_POWER_TypeDef *) SCU_POWER_BASE) +#define SCU_RESET ((SCU_RESET_TypeDef *) SCU_RESET_BASE) +#define LEDTS0 ((LEDTS0_GLOBAL_TypeDef *) LEDTS0_BASE) +#define USB0 ((USB0_GLOBAL_TypeDef *) USB0_BASE) +#define USB0_EP0 ((USB0_EP0_TypeDef *) USB_EP_BASE) +#define USB0_EP1 ((USB0_EP_TypeDef *) USB0_EP1_BASE) +#define USB0_EP2 ((USB0_EP_TypeDef *) USB0_EP2_BASE) +#define USB0_EP3 ((USB0_EP_TypeDef *) USB0_EP3_BASE) +#define USB0_EP4 ((USB0_EP_TypeDef *) USB0_EP4_BASE) +#define USB0_EP5 ((USB0_EP_TypeDef *) USB0_EP5_BASE) +#define USB0_EP6 ((USB0_EP_TypeDef *) USB0_EP6_BASE) +#define USIC0 ((USIC_GLOBAL_TypeDef *) USIC0_BASE) +#define USIC1 ((USIC_GLOBAL_TypeDef *) USIC1_BASE) +#define USIC0_CH0 ((USIC_CH_TypeDef *) USIC0_CH0_BASE) +#define USIC0_CH1 ((USIC_CH_TypeDef *) USIC0_CH1_BASE) +#define USIC1_CH0 ((USIC_CH_TypeDef *) USIC1_CH0_BASE) +#define USIC1_CH1 ((USIC_CH_TypeDef *) USIC1_CH1_BASE) +#define CAN ((CAN_GLOBAL_TypeDef *) CAN_BASE) +#define CAN_NODE0 ((CAN_NODE_TypeDef *) CAN_NODE0_BASE) +#define CAN_NODE1 ((CAN_NODE_TypeDef *) CAN_NODE1_BASE) +#define CAN_MO0 ((CAN_MO_TypeDef *) CAN_MO0_BASE) +#define CAN_MO1 ((CAN_MO_TypeDef *) CAN_MO1_BASE) +#define CAN_MO2 ((CAN_MO_TypeDef *) CAN_MO2_BASE) +#define CAN_MO3 ((CAN_MO_TypeDef *) CAN_MO3_BASE) +#define CAN_MO4 ((CAN_MO_TypeDef *) CAN_MO4_BASE) +#define CAN_MO5 ((CAN_MO_TypeDef *) CAN_MO5_BASE) +#define CAN_MO6 ((CAN_MO_TypeDef *) CAN_MO6_BASE) +#define CAN_MO7 ((CAN_MO_TypeDef *) CAN_MO7_BASE) +#define CAN_MO8 ((CAN_MO_TypeDef *) CAN_MO8_BASE) +#define CAN_MO9 ((CAN_MO_TypeDef *) CAN_MO9_BASE) +#define CAN_MO10 ((CAN_MO_TypeDef *) CAN_MO10_BASE) +#define CAN_MO11 ((CAN_MO_TypeDef *) CAN_MO11_BASE) +#define CAN_MO12 ((CAN_MO_TypeDef *) CAN_MO12_BASE) +#define CAN_MO13 ((CAN_MO_TypeDef *) CAN_MO13_BASE) +#define CAN_MO14 ((CAN_MO_TypeDef *) CAN_MO14_BASE) +#define CAN_MO15 ((CAN_MO_TypeDef *) CAN_MO15_BASE) +#define CAN_MO16 ((CAN_MO_TypeDef *) CAN_MO16_BASE) +#define CAN_MO17 ((CAN_MO_TypeDef *) CAN_MO17_BASE) +#define CAN_MO18 ((CAN_MO_TypeDef *) CAN_MO18_BASE) +#define CAN_MO19 ((CAN_MO_TypeDef *) CAN_MO19_BASE) +#define CAN_MO20 ((CAN_MO_TypeDef *) CAN_MO20_BASE) +#define CAN_MO21 ((CAN_MO_TypeDef *) CAN_MO21_BASE) +#define CAN_MO22 ((CAN_MO_TypeDef *) CAN_MO22_BASE) +#define CAN_MO23 ((CAN_MO_TypeDef *) CAN_MO23_BASE) +#define CAN_MO24 ((CAN_MO_TypeDef *) CAN_MO24_BASE) +#define CAN_MO25 ((CAN_MO_TypeDef *) CAN_MO25_BASE) +#define CAN_MO26 ((CAN_MO_TypeDef *) CAN_MO26_BASE) +#define CAN_MO27 ((CAN_MO_TypeDef *) CAN_MO27_BASE) +#define CAN_MO28 ((CAN_MO_TypeDef *) CAN_MO28_BASE) +#define CAN_MO29 ((CAN_MO_TypeDef *) CAN_MO29_BASE) +#define CAN_MO30 ((CAN_MO_TypeDef *) CAN_MO30_BASE) +#define CAN_MO31 ((CAN_MO_TypeDef *) CAN_MO31_BASE) +#define CAN_MO32 ((CAN_MO_TypeDef *) CAN_MO32_BASE) +#define CAN_MO33 ((CAN_MO_TypeDef *) CAN_MO33_BASE) +#define CAN_MO34 ((CAN_MO_TypeDef *) CAN_MO34_BASE) +#define CAN_MO35 ((CAN_MO_TypeDef *) CAN_MO35_BASE) +#define CAN_MO36 ((CAN_MO_TypeDef *) CAN_MO36_BASE) +#define CAN_MO37 ((CAN_MO_TypeDef *) CAN_MO37_BASE) +#define CAN_MO38 ((CAN_MO_TypeDef *) CAN_MO38_BASE) +#define CAN_MO39 ((CAN_MO_TypeDef *) CAN_MO39_BASE) +#define CAN_MO40 ((CAN_MO_TypeDef *) CAN_MO40_BASE) +#define CAN_MO41 ((CAN_MO_TypeDef *) CAN_MO41_BASE) +#define CAN_MO42 ((CAN_MO_TypeDef *) CAN_MO42_BASE) +#define CAN_MO43 ((CAN_MO_TypeDef *) CAN_MO43_BASE) +#define CAN_MO44 ((CAN_MO_TypeDef *) CAN_MO44_BASE) +#define CAN_MO45 ((CAN_MO_TypeDef *) CAN_MO45_BASE) +#define CAN_MO46 ((CAN_MO_TypeDef *) CAN_MO46_BASE) +#define CAN_MO47 ((CAN_MO_TypeDef *) CAN_MO47_BASE) +#define CAN_MO48 ((CAN_MO_TypeDef *) CAN_MO48_BASE) +#define CAN_MO49 ((CAN_MO_TypeDef *) CAN_MO49_BASE) +#define CAN_MO50 ((CAN_MO_TypeDef *) CAN_MO50_BASE) +#define CAN_MO51 ((CAN_MO_TypeDef *) CAN_MO51_BASE) +#define CAN_MO52 ((CAN_MO_TypeDef *) CAN_MO52_BASE) +#define CAN_MO53 ((CAN_MO_TypeDef *) CAN_MO53_BASE) +#define CAN_MO54 ((CAN_MO_TypeDef *) CAN_MO54_BASE) +#define CAN_MO55 ((CAN_MO_TypeDef *) CAN_MO55_BASE) +#define CAN_MO56 ((CAN_MO_TypeDef *) CAN_MO56_BASE) +#define CAN_MO57 ((CAN_MO_TypeDef *) CAN_MO57_BASE) +#define CAN_MO58 ((CAN_MO_TypeDef *) CAN_MO58_BASE) +#define CAN_MO59 ((CAN_MO_TypeDef *) CAN_MO59_BASE) +#define CAN_MO60 ((CAN_MO_TypeDef *) CAN_MO60_BASE) +#define CAN_MO61 ((CAN_MO_TypeDef *) CAN_MO61_BASE) +#define CAN_MO62 ((CAN_MO_TypeDef *) CAN_MO62_BASE) +#define CAN_MO63 ((CAN_MO_TypeDef *) CAN_MO63_BASE) +#define VADC ((VADC_GLOBAL_TypeDef *) VADC_BASE) +#define VADC_G0 ((VADC_G_TypeDef *) VADC_G0_BASE) +#define VADC_G1 ((VADC_G_TypeDef *) VADC_G1_BASE) +#define DAC ((DAC_GLOBAL_TypeDef *) DAC_BASE) +#define CCU40 ((CCU4_GLOBAL_TypeDef *) CCU40_BASE) +#define CCU41 ((CCU4_GLOBAL_TypeDef *) CCU41_BASE) +#define CCU40_CC40 ((CCU4_CC4_TypeDef *) CCU40_CC40_BASE) +#define CCU40_CC41 ((CCU4_CC4_TypeDef *) CCU40_CC41_BASE) +#define CCU40_CC42 ((CCU4_CC4_TypeDef *) CCU40_CC42_BASE) +#define CCU40_CC43 ((CCU4_CC4_TypeDef *) CCU40_CC43_BASE) +#define CCU41_CC40 ((CCU4_CC4_TypeDef *) CCU41_CC40_BASE) +#define CCU41_CC41 ((CCU4_CC4_TypeDef *) CCU41_CC41_BASE) +#define CCU41_CC42 ((CCU4_CC4_TypeDef *) CCU41_CC42_BASE) +#define CCU41_CC43 ((CCU4_CC4_TypeDef *) CCU41_CC43_BASE) +#define CCU80 ((CCU8_GLOBAL_TypeDef *) CCU80_BASE) +#define CCU80_CC80 ((CCU8_CC8_TypeDef *) CCU80_CC80_BASE) +#define CCU80_CC81 ((CCU8_CC8_TypeDef *) CCU80_CC81_BASE) +#define CCU80_CC82 ((CCU8_CC8_TypeDef *) CCU80_CC82_BASE) +#define CCU80_CC83 ((CCU8_CC8_TypeDef *) CCU80_CC83_BASE) +#define HRPWM0 ((HRPWM0_Type *) HRPWM0_BASE) +#define HRPWM0_CSG0 ((HRPWM0_CSG_Type *) HRPWM0_CSG0_BASE) +#define HRPWM0_CSG1 ((HRPWM0_CSG_Type *) HRPWM0_CSG1_BASE) +#define HRPWM0_CSG2 ((HRPWM0_CSG_Type *) HRPWM0_CSG2_BASE) +#define HRPWM0_HRC0 ((HRPWM0_HRC_Type *) HRPWM0_HRC0_BASE) +#define HRPWM0_HRC1 ((HRPWM0_HRC_Type *) HRPWM0_HRC1_BASE) +#define HRPWM0_HRC2 ((HRPWM0_HRC_Type *) HRPWM0_HRC2_BASE) +#define HRPWM0_HRC3 ((HRPWM0_HRC_Type *) HRPWM0_HRC3_BASE) +#define POSIF0 ((POSIF_GLOBAL_TypeDef *) POSIF0_BASE) +#define PORT0 ((PORT0_Type *) PORT0_BASE) +#define PORT1 ((PORT1_Type *) PORT1_BASE) +#define PORT2 ((PORT2_Type *) PORT2_BASE) +#define PORT3 ((PORT3_Type *) PORT3_BASE) +#define PORT14 ((PORT14_Type *) PORT14_BASE) + + +/** @} */ /* End of group Device_Peripheral_Registers */ +/** @} */ /* End of group XMC4200 */ +/** @} */ /* End of group Infineon */ + +#ifdef __cplusplus +} +#endif + + +#endif /* XMC4200_H */ + diff --git a/variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h b/variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h new file mode 100644 index 00000000..9fea51f7 --- /dev/null +++ b/variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h @@ -0,0 +1,447 @@ +/* + pins_arduino.h - Pin definition functions for Arduino + Part of Arduino - http://www.arduino.cc/ + + Copyright (c) 2007 David A. Mellis + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General + Public License along with this library; if not, write to the + Free Software Foundation, Inc., 59 Temple Place, Suite 330, + Boston, MA 02111-1307 USA + + Copyright (c) 2019 Infineon Technologies AG + This file has been modified for the XMC microcontroller series. +*/ +#ifndef PINS_ARDUINO_H_ +#define PINS_ARDUINO_H_ + +//**************************************************************************** +// @Project Includes +//**************************************************************************** +#include + +//**************************************************************************** +// @Defines +//**************************************************************************** +#define XMC_BOARD XMC 4200 Platform 2GO + +/* On board LED is ON when digital output is 0, LOW, False, OFF */ +#define XMC_LED_ON 0 + +// Following were defines now evaluated by compilation as const variables +// After definitions of associated mapping arrays +extern const uint8_t NUM_DIGITAL; +extern const uint8_t GND; +extern const uint8_t NUM_PWM4; +extern const uint8_t NUM_PWM8; +extern const uint8_t NUM_PWM; +extern const uint8_t NUM_INTERRUPT; +extern const uint8_t NUM_ANALOG_INPUTS; +#ifdef DAC +extern const uint8_t NUM_ANALOG_OUTPUTS; +#endif +#define NUM_LEDS 2 +#define NUM_BUTTONS 2 +#define NUM_SERIAL 1 +#define NUM_TONE_PINS 16 +#define NUM_TASKS_VARIANT 32 + +// Indicate unit has RTC/Alarm +#define HAS_RTC 1 + +#define PWM4_TIMER_PERIOD (0x11EF) //Generate 490Hz @fCCU=144MHz +#define PWM8_TIMER_PERIOD (0x11EF) // Generate 490Hz @fCCU=144MHz + +#define PCLK 64000000u + +#define PIN_SPI_SS 10 +#define PIN_SPI_MOSI 11 +#define PIN_SPI_MISO 12 +#define PIN_SPI_SCK 13 + +extern uint8_t SS; +extern uint8_t MOSI; +extern uint8_t MISO; +extern uint8_t SCK; + +#define A0 0 // ADC G0CH0 P14.0 +#define A1 1 // ADC G0CH1 P14.1 +#define A2 2 // ADC G0CH2 P14.2 +#define A3 3 // ADC G0CH3 P14.3 +#define A4 4 // ADC G0CH4 P14.4 +#define A5 5 // ADC G0CH5 P14.5 +//Additional ADC ports starting here +#define A6 6 // ADC G0CH6 on P14.6 +#define A7 7 // ADC G0CH7 on P14.7 +#define A8 8 // ADC G1CH4 on P14.12 +#define A9 9 // ADC G1CH5 on P14.13 +#define A10 10 // ADC G1CH6 on P14.14 +#define A11 11 // ADC G1CH7 on P14.15 +#define A12 12 // ADC G2CH2 on P15.2 +#define A13 13 // ADC G2CH3 on P15.3 +#define A14 14 // ADC G1CH0 on P14.8 +#define A15 15 // ADC G1CH1 on P14.9 +#define A16 16 // ADC G3CH0 on P15.8 +#define A17 17 // ADC G3CH1 on P15.9 + +#define LED1 82 // Additional LED1 +#define LED2 77 // Additional LED2 +#define LED_BUILTIN LED1 // Standard Arduino LED: Uses LED1 +#define BUTTON1 87 // Additional BUTTON1 +#define BUTTON2 69 // Additional BUTTON2 + +#define digitalPinToInterrupt(p) ((p) == 2 ? 0 : ((p) == 3 ? 1 : NOT_AN_INTERRUPT)) + +#ifdef ARDUINO_MAIN +// Mapping of digital pins and comments +const XMC_PORT_PIN_t mapping_port_pin[]= + { + /* 0 */ {XMC_GPIO_PORT2, 15}, // RX P2.15 + /* 1 */ {XMC_GPIO_PORT2, 14}, // TX P2.14 + /* 2 */ {XMC_GPIO_PORT1, 0}, // GPIO / External INT 0 P1.0 + /* 3 */ {XMC_GPIO_PORT3, 6}, // PWM42-0(PWM0)/ External INT 1 P3.6 + /* 4 */ {XMC_GPIO_PORT1, 6}, // GPIO P1.6 + /* 5 */ {XMC_GPIO_PORT3, 3}, // PWM42-3 output / PWM1 P3.3 + /* 6 */ {XMC_GPIO_PORT3, 4}, // PWM42-2 output / PWM2 P3.4 + /* 7 */ {XMC_GPIO_PORT1, 14}, // GPIO P1.14 + /* 8 */ {XMC_GPIO_PORT4, 1}, // GPIO P4.1 + /* 9 */ {XMC_GPIO_PORT0, 11}, // PWM80-31 output / PWM3 P0.11 + /* 10 */ {XMC_GPIO_PORT0, 2}, // SPI-SS / PWM80-01 / PWM4 P0.2 + /* 11 */ {XMC_GPIO_PORT1, 9}, // SPI-MOSI / PWM41-2 / PWM5 P1.9 + /* 12 */ {XMC_GPIO_PORT0, 0}, // SPI-MISO P0.0 + /* 13 */ {XMC_GPIO_PORT1, 8}, // SPI-SCK P1.8 + /* 14 */ {XMC_GPIO_PORT2, 3}, // AREF TODO: P2.3 + /* 15 */ {XMC_GPIO_PORT2, 5}, // I2C Data / Address SDA / A4 P2.5 (Hardwired to A4) + /* 16 */ {XMC_GPIO_PORT3, 0}, // I2C Clock SCL / A5 P3.0 (Hardwired to A5) + /* 17 */ {XMC_GPIO_PORT14, 0}, // A0 / ADC Input P14.0 (INPUT ONLY) + /* 18 */ {XMC_GPIO_PORT14, 1}, // A1 / ADC Input P14.1 (INPUT ONLY) + /* 19 */ {XMC_GPIO_PORT14, 2}, // A2 / ADC Input P14.2 (INPUT ONLY) + /* 20 */ {XMC_GPIO_PORT14, 3}, // A3 / ADC Input P14.3 (INPUT ONLY) + /* 21 */ {XMC_GPIO_PORT14, 4}, // A4 / ADC Input / SDA P14.4 (Hardwired to SDA) + /* 22 */ {XMC_GPIO_PORT14, 5}, // A5 / ADC Input / SCL P14.5 (Hardwired to SCL) + /* 23 */ {XMC_GPIO_PORT1, 15}, // USB Debug RX P1.15 + /* 24 */ {XMC_GPIO_PORT0, 5}, // USB Debug TX P0.5 + + //Additional pins for port X1 starting here + /* 25 */ {XMC_GPIO_PORT2, 10}, // GPIO / ETH_LED P2.10 + /* 26 */ {XMC_GPIO_PORT2, 8}, // GPIO / ETH_TXDO P2.8 + /* 27 */ {XMC_GPIO_PORT2, 4}, // GPIO / ETH_RXER P2.4 + /* 28 */ {XMC_GPIO_PORT2, 2}, // GPIO / ETH_RXDO P2.2 + /* 29 */ {XMC_GPIO_PORT2, 0}, // GPIO / ETH_MDIO P2.0 + /* 30 */ {XMC_GPIO_PORT2, 6}, // PWM8 - / PWM / GPIO4_2GO_2 P2.6 + /* 31 */ {XMC_GPIO_PORT5, 2}, // GPIO / RST P5.2 + /* 32 */ {XMC_GPIO_PORT5, 0}, // GPIO1_2GO_1 P5.0 + /* 33 */ {XMC_GPIO_PORT1, 14}, // GPIO / IO_1 P1.14 + /* 34 */ {XMC_GPIO_PORT1, 12}, // GPIO / CAN_TX P1.12 + /* 35 */ {XMC_GPIO_PORT1, 10}, // GPIO / GPIO2_2GO_1 P1.10 + /* 36 */ {XMC_GPIO_PORT1, 4}, // GPIO / QSPI_IO1 P1.4 + /* 37 */ {XMC_GPIO_PORT1, 2}, // GPIO / QSPI_IO3 P1.2 + /* 38 */ {XMC_GPIO_PORT1, 0}, // GPIO / External INT 0 P1.0 + /* 39 */ {XMC_GPIO_PORT1, 8}, // GPIO / SPI-SCK P1.8 + /* 40 */ {XMC_GPIO_PORT1, 6}, // GPIO / IO_0 P1.6 + /* 41 */ {XMC_GPIO_PORT4, 0}, // GPIO / GPIO2_2GO_2 P1.0 + /* 42 */ {XMC_GPIO_PORT2, 14}, // UART TX P2.14 + /* 43 */ {XMC_GPIO_PORT2, 15}, // UART RX P2.15 + /* 44 */ {XMC_GPIO_PORT4, 1}, // GPIO / IO_2 P4.1. + /* 45 */ {XMC_GPIO_PORT1, 7}, // GPIO / SPI_CS_2GO_2 P1.7 (Chip Select - Slot 2) + /* 46 */ {XMC_GPIO_PORT1, 9}, // SPI-MOSI / PWM41-2 / PWM5 P1.9 + /* 47 */ {XMC_GPIO_PORT1, 1}, // GPIO1_2GO_2 P1.1 + /* 48 */ {XMC_GPIO_PORT1, 3}, // GPIO / QSPI_IO3 P1.3 + /* 49 */ {XMC_GPIO_PORT1, 5}, // GPIO / QSPI_IO0 P1.5 + /* 50 */ {XMC_GPIO_PORT1, 11}, // GPIO / QSPI_CS P1.11 + /* 51 */ {XMC_GPIO_PORT1, 13}, // GPIO / CAN_RX P1.13 + /* 52 */ {XMC_GPIO_PORT1, 15}, // USB Debug RX P1.15 + /* 53 */ {XMC_GPIO_PORT5, 1}, // GPIO / ETH_INT P5.1 + /* 54 */ {XMC_GPIO_PORT5, 7}, // PWM8 - / PWM P5.7 + /* 55 */ {XMC_GPIO_PORT2, 7}, // PWM8 - / PWM / ETH_MDC P2.7 + /* 56 */ {XMC_GPIO_PORT2, 1}, // SWV ""DEBUG Do NOT Use ** P2.1 + /* 57 */ {XMC_GPIO_PORT2, 3}, // AREF TODO: / ETH_RXD1 P2.3 + /* 58 */ {XMC_GPIO_PORT2, 5}, // I2C Data - SDA / A4 P2.5 (Hardwired to A4) + /* 59 */ {XMC_GPIO_PORT2, 9}, // PWM8 - / PWM / ETH_TXD1 P2.9 + /* 60 */ {XMC_GPIO_PORT15, 8}, // A16 / ETH_CLK P15.8 + + //Additional pins for port X2 starting here + /* 61 */ {XMC_GPIO_PORT14, 8}, // A14 / DAC 0 Output P14.8 + /* 62 */ {XMC_GPIO_PORT15, 2}, // A12 - ADC Input P15.2 (INPUT ONLY) + /* 63 */ {XMC_GPIO_PORT14, 15}, // A11 - ADC Input P14.15 (INPUT ONLY) + /* 64 */ {XMC_GPIO_PORT15, 9}, // A17 - ADC Input / ETH_CRS P15.9 + /* 65 */ {XMC_GPIO_PORT14, 6}, // A6 / AN1_2GO_1 - ADC Input P14.6 (INPUT ONLY) + /* 66 */ {XMC_GPIO_PORT14, 12}, // A8 / AN1_2GO_2 - ADC Input P14.12 (INPUT ONLY) + /* 67 */ {XMC_GPIO_PORT14, 14}, // A10 / ADC Input P14.14 (INPUT ONLY) + /* 68 */ {XMC_GPIO_PORT3, 0}, // I2C Clk SCL / A5 - ADC Input P3.0 (Hardwired to A5) + /* 69 */ {XMC_GPIO_PORT3, 2}, // BUTTON2 P3.2 + /* 70 */ {XMC_GPIO_PORT0, 10}, // INT / GPIO3_2GO_1 P0.10 + /* 71 */ {XMC_GPIO_PORT0, 1}, // INT P0.1 + /* 72 */ {XMC_GPIO_PORT0, 3}, // INT / GPIO3_2GO_2 P0.3 + /* 73 */ {XMC_GPIO_PORT0, 5}, // USB Debug TX P0.5 + /* 74 */ {XMC_GPIO_PORT0, 11}, // PWM80-31 output / PWM3 P0.11 + /* 75 */ {XMC_GPIO_PORT3, 3}, // PWM42-3 output / PWM1 P3.3 + /* 76 */ {XMC_GPIO_PORT3, 5}, // CS_2GO_1 P3.5 (Chip Select - Slot 1) + /* 77 */ {XMC_GPIO_PORT0, 7}, // LED2 P0.7 + /* 78 */ {XMC_GPIO_PORT0, 8}, // QSPI_CLK P0.8 + /* 79 */ {XMC_GPIO_PORT3, 6}, // PWM42-0(PWM0)/ External INT 1 P3.6 + /* 80 */ {XMC_GPIO_PORT3, 4}, // PWM42-2 output / PWM2 P3.4 + /* 81 */ {XMC_GPIO_PORT0, 12}, // CS_MB P0.12 + /* 82 */ {XMC_GPIO_PORT0, 6}, // LED1 P0.6 + /* 83 */ {XMC_GPIO_PORT0, 4}, // ETH_TXEN P0.4 + /* 84 */ {XMC_GPIO_PORT0, 2}, // SPI-CS / PWM80-01 / PWM4 P0.2 + /* 85 */ {XMC_GPIO_PORT0, 0}, // SPI-MISO P0.0 + /* 86 */ {XMC_GPIO_PORT0, 9}, // GPIO4_2GO_1 / PWM80-01 / PWM P0.9 + /* 87 */ {XMC_GPIO_PORT3, 1}, // BUTTON1 P3.1 + /* 88 */ {XMC_GPIO_PORT14, 4}, // A4 - ADC Input / SDA P14.4 (Hardwired to SDA) + /* 89 */ {XMC_GPIO_PORT14, 13}, // A9 / AN2_2GO_2 - ADC Input P14.13 (INPUT ONLY) + /* 90 */ {XMC_GPIO_PORT14, 7}, // A7 / AN2_2GO_1 - ADC Input P14.7 (INPUT ONLY) + /* 91 */ {XMC_GPIO_PORT14, 5}, // A5 - ADC Input / SCL P14.5 (Hardwired to SCL) + /* 92 */ {XMC_GPIO_PORT14, 3}, // A3 - ADC Input P14.3 (INPUT ONLY) + /* 93 */ {XMC_GPIO_PORT15, 3}, // A13 - ADC Input P15.3 (INPUT ONLY) + /* 94 */ {XMC_GPIO_PORT14, 9} // A15 / DAC 1 Output P14.9 + }; +const uint8_t GND = ( sizeof( mapping_port_pin ) / sizeof( XMC_PORT_PIN_t ) ); +const uint8_t NUM_DIGITAL = ( sizeof( mapping_port_pin ) / sizeof( XMC_PORT_PIN_t ) );; + +const XMC_PIN_INTERRUPT_t mapping_interrupt[] = + { + /* 0 */ {CCU40, CCU40_CC43, 3, 0, CCU40_IN3_P1_0}, + /* 1 */ {CCU42, CCU42_CC40, 0, 1, CCU42_IN0_P3_6} + }; +const uint8_t NUM_INTERRUPT = ( sizeof( mapping_interrupt ) / sizeof( XMC_PIN_INTERRUPT_t ) ); + +/* Mapping of Arduino Pins to PWM4 channels as pin and index in PWM4 channel + mapping array XMC_PWM4_t mapping_pwm4[] + last entry 255 for both parts. + Putting both parts in array means if a PWM4 channel gets reassigned for + another function later a gap in channel numbers will not mess things up */ +const uint8_t mapping_pin_PWM4[][ 2 ] = { + { 3, 0 }, // PWM0 + { 5, 1 }, // PWM1 + { 6, 2 }, // PWM2 + { 11, 3 }, // PWM5 + { 27, 4 }, // PWM + { 28, 5 }, // PWM + { 57, 6 }, // PWM + { 58, 7 }, // PWM + { 255, 255 } }; + +/* Configurations of PWM channels for CCU4 type */ +XMC_PWM4_t mapping_pwm4[] = + { + {CCU42, CCU42_CC40, 0, mapping_port_pin[3], P3_6_AF_CCU42_OUT0, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 3 P3.6 + {CCU42, CCU42_CC43, 3, mapping_port_pin[5], P3_3_AF_CCU42_OUT3, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 5 P3.3 + {CCU42, CCU42_CC42, 2, mapping_port_pin[6], P3_4_AF_CCU42_OUT2, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 6 P3.4 + + //additional pwm outputs starting here + {CCU41, CCU41_CC41, 1, mapping_port_pin[27], P2_4_AF_CCU41_OUT1, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 27 P2.4 + {CCU41, CCU41_CC43, 3, mapping_port_pin[28], P2_2_AF_CCU41_OUT3, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 28 P2.2 + {CCU41, CCU41_CC42, 2, mapping_port_pin[57], P2_3_AF_CCU41_OUT2, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 57 P2.3 + {CCU41, CCU41_CC41, 0, mapping_port_pin[58], P2_5_AF_CCU41_OUT0, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 58 P2.5 + }; +const uint8_t NUM_PWM4 = ( sizeof( mapping_pwm4 ) / sizeof( XMC_PWM4_t ) ); + +/* Mapping in same manner as PWM4 for PWM8 channels */ +const uint8_t mapping_pin_PWM8[][ 2 ] = { + { 9, 0 }, // PWM3 + { 10, 1 }, // PWM4 + { 26, 2 }, // PWM + { 29, 3 }, // PWM + { 30, 4 }, // PWM + { 54, 5 }, // PWM + { 55, 6 }, // PWM + { 59, 7 }, // PWM + { 86, 8 }, // PWM + { 255, 255 } }; + +/* Configurations of PWM channels for CCU8 type */ +XMC_PWM8_t mapping_pwm8[] = + { + {CCU80, CCU80_CC83, 3, XMC_CCU8_SLICE_COMPARE_CHANNEL_2, mapping_port_pin[9], P0_11_AF_CCU80_OUT31, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 9 P0.11 + {CCU80, CCU80_CC80, 0, XMC_CCU8_SLICE_COMPARE_CHANNEL_2, mapping_port_pin[10], P0_2_AF_CCU80_OUT01, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 10 P0.2 + + //additional pwm outputs starting here + {CCU80, CCU80_CC80, 0, XMC_CCU8_SLICE_COMPARE_CHANNEL_1, mapping_port_pin[55], P2_7_AF_CCU80_OUT03, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 55 P2.7 + {CCU80, CCU80_CC81, 1, XMC_CCU8_SLICE_COMPARE_CHANNEL_1, mapping_port_pin[86], P0_9_AF_CCU80_OUT12, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 86 P0.9 + {CCU80, CCU80_CC81, 1, XMC_CCU8_SLICE_COMPARE_CHANNEL_2, mapping_port_pin[30], P2_6_AF_CCU80_OUT13, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 30 P2.6 + {CCU80, CCU80_CC82, 2, XMC_CCU8_SLICE_COMPARE_CHANNEL_1, mapping_port_pin[59], P2_9_AF_CCU80_OUT22, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 59 P2.9 + {CCU80, CCU80_CC83, 3, XMC_CCU8_SLICE_COMPARE_CHANNEL_1, mapping_port_pin[26], P2_8_AF_CCU80_OUT32, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 26 P2.8 + {CCU81, CCU81_CC80, 0, XMC_CCU8_SLICE_COMPARE_CHANNEL_1, mapping_port_pin[54], P5_7_AF_CCU81_OUT02, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 54 P5.7 + {CCU81, CCU81_CC82, 1, XMC_CCU8_SLICE_COMPARE_CHANNEL_2, mapping_port_pin[29], P2_0_AF_CCU81_OUT21, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED} // PWM disabled 29 P2.0 +/* {CCU81, CCU81_CC81, 1, XMC_CCU8_SLICE_COMPARE_CHANNEL_2, mapping_port_pin[82], P5_5_AF_CCU81_OUT12, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 82 P5.5 + {CCU81, CCU81_CC82, 2, XMC_CCU8_SLICE_COMPARE_CHANNEL_2, mapping_port_pin[81], P5_3_AF_CCU81_OUT22, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED} // PWM disabled 81 P5.3*/ + }; +const uint8_t NUM_PWM8 = ( sizeof( mapping_pwm8 ) / sizeof( XMC_PWM8_t ) ); +const uint8_t NUM_PWM = ( sizeof( mapping_pwm4 ) / sizeof( XMC_PWM4_t ) ) + + ( sizeof( mapping_pwm8 ) / sizeof( XMC_PWM8_t ) ); + +/* Analog Pin mappings and configurations */ +#ifdef DAC +const uint8_t mapping_pin_DAC[][ 2 ] = { + { 61, 0 }, + { 94, 1 }, + { 255, 255 } }; + +/* Analog Pin mappings and configurations */ +XMC_ARD_DAC_t mapping_dac[] = + { + {XMC_DAC0, 1, 12}, + {XMC_DAC0, 0, 12} + }; +const uint8_t NUM_ANALOG_OUTPUTS = ( sizeof( mapping_dac ) / sizeof( XMC_ARD_DAC_t ) ); +#endif + +XMC_ADC_t mapping_adc[] = + { + //Result reg numbers are now equal to channel numbers + {VADC, 0, VADC_G0, 0, 0, DISABLED}, + {VADC, 1, VADC_G0, 0, 1, DISABLED}, + {VADC, 2, VADC_G1, 1, 2, DISABLED}, + {VADC, 3, VADC_G1, 1, 3, DISABLED}, + {VADC, 0, VADC_G2, 2, 0, DISABLED}, + {VADC, 1, VADC_G2, 2, 1, DISABLED}, + //Additional ADC channels starting here + {VADC, 6, VADC_G2, 2, 6, DISABLED}, + {VADC, 5, VADC_G2, 2, 5, DISABLED}, + {VADC, 3, VADC_G2, 2, 3, DISABLED}, + {VADC, 7, VADC_G1, 1, 7, DISABLED}, + {VADC, 5, VADC_G1, 1, 5, DISABLED}, + {VADC, 7, VADC_G0, 0, 7, DISABLED}, + {VADC, 7, VADC_G3, 3, 7, DISABLED}, + {VADC, 1, VADC_G1, 1, 1, DISABLED}, + {VADC, 0, VADC_G1, 1, 0, DISABLED}, + {VADC, 6, VADC_G3, 3, 6, DISABLED}, + {VADC, 6, VADC_G0, 0, 6, DISABLED}, + {VADC, 4, VADC_G1, 1, 4, DISABLED}, + }; +const uint8_t NUM_ANALOG_INPUTS = ( sizeof( mapping_adc ) / sizeof( XMC_ADC_t ) ); + +/* + * UART objects + * + * See many XMC1x00 pins_arduino.h for proper way to handle HOSTPC + * NUM_SERIAL defines number of PHYSICAL ports NOT configurations + */ +RingBuffer rx_buffer_0; +RingBuffer tx_buffer_0; +#if (NUM_SERIAL > 1) +RingBuffer rx_buffer_1; +RingBuffer tx_buffer_1; +#endif + +#ifdef SERIAL_HOSTPC +XMC_UART_t XMC_UART_0 = + { + .channel = XMC_UART1_CH0, + .rx = { .port = (XMC_GPIO_PORT_t*)PORT0_BASE, + .pin = (uint8_t)5 + }, + .rx_config = { .mode = XMC_GPIO_MODE_INPUT_TRISTATE, + .output_level = XMC_GPIO_OUTPUT_LEVEL_HIGH, + .output_strength = XMC_GPIO_OUTPUT_STRENGTH_STRONG_SOFT_EDGE + }, + .tx = { .port = (XMC_GPIO_PORT_t*)PORT1_BASE, + .pin = (uint8_t)15 + }, + .tx_config = { .mode = (XMC_GPIO_MODE_t) XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT4, + .output_level = XMC_GPIO_OUTPUT_LEVEL_HIGH, + .output_strength = XMC_GPIO_OUTPUT_STRENGTH_STRONG_SOFT_EDGE + }, + .input_source_dx0 = (XMC_USIC_INPUT_t)USIC1_C0_DX0_P0_5, + .input_source_dx1 = XMC_INPUT_INVALID, + .input_source_dx2 = XMC_INPUT_INVALID, + .input_source_dx3 = XMC_INPUT_INVALID, + .irq_num = USIC1_0_IRQn, + .irq_service_request = 0 + }; + +// Debug port +HardwareSerial Serial( &XMC_UART_0, &rx_buffer_0, &tx_buffer_0 ); + +#elif SERIAL_ONBOARD +XMC_UART_t XMC_UART_0 = + { + .channel = XMC_UART1_CH0, + .rx = { .port = (XMC_GPIO_PORT_t*)PORT2_BASE, + .pin = (uint8_t)15 + }, + .rx_config = { .mode = XMC_GPIO_MODE_INPUT_TRISTATE, + .output_level = XMC_GPIO_OUTPUT_LEVEL_HIGH, + .output_strength = XMC_GPIO_OUTPUT_STRENGTH_STRONG_SOFT_EDGE + }, + .tx = { .port = (XMC_GPIO_PORT_t*)PORT2_BASE, + .pin = (uint8_t)14 + }, + .tx_config = { .mode = (XMC_GPIO_MODE_t) XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT2, + .output_level = XMC_GPIO_OUTPUT_LEVEL_HIGH, + .output_strength = XMC_GPIO_OUTPUT_STRENGTH_STRONG_SOFT_EDGE + }, + .input_source_dx0 = (XMC_USIC_INPUT_t)USIC1_C0_DX0_P2_15, + .input_source_dx1 = XMC_INPUT_INVALID, + .input_source_dx2 = XMC_INPUT_INVALID, + .input_source_dx3 = XMC_INPUT_INVALID, + .irq_num = USIC0_5_IRQn, + .irq_service_request = 0 + }; + +// Debug port +HardwareSerial Serial( &XMC_UART_0, &rx_buffer_0, &tx_buffer_0 ); +#endif + +// Serial Interrupt and event handling +#ifdef __cplusplus +extern "C" { +#endif +void serialEventRun( ); +void serialEvent( ) __attribute__((weak)); +void serialEvent1( ) __attribute__((weak)); + + +void serialEventRun( ) +{ +if( serialEvent ) + { + if( Serial.available( ) ) + serialEvent( ); + } +#if (NUM_SERIAL > 1) +if( serialEvent1 ) + { + if( Serial1.available( ) ) + serialEvent1( ); + } +#endif +} + + +void USIC1_0_IRQHandler( ) +{ +Serial.IrqHandler( ); +} + +#if (NUM_SERIAL > 1) +void USIC0_5_IRQHandler( void ) +{ +Serial1.IrqHandler(); +} +#endif + +#ifdef __cplusplus +} +#endif +#endif /* ARDUINO_MAIN*/ + +#ifdef __cplusplus +extern HardwareSerial Serial; +#if (NUM_SERIAL > 1) +extern HardwareSerial Serial1; +#endif +#endif /* cplusplus */ + +#endif diff --git a/variants/XMC4200/linker_script.ld b/variants/XMC4200/linker_script.ld new file mode 100755 index 00000000..6c17ab3d --- /dev/null +++ b/variants/XMC4200/linker_script.ld @@ -0,0 +1,286 @@ +/** + * @file XMC4200x256.ld + * @date 2017-04-20 + * + * @cond + ********************************************************************************************************************* + * Linker file for the GNU C Compiler v1.8 + * Supported devices: XMC4200-F64x256 + * XMC4200-Q48x256 + * + * Copyright (c) 2015-2020, Infineon Technologies AG + * All rights reserved. + * + * Boost Software License - Version 1.0 - August 17th, 2003 + * + * Permission is hereby granted, free of charge, to any person or organization + * obtaining a copy of the software and accompanying documentation covered by + * this license (the "Software") to use, reproduce, display, distribute, + * execute, and transmit the Software, and to prepare derivative works of the + * Software, and to permit third-parties to whom the Software is furnished to + * do so, all subject to the following: + * + * The copyright notices in the Software and this entire statement, including + * the above license grant, this restriction and the following disclaimer, + * must be included in all copies of the Software, in whole or in part, and + * all derivative works of the Software, unless such copies or derivative + * works are solely in the form of machine-executable object code generated by + * a source language processor. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT + * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE + * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * To improve the quality of the software, users are encouraged to share + * modifications, enhancements or bug fixes with Infineon Technologies AG + * at XMCSupport@infineon.com. + ********************************************************************************************************************* + * + * Change History + * -------------- + * + * 2015-07-07: + * - Product splitting + * - Copyright notice update + * + * 2015-11-24: + * - Compatibility with GCC 4.9 2015q2 + * + * 2016-03-08: + * - Fix size of BSS and DATA sections to be multiple of 4 + * - Add assertion to check that region SRAM_combined does not overflowed no_init section + * + * 2017-04-07: + * - Added new symbols __text_size and eText + * + * 2017-04-20: + * - Change vtable location to flash area to save ram + * + * @endcond + * + */ + +OUTPUT_FORMAT("elf32-littlearm") +OUTPUT_ARCH(arm) +ENTRY(Reset_Handler) + +MEMORY +{ + FLASH_1_cached(RX) : ORIGIN = 0x08000000, LENGTH = 0x40000 + FLASH_1_uncached(RX) : ORIGIN = 0x0C000000, LENGTH = 0x40000 + PSRAM_1(!RX) : ORIGIN = 0x1FFFC000, LENGTH = 0x4000 + DSRAM_1_system(!RX) : ORIGIN = 0x20000000, LENGTH = 0x6000 + SRAM_combined(!RX) : ORIGIN = 0x1FFFC000, LENGTH = 0xA000 +} + +stack_size = DEFINED(stack_size) ? stack_size : 2048; +no_init_size = 64; + +SECTIONS +{ + /* TEXT section */ + + .text : + { + sText = .; + KEEP(*(.reset)); + *(.text .text.* .gnu.linkonce.t.*); + + /* C++ Support */ + KEEP(*(.init)) + KEEP(*(.fini)) + + /* .ctors */ + *crtbegin.o(.ctors) + *crtbegin?.o(.ctors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors) + *(SORT(.ctors.*)) + *(.ctors) + + /* .dtors */ + *crtbegin.o(.dtors) + *crtbegin?.o(.dtors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) + *(SORT(.dtors.*)) + *(.dtors) + + *(.rodata .rodata.*) + *(.gnu.linkonce.r*) + + *(vtable) + + . = ALIGN(4); + } > FLASH_1_cached AT > FLASH_1_uncached + + .eh_frame_hdr : ALIGN (4) + { + KEEP (*(.eh_frame_hdr)) + } > FLASH_1_cached AT > FLASH_1_uncached + + .eh_frame : ALIGN (4) + { + KEEP (*(.eh_frame)) + } > FLASH_1_cached AT > FLASH_1_uncached + + /* Exception handling, exidx needs a dedicated section */ + .ARM.extab : ALIGN(4) + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > FLASH_1_cached AT > FLASH_1_uncached + + . = ALIGN(4); + __exidx_start = .; + .ARM.exidx : ALIGN(4) + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } > FLASH_1_cached AT > FLASH_1_uncached + __exidx_end = .; + . = ALIGN(4); + + /* DSRAM layout (Lowest to highest)*/ + Stack (NOLOAD) : + { + __stack_start = .; + . = . + stack_size; + __stack_end = .; + __initial_sp = .; + } > SRAM_combined + + /* functions with __attribute__((section(".ram_code"))) */ + .ram_code : + { + . = ALIGN(4); /* section size must be multiply of 4. See startup.S file */ + __ram_code_start = .; + *(.ram_code) + . = ALIGN(4); /* section size must be multiply of 4. See startup.S file */ + __ram_code_end = .; + } > SRAM_combined AT > FLASH_1_uncached + __ram_code_load = LOADADDR (.ram_code); + __ram_code_size = __ram_code_end - __ram_code_start; + + /* Standard DATA and user defined DATA/BSS/CONST sections */ + .data : + { + . = ALIGN(4); /* section size must be multiply of 4. See startup.S file */ + __data_start = .; + * (.data); + * (.data*); + *(*.data); + *(.gnu.linkonce.d*) + + . = ALIGN(4); + /* preinit data */ + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP(*(.preinit_array)) + PROVIDE_HIDDEN (__preinit_array_end = .); + + . = ALIGN(4); + /* init data */ + PROVIDE_HIDDEN (__init_array_start = .); + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + PROVIDE_HIDDEN (__init_array_end = .); + + . = ALIGN(4); + /* finit data */ + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP(*(SORT(.fini_array.*))) + KEEP(*(.fini_array)) + PROVIDE_HIDDEN (__fini_array_end = .); + + . = ALIGN(4); /* section size must be multiply of 4. See startup.S file */ + __data_end = .; + } > SRAM_combined AT > FLASH_1_uncached + __data_load = LOADADDR (.data); + __data_size = __data_end - __data_start; + + __text_size = (__exidx_end - sText) + __data_size + __ram_code_size; + eText = sText + __text_size; + + /* BSS section */ + .bss (NOLOAD) : + { + . = ALIGN(4); /* section size must be multiply of 4. See startup.S file */ + __bss_start = .; + * (.bss); + * (.bss*); + * (COMMON); + *(.gnu.linkonce.b*) + . = ALIGN(4); /* section size must be multiply of 4. See startup.S file */ + __bss_end = .; + } > SRAM_combined + __bss_size = __bss_end - __bss_start; + + /* Shift location counter, so that ETH_RAM and USB_RAM are located above DSRAM_1_system */ + __shift_loc = (__bss_end >= ORIGIN(DSRAM_1_system)) ? 0 : (ORIGIN(DSRAM_1_system) - __bss_end); + + USB_RAM (__bss_end + __shift_loc) (NOLOAD) : + { + . = ALIGN(4); /* section size must be multiply of 4. See startup.S file */ + USB_RAM_start = .; + *(USB_RAM) + . = ALIGN(4); /* section size must be multiply of 4. See startup.S file */ + USB_RAM_end = .; + . = ALIGN(8); + Heap_Bank1_Start = .; + } > SRAM_combined + USB_RAM_size = USB_RAM_end - USB_RAM_start; + + /* .no_init section contains chipid, SystemCoreClock and trimming data. See system.c file */ + .no_init ORIGIN(SRAM_combined) + LENGTH(SRAM_combined) - no_init_size (NOLOAD) : + { + Heap_Bank1_End = .; + * (.no_init); + } > SRAM_combined + + /* Heap - Bank1*/ + Heap_Bank1_Size = Heap_Bank1_End - Heap_Bank1_Start; + + ASSERT(Heap_Bank1_Start <= Heap_Bank1_End, "region SRAM_combined overflowed no_init section") + + /DISCARD/ : + { + *(.comment) + } + + .stab 0 (NOLOAD) : { *(.stab) } + .stabstr 0 (NOLOAD) : { *(.stabstr) } + + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_pubtypes 0 : { *(.debug_pubtypes) } + + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + + /* DWARF 2.1 */ + .debug_ranges 0 : { *(.debug_ranges) } + + /* SGI/MIPS DWARF 2 extensions */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } + + /* Build attributes */ + .build_attributes 0 : { *(.ARM.attributes) } +} diff --git a/variants/XMC4200/startup_XMC4200.S b/variants/XMC4200/startup_XMC4200.S new file mode 100755 index 00000000..362c9ea6 --- /dev/null +++ b/variants/XMC4200/startup_XMC4200.S @@ -0,0 +1,434 @@ +/********************************************************************************************************************* + * @file startup_XMC4200.S + * @brief CMSIS Core Device Startup File for Infineon XMC4200 Device Series + * @version V1.1 + * @date 15 Mai 2020 + * + * @cond + ********************************************************************************************************************* + * Copyright (c) 2012-2020, Infineon Technologies AG + * All rights reserved. + * + * Boost Software License - Version 1.0 - August 17th, 2003 + * + * Permission is hereby granted, free of charge, to any person or organization + * obtaining a copy of the software and accompanying documentation covered by + * this license (the "Software") to use, reproduce, display, distribute, + * execute, and transmit the Software, and to prepare derivative works of the + * Software, and to permit third-parties to whom the Software is furnished to + * do so, all subject to the following: + * + * The copyright notices in the Software and this entire statement, including + * the above license grant, this restriction and the following disclaimer, + * must be included in all copies of the Software, in whole or in part, and + * all derivative works of the Software, unless such copies or derivative + * works are solely in the form of machine-executable object code generated by + * a source language processor. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT + * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE + * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * To improve the quality of the software, users are encouraged to share + * modifications, enhancements or bug fixes with Infineon Technologies AG + * at XMCSupport@infineon.com. + ********************************************************************************************************************* + * + **************************** Change history ******************************** + * V0.1,Sep, 13, 2012 ES : initial version + * V0.2,Oct, 12, 2012 PKB: C++ support + * V0.3,Jan, 26, 2013 PKB: Workaround for prefetch bug + * V0.4,Jul, 29, 2013 PKB: AAPCS violation in V0.3 fixed + * V0.5,Feb, 05, 2014 PKB: Removed redundant alignment code from copy+clear funcs + * V0.6,May, 05, 2014 JFT: Added ram_code section + * V0.7,Nov, 25, 2014 JFT: CPU workaround disabled. Single default handler. + * Removed DAVE3 dependency + * V0.8,Jan, 05, 2016 JFT: Fix .reset section attributes + * V0.9,March,04,2016 JFT: Fix weak definition of Veneers. + * Only relevant for AA, which needs ENABLE_PMU_CM_001_WORKAROUND + * V1.0,June ,01,2016 JFT: Rename ENABLE_CPU_CM_001_WORKAROUND to ENABLE_PMU_CM_001_WORKAROUND + * Action required: If using AA step, use ENABLE_PMU_CM_001_WORKAROUND instead of ENABLE_CPU_CM_001_WORKAROUND + * V1.1,Mai, 15, 2020 JFT:Added option (ENABLE_OWN_HANDLER) to generate a individual interrupt handlers for unhandled vectors + * @endcond + */ + +/* ===========START : MACRO DEFINITION MACRO DEFINITION ================== */ + +.macro Entry Handler +#if defined(ENABLE_PMU_CM_001_WORKAROUND) + .long \Handler\()_Veneer +#else + .long \Handler +#endif +.endm + +.macro Insert_ExceptionHandler Handler_Func + .weak \Handler_Func +#if defined(ENABLE_OWN_HANDLER) + .thumb_func + .type \Handler_Func, %function +\Handler_Func: + b . + .size \Handler_Func, . - \Handler_Func +#else + .thumb_set \Handler_Func, Default_Handler +#endif + +#if defined(ENABLE_PMU_CM_001_WORKAROUND) + .weak \Handler_Func\()_Veneer + .type \Handler_Func\()_Veneer, %function +\Handler_Func\()_Veneer: + push {r0, lr} + ldr r0, =\Handler_Func + blx r0 + pop {r0, pc} + .size \Handler_Func\()_Veneer, . - \Handler_Func\()_Veneer +#endif +.endm + +/* =============END : MACRO DEFINITION MACRO DEFINITION ================== */ + +/* ================== START OF VECTOR TABLE DEFINITION ====================== */ +/* Vector Table - This gets programed into VTOR register by onchip BootROM */ + .syntax unified + + .section .reset, "a", %progbits + + .align 2 + .globl __Vectors + .type __Vectors, %object +__Vectors: + .long __initial_sp /* Top of Stack */ + .long Reset_Handler /* Reset Handler */ + + Entry NMI_Handler /* NMI Handler */ + Entry HardFault_Handler /* Hard Fault Handler */ + Entry MemManage_Handler /* MPU Fault Handler */ + Entry BusFault_Handler /* Bus Fault Handler */ + Entry UsageFault_Handler /* Usage Fault Handler */ + .long 0 /* Reserved */ + .long 0 /* Reserved */ + .long 0 /* Reserved */ + .long 0 /* Reserved */ + Entry SVC_Handler /* SVCall Handler */ + Entry DebugMon_Handler /* Debug Monitor Handler */ + .long 0 /* Reserved */ + Entry PendSV_Handler /* PendSV Handler */ + Entry SysTick_Handler /* SysTick Handler */ + + /* Interrupt Handlers for Service Requests (SR) from XMC4200 Peripherals */ + Entry SCU_0_IRQHandler /* Handler name for SR SCU_0 */ + Entry ERU0_0_IRQHandler /* Handler name for SR ERU0_0 */ + Entry ERU0_1_IRQHandler /* Handler name for SR ERU0_1 */ + Entry ERU0_2_IRQHandler /* Handler name for SR ERU0_2 */ + Entry ERU0_3_IRQHandler /* Handler name for SR ERU0_3 */ + Entry ERU1_0_IRQHandler /* Handler name for SR ERU1_0 */ + Entry ERU1_1_IRQHandler /* Handler name for SR ERU1_1 */ + Entry ERU1_2_IRQHandler /* Handler name for SR ERU1_2 */ + Entry ERU1_3_IRQHandler /* Handler name for SR ERU1_3 */ + .long 0 /* Not Available */ + .long 0 /* Not Available */ + .long 0 /* Not Available */ + Entry PMU0_0_IRQHandler /* Handler name for SR PMU0_0 */ + .long 0 /* Not Available */ + Entry VADC0_C0_0_IRQHandler /* Handler name for SR VADC0_C0_0 */ + Entry VADC0_C0_1_IRQHandler /* Handler name for SR VADC0_C0_1 */ + Entry VADC0_C0_2_IRQHandler /* Handler name for SR VADC0_C0_1 */ + Entry VADC0_C0_3_IRQHandler /* Handler name for SR VADC0_C0_3 */ + Entry VADC0_G0_0_IRQHandler /* Handler name for SR VADC0_G0_0 */ + Entry VADC0_G0_1_IRQHandler /* Handler name for SR VADC0_G0_1 */ + Entry VADC0_G0_2_IRQHandler /* Handler name for SR VADC0_G0_2 */ + Entry VADC0_G0_3_IRQHandler /* Handler name for SR VADC0_G0_3 */ + Entry VADC0_G1_0_IRQHandler /* Handler name for SR VADC0_G1_0 */ + Entry VADC0_G1_1_IRQHandler /* Handler name for SR VADC0_G1_1 */ + Entry VADC0_G1_2_IRQHandler /* Handler name for SR VADC0_G1_2 */ + Entry VADC0_G1_3_IRQHandler /* Handler name for SR VADC0_G1_3 */ + .long 0 /* Not Available */ + .long 0 /* Not Available */ + .long 0 /* Not Available */ + .long 0 /* Not Available */ + .long 0 /* Not Available */ + .long 0 /* Not Available */ + .long 0 /* Not Available */ + .long 0 /* Not Available */ + .long 0 /* Not Available */ + .long 0 /* Not Available */ + .long 0 /* Not Available */ + .long 0 /* Not Available */ + .long 0 /* Not Available */ + .long 0 /* Not Available */ + .long 0 /* Not Available */ + .long 0 /* Not Available */ + Entry DAC0_0_IRQHandler /* Handler name for SR DAC0_0 */ + Entry DAC0_1_IRQHandler /* Handler name for SR DAC0_1 */ + Entry CCU40_0_IRQHandler /* Handler name for SR CCU40_0 */ + Entry CCU40_1_IRQHandler /* Handler name for SR CCU40_1 */ + Entry CCU40_2_IRQHandler /* Handler name for SR CCU40_2 */ + Entry CCU40_3_IRQHandler /* Handler name for SR CCU40_3 */ + Entry CCU41_0_IRQHandler /* Handler name for SR CCU41_0 */ + Entry CCU41_1_IRQHandler /* Handler name for SR CCU41_1 */ + Entry CCU41_2_IRQHandler /* Handler name for SR CCU41_2 */ + Entry CCU41_3_IRQHandler /* Handler name for SR CCU41_3 */ + .long 0 /* Not Available */ + .long 0 /* Not Available */ + .long 0 /* Not Available */ + .long 0 /* Not Available */ + .long 0 /* Not Available */ + .long 0 /* Not Available */ + .long 0 /* Not Available */ + .long 0 /* Not Available */ + Entry CCU80_0_IRQHandler /* Handler name for SR CCU80_0 */ + Entry CCU80_1_IRQHandler /* Handler name for SR CCU80_1 */ + Entry CCU80_2_IRQHandler /* Handler name for SR CCU80_2 */ + Entry CCU80_3_IRQHandler /* Handler name for SR CCU80_3 */ + .long 0 /* Not Available */ + .long 0 /* Not Available */ + .long 0 /* Not Available */ + .long 0 /* Not Available */ + Entry POSIF0_0_IRQHandler /* Handler name for SR POSIF0_0 */ + Entry POSIF0_1_IRQHandler /* Handler name for SR POSIF0_1 */ + .long 0 /* Not Available */ + .long 0 /* Not Available */ + Entry HRPWM_0_IRQHandler /* Handler name for SR HRPWM_0 */ + Entry HRPWM_1_IRQHandler /* Handler name for SR HRPWM_1 */ + Entry HRPWM_2_IRQHandler /* Handler name for SR HRPWM_2 */ + Entry HRPWM_3_IRQHandler /* Handler name for SR HRPWM_3 */ + Entry CAN0_0_IRQHandler /* Handler name for SR CAN0_0 */ + Entry CAN0_1_IRQHandler /* Handler name for SR CAN0_1 */ + Entry CAN0_2_IRQHandler /* Handler name for SR CAN0_2 */ + Entry CAN0_3_IRQHandler /* Handler name for SR CAN0_3 */ + Entry CAN0_4_IRQHandler /* Handler name for SR CAN0_4 */ + Entry CAN0_5_IRQHandler /* Handler name for SR CAN0_5 */ + Entry CAN0_6_IRQHandler /* Handler name for SR CAN0_6 */ + Entry CAN0_7_IRQHandler /* Handler name for SR CAN0_7 */ + Entry USIC0_0_IRQHandler /* Handler name for SR USIC0_0 */ + Entry USIC0_1_IRQHandler /* Handler name for SR USIC0_1 */ + Entry USIC0_2_IRQHandler /* Handler name for SR USIC0_2 */ + Entry USIC0_3_IRQHandler /* Handler name for SR USIC0_3 */ + Entry USIC0_4_IRQHandler /* Handler name for SR USIC0_4 */ + Entry USIC0_5_IRQHandler /* Handler name for SR USIC0_5 */ + Entry USIC1_0_IRQHandler /* Handler name for SR USIC1_0 */ + Entry USIC1_1_IRQHandler /* Handler name for SR USIC1_1 */ + Entry USIC1_2_IRQHandler /* Handler name for SR USIC1_2 */ + Entry USIC1_3_IRQHandler /* Handler name for SR USIC1_3 */ + Entry USIC1_4_IRQHandler /* Handler name for SR USIC1_4 */ + Entry USIC1_5_IRQHandler /* Handler name for SR USIC1_5 */ + .long 0 /* Not Available */ + .long 0 /* Not Available */ + .long 0 /* Not Available */ + .long 0 /* Not Available */ + .long 0 /* Not Available */ + .long 0 /* Not Available */ + Entry LEDTS0_0_IRQHandler /* Handler name for SR LEDTS0_0 */ + .long 0 /* Not Available */ + Entry FCE0_0_IRQHandler /* Handler name for SR FCE0_0 */ + Entry GPDMA0_0_IRQHandler /* Handler name for SR GPDMA0_0 */ + .long 0 /* Not Available */ + Entry USB0_0_IRQHandler /* Handler name for SR USB0_0 */ + .long 0 /* Not Available */ + .long 0 /* Not Available */ + .long 0 /* Not Available */ + .long 0 /* Not Available */ + + .size __Vectors, . - __Vectors +/* ================== END OF VECTOR TABLE DEFINITION ======================= */ + +/* ================== START OF VECTOR ROUTINES ============================= */ + + .align 1 + .thumb + +/* Reset Handler */ + .thumb_func + .globl Reset_Handler + .type Reset_Handler, %function +Reset_Handler: + ldr sp,=__initial_sp + +#ifndef __SKIP_SYSTEM_INIT + ldr r0, =SystemInit + blx r0 +#endif + +/* Initialize data + * + * Between symbol address __copy_table_start__ and __copy_table_end__, + * there are array of triplets, each of which specify: + * offset 0: LMA of start of a section to copy from + * offset 4: VMA of start of a section to copy to + * offset 8: size of the section to copy. Must be multiply of 4 + * + * All addresses must be aligned to 4 bytes boundary. + */ + ldr r4, =__copy_table_start__ + ldr r5, =__copy_table_end__ + +.L_loop0: + cmp r4, r5 + bge .L_loop0_done + ldr r1, [r4] + ldr r2, [r4, #4] + ldr r3, [r4, #8] + +.L_loop0_0: + subs r3, #4 + ittt ge + ldrge r0, [r1, r3] + strge r0, [r2, r3] + bge .L_loop0_0 + + adds r4, #12 + b .L_loop0 + +.L_loop0_done: + +/* Zero initialized data + * Between symbol address __zero_table_start__ and __zero_table_end__, + * there are array of tuples specifying: + * offset 0: Start of a BSS section + * offset 4: Size of this BSS section. Must be multiply of 4 + * + * Define __SKIP_BSS_CLEAR to disable zeroing uninitialzed data in startup. + */ +#ifndef __SKIP_BSS_CLEAR + ldr r3, =__zero_table_start__ + ldr r4, =__zero_table_end__ + +.L_loop2: + cmp r3, r4 + bge .L_loop2_done + ldr r1, [r3] + ldr r2, [r3, #4] + movs r0, 0 + +.L_loop2_0: + subs r2, #4 + itt ge + strge r0, [r1, r2] + bge .L_loop2_0 + + adds r3, #8 + b .L_loop2 +.L_loop2_done: +#endif /* __SKIP_BSS_CLEAR */ + +#ifndef __SKIP_LIBC_INIT_ARRAY + ldr r0, =__libc_init_array + blx r0 +#endif + + ldr r0, =main + blx r0 + +.align 2 +__copy_table_start__: + .long __data_load, __data_start, __data_size + .long __ram_code_load, __ram_code_start, __ram_code_size +__copy_table_end__: + +__zero_table_start__: + .long __bss_start, __bss_size + .long USB_RAM_start, USB_RAM_size +__zero_table_end__: + + .pool + .size Reset_Handler,.-Reset_Handler + +/* ======================================================================== */ +/* ========== START OF EXCEPTION HANDLER DEFINITION ======================== */ + +/* Default exception Handlers - Users may override this default functionality by + defining handlers of the same name in their C code */ + + .align 1 + .thumb_func + .weak Default_Handler + .type Default_Handler, %function +Default_Handler: + b . + .size Default_Handler, . - Default_Handler + + Insert_ExceptionHandler NMI_Handler + Insert_ExceptionHandler HardFault_Handler + Insert_ExceptionHandler MemManage_Handler + Insert_ExceptionHandler BusFault_Handler + Insert_ExceptionHandler UsageFault_Handler + Insert_ExceptionHandler SVC_Handler + Insert_ExceptionHandler DebugMon_Handler + Insert_ExceptionHandler PendSV_Handler + Insert_ExceptionHandler SysTick_Handler + + Insert_ExceptionHandler SCU_0_IRQHandler + Insert_ExceptionHandler ERU0_0_IRQHandler + Insert_ExceptionHandler ERU0_1_IRQHandler + Insert_ExceptionHandler ERU0_2_IRQHandler + Insert_ExceptionHandler ERU0_3_IRQHandler + Insert_ExceptionHandler ERU1_0_IRQHandler + Insert_ExceptionHandler ERU1_1_IRQHandler + Insert_ExceptionHandler ERU1_2_IRQHandler + Insert_ExceptionHandler ERU1_3_IRQHandler + Insert_ExceptionHandler PMU0_0_IRQHandler + Insert_ExceptionHandler VADC0_C0_0_IRQHandler + Insert_ExceptionHandler VADC0_C0_1_IRQHandler + Insert_ExceptionHandler VADC0_C0_2_IRQHandler + Insert_ExceptionHandler VADC0_C0_3_IRQHandler + Insert_ExceptionHandler VADC0_G0_0_IRQHandler + Insert_ExceptionHandler VADC0_G0_1_IRQHandler + Insert_ExceptionHandler VADC0_G0_2_IRQHandler + Insert_ExceptionHandler VADC0_G0_3_IRQHandler + Insert_ExceptionHandler VADC0_G1_0_IRQHandler + Insert_ExceptionHandler VADC0_G1_1_IRQHandler + Insert_ExceptionHandler VADC0_G1_2_IRQHandler + Insert_ExceptionHandler VADC0_G1_3_IRQHandler + Insert_ExceptionHandler DAC0_0_IRQHandler + Insert_ExceptionHandler DAC0_1_IRQHandler + Insert_ExceptionHandler CCU40_0_IRQHandler + Insert_ExceptionHandler CCU40_1_IRQHandler + Insert_ExceptionHandler CCU40_2_IRQHandler + Insert_ExceptionHandler CCU40_3_IRQHandler + Insert_ExceptionHandler CCU41_0_IRQHandler + Insert_ExceptionHandler CCU41_1_IRQHandler + Insert_ExceptionHandler CCU41_2_IRQHandler + Insert_ExceptionHandler CCU41_3_IRQHandler + Insert_ExceptionHandler CCU80_0_IRQHandler + Insert_ExceptionHandler CCU80_1_IRQHandler + Insert_ExceptionHandler CCU80_2_IRQHandler + Insert_ExceptionHandler CCU80_3_IRQHandler + Insert_ExceptionHandler POSIF0_0_IRQHandler + Insert_ExceptionHandler POSIF0_1_IRQHandler + Insert_ExceptionHandler HRPWM_0_IRQHandler + Insert_ExceptionHandler HRPWM_1_IRQHandler + Insert_ExceptionHandler HRPWM_2_IRQHandler + Insert_ExceptionHandler HRPWM_3_IRQHandler + Insert_ExceptionHandler CAN0_0_IRQHandler + Insert_ExceptionHandler CAN0_1_IRQHandler + Insert_ExceptionHandler CAN0_2_IRQHandler + Insert_ExceptionHandler CAN0_3_IRQHandler + Insert_ExceptionHandler CAN0_4_IRQHandler + Insert_ExceptionHandler CAN0_5_IRQHandler + Insert_ExceptionHandler CAN0_6_IRQHandler + Insert_ExceptionHandler CAN0_7_IRQHandler + Insert_ExceptionHandler USIC0_0_IRQHandler + Insert_ExceptionHandler USIC0_1_IRQHandler + Insert_ExceptionHandler USIC0_2_IRQHandler + Insert_ExceptionHandler USIC0_3_IRQHandler + Insert_ExceptionHandler USIC0_4_IRQHandler + Insert_ExceptionHandler USIC0_5_IRQHandler + Insert_ExceptionHandler USIC1_0_IRQHandler + Insert_ExceptionHandler USIC1_1_IRQHandler + Insert_ExceptionHandler USIC1_2_IRQHandler + Insert_ExceptionHandler USIC1_3_IRQHandler + Insert_ExceptionHandler USIC1_4_IRQHandler + Insert_ExceptionHandler USIC1_5_IRQHandler + Insert_ExceptionHandler LEDTS0_0_IRQHandler + Insert_ExceptionHandler FCE0_0_IRQHandler + Insert_ExceptionHandler GPDMA0_0_IRQHandler + Insert_ExceptionHandler USB0_0_IRQHandler + +/* ============= END OF INTERRUPT HANDLER DEFINITION ====================== */ + + .end diff --git a/variants/XMC4200/system_XMC4200.c b/variants/XMC4200/system_XMC4200.c new file mode 100755 index 00000000..b79c6895 --- /dev/null +++ b/variants/XMC4200/system_XMC4200.c @@ -0,0 +1,728 @@ +/********************************************************************************************************************* + * @file system_XMC4200.c + * @brief CMSIS Cortex-M4 Device Peripheral Access Layer Header File for the Infineon XMC4200 Device Series + * @version V3.1.6 + * @date 27. Aug 2020 + * + * @cond + ********************************************************************************************************************* + * Copyright (c) 2015-2020, Infineon Technologies AG + * All rights reserved. + * + * Boost Software License - Version 1.0 - August 17th, 2003 + * + * Permission is hereby granted, free of charge, to any person or organization + * obtaining a copy of the software and accompanying documentation covered by + * this license (the "Software") to use, reproduce, display, distribute, + * execute, and transmit the Software, and to prepare derivative works of the + * Software, and to permit third-parties to whom the Software is furnished to + * do so, all subject to the following: + * + * The copyright notices in the Software and this entire statement, including + * the above license grant, this restriction and the following disclaimer, + * must be included in all copies of the Software, in whole or in part, and + * all derivative works of the Software, unless such copies or derivative + * works are solely in the form of machine-executable object code generated by + * a source language processor. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT + * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE + * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * To improve the quality of the software, users are encouraged to share + * modifications, enhancements or bug fixes with Infineon Technologies AG + * at XMCSupport@infineon.com. + ********************************************************************************************************************* + * + ********************** Version History *************************************** + * V3.1.0, Dec 2014, Added options to configure clock settings + * V3.1.1, 01. Jun 2016, Fix masking of OSCHPCTRL value + * V3.1.2, 19. Jun 2017, Rely on cmsis_compiler.h instead of defining __WEAK + * Added support for ARM Compiler 6 (armclang) + * V3.1.3, 26. Sep 2017, Disable FPU if FPU_USED is zero + * V3.1.4, 29. Oct 2018, Fix variable location of SystemCoreClock, g_hrpwm_char_data and g_chipid for ARMCC compiler + * V3.1.5, 02. Dec 2019, Fix including device header file following the convention: angle brackets are used for standard includes and double quotes for everything else. + * Fix EXTCLKDIV macro definition + * Fix code for condition EXTCLK_PIN == EXTCLK_PIN_P1_15 + * V3.1.6, 27. Aug 2020. Fix K1 divider input clock for PLL in prescaler mode + * Added compiler checks for input VCO and VCO frequencies + * Added wait for K2 divider ready after updating the K2 divider in the PLL ramp up + * Removed wait for lock after changing the K2 divider in the PLL ramp up since a modification of the K2-divider has no impact on the VCO Lock status + * Use P,N,K2 even values dividers for system PLL to minimize jitter (for the case of external clock 12MHz) + * Use P,N,K2 value dividers for system PLL when running out of internal oscillator that centers the input frequency of the VCO to 6MHz instead of 4MHz (minimum value in DS) + ****************************************************************************** + * @endcond + */ + + +/******************************************************************************* + * HEADER FILES + *******************************************************************************/ +#include + +#include "XMC4200.h" +#include "system_XMC4200.h" + +/******************************************************************************* + * MACROS + *******************************************************************************/ +#define CHIPID_LOC ((uint8_t *)0x20000000UL) +#define HRPWM_CHARDATA_LOC ((uint8_t *)0x20000084UL) + +#define PMU_FLASH_WS (0x2U) +#define FPLL_FREQUENCY (80000000U) +#define FOSCREF (2500000U) +#define DELAY_CNT_50US_50MHZ (2500UL) +#define DELAY_CNT_150US_50MHZ (7500UL) +#define DELAY_CNT_50US_60MHZ (3000UL) +#define DELAY_CNT_50US_80MHZ (4000UL) + +#define VCO_INPUT_MIN (4000000UL) +#define VCO_INPUT_MAX (16000000UL) +#define VCO_MIN (260000000UL) +#define VCO_MAX (520000000UL) + +#define SCU_PLL_PLLSTAT_OSC_USABLE (SCU_PLL_PLLSTAT_PLLHV_Msk | \ + SCU_PLL_PLLSTAT_PLLLV_Msk | \ + SCU_PLL_PLLSTAT_PLLSP_Msk) + +/* +//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------ +*/ + +/* +// Clock configuration +*/ + +/* +// External crystal frequency [Hz] +// <8000000=> 8MHz +// <12000000=> 12MHz +// <16000000=> 16MHz +// Defines external crystal frequency +// Default: 8MHz +*/ +#define OSCHP_FREQUENCY (12000000U) + +#if OSCHP_FREQUENCY == 8000000U +#define USB_PDIV (1U) +#define USB_NDIV (95U) +#define USB_DIV (3U) + +#elif OSCHP_FREQUENCY == 12000000U +#define USB_PDIV (1U) +#define USB_NDIV (63U) +#define USB_DIV (3U) + +#elif OSCHP_FREQUENCY == 16000000U +#define USB_PDIV (1U) +#define USB_NDIV (47U) +#define USB_DIV (3U) + +#else +#error "External crystal frequency not supported" + +#endif + +#define USB_VCO ((OSCHP_FREQUENCY / (USB_PDIV + 1UL)) * (USB_NDIV + 1UL)) +#define USB_VCO_INPUT (OSCHP_FREQUENCY / (USB_PDIV + 1UL)) + +/* +// System clock (fSYS) source selection +// <0=> Backup clock (24MHz) +// <1=> Maximum clock frequency using PLL (80MHz) +// Default: Maximum clock frequency using PLL (80MHz) +*/ +#define SYS_CLOCK_SRC 1 +#define SYS_CLOCK_SRC_OFI 0 +#define SYS_CLOCK_SRC_PLL 1 + +/* +// Backup clock calibration mode +// <0=> Factory calibration +// <1=> Automatic calibration +// Default: Automatic calibration +*/ +#define FOFI_CALIBRATION_MODE 1 +#define FOFI_CALIBRATION_MODE_FACTORY 0 +#define FOFI_CALIBRATION_MODE_AUTOMATIC 1 + +/* +// Standby clock (fSTDBY) source selection +// <0=> Internal slow oscillator (32768Hz) +// <1=> External crystal (32768Hz) +// Default: Internal slow oscillator (32768Hz) +*/ +#define STDBY_CLOCK_SRC 0 +#define STDBY_CLOCK_SRC_OSI 0 +#define STDBY_CLOCK_SRC_OSCULP 1 + +/* +// PLL clock source selection +// <0=> External crystal +// <1=> External direct input +// <2=> Internal fast oscillator +// Default: External crystal +*/ +#define PLL_CLOCK_SRC 0 +#define PLL_CLOCK_SRC_EXT_XTAL 0 +#define PLL_CLOCK_SRC_EXT_DIRECT 1 +#define PLL_CLOCK_SRC_OFI 2 + +#if PLL_CLOCK_SRC == PLL_CLOCK_SRC_EXT_XTAL +#if OSCHP_FREQUENCY == 8000000U +#define PLL_PDIV (1U) +#define PLL_NDIV (79U) +#define PLL_K2DIV (3U) + +#elif OSCHP_FREQUENCY == 12000000U +#define PLL_PDIV (1U) +#define PLL_NDIV (79U) +#define PLL_K2DIV (5U) + +#elif OSCHP_FREQUENCY == 16000000U +#define PLL_PDIV (1U) +#define PLL_NDIV (39U) +#define PLL_K2DIV (3U) + +#else +#error "External crystal frequency not supported" + +#endif + +#define VCO ((OSCHP_FREQUENCY / (PLL_PDIV + 1UL)) * (PLL_NDIV + 1UL)) +#define VCO_INPUT (OSCHP_FREQUENCY / (PLL_PDIV + 1UL)) + +#else /* PLL_CLOCK_SRC == PLL_CLOCK_SRC_EXT_XTAL */ +#define PLL_PDIV (3U) +#define PLL_NDIV (79U) +#define PLL_K2DIV (5U) + +#define VCO ((OFI_FREQUENCY / (PLL_PDIV + 1UL)) * (PLL_NDIV + 1UL)) +#define VCO_INPUT (OFI_FREQUENCY / (PLL_PDIV + 1UL)) + +#endif /* PLL_CLOCK_SRC == PLL_CLOCK_SRC_OFI */ + +#if (VCO_INPUT < VCO_INPUT_MIN) || (VCO_INPUT > VCO_INPUT_MAX) +#error VCO_INPUT frequency out of range. +#endif + +#if (VCO < VCO_MIN) || (VCO > VCO_MAX) +#error VCO frequency out of range. +#endif + +#if (USB_VCO_INPUT < VCO_INPUT_MIN) || (USB_VCO_INPUT > VCO_INPUT_MAX) +#error USB_VCO_INPUT frequency out of range. +#endif + +#if (USB_VCO < VCO_MIN) || (USB_VCO > VCO_MAX) +#error USB_VCO frequency out of range. +#endif + +#define PLL_K2DIV_0 ((VCO / OFI_FREQUENCY) - 1UL) +#define PLL_K2DIV_1 ((VCO / 60000000U) - 1UL) + +#define SCU_CLK_CLKCLR_ENABLE_USBCLK SCU_CLK_CLKCLR_USBCDI_Msk +#define SCU_CLK_CLKCLR_ENABLE_CCUCLK SCU_CLK_CLKCLR_CCUCDI_Msk +#define SCU_CLK_CLKCLR_ENABLE_WDTCLK SCU_CLK_CLKCLR_WDTCDI_Msk + +#define SCU_CLK_USBCLKCR_USBSEL_USBPLL (0U << SCU_CLK_USBCLKCR_USBSEL_Pos) +#define SCU_CLK_USBCLKCR_USBSEL_PLL (1U << SCU_CLK_USBCLKCR_USBSEL_Pos) + +#define SCU_CLK_WDTCLKCR_WDTSEL_OFI (0U << SCU_CLK_WDTCLKCR_WDTSEL_Pos) +#define SCU_CLK_WDTCLKCR_WDTSEL_STANDBY (1U << SCU_CLK_WDTCLKCR_WDTSEL_Pos) +#define SCU_CLK_WDTCLKCR_WDTSEL_PLL (2U << SCU_CLK_WDTCLKCR_WDTSEL_Pos) + +#define SCU_CLK_EXTCLKCR_ECKSEL_SYS (0U << SCU_CLK_EXTCLKCR_ECKSEL_Pos) +#define SCU_CLK_EXTCLKCR_ECKSEL_USBPLL (2U << SCU_CLK_EXTCLKCR_ECKSEL_Pos) +#define SCU_CLK_EXTCLKCR_ECKSEL_PLL (3U << SCU_CLK_EXTCLKCR_ECKSEL_Pos) +#define SCU_CLK_EXTCLKCR_ECKSEL_STANDBY (4U << SCU_CLK_EXTCLKCR_ECKSEL_Pos) + +#define EXTCLK_PIN_P0_8 (0) +#define EXTCLK_PIN_P1_15 (1) + +/* +// Clock tree +// CPU clock divider +// <0=> fCPU = fSYS +// <1=> fCPU = fSYS / 2 +// Peripheral clock divider +// <0=> fPB = fCPU +// <1=> fPB = fCPU / 2 +// Enable CCU clock +// CCU clock divider +// <0=> fCCU = fCPU +// <1=> fCCU = fCPU / 2 +// +// Enable WDT clock +// WDT clock divider <1-256><#-1> +// WDT clock source <0=> fOFI +// <1=> fSTDBY +// <2=> fPLL +// +// Enable USB clock +// USB clock source <0=> USBPLL +// <1=> PLL +// +// External Clock configuration +// External clock source selection +// <0=> System clock +// <2=> USB PLL clock +// <3=> PLL clock +// <4=> Standby clock +// External clock divider <1-512><#-1> +// Only valid for USB PLL and PLL clocks +// External Pin Selection +// <0=> P0.8 +// <1=> P1.15 +// +// +*/ +#define ENABLE_SCUCLK (0U) +#define CPUCLKDIV (0U) +#define PBCLKDIV (0U) +#define CCUCLKDIV (0U) +#define WDTCLKDIV (0U | SCU_CLK_WDTCLKCR_WDTSEL_OFI) +#define USBCLKDIV (0U | SCU_CLK_USBCLKCR_USBSEL_USBPLL | USB_DIV) + +#define ENABLE_EXTCLK (0U) +#define EXTCLKDIV ((0U << SCU_CLK_EXTCLKCR_ECKDIV_Pos) | SCU_CLK_EXTCLKCR_ECKSEL_SYS) +#define EXTCLK_PIN (0U) + +#define ENABLE_PLL \ + (SYS_CLOCK_SRC == SYS_CLOCK_SRC_PLL) || \ + (((ENABLE_SCUCLK & SCU_CLK_CLKSET_USBCEN_Msk) != 0) && ((USBCLKDIV & SCU_CLK_USBCLKCR_USBSEL_Msk) == SCU_CLK_USBCLKCR_USBSEL_PLL)) || \ + (((ENABLE_SCUCLK & SCU_CLK_CLKSET_WDTCEN_Msk) != 0) && ((WDTCLKDIV & SCU_CLK_WDTCLKCR_WDTSEL_Msk) == SCU_CLK_WDTCLKCR_WDTSEL_PLL)) + +/* +// +*/ + +/* +//-------- <<< end of configuration section >>> ------------------ +*/ + +/******************************************************************************* + * GLOBAL VARIABLES + *******************************************************************************/ +#if defined ( __CC_ARM ) +uint32_t SystemCoreClock __attribute__((at(0x20005FC0))); +uint8_t g_chipid[16] __attribute__((at(0x20005FC4))); +uint32_t g_hrpwm_char_data[3] __attribute__((at(0x20005FD4))); +#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) +uint32_t SystemCoreClock __attribute__((section(".bss.ARM.__at_0x20005FC0"))); +uint8_t g_chipid[16] __attribute__((section(".bss.ARM.__at_0x20005FC4"))); +uint32_t g_hrpwm_char_data[3] __attribute__((section(".bss.ARM.__at_0x20005FD4"))); +#elif defined ( __ICCARM__ ) +__no_init uint32_t SystemCoreClock; +__no_init uint8_t g_chipid[16]; +__no_init uint32_t g_hrpwm_char_data[3]; +#elif defined ( __GNUC__ ) +uint32_t SystemCoreClock __attribute__((section(".no_init"))); +uint8_t g_chipid[16] __attribute__((section(".no_init"))); +uint32_t g_hrpwm_char_data[3] __attribute__((section(".no_init"))); +#elif defined ( __TASKING__ ) +uint32_t SystemCoreClock __at( 0x20005FC0 ); +uint8_t g_chipid[16] __at( 0x20005FC4 ); +uint32_t g_hrpwm_char_data[3] __at( 0x20005FD4 ); +#endif + +extern uint32_t __Vectors; + +/******************************************************************************* + * LOCAL FUNCTIONS + *******************************************************************************/ +static void delay(uint32_t cycles) +{ + volatile uint32_t i; + + for(i = 0UL; i < cycles ;++i) + { + __NOP(); + } +} + +/******************************************************************************* + * API IMPLEMENTATION + *******************************************************************************/ + +__WEAK void SystemInit(void) +{ + memcpy(g_chipid, CHIPID_LOC, 16); + memcpy(g_hrpwm_char_data, HRPWM_CHARDATA_LOC, 12); + + SystemCoreSetup(); + SystemCoreClockSetup(); +} + +__WEAK void SystemCoreSetup(void) +{ + uint32_t temp; + + /* relocate vector table */ + __disable_irq(); + SCB->VTOR = (uint32_t)(&__Vectors); + __DSB(); + __enable_irq(); + + /* __FPU_PRESENT = 1 defined in device header file */ + /* __FPU_USED value depends on compiler/linker options. */ + /* __FPU_USED = 0 if -mfloat-abi=soft is selected */ + /* __FPU_USED = 1 if -mfloat-abi=softfp or –mfloat-abi=hard */ + +#if ((__FPU_PRESENT == 1) && (__FPU_USED == 1)) + SCB->CPACR |= ((3UL << 10*2) | /* set CP10 Full Access */ + (3UL << 11*2) ); /* set CP11 Full Access */ +#else + SCB->CPACR = 0; +#endif + + /* Enable unaligned memory access - SCB_CCR.UNALIGN_TRP = 0 */ + SCB->CCR &= ~(SCB_CCR_UNALIGN_TRP_Msk); + + temp = FLASH0->FCON; + temp &= ~FLASH_FCON_WSPFLASH_Msk; + temp |= PMU_FLASH_WS; + FLASH0->FCON = temp; +} + +__WEAK void SystemCoreClockSetup(void) +{ +#if FOFI_CALIBRATION_MODE == FOFI_CALIBRATION_MODE_FACTORY + /* Enable factory calibration */ + SCU_PLL->PLLCON0 |= SCU_PLL_PLLCON0_FOTR_Msk; +#else + /* Automatic calibration uses the fSTDBY */ + + /* Enable HIB domain */ + /* Power up HIB domain if and only if it is currently powered down */ + if((SCU_POWER->PWRSTAT & SCU_POWER_PWRSTAT_HIBEN_Msk) == 0) + { + SCU_POWER->PWRSET |= SCU_POWER_PWRSET_HIB_Msk; + + while((SCU_POWER->PWRSTAT & SCU_POWER_PWRSTAT_HIBEN_Msk) == 0) + { + /* wait until HIB domain is enabled */ + } + } + + /* Remove the reset only if HIB domain were in a state of reset */ + if((SCU_RESET->RSTSTAT) & SCU_RESET_RSTSTAT_HIBRS_Msk) + { + SCU_RESET->RSTCLR |= SCU_RESET_RSTCLR_HIBRS_Msk; + delay(DELAY_CNT_150US_50MHZ); + } + +#if STDBY_CLOCK_SRC == STDBY_CLOCK_SRC_OSCULP + /* Enable OSC_ULP */ + if ((SCU_HIBERNATE->OSCULCTRL & SCU_HIBERNATE_OSCULCTRL_MODE_Msk) != 0UL) + { + /*enable OSC_ULP*/ + while (SCU_GENERAL->MIRRSTS & SCU_GENERAL_MIRRSTS_OSCULCTRL_Msk) + { + /* check SCU_MIRRSTS to ensure that no transfer over serial interface is pending */ + } + SCU_HIBERNATE->OSCULCTRL &= ~SCU_HIBERNATE_OSCULCTRL_MODE_Msk; + + /* Check if the clock is OK using OSCULP Oscillator Watchdog*/ + while (SCU_GENERAL->MIRRSTS & SCU_GENERAL_MIRRSTS_HDCR_Msk) + { + /* check SCU_MIRRSTS to ensure that no transfer over serial interface is pending */ + } + SCU_HIBERNATE->HDCR |= SCU_HIBERNATE_HDCR_ULPWDGEN_Msk; + + /* wait till clock is stable */ + do + { + while (SCU_GENERAL->MIRRSTS & SCU_GENERAL_MIRRSTS_HDCLR_Msk) + { + /* check SCU_MIRRSTS to ensure that no transfer over serial interface is pending */ + } + SCU_HIBERNATE->HDCLR |= SCU_HIBERNATE_HDCLR_ULPWDG_Msk; + + delay(DELAY_CNT_50US_50MHZ); + + } while ((SCU_HIBERNATE->HDSTAT & SCU_HIBERNATE_HDSTAT_ULPWDG_Msk) != 0UL); + + } + + /* now OSC_ULP is running and can be used*/ + /* Select OSC_ULP as the clock source for RTC and STDBY*/ + while (SCU_GENERAL->MIRRSTS & SCU_GENERAL_MIRRSTS_HDCR_Msk) + { + /* check SCU_MIRRSTS to ensure that no transfer over serial interface is pending */ + } + SCU_HIBERNATE->HDCR |= SCU_HIBERNATE_HDCR_RCS_Msk | SCU_HIBERNATE_HDCR_STDBYSEL_Msk; + +#endif /* STDBY_CLOCK_SRC == STDBY_CLOCK_SRC_OSCULP */ + + /* Enable automatic calibration of internal fast oscillator */ + SCU_PLL->PLLCON0 |= SCU_PLL_PLLCON0_AOTREN_Msk; +#endif /* FOFI_CALIBRATION_MODE == FOFI_CALIBRATION_MODE_AUTOMATIC */ + + delay(DELAY_CNT_50US_50MHZ); + +#if ENABLE_PLL + + /* enable PLL */ + SCU_PLL->PLLCON0 &= ~(SCU_PLL_PLLCON0_VCOPWD_Msk | SCU_PLL_PLLCON0_PLLPWD_Msk); + +#if PLL_CLOCK_SRC != PLL_CLOCK_SRC_OFI + /* enable OSC_HP */ + if ((SCU_OSC->OSCHPCTRL & SCU_OSC_OSCHPCTRL_MODE_Msk) != 0U) + { + SCU_OSC->OSCHPCTRL &= ~(SCU_OSC_OSCHPCTRL_MODE_Msk | SCU_OSC_OSCHPCTRL_OSCVAL_Msk); + SCU_OSC->OSCHPCTRL |= ((OSCHP_GetFrequency() / FOSCREF) - 1UL) << SCU_OSC_OSCHPCTRL_OSCVAL_Pos; + + /* select OSC_HP clock as PLL input */ + SCU_PLL->PLLCON2 = 0; + + /* restart OSC Watchdog */ + SCU_PLL->PLLCON0 &= ~SCU_PLL_PLLCON0_OSCRES_Msk; + + while ((SCU_PLL->PLLSTAT & SCU_PLL_PLLSTAT_OSC_USABLE) != SCU_PLL_PLLSTAT_OSC_USABLE) + { + /* wait till OSC_HP output frequency is usable */ + } + } +#else /* PLL_CLOCK_SRC != PLL_CLOCK_SRC_OFI */ + + /* select backup clock as PLL input */ + SCU_PLL->PLLCON2 = SCU_PLL_PLLCON2_PINSEL_Msk | SCU_PLL_PLLCON2_K1INSEL_Msk; +#endif + + /* Go to bypass the Main PLL */ + SCU_PLL->PLLCON0 |= SCU_PLL_PLLCON0_VCOBYP_Msk; + while ((SCU_PLL->PLLSTAT & SCU_PLL_PLLSTAT_VCOBYST_Msk) == 0U) + { + /* wait for prescaler mode */ + } + + /* disconnect Oscillator from PLL */ + SCU_PLL->PLLCON0 |= SCU_PLL_PLLCON0_FINDIS_Msk; + + /* Setup divider settings for main PLL */ + SCU_PLL->PLLCON1 = ((PLL_NDIV << SCU_PLL_PLLCON1_NDIV_Pos) | + (PLL_K2DIV_0 << SCU_PLL_PLLCON1_K2DIV_Pos) | + (PLL_PDIV << SCU_PLL_PLLCON1_PDIV_Pos)); + + /* Set OSCDISCDIS */ + SCU_PLL->PLLCON0 |= SCU_PLL_PLLCON0_OSCDISCDIS_Msk; + + /* connect Oscillator to PLL */ + SCU_PLL->PLLCON0 &= ~SCU_PLL_PLLCON0_FINDIS_Msk; + + /* restart PLL Lock detection */ + SCU_PLL->PLLCON0 |= SCU_PLL_PLLCON0_RESLD_Msk; + + while ((SCU_PLL->PLLSTAT & SCU_PLL_PLLSTAT_VCOLOCK_Msk) == 0U) + { + /* wait for PLL Lock */ + } + + /* Disable bypass- put PLL clock back */ + SCU_PLL->PLLCON0 &= ~SCU_PLL_PLLCON0_VCOBYP_Msk; + while ((SCU_PLL->PLLSTAT & SCU_PLL_PLLSTAT_VCOBYST_Msk) != 0U) + { + /* wait for normal mode */ + } +#endif /* ENABLE_PLL */ + +#if (SYS_CLOCK_SRC == SYS_CLOCK_SRC_PLL) + /* Switch system clock to PLL */ + SCU_CLK->SYSCLKCR |= SCU_CLK_SYSCLKCR_SYSSEL_Msk; +#else + /* Switch system clock to backup clock */ + SCU_CLK->SYSCLKCR &= ~SCU_CLK_SYSCLKCR_SYSSEL_Msk; +#endif + + /* Before scaling to final frequency we need to setup the clock dividers */ + SCU_CLK->PBCLKCR = PBCLKDIV; + SCU_CLK->CPUCLKCR = CPUCLKDIV; + SCU_CLK->CCUCLKCR = CCUCLKDIV; + SCU_CLK->WDTCLKCR = WDTCLKDIV; + SCU_CLK->USBCLKCR = USBCLKDIV; + +#if ENABLE_PLL + /* PLL frequency stepping...*/ + /* Reset OSCDISCDIS */ + SCU_PLL->PLLCON0 &= ~SCU_PLL_PLLCON0_OSCDISCDIS_Msk; + + SCU_PLL->PLLCON1 = ((PLL_NDIV << SCU_PLL_PLLCON1_NDIV_Pos) | + (PLL_K2DIV_1 << SCU_PLL_PLLCON1_K2DIV_Pos) | + (PLL_PDIV << SCU_PLL_PLLCON1_PDIV_Pos)); + + while ((SCU_PLL->PLLSTAT & SCU_PLL_PLLSTAT_K2RDY_Msk) == 0U) + { + /* wait until K2-divider operates on the configured value */ + } + + delay(DELAY_CNT_50US_60MHZ); + + SCU_PLL->PLLCON1 = ((PLL_NDIV << SCU_PLL_PLLCON1_NDIV_Pos) | + (PLL_K2DIV << SCU_PLL_PLLCON1_K2DIV_Pos) | + (PLL_PDIV << SCU_PLL_PLLCON1_PDIV_Pos)); + + while ((SCU_PLL->PLLSTAT & SCU_PLL_PLLSTAT_K2RDY_Msk) == 0U) + { + /* wait until K2-divider operates on the configured value */ + } + + delay(DELAY_CNT_50US_80MHZ); + + SCU_TRAP->TRAPCLR = SCU_TRAP_TRAPCLR_SOSCWDGT_Msk | SCU_TRAP_TRAPCLR_SVCOLCKT_Msk; +#endif /* ENABLE_PLL */ + +#if (((ENABLE_SCUCLK & SCU_CLK_CLKSET_USBCEN_Msk) != 0) && ((USBCLKDIV & SCU_CLK_USBCLKCR_USBSEL_Msk) == SCU_CLK_USBCLKCR_USBSEL_USBPLL)) + /* enable USB PLL first */ + SCU_PLL->USBPLLCON &= ~(SCU_PLL_USBPLLCON_VCOPWD_Msk | SCU_PLL_USBPLLCON_PLLPWD_Msk); + + /* USB PLL uses as clock input the OSC_HP */ + /* check and if not already running enable OSC_HP */ + if ((SCU_OSC->OSCHPCTRL & SCU_OSC_OSCHPCTRL_MODE_Msk) != 0U) + { + /* check if Main PLL is switched on for OSC WDG*/ + if ((SCU_PLL->PLLCON0 &(SCU_PLL_PLLCON0_VCOPWD_Msk | SCU_PLL_PLLCON0_PLLPWD_Msk)) != 0UL) + { + /* enable PLL first */ + SCU_PLL->PLLCON0 &= ~(SCU_PLL_PLLCON0_VCOPWD_Msk | SCU_PLL_PLLCON0_PLLPWD_Msk); + } + + SCU_OSC->OSCHPCTRL &= ~(SCU_OSC_OSCHPCTRL_MODE_Msk | SCU_OSC_OSCHPCTRL_OSCVAL_Msk); + SCU_OSC->OSCHPCTRL |= ((OSCHP_GetFrequency() / FOSCREF) - 1UL) << SCU_OSC_OSCHPCTRL_OSCVAL_Pos; + + /* restart OSC Watchdog */ + SCU_PLL->PLLCON0 &= ~SCU_PLL_PLLCON0_OSCRES_Msk; + + while ((SCU_PLL->PLLSTAT & SCU_PLL_PLLSTAT_OSC_USABLE) != SCU_PLL_PLLSTAT_OSC_USABLE) + { + /* wait till OSC_HP output frequency is usable */ + } + } + + /* Setup USB PLL */ + /* Go to bypass the USB PLL */ + SCU_PLL->USBPLLCON |= SCU_PLL_USBPLLCON_VCOBYP_Msk; + while ((SCU_PLL->USBPLLSTAT & SCU_PLL_USBPLLSTAT_VCOBYST_Msk) == 0U) + { + /* wait for prescaler mode */ + } + + /* disconnect Oscillator from USB PLL */ + SCU_PLL->USBPLLCON |= SCU_PLL_USBPLLCON_FINDIS_Msk; + + /* Setup Divider settings for USB PLL */ + SCU_PLL->USBPLLCON = ((USB_NDIV << SCU_PLL_USBPLLCON_NDIV_Pos) | + (USB_PDIV << SCU_PLL_USBPLLCON_PDIV_Pos)); + + /* Set OSCDISCDIS */ + SCU_PLL->USBPLLCON |= SCU_PLL_USBPLLCON_OSCDISCDIS_Msk; + + /* connect Oscillator to USB PLL */ + SCU_PLL->USBPLLCON &= ~SCU_PLL_USBPLLCON_FINDIS_Msk; + + /* restart PLL Lock detection */ + SCU_PLL->USBPLLCON |= SCU_PLL_USBPLLCON_RESLD_Msk; + + while ((SCU_PLL->USBPLLSTAT & SCU_PLL_USBPLLSTAT_VCOLOCK_Msk) == 0U) + { + /* wait for PLL Lock */ + } + + /* Disable bypass- put PLL clock back */ + SCU_PLL->USBPLLCON &= ~SCU_PLL_USBPLLCON_VCOBYP_Msk; + while ((SCU_PLL->USBPLLSTAT & SCU_PLL_USBPLLSTAT_VCOBYST_Msk) != 0U) + { + /* wait for normal mode */ + } + + /* Reset OSCDISCDIS */ + SCU_PLL->USBPLLCON &= ~SCU_PLL_USBPLLCON_OSCDISCDIS_Msk; + + SCU_TRAP->TRAPCLR = SCU_TRAP_TRAPCLR_UVCOLCKT_Msk; +#endif /* (USBCLKDIV & SCU_CLK_USBCLKCR_USBSEL_Msk) */ + + /* Enable selected clocks */ + SCU_CLK->CLKSET = ENABLE_SCUCLK; + +#if ENABLE_EXTCLK == 1 + /* Configure external clock */ + SCU_CLK->EXTCLKCR = EXTCLKDIV; + +#if EXTCLK_PIN == EXTCLK_PIN_P1_15 + /* P1.15 */ + PORT1->PDR1 &= ~PORT1_PDR1_PD15_Msk; + PORT1->IOCR12 = (PORT1->IOCR12 & ~PORT1_IOCR12_PC15_Msk) | (0x11U << PORT1_IOCR12_PC15_Pos); +#else + /* P0.8 */ + PORT0->HWSEL &= ~PORT0_HWSEL_HW8_Msk; + PORT0->PDR1 &= ~PORT0_PDR1_PD8_Msk; + PORT0->IOCR8 = (PORT0->IOCR8 & ~PORT0_IOCR8_PC8_Msk) | (0x11U << PORT0_IOCR8_PC8_Pos); +#endif + +#endif /* ENABLE_EXTCLK == 1 */ + + SystemCoreClockUpdate(); +} + +__WEAK void SystemCoreClockUpdate(void) +{ + uint32_t pdiv; + uint32_t ndiv; + uint32_t kdiv; + uint32_t temp; + + if (SCU_CLK->SYSCLKCR & SCU_CLK_SYSCLKCR_SYSSEL_Msk) + { + /* fPLL is clock source for fSYS */ + if(SCU_PLL->PLLCON2 & SCU_PLL_PLLCON2_PINSEL_Msk) + { + /* PLL input clock is the backup clock (fOFI) */ + temp = OFI_FREQUENCY; + } + else + { + /* PLL input clock is the high performance osicllator (fOSCHP) */ + temp = OSCHP_GetFrequency(); + } + + /* check if PLL is locked */ + if (SCU_PLL->PLLSTAT & SCU_PLL_PLLSTAT_VCOLOCK_Msk) + { + /* PLL normal mode */ + /* read back divider settings */ + pdiv = ((SCU_PLL->PLLCON1 & SCU_PLL_PLLCON1_PDIV_Msk) >> SCU_PLL_PLLCON1_PDIV_Pos) + 1; + ndiv = ((SCU_PLL->PLLCON1 & SCU_PLL_PLLCON1_NDIV_Msk) >> SCU_PLL_PLLCON1_NDIV_Pos) + 1; + kdiv = ((SCU_PLL->PLLCON1 & SCU_PLL_PLLCON1_K2DIV_Msk) >> SCU_PLL_PLLCON1_K2DIV_Pos) + 1; + + temp = (temp / (pdiv * kdiv)) * ndiv; + } + else + { + /* PLL prescalar mode */ + /* read back divider settings */ + kdiv = ((SCU_PLL->PLLCON1 & SCU_PLL_PLLCON1_K1DIV_Msk) >> SCU_PLL_PLLCON1_K1DIV_Pos) + 1; + + temp = (temp / kdiv); + } + } + else + { + /* fOFI is clock source for fSYS */ + temp = OFI_FREQUENCY; + } + + temp = temp / ((SCU_CLK->SYSCLKCR & SCU_CLK_SYSCLKCR_SYSDIV_Msk) + 1); + temp = temp / ((SCU_CLK->CPUCLKCR & SCU_CLK_CPUCLKCR_CPUDIV_Msk) + 1); + + SystemCoreClock = temp; +} + +__WEAK uint32_t OSCHP_GetFrequency(void) +{ + return OSCHP_FREQUENCY; +} diff --git a/variants/XMC4200/system_XMC4200.h b/variants/XMC4200/system_XMC4200.h new file mode 100755 index 00000000..730d8d9e --- /dev/null +++ b/variants/XMC4200/system_XMC4200.h @@ -0,0 +1,111 @@ +/********************************************************************************************************************* + * @file system_XMC4200.h + * @brief Device specific initialization for the XMC4200-Series according to CMSIS + * @version V1.6 + * @date 23 October 2012 + * + * @cond + ********************************************************************************************************************* + * Copyright (c) 2012-2020, Infineon Technologies AG + * All rights reserved. + * + * Boost Software License - Version 1.0 - August 17th, 2003 + * + * Permission is hereby granted, free of charge, to any person or organization + * obtaining a copy of the software and accompanying documentation covered by + * this license (the "Software") to use, reproduce, display, distribute, + * execute, and transmit the Software, and to prepare derivative works of the + * Software, and to permit third-parties to whom the Software is furnished to + * do so, all subject to the following: + * + * The copyright notices in the Software and this entire statement, including + * the above license grant, this restriction and the following disclaimer, + * must be included in all copies of the Software, in whole or in part, and + * all derivative works of the Software, unless such copies or derivative + * works are solely in the form of machine-executable object code generated by + * a source language processor. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT + * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE + * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * To improve the quality of the software, users are encouraged to share + * modifications, enhancements or bug fixes with Infineon Technologies AG + * at XMCSupport@infineon.com. + ********************************************************************************************************************* + * + **************************** Change history ********************************* + ***************************************************************************** + * @endcond + */ + +#ifndef SYSTEM_XMC4200_H +#define SYSTEM_XMC4200_H + +/******************************************************************************* + * HEADER FILES + *******************************************************************************/ + +#include + +/******************************************************************************* + * MACROS + *******************************************************************************/ +#define OFI_FREQUENCY (24000000UL) /**< 24MHz Backup Clock (fOFI) frequency. */ +#define OSI_FREQUENCY (32768UL) /**< 32KHz Internal Slow Clock source (fOSI) frequency. */ + +/******************************************************************************* + * GLOBAL VARIABLES + *******************************************************************************/ +extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ +extern uint8_t g_chipid[16]; /*!< Unique chip ID */ +extern uint32_t g_hrpwm_char_data[3]; /*!< HRPWM characterization data */ + +/******************************************************************************* + * API PROTOTYPES + *******************************************************************************/ + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @brief Initialize the system + * + */ +void SystemInit(void); + +/** + * @brief Initialize CPU settings + * + */ +void SystemCoreSetup(void); + +/** + * @brief Initialize clock + * + */ +void SystemCoreClockSetup(void); + +/** + * @brief Update SystemCoreClock variable + * + */ +void SystemCoreClockUpdate(void); + +/** + * @brief Returns frequency of the high performace oscillator + * User needs to overload this function to return the correct oscillator frequency + */ +uint32_t OSCHP_GetFrequency(void); + +#ifdef __cplusplus +} +#endif + + +#endif From a4065c70010a93a6aa309c2fc05014817276d165 Mon Sep 17 00:00:00 2001 From: boramonideep Date: Mon, 18 Jul 2022 18:40:50 +0200 Subject: [PATCH 33/78] added board parameters for XMC4200_P2GO --- boards.txt | 45 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 45 insertions(+) diff --git a/boards.txt b/boards.txt index 9825a22f..37f52b60 100644 --- a/boards.txt +++ b/boards.txt @@ -305,6 +305,51 @@ XMC1400_Arduino_Kit.menu.LIB.DSP.library.selected=-DARM_LIB_CMSIS_DSP XMC1400_Arduino_Kit.menu.LIB.DSPNN=ARM DSP / ARM NN Framework XMC1400_Arduino_Kit.menu.LIB.DSPNN.library.selected=-DARM_LIB_CMSIS_DSP -DARM_LIB_CMSIS_NN +#################################################### +XMC4200_Platform2GO.name=XMC4200 Platform 2GO +XMC4200_Platform2GO.upload.tool=xmcprog +XMC4200_Platform2GO.upload.speed=115200 +XMC4200_Platform2GO.upload.resetmethod=ck +XMC4200_Platform2GO.upload.maximum_size=262144 +XMC4200_Platform2GO.upload.wait_for_upload_port=true + +XMC4200_Platform2GO.communication=usb +XMC4200_Platform2GO.protocol=dragon_isp +XMC4200_Platform2GO.program.protocol=dragon_isp +XMC4200_Platform2GO.program.tool=xmcprog +XMC4200_Platform2GO.program.extra_params=-Pusb + +XMC4200_Platform2GO.serial.disableDTR=true +XMC4200_Platform2GO.serial.disableRTS=true + +XMC4200_Platform2GO.build.mcu=cortex-m4 +XMC4200_Platform2GO.build.f_cpu=144000000L +XMC4200_Platform2GO.build.board=ARM_XMC +XMC4200_Platform2GO.build.board.version=4200 +XMC4200_Platform2GO.build.board.type=F64x256 +XMC4200_Platform2GO.build.board.v=256 +XMC4200_Platform2GO.build.core=./ +XMC4200_Platform2GO.build.variant=XMC4200 +XMC4200_Platform2GO.build.board_variant=XMC4200_Platform2GO +XMC4200_Platform2GO.build.flash_size=256K +XMC4200_Platform2GO.build.flash_ld=linker_script.ld +XMC4200_Platform2GO.build.extra_flags=-DARM_MATH_CM4 -DARM_MATH_DSP +#-DUSB0 + +XMC4200_Platform2GO.menu.UART.debug=PC +XMC4200_Platform2GO.menu.UART.debug.uart.selected=-DSERIAL_HOSTPC +XMC4200_Platform2GO.menu.UART.onBoard=On Board +XMC4200_Platform2GO.menu.UART.onBoard.uart.selected=-DSERIAL_ONBOARD + +XMC4200_Platform2GO.menu.LIB.NONE=None +XMC4200_Platform2GO.menu.LIB.NONE.library.selected= +XMC4200_Platform2GO.menu.LIB.DSPNN=ARM DSP / ARM NN Framework +XMC4200_Platform2GO.menu.LIB.DSPNN.library.selected=-DARM_LIB_CMSIS_DSP -DARM_LIB_CMSIS_NN +XMC4200_Platform2GO.menu.LIB.NN=ARM NN Framework +XMC4200_Platform2GO.menu.LIB.NN.library.selected=-DARM_LIB_CMSIS_NN +XMC4200_Platform2GO.menu.LIB.DSP=ARM DSP +XMC4200_Platform2GO.menu.LIB.DSP.library.selected=-DARM_LIB_CMSIS_DSP + #################################################### XMC4400_Platform2GO.name=XMC4400 Platform 2GO From e6c992d8d2fe47bb65dc949d95c40c7137ac16e0 Mon Sep 17 00:00:00 2001 From: boramonideep Date: Wed, 20 Jul 2022 16:02:35 +0200 Subject: [PATCH 34/78] added PWM on pin 11 --- variants/XMC1100/config/XMC1100_Boot_Kit/pins_arduino.h | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/variants/XMC1100/config/XMC1100_Boot_Kit/pins_arduino.h b/variants/XMC1100/config/XMC1100_Boot_Kit/pins_arduino.h index 4467647b..032163a7 100644 --- a/variants/XMC1100/config/XMC1100_Boot_Kit/pins_arduino.h +++ b/variants/XMC1100/config/XMC1100_Boot_Kit/pins_arduino.h @@ -120,8 +120,8 @@ const XMC_PORT_PIN_t mapping_port_pin[] = /* 7 */ {XMC_GPIO_PORT0, 4}, // GPIO P0.4 /* 8 */ {XMC_GPIO_PORT0, 12},// GPIO P0.12 /* 9 */ {XMC_GPIO_PORT0, 8}, // PWM40-2 output P0.8 - /* 10 */ {XMC_GPIO_PORT0, 9}, // SPI-SS P0.9 - /* 11 */ {XMC_GPIO_PORT1, 1}, // SPI-MOSI P1.1 + /* 10 */ {XMC_GPIO_PORT0, 9}, // SPI-SS / PWM40-3 output P0.9 + /* 11 */ {XMC_GPIO_PORT1, 1}, // SPI-MOSI / PWM40-1 output P1.1 /* 12 */ {XMC_GPIO_PORT1, 0}, // SPI-MISO P1.0 /* 13 */ {XMC_GPIO_PORT0, 7}, // SPI-SCK / LED BUILTIN output P0.7 /* 14 */ {XMC_GPIO_PORT2, 3}, // AREF ** DO NOT USE as GPIO or REF ** P2.3 @@ -164,6 +164,7 @@ const uint8_t mapping_pin_PWM4[][ 2 ] = { { 6, 2 }, { 9, 3 }, { 10, 4 }, + { 11, 5 }, { 255, 255 } }; /* Configurations of PWM channels for CCU4 type */ @@ -173,7 +174,8 @@ XMC_PWM4_t mapping_pwm4[] = {CCU40, CCU40_CC41, 1, mapping_port_pin[4], P0_1_AF_CCU40_OUT1, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 4 P0.1 {CCU40, CCU40_CC43, 3, mapping_port_pin[6], P0_3_AF_CCU40_OUT3, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 6 P0.3 {CCU40, CCU40_CC42, 2, mapping_port_pin[9], P0_8_AF_CCU40_OUT2, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 9 P0.8 - {CCU40, CCU40_CC43, 3, mapping_port_pin[10], P0_9_AF_CCU40_OUT3, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED} // PWM disabled 10 P0.9 + {CCU40, CCU40_CC43, 3, mapping_port_pin[10], P0_9_AF_CCU40_OUT3, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 10 P0.9 + {CCU40, CCU40_CC41, 1, mapping_port_pin[11], P1_1_AF_CCU40_OUT1, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED} // PWM disabled 11 P1.1 }; const uint8_t NUM_PWM = ( sizeof( mapping_pwm4 ) / sizeof( XMC_PWM4_t ) ); const uint8_t NUM_PWM4 = ( sizeof( mapping_pwm4 ) / sizeof( XMC_PWM4_t ) ); From 235a7226abda2c1ff86aaa2174978c7476dc339c Mon Sep 17 00:00:00 2001 From: boramonideep Date: Mon, 25 Jul 2022 14:45:38 +0200 Subject: [PATCH 35/78] corrected comment in pins_arduino --- variants/XMC4400/config/XMC4400_Platform2GO/pins_arduino.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/variants/XMC4400/config/XMC4400_Platform2GO/pins_arduino.h b/variants/XMC4400/config/XMC4400_Platform2GO/pins_arduino.h index 73076f1e..d061dbf4 100644 --- a/variants/XMC4400/config/XMC4400_Platform2GO/pins_arduino.h +++ b/variants/XMC4400/config/XMC4400_Platform2GO/pins_arduino.h @@ -118,7 +118,7 @@ const XMC_PORT_PIN_t mapping_port_pin[]= /* 8 */ {XMC_GPIO_PORT4, 1}, // GPIO / IO_2 P4.1 X1-6 /* 9 */ {XMC_GPIO_PORT0, 11}, // PWM80-31 output / PWM3 P0.11 X2-7 /* 10 */ {XMC_GPIO_PORT0, 2}, // SPI-SS / PWM80-01 / PWM4 P0.2 X2-16 - /* 11 */ {XMC_GPIO_PORT1, 9}, // SPI-MOSI / PWM41-2 P1.9 X1-10 + /* 11 */ {XMC_GPIO_PORT1, 9}, // SPI-MOSI P1.9 X1-10 /* 12 */ {XMC_GPIO_PORT0, 0}, // SPI-MISO P0.0 X2-12 /* 13 */ {XMC_GPIO_PORT1, 8}, // SPI-SCK / GPIO P1.8 X1-9 /* 14 */ {XMC_GPIO_PORT2, 3}, // AREF TODO: / ETH_RXD1 / PWM41-2 P2.3 X1-32 From 913910640b39b328196883394dc463f5930cd839 Mon Sep 17 00:00:00 2001 From: boramonideep Date: Wed, 27 Jul 2022 22:51:37 +0200 Subject: [PATCH 36/78] pin assignments in pins_arduino header file --- .../config/XMC4200_Platform2GO/pins_arduino.h | 147 ++++++------------ 1 file changed, 49 insertions(+), 98 deletions(-) diff --git a/variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h b/variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h index 9fea51f7..fd24d55c 100644 --- a/variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h +++ b/variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h @@ -50,8 +50,8 @@ extern const uint8_t NUM_ANALOG_INPUTS; #ifdef DAC extern const uint8_t NUM_ANALOG_OUTPUTS; #endif -#define NUM_LEDS 2 -#define NUM_BUTTONS 2 +#define NUM_LEDS 1 +#define NUM_BUTTONS 1 #define NUM_SERIAL 1 #define NUM_TONE_PINS 16 #define NUM_TASKS_VARIANT 32 @@ -106,106 +106,57 @@ extern uint8_t SCK; // Mapping of digital pins and comments const XMC_PORT_PIN_t mapping_port_pin[]= { - /* 0 */ {XMC_GPIO_PORT2, 15}, // RX P2.15 - /* 1 */ {XMC_GPIO_PORT2, 14}, // TX P2.14 - /* 2 */ {XMC_GPIO_PORT1, 0}, // GPIO / External INT 0 P1.0 - /* 3 */ {XMC_GPIO_PORT3, 6}, // PWM42-0(PWM0)/ External INT 1 P3.6 - /* 4 */ {XMC_GPIO_PORT1, 6}, // GPIO P1.6 - /* 5 */ {XMC_GPIO_PORT3, 3}, // PWM42-3 output / PWM1 P3.3 - /* 6 */ {XMC_GPIO_PORT3, 4}, // PWM42-2 output / PWM2 P3.4 - /* 7 */ {XMC_GPIO_PORT1, 14}, // GPIO P1.14 - /* 8 */ {XMC_GPIO_PORT4, 1}, // GPIO P4.1 - /* 9 */ {XMC_GPIO_PORT0, 11}, // PWM80-31 output / PWM3 P0.11 - /* 10 */ {XMC_GPIO_PORT0, 2}, // SPI-SS / PWM80-01 / PWM4 P0.2 - /* 11 */ {XMC_GPIO_PORT1, 9}, // SPI-MOSI / PWM41-2 / PWM5 P1.9 - /* 12 */ {XMC_GPIO_PORT0, 0}, // SPI-MISO P0.0 - /* 13 */ {XMC_GPIO_PORT1, 8}, // SPI-SCK P1.8 - /* 14 */ {XMC_GPIO_PORT2, 3}, // AREF TODO: P2.3 - /* 15 */ {XMC_GPIO_PORT2, 5}, // I2C Data / Address SDA / A4 P2.5 (Hardwired to A4) - /* 16 */ {XMC_GPIO_PORT3, 0}, // I2C Clock SCL / A5 P3.0 (Hardwired to A5) - /* 17 */ {XMC_GPIO_PORT14, 0}, // A0 / ADC Input P14.0 (INPUT ONLY) - /* 18 */ {XMC_GPIO_PORT14, 1}, // A1 / ADC Input P14.1 (INPUT ONLY) - /* 19 */ {XMC_GPIO_PORT14, 2}, // A2 / ADC Input P14.2 (INPUT ONLY) - /* 20 */ {XMC_GPIO_PORT14, 3}, // A3 / ADC Input P14.3 (INPUT ONLY) - /* 21 */ {XMC_GPIO_PORT14, 4}, // A4 / ADC Input / SDA P14.4 (Hardwired to SDA) - /* 22 */ {XMC_GPIO_PORT14, 5}, // A5 / ADC Input / SCL P14.5 (Hardwired to SCL) - /* 23 */ {XMC_GPIO_PORT1, 15}, // USB Debug RX P1.15 - /* 24 */ {XMC_GPIO_PORT0, 5}, // USB Debug TX P0.5 - + /* 0 */ {XMC_GPIO_PORT2, 15}, // RX P2.15 X1-4 + /* 1 */ {XMC_GPIO_PORT2, 14}, // TX P2.14 X1-3 + /* 2 */ {XMC_GPIO_PORT1, 0}, // GPIO / External INT 0 P1.0 X1-11 + /* 3 */ {XMC_GPIO_PORT2, 2}, // PWM41-3(PWM0) / External INT 1 P2.2 X1-31 + /* 4 */ {XMC_GPIO_PORT2, 9}, // IO_0 P2.9 X1-36 + /* 5 */ {XMC_GPIO_PORT2, 3}, // PWM41-2 output / PWM1 P2.3 X1-32 + /* 6 */ {XMC_GPIO_PORT2, 4}, // PWM41-1 output / PWM2 P2.4 X1-33 + /* 7 */ {XMC_GPIO_PORT2, 8}, // IO_1 P2.8 X1-35 + + /* 8 */ {XMC_GPIO_PORT2, 6}, // IO_2 P2.6 X1-27 + /* 9 */ {XMC_GPIO_PORT0, 11}, // PWM80-31 output / PWM3 P0.11 X2-7 + /* 10 */ {XMC_GPIO_PORT1, 7}, // SPI-CS P1.7 X1-8 + /* 11 */ {XMC_GPIO_PORT1, 9}, // SPI-MOSI P1.9 X1-10 + /* 12 */ {XMC_GPIO_PORT0, 0}, // SPI-MISO P0.0 X2-18 + /* 13 */ {XMC_GPIO_PORT1, 8}, // SPI-SCK P1.8 X1-9 + /* 14 */ {XMC_GPIO_PORT2, 5}, // I2C Data / Address SDA / A4 P2.5 (Hardwired to A4) X1-34 + /* 15 */ {XMC_GPIO_PORT3, 0}, // I2C Clock SCL / A5 P3.0 (Hardwired to A5) X2-19 + /* 16 */ {XMC_GPIO_PORT14, 0}, // A0 / ADC Input P14.0 (INPUT ONLY) X2-34 + /* 17 */ {XMC_GPIO_PORT14, 6}, // A1 / ADC Input P14.6 (INPUT ONLY) X2-25 + /* 18 */ {XMC_GPIO_PORT14, 7}, // A2 / ADC Input P14.7 (INPUT ONLY) X2-28 + /* 19 */ {XMC_GPIO_PORT14, 8}, // A3 / ADC Input / AN_MikroBus / DAC0 P14.8 (INPUT ONLY) X2-33 + /* 20 */ {XMC_GPIO_PORT14, 4}, // A4 / ADC Input / SDA / AN1_2GO_1 P14.4 (Hardwired to SDA) X2-24 + /* 21 */ {XMC_GPIO_PORT14, 5}, // A5 / ADC Input / SCL / AN2_2GO_2 P14.5 (Hardwired to SCL) X2-30 + //Additional pins for port X1 starting here - /* 25 */ {XMC_GPIO_PORT2, 10}, // GPIO / ETH_LED P2.10 - /* 26 */ {XMC_GPIO_PORT2, 8}, // GPIO / ETH_TXDO P2.8 - /* 27 */ {XMC_GPIO_PORT2, 4}, // GPIO / ETH_RXER P2.4 - /* 28 */ {XMC_GPIO_PORT2, 2}, // GPIO / ETH_RXDO P2.2 - /* 29 */ {XMC_GPIO_PORT2, 0}, // GPIO / ETH_MDIO P2.0 - /* 30 */ {XMC_GPIO_PORT2, 6}, // PWM8 - / PWM / GPIO4_2GO_2 P2.6 - /* 31 */ {XMC_GPIO_PORT5, 2}, // GPIO / RST P5.2 - /* 32 */ {XMC_GPIO_PORT5, 0}, // GPIO1_2GO_1 P5.0 - /* 33 */ {XMC_GPIO_PORT1, 14}, // GPIO / IO_1 P1.14 - /* 34 */ {XMC_GPIO_PORT1, 12}, // GPIO / CAN_TX P1.12 - /* 35 */ {XMC_GPIO_PORT1, 10}, // GPIO / GPIO2_2GO_1 P1.10 - /* 36 */ {XMC_GPIO_PORT1, 4}, // GPIO / QSPI_IO1 P1.4 - /* 37 */ {XMC_GPIO_PORT1, 2}, // GPIO / QSPI_IO3 P1.2 - /* 38 */ {XMC_GPIO_PORT1, 0}, // GPIO / External INT 0 P1.0 - /* 39 */ {XMC_GPIO_PORT1, 8}, // GPIO / SPI-SCK P1.8 - /* 40 */ {XMC_GPIO_PORT1, 6}, // GPIO / IO_0 P1.6 - /* 41 */ {XMC_GPIO_PORT4, 0}, // GPIO / GPIO2_2GO_2 P1.0 - /* 42 */ {XMC_GPIO_PORT2, 14}, // UART TX P2.14 - /* 43 */ {XMC_GPIO_PORT2, 15}, // UART RX P2.15 - /* 44 */ {XMC_GPIO_PORT4, 1}, // GPIO / IO_2 P4.1. - /* 45 */ {XMC_GPIO_PORT1, 7}, // GPIO / SPI_CS_2GO_2 P1.7 (Chip Select - Slot 2) - /* 46 */ {XMC_GPIO_PORT1, 9}, // SPI-MOSI / PWM41-2 / PWM5 P1.9 - /* 47 */ {XMC_GPIO_PORT1, 1}, // GPIO1_2GO_2 P1.1 - /* 48 */ {XMC_GPIO_PORT1, 3}, // GPIO / QSPI_IO3 P1.3 - /* 49 */ {XMC_GPIO_PORT1, 5}, // GPIO / QSPI_IO0 P1.5 - /* 50 */ {XMC_GPIO_PORT1, 11}, // GPIO / QSPI_CS P1.11 - /* 51 */ {XMC_GPIO_PORT1, 13}, // GPIO / CAN_RX P1.13 - /* 52 */ {XMC_GPIO_PORT1, 15}, // USB Debug RX P1.15 - /* 53 */ {XMC_GPIO_PORT5, 1}, // GPIO / ETH_INT P5.1 - /* 54 */ {XMC_GPIO_PORT5, 7}, // PWM8 - / PWM P5.7 - /* 55 */ {XMC_GPIO_PORT2, 7}, // PWM8 - / PWM / ETH_MDC P2.7 - /* 56 */ {XMC_GPIO_PORT2, 1}, // SWV ""DEBUG Do NOT Use ** P2.1 - /* 57 */ {XMC_GPIO_PORT2, 3}, // AREF TODO: / ETH_RXD1 P2.3 - /* 58 */ {XMC_GPIO_PORT2, 5}, // I2C Data - SDA / A4 P2.5 (Hardwired to A4) - /* 59 */ {XMC_GPIO_PORT2, 9}, // PWM8 - / PWM / ETH_TXD1 P2.9 - /* 60 */ {XMC_GPIO_PORT15, 8}, // A16 / ETH_CLK P15.8 + /* 22 */ {XMC_GPIO_PORT1, 1}, // PWM_MikroBus P1.1 X1-12 + /* 23 */ {XMC_GPIO_PORT1, 2}, // PWM / GPIO4_S2GO_1 P1.2 X1-13 + /* 24 */ {XMC_GPIO_PORT1, 3}, // PWM / GPIO4_2GO_2 P1.3 X1-14 + /* 25 */ {XMC_GPIO_PORT1, 4}, // PC_TXD P1.4 X1-15 + /* 26 */ {XMC_GPIO_PORT1, 5}, // PC_RXD P1.5 X1-16 + /* 27 */ {XMC_GPIO_PORT1, 15}, // BUTTON1 P1.15 X1-22 + /* 28 */ {XMC_GPIO_PORT2, 7}, // RST_MikroBus P2.7 X1-28 + /* 29 */ {XMC_GPIO_PORT2, 0}, // CAN_TX P2.0 X1-29 + /* 30 */ {XMC_GPIO_PORT2, 1}, // GPIO1_2GO_2 P2.1 X1-30 //Additional pins for port X2 starting here - /* 61 */ {XMC_GPIO_PORT14, 8}, // A14 / DAC 0 Output P14.8 - /* 62 */ {XMC_GPIO_PORT15, 2}, // A12 - ADC Input P15.2 (INPUT ONLY) - /* 63 */ {XMC_GPIO_PORT14, 15}, // A11 - ADC Input P14.15 (INPUT ONLY) - /* 64 */ {XMC_GPIO_PORT15, 9}, // A17 - ADC Input / ETH_CRS P15.9 - /* 65 */ {XMC_GPIO_PORT14, 6}, // A6 / AN1_2GO_1 - ADC Input P14.6 (INPUT ONLY) - /* 66 */ {XMC_GPIO_PORT14, 12}, // A8 / AN1_2GO_2 - ADC Input P14.12 (INPUT ONLY) - /* 67 */ {XMC_GPIO_PORT14, 14}, // A10 / ADC Input P14.14 (INPUT ONLY) - /* 68 */ {XMC_GPIO_PORT3, 0}, // I2C Clk SCL / A5 - ADC Input P3.0 (Hardwired to A5) - /* 69 */ {XMC_GPIO_PORT3, 2}, // BUTTON2 P3.2 - /* 70 */ {XMC_GPIO_PORT0, 10}, // INT / GPIO3_2GO_1 P0.10 - /* 71 */ {XMC_GPIO_PORT0, 1}, // INT P0.1 - /* 72 */ {XMC_GPIO_PORT0, 3}, // INT / GPIO3_2GO_2 P0.3 - /* 73 */ {XMC_GPIO_PORT0, 5}, // USB Debug TX P0.5 - /* 74 */ {XMC_GPIO_PORT0, 11}, // PWM80-31 output / PWM3 P0.11 - /* 75 */ {XMC_GPIO_PORT3, 3}, // PWM42-3 output / PWM1 P3.3 - /* 76 */ {XMC_GPIO_PORT3, 5}, // CS_2GO_1 P3.5 (Chip Select - Slot 1) - /* 77 */ {XMC_GPIO_PORT0, 7}, // LED2 P0.7 - /* 78 */ {XMC_GPIO_PORT0, 8}, // QSPI_CLK P0.8 - /* 79 */ {XMC_GPIO_PORT3, 6}, // PWM42-0(PWM0)/ External INT 1 P3.6 - /* 80 */ {XMC_GPIO_PORT3, 4}, // PWM42-2 output / PWM2 P3.4 - /* 81 */ {XMC_GPIO_PORT0, 12}, // CS_MB P0.12 - /* 82 */ {XMC_GPIO_PORT0, 6}, // LED1 P0.6 - /* 83 */ {XMC_GPIO_PORT0, 4}, // ETH_TXEN P0.4 - /* 84 */ {XMC_GPIO_PORT0, 2}, // SPI-CS / PWM80-01 / PWM4 P0.2 - /* 85 */ {XMC_GPIO_PORT0, 0}, // SPI-MISO P0.0 - /* 86 */ {XMC_GPIO_PORT0, 9}, // GPIO4_2GO_1 / PWM80-01 / PWM P0.9 - /* 87 */ {XMC_GPIO_PORT3, 1}, // BUTTON1 P3.1 - /* 88 */ {XMC_GPIO_PORT14, 4}, // A4 - ADC Input / SDA P14.4 (Hardwired to SDA) - /* 89 */ {XMC_GPIO_PORT14, 13}, // A9 / AN2_2GO_2 - ADC Input P14.13 (INPUT ONLY) - /* 90 */ {XMC_GPIO_PORT14, 7}, // A7 / AN2_2GO_1 - ADC Input P14.7 (INPUT ONLY) - /* 91 */ {XMC_GPIO_PORT14, 5}, // A5 - ADC Input / SCL P14.5 (Hardwired to SCL) - /* 92 */ {XMC_GPIO_PORT14, 3}, // A3 - ADC Input P14.3 (INPUT ONLY) - /* 93 */ {XMC_GPIO_PORT15, 3}, // A13 - ADC Input P15.3 (INPUT ONLY) - /* 94 */ {XMC_GPIO_PORT14, 9} // A15 / DAC 1 Output P14.9 + /* 31 */ {XMC_GPIO_PORT0, 7}, // SPI-CS_MikroBus P0.7 X2-1 + /* 32 */ {XMC_GPIO_PORT0, 8}, // RST / GPIO2_2GO_1 P0.8 X2-4 + /* 33 */ {XMC_GPIO_PORT0, 5}, // INT / GPIO3_2GO_1 P0.5 X2-9 + /* 34 */ {XMC_GPIO_PORT0, 3}, // INT / GPIO3_2GO_2 P0.3 X2-11 + /* 35 */ {XMC_GPIO_PORT0, 6}, // RST / GPIO2_2GO_2 P0.6 X2-12 + /* 36 */ {XMC_GPIO_PORT0, 1}, // LED1 P0.1 X2-13 + /* 37 */ {XMC_GPIO_PORT0, 4}, // GPIO1_S2GO_1 P0.4 X2-14 + /* 38 */ {XMC_GPIO_PORT0, 10}, // INT_MikroBus P0.10 X2-15 + /* 39 */ {XMC_GPIO_PORT0, 2}, // SPI-CS_2GO_1 P0.2 X2-16 + /* 40 */ {XMC_GPIO_PORT0, 9}, // SPI-CS_2GO_2 P0.9 X2-20 + /* 41 */ {XMC_GPIO_PORT14, 14}, // AN2_2GO_1 P14.14 X2-21 + /* 42 */ {XMC_GPIO_PORT14, 3}, // CAN_RX P14.3 X2-32 + /* 43 */ {XMC_GPIO_PORT14, 9}, // AN1_2GO_2 / DAC1 P14.9 X2-36 }; + const uint8_t GND = ( sizeof( mapping_port_pin ) / sizeof( XMC_PORT_PIN_t ) ); const uint8_t NUM_DIGITAL = ( sizeof( mapping_port_pin ) / sizeof( XMC_PORT_PIN_t ) );; From 41f160f119eac800fb6660bd02f45735c042d090 Mon Sep 17 00:00:00 2001 From: boramonideep Date: Thu, 28 Jul 2022 00:26:35 +0200 Subject: [PATCH 37/78] fixed PWM4, PWM8 & DAC pins --- .../config/XMC4200_Platform2GO/pins_arduino.h | 62 ++++++------------- 1 file changed, 18 insertions(+), 44 deletions(-) diff --git a/variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h b/variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h index fd24d55c..9c1c213c 100644 --- a/variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h +++ b/variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h @@ -94,11 +94,9 @@ extern uint8_t SCK; #define A16 16 // ADC G3CH0 on P15.8 #define A17 17 // ADC G3CH1 on P15.9 -#define LED1 82 // Additional LED1 -#define LED2 77 // Additional LED2 +#define LED1 36 // Additional LED1 #define LED_BUILTIN LED1 // Standard Arduino LED: Uses LED1 -#define BUTTON1 87 // Additional BUTTON1 -#define BUTTON2 69 // Additional BUTTON2 +#define BUTTON1 27 // Additional BUTTON1 #define digitalPinToInterrupt(p) ((p) == 2 ? 0 : ((p) == 3 ? 1 : NOT_AN_INTERRUPT)) @@ -109,7 +107,7 @@ const XMC_PORT_PIN_t mapping_port_pin[]= /* 0 */ {XMC_GPIO_PORT2, 15}, // RX P2.15 X1-4 /* 1 */ {XMC_GPIO_PORT2, 14}, // TX P2.14 X1-3 /* 2 */ {XMC_GPIO_PORT1, 0}, // GPIO / External INT 0 P1.0 X1-11 - /* 3 */ {XMC_GPIO_PORT2, 2}, // PWM41-3(PWM0) / External INT 1 P2.2 X1-31 + /* 3 */ {XMC_GPIO_PORT2, 2}, // PWM41-3 / PWM0 / External INT 1 P2.2 X1-31 /* 4 */ {XMC_GPIO_PORT2, 9}, // IO_0 P2.9 X1-36 /* 5 */ {XMC_GPIO_PORT2, 3}, // PWM41-2 output / PWM1 P2.3 X1-32 /* 6 */ {XMC_GPIO_PORT2, 4}, // PWM41-1 output / PWM2 P2.4 X1-33 @@ -163,7 +161,7 @@ const uint8_t NUM_DIGITAL = ( sizeof( mapping_port_pin ) / sizeof( XMC_PORT_PIN_ const XMC_PIN_INTERRUPT_t mapping_interrupt[] = { /* 0 */ {CCU40, CCU40_CC43, 3, 0, CCU40_IN3_P1_0}, - /* 1 */ {CCU42, CCU42_CC40, 0, 1, CCU42_IN0_P3_6} + /* 1 */ {CCU41, CCU41_CC43, 3, 1, CCU41_IN3_P2_2} }; const uint8_t NUM_INTERRUPT = ( sizeof( mapping_interrupt ) / sizeof( XMC_PIN_INTERRUPT_t ) ); @@ -176,57 +174,33 @@ const uint8_t mapping_pin_PWM4[][ 2 ] = { { 3, 0 }, // PWM0 { 5, 1 }, // PWM1 { 6, 2 }, // PWM2 - { 11, 3 }, // PWM5 - { 27, 4 }, // PWM - { 28, 5 }, // PWM - { 57, 6 }, // PWM - { 58, 7 }, // PWM + { 22, 3 }, // PWM + { 23, 4 }, // PWM + { 24, 5 }, // PWM { 255, 255 } }; /* Configurations of PWM channels for CCU4 type */ XMC_PWM4_t mapping_pwm4[] = { - {CCU42, CCU42_CC40, 0, mapping_port_pin[3], P3_6_AF_CCU42_OUT0, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 3 P3.6 - {CCU42, CCU42_CC43, 3, mapping_port_pin[5], P3_3_AF_CCU42_OUT3, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 5 P3.3 - {CCU42, CCU42_CC42, 2, mapping_port_pin[6], P3_4_AF_CCU42_OUT2, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 6 P3.4 - + {CCU41, CCU41_CC43, 3, mapping_port_pin[3], P2_2_AF_CCU41_OUT3, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 3 P2.2 + {CCU41, CCU41_CC42, 2, mapping_port_pin[5], P2_3_AF_CCU41_OUT2, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 5 P2.3 + {CCU41, CCU41_CC41, 1, mapping_port_pin[6], P2_4_AF_CCU41_OUT1, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 6 P2.4 //additional pwm outputs starting here - {CCU41, CCU41_CC41, 1, mapping_port_pin[27], P2_4_AF_CCU41_OUT1, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 27 P2.4 - {CCU41, CCU41_CC43, 3, mapping_port_pin[28], P2_2_AF_CCU41_OUT3, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 28 P2.2 - {CCU41, CCU41_CC42, 2, mapping_port_pin[57], P2_3_AF_CCU41_OUT2, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 57 P2.3 - {CCU41, CCU41_CC41, 0, mapping_port_pin[58], P2_5_AF_CCU41_OUT0, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 58 P2.5 + {CCU40, CCU40_CC42, 2, mapping_port_pin[22], P1_1_AF_CCU40_OUT2, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 22 P1.1 + {CCU40, CCU40_CC41, 1, mapping_port_pin[23], P1_2_AF_CCU40_OUT1, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 23 P1.2 + {CCU40, CCU40_CC40, 0, mapping_port_pin[24], P1_3_AF_CCU40_OUT0, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED} // PWM disabled 24 P1.3 }; const uint8_t NUM_PWM4 = ( sizeof( mapping_pwm4 ) / sizeof( XMC_PWM4_t ) ); /* Mapping in same manner as PWM4 for PWM8 channels */ const uint8_t mapping_pin_PWM8[][ 2 ] = { { 9, 0 }, // PWM3 - { 10, 1 }, // PWM4 - { 26, 2 }, // PWM - { 29, 3 }, // PWM - { 30, 4 }, // PWM - { 54, 5 }, // PWM - { 55, 6 }, // PWM - { 59, 7 }, // PWM - { 86, 8 }, // PWM { 255, 255 } }; /* Configurations of PWM channels for CCU8 type */ XMC_PWM8_t mapping_pwm8[] = { - {CCU80, CCU80_CC83, 3, XMC_CCU8_SLICE_COMPARE_CHANNEL_2, mapping_port_pin[9], P0_11_AF_CCU80_OUT31, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 9 P0.11 - {CCU80, CCU80_CC80, 0, XMC_CCU8_SLICE_COMPARE_CHANNEL_2, mapping_port_pin[10], P0_2_AF_CCU80_OUT01, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 10 P0.2 - - //additional pwm outputs starting here - {CCU80, CCU80_CC80, 0, XMC_CCU8_SLICE_COMPARE_CHANNEL_1, mapping_port_pin[55], P2_7_AF_CCU80_OUT03, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 55 P2.7 - {CCU80, CCU80_CC81, 1, XMC_CCU8_SLICE_COMPARE_CHANNEL_1, mapping_port_pin[86], P0_9_AF_CCU80_OUT12, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 86 P0.9 - {CCU80, CCU80_CC81, 1, XMC_CCU8_SLICE_COMPARE_CHANNEL_2, mapping_port_pin[30], P2_6_AF_CCU80_OUT13, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 30 P2.6 - {CCU80, CCU80_CC82, 2, XMC_CCU8_SLICE_COMPARE_CHANNEL_1, mapping_port_pin[59], P2_9_AF_CCU80_OUT22, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 59 P2.9 - {CCU80, CCU80_CC83, 3, XMC_CCU8_SLICE_COMPARE_CHANNEL_1, mapping_port_pin[26], P2_8_AF_CCU80_OUT32, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 26 P2.8 - {CCU81, CCU81_CC80, 0, XMC_CCU8_SLICE_COMPARE_CHANNEL_1, mapping_port_pin[54], P5_7_AF_CCU81_OUT02, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 54 P5.7 - {CCU81, CCU81_CC82, 1, XMC_CCU8_SLICE_COMPARE_CHANNEL_2, mapping_port_pin[29], P2_0_AF_CCU81_OUT21, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED} // PWM disabled 29 P2.0 -/* {CCU81, CCU81_CC81, 1, XMC_CCU8_SLICE_COMPARE_CHANNEL_2, mapping_port_pin[82], P5_5_AF_CCU81_OUT12, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 82 P5.5 - {CCU81, CCU81_CC82, 2, XMC_CCU8_SLICE_COMPARE_CHANNEL_2, mapping_port_pin[81], P5_3_AF_CCU81_OUT22, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED} // PWM disabled 81 P5.3*/ + {CCU80, CCU80_CC83, 3, XMC_CCU8_SLICE_COMPARE_CHANNEL_1, mapping_port_pin[9], P0_11_AF_CCU80_OUT31, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED} // PWM disabled 9 P0.11 }; const uint8_t NUM_PWM8 = ( sizeof( mapping_pwm8 ) / sizeof( XMC_PWM8_t ) ); const uint8_t NUM_PWM = ( sizeof( mapping_pwm4 ) / sizeof( XMC_PWM4_t ) ) @@ -235,15 +209,15 @@ const uint8_t NUM_PWM = ( sizeof( mapping_pwm4 ) / sizeof( XMC_PWM4_t ) ) /* Analog Pin mappings and configurations */ #ifdef DAC const uint8_t mapping_pin_DAC[][ 2 ] = { - { 61, 0 }, - { 94, 1 }, + { 19, 0 }, + { 43, 1 }, { 255, 255 } }; /* Analog Pin mappings and configurations */ XMC_ARD_DAC_t mapping_dac[] = { - {XMC_DAC0, 1, 12}, - {XMC_DAC0, 0, 12} + {XMC_DAC0, 0, 12}, + {XMC_DAC0, 1, 12} }; const uint8_t NUM_ANALOG_OUTPUTS = ( sizeof( mapping_dac ) / sizeof( XMC_ARD_DAC_t ) ); #endif From 156dba51c3a413df2b5492b33436c77221a05390 Mon Sep 17 00:00:00 2001 From: boramonideep Date: Thu, 28 Jul 2022 13:48:03 +0200 Subject: [PATCH 38/78] removed whitespace --- boards.txt | 1 - 1 file changed, 1 deletion(-) diff --git a/boards.txt b/boards.txt index 37f52b60..559a400a 100644 --- a/boards.txt +++ b/boards.txt @@ -350,7 +350,6 @@ XMC4200_Platform2GO.menu.LIB.NN.library.selected=-DARM_LIB_CMSIS_NN XMC4200_Platform2GO.menu.LIB.DSP=ARM DSP XMC4200_Platform2GO.menu.LIB.DSP.library.selected=-DARM_LIB_CMSIS_DSP - #################################################### XMC4400_Platform2GO.name=XMC4400 Platform 2GO XMC4400_Platform2GO.upload.tool=xmcprog From cfe3c4dec4063d5f361baeb9b4657c1b71590e7f Mon Sep 17 00:00:00 2001 From: Paul Carpenter Date: Fri, 29 Jul 2022 00:47:32 +0100 Subject: [PATCH 39/78] Update LED Library DOCUMENTATION for new boards Correct typos tidy up Improve library description --- libraries/LED/Readme.md | 42 ++++++++++--------- .../LED/examples/SimpleLED/SimpleLED.ino | 8 +--- libraries/LED/library.properties | 4 +- .../config/XMC4400_Platform2GO/pins_arduino.h | 4 +- .../config/XMC4700_Relax_Kit/pins_arduino.h | 4 +- 5 files changed, 31 insertions(+), 31 deletions(-) diff --git a/libraries/LED/Readme.md b/libraries/LED/Readme.md index d104e4af..29f734c7 100644 --- a/libraries/LED/Readme.md +++ b/libraries/LED/Readme.md @@ -5,8 +5,9 @@ **Author** | : | Paul Carpenter | | | PC Services | | | www.pcserviceselectronics.co.uk -**Version** | : | V1.00 -**Date** | : | July 2018 +**Version** | : | V1.01 +**Updated** | : | July 2022 +Date | : | July 2018 Infineon XMC-for-Arduino RTC Library, to assist in making board agnostic examples that will work the same across all boards. This file will be available in the library folder. @@ -35,28 +36,31 @@ Unfortunately the on-board LEDs on the XMC range of boards work differently betw models. There is no consistent, on board LED driven by the same state to be ON across all models of board so we end up with -| Board | ON state | -| :---- | :---: | - XMC1100 Boot Kit | Low - XMC1100 XMC2GO | High - XMC1100 XMC H Bridge2GO | High - XMC1300 Boot Kit | Low - XMC1300 Sense2GOL | Low - XMC4700 Relax Kit | Low +| Board | Normal LEDs
    ON state | LED_BUILTIN
    Separate | LED_BUILTIN
    ON state +| :---- | :---: | :---: | :---: | + XMC1100 Boot Kit | Low | Yes | High + XMC1100 XMC2GO | High | No | High + XMC1100 XMC H Bridge2GO | High| No | High + XMC1300 Boot Kit | Low | No | Low + XMC1300 Sense2GOL | Low| No | Low + XMC1400 Arduino Kit | Low | Yes | High + XMC4400 Platform2Go | High| No | High + XMC4700 Relax Kit | High| No | High + XMC4700 Relax Kit Lite | High| No | High [Back to top](#table-of-contents) ### LEDs on Different Boards Matrix of available on board LED names or LED they map to, known currently. -| LED Macro | XMC1100
    Boot Kit | XMC1100
    XMC2GO | XMC1100
    HBRIDGE2GO | XMC1300
    Boot Kit | XMC1300
    Sense2GOL | XMC4700
    Relax | -| --- | :--: | :--: | :--: | :--: | :--: | :--: | - LED_BUILTIN | Y | LED1 | LED1 | LED1 | LED1 | LED1 - LED1 | Y | Y | Y | Y | Y | Y - LED2 | Y | Y | Y | Y | Y | Y - LED3 | Y | - | - | Y | Y | - - LED4 | Y | - | - | Y | - | - - LED5 | Y | - | - | Y | - | - - LED5 | Y | - | - | Y | - | - +| LED Macro | XMC1100
    Boot Kit | XMC1100
    XMC2GO | XMC1100
    HBRIDGE2GO | XMC1300
    Boot Kit | XMC1300
    Sense2GOL | XMC1400
    Arduino Kit | XMC4400
    Platform2Go | XMC4700
    Relax Kit | XMC4700
    Relax Kit Lite | +| --- | :--: | :--: | :--: | :--: | :--: | :--: | :--: | :--: | :--: | + LED_BUILTIN | Y | LED1 | LED1 | LED1 | LED1 | Y | LED1 | LED1 | LED1 + LED1 | Y | Y | Y | Y | Y | Y | Y | Y | Y + LED2 | Y | Y | Y | Y | Y | Y | Y | Y | Y + LED3 | Y | - | - | Y | Y | - | - | - | - + LED4 | Y | - | - | Y | - | - | - | - | - + LED5 | Y | - | - | Y | - | - | - | - | - + LED6 | Y | - | - | Y | - | - | - | - | - [Back to top](#table-of-contents) ## Requirements for Adding New Boards diff --git a/libraries/LED/examples/SimpleLED/SimpleLED.ino b/libraries/LED/examples/SimpleLED/SimpleLED.ino index 2531737d..66c5f22b 100644 --- a/libraries/LED/examples/SimpleLED/SimpleLED.ino +++ b/libraries/LED/examples/SimpleLED/SimpleLED.ino @@ -1,11 +1,9 @@ /* Simple LED library flashes on board LED Every second - Simple RTC for Infineon XMC boards with RTC - Demonstrates the use of the LED library + Demonstrates the use of the on board LED library Works with any XMC board that has TWO LEDs on board */ -/* For on board LEDs */ #include /* Create an LED object */ @@ -16,8 +14,7 @@ void setup( ) Led.Add( LED1 ); // Configure the LEDs Led.Add( LED2 ); -// Set default state of LEDs -Led.On( LED2 ); +Led.On( LED2 ); // Set default state of LEDs Led.Off( LED1 ); } @@ -27,5 +24,4 @@ void loop( ) delay( 1000 ); Led.Off( LED2 ); Led.Toggle( LED1 ); - } diff --git a/libraries/LED/library.properties b/libraries/LED/library.properties index 2632fc93..42cb3bc9 100644 --- a/libraries/LED/library.properties +++ b/libraries/LED/library.properties @@ -1,5 +1,5 @@ -name=RTC -version=1.0.1 +name=LED +version=1.0.2 author=Infineon Technologies AG maintainer=Infineon Technologies AG sentence=This library allows you to enable as well as control the on board LEDs of the XMC microcontrollers. diff --git a/variants/XMC4400/config/XMC4400_Platform2GO/pins_arduino.h b/variants/XMC4400/config/XMC4400_Platform2GO/pins_arduino.h index 90b7a714..2aff29f7 100644 --- a/variants/XMC4400/config/XMC4400_Platform2GO/pins_arduino.h +++ b/variants/XMC4400/config/XMC4400_Platform2GO/pins_arduino.h @@ -35,8 +35,8 @@ //**************************************************************************** #define XMC_BOARD XMC 4400 Platform 2GO -/* On board LED is ON when digital output is 0, LOW, False, OFF */ -#define XMC_LED_ON 0 +/* On board LED is ON when digital output is 1, HIGH, TRUE, ON */ +#define XMC_LED_ON 1 // Following were defines now evaluated by compilation as const variables // After definitions of associated mapping arrays diff --git a/variants/XMC4700/config/XMC4700_Relax_Kit/pins_arduino.h b/variants/XMC4700/config/XMC4700_Relax_Kit/pins_arduino.h index 4ffbfeef..aaa975e6 100644 --- a/variants/XMC4700/config/XMC4700_Relax_Kit/pins_arduino.h +++ b/variants/XMC4700/config/XMC4700_Relax_Kit/pins_arduino.h @@ -38,8 +38,8 @@ // to avoid issues with other defined macros e.g. XMC1100 #define XMC_BOARD XMC 4700 Relax Kit -/* On board LED is ON when digital output is 0, LOW, False, OFF */ -#define XMC_LED_ON 0 +/* On board LED is ON when digital output is 1, HIGH, TRUE, ON */ +#define XMC_LED_ON 1 // Following were defines now evaluated by compilation as const variables // After definitions of associated mapping arrays From dbfea22f5783c4ca5ff8440a4b705be995ff2035 Mon Sep 17 00:00:00 2001 From: Paul Carpenter Date: Fri, 29 Jul 2022 00:51:57 +0100 Subject: [PATCH 40/78] Remove never used boards Variants for these boards very out of date NEVER USED XMC1400 Boot Kit is now obsolete as well XMC4800 has main support with XMC4700 --- boards.txt | 86 - .../config/XMC1400_Boot_Kit/pins_arduino.h | 265 - variants/XMC4800/XMC4800.h | 18752 ---------------- .../config/XMC4800_Relax_Kit/pins_arduino.h | 312 - variants/XMC4800/linker_script.ld | 287 - variants/XMC4800/startup_XMC4800.S | 440 - variants/XMC4800/system_XMC4800.c | 748 - variants/XMC4800/system_XMC4800.h | 107 - 8 files changed, 20997 deletions(-) delete mode 100644 variants/XMC1400/config/XMC1400_Boot_Kit/pins_arduino.h delete mode 100644 variants/XMC4800/XMC4800.h delete mode 100644 variants/XMC4800/config/XMC4800_Relax_Kit/pins_arduino.h delete mode 100644 variants/XMC4800/linker_script.ld delete mode 100644 variants/XMC4800/startup_XMC4800.S delete mode 100644 variants/XMC4800/system_XMC4800.c delete mode 100644 variants/XMC4800/system_XMC4800.h diff --git a/boards.txt b/boards.txt index 9825a22f..aa1369d2 100644 --- a/boards.txt +++ b/boards.txt @@ -217,50 +217,6 @@ XMC1300_Sense2GoL.menu.LIB.NN.library.selected=-DARM_LIB_CMSIS_NN XMC1300_Sense2GoL.menu.LIB.DSP=ARM DSP XMC1300_Sense2GoL.menu.LIB.DSP.library.selected=-DARM_LIB_CMSIS_DSP -#################################################### -#XMC1400_Boot_Kit.name=XMC1400 Boot Kit -#XMC1400_Boot_Kit.upload.tool=xmcprog -#XMC1400_Boot_Kit.upload.speed=115200 -#XMC1400_Boot_Kit.upload.resetmethod=ck -#XMC1400_Boot_Kit.upload.maximum_size=204800 -#XMC1400_Boot_Kit.upload.wait_for_upload_port=true - -#XMC1400_Boot_Kit.communication=usb -#XMC1400_Boot_Kit.protocol=dragon_isp -#XMC1400_Boot_Kit.program.protocol=dragon_isp -#XMC1400_Boot_Kit.program.tool=xmcprog -#XMC1400_Boot_Kit.program.extra_params=-Pusb - -#XMC1400_Boot_Kit.serial.disableDTR=true -#XMC1400_Boot_Kit.serial.disableRTS=true - -#XMC1400_Boot_Kit.build.mcu=cortex-m0 -#XMC1400_Boot_Kit.build.f_cpu=48000000L -#XMC1400_Boot_Kit.build.board=ARM_XMC -#XMC1400_Boot_Kit.build.board.version=1404 -#XMC1400_Boot_Kit.build.board.type=Q064x0200 -#XMC1400_Boot_Kit.build.board.v=0200 -#XMC1400_Boot_Kit.build.core=./ -#XMC1400_Boot_Kit.build.variant=XMC1400 -#XMC1400_Boot_Kit.build.board_variant=XMC1400_Boot_Kit -#XMC1400_Boot_Kit.build.flash_size=200K -#XMC1400_Boot_Kit.build.flash_ld=linker_script_200k.ld -#XMC1400_Boot_Kit.build.extra_flags=-DARM_MATH_CM0 -DXMC1_SERIES - -#XMC1400_Boot_Kit.menu.UART.debug=PC -#XMC1400_Boot_Kit.menu.UART.debug.uart.selected=-DSERIAL_HOSTPC -#XMC1400_Boot_Kit.menu.UART.onBoard=On Board -#XMC1400_Boot_Kit.menu.UART.onBoard.uart.selected=-DSERIAL_ONBOARD - -#XMC1400_Boot_Kit.menu.LIB.NONE=None -#XMC1400_Boot_Kit.menu.LIB.NONE.library.selected= -#XMC1400_Boot_Kit.menu.LIB.NN=ARM NN Framework -#XMC1400_Boot_Kit.menu.LIB.NN.library.selected=-DARM_LIB_CMSIS_NN -#XMC1400_Boot_Kit.menu.LIB.DSP=ARM DSP -#XMC1400_Boot_Kit.menu.LIB.DSP.library.selected=-DARM_LIB_CMSIS_DSP -#XMC1400_Boot_Kit.menu.LIB.DSPNN=ARM DSP / ARM NN Framework -#XMC1400_Boot_Kit.menu.LIB.DSPNN.library.selected=-DARM_LIB_CMSIS_DSP -DARM_LIB_CMSIS_NN - #################################################### XMC1400_Arduino_Kit.name=XMC1400 Kit for Arduino XMC1400_Arduino_Kit.upload.tool=xmcprog @@ -305,7 +261,6 @@ XMC1400_Arduino_Kit.menu.LIB.DSP.library.selected=-DARM_LIB_CMSIS_DSP XMC1400_Arduino_Kit.menu.LIB.DSPNN=ARM DSP / ARM NN Framework XMC1400_Arduino_Kit.menu.LIB.DSPNN.library.selected=-DARM_LIB_CMSIS_DSP -DARM_LIB_CMSIS_NN - #################################################### XMC4400_Platform2GO.name=XMC4400 Platform 2GO XMC4400_Platform2GO.upload.tool=xmcprog @@ -429,44 +384,3 @@ XMC4700_Relax_Kit.menu.LIB.NN.library.selected=-DARM_LIB_CMSIS_NN XMC4700_Relax_Kit.menu.LIB.DSP=ARM DSP XMC4700_Relax_Kit.menu.LIB.DSP.library.selected=-DARM_LIB_CMSIS_DSP -#################################################### -# Not up to date -#XMC4800_Relax_Kit.name=XMC4800 Relax Kit -#XMC4800_Relax_Kit.upload.tool=xmcprog -#XMC4800_Relax_Kit.upload.speed=115200 -#XMC4800_Relax_Kit.upload.resetmethod=ck -#XMC4800_Relax_Kit.upload.maximum_size=2000000 -#XMC4800_Relax_Kit.upload.maximum_data_size=352000 -#XMC4800_Relax_Kit.upload.wait_for_upload_port=true -# -#XMC4800_Relax_Kit.communication=usb -#XMC4800_Relax_Kit.protocol=dragon_isp -#XMC4800_Relax_Kit.program.protocol=dragon_isp -#XMC4800_Relax_Kit.program.tool=xmcprog -#XMC4800_Relax_Kit.program.extra_params=-Pusb -# -#XMC4800_Relax_Kit.serial.disableDTR=true -#XMC4800_Relax_Kit.serial.disableRTS=true -# -#XMC4800_Relax_Kit.build.mcu=cortex-m4 -#XMC4800_Relax_Kit.build.f_cpu=144000000L -#XMC4800_Relax_Kit.build.board=ARM_XMC -#XMC4800_Relax_Kit.build.board.version=4800 -#XMC4800_Relax_Kit.build.board.type=F144x2048 -#XMC4800_Relax_Kit.build.board.v=2048 -#XMC4800_Relax_Kit.build.core=./ -#XMC4800_Relax_Kit.build.variant=XMC4800 -#XMC4800_Relax_Kit.build.board_variant=XMC4800_Relax_Kit -#XMC4800_Relax_Kit.build.flash_size=2000K -#XMC4800_Relax_Kit.build.flash_ld=linker_script.ld -#XMC4800_Relax_Kit.build.extra_flags=-DARM_MATH_CM4 -DXMC4_SERIES - -#XMC4800_Relax_Kit.menu.LIB.DSPNN=ARM DSP / ARM NN Framework -#XMC4800_Relax_Kit.menu.LIB.DSPNN.library.selected=-DARM_LIB_CMSIS_DSP -DARM_LIB_CMSIS_NN -#XMC4800_Relax_Kit.menu.LIB.NONE=None -#XMC4800_Relax_Kit.menu.LIB.NONE.library.selected= -#XMC4800_Relax_Kit.menu.LIB.NN=ARM NN Framework -#XMC4800_Relax_Kit.menu.LIB.NN.library.selected=-DARM_LIB_CMSIS_NN -#XMC4800_Relax_Kit.menu.LIB.DSP=ARM DSP -#XMC4800_Relax_Kit.menu.LIB.DSP.library.selected=-DARM_LIB_CMSIS_DSP - diff --git a/variants/XMC1400/config/XMC1400_Boot_Kit/pins_arduino.h b/variants/XMC1400/config/XMC1400_Boot_Kit/pins_arduino.h deleted file mode 100644 index 8eb2cd96..00000000 --- a/variants/XMC1400/config/XMC1400_Boot_Kit/pins_arduino.h +++ /dev/null @@ -1,265 +0,0 @@ -/* - pins_arduino.h - Pin definition functions for Arduino - Part of Arduino - http://www.arduino.cc/ - - Copyright (c) 2007 David A. Mellis - - This library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - This library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General - Public License along with this library; if not, write to the - Free Software Foundation, Inc., 59 Temple Place, Suite 330, - Boston, MA 02111-1307 USA -*/ -#ifndef PINS_ARDUINO_H_ -#define PINS_ARDUINO_H_ - -//**************************************************************************** -// @Project Includes -//**************************************************************************** -#include - -//**************************************************************************** -// @Defines -//**************************************************************************** -// XMC_BOARD for stringifying into serial or other text outputs/logs -// Note the actual name XMC and number MUST have a character between -// to avoid issues with other defined macros e.g. XMC1400 -#define XMC_BOARD XMC 1400 Boot Kit - -/* On board LED is ON when digital output is 0, LOW, FALSE, OFF */ -#define XMC_LED_ON 0 - -// Following were defines now evaluated by compilation as const variables -// After definitions of associated mapping arrays -extern const uint8_t NUM_DIGITAL; -extern const uint8_t GND; -extern const uint8_t NUM_PWM4; -extern const uint8_t NUM_PWM; -extern const uint8_t NUM_INTERRUPT; -extern const uint8_t NUM_ANALOG_INPUTS; -#define NUM_LEDS 4 -#define NUM_SERIAL 1 -#define NUM_TONE_PINS 4 -#define NUM_TASKS_VARIANT 8 - -// Defines will be either set by ArduinoIDE in the menu or manually -#ifdef SERIAL_HOSTPC -// Comment out following line to use Serial on pins (board) -#define SERIAL_DEBUG 1 -#elif SERIAL_ONBOARD -// No SERIAL_DEBUG will be defined, kept here for clarity -#else -// Define the SERIAL_DEBUG as default setting -#define SERIAL_DEBUG 1 -#endif - -#define PWM4_TIMER_PERIOD (2041U) // Generate 490Hz @fCCU=1MHz - -#define PCLK 96000000u - -#define PIN_SPI_SS 10 -#define PIN_SPI_MOSI 11 -#define PIN_SPI_MISO 12 -#define PIN_SPI_SCK 13 - -#define A0 0 -#define A1 1 -#define A2 2 -#define A3 3 -#define A4 4 -#define A5 5 - -#define LED1 24 -#define LED2 25 -#define LED3 26 -#define LED4 27 -#define LED_BUILTIN LED1 - -#define EXT_INTR_0 2 -#define EXT_INTR_1 3 - -#define digitalPinToInterrupt(p) ((p) == 2 ? 0 : ((p) == 3 ? 1 : NOT_AN_INTERRUPT)) - -/* Mapping interrupt handlers. Notice that XMC1400 can have interrupt handlers working in 3 modes, the defines below assumes the mode A. - For details refer to assembly file and reference manual. -*/ -// #define USIC0_0_IRQHandler IRQ9_Handler // UART -#define USIC0_0_IRQn IRQ9_IRQn - -#define CCU40_0_IRQHandler IRQ21_Handler // interrupt 0 -#define CCU40_0_IRQn IRQ21_IRQn - -#define CCU40_1_IRQHandler IRQ22_Handler // interrupt 1 -#define CCU40_1_IRQn IRQ22_IRQn - -#define USIC0_4_IRQHandler IRQ13_Handler // I2C -#define USIC0_4_IRQn IRQ13_IRQn - -#define USIC0_5_IRQHandler IRQ14_Handler // I2C -#define USIC0_5_IRQn IRQ14_IRQn - -#ifdef ARDUINO_MAIN -// Mapping of digital pins and comments -const XMC_PORT_PIN_t mapping_port_pin[] = - { - /* 0 */ {XMC_GPIO_PORT1, 2}, // RX P1.2 - /* 1 */ {XMC_GPIO_PORT1, 3}, // TX P1.3 - /* 2 */ {XMC_GPIO_PORT0 , 0}, // External int 0 P0.0 - /* 3 */ {XMC_GPIO_PORT0 , 1}, // External int 1 / PWM40-1 output P0.1 - /* 4 */ {XMC_GPIO_PORT0 , 6}, // PWM40-0 output P0.6 - /* 5 */ {XMC_GPIO_PORT0 , 2}, // GPIO P0.2 - /* 6 */ {XMC_GPIO_PORT1 , 7}, // PWM40-1 output P1.7 - /* 7 */ {XMC_GPIO_PORT0 , 4}, // GPIO P0.4 - /* 8 */ {XMC_GPIO_PORT0 , 13}, // GPIO P0.13 - /* 9 */ {XMC_GPIO_PORT1 , 8}, // PWM80-2 output P1.8 - /* 10 */ {XMC_GPIO_PORT0 , 9}, // SPI-SS P0.9 - /* 11 */ {XMC_GPIO_PORT1 , 1}, // SPI-MOSI P1.1 - /* 12 */ {XMC_GPIO_PORT1 , 0}, // SPI-MISO P1.0 - /* 13 */ {XMC_GPIO_PORT0 , 7}, // SPI-SCK P0.7 - /* 14 */ {XMC_GPIO_PORT2 , 3}, // AREF P2.3 (INPUT ONLY) - /* 15 */ {XMC_GPIO_PORT2 , 1}, // I2C Data / Address SDA P2.1 - /* 16 */ {XMC_GPIO_PORT2 , 0}, // I2C Clock SCL P2.0 - /* 17 */ {XMC_GPIO_PORT2 , 6}, // A0 / ADC Input P2.6 (INPUT ONLY) - /* 18 */ {XMC_GPIO_PORT2 , 8}, // A1 / ADC Input P2.8 (INPUT ONLY) - /* 19 */ {XMC_GPIO_PORT2 , 9}, // A2 / ADC Input P2.9 (INPUT ONLY) - /* 20 */ {XMC_GPIO_PORT2 , 10}, // A3 / ADC Input P2.10 - /* 21 */ {XMC_GPIO_PORT2 , 11}, // A4 / ADC Input P2.11 - /* 22 */ {XMC_GPIO_PORT2 , 2}, // A5 / ADC Input P2.2 (INPUT ONLY) - /* 23 */ {XMC_GPIO_PORT2 , 4}, // RESET input ( DO NOT USE as GPIO ) P2.4 (INPUT ONLY) - /* 24 */ {XMC_GPIO_PORT4 , 0}, // LED - /* 25 */ {XMC_GPIO_PORT4 , 1}, // LED - /* 26 */ {XMC_GPIO_PORT4 , 2}, // LED - /* 27 */ {XMC_GPIO_PORT4 , 3}, // LED - }; -const uint8_t GND = ( sizeof( mapping_port_pin ) / sizeof( XMC_PORT_PIN_t ) ); -const uint8_t NUM_DIGITAL = ( sizeof( mapping_port_pin ) / sizeof( XMC_PORT_PIN_t ) );; - -const XMC_PIN_INTERRUPT_t mapping_interrupt[] = - { - /* 0 */ {CCU40, CCU40_CC40, 0, 0, CCU40_IN0_P0_0}, - /* 1 */ {CCU40, CCU40_CC41, 1, 1, CCU40_IN1_P0_1} - }; -const uint8_t NUM_INTERRUPT = ( sizeof( mapping_interrupt ) / sizeof( XMC_PIN_INTERRUPT_t ) ); - -/* Mapping of Arduino Pins to PWM4 channels as pin and index in PWM4 channel - mapping array XMC_PWM4_t mapping_pwm4[] - last entry 255 for both parts. - Putting both parts in array means if a PWM4 channel gets reassigned for - another function later a gap in channel numbers will not mess things up */ -const uint8_t mapping_pin_PWM4[][ 2 ] = { - { 3, 0 }, - { 4, 1 }, - { 6, 2 }, - { 9, 3 }, - { 255, 255 } }; - -/* Configurations of PWM channels for CCU4 type */ -XMC_PWM4_t mapping_pwm4[] = - { - {CCU40, CCU40_CC41, 1, mapping_port_pin[3], P0_1_AF_CCU40_OUT1, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 4 - {CCU40, CCU40_CC40, 0, mapping_port_pin[4], P0_6_AF_CCU40_OUT0, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 4 - {CCU40, CCU40_CC43, 3, mapping_port_pin[6], P1_7_AF_CCU40_OUT3, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 6 - {CCU40, CCU40_CC40, 0, mapping_port_pin[9], P1_8_AF_CCU40_OUT0, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 6 - }; -const uint8_t NUM_PWM = ( sizeof( mapping_pwm4 ) / sizeof( XMC_PWM4_t ) ); -const uint8_t NUM_PWM4 = ( sizeof( mapping_pwm4 ) / sizeof( XMC_PWM4_t ) ); - -/* Analog Pin mappings and configurations */ -XMC_ADC_t mapping_adc[] = - { - {VADC, 0, DISABLED}, - {VADC, 1, DISABLED}, - {VADC, 2, DISABLED}, - {VADC, 3, DISABLED}, - {VADC, 4, DISABLED}, - {VADC, 7, DISABLED} - }; -const uint8_t NUM_ANALOG_INPUTS = ( sizeof( mapping_adc ) / sizeof( XMC_ADC_t ) ); - -/* - * UART objects - */ -RingBuffer rx_buffer_0; -RingBuffer tx_buffer_0; - -/* First UART channel pins are swapped between debug and normal use */ -XMC_UART_t XMC_UART_0 = - { - .channel = XMC_UART0_CH1, - .rx = { .port = (XMC_GPIO_PORT_t*)PORT1_BASE, -#ifdef SERIAL_DEBUG - .pin = (uint8_t)3 -#else - .pin = (uint8_t)2 -#endif - }, - .rx_config = { .mode = XMC_GPIO_MODE_INPUT_TRISTATE, - .output_level = XMC_GPIO_OUTPUT_LEVEL_HIGH, - .input_hysteresis = XMC_GPIO_INPUT_HYSTERESIS_STANDARD - }, - .tx = { .port = (XMC_GPIO_PORT_t*)PORT1_BASE, -#ifdef SERIAL_DEBUG - .pin = (uint8_t)2 -#else - .pin = (uint8_t)3 -#endif - }, - .tx_config = { .mode = (XMC_GPIO_MODE_t) XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT7, - .output_level = XMC_GPIO_OUTPUT_LEVEL_HIGH, - .input_hysteresis = XMC_GPIO_INPUT_HYSTERESIS_STANDARD - }, -#ifdef SERIAL_DEBUG - .input_source_dx0 = (XMC_USIC_INPUT_t)USIC0_C1_DX0_P1_3, -#else - .input_source_dx0 = (XMC_USIC_INPUT_t)USIC0_C0_DX0_P1_2, -#endif - .input_source_dx1 = XMC_INPUT_INVALID, - .input_source_dx2 = XMC_INPUT_INVALID, - .input_source_dx3 = XMC_INPUT_INVALID, - .irq_num = USIC0_0_IRQn, - .irq_service_request = 0 - }; - -HardwareSerial Serial( &XMC_UART_0, &rx_buffer_0, &tx_buffer_0 ); - -// Serial Interrupt and event handling -#ifdef __cplusplus -extern "C" { -#endif -void serialEventRun( ); -void serialEvent( ) __attribute__((weak)); - - -void serialEventRun( ) -{ -if( serialEvent ) - { - if( Serial.available( ) ) - serialEvent( ); - } -} - - -void USIC0_0_IRQHandler( ) -{ -Serial.IrqHandler( ); -} -#ifdef __cplusplus -} -#endif -#endif /* ARDUINO_MAIN */ - -#ifdef __cplusplus -extern HardwareSerial Serial; -#endif /* cplusplus */ - -#endif // PINS_ARDUINO_H_ diff --git a/variants/XMC4800/XMC4800.h b/variants/XMC4800/XMC4800.h deleted file mode 100644 index d4115135..00000000 --- a/variants/XMC4800/XMC4800.h +++ /dev/null @@ -1,18752 +0,0 @@ -/********************************************************************************************************************* - * Copyright (c) 2015-2017, Infineon Technologies AG - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the - * following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list of conditions and the following - * disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following - * disclaimer in the documentation and/or other materials provided with the distribution. - * - * Neither the name of the copyright holders nor the names of its contributors may be used to endorse or promote - * products derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY,OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * To improve the quality of the software, users are encouraged to share modifications, enhancements or bug fixes with - * Infineon Technologies AG dave@infineon.com). - *********************************************************************************************************************/ - - -/****************************************************************************************************//** - * @file XMC4800.h - * - * @brief CMSIS Cortex-M4 Peripheral Access Layer Header File for - * XMC4800 from Infineon. - * - * @version V1.3.1 (Reference Manual v1.3) - * @date 19. June 2017 - * - * @note Generated with SVDConv V2.87l - * from CMSIS SVD File 'XMC4800_Processed_SVD.xml' Version 1.3.0 (Reference Manual v1.3), - * added support for ARM Compiler 6 (armclang) - *******************************************************************************************************/ - - - -/** @addtogroup Infineon - * @{ - */ - -/** @addtogroup XMC4800 - * @{ - */ - -#ifndef XMC4800_H -#define XMC4800_H - -#ifdef __cplusplus -extern "C" { -#endif - - -/* ------------------------- Interrupt Number Definition ------------------------ */ - -typedef enum { -/* ------------------- Cortex-M4 Processor Exceptions Numbers ------------------- */ - Reset_IRQn = -15, /*!< 1 Reset Vector, invoked on Power up and warm reset */ - NonMaskableInt_IRQn = -14, /*!< 2 Non maskable Interrupt, cannot be stopped or preempted */ - HardFault_IRQn = -13, /*!< 3 Hard Fault, all classes of Fault */ - MemoryManagement_IRQn = -12, /*!< 4 Memory Management, MPU mismatch, including Access Violation - and No Match */ - BusFault_IRQn = -11, /*!< 5 Bus Fault, Pre-Fetch-, Memory Access Fault, other address/memory - related Fault */ - UsageFault_IRQn = -10, /*!< 6 Usage Fault, i.e. Undef Instruction, Illegal State Transition */ - SVCall_IRQn = -5, /*!< 11 System Service Call via SVC instruction */ - DebugMonitor_IRQn = -4, /*!< 12 Debug Monitor */ - PendSV_IRQn = -2, /*!< 14 Pendable request for system service */ - SysTick_IRQn = -1, /*!< 15 System Tick Timer */ -/* --------------------- XMC4800 Specific Interrupt Numbers --------------------- */ - SCU_0_IRQn = 0, /*!< 0 System Control */ - ERU0_0_IRQn = 1, /*!< 1 External Request Unit 0 */ - ERU0_1_IRQn = 2, /*!< 2 External Request Unit 0 */ - ERU0_2_IRQn = 3, /*!< 3 External Request Unit 0 */ - ERU0_3_IRQn = 4, /*!< 4 External Request Unit 0 */ - ERU1_0_IRQn = 5, /*!< 5 External Request Unit 1 */ - ERU1_1_IRQn = 6, /*!< 6 External Request Unit 1 */ - ERU1_2_IRQn = 7, /*!< 7 External Request Unit 1 */ - ERU1_3_IRQn = 8, /*!< 8 External Request Unit 1 */ - PMU0_0_IRQn = 12, /*!< 12 Program Management Unit */ - VADC0_C0_0_IRQn = 14, /*!< 14 Analog to Digital Converter Common Block 0 */ - VADC0_C0_1_IRQn = 15, /*!< 15 Analog to Digital Converter Common Block 0 */ - VADC0_C0_2_IRQn = 16, /*!< 16 Analog to Digital Converter Common Block 0 */ - VADC0_C0_3_IRQn = 17, /*!< 17 Analog to Digital Converter Common Block 0 */ - VADC0_G0_0_IRQn = 18, /*!< 18 Analog to Digital Converter Group 0 */ - VADC0_G0_1_IRQn = 19, /*!< 19 Analog to Digital Converter Group 0 */ - VADC0_G0_2_IRQn = 20, /*!< 20 Analog to Digital Converter Group 0 */ - VADC0_G0_3_IRQn = 21, /*!< 21 Analog to Digital Converter Group 0 */ - VADC0_G1_0_IRQn = 22, /*!< 22 Analog to Digital Converter Group 1 */ - VADC0_G1_1_IRQn = 23, /*!< 23 Analog to Digital Converter Group 1 */ - VADC0_G1_2_IRQn = 24, /*!< 24 Analog to Digital Converter Group 1 */ - VADC0_G1_3_IRQn = 25, /*!< 25 Analog to Digital Converter Group 1 */ - VADC0_G2_0_IRQn = 26, /*!< 26 Analog to Digital Converter Group 2 */ - VADC0_G2_1_IRQn = 27, /*!< 27 Analog to Digital Converter Group 2 */ - VADC0_G2_2_IRQn = 28, /*!< 28 Analog to Digital Converter Group 2 */ - VADC0_G2_3_IRQn = 29, /*!< 29 Analog to Digital Converter Group 2 */ - VADC0_G3_0_IRQn = 30, /*!< 30 Analog to Digital Converter Group 3 */ - VADC0_G3_1_IRQn = 31, /*!< 31 Analog to Digital Converter Group 3 */ - VADC0_G3_2_IRQn = 32, /*!< 32 Analog to Digital Converter Group 3 */ - VADC0_G3_3_IRQn = 33, /*!< 33 Analog to Digital Converter Group 3 */ - DSD0_M_0_IRQn = 34, /*!< 34 Delta Sigma Demodulator Main */ - DSD0_M_1_IRQn = 35, /*!< 35 Delta Sigma Demodulator Main */ - DSD0_M_2_IRQn = 36, /*!< 36 Delta Sigma Demodulator Main */ - DSD0_M_3_IRQn = 37, /*!< 37 Delta Sigma Demodulator Main */ - DSD0_A_4_IRQn = 38, /*!< 38 Delta Sigma Demodulator Auxiliary */ - DSD0_A_5_IRQn = 39, /*!< 39 Delta Sigma Demodulator Auxiliary */ - DSD0_A_6_IRQn = 40, /*!< 40 Delta Sigma Demodulator Auxiliary */ - DSD0_A_7_IRQn = 41, /*!< 41 Delta Sigma Demodulator Auxiliary */ - DAC0_0_IRQn = 42, /*!< 42 Digital to Analog Converter */ - DAC0_1_IRQn = 43, /*!< 43 Digital to Analog Converter */ - CCU40_0_IRQn = 44, /*!< 44 Capture Compare Unit 4 (Module 0) */ - CCU40_1_IRQn = 45, /*!< 45 Capture Compare Unit 4 (Module 0) */ - CCU40_2_IRQn = 46, /*!< 46 Capture Compare Unit 4 (Module 0) */ - CCU40_3_IRQn = 47, /*!< 47 Capture Compare Unit 4 (Module 0) */ - CCU41_0_IRQn = 48, /*!< 48 Capture Compare Unit 4 (Module 1) */ - CCU41_1_IRQn = 49, /*!< 49 Capture Compare Unit 4 (Module 1) */ - CCU41_2_IRQn = 50, /*!< 50 Capture Compare Unit 4 (Module 1) */ - CCU41_3_IRQn = 51, /*!< 51 Capture Compare Unit 4 (Module 1) */ - CCU42_0_IRQn = 52, /*!< 52 Capture Compare Unit 4 (Module 2) */ - CCU42_1_IRQn = 53, /*!< 53 Capture Compare Unit 4 (Module 2) */ - CCU42_2_IRQn = 54, /*!< 54 Capture Compare Unit 4 (Module 2) */ - CCU42_3_IRQn = 55, /*!< 55 Capture Compare Unit 4 (Module 2) */ - CCU43_0_IRQn = 56, /*!< 56 Capture Compare Unit 4 (Module 3) */ - CCU43_1_IRQn = 57, /*!< 57 Capture Compare Unit 4 (Module 3) */ - CCU43_2_IRQn = 58, /*!< 58 Capture Compare Unit 4 (Module 3) */ - CCU43_3_IRQn = 59, /*!< 59 Capture Compare Unit 4 (Module 3) */ - CCU80_0_IRQn = 60, /*!< 60 Capture Compare Unit 8 (Module 0) */ - CCU80_1_IRQn = 61, /*!< 61 Capture Compare Unit 8 (Module 0) */ - CCU80_2_IRQn = 62, /*!< 62 Capture Compare Unit 8 (Module 0) */ - CCU80_3_IRQn = 63, /*!< 63 Capture Compare Unit 8 (Module 0) */ - CCU81_0_IRQn = 64, /*!< 64 Capture Compare Unit 8 (Module 1) */ - CCU81_1_IRQn = 65, /*!< 65 Capture Compare Unit 8 (Module 1) */ - CCU81_2_IRQn = 66, /*!< 66 Capture Compare Unit 8 (Module 1) */ - CCU81_3_IRQn = 67, /*!< 67 Capture Compare Unit 8 (Module 1) */ - POSIF0_0_IRQn = 68, /*!< 68 Position Interface (Module 0) */ - POSIF0_1_IRQn = 69, /*!< 69 Position Interface (Module 0) */ - POSIF1_0_IRQn = 70, /*!< 70 Position Interface (Module 1) */ - POSIF1_1_IRQn = 71, /*!< 71 Position Interface (Module 1) */ - CAN0_0_IRQn = 76, /*!< 76 MultiCAN */ - CAN0_1_IRQn = 77, /*!< 77 MultiCAN */ - CAN0_2_IRQn = 78, /*!< 78 MultiCAN */ - CAN0_3_IRQn = 79, /*!< 79 MultiCAN */ - CAN0_4_IRQn = 80, /*!< 80 MultiCAN */ - CAN0_5_IRQn = 81, /*!< 81 MultiCAN */ - CAN0_6_IRQn = 82, /*!< 82 MultiCAN */ - CAN0_7_IRQn = 83, /*!< 83 MultiCAN */ - USIC0_0_IRQn = 84, /*!< 84 Universal Serial Interface Channel (Module 0) */ - USIC0_1_IRQn = 85, /*!< 85 Universal Serial Interface Channel (Module 0) */ - USIC0_2_IRQn = 86, /*!< 86 Universal Serial Interface Channel (Module 0) */ - USIC0_3_IRQn = 87, /*!< 87 Universal Serial Interface Channel (Module 0) */ - USIC0_4_IRQn = 88, /*!< 88 Universal Serial Interface Channel (Module 0) */ - USIC0_5_IRQn = 89, /*!< 89 Universal Serial Interface Channel (Module 0) */ - USIC1_0_IRQn = 90, /*!< 90 Universal Serial Interface Channel (Module 1) */ - USIC1_1_IRQn = 91, /*!< 91 Universal Serial Interface Channel (Module 1) */ - USIC1_2_IRQn = 92, /*!< 92 Universal Serial Interface Channel (Module 1) */ - USIC1_3_IRQn = 93, /*!< 93 Universal Serial Interface Channel (Module 1) */ - USIC1_4_IRQn = 94, /*!< 94 Universal Serial Interface Channel (Module 1) */ - USIC1_5_IRQn = 95, /*!< 95 Universal Serial Interface Channel (Module 1) */ - USIC2_0_IRQn = 96, /*!< 96 Universal Serial Interface Channel (Module 2) */ - USIC2_1_IRQn = 97, /*!< 97 Universal Serial Interface Channel (Module 2) */ - USIC2_2_IRQn = 98, /*!< 98 Universal Serial Interface Channel (Module 2) */ - USIC2_3_IRQn = 99, /*!< 99 Universal Serial Interface Channel (Module 2) */ - USIC2_4_IRQn = 100, /*!< 100 Universal Serial Interface Channel (Module 2) */ - USIC2_5_IRQn = 101, /*!< 101 Universal Serial Interface Channel (Module 2) */ - LEDTS0_0_IRQn = 102, /*!< 102 LED and Touch Sense Control Unit (Module 0) */ - FCE0_0_IRQn = 104, /*!< 104 Flexible CRC Engine */ - GPDMA0_0_IRQn = 105, /*!< 105 General Purpose DMA Unit 0 */ - SDMMC0_0_IRQn = 106, /*!< 106 Multi Media Card Interface */ - USB0_0_IRQn = 107, /*!< 107 Universal Serial Bus (Module 0) */ - ETH0_0_IRQn = 108, /*!< 108 Ethernet (Module 0) */ - ECAT0_0_IRQn = 109, /*!< 109 EtherCAT (Module 0) */ - GPDMA1_0_IRQn = 110 /*!< 110 General Purpose DMA Unit 1 */ -} IRQn_Type; - - -/** @addtogroup Configuration_of_CMSIS - * @{ - */ - - -/* ================================================================================ */ -/* ================ Processor and Core Peripheral Section ================ */ -/* ================================================================================ */ - -/* ----------------Configuration of the Cortex-M4 Processor and Core Peripherals---------------- */ -#define __CM4_REV 0x0200 /*!< Cortex-M4 Core Revision */ -#define __MPU_PRESENT 1 /*!< MPU present or not */ -#define __NVIC_PRIO_BITS 6 /*!< Number of Bits used for Priority Levels */ -#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */ -#define __FPU_PRESENT 1 /*!< FPU present or not */ -/** @} */ /* End of group Configuration_of_CMSIS */ - -#include "core_cm4.h" /*!< Cortex-M4 processor and core peripherals */ -#include "system_XMC4800.h" /*!< XMC4800 System */ - - -/* ================================================================================ */ -/* ================ Device Specific Peripheral Section ================ */ -/* ================================================================================ */ -/* Macro to modify desired bitfields of a register */ -#define WR_REG(reg, mask, pos, val) reg = (((uint32_t)val << pos) & \ - ((uint32_t)mask)) | \ - (reg & ((uint32_t)~((uint32_t)mask))) - -/* Macro to modify desired bitfields of a register */ -#define WR_REG_SIZE(reg, mask, pos, val, size) { \ -uint##size##_t VAL1 = (uint##size##_t)((uint##size##_t)val << pos); \ -uint##size##_t VAL2 = (uint##size##_t) (VAL1 & (uint##size##_t)mask); \ -uint##size##_t VAL3 = (uint##size##_t)~((uint##size##_t)mask); \ -uint##size##_t VAL4 = (uint##size##_t) ((uint##size##_t)reg & VAL3); \ -reg = (uint##size##_t) (VAL2 | VAL4);\ -} - -/** Macro to read bitfields from a register */ -#define RD_REG(reg, mask, pos) (((uint32_t)reg & (uint32_t)mask) >> pos) - -/** Macro to read bitfields from a register */ -#define RD_REG_SIZE(reg, mask, pos,size) ((uint##size##_t)(((uint32_t)reg & \ - (uint32_t)mask) >> pos) ) - -/** Macro to set a bit in register */ -#define SET_BIT(reg, pos) (reg |= ((uint32_t)1<= 6010050) - #pragma clang diagnostic push - #pragma clang diagnostic ignored "-Wc11-extensions" - #pragma clang diagnostic ignored "-Wreserved-id-macro" -#elif defined(__ICCARM__) - #pragma language=extended -#elif defined(__GNUC__) - /* anonymous unions are enabled by default */ -#elif defined(__TMS470__) -/* anonymous unions are enabled by default */ -#elif defined(__TASKING__) - #pragma warning 586 -#else - #warning Not supported compiler type -#endif - - -typedef struct { - __IO uint32_t MOFCR; /*!< (@ 0x48015000) Message Object Function Control Register */ - __IO uint32_t MOFGPR; /*!< (@ 0x48015004) Message Object FIFO/Gateway Pointer Register */ - __IO uint32_t MOIPR; /*!< (@ 0x48015008) Message Object Interrupt Pointer Register */ - __IO uint32_t MOAMR; /*!< (@ 0x4801500C) Message Object Acceptance Mask Register */ - __IO uint32_t MODATAL; /*!< (@ 0x48015010) Message Object Data Register Low */ - __IO uint32_t MODATAH; /*!< (@ 0x48015014) Message Object Data Register High */ - __IO uint32_t MOAR; /*!< (@ 0x48015018) Message Object Arbitration Register */ - - union { - __I uint32_t MOSTAT; /*!< (@ 0x4801501C) Message Object Status Register */ - __O uint32_t MOCTR; /*!< (@ 0x4801501C) Message Object Control Register */ - }; -} CAN_MO_TypeDef; /*!< (@ 0x48015020) Cluster End. Size = 32 (0x20) */ - - -/* ================================================================================ */ -/* ================ PPB ================ */ -/* ================================================================================ */ - - -/** - * @brief Cortex-M4 Private Peripheral Block (PPB) - */ - -typedef struct { /*!< (@ 0xE000E000) PPB Structure */ - __I uint32_t RESERVED[2]; - __IO uint32_t ACTLR; /*!< (@ 0xE000E008) Auxiliary Control Register */ - __I uint32_t RESERVED1; - __IO uint32_t SYST_CSR; /*!< (@ 0xE000E010) SysTick Control and Status Register */ - __IO uint32_t SYST_RVR; /*!< (@ 0xE000E014) SysTick Reload Value Register */ - __IO uint32_t SYST_CVR; /*!< (@ 0xE000E018) SysTick Current Value Register */ - __IO uint32_t SYST_CALIB; /*!< (@ 0xE000E01C) SysTick Calibration Value Register r */ - __I uint32_t RESERVED2[56]; - __IO uint32_t NVIC_ISER0; /*!< (@ 0xE000E100) Interrupt Set-enable Register 0 */ - __IO uint32_t NVIC_ISER1; /*!< (@ 0xE000E104) Interrupt Set-enable Register 1 */ - __IO uint32_t NVIC_ISER2; /*!< (@ 0xE000E108) Interrupt Set-enable Register 2 */ - __IO uint32_t NVIC_ISER3; /*!< (@ 0xE000E10C) Interrupt Set-enable Register 3 */ - __I uint32_t RESERVED3[28]; - __IO uint32_t NVIC_ICER0; /*!< (@ 0xE000E180) Interrupt Clear-enable Register 0 */ - __IO uint32_t NVIC_ICER1; /*!< (@ 0xE000E184) Interrupt Clear-enable Register 1 */ - __IO uint32_t NVIC_ICER2; /*!< (@ 0xE000E188) Interrupt Clear-enable Register 2 */ - __IO uint32_t NVIC_ICER3; /*!< (@ 0xE000E18C) Interrupt Clear-enable Register 3 */ - __I uint32_t RESERVED4[28]; - __IO uint32_t NVIC_ISPR0; /*!< (@ 0xE000E200) Interrupt Set-pending Register 0 */ - __IO uint32_t NVIC_ISPR1; /*!< (@ 0xE000E204) Interrupt Set-pending Register 1 */ - __IO uint32_t NVIC_ISPR2; /*!< (@ 0xE000E208) Interrupt Set-pending Register 2 */ - __IO uint32_t NVIC_ISPR3; /*!< (@ 0xE000E20C) Interrupt Set-pending Register 3 */ - __I uint32_t RESERVED5[28]; - __IO uint32_t NVIC_ICPR0; /*!< (@ 0xE000E280) Interrupt Clear-pending Register 0 */ - __IO uint32_t NVIC_ICPR1; /*!< (@ 0xE000E284) Interrupt Clear-pending Register 1 */ - __IO uint32_t NVIC_ICPR2; /*!< (@ 0xE000E288) Interrupt Clear-pending Register 2 */ - __IO uint32_t NVIC_ICPR3; /*!< (@ 0xE000E28C) Interrupt Clear-pending Register 3 */ - __I uint32_t RESERVED6[28]; - __IO uint32_t NVIC_IABR0; /*!< (@ 0xE000E300) Interrupt Active Bit Register 0 */ - __IO uint32_t NVIC_IABR1; /*!< (@ 0xE000E304) Interrupt Active Bit Register 1 */ - __IO uint32_t NVIC_IABR2; /*!< (@ 0xE000E308) Interrupt Active Bit Register 2 */ - __IO uint32_t NVIC_IABR3; /*!< (@ 0xE000E30C) Interrupt Active Bit Register 3 */ - __I uint32_t RESERVED7[60]; - __IO uint32_t NVIC_IPR0; /*!< (@ 0xE000E400) Interrupt Priority Register 0 */ - __IO uint32_t NVIC_IPR1; /*!< (@ 0xE000E404) Interrupt Priority Register 1 */ - __IO uint32_t NVIC_IPR2; /*!< (@ 0xE000E408) Interrupt Priority Register 2 */ - __IO uint32_t NVIC_IPR3; /*!< (@ 0xE000E40C) Interrupt Priority Register 3 */ - __IO uint32_t NVIC_IPR4; /*!< (@ 0xE000E410) Interrupt Priority Register 4 */ - __IO uint32_t NVIC_IPR5; /*!< (@ 0xE000E414) Interrupt Priority Register 5 */ - __IO uint32_t NVIC_IPR6; /*!< (@ 0xE000E418) Interrupt Priority Register 6 */ - __IO uint32_t NVIC_IPR7; /*!< (@ 0xE000E41C) Interrupt Priority Register 7 */ - __IO uint32_t NVIC_IPR8; /*!< (@ 0xE000E420) Interrupt Priority Register 8 */ - __IO uint32_t NVIC_IPR9; /*!< (@ 0xE000E424) Interrupt Priority Register 9 */ - __IO uint32_t NVIC_IPR10; /*!< (@ 0xE000E428) Interrupt Priority Register 10 */ - __IO uint32_t NVIC_IPR11; /*!< (@ 0xE000E42C) Interrupt Priority Register 11 */ - __IO uint32_t NVIC_IPR12; /*!< (@ 0xE000E430) Interrupt Priority Register 12 */ - __IO uint32_t NVIC_IPR13; /*!< (@ 0xE000E434) Interrupt Priority Register 13 */ - __IO uint32_t NVIC_IPR14; /*!< (@ 0xE000E438) Interrupt Priority Register 14 */ - __IO uint32_t NVIC_IPR15; /*!< (@ 0xE000E43C) Interrupt Priority Register 15 */ - __IO uint32_t NVIC_IPR16; /*!< (@ 0xE000E440) Interrupt Priority Register 16 */ - __IO uint32_t NVIC_IPR17; /*!< (@ 0xE000E444) Interrupt Priority Register 17 */ - __IO uint32_t NVIC_IPR18; /*!< (@ 0xE000E448) Interrupt Priority Register 18 */ - __IO uint32_t NVIC_IPR19; /*!< (@ 0xE000E44C) Interrupt Priority Register 19 */ - __IO uint32_t NVIC_IPR20; /*!< (@ 0xE000E450) Interrupt Priority Register 20 */ - __IO uint32_t NVIC_IPR21; /*!< (@ 0xE000E454) Interrupt Priority Register 21 */ - __IO uint32_t NVIC_IPR22; /*!< (@ 0xE000E458) Interrupt Priority Register 22 */ - __IO uint32_t NVIC_IPR23; /*!< (@ 0xE000E45C) Interrupt Priority Register 23 */ - __IO uint32_t NVIC_IPR24; /*!< (@ 0xE000E460) Interrupt Priority Register 24 */ - __IO uint32_t NVIC_IPR25; /*!< (@ 0xE000E464) Interrupt Priority Register 25 */ - __IO uint32_t NVIC_IPR26; /*!< (@ 0xE000E468) Interrupt Priority Register 26 */ - __IO uint32_t NVIC_IPR27; /*!< (@ 0xE000E46C) Interrupt Priority Register 27 */ - __I uint32_t RESERVED8[548]; - __I uint32_t CPUID; /*!< (@ 0xE000ED00) CPUID Base Register */ - __IO uint32_t ICSR; /*!< (@ 0xE000ED04) Interrupt Control and State Register */ - __IO uint32_t VTOR; /*!< (@ 0xE000ED08) Vector Table Offset Register */ - __IO uint32_t AIRCR; /*!< (@ 0xE000ED0C) Application Interrupt and Reset Control Register */ - __IO uint32_t SCR; /*!< (@ 0xE000ED10) System Control Register */ - __IO uint32_t CCR; /*!< (@ 0xE000ED14) Configuration and Control Register */ - __IO uint32_t SHPR1; /*!< (@ 0xE000ED18) System Handler Priority Register 1 */ - __IO uint32_t SHPR2; /*!< (@ 0xE000ED1C) System Handler Priority Register 2 */ - __IO uint32_t SHPR3; /*!< (@ 0xE000ED20) System Handler Priority Register 3 */ - __IO uint32_t SHCSR; /*!< (@ 0xE000ED24) System Handler Control and State Register */ - __IO uint32_t CFSR; /*!< (@ 0xE000ED28) Configurable Fault Status Register */ - __IO uint32_t HFSR; /*!< (@ 0xE000ED2C) HardFault Status Register */ - __I uint32_t RESERVED9; - __IO uint32_t MMFAR; /*!< (@ 0xE000ED34) MemManage Fault Address Register */ - __IO uint32_t BFAR; /*!< (@ 0xE000ED38) BusFault Address Register */ - __IO uint32_t AFSR; /*!< (@ 0xE000ED3C) Auxiliary Fault Status Register */ - __I uint32_t RESERVED10[18]; - __IO uint32_t CPACR; /*!< (@ 0xE000ED88) Coprocessor Access Control Register */ - __I uint32_t RESERVED11; - __I uint32_t MPU_TYPE; /*!< (@ 0xE000ED90) MPU Type Register */ - __IO uint32_t MPU_CTRL; /*!< (@ 0xE000ED94) MPU Control Register */ - __IO uint32_t MPU_RNR; /*!< (@ 0xE000ED98) MPU Region Number Register */ - __IO uint32_t MPU_RBAR; /*!< (@ 0xE000ED9C) MPU Region Base Address Register */ - __IO uint32_t MPU_RASR; /*!< (@ 0xE000EDA0) MPU Region Attribute and Size Register */ - __IO uint32_t MPU_RBAR_A1; /*!< (@ 0xE000EDA4) MPU Region Base Address Register A1 */ - __IO uint32_t MPU_RASR_A1; /*!< (@ 0xE000EDA8) MPU Region Attribute and Size Register A1 */ - __IO uint32_t MPU_RBAR_A2; /*!< (@ 0xE000EDAC) MPU Region Base Address Register A2 */ - __IO uint32_t MPU_RASR_A2; /*!< (@ 0xE000EDB0) MPU Region Attribute and Size Register A2 */ - __IO uint32_t MPU_RBAR_A3; /*!< (@ 0xE000EDB4) MPU Region Base Address Register A3 */ - __IO uint32_t MPU_RASR_A3; /*!< (@ 0xE000EDB8) MPU Region Attribute and Size Register A3 */ - __I uint32_t RESERVED12[81]; - __O uint32_t STIR; /*!< (@ 0xE000EF00) Software Trigger Interrupt Register */ - __I uint32_t RESERVED13[12]; - __IO uint32_t FPCCR; /*!< (@ 0xE000EF34) Floating-point Context Control Register */ - __IO uint32_t FPCAR; /*!< (@ 0xE000EF38) Floating-point Context Address Register */ - __IO uint32_t FPDSCR; /*!< (@ 0xE000EF3C) Floating-point Default Status Control Register */ -} PPB_Type; - - -/* ================================================================================ */ -/* ================ DLR ================ */ -/* ================================================================================ */ - - -/** - * @brief DMA Line Router (DLR) - */ - -typedef struct { /*!< (@ 0x50004900) DLR Structure */ - __I uint32_t OVRSTAT; /*!< (@ 0x50004900) Overrun Status */ - __O uint32_t OVRCLR; /*!< (@ 0x50004904) Overrun Clear */ - __IO uint32_t SRSEL0; /*!< (@ 0x50004908) Service Request Selection 0 */ - __IO uint32_t SRSEL1; /*!< (@ 0x5000490C) Service Request Selection 1 */ - __IO uint32_t LNEN; /*!< (@ 0x50004910) Line Enable */ -} DLR_GLOBAL_TypeDef; - - -/* ================================================================================ */ -/* ================ ERU [ERU0] ================ */ -/* ================================================================================ */ - - -/** - * @brief Event Request Unit 0 (ERU) - */ - -typedef struct { /*!< (@ 0x50004800) ERU Structure */ - __IO uint32_t EXISEL; /*!< (@ 0x50004800) Event Input Select */ - __I uint32_t RESERVED[3]; - __IO uint32_t EXICON[4]; /*!< (@ 0x50004810) Event Input Control */ - __IO uint32_t EXOCON[4]; /*!< (@ 0x50004820) Event Output Trigger Control */ -} ERU_GLOBAL_TypeDef; - - -/* ================================================================================ */ -/* ================ GPDMA0 ================ */ -/* ================================================================================ */ - - -/** - * @brief General Purpose DMA Unit 0 (GPDMA0) - */ - -typedef struct { /*!< (@ 0x500142C0) GPDMA0 Structure */ - __IO uint32_t RAWTFR; /*!< (@ 0x500142C0) Raw IntTfr Status */ - __I uint32_t RESERVED; - __IO uint32_t RAWBLOCK; /*!< (@ 0x500142C8) Raw IntBlock Status */ - __I uint32_t RESERVED1; - __IO uint32_t RAWSRCTRAN; /*!< (@ 0x500142D0) Raw IntSrcTran Status */ - __I uint32_t RESERVED2; - __IO uint32_t RAWDSTTRAN; /*!< (@ 0x500142D8) Raw IntBlock Status */ - __I uint32_t RESERVED3; - __IO uint32_t RAWERR; /*!< (@ 0x500142E0) Raw IntErr Status */ - __I uint32_t RESERVED4; - __I uint32_t STATUSTFR; /*!< (@ 0x500142E8) IntTfr Status */ - __I uint32_t RESERVED5; - __I uint32_t STATUSBLOCK; /*!< (@ 0x500142F0) IntBlock Status */ - __I uint32_t RESERVED6; - __I uint32_t STATUSSRCTRAN; /*!< (@ 0x500142F8) IntSrcTran Status */ - __I uint32_t RESERVED7; - __I uint32_t STATUSDSTTRAN; /*!< (@ 0x50014300) IntBlock Status */ - __I uint32_t RESERVED8; - __I uint32_t STATUSERR; /*!< (@ 0x50014308) IntErr Status */ - __I uint32_t RESERVED9; - __IO uint32_t MASKTFR; /*!< (@ 0x50014310) Mask for Raw IntTfr Status */ - __I uint32_t RESERVED10; - __IO uint32_t MASKBLOCK; /*!< (@ 0x50014318) Mask for Raw IntBlock Status */ - __I uint32_t RESERVED11; - __IO uint32_t MASKSRCTRAN; /*!< (@ 0x50014320) Mask for Raw IntSrcTran Status */ - __I uint32_t RESERVED12; - __IO uint32_t MASKDSTTRAN; /*!< (@ 0x50014328) Mask for Raw IntBlock Status */ - __I uint32_t RESERVED13; - __IO uint32_t MASKERR; /*!< (@ 0x50014330) Mask for Raw IntErr Status */ - __I uint32_t RESERVED14; - __O uint32_t CLEARTFR; /*!< (@ 0x50014338) IntTfr Status */ - __I uint32_t RESERVED15; - __O uint32_t CLEARBLOCK; /*!< (@ 0x50014340) IntBlock Status */ - __I uint32_t RESERVED16; - __O uint32_t CLEARSRCTRAN; /*!< (@ 0x50014348) IntSrcTran Status */ - __I uint32_t RESERVED17; - __O uint32_t CLEARDSTTRAN; /*!< (@ 0x50014350) IntBlock Status */ - __I uint32_t RESERVED18; - __O uint32_t CLEARERR; /*!< (@ 0x50014358) IntErr Status */ - __I uint32_t RESERVED19; - __I uint32_t STATUSINT; /*!< (@ 0x50014360) Combined Interrupt Status Register */ - __I uint32_t RESERVED20; - __IO uint32_t REQSRCREG; /*!< (@ 0x50014368) Source Software Transaction Request Register */ - __I uint32_t RESERVED21; - __IO uint32_t REQDSTREG; /*!< (@ 0x50014370) Destination Software Transaction Request Register */ - __I uint32_t RESERVED22; - __IO uint32_t SGLREQSRCREG; /*!< (@ 0x50014378) Single Source Transaction Request Register */ - __I uint32_t RESERVED23; - __IO uint32_t SGLREQDSTREG; /*!< (@ 0x50014380) Single Destination Transaction Request Register */ - __I uint32_t RESERVED24; - __IO uint32_t LSTSRCREG; /*!< (@ 0x50014388) Last Source Transaction Request Register */ - __I uint32_t RESERVED25; - __IO uint32_t LSTDSTREG; /*!< (@ 0x50014390) Last Destination Transaction Request Register */ - __I uint32_t RESERVED26; - __IO uint32_t DMACFGREG; /*!< (@ 0x50014398) GPDMA Configuration Register */ - __I uint32_t RESERVED27; - __IO uint32_t CHENREG; /*!< (@ 0x500143A0) GPDMA Channel Enable Register */ - __I uint32_t RESERVED28; - __I uint32_t ID; /*!< (@ 0x500143A8) GPDMA0 ID Register */ - __I uint32_t RESERVED29[19]; - __I uint32_t TYPE; /*!< (@ 0x500143F8) GPDMA Component Type */ - __I uint32_t VERSION; /*!< (@ 0x500143FC) DMA Component Version */ -} GPDMA0_GLOBAL_TypeDef; - - -/* ================================================================================ */ -/* ================ GPDMA0_CH0_1 [GPDMA0_CH0] ================ */ -/* ================================================================================ */ - - -/** - * @brief General Purpose DMA Unit 0 (GPDMA0_CH0_1) - */ - -typedef struct { /*!< (@ 0x50014000) GPDMA0_CH0_1 Structure */ - __IO uint32_t SAR; /*!< (@ 0x50014000) Source Address Register */ - __I uint32_t RESERVED; - __IO uint32_t DAR; /*!< (@ 0x50014008) Destination Address Register */ - __I uint32_t RESERVED1; - __IO uint32_t LLP; /*!< (@ 0x50014010) Linked List Pointer Register */ - __I uint32_t RESERVED2; - __IO uint32_t CTLL; /*!< (@ 0x50014018) Control Register Low */ - __IO uint32_t CTLH; /*!< (@ 0x5001401C) Control Register High */ - __IO uint32_t SSTAT; /*!< (@ 0x50014020) Source Status Register */ - __I uint32_t RESERVED3; - __IO uint32_t DSTAT; /*!< (@ 0x50014028) Destination Status Register */ - __I uint32_t RESERVED4; - __IO uint32_t SSTATAR; /*!< (@ 0x50014030) Source Status Address Register */ - __I uint32_t RESERVED5; - __IO uint32_t DSTATAR; /*!< (@ 0x50014038) Destination Status Address Register */ - __I uint32_t RESERVED6; - __IO uint32_t CFGL; /*!< (@ 0x50014040) Configuration Register Low */ - __IO uint32_t CFGH; /*!< (@ 0x50014044) Configuration Register High */ - __IO uint32_t SGR; /*!< (@ 0x50014048) Source Gather Register */ - __I uint32_t RESERVED7; - __IO uint32_t DSR; /*!< (@ 0x50014050) Destination Scatter Register */ -} GPDMA0_CH_TypeDef; - - -/* ================================================================================ */ -/* ================ GPDMA0_CH2_7 [GPDMA0_CH2] ================ */ -/* ================================================================================ */ - - -/** - * @brief General Purpose DMA Unit 0 (GPDMA0_CH2_7) - */ - -typedef struct { /*!< (@ 0x500140B0) GPDMA0_CH2_7 Structure */ - __IO uint32_t SAR; /*!< (@ 0x500140B0) Source Address Register */ - __I uint32_t RESERVED; - __IO uint32_t DAR; /*!< (@ 0x500140B8) Destination Address Register */ - __I uint32_t RESERVED1[3]; - __IO uint32_t CTLL; /*!< (@ 0x500140C8) Control Register Low */ - __IO uint32_t CTLH; /*!< (@ 0x500140CC) Control Register High */ - __I uint32_t RESERVED2[8]; - __IO uint32_t CFGL; /*!< (@ 0x500140F0) Configuration Register Low */ - __IO uint32_t CFGH; /*!< (@ 0x500140F4) Configuration Register High */ -} GPDMA0_CH2_7_Type; - - -/* ================================================================================ */ -/* ================ GPDMA1 ================ */ -/* ================================================================================ */ - - -/** - * @brief General Purpose DMA Unit 1 (GPDMA1) - */ - -typedef struct { /*!< (@ 0x500182C0) GPDMA1 Structure */ - __IO uint32_t RAWTFR; /*!< (@ 0x500182C0) Raw IntTfr Status */ - __I uint32_t RESERVED; - __IO uint32_t RAWBLOCK; /*!< (@ 0x500182C8) Raw IntBlock Status */ - __I uint32_t RESERVED1; - __IO uint32_t RAWSRCTRAN; /*!< (@ 0x500182D0) Raw IntSrcTran Status */ - __I uint32_t RESERVED2; - __IO uint32_t RAWDSTTRAN; /*!< (@ 0x500182D8) Raw IntBlock Status */ - __I uint32_t RESERVED3; - __IO uint32_t RAWERR; /*!< (@ 0x500182E0) Raw IntErr Status */ - __I uint32_t RESERVED4; - __I uint32_t STATUSTFR; /*!< (@ 0x500182E8) IntTfr Status */ - __I uint32_t RESERVED5; - __I uint32_t STATUSBLOCK; /*!< (@ 0x500182F0) IntBlock Status */ - __I uint32_t RESERVED6; - __I uint32_t STATUSSRCTRAN; /*!< (@ 0x500182F8) IntSrcTran Status */ - __I uint32_t RESERVED7; - __I uint32_t STATUSDSTTRAN; /*!< (@ 0x50018300) IntBlock Status */ - __I uint32_t RESERVED8; - __I uint32_t STATUSERR; /*!< (@ 0x50018308) IntErr Status */ - __I uint32_t RESERVED9; - __IO uint32_t MASKTFR; /*!< (@ 0x50018310) Mask for Raw IntTfr Status */ - __I uint32_t RESERVED10; - __IO uint32_t MASKBLOCK; /*!< (@ 0x50018318) Mask for Raw IntBlock Status */ - __I uint32_t RESERVED11; - __IO uint32_t MASKSRCTRAN; /*!< (@ 0x50018320) Mask for Raw IntSrcTran Status */ - __I uint32_t RESERVED12; - __IO uint32_t MASKDSTTRAN; /*!< (@ 0x50018328) Mask for Raw IntBlock Status */ - __I uint32_t RESERVED13; - __IO uint32_t MASKERR; /*!< (@ 0x50018330) Mask for Raw IntErr Status */ - __I uint32_t RESERVED14; - __O uint32_t CLEARTFR; /*!< (@ 0x50018338) IntTfr Status */ - __I uint32_t RESERVED15; - __O uint32_t CLEARBLOCK; /*!< (@ 0x50018340) IntBlock Status */ - __I uint32_t RESERVED16; - __O uint32_t CLEARSRCTRAN; /*!< (@ 0x50018348) IntSrcTran Status */ - __I uint32_t RESERVED17; - __O uint32_t CLEARDSTTRAN; /*!< (@ 0x50018350) IntBlock Status */ - __I uint32_t RESERVED18; - __O uint32_t CLEARERR; /*!< (@ 0x50018358) IntErr Status */ - __I uint32_t RESERVED19; - __I uint32_t STATUSINT; /*!< (@ 0x50018360) Combined Interrupt Status Register */ - __I uint32_t RESERVED20; - __IO uint32_t REQSRCREG; /*!< (@ 0x50018368) Source Software Transaction Request Register */ - __I uint32_t RESERVED21; - __IO uint32_t REQDSTREG; /*!< (@ 0x50018370) Destination Software Transaction Request Register */ - __I uint32_t RESERVED22; - __IO uint32_t SGLREQSRCREG; /*!< (@ 0x50018378) Single Source Transaction Request Register */ - __I uint32_t RESERVED23; - __IO uint32_t SGLREQDSTREG; /*!< (@ 0x50018380) Single Destination Transaction Request Register */ - __I uint32_t RESERVED24; - __IO uint32_t LSTSRCREG; /*!< (@ 0x50018388) Last Source Transaction Request Register */ - __I uint32_t RESERVED25; - __IO uint32_t LSTDSTREG; /*!< (@ 0x50018390) Last Destination Transaction Request Register */ - __I uint32_t RESERVED26; - __IO uint32_t DMACFGREG; /*!< (@ 0x50018398) GPDMA Configuration Register */ - __I uint32_t RESERVED27; - __IO uint32_t CHENREG; /*!< (@ 0x500183A0) GPDMA Channel Enable Register */ - __I uint32_t RESERVED28; - __I uint32_t ID; /*!< (@ 0x500183A8) GPDMA1 ID Register */ - __I uint32_t RESERVED29[19]; - __I uint32_t TYPE; /*!< (@ 0x500183F8) GPDMA Component Type */ - __I uint32_t VERSION; /*!< (@ 0x500183FC) DMA Component Version */ -} GPDMA1_GLOBAL_TypeDef; - - -/* ================================================================================ */ -/* ================ GPDMA1_CH [GPDMA1_CH0] ================ */ -/* ================================================================================ */ - - -/** - * @brief General Purpose DMA Unit 1 (GPDMA1_CH) - */ - -typedef struct { /*!< (@ 0x50018000) GPDMA1_CH Structure */ - __IO uint32_t SAR; /*!< (@ 0x50018000) Source Address Register */ - __I uint32_t RESERVED; - __IO uint32_t DAR; /*!< (@ 0x50018008) Destination Address Register */ - __I uint32_t RESERVED1[3]; - __IO uint32_t CTLL; /*!< (@ 0x50018018) Control Register Low */ - __IO uint32_t CTLH; /*!< (@ 0x5001801C) Control Register High */ - __I uint32_t RESERVED2[8]; - __IO uint32_t CFGL; /*!< (@ 0x50018040) Configuration Register Low */ - __IO uint32_t CFGH; /*!< (@ 0x50018044) Configuration Register High */ -} GPDMA1_CH_TypeDef; - - -/* ================================================================================ */ -/* ================ FCE ================ */ -/* ================================================================================ */ - - -/** - * @brief Flexible CRC Engine (FCE) - */ - -typedef struct { /*!< (@ 0x50020000) FCE Structure */ - __IO uint32_t CLC; /*!< (@ 0x50020000) Clock Control Register */ - __I uint32_t RESERVED; - __I uint32_t ID; /*!< (@ 0x50020008) Module Identification Register */ -} FCE_GLOBAL_TypeDef; - - -/* ================================================================================ */ -/* ================ FCE_KE [FCE_KE0] ================ */ -/* ================================================================================ */ - - -/** - * @brief Flexible CRC Engine (FCE_KE) - */ - -typedef struct { /*!< (@ 0x50020020) FCE_KE Structure */ - __IO uint32_t IR; /*!< (@ 0x50020020) Input Register */ - __I uint32_t RES; /*!< (@ 0x50020024) CRC Result Register */ - __IO uint32_t CFG; /*!< (@ 0x50020028) CRC Configuration Register */ - __IO uint32_t STS; /*!< (@ 0x5002002C) CRC Status Register */ - __IO uint32_t LENGTH; /*!< (@ 0x50020030) CRC Length Register */ - __IO uint32_t CHECK; /*!< (@ 0x50020034) CRC Check Register */ - __IO uint32_t CRC; /*!< (@ 0x50020038) CRC Register */ - __IO uint32_t CTR; /*!< (@ 0x5002003C) CRC Test Register */ -} FCE_KE_TypeDef; - - -/* ================================================================================ */ -/* ================ PBA [PBA0] ================ */ -/* ================================================================================ */ - - -/** - * @brief Peripheral Bridge AHB 0 (PBA) - */ - -typedef struct { /*!< (@ 0x40000000) PBA Structure */ - __IO uint32_t STS; /*!< (@ 0x40000000) Peripheral Bridge Status Register */ - __I uint32_t WADDR; /*!< (@ 0x40000004) PBA Write Error Address Register */ -} PBA_GLOBAL_TypeDef; - - -/* ================================================================================ */ -/* ================ FLASH [FLASH0] ================ */ -/* ================================================================================ */ - - -/** - * @brief Flash Memory Controller (FLASH) - */ - -typedef struct { /*!< (@ 0x58001000) FLASH Structure */ - __I uint32_t RESERVED[1026]; - __I uint32_t ID; /*!< (@ 0x58002008) Flash Module Identification Register */ - __I uint32_t RESERVED1; - __I uint32_t FSR; /*!< (@ 0x58002010) Flash Status Register */ - __IO uint32_t FCON; /*!< (@ 0x58002014) Flash Configuration Register */ - __IO uint32_t MARP; /*!< (@ 0x58002018) Margin Control Register PFLASH */ - __I uint32_t RESERVED2; - __I uint32_t PROCON0; /*!< (@ 0x58002020) Flash Protection Configuration Register User - 0 */ - __I uint32_t PROCON1; /*!< (@ 0x58002024) Flash Protection Configuration Register User - 1 */ - __I uint32_t PROCON2; /*!< (@ 0x58002028) Flash Protection Configuration Register User - 2 */ -} FLASH0_GLOBAL_TypeDef; - - -/* ================================================================================ */ -/* ================ PREF ================ */ -/* ================================================================================ */ - - -/** - * @brief Prefetch Unit (PREF) - */ - -typedef struct { /*!< (@ 0x58004000) PREF Structure */ - __IO uint32_t PCON; /*!< (@ 0x58004000) Prefetch Configuration Register */ -} PREF_GLOBAL_TypeDef; - - -/* ================================================================================ */ -/* ================ PMU [PMU0] ================ */ -/* ================================================================================ */ - - -/** - * @brief Program Management Unit (PMU) - */ - -typedef struct { /*!< (@ 0x58000508) PMU Structure */ - __I uint32_t ID; /*!< (@ 0x58000508) PMU0 Identification Register */ -} PMU0_GLOBAL_TypeDef; - - -/* ================================================================================ */ -/* ================ WDT ================ */ -/* ================================================================================ */ - - -/** - * @brief Watch Dog Timer (WDT) - */ - -typedef struct { /*!< (@ 0x50008000) WDT Structure */ - __I uint32_t ID; /*!< (@ 0x50008000) WDT ID Register */ - __IO uint32_t CTR; /*!< (@ 0x50008004) WDT Control Register */ - __O uint32_t SRV; /*!< (@ 0x50008008) WDT Service Register */ - __I uint32_t TIM; /*!< (@ 0x5000800C) WDT Timer Register */ - __IO uint32_t WLB; /*!< (@ 0x50008010) WDT Window Lower Bound Register */ - __IO uint32_t WUB; /*!< (@ 0x50008014) WDT Window Upper Bound Register */ - __I uint32_t WDTSTS; /*!< (@ 0x50008018) WDT Status Register */ - __O uint32_t WDTCLR; /*!< (@ 0x5000801C) WDT Clear Register */ -} WDT_GLOBAL_TypeDef; - - -/* ================================================================================ */ -/* ================ RTC ================ */ -/* ================================================================================ */ - - -/** - * @brief Real Time Clock (RTC) - */ - -typedef struct { /*!< (@ 0x50004A00) RTC Structure */ - __I uint32_t ID; /*!< (@ 0x50004A00) RTC ID Register */ - __IO uint32_t CTR; /*!< (@ 0x50004A04) RTC Control Register */ - __I uint32_t RAWSTAT; /*!< (@ 0x50004A08) RTC Raw Service Request Register */ - __I uint32_t STSSR; /*!< (@ 0x50004A0C) RTC Service Request Status Register */ - __IO uint32_t MSKSR; /*!< (@ 0x50004A10) RTC Service Request Mask Register */ - __O uint32_t CLRSR; /*!< (@ 0x50004A14) RTC Clear Service Request Register */ - __IO uint32_t ATIM0; /*!< (@ 0x50004A18) RTC Alarm Time Register 0 */ - __IO uint32_t ATIM1; /*!< (@ 0x50004A1C) RTC Alarm Time Register 1 */ - __IO uint32_t TIM0; /*!< (@ 0x50004A20) RTC Time Register 0 */ - __IO uint32_t TIM1; /*!< (@ 0x50004A24) RTC Time Register 1 */ -} RTC_GLOBAL_TypeDef; - - -/* ================================================================================ */ -/* ================ SCU_CLK ================ */ -/* ================================================================================ */ - - -/** - * @brief System Control Unit (SCU_CLK) - */ - -typedef struct { /*!< (@ 0x50004600) SCU_CLK Structure */ - __I uint32_t CLKSTAT; /*!< (@ 0x50004600) Clock Status Register */ - __O uint32_t CLKSET; /*!< (@ 0x50004604) CLK Set Register */ - __O uint32_t CLKCLR; /*!< (@ 0x50004608) CLK Clear Register */ - __IO uint32_t SYSCLKCR; /*!< (@ 0x5000460C) System Clock Control Register */ - __IO uint32_t CPUCLKCR; /*!< (@ 0x50004610) CPU Clock Control Register */ - __IO uint32_t PBCLKCR; /*!< (@ 0x50004614) Peripheral Bus Clock Control Register */ - __IO uint32_t USBCLKCR; /*!< (@ 0x50004618) USB Clock Control Register */ - __IO uint32_t EBUCLKCR; /*!< (@ 0x5000461C) EBU Clock Control Register */ - __IO uint32_t CCUCLKCR; /*!< (@ 0x50004620) CCU Clock Control Register */ - __IO uint32_t WDTCLKCR; /*!< (@ 0x50004624) WDT Clock Control Register */ - __IO uint32_t EXTCLKCR; /*!< (@ 0x50004628) External Clock Control */ - __IO uint32_t MLINKCLKCR; /*!< (@ 0x5000462C) Multi-Link Clock Control */ - __IO uint32_t SLEEPCR; /*!< (@ 0x50004630) Sleep Control Register */ - __IO uint32_t DSLEEPCR; /*!< (@ 0x50004634) Deep Sleep Control Register */ - __IO uint32_t ECATCLKCR; /*!< (@ 0x50004638) EtherCAT Clock Control Register */ - __I uint32_t RESERVED; - __I uint32_t CGATSTAT0; /*!< (@ 0x50004640) Peripheral 0 Clock Gating Status */ - __O uint32_t CGATSET0; /*!< (@ 0x50004644) Peripheral 0 Clock Gating Set */ - __O uint32_t CGATCLR0; /*!< (@ 0x50004648) Peripheral 0 Clock Gating Clear */ - __I uint32_t CGATSTAT1; /*!< (@ 0x5000464C) Peripheral 1 Clock Gating Status */ - __O uint32_t CGATSET1; /*!< (@ 0x50004650) Peripheral 1 Clock Gating Set */ - __O uint32_t CGATCLR1; /*!< (@ 0x50004654) Peripheral 1 Clock Gating Clear */ - __I uint32_t CGATSTAT2; /*!< (@ 0x50004658) Peripheral 2 Clock Gating Status */ - __O uint32_t CGATSET2; /*!< (@ 0x5000465C) Peripheral 2 Clock Gating Set */ - __O uint32_t CGATCLR2; /*!< (@ 0x50004660) Peripheral 2 Clock Gating Clear */ - __I uint32_t CGATSTAT3; /*!< (@ 0x50004664) Peripheral 3 Clock Gating Status */ - __O uint32_t CGATSET3; /*!< (@ 0x50004668) Peripheral 3 Clock Gating Set */ - __O uint32_t CGATCLR3; /*!< (@ 0x5000466C) Peripheral 3 Clock Gating Clear */ -} SCU_CLK_TypeDef; - - -/* ================================================================================ */ -/* ================ SCU_OSC ================ */ -/* ================================================================================ */ - - -/** - * @brief System Control Unit (SCU_OSC) - */ - -typedef struct { /*!< (@ 0x50004700) SCU_OSC Structure */ - __I uint32_t OSCHPSTAT; /*!< (@ 0x50004700) OSC_HP Status Register */ - __IO uint32_t OSCHPCTRL; /*!< (@ 0x50004704) OSC_HP Control Register */ - __I uint32_t RESERVED; - __IO uint32_t CLKCALCONST; /*!< (@ 0x5000470C) Clock Calibration Constant Register */ -} SCU_OSC_TypeDef; - - -/* ================================================================================ */ -/* ================ SCU_PLL ================ */ -/* ================================================================================ */ - - -/** - * @brief System Control Unit (SCU_PLL) - */ - -typedef struct { /*!< (@ 0x50004710) SCU_PLL Structure */ - __I uint32_t PLLSTAT; /*!< (@ 0x50004710) PLL Status Register */ - __IO uint32_t PLLCON0; /*!< (@ 0x50004714) PLL Configuration 0 Register */ - __IO uint32_t PLLCON1; /*!< (@ 0x50004718) PLL Configuration 1 Register */ - __IO uint32_t PLLCON2; /*!< (@ 0x5000471C) PLL Configuration 2 Register */ - __I uint32_t USBPLLSTAT; /*!< (@ 0x50004720) USB PLL Status Register */ - __IO uint32_t USBPLLCON; /*!< (@ 0x50004724) USB PLL Configuration Register */ - __I uint32_t RESERVED[4]; - __I uint32_t CLKMXSTAT; /*!< (@ 0x50004738) Clock Multiplexing Status Register */ -} SCU_PLL_TypeDef; - - -/* ================================================================================ */ -/* ================ SCU_GENERAL ================ */ -/* ================================================================================ */ - - -/** - * @brief System Control Unit (SCU_GENERAL) - */ - -typedef struct { /*!< (@ 0x50004000) SCU_GENERAL Structure */ - __I uint32_t ID; /*!< (@ 0x50004000) SCU Module ID Register */ - __I uint32_t IDCHIP; /*!< (@ 0x50004004) Chip ID Register */ - __I uint32_t IDMANUF; /*!< (@ 0x50004008) Manufactory ID Register */ - __I uint32_t RESERVED; - __IO uint32_t STCON; /*!< (@ 0x50004010) Startup Configuration Register */ - __I uint32_t RESERVED1[6]; - __IO uint32_t GPR[2]; /*!< (@ 0x5000402C) General Purpose Register 0 */ - __I uint32_t RESERVED2[6]; - __IO uint32_t CCUCON; /*!< (@ 0x5000404C) CCU Control Register */ - __I uint32_t RESERVED3[15]; - __IO uint32_t DTSCON; /*!< (@ 0x5000408C) Die Temperature Sensor Control Register */ - __I uint32_t DTSSTAT; /*!< (@ 0x50004090) Die Temperature Sensor Status Register */ - __I uint32_t RESERVED4[2]; - __IO uint32_t SDMMCDEL; /*!< (@ 0x5000409C) SD-MMC Delay Control Register */ - __IO uint32_t GORCEN[2]; /*!< (@ 0x500040A0) Out of Range Comparator Enable Register 0 */ - __I uint32_t RESERVED5[7]; - __I uint32_t MIRRSTS; /*!< (@ 0x500040C4) Mirror Write Status Register */ - __IO uint32_t RMACR; /*!< (@ 0x500040C8) Retention Memory Access Control Register */ - __IO uint32_t RMDATA; /*!< (@ 0x500040CC) Retention Memory Access Data Register */ -} SCU_GENERAL_TypeDef; - - -/* ================================================================================ */ -/* ================ SCU_INTERRUPT ================ */ -/* ================================================================================ */ - - -/** - * @brief System Control Unit (SCU_INTERRUPT) - */ - -typedef struct { /*!< (@ 0x50004074) SCU_INTERRUPT Structure */ - __I uint32_t SRSTAT; /*!< (@ 0x50004074) SCU Service Request Status */ - __I uint32_t SRRAW; /*!< (@ 0x50004078) SCU Raw Service Request Status */ - __IO uint32_t SRMSK; /*!< (@ 0x5000407C) SCU Service Request Mask */ - __O uint32_t SRCLR; /*!< (@ 0x50004080) SCU Service Request Clear */ - __O uint32_t SRSET; /*!< (@ 0x50004084) SCU Service Request Set */ - __IO uint32_t NMIREQEN; /*!< (@ 0x50004088) SCU Service Request Mask */ -} SCU_INTERRUPT_TypeDef; - - -/* ================================================================================ */ -/* ================ SCU_PARITY ================ */ -/* ================================================================================ */ - - -/** - * @brief System Control Unit (SCU_PARITY) - */ - -typedef struct { /*!< (@ 0x5000413C) SCU_PARITY Structure */ - __IO uint32_t PEEN; /*!< (@ 0x5000413C) Parity Error Enable Register */ - __IO uint32_t MCHKCON; /*!< (@ 0x50004140) Memory Checking Control Register */ - __IO uint32_t PETE; /*!< (@ 0x50004144) Parity Error Trap Enable Register */ - __IO uint32_t PERSTEN; /*!< (@ 0x50004148) Parity Error Reset Enable Register */ - __I uint32_t RESERVED; - __IO uint32_t PEFLAG; /*!< (@ 0x50004150) Parity Error Flag Register */ - __IO uint32_t PMTPR; /*!< (@ 0x50004154) Parity Memory Test Pattern Register */ - __IO uint32_t PMTSR; /*!< (@ 0x50004158) Parity Memory Test Select Register */ -} SCU_PARITY_TypeDef; - - -/* ================================================================================ */ -/* ================ SCU_TRAP ================ */ -/* ================================================================================ */ - - -/** - * @brief System Control Unit (SCU_TRAP) - */ - -typedef struct { /*!< (@ 0x50004160) SCU_TRAP Structure */ - __I uint32_t TRAPSTAT; /*!< (@ 0x50004160) Trap Status Register */ - __I uint32_t TRAPRAW; /*!< (@ 0x50004164) Trap Raw Status Register */ - __IO uint32_t TRAPDIS; /*!< (@ 0x50004168) Trap Disable Register */ - __O uint32_t TRAPCLR; /*!< (@ 0x5000416C) Trap Clear Register */ - __O uint32_t TRAPSET; /*!< (@ 0x50004170) Trap Set Register */ -} SCU_TRAP_TypeDef; - - -/* ================================================================================ */ -/* ================ SCU_HIBERNATE ================ */ -/* ================================================================================ */ - - -/** - * @brief System Control Unit (SCU_HIBERNATE) - */ - -typedef struct { /*!< (@ 0x50004300) SCU_HIBERNATE Structure */ - __I uint32_t HDSTAT; /*!< (@ 0x50004300) Hibernate Domain Status Register */ - __O uint32_t HDCLR; /*!< (@ 0x50004304) Hibernate Domain Status Clear Register */ - __O uint32_t HDSET; /*!< (@ 0x50004308) Hibernate Domain Status Set Register */ - __IO uint32_t HDCR; /*!< (@ 0x5000430C) Hibernate Domain Control Register */ - __I uint32_t RESERVED; - __IO uint32_t OSCSICTRL; /*!< (@ 0x50004314) fOSI Control Register */ - __I uint32_t OSCULSTAT; /*!< (@ 0x50004318) OSC_ULP Status Register */ - __IO uint32_t OSCULCTRL; /*!< (@ 0x5000431C) OSC_ULP Control Register */ -} SCU_HIBERNATE_TypeDef; - - -/* ================================================================================ */ -/* ================ SCU_POWER ================ */ -/* ================================================================================ */ - - -/** - * @brief System Control Unit (SCU_POWER) - */ - -typedef struct { /*!< (@ 0x50004200) SCU_POWER Structure */ - __I uint32_t PWRSTAT; /*!< (@ 0x50004200) PCU Status Register */ - __O uint32_t PWRSET; /*!< (@ 0x50004204) PCU Set Control Register */ - __O uint32_t PWRCLR; /*!< (@ 0x50004208) PCU Clear Control Register */ - __I uint32_t RESERVED; - __I uint32_t EVRSTAT; /*!< (@ 0x50004210) EVR Status Register */ - __I uint32_t EVRVADCSTAT; /*!< (@ 0x50004214) EVR VADC Status Register */ - __I uint32_t RESERVED1[5]; - __IO uint32_t PWRMON; /*!< (@ 0x5000422C) Power Monitor Control */ -} SCU_POWER_TypeDef; - - -/* ================================================================================ */ -/* ================ SCU_RESET ================ */ -/* ================================================================================ */ - - -/** - * @brief System Control Unit (SCU_RESET) - */ - -typedef struct { /*!< (@ 0x50004400) SCU_RESET Structure */ - __I uint32_t RSTSTAT; /*!< (@ 0x50004400) RCU Reset Status */ - __O uint32_t RSTSET; /*!< (@ 0x50004404) RCU Reset Set Register */ - __O uint32_t RSTCLR; /*!< (@ 0x50004408) RCU Reset Clear Register */ - __I uint32_t PRSTAT0; /*!< (@ 0x5000440C) RCU Peripheral 0 Reset Status */ - __O uint32_t PRSET0; /*!< (@ 0x50004410) RCU Peripheral 0 Reset Set */ - __O uint32_t PRCLR0; /*!< (@ 0x50004414) RCU Peripheral 0 Reset Clear */ - __I uint32_t PRSTAT1; /*!< (@ 0x50004418) RCU Peripheral 1 Reset Status */ - __O uint32_t PRSET1; /*!< (@ 0x5000441C) RCU Peripheral 1 Reset Set */ - __O uint32_t PRCLR1; /*!< (@ 0x50004420) RCU Peripheral 1 Reset Clear */ - __I uint32_t PRSTAT2; /*!< (@ 0x50004424) RCU Peripheral 2 Reset Status */ - __O uint32_t PRSET2; /*!< (@ 0x50004428) RCU Peripheral 2 Reset Set */ - __O uint32_t PRCLR2; /*!< (@ 0x5000442C) RCU Peripheral 2 Reset Clear */ - __I uint32_t PRSTAT3; /*!< (@ 0x50004430) RCU Peripheral 3 Reset Status */ - __O uint32_t PRSET3; /*!< (@ 0x50004434) RCU Peripheral 3 Reset Set */ - __O uint32_t PRCLR3; /*!< (@ 0x50004438) RCU Peripheral 3 Reset Clear */ -} SCU_RESET_TypeDef; - - -/* ================================================================================ */ -/* ================ LEDTS [LEDTS0] ================ */ -/* ================================================================================ */ - - -/** - * @brief LED and Touch Sense Unit 0 (LEDTS) - */ - -typedef struct { /*!< (@ 0x48010000) LEDTS Structure */ - __I uint32_t ID; /*!< (@ 0x48010000) Module Identification Register */ - __IO uint32_t GLOBCTL; /*!< (@ 0x48010004) Global Control Register */ - __IO uint32_t FNCTL; /*!< (@ 0x48010008) Function Control Register */ - __O uint32_t EVFR; /*!< (@ 0x4801000C) Event Flag Register */ - __IO uint32_t TSVAL; /*!< (@ 0x48010010) Touch-sense TS-Counter Value */ - __IO uint32_t LINE0; /*!< (@ 0x48010014) Line Pattern Register 0 */ - __IO uint32_t LINE1; /*!< (@ 0x48010018) Line Pattern Register 1 */ - __IO uint32_t LDCMP0; /*!< (@ 0x4801001C) LED Compare Register 0 */ - __IO uint32_t LDCMP1; /*!< (@ 0x48010020) LED Compare Register 1 */ - __IO uint32_t TSCMP0; /*!< (@ 0x48010024) Touch-sense Compare Register 0 */ - __IO uint32_t TSCMP1; /*!< (@ 0x48010028) Touch-sense Compare Register 1 */ -} LEDTS0_GLOBAL_TypeDef; - - -/* ================================================================================ */ -/* ================ SDMMC_CON ================ */ -/* ================================================================================ */ - - -/** - * @brief SD and Multimediacard Control Register (SDMMC_CON) - */ - -typedef struct { /*!< (@ 0x500040B4) SDMMC_CON Structure */ - __IO uint32_t SDMMC_CON; /*!< (@ 0x500040B4) SDMMC Configuration */ -} SDMMC_CON_Type; - - -/* ================================================================================ */ -/* ================ SDMMC ================ */ -/* ================================================================================ */ - - -/** - * @brief SD and Multimediacard Interface (SDMMC) - */ - -typedef struct { /*!< (@ 0x4801C000) SDMMC Structure */ - __I uint32_t RESERVED; - __IO uint16_t BLOCK_SIZE; /*!< (@ 0x4801C004) Block Size Register */ - __IO uint16_t BLOCK_COUNT; /*!< (@ 0x4801C006) Block Count Register */ - __IO uint32_t ARGUMENT1; /*!< (@ 0x4801C008) Argument1 Register */ - __IO uint16_t TRANSFER_MODE; /*!< (@ 0x4801C00C) Transfer Mode Register */ - __IO uint16_t COMMAND; /*!< (@ 0x4801C00E) Command Register */ - __I uint32_t RESPONSE0; /*!< (@ 0x4801C010) Response 0 Register */ - __I uint32_t RESPONSE2; /*!< (@ 0x4801C014) Response 2 Register */ - __I uint32_t RESPONSE4; /*!< (@ 0x4801C018) Response 4 Register */ - __I uint32_t RESPONSE6; /*!< (@ 0x4801C01C) Response 6 Register */ - __IO uint32_t DATA_BUFFER; /*!< (@ 0x4801C020) Data Buffer Register */ - __I uint32_t PRESENT_STATE; /*!< (@ 0x4801C024) Present State Register */ - __IO uint8_t HOST_CTRL; /*!< (@ 0x4801C028) Host Control Register */ - __IO uint8_t POWER_CTRL; /*!< (@ 0x4801C029) Power Control Register */ - __IO uint8_t BLOCK_GAP_CTRL; /*!< (@ 0x4801C02A) Block Gap Control Register */ - __IO uint8_t WAKEUP_CTRL; /*!< (@ 0x4801C02B) Wake-up Control Register */ - __IO uint16_t CLOCK_CTRL; /*!< (@ 0x4801C02C) Clock Control Register */ - __IO uint8_t TIMEOUT_CTRL; /*!< (@ 0x4801C02E) Timeout Control Register */ - __IO uint8_t SW_RESET; /*!< (@ 0x4801C02F) Software Reset Register */ - __IO uint16_t INT_STATUS_NORM; /*!< (@ 0x4801C030) Normal Interrupt Status Register */ - __IO uint16_t INT_STATUS_ERR; /*!< (@ 0x4801C032) Error Interrupt Status Register */ - __IO uint16_t EN_INT_STATUS_NORM; /*!< (@ 0x4801C034) Normal Interrupt Status Enable Register */ - __IO uint16_t EN_INT_STATUS_ERR; /*!< (@ 0x4801C036) Error Interrupt Status Enable Register */ - __IO uint16_t EN_INT_SIGNAL_NORM; /*!< (@ 0x4801C038) Normal Interrupt Signal Enable Register */ - __IO uint16_t EN_INT_SIGNAL_ERR; /*!< (@ 0x4801C03A) Error Interrupt Signal Enable Register */ - __I uint16_t ACMD_ERR_STATUS; /*!< (@ 0x4801C03C) Auto CMD Error Status Register */ - __I uint16_t RESERVED1; - __I uint32_t CAPABILITIES; /*!< (@ 0x4801C040) Capabilities Register */ - __I uint32_t CAPABILITIES_HI; /*!< (@ 0x4801C044) Capabilities Register High */ - __I uint32_t MAX_CURRENT_CAP; /*!< (@ 0x4801C048) Maximum Current Capabilities Register */ - __I uint32_t RESERVED2; - __O uint16_t FORCE_EVENT_ACMD_ERR_STATUS; /*!< (@ 0x4801C050) Force Event Register for Auto CMD Error Status */ - __O uint16_t FORCE_EVENT_ERR_STATUS; /*!< (@ 0x4801C052) Force Event Register for Error Interrupt Status */ - __I uint32_t RESERVED3[8]; - __O uint32_t DEBUG_SEL; /*!< (@ 0x4801C074) Debug Selection Register */ - __I uint32_t RESERVED4[33]; - __I uint16_t SLOT_INT_STATUS; /*!< (@ 0x4801C0FC) Slot Interrupt Status Register */ -} SDMMC_GLOBAL_TypeDef; - - -/* ================================================================================ */ -/* ================ EBU ================ */ -/* ================================================================================ */ - - -/** - * @brief External Bus Unit (EBU) - */ - -typedef struct { /*!< (@ 0x58008000) EBU Structure */ - __IO uint32_t CLC; /*!< (@ 0x58008000) EBU Clock Control Register */ - __IO uint32_t MODCON; /*!< (@ 0x58008004) EBU Configuration Register */ - __I uint32_t ID; /*!< (@ 0x58008008) EBU Module Identification Register */ - __IO uint32_t USERCON; /*!< (@ 0x5800800C) EBU Test/Control Configuration Register */ - __I uint32_t RESERVED[2]; - __IO uint32_t ADDRSEL0; /*!< (@ 0x58008018) EBU Address Select Register 0 */ - __IO uint32_t ADDRSEL1; /*!< (@ 0x5800801C) EBU Address Select Register 1 */ - __IO uint32_t ADDRSEL2; /*!< (@ 0x58008020) EBU Address Select Register 2 */ - __IO uint32_t ADDRSEL3; /*!< (@ 0x58008024) EBU Address Select Register 3 */ - __IO uint32_t BUSRCON0; /*!< (@ 0x58008028) EBU Bus Configuration Register */ - __IO uint32_t BUSRAP0; /*!< (@ 0x5800802C) EBU Bus Read Access Parameter Register */ - __IO uint32_t BUSWCON0; /*!< (@ 0x58008030) EBU Bus Write Configuration Register */ - __IO uint32_t BUSWAP0; /*!< (@ 0x58008034) EBU Bus Write Access Parameter Register */ - __IO uint32_t BUSRCON1; /*!< (@ 0x58008038) EBU Bus Configuration Register */ - __IO uint32_t BUSRAP1; /*!< (@ 0x5800803C) EBU Bus Read Access Parameter Register */ - __IO uint32_t BUSWCON1; /*!< (@ 0x58008040) EBU Bus Write Configuration Register */ - __IO uint32_t BUSWAP1; /*!< (@ 0x58008044) EBU Bus Write Access Parameter Register */ - __IO uint32_t BUSRCON2; /*!< (@ 0x58008048) EBU Bus Configuration Register */ - __IO uint32_t BUSRAP2; /*!< (@ 0x5800804C) EBU Bus Read Access Parameter Register */ - __IO uint32_t BUSWCON2; /*!< (@ 0x58008050) EBU Bus Write Configuration Register */ - __IO uint32_t BUSWAP2; /*!< (@ 0x58008054) EBU Bus Write Access Parameter Register */ - __IO uint32_t BUSRCON3; /*!< (@ 0x58008058) EBU Bus Configuration Register */ - __IO uint32_t BUSRAP3; /*!< (@ 0x5800805C) EBU Bus Read Access Parameter Register */ - __IO uint32_t BUSWCON3; /*!< (@ 0x58008060) EBU Bus Write Configuration Register */ - __IO uint32_t BUSWAP3; /*!< (@ 0x58008064) EBU Bus Write Access Parameter Register */ - __IO uint32_t SDRMCON; /*!< (@ 0x58008068) EBU SDRAM Control Register */ - __IO uint32_t SDRMOD; /*!< (@ 0x5800806C) EBU SDRAM Mode Register */ - __IO uint32_t SDRMREF; /*!< (@ 0x58008070) EBU SDRAM Refresh Control Register */ - __I uint32_t SDRSTAT; /*!< (@ 0x58008074) EBU SDRAM Status Register */ -} EBU_Type; - - -/* ================================================================================ */ -/* ================ ETH0_CON ================ */ -/* ================================================================================ */ - - -/** - * @brief Ethernet Control Register (ETH0_CON) - */ - -typedef struct { /*!< (@ 0x50004040) ETH0_CON Structure */ - __IO uint32_t CON; /*!< (@ 0x50004040) Ethernet 0 Port Control Register */ -} ETH0_CON_GLOBAL_TypeDef; - - -/* ================================================================================ */ -/* ================ ETH [ETH0] ================ */ -/* ================================================================================ */ - - -/** - * @brief Ethernet Unit 0 (ETH) - */ - -typedef struct { /*!< (@ 0x5000C000) ETH Structure */ - __IO uint32_t MAC_CONFIGURATION; /*!< (@ 0x5000C000) MAC Configuration Register */ - __IO uint32_t MAC_FRAME_FILTER; /*!< (@ 0x5000C004) MAC Frame Filter */ - __IO uint32_t HASH_TABLE_HIGH; /*!< (@ 0x5000C008) Hash Table High Register */ - __IO uint32_t HASH_TABLE_LOW; /*!< (@ 0x5000C00C) Hash Table Low Register */ - __IO uint32_t GMII_ADDRESS; /*!< (@ 0x5000C010) MII Address Register */ - __IO uint32_t GMII_DATA; /*!< (@ 0x5000C014) MII Data Register */ - __IO uint32_t FLOW_CONTROL; /*!< (@ 0x5000C018) Flow Control Register */ - __IO uint32_t VLAN_TAG; /*!< (@ 0x5000C01C) VLAN Tag Register */ - __I uint32_t VERSION; /*!< (@ 0x5000C020) Version Register */ - __I uint32_t DEBUG; /*!< (@ 0x5000C024) Debug Register */ - __IO uint32_t REMOTE_WAKE_UP_FRAME_FILTER; /*!< (@ 0x5000C028) Remote Wake Up Frame Filter Register */ - __IO uint32_t PMT_CONTROL_STATUS; /*!< (@ 0x5000C02C) PMT Control and Status Register */ - __I uint32_t RESERVED[2]; - __I uint32_t INTERRUPT_STATUS; /*!< (@ 0x5000C038) Interrupt Register */ - __IO uint32_t INTERRUPT_MASK; /*!< (@ 0x5000C03C) Interrupt Mask Register */ - __IO uint32_t MAC_ADDRESS0_HIGH; /*!< (@ 0x5000C040) MAC Address0 High Register */ - __IO uint32_t MAC_ADDRESS0_LOW; /*!< (@ 0x5000C044) MAC Address0 Low Register */ - __IO uint32_t MAC_ADDRESS1_HIGH; /*!< (@ 0x5000C048) MAC Address1 High Register */ - __IO uint32_t MAC_ADDRESS1_LOW; /*!< (@ 0x5000C04C) MAC Address1 Low Register */ - __IO uint32_t MAC_ADDRESS2_HIGH; /*!< (@ 0x5000C050) MAC Address2 High Register */ - __IO uint32_t MAC_ADDRESS2_LOW; /*!< (@ 0x5000C054) MAC Address2 Low Register */ - __IO uint32_t MAC_ADDRESS3_HIGH; /*!< (@ 0x5000C058) MAC Address3 High Register */ - __IO uint32_t MAC_ADDRESS3_LOW; /*!< (@ 0x5000C05C) MAC Address3 Low Register */ - __I uint32_t RESERVED1[40]; - __IO uint32_t MMC_CONTROL; /*!< (@ 0x5000C100) MMC Control Register */ - __I uint32_t MMC_RECEIVE_INTERRUPT; /*!< (@ 0x5000C104) MMC Receive Interrupt Register */ - __I uint32_t MMC_TRANSMIT_INTERRUPT; /*!< (@ 0x5000C108) MMC Transmit Interrupt Register */ - __IO uint32_t MMC_RECEIVE_INTERRUPT_MASK; /*!< (@ 0x5000C10C) MMC Reveive Interrupt Mask Register */ - __IO uint32_t MMC_TRANSMIT_INTERRUPT_MASK; /*!< (@ 0x5000C110) MMC Transmit Interrupt Mask Register */ - __I uint32_t TX_OCTET_COUNT_GOOD_BAD; /*!< (@ 0x5000C114) Transmit Octet Count for Good and Bad Frames - Register */ - __I uint32_t TX_FRAME_COUNT_GOOD_BAD; /*!< (@ 0x5000C118) Transmit Frame Count for Goodand Bad Frames Register */ - __I uint32_t TX_BROADCAST_FRAMES_GOOD; /*!< (@ 0x5000C11C) Transmit Frame Count for Good Broadcast Frames */ - __I uint32_t TX_MULTICAST_FRAMES_GOOD; /*!< (@ 0x5000C120) Transmit Frame Count for Good Multicast Frames */ - __I uint32_t TX_64OCTETS_FRAMES_GOOD_BAD; /*!< (@ 0x5000C124) Transmit Octet Count for Good and Bad 64 Byte - Frames */ - __I uint32_t TX_65TO127OCTETS_FRAMES_GOOD_BAD; /*!< (@ 0x5000C128) Transmit Octet Count for Good and Bad 65 to 127 - Bytes Frames */ - __I uint32_t TX_128TO255OCTETS_FRAMES_GOOD_BAD; /*!< (@ 0x5000C12C) Transmit Octet Count for Good and Bad 128 to - 255 Bytes Frames */ - __I uint32_t TX_256TO511OCTETS_FRAMES_GOOD_BAD; /*!< (@ 0x5000C130) Transmit Octet Count for Good and Bad 256 to - 511 Bytes Frames */ - __I uint32_t TX_512TO1023OCTETS_FRAMES_GOOD_BAD;/*!< (@ 0x5000C134) Transmit Octet Count for Good and Bad 512 to - 1023 Bytes Frames */ - __I uint32_t TX_1024TOMAXOCTETS_FRAMES_GOOD_BAD;/*!< (@ 0x5000C138) Transmit Octet Count for Good and Bad 1024 to - Maxsize Bytes Frames */ - __I uint32_t TX_UNICAST_FRAMES_GOOD_BAD; /*!< (@ 0x5000C13C) Transmit Frame Count for Good and Bad Unicast - Frames */ - __I uint32_t TX_MULTICAST_FRAMES_GOOD_BAD; /*!< (@ 0x5000C140) Transmit Frame Count for Good and Bad Multicast - Frames */ - __I uint32_t TX_BROADCAST_FRAMES_GOOD_BAD; /*!< (@ 0x5000C144) Transmit Frame Count for Good and Bad Broadcast - Frames */ - __I uint32_t TX_UNDERFLOW_ERROR_FRAMES; /*!< (@ 0x5000C148) Transmit Frame Count for Underflow Error Frames */ - __I uint32_t TX_SINGLE_COLLISION_GOOD_FRAMES; /*!< (@ 0x5000C14C) Transmit Frame Count for Frames Transmitted after - Single Collision */ - __I uint32_t TX_MULTIPLE_COLLISION_GOOD_FRAMES; /*!< (@ 0x5000C150) Transmit Frame Count for Frames Transmitted after - Multiple Collision */ - __I uint32_t TX_DEFERRED_FRAMES; /*!< (@ 0x5000C154) Tx Deferred Frames Register */ - __I uint32_t TX_LATE_COLLISION_FRAMES; /*!< (@ 0x5000C158) Transmit Frame Count for Late Collision Error - Frames */ - __I uint32_t TX_EXCESSIVE_COLLISION_FRAMES; /*!< (@ 0x5000C15C) Transmit Frame Count for Excessive Collision - Error Frames */ - __I uint32_t TX_CARRIER_ERROR_FRAMES; /*!< (@ 0x5000C160) Transmit Frame Count for Carrier Sense Error - Frames */ - __I uint32_t TX_OCTET_COUNT_GOOD; /*!< (@ 0x5000C164) Tx Octet Count Good Register */ - __I uint32_t TX_FRAME_COUNT_GOOD; /*!< (@ 0x5000C168) Tx Frame Count Good Register */ - __I uint32_t TX_EXCESSIVE_DEFERRAL_ERROR; /*!< (@ 0x5000C16C) Transmit Frame Count for Excessive Deferral Error - Frames */ - __I uint32_t TX_PAUSE_FRAMES; /*!< (@ 0x5000C170) Transmit Frame Count for Good PAUSE Frames */ - __I uint32_t TX_VLAN_FRAMES_GOOD; /*!< (@ 0x5000C174) Transmit Frame Count for Good VLAN Frames */ - __I uint32_t TX_OSIZE_FRAMES_GOOD; /*!< (@ 0x5000C178) Transmit Frame Count for Good Oversize Frames */ - __I uint32_t RESERVED2; - __I uint32_t RX_FRAMES_COUNT_GOOD_BAD; /*!< (@ 0x5000C180) Receive Frame Count for Good and Bad Frames */ - __I uint32_t RX_OCTET_COUNT_GOOD_BAD; /*!< (@ 0x5000C184) Receive Octet Count for Good and Bad Frames */ - __I uint32_t RX_OCTET_COUNT_GOOD; /*!< (@ 0x5000C188) Rx Octet Count Good Register */ - __I uint32_t RX_BROADCAST_FRAMES_GOOD; /*!< (@ 0x5000C18C) Receive Frame Count for Good Broadcast Frames */ - __I uint32_t RX_MULTICAST_FRAMES_GOOD; /*!< (@ 0x5000C190) Receive Frame Count for Good Multicast Frames */ - __I uint32_t RX_CRC_ERROR_FRAMES; /*!< (@ 0x5000C194) Receive Frame Count for CRC Error Frames */ - __I uint32_t RX_ALIGNMENT_ERROR_FRAMES; /*!< (@ 0x5000C198) Receive Frame Count for Alignment Error Frames */ - __I uint32_t RX_RUNT_ERROR_FRAMES; /*!< (@ 0x5000C19C) Receive Frame Count for Runt Error Frames */ - __I uint32_t RX_JABBER_ERROR_FRAMES; /*!< (@ 0x5000C1A0) Receive Frame Count for Jabber Error Frames */ - __I uint32_t RX_UNDERSIZE_FRAMES_GOOD; /*!< (@ 0x5000C1A4) Receive Frame Count for Undersize Frames */ - __I uint32_t RX_OVERSIZE_FRAMES_GOOD; /*!< (@ 0x5000C1A8) Rx Oversize Frames Good Register */ - __I uint32_t RX_64OCTETS_FRAMES_GOOD_BAD; /*!< (@ 0x5000C1AC) Receive Frame Count for Good and Bad 64 Byte - Frames */ - __I uint32_t RX_65TO127OCTETS_FRAMES_GOOD_BAD; /*!< (@ 0x5000C1B0) Receive Frame Count for Good and Bad 65 to 127 - Bytes Frames */ - __I uint32_t RX_128TO255OCTETS_FRAMES_GOOD_BAD; /*!< (@ 0x5000C1B4) Receive Frame Count for Good and Bad 128 to 255 - Bytes Frames */ - __I uint32_t RX_256TO511OCTETS_FRAMES_GOOD_BAD; /*!< (@ 0x5000C1B8) Receive Frame Count for Good and Bad 256 to 511 - Bytes Frames */ - __I uint32_t RX_512TO1023OCTETS_FRAMES_GOOD_BAD;/*!< (@ 0x5000C1BC) Receive Frame Count for Good and Bad 512 to 1,023 - Bytes Frames */ - __I uint32_t RX_1024TOMAXOCTETS_FRAMES_GOOD_BAD;/*!< (@ 0x5000C1C0) Receive Frame Count for Good and Bad 1,024 to - Maxsize Bytes Frames */ - __I uint32_t RX_UNICAST_FRAMES_GOOD; /*!< (@ 0x5000C1C4) Receive Frame Count for Good Unicast Frames */ - __I uint32_t RX_LENGTH_ERROR_FRAMES; /*!< (@ 0x5000C1C8) Receive Frame Count for Length Error Frames */ - __I uint32_t RX_OUT_OF_RANGE_TYPE_FRAMES; /*!< (@ 0x5000C1CC) Receive Frame Count for Out of Range Frames */ - __I uint32_t RX_PAUSE_FRAMES; /*!< (@ 0x5000C1D0) Receive Frame Count for PAUSE Frames */ - __I uint32_t RX_FIFO_OVERFLOW_FRAMES; /*!< (@ 0x5000C1D4) Receive Frame Count for FIFO Overflow Frames */ - __I uint32_t RX_VLAN_FRAMES_GOOD_BAD; /*!< (@ 0x5000C1D8) Receive Frame Count for Good and Bad VLAN Frames */ - __I uint32_t RX_WATCHDOG_ERROR_FRAMES; /*!< (@ 0x5000C1DC) Receive Frame Count for Watchdog Error Frames */ - __I uint32_t RX_RECEIVE_ERROR_FRAMES; /*!< (@ 0x5000C1E0) Receive Frame Count for Receive Error Frames */ - __I uint32_t RX_CONTROL_FRAMES_GOOD; /*!< (@ 0x5000C1E4) Receive Frame Count for Good Control Frames Frames */ - __I uint32_t RESERVED3[6]; - __IO uint32_t MMC_IPC_RECEIVE_INTERRUPT_MASK; /*!< (@ 0x5000C200) MMC Receive Checksum Offload Interrupt Mask Register */ - __I uint32_t RESERVED4; - __I uint32_t MMC_IPC_RECEIVE_INTERRUPT; /*!< (@ 0x5000C208) MMC Receive Checksum Offload Interrupt Register */ - __I uint32_t RESERVED5; - __I uint32_t RXIPV4_GOOD_FRAMES; /*!< (@ 0x5000C210) RxIPv4 Good Frames Register */ - __I uint32_t RXIPV4_HEADER_ERROR_FRAMES; /*!< (@ 0x5000C214) Receive IPV4 Header Error Frame Counter Register */ - __I uint32_t RXIPV4_NO_PAYLOAD_FRAMES; /*!< (@ 0x5000C218) Receive IPV4 No Payload Frame Counter Register */ - __I uint32_t RXIPV4_FRAGMENTED_FRAMES; /*!< (@ 0x5000C21C) Receive IPV4 Fragmented Frame Counter Register */ - __I uint32_t RXIPV4_UDP_CHECKSUM_DISABLED_FRAMES;/*!< (@ 0x5000C220) Receive IPV4 UDP Checksum Disabled Frame Counter - Register */ - __I uint32_t RXIPV6_GOOD_FRAMES; /*!< (@ 0x5000C224) RxIPv6 Good Frames Register */ - __I uint32_t RXIPV6_HEADER_ERROR_FRAMES; /*!< (@ 0x5000C228) Receive IPV6 Header Error Frame Counter Register */ - __I uint32_t RXIPV6_NO_PAYLOAD_FRAMES; /*!< (@ 0x5000C22C) Receive IPV6 No Payload Frame Counter Register */ - __I uint32_t RXUDP_GOOD_FRAMES; /*!< (@ 0x5000C230) RxUDP Good Frames Register */ - __I uint32_t RXUDP_ERROR_FRAMES; /*!< (@ 0x5000C234) RxUDP Error Frames Register */ - __I uint32_t RXTCP_GOOD_FRAMES; /*!< (@ 0x5000C238) RxTCP Good Frames Register */ - __I uint32_t RXTCP_ERROR_FRAMES; /*!< (@ 0x5000C23C) RxTCP Error Frames Register */ - __I uint32_t RXICMP_GOOD_FRAMES; /*!< (@ 0x5000C240) RxICMP Good Frames Register */ - __I uint32_t RXICMP_ERROR_FRAMES; /*!< (@ 0x5000C244) RxICMP Error Frames Register */ - __I uint32_t RESERVED6[2]; - __I uint32_t RXIPV4_GOOD_OCTETS; /*!< (@ 0x5000C250) RxIPv4 Good Octets Register */ - __I uint32_t RXIPV4_HEADER_ERROR_OCTETS; /*!< (@ 0x5000C254) Receive IPV4 Header Error Octet Counter Register */ - __I uint32_t RXIPV4_NO_PAYLOAD_OCTETS; /*!< (@ 0x5000C258) Receive IPV4 No Payload Octet Counter Register */ - __I uint32_t RXIPV4_FRAGMENTED_OCTETS; /*!< (@ 0x5000C25C) Receive IPV4 Fragmented Octet Counter Register */ - __I uint32_t RXIPV4_UDP_CHECKSUM_DISABLE_OCTETS;/*!< (@ 0x5000C260) Receive IPV4 Fragmented Octet Counter Register */ - __I uint32_t RXIPV6_GOOD_OCTETS; /*!< (@ 0x5000C264) RxIPv6 Good Octets Register */ - __I uint32_t RXIPV6_HEADER_ERROR_OCTETS; /*!< (@ 0x5000C268) Receive IPV6 Header Error Octet Counter Register */ - __I uint32_t RXIPV6_NO_PAYLOAD_OCTETS; /*!< (@ 0x5000C26C) Receive IPV6 No Payload Octet Counter Register */ - __I uint32_t RXUDP_GOOD_OCTETS; /*!< (@ 0x5000C270) Receive UDP Good Octets Register */ - __I uint32_t RXUDP_ERROR_OCTETS; /*!< (@ 0x5000C274) Receive UDP Error Octets Register */ - __I uint32_t RXTCP_GOOD_OCTETS; /*!< (@ 0x5000C278) Receive TCP Good Octets Register */ - __I uint32_t RXTCP_ERROR_OCTETS; /*!< (@ 0x5000C27C) Receive TCP Error Octets Register */ - __I uint32_t RXICMP_GOOD_OCTETS; /*!< (@ 0x5000C280) Receive ICMP Good Octets Register */ - __I uint32_t RXICMP_ERROR_OCTETS; /*!< (@ 0x5000C284) Receive ICMP Error Octets Register */ - __I uint32_t RESERVED7[286]; - __IO uint32_t TIMESTAMP_CONTROL; /*!< (@ 0x5000C700) Timestamp Control Register */ - __IO uint32_t SUB_SECOND_INCREMENT; /*!< (@ 0x5000C704) Sub-Second Increment Register */ - __I uint32_t SYSTEM_TIME_SECONDS; /*!< (@ 0x5000C708) System Time - Seconds Register */ - __I uint32_t SYSTEM_TIME_NANOSECONDS; /*!< (@ 0x5000C70C) System Time Nanoseconds Register */ - __IO uint32_t SYSTEM_TIME_SECONDS_UPDATE; /*!< (@ 0x5000C710) System Time - Seconds Update Register */ - __IO uint32_t SYSTEM_TIME_NANOSECONDS_UPDATE; /*!< (@ 0x5000C714) System Time Nanoseconds Update Register */ - __IO uint32_t TIMESTAMP_ADDEND; /*!< (@ 0x5000C718) Timestamp Addend Register */ - __IO uint32_t TARGET_TIME_SECONDS; /*!< (@ 0x5000C71C) Target Time Seconds Register */ - __IO uint32_t TARGET_TIME_NANOSECONDS; /*!< (@ 0x5000C720) Target Time Nanoseconds Register */ - __IO uint32_t SYSTEM_TIME_HIGHER_WORD_SECONDS; /*!< (@ 0x5000C724) System Time - Higher Word Seconds Register */ - __I uint32_t TIMESTAMP_STATUS; /*!< (@ 0x5000C728) Timestamp Status Register */ - __I uint32_t RESERVED8[565]; - __IO uint32_t BUS_MODE; /*!< (@ 0x5000D000) Bus Mode Register */ - __IO uint32_t TRANSMIT_POLL_DEMAND; /*!< (@ 0x5000D004) Transmit Poll Demand Register */ - __IO uint32_t RECEIVE_POLL_DEMAND; /*!< (@ 0x5000D008) Receive Poll Demand Register */ - __IO uint32_t RECEIVE_DESCRIPTOR_LIST_ADDRESS; /*!< (@ 0x5000D00C) Receive Descriptor Address Register */ - __IO uint32_t TRANSMIT_DESCRIPTOR_LIST_ADDRESS; /*!< (@ 0x5000D010) Transmit descripter Address Register */ - __IO uint32_t STATUS; /*!< (@ 0x5000D014) Status Register */ - __IO uint32_t OPERATION_MODE; /*!< (@ 0x5000D018) Operation Mode Register */ - __IO uint32_t INTERRUPT_ENABLE; /*!< (@ 0x5000D01C) Interrupt Enable Register */ - __I uint32_t MISSED_FRAME_AND_BUFFER_OVERFLOW_COUNTER;/*!< (@ 0x5000D020) Missed Frame and Buffer Overflow Counter Register */ - __IO uint32_t RECEIVE_INTERRUPT_WATCHDOG_TIMER; /*!< (@ 0x5000D024) Receive Interrupt Watchdog Timer Register */ - __I uint32_t RESERVED9; - __I uint32_t AHB_STATUS; /*!< (@ 0x5000D02C) AHB Status Register */ - __I uint32_t RESERVED10[6]; - __I uint32_t CURRENT_HOST_TRANSMIT_DESCRIPTOR; /*!< (@ 0x5000D048) Current Host Transmit Descriptor Register */ - __I uint32_t CURRENT_HOST_RECEIVE_DESCRIPTOR; /*!< (@ 0x5000D04C) Current Host Receive Descriptor Register */ - __I uint32_t CURRENT_HOST_TRANSMIT_BUFFER_ADDRESS;/*!< (@ 0x5000D050) Current Host Transmit Buffer Address Register */ - __I uint32_t CURRENT_HOST_RECEIVE_BUFFER_ADDRESS;/*!< (@ 0x5000D054) Current Host Receive Buffer Address Register */ - __IO uint32_t HW_FEATURE; /*!< (@ 0x5000D058) HW Feature Register */ -} ETH_GLOBAL_TypeDef; - - -/* ================================================================================ */ -/* ================ ECAT0_CON ================ */ -/* ================================================================================ */ - - -/** - * @brief EtherCAT 0 Control Register (ECAT0_CON) - */ - -typedef struct { /*!< (@ 0x500041B0) ECAT0_CON Structure */ - __IO uint32_t CON; /*!< (@ 0x500041B0) EtherCAT 0 Control */ - __IO uint32_t CONP0; /*!< (@ 0x500041B4) EtherCAT 0 Port 1 Control Register */ - __IO uint32_t CONP1; /*!< (@ 0x500041B8) EtherCAT 0 Port 1 Control Register */ -} ECAT0_CON_Type; - - -/* ================================================================================ */ -/* ================ ECAT [ECAT0] ================ */ -/* ================================================================================ */ - - -/** - * @brief EtherCAT 0 (ECAT) - */ - -typedef struct { /*!< (@ 0x54010000) ECAT Structure */ - __I uint8_t TYPE; /*!< (@ 0x54010000) Type of EtherCAT Controller */ - __I uint8_t REVISION; /*!< (@ 0x54010001) Revision of EtherCAT Controller */ - __I uint16_t BUILD; /*!< (@ 0x54010002) Build Version */ - __I uint8_t FMMU_NUM; /*!< (@ 0x54010004) FMMUs Supported */ - __I uint8_t SYNC_MANAGER; /*!< (@ 0x54010005) SyncManagers Supported */ - __I uint8_t RAM_SIZE; /*!< (@ 0x54010006) RAM Size */ - __I uint8_t PORT_DESC; /*!< (@ 0x54010007) Port Descriptor */ - __I uint16_t FEATURE; /*!< (@ 0x54010008) ESC Features Supported */ - __I uint16_t RESERVED[3]; - __I uint16_t STATION_ADR; /*!< (@ 0x54010010) Configured Station Address */ - __IO uint16_t STATION_ALIAS; /*!< (@ 0x54010012) Configured Station Alias */ - __I uint32_t RESERVED1[3]; - __I uint8_t WR_REG_ENABLE; /*!< (@ 0x54010020) Write Register Enable */ - __I uint8_t WR_REG_PROTECT; /*!< (@ 0x54010021) Write Register Protection */ - __I uint16_t RESERVED2[7]; - __I uint8_t ESC_WR_ENABLE; /*!< (@ 0x54010030) ESC Write Enable */ - __I uint8_t ESC_WR_PROTECT; /*!< (@ 0x54010031) ESC Write Protection */ - __I uint16_t RESERVED3[7]; - - union { - __I uint8_t ESC_RESET_ECAT_READMode; /*!< (@ 0x54010040) ESC Reset ECAT [READ Mode] */ - __I uint8_t ESC_RESET_ECAT_WRITEMode; /*!< (@ 0x54010040) ESC Reset ECAT [WRITE Mode] */ - }; - - union { - __I uint8_t ESC_RESET_PDI_READMode; /*!< (@ 0x54010041) ESC Reset PDI [READ Mode] */ - __I uint8_t ESC_RESET_PDI_WRITEMode; /*!< (@ 0x54010041) ESC Reset PDI [WRITE Mode] */ - }; - __I uint16_t RESERVED4[95]; - __I uint32_t ESC_DL_CONTROL; /*!< (@ 0x54010100) ESC DL Control */ - __I uint32_t RESERVED5; - __I uint16_t PHYSICAL_RW_OFFSET; /*!< (@ 0x54010108) Physical Read/Write Offset */ - __I uint16_t RESERVED6[3]; - __I uint16_t ESC_DL_STATUS; /*!< (@ 0x54010110) ESC DL Status */ - __I uint16_t RESERVED7[7]; - __I uint16_t AL_CONTROL; /*!< (@ 0x54010120) AL Control */ - __I uint16_t RESERVED8[7]; - __IO uint16_t AL_STATUS; /*!< (@ 0x54010130) AL Status */ - __I uint16_t RESERVED9; - __IO uint16_t AL_STATUS_CODE; /*!< (@ 0x54010134) AL Status Code */ - __I uint16_t RESERVED10; - __IO uint8_t RUN_LED; /*!< (@ 0x54010138) RUN LED Override */ - __IO uint8_t ERR_LED; /*!< (@ 0x54010139) RUN ERR Override */ - __I uint16_t RESERVED11[3]; - __I uint8_t PDI_CONTROL; /*!< (@ 0x54010140) PDI Control */ - __I uint8_t ESC_CONFIG; /*!< (@ 0x54010141) ESC Configuration */ - __I uint16_t RESERVED12[7]; - __I uint8_t PDI_CONFIG; /*!< (@ 0x54010150) PDI Control */ - __I uint8_t SYNC_LATCH_CONFIG; /*!< (@ 0x54010151) Sync/Latch[1:0] PDI Configuration */ - __I uint16_t PDI_EXT_CONFIG; /*!< (@ 0x54010152) PDI Synchronous Microcontroller extended Configuration */ - __I uint32_t RESERVED13[43]; - __I uint16_t EVENT_MASK; /*!< (@ 0x54010200) ECAT Event Mask */ - __I uint16_t RESERVED14; - __IO uint32_t AL_EVENT_MASK; /*!< (@ 0x54010204) PDI AL Event Mask */ - __I uint32_t RESERVED15[2]; - __I uint16_t EVENT_REQ; /*!< (@ 0x54010210) ECAT Event Request */ - __I uint16_t RESERVED16[7]; - __IO uint32_t AL_EVENT_REQ; /*!< (@ 0x54010220) AL Event Request */ - __I uint32_t RESERVED17[55]; - __I uint16_t RX_ERR_COUNT0; /*!< (@ 0x54010300) RX Error Counter Port 0 */ - __I uint16_t RX_ERR_COUNT1; /*!< (@ 0x54010302) RX Error Counter Port 1 */ - __I uint32_t RESERVED18; - __I uint8_t FWD_RX_ERR_COUNT0; /*!< (@ 0x54010308) Forwarded RX Error Counter Port 0 */ - __I uint8_t FWD_RX_ERR_COUNT1; /*!< (@ 0x54010309) Forwarded RX Error Counter Port 1 */ - __I uint16_t RESERVED19; - __I uint8_t PROC_ERR_COUNT; /*!< (@ 0x5401030C) ECAT Processing Unit Error Counter */ - __I uint8_t PDI_ERR_COUNT; /*!< (@ 0x5401030D) PDI Error Counter */ - __I uint16_t RESERVED20; - __I uint8_t LOST_LINK_COUNT0; /*!< (@ 0x54010310) Lost Link Counter Port 0 */ - __I uint8_t LOST_LINK_COUNT1; /*!< (@ 0x54010311) Lost Link Counter Port 1 */ - __I uint16_t RESERVED21[119]; - __IO uint16_t WD_DIVIDE; /*!< (@ 0x54010400) Watchdog Divider */ - __I uint16_t RESERVED22[7]; - __IO uint16_t WD_TIME_PDI; /*!< (@ 0x54010410) Watchdog Time PDI */ - __I uint16_t RESERVED23[7]; - __IO uint16_t WD_TIME_PDATA; /*!< (@ 0x54010420) Watchdog Time Process Data */ - __I uint16_t RESERVED24[15]; - __I uint16_t WD_STAT_PDATA; /*!< (@ 0x54010440) Watchdog Status Process Data */ - __I uint8_t WD_COUNT_PDATA; /*!< (@ 0x54010442) Watchdog Counter Process Data */ - __I uint8_t WD_COUNT_PDI; /*!< (@ 0x54010443) Watchdog Counter PDI */ - __I uint32_t RESERVED25[47]; - __I uint8_t EEP_CONF; /*!< (@ 0x54010500) EEPROM Configuration */ - __IO uint8_t EEP_STATE; /*!< (@ 0x54010501) EEPROM PDI Access State */ - __IO uint16_t EEP_CONT_STAT; /*!< (@ 0x54010502) EEPROM Control/Status */ - __IO uint32_t EEP_ADR; /*!< (@ 0x54010504) EEPROM Address */ - __IO uint32_t EEP_DATA[2]; /*!< (@ 0x54010508) EEPROM Read/Write data */ - __IO uint16_t MII_CONT_STAT; /*!< (@ 0x54010510) MII Management Control/Status */ - __IO uint8_t MII_PHY_ADR; /*!< (@ 0x54010512) PHY Address */ - __IO uint8_t MII_PHY_REG_ADR; /*!< (@ 0x54010513) PHY Register Address */ - __IO uint16_t MII_PHY_DATA; /*!< (@ 0x54010514) PHY Data */ - __I uint8_t MII_ECAT_ACS_STATE; /*!< (@ 0x54010516) MII ECAT ACS STATE */ - __IO uint8_t MII_PDI_ACS_STATE; /*!< (@ 0x54010517) MII PDI ACS STATE */ - __I uint32_t RESERVED26[250]; - __I uint32_t DC_RCV_TIME_PORT0; /*!< (@ 0x54010900) Receive Time Port 0 */ - __I uint32_t DC_RCV_TIME_PORT1; /*!< (@ 0x54010904) Receive Time Port 1 */ - __I uint32_t RESERVED27[2]; - - union { - __I uint32_t READMode_DC_SYS_TIME[2]; /*!< (@ 0x54010910) System Time read access */ - __O uint32_t DC_SYS_TIME_WRITEMode; /*!< (@ 0x54010910) System Time [WRITE Mode] */ - }; - __I uint32_t RECEIVE_TIME_PU[2]; /*!< (@ 0x54010918) Local time of the beginning of a frame */ - __IO uint32_t DC_SYS_TIME_OFFSET[2]; /*!< (@ 0x54010920) Difference between local time and System Time */ - __IO uint32_t DC_SYS_TIME_DELAY; /*!< (@ 0x54010928) System Time Delay */ - __I uint32_t DC_SYS_TIME_DIFF; /*!< (@ 0x5401092C) System Time Difference */ - __IO uint16_t DC_SPEED_COUNT_START; /*!< (@ 0x54010930) Speed Counter Start */ - __I uint16_t DC_SPEED_COUNT_DIFF; /*!< (@ 0x54010932) Speed Counter Diff */ - __IO uint8_t DC_SYS_TIME_FIL_DEPTH; /*!< (@ 0x54010934) System Time Difference Filter Depth */ - __IO uint8_t DC_SPEED_COUNT_FIL_DEPTH; /*!< (@ 0x54010935) Speed Counter Filter Depth */ - __I uint16_t RESERVED28[37]; - __I uint8_t DC_CYC_CONT; /*!< (@ 0x54010980) Cyclic Unit Control */ - __IO uint8_t DC_ACT; /*!< (@ 0x54010981) Activation register */ - __I uint16_t DC_PULSE_LEN; /*!< (@ 0x54010982) Pulse Length of SyncSignals */ - __I uint8_t DC_ACT_STAT; /*!< (@ 0x54010984) Activation Status */ - __I uint8_t RESERVED29[9]; - __I uint8_t DC_SYNC0_STAT; /*!< (@ 0x5401098E) SYNC0 Status */ - __I uint8_t DC_SYNC1_STAT; /*!< (@ 0x5401098F) SYNC1 Status */ - __IO uint32_t DC_CYC_START_TIME[2]; /*!< (@ 0x54010990) Start Time Cyclic Operation */ - __I uint32_t DC_NEXT_SYNC1_PULSE[2]; /*!< (@ 0x54010998) System time of next SYNC1 pulse in ns */ - __IO uint32_t DC_SYNC0_CYC_TIME; /*!< (@ 0x540109A0) SYNC0 Cycle Time */ - __IO uint32_t DC_SYNC1_CYC_TIME; /*!< (@ 0x540109A4) SYNC1 Cycle Time */ - __IO uint8_t DC_LATCH0_CONT; /*!< (@ 0x540109A8) Latch0 Control */ - __IO uint8_t DC_LATCH1_CONT; /*!< (@ 0x540109A9) Latch1 Control */ - __I uint32_t RESERVED30; - __I uint8_t DC_LATCH0_STAT; /*!< (@ 0x540109AE) Latch0 Status */ - __I uint8_t DC_LATCH1_STAT; /*!< (@ 0x540109AF) Latch1 Status */ - __I uint32_t DC_LATCH0_TIME_POS[2]; /*!< (@ 0x540109B0) Register captures System time at the positive - edge of the Latch0 signal */ - __I uint32_t DC_LATCH0_TIME_NEG[2]; /*!< (@ 0x540109B8) Register captures System time at the negative - edge of the Latch0 signal */ - __I uint32_t DC_LATCH1_TIME_POS[2]; /*!< (@ 0x540109C0) Register captures System time at the positive - edge of the Latch1 signal */ - __I uint32_t DC_LATCH1_TIME_NEG[2]; /*!< (@ 0x540109C8) Register captures System time at the negative - edge of the Latch1 signal */ - __I uint32_t RESERVED31[8]; - __I uint32_t DC_ECAT_CNG_EV_TIME; /*!< (@ 0x540109F0) EtherCAT Buffer Change Event Time */ - __I uint32_t RESERVED32; - __I uint32_t DC_PDI_START_EV_TIME; /*!< (@ 0x540109F8) PDI Buffer Start Event Time */ - __I uint32_t DC_PDI_CNG_EV_TIME; /*!< (@ 0x540109FC) PDI Buffer Change Event Time */ - __I uint32_t RESERVED33[256]; - __I uint32_t ID; /*!< (@ 0x54010E00) ECAT0 Module ID */ - __I uint32_t RESERVED34; - __I uint32_t STATUS; /*!< (@ 0x54010E08) ECAT0 Status */ -} ECAT_Type; - - -/* ================================================================================ */ -/* ================ ECAT0_FMMU [ECAT0_FMMU0] ================ */ -/* ================================================================================ */ - - -/** - * @brief EtherCAT 0 (ECAT0_FMMU) - */ - -typedef struct { /*!< (@ 0x54010600) ECAT0_FMMU Structure */ - __I uint32_t FMMU_L_START_ADR; /*!< (@ 0x54010600) Logical Start address FMMU */ - __I uint16_t FMMU_LEN; /*!< (@ 0x54010604) Length FMMU 0 */ - __I uint8_t FMMU_L_START_BIT; /*!< (@ 0x54010606) Start bit FMMU 0 in logical address space */ - __I uint8_t FMMU_L_STOP_BIT; /*!< (@ 0x54010607) Stop bit FMMU 0 in logical address space */ - __I uint16_t FMMU_P_START_ADR; /*!< (@ 0x54010608) Ph0sical Start address FMMU y */ - __I uint8_t FMMU_P_START_BIT; /*!< (@ 0x5401060A) Ph0sical Start bit FMMU y */ - __I uint8_t FMMU_TYPE; /*!< (@ 0x5401060B) T0pe FMMU y */ - __I uint8_t FMMU_ACT; /*!< (@ 0x5401060C) Activate FMMU 0 */ -} ECAT0_FMMU_Type; - - -/* ================================================================================ */ -/* ================ ECAT0_SM [ECAT0_SM0] ================ */ -/* ================================================================================ */ - - -/** - * @brief EtherCAT 0 (ECAT0_SM) - */ - -typedef struct { /*!< (@ 0x54010800) ECAT0_SM Structure */ - __I uint16_t SM_P_START_ADR; /*!< (@ 0x54010800) Physical Start Address SyncManager 0 */ - __I uint16_t SM_LEN; /*!< (@ 0x54010802) Length SyncManager 0 */ - __I uint8_t SM_CONTROL; /*!< (@ 0x54010804) Control Register SyncManager 0 */ - __I uint8_t SM_STATUS; /*!< (@ 0x54010805) Status Register SyncManager 0 */ - __I uint8_t SM_ACT; /*!< (@ 0x54010806) Activate SyncManager 0 */ - __IO uint8_t SM_PDI_CTR; /*!< (@ 0x54010807) PDI Control SyncManager 0 */ -} ECAT0_SM_Type; - - -/* ================================================================================ */ -/* ================ USB [USB0] ================ */ -/* ================================================================================ */ - - -/** - * @brief Universal Serial Bus (USB) - */ - -typedef struct { /*!< (@ 0x50040000) USB Structure */ - __IO uint32_t GOTGCTL; /*!< (@ 0x50040000) Control and Status Register */ - __IO uint32_t GOTGINT; /*!< (@ 0x50040004) OTG Interrupt Register */ - __IO uint32_t GAHBCFG; /*!< (@ 0x50040008) AHB Configuration Register */ - __IO uint32_t GUSBCFG; /*!< (@ 0x5004000C) USB Configuration Register */ - __IO uint32_t GRSTCTL; /*!< (@ 0x50040010) Reset Register */ - - union { - __IO uint32_t GINTSTS_DEVICEMODE; /*!< (@ 0x50040014) Interrupt Register [DEVICEMODE] */ - __IO uint32_t GINTSTS_HOSTMODE; /*!< (@ 0x50040014) Interrupt Register [HOSTMODE] */ - }; - - union { - __IO uint32_t GINTMSK_DEVICEMODE; /*!< (@ 0x50040018) Interrupt Mask Register [DEVICEMODE] */ - __IO uint32_t GINTMSK_HOSTMODE; /*!< (@ 0x50040018) Interrupt Mask Register [HOSTMODE] */ - }; - - union { - __I uint32_t GRXSTSR_DEVICEMODE; /*!< (@ 0x5004001C) Receive Status Debug Read Register [DEVICEMODE] */ - __I uint32_t GRXSTSR_HOSTMODE; /*!< (@ 0x5004001C) Receive Status Debug Read Register [HOSTMODE] */ - }; - - union { - __I uint32_t GRXSTSP_HOSTMODE; /*!< (@ 0x50040020) Receive Status Read and Pop Register [HOSTMODE] */ - __I uint32_t GRXSTSP_DEVICEMODE; /*!< (@ 0x50040020) Receive Status Read and Pop Register [DEVICEMODE] */ - }; - __IO uint32_t GRXFSIZ; /*!< (@ 0x50040024) Receive FIFO Size Register */ - - union { - __IO uint32_t GNPTXFSIZ_DEVICEMODE; /*!< (@ 0x50040028) Non-Periodic Transmit FIFO Size Register [DEVICEMODE] */ - __IO uint32_t GNPTXFSIZ_HOSTMODE; /*!< (@ 0x50040028) Non-Periodic Transmit FIFO Size Register [HOSTMODE] */ - }; - __I uint32_t GNPTXSTS; /*!< (@ 0x5004002C) Non-Periodic Transmit FIFO/Queue Status Register */ - __I uint32_t RESERVED[3]; - __IO uint32_t GUID; /*!< (@ 0x5004003C) USB Module Identification Register */ - __I uint32_t RESERVED1[7]; - __IO uint32_t GDFIFOCFG; /*!< (@ 0x5004005C) Global DFIFO Software Config Register */ - __I uint32_t RESERVED2[40]; - __IO uint32_t HPTXFSIZ; /*!< (@ 0x50040100) Host Periodic Transmit FIFO Size Register */ - __IO uint32_t DIEPTXF1; /*!< (@ 0x50040104) Device IN Endpoint Transmit FIFO Size Register */ - __IO uint32_t DIEPTXF2; /*!< (@ 0x50040108) Device IN Endpoint Transmit FIFO Size Register */ - __IO uint32_t DIEPTXF3; /*!< (@ 0x5004010C) Device IN Endpoint Transmit FIFO Size Register */ - __IO uint32_t DIEPTXF4; /*!< (@ 0x50040110) Device IN Endpoint Transmit FIFO Size Register */ - __IO uint32_t DIEPTXF5; /*!< (@ 0x50040114) Device IN Endpoint Transmit FIFO Size Register */ - __IO uint32_t DIEPTXF6; /*!< (@ 0x50040118) Device IN Endpoint Transmit FIFO Size Register */ - __I uint32_t RESERVED3[185]; - __IO uint32_t HCFG; /*!< (@ 0x50040400) Host Configuration Register */ - __IO uint32_t HFIR; /*!< (@ 0x50040404) Host Frame Interval Register */ - __IO uint32_t HFNUM; /*!< (@ 0x50040408) Host Frame Number/Frame Time Remaining Register */ - __I uint32_t RESERVED4; - __IO uint32_t HPTXSTS; /*!< (@ 0x50040410) Host Periodic Transmit FIFO/ Queue Status Register */ - __I uint32_t HAINT; /*!< (@ 0x50040414) Host All Channels Interrupt Register */ - __IO uint32_t HAINTMSK; /*!< (@ 0x50040418) Host All Channels Interrupt Mask Register */ - __IO uint32_t HFLBADDR; /*!< (@ 0x5004041C) Host Frame List Base Address Register */ - __I uint32_t RESERVED5[8]; - __IO uint32_t HPRT; /*!< (@ 0x50040440) Host Port Control and Status Register */ - __I uint32_t RESERVED6[239]; - __IO uint32_t DCFG; /*!< (@ 0x50040800) Device Configuration Register */ - __IO uint32_t DCTL; /*!< (@ 0x50040804) Device Control Register */ - __I uint32_t DSTS; /*!< (@ 0x50040808) Device Status Register */ - __I uint32_t RESERVED7; - __IO uint32_t DIEPMSK; /*!< (@ 0x50040810) Device IN Endpoint Common Interrupt Mask Register */ - __IO uint32_t DOEPMSK; /*!< (@ 0x50040814) Device OUT Endpoint Common Interrupt Mask Register */ - __I uint32_t DAINT; /*!< (@ 0x50040818) Device All Endpoints Interrupt Register */ - __IO uint32_t DAINTMSK; /*!< (@ 0x5004081C) Device All Endpoints Interrupt Mask Register */ - __I uint32_t RESERVED8[2]; - __IO uint32_t DVBUSDIS; /*!< (@ 0x50040828) Device VBUS Discharge Time Register */ - __IO uint32_t DVBUSPULSE; /*!< (@ 0x5004082C) Device VBUS Pulsing Time Register */ - __I uint32_t RESERVED9; - __IO uint32_t DIEPEMPMSK; /*!< (@ 0x50040834) Device IN Endpoint FIFO Empty Interrupt Mask - Register */ - __I uint32_t RESERVED10[370]; - __IO uint32_t PCGCCTL; /*!< (@ 0x50040E00) Power and Clock Gating Control Register */ -} USB0_GLOBAL_TypeDef; - - -/* ================================================================================ */ -/* ================ USB0_EP0 ================ */ -/* ================================================================================ */ - - -/** - * @brief Universal Serial Bus (USB0_EP0) - */ - -typedef struct { /*!< (@ 0x50040900) USB0_EP0 Structure */ - __IO uint32_t DIEPCTL0; /*!< (@ 0x50040900) Device Control IN Endpoint Control Register */ - __I uint32_t RESERVED; - __IO uint32_t DIEPINT0; /*!< (@ 0x50040908) Device Endpoint Interrupt Register */ - __I uint32_t RESERVED1; - __IO uint32_t DIEPTSIZ0; /*!< (@ 0x50040910) Device IN Endpoint Transfer Size Register */ - __IO uint32_t DIEPDMA0; /*!< (@ 0x50040914) Device Endpoint DMA Address Register */ - __I uint32_t DTXFSTS0; /*!< (@ 0x50040918) Device IN Endpoint Transmit FIFO Status Register */ - __I uint32_t DIEPDMAB0; /*!< (@ 0x5004091C) Device Endpoint DMA Buffer Address Register */ - __I uint32_t RESERVED2[120]; - __IO uint32_t DOEPCTL0; /*!< (@ 0x50040B00) Device Control OUT Endpoint Control Register */ - __I uint32_t RESERVED3; - __IO uint32_t DOEPINT0; /*!< (@ 0x50040B08) Device Endpoint Interrupt Register */ - __I uint32_t RESERVED4; - __IO uint32_t DOEPTSIZ0; /*!< (@ 0x50040B10) Device OUT Endpoint Transfer Size Register */ - __IO uint32_t DOEPDMA0; /*!< (@ 0x50040B14) Device Endpoint DMA Address Register */ - __I uint32_t RESERVED5; - __I uint32_t DOEPDMAB0; /*!< (@ 0x50040B1C) Device Endpoint DMA Buffer Address Register */ -} USB0_EP0_TypeDef; - - -/* ================================================================================ */ -/* ================ USB_EP [USB0_EP1] ================ */ -/* ================================================================================ */ - - -/** - * @brief Universal Serial Bus (USB_EP) - */ - -typedef struct { /*!< (@ 0x50040920) USB_EP Structure */ - - union { - __IO uint32_t DIEPCTL_INTBULK; /*!< (@ 0x50040920) Device Endpoint Control Register [INTBULK] */ - __IO uint32_t DIEPCTL_ISOCONT; /*!< (@ 0x50040920) Device Endpoint Control Register [ISOCONT] */ - }; - __I uint32_t RESERVED; - __IO uint32_t DIEPINT; /*!< (@ 0x50040928) Device Endpoint Interrupt Register */ - __I uint32_t RESERVED1; - __IO uint32_t DIEPTSIZ; /*!< (@ 0x50040930) Device Endpoint Transfer Size Register */ - __IO uint32_t DIEPDMA; /*!< (@ 0x50040934) Device Endpoint DMA Address Register */ - __I uint32_t DTXFSTS; /*!< (@ 0x50040938) Device IN Endpoint Transmit FIFO Status Register */ - __I uint32_t DIEPDMAB; /*!< (@ 0x5004093C) Device Endpoint DMA Buffer Address Register */ - __I uint32_t RESERVED2[120]; - - union { - __IO uint32_t DOEPCTL_INTBULK; /*!< (@ 0x50040B20) Device Endpoint Control Register [INTBULK] */ - __IO uint32_t DOEPCTL_ISOCONT; /*!< (@ 0x50040B20) Device Endpoint Control Register [ISOCONT] */ - }; - __I uint32_t RESERVED3; - __IO uint32_t DOEPINT; /*!< (@ 0x50040B28) Device Endpoint Interrupt Register */ - __I uint32_t RESERVED4; - - union { - __IO uint32_t DOEPTSIZ_CONTROL; /*!< (@ 0x50040B30) Device Endpoint Transfer Size Register [CONT] */ - __IO uint32_t DOEPTSIZ_ISO; /*!< (@ 0x50040B30) Device Endpoint Transfer Size Register [ISO] */ - }; - __IO uint32_t DOEPDMA; /*!< (@ 0x50040B34) Device Endpoint DMA Address Register */ - __I uint32_t RESERVED5; - __I uint32_t DOEPDMAB; /*!< (@ 0x50040B3C) Device Endpoint DMA Buffer Address Register */ -} USB0_EP_TypeDef; - - -/* ================================================================================ */ -/* ================ USB_CH [USB0_CH0] ================ */ -/* ================================================================================ */ - - -/** - * @brief Universal Serial Bus (USB_CH) - */ - -typedef struct { /*!< (@ 0x50040500) USB_CH Structure */ - __IO uint32_t HCCHAR; /*!< (@ 0x50040500) Host Channel Characteristics Register */ - __I uint32_t RESERVED; - __IO uint32_t HCINT; /*!< (@ 0x50040508) Host Channel Interrupt Register */ - __IO uint32_t HCINTMSK; /*!< (@ 0x5004050C) Host Channel Interrupt Mask Register */ - - union { - __IO uint32_t HCTSIZ_SCATGATHER; /*!< (@ 0x50040510) Host Channel Transfer Size Register [SCATGATHER] */ - __IO uint32_t HCTSIZ_BUFFERMODE; /*!< (@ 0x50040510) Host Channel Transfer Size Register [BUFFERMODE] */ - }; - - union { - __IO uint32_t HCDMA_SCATGATHER; /*!< (@ 0x50040514) Host Channel DMA Address Register [SCATGATHER] */ - __IO uint32_t HCDMA_BUFFERMODE; /*!< (@ 0x50040514) Host Channel DMA Address Register [BUFFERMODE] */ - }; - __I uint32_t RESERVED1; - __I uint32_t HCDMAB; /*!< (@ 0x5004051C) Host Channel DMA Buffer Address Register */ -} USB0_CH_TypeDef; - - -/* ================================================================================ */ -/* ================ USIC [USIC0] ================ */ -/* ================================================================================ */ - - -/** - * @brief Universal Serial Interface Controller 0 (USIC) - */ - -typedef struct { /*!< (@ 0x40030008) USIC Structure */ - __I uint32_t ID; /*!< (@ 0x40030008) Module Identification Register */ -} USIC_GLOBAL_TypeDef; - - -/* ================================================================================ */ -/* ================ USIC_CH [USIC0_CH0] ================ */ -/* ================================================================================ */ - - -/** - * @brief Universal Serial Interface Controller 0 (USIC_CH) - */ - -typedef struct { /*!< (@ 0x40030000) USIC_CH Structure */ - __I uint32_t RESERVED; - __I uint32_t CCFG; /*!< (@ 0x40030004) Channel Configuration Register */ - __I uint32_t RESERVED1; - __IO uint32_t KSCFG; /*!< (@ 0x4003000C) Kernel State Configuration Register */ - __IO uint32_t FDR; /*!< (@ 0x40030010) Fractional Divider Register */ - __IO uint32_t BRG; /*!< (@ 0x40030014) Baud Rate Generator Register */ - __IO uint32_t INPR; /*!< (@ 0x40030018) Interrupt Node Pointer Register */ - __IO uint32_t DX0CR; /*!< (@ 0x4003001C) Input Control Register 0 */ - __IO uint32_t DX1CR; /*!< (@ 0x40030020) Input Control Register 1 */ - __IO uint32_t DX2CR; /*!< (@ 0x40030024) Input Control Register 2 */ - __IO uint32_t DX3CR; /*!< (@ 0x40030028) Input Control Register 3 */ - __IO uint32_t DX4CR; /*!< (@ 0x4003002C) Input Control Register 4 */ - __IO uint32_t DX5CR; /*!< (@ 0x40030030) Input Control Register 5 */ - __IO uint32_t SCTR; /*!< (@ 0x40030034) Shift Control Register */ - __IO uint32_t TCSR; /*!< (@ 0x40030038) Transmit Control/Status Register */ - - union { - __IO uint32_t PCR_IICMode; /*!< (@ 0x4003003C) Protocol Control Register [IIC Mode] */ - __IO uint32_t PCR_IISMode; /*!< (@ 0x4003003C) Protocol Control Register [IIS Mode] */ - __IO uint32_t PCR_SSCMode; /*!< (@ 0x4003003C) Protocol Control Register [SSC Mode] */ - __IO uint32_t PCR; /*!< (@ 0x4003003C) Protocol Control Register */ - __IO uint32_t PCR_ASCMode; /*!< (@ 0x4003003C) Protocol Control Register [ASC Mode] */ - }; - __IO uint32_t CCR; /*!< (@ 0x40030040) Channel Control Register */ - __IO uint32_t CMTR; /*!< (@ 0x40030044) Capture Mode Timer Register */ - - union { - __IO uint32_t PSR_IICMode; /*!< (@ 0x40030048) Protocol Status Register [IIC Mode] */ - __IO uint32_t PSR_IISMode; /*!< (@ 0x40030048) Protocol Status Register [IIS Mode] */ - __IO uint32_t PSR_SSCMode; /*!< (@ 0x40030048) Protocol Status Register [SSC Mode] */ - __IO uint32_t PSR; /*!< (@ 0x40030048) Protocol Status Register */ - __IO uint32_t PSR_ASCMode; /*!< (@ 0x40030048) Protocol Status Register [ASC Mode] */ - }; - __O uint32_t PSCR; /*!< (@ 0x4003004C) Protocol Status Clear Register */ - __I uint32_t RBUFSR; /*!< (@ 0x40030050) Receiver Buffer Status Register */ - __I uint32_t RBUF; /*!< (@ 0x40030054) Receiver Buffer Register */ - __I uint32_t RBUFD; /*!< (@ 0x40030058) Receiver Buffer Register for Debugger */ - __I uint32_t RBUF0; /*!< (@ 0x4003005C) Receiver Buffer Register 0 */ - __I uint32_t RBUF1; /*!< (@ 0x40030060) Receiver Buffer Register 1 */ - __I uint32_t RBUF01SR; /*!< (@ 0x40030064) Receiver Buffer 01 Status Register */ - __O uint32_t FMR; /*!< (@ 0x40030068) Flag Modification Register */ - __I uint32_t RESERVED2[5]; - __IO uint32_t TBUF[32]; /*!< (@ 0x40030080) Transmit Buffer */ - __IO uint32_t BYP; /*!< (@ 0x40030100) Bypass Data Register */ - __IO uint32_t BYPCR; /*!< (@ 0x40030104) Bypass Control Register */ - __IO uint32_t TBCTR; /*!< (@ 0x40030108) Transmitter Buffer Control Register */ - __IO uint32_t RBCTR; /*!< (@ 0x4003010C) Receiver Buffer Control Register */ - __I uint32_t TRBPTR; /*!< (@ 0x40030110) Transmit/Receive Buffer Pointer Register */ - __IO uint32_t TRBSR; /*!< (@ 0x40030114) Transmit/Receive Buffer Status Register */ - __O uint32_t TRBSCR; /*!< (@ 0x40030118) Transmit/Receive Buffer Status Clear Register */ - __I uint32_t OUTR; /*!< (@ 0x4003011C) Receiver Buffer Output Register */ - __I uint32_t OUTDR; /*!< (@ 0x40030120) Receiver Buffer Output Register L for Debugger */ - __I uint32_t RESERVED3[23]; - __O uint32_t IN[32]; /*!< (@ 0x40030180) Transmit FIFO Buffer */ -} USIC_CH_TypeDef; - - -/* ================================================================================ */ -/* ================ CAN ================ */ -/* ================================================================================ */ - - -/** - * @brief Controller Area Networks (CAN) - */ - -typedef struct { /*!< (@ 0x48014000) CAN Structure */ - __IO uint32_t CLC; /*!< (@ 0x48014000) CAN Clock Control Register */ - __I uint32_t RESERVED; - __I uint32_t ID; /*!< (@ 0x48014008) Module Identification Register */ - __IO uint32_t FDR; /*!< (@ 0x4801400C) CAN Fractional Divider Register */ - __I uint32_t RESERVED1[60]; - __I uint32_t LIST[16]; /*!< (@ 0x48014100) List Register */ - __IO uint32_t MSPND[8]; /*!< (@ 0x48014140) Message Pending Register */ - __I uint32_t RESERVED2[8]; - __I uint32_t MSID[8]; /*!< (@ 0x48014180) Message Index Register */ - __I uint32_t RESERVED3[8]; - __IO uint32_t MSIMASK; /*!< (@ 0x480141C0) Message Index Mask Register */ - __IO uint32_t PANCTR; /*!< (@ 0x480141C4) Panel Control Register */ - __IO uint32_t MCR; /*!< (@ 0x480141C8) Module Control Register */ - __O uint32_t MITR; /*!< (@ 0x480141CC) Module Interrupt Trigger Register */ -} CAN_GLOBAL_TypeDef; - - -/* ================================================================================ */ -/* ================ CAN_NODE [CAN_NODE0] ================ */ -/* ================================================================================ */ - - -/** - * @brief Controller Area Networks (CAN_NODE) - */ - -typedef struct { /*!< (@ 0x48014200) CAN_NODE Structure */ - __IO uint32_t NCR; /*!< (@ 0x48014200) Node Control Register */ - __IO uint32_t NSR; /*!< (@ 0x48014204) Node Status Register */ - __IO uint32_t NIPR; /*!< (@ 0x48014208) Node Interrupt Pointer Register */ - __IO uint32_t NPCR; /*!< (@ 0x4801420C) Node Port Control Register */ - __IO uint32_t NBTR; /*!< (@ 0x48014210) Node Bit Timing Register */ - __IO uint32_t NECNT; /*!< (@ 0x48014214) Node Error Counter Register */ - __IO uint32_t NFCR; /*!< (@ 0x48014218) Node Frame Counter Register */ -} CAN_NODE_TypeDef; - - -/* ================================================================================ */ -/* ================ CAN_MO_CLUSTER [CAN_MO] ================ */ -/* ================================================================================ */ - - -/** - * @brief Controller Area Networks (CAN_MO_CLUSTER) - */ - -typedef struct { /*!< (@ 0x48015000) CAN_MO_CLUSTER Structure */ - CAN_MO_TypeDef MO[256]; /*!< (@ 0x48015000) Message Object Registers */ -} CAN_MO_CLUSTER_Type; - - -/* ================================================================================ */ -/* ================ VADC ================ */ -/* ================================================================================ */ - - -/** - * @brief Analog to Digital Converter (VADC) - */ - -typedef struct { /*!< (@ 0x40004000) VADC Structure */ - __IO uint32_t CLC; /*!< (@ 0x40004000) Clock Control Register */ - __I uint32_t RESERVED; - __I uint32_t ID; /*!< (@ 0x40004008) Module Identification Register */ - __I uint32_t RESERVED1[7]; - __IO uint32_t OCS; /*!< (@ 0x40004028) OCDS Control and Status Register */ - __I uint32_t RESERVED2[21]; - __IO uint32_t GLOBCFG; /*!< (@ 0x40004080) Global Configuration Register */ - __I uint32_t RESERVED3[7]; - __IO uint32_t GLOBICLASS[2]; /*!< (@ 0x400040A0) Input Class Register, Global */ - __I uint32_t RESERVED4[4]; - __IO uint32_t GLOBBOUND; /*!< (@ 0x400040B8) Global Boundary Select Register */ - __I uint32_t RESERVED5[9]; - __IO uint32_t GLOBEFLAG; /*!< (@ 0x400040E0) Global Event Flag Register */ - __I uint32_t RESERVED6[23]; - __IO uint32_t GLOBEVNP; /*!< (@ 0x40004140) Global Event Node Pointer Register */ - __I uint32_t RESERVED7[7]; - __IO uint32_t GLOBTF; /*!< (@ 0x40004160) Global Test Functions Register */ - __I uint32_t RESERVED8[7]; - __IO uint32_t BRSSEL[4]; /*!< (@ 0x40004180) Background Request Source Channel Select Register */ - __I uint32_t RESERVED9[12]; - __IO uint32_t BRSPND[4]; /*!< (@ 0x400041C0) Background Request Source Pending Register */ - __I uint32_t RESERVED10[12]; - __IO uint32_t BRSCTRL; /*!< (@ 0x40004200) Background Request Source Control Register */ - __IO uint32_t BRSMR; /*!< (@ 0x40004204) Background Request Source Mode Register */ - __I uint32_t RESERVED11[30]; - __IO uint32_t GLOBRCR; /*!< (@ 0x40004280) Global Result Control Register */ - __I uint32_t RESERVED12[31]; - __IO uint32_t GLOBRES; /*!< (@ 0x40004300) Global Result Register */ - __I uint32_t RESERVED13[31]; - __IO uint32_t GLOBRESD; /*!< (@ 0x40004380) Global Result Register, Debug */ - __I uint32_t RESERVED14[27]; - __IO uint32_t EMUXSEL; /*!< (@ 0x400043F0) External Multiplexer Select Register */ -} VADC_GLOBAL_TypeDef; - - -/* ================================================================================ */ -/* ================ VADC_G [VADC_G0] ================ */ -/* ================================================================================ */ - - -/** - * @brief Analog to Digital Converter (VADC_G) - */ - -typedef struct { /*!< (@ 0x40004400) VADC_G Structure */ - __I uint32_t RESERVED[32]; - __IO uint32_t ARBCFG; /*!< (@ 0x40004480) Arbitration Configuration Register */ - __IO uint32_t ARBPR; /*!< (@ 0x40004484) Arbitration Priority Register */ - __IO uint32_t CHASS; /*!< (@ 0x40004488) Channel Assignment Register */ - __I uint32_t RESERVED1[5]; - __IO uint32_t ICLASS[2]; /*!< (@ 0x400044A0) Input Class Register */ - __I uint32_t RESERVED2[2]; - __IO uint32_t ALIAS; /*!< (@ 0x400044B0) Alias Register */ - __I uint32_t RESERVED3; - __IO uint32_t BOUND; /*!< (@ 0x400044B8) Boundary Select Register */ - __I uint32_t RESERVED4; - __IO uint32_t SYNCTR; /*!< (@ 0x400044C0) Synchronization Control Register */ - __I uint32_t RESERVED5; - __IO uint32_t BFL; /*!< (@ 0x400044C8) Boundary Flag Register */ - __O uint32_t BFLS; /*!< (@ 0x400044CC) Boundary Flag Software Register */ - __IO uint32_t BFLC; /*!< (@ 0x400044D0) Boundary Flag Control Register */ - __IO uint32_t BFLNP; /*!< (@ 0x400044D4) Boundary Flag Node Pointer Register */ - __I uint32_t RESERVED6[10]; - __IO uint32_t QCTRL0; /*!< (@ 0x40004500) Queue 0 Source Control Register */ - __IO uint32_t QMR0; /*!< (@ 0x40004504) Queue 0 Mode Register */ - __I uint32_t QSR0; /*!< (@ 0x40004508) Queue 0 Status Register */ - __I uint32_t Q0R0; /*!< (@ 0x4000450C) Queue 0 Register 0 */ - - union { - __I uint32_t QBUR0; /*!< (@ 0x40004510) Queue 0 Backup Register */ - __O uint32_t QINR0; /*!< (@ 0x40004510) Queue 0 Input Register */ - }; - __I uint32_t RESERVED7[3]; - __IO uint32_t ASCTRL; /*!< (@ 0x40004520) Autoscan Source Control Register */ - __IO uint32_t ASMR; /*!< (@ 0x40004524) Autoscan Source Mode Register */ - __IO uint32_t ASSEL; /*!< (@ 0x40004528) Autoscan Source Channel Select Register */ - __IO uint32_t ASPND; /*!< (@ 0x4000452C) Autoscan Source Pending Register */ - __I uint32_t RESERVED8[20]; - __IO uint32_t CEFLAG; /*!< (@ 0x40004580) Channel Event Flag Register */ - __IO uint32_t REFLAG; /*!< (@ 0x40004584) Result Event Flag Register */ - __IO uint32_t SEFLAG; /*!< (@ 0x40004588) Source Event Flag Register */ - __I uint32_t RESERVED9; - __O uint32_t CEFCLR; /*!< (@ 0x40004590) Channel Event Flag Clear Register */ - __O uint32_t REFCLR; /*!< (@ 0x40004594) Result Event Flag Clear Register */ - __O uint32_t SEFCLR; /*!< (@ 0x40004598) Source Event Flag Clear Register */ - __I uint32_t RESERVED10; - __IO uint32_t CEVNP0; /*!< (@ 0x400045A0) Channel Event Node Pointer Register 0 */ - __I uint32_t RESERVED11[3]; - __IO uint32_t REVNP0; /*!< (@ 0x400045B0) Result Event Node Pointer Register 0 */ - __IO uint32_t REVNP1; /*!< (@ 0x400045B4) Result Event Node Pointer Register 1 */ - __I uint32_t RESERVED12[2]; - __IO uint32_t SEVNP; /*!< (@ 0x400045C0) Source Event Node Pointer Register */ - __I uint32_t RESERVED13; - __O uint32_t SRACT; /*!< (@ 0x400045C8) Service Request Software Activation Trigger */ - __I uint32_t RESERVED14[9]; - __IO uint32_t EMUXCTR; /*!< (@ 0x400045F0) E0ternal Multiplexer Control Register */ - __I uint32_t RESERVED15; - __IO uint32_t VFR; /*!< (@ 0x400045F8) Valid Flag Register */ - __I uint32_t RESERVED16; - __IO uint32_t CHCTR[8]; /*!< (@ 0x40004600) Channel Ctrl. Reg. */ - __I uint32_t RESERVED17[24]; - __IO uint32_t RCR[16]; /*!< (@ 0x40004680) Result Control Register */ - __I uint32_t RESERVED18[16]; - __IO uint32_t RES[16]; /*!< (@ 0x40004700) Result Register */ - __I uint32_t RESERVED19[16]; - __I uint32_t RESD[16]; /*!< (@ 0x40004780) Result Register, Debug */ -} VADC_G_TypeDef; - - -/* ================================================================================ */ -/* ================ DSD ================ */ -/* ================================================================================ */ - - -/** - * @brief Delta Sigma Demodulator (DSD) - */ - -typedef struct { /*!< (@ 0x40008000) DSD Structure */ - __IO uint32_t CLC; /*!< (@ 0x40008000) Clock Control Register */ - __I uint32_t RESERVED; - __I uint32_t ID; /*!< (@ 0x40008008) Module Identification Register */ - __I uint32_t RESERVED1[7]; - __IO uint32_t OCS; /*!< (@ 0x40008028) OCDS Control and Status Register */ - __I uint32_t RESERVED2[21]; - __IO uint32_t GLOBCFG; /*!< (@ 0x40008080) Global Configuration Register */ - __I uint32_t RESERVED3; - __IO uint32_t GLOBRC; /*!< (@ 0x40008088) Global Run Control Register */ - __I uint32_t RESERVED4[5]; - __IO uint32_t CGCFG; /*!< (@ 0x400080A0) Carrier Generator Configuration Register */ - __I uint32_t RESERVED5[15]; - __IO uint32_t EVFLAG; /*!< (@ 0x400080E0) Event Flag Register */ - __O uint32_t EVFLAGCLR; /*!< (@ 0x400080E4) Event Flag Clear Register */ -} DSD_GLOBAL_TypeDef; - - -/* ================================================================================ */ -/* ================ DSD_CH [DSD_CH0] ================ */ -/* ================================================================================ */ - - -/** - * @brief Delta Sigma Demodulator (DSD_CH) - */ - -typedef struct { /*!< (@ 0x40008100) DSD_CH Structure */ - __IO uint32_t MODCFG; /*!< (@ 0x40008100) Modulator Configuration Register */ - __I uint32_t RESERVED; - __IO uint32_t DICFG; /*!< (@ 0x40008108) Demodulator Input Configuration Register */ - __I uint32_t RESERVED1[2]; - __IO uint32_t FCFGC; /*!< (@ 0x40008114) Filter Configuration Register, Main CIC Filter */ - __IO uint32_t FCFGA; /*!< (@ 0x40008118) Filter Configuration Register, Auxiliary Filter */ - __I uint32_t RESERVED2; - __IO uint32_t IWCTR; /*!< (@ 0x40008120) Integration Window Control Register */ - __I uint32_t RESERVED3; - __IO uint32_t BOUNDSEL; /*!< (@ 0x40008128) Boundary Select Register */ - __I uint32_t RESERVED4; - __I uint32_t RESM; /*!< (@ 0x40008130) Result Register, Main Filter */ - __I uint32_t RESERVED5; - __IO uint32_t OFFM; /*!< (@ 0x40008138) Offset Register, Main Filter */ - __I uint32_t RESERVED6; - __I uint32_t RESA; /*!< (@ 0x40008140) Result Register, Auxiliary Filter */ - __I uint32_t RESERVED7[3]; - __I uint32_t TSTMP; /*!< (@ 0x40008150) Time-Stamp Register */ - __I uint32_t RESERVED8[19]; - __IO uint32_t CGSYNC; /*!< (@ 0x400081A0) Carrier Generator Synchronization Register */ - __I uint32_t RESERVED9; - __IO uint32_t RECTCFG; /*!< (@ 0x400081A8) Rectification Configuration Register */ -} DSD_CH_TypeDef; - - -/* ================================================================================ */ -/* ================ DAC ================ */ -/* ================================================================================ */ - - -/** - * @brief Digital to Analog Converter (DAC) - */ - -typedef struct { /*!< (@ 0x48018000) DAC Structure */ - __I uint32_t ID; /*!< (@ 0x48018000) Module Identification Register */ - __IO uint32_t DAC0CFG0; /*!< (@ 0x48018004) DAC0 Configuration Register 0 */ - __IO uint32_t DAC0CFG1; /*!< (@ 0x48018008) DAC0 Configuration Register 1 */ - __IO uint32_t DAC1CFG0; /*!< (@ 0x4801800C) DAC1 Configuration Register 0 */ - __IO uint32_t DAC1CFG1; /*!< (@ 0x48018010) DAC1 Configuration Register 1 */ - __IO uint32_t DAC0DATA; /*!< (@ 0x48018014) DAC0 Data Register */ - __IO uint32_t DAC1DATA; /*!< (@ 0x48018018) DAC1 Data Register */ - __IO uint32_t DAC01DATA; /*!< (@ 0x4801801C) DAC01 Data Register */ - __IO uint32_t DAC0PATL; /*!< (@ 0x48018020) DAC0 Lower Pattern Register */ - __IO uint32_t DAC0PATH; /*!< (@ 0x48018024) DAC0 Higher Pattern Register */ - __IO uint32_t DAC1PATL; /*!< (@ 0x48018028) DAC1 Lower Pattern Register */ - __IO uint32_t DAC1PATH; /*!< (@ 0x4801802C) DAC1 Higher Pattern Register */ -} DAC_GLOBAL_TypeDef; - - -/* ================================================================================ */ -/* ================ CCU4 [CCU40] ================ */ -/* ================================================================================ */ - - -/** - * @brief Capture Compare Unit 4 - Unit 0 (CCU4) - */ - -typedef struct { /*!< (@ 0x4000C000) CCU4 Structure */ - __IO uint32_t GCTRL; /*!< (@ 0x4000C000) Global Control Register */ - __I uint32_t GSTAT; /*!< (@ 0x4000C004) Global Status Register */ - __O uint32_t GIDLS; /*!< (@ 0x4000C008) Global Idle Set */ - __O uint32_t GIDLC; /*!< (@ 0x4000C00C) Global Idle Clear */ - __O uint32_t GCSS; /*!< (@ 0x4000C010) Global Channel Set */ - __O uint32_t GCSC; /*!< (@ 0x4000C014) Global Channel Clear */ - __I uint32_t GCST; /*!< (@ 0x4000C018) Global Channel Status */ - __I uint32_t RESERVED[25]; - __I uint32_t MIDR; /*!< (@ 0x4000C080) Module Identification */ -} CCU4_GLOBAL_TypeDef; - - -/* ================================================================================ */ -/* ================ CCU4_CC4 [CCU40_CC40] ================ */ -/* ================================================================================ */ - - -/** - * @brief Capture Compare Unit 4 - Unit 0 (CCU4_CC4) - */ - -typedef struct { /*!< (@ 0x4000C100) CCU4_CC4 Structure */ - __IO uint32_t INS; /*!< (@ 0x4000C100) Input Selector Configuration */ - __IO uint32_t CMC; /*!< (@ 0x4000C104) Connection Matrix Control */ - __I uint32_t TCST; /*!< (@ 0x4000C108) Slice Timer Status */ - __O uint32_t TCSET; /*!< (@ 0x4000C10C) Slice Timer Run Set */ - __O uint32_t TCCLR; /*!< (@ 0x4000C110) Slice Timer Clear */ - __IO uint32_t TC; /*!< (@ 0x4000C114) Slice Timer Control */ - __IO uint32_t PSL; /*!< (@ 0x4000C118) Passive Level Config */ - __I uint32_t DIT; /*!< (@ 0x4000C11C) Dither Config */ - __IO uint32_t DITS; /*!< (@ 0x4000C120) Dither Shadow Register */ - __IO uint32_t PSC; /*!< (@ 0x4000C124) Prescaler Control */ - __IO uint32_t FPC; /*!< (@ 0x4000C128) Floating Prescaler Control */ - __IO uint32_t FPCS; /*!< (@ 0x4000C12C) Floating Prescaler Shadow */ - __I uint32_t PR; /*!< (@ 0x4000C130) Timer Period Value */ - __IO uint32_t PRS; /*!< (@ 0x4000C134) Timer Shadow Period Value */ - __I uint32_t CR; /*!< (@ 0x4000C138) Timer Compare Value */ - __IO uint32_t CRS; /*!< (@ 0x4000C13C) Timer Shadow Compare Value */ - __I uint32_t RESERVED[12]; - __IO uint32_t TIMER; /*!< (@ 0x4000C170) Timer Value */ - __I uint32_t CV[4]; /*!< (@ 0x4000C174) Capture Register 0 */ - __I uint32_t RESERVED1[7]; - __I uint32_t INTS; /*!< (@ 0x4000C1A0) Interrupt Status */ - __IO uint32_t INTE; /*!< (@ 0x4000C1A4) Interrupt Enable Control */ - __IO uint32_t SRS; /*!< (@ 0x4000C1A8) Service Request Selector */ - __O uint32_t SWS; /*!< (@ 0x4000C1AC) Interrupt Status Set */ - __O uint32_t SWR; /*!< (@ 0x4000C1B0) Interrupt Status Clear */ - __I uint32_t RESERVED2; - __I uint32_t ECRD0; /*!< (@ 0x4000C1B8) Extended Read Back 0 */ - __I uint32_t ECRD1; /*!< (@ 0x4000C1BC) Extended Read Back 1 */ -} CCU4_CC4_TypeDef; - - -/* ================================================================================ */ -/* ================ CCU8 [CCU80] ================ */ -/* ================================================================================ */ - - -/** - * @brief Capture Compare Unit 8 - Unit 0 (CCU8) - */ - -typedef struct { /*!< (@ 0x40020000) CCU8 Structure */ - __IO uint32_t GCTRL; /*!< (@ 0x40020000) Global Control Register */ - __I uint32_t GSTAT; /*!< (@ 0x40020004) Global Status Register */ - __O uint32_t GIDLS; /*!< (@ 0x40020008) Global Idle Set */ - __O uint32_t GIDLC; /*!< (@ 0x4002000C) Global Idle Clear */ - __O uint32_t GCSS; /*!< (@ 0x40020010) Global Channel Set */ - __O uint32_t GCSC; /*!< (@ 0x40020014) Global Channel Clear */ - __I uint32_t GCST; /*!< (@ 0x40020018) Global Channel status */ - __IO uint32_t GPCHK; /*!< (@ 0x4002001C) Parity Checker Configuration */ - __I uint32_t RESERVED[24]; - __I uint32_t MIDR; /*!< (@ 0x40020080) Module Identification */ -} CCU8_GLOBAL_TypeDef; - - -/* ================================================================================ */ -/* ================ CCU8_CC8 [CCU80_CC80] ================ */ -/* ================================================================================ */ - - -/** - * @brief Capture Compare Unit 8 - Unit 0 (CCU8_CC8) - */ - -typedef struct { /*!< (@ 0x40020100) CCU8_CC8 Structure */ - __IO uint32_t INS; /*!< (@ 0x40020100) Input Selector Configuration */ - __IO uint32_t CMC; /*!< (@ 0x40020104) Connection Matrix Control */ - __I uint32_t TCST; /*!< (@ 0x40020108) Slice Timer Status */ - __O uint32_t TCSET; /*!< (@ 0x4002010C) Slice Timer Run Set */ - __O uint32_t TCCLR; /*!< (@ 0x40020110) Slice Timer Clear */ - __IO uint32_t TC; /*!< (@ 0x40020114) Slice Timer Control */ - __IO uint32_t PSL; /*!< (@ 0x40020118) Passive Level Config */ - __I uint32_t DIT; /*!< (@ 0x4002011C) Dither Config */ - __IO uint32_t DITS; /*!< (@ 0x40020120) Dither Shadow Register */ - __IO uint32_t PSC; /*!< (@ 0x40020124) Prescaler Control */ - __IO uint32_t FPC; /*!< (@ 0x40020128) Floating Prescaler Control */ - __IO uint32_t FPCS; /*!< (@ 0x4002012C) Floating Prescaler Shadow */ - __I uint32_t PR; /*!< (@ 0x40020130) Timer Period Value */ - __IO uint32_t PRS; /*!< (@ 0x40020134) Timer Shadow Period Value */ - __I uint32_t CR1; /*!< (@ 0x40020138) Channel 1 Compare Value */ - __IO uint32_t CR1S; /*!< (@ 0x4002013C) Channel 1 Compare Shadow Value */ - __I uint32_t CR2; /*!< (@ 0x40020140) Channel 2 Compare Value */ - __IO uint32_t CR2S; /*!< (@ 0x40020144) Channel 2 Compare Shadow Value */ - __IO uint32_t CHC; /*!< (@ 0x40020148) Channel Control */ - __IO uint32_t DTC; /*!< (@ 0x4002014C) Dead Time Control */ - __IO uint32_t DC1R; /*!< (@ 0x40020150) Channel 1 Dead Time Values */ - __IO uint32_t DC2R; /*!< (@ 0x40020154) Channel 2 Dead Time Values */ - __I uint32_t RESERVED[6]; - __IO uint32_t TIMER; /*!< (@ 0x40020170) Timer Value */ - __I uint32_t CV[4]; /*!< (@ 0x40020174) Capture Register 0 */ - __I uint32_t RESERVED1[7]; - __I uint32_t INTS; /*!< (@ 0x400201A0) Interrupt Status */ - __IO uint32_t INTE; /*!< (@ 0x400201A4) Interrupt Enable Control */ - __IO uint32_t SRS; /*!< (@ 0x400201A8) Service Request Selector */ - __O uint32_t SWS; /*!< (@ 0x400201AC) Interrupt Status Set */ - __O uint32_t SWR; /*!< (@ 0x400201B0) Interrupt Status Clear */ - __IO uint32_t STC; /*!< (@ 0x400201B4) Shadow transfer control */ - __I uint32_t ECRD0; /*!< (@ 0x400201B8) Extended Read Back 0 */ - __I uint32_t ECRD1; /*!< (@ 0x400201BC) Extended Read Back 1 */ -} CCU8_CC8_TypeDef; - - -/* ================================================================================ */ -/* ================ POSIF [POSIF0] ================ */ -/* ================================================================================ */ - - -/** - * @brief Position Interface 0 (POSIF) - */ - -typedef struct { /*!< (@ 0x40028000) POSIF Structure */ - __IO uint32_t PCONF; /*!< (@ 0x40028000) POSIF configuration */ - __IO uint32_t PSUS; /*!< (@ 0x40028004) POSIF Suspend Config */ - __O uint32_t PRUNS; /*!< (@ 0x40028008) POSIF Run Bit Set */ - __O uint32_t PRUNC; /*!< (@ 0x4002800C) POSIF Run Bit Clear */ - __I uint32_t PRUN; /*!< (@ 0x40028010) POSIF Run Bit Status */ - __I uint32_t RESERVED[3]; - __I uint32_t MIDR; /*!< (@ 0x40028020) Module Identification register */ - __I uint32_t RESERVED1[3]; - __I uint32_t HALP; /*!< (@ 0x40028030) Hall Sensor Patterns */ - __IO uint32_t HALPS; /*!< (@ 0x40028034) Hall Sensor Shadow Patterns */ - __I uint32_t RESERVED2[2]; - __I uint32_t MCM; /*!< (@ 0x40028040) Multi-Channel Pattern */ - __IO uint32_t MCSM; /*!< (@ 0x40028044) Multi-Channel Shadow Pattern */ - __O uint32_t MCMS; /*!< (@ 0x40028048) Multi-Channel Pattern Control set */ - __O uint32_t MCMC; /*!< (@ 0x4002804C) Multi-Channel Pattern Control clear */ - __I uint32_t MCMF; /*!< (@ 0x40028050) Multi-Channel Pattern Control flag */ - __I uint32_t RESERVED3[3]; - __IO uint32_t QDC; /*!< (@ 0x40028060) Quadrature Decoder Control */ - __I uint32_t RESERVED4[3]; - __I uint32_t PFLG; /*!< (@ 0x40028070) POSIF Interrupt Flags */ - __IO uint32_t PFLGE; /*!< (@ 0x40028074) POSIF Interrupt Enable */ - __O uint32_t SPFLG; /*!< (@ 0x40028078) POSIF Interrupt Set */ - __O uint32_t RPFLG; /*!< (@ 0x4002807C) POSIF Interrupt Clear */ - __I uint32_t RESERVED5[32]; - __I uint32_t PDBG; /*!< (@ 0x40028100) POSIF Debug register */ -} POSIF_GLOBAL_TypeDef; - - -/* ================================================================================ */ -/* ================ PORT0 ================ */ -/* ================================================================================ */ - - -/** - * @brief Port 0 (PORT0) - */ - -typedef struct { /*!< (@ 0x48028000) PORT0 Structure */ - __IO uint32_t OUT; /*!< (@ 0x48028000) Port 0 Output Register */ - __O uint32_t OMR; /*!< (@ 0x48028004) Port 0 Output Modification Register */ - __I uint32_t RESERVED[2]; - __IO uint32_t IOCR0; /*!< (@ 0x48028010) Port 0 Input/Output Control Register 0 */ - __IO uint32_t IOCR4; /*!< (@ 0x48028014) Port 0 Input/Output Control Register 4 */ - __IO uint32_t IOCR8; /*!< (@ 0x48028018) Port 0 Input/Output Control Register 8 */ - __IO uint32_t IOCR12; /*!< (@ 0x4802801C) Port 0 Input/Output Control Register 12 */ - __I uint32_t RESERVED1; - __I uint32_t IN; /*!< (@ 0x48028024) Port 0 Input Register */ - __I uint32_t RESERVED2[6]; - __IO uint32_t PDR0; /*!< (@ 0x48028040) Port 0 Pad Driver Mode 0 Register */ - __IO uint32_t PDR1; /*!< (@ 0x48028044) Port 0 Pad Driver Mode 1 Register */ - __I uint32_t RESERVED3[6]; - __I uint32_t PDISC; /*!< (@ 0x48028060) Port 0 Pin Function Decision Control Register */ - __I uint32_t RESERVED4[3]; - __IO uint32_t PPS; /*!< (@ 0x48028070) Port 0 Pin Power Save Register */ - __IO uint32_t HWSEL; /*!< (@ 0x48028074) Port 0 Pin Hardware Select Register */ -} PORT0_Type; - - -/* ================================================================================ */ -/* ================ PORT1 ================ */ -/* ================================================================================ */ - - -/** - * @brief Port 1 (PORT1) - */ - -typedef struct { /*!< (@ 0x48028100) PORT1 Structure */ - __IO uint32_t OUT; /*!< (@ 0x48028100) Port 1 Output Register */ - __O uint32_t OMR; /*!< (@ 0x48028104) Port 1 Output Modification Register */ - __I uint32_t RESERVED[2]; - __IO uint32_t IOCR0; /*!< (@ 0x48028110) Port 1 Input/Output Control Register 0 */ - __IO uint32_t IOCR4; /*!< (@ 0x48028114) Port 1 Input/Output Control Register 4 */ - __IO uint32_t IOCR8; /*!< (@ 0x48028118) Port 1 Input/Output Control Register 8 */ - __IO uint32_t IOCR12; /*!< (@ 0x4802811C) Port 1 Input/Output Control Register 12 */ - __I uint32_t RESERVED1; - __I uint32_t IN; /*!< (@ 0x48028124) Port 1 Input Register */ - __I uint32_t RESERVED2[6]; - __IO uint32_t PDR0; /*!< (@ 0x48028140) Port 1 Pad Driver Mode 0 Register */ - __IO uint32_t PDR1; /*!< (@ 0x48028144) Port 1 Pad Driver Mode 1 Register */ - __I uint32_t RESERVED3[6]; - __I uint32_t PDISC; /*!< (@ 0x48028160) Port 1 Pin Function Decision Control Register */ - __I uint32_t RESERVED4[3]; - __IO uint32_t PPS; /*!< (@ 0x48028170) Port 1 Pin Power Save Register */ - __IO uint32_t HWSEL; /*!< (@ 0x48028174) Port 1 Pin Hardware Select Register */ -} PORT1_Type; - - -/* ================================================================================ */ -/* ================ PORT2 ================ */ -/* ================================================================================ */ - - -/** - * @brief Port 2 (PORT2) - */ - -typedef struct { /*!< (@ 0x48028200) PORT2 Structure */ - __IO uint32_t OUT; /*!< (@ 0x48028200) Port 2 Output Register */ - __O uint32_t OMR; /*!< (@ 0x48028204) Port 2 Output Modification Register */ - __I uint32_t RESERVED[2]; - __IO uint32_t IOCR0; /*!< (@ 0x48028210) Port 2 Input/Output Control Register 0 */ - __IO uint32_t IOCR4; /*!< (@ 0x48028214) Port 2 Input/Output Control Register 4 */ - __IO uint32_t IOCR8; /*!< (@ 0x48028218) Port 2 Input/Output Control Register 8 */ - __IO uint32_t IOCR12; /*!< (@ 0x4802821C) Port 2 Input/Output Control Register 12 */ - __I uint32_t RESERVED1; - __I uint32_t IN; /*!< (@ 0x48028224) Port 2 Input Register */ - __I uint32_t RESERVED2[6]; - __IO uint32_t PDR0; /*!< (@ 0x48028240) Port 2 Pad Driver Mode 0 Register */ - __IO uint32_t PDR1; /*!< (@ 0x48028244) Port 2 Pad Driver Mode 1 Register */ - __I uint32_t RESERVED3[6]; - __I uint32_t PDISC; /*!< (@ 0x48028260) Port 2 Pin Function Decision Control Register */ - __I uint32_t RESERVED4[3]; - __IO uint32_t PPS; /*!< (@ 0x48028270) Port 2 Pin Power Save Register */ - __IO uint32_t HWSEL; /*!< (@ 0x48028274) Port 2 Pin Hardware Select Register */ -} PORT2_Type; - - -/* ================================================================================ */ -/* ================ PORT3 ================ */ -/* ================================================================================ */ - - -/** - * @brief Port 3 (PORT3) - */ - -typedef struct { /*!< (@ 0x48028300) PORT3 Structure */ - __IO uint32_t OUT; /*!< (@ 0x48028300) Port 3 Output Register */ - __O uint32_t OMR; /*!< (@ 0x48028304) Port 3 Output Modification Register */ - __I uint32_t RESERVED[2]; - __IO uint32_t IOCR0; /*!< (@ 0x48028310) Port 3 Input/Output Control Register 0 */ - __IO uint32_t IOCR4; /*!< (@ 0x48028314) Port 3 Input/Output Control Register 4 */ - __IO uint32_t IOCR8; /*!< (@ 0x48028318) Port 3 Input/Output Control Register 8 */ - __IO uint32_t IOCR12; /*!< (@ 0x4802831C) Port 3 Input/Output Control Register 12 */ - __I uint32_t RESERVED1; - __I uint32_t IN; /*!< (@ 0x48028324) Port 3 Input Register */ - __I uint32_t RESERVED2[6]; - __IO uint32_t PDR0; /*!< (@ 0x48028340) Port 3 Pad Driver Mode 0 Register */ - __IO uint32_t PDR1; /*!< (@ 0x48028344) Port 3 Pad Driver Mode 1 Register */ - __I uint32_t RESERVED3[6]; - __I uint32_t PDISC; /*!< (@ 0x48028360) Port 3 Pin Function Decision Control Register */ - __I uint32_t RESERVED4[3]; - __IO uint32_t PPS; /*!< (@ 0x48028370) Port 3 Pin Power Save Register */ - __IO uint32_t HWSEL; /*!< (@ 0x48028374) Port 3 Pin Hardware Select Register */ -} PORT3_Type; - - -/* ================================================================================ */ -/* ================ PORT4 ================ */ -/* ================================================================================ */ - - -/** - * @brief Port 4 (PORT4) - */ - -typedef struct { /*!< (@ 0x48028400) PORT4 Structure */ - __IO uint32_t OUT; /*!< (@ 0x48028400) Port 4 Output Register */ - __O uint32_t OMR; /*!< (@ 0x48028404) Port 4 Output Modification Register */ - __I uint32_t RESERVED[2]; - __IO uint32_t IOCR0; /*!< (@ 0x48028410) Port 4 Input/Output Control Register 0 */ - __IO uint32_t IOCR4; /*!< (@ 0x48028414) Port 4 Input/Output Control Register 4 */ - __I uint32_t RESERVED1[3]; - __I uint32_t IN; /*!< (@ 0x48028424) Port 4 Input Register */ - __I uint32_t RESERVED2[6]; - __IO uint32_t PDR0; /*!< (@ 0x48028440) Port 4 Pad Driver Mode 0 Register */ - __I uint32_t RESERVED3[7]; - __I uint32_t PDISC; /*!< (@ 0x48028460) Port 4 Pin Function Decision Control Register */ - __I uint32_t RESERVED4[3]; - __IO uint32_t PPS; /*!< (@ 0x48028470) Port 4 Pin Power Save Register */ - __IO uint32_t HWSEL; /*!< (@ 0x48028474) Port 4 Pin Hardware Select Register */ -} PORT4_Type; - - -/* ================================================================================ */ -/* ================ PORT5 ================ */ -/* ================================================================================ */ - - -/** - * @brief Port 5 (PORT5) - */ - -typedef struct { /*!< (@ 0x48028500) PORT5 Structure */ - __IO uint32_t OUT; /*!< (@ 0x48028500) Port 5 Output Register */ - __O uint32_t OMR; /*!< (@ 0x48028504) Port 5 Output Modification Register */ - __I uint32_t RESERVED[2]; - __IO uint32_t IOCR0; /*!< (@ 0x48028510) Port 5 Input/Output Control Register 0 */ - __IO uint32_t IOCR4; /*!< (@ 0x48028514) Port 5 Input/Output Control Register 4 */ - __IO uint32_t IOCR8; /*!< (@ 0x48028518) Port 5 Input/Output Control Register 8 */ - __I uint32_t RESERVED1[2]; - __I uint32_t IN; /*!< (@ 0x48028524) Port 5 Input Register */ - __I uint32_t RESERVED2[6]; - __IO uint32_t PDR0; /*!< (@ 0x48028540) Port 5 Pad Driver Mode 0 Register */ - __IO uint32_t PDR1; /*!< (@ 0x48028544) Port 5 Pad Driver Mode 1 Register */ - __I uint32_t RESERVED3[6]; - __I uint32_t PDISC; /*!< (@ 0x48028560) Port 5 Pin Function Decision Control Register */ - __I uint32_t RESERVED4[3]; - __IO uint32_t PPS; /*!< (@ 0x48028570) Port 5 Pin Power Save Register */ - __IO uint32_t HWSEL; /*!< (@ 0x48028574) Port 5 Pin Hardware Select Register */ -} PORT5_Type; - - -/* ================================================================================ */ -/* ================ PORT6 ================ */ -/* ================================================================================ */ - - -/** - * @brief Port 6 (PORT6) - */ - -typedef struct { /*!< (@ 0x48028600) PORT6 Structure */ - __IO uint32_t OUT; /*!< (@ 0x48028600) Port 6 Output Register */ - __O uint32_t OMR; /*!< (@ 0x48028604) Port 6 Output Modification Register */ - __I uint32_t RESERVED[2]; - __IO uint32_t IOCR0; /*!< (@ 0x48028610) Port 6 Input/Output Control Register 0 */ - __IO uint32_t IOCR4; /*!< (@ 0x48028614) Port 6 Input/Output Control Register 4 */ - __I uint32_t RESERVED1[3]; - __I uint32_t IN; /*!< (@ 0x48028624) Port 6 Input Register */ - __I uint32_t RESERVED2[6]; - __IO uint32_t PDR0; /*!< (@ 0x48028640) Port 6 Pad Driver Mode 0 Register */ - __I uint32_t RESERVED3[7]; - __I uint32_t PDISC; /*!< (@ 0x48028660) Port 6 Pin Function Decision Control Register */ - __I uint32_t RESERVED4[3]; - __IO uint32_t PPS; /*!< (@ 0x48028670) Port 6 Pin Power Save Register */ - __IO uint32_t HWSEL; /*!< (@ 0x48028674) Port 6 Pin Hardware Select Register */ -} PORT6_Type; - - -/* ================================================================================ */ -/* ================ PORT7 ================ */ -/* ================================================================================ */ - - -/** - * @brief Port 7 (PORT7) - */ - -typedef struct { /*!< (@ 0x48028700) PORT7 Structure */ - __IO uint32_t OUT; /*!< (@ 0x48028700) Port 7 Output Register */ - __O uint32_t OMR; /*!< (@ 0x48028704) Port 7 Output Modification Register */ - __I uint32_t RESERVED[2]; - __IO uint32_t IOCR0; /*!< (@ 0x48028710) Port 7 Input/Output Control Register 0 */ - __IO uint32_t IOCR4; /*!< (@ 0x48028714) Port 7 Input/Output Control Register 4 */ - __IO uint32_t IOCR8; /*!< (@ 0x48028718) Port 7 Input/Output Control Register 8 */ - __I uint32_t RESERVED1[2]; - __I uint32_t IN; /*!< (@ 0x48028724) Port 7 Input Register */ - __I uint32_t RESERVED2[6]; - __IO uint32_t PDR0; /*!< (@ 0x48028740) Port 7 Pad Driver Mode 0 Register */ - __IO uint32_t PDR1; /*!< (@ 0x48028744) Port 7 Pad Driver Mode 1 Register */ - __I uint32_t RESERVED3[6]; - __I uint32_t PDISC; /*!< (@ 0x48028760) Port 7 Pin Function Decision Control Register */ - __I uint32_t RESERVED4[3]; - __IO uint32_t PPS; /*!< (@ 0x48028770) Port 7 Pin Power Save Register */ - __IO uint32_t HWSEL; /*!< (@ 0x48028774) Port 7 Pin Hardware Select Register */ -} PORT7_Type; - - -/* ================================================================================ */ -/* ================ PORT8 ================ */ -/* ================================================================================ */ - - -/** - * @brief Port 8 (PORT8) - */ - -typedef struct { /*!< (@ 0x48028800) PORT8 Structure */ - __IO uint32_t OUT; /*!< (@ 0x48028800) Port 8 Output Register */ - __O uint32_t OMR; /*!< (@ 0x48028804) Port 8 Output Modification Register */ - __I uint32_t RESERVED[2]; - __IO uint32_t IOCR0; /*!< (@ 0x48028810) Port 8 Input/Output Control Register 0 */ - __IO uint32_t IOCR4; /*!< (@ 0x48028814) Port 8 Input/Output Control Register 4 */ - __IO uint32_t IOCR8; /*!< (@ 0x48028818) Port 8 Input/Output Control Register 8 */ - __I uint32_t RESERVED1[2]; - __I uint32_t IN; /*!< (@ 0x48028824) Port 8 Input Register */ - __I uint32_t RESERVED2[6]; - __IO uint32_t PDR0; /*!< (@ 0x48028840) Port 8 Pad Driver Mode 0 Register */ - __IO uint32_t PDR1; /*!< (@ 0x48028844) Port 8 Pad Driver Mode 1 Register */ - __I uint32_t RESERVED3[6]; - __I uint32_t PDISC; /*!< (@ 0x48028860) Port 8 Pin Function Decision Control Register */ - __I uint32_t RESERVED4[3]; - __IO uint32_t PPS; /*!< (@ 0x48028870) Port 8 Pin Power Save Register */ - __IO uint32_t HWSEL; /*!< (@ 0x48028874) Port 8 Pin Hardware Select Register */ -} PORT8_Type; - - -/* ================================================================================ */ -/* ================ PORT9 ================ */ -/* ================================================================================ */ - - -/** - * @brief Port 9 (PORT9) - */ - -typedef struct { /*!< (@ 0x48028900) PORT9 Structure */ - __IO uint32_t OUT; /*!< (@ 0x48028900) Port 9 Output Register */ - __O uint32_t OMR; /*!< (@ 0x48028904) Port 9 Output Modification Register */ - __I uint32_t RESERVED[2]; - __IO uint32_t IOCR0; /*!< (@ 0x48028910) Port 9 Input/Output Control Register 0 */ - __IO uint32_t IOCR4; /*!< (@ 0x48028914) Port 5 Input/Output Control Register 4 */ - __IO uint32_t IOCR8; /*!< (@ 0x48028918) Port 9 Input/Output Control Register 8 */ - __I uint32_t RESERVED1[2]; - __I uint32_t IN; /*!< (@ 0x48028924) Port 9 Input Register */ - __I uint32_t RESERVED2[6]; - __IO uint32_t PDR0; /*!< (@ 0x48028940) Port 9 Pad Driver Mode 0 Register */ - __IO uint32_t PDR1; /*!< (@ 0x48028944) Port 9 Pad Driver Mode 1 Register */ - __I uint32_t RESERVED3[6]; - __I uint32_t PDISC; /*!< (@ 0x48028960) Port 9 Pin Function Decision Control Register */ - __I uint32_t RESERVED4[3]; - __IO uint32_t PPS; /*!< (@ 0x48028970) Port 9 Pin Power Save Register */ - __IO uint32_t HWSEL; /*!< (@ 0x48028974) Port 9 Pin Hardware Select Register */ -} PORT9_Type; - - -/* ================================================================================ */ -/* ================ PORT14 ================ */ -/* ================================================================================ */ - - -/** - * @brief Port 14 (PORT14) - */ - -typedef struct { /*!< (@ 0x48028E00) PORT14 Structure */ - __IO uint32_t OUT; /*!< (@ 0x48028E00) Port 14 Output Register */ - __O uint32_t OMR; /*!< (@ 0x48028E04) Port 14 Output Modification Register */ - __I uint32_t RESERVED[2]; - __IO uint32_t IOCR0; /*!< (@ 0x48028E10) Port 14 Input/Output Control Register 0 */ - __IO uint32_t IOCR4; /*!< (@ 0x48028E14) Port 14 Input/Output Control Register 4 */ - __IO uint32_t IOCR8; /*!< (@ 0x48028E18) Port 14 Input/Output Control Register 8 */ - __IO uint32_t IOCR12; /*!< (@ 0x48028E1C) Port 14 Input/Output Control Register 12 */ - __I uint32_t RESERVED1; - __I uint32_t IN; /*!< (@ 0x48028E24) Port 14 Input Register */ - __I uint32_t RESERVED2[14]; - __IO uint32_t PDISC; /*!< (@ 0x48028E60) Port 14 Pin Function Decision Control Register */ - __I uint32_t RESERVED3[3]; - __IO uint32_t PPS; /*!< (@ 0x48028E70) Port 14 Pin Power Save Register */ - __IO uint32_t HWSEL; /*!< (@ 0x48028E74) Port 14 Pin Hardware Select Register */ -} PORT14_Type; - - -/* ================================================================================ */ -/* ================ PORT15 ================ */ -/* ================================================================================ */ - - -/** - * @brief Port 15 (PORT15) - */ - -typedef struct { /*!< (@ 0x48028F00) PORT15 Structure */ - __IO uint32_t OUT; /*!< (@ 0x48028F00) Port 15 Output Register */ - __O uint32_t OMR; /*!< (@ 0x48028F04) Port 15 Output Modification Register */ - __I uint32_t RESERVED[2]; - __IO uint32_t IOCR0; /*!< (@ 0x48028F10) Port 15 Input/Output Control Register 0 */ - __IO uint32_t IOCR4; /*!< (@ 0x48028F14) Port 15 Input/Output Control Register 4 */ - __IO uint32_t IOCR8; /*!< (@ 0x48028F18) Port 15 Input/Output Control Register 8 */ - __IO uint32_t IOCR12; /*!< (@ 0x48028F1C) Port 15 Input/Output Control Register 12 */ - __I uint32_t RESERVED1; - __I uint32_t IN; /*!< (@ 0x48028F24) Port 15 Input Register */ - __I uint32_t RESERVED2[14]; - __IO uint32_t PDISC; /*!< (@ 0x48028F60) Port 15 Pin Function Decision Control Register */ - __I uint32_t RESERVED3[3]; - __IO uint32_t PPS; /*!< (@ 0x48028F70) Port 15 Pin Power Save Register */ - __IO uint32_t HWSEL; /*!< (@ 0x48028F74) Port 15 Pin Hardware Select Register */ -} PORT15_Type; - - -/* -------------------- End of section using anonymous unions ------------------- */ -#if defined(__CC_ARM) - #pragma pop -#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #pragma clang diagnostic pop -#elif defined(__ICCARM__) - /* leave anonymous unions enabled */ -#elif defined(__GNUC__) - /* anonymous unions are enabled by default */ -#elif defined(__TMS470__) - /* anonymous unions are enabled by default */ -#elif defined(__TASKING__) - #pragma warning restore -#else - #warning Not supported compiler type -#endif - - - -/* ================================================================================ */ -/* ================ struct 'PPB' Position & Mask ================ */ -/* ================================================================================ */ - - -/* ---------------------------------- PPB_ACTLR --------------------------------- */ -#define PPB_ACTLR_DISMCYCINT_Pos (0UL) /*!< PPB ACTLR: DISMCYCINT (Bit 0) */ -#define PPB_ACTLR_DISMCYCINT_Msk (0x1UL) /*!< PPB ACTLR: DISMCYCINT (Bitfield-Mask: 0x01) */ -#define PPB_ACTLR_DISDEFWBUF_Pos (1UL) /*!< PPB ACTLR: DISDEFWBUF (Bit 1) */ -#define PPB_ACTLR_DISDEFWBUF_Msk (0x2UL) /*!< PPB ACTLR: DISDEFWBUF (Bitfield-Mask: 0x01) */ -#define PPB_ACTLR_DISFOLD_Pos (2UL) /*!< PPB ACTLR: DISFOLD (Bit 2) */ -#define PPB_ACTLR_DISFOLD_Msk (0x4UL) /*!< PPB ACTLR: DISFOLD (Bitfield-Mask: 0x01) */ -#define PPB_ACTLR_DISFPCA_Pos (8UL) /*!< PPB ACTLR: DISFPCA (Bit 8) */ -#define PPB_ACTLR_DISFPCA_Msk (0x100UL) /*!< PPB ACTLR: DISFPCA (Bitfield-Mask: 0x01) */ -#define PPB_ACTLR_DISOOFP_Pos (9UL) /*!< PPB ACTLR: DISOOFP (Bit 9) */ -#define PPB_ACTLR_DISOOFP_Msk (0x200UL) /*!< PPB ACTLR: DISOOFP (Bitfield-Mask: 0x01) */ - -/* -------------------------------- PPB_SYST_CSR -------------------------------- */ -#define PPB_SYST_CSR_ENABLE_Pos (0UL) /*!< PPB SYST_CSR: ENABLE (Bit 0) */ -#define PPB_SYST_CSR_ENABLE_Msk (0x1UL) /*!< PPB SYST_CSR: ENABLE (Bitfield-Mask: 0x01) */ -#define PPB_SYST_CSR_TICKINT_Pos (1UL) /*!< PPB SYST_CSR: TICKINT (Bit 1) */ -#define PPB_SYST_CSR_TICKINT_Msk (0x2UL) /*!< PPB SYST_CSR: TICKINT (Bitfield-Mask: 0x01) */ -#define PPB_SYST_CSR_CLKSOURCE_Pos (2UL) /*!< PPB SYST_CSR: CLKSOURCE (Bit 2) */ -#define PPB_SYST_CSR_CLKSOURCE_Msk (0x4UL) /*!< PPB SYST_CSR: CLKSOURCE (Bitfield-Mask: 0x01) */ -#define PPB_SYST_CSR_COUNTFLAG_Pos (16UL) /*!< PPB SYST_CSR: COUNTFLAG (Bit 16) */ -#define PPB_SYST_CSR_COUNTFLAG_Msk (0x10000UL) /*!< PPB SYST_CSR: COUNTFLAG (Bitfield-Mask: 0x01) */ - -/* -------------------------------- PPB_SYST_RVR -------------------------------- */ -#define PPB_SYST_RVR_RELOAD_Pos (0UL) /*!< PPB SYST_RVR: RELOAD (Bit 0) */ -#define PPB_SYST_RVR_RELOAD_Msk (0xffffffUL) /*!< PPB SYST_RVR: RELOAD (Bitfield-Mask: 0xffffff) */ - -/* -------------------------------- PPB_SYST_CVR -------------------------------- */ -#define PPB_SYST_CVR_CURRENT_Pos (0UL) /*!< PPB SYST_CVR: CURRENT (Bit 0) */ -#define PPB_SYST_CVR_CURRENT_Msk (0xffffffUL) /*!< PPB SYST_CVR: CURRENT (Bitfield-Mask: 0xffffff) */ - -/* ------------------------------- PPB_SYST_CALIB ------------------------------- */ -#define PPB_SYST_CALIB_TENMS_Pos (0UL) /*!< PPB SYST_CALIB: TENMS (Bit 0) */ -#define PPB_SYST_CALIB_TENMS_Msk (0xffffffUL) /*!< PPB SYST_CALIB: TENMS (Bitfield-Mask: 0xffffff) */ -#define PPB_SYST_CALIB_SKEW_Pos (30UL) /*!< PPB SYST_CALIB: SKEW (Bit 30) */ -#define PPB_SYST_CALIB_SKEW_Msk (0x40000000UL) /*!< PPB SYST_CALIB: SKEW (Bitfield-Mask: 0x01) */ -#define PPB_SYST_CALIB_NOREF_Pos (31UL) /*!< PPB SYST_CALIB: NOREF (Bit 31) */ -#define PPB_SYST_CALIB_NOREF_Msk (0x80000000UL) /*!< PPB SYST_CALIB: NOREF (Bitfield-Mask: 0x01) */ - -/* ------------------------------- PPB_NVIC_ISER0 ------------------------------- */ -#define PPB_NVIC_ISER0_SETENA_Pos (0UL) /*!< PPB NVIC_ISER0: SETENA (Bit 0) */ -#define PPB_NVIC_ISER0_SETENA_Msk (0xffffffffUL) /*!< PPB NVIC_ISER0: SETENA (Bitfield-Mask: 0xffffffff) */ - -/* ------------------------------- PPB_NVIC_ISER1 ------------------------------- */ -#define PPB_NVIC_ISER1_SETENA_Pos (0UL) /*!< PPB NVIC_ISER1: SETENA (Bit 0) */ -#define PPB_NVIC_ISER1_SETENA_Msk (0xffffffffUL) /*!< PPB NVIC_ISER1: SETENA (Bitfield-Mask: 0xffffffff) */ - -/* ------------------------------- PPB_NVIC_ISER2 ------------------------------- */ -#define PPB_NVIC_ISER2_SETENA_Pos (0UL) /*!< PPB NVIC_ISER2: SETENA (Bit 0) */ -#define PPB_NVIC_ISER2_SETENA_Msk (0xffffffffUL) /*!< PPB NVIC_ISER2: SETENA (Bitfield-Mask: 0xffffffff) */ - -/* ------------------------------- PPB_NVIC_ISER3 ------------------------------- */ -#define PPB_NVIC_ISER3_SETENA_Pos (0UL) /*!< PPB NVIC_ISER3: SETENA (Bit 0) */ -#define PPB_NVIC_ISER3_SETENA_Msk (0xffffffffUL) /*!< PPB NVIC_ISER3: SETENA (Bitfield-Mask: 0xffffffff) */ - -/* ------------------------------- PPB_NVIC_ICER0 ------------------------------- */ -#define PPB_NVIC_ICER0_CLRENA_Pos (0UL) /*!< PPB NVIC_ICER0: CLRENA (Bit 0) */ -#define PPB_NVIC_ICER0_CLRENA_Msk (0xffffffffUL) /*!< PPB NVIC_ICER0: CLRENA (Bitfield-Mask: 0xffffffff) */ - -/* ------------------------------- PPB_NVIC_ICER1 ------------------------------- */ -#define PPB_NVIC_ICER1_CLRENA_Pos (0UL) /*!< PPB NVIC_ICER1: CLRENA (Bit 0) */ -#define PPB_NVIC_ICER1_CLRENA_Msk (0xffffffffUL) /*!< PPB NVIC_ICER1: CLRENA (Bitfield-Mask: 0xffffffff) */ - -/* ------------------------------- PPB_NVIC_ICER2 ------------------------------- */ -#define PPB_NVIC_ICER2_CLRENA_Pos (0UL) /*!< PPB NVIC_ICER2: CLRENA (Bit 0) */ -#define PPB_NVIC_ICER2_CLRENA_Msk (0xffffffffUL) /*!< PPB NVIC_ICER2: CLRENA (Bitfield-Mask: 0xffffffff) */ - -/* ------------------------------- PPB_NVIC_ICER3 ------------------------------- */ -#define PPB_NVIC_ICER3_CLRENA_Pos (0UL) /*!< PPB NVIC_ICER3: CLRENA (Bit 0) */ -#define PPB_NVIC_ICER3_CLRENA_Msk (0xffffffffUL) /*!< PPB NVIC_ICER3: CLRENA (Bitfield-Mask: 0xffffffff) */ - -/* ------------------------------- PPB_NVIC_ISPR0 ------------------------------- */ -#define PPB_NVIC_ISPR0_SETPEND_Pos (0UL) /*!< PPB NVIC_ISPR0: SETPEND (Bit 0) */ -#define PPB_NVIC_ISPR0_SETPEND_Msk (0xffffffffUL) /*!< PPB NVIC_ISPR0: SETPEND (Bitfield-Mask: 0xffffffff) */ - -/* ------------------------------- PPB_NVIC_ISPR1 ------------------------------- */ -#define PPB_NVIC_ISPR1_SETPEND_Pos (0UL) /*!< PPB NVIC_ISPR1: SETPEND (Bit 0) */ -#define PPB_NVIC_ISPR1_SETPEND_Msk (0xffffffffUL) /*!< PPB NVIC_ISPR1: SETPEND (Bitfield-Mask: 0xffffffff) */ - -/* ------------------------------- PPB_NVIC_ISPR2 ------------------------------- */ -#define PPB_NVIC_ISPR2_SETPEND_Pos (0UL) /*!< PPB NVIC_ISPR2: SETPEND (Bit 0) */ -#define PPB_NVIC_ISPR2_SETPEND_Msk (0xffffffffUL) /*!< PPB NVIC_ISPR2: SETPEND (Bitfield-Mask: 0xffffffff) */ - -/* ------------------------------- PPB_NVIC_ISPR3 ------------------------------- */ -#define PPB_NVIC_ISPR3_SETPEND_Pos (0UL) /*!< PPB NVIC_ISPR3: SETPEND (Bit 0) */ -#define PPB_NVIC_ISPR3_SETPEND_Msk (0xffffffffUL) /*!< PPB NVIC_ISPR3: SETPEND (Bitfield-Mask: 0xffffffff) */ - -/* ------------------------------- PPB_NVIC_ICPR0 ------------------------------- */ -#define PPB_NVIC_ICPR0_CLRPEND_Pos (0UL) /*!< PPB NVIC_ICPR0: CLRPEND (Bit 0) */ -#define PPB_NVIC_ICPR0_CLRPEND_Msk (0xffffffffUL) /*!< PPB NVIC_ICPR0: CLRPEND (Bitfield-Mask: 0xffffffff) */ - -/* ------------------------------- PPB_NVIC_ICPR1 ------------------------------- */ -#define PPB_NVIC_ICPR1_CLRPEND_Pos (0UL) /*!< PPB NVIC_ICPR1: CLRPEND (Bit 0) */ -#define PPB_NVIC_ICPR1_CLRPEND_Msk (0xffffffffUL) /*!< PPB NVIC_ICPR1: CLRPEND (Bitfield-Mask: 0xffffffff) */ - -/* ------------------------------- PPB_NVIC_ICPR2 ------------------------------- */ -#define PPB_NVIC_ICPR2_CLRPEND_Pos (0UL) /*!< PPB NVIC_ICPR2: CLRPEND (Bit 0) */ -#define PPB_NVIC_ICPR2_CLRPEND_Msk (0xffffffffUL) /*!< PPB NVIC_ICPR2: CLRPEND (Bitfield-Mask: 0xffffffff) */ - -/* ------------------------------- PPB_NVIC_ICPR3 ------------------------------- */ -#define PPB_NVIC_ICPR3_CLRPEND_Pos (0UL) /*!< PPB NVIC_ICPR3: CLRPEND (Bit 0) */ -#define PPB_NVIC_ICPR3_CLRPEND_Msk (0xffffffffUL) /*!< PPB NVIC_ICPR3: CLRPEND (Bitfield-Mask: 0xffffffff) */ - -/* ------------------------------- PPB_NVIC_IABR0 ------------------------------- */ -#define PPB_NVIC_IABR0_ACTIVE_Pos (0UL) /*!< PPB NVIC_IABR0: ACTIVE (Bit 0) */ -#define PPB_NVIC_IABR0_ACTIVE_Msk (0xffffffffUL) /*!< PPB NVIC_IABR0: ACTIVE (Bitfield-Mask: 0xffffffff) */ - -/* ------------------------------- PPB_NVIC_IABR1 ------------------------------- */ -#define PPB_NVIC_IABR1_ACTIVE_Pos (0UL) /*!< PPB NVIC_IABR1: ACTIVE (Bit 0) */ -#define PPB_NVIC_IABR1_ACTIVE_Msk (0xffffffffUL) /*!< PPB NVIC_IABR1: ACTIVE (Bitfield-Mask: 0xffffffff) */ - -/* ------------------------------- PPB_NVIC_IABR2 ------------------------------- */ -#define PPB_NVIC_IABR2_ACTIVE_Pos (0UL) /*!< PPB NVIC_IABR2: ACTIVE (Bit 0) */ -#define PPB_NVIC_IABR2_ACTIVE_Msk (0xffffffffUL) /*!< PPB NVIC_IABR2: ACTIVE (Bitfield-Mask: 0xffffffff) */ - -/* ------------------------------- PPB_NVIC_IABR3 ------------------------------- */ -#define PPB_NVIC_IABR3_ACTIVE_Pos (0UL) /*!< PPB NVIC_IABR3: ACTIVE (Bit 0) */ -#define PPB_NVIC_IABR3_ACTIVE_Msk (0xffffffffUL) /*!< PPB NVIC_IABR3: ACTIVE (Bitfield-Mask: 0xffffffff) */ - -/* -------------------------------- PPB_NVIC_IPR0 ------------------------------- */ -#define PPB_NVIC_IPR0_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR0: PRI_0 (Bit 0) */ -#define PPB_NVIC_IPR0_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR0: PRI_0 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR0_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR0: PRI_1 (Bit 8) */ -#define PPB_NVIC_IPR0_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR0: PRI_1 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR0_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR0: PRI_2 (Bit 16) */ -#define PPB_NVIC_IPR0_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR0: PRI_2 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR0_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR0: PRI_3 (Bit 24) */ -#define PPB_NVIC_IPR0_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR0: PRI_3 (Bitfield-Mask: 0xff) */ - -/* -------------------------------- PPB_NVIC_IPR1 ------------------------------- */ -#define PPB_NVIC_IPR1_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR1: PRI_0 (Bit 0) */ -#define PPB_NVIC_IPR1_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR1: PRI_0 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR1_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR1: PRI_1 (Bit 8) */ -#define PPB_NVIC_IPR1_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR1: PRI_1 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR1_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR1: PRI_2 (Bit 16) */ -#define PPB_NVIC_IPR1_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR1: PRI_2 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR1_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR1: PRI_3 (Bit 24) */ -#define PPB_NVIC_IPR1_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR1: PRI_3 (Bitfield-Mask: 0xff) */ - -/* -------------------------------- PPB_NVIC_IPR2 ------------------------------- */ -#define PPB_NVIC_IPR2_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR2: PRI_0 (Bit 0) */ -#define PPB_NVIC_IPR2_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR2: PRI_0 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR2_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR2: PRI_1 (Bit 8) */ -#define PPB_NVIC_IPR2_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR2: PRI_1 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR2_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR2: PRI_2 (Bit 16) */ -#define PPB_NVIC_IPR2_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR2: PRI_2 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR2_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR2: PRI_3 (Bit 24) */ -#define PPB_NVIC_IPR2_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR2: PRI_3 (Bitfield-Mask: 0xff) */ - -/* -------------------------------- PPB_NVIC_IPR3 ------------------------------- */ -#define PPB_NVIC_IPR3_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR3: PRI_0 (Bit 0) */ -#define PPB_NVIC_IPR3_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR3: PRI_0 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR3_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR3: PRI_1 (Bit 8) */ -#define PPB_NVIC_IPR3_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR3: PRI_1 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR3_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR3: PRI_2 (Bit 16) */ -#define PPB_NVIC_IPR3_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR3: PRI_2 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR3_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR3: PRI_3 (Bit 24) */ -#define PPB_NVIC_IPR3_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR3: PRI_3 (Bitfield-Mask: 0xff) */ - -/* -------------------------------- PPB_NVIC_IPR4 ------------------------------- */ -#define PPB_NVIC_IPR4_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR4: PRI_0 (Bit 0) */ -#define PPB_NVIC_IPR4_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR4: PRI_0 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR4_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR4: PRI_1 (Bit 8) */ -#define PPB_NVIC_IPR4_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR4: PRI_1 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR4_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR4: PRI_2 (Bit 16) */ -#define PPB_NVIC_IPR4_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR4: PRI_2 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR4_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR4: PRI_3 (Bit 24) */ -#define PPB_NVIC_IPR4_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR4: PRI_3 (Bitfield-Mask: 0xff) */ - -/* -------------------------------- PPB_NVIC_IPR5 ------------------------------- */ -#define PPB_NVIC_IPR5_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR5: PRI_0 (Bit 0) */ -#define PPB_NVIC_IPR5_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR5: PRI_0 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR5_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR5: PRI_1 (Bit 8) */ -#define PPB_NVIC_IPR5_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR5: PRI_1 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR5_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR5: PRI_2 (Bit 16) */ -#define PPB_NVIC_IPR5_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR5: PRI_2 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR5_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR5: PRI_3 (Bit 24) */ -#define PPB_NVIC_IPR5_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR5: PRI_3 (Bitfield-Mask: 0xff) */ - -/* -------------------------------- PPB_NVIC_IPR6 ------------------------------- */ -#define PPB_NVIC_IPR6_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR6: PRI_0 (Bit 0) */ -#define PPB_NVIC_IPR6_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR6: PRI_0 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR6_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR6: PRI_1 (Bit 8) */ -#define PPB_NVIC_IPR6_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR6: PRI_1 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR6_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR6: PRI_2 (Bit 16) */ -#define PPB_NVIC_IPR6_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR6: PRI_2 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR6_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR6: PRI_3 (Bit 24) */ -#define PPB_NVIC_IPR6_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR6: PRI_3 (Bitfield-Mask: 0xff) */ - -/* -------------------------------- PPB_NVIC_IPR7 ------------------------------- */ -#define PPB_NVIC_IPR7_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR7: PRI_0 (Bit 0) */ -#define PPB_NVIC_IPR7_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR7: PRI_0 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR7_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR7: PRI_1 (Bit 8) */ -#define PPB_NVIC_IPR7_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR7: PRI_1 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR7_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR7: PRI_2 (Bit 16) */ -#define PPB_NVIC_IPR7_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR7: PRI_2 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR7_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR7: PRI_3 (Bit 24) */ -#define PPB_NVIC_IPR7_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR7: PRI_3 (Bitfield-Mask: 0xff) */ - -/* -------------------------------- PPB_NVIC_IPR8 ------------------------------- */ -#define PPB_NVIC_IPR8_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR8: PRI_0 (Bit 0) */ -#define PPB_NVIC_IPR8_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR8: PRI_0 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR8_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR8: PRI_1 (Bit 8) */ -#define PPB_NVIC_IPR8_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR8: PRI_1 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR8_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR8: PRI_2 (Bit 16) */ -#define PPB_NVIC_IPR8_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR8: PRI_2 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR8_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR8: PRI_3 (Bit 24) */ -#define PPB_NVIC_IPR8_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR8: PRI_3 (Bitfield-Mask: 0xff) */ - -/* -------------------------------- PPB_NVIC_IPR9 ------------------------------- */ -#define PPB_NVIC_IPR9_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR9: PRI_0 (Bit 0) */ -#define PPB_NVIC_IPR9_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR9: PRI_0 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR9_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR9: PRI_1 (Bit 8) */ -#define PPB_NVIC_IPR9_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR9: PRI_1 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR9_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR9: PRI_2 (Bit 16) */ -#define PPB_NVIC_IPR9_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR9: PRI_2 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR9_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR9: PRI_3 (Bit 24) */ -#define PPB_NVIC_IPR9_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR9: PRI_3 (Bitfield-Mask: 0xff) */ - -/* ------------------------------- PPB_NVIC_IPR10 ------------------------------- */ -#define PPB_NVIC_IPR10_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR10: PRI_0 (Bit 0) */ -#define PPB_NVIC_IPR10_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR10: PRI_0 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR10_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR10: PRI_1 (Bit 8) */ -#define PPB_NVIC_IPR10_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR10: PRI_1 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR10_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR10: PRI_2 (Bit 16) */ -#define PPB_NVIC_IPR10_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR10: PRI_2 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR10_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR10: PRI_3 (Bit 24) */ -#define PPB_NVIC_IPR10_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR10: PRI_3 (Bitfield-Mask: 0xff) */ - -/* ------------------------------- PPB_NVIC_IPR11 ------------------------------- */ -#define PPB_NVIC_IPR11_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR11: PRI_0 (Bit 0) */ -#define PPB_NVIC_IPR11_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR11: PRI_0 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR11_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR11: PRI_1 (Bit 8) */ -#define PPB_NVIC_IPR11_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR11: PRI_1 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR11_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR11: PRI_2 (Bit 16) */ -#define PPB_NVIC_IPR11_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR11: PRI_2 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR11_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR11: PRI_3 (Bit 24) */ -#define PPB_NVIC_IPR11_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR11: PRI_3 (Bitfield-Mask: 0xff) */ - -/* ------------------------------- PPB_NVIC_IPR12 ------------------------------- */ -#define PPB_NVIC_IPR12_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR12: PRI_0 (Bit 0) */ -#define PPB_NVIC_IPR12_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR12: PRI_0 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR12_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR12: PRI_1 (Bit 8) */ -#define PPB_NVIC_IPR12_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR12: PRI_1 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR12_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR12: PRI_2 (Bit 16) */ -#define PPB_NVIC_IPR12_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR12: PRI_2 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR12_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR12: PRI_3 (Bit 24) */ -#define PPB_NVIC_IPR12_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR12: PRI_3 (Bitfield-Mask: 0xff) */ - -/* ------------------------------- PPB_NVIC_IPR13 ------------------------------- */ -#define PPB_NVIC_IPR13_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR13: PRI_0 (Bit 0) */ -#define PPB_NVIC_IPR13_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR13: PRI_0 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR13_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR13: PRI_1 (Bit 8) */ -#define PPB_NVIC_IPR13_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR13: PRI_1 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR13_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR13: PRI_2 (Bit 16) */ -#define PPB_NVIC_IPR13_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR13: PRI_2 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR13_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR13: PRI_3 (Bit 24) */ -#define PPB_NVIC_IPR13_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR13: PRI_3 (Bitfield-Mask: 0xff) */ - -/* ------------------------------- PPB_NVIC_IPR14 ------------------------------- */ -#define PPB_NVIC_IPR14_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR14: PRI_0 (Bit 0) */ -#define PPB_NVIC_IPR14_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR14: PRI_0 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR14_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR14: PRI_1 (Bit 8) */ -#define PPB_NVIC_IPR14_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR14: PRI_1 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR14_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR14: PRI_2 (Bit 16) */ -#define PPB_NVIC_IPR14_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR14: PRI_2 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR14_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR14: PRI_3 (Bit 24) */ -#define PPB_NVIC_IPR14_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR14: PRI_3 (Bitfield-Mask: 0xff) */ - -/* ------------------------------- PPB_NVIC_IPR15 ------------------------------- */ -#define PPB_NVIC_IPR15_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR15: PRI_0 (Bit 0) */ -#define PPB_NVIC_IPR15_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR15: PRI_0 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR15_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR15: PRI_1 (Bit 8) */ -#define PPB_NVIC_IPR15_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR15: PRI_1 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR15_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR15: PRI_2 (Bit 16) */ -#define PPB_NVIC_IPR15_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR15: PRI_2 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR15_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR15: PRI_3 (Bit 24) */ -#define PPB_NVIC_IPR15_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR15: PRI_3 (Bitfield-Mask: 0xff) */ - -/* ------------------------------- PPB_NVIC_IPR16 ------------------------------- */ -#define PPB_NVIC_IPR16_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR16: PRI_0 (Bit 0) */ -#define PPB_NVIC_IPR16_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR16: PRI_0 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR16_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR16: PRI_1 (Bit 8) */ -#define PPB_NVIC_IPR16_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR16: PRI_1 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR16_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR16: PRI_2 (Bit 16) */ -#define PPB_NVIC_IPR16_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR16: PRI_2 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR16_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR16: PRI_3 (Bit 24) */ -#define PPB_NVIC_IPR16_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR16: PRI_3 (Bitfield-Mask: 0xff) */ - -/* ------------------------------- PPB_NVIC_IPR17 ------------------------------- */ -#define PPB_NVIC_IPR17_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR17: PRI_0 (Bit 0) */ -#define PPB_NVIC_IPR17_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR17: PRI_0 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR17_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR17: PRI_1 (Bit 8) */ -#define PPB_NVIC_IPR17_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR17: PRI_1 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR17_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR17: PRI_2 (Bit 16) */ -#define PPB_NVIC_IPR17_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR17: PRI_2 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR17_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR17: PRI_3 (Bit 24) */ -#define PPB_NVIC_IPR17_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR17: PRI_3 (Bitfield-Mask: 0xff) */ - -/* ------------------------------- PPB_NVIC_IPR18 ------------------------------- */ -#define PPB_NVIC_IPR18_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR18: PRI_0 (Bit 0) */ -#define PPB_NVIC_IPR18_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR18: PRI_0 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR18_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR18: PRI_1 (Bit 8) */ -#define PPB_NVIC_IPR18_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR18: PRI_1 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR18_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR18: PRI_2 (Bit 16) */ -#define PPB_NVIC_IPR18_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR18: PRI_2 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR18_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR18: PRI_3 (Bit 24) */ -#define PPB_NVIC_IPR18_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR18: PRI_3 (Bitfield-Mask: 0xff) */ - -/* ------------------------------- PPB_NVIC_IPR19 ------------------------------- */ -#define PPB_NVIC_IPR19_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR19: PRI_0 (Bit 0) */ -#define PPB_NVIC_IPR19_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR19: PRI_0 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR19_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR19: PRI_1 (Bit 8) */ -#define PPB_NVIC_IPR19_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR19: PRI_1 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR19_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR19: PRI_2 (Bit 16) */ -#define PPB_NVIC_IPR19_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR19: PRI_2 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR19_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR19: PRI_3 (Bit 24) */ -#define PPB_NVIC_IPR19_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR19: PRI_3 (Bitfield-Mask: 0xff) */ - -/* ------------------------------- PPB_NVIC_IPR20 ------------------------------- */ -#define PPB_NVIC_IPR20_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR20: PRI_0 (Bit 0) */ -#define PPB_NVIC_IPR20_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR20: PRI_0 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR20_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR20: PRI_1 (Bit 8) */ -#define PPB_NVIC_IPR20_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR20: PRI_1 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR20_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR20: PRI_2 (Bit 16) */ -#define PPB_NVIC_IPR20_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR20: PRI_2 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR20_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR20: PRI_3 (Bit 24) */ -#define PPB_NVIC_IPR20_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR20: PRI_3 (Bitfield-Mask: 0xff) */ - -/* ------------------------------- PPB_NVIC_IPR21 ------------------------------- */ -#define PPB_NVIC_IPR21_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR21: PRI_0 (Bit 0) */ -#define PPB_NVIC_IPR21_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR21: PRI_0 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR21_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR21: PRI_1 (Bit 8) */ -#define PPB_NVIC_IPR21_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR21: PRI_1 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR21_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR21: PRI_2 (Bit 16) */ -#define PPB_NVIC_IPR21_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR21: PRI_2 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR21_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR21: PRI_3 (Bit 24) */ -#define PPB_NVIC_IPR21_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR21: PRI_3 (Bitfield-Mask: 0xff) */ - -/* ------------------------------- PPB_NVIC_IPR22 ------------------------------- */ -#define PPB_NVIC_IPR22_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR22: PRI_0 (Bit 0) */ -#define PPB_NVIC_IPR22_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR22: PRI_0 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR22_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR22: PRI_1 (Bit 8) */ -#define PPB_NVIC_IPR22_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR22: PRI_1 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR22_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR22: PRI_2 (Bit 16) */ -#define PPB_NVIC_IPR22_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR22: PRI_2 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR22_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR22: PRI_3 (Bit 24) */ -#define PPB_NVIC_IPR22_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR22: PRI_3 (Bitfield-Mask: 0xff) */ - -/* ------------------------------- PPB_NVIC_IPR23 ------------------------------- */ -#define PPB_NVIC_IPR23_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR23: PRI_0 (Bit 0) */ -#define PPB_NVIC_IPR23_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR23: PRI_0 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR23_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR23: PRI_1 (Bit 8) */ -#define PPB_NVIC_IPR23_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR23: PRI_1 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR23_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR23: PRI_2 (Bit 16) */ -#define PPB_NVIC_IPR23_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR23: PRI_2 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR23_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR23: PRI_3 (Bit 24) */ -#define PPB_NVIC_IPR23_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR23: PRI_3 (Bitfield-Mask: 0xff) */ - -/* ------------------------------- PPB_NVIC_IPR24 ------------------------------- */ -#define PPB_NVIC_IPR24_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR24: PRI_0 (Bit 0) */ -#define PPB_NVIC_IPR24_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR24: PRI_0 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR24_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR24: PRI_1 (Bit 8) */ -#define PPB_NVIC_IPR24_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR24: PRI_1 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR24_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR24: PRI_2 (Bit 16) */ -#define PPB_NVIC_IPR24_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR24: PRI_2 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR24_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR24: PRI_3 (Bit 24) */ -#define PPB_NVIC_IPR24_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR24: PRI_3 (Bitfield-Mask: 0xff) */ - -/* ------------------------------- PPB_NVIC_IPR25 ------------------------------- */ -#define PPB_NVIC_IPR25_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR25: PRI_0 (Bit 0) */ -#define PPB_NVIC_IPR25_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR25: PRI_0 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR25_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR25: PRI_1 (Bit 8) */ -#define PPB_NVIC_IPR25_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR25: PRI_1 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR25_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR25: PRI_2 (Bit 16) */ -#define PPB_NVIC_IPR25_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR25: PRI_2 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR25_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR25: PRI_3 (Bit 24) */ -#define PPB_NVIC_IPR25_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR25: PRI_3 (Bitfield-Mask: 0xff) */ - -/* ------------------------------- PPB_NVIC_IPR26 ------------------------------- */ -#define PPB_NVIC_IPR26_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR26: PRI_0 (Bit 0) */ -#define PPB_NVIC_IPR26_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR26: PRI_0 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR26_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR26: PRI_1 (Bit 8) */ -#define PPB_NVIC_IPR26_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR26: PRI_1 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR26_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR26: PRI_2 (Bit 16) */ -#define PPB_NVIC_IPR26_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR26: PRI_2 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR26_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR26: PRI_3 (Bit 24) */ -#define PPB_NVIC_IPR26_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR26: PRI_3 (Bitfield-Mask: 0xff) */ - -/* ------------------------------- PPB_NVIC_IPR27 ------------------------------- */ -#define PPB_NVIC_IPR27_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR27: PRI_0 (Bit 0) */ -#define PPB_NVIC_IPR27_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR27: PRI_0 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR27_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR27: PRI_1 (Bit 8) */ -#define PPB_NVIC_IPR27_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR27: PRI_1 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR27_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR27: PRI_2 (Bit 16) */ -#define PPB_NVIC_IPR27_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR27: PRI_2 (Bitfield-Mask: 0xff) */ -#define PPB_NVIC_IPR27_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR27: PRI_3 (Bit 24) */ -#define PPB_NVIC_IPR27_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR27: PRI_3 (Bitfield-Mask: 0xff) */ - -/* ---------------------------------- PPB_CPUID --------------------------------- */ -#define PPB_CPUID_Revision_Pos (0UL) /*!< PPB CPUID: Revision (Bit 0) */ -#define PPB_CPUID_Revision_Msk (0xfUL) /*!< PPB CPUID: Revision (Bitfield-Mask: 0x0f) */ -#define PPB_CPUID_PartNo_Pos (4UL) /*!< PPB CPUID: PartNo (Bit 4) */ -#define PPB_CPUID_PartNo_Msk (0xfff0UL) /*!< PPB CPUID: PartNo (Bitfield-Mask: 0xfff) */ -#define PPB_CPUID_Constant_Pos (16UL) /*!< PPB CPUID: Constant (Bit 16) */ -#define PPB_CPUID_Constant_Msk (0xf0000UL) /*!< PPB CPUID: Constant (Bitfield-Mask: 0x0f) */ -#define PPB_CPUID_Variant_Pos (20UL) /*!< PPB CPUID: Variant (Bit 20) */ -#define PPB_CPUID_Variant_Msk (0xf00000UL) /*!< PPB CPUID: Variant (Bitfield-Mask: 0x0f) */ -#define PPB_CPUID_Implementer_Pos (24UL) /*!< PPB CPUID: Implementer (Bit 24) */ -#define PPB_CPUID_Implementer_Msk (0xff000000UL) /*!< PPB CPUID: Implementer (Bitfield-Mask: 0xff) */ - -/* ---------------------------------- PPB_ICSR ---------------------------------- */ -#define PPB_ICSR_VECTACTIVE_Pos (0UL) /*!< PPB ICSR: VECTACTIVE (Bit 0) */ -#define PPB_ICSR_VECTACTIVE_Msk (0x1ffUL) /*!< PPB ICSR: VECTACTIVE (Bitfield-Mask: 0x1ff) */ -#define PPB_ICSR_RETTOBASE_Pos (11UL) /*!< PPB ICSR: RETTOBASE (Bit 11) */ -#define PPB_ICSR_RETTOBASE_Msk (0x800UL) /*!< PPB ICSR: RETTOBASE (Bitfield-Mask: 0x01) */ -#define PPB_ICSR_VECTPENDING_Pos (12UL) /*!< PPB ICSR: VECTPENDING (Bit 12) */ -#define PPB_ICSR_VECTPENDING_Msk (0x3f000UL) /*!< PPB ICSR: VECTPENDING (Bitfield-Mask: 0x3f) */ -#define PPB_ICSR_ISRPENDING_Pos (22UL) /*!< PPB ICSR: ISRPENDING (Bit 22) */ -#define PPB_ICSR_ISRPENDING_Msk (0x400000UL) /*!< PPB ICSR: ISRPENDING (Bitfield-Mask: 0x01) */ -#define PPB_ICSR_PENDSTCLR_Pos (25UL) /*!< PPB ICSR: PENDSTCLR (Bit 25) */ -#define PPB_ICSR_PENDSTCLR_Msk (0x2000000UL) /*!< PPB ICSR: PENDSTCLR (Bitfield-Mask: 0x01) */ -#define PPB_ICSR_PENDSTSET_Pos (26UL) /*!< PPB ICSR: PENDSTSET (Bit 26) */ -#define PPB_ICSR_PENDSTSET_Msk (0x4000000UL) /*!< PPB ICSR: PENDSTSET (Bitfield-Mask: 0x01) */ -#define PPB_ICSR_PENDSVCLR_Pos (27UL) /*!< PPB ICSR: PENDSVCLR (Bit 27) */ -#define PPB_ICSR_PENDSVCLR_Msk (0x8000000UL) /*!< PPB ICSR: PENDSVCLR (Bitfield-Mask: 0x01) */ -#define PPB_ICSR_PENDSVSET_Pos (28UL) /*!< PPB ICSR: PENDSVSET (Bit 28) */ -#define PPB_ICSR_PENDSVSET_Msk (0x10000000UL) /*!< PPB ICSR: PENDSVSET (Bitfield-Mask: 0x01) */ -#define PPB_ICSR_NMIPENDSET_Pos (31UL) /*!< PPB ICSR: NMIPENDSET (Bit 31) */ -#define PPB_ICSR_NMIPENDSET_Msk (0x80000000UL) /*!< PPB ICSR: NMIPENDSET (Bitfield-Mask: 0x01) */ - -/* ---------------------------------- PPB_VTOR ---------------------------------- */ -#define PPB_VTOR_TBLOFF_Pos (10UL) /*!< PPB VTOR: TBLOFF (Bit 10) */ -#define PPB_VTOR_TBLOFF_Msk (0xfffffc00UL) /*!< PPB VTOR: TBLOFF (Bitfield-Mask: 0x3fffff) */ - -/* ---------------------------------- PPB_AIRCR --------------------------------- */ -#define PPB_AIRCR_VECTRESET_Pos (0UL) /*!< PPB AIRCR: VECTRESET (Bit 0) */ -#define PPB_AIRCR_VECTRESET_Msk (0x1UL) /*!< PPB AIRCR: VECTRESET (Bitfield-Mask: 0x01) */ -#define PPB_AIRCR_VECTCLRACTIVE_Pos (1UL) /*!< PPB AIRCR: VECTCLRACTIVE (Bit 1) */ -#define PPB_AIRCR_VECTCLRACTIVE_Msk (0x2UL) /*!< PPB AIRCR: VECTCLRACTIVE (Bitfield-Mask: 0x01) */ -#define PPB_AIRCR_SYSRESETREQ_Pos (2UL) /*!< PPB AIRCR: SYSRESETREQ (Bit 2) */ -#define PPB_AIRCR_SYSRESETREQ_Msk (0x4UL) /*!< PPB AIRCR: SYSRESETREQ (Bitfield-Mask: 0x01) */ -#define PPB_AIRCR_PRIGROUP_Pos (8UL) /*!< PPB AIRCR: PRIGROUP (Bit 8) */ -#define PPB_AIRCR_PRIGROUP_Msk (0x700UL) /*!< PPB AIRCR: PRIGROUP (Bitfield-Mask: 0x07) */ -#define PPB_AIRCR_ENDIANNESS_Pos (15UL) /*!< PPB AIRCR: ENDIANNESS (Bit 15) */ -#define PPB_AIRCR_ENDIANNESS_Msk (0x8000UL) /*!< PPB AIRCR: ENDIANNESS (Bitfield-Mask: 0x01) */ -#define PPB_AIRCR_VECTKEY_Pos (16UL) /*!< PPB AIRCR: VECTKEY (Bit 16) */ -#define PPB_AIRCR_VECTKEY_Msk (0xffff0000UL) /*!< PPB AIRCR: VECTKEY (Bitfield-Mask: 0xffff) */ - -/* ----------------------------------- PPB_SCR ---------------------------------- */ -#define PPB_SCR_SLEEPONEXIT_Pos (1UL) /*!< PPB SCR: SLEEPONEXIT (Bit 1) */ -#define PPB_SCR_SLEEPONEXIT_Msk (0x2UL) /*!< PPB SCR: SLEEPONEXIT (Bitfield-Mask: 0x01) */ -#define PPB_SCR_SLEEPDEEP_Pos (2UL) /*!< PPB SCR: SLEEPDEEP (Bit 2) */ -#define PPB_SCR_SLEEPDEEP_Msk (0x4UL) /*!< PPB SCR: SLEEPDEEP (Bitfield-Mask: 0x01) */ -#define PPB_SCR_SEVONPEND_Pos (4UL) /*!< PPB SCR: SEVONPEND (Bit 4) */ -#define PPB_SCR_SEVONPEND_Msk (0x10UL) /*!< PPB SCR: SEVONPEND (Bitfield-Mask: 0x01) */ - -/* ----------------------------------- PPB_CCR ---------------------------------- */ -#define PPB_CCR_NONBASETHRDENA_Pos (0UL) /*!< PPB CCR: NONBASETHRDENA (Bit 0) */ -#define PPB_CCR_NONBASETHRDENA_Msk (0x1UL) /*!< PPB CCR: NONBASETHRDENA (Bitfield-Mask: 0x01) */ -#define PPB_CCR_USERSETMPEND_Pos (1UL) /*!< PPB CCR: USERSETMPEND (Bit 1) */ -#define PPB_CCR_USERSETMPEND_Msk (0x2UL) /*!< PPB CCR: USERSETMPEND (Bitfield-Mask: 0x01) */ -#define PPB_CCR_UNALIGN_TRP_Pos (3UL) /*!< PPB CCR: UNALIGN_TRP (Bit 3) */ -#define PPB_CCR_UNALIGN_TRP_Msk (0x8UL) /*!< PPB CCR: UNALIGN_TRP (Bitfield-Mask: 0x01) */ -#define PPB_CCR_DIV_0_TRP_Pos (4UL) /*!< PPB CCR: DIV_0_TRP (Bit 4) */ -#define PPB_CCR_DIV_0_TRP_Msk (0x10UL) /*!< PPB CCR: DIV_0_TRP (Bitfield-Mask: 0x01) */ -#define PPB_CCR_BFHFNMIGN_Pos (8UL) /*!< PPB CCR: BFHFNMIGN (Bit 8) */ -#define PPB_CCR_BFHFNMIGN_Msk (0x100UL) /*!< PPB CCR: BFHFNMIGN (Bitfield-Mask: 0x01) */ -#define PPB_CCR_STKALIGN_Pos (9UL) /*!< PPB CCR: STKALIGN (Bit 9) */ -#define PPB_CCR_STKALIGN_Msk (0x200UL) /*!< PPB CCR: STKALIGN (Bitfield-Mask: 0x01) */ - -/* ---------------------------------- PPB_SHPR1 --------------------------------- */ -#define PPB_SHPR1_PRI_4_Pos (0UL) /*!< PPB SHPR1: PRI_4 (Bit 0) */ -#define PPB_SHPR1_PRI_4_Msk (0xffUL) /*!< PPB SHPR1: PRI_4 (Bitfield-Mask: 0xff) */ -#define PPB_SHPR1_PRI_5_Pos (8UL) /*!< PPB SHPR1: PRI_5 (Bit 8) */ -#define PPB_SHPR1_PRI_5_Msk (0xff00UL) /*!< PPB SHPR1: PRI_5 (Bitfield-Mask: 0xff) */ -#define PPB_SHPR1_PRI_6_Pos (16UL) /*!< PPB SHPR1: PRI_6 (Bit 16) */ -#define PPB_SHPR1_PRI_6_Msk (0xff0000UL) /*!< PPB SHPR1: PRI_6 (Bitfield-Mask: 0xff) */ - -/* ---------------------------------- PPB_SHPR2 --------------------------------- */ -#define PPB_SHPR2_PRI_11_Pos (24UL) /*!< PPB SHPR2: PRI_11 (Bit 24) */ -#define PPB_SHPR2_PRI_11_Msk (0xff000000UL) /*!< PPB SHPR2: PRI_11 (Bitfield-Mask: 0xff) */ - -/* ---------------------------------- PPB_SHPR3 --------------------------------- */ -#define PPB_SHPR3_PRI_14_Pos (16UL) /*!< PPB SHPR3: PRI_14 (Bit 16) */ -#define PPB_SHPR3_PRI_14_Msk (0xff0000UL) /*!< PPB SHPR3: PRI_14 (Bitfield-Mask: 0xff) */ -#define PPB_SHPR3_PRI_15_Pos (24UL) /*!< PPB SHPR3: PRI_15 (Bit 24) */ -#define PPB_SHPR3_PRI_15_Msk (0xff000000UL) /*!< PPB SHPR3: PRI_15 (Bitfield-Mask: 0xff) */ - -/* ---------------------------------- PPB_SHCSR --------------------------------- */ -#define PPB_SHCSR_MEMFAULTACT_Pos (0UL) /*!< PPB SHCSR: MEMFAULTACT (Bit 0) */ -#define PPB_SHCSR_MEMFAULTACT_Msk (0x1UL) /*!< PPB SHCSR: MEMFAULTACT (Bitfield-Mask: 0x01) */ -#define PPB_SHCSR_BUSFAULTACT_Pos (1UL) /*!< PPB SHCSR: BUSFAULTACT (Bit 1) */ -#define PPB_SHCSR_BUSFAULTACT_Msk (0x2UL) /*!< PPB SHCSR: BUSFAULTACT (Bitfield-Mask: 0x01) */ -#define PPB_SHCSR_USGFAULTACT_Pos (3UL) /*!< PPB SHCSR: USGFAULTACT (Bit 3) */ -#define PPB_SHCSR_USGFAULTACT_Msk (0x8UL) /*!< PPB SHCSR: USGFAULTACT (Bitfield-Mask: 0x01) */ -#define PPB_SHCSR_SVCALLACT_Pos (7UL) /*!< PPB SHCSR: SVCALLACT (Bit 7) */ -#define PPB_SHCSR_SVCALLACT_Msk (0x80UL) /*!< PPB SHCSR: SVCALLACT (Bitfield-Mask: 0x01) */ -#define PPB_SHCSR_MONITORACT_Pos (8UL) /*!< PPB SHCSR: MONITORACT (Bit 8) */ -#define PPB_SHCSR_MONITORACT_Msk (0x100UL) /*!< PPB SHCSR: MONITORACT (Bitfield-Mask: 0x01) */ -#define PPB_SHCSR_PENDSVACT_Pos (10UL) /*!< PPB SHCSR: PENDSVACT (Bit 10) */ -#define PPB_SHCSR_PENDSVACT_Msk (0x400UL) /*!< PPB SHCSR: PENDSVACT (Bitfield-Mask: 0x01) */ -#define PPB_SHCSR_SYSTICKACT_Pos (11UL) /*!< PPB SHCSR: SYSTICKACT (Bit 11) */ -#define PPB_SHCSR_SYSTICKACT_Msk (0x800UL) /*!< PPB SHCSR: SYSTICKACT (Bitfield-Mask: 0x01) */ -#define PPB_SHCSR_USGFAULTPENDED_Pos (12UL) /*!< PPB SHCSR: USGFAULTPENDED (Bit 12) */ -#define PPB_SHCSR_USGFAULTPENDED_Msk (0x1000UL) /*!< PPB SHCSR: USGFAULTPENDED (Bitfield-Mask: 0x01) */ -#define PPB_SHCSR_MEMFAULTPENDED_Pos (13UL) /*!< PPB SHCSR: MEMFAULTPENDED (Bit 13) */ -#define PPB_SHCSR_MEMFAULTPENDED_Msk (0x2000UL) /*!< PPB SHCSR: MEMFAULTPENDED (Bitfield-Mask: 0x01) */ -#define PPB_SHCSR_BUSFAULTPENDED_Pos (14UL) /*!< PPB SHCSR: BUSFAULTPENDED (Bit 14) */ -#define PPB_SHCSR_BUSFAULTPENDED_Msk (0x4000UL) /*!< PPB SHCSR: BUSFAULTPENDED (Bitfield-Mask: 0x01) */ -#define PPB_SHCSR_SVCALLPENDED_Pos (15UL) /*!< PPB SHCSR: SVCALLPENDED (Bit 15) */ -#define PPB_SHCSR_SVCALLPENDED_Msk (0x8000UL) /*!< PPB SHCSR: SVCALLPENDED (Bitfield-Mask: 0x01) */ -#define PPB_SHCSR_MEMFAULTENA_Pos (16UL) /*!< PPB SHCSR: MEMFAULTENA (Bit 16) */ -#define PPB_SHCSR_MEMFAULTENA_Msk (0x10000UL) /*!< PPB SHCSR: MEMFAULTENA (Bitfield-Mask: 0x01) */ -#define PPB_SHCSR_BUSFAULTENA_Pos (17UL) /*!< PPB SHCSR: BUSFAULTENA (Bit 17) */ -#define PPB_SHCSR_BUSFAULTENA_Msk (0x20000UL) /*!< PPB SHCSR: BUSFAULTENA (Bitfield-Mask: 0x01) */ -#define PPB_SHCSR_USGFAULTENA_Pos (18UL) /*!< PPB SHCSR: USGFAULTENA (Bit 18) */ -#define PPB_SHCSR_USGFAULTENA_Msk (0x40000UL) /*!< PPB SHCSR: USGFAULTENA (Bitfield-Mask: 0x01) */ - -/* ---------------------------------- PPB_CFSR ---------------------------------- */ -#define PPB_CFSR_IACCVIOL_Pos (0UL) /*!< PPB CFSR: IACCVIOL (Bit 0) */ -#define PPB_CFSR_IACCVIOL_Msk (0x1UL) /*!< PPB CFSR: IACCVIOL (Bitfield-Mask: 0x01) */ -#define PPB_CFSR_DACCVIOL_Pos (1UL) /*!< PPB CFSR: DACCVIOL (Bit 1) */ -#define PPB_CFSR_DACCVIOL_Msk (0x2UL) /*!< PPB CFSR: DACCVIOL (Bitfield-Mask: 0x01) */ -#define PPB_CFSR_MUNSTKERR_Pos (3UL) /*!< PPB CFSR: MUNSTKERR (Bit 3) */ -#define PPB_CFSR_MUNSTKERR_Msk (0x8UL) /*!< PPB CFSR: MUNSTKERR (Bitfield-Mask: 0x01) */ -#define PPB_CFSR_MSTKERR_Pos (4UL) /*!< PPB CFSR: MSTKERR (Bit 4) */ -#define PPB_CFSR_MSTKERR_Msk (0x10UL) /*!< PPB CFSR: MSTKERR (Bitfield-Mask: 0x01) */ -#define PPB_CFSR_MLSPERR_Pos (5UL) /*!< PPB CFSR: MLSPERR (Bit 5) */ -#define PPB_CFSR_MLSPERR_Msk (0x20UL) /*!< PPB CFSR: MLSPERR (Bitfield-Mask: 0x01) */ -#define PPB_CFSR_MMARVALID_Pos (7UL) /*!< PPB CFSR: MMARVALID (Bit 7) */ -#define PPB_CFSR_MMARVALID_Msk (0x80UL) /*!< PPB CFSR: MMARVALID (Bitfield-Mask: 0x01) */ -#define PPB_CFSR_IBUSERR_Pos (8UL) /*!< PPB CFSR: IBUSERR (Bit 8) */ -#define PPB_CFSR_IBUSERR_Msk (0x100UL) /*!< PPB CFSR: IBUSERR (Bitfield-Mask: 0x01) */ -#define PPB_CFSR_PRECISERR_Pos (9UL) /*!< PPB CFSR: PRECISERR (Bit 9) */ -#define PPB_CFSR_PRECISERR_Msk (0x200UL) /*!< PPB CFSR: PRECISERR (Bitfield-Mask: 0x01) */ -#define PPB_CFSR_IMPRECISERR_Pos (10UL) /*!< PPB CFSR: IMPRECISERR (Bit 10) */ -#define PPB_CFSR_IMPRECISERR_Msk (0x400UL) /*!< PPB CFSR: IMPRECISERR (Bitfield-Mask: 0x01) */ -#define PPB_CFSR_UNSTKERR_Pos (11UL) /*!< PPB CFSR: UNSTKERR (Bit 11) */ -#define PPB_CFSR_UNSTKERR_Msk (0x800UL) /*!< PPB CFSR: UNSTKERR (Bitfield-Mask: 0x01) */ -#define PPB_CFSR_STKERR_Pos (12UL) /*!< PPB CFSR: STKERR (Bit 12) */ -#define PPB_CFSR_STKERR_Msk (0x1000UL) /*!< PPB CFSR: STKERR (Bitfield-Mask: 0x01) */ -#define PPB_CFSR_LSPERR_Pos (13UL) /*!< PPB CFSR: LSPERR (Bit 13) */ -#define PPB_CFSR_LSPERR_Msk (0x2000UL) /*!< PPB CFSR: LSPERR (Bitfield-Mask: 0x01) */ -#define PPB_CFSR_BFARVALID_Pos (15UL) /*!< PPB CFSR: BFARVALID (Bit 15) */ -#define PPB_CFSR_BFARVALID_Msk (0x8000UL) /*!< PPB CFSR: BFARVALID (Bitfield-Mask: 0x01) */ -#define PPB_CFSR_UNDEFINSTR_Pos (16UL) /*!< PPB CFSR: UNDEFINSTR (Bit 16) */ -#define PPB_CFSR_UNDEFINSTR_Msk (0x10000UL) /*!< PPB CFSR: UNDEFINSTR (Bitfield-Mask: 0x01) */ -#define PPB_CFSR_INVSTATE_Pos (17UL) /*!< PPB CFSR: INVSTATE (Bit 17) */ -#define PPB_CFSR_INVSTATE_Msk (0x20000UL) /*!< PPB CFSR: INVSTATE (Bitfield-Mask: 0x01) */ -#define PPB_CFSR_INVPC_Pos (18UL) /*!< PPB CFSR: INVPC (Bit 18) */ -#define PPB_CFSR_INVPC_Msk (0x40000UL) /*!< PPB CFSR: INVPC (Bitfield-Mask: 0x01) */ -#define PPB_CFSR_NOCP_Pos (19UL) /*!< PPB CFSR: NOCP (Bit 19) */ -#define PPB_CFSR_NOCP_Msk (0x80000UL) /*!< PPB CFSR: NOCP (Bitfield-Mask: 0x01) */ -#define PPB_CFSR_UNALIGNED_Pos (24UL) /*!< PPB CFSR: UNALIGNED (Bit 24) */ -#define PPB_CFSR_UNALIGNED_Msk (0x1000000UL) /*!< PPB CFSR: UNALIGNED (Bitfield-Mask: 0x01) */ -#define PPB_CFSR_DIVBYZERO_Pos (25UL) /*!< PPB CFSR: DIVBYZERO (Bit 25) */ -#define PPB_CFSR_DIVBYZERO_Msk (0x2000000UL) /*!< PPB CFSR: DIVBYZERO (Bitfield-Mask: 0x01) */ - -/* ---------------------------------- PPB_HFSR ---------------------------------- */ -#define PPB_HFSR_VECTTBL_Pos (1UL) /*!< PPB HFSR: VECTTBL (Bit 1) */ -#define PPB_HFSR_VECTTBL_Msk (0x2UL) /*!< PPB HFSR: VECTTBL (Bitfield-Mask: 0x01) */ -#define PPB_HFSR_FORCED_Pos (30UL) /*!< PPB HFSR: FORCED (Bit 30) */ -#define PPB_HFSR_FORCED_Msk (0x40000000UL) /*!< PPB HFSR: FORCED (Bitfield-Mask: 0x01) */ -#define PPB_HFSR_DEBUGEVT_Pos (31UL) /*!< PPB HFSR: DEBUGEVT (Bit 31) */ -#define PPB_HFSR_DEBUGEVT_Msk (0x80000000UL) /*!< PPB HFSR: DEBUGEVT (Bitfield-Mask: 0x01) */ - -/* ---------------------------------- PPB_MMFAR --------------------------------- */ -#define PPB_MMFAR_ADDRESS_Pos (0UL) /*!< PPB MMFAR: ADDRESS (Bit 0) */ -#define PPB_MMFAR_ADDRESS_Msk (0xffffffffUL) /*!< PPB MMFAR: ADDRESS (Bitfield-Mask: 0xffffffff) */ - -/* ---------------------------------- PPB_BFAR ---------------------------------- */ -#define PPB_BFAR_ADDRESS_Pos (0UL) /*!< PPB BFAR: ADDRESS (Bit 0) */ -#define PPB_BFAR_ADDRESS_Msk (0xffffffffUL) /*!< PPB BFAR: ADDRESS (Bitfield-Mask: 0xffffffff) */ - -/* ---------------------------------- PPB_AFSR ---------------------------------- */ -#define PPB_AFSR_VALUE_Pos (0UL) /*!< PPB AFSR: VALUE (Bit 0) */ -#define PPB_AFSR_VALUE_Msk (0xffffffffUL) /*!< PPB AFSR: VALUE (Bitfield-Mask: 0xffffffff) */ - -/* ---------------------------------- PPB_CPACR --------------------------------- */ -#define PPB_CPACR_CP10_Pos (20UL) /*!< PPB CPACR: CP10 (Bit 20) */ -#define PPB_CPACR_CP10_Msk (0x300000UL) /*!< PPB CPACR: CP10 (Bitfield-Mask: 0x03) */ -#define PPB_CPACR_CP11_Pos (22UL) /*!< PPB CPACR: CP11 (Bit 22) */ -#define PPB_CPACR_CP11_Msk (0xc00000UL) /*!< PPB CPACR: CP11 (Bitfield-Mask: 0x03) */ - -/* -------------------------------- PPB_MPU_TYPE -------------------------------- */ -#define PPB_MPU_TYPE_SEPARATE_Pos (0UL) /*!< PPB MPU_TYPE: SEPARATE (Bit 0) */ -#define PPB_MPU_TYPE_SEPARATE_Msk (0x1UL) /*!< PPB MPU_TYPE: SEPARATE (Bitfield-Mask: 0x01) */ -#define PPB_MPU_TYPE_DREGION_Pos (8UL) /*!< PPB MPU_TYPE: DREGION (Bit 8) */ -#define PPB_MPU_TYPE_DREGION_Msk (0xff00UL) /*!< PPB MPU_TYPE: DREGION (Bitfield-Mask: 0xff) */ -#define PPB_MPU_TYPE_IREGION_Pos (16UL) /*!< PPB MPU_TYPE: IREGION (Bit 16) */ -#define PPB_MPU_TYPE_IREGION_Msk (0xff0000UL) /*!< PPB MPU_TYPE: IREGION (Bitfield-Mask: 0xff) */ - -/* -------------------------------- PPB_MPU_CTRL -------------------------------- */ -#define PPB_MPU_CTRL_ENABLE_Pos (0UL) /*!< PPB MPU_CTRL: ENABLE (Bit 0) */ -#define PPB_MPU_CTRL_ENABLE_Msk (0x1UL) /*!< PPB MPU_CTRL: ENABLE (Bitfield-Mask: 0x01) */ -#define PPB_MPU_CTRL_HFNMIENA_Pos (1UL) /*!< PPB MPU_CTRL: HFNMIENA (Bit 1) */ -#define PPB_MPU_CTRL_HFNMIENA_Msk (0x2UL) /*!< PPB MPU_CTRL: HFNMIENA (Bitfield-Mask: 0x01) */ -#define PPB_MPU_CTRL_PRIVDEFENA_Pos (2UL) /*!< PPB MPU_CTRL: PRIVDEFENA (Bit 2) */ -#define PPB_MPU_CTRL_PRIVDEFENA_Msk (0x4UL) /*!< PPB MPU_CTRL: PRIVDEFENA (Bitfield-Mask: 0x01) */ - -/* --------------------------------- PPB_MPU_RNR -------------------------------- */ -#define PPB_MPU_RNR_REGION_Pos (0UL) /*!< PPB MPU_RNR: REGION (Bit 0) */ -#define PPB_MPU_RNR_REGION_Msk (0xffUL) /*!< PPB MPU_RNR: REGION (Bitfield-Mask: 0xff) */ - -/* -------------------------------- PPB_MPU_RBAR -------------------------------- */ -#define PPB_MPU_RBAR_REGION_Pos (0UL) /*!< PPB MPU_RBAR: REGION (Bit 0) */ -#define PPB_MPU_RBAR_REGION_Msk (0xfUL) /*!< PPB MPU_RBAR: REGION (Bitfield-Mask: 0x0f) */ -#define PPB_MPU_RBAR_VALID_Pos (4UL) /*!< PPB MPU_RBAR: VALID (Bit 4) */ -#define PPB_MPU_RBAR_VALID_Msk (0x10UL) /*!< PPB MPU_RBAR: VALID (Bitfield-Mask: 0x01) */ -#define PPB_MPU_RBAR_ADDR_Pos (9UL) /*!< PPB MPU_RBAR: ADDR (Bit 9) */ -#define PPB_MPU_RBAR_ADDR_Msk (0xfffffe00UL) /*!< PPB MPU_RBAR: ADDR (Bitfield-Mask: 0x7fffff) */ - -/* -------------------------------- PPB_MPU_RASR -------------------------------- */ -#define PPB_MPU_RASR_ENABLE_Pos (0UL) /*!< PPB MPU_RASR: ENABLE (Bit 0) */ -#define PPB_MPU_RASR_ENABLE_Msk (0x1UL) /*!< PPB MPU_RASR: ENABLE (Bitfield-Mask: 0x01) */ -#define PPB_MPU_RASR_SIZE_Pos (1UL) /*!< PPB MPU_RASR: SIZE (Bit 1) */ -#define PPB_MPU_RASR_SIZE_Msk (0x3eUL) /*!< PPB MPU_RASR: SIZE (Bitfield-Mask: 0x1f) */ -#define PPB_MPU_RASR_SRD_Pos (8UL) /*!< PPB MPU_RASR: SRD (Bit 8) */ -#define PPB_MPU_RASR_SRD_Msk (0xff00UL) /*!< PPB MPU_RASR: SRD (Bitfield-Mask: 0xff) */ -#define PPB_MPU_RASR_B_Pos (16UL) /*!< PPB MPU_RASR: B (Bit 16) */ -#define PPB_MPU_RASR_B_Msk (0x10000UL) /*!< PPB MPU_RASR: B (Bitfield-Mask: 0x01) */ -#define PPB_MPU_RASR_C_Pos (17UL) /*!< PPB MPU_RASR: C (Bit 17) */ -#define PPB_MPU_RASR_C_Msk (0x20000UL) /*!< PPB MPU_RASR: C (Bitfield-Mask: 0x01) */ -#define PPB_MPU_RASR_S_Pos (18UL) /*!< PPB MPU_RASR: S (Bit 18) */ -#define PPB_MPU_RASR_S_Msk (0x40000UL) /*!< PPB MPU_RASR: S (Bitfield-Mask: 0x01) */ -#define PPB_MPU_RASR_TEX_Pos (19UL) /*!< PPB MPU_RASR: TEX (Bit 19) */ -#define PPB_MPU_RASR_TEX_Msk (0x380000UL) /*!< PPB MPU_RASR: TEX (Bitfield-Mask: 0x07) */ -#define PPB_MPU_RASR_AP_Pos (24UL) /*!< PPB MPU_RASR: AP (Bit 24) */ -#define PPB_MPU_RASR_AP_Msk (0x7000000UL) /*!< PPB MPU_RASR: AP (Bitfield-Mask: 0x07) */ -#define PPB_MPU_RASR_XN_Pos (28UL) /*!< PPB MPU_RASR: XN (Bit 28) */ -#define PPB_MPU_RASR_XN_Msk (0x10000000UL) /*!< PPB MPU_RASR: XN (Bitfield-Mask: 0x01) */ - -/* ------------------------------- PPB_MPU_RBAR_A1 ------------------------------ */ -#define PPB_MPU_RBAR_A1_REGION_Pos (0UL) /*!< PPB MPU_RBAR_A1: REGION (Bit 0) */ -#define PPB_MPU_RBAR_A1_REGION_Msk (0xfUL) /*!< PPB MPU_RBAR_A1: REGION (Bitfield-Mask: 0x0f) */ -#define PPB_MPU_RBAR_A1_VALID_Pos (4UL) /*!< PPB MPU_RBAR_A1: VALID (Bit 4) */ -#define PPB_MPU_RBAR_A1_VALID_Msk (0x10UL) /*!< PPB MPU_RBAR_A1: VALID (Bitfield-Mask: 0x01) */ -#define PPB_MPU_RBAR_A1_ADDR_Pos (9UL) /*!< PPB MPU_RBAR_A1: ADDR (Bit 9) */ -#define PPB_MPU_RBAR_A1_ADDR_Msk (0xfffffe00UL) /*!< PPB MPU_RBAR_A1: ADDR (Bitfield-Mask: 0x7fffff) */ - -/* ------------------------------- PPB_MPU_RASR_A1 ------------------------------ */ -#define PPB_MPU_RASR_A1_ENABLE_Pos (0UL) /*!< PPB MPU_RASR_A1: ENABLE (Bit 0) */ -#define PPB_MPU_RASR_A1_ENABLE_Msk (0x1UL) /*!< PPB MPU_RASR_A1: ENABLE (Bitfield-Mask: 0x01) */ -#define PPB_MPU_RASR_A1_SIZE_Pos (1UL) /*!< PPB MPU_RASR_A1: SIZE (Bit 1) */ -#define PPB_MPU_RASR_A1_SIZE_Msk (0x3eUL) /*!< PPB MPU_RASR_A1: SIZE (Bitfield-Mask: 0x1f) */ -#define PPB_MPU_RASR_A1_SRD_Pos (8UL) /*!< PPB MPU_RASR_A1: SRD (Bit 8) */ -#define PPB_MPU_RASR_A1_SRD_Msk (0xff00UL) /*!< PPB MPU_RASR_A1: SRD (Bitfield-Mask: 0xff) */ -#define PPB_MPU_RASR_A1_B_Pos (16UL) /*!< PPB MPU_RASR_A1: B (Bit 16) */ -#define PPB_MPU_RASR_A1_B_Msk (0x10000UL) /*!< PPB MPU_RASR_A1: B (Bitfield-Mask: 0x01) */ -#define PPB_MPU_RASR_A1_C_Pos (17UL) /*!< PPB MPU_RASR_A1: C (Bit 17) */ -#define PPB_MPU_RASR_A1_C_Msk (0x20000UL) /*!< PPB MPU_RASR_A1: C (Bitfield-Mask: 0x01) */ -#define PPB_MPU_RASR_A1_S_Pos (18UL) /*!< PPB MPU_RASR_A1: S (Bit 18) */ -#define PPB_MPU_RASR_A1_S_Msk (0x40000UL) /*!< PPB MPU_RASR_A1: S (Bitfield-Mask: 0x01) */ -#define PPB_MPU_RASR_A1_TEX_Pos (19UL) /*!< PPB MPU_RASR_A1: TEX (Bit 19) */ -#define PPB_MPU_RASR_A1_TEX_Msk (0x380000UL) /*!< PPB MPU_RASR_A1: TEX (Bitfield-Mask: 0x07) */ -#define PPB_MPU_RASR_A1_AP_Pos (24UL) /*!< PPB MPU_RASR_A1: AP (Bit 24) */ -#define PPB_MPU_RASR_A1_AP_Msk (0x7000000UL) /*!< PPB MPU_RASR_A1: AP (Bitfield-Mask: 0x07) */ -#define PPB_MPU_RASR_A1_XN_Pos (28UL) /*!< PPB MPU_RASR_A1: XN (Bit 28) */ -#define PPB_MPU_RASR_A1_XN_Msk (0x10000000UL) /*!< PPB MPU_RASR_A1: XN (Bitfield-Mask: 0x01) */ - -/* ------------------------------- PPB_MPU_RBAR_A2 ------------------------------ */ -#define PPB_MPU_RBAR_A2_REGION_Pos (0UL) /*!< PPB MPU_RBAR_A2: REGION (Bit 0) */ -#define PPB_MPU_RBAR_A2_REGION_Msk (0xfUL) /*!< PPB MPU_RBAR_A2: REGION (Bitfield-Mask: 0x0f) */ -#define PPB_MPU_RBAR_A2_VALID_Pos (4UL) /*!< PPB MPU_RBAR_A2: VALID (Bit 4) */ -#define PPB_MPU_RBAR_A2_VALID_Msk (0x10UL) /*!< PPB MPU_RBAR_A2: VALID (Bitfield-Mask: 0x01) */ -#define PPB_MPU_RBAR_A2_ADDR_Pos (9UL) /*!< PPB MPU_RBAR_A2: ADDR (Bit 9) */ -#define PPB_MPU_RBAR_A2_ADDR_Msk (0xfffffe00UL) /*!< PPB MPU_RBAR_A2: ADDR (Bitfield-Mask: 0x7fffff) */ - -/* ------------------------------- PPB_MPU_RASR_A2 ------------------------------ */ -#define PPB_MPU_RASR_A2_ENABLE_Pos (0UL) /*!< PPB MPU_RASR_A2: ENABLE (Bit 0) */ -#define PPB_MPU_RASR_A2_ENABLE_Msk (0x1UL) /*!< PPB MPU_RASR_A2: ENABLE (Bitfield-Mask: 0x01) */ -#define PPB_MPU_RASR_A2_SIZE_Pos (1UL) /*!< PPB MPU_RASR_A2: SIZE (Bit 1) */ -#define PPB_MPU_RASR_A2_SIZE_Msk (0x3eUL) /*!< PPB MPU_RASR_A2: SIZE (Bitfield-Mask: 0x1f) */ -#define PPB_MPU_RASR_A2_SRD_Pos (8UL) /*!< PPB MPU_RASR_A2: SRD (Bit 8) */ -#define PPB_MPU_RASR_A2_SRD_Msk (0xff00UL) /*!< PPB MPU_RASR_A2: SRD (Bitfield-Mask: 0xff) */ -#define PPB_MPU_RASR_A2_B_Pos (16UL) /*!< PPB MPU_RASR_A2: B (Bit 16) */ -#define PPB_MPU_RASR_A2_B_Msk (0x10000UL) /*!< PPB MPU_RASR_A2: B (Bitfield-Mask: 0x01) */ -#define PPB_MPU_RASR_A2_C_Pos (17UL) /*!< PPB MPU_RASR_A2: C (Bit 17) */ -#define PPB_MPU_RASR_A2_C_Msk (0x20000UL) /*!< PPB MPU_RASR_A2: C (Bitfield-Mask: 0x01) */ -#define PPB_MPU_RASR_A2_S_Pos (18UL) /*!< PPB MPU_RASR_A2: S (Bit 18) */ -#define PPB_MPU_RASR_A2_S_Msk (0x40000UL) /*!< PPB MPU_RASR_A2: S (Bitfield-Mask: 0x01) */ -#define PPB_MPU_RASR_A2_TEX_Pos (19UL) /*!< PPB MPU_RASR_A2: TEX (Bit 19) */ -#define PPB_MPU_RASR_A2_TEX_Msk (0x380000UL) /*!< PPB MPU_RASR_A2: TEX (Bitfield-Mask: 0x07) */ -#define PPB_MPU_RASR_A2_AP_Pos (24UL) /*!< PPB MPU_RASR_A2: AP (Bit 24) */ -#define PPB_MPU_RASR_A2_AP_Msk (0x7000000UL) /*!< PPB MPU_RASR_A2: AP (Bitfield-Mask: 0x07) */ -#define PPB_MPU_RASR_A2_XN_Pos (28UL) /*!< PPB MPU_RASR_A2: XN (Bit 28) */ -#define PPB_MPU_RASR_A2_XN_Msk (0x10000000UL) /*!< PPB MPU_RASR_A2: XN (Bitfield-Mask: 0x01) */ - -/* ------------------------------- PPB_MPU_RBAR_A3 ------------------------------ */ -#define PPB_MPU_RBAR_A3_REGION_Pos (0UL) /*!< PPB MPU_RBAR_A3: REGION (Bit 0) */ -#define PPB_MPU_RBAR_A3_REGION_Msk (0xfUL) /*!< PPB MPU_RBAR_A3: REGION (Bitfield-Mask: 0x0f) */ -#define PPB_MPU_RBAR_A3_VALID_Pos (4UL) /*!< PPB MPU_RBAR_A3: VALID (Bit 4) */ -#define PPB_MPU_RBAR_A3_VALID_Msk (0x10UL) /*!< PPB MPU_RBAR_A3: VALID (Bitfield-Mask: 0x01) */ -#define PPB_MPU_RBAR_A3_ADDR_Pos (9UL) /*!< PPB MPU_RBAR_A3: ADDR (Bit 9) */ -#define PPB_MPU_RBAR_A3_ADDR_Msk (0xfffffe00UL) /*!< PPB MPU_RBAR_A3: ADDR (Bitfield-Mask: 0x7fffff) */ - -/* ------------------------------- PPB_MPU_RASR_A3 ------------------------------ */ -#define PPB_MPU_RASR_A3_ENABLE_Pos (0UL) /*!< PPB MPU_RASR_A3: ENABLE (Bit 0) */ -#define PPB_MPU_RASR_A3_ENABLE_Msk (0x1UL) /*!< PPB MPU_RASR_A3: ENABLE (Bitfield-Mask: 0x01) */ -#define PPB_MPU_RASR_A3_SIZE_Pos (1UL) /*!< PPB MPU_RASR_A3: SIZE (Bit 1) */ -#define PPB_MPU_RASR_A3_SIZE_Msk (0x3eUL) /*!< PPB MPU_RASR_A3: SIZE (Bitfield-Mask: 0x1f) */ -#define PPB_MPU_RASR_A3_SRD_Pos (8UL) /*!< PPB MPU_RASR_A3: SRD (Bit 8) */ -#define PPB_MPU_RASR_A3_SRD_Msk (0xff00UL) /*!< PPB MPU_RASR_A3: SRD (Bitfield-Mask: 0xff) */ -#define PPB_MPU_RASR_A3_B_Pos (16UL) /*!< PPB MPU_RASR_A3: B (Bit 16) */ -#define PPB_MPU_RASR_A3_B_Msk (0x10000UL) /*!< PPB MPU_RASR_A3: B (Bitfield-Mask: 0x01) */ -#define PPB_MPU_RASR_A3_C_Pos (17UL) /*!< PPB MPU_RASR_A3: C (Bit 17) */ -#define PPB_MPU_RASR_A3_C_Msk (0x20000UL) /*!< PPB MPU_RASR_A3: C (Bitfield-Mask: 0x01) */ -#define PPB_MPU_RASR_A3_S_Pos (18UL) /*!< PPB MPU_RASR_A3: S (Bit 18) */ -#define PPB_MPU_RASR_A3_S_Msk (0x40000UL) /*!< PPB MPU_RASR_A3: S (Bitfield-Mask: 0x01) */ -#define PPB_MPU_RASR_A3_TEX_Pos (19UL) /*!< PPB MPU_RASR_A3: TEX (Bit 19) */ -#define PPB_MPU_RASR_A3_TEX_Msk (0x380000UL) /*!< PPB MPU_RASR_A3: TEX (Bitfield-Mask: 0x07) */ -#define PPB_MPU_RASR_A3_AP_Pos (24UL) /*!< PPB MPU_RASR_A3: AP (Bit 24) */ -#define PPB_MPU_RASR_A3_AP_Msk (0x7000000UL) /*!< PPB MPU_RASR_A3: AP (Bitfield-Mask: 0x07) */ -#define PPB_MPU_RASR_A3_XN_Pos (28UL) /*!< PPB MPU_RASR_A3: XN (Bit 28) */ -#define PPB_MPU_RASR_A3_XN_Msk (0x10000000UL) /*!< PPB MPU_RASR_A3: XN (Bitfield-Mask: 0x01) */ - -/* ---------------------------------- PPB_STIR ---------------------------------- */ -#define PPB_STIR_INTID_Pos (0UL) /*!< PPB STIR: INTID (Bit 0) */ -#define PPB_STIR_INTID_Msk (0x1ffUL) /*!< PPB STIR: INTID (Bitfield-Mask: 0x1ff) */ - -/* ---------------------------------- PPB_FPCCR --------------------------------- */ -#define PPB_FPCCR_LSPACT_Pos (0UL) /*!< PPB FPCCR: LSPACT (Bit 0) */ -#define PPB_FPCCR_LSPACT_Msk (0x1UL) /*!< PPB FPCCR: LSPACT (Bitfield-Mask: 0x01) */ -#define PPB_FPCCR_USER_Pos (1UL) /*!< PPB FPCCR: USER (Bit 1) */ -#define PPB_FPCCR_USER_Msk (0x2UL) /*!< PPB FPCCR: USER (Bitfield-Mask: 0x01) */ -#define PPB_FPCCR_THREAD_Pos (3UL) /*!< PPB FPCCR: THREAD (Bit 3) */ -#define PPB_FPCCR_THREAD_Msk (0x8UL) /*!< PPB FPCCR: THREAD (Bitfield-Mask: 0x01) */ -#define PPB_FPCCR_HFRDY_Pos (4UL) /*!< PPB FPCCR: HFRDY (Bit 4) */ -#define PPB_FPCCR_HFRDY_Msk (0x10UL) /*!< PPB FPCCR: HFRDY (Bitfield-Mask: 0x01) */ -#define PPB_FPCCR_MMRDY_Pos (5UL) /*!< PPB FPCCR: MMRDY (Bit 5) */ -#define PPB_FPCCR_MMRDY_Msk (0x20UL) /*!< PPB FPCCR: MMRDY (Bitfield-Mask: 0x01) */ -#define PPB_FPCCR_BFRDY_Pos (6UL) /*!< PPB FPCCR: BFRDY (Bit 6) */ -#define PPB_FPCCR_BFRDY_Msk (0x40UL) /*!< PPB FPCCR: BFRDY (Bitfield-Mask: 0x01) */ -#define PPB_FPCCR_MONRDY_Pos (8UL) /*!< PPB FPCCR: MONRDY (Bit 8) */ -#define PPB_FPCCR_MONRDY_Msk (0x100UL) /*!< PPB FPCCR: MONRDY (Bitfield-Mask: 0x01) */ -#define PPB_FPCCR_LSPEN_Pos (30UL) /*!< PPB FPCCR: LSPEN (Bit 30) */ -#define PPB_FPCCR_LSPEN_Msk (0x40000000UL) /*!< PPB FPCCR: LSPEN (Bitfield-Mask: 0x01) */ -#define PPB_FPCCR_ASPEN_Pos (31UL) /*!< PPB FPCCR: ASPEN (Bit 31) */ -#define PPB_FPCCR_ASPEN_Msk (0x80000000UL) /*!< PPB FPCCR: ASPEN (Bitfield-Mask: 0x01) */ - -/* ---------------------------------- PPB_FPCAR --------------------------------- */ -#define PPB_FPCAR_ADDRESS_Pos (3UL) /*!< PPB FPCAR: ADDRESS (Bit 3) */ -#define PPB_FPCAR_ADDRESS_Msk (0xfffffff8UL) /*!< PPB FPCAR: ADDRESS (Bitfield-Mask: 0x1fffffff) */ - -/* --------------------------------- PPB_FPDSCR --------------------------------- */ -#define PPB_FPDSCR_RMode_Pos (22UL) /*!< PPB FPDSCR: RMode (Bit 22) */ -#define PPB_FPDSCR_RMode_Msk (0xc00000UL) /*!< PPB FPDSCR: RMode (Bitfield-Mask: 0x03) */ -#define PPB_FPDSCR_FZ_Pos (24UL) /*!< PPB FPDSCR: FZ (Bit 24) */ -#define PPB_FPDSCR_FZ_Msk (0x1000000UL) /*!< PPB FPDSCR: FZ (Bitfield-Mask: 0x01) */ -#define PPB_FPDSCR_DN_Pos (25UL) /*!< PPB FPDSCR: DN (Bit 25) */ -#define PPB_FPDSCR_DN_Msk (0x2000000UL) /*!< PPB FPDSCR: DN (Bitfield-Mask: 0x01) */ -#define PPB_FPDSCR_AHP_Pos (26UL) /*!< PPB FPDSCR: AHP (Bit 26) */ -#define PPB_FPDSCR_AHP_Msk (0x4000000UL) /*!< PPB FPDSCR: AHP (Bitfield-Mask: 0x01) */ - - -/* ================================================================================ */ -/* ================ struct 'DLR' Position & Mask ================ */ -/* ================================================================================ */ - - -/* --------------------------------- DLR_OVRSTAT -------------------------------- */ -#define DLR_OVRSTAT_LN0_Pos (0UL) /*!< DLR OVRSTAT: LN0 (Bit 0) */ -#define DLR_OVRSTAT_LN0_Msk (0x1UL) /*!< DLR OVRSTAT: LN0 (Bitfield-Mask: 0x01) */ -#define DLR_OVRSTAT_LN1_Pos (1UL) /*!< DLR OVRSTAT: LN1 (Bit 1) */ -#define DLR_OVRSTAT_LN1_Msk (0x2UL) /*!< DLR OVRSTAT: LN1 (Bitfield-Mask: 0x01) */ -#define DLR_OVRSTAT_LN2_Pos (2UL) /*!< DLR OVRSTAT: LN2 (Bit 2) */ -#define DLR_OVRSTAT_LN2_Msk (0x4UL) /*!< DLR OVRSTAT: LN2 (Bitfield-Mask: 0x01) */ -#define DLR_OVRSTAT_LN3_Pos (3UL) /*!< DLR OVRSTAT: LN3 (Bit 3) */ -#define DLR_OVRSTAT_LN3_Msk (0x8UL) /*!< DLR OVRSTAT: LN3 (Bitfield-Mask: 0x01) */ -#define DLR_OVRSTAT_LN4_Pos (4UL) /*!< DLR OVRSTAT: LN4 (Bit 4) */ -#define DLR_OVRSTAT_LN4_Msk (0x10UL) /*!< DLR OVRSTAT: LN4 (Bitfield-Mask: 0x01) */ -#define DLR_OVRSTAT_LN5_Pos (5UL) /*!< DLR OVRSTAT: LN5 (Bit 5) */ -#define DLR_OVRSTAT_LN5_Msk (0x20UL) /*!< DLR OVRSTAT: LN5 (Bitfield-Mask: 0x01) */ -#define DLR_OVRSTAT_LN6_Pos (6UL) /*!< DLR OVRSTAT: LN6 (Bit 6) */ -#define DLR_OVRSTAT_LN6_Msk (0x40UL) /*!< DLR OVRSTAT: LN6 (Bitfield-Mask: 0x01) */ -#define DLR_OVRSTAT_LN7_Pos (7UL) /*!< DLR OVRSTAT: LN7 (Bit 7) */ -#define DLR_OVRSTAT_LN7_Msk (0x80UL) /*!< DLR OVRSTAT: LN7 (Bitfield-Mask: 0x01) */ -#define DLR_OVRSTAT_LN8_Pos (8UL) /*!< DLR OVRSTAT: LN8 (Bit 8) */ -#define DLR_OVRSTAT_LN8_Msk (0x100UL) /*!< DLR OVRSTAT: LN8 (Bitfield-Mask: 0x01) */ -#define DLR_OVRSTAT_LN9_Pos (9UL) /*!< DLR OVRSTAT: LN9 (Bit 9) */ -#define DLR_OVRSTAT_LN9_Msk (0x200UL) /*!< DLR OVRSTAT: LN9 (Bitfield-Mask: 0x01) */ -#define DLR_OVRSTAT_LN10_Pos (10UL) /*!< DLR OVRSTAT: LN10 (Bit 10) */ -#define DLR_OVRSTAT_LN10_Msk (0x400UL) /*!< DLR OVRSTAT: LN10 (Bitfield-Mask: 0x01) */ -#define DLR_OVRSTAT_LN11_Pos (11UL) /*!< DLR OVRSTAT: LN11 (Bit 11) */ -#define DLR_OVRSTAT_LN11_Msk (0x800UL) /*!< DLR OVRSTAT: LN11 (Bitfield-Mask: 0x01) */ - -/* --------------------------------- DLR_OVRCLR --------------------------------- */ -#define DLR_OVRCLR_LN0_Pos (0UL) /*!< DLR OVRCLR: LN0 (Bit 0) */ -#define DLR_OVRCLR_LN0_Msk (0x1UL) /*!< DLR OVRCLR: LN0 (Bitfield-Mask: 0x01) */ -#define DLR_OVRCLR_LN1_Pos (1UL) /*!< DLR OVRCLR: LN1 (Bit 1) */ -#define DLR_OVRCLR_LN1_Msk (0x2UL) /*!< DLR OVRCLR: LN1 (Bitfield-Mask: 0x01) */ -#define DLR_OVRCLR_LN2_Pos (2UL) /*!< DLR OVRCLR: LN2 (Bit 2) */ -#define DLR_OVRCLR_LN2_Msk (0x4UL) /*!< DLR OVRCLR: LN2 (Bitfield-Mask: 0x01) */ -#define DLR_OVRCLR_LN3_Pos (3UL) /*!< DLR OVRCLR: LN3 (Bit 3) */ -#define DLR_OVRCLR_LN3_Msk (0x8UL) /*!< DLR OVRCLR: LN3 (Bitfield-Mask: 0x01) */ -#define DLR_OVRCLR_LN4_Pos (4UL) /*!< DLR OVRCLR: LN4 (Bit 4) */ -#define DLR_OVRCLR_LN4_Msk (0x10UL) /*!< DLR OVRCLR: LN4 (Bitfield-Mask: 0x01) */ -#define DLR_OVRCLR_LN5_Pos (5UL) /*!< DLR OVRCLR: LN5 (Bit 5) */ -#define DLR_OVRCLR_LN5_Msk (0x20UL) /*!< DLR OVRCLR: LN5 (Bitfield-Mask: 0x01) */ -#define DLR_OVRCLR_LN6_Pos (6UL) /*!< DLR OVRCLR: LN6 (Bit 6) */ -#define DLR_OVRCLR_LN6_Msk (0x40UL) /*!< DLR OVRCLR: LN6 (Bitfield-Mask: 0x01) */ -#define DLR_OVRCLR_LN7_Pos (7UL) /*!< DLR OVRCLR: LN7 (Bit 7) */ -#define DLR_OVRCLR_LN7_Msk (0x80UL) /*!< DLR OVRCLR: LN7 (Bitfield-Mask: 0x01) */ -#define DLR_OVRCLR_LN8_Pos (8UL) /*!< DLR OVRCLR: LN8 (Bit 8) */ -#define DLR_OVRCLR_LN8_Msk (0x100UL) /*!< DLR OVRCLR: LN8 (Bitfield-Mask: 0x01) */ -#define DLR_OVRCLR_LN9_Pos (9UL) /*!< DLR OVRCLR: LN9 (Bit 9) */ -#define DLR_OVRCLR_LN9_Msk (0x200UL) /*!< DLR OVRCLR: LN9 (Bitfield-Mask: 0x01) */ -#define DLR_OVRCLR_LN10_Pos (10UL) /*!< DLR OVRCLR: LN10 (Bit 10) */ -#define DLR_OVRCLR_LN10_Msk (0x400UL) /*!< DLR OVRCLR: LN10 (Bitfield-Mask: 0x01) */ -#define DLR_OVRCLR_LN11_Pos (11UL) /*!< DLR OVRCLR: LN11 (Bit 11) */ -#define DLR_OVRCLR_LN11_Msk (0x800UL) /*!< DLR OVRCLR: LN11 (Bitfield-Mask: 0x01) */ - -/* --------------------------------- DLR_SRSEL0 --------------------------------- */ -#define DLR_SRSEL0_RS0_Pos (0UL) /*!< DLR SRSEL0: RS0 (Bit 0) */ -#define DLR_SRSEL0_RS0_Msk (0xfUL) /*!< DLR SRSEL0: RS0 (Bitfield-Mask: 0x0f) */ -#define DLR_SRSEL0_RS1_Pos (4UL) /*!< DLR SRSEL0: RS1 (Bit 4) */ -#define DLR_SRSEL0_RS1_Msk (0xf0UL) /*!< DLR SRSEL0: RS1 (Bitfield-Mask: 0x0f) */ -#define DLR_SRSEL0_RS2_Pos (8UL) /*!< DLR SRSEL0: RS2 (Bit 8) */ -#define DLR_SRSEL0_RS2_Msk (0xf00UL) /*!< DLR SRSEL0: RS2 (Bitfield-Mask: 0x0f) */ -#define DLR_SRSEL0_RS3_Pos (12UL) /*!< DLR SRSEL0: RS3 (Bit 12) */ -#define DLR_SRSEL0_RS3_Msk (0xf000UL) /*!< DLR SRSEL0: RS3 (Bitfield-Mask: 0x0f) */ -#define DLR_SRSEL0_RS4_Pos (16UL) /*!< DLR SRSEL0: RS4 (Bit 16) */ -#define DLR_SRSEL0_RS4_Msk (0xf0000UL) /*!< DLR SRSEL0: RS4 (Bitfield-Mask: 0x0f) */ -#define DLR_SRSEL0_RS5_Pos (20UL) /*!< DLR SRSEL0: RS5 (Bit 20) */ -#define DLR_SRSEL0_RS5_Msk (0xf00000UL) /*!< DLR SRSEL0: RS5 (Bitfield-Mask: 0x0f) */ -#define DLR_SRSEL0_RS6_Pos (24UL) /*!< DLR SRSEL0: RS6 (Bit 24) */ -#define DLR_SRSEL0_RS6_Msk (0xf000000UL) /*!< DLR SRSEL0: RS6 (Bitfield-Mask: 0x0f) */ -#define DLR_SRSEL0_RS7_Pos (28UL) /*!< DLR SRSEL0: RS7 (Bit 28) */ -#define DLR_SRSEL0_RS7_Msk (0xf0000000UL) /*!< DLR SRSEL0: RS7 (Bitfield-Mask: 0x0f) */ - -/* --------------------------------- DLR_SRSEL1 --------------------------------- */ -#define DLR_SRSEL1_RS8_Pos (0UL) /*!< DLR SRSEL1: RS8 (Bit 0) */ -#define DLR_SRSEL1_RS8_Msk (0xfUL) /*!< DLR SRSEL1: RS8 (Bitfield-Mask: 0x0f) */ -#define DLR_SRSEL1_RS9_Pos (4UL) /*!< DLR SRSEL1: RS9 (Bit 4) */ -#define DLR_SRSEL1_RS9_Msk (0xf0UL) /*!< DLR SRSEL1: RS9 (Bitfield-Mask: 0x0f) */ -#define DLR_SRSEL1_RS10_Pos (8UL) /*!< DLR SRSEL1: RS10 (Bit 8) */ -#define DLR_SRSEL1_RS10_Msk (0xf00UL) /*!< DLR SRSEL1: RS10 (Bitfield-Mask: 0x0f) */ -#define DLR_SRSEL1_RS11_Pos (12UL) /*!< DLR SRSEL1: RS11 (Bit 12) */ -#define DLR_SRSEL1_RS11_Msk (0xf000UL) /*!< DLR SRSEL1: RS11 (Bitfield-Mask: 0x0f) */ - -/* ---------------------------------- DLR_LNEN ---------------------------------- */ -#define DLR_LNEN_LN0_Pos (0UL) /*!< DLR LNEN: LN0 (Bit 0) */ -#define DLR_LNEN_LN0_Msk (0x1UL) /*!< DLR LNEN: LN0 (Bitfield-Mask: 0x01) */ -#define DLR_LNEN_LN1_Pos (1UL) /*!< DLR LNEN: LN1 (Bit 1) */ -#define DLR_LNEN_LN1_Msk (0x2UL) /*!< DLR LNEN: LN1 (Bitfield-Mask: 0x01) */ -#define DLR_LNEN_LN2_Pos (2UL) /*!< DLR LNEN: LN2 (Bit 2) */ -#define DLR_LNEN_LN2_Msk (0x4UL) /*!< DLR LNEN: LN2 (Bitfield-Mask: 0x01) */ -#define DLR_LNEN_LN3_Pos (3UL) /*!< DLR LNEN: LN3 (Bit 3) */ -#define DLR_LNEN_LN3_Msk (0x8UL) /*!< DLR LNEN: LN3 (Bitfield-Mask: 0x01) */ -#define DLR_LNEN_LN4_Pos (4UL) /*!< DLR LNEN: LN4 (Bit 4) */ -#define DLR_LNEN_LN4_Msk (0x10UL) /*!< DLR LNEN: LN4 (Bitfield-Mask: 0x01) */ -#define DLR_LNEN_LN5_Pos (5UL) /*!< DLR LNEN: LN5 (Bit 5) */ -#define DLR_LNEN_LN5_Msk (0x20UL) /*!< DLR LNEN: LN5 (Bitfield-Mask: 0x01) */ -#define DLR_LNEN_LN6_Pos (6UL) /*!< DLR LNEN: LN6 (Bit 6) */ -#define DLR_LNEN_LN6_Msk (0x40UL) /*!< DLR LNEN: LN6 (Bitfield-Mask: 0x01) */ -#define DLR_LNEN_LN7_Pos (7UL) /*!< DLR LNEN: LN7 (Bit 7) */ -#define DLR_LNEN_LN7_Msk (0x80UL) /*!< DLR LNEN: LN7 (Bitfield-Mask: 0x01) */ -#define DLR_LNEN_LN8_Pos (8UL) /*!< DLR LNEN: LN8 (Bit 8) */ -#define DLR_LNEN_LN8_Msk (0x100UL) /*!< DLR LNEN: LN8 (Bitfield-Mask: 0x01) */ -#define DLR_LNEN_LN9_Pos (9UL) /*!< DLR LNEN: LN9 (Bit 9) */ -#define DLR_LNEN_LN9_Msk (0x200UL) /*!< DLR LNEN: LN9 (Bitfield-Mask: 0x01) */ -#define DLR_LNEN_LN10_Pos (10UL) /*!< DLR LNEN: LN10 (Bit 10) */ -#define DLR_LNEN_LN10_Msk (0x400UL) /*!< DLR LNEN: LN10 (Bitfield-Mask: 0x01) */ -#define DLR_LNEN_LN11_Pos (11UL) /*!< DLR LNEN: LN11 (Bit 11) */ -#define DLR_LNEN_LN11_Msk (0x800UL) /*!< DLR LNEN: LN11 (Bitfield-Mask: 0x01) */ - - -/* ================================================================================ */ -/* ================ Group 'ERU' Position & Mask ================ */ -/* ================================================================================ */ - - -/* --------------------------------- ERU_EXISEL --------------------------------- */ -#define ERU_EXISEL_EXS0A_Pos (0UL) /*!< ERU EXISEL: EXS0A (Bit 0) */ -#define ERU_EXISEL_EXS0A_Msk (0x3UL) /*!< ERU EXISEL: EXS0A (Bitfield-Mask: 0x03) */ -#define ERU_EXISEL_EXS0B_Pos (2UL) /*!< ERU EXISEL: EXS0B (Bit 2) */ -#define ERU_EXISEL_EXS0B_Msk (0xcUL) /*!< ERU EXISEL: EXS0B (Bitfield-Mask: 0x03) */ -#define ERU_EXISEL_EXS1A_Pos (4UL) /*!< ERU EXISEL: EXS1A (Bit 4) */ -#define ERU_EXISEL_EXS1A_Msk (0x30UL) /*!< ERU EXISEL: EXS1A (Bitfield-Mask: 0x03) */ -#define ERU_EXISEL_EXS1B_Pos (6UL) /*!< ERU EXISEL: EXS1B (Bit 6) */ -#define ERU_EXISEL_EXS1B_Msk (0xc0UL) /*!< ERU EXISEL: EXS1B (Bitfield-Mask: 0x03) */ -#define ERU_EXISEL_EXS2A_Pos (8UL) /*!< ERU EXISEL: EXS2A (Bit 8) */ -#define ERU_EXISEL_EXS2A_Msk (0x300UL) /*!< ERU EXISEL: EXS2A (Bitfield-Mask: 0x03) */ -#define ERU_EXISEL_EXS2B_Pos (10UL) /*!< ERU EXISEL: EXS2B (Bit 10) */ -#define ERU_EXISEL_EXS2B_Msk (0xc00UL) /*!< ERU EXISEL: EXS2B (Bitfield-Mask: 0x03) */ -#define ERU_EXISEL_EXS3A_Pos (12UL) /*!< ERU EXISEL: EXS3A (Bit 12) */ -#define ERU_EXISEL_EXS3A_Msk (0x3000UL) /*!< ERU EXISEL: EXS3A (Bitfield-Mask: 0x03) */ -#define ERU_EXISEL_EXS3B_Pos (14UL) /*!< ERU EXISEL: EXS3B (Bit 14) */ -#define ERU_EXISEL_EXS3B_Msk (0xc000UL) /*!< ERU EXISEL: EXS3B (Bitfield-Mask: 0x03) */ - -/* --------------------------------- ERU_EXICON --------------------------------- */ -#define ERU_EXICON_PE_Pos (0UL) /*!< ERU EXICON: PE (Bit 0) */ -#define ERU_EXICON_PE_Msk (0x1UL) /*!< ERU EXICON: PE (Bitfield-Mask: 0x01) */ -#define ERU_EXICON_LD_Pos (1UL) /*!< ERU EXICON: LD (Bit 1) */ -#define ERU_EXICON_LD_Msk (0x2UL) /*!< ERU EXICON: LD (Bitfield-Mask: 0x01) */ -#define ERU_EXICON_RE_Pos (2UL) /*!< ERU EXICON: RE (Bit 2) */ -#define ERU_EXICON_RE_Msk (0x4UL) /*!< ERU EXICON: RE (Bitfield-Mask: 0x01) */ -#define ERU_EXICON_FE_Pos (3UL) /*!< ERU EXICON: FE (Bit 3) */ -#define ERU_EXICON_FE_Msk (0x8UL) /*!< ERU EXICON: FE (Bitfield-Mask: 0x01) */ -#define ERU_EXICON_OCS_Pos (4UL) /*!< ERU EXICON: OCS (Bit 4) */ -#define ERU_EXICON_OCS_Msk (0x70UL) /*!< ERU EXICON: OCS (Bitfield-Mask: 0x07) */ -#define ERU_EXICON_FL_Pos (7UL) /*!< ERU EXICON: FL (Bit 7) */ -#define ERU_EXICON_FL_Msk (0x80UL) /*!< ERU EXICON: FL (Bitfield-Mask: 0x01) */ -#define ERU_EXICON_SS_Pos (8UL) /*!< ERU EXICON: SS (Bit 8) */ -#define ERU_EXICON_SS_Msk (0x300UL) /*!< ERU EXICON: SS (Bitfield-Mask: 0x03) */ -#define ERU_EXICON_NA_Pos (10UL) /*!< ERU EXICON: NA (Bit 10) */ -#define ERU_EXICON_NA_Msk (0x400UL) /*!< ERU EXICON: NA (Bitfield-Mask: 0x01) */ -#define ERU_EXICON_NB_Pos (11UL) /*!< ERU EXICON: NB (Bit 11) */ -#define ERU_EXICON_NB_Msk (0x800UL) /*!< ERU EXICON: NB (Bitfield-Mask: 0x01) */ - -/* --------------------------------- ERU_EXOCON --------------------------------- */ -#define ERU_EXOCON_ISS_Pos (0UL) /*!< ERU EXOCON: ISS (Bit 0) */ -#define ERU_EXOCON_ISS_Msk (0x3UL) /*!< ERU EXOCON: ISS (Bitfield-Mask: 0x03) */ -#define ERU_EXOCON_GEEN_Pos (2UL) /*!< ERU EXOCON: GEEN (Bit 2) */ -#define ERU_EXOCON_GEEN_Msk (0x4UL) /*!< ERU EXOCON: GEEN (Bitfield-Mask: 0x01) */ -#define ERU_EXOCON_PDR_Pos (3UL) /*!< ERU EXOCON: PDR (Bit 3) */ -#define ERU_EXOCON_PDR_Msk (0x8UL) /*!< ERU EXOCON: PDR (Bitfield-Mask: 0x01) */ -#define ERU_EXOCON_GP_Pos (4UL) /*!< ERU EXOCON: GP (Bit 4) */ -#define ERU_EXOCON_GP_Msk (0x30UL) /*!< ERU EXOCON: GP (Bitfield-Mask: 0x03) */ -#define ERU_EXOCON_IPEN0_Pos (12UL) /*!< ERU EXOCON: IPEN0 (Bit 12) */ -#define ERU_EXOCON_IPEN0_Msk (0x1000UL) /*!< ERU EXOCON: IPEN0 (Bitfield-Mask: 0x01) */ -#define ERU_EXOCON_IPEN1_Pos (13UL) /*!< ERU EXOCON: IPEN1 (Bit 13) */ -#define ERU_EXOCON_IPEN1_Msk (0x2000UL) /*!< ERU EXOCON: IPEN1 (Bitfield-Mask: 0x01) */ -#define ERU_EXOCON_IPEN2_Pos (14UL) /*!< ERU EXOCON: IPEN2 (Bit 14) */ -#define ERU_EXOCON_IPEN2_Msk (0x4000UL) /*!< ERU EXOCON: IPEN2 (Bitfield-Mask: 0x01) */ -#define ERU_EXOCON_IPEN3_Pos (15UL) /*!< ERU EXOCON: IPEN3 (Bit 15) */ -#define ERU_EXOCON_IPEN3_Msk (0x8000UL) /*!< ERU EXOCON: IPEN3 (Bitfield-Mask: 0x01) */ - - -/* ================================================================================ */ -/* ================ struct 'GPDMA0' Position & Mask ================ */ -/* ================================================================================ */ - - -/* -------------------------------- GPDMA0_RAWTFR ------------------------------- */ -#define GPDMA0_RAWTFR_CH0_Pos (0UL) /*!< GPDMA0 RAWTFR: CH0 (Bit 0) */ -#define GPDMA0_RAWTFR_CH0_Msk (0x1UL) /*!< GPDMA0 RAWTFR: CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA0_RAWTFR_CH1_Pos (1UL) /*!< GPDMA0 RAWTFR: CH1 (Bit 1) */ -#define GPDMA0_RAWTFR_CH1_Msk (0x2UL) /*!< GPDMA0 RAWTFR: CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA0_RAWTFR_CH2_Pos (2UL) /*!< GPDMA0 RAWTFR: CH2 (Bit 2) */ -#define GPDMA0_RAWTFR_CH2_Msk (0x4UL) /*!< GPDMA0 RAWTFR: CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA0_RAWTFR_CH3_Pos (3UL) /*!< GPDMA0 RAWTFR: CH3 (Bit 3) */ -#define GPDMA0_RAWTFR_CH3_Msk (0x8UL) /*!< GPDMA0 RAWTFR: CH3 (Bitfield-Mask: 0x01) */ -#define GPDMA0_RAWTFR_CH4_Pos (4UL) /*!< GPDMA0 RAWTFR: CH4 (Bit 4) */ -#define GPDMA0_RAWTFR_CH4_Msk (0x10UL) /*!< GPDMA0 RAWTFR: CH4 (Bitfield-Mask: 0x01) */ -#define GPDMA0_RAWTFR_CH5_Pos (5UL) /*!< GPDMA0 RAWTFR: CH5 (Bit 5) */ -#define GPDMA0_RAWTFR_CH5_Msk (0x20UL) /*!< GPDMA0 RAWTFR: CH5 (Bitfield-Mask: 0x01) */ -#define GPDMA0_RAWTFR_CH6_Pos (6UL) /*!< GPDMA0 RAWTFR: CH6 (Bit 6) */ -#define GPDMA0_RAWTFR_CH6_Msk (0x40UL) /*!< GPDMA0 RAWTFR: CH6 (Bitfield-Mask: 0x01) */ -#define GPDMA0_RAWTFR_CH7_Pos (7UL) /*!< GPDMA0 RAWTFR: CH7 (Bit 7) */ -#define GPDMA0_RAWTFR_CH7_Msk (0x80UL) /*!< GPDMA0 RAWTFR: CH7 (Bitfield-Mask: 0x01) */ - -/* ------------------------------- GPDMA0_RAWBLOCK ------------------------------ */ -#define GPDMA0_RAWBLOCK_CH0_Pos (0UL) /*!< GPDMA0 RAWBLOCK: CH0 (Bit 0) */ -#define GPDMA0_RAWBLOCK_CH0_Msk (0x1UL) /*!< GPDMA0 RAWBLOCK: CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA0_RAWBLOCK_CH1_Pos (1UL) /*!< GPDMA0 RAWBLOCK: CH1 (Bit 1) */ -#define GPDMA0_RAWBLOCK_CH1_Msk (0x2UL) /*!< GPDMA0 RAWBLOCK: CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA0_RAWBLOCK_CH2_Pos (2UL) /*!< GPDMA0 RAWBLOCK: CH2 (Bit 2) */ -#define GPDMA0_RAWBLOCK_CH2_Msk (0x4UL) /*!< GPDMA0 RAWBLOCK: CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA0_RAWBLOCK_CH3_Pos (3UL) /*!< GPDMA0 RAWBLOCK: CH3 (Bit 3) */ -#define GPDMA0_RAWBLOCK_CH3_Msk (0x8UL) /*!< GPDMA0 RAWBLOCK: CH3 (Bitfield-Mask: 0x01) */ -#define GPDMA0_RAWBLOCK_CH4_Pos (4UL) /*!< GPDMA0 RAWBLOCK: CH4 (Bit 4) */ -#define GPDMA0_RAWBLOCK_CH4_Msk (0x10UL) /*!< GPDMA0 RAWBLOCK: CH4 (Bitfield-Mask: 0x01) */ -#define GPDMA0_RAWBLOCK_CH5_Pos (5UL) /*!< GPDMA0 RAWBLOCK: CH5 (Bit 5) */ -#define GPDMA0_RAWBLOCK_CH5_Msk (0x20UL) /*!< GPDMA0 RAWBLOCK: CH5 (Bitfield-Mask: 0x01) */ -#define GPDMA0_RAWBLOCK_CH6_Pos (6UL) /*!< GPDMA0 RAWBLOCK: CH6 (Bit 6) */ -#define GPDMA0_RAWBLOCK_CH6_Msk (0x40UL) /*!< GPDMA0 RAWBLOCK: CH6 (Bitfield-Mask: 0x01) */ -#define GPDMA0_RAWBLOCK_CH7_Pos (7UL) /*!< GPDMA0 RAWBLOCK: CH7 (Bit 7) */ -#define GPDMA0_RAWBLOCK_CH7_Msk (0x80UL) /*!< GPDMA0 RAWBLOCK: CH7 (Bitfield-Mask: 0x01) */ - -/* ------------------------------ GPDMA0_RAWSRCTRAN ----------------------------- */ -#define GPDMA0_RAWSRCTRAN_CH0_Pos (0UL) /*!< GPDMA0 RAWSRCTRAN: CH0 (Bit 0) */ -#define GPDMA0_RAWSRCTRAN_CH0_Msk (0x1UL) /*!< GPDMA0 RAWSRCTRAN: CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA0_RAWSRCTRAN_CH1_Pos (1UL) /*!< GPDMA0 RAWSRCTRAN: CH1 (Bit 1) */ -#define GPDMA0_RAWSRCTRAN_CH1_Msk (0x2UL) /*!< GPDMA0 RAWSRCTRAN: CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA0_RAWSRCTRAN_CH2_Pos (2UL) /*!< GPDMA0 RAWSRCTRAN: CH2 (Bit 2) */ -#define GPDMA0_RAWSRCTRAN_CH2_Msk (0x4UL) /*!< GPDMA0 RAWSRCTRAN: CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA0_RAWSRCTRAN_CH3_Pos (3UL) /*!< GPDMA0 RAWSRCTRAN: CH3 (Bit 3) */ -#define GPDMA0_RAWSRCTRAN_CH3_Msk (0x8UL) /*!< GPDMA0 RAWSRCTRAN: CH3 (Bitfield-Mask: 0x01) */ -#define GPDMA0_RAWSRCTRAN_CH4_Pos (4UL) /*!< GPDMA0 RAWSRCTRAN: CH4 (Bit 4) */ -#define GPDMA0_RAWSRCTRAN_CH4_Msk (0x10UL) /*!< GPDMA0 RAWSRCTRAN: CH4 (Bitfield-Mask: 0x01) */ -#define GPDMA0_RAWSRCTRAN_CH5_Pos (5UL) /*!< GPDMA0 RAWSRCTRAN: CH5 (Bit 5) */ -#define GPDMA0_RAWSRCTRAN_CH5_Msk (0x20UL) /*!< GPDMA0 RAWSRCTRAN: CH5 (Bitfield-Mask: 0x01) */ -#define GPDMA0_RAWSRCTRAN_CH6_Pos (6UL) /*!< GPDMA0 RAWSRCTRAN: CH6 (Bit 6) */ -#define GPDMA0_RAWSRCTRAN_CH6_Msk (0x40UL) /*!< GPDMA0 RAWSRCTRAN: CH6 (Bitfield-Mask: 0x01) */ -#define GPDMA0_RAWSRCTRAN_CH7_Pos (7UL) /*!< GPDMA0 RAWSRCTRAN: CH7 (Bit 7) */ -#define GPDMA0_RAWSRCTRAN_CH7_Msk (0x80UL) /*!< GPDMA0 RAWSRCTRAN: CH7 (Bitfield-Mask: 0x01) */ - -/* ------------------------------ GPDMA0_RAWDSTTRAN ----------------------------- */ -#define GPDMA0_RAWDSTTRAN_CH0_Pos (0UL) /*!< GPDMA0 RAWDSTTRAN: CH0 (Bit 0) */ -#define GPDMA0_RAWDSTTRAN_CH0_Msk (0x1UL) /*!< GPDMA0 RAWDSTTRAN: CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA0_RAWDSTTRAN_CH1_Pos (1UL) /*!< GPDMA0 RAWDSTTRAN: CH1 (Bit 1) */ -#define GPDMA0_RAWDSTTRAN_CH1_Msk (0x2UL) /*!< GPDMA0 RAWDSTTRAN: CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA0_RAWDSTTRAN_CH2_Pos (2UL) /*!< GPDMA0 RAWDSTTRAN: CH2 (Bit 2) */ -#define GPDMA0_RAWDSTTRAN_CH2_Msk (0x4UL) /*!< GPDMA0 RAWDSTTRAN: CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA0_RAWDSTTRAN_CH3_Pos (3UL) /*!< GPDMA0 RAWDSTTRAN: CH3 (Bit 3) */ -#define GPDMA0_RAWDSTTRAN_CH3_Msk (0x8UL) /*!< GPDMA0 RAWDSTTRAN: CH3 (Bitfield-Mask: 0x01) */ -#define GPDMA0_RAWDSTTRAN_CH4_Pos (4UL) /*!< GPDMA0 RAWDSTTRAN: CH4 (Bit 4) */ -#define GPDMA0_RAWDSTTRAN_CH4_Msk (0x10UL) /*!< GPDMA0 RAWDSTTRAN: CH4 (Bitfield-Mask: 0x01) */ -#define GPDMA0_RAWDSTTRAN_CH5_Pos (5UL) /*!< GPDMA0 RAWDSTTRAN: CH5 (Bit 5) */ -#define GPDMA0_RAWDSTTRAN_CH5_Msk (0x20UL) /*!< GPDMA0 RAWDSTTRAN: CH5 (Bitfield-Mask: 0x01) */ -#define GPDMA0_RAWDSTTRAN_CH6_Pos (6UL) /*!< GPDMA0 RAWDSTTRAN: CH6 (Bit 6) */ -#define GPDMA0_RAWDSTTRAN_CH6_Msk (0x40UL) /*!< GPDMA0 RAWDSTTRAN: CH6 (Bitfield-Mask: 0x01) */ -#define GPDMA0_RAWDSTTRAN_CH7_Pos (7UL) /*!< GPDMA0 RAWDSTTRAN: CH7 (Bit 7) */ -#define GPDMA0_RAWDSTTRAN_CH7_Msk (0x80UL) /*!< GPDMA0 RAWDSTTRAN: CH7 (Bitfield-Mask: 0x01) */ - -/* -------------------------------- GPDMA0_RAWERR ------------------------------- */ -#define GPDMA0_RAWERR_CH0_Pos (0UL) /*!< GPDMA0 RAWERR: CH0 (Bit 0) */ -#define GPDMA0_RAWERR_CH0_Msk (0x1UL) /*!< GPDMA0 RAWERR: CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA0_RAWERR_CH1_Pos (1UL) /*!< GPDMA0 RAWERR: CH1 (Bit 1) */ -#define GPDMA0_RAWERR_CH1_Msk (0x2UL) /*!< GPDMA0 RAWERR: CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA0_RAWERR_CH2_Pos (2UL) /*!< GPDMA0 RAWERR: CH2 (Bit 2) */ -#define GPDMA0_RAWERR_CH2_Msk (0x4UL) /*!< GPDMA0 RAWERR: CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA0_RAWERR_CH3_Pos (3UL) /*!< GPDMA0 RAWERR: CH3 (Bit 3) */ -#define GPDMA0_RAWERR_CH3_Msk (0x8UL) /*!< GPDMA0 RAWERR: CH3 (Bitfield-Mask: 0x01) */ -#define GPDMA0_RAWERR_CH4_Pos (4UL) /*!< GPDMA0 RAWERR: CH4 (Bit 4) */ -#define GPDMA0_RAWERR_CH4_Msk (0x10UL) /*!< GPDMA0 RAWERR: CH4 (Bitfield-Mask: 0x01) */ -#define GPDMA0_RAWERR_CH5_Pos (5UL) /*!< GPDMA0 RAWERR: CH5 (Bit 5) */ -#define GPDMA0_RAWERR_CH5_Msk (0x20UL) /*!< GPDMA0 RAWERR: CH5 (Bitfield-Mask: 0x01) */ -#define GPDMA0_RAWERR_CH6_Pos (6UL) /*!< GPDMA0 RAWERR: CH6 (Bit 6) */ -#define GPDMA0_RAWERR_CH6_Msk (0x40UL) /*!< GPDMA0 RAWERR: CH6 (Bitfield-Mask: 0x01) */ -#define GPDMA0_RAWERR_CH7_Pos (7UL) /*!< GPDMA0 RAWERR: CH7 (Bit 7) */ -#define GPDMA0_RAWERR_CH7_Msk (0x80UL) /*!< GPDMA0 RAWERR: CH7 (Bitfield-Mask: 0x01) */ - -/* ------------------------------ GPDMA0_STATUSTFR ------------------------------ */ -#define GPDMA0_STATUSTFR_CH0_Pos (0UL) /*!< GPDMA0 STATUSTFR: CH0 (Bit 0) */ -#define GPDMA0_STATUSTFR_CH0_Msk (0x1UL) /*!< GPDMA0 STATUSTFR: CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA0_STATUSTFR_CH1_Pos (1UL) /*!< GPDMA0 STATUSTFR: CH1 (Bit 1) */ -#define GPDMA0_STATUSTFR_CH1_Msk (0x2UL) /*!< GPDMA0 STATUSTFR: CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA0_STATUSTFR_CH2_Pos (2UL) /*!< GPDMA0 STATUSTFR: CH2 (Bit 2) */ -#define GPDMA0_STATUSTFR_CH2_Msk (0x4UL) /*!< GPDMA0 STATUSTFR: CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA0_STATUSTFR_CH3_Pos (3UL) /*!< GPDMA0 STATUSTFR: CH3 (Bit 3) */ -#define GPDMA0_STATUSTFR_CH3_Msk (0x8UL) /*!< GPDMA0 STATUSTFR: CH3 (Bitfield-Mask: 0x01) */ -#define GPDMA0_STATUSTFR_CH4_Pos (4UL) /*!< GPDMA0 STATUSTFR: CH4 (Bit 4) */ -#define GPDMA0_STATUSTFR_CH4_Msk (0x10UL) /*!< GPDMA0 STATUSTFR: CH4 (Bitfield-Mask: 0x01) */ -#define GPDMA0_STATUSTFR_CH5_Pos (5UL) /*!< GPDMA0 STATUSTFR: CH5 (Bit 5) */ -#define GPDMA0_STATUSTFR_CH5_Msk (0x20UL) /*!< GPDMA0 STATUSTFR: CH5 (Bitfield-Mask: 0x01) */ -#define GPDMA0_STATUSTFR_CH6_Pos (6UL) /*!< GPDMA0 STATUSTFR: CH6 (Bit 6) */ -#define GPDMA0_STATUSTFR_CH6_Msk (0x40UL) /*!< GPDMA0 STATUSTFR: CH6 (Bitfield-Mask: 0x01) */ -#define GPDMA0_STATUSTFR_CH7_Pos (7UL) /*!< GPDMA0 STATUSTFR: CH7 (Bit 7) */ -#define GPDMA0_STATUSTFR_CH7_Msk (0x80UL) /*!< GPDMA0 STATUSTFR: CH7 (Bitfield-Mask: 0x01) */ - -/* ----------------------------- GPDMA0_STATUSBLOCK ----------------------------- */ -#define GPDMA0_STATUSBLOCK_CH0_Pos (0UL) /*!< GPDMA0 STATUSBLOCK: CH0 (Bit 0) */ -#define GPDMA0_STATUSBLOCK_CH0_Msk (0x1UL) /*!< GPDMA0 STATUSBLOCK: CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA0_STATUSBLOCK_CH1_Pos (1UL) /*!< GPDMA0 STATUSBLOCK: CH1 (Bit 1) */ -#define GPDMA0_STATUSBLOCK_CH1_Msk (0x2UL) /*!< GPDMA0 STATUSBLOCK: CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA0_STATUSBLOCK_CH2_Pos (2UL) /*!< GPDMA0 STATUSBLOCK: CH2 (Bit 2) */ -#define GPDMA0_STATUSBLOCK_CH2_Msk (0x4UL) /*!< GPDMA0 STATUSBLOCK: CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA0_STATUSBLOCK_CH3_Pos (3UL) /*!< GPDMA0 STATUSBLOCK: CH3 (Bit 3) */ -#define GPDMA0_STATUSBLOCK_CH3_Msk (0x8UL) /*!< GPDMA0 STATUSBLOCK: CH3 (Bitfield-Mask: 0x01) */ -#define GPDMA0_STATUSBLOCK_CH4_Pos (4UL) /*!< GPDMA0 STATUSBLOCK: CH4 (Bit 4) */ -#define GPDMA0_STATUSBLOCK_CH4_Msk (0x10UL) /*!< GPDMA0 STATUSBLOCK: CH4 (Bitfield-Mask: 0x01) */ -#define GPDMA0_STATUSBLOCK_CH5_Pos (5UL) /*!< GPDMA0 STATUSBLOCK: CH5 (Bit 5) */ -#define GPDMA0_STATUSBLOCK_CH5_Msk (0x20UL) /*!< GPDMA0 STATUSBLOCK: CH5 (Bitfield-Mask: 0x01) */ -#define GPDMA0_STATUSBLOCK_CH6_Pos (6UL) /*!< GPDMA0 STATUSBLOCK: CH6 (Bit 6) */ -#define GPDMA0_STATUSBLOCK_CH6_Msk (0x40UL) /*!< GPDMA0 STATUSBLOCK: CH6 (Bitfield-Mask: 0x01) */ -#define GPDMA0_STATUSBLOCK_CH7_Pos (7UL) /*!< GPDMA0 STATUSBLOCK: CH7 (Bit 7) */ -#define GPDMA0_STATUSBLOCK_CH7_Msk (0x80UL) /*!< GPDMA0 STATUSBLOCK: CH7 (Bitfield-Mask: 0x01) */ - -/* ---------------------------- GPDMA0_STATUSSRCTRAN ---------------------------- */ -#define GPDMA0_STATUSSRCTRAN_CH0_Pos (0UL) /*!< GPDMA0 STATUSSRCTRAN: CH0 (Bit 0) */ -#define GPDMA0_STATUSSRCTRAN_CH0_Msk (0x1UL) /*!< GPDMA0 STATUSSRCTRAN: CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA0_STATUSSRCTRAN_CH1_Pos (1UL) /*!< GPDMA0 STATUSSRCTRAN: CH1 (Bit 1) */ -#define GPDMA0_STATUSSRCTRAN_CH1_Msk (0x2UL) /*!< GPDMA0 STATUSSRCTRAN: CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA0_STATUSSRCTRAN_CH2_Pos (2UL) /*!< GPDMA0 STATUSSRCTRAN: CH2 (Bit 2) */ -#define GPDMA0_STATUSSRCTRAN_CH2_Msk (0x4UL) /*!< GPDMA0 STATUSSRCTRAN: CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA0_STATUSSRCTRAN_CH3_Pos (3UL) /*!< GPDMA0 STATUSSRCTRAN: CH3 (Bit 3) */ -#define GPDMA0_STATUSSRCTRAN_CH3_Msk (0x8UL) /*!< GPDMA0 STATUSSRCTRAN: CH3 (Bitfield-Mask: 0x01) */ -#define GPDMA0_STATUSSRCTRAN_CH4_Pos (4UL) /*!< GPDMA0 STATUSSRCTRAN: CH4 (Bit 4) */ -#define GPDMA0_STATUSSRCTRAN_CH4_Msk (0x10UL) /*!< GPDMA0 STATUSSRCTRAN: CH4 (Bitfield-Mask: 0x01) */ -#define GPDMA0_STATUSSRCTRAN_CH5_Pos (5UL) /*!< GPDMA0 STATUSSRCTRAN: CH5 (Bit 5) */ -#define GPDMA0_STATUSSRCTRAN_CH5_Msk (0x20UL) /*!< GPDMA0 STATUSSRCTRAN: CH5 (Bitfield-Mask: 0x01) */ -#define GPDMA0_STATUSSRCTRAN_CH6_Pos (6UL) /*!< GPDMA0 STATUSSRCTRAN: CH6 (Bit 6) */ -#define GPDMA0_STATUSSRCTRAN_CH6_Msk (0x40UL) /*!< GPDMA0 STATUSSRCTRAN: CH6 (Bitfield-Mask: 0x01) */ -#define GPDMA0_STATUSSRCTRAN_CH7_Pos (7UL) /*!< GPDMA0 STATUSSRCTRAN: CH7 (Bit 7) */ -#define GPDMA0_STATUSSRCTRAN_CH7_Msk (0x80UL) /*!< GPDMA0 STATUSSRCTRAN: CH7 (Bitfield-Mask: 0x01) */ - -/* ---------------------------- GPDMA0_STATUSDSTTRAN ---------------------------- */ -#define GPDMA0_STATUSDSTTRAN_CH0_Pos (0UL) /*!< GPDMA0 STATUSDSTTRAN: CH0 (Bit 0) */ -#define GPDMA0_STATUSDSTTRAN_CH0_Msk (0x1UL) /*!< GPDMA0 STATUSDSTTRAN: CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA0_STATUSDSTTRAN_CH1_Pos (1UL) /*!< GPDMA0 STATUSDSTTRAN: CH1 (Bit 1) */ -#define GPDMA0_STATUSDSTTRAN_CH1_Msk (0x2UL) /*!< GPDMA0 STATUSDSTTRAN: CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA0_STATUSDSTTRAN_CH2_Pos (2UL) /*!< GPDMA0 STATUSDSTTRAN: CH2 (Bit 2) */ -#define GPDMA0_STATUSDSTTRAN_CH2_Msk (0x4UL) /*!< GPDMA0 STATUSDSTTRAN: CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA0_STATUSDSTTRAN_CH3_Pos (3UL) /*!< GPDMA0 STATUSDSTTRAN: CH3 (Bit 3) */ -#define GPDMA0_STATUSDSTTRAN_CH3_Msk (0x8UL) /*!< GPDMA0 STATUSDSTTRAN: CH3 (Bitfield-Mask: 0x01) */ -#define GPDMA0_STATUSDSTTRAN_CH4_Pos (4UL) /*!< GPDMA0 STATUSDSTTRAN: CH4 (Bit 4) */ -#define GPDMA0_STATUSDSTTRAN_CH4_Msk (0x10UL) /*!< GPDMA0 STATUSDSTTRAN: CH4 (Bitfield-Mask: 0x01) */ -#define GPDMA0_STATUSDSTTRAN_CH5_Pos (5UL) /*!< GPDMA0 STATUSDSTTRAN: CH5 (Bit 5) */ -#define GPDMA0_STATUSDSTTRAN_CH5_Msk (0x20UL) /*!< GPDMA0 STATUSDSTTRAN: CH5 (Bitfield-Mask: 0x01) */ -#define GPDMA0_STATUSDSTTRAN_CH6_Pos (6UL) /*!< GPDMA0 STATUSDSTTRAN: CH6 (Bit 6) */ -#define GPDMA0_STATUSDSTTRAN_CH6_Msk (0x40UL) /*!< GPDMA0 STATUSDSTTRAN: CH6 (Bitfield-Mask: 0x01) */ -#define GPDMA0_STATUSDSTTRAN_CH7_Pos (7UL) /*!< GPDMA0 STATUSDSTTRAN: CH7 (Bit 7) */ -#define GPDMA0_STATUSDSTTRAN_CH7_Msk (0x80UL) /*!< GPDMA0 STATUSDSTTRAN: CH7 (Bitfield-Mask: 0x01) */ - -/* ------------------------------ GPDMA0_STATUSERR ------------------------------ */ -#define GPDMA0_STATUSERR_CH0_Pos (0UL) /*!< GPDMA0 STATUSERR: CH0 (Bit 0) */ -#define GPDMA0_STATUSERR_CH0_Msk (0x1UL) /*!< GPDMA0 STATUSERR: CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA0_STATUSERR_CH1_Pos (1UL) /*!< GPDMA0 STATUSERR: CH1 (Bit 1) */ -#define GPDMA0_STATUSERR_CH1_Msk (0x2UL) /*!< GPDMA0 STATUSERR: CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA0_STATUSERR_CH2_Pos (2UL) /*!< GPDMA0 STATUSERR: CH2 (Bit 2) */ -#define GPDMA0_STATUSERR_CH2_Msk (0x4UL) /*!< GPDMA0 STATUSERR: CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA0_STATUSERR_CH3_Pos (3UL) /*!< GPDMA0 STATUSERR: CH3 (Bit 3) */ -#define GPDMA0_STATUSERR_CH3_Msk (0x8UL) /*!< GPDMA0 STATUSERR: CH3 (Bitfield-Mask: 0x01) */ -#define GPDMA0_STATUSERR_CH4_Pos (4UL) /*!< GPDMA0 STATUSERR: CH4 (Bit 4) */ -#define GPDMA0_STATUSERR_CH4_Msk (0x10UL) /*!< GPDMA0 STATUSERR: CH4 (Bitfield-Mask: 0x01) */ -#define GPDMA0_STATUSERR_CH5_Pos (5UL) /*!< GPDMA0 STATUSERR: CH5 (Bit 5) */ -#define GPDMA0_STATUSERR_CH5_Msk (0x20UL) /*!< GPDMA0 STATUSERR: CH5 (Bitfield-Mask: 0x01) */ -#define GPDMA0_STATUSERR_CH6_Pos (6UL) /*!< GPDMA0 STATUSERR: CH6 (Bit 6) */ -#define GPDMA0_STATUSERR_CH6_Msk (0x40UL) /*!< GPDMA0 STATUSERR: CH6 (Bitfield-Mask: 0x01) */ -#define GPDMA0_STATUSERR_CH7_Pos (7UL) /*!< GPDMA0 STATUSERR: CH7 (Bit 7) */ -#define GPDMA0_STATUSERR_CH7_Msk (0x80UL) /*!< GPDMA0 STATUSERR: CH7 (Bitfield-Mask: 0x01) */ - -/* ------------------------------- GPDMA0_MASKTFR ------------------------------- */ -#define GPDMA0_MASKTFR_CH0_Pos (0UL) /*!< GPDMA0 MASKTFR: CH0 (Bit 0) */ -#define GPDMA0_MASKTFR_CH0_Msk (0x1UL) /*!< GPDMA0 MASKTFR: CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKTFR_CH1_Pos (1UL) /*!< GPDMA0 MASKTFR: CH1 (Bit 1) */ -#define GPDMA0_MASKTFR_CH1_Msk (0x2UL) /*!< GPDMA0 MASKTFR: CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKTFR_CH2_Pos (2UL) /*!< GPDMA0 MASKTFR: CH2 (Bit 2) */ -#define GPDMA0_MASKTFR_CH2_Msk (0x4UL) /*!< GPDMA0 MASKTFR: CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKTFR_CH3_Pos (3UL) /*!< GPDMA0 MASKTFR: CH3 (Bit 3) */ -#define GPDMA0_MASKTFR_CH3_Msk (0x8UL) /*!< GPDMA0 MASKTFR: CH3 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKTFR_CH4_Pos (4UL) /*!< GPDMA0 MASKTFR: CH4 (Bit 4) */ -#define GPDMA0_MASKTFR_CH4_Msk (0x10UL) /*!< GPDMA0 MASKTFR: CH4 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKTFR_CH5_Pos (5UL) /*!< GPDMA0 MASKTFR: CH5 (Bit 5) */ -#define GPDMA0_MASKTFR_CH5_Msk (0x20UL) /*!< GPDMA0 MASKTFR: CH5 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKTFR_CH6_Pos (6UL) /*!< GPDMA0 MASKTFR: CH6 (Bit 6) */ -#define GPDMA0_MASKTFR_CH6_Msk (0x40UL) /*!< GPDMA0 MASKTFR: CH6 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKTFR_CH7_Pos (7UL) /*!< GPDMA0 MASKTFR: CH7 (Bit 7) */ -#define GPDMA0_MASKTFR_CH7_Msk (0x80UL) /*!< GPDMA0 MASKTFR: CH7 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKTFR_WE_CH0_Pos (8UL) /*!< GPDMA0 MASKTFR: WE_CH0 (Bit 8) */ -#define GPDMA0_MASKTFR_WE_CH0_Msk (0x100UL) /*!< GPDMA0 MASKTFR: WE_CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKTFR_WE_CH1_Pos (9UL) /*!< GPDMA0 MASKTFR: WE_CH1 (Bit 9) */ -#define GPDMA0_MASKTFR_WE_CH1_Msk (0x200UL) /*!< GPDMA0 MASKTFR: WE_CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKTFR_WE_CH2_Pos (10UL) /*!< GPDMA0 MASKTFR: WE_CH2 (Bit 10) */ -#define GPDMA0_MASKTFR_WE_CH2_Msk (0x400UL) /*!< GPDMA0 MASKTFR: WE_CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKTFR_WE_CH3_Pos (11UL) /*!< GPDMA0 MASKTFR: WE_CH3 (Bit 11) */ -#define GPDMA0_MASKTFR_WE_CH3_Msk (0x800UL) /*!< GPDMA0 MASKTFR: WE_CH3 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKTFR_WE_CH4_Pos (12UL) /*!< GPDMA0 MASKTFR: WE_CH4 (Bit 12) */ -#define GPDMA0_MASKTFR_WE_CH4_Msk (0x1000UL) /*!< GPDMA0 MASKTFR: WE_CH4 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKTFR_WE_CH5_Pos (13UL) /*!< GPDMA0 MASKTFR: WE_CH5 (Bit 13) */ -#define GPDMA0_MASKTFR_WE_CH5_Msk (0x2000UL) /*!< GPDMA0 MASKTFR: WE_CH5 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKTFR_WE_CH6_Pos (14UL) /*!< GPDMA0 MASKTFR: WE_CH6 (Bit 14) */ -#define GPDMA0_MASKTFR_WE_CH6_Msk (0x4000UL) /*!< GPDMA0 MASKTFR: WE_CH6 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKTFR_WE_CH7_Pos (15UL) /*!< GPDMA0 MASKTFR: WE_CH7 (Bit 15) */ -#define GPDMA0_MASKTFR_WE_CH7_Msk (0x8000UL) /*!< GPDMA0 MASKTFR: WE_CH7 (Bitfield-Mask: 0x01) */ - -/* ------------------------------ GPDMA0_MASKBLOCK ------------------------------ */ -#define GPDMA0_MASKBLOCK_CH0_Pos (0UL) /*!< GPDMA0 MASKBLOCK: CH0 (Bit 0) */ -#define GPDMA0_MASKBLOCK_CH0_Msk (0x1UL) /*!< GPDMA0 MASKBLOCK: CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKBLOCK_CH1_Pos (1UL) /*!< GPDMA0 MASKBLOCK: CH1 (Bit 1) */ -#define GPDMA0_MASKBLOCK_CH1_Msk (0x2UL) /*!< GPDMA0 MASKBLOCK: CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKBLOCK_CH2_Pos (2UL) /*!< GPDMA0 MASKBLOCK: CH2 (Bit 2) */ -#define GPDMA0_MASKBLOCK_CH2_Msk (0x4UL) /*!< GPDMA0 MASKBLOCK: CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKBLOCK_CH3_Pos (3UL) /*!< GPDMA0 MASKBLOCK: CH3 (Bit 3) */ -#define GPDMA0_MASKBLOCK_CH3_Msk (0x8UL) /*!< GPDMA0 MASKBLOCK: CH3 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKBLOCK_CH4_Pos (4UL) /*!< GPDMA0 MASKBLOCK: CH4 (Bit 4) */ -#define GPDMA0_MASKBLOCK_CH4_Msk (0x10UL) /*!< GPDMA0 MASKBLOCK: CH4 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKBLOCK_CH5_Pos (5UL) /*!< GPDMA0 MASKBLOCK: CH5 (Bit 5) */ -#define GPDMA0_MASKBLOCK_CH5_Msk (0x20UL) /*!< GPDMA0 MASKBLOCK: CH5 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKBLOCK_CH6_Pos (6UL) /*!< GPDMA0 MASKBLOCK: CH6 (Bit 6) */ -#define GPDMA0_MASKBLOCK_CH6_Msk (0x40UL) /*!< GPDMA0 MASKBLOCK: CH6 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKBLOCK_CH7_Pos (7UL) /*!< GPDMA0 MASKBLOCK: CH7 (Bit 7) */ -#define GPDMA0_MASKBLOCK_CH7_Msk (0x80UL) /*!< GPDMA0 MASKBLOCK: CH7 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKBLOCK_WE_CH0_Pos (8UL) /*!< GPDMA0 MASKBLOCK: WE_CH0 (Bit 8) */ -#define GPDMA0_MASKBLOCK_WE_CH0_Msk (0x100UL) /*!< GPDMA0 MASKBLOCK: WE_CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKBLOCK_WE_CH1_Pos (9UL) /*!< GPDMA0 MASKBLOCK: WE_CH1 (Bit 9) */ -#define GPDMA0_MASKBLOCK_WE_CH1_Msk (0x200UL) /*!< GPDMA0 MASKBLOCK: WE_CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKBLOCK_WE_CH2_Pos (10UL) /*!< GPDMA0 MASKBLOCK: WE_CH2 (Bit 10) */ -#define GPDMA0_MASKBLOCK_WE_CH2_Msk (0x400UL) /*!< GPDMA0 MASKBLOCK: WE_CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKBLOCK_WE_CH3_Pos (11UL) /*!< GPDMA0 MASKBLOCK: WE_CH3 (Bit 11) */ -#define GPDMA0_MASKBLOCK_WE_CH3_Msk (0x800UL) /*!< GPDMA0 MASKBLOCK: WE_CH3 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKBLOCK_WE_CH4_Pos (12UL) /*!< GPDMA0 MASKBLOCK: WE_CH4 (Bit 12) */ -#define GPDMA0_MASKBLOCK_WE_CH4_Msk (0x1000UL) /*!< GPDMA0 MASKBLOCK: WE_CH4 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKBLOCK_WE_CH5_Pos (13UL) /*!< GPDMA0 MASKBLOCK: WE_CH5 (Bit 13) */ -#define GPDMA0_MASKBLOCK_WE_CH5_Msk (0x2000UL) /*!< GPDMA0 MASKBLOCK: WE_CH5 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKBLOCK_WE_CH6_Pos (14UL) /*!< GPDMA0 MASKBLOCK: WE_CH6 (Bit 14) */ -#define GPDMA0_MASKBLOCK_WE_CH6_Msk (0x4000UL) /*!< GPDMA0 MASKBLOCK: WE_CH6 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKBLOCK_WE_CH7_Pos (15UL) /*!< GPDMA0 MASKBLOCK: WE_CH7 (Bit 15) */ -#define GPDMA0_MASKBLOCK_WE_CH7_Msk (0x8000UL) /*!< GPDMA0 MASKBLOCK: WE_CH7 (Bitfield-Mask: 0x01) */ - -/* ----------------------------- GPDMA0_MASKSRCTRAN ----------------------------- */ -#define GPDMA0_MASKSRCTRAN_CH0_Pos (0UL) /*!< GPDMA0 MASKSRCTRAN: CH0 (Bit 0) */ -#define GPDMA0_MASKSRCTRAN_CH0_Msk (0x1UL) /*!< GPDMA0 MASKSRCTRAN: CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKSRCTRAN_CH1_Pos (1UL) /*!< GPDMA0 MASKSRCTRAN: CH1 (Bit 1) */ -#define GPDMA0_MASKSRCTRAN_CH1_Msk (0x2UL) /*!< GPDMA0 MASKSRCTRAN: CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKSRCTRAN_CH2_Pos (2UL) /*!< GPDMA0 MASKSRCTRAN: CH2 (Bit 2) */ -#define GPDMA0_MASKSRCTRAN_CH2_Msk (0x4UL) /*!< GPDMA0 MASKSRCTRAN: CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKSRCTRAN_CH3_Pos (3UL) /*!< GPDMA0 MASKSRCTRAN: CH3 (Bit 3) */ -#define GPDMA0_MASKSRCTRAN_CH3_Msk (0x8UL) /*!< GPDMA0 MASKSRCTRAN: CH3 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKSRCTRAN_CH4_Pos (4UL) /*!< GPDMA0 MASKSRCTRAN: CH4 (Bit 4) */ -#define GPDMA0_MASKSRCTRAN_CH4_Msk (0x10UL) /*!< GPDMA0 MASKSRCTRAN: CH4 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKSRCTRAN_CH5_Pos (5UL) /*!< GPDMA0 MASKSRCTRAN: CH5 (Bit 5) */ -#define GPDMA0_MASKSRCTRAN_CH5_Msk (0x20UL) /*!< GPDMA0 MASKSRCTRAN: CH5 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKSRCTRAN_CH6_Pos (6UL) /*!< GPDMA0 MASKSRCTRAN: CH6 (Bit 6) */ -#define GPDMA0_MASKSRCTRAN_CH6_Msk (0x40UL) /*!< GPDMA0 MASKSRCTRAN: CH6 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKSRCTRAN_CH7_Pos (7UL) /*!< GPDMA0 MASKSRCTRAN: CH7 (Bit 7) */ -#define GPDMA0_MASKSRCTRAN_CH7_Msk (0x80UL) /*!< GPDMA0 MASKSRCTRAN: CH7 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKSRCTRAN_WE_CH0_Pos (8UL) /*!< GPDMA0 MASKSRCTRAN: WE_CH0 (Bit 8) */ -#define GPDMA0_MASKSRCTRAN_WE_CH0_Msk (0x100UL) /*!< GPDMA0 MASKSRCTRAN: WE_CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKSRCTRAN_WE_CH1_Pos (9UL) /*!< GPDMA0 MASKSRCTRAN: WE_CH1 (Bit 9) */ -#define GPDMA0_MASKSRCTRAN_WE_CH1_Msk (0x200UL) /*!< GPDMA0 MASKSRCTRAN: WE_CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKSRCTRAN_WE_CH2_Pos (10UL) /*!< GPDMA0 MASKSRCTRAN: WE_CH2 (Bit 10) */ -#define GPDMA0_MASKSRCTRAN_WE_CH2_Msk (0x400UL) /*!< GPDMA0 MASKSRCTRAN: WE_CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKSRCTRAN_WE_CH3_Pos (11UL) /*!< GPDMA0 MASKSRCTRAN: WE_CH3 (Bit 11) */ -#define GPDMA0_MASKSRCTRAN_WE_CH3_Msk (0x800UL) /*!< GPDMA0 MASKSRCTRAN: WE_CH3 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKSRCTRAN_WE_CH4_Pos (12UL) /*!< GPDMA0 MASKSRCTRAN: WE_CH4 (Bit 12) */ -#define GPDMA0_MASKSRCTRAN_WE_CH4_Msk (0x1000UL) /*!< GPDMA0 MASKSRCTRAN: WE_CH4 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKSRCTRAN_WE_CH5_Pos (13UL) /*!< GPDMA0 MASKSRCTRAN: WE_CH5 (Bit 13) */ -#define GPDMA0_MASKSRCTRAN_WE_CH5_Msk (0x2000UL) /*!< GPDMA0 MASKSRCTRAN: WE_CH5 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKSRCTRAN_WE_CH6_Pos (14UL) /*!< GPDMA0 MASKSRCTRAN: WE_CH6 (Bit 14) */ -#define GPDMA0_MASKSRCTRAN_WE_CH6_Msk (0x4000UL) /*!< GPDMA0 MASKSRCTRAN: WE_CH6 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKSRCTRAN_WE_CH7_Pos (15UL) /*!< GPDMA0 MASKSRCTRAN: WE_CH7 (Bit 15) */ -#define GPDMA0_MASKSRCTRAN_WE_CH7_Msk (0x8000UL) /*!< GPDMA0 MASKSRCTRAN: WE_CH7 (Bitfield-Mask: 0x01) */ - -/* ----------------------------- GPDMA0_MASKDSTTRAN ----------------------------- */ -#define GPDMA0_MASKDSTTRAN_CH0_Pos (0UL) /*!< GPDMA0 MASKDSTTRAN: CH0 (Bit 0) */ -#define GPDMA0_MASKDSTTRAN_CH0_Msk (0x1UL) /*!< GPDMA0 MASKDSTTRAN: CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKDSTTRAN_CH1_Pos (1UL) /*!< GPDMA0 MASKDSTTRAN: CH1 (Bit 1) */ -#define GPDMA0_MASKDSTTRAN_CH1_Msk (0x2UL) /*!< GPDMA0 MASKDSTTRAN: CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKDSTTRAN_CH2_Pos (2UL) /*!< GPDMA0 MASKDSTTRAN: CH2 (Bit 2) */ -#define GPDMA0_MASKDSTTRAN_CH2_Msk (0x4UL) /*!< GPDMA0 MASKDSTTRAN: CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKDSTTRAN_CH3_Pos (3UL) /*!< GPDMA0 MASKDSTTRAN: CH3 (Bit 3) */ -#define GPDMA0_MASKDSTTRAN_CH3_Msk (0x8UL) /*!< GPDMA0 MASKDSTTRAN: CH3 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKDSTTRAN_CH4_Pos (4UL) /*!< GPDMA0 MASKDSTTRAN: CH4 (Bit 4) */ -#define GPDMA0_MASKDSTTRAN_CH4_Msk (0x10UL) /*!< GPDMA0 MASKDSTTRAN: CH4 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKDSTTRAN_CH5_Pos (5UL) /*!< GPDMA0 MASKDSTTRAN: CH5 (Bit 5) */ -#define GPDMA0_MASKDSTTRAN_CH5_Msk (0x20UL) /*!< GPDMA0 MASKDSTTRAN: CH5 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKDSTTRAN_CH6_Pos (6UL) /*!< GPDMA0 MASKDSTTRAN: CH6 (Bit 6) */ -#define GPDMA0_MASKDSTTRAN_CH6_Msk (0x40UL) /*!< GPDMA0 MASKDSTTRAN: CH6 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKDSTTRAN_CH7_Pos (7UL) /*!< GPDMA0 MASKDSTTRAN: CH7 (Bit 7) */ -#define GPDMA0_MASKDSTTRAN_CH7_Msk (0x80UL) /*!< GPDMA0 MASKDSTTRAN: CH7 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKDSTTRAN_WE_CH0_Pos (8UL) /*!< GPDMA0 MASKDSTTRAN: WE_CH0 (Bit 8) */ -#define GPDMA0_MASKDSTTRAN_WE_CH0_Msk (0x100UL) /*!< GPDMA0 MASKDSTTRAN: WE_CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKDSTTRAN_WE_CH1_Pos (9UL) /*!< GPDMA0 MASKDSTTRAN: WE_CH1 (Bit 9) */ -#define GPDMA0_MASKDSTTRAN_WE_CH1_Msk (0x200UL) /*!< GPDMA0 MASKDSTTRAN: WE_CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKDSTTRAN_WE_CH2_Pos (10UL) /*!< GPDMA0 MASKDSTTRAN: WE_CH2 (Bit 10) */ -#define GPDMA0_MASKDSTTRAN_WE_CH2_Msk (0x400UL) /*!< GPDMA0 MASKDSTTRAN: WE_CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKDSTTRAN_WE_CH3_Pos (11UL) /*!< GPDMA0 MASKDSTTRAN: WE_CH3 (Bit 11) */ -#define GPDMA0_MASKDSTTRAN_WE_CH3_Msk (0x800UL) /*!< GPDMA0 MASKDSTTRAN: WE_CH3 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKDSTTRAN_WE_CH4_Pos (12UL) /*!< GPDMA0 MASKDSTTRAN: WE_CH4 (Bit 12) */ -#define GPDMA0_MASKDSTTRAN_WE_CH4_Msk (0x1000UL) /*!< GPDMA0 MASKDSTTRAN: WE_CH4 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKDSTTRAN_WE_CH5_Pos (13UL) /*!< GPDMA0 MASKDSTTRAN: WE_CH5 (Bit 13) */ -#define GPDMA0_MASKDSTTRAN_WE_CH5_Msk (0x2000UL) /*!< GPDMA0 MASKDSTTRAN: WE_CH5 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKDSTTRAN_WE_CH6_Pos (14UL) /*!< GPDMA0 MASKDSTTRAN: WE_CH6 (Bit 14) */ -#define GPDMA0_MASKDSTTRAN_WE_CH6_Msk (0x4000UL) /*!< GPDMA0 MASKDSTTRAN: WE_CH6 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKDSTTRAN_WE_CH7_Pos (15UL) /*!< GPDMA0 MASKDSTTRAN: WE_CH7 (Bit 15) */ -#define GPDMA0_MASKDSTTRAN_WE_CH7_Msk (0x8000UL) /*!< GPDMA0 MASKDSTTRAN: WE_CH7 (Bitfield-Mask: 0x01) */ - -/* ------------------------------- GPDMA0_MASKERR ------------------------------- */ -#define GPDMA0_MASKERR_CH0_Pos (0UL) /*!< GPDMA0 MASKERR: CH0 (Bit 0) */ -#define GPDMA0_MASKERR_CH0_Msk (0x1UL) /*!< GPDMA0 MASKERR: CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKERR_CH1_Pos (1UL) /*!< GPDMA0 MASKERR: CH1 (Bit 1) */ -#define GPDMA0_MASKERR_CH1_Msk (0x2UL) /*!< GPDMA0 MASKERR: CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKERR_CH2_Pos (2UL) /*!< GPDMA0 MASKERR: CH2 (Bit 2) */ -#define GPDMA0_MASKERR_CH2_Msk (0x4UL) /*!< GPDMA0 MASKERR: CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKERR_CH3_Pos (3UL) /*!< GPDMA0 MASKERR: CH3 (Bit 3) */ -#define GPDMA0_MASKERR_CH3_Msk (0x8UL) /*!< GPDMA0 MASKERR: CH3 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKERR_CH4_Pos (4UL) /*!< GPDMA0 MASKERR: CH4 (Bit 4) */ -#define GPDMA0_MASKERR_CH4_Msk (0x10UL) /*!< GPDMA0 MASKERR: CH4 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKERR_CH5_Pos (5UL) /*!< GPDMA0 MASKERR: CH5 (Bit 5) */ -#define GPDMA0_MASKERR_CH5_Msk (0x20UL) /*!< GPDMA0 MASKERR: CH5 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKERR_CH6_Pos (6UL) /*!< GPDMA0 MASKERR: CH6 (Bit 6) */ -#define GPDMA0_MASKERR_CH6_Msk (0x40UL) /*!< GPDMA0 MASKERR: CH6 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKERR_CH7_Pos (7UL) /*!< GPDMA0 MASKERR: CH7 (Bit 7) */ -#define GPDMA0_MASKERR_CH7_Msk (0x80UL) /*!< GPDMA0 MASKERR: CH7 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKERR_WE_CH0_Pos (8UL) /*!< GPDMA0 MASKERR: WE_CH0 (Bit 8) */ -#define GPDMA0_MASKERR_WE_CH0_Msk (0x100UL) /*!< GPDMA0 MASKERR: WE_CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKERR_WE_CH1_Pos (9UL) /*!< GPDMA0 MASKERR: WE_CH1 (Bit 9) */ -#define GPDMA0_MASKERR_WE_CH1_Msk (0x200UL) /*!< GPDMA0 MASKERR: WE_CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKERR_WE_CH2_Pos (10UL) /*!< GPDMA0 MASKERR: WE_CH2 (Bit 10) */ -#define GPDMA0_MASKERR_WE_CH2_Msk (0x400UL) /*!< GPDMA0 MASKERR: WE_CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKERR_WE_CH3_Pos (11UL) /*!< GPDMA0 MASKERR: WE_CH3 (Bit 11) */ -#define GPDMA0_MASKERR_WE_CH3_Msk (0x800UL) /*!< GPDMA0 MASKERR: WE_CH3 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKERR_WE_CH4_Pos (12UL) /*!< GPDMA0 MASKERR: WE_CH4 (Bit 12) */ -#define GPDMA0_MASKERR_WE_CH4_Msk (0x1000UL) /*!< GPDMA0 MASKERR: WE_CH4 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKERR_WE_CH5_Pos (13UL) /*!< GPDMA0 MASKERR: WE_CH5 (Bit 13) */ -#define GPDMA0_MASKERR_WE_CH5_Msk (0x2000UL) /*!< GPDMA0 MASKERR: WE_CH5 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKERR_WE_CH6_Pos (14UL) /*!< GPDMA0 MASKERR: WE_CH6 (Bit 14) */ -#define GPDMA0_MASKERR_WE_CH6_Msk (0x4000UL) /*!< GPDMA0 MASKERR: WE_CH6 (Bitfield-Mask: 0x01) */ -#define GPDMA0_MASKERR_WE_CH7_Pos (15UL) /*!< GPDMA0 MASKERR: WE_CH7 (Bit 15) */ -#define GPDMA0_MASKERR_WE_CH7_Msk (0x8000UL) /*!< GPDMA0 MASKERR: WE_CH7 (Bitfield-Mask: 0x01) */ - -/* ------------------------------- GPDMA0_CLEARTFR ------------------------------ */ -#define GPDMA0_CLEARTFR_CH0_Pos (0UL) /*!< GPDMA0 CLEARTFR: CH0 (Bit 0) */ -#define GPDMA0_CLEARTFR_CH0_Msk (0x1UL) /*!< GPDMA0 CLEARTFR: CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA0_CLEARTFR_CH1_Pos (1UL) /*!< GPDMA0 CLEARTFR: CH1 (Bit 1) */ -#define GPDMA0_CLEARTFR_CH1_Msk (0x2UL) /*!< GPDMA0 CLEARTFR: CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA0_CLEARTFR_CH2_Pos (2UL) /*!< GPDMA0 CLEARTFR: CH2 (Bit 2) */ -#define GPDMA0_CLEARTFR_CH2_Msk (0x4UL) /*!< GPDMA0 CLEARTFR: CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA0_CLEARTFR_CH3_Pos (3UL) /*!< GPDMA0 CLEARTFR: CH3 (Bit 3) */ -#define GPDMA0_CLEARTFR_CH3_Msk (0x8UL) /*!< GPDMA0 CLEARTFR: CH3 (Bitfield-Mask: 0x01) */ -#define GPDMA0_CLEARTFR_CH4_Pos (4UL) /*!< GPDMA0 CLEARTFR: CH4 (Bit 4) */ -#define GPDMA0_CLEARTFR_CH4_Msk (0x10UL) /*!< GPDMA0 CLEARTFR: CH4 (Bitfield-Mask: 0x01) */ -#define GPDMA0_CLEARTFR_CH5_Pos (5UL) /*!< GPDMA0 CLEARTFR: CH5 (Bit 5) */ -#define GPDMA0_CLEARTFR_CH5_Msk (0x20UL) /*!< GPDMA0 CLEARTFR: CH5 (Bitfield-Mask: 0x01) */ -#define GPDMA0_CLEARTFR_CH6_Pos (6UL) /*!< GPDMA0 CLEARTFR: CH6 (Bit 6) */ -#define GPDMA0_CLEARTFR_CH6_Msk (0x40UL) /*!< GPDMA0 CLEARTFR: CH6 (Bitfield-Mask: 0x01) */ -#define GPDMA0_CLEARTFR_CH7_Pos (7UL) /*!< GPDMA0 CLEARTFR: CH7 (Bit 7) */ -#define GPDMA0_CLEARTFR_CH7_Msk (0x80UL) /*!< GPDMA0 CLEARTFR: CH7 (Bitfield-Mask: 0x01) */ - -/* ------------------------------ GPDMA0_CLEARBLOCK ----------------------------- */ -#define GPDMA0_CLEARBLOCK_CH0_Pos (0UL) /*!< GPDMA0 CLEARBLOCK: CH0 (Bit 0) */ -#define GPDMA0_CLEARBLOCK_CH0_Msk (0x1UL) /*!< GPDMA0 CLEARBLOCK: CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA0_CLEARBLOCK_CH1_Pos (1UL) /*!< GPDMA0 CLEARBLOCK: CH1 (Bit 1) */ -#define GPDMA0_CLEARBLOCK_CH1_Msk (0x2UL) /*!< GPDMA0 CLEARBLOCK: CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA0_CLEARBLOCK_CH2_Pos (2UL) /*!< GPDMA0 CLEARBLOCK: CH2 (Bit 2) */ -#define GPDMA0_CLEARBLOCK_CH2_Msk (0x4UL) /*!< GPDMA0 CLEARBLOCK: CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA0_CLEARBLOCK_CH3_Pos (3UL) /*!< GPDMA0 CLEARBLOCK: CH3 (Bit 3) */ -#define GPDMA0_CLEARBLOCK_CH3_Msk (0x8UL) /*!< GPDMA0 CLEARBLOCK: CH3 (Bitfield-Mask: 0x01) */ -#define GPDMA0_CLEARBLOCK_CH4_Pos (4UL) /*!< GPDMA0 CLEARBLOCK: CH4 (Bit 4) */ -#define GPDMA0_CLEARBLOCK_CH4_Msk (0x10UL) /*!< GPDMA0 CLEARBLOCK: CH4 (Bitfield-Mask: 0x01) */ -#define GPDMA0_CLEARBLOCK_CH5_Pos (5UL) /*!< GPDMA0 CLEARBLOCK: CH5 (Bit 5) */ -#define GPDMA0_CLEARBLOCK_CH5_Msk (0x20UL) /*!< GPDMA0 CLEARBLOCK: CH5 (Bitfield-Mask: 0x01) */ -#define GPDMA0_CLEARBLOCK_CH6_Pos (6UL) /*!< GPDMA0 CLEARBLOCK: CH6 (Bit 6) */ -#define GPDMA0_CLEARBLOCK_CH6_Msk (0x40UL) /*!< GPDMA0 CLEARBLOCK: CH6 (Bitfield-Mask: 0x01) */ -#define GPDMA0_CLEARBLOCK_CH7_Pos (7UL) /*!< GPDMA0 CLEARBLOCK: CH7 (Bit 7) */ -#define GPDMA0_CLEARBLOCK_CH7_Msk (0x80UL) /*!< GPDMA0 CLEARBLOCK: CH7 (Bitfield-Mask: 0x01) */ - -/* ----------------------------- GPDMA0_CLEARSRCTRAN ---------------------------- */ -#define GPDMA0_CLEARSRCTRAN_CH0_Pos (0UL) /*!< GPDMA0 CLEARSRCTRAN: CH0 (Bit 0) */ -#define GPDMA0_CLEARSRCTRAN_CH0_Msk (0x1UL) /*!< GPDMA0 CLEARSRCTRAN: CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA0_CLEARSRCTRAN_CH1_Pos (1UL) /*!< GPDMA0 CLEARSRCTRAN: CH1 (Bit 1) */ -#define GPDMA0_CLEARSRCTRAN_CH1_Msk (0x2UL) /*!< GPDMA0 CLEARSRCTRAN: CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA0_CLEARSRCTRAN_CH2_Pos (2UL) /*!< GPDMA0 CLEARSRCTRAN: CH2 (Bit 2) */ -#define GPDMA0_CLEARSRCTRAN_CH2_Msk (0x4UL) /*!< GPDMA0 CLEARSRCTRAN: CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA0_CLEARSRCTRAN_CH3_Pos (3UL) /*!< GPDMA0 CLEARSRCTRAN: CH3 (Bit 3) */ -#define GPDMA0_CLEARSRCTRAN_CH3_Msk (0x8UL) /*!< GPDMA0 CLEARSRCTRAN: CH3 (Bitfield-Mask: 0x01) */ -#define GPDMA0_CLEARSRCTRAN_CH4_Pos (4UL) /*!< GPDMA0 CLEARSRCTRAN: CH4 (Bit 4) */ -#define GPDMA0_CLEARSRCTRAN_CH4_Msk (0x10UL) /*!< GPDMA0 CLEARSRCTRAN: CH4 (Bitfield-Mask: 0x01) */ -#define GPDMA0_CLEARSRCTRAN_CH5_Pos (5UL) /*!< GPDMA0 CLEARSRCTRAN: CH5 (Bit 5) */ -#define GPDMA0_CLEARSRCTRAN_CH5_Msk (0x20UL) /*!< GPDMA0 CLEARSRCTRAN: CH5 (Bitfield-Mask: 0x01) */ -#define GPDMA0_CLEARSRCTRAN_CH6_Pos (6UL) /*!< GPDMA0 CLEARSRCTRAN: CH6 (Bit 6) */ -#define GPDMA0_CLEARSRCTRAN_CH6_Msk (0x40UL) /*!< GPDMA0 CLEARSRCTRAN: CH6 (Bitfield-Mask: 0x01) */ -#define GPDMA0_CLEARSRCTRAN_CH7_Pos (7UL) /*!< GPDMA0 CLEARSRCTRAN: CH7 (Bit 7) */ -#define GPDMA0_CLEARSRCTRAN_CH7_Msk (0x80UL) /*!< GPDMA0 CLEARSRCTRAN: CH7 (Bitfield-Mask: 0x01) */ - -/* ----------------------------- GPDMA0_CLEARDSTTRAN ---------------------------- */ -#define GPDMA0_CLEARDSTTRAN_CH0_Pos (0UL) /*!< GPDMA0 CLEARDSTTRAN: CH0 (Bit 0) */ -#define GPDMA0_CLEARDSTTRAN_CH0_Msk (0x1UL) /*!< GPDMA0 CLEARDSTTRAN: CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA0_CLEARDSTTRAN_CH1_Pos (1UL) /*!< GPDMA0 CLEARDSTTRAN: CH1 (Bit 1) */ -#define GPDMA0_CLEARDSTTRAN_CH1_Msk (0x2UL) /*!< GPDMA0 CLEARDSTTRAN: CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA0_CLEARDSTTRAN_CH2_Pos (2UL) /*!< GPDMA0 CLEARDSTTRAN: CH2 (Bit 2) */ -#define GPDMA0_CLEARDSTTRAN_CH2_Msk (0x4UL) /*!< GPDMA0 CLEARDSTTRAN: CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA0_CLEARDSTTRAN_CH3_Pos (3UL) /*!< GPDMA0 CLEARDSTTRAN: CH3 (Bit 3) */ -#define GPDMA0_CLEARDSTTRAN_CH3_Msk (0x8UL) /*!< GPDMA0 CLEARDSTTRAN: CH3 (Bitfield-Mask: 0x01) */ -#define GPDMA0_CLEARDSTTRAN_CH4_Pos (4UL) /*!< GPDMA0 CLEARDSTTRAN: CH4 (Bit 4) */ -#define GPDMA0_CLEARDSTTRAN_CH4_Msk (0x10UL) /*!< GPDMA0 CLEARDSTTRAN: CH4 (Bitfield-Mask: 0x01) */ -#define GPDMA0_CLEARDSTTRAN_CH5_Pos (5UL) /*!< GPDMA0 CLEARDSTTRAN: CH5 (Bit 5) */ -#define GPDMA0_CLEARDSTTRAN_CH5_Msk (0x20UL) /*!< GPDMA0 CLEARDSTTRAN: CH5 (Bitfield-Mask: 0x01) */ -#define GPDMA0_CLEARDSTTRAN_CH6_Pos (6UL) /*!< GPDMA0 CLEARDSTTRAN: CH6 (Bit 6) */ -#define GPDMA0_CLEARDSTTRAN_CH6_Msk (0x40UL) /*!< GPDMA0 CLEARDSTTRAN: CH6 (Bitfield-Mask: 0x01) */ -#define GPDMA0_CLEARDSTTRAN_CH7_Pos (7UL) /*!< GPDMA0 CLEARDSTTRAN: CH7 (Bit 7) */ -#define GPDMA0_CLEARDSTTRAN_CH7_Msk (0x80UL) /*!< GPDMA0 CLEARDSTTRAN: CH7 (Bitfield-Mask: 0x01) */ - -/* ------------------------------- GPDMA0_CLEARERR ------------------------------ */ -#define GPDMA0_CLEARERR_CH0_Pos (0UL) /*!< GPDMA0 CLEARERR: CH0 (Bit 0) */ -#define GPDMA0_CLEARERR_CH0_Msk (0x1UL) /*!< GPDMA0 CLEARERR: CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA0_CLEARERR_CH1_Pos (1UL) /*!< GPDMA0 CLEARERR: CH1 (Bit 1) */ -#define GPDMA0_CLEARERR_CH1_Msk (0x2UL) /*!< GPDMA0 CLEARERR: CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA0_CLEARERR_CH2_Pos (2UL) /*!< GPDMA0 CLEARERR: CH2 (Bit 2) */ -#define GPDMA0_CLEARERR_CH2_Msk (0x4UL) /*!< GPDMA0 CLEARERR: CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA0_CLEARERR_CH3_Pos (3UL) /*!< GPDMA0 CLEARERR: CH3 (Bit 3) */ -#define GPDMA0_CLEARERR_CH3_Msk (0x8UL) /*!< GPDMA0 CLEARERR: CH3 (Bitfield-Mask: 0x01) */ -#define GPDMA0_CLEARERR_CH4_Pos (4UL) /*!< GPDMA0 CLEARERR: CH4 (Bit 4) */ -#define GPDMA0_CLEARERR_CH4_Msk (0x10UL) /*!< GPDMA0 CLEARERR: CH4 (Bitfield-Mask: 0x01) */ -#define GPDMA0_CLEARERR_CH5_Pos (5UL) /*!< GPDMA0 CLEARERR: CH5 (Bit 5) */ -#define GPDMA0_CLEARERR_CH5_Msk (0x20UL) /*!< GPDMA0 CLEARERR: CH5 (Bitfield-Mask: 0x01) */ -#define GPDMA0_CLEARERR_CH6_Pos (6UL) /*!< GPDMA0 CLEARERR: CH6 (Bit 6) */ -#define GPDMA0_CLEARERR_CH6_Msk (0x40UL) /*!< GPDMA0 CLEARERR: CH6 (Bitfield-Mask: 0x01) */ -#define GPDMA0_CLEARERR_CH7_Pos (7UL) /*!< GPDMA0 CLEARERR: CH7 (Bit 7) */ -#define GPDMA0_CLEARERR_CH7_Msk (0x80UL) /*!< GPDMA0 CLEARERR: CH7 (Bitfield-Mask: 0x01) */ - -/* ------------------------------ GPDMA0_STATUSINT ------------------------------ */ -#define GPDMA0_STATUSINT_TFR_Pos (0UL) /*!< GPDMA0 STATUSINT: TFR (Bit 0) */ -#define GPDMA0_STATUSINT_TFR_Msk (0x1UL) /*!< GPDMA0 STATUSINT: TFR (Bitfield-Mask: 0x01) */ -#define GPDMA0_STATUSINT_BLOCK_Pos (1UL) /*!< GPDMA0 STATUSINT: BLOCK (Bit 1) */ -#define GPDMA0_STATUSINT_BLOCK_Msk (0x2UL) /*!< GPDMA0 STATUSINT: BLOCK (Bitfield-Mask: 0x01) */ -#define GPDMA0_STATUSINT_SRCT_Pos (2UL) /*!< GPDMA0 STATUSINT: SRCT (Bit 2) */ -#define GPDMA0_STATUSINT_SRCT_Msk (0x4UL) /*!< GPDMA0 STATUSINT: SRCT (Bitfield-Mask: 0x01) */ -#define GPDMA0_STATUSINT_DSTT_Pos (3UL) /*!< GPDMA0 STATUSINT: DSTT (Bit 3) */ -#define GPDMA0_STATUSINT_DSTT_Msk (0x8UL) /*!< GPDMA0 STATUSINT: DSTT (Bitfield-Mask: 0x01) */ -#define GPDMA0_STATUSINT_ERR_Pos (4UL) /*!< GPDMA0 STATUSINT: ERR (Bit 4) */ -#define GPDMA0_STATUSINT_ERR_Msk (0x10UL) /*!< GPDMA0 STATUSINT: ERR (Bitfield-Mask: 0x01) */ - -/* ------------------------------ GPDMA0_REQSRCREG ------------------------------ */ -#define GPDMA0_REQSRCREG_CH0_Pos (0UL) /*!< GPDMA0 REQSRCREG: CH0 (Bit 0) */ -#define GPDMA0_REQSRCREG_CH0_Msk (0x1UL) /*!< GPDMA0 REQSRCREG: CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA0_REQSRCREG_CH1_Pos (1UL) /*!< GPDMA0 REQSRCREG: CH1 (Bit 1) */ -#define GPDMA0_REQSRCREG_CH1_Msk (0x2UL) /*!< GPDMA0 REQSRCREG: CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA0_REQSRCREG_CH2_Pos (2UL) /*!< GPDMA0 REQSRCREG: CH2 (Bit 2) */ -#define GPDMA0_REQSRCREG_CH2_Msk (0x4UL) /*!< GPDMA0 REQSRCREG: CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA0_REQSRCREG_CH3_Pos (3UL) /*!< GPDMA0 REQSRCREG: CH3 (Bit 3) */ -#define GPDMA0_REQSRCREG_CH3_Msk (0x8UL) /*!< GPDMA0 REQSRCREG: CH3 (Bitfield-Mask: 0x01) */ -#define GPDMA0_REQSRCREG_CH4_Pos (4UL) /*!< GPDMA0 REQSRCREG: CH4 (Bit 4) */ -#define GPDMA0_REQSRCREG_CH4_Msk (0x10UL) /*!< GPDMA0 REQSRCREG: CH4 (Bitfield-Mask: 0x01) */ -#define GPDMA0_REQSRCREG_CH5_Pos (5UL) /*!< GPDMA0 REQSRCREG: CH5 (Bit 5) */ -#define GPDMA0_REQSRCREG_CH5_Msk (0x20UL) /*!< GPDMA0 REQSRCREG: CH5 (Bitfield-Mask: 0x01) */ -#define GPDMA0_REQSRCREG_CH6_Pos (6UL) /*!< GPDMA0 REQSRCREG: CH6 (Bit 6) */ -#define GPDMA0_REQSRCREG_CH6_Msk (0x40UL) /*!< GPDMA0 REQSRCREG: CH6 (Bitfield-Mask: 0x01) */ -#define GPDMA0_REQSRCREG_CH7_Pos (7UL) /*!< GPDMA0 REQSRCREG: CH7 (Bit 7) */ -#define GPDMA0_REQSRCREG_CH7_Msk (0x80UL) /*!< GPDMA0 REQSRCREG: CH7 (Bitfield-Mask: 0x01) */ -#define GPDMA0_REQSRCREG_WE_CH0_Pos (8UL) /*!< GPDMA0 REQSRCREG: WE_CH0 (Bit 8) */ -#define GPDMA0_REQSRCREG_WE_CH0_Msk (0x100UL) /*!< GPDMA0 REQSRCREG: WE_CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA0_REQSRCREG_WE_CH1_Pos (9UL) /*!< GPDMA0 REQSRCREG: WE_CH1 (Bit 9) */ -#define GPDMA0_REQSRCREG_WE_CH1_Msk (0x200UL) /*!< GPDMA0 REQSRCREG: WE_CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA0_REQSRCREG_WE_CH2_Pos (10UL) /*!< GPDMA0 REQSRCREG: WE_CH2 (Bit 10) */ -#define GPDMA0_REQSRCREG_WE_CH2_Msk (0x400UL) /*!< GPDMA0 REQSRCREG: WE_CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA0_REQSRCREG_WE_CH3_Pos (11UL) /*!< GPDMA0 REQSRCREG: WE_CH3 (Bit 11) */ -#define GPDMA0_REQSRCREG_WE_CH3_Msk (0x800UL) /*!< GPDMA0 REQSRCREG: WE_CH3 (Bitfield-Mask: 0x01) */ -#define GPDMA0_REQSRCREG_WE_CH4_Pos (12UL) /*!< GPDMA0 REQSRCREG: WE_CH4 (Bit 12) */ -#define GPDMA0_REQSRCREG_WE_CH4_Msk (0x1000UL) /*!< GPDMA0 REQSRCREG: WE_CH4 (Bitfield-Mask: 0x01) */ -#define GPDMA0_REQSRCREG_WE_CH5_Pos (13UL) /*!< GPDMA0 REQSRCREG: WE_CH5 (Bit 13) */ -#define GPDMA0_REQSRCREG_WE_CH5_Msk (0x2000UL) /*!< GPDMA0 REQSRCREG: WE_CH5 (Bitfield-Mask: 0x01) */ -#define GPDMA0_REQSRCREG_WE_CH6_Pos (14UL) /*!< GPDMA0 REQSRCREG: WE_CH6 (Bit 14) */ -#define GPDMA0_REQSRCREG_WE_CH6_Msk (0x4000UL) /*!< GPDMA0 REQSRCREG: WE_CH6 (Bitfield-Mask: 0x01) */ -#define GPDMA0_REQSRCREG_WE_CH7_Pos (15UL) /*!< GPDMA0 REQSRCREG: WE_CH7 (Bit 15) */ -#define GPDMA0_REQSRCREG_WE_CH7_Msk (0x8000UL) /*!< GPDMA0 REQSRCREG: WE_CH7 (Bitfield-Mask: 0x01) */ - -/* ------------------------------ GPDMA0_REQDSTREG ------------------------------ */ -#define GPDMA0_REQDSTREG_CH0_Pos (0UL) /*!< GPDMA0 REQDSTREG: CH0 (Bit 0) */ -#define GPDMA0_REQDSTREG_CH0_Msk (0x1UL) /*!< GPDMA0 REQDSTREG: CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA0_REQDSTREG_CH1_Pos (1UL) /*!< GPDMA0 REQDSTREG: CH1 (Bit 1) */ -#define GPDMA0_REQDSTREG_CH1_Msk (0x2UL) /*!< GPDMA0 REQDSTREG: CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA0_REQDSTREG_CH2_Pos (2UL) /*!< GPDMA0 REQDSTREG: CH2 (Bit 2) */ -#define GPDMA0_REQDSTREG_CH2_Msk (0x4UL) /*!< GPDMA0 REQDSTREG: CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA0_REQDSTREG_CH3_Pos (3UL) /*!< GPDMA0 REQDSTREG: CH3 (Bit 3) */ -#define GPDMA0_REQDSTREG_CH3_Msk (0x8UL) /*!< GPDMA0 REQDSTREG: CH3 (Bitfield-Mask: 0x01) */ -#define GPDMA0_REQDSTREG_CH4_Pos (4UL) /*!< GPDMA0 REQDSTREG: CH4 (Bit 4) */ -#define GPDMA0_REQDSTREG_CH4_Msk (0x10UL) /*!< GPDMA0 REQDSTREG: CH4 (Bitfield-Mask: 0x01) */ -#define GPDMA0_REQDSTREG_CH5_Pos (5UL) /*!< GPDMA0 REQDSTREG: CH5 (Bit 5) */ -#define GPDMA0_REQDSTREG_CH5_Msk (0x20UL) /*!< GPDMA0 REQDSTREG: CH5 (Bitfield-Mask: 0x01) */ -#define GPDMA0_REQDSTREG_CH6_Pos (6UL) /*!< GPDMA0 REQDSTREG: CH6 (Bit 6) */ -#define GPDMA0_REQDSTREG_CH6_Msk (0x40UL) /*!< GPDMA0 REQDSTREG: CH6 (Bitfield-Mask: 0x01) */ -#define GPDMA0_REQDSTREG_CH7_Pos (7UL) /*!< GPDMA0 REQDSTREG: CH7 (Bit 7) */ -#define GPDMA0_REQDSTREG_CH7_Msk (0x80UL) /*!< GPDMA0 REQDSTREG: CH7 (Bitfield-Mask: 0x01) */ -#define GPDMA0_REQDSTREG_WE_CH0_Pos (8UL) /*!< GPDMA0 REQDSTREG: WE_CH0 (Bit 8) */ -#define GPDMA0_REQDSTREG_WE_CH0_Msk (0x100UL) /*!< GPDMA0 REQDSTREG: WE_CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA0_REQDSTREG_WE_CH1_Pos (9UL) /*!< GPDMA0 REQDSTREG: WE_CH1 (Bit 9) */ -#define GPDMA0_REQDSTREG_WE_CH1_Msk (0x200UL) /*!< GPDMA0 REQDSTREG: WE_CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA0_REQDSTREG_WE_CH2_Pos (10UL) /*!< GPDMA0 REQDSTREG: WE_CH2 (Bit 10) */ -#define GPDMA0_REQDSTREG_WE_CH2_Msk (0x400UL) /*!< GPDMA0 REQDSTREG: WE_CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA0_REQDSTREG_WE_CH3_Pos (11UL) /*!< GPDMA0 REQDSTREG: WE_CH3 (Bit 11) */ -#define GPDMA0_REQDSTREG_WE_CH3_Msk (0x800UL) /*!< GPDMA0 REQDSTREG: WE_CH3 (Bitfield-Mask: 0x01) */ -#define GPDMA0_REQDSTREG_WE_CH4_Pos (12UL) /*!< GPDMA0 REQDSTREG: WE_CH4 (Bit 12) */ -#define GPDMA0_REQDSTREG_WE_CH4_Msk (0x1000UL) /*!< GPDMA0 REQDSTREG: WE_CH4 (Bitfield-Mask: 0x01) */ -#define GPDMA0_REQDSTREG_WE_CH5_Pos (13UL) /*!< GPDMA0 REQDSTREG: WE_CH5 (Bit 13) */ -#define GPDMA0_REQDSTREG_WE_CH5_Msk (0x2000UL) /*!< GPDMA0 REQDSTREG: WE_CH5 (Bitfield-Mask: 0x01) */ -#define GPDMA0_REQDSTREG_WE_CH6_Pos (14UL) /*!< GPDMA0 REQDSTREG: WE_CH6 (Bit 14) */ -#define GPDMA0_REQDSTREG_WE_CH6_Msk (0x4000UL) /*!< GPDMA0 REQDSTREG: WE_CH6 (Bitfield-Mask: 0x01) */ -#define GPDMA0_REQDSTREG_WE_CH7_Pos (15UL) /*!< GPDMA0 REQDSTREG: WE_CH7 (Bit 15) */ -#define GPDMA0_REQDSTREG_WE_CH7_Msk (0x8000UL) /*!< GPDMA0 REQDSTREG: WE_CH7 (Bitfield-Mask: 0x01) */ - -/* ----------------------------- GPDMA0_SGLREQSRCREG ---------------------------- */ -#define GPDMA0_SGLREQSRCREG_CH0_Pos (0UL) /*!< GPDMA0 SGLREQSRCREG: CH0 (Bit 0) */ -#define GPDMA0_SGLREQSRCREG_CH0_Msk (0x1UL) /*!< GPDMA0 SGLREQSRCREG: CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA0_SGLREQSRCREG_CH1_Pos (1UL) /*!< GPDMA0 SGLREQSRCREG: CH1 (Bit 1) */ -#define GPDMA0_SGLREQSRCREG_CH1_Msk (0x2UL) /*!< GPDMA0 SGLREQSRCREG: CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA0_SGLREQSRCREG_CH2_Pos (2UL) /*!< GPDMA0 SGLREQSRCREG: CH2 (Bit 2) */ -#define GPDMA0_SGLREQSRCREG_CH2_Msk (0x4UL) /*!< GPDMA0 SGLREQSRCREG: CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA0_SGLREQSRCREG_CH3_Pos (3UL) /*!< GPDMA0 SGLREQSRCREG: CH3 (Bit 3) */ -#define GPDMA0_SGLREQSRCREG_CH3_Msk (0x8UL) /*!< GPDMA0 SGLREQSRCREG: CH3 (Bitfield-Mask: 0x01) */ -#define GPDMA0_SGLREQSRCREG_CH4_Pos (4UL) /*!< GPDMA0 SGLREQSRCREG: CH4 (Bit 4) */ -#define GPDMA0_SGLREQSRCREG_CH4_Msk (0x10UL) /*!< GPDMA0 SGLREQSRCREG: CH4 (Bitfield-Mask: 0x01) */ -#define GPDMA0_SGLREQSRCREG_CH5_Pos (5UL) /*!< GPDMA0 SGLREQSRCREG: CH5 (Bit 5) */ -#define GPDMA0_SGLREQSRCREG_CH5_Msk (0x20UL) /*!< GPDMA0 SGLREQSRCREG: CH5 (Bitfield-Mask: 0x01) */ -#define GPDMA0_SGLREQSRCREG_CH6_Pos (6UL) /*!< GPDMA0 SGLREQSRCREG: CH6 (Bit 6) */ -#define GPDMA0_SGLREQSRCREG_CH6_Msk (0x40UL) /*!< GPDMA0 SGLREQSRCREG: CH6 (Bitfield-Mask: 0x01) */ -#define GPDMA0_SGLREQSRCREG_CH7_Pos (7UL) /*!< GPDMA0 SGLREQSRCREG: CH7 (Bit 7) */ -#define GPDMA0_SGLREQSRCREG_CH7_Msk (0x80UL) /*!< GPDMA0 SGLREQSRCREG: CH7 (Bitfield-Mask: 0x01) */ -#define GPDMA0_SGLREQSRCREG_WE_CH0_Pos (8UL) /*!< GPDMA0 SGLREQSRCREG: WE_CH0 (Bit 8) */ -#define GPDMA0_SGLREQSRCREG_WE_CH0_Msk (0x100UL) /*!< GPDMA0 SGLREQSRCREG: WE_CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA0_SGLREQSRCREG_WE_CH1_Pos (9UL) /*!< GPDMA0 SGLREQSRCREG: WE_CH1 (Bit 9) */ -#define GPDMA0_SGLREQSRCREG_WE_CH1_Msk (0x200UL) /*!< GPDMA0 SGLREQSRCREG: WE_CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA0_SGLREQSRCREG_WE_CH2_Pos (10UL) /*!< GPDMA0 SGLREQSRCREG: WE_CH2 (Bit 10) */ -#define GPDMA0_SGLREQSRCREG_WE_CH2_Msk (0x400UL) /*!< GPDMA0 SGLREQSRCREG: WE_CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA0_SGLREQSRCREG_WE_CH3_Pos (11UL) /*!< GPDMA0 SGLREQSRCREG: WE_CH3 (Bit 11) */ -#define GPDMA0_SGLREQSRCREG_WE_CH3_Msk (0x800UL) /*!< GPDMA0 SGLREQSRCREG: WE_CH3 (Bitfield-Mask: 0x01) */ -#define GPDMA0_SGLREQSRCREG_WE_CH4_Pos (12UL) /*!< GPDMA0 SGLREQSRCREG: WE_CH4 (Bit 12) */ -#define GPDMA0_SGLREQSRCREG_WE_CH4_Msk (0x1000UL) /*!< GPDMA0 SGLREQSRCREG: WE_CH4 (Bitfield-Mask: 0x01) */ -#define GPDMA0_SGLREQSRCREG_WE_CH5_Pos (13UL) /*!< GPDMA0 SGLREQSRCREG: WE_CH5 (Bit 13) */ -#define GPDMA0_SGLREQSRCREG_WE_CH5_Msk (0x2000UL) /*!< GPDMA0 SGLREQSRCREG: WE_CH5 (Bitfield-Mask: 0x01) */ -#define GPDMA0_SGLREQSRCREG_WE_CH6_Pos (14UL) /*!< GPDMA0 SGLREQSRCREG: WE_CH6 (Bit 14) */ -#define GPDMA0_SGLREQSRCREG_WE_CH6_Msk (0x4000UL) /*!< GPDMA0 SGLREQSRCREG: WE_CH6 (Bitfield-Mask: 0x01) */ -#define GPDMA0_SGLREQSRCREG_WE_CH7_Pos (15UL) /*!< GPDMA0 SGLREQSRCREG: WE_CH7 (Bit 15) */ -#define GPDMA0_SGLREQSRCREG_WE_CH7_Msk (0x8000UL) /*!< GPDMA0 SGLREQSRCREG: WE_CH7 (Bitfield-Mask: 0x01) */ - -/* ----------------------------- GPDMA0_SGLREQDSTREG ---------------------------- */ -#define GPDMA0_SGLREQDSTREG_CH0_Pos (0UL) /*!< GPDMA0 SGLREQDSTREG: CH0 (Bit 0) */ -#define GPDMA0_SGLREQDSTREG_CH0_Msk (0x1UL) /*!< GPDMA0 SGLREQDSTREG: CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA0_SGLREQDSTREG_CH1_Pos (1UL) /*!< GPDMA0 SGLREQDSTREG: CH1 (Bit 1) */ -#define GPDMA0_SGLREQDSTREG_CH1_Msk (0x2UL) /*!< GPDMA0 SGLREQDSTREG: CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA0_SGLREQDSTREG_CH2_Pos (2UL) /*!< GPDMA0 SGLREQDSTREG: CH2 (Bit 2) */ -#define GPDMA0_SGLREQDSTREG_CH2_Msk (0x4UL) /*!< GPDMA0 SGLREQDSTREG: CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA0_SGLREQDSTREG_CH3_Pos (3UL) /*!< GPDMA0 SGLREQDSTREG: CH3 (Bit 3) */ -#define GPDMA0_SGLREQDSTREG_CH3_Msk (0x8UL) /*!< GPDMA0 SGLREQDSTREG: CH3 (Bitfield-Mask: 0x01) */ -#define GPDMA0_SGLREQDSTREG_CH4_Pos (4UL) /*!< GPDMA0 SGLREQDSTREG: CH4 (Bit 4) */ -#define GPDMA0_SGLREQDSTREG_CH4_Msk (0x10UL) /*!< GPDMA0 SGLREQDSTREG: CH4 (Bitfield-Mask: 0x01) */ -#define GPDMA0_SGLREQDSTREG_CH5_Pos (5UL) /*!< GPDMA0 SGLREQDSTREG: CH5 (Bit 5) */ -#define GPDMA0_SGLREQDSTREG_CH5_Msk (0x20UL) /*!< GPDMA0 SGLREQDSTREG: CH5 (Bitfield-Mask: 0x01) */ -#define GPDMA0_SGLREQDSTREG_CH6_Pos (6UL) /*!< GPDMA0 SGLREQDSTREG: CH6 (Bit 6) */ -#define GPDMA0_SGLREQDSTREG_CH6_Msk (0x40UL) /*!< GPDMA0 SGLREQDSTREG: CH6 (Bitfield-Mask: 0x01) */ -#define GPDMA0_SGLREQDSTREG_CH7_Pos (7UL) /*!< GPDMA0 SGLREQDSTREG: CH7 (Bit 7) */ -#define GPDMA0_SGLREQDSTREG_CH7_Msk (0x80UL) /*!< GPDMA0 SGLREQDSTREG: CH7 (Bitfield-Mask: 0x01) */ -#define GPDMA0_SGLREQDSTREG_WE_CH0_Pos (8UL) /*!< GPDMA0 SGLREQDSTREG: WE_CH0 (Bit 8) */ -#define GPDMA0_SGLREQDSTREG_WE_CH0_Msk (0x100UL) /*!< GPDMA0 SGLREQDSTREG: WE_CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA0_SGLREQDSTREG_WE_CH1_Pos (9UL) /*!< GPDMA0 SGLREQDSTREG: WE_CH1 (Bit 9) */ -#define GPDMA0_SGLREQDSTREG_WE_CH1_Msk (0x200UL) /*!< GPDMA0 SGLREQDSTREG: WE_CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA0_SGLREQDSTREG_WE_CH2_Pos (10UL) /*!< GPDMA0 SGLREQDSTREG: WE_CH2 (Bit 10) */ -#define GPDMA0_SGLREQDSTREG_WE_CH2_Msk (0x400UL) /*!< GPDMA0 SGLREQDSTREG: WE_CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA0_SGLREQDSTREG_WE_CH3_Pos (11UL) /*!< GPDMA0 SGLREQDSTREG: WE_CH3 (Bit 11) */ -#define GPDMA0_SGLREQDSTREG_WE_CH3_Msk (0x800UL) /*!< GPDMA0 SGLREQDSTREG: WE_CH3 (Bitfield-Mask: 0x01) */ -#define GPDMA0_SGLREQDSTREG_WE_CH4_Pos (12UL) /*!< GPDMA0 SGLREQDSTREG: WE_CH4 (Bit 12) */ -#define GPDMA0_SGLREQDSTREG_WE_CH4_Msk (0x1000UL) /*!< GPDMA0 SGLREQDSTREG: WE_CH4 (Bitfield-Mask: 0x01) */ -#define GPDMA0_SGLREQDSTREG_WE_CH5_Pos (13UL) /*!< GPDMA0 SGLREQDSTREG: WE_CH5 (Bit 13) */ -#define GPDMA0_SGLREQDSTREG_WE_CH5_Msk (0x2000UL) /*!< GPDMA0 SGLREQDSTREG: WE_CH5 (Bitfield-Mask: 0x01) */ -#define GPDMA0_SGLREQDSTREG_WE_CH6_Pos (14UL) /*!< GPDMA0 SGLREQDSTREG: WE_CH6 (Bit 14) */ -#define GPDMA0_SGLREQDSTREG_WE_CH6_Msk (0x4000UL) /*!< GPDMA0 SGLREQDSTREG: WE_CH6 (Bitfield-Mask: 0x01) */ -#define GPDMA0_SGLREQDSTREG_WE_CH7_Pos (15UL) /*!< GPDMA0 SGLREQDSTREG: WE_CH7 (Bit 15) */ -#define GPDMA0_SGLREQDSTREG_WE_CH7_Msk (0x8000UL) /*!< GPDMA0 SGLREQDSTREG: WE_CH7 (Bitfield-Mask: 0x01) */ - -/* ------------------------------ GPDMA0_LSTSRCREG ------------------------------ */ -#define GPDMA0_LSTSRCREG_CH0_Pos (0UL) /*!< GPDMA0 LSTSRCREG: CH0 (Bit 0) */ -#define GPDMA0_LSTSRCREG_CH0_Msk (0x1UL) /*!< GPDMA0 LSTSRCREG: CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA0_LSTSRCREG_CH1_Pos (1UL) /*!< GPDMA0 LSTSRCREG: CH1 (Bit 1) */ -#define GPDMA0_LSTSRCREG_CH1_Msk (0x2UL) /*!< GPDMA0 LSTSRCREG: CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA0_LSTSRCREG_CH2_Pos (2UL) /*!< GPDMA0 LSTSRCREG: CH2 (Bit 2) */ -#define GPDMA0_LSTSRCREG_CH2_Msk (0x4UL) /*!< GPDMA0 LSTSRCREG: CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA0_LSTSRCREG_CH3_Pos (3UL) /*!< GPDMA0 LSTSRCREG: CH3 (Bit 3) */ -#define GPDMA0_LSTSRCREG_CH3_Msk (0x8UL) /*!< GPDMA0 LSTSRCREG: CH3 (Bitfield-Mask: 0x01) */ -#define GPDMA0_LSTSRCREG_CH4_Pos (4UL) /*!< GPDMA0 LSTSRCREG: CH4 (Bit 4) */ -#define GPDMA0_LSTSRCREG_CH4_Msk (0x10UL) /*!< GPDMA0 LSTSRCREG: CH4 (Bitfield-Mask: 0x01) */ -#define GPDMA0_LSTSRCREG_CH5_Pos (5UL) /*!< GPDMA0 LSTSRCREG: CH5 (Bit 5) */ -#define GPDMA0_LSTSRCREG_CH5_Msk (0x20UL) /*!< GPDMA0 LSTSRCREG: CH5 (Bitfield-Mask: 0x01) */ -#define GPDMA0_LSTSRCREG_CH6_Pos (6UL) /*!< GPDMA0 LSTSRCREG: CH6 (Bit 6) */ -#define GPDMA0_LSTSRCREG_CH6_Msk (0x40UL) /*!< GPDMA0 LSTSRCREG: CH6 (Bitfield-Mask: 0x01) */ -#define GPDMA0_LSTSRCREG_CH7_Pos (7UL) /*!< GPDMA0 LSTSRCREG: CH7 (Bit 7) */ -#define GPDMA0_LSTSRCREG_CH7_Msk (0x80UL) /*!< GPDMA0 LSTSRCREG: CH7 (Bitfield-Mask: 0x01) */ -#define GPDMA0_LSTSRCREG_WE_CH0_Pos (8UL) /*!< GPDMA0 LSTSRCREG: WE_CH0 (Bit 8) */ -#define GPDMA0_LSTSRCREG_WE_CH0_Msk (0x100UL) /*!< GPDMA0 LSTSRCREG: WE_CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA0_LSTSRCREG_WE_CH1_Pos (9UL) /*!< GPDMA0 LSTSRCREG: WE_CH1 (Bit 9) */ -#define GPDMA0_LSTSRCREG_WE_CH1_Msk (0x200UL) /*!< GPDMA0 LSTSRCREG: WE_CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA0_LSTSRCREG_WE_CH2_Pos (10UL) /*!< GPDMA0 LSTSRCREG: WE_CH2 (Bit 10) */ -#define GPDMA0_LSTSRCREG_WE_CH2_Msk (0x400UL) /*!< GPDMA0 LSTSRCREG: WE_CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA0_LSTSRCREG_WE_CH3_Pos (11UL) /*!< GPDMA0 LSTSRCREG: WE_CH3 (Bit 11) */ -#define GPDMA0_LSTSRCREG_WE_CH3_Msk (0x800UL) /*!< GPDMA0 LSTSRCREG: WE_CH3 (Bitfield-Mask: 0x01) */ -#define GPDMA0_LSTSRCREG_WE_CH4_Pos (12UL) /*!< GPDMA0 LSTSRCREG: WE_CH4 (Bit 12) */ -#define GPDMA0_LSTSRCREG_WE_CH4_Msk (0x1000UL) /*!< GPDMA0 LSTSRCREG: WE_CH4 (Bitfield-Mask: 0x01) */ -#define GPDMA0_LSTSRCREG_WE_CH5_Pos (13UL) /*!< GPDMA0 LSTSRCREG: WE_CH5 (Bit 13) */ -#define GPDMA0_LSTSRCREG_WE_CH5_Msk (0x2000UL) /*!< GPDMA0 LSTSRCREG: WE_CH5 (Bitfield-Mask: 0x01) */ -#define GPDMA0_LSTSRCREG_WE_CH6_Pos (14UL) /*!< GPDMA0 LSTSRCREG: WE_CH6 (Bit 14) */ -#define GPDMA0_LSTSRCREG_WE_CH6_Msk (0x4000UL) /*!< GPDMA0 LSTSRCREG: WE_CH6 (Bitfield-Mask: 0x01) */ -#define GPDMA0_LSTSRCREG_WE_CH7_Pos (15UL) /*!< GPDMA0 LSTSRCREG: WE_CH7 (Bit 15) */ -#define GPDMA0_LSTSRCREG_WE_CH7_Msk (0x8000UL) /*!< GPDMA0 LSTSRCREG: WE_CH7 (Bitfield-Mask: 0x01) */ - -/* ------------------------------ GPDMA0_LSTDSTREG ------------------------------ */ -#define GPDMA0_LSTDSTREG_CH0_Pos (0UL) /*!< GPDMA0 LSTDSTREG: CH0 (Bit 0) */ -#define GPDMA0_LSTDSTREG_CH0_Msk (0x1UL) /*!< GPDMA0 LSTDSTREG: CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA0_LSTDSTREG_CH1_Pos (1UL) /*!< GPDMA0 LSTDSTREG: CH1 (Bit 1) */ -#define GPDMA0_LSTDSTREG_CH1_Msk (0x2UL) /*!< GPDMA0 LSTDSTREG: CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA0_LSTDSTREG_CH2_Pos (2UL) /*!< GPDMA0 LSTDSTREG: CH2 (Bit 2) */ -#define GPDMA0_LSTDSTREG_CH2_Msk (0x4UL) /*!< GPDMA0 LSTDSTREG: CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA0_LSTDSTREG_CH3_Pos (3UL) /*!< GPDMA0 LSTDSTREG: CH3 (Bit 3) */ -#define GPDMA0_LSTDSTREG_CH3_Msk (0x8UL) /*!< GPDMA0 LSTDSTREG: CH3 (Bitfield-Mask: 0x01) */ -#define GPDMA0_LSTDSTREG_CH4_Pos (4UL) /*!< GPDMA0 LSTDSTREG: CH4 (Bit 4) */ -#define GPDMA0_LSTDSTREG_CH4_Msk (0x10UL) /*!< GPDMA0 LSTDSTREG: CH4 (Bitfield-Mask: 0x01) */ -#define GPDMA0_LSTDSTREG_CH5_Pos (5UL) /*!< GPDMA0 LSTDSTREG: CH5 (Bit 5) */ -#define GPDMA0_LSTDSTREG_CH5_Msk (0x20UL) /*!< GPDMA0 LSTDSTREG: CH5 (Bitfield-Mask: 0x01) */ -#define GPDMA0_LSTDSTREG_CH6_Pos (6UL) /*!< GPDMA0 LSTDSTREG: CH6 (Bit 6) */ -#define GPDMA0_LSTDSTREG_CH6_Msk (0x40UL) /*!< GPDMA0 LSTDSTREG: CH6 (Bitfield-Mask: 0x01) */ -#define GPDMA0_LSTDSTREG_CH7_Pos (7UL) /*!< GPDMA0 LSTDSTREG: CH7 (Bit 7) */ -#define GPDMA0_LSTDSTREG_CH7_Msk (0x80UL) /*!< GPDMA0 LSTDSTREG: CH7 (Bitfield-Mask: 0x01) */ -#define GPDMA0_LSTDSTREG_WE_CH0_Pos (8UL) /*!< GPDMA0 LSTDSTREG: WE_CH0 (Bit 8) */ -#define GPDMA0_LSTDSTREG_WE_CH0_Msk (0x100UL) /*!< GPDMA0 LSTDSTREG: WE_CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA0_LSTDSTREG_WE_CH1_Pos (9UL) /*!< GPDMA0 LSTDSTREG: WE_CH1 (Bit 9) */ -#define GPDMA0_LSTDSTREG_WE_CH1_Msk (0x200UL) /*!< GPDMA0 LSTDSTREG: WE_CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA0_LSTDSTREG_WE_CH2_Pos (10UL) /*!< GPDMA0 LSTDSTREG: WE_CH2 (Bit 10) */ -#define GPDMA0_LSTDSTREG_WE_CH2_Msk (0x400UL) /*!< GPDMA0 LSTDSTREG: WE_CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA0_LSTDSTREG_WE_CH3_Pos (11UL) /*!< GPDMA0 LSTDSTREG: WE_CH3 (Bit 11) */ -#define GPDMA0_LSTDSTREG_WE_CH3_Msk (0x800UL) /*!< GPDMA0 LSTDSTREG: WE_CH3 (Bitfield-Mask: 0x01) */ -#define GPDMA0_LSTDSTREG_WE_CH4_Pos (12UL) /*!< GPDMA0 LSTDSTREG: WE_CH4 (Bit 12) */ -#define GPDMA0_LSTDSTREG_WE_CH4_Msk (0x1000UL) /*!< GPDMA0 LSTDSTREG: WE_CH4 (Bitfield-Mask: 0x01) */ -#define GPDMA0_LSTDSTREG_WE_CH5_Pos (13UL) /*!< GPDMA0 LSTDSTREG: WE_CH5 (Bit 13) */ -#define GPDMA0_LSTDSTREG_WE_CH5_Msk (0x2000UL) /*!< GPDMA0 LSTDSTREG: WE_CH5 (Bitfield-Mask: 0x01) */ -#define GPDMA0_LSTDSTREG_WE_CH6_Pos (14UL) /*!< GPDMA0 LSTDSTREG: WE_CH6 (Bit 14) */ -#define GPDMA0_LSTDSTREG_WE_CH6_Msk (0x4000UL) /*!< GPDMA0 LSTDSTREG: WE_CH6 (Bitfield-Mask: 0x01) */ -#define GPDMA0_LSTDSTREG_WE_CH7_Pos (15UL) /*!< GPDMA0 LSTDSTREG: WE_CH7 (Bit 15) */ -#define GPDMA0_LSTDSTREG_WE_CH7_Msk (0x8000UL) /*!< GPDMA0 LSTDSTREG: WE_CH7 (Bitfield-Mask: 0x01) */ - -/* ------------------------------ GPDMA0_DMACFGREG ------------------------------ */ -#define GPDMA0_DMACFGREG_DMA_EN_Pos (0UL) /*!< GPDMA0 DMACFGREG: DMA_EN (Bit 0) */ -#define GPDMA0_DMACFGREG_DMA_EN_Msk (0x1UL) /*!< GPDMA0 DMACFGREG: DMA_EN (Bitfield-Mask: 0x01) */ - -/* ------------------------------- GPDMA0_CHENREG ------------------------------- */ -#define GPDMA0_CHENREG_CH_Pos (0UL) /*!< GPDMA0 CHENREG: CH (Bit 0) */ -#define GPDMA0_CHENREG_CH_Msk (0xffUL) /*!< GPDMA0 CHENREG: CH (Bitfield-Mask: 0xff) */ -#define GPDMA0_CHENREG_WE_CH_Pos (8UL) /*!< GPDMA0 CHENREG: WE_CH (Bit 8) */ -#define GPDMA0_CHENREG_WE_CH_Msk (0xff00UL) /*!< GPDMA0 CHENREG: WE_CH (Bitfield-Mask: 0xff) */ - -/* ---------------------------------- GPDMA0_ID --------------------------------- */ -#define GPDMA0_ID_VALUE_Pos (0UL) /*!< GPDMA0 ID: VALUE (Bit 0) */ -#define GPDMA0_ID_VALUE_Msk (0xffffffffUL) /*!< GPDMA0 ID: VALUE (Bitfield-Mask: 0xffffffff) */ - -/* --------------------------------- GPDMA0_TYPE -------------------------------- */ -#define GPDMA0_TYPE_VALUE_Pos (0UL) /*!< GPDMA0 TYPE: VALUE (Bit 0) */ -#define GPDMA0_TYPE_VALUE_Msk (0xffffffffUL) /*!< GPDMA0 TYPE: VALUE (Bitfield-Mask: 0xffffffff) */ - -/* ------------------------------- GPDMA0_VERSION ------------------------------- */ -#define GPDMA0_VERSION_VALUE_Pos (0UL) /*!< GPDMA0 VERSION: VALUE (Bit 0) */ -#define GPDMA0_VERSION_VALUE_Msk (0xffffffffUL) /*!< GPDMA0 VERSION: VALUE (Bitfield-Mask: 0xffffffff) */ - - -/* ================================================================================ */ -/* ================ Group 'GPDMA0_CH0_1' Position & Mask ================ */ -/* ================================================================================ */ - - -/* ------------------------------ GPDMA0_CH_SAR ------------------------------ */ -#define GPDMA0_CH_SAR_SAR_Pos (0UL) /*!< GPDMA0_CH0_1 SAR: SAR (Bit 0) */ -#define GPDMA0_CH_SAR_SAR_Msk (0xffffffffUL) /*!< GPDMA0_CH0_1 SAR: SAR (Bitfield-Mask: 0xffffffff) */ - -/* ------------------------------ GPDMA0_CH_DAR ------------------------------ */ -#define GPDMA0_CH_DAR_DAR_Pos (0UL) /*!< GPDMA0_CH0_1 DAR: DAR (Bit 0) */ -#define GPDMA0_CH_DAR_DAR_Msk (0xffffffffUL) /*!< GPDMA0_CH0_1 DAR: DAR (Bitfield-Mask: 0xffffffff) */ - -/* ------------------------------ GPDMA0_CH_LLP ------------------------------ */ -#define GPDMA0_CH_LLP_LOC_Pos (2UL) /*!< GPDMA0_CH0_1 LLP: LOC (Bit 2) */ -#define GPDMA0_CH_LLP_LOC_Msk (0xfffffffcUL) /*!< GPDMA0_CH0_1 LLP: LOC (Bitfield-Mask: 0x3fffffff) */ - -/* ------------------------------ GPDMA0_CH_CTLL ----------------------------- */ -#define GPDMA0_CH_CTLL_INT_EN_Pos (0UL) /*!< GPDMA0_CH0_1 CTLL: INT_EN (Bit 0) */ -#define GPDMA0_CH_CTLL_INT_EN_Msk (0x1UL) /*!< GPDMA0_CH0_1 CTLL: INT_EN (Bitfield-Mask: 0x01) */ -#define GPDMA0_CH_CTLL_DST_TR_WIDTH_Pos (1UL) /*!< GPDMA0_CH0_1 CTLL: DST_TR_WIDTH (Bit 1) */ -#define GPDMA0_CH_CTLL_DST_TR_WIDTH_Msk (0xeUL) /*!< GPDMA0_CH0_1 CTLL: DST_TR_WIDTH (Bitfield-Mask: 0x07) */ -#define GPDMA0_CH_CTLL_SRC_TR_WIDTH_Pos (4UL) /*!< GPDMA0_CH0_1 CTLL: SRC_TR_WIDTH (Bit 4) */ -#define GPDMA0_CH_CTLL_SRC_TR_WIDTH_Msk (0x70UL) /*!< GPDMA0_CH0_1 CTLL: SRC_TR_WIDTH (Bitfield-Mask: 0x07) */ -#define GPDMA0_CH_CTLL_DINC_Pos (7UL) /*!< GPDMA0_CH0_1 CTLL: DINC (Bit 7) */ -#define GPDMA0_CH_CTLL_DINC_Msk (0x180UL) /*!< GPDMA0_CH0_1 CTLL: DINC (Bitfield-Mask: 0x03) */ -#define GPDMA0_CH_CTLL_SINC_Pos (9UL) /*!< GPDMA0_CH0_1 CTLL: SINC (Bit 9) */ -#define GPDMA0_CH_CTLL_SINC_Msk (0x600UL) /*!< GPDMA0_CH0_1 CTLL: SINC (Bitfield-Mask: 0x03) */ -#define GPDMA0_CH_CTLL_DEST_MSIZE_Pos (11UL) /*!< GPDMA0_CH0_1 CTLL: DEST_MSIZE (Bit 11) */ -#define GPDMA0_CH_CTLL_DEST_MSIZE_Msk (0x3800UL) /*!< GPDMA0_CH0_1 CTLL: DEST_MSIZE (Bitfield-Mask: 0x07) */ -#define GPDMA0_CH_CTLL_SRC_MSIZE_Pos (14UL) /*!< GPDMA0_CH0_1 CTLL: SRC_MSIZE (Bit 14) */ -#define GPDMA0_CH_CTLL_SRC_MSIZE_Msk (0x1c000UL) /*!< GPDMA0_CH0_1 CTLL: SRC_MSIZE (Bitfield-Mask: 0x07) */ -#define GPDMA0_CH_CTLL_SRC_GATHER_EN_Pos (17UL) /*!< GPDMA0_CH0_1 CTLL: SRC_GATHER_EN (Bit 17) */ -#define GPDMA0_CH_CTLL_SRC_GATHER_EN_Msk (0x20000UL) /*!< GPDMA0_CH0_1 CTLL: SRC_GATHER_EN (Bitfield-Mask: 0x01) */ -#define GPDMA0_CH_CTLL_DST_SCATTER_EN_Pos (18UL) /*!< GPDMA0_CH0_1 CTLL: DST_SCATTER_EN (Bit 18) */ -#define GPDMA0_CH_CTLL_DST_SCATTER_EN_Msk (0x40000UL) /*!< GPDMA0_CH0_1 CTLL: DST_SCATTER_EN (Bitfield-Mask: 0x01) */ -#define GPDMA0_CH_CTLL_TT_FC_Pos (20UL) /*!< GPDMA0_CH0_1 CTLL: TT_FC (Bit 20) */ -#define GPDMA0_CH_CTLL_TT_FC_Msk (0x700000UL) /*!< GPDMA0_CH0_1 CTLL: TT_FC (Bitfield-Mask: 0x07) */ -#define GPDMA0_CH_CTLL_LLP_DST_EN_Pos (27UL) /*!< GPDMA0_CH0_1 CTLL: LLP_DST_EN (Bit 27) */ -#define GPDMA0_CH_CTLL_LLP_DST_EN_Msk (0x8000000UL) /*!< GPDMA0_CH0_1 CTLL: LLP_DST_EN (Bitfield-Mask: 0x01) */ -#define GPDMA0_CH_CTLL_LLP_SRC_EN_Pos (28UL) /*!< GPDMA0_CH0_1 CTLL: LLP_SRC_EN (Bit 28) */ -#define GPDMA0_CH_CTLL_LLP_SRC_EN_Msk (0x10000000UL) /*!< GPDMA0_CH0_1 CTLL: LLP_SRC_EN (Bitfield-Mask: 0x01) */ - -/* ------------------------------ GPDMA0_CH_CTLH ----------------------------- */ -#define GPDMA0_CH_CTLH_BLOCK_TS_Pos (0UL) /*!< GPDMA0_CH0_1 CTLH: BLOCK_TS (Bit 0) */ -#define GPDMA0_CH_CTLH_BLOCK_TS_Msk (0xfffUL) /*!< GPDMA0_CH0_1 CTLH: BLOCK_TS (Bitfield-Mask: 0xfff) */ -#define GPDMA0_CH_CTLH_DONE_Pos (12UL) /*!< GPDMA0_CH0_1 CTLH: DONE (Bit 12) */ -#define GPDMA0_CH_CTLH_DONE_Msk (0x1000UL) /*!< GPDMA0_CH0_1 CTLH: DONE (Bitfield-Mask: 0x01) */ - -/* ----------------------------- GPDMA0_CH_SSTAT ----------------------------- */ -#define GPDMA0_CH_SSTAT_SSTAT_Pos (0UL) /*!< GPDMA0_CH0_1 SSTAT: SSTAT (Bit 0) */ -#define GPDMA0_CH_SSTAT_SSTAT_Msk (0xffffffffUL) /*!< GPDMA0_CH0_1 SSTAT: SSTAT (Bitfield-Mask: 0xffffffff) */ - -/* ----------------------------- GPDMA0_CH_DSTAT ----------------------------- */ -#define GPDMA0_CH_DSTAT_DSTAT_Pos (0UL) /*!< GPDMA0_CH0_1 DSTAT: DSTAT (Bit 0) */ -#define GPDMA0_CH_DSTAT_DSTAT_Msk (0xffffffffUL) /*!< GPDMA0_CH0_1 DSTAT: DSTAT (Bitfield-Mask: 0xffffffff) */ - -/* ---------------------------- GPDMA0_CH_SSTATAR ---------------------------- */ -#define GPDMA0_CH_SSTATAR_SSTATAR_Pos (0UL) /*!< GPDMA0_CH0_1 SSTATAR: SSTATAR (Bit 0) */ -#define GPDMA0_CH_SSTATAR_SSTATAR_Msk (0xffffffffUL) /*!< GPDMA0_CH0_1 SSTATAR: SSTATAR (Bitfield-Mask: 0xffffffff) */ - -/* ---------------------------- GPDMA0_CH_DSTATAR ---------------------------- */ -#define GPDMA0_CH_DSTATAR_DSTATAR_Pos (0UL) /*!< GPDMA0_CH0_1 DSTATAR: DSTATAR (Bit 0) */ -#define GPDMA0_CH_DSTATAR_DSTATAR_Msk (0xffffffffUL) /*!< GPDMA0_CH0_1 DSTATAR: DSTATAR (Bitfield-Mask: 0xffffffff) */ - -/* ------------------------------ GPDMA0_CH_CFGL ----------------------------- */ -#define GPDMA0_CH_CFGL_CH_PRIOR_Pos (5UL) /*!< GPDMA0_CH0_1 CFGL: CH_PRIOR (Bit 5) */ -#define GPDMA0_CH_CFGL_CH_PRIOR_Msk (0xe0UL) /*!< GPDMA0_CH0_1 CFGL: CH_PRIOR (Bitfield-Mask: 0x07) */ -#define GPDMA0_CH_CFGL_CH_SUSP_Pos (8UL) /*!< GPDMA0_CH0_1 CFGL: CH_SUSP (Bit 8) */ -#define GPDMA0_CH_CFGL_CH_SUSP_Msk (0x100UL) /*!< GPDMA0_CH0_1 CFGL: CH_SUSP (Bitfield-Mask: 0x01) */ -#define GPDMA0_CH_CFGL_FIFO_EMPTY_Pos (9UL) /*!< GPDMA0_CH0_1 CFGL: FIFO_EMPTY (Bit 9) */ -#define GPDMA0_CH_CFGL_FIFO_EMPTY_Msk (0x200UL) /*!< GPDMA0_CH0_1 CFGL: FIFO_EMPTY (Bitfield-Mask: 0x01) */ -#define GPDMA0_CH_CFGL_HS_SEL_DST_Pos (10UL) /*!< GPDMA0_CH0_1 CFGL: HS_SEL_DST (Bit 10) */ -#define GPDMA0_CH_CFGL_HS_SEL_DST_Msk (0x400UL) /*!< GPDMA0_CH0_1 CFGL: HS_SEL_DST (Bitfield-Mask: 0x01) */ -#define GPDMA0_CH_CFGL_HS_SEL_SRC_Pos (11UL) /*!< GPDMA0_CH0_1 CFGL: HS_SEL_SRC (Bit 11) */ -#define GPDMA0_CH_CFGL_HS_SEL_SRC_Msk (0x800UL) /*!< GPDMA0_CH0_1 CFGL: HS_SEL_SRC (Bitfield-Mask: 0x01) */ -#define GPDMA0_CH_CFGL_LOCK_CH_L_Pos (12UL) /*!< GPDMA0_CH0_1 CFGL: LOCK_CH_L (Bit 12) */ -#define GPDMA0_CH_CFGL_LOCK_CH_L_Msk (0x3000UL) /*!< GPDMA0_CH0_1 CFGL: LOCK_CH_L (Bitfield-Mask: 0x03) */ -#define GPDMA0_CH_CFGL_LOCK_B_L_Pos (14UL) /*!< GPDMA0_CH0_1 CFGL: LOCK_B_L (Bit 14) */ -#define GPDMA0_CH_CFGL_LOCK_B_L_Msk (0xc000UL) /*!< GPDMA0_CH0_1 CFGL: LOCK_B_L (Bitfield-Mask: 0x03) */ -#define GPDMA0_CH_CFGL_LOCK_CH_Pos (16UL) /*!< GPDMA0_CH0_1 CFGL: LOCK_CH (Bit 16) */ -#define GPDMA0_CH_CFGL_LOCK_CH_Msk (0x10000UL) /*!< GPDMA0_CH0_1 CFGL: LOCK_CH (Bitfield-Mask: 0x01) */ -#define GPDMA0_CH_CFGL_LOCK_B_Pos (17UL) /*!< GPDMA0_CH0_1 CFGL: LOCK_B (Bit 17) */ -#define GPDMA0_CH_CFGL_LOCK_B_Msk (0x20000UL) /*!< GPDMA0_CH0_1 CFGL: LOCK_B (Bitfield-Mask: 0x01) */ -#define GPDMA0_CH_CFGL_DST_HS_POL_Pos (18UL) /*!< GPDMA0_CH0_1 CFGL: DST_HS_POL (Bit 18) */ -#define GPDMA0_CH_CFGL_DST_HS_POL_Msk (0x40000UL) /*!< GPDMA0_CH0_1 CFGL: DST_HS_POL (Bitfield-Mask: 0x01) */ -#define GPDMA0_CH_CFGL_SRC_HS_POL_Pos (19UL) /*!< GPDMA0_CH0_1 CFGL: SRC_HS_POL (Bit 19) */ -#define GPDMA0_CH_CFGL_SRC_HS_POL_Msk (0x80000UL) /*!< GPDMA0_CH0_1 CFGL: SRC_HS_POL (Bitfield-Mask: 0x01) */ -#define GPDMA0_CH_CFGL_MAX_ABRST_Pos (20UL) /*!< GPDMA0_CH0_1 CFGL: MAX_ABRST (Bit 20) */ -#define GPDMA0_CH_CFGL_MAX_ABRST_Msk (0x3ff00000UL) /*!< GPDMA0_CH0_1 CFGL: MAX_ABRST (Bitfield-Mask: 0x3ff) */ -#define GPDMA0_CH_CFGL_RELOAD_SRC_Pos (30UL) /*!< GPDMA0_CH0_1 CFGL: RELOAD_SRC (Bit 30) */ -#define GPDMA0_CH_CFGL_RELOAD_SRC_Msk (0x40000000UL) /*!< GPDMA0_CH0_1 CFGL: RELOAD_SRC (Bitfield-Mask: 0x01) */ -#define GPDMA0_CH_CFGL_RELOAD_DST_Pos (31UL) /*!< GPDMA0_CH0_1 CFGL: RELOAD_DST (Bit 31) */ -#define GPDMA0_CH_CFGL_RELOAD_DST_Msk (0x80000000UL) /*!< GPDMA0_CH0_1 CFGL: RELOAD_DST (Bitfield-Mask: 0x01) */ - -/* ------------------------------ GPDMA0_CH_CFGH ----------------------------- */ -#define GPDMA0_CH_CFGH_FCMODE_Pos (0UL) /*!< GPDMA0_CH0_1 CFGH: FCMODE (Bit 0) */ -#define GPDMA0_CH_CFGH_FCMODE_Msk (0x1UL) /*!< GPDMA0_CH0_1 CFGH: FCMODE (Bitfield-Mask: 0x01) */ -#define GPDMA0_CH_CFGH_FIFO_MODE_Pos (1UL) /*!< GPDMA0_CH0_1 CFGH: FIFO_MODE (Bit 1) */ -#define GPDMA0_CH_CFGH_FIFO_MODE_Msk (0x2UL) /*!< GPDMA0_CH0_1 CFGH: FIFO_MODE (Bitfield-Mask: 0x01) */ -#define GPDMA0_CH_CFGH_PROTCTL_Pos (2UL) /*!< GPDMA0_CH0_1 CFGH: PROTCTL (Bit 2) */ -#define GPDMA0_CH_CFGH_PROTCTL_Msk (0x1cUL) /*!< GPDMA0_CH0_1 CFGH: PROTCTL (Bitfield-Mask: 0x07) */ -#define GPDMA0_CH_CFGH_DS_UPD_EN_Pos (5UL) /*!< GPDMA0_CH0_1 CFGH: DS_UPD_EN (Bit 5) */ -#define GPDMA0_CH_CFGH_DS_UPD_EN_Msk (0x20UL) /*!< GPDMA0_CH0_1 CFGH: DS_UPD_EN (Bitfield-Mask: 0x01) */ -#define GPDMA0_CH_CFGH_SS_UPD_EN_Pos (6UL) /*!< GPDMA0_CH0_1 CFGH: SS_UPD_EN (Bit 6) */ -#define GPDMA0_CH_CFGH_SS_UPD_EN_Msk (0x40UL) /*!< GPDMA0_CH0_1 CFGH: SS_UPD_EN (Bitfield-Mask: 0x01) */ -#define GPDMA0_CH_CFGH_SRC_PER_Pos (7UL) /*!< GPDMA0_CH0_1 CFGH: SRC_PER (Bit 7) */ -#define GPDMA0_CH_CFGH_SRC_PER_Msk (0x780UL) /*!< GPDMA0_CH0_1 CFGH: SRC_PER (Bitfield-Mask: 0x0f) */ -#define GPDMA0_CH_CFGH_DEST_PER_Pos (11UL) /*!< GPDMA0_CH0_1 CFGH: DEST_PER (Bit 11) */ -#define GPDMA0_CH_CFGH_DEST_PER_Msk (0x7800UL) /*!< GPDMA0_CH0_1 CFGH: DEST_PER (Bitfield-Mask: 0x0f) */ - -/* ------------------------------ GPDMA0_CH_SGR ------------------------------ */ -#define GPDMA0_CH_SGR_SGI_Pos (0UL) /*!< GPDMA0_CH0_1 SGR: SGI (Bit 0) */ -#define GPDMA0_CH_SGR_SGI_Msk (0xfffffUL) /*!< GPDMA0_CH0_1 SGR: SGI (Bitfield-Mask: 0xfffff) */ -#define GPDMA0_CH_SGR_SGC_Pos (20UL) /*!< GPDMA0_CH0_1 SGR: SGC (Bit 20) */ -#define GPDMA0_CH_SGR_SGC_Msk (0xfff00000UL) /*!< GPDMA0_CH0_1 SGR: SGC (Bitfield-Mask: 0xfff) */ - -/* ------------------------------ GPDMA0_CH_DSR ------------------------------ */ -#define GPDMA0_CH_DSR_DSI_Pos (0UL) /*!< GPDMA0_CH0_1 DSR: DSI (Bit 0) */ -#define GPDMA0_CH_DSR_DSI_Msk (0xfffffUL) /*!< GPDMA0_CH0_1 DSR: DSI (Bitfield-Mask: 0xfffff) */ -#define GPDMA0_CH_DSR_DSC_Pos (20UL) /*!< GPDMA0_CH0_1 DSR: DSC (Bit 20) */ -#define GPDMA0_CH_DSR_DSC_Msk (0xfff00000UL) /*!< GPDMA0_CH0_1 DSR: DSC (Bitfield-Mask: 0xfff) */ - - -/* ================================================================================ */ -/* ================ struct 'GPDMA1' Position & Mask ================ */ -/* ================================================================================ */ - - -/* -------------------------------- GPDMA1_RAWTFR ------------------------------- */ -#define GPDMA1_RAWTFR_CH0_Pos (0UL) /*!< GPDMA1 RAWTFR: CH0 (Bit 0) */ -#define GPDMA1_RAWTFR_CH0_Msk (0x1UL) /*!< GPDMA1 RAWTFR: CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA1_RAWTFR_CH1_Pos (1UL) /*!< GPDMA1 RAWTFR: CH1 (Bit 1) */ -#define GPDMA1_RAWTFR_CH1_Msk (0x2UL) /*!< GPDMA1 RAWTFR: CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA1_RAWTFR_CH2_Pos (2UL) /*!< GPDMA1 RAWTFR: CH2 (Bit 2) */ -#define GPDMA1_RAWTFR_CH2_Msk (0x4UL) /*!< GPDMA1 RAWTFR: CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA1_RAWTFR_CH3_Pos (3UL) /*!< GPDMA1 RAWTFR: CH3 (Bit 3) */ -#define GPDMA1_RAWTFR_CH3_Msk (0x8UL) /*!< GPDMA1 RAWTFR: CH3 (Bitfield-Mask: 0x01) */ - -/* ------------------------------- GPDMA1_RAWBLOCK ------------------------------ */ -#define GPDMA1_RAWBLOCK_CH0_Pos (0UL) /*!< GPDMA1 RAWBLOCK: CH0 (Bit 0) */ -#define GPDMA1_RAWBLOCK_CH0_Msk (0x1UL) /*!< GPDMA1 RAWBLOCK: CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA1_RAWBLOCK_CH1_Pos (1UL) /*!< GPDMA1 RAWBLOCK: CH1 (Bit 1) */ -#define GPDMA1_RAWBLOCK_CH1_Msk (0x2UL) /*!< GPDMA1 RAWBLOCK: CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA1_RAWBLOCK_CH2_Pos (2UL) /*!< GPDMA1 RAWBLOCK: CH2 (Bit 2) */ -#define GPDMA1_RAWBLOCK_CH2_Msk (0x4UL) /*!< GPDMA1 RAWBLOCK: CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA1_RAWBLOCK_CH3_Pos (3UL) /*!< GPDMA1 RAWBLOCK: CH3 (Bit 3) */ -#define GPDMA1_RAWBLOCK_CH3_Msk (0x8UL) /*!< GPDMA1 RAWBLOCK: CH3 (Bitfield-Mask: 0x01) */ - -/* ------------------------------ GPDMA1_RAWSRCTRAN ----------------------------- */ -#define GPDMA1_RAWSRCTRAN_CH0_Pos (0UL) /*!< GPDMA1 RAWSRCTRAN: CH0 (Bit 0) */ -#define GPDMA1_RAWSRCTRAN_CH0_Msk (0x1UL) /*!< GPDMA1 RAWSRCTRAN: CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA1_RAWSRCTRAN_CH1_Pos (1UL) /*!< GPDMA1 RAWSRCTRAN: CH1 (Bit 1) */ -#define GPDMA1_RAWSRCTRAN_CH1_Msk (0x2UL) /*!< GPDMA1 RAWSRCTRAN: CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA1_RAWSRCTRAN_CH2_Pos (2UL) /*!< GPDMA1 RAWSRCTRAN: CH2 (Bit 2) */ -#define GPDMA1_RAWSRCTRAN_CH2_Msk (0x4UL) /*!< GPDMA1 RAWSRCTRAN: CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA1_RAWSRCTRAN_CH3_Pos (3UL) /*!< GPDMA1 RAWSRCTRAN: CH3 (Bit 3) */ -#define GPDMA1_RAWSRCTRAN_CH3_Msk (0x8UL) /*!< GPDMA1 RAWSRCTRAN: CH3 (Bitfield-Mask: 0x01) */ - -/* ------------------------------ GPDMA1_RAWDSTTRAN ----------------------------- */ -#define GPDMA1_RAWDSTTRAN_CH0_Pos (0UL) /*!< GPDMA1 RAWDSTTRAN: CH0 (Bit 0) */ -#define GPDMA1_RAWDSTTRAN_CH0_Msk (0x1UL) /*!< GPDMA1 RAWDSTTRAN: CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA1_RAWDSTTRAN_CH1_Pos (1UL) /*!< GPDMA1 RAWDSTTRAN: CH1 (Bit 1) */ -#define GPDMA1_RAWDSTTRAN_CH1_Msk (0x2UL) /*!< GPDMA1 RAWDSTTRAN: CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA1_RAWDSTTRAN_CH2_Pos (2UL) /*!< GPDMA1 RAWDSTTRAN: CH2 (Bit 2) */ -#define GPDMA1_RAWDSTTRAN_CH2_Msk (0x4UL) /*!< GPDMA1 RAWDSTTRAN: CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA1_RAWDSTTRAN_CH3_Pos (3UL) /*!< GPDMA1 RAWDSTTRAN: CH3 (Bit 3) */ -#define GPDMA1_RAWDSTTRAN_CH3_Msk (0x8UL) /*!< GPDMA1 RAWDSTTRAN: CH3 (Bitfield-Mask: 0x01) */ - -/* -------------------------------- GPDMA1_RAWERR ------------------------------- */ -#define GPDMA1_RAWERR_CH0_Pos (0UL) /*!< GPDMA1 RAWERR: CH0 (Bit 0) */ -#define GPDMA1_RAWERR_CH0_Msk (0x1UL) /*!< GPDMA1 RAWERR: CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA1_RAWERR_CH1_Pos (1UL) /*!< GPDMA1 RAWERR: CH1 (Bit 1) */ -#define GPDMA1_RAWERR_CH1_Msk (0x2UL) /*!< GPDMA1 RAWERR: CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA1_RAWERR_CH2_Pos (2UL) /*!< GPDMA1 RAWERR: CH2 (Bit 2) */ -#define GPDMA1_RAWERR_CH2_Msk (0x4UL) /*!< GPDMA1 RAWERR: CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA1_RAWERR_CH3_Pos (3UL) /*!< GPDMA1 RAWERR: CH3 (Bit 3) */ -#define GPDMA1_RAWERR_CH3_Msk (0x8UL) /*!< GPDMA1 RAWERR: CH3 (Bitfield-Mask: 0x01) */ - -/* ------------------------------ GPDMA1_STATUSTFR ------------------------------ */ -#define GPDMA1_STATUSTFR_CH0_Pos (0UL) /*!< GPDMA1 STATUSTFR: CH0 (Bit 0) */ -#define GPDMA1_STATUSTFR_CH0_Msk (0x1UL) /*!< GPDMA1 STATUSTFR: CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA1_STATUSTFR_CH1_Pos (1UL) /*!< GPDMA1 STATUSTFR: CH1 (Bit 1) */ -#define GPDMA1_STATUSTFR_CH1_Msk (0x2UL) /*!< GPDMA1 STATUSTFR: CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA1_STATUSTFR_CH2_Pos (2UL) /*!< GPDMA1 STATUSTFR: CH2 (Bit 2) */ -#define GPDMA1_STATUSTFR_CH2_Msk (0x4UL) /*!< GPDMA1 STATUSTFR: CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA1_STATUSTFR_CH3_Pos (3UL) /*!< GPDMA1 STATUSTFR: CH3 (Bit 3) */ -#define GPDMA1_STATUSTFR_CH3_Msk (0x8UL) /*!< GPDMA1 STATUSTFR: CH3 (Bitfield-Mask: 0x01) */ - -/* ----------------------------- GPDMA1_STATUSBLOCK ----------------------------- */ -#define GPDMA1_STATUSBLOCK_CH0_Pos (0UL) /*!< GPDMA1 STATUSBLOCK: CH0 (Bit 0) */ -#define GPDMA1_STATUSBLOCK_CH0_Msk (0x1UL) /*!< GPDMA1 STATUSBLOCK: CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA1_STATUSBLOCK_CH1_Pos (1UL) /*!< GPDMA1 STATUSBLOCK: CH1 (Bit 1) */ -#define GPDMA1_STATUSBLOCK_CH1_Msk (0x2UL) /*!< GPDMA1 STATUSBLOCK: CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA1_STATUSBLOCK_CH2_Pos (2UL) /*!< GPDMA1 STATUSBLOCK: CH2 (Bit 2) */ -#define GPDMA1_STATUSBLOCK_CH2_Msk (0x4UL) /*!< GPDMA1 STATUSBLOCK: CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA1_STATUSBLOCK_CH3_Pos (3UL) /*!< GPDMA1 STATUSBLOCK: CH3 (Bit 3) */ -#define GPDMA1_STATUSBLOCK_CH3_Msk (0x8UL) /*!< GPDMA1 STATUSBLOCK: CH3 (Bitfield-Mask: 0x01) */ - -/* ---------------------------- GPDMA1_STATUSSRCTRAN ---------------------------- */ -#define GPDMA1_STATUSSRCTRAN_CH0_Pos (0UL) /*!< GPDMA1 STATUSSRCTRAN: CH0 (Bit 0) */ -#define GPDMA1_STATUSSRCTRAN_CH0_Msk (0x1UL) /*!< GPDMA1 STATUSSRCTRAN: CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA1_STATUSSRCTRAN_CH1_Pos (1UL) /*!< GPDMA1 STATUSSRCTRAN: CH1 (Bit 1) */ -#define GPDMA1_STATUSSRCTRAN_CH1_Msk (0x2UL) /*!< GPDMA1 STATUSSRCTRAN: CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA1_STATUSSRCTRAN_CH2_Pos (2UL) /*!< GPDMA1 STATUSSRCTRAN: CH2 (Bit 2) */ -#define GPDMA1_STATUSSRCTRAN_CH2_Msk (0x4UL) /*!< GPDMA1 STATUSSRCTRAN: CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA1_STATUSSRCTRAN_CH3_Pos (3UL) /*!< GPDMA1 STATUSSRCTRAN: CH3 (Bit 3) */ -#define GPDMA1_STATUSSRCTRAN_CH3_Msk (0x8UL) /*!< GPDMA1 STATUSSRCTRAN: CH3 (Bitfield-Mask: 0x01) */ - -/* ---------------------------- GPDMA1_STATUSDSTTRAN ---------------------------- */ -#define GPDMA1_STATUSDSTTRAN_CH0_Pos (0UL) /*!< GPDMA1 STATUSDSTTRAN: CH0 (Bit 0) */ -#define GPDMA1_STATUSDSTTRAN_CH0_Msk (0x1UL) /*!< GPDMA1 STATUSDSTTRAN: CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA1_STATUSDSTTRAN_CH1_Pos (1UL) /*!< GPDMA1 STATUSDSTTRAN: CH1 (Bit 1) */ -#define GPDMA1_STATUSDSTTRAN_CH1_Msk (0x2UL) /*!< GPDMA1 STATUSDSTTRAN: CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA1_STATUSDSTTRAN_CH2_Pos (2UL) /*!< GPDMA1 STATUSDSTTRAN: CH2 (Bit 2) */ -#define GPDMA1_STATUSDSTTRAN_CH2_Msk (0x4UL) /*!< GPDMA1 STATUSDSTTRAN: CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA1_STATUSDSTTRAN_CH3_Pos (3UL) /*!< GPDMA1 STATUSDSTTRAN: CH3 (Bit 3) */ -#define GPDMA1_STATUSDSTTRAN_CH3_Msk (0x8UL) /*!< GPDMA1 STATUSDSTTRAN: CH3 (Bitfield-Mask: 0x01) */ - -/* ------------------------------ GPDMA1_STATUSERR ------------------------------ */ -#define GPDMA1_STATUSERR_CH0_Pos (0UL) /*!< GPDMA1 STATUSERR: CH0 (Bit 0) */ -#define GPDMA1_STATUSERR_CH0_Msk (0x1UL) /*!< GPDMA1 STATUSERR: CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA1_STATUSERR_CH1_Pos (1UL) /*!< GPDMA1 STATUSERR: CH1 (Bit 1) */ -#define GPDMA1_STATUSERR_CH1_Msk (0x2UL) /*!< GPDMA1 STATUSERR: CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA1_STATUSERR_CH2_Pos (2UL) /*!< GPDMA1 STATUSERR: CH2 (Bit 2) */ -#define GPDMA1_STATUSERR_CH2_Msk (0x4UL) /*!< GPDMA1 STATUSERR: CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA1_STATUSERR_CH3_Pos (3UL) /*!< GPDMA1 STATUSERR: CH3 (Bit 3) */ -#define GPDMA1_STATUSERR_CH3_Msk (0x8UL) /*!< GPDMA1 STATUSERR: CH3 (Bitfield-Mask: 0x01) */ - -/* ------------------------------- GPDMA1_MASKTFR ------------------------------- */ -#define GPDMA1_MASKTFR_CH0_Pos (0UL) /*!< GPDMA1 MASKTFR: CH0 (Bit 0) */ -#define GPDMA1_MASKTFR_CH0_Msk (0x1UL) /*!< GPDMA1 MASKTFR: CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA1_MASKTFR_CH1_Pos (1UL) /*!< GPDMA1 MASKTFR: CH1 (Bit 1) */ -#define GPDMA1_MASKTFR_CH1_Msk (0x2UL) /*!< GPDMA1 MASKTFR: CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA1_MASKTFR_CH2_Pos (2UL) /*!< GPDMA1 MASKTFR: CH2 (Bit 2) */ -#define GPDMA1_MASKTFR_CH2_Msk (0x4UL) /*!< GPDMA1 MASKTFR: CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA1_MASKTFR_CH3_Pos (3UL) /*!< GPDMA1 MASKTFR: CH3 (Bit 3) */ -#define GPDMA1_MASKTFR_CH3_Msk (0x8UL) /*!< GPDMA1 MASKTFR: CH3 (Bitfield-Mask: 0x01) */ -#define GPDMA1_MASKTFR_WE_CH0_Pos (8UL) /*!< GPDMA1 MASKTFR: WE_CH0 (Bit 8) */ -#define GPDMA1_MASKTFR_WE_CH0_Msk (0x100UL) /*!< GPDMA1 MASKTFR: WE_CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA1_MASKTFR_WE_CH1_Pos (9UL) /*!< GPDMA1 MASKTFR: WE_CH1 (Bit 9) */ -#define GPDMA1_MASKTFR_WE_CH1_Msk (0x200UL) /*!< GPDMA1 MASKTFR: WE_CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA1_MASKTFR_WE_CH2_Pos (10UL) /*!< GPDMA1 MASKTFR: WE_CH2 (Bit 10) */ -#define GPDMA1_MASKTFR_WE_CH2_Msk (0x400UL) /*!< GPDMA1 MASKTFR: WE_CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA1_MASKTFR_WE_CH3_Pos (11UL) /*!< GPDMA1 MASKTFR: WE_CH3 (Bit 11) */ -#define GPDMA1_MASKTFR_WE_CH3_Msk (0x800UL) /*!< GPDMA1 MASKTFR: WE_CH3 (Bitfield-Mask: 0x01) */ - -/* ------------------------------ GPDMA1_MASKBLOCK ------------------------------ */ -#define GPDMA1_MASKBLOCK_CH0_Pos (0UL) /*!< GPDMA1 MASKBLOCK: CH0 (Bit 0) */ -#define GPDMA1_MASKBLOCK_CH0_Msk (0x1UL) /*!< GPDMA1 MASKBLOCK: CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA1_MASKBLOCK_CH1_Pos (1UL) /*!< GPDMA1 MASKBLOCK: CH1 (Bit 1) */ -#define GPDMA1_MASKBLOCK_CH1_Msk (0x2UL) /*!< GPDMA1 MASKBLOCK: CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA1_MASKBLOCK_CH2_Pos (2UL) /*!< GPDMA1 MASKBLOCK: CH2 (Bit 2) */ -#define GPDMA1_MASKBLOCK_CH2_Msk (0x4UL) /*!< GPDMA1 MASKBLOCK: CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA1_MASKBLOCK_CH3_Pos (3UL) /*!< GPDMA1 MASKBLOCK: CH3 (Bit 3) */ -#define GPDMA1_MASKBLOCK_CH3_Msk (0x8UL) /*!< GPDMA1 MASKBLOCK: CH3 (Bitfield-Mask: 0x01) */ -#define GPDMA1_MASKBLOCK_WE_CH0_Pos (8UL) /*!< GPDMA1 MASKBLOCK: WE_CH0 (Bit 8) */ -#define GPDMA1_MASKBLOCK_WE_CH0_Msk (0x100UL) /*!< GPDMA1 MASKBLOCK: WE_CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA1_MASKBLOCK_WE_CH1_Pos (9UL) /*!< GPDMA1 MASKBLOCK: WE_CH1 (Bit 9) */ -#define GPDMA1_MASKBLOCK_WE_CH1_Msk (0x200UL) /*!< GPDMA1 MASKBLOCK: WE_CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA1_MASKBLOCK_WE_CH2_Pos (10UL) /*!< GPDMA1 MASKBLOCK: WE_CH2 (Bit 10) */ -#define GPDMA1_MASKBLOCK_WE_CH2_Msk (0x400UL) /*!< GPDMA1 MASKBLOCK: WE_CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA1_MASKBLOCK_WE_CH3_Pos (11UL) /*!< GPDMA1 MASKBLOCK: WE_CH3 (Bit 11) */ -#define GPDMA1_MASKBLOCK_WE_CH3_Msk (0x800UL) /*!< GPDMA1 MASKBLOCK: WE_CH3 (Bitfield-Mask: 0x01) */ - -/* ----------------------------- GPDMA1_MASKSRCTRAN ----------------------------- */ -#define GPDMA1_MASKSRCTRAN_CH0_Pos (0UL) /*!< GPDMA1 MASKSRCTRAN: CH0 (Bit 0) */ -#define GPDMA1_MASKSRCTRAN_CH0_Msk (0x1UL) /*!< GPDMA1 MASKSRCTRAN: CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA1_MASKSRCTRAN_CH1_Pos (1UL) /*!< GPDMA1 MASKSRCTRAN: CH1 (Bit 1) */ -#define GPDMA1_MASKSRCTRAN_CH1_Msk (0x2UL) /*!< GPDMA1 MASKSRCTRAN: CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA1_MASKSRCTRAN_CH2_Pos (2UL) /*!< GPDMA1 MASKSRCTRAN: CH2 (Bit 2) */ -#define GPDMA1_MASKSRCTRAN_CH2_Msk (0x4UL) /*!< GPDMA1 MASKSRCTRAN: CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA1_MASKSRCTRAN_CH3_Pos (3UL) /*!< GPDMA1 MASKSRCTRAN: CH3 (Bit 3) */ -#define GPDMA1_MASKSRCTRAN_CH3_Msk (0x8UL) /*!< GPDMA1 MASKSRCTRAN: CH3 (Bitfield-Mask: 0x01) */ -#define GPDMA1_MASKSRCTRAN_WE_CH0_Pos (8UL) /*!< GPDMA1 MASKSRCTRAN: WE_CH0 (Bit 8) */ -#define GPDMA1_MASKSRCTRAN_WE_CH0_Msk (0x100UL) /*!< GPDMA1 MASKSRCTRAN: WE_CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA1_MASKSRCTRAN_WE_CH1_Pos (9UL) /*!< GPDMA1 MASKSRCTRAN: WE_CH1 (Bit 9) */ -#define GPDMA1_MASKSRCTRAN_WE_CH1_Msk (0x200UL) /*!< GPDMA1 MASKSRCTRAN: WE_CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA1_MASKSRCTRAN_WE_CH2_Pos (10UL) /*!< GPDMA1 MASKSRCTRAN: WE_CH2 (Bit 10) */ -#define GPDMA1_MASKSRCTRAN_WE_CH2_Msk (0x400UL) /*!< GPDMA1 MASKSRCTRAN: WE_CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA1_MASKSRCTRAN_WE_CH3_Pos (11UL) /*!< GPDMA1 MASKSRCTRAN: WE_CH3 (Bit 11) */ -#define GPDMA1_MASKSRCTRAN_WE_CH3_Msk (0x800UL) /*!< GPDMA1 MASKSRCTRAN: WE_CH3 (Bitfield-Mask: 0x01) */ - -/* ----------------------------- GPDMA1_MASKDSTTRAN ----------------------------- */ -#define GPDMA1_MASKDSTTRAN_CH0_Pos (0UL) /*!< GPDMA1 MASKDSTTRAN: CH0 (Bit 0) */ -#define GPDMA1_MASKDSTTRAN_CH0_Msk (0x1UL) /*!< GPDMA1 MASKDSTTRAN: CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA1_MASKDSTTRAN_CH1_Pos (1UL) /*!< GPDMA1 MASKDSTTRAN: CH1 (Bit 1) */ -#define GPDMA1_MASKDSTTRAN_CH1_Msk (0x2UL) /*!< GPDMA1 MASKDSTTRAN: CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA1_MASKDSTTRAN_CH2_Pos (2UL) /*!< GPDMA1 MASKDSTTRAN: CH2 (Bit 2) */ -#define GPDMA1_MASKDSTTRAN_CH2_Msk (0x4UL) /*!< GPDMA1 MASKDSTTRAN: CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA1_MASKDSTTRAN_CH3_Pos (3UL) /*!< GPDMA1 MASKDSTTRAN: CH3 (Bit 3) */ -#define GPDMA1_MASKDSTTRAN_CH3_Msk (0x8UL) /*!< GPDMA1 MASKDSTTRAN: CH3 (Bitfield-Mask: 0x01) */ -#define GPDMA1_MASKDSTTRAN_WE_CH0_Pos (8UL) /*!< GPDMA1 MASKDSTTRAN: WE_CH0 (Bit 8) */ -#define GPDMA1_MASKDSTTRAN_WE_CH0_Msk (0x100UL) /*!< GPDMA1 MASKDSTTRAN: WE_CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA1_MASKDSTTRAN_WE_CH1_Pos (9UL) /*!< GPDMA1 MASKDSTTRAN: WE_CH1 (Bit 9) */ -#define GPDMA1_MASKDSTTRAN_WE_CH1_Msk (0x200UL) /*!< GPDMA1 MASKDSTTRAN: WE_CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA1_MASKDSTTRAN_WE_CH2_Pos (10UL) /*!< GPDMA1 MASKDSTTRAN: WE_CH2 (Bit 10) */ -#define GPDMA1_MASKDSTTRAN_WE_CH2_Msk (0x400UL) /*!< GPDMA1 MASKDSTTRAN: WE_CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA1_MASKDSTTRAN_WE_CH3_Pos (11UL) /*!< GPDMA1 MASKDSTTRAN: WE_CH3 (Bit 11) */ -#define GPDMA1_MASKDSTTRAN_WE_CH3_Msk (0x800UL) /*!< GPDMA1 MASKDSTTRAN: WE_CH3 (Bitfield-Mask: 0x01) */ - -/* ------------------------------- GPDMA1_MASKERR ------------------------------- */ -#define GPDMA1_MASKERR_CH0_Pos (0UL) /*!< GPDMA1 MASKERR: CH0 (Bit 0) */ -#define GPDMA1_MASKERR_CH0_Msk (0x1UL) /*!< GPDMA1 MASKERR: CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA1_MASKERR_CH1_Pos (1UL) /*!< GPDMA1 MASKERR: CH1 (Bit 1) */ -#define GPDMA1_MASKERR_CH1_Msk (0x2UL) /*!< GPDMA1 MASKERR: CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA1_MASKERR_CH2_Pos (2UL) /*!< GPDMA1 MASKERR: CH2 (Bit 2) */ -#define GPDMA1_MASKERR_CH2_Msk (0x4UL) /*!< GPDMA1 MASKERR: CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA1_MASKERR_CH3_Pos (3UL) /*!< GPDMA1 MASKERR: CH3 (Bit 3) */ -#define GPDMA1_MASKERR_CH3_Msk (0x8UL) /*!< GPDMA1 MASKERR: CH3 (Bitfield-Mask: 0x01) */ -#define GPDMA1_MASKERR_WE_CH0_Pos (8UL) /*!< GPDMA1 MASKERR: WE_CH0 (Bit 8) */ -#define GPDMA1_MASKERR_WE_CH0_Msk (0x100UL) /*!< GPDMA1 MASKERR: WE_CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA1_MASKERR_WE_CH1_Pos (9UL) /*!< GPDMA1 MASKERR: WE_CH1 (Bit 9) */ -#define GPDMA1_MASKERR_WE_CH1_Msk (0x200UL) /*!< GPDMA1 MASKERR: WE_CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA1_MASKERR_WE_CH2_Pos (10UL) /*!< GPDMA1 MASKERR: WE_CH2 (Bit 10) */ -#define GPDMA1_MASKERR_WE_CH2_Msk (0x400UL) /*!< GPDMA1 MASKERR: WE_CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA1_MASKERR_WE_CH3_Pos (11UL) /*!< GPDMA1 MASKERR: WE_CH3 (Bit 11) */ -#define GPDMA1_MASKERR_WE_CH3_Msk (0x800UL) /*!< GPDMA1 MASKERR: WE_CH3 (Bitfield-Mask: 0x01) */ - -/* ------------------------------- GPDMA1_CLEARTFR ------------------------------ */ -#define GPDMA1_CLEARTFR_CH0_Pos (0UL) /*!< GPDMA1 CLEARTFR: CH0 (Bit 0) */ -#define GPDMA1_CLEARTFR_CH0_Msk (0x1UL) /*!< GPDMA1 CLEARTFR: CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA1_CLEARTFR_CH1_Pos (1UL) /*!< GPDMA1 CLEARTFR: CH1 (Bit 1) */ -#define GPDMA1_CLEARTFR_CH1_Msk (0x2UL) /*!< GPDMA1 CLEARTFR: CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA1_CLEARTFR_CH2_Pos (2UL) /*!< GPDMA1 CLEARTFR: CH2 (Bit 2) */ -#define GPDMA1_CLEARTFR_CH2_Msk (0x4UL) /*!< GPDMA1 CLEARTFR: CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA1_CLEARTFR_CH3_Pos (3UL) /*!< GPDMA1 CLEARTFR: CH3 (Bit 3) */ -#define GPDMA1_CLEARTFR_CH3_Msk (0x8UL) /*!< GPDMA1 CLEARTFR: CH3 (Bitfield-Mask: 0x01) */ - -/* ------------------------------ GPDMA1_CLEARBLOCK ----------------------------- */ -#define GPDMA1_CLEARBLOCK_CH0_Pos (0UL) /*!< GPDMA1 CLEARBLOCK: CH0 (Bit 0) */ -#define GPDMA1_CLEARBLOCK_CH0_Msk (0x1UL) /*!< GPDMA1 CLEARBLOCK: CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA1_CLEARBLOCK_CH1_Pos (1UL) /*!< GPDMA1 CLEARBLOCK: CH1 (Bit 1) */ -#define GPDMA1_CLEARBLOCK_CH1_Msk (0x2UL) /*!< GPDMA1 CLEARBLOCK: CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA1_CLEARBLOCK_CH2_Pos (2UL) /*!< GPDMA1 CLEARBLOCK: CH2 (Bit 2) */ -#define GPDMA1_CLEARBLOCK_CH2_Msk (0x4UL) /*!< GPDMA1 CLEARBLOCK: CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA1_CLEARBLOCK_CH3_Pos (3UL) /*!< GPDMA1 CLEARBLOCK: CH3 (Bit 3) */ -#define GPDMA1_CLEARBLOCK_CH3_Msk (0x8UL) /*!< GPDMA1 CLEARBLOCK: CH3 (Bitfield-Mask: 0x01) */ - -/* ----------------------------- GPDMA1_CLEARSRCTRAN ---------------------------- */ -#define GPDMA1_CLEARSRCTRAN_CH0_Pos (0UL) /*!< GPDMA1 CLEARSRCTRAN: CH0 (Bit 0) */ -#define GPDMA1_CLEARSRCTRAN_CH0_Msk (0x1UL) /*!< GPDMA1 CLEARSRCTRAN: CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA1_CLEARSRCTRAN_CH1_Pos (1UL) /*!< GPDMA1 CLEARSRCTRAN: CH1 (Bit 1) */ -#define GPDMA1_CLEARSRCTRAN_CH1_Msk (0x2UL) /*!< GPDMA1 CLEARSRCTRAN: CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA1_CLEARSRCTRAN_CH2_Pos (2UL) /*!< GPDMA1 CLEARSRCTRAN: CH2 (Bit 2) */ -#define GPDMA1_CLEARSRCTRAN_CH2_Msk (0x4UL) /*!< GPDMA1 CLEARSRCTRAN: CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA1_CLEARSRCTRAN_CH3_Pos (3UL) /*!< GPDMA1 CLEARSRCTRAN: CH3 (Bit 3) */ -#define GPDMA1_CLEARSRCTRAN_CH3_Msk (0x8UL) /*!< GPDMA1 CLEARSRCTRAN: CH3 (Bitfield-Mask: 0x01) */ - -/* ----------------------------- GPDMA1_CLEARDSTTRAN ---------------------------- */ -#define GPDMA1_CLEARDSTTRAN_CH0_Pos (0UL) /*!< GPDMA1 CLEARDSTTRAN: CH0 (Bit 0) */ -#define GPDMA1_CLEARDSTTRAN_CH0_Msk (0x1UL) /*!< GPDMA1 CLEARDSTTRAN: CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA1_CLEARDSTTRAN_CH1_Pos (1UL) /*!< GPDMA1 CLEARDSTTRAN: CH1 (Bit 1) */ -#define GPDMA1_CLEARDSTTRAN_CH1_Msk (0x2UL) /*!< GPDMA1 CLEARDSTTRAN: CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA1_CLEARDSTTRAN_CH2_Pos (2UL) /*!< GPDMA1 CLEARDSTTRAN: CH2 (Bit 2) */ -#define GPDMA1_CLEARDSTTRAN_CH2_Msk (0x4UL) /*!< GPDMA1 CLEARDSTTRAN: CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA1_CLEARDSTTRAN_CH3_Pos (3UL) /*!< GPDMA1 CLEARDSTTRAN: CH3 (Bit 3) */ -#define GPDMA1_CLEARDSTTRAN_CH3_Msk (0x8UL) /*!< GPDMA1 CLEARDSTTRAN: CH3 (Bitfield-Mask: 0x01) */ - -/* ------------------------------- GPDMA1_CLEARERR ------------------------------ */ -#define GPDMA1_CLEARERR_CH0_Pos (0UL) /*!< GPDMA1 CLEARERR: CH0 (Bit 0) */ -#define GPDMA1_CLEARERR_CH0_Msk (0x1UL) /*!< GPDMA1 CLEARERR: CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA1_CLEARERR_CH1_Pos (1UL) /*!< GPDMA1 CLEARERR: CH1 (Bit 1) */ -#define GPDMA1_CLEARERR_CH1_Msk (0x2UL) /*!< GPDMA1 CLEARERR: CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA1_CLEARERR_CH2_Pos (2UL) /*!< GPDMA1 CLEARERR: CH2 (Bit 2) */ -#define GPDMA1_CLEARERR_CH2_Msk (0x4UL) /*!< GPDMA1 CLEARERR: CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA1_CLEARERR_CH3_Pos (3UL) /*!< GPDMA1 CLEARERR: CH3 (Bit 3) */ -#define GPDMA1_CLEARERR_CH3_Msk (0x8UL) /*!< GPDMA1 CLEARERR: CH3 (Bitfield-Mask: 0x01) */ - -/* ------------------------------ GPDMA1_STATUSINT ------------------------------ */ -#define GPDMA1_STATUSINT_TFR_Pos (0UL) /*!< GPDMA1 STATUSINT: TFR (Bit 0) */ -#define GPDMA1_STATUSINT_TFR_Msk (0x1UL) /*!< GPDMA1 STATUSINT: TFR (Bitfield-Mask: 0x01) */ -#define GPDMA1_STATUSINT_BLOCK_Pos (1UL) /*!< GPDMA1 STATUSINT: BLOCK (Bit 1) */ -#define GPDMA1_STATUSINT_BLOCK_Msk (0x2UL) /*!< GPDMA1 STATUSINT: BLOCK (Bitfield-Mask: 0x01) */ -#define GPDMA1_STATUSINT_SRCT_Pos (2UL) /*!< GPDMA1 STATUSINT: SRCT (Bit 2) */ -#define GPDMA1_STATUSINT_SRCT_Msk (0x4UL) /*!< GPDMA1 STATUSINT: SRCT (Bitfield-Mask: 0x01) */ -#define GPDMA1_STATUSINT_DSTT_Pos (3UL) /*!< GPDMA1 STATUSINT: DSTT (Bit 3) */ -#define GPDMA1_STATUSINT_DSTT_Msk (0x8UL) /*!< GPDMA1 STATUSINT: DSTT (Bitfield-Mask: 0x01) */ -#define GPDMA1_STATUSINT_ERR_Pos (4UL) /*!< GPDMA1 STATUSINT: ERR (Bit 4) */ -#define GPDMA1_STATUSINT_ERR_Msk (0x10UL) /*!< GPDMA1 STATUSINT: ERR (Bitfield-Mask: 0x01) */ - -/* ------------------------------ GPDMA1_REQSRCREG ------------------------------ */ -#define GPDMA1_REQSRCREG_CH0_Pos (0UL) /*!< GPDMA1 REQSRCREG: CH0 (Bit 0) */ -#define GPDMA1_REQSRCREG_CH0_Msk (0x1UL) /*!< GPDMA1 REQSRCREG: CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA1_REQSRCREG_CH1_Pos (1UL) /*!< GPDMA1 REQSRCREG: CH1 (Bit 1) */ -#define GPDMA1_REQSRCREG_CH1_Msk (0x2UL) /*!< GPDMA1 REQSRCREG: CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA1_REQSRCREG_CH2_Pos (2UL) /*!< GPDMA1 REQSRCREG: CH2 (Bit 2) */ -#define GPDMA1_REQSRCREG_CH2_Msk (0x4UL) /*!< GPDMA1 REQSRCREG: CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA1_REQSRCREG_CH3_Pos (3UL) /*!< GPDMA1 REQSRCREG: CH3 (Bit 3) */ -#define GPDMA1_REQSRCREG_CH3_Msk (0x8UL) /*!< GPDMA1 REQSRCREG: CH3 (Bitfield-Mask: 0x01) */ -#define GPDMA1_REQSRCREG_WE_CH0_Pos (8UL) /*!< GPDMA1 REQSRCREG: WE_CH0 (Bit 8) */ -#define GPDMA1_REQSRCREG_WE_CH0_Msk (0x100UL) /*!< GPDMA1 REQSRCREG: WE_CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA1_REQSRCREG_WE_CH1_Pos (9UL) /*!< GPDMA1 REQSRCREG: WE_CH1 (Bit 9) */ -#define GPDMA1_REQSRCREG_WE_CH1_Msk (0x200UL) /*!< GPDMA1 REQSRCREG: WE_CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA1_REQSRCREG_WE_CH2_Pos (10UL) /*!< GPDMA1 REQSRCREG: WE_CH2 (Bit 10) */ -#define GPDMA1_REQSRCREG_WE_CH2_Msk (0x400UL) /*!< GPDMA1 REQSRCREG: WE_CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA1_REQSRCREG_WE_CH3_Pos (11UL) /*!< GPDMA1 REQSRCREG: WE_CH3 (Bit 11) */ -#define GPDMA1_REQSRCREG_WE_CH3_Msk (0x800UL) /*!< GPDMA1 REQSRCREG: WE_CH3 (Bitfield-Mask: 0x01) */ - -/* ------------------------------ GPDMA1_REQDSTREG ------------------------------ */ -#define GPDMA1_REQDSTREG_CH0_Pos (0UL) /*!< GPDMA1 REQDSTREG: CH0 (Bit 0) */ -#define GPDMA1_REQDSTREG_CH0_Msk (0x1UL) /*!< GPDMA1 REQDSTREG: CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA1_REQDSTREG_CH1_Pos (1UL) /*!< GPDMA1 REQDSTREG: CH1 (Bit 1) */ -#define GPDMA1_REQDSTREG_CH1_Msk (0x2UL) /*!< GPDMA1 REQDSTREG: CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA1_REQDSTREG_CH2_Pos (2UL) /*!< GPDMA1 REQDSTREG: CH2 (Bit 2) */ -#define GPDMA1_REQDSTREG_CH2_Msk (0x4UL) /*!< GPDMA1 REQDSTREG: CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA1_REQDSTREG_CH3_Pos (3UL) /*!< GPDMA1 REQDSTREG: CH3 (Bit 3) */ -#define GPDMA1_REQDSTREG_CH3_Msk (0x8UL) /*!< GPDMA1 REQDSTREG: CH3 (Bitfield-Mask: 0x01) */ -#define GPDMA1_REQDSTREG_WE_CH0_Pos (8UL) /*!< GPDMA1 REQDSTREG: WE_CH0 (Bit 8) */ -#define GPDMA1_REQDSTREG_WE_CH0_Msk (0x100UL) /*!< GPDMA1 REQDSTREG: WE_CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA1_REQDSTREG_WE_CH1_Pos (9UL) /*!< GPDMA1 REQDSTREG: WE_CH1 (Bit 9) */ -#define GPDMA1_REQDSTREG_WE_CH1_Msk (0x200UL) /*!< GPDMA1 REQDSTREG: WE_CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA1_REQDSTREG_WE_CH2_Pos (10UL) /*!< GPDMA1 REQDSTREG: WE_CH2 (Bit 10) */ -#define GPDMA1_REQDSTREG_WE_CH2_Msk (0x400UL) /*!< GPDMA1 REQDSTREG: WE_CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA1_REQDSTREG_WE_CH3_Pos (11UL) /*!< GPDMA1 REQDSTREG: WE_CH3 (Bit 11) */ -#define GPDMA1_REQDSTREG_WE_CH3_Msk (0x800UL) /*!< GPDMA1 REQDSTREG: WE_CH3 (Bitfield-Mask: 0x01) */ - -/* ----------------------------- GPDMA1_SGLREQSRCREG ---------------------------- */ -#define GPDMA1_SGLREQSRCREG_CH0_Pos (0UL) /*!< GPDMA1 SGLREQSRCREG: CH0 (Bit 0) */ -#define GPDMA1_SGLREQSRCREG_CH0_Msk (0x1UL) /*!< GPDMA1 SGLREQSRCREG: CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA1_SGLREQSRCREG_CH1_Pos (1UL) /*!< GPDMA1 SGLREQSRCREG: CH1 (Bit 1) */ -#define GPDMA1_SGLREQSRCREG_CH1_Msk (0x2UL) /*!< GPDMA1 SGLREQSRCREG: CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA1_SGLREQSRCREG_CH2_Pos (2UL) /*!< GPDMA1 SGLREQSRCREG: CH2 (Bit 2) */ -#define GPDMA1_SGLREQSRCREG_CH2_Msk (0x4UL) /*!< GPDMA1 SGLREQSRCREG: CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA1_SGLREQSRCREG_CH3_Pos (3UL) /*!< GPDMA1 SGLREQSRCREG: CH3 (Bit 3) */ -#define GPDMA1_SGLREQSRCREG_CH3_Msk (0x8UL) /*!< GPDMA1 SGLREQSRCREG: CH3 (Bitfield-Mask: 0x01) */ -#define GPDMA1_SGLREQSRCREG_WE_CH0_Pos (8UL) /*!< GPDMA1 SGLREQSRCREG: WE_CH0 (Bit 8) */ -#define GPDMA1_SGLREQSRCREG_WE_CH0_Msk (0x100UL) /*!< GPDMA1 SGLREQSRCREG: WE_CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA1_SGLREQSRCREG_WE_CH1_Pos (9UL) /*!< GPDMA1 SGLREQSRCREG: WE_CH1 (Bit 9) */ -#define GPDMA1_SGLREQSRCREG_WE_CH1_Msk (0x200UL) /*!< GPDMA1 SGLREQSRCREG: WE_CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA1_SGLREQSRCREG_WE_CH2_Pos (10UL) /*!< GPDMA1 SGLREQSRCREG: WE_CH2 (Bit 10) */ -#define GPDMA1_SGLREQSRCREG_WE_CH2_Msk (0x400UL) /*!< GPDMA1 SGLREQSRCREG: WE_CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA1_SGLREQSRCREG_WE_CH3_Pos (11UL) /*!< GPDMA1 SGLREQSRCREG: WE_CH3 (Bit 11) */ -#define GPDMA1_SGLREQSRCREG_WE_CH3_Msk (0x800UL) /*!< GPDMA1 SGLREQSRCREG: WE_CH3 (Bitfield-Mask: 0x01) */ - -/* ----------------------------- GPDMA1_SGLREQDSTREG ---------------------------- */ -#define GPDMA1_SGLREQDSTREG_CH0_Pos (0UL) /*!< GPDMA1 SGLREQDSTREG: CH0 (Bit 0) */ -#define GPDMA1_SGLREQDSTREG_CH0_Msk (0x1UL) /*!< GPDMA1 SGLREQDSTREG: CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA1_SGLREQDSTREG_CH1_Pos (1UL) /*!< GPDMA1 SGLREQDSTREG: CH1 (Bit 1) */ -#define GPDMA1_SGLREQDSTREG_CH1_Msk (0x2UL) /*!< GPDMA1 SGLREQDSTREG: CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA1_SGLREQDSTREG_CH2_Pos (2UL) /*!< GPDMA1 SGLREQDSTREG: CH2 (Bit 2) */ -#define GPDMA1_SGLREQDSTREG_CH2_Msk (0x4UL) /*!< GPDMA1 SGLREQDSTREG: CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA1_SGLREQDSTREG_CH3_Pos (3UL) /*!< GPDMA1 SGLREQDSTREG: CH3 (Bit 3) */ -#define GPDMA1_SGLREQDSTREG_CH3_Msk (0x8UL) /*!< GPDMA1 SGLREQDSTREG: CH3 (Bitfield-Mask: 0x01) */ -#define GPDMA1_SGLREQDSTREG_WE_CH0_Pos (8UL) /*!< GPDMA1 SGLREQDSTREG: WE_CH0 (Bit 8) */ -#define GPDMA1_SGLREQDSTREG_WE_CH0_Msk (0x100UL) /*!< GPDMA1 SGLREQDSTREG: WE_CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA1_SGLREQDSTREG_WE_CH1_Pos (9UL) /*!< GPDMA1 SGLREQDSTREG: WE_CH1 (Bit 9) */ -#define GPDMA1_SGLREQDSTREG_WE_CH1_Msk (0x200UL) /*!< GPDMA1 SGLREQDSTREG: WE_CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA1_SGLREQDSTREG_WE_CH2_Pos (10UL) /*!< GPDMA1 SGLREQDSTREG: WE_CH2 (Bit 10) */ -#define GPDMA1_SGLREQDSTREG_WE_CH2_Msk (0x400UL) /*!< GPDMA1 SGLREQDSTREG: WE_CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA1_SGLREQDSTREG_WE_CH3_Pos (11UL) /*!< GPDMA1 SGLREQDSTREG: WE_CH3 (Bit 11) */ -#define GPDMA1_SGLREQDSTREG_WE_CH3_Msk (0x800UL) /*!< GPDMA1 SGLREQDSTREG: WE_CH3 (Bitfield-Mask: 0x01) */ - -/* ------------------------------ GPDMA1_LSTSRCREG ------------------------------ */ -#define GPDMA1_LSTSRCREG_CH0_Pos (0UL) /*!< GPDMA1 LSTSRCREG: CH0 (Bit 0) */ -#define GPDMA1_LSTSRCREG_CH0_Msk (0x1UL) /*!< GPDMA1 LSTSRCREG: CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA1_LSTSRCREG_CH1_Pos (1UL) /*!< GPDMA1 LSTSRCREG: CH1 (Bit 1) */ -#define GPDMA1_LSTSRCREG_CH1_Msk (0x2UL) /*!< GPDMA1 LSTSRCREG: CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA1_LSTSRCREG_CH2_Pos (2UL) /*!< GPDMA1 LSTSRCREG: CH2 (Bit 2) */ -#define GPDMA1_LSTSRCREG_CH2_Msk (0x4UL) /*!< GPDMA1 LSTSRCREG: CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA1_LSTSRCREG_CH3_Pos (3UL) /*!< GPDMA1 LSTSRCREG: CH3 (Bit 3) */ -#define GPDMA1_LSTSRCREG_CH3_Msk (0x8UL) /*!< GPDMA1 LSTSRCREG: CH3 (Bitfield-Mask: 0x01) */ -#define GPDMA1_LSTSRCREG_WE_CH0_Pos (8UL) /*!< GPDMA1 LSTSRCREG: WE_CH0 (Bit 8) */ -#define GPDMA1_LSTSRCREG_WE_CH0_Msk (0x100UL) /*!< GPDMA1 LSTSRCREG: WE_CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA1_LSTSRCREG_WE_CH1_Pos (9UL) /*!< GPDMA1 LSTSRCREG: WE_CH1 (Bit 9) */ -#define GPDMA1_LSTSRCREG_WE_CH1_Msk (0x200UL) /*!< GPDMA1 LSTSRCREG: WE_CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA1_LSTSRCREG_WE_CH2_Pos (10UL) /*!< GPDMA1 LSTSRCREG: WE_CH2 (Bit 10) */ -#define GPDMA1_LSTSRCREG_WE_CH2_Msk (0x400UL) /*!< GPDMA1 LSTSRCREG: WE_CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA1_LSTSRCREG_WE_CH3_Pos (11UL) /*!< GPDMA1 LSTSRCREG: WE_CH3 (Bit 11) */ -#define GPDMA1_LSTSRCREG_WE_CH3_Msk (0x800UL) /*!< GPDMA1 LSTSRCREG: WE_CH3 (Bitfield-Mask: 0x01) */ - -/* ------------------------------ GPDMA1_LSTDSTREG ------------------------------ */ -#define GPDMA1_LSTDSTREG_CH0_Pos (0UL) /*!< GPDMA1 LSTDSTREG: CH0 (Bit 0) */ -#define GPDMA1_LSTDSTREG_CH0_Msk (0x1UL) /*!< GPDMA1 LSTDSTREG: CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA1_LSTDSTREG_CH1_Pos (1UL) /*!< GPDMA1 LSTDSTREG: CH1 (Bit 1) */ -#define GPDMA1_LSTDSTREG_CH1_Msk (0x2UL) /*!< GPDMA1 LSTDSTREG: CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA1_LSTDSTREG_CH2_Pos (2UL) /*!< GPDMA1 LSTDSTREG: CH2 (Bit 2) */ -#define GPDMA1_LSTDSTREG_CH2_Msk (0x4UL) /*!< GPDMA1 LSTDSTREG: CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA1_LSTDSTREG_CH3_Pos (3UL) /*!< GPDMA1 LSTDSTREG: CH3 (Bit 3) */ -#define GPDMA1_LSTDSTREG_CH3_Msk (0x8UL) /*!< GPDMA1 LSTDSTREG: CH3 (Bitfield-Mask: 0x01) */ -#define GPDMA1_LSTDSTREG_WE_CH0_Pos (8UL) /*!< GPDMA1 LSTDSTREG: WE_CH0 (Bit 8) */ -#define GPDMA1_LSTDSTREG_WE_CH0_Msk (0x100UL) /*!< GPDMA1 LSTDSTREG: WE_CH0 (Bitfield-Mask: 0x01) */ -#define GPDMA1_LSTDSTREG_WE_CH1_Pos (9UL) /*!< GPDMA1 LSTDSTREG: WE_CH1 (Bit 9) */ -#define GPDMA1_LSTDSTREG_WE_CH1_Msk (0x200UL) /*!< GPDMA1 LSTDSTREG: WE_CH1 (Bitfield-Mask: 0x01) */ -#define GPDMA1_LSTDSTREG_WE_CH2_Pos (10UL) /*!< GPDMA1 LSTDSTREG: WE_CH2 (Bit 10) */ -#define GPDMA1_LSTDSTREG_WE_CH2_Msk (0x400UL) /*!< GPDMA1 LSTDSTREG: WE_CH2 (Bitfield-Mask: 0x01) */ -#define GPDMA1_LSTDSTREG_WE_CH3_Pos (11UL) /*!< GPDMA1 LSTDSTREG: WE_CH3 (Bit 11) */ -#define GPDMA1_LSTDSTREG_WE_CH3_Msk (0x800UL) /*!< GPDMA1 LSTDSTREG: WE_CH3 (Bitfield-Mask: 0x01) */ - -/* ------------------------------ GPDMA1_DMACFGREG ------------------------------ */ -#define GPDMA1_DMACFGREG_DMA_EN_Pos (0UL) /*!< GPDMA1 DMACFGREG: DMA_EN (Bit 0) */ -#define GPDMA1_DMACFGREG_DMA_EN_Msk (0x1UL) /*!< GPDMA1 DMACFGREG: DMA_EN (Bitfield-Mask: 0x01) */ - -/* ------------------------------- GPDMA1_CHENREG ------------------------------- */ -#define GPDMA1_CHENREG_CH_Pos (0UL) /*!< GPDMA1 CHENREG: CH (Bit 0) */ -#define GPDMA1_CHENREG_CH_Msk (0xfUL) /*!< GPDMA1 CHENREG: CH (Bitfield-Mask: 0x0f) */ -#define GPDMA1_CHENREG_WE_CH_Pos (8UL) /*!< GPDMA1 CHENREG: WE_CH (Bit 8) */ -#define GPDMA1_CHENREG_WE_CH_Msk (0xf00UL) /*!< GPDMA1 CHENREG: WE_CH (Bitfield-Mask: 0x0f) */ - -/* ---------------------------------- GPDMA1_ID --------------------------------- */ -#define GPDMA1_ID_VALUE_Pos (0UL) /*!< GPDMA1 ID: VALUE (Bit 0) */ -#define GPDMA1_ID_VALUE_Msk (0xffffffffUL) /*!< GPDMA1 ID: VALUE (Bitfield-Mask: 0xffffffff) */ - -/* --------------------------------- GPDMA1_TYPE -------------------------------- */ -#define GPDMA1_TYPE_VALUE_Pos (0UL) /*!< GPDMA1 TYPE: VALUE (Bit 0) */ -#define GPDMA1_TYPE_VALUE_Msk (0xffffffffUL) /*!< GPDMA1 TYPE: VALUE (Bitfield-Mask: 0xffffffff) */ - -/* ------------------------------- GPDMA1_VERSION ------------------------------- */ -#define GPDMA1_VERSION_VALUE_Pos (0UL) /*!< GPDMA1 VERSION: VALUE (Bit 0) */ -#define GPDMA1_VERSION_VALUE_Msk (0xffffffffUL) /*!< GPDMA1 VERSION: VALUE (Bitfield-Mask: 0xffffffff) */ - - -/* ================================================================================ */ -/* ================ Group 'GPDMA1_CH' Position & Mask ================ */ -/* ================================================================================ */ - - -/* -------------------------------- GPDMA1_CH_SAR ------------------------------- */ -#define GPDMA1_CH_SAR_SAR_Pos (0UL) /*!< GPDMA1_CH SAR: SAR (Bit 0) */ -#define GPDMA1_CH_SAR_SAR_Msk (0xffffffffUL) /*!< GPDMA1_CH SAR: SAR (Bitfield-Mask: 0xffffffff) */ - -/* -------------------------------- GPDMA1_CH_DAR ------------------------------- */ -#define GPDMA1_CH_DAR_DAR_Pos (0UL) /*!< GPDMA1_CH DAR: DAR (Bit 0) */ -#define GPDMA1_CH_DAR_DAR_Msk (0xffffffffUL) /*!< GPDMA1_CH DAR: DAR (Bitfield-Mask: 0xffffffff) */ - -/* ------------------------------- GPDMA1_CH_CTLL ------------------------------- */ -#define GPDMA1_CH_CTLL_INT_EN_Pos (0UL) /*!< GPDMA1_CH CTLL: INT_EN (Bit 0) */ -#define GPDMA1_CH_CTLL_INT_EN_Msk (0x1UL) /*!< GPDMA1_CH CTLL: INT_EN (Bitfield-Mask: 0x01) */ -#define GPDMA1_CH_CTLL_DST_TR_WIDTH_Pos (1UL) /*!< GPDMA1_CH CTLL: DST_TR_WIDTH (Bit 1) */ -#define GPDMA1_CH_CTLL_DST_TR_WIDTH_Msk (0xeUL) /*!< GPDMA1_CH CTLL: DST_TR_WIDTH (Bitfield-Mask: 0x07) */ -#define GPDMA1_CH_CTLL_SRC_TR_WIDTH_Pos (4UL) /*!< GPDMA1_CH CTLL: SRC_TR_WIDTH (Bit 4) */ -#define GPDMA1_CH_CTLL_SRC_TR_WIDTH_Msk (0x70UL) /*!< GPDMA1_CH CTLL: SRC_TR_WIDTH (Bitfield-Mask: 0x07) */ -#define GPDMA1_CH_CTLL_DINC_Pos (7UL) /*!< GPDMA1_CH CTLL: DINC (Bit 7) */ -#define GPDMA1_CH_CTLL_DINC_Msk (0x180UL) /*!< GPDMA1_CH CTLL: DINC (Bitfield-Mask: 0x03) */ -#define GPDMA1_CH_CTLL_SINC_Pos (9UL) /*!< GPDMA1_CH CTLL: SINC (Bit 9) */ -#define GPDMA1_CH_CTLL_SINC_Msk (0x600UL) /*!< GPDMA1_CH CTLL: SINC (Bitfield-Mask: 0x03) */ -#define GPDMA1_CH_CTLL_DEST_MSIZE_Pos (11UL) /*!< GPDMA1_CH CTLL: DEST_MSIZE (Bit 11) */ -#define GPDMA1_CH_CTLL_DEST_MSIZE_Msk (0x3800UL) /*!< GPDMA1_CH CTLL: DEST_MSIZE (Bitfield-Mask: 0x07) */ -#define GPDMA1_CH_CTLL_SRC_MSIZE_Pos (14UL) /*!< GPDMA1_CH CTLL: SRC_MSIZE (Bit 14) */ -#define GPDMA1_CH_CTLL_SRC_MSIZE_Msk (0x1c000UL) /*!< GPDMA1_CH CTLL: SRC_MSIZE (Bitfield-Mask: 0x07) */ -#define GPDMA1_CH_CTLL_TT_FC_Pos (20UL) /*!< GPDMA1_CH CTLL: TT_FC (Bit 20) */ -#define GPDMA1_CH_CTLL_TT_FC_Msk (0x700000UL) /*!< GPDMA1_CH CTLL: TT_FC (Bitfield-Mask: 0x07) */ - -/* ------------------------------- GPDMA1_CH_CTLH ------------------------------- */ -#define GPDMA1_CH_CTLH_BLOCK_TS_Pos (0UL) /*!< GPDMA1_CH CTLH: BLOCK_TS (Bit 0) */ -#define GPDMA1_CH_CTLH_BLOCK_TS_Msk (0xfffUL) /*!< GPDMA1_CH CTLH: BLOCK_TS (Bitfield-Mask: 0xfff) */ -#define GPDMA1_CH_CTLH_DONE_Pos (12UL) /*!< GPDMA1_CH CTLH: DONE (Bit 12) */ -#define GPDMA1_CH_CTLH_DONE_Msk (0x1000UL) /*!< GPDMA1_CH CTLH: DONE (Bitfield-Mask: 0x01) */ - -/* ------------------------------- GPDMA1_CH_CFGL ------------------------------- */ -#define GPDMA1_CH_CFGL_CH_PRIOR_Pos (5UL) /*!< GPDMA1_CH CFGL: CH_PRIOR (Bit 5) */ -#define GPDMA1_CH_CFGL_CH_PRIOR_Msk (0xe0UL) /*!< GPDMA1_CH CFGL: CH_PRIOR (Bitfield-Mask: 0x07) */ -#define GPDMA1_CH_CFGL_CH_SUSP_Pos (8UL) /*!< GPDMA1_CH CFGL: CH_SUSP (Bit 8) */ -#define GPDMA1_CH_CFGL_CH_SUSP_Msk (0x100UL) /*!< GPDMA1_CH CFGL: CH_SUSP (Bitfield-Mask: 0x01) */ -#define GPDMA1_CH_CFGL_FIFO_EMPTY_Pos (9UL) /*!< GPDMA1_CH CFGL: FIFO_EMPTY (Bit 9) */ -#define GPDMA1_CH_CFGL_FIFO_EMPTY_Msk (0x200UL) /*!< GPDMA1_CH CFGL: FIFO_EMPTY (Bitfield-Mask: 0x01) */ -#define GPDMA1_CH_CFGL_HS_SEL_DST_Pos (10UL) /*!< GPDMA1_CH CFGL: HS_SEL_DST (Bit 10) */ -#define GPDMA1_CH_CFGL_HS_SEL_DST_Msk (0x400UL) /*!< GPDMA1_CH CFGL: HS_SEL_DST (Bitfield-Mask: 0x01) */ -#define GPDMA1_CH_CFGL_HS_SEL_SRC_Pos (11UL) /*!< GPDMA1_CH CFGL: HS_SEL_SRC (Bit 11) */ -#define GPDMA1_CH_CFGL_HS_SEL_SRC_Msk (0x800UL) /*!< GPDMA1_CH CFGL: HS_SEL_SRC (Bitfield-Mask: 0x01) */ -#define GPDMA1_CH_CFGL_LOCK_CH_L_Pos (12UL) /*!< GPDMA1_CH CFGL: LOCK_CH_L (Bit 12) */ -#define GPDMA1_CH_CFGL_LOCK_CH_L_Msk (0x3000UL) /*!< GPDMA1_CH CFGL: LOCK_CH_L (Bitfield-Mask: 0x03) */ -#define GPDMA1_CH_CFGL_LOCK_B_L_Pos (14UL) /*!< GPDMA1_CH CFGL: LOCK_B_L (Bit 14) */ -#define GPDMA1_CH_CFGL_LOCK_B_L_Msk (0xc000UL) /*!< GPDMA1_CH CFGL: LOCK_B_L (Bitfield-Mask: 0x03) */ -#define GPDMA1_CH_CFGL_LOCK_CH_Pos (16UL) /*!< GPDMA1_CH CFGL: LOCK_CH (Bit 16) */ -#define GPDMA1_CH_CFGL_LOCK_CH_Msk (0x10000UL) /*!< GPDMA1_CH CFGL: LOCK_CH (Bitfield-Mask: 0x01) */ -#define GPDMA1_CH_CFGL_LOCK_B_Pos (17UL) /*!< GPDMA1_CH CFGL: LOCK_B (Bit 17) */ -#define GPDMA1_CH_CFGL_LOCK_B_Msk (0x20000UL) /*!< GPDMA1_CH CFGL: LOCK_B (Bitfield-Mask: 0x01) */ -#define GPDMA1_CH_CFGL_DST_HS_POL_Pos (18UL) /*!< GPDMA1_CH CFGL: DST_HS_POL (Bit 18) */ -#define GPDMA1_CH_CFGL_DST_HS_POL_Msk (0x40000UL) /*!< GPDMA1_CH CFGL: DST_HS_POL (Bitfield-Mask: 0x01) */ -#define GPDMA1_CH_CFGL_SRC_HS_POL_Pos (19UL) /*!< GPDMA1_CH CFGL: SRC_HS_POL (Bit 19) */ -#define GPDMA1_CH_CFGL_SRC_HS_POL_Msk (0x80000UL) /*!< GPDMA1_CH CFGL: SRC_HS_POL (Bitfield-Mask: 0x01) */ -#define GPDMA1_CH_CFGL_MAX_ABRST_Pos (20UL) /*!< GPDMA1_CH CFGL: MAX_ABRST (Bit 20) */ -#define GPDMA1_CH_CFGL_MAX_ABRST_Msk (0x3ff00000UL) /*!< GPDMA1_CH CFGL: MAX_ABRST (Bitfield-Mask: 0x3ff) */ - -/* ------------------------------- GPDMA1_CH_CFGH ------------------------------- */ -#define GPDMA1_CH_CFGH_FCMODE_Pos (0UL) /*!< GPDMA1_CH CFGH: FCMODE (Bit 0) */ -#define GPDMA1_CH_CFGH_FCMODE_Msk (0x1UL) /*!< GPDMA1_CH CFGH: FCMODE (Bitfield-Mask: 0x01) */ -#define GPDMA1_CH_CFGH_FIFO_MODE_Pos (1UL) /*!< GPDMA1_CH CFGH: FIFO_MODE (Bit 1) */ -#define GPDMA1_CH_CFGH_FIFO_MODE_Msk (0x2UL) /*!< GPDMA1_CH CFGH: FIFO_MODE (Bitfield-Mask: 0x01) */ -#define GPDMA1_CH_CFGH_PROTCTL_Pos (2UL) /*!< GPDMA1_CH CFGH: PROTCTL (Bit 2) */ -#define GPDMA1_CH_CFGH_PROTCTL_Msk (0x1cUL) /*!< GPDMA1_CH CFGH: PROTCTL (Bitfield-Mask: 0x07) */ -#define GPDMA1_CH_CFGH_SRC_PER_Pos (7UL) /*!< GPDMA1_CH CFGH: SRC_PER (Bit 7) */ -#define GPDMA1_CH_CFGH_SRC_PER_Msk (0x780UL) /*!< GPDMA1_CH CFGH: SRC_PER (Bitfield-Mask: 0x0f) */ -#define GPDMA1_CH_CFGH_DEST_PER_Pos (11UL) /*!< GPDMA1_CH CFGH: DEST_PER (Bit 11) */ -#define GPDMA1_CH_CFGH_DEST_PER_Msk (0x7800UL) /*!< GPDMA1_CH CFGH: DEST_PER (Bitfield-Mask: 0x0f) */ - - -/* ================================================================================ */ -/* ================ struct 'FCE' Position & Mask ================ */ -/* ================================================================================ */ - - -/* ----------------------------------- FCE_CLC ---------------------------------- */ -#define FCE_CLC_DISR_Pos (0UL) /*!< FCE CLC: DISR (Bit 0) */ -#define FCE_CLC_DISR_Msk (0x1UL) /*!< FCE CLC: DISR (Bitfield-Mask: 0x01) */ -#define FCE_CLC_DISS_Pos (1UL) /*!< FCE CLC: DISS (Bit 1) */ -#define FCE_CLC_DISS_Msk (0x2UL) /*!< FCE CLC: DISS (Bitfield-Mask: 0x01) */ - -/* ----------------------------------- FCE_ID ----------------------------------- */ -#define FCE_ID_MOD_REV_Pos (0UL) /*!< FCE ID: MOD_REV (Bit 0) */ -#define FCE_ID_MOD_REV_Msk (0xffUL) /*!< FCE ID: MOD_REV (Bitfield-Mask: 0xff) */ -#define FCE_ID_MOD_TYPE_Pos (8UL) /*!< FCE ID: MOD_TYPE (Bit 8) */ -#define FCE_ID_MOD_TYPE_Msk (0xff00UL) /*!< FCE ID: MOD_TYPE (Bitfield-Mask: 0xff) */ -#define FCE_ID_MOD_NUMBER_Pos (16UL) /*!< FCE ID: MOD_NUMBER (Bit 16) */ -#define FCE_ID_MOD_NUMBER_Msk (0xffff0000UL) /*!< FCE ID: MOD_NUMBER (Bitfield-Mask: 0xffff) */ - - -/* ================================================================================ */ -/* ================ Group 'FCE_KE' Position & Mask ================ */ -/* ================================================================================ */ - - -/* ---------------------------------- FCE_KE_IR --------------------------------- */ -#define FCE_KE_IR_IR_Pos (0UL) /*!< FCE_KE IR: IR (Bit 0) */ -#define FCE_KE_IR_IR_Msk (0xffffffffUL) /*!< FCE_KE IR: IR (Bitfield-Mask: 0xffffffff) */ - -/* --------------------------------- FCE_KE_RES --------------------------------- */ -#define FCE_KE_RES_RES_Pos (0UL) /*!< FCE_KE RES: RES (Bit 0) */ -#define FCE_KE_RES_RES_Msk (0xffffffffUL) /*!< FCE_KE RES: RES (Bitfield-Mask: 0xffffffff) */ - -/* --------------------------------- FCE_KE_CFG --------------------------------- */ -#define FCE_KE_CFG_CMI_Pos (0UL) /*!< FCE_KE CFG: CMI (Bit 0) */ -#define FCE_KE_CFG_CMI_Msk (0x1UL) /*!< FCE_KE CFG: CMI (Bitfield-Mask: 0x01) */ -#define FCE_KE_CFG_CEI_Pos (1UL) /*!< FCE_KE CFG: CEI (Bit 1) */ -#define FCE_KE_CFG_CEI_Msk (0x2UL) /*!< FCE_KE CFG: CEI (Bitfield-Mask: 0x01) */ -#define FCE_KE_CFG_LEI_Pos (2UL) /*!< FCE_KE CFG: LEI (Bit 2) */ -#define FCE_KE_CFG_LEI_Msk (0x4UL) /*!< FCE_KE CFG: LEI (Bitfield-Mask: 0x01) */ -#define FCE_KE_CFG_BEI_Pos (3UL) /*!< FCE_KE CFG: BEI (Bit 3) */ -#define FCE_KE_CFG_BEI_Msk (0x8UL) /*!< FCE_KE CFG: BEI (Bitfield-Mask: 0x01) */ -#define FCE_KE_CFG_CCE_Pos (4UL) /*!< FCE_KE CFG: CCE (Bit 4) */ -#define FCE_KE_CFG_CCE_Msk (0x10UL) /*!< FCE_KE CFG: CCE (Bitfield-Mask: 0x01) */ -#define FCE_KE_CFG_ALR_Pos (5UL) /*!< FCE_KE CFG: ALR (Bit 5) */ -#define FCE_KE_CFG_ALR_Msk (0x20UL) /*!< FCE_KE CFG: ALR (Bitfield-Mask: 0x01) */ -#define FCE_KE_CFG_REFIN_Pos (8UL) /*!< FCE_KE CFG: REFIN (Bit 8) */ -#define FCE_KE_CFG_REFIN_Msk (0x100UL) /*!< FCE_KE CFG: REFIN (Bitfield-Mask: 0x01) */ -#define FCE_KE_CFG_REFOUT_Pos (9UL) /*!< FCE_KE CFG: REFOUT (Bit 9) */ -#define FCE_KE_CFG_REFOUT_Msk (0x200UL) /*!< FCE_KE CFG: REFOUT (Bitfield-Mask: 0x01) */ -#define FCE_KE_CFG_XSEL_Pos (10UL) /*!< FCE_KE CFG: XSEL (Bit 10) */ -#define FCE_KE_CFG_XSEL_Msk (0x400UL) /*!< FCE_KE CFG: XSEL (Bitfield-Mask: 0x01) */ - -/* --------------------------------- FCE_KE_STS --------------------------------- */ -#define FCE_KE_STS_CMF_Pos (0UL) /*!< FCE_KE STS: CMF (Bit 0) */ -#define FCE_KE_STS_CMF_Msk (0x1UL) /*!< FCE_KE STS: CMF (Bitfield-Mask: 0x01) */ -#define FCE_KE_STS_CEF_Pos (1UL) /*!< FCE_KE STS: CEF (Bit 1) */ -#define FCE_KE_STS_CEF_Msk (0x2UL) /*!< FCE_KE STS: CEF (Bitfield-Mask: 0x01) */ -#define FCE_KE_STS_LEF_Pos (2UL) /*!< FCE_KE STS: LEF (Bit 2) */ -#define FCE_KE_STS_LEF_Msk (0x4UL) /*!< FCE_KE STS: LEF (Bitfield-Mask: 0x01) */ -#define FCE_KE_STS_BEF_Pos (3UL) /*!< FCE_KE STS: BEF (Bit 3) */ -#define FCE_KE_STS_BEF_Msk (0x8UL) /*!< FCE_KE STS: BEF (Bitfield-Mask: 0x01) */ - -/* -------------------------------- FCE_KE_LENGTH ------------------------------- */ -#define FCE_KE_LENGTH_LENGTH_Pos (0UL) /*!< FCE_KE LENGTH: LENGTH (Bit 0) */ -#define FCE_KE_LENGTH_LENGTH_Msk (0xffffUL) /*!< FCE_KE LENGTH: LENGTH (Bitfield-Mask: 0xffff) */ - -/* -------------------------------- FCE_KE_CHECK -------------------------------- */ -#define FCE_KE_CHECK_CHECK_Pos (0UL) /*!< FCE_KE CHECK: CHECK (Bit 0) */ -#define FCE_KE_CHECK_CHECK_Msk (0xffffffffUL) /*!< FCE_KE CHECK: CHECK (Bitfield-Mask: 0xffffffff) */ - -/* --------------------------------- FCE_KE_CRC --------------------------------- */ -#define FCE_KE_CRC_CRC_Pos (0UL) /*!< FCE_KE CRC: CRC (Bit 0) */ -#define FCE_KE_CRC_CRC_Msk (0xffffffffUL) /*!< FCE_KE CRC: CRC (Bitfield-Mask: 0xffffffff) */ - -/* --------------------------------- FCE_KE_CTR --------------------------------- */ -#define FCE_KE_CTR_FCM_Pos (0UL) /*!< FCE_KE CTR: FCM (Bit 0) */ -#define FCE_KE_CTR_FCM_Msk (0x1UL) /*!< FCE_KE CTR: FCM (Bitfield-Mask: 0x01) */ -#define FCE_KE_CTR_FRM_CFG_Pos (1UL) /*!< FCE_KE CTR: FRM_CFG (Bit 1) */ -#define FCE_KE_CTR_FRM_CFG_Msk (0x2UL) /*!< FCE_KE CTR: FRM_CFG (Bitfield-Mask: 0x01) */ -#define FCE_KE_CTR_FRM_CHECK_Pos (2UL) /*!< FCE_KE CTR: FRM_CHECK (Bit 2) */ -#define FCE_KE_CTR_FRM_CHECK_Msk (0x4UL) /*!< FCE_KE CTR: FRM_CHECK (Bitfield-Mask: 0x01) */ - - -/* ================================================================================ */ -/* ================ Group 'PBA' Position & Mask ================ */ -/* ================================================================================ */ - - -/* ----------------------------------- PBA_STS ---------------------------------- */ -#define PBA_STS_WERR_Pos (0UL) /*!< PBA STS: WERR (Bit 0) */ -#define PBA_STS_WERR_Msk (0x1UL) /*!< PBA STS: WERR (Bitfield-Mask: 0x01) */ - -/* ---------------------------------- PBA_WADDR --------------------------------- */ -#define PBA_WADDR_WADDR_Pos (0UL) /*!< PBA WADDR: WADDR (Bit 0) */ -#define PBA_WADDR_WADDR_Msk (0xffffffffUL) /*!< PBA WADDR: WADDR (Bitfield-Mask: 0xffffffff) */ - - -/* ================================================================================ */ -/* ================ Group 'FLASH' Position & Mask ================ */ -/* ================================================================================ */ - - -/* ---------------------------------- FLASH_ID ---------------------------------- */ -#define FLASH_ID_MOD_REV_Pos (0UL) /*!< FLASH ID: MOD_REV (Bit 0) */ -#define FLASH_ID_MOD_REV_Msk (0xffUL) /*!< FLASH ID: MOD_REV (Bitfield-Mask: 0xff) */ -#define FLASH_ID_MOD_TYPE_Pos (8UL) /*!< FLASH ID: MOD_TYPE (Bit 8) */ -#define FLASH_ID_MOD_TYPE_Msk (0xff00UL) /*!< FLASH ID: MOD_TYPE (Bitfield-Mask: 0xff) */ -#define FLASH_ID_MOD_NUMBER_Pos (16UL) /*!< FLASH ID: MOD_NUMBER (Bit 16) */ -#define FLASH_ID_MOD_NUMBER_Msk (0xffff0000UL) /*!< FLASH ID: MOD_NUMBER (Bitfield-Mask: 0xffff) */ - -/* ---------------------------------- FLASH_FSR --------------------------------- */ -#define FLASH_FSR_PBUSY_Pos (0UL) /*!< FLASH FSR: PBUSY (Bit 0) */ -#define FLASH_FSR_PBUSY_Msk (0x1UL) /*!< FLASH FSR: PBUSY (Bitfield-Mask: 0x01) */ -#define FLASH_FSR_FABUSY_Pos (1UL) /*!< FLASH FSR: FABUSY (Bit 1) */ -#define FLASH_FSR_FABUSY_Msk (0x2UL) /*!< FLASH FSR: FABUSY (Bitfield-Mask: 0x01) */ -#define FLASH_FSR_PROG_Pos (4UL) /*!< FLASH FSR: PROG (Bit 4) */ -#define FLASH_FSR_PROG_Msk (0x10UL) /*!< FLASH FSR: PROG (Bitfield-Mask: 0x01) */ -#define FLASH_FSR_ERASE_Pos (5UL) /*!< FLASH FSR: ERASE (Bit 5) */ -#define FLASH_FSR_ERASE_Msk (0x20UL) /*!< FLASH FSR: ERASE (Bitfield-Mask: 0x01) */ -#define FLASH_FSR_PFPAGE_Pos (6UL) /*!< FLASH FSR: PFPAGE (Bit 6) */ -#define FLASH_FSR_PFPAGE_Msk (0x40UL) /*!< FLASH FSR: PFPAGE (Bitfield-Mask: 0x01) */ -#define FLASH_FSR_PFOPER_Pos (8UL) /*!< FLASH FSR: PFOPER (Bit 8) */ -#define FLASH_FSR_PFOPER_Msk (0x100UL) /*!< FLASH FSR: PFOPER (Bitfield-Mask: 0x01) */ -#define FLASH_FSR_SQER_Pos (10UL) /*!< FLASH FSR: SQER (Bit 10) */ -#define FLASH_FSR_SQER_Msk (0x400UL) /*!< FLASH FSR: SQER (Bitfield-Mask: 0x01) */ -#define FLASH_FSR_PROER_Pos (11UL) /*!< FLASH FSR: PROER (Bit 11) */ -#define FLASH_FSR_PROER_Msk (0x800UL) /*!< FLASH FSR: PROER (Bitfield-Mask: 0x01) */ -#define FLASH_FSR_PFSBER_Pos (12UL) /*!< FLASH FSR: PFSBER (Bit 12) */ -#define FLASH_FSR_PFSBER_Msk (0x1000UL) /*!< FLASH FSR: PFSBER (Bitfield-Mask: 0x01) */ -#define FLASH_FSR_PFDBER_Pos (14UL) /*!< FLASH FSR: PFDBER (Bit 14) */ -#define FLASH_FSR_PFDBER_Msk (0x4000UL) /*!< FLASH FSR: PFDBER (Bitfield-Mask: 0x01) */ -#define FLASH_FSR_PROIN_Pos (16UL) /*!< FLASH FSR: PROIN (Bit 16) */ -#define FLASH_FSR_PROIN_Msk (0x10000UL) /*!< FLASH FSR: PROIN (Bitfield-Mask: 0x01) */ -#define FLASH_FSR_RPROIN_Pos (18UL) /*!< FLASH FSR: RPROIN (Bit 18) */ -#define FLASH_FSR_RPROIN_Msk (0x40000UL) /*!< FLASH FSR: RPROIN (Bitfield-Mask: 0x01) */ -#define FLASH_FSR_RPRODIS_Pos (19UL) /*!< FLASH FSR: RPRODIS (Bit 19) */ -#define FLASH_FSR_RPRODIS_Msk (0x80000UL) /*!< FLASH FSR: RPRODIS (Bitfield-Mask: 0x01) */ -#define FLASH_FSR_WPROIN0_Pos (21UL) /*!< FLASH FSR: WPROIN0 (Bit 21) */ -#define FLASH_FSR_WPROIN0_Msk (0x200000UL) /*!< FLASH FSR: WPROIN0 (Bitfield-Mask: 0x01) */ -#define FLASH_FSR_WPROIN1_Pos (22UL) /*!< FLASH FSR: WPROIN1 (Bit 22) */ -#define FLASH_FSR_WPROIN1_Msk (0x400000UL) /*!< FLASH FSR: WPROIN1 (Bitfield-Mask: 0x01) */ -#define FLASH_FSR_WPROIN2_Pos (23UL) /*!< FLASH FSR: WPROIN2 (Bit 23) */ -#define FLASH_FSR_WPROIN2_Msk (0x800000UL) /*!< FLASH FSR: WPROIN2 (Bitfield-Mask: 0x01) */ -#define FLASH_FSR_WPRODIS0_Pos (25UL) /*!< FLASH FSR: WPRODIS0 (Bit 25) */ -#define FLASH_FSR_WPRODIS0_Msk (0x2000000UL) /*!< FLASH FSR: WPRODIS0 (Bitfield-Mask: 0x01) */ -#define FLASH_FSR_WPRODIS1_Pos (26UL) /*!< FLASH FSR: WPRODIS1 (Bit 26) */ -#define FLASH_FSR_WPRODIS1_Msk (0x4000000UL) /*!< FLASH FSR: WPRODIS1 (Bitfield-Mask: 0x01) */ -#define FLASH_FSR_SLM_Pos (28UL) /*!< FLASH FSR: SLM (Bit 28) */ -#define FLASH_FSR_SLM_Msk (0x10000000UL) /*!< FLASH FSR: SLM (Bitfield-Mask: 0x01) */ -#define FLASH_FSR_VER_Pos (31UL) /*!< FLASH FSR: VER (Bit 31) */ -#define FLASH_FSR_VER_Msk (0x80000000UL) /*!< FLASH FSR: VER (Bitfield-Mask: 0x01) */ - -/* --------------------------------- FLASH_FCON --------------------------------- */ -#define FLASH_FCON_WSPFLASH_Pos (0UL) /*!< FLASH FCON: WSPFLASH (Bit 0) */ -#define FLASH_FCON_WSPFLASH_Msk (0xfUL) /*!< FLASH FCON: WSPFLASH (Bitfield-Mask: 0x0f) */ -#define FLASH_FCON_WSECPF_Pos (4UL) /*!< FLASH FCON: WSECPF (Bit 4) */ -#define FLASH_FCON_WSECPF_Msk (0x10UL) /*!< FLASH FCON: WSECPF (Bitfield-Mask: 0x01) */ -#define FLASH_FCON_IDLE_Pos (13UL) /*!< FLASH FCON: IDLE (Bit 13) */ -#define FLASH_FCON_IDLE_Msk (0x2000UL) /*!< FLASH FCON: IDLE (Bitfield-Mask: 0x01) */ -#define FLASH_FCON_ESLDIS_Pos (14UL) /*!< FLASH FCON: ESLDIS (Bit 14) */ -#define FLASH_FCON_ESLDIS_Msk (0x4000UL) /*!< FLASH FCON: ESLDIS (Bitfield-Mask: 0x01) */ -#define FLASH_FCON_SLEEP_Pos (15UL) /*!< FLASH FCON: SLEEP (Bit 15) */ -#define FLASH_FCON_SLEEP_Msk (0x8000UL) /*!< FLASH FCON: SLEEP (Bitfield-Mask: 0x01) */ -#define FLASH_FCON_RPA_Pos (16UL) /*!< FLASH FCON: RPA (Bit 16) */ -#define FLASH_FCON_RPA_Msk (0x10000UL) /*!< FLASH FCON: RPA (Bitfield-Mask: 0x01) */ -#define FLASH_FCON_DCF_Pos (17UL) /*!< FLASH FCON: DCF (Bit 17) */ -#define FLASH_FCON_DCF_Msk (0x20000UL) /*!< FLASH FCON: DCF (Bitfield-Mask: 0x01) */ -#define FLASH_FCON_DDF_Pos (18UL) /*!< FLASH FCON: DDF (Bit 18) */ -#define FLASH_FCON_DDF_Msk (0x40000UL) /*!< FLASH FCON: DDF (Bitfield-Mask: 0x01) */ -#define FLASH_FCON_VOPERM_Pos (24UL) /*!< FLASH FCON: VOPERM (Bit 24) */ -#define FLASH_FCON_VOPERM_Msk (0x1000000UL) /*!< FLASH FCON: VOPERM (Bitfield-Mask: 0x01) */ -#define FLASH_FCON_SQERM_Pos (25UL) /*!< FLASH FCON: SQERM (Bit 25) */ -#define FLASH_FCON_SQERM_Msk (0x2000000UL) /*!< FLASH FCON: SQERM (Bitfield-Mask: 0x01) */ -#define FLASH_FCON_PROERM_Pos (26UL) /*!< FLASH FCON: PROERM (Bit 26) */ -#define FLASH_FCON_PROERM_Msk (0x4000000UL) /*!< FLASH FCON: PROERM (Bitfield-Mask: 0x01) */ -#define FLASH_FCON_PFSBERM_Pos (27UL) /*!< FLASH FCON: PFSBERM (Bit 27) */ -#define FLASH_FCON_PFSBERM_Msk (0x8000000UL) /*!< FLASH FCON: PFSBERM (Bitfield-Mask: 0x01) */ -#define FLASH_FCON_PFDBERM_Pos (29UL) /*!< FLASH FCON: PFDBERM (Bit 29) */ -#define FLASH_FCON_PFDBERM_Msk (0x20000000UL) /*!< FLASH FCON: PFDBERM (Bitfield-Mask: 0x01) */ -#define FLASH_FCON_EOBM_Pos (31UL) /*!< FLASH FCON: EOBM (Bit 31) */ -#define FLASH_FCON_EOBM_Msk (0x80000000UL) /*!< FLASH FCON: EOBM (Bitfield-Mask: 0x01) */ - -/* --------------------------------- FLASH_MARP --------------------------------- */ -#define FLASH_MARP_MARGIN_Pos (0UL) /*!< FLASH MARP: MARGIN (Bit 0) */ -#define FLASH_MARP_MARGIN_Msk (0xfUL) /*!< FLASH MARP: MARGIN (Bitfield-Mask: 0x0f) */ -#define FLASH_MARP_TRAPDIS_Pos (15UL) /*!< FLASH MARP: TRAPDIS (Bit 15) */ -#define FLASH_MARP_TRAPDIS_Msk (0x8000UL) /*!< FLASH MARP: TRAPDIS (Bitfield-Mask: 0x01) */ - -/* -------------------------------- FLASH_PROCON0 ------------------------------- */ -#define FLASH_PROCON0_S0L_Pos (0UL) /*!< FLASH PROCON0: S0L (Bit 0) */ -#define FLASH_PROCON0_S0L_Msk (0x1UL) /*!< FLASH PROCON0: S0L (Bitfield-Mask: 0x01) */ -#define FLASH_PROCON0_S1L_Pos (1UL) /*!< FLASH PROCON0: S1L (Bit 1) */ -#define FLASH_PROCON0_S1L_Msk (0x2UL) /*!< FLASH PROCON0: S1L (Bitfield-Mask: 0x01) */ -#define FLASH_PROCON0_S2L_Pos (2UL) /*!< FLASH PROCON0: S2L (Bit 2) */ -#define FLASH_PROCON0_S2L_Msk (0x4UL) /*!< FLASH PROCON0: S2L (Bitfield-Mask: 0x01) */ -#define FLASH_PROCON0_S3L_Pos (3UL) /*!< FLASH PROCON0: S3L (Bit 3) */ -#define FLASH_PROCON0_S3L_Msk (0x8UL) /*!< FLASH PROCON0: S3L (Bitfield-Mask: 0x01) */ -#define FLASH_PROCON0_S4L_Pos (4UL) /*!< FLASH PROCON0: S4L (Bit 4) */ -#define FLASH_PROCON0_S4L_Msk (0x10UL) /*!< FLASH PROCON0: S4L (Bitfield-Mask: 0x01) */ -#define FLASH_PROCON0_S5L_Pos (5UL) /*!< FLASH PROCON0: S5L (Bit 5) */ -#define FLASH_PROCON0_S5L_Msk (0x20UL) /*!< FLASH PROCON0: S5L (Bitfield-Mask: 0x01) */ -#define FLASH_PROCON0_S6L_Pos (6UL) /*!< FLASH PROCON0: S6L (Bit 6) */ -#define FLASH_PROCON0_S6L_Msk (0x40UL) /*!< FLASH PROCON0: S6L (Bitfield-Mask: 0x01) */ -#define FLASH_PROCON0_S7L_Pos (7UL) /*!< FLASH PROCON0: S7L (Bit 7) */ -#define FLASH_PROCON0_S7L_Msk (0x80UL) /*!< FLASH PROCON0: S7L (Bitfield-Mask: 0x01) */ -#define FLASH_PROCON0_S8L_Pos (8UL) /*!< FLASH PROCON0: S8L (Bit 8) */ -#define FLASH_PROCON0_S8L_Msk (0x100UL) /*!< FLASH PROCON0: S8L (Bitfield-Mask: 0x01) */ -#define FLASH_PROCON0_S9L_Pos (9UL) /*!< FLASH PROCON0: S9L (Bit 9) */ -#define FLASH_PROCON0_S9L_Msk (0x200UL) /*!< FLASH PROCON0: S9L (Bitfield-Mask: 0x01) */ -#define FLASH_PROCON0_S10_S11L_Pos (10UL) /*!< FLASH PROCON0: S10_S11L (Bit 10) */ -#define FLASH_PROCON0_S10_S11L_Msk (0x400UL) /*!< FLASH PROCON0: S10_S11L (Bitfield-Mask: 0x01) */ -#define FLASH_PROCON0_S12_S13L_Pos (11UL) /*!< FLASH PROCON0: S12_S13L (Bit 11) */ -#define FLASH_PROCON0_S12_S13L_Msk (0x800UL) /*!< FLASH PROCON0: S12_S13L (Bitfield-Mask: 0x01) */ -#define FLASH_PROCON0_S14_S15L_Pos (12UL) /*!< FLASH PROCON0: S14_S15L (Bit 12) */ -#define FLASH_PROCON0_S14_S15L_Msk (0x1000UL) /*!< FLASH PROCON0: S14_S15L (Bitfield-Mask: 0x01) */ -#define FLASH_PROCON0_RPRO_Pos (15UL) /*!< FLASH PROCON0: RPRO (Bit 15) */ -#define FLASH_PROCON0_RPRO_Msk (0x8000UL) /*!< FLASH PROCON0: RPRO (Bitfield-Mask: 0x01) */ - -/* -------------------------------- FLASH_PROCON1 ------------------------------- */ -#define FLASH_PROCON1_S0L_Pos (0UL) /*!< FLASH PROCON1: S0L (Bit 0) */ -#define FLASH_PROCON1_S0L_Msk (0x1UL) /*!< FLASH PROCON1: S0L (Bitfield-Mask: 0x01) */ -#define FLASH_PROCON1_S1L_Pos (1UL) /*!< FLASH PROCON1: S1L (Bit 1) */ -#define FLASH_PROCON1_S1L_Msk (0x2UL) /*!< FLASH PROCON1: S1L (Bitfield-Mask: 0x01) */ -#define FLASH_PROCON1_S2L_Pos (2UL) /*!< FLASH PROCON1: S2L (Bit 2) */ -#define FLASH_PROCON1_S2L_Msk (0x4UL) /*!< FLASH PROCON1: S2L (Bitfield-Mask: 0x01) */ -#define FLASH_PROCON1_S3L_Pos (3UL) /*!< FLASH PROCON1: S3L (Bit 3) */ -#define FLASH_PROCON1_S3L_Msk (0x8UL) /*!< FLASH PROCON1: S3L (Bitfield-Mask: 0x01) */ -#define FLASH_PROCON1_S4L_Pos (4UL) /*!< FLASH PROCON1: S4L (Bit 4) */ -#define FLASH_PROCON1_S4L_Msk (0x10UL) /*!< FLASH PROCON1: S4L (Bitfield-Mask: 0x01) */ -#define FLASH_PROCON1_S5L_Pos (5UL) /*!< FLASH PROCON1: S5L (Bit 5) */ -#define FLASH_PROCON1_S5L_Msk (0x20UL) /*!< FLASH PROCON1: S5L (Bitfield-Mask: 0x01) */ -#define FLASH_PROCON1_S6L_Pos (6UL) /*!< FLASH PROCON1: S6L (Bit 6) */ -#define FLASH_PROCON1_S6L_Msk (0x40UL) /*!< FLASH PROCON1: S6L (Bitfield-Mask: 0x01) */ -#define FLASH_PROCON1_S7L_Pos (7UL) /*!< FLASH PROCON1: S7L (Bit 7) */ -#define FLASH_PROCON1_S7L_Msk (0x80UL) /*!< FLASH PROCON1: S7L (Bitfield-Mask: 0x01) */ -#define FLASH_PROCON1_S8L_Pos (8UL) /*!< FLASH PROCON1: S8L (Bit 8) */ -#define FLASH_PROCON1_S8L_Msk (0x100UL) /*!< FLASH PROCON1: S8L (Bitfield-Mask: 0x01) */ -#define FLASH_PROCON1_S9L_Pos (9UL) /*!< FLASH PROCON1: S9L (Bit 9) */ -#define FLASH_PROCON1_S9L_Msk (0x200UL) /*!< FLASH PROCON1: S9L (Bitfield-Mask: 0x01) */ -#define FLASH_PROCON1_S10_S11L_Pos (10UL) /*!< FLASH PROCON1: S10_S11L (Bit 10) */ -#define FLASH_PROCON1_S10_S11L_Msk (0x400UL) /*!< FLASH PROCON1: S10_S11L (Bitfield-Mask: 0x01) */ -#define FLASH_PROCON1_S12_S13L_Pos (11UL) /*!< FLASH PROCON1: S12_S13L (Bit 11) */ -#define FLASH_PROCON1_S12_S13L_Msk (0x800UL) /*!< FLASH PROCON1: S12_S13L (Bitfield-Mask: 0x01) */ -#define FLASH_PROCON1_S14_S15L_Pos (12UL) /*!< FLASH PROCON1: S14_S15L (Bit 12) */ -#define FLASH_PROCON1_S14_S15L_Msk (0x1000UL) /*!< FLASH PROCON1: S14_S15L (Bitfield-Mask: 0x01) */ -#define FLASH_PROCON1_PSR_Pos (16UL) /*!< FLASH PROCON1: PSR (Bit 16) */ -#define FLASH_PROCON1_PSR_Msk (0x10000UL) /*!< FLASH PROCON1: PSR (Bitfield-Mask: 0x01) */ - -/* -------------------------------- FLASH_PROCON2 ------------------------------- */ -#define FLASH_PROCON2_S0ROM_Pos (0UL) /*!< FLASH PROCON2: S0ROM (Bit 0) */ -#define FLASH_PROCON2_S0ROM_Msk (0x1UL) /*!< FLASH PROCON2: S0ROM (Bitfield-Mask: 0x01) */ -#define FLASH_PROCON2_S1ROM_Pos (1UL) /*!< FLASH PROCON2: S1ROM (Bit 1) */ -#define FLASH_PROCON2_S1ROM_Msk (0x2UL) /*!< FLASH PROCON2: S1ROM (Bitfield-Mask: 0x01) */ -#define FLASH_PROCON2_S2ROM_Pos (2UL) /*!< FLASH PROCON2: S2ROM (Bit 2) */ -#define FLASH_PROCON2_S2ROM_Msk (0x4UL) /*!< FLASH PROCON2: S2ROM (Bitfield-Mask: 0x01) */ -#define FLASH_PROCON2_S3ROM_Pos (3UL) /*!< FLASH PROCON2: S3ROM (Bit 3) */ -#define FLASH_PROCON2_S3ROM_Msk (0x8UL) /*!< FLASH PROCON2: S3ROM (Bitfield-Mask: 0x01) */ -#define FLASH_PROCON2_S4ROM_Pos (4UL) /*!< FLASH PROCON2: S4ROM (Bit 4) */ -#define FLASH_PROCON2_S4ROM_Msk (0x10UL) /*!< FLASH PROCON2: S4ROM (Bitfield-Mask: 0x01) */ -#define FLASH_PROCON2_S5ROM_Pos (5UL) /*!< FLASH PROCON2: S5ROM (Bit 5) */ -#define FLASH_PROCON2_S5ROM_Msk (0x20UL) /*!< FLASH PROCON2: S5ROM (Bitfield-Mask: 0x01) */ -#define FLASH_PROCON2_S6ROM_Pos (6UL) /*!< FLASH PROCON2: S6ROM (Bit 6) */ -#define FLASH_PROCON2_S6ROM_Msk (0x40UL) /*!< FLASH PROCON2: S6ROM (Bitfield-Mask: 0x01) */ -#define FLASH_PROCON2_S7ROM_Pos (7UL) /*!< FLASH PROCON2: S7ROM (Bit 7) */ -#define FLASH_PROCON2_S7ROM_Msk (0x80UL) /*!< FLASH PROCON2: S7ROM (Bitfield-Mask: 0x01) */ -#define FLASH_PROCON2_S8ROM_Pos (8UL) /*!< FLASH PROCON2: S8ROM (Bit 8) */ -#define FLASH_PROCON2_S8ROM_Msk (0x100UL) /*!< FLASH PROCON2: S8ROM (Bitfield-Mask: 0x01) */ -#define FLASH_PROCON2_S9ROM_Pos (9UL) /*!< FLASH PROCON2: S9ROM (Bit 9) */ -#define FLASH_PROCON2_S9ROM_Msk (0x200UL) /*!< FLASH PROCON2: S9ROM (Bitfield-Mask: 0x01) */ -#define FLASH_PROCON2_S10_S11ROM_Pos (10UL) /*!< FLASH PROCON2: S10_S11ROM (Bit 10) */ -#define FLASH_PROCON2_S10_S11ROM_Msk (0x400UL) /*!< FLASH PROCON2: S10_S11ROM (Bitfield-Mask: 0x01) */ -#define FLASH_PROCON2_S12_S13ROM_Pos (11UL) /*!< FLASH PROCON2: S12_S13ROM (Bit 11) */ -#define FLASH_PROCON2_S12_S13ROM_Msk (0x800UL) /*!< FLASH PROCON2: S12_S13ROM (Bitfield-Mask: 0x01) */ -#define FLASH_PROCON2_S14_S15ROM_Pos (12UL) /*!< FLASH PROCON2: S14_S15ROM (Bit 12) */ -#define FLASH_PROCON2_S14_S15ROM_Msk (0x1000UL) /*!< FLASH PROCON2: S14_S15ROM (Bitfield-Mask: 0x01) */ - - -/* ================================================================================ */ -/* ================ struct 'PREF' Position & Mask ================ */ -/* ================================================================================ */ - - -/* ---------------------------------- PREF_PCON --------------------------------- */ -#define PREF_PCON_IBYP_Pos (0UL) /*!< PREF PCON: IBYP (Bit 0) */ -#define PREF_PCON_IBYP_Msk (0x1UL) /*!< PREF PCON: IBYP (Bitfield-Mask: 0x01) */ -#define PREF_PCON_IINV_Pos (1UL) /*!< PREF PCON: IINV (Bit 1) */ -#define PREF_PCON_IINV_Msk (0x2UL) /*!< PREF PCON: IINV (Bitfield-Mask: 0x01) */ -#define PREF_PCON_DBYP_Pos (4UL) /*!< PREF PCON: DBYP (Bit 4) */ -#define PREF_PCON_DBYP_Msk (0x10UL) /*!< PREF PCON: DBYP (Bitfield-Mask: 0x01) */ - - -/* ================================================================================ */ -/* ================ Group 'PMU' Position & Mask ================ */ -/* ================================================================================ */ - - -/* ----------------------------------- PMU_ID ----------------------------------- */ -#define PMU_ID_MOD_REV_Pos (0UL) /*!< PMU ID: MOD_REV (Bit 0) */ -#define PMU_ID_MOD_REV_Msk (0xffUL) /*!< PMU ID: MOD_REV (Bitfield-Mask: 0xff) */ -#define PMU_ID_MOD_TYPE_Pos (8UL) /*!< PMU ID: MOD_TYPE (Bit 8) */ -#define PMU_ID_MOD_TYPE_Msk (0xff00UL) /*!< PMU ID: MOD_TYPE (Bitfield-Mask: 0xff) */ -#define PMU_ID_MOD_NUMBER_Pos (16UL) /*!< PMU ID: MOD_NUMBER (Bit 16) */ -#define PMU_ID_MOD_NUMBER_Msk (0xffff0000UL) /*!< PMU ID: MOD_NUMBER (Bitfield-Mask: 0xffff) */ - - -/* ================================================================================ */ -/* ================ struct 'WDT' Position & Mask ================ */ -/* ================================================================================ */ - - -/* ----------------------------------- WDT_ID ----------------------------------- */ -#define WDT_ID_MOD_REV_Pos (0UL) /*!< WDT ID: MOD_REV (Bit 0) */ -#define WDT_ID_MOD_REV_Msk (0xffUL) /*!< WDT ID: MOD_REV (Bitfield-Mask: 0xff) */ -#define WDT_ID_MOD_TYPE_Pos (8UL) /*!< WDT ID: MOD_TYPE (Bit 8) */ -#define WDT_ID_MOD_TYPE_Msk (0xff00UL) /*!< WDT ID: MOD_TYPE (Bitfield-Mask: 0xff) */ -#define WDT_ID_MOD_NUMBER_Pos (16UL) /*!< WDT ID: MOD_NUMBER (Bit 16) */ -#define WDT_ID_MOD_NUMBER_Msk (0xffff0000UL) /*!< WDT ID: MOD_NUMBER (Bitfield-Mask: 0xffff) */ - -/* ----------------------------------- WDT_CTR ---------------------------------- */ -#define WDT_CTR_ENB_Pos (0UL) /*!< WDT CTR: ENB (Bit 0) */ -#define WDT_CTR_ENB_Msk (0x1UL) /*!< WDT CTR: ENB (Bitfield-Mask: 0x01) */ -#define WDT_CTR_PRE_Pos (1UL) /*!< WDT CTR: PRE (Bit 1) */ -#define WDT_CTR_PRE_Msk (0x2UL) /*!< WDT CTR: PRE (Bitfield-Mask: 0x01) */ -#define WDT_CTR_DSP_Pos (4UL) /*!< WDT CTR: DSP (Bit 4) */ -#define WDT_CTR_DSP_Msk (0x10UL) /*!< WDT CTR: DSP (Bitfield-Mask: 0x01) */ -#define WDT_CTR_SPW_Pos (8UL) /*!< WDT CTR: SPW (Bit 8) */ -#define WDT_CTR_SPW_Msk (0xff00UL) /*!< WDT CTR: SPW (Bitfield-Mask: 0xff) */ - -/* ----------------------------------- WDT_SRV ---------------------------------- */ -#define WDT_SRV_SRV_Pos (0UL) /*!< WDT SRV: SRV (Bit 0) */ -#define WDT_SRV_SRV_Msk (0xffffffffUL) /*!< WDT SRV: SRV (Bitfield-Mask: 0xffffffff) */ - -/* ----------------------------------- WDT_TIM ---------------------------------- */ -#define WDT_TIM_TIM_Pos (0UL) /*!< WDT TIM: TIM (Bit 0) */ -#define WDT_TIM_TIM_Msk (0xffffffffUL) /*!< WDT TIM: TIM (Bitfield-Mask: 0xffffffff) */ - -/* ----------------------------------- WDT_WLB ---------------------------------- */ -#define WDT_WLB_WLB_Pos (0UL) /*!< WDT WLB: WLB (Bit 0) */ -#define WDT_WLB_WLB_Msk (0xffffffffUL) /*!< WDT WLB: WLB (Bitfield-Mask: 0xffffffff) */ - -/* ----------------------------------- WDT_WUB ---------------------------------- */ -#define WDT_WUB_WUB_Pos (0UL) /*!< WDT WUB: WUB (Bit 0) */ -#define WDT_WUB_WUB_Msk (0xffffffffUL) /*!< WDT WUB: WUB (Bitfield-Mask: 0xffffffff) */ - -/* --------------------------------- WDT_WDTSTS --------------------------------- */ -#define WDT_WDTSTS_ALMS_Pos (0UL) /*!< WDT WDTSTS: ALMS (Bit 0) */ -#define WDT_WDTSTS_ALMS_Msk (0x1UL) /*!< WDT WDTSTS: ALMS (Bitfield-Mask: 0x01) */ - -/* --------------------------------- WDT_WDTCLR --------------------------------- */ -#define WDT_WDTCLR_ALMC_Pos (0UL) /*!< WDT WDTCLR: ALMC (Bit 0) */ -#define WDT_WDTCLR_ALMC_Msk (0x1UL) /*!< WDT WDTCLR: ALMC (Bitfield-Mask: 0x01) */ - - -/* ================================================================================ */ -/* ================ struct 'RTC' Position & Mask ================ */ -/* ================================================================================ */ - - -/* ----------------------------------- RTC_ID ----------------------------------- */ -#define RTC_ID_MOD_REV_Pos (0UL) /*!< RTC ID: MOD_REV (Bit 0) */ -#define RTC_ID_MOD_REV_Msk (0xffUL) /*!< RTC ID: MOD_REV (Bitfield-Mask: 0xff) */ -#define RTC_ID_MOD_TYPE_Pos (8UL) /*!< RTC ID: MOD_TYPE (Bit 8) */ -#define RTC_ID_MOD_TYPE_Msk (0xff00UL) /*!< RTC ID: MOD_TYPE (Bitfield-Mask: 0xff) */ -#define RTC_ID_MOD_NUMBER_Pos (16UL) /*!< RTC ID: MOD_NUMBER (Bit 16) */ -#define RTC_ID_MOD_NUMBER_Msk (0xffff0000UL) /*!< RTC ID: MOD_NUMBER (Bitfield-Mask: 0xffff) */ - -/* ----------------------------------- RTC_CTR ---------------------------------- */ -#define RTC_CTR_ENB_Pos (0UL) /*!< RTC CTR: ENB (Bit 0) */ -#define RTC_CTR_ENB_Msk (0x1UL) /*!< RTC CTR: ENB (Bitfield-Mask: 0x01) */ -#define RTC_CTR_TAE_Pos (2UL) /*!< RTC CTR: TAE (Bit 2) */ -#define RTC_CTR_TAE_Msk (0x4UL) /*!< RTC CTR: TAE (Bitfield-Mask: 0x01) */ -#define RTC_CTR_ESEC_Pos (8UL) /*!< RTC CTR: ESEC (Bit 8) */ -#define RTC_CTR_ESEC_Msk (0x100UL) /*!< RTC CTR: ESEC (Bitfield-Mask: 0x01) */ -#define RTC_CTR_EMIC_Pos (9UL) /*!< RTC CTR: EMIC (Bit 9) */ -#define RTC_CTR_EMIC_Msk (0x200UL) /*!< RTC CTR: EMIC (Bitfield-Mask: 0x01) */ -#define RTC_CTR_EHOC_Pos (10UL) /*!< RTC CTR: EHOC (Bit 10) */ -#define RTC_CTR_EHOC_Msk (0x400UL) /*!< RTC CTR: EHOC (Bitfield-Mask: 0x01) */ -#define RTC_CTR_EDAC_Pos (11UL) /*!< RTC CTR: EDAC (Bit 11) */ -#define RTC_CTR_EDAC_Msk (0x800UL) /*!< RTC CTR: EDAC (Bitfield-Mask: 0x01) */ -#define RTC_CTR_EMOC_Pos (13UL) /*!< RTC CTR: EMOC (Bit 13) */ -#define RTC_CTR_EMOC_Msk (0x2000UL) /*!< RTC CTR: EMOC (Bitfield-Mask: 0x01) */ -#define RTC_CTR_EYEC_Pos (14UL) /*!< RTC CTR: EYEC (Bit 14) */ -#define RTC_CTR_EYEC_Msk (0x4000UL) /*!< RTC CTR: EYEC (Bitfield-Mask: 0x01) */ -#define RTC_CTR_DIV_Pos (16UL) /*!< RTC CTR: DIV (Bit 16) */ -#define RTC_CTR_DIV_Msk (0xffff0000UL) /*!< RTC CTR: DIV (Bitfield-Mask: 0xffff) */ - -/* --------------------------------- RTC_RAWSTAT -------------------------------- */ -#define RTC_RAWSTAT_RPSE_Pos (0UL) /*!< RTC RAWSTAT: RPSE (Bit 0) */ -#define RTC_RAWSTAT_RPSE_Msk (0x1UL) /*!< RTC RAWSTAT: RPSE (Bitfield-Mask: 0x01) */ -#define RTC_RAWSTAT_RPMI_Pos (1UL) /*!< RTC RAWSTAT: RPMI (Bit 1) */ -#define RTC_RAWSTAT_RPMI_Msk (0x2UL) /*!< RTC RAWSTAT: RPMI (Bitfield-Mask: 0x01) */ -#define RTC_RAWSTAT_RPHO_Pos (2UL) /*!< RTC RAWSTAT: RPHO (Bit 2) */ -#define RTC_RAWSTAT_RPHO_Msk (0x4UL) /*!< RTC RAWSTAT: RPHO (Bitfield-Mask: 0x01) */ -#define RTC_RAWSTAT_RPDA_Pos (3UL) /*!< RTC RAWSTAT: RPDA (Bit 3) */ -#define RTC_RAWSTAT_RPDA_Msk (0x8UL) /*!< RTC RAWSTAT: RPDA (Bitfield-Mask: 0x01) */ -#define RTC_RAWSTAT_RPMO_Pos (5UL) /*!< RTC RAWSTAT: RPMO (Bit 5) */ -#define RTC_RAWSTAT_RPMO_Msk (0x20UL) /*!< RTC RAWSTAT: RPMO (Bitfield-Mask: 0x01) */ -#define RTC_RAWSTAT_RPYE_Pos (6UL) /*!< RTC RAWSTAT: RPYE (Bit 6) */ -#define RTC_RAWSTAT_RPYE_Msk (0x40UL) /*!< RTC RAWSTAT: RPYE (Bitfield-Mask: 0x01) */ -#define RTC_RAWSTAT_RAI_Pos (8UL) /*!< RTC RAWSTAT: RAI (Bit 8) */ -#define RTC_RAWSTAT_RAI_Msk (0x100UL) /*!< RTC RAWSTAT: RAI (Bitfield-Mask: 0x01) */ - -/* ---------------------------------- RTC_STSSR --------------------------------- */ -#define RTC_STSSR_SPSE_Pos (0UL) /*!< RTC STSSR: SPSE (Bit 0) */ -#define RTC_STSSR_SPSE_Msk (0x1UL) /*!< RTC STSSR: SPSE (Bitfield-Mask: 0x01) */ -#define RTC_STSSR_SPMI_Pos (1UL) /*!< RTC STSSR: SPMI (Bit 1) */ -#define RTC_STSSR_SPMI_Msk (0x2UL) /*!< RTC STSSR: SPMI (Bitfield-Mask: 0x01) */ -#define RTC_STSSR_SPHO_Pos (2UL) /*!< RTC STSSR: SPHO (Bit 2) */ -#define RTC_STSSR_SPHO_Msk (0x4UL) /*!< RTC STSSR: SPHO (Bitfield-Mask: 0x01) */ -#define RTC_STSSR_SPDA_Pos (3UL) /*!< RTC STSSR: SPDA (Bit 3) */ -#define RTC_STSSR_SPDA_Msk (0x8UL) /*!< RTC STSSR: SPDA (Bitfield-Mask: 0x01) */ -#define RTC_STSSR_SPMO_Pos (5UL) /*!< RTC STSSR: SPMO (Bit 5) */ -#define RTC_STSSR_SPMO_Msk (0x20UL) /*!< RTC STSSR: SPMO (Bitfield-Mask: 0x01) */ -#define RTC_STSSR_SPYE_Pos (6UL) /*!< RTC STSSR: SPYE (Bit 6) */ -#define RTC_STSSR_SPYE_Msk (0x40UL) /*!< RTC STSSR: SPYE (Bitfield-Mask: 0x01) */ -#define RTC_STSSR_SAI_Pos (8UL) /*!< RTC STSSR: SAI (Bit 8) */ -#define RTC_STSSR_SAI_Msk (0x100UL) /*!< RTC STSSR: SAI (Bitfield-Mask: 0x01) */ - -/* ---------------------------------- RTC_MSKSR --------------------------------- */ -#define RTC_MSKSR_MPSE_Pos (0UL) /*!< RTC MSKSR: MPSE (Bit 0) */ -#define RTC_MSKSR_MPSE_Msk (0x1UL) /*!< RTC MSKSR: MPSE (Bitfield-Mask: 0x01) */ -#define RTC_MSKSR_MPMI_Pos (1UL) /*!< RTC MSKSR: MPMI (Bit 1) */ -#define RTC_MSKSR_MPMI_Msk (0x2UL) /*!< RTC MSKSR: MPMI (Bitfield-Mask: 0x01) */ -#define RTC_MSKSR_MPHO_Pos (2UL) /*!< RTC MSKSR: MPHO (Bit 2) */ -#define RTC_MSKSR_MPHO_Msk (0x4UL) /*!< RTC MSKSR: MPHO (Bitfield-Mask: 0x01) */ -#define RTC_MSKSR_MPDA_Pos (3UL) /*!< RTC MSKSR: MPDA (Bit 3) */ -#define RTC_MSKSR_MPDA_Msk (0x8UL) /*!< RTC MSKSR: MPDA (Bitfield-Mask: 0x01) */ -#define RTC_MSKSR_MPMO_Pos (5UL) /*!< RTC MSKSR: MPMO (Bit 5) */ -#define RTC_MSKSR_MPMO_Msk (0x20UL) /*!< RTC MSKSR: MPMO (Bitfield-Mask: 0x01) */ -#define RTC_MSKSR_MPYE_Pos (6UL) /*!< RTC MSKSR: MPYE (Bit 6) */ -#define RTC_MSKSR_MPYE_Msk (0x40UL) /*!< RTC MSKSR: MPYE (Bitfield-Mask: 0x01) */ -#define RTC_MSKSR_MAI_Pos (8UL) /*!< RTC MSKSR: MAI (Bit 8) */ -#define RTC_MSKSR_MAI_Msk (0x100UL) /*!< RTC MSKSR: MAI (Bitfield-Mask: 0x01) */ - -/* ---------------------------------- RTC_CLRSR --------------------------------- */ -#define RTC_CLRSR_RPSE_Pos (0UL) /*!< RTC CLRSR: RPSE (Bit 0) */ -#define RTC_CLRSR_RPSE_Msk (0x1UL) /*!< RTC CLRSR: RPSE (Bitfield-Mask: 0x01) */ -#define RTC_CLRSR_RPMI_Pos (1UL) /*!< RTC CLRSR: RPMI (Bit 1) */ -#define RTC_CLRSR_RPMI_Msk (0x2UL) /*!< RTC CLRSR: RPMI (Bitfield-Mask: 0x01) */ -#define RTC_CLRSR_RPHO_Pos (2UL) /*!< RTC CLRSR: RPHO (Bit 2) */ -#define RTC_CLRSR_RPHO_Msk (0x4UL) /*!< RTC CLRSR: RPHO (Bitfield-Mask: 0x01) */ -#define RTC_CLRSR_RPDA_Pos (3UL) /*!< RTC CLRSR: RPDA (Bit 3) */ -#define RTC_CLRSR_RPDA_Msk (0x8UL) /*!< RTC CLRSR: RPDA (Bitfield-Mask: 0x01) */ -#define RTC_CLRSR_RPMO_Pos (5UL) /*!< RTC CLRSR: RPMO (Bit 5) */ -#define RTC_CLRSR_RPMO_Msk (0x20UL) /*!< RTC CLRSR: RPMO (Bitfield-Mask: 0x01) */ -#define RTC_CLRSR_RPYE_Pos (6UL) /*!< RTC CLRSR: RPYE (Bit 6) */ -#define RTC_CLRSR_RPYE_Msk (0x40UL) /*!< RTC CLRSR: RPYE (Bitfield-Mask: 0x01) */ -#define RTC_CLRSR_RAI_Pos (8UL) /*!< RTC CLRSR: RAI (Bit 8) */ -#define RTC_CLRSR_RAI_Msk (0x100UL) /*!< RTC CLRSR: RAI (Bitfield-Mask: 0x01) */ - -/* ---------------------------------- RTC_ATIM0 --------------------------------- */ -#define RTC_ATIM0_ASE_Pos (0UL) /*!< RTC ATIM0: ASE (Bit 0) */ -#define RTC_ATIM0_ASE_Msk (0x3fUL) /*!< RTC ATIM0: ASE (Bitfield-Mask: 0x3f) */ -#define RTC_ATIM0_AMI_Pos (8UL) /*!< RTC ATIM0: AMI (Bit 8) */ -#define RTC_ATIM0_AMI_Msk (0x3f00UL) /*!< RTC ATIM0: AMI (Bitfield-Mask: 0x3f) */ -#define RTC_ATIM0_AHO_Pos (16UL) /*!< RTC ATIM0: AHO (Bit 16) */ -#define RTC_ATIM0_AHO_Msk (0x1f0000UL) /*!< RTC ATIM0: AHO (Bitfield-Mask: 0x1f) */ -#define RTC_ATIM0_ADA_Pos (24UL) /*!< RTC ATIM0: ADA (Bit 24) */ -#define RTC_ATIM0_ADA_Msk (0x1f000000UL) /*!< RTC ATIM0: ADA (Bitfield-Mask: 0x1f) */ - -/* ---------------------------------- RTC_ATIM1 --------------------------------- */ -#define RTC_ATIM1_AMO_Pos (8UL) /*!< RTC ATIM1: AMO (Bit 8) */ -#define RTC_ATIM1_AMO_Msk (0xf00UL) /*!< RTC ATIM1: AMO (Bitfield-Mask: 0x0f) */ -#define RTC_ATIM1_AYE_Pos (16UL) /*!< RTC ATIM1: AYE (Bit 16) */ -#define RTC_ATIM1_AYE_Msk (0xffff0000UL) /*!< RTC ATIM1: AYE (Bitfield-Mask: 0xffff) */ - -/* ---------------------------------- RTC_TIM0 ---------------------------------- */ -#define RTC_TIM0_SE_Pos (0UL) /*!< RTC TIM0: SE (Bit 0) */ -#define RTC_TIM0_SE_Msk (0x3fUL) /*!< RTC TIM0: SE (Bitfield-Mask: 0x3f) */ -#define RTC_TIM0_MI_Pos (8UL) /*!< RTC TIM0: MI (Bit 8) */ -#define RTC_TIM0_MI_Msk (0x3f00UL) /*!< RTC TIM0: MI (Bitfield-Mask: 0x3f) */ -#define RTC_TIM0_HO_Pos (16UL) /*!< RTC TIM0: HO (Bit 16) */ -#define RTC_TIM0_HO_Msk (0x1f0000UL) /*!< RTC TIM0: HO (Bitfield-Mask: 0x1f) */ -#define RTC_TIM0_DA_Pos (24UL) /*!< RTC TIM0: DA (Bit 24) */ -#define RTC_TIM0_DA_Msk (0x1f000000UL) /*!< RTC TIM0: DA (Bitfield-Mask: 0x1f) */ - -/* ---------------------------------- RTC_TIM1 ---------------------------------- */ -#define RTC_TIM1_DAWE_Pos (0UL) /*!< RTC TIM1: DAWE (Bit 0) */ -#define RTC_TIM1_DAWE_Msk (0x7UL) /*!< RTC TIM1: DAWE (Bitfield-Mask: 0x07) */ -#define RTC_TIM1_MO_Pos (8UL) /*!< RTC TIM1: MO (Bit 8) */ -#define RTC_TIM1_MO_Msk (0xf00UL) /*!< RTC TIM1: MO (Bitfield-Mask: 0x0f) */ -#define RTC_TIM1_YE_Pos (16UL) /*!< RTC TIM1: YE (Bit 16) */ -#define RTC_TIM1_YE_Msk (0xffff0000UL) /*!< RTC TIM1: YE (Bitfield-Mask: 0xffff) */ - - -/* ================================================================================ */ -/* ================ struct 'SCU_CLK' Position & Mask ================ */ -/* ================================================================================ */ - - -/* ------------------------------- SCU_CLK_CLKSTAT ------------------------------ */ -#define SCU_CLK_CLKSTAT_USBCST_Pos (0UL) /*!< SCU_CLK CLKSTAT: USBCST (Bit 0) */ -#define SCU_CLK_CLKSTAT_USBCST_Msk (0x1UL) /*!< SCU_CLK CLKSTAT: USBCST (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CLKSTAT_MMCCST_Pos (1UL) /*!< SCU_CLK CLKSTAT: MMCCST (Bit 1) */ -#define SCU_CLK_CLKSTAT_MMCCST_Msk (0x2UL) /*!< SCU_CLK CLKSTAT: MMCCST (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CLKSTAT_ETH0CST_Pos (2UL) /*!< SCU_CLK CLKSTAT: ETH0CST (Bit 2) */ -#define SCU_CLK_CLKSTAT_ETH0CST_Msk (0x4UL) /*!< SCU_CLK CLKSTAT: ETH0CST (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CLKSTAT_EBUCST_Pos (3UL) /*!< SCU_CLK CLKSTAT: EBUCST (Bit 3) */ -#define SCU_CLK_CLKSTAT_EBUCST_Msk (0x8UL) /*!< SCU_CLK CLKSTAT: EBUCST (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CLKSTAT_CCUCST_Pos (4UL) /*!< SCU_CLK CLKSTAT: CCUCST (Bit 4) */ -#define SCU_CLK_CLKSTAT_CCUCST_Msk (0x10UL) /*!< SCU_CLK CLKSTAT: CCUCST (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CLKSTAT_WDTCST_Pos (5UL) /*!< SCU_CLK CLKSTAT: WDTCST (Bit 5) */ -#define SCU_CLK_CLKSTAT_WDTCST_Msk (0x20UL) /*!< SCU_CLK CLKSTAT: WDTCST (Bitfield-Mask: 0x01) */ - -/* ------------------------------- SCU_CLK_CLKSET ------------------------------- */ -#define SCU_CLK_CLKSET_USBCEN_Pos (0UL) /*!< SCU_CLK CLKSET: USBCEN (Bit 0) */ -#define SCU_CLK_CLKSET_USBCEN_Msk (0x1UL) /*!< SCU_CLK CLKSET: USBCEN (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CLKSET_MMCCEN_Pos (1UL) /*!< SCU_CLK CLKSET: MMCCEN (Bit 1) */ -#define SCU_CLK_CLKSET_MMCCEN_Msk (0x2UL) /*!< SCU_CLK CLKSET: MMCCEN (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CLKSET_ETH0CEN_Pos (2UL) /*!< SCU_CLK CLKSET: ETH0CEN (Bit 2) */ -#define SCU_CLK_CLKSET_ETH0CEN_Msk (0x4UL) /*!< SCU_CLK CLKSET: ETH0CEN (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CLKSET_EBUCEN_Pos (3UL) /*!< SCU_CLK CLKSET: EBUCEN (Bit 3) */ -#define SCU_CLK_CLKSET_EBUCEN_Msk (0x8UL) /*!< SCU_CLK CLKSET: EBUCEN (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CLKSET_CCUCEN_Pos (4UL) /*!< SCU_CLK CLKSET: CCUCEN (Bit 4) */ -#define SCU_CLK_CLKSET_CCUCEN_Msk (0x10UL) /*!< SCU_CLK CLKSET: CCUCEN (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CLKSET_WDTCEN_Pos (5UL) /*!< SCU_CLK CLKSET: WDTCEN (Bit 5) */ -#define SCU_CLK_CLKSET_WDTCEN_Msk (0x20UL) /*!< SCU_CLK CLKSET: WDTCEN (Bitfield-Mask: 0x01) */ - -/* ------------------------------- SCU_CLK_CLKCLR ------------------------------- */ -#define SCU_CLK_CLKCLR_USBCDI_Pos (0UL) /*!< SCU_CLK CLKCLR: USBCDI (Bit 0) */ -#define SCU_CLK_CLKCLR_USBCDI_Msk (0x1UL) /*!< SCU_CLK CLKCLR: USBCDI (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CLKCLR_MMCCDI_Pos (1UL) /*!< SCU_CLK CLKCLR: MMCCDI (Bit 1) */ -#define SCU_CLK_CLKCLR_MMCCDI_Msk (0x2UL) /*!< SCU_CLK CLKCLR: MMCCDI (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CLKCLR_ETH0CDI_Pos (2UL) /*!< SCU_CLK CLKCLR: ETH0CDI (Bit 2) */ -#define SCU_CLK_CLKCLR_ETH0CDI_Msk (0x4UL) /*!< SCU_CLK CLKCLR: ETH0CDI (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CLKCLR_EBUCDI_Pos (3UL) /*!< SCU_CLK CLKCLR: EBUCDI (Bit 3) */ -#define SCU_CLK_CLKCLR_EBUCDI_Msk (0x8UL) /*!< SCU_CLK CLKCLR: EBUCDI (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CLKCLR_CCUCDI_Pos (4UL) /*!< SCU_CLK CLKCLR: CCUCDI (Bit 4) */ -#define SCU_CLK_CLKCLR_CCUCDI_Msk (0x10UL) /*!< SCU_CLK CLKCLR: CCUCDI (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CLKCLR_WDTCDI_Pos (5UL) /*!< SCU_CLK CLKCLR: WDTCDI (Bit 5) */ -#define SCU_CLK_CLKCLR_WDTCDI_Msk (0x20UL) /*!< SCU_CLK CLKCLR: WDTCDI (Bitfield-Mask: 0x01) */ - -/* ------------------------------ SCU_CLK_SYSCLKCR ------------------------------ */ -#define SCU_CLK_SYSCLKCR_SYSDIV_Pos (0UL) /*!< SCU_CLK SYSCLKCR: SYSDIV (Bit 0) */ -#define SCU_CLK_SYSCLKCR_SYSDIV_Msk (0xffUL) /*!< SCU_CLK SYSCLKCR: SYSDIV (Bitfield-Mask: 0xff) */ -#define SCU_CLK_SYSCLKCR_SYSSEL_Pos (16UL) /*!< SCU_CLK SYSCLKCR: SYSSEL (Bit 16) */ -#define SCU_CLK_SYSCLKCR_SYSSEL_Msk (0x10000UL) /*!< SCU_CLK SYSCLKCR: SYSSEL (Bitfield-Mask: 0x01) */ - -/* ------------------------------ SCU_CLK_CPUCLKCR ------------------------------ */ -#define SCU_CLK_CPUCLKCR_CPUDIV_Pos (0UL) /*!< SCU_CLK CPUCLKCR: CPUDIV (Bit 0) */ -#define SCU_CLK_CPUCLKCR_CPUDIV_Msk (0x1UL) /*!< SCU_CLK CPUCLKCR: CPUDIV (Bitfield-Mask: 0x01) */ - -/* ------------------------------- SCU_CLK_PBCLKCR ------------------------------ */ -#define SCU_CLK_PBCLKCR_PBDIV_Pos (0UL) /*!< SCU_CLK PBCLKCR: PBDIV (Bit 0) */ -#define SCU_CLK_PBCLKCR_PBDIV_Msk (0x1UL) /*!< SCU_CLK PBCLKCR: PBDIV (Bitfield-Mask: 0x01) */ - -/* ------------------------------ SCU_CLK_USBCLKCR ------------------------------ */ -#define SCU_CLK_USBCLKCR_USBDIV_Pos (0UL) /*!< SCU_CLK USBCLKCR: USBDIV (Bit 0) */ -#define SCU_CLK_USBCLKCR_USBDIV_Msk (0x7UL) /*!< SCU_CLK USBCLKCR: USBDIV (Bitfield-Mask: 0x07) */ -#define SCU_CLK_USBCLKCR_USBSEL_Pos (16UL) /*!< SCU_CLK USBCLKCR: USBSEL (Bit 16) */ -#define SCU_CLK_USBCLKCR_USBSEL_Msk (0x10000UL) /*!< SCU_CLK USBCLKCR: USBSEL (Bitfield-Mask: 0x01) */ - -/* ------------------------------ SCU_CLK_EBUCLKCR ------------------------------ */ -#define SCU_CLK_EBUCLKCR_EBUDIV_Pos (0UL) /*!< SCU_CLK EBUCLKCR: EBUDIV (Bit 0) */ -#define SCU_CLK_EBUCLKCR_EBUDIV_Msk (0x3fUL) /*!< SCU_CLK EBUCLKCR: EBUDIV (Bitfield-Mask: 0x3f) */ - -/* ------------------------------ SCU_CLK_CCUCLKCR ------------------------------ */ -#define SCU_CLK_CCUCLKCR_CCUDIV_Pos (0UL) /*!< SCU_CLK CCUCLKCR: CCUDIV (Bit 0) */ -#define SCU_CLK_CCUCLKCR_CCUDIV_Msk (0x1UL) /*!< SCU_CLK CCUCLKCR: CCUDIV (Bitfield-Mask: 0x01) */ - -/* ------------------------------ SCU_CLK_WDTCLKCR ------------------------------ */ -#define SCU_CLK_WDTCLKCR_WDTDIV_Pos (0UL) /*!< SCU_CLK WDTCLKCR: WDTDIV (Bit 0) */ -#define SCU_CLK_WDTCLKCR_WDTDIV_Msk (0xffUL) /*!< SCU_CLK WDTCLKCR: WDTDIV (Bitfield-Mask: 0xff) */ -#define SCU_CLK_WDTCLKCR_WDTSEL_Pos (16UL) /*!< SCU_CLK WDTCLKCR: WDTSEL (Bit 16) */ -#define SCU_CLK_WDTCLKCR_WDTSEL_Msk (0x30000UL) /*!< SCU_CLK WDTCLKCR: WDTSEL (Bitfield-Mask: 0x03) */ - -/* ------------------------------ SCU_CLK_EXTCLKCR ------------------------------ */ -#define SCU_CLK_EXTCLKCR_ECKSEL_Pos (0UL) /*!< SCU_CLK EXTCLKCR: ECKSEL (Bit 0) */ -#define SCU_CLK_EXTCLKCR_ECKSEL_Msk (0x3UL) /*!< SCU_CLK EXTCLKCR: ECKSEL (Bitfield-Mask: 0x03) */ -#define SCU_CLK_EXTCLKCR_ECKDIV_Pos (16UL) /*!< SCU_CLK EXTCLKCR: ECKDIV (Bit 16) */ -#define SCU_CLK_EXTCLKCR_ECKDIV_Msk (0x1ff0000UL) /*!< SCU_CLK EXTCLKCR: ECKDIV (Bitfield-Mask: 0x1ff) */ - -/* ----------------------------- SCU_CLK_MLINKCLKCR ----------------------------- */ -#define SCU_CLK_MLINKCLKCR_SYSDIV_Pos (0UL) /*!< SCU_CLK MLINKCLKCR: SYSDIV (Bit 0) */ -#define SCU_CLK_MLINKCLKCR_SYSDIV_Msk (0xffUL) /*!< SCU_CLK MLINKCLKCR: SYSDIV (Bitfield-Mask: 0xff) */ -#define SCU_CLK_MLINKCLKCR_SYSSEL_Pos (8UL) /*!< SCU_CLK MLINKCLKCR: SYSSEL (Bit 8) */ -#define SCU_CLK_MLINKCLKCR_SYSSEL_Msk (0x100UL) /*!< SCU_CLK MLINKCLKCR: SYSSEL (Bitfield-Mask: 0x01) */ -#define SCU_CLK_MLINKCLKCR_CPUDIV_Pos (10UL) /*!< SCU_CLK MLINKCLKCR: CPUDIV (Bit 10) */ -#define SCU_CLK_MLINKCLKCR_CPUDIV_Msk (0x400UL) /*!< SCU_CLK MLINKCLKCR: CPUDIV (Bitfield-Mask: 0x01) */ -#define SCU_CLK_MLINKCLKCR_PBDIV_Pos (12UL) /*!< SCU_CLK MLINKCLKCR: PBDIV (Bit 12) */ -#define SCU_CLK_MLINKCLKCR_PBDIV_Msk (0x1000UL) /*!< SCU_CLK MLINKCLKCR: PBDIV (Bitfield-Mask: 0x01) */ -#define SCU_CLK_MLINKCLKCR_CCUDIV_Pos (14UL) /*!< SCU_CLK MLINKCLKCR: CCUDIV (Bit 14) */ -#define SCU_CLK_MLINKCLKCR_CCUDIV_Msk (0x4000UL) /*!< SCU_CLK MLINKCLKCR: CCUDIV (Bitfield-Mask: 0x01) */ -#define SCU_CLK_MLINKCLKCR_WDTDIV_Pos (16UL) /*!< SCU_CLK MLINKCLKCR: WDTDIV (Bit 16) */ -#define SCU_CLK_MLINKCLKCR_WDTDIV_Msk (0xff0000UL) /*!< SCU_CLK MLINKCLKCR: WDTDIV (Bitfield-Mask: 0xff) */ -#define SCU_CLK_MLINKCLKCR_WDTSEL_Pos (24UL) /*!< SCU_CLK MLINKCLKCR: WDTSEL (Bit 24) */ -#define SCU_CLK_MLINKCLKCR_WDTSEL_Msk (0x3000000UL) /*!< SCU_CLK MLINKCLKCR: WDTSEL (Bitfield-Mask: 0x03) */ -#define SCU_CLK_MLINKCLKCR_EBUDIV_Pos (26UL) /*!< SCU_CLK MLINKCLKCR: EBUDIV (Bit 26) */ -#define SCU_CLK_MLINKCLKCR_EBUDIV_Msk (0xfc000000UL) /*!< SCU_CLK MLINKCLKCR: EBUDIV (Bitfield-Mask: 0x3f) */ - -/* ------------------------------- SCU_CLK_SLEEPCR ------------------------------ */ -#define SCU_CLK_SLEEPCR_SYSSEL_Pos (0UL) /*!< SCU_CLK SLEEPCR: SYSSEL (Bit 0) */ -#define SCU_CLK_SLEEPCR_SYSSEL_Msk (0x1UL) /*!< SCU_CLK SLEEPCR: SYSSEL (Bitfield-Mask: 0x01) */ -#define SCU_CLK_SLEEPCR_USBCR_Pos (16UL) /*!< SCU_CLK SLEEPCR: USBCR (Bit 16) */ -#define SCU_CLK_SLEEPCR_USBCR_Msk (0x10000UL) /*!< SCU_CLK SLEEPCR: USBCR (Bitfield-Mask: 0x01) */ -#define SCU_CLK_SLEEPCR_MMCCR_Pos (17UL) /*!< SCU_CLK SLEEPCR: MMCCR (Bit 17) */ -#define SCU_CLK_SLEEPCR_MMCCR_Msk (0x20000UL) /*!< SCU_CLK SLEEPCR: MMCCR (Bitfield-Mask: 0x01) */ -#define SCU_CLK_SLEEPCR_ETH0CR_Pos (18UL) /*!< SCU_CLK SLEEPCR: ETH0CR (Bit 18) */ -#define SCU_CLK_SLEEPCR_ETH0CR_Msk (0x40000UL) /*!< SCU_CLK SLEEPCR: ETH0CR (Bitfield-Mask: 0x01) */ -#define SCU_CLK_SLEEPCR_EBUCR_Pos (19UL) /*!< SCU_CLK SLEEPCR: EBUCR (Bit 19) */ -#define SCU_CLK_SLEEPCR_EBUCR_Msk (0x80000UL) /*!< SCU_CLK SLEEPCR: EBUCR (Bitfield-Mask: 0x01) */ -#define SCU_CLK_SLEEPCR_CCUCR_Pos (20UL) /*!< SCU_CLK SLEEPCR: CCUCR (Bit 20) */ -#define SCU_CLK_SLEEPCR_CCUCR_Msk (0x100000UL) /*!< SCU_CLK SLEEPCR: CCUCR (Bitfield-Mask: 0x01) */ -#define SCU_CLK_SLEEPCR_WDTCR_Pos (21UL) /*!< SCU_CLK SLEEPCR: WDTCR (Bit 21) */ -#define SCU_CLK_SLEEPCR_WDTCR_Msk (0x200000UL) /*!< SCU_CLK SLEEPCR: WDTCR (Bitfield-Mask: 0x01) */ - -/* ------------------------------ SCU_CLK_DSLEEPCR ------------------------------ */ -#define SCU_CLK_DSLEEPCR_SYSSEL_Pos (0UL) /*!< SCU_CLK DSLEEPCR: SYSSEL (Bit 0) */ -#define SCU_CLK_DSLEEPCR_SYSSEL_Msk (0x3UL) /*!< SCU_CLK DSLEEPCR: SYSSEL (Bitfield-Mask: 0x03) */ -#define SCU_CLK_DSLEEPCR_FPDN_Pos (11UL) /*!< SCU_CLK DSLEEPCR: FPDN (Bit 11) */ -#define SCU_CLK_DSLEEPCR_FPDN_Msk (0x800UL) /*!< SCU_CLK DSLEEPCR: FPDN (Bitfield-Mask: 0x01) */ -#define SCU_CLK_DSLEEPCR_PLLPDN_Pos (12UL) /*!< SCU_CLK DSLEEPCR: PLLPDN (Bit 12) */ -#define SCU_CLK_DSLEEPCR_PLLPDN_Msk (0x1000UL) /*!< SCU_CLK DSLEEPCR: PLLPDN (Bitfield-Mask: 0x01) */ -#define SCU_CLK_DSLEEPCR_VCOPDN_Pos (13UL) /*!< SCU_CLK DSLEEPCR: VCOPDN (Bit 13) */ -#define SCU_CLK_DSLEEPCR_VCOPDN_Msk (0x2000UL) /*!< SCU_CLK DSLEEPCR: VCOPDN (Bitfield-Mask: 0x01) */ -#define SCU_CLK_DSLEEPCR_USBCR_Pos (16UL) /*!< SCU_CLK DSLEEPCR: USBCR (Bit 16) */ -#define SCU_CLK_DSLEEPCR_USBCR_Msk (0x10000UL) /*!< SCU_CLK DSLEEPCR: USBCR (Bitfield-Mask: 0x01) */ -#define SCU_CLK_DSLEEPCR_MMCCR_Pos (17UL) /*!< SCU_CLK DSLEEPCR: MMCCR (Bit 17) */ -#define SCU_CLK_DSLEEPCR_MMCCR_Msk (0x20000UL) /*!< SCU_CLK DSLEEPCR: MMCCR (Bitfield-Mask: 0x01) */ -#define SCU_CLK_DSLEEPCR_ETH0CR_Pos (18UL) /*!< SCU_CLK DSLEEPCR: ETH0CR (Bit 18) */ -#define SCU_CLK_DSLEEPCR_ETH0CR_Msk (0x40000UL) /*!< SCU_CLK DSLEEPCR: ETH0CR (Bitfield-Mask: 0x01) */ -#define SCU_CLK_DSLEEPCR_EBUCR_Pos (19UL) /*!< SCU_CLK DSLEEPCR: EBUCR (Bit 19) */ -#define SCU_CLK_DSLEEPCR_EBUCR_Msk (0x80000UL) /*!< SCU_CLK DSLEEPCR: EBUCR (Bitfield-Mask: 0x01) */ -#define SCU_CLK_DSLEEPCR_CCUCR_Pos (20UL) /*!< SCU_CLK DSLEEPCR: CCUCR (Bit 20) */ -#define SCU_CLK_DSLEEPCR_CCUCR_Msk (0x100000UL) /*!< SCU_CLK DSLEEPCR: CCUCR (Bitfield-Mask: 0x01) */ -#define SCU_CLK_DSLEEPCR_WDTCR_Pos (21UL) /*!< SCU_CLK DSLEEPCR: WDTCR (Bit 21) */ -#define SCU_CLK_DSLEEPCR_WDTCR_Msk (0x200000UL) /*!< SCU_CLK DSLEEPCR: WDTCR (Bitfield-Mask: 0x01) */ - -/* ------------------------------ SCU_CLK_ECATCLKCR ----------------------------- */ -#define SCU_CLK_ECATCLKCR_ECADIV_Pos (0UL) /*!< SCU_CLK ECATCLKCR: ECADIV (Bit 0) */ -#define SCU_CLK_ECATCLKCR_ECADIV_Msk (0x3UL) /*!< SCU_CLK ECATCLKCR: ECADIV (Bitfield-Mask: 0x03) */ -#define SCU_CLK_ECATCLKCR_ECATSEL_Pos (16UL) /*!< SCU_CLK ECATCLKCR: ECATSEL (Bit 16) */ -#define SCU_CLK_ECATCLKCR_ECATSEL_Msk (0x10000UL) /*!< SCU_CLK ECATCLKCR: ECATSEL (Bitfield-Mask: 0x01) */ - -/* ------------------------------ SCU_CLK_CGATSTAT0 ----------------------------- */ -#define SCU_CLK_CGATSTAT0_VADC_Pos (0UL) /*!< SCU_CLK CGATSTAT0: VADC (Bit 0) */ -#define SCU_CLK_CGATSTAT0_VADC_Msk (0x1UL) /*!< SCU_CLK CGATSTAT0: VADC (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CGATSTAT0_DSD_Pos (1UL) /*!< SCU_CLK CGATSTAT0: DSD (Bit 1) */ -#define SCU_CLK_CGATSTAT0_DSD_Msk (0x2UL) /*!< SCU_CLK CGATSTAT0: DSD (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CGATSTAT0_CCU40_Pos (2UL) /*!< SCU_CLK CGATSTAT0: CCU40 (Bit 2) */ -#define SCU_CLK_CGATSTAT0_CCU40_Msk (0x4UL) /*!< SCU_CLK CGATSTAT0: CCU40 (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CGATSTAT0_CCU41_Pos (3UL) /*!< SCU_CLK CGATSTAT0: CCU41 (Bit 3) */ -#define SCU_CLK_CGATSTAT0_CCU41_Msk (0x8UL) /*!< SCU_CLK CGATSTAT0: CCU41 (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CGATSTAT0_CCU42_Pos (4UL) /*!< SCU_CLK CGATSTAT0: CCU42 (Bit 4) */ -#define SCU_CLK_CGATSTAT0_CCU42_Msk (0x10UL) /*!< SCU_CLK CGATSTAT0: CCU42 (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CGATSTAT0_CCU80_Pos (7UL) /*!< SCU_CLK CGATSTAT0: CCU80 (Bit 7) */ -#define SCU_CLK_CGATSTAT0_CCU80_Msk (0x80UL) /*!< SCU_CLK CGATSTAT0: CCU80 (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CGATSTAT0_CCU81_Pos (8UL) /*!< SCU_CLK CGATSTAT0: CCU81 (Bit 8) */ -#define SCU_CLK_CGATSTAT0_CCU81_Msk (0x100UL) /*!< SCU_CLK CGATSTAT0: CCU81 (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CGATSTAT0_POSIF0_Pos (9UL) /*!< SCU_CLK CGATSTAT0: POSIF0 (Bit 9) */ -#define SCU_CLK_CGATSTAT0_POSIF0_Msk (0x200UL) /*!< SCU_CLK CGATSTAT0: POSIF0 (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CGATSTAT0_POSIF1_Pos (10UL) /*!< SCU_CLK CGATSTAT0: POSIF1 (Bit 10) */ -#define SCU_CLK_CGATSTAT0_POSIF1_Msk (0x400UL) /*!< SCU_CLK CGATSTAT0: POSIF1 (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CGATSTAT0_USIC0_Pos (11UL) /*!< SCU_CLK CGATSTAT0: USIC0 (Bit 11) */ -#define SCU_CLK_CGATSTAT0_USIC0_Msk (0x800UL) /*!< SCU_CLK CGATSTAT0: USIC0 (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CGATSTAT0_ERU1_Pos (16UL) /*!< SCU_CLK CGATSTAT0: ERU1 (Bit 16) */ -#define SCU_CLK_CGATSTAT0_ERU1_Msk (0x10000UL) /*!< SCU_CLK CGATSTAT0: ERU1 (Bitfield-Mask: 0x01) */ - -/* ------------------------------ SCU_CLK_CGATSET0 ------------------------------ */ -#define SCU_CLK_CGATSET0_VADC_Pos (0UL) /*!< SCU_CLK CGATSET0: VADC (Bit 0) */ -#define SCU_CLK_CGATSET0_VADC_Msk (0x1UL) /*!< SCU_CLK CGATSET0: VADC (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CGATSET0_DSD_Pos (1UL) /*!< SCU_CLK CGATSET0: DSD (Bit 1) */ -#define SCU_CLK_CGATSET0_DSD_Msk (0x2UL) /*!< SCU_CLK CGATSET0: DSD (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CGATSET0_CCU40_Pos (2UL) /*!< SCU_CLK CGATSET0: CCU40 (Bit 2) */ -#define SCU_CLK_CGATSET0_CCU40_Msk (0x4UL) /*!< SCU_CLK CGATSET0: CCU40 (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CGATSET0_CCU41_Pos (3UL) /*!< SCU_CLK CGATSET0: CCU41 (Bit 3) */ -#define SCU_CLK_CGATSET0_CCU41_Msk (0x8UL) /*!< SCU_CLK CGATSET0: CCU41 (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CGATSET0_CCU42_Pos (4UL) /*!< SCU_CLK CGATSET0: CCU42 (Bit 4) */ -#define SCU_CLK_CGATSET0_CCU42_Msk (0x10UL) /*!< SCU_CLK CGATSET0: CCU42 (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CGATSET0_CCU80_Pos (7UL) /*!< SCU_CLK CGATSET0: CCU80 (Bit 7) */ -#define SCU_CLK_CGATSET0_CCU80_Msk (0x80UL) /*!< SCU_CLK CGATSET0: CCU80 (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CGATSET0_CCU81_Pos (8UL) /*!< SCU_CLK CGATSET0: CCU81 (Bit 8) */ -#define SCU_CLK_CGATSET0_CCU81_Msk (0x100UL) /*!< SCU_CLK CGATSET0: CCU81 (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CGATSET0_POSIF0_Pos (9UL) /*!< SCU_CLK CGATSET0: POSIF0 (Bit 9) */ -#define SCU_CLK_CGATSET0_POSIF0_Msk (0x200UL) /*!< SCU_CLK CGATSET0: POSIF0 (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CGATSET0_POSIF1_Pos (10UL) /*!< SCU_CLK CGATSET0: POSIF1 (Bit 10) */ -#define SCU_CLK_CGATSET0_POSIF1_Msk (0x400UL) /*!< SCU_CLK CGATSET0: POSIF1 (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CGATSET0_USIC0_Pos (11UL) /*!< SCU_CLK CGATSET0: USIC0 (Bit 11) */ -#define SCU_CLK_CGATSET0_USIC0_Msk (0x800UL) /*!< SCU_CLK CGATSET0: USIC0 (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CGATSET0_ERU1_Pos (16UL) /*!< SCU_CLK CGATSET0: ERU1 (Bit 16) */ -#define SCU_CLK_CGATSET0_ERU1_Msk (0x10000UL) /*!< SCU_CLK CGATSET0: ERU1 (Bitfield-Mask: 0x01) */ - -/* ------------------------------ SCU_CLK_CGATCLR0 ------------------------------ */ -#define SCU_CLK_CGATCLR0_VADC_Pos (0UL) /*!< SCU_CLK CGATCLR0: VADC (Bit 0) */ -#define SCU_CLK_CGATCLR0_VADC_Msk (0x1UL) /*!< SCU_CLK CGATCLR0: VADC (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CGATCLR0_DSD_Pos (1UL) /*!< SCU_CLK CGATCLR0: DSD (Bit 1) */ -#define SCU_CLK_CGATCLR0_DSD_Msk (0x2UL) /*!< SCU_CLK CGATCLR0: DSD (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CGATCLR0_CCU40_Pos (2UL) /*!< SCU_CLK CGATCLR0: CCU40 (Bit 2) */ -#define SCU_CLK_CGATCLR0_CCU40_Msk (0x4UL) /*!< SCU_CLK CGATCLR0: CCU40 (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CGATCLR0_CCU41_Pos (3UL) /*!< SCU_CLK CGATCLR0: CCU41 (Bit 3) */ -#define SCU_CLK_CGATCLR0_CCU41_Msk (0x8UL) /*!< SCU_CLK CGATCLR0: CCU41 (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CGATCLR0_CCU42_Pos (4UL) /*!< SCU_CLK CGATCLR0: CCU42 (Bit 4) */ -#define SCU_CLK_CGATCLR0_CCU42_Msk (0x10UL) /*!< SCU_CLK CGATCLR0: CCU42 (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CGATCLR0_CCU80_Pos (7UL) /*!< SCU_CLK CGATCLR0: CCU80 (Bit 7) */ -#define SCU_CLK_CGATCLR0_CCU80_Msk (0x80UL) /*!< SCU_CLK CGATCLR0: CCU80 (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CGATCLR0_CCU81_Pos (8UL) /*!< SCU_CLK CGATCLR0: CCU81 (Bit 8) */ -#define SCU_CLK_CGATCLR0_CCU81_Msk (0x100UL) /*!< SCU_CLK CGATCLR0: CCU81 (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CGATCLR0_POSIF0_Pos (9UL) /*!< SCU_CLK CGATCLR0: POSIF0 (Bit 9) */ -#define SCU_CLK_CGATCLR0_POSIF0_Msk (0x200UL) /*!< SCU_CLK CGATCLR0: POSIF0 (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CGATCLR0_POSIF1_Pos (10UL) /*!< SCU_CLK CGATCLR0: POSIF1 (Bit 10) */ -#define SCU_CLK_CGATCLR0_POSIF1_Msk (0x400UL) /*!< SCU_CLK CGATCLR0: POSIF1 (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CGATCLR0_USIC0_Pos (11UL) /*!< SCU_CLK CGATCLR0: USIC0 (Bit 11) */ -#define SCU_CLK_CGATCLR0_USIC0_Msk (0x800UL) /*!< SCU_CLK CGATCLR0: USIC0 (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CGATCLR0_ERU1_Pos (16UL) /*!< SCU_CLK CGATCLR0: ERU1 (Bit 16) */ -#define SCU_CLK_CGATCLR0_ERU1_Msk (0x10000UL) /*!< SCU_CLK CGATCLR0: ERU1 (Bitfield-Mask: 0x01) */ - -/* ------------------------------ SCU_CLK_CGATSTAT1 ----------------------------- */ -#define SCU_CLK_CGATSTAT1_CCU43_Pos (0UL) /*!< SCU_CLK CGATSTAT1: CCU43 (Bit 0) */ -#define SCU_CLK_CGATSTAT1_CCU43_Msk (0x1UL) /*!< SCU_CLK CGATSTAT1: CCU43 (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CGATSTAT1_LEDTSCU0_Pos (3UL) /*!< SCU_CLK CGATSTAT1: LEDTSCU0 (Bit 3) */ -#define SCU_CLK_CGATSTAT1_LEDTSCU0_Msk (0x8UL) /*!< SCU_CLK CGATSTAT1: LEDTSCU0 (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CGATSTAT1_MCAN0_Pos (4UL) /*!< SCU_CLK CGATSTAT1: MCAN0 (Bit 4) */ -#define SCU_CLK_CGATSTAT1_MCAN0_Msk (0x10UL) /*!< SCU_CLK CGATSTAT1: MCAN0 (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CGATSTAT1_DAC_Pos (5UL) /*!< SCU_CLK CGATSTAT1: DAC (Bit 5) */ -#define SCU_CLK_CGATSTAT1_DAC_Msk (0x20UL) /*!< SCU_CLK CGATSTAT1: DAC (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CGATSTAT1_MMCI_Pos (6UL) /*!< SCU_CLK CGATSTAT1: MMCI (Bit 6) */ -#define SCU_CLK_CGATSTAT1_MMCI_Msk (0x40UL) /*!< SCU_CLK CGATSTAT1: MMCI (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CGATSTAT1_USIC1_Pos (7UL) /*!< SCU_CLK CGATSTAT1: USIC1 (Bit 7) */ -#define SCU_CLK_CGATSTAT1_USIC1_Msk (0x80UL) /*!< SCU_CLK CGATSTAT1: USIC1 (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CGATSTAT1_USIC2_Pos (8UL) /*!< SCU_CLK CGATSTAT1: USIC2 (Bit 8) */ -#define SCU_CLK_CGATSTAT1_USIC2_Msk (0x100UL) /*!< SCU_CLK CGATSTAT1: USIC2 (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CGATSTAT1_PPORTS_Pos (9UL) /*!< SCU_CLK CGATSTAT1: PPORTS (Bit 9) */ -#define SCU_CLK_CGATSTAT1_PPORTS_Msk (0x200UL) /*!< SCU_CLK CGATSTAT1: PPORTS (Bitfield-Mask: 0x01) */ - -/* ------------------------------ SCU_CLK_CGATSET1 ------------------------------ */ -#define SCU_CLK_CGATSET1_CCU43_Pos (0UL) /*!< SCU_CLK CGATSET1: CCU43 (Bit 0) */ -#define SCU_CLK_CGATSET1_CCU43_Msk (0x1UL) /*!< SCU_CLK CGATSET1: CCU43 (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CGATSET1_LEDTSCU0_Pos (3UL) /*!< SCU_CLK CGATSET1: LEDTSCU0 (Bit 3) */ -#define SCU_CLK_CGATSET1_LEDTSCU0_Msk (0x8UL) /*!< SCU_CLK CGATSET1: LEDTSCU0 (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CGATSET1_MCAN0_Pos (4UL) /*!< SCU_CLK CGATSET1: MCAN0 (Bit 4) */ -#define SCU_CLK_CGATSET1_MCAN0_Msk (0x10UL) /*!< SCU_CLK CGATSET1: MCAN0 (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CGATSET1_DAC_Pos (5UL) /*!< SCU_CLK CGATSET1: DAC (Bit 5) */ -#define SCU_CLK_CGATSET1_DAC_Msk (0x20UL) /*!< SCU_CLK CGATSET1: DAC (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CGATSET1_MMCI_Pos (6UL) /*!< SCU_CLK CGATSET1: MMCI (Bit 6) */ -#define SCU_CLK_CGATSET1_MMCI_Msk (0x40UL) /*!< SCU_CLK CGATSET1: MMCI (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CGATSET1_USIC1_Pos (7UL) /*!< SCU_CLK CGATSET1: USIC1 (Bit 7) */ -#define SCU_CLK_CGATSET1_USIC1_Msk (0x80UL) /*!< SCU_CLK CGATSET1: USIC1 (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CGATSET1_USIC2_Pos (8UL) /*!< SCU_CLK CGATSET1: USIC2 (Bit 8) */ -#define SCU_CLK_CGATSET1_USIC2_Msk (0x100UL) /*!< SCU_CLK CGATSET1: USIC2 (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CGATSET1_PPORTS_Pos (9UL) /*!< SCU_CLK CGATSET1: PPORTS (Bit 9) */ -#define SCU_CLK_CGATSET1_PPORTS_Msk (0x200UL) /*!< SCU_CLK CGATSET1: PPORTS (Bitfield-Mask: 0x01) */ - -/* ------------------------------ SCU_CLK_CGATCLR1 ------------------------------ */ -#define SCU_CLK_CGATCLR1_CCU43_Pos (0UL) /*!< SCU_CLK CGATCLR1: CCU43 (Bit 0) */ -#define SCU_CLK_CGATCLR1_CCU43_Msk (0x1UL) /*!< SCU_CLK CGATCLR1: CCU43 (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CGATCLR1_LEDTSCU0_Pos (3UL) /*!< SCU_CLK CGATCLR1: LEDTSCU0 (Bit 3) */ -#define SCU_CLK_CGATCLR1_LEDTSCU0_Msk (0x8UL) /*!< SCU_CLK CGATCLR1: LEDTSCU0 (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CGATCLR1_MCAN0_Pos (4UL) /*!< SCU_CLK CGATCLR1: MCAN0 (Bit 4) */ -#define SCU_CLK_CGATCLR1_MCAN0_Msk (0x10UL) /*!< SCU_CLK CGATCLR1: MCAN0 (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CGATCLR1_DAC_Pos (5UL) /*!< SCU_CLK CGATCLR1: DAC (Bit 5) */ -#define SCU_CLK_CGATCLR1_DAC_Msk (0x20UL) /*!< SCU_CLK CGATCLR1: DAC (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CGATCLR1_MMCI_Pos (6UL) /*!< SCU_CLK CGATCLR1: MMCI (Bit 6) */ -#define SCU_CLK_CGATCLR1_MMCI_Msk (0x40UL) /*!< SCU_CLK CGATCLR1: MMCI (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CGATCLR1_USIC1_Pos (7UL) /*!< SCU_CLK CGATCLR1: USIC1 (Bit 7) */ -#define SCU_CLK_CGATCLR1_USIC1_Msk (0x80UL) /*!< SCU_CLK CGATCLR1: USIC1 (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CGATCLR1_USIC2_Pos (8UL) /*!< SCU_CLK CGATCLR1: USIC2 (Bit 8) */ -#define SCU_CLK_CGATCLR1_USIC2_Msk (0x100UL) /*!< SCU_CLK CGATCLR1: USIC2 (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CGATCLR1_PPORTS_Pos (9UL) /*!< SCU_CLK CGATCLR1: PPORTS (Bit 9) */ -#define SCU_CLK_CGATCLR1_PPORTS_Msk (0x200UL) /*!< SCU_CLK CGATCLR1: PPORTS (Bitfield-Mask: 0x01) */ - -/* ------------------------------ SCU_CLK_CGATSTAT2 ----------------------------- */ -#define SCU_CLK_CGATSTAT2_WDT_Pos (1UL) /*!< SCU_CLK CGATSTAT2: WDT (Bit 1) */ -#define SCU_CLK_CGATSTAT2_WDT_Msk (0x2UL) /*!< SCU_CLK CGATSTAT2: WDT (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CGATSTAT2_ETH0_Pos (2UL) /*!< SCU_CLK CGATSTAT2: ETH0 (Bit 2) */ -#define SCU_CLK_CGATSTAT2_ETH0_Msk (0x4UL) /*!< SCU_CLK CGATSTAT2: ETH0 (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CGATSTAT2_DMA0_Pos (4UL) /*!< SCU_CLK CGATSTAT2: DMA0 (Bit 4) */ -#define SCU_CLK_CGATSTAT2_DMA0_Msk (0x10UL) /*!< SCU_CLK CGATSTAT2: DMA0 (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CGATSTAT2_DMA1_Pos (5UL) /*!< SCU_CLK CGATSTAT2: DMA1 (Bit 5) */ -#define SCU_CLK_CGATSTAT2_DMA1_Msk (0x20UL) /*!< SCU_CLK CGATSTAT2: DMA1 (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CGATSTAT2_FCE_Pos (6UL) /*!< SCU_CLK CGATSTAT2: FCE (Bit 6) */ -#define SCU_CLK_CGATSTAT2_FCE_Msk (0x40UL) /*!< SCU_CLK CGATSTAT2: FCE (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CGATSTAT2_USB_Pos (7UL) /*!< SCU_CLK CGATSTAT2: USB (Bit 7) */ -#define SCU_CLK_CGATSTAT2_USB_Msk (0x80UL) /*!< SCU_CLK CGATSTAT2: USB (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CGATSTAT2_ECAT0_Pos (10UL) /*!< SCU_CLK CGATSTAT2: ECAT0 (Bit 10) */ -#define SCU_CLK_CGATSTAT2_ECAT0_Msk (0x400UL) /*!< SCU_CLK CGATSTAT2: ECAT0 (Bitfield-Mask: 0x01) */ - -/* ------------------------------ SCU_CLK_CGATSET2 ------------------------------ */ -#define SCU_CLK_CGATSET2_WDT_Pos (1UL) /*!< SCU_CLK CGATSET2: WDT (Bit 1) */ -#define SCU_CLK_CGATSET2_WDT_Msk (0x2UL) /*!< SCU_CLK CGATSET2: WDT (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CGATSET2_ETH0_Pos (2UL) /*!< SCU_CLK CGATSET2: ETH0 (Bit 2) */ -#define SCU_CLK_CGATSET2_ETH0_Msk (0x4UL) /*!< SCU_CLK CGATSET2: ETH0 (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CGATSET2_DMA0_Pos (4UL) /*!< SCU_CLK CGATSET2: DMA0 (Bit 4) */ -#define SCU_CLK_CGATSET2_DMA0_Msk (0x10UL) /*!< SCU_CLK CGATSET2: DMA0 (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CGATSET2_DMA1_Pos (5UL) /*!< SCU_CLK CGATSET2: DMA1 (Bit 5) */ -#define SCU_CLK_CGATSET2_DMA1_Msk (0x20UL) /*!< SCU_CLK CGATSET2: DMA1 (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CGATSET2_FCE_Pos (6UL) /*!< SCU_CLK CGATSET2: FCE (Bit 6) */ -#define SCU_CLK_CGATSET2_FCE_Msk (0x40UL) /*!< SCU_CLK CGATSET2: FCE (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CGATSET2_USB_Pos (7UL) /*!< SCU_CLK CGATSET2: USB (Bit 7) */ -#define SCU_CLK_CGATSET2_USB_Msk (0x80UL) /*!< SCU_CLK CGATSET2: USB (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CGATSET2_ECAT0_Pos (10UL) /*!< SCU_CLK CGATSET2: ECAT0 (Bit 10) */ -#define SCU_CLK_CGATSET2_ECAT0_Msk (0x400UL) /*!< SCU_CLK CGATSET2: ECAT0 (Bitfield-Mask: 0x01) */ - -/* ------------------------------ SCU_CLK_CGATCLR2 ------------------------------ */ -#define SCU_CLK_CGATCLR2_WDT_Pos (1UL) /*!< SCU_CLK CGATCLR2: WDT (Bit 1) */ -#define SCU_CLK_CGATCLR2_WDT_Msk (0x2UL) /*!< SCU_CLK CGATCLR2: WDT (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CGATCLR2_ETH0_Pos (2UL) /*!< SCU_CLK CGATCLR2: ETH0 (Bit 2) */ -#define SCU_CLK_CGATCLR2_ETH0_Msk (0x4UL) /*!< SCU_CLK CGATCLR2: ETH0 (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CGATCLR2_DMA0_Pos (4UL) /*!< SCU_CLK CGATCLR2: DMA0 (Bit 4) */ -#define SCU_CLK_CGATCLR2_DMA0_Msk (0x10UL) /*!< SCU_CLK CGATCLR2: DMA0 (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CGATCLR2_DMA1_Pos (5UL) /*!< SCU_CLK CGATCLR2: DMA1 (Bit 5) */ -#define SCU_CLK_CGATCLR2_DMA1_Msk (0x20UL) /*!< SCU_CLK CGATCLR2: DMA1 (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CGATCLR2_FCE_Pos (6UL) /*!< SCU_CLK CGATCLR2: FCE (Bit 6) */ -#define SCU_CLK_CGATCLR2_FCE_Msk (0x40UL) /*!< SCU_CLK CGATCLR2: FCE (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CGATCLR2_USB_Pos (7UL) /*!< SCU_CLK CGATCLR2: USB (Bit 7) */ -#define SCU_CLK_CGATCLR2_USB_Msk (0x80UL) /*!< SCU_CLK CGATCLR2: USB (Bitfield-Mask: 0x01) */ -#define SCU_CLK_CGATCLR2_ECAT0_Pos (10UL) /*!< SCU_CLK CGATCLR2: ECAT0 (Bit 10) */ -#define SCU_CLK_CGATCLR2_ECAT0_Msk (0x400UL) /*!< SCU_CLK CGATCLR2: ECAT0 (Bitfield-Mask: 0x01) */ - -/* ------------------------------ SCU_CLK_CGATSTAT3 ----------------------------- */ -#define SCU_CLK_CGATSTAT3_EBU_Pos (2UL) /*!< SCU_CLK CGATSTAT3: EBU (Bit 2) */ -#define SCU_CLK_CGATSTAT3_EBU_Msk (0x4UL) /*!< SCU_CLK CGATSTAT3: EBU (Bitfield-Mask: 0x01) */ - -/* ------------------------------ SCU_CLK_CGATSET3 ------------------------------ */ -#define SCU_CLK_CGATSET3_EBU_Pos (2UL) /*!< SCU_CLK CGATSET3: EBU (Bit 2) */ -#define SCU_CLK_CGATSET3_EBU_Msk (0x4UL) /*!< SCU_CLK CGATSET3: EBU (Bitfield-Mask: 0x01) */ - -/* ------------------------------ SCU_CLK_CGATCLR3 ------------------------------ */ -#define SCU_CLK_CGATCLR3_EBU_Pos (2UL) /*!< SCU_CLK CGATCLR3: EBU (Bit 2) */ -#define SCU_CLK_CGATCLR3_EBU_Msk (0x4UL) /*!< SCU_CLK CGATCLR3: EBU (Bitfield-Mask: 0x01) */ - - -/* ================================================================================ */ -/* ================ struct 'SCU_OSC' Position & Mask ================ */ -/* ================================================================================ */ - - -/* ------------------------------ SCU_OSC_OSCHPSTAT ----------------------------- */ -#define SCU_OSC_OSCHPSTAT_X1D_Pos (0UL) /*!< SCU_OSC OSCHPSTAT: X1D (Bit 0) */ -#define SCU_OSC_OSCHPSTAT_X1D_Msk (0x1UL) /*!< SCU_OSC OSCHPSTAT: X1D (Bitfield-Mask: 0x01) */ - -/* ------------------------------ SCU_OSC_OSCHPCTRL ----------------------------- */ -#define SCU_OSC_OSCHPCTRL_X1DEN_Pos (0UL) /*!< SCU_OSC OSCHPCTRL: X1DEN (Bit 0) */ -#define SCU_OSC_OSCHPCTRL_X1DEN_Msk (0x1UL) /*!< SCU_OSC OSCHPCTRL: X1DEN (Bitfield-Mask: 0x01) */ -#define SCU_OSC_OSCHPCTRL_SHBY_Pos (1UL) /*!< SCU_OSC OSCHPCTRL: SHBY (Bit 1) */ -#define SCU_OSC_OSCHPCTRL_SHBY_Msk (0x2UL) /*!< SCU_OSC OSCHPCTRL: SHBY (Bitfield-Mask: 0x01) */ -#define SCU_OSC_OSCHPCTRL_GAINSEL_Pos (2UL) /*!< SCU_OSC OSCHPCTRL: GAINSEL (Bit 2) */ -#define SCU_OSC_OSCHPCTRL_GAINSEL_Msk (0xcUL) /*!< SCU_OSC OSCHPCTRL: GAINSEL (Bitfield-Mask: 0x03) */ -#define SCU_OSC_OSCHPCTRL_MODE_Pos (4UL) /*!< SCU_OSC OSCHPCTRL: MODE (Bit 4) */ -#define SCU_OSC_OSCHPCTRL_MODE_Msk (0x30UL) /*!< SCU_OSC OSCHPCTRL: MODE (Bitfield-Mask: 0x03) */ -#define SCU_OSC_OSCHPCTRL_OSCVAL_Pos (16UL) /*!< SCU_OSC OSCHPCTRL: OSCVAL (Bit 16) */ -#define SCU_OSC_OSCHPCTRL_OSCVAL_Msk (0xf0000UL) /*!< SCU_OSC OSCHPCTRL: OSCVAL (Bitfield-Mask: 0x0f) */ - -/* ----------------------------- SCU_OSC_CLKCALCONST ---------------------------- */ -#define SCU_OSC_CLKCALCONST_CALIBCONST_Pos (0UL) /*!< SCU_OSC CLKCALCONST: CALIBCONST (Bit 0) */ -#define SCU_OSC_CLKCALCONST_CALIBCONST_Msk (0xfUL) /*!< SCU_OSC CLKCALCONST: CALIBCONST (Bitfield-Mask: 0x0f) */ - - -/* ================================================================================ */ -/* ================ struct 'SCU_PLL' Position & Mask ================ */ -/* ================================================================================ */ - - -/* ------------------------------- SCU_PLL_PLLSTAT ------------------------------ */ -#define SCU_PLL_PLLSTAT_VCOBYST_Pos (0UL) /*!< SCU_PLL PLLSTAT: VCOBYST (Bit 0) */ -#define SCU_PLL_PLLSTAT_VCOBYST_Msk (0x1UL) /*!< SCU_PLL PLLSTAT: VCOBYST (Bitfield-Mask: 0x01) */ -#define SCU_PLL_PLLSTAT_PWDSTAT_Pos (1UL) /*!< SCU_PLL PLLSTAT: PWDSTAT (Bit 1) */ -#define SCU_PLL_PLLSTAT_PWDSTAT_Msk (0x2UL) /*!< SCU_PLL PLLSTAT: PWDSTAT (Bitfield-Mask: 0x01) */ -#define SCU_PLL_PLLSTAT_VCOLOCK_Pos (2UL) /*!< SCU_PLL PLLSTAT: VCOLOCK (Bit 2) */ -#define SCU_PLL_PLLSTAT_VCOLOCK_Msk (0x4UL) /*!< SCU_PLL PLLSTAT: VCOLOCK (Bitfield-Mask: 0x01) */ -#define SCU_PLL_PLLSTAT_K1RDY_Pos (4UL) /*!< SCU_PLL PLLSTAT: K1RDY (Bit 4) */ -#define SCU_PLL_PLLSTAT_K1RDY_Msk (0x10UL) /*!< SCU_PLL PLLSTAT: K1RDY (Bitfield-Mask: 0x01) */ -#define SCU_PLL_PLLSTAT_K2RDY_Pos (5UL) /*!< SCU_PLL PLLSTAT: K2RDY (Bit 5) */ -#define SCU_PLL_PLLSTAT_K2RDY_Msk (0x20UL) /*!< SCU_PLL PLLSTAT: K2RDY (Bitfield-Mask: 0x01) */ -#define SCU_PLL_PLLSTAT_BY_Pos (6UL) /*!< SCU_PLL PLLSTAT: BY (Bit 6) */ -#define SCU_PLL_PLLSTAT_BY_Msk (0x40UL) /*!< SCU_PLL PLLSTAT: BY (Bitfield-Mask: 0x01) */ -#define SCU_PLL_PLLSTAT_PLLLV_Pos (7UL) /*!< SCU_PLL PLLSTAT: PLLLV (Bit 7) */ -#define SCU_PLL_PLLSTAT_PLLLV_Msk (0x80UL) /*!< SCU_PLL PLLSTAT: PLLLV (Bitfield-Mask: 0x01) */ -#define SCU_PLL_PLLSTAT_PLLHV_Pos (8UL) /*!< SCU_PLL PLLSTAT: PLLHV (Bit 8) */ -#define SCU_PLL_PLLSTAT_PLLHV_Msk (0x100UL) /*!< SCU_PLL PLLSTAT: PLLHV (Bitfield-Mask: 0x01) */ -#define SCU_PLL_PLLSTAT_PLLSP_Pos (9UL) /*!< SCU_PLL PLLSTAT: PLLSP (Bit 9) */ -#define SCU_PLL_PLLSTAT_PLLSP_Msk (0x200UL) /*!< SCU_PLL PLLSTAT: PLLSP (Bitfield-Mask: 0x01) */ - -/* ------------------------------- SCU_PLL_PLLCON0 ------------------------------ */ -#define SCU_PLL_PLLCON0_VCOBYP_Pos (0UL) /*!< SCU_PLL PLLCON0: VCOBYP (Bit 0) */ -#define SCU_PLL_PLLCON0_VCOBYP_Msk (0x1UL) /*!< SCU_PLL PLLCON0: VCOBYP (Bitfield-Mask: 0x01) */ -#define SCU_PLL_PLLCON0_VCOPWD_Pos (1UL) /*!< SCU_PLL PLLCON0: VCOPWD (Bit 1) */ -#define SCU_PLL_PLLCON0_VCOPWD_Msk (0x2UL) /*!< SCU_PLL PLLCON0: VCOPWD (Bitfield-Mask: 0x01) */ -#define SCU_PLL_PLLCON0_VCOTR_Pos (2UL) /*!< SCU_PLL PLLCON0: VCOTR (Bit 2) */ -#define SCU_PLL_PLLCON0_VCOTR_Msk (0x4UL) /*!< SCU_PLL PLLCON0: VCOTR (Bitfield-Mask: 0x01) */ -#define SCU_PLL_PLLCON0_FINDIS_Pos (4UL) /*!< SCU_PLL PLLCON0: FINDIS (Bit 4) */ -#define SCU_PLL_PLLCON0_FINDIS_Msk (0x10UL) /*!< SCU_PLL PLLCON0: FINDIS (Bitfield-Mask: 0x01) */ -#define SCU_PLL_PLLCON0_OSCDISCDIS_Pos (6UL) /*!< SCU_PLL PLLCON0: OSCDISCDIS (Bit 6) */ -#define SCU_PLL_PLLCON0_OSCDISCDIS_Msk (0x40UL) /*!< SCU_PLL PLLCON0: OSCDISCDIS (Bitfield-Mask: 0x01) */ -#define SCU_PLL_PLLCON0_PLLPWD_Pos (16UL) /*!< SCU_PLL PLLCON0: PLLPWD (Bit 16) */ -#define SCU_PLL_PLLCON0_PLLPWD_Msk (0x10000UL) /*!< SCU_PLL PLLCON0: PLLPWD (Bitfield-Mask: 0x01) */ -#define SCU_PLL_PLLCON0_OSCRES_Pos (17UL) /*!< SCU_PLL PLLCON0: OSCRES (Bit 17) */ -#define SCU_PLL_PLLCON0_OSCRES_Msk (0x20000UL) /*!< SCU_PLL PLLCON0: OSCRES (Bitfield-Mask: 0x01) */ -#define SCU_PLL_PLLCON0_RESLD_Pos (18UL) /*!< SCU_PLL PLLCON0: RESLD (Bit 18) */ -#define SCU_PLL_PLLCON0_RESLD_Msk (0x40000UL) /*!< SCU_PLL PLLCON0: RESLD (Bitfield-Mask: 0x01) */ -#define SCU_PLL_PLLCON0_AOTREN_Pos (19UL) /*!< SCU_PLL PLLCON0: AOTREN (Bit 19) */ -#define SCU_PLL_PLLCON0_AOTREN_Msk (0x80000UL) /*!< SCU_PLL PLLCON0: AOTREN (Bitfield-Mask: 0x01) */ -#define SCU_PLL_PLLCON0_FOTR_Pos (20UL) /*!< SCU_PLL PLLCON0: FOTR (Bit 20) */ -#define SCU_PLL_PLLCON0_FOTR_Msk (0x100000UL) /*!< SCU_PLL PLLCON0: FOTR (Bitfield-Mask: 0x01) */ - -/* ------------------------------- SCU_PLL_PLLCON1 ------------------------------ */ -#define SCU_PLL_PLLCON1_K1DIV_Pos (0UL) /*!< SCU_PLL PLLCON1: K1DIV (Bit 0) */ -#define SCU_PLL_PLLCON1_K1DIV_Msk (0x7fUL) /*!< SCU_PLL PLLCON1: K1DIV (Bitfield-Mask: 0x7f) */ -#define SCU_PLL_PLLCON1_NDIV_Pos (8UL) /*!< SCU_PLL PLLCON1: NDIV (Bit 8) */ -#define SCU_PLL_PLLCON1_NDIV_Msk (0x7f00UL) /*!< SCU_PLL PLLCON1: NDIV (Bitfield-Mask: 0x7f) */ -#define SCU_PLL_PLLCON1_K2DIV_Pos (16UL) /*!< SCU_PLL PLLCON1: K2DIV (Bit 16) */ -#define SCU_PLL_PLLCON1_K2DIV_Msk (0x7f0000UL) /*!< SCU_PLL PLLCON1: K2DIV (Bitfield-Mask: 0x7f) */ -#define SCU_PLL_PLLCON1_PDIV_Pos (24UL) /*!< SCU_PLL PLLCON1: PDIV (Bit 24) */ -#define SCU_PLL_PLLCON1_PDIV_Msk (0xf000000UL) /*!< SCU_PLL PLLCON1: PDIV (Bitfield-Mask: 0x0f) */ - -/* ------------------------------- SCU_PLL_PLLCON2 ------------------------------ */ -#define SCU_PLL_PLLCON2_PINSEL_Pos (0UL) /*!< SCU_PLL PLLCON2: PINSEL (Bit 0) */ -#define SCU_PLL_PLLCON2_PINSEL_Msk (0x1UL) /*!< SCU_PLL PLLCON2: PINSEL (Bitfield-Mask: 0x01) */ -#define SCU_PLL_PLLCON2_K1INSEL_Pos (8UL) /*!< SCU_PLL PLLCON2: K1INSEL (Bit 8) */ -#define SCU_PLL_PLLCON2_K1INSEL_Msk (0x100UL) /*!< SCU_PLL PLLCON2: K1INSEL (Bitfield-Mask: 0x01) */ - -/* ----------------------------- SCU_PLL_USBPLLSTAT ----------------------------- */ -#define SCU_PLL_USBPLLSTAT_VCOBYST_Pos (0UL) /*!< SCU_PLL USBPLLSTAT: VCOBYST (Bit 0) */ -#define SCU_PLL_USBPLLSTAT_VCOBYST_Msk (0x1UL) /*!< SCU_PLL USBPLLSTAT: VCOBYST (Bitfield-Mask: 0x01) */ -#define SCU_PLL_USBPLLSTAT_PWDSTAT_Pos (1UL) /*!< SCU_PLL USBPLLSTAT: PWDSTAT (Bit 1) */ -#define SCU_PLL_USBPLLSTAT_PWDSTAT_Msk (0x2UL) /*!< SCU_PLL USBPLLSTAT: PWDSTAT (Bitfield-Mask: 0x01) */ -#define SCU_PLL_USBPLLSTAT_VCOLOCK_Pos (2UL) /*!< SCU_PLL USBPLLSTAT: VCOLOCK (Bit 2) */ -#define SCU_PLL_USBPLLSTAT_VCOLOCK_Msk (0x4UL) /*!< SCU_PLL USBPLLSTAT: VCOLOCK (Bitfield-Mask: 0x01) */ -#define SCU_PLL_USBPLLSTAT_BY_Pos (6UL) /*!< SCU_PLL USBPLLSTAT: BY (Bit 6) */ -#define SCU_PLL_USBPLLSTAT_BY_Msk (0x40UL) /*!< SCU_PLL USBPLLSTAT: BY (Bitfield-Mask: 0x01) */ -#define SCU_PLL_USBPLLSTAT_VCOLOCKED_Pos (7UL) /*!< SCU_PLL USBPLLSTAT: VCOLOCKED (Bit 7) */ -#define SCU_PLL_USBPLLSTAT_VCOLOCKED_Msk (0x80UL) /*!< SCU_PLL USBPLLSTAT: VCOLOCKED (Bitfield-Mask: 0x01) */ - -/* ------------------------------ SCU_PLL_USBPLLCON ----------------------------- */ -#define SCU_PLL_USBPLLCON_VCOBYP_Pos (0UL) /*!< SCU_PLL USBPLLCON: VCOBYP (Bit 0) */ -#define SCU_PLL_USBPLLCON_VCOBYP_Msk (0x1UL) /*!< SCU_PLL USBPLLCON: VCOBYP (Bitfield-Mask: 0x01) */ -#define SCU_PLL_USBPLLCON_VCOPWD_Pos (1UL) /*!< SCU_PLL USBPLLCON: VCOPWD (Bit 1) */ -#define SCU_PLL_USBPLLCON_VCOPWD_Msk (0x2UL) /*!< SCU_PLL USBPLLCON: VCOPWD (Bitfield-Mask: 0x01) */ -#define SCU_PLL_USBPLLCON_VCOTR_Pos (2UL) /*!< SCU_PLL USBPLLCON: VCOTR (Bit 2) */ -#define SCU_PLL_USBPLLCON_VCOTR_Msk (0x4UL) /*!< SCU_PLL USBPLLCON: VCOTR (Bitfield-Mask: 0x01) */ -#define SCU_PLL_USBPLLCON_FINDIS_Pos (4UL) /*!< SCU_PLL USBPLLCON: FINDIS (Bit 4) */ -#define SCU_PLL_USBPLLCON_FINDIS_Msk (0x10UL) /*!< SCU_PLL USBPLLCON: FINDIS (Bitfield-Mask: 0x01) */ -#define SCU_PLL_USBPLLCON_OSCDISCDIS_Pos (6UL) /*!< SCU_PLL USBPLLCON: OSCDISCDIS (Bit 6) */ -#define SCU_PLL_USBPLLCON_OSCDISCDIS_Msk (0x40UL) /*!< SCU_PLL USBPLLCON: OSCDISCDIS (Bitfield-Mask: 0x01) */ -#define SCU_PLL_USBPLLCON_NDIV_Pos (8UL) /*!< SCU_PLL USBPLLCON: NDIV (Bit 8) */ -#define SCU_PLL_USBPLLCON_NDIV_Msk (0x7f00UL) /*!< SCU_PLL USBPLLCON: NDIV (Bitfield-Mask: 0x7f) */ -#define SCU_PLL_USBPLLCON_PLLPWD_Pos (16UL) /*!< SCU_PLL USBPLLCON: PLLPWD (Bit 16) */ -#define SCU_PLL_USBPLLCON_PLLPWD_Msk (0x10000UL) /*!< SCU_PLL USBPLLCON: PLLPWD (Bitfield-Mask: 0x01) */ -#define SCU_PLL_USBPLLCON_RESLD_Pos (18UL) /*!< SCU_PLL USBPLLCON: RESLD (Bit 18) */ -#define SCU_PLL_USBPLLCON_RESLD_Msk (0x40000UL) /*!< SCU_PLL USBPLLCON: RESLD (Bitfield-Mask: 0x01) */ -#define SCU_PLL_USBPLLCON_PDIV_Pos (24UL) /*!< SCU_PLL USBPLLCON: PDIV (Bit 24) */ -#define SCU_PLL_USBPLLCON_PDIV_Msk (0xf000000UL) /*!< SCU_PLL USBPLLCON: PDIV (Bitfield-Mask: 0x0f) */ - -/* ------------------------------ SCU_PLL_CLKMXSTAT ----------------------------- */ -#define SCU_PLL_CLKMXSTAT_SYSCLKMUX_Pos (0UL) /*!< SCU_PLL CLKMXSTAT: SYSCLKMUX (Bit 0) */ -#define SCU_PLL_CLKMXSTAT_SYSCLKMUX_Msk (0x3UL) /*!< SCU_PLL CLKMXSTAT: SYSCLKMUX (Bitfield-Mask: 0x03) */ - - -/* ================================================================================ */ -/* ================ struct 'SCU_GENERAL' Position & Mask ================ */ -/* ================================================================================ */ - - -/* ------------------------------- SCU_GENERAL_ID ------------------------------- */ -#define SCU_GENERAL_ID_MOD_REV_Pos (0UL) /*!< SCU_GENERAL ID: MOD_REV (Bit 0) */ -#define SCU_GENERAL_ID_MOD_REV_Msk (0xffUL) /*!< SCU_GENERAL ID: MOD_REV (Bitfield-Mask: 0xff) */ -#define SCU_GENERAL_ID_MOD_TYPE_Pos (8UL) /*!< SCU_GENERAL ID: MOD_TYPE (Bit 8) */ -#define SCU_GENERAL_ID_MOD_TYPE_Msk (0xff00UL) /*!< SCU_GENERAL ID: MOD_TYPE (Bitfield-Mask: 0xff) */ -#define SCU_GENERAL_ID_MOD_NUMBER_Pos (16UL) /*!< SCU_GENERAL ID: MOD_NUMBER (Bit 16) */ -#define SCU_GENERAL_ID_MOD_NUMBER_Msk (0xffff0000UL) /*!< SCU_GENERAL ID: MOD_NUMBER (Bitfield-Mask: 0xffff) */ - -/* ----------------------------- SCU_GENERAL_IDCHIP ----------------------------- */ -#define SCU_GENERAL_IDCHIP_IDCHIP_Pos (0UL) /*!< SCU_GENERAL IDCHIP: IDCHIP (Bit 0) */ -#define SCU_GENERAL_IDCHIP_IDCHIP_Msk (0xffffffffUL) /*!< SCU_GENERAL IDCHIP: IDCHIP (Bitfield-Mask: 0xffffffff) */ - -/* ----------------------------- SCU_GENERAL_IDMANUF ---------------------------- */ -#define SCU_GENERAL_IDMANUF_DEPT_Pos (0UL) /*!< SCU_GENERAL IDMANUF: DEPT (Bit 0) */ -#define SCU_GENERAL_IDMANUF_DEPT_Msk (0x1fUL) /*!< SCU_GENERAL IDMANUF: DEPT (Bitfield-Mask: 0x1f) */ -#define SCU_GENERAL_IDMANUF_MANUF_Pos (5UL) /*!< SCU_GENERAL IDMANUF: MANUF (Bit 5) */ -#define SCU_GENERAL_IDMANUF_MANUF_Msk (0xffe0UL) /*!< SCU_GENERAL IDMANUF: MANUF (Bitfield-Mask: 0x7ff) */ - -/* ------------------------------ SCU_GENERAL_STCON ----------------------------- */ -#define SCU_GENERAL_STCON_HWCON_Pos (0UL) /*!< SCU_GENERAL STCON: HWCON (Bit 0) */ -#define SCU_GENERAL_STCON_HWCON_Msk (0x3UL) /*!< SCU_GENERAL STCON: HWCON (Bitfield-Mask: 0x03) */ -#define SCU_GENERAL_STCON_SWCON_Pos (8UL) /*!< SCU_GENERAL STCON: SWCON (Bit 8) */ -#define SCU_GENERAL_STCON_SWCON_Msk (0xf00UL) /*!< SCU_GENERAL STCON: SWCON (Bitfield-Mask: 0x0f) */ - -/* ------------------------------- SCU_GENERAL_GPR ------------------------------ */ -#define SCU_GENERAL_GPR_DAT_Pos (0UL) /*!< SCU_GENERAL GPR: DAT (Bit 0) */ -#define SCU_GENERAL_GPR_DAT_Msk (0xffffffffUL) /*!< SCU_GENERAL GPR: DAT (Bitfield-Mask: 0xffffffff) */ - -/* ----------------------------- SCU_GENERAL_CCUCON ----------------------------- */ -#define SCU_GENERAL_CCUCON_GSC40_Pos (0UL) /*!< SCU_GENERAL CCUCON: GSC40 (Bit 0) */ -#define SCU_GENERAL_CCUCON_GSC40_Msk (0x1UL) /*!< SCU_GENERAL CCUCON: GSC40 (Bitfield-Mask: 0x01) */ -#define SCU_GENERAL_CCUCON_GSC41_Pos (1UL) /*!< SCU_GENERAL CCUCON: GSC41 (Bit 1) */ -#define SCU_GENERAL_CCUCON_GSC41_Msk (0x2UL) /*!< SCU_GENERAL CCUCON: GSC41 (Bitfield-Mask: 0x01) */ -#define SCU_GENERAL_CCUCON_GSC42_Pos (2UL) /*!< SCU_GENERAL CCUCON: GSC42 (Bit 2) */ -#define SCU_GENERAL_CCUCON_GSC42_Msk (0x4UL) /*!< SCU_GENERAL CCUCON: GSC42 (Bitfield-Mask: 0x01) */ -#define SCU_GENERAL_CCUCON_GSC43_Pos (3UL) /*!< SCU_GENERAL CCUCON: GSC43 (Bit 3) */ -#define SCU_GENERAL_CCUCON_GSC43_Msk (0x8UL) /*!< SCU_GENERAL CCUCON: GSC43 (Bitfield-Mask: 0x01) */ -#define SCU_GENERAL_CCUCON_GSC80_Pos (8UL) /*!< SCU_GENERAL CCUCON: GSC80 (Bit 8) */ -#define SCU_GENERAL_CCUCON_GSC80_Msk (0x100UL) /*!< SCU_GENERAL CCUCON: GSC80 (Bitfield-Mask: 0x01) */ -#define SCU_GENERAL_CCUCON_GSC81_Pos (9UL) /*!< SCU_GENERAL CCUCON: GSC81 (Bit 9) */ -#define SCU_GENERAL_CCUCON_GSC81_Msk (0x200UL) /*!< SCU_GENERAL CCUCON: GSC81 (Bitfield-Mask: 0x01) */ - -/* ----------------------------- SCU_GENERAL_DTSCON ----------------------------- */ -#define SCU_GENERAL_DTSCON_PWD_Pos (0UL) /*!< SCU_GENERAL DTSCON: PWD (Bit 0) */ -#define SCU_GENERAL_DTSCON_PWD_Msk (0x1UL) /*!< SCU_GENERAL DTSCON: PWD (Bitfield-Mask: 0x01) */ -#define SCU_GENERAL_DTSCON_START_Pos (1UL) /*!< SCU_GENERAL DTSCON: START (Bit 1) */ -#define SCU_GENERAL_DTSCON_START_Msk (0x2UL) /*!< SCU_GENERAL DTSCON: START (Bitfield-Mask: 0x01) */ -#define SCU_GENERAL_DTSCON_OFFSET_Pos (4UL) /*!< SCU_GENERAL DTSCON: OFFSET (Bit 4) */ -#define SCU_GENERAL_DTSCON_OFFSET_Msk (0x7f0UL) /*!< SCU_GENERAL DTSCON: OFFSET (Bitfield-Mask: 0x7f) */ -#define SCU_GENERAL_DTSCON_GAIN_Pos (11UL) /*!< SCU_GENERAL DTSCON: GAIN (Bit 11) */ -#define SCU_GENERAL_DTSCON_GAIN_Msk (0x1f800UL) /*!< SCU_GENERAL DTSCON: GAIN (Bitfield-Mask: 0x3f) */ -#define SCU_GENERAL_DTSCON_REFTRIM_Pos (17UL) /*!< SCU_GENERAL DTSCON: REFTRIM (Bit 17) */ -#define SCU_GENERAL_DTSCON_REFTRIM_Msk (0xe0000UL) /*!< SCU_GENERAL DTSCON: REFTRIM (Bitfield-Mask: 0x07) */ -#define SCU_GENERAL_DTSCON_BGTRIM_Pos (20UL) /*!< SCU_GENERAL DTSCON: BGTRIM (Bit 20) */ -#define SCU_GENERAL_DTSCON_BGTRIM_Msk (0xf00000UL) /*!< SCU_GENERAL DTSCON: BGTRIM (Bitfield-Mask: 0x0f) */ - -/* ----------------------------- SCU_GENERAL_DTSSTAT ---------------------------- */ -#define SCU_GENERAL_DTSSTAT_RESULT_Pos (0UL) /*!< SCU_GENERAL DTSSTAT: RESULT (Bit 0) */ -#define SCU_GENERAL_DTSSTAT_RESULT_Msk (0x3ffUL) /*!< SCU_GENERAL DTSSTAT: RESULT (Bitfield-Mask: 0x3ff) */ -#define SCU_GENERAL_DTSSTAT_RDY_Pos (14UL) /*!< SCU_GENERAL DTSSTAT: RDY (Bit 14) */ -#define SCU_GENERAL_DTSSTAT_RDY_Msk (0x4000UL) /*!< SCU_GENERAL DTSSTAT: RDY (Bitfield-Mask: 0x01) */ -#define SCU_GENERAL_DTSSTAT_BUSY_Pos (15UL) /*!< SCU_GENERAL DTSSTAT: BUSY (Bit 15) */ -#define SCU_GENERAL_DTSSTAT_BUSY_Msk (0x8000UL) /*!< SCU_GENERAL DTSSTAT: BUSY (Bitfield-Mask: 0x01) */ - -/* ---------------------------- SCU_GENERAL_SDMMCDEL ---------------------------- */ -#define SCU_GENERAL_SDMMCDEL_TAPEN_Pos (0UL) /*!< SCU_GENERAL SDMMCDEL: TAPEN (Bit 0) */ -#define SCU_GENERAL_SDMMCDEL_TAPEN_Msk (0x1UL) /*!< SCU_GENERAL SDMMCDEL: TAPEN (Bitfield-Mask: 0x01) */ -#define SCU_GENERAL_SDMMCDEL_TAPDEL_Pos (4UL) /*!< SCU_GENERAL SDMMCDEL: TAPDEL (Bit 4) */ -#define SCU_GENERAL_SDMMCDEL_TAPDEL_Msk (0xf0UL) /*!< SCU_GENERAL SDMMCDEL: TAPDEL (Bitfield-Mask: 0x0f) */ - -/* ----------------------------- SCU_GENERAL_GORCEN ----------------------------- */ -#define SCU_GENERAL_GORCEN_ENORC6_Pos (6UL) /*!< SCU_GENERAL GORCEN: ENORC6 (Bit 6) */ -#define SCU_GENERAL_GORCEN_ENORC6_Msk (0x40UL) /*!< SCU_GENERAL GORCEN: ENORC6 (Bitfield-Mask: 0x01) */ -#define SCU_GENERAL_GORCEN_ENORC7_Pos (7UL) /*!< SCU_GENERAL GORCEN: ENORC7 (Bit 7) */ -#define SCU_GENERAL_GORCEN_ENORC7_Msk (0x80UL) /*!< SCU_GENERAL GORCEN: ENORC7 (Bitfield-Mask: 0x01) */ - -/* ----------------------------- SCU_GENERAL_MIRRSTS ---------------------------- */ -#define SCU_GENERAL_MIRRSTS_HDCLR_Pos (1UL) /*!< SCU_GENERAL MIRRSTS: HDCLR (Bit 1) */ -#define SCU_GENERAL_MIRRSTS_HDCLR_Msk (0x2UL) /*!< SCU_GENERAL MIRRSTS: HDCLR (Bitfield-Mask: 0x01) */ -#define SCU_GENERAL_MIRRSTS_HDSET_Pos (2UL) /*!< SCU_GENERAL MIRRSTS: HDSET (Bit 2) */ -#define SCU_GENERAL_MIRRSTS_HDSET_Msk (0x4UL) /*!< SCU_GENERAL MIRRSTS: HDSET (Bitfield-Mask: 0x01) */ -#define SCU_GENERAL_MIRRSTS_HDCR_Pos (3UL) /*!< SCU_GENERAL MIRRSTS: HDCR (Bit 3) */ -#define SCU_GENERAL_MIRRSTS_HDCR_Msk (0x8UL) /*!< SCU_GENERAL MIRRSTS: HDCR (Bitfield-Mask: 0x01) */ -#define SCU_GENERAL_MIRRSTS_OSCSICTRL_Pos (5UL) /*!< SCU_GENERAL MIRRSTS: OSCSICTRL (Bit 5) */ -#define SCU_GENERAL_MIRRSTS_OSCSICTRL_Msk (0x20UL) /*!< SCU_GENERAL MIRRSTS: OSCSICTRL (Bitfield-Mask: 0x01) */ -#define SCU_GENERAL_MIRRSTS_OSCULCTRL_Pos (7UL) /*!< SCU_GENERAL MIRRSTS: OSCULCTRL (Bit 7) */ -#define SCU_GENERAL_MIRRSTS_OSCULCTRL_Msk (0x80UL) /*!< SCU_GENERAL MIRRSTS: OSCULCTRL (Bitfield-Mask: 0x01) */ -#define SCU_GENERAL_MIRRSTS_RTC_CTR_Pos (8UL) /*!< SCU_GENERAL MIRRSTS: RTC_CTR (Bit 8) */ -#define SCU_GENERAL_MIRRSTS_RTC_CTR_Msk (0x100UL) /*!< SCU_GENERAL MIRRSTS: RTC_CTR (Bitfield-Mask: 0x01) */ -#define SCU_GENERAL_MIRRSTS_RTC_ATIM0_Pos (9UL) /*!< SCU_GENERAL MIRRSTS: RTC_ATIM0 (Bit 9) */ -#define SCU_GENERAL_MIRRSTS_RTC_ATIM0_Msk (0x200UL) /*!< SCU_GENERAL MIRRSTS: RTC_ATIM0 (Bitfield-Mask: 0x01) */ -#define SCU_GENERAL_MIRRSTS_RTC_ATIM1_Pos (10UL) /*!< SCU_GENERAL MIRRSTS: RTC_ATIM1 (Bit 10) */ -#define SCU_GENERAL_MIRRSTS_RTC_ATIM1_Msk (0x400UL) /*!< SCU_GENERAL MIRRSTS: RTC_ATIM1 (Bitfield-Mask: 0x01) */ -#define SCU_GENERAL_MIRRSTS_RTC_TIM0_Pos (11UL) /*!< SCU_GENERAL MIRRSTS: RTC_TIM0 (Bit 11) */ -#define SCU_GENERAL_MIRRSTS_RTC_TIM0_Msk (0x800UL) /*!< SCU_GENERAL MIRRSTS: RTC_TIM0 (Bitfield-Mask: 0x01) */ -#define SCU_GENERAL_MIRRSTS_RTC_TIM1_Pos (12UL) /*!< SCU_GENERAL MIRRSTS: RTC_TIM1 (Bit 12) */ -#define SCU_GENERAL_MIRRSTS_RTC_TIM1_Msk (0x1000UL) /*!< SCU_GENERAL MIRRSTS: RTC_TIM1 (Bitfield-Mask: 0x01) */ -#define SCU_GENERAL_MIRRSTS_RMX_Pos (13UL) /*!< SCU_GENERAL MIRRSTS: RMX (Bit 13) */ -#define SCU_GENERAL_MIRRSTS_RMX_Msk (0x2000UL) /*!< SCU_GENERAL MIRRSTS: RMX (Bitfield-Mask: 0x01) */ -#define SCU_GENERAL_MIRRSTS_RTC_MSKSR_Pos (14UL) /*!< SCU_GENERAL MIRRSTS: RTC_MSKSR (Bit 14) */ -#define SCU_GENERAL_MIRRSTS_RTC_MSKSR_Msk (0x4000UL) /*!< SCU_GENERAL MIRRSTS: RTC_MSKSR (Bitfield-Mask: 0x01) */ -#define SCU_GENERAL_MIRRSTS_RTC_CLRSR_Pos (15UL) /*!< SCU_GENERAL MIRRSTS: RTC_CLRSR (Bit 15) */ -#define SCU_GENERAL_MIRRSTS_RTC_CLRSR_Msk (0x8000UL) /*!< SCU_GENERAL MIRRSTS: RTC_CLRSR (Bitfield-Mask: 0x01) */ - -/* ------------------------------ SCU_GENERAL_RMACR ----------------------------- */ -#define SCU_GENERAL_RMACR_RDWR_Pos (0UL) /*!< SCU_GENERAL RMACR: RDWR (Bit 0) */ -#define SCU_GENERAL_RMACR_RDWR_Msk (0x1UL) /*!< SCU_GENERAL RMACR: RDWR (Bitfield-Mask: 0x01) */ -#define SCU_GENERAL_RMACR_ADDR_Pos (16UL) /*!< SCU_GENERAL RMACR: ADDR (Bit 16) */ -#define SCU_GENERAL_RMACR_ADDR_Msk (0xf0000UL) /*!< SCU_GENERAL RMACR: ADDR (Bitfield-Mask: 0x0f) */ - -/* ----------------------------- SCU_GENERAL_RMDATA ----------------------------- */ -#define SCU_GENERAL_RMDATA_DATA_Pos (0UL) /*!< SCU_GENERAL RMDATA: DATA (Bit 0) */ -#define SCU_GENERAL_RMDATA_DATA_Msk (0xffffffffUL) /*!< SCU_GENERAL RMDATA: DATA (Bitfield-Mask: 0xffffffff) */ - - -/* ================================================================================ */ -/* ================ struct 'SCU_INTERRUPT' Position & Mask ================ */ -/* ================================================================================ */ - - -/* ---------------------------- SCU_INTERRUPT_SRSTAT ---------------------------- */ -#define SCU_INTERRUPT_SRSTAT_PRWARN_Pos (0UL) /*!< SCU_INTERRUPT SRSTAT: PRWARN (Bit 0) */ -#define SCU_INTERRUPT_SRSTAT_PRWARN_Msk (0x1UL) /*!< SCU_INTERRUPT SRSTAT: PRWARN (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_SRSTAT_PI_Pos (1UL) /*!< SCU_INTERRUPT SRSTAT: PI (Bit 1) */ -#define SCU_INTERRUPT_SRSTAT_PI_Msk (0x2UL) /*!< SCU_INTERRUPT SRSTAT: PI (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_SRSTAT_AI_Pos (2UL) /*!< SCU_INTERRUPT SRSTAT: AI (Bit 2) */ -#define SCU_INTERRUPT_SRSTAT_AI_Msk (0x4UL) /*!< SCU_INTERRUPT SRSTAT: AI (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_SRSTAT_DLROVR_Pos (3UL) /*!< SCU_INTERRUPT SRSTAT: DLROVR (Bit 3) */ -#define SCU_INTERRUPT_SRSTAT_DLROVR_Msk (0x8UL) /*!< SCU_INTERRUPT SRSTAT: DLROVR (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_SRSTAT_HDCLR_Pos (17UL) /*!< SCU_INTERRUPT SRSTAT: HDCLR (Bit 17) */ -#define SCU_INTERRUPT_SRSTAT_HDCLR_Msk (0x20000UL) /*!< SCU_INTERRUPT SRSTAT: HDCLR (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_SRSTAT_HDSET_Pos (18UL) /*!< SCU_INTERRUPT SRSTAT: HDSET (Bit 18) */ -#define SCU_INTERRUPT_SRSTAT_HDSET_Msk (0x40000UL) /*!< SCU_INTERRUPT SRSTAT: HDSET (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_SRSTAT_HDCR_Pos (19UL) /*!< SCU_INTERRUPT SRSTAT: HDCR (Bit 19) */ -#define SCU_INTERRUPT_SRSTAT_HDCR_Msk (0x80000UL) /*!< SCU_INTERRUPT SRSTAT: HDCR (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_SRSTAT_OSCSICTRL_Pos (21UL) /*!< SCU_INTERRUPT SRSTAT: OSCSICTRL (Bit 21) */ -#define SCU_INTERRUPT_SRSTAT_OSCSICTRL_Msk (0x200000UL) /*!< SCU_INTERRUPT SRSTAT: OSCSICTRL (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_SRSTAT_OSCULCTRL_Pos (23UL) /*!< SCU_INTERRUPT SRSTAT: OSCULCTRL (Bit 23) */ -#define SCU_INTERRUPT_SRSTAT_OSCULCTRL_Msk (0x800000UL) /*!< SCU_INTERRUPT SRSTAT: OSCULCTRL (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_SRSTAT_RTC_CTR_Pos (24UL) /*!< SCU_INTERRUPT SRSTAT: RTC_CTR (Bit 24) */ -#define SCU_INTERRUPT_SRSTAT_RTC_CTR_Msk (0x1000000UL) /*!< SCU_INTERRUPT SRSTAT: RTC_CTR (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_SRSTAT_RTC_ATIM0_Pos (25UL) /*!< SCU_INTERRUPT SRSTAT: RTC_ATIM0 (Bit 25) */ -#define SCU_INTERRUPT_SRSTAT_RTC_ATIM0_Msk (0x2000000UL) /*!< SCU_INTERRUPT SRSTAT: RTC_ATIM0 (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_SRSTAT_RTC_ATIM1_Pos (26UL) /*!< SCU_INTERRUPT SRSTAT: RTC_ATIM1 (Bit 26) */ -#define SCU_INTERRUPT_SRSTAT_RTC_ATIM1_Msk (0x4000000UL) /*!< SCU_INTERRUPT SRSTAT: RTC_ATIM1 (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_SRSTAT_RTC_TIM0_Pos (27UL) /*!< SCU_INTERRUPT SRSTAT: RTC_TIM0 (Bit 27) */ -#define SCU_INTERRUPT_SRSTAT_RTC_TIM0_Msk (0x8000000UL) /*!< SCU_INTERRUPT SRSTAT: RTC_TIM0 (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_SRSTAT_RTC_TIM1_Pos (28UL) /*!< SCU_INTERRUPT SRSTAT: RTC_TIM1 (Bit 28) */ -#define SCU_INTERRUPT_SRSTAT_RTC_TIM1_Msk (0x10000000UL) /*!< SCU_INTERRUPT SRSTAT: RTC_TIM1 (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_SRSTAT_RMX_Pos (29UL) /*!< SCU_INTERRUPT SRSTAT: RMX (Bit 29) */ -#define SCU_INTERRUPT_SRSTAT_RMX_Msk (0x20000000UL) /*!< SCU_INTERRUPT SRSTAT: RMX (Bitfield-Mask: 0x01) */ - -/* ----------------------------- SCU_INTERRUPT_SRRAW ---------------------------- */ -#define SCU_INTERRUPT_SRRAW_PRWARN_Pos (0UL) /*!< SCU_INTERRUPT SRRAW: PRWARN (Bit 0) */ -#define SCU_INTERRUPT_SRRAW_PRWARN_Msk (0x1UL) /*!< SCU_INTERRUPT SRRAW: PRWARN (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_SRRAW_PI_Pos (1UL) /*!< SCU_INTERRUPT SRRAW: PI (Bit 1) */ -#define SCU_INTERRUPT_SRRAW_PI_Msk (0x2UL) /*!< SCU_INTERRUPT SRRAW: PI (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_SRRAW_AI_Pos (2UL) /*!< SCU_INTERRUPT SRRAW: AI (Bit 2) */ -#define SCU_INTERRUPT_SRRAW_AI_Msk (0x4UL) /*!< SCU_INTERRUPT SRRAW: AI (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_SRRAW_DLROVR_Pos (3UL) /*!< SCU_INTERRUPT SRRAW: DLROVR (Bit 3) */ -#define SCU_INTERRUPT_SRRAW_DLROVR_Msk (0x8UL) /*!< SCU_INTERRUPT SRRAW: DLROVR (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_SRRAW_HDCLR_Pos (17UL) /*!< SCU_INTERRUPT SRRAW: HDCLR (Bit 17) */ -#define SCU_INTERRUPT_SRRAW_HDCLR_Msk (0x20000UL) /*!< SCU_INTERRUPT SRRAW: HDCLR (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_SRRAW_HDSET_Pos (18UL) /*!< SCU_INTERRUPT SRRAW: HDSET (Bit 18) */ -#define SCU_INTERRUPT_SRRAW_HDSET_Msk (0x40000UL) /*!< SCU_INTERRUPT SRRAW: HDSET (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_SRRAW_HDCR_Pos (19UL) /*!< SCU_INTERRUPT SRRAW: HDCR (Bit 19) */ -#define SCU_INTERRUPT_SRRAW_HDCR_Msk (0x80000UL) /*!< SCU_INTERRUPT SRRAW: HDCR (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_SRRAW_OSCSICTRL_Pos (21UL) /*!< SCU_INTERRUPT SRRAW: OSCSICTRL (Bit 21) */ -#define SCU_INTERRUPT_SRRAW_OSCSICTRL_Msk (0x200000UL) /*!< SCU_INTERRUPT SRRAW: OSCSICTRL (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_SRRAW_OSCULCTRL_Pos (23UL) /*!< SCU_INTERRUPT SRRAW: OSCULCTRL (Bit 23) */ -#define SCU_INTERRUPT_SRRAW_OSCULCTRL_Msk (0x800000UL) /*!< SCU_INTERRUPT SRRAW: OSCULCTRL (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_SRRAW_RTC_CTR_Pos (24UL) /*!< SCU_INTERRUPT SRRAW: RTC_CTR (Bit 24) */ -#define SCU_INTERRUPT_SRRAW_RTC_CTR_Msk (0x1000000UL) /*!< SCU_INTERRUPT SRRAW: RTC_CTR (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_SRRAW_RTC_ATIM0_Pos (25UL) /*!< SCU_INTERRUPT SRRAW: RTC_ATIM0 (Bit 25) */ -#define SCU_INTERRUPT_SRRAW_RTC_ATIM0_Msk (0x2000000UL) /*!< SCU_INTERRUPT SRRAW: RTC_ATIM0 (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_SRRAW_RTC_ATIM1_Pos (26UL) /*!< SCU_INTERRUPT SRRAW: RTC_ATIM1 (Bit 26) */ -#define SCU_INTERRUPT_SRRAW_RTC_ATIM1_Msk (0x4000000UL) /*!< SCU_INTERRUPT SRRAW: RTC_ATIM1 (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_SRRAW_RTC_TIM0_Pos (27UL) /*!< SCU_INTERRUPT SRRAW: RTC_TIM0 (Bit 27) */ -#define SCU_INTERRUPT_SRRAW_RTC_TIM0_Msk (0x8000000UL) /*!< SCU_INTERRUPT SRRAW: RTC_TIM0 (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_SRRAW_RTC_TIM1_Pos (28UL) /*!< SCU_INTERRUPT SRRAW: RTC_TIM1 (Bit 28) */ -#define SCU_INTERRUPT_SRRAW_RTC_TIM1_Msk (0x10000000UL) /*!< SCU_INTERRUPT SRRAW: RTC_TIM1 (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_SRRAW_RMX_Pos (29UL) /*!< SCU_INTERRUPT SRRAW: RMX (Bit 29) */ -#define SCU_INTERRUPT_SRRAW_RMX_Msk (0x20000000UL) /*!< SCU_INTERRUPT SRRAW: RMX (Bitfield-Mask: 0x01) */ - -/* ----------------------------- SCU_INTERRUPT_SRMSK ---------------------------- */ -#define SCU_INTERRUPT_SRMSK_PRWARN_Pos (0UL) /*!< SCU_INTERRUPT SRMSK: PRWARN (Bit 0) */ -#define SCU_INTERRUPT_SRMSK_PRWARN_Msk (0x1UL) /*!< SCU_INTERRUPT SRMSK: PRWARN (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_SRMSK_PI_Pos (1UL) /*!< SCU_INTERRUPT SRMSK: PI (Bit 1) */ -#define SCU_INTERRUPT_SRMSK_PI_Msk (0x2UL) /*!< SCU_INTERRUPT SRMSK: PI (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_SRMSK_AI_Pos (2UL) /*!< SCU_INTERRUPT SRMSK: AI (Bit 2) */ -#define SCU_INTERRUPT_SRMSK_AI_Msk (0x4UL) /*!< SCU_INTERRUPT SRMSK: AI (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_SRMSK_DLROVR_Pos (3UL) /*!< SCU_INTERRUPT SRMSK: DLROVR (Bit 3) */ -#define SCU_INTERRUPT_SRMSK_DLROVR_Msk (0x8UL) /*!< SCU_INTERRUPT SRMSK: DLROVR (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_SRMSK_HDCLR_Pos (17UL) /*!< SCU_INTERRUPT SRMSK: HDCLR (Bit 17) */ -#define SCU_INTERRUPT_SRMSK_HDCLR_Msk (0x20000UL) /*!< SCU_INTERRUPT SRMSK: HDCLR (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_SRMSK_HDSET_Pos (18UL) /*!< SCU_INTERRUPT SRMSK: HDSET (Bit 18) */ -#define SCU_INTERRUPT_SRMSK_HDSET_Msk (0x40000UL) /*!< SCU_INTERRUPT SRMSK: HDSET (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_SRMSK_HDCR_Pos (19UL) /*!< SCU_INTERRUPT SRMSK: HDCR (Bit 19) */ -#define SCU_INTERRUPT_SRMSK_HDCR_Msk (0x80000UL) /*!< SCU_INTERRUPT SRMSK: HDCR (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_SRMSK_OSCSICTRL_Pos (21UL) /*!< SCU_INTERRUPT SRMSK: OSCSICTRL (Bit 21) */ -#define SCU_INTERRUPT_SRMSK_OSCSICTRL_Msk (0x200000UL) /*!< SCU_INTERRUPT SRMSK: OSCSICTRL (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_SRMSK_OSCULCTRL_Pos (23UL) /*!< SCU_INTERRUPT SRMSK: OSCULCTRL (Bit 23) */ -#define SCU_INTERRUPT_SRMSK_OSCULCTRL_Msk (0x800000UL) /*!< SCU_INTERRUPT SRMSK: OSCULCTRL (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_SRMSK_RTC_CTR_Pos (24UL) /*!< SCU_INTERRUPT SRMSK: RTC_CTR (Bit 24) */ -#define SCU_INTERRUPT_SRMSK_RTC_CTR_Msk (0x1000000UL) /*!< SCU_INTERRUPT SRMSK: RTC_CTR (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_SRMSK_RTC_ATIM0_Pos (25UL) /*!< SCU_INTERRUPT SRMSK: RTC_ATIM0 (Bit 25) */ -#define SCU_INTERRUPT_SRMSK_RTC_ATIM0_Msk (0x2000000UL) /*!< SCU_INTERRUPT SRMSK: RTC_ATIM0 (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_SRMSK_RTC_ATIM1_Pos (26UL) /*!< SCU_INTERRUPT SRMSK: RTC_ATIM1 (Bit 26) */ -#define SCU_INTERRUPT_SRMSK_RTC_ATIM1_Msk (0x4000000UL) /*!< SCU_INTERRUPT SRMSK: RTC_ATIM1 (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_SRMSK_RTC_TIM0_Pos (27UL) /*!< SCU_INTERRUPT SRMSK: RTC_TIM0 (Bit 27) */ -#define SCU_INTERRUPT_SRMSK_RTC_TIM0_Msk (0x8000000UL) /*!< SCU_INTERRUPT SRMSK: RTC_TIM0 (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_SRMSK_RTC_TIM1_Pos (28UL) /*!< SCU_INTERRUPT SRMSK: RTC_TIM1 (Bit 28) */ -#define SCU_INTERRUPT_SRMSK_RTC_TIM1_Msk (0x10000000UL) /*!< SCU_INTERRUPT SRMSK: RTC_TIM1 (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_SRMSK_RMX_Pos (29UL) /*!< SCU_INTERRUPT SRMSK: RMX (Bit 29) */ -#define SCU_INTERRUPT_SRMSK_RMX_Msk (0x20000000UL) /*!< SCU_INTERRUPT SRMSK: RMX (Bitfield-Mask: 0x01) */ - -/* ----------------------------- SCU_INTERRUPT_SRCLR ---------------------------- */ -#define SCU_INTERRUPT_SRCLR_PRWARN_Pos (0UL) /*!< SCU_INTERRUPT SRCLR: PRWARN (Bit 0) */ -#define SCU_INTERRUPT_SRCLR_PRWARN_Msk (0x1UL) /*!< SCU_INTERRUPT SRCLR: PRWARN (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_SRCLR_PI_Pos (1UL) /*!< SCU_INTERRUPT SRCLR: PI (Bit 1) */ -#define SCU_INTERRUPT_SRCLR_PI_Msk (0x2UL) /*!< SCU_INTERRUPT SRCLR: PI (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_SRCLR_AI_Pos (2UL) /*!< SCU_INTERRUPT SRCLR: AI (Bit 2) */ -#define SCU_INTERRUPT_SRCLR_AI_Msk (0x4UL) /*!< SCU_INTERRUPT SRCLR: AI (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_SRCLR_DLROVR_Pos (3UL) /*!< SCU_INTERRUPT SRCLR: DLROVR (Bit 3) */ -#define SCU_INTERRUPT_SRCLR_DLROVR_Msk (0x8UL) /*!< SCU_INTERRUPT SRCLR: DLROVR (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_SRCLR_HDCLR_Pos (17UL) /*!< SCU_INTERRUPT SRCLR: HDCLR (Bit 17) */ -#define SCU_INTERRUPT_SRCLR_HDCLR_Msk (0x20000UL) /*!< SCU_INTERRUPT SRCLR: HDCLR (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_SRCLR_HDSET_Pos (18UL) /*!< SCU_INTERRUPT SRCLR: HDSET (Bit 18) */ -#define SCU_INTERRUPT_SRCLR_HDSET_Msk (0x40000UL) /*!< SCU_INTERRUPT SRCLR: HDSET (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_SRCLR_HDCR_Pos (19UL) /*!< SCU_INTERRUPT SRCLR: HDCR (Bit 19) */ -#define SCU_INTERRUPT_SRCLR_HDCR_Msk (0x80000UL) /*!< SCU_INTERRUPT SRCLR: HDCR (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_SRCLR_OSCSICTRL_Pos (21UL) /*!< SCU_INTERRUPT SRCLR: OSCSICTRL (Bit 21) */ -#define SCU_INTERRUPT_SRCLR_OSCSICTRL_Msk (0x200000UL) /*!< SCU_INTERRUPT SRCLR: OSCSICTRL (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_SRCLR_OSCULCTRL_Pos (23UL) /*!< SCU_INTERRUPT SRCLR: OSCULCTRL (Bit 23) */ -#define SCU_INTERRUPT_SRCLR_OSCULCTRL_Msk (0x800000UL) /*!< SCU_INTERRUPT SRCLR: OSCULCTRL (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_SRCLR_RTC_CTR_Pos (24UL) /*!< SCU_INTERRUPT SRCLR: RTC_CTR (Bit 24) */ -#define SCU_INTERRUPT_SRCLR_RTC_CTR_Msk (0x1000000UL) /*!< SCU_INTERRUPT SRCLR: RTC_CTR (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_SRCLR_RTC_ATIM0_Pos (25UL) /*!< SCU_INTERRUPT SRCLR: RTC_ATIM0 (Bit 25) */ -#define SCU_INTERRUPT_SRCLR_RTC_ATIM0_Msk (0x2000000UL) /*!< SCU_INTERRUPT SRCLR: RTC_ATIM0 (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_SRCLR_RTC_ATIM1_Pos (26UL) /*!< SCU_INTERRUPT SRCLR: RTC_ATIM1 (Bit 26) */ -#define SCU_INTERRUPT_SRCLR_RTC_ATIM1_Msk (0x4000000UL) /*!< SCU_INTERRUPT SRCLR: RTC_ATIM1 (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_SRCLR_RTC_TIM0_Pos (27UL) /*!< SCU_INTERRUPT SRCLR: RTC_TIM0 (Bit 27) */ -#define SCU_INTERRUPT_SRCLR_RTC_TIM0_Msk (0x8000000UL) /*!< SCU_INTERRUPT SRCLR: RTC_TIM0 (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_SRCLR_RTC_TIM1_Pos (28UL) /*!< SCU_INTERRUPT SRCLR: RTC_TIM1 (Bit 28) */ -#define SCU_INTERRUPT_SRCLR_RTC_TIM1_Msk (0x10000000UL) /*!< SCU_INTERRUPT SRCLR: RTC_TIM1 (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_SRCLR_RMX_Pos (29UL) /*!< SCU_INTERRUPT SRCLR: RMX (Bit 29) */ -#define SCU_INTERRUPT_SRCLR_RMX_Msk (0x20000000UL) /*!< SCU_INTERRUPT SRCLR: RMX (Bitfield-Mask: 0x01) */ - -/* ----------------------------- SCU_INTERRUPT_SRSET ---------------------------- */ -#define SCU_INTERRUPT_SRSET_PRWARN_Pos (0UL) /*!< SCU_INTERRUPT SRSET: PRWARN (Bit 0) */ -#define SCU_INTERRUPT_SRSET_PRWARN_Msk (0x1UL) /*!< SCU_INTERRUPT SRSET: PRWARN (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_SRSET_PI_Pos (1UL) /*!< SCU_INTERRUPT SRSET: PI (Bit 1) */ -#define SCU_INTERRUPT_SRSET_PI_Msk (0x2UL) /*!< SCU_INTERRUPT SRSET: PI (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_SRSET_AI_Pos (2UL) /*!< SCU_INTERRUPT SRSET: AI (Bit 2) */ -#define SCU_INTERRUPT_SRSET_AI_Msk (0x4UL) /*!< SCU_INTERRUPT SRSET: AI (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_SRSET_DLROVR_Pos (3UL) /*!< SCU_INTERRUPT SRSET: DLROVR (Bit 3) */ -#define SCU_INTERRUPT_SRSET_DLROVR_Msk (0x8UL) /*!< SCU_INTERRUPT SRSET: DLROVR (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_SRSET_HDCRCLR_Pos (17UL) /*!< SCU_INTERRUPT SRSET: HDCRCLR (Bit 17) */ -#define SCU_INTERRUPT_SRSET_HDCRCLR_Msk (0x20000UL) /*!< SCU_INTERRUPT SRSET: HDCRCLR (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_SRSET_HDCRSET_Pos (18UL) /*!< SCU_INTERRUPT SRSET: HDCRSET (Bit 18) */ -#define SCU_INTERRUPT_SRSET_HDCRSET_Msk (0x40000UL) /*!< SCU_INTERRUPT SRSET: HDCRSET (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_SRSET_HDCR_Pos (19UL) /*!< SCU_INTERRUPT SRSET: HDCR (Bit 19) */ -#define SCU_INTERRUPT_SRSET_HDCR_Msk (0x80000UL) /*!< SCU_INTERRUPT SRSET: HDCR (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_SRSET_OSCSICTRL_Pos (21UL) /*!< SCU_INTERRUPT SRSET: OSCSICTRL (Bit 21) */ -#define SCU_INTERRUPT_SRSET_OSCSICTRL_Msk (0x200000UL) /*!< SCU_INTERRUPT SRSET: OSCSICTRL (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_SRSET_OSCULCTRL_Pos (23UL) /*!< SCU_INTERRUPT SRSET: OSCULCTRL (Bit 23) */ -#define SCU_INTERRUPT_SRSET_OSCULCTRL_Msk (0x800000UL) /*!< SCU_INTERRUPT SRSET: OSCULCTRL (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_SRSET_RTC_CTR_Pos (24UL) /*!< SCU_INTERRUPT SRSET: RTC_CTR (Bit 24) */ -#define SCU_INTERRUPT_SRSET_RTC_CTR_Msk (0x1000000UL) /*!< SCU_INTERRUPT SRSET: RTC_CTR (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_SRSET_RTC_ATIM0_Pos (25UL) /*!< SCU_INTERRUPT SRSET: RTC_ATIM0 (Bit 25) */ -#define SCU_INTERRUPT_SRSET_RTC_ATIM0_Msk (0x2000000UL) /*!< SCU_INTERRUPT SRSET: RTC_ATIM0 (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_SRSET_RTC_ATIM1_Pos (26UL) /*!< SCU_INTERRUPT SRSET: RTC_ATIM1 (Bit 26) */ -#define SCU_INTERRUPT_SRSET_RTC_ATIM1_Msk (0x4000000UL) /*!< SCU_INTERRUPT SRSET: RTC_ATIM1 (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_SRSET_RTC_TIM0_Pos (27UL) /*!< SCU_INTERRUPT SRSET: RTC_TIM0 (Bit 27) */ -#define SCU_INTERRUPT_SRSET_RTC_TIM0_Msk (0x8000000UL) /*!< SCU_INTERRUPT SRSET: RTC_TIM0 (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_SRSET_RTC_TIM1_Pos (28UL) /*!< SCU_INTERRUPT SRSET: RTC_TIM1 (Bit 28) */ -#define SCU_INTERRUPT_SRSET_RTC_TIM1_Msk (0x10000000UL) /*!< SCU_INTERRUPT SRSET: RTC_TIM1 (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_SRSET_RMX_Pos (29UL) /*!< SCU_INTERRUPT SRSET: RMX (Bit 29) */ -#define SCU_INTERRUPT_SRSET_RMX_Msk (0x20000000UL) /*!< SCU_INTERRUPT SRSET: RMX (Bitfield-Mask: 0x01) */ - -/* --------------------------- SCU_INTERRUPT_NMIREQEN --------------------------- */ -#define SCU_INTERRUPT_NMIREQEN_PRWARN_Pos (0UL) /*!< SCU_INTERRUPT NMIREQEN: PRWARN (Bit 0) */ -#define SCU_INTERRUPT_NMIREQEN_PRWARN_Msk (0x1UL) /*!< SCU_INTERRUPT NMIREQEN: PRWARN (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_NMIREQEN_PI_Pos (1UL) /*!< SCU_INTERRUPT NMIREQEN: PI (Bit 1) */ -#define SCU_INTERRUPT_NMIREQEN_PI_Msk (0x2UL) /*!< SCU_INTERRUPT NMIREQEN: PI (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_NMIREQEN_AI_Pos (2UL) /*!< SCU_INTERRUPT NMIREQEN: AI (Bit 2) */ -#define SCU_INTERRUPT_NMIREQEN_AI_Msk (0x4UL) /*!< SCU_INTERRUPT NMIREQEN: AI (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_NMIREQEN_ERU00_Pos (16UL) /*!< SCU_INTERRUPT NMIREQEN: ERU00 (Bit 16) */ -#define SCU_INTERRUPT_NMIREQEN_ERU00_Msk (0x10000UL) /*!< SCU_INTERRUPT NMIREQEN: ERU00 (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_NMIREQEN_ERU01_Pos (17UL) /*!< SCU_INTERRUPT NMIREQEN: ERU01 (Bit 17) */ -#define SCU_INTERRUPT_NMIREQEN_ERU01_Msk (0x20000UL) /*!< SCU_INTERRUPT NMIREQEN: ERU01 (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_NMIREQEN_ERU02_Pos (18UL) /*!< SCU_INTERRUPT NMIREQEN: ERU02 (Bit 18) */ -#define SCU_INTERRUPT_NMIREQEN_ERU02_Msk (0x40000UL) /*!< SCU_INTERRUPT NMIREQEN: ERU02 (Bitfield-Mask: 0x01) */ -#define SCU_INTERRUPT_NMIREQEN_ERU03_Pos (19UL) /*!< SCU_INTERRUPT NMIREQEN: ERU03 (Bit 19) */ -#define SCU_INTERRUPT_NMIREQEN_ERU03_Msk (0x80000UL) /*!< SCU_INTERRUPT NMIREQEN: ERU03 (Bitfield-Mask: 0x01) */ - - -/* ================================================================================ */ -/* ================ struct 'SCU_PARITY' Position & Mask ================ */ -/* ================================================================================ */ - - -/* ------------------------------- SCU_PARITY_PEEN ------------------------------ */ -#define SCU_PARITY_PEEN_PEENPS_Pos (0UL) /*!< SCU_PARITY PEEN: PEENPS (Bit 0) */ -#define SCU_PARITY_PEEN_PEENPS_Msk (0x1UL) /*!< SCU_PARITY PEEN: PEENPS (Bitfield-Mask: 0x01) */ -#define SCU_PARITY_PEEN_PEENDS1_Pos (1UL) /*!< SCU_PARITY PEEN: PEENDS1 (Bit 1) */ -#define SCU_PARITY_PEEN_PEENDS1_Msk (0x2UL) /*!< SCU_PARITY PEEN: PEENDS1 (Bitfield-Mask: 0x01) */ -#define SCU_PARITY_PEEN_PEENDS2_Pos (2UL) /*!< SCU_PARITY PEEN: PEENDS2 (Bit 2) */ -#define SCU_PARITY_PEEN_PEENDS2_Msk (0x4UL) /*!< SCU_PARITY PEEN: PEENDS2 (Bitfield-Mask: 0x01) */ -#define SCU_PARITY_PEEN_PEENU0_Pos (8UL) /*!< SCU_PARITY PEEN: PEENU0 (Bit 8) */ -#define SCU_PARITY_PEEN_PEENU0_Msk (0x100UL) /*!< SCU_PARITY PEEN: PEENU0 (Bitfield-Mask: 0x01) */ -#define SCU_PARITY_PEEN_PEENU1_Pos (9UL) /*!< SCU_PARITY PEEN: PEENU1 (Bit 9) */ -#define SCU_PARITY_PEEN_PEENU1_Msk (0x200UL) /*!< SCU_PARITY PEEN: PEENU1 (Bitfield-Mask: 0x01) */ -#define SCU_PARITY_PEEN_PEENU2_Pos (10UL) /*!< SCU_PARITY PEEN: PEENU2 (Bit 10) */ -#define SCU_PARITY_PEEN_PEENU2_Msk (0x400UL) /*!< SCU_PARITY PEEN: PEENU2 (Bitfield-Mask: 0x01) */ -#define SCU_PARITY_PEEN_PEENMC_Pos (12UL) /*!< SCU_PARITY PEEN: PEENMC (Bit 12) */ -#define SCU_PARITY_PEEN_PEENMC_Msk (0x1000UL) /*!< SCU_PARITY PEEN: PEENMC (Bitfield-Mask: 0x01) */ -#define SCU_PARITY_PEEN_PEENPPRF_Pos (13UL) /*!< SCU_PARITY PEEN: PEENPPRF (Bit 13) */ -#define SCU_PARITY_PEEN_PEENPPRF_Msk (0x2000UL) /*!< SCU_PARITY PEEN: PEENPPRF (Bitfield-Mask: 0x01) */ -#define SCU_PARITY_PEEN_PEENUSB_Pos (16UL) /*!< SCU_PARITY PEEN: PEENUSB (Bit 16) */ -#define SCU_PARITY_PEEN_PEENUSB_Msk (0x10000UL) /*!< SCU_PARITY PEEN: PEENUSB (Bitfield-Mask: 0x01) */ -#define SCU_PARITY_PEEN_PEENETH0TX_Pos (17UL) /*!< SCU_PARITY PEEN: PEENETH0TX (Bit 17) */ -#define SCU_PARITY_PEEN_PEENETH0TX_Msk (0x20000UL) /*!< SCU_PARITY PEEN: PEENETH0TX (Bitfield-Mask: 0x01) */ -#define SCU_PARITY_PEEN_PEENETH0RX_Pos (18UL) /*!< SCU_PARITY PEEN: PEENETH0RX (Bit 18) */ -#define SCU_PARITY_PEEN_PEENETH0RX_Msk (0x40000UL) /*!< SCU_PARITY PEEN: PEENETH0RX (Bitfield-Mask: 0x01) */ -#define SCU_PARITY_PEEN_PEENSD0_Pos (19UL) /*!< SCU_PARITY PEEN: PEENSD0 (Bit 19) */ -#define SCU_PARITY_PEEN_PEENSD0_Msk (0x80000UL) /*!< SCU_PARITY PEEN: PEENSD0 (Bitfield-Mask: 0x01) */ -#define SCU_PARITY_PEEN_PEENSD1_Pos (20UL) /*!< SCU_PARITY PEEN: PEENSD1 (Bit 20) */ -#define SCU_PARITY_PEEN_PEENSD1_Msk (0x100000UL) /*!< SCU_PARITY PEEN: PEENSD1 (Bitfield-Mask: 0x01) */ -#define SCU_PARITY_PEEN_PEENECAT0_Pos (24UL) /*!< SCU_PARITY PEEN: PEENECAT0 (Bit 24) */ -#define SCU_PARITY_PEEN_PEENECAT0_Msk (0x1000000UL) /*!< SCU_PARITY PEEN: PEENECAT0 (Bitfield-Mask: 0x01) */ - -/* ----------------------------- SCU_PARITY_MCHKCON ----------------------------- */ -#define SCU_PARITY_MCHKCON_SELPS_Pos (0UL) /*!< SCU_PARITY MCHKCON: SELPS (Bit 0) */ -#define SCU_PARITY_MCHKCON_SELPS_Msk (0x1UL) /*!< SCU_PARITY MCHKCON: SELPS (Bitfield-Mask: 0x01) */ -#define SCU_PARITY_MCHKCON_SELDS1_Pos (1UL) /*!< SCU_PARITY MCHKCON: SELDS1 (Bit 1) */ -#define SCU_PARITY_MCHKCON_SELDS1_Msk (0x2UL) /*!< SCU_PARITY MCHKCON: SELDS1 (Bitfield-Mask: 0x01) */ -#define SCU_PARITY_MCHKCON_SELDS2_Pos (2UL) /*!< SCU_PARITY MCHKCON: SELDS2 (Bit 2) */ -#define SCU_PARITY_MCHKCON_SELDS2_Msk (0x4UL) /*!< SCU_PARITY MCHKCON: SELDS2 (Bitfield-Mask: 0x01) */ -#define SCU_PARITY_MCHKCON_USIC0DRA_Pos (8UL) /*!< SCU_PARITY MCHKCON: USIC0DRA (Bit 8) */ -#define SCU_PARITY_MCHKCON_USIC0DRA_Msk (0x100UL) /*!< SCU_PARITY MCHKCON: USIC0DRA (Bitfield-Mask: 0x01) */ -#define SCU_PARITY_MCHKCON_USIC1DRA_Pos (9UL) /*!< SCU_PARITY MCHKCON: USIC1DRA (Bit 9) */ -#define SCU_PARITY_MCHKCON_USIC1DRA_Msk (0x200UL) /*!< SCU_PARITY MCHKCON: USIC1DRA (Bitfield-Mask: 0x01) */ -#define SCU_PARITY_MCHKCON_USIC2DRA_Pos (10UL) /*!< SCU_PARITY MCHKCON: USIC2DRA (Bit 10) */ -#define SCU_PARITY_MCHKCON_USIC2DRA_Msk (0x400UL) /*!< SCU_PARITY MCHKCON: USIC2DRA (Bitfield-Mask: 0x01) */ -#define SCU_PARITY_MCHKCON_MCANDRA_Pos (12UL) /*!< SCU_PARITY MCHKCON: MCANDRA (Bit 12) */ -#define SCU_PARITY_MCHKCON_MCANDRA_Msk (0x1000UL) /*!< SCU_PARITY MCHKCON: MCANDRA (Bitfield-Mask: 0x01) */ -#define SCU_PARITY_MCHKCON_PPRFDRA_Pos (13UL) /*!< SCU_PARITY MCHKCON: PPRFDRA (Bit 13) */ -#define SCU_PARITY_MCHKCON_PPRFDRA_Msk (0x2000UL) /*!< SCU_PARITY MCHKCON: PPRFDRA (Bitfield-Mask: 0x01) */ -#define SCU_PARITY_MCHKCON_SELUSB_Pos (16UL) /*!< SCU_PARITY MCHKCON: SELUSB (Bit 16) */ -#define SCU_PARITY_MCHKCON_SELUSB_Msk (0x10000UL) /*!< SCU_PARITY MCHKCON: SELUSB (Bitfield-Mask: 0x01) */ -#define SCU_PARITY_MCHKCON_SELETH0TX_Pos (17UL) /*!< SCU_PARITY MCHKCON: SELETH0TX (Bit 17) */ -#define SCU_PARITY_MCHKCON_SELETH0TX_Msk (0x20000UL) /*!< SCU_PARITY MCHKCON: SELETH0TX (Bitfield-Mask: 0x01) */ -#define SCU_PARITY_MCHKCON_SELETH0RX_Pos (18UL) /*!< SCU_PARITY MCHKCON: SELETH0RX (Bit 18) */ -#define SCU_PARITY_MCHKCON_SELETH0RX_Msk (0x40000UL) /*!< SCU_PARITY MCHKCON: SELETH0RX (Bitfield-Mask: 0x01) */ -#define SCU_PARITY_MCHKCON_SELSD0_Pos (19UL) /*!< SCU_PARITY MCHKCON: SELSD0 (Bit 19) */ -#define SCU_PARITY_MCHKCON_SELSD0_Msk (0x80000UL) /*!< SCU_PARITY MCHKCON: SELSD0 (Bitfield-Mask: 0x01) */ -#define SCU_PARITY_MCHKCON_SELSD1_Pos (20UL) /*!< SCU_PARITY MCHKCON: SELSD1 (Bit 20) */ -#define SCU_PARITY_MCHKCON_SELSD1_Msk (0x100000UL) /*!< SCU_PARITY MCHKCON: SELSD1 (Bitfield-Mask: 0x01) */ -#define SCU_PARITY_MCHKCON_SELECAT0_Pos (24UL) /*!< SCU_PARITY MCHKCON: SELECAT0 (Bit 24) */ -#define SCU_PARITY_MCHKCON_SELECAT0_Msk (0x1000000UL) /*!< SCU_PARITY MCHKCON: SELECAT0 (Bitfield-Mask: 0x01) */ - -/* ------------------------------- SCU_PARITY_PETE ------------------------------ */ -#define SCU_PARITY_PETE_PETEPS_Pos (0UL) /*!< SCU_PARITY PETE: PETEPS (Bit 0) */ -#define SCU_PARITY_PETE_PETEPS_Msk (0x1UL) /*!< SCU_PARITY PETE: PETEPS (Bitfield-Mask: 0x01) */ -#define SCU_PARITY_PETE_PETEDS1_Pos (1UL) /*!< SCU_PARITY PETE: PETEDS1 (Bit 1) */ -#define SCU_PARITY_PETE_PETEDS1_Msk (0x2UL) /*!< SCU_PARITY PETE: PETEDS1 (Bitfield-Mask: 0x01) */ -#define SCU_PARITY_PETE_PETEDS2_Pos (2UL) /*!< SCU_PARITY PETE: PETEDS2 (Bit 2) */ -#define SCU_PARITY_PETE_PETEDS2_Msk (0x4UL) /*!< SCU_PARITY PETE: PETEDS2 (Bitfield-Mask: 0x01) */ -#define SCU_PARITY_PETE_PETEU0_Pos (8UL) /*!< SCU_PARITY PETE: PETEU0 (Bit 8) */ -#define SCU_PARITY_PETE_PETEU0_Msk (0x100UL) /*!< SCU_PARITY PETE: PETEU0 (Bitfield-Mask: 0x01) */ -#define SCU_PARITY_PETE_PETEU1_Pos (9UL) /*!< SCU_PARITY PETE: PETEU1 (Bit 9) */ -#define SCU_PARITY_PETE_PETEU1_Msk (0x200UL) /*!< SCU_PARITY PETE: PETEU1 (Bitfield-Mask: 0x01) */ -#define SCU_PARITY_PETE_PETEU2_Pos (10UL) /*!< SCU_PARITY PETE: PETEU2 (Bit 10) */ -#define SCU_PARITY_PETE_PETEU2_Msk (0x400UL) /*!< SCU_PARITY PETE: PETEU2 (Bitfield-Mask: 0x01) */ -#define SCU_PARITY_PETE_PETEMC_Pos (12UL) /*!< SCU_PARITY PETE: PETEMC (Bit 12) */ -#define SCU_PARITY_PETE_PETEMC_Msk (0x1000UL) /*!< SCU_PARITY PETE: PETEMC (Bitfield-Mask: 0x01) */ -#define SCU_PARITY_PETE_PETEPPRF_Pos (13UL) /*!< SCU_PARITY PETE: PETEPPRF (Bit 13) */ -#define SCU_PARITY_PETE_PETEPPRF_Msk (0x2000UL) /*!< SCU_PARITY PETE: PETEPPRF (Bitfield-Mask: 0x01) */ -#define SCU_PARITY_PETE_PETEUSB_Pos (16UL) /*!< SCU_PARITY PETE: PETEUSB (Bit 16) */ -#define SCU_PARITY_PETE_PETEUSB_Msk (0x10000UL) /*!< SCU_PARITY PETE: PETEUSB (Bitfield-Mask: 0x01) */ -#define SCU_PARITY_PETE_PETEETH0TX_Pos (17UL) /*!< SCU_PARITY PETE: PETEETH0TX (Bit 17) */ -#define SCU_PARITY_PETE_PETEETH0TX_Msk (0x20000UL) /*!< SCU_PARITY PETE: PETEETH0TX (Bitfield-Mask: 0x01) */ -#define SCU_PARITY_PETE_PETEETH0RX_Pos (18UL) /*!< SCU_PARITY PETE: PETEETH0RX (Bit 18) */ -#define SCU_PARITY_PETE_PETEETH0RX_Msk (0x40000UL) /*!< SCU_PARITY PETE: PETEETH0RX (Bitfield-Mask: 0x01) */ -#define SCU_PARITY_PETE_PETESD0_Pos (19UL) /*!< SCU_PARITY PETE: PETESD0 (Bit 19) */ -#define SCU_PARITY_PETE_PETESD0_Msk (0x80000UL) /*!< SCU_PARITY PETE: PETESD0 (Bitfield-Mask: 0x01) */ -#define SCU_PARITY_PETE_PETESD1_Pos (20UL) /*!< SCU_PARITY PETE: PETESD1 (Bit 20) */ -#define SCU_PARITY_PETE_PETESD1_Msk (0x100000UL) /*!< SCU_PARITY PETE: PETESD1 (Bitfield-Mask: 0x01) */ -#define SCU_PARITY_PETE_PETEECAT0_Pos (24UL) /*!< SCU_PARITY PETE: PETEECAT0 (Bit 24) */ -#define SCU_PARITY_PETE_PETEECAT0_Msk (0x1000000UL) /*!< SCU_PARITY PETE: PETEECAT0 (Bitfield-Mask: 0x01) */ - -/* ----------------------------- SCU_PARITY_PERSTEN ----------------------------- */ -#define SCU_PARITY_PERSTEN_RSEN_Pos (0UL) /*!< SCU_PARITY PERSTEN: RSEN (Bit 0) */ -#define SCU_PARITY_PERSTEN_RSEN_Msk (0x1UL) /*!< SCU_PARITY PERSTEN: RSEN (Bitfield-Mask: 0x01) */ - -/* ------------------------------ SCU_PARITY_PEFLAG ----------------------------- */ -#define SCU_PARITY_PEFLAG_PEFPS_Pos (0UL) /*!< SCU_PARITY PEFLAG: PEFPS (Bit 0) */ -#define SCU_PARITY_PEFLAG_PEFPS_Msk (0x1UL) /*!< SCU_PARITY PEFLAG: PEFPS (Bitfield-Mask: 0x01) */ -#define SCU_PARITY_PEFLAG_PEFDS1_Pos (1UL) /*!< SCU_PARITY PEFLAG: PEFDS1 (Bit 1) */ -#define SCU_PARITY_PEFLAG_PEFDS1_Msk (0x2UL) /*!< SCU_PARITY PEFLAG: PEFDS1 (Bitfield-Mask: 0x01) */ -#define SCU_PARITY_PEFLAG_PEFDS2_Pos (2UL) /*!< SCU_PARITY PEFLAG: PEFDS2 (Bit 2) */ -#define SCU_PARITY_PEFLAG_PEFDS2_Msk (0x4UL) /*!< SCU_PARITY PEFLAG: PEFDS2 (Bitfield-Mask: 0x01) */ -#define SCU_PARITY_PEFLAG_PEFU0_Pos (8UL) /*!< SCU_PARITY PEFLAG: PEFU0 (Bit 8) */ -#define SCU_PARITY_PEFLAG_PEFU0_Msk (0x100UL) /*!< SCU_PARITY PEFLAG: PEFU0 (Bitfield-Mask: 0x01) */ -#define SCU_PARITY_PEFLAG_PEFU1_Pos (9UL) /*!< SCU_PARITY PEFLAG: PEFU1 (Bit 9) */ -#define SCU_PARITY_PEFLAG_PEFU1_Msk (0x200UL) /*!< SCU_PARITY PEFLAG: PEFU1 (Bitfield-Mask: 0x01) */ -#define SCU_PARITY_PEFLAG_PEFU2_Pos (10UL) /*!< SCU_PARITY PEFLAG: PEFU2 (Bit 10) */ -#define SCU_PARITY_PEFLAG_PEFU2_Msk (0x400UL) /*!< SCU_PARITY PEFLAG: PEFU2 (Bitfield-Mask: 0x01) */ -#define SCU_PARITY_PEFLAG_PEFMC_Pos (12UL) /*!< SCU_PARITY PEFLAG: PEFMC (Bit 12) */ -#define SCU_PARITY_PEFLAG_PEFMC_Msk (0x1000UL) /*!< SCU_PARITY PEFLAG: PEFMC (Bitfield-Mask: 0x01) */ -#define SCU_PARITY_PEFLAG_PEFPPRF_Pos (13UL) /*!< SCU_PARITY PEFLAG: PEFPPRF (Bit 13) */ -#define SCU_PARITY_PEFLAG_PEFPPRF_Msk (0x2000UL) /*!< SCU_PARITY PEFLAG: PEFPPRF (Bitfield-Mask: 0x01) */ -#define SCU_PARITY_PEFLAG_PEUSB_Pos (16UL) /*!< SCU_PARITY PEFLAG: PEUSB (Bit 16) */ -#define SCU_PARITY_PEFLAG_PEUSB_Msk (0x10000UL) /*!< SCU_PARITY PEFLAG: PEUSB (Bitfield-Mask: 0x01) */ -#define SCU_PARITY_PEFLAG_PEETH0TX_Pos (17UL) /*!< SCU_PARITY PEFLAG: PEETH0TX (Bit 17) */ -#define SCU_PARITY_PEFLAG_PEETH0TX_Msk (0x20000UL) /*!< SCU_PARITY PEFLAG: PEETH0TX (Bitfield-Mask: 0x01) */ -#define SCU_PARITY_PEFLAG_PEETH0RX_Pos (18UL) /*!< SCU_PARITY PEFLAG: PEETH0RX (Bit 18) */ -#define SCU_PARITY_PEFLAG_PEETH0RX_Msk (0x40000UL) /*!< SCU_PARITY PEFLAG: PEETH0RX (Bitfield-Mask: 0x01) */ -#define SCU_PARITY_PEFLAG_PESD0_Pos (19UL) /*!< SCU_PARITY PEFLAG: PESD0 (Bit 19) */ -#define SCU_PARITY_PEFLAG_PESD0_Msk (0x80000UL) /*!< SCU_PARITY PEFLAG: PESD0 (Bitfield-Mask: 0x01) */ -#define SCU_PARITY_PEFLAG_PESD1_Pos (20UL) /*!< SCU_PARITY PEFLAG: PESD1 (Bit 20) */ -#define SCU_PARITY_PEFLAG_PESD1_Msk (0x100000UL) /*!< SCU_PARITY PEFLAG: PESD1 (Bitfield-Mask: 0x01) */ -#define SCU_PARITY_PEFLAG_PEECAT0_Pos (24UL) /*!< SCU_PARITY PEFLAG: PEECAT0 (Bit 24) */ -#define SCU_PARITY_PEFLAG_PEECAT0_Msk (0x1000000UL) /*!< SCU_PARITY PEFLAG: PEECAT0 (Bitfield-Mask: 0x01) */ - -/* ------------------------------ SCU_PARITY_PMTPR ------------------------------ */ -#define SCU_PARITY_PMTPR_PWR_Pos (0UL) /*!< SCU_PARITY PMTPR: PWR (Bit 0) */ -#define SCU_PARITY_PMTPR_PWR_Msk (0xffUL) /*!< SCU_PARITY PMTPR: PWR (Bitfield-Mask: 0xff) */ -#define SCU_PARITY_PMTPR_PRD_Pos (8UL) /*!< SCU_PARITY PMTPR: PRD (Bit 8) */ -#define SCU_PARITY_PMTPR_PRD_Msk (0xff00UL) /*!< SCU_PARITY PMTPR: PRD (Bitfield-Mask: 0xff) */ - -/* ------------------------------ SCU_PARITY_PMTSR ------------------------------ */ -#define SCU_PARITY_PMTSR_MTENPS_Pos (0UL) /*!< SCU_PARITY PMTSR: MTENPS (Bit 0) */ -#define SCU_PARITY_PMTSR_MTENPS_Msk (0x1UL) /*!< SCU_PARITY PMTSR: MTENPS (Bitfield-Mask: 0x01) */ -#define SCU_PARITY_PMTSR_MTENDS1_Pos (1UL) /*!< SCU_PARITY PMTSR: MTENDS1 (Bit 1) */ -#define SCU_PARITY_PMTSR_MTENDS1_Msk (0x2UL) /*!< SCU_PARITY PMTSR: MTENDS1 (Bitfield-Mask: 0x01) */ -#define SCU_PARITY_PMTSR_MTENDS2_Pos (2UL) /*!< SCU_PARITY PMTSR: MTENDS2 (Bit 2) */ -#define SCU_PARITY_PMTSR_MTENDS2_Msk (0x4UL) /*!< SCU_PARITY PMTSR: MTENDS2 (Bitfield-Mask: 0x01) */ -#define SCU_PARITY_PMTSR_MTEU0_Pos (8UL) /*!< SCU_PARITY PMTSR: MTEU0 (Bit 8) */ -#define SCU_PARITY_PMTSR_MTEU0_Msk (0x100UL) /*!< SCU_PARITY PMTSR: MTEU0 (Bitfield-Mask: 0x01) */ -#define SCU_PARITY_PMTSR_MTEU1_Pos (9UL) /*!< SCU_PARITY PMTSR: MTEU1 (Bit 9) */ -#define SCU_PARITY_PMTSR_MTEU1_Msk (0x200UL) /*!< SCU_PARITY PMTSR: MTEU1 (Bitfield-Mask: 0x01) */ -#define SCU_PARITY_PMTSR_MTEU2_Pos (10UL) /*!< SCU_PARITY PMTSR: MTEU2 (Bit 10) */ -#define SCU_PARITY_PMTSR_MTEU2_Msk (0x400UL) /*!< SCU_PARITY PMTSR: MTEU2 (Bitfield-Mask: 0x01) */ -#define SCU_PARITY_PMTSR_MTEMC_Pos (12UL) /*!< SCU_PARITY PMTSR: MTEMC (Bit 12) */ -#define SCU_PARITY_PMTSR_MTEMC_Msk (0x1000UL) /*!< SCU_PARITY PMTSR: MTEMC (Bitfield-Mask: 0x01) */ -#define SCU_PARITY_PMTSR_MTEPPRF_Pos (13UL) /*!< SCU_PARITY PMTSR: MTEPPRF (Bit 13) */ -#define SCU_PARITY_PMTSR_MTEPPRF_Msk (0x2000UL) /*!< SCU_PARITY PMTSR: MTEPPRF (Bitfield-Mask: 0x01) */ -#define SCU_PARITY_PMTSR_MTUSB_Pos (16UL) /*!< SCU_PARITY PMTSR: MTUSB (Bit 16) */ -#define SCU_PARITY_PMTSR_MTUSB_Msk (0x10000UL) /*!< SCU_PARITY PMTSR: MTUSB (Bitfield-Mask: 0x01) */ -#define SCU_PARITY_PMTSR_MTETH0TX_Pos (17UL) /*!< SCU_PARITY PMTSR: MTETH0TX (Bit 17) */ -#define SCU_PARITY_PMTSR_MTETH0TX_Msk (0x20000UL) /*!< SCU_PARITY PMTSR: MTETH0TX (Bitfield-Mask: 0x01) */ -#define SCU_PARITY_PMTSR_MTETH0RX_Pos (18UL) /*!< SCU_PARITY PMTSR: MTETH0RX (Bit 18) */ -#define SCU_PARITY_PMTSR_MTETH0RX_Msk (0x40000UL) /*!< SCU_PARITY PMTSR: MTETH0RX (Bitfield-Mask: 0x01) */ -#define SCU_PARITY_PMTSR_MTSD0_Pos (19UL) /*!< SCU_PARITY PMTSR: MTSD0 (Bit 19) */ -#define SCU_PARITY_PMTSR_MTSD0_Msk (0x80000UL) /*!< SCU_PARITY PMTSR: MTSD0 (Bitfield-Mask: 0x01) */ -#define SCU_PARITY_PMTSR_MTSD1_Pos (20UL) /*!< SCU_PARITY PMTSR: MTSD1 (Bit 20) */ -#define SCU_PARITY_PMTSR_MTSD1_Msk (0x100000UL) /*!< SCU_PARITY PMTSR: MTSD1 (Bitfield-Mask: 0x01) */ -#define SCU_PARITY_PMTSR_MTECAT0_Pos (24UL) /*!< SCU_PARITY PMTSR: MTECAT0 (Bit 24) */ -#define SCU_PARITY_PMTSR_MTECAT0_Msk (0x1000000UL) /*!< SCU_PARITY PMTSR: MTECAT0 (Bitfield-Mask: 0x01) */ - - -/* ================================================================================ */ -/* ================ struct 'SCU_TRAP' Position & Mask ================ */ -/* ================================================================================ */ - - -/* ------------------------------ SCU_TRAP_TRAPSTAT ----------------------------- */ -#define SCU_TRAP_TRAPSTAT_SOSCWDGT_Pos (0UL) /*!< SCU_TRAP TRAPSTAT: SOSCWDGT (Bit 0) */ -#define SCU_TRAP_TRAPSTAT_SOSCWDGT_Msk (0x1UL) /*!< SCU_TRAP TRAPSTAT: SOSCWDGT (Bitfield-Mask: 0x01) */ -#define SCU_TRAP_TRAPSTAT_SVCOLCKT_Pos (2UL) /*!< SCU_TRAP TRAPSTAT: SVCOLCKT (Bit 2) */ -#define SCU_TRAP_TRAPSTAT_SVCOLCKT_Msk (0x4UL) /*!< SCU_TRAP TRAPSTAT: SVCOLCKT (Bitfield-Mask: 0x01) */ -#define SCU_TRAP_TRAPSTAT_UVCOLCKT_Pos (3UL) /*!< SCU_TRAP TRAPSTAT: UVCOLCKT (Bit 3) */ -#define SCU_TRAP_TRAPSTAT_UVCOLCKT_Msk (0x8UL) /*!< SCU_TRAP TRAPSTAT: UVCOLCKT (Bitfield-Mask: 0x01) */ -#define SCU_TRAP_TRAPSTAT_PET_Pos (4UL) /*!< SCU_TRAP TRAPSTAT: PET (Bit 4) */ -#define SCU_TRAP_TRAPSTAT_PET_Msk (0x10UL) /*!< SCU_TRAP TRAPSTAT: PET (Bitfield-Mask: 0x01) */ -#define SCU_TRAP_TRAPSTAT_BRWNT_Pos (5UL) /*!< SCU_TRAP TRAPSTAT: BRWNT (Bit 5) */ -#define SCU_TRAP_TRAPSTAT_BRWNT_Msk (0x20UL) /*!< SCU_TRAP TRAPSTAT: BRWNT (Bitfield-Mask: 0x01) */ -#define SCU_TRAP_TRAPSTAT_ULPWDGT_Pos (6UL) /*!< SCU_TRAP TRAPSTAT: ULPWDGT (Bit 6) */ -#define SCU_TRAP_TRAPSTAT_ULPWDGT_Msk (0x40UL) /*!< SCU_TRAP TRAPSTAT: ULPWDGT (Bitfield-Mask: 0x01) */ -#define SCU_TRAP_TRAPSTAT_BWERR0T_Pos (7UL) /*!< SCU_TRAP TRAPSTAT: BWERR0T (Bit 7) */ -#define SCU_TRAP_TRAPSTAT_BWERR0T_Msk (0x80UL) /*!< SCU_TRAP TRAPSTAT: BWERR0T (Bitfield-Mask: 0x01) */ -#define SCU_TRAP_TRAPSTAT_BWERR1T_Pos (8UL) /*!< SCU_TRAP TRAPSTAT: BWERR1T (Bit 8) */ -#define SCU_TRAP_TRAPSTAT_BWERR1T_Msk (0x100UL) /*!< SCU_TRAP TRAPSTAT: BWERR1T (Bitfield-Mask: 0x01) */ -#define SCU_TRAP_TRAPSTAT_ECAT0RST_Pos (16UL) /*!< SCU_TRAP TRAPSTAT: ECAT0RST (Bit 16) */ -#define SCU_TRAP_TRAPSTAT_ECAT0RST_Msk (0x10000UL) /*!< SCU_TRAP TRAPSTAT: ECAT0RST (Bitfield-Mask: 0x01) */ - -/* ------------------------------ SCU_TRAP_TRAPRAW ------------------------------ */ -#define SCU_TRAP_TRAPRAW_SOSCWDGT_Pos (0UL) /*!< SCU_TRAP TRAPRAW: SOSCWDGT (Bit 0) */ -#define SCU_TRAP_TRAPRAW_SOSCWDGT_Msk (0x1UL) /*!< SCU_TRAP TRAPRAW: SOSCWDGT (Bitfield-Mask: 0x01) */ -#define SCU_TRAP_TRAPRAW_SVCOLCKT_Pos (2UL) /*!< SCU_TRAP TRAPRAW: SVCOLCKT (Bit 2) */ -#define SCU_TRAP_TRAPRAW_SVCOLCKT_Msk (0x4UL) /*!< SCU_TRAP TRAPRAW: SVCOLCKT (Bitfield-Mask: 0x01) */ -#define SCU_TRAP_TRAPRAW_UVCOLCKT_Pos (3UL) /*!< SCU_TRAP TRAPRAW: UVCOLCKT (Bit 3) */ -#define SCU_TRAP_TRAPRAW_UVCOLCKT_Msk (0x8UL) /*!< SCU_TRAP TRAPRAW: UVCOLCKT (Bitfield-Mask: 0x01) */ -#define SCU_TRAP_TRAPRAW_PET_Pos (4UL) /*!< SCU_TRAP TRAPRAW: PET (Bit 4) */ -#define SCU_TRAP_TRAPRAW_PET_Msk (0x10UL) /*!< SCU_TRAP TRAPRAW: PET (Bitfield-Mask: 0x01) */ -#define SCU_TRAP_TRAPRAW_BRWNT_Pos (5UL) /*!< SCU_TRAP TRAPRAW: BRWNT (Bit 5) */ -#define SCU_TRAP_TRAPRAW_BRWNT_Msk (0x20UL) /*!< SCU_TRAP TRAPRAW: BRWNT (Bitfield-Mask: 0x01) */ -#define SCU_TRAP_TRAPRAW_ULPWDGT_Pos (6UL) /*!< SCU_TRAP TRAPRAW: ULPWDGT (Bit 6) */ -#define SCU_TRAP_TRAPRAW_ULPWDGT_Msk (0x40UL) /*!< SCU_TRAP TRAPRAW: ULPWDGT (Bitfield-Mask: 0x01) */ -#define SCU_TRAP_TRAPRAW_BWERR0T_Pos (7UL) /*!< SCU_TRAP TRAPRAW: BWERR0T (Bit 7) */ -#define SCU_TRAP_TRAPRAW_BWERR0T_Msk (0x80UL) /*!< SCU_TRAP TRAPRAW: BWERR0T (Bitfield-Mask: 0x01) */ -#define SCU_TRAP_TRAPRAW_BWERR1T_Pos (8UL) /*!< SCU_TRAP TRAPRAW: BWERR1T (Bit 8) */ -#define SCU_TRAP_TRAPRAW_BWERR1T_Msk (0x100UL) /*!< SCU_TRAP TRAPRAW: BWERR1T (Bitfield-Mask: 0x01) */ -#define SCU_TRAP_TRAPRAW_ECAT0RST_Pos (16UL) /*!< SCU_TRAP TRAPRAW: ECAT0RST (Bit 16) */ -#define SCU_TRAP_TRAPRAW_ECAT0RST_Msk (0x10000UL) /*!< SCU_TRAP TRAPRAW: ECAT0RST (Bitfield-Mask: 0x01) */ - -/* ------------------------------ SCU_TRAP_TRAPDIS ------------------------------ */ -#define SCU_TRAP_TRAPDIS_SOSCWDGT_Pos (0UL) /*!< SCU_TRAP TRAPDIS: SOSCWDGT (Bit 0) */ -#define SCU_TRAP_TRAPDIS_SOSCWDGT_Msk (0x1UL) /*!< SCU_TRAP TRAPDIS: SOSCWDGT (Bitfield-Mask: 0x01) */ -#define SCU_TRAP_TRAPDIS_SVCOLCKT_Pos (2UL) /*!< SCU_TRAP TRAPDIS: SVCOLCKT (Bit 2) */ -#define SCU_TRAP_TRAPDIS_SVCOLCKT_Msk (0x4UL) /*!< SCU_TRAP TRAPDIS: SVCOLCKT (Bitfield-Mask: 0x01) */ -#define SCU_TRAP_TRAPDIS_UVCOLCKT_Pos (3UL) /*!< SCU_TRAP TRAPDIS: UVCOLCKT (Bit 3) */ -#define SCU_TRAP_TRAPDIS_UVCOLCKT_Msk (0x8UL) /*!< SCU_TRAP TRAPDIS: UVCOLCKT (Bitfield-Mask: 0x01) */ -#define SCU_TRAP_TRAPDIS_PET_Pos (4UL) /*!< SCU_TRAP TRAPDIS: PET (Bit 4) */ -#define SCU_TRAP_TRAPDIS_PET_Msk (0x10UL) /*!< SCU_TRAP TRAPDIS: PET (Bitfield-Mask: 0x01) */ -#define SCU_TRAP_TRAPDIS_BRWNT_Pos (5UL) /*!< SCU_TRAP TRAPDIS: BRWNT (Bit 5) */ -#define SCU_TRAP_TRAPDIS_BRWNT_Msk (0x20UL) /*!< SCU_TRAP TRAPDIS: BRWNT (Bitfield-Mask: 0x01) */ -#define SCU_TRAP_TRAPDIS_ULPWDGT_Pos (6UL) /*!< SCU_TRAP TRAPDIS: ULPWDGT (Bit 6) */ -#define SCU_TRAP_TRAPDIS_ULPWDGT_Msk (0x40UL) /*!< SCU_TRAP TRAPDIS: ULPWDGT (Bitfield-Mask: 0x01) */ -#define SCU_TRAP_TRAPDIS_BWERR0T_Pos (7UL) /*!< SCU_TRAP TRAPDIS: BWERR0T (Bit 7) */ -#define SCU_TRAP_TRAPDIS_BWERR0T_Msk (0x80UL) /*!< SCU_TRAP TRAPDIS: BWERR0T (Bitfield-Mask: 0x01) */ -#define SCU_TRAP_TRAPDIS_BWERR1T_Pos (8UL) /*!< SCU_TRAP TRAPDIS: BWERR1T (Bit 8) */ -#define SCU_TRAP_TRAPDIS_BWERR1T_Msk (0x100UL) /*!< SCU_TRAP TRAPDIS: BWERR1T (Bitfield-Mask: 0x01) */ -#define SCU_TRAP_TRAPDIS_ECAT0RST_Pos (16UL) /*!< SCU_TRAP TRAPDIS: ECAT0RST (Bit 16) */ -#define SCU_TRAP_TRAPDIS_ECAT0RST_Msk (0x10000UL) /*!< SCU_TRAP TRAPDIS: ECAT0RST (Bitfield-Mask: 0x01) */ - -/* ------------------------------ SCU_TRAP_TRAPCLR ------------------------------ */ -#define SCU_TRAP_TRAPCLR_SOSCWDGT_Pos (0UL) /*!< SCU_TRAP TRAPCLR: SOSCWDGT (Bit 0) */ -#define SCU_TRAP_TRAPCLR_SOSCWDGT_Msk (0x1UL) /*!< SCU_TRAP TRAPCLR: SOSCWDGT (Bitfield-Mask: 0x01) */ -#define SCU_TRAP_TRAPCLR_SVCOLCKT_Pos (2UL) /*!< SCU_TRAP TRAPCLR: SVCOLCKT (Bit 2) */ -#define SCU_TRAP_TRAPCLR_SVCOLCKT_Msk (0x4UL) /*!< SCU_TRAP TRAPCLR: SVCOLCKT (Bitfield-Mask: 0x01) */ -#define SCU_TRAP_TRAPCLR_UVCOLCKT_Pos (3UL) /*!< SCU_TRAP TRAPCLR: UVCOLCKT (Bit 3) */ -#define SCU_TRAP_TRAPCLR_UVCOLCKT_Msk (0x8UL) /*!< SCU_TRAP TRAPCLR: UVCOLCKT (Bitfield-Mask: 0x01) */ -#define SCU_TRAP_TRAPCLR_PET_Pos (4UL) /*!< SCU_TRAP TRAPCLR: PET (Bit 4) */ -#define SCU_TRAP_TRAPCLR_PET_Msk (0x10UL) /*!< SCU_TRAP TRAPCLR: PET (Bitfield-Mask: 0x01) */ -#define SCU_TRAP_TRAPCLR_BRWNT_Pos (5UL) /*!< SCU_TRAP TRAPCLR: BRWNT (Bit 5) */ -#define SCU_TRAP_TRAPCLR_BRWNT_Msk (0x20UL) /*!< SCU_TRAP TRAPCLR: BRWNT (Bitfield-Mask: 0x01) */ -#define SCU_TRAP_TRAPCLR_ULPWDGT_Pos (6UL) /*!< SCU_TRAP TRAPCLR: ULPWDGT (Bit 6) */ -#define SCU_TRAP_TRAPCLR_ULPWDGT_Msk (0x40UL) /*!< SCU_TRAP TRAPCLR: ULPWDGT (Bitfield-Mask: 0x01) */ -#define SCU_TRAP_TRAPCLR_BWERR0T_Pos (7UL) /*!< SCU_TRAP TRAPCLR: BWERR0T (Bit 7) */ -#define SCU_TRAP_TRAPCLR_BWERR0T_Msk (0x80UL) /*!< SCU_TRAP TRAPCLR: BWERR0T (Bitfield-Mask: 0x01) */ -#define SCU_TRAP_TRAPCLR_BWERR1T_Pos (8UL) /*!< SCU_TRAP TRAPCLR: BWERR1T (Bit 8) */ -#define SCU_TRAP_TRAPCLR_BWERR1T_Msk (0x100UL) /*!< SCU_TRAP TRAPCLR: BWERR1T (Bitfield-Mask: 0x01) */ -#define SCU_TRAP_TRAPCLR_ECAT0RST_Pos (16UL) /*!< SCU_TRAP TRAPCLR: ECAT0RST (Bit 16) */ -#define SCU_TRAP_TRAPCLR_ECAT0RST_Msk (0x10000UL) /*!< SCU_TRAP TRAPCLR: ECAT0RST (Bitfield-Mask: 0x01) */ - -/* ------------------------------ SCU_TRAP_TRAPSET ------------------------------ */ -#define SCU_TRAP_TRAPSET_SOSCWDGT_Pos (0UL) /*!< SCU_TRAP TRAPSET: SOSCWDGT (Bit 0) */ -#define SCU_TRAP_TRAPSET_SOSCWDGT_Msk (0x1UL) /*!< SCU_TRAP TRAPSET: SOSCWDGT (Bitfield-Mask: 0x01) */ -#define SCU_TRAP_TRAPSET_SVCOLCKT_Pos (2UL) /*!< SCU_TRAP TRAPSET: SVCOLCKT (Bit 2) */ -#define SCU_TRAP_TRAPSET_SVCOLCKT_Msk (0x4UL) /*!< SCU_TRAP TRAPSET: SVCOLCKT (Bitfield-Mask: 0x01) */ -#define SCU_TRAP_TRAPSET_UVCOLCKT_Pos (3UL) /*!< SCU_TRAP TRAPSET: UVCOLCKT (Bit 3) */ -#define SCU_TRAP_TRAPSET_UVCOLCKT_Msk (0x8UL) /*!< SCU_TRAP TRAPSET: UVCOLCKT (Bitfield-Mask: 0x01) */ -#define SCU_TRAP_TRAPSET_PET_Pos (4UL) /*!< SCU_TRAP TRAPSET: PET (Bit 4) */ -#define SCU_TRAP_TRAPSET_PET_Msk (0x10UL) /*!< SCU_TRAP TRAPSET: PET (Bitfield-Mask: 0x01) */ -#define SCU_TRAP_TRAPSET_BRWNT_Pos (5UL) /*!< SCU_TRAP TRAPSET: BRWNT (Bit 5) */ -#define SCU_TRAP_TRAPSET_BRWNT_Msk (0x20UL) /*!< SCU_TRAP TRAPSET: BRWNT (Bitfield-Mask: 0x01) */ -#define SCU_TRAP_TRAPSET_ULPWDT_Pos (6UL) /*!< SCU_TRAP TRAPSET: ULPWDT (Bit 6) */ -#define SCU_TRAP_TRAPSET_ULPWDT_Msk (0x40UL) /*!< SCU_TRAP TRAPSET: ULPWDT (Bitfield-Mask: 0x01) */ -#define SCU_TRAP_TRAPSET_BWERR0T_Pos (7UL) /*!< SCU_TRAP TRAPSET: BWERR0T (Bit 7) */ -#define SCU_TRAP_TRAPSET_BWERR0T_Msk (0x80UL) /*!< SCU_TRAP TRAPSET: BWERR0T (Bitfield-Mask: 0x01) */ -#define SCU_TRAP_TRAPSET_BWERR1T_Pos (8UL) /*!< SCU_TRAP TRAPSET: BWERR1T (Bit 8) */ -#define SCU_TRAP_TRAPSET_BWERR1T_Msk (0x100UL) /*!< SCU_TRAP TRAPSET: BWERR1T (Bitfield-Mask: 0x01) */ -#define SCU_TRAP_TRAPSET_ECAT0RST_Pos (16UL) /*!< SCU_TRAP TRAPSET: ECAT0RST (Bit 16) */ -#define SCU_TRAP_TRAPSET_ECAT0RST_Msk (0x10000UL) /*!< SCU_TRAP TRAPSET: ECAT0RST (Bitfield-Mask: 0x01) */ - - -/* ================================================================================ */ -/* ================ struct 'SCU_HIBERNATE' Position & Mask ================ */ -/* ================================================================================ */ - - -/* ---------------------------- SCU_HIBERNATE_HDSTAT ---------------------------- */ -#define SCU_HIBERNATE_HDSTAT_EPEV_Pos (0UL) /*!< SCU_HIBERNATE HDSTAT: EPEV (Bit 0) */ -#define SCU_HIBERNATE_HDSTAT_EPEV_Msk (0x1UL) /*!< SCU_HIBERNATE HDSTAT: EPEV (Bitfield-Mask: 0x01) */ -#define SCU_HIBERNATE_HDSTAT_ENEV_Pos (1UL) /*!< SCU_HIBERNATE HDSTAT: ENEV (Bit 1) */ -#define SCU_HIBERNATE_HDSTAT_ENEV_Msk (0x2UL) /*!< SCU_HIBERNATE HDSTAT: ENEV (Bitfield-Mask: 0x01) */ -#define SCU_HIBERNATE_HDSTAT_RTCEV_Pos (2UL) /*!< SCU_HIBERNATE HDSTAT: RTCEV (Bit 2) */ -#define SCU_HIBERNATE_HDSTAT_RTCEV_Msk (0x4UL) /*!< SCU_HIBERNATE HDSTAT: RTCEV (Bitfield-Mask: 0x01) */ -#define SCU_HIBERNATE_HDSTAT_ULPWDG_Pos (3UL) /*!< SCU_HIBERNATE HDSTAT: ULPWDG (Bit 3) */ -#define SCU_HIBERNATE_HDSTAT_ULPWDG_Msk (0x8UL) /*!< SCU_HIBERNATE HDSTAT: ULPWDG (Bitfield-Mask: 0x01) */ -#define SCU_HIBERNATE_HDSTAT_HIBNOUT_Pos (4UL) /*!< SCU_HIBERNATE HDSTAT: HIBNOUT (Bit 4) */ -#define SCU_HIBERNATE_HDSTAT_HIBNOUT_Msk (0x10UL) /*!< SCU_HIBERNATE HDSTAT: HIBNOUT (Bitfield-Mask: 0x01) */ - -/* ----------------------------- SCU_HIBERNATE_HDCLR ---------------------------- */ -#define SCU_HIBERNATE_HDCLR_EPEV_Pos (0UL) /*!< SCU_HIBERNATE HDCLR: EPEV (Bit 0) */ -#define SCU_HIBERNATE_HDCLR_EPEV_Msk (0x1UL) /*!< SCU_HIBERNATE HDCLR: EPEV (Bitfield-Mask: 0x01) */ -#define SCU_HIBERNATE_HDCLR_ENEV_Pos (1UL) /*!< SCU_HIBERNATE HDCLR: ENEV (Bit 1) */ -#define SCU_HIBERNATE_HDCLR_ENEV_Msk (0x2UL) /*!< SCU_HIBERNATE HDCLR: ENEV (Bitfield-Mask: 0x01) */ -#define SCU_HIBERNATE_HDCLR_RTCEV_Pos (2UL) /*!< SCU_HIBERNATE HDCLR: RTCEV (Bit 2) */ -#define SCU_HIBERNATE_HDCLR_RTCEV_Msk (0x4UL) /*!< SCU_HIBERNATE HDCLR: RTCEV (Bitfield-Mask: 0x01) */ -#define SCU_HIBERNATE_HDCLR_ULPWDG_Pos (3UL) /*!< SCU_HIBERNATE HDCLR: ULPWDG (Bit 3) */ -#define SCU_HIBERNATE_HDCLR_ULPWDG_Msk (0x8UL) /*!< SCU_HIBERNATE HDCLR: ULPWDG (Bitfield-Mask: 0x01) */ - -/* ----------------------------- SCU_HIBERNATE_HDSET ---------------------------- */ -#define SCU_HIBERNATE_HDSET_EPEV_Pos (0UL) /*!< SCU_HIBERNATE HDSET: EPEV (Bit 0) */ -#define SCU_HIBERNATE_HDSET_EPEV_Msk (0x1UL) /*!< SCU_HIBERNATE HDSET: EPEV (Bitfield-Mask: 0x01) */ -#define SCU_HIBERNATE_HDSET_ENEV_Pos (1UL) /*!< SCU_HIBERNATE HDSET: ENEV (Bit 1) */ -#define SCU_HIBERNATE_HDSET_ENEV_Msk (0x2UL) /*!< SCU_HIBERNATE HDSET: ENEV (Bitfield-Mask: 0x01) */ -#define SCU_HIBERNATE_HDSET_RTCEV_Pos (2UL) /*!< SCU_HIBERNATE HDSET: RTCEV (Bit 2) */ -#define SCU_HIBERNATE_HDSET_RTCEV_Msk (0x4UL) /*!< SCU_HIBERNATE HDSET: RTCEV (Bitfield-Mask: 0x01) */ -#define SCU_HIBERNATE_HDSET_ULPWDG_Pos (3UL) /*!< SCU_HIBERNATE HDSET: ULPWDG (Bit 3) */ -#define SCU_HIBERNATE_HDSET_ULPWDG_Msk (0x8UL) /*!< SCU_HIBERNATE HDSET: ULPWDG (Bitfield-Mask: 0x01) */ - -/* ----------------------------- SCU_HIBERNATE_HDCR ----------------------------- */ -#define SCU_HIBERNATE_HDCR_WKPEP_Pos (0UL) /*!< SCU_HIBERNATE HDCR: WKPEP (Bit 0) */ -#define SCU_HIBERNATE_HDCR_WKPEP_Msk (0x1UL) /*!< SCU_HIBERNATE HDCR: WKPEP (Bitfield-Mask: 0x01) */ -#define SCU_HIBERNATE_HDCR_WKPEN_Pos (1UL) /*!< SCU_HIBERNATE HDCR: WKPEN (Bit 1) */ -#define SCU_HIBERNATE_HDCR_WKPEN_Msk (0x2UL) /*!< SCU_HIBERNATE HDCR: WKPEN (Bitfield-Mask: 0x01) */ -#define SCU_HIBERNATE_HDCR_RTCE_Pos (2UL) /*!< SCU_HIBERNATE HDCR: RTCE (Bit 2) */ -#define SCU_HIBERNATE_HDCR_RTCE_Msk (0x4UL) /*!< SCU_HIBERNATE HDCR: RTCE (Bitfield-Mask: 0x01) */ -#define SCU_HIBERNATE_HDCR_ULPWDGEN_Pos (3UL) /*!< SCU_HIBERNATE HDCR: ULPWDGEN (Bit 3) */ -#define SCU_HIBERNATE_HDCR_ULPWDGEN_Msk (0x8UL) /*!< SCU_HIBERNATE HDCR: ULPWDGEN (Bitfield-Mask: 0x01) */ -#define SCU_HIBERNATE_HDCR_HIB_Pos (4UL) /*!< SCU_HIBERNATE HDCR: HIB (Bit 4) */ -#define SCU_HIBERNATE_HDCR_HIB_Msk (0x10UL) /*!< SCU_HIBERNATE HDCR: HIB (Bitfield-Mask: 0x01) */ -#define SCU_HIBERNATE_HDCR_RCS_Pos (6UL) /*!< SCU_HIBERNATE HDCR: RCS (Bit 6) */ -#define SCU_HIBERNATE_HDCR_RCS_Msk (0x40UL) /*!< SCU_HIBERNATE HDCR: RCS (Bitfield-Mask: 0x01) */ -#define SCU_HIBERNATE_HDCR_STDBYSEL_Pos (7UL) /*!< SCU_HIBERNATE HDCR: STDBYSEL (Bit 7) */ -#define SCU_HIBERNATE_HDCR_STDBYSEL_Msk (0x80UL) /*!< SCU_HIBERNATE HDCR: STDBYSEL (Bitfield-Mask: 0x01) */ -#define SCU_HIBERNATE_HDCR_WKUPSEL_Pos (8UL) /*!< SCU_HIBERNATE HDCR: WKUPSEL (Bit 8) */ -#define SCU_HIBERNATE_HDCR_WKUPSEL_Msk (0x100UL) /*!< SCU_HIBERNATE HDCR: WKUPSEL (Bitfield-Mask: 0x01) */ -#define SCU_HIBERNATE_HDCR_GPI0SEL_Pos (10UL) /*!< SCU_HIBERNATE HDCR: GPI0SEL (Bit 10) */ -#define SCU_HIBERNATE_HDCR_GPI0SEL_Msk (0x400UL) /*!< SCU_HIBERNATE HDCR: GPI0SEL (Bitfield-Mask: 0x01) */ -#define SCU_HIBERNATE_HDCR_HIBIO0POL_Pos (12UL) /*!< SCU_HIBERNATE HDCR: HIBIO0POL (Bit 12) */ -#define SCU_HIBERNATE_HDCR_HIBIO0POL_Msk (0x1000UL) /*!< SCU_HIBERNATE HDCR: HIBIO0POL (Bitfield-Mask: 0x01) */ -#define SCU_HIBERNATE_HDCR_HIBIO1POL_Pos (13UL) /*!< SCU_HIBERNATE HDCR: HIBIO1POL (Bit 13) */ -#define SCU_HIBERNATE_HDCR_HIBIO1POL_Msk (0x2000UL) /*!< SCU_HIBERNATE HDCR: HIBIO1POL (Bitfield-Mask: 0x01) */ -#define SCU_HIBERNATE_HDCR_HIBIO0SEL_Pos (16UL) /*!< SCU_HIBERNATE HDCR: HIBIO0SEL (Bit 16) */ -#define SCU_HIBERNATE_HDCR_HIBIO0SEL_Msk (0xf0000UL) /*!< SCU_HIBERNATE HDCR: HIBIO0SEL (Bitfield-Mask: 0x0f) */ -#define SCU_HIBERNATE_HDCR_HIBIO1SEL_Pos (20UL) /*!< SCU_HIBERNATE HDCR: HIBIO1SEL (Bit 20) */ -#define SCU_HIBERNATE_HDCR_HIBIO1SEL_Msk (0xf00000UL) /*!< SCU_HIBERNATE HDCR: HIBIO1SEL (Bitfield-Mask: 0x0f) */ - -/* --------------------------- SCU_HIBERNATE_OSCSICTRL -------------------------- */ -#define SCU_HIBERNATE_OSCSICTRL_PWD_Pos (0UL) /*!< SCU_HIBERNATE OSCSICTRL: PWD (Bit 0) */ -#define SCU_HIBERNATE_OSCSICTRL_PWD_Msk (0x1UL) /*!< SCU_HIBERNATE OSCSICTRL: PWD (Bitfield-Mask: 0x01) */ - -/* --------------------------- SCU_HIBERNATE_OSCULSTAT -------------------------- */ -#define SCU_HIBERNATE_OSCULSTAT_X1D_Pos (0UL) /*!< SCU_HIBERNATE OSCULSTAT: X1D (Bit 0) */ -#define SCU_HIBERNATE_OSCULSTAT_X1D_Msk (0x1UL) /*!< SCU_HIBERNATE OSCULSTAT: X1D (Bitfield-Mask: 0x01) */ - -/* --------------------------- SCU_HIBERNATE_OSCULCTRL -------------------------- */ -#define SCU_HIBERNATE_OSCULCTRL_X1DEN_Pos (0UL) /*!< SCU_HIBERNATE OSCULCTRL: X1DEN (Bit 0) */ -#define SCU_HIBERNATE_OSCULCTRL_X1DEN_Msk (0x1UL) /*!< SCU_HIBERNATE OSCULCTRL: X1DEN (Bitfield-Mask: 0x01) */ -#define SCU_HIBERNATE_OSCULCTRL_MODE_Pos (4UL) /*!< SCU_HIBERNATE OSCULCTRL: MODE (Bit 4) */ -#define SCU_HIBERNATE_OSCULCTRL_MODE_Msk (0x30UL) /*!< SCU_HIBERNATE OSCULCTRL: MODE (Bitfield-Mask: 0x03) */ - - -/* ================================================================================ */ -/* ================ struct 'SCU_POWER' Position & Mask ================ */ -/* ================================================================================ */ - - -/* ------------------------------ SCU_POWER_PWRSTAT ----------------------------- */ -#define SCU_POWER_PWRSTAT_HIBEN_Pos (0UL) /*!< SCU_POWER PWRSTAT: HIBEN (Bit 0) */ -#define SCU_POWER_PWRSTAT_HIBEN_Msk (0x1UL) /*!< SCU_POWER PWRSTAT: HIBEN (Bitfield-Mask: 0x01) */ -#define SCU_POWER_PWRSTAT_USBPHYPDQ_Pos (16UL) /*!< SCU_POWER PWRSTAT: USBPHYPDQ (Bit 16) */ -#define SCU_POWER_PWRSTAT_USBPHYPDQ_Msk (0x10000UL) /*!< SCU_POWER PWRSTAT: USBPHYPDQ (Bitfield-Mask: 0x01) */ -#define SCU_POWER_PWRSTAT_USBOTGEN_Pos (17UL) /*!< SCU_POWER PWRSTAT: USBOTGEN (Bit 17) */ -#define SCU_POWER_PWRSTAT_USBOTGEN_Msk (0x20000UL) /*!< SCU_POWER PWRSTAT: USBOTGEN (Bitfield-Mask: 0x01) */ -#define SCU_POWER_PWRSTAT_USBPUWQ_Pos (18UL) /*!< SCU_POWER PWRSTAT: USBPUWQ (Bit 18) */ -#define SCU_POWER_PWRSTAT_USBPUWQ_Msk (0x40000UL) /*!< SCU_POWER PWRSTAT: USBPUWQ (Bitfield-Mask: 0x01) */ - -/* ------------------------------ SCU_POWER_PWRSET ------------------------------ */ -#define SCU_POWER_PWRSET_HIB_Pos (0UL) /*!< SCU_POWER PWRSET: HIB (Bit 0) */ -#define SCU_POWER_PWRSET_HIB_Msk (0x1UL) /*!< SCU_POWER PWRSET: HIB (Bitfield-Mask: 0x01) */ -#define SCU_POWER_PWRSET_USBPHYPDQ_Pos (16UL) /*!< SCU_POWER PWRSET: USBPHYPDQ (Bit 16) */ -#define SCU_POWER_PWRSET_USBPHYPDQ_Msk (0x10000UL) /*!< SCU_POWER PWRSET: USBPHYPDQ (Bitfield-Mask: 0x01) */ -#define SCU_POWER_PWRSET_USBOTGEN_Pos (17UL) /*!< SCU_POWER PWRSET: USBOTGEN (Bit 17) */ -#define SCU_POWER_PWRSET_USBOTGEN_Msk (0x20000UL) /*!< SCU_POWER PWRSET: USBOTGEN (Bitfield-Mask: 0x01) */ -#define SCU_POWER_PWRSET_USBPUWQ_Pos (18UL) /*!< SCU_POWER PWRSET: USBPUWQ (Bit 18) */ -#define SCU_POWER_PWRSET_USBPUWQ_Msk (0x40000UL) /*!< SCU_POWER PWRSET: USBPUWQ (Bitfield-Mask: 0x01) */ - -/* ------------------------------ SCU_POWER_PWRCLR ------------------------------ */ -#define SCU_POWER_PWRCLR_HIB_Pos (0UL) /*!< SCU_POWER PWRCLR: HIB (Bit 0) */ -#define SCU_POWER_PWRCLR_HIB_Msk (0x1UL) /*!< SCU_POWER PWRCLR: HIB (Bitfield-Mask: 0x01) */ -#define SCU_POWER_PWRCLR_USBPHYPDQ_Pos (16UL) /*!< SCU_POWER PWRCLR: USBPHYPDQ (Bit 16) */ -#define SCU_POWER_PWRCLR_USBPHYPDQ_Msk (0x10000UL) /*!< SCU_POWER PWRCLR: USBPHYPDQ (Bitfield-Mask: 0x01) */ -#define SCU_POWER_PWRCLR_USBOTGEN_Pos (17UL) /*!< SCU_POWER PWRCLR: USBOTGEN (Bit 17) */ -#define SCU_POWER_PWRCLR_USBOTGEN_Msk (0x20000UL) /*!< SCU_POWER PWRCLR: USBOTGEN (Bitfield-Mask: 0x01) */ -#define SCU_POWER_PWRCLR_USBPUWQ_Pos (18UL) /*!< SCU_POWER PWRCLR: USBPUWQ (Bit 18) */ -#define SCU_POWER_PWRCLR_USBPUWQ_Msk (0x40000UL) /*!< SCU_POWER PWRCLR: USBPUWQ (Bitfield-Mask: 0x01) */ - -/* ------------------------------ SCU_POWER_EVRSTAT ----------------------------- */ -#define SCU_POWER_EVRSTAT_OV13_Pos (1UL) /*!< SCU_POWER EVRSTAT: OV13 (Bit 1) */ -#define SCU_POWER_EVRSTAT_OV13_Msk (0x2UL) /*!< SCU_POWER EVRSTAT: OV13 (Bitfield-Mask: 0x01) */ - -/* ---------------------------- SCU_POWER_EVRVADCSTAT --------------------------- */ -#define SCU_POWER_EVRVADCSTAT_VADC13V_Pos (0UL) /*!< SCU_POWER EVRVADCSTAT: VADC13V (Bit 0) */ -#define SCU_POWER_EVRVADCSTAT_VADC13V_Msk (0xffUL) /*!< SCU_POWER EVRVADCSTAT: VADC13V (Bitfield-Mask: 0xff) */ -#define SCU_POWER_EVRVADCSTAT_VADC33V_Pos (8UL) /*!< SCU_POWER EVRVADCSTAT: VADC33V (Bit 8) */ -#define SCU_POWER_EVRVADCSTAT_VADC33V_Msk (0xff00UL) /*!< SCU_POWER EVRVADCSTAT: VADC33V (Bitfield-Mask: 0xff) */ - -/* ------------------------------ SCU_POWER_PWRMON ------------------------------ */ -#define SCU_POWER_PWRMON_THRS_Pos (0UL) /*!< SCU_POWER PWRMON: THRS (Bit 0) */ -#define SCU_POWER_PWRMON_THRS_Msk (0xffUL) /*!< SCU_POWER PWRMON: THRS (Bitfield-Mask: 0xff) */ -#define SCU_POWER_PWRMON_INTV_Pos (8UL) /*!< SCU_POWER PWRMON: INTV (Bit 8) */ -#define SCU_POWER_PWRMON_INTV_Msk (0xff00UL) /*!< SCU_POWER PWRMON: INTV (Bitfield-Mask: 0xff) */ -#define SCU_POWER_PWRMON_ENB_Pos (16UL) /*!< SCU_POWER PWRMON: ENB (Bit 16) */ -#define SCU_POWER_PWRMON_ENB_Msk (0x10000UL) /*!< SCU_POWER PWRMON: ENB (Bitfield-Mask: 0x01) */ - - -/* ================================================================================ */ -/* ================ struct 'SCU_RESET' Position & Mask ================ */ -/* ================================================================================ */ - - -/* ------------------------------ SCU_RESET_RSTSTAT ----------------------------- */ -#define SCU_RESET_RSTSTAT_RSTSTAT_Pos (0UL) /*!< SCU_RESET RSTSTAT: RSTSTAT (Bit 0) */ -#define SCU_RESET_RSTSTAT_RSTSTAT_Msk (0xffUL) /*!< SCU_RESET RSTSTAT: RSTSTAT (Bitfield-Mask: 0xff) */ -#define SCU_RESET_RSTSTAT_HIBWK_Pos (8UL) /*!< SCU_RESET RSTSTAT: HIBWK (Bit 8) */ -#define SCU_RESET_RSTSTAT_HIBWK_Msk (0x100UL) /*!< SCU_RESET RSTSTAT: HIBWK (Bitfield-Mask: 0x01) */ -#define SCU_RESET_RSTSTAT_HIBRS_Pos (9UL) /*!< SCU_RESET RSTSTAT: HIBRS (Bit 9) */ -#define SCU_RESET_RSTSTAT_HIBRS_Msk (0x200UL) /*!< SCU_RESET RSTSTAT: HIBRS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_RSTSTAT_LCKEN_Pos (10UL) /*!< SCU_RESET RSTSTAT: LCKEN (Bit 10) */ -#define SCU_RESET_RSTSTAT_LCKEN_Msk (0x400UL) /*!< SCU_RESET RSTSTAT: LCKEN (Bitfield-Mask: 0x01) */ -#define SCU_RESET_RSTSTAT_ECAT0RS_Pos (12UL) /*!< SCU_RESET RSTSTAT: ECAT0RS (Bit 12) */ -#define SCU_RESET_RSTSTAT_ECAT0RS_Msk (0x1000UL) /*!< SCU_RESET RSTSTAT: ECAT0RS (Bitfield-Mask: 0x01) */ - -/* ------------------------------ SCU_RESET_RSTSET ------------------------------ */ -#define SCU_RESET_RSTSET_HIBWK_Pos (8UL) /*!< SCU_RESET RSTSET: HIBWK (Bit 8) */ -#define SCU_RESET_RSTSET_HIBWK_Msk (0x100UL) /*!< SCU_RESET RSTSET: HIBWK (Bitfield-Mask: 0x01) */ -#define SCU_RESET_RSTSET_HIBRS_Pos (9UL) /*!< SCU_RESET RSTSET: HIBRS (Bit 9) */ -#define SCU_RESET_RSTSET_HIBRS_Msk (0x200UL) /*!< SCU_RESET RSTSET: HIBRS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_RSTSET_LCKEN_Pos (10UL) /*!< SCU_RESET RSTSET: LCKEN (Bit 10) */ -#define SCU_RESET_RSTSET_LCKEN_Msk (0x400UL) /*!< SCU_RESET RSTSET: LCKEN (Bitfield-Mask: 0x01) */ -#define SCU_RESET_RSTSET_ECAT0RS_Pos (12UL) /*!< SCU_RESET RSTSET: ECAT0RS (Bit 12) */ -#define SCU_RESET_RSTSET_ECAT0RS_Msk (0x1000UL) /*!< SCU_RESET RSTSET: ECAT0RS (Bitfield-Mask: 0x01) */ - -/* ------------------------------ SCU_RESET_RSTCLR ------------------------------ */ -#define SCU_RESET_RSTCLR_RSCLR_Pos (0UL) /*!< SCU_RESET RSTCLR: RSCLR (Bit 0) */ -#define SCU_RESET_RSTCLR_RSCLR_Msk (0x1UL) /*!< SCU_RESET RSTCLR: RSCLR (Bitfield-Mask: 0x01) */ -#define SCU_RESET_RSTCLR_HIBWK_Pos (8UL) /*!< SCU_RESET RSTCLR: HIBWK (Bit 8) */ -#define SCU_RESET_RSTCLR_HIBWK_Msk (0x100UL) /*!< SCU_RESET RSTCLR: HIBWK (Bitfield-Mask: 0x01) */ -#define SCU_RESET_RSTCLR_HIBRS_Pos (9UL) /*!< SCU_RESET RSTCLR: HIBRS (Bit 9) */ -#define SCU_RESET_RSTCLR_HIBRS_Msk (0x200UL) /*!< SCU_RESET RSTCLR: HIBRS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_RSTCLR_LCKEN_Pos (10UL) /*!< SCU_RESET RSTCLR: LCKEN (Bit 10) */ -#define SCU_RESET_RSTCLR_LCKEN_Msk (0x400UL) /*!< SCU_RESET RSTCLR: LCKEN (Bitfield-Mask: 0x01) */ -#define SCU_RESET_RSTCLR_ECAT0RS_Pos (12UL) /*!< SCU_RESET RSTCLR: ECAT0RS (Bit 12) */ -#define SCU_RESET_RSTCLR_ECAT0RS_Msk (0x1000UL) /*!< SCU_RESET RSTCLR: ECAT0RS (Bitfield-Mask: 0x01) */ - -/* ------------------------------ SCU_RESET_PRSTAT0 ----------------------------- */ -#define SCU_RESET_PRSTAT0_VADCRS_Pos (0UL) /*!< SCU_RESET PRSTAT0: VADCRS (Bit 0) */ -#define SCU_RESET_PRSTAT0_VADCRS_Msk (0x1UL) /*!< SCU_RESET PRSTAT0: VADCRS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_PRSTAT0_DSDRS_Pos (1UL) /*!< SCU_RESET PRSTAT0: DSDRS (Bit 1) */ -#define SCU_RESET_PRSTAT0_DSDRS_Msk (0x2UL) /*!< SCU_RESET PRSTAT0: DSDRS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_PRSTAT0_CCU40RS_Pos (2UL) /*!< SCU_RESET PRSTAT0: CCU40RS (Bit 2) */ -#define SCU_RESET_PRSTAT0_CCU40RS_Msk (0x4UL) /*!< SCU_RESET PRSTAT0: CCU40RS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_PRSTAT0_CCU41RS_Pos (3UL) /*!< SCU_RESET PRSTAT0: CCU41RS (Bit 3) */ -#define SCU_RESET_PRSTAT0_CCU41RS_Msk (0x8UL) /*!< SCU_RESET PRSTAT0: CCU41RS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_PRSTAT0_CCU42RS_Pos (4UL) /*!< SCU_RESET PRSTAT0: CCU42RS (Bit 4) */ -#define SCU_RESET_PRSTAT0_CCU42RS_Msk (0x10UL) /*!< SCU_RESET PRSTAT0: CCU42RS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_PRSTAT0_CCU80RS_Pos (7UL) /*!< SCU_RESET PRSTAT0: CCU80RS (Bit 7) */ -#define SCU_RESET_PRSTAT0_CCU80RS_Msk (0x80UL) /*!< SCU_RESET PRSTAT0: CCU80RS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_PRSTAT0_CCU81RS_Pos (8UL) /*!< SCU_RESET PRSTAT0: CCU81RS (Bit 8) */ -#define SCU_RESET_PRSTAT0_CCU81RS_Msk (0x100UL) /*!< SCU_RESET PRSTAT0: CCU81RS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_PRSTAT0_POSIF0RS_Pos (9UL) /*!< SCU_RESET PRSTAT0: POSIF0RS (Bit 9) */ -#define SCU_RESET_PRSTAT0_POSIF0RS_Msk (0x200UL) /*!< SCU_RESET PRSTAT0: POSIF0RS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_PRSTAT0_POSIF1RS_Pos (10UL) /*!< SCU_RESET PRSTAT0: POSIF1RS (Bit 10) */ -#define SCU_RESET_PRSTAT0_POSIF1RS_Msk (0x400UL) /*!< SCU_RESET PRSTAT0: POSIF1RS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_PRSTAT0_USIC0RS_Pos (11UL) /*!< SCU_RESET PRSTAT0: USIC0RS (Bit 11) */ -#define SCU_RESET_PRSTAT0_USIC0RS_Msk (0x800UL) /*!< SCU_RESET PRSTAT0: USIC0RS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_PRSTAT0_ERU1RS_Pos (16UL) /*!< SCU_RESET PRSTAT0: ERU1RS (Bit 16) */ -#define SCU_RESET_PRSTAT0_ERU1RS_Msk (0x10000UL) /*!< SCU_RESET PRSTAT0: ERU1RS (Bitfield-Mask: 0x01) */ - -/* ------------------------------ SCU_RESET_PRSET0 ------------------------------ */ -#define SCU_RESET_PRSET0_VADCRS_Pos (0UL) /*!< SCU_RESET PRSET0: VADCRS (Bit 0) */ -#define SCU_RESET_PRSET0_VADCRS_Msk (0x1UL) /*!< SCU_RESET PRSET0: VADCRS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_PRSET0_DSDRS_Pos (1UL) /*!< SCU_RESET PRSET0: DSDRS (Bit 1) */ -#define SCU_RESET_PRSET0_DSDRS_Msk (0x2UL) /*!< SCU_RESET PRSET0: DSDRS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_PRSET0_CCU40RS_Pos (2UL) /*!< SCU_RESET PRSET0: CCU40RS (Bit 2) */ -#define SCU_RESET_PRSET0_CCU40RS_Msk (0x4UL) /*!< SCU_RESET PRSET0: CCU40RS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_PRSET0_CCU41RS_Pos (3UL) /*!< SCU_RESET PRSET0: CCU41RS (Bit 3) */ -#define SCU_RESET_PRSET0_CCU41RS_Msk (0x8UL) /*!< SCU_RESET PRSET0: CCU41RS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_PRSET0_CCU42RS_Pos (4UL) /*!< SCU_RESET PRSET0: CCU42RS (Bit 4) */ -#define SCU_RESET_PRSET0_CCU42RS_Msk (0x10UL) /*!< SCU_RESET PRSET0: CCU42RS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_PRSET0_CCU80RS_Pos (7UL) /*!< SCU_RESET PRSET0: CCU80RS (Bit 7) */ -#define SCU_RESET_PRSET0_CCU80RS_Msk (0x80UL) /*!< SCU_RESET PRSET0: CCU80RS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_PRSET0_CCU81RS_Pos (8UL) /*!< SCU_RESET PRSET0: CCU81RS (Bit 8) */ -#define SCU_RESET_PRSET0_CCU81RS_Msk (0x100UL) /*!< SCU_RESET PRSET0: CCU81RS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_PRSET0_POSIF0RS_Pos (9UL) /*!< SCU_RESET PRSET0: POSIF0RS (Bit 9) */ -#define SCU_RESET_PRSET0_POSIF0RS_Msk (0x200UL) /*!< SCU_RESET PRSET0: POSIF0RS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_PRSET0_POSIF1RS_Pos (10UL) /*!< SCU_RESET PRSET0: POSIF1RS (Bit 10) */ -#define SCU_RESET_PRSET0_POSIF1RS_Msk (0x400UL) /*!< SCU_RESET PRSET0: POSIF1RS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_PRSET0_USIC0RS_Pos (11UL) /*!< SCU_RESET PRSET0: USIC0RS (Bit 11) */ -#define SCU_RESET_PRSET0_USIC0RS_Msk (0x800UL) /*!< SCU_RESET PRSET0: USIC0RS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_PRSET0_ERU1RS_Pos (16UL) /*!< SCU_RESET PRSET0: ERU1RS (Bit 16) */ -#define SCU_RESET_PRSET0_ERU1RS_Msk (0x10000UL) /*!< SCU_RESET PRSET0: ERU1RS (Bitfield-Mask: 0x01) */ - -/* ------------------------------ SCU_RESET_PRCLR0 ------------------------------ */ -#define SCU_RESET_PRCLR0_VADCRS_Pos (0UL) /*!< SCU_RESET PRCLR0: VADCRS (Bit 0) */ -#define SCU_RESET_PRCLR0_VADCRS_Msk (0x1UL) /*!< SCU_RESET PRCLR0: VADCRS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_PRCLR0_DSDRS_Pos (1UL) /*!< SCU_RESET PRCLR0: DSDRS (Bit 1) */ -#define SCU_RESET_PRCLR0_DSDRS_Msk (0x2UL) /*!< SCU_RESET PRCLR0: DSDRS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_PRCLR0_CCU40RS_Pos (2UL) /*!< SCU_RESET PRCLR0: CCU40RS (Bit 2) */ -#define SCU_RESET_PRCLR0_CCU40RS_Msk (0x4UL) /*!< SCU_RESET PRCLR0: CCU40RS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_PRCLR0_CCU41RS_Pos (3UL) /*!< SCU_RESET PRCLR0: CCU41RS (Bit 3) */ -#define SCU_RESET_PRCLR0_CCU41RS_Msk (0x8UL) /*!< SCU_RESET PRCLR0: CCU41RS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_PRCLR0_CCU42RS_Pos (4UL) /*!< SCU_RESET PRCLR0: CCU42RS (Bit 4) */ -#define SCU_RESET_PRCLR0_CCU42RS_Msk (0x10UL) /*!< SCU_RESET PRCLR0: CCU42RS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_PRCLR0_CCU80RS_Pos (7UL) /*!< SCU_RESET PRCLR0: CCU80RS (Bit 7) */ -#define SCU_RESET_PRCLR0_CCU80RS_Msk (0x80UL) /*!< SCU_RESET PRCLR0: CCU80RS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_PRCLR0_CCU81RS_Pos (8UL) /*!< SCU_RESET PRCLR0: CCU81RS (Bit 8) */ -#define SCU_RESET_PRCLR0_CCU81RS_Msk (0x100UL) /*!< SCU_RESET PRCLR0: CCU81RS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_PRCLR0_POSIF0RS_Pos (9UL) /*!< SCU_RESET PRCLR0: POSIF0RS (Bit 9) */ -#define SCU_RESET_PRCLR0_POSIF0RS_Msk (0x200UL) /*!< SCU_RESET PRCLR0: POSIF0RS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_PRCLR0_POSIF1RS_Pos (10UL) /*!< SCU_RESET PRCLR0: POSIF1RS (Bit 10) */ -#define SCU_RESET_PRCLR0_POSIF1RS_Msk (0x400UL) /*!< SCU_RESET PRCLR0: POSIF1RS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_PRCLR0_USIC0RS_Pos (11UL) /*!< SCU_RESET PRCLR0: USIC0RS (Bit 11) */ -#define SCU_RESET_PRCLR0_USIC0RS_Msk (0x800UL) /*!< SCU_RESET PRCLR0: USIC0RS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_PRCLR0_ERU1RS_Pos (16UL) /*!< SCU_RESET PRCLR0: ERU1RS (Bit 16) */ -#define SCU_RESET_PRCLR0_ERU1RS_Msk (0x10000UL) /*!< SCU_RESET PRCLR0: ERU1RS (Bitfield-Mask: 0x01) */ - -/* ------------------------------ SCU_RESET_PRSTAT1 ----------------------------- */ -#define SCU_RESET_PRSTAT1_CCU43RS_Pos (0UL) /*!< SCU_RESET PRSTAT1: CCU43RS (Bit 0) */ -#define SCU_RESET_PRSTAT1_CCU43RS_Msk (0x1UL) /*!< SCU_RESET PRSTAT1: CCU43RS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_PRSTAT1_LEDTSCU0RS_Pos (3UL) /*!< SCU_RESET PRSTAT1: LEDTSCU0RS (Bit 3) */ -#define SCU_RESET_PRSTAT1_LEDTSCU0RS_Msk (0x8UL) /*!< SCU_RESET PRSTAT1: LEDTSCU0RS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_PRSTAT1_MCAN0RS_Pos (4UL) /*!< SCU_RESET PRSTAT1: MCAN0RS (Bit 4) */ -#define SCU_RESET_PRSTAT1_MCAN0RS_Msk (0x10UL) /*!< SCU_RESET PRSTAT1: MCAN0RS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_PRSTAT1_DACRS_Pos (5UL) /*!< SCU_RESET PRSTAT1: DACRS (Bit 5) */ -#define SCU_RESET_PRSTAT1_DACRS_Msk (0x20UL) /*!< SCU_RESET PRSTAT1: DACRS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_PRSTAT1_MMCIRS_Pos (6UL) /*!< SCU_RESET PRSTAT1: MMCIRS (Bit 6) */ -#define SCU_RESET_PRSTAT1_MMCIRS_Msk (0x40UL) /*!< SCU_RESET PRSTAT1: MMCIRS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_PRSTAT1_USIC1RS_Pos (7UL) /*!< SCU_RESET PRSTAT1: USIC1RS (Bit 7) */ -#define SCU_RESET_PRSTAT1_USIC1RS_Msk (0x80UL) /*!< SCU_RESET PRSTAT1: USIC1RS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_PRSTAT1_USIC2RS_Pos (8UL) /*!< SCU_RESET PRSTAT1: USIC2RS (Bit 8) */ -#define SCU_RESET_PRSTAT1_USIC2RS_Msk (0x100UL) /*!< SCU_RESET PRSTAT1: USIC2RS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_PRSTAT1_PPORTSRS_Pos (9UL) /*!< SCU_RESET PRSTAT1: PPORTSRS (Bit 9) */ -#define SCU_RESET_PRSTAT1_PPORTSRS_Msk (0x200UL) /*!< SCU_RESET PRSTAT1: PPORTSRS (Bitfield-Mask: 0x01) */ - -/* ------------------------------ SCU_RESET_PRSET1 ------------------------------ */ -#define SCU_RESET_PRSET1_CCU43RS_Pos (0UL) /*!< SCU_RESET PRSET1: CCU43RS (Bit 0) */ -#define SCU_RESET_PRSET1_CCU43RS_Msk (0x1UL) /*!< SCU_RESET PRSET1: CCU43RS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_PRSET1_LEDTSCU0RS_Pos (3UL) /*!< SCU_RESET PRSET1: LEDTSCU0RS (Bit 3) */ -#define SCU_RESET_PRSET1_LEDTSCU0RS_Msk (0x8UL) /*!< SCU_RESET PRSET1: LEDTSCU0RS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_PRSET1_MCAN0RS_Pos (4UL) /*!< SCU_RESET PRSET1: MCAN0RS (Bit 4) */ -#define SCU_RESET_PRSET1_MCAN0RS_Msk (0x10UL) /*!< SCU_RESET PRSET1: MCAN0RS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_PRSET1_DACRS_Pos (5UL) /*!< SCU_RESET PRSET1: DACRS (Bit 5) */ -#define SCU_RESET_PRSET1_DACRS_Msk (0x20UL) /*!< SCU_RESET PRSET1: DACRS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_PRSET1_MMCIRS_Pos (6UL) /*!< SCU_RESET PRSET1: MMCIRS (Bit 6) */ -#define SCU_RESET_PRSET1_MMCIRS_Msk (0x40UL) /*!< SCU_RESET PRSET1: MMCIRS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_PRSET1_USIC1RS_Pos (7UL) /*!< SCU_RESET PRSET1: USIC1RS (Bit 7) */ -#define SCU_RESET_PRSET1_USIC1RS_Msk (0x80UL) /*!< SCU_RESET PRSET1: USIC1RS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_PRSET1_USIC2RS_Pos (8UL) /*!< SCU_RESET PRSET1: USIC2RS (Bit 8) */ -#define SCU_RESET_PRSET1_USIC2RS_Msk (0x100UL) /*!< SCU_RESET PRSET1: USIC2RS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_PRSET1_PPORTSRS_Pos (9UL) /*!< SCU_RESET PRSET1: PPORTSRS (Bit 9) */ -#define SCU_RESET_PRSET1_PPORTSRS_Msk (0x200UL) /*!< SCU_RESET PRSET1: PPORTSRS (Bitfield-Mask: 0x01) */ - -/* ------------------------------ SCU_RESET_PRCLR1 ------------------------------ */ -#define SCU_RESET_PRCLR1_CCU43RS_Pos (0UL) /*!< SCU_RESET PRCLR1: CCU43RS (Bit 0) */ -#define SCU_RESET_PRCLR1_CCU43RS_Msk (0x1UL) /*!< SCU_RESET PRCLR1: CCU43RS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_PRCLR1_LEDTSCU0RS_Pos (3UL) /*!< SCU_RESET PRCLR1: LEDTSCU0RS (Bit 3) */ -#define SCU_RESET_PRCLR1_LEDTSCU0RS_Msk (0x8UL) /*!< SCU_RESET PRCLR1: LEDTSCU0RS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_PRCLR1_MCAN0RS_Pos (4UL) /*!< SCU_RESET PRCLR1: MCAN0RS (Bit 4) */ -#define SCU_RESET_PRCLR1_MCAN0RS_Msk (0x10UL) /*!< SCU_RESET PRCLR1: MCAN0RS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_PRCLR1_DACRS_Pos (5UL) /*!< SCU_RESET PRCLR1: DACRS (Bit 5) */ -#define SCU_RESET_PRCLR1_DACRS_Msk (0x20UL) /*!< SCU_RESET PRCLR1: DACRS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_PRCLR1_MMCIRS_Pos (6UL) /*!< SCU_RESET PRCLR1: MMCIRS (Bit 6) */ -#define SCU_RESET_PRCLR1_MMCIRS_Msk (0x40UL) /*!< SCU_RESET PRCLR1: MMCIRS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_PRCLR1_USIC1RS_Pos (7UL) /*!< SCU_RESET PRCLR1: USIC1RS (Bit 7) */ -#define SCU_RESET_PRCLR1_USIC1RS_Msk (0x80UL) /*!< SCU_RESET PRCLR1: USIC1RS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_PRCLR1_USIC2RS_Pos (8UL) /*!< SCU_RESET PRCLR1: USIC2RS (Bit 8) */ -#define SCU_RESET_PRCLR1_USIC2RS_Msk (0x100UL) /*!< SCU_RESET PRCLR1: USIC2RS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_PRCLR1_PPORTSRS_Pos (9UL) /*!< SCU_RESET PRCLR1: PPORTSRS (Bit 9) */ -#define SCU_RESET_PRCLR1_PPORTSRS_Msk (0x200UL) /*!< SCU_RESET PRCLR1: PPORTSRS (Bitfield-Mask: 0x01) */ - -/* ------------------------------ SCU_RESET_PRSTAT2 ----------------------------- */ -#define SCU_RESET_PRSTAT2_WDTRS_Pos (1UL) /*!< SCU_RESET PRSTAT2: WDTRS (Bit 1) */ -#define SCU_RESET_PRSTAT2_WDTRS_Msk (0x2UL) /*!< SCU_RESET PRSTAT2: WDTRS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_PRSTAT2_ETH0RS_Pos (2UL) /*!< SCU_RESET PRSTAT2: ETH0RS (Bit 2) */ -#define SCU_RESET_PRSTAT2_ETH0RS_Msk (0x4UL) /*!< SCU_RESET PRSTAT2: ETH0RS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_PRSTAT2_DMA0RS_Pos (4UL) /*!< SCU_RESET PRSTAT2: DMA0RS (Bit 4) */ -#define SCU_RESET_PRSTAT2_DMA0RS_Msk (0x10UL) /*!< SCU_RESET PRSTAT2: DMA0RS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_PRSTAT2_DMA1RS_Pos (5UL) /*!< SCU_RESET PRSTAT2: DMA1RS (Bit 5) */ -#define SCU_RESET_PRSTAT2_DMA1RS_Msk (0x20UL) /*!< SCU_RESET PRSTAT2: DMA1RS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_PRSTAT2_FCERS_Pos (6UL) /*!< SCU_RESET PRSTAT2: FCERS (Bit 6) */ -#define SCU_RESET_PRSTAT2_FCERS_Msk (0x40UL) /*!< SCU_RESET PRSTAT2: FCERS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_PRSTAT2_USBRS_Pos (7UL) /*!< SCU_RESET PRSTAT2: USBRS (Bit 7) */ -#define SCU_RESET_PRSTAT2_USBRS_Msk (0x80UL) /*!< SCU_RESET PRSTAT2: USBRS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_PRSTAT2_ECAT0RS_Pos (10UL) /*!< SCU_RESET PRSTAT2: ECAT0RS (Bit 10) */ -#define SCU_RESET_PRSTAT2_ECAT0RS_Msk (0x400UL) /*!< SCU_RESET PRSTAT2: ECAT0RS (Bitfield-Mask: 0x01) */ - -/* ------------------------------ SCU_RESET_PRSET2 ------------------------------ */ -#define SCU_RESET_PRSET2_WDTRS_Pos (1UL) /*!< SCU_RESET PRSET2: WDTRS (Bit 1) */ -#define SCU_RESET_PRSET2_WDTRS_Msk (0x2UL) /*!< SCU_RESET PRSET2: WDTRS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_PRSET2_ETH0RS_Pos (2UL) /*!< SCU_RESET PRSET2: ETH0RS (Bit 2) */ -#define SCU_RESET_PRSET2_ETH0RS_Msk (0x4UL) /*!< SCU_RESET PRSET2: ETH0RS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_PRSET2_DMA0RS_Pos (4UL) /*!< SCU_RESET PRSET2: DMA0RS (Bit 4) */ -#define SCU_RESET_PRSET2_DMA0RS_Msk (0x10UL) /*!< SCU_RESET PRSET2: DMA0RS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_PRSET2_DMA1RS_Pos (5UL) /*!< SCU_RESET PRSET2: DMA1RS (Bit 5) */ -#define SCU_RESET_PRSET2_DMA1RS_Msk (0x20UL) /*!< SCU_RESET PRSET2: DMA1RS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_PRSET2_FCERS_Pos (6UL) /*!< SCU_RESET PRSET2: FCERS (Bit 6) */ -#define SCU_RESET_PRSET2_FCERS_Msk (0x40UL) /*!< SCU_RESET PRSET2: FCERS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_PRSET2_USBRS_Pos (7UL) /*!< SCU_RESET PRSET2: USBRS (Bit 7) */ -#define SCU_RESET_PRSET2_USBRS_Msk (0x80UL) /*!< SCU_RESET PRSET2: USBRS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_PRSET2_ECAT0RS_Pos (10UL) /*!< SCU_RESET PRSET2: ECAT0RS (Bit 10) */ -#define SCU_RESET_PRSET2_ECAT0RS_Msk (0x400UL) /*!< SCU_RESET PRSET2: ECAT0RS (Bitfield-Mask: 0x01) */ - -/* ------------------------------ SCU_RESET_PRCLR2 ------------------------------ */ -#define SCU_RESET_PRCLR2_WDTRS_Pos (1UL) /*!< SCU_RESET PRCLR2: WDTRS (Bit 1) */ -#define SCU_RESET_PRCLR2_WDTRS_Msk (0x2UL) /*!< SCU_RESET PRCLR2: WDTRS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_PRCLR2_ETH0RS_Pos (2UL) /*!< SCU_RESET PRCLR2: ETH0RS (Bit 2) */ -#define SCU_RESET_PRCLR2_ETH0RS_Msk (0x4UL) /*!< SCU_RESET PRCLR2: ETH0RS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_PRCLR2_DMA0RS_Pos (4UL) /*!< SCU_RESET PRCLR2: DMA0RS (Bit 4) */ -#define SCU_RESET_PRCLR2_DMA0RS_Msk (0x10UL) /*!< SCU_RESET PRCLR2: DMA0RS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_PRCLR2_DMA1RS_Pos (5UL) /*!< SCU_RESET PRCLR2: DMA1RS (Bit 5) */ -#define SCU_RESET_PRCLR2_DMA1RS_Msk (0x20UL) /*!< SCU_RESET PRCLR2: DMA1RS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_PRCLR2_FCERS_Pos (6UL) /*!< SCU_RESET PRCLR2: FCERS (Bit 6) */ -#define SCU_RESET_PRCLR2_FCERS_Msk (0x40UL) /*!< SCU_RESET PRCLR2: FCERS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_PRCLR2_USBRS_Pos (7UL) /*!< SCU_RESET PRCLR2: USBRS (Bit 7) */ -#define SCU_RESET_PRCLR2_USBRS_Msk (0x80UL) /*!< SCU_RESET PRCLR2: USBRS (Bitfield-Mask: 0x01) */ -#define SCU_RESET_PRCLR2_ECAT0RS_Pos (10UL) /*!< SCU_RESET PRCLR2: ECAT0RS (Bit 10) */ -#define SCU_RESET_PRCLR2_ECAT0RS_Msk (0x400UL) /*!< SCU_RESET PRCLR2: ECAT0RS (Bitfield-Mask: 0x01) */ - -/* ------------------------------ SCU_RESET_PRSTAT3 ----------------------------- */ -#define SCU_RESET_PRSTAT3_EBURS_Pos (2UL) /*!< SCU_RESET PRSTAT3: EBURS (Bit 2) */ -#define SCU_RESET_PRSTAT3_EBURS_Msk (0x4UL) /*!< SCU_RESET PRSTAT3: EBURS (Bitfield-Mask: 0x01) */ - -/* ------------------------------ SCU_RESET_PRSET3 ------------------------------ */ -#define SCU_RESET_PRSET3_EBURS_Pos (2UL) /*!< SCU_RESET PRSET3: EBURS (Bit 2) */ -#define SCU_RESET_PRSET3_EBURS_Msk (0x4UL) /*!< SCU_RESET PRSET3: EBURS (Bitfield-Mask: 0x01) */ - -/* ------------------------------ SCU_RESET_PRCLR3 ------------------------------ */ -#define SCU_RESET_PRCLR3_EBURS_Pos (2UL) /*!< SCU_RESET PRCLR3: EBURS (Bit 2) */ -#define SCU_RESET_PRCLR3_EBURS_Msk (0x4UL) /*!< SCU_RESET PRCLR3: EBURS (Bitfield-Mask: 0x01) */ - - -/* ================================================================================ */ -/* ================ Group 'LEDTS' Position & Mask ================ */ -/* ================================================================================ */ - - -/* ---------------------------------- LEDTS_ID ---------------------------------- */ -#define LEDTS_ID_MOD_REV_Pos (0UL) /*!< LEDTS ID: MOD_REV (Bit 0) */ -#define LEDTS_ID_MOD_REV_Msk (0xffUL) /*!< LEDTS ID: MOD_REV (Bitfield-Mask: 0xff) */ -#define LEDTS_ID_MOD_TYPE_Pos (8UL) /*!< LEDTS ID: MOD_TYPE (Bit 8) */ -#define LEDTS_ID_MOD_TYPE_Msk (0xff00UL) /*!< LEDTS ID: MOD_TYPE (Bitfield-Mask: 0xff) */ -#define LEDTS_ID_MOD_NUMBER_Pos (16UL) /*!< LEDTS ID: MOD_NUMBER (Bit 16) */ -#define LEDTS_ID_MOD_NUMBER_Msk (0xffff0000UL) /*!< LEDTS ID: MOD_NUMBER (Bitfield-Mask: 0xffff) */ - -/* -------------------------------- LEDTS_GLOBCTL ------------------------------- */ -#define LEDTS_GLOBCTL_TS_EN_Pos (0UL) /*!< LEDTS GLOBCTL: TS_EN (Bit 0) */ -#define LEDTS_GLOBCTL_TS_EN_Msk (0x1UL) /*!< LEDTS GLOBCTL: TS_EN (Bitfield-Mask: 0x01) */ -#define LEDTS_GLOBCTL_LD_EN_Pos (1UL) /*!< LEDTS GLOBCTL: LD_EN (Bit 1) */ -#define LEDTS_GLOBCTL_LD_EN_Msk (0x2UL) /*!< LEDTS GLOBCTL: LD_EN (Bitfield-Mask: 0x01) */ -#define LEDTS_GLOBCTL_CMTR_Pos (2UL) /*!< LEDTS GLOBCTL: CMTR (Bit 2) */ -#define LEDTS_GLOBCTL_CMTR_Msk (0x4UL) /*!< LEDTS GLOBCTL: CMTR (Bitfield-Mask: 0x01) */ -#define LEDTS_GLOBCTL_ENSYNC_Pos (3UL) /*!< LEDTS GLOBCTL: ENSYNC (Bit 3) */ -#define LEDTS_GLOBCTL_ENSYNC_Msk (0x8UL) /*!< LEDTS GLOBCTL: ENSYNC (Bitfield-Mask: 0x01) */ -#define LEDTS_GLOBCTL_SUSCFG_Pos (8UL) /*!< LEDTS GLOBCTL: SUSCFG (Bit 8) */ -#define LEDTS_GLOBCTL_SUSCFG_Msk (0x100UL) /*!< LEDTS GLOBCTL: SUSCFG (Bitfield-Mask: 0x01) */ -#define LEDTS_GLOBCTL_MASKVAL_Pos (9UL) /*!< LEDTS GLOBCTL: MASKVAL (Bit 9) */ -#define LEDTS_GLOBCTL_MASKVAL_Msk (0xe00UL) /*!< LEDTS GLOBCTL: MASKVAL (Bitfield-Mask: 0x07) */ -#define LEDTS_GLOBCTL_FENVAL_Pos (12UL) /*!< LEDTS GLOBCTL: FENVAL (Bit 12) */ -#define LEDTS_GLOBCTL_FENVAL_Msk (0x1000UL) /*!< LEDTS GLOBCTL: FENVAL (Bitfield-Mask: 0x01) */ -#define LEDTS_GLOBCTL_ITS_EN_Pos (13UL) /*!< LEDTS GLOBCTL: ITS_EN (Bit 13) */ -#define LEDTS_GLOBCTL_ITS_EN_Msk (0x2000UL) /*!< LEDTS GLOBCTL: ITS_EN (Bitfield-Mask: 0x01) */ -#define LEDTS_GLOBCTL_ITF_EN_Pos (14UL) /*!< LEDTS GLOBCTL: ITF_EN (Bit 14) */ -#define LEDTS_GLOBCTL_ITF_EN_Msk (0x4000UL) /*!< LEDTS GLOBCTL: ITF_EN (Bitfield-Mask: 0x01) */ -#define LEDTS_GLOBCTL_ITP_EN_Pos (15UL) /*!< LEDTS GLOBCTL: ITP_EN (Bit 15) */ -#define LEDTS_GLOBCTL_ITP_EN_Msk (0x8000UL) /*!< LEDTS GLOBCTL: ITP_EN (Bitfield-Mask: 0x01) */ -#define LEDTS_GLOBCTL_CLK_PS_Pos (16UL) /*!< LEDTS GLOBCTL: CLK_PS (Bit 16) */ -#define LEDTS_GLOBCTL_CLK_PS_Msk (0xffff0000UL) /*!< LEDTS GLOBCTL: CLK_PS (Bitfield-Mask: 0xffff) */ - -/* --------------------------------- LEDTS_FNCTL -------------------------------- */ -#define LEDTS_FNCTL_PADT_Pos (0UL) /*!< LEDTS FNCTL: PADT (Bit 0) */ -#define LEDTS_FNCTL_PADT_Msk (0x7UL) /*!< LEDTS FNCTL: PADT (Bitfield-Mask: 0x07) */ -#define LEDTS_FNCTL_PADTSW_Pos (3UL) /*!< LEDTS FNCTL: PADTSW (Bit 3) */ -#define LEDTS_FNCTL_PADTSW_Msk (0x8UL) /*!< LEDTS FNCTL: PADTSW (Bitfield-Mask: 0x01) */ -#define LEDTS_FNCTL_EPULL_Pos (4UL) /*!< LEDTS FNCTL: EPULL (Bit 4) */ -#define LEDTS_FNCTL_EPULL_Msk (0x10UL) /*!< LEDTS FNCTL: EPULL (Bitfield-Mask: 0x01) */ -#define LEDTS_FNCTL_FNCOL_Pos (5UL) /*!< LEDTS FNCTL: FNCOL (Bit 5) */ -#define LEDTS_FNCTL_FNCOL_Msk (0xe0UL) /*!< LEDTS FNCTL: FNCOL (Bitfield-Mask: 0x07) */ -#define LEDTS_FNCTL_ACCCNT_Pos (16UL) /*!< LEDTS FNCTL: ACCCNT (Bit 16) */ -#define LEDTS_FNCTL_ACCCNT_Msk (0xf0000UL) /*!< LEDTS FNCTL: ACCCNT (Bitfield-Mask: 0x0f) */ -#define LEDTS_FNCTL_TSCCMP_Pos (20UL) /*!< LEDTS FNCTL: TSCCMP (Bit 20) */ -#define LEDTS_FNCTL_TSCCMP_Msk (0x100000UL) /*!< LEDTS FNCTL: TSCCMP (Bitfield-Mask: 0x01) */ -#define LEDTS_FNCTL_TSOEXT_Pos (21UL) /*!< LEDTS FNCTL: TSOEXT (Bit 21) */ -#define LEDTS_FNCTL_TSOEXT_Msk (0x600000UL) /*!< LEDTS FNCTL: TSOEXT (Bitfield-Mask: 0x03) */ -#define LEDTS_FNCTL_TSCTRR_Pos (23UL) /*!< LEDTS FNCTL: TSCTRR (Bit 23) */ -#define LEDTS_FNCTL_TSCTRR_Msk (0x800000UL) /*!< LEDTS FNCTL: TSCTRR (Bitfield-Mask: 0x01) */ -#define LEDTS_FNCTL_TSCTRSAT_Pos (24UL) /*!< LEDTS FNCTL: TSCTRSAT (Bit 24) */ -#define LEDTS_FNCTL_TSCTRSAT_Msk (0x1000000UL) /*!< LEDTS FNCTL: TSCTRSAT (Bitfield-Mask: 0x01) */ -#define LEDTS_FNCTL_NR_TSIN_Pos (25UL) /*!< LEDTS FNCTL: NR_TSIN (Bit 25) */ -#define LEDTS_FNCTL_NR_TSIN_Msk (0xe000000UL) /*!< LEDTS FNCTL: NR_TSIN (Bitfield-Mask: 0x07) */ -#define LEDTS_FNCTL_COLLEV_Pos (28UL) /*!< LEDTS FNCTL: COLLEV (Bit 28) */ -#define LEDTS_FNCTL_COLLEV_Msk (0x10000000UL) /*!< LEDTS FNCTL: COLLEV (Bitfield-Mask: 0x01) */ -#define LEDTS_FNCTL_NR_LEDCOL_Pos (29UL) /*!< LEDTS FNCTL: NR_LEDCOL (Bit 29) */ -#define LEDTS_FNCTL_NR_LEDCOL_Msk (0xe0000000UL) /*!< LEDTS FNCTL: NR_LEDCOL (Bitfield-Mask: 0x07) */ - -/* --------------------------------- LEDTS_EVFR --------------------------------- */ -#define LEDTS_EVFR_TSF_Pos (0UL) /*!< LEDTS EVFR: TSF (Bit 0) */ -#define LEDTS_EVFR_TSF_Msk (0x1UL) /*!< LEDTS EVFR: TSF (Bitfield-Mask: 0x01) */ -#define LEDTS_EVFR_TFF_Pos (1UL) /*!< LEDTS EVFR: TFF (Bit 1) */ -#define LEDTS_EVFR_TFF_Msk (0x2UL) /*!< LEDTS EVFR: TFF (Bitfield-Mask: 0x01) */ -#define LEDTS_EVFR_TPF_Pos (2UL) /*!< LEDTS EVFR: TPF (Bit 2) */ -#define LEDTS_EVFR_TPF_Msk (0x4UL) /*!< LEDTS EVFR: TPF (Bitfield-Mask: 0x01) */ -#define LEDTS_EVFR_TSCTROVF_Pos (3UL) /*!< LEDTS EVFR: TSCTROVF (Bit 3) */ -#define LEDTS_EVFR_TSCTROVF_Msk (0x8UL) /*!< LEDTS EVFR: TSCTROVF (Bitfield-Mask: 0x01) */ -#define LEDTS_EVFR_CTSF_Pos (16UL) /*!< LEDTS EVFR: CTSF (Bit 16) */ -#define LEDTS_EVFR_CTSF_Msk (0x10000UL) /*!< LEDTS EVFR: CTSF (Bitfield-Mask: 0x01) */ -#define LEDTS_EVFR_CTFF_Pos (17UL) /*!< LEDTS EVFR: CTFF (Bit 17) */ -#define LEDTS_EVFR_CTFF_Msk (0x20000UL) /*!< LEDTS EVFR: CTFF (Bitfield-Mask: 0x01) */ -#define LEDTS_EVFR_CTPF_Pos (18UL) /*!< LEDTS EVFR: CTPF (Bit 18) */ -#define LEDTS_EVFR_CTPF_Msk (0x40000UL) /*!< LEDTS EVFR: CTPF (Bitfield-Mask: 0x01) */ - -/* --------------------------------- LEDTS_TSVAL -------------------------------- */ -#define LEDTS_TSVAL_TSCTRVALR_Pos (0UL) /*!< LEDTS TSVAL: TSCTRVALR (Bit 0) */ -#define LEDTS_TSVAL_TSCTRVALR_Msk (0xffffUL) /*!< LEDTS TSVAL: TSCTRVALR (Bitfield-Mask: 0xffff) */ -#define LEDTS_TSVAL_TSCTRVAL_Pos (16UL) /*!< LEDTS TSVAL: TSCTRVAL (Bit 16) */ -#define LEDTS_TSVAL_TSCTRVAL_Msk (0xffff0000UL) /*!< LEDTS TSVAL: TSCTRVAL (Bitfield-Mask: 0xffff) */ - -/* --------------------------------- LEDTS_LINE0 -------------------------------- */ -#define LEDTS_LINE0_LINE_0_Pos (0UL) /*!< LEDTS LINE0: LINE_0 (Bit 0) */ -#define LEDTS_LINE0_LINE_0_Msk (0xffUL) /*!< LEDTS LINE0: LINE_0 (Bitfield-Mask: 0xff) */ -#define LEDTS_LINE0_LINE_1_Pos (8UL) /*!< LEDTS LINE0: LINE_1 (Bit 8) */ -#define LEDTS_LINE0_LINE_1_Msk (0xff00UL) /*!< LEDTS LINE0: LINE_1 (Bitfield-Mask: 0xff) */ -#define LEDTS_LINE0_LINE_2_Pos (16UL) /*!< LEDTS LINE0: LINE_2 (Bit 16) */ -#define LEDTS_LINE0_LINE_2_Msk (0xff0000UL) /*!< LEDTS LINE0: LINE_2 (Bitfield-Mask: 0xff) */ -#define LEDTS_LINE0_LINE_3_Pos (24UL) /*!< LEDTS LINE0: LINE_3 (Bit 24) */ -#define LEDTS_LINE0_LINE_3_Msk (0xff000000UL) /*!< LEDTS LINE0: LINE_3 (Bitfield-Mask: 0xff) */ - -/* --------------------------------- LEDTS_LINE1 -------------------------------- */ -#define LEDTS_LINE1_LINE_4_Pos (0UL) /*!< LEDTS LINE1: LINE_4 (Bit 0) */ -#define LEDTS_LINE1_LINE_4_Msk (0xffUL) /*!< LEDTS LINE1: LINE_4 (Bitfield-Mask: 0xff) */ -#define LEDTS_LINE1_LINE_5_Pos (8UL) /*!< LEDTS LINE1: LINE_5 (Bit 8) */ -#define LEDTS_LINE1_LINE_5_Msk (0xff00UL) /*!< LEDTS LINE1: LINE_5 (Bitfield-Mask: 0xff) */ -#define LEDTS_LINE1_LINE_6_Pos (16UL) /*!< LEDTS LINE1: LINE_6 (Bit 16) */ -#define LEDTS_LINE1_LINE_6_Msk (0xff0000UL) /*!< LEDTS LINE1: LINE_6 (Bitfield-Mask: 0xff) */ -#define LEDTS_LINE1_LINE_A_Pos (24UL) /*!< LEDTS LINE1: LINE_A (Bit 24) */ -#define LEDTS_LINE1_LINE_A_Msk (0xff000000UL) /*!< LEDTS LINE1: LINE_A (Bitfield-Mask: 0xff) */ - -/* -------------------------------- LEDTS_LDCMP0 -------------------------------- */ -#define LEDTS_LDCMP0_CMP_LD0_Pos (0UL) /*!< LEDTS LDCMP0: CMP_LD0 (Bit 0) */ -#define LEDTS_LDCMP0_CMP_LD0_Msk (0xffUL) /*!< LEDTS LDCMP0: CMP_LD0 (Bitfield-Mask: 0xff) */ -#define LEDTS_LDCMP0_CMP_LD1_Pos (8UL) /*!< LEDTS LDCMP0: CMP_LD1 (Bit 8) */ -#define LEDTS_LDCMP0_CMP_LD1_Msk (0xff00UL) /*!< LEDTS LDCMP0: CMP_LD1 (Bitfield-Mask: 0xff) */ -#define LEDTS_LDCMP0_CMP_LD2_Pos (16UL) /*!< LEDTS LDCMP0: CMP_LD2 (Bit 16) */ -#define LEDTS_LDCMP0_CMP_LD2_Msk (0xff0000UL) /*!< LEDTS LDCMP0: CMP_LD2 (Bitfield-Mask: 0xff) */ -#define LEDTS_LDCMP0_CMP_LD3_Pos (24UL) /*!< LEDTS LDCMP0: CMP_LD3 (Bit 24) */ -#define LEDTS_LDCMP0_CMP_LD3_Msk (0xff000000UL) /*!< LEDTS LDCMP0: CMP_LD3 (Bitfield-Mask: 0xff) */ - -/* -------------------------------- LEDTS_LDCMP1 -------------------------------- */ -#define LEDTS_LDCMP1_CMP_LD4_Pos (0UL) /*!< LEDTS LDCMP1: CMP_LD4 (Bit 0) */ -#define LEDTS_LDCMP1_CMP_LD4_Msk (0xffUL) /*!< LEDTS LDCMP1: CMP_LD4 (Bitfield-Mask: 0xff) */ -#define LEDTS_LDCMP1_CMP_LD5_Pos (8UL) /*!< LEDTS LDCMP1: CMP_LD5 (Bit 8) */ -#define LEDTS_LDCMP1_CMP_LD5_Msk (0xff00UL) /*!< LEDTS LDCMP1: CMP_LD5 (Bitfield-Mask: 0xff) */ -#define LEDTS_LDCMP1_CMP_LD6_Pos (16UL) /*!< LEDTS LDCMP1: CMP_LD6 (Bit 16) */ -#define LEDTS_LDCMP1_CMP_LD6_Msk (0xff0000UL) /*!< LEDTS LDCMP1: CMP_LD6 (Bitfield-Mask: 0xff) */ -#define LEDTS_LDCMP1_CMP_LDA_TSCOM_Pos (24UL) /*!< LEDTS LDCMP1: CMP_LDA_TSCOM (Bit 24) */ -#define LEDTS_LDCMP1_CMP_LDA_TSCOM_Msk (0xff000000UL) /*!< LEDTS LDCMP1: CMP_LDA_TSCOM (Bitfield-Mask: 0xff) */ - -/* -------------------------------- LEDTS_TSCMP0 -------------------------------- */ -#define LEDTS_TSCMP0_CMP_TS0_Pos (0UL) /*!< LEDTS TSCMP0: CMP_TS0 (Bit 0) */ -#define LEDTS_TSCMP0_CMP_TS0_Msk (0xffUL) /*!< LEDTS TSCMP0: CMP_TS0 (Bitfield-Mask: 0xff) */ -#define LEDTS_TSCMP0_CMP_TS1_Pos (8UL) /*!< LEDTS TSCMP0: CMP_TS1 (Bit 8) */ -#define LEDTS_TSCMP0_CMP_TS1_Msk (0xff00UL) /*!< LEDTS TSCMP0: CMP_TS1 (Bitfield-Mask: 0xff) */ -#define LEDTS_TSCMP0_CMP_TS2_Pos (16UL) /*!< LEDTS TSCMP0: CMP_TS2 (Bit 16) */ -#define LEDTS_TSCMP0_CMP_TS2_Msk (0xff0000UL) /*!< LEDTS TSCMP0: CMP_TS2 (Bitfield-Mask: 0xff) */ -#define LEDTS_TSCMP0_CMP_TS3_Pos (24UL) /*!< LEDTS TSCMP0: CMP_TS3 (Bit 24) */ -#define LEDTS_TSCMP0_CMP_TS3_Msk (0xff000000UL) /*!< LEDTS TSCMP0: CMP_TS3 (Bitfield-Mask: 0xff) */ - -/* -------------------------------- LEDTS_TSCMP1 -------------------------------- */ -#define LEDTS_TSCMP1_CMP_TS4_Pos (0UL) /*!< LEDTS TSCMP1: CMP_TS4 (Bit 0) */ -#define LEDTS_TSCMP1_CMP_TS4_Msk (0xffUL) /*!< LEDTS TSCMP1: CMP_TS4 (Bitfield-Mask: 0xff) */ -#define LEDTS_TSCMP1_CMP_TS5_Pos (8UL) /*!< LEDTS TSCMP1: CMP_TS5 (Bit 8) */ -#define LEDTS_TSCMP1_CMP_TS5_Msk (0xff00UL) /*!< LEDTS TSCMP1: CMP_TS5 (Bitfield-Mask: 0xff) */ -#define LEDTS_TSCMP1_CMP_TS6_Pos (16UL) /*!< LEDTS TSCMP1: CMP_TS6 (Bit 16) */ -#define LEDTS_TSCMP1_CMP_TS6_Msk (0xff0000UL) /*!< LEDTS TSCMP1: CMP_TS6 (Bitfield-Mask: 0xff) */ -#define LEDTS_TSCMP1_CMP_TS7_Pos (24UL) /*!< LEDTS TSCMP1: CMP_TS7 (Bit 24) */ -#define LEDTS_TSCMP1_CMP_TS7_Msk (0xff000000UL) /*!< LEDTS TSCMP1: CMP_TS7 (Bitfield-Mask: 0xff) */ - - -/* ================================================================================ */ -/* ================ struct 'SDMMC' Position & Mask ================ */ -/* ================================================================================ */ - - -/* ------------------------------ SDMMC_BLOCK_SIZE ------------------------------ */ -#define SDMMC_BLOCK_SIZE_TX_BLOCK_SIZE_Pos (0UL) /*!< SDMMC BLOCK_SIZE: TX_BLOCK_SIZE (Bit 0) */ -#define SDMMC_BLOCK_SIZE_TX_BLOCK_SIZE_Msk (0xfffUL) /*!< SDMMC BLOCK_SIZE: TX_BLOCK_SIZE (Bitfield-Mask: 0xfff) */ -#define SDMMC_BLOCK_SIZE_TX_BLOCK_SIZE_12_Pos (15UL) /*!< SDMMC BLOCK_SIZE: TX_BLOCK_SIZE_12 (Bit 15) */ -#define SDMMC_BLOCK_SIZE_TX_BLOCK_SIZE_12_Msk (0x8000UL) /*!< SDMMC BLOCK_SIZE: TX_BLOCK_SIZE_12 (Bitfield-Mask: 0x01) */ - -/* ------------------------------ SDMMC_BLOCK_COUNT ----------------------------- */ -#define SDMMC_BLOCK_COUNT_BLOCK_COUNT_Pos (0UL) /*!< SDMMC BLOCK_COUNT: BLOCK_COUNT (Bit 0) */ -#define SDMMC_BLOCK_COUNT_BLOCK_COUNT_Msk (0xffffUL) /*!< SDMMC BLOCK_COUNT: BLOCK_COUNT (Bitfield-Mask: 0xffff) */ - -/* ------------------------------- SDMMC_ARGUMENT1 ------------------------------ */ -#define SDMMC_ARGUMENT1_ARGUMENT1_Pos (0UL) /*!< SDMMC ARGUMENT1: ARGUMENT1 (Bit 0) */ -#define SDMMC_ARGUMENT1_ARGUMENT1_Msk (0xffffffffUL) /*!< SDMMC ARGUMENT1: ARGUMENT1 (Bitfield-Mask: 0xffffffff) */ - -/* ----------------------------- SDMMC_TRANSFER_MODE ---------------------------- */ -#define SDMMC_TRANSFER_MODE_BLOCK_COUNT_EN_Pos (1UL) /*!< SDMMC TRANSFER_MODE: BLOCK_COUNT_EN (Bit 1) */ -#define SDMMC_TRANSFER_MODE_BLOCK_COUNT_EN_Msk (0x2UL) /*!< SDMMC TRANSFER_MODE: BLOCK_COUNT_EN (Bitfield-Mask: 0x01) */ -#define SDMMC_TRANSFER_MODE_ACMD_EN_Pos (2UL) /*!< SDMMC TRANSFER_MODE: ACMD_EN (Bit 2) */ -#define SDMMC_TRANSFER_MODE_ACMD_EN_Msk (0xcUL) /*!< SDMMC TRANSFER_MODE: ACMD_EN (Bitfield-Mask: 0x03) */ -#define SDMMC_TRANSFER_MODE_TX_DIR_SELECT_Pos (4UL) /*!< SDMMC TRANSFER_MODE: TX_DIR_SELECT (Bit 4) */ -#define SDMMC_TRANSFER_MODE_TX_DIR_SELECT_Msk (0x10UL) /*!< SDMMC TRANSFER_MODE: TX_DIR_SELECT (Bitfield-Mask: 0x01) */ -#define SDMMC_TRANSFER_MODE_MULTI_BLOCK_SELECT_Pos (5UL) /*!< SDMMC TRANSFER_MODE: MULTI_BLOCK_SELECT (Bit 5) */ -#define SDMMC_TRANSFER_MODE_MULTI_BLOCK_SELECT_Msk (0x20UL) /*!< SDMMC TRANSFER_MODE: MULTI_BLOCK_SELECT (Bitfield-Mask: 0x01) */ -#define SDMMC_TRANSFER_MODE_CMD_COMP_ATA_Pos (6UL) /*!< SDMMC TRANSFER_MODE: CMD_COMP_ATA (Bit 6) */ -#define SDMMC_TRANSFER_MODE_CMD_COMP_ATA_Msk (0x40UL) /*!< SDMMC TRANSFER_MODE: CMD_COMP_ATA (Bitfield-Mask: 0x01) */ - -/* -------------------------------- SDMMC_COMMAND ------------------------------- */ -#define SDMMC_COMMAND_RESP_TYPE_SELECT_Pos (0UL) /*!< SDMMC COMMAND: RESP_TYPE_SELECT (Bit 0) */ -#define SDMMC_COMMAND_RESP_TYPE_SELECT_Msk (0x3UL) /*!< SDMMC COMMAND: RESP_TYPE_SELECT (Bitfield-Mask: 0x03) */ -#define SDMMC_COMMAND_CMD_CRC_CHECK_EN_Pos (3UL) /*!< SDMMC COMMAND: CMD_CRC_CHECK_EN (Bit 3) */ -#define SDMMC_COMMAND_CMD_CRC_CHECK_EN_Msk (0x8UL) /*!< SDMMC COMMAND: CMD_CRC_CHECK_EN (Bitfield-Mask: 0x01) */ -#define SDMMC_COMMAND_CMD_IND_CHECK_EN_Pos (4UL) /*!< SDMMC COMMAND: CMD_IND_CHECK_EN (Bit 4) */ -#define SDMMC_COMMAND_CMD_IND_CHECK_EN_Msk (0x10UL) /*!< SDMMC COMMAND: CMD_IND_CHECK_EN (Bitfield-Mask: 0x01) */ -#define SDMMC_COMMAND_DATA_PRESENT_SELECT_Pos (5UL) /*!< SDMMC COMMAND: DATA_PRESENT_SELECT (Bit 5) */ -#define SDMMC_COMMAND_DATA_PRESENT_SELECT_Msk (0x20UL) /*!< SDMMC COMMAND: DATA_PRESENT_SELECT (Bitfield-Mask: 0x01) */ -#define SDMMC_COMMAND_CMD_TYPE_Pos (6UL) /*!< SDMMC COMMAND: CMD_TYPE (Bit 6) */ -#define SDMMC_COMMAND_CMD_TYPE_Msk (0xc0UL) /*!< SDMMC COMMAND: CMD_TYPE (Bitfield-Mask: 0x03) */ -#define SDMMC_COMMAND_CMD_IND_Pos (8UL) /*!< SDMMC COMMAND: CMD_IND (Bit 8) */ -#define SDMMC_COMMAND_CMD_IND_Msk (0x3f00UL) /*!< SDMMC COMMAND: CMD_IND (Bitfield-Mask: 0x3f) */ - -/* ------------------------------- SDMMC_RESPONSE0 ------------------------------ */ -#define SDMMC_RESPONSE0_RESPONSE0_Pos (0UL) /*!< SDMMC RESPONSE0: RESPONSE0 (Bit 0) */ -#define SDMMC_RESPONSE0_RESPONSE0_Msk (0xffffUL) /*!< SDMMC RESPONSE0: RESPONSE0 (Bitfield-Mask: 0xffff) */ -#define SDMMC_RESPONSE0_RESPONSE1_Pos (16UL) /*!< SDMMC RESPONSE0: RESPONSE1 (Bit 16) */ -#define SDMMC_RESPONSE0_RESPONSE1_Msk (0xffff0000UL) /*!< SDMMC RESPONSE0: RESPONSE1 (Bitfield-Mask: 0xffff) */ - -/* ------------------------------- SDMMC_RESPONSE2 ------------------------------ */ -#define SDMMC_RESPONSE2_RESPONSE2_Pos (0UL) /*!< SDMMC RESPONSE2: RESPONSE2 (Bit 0) */ -#define SDMMC_RESPONSE2_RESPONSE2_Msk (0xffffUL) /*!< SDMMC RESPONSE2: RESPONSE2 (Bitfield-Mask: 0xffff) */ -#define SDMMC_RESPONSE2_RESPONSE3_Pos (16UL) /*!< SDMMC RESPONSE2: RESPONSE3 (Bit 16) */ -#define SDMMC_RESPONSE2_RESPONSE3_Msk (0xffff0000UL) /*!< SDMMC RESPONSE2: RESPONSE3 (Bitfield-Mask: 0xffff) */ - -/* ------------------------------- SDMMC_RESPONSE4 ------------------------------ */ -#define SDMMC_RESPONSE4_RESPONSE4_Pos (0UL) /*!< SDMMC RESPONSE4: RESPONSE4 (Bit 0) */ -#define SDMMC_RESPONSE4_RESPONSE4_Msk (0xffffUL) /*!< SDMMC RESPONSE4: RESPONSE4 (Bitfield-Mask: 0xffff) */ -#define SDMMC_RESPONSE4_RESPONSE5_Pos (16UL) /*!< SDMMC RESPONSE4: RESPONSE5 (Bit 16) */ -#define SDMMC_RESPONSE4_RESPONSE5_Msk (0xffff0000UL) /*!< SDMMC RESPONSE4: RESPONSE5 (Bitfield-Mask: 0xffff) */ - -/* ------------------------------- SDMMC_RESPONSE6 ------------------------------ */ -#define SDMMC_RESPONSE6_RESPONSE6_Pos (0UL) /*!< SDMMC RESPONSE6: RESPONSE6 (Bit 0) */ -#define SDMMC_RESPONSE6_RESPONSE6_Msk (0xffffUL) /*!< SDMMC RESPONSE6: RESPONSE6 (Bitfield-Mask: 0xffff) */ -#define SDMMC_RESPONSE6_RESPONSE7_Pos (16UL) /*!< SDMMC RESPONSE6: RESPONSE7 (Bit 16) */ -#define SDMMC_RESPONSE6_RESPONSE7_Msk (0xffff0000UL) /*!< SDMMC RESPONSE6: RESPONSE7 (Bitfield-Mask: 0xffff) */ - -/* ------------------------------ SDMMC_DATA_BUFFER ----------------------------- */ -#define SDMMC_DATA_BUFFER_DATA_BUFFER_Pos (0UL) /*!< SDMMC DATA_BUFFER: DATA_BUFFER (Bit 0) */ -#define SDMMC_DATA_BUFFER_DATA_BUFFER_Msk (0xffffffffUL) /*!< SDMMC DATA_BUFFER: DATA_BUFFER (Bitfield-Mask: 0xffffffff) */ - -/* ----------------------------- SDMMC_PRESENT_STATE ---------------------------- */ -#define SDMMC_PRESENT_STATE_COMMAND_INHIBIT_CMD_Pos (0UL) /*!< SDMMC PRESENT_STATE: COMMAND_INHIBIT_CMD (Bit 0) */ -#define SDMMC_PRESENT_STATE_COMMAND_INHIBIT_CMD_Msk (0x1UL) /*!< SDMMC PRESENT_STATE: COMMAND_INHIBIT_CMD (Bitfield-Mask: 0x01) */ -#define SDMMC_PRESENT_STATE_COMMAND_INHIBIT_DAT_Pos (1UL) /*!< SDMMC PRESENT_STATE: COMMAND_INHIBIT_DAT (Bit 1) */ -#define SDMMC_PRESENT_STATE_COMMAND_INHIBIT_DAT_Msk (0x2UL) /*!< SDMMC PRESENT_STATE: COMMAND_INHIBIT_DAT (Bitfield-Mask: 0x01) */ -#define SDMMC_PRESENT_STATE_DAT_LINE_ACTIVE_Pos (2UL) /*!< SDMMC PRESENT_STATE: DAT_LINE_ACTIVE (Bit 2) */ -#define SDMMC_PRESENT_STATE_DAT_LINE_ACTIVE_Msk (0x4UL) /*!< SDMMC PRESENT_STATE: DAT_LINE_ACTIVE (Bitfield-Mask: 0x01) */ -#define SDMMC_PRESENT_STATE_WRITE_TRANSFER_ACTIVE_Pos (8UL) /*!< SDMMC PRESENT_STATE: WRITE_TRANSFER_ACTIVE (Bit 8) */ -#define SDMMC_PRESENT_STATE_WRITE_TRANSFER_ACTIVE_Msk (0x100UL) /*!< SDMMC PRESENT_STATE: WRITE_TRANSFER_ACTIVE (Bitfield-Mask: 0x01) */ -#define SDMMC_PRESENT_STATE_READ_TRANSFER_ACTIVE_Pos (9UL) /*!< SDMMC PRESENT_STATE: READ_TRANSFER_ACTIVE (Bit 9) */ -#define SDMMC_PRESENT_STATE_READ_TRANSFER_ACTIVE_Msk (0x200UL) /*!< SDMMC PRESENT_STATE: READ_TRANSFER_ACTIVE (Bitfield-Mask: 0x01) */ -#define SDMMC_PRESENT_STATE_BUFFER_WRITE_ENABLE_Pos (10UL) /*!< SDMMC PRESENT_STATE: BUFFER_WRITE_ENABLE (Bit 10) */ -#define SDMMC_PRESENT_STATE_BUFFER_WRITE_ENABLE_Msk (0x400UL) /*!< SDMMC PRESENT_STATE: BUFFER_WRITE_ENABLE (Bitfield-Mask: 0x01) */ -#define SDMMC_PRESENT_STATE_BUFFER_READ_ENABLE_Pos (11UL) /*!< SDMMC PRESENT_STATE: BUFFER_READ_ENABLE (Bit 11) */ -#define SDMMC_PRESENT_STATE_BUFFER_READ_ENABLE_Msk (0x800UL) /*!< SDMMC PRESENT_STATE: BUFFER_READ_ENABLE (Bitfield-Mask: 0x01) */ -#define SDMMC_PRESENT_STATE_CARD_INSERTED_Pos (16UL) /*!< SDMMC PRESENT_STATE: CARD_INSERTED (Bit 16) */ -#define SDMMC_PRESENT_STATE_CARD_INSERTED_Msk (0x10000UL) /*!< SDMMC PRESENT_STATE: CARD_INSERTED (Bitfield-Mask: 0x01) */ -#define SDMMC_PRESENT_STATE_CARD_STATE_STABLE_Pos (17UL) /*!< SDMMC PRESENT_STATE: CARD_STATE_STABLE (Bit 17) */ -#define SDMMC_PRESENT_STATE_CARD_STATE_STABLE_Msk (0x20000UL) /*!< SDMMC PRESENT_STATE: CARD_STATE_STABLE (Bitfield-Mask: 0x01) */ -#define SDMMC_PRESENT_STATE_CARD_DETECT_PIN_LEVEL_Pos (18UL) /*!< SDMMC PRESENT_STATE: CARD_DETECT_PIN_LEVEL (Bit 18) */ -#define SDMMC_PRESENT_STATE_CARD_DETECT_PIN_LEVEL_Msk (0x40000UL) /*!< SDMMC PRESENT_STATE: CARD_DETECT_PIN_LEVEL (Bitfield-Mask: 0x01) */ -#define SDMMC_PRESENT_STATE_WRITE_PROTECT_PIN_LEVEL_Pos (19UL) /*!< SDMMC PRESENT_STATE: WRITE_PROTECT_PIN_LEVEL (Bit 19) */ -#define SDMMC_PRESENT_STATE_WRITE_PROTECT_PIN_LEVEL_Msk (0x80000UL) /*!< SDMMC PRESENT_STATE: WRITE_PROTECT_PIN_LEVEL (Bitfield-Mask: 0x01) */ -#define SDMMC_PRESENT_STATE_DAT_3_0_PIN_LEVEL_Pos (20UL) /*!< SDMMC PRESENT_STATE: DAT_3_0_PIN_LEVEL (Bit 20) */ -#define SDMMC_PRESENT_STATE_DAT_3_0_PIN_LEVEL_Msk (0xf00000UL) /*!< SDMMC PRESENT_STATE: DAT_3_0_PIN_LEVEL (Bitfield-Mask: 0x0f) */ -#define SDMMC_PRESENT_STATE_CMD_LINE_LEVEL_Pos (24UL) /*!< SDMMC PRESENT_STATE: CMD_LINE_LEVEL (Bit 24) */ -#define SDMMC_PRESENT_STATE_CMD_LINE_LEVEL_Msk (0x1000000UL) /*!< SDMMC PRESENT_STATE: CMD_LINE_LEVEL (Bitfield-Mask: 0x01) */ -#define SDMMC_PRESENT_STATE_DAT_7_4_PIN_LEVEL_Pos (25UL) /*!< SDMMC PRESENT_STATE: DAT_7_4_PIN_LEVEL (Bit 25) */ -#define SDMMC_PRESENT_STATE_DAT_7_4_PIN_LEVEL_Msk (0x1e000000UL) /*!< SDMMC PRESENT_STATE: DAT_7_4_PIN_LEVEL (Bitfield-Mask: 0x0f) */ - -/* ------------------------------- SDMMC_HOST_CTRL ------------------------------ */ -#define SDMMC_HOST_CTRL_LED_CTRL_Pos (0UL) /*!< SDMMC HOST_CTRL: LED_CTRL (Bit 0) */ -#define SDMMC_HOST_CTRL_LED_CTRL_Msk (0x1UL) /*!< SDMMC HOST_CTRL: LED_CTRL (Bitfield-Mask: 0x01) */ -#define SDMMC_HOST_CTRL_DATA_TX_WIDTH_Pos (1UL) /*!< SDMMC HOST_CTRL: DATA_TX_WIDTH (Bit 1) */ -#define SDMMC_HOST_CTRL_DATA_TX_WIDTH_Msk (0x2UL) /*!< SDMMC HOST_CTRL: DATA_TX_WIDTH (Bitfield-Mask: 0x01) */ -#define SDMMC_HOST_CTRL_HIGH_SPEED_EN_Pos (2UL) /*!< SDMMC HOST_CTRL: HIGH_SPEED_EN (Bit 2) */ -#define SDMMC_HOST_CTRL_HIGH_SPEED_EN_Msk (0x4UL) /*!< SDMMC HOST_CTRL: HIGH_SPEED_EN (Bitfield-Mask: 0x01) */ -#define SDMMC_HOST_CTRL_SD_8BIT_MODE_Pos (5UL) /*!< SDMMC HOST_CTRL: SD_8BIT_MODE (Bit 5) */ -#define SDMMC_HOST_CTRL_SD_8BIT_MODE_Msk (0x20UL) /*!< SDMMC HOST_CTRL: SD_8BIT_MODE (Bitfield-Mask: 0x01) */ -#define SDMMC_HOST_CTRL_CARD_DETECT_TEST_LEVEL_Pos (6UL) /*!< SDMMC HOST_CTRL: CARD_DETECT_TEST_LEVEL (Bit 6) */ -#define SDMMC_HOST_CTRL_CARD_DETECT_TEST_LEVEL_Msk (0x40UL) /*!< SDMMC HOST_CTRL: CARD_DETECT_TEST_LEVEL (Bitfield-Mask: 0x01) */ -#define SDMMC_HOST_CTRL_CARD_DET_SIGNAL_DETECT_Pos (7UL) /*!< SDMMC HOST_CTRL: CARD_DET_SIGNAL_DETECT (Bit 7) */ -#define SDMMC_HOST_CTRL_CARD_DET_SIGNAL_DETECT_Msk (0x80UL) /*!< SDMMC HOST_CTRL: CARD_DET_SIGNAL_DETECT (Bitfield-Mask: 0x01) */ - -/* ------------------------------ SDMMC_POWER_CTRL ------------------------------ */ -#define SDMMC_POWER_CTRL_SD_BUS_POWER_Pos (0UL) /*!< SDMMC POWER_CTRL: SD_BUS_POWER (Bit 0) */ -#define SDMMC_POWER_CTRL_SD_BUS_POWER_Msk (0x1UL) /*!< SDMMC POWER_CTRL: SD_BUS_POWER (Bitfield-Mask: 0x01) */ -#define SDMMC_POWER_CTRL_SD_BUS_VOLTAGE_SEL_Pos (1UL) /*!< SDMMC POWER_CTRL: SD_BUS_VOLTAGE_SEL (Bit 1) */ -#define SDMMC_POWER_CTRL_SD_BUS_VOLTAGE_SEL_Msk (0xeUL) /*!< SDMMC POWER_CTRL: SD_BUS_VOLTAGE_SEL (Bitfield-Mask: 0x07) */ -#define SDMMC_POWER_CTRL_HARDWARE_RESET_Pos (4UL) /*!< SDMMC POWER_CTRL: HARDWARE_RESET (Bit 4) */ -#define SDMMC_POWER_CTRL_HARDWARE_RESET_Msk (0x10UL) /*!< SDMMC POWER_CTRL: HARDWARE_RESET (Bitfield-Mask: 0x01) */ - -/* ---------------------------- SDMMC_BLOCK_GAP_CTRL ---------------------------- */ -#define SDMMC_BLOCK_GAP_CTRL_STOP_AT_BLOCK_GAP_Pos (0UL) /*!< SDMMC BLOCK_GAP_CTRL: STOP_AT_BLOCK_GAP (Bit 0) */ -#define SDMMC_BLOCK_GAP_CTRL_STOP_AT_BLOCK_GAP_Msk (0x1UL) /*!< SDMMC BLOCK_GAP_CTRL: STOP_AT_BLOCK_GAP (Bitfield-Mask: 0x01) */ -#define SDMMC_BLOCK_GAP_CTRL_CONTINUE_REQ_Pos (1UL) /*!< SDMMC BLOCK_GAP_CTRL: CONTINUE_REQ (Bit 1) */ -#define SDMMC_BLOCK_GAP_CTRL_CONTINUE_REQ_Msk (0x2UL) /*!< SDMMC BLOCK_GAP_CTRL: CONTINUE_REQ (Bitfield-Mask: 0x01) */ -#define SDMMC_BLOCK_GAP_CTRL_READ_WAIT_CTRL_Pos (2UL) /*!< SDMMC BLOCK_GAP_CTRL: READ_WAIT_CTRL (Bit 2) */ -#define SDMMC_BLOCK_GAP_CTRL_READ_WAIT_CTRL_Msk (0x4UL) /*!< SDMMC BLOCK_GAP_CTRL: READ_WAIT_CTRL (Bitfield-Mask: 0x01) */ -#define SDMMC_BLOCK_GAP_CTRL_INT_AT_BLOCK_GAP_Pos (3UL) /*!< SDMMC BLOCK_GAP_CTRL: INT_AT_BLOCK_GAP (Bit 3) */ -#define SDMMC_BLOCK_GAP_CTRL_INT_AT_BLOCK_GAP_Msk (0x8UL) /*!< SDMMC BLOCK_GAP_CTRL: INT_AT_BLOCK_GAP (Bitfield-Mask: 0x01) */ - -/* ------------------------------ SDMMC_WAKEUP_CTRL ----------------------------- */ -#define SDMMC_WAKEUP_CTRL_WAKEUP_EVENT_EN_INT_Pos (0UL) /*!< SDMMC WAKEUP_CTRL: WAKEUP_EVENT_EN_INT (Bit 0) */ -#define SDMMC_WAKEUP_CTRL_WAKEUP_EVENT_EN_INT_Msk (0x1UL) /*!< SDMMC WAKEUP_CTRL: WAKEUP_EVENT_EN_INT (Bitfield-Mask: 0x01) */ -#define SDMMC_WAKEUP_CTRL_WAKEUP_EVENT_EN_INS_Pos (1UL) /*!< SDMMC WAKEUP_CTRL: WAKEUP_EVENT_EN_INS (Bit 1) */ -#define SDMMC_WAKEUP_CTRL_WAKEUP_EVENT_EN_INS_Msk (0x2UL) /*!< SDMMC WAKEUP_CTRL: WAKEUP_EVENT_EN_INS (Bitfield-Mask: 0x01) */ -#define SDMMC_WAKEUP_CTRL_WAKEUP_EVENT_EN_REM_Pos (2UL) /*!< SDMMC WAKEUP_CTRL: WAKEUP_EVENT_EN_REM (Bit 2) */ -#define SDMMC_WAKEUP_CTRL_WAKEUP_EVENT_EN_REM_Msk (0x4UL) /*!< SDMMC WAKEUP_CTRL: WAKEUP_EVENT_EN_REM (Bitfield-Mask: 0x01) */ - -/* ------------------------------ SDMMC_CLOCK_CTRL ------------------------------ */ -#define SDMMC_CLOCK_CTRL_INTERNAL_CLOCK_EN_Pos (0UL) /*!< SDMMC CLOCK_CTRL: INTERNAL_CLOCK_EN (Bit 0) */ -#define SDMMC_CLOCK_CTRL_INTERNAL_CLOCK_EN_Msk (0x1UL) /*!< SDMMC CLOCK_CTRL: INTERNAL_CLOCK_EN (Bitfield-Mask: 0x01) */ -#define SDMMC_CLOCK_CTRL_INTERNAL_CLOCK_STABLE_Pos (1UL) /*!< SDMMC CLOCK_CTRL: INTERNAL_CLOCK_STABLE (Bit 1) */ -#define SDMMC_CLOCK_CTRL_INTERNAL_CLOCK_STABLE_Msk (0x2UL) /*!< SDMMC CLOCK_CTRL: INTERNAL_CLOCK_STABLE (Bitfield-Mask: 0x01) */ -#define SDMMC_CLOCK_CTRL_SDCLOCK_EN_Pos (2UL) /*!< SDMMC CLOCK_CTRL: SDCLOCK_EN (Bit 2) */ -#define SDMMC_CLOCK_CTRL_SDCLOCK_EN_Msk (0x4UL) /*!< SDMMC CLOCK_CTRL: SDCLOCK_EN (Bitfield-Mask: 0x01) */ -#define SDMMC_CLOCK_CTRL_SDCLK_FREQ_SEL_Pos (8UL) /*!< SDMMC CLOCK_CTRL: SDCLK_FREQ_SEL (Bit 8) */ -#define SDMMC_CLOCK_CTRL_SDCLK_FREQ_SEL_Msk (0xff00UL) /*!< SDMMC CLOCK_CTRL: SDCLK_FREQ_SEL (Bitfield-Mask: 0xff) */ - -/* ----------------------------- SDMMC_TIMEOUT_CTRL ----------------------------- */ -#define SDMMC_TIMEOUT_CTRL_DAT_TIMEOUT_CNT_VAL_Pos (0UL) /*!< SDMMC TIMEOUT_CTRL: DAT_TIMEOUT_CNT_VAL (Bit 0) */ -#define SDMMC_TIMEOUT_CTRL_DAT_TIMEOUT_CNT_VAL_Msk (0xfUL) /*!< SDMMC TIMEOUT_CTRL: DAT_TIMEOUT_CNT_VAL (Bitfield-Mask: 0x0f) */ - -/* ------------------------------- SDMMC_SW_RESET ------------------------------- */ -#define SDMMC_SW_RESET_SW_RST_ALL_Pos (0UL) /*!< SDMMC SW_RESET: SW_RST_ALL (Bit 0) */ -#define SDMMC_SW_RESET_SW_RST_ALL_Msk (0x1UL) /*!< SDMMC SW_RESET: SW_RST_ALL (Bitfield-Mask: 0x01) */ -#define SDMMC_SW_RESET_SW_RST_CMD_LINE_Pos (1UL) /*!< SDMMC SW_RESET: SW_RST_CMD_LINE (Bit 1) */ -#define SDMMC_SW_RESET_SW_RST_CMD_LINE_Msk (0x2UL) /*!< SDMMC SW_RESET: SW_RST_CMD_LINE (Bitfield-Mask: 0x01) */ -#define SDMMC_SW_RESET_SW_RST_DAT_LINE_Pos (2UL) /*!< SDMMC SW_RESET: SW_RST_DAT_LINE (Bit 2) */ -#define SDMMC_SW_RESET_SW_RST_DAT_LINE_Msk (0x4UL) /*!< SDMMC SW_RESET: SW_RST_DAT_LINE (Bitfield-Mask: 0x01) */ - -/* ---------------------------- SDMMC_INT_STATUS_NORM --------------------------- */ -#define SDMMC_INT_STATUS_NORM_CMD_COMPLETE_Pos (0UL) /*!< SDMMC INT_STATUS_NORM: CMD_COMPLETE (Bit 0) */ -#define SDMMC_INT_STATUS_NORM_CMD_COMPLETE_Msk (0x1UL) /*!< SDMMC INT_STATUS_NORM: CMD_COMPLETE (Bitfield-Mask: 0x01) */ -#define SDMMC_INT_STATUS_NORM_TX_COMPLETE_Pos (1UL) /*!< SDMMC INT_STATUS_NORM: TX_COMPLETE (Bit 1) */ -#define SDMMC_INT_STATUS_NORM_TX_COMPLETE_Msk (0x2UL) /*!< SDMMC INT_STATUS_NORM: TX_COMPLETE (Bitfield-Mask: 0x01) */ -#define SDMMC_INT_STATUS_NORM_BLOCK_GAP_EVENT_Pos (2UL) /*!< SDMMC INT_STATUS_NORM: BLOCK_GAP_EVENT (Bit 2) */ -#define SDMMC_INT_STATUS_NORM_BLOCK_GAP_EVENT_Msk (0x4UL) /*!< SDMMC INT_STATUS_NORM: BLOCK_GAP_EVENT (Bitfield-Mask: 0x01) */ -#define SDMMC_INT_STATUS_NORM_BUFF_WRITE_READY_Pos (4UL) /*!< SDMMC INT_STATUS_NORM: BUFF_WRITE_READY (Bit 4) */ -#define SDMMC_INT_STATUS_NORM_BUFF_WRITE_READY_Msk (0x10UL) /*!< SDMMC INT_STATUS_NORM: BUFF_WRITE_READY (Bitfield-Mask: 0x01) */ -#define SDMMC_INT_STATUS_NORM_BUFF_READ_READY_Pos (5UL) /*!< SDMMC INT_STATUS_NORM: BUFF_READ_READY (Bit 5) */ -#define SDMMC_INT_STATUS_NORM_BUFF_READ_READY_Msk (0x20UL) /*!< SDMMC INT_STATUS_NORM: BUFF_READ_READY (Bitfield-Mask: 0x01) */ -#define SDMMC_INT_STATUS_NORM_CARD_INS_Pos (6UL) /*!< SDMMC INT_STATUS_NORM: CARD_INS (Bit 6) */ -#define SDMMC_INT_STATUS_NORM_CARD_INS_Msk (0x40UL) /*!< SDMMC INT_STATUS_NORM: CARD_INS (Bitfield-Mask: 0x01) */ -#define SDMMC_INT_STATUS_NORM_CARD_REMOVAL_Pos (7UL) /*!< SDMMC INT_STATUS_NORM: CARD_REMOVAL (Bit 7) */ -#define SDMMC_INT_STATUS_NORM_CARD_REMOVAL_Msk (0x80UL) /*!< SDMMC INT_STATUS_NORM: CARD_REMOVAL (Bitfield-Mask: 0x01) */ -#define SDMMC_INT_STATUS_NORM_CARD_INT_Pos (8UL) /*!< SDMMC INT_STATUS_NORM: CARD_INT (Bit 8) */ -#define SDMMC_INT_STATUS_NORM_CARD_INT_Msk (0x100UL) /*!< SDMMC INT_STATUS_NORM: CARD_INT (Bitfield-Mask: 0x01) */ -#define SDMMC_INT_STATUS_NORM_ERR_INT_Pos (15UL) /*!< SDMMC INT_STATUS_NORM: ERR_INT (Bit 15) */ -#define SDMMC_INT_STATUS_NORM_ERR_INT_Msk (0x8000UL) /*!< SDMMC INT_STATUS_NORM: ERR_INT (Bitfield-Mask: 0x01) */ - -/* ---------------------------- SDMMC_INT_STATUS_ERR ---------------------------- */ -#define SDMMC_INT_STATUS_ERR_CMD_TIMEOUT_ERR_Pos (0UL) /*!< SDMMC INT_STATUS_ERR: CMD_TIMEOUT_ERR (Bit 0) */ -#define SDMMC_INT_STATUS_ERR_CMD_TIMEOUT_ERR_Msk (0x1UL) /*!< SDMMC INT_STATUS_ERR: CMD_TIMEOUT_ERR (Bitfield-Mask: 0x01) */ -#define SDMMC_INT_STATUS_ERR_CMD_CRC_ERR_Pos (1UL) /*!< SDMMC INT_STATUS_ERR: CMD_CRC_ERR (Bit 1) */ -#define SDMMC_INT_STATUS_ERR_CMD_CRC_ERR_Msk (0x2UL) /*!< SDMMC INT_STATUS_ERR: CMD_CRC_ERR (Bitfield-Mask: 0x01) */ -#define SDMMC_INT_STATUS_ERR_CMD_END_BIT_ERR_Pos (2UL) /*!< SDMMC INT_STATUS_ERR: CMD_END_BIT_ERR (Bit 2) */ -#define SDMMC_INT_STATUS_ERR_CMD_END_BIT_ERR_Msk (0x4UL) /*!< SDMMC INT_STATUS_ERR: CMD_END_BIT_ERR (Bitfield-Mask: 0x01) */ -#define SDMMC_INT_STATUS_ERR_CMD_IND_ERR_Pos (3UL) /*!< SDMMC INT_STATUS_ERR: CMD_IND_ERR (Bit 3) */ -#define SDMMC_INT_STATUS_ERR_CMD_IND_ERR_Msk (0x8UL) /*!< SDMMC INT_STATUS_ERR: CMD_IND_ERR (Bitfield-Mask: 0x01) */ -#define SDMMC_INT_STATUS_ERR_DATA_TIMEOUT_ERR_Pos (4UL) /*!< SDMMC INT_STATUS_ERR: DATA_TIMEOUT_ERR (Bit 4) */ -#define SDMMC_INT_STATUS_ERR_DATA_TIMEOUT_ERR_Msk (0x10UL) /*!< SDMMC INT_STATUS_ERR: DATA_TIMEOUT_ERR (Bitfield-Mask: 0x01) */ -#define SDMMC_INT_STATUS_ERR_DATA_CRC_ERR_Pos (5UL) /*!< SDMMC INT_STATUS_ERR: DATA_CRC_ERR (Bit 5) */ -#define SDMMC_INT_STATUS_ERR_DATA_CRC_ERR_Msk (0x20UL) /*!< SDMMC INT_STATUS_ERR: DATA_CRC_ERR (Bitfield-Mask: 0x01) */ -#define SDMMC_INT_STATUS_ERR_DATA_END_BIT_ERR_Pos (6UL) /*!< SDMMC INT_STATUS_ERR: DATA_END_BIT_ERR (Bit 6) */ -#define SDMMC_INT_STATUS_ERR_DATA_END_BIT_ERR_Msk (0x40UL) /*!< SDMMC INT_STATUS_ERR: DATA_END_BIT_ERR (Bitfield-Mask: 0x01) */ -#define SDMMC_INT_STATUS_ERR_CURRENT_LIMIT_ERR_Pos (7UL) /*!< SDMMC INT_STATUS_ERR: CURRENT_LIMIT_ERR (Bit 7) */ -#define SDMMC_INT_STATUS_ERR_CURRENT_LIMIT_ERR_Msk (0x80UL) /*!< SDMMC INT_STATUS_ERR: CURRENT_LIMIT_ERR (Bitfield-Mask: 0x01) */ -#define SDMMC_INT_STATUS_ERR_ACMD_ERR_Pos (8UL) /*!< SDMMC INT_STATUS_ERR: ACMD_ERR (Bit 8) */ -#define SDMMC_INT_STATUS_ERR_ACMD_ERR_Msk (0x100UL) /*!< SDMMC INT_STATUS_ERR: ACMD_ERR (Bitfield-Mask: 0x01) */ -#define SDMMC_INT_STATUS_ERR_CEATA_ERR_Pos (13UL) /*!< SDMMC INT_STATUS_ERR: CEATA_ERR (Bit 13) */ -#define SDMMC_INT_STATUS_ERR_CEATA_ERR_Msk (0x2000UL) /*!< SDMMC INT_STATUS_ERR: CEATA_ERR (Bitfield-Mask: 0x01) */ - -/* -------------------------- SDMMC_EN_INT_STATUS_NORM -------------------------- */ -#define SDMMC_EN_INT_STATUS_NORM_CMD_COMPLETE_EN_Pos (0UL) /*!< SDMMC EN_INT_STATUS_NORM: CMD_COMPLETE_EN (Bit 0) */ -#define SDMMC_EN_INT_STATUS_NORM_CMD_COMPLETE_EN_Msk (0x1UL) /*!< SDMMC EN_INT_STATUS_NORM: CMD_COMPLETE_EN (Bitfield-Mask: 0x01) */ -#define SDMMC_EN_INT_STATUS_NORM_TX_COMPLETE_EN_Pos (1UL) /*!< SDMMC EN_INT_STATUS_NORM: TX_COMPLETE_EN (Bit 1) */ -#define SDMMC_EN_INT_STATUS_NORM_TX_COMPLETE_EN_Msk (0x2UL) /*!< SDMMC EN_INT_STATUS_NORM: TX_COMPLETE_EN (Bitfield-Mask: 0x01) */ -#define SDMMC_EN_INT_STATUS_NORM_BLOCK_GAP_EVENT_EN_Pos (2UL) /*!< SDMMC EN_INT_STATUS_NORM: BLOCK_GAP_EVENT_EN (Bit 2) */ -#define SDMMC_EN_INT_STATUS_NORM_BLOCK_GAP_EVENT_EN_Msk (0x4UL) /*!< SDMMC EN_INT_STATUS_NORM: BLOCK_GAP_EVENT_EN (Bitfield-Mask: 0x01) */ -#define SDMMC_EN_INT_STATUS_NORM_BUFF_WRITE_READY_EN_Pos (4UL) /*!< SDMMC EN_INT_STATUS_NORM: BUFF_WRITE_READY_EN (Bit 4) */ -#define SDMMC_EN_INT_STATUS_NORM_BUFF_WRITE_READY_EN_Msk (0x10UL) /*!< SDMMC EN_INT_STATUS_NORM: BUFF_WRITE_READY_EN (Bitfield-Mask: 0x01) */ -#define SDMMC_EN_INT_STATUS_NORM_BUFF_READ_READY_EN_Pos (5UL) /*!< SDMMC EN_INT_STATUS_NORM: BUFF_READ_READY_EN (Bit 5) */ -#define SDMMC_EN_INT_STATUS_NORM_BUFF_READ_READY_EN_Msk (0x20UL) /*!< SDMMC EN_INT_STATUS_NORM: BUFF_READ_READY_EN (Bitfield-Mask: 0x01) */ -#define SDMMC_EN_INT_STATUS_NORM_CARD_INS_EN_Pos (6UL) /*!< SDMMC EN_INT_STATUS_NORM: CARD_INS_EN (Bit 6) */ -#define SDMMC_EN_INT_STATUS_NORM_CARD_INS_EN_Msk (0x40UL) /*!< SDMMC EN_INT_STATUS_NORM: CARD_INS_EN (Bitfield-Mask: 0x01) */ -#define SDMMC_EN_INT_STATUS_NORM_CARD_REMOVAL_EN_Pos (7UL) /*!< SDMMC EN_INT_STATUS_NORM: CARD_REMOVAL_EN (Bit 7) */ -#define SDMMC_EN_INT_STATUS_NORM_CARD_REMOVAL_EN_Msk (0x80UL) /*!< SDMMC EN_INT_STATUS_NORM: CARD_REMOVAL_EN (Bitfield-Mask: 0x01) */ -#define SDMMC_EN_INT_STATUS_NORM_CARD_INT_EN_Pos (8UL) /*!< SDMMC EN_INT_STATUS_NORM: CARD_INT_EN (Bit 8) */ -#define SDMMC_EN_INT_STATUS_NORM_CARD_INT_EN_Msk (0x100UL) /*!< SDMMC EN_INT_STATUS_NORM: CARD_INT_EN (Bitfield-Mask: 0x01) */ -#define SDMMC_EN_INT_STATUS_NORM_FIXED_TO_0_Pos (15UL) /*!< SDMMC EN_INT_STATUS_NORM: FIXED_TO_0 (Bit 15) */ -#define SDMMC_EN_INT_STATUS_NORM_FIXED_TO_0_Msk (0x8000UL) /*!< SDMMC EN_INT_STATUS_NORM: FIXED_TO_0 (Bitfield-Mask: 0x01) */ - -/* --------------------------- SDMMC_EN_INT_STATUS_ERR -------------------------- */ -#define SDMMC_EN_INT_STATUS_ERR_CMD_TIMEOUT_ERR_EN_Pos (0UL) /*!< SDMMC EN_INT_STATUS_ERR: CMD_TIMEOUT_ERR_EN (Bit 0) */ -#define SDMMC_EN_INT_STATUS_ERR_CMD_TIMEOUT_ERR_EN_Msk (0x1UL) /*!< SDMMC EN_INT_STATUS_ERR: CMD_TIMEOUT_ERR_EN (Bitfield-Mask: 0x01) */ -#define SDMMC_EN_INT_STATUS_ERR_CMD_CRC_ERR_EN_Pos (1UL) /*!< SDMMC EN_INT_STATUS_ERR: CMD_CRC_ERR_EN (Bit 1) */ -#define SDMMC_EN_INT_STATUS_ERR_CMD_CRC_ERR_EN_Msk (0x2UL) /*!< SDMMC EN_INT_STATUS_ERR: CMD_CRC_ERR_EN (Bitfield-Mask: 0x01) */ -#define SDMMC_EN_INT_STATUS_ERR_CMD_END_BIT_ERR_EN_Pos (2UL) /*!< SDMMC EN_INT_STATUS_ERR: CMD_END_BIT_ERR_EN (Bit 2) */ -#define SDMMC_EN_INT_STATUS_ERR_CMD_END_BIT_ERR_EN_Msk (0x4UL) /*!< SDMMC EN_INT_STATUS_ERR: CMD_END_BIT_ERR_EN (Bitfield-Mask: 0x01) */ -#define SDMMC_EN_INT_STATUS_ERR_CMD_IND_ERR_EN_Pos (3UL) /*!< SDMMC EN_INT_STATUS_ERR: CMD_IND_ERR_EN (Bit 3) */ -#define SDMMC_EN_INT_STATUS_ERR_CMD_IND_ERR_EN_Msk (0x8UL) /*!< SDMMC EN_INT_STATUS_ERR: CMD_IND_ERR_EN (Bitfield-Mask: 0x01) */ -#define SDMMC_EN_INT_STATUS_ERR_DATA_TIMEOUT_ERR_EN_Pos (4UL) /*!< SDMMC EN_INT_STATUS_ERR: DATA_TIMEOUT_ERR_EN (Bit 4) */ -#define SDMMC_EN_INT_STATUS_ERR_DATA_TIMEOUT_ERR_EN_Msk (0x10UL) /*!< SDMMC EN_INT_STATUS_ERR: DATA_TIMEOUT_ERR_EN (Bitfield-Mask: 0x01) */ -#define SDMMC_EN_INT_STATUS_ERR_DATA_CRC_ERR_EN_Pos (5UL) /*!< SDMMC EN_INT_STATUS_ERR: DATA_CRC_ERR_EN (Bit 5) */ -#define SDMMC_EN_INT_STATUS_ERR_DATA_CRC_ERR_EN_Msk (0x20UL) /*!< SDMMC EN_INT_STATUS_ERR: DATA_CRC_ERR_EN (Bitfield-Mask: 0x01) */ -#define SDMMC_EN_INT_STATUS_ERR_DATA_END_BIT_ERR_EN_Pos (6UL) /*!< SDMMC EN_INT_STATUS_ERR: DATA_END_BIT_ERR_EN (Bit 6) */ -#define SDMMC_EN_INT_STATUS_ERR_DATA_END_BIT_ERR_EN_Msk (0x40UL) /*!< SDMMC EN_INT_STATUS_ERR: DATA_END_BIT_ERR_EN (Bitfield-Mask: 0x01) */ -#define SDMMC_EN_INT_STATUS_ERR_CURRENT_LIMIT_ERR_EN_Pos (7UL) /*!< SDMMC EN_INT_STATUS_ERR: CURRENT_LIMIT_ERR_EN (Bit 7) */ -#define SDMMC_EN_INT_STATUS_ERR_CURRENT_LIMIT_ERR_EN_Msk (0x80UL) /*!< SDMMC EN_INT_STATUS_ERR: CURRENT_LIMIT_ERR_EN (Bitfield-Mask: 0x01) */ -#define SDMMC_EN_INT_STATUS_ERR_ACMD_ERR_EN_Pos (8UL) /*!< SDMMC EN_INT_STATUS_ERR: ACMD_ERR_EN (Bit 8) */ -#define SDMMC_EN_INT_STATUS_ERR_ACMD_ERR_EN_Msk (0x100UL) /*!< SDMMC EN_INT_STATUS_ERR: ACMD_ERR_EN (Bitfield-Mask: 0x01) */ -#define SDMMC_EN_INT_STATUS_ERR_TARGET_RESP_ERR_EN_Pos (12UL) /*!< SDMMC EN_INT_STATUS_ERR: TARGET_RESP_ERR_EN (Bit 12) */ -#define SDMMC_EN_INT_STATUS_ERR_TARGET_RESP_ERR_EN_Msk (0x1000UL) /*!< SDMMC EN_INT_STATUS_ERR: TARGET_RESP_ERR_EN (Bitfield-Mask: 0x01) */ -#define SDMMC_EN_INT_STATUS_ERR_CEATA_ERR_EN_Pos (13UL) /*!< SDMMC EN_INT_STATUS_ERR: CEATA_ERR_EN (Bit 13) */ -#define SDMMC_EN_INT_STATUS_ERR_CEATA_ERR_EN_Msk (0x2000UL) /*!< SDMMC EN_INT_STATUS_ERR: CEATA_ERR_EN (Bitfield-Mask: 0x01) */ - -/* -------------------------- SDMMC_EN_INT_SIGNAL_NORM -------------------------- */ -#define SDMMC_EN_INT_SIGNAL_NORM_CMD_COMPLETE_EN_Pos (0UL) /*!< SDMMC EN_INT_SIGNAL_NORM: CMD_COMPLETE_EN (Bit 0) */ -#define SDMMC_EN_INT_SIGNAL_NORM_CMD_COMPLETE_EN_Msk (0x1UL) /*!< SDMMC EN_INT_SIGNAL_NORM: CMD_COMPLETE_EN (Bitfield-Mask: 0x01) */ -#define SDMMC_EN_INT_SIGNAL_NORM_TX_COMPLETE_EN_Pos (1UL) /*!< SDMMC EN_INT_SIGNAL_NORM: TX_COMPLETE_EN (Bit 1) */ -#define SDMMC_EN_INT_SIGNAL_NORM_TX_COMPLETE_EN_Msk (0x2UL) /*!< SDMMC EN_INT_SIGNAL_NORM: TX_COMPLETE_EN (Bitfield-Mask: 0x01) */ -#define SDMMC_EN_INT_SIGNAL_NORM_BLOCK_GAP_EVENT_EN_Pos (2UL) /*!< SDMMC EN_INT_SIGNAL_NORM: BLOCK_GAP_EVENT_EN (Bit 2) */ -#define SDMMC_EN_INT_SIGNAL_NORM_BLOCK_GAP_EVENT_EN_Msk (0x4UL) /*!< SDMMC EN_INT_SIGNAL_NORM: BLOCK_GAP_EVENT_EN (Bitfield-Mask: 0x01) */ -#define SDMMC_EN_INT_SIGNAL_NORM_BUFF_WRITE_READY_EN_Pos (4UL) /*!< SDMMC EN_INT_SIGNAL_NORM: BUFF_WRITE_READY_EN (Bit 4) */ -#define SDMMC_EN_INT_SIGNAL_NORM_BUFF_WRITE_READY_EN_Msk (0x10UL) /*!< SDMMC EN_INT_SIGNAL_NORM: BUFF_WRITE_READY_EN (Bitfield-Mask: 0x01) */ -#define SDMMC_EN_INT_SIGNAL_NORM_BUFF_READ_READY_EN_Pos (5UL) /*!< SDMMC EN_INT_SIGNAL_NORM: BUFF_READ_READY_EN (Bit 5) */ -#define SDMMC_EN_INT_SIGNAL_NORM_BUFF_READ_READY_EN_Msk (0x20UL) /*!< SDMMC EN_INT_SIGNAL_NORM: BUFF_READ_READY_EN (Bitfield-Mask: 0x01) */ -#define SDMMC_EN_INT_SIGNAL_NORM_CARD_INS_EN_Pos (6UL) /*!< SDMMC EN_INT_SIGNAL_NORM: CARD_INS_EN (Bit 6) */ -#define SDMMC_EN_INT_SIGNAL_NORM_CARD_INS_EN_Msk (0x40UL) /*!< SDMMC EN_INT_SIGNAL_NORM: CARD_INS_EN (Bitfield-Mask: 0x01) */ -#define SDMMC_EN_INT_SIGNAL_NORM_CARD_REMOVAL_EN_Pos (7UL) /*!< SDMMC EN_INT_SIGNAL_NORM: CARD_REMOVAL_EN (Bit 7) */ -#define SDMMC_EN_INT_SIGNAL_NORM_CARD_REMOVAL_EN_Msk (0x80UL) /*!< SDMMC EN_INT_SIGNAL_NORM: CARD_REMOVAL_EN (Bitfield-Mask: 0x01) */ -#define SDMMC_EN_INT_SIGNAL_NORM_CARD_INT_EN_Pos (8UL) /*!< SDMMC EN_INT_SIGNAL_NORM: CARD_INT_EN (Bit 8) */ -#define SDMMC_EN_INT_SIGNAL_NORM_CARD_INT_EN_Msk (0x100UL) /*!< SDMMC EN_INT_SIGNAL_NORM: CARD_INT_EN (Bitfield-Mask: 0x01) */ -#define SDMMC_EN_INT_SIGNAL_NORM_FIXED_TO_0_Pos (15UL) /*!< SDMMC EN_INT_SIGNAL_NORM: FIXED_TO_0 (Bit 15) */ -#define SDMMC_EN_INT_SIGNAL_NORM_FIXED_TO_0_Msk (0x8000UL) /*!< SDMMC EN_INT_SIGNAL_NORM: FIXED_TO_0 (Bitfield-Mask: 0x01) */ - -/* --------------------------- SDMMC_EN_INT_SIGNAL_ERR -------------------------- */ -#define SDMMC_EN_INT_SIGNAL_ERR_CMD_TIMEOUT_ERR_EN_Pos (0UL) /*!< SDMMC EN_INT_SIGNAL_ERR: CMD_TIMEOUT_ERR_EN (Bit 0) */ -#define SDMMC_EN_INT_SIGNAL_ERR_CMD_TIMEOUT_ERR_EN_Msk (0x1UL) /*!< SDMMC EN_INT_SIGNAL_ERR: CMD_TIMEOUT_ERR_EN (Bitfield-Mask: 0x01) */ -#define SDMMC_EN_INT_SIGNAL_ERR_CMD_CRC_ERR_EN_Pos (1UL) /*!< SDMMC EN_INT_SIGNAL_ERR: CMD_CRC_ERR_EN (Bit 1) */ -#define SDMMC_EN_INT_SIGNAL_ERR_CMD_CRC_ERR_EN_Msk (0x2UL) /*!< SDMMC EN_INT_SIGNAL_ERR: CMD_CRC_ERR_EN (Bitfield-Mask: 0x01) */ -#define SDMMC_EN_INT_SIGNAL_ERR_CMD_END_BIT_ERR_EN_Pos (2UL) /*!< SDMMC EN_INT_SIGNAL_ERR: CMD_END_BIT_ERR_EN (Bit 2) */ -#define SDMMC_EN_INT_SIGNAL_ERR_CMD_END_BIT_ERR_EN_Msk (0x4UL) /*!< SDMMC EN_INT_SIGNAL_ERR: CMD_END_BIT_ERR_EN (Bitfield-Mask: 0x01) */ -#define SDMMC_EN_INT_SIGNAL_ERR_CMD_IND_ERR_EN_Pos (3UL) /*!< SDMMC EN_INT_SIGNAL_ERR: CMD_IND_ERR_EN (Bit 3) */ -#define SDMMC_EN_INT_SIGNAL_ERR_CMD_IND_ERR_EN_Msk (0x8UL) /*!< SDMMC EN_INT_SIGNAL_ERR: CMD_IND_ERR_EN (Bitfield-Mask: 0x01) */ -#define SDMMC_EN_INT_SIGNAL_ERR_DATA_TIMEOUT_ERR_EN_Pos (4UL) /*!< SDMMC EN_INT_SIGNAL_ERR: DATA_TIMEOUT_ERR_EN (Bit 4) */ -#define SDMMC_EN_INT_SIGNAL_ERR_DATA_TIMEOUT_ERR_EN_Msk (0x10UL) /*!< SDMMC EN_INT_SIGNAL_ERR: DATA_TIMEOUT_ERR_EN (Bitfield-Mask: 0x01) */ -#define SDMMC_EN_INT_SIGNAL_ERR_DATA_CRC_ERR_EN_Pos (5UL) /*!< SDMMC EN_INT_SIGNAL_ERR: DATA_CRC_ERR_EN (Bit 5) */ -#define SDMMC_EN_INT_SIGNAL_ERR_DATA_CRC_ERR_EN_Msk (0x20UL) /*!< SDMMC EN_INT_SIGNAL_ERR: DATA_CRC_ERR_EN (Bitfield-Mask: 0x01) */ -#define SDMMC_EN_INT_SIGNAL_ERR_DATA_END_BIT_ERR_EN_Pos (6UL) /*!< SDMMC EN_INT_SIGNAL_ERR: DATA_END_BIT_ERR_EN (Bit 6) */ -#define SDMMC_EN_INT_SIGNAL_ERR_DATA_END_BIT_ERR_EN_Msk (0x40UL) /*!< SDMMC EN_INT_SIGNAL_ERR: DATA_END_BIT_ERR_EN (Bitfield-Mask: 0x01) */ -#define SDMMC_EN_INT_SIGNAL_ERR_CURRENT_LIMIT_ERR_EN_Pos (7UL) /*!< SDMMC EN_INT_SIGNAL_ERR: CURRENT_LIMIT_ERR_EN (Bit 7) */ -#define SDMMC_EN_INT_SIGNAL_ERR_CURRENT_LIMIT_ERR_EN_Msk (0x80UL) /*!< SDMMC EN_INT_SIGNAL_ERR: CURRENT_LIMIT_ERR_EN (Bitfield-Mask: 0x01) */ -#define SDMMC_EN_INT_SIGNAL_ERR_ACMD_ERR_EN_Pos (8UL) /*!< SDMMC EN_INT_SIGNAL_ERR: ACMD_ERR_EN (Bit 8) */ -#define SDMMC_EN_INT_SIGNAL_ERR_ACMD_ERR_EN_Msk (0x100UL) /*!< SDMMC EN_INT_SIGNAL_ERR: ACMD_ERR_EN (Bitfield-Mask: 0x01) */ -#define SDMMC_EN_INT_SIGNAL_ERR_TARGET_RESP_ERR_EN_Pos (12UL) /*!< SDMMC EN_INT_SIGNAL_ERR: TARGET_RESP_ERR_EN (Bit 12) */ -#define SDMMC_EN_INT_SIGNAL_ERR_TARGET_RESP_ERR_EN_Msk (0x1000UL) /*!< SDMMC EN_INT_SIGNAL_ERR: TARGET_RESP_ERR_EN (Bitfield-Mask: 0x01) */ -#define SDMMC_EN_INT_SIGNAL_ERR_CEATA_ERR_EN_Pos (13UL) /*!< SDMMC EN_INT_SIGNAL_ERR: CEATA_ERR_EN (Bit 13) */ -#define SDMMC_EN_INT_SIGNAL_ERR_CEATA_ERR_EN_Msk (0x2000UL) /*!< SDMMC EN_INT_SIGNAL_ERR: CEATA_ERR_EN (Bitfield-Mask: 0x01) */ - -/* ---------------------------- SDMMC_ACMD_ERR_STATUS --------------------------- */ -#define SDMMC_ACMD_ERR_STATUS_ACMD12_NOT_EXEC_ERR_Pos (0UL) /*!< SDMMC ACMD_ERR_STATUS: ACMD12_NOT_EXEC_ERR (Bit 0) */ -#define SDMMC_ACMD_ERR_STATUS_ACMD12_NOT_EXEC_ERR_Msk (0x1UL) /*!< SDMMC ACMD_ERR_STATUS: ACMD12_NOT_EXEC_ERR (Bitfield-Mask: 0x01) */ -#define SDMMC_ACMD_ERR_STATUS_ACMD_TIMEOUT_ERR_Pos (1UL) /*!< SDMMC ACMD_ERR_STATUS: ACMD_TIMEOUT_ERR (Bit 1) */ -#define SDMMC_ACMD_ERR_STATUS_ACMD_TIMEOUT_ERR_Msk (0x2UL) /*!< SDMMC ACMD_ERR_STATUS: ACMD_TIMEOUT_ERR (Bitfield-Mask: 0x01) */ -#define SDMMC_ACMD_ERR_STATUS_ACMD_CRC_ERR_Pos (2UL) /*!< SDMMC ACMD_ERR_STATUS: ACMD_CRC_ERR (Bit 2) */ -#define SDMMC_ACMD_ERR_STATUS_ACMD_CRC_ERR_Msk (0x4UL) /*!< SDMMC ACMD_ERR_STATUS: ACMD_CRC_ERR (Bitfield-Mask: 0x01) */ -#define SDMMC_ACMD_ERR_STATUS_ACMD_END_BIT_ERR_Pos (3UL) /*!< SDMMC ACMD_ERR_STATUS: ACMD_END_BIT_ERR (Bit 3) */ -#define SDMMC_ACMD_ERR_STATUS_ACMD_END_BIT_ERR_Msk (0x8UL) /*!< SDMMC ACMD_ERR_STATUS: ACMD_END_BIT_ERR (Bitfield-Mask: 0x01) */ -#define SDMMC_ACMD_ERR_STATUS_ACMD_IND_ERR_Pos (4UL) /*!< SDMMC ACMD_ERR_STATUS: ACMD_IND_ERR (Bit 4) */ -#define SDMMC_ACMD_ERR_STATUS_ACMD_IND_ERR_Msk (0x10UL) /*!< SDMMC ACMD_ERR_STATUS: ACMD_IND_ERR (Bitfield-Mask: 0x01) */ -#define SDMMC_ACMD_ERR_STATUS_CMD_NOT_ISSUED_BY_ACMD12_ERR_Pos (7UL) /*!< SDMMC ACMD_ERR_STATUS: CMD_NOT_ISSUED_BY_ACMD12_ERR (Bit 7) */ -#define SDMMC_ACMD_ERR_STATUS_CMD_NOT_ISSUED_BY_ACMD12_ERR_Msk (0x80UL) /*!< SDMMC ACMD_ERR_STATUS: CMD_NOT_ISSUED_BY_ACMD12_ERR (Bitfield-Mask: 0x01) */ - -/* ----------------------------- SDMMC_CAPABILITIES ----------------------------- */ -#define SDMMC_CAPABILITIES_TIMEOUT_CLOCK_FREQ_Pos (0UL) /*!< SDMMC CAPABILITIES: TIMEOUT_CLOCK_FREQ (Bit 0) */ -#define SDMMC_CAPABILITIES_TIMEOUT_CLOCK_FREQ_Msk (0x3fUL) /*!< SDMMC CAPABILITIES: TIMEOUT_CLOCK_FREQ (Bitfield-Mask: 0x3f) */ -#define SDMMC_CAPABILITIES_TIMEOUT_CLOCK_UNIT_Pos (7UL) /*!< SDMMC CAPABILITIES: TIMEOUT_CLOCK_UNIT (Bit 7) */ -#define SDMMC_CAPABILITIES_TIMEOUT_CLOCK_UNIT_Msk (0x80UL) /*!< SDMMC CAPABILITIES: TIMEOUT_CLOCK_UNIT (Bitfield-Mask: 0x01) */ -#define SDMMC_CAPABILITIES_BASE_SD_CLOCK_FREQ_Pos (8UL) /*!< SDMMC CAPABILITIES: BASE_SD_CLOCK_FREQ (Bit 8) */ -#define SDMMC_CAPABILITIES_BASE_SD_CLOCK_FREQ_Msk (0xff00UL) /*!< SDMMC CAPABILITIES: BASE_SD_CLOCK_FREQ (Bitfield-Mask: 0xff) */ -#define SDMMC_CAPABILITIES_MAX_BLOCK_LENGTH_Pos (16UL) /*!< SDMMC CAPABILITIES: MAX_BLOCK_LENGTH (Bit 16) */ -#define SDMMC_CAPABILITIES_MAX_BLOCK_LENGTH_Msk (0x30000UL) /*!< SDMMC CAPABILITIES: MAX_BLOCK_LENGTH (Bitfield-Mask: 0x03) */ -#define SDMMC_CAPABILITIES_EXT_MEDIA_BUS_SUPPORT_Pos (18UL) /*!< SDMMC CAPABILITIES: EXT_MEDIA_BUS_SUPPORT (Bit 18) */ -#define SDMMC_CAPABILITIES_EXT_MEDIA_BUS_SUPPORT_Msk (0x40000UL) /*!< SDMMC CAPABILITIES: EXT_MEDIA_BUS_SUPPORT (Bitfield-Mask: 0x01) */ -#define SDMMC_CAPABILITIES_ADMA2_SUPPORT_Pos (19UL) /*!< SDMMC CAPABILITIES: ADMA2_SUPPORT (Bit 19) */ -#define SDMMC_CAPABILITIES_ADMA2_SUPPORT_Msk (0x80000UL) /*!< SDMMC CAPABILITIES: ADMA2_SUPPORT (Bitfield-Mask: 0x01) */ -#define SDMMC_CAPABILITIES_HIGH_SPEED_SUPPORT_Pos (21UL) /*!< SDMMC CAPABILITIES: HIGH_SPEED_SUPPORT (Bit 21) */ -#define SDMMC_CAPABILITIES_HIGH_SPEED_SUPPORT_Msk (0x200000UL) /*!< SDMMC CAPABILITIES: HIGH_SPEED_SUPPORT (Bitfield-Mask: 0x01) */ -#define SDMMC_CAPABILITIES_SDMA_SUPPORT_Pos (22UL) /*!< SDMMC CAPABILITIES: SDMA_SUPPORT (Bit 22) */ -#define SDMMC_CAPABILITIES_SDMA_SUPPORT_Msk (0x400000UL) /*!< SDMMC CAPABILITIES: SDMA_SUPPORT (Bitfield-Mask: 0x01) */ -#define SDMMC_CAPABILITIES_SUSPEND_RESUME_SUPPORT_Pos (23UL) /*!< SDMMC CAPABILITIES: SUSPEND_RESUME_SUPPORT (Bit 23) */ -#define SDMMC_CAPABILITIES_SUSPEND_RESUME_SUPPORT_Msk (0x800000UL) /*!< SDMMC CAPABILITIES: SUSPEND_RESUME_SUPPORT (Bitfield-Mask: 0x01) */ -#define SDMMC_CAPABILITIES_VOLTAGE_SUPPORT_3_3V_Pos (24UL) /*!< SDMMC CAPABILITIES: VOLTAGE_SUPPORT_3_3V (Bit 24) */ -#define SDMMC_CAPABILITIES_VOLTAGE_SUPPORT_3_3V_Msk (0x1000000UL) /*!< SDMMC CAPABILITIES: VOLTAGE_SUPPORT_3_3V (Bitfield-Mask: 0x01) */ -#define SDMMC_CAPABILITIES_VOLTAGE_SUPPORT_3V_Pos (25UL) /*!< SDMMC CAPABILITIES: VOLTAGE_SUPPORT_3V (Bit 25) */ -#define SDMMC_CAPABILITIES_VOLTAGE_SUPPORT_3V_Msk (0x2000000UL) /*!< SDMMC CAPABILITIES: VOLTAGE_SUPPORT_3V (Bitfield-Mask: 0x01) */ -#define SDMMC_CAPABILITIES_VOLTAGE_SUPPORT_1_8V_Pos (26UL) /*!< SDMMC CAPABILITIES: VOLTAGE_SUPPORT_1_8V (Bit 26) */ -#define SDMMC_CAPABILITIES_VOLTAGE_SUPPORT_1_8V_Msk (0x4000000UL) /*!< SDMMC CAPABILITIES: VOLTAGE_SUPPORT_1_8V (Bitfield-Mask: 0x01) */ -#define SDMMC_CAPABILITIES_SYSBUS_64_SUPPORT_Pos (28UL) /*!< SDMMC CAPABILITIES: SYSBUS_64_SUPPORT (Bit 28) */ -#define SDMMC_CAPABILITIES_SYSBUS_64_SUPPORT_Msk (0x10000000UL) /*!< SDMMC CAPABILITIES: SYSBUS_64_SUPPORT (Bitfield-Mask: 0x01) */ -#define SDMMC_CAPABILITIES_ASYNC_INT_SUPPORT_Pos (29UL) /*!< SDMMC CAPABILITIES: ASYNC_INT_SUPPORT (Bit 29) */ -#define SDMMC_CAPABILITIES_ASYNC_INT_SUPPORT_Msk (0x20000000UL) /*!< SDMMC CAPABILITIES: ASYNC_INT_SUPPORT (Bitfield-Mask: 0x01) */ -#define SDMMC_CAPABILITIES_SLOT_TYPE_Pos (30UL) /*!< SDMMC CAPABILITIES: SLOT_TYPE (Bit 30) */ -#define SDMMC_CAPABILITIES_SLOT_TYPE_Msk (0xc0000000UL) /*!< SDMMC CAPABILITIES: SLOT_TYPE (Bitfield-Mask: 0x03) */ - -/* ---------------------------- SDMMC_CAPABILITIES_HI --------------------------- */ -#define SDMMC_CAPABILITIES_HI_SDR50_SUPPORT_Pos (0UL) /*!< SDMMC CAPABILITIES_HI: SDR50_SUPPORT (Bit 0) */ -#define SDMMC_CAPABILITIES_HI_SDR50_SUPPORT_Msk (0x1UL) /*!< SDMMC CAPABILITIES_HI: SDR50_SUPPORT (Bitfield-Mask: 0x01) */ -#define SDMMC_CAPABILITIES_HI_SDR104_SUPPORT_Pos (1UL) /*!< SDMMC CAPABILITIES_HI: SDR104_SUPPORT (Bit 1) */ -#define SDMMC_CAPABILITIES_HI_SDR104_SUPPORT_Msk (0x2UL) /*!< SDMMC CAPABILITIES_HI: SDR104_SUPPORT (Bitfield-Mask: 0x01) */ -#define SDMMC_CAPABILITIES_HI_DDR50_SUPPORT_Pos (2UL) /*!< SDMMC CAPABILITIES_HI: DDR50_SUPPORT (Bit 2) */ -#define SDMMC_CAPABILITIES_HI_DDR50_SUPPORT_Msk (0x4UL) /*!< SDMMC CAPABILITIES_HI: DDR50_SUPPORT (Bitfield-Mask: 0x01) */ -#define SDMMC_CAPABILITIES_HI_DRV_A_SUPPORT_Pos (4UL) /*!< SDMMC CAPABILITIES_HI: DRV_A_SUPPORT (Bit 4) */ -#define SDMMC_CAPABILITIES_HI_DRV_A_SUPPORT_Msk (0x10UL) /*!< SDMMC CAPABILITIES_HI: DRV_A_SUPPORT (Bitfield-Mask: 0x01) */ -#define SDMMC_CAPABILITIES_HI_DRV_C_SUPPORT_Pos (5UL) /*!< SDMMC CAPABILITIES_HI: DRV_C_SUPPORT (Bit 5) */ -#define SDMMC_CAPABILITIES_HI_DRV_C_SUPPORT_Msk (0x20UL) /*!< SDMMC CAPABILITIES_HI: DRV_C_SUPPORT (Bitfield-Mask: 0x01) */ -#define SDMMC_CAPABILITIES_HI_DRV_D_SUPPORT_Pos (6UL) /*!< SDMMC CAPABILITIES_HI: DRV_D_SUPPORT (Bit 6) */ -#define SDMMC_CAPABILITIES_HI_DRV_D_SUPPORT_Msk (0x40UL) /*!< SDMMC CAPABILITIES_HI: DRV_D_SUPPORT (Bitfield-Mask: 0x01) */ -#define SDMMC_CAPABILITIES_HI_TIM_CNT_RETUNE_Pos (8UL) /*!< SDMMC CAPABILITIES_HI: TIM_CNT_RETUNE (Bit 8) */ -#define SDMMC_CAPABILITIES_HI_TIM_CNT_RETUNE_Msk (0xf00UL) /*!< SDMMC CAPABILITIES_HI: TIM_CNT_RETUNE (Bitfield-Mask: 0x0f) */ -#define SDMMC_CAPABILITIES_HI_USE_TUNING_SDR50_Pos (13UL) /*!< SDMMC CAPABILITIES_HI: USE_TUNING_SDR50 (Bit 13) */ -#define SDMMC_CAPABILITIES_HI_USE_TUNING_SDR50_Msk (0x2000UL) /*!< SDMMC CAPABILITIES_HI: USE_TUNING_SDR50 (Bitfield-Mask: 0x01) */ -#define SDMMC_CAPABILITIES_HI_RE_TUNING_MODES_Pos (14UL) /*!< SDMMC CAPABILITIES_HI: RE_TUNING_MODES (Bit 14) */ -#define SDMMC_CAPABILITIES_HI_RE_TUNING_MODES_Msk (0xc000UL) /*!< SDMMC CAPABILITIES_HI: RE_TUNING_MODES (Bitfield-Mask: 0x03) */ -#define SDMMC_CAPABILITIES_HI_CLK_MULT_Pos (16UL) /*!< SDMMC CAPABILITIES_HI: CLK_MULT (Bit 16) */ -#define SDMMC_CAPABILITIES_HI_CLK_MULT_Msk (0xff0000UL) /*!< SDMMC CAPABILITIES_HI: CLK_MULT (Bitfield-Mask: 0xff) */ - -/* ---------------------------- SDMMC_MAX_CURRENT_CAP --------------------------- */ -#define SDMMC_MAX_CURRENT_CAP_MAX_CURRENT_FOR_3_3V_Pos (0UL) /*!< SDMMC MAX_CURRENT_CAP: MAX_CURRENT_FOR_3_3V (Bit 0) */ -#define SDMMC_MAX_CURRENT_CAP_MAX_CURRENT_FOR_3_3V_Msk (0xffUL) /*!< SDMMC MAX_CURRENT_CAP: MAX_CURRENT_FOR_3_3V (Bitfield-Mask: 0xff) */ - -/* ---------------------- SDMMC_FORCE_EVENT_ACMD_ERR_STATUS --------------------- */ -#define SDMMC_FORCE_EVENT_ACMD_ERR_STATUS_FE_ACMD_NOT_EXEC_Pos (0UL) /*!< SDMMC FORCE_EVENT_ACMD_ERR_STATUS: FE_ACMD_NOT_EXEC (Bit 0) */ -#define SDMMC_FORCE_EVENT_ACMD_ERR_STATUS_FE_ACMD_NOT_EXEC_Msk (0x1UL) /*!< SDMMC FORCE_EVENT_ACMD_ERR_STATUS: FE_ACMD_NOT_EXEC (Bitfield-Mask: 0x01) */ -#define SDMMC_FORCE_EVENT_ACMD_ERR_STATUS_FE_ACMD_TIMEOUT_ERR_Pos (1UL) /*!< SDMMC FORCE_EVENT_ACMD_ERR_STATUS: FE_ACMD_TIMEOUT_ERR (Bit 1) */ -#define SDMMC_FORCE_EVENT_ACMD_ERR_STATUS_FE_ACMD_TIMEOUT_ERR_Msk (0x2UL) /*!< SDMMC FORCE_EVENT_ACMD_ERR_STATUS: FE_ACMD_TIMEOUT_ERR (Bitfield-Mask: 0x01) */ -#define SDMMC_FORCE_EVENT_ACMD_ERR_STATUS_FE_ACMD_CRC_ERR_Pos (2UL) /*!< SDMMC FORCE_EVENT_ACMD_ERR_STATUS: FE_ACMD_CRC_ERR (Bit 2) */ -#define SDMMC_FORCE_EVENT_ACMD_ERR_STATUS_FE_ACMD_CRC_ERR_Msk (0x4UL) /*!< SDMMC FORCE_EVENT_ACMD_ERR_STATUS: FE_ACMD_CRC_ERR (Bitfield-Mask: 0x01) */ -#define SDMMC_FORCE_EVENT_ACMD_ERR_STATUS_FE_ACMD_END_BIT_ERR_Pos (3UL) /*!< SDMMC FORCE_EVENT_ACMD_ERR_STATUS: FE_ACMD_END_BIT_ERR (Bit 3) */ -#define SDMMC_FORCE_EVENT_ACMD_ERR_STATUS_FE_ACMD_END_BIT_ERR_Msk (0x8UL) /*!< SDMMC FORCE_EVENT_ACMD_ERR_STATUS: FE_ACMD_END_BIT_ERR (Bitfield-Mask: 0x01) */ -#define SDMMC_FORCE_EVENT_ACMD_ERR_STATUS_FE_ACMD_IND_ERR_Pos (4UL) /*!< SDMMC FORCE_EVENT_ACMD_ERR_STATUS: FE_ACMD_IND_ERR (Bit 4) */ -#define SDMMC_FORCE_EVENT_ACMD_ERR_STATUS_FE_ACMD_IND_ERR_Msk (0x10UL) /*!< SDMMC FORCE_EVENT_ACMD_ERR_STATUS: FE_ACMD_IND_ERR (Bitfield-Mask: 0x01) */ -#define SDMMC_FORCE_EVENT_ACMD_ERR_STATUS_FE_CMD_NOT_ISSUED_ACMD12_ERR_Pos (7UL) /*!< SDMMC FORCE_EVENT_ACMD_ERR_STATUS: FE_CMD_NOT_ISSUED_ACMD12_ERR (Bit 7) */ -#define SDMMC_FORCE_EVENT_ACMD_ERR_STATUS_FE_CMD_NOT_ISSUED_ACMD12_ERR_Msk (0x80UL) /*!< SDMMC FORCE_EVENT_ACMD_ERR_STATUS: FE_CMD_NOT_ISSUED_ACMD12_ERR (Bitfield-Mask: 0x01) */ - -/* ------------------------ SDMMC_FORCE_EVENT_ERR_STATUS ------------------------ */ -#define SDMMC_FORCE_EVENT_ERR_STATUS_FE_CMD_TIMEOUT_ERR_Pos (0UL) /*!< SDMMC FORCE_EVENT_ERR_STATUS: FE_CMD_TIMEOUT_ERR (Bit 0) */ -#define SDMMC_FORCE_EVENT_ERR_STATUS_FE_CMD_TIMEOUT_ERR_Msk (0x1UL) /*!< SDMMC FORCE_EVENT_ERR_STATUS: FE_CMD_TIMEOUT_ERR (Bitfield-Mask: 0x01) */ -#define SDMMC_FORCE_EVENT_ERR_STATUS_FE_CMD_CRC_ERR_Pos (1UL) /*!< SDMMC FORCE_EVENT_ERR_STATUS: FE_CMD_CRC_ERR (Bit 1) */ -#define SDMMC_FORCE_EVENT_ERR_STATUS_FE_CMD_CRC_ERR_Msk (0x2UL) /*!< SDMMC FORCE_EVENT_ERR_STATUS: FE_CMD_CRC_ERR (Bitfield-Mask: 0x01) */ -#define SDMMC_FORCE_EVENT_ERR_STATUS_FE_CMD_END_BIT_ERR_Pos (2UL) /*!< SDMMC FORCE_EVENT_ERR_STATUS: FE_CMD_END_BIT_ERR (Bit 2) */ -#define SDMMC_FORCE_EVENT_ERR_STATUS_FE_CMD_END_BIT_ERR_Msk (0x4UL) /*!< SDMMC FORCE_EVENT_ERR_STATUS: FE_CMD_END_BIT_ERR (Bitfield-Mask: 0x01) */ -#define SDMMC_FORCE_EVENT_ERR_STATUS_FE_CMD_IND_ERR_Pos (3UL) /*!< SDMMC FORCE_EVENT_ERR_STATUS: FE_CMD_IND_ERR (Bit 3) */ -#define SDMMC_FORCE_EVENT_ERR_STATUS_FE_CMD_IND_ERR_Msk (0x8UL) /*!< SDMMC FORCE_EVENT_ERR_STATUS: FE_CMD_IND_ERR (Bitfield-Mask: 0x01) */ -#define SDMMC_FORCE_EVENT_ERR_STATUS_FE_DATA_TIMEOUT_ERR_Pos (4UL) /*!< SDMMC FORCE_EVENT_ERR_STATUS: FE_DATA_TIMEOUT_ERR (Bit 4) */ -#define SDMMC_FORCE_EVENT_ERR_STATUS_FE_DATA_TIMEOUT_ERR_Msk (0x10UL) /*!< SDMMC FORCE_EVENT_ERR_STATUS: FE_DATA_TIMEOUT_ERR (Bitfield-Mask: 0x01) */ -#define SDMMC_FORCE_EVENT_ERR_STATUS_FE_DATA_CRC_ERR_Pos (5UL) /*!< SDMMC FORCE_EVENT_ERR_STATUS: FE_DATA_CRC_ERR (Bit 5) */ -#define SDMMC_FORCE_EVENT_ERR_STATUS_FE_DATA_CRC_ERR_Msk (0x20UL) /*!< SDMMC FORCE_EVENT_ERR_STATUS: FE_DATA_CRC_ERR (Bitfield-Mask: 0x01) */ -#define SDMMC_FORCE_EVENT_ERR_STATUS_FE_DATA_END_BIT_ERR_Pos (6UL) /*!< SDMMC FORCE_EVENT_ERR_STATUS: FE_DATA_END_BIT_ERR (Bit 6) */ -#define SDMMC_FORCE_EVENT_ERR_STATUS_FE_DATA_END_BIT_ERR_Msk (0x40UL) /*!< SDMMC FORCE_EVENT_ERR_STATUS: FE_DATA_END_BIT_ERR (Bitfield-Mask: 0x01) */ -#define SDMMC_FORCE_EVENT_ERR_STATUS_FE_CURRENT_LIMIT_ERR_Pos (7UL) /*!< SDMMC FORCE_EVENT_ERR_STATUS: FE_CURRENT_LIMIT_ERR (Bit 7) */ -#define SDMMC_FORCE_EVENT_ERR_STATUS_FE_CURRENT_LIMIT_ERR_Msk (0x80UL) /*!< SDMMC FORCE_EVENT_ERR_STATUS: FE_CURRENT_LIMIT_ERR (Bitfield-Mask: 0x01) */ -#define SDMMC_FORCE_EVENT_ERR_STATUS_FE_ACMD12_ERR_Pos (8UL) /*!< SDMMC FORCE_EVENT_ERR_STATUS: FE_ACMD12_ERR (Bit 8) */ -#define SDMMC_FORCE_EVENT_ERR_STATUS_FE_ACMD12_ERR_Msk (0x100UL) /*!< SDMMC FORCE_EVENT_ERR_STATUS: FE_ACMD12_ERR (Bitfield-Mask: 0x01) */ -#define SDMMC_FORCE_EVENT_ERR_STATUS_FE_TARGET_RESPONSE_ERR_Pos (12UL) /*!< SDMMC FORCE_EVENT_ERR_STATUS: FE_TARGET_RESPONSE_ERR (Bit 12) */ -#define SDMMC_FORCE_EVENT_ERR_STATUS_FE_TARGET_RESPONSE_ERR_Msk (0x1000UL) /*!< SDMMC FORCE_EVENT_ERR_STATUS: FE_TARGET_RESPONSE_ERR (Bitfield-Mask: 0x01) */ -#define SDMMC_FORCE_EVENT_ERR_STATUS_FE_CEATA_ERR_Pos (13UL) /*!< SDMMC FORCE_EVENT_ERR_STATUS: FE_CEATA_ERR (Bit 13) */ -#define SDMMC_FORCE_EVENT_ERR_STATUS_FE_CEATA_ERR_Msk (0x2000UL) /*!< SDMMC FORCE_EVENT_ERR_STATUS: FE_CEATA_ERR (Bitfield-Mask: 0x01) */ - -/* ------------------------------- SDMMC_DEBUG_SEL ------------------------------ */ -#define SDMMC_DEBUG_SEL_DEBUG_SEL_Pos (0UL) /*!< SDMMC DEBUG_SEL: DEBUG_SEL (Bit 0) */ -#define SDMMC_DEBUG_SEL_DEBUG_SEL_Msk (0x1UL) /*!< SDMMC DEBUG_SEL: DEBUG_SEL (Bitfield-Mask: 0x01) */ - -/* ---------------------------- SDMMC_SLOT_INT_STATUS --------------------------- */ -#define SDMMC_SLOT_INT_STATUS_SLOT_INT_STATUS_Pos (0UL) /*!< SDMMC SLOT_INT_STATUS: SLOT_INT_STATUS (Bit 0) */ -#define SDMMC_SLOT_INT_STATUS_SLOT_INT_STATUS_Msk (0xffUL) /*!< SDMMC SLOT_INT_STATUS: SLOT_INT_STATUS (Bitfield-Mask: 0xff) */ - - -/* ================================================================================ */ -/* ================ struct 'EBU' Position & Mask ================ */ -/* ================================================================================ */ - - -/* ----------------------------------- EBU_CLC ---------------------------------- */ -#define EBU_CLC_DISR_Pos (0UL) /*!< EBU CLC: DISR (Bit 0) */ -#define EBU_CLC_DISR_Msk (0x1UL) /*!< EBU CLC: DISR (Bitfield-Mask: 0x01) */ -#define EBU_CLC_DISS_Pos (1UL) /*!< EBU CLC: DISS (Bit 1) */ -#define EBU_CLC_DISS_Msk (0x2UL) /*!< EBU CLC: DISS (Bitfield-Mask: 0x01) */ -#define EBU_CLC_SYNC_Pos (16UL) /*!< EBU CLC: SYNC (Bit 16) */ -#define EBU_CLC_SYNC_Msk (0x10000UL) /*!< EBU CLC: SYNC (Bitfield-Mask: 0x01) */ -#define EBU_CLC_DIV2_Pos (17UL) /*!< EBU CLC: DIV2 (Bit 17) */ -#define EBU_CLC_DIV2_Msk (0x20000UL) /*!< EBU CLC: DIV2 (Bitfield-Mask: 0x01) */ -#define EBU_CLC_EBUDIV_Pos (18UL) /*!< EBU CLC: EBUDIV (Bit 18) */ -#define EBU_CLC_EBUDIV_Msk (0xc0000UL) /*!< EBU CLC: EBUDIV (Bitfield-Mask: 0x03) */ -#define EBU_CLC_SYNCACK_Pos (20UL) /*!< EBU CLC: SYNCACK (Bit 20) */ -#define EBU_CLC_SYNCACK_Msk (0x100000UL) /*!< EBU CLC: SYNCACK (Bitfield-Mask: 0x01) */ -#define EBU_CLC_DIV2ACK_Pos (21UL) /*!< EBU CLC: DIV2ACK (Bit 21) */ -#define EBU_CLC_DIV2ACK_Msk (0x200000UL) /*!< EBU CLC: DIV2ACK (Bitfield-Mask: 0x01) */ -#define EBU_CLC_EBUDIVACK_Pos (22UL) /*!< EBU CLC: EBUDIVACK (Bit 22) */ -#define EBU_CLC_EBUDIVACK_Msk (0xc00000UL) /*!< EBU CLC: EBUDIVACK (Bitfield-Mask: 0x03) */ - -/* --------------------------------- EBU_MODCON --------------------------------- */ -#define EBU_MODCON_STS_Pos (0UL) /*!< EBU MODCON: STS (Bit 0) */ -#define EBU_MODCON_STS_Msk (0x1UL) /*!< EBU MODCON: STS (Bitfield-Mask: 0x01) */ -#define EBU_MODCON_LCKABRT_Pos (1UL) /*!< EBU MODCON: LCKABRT (Bit 1) */ -#define EBU_MODCON_LCKABRT_Msk (0x2UL) /*!< EBU MODCON: LCKABRT (Bitfield-Mask: 0x01) */ -#define EBU_MODCON_SDTRI_Pos (2UL) /*!< EBU MODCON: SDTRI (Bit 2) */ -#define EBU_MODCON_SDTRI_Msk (0x4UL) /*!< EBU MODCON: SDTRI (Bitfield-Mask: 0x01) */ -#define EBU_MODCON_EXTLOCK_Pos (4UL) /*!< EBU MODCON: EXTLOCK (Bit 4) */ -#define EBU_MODCON_EXTLOCK_Msk (0x10UL) /*!< EBU MODCON: EXTLOCK (Bitfield-Mask: 0x01) */ -#define EBU_MODCON_ARBSYNC_Pos (5UL) /*!< EBU MODCON: ARBSYNC (Bit 5) */ -#define EBU_MODCON_ARBSYNC_Msk (0x20UL) /*!< EBU MODCON: ARBSYNC (Bitfield-Mask: 0x01) */ -#define EBU_MODCON_ARBMODE_Pos (6UL) /*!< EBU MODCON: ARBMODE (Bit 6) */ -#define EBU_MODCON_ARBMODE_Msk (0xc0UL) /*!< EBU MODCON: ARBMODE (Bitfield-Mask: 0x03) */ -#define EBU_MODCON_TIMEOUTC_Pos (8UL) /*!< EBU MODCON: TIMEOUTC (Bit 8) */ -#define EBU_MODCON_TIMEOUTC_Msk (0xff00UL) /*!< EBU MODCON: TIMEOUTC (Bitfield-Mask: 0xff) */ -#define EBU_MODCON_LOCKTIMEOUT_Pos (16UL) /*!< EBU MODCON: LOCKTIMEOUT (Bit 16) */ -#define EBU_MODCON_LOCKTIMEOUT_Msk (0xff0000UL) /*!< EBU MODCON: LOCKTIMEOUT (Bitfield-Mask: 0xff) */ -#define EBU_MODCON_GLOBALCS_Pos (24UL) /*!< EBU MODCON: GLOBALCS (Bit 24) */ -#define EBU_MODCON_GLOBALCS_Msk (0xf000000UL) /*!< EBU MODCON: GLOBALCS (Bitfield-Mask: 0x0f) */ -#define EBU_MODCON_ACCSINH_Pos (28UL) /*!< EBU MODCON: ACCSINH (Bit 28) */ -#define EBU_MODCON_ACCSINH_Msk (0x10000000UL) /*!< EBU MODCON: ACCSINH (Bitfield-Mask: 0x01) */ -#define EBU_MODCON_ACCSINHACK_Pos (29UL) /*!< EBU MODCON: ACCSINHACK (Bit 29) */ -#define EBU_MODCON_ACCSINHACK_Msk (0x20000000UL) /*!< EBU MODCON: ACCSINHACK (Bitfield-Mask: 0x01) */ -#define EBU_MODCON_ALE_Pos (31UL) /*!< EBU MODCON: ALE (Bit 31) */ -#define EBU_MODCON_ALE_Msk (0x80000000UL) /*!< EBU MODCON: ALE (Bitfield-Mask: 0x01) */ - -/* ----------------------------------- EBU_ID ----------------------------------- */ -#define EBU_ID_MOD_REV_Pos (0UL) /*!< EBU ID: MOD_REV (Bit 0) */ -#define EBU_ID_MOD_REV_Msk (0xffUL) /*!< EBU ID: MOD_REV (Bitfield-Mask: 0xff) */ -#define EBU_ID_MOD_TYPE_Pos (8UL) /*!< EBU ID: MOD_TYPE (Bit 8) */ -#define EBU_ID_MOD_TYPE_Msk (0xff00UL) /*!< EBU ID: MOD_TYPE (Bitfield-Mask: 0xff) */ -#define EBU_ID_MOD_NUMBER_Pos (16UL) /*!< EBU ID: MOD_NUMBER (Bit 16) */ -#define EBU_ID_MOD_NUMBER_Msk (0xffff0000UL) /*!< EBU ID: MOD_NUMBER (Bitfield-Mask: 0xffff) */ - -/* --------------------------------- EBU_USERCON -------------------------------- */ -#define EBU_USERCON_DIP_Pos (0UL) /*!< EBU USERCON: DIP (Bit 0) */ -#define EBU_USERCON_DIP_Msk (0x1UL) /*!< EBU USERCON: DIP (Bitfield-Mask: 0x01) */ -#define EBU_USERCON_ADDIO_Pos (16UL) /*!< EBU USERCON: ADDIO (Bit 16) */ -#define EBU_USERCON_ADDIO_Msk (0x1ff0000UL) /*!< EBU USERCON: ADDIO (Bitfield-Mask: 0x1ff) */ -#define EBU_USERCON_ADVIO_Pos (25UL) /*!< EBU USERCON: ADVIO (Bit 25) */ -#define EBU_USERCON_ADVIO_Msk (0x2000000UL) /*!< EBU USERCON: ADVIO (Bitfield-Mask: 0x01) */ - -/* -------------------------------- EBU_ADDRSEL0 -------------------------------- */ -#define EBU_ADDRSEL0_REGENAB_Pos (0UL) /*!< EBU ADDRSEL0: REGENAB (Bit 0) */ -#define EBU_ADDRSEL0_REGENAB_Msk (0x1UL) /*!< EBU ADDRSEL0: REGENAB (Bitfield-Mask: 0x01) */ -#define EBU_ADDRSEL0_ALTENAB_Pos (1UL) /*!< EBU ADDRSEL0: ALTENAB (Bit 1) */ -#define EBU_ADDRSEL0_ALTENAB_Msk (0x2UL) /*!< EBU ADDRSEL0: ALTENAB (Bitfield-Mask: 0x01) */ -#define EBU_ADDRSEL0_WPROT_Pos (2UL) /*!< EBU ADDRSEL0: WPROT (Bit 2) */ -#define EBU_ADDRSEL0_WPROT_Msk (0x4UL) /*!< EBU ADDRSEL0: WPROT (Bitfield-Mask: 0x01) */ - -/* -------------------------------- EBU_ADDRSEL1 -------------------------------- */ -#define EBU_ADDRSEL1_REGENAB_Pos (0UL) /*!< EBU ADDRSEL1: REGENAB (Bit 0) */ -#define EBU_ADDRSEL1_REGENAB_Msk (0x1UL) /*!< EBU ADDRSEL1: REGENAB (Bitfield-Mask: 0x01) */ -#define EBU_ADDRSEL1_ALTENAB_Pos (1UL) /*!< EBU ADDRSEL1: ALTENAB (Bit 1) */ -#define EBU_ADDRSEL1_ALTENAB_Msk (0x2UL) /*!< EBU ADDRSEL1: ALTENAB (Bitfield-Mask: 0x01) */ -#define EBU_ADDRSEL1_WPROT_Pos (2UL) /*!< EBU ADDRSEL1: WPROT (Bit 2) */ -#define EBU_ADDRSEL1_WPROT_Msk (0x4UL) /*!< EBU ADDRSEL1: WPROT (Bitfield-Mask: 0x01) */ - -/* -------------------------------- EBU_ADDRSEL2 -------------------------------- */ -#define EBU_ADDRSEL2_REGENAB_Pos (0UL) /*!< EBU ADDRSEL2: REGENAB (Bit 0) */ -#define EBU_ADDRSEL2_REGENAB_Msk (0x1UL) /*!< EBU ADDRSEL2: REGENAB (Bitfield-Mask: 0x01) */ -#define EBU_ADDRSEL2_ALTENAB_Pos (1UL) /*!< EBU ADDRSEL2: ALTENAB (Bit 1) */ -#define EBU_ADDRSEL2_ALTENAB_Msk (0x2UL) /*!< EBU ADDRSEL2: ALTENAB (Bitfield-Mask: 0x01) */ -#define EBU_ADDRSEL2_WPROT_Pos (2UL) /*!< EBU ADDRSEL2: WPROT (Bit 2) */ -#define EBU_ADDRSEL2_WPROT_Msk (0x4UL) /*!< EBU ADDRSEL2: WPROT (Bitfield-Mask: 0x01) */ - -/* -------------------------------- EBU_ADDRSEL3 -------------------------------- */ -#define EBU_ADDRSEL3_REGENAB_Pos (0UL) /*!< EBU ADDRSEL3: REGENAB (Bit 0) */ -#define EBU_ADDRSEL3_REGENAB_Msk (0x1UL) /*!< EBU ADDRSEL3: REGENAB (Bitfield-Mask: 0x01) */ -#define EBU_ADDRSEL3_ALTENAB_Pos (1UL) /*!< EBU ADDRSEL3: ALTENAB (Bit 1) */ -#define EBU_ADDRSEL3_ALTENAB_Msk (0x2UL) /*!< EBU ADDRSEL3: ALTENAB (Bitfield-Mask: 0x01) */ -#define EBU_ADDRSEL3_WPROT_Pos (2UL) /*!< EBU ADDRSEL3: WPROT (Bit 2) */ -#define EBU_ADDRSEL3_WPROT_Msk (0x4UL) /*!< EBU ADDRSEL3: WPROT (Bitfield-Mask: 0x01) */ - -/* -------------------------------- EBU_BUSRCON0 -------------------------------- */ -#define EBU_BUSRCON0_FETBLEN_Pos (0UL) /*!< EBU BUSRCON0: FETBLEN (Bit 0) */ -#define EBU_BUSRCON0_FETBLEN_Msk (0x7UL) /*!< EBU BUSRCON0: FETBLEN (Bitfield-Mask: 0x07) */ -#define EBU_BUSRCON0_FBBMSEL_Pos (3UL) /*!< EBU BUSRCON0: FBBMSEL (Bit 3) */ -#define EBU_BUSRCON0_FBBMSEL_Msk (0x8UL) /*!< EBU BUSRCON0: FBBMSEL (Bitfield-Mask: 0x01) */ -#define EBU_BUSRCON0_BFSSS_Pos (4UL) /*!< EBU BUSRCON0: BFSSS (Bit 4) */ -#define EBU_BUSRCON0_BFSSS_Msk (0x10UL) /*!< EBU BUSRCON0: BFSSS (Bitfield-Mask: 0x01) */ -#define EBU_BUSRCON0_FDBKEN_Pos (5UL) /*!< EBU BUSRCON0: FDBKEN (Bit 5) */ -#define EBU_BUSRCON0_FDBKEN_Msk (0x20UL) /*!< EBU BUSRCON0: FDBKEN (Bitfield-Mask: 0x01) */ -#define EBU_BUSRCON0_BFCMSEL_Pos (6UL) /*!< EBU BUSRCON0: BFCMSEL (Bit 6) */ -#define EBU_BUSRCON0_BFCMSEL_Msk (0x40UL) /*!< EBU BUSRCON0: BFCMSEL (Bitfield-Mask: 0x01) */ -#define EBU_BUSRCON0_NAA_Pos (7UL) /*!< EBU BUSRCON0: NAA (Bit 7) */ -#define EBU_BUSRCON0_NAA_Msk (0x80UL) /*!< EBU BUSRCON0: NAA (Bitfield-Mask: 0x01) */ -#define EBU_BUSRCON0_ECSE_Pos (16UL) /*!< EBU BUSRCON0: ECSE (Bit 16) */ -#define EBU_BUSRCON0_ECSE_Msk (0x10000UL) /*!< EBU BUSRCON0: ECSE (Bitfield-Mask: 0x01) */ -#define EBU_BUSRCON0_EBSE_Pos (17UL) /*!< EBU BUSRCON0: EBSE (Bit 17) */ -#define EBU_BUSRCON0_EBSE_Msk (0x20000UL) /*!< EBU BUSRCON0: EBSE (Bitfield-Mask: 0x01) */ -#define EBU_BUSRCON0_DBA_Pos (18UL) /*!< EBU BUSRCON0: DBA (Bit 18) */ -#define EBU_BUSRCON0_DBA_Msk (0x40000UL) /*!< EBU BUSRCON0: DBA (Bitfield-Mask: 0x01) */ -#define EBU_BUSRCON0_WAITINV_Pos (19UL) /*!< EBU BUSRCON0: WAITINV (Bit 19) */ -#define EBU_BUSRCON0_WAITINV_Msk (0x80000UL) /*!< EBU BUSRCON0: WAITINV (Bitfield-Mask: 0x01) */ -#define EBU_BUSRCON0_BCGEN_Pos (20UL) /*!< EBU BUSRCON0: BCGEN (Bit 20) */ -#define EBU_BUSRCON0_BCGEN_Msk (0x300000UL) /*!< EBU BUSRCON0: BCGEN (Bitfield-Mask: 0x03) */ -#define EBU_BUSRCON0_PORTW_Pos (22UL) /*!< EBU BUSRCON0: PORTW (Bit 22) */ -#define EBU_BUSRCON0_PORTW_Msk (0xc00000UL) /*!< EBU BUSRCON0: PORTW (Bitfield-Mask: 0x03) */ -#define EBU_BUSRCON0_WAIT_Pos (24UL) /*!< EBU BUSRCON0: WAIT (Bit 24) */ -#define EBU_BUSRCON0_WAIT_Msk (0x3000000UL) /*!< EBU BUSRCON0: WAIT (Bitfield-Mask: 0x03) */ -#define EBU_BUSRCON0_AAP_Pos (26UL) /*!< EBU BUSRCON0: AAP (Bit 26) */ -#define EBU_BUSRCON0_AAP_Msk (0x4000000UL) /*!< EBU BUSRCON0: AAP (Bitfield-Mask: 0x01) */ -#define EBU_BUSRCON0_AGEN_Pos (28UL) /*!< EBU BUSRCON0: AGEN (Bit 28) */ -#define EBU_BUSRCON0_AGEN_Msk (0xf0000000UL) /*!< EBU BUSRCON0: AGEN (Bitfield-Mask: 0x0f) */ - -/* --------------------------------- EBU_BUSRAP0 -------------------------------- */ -#define EBU_BUSRAP0_RDDTACS_Pos (0UL) /*!< EBU BUSRAP0: RDDTACS (Bit 0) */ -#define EBU_BUSRAP0_RDDTACS_Msk (0xfUL) /*!< EBU BUSRAP0: RDDTACS (Bitfield-Mask: 0x0f) */ -#define EBU_BUSRAP0_RDRECOVC_Pos (4UL) /*!< EBU BUSRAP0: RDRECOVC (Bit 4) */ -#define EBU_BUSRAP0_RDRECOVC_Msk (0x70UL) /*!< EBU BUSRAP0: RDRECOVC (Bitfield-Mask: 0x07) */ -#define EBU_BUSRAP0_WAITRDC_Pos (7UL) /*!< EBU BUSRAP0: WAITRDC (Bit 7) */ -#define EBU_BUSRAP0_WAITRDC_Msk (0xf80UL) /*!< EBU BUSRAP0: WAITRDC (Bitfield-Mask: 0x1f) */ -#define EBU_BUSRAP0_DATAC_Pos (12UL) /*!< EBU BUSRAP0: DATAC (Bit 12) */ -#define EBU_BUSRAP0_DATAC_Msk (0xf000UL) /*!< EBU BUSRAP0: DATAC (Bitfield-Mask: 0x0f) */ -#define EBU_BUSRAP0_EXTCLOCK_Pos (16UL) /*!< EBU BUSRAP0: EXTCLOCK (Bit 16) */ -#define EBU_BUSRAP0_EXTCLOCK_Msk (0x30000UL) /*!< EBU BUSRAP0: EXTCLOCK (Bitfield-Mask: 0x03) */ -#define EBU_BUSRAP0_EXTDATA_Pos (18UL) /*!< EBU BUSRAP0: EXTDATA (Bit 18) */ -#define EBU_BUSRAP0_EXTDATA_Msk (0xc0000UL) /*!< EBU BUSRAP0: EXTDATA (Bitfield-Mask: 0x03) */ -#define EBU_BUSRAP0_CMDDELAY_Pos (20UL) /*!< EBU BUSRAP0: CMDDELAY (Bit 20) */ -#define EBU_BUSRAP0_CMDDELAY_Msk (0xf00000UL) /*!< EBU BUSRAP0: CMDDELAY (Bitfield-Mask: 0x0f) */ -#define EBU_BUSRAP0_AHOLDC_Pos (24UL) /*!< EBU BUSRAP0: AHOLDC (Bit 24) */ -#define EBU_BUSRAP0_AHOLDC_Msk (0xf000000UL) /*!< EBU BUSRAP0: AHOLDC (Bitfield-Mask: 0x0f) */ -#define EBU_BUSRAP0_ADDRC_Pos (28UL) /*!< EBU BUSRAP0: ADDRC (Bit 28) */ -#define EBU_BUSRAP0_ADDRC_Msk (0xf0000000UL) /*!< EBU BUSRAP0: ADDRC (Bitfield-Mask: 0x0f) */ - -/* -------------------------------- EBU_BUSWCON0 -------------------------------- */ -#define EBU_BUSWCON0_FETBLEN_Pos (0UL) /*!< EBU BUSWCON0: FETBLEN (Bit 0) */ -#define EBU_BUSWCON0_FETBLEN_Msk (0x7UL) /*!< EBU BUSWCON0: FETBLEN (Bitfield-Mask: 0x07) */ -#define EBU_BUSWCON0_FBBMSEL_Pos (3UL) /*!< EBU BUSWCON0: FBBMSEL (Bit 3) */ -#define EBU_BUSWCON0_FBBMSEL_Msk (0x8UL) /*!< EBU BUSWCON0: FBBMSEL (Bitfield-Mask: 0x01) */ -#define EBU_BUSWCON0_NAA_Pos (7UL) /*!< EBU BUSWCON0: NAA (Bit 7) */ -#define EBU_BUSWCON0_NAA_Msk (0x80UL) /*!< EBU BUSWCON0: NAA (Bitfield-Mask: 0x01) */ -#define EBU_BUSWCON0_ECSE_Pos (16UL) /*!< EBU BUSWCON0: ECSE (Bit 16) */ -#define EBU_BUSWCON0_ECSE_Msk (0x10000UL) /*!< EBU BUSWCON0: ECSE (Bitfield-Mask: 0x01) */ -#define EBU_BUSWCON0_EBSE_Pos (17UL) /*!< EBU BUSWCON0: EBSE (Bit 17) */ -#define EBU_BUSWCON0_EBSE_Msk (0x20000UL) /*!< EBU BUSWCON0: EBSE (Bitfield-Mask: 0x01) */ -#define EBU_BUSWCON0_WAITINV_Pos (19UL) /*!< EBU BUSWCON0: WAITINV (Bit 19) */ -#define EBU_BUSWCON0_WAITINV_Msk (0x80000UL) /*!< EBU BUSWCON0: WAITINV (Bitfield-Mask: 0x01) */ -#define EBU_BUSWCON0_BCGEN_Pos (20UL) /*!< EBU BUSWCON0: BCGEN (Bit 20) */ -#define EBU_BUSWCON0_BCGEN_Msk (0x300000UL) /*!< EBU BUSWCON0: BCGEN (Bitfield-Mask: 0x03) */ -#define EBU_BUSWCON0_PORTW_Pos (22UL) /*!< EBU BUSWCON0: PORTW (Bit 22) */ -#define EBU_BUSWCON0_PORTW_Msk (0xc00000UL) /*!< EBU BUSWCON0: PORTW (Bitfield-Mask: 0x03) */ -#define EBU_BUSWCON0_WAIT_Pos (24UL) /*!< EBU BUSWCON0: WAIT (Bit 24) */ -#define EBU_BUSWCON0_WAIT_Msk (0x3000000UL) /*!< EBU BUSWCON0: WAIT (Bitfield-Mask: 0x03) */ -#define EBU_BUSWCON0_AAP_Pos (26UL) /*!< EBU BUSWCON0: AAP (Bit 26) */ -#define EBU_BUSWCON0_AAP_Msk (0x4000000UL) /*!< EBU BUSWCON0: AAP (Bitfield-Mask: 0x01) */ -#define EBU_BUSWCON0_LOCKCS_Pos (27UL) /*!< EBU BUSWCON0: LOCKCS (Bit 27) */ -#define EBU_BUSWCON0_LOCKCS_Msk (0x8000000UL) /*!< EBU BUSWCON0: LOCKCS (Bitfield-Mask: 0x01) */ -#define EBU_BUSWCON0_AGEN_Pos (28UL) /*!< EBU BUSWCON0: AGEN (Bit 28) */ -#define EBU_BUSWCON0_AGEN_Msk (0xf0000000UL) /*!< EBU BUSWCON0: AGEN (Bitfield-Mask: 0x0f) */ - -/* --------------------------------- EBU_BUSWAP0 -------------------------------- */ -#define EBU_BUSWAP0_WRDTACS_Pos (0UL) /*!< EBU BUSWAP0: WRDTACS (Bit 0) */ -#define EBU_BUSWAP0_WRDTACS_Msk (0xfUL) /*!< EBU BUSWAP0: WRDTACS (Bitfield-Mask: 0x0f) */ -#define EBU_BUSWAP0_WRRECOVC_Pos (4UL) /*!< EBU BUSWAP0: WRRECOVC (Bit 4) */ -#define EBU_BUSWAP0_WRRECOVC_Msk (0x70UL) /*!< EBU BUSWAP0: WRRECOVC (Bitfield-Mask: 0x07) */ -#define EBU_BUSWAP0_WAITWRC_Pos (7UL) /*!< EBU BUSWAP0: WAITWRC (Bit 7) */ -#define EBU_BUSWAP0_WAITWRC_Msk (0xf80UL) /*!< EBU BUSWAP0: WAITWRC (Bitfield-Mask: 0x1f) */ -#define EBU_BUSWAP0_DATAC_Pos (12UL) /*!< EBU BUSWAP0: DATAC (Bit 12) */ -#define EBU_BUSWAP0_DATAC_Msk (0xf000UL) /*!< EBU BUSWAP0: DATAC (Bitfield-Mask: 0x0f) */ -#define EBU_BUSWAP0_EXTCLOCK_Pos (16UL) /*!< EBU BUSWAP0: EXTCLOCK (Bit 16) */ -#define EBU_BUSWAP0_EXTCLOCK_Msk (0x30000UL) /*!< EBU BUSWAP0: EXTCLOCK (Bitfield-Mask: 0x03) */ -#define EBU_BUSWAP0_EXTDATA_Pos (18UL) /*!< EBU BUSWAP0: EXTDATA (Bit 18) */ -#define EBU_BUSWAP0_EXTDATA_Msk (0xc0000UL) /*!< EBU BUSWAP0: EXTDATA (Bitfield-Mask: 0x03) */ -#define EBU_BUSWAP0_CMDDELAY_Pos (20UL) /*!< EBU BUSWAP0: CMDDELAY (Bit 20) */ -#define EBU_BUSWAP0_CMDDELAY_Msk (0xf00000UL) /*!< EBU BUSWAP0: CMDDELAY (Bitfield-Mask: 0x0f) */ -#define EBU_BUSWAP0_AHOLDC_Pos (24UL) /*!< EBU BUSWAP0: AHOLDC (Bit 24) */ -#define EBU_BUSWAP0_AHOLDC_Msk (0xf000000UL) /*!< EBU BUSWAP0: AHOLDC (Bitfield-Mask: 0x0f) */ -#define EBU_BUSWAP0_ADDRC_Pos (28UL) /*!< EBU BUSWAP0: ADDRC (Bit 28) */ -#define EBU_BUSWAP0_ADDRC_Msk (0xf0000000UL) /*!< EBU BUSWAP0: ADDRC (Bitfield-Mask: 0x0f) */ - -/* -------------------------------- EBU_BUSRCON1 -------------------------------- */ -#define EBU_BUSRCON1_FETBLEN_Pos (0UL) /*!< EBU BUSRCON1: FETBLEN (Bit 0) */ -#define EBU_BUSRCON1_FETBLEN_Msk (0x7UL) /*!< EBU BUSRCON1: FETBLEN (Bitfield-Mask: 0x07) */ -#define EBU_BUSRCON1_FBBMSEL_Pos (3UL) /*!< EBU BUSRCON1: FBBMSEL (Bit 3) */ -#define EBU_BUSRCON1_FBBMSEL_Msk (0x8UL) /*!< EBU BUSRCON1: FBBMSEL (Bitfield-Mask: 0x01) */ -#define EBU_BUSRCON1_BFSSS_Pos (4UL) /*!< EBU BUSRCON1: BFSSS (Bit 4) */ -#define EBU_BUSRCON1_BFSSS_Msk (0x10UL) /*!< EBU BUSRCON1: BFSSS (Bitfield-Mask: 0x01) */ -#define EBU_BUSRCON1_FDBKEN_Pos (5UL) /*!< EBU BUSRCON1: FDBKEN (Bit 5) */ -#define EBU_BUSRCON1_FDBKEN_Msk (0x20UL) /*!< EBU BUSRCON1: FDBKEN (Bitfield-Mask: 0x01) */ -#define EBU_BUSRCON1_BFCMSEL_Pos (6UL) /*!< EBU BUSRCON1: BFCMSEL (Bit 6) */ -#define EBU_BUSRCON1_BFCMSEL_Msk (0x40UL) /*!< EBU BUSRCON1: BFCMSEL (Bitfield-Mask: 0x01) */ -#define EBU_BUSRCON1_NAA_Pos (7UL) /*!< EBU BUSRCON1: NAA (Bit 7) */ -#define EBU_BUSRCON1_NAA_Msk (0x80UL) /*!< EBU BUSRCON1: NAA (Bitfield-Mask: 0x01) */ -#define EBU_BUSRCON1_ECSE_Pos (16UL) /*!< EBU BUSRCON1: ECSE (Bit 16) */ -#define EBU_BUSRCON1_ECSE_Msk (0x10000UL) /*!< EBU BUSRCON1: ECSE (Bitfield-Mask: 0x01) */ -#define EBU_BUSRCON1_EBSE_Pos (17UL) /*!< EBU BUSRCON1: EBSE (Bit 17) */ -#define EBU_BUSRCON1_EBSE_Msk (0x20000UL) /*!< EBU BUSRCON1: EBSE (Bitfield-Mask: 0x01) */ -#define EBU_BUSRCON1_DBA_Pos (18UL) /*!< EBU BUSRCON1: DBA (Bit 18) */ -#define EBU_BUSRCON1_DBA_Msk (0x40000UL) /*!< EBU BUSRCON1: DBA (Bitfield-Mask: 0x01) */ -#define EBU_BUSRCON1_WAITINV_Pos (19UL) /*!< EBU BUSRCON1: WAITINV (Bit 19) */ -#define EBU_BUSRCON1_WAITINV_Msk (0x80000UL) /*!< EBU BUSRCON1: WAITINV (Bitfield-Mask: 0x01) */ -#define EBU_BUSRCON1_BCGEN_Pos (20UL) /*!< EBU BUSRCON1: BCGEN (Bit 20) */ -#define EBU_BUSRCON1_BCGEN_Msk (0x300000UL) /*!< EBU BUSRCON1: BCGEN (Bitfield-Mask: 0x03) */ -#define EBU_BUSRCON1_PORTW_Pos (22UL) /*!< EBU BUSRCON1: PORTW (Bit 22) */ -#define EBU_BUSRCON1_PORTW_Msk (0xc00000UL) /*!< EBU BUSRCON1: PORTW (Bitfield-Mask: 0x03) */ -#define EBU_BUSRCON1_WAIT_Pos (24UL) /*!< EBU BUSRCON1: WAIT (Bit 24) */ -#define EBU_BUSRCON1_WAIT_Msk (0x3000000UL) /*!< EBU BUSRCON1: WAIT (Bitfield-Mask: 0x03) */ -#define EBU_BUSRCON1_AAP_Pos (26UL) /*!< EBU BUSRCON1: AAP (Bit 26) */ -#define EBU_BUSRCON1_AAP_Msk (0x4000000UL) /*!< EBU BUSRCON1: AAP (Bitfield-Mask: 0x01) */ -#define EBU_BUSRCON1_AGEN_Pos (28UL) /*!< EBU BUSRCON1: AGEN (Bit 28) */ -#define EBU_BUSRCON1_AGEN_Msk (0xf0000000UL) /*!< EBU BUSRCON1: AGEN (Bitfield-Mask: 0x0f) */ - -/* --------------------------------- EBU_BUSRAP1 -------------------------------- */ -#define EBU_BUSRAP1_RDDTACS_Pos (0UL) /*!< EBU BUSRAP1: RDDTACS (Bit 0) */ -#define EBU_BUSRAP1_RDDTACS_Msk (0xfUL) /*!< EBU BUSRAP1: RDDTACS (Bitfield-Mask: 0x0f) */ -#define EBU_BUSRAP1_RDRECOVC_Pos (4UL) /*!< EBU BUSRAP1: RDRECOVC (Bit 4) */ -#define EBU_BUSRAP1_RDRECOVC_Msk (0x70UL) /*!< EBU BUSRAP1: RDRECOVC (Bitfield-Mask: 0x07) */ -#define EBU_BUSRAP1_WAITRDC_Pos (7UL) /*!< EBU BUSRAP1: WAITRDC (Bit 7) */ -#define EBU_BUSRAP1_WAITRDC_Msk (0xf80UL) /*!< EBU BUSRAP1: WAITRDC (Bitfield-Mask: 0x1f) */ -#define EBU_BUSRAP1_DATAC_Pos (12UL) /*!< EBU BUSRAP1: DATAC (Bit 12) */ -#define EBU_BUSRAP1_DATAC_Msk (0xf000UL) /*!< EBU BUSRAP1: DATAC (Bitfield-Mask: 0x0f) */ -#define EBU_BUSRAP1_EXTCLOCK_Pos (16UL) /*!< EBU BUSRAP1: EXTCLOCK (Bit 16) */ -#define EBU_BUSRAP1_EXTCLOCK_Msk (0x30000UL) /*!< EBU BUSRAP1: EXTCLOCK (Bitfield-Mask: 0x03) */ -#define EBU_BUSRAP1_EXTDATA_Pos (18UL) /*!< EBU BUSRAP1: EXTDATA (Bit 18) */ -#define EBU_BUSRAP1_EXTDATA_Msk (0xc0000UL) /*!< EBU BUSRAP1: EXTDATA (Bitfield-Mask: 0x03) */ -#define EBU_BUSRAP1_CMDDELAY_Pos (20UL) /*!< EBU BUSRAP1: CMDDELAY (Bit 20) */ -#define EBU_BUSRAP1_CMDDELAY_Msk (0xf00000UL) /*!< EBU BUSRAP1: CMDDELAY (Bitfield-Mask: 0x0f) */ -#define EBU_BUSRAP1_AHOLDC_Pos (24UL) /*!< EBU BUSRAP1: AHOLDC (Bit 24) */ -#define EBU_BUSRAP1_AHOLDC_Msk (0xf000000UL) /*!< EBU BUSRAP1: AHOLDC (Bitfield-Mask: 0x0f) */ -#define EBU_BUSRAP1_ADDRC_Pos (28UL) /*!< EBU BUSRAP1: ADDRC (Bit 28) */ -#define EBU_BUSRAP1_ADDRC_Msk (0xf0000000UL) /*!< EBU BUSRAP1: ADDRC (Bitfield-Mask: 0x0f) */ - -/* -------------------------------- EBU_BUSWCON1 -------------------------------- */ -#define EBU_BUSWCON1_FETBLEN_Pos (0UL) /*!< EBU BUSWCON1: FETBLEN (Bit 0) */ -#define EBU_BUSWCON1_FETBLEN_Msk (0x7UL) /*!< EBU BUSWCON1: FETBLEN (Bitfield-Mask: 0x07) */ -#define EBU_BUSWCON1_FBBMSEL_Pos (3UL) /*!< EBU BUSWCON1: FBBMSEL (Bit 3) */ -#define EBU_BUSWCON1_FBBMSEL_Msk (0x8UL) /*!< EBU BUSWCON1: FBBMSEL (Bitfield-Mask: 0x01) */ -#define EBU_BUSWCON1_NAA_Pos (7UL) /*!< EBU BUSWCON1: NAA (Bit 7) */ -#define EBU_BUSWCON1_NAA_Msk (0x80UL) /*!< EBU BUSWCON1: NAA (Bitfield-Mask: 0x01) */ -#define EBU_BUSWCON1_ECSE_Pos (16UL) /*!< EBU BUSWCON1: ECSE (Bit 16) */ -#define EBU_BUSWCON1_ECSE_Msk (0x10000UL) /*!< EBU BUSWCON1: ECSE (Bitfield-Mask: 0x01) */ -#define EBU_BUSWCON1_EBSE_Pos (17UL) /*!< EBU BUSWCON1: EBSE (Bit 17) */ -#define EBU_BUSWCON1_EBSE_Msk (0x20000UL) /*!< EBU BUSWCON1: EBSE (Bitfield-Mask: 0x01) */ -#define EBU_BUSWCON1_WAITINV_Pos (19UL) /*!< EBU BUSWCON1: WAITINV (Bit 19) */ -#define EBU_BUSWCON1_WAITINV_Msk (0x80000UL) /*!< EBU BUSWCON1: WAITINV (Bitfield-Mask: 0x01) */ -#define EBU_BUSWCON1_BCGEN_Pos (20UL) /*!< EBU BUSWCON1: BCGEN (Bit 20) */ -#define EBU_BUSWCON1_BCGEN_Msk (0x300000UL) /*!< EBU BUSWCON1: BCGEN (Bitfield-Mask: 0x03) */ -#define EBU_BUSWCON1_PORTW_Pos (22UL) /*!< EBU BUSWCON1: PORTW (Bit 22) */ -#define EBU_BUSWCON1_PORTW_Msk (0xc00000UL) /*!< EBU BUSWCON1: PORTW (Bitfield-Mask: 0x03) */ -#define EBU_BUSWCON1_WAIT_Pos (24UL) /*!< EBU BUSWCON1: WAIT (Bit 24) */ -#define EBU_BUSWCON1_WAIT_Msk (0x3000000UL) /*!< EBU BUSWCON1: WAIT (Bitfield-Mask: 0x03) */ -#define EBU_BUSWCON1_AAP_Pos (26UL) /*!< EBU BUSWCON1: AAP (Bit 26) */ -#define EBU_BUSWCON1_AAP_Msk (0x4000000UL) /*!< EBU BUSWCON1: AAP (Bitfield-Mask: 0x01) */ -#define EBU_BUSWCON1_LOCKCS_Pos (27UL) /*!< EBU BUSWCON1: LOCKCS (Bit 27) */ -#define EBU_BUSWCON1_LOCKCS_Msk (0x8000000UL) /*!< EBU BUSWCON1: LOCKCS (Bitfield-Mask: 0x01) */ -#define EBU_BUSWCON1_AGEN_Pos (28UL) /*!< EBU BUSWCON1: AGEN (Bit 28) */ -#define EBU_BUSWCON1_AGEN_Msk (0xf0000000UL) /*!< EBU BUSWCON1: AGEN (Bitfield-Mask: 0x0f) */ - -/* --------------------------------- EBU_BUSWAP1 -------------------------------- */ -#define EBU_BUSWAP1_WRDTACS_Pos (0UL) /*!< EBU BUSWAP1: WRDTACS (Bit 0) */ -#define EBU_BUSWAP1_WRDTACS_Msk (0xfUL) /*!< EBU BUSWAP1: WRDTACS (Bitfield-Mask: 0x0f) */ -#define EBU_BUSWAP1_WRRECOVC_Pos (4UL) /*!< EBU BUSWAP1: WRRECOVC (Bit 4) */ -#define EBU_BUSWAP1_WRRECOVC_Msk (0x70UL) /*!< EBU BUSWAP1: WRRECOVC (Bitfield-Mask: 0x07) */ -#define EBU_BUSWAP1_WAITWRC_Pos (7UL) /*!< EBU BUSWAP1: WAITWRC (Bit 7) */ -#define EBU_BUSWAP1_WAITWRC_Msk (0xf80UL) /*!< EBU BUSWAP1: WAITWRC (Bitfield-Mask: 0x1f) */ -#define EBU_BUSWAP1_DATAC_Pos (12UL) /*!< EBU BUSWAP1: DATAC (Bit 12) */ -#define EBU_BUSWAP1_DATAC_Msk (0xf000UL) /*!< EBU BUSWAP1: DATAC (Bitfield-Mask: 0x0f) */ -#define EBU_BUSWAP1_EXTCLOCK_Pos (16UL) /*!< EBU BUSWAP1: EXTCLOCK (Bit 16) */ -#define EBU_BUSWAP1_EXTCLOCK_Msk (0x30000UL) /*!< EBU BUSWAP1: EXTCLOCK (Bitfield-Mask: 0x03) */ -#define EBU_BUSWAP1_EXTDATA_Pos (18UL) /*!< EBU BUSWAP1: EXTDATA (Bit 18) */ -#define EBU_BUSWAP1_EXTDATA_Msk (0xc0000UL) /*!< EBU BUSWAP1: EXTDATA (Bitfield-Mask: 0x03) */ -#define EBU_BUSWAP1_CMDDELAY_Pos (20UL) /*!< EBU BUSWAP1: CMDDELAY (Bit 20) */ -#define EBU_BUSWAP1_CMDDELAY_Msk (0xf00000UL) /*!< EBU BUSWAP1: CMDDELAY (Bitfield-Mask: 0x0f) */ -#define EBU_BUSWAP1_AHOLDC_Pos (24UL) /*!< EBU BUSWAP1: AHOLDC (Bit 24) */ -#define EBU_BUSWAP1_AHOLDC_Msk (0xf000000UL) /*!< EBU BUSWAP1: AHOLDC (Bitfield-Mask: 0x0f) */ -#define EBU_BUSWAP1_ADDRC_Pos (28UL) /*!< EBU BUSWAP1: ADDRC (Bit 28) */ -#define EBU_BUSWAP1_ADDRC_Msk (0xf0000000UL) /*!< EBU BUSWAP1: ADDRC (Bitfield-Mask: 0x0f) */ - -/* -------------------------------- EBU_BUSRCON2 -------------------------------- */ -#define EBU_BUSRCON2_FETBLEN_Pos (0UL) /*!< EBU BUSRCON2: FETBLEN (Bit 0) */ -#define EBU_BUSRCON2_FETBLEN_Msk (0x7UL) /*!< EBU BUSRCON2: FETBLEN (Bitfield-Mask: 0x07) */ -#define EBU_BUSRCON2_FBBMSEL_Pos (3UL) /*!< EBU BUSRCON2: FBBMSEL (Bit 3) */ -#define EBU_BUSRCON2_FBBMSEL_Msk (0x8UL) /*!< EBU BUSRCON2: FBBMSEL (Bitfield-Mask: 0x01) */ -#define EBU_BUSRCON2_BFSSS_Pos (4UL) /*!< EBU BUSRCON2: BFSSS (Bit 4) */ -#define EBU_BUSRCON2_BFSSS_Msk (0x10UL) /*!< EBU BUSRCON2: BFSSS (Bitfield-Mask: 0x01) */ -#define EBU_BUSRCON2_FDBKEN_Pos (5UL) /*!< EBU BUSRCON2: FDBKEN (Bit 5) */ -#define EBU_BUSRCON2_FDBKEN_Msk (0x20UL) /*!< EBU BUSRCON2: FDBKEN (Bitfield-Mask: 0x01) */ -#define EBU_BUSRCON2_BFCMSEL_Pos (6UL) /*!< EBU BUSRCON2: BFCMSEL (Bit 6) */ -#define EBU_BUSRCON2_BFCMSEL_Msk (0x40UL) /*!< EBU BUSRCON2: BFCMSEL (Bitfield-Mask: 0x01) */ -#define EBU_BUSRCON2_NAA_Pos (7UL) /*!< EBU BUSRCON2: NAA (Bit 7) */ -#define EBU_BUSRCON2_NAA_Msk (0x80UL) /*!< EBU BUSRCON2: NAA (Bitfield-Mask: 0x01) */ -#define EBU_BUSRCON2_ECSE_Pos (16UL) /*!< EBU BUSRCON2: ECSE (Bit 16) */ -#define EBU_BUSRCON2_ECSE_Msk (0x10000UL) /*!< EBU BUSRCON2: ECSE (Bitfield-Mask: 0x01) */ -#define EBU_BUSRCON2_EBSE_Pos (17UL) /*!< EBU BUSRCON2: EBSE (Bit 17) */ -#define EBU_BUSRCON2_EBSE_Msk (0x20000UL) /*!< EBU BUSRCON2: EBSE (Bitfield-Mask: 0x01) */ -#define EBU_BUSRCON2_DBA_Pos (18UL) /*!< EBU BUSRCON2: DBA (Bit 18) */ -#define EBU_BUSRCON2_DBA_Msk (0x40000UL) /*!< EBU BUSRCON2: DBA (Bitfield-Mask: 0x01) */ -#define EBU_BUSRCON2_WAITINV_Pos (19UL) /*!< EBU BUSRCON2: WAITINV (Bit 19) */ -#define EBU_BUSRCON2_WAITINV_Msk (0x80000UL) /*!< EBU BUSRCON2: WAITINV (Bitfield-Mask: 0x01) */ -#define EBU_BUSRCON2_BCGEN_Pos (20UL) /*!< EBU BUSRCON2: BCGEN (Bit 20) */ -#define EBU_BUSRCON2_BCGEN_Msk (0x300000UL) /*!< EBU BUSRCON2: BCGEN (Bitfield-Mask: 0x03) */ -#define EBU_BUSRCON2_PORTW_Pos (22UL) /*!< EBU BUSRCON2: PORTW (Bit 22) */ -#define EBU_BUSRCON2_PORTW_Msk (0xc00000UL) /*!< EBU BUSRCON2: PORTW (Bitfield-Mask: 0x03) */ -#define EBU_BUSRCON2_WAIT_Pos (24UL) /*!< EBU BUSRCON2: WAIT (Bit 24) */ -#define EBU_BUSRCON2_WAIT_Msk (0x3000000UL) /*!< EBU BUSRCON2: WAIT (Bitfield-Mask: 0x03) */ -#define EBU_BUSRCON2_AAP_Pos (26UL) /*!< EBU BUSRCON2: AAP (Bit 26) */ -#define EBU_BUSRCON2_AAP_Msk (0x4000000UL) /*!< EBU BUSRCON2: AAP (Bitfield-Mask: 0x01) */ -#define EBU_BUSRCON2_AGEN_Pos (28UL) /*!< EBU BUSRCON2: AGEN (Bit 28) */ -#define EBU_BUSRCON2_AGEN_Msk (0xf0000000UL) /*!< EBU BUSRCON2: AGEN (Bitfield-Mask: 0x0f) */ - -/* --------------------------------- EBU_BUSRAP2 -------------------------------- */ -#define EBU_BUSRAP2_RDDTACS_Pos (0UL) /*!< EBU BUSRAP2: RDDTACS (Bit 0) */ -#define EBU_BUSRAP2_RDDTACS_Msk (0xfUL) /*!< EBU BUSRAP2: RDDTACS (Bitfield-Mask: 0x0f) */ -#define EBU_BUSRAP2_RDRECOVC_Pos (4UL) /*!< EBU BUSRAP2: RDRECOVC (Bit 4) */ -#define EBU_BUSRAP2_RDRECOVC_Msk (0x70UL) /*!< EBU BUSRAP2: RDRECOVC (Bitfield-Mask: 0x07) */ -#define EBU_BUSRAP2_WAITRDC_Pos (7UL) /*!< EBU BUSRAP2: WAITRDC (Bit 7) */ -#define EBU_BUSRAP2_WAITRDC_Msk (0xf80UL) /*!< EBU BUSRAP2: WAITRDC (Bitfield-Mask: 0x1f) */ -#define EBU_BUSRAP2_DATAC_Pos (12UL) /*!< EBU BUSRAP2: DATAC (Bit 12) */ -#define EBU_BUSRAP2_DATAC_Msk (0xf000UL) /*!< EBU BUSRAP2: DATAC (Bitfield-Mask: 0x0f) */ -#define EBU_BUSRAP2_EXTCLOCK_Pos (16UL) /*!< EBU BUSRAP2: EXTCLOCK (Bit 16) */ -#define EBU_BUSRAP2_EXTCLOCK_Msk (0x30000UL) /*!< EBU BUSRAP2: EXTCLOCK (Bitfield-Mask: 0x03) */ -#define EBU_BUSRAP2_EXTDATA_Pos (18UL) /*!< EBU BUSRAP2: EXTDATA (Bit 18) */ -#define EBU_BUSRAP2_EXTDATA_Msk (0xc0000UL) /*!< EBU BUSRAP2: EXTDATA (Bitfield-Mask: 0x03) */ -#define EBU_BUSRAP2_CMDDELAY_Pos (20UL) /*!< EBU BUSRAP2: CMDDELAY (Bit 20) */ -#define EBU_BUSRAP2_CMDDELAY_Msk (0xf00000UL) /*!< EBU BUSRAP2: CMDDELAY (Bitfield-Mask: 0x0f) */ -#define EBU_BUSRAP2_AHOLDC_Pos (24UL) /*!< EBU BUSRAP2: AHOLDC (Bit 24) */ -#define EBU_BUSRAP2_AHOLDC_Msk (0xf000000UL) /*!< EBU BUSRAP2: AHOLDC (Bitfield-Mask: 0x0f) */ -#define EBU_BUSRAP2_ADDRC_Pos (28UL) /*!< EBU BUSRAP2: ADDRC (Bit 28) */ -#define EBU_BUSRAP2_ADDRC_Msk (0xf0000000UL) /*!< EBU BUSRAP2: ADDRC (Bitfield-Mask: 0x0f) */ - -/* -------------------------------- EBU_BUSWCON2 -------------------------------- */ -#define EBU_BUSWCON2_FETBLEN_Pos (0UL) /*!< EBU BUSWCON2: FETBLEN (Bit 0) */ -#define EBU_BUSWCON2_FETBLEN_Msk (0x7UL) /*!< EBU BUSWCON2: FETBLEN (Bitfield-Mask: 0x07) */ -#define EBU_BUSWCON2_FBBMSEL_Pos (3UL) /*!< EBU BUSWCON2: FBBMSEL (Bit 3) */ -#define EBU_BUSWCON2_FBBMSEL_Msk (0x8UL) /*!< EBU BUSWCON2: FBBMSEL (Bitfield-Mask: 0x01) */ -#define EBU_BUSWCON2_NAA_Pos (7UL) /*!< EBU BUSWCON2: NAA (Bit 7) */ -#define EBU_BUSWCON2_NAA_Msk (0x80UL) /*!< EBU BUSWCON2: NAA (Bitfield-Mask: 0x01) */ -#define EBU_BUSWCON2_ECSE_Pos (16UL) /*!< EBU BUSWCON2: ECSE (Bit 16) */ -#define EBU_BUSWCON2_ECSE_Msk (0x10000UL) /*!< EBU BUSWCON2: ECSE (Bitfield-Mask: 0x01) */ -#define EBU_BUSWCON2_EBSE_Pos (17UL) /*!< EBU BUSWCON2: EBSE (Bit 17) */ -#define EBU_BUSWCON2_EBSE_Msk (0x20000UL) /*!< EBU BUSWCON2: EBSE (Bitfield-Mask: 0x01) */ -#define EBU_BUSWCON2_WAITINV_Pos (19UL) /*!< EBU BUSWCON2: WAITINV (Bit 19) */ -#define EBU_BUSWCON2_WAITINV_Msk (0x80000UL) /*!< EBU BUSWCON2: WAITINV (Bitfield-Mask: 0x01) */ -#define EBU_BUSWCON2_BCGEN_Pos (20UL) /*!< EBU BUSWCON2: BCGEN (Bit 20) */ -#define EBU_BUSWCON2_BCGEN_Msk (0x300000UL) /*!< EBU BUSWCON2: BCGEN (Bitfield-Mask: 0x03) */ -#define EBU_BUSWCON2_PORTW_Pos (22UL) /*!< EBU BUSWCON2: PORTW (Bit 22) */ -#define EBU_BUSWCON2_PORTW_Msk (0xc00000UL) /*!< EBU BUSWCON2: PORTW (Bitfield-Mask: 0x03) */ -#define EBU_BUSWCON2_WAIT_Pos (24UL) /*!< EBU BUSWCON2: WAIT (Bit 24) */ -#define EBU_BUSWCON2_WAIT_Msk (0x3000000UL) /*!< EBU BUSWCON2: WAIT (Bitfield-Mask: 0x03) */ -#define EBU_BUSWCON2_AAP_Pos (26UL) /*!< EBU BUSWCON2: AAP (Bit 26) */ -#define EBU_BUSWCON2_AAP_Msk (0x4000000UL) /*!< EBU BUSWCON2: AAP (Bitfield-Mask: 0x01) */ -#define EBU_BUSWCON2_LOCKCS_Pos (27UL) /*!< EBU BUSWCON2: LOCKCS (Bit 27) */ -#define EBU_BUSWCON2_LOCKCS_Msk (0x8000000UL) /*!< EBU BUSWCON2: LOCKCS (Bitfield-Mask: 0x01) */ -#define EBU_BUSWCON2_AGEN_Pos (28UL) /*!< EBU BUSWCON2: AGEN (Bit 28) */ -#define EBU_BUSWCON2_AGEN_Msk (0xf0000000UL) /*!< EBU BUSWCON2: AGEN (Bitfield-Mask: 0x0f) */ - -/* --------------------------------- EBU_BUSWAP2 -------------------------------- */ -#define EBU_BUSWAP2_WRDTACS_Pos (0UL) /*!< EBU BUSWAP2: WRDTACS (Bit 0) */ -#define EBU_BUSWAP2_WRDTACS_Msk (0xfUL) /*!< EBU BUSWAP2: WRDTACS (Bitfield-Mask: 0x0f) */ -#define EBU_BUSWAP2_WRRECOVC_Pos (4UL) /*!< EBU BUSWAP2: WRRECOVC (Bit 4) */ -#define EBU_BUSWAP2_WRRECOVC_Msk (0x70UL) /*!< EBU BUSWAP2: WRRECOVC (Bitfield-Mask: 0x07) */ -#define EBU_BUSWAP2_WAITWRC_Pos (7UL) /*!< EBU BUSWAP2: WAITWRC (Bit 7) */ -#define EBU_BUSWAP2_WAITWRC_Msk (0xf80UL) /*!< EBU BUSWAP2: WAITWRC (Bitfield-Mask: 0x1f) */ -#define EBU_BUSWAP2_DATAC_Pos (12UL) /*!< EBU BUSWAP2: DATAC (Bit 12) */ -#define EBU_BUSWAP2_DATAC_Msk (0xf000UL) /*!< EBU BUSWAP2: DATAC (Bitfield-Mask: 0x0f) */ -#define EBU_BUSWAP2_EXTCLOCK_Pos (16UL) /*!< EBU BUSWAP2: EXTCLOCK (Bit 16) */ -#define EBU_BUSWAP2_EXTCLOCK_Msk (0x30000UL) /*!< EBU BUSWAP2: EXTCLOCK (Bitfield-Mask: 0x03) */ -#define EBU_BUSWAP2_EXTDATA_Pos (18UL) /*!< EBU BUSWAP2: EXTDATA (Bit 18) */ -#define EBU_BUSWAP2_EXTDATA_Msk (0xc0000UL) /*!< EBU BUSWAP2: EXTDATA (Bitfield-Mask: 0x03) */ -#define EBU_BUSWAP2_CMDDELAY_Pos (20UL) /*!< EBU BUSWAP2: CMDDELAY (Bit 20) */ -#define EBU_BUSWAP2_CMDDELAY_Msk (0xf00000UL) /*!< EBU BUSWAP2: CMDDELAY (Bitfield-Mask: 0x0f) */ -#define EBU_BUSWAP2_AHOLDC_Pos (24UL) /*!< EBU BUSWAP2: AHOLDC (Bit 24) */ -#define EBU_BUSWAP2_AHOLDC_Msk (0xf000000UL) /*!< EBU BUSWAP2: AHOLDC (Bitfield-Mask: 0x0f) */ -#define EBU_BUSWAP2_ADDRC_Pos (28UL) /*!< EBU BUSWAP2: ADDRC (Bit 28) */ -#define EBU_BUSWAP2_ADDRC_Msk (0xf0000000UL) /*!< EBU BUSWAP2: ADDRC (Bitfield-Mask: 0x0f) */ - -/* -------------------------------- EBU_BUSRCON3 -------------------------------- */ -#define EBU_BUSRCON3_FETBLEN_Pos (0UL) /*!< EBU BUSRCON3: FETBLEN (Bit 0) */ -#define EBU_BUSRCON3_FETBLEN_Msk (0x7UL) /*!< EBU BUSRCON3: FETBLEN (Bitfield-Mask: 0x07) */ -#define EBU_BUSRCON3_FBBMSEL_Pos (3UL) /*!< EBU BUSRCON3: FBBMSEL (Bit 3) */ -#define EBU_BUSRCON3_FBBMSEL_Msk (0x8UL) /*!< EBU BUSRCON3: FBBMSEL (Bitfield-Mask: 0x01) */ -#define EBU_BUSRCON3_BFSSS_Pos (4UL) /*!< EBU BUSRCON3: BFSSS (Bit 4) */ -#define EBU_BUSRCON3_BFSSS_Msk (0x10UL) /*!< EBU BUSRCON3: BFSSS (Bitfield-Mask: 0x01) */ -#define EBU_BUSRCON3_FDBKEN_Pos (5UL) /*!< EBU BUSRCON3: FDBKEN (Bit 5) */ -#define EBU_BUSRCON3_FDBKEN_Msk (0x20UL) /*!< EBU BUSRCON3: FDBKEN (Bitfield-Mask: 0x01) */ -#define EBU_BUSRCON3_BFCMSEL_Pos (6UL) /*!< EBU BUSRCON3: BFCMSEL (Bit 6) */ -#define EBU_BUSRCON3_BFCMSEL_Msk (0x40UL) /*!< EBU BUSRCON3: BFCMSEL (Bitfield-Mask: 0x01) */ -#define EBU_BUSRCON3_NAA_Pos (7UL) /*!< EBU BUSRCON3: NAA (Bit 7) */ -#define EBU_BUSRCON3_NAA_Msk (0x80UL) /*!< EBU BUSRCON3: NAA (Bitfield-Mask: 0x01) */ -#define EBU_BUSRCON3_ECSE_Pos (16UL) /*!< EBU BUSRCON3: ECSE (Bit 16) */ -#define EBU_BUSRCON3_ECSE_Msk (0x10000UL) /*!< EBU BUSRCON3: ECSE (Bitfield-Mask: 0x01) */ -#define EBU_BUSRCON3_EBSE_Pos (17UL) /*!< EBU BUSRCON3: EBSE (Bit 17) */ -#define EBU_BUSRCON3_EBSE_Msk (0x20000UL) /*!< EBU BUSRCON3: EBSE (Bitfield-Mask: 0x01) */ -#define EBU_BUSRCON3_DBA_Pos (18UL) /*!< EBU BUSRCON3: DBA (Bit 18) */ -#define EBU_BUSRCON3_DBA_Msk (0x40000UL) /*!< EBU BUSRCON3: DBA (Bitfield-Mask: 0x01) */ -#define EBU_BUSRCON3_WAITINV_Pos (19UL) /*!< EBU BUSRCON3: WAITINV (Bit 19) */ -#define EBU_BUSRCON3_WAITINV_Msk (0x80000UL) /*!< EBU BUSRCON3: WAITINV (Bitfield-Mask: 0x01) */ -#define EBU_BUSRCON3_BCGEN_Pos (20UL) /*!< EBU BUSRCON3: BCGEN (Bit 20) */ -#define EBU_BUSRCON3_BCGEN_Msk (0x300000UL) /*!< EBU BUSRCON3: BCGEN (Bitfield-Mask: 0x03) */ -#define EBU_BUSRCON3_PORTW_Pos (22UL) /*!< EBU BUSRCON3: PORTW (Bit 22) */ -#define EBU_BUSRCON3_PORTW_Msk (0xc00000UL) /*!< EBU BUSRCON3: PORTW (Bitfield-Mask: 0x03) */ -#define EBU_BUSRCON3_WAIT_Pos (24UL) /*!< EBU BUSRCON3: WAIT (Bit 24) */ -#define EBU_BUSRCON3_WAIT_Msk (0x3000000UL) /*!< EBU BUSRCON3: WAIT (Bitfield-Mask: 0x03) */ -#define EBU_BUSRCON3_AAP_Pos (26UL) /*!< EBU BUSRCON3: AAP (Bit 26) */ -#define EBU_BUSRCON3_AAP_Msk (0x4000000UL) /*!< EBU BUSRCON3: AAP (Bitfield-Mask: 0x01) */ -#define EBU_BUSRCON3_AGEN_Pos (28UL) /*!< EBU BUSRCON3: AGEN (Bit 28) */ -#define EBU_BUSRCON3_AGEN_Msk (0xf0000000UL) /*!< EBU BUSRCON3: AGEN (Bitfield-Mask: 0x0f) */ - -/* --------------------------------- EBU_BUSRAP3 -------------------------------- */ -#define EBU_BUSRAP3_RDDTACS_Pos (0UL) /*!< EBU BUSRAP3: RDDTACS (Bit 0) */ -#define EBU_BUSRAP3_RDDTACS_Msk (0xfUL) /*!< EBU BUSRAP3: RDDTACS (Bitfield-Mask: 0x0f) */ -#define EBU_BUSRAP3_RDRECOVC_Pos (4UL) /*!< EBU BUSRAP3: RDRECOVC (Bit 4) */ -#define EBU_BUSRAP3_RDRECOVC_Msk (0x70UL) /*!< EBU BUSRAP3: RDRECOVC (Bitfield-Mask: 0x07) */ -#define EBU_BUSRAP3_WAITRDC_Pos (7UL) /*!< EBU BUSRAP3: WAITRDC (Bit 7) */ -#define EBU_BUSRAP3_WAITRDC_Msk (0xf80UL) /*!< EBU BUSRAP3: WAITRDC (Bitfield-Mask: 0x1f) */ -#define EBU_BUSRAP3_DATAC_Pos (12UL) /*!< EBU BUSRAP3: DATAC (Bit 12) */ -#define EBU_BUSRAP3_DATAC_Msk (0xf000UL) /*!< EBU BUSRAP3: DATAC (Bitfield-Mask: 0x0f) */ -#define EBU_BUSRAP3_EXTCLOCK_Pos (16UL) /*!< EBU BUSRAP3: EXTCLOCK (Bit 16) */ -#define EBU_BUSRAP3_EXTCLOCK_Msk (0x30000UL) /*!< EBU BUSRAP3: EXTCLOCK (Bitfield-Mask: 0x03) */ -#define EBU_BUSRAP3_EXTDATA_Pos (18UL) /*!< EBU BUSRAP3: EXTDATA (Bit 18) */ -#define EBU_BUSRAP3_EXTDATA_Msk (0xc0000UL) /*!< EBU BUSRAP3: EXTDATA (Bitfield-Mask: 0x03) */ -#define EBU_BUSRAP3_CMDDELAY_Pos (20UL) /*!< EBU BUSRAP3: CMDDELAY (Bit 20) */ -#define EBU_BUSRAP3_CMDDELAY_Msk (0xf00000UL) /*!< EBU BUSRAP3: CMDDELAY (Bitfield-Mask: 0x0f) */ -#define EBU_BUSRAP3_AHOLDC_Pos (24UL) /*!< EBU BUSRAP3: AHOLDC (Bit 24) */ -#define EBU_BUSRAP3_AHOLDC_Msk (0xf000000UL) /*!< EBU BUSRAP3: AHOLDC (Bitfield-Mask: 0x0f) */ -#define EBU_BUSRAP3_ADDRC_Pos (28UL) /*!< EBU BUSRAP3: ADDRC (Bit 28) */ -#define EBU_BUSRAP3_ADDRC_Msk (0xf0000000UL) /*!< EBU BUSRAP3: ADDRC (Bitfield-Mask: 0x0f) */ - -/* -------------------------------- EBU_BUSWCON3 -------------------------------- */ -#define EBU_BUSWCON3_FETBLEN_Pos (0UL) /*!< EBU BUSWCON3: FETBLEN (Bit 0) */ -#define EBU_BUSWCON3_FETBLEN_Msk (0x7UL) /*!< EBU BUSWCON3: FETBLEN (Bitfield-Mask: 0x07) */ -#define EBU_BUSWCON3_FBBMSEL_Pos (3UL) /*!< EBU BUSWCON3: FBBMSEL (Bit 3) */ -#define EBU_BUSWCON3_FBBMSEL_Msk (0x8UL) /*!< EBU BUSWCON3: FBBMSEL (Bitfield-Mask: 0x01) */ -#define EBU_BUSWCON3_NAA_Pos (7UL) /*!< EBU BUSWCON3: NAA (Bit 7) */ -#define EBU_BUSWCON3_NAA_Msk (0x80UL) /*!< EBU BUSWCON3: NAA (Bitfield-Mask: 0x01) */ -#define EBU_BUSWCON3_ECSE_Pos (16UL) /*!< EBU BUSWCON3: ECSE (Bit 16) */ -#define EBU_BUSWCON3_ECSE_Msk (0x10000UL) /*!< EBU BUSWCON3: ECSE (Bitfield-Mask: 0x01) */ -#define EBU_BUSWCON3_EBSE_Pos (17UL) /*!< EBU BUSWCON3: EBSE (Bit 17) */ -#define EBU_BUSWCON3_EBSE_Msk (0x20000UL) /*!< EBU BUSWCON3: EBSE (Bitfield-Mask: 0x01) */ -#define EBU_BUSWCON3_WAITINV_Pos (19UL) /*!< EBU BUSWCON3: WAITINV (Bit 19) */ -#define EBU_BUSWCON3_WAITINV_Msk (0x80000UL) /*!< EBU BUSWCON3: WAITINV (Bitfield-Mask: 0x01) */ -#define EBU_BUSWCON3_BCGEN_Pos (20UL) /*!< EBU BUSWCON3: BCGEN (Bit 20) */ -#define EBU_BUSWCON3_BCGEN_Msk (0x300000UL) /*!< EBU BUSWCON3: BCGEN (Bitfield-Mask: 0x03) */ -#define EBU_BUSWCON3_PORTW_Pos (22UL) /*!< EBU BUSWCON3: PORTW (Bit 22) */ -#define EBU_BUSWCON3_PORTW_Msk (0xc00000UL) /*!< EBU BUSWCON3: PORTW (Bitfield-Mask: 0x03) */ -#define EBU_BUSWCON3_WAIT_Pos (24UL) /*!< EBU BUSWCON3: WAIT (Bit 24) */ -#define EBU_BUSWCON3_WAIT_Msk (0x3000000UL) /*!< EBU BUSWCON3: WAIT (Bitfield-Mask: 0x03) */ -#define EBU_BUSWCON3_AAP_Pos (26UL) /*!< EBU BUSWCON3: AAP (Bit 26) */ -#define EBU_BUSWCON3_AAP_Msk (0x4000000UL) /*!< EBU BUSWCON3: AAP (Bitfield-Mask: 0x01) */ -#define EBU_BUSWCON3_LOCKCS_Pos (27UL) /*!< EBU BUSWCON3: LOCKCS (Bit 27) */ -#define EBU_BUSWCON3_LOCKCS_Msk (0x8000000UL) /*!< EBU BUSWCON3: LOCKCS (Bitfield-Mask: 0x01) */ -#define EBU_BUSWCON3_AGEN_Pos (28UL) /*!< EBU BUSWCON3: AGEN (Bit 28) */ -#define EBU_BUSWCON3_AGEN_Msk (0xf0000000UL) /*!< EBU BUSWCON3: AGEN (Bitfield-Mask: 0x0f) */ - -/* --------------------------------- EBU_BUSWAP3 -------------------------------- */ -#define EBU_BUSWAP3_WRDTACS_Pos (0UL) /*!< EBU BUSWAP3: WRDTACS (Bit 0) */ -#define EBU_BUSWAP3_WRDTACS_Msk (0xfUL) /*!< EBU BUSWAP3: WRDTACS (Bitfield-Mask: 0x0f) */ -#define EBU_BUSWAP3_WRRECOVC_Pos (4UL) /*!< EBU BUSWAP3: WRRECOVC (Bit 4) */ -#define EBU_BUSWAP3_WRRECOVC_Msk (0x70UL) /*!< EBU BUSWAP3: WRRECOVC (Bitfield-Mask: 0x07) */ -#define EBU_BUSWAP3_WAITWRC_Pos (7UL) /*!< EBU BUSWAP3: WAITWRC (Bit 7) */ -#define EBU_BUSWAP3_WAITWRC_Msk (0xf80UL) /*!< EBU BUSWAP3: WAITWRC (Bitfield-Mask: 0x1f) */ -#define EBU_BUSWAP3_DATAC_Pos (12UL) /*!< EBU BUSWAP3: DATAC (Bit 12) */ -#define EBU_BUSWAP3_DATAC_Msk (0xf000UL) /*!< EBU BUSWAP3: DATAC (Bitfield-Mask: 0x0f) */ -#define EBU_BUSWAP3_EXTCLOCK_Pos (16UL) /*!< EBU BUSWAP3: EXTCLOCK (Bit 16) */ -#define EBU_BUSWAP3_EXTCLOCK_Msk (0x30000UL) /*!< EBU BUSWAP3: EXTCLOCK (Bitfield-Mask: 0x03) */ -#define EBU_BUSWAP3_EXTDATA_Pos (18UL) /*!< EBU BUSWAP3: EXTDATA (Bit 18) */ -#define EBU_BUSWAP3_EXTDATA_Msk (0xc0000UL) /*!< EBU BUSWAP3: EXTDATA (Bitfield-Mask: 0x03) */ -#define EBU_BUSWAP3_CMDDELAY_Pos (20UL) /*!< EBU BUSWAP3: CMDDELAY (Bit 20) */ -#define EBU_BUSWAP3_CMDDELAY_Msk (0xf00000UL) /*!< EBU BUSWAP3: CMDDELAY (Bitfield-Mask: 0x0f) */ -#define EBU_BUSWAP3_AHOLDC_Pos (24UL) /*!< EBU BUSWAP3: AHOLDC (Bit 24) */ -#define EBU_BUSWAP3_AHOLDC_Msk (0xf000000UL) /*!< EBU BUSWAP3: AHOLDC (Bitfield-Mask: 0x0f) */ -#define EBU_BUSWAP3_ADDRC_Pos (28UL) /*!< EBU BUSWAP3: ADDRC (Bit 28) */ -#define EBU_BUSWAP3_ADDRC_Msk (0xf0000000UL) /*!< EBU BUSWAP3: ADDRC (Bitfield-Mask: 0x0f) */ - -/* --------------------------------- EBU_SDRMCON -------------------------------- */ -#define EBU_SDRMCON_CRAS_Pos (0UL) /*!< EBU SDRMCON: CRAS (Bit 0) */ -#define EBU_SDRMCON_CRAS_Msk (0xfUL) /*!< EBU SDRMCON: CRAS (Bitfield-Mask: 0x0f) */ -#define EBU_SDRMCON_CRFSH_Pos (4UL) /*!< EBU SDRMCON: CRFSH (Bit 4) */ -#define EBU_SDRMCON_CRFSH_Msk (0xf0UL) /*!< EBU SDRMCON: CRFSH (Bitfield-Mask: 0x0f) */ -#define EBU_SDRMCON_CRSC_Pos (8UL) /*!< EBU SDRMCON: CRSC (Bit 8) */ -#define EBU_SDRMCON_CRSC_Msk (0x300UL) /*!< EBU SDRMCON: CRSC (Bitfield-Mask: 0x03) */ -#define EBU_SDRMCON_CRP_Pos (10UL) /*!< EBU SDRMCON: CRP (Bit 10) */ -#define EBU_SDRMCON_CRP_Msk (0xc00UL) /*!< EBU SDRMCON: CRP (Bitfield-Mask: 0x03) */ -#define EBU_SDRMCON_AWIDTH_Pos (12UL) /*!< EBU SDRMCON: AWIDTH (Bit 12) */ -#define EBU_SDRMCON_AWIDTH_Msk (0x3000UL) /*!< EBU SDRMCON: AWIDTH (Bitfield-Mask: 0x03) */ -#define EBU_SDRMCON_CRCD_Pos (14UL) /*!< EBU SDRMCON: CRCD (Bit 14) */ -#define EBU_SDRMCON_CRCD_Msk (0xc000UL) /*!< EBU SDRMCON: CRCD (Bitfield-Mask: 0x03) */ -#define EBU_SDRMCON_CRC_Pos (16UL) /*!< EBU SDRMCON: CRC (Bit 16) */ -#define EBU_SDRMCON_CRC_Msk (0x70000UL) /*!< EBU SDRMCON: CRC (Bitfield-Mask: 0x07) */ -#define EBU_SDRMCON_ROWM_Pos (19UL) /*!< EBU SDRMCON: ROWM (Bit 19) */ -#define EBU_SDRMCON_ROWM_Msk (0x380000UL) /*!< EBU SDRMCON: ROWM (Bitfield-Mask: 0x07) */ -#define EBU_SDRMCON_BANKM_Pos (22UL) /*!< EBU SDRMCON: BANKM (Bit 22) */ -#define EBU_SDRMCON_BANKM_Msk (0x1c00000UL) /*!< EBU SDRMCON: BANKM (Bitfield-Mask: 0x07) */ -#define EBU_SDRMCON_CRCE_Pos (25UL) /*!< EBU SDRMCON: CRCE (Bit 25) */ -#define EBU_SDRMCON_CRCE_Msk (0xe000000UL) /*!< EBU SDRMCON: CRCE (Bitfield-Mask: 0x07) */ -#define EBU_SDRMCON_CLKDIS_Pos (28UL) /*!< EBU SDRMCON: CLKDIS (Bit 28) */ -#define EBU_SDRMCON_CLKDIS_Msk (0x10000000UL) /*!< EBU SDRMCON: CLKDIS (Bitfield-Mask: 0x01) */ -#define EBU_SDRMCON_PWR_MODE_Pos (29UL) /*!< EBU SDRMCON: PWR_MODE (Bit 29) */ -#define EBU_SDRMCON_PWR_MODE_Msk (0x60000000UL) /*!< EBU SDRMCON: PWR_MODE (Bitfield-Mask: 0x03) */ -#define EBU_SDRMCON_SDCMSEL_Pos (31UL) /*!< EBU SDRMCON: SDCMSEL (Bit 31) */ -#define EBU_SDRMCON_SDCMSEL_Msk (0x80000000UL) /*!< EBU SDRMCON: SDCMSEL (Bitfield-Mask: 0x01) */ - -/* --------------------------------- EBU_SDRMOD --------------------------------- */ -#define EBU_SDRMOD_BURSTL_Pos (0UL) /*!< EBU SDRMOD: BURSTL (Bit 0) */ -#define EBU_SDRMOD_BURSTL_Msk (0x7UL) /*!< EBU SDRMOD: BURSTL (Bitfield-Mask: 0x07) */ -#define EBU_SDRMOD_BTYP_Pos (3UL) /*!< EBU SDRMOD: BTYP (Bit 3) */ -#define EBU_SDRMOD_BTYP_Msk (0x8UL) /*!< EBU SDRMOD: BTYP (Bitfield-Mask: 0x01) */ -#define EBU_SDRMOD_CASLAT_Pos (4UL) /*!< EBU SDRMOD: CASLAT (Bit 4) */ -#define EBU_SDRMOD_CASLAT_Msk (0x70UL) /*!< EBU SDRMOD: CASLAT (Bitfield-Mask: 0x07) */ -#define EBU_SDRMOD_OPMODE_Pos (7UL) /*!< EBU SDRMOD: OPMODE (Bit 7) */ -#define EBU_SDRMOD_OPMODE_Msk (0x3f80UL) /*!< EBU SDRMOD: OPMODE (Bitfield-Mask: 0x7f) */ -#define EBU_SDRMOD_COLDSTART_Pos (15UL) /*!< EBU SDRMOD: COLDSTART (Bit 15) */ -#define EBU_SDRMOD_COLDSTART_Msk (0x8000UL) /*!< EBU SDRMOD: COLDSTART (Bitfield-Mask: 0x01) */ -#define EBU_SDRMOD_XOPM_Pos (16UL) /*!< EBU SDRMOD: XOPM (Bit 16) */ -#define EBU_SDRMOD_XOPM_Msk (0xfff0000UL) /*!< EBU SDRMOD: XOPM (Bitfield-Mask: 0xfff) */ -#define EBU_SDRMOD_XBA_Pos (28UL) /*!< EBU SDRMOD: XBA (Bit 28) */ -#define EBU_SDRMOD_XBA_Msk (0xf0000000UL) /*!< EBU SDRMOD: XBA (Bitfield-Mask: 0x0f) */ - -/* --------------------------------- EBU_SDRMREF -------------------------------- */ -#define EBU_SDRMREF_REFRESHC_Pos (0UL) /*!< EBU SDRMREF: REFRESHC (Bit 0) */ -#define EBU_SDRMREF_REFRESHC_Msk (0x3fUL) /*!< EBU SDRMREF: REFRESHC (Bitfield-Mask: 0x3f) */ -#define EBU_SDRMREF_REFRESHR_Pos (6UL) /*!< EBU SDRMREF: REFRESHR (Bit 6) */ -#define EBU_SDRMREF_REFRESHR_Msk (0x1c0UL) /*!< EBU SDRMREF: REFRESHR (Bitfield-Mask: 0x07) */ -#define EBU_SDRMREF_SELFREXST_Pos (9UL) /*!< EBU SDRMREF: SELFREXST (Bit 9) */ -#define EBU_SDRMREF_SELFREXST_Msk (0x200UL) /*!< EBU SDRMREF: SELFREXST (Bitfield-Mask: 0x01) */ -#define EBU_SDRMREF_SELFREX_Pos (10UL) /*!< EBU SDRMREF: SELFREX (Bit 10) */ -#define EBU_SDRMREF_SELFREX_Msk (0x400UL) /*!< EBU SDRMREF: SELFREX (Bitfield-Mask: 0x01) */ -#define EBU_SDRMREF_SELFRENST_Pos (11UL) /*!< EBU SDRMREF: SELFRENST (Bit 11) */ -#define EBU_SDRMREF_SELFRENST_Msk (0x800UL) /*!< EBU SDRMREF: SELFRENST (Bitfield-Mask: 0x01) */ -#define EBU_SDRMREF_SELFREN_Pos (12UL) /*!< EBU SDRMREF: SELFREN (Bit 12) */ -#define EBU_SDRMREF_SELFREN_Msk (0x1000UL) /*!< EBU SDRMREF: SELFREN (Bitfield-Mask: 0x01) */ -#define EBU_SDRMREF_AUTOSELFR_Pos (13UL) /*!< EBU SDRMREF: AUTOSELFR (Bit 13) */ -#define EBU_SDRMREF_AUTOSELFR_Msk (0x2000UL) /*!< EBU SDRMREF: AUTOSELFR (Bitfield-Mask: 0x01) */ -#define EBU_SDRMREF_ERFSHC_Pos (14UL) /*!< EBU SDRMREF: ERFSHC (Bit 14) */ -#define EBU_SDRMREF_ERFSHC_Msk (0xc000UL) /*!< EBU SDRMREF: ERFSHC (Bitfield-Mask: 0x03) */ -#define EBU_SDRMREF_SELFREX_DLY_Pos (16UL) /*!< EBU SDRMREF: SELFREX_DLY (Bit 16) */ -#define EBU_SDRMREF_SELFREX_DLY_Msk (0xff0000UL) /*!< EBU SDRMREF: SELFREX_DLY (Bitfield-Mask: 0xff) */ -#define EBU_SDRMREF_ARFSH_Pos (24UL) /*!< EBU SDRMREF: ARFSH (Bit 24) */ -#define EBU_SDRMREF_ARFSH_Msk (0x1000000UL) /*!< EBU SDRMREF: ARFSH (Bitfield-Mask: 0x01) */ -#define EBU_SDRMREF_RES_DLY_Pos (25UL) /*!< EBU SDRMREF: RES_DLY (Bit 25) */ -#define EBU_SDRMREF_RES_DLY_Msk (0xe000000UL) /*!< EBU SDRMREF: RES_DLY (Bitfield-Mask: 0x07) */ - -/* --------------------------------- EBU_SDRSTAT -------------------------------- */ -#define EBU_SDRSTAT_REFERR_Pos (0UL) /*!< EBU SDRSTAT: REFERR (Bit 0) */ -#define EBU_SDRSTAT_REFERR_Msk (0x1UL) /*!< EBU SDRSTAT: REFERR (Bitfield-Mask: 0x01) */ -#define EBU_SDRSTAT_SDRMBUSY_Pos (1UL) /*!< EBU SDRSTAT: SDRMBUSY (Bit 1) */ -#define EBU_SDRSTAT_SDRMBUSY_Msk (0x2UL) /*!< EBU SDRSTAT: SDRMBUSY (Bitfield-Mask: 0x01) */ -#define EBU_SDRSTAT_SDERR_Pos (2UL) /*!< EBU SDRSTAT: SDERR (Bit 2) */ -#define EBU_SDRSTAT_SDERR_Msk (0x4UL) /*!< EBU SDRSTAT: SDERR (Bitfield-Mask: 0x01) */ - - -/* ================================================================================ */ -/* ================ struct 'ETH0_CON' Position & Mask ================ */ -/* ================================================================================ */ - - -/* ------------------------------ ETH0_CON_ETH0_CON ----------------------------- */ -#define ETH_CON_RXD0_Pos (0UL) /*!< ETH0_CON ETH0_CON: RXD0 (Bit 0) */ -#define ETH_CON_RXD0_Msk (0x3UL) /*!< ETH0_CON ETH0_CON: RXD0 (Bitfield-Mask: 0x03) */ -#define ETH_CON_RXD1_Pos (2UL) /*!< ETH0_CON ETH0_CON: RXD1 (Bit 2) */ -#define ETH_CON_RXD1_Msk (0xcUL) /*!< ETH0_CON ETH0_CON: RXD1 (Bitfield-Mask: 0x03) */ -#define ETH_CON_RXD2_Pos (4UL) /*!< ETH0_CON ETH0_CON: RXD2 (Bit 4) */ -#define ETH_CON_RXD2_Msk (0x30UL) /*!< ETH0_CON ETH0_CON: RXD2 (Bitfield-Mask: 0x03) */ -#define ETH_CON_RXD3_Pos (6UL) /*!< ETH0_CON ETH0_CON: RXD3 (Bit 6) */ -#define ETH_CON_RXD3_Msk (0xc0UL) /*!< ETH0_CON ETH0_CON: RXD3 (Bitfield-Mask: 0x03) */ -#define ETH_CON_CLK_RMII_Pos (8UL) /*!< ETH0_CON ETH0_CON: CLK_RMII (Bit 8) */ -#define ETH_CON_CLK_RMII_Msk (0x300UL) /*!< ETH0_CON ETH0_CON: CLK_RMII (Bitfield-Mask: 0x03) */ -#define ETH_CON_CRS_DV_Pos (10UL) /*!< ETH0_CON ETH0_CON: CRS_DV (Bit 10) */ -#define ETH_CON_CRS_DV_Msk (0xc00UL) /*!< ETH0_CON ETH0_CON: CRS_DV (Bitfield-Mask: 0x03) */ -#define ETH_CON_CRS_Pos (12UL) /*!< ETH0_CON ETH0_CON: CRS (Bit 12) */ -#define ETH_CON_CRS_Msk (0x3000UL) /*!< ETH0_CON ETH0_CON: CRS (Bitfield-Mask: 0x03) */ -#define ETH_CON_RXER_Pos (14UL) /*!< ETH0_CON ETH0_CON: RXER (Bit 14) */ -#define ETH_CON_RXER_Msk (0xc000UL) /*!< ETH0_CON ETH0_CON: RXER (Bitfield-Mask: 0x03) */ -#define ETH_CON_COL_Pos (16UL) /*!< ETH0_CON ETH0_CON: COL (Bit 16) */ -#define ETH_CON_COL_Msk (0x30000UL) /*!< ETH0_CON ETH0_CON: COL (Bitfield-Mask: 0x03) */ -#define ETH_CON_CLK_TX_Pos (18UL) /*!< ETH0_CON ETH0_CON: CLK_TX (Bit 18) */ -#define ETH_CON_CLK_TX_Msk (0xc0000UL) /*!< ETH0_CON ETH0_CON: CLK_TX (Bitfield-Mask: 0x03) */ -#define ETH_CON_MDIO_Pos (22UL) /*!< ETH0_CON ETH0_CON: MDIO (Bit 22) */ -#define ETH_CON_MDIO_Msk (0xc00000UL) /*!< ETH0_CON ETH0_CON: MDIO (Bitfield-Mask: 0x03) */ -#define ETH_CON_INFSEL_Pos (26UL) /*!< ETH0_CON ETH0_CON: INFSEL (Bit 26) */ -#define ETH_CON_INFSEL_Msk (0x4000000UL) /*!< ETH0_CON ETH0_CON: INFSEL (Bitfield-Mask: 0x01) */ - - -/* ================================================================================ */ -/* ================ Group 'ETH' Position & Mask ================ */ -/* ================================================================================ */ - - -/* ---------------------------- ETH_MAC_CONFIGURATION --------------------------- */ -#define ETH_MAC_CONFIGURATION_PRELEN_Pos (0UL) /*!< ETH MAC_CONFIGURATION: PRELEN (Bit 0) */ -#define ETH_MAC_CONFIGURATION_PRELEN_Msk (0x3UL) /*!< ETH MAC_CONFIGURATION: PRELEN (Bitfield-Mask: 0x03) */ -#define ETH_MAC_CONFIGURATION_RE_Pos (2UL) /*!< ETH MAC_CONFIGURATION: RE (Bit 2) */ -#define ETH_MAC_CONFIGURATION_RE_Msk (0x4UL) /*!< ETH MAC_CONFIGURATION: RE (Bitfield-Mask: 0x01) */ -#define ETH_MAC_CONFIGURATION_TE_Pos (3UL) /*!< ETH MAC_CONFIGURATION: TE (Bit 3) */ -#define ETH_MAC_CONFIGURATION_TE_Msk (0x8UL) /*!< ETH MAC_CONFIGURATION: TE (Bitfield-Mask: 0x01) */ -#define ETH_MAC_CONFIGURATION_DC_Pos (4UL) /*!< ETH MAC_CONFIGURATION: DC (Bit 4) */ -#define ETH_MAC_CONFIGURATION_DC_Msk (0x10UL) /*!< ETH MAC_CONFIGURATION: DC (Bitfield-Mask: 0x01) */ -#define ETH_MAC_CONFIGURATION_BL_Pos (5UL) /*!< ETH MAC_CONFIGURATION: BL (Bit 5) */ -#define ETH_MAC_CONFIGURATION_BL_Msk (0x60UL) /*!< ETH MAC_CONFIGURATION: BL (Bitfield-Mask: 0x03) */ -#define ETH_MAC_CONFIGURATION_ACS_Pos (7UL) /*!< ETH MAC_CONFIGURATION: ACS (Bit 7) */ -#define ETH_MAC_CONFIGURATION_ACS_Msk (0x80UL) /*!< ETH MAC_CONFIGURATION: ACS (Bitfield-Mask: 0x01) */ -#define ETH_MAC_CONFIGURATION_DR_Pos (9UL) /*!< ETH MAC_CONFIGURATION: DR (Bit 9) */ -#define ETH_MAC_CONFIGURATION_DR_Msk (0x200UL) /*!< ETH MAC_CONFIGURATION: DR (Bitfield-Mask: 0x01) */ -#define ETH_MAC_CONFIGURATION_IPC_Pos (10UL) /*!< ETH MAC_CONFIGURATION: IPC (Bit 10) */ -#define ETH_MAC_CONFIGURATION_IPC_Msk (0x400UL) /*!< ETH MAC_CONFIGURATION: IPC (Bitfield-Mask: 0x01) */ -#define ETH_MAC_CONFIGURATION_DM_Pos (11UL) /*!< ETH MAC_CONFIGURATION: DM (Bit 11) */ -#define ETH_MAC_CONFIGURATION_DM_Msk (0x800UL) /*!< ETH MAC_CONFIGURATION: DM (Bitfield-Mask: 0x01) */ -#define ETH_MAC_CONFIGURATION_LM_Pos (12UL) /*!< ETH MAC_CONFIGURATION: LM (Bit 12) */ -#define ETH_MAC_CONFIGURATION_LM_Msk (0x1000UL) /*!< ETH MAC_CONFIGURATION: LM (Bitfield-Mask: 0x01) */ -#define ETH_MAC_CONFIGURATION_DO_Pos (13UL) /*!< ETH MAC_CONFIGURATION: DO (Bit 13) */ -#define ETH_MAC_CONFIGURATION_DO_Msk (0x2000UL) /*!< ETH MAC_CONFIGURATION: DO (Bitfield-Mask: 0x01) */ -#define ETH_MAC_CONFIGURATION_FES_Pos (14UL) /*!< ETH MAC_CONFIGURATION: FES (Bit 14) */ -#define ETH_MAC_CONFIGURATION_FES_Msk (0x4000UL) /*!< ETH MAC_CONFIGURATION: FES (Bitfield-Mask: 0x01) */ -#define ETH_MAC_CONFIGURATION_DCRS_Pos (16UL) /*!< ETH MAC_CONFIGURATION: DCRS (Bit 16) */ -#define ETH_MAC_CONFIGURATION_DCRS_Msk (0x10000UL) /*!< ETH MAC_CONFIGURATION: DCRS (Bitfield-Mask: 0x01) */ -#define ETH_MAC_CONFIGURATION_IFG_Pos (17UL) /*!< ETH MAC_CONFIGURATION: IFG (Bit 17) */ -#define ETH_MAC_CONFIGURATION_IFG_Msk (0xe0000UL) /*!< ETH MAC_CONFIGURATION: IFG (Bitfield-Mask: 0x07) */ -#define ETH_MAC_CONFIGURATION_JE_Pos (20UL) /*!< ETH MAC_CONFIGURATION: JE (Bit 20) */ -#define ETH_MAC_CONFIGURATION_JE_Msk (0x100000UL) /*!< ETH MAC_CONFIGURATION: JE (Bitfield-Mask: 0x01) */ -#define ETH_MAC_CONFIGURATION_BE_Pos (21UL) /*!< ETH MAC_CONFIGURATION: BE (Bit 21) */ -#define ETH_MAC_CONFIGURATION_BE_Msk (0x200000UL) /*!< ETH MAC_CONFIGURATION: BE (Bitfield-Mask: 0x01) */ -#define ETH_MAC_CONFIGURATION_JD_Pos (22UL) /*!< ETH MAC_CONFIGURATION: JD (Bit 22) */ -#define ETH_MAC_CONFIGURATION_JD_Msk (0x400000UL) /*!< ETH MAC_CONFIGURATION: JD (Bitfield-Mask: 0x01) */ -#define ETH_MAC_CONFIGURATION_WD_Pos (23UL) /*!< ETH MAC_CONFIGURATION: WD (Bit 23) */ -#define ETH_MAC_CONFIGURATION_WD_Msk (0x800000UL) /*!< ETH MAC_CONFIGURATION: WD (Bitfield-Mask: 0x01) */ -#define ETH_MAC_CONFIGURATION_TC_Pos (24UL) /*!< ETH MAC_CONFIGURATION: TC (Bit 24) */ -#define ETH_MAC_CONFIGURATION_TC_Msk (0x1000000UL) /*!< ETH MAC_CONFIGURATION: TC (Bitfield-Mask: 0x01) */ -#define ETH_MAC_CONFIGURATION_CST_Pos (25UL) /*!< ETH MAC_CONFIGURATION: CST (Bit 25) */ -#define ETH_MAC_CONFIGURATION_CST_Msk (0x2000000UL) /*!< ETH MAC_CONFIGURATION: CST (Bitfield-Mask: 0x01) */ -#define ETH_MAC_CONFIGURATION_TWOKPE_Pos (27UL) /*!< ETH MAC_CONFIGURATION: TWOKPE (Bit 27) */ -#define ETH_MAC_CONFIGURATION_TWOKPE_Msk (0x8000000UL) /*!< ETH MAC_CONFIGURATION: TWOKPE (Bitfield-Mask: 0x01) */ -#define ETH_MAC_CONFIGURATION_SARC_Pos (28UL) /*!< ETH MAC_CONFIGURATION: SARC (Bit 28) */ -#define ETH_MAC_CONFIGURATION_SARC_Msk (0x70000000UL) /*!< ETH MAC_CONFIGURATION: SARC (Bitfield-Mask: 0x07) */ - -/* ---------------------------- ETH_MAC_FRAME_FILTER ---------------------------- */ -#define ETH_MAC_FRAME_FILTER_PR_Pos (0UL) /*!< ETH MAC_FRAME_FILTER: PR (Bit 0) */ -#define ETH_MAC_FRAME_FILTER_PR_Msk (0x1UL) /*!< ETH MAC_FRAME_FILTER: PR (Bitfield-Mask: 0x01) */ -#define ETH_MAC_FRAME_FILTER_HUC_Pos (1UL) /*!< ETH MAC_FRAME_FILTER: HUC (Bit 1) */ -#define ETH_MAC_FRAME_FILTER_HUC_Msk (0x2UL) /*!< ETH MAC_FRAME_FILTER: HUC (Bitfield-Mask: 0x01) */ -#define ETH_MAC_FRAME_FILTER_HMC_Pos (2UL) /*!< ETH MAC_FRAME_FILTER: HMC (Bit 2) */ -#define ETH_MAC_FRAME_FILTER_HMC_Msk (0x4UL) /*!< ETH MAC_FRAME_FILTER: HMC (Bitfield-Mask: 0x01) */ -#define ETH_MAC_FRAME_FILTER_DAIF_Pos (3UL) /*!< ETH MAC_FRAME_FILTER: DAIF (Bit 3) */ -#define ETH_MAC_FRAME_FILTER_DAIF_Msk (0x8UL) /*!< ETH MAC_FRAME_FILTER: DAIF (Bitfield-Mask: 0x01) */ -#define ETH_MAC_FRAME_FILTER_PM_Pos (4UL) /*!< ETH MAC_FRAME_FILTER: PM (Bit 4) */ -#define ETH_MAC_FRAME_FILTER_PM_Msk (0x10UL) /*!< ETH MAC_FRAME_FILTER: PM (Bitfield-Mask: 0x01) */ -#define ETH_MAC_FRAME_FILTER_DBF_Pos (5UL) /*!< ETH MAC_FRAME_FILTER: DBF (Bit 5) */ -#define ETH_MAC_FRAME_FILTER_DBF_Msk (0x20UL) /*!< ETH MAC_FRAME_FILTER: DBF (Bitfield-Mask: 0x01) */ -#define ETH_MAC_FRAME_FILTER_PCF_Pos (6UL) /*!< ETH MAC_FRAME_FILTER: PCF (Bit 6) */ -#define ETH_MAC_FRAME_FILTER_PCF_Msk (0xc0UL) /*!< ETH MAC_FRAME_FILTER: PCF (Bitfield-Mask: 0x03) */ -#define ETH_MAC_FRAME_FILTER_SAIF_Pos (8UL) /*!< ETH MAC_FRAME_FILTER: SAIF (Bit 8) */ -#define ETH_MAC_FRAME_FILTER_SAIF_Msk (0x100UL) /*!< ETH MAC_FRAME_FILTER: SAIF (Bitfield-Mask: 0x01) */ -#define ETH_MAC_FRAME_FILTER_SAF_Pos (9UL) /*!< ETH MAC_FRAME_FILTER: SAF (Bit 9) */ -#define ETH_MAC_FRAME_FILTER_SAF_Msk (0x200UL) /*!< ETH MAC_FRAME_FILTER: SAF (Bitfield-Mask: 0x01) */ -#define ETH_MAC_FRAME_FILTER_HPF_Pos (10UL) /*!< ETH MAC_FRAME_FILTER: HPF (Bit 10) */ -#define ETH_MAC_FRAME_FILTER_HPF_Msk (0x400UL) /*!< ETH MAC_FRAME_FILTER: HPF (Bitfield-Mask: 0x01) */ -#define ETH_MAC_FRAME_FILTER_VTFE_Pos (16UL) /*!< ETH MAC_FRAME_FILTER: VTFE (Bit 16) */ -#define ETH_MAC_FRAME_FILTER_VTFE_Msk (0x10000UL) /*!< ETH MAC_FRAME_FILTER: VTFE (Bitfield-Mask: 0x01) */ -#define ETH_MAC_FRAME_FILTER_IPFE_Pos (20UL) /*!< ETH MAC_FRAME_FILTER: IPFE (Bit 20) */ -#define ETH_MAC_FRAME_FILTER_IPFE_Msk (0x100000UL) /*!< ETH MAC_FRAME_FILTER: IPFE (Bitfield-Mask: 0x01) */ -#define ETH_MAC_FRAME_FILTER_DNTU_Pos (21UL) /*!< ETH MAC_FRAME_FILTER: DNTU (Bit 21) */ -#define ETH_MAC_FRAME_FILTER_DNTU_Msk (0x200000UL) /*!< ETH MAC_FRAME_FILTER: DNTU (Bitfield-Mask: 0x01) */ -#define ETH_MAC_FRAME_FILTER_RA_Pos (31UL) /*!< ETH MAC_FRAME_FILTER: RA (Bit 31) */ -#define ETH_MAC_FRAME_FILTER_RA_Msk (0x80000000UL) /*!< ETH MAC_FRAME_FILTER: RA (Bitfield-Mask: 0x01) */ - -/* ----------------------------- ETH_HASH_TABLE_HIGH ---------------------------- */ -#define ETH_HASH_TABLE_HIGH_HTH_Pos (0UL) /*!< ETH HASH_TABLE_HIGH: HTH (Bit 0) */ -#define ETH_HASH_TABLE_HIGH_HTH_Msk (0xffffffffUL) /*!< ETH HASH_TABLE_HIGH: HTH (Bitfield-Mask: 0xffffffff) */ - -/* ----------------------------- ETH_HASH_TABLE_LOW ----------------------------- */ -#define ETH_HASH_TABLE_LOW_HTL_Pos (0UL) /*!< ETH HASH_TABLE_LOW: HTL (Bit 0) */ -#define ETH_HASH_TABLE_LOW_HTL_Msk (0xffffffffUL) /*!< ETH HASH_TABLE_LOW: HTL (Bitfield-Mask: 0xffffffff) */ - -/* ------------------------------ ETH_GMII_ADDRESS ------------------------------ */ -#define ETH_GMII_ADDRESS_MB_Pos (0UL) /*!< ETH GMII_ADDRESS: MB (Bit 0) */ -#define ETH_GMII_ADDRESS_MB_Msk (0x1UL) /*!< ETH GMII_ADDRESS: MB (Bitfield-Mask: 0x01) */ -#define ETH_GMII_ADDRESS_MW_Pos (1UL) /*!< ETH GMII_ADDRESS: MW (Bit 1) */ -#define ETH_GMII_ADDRESS_MW_Msk (0x2UL) /*!< ETH GMII_ADDRESS: MW (Bitfield-Mask: 0x01) */ -#define ETH_GMII_ADDRESS_CR_Pos (2UL) /*!< ETH GMII_ADDRESS: CR (Bit 2) */ -#define ETH_GMII_ADDRESS_CR_Msk (0x3cUL) /*!< ETH GMII_ADDRESS: CR (Bitfield-Mask: 0x0f) */ -#define ETH_GMII_ADDRESS_MR_Pos (6UL) /*!< ETH GMII_ADDRESS: MR (Bit 6) */ -#define ETH_GMII_ADDRESS_MR_Msk (0x7c0UL) /*!< ETH GMII_ADDRESS: MR (Bitfield-Mask: 0x1f) */ -#define ETH_GMII_ADDRESS_PA_Pos (11UL) /*!< ETH GMII_ADDRESS: PA (Bit 11) */ -#define ETH_GMII_ADDRESS_PA_Msk (0xf800UL) /*!< ETH GMII_ADDRESS: PA (Bitfield-Mask: 0x1f) */ - -/* -------------------------------- ETH_GMII_DATA ------------------------------- */ -#define ETH_GMII_DATA_MD_Pos (0UL) /*!< ETH GMII_DATA: MD (Bit 0) */ -#define ETH_GMII_DATA_MD_Msk (0xffffUL) /*!< ETH GMII_DATA: MD (Bitfield-Mask: 0xffff) */ - -/* ------------------------------ ETH_FLOW_CONTROL ------------------------------ */ -#define ETH_FLOW_CONTROL_FCA_BPA_Pos (0UL) /*!< ETH FLOW_CONTROL: FCA_BPA (Bit 0) */ -#define ETH_FLOW_CONTROL_FCA_BPA_Msk (0x1UL) /*!< ETH FLOW_CONTROL: FCA_BPA (Bitfield-Mask: 0x01) */ -#define ETH_FLOW_CONTROL_TFE_Pos (1UL) /*!< ETH FLOW_CONTROL: TFE (Bit 1) */ -#define ETH_FLOW_CONTROL_TFE_Msk (0x2UL) /*!< ETH FLOW_CONTROL: TFE (Bitfield-Mask: 0x01) */ -#define ETH_FLOW_CONTROL_RFE_Pos (2UL) /*!< ETH FLOW_CONTROL: RFE (Bit 2) */ -#define ETH_FLOW_CONTROL_RFE_Msk (0x4UL) /*!< ETH FLOW_CONTROL: RFE (Bitfield-Mask: 0x01) */ -#define ETH_FLOW_CONTROL_UP_Pos (3UL) /*!< ETH FLOW_CONTROL: UP (Bit 3) */ -#define ETH_FLOW_CONTROL_UP_Msk (0x8UL) /*!< ETH FLOW_CONTROL: UP (Bitfield-Mask: 0x01) */ -#define ETH_FLOW_CONTROL_PLT_Pos (4UL) /*!< ETH FLOW_CONTROL: PLT (Bit 4) */ -#define ETH_FLOW_CONTROL_PLT_Msk (0x30UL) /*!< ETH FLOW_CONTROL: PLT (Bitfield-Mask: 0x03) */ -#define ETH_FLOW_CONTROL_DZPQ_Pos (7UL) /*!< ETH FLOW_CONTROL: DZPQ (Bit 7) */ -#define ETH_FLOW_CONTROL_DZPQ_Msk (0x80UL) /*!< ETH FLOW_CONTROL: DZPQ (Bitfield-Mask: 0x01) */ -#define ETH_FLOW_CONTROL_PT_Pos (16UL) /*!< ETH FLOW_CONTROL: PT (Bit 16) */ -#define ETH_FLOW_CONTROL_PT_Msk (0xffff0000UL) /*!< ETH FLOW_CONTROL: PT (Bitfield-Mask: 0xffff) */ - -/* -------------------------------- ETH_VLAN_TAG -------------------------------- */ -#define ETH_VLAN_TAG_VL_Pos (0UL) /*!< ETH VLAN_TAG: VL (Bit 0) */ -#define ETH_VLAN_TAG_VL_Msk (0xffffUL) /*!< ETH VLAN_TAG: VL (Bitfield-Mask: 0xffff) */ -#define ETH_VLAN_TAG_ETV_Pos (16UL) /*!< ETH VLAN_TAG: ETV (Bit 16) */ -#define ETH_VLAN_TAG_ETV_Msk (0x10000UL) /*!< ETH VLAN_TAG: ETV (Bitfield-Mask: 0x01) */ -#define ETH_VLAN_TAG_VTIM_Pos (17UL) /*!< ETH VLAN_TAG: VTIM (Bit 17) */ -#define ETH_VLAN_TAG_VTIM_Msk (0x20000UL) /*!< ETH VLAN_TAG: VTIM (Bitfield-Mask: 0x01) */ -#define ETH_VLAN_TAG_ESVL_Pos (18UL) /*!< ETH VLAN_TAG: ESVL (Bit 18) */ -#define ETH_VLAN_TAG_ESVL_Msk (0x40000UL) /*!< ETH VLAN_TAG: ESVL (Bitfield-Mask: 0x01) */ -#define ETH_VLAN_TAG_VTHM_Pos (19UL) /*!< ETH VLAN_TAG: VTHM (Bit 19) */ -#define ETH_VLAN_TAG_VTHM_Msk (0x80000UL) /*!< ETH VLAN_TAG: VTHM (Bitfield-Mask: 0x01) */ - -/* --------------------------------- ETH_VERSION -------------------------------- */ -#define ETH_VERSION_SNPSVER_Pos (0UL) /*!< ETH VERSION: SNPSVER (Bit 0) */ -#define ETH_VERSION_SNPSVER_Msk (0xffUL) /*!< ETH VERSION: SNPSVER (Bitfield-Mask: 0xff) */ -#define ETH_VERSION_USERVER_Pos (8UL) /*!< ETH VERSION: USERVER (Bit 8) */ -#define ETH_VERSION_USERVER_Msk (0xff00UL) /*!< ETH VERSION: USERVER (Bitfield-Mask: 0xff) */ - -/* ---------------------------------- ETH_DEBUG --------------------------------- */ -#define ETH_DEBUG_RPESTS_Pos (0UL) /*!< ETH DEBUG: RPESTS (Bit 0) */ -#define ETH_DEBUG_RPESTS_Msk (0x1UL) /*!< ETH DEBUG: RPESTS (Bitfield-Mask: 0x01) */ -#define ETH_DEBUG_RFCFCSTS_Pos (1UL) /*!< ETH DEBUG: RFCFCSTS (Bit 1) */ -#define ETH_DEBUG_RFCFCSTS_Msk (0x6UL) /*!< ETH DEBUG: RFCFCSTS (Bitfield-Mask: 0x03) */ -#define ETH_DEBUG_RWCSTS_Pos (4UL) /*!< ETH DEBUG: RWCSTS (Bit 4) */ -#define ETH_DEBUG_RWCSTS_Msk (0x10UL) /*!< ETH DEBUG: RWCSTS (Bitfield-Mask: 0x01) */ -#define ETH_DEBUG_RRCSTS_Pos (5UL) /*!< ETH DEBUG: RRCSTS (Bit 5) */ -#define ETH_DEBUG_RRCSTS_Msk (0x60UL) /*!< ETH DEBUG: RRCSTS (Bitfield-Mask: 0x03) */ -#define ETH_DEBUG_RXFSTS_Pos (8UL) /*!< ETH DEBUG: RXFSTS (Bit 8) */ -#define ETH_DEBUG_RXFSTS_Msk (0x300UL) /*!< ETH DEBUG: RXFSTS (Bitfield-Mask: 0x03) */ -#define ETH_DEBUG_TPESTS_Pos (16UL) /*!< ETH DEBUG: TPESTS (Bit 16) */ -#define ETH_DEBUG_TPESTS_Msk (0x10000UL) /*!< ETH DEBUG: TPESTS (Bitfield-Mask: 0x01) */ -#define ETH_DEBUG_TFCSTS_Pos (17UL) /*!< ETH DEBUG: TFCSTS (Bit 17) */ -#define ETH_DEBUG_TFCSTS_Msk (0x60000UL) /*!< ETH DEBUG: TFCSTS (Bitfield-Mask: 0x03) */ -#define ETH_DEBUG_TXPAUSED_Pos (19UL) /*!< ETH DEBUG: TXPAUSED (Bit 19) */ -#define ETH_DEBUG_TXPAUSED_Msk (0x80000UL) /*!< ETH DEBUG: TXPAUSED (Bitfield-Mask: 0x01) */ -#define ETH_DEBUG_TRCSTS_Pos (20UL) /*!< ETH DEBUG: TRCSTS (Bit 20) */ -#define ETH_DEBUG_TRCSTS_Msk (0x300000UL) /*!< ETH DEBUG: TRCSTS (Bitfield-Mask: 0x03) */ -#define ETH_DEBUG_TWCSTS_Pos (22UL) /*!< ETH DEBUG: TWCSTS (Bit 22) */ -#define ETH_DEBUG_TWCSTS_Msk (0x400000UL) /*!< ETH DEBUG: TWCSTS (Bitfield-Mask: 0x01) */ -#define ETH_DEBUG_TXFSTS_Pos (24UL) /*!< ETH DEBUG: TXFSTS (Bit 24) */ -#define ETH_DEBUG_TXFSTS_Msk (0x1000000UL) /*!< ETH DEBUG: TXFSTS (Bitfield-Mask: 0x01) */ -#define ETH_DEBUG_TXSTSFSTS_Pos (25UL) /*!< ETH DEBUG: TXSTSFSTS (Bit 25) */ -#define ETH_DEBUG_TXSTSFSTS_Msk (0x2000000UL) /*!< ETH DEBUG: TXSTSFSTS (Bitfield-Mask: 0x01) */ - -/* ----------------------- ETH_REMOTE_WAKE_UP_FRAME_FILTER ---------------------- */ -#define ETH_REMOTE_WAKE_UP_FRAME_FILTER_WKUPFRMFTR_Pos (0UL) /*!< ETH REMOTE_WAKE_UP_FRAME_FILTER: WKUPFRMFTR (Bit 0) */ -#define ETH_REMOTE_WAKE_UP_FRAME_FILTER_WKUPFRMFTR_Msk (0xffffffffUL) /*!< ETH REMOTE_WAKE_UP_FRAME_FILTER: WKUPFRMFTR (Bitfield-Mask: 0xffffffff) */ - -/* --------------------------- ETH_PMT_CONTROL_STATUS --------------------------- */ -#define ETH_PMT_CONTROL_STATUS_PWRDWN_Pos (0UL) /*!< ETH PMT_CONTROL_STATUS: PWRDWN (Bit 0) */ -#define ETH_PMT_CONTROL_STATUS_PWRDWN_Msk (0x1UL) /*!< ETH PMT_CONTROL_STATUS: PWRDWN (Bitfield-Mask: 0x01) */ -#define ETH_PMT_CONTROL_STATUS_MGKPKTEN_Pos (1UL) /*!< ETH PMT_CONTROL_STATUS: MGKPKTEN (Bit 1) */ -#define ETH_PMT_CONTROL_STATUS_MGKPKTEN_Msk (0x2UL) /*!< ETH PMT_CONTROL_STATUS: MGKPKTEN (Bitfield-Mask: 0x01) */ -#define ETH_PMT_CONTROL_STATUS_RWKPKTEN_Pos (2UL) /*!< ETH PMT_CONTROL_STATUS: RWKPKTEN (Bit 2) */ -#define ETH_PMT_CONTROL_STATUS_RWKPKTEN_Msk (0x4UL) /*!< ETH PMT_CONTROL_STATUS: RWKPKTEN (Bitfield-Mask: 0x01) */ -#define ETH_PMT_CONTROL_STATUS_MGKPRCVD_Pos (5UL) /*!< ETH PMT_CONTROL_STATUS: MGKPRCVD (Bit 5) */ -#define ETH_PMT_CONTROL_STATUS_MGKPRCVD_Msk (0x20UL) /*!< ETH PMT_CONTROL_STATUS: MGKPRCVD (Bitfield-Mask: 0x01) */ -#define ETH_PMT_CONTROL_STATUS_RWKPRCVD_Pos (6UL) /*!< ETH PMT_CONTROL_STATUS: RWKPRCVD (Bit 6) */ -#define ETH_PMT_CONTROL_STATUS_RWKPRCVD_Msk (0x40UL) /*!< ETH PMT_CONTROL_STATUS: RWKPRCVD (Bitfield-Mask: 0x01) */ -#define ETH_PMT_CONTROL_STATUS_GLBLUCAST_Pos (9UL) /*!< ETH PMT_CONTROL_STATUS: GLBLUCAST (Bit 9) */ -#define ETH_PMT_CONTROL_STATUS_GLBLUCAST_Msk (0x200UL) /*!< ETH PMT_CONTROL_STATUS: GLBLUCAST (Bitfield-Mask: 0x01) */ -#define ETH_PMT_CONTROL_STATUS_RWKFILTRST_Pos (31UL) /*!< ETH PMT_CONTROL_STATUS: RWKFILTRST (Bit 31) */ -#define ETH_PMT_CONTROL_STATUS_RWKFILTRST_Msk (0x80000000UL) /*!< ETH PMT_CONTROL_STATUS: RWKFILTRST (Bitfield-Mask: 0x01) */ - -/* ---------------------------- ETH_INTERRUPT_STATUS ---------------------------- */ -#define ETH_INTERRUPT_STATUS_PMTIS_Pos (3UL) /*!< ETH INTERRUPT_STATUS: PMTIS (Bit 3) */ -#define ETH_INTERRUPT_STATUS_PMTIS_Msk (0x8UL) /*!< ETH INTERRUPT_STATUS: PMTIS (Bitfield-Mask: 0x01) */ -#define ETH_INTERRUPT_STATUS_MMCIS_Pos (4UL) /*!< ETH INTERRUPT_STATUS: MMCIS (Bit 4) */ -#define ETH_INTERRUPT_STATUS_MMCIS_Msk (0x10UL) /*!< ETH INTERRUPT_STATUS: MMCIS (Bitfield-Mask: 0x01) */ -#define ETH_INTERRUPT_STATUS_MMCRXIS_Pos (5UL) /*!< ETH INTERRUPT_STATUS: MMCRXIS (Bit 5) */ -#define ETH_INTERRUPT_STATUS_MMCRXIS_Msk (0x20UL) /*!< ETH INTERRUPT_STATUS: MMCRXIS (Bitfield-Mask: 0x01) */ -#define ETH_INTERRUPT_STATUS_MMCTXIS_Pos (6UL) /*!< ETH INTERRUPT_STATUS: MMCTXIS (Bit 6) */ -#define ETH_INTERRUPT_STATUS_MMCTXIS_Msk (0x40UL) /*!< ETH INTERRUPT_STATUS: MMCTXIS (Bitfield-Mask: 0x01) */ -#define ETH_INTERRUPT_STATUS_MMCRXIPIS_Pos (7UL) /*!< ETH INTERRUPT_STATUS: MMCRXIPIS (Bit 7) */ -#define ETH_INTERRUPT_STATUS_MMCRXIPIS_Msk (0x80UL) /*!< ETH INTERRUPT_STATUS: MMCRXIPIS (Bitfield-Mask: 0x01) */ -#define ETH_INTERRUPT_STATUS_TSIS_Pos (9UL) /*!< ETH INTERRUPT_STATUS: TSIS (Bit 9) */ -#define ETH_INTERRUPT_STATUS_TSIS_Msk (0x200UL) /*!< ETH INTERRUPT_STATUS: TSIS (Bitfield-Mask: 0x01) */ - -/* ----------------------------- ETH_INTERRUPT_MASK ----------------------------- */ -#define ETH_INTERRUPT_MASK_PMTIM_Pos (3UL) /*!< ETH INTERRUPT_MASK: PMTIM (Bit 3) */ -#define ETH_INTERRUPT_MASK_PMTIM_Msk (0x8UL) /*!< ETH INTERRUPT_MASK: PMTIM (Bitfield-Mask: 0x01) */ -#define ETH_INTERRUPT_MASK_TSIM_Pos (9UL) /*!< ETH INTERRUPT_MASK: TSIM (Bit 9) */ -#define ETH_INTERRUPT_MASK_TSIM_Msk (0x200UL) /*!< ETH INTERRUPT_MASK: TSIM (Bitfield-Mask: 0x01) */ - -/* ---------------------------- ETH_MAC_ADDRESS0_HIGH --------------------------- */ -#define ETH_MAC_ADDRESS0_HIGH_ADDRHI_Pos (0UL) /*!< ETH MAC_ADDRESS0_HIGH: ADDRHI (Bit 0) */ -#define ETH_MAC_ADDRESS0_HIGH_ADDRHI_Msk (0xffffUL) /*!< ETH MAC_ADDRESS0_HIGH: ADDRHI (Bitfield-Mask: 0xffff) */ -#define ETH_MAC_ADDRESS0_HIGH_AE_Pos (31UL) /*!< ETH MAC_ADDRESS0_HIGH: AE (Bit 31) */ -#define ETH_MAC_ADDRESS0_HIGH_AE_Msk (0x80000000UL) /*!< ETH MAC_ADDRESS0_HIGH: AE (Bitfield-Mask: 0x01) */ - -/* ---------------------------- ETH_MAC_ADDRESS0_LOW ---------------------------- */ -#define ETH_MAC_ADDRESS0_LOW_ADDRLO_Pos (0UL) /*!< ETH MAC_ADDRESS0_LOW: ADDRLO (Bit 0) */ -#define ETH_MAC_ADDRESS0_LOW_ADDRLO_Msk (0xffffffffUL) /*!< ETH MAC_ADDRESS0_LOW: ADDRLO (Bitfield-Mask: 0xffffffff) */ - -/* ---------------------------- ETH_MAC_ADDRESS1_HIGH --------------------------- */ -#define ETH_MAC_ADDRESS1_HIGH_ADDRHI_Pos (0UL) /*!< ETH MAC_ADDRESS1_HIGH: ADDRHI (Bit 0) */ -#define ETH_MAC_ADDRESS1_HIGH_ADDRHI_Msk (0xffffUL) /*!< ETH MAC_ADDRESS1_HIGH: ADDRHI (Bitfield-Mask: 0xffff) */ -#define ETH_MAC_ADDRESS1_HIGH_MBC_Pos (24UL) /*!< ETH MAC_ADDRESS1_HIGH: MBC (Bit 24) */ -#define ETH_MAC_ADDRESS1_HIGH_MBC_Msk (0x3f000000UL) /*!< ETH MAC_ADDRESS1_HIGH: MBC (Bitfield-Mask: 0x3f) */ -#define ETH_MAC_ADDRESS1_HIGH_SA_Pos (30UL) /*!< ETH MAC_ADDRESS1_HIGH: SA (Bit 30) */ -#define ETH_MAC_ADDRESS1_HIGH_SA_Msk (0x40000000UL) /*!< ETH MAC_ADDRESS1_HIGH: SA (Bitfield-Mask: 0x01) */ -#define ETH_MAC_ADDRESS1_HIGH_AE_Pos (31UL) /*!< ETH MAC_ADDRESS1_HIGH: AE (Bit 31) */ -#define ETH_MAC_ADDRESS1_HIGH_AE_Msk (0x80000000UL) /*!< ETH MAC_ADDRESS1_HIGH: AE (Bitfield-Mask: 0x01) */ - -/* ---------------------------- ETH_MAC_ADDRESS1_LOW ---------------------------- */ -#define ETH_MAC_ADDRESS1_LOW_ADDRLO_Pos (0UL) /*!< ETH MAC_ADDRESS1_LOW: ADDRLO (Bit 0) */ -#define ETH_MAC_ADDRESS1_LOW_ADDRLO_Msk (0xffffffffUL) /*!< ETH MAC_ADDRESS1_LOW: ADDRLO (Bitfield-Mask: 0xffffffff) */ - -/* ---------------------------- ETH_MAC_ADDRESS2_HIGH --------------------------- */ -#define ETH_MAC_ADDRESS2_HIGH_ADDRHI_Pos (0UL) /*!< ETH MAC_ADDRESS2_HIGH: ADDRHI (Bit 0) */ -#define ETH_MAC_ADDRESS2_HIGH_ADDRHI_Msk (0xffffUL) /*!< ETH MAC_ADDRESS2_HIGH: ADDRHI (Bitfield-Mask: 0xffff) */ -#define ETH_MAC_ADDRESS2_HIGH_MBC_Pos (24UL) /*!< ETH MAC_ADDRESS2_HIGH: MBC (Bit 24) */ -#define ETH_MAC_ADDRESS2_HIGH_MBC_Msk (0x3f000000UL) /*!< ETH MAC_ADDRESS2_HIGH: MBC (Bitfield-Mask: 0x3f) */ -#define ETH_MAC_ADDRESS2_HIGH_SA_Pos (30UL) /*!< ETH MAC_ADDRESS2_HIGH: SA (Bit 30) */ -#define ETH_MAC_ADDRESS2_HIGH_SA_Msk (0x40000000UL) /*!< ETH MAC_ADDRESS2_HIGH: SA (Bitfield-Mask: 0x01) */ -#define ETH_MAC_ADDRESS2_HIGH_AE_Pos (31UL) /*!< ETH MAC_ADDRESS2_HIGH: AE (Bit 31) */ -#define ETH_MAC_ADDRESS2_HIGH_AE_Msk (0x80000000UL) /*!< ETH MAC_ADDRESS2_HIGH: AE (Bitfield-Mask: 0x01) */ - -/* ---------------------------- ETH_MAC_ADDRESS2_LOW ---------------------------- */ -#define ETH_MAC_ADDRESS2_LOW_ADDRLO_Pos (0UL) /*!< ETH MAC_ADDRESS2_LOW: ADDRLO (Bit 0) */ -#define ETH_MAC_ADDRESS2_LOW_ADDRLO_Msk (0xffffffffUL) /*!< ETH MAC_ADDRESS2_LOW: ADDRLO (Bitfield-Mask: 0xffffffff) */ - -/* ---------------------------- ETH_MAC_ADDRESS3_HIGH --------------------------- */ -#define ETH_MAC_ADDRESS3_HIGH_ADDRHI_Pos (0UL) /*!< ETH MAC_ADDRESS3_HIGH: ADDRHI (Bit 0) */ -#define ETH_MAC_ADDRESS3_HIGH_ADDRHI_Msk (0xffffUL) /*!< ETH MAC_ADDRESS3_HIGH: ADDRHI (Bitfield-Mask: 0xffff) */ -#define ETH_MAC_ADDRESS3_HIGH_MBC_Pos (24UL) /*!< ETH MAC_ADDRESS3_HIGH: MBC (Bit 24) */ -#define ETH_MAC_ADDRESS3_HIGH_MBC_Msk (0x3f000000UL) /*!< ETH MAC_ADDRESS3_HIGH: MBC (Bitfield-Mask: 0x3f) */ -#define ETH_MAC_ADDRESS3_HIGH_SA_Pos (30UL) /*!< ETH MAC_ADDRESS3_HIGH: SA (Bit 30) */ -#define ETH_MAC_ADDRESS3_HIGH_SA_Msk (0x40000000UL) /*!< ETH MAC_ADDRESS3_HIGH: SA (Bitfield-Mask: 0x01) */ -#define ETH_MAC_ADDRESS3_HIGH_AE_Pos (31UL) /*!< ETH MAC_ADDRESS3_HIGH: AE (Bit 31) */ -#define ETH_MAC_ADDRESS3_HIGH_AE_Msk (0x80000000UL) /*!< ETH MAC_ADDRESS3_HIGH: AE (Bitfield-Mask: 0x01) */ - -/* ---------------------------- ETH_MAC_ADDRESS3_LOW ---------------------------- */ -#define ETH_MAC_ADDRESS3_LOW_ADDRLO_Pos (0UL) /*!< ETH MAC_ADDRESS3_LOW: ADDRLO (Bit 0) */ -#define ETH_MAC_ADDRESS3_LOW_ADDRLO_Msk (0xffffffffUL) /*!< ETH MAC_ADDRESS3_LOW: ADDRLO (Bitfield-Mask: 0xffffffff) */ - -/* ------------------------------- ETH_MMC_CONTROL ------------------------------ */ -#define ETH_MMC_CONTROL_CNTRST_Pos (0UL) /*!< ETH MMC_CONTROL: CNTRST (Bit 0) */ -#define ETH_MMC_CONTROL_CNTRST_Msk (0x1UL) /*!< ETH MMC_CONTROL: CNTRST (Bitfield-Mask: 0x01) */ -#define ETH_MMC_CONTROL_CNTSTOPRO_Pos (1UL) /*!< ETH MMC_CONTROL: CNTSTOPRO (Bit 1) */ -#define ETH_MMC_CONTROL_CNTSTOPRO_Msk (0x2UL) /*!< ETH MMC_CONTROL: CNTSTOPRO (Bitfield-Mask: 0x01) */ -#define ETH_MMC_CONTROL_RSTONRD_Pos (2UL) /*!< ETH MMC_CONTROL: RSTONRD (Bit 2) */ -#define ETH_MMC_CONTROL_RSTONRD_Msk (0x4UL) /*!< ETH MMC_CONTROL: RSTONRD (Bitfield-Mask: 0x01) */ -#define ETH_MMC_CONTROL_CNTFREEZ_Pos (3UL) /*!< ETH MMC_CONTROL: CNTFREEZ (Bit 3) */ -#define ETH_MMC_CONTROL_CNTFREEZ_Msk (0x8UL) /*!< ETH MMC_CONTROL: CNTFREEZ (Bitfield-Mask: 0x01) */ -#define ETH_MMC_CONTROL_CNTPRST_Pos (4UL) /*!< ETH MMC_CONTROL: CNTPRST (Bit 4) */ -#define ETH_MMC_CONTROL_CNTPRST_Msk (0x10UL) /*!< ETH MMC_CONTROL: CNTPRST (Bitfield-Mask: 0x01) */ -#define ETH_MMC_CONTROL_CNTPRSTLVL_Pos (5UL) /*!< ETH MMC_CONTROL: CNTPRSTLVL (Bit 5) */ -#define ETH_MMC_CONTROL_CNTPRSTLVL_Msk (0x20UL) /*!< ETH MMC_CONTROL: CNTPRSTLVL (Bitfield-Mask: 0x01) */ -#define ETH_MMC_CONTROL_UCDBC_Pos (8UL) /*!< ETH MMC_CONTROL: UCDBC (Bit 8) */ -#define ETH_MMC_CONTROL_UCDBC_Msk (0x100UL) /*!< ETH MMC_CONTROL: UCDBC (Bitfield-Mask: 0x01) */ - -/* -------------------------- ETH_MMC_RECEIVE_INTERRUPT ------------------------- */ -#define ETH_MMC_RECEIVE_INTERRUPT_RXGBFRMIS_Pos (0UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXGBFRMIS (Bit 0) */ -#define ETH_MMC_RECEIVE_INTERRUPT_RXGBFRMIS_Msk (0x1UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXGBFRMIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_RECEIVE_INTERRUPT_RXGBOCTIS_Pos (1UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXGBOCTIS (Bit 1) */ -#define ETH_MMC_RECEIVE_INTERRUPT_RXGBOCTIS_Msk (0x2UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXGBOCTIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_RECEIVE_INTERRUPT_RXGOCTIS_Pos (2UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXGOCTIS (Bit 2) */ -#define ETH_MMC_RECEIVE_INTERRUPT_RXGOCTIS_Msk (0x4UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXGOCTIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_RECEIVE_INTERRUPT_RXBCGFIS_Pos (3UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXBCGFIS (Bit 3) */ -#define ETH_MMC_RECEIVE_INTERRUPT_RXBCGFIS_Msk (0x8UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXBCGFIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_RECEIVE_INTERRUPT_RXMCGFIS_Pos (4UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXMCGFIS (Bit 4) */ -#define ETH_MMC_RECEIVE_INTERRUPT_RXMCGFIS_Msk (0x10UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXMCGFIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_RECEIVE_INTERRUPT_RXCRCERFIS_Pos (5UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXCRCERFIS (Bit 5) */ -#define ETH_MMC_RECEIVE_INTERRUPT_RXCRCERFIS_Msk (0x20UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXCRCERFIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_RECEIVE_INTERRUPT_RXALGNERFIS_Pos (6UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXALGNERFIS (Bit 6) */ -#define ETH_MMC_RECEIVE_INTERRUPT_RXALGNERFIS_Msk (0x40UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXALGNERFIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_RECEIVE_INTERRUPT_RXRUNTFIS_Pos (7UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXRUNTFIS (Bit 7) */ -#define ETH_MMC_RECEIVE_INTERRUPT_RXRUNTFIS_Msk (0x80UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXRUNTFIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_RECEIVE_INTERRUPT_RXJABERFIS_Pos (8UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXJABERFIS (Bit 8) */ -#define ETH_MMC_RECEIVE_INTERRUPT_RXJABERFIS_Msk (0x100UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXJABERFIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_RECEIVE_INTERRUPT_RXUSIZEGFIS_Pos (9UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXUSIZEGFIS (Bit 9) */ -#define ETH_MMC_RECEIVE_INTERRUPT_RXUSIZEGFIS_Msk (0x200UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXUSIZEGFIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_RECEIVE_INTERRUPT_RXOSIZEGFIS_Pos (10UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXOSIZEGFIS (Bit 10) */ -#define ETH_MMC_RECEIVE_INTERRUPT_RXOSIZEGFIS_Msk (0x400UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXOSIZEGFIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_RECEIVE_INTERRUPT_RX64OCTGBFIS_Pos (11UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RX64OCTGBFIS (Bit 11) */ -#define ETH_MMC_RECEIVE_INTERRUPT_RX64OCTGBFIS_Msk (0x800UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RX64OCTGBFIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_RECEIVE_INTERRUPT_RX65T127OCTGBFIS_Pos (12UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RX65T127OCTGBFIS (Bit 12) */ -#define ETH_MMC_RECEIVE_INTERRUPT_RX65T127OCTGBFIS_Msk (0x1000UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RX65T127OCTGBFIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_RECEIVE_INTERRUPT_RX128T255OCTGBFIS_Pos (13UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RX128T255OCTGBFIS (Bit 13) */ -#define ETH_MMC_RECEIVE_INTERRUPT_RX128T255OCTGBFIS_Msk (0x2000UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RX128T255OCTGBFIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_RECEIVE_INTERRUPT_RX256T511OCTGBFIS_Pos (14UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RX256T511OCTGBFIS (Bit 14) */ -#define ETH_MMC_RECEIVE_INTERRUPT_RX256T511OCTGBFIS_Msk (0x4000UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RX256T511OCTGBFIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_RECEIVE_INTERRUPT_RX512T1023OCTGBFIS_Pos (15UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RX512T1023OCTGBFIS (Bit 15) */ -#define ETH_MMC_RECEIVE_INTERRUPT_RX512T1023OCTGBFIS_Msk (0x8000UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RX512T1023OCTGBFIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_RECEIVE_INTERRUPT_RX1024TMAXOCTGBFIS_Pos (16UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RX1024TMAXOCTGBFIS (Bit 16) */ -#define ETH_MMC_RECEIVE_INTERRUPT_RX1024TMAXOCTGBFIS_Msk (0x10000UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RX1024TMAXOCTGBFIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_RECEIVE_INTERRUPT_RXUCGFIS_Pos (17UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXUCGFIS (Bit 17) */ -#define ETH_MMC_RECEIVE_INTERRUPT_RXUCGFIS_Msk (0x20000UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXUCGFIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_RECEIVE_INTERRUPT_RXLENERFIS_Pos (18UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXLENERFIS (Bit 18) */ -#define ETH_MMC_RECEIVE_INTERRUPT_RXLENERFIS_Msk (0x40000UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXLENERFIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_RECEIVE_INTERRUPT_RXORANGEFIS_Pos (19UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXORANGEFIS (Bit 19) */ -#define ETH_MMC_RECEIVE_INTERRUPT_RXORANGEFIS_Msk (0x80000UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXORANGEFIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_RECEIVE_INTERRUPT_RXPAUSFIS_Pos (20UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXPAUSFIS (Bit 20) */ -#define ETH_MMC_RECEIVE_INTERRUPT_RXPAUSFIS_Msk (0x100000UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXPAUSFIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_RECEIVE_INTERRUPT_RXFOVFIS_Pos (21UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXFOVFIS (Bit 21) */ -#define ETH_MMC_RECEIVE_INTERRUPT_RXFOVFIS_Msk (0x200000UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXFOVFIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_RECEIVE_INTERRUPT_RXVLANGBFIS_Pos (22UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXVLANGBFIS (Bit 22) */ -#define ETH_MMC_RECEIVE_INTERRUPT_RXVLANGBFIS_Msk (0x400000UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXVLANGBFIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_RECEIVE_INTERRUPT_RXWDOGFIS_Pos (23UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXWDOGFIS (Bit 23) */ -#define ETH_MMC_RECEIVE_INTERRUPT_RXWDOGFIS_Msk (0x800000UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXWDOGFIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_RECEIVE_INTERRUPT_RXRCVERRFIS_Pos (24UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXRCVERRFIS (Bit 24) */ -#define ETH_MMC_RECEIVE_INTERRUPT_RXRCVERRFIS_Msk (0x1000000UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXRCVERRFIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_RECEIVE_INTERRUPT_RXCTRLFIS_Pos (25UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXCTRLFIS (Bit 25) */ -#define ETH_MMC_RECEIVE_INTERRUPT_RXCTRLFIS_Msk (0x2000000UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXCTRLFIS (Bitfield-Mask: 0x01) */ - -/* ------------------------- ETH_MMC_TRANSMIT_INTERRUPT ------------------------- */ -#define ETH_MMC_TRANSMIT_INTERRUPT_TXGBOCTIS_Pos (0UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXGBOCTIS (Bit 0) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_TXGBOCTIS_Msk (0x1UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXGBOCTIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_TXGBFRMIS_Pos (1UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXGBFRMIS (Bit 1) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_TXGBFRMIS_Msk (0x2UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXGBFRMIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_TXBCGFIS_Pos (2UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXBCGFIS (Bit 2) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_TXBCGFIS_Msk (0x4UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXBCGFIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_TXMCGFIS_Pos (3UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXMCGFIS (Bit 3) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_TXMCGFIS_Msk (0x8UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXMCGFIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_TX64OCTGBFIS_Pos (4UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TX64OCTGBFIS (Bit 4) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_TX64OCTGBFIS_Msk (0x10UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TX64OCTGBFIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_TX65T127OCTGBFIS_Pos (5UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TX65T127OCTGBFIS (Bit 5) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_TX65T127OCTGBFIS_Msk (0x20UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TX65T127OCTGBFIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_TX128T255OCTGBFIS_Pos (6UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TX128T255OCTGBFIS (Bit 6) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_TX128T255OCTGBFIS_Msk (0x40UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TX128T255OCTGBFIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_TX256T511OCTGBFIS_Pos (7UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TX256T511OCTGBFIS (Bit 7) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_TX256T511OCTGBFIS_Msk (0x80UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TX256T511OCTGBFIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_TX512T1023OCTGBFIS_Pos (8UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TX512T1023OCTGBFIS (Bit 8) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_TX512T1023OCTGBFIS_Msk (0x100UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TX512T1023OCTGBFIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_TX1024TMAXOCTGBFIS_Pos (9UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TX1024TMAXOCTGBFIS (Bit 9) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_TX1024TMAXOCTGBFIS_Msk (0x200UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TX1024TMAXOCTGBFIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_TXUCGBFIS_Pos (10UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXUCGBFIS (Bit 10) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_TXUCGBFIS_Msk (0x400UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXUCGBFIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_TXMCGBFIS_Pos (11UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXMCGBFIS (Bit 11) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_TXMCGBFIS_Msk (0x800UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXMCGBFIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_TXBCGBFIS_Pos (12UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXBCGBFIS (Bit 12) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_TXBCGBFIS_Msk (0x1000UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXBCGBFIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_TXUFLOWERFIS_Pos (13UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXUFLOWERFIS (Bit 13) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_TXUFLOWERFIS_Msk (0x2000UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXUFLOWERFIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_TXSCOLGFIS_Pos (14UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXSCOLGFIS (Bit 14) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_TXSCOLGFIS_Msk (0x4000UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXSCOLGFIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_TXMCOLGFIS_Pos (15UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXMCOLGFIS (Bit 15) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_TXMCOLGFIS_Msk (0x8000UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXMCOLGFIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_TXDEFFIS_Pos (16UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXDEFFIS (Bit 16) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_TXDEFFIS_Msk (0x10000UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXDEFFIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_TXLATCOLFIS_Pos (17UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXLATCOLFIS (Bit 17) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_TXLATCOLFIS_Msk (0x20000UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXLATCOLFIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_TXEXCOLFIS_Pos (18UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXEXCOLFIS (Bit 18) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_TXEXCOLFIS_Msk (0x40000UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXEXCOLFIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_TXCARERFIS_Pos (19UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXCARERFIS (Bit 19) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_TXCARERFIS_Msk (0x80000UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXCARERFIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_TXGOCTIS_Pos (20UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXGOCTIS (Bit 20) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_TXGOCTIS_Msk (0x100000UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXGOCTIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_TXGFRMIS_Pos (21UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXGFRMIS (Bit 21) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_TXGFRMIS_Msk (0x200000UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXGFRMIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_TXEXDEFFIS_Pos (22UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXEXDEFFIS (Bit 22) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_TXEXDEFFIS_Msk (0x400000UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXEXDEFFIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_TXPAUSFIS_Pos (23UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXPAUSFIS (Bit 23) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_TXPAUSFIS_Msk (0x800000UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXPAUSFIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_TXVLANGFIS_Pos (24UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXVLANGFIS (Bit 24) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_TXVLANGFIS_Msk (0x1000000UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXVLANGFIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_TXOSIZEGFIS_Pos (25UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXOSIZEGFIS (Bit 25) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_TXOSIZEGFIS_Msk (0x2000000UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXOSIZEGFIS (Bitfield-Mask: 0x01) */ - -/* ----------------------- ETH_MMC_RECEIVE_INTERRUPT_MASK ----------------------- */ -#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXGBFRMIM_Pos (0UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXGBFRMIM (Bit 0) */ -#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXGBFRMIM_Msk (0x1UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXGBFRMIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXGBOCTIM_Pos (1UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXGBOCTIM (Bit 1) */ -#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXGBOCTIM_Msk (0x2UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXGBOCTIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXGOCTIM_Pos (2UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXGOCTIM (Bit 2) */ -#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXGOCTIM_Msk (0x4UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXGOCTIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXBCGFIM_Pos (3UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXBCGFIM (Bit 3) */ -#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXBCGFIM_Msk (0x8UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXBCGFIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXMCGFIM_Pos (4UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXMCGFIM (Bit 4) */ -#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXMCGFIM_Msk (0x10UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXMCGFIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXCRCERFIM_Pos (5UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXCRCERFIM (Bit 5) */ -#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXCRCERFIM_Msk (0x20UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXCRCERFIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXALGNERFIM_Pos (6UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXALGNERFIM (Bit 6) */ -#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXALGNERFIM_Msk (0x40UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXALGNERFIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXRUNTFIM_Pos (7UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXRUNTFIM (Bit 7) */ -#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXRUNTFIM_Msk (0x80UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXRUNTFIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXJABERFIM_Pos (8UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXJABERFIM (Bit 8) */ -#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXJABERFIM_Msk (0x100UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXJABERFIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXUSIZEGFIM_Pos (9UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXUSIZEGFIM (Bit 9) */ -#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXUSIZEGFIM_Msk (0x200UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXUSIZEGFIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXOSIZEGFIM_Pos (10UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXOSIZEGFIM (Bit 10) */ -#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXOSIZEGFIM_Msk (0x400UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXOSIZEGFIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RX64OCTGBFIM_Pos (11UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RX64OCTGBFIM (Bit 11) */ -#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RX64OCTGBFIM_Msk (0x800UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RX64OCTGBFIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RX65T127OCTGBFIM_Pos (12UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RX65T127OCTGBFIM (Bit 12) */ -#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RX65T127OCTGBFIM_Msk (0x1000UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RX65T127OCTGBFIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RX128T255OCTGBFIM_Pos (13UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RX128T255OCTGBFIM (Bit 13) */ -#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RX128T255OCTGBFIM_Msk (0x2000UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RX128T255OCTGBFIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RX256T511OCTGBFIM_Pos (14UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RX256T511OCTGBFIM (Bit 14) */ -#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RX256T511OCTGBFIM_Msk (0x4000UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RX256T511OCTGBFIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RX512T1023OCTGBFIM_Pos (15UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RX512T1023OCTGBFIM (Bit 15) */ -#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RX512T1023OCTGBFIM_Msk (0x8000UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RX512T1023OCTGBFIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RX1024TMAXOCTGBFIM_Pos (16UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RX1024TMAXOCTGBFIM (Bit 16) */ -#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RX1024TMAXOCTGBFIM_Msk (0x10000UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RX1024TMAXOCTGBFIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXUCGFIM_Pos (17UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXUCGFIM (Bit 17) */ -#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXUCGFIM_Msk (0x20000UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXUCGFIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXLENERFIM_Pos (18UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXLENERFIM (Bit 18) */ -#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXLENERFIM_Msk (0x40000UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXLENERFIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXORANGEFIM_Pos (19UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXORANGEFIM (Bit 19) */ -#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXORANGEFIM_Msk (0x80000UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXORANGEFIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXPAUSFIM_Pos (20UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXPAUSFIM (Bit 20) */ -#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXPAUSFIM_Msk (0x100000UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXPAUSFIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXFOVFIM_Pos (21UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXFOVFIM (Bit 21) */ -#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXFOVFIM_Msk (0x200000UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXFOVFIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXVLANGBFIM_Pos (22UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXVLANGBFIM (Bit 22) */ -#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXVLANGBFIM_Msk (0x400000UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXVLANGBFIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXWDOGFIM_Pos (23UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXWDOGFIM (Bit 23) */ -#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXWDOGFIM_Msk (0x800000UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXWDOGFIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXRCVERRFIM_Pos (24UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXRCVERRFIM (Bit 24) */ -#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXRCVERRFIM_Msk (0x1000000UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXRCVERRFIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXCTRLFIM_Pos (25UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXCTRLFIM (Bit 25) */ -#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXCTRLFIM_Msk (0x2000000UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXCTRLFIM (Bitfield-Mask: 0x01) */ - -/* ----------------------- ETH_MMC_TRANSMIT_INTERRUPT_MASK ---------------------- */ -#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXGBOCTIM_Pos (0UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXGBOCTIM (Bit 0) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXGBOCTIM_Msk (0x1UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXGBOCTIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXGBFRMIM_Pos (1UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXGBFRMIM (Bit 1) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXGBFRMIM_Msk (0x2UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXGBFRMIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXBCGFIM_Pos (2UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXBCGFIM (Bit 2) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXBCGFIM_Msk (0x4UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXBCGFIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXMCGFIM_Pos (3UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXMCGFIM (Bit 3) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXMCGFIM_Msk (0x8UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXMCGFIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TX64OCTGBFIM_Pos (4UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TX64OCTGBFIM (Bit 4) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TX64OCTGBFIM_Msk (0x10UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TX64OCTGBFIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TX65T127OCTGBFIM_Pos (5UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TX65T127OCTGBFIM (Bit 5) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TX65T127OCTGBFIM_Msk (0x20UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TX65T127OCTGBFIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TX128T255OCTGBFIM_Pos (6UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TX128T255OCTGBFIM (Bit 6) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TX128T255OCTGBFIM_Msk (0x40UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TX128T255OCTGBFIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TX256T511OCTGBFIM_Pos (7UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TX256T511OCTGBFIM (Bit 7) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TX256T511OCTGBFIM_Msk (0x80UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TX256T511OCTGBFIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TX512T1023OCTGBFIM_Pos (8UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TX512T1023OCTGBFIM (Bit 8) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TX512T1023OCTGBFIM_Msk (0x100UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TX512T1023OCTGBFIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TX1024TMAXOCTGBFIM_Pos (9UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TX1024TMAXOCTGBFIM (Bit 9) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TX1024TMAXOCTGBFIM_Msk (0x200UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TX1024TMAXOCTGBFIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXUCGBFIM_Pos (10UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXUCGBFIM (Bit 10) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXUCGBFIM_Msk (0x400UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXUCGBFIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXMCGBFIM_Pos (11UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXMCGBFIM (Bit 11) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXMCGBFIM_Msk (0x800UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXMCGBFIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXBCGBFIM_Pos (12UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXBCGBFIM (Bit 12) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXBCGBFIM_Msk (0x1000UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXBCGBFIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXUFLOWERFIM_Pos (13UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXUFLOWERFIM (Bit 13) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXUFLOWERFIM_Msk (0x2000UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXUFLOWERFIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXSCOLGFIM_Pos (14UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXSCOLGFIM (Bit 14) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXSCOLGFIM_Msk (0x4000UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXSCOLGFIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXMCOLGFIM_Pos (15UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXMCOLGFIM (Bit 15) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXMCOLGFIM_Msk (0x8000UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXMCOLGFIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXDEFFIM_Pos (16UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXDEFFIM (Bit 16) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXDEFFIM_Msk (0x10000UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXDEFFIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXLATCOLFIM_Pos (17UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXLATCOLFIM (Bit 17) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXLATCOLFIM_Msk (0x20000UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXLATCOLFIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXEXCOLFIM_Pos (18UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXEXCOLFIM (Bit 18) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXEXCOLFIM_Msk (0x40000UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXEXCOLFIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXCARERFIM_Pos (19UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXCARERFIM (Bit 19) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXCARERFIM_Msk (0x80000UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXCARERFIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXGOCTIM_Pos (20UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXGOCTIM (Bit 20) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXGOCTIM_Msk (0x100000UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXGOCTIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXGFRMIM_Pos (21UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXGFRMIM (Bit 21) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXGFRMIM_Msk (0x200000UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXGFRMIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXEXDEFFIM_Pos (22UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXEXDEFFIM (Bit 22) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXEXDEFFIM_Msk (0x400000UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXEXDEFFIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXPAUSFIM_Pos (23UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXPAUSFIM (Bit 23) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXPAUSFIM_Msk (0x800000UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXPAUSFIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXVLANGFIM_Pos (24UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXVLANGFIM (Bit 24) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXVLANGFIM_Msk (0x1000000UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXVLANGFIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXOSIZEGFIM_Pos (25UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXOSIZEGFIM (Bit 25) */ -#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXOSIZEGFIM_Msk (0x2000000UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXOSIZEGFIM (Bitfield-Mask: 0x01) */ - -/* ------------------------- ETH_TX_OCTET_COUNT_GOOD_BAD ------------------------ */ -#define ETH_TX_OCTET_COUNT_GOOD_BAD_TXOCTGB_Pos (0UL) /*!< ETH TX_OCTET_COUNT_GOOD_BAD: TXOCTGB (Bit 0) */ -#define ETH_TX_OCTET_COUNT_GOOD_BAD_TXOCTGB_Msk (0xffffffffUL) /*!< ETH TX_OCTET_COUNT_GOOD_BAD: TXOCTGB (Bitfield-Mask: 0xffffffff) */ - -/* ------------------------- ETH_TX_FRAME_COUNT_GOOD_BAD ------------------------ */ -#define ETH_TX_FRAME_COUNT_GOOD_BAD_TXFRMGB_Pos (0UL) /*!< ETH TX_FRAME_COUNT_GOOD_BAD: TXFRMGB (Bit 0) */ -#define ETH_TX_FRAME_COUNT_GOOD_BAD_TXFRMGB_Msk (0xffffffffUL) /*!< ETH TX_FRAME_COUNT_GOOD_BAD: TXFRMGB (Bitfield-Mask: 0xffffffff) */ - -/* ------------------------ ETH_TX_BROADCAST_FRAMES_GOOD ------------------------ */ -#define ETH_TX_BROADCAST_FRAMES_GOOD_TXBCASTG_Pos (0UL) /*!< ETH TX_BROADCAST_FRAMES_GOOD: TXBCASTG (Bit 0) */ -#define ETH_TX_BROADCAST_FRAMES_GOOD_TXBCASTG_Msk (0xffffffffUL) /*!< ETH TX_BROADCAST_FRAMES_GOOD: TXBCASTG (Bitfield-Mask: 0xffffffff) */ - -/* ------------------------ ETH_TX_MULTICAST_FRAMES_GOOD ------------------------ */ -#define ETH_TX_MULTICAST_FRAMES_GOOD_TXMCASTG_Pos (0UL) /*!< ETH TX_MULTICAST_FRAMES_GOOD: TXMCASTG (Bit 0) */ -#define ETH_TX_MULTICAST_FRAMES_GOOD_TXMCASTG_Msk (0xffffffffUL) /*!< ETH TX_MULTICAST_FRAMES_GOOD: TXMCASTG (Bitfield-Mask: 0xffffffff) */ - -/* ----------------------- ETH_TX_64OCTETS_FRAMES_GOOD_BAD ---------------------- */ -#define ETH_TX_64OCTETS_FRAMES_GOOD_BAD_TX64OCTGB_Pos (0UL) /*!< ETH TX_64OCTETS_FRAMES_GOOD_BAD: TX64OCTGB (Bit 0) */ -#define ETH_TX_64OCTETS_FRAMES_GOOD_BAD_TX64OCTGB_Msk (0xffffffffUL) /*!< ETH TX_64OCTETS_FRAMES_GOOD_BAD: TX64OCTGB (Bitfield-Mask: 0xffffffff) */ - -/* -------------------- ETH_TX_65TO127OCTETS_FRAMES_GOOD_BAD -------------------- */ -#define ETH_TX_65TO127OCTETS_FRAMES_GOOD_BAD_TX65_127OCTGB_Pos (0UL) /*!< ETH TX_65TO127OCTETS_FRAMES_GOOD_BAD: TX65_127OCTGB (Bit 0) */ -#define ETH_TX_65TO127OCTETS_FRAMES_GOOD_BAD_TX65_127OCTGB_Msk (0xffffffffUL) /*!< ETH TX_65TO127OCTETS_FRAMES_GOOD_BAD: TX65_127OCTGB (Bitfield-Mask: 0xffffffff) */ - -/* -------------------- ETH_TX_128TO255OCTETS_FRAMES_GOOD_BAD ------------------- */ -#define ETH_TX_128TO255OCTETS_FRAMES_GOOD_BAD_TX128_255OCTGB_Pos (0UL) /*!< ETH TX_128TO255OCTETS_FRAMES_GOOD_BAD: TX128_255OCTGB (Bit 0) */ -#define ETH_TX_128TO255OCTETS_FRAMES_GOOD_BAD_TX128_255OCTGB_Msk (0xffffffffUL) /*!< ETH TX_128TO255OCTETS_FRAMES_GOOD_BAD: TX128_255OCTGB (Bitfield-Mask: 0xffffffff) */ - -/* -------------------- ETH_TX_256TO511OCTETS_FRAMES_GOOD_BAD ------------------- */ -#define ETH_TX_256TO511OCTETS_FRAMES_GOOD_BAD_TX256_511OCTGB_Pos (0UL) /*!< ETH TX_256TO511OCTETS_FRAMES_GOOD_BAD: TX256_511OCTGB (Bit 0) */ -#define ETH_TX_256TO511OCTETS_FRAMES_GOOD_BAD_TX256_511OCTGB_Msk (0xffffffffUL) /*!< ETH TX_256TO511OCTETS_FRAMES_GOOD_BAD: TX256_511OCTGB (Bitfield-Mask: 0xffffffff) */ - -/* ------------------- ETH_TX_512TO1023OCTETS_FRAMES_GOOD_BAD ------------------- */ -#define ETH_TX_512TO1023OCTETS_FRAMES_GOOD_BAD_TX512_1023OCTGB_Pos (0UL) /*!< ETH TX_512TO1023OCTETS_FRAMES_GOOD_BAD: TX512_1023OCTGB (Bit 0) */ -#define ETH_TX_512TO1023OCTETS_FRAMES_GOOD_BAD_TX512_1023OCTGB_Msk (0xffffffffUL) /*!< ETH TX_512TO1023OCTETS_FRAMES_GOOD_BAD: TX512_1023OCTGB (Bitfield-Mask: 0xffffffff) */ - -/* ------------------- ETH_TX_1024TOMAXOCTETS_FRAMES_GOOD_BAD ------------------- */ -#define ETH_TX_1024TOMAXOCTETS_FRAMES_GOOD_BAD_TX1024_MAXOCTGB_Pos (0UL) /*!< ETH TX_1024TOMAXOCTETS_FRAMES_GOOD_BAD: TX1024_MAXOCTGB (Bit 0) */ -#define ETH_TX_1024TOMAXOCTETS_FRAMES_GOOD_BAD_TX1024_MAXOCTGB_Msk (0xffffffffUL) /*!< ETH TX_1024TOMAXOCTETS_FRAMES_GOOD_BAD: TX1024_MAXOCTGB (Bitfield-Mask: 0xffffffff) */ - -/* ----------------------- ETH_TX_UNICAST_FRAMES_GOOD_BAD ----------------------- */ -#define ETH_TX_UNICAST_FRAMES_GOOD_BAD_TXUCASTGB_Pos (0UL) /*!< ETH TX_UNICAST_FRAMES_GOOD_BAD: TXUCASTGB (Bit 0) */ -#define ETH_TX_UNICAST_FRAMES_GOOD_BAD_TXUCASTGB_Msk (0xffffffffUL) /*!< ETH TX_UNICAST_FRAMES_GOOD_BAD: TXUCASTGB (Bitfield-Mask: 0xffffffff) */ - -/* ---------------------- ETH_TX_MULTICAST_FRAMES_GOOD_BAD ---------------------- */ -#define ETH_TX_MULTICAST_FRAMES_GOOD_BAD_TXMCASTGB_Pos (0UL) /*!< ETH TX_MULTICAST_FRAMES_GOOD_BAD: TXMCASTGB (Bit 0) */ -#define ETH_TX_MULTICAST_FRAMES_GOOD_BAD_TXMCASTGB_Msk (0xffffffffUL) /*!< ETH TX_MULTICAST_FRAMES_GOOD_BAD: TXMCASTGB (Bitfield-Mask: 0xffffffff) */ - -/* ---------------------- ETH_TX_BROADCAST_FRAMES_GOOD_BAD ---------------------- */ -#define ETH_TX_BROADCAST_FRAMES_GOOD_BAD_TXBCASTGB_Pos (0UL) /*!< ETH TX_BROADCAST_FRAMES_GOOD_BAD: TXBCASTGB (Bit 0) */ -#define ETH_TX_BROADCAST_FRAMES_GOOD_BAD_TXBCASTGB_Msk (0xffffffffUL) /*!< ETH TX_BROADCAST_FRAMES_GOOD_BAD: TXBCASTGB (Bitfield-Mask: 0xffffffff) */ - -/* ------------------------ ETH_TX_UNDERFLOW_ERROR_FRAMES ----------------------- */ -#define ETH_TX_UNDERFLOW_ERROR_FRAMES_TXUNDRFLW_Pos (0UL) /*!< ETH TX_UNDERFLOW_ERROR_FRAMES: TXUNDRFLW (Bit 0) */ -#define ETH_TX_UNDERFLOW_ERROR_FRAMES_TXUNDRFLW_Msk (0xffffffffUL) /*!< ETH TX_UNDERFLOW_ERROR_FRAMES: TXUNDRFLW (Bitfield-Mask: 0xffffffff) */ - -/* --------------------- ETH_TX_SINGLE_COLLISION_GOOD_FRAMES -------------------- */ -#define ETH_TX_SINGLE_COLLISION_GOOD_FRAMES_TXSNGLCOLG_Pos (0UL) /*!< ETH TX_SINGLE_COLLISION_GOOD_FRAMES: TXSNGLCOLG (Bit 0) */ -#define ETH_TX_SINGLE_COLLISION_GOOD_FRAMES_TXSNGLCOLG_Msk (0xffffffffUL) /*!< ETH TX_SINGLE_COLLISION_GOOD_FRAMES: TXSNGLCOLG (Bitfield-Mask: 0xffffffff) */ - -/* -------------------- ETH_TX_MULTIPLE_COLLISION_GOOD_FRAMES ------------------- */ -#define ETH_TX_MULTIPLE_COLLISION_GOOD_FRAMES_TXMULTCOLG_Pos (0UL) /*!< ETH TX_MULTIPLE_COLLISION_GOOD_FRAMES: TXMULTCOLG (Bit 0) */ -#define ETH_TX_MULTIPLE_COLLISION_GOOD_FRAMES_TXMULTCOLG_Msk (0xffffffffUL) /*!< ETH TX_MULTIPLE_COLLISION_GOOD_FRAMES: TXMULTCOLG (Bitfield-Mask: 0xffffffff) */ - -/* --------------------------- ETH_TX_DEFERRED_FRAMES --------------------------- */ -#define ETH_TX_DEFERRED_FRAMES_TXDEFRD_Pos (0UL) /*!< ETH TX_DEFERRED_FRAMES: TXDEFRD (Bit 0) */ -#define ETH_TX_DEFERRED_FRAMES_TXDEFRD_Msk (0xffffffffUL) /*!< ETH TX_DEFERRED_FRAMES: TXDEFRD (Bitfield-Mask: 0xffffffff) */ - -/* ------------------------ ETH_TX_LATE_COLLISION_FRAMES ------------------------ */ -#define ETH_TX_LATE_COLLISION_FRAMES_TXLATECOL_Pos (0UL) /*!< ETH TX_LATE_COLLISION_FRAMES: TXLATECOL (Bit 0) */ -#define ETH_TX_LATE_COLLISION_FRAMES_TXLATECOL_Msk (0xffffffffUL) /*!< ETH TX_LATE_COLLISION_FRAMES: TXLATECOL (Bitfield-Mask: 0xffffffff) */ - -/* ---------------------- ETH_TX_EXCESSIVE_COLLISION_FRAMES --------------------- */ -#define ETH_TX_EXCESSIVE_COLLISION_FRAMES_TXEXSCOL_Pos (0UL) /*!< ETH TX_EXCESSIVE_COLLISION_FRAMES: TXEXSCOL (Bit 0) */ -#define ETH_TX_EXCESSIVE_COLLISION_FRAMES_TXEXSCOL_Msk (0xffffffffUL) /*!< ETH TX_EXCESSIVE_COLLISION_FRAMES: TXEXSCOL (Bitfield-Mask: 0xffffffff) */ - -/* ------------------------- ETH_TX_CARRIER_ERROR_FRAMES ------------------------ */ -#define ETH_TX_CARRIER_ERROR_FRAMES_TXCARR_Pos (0UL) /*!< ETH TX_CARRIER_ERROR_FRAMES: TXCARR (Bit 0) */ -#define ETH_TX_CARRIER_ERROR_FRAMES_TXCARR_Msk (0xffffffffUL) /*!< ETH TX_CARRIER_ERROR_FRAMES: TXCARR (Bitfield-Mask: 0xffffffff) */ - -/* --------------------------- ETH_TX_OCTET_COUNT_GOOD -------------------------- */ -#define ETH_TX_OCTET_COUNT_GOOD_TXOCTG_Pos (0UL) /*!< ETH TX_OCTET_COUNT_GOOD: TXOCTG (Bit 0) */ -#define ETH_TX_OCTET_COUNT_GOOD_TXOCTG_Msk (0xffffffffUL) /*!< ETH TX_OCTET_COUNT_GOOD: TXOCTG (Bitfield-Mask: 0xffffffff) */ - -/* --------------------------- ETH_TX_FRAME_COUNT_GOOD -------------------------- */ -#define ETH_TX_FRAME_COUNT_GOOD_TXFRMG_Pos (0UL) /*!< ETH TX_FRAME_COUNT_GOOD: TXFRMG (Bit 0) */ -#define ETH_TX_FRAME_COUNT_GOOD_TXFRMG_Msk (0xffffffffUL) /*!< ETH TX_FRAME_COUNT_GOOD: TXFRMG (Bitfield-Mask: 0xffffffff) */ - -/* ----------------------- ETH_TX_EXCESSIVE_DEFERRAL_ERROR ---------------------- */ -#define ETH_TX_EXCESSIVE_DEFERRAL_ERROR_TXEXSDEF_Pos (0UL) /*!< ETH TX_EXCESSIVE_DEFERRAL_ERROR: TXEXSDEF (Bit 0) */ -#define ETH_TX_EXCESSIVE_DEFERRAL_ERROR_TXEXSDEF_Msk (0xffffffffUL) /*!< ETH TX_EXCESSIVE_DEFERRAL_ERROR: TXEXSDEF (Bitfield-Mask: 0xffffffff) */ - -/* ----------------------------- ETH_TX_PAUSE_FRAMES ---------------------------- */ -#define ETH_TX_PAUSE_FRAMES_TXPAUSE_Pos (0UL) /*!< ETH TX_PAUSE_FRAMES: TXPAUSE (Bit 0) */ -#define ETH_TX_PAUSE_FRAMES_TXPAUSE_Msk (0xffffffffUL) /*!< ETH TX_PAUSE_FRAMES: TXPAUSE (Bitfield-Mask: 0xffffffff) */ - -/* --------------------------- ETH_TX_VLAN_FRAMES_GOOD -------------------------- */ -#define ETH_TX_VLAN_FRAMES_GOOD_TXVLANG_Pos (0UL) /*!< ETH TX_VLAN_FRAMES_GOOD: TXVLANG (Bit 0) */ -#define ETH_TX_VLAN_FRAMES_GOOD_TXVLANG_Msk (0xffffffffUL) /*!< ETH TX_VLAN_FRAMES_GOOD: TXVLANG (Bitfield-Mask: 0xffffffff) */ - -/* -------------------------- ETH_TX_OSIZE_FRAMES_GOOD -------------------------- */ -#define ETH_TX_OSIZE_FRAMES_GOOD_TXOSIZG_Pos (0UL) /*!< ETH TX_OSIZE_FRAMES_GOOD: TXOSIZG (Bit 0) */ -#define ETH_TX_OSIZE_FRAMES_GOOD_TXOSIZG_Msk (0xffffffffUL) /*!< ETH TX_OSIZE_FRAMES_GOOD: TXOSIZG (Bitfield-Mask: 0xffffffff) */ - -/* ------------------------ ETH_RX_FRAMES_COUNT_GOOD_BAD ------------------------ */ -#define ETH_RX_FRAMES_COUNT_GOOD_BAD_RXFRMGB_Pos (0UL) /*!< ETH RX_FRAMES_COUNT_GOOD_BAD: RXFRMGB (Bit 0) */ -#define ETH_RX_FRAMES_COUNT_GOOD_BAD_RXFRMGB_Msk (0xffffffffUL) /*!< ETH RX_FRAMES_COUNT_GOOD_BAD: RXFRMGB (Bitfield-Mask: 0xffffffff) */ - -/* ------------------------- ETH_RX_OCTET_COUNT_GOOD_BAD ------------------------ */ -#define ETH_RX_OCTET_COUNT_GOOD_BAD_RXOCTGB_Pos (0UL) /*!< ETH RX_OCTET_COUNT_GOOD_BAD: RXOCTGB (Bit 0) */ -#define ETH_RX_OCTET_COUNT_GOOD_BAD_RXOCTGB_Msk (0xffffffffUL) /*!< ETH RX_OCTET_COUNT_GOOD_BAD: RXOCTGB (Bitfield-Mask: 0xffffffff) */ - -/* --------------------------- ETH_RX_OCTET_COUNT_GOOD -------------------------- */ -#define ETH_RX_OCTET_COUNT_GOOD_RXOCTG_Pos (0UL) /*!< ETH RX_OCTET_COUNT_GOOD: RXOCTG (Bit 0) */ -#define ETH_RX_OCTET_COUNT_GOOD_RXOCTG_Msk (0xffffffffUL) /*!< ETH RX_OCTET_COUNT_GOOD: RXOCTG (Bitfield-Mask: 0xffffffff) */ - -/* ------------------------ ETH_RX_BROADCAST_FRAMES_GOOD ------------------------ */ -#define ETH_RX_BROADCAST_FRAMES_GOOD_RXBCASTG_Pos (0UL) /*!< ETH RX_BROADCAST_FRAMES_GOOD: RXBCASTG (Bit 0) */ -#define ETH_RX_BROADCAST_FRAMES_GOOD_RXBCASTG_Msk (0xffffffffUL) /*!< ETH RX_BROADCAST_FRAMES_GOOD: RXBCASTG (Bitfield-Mask: 0xffffffff) */ - -/* ------------------------ ETH_RX_MULTICAST_FRAMES_GOOD ------------------------ */ -#define ETH_RX_MULTICAST_FRAMES_GOOD_RXMCASTG_Pos (0UL) /*!< ETH RX_MULTICAST_FRAMES_GOOD: RXMCASTG (Bit 0) */ -#define ETH_RX_MULTICAST_FRAMES_GOOD_RXMCASTG_Msk (0xffffffffUL) /*!< ETH RX_MULTICAST_FRAMES_GOOD: RXMCASTG (Bitfield-Mask: 0xffffffff) */ - -/* --------------------------- ETH_RX_CRC_ERROR_FRAMES -------------------------- */ -#define ETH_RX_CRC_ERROR_FRAMES_RXCRCERR_Pos (0UL) /*!< ETH RX_CRC_ERROR_FRAMES: RXCRCERR (Bit 0) */ -#define ETH_RX_CRC_ERROR_FRAMES_RXCRCERR_Msk (0xffffffffUL) /*!< ETH RX_CRC_ERROR_FRAMES: RXCRCERR (Bitfield-Mask: 0xffffffff) */ - -/* ------------------------ ETH_RX_ALIGNMENT_ERROR_FRAMES ----------------------- */ -#define ETH_RX_ALIGNMENT_ERROR_FRAMES_RXALGNERR_Pos (0UL) /*!< ETH RX_ALIGNMENT_ERROR_FRAMES: RXALGNERR (Bit 0) */ -#define ETH_RX_ALIGNMENT_ERROR_FRAMES_RXALGNERR_Msk (0xffffffffUL) /*!< ETH RX_ALIGNMENT_ERROR_FRAMES: RXALGNERR (Bitfield-Mask: 0xffffffff) */ - -/* -------------------------- ETH_RX_RUNT_ERROR_FRAMES -------------------------- */ -#define ETH_RX_RUNT_ERROR_FRAMES_RXRUNTERR_Pos (0UL) /*!< ETH RX_RUNT_ERROR_FRAMES: RXRUNTERR (Bit 0) */ -#define ETH_RX_RUNT_ERROR_FRAMES_RXRUNTERR_Msk (0xffffffffUL) /*!< ETH RX_RUNT_ERROR_FRAMES: RXRUNTERR (Bitfield-Mask: 0xffffffff) */ - -/* ------------------------- ETH_RX_JABBER_ERROR_FRAMES ------------------------- */ -#define ETH_RX_JABBER_ERROR_FRAMES_RXJABERR_Pos (0UL) /*!< ETH RX_JABBER_ERROR_FRAMES: RXJABERR (Bit 0) */ -#define ETH_RX_JABBER_ERROR_FRAMES_RXJABERR_Msk (0xffffffffUL) /*!< ETH RX_JABBER_ERROR_FRAMES: RXJABERR (Bitfield-Mask: 0xffffffff) */ - -/* ------------------------ ETH_RX_UNDERSIZE_FRAMES_GOOD ------------------------ */ -#define ETH_RX_UNDERSIZE_FRAMES_GOOD_RXUNDERSZG_Pos (0UL) /*!< ETH RX_UNDERSIZE_FRAMES_GOOD: RXUNDERSZG (Bit 0) */ -#define ETH_RX_UNDERSIZE_FRAMES_GOOD_RXUNDERSZG_Msk (0xffffffffUL) /*!< ETH RX_UNDERSIZE_FRAMES_GOOD: RXUNDERSZG (Bitfield-Mask: 0xffffffff) */ - -/* ------------------------- ETH_RX_OVERSIZE_FRAMES_GOOD ------------------------ */ -#define ETH_RX_OVERSIZE_FRAMES_GOOD_RXOVERSZG_Pos (0UL) /*!< ETH RX_OVERSIZE_FRAMES_GOOD: RXOVERSZG (Bit 0) */ -#define ETH_RX_OVERSIZE_FRAMES_GOOD_RXOVERSZG_Msk (0xffffffffUL) /*!< ETH RX_OVERSIZE_FRAMES_GOOD: RXOVERSZG (Bitfield-Mask: 0xffffffff) */ - -/* ----------------------- ETH_RX_64OCTETS_FRAMES_GOOD_BAD ---------------------- */ -#define ETH_RX_64OCTETS_FRAMES_GOOD_BAD_RX64OCTGB_Pos (0UL) /*!< ETH RX_64OCTETS_FRAMES_GOOD_BAD: RX64OCTGB (Bit 0) */ -#define ETH_RX_64OCTETS_FRAMES_GOOD_BAD_RX64OCTGB_Msk (0xffffffffUL) /*!< ETH RX_64OCTETS_FRAMES_GOOD_BAD: RX64OCTGB (Bitfield-Mask: 0xffffffff) */ - -/* -------------------- ETH_RX_65TO127OCTETS_FRAMES_GOOD_BAD -------------------- */ -#define ETH_RX_65TO127OCTETS_FRAMES_GOOD_BAD_RX65_127OCTGB_Pos (0UL) /*!< ETH RX_65TO127OCTETS_FRAMES_GOOD_BAD: RX65_127OCTGB (Bit 0) */ -#define ETH_RX_65TO127OCTETS_FRAMES_GOOD_BAD_RX65_127OCTGB_Msk (0xffffffffUL) /*!< ETH RX_65TO127OCTETS_FRAMES_GOOD_BAD: RX65_127OCTGB (Bitfield-Mask: 0xffffffff) */ - -/* -------------------- ETH_RX_128TO255OCTETS_FRAMES_GOOD_BAD ------------------- */ -#define ETH_RX_128TO255OCTETS_FRAMES_GOOD_BAD_RX128_255OCTGB_Pos (0UL) /*!< ETH RX_128TO255OCTETS_FRAMES_GOOD_BAD: RX128_255OCTGB (Bit 0) */ -#define ETH_RX_128TO255OCTETS_FRAMES_GOOD_BAD_RX128_255OCTGB_Msk (0xffffffffUL) /*!< ETH RX_128TO255OCTETS_FRAMES_GOOD_BAD: RX128_255OCTGB (Bitfield-Mask: 0xffffffff) */ - -/* -------------------- ETH_RX_256TO511OCTETS_FRAMES_GOOD_BAD ------------------- */ -#define ETH_RX_256TO511OCTETS_FRAMES_GOOD_BAD_RX256_511OCTGB_Pos (0UL) /*!< ETH RX_256TO511OCTETS_FRAMES_GOOD_BAD: RX256_511OCTGB (Bit 0) */ -#define ETH_RX_256TO511OCTETS_FRAMES_GOOD_BAD_RX256_511OCTGB_Msk (0xffffffffUL) /*!< ETH RX_256TO511OCTETS_FRAMES_GOOD_BAD: RX256_511OCTGB (Bitfield-Mask: 0xffffffff) */ - -/* ------------------- ETH_RX_512TO1023OCTETS_FRAMES_GOOD_BAD ------------------- */ -#define ETH_RX_512TO1023OCTETS_FRAMES_GOOD_BAD_RX512_1023OCTGB_Pos (0UL) /*!< ETH RX_512TO1023OCTETS_FRAMES_GOOD_BAD: RX512_1023OCTGB (Bit 0) */ -#define ETH_RX_512TO1023OCTETS_FRAMES_GOOD_BAD_RX512_1023OCTGB_Msk (0xffffffffUL) /*!< ETH RX_512TO1023OCTETS_FRAMES_GOOD_BAD: RX512_1023OCTGB (Bitfield-Mask: 0xffffffff) */ - -/* ------------------- ETH_RX_1024TOMAXOCTETS_FRAMES_GOOD_BAD ------------------- */ -#define ETH_RX_1024TOMAXOCTETS_FRAMES_GOOD_BAD_RX1024_MAXOCTGB_Pos (0UL) /*!< ETH RX_1024TOMAXOCTETS_FRAMES_GOOD_BAD: RX1024_MAXOCTGB (Bit 0) */ -#define ETH_RX_1024TOMAXOCTETS_FRAMES_GOOD_BAD_RX1024_MAXOCTGB_Msk (0xffffffffUL) /*!< ETH RX_1024TOMAXOCTETS_FRAMES_GOOD_BAD: RX1024_MAXOCTGB (Bitfield-Mask: 0xffffffff) */ - -/* ------------------------- ETH_RX_UNICAST_FRAMES_GOOD ------------------------- */ -#define ETH_RX_UNICAST_FRAMES_GOOD_RXUCASTG_Pos (0UL) /*!< ETH RX_UNICAST_FRAMES_GOOD: RXUCASTG (Bit 0) */ -#define ETH_RX_UNICAST_FRAMES_GOOD_RXUCASTG_Msk (0xffffffffUL) /*!< ETH RX_UNICAST_FRAMES_GOOD: RXUCASTG (Bitfield-Mask: 0xffffffff) */ - -/* ------------------------- ETH_RX_LENGTH_ERROR_FRAMES ------------------------- */ -#define ETH_RX_LENGTH_ERROR_FRAMES_RXLENERR_Pos (0UL) /*!< ETH RX_LENGTH_ERROR_FRAMES: RXLENERR (Bit 0) */ -#define ETH_RX_LENGTH_ERROR_FRAMES_RXLENERR_Msk (0xffffffffUL) /*!< ETH RX_LENGTH_ERROR_FRAMES: RXLENERR (Bitfield-Mask: 0xffffffff) */ - -/* ----------------------- ETH_RX_OUT_OF_RANGE_TYPE_FRAMES ---------------------- */ -#define ETH_RX_OUT_OF_RANGE_TYPE_FRAMES_RXOUTOFRNG_Pos (0UL) /*!< ETH RX_OUT_OF_RANGE_TYPE_FRAMES: RXOUTOFRNG (Bit 0) */ -#define ETH_RX_OUT_OF_RANGE_TYPE_FRAMES_RXOUTOFRNG_Msk (0xffffffffUL) /*!< ETH RX_OUT_OF_RANGE_TYPE_FRAMES: RXOUTOFRNG (Bitfield-Mask: 0xffffffff) */ - -/* ----------------------------- ETH_RX_PAUSE_FRAMES ---------------------------- */ -#define ETH_RX_PAUSE_FRAMES_RXPAUSEFRM_Pos (0UL) /*!< ETH RX_PAUSE_FRAMES: RXPAUSEFRM (Bit 0) */ -#define ETH_RX_PAUSE_FRAMES_RXPAUSEFRM_Msk (0xffffffffUL) /*!< ETH RX_PAUSE_FRAMES: RXPAUSEFRM (Bitfield-Mask: 0xffffffff) */ - -/* ------------------------- ETH_RX_FIFO_OVERFLOW_FRAMES ------------------------ */ -#define ETH_RX_FIFO_OVERFLOW_FRAMES_RXFIFOOVFL_Pos (0UL) /*!< ETH RX_FIFO_OVERFLOW_FRAMES: RXFIFOOVFL (Bit 0) */ -#define ETH_RX_FIFO_OVERFLOW_FRAMES_RXFIFOOVFL_Msk (0xffffffffUL) /*!< ETH RX_FIFO_OVERFLOW_FRAMES: RXFIFOOVFL (Bitfield-Mask: 0xffffffff) */ - -/* ------------------------- ETH_RX_VLAN_FRAMES_GOOD_BAD ------------------------ */ -#define ETH_RX_VLAN_FRAMES_GOOD_BAD_RXVLANFRGB_Pos (0UL) /*!< ETH RX_VLAN_FRAMES_GOOD_BAD: RXVLANFRGB (Bit 0) */ -#define ETH_RX_VLAN_FRAMES_GOOD_BAD_RXVLANFRGB_Msk (0xffffffffUL) /*!< ETH RX_VLAN_FRAMES_GOOD_BAD: RXVLANFRGB (Bitfield-Mask: 0xffffffff) */ - -/* ------------------------ ETH_RX_WATCHDOG_ERROR_FRAMES ------------------------ */ -#define ETH_RX_WATCHDOG_ERROR_FRAMES_RXWDGERR_Pos (0UL) /*!< ETH RX_WATCHDOG_ERROR_FRAMES: RXWDGERR (Bit 0) */ -#define ETH_RX_WATCHDOG_ERROR_FRAMES_RXWDGERR_Msk (0xffffffffUL) /*!< ETH RX_WATCHDOG_ERROR_FRAMES: RXWDGERR (Bitfield-Mask: 0xffffffff) */ - -/* ------------------------- ETH_RX_RECEIVE_ERROR_FRAMES ------------------------ */ -#define ETH_RX_RECEIVE_ERROR_FRAMES_RXRCVERR_Pos (0UL) /*!< ETH RX_RECEIVE_ERROR_FRAMES: RXRCVERR (Bit 0) */ -#define ETH_RX_RECEIVE_ERROR_FRAMES_RXRCVERR_Msk (0xffffffffUL) /*!< ETH RX_RECEIVE_ERROR_FRAMES: RXRCVERR (Bitfield-Mask: 0xffffffff) */ - -/* ------------------------- ETH_RX_CONTROL_FRAMES_GOOD ------------------------- */ -#define ETH_RX_CONTROL_FRAMES_GOOD_RXCTRLG_Pos (0UL) /*!< ETH RX_CONTROL_FRAMES_GOOD: RXCTRLG (Bit 0) */ -#define ETH_RX_CONTROL_FRAMES_GOOD_RXCTRLG_Msk (0xffffffffUL) /*!< ETH RX_CONTROL_FRAMES_GOOD: RXCTRLG (Bitfield-Mask: 0xffffffff) */ - -/* --------------------- ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK --------------------- */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXIPV4GFIM_Pos (0UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXIPV4GFIM (Bit 0) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXIPV4GFIM_Msk (0x1UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXIPV4GFIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXIPV4HERFIM_Pos (1UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXIPV4HERFIM (Bit 1) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXIPV4HERFIM_Msk (0x2UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXIPV4HERFIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXIPV4NOPAYFIM_Pos (2UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXIPV4NOPAYFIM (Bit 2) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXIPV4NOPAYFIM_Msk (0x4UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXIPV4NOPAYFIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXIPV4FRAGFIM_Pos (3UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXIPV4FRAGFIM (Bit 3) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXIPV4FRAGFIM_Msk (0x8UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXIPV4FRAGFIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXIPV4UDSBLFIM_Pos (4UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXIPV4UDSBLFIM (Bit 4) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXIPV4UDSBLFIM_Msk (0x10UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXIPV4UDSBLFIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXIPV6GFIM_Pos (5UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXIPV6GFIM (Bit 5) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXIPV6GFIM_Msk (0x20UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXIPV6GFIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXIPV6HERFIM_Pos (6UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXIPV6HERFIM (Bit 6) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXIPV6HERFIM_Msk (0x40UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXIPV6HERFIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXIPV6NOPAYFIM_Pos (7UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXIPV6NOPAYFIM (Bit 7) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXIPV6NOPAYFIM_Msk (0x80UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXIPV6NOPAYFIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXUDPGFIM_Pos (8UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXUDPGFIM (Bit 8) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXUDPGFIM_Msk (0x100UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXUDPGFIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXUDPERFIM_Pos (9UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXUDPERFIM (Bit 9) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXUDPERFIM_Msk (0x200UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXUDPERFIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXTCPGFIM_Pos (10UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXTCPGFIM (Bit 10) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXTCPGFIM_Msk (0x400UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXTCPGFIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXTCPERFIM_Pos (11UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXTCPERFIM (Bit 11) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXTCPERFIM_Msk (0x800UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXTCPERFIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXICMPGFIM_Pos (12UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXICMPGFIM (Bit 12) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXICMPGFIM_Msk (0x1000UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXICMPGFIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXICMPERFIM_Pos (13UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXICMPERFIM (Bit 13) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXICMPERFIM_Msk (0x2000UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXICMPERFIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXIPV4GOIM_Pos (16UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXIPV4GOIM (Bit 16) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXIPV4GOIM_Msk (0x10000UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXIPV4GOIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXIPV4HEROIM_Pos (17UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXIPV4HEROIM (Bit 17) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXIPV4HEROIM_Msk (0x20000UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXIPV4HEROIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXIPV4NOPAYOIM_Pos (18UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXIPV4NOPAYOIM (Bit 18) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXIPV4NOPAYOIM_Msk (0x40000UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXIPV4NOPAYOIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXIPV4FRAGOIM_Pos (19UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXIPV4FRAGOIM (Bit 19) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXIPV4FRAGOIM_Msk (0x80000UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXIPV4FRAGOIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXIPV4UDSBLOIM_Pos (20UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXIPV4UDSBLOIM (Bit 20) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXIPV4UDSBLOIM_Msk (0x100000UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXIPV4UDSBLOIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXIPV6GOIM_Pos (21UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXIPV6GOIM (Bit 21) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXIPV6GOIM_Msk (0x200000UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXIPV6GOIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXIPV6HEROIM_Pos (22UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXIPV6HEROIM (Bit 22) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXIPV6HEROIM_Msk (0x400000UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXIPV6HEROIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXIPV6NOPAYOIM_Pos (23UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXIPV6NOPAYOIM (Bit 23) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXIPV6NOPAYOIM_Msk (0x800000UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXIPV6NOPAYOIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXUDPGOIM_Pos (24UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXUDPGOIM (Bit 24) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXUDPGOIM_Msk (0x1000000UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXUDPGOIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXUDPEROIM_Pos (25UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXUDPEROIM (Bit 25) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXUDPEROIM_Msk (0x2000000UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXUDPEROIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXTCPGOIM_Pos (26UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXTCPGOIM (Bit 26) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXTCPGOIM_Msk (0x4000000UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXTCPGOIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXTCPEROIM_Pos (27UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXTCPEROIM (Bit 27) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXTCPEROIM_Msk (0x8000000UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXTCPEROIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXICMPGOIM_Pos (28UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXICMPGOIM (Bit 28) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXICMPGOIM_Msk (0x10000000UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXICMPGOIM (Bitfield-Mask: 0x01) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXICMPEROIM_Pos (29UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXICMPEROIM (Bit 29) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXICMPEROIM_Msk (0x20000000UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXICMPEROIM (Bitfield-Mask: 0x01) */ - -/* ------------------------ ETH_MMC_IPC_RECEIVE_INTERRUPT ----------------------- */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXIPV4GFIS_Pos (0UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXIPV4GFIS (Bit 0) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXIPV4GFIS_Msk (0x1UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXIPV4GFIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXIPV4HERFIS_Pos (1UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXIPV4HERFIS (Bit 1) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXIPV4HERFIS_Msk (0x2UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXIPV4HERFIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXIPV4NOPAYFIS_Pos (2UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXIPV4NOPAYFIS (Bit 2) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXIPV4NOPAYFIS_Msk (0x4UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXIPV4NOPAYFIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXIPV4FRAGFIS_Pos (3UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXIPV4FRAGFIS (Bit 3) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXIPV4FRAGFIS_Msk (0x8UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXIPV4FRAGFIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXIPV4UDSBLFIS_Pos (4UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXIPV4UDSBLFIS (Bit 4) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXIPV4UDSBLFIS_Msk (0x10UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXIPV4UDSBLFIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXIPV6GFIS_Pos (5UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXIPV6GFIS (Bit 5) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXIPV6GFIS_Msk (0x20UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXIPV6GFIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXIPV6HERFIS_Pos (6UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXIPV6HERFIS (Bit 6) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXIPV6HERFIS_Msk (0x40UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXIPV6HERFIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXIPV6NOPAYFIS_Pos (7UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXIPV6NOPAYFIS (Bit 7) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXIPV6NOPAYFIS_Msk (0x80UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXIPV6NOPAYFIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXUDPGFIS_Pos (8UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXUDPGFIS (Bit 8) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXUDPGFIS_Msk (0x100UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXUDPGFIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXUDPERFIS_Pos (9UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXUDPERFIS (Bit 9) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXUDPERFIS_Msk (0x200UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXUDPERFIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXTCPGFIS_Pos (10UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXTCPGFIS (Bit 10) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXTCPGFIS_Msk (0x400UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXTCPGFIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXTCPERFIS_Pos (11UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXTCPERFIS (Bit 11) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXTCPERFIS_Msk (0x800UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXTCPERFIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXICMPGFIS_Pos (12UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXICMPGFIS (Bit 12) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXICMPGFIS_Msk (0x1000UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXICMPGFIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXICMPERFIS_Pos (13UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXICMPERFIS (Bit 13) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXICMPERFIS_Msk (0x2000UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXICMPERFIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXIPV4GOIS_Pos (16UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXIPV4GOIS (Bit 16) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXIPV4GOIS_Msk (0x10000UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXIPV4GOIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXIPV4HEROIS_Pos (17UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXIPV4HEROIS (Bit 17) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXIPV4HEROIS_Msk (0x20000UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXIPV4HEROIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXIPV4NOPAYOIS_Pos (18UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXIPV4NOPAYOIS (Bit 18) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXIPV4NOPAYOIS_Msk (0x40000UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXIPV4NOPAYOIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXIPV4FRAGOIS_Pos (19UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXIPV4FRAGOIS (Bit 19) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXIPV4FRAGOIS_Msk (0x80000UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXIPV4FRAGOIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXIPV4UDSBLOIS_Pos (20UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXIPV4UDSBLOIS (Bit 20) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXIPV4UDSBLOIS_Msk (0x100000UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXIPV4UDSBLOIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXIPV6GOIS_Pos (21UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXIPV6GOIS (Bit 21) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXIPV6GOIS_Msk (0x200000UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXIPV6GOIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXIPV6HEROIS_Pos (22UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXIPV6HEROIS (Bit 22) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXIPV6HEROIS_Msk (0x400000UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXIPV6HEROIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXIPV6NOPAYOIS_Pos (23UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXIPV6NOPAYOIS (Bit 23) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXIPV6NOPAYOIS_Msk (0x800000UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXIPV6NOPAYOIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXUDPGOIS_Pos (24UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXUDPGOIS (Bit 24) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXUDPGOIS_Msk (0x1000000UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXUDPGOIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXUDPEROIS_Pos (25UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXUDPEROIS (Bit 25) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXUDPEROIS_Msk (0x2000000UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXUDPEROIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXTCPGOIS_Pos (26UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXTCPGOIS (Bit 26) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXTCPGOIS_Msk (0x4000000UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXTCPGOIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXTCPEROIS_Pos (27UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXTCPEROIS (Bit 27) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXTCPEROIS_Msk (0x8000000UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXTCPEROIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXICMPGOIS_Pos (28UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXICMPGOIS (Bit 28) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXICMPGOIS_Msk (0x10000000UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXICMPGOIS (Bitfield-Mask: 0x01) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXICMPEROIS_Pos (29UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXICMPEROIS (Bit 29) */ -#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXICMPEROIS_Msk (0x20000000UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXICMPEROIS (Bitfield-Mask: 0x01) */ - -/* --------------------------- ETH_RXIPV4_GOOD_FRAMES --------------------------- */ -#define ETH_RXIPV4_GOOD_FRAMES_RXIPV4GDFRM_Pos (0UL) /*!< ETH RXIPV4_GOOD_FRAMES: RXIPV4GDFRM (Bit 0) */ -#define ETH_RXIPV4_GOOD_FRAMES_RXIPV4GDFRM_Msk (0xffffffffUL) /*!< ETH RXIPV4_GOOD_FRAMES: RXIPV4GDFRM (Bitfield-Mask: 0xffffffff) */ - -/* ----------------------- ETH_RXIPV4_HEADER_ERROR_FRAMES ----------------------- */ -#define ETH_RXIPV4_HEADER_ERROR_FRAMES_RXIPV4HDRERRFRM_Pos (0UL) /*!< ETH RXIPV4_HEADER_ERROR_FRAMES: RXIPV4HDRERRFRM (Bit 0) */ -#define ETH_RXIPV4_HEADER_ERROR_FRAMES_RXIPV4HDRERRFRM_Msk (0xffffffffUL) /*!< ETH RXIPV4_HEADER_ERROR_FRAMES: RXIPV4HDRERRFRM (Bitfield-Mask: 0xffffffff) */ - -/* ------------------------ ETH_RXIPV4_NO_PAYLOAD_FRAMES ------------------------ */ -#define ETH_RXIPV4_NO_PAYLOAD_FRAMES_RXIPV4NOPAYFRM_Pos (0UL) /*!< ETH RXIPV4_NO_PAYLOAD_FRAMES: RXIPV4NOPAYFRM (Bit 0) */ -#define ETH_RXIPV4_NO_PAYLOAD_FRAMES_RXIPV4NOPAYFRM_Msk (0xffffffffUL) /*!< ETH RXIPV4_NO_PAYLOAD_FRAMES: RXIPV4NOPAYFRM (Bitfield-Mask: 0xffffffff) */ - -/* ------------------------ ETH_RXIPV4_FRAGMENTED_FRAMES ------------------------ */ -#define ETH_RXIPV4_FRAGMENTED_FRAMES_RXIPV4FRAGFRM_Pos (0UL) /*!< ETH RXIPV4_FRAGMENTED_FRAMES: RXIPV4FRAGFRM (Bit 0) */ -#define ETH_RXIPV4_FRAGMENTED_FRAMES_RXIPV4FRAGFRM_Msk (0xffffffffUL) /*!< ETH RXIPV4_FRAGMENTED_FRAMES: RXIPV4FRAGFRM (Bitfield-Mask: 0xffffffff) */ - -/* ------------------- ETH_RXIPV4_UDP_CHECKSUM_DISABLED_FRAMES ------------------ */ -#define ETH_RXIPV4_UDP_CHECKSUM_DISABLED_FRAMES_RXIPV4UDSBLFRM_Pos (0UL) /*!< ETH RXIPV4_UDP_CHECKSUM_DISABLED_FRAMES: RXIPV4UDSBLFRM (Bit 0) */ -#define ETH_RXIPV4_UDP_CHECKSUM_DISABLED_FRAMES_RXIPV4UDSBLFRM_Msk (0xffffffffUL) /*!< ETH RXIPV4_UDP_CHECKSUM_DISABLED_FRAMES: RXIPV4UDSBLFRM (Bitfield-Mask: 0xffffffff) */ - -/* --------------------------- ETH_RXIPV6_GOOD_FRAMES --------------------------- */ -#define ETH_RXIPV6_GOOD_FRAMES_RXIPV6GDFRM_Pos (0UL) /*!< ETH RXIPV6_GOOD_FRAMES: RXIPV6GDFRM (Bit 0) */ -#define ETH_RXIPV6_GOOD_FRAMES_RXIPV6GDFRM_Msk (0xffffffffUL) /*!< ETH RXIPV6_GOOD_FRAMES: RXIPV6GDFRM (Bitfield-Mask: 0xffffffff) */ - -/* ----------------------- ETH_RXIPV6_HEADER_ERROR_FRAMES ----------------------- */ -#define ETH_RXIPV6_HEADER_ERROR_FRAMES_RXIPV6HDRERRFRM_Pos (0UL) /*!< ETH RXIPV6_HEADER_ERROR_FRAMES: RXIPV6HDRERRFRM (Bit 0) */ -#define ETH_RXIPV6_HEADER_ERROR_FRAMES_RXIPV6HDRERRFRM_Msk (0xffffffffUL) /*!< ETH RXIPV6_HEADER_ERROR_FRAMES: RXIPV6HDRERRFRM (Bitfield-Mask: 0xffffffff) */ - -/* ------------------------ ETH_RXIPV6_NO_PAYLOAD_FRAMES ------------------------ */ -#define ETH_RXIPV6_NO_PAYLOAD_FRAMES_RXIPV6NOPAYFRM_Pos (0UL) /*!< ETH RXIPV6_NO_PAYLOAD_FRAMES: RXIPV6NOPAYFRM (Bit 0) */ -#define ETH_RXIPV6_NO_PAYLOAD_FRAMES_RXIPV6NOPAYFRM_Msk (0xffffffffUL) /*!< ETH RXIPV6_NO_PAYLOAD_FRAMES: RXIPV6NOPAYFRM (Bitfield-Mask: 0xffffffff) */ - -/* ---------------------------- ETH_RXUDP_GOOD_FRAMES --------------------------- */ -#define ETH_RXUDP_GOOD_FRAMES_RXUDPGDFRM_Pos (0UL) /*!< ETH RXUDP_GOOD_FRAMES: RXUDPGDFRM (Bit 0) */ -#define ETH_RXUDP_GOOD_FRAMES_RXUDPGDFRM_Msk (0xffffffffUL) /*!< ETH RXUDP_GOOD_FRAMES: RXUDPGDFRM (Bitfield-Mask: 0xffffffff) */ - -/* --------------------------- ETH_RXUDP_ERROR_FRAMES --------------------------- */ -#define ETH_RXUDP_ERROR_FRAMES_RXUDPERRFRM_Pos (0UL) /*!< ETH RXUDP_ERROR_FRAMES: RXUDPERRFRM (Bit 0) */ -#define ETH_RXUDP_ERROR_FRAMES_RXUDPERRFRM_Msk (0xffffffffUL) /*!< ETH RXUDP_ERROR_FRAMES: RXUDPERRFRM (Bitfield-Mask: 0xffffffff) */ - -/* ---------------------------- ETH_RXTCP_GOOD_FRAMES --------------------------- */ -#define ETH_RXTCP_GOOD_FRAMES_RXTCPGDFRM_Pos (0UL) /*!< ETH RXTCP_GOOD_FRAMES: RXTCPGDFRM (Bit 0) */ -#define ETH_RXTCP_GOOD_FRAMES_RXTCPGDFRM_Msk (0xffffffffUL) /*!< ETH RXTCP_GOOD_FRAMES: RXTCPGDFRM (Bitfield-Mask: 0xffffffff) */ - -/* --------------------------- ETH_RXTCP_ERROR_FRAMES --------------------------- */ -#define ETH_RXTCP_ERROR_FRAMES_RXTCPERRFRM_Pos (0UL) /*!< ETH RXTCP_ERROR_FRAMES: RXTCPERRFRM (Bit 0) */ -#define ETH_RXTCP_ERROR_FRAMES_RXTCPERRFRM_Msk (0xffffffffUL) /*!< ETH RXTCP_ERROR_FRAMES: RXTCPERRFRM (Bitfield-Mask: 0xffffffff) */ - -/* --------------------------- ETH_RXICMP_GOOD_FRAMES --------------------------- */ -#define ETH_RXICMP_GOOD_FRAMES_RXICMPGDFRM_Pos (0UL) /*!< ETH RXICMP_GOOD_FRAMES: RXICMPGDFRM (Bit 0) */ -#define ETH_RXICMP_GOOD_FRAMES_RXICMPGDFRM_Msk (0xffffffffUL) /*!< ETH RXICMP_GOOD_FRAMES: RXICMPGDFRM (Bitfield-Mask: 0xffffffff) */ - -/* --------------------------- ETH_RXICMP_ERROR_FRAMES -------------------------- */ -#define ETH_RXICMP_ERROR_FRAMES_RXICMPERRFRM_Pos (0UL) /*!< ETH RXICMP_ERROR_FRAMES: RXICMPERRFRM (Bit 0) */ -#define ETH_RXICMP_ERROR_FRAMES_RXICMPERRFRM_Msk (0xffffffffUL) /*!< ETH RXICMP_ERROR_FRAMES: RXICMPERRFRM (Bitfield-Mask: 0xffffffff) */ - -/* --------------------------- ETH_RXIPV4_GOOD_OCTETS --------------------------- */ -#define ETH_RXIPV4_GOOD_OCTETS_RXIPV4GDOCT_Pos (0UL) /*!< ETH RXIPV4_GOOD_OCTETS: RXIPV4GDOCT (Bit 0) */ -#define ETH_RXIPV4_GOOD_OCTETS_RXIPV4GDOCT_Msk (0xffffffffUL) /*!< ETH RXIPV4_GOOD_OCTETS: RXIPV4GDOCT (Bitfield-Mask: 0xffffffff) */ - -/* ----------------------- ETH_RXIPV4_HEADER_ERROR_OCTETS ----------------------- */ -#define ETH_RXIPV4_HEADER_ERROR_OCTETS_RXIPV4HDRERROCT_Pos (0UL) /*!< ETH RXIPV4_HEADER_ERROR_OCTETS: RXIPV4HDRERROCT (Bit 0) */ -#define ETH_RXIPV4_HEADER_ERROR_OCTETS_RXIPV4HDRERROCT_Msk (0xffffffffUL) /*!< ETH RXIPV4_HEADER_ERROR_OCTETS: RXIPV4HDRERROCT (Bitfield-Mask: 0xffffffff) */ - -/* ------------------------ ETH_RXIPV4_NO_PAYLOAD_OCTETS ------------------------ */ -#define ETH_RXIPV4_NO_PAYLOAD_OCTETS_RXIPV4NOPAYOCT_Pos (0UL) /*!< ETH RXIPV4_NO_PAYLOAD_OCTETS: RXIPV4NOPAYOCT (Bit 0) */ -#define ETH_RXIPV4_NO_PAYLOAD_OCTETS_RXIPV4NOPAYOCT_Msk (0xffffffffUL) /*!< ETH RXIPV4_NO_PAYLOAD_OCTETS: RXIPV4NOPAYOCT (Bitfield-Mask: 0xffffffff) */ - -/* ------------------------ ETH_RXIPV4_FRAGMENTED_OCTETS ------------------------ */ -#define ETH_RXIPV4_FRAGMENTED_OCTETS_RXIPV4FRAGOCT_Pos (0UL) /*!< ETH RXIPV4_FRAGMENTED_OCTETS: RXIPV4FRAGOCT (Bit 0) */ -#define ETH_RXIPV4_FRAGMENTED_OCTETS_RXIPV4FRAGOCT_Msk (0xffffffffUL) /*!< ETH RXIPV4_FRAGMENTED_OCTETS: RXIPV4FRAGOCT (Bitfield-Mask: 0xffffffff) */ - -/* ------------------- ETH_RXIPV4_UDP_CHECKSUM_DISABLE_OCTETS ------------------- */ -#define ETH_RXIPV4_UDP_CHECKSUM_DISABLE_OCTETS_RXIPV4UDSBLOCT_Pos (0UL) /*!< ETH RXIPV4_UDP_CHECKSUM_DISABLE_OCTETS: RXIPV4UDSBLOCT (Bit 0) */ -#define ETH_RXIPV4_UDP_CHECKSUM_DISABLE_OCTETS_RXIPV4UDSBLOCT_Msk (0xffffffffUL) /*!< ETH RXIPV4_UDP_CHECKSUM_DISABLE_OCTETS: RXIPV4UDSBLOCT (Bitfield-Mask: 0xffffffff) */ - -/* --------------------------- ETH_RXIPV6_GOOD_OCTETS --------------------------- */ -#define ETH_RXIPV6_GOOD_OCTETS_RXIPV6GDOCT_Pos (0UL) /*!< ETH RXIPV6_GOOD_OCTETS: RXIPV6GDOCT (Bit 0) */ -#define ETH_RXIPV6_GOOD_OCTETS_RXIPV6GDOCT_Msk (0xffffffffUL) /*!< ETH RXIPV6_GOOD_OCTETS: RXIPV6GDOCT (Bitfield-Mask: 0xffffffff) */ - -/* ----------------------- ETH_RXIPV6_HEADER_ERROR_OCTETS ----------------------- */ -#define ETH_RXIPV6_HEADER_ERROR_OCTETS_RXIPV6HDRERROCT_Pos (0UL) /*!< ETH RXIPV6_HEADER_ERROR_OCTETS: RXIPV6HDRERROCT (Bit 0) */ -#define ETH_RXIPV6_HEADER_ERROR_OCTETS_RXIPV6HDRERROCT_Msk (0xffffffffUL) /*!< ETH RXIPV6_HEADER_ERROR_OCTETS: RXIPV6HDRERROCT (Bitfield-Mask: 0xffffffff) */ - -/* ------------------------ ETH_RXIPV6_NO_PAYLOAD_OCTETS ------------------------ */ -#define ETH_RXIPV6_NO_PAYLOAD_OCTETS_RXIPV6NOPAYOCT_Pos (0UL) /*!< ETH RXIPV6_NO_PAYLOAD_OCTETS: RXIPV6NOPAYOCT (Bit 0) */ -#define ETH_RXIPV6_NO_PAYLOAD_OCTETS_RXIPV6NOPAYOCT_Msk (0xffffffffUL) /*!< ETH RXIPV6_NO_PAYLOAD_OCTETS: RXIPV6NOPAYOCT (Bitfield-Mask: 0xffffffff) */ - -/* ---------------------------- ETH_RXUDP_GOOD_OCTETS --------------------------- */ -#define ETH_RXUDP_GOOD_OCTETS_RXUDPGDOCT_Pos (0UL) /*!< ETH RXUDP_GOOD_OCTETS: RXUDPGDOCT (Bit 0) */ -#define ETH_RXUDP_GOOD_OCTETS_RXUDPGDOCT_Msk (0xffffffffUL) /*!< ETH RXUDP_GOOD_OCTETS: RXUDPGDOCT (Bitfield-Mask: 0xffffffff) */ - -/* --------------------------- ETH_RXUDP_ERROR_OCTETS --------------------------- */ -#define ETH_RXUDP_ERROR_OCTETS_RXUDPERROCT_Pos (0UL) /*!< ETH RXUDP_ERROR_OCTETS: RXUDPERROCT (Bit 0) */ -#define ETH_RXUDP_ERROR_OCTETS_RXUDPERROCT_Msk (0xffffffffUL) /*!< ETH RXUDP_ERROR_OCTETS: RXUDPERROCT (Bitfield-Mask: 0xffffffff) */ - -/* ---------------------------- ETH_RXTCP_GOOD_OCTETS --------------------------- */ -#define ETH_RXTCP_GOOD_OCTETS_RXTCPGDOCT_Pos (0UL) /*!< ETH RXTCP_GOOD_OCTETS: RXTCPGDOCT (Bit 0) */ -#define ETH_RXTCP_GOOD_OCTETS_RXTCPGDOCT_Msk (0xffffffffUL) /*!< ETH RXTCP_GOOD_OCTETS: RXTCPGDOCT (Bitfield-Mask: 0xffffffff) */ - -/* --------------------------- ETH_RXTCP_ERROR_OCTETS --------------------------- */ -#define ETH_RXTCP_ERROR_OCTETS_RXTCPERROCT_Pos (0UL) /*!< ETH RXTCP_ERROR_OCTETS: RXTCPERROCT (Bit 0) */ -#define ETH_RXTCP_ERROR_OCTETS_RXTCPERROCT_Msk (0xffffffffUL) /*!< ETH RXTCP_ERROR_OCTETS: RXTCPERROCT (Bitfield-Mask: 0xffffffff) */ - -/* --------------------------- ETH_RXICMP_GOOD_OCTETS --------------------------- */ -#define ETH_RXICMP_GOOD_OCTETS_RXICMPGDOCT_Pos (0UL) /*!< ETH RXICMP_GOOD_OCTETS: RXICMPGDOCT (Bit 0) */ -#define ETH_RXICMP_GOOD_OCTETS_RXICMPGDOCT_Msk (0xffffffffUL) /*!< ETH RXICMP_GOOD_OCTETS: RXICMPGDOCT (Bitfield-Mask: 0xffffffff) */ - -/* --------------------------- ETH_RXICMP_ERROR_OCTETS -------------------------- */ -#define ETH_RXICMP_ERROR_OCTETS_RXICMPERROCT_Pos (0UL) /*!< ETH RXICMP_ERROR_OCTETS: RXICMPERROCT (Bit 0) */ -#define ETH_RXICMP_ERROR_OCTETS_RXICMPERROCT_Msk (0xffffffffUL) /*!< ETH RXICMP_ERROR_OCTETS: RXICMPERROCT (Bitfield-Mask: 0xffffffff) */ - -/* ---------------------------- ETH_TIMESTAMP_CONTROL --------------------------- */ -#define ETH_TIMESTAMP_CONTROL_TSENA_Pos (0UL) /*!< ETH TIMESTAMP_CONTROL: TSENA (Bit 0) */ -#define ETH_TIMESTAMP_CONTROL_TSENA_Msk (0x1UL) /*!< ETH TIMESTAMP_CONTROL: TSENA (Bitfield-Mask: 0x01) */ -#define ETH_TIMESTAMP_CONTROL_TSCFUPDT_Pos (1UL) /*!< ETH TIMESTAMP_CONTROL: TSCFUPDT (Bit 1) */ -#define ETH_TIMESTAMP_CONTROL_TSCFUPDT_Msk (0x2UL) /*!< ETH TIMESTAMP_CONTROL: TSCFUPDT (Bitfield-Mask: 0x01) */ -#define ETH_TIMESTAMP_CONTROL_TSINIT_Pos (2UL) /*!< ETH TIMESTAMP_CONTROL: TSINIT (Bit 2) */ -#define ETH_TIMESTAMP_CONTROL_TSINIT_Msk (0x4UL) /*!< ETH TIMESTAMP_CONTROL: TSINIT (Bitfield-Mask: 0x01) */ -#define ETH_TIMESTAMP_CONTROL_TSUPDT_Pos (3UL) /*!< ETH TIMESTAMP_CONTROL: TSUPDT (Bit 3) */ -#define ETH_TIMESTAMP_CONTROL_TSUPDT_Msk (0x8UL) /*!< ETH TIMESTAMP_CONTROL: TSUPDT (Bitfield-Mask: 0x01) */ -#define ETH_TIMESTAMP_CONTROL_TSTRIG_Pos (4UL) /*!< ETH TIMESTAMP_CONTROL: TSTRIG (Bit 4) */ -#define ETH_TIMESTAMP_CONTROL_TSTRIG_Msk (0x10UL) /*!< ETH TIMESTAMP_CONTROL: TSTRIG (Bitfield-Mask: 0x01) */ -#define ETH_TIMESTAMP_CONTROL_TSADDREG_Pos (5UL) /*!< ETH TIMESTAMP_CONTROL: TSADDREG (Bit 5) */ -#define ETH_TIMESTAMP_CONTROL_TSADDREG_Msk (0x20UL) /*!< ETH TIMESTAMP_CONTROL: TSADDREG (Bitfield-Mask: 0x01) */ -#define ETH_TIMESTAMP_CONTROL_TSENALL_Pos (8UL) /*!< ETH TIMESTAMP_CONTROL: TSENALL (Bit 8) */ -#define ETH_TIMESTAMP_CONTROL_TSENALL_Msk (0x100UL) /*!< ETH TIMESTAMP_CONTROL: TSENALL (Bitfield-Mask: 0x01) */ -#define ETH_TIMESTAMP_CONTROL_TSCTRLSSR_Pos (9UL) /*!< ETH TIMESTAMP_CONTROL: TSCTRLSSR (Bit 9) */ -#define ETH_TIMESTAMP_CONTROL_TSCTRLSSR_Msk (0x200UL) /*!< ETH TIMESTAMP_CONTROL: TSCTRLSSR (Bitfield-Mask: 0x01) */ -#define ETH_TIMESTAMP_CONTROL_TSVER2ENA_Pos (10UL) /*!< ETH TIMESTAMP_CONTROL: TSVER2ENA (Bit 10) */ -#define ETH_TIMESTAMP_CONTROL_TSVER2ENA_Msk (0x400UL) /*!< ETH TIMESTAMP_CONTROL: TSVER2ENA (Bitfield-Mask: 0x01) */ -#define ETH_TIMESTAMP_CONTROL_TSIPENA_Pos (11UL) /*!< ETH TIMESTAMP_CONTROL: TSIPENA (Bit 11) */ -#define ETH_TIMESTAMP_CONTROL_TSIPENA_Msk (0x800UL) /*!< ETH TIMESTAMP_CONTROL: TSIPENA (Bitfield-Mask: 0x01) */ -#define ETH_TIMESTAMP_CONTROL_TSIPV6ENA_Pos (12UL) /*!< ETH TIMESTAMP_CONTROL: TSIPV6ENA (Bit 12) */ -#define ETH_TIMESTAMP_CONTROL_TSIPV6ENA_Msk (0x1000UL) /*!< ETH TIMESTAMP_CONTROL: TSIPV6ENA (Bitfield-Mask: 0x01) */ -#define ETH_TIMESTAMP_CONTROL_TSIPV4ENA_Pos (13UL) /*!< ETH TIMESTAMP_CONTROL: TSIPV4ENA (Bit 13) */ -#define ETH_TIMESTAMP_CONTROL_TSIPV4ENA_Msk (0x2000UL) /*!< ETH TIMESTAMP_CONTROL: TSIPV4ENA (Bitfield-Mask: 0x01) */ -#define ETH_TIMESTAMP_CONTROL_TSEVNTENA_Pos (14UL) /*!< ETH TIMESTAMP_CONTROL: TSEVNTENA (Bit 14) */ -#define ETH_TIMESTAMP_CONTROL_TSEVNTENA_Msk (0x4000UL) /*!< ETH TIMESTAMP_CONTROL: TSEVNTENA (Bitfield-Mask: 0x01) */ -#define ETH_TIMESTAMP_CONTROL_TSMSTRENA_Pos (15UL) /*!< ETH TIMESTAMP_CONTROL: TSMSTRENA (Bit 15) */ -#define ETH_TIMESTAMP_CONTROL_TSMSTRENA_Msk (0x8000UL) /*!< ETH TIMESTAMP_CONTROL: TSMSTRENA (Bitfield-Mask: 0x01) */ -#define ETH_TIMESTAMP_CONTROL_SNAPTYPSEL_Pos (16UL) /*!< ETH TIMESTAMP_CONTROL: SNAPTYPSEL (Bit 16) */ -#define ETH_TIMESTAMP_CONTROL_SNAPTYPSEL_Msk (0x30000UL) /*!< ETH TIMESTAMP_CONTROL: SNAPTYPSEL (Bitfield-Mask: 0x03) */ -#define ETH_TIMESTAMP_CONTROL_TSENMACADDR_Pos (18UL) /*!< ETH TIMESTAMP_CONTROL: TSENMACADDR (Bit 18) */ -#define ETH_TIMESTAMP_CONTROL_TSENMACADDR_Msk (0x40000UL) /*!< ETH TIMESTAMP_CONTROL: TSENMACADDR (Bitfield-Mask: 0x01) */ - -/* -------------------------- ETH_SUB_SECOND_INCREMENT -------------------------- */ -#define ETH_SUB_SECOND_INCREMENT_SSINC_Pos (0UL) /*!< ETH SUB_SECOND_INCREMENT: SSINC (Bit 0) */ -#define ETH_SUB_SECOND_INCREMENT_SSINC_Msk (0xffUL) /*!< ETH SUB_SECOND_INCREMENT: SSINC (Bitfield-Mask: 0xff) */ - -/* --------------------------- ETH_SYSTEM_TIME_SECONDS -------------------------- */ -#define ETH_SYSTEM_TIME_SECONDS_TSS_Pos (0UL) /*!< ETH SYSTEM_TIME_SECONDS: TSS (Bit 0) */ -#define ETH_SYSTEM_TIME_SECONDS_TSS_Msk (0xffffffffUL) /*!< ETH SYSTEM_TIME_SECONDS: TSS (Bitfield-Mask: 0xffffffff) */ - -/* ------------------------- ETH_SYSTEM_TIME_NANOSECONDS ------------------------ */ -#define ETH_SYSTEM_TIME_NANOSECONDS_TSSS_Pos (0UL) /*!< ETH SYSTEM_TIME_NANOSECONDS: TSSS (Bit 0) */ -#define ETH_SYSTEM_TIME_NANOSECONDS_TSSS_Msk (0x7fffffffUL) /*!< ETH SYSTEM_TIME_NANOSECONDS: TSSS (Bitfield-Mask: 0x7fffffff) */ - -/* ----------------------- ETH_SYSTEM_TIME_SECONDS_UPDATE ----------------------- */ -#define ETH_SYSTEM_TIME_SECONDS_UPDATE_TSS_Pos (0UL) /*!< ETH SYSTEM_TIME_SECONDS_UPDATE: TSS (Bit 0) */ -#define ETH_SYSTEM_TIME_SECONDS_UPDATE_TSS_Msk (0xffffffffUL) /*!< ETH SYSTEM_TIME_SECONDS_UPDATE: TSS (Bitfield-Mask: 0xffffffff) */ - -/* --------------------- ETH_SYSTEM_TIME_NANOSECONDS_UPDATE --------------------- */ -#define ETH_SYSTEM_TIME_NANOSECONDS_UPDATE_TSSS_Pos (0UL) /*!< ETH SYSTEM_TIME_NANOSECONDS_UPDATE: TSSS (Bit 0) */ -#define ETH_SYSTEM_TIME_NANOSECONDS_UPDATE_TSSS_Msk (0x7fffffffUL) /*!< ETH SYSTEM_TIME_NANOSECONDS_UPDATE: TSSS (Bitfield-Mask: 0x7fffffff) */ -#define ETH_SYSTEM_TIME_NANOSECONDS_UPDATE_ADDSUB_Pos (31UL) /*!< ETH SYSTEM_TIME_NANOSECONDS_UPDATE: ADDSUB (Bit 31) */ -#define ETH_SYSTEM_TIME_NANOSECONDS_UPDATE_ADDSUB_Msk (0x80000000UL) /*!< ETH SYSTEM_TIME_NANOSECONDS_UPDATE: ADDSUB (Bitfield-Mask: 0x01) */ - -/* ---------------------------- ETH_TIMESTAMP_ADDEND ---------------------------- */ -#define ETH_TIMESTAMP_ADDEND_TSAR_Pos (0UL) /*!< ETH TIMESTAMP_ADDEND: TSAR (Bit 0) */ -#define ETH_TIMESTAMP_ADDEND_TSAR_Msk (0xffffffffUL) /*!< ETH TIMESTAMP_ADDEND: TSAR (Bitfield-Mask: 0xffffffff) */ - -/* --------------------------- ETH_TARGET_TIME_SECONDS -------------------------- */ -#define ETH_TARGET_TIME_SECONDS_TSTR_Pos (0UL) /*!< ETH TARGET_TIME_SECONDS: TSTR (Bit 0) */ -#define ETH_TARGET_TIME_SECONDS_TSTR_Msk (0xffffffffUL) /*!< ETH TARGET_TIME_SECONDS: TSTR (Bitfield-Mask: 0xffffffff) */ - -/* ------------------------- ETH_TARGET_TIME_NANOSECONDS ------------------------ */ -#define ETH_TARGET_TIME_NANOSECONDS_TTSLO_Pos (0UL) /*!< ETH TARGET_TIME_NANOSECONDS: TTSLO (Bit 0) */ -#define ETH_TARGET_TIME_NANOSECONDS_TTSLO_Msk (0x7fffffffUL) /*!< ETH TARGET_TIME_NANOSECONDS: TTSLO (Bitfield-Mask: 0x7fffffff) */ -#define ETH_TARGET_TIME_NANOSECONDS_TRGTBUSY_Pos (31UL) /*!< ETH TARGET_TIME_NANOSECONDS: TRGTBUSY (Bit 31) */ -#define ETH_TARGET_TIME_NANOSECONDS_TRGTBUSY_Msk (0x80000000UL) /*!< ETH TARGET_TIME_NANOSECONDS: TRGTBUSY (Bitfield-Mask: 0x01) */ - -/* --------------------- ETH_SYSTEM_TIME_HIGHER_WORD_SECONDS -------------------- */ -#define ETH_SYSTEM_TIME_HIGHER_WORD_SECONDS_TSHWR_Pos (0UL) /*!< ETH SYSTEM_TIME_HIGHER_WORD_SECONDS: TSHWR (Bit 0) */ -#define ETH_SYSTEM_TIME_HIGHER_WORD_SECONDS_TSHWR_Msk (0xffffUL) /*!< ETH SYSTEM_TIME_HIGHER_WORD_SECONDS: TSHWR (Bitfield-Mask: 0xffff) */ - -/* ---------------------------- ETH_TIMESTAMP_STATUS ---------------------------- */ -#define ETH_TIMESTAMP_STATUS_TSSOVF_Pos (0UL) /*!< ETH TIMESTAMP_STATUS: TSSOVF (Bit 0) */ -#define ETH_TIMESTAMP_STATUS_TSSOVF_Msk (0x1UL) /*!< ETH TIMESTAMP_STATUS: TSSOVF (Bitfield-Mask: 0x01) */ -#define ETH_TIMESTAMP_STATUS_TSTARGT_Pos (1UL) /*!< ETH TIMESTAMP_STATUS: TSTARGT (Bit 1) */ -#define ETH_TIMESTAMP_STATUS_TSTARGT_Msk (0x2UL) /*!< ETH TIMESTAMP_STATUS: TSTARGT (Bitfield-Mask: 0x01) */ -#define ETH_TIMESTAMP_STATUS_TSTRGTERR_Pos (3UL) /*!< ETH TIMESTAMP_STATUS: TSTRGTERR (Bit 3) */ -#define ETH_TIMESTAMP_STATUS_TSTRGTERR_Msk (0x8UL) /*!< ETH TIMESTAMP_STATUS: TSTRGTERR (Bitfield-Mask: 0x01) */ -#define ETH_TIMESTAMP_STATUS_TSTARGT1_Pos (4UL) /*!< ETH TIMESTAMP_STATUS: TSTARGT1 (Bit 4) */ -#define ETH_TIMESTAMP_STATUS_TSTARGT1_Msk (0x10UL) /*!< ETH TIMESTAMP_STATUS: TSTARGT1 (Bitfield-Mask: 0x01) */ -#define ETH_TIMESTAMP_STATUS_TSTRGTERR1_Pos (5UL) /*!< ETH TIMESTAMP_STATUS: TSTRGTERR1 (Bit 5) */ -#define ETH_TIMESTAMP_STATUS_TSTRGTERR1_Msk (0x20UL) /*!< ETH TIMESTAMP_STATUS: TSTRGTERR1 (Bitfield-Mask: 0x01) */ -#define ETH_TIMESTAMP_STATUS_TSTARGT2_Pos (6UL) /*!< ETH TIMESTAMP_STATUS: TSTARGT2 (Bit 6) */ -#define ETH_TIMESTAMP_STATUS_TSTARGT2_Msk (0x40UL) /*!< ETH TIMESTAMP_STATUS: TSTARGT2 (Bitfield-Mask: 0x01) */ -#define ETH_TIMESTAMP_STATUS_TSTRGTERR2_Pos (7UL) /*!< ETH TIMESTAMP_STATUS: TSTRGTERR2 (Bit 7) */ -#define ETH_TIMESTAMP_STATUS_TSTRGTERR2_Msk (0x80UL) /*!< ETH TIMESTAMP_STATUS: TSTRGTERR2 (Bitfield-Mask: 0x01) */ -#define ETH_TIMESTAMP_STATUS_TSTARGT3_Pos (8UL) /*!< ETH TIMESTAMP_STATUS: TSTARGT3 (Bit 8) */ -#define ETH_TIMESTAMP_STATUS_TSTARGT3_Msk (0x100UL) /*!< ETH TIMESTAMP_STATUS: TSTARGT3 (Bitfield-Mask: 0x01) */ -#define ETH_TIMESTAMP_STATUS_TSTRGTERR3_Pos (9UL) /*!< ETH TIMESTAMP_STATUS: TSTRGTERR3 (Bit 9) */ -#define ETH_TIMESTAMP_STATUS_TSTRGTERR3_Msk (0x200UL) /*!< ETH TIMESTAMP_STATUS: TSTRGTERR3 (Bitfield-Mask: 0x01) */ - -/* -------------------------------- ETH_BUS_MODE -------------------------------- */ -#define ETH_BUS_MODE_SWR_Pos (0UL) /*!< ETH BUS_MODE: SWR (Bit 0) */ -#define ETH_BUS_MODE_SWR_Msk (0x1UL) /*!< ETH BUS_MODE: SWR (Bitfield-Mask: 0x01) */ -#define ETH_BUS_MODE_DA_Pos (1UL) /*!< ETH BUS_MODE: DA (Bit 1) */ -#define ETH_BUS_MODE_DA_Msk (0x2UL) /*!< ETH BUS_MODE: DA (Bitfield-Mask: 0x01) */ -#define ETH_BUS_MODE_DSL_Pos (2UL) /*!< ETH BUS_MODE: DSL (Bit 2) */ -#define ETH_BUS_MODE_DSL_Msk (0x7cUL) /*!< ETH BUS_MODE: DSL (Bitfield-Mask: 0x1f) */ -#define ETH_BUS_MODE_ATDS_Pos (7UL) /*!< ETH BUS_MODE: ATDS (Bit 7) */ -#define ETH_BUS_MODE_ATDS_Msk (0x80UL) /*!< ETH BUS_MODE: ATDS (Bitfield-Mask: 0x01) */ -#define ETH_BUS_MODE_PBL_Pos (8UL) /*!< ETH BUS_MODE: PBL (Bit 8) */ -#define ETH_BUS_MODE_PBL_Msk (0x3f00UL) /*!< ETH BUS_MODE: PBL (Bitfield-Mask: 0x3f) */ -#define ETH_BUS_MODE_PR_Pos (14UL) /*!< ETH BUS_MODE: PR (Bit 14) */ -#define ETH_BUS_MODE_PR_Msk (0xc000UL) /*!< ETH BUS_MODE: PR (Bitfield-Mask: 0x03) */ -#define ETH_BUS_MODE_FB_Pos (16UL) /*!< ETH BUS_MODE: FB (Bit 16) */ -#define ETH_BUS_MODE_FB_Msk (0x10000UL) /*!< ETH BUS_MODE: FB (Bitfield-Mask: 0x01) */ -#define ETH_BUS_MODE_RPBL_Pos (17UL) /*!< ETH BUS_MODE: RPBL (Bit 17) */ -#define ETH_BUS_MODE_RPBL_Msk (0x7e0000UL) /*!< ETH BUS_MODE: RPBL (Bitfield-Mask: 0x3f) */ -#define ETH_BUS_MODE_USP_Pos (23UL) /*!< ETH BUS_MODE: USP (Bit 23) */ -#define ETH_BUS_MODE_USP_Msk (0x800000UL) /*!< ETH BUS_MODE: USP (Bitfield-Mask: 0x01) */ -#define ETH_BUS_MODE_PBLX8_Pos (24UL) /*!< ETH BUS_MODE: PBLX8 (Bit 24) */ -#define ETH_BUS_MODE_PBLX8_Msk (0x1000000UL) /*!< ETH BUS_MODE: PBLX8 (Bitfield-Mask: 0x01) */ -#define ETH_BUS_MODE_AAL_Pos (25UL) /*!< ETH BUS_MODE: AAL (Bit 25) */ -#define ETH_BUS_MODE_AAL_Msk (0x2000000UL) /*!< ETH BUS_MODE: AAL (Bitfield-Mask: 0x01) */ -#define ETH_BUS_MODE_MB_Pos (26UL) /*!< ETH BUS_MODE: MB (Bit 26) */ -#define ETH_BUS_MODE_MB_Msk (0x4000000UL) /*!< ETH BUS_MODE: MB (Bitfield-Mask: 0x01) */ -#define ETH_BUS_MODE_TXPR_Pos (27UL) /*!< ETH BUS_MODE: TXPR (Bit 27) */ -#define ETH_BUS_MODE_TXPR_Msk (0x8000000UL) /*!< ETH BUS_MODE: TXPR (Bitfield-Mask: 0x01) */ -#define ETH_BUS_MODE_PRWG_Pos (28UL) /*!< ETH BUS_MODE: PRWG (Bit 28) */ -#define ETH_BUS_MODE_PRWG_Msk (0x30000000UL) /*!< ETH BUS_MODE: PRWG (Bitfield-Mask: 0x03) */ - -/* -------------------------- ETH_TRANSMIT_POLL_DEMAND -------------------------- */ -#define ETH_TRANSMIT_POLL_DEMAND_TPD_Pos (0UL) /*!< ETH TRANSMIT_POLL_DEMAND: TPD (Bit 0) */ -#define ETH_TRANSMIT_POLL_DEMAND_TPD_Msk (0xffffffffUL) /*!< ETH TRANSMIT_POLL_DEMAND: TPD (Bitfield-Mask: 0xffffffff) */ - -/* --------------------------- ETH_RECEIVE_POLL_DEMAND -------------------------- */ -#define ETH_RECEIVE_POLL_DEMAND_RPD_Pos (0UL) /*!< ETH RECEIVE_POLL_DEMAND: RPD (Bit 0) */ -#define ETH_RECEIVE_POLL_DEMAND_RPD_Msk (0xffffffffUL) /*!< ETH RECEIVE_POLL_DEMAND: RPD (Bitfield-Mask: 0xffffffff) */ - -/* --------------------- ETH_RECEIVE_DESCRIPTOR_LIST_ADDRESS -------------------- */ -#define ETH_RECEIVE_DESCRIPTOR_LIST_ADDRESS_RDESLA_32bit_Pos (2UL) /*!< ETH RECEIVE_DESCRIPTOR_LIST_ADDRESS: RDESLA_32bit (Bit 2) */ -#define ETH_RECEIVE_DESCRIPTOR_LIST_ADDRESS_RDESLA_32bit_Msk (0xfffffffcUL) /*!< ETH RECEIVE_DESCRIPTOR_LIST_ADDRESS: RDESLA_32bit (Bitfield-Mask: 0x3fffffff) */ - -/* -------------------- ETH_TRANSMIT_DESCRIPTOR_LIST_ADDRESS -------------------- */ -#define ETH_TRANSMIT_DESCRIPTOR_LIST_ADDRESS_TDESLA_32bit_Pos (2UL) /*!< ETH TRANSMIT_DESCRIPTOR_LIST_ADDRESS: TDESLA_32bit (Bit 2) */ -#define ETH_TRANSMIT_DESCRIPTOR_LIST_ADDRESS_TDESLA_32bit_Msk (0xfffffffcUL) /*!< ETH TRANSMIT_DESCRIPTOR_LIST_ADDRESS: TDESLA_32bit (Bitfield-Mask: 0x3fffffff) */ - -/* --------------------------------- ETH_STATUS --------------------------------- */ -#define ETH_STATUS_TI_Pos (0UL) /*!< ETH STATUS: TI (Bit 0) */ -#define ETH_STATUS_TI_Msk (0x1UL) /*!< ETH STATUS: TI (Bitfield-Mask: 0x01) */ -#define ETH_STATUS_TPS_Pos (1UL) /*!< ETH STATUS: TPS (Bit 1) */ -#define ETH_STATUS_TPS_Msk (0x2UL) /*!< ETH STATUS: TPS (Bitfield-Mask: 0x01) */ -#define ETH_STATUS_TU_Pos (2UL) /*!< ETH STATUS: TU (Bit 2) */ -#define ETH_STATUS_TU_Msk (0x4UL) /*!< ETH STATUS: TU (Bitfield-Mask: 0x01) */ -#define ETH_STATUS_TJT_Pos (3UL) /*!< ETH STATUS: TJT (Bit 3) */ -#define ETH_STATUS_TJT_Msk (0x8UL) /*!< ETH STATUS: TJT (Bitfield-Mask: 0x01) */ -#define ETH_STATUS_OVF_Pos (4UL) /*!< ETH STATUS: OVF (Bit 4) */ -#define ETH_STATUS_OVF_Msk (0x10UL) /*!< ETH STATUS: OVF (Bitfield-Mask: 0x01) */ -#define ETH_STATUS_UNF_Pos (5UL) /*!< ETH STATUS: UNF (Bit 5) */ -#define ETH_STATUS_UNF_Msk (0x20UL) /*!< ETH STATUS: UNF (Bitfield-Mask: 0x01) */ -#define ETH_STATUS_RI_Pos (6UL) /*!< ETH STATUS: RI (Bit 6) */ -#define ETH_STATUS_RI_Msk (0x40UL) /*!< ETH STATUS: RI (Bitfield-Mask: 0x01) */ -#define ETH_STATUS_RU_Pos (7UL) /*!< ETH STATUS: RU (Bit 7) */ -#define ETH_STATUS_RU_Msk (0x80UL) /*!< ETH STATUS: RU (Bitfield-Mask: 0x01) */ -#define ETH_STATUS_RPS_Pos (8UL) /*!< ETH STATUS: RPS (Bit 8) */ -#define ETH_STATUS_RPS_Msk (0x100UL) /*!< ETH STATUS: RPS (Bitfield-Mask: 0x01) */ -#define ETH_STATUS_RWT_Pos (9UL) /*!< ETH STATUS: RWT (Bit 9) */ -#define ETH_STATUS_RWT_Msk (0x200UL) /*!< ETH STATUS: RWT (Bitfield-Mask: 0x01) */ -#define ETH_STATUS_ETI_Pos (10UL) /*!< ETH STATUS: ETI (Bit 10) */ -#define ETH_STATUS_ETI_Msk (0x400UL) /*!< ETH STATUS: ETI (Bitfield-Mask: 0x01) */ -#define ETH_STATUS_FBI_Pos (13UL) /*!< ETH STATUS: FBI (Bit 13) */ -#define ETH_STATUS_FBI_Msk (0x2000UL) /*!< ETH STATUS: FBI (Bitfield-Mask: 0x01) */ -#define ETH_STATUS_ERI_Pos (14UL) /*!< ETH STATUS: ERI (Bit 14) */ -#define ETH_STATUS_ERI_Msk (0x4000UL) /*!< ETH STATUS: ERI (Bitfield-Mask: 0x01) */ -#define ETH_STATUS_AIS_Pos (15UL) /*!< ETH STATUS: AIS (Bit 15) */ -#define ETH_STATUS_AIS_Msk (0x8000UL) /*!< ETH STATUS: AIS (Bitfield-Mask: 0x01) */ -#define ETH_STATUS_NIS_Pos (16UL) /*!< ETH STATUS: NIS (Bit 16) */ -#define ETH_STATUS_NIS_Msk (0x10000UL) /*!< ETH STATUS: NIS (Bitfield-Mask: 0x01) */ -#define ETH_STATUS_RS_Pos (17UL) /*!< ETH STATUS: RS (Bit 17) */ -#define ETH_STATUS_RS_Msk (0xe0000UL) /*!< ETH STATUS: RS (Bitfield-Mask: 0x07) */ -#define ETH_STATUS_TS_Pos (20UL) /*!< ETH STATUS: TS (Bit 20) */ -#define ETH_STATUS_TS_Msk (0x700000UL) /*!< ETH STATUS: TS (Bitfield-Mask: 0x07) */ -#define ETH_STATUS_EB_Pos (23UL) /*!< ETH STATUS: EB (Bit 23) */ -#define ETH_STATUS_EB_Msk (0x3800000UL) /*!< ETH STATUS: EB (Bitfield-Mask: 0x07) */ -#define ETH_STATUS_EMI_Pos (27UL) /*!< ETH STATUS: EMI (Bit 27) */ -#define ETH_STATUS_EMI_Msk (0x8000000UL) /*!< ETH STATUS: EMI (Bitfield-Mask: 0x01) */ -#define ETH_STATUS_EPI_Pos (28UL) /*!< ETH STATUS: EPI (Bit 28) */ -#define ETH_STATUS_EPI_Msk (0x10000000UL) /*!< ETH STATUS: EPI (Bitfield-Mask: 0x01) */ -#define ETH_STATUS_TTI_Pos (29UL) /*!< ETH STATUS: TTI (Bit 29) */ -#define ETH_STATUS_TTI_Msk (0x20000000UL) /*!< ETH STATUS: TTI (Bitfield-Mask: 0x01) */ - -/* ----------------------------- ETH_OPERATION_MODE ----------------------------- */ -#define ETH_OPERATION_MODE_SR_Pos (1UL) /*!< ETH OPERATION_MODE: SR (Bit 1) */ -#define ETH_OPERATION_MODE_SR_Msk (0x2UL) /*!< ETH OPERATION_MODE: SR (Bitfield-Mask: 0x01) */ -#define ETH_OPERATION_MODE_OSF_Pos (2UL) /*!< ETH OPERATION_MODE: OSF (Bit 2) */ -#define ETH_OPERATION_MODE_OSF_Msk (0x4UL) /*!< ETH OPERATION_MODE: OSF (Bitfield-Mask: 0x01) */ -#define ETH_OPERATION_MODE_RTC_Pos (3UL) /*!< ETH OPERATION_MODE: RTC (Bit 3) */ -#define ETH_OPERATION_MODE_RTC_Msk (0x18UL) /*!< ETH OPERATION_MODE: RTC (Bitfield-Mask: 0x03) */ -#define ETH_OPERATION_MODE_FUF_Pos (6UL) /*!< ETH OPERATION_MODE: FUF (Bit 6) */ -#define ETH_OPERATION_MODE_FUF_Msk (0x40UL) /*!< ETH OPERATION_MODE: FUF (Bitfield-Mask: 0x01) */ -#define ETH_OPERATION_MODE_FEF_Pos (7UL) /*!< ETH OPERATION_MODE: FEF (Bit 7) */ -#define ETH_OPERATION_MODE_FEF_Msk (0x80UL) /*!< ETH OPERATION_MODE: FEF (Bitfield-Mask: 0x01) */ -#define ETH_OPERATION_MODE_ST_Pos (13UL) /*!< ETH OPERATION_MODE: ST (Bit 13) */ -#define ETH_OPERATION_MODE_ST_Msk (0x2000UL) /*!< ETH OPERATION_MODE: ST (Bitfield-Mask: 0x01) */ -#define ETH_OPERATION_MODE_TTC_Pos (14UL) /*!< ETH OPERATION_MODE: TTC (Bit 14) */ -#define ETH_OPERATION_MODE_TTC_Msk (0x1c000UL) /*!< ETH OPERATION_MODE: TTC (Bitfield-Mask: 0x07) */ -#define ETH_OPERATION_MODE_FTF_Pos (20UL) /*!< ETH OPERATION_MODE: FTF (Bit 20) */ -#define ETH_OPERATION_MODE_FTF_Msk (0x100000UL) /*!< ETH OPERATION_MODE: FTF (Bitfield-Mask: 0x01) */ -#define ETH_OPERATION_MODE_TSF_Pos (21UL) /*!< ETH OPERATION_MODE: TSF (Bit 21) */ -#define ETH_OPERATION_MODE_TSF_Msk (0x200000UL) /*!< ETH OPERATION_MODE: TSF (Bitfield-Mask: 0x01) */ -#define ETH_OPERATION_MODE_DFF_Pos (24UL) /*!< ETH OPERATION_MODE: DFF (Bit 24) */ -#define ETH_OPERATION_MODE_DFF_Msk (0x1000000UL) /*!< ETH OPERATION_MODE: DFF (Bitfield-Mask: 0x01) */ -#define ETH_OPERATION_MODE_RSF_Pos (25UL) /*!< ETH OPERATION_MODE: RSF (Bit 25) */ -#define ETH_OPERATION_MODE_RSF_Msk (0x2000000UL) /*!< ETH OPERATION_MODE: RSF (Bitfield-Mask: 0x01) */ -#define ETH_OPERATION_MODE_DT_Pos (26UL) /*!< ETH OPERATION_MODE: DT (Bit 26) */ -#define ETH_OPERATION_MODE_DT_Msk (0x4000000UL) /*!< ETH OPERATION_MODE: DT (Bitfield-Mask: 0x01) */ - -/* ---------------------------- ETH_INTERRUPT_ENABLE ---------------------------- */ -#define ETH_INTERRUPT_ENABLE_TIE_Pos (0UL) /*!< ETH INTERRUPT_ENABLE: TIE (Bit 0) */ -#define ETH_INTERRUPT_ENABLE_TIE_Msk (0x1UL) /*!< ETH INTERRUPT_ENABLE: TIE (Bitfield-Mask: 0x01) */ -#define ETH_INTERRUPT_ENABLE_TSE_Pos (1UL) /*!< ETH INTERRUPT_ENABLE: TSE (Bit 1) */ -#define ETH_INTERRUPT_ENABLE_TSE_Msk (0x2UL) /*!< ETH INTERRUPT_ENABLE: TSE (Bitfield-Mask: 0x01) */ -#define ETH_INTERRUPT_ENABLE_TUE_Pos (2UL) /*!< ETH INTERRUPT_ENABLE: TUE (Bit 2) */ -#define ETH_INTERRUPT_ENABLE_TUE_Msk (0x4UL) /*!< ETH INTERRUPT_ENABLE: TUE (Bitfield-Mask: 0x01) */ -#define ETH_INTERRUPT_ENABLE_TJE_Pos (3UL) /*!< ETH INTERRUPT_ENABLE: TJE (Bit 3) */ -#define ETH_INTERRUPT_ENABLE_TJE_Msk (0x8UL) /*!< ETH INTERRUPT_ENABLE: TJE (Bitfield-Mask: 0x01) */ -#define ETH_INTERRUPT_ENABLE_OVE_Pos (4UL) /*!< ETH INTERRUPT_ENABLE: OVE (Bit 4) */ -#define ETH_INTERRUPT_ENABLE_OVE_Msk (0x10UL) /*!< ETH INTERRUPT_ENABLE: OVE (Bitfield-Mask: 0x01) */ -#define ETH_INTERRUPT_ENABLE_UNE_Pos (5UL) /*!< ETH INTERRUPT_ENABLE: UNE (Bit 5) */ -#define ETH_INTERRUPT_ENABLE_UNE_Msk (0x20UL) /*!< ETH INTERRUPT_ENABLE: UNE (Bitfield-Mask: 0x01) */ -#define ETH_INTERRUPT_ENABLE_RIE_Pos (6UL) /*!< ETH INTERRUPT_ENABLE: RIE (Bit 6) */ -#define ETH_INTERRUPT_ENABLE_RIE_Msk (0x40UL) /*!< ETH INTERRUPT_ENABLE: RIE (Bitfield-Mask: 0x01) */ -#define ETH_INTERRUPT_ENABLE_RUE_Pos (7UL) /*!< ETH INTERRUPT_ENABLE: RUE (Bit 7) */ -#define ETH_INTERRUPT_ENABLE_RUE_Msk (0x80UL) /*!< ETH INTERRUPT_ENABLE: RUE (Bitfield-Mask: 0x01) */ -#define ETH_INTERRUPT_ENABLE_RSE_Pos (8UL) /*!< ETH INTERRUPT_ENABLE: RSE (Bit 8) */ -#define ETH_INTERRUPT_ENABLE_RSE_Msk (0x100UL) /*!< ETH INTERRUPT_ENABLE: RSE (Bitfield-Mask: 0x01) */ -#define ETH_INTERRUPT_ENABLE_RWE_Pos (9UL) /*!< ETH INTERRUPT_ENABLE: RWE (Bit 9) */ -#define ETH_INTERRUPT_ENABLE_RWE_Msk (0x200UL) /*!< ETH INTERRUPT_ENABLE: RWE (Bitfield-Mask: 0x01) */ -#define ETH_INTERRUPT_ENABLE_ETE_Pos (10UL) /*!< ETH INTERRUPT_ENABLE: ETE (Bit 10) */ -#define ETH_INTERRUPT_ENABLE_ETE_Msk (0x400UL) /*!< ETH INTERRUPT_ENABLE: ETE (Bitfield-Mask: 0x01) */ -#define ETH_INTERRUPT_ENABLE_FBE_Pos (13UL) /*!< ETH INTERRUPT_ENABLE: FBE (Bit 13) */ -#define ETH_INTERRUPT_ENABLE_FBE_Msk (0x2000UL) /*!< ETH INTERRUPT_ENABLE: FBE (Bitfield-Mask: 0x01) */ -#define ETH_INTERRUPT_ENABLE_ERE_Pos (14UL) /*!< ETH INTERRUPT_ENABLE: ERE (Bit 14) */ -#define ETH_INTERRUPT_ENABLE_ERE_Msk (0x4000UL) /*!< ETH INTERRUPT_ENABLE: ERE (Bitfield-Mask: 0x01) */ -#define ETH_INTERRUPT_ENABLE_AIE_Pos (15UL) /*!< ETH INTERRUPT_ENABLE: AIE (Bit 15) */ -#define ETH_INTERRUPT_ENABLE_AIE_Msk (0x8000UL) /*!< ETH INTERRUPT_ENABLE: AIE (Bitfield-Mask: 0x01) */ -#define ETH_INTERRUPT_ENABLE_NIE_Pos (16UL) /*!< ETH INTERRUPT_ENABLE: NIE (Bit 16) */ -#define ETH_INTERRUPT_ENABLE_NIE_Msk (0x10000UL) /*!< ETH INTERRUPT_ENABLE: NIE (Bitfield-Mask: 0x01) */ - -/* ---------------- ETH_MISSED_FRAME_AND_BUFFER_OVERFLOW_COUNTER ---------------- */ -#define ETH_MISSED_FRAME_AND_BUFFER_OVERFLOW_COUNTER_MISFRMCNT_Pos (0UL) /*!< ETH MISSED_FRAME_AND_BUFFER_OVERFLOW_COUNTER: MISFRMCNT (Bit 0) */ -#define ETH_MISSED_FRAME_AND_BUFFER_OVERFLOW_COUNTER_MISFRMCNT_Msk (0xffffUL) /*!< ETH MISSED_FRAME_AND_BUFFER_OVERFLOW_COUNTER: MISFRMCNT (Bitfield-Mask: 0xffff) */ -#define ETH_MISSED_FRAME_AND_BUFFER_OVERFLOW_COUNTER_MISCNTOVF_Pos (16UL) /*!< ETH MISSED_FRAME_AND_BUFFER_OVERFLOW_COUNTER: MISCNTOVF (Bit 16) */ -#define ETH_MISSED_FRAME_AND_BUFFER_OVERFLOW_COUNTER_MISCNTOVF_Msk (0x10000UL) /*!< ETH MISSED_FRAME_AND_BUFFER_OVERFLOW_COUNTER: MISCNTOVF (Bitfield-Mask: 0x01) */ -#define ETH_MISSED_FRAME_AND_BUFFER_OVERFLOW_COUNTER_OVFFRMCNT_Pos (17UL) /*!< ETH MISSED_FRAME_AND_BUFFER_OVERFLOW_COUNTER: OVFFRMCNT (Bit 17) */ -#define ETH_MISSED_FRAME_AND_BUFFER_OVERFLOW_COUNTER_OVFFRMCNT_Msk (0xffe0000UL) /*!< ETH MISSED_FRAME_AND_BUFFER_OVERFLOW_COUNTER: OVFFRMCNT (Bitfield-Mask: 0x7ff) */ -#define ETH_MISSED_FRAME_AND_BUFFER_OVERFLOW_COUNTER_OVFCNTOVF_Pos (28UL) /*!< ETH MISSED_FRAME_AND_BUFFER_OVERFLOW_COUNTER: OVFCNTOVF (Bit 28) */ -#define ETH_MISSED_FRAME_AND_BUFFER_OVERFLOW_COUNTER_OVFCNTOVF_Msk (0x10000000UL) /*!< ETH MISSED_FRAME_AND_BUFFER_OVERFLOW_COUNTER: OVFCNTOVF (Bitfield-Mask: 0x01) */ - -/* -------------------- ETH_RECEIVE_INTERRUPT_WATCHDOG_TIMER -------------------- */ -#define ETH_RECEIVE_INTERRUPT_WATCHDOG_TIMER_RIWT_Pos (0UL) /*!< ETH RECEIVE_INTERRUPT_WATCHDOG_TIMER: RIWT (Bit 0) */ -#define ETH_RECEIVE_INTERRUPT_WATCHDOG_TIMER_RIWT_Msk (0xffUL) /*!< ETH RECEIVE_INTERRUPT_WATCHDOG_TIMER: RIWT (Bitfield-Mask: 0xff) */ - -/* ------------------------------- ETH_AHB_STATUS ------------------------------- */ -#define ETH_AHB_STATUS_AHBMS_Pos (0UL) /*!< ETH AHB_STATUS: AHBMS (Bit 0) */ -#define ETH_AHB_STATUS_AHBMS_Msk (0x1UL) /*!< ETH AHB_STATUS: AHBMS (Bitfield-Mask: 0x01) */ - -/* -------------------- ETH_CURRENT_HOST_TRANSMIT_DESCRIPTOR -------------------- */ -#define ETH_CURRENT_HOST_TRANSMIT_DESCRIPTOR_CURTDESAPTR_Pos (0UL) /*!< ETH CURRENT_HOST_TRANSMIT_DESCRIPTOR: CURTDESAPTR (Bit 0) */ -#define ETH_CURRENT_HOST_TRANSMIT_DESCRIPTOR_CURTDESAPTR_Msk (0xffffffffUL) /*!< ETH CURRENT_HOST_TRANSMIT_DESCRIPTOR: CURTDESAPTR (Bitfield-Mask: 0xffffffff) */ - -/* --------------------- ETH_CURRENT_HOST_RECEIVE_DESCRIPTOR -------------------- */ -#define ETH_CURRENT_HOST_RECEIVE_DESCRIPTOR_CURRDESAPTR_Pos (0UL) /*!< ETH CURRENT_HOST_RECEIVE_DESCRIPTOR: CURRDESAPTR (Bit 0) */ -#define ETH_CURRENT_HOST_RECEIVE_DESCRIPTOR_CURRDESAPTR_Msk (0xffffffffUL) /*!< ETH CURRENT_HOST_RECEIVE_DESCRIPTOR: CURRDESAPTR (Bitfield-Mask: 0xffffffff) */ - -/* ------------------ ETH_CURRENT_HOST_TRANSMIT_BUFFER_ADDRESS ------------------ */ -#define ETH_CURRENT_HOST_TRANSMIT_BUFFER_ADDRESS_CURTBUFAPTR_Pos (0UL) /*!< ETH CURRENT_HOST_TRANSMIT_BUFFER_ADDRESS: CURTBUFAPTR (Bit 0) */ -#define ETH_CURRENT_HOST_TRANSMIT_BUFFER_ADDRESS_CURTBUFAPTR_Msk (0xffffffffUL) /*!< ETH CURRENT_HOST_TRANSMIT_BUFFER_ADDRESS: CURTBUFAPTR (Bitfield-Mask: 0xffffffff) */ - -/* ------------------- ETH_CURRENT_HOST_RECEIVE_BUFFER_ADDRESS ------------------ */ -#define ETH_CURRENT_HOST_RECEIVE_BUFFER_ADDRESS_CURRBUFAPTR_Pos (0UL) /*!< ETH CURRENT_HOST_RECEIVE_BUFFER_ADDRESS: CURRBUFAPTR (Bit 0) */ -#define ETH_CURRENT_HOST_RECEIVE_BUFFER_ADDRESS_CURRBUFAPTR_Msk (0xffffffffUL) /*!< ETH CURRENT_HOST_RECEIVE_BUFFER_ADDRESS: CURRBUFAPTR (Bitfield-Mask: 0xffffffff) */ - -/* ------------------------------- ETH_HW_FEATURE ------------------------------- */ -#define ETH_HW_FEATURE_MIISEL_Pos (0UL) /*!< ETH HW_FEATURE: MIISEL (Bit 0) */ -#define ETH_HW_FEATURE_MIISEL_Msk (0x1UL) /*!< ETH HW_FEATURE: MIISEL (Bitfield-Mask: 0x01) */ -#define ETH_HW_FEATURE_GMIISEL_Pos (1UL) /*!< ETH HW_FEATURE: GMIISEL (Bit 1) */ -#define ETH_HW_FEATURE_GMIISEL_Msk (0x2UL) /*!< ETH HW_FEATURE: GMIISEL (Bitfield-Mask: 0x01) */ -#define ETH_HW_FEATURE_HDSEL_Pos (2UL) /*!< ETH HW_FEATURE: HDSEL (Bit 2) */ -#define ETH_HW_FEATURE_HDSEL_Msk (0x4UL) /*!< ETH HW_FEATURE: HDSEL (Bitfield-Mask: 0x01) */ -#define ETH_HW_FEATURE_EXTHASHEN_Pos (3UL) /*!< ETH HW_FEATURE: EXTHASHEN (Bit 3) */ -#define ETH_HW_FEATURE_EXTHASHEN_Msk (0x8UL) /*!< ETH HW_FEATURE: EXTHASHEN (Bitfield-Mask: 0x01) */ -#define ETH_HW_FEATURE_HASHSEL_Pos (4UL) /*!< ETH HW_FEATURE: HASHSEL (Bit 4) */ -#define ETH_HW_FEATURE_HASHSEL_Msk (0x10UL) /*!< ETH HW_FEATURE: HASHSEL (Bitfield-Mask: 0x01) */ -#define ETH_HW_FEATURE_ADDMACADRSEL_Pos (5UL) /*!< ETH HW_FEATURE: ADDMACADRSEL (Bit 5) */ -#define ETH_HW_FEATURE_ADDMACADRSEL_Msk (0x20UL) /*!< ETH HW_FEATURE: ADDMACADRSEL (Bitfield-Mask: 0x01) */ -#define ETH_HW_FEATURE_PCSSEL_Pos (6UL) /*!< ETH HW_FEATURE: PCSSEL (Bit 6) */ -#define ETH_HW_FEATURE_PCSSEL_Msk (0x40UL) /*!< ETH HW_FEATURE: PCSSEL (Bitfield-Mask: 0x01) */ -#define ETH_HW_FEATURE_L3L4FLTREN_Pos (7UL) /*!< ETH HW_FEATURE: L3L4FLTREN (Bit 7) */ -#define ETH_HW_FEATURE_L3L4FLTREN_Msk (0x80UL) /*!< ETH HW_FEATURE: L3L4FLTREN (Bitfield-Mask: 0x01) */ -#define ETH_HW_FEATURE_SMASEL_Pos (8UL) /*!< ETH HW_FEATURE: SMASEL (Bit 8) */ -#define ETH_HW_FEATURE_SMASEL_Msk (0x100UL) /*!< ETH HW_FEATURE: SMASEL (Bitfield-Mask: 0x01) */ -#define ETH_HW_FEATURE_RWKSEL_Pos (9UL) /*!< ETH HW_FEATURE: RWKSEL (Bit 9) */ -#define ETH_HW_FEATURE_RWKSEL_Msk (0x200UL) /*!< ETH HW_FEATURE: RWKSEL (Bitfield-Mask: 0x01) */ -#define ETH_HW_FEATURE_MGKSEL_Pos (10UL) /*!< ETH HW_FEATURE: MGKSEL (Bit 10) */ -#define ETH_HW_FEATURE_MGKSEL_Msk (0x400UL) /*!< ETH HW_FEATURE: MGKSEL (Bitfield-Mask: 0x01) */ -#define ETH_HW_FEATURE_MMCSEL_Pos (11UL) /*!< ETH HW_FEATURE: MMCSEL (Bit 11) */ -#define ETH_HW_FEATURE_MMCSEL_Msk (0x800UL) /*!< ETH HW_FEATURE: MMCSEL (Bitfield-Mask: 0x01) */ -#define ETH_HW_FEATURE_TSVER1SEL_Pos (12UL) /*!< ETH HW_FEATURE: TSVER1SEL (Bit 12) */ -#define ETH_HW_FEATURE_TSVER1SEL_Msk (0x1000UL) /*!< ETH HW_FEATURE: TSVER1SEL (Bitfield-Mask: 0x01) */ -#define ETH_HW_FEATURE_TSVER2SEL_Pos (13UL) /*!< ETH HW_FEATURE: TSVER2SEL (Bit 13) */ -#define ETH_HW_FEATURE_TSVER2SEL_Msk (0x2000UL) /*!< ETH HW_FEATURE: TSVER2SEL (Bitfield-Mask: 0x01) */ -#define ETH_HW_FEATURE_EEESEL_Pos (14UL) /*!< ETH HW_FEATURE: EEESEL (Bit 14) */ -#define ETH_HW_FEATURE_EEESEL_Msk (0x4000UL) /*!< ETH HW_FEATURE: EEESEL (Bitfield-Mask: 0x01) */ -#define ETH_HW_FEATURE_AVSEL_Pos (15UL) /*!< ETH HW_FEATURE: AVSEL (Bit 15) */ -#define ETH_HW_FEATURE_AVSEL_Msk (0x8000UL) /*!< ETH HW_FEATURE: AVSEL (Bitfield-Mask: 0x01) */ -#define ETH_HW_FEATURE_TXCOESEL_Pos (16UL) /*!< ETH HW_FEATURE: TXCOESEL (Bit 16) */ -#define ETH_HW_FEATURE_TXCOESEL_Msk (0x10000UL) /*!< ETH HW_FEATURE: TXCOESEL (Bitfield-Mask: 0x01) */ -#define ETH_HW_FEATURE_RXTYP1COE_Pos (17UL) /*!< ETH HW_FEATURE: RXTYP1COE (Bit 17) */ -#define ETH_HW_FEATURE_RXTYP1COE_Msk (0x20000UL) /*!< ETH HW_FEATURE: RXTYP1COE (Bitfield-Mask: 0x01) */ -#define ETH_HW_FEATURE_RXTYP2COE_Pos (18UL) /*!< ETH HW_FEATURE: RXTYP2COE (Bit 18) */ -#define ETH_HW_FEATURE_RXTYP2COE_Msk (0x40000UL) /*!< ETH HW_FEATURE: RXTYP2COE (Bitfield-Mask: 0x01) */ -#define ETH_HW_FEATURE_RXFIFOSIZE_Pos (19UL) /*!< ETH HW_FEATURE: RXFIFOSIZE (Bit 19) */ -#define ETH_HW_FEATURE_RXFIFOSIZE_Msk (0x80000UL) /*!< ETH HW_FEATURE: RXFIFOSIZE (Bitfield-Mask: 0x01) */ -#define ETH_HW_FEATURE_RXCHCNT_Pos (20UL) /*!< ETH HW_FEATURE: RXCHCNT (Bit 20) */ -#define ETH_HW_FEATURE_RXCHCNT_Msk (0x300000UL) /*!< ETH HW_FEATURE: RXCHCNT (Bitfield-Mask: 0x03) */ -#define ETH_HW_FEATURE_TXCHCNT_Pos (22UL) /*!< ETH HW_FEATURE: TXCHCNT (Bit 22) */ -#define ETH_HW_FEATURE_TXCHCNT_Msk (0xc00000UL) /*!< ETH HW_FEATURE: TXCHCNT (Bitfield-Mask: 0x03) */ -#define ETH_HW_FEATURE_ENHDESSEL_Pos (24UL) /*!< ETH HW_FEATURE: ENHDESSEL (Bit 24) */ -#define ETH_HW_FEATURE_ENHDESSEL_Msk (0x1000000UL) /*!< ETH HW_FEATURE: ENHDESSEL (Bitfield-Mask: 0x01) */ -#define ETH_HW_FEATURE_INTTSEN_Pos (25UL) /*!< ETH HW_FEATURE: INTTSEN (Bit 25) */ -#define ETH_HW_FEATURE_INTTSEN_Msk (0x2000000UL) /*!< ETH HW_FEATURE: INTTSEN (Bitfield-Mask: 0x01) */ -#define ETH_HW_FEATURE_FLEXIPPSEN_Pos (26UL) /*!< ETH HW_FEATURE: FLEXIPPSEN (Bit 26) */ -#define ETH_HW_FEATURE_FLEXIPPSEN_Msk (0x4000000UL) /*!< ETH HW_FEATURE: FLEXIPPSEN (Bitfield-Mask: 0x01) */ -#define ETH_HW_FEATURE_SAVLANINS_Pos (27UL) /*!< ETH HW_FEATURE: SAVLANINS (Bit 27) */ -#define ETH_HW_FEATURE_SAVLANINS_Msk (0x8000000UL) /*!< ETH HW_FEATURE: SAVLANINS (Bitfield-Mask: 0x01) */ -#define ETH_HW_FEATURE_ACTPHYIF_Pos (28UL) /*!< ETH HW_FEATURE: ACTPHYIF (Bit 28) */ -#define ETH_HW_FEATURE_ACTPHYIF_Msk (0x70000000UL) /*!< ETH HW_FEATURE: ACTPHYIF (Bitfield-Mask: 0x07) */ - - -/* ================================================================================ */ -/* ================ struct 'ECAT0_CON' Position & Mask ================ */ -/* ================================================================================ */ - - -/* -------------------------------- ECAT0_CON_CON ------------------------------- */ -#define ECAT0_CON_CON_ECATRSTEN_Pos (0UL) /*!< ECAT0_CON CON: ECATRSTEN (Bit 0) */ -#define ECAT0_CON_CON_ECATRSTEN_Msk (0x1UL) /*!< ECAT0_CON CON: ECATRSTEN (Bitfield-Mask: 0x01) */ -#define ECAT0_CON_CON_LATCHIN0SEL_Pos (8UL) /*!< ECAT0_CON CON: LATCHIN0SEL (Bit 8) */ -#define ECAT0_CON_CON_LATCHIN0SEL_Msk (0x300UL) /*!< ECAT0_CON CON: LATCHIN0SEL (Bitfield-Mask: 0x03) */ -#define ECAT0_CON_CON_LATCHIN0_Pos (11UL) /*!< ECAT0_CON CON: LATCHIN0 (Bit 11) */ -#define ECAT0_CON_CON_LATCHIN0_Msk (0x800UL) /*!< ECAT0_CON CON: LATCHIN0 (Bitfield-Mask: 0x01) */ -#define ECAT0_CON_CON_LATCHIN1SEL_Pos (12UL) /*!< ECAT0_CON CON: LATCHIN1SEL (Bit 12) */ -#define ECAT0_CON_CON_LATCHIN1SEL_Msk (0x3000UL) /*!< ECAT0_CON CON: LATCHIN1SEL (Bitfield-Mask: 0x03) */ -#define ECAT0_CON_CON_LATCHIN1_Pos (15UL) /*!< ECAT0_CON CON: LATCHIN1 (Bit 15) */ -#define ECAT0_CON_CON_LATCHIN1_Msk (0x8000UL) /*!< ECAT0_CON CON: LATCHIN1 (Bitfield-Mask: 0x01) */ -#define ECAT0_CON_CON_PHYOFFSET_Pos (16UL) /*!< ECAT0_CON CON: PHYOFFSET (Bit 16) */ -#define ECAT0_CON_CON_PHYOFFSET_Msk (0x1f0000UL) /*!< ECAT0_CON CON: PHYOFFSET (Bitfield-Mask: 0x1f) */ -#define ECAT0_CON_CON_MDIO_Pos (22UL) /*!< ECAT0_CON CON: MDIO (Bit 22) */ -#define ECAT0_CON_CON_MDIO_Msk (0xc00000UL) /*!< ECAT0_CON CON: MDIO (Bitfield-Mask: 0x03) */ - -/* ------------------------------- ECAT0_CON_CONP0 ------------------------------ */ -#define ECAT0_CON_CONP0_RXD0_Pos (0UL) /*!< ECAT0_CON CONP0: RXD0 (Bit 0) */ -#define ECAT0_CON_CONP0_RXD0_Msk (0x3UL) /*!< ECAT0_CON CONP0: RXD0 (Bitfield-Mask: 0x03) */ -#define ECAT0_CON_CONP0_RXD1_Pos (2UL) /*!< ECAT0_CON CONP0: RXD1 (Bit 2) */ -#define ECAT0_CON_CONP0_RXD1_Msk (0xcUL) /*!< ECAT0_CON CONP0: RXD1 (Bitfield-Mask: 0x03) */ -#define ECAT0_CON_CONP0_RXD2_Pos (4UL) /*!< ECAT0_CON CONP0: RXD2 (Bit 4) */ -#define ECAT0_CON_CONP0_RXD2_Msk (0x30UL) /*!< ECAT0_CON CONP0: RXD2 (Bitfield-Mask: 0x03) */ -#define ECAT0_CON_CONP0_RXD3_Pos (6UL) /*!< ECAT0_CON CONP0: RXD3 (Bit 6) */ -#define ECAT0_CON_CONP0_RXD3_Msk (0xc0UL) /*!< ECAT0_CON CONP0: RXD3 (Bitfield-Mask: 0x03) */ -#define ECAT0_CON_CONP0_RX_ERR_Pos (8UL) /*!< ECAT0_CON CONP0: RX_ERR (Bit 8) */ -#define ECAT0_CON_CONP0_RX_ERR_Msk (0x300UL) /*!< ECAT0_CON CONP0: RX_ERR (Bitfield-Mask: 0x03) */ -#define ECAT0_CON_CONP0_RX_DV_Pos (10UL) /*!< ECAT0_CON CONP0: RX_DV (Bit 10) */ -#define ECAT0_CON_CONP0_RX_DV_Msk (0xc00UL) /*!< ECAT0_CON CONP0: RX_DV (Bitfield-Mask: 0x03) */ -#define ECAT0_CON_CONP0_RX_CLK_Pos (12UL) /*!< ECAT0_CON CONP0: RX_CLK (Bit 12) */ -#define ECAT0_CON_CONP0_RX_CLK_Msk (0x3000UL) /*!< ECAT0_CON CONP0: RX_CLK (Bitfield-Mask: 0x03) */ -#define ECAT0_CON_CONP0_LINK_Pos (16UL) /*!< ECAT0_CON CONP0: LINK (Bit 16) */ -#define ECAT0_CON_CONP0_LINK_Msk (0x30000UL) /*!< ECAT0_CON CONP0: LINK (Bitfield-Mask: 0x03) */ -#define ECAT0_CON_CONP0_TX_CLK_Pos (28UL) /*!< ECAT0_CON CONP0: TX_CLK (Bit 28) */ -#define ECAT0_CON_CONP0_TX_CLK_Msk (0x30000000UL) /*!< ECAT0_CON CONP0: TX_CLK (Bitfield-Mask: 0x03) */ -#define ECAT0_CON_CONP0_TX_SHIFT_Pos (30UL) /*!< ECAT0_CON CONP0: TX_SHIFT (Bit 30) */ -#define ECAT0_CON_CONP0_TX_SHIFT_Msk (0xc0000000UL) /*!< ECAT0_CON CONP0: TX_SHIFT (Bitfield-Mask: 0x03) */ - -/* ------------------------------- ECAT0_CON_CONP1 ------------------------------ */ -#define ECAT0_CON_CONP1_RXD0_Pos (0UL) /*!< ECAT0_CON CONP1: RXD0 (Bit 0) */ -#define ECAT0_CON_CONP1_RXD0_Msk (0x3UL) /*!< ECAT0_CON CONP1: RXD0 (Bitfield-Mask: 0x03) */ -#define ECAT0_CON_CONP1_RXD1_Pos (2UL) /*!< ECAT0_CON CONP1: RXD1 (Bit 2) */ -#define ECAT0_CON_CONP1_RXD1_Msk (0xcUL) /*!< ECAT0_CON CONP1: RXD1 (Bitfield-Mask: 0x03) */ -#define ECAT0_CON_CONP1_RXD2_Pos (4UL) /*!< ECAT0_CON CONP1: RXD2 (Bit 4) */ -#define ECAT0_CON_CONP1_RXD2_Msk (0x30UL) /*!< ECAT0_CON CONP1: RXD2 (Bitfield-Mask: 0x03) */ -#define ECAT0_CON_CONP1_RXD3_Pos (6UL) /*!< ECAT0_CON CONP1: RXD3 (Bit 6) */ -#define ECAT0_CON_CONP1_RXD3_Msk (0xc0UL) /*!< ECAT0_CON CONP1: RXD3 (Bitfield-Mask: 0x03) */ -#define ECAT0_CON_CONP1_RX_ERR_Pos (8UL) /*!< ECAT0_CON CONP1: RX_ERR (Bit 8) */ -#define ECAT0_CON_CONP1_RX_ERR_Msk (0x300UL) /*!< ECAT0_CON CONP1: RX_ERR (Bitfield-Mask: 0x03) */ -#define ECAT0_CON_CONP1_RX_DV_Pos (10UL) /*!< ECAT0_CON CONP1: RX_DV (Bit 10) */ -#define ECAT0_CON_CONP1_RX_DV_Msk (0xc00UL) /*!< ECAT0_CON CONP1: RX_DV (Bitfield-Mask: 0x03) */ -#define ECAT0_CON_CONP1_RX_CLK_Pos (12UL) /*!< ECAT0_CON CONP1: RX_CLK (Bit 12) */ -#define ECAT0_CON_CONP1_RX_CLK_Msk (0x3000UL) /*!< ECAT0_CON CONP1: RX_CLK (Bitfield-Mask: 0x03) */ -#define ECAT0_CON_CONP1_LINK_Pos (16UL) /*!< ECAT0_CON CONP1: LINK (Bit 16) */ -#define ECAT0_CON_CONP1_LINK_Msk (0x30000UL) /*!< ECAT0_CON CONP1: LINK (Bitfield-Mask: 0x03) */ -#define ECAT0_CON_CONP1_TX_CLK_Pos (28UL) /*!< ECAT0_CON CONP1: TX_CLK (Bit 28) */ -#define ECAT0_CON_CONP1_TX_CLK_Msk (0x30000000UL) /*!< ECAT0_CON CONP1: TX_CLK (Bitfield-Mask: 0x03) */ -#define ECAT0_CON_CONP1_TX_SHIFT_Pos (30UL) /*!< ECAT0_CON CONP1: TX_SHIFT (Bit 30) */ -#define ECAT0_CON_CONP1_TX_SHIFT_Msk (0xc0000000UL) /*!< ECAT0_CON CONP1: TX_SHIFT (Bitfield-Mask: 0x03) */ - - -/* ================================================================================ */ -/* ================ Group 'ECAT' Position & Mask ================ */ -/* ================================================================================ */ - - -/* ---------------------------------- ECAT_TYPE --------------------------------- */ -#define ECAT_TYPE_Type_Pos (0UL) /*!< ECAT TYPE: Type (Bit 0) */ -#define ECAT_TYPE_Type_Msk (0xffUL) /*!< ECAT TYPE: Type (Bitfield-Mask: 0xff) */ - -/* -------------------------------- ECAT_REVISION ------------------------------- */ -#define ECAT_REVISION_Revision_Pos (0UL) /*!< ECAT REVISION: Revision (Bit 0) */ -#define ECAT_REVISION_Revision_Msk (0xffUL) /*!< ECAT REVISION: Revision (Bitfield-Mask: 0xff) */ - -/* --------------------------------- ECAT_BUILD --------------------------------- */ -#define ECAT_BUILD_BUILD_Pos (0UL) /*!< ECAT BUILD: BUILD (Bit 0) */ -#define ECAT_BUILD_BUILD_Msk (0xffffUL) /*!< ECAT BUILD: BUILD (Bitfield-Mask: 0xffff) */ - -/* -------------------------------- ECAT_FMMU_NUM ------------------------------- */ -#define ECAT_FMMU_NUM_NUM_FMMU_Pos (0UL) /*!< ECAT FMMU_NUM: NUM_FMMU (Bit 0) */ -#define ECAT_FMMU_NUM_NUM_FMMU_Msk (0xffUL) /*!< ECAT FMMU_NUM: NUM_FMMU (Bitfield-Mask: 0xff) */ - -/* ------------------------------ ECAT_SYNC_MANAGER ----------------------------- */ -#define ECAT_SYNC_MANAGER_NUM_SM_Pos (0UL) /*!< ECAT SYNC_MANAGER: NUM_SM (Bit 0) */ -#define ECAT_SYNC_MANAGER_NUM_SM_Msk (0xffUL) /*!< ECAT SYNC_MANAGER: NUM_SM (Bitfield-Mask: 0xff) */ - -/* -------------------------------- ECAT_RAM_SIZE ------------------------------- */ -#define ECAT_RAM_SIZE_RAM_Size_Pos (0UL) /*!< ECAT RAM_SIZE: RAM_Size (Bit 0) */ -#define ECAT_RAM_SIZE_RAM_Size_Msk (0xffUL) /*!< ECAT RAM_SIZE: RAM_Size (Bitfield-Mask: 0xff) */ - -/* ------------------------------- ECAT_PORT_DESC ------------------------------- */ -#define ECAT_PORT_DESC_Port0_Pos (0UL) /*!< ECAT PORT_DESC: Port0 (Bit 0) */ -#define ECAT_PORT_DESC_Port0_Msk (0x3UL) /*!< ECAT PORT_DESC: Port0 (Bitfield-Mask: 0x03) */ -#define ECAT_PORT_DESC_Port1_Pos (2UL) /*!< ECAT PORT_DESC: Port1 (Bit 2) */ -#define ECAT_PORT_DESC_Port1_Msk (0xcUL) /*!< ECAT PORT_DESC: Port1 (Bitfield-Mask: 0x03) */ -#define ECAT_PORT_DESC_Port2_Pos (4UL) /*!< ECAT PORT_DESC: Port2 (Bit 4) */ -#define ECAT_PORT_DESC_Port2_Msk (0x30UL) /*!< ECAT PORT_DESC: Port2 (Bitfield-Mask: 0x03) */ -#define ECAT_PORT_DESC_Port3_Pos (6UL) /*!< ECAT PORT_DESC: Port3 (Bit 6) */ -#define ECAT_PORT_DESC_Port3_Msk (0xc0UL) /*!< ECAT PORT_DESC: Port3 (Bitfield-Mask: 0x03) */ - -/* -------------------------------- ECAT_FEATURE -------------------------------- */ -#define ECAT_FEATURE_FMMU_Pos (0UL) /*!< ECAT FEATURE: FMMU (Bit 0) */ -#define ECAT_FEATURE_FMMU_Msk (0x1UL) /*!< ECAT FEATURE: FMMU (Bitfield-Mask: 0x01) */ -#define ECAT_FEATURE_CLKS_Pos (2UL) /*!< ECAT FEATURE: CLKS (Bit 2) */ -#define ECAT_FEATURE_CLKS_Msk (0x4UL) /*!< ECAT FEATURE: CLKS (Bitfield-Mask: 0x01) */ -#define ECAT_FEATURE_CLKS_W_Pos (3UL) /*!< ECAT FEATURE: CLKS_W (Bit 3) */ -#define ECAT_FEATURE_CLKS_W_Msk (0x8UL) /*!< ECAT FEATURE: CLKS_W (Bitfield-Mask: 0x01) */ -#define ECAT_FEATURE_LJ_EBUS_Pos (4UL) /*!< ECAT FEATURE: LJ_EBUS (Bit 4) */ -#define ECAT_FEATURE_LJ_EBUS_Msk (0x10UL) /*!< ECAT FEATURE: LJ_EBUS (Bitfield-Mask: 0x01) */ -#define ECAT_FEATURE_ELD_EBUS_Pos (5UL) /*!< ECAT FEATURE: ELD_EBUS (Bit 5) */ -#define ECAT_FEATURE_ELD_EBUS_Msk (0x20UL) /*!< ECAT FEATURE: ELD_EBUS (Bitfield-Mask: 0x01) */ -#define ECAT_FEATURE_ELD_MII_Pos (6UL) /*!< ECAT FEATURE: ELD_MII (Bit 6) */ -#define ECAT_FEATURE_ELD_MII_Msk (0x40UL) /*!< ECAT FEATURE: ELD_MII (Bitfield-Mask: 0x01) */ -#define ECAT_FEATURE_SH_FCSE_Pos (7UL) /*!< ECAT FEATURE: SH_FCSE (Bit 7) */ -#define ECAT_FEATURE_SH_FCSE_Msk (0x80UL) /*!< ECAT FEATURE: SH_FCSE (Bitfield-Mask: 0x01) */ -#define ECAT_FEATURE_EDC_SYNCA_Pos (8UL) /*!< ECAT FEATURE: EDC_SYNCA (Bit 8) */ -#define ECAT_FEATURE_EDC_SYNCA_Msk (0x100UL) /*!< ECAT FEATURE: EDC_SYNCA (Bitfield-Mask: 0x01) */ -#define ECAT_FEATURE_LRW_CS_Pos (9UL) /*!< ECAT FEATURE: LRW_CS (Bit 9) */ -#define ECAT_FEATURE_LRW_CS_Msk (0x200UL) /*!< ECAT FEATURE: LRW_CS (Bitfield-Mask: 0x01) */ -#define ECAT_FEATURE_RW_CS_Pos (10UL) /*!< ECAT FEATURE: RW_CS (Bit 10) */ -#define ECAT_FEATURE_RW_CS_Msk (0x400UL) /*!< ECAT FEATURE: RW_CS (Bitfield-Mask: 0x01) */ -#define ECAT_FEATURE_FX_CONF_Pos (11UL) /*!< ECAT FEATURE: FX_CONF (Bit 11) */ -#define ECAT_FEATURE_FX_CONF_Msk (0x800UL) /*!< ECAT FEATURE: FX_CONF (Bitfield-Mask: 0x01) */ - -/* ------------------------------ ECAT_STATION_ADR ------------------------------ */ -#define ECAT_STATION_ADR_NODE_ADDR_Pos (0UL) /*!< ECAT STATION_ADR: NODE_ADDR (Bit 0) */ -#define ECAT_STATION_ADR_NODE_ADDR_Msk (0xffffUL) /*!< ECAT STATION_ADR: NODE_ADDR (Bitfield-Mask: 0xffff) */ - -/* ----------------------------- ECAT_STATION_ALIAS ----------------------------- */ -#define ECAT_STATION_ALIAS_ALIAS_ADDR_Pos (0UL) /*!< ECAT STATION_ALIAS: ALIAS_ADDR (Bit 0) */ -#define ECAT_STATION_ALIAS_ALIAS_ADDR_Msk (0xffffUL) /*!< ECAT STATION_ALIAS: ALIAS_ADDR (Bitfield-Mask: 0xffff) */ - -/* ----------------------------- ECAT_WR_REG_ENABLE ----------------------------- */ -#define ECAT_WR_REG_ENABLE_WR_REG_EN_Pos (0UL) /*!< ECAT WR_REG_ENABLE: WR_REG_EN (Bit 0) */ -#define ECAT_WR_REG_ENABLE_WR_REG_EN_Msk (0x1UL) /*!< ECAT WR_REG_ENABLE: WR_REG_EN (Bitfield-Mask: 0x01) */ - -/* ----------------------------- ECAT_WR_REG_PROTECT ---------------------------- */ -#define ECAT_WR_REG_PROTECT_WR_REG_P_Pos (0UL) /*!< ECAT WR_REG_PROTECT: WR_REG_P (Bit 0) */ -#define ECAT_WR_REG_PROTECT_WR_REG_P_Msk (0x1UL) /*!< ECAT WR_REG_PROTECT: WR_REG_P (Bitfield-Mask: 0x01) */ - -/* ----------------------------- ECAT_ESC_WR_ENABLE ----------------------------- */ -#define ECAT_ESC_WR_ENABLE_ESC_WR_PROT_Pos (0UL) /*!< ECAT ESC_WR_ENABLE: ESC_WR_PROT (Bit 0) */ -#define ECAT_ESC_WR_ENABLE_ESC_WR_PROT_Msk (0x1UL) /*!< ECAT ESC_WR_ENABLE: ESC_WR_PROT (Bitfield-Mask: 0x01) */ - -/* ----------------------------- ECAT_ESC_WR_PROTECT ---------------------------- */ -#define ECAT_ESC_WR_PROTECT_ESC_WR_PROT_Pos (0UL) /*!< ECAT ESC_WR_PROTECT: ESC_WR_PROT (Bit 0) */ -#define ECAT_ESC_WR_PROTECT_ESC_WR_PROT_Msk (0x1UL) /*!< ECAT ESC_WR_PROTECT: ESC_WR_PROT (Bitfield-Mask: 0x01) */ - -/* ----------------------------- ECAT_ESC_RESET_ECAT ---------------------------- */ -#define ECAT_ESC_RESET_ECAT_RESET_CMD_WRITEMode_Pos (0UL) /*!< ECAT ESC_RESET_ECAT: RESET_CMD_WRITEMode (Bit 0) */ -#define ECAT_ESC_RESET_ECAT_RESET_CMD_WRITEMode_Msk (0xffUL) /*!< ECAT ESC_RESET_ECAT: RESET_CMD_WRITEMode (Bitfield-Mask: 0xff) */ - -/* ----------------------------- ECAT_ESC_RESET_ECAT ---------------------------- */ -#define ECAT_ESC_RESET_ECAT_RESET_CMD_STATE_READMode_Pos (0UL) /*!< ECAT ESC_RESET_ECAT: RESET_CMD_STATE_READMode (Bit 0) */ -#define ECAT_ESC_RESET_ECAT_RESET_CMD_STATE_READMode_Msk (0x3UL) /*!< ECAT ESC_RESET_ECAT: RESET_CMD_STATE_READMode (Bitfield-Mask: 0x03) */ - -/* ----------------------------- ECAT_ESC_RESET_PDI ----------------------------- */ -#define ECAT_ESC_RESET_PDI_RESET_CMD_WRITEMode_Pos (0UL) /*!< ECAT ESC_RESET_PDI: RESET_CMD_WRITEMode (Bit 0) */ -#define ECAT_ESC_RESET_PDI_RESET_CMD_WRITEMode_Msk (0xffUL) /*!< ECAT ESC_RESET_PDI: RESET_CMD_WRITEMode (Bitfield-Mask: 0xff) */ - -/* ----------------------------- ECAT_ESC_RESET_PDI ----------------------------- */ -#define ECAT_ESC_RESET_PDI_RESET_CMD_STATE_READMode_Pos (0UL) /*!< ECAT ESC_RESET_PDI: RESET_CMD_STATE_READMode (Bit 0) */ -#define ECAT_ESC_RESET_PDI_RESET_CMD_STATE_READMode_Msk (0x3UL) /*!< ECAT ESC_RESET_PDI: RESET_CMD_STATE_READMode (Bitfield-Mask: 0x03) */ - -/* ----------------------------- ECAT_ESC_DL_CONTROL ---------------------------- */ -#define ECAT_ESC_DL_CONTROL_FR_Pos (0UL) /*!< ECAT ESC_DL_CONTROL: FR (Bit 0) */ -#define ECAT_ESC_DL_CONTROL_FR_Msk (0x1UL) /*!< ECAT ESC_DL_CONTROL: FR (Bitfield-Mask: 0x01) */ -#define ECAT_ESC_DL_CONTROL_TEMP_Pos (1UL) /*!< ECAT ESC_DL_CONTROL: TEMP (Bit 1) */ -#define ECAT_ESC_DL_CONTROL_TEMP_Msk (0x2UL) /*!< ECAT ESC_DL_CONTROL: TEMP (Bitfield-Mask: 0x01) */ -#define ECAT_ESC_DL_CONTROL_LP0_Pos (8UL) /*!< ECAT ESC_DL_CONTROL: LP0 (Bit 8) */ -#define ECAT_ESC_DL_CONTROL_LP0_Msk (0x300UL) /*!< ECAT ESC_DL_CONTROL: LP0 (Bitfield-Mask: 0x03) */ -#define ECAT_ESC_DL_CONTROL_LP1_Pos (10UL) /*!< ECAT ESC_DL_CONTROL: LP1 (Bit 10) */ -#define ECAT_ESC_DL_CONTROL_LP1_Msk (0xc00UL) /*!< ECAT ESC_DL_CONTROL: LP1 (Bitfield-Mask: 0x03) */ -#define ECAT_ESC_DL_CONTROL_LP2_Pos (12UL) /*!< ECAT ESC_DL_CONTROL: LP2 (Bit 12) */ -#define ECAT_ESC_DL_CONTROL_LP2_Msk (0x3000UL) /*!< ECAT ESC_DL_CONTROL: LP2 (Bitfield-Mask: 0x03) */ -#define ECAT_ESC_DL_CONTROL_LP3_Pos (14UL) /*!< ECAT ESC_DL_CONTROL: LP3 (Bit 14) */ -#define ECAT_ESC_DL_CONTROL_LP3_Msk (0xc000UL) /*!< ECAT ESC_DL_CONTROL: LP3 (Bitfield-Mask: 0x03) */ -#define ECAT_ESC_DL_CONTROL_RX_FIFO_SIZE_Pos (16UL) /*!< ECAT ESC_DL_CONTROL: RX_FIFO_SIZE (Bit 16) */ -#define ECAT_ESC_DL_CONTROL_RX_FIFO_SIZE_Msk (0x70000UL) /*!< ECAT ESC_DL_CONTROL: RX_FIFO_SIZE (Bitfield-Mask: 0x07) */ -#define ECAT_ESC_DL_CONTROL_LJ_Pos (19UL) /*!< ECAT ESC_DL_CONTROL: LJ (Bit 19) */ -#define ECAT_ESC_DL_CONTROL_LJ_Msk (0x80000UL) /*!< ECAT ESC_DL_CONTROL: LJ (Bitfield-Mask: 0x01) */ -#define ECAT_ESC_DL_CONTROL_RLD_ST_Pos (22UL) /*!< ECAT ESC_DL_CONTROL: RLD_ST (Bit 22) */ -#define ECAT_ESC_DL_CONTROL_RLD_ST_Msk (0x400000UL) /*!< ECAT ESC_DL_CONTROL: RLD_ST (Bitfield-Mask: 0x01) */ -#define ECAT_ESC_DL_CONTROL_S_ALIAS_Pos (24UL) /*!< ECAT ESC_DL_CONTROL: S_ALIAS (Bit 24) */ -#define ECAT_ESC_DL_CONTROL_S_ALIAS_Msk (0x1000000UL) /*!< ECAT ESC_DL_CONTROL: S_ALIAS (Bitfield-Mask: 0x01) */ - -/* --------------------------- ECAT_PHYSICAL_RW_OFFSET -------------------------- */ -#define ECAT_PHYSICAL_RW_OFFSET_OFFSET_Pos (0UL) /*!< ECAT PHYSICAL_RW_OFFSET: OFFSET (Bit 0) */ -#define ECAT_PHYSICAL_RW_OFFSET_OFFSET_Msk (0xffffUL) /*!< ECAT PHYSICAL_RW_OFFSET: OFFSET (Bitfield-Mask: 0xffff) */ - -/* ----------------------------- ECAT_ESC_DL_STATUS ----------------------------- */ -#define ECAT_ESC_DL_STATUS_PDI_EEPROM_Pos (0UL) /*!< ECAT ESC_DL_STATUS: PDI_EEPROM (Bit 0) */ -#define ECAT_ESC_DL_STATUS_PDI_EEPROM_Msk (0x1UL) /*!< ECAT ESC_DL_STATUS: PDI_EEPROM (Bitfield-Mask: 0x01) */ -#define ECAT_ESC_DL_STATUS_PDI_WDT_S_Pos (1UL) /*!< ECAT ESC_DL_STATUS: PDI_WDT_S (Bit 1) */ -#define ECAT_ESC_DL_STATUS_PDI_WDT_S_Msk (0x2UL) /*!< ECAT ESC_DL_STATUS: PDI_WDT_S (Bitfield-Mask: 0x01) */ -#define ECAT_ESC_DL_STATUS_ELD_Pos (2UL) /*!< ECAT ESC_DL_STATUS: ELD (Bit 2) */ -#define ECAT_ESC_DL_STATUS_ELD_Msk (0x4UL) /*!< ECAT ESC_DL_STATUS: ELD (Bitfield-Mask: 0x01) */ -#define ECAT_ESC_DL_STATUS_LINK_P0_Pos (4UL) /*!< ECAT ESC_DL_STATUS: LINK_P0 (Bit 4) */ -#define ECAT_ESC_DL_STATUS_LINK_P0_Msk (0x10UL) /*!< ECAT ESC_DL_STATUS: LINK_P0 (Bitfield-Mask: 0x01) */ -#define ECAT_ESC_DL_STATUS_LINK_P1_Pos (5UL) /*!< ECAT ESC_DL_STATUS: LINK_P1 (Bit 5) */ -#define ECAT_ESC_DL_STATUS_LINK_P1_Msk (0x20UL) /*!< ECAT ESC_DL_STATUS: LINK_P1 (Bitfield-Mask: 0x01) */ -#define ECAT_ESC_DL_STATUS_LINK_P2_Pos (6UL) /*!< ECAT ESC_DL_STATUS: LINK_P2 (Bit 6) */ -#define ECAT_ESC_DL_STATUS_LINK_P2_Msk (0x40UL) /*!< ECAT ESC_DL_STATUS: LINK_P2 (Bitfield-Mask: 0x01) */ -#define ECAT_ESC_DL_STATUS_LINK_P3_Pos (7UL) /*!< ECAT ESC_DL_STATUS: LINK_P3 (Bit 7) */ -#define ECAT_ESC_DL_STATUS_LINK_P3_Msk (0x80UL) /*!< ECAT ESC_DL_STATUS: LINK_P3 (Bitfield-Mask: 0x01) */ -#define ECAT_ESC_DL_STATUS_LP0_Pos (8UL) /*!< ECAT ESC_DL_STATUS: LP0 (Bit 8) */ -#define ECAT_ESC_DL_STATUS_LP0_Msk (0x100UL) /*!< ECAT ESC_DL_STATUS: LP0 (Bitfield-Mask: 0x01) */ -#define ECAT_ESC_DL_STATUS_COM_P0_Pos (9UL) /*!< ECAT ESC_DL_STATUS: COM_P0 (Bit 9) */ -#define ECAT_ESC_DL_STATUS_COM_P0_Msk (0x200UL) /*!< ECAT ESC_DL_STATUS: COM_P0 (Bitfield-Mask: 0x01) */ -#define ECAT_ESC_DL_STATUS_LP1_Pos (10UL) /*!< ECAT ESC_DL_STATUS: LP1 (Bit 10) */ -#define ECAT_ESC_DL_STATUS_LP1_Msk (0x400UL) /*!< ECAT ESC_DL_STATUS: LP1 (Bitfield-Mask: 0x01) */ -#define ECAT_ESC_DL_STATUS_COM_P1_Pos (11UL) /*!< ECAT ESC_DL_STATUS: COM_P1 (Bit 11) */ -#define ECAT_ESC_DL_STATUS_COM_P1_Msk (0x800UL) /*!< ECAT ESC_DL_STATUS: COM_P1 (Bitfield-Mask: 0x01) */ -#define ECAT_ESC_DL_STATUS_LP2_Pos (12UL) /*!< ECAT ESC_DL_STATUS: LP2 (Bit 12) */ -#define ECAT_ESC_DL_STATUS_LP2_Msk (0x1000UL) /*!< ECAT ESC_DL_STATUS: LP2 (Bitfield-Mask: 0x01) */ -#define ECAT_ESC_DL_STATUS_COM_P2_Pos (13UL) /*!< ECAT ESC_DL_STATUS: COM_P2 (Bit 13) */ -#define ECAT_ESC_DL_STATUS_COM_P2_Msk (0x2000UL) /*!< ECAT ESC_DL_STATUS: COM_P2 (Bitfield-Mask: 0x01) */ -#define ECAT_ESC_DL_STATUS_LP3_Pos (14UL) /*!< ECAT ESC_DL_STATUS: LP3 (Bit 14) */ -#define ECAT_ESC_DL_STATUS_LP3_Msk (0x4000UL) /*!< ECAT ESC_DL_STATUS: LP3 (Bitfield-Mask: 0x01) */ -#define ECAT_ESC_DL_STATUS_COM_P3_Pos (15UL) /*!< ECAT ESC_DL_STATUS: COM_P3 (Bit 15) */ -#define ECAT_ESC_DL_STATUS_COM_P3_Msk (0x8000UL) /*!< ECAT ESC_DL_STATUS: COM_P3 (Bitfield-Mask: 0x01) */ - -/* ------------------------------- ECAT_AL_CONTROL ------------------------------ */ -#define ECAT_AL_CONTROL_IST_Pos (0UL) /*!< ECAT AL_CONTROL: IST (Bit 0) */ -#define ECAT_AL_CONTROL_IST_Msk (0xfUL) /*!< ECAT AL_CONTROL: IST (Bitfield-Mask: 0x0f) */ -#define ECAT_AL_CONTROL_EIA_Pos (4UL) /*!< ECAT AL_CONTROL: EIA (Bit 4) */ -#define ECAT_AL_CONTROL_EIA_Msk (0x10UL) /*!< ECAT AL_CONTROL: EIA (Bitfield-Mask: 0x01) */ -#define ECAT_AL_CONTROL_DID_Pos (5UL) /*!< ECAT AL_CONTROL: DID (Bit 5) */ -#define ECAT_AL_CONTROL_DID_Msk (0x20UL) /*!< ECAT AL_CONTROL: DID (Bitfield-Mask: 0x01) */ - -/* ------------------------------- ECAT_AL_STATUS ------------------------------- */ -#define ECAT_AL_STATUS_STATE_Pos (0UL) /*!< ECAT AL_STATUS: STATE (Bit 0) */ -#define ECAT_AL_STATUS_STATE_Msk (0xfUL) /*!< ECAT AL_STATUS: STATE (Bitfield-Mask: 0x0f) */ -#define ECAT_AL_STATUS_ERRI_Pos (4UL) /*!< ECAT AL_STATUS: ERRI (Bit 4) */ -#define ECAT_AL_STATUS_ERRI_Msk (0x10UL) /*!< ECAT AL_STATUS: ERRI (Bitfield-Mask: 0x01) */ -#define ECAT_AL_STATUS_DID_Pos (5UL) /*!< ECAT AL_STATUS: DID (Bit 5) */ -#define ECAT_AL_STATUS_DID_Msk (0x20UL) /*!< ECAT AL_STATUS: DID (Bitfield-Mask: 0x01) */ - -/* ----------------------------- ECAT_AL_STATUS_CODE ---------------------------- */ -#define ECAT_AL_STATUS_CODE_AL_S_CODE_Pos (0UL) /*!< ECAT AL_STATUS_CODE: AL_S_CODE (Bit 0) */ -#define ECAT_AL_STATUS_CODE_AL_S_CODE_Msk (0xffffUL) /*!< ECAT AL_STATUS_CODE: AL_S_CODE (Bitfield-Mask: 0xffff) */ - -/* -------------------------------- ECAT_RUN_LED -------------------------------- */ -#define ECAT_RUN_LED_LED_CODE_Pos (0UL) /*!< ECAT RUN_LED: LED_CODE (Bit 0) */ -#define ECAT_RUN_LED_LED_CODE_Msk (0xfUL) /*!< ECAT RUN_LED: LED_CODE (Bitfield-Mask: 0x0f) */ -#define ECAT_RUN_LED_EN_OVERR_Pos (4UL) /*!< ECAT RUN_LED: EN_OVERR (Bit 4) */ -#define ECAT_RUN_LED_EN_OVERR_Msk (0x10UL) /*!< ECAT RUN_LED: EN_OVERR (Bitfield-Mask: 0x01) */ - -/* -------------------------------- ECAT_ERR_LED -------------------------------- */ -#define ECAT_ERR_LED_LED_CODE_Pos (0UL) /*!< ECAT ERR_LED: LED_CODE (Bit 0) */ -#define ECAT_ERR_LED_LED_CODE_Msk (0xfUL) /*!< ECAT ERR_LED: LED_CODE (Bitfield-Mask: 0x0f) */ -#define ECAT_ERR_LED_EN_OVERR_Pos (4UL) /*!< ECAT ERR_LED: EN_OVERR (Bit 4) */ -#define ECAT_ERR_LED_EN_OVERR_Msk (0x10UL) /*!< ECAT ERR_LED: EN_OVERR (Bitfield-Mask: 0x01) */ - -/* ------------------------------ ECAT_PDI_CONTROL ------------------------------ */ -#define ECAT_PDI_CONTROL_PDI_Pos (0UL) /*!< ECAT PDI_CONTROL: PDI (Bit 0) */ -#define ECAT_PDI_CONTROL_PDI_Msk (0xffUL) /*!< ECAT PDI_CONTROL: PDI (Bitfield-Mask: 0xff) */ - -/* ------------------------------- ECAT_ESC_CONFIG ------------------------------ */ -#define ECAT_ESC_CONFIG_EMUL_Pos (0UL) /*!< ECAT ESC_CONFIG: EMUL (Bit 0) */ -#define ECAT_ESC_CONFIG_EMUL_Msk (0x1UL) /*!< ECAT ESC_CONFIG: EMUL (Bitfield-Mask: 0x01) */ -#define ECAT_ESC_CONFIG_EHLD_Pos (1UL) /*!< ECAT ESC_CONFIG: EHLD (Bit 1) */ -#define ECAT_ESC_CONFIG_EHLD_Msk (0x2UL) /*!< ECAT ESC_CONFIG: EHLD (Bitfield-Mask: 0x01) */ -#define ECAT_ESC_CONFIG_CLKS_OUT_Pos (2UL) /*!< ECAT ESC_CONFIG: CLKS_OUT (Bit 2) */ -#define ECAT_ESC_CONFIG_CLKS_OUT_Msk (0x4UL) /*!< ECAT ESC_CONFIG: CLKS_OUT (Bitfield-Mask: 0x01) */ -#define ECAT_ESC_CONFIG_CLKS_IN_Pos (3UL) /*!< ECAT ESC_CONFIG: CLKS_IN (Bit 3) */ -#define ECAT_ESC_CONFIG_CLKS_IN_Msk (0x8UL) /*!< ECAT ESC_CONFIG: CLKS_IN (Bitfield-Mask: 0x01) */ -#define ECAT_ESC_CONFIG_EHLD_P0_Pos (4UL) /*!< ECAT ESC_CONFIG: EHLD_P0 (Bit 4) */ -#define ECAT_ESC_CONFIG_EHLD_P0_Msk (0x10UL) /*!< ECAT ESC_CONFIG: EHLD_P0 (Bitfield-Mask: 0x01) */ -#define ECAT_ESC_CONFIG_EHLD_P1_Pos (5UL) /*!< ECAT ESC_CONFIG: EHLD_P1 (Bit 5) */ -#define ECAT_ESC_CONFIG_EHLD_P1_Msk (0x20UL) /*!< ECAT ESC_CONFIG: EHLD_P1 (Bitfield-Mask: 0x01) */ -#define ECAT_ESC_CONFIG_EHLD_P2_Pos (6UL) /*!< ECAT ESC_CONFIG: EHLD_P2 (Bit 6) */ -#define ECAT_ESC_CONFIG_EHLD_P2_Msk (0x40UL) /*!< ECAT ESC_CONFIG: EHLD_P2 (Bitfield-Mask: 0x01) */ -#define ECAT_ESC_CONFIG_EHLD_P3_Pos (7UL) /*!< ECAT ESC_CONFIG: EHLD_P3 (Bit 7) */ -#define ECAT_ESC_CONFIG_EHLD_P3_Msk (0x80UL) /*!< ECAT ESC_CONFIG: EHLD_P3 (Bitfield-Mask: 0x01) */ - -/* ------------------------------- ECAT_PDI_CONFIG ------------------------------ */ -#define ECAT_PDI_CONFIG_BUS_CLK_Pos (0UL) /*!< ECAT PDI_CONFIG: BUS_CLK (Bit 0) */ -#define ECAT_PDI_CONFIG_BUS_CLK_Msk (0x1fUL) /*!< ECAT PDI_CONFIG: BUS_CLK (Bitfield-Mask: 0x1f) */ -#define ECAT_PDI_CONFIG_OC_BUS_Pos (5UL) /*!< ECAT PDI_CONFIG: OC_BUS (Bit 5) */ -#define ECAT_PDI_CONFIG_OC_BUS_Msk (0xe0UL) /*!< ECAT PDI_CONFIG: OC_BUS (Bitfield-Mask: 0x07) */ - -/* --------------------------- ECAT_SYNC_LATCH_CONFIG --------------------------- */ -#define ECAT_SYNC_LATCH_CONFIG_SYNC0_POL_Pos (0UL) /*!< ECAT SYNC_LATCH_CONFIG: SYNC0_POL (Bit 0) */ -#define ECAT_SYNC_LATCH_CONFIG_SYNC0_POL_Msk (0x3UL) /*!< ECAT SYNC_LATCH_CONFIG: SYNC0_POL (Bitfield-Mask: 0x03) */ -#define ECAT_SYNC_LATCH_CONFIG_SL0_CNF_Pos (2UL) /*!< ECAT SYNC_LATCH_CONFIG: SL0_CNF (Bit 2) */ -#define ECAT_SYNC_LATCH_CONFIG_SL0_CNF_Msk (0x4UL) /*!< ECAT SYNC_LATCH_CONFIG: SL0_CNF (Bitfield-Mask: 0x01) */ -#define ECAT_SYNC_LATCH_CONFIG_S0_MAP_Pos (3UL) /*!< ECAT SYNC_LATCH_CONFIG: S0_MAP (Bit 3) */ -#define ECAT_SYNC_LATCH_CONFIG_S0_MAP_Msk (0x8UL) /*!< ECAT SYNC_LATCH_CONFIG: S0_MAP (Bitfield-Mask: 0x01) */ -#define ECAT_SYNC_LATCH_CONFIG_SYNC1_POL_Pos (4UL) /*!< ECAT SYNC_LATCH_CONFIG: SYNC1_POL (Bit 4) */ -#define ECAT_SYNC_LATCH_CONFIG_SYNC1_POL_Msk (0x30UL) /*!< ECAT SYNC_LATCH_CONFIG: SYNC1_POL (Bitfield-Mask: 0x03) */ -#define ECAT_SYNC_LATCH_CONFIG_SL1_CNF_Pos (6UL) /*!< ECAT SYNC_LATCH_CONFIG: SL1_CNF (Bit 6) */ -#define ECAT_SYNC_LATCH_CONFIG_SL1_CNF_Msk (0x40UL) /*!< ECAT SYNC_LATCH_CONFIG: SL1_CNF (Bitfield-Mask: 0x01) */ -#define ECAT_SYNC_LATCH_CONFIG_S1_MAP_Pos (7UL) /*!< ECAT SYNC_LATCH_CONFIG: S1_MAP (Bit 7) */ -#define ECAT_SYNC_LATCH_CONFIG_S1_MAP_Msk (0x80UL) /*!< ECAT SYNC_LATCH_CONFIG: S1_MAP (Bitfield-Mask: 0x01) */ - -/* ----------------------------- ECAT_PDI_EXT_CONFIG ---------------------------- */ -#define ECAT_PDI_EXT_CONFIG_R_Pref_Pos (0UL) /*!< ECAT PDI_EXT_CONFIG: R_Pref (Bit 0) */ -#define ECAT_PDI_EXT_CONFIG_R_Pref_Msk (0x3UL) /*!< ECAT PDI_EXT_CONFIG: R_Pref (Bitfield-Mask: 0x03) */ -#define ECAT_PDI_EXT_CONFIG_SUB_TYPE_Pos (8UL) /*!< ECAT PDI_EXT_CONFIG: SUB_TYPE (Bit 8) */ -#define ECAT_PDI_EXT_CONFIG_SUB_TYPE_Msk (0x700UL) /*!< ECAT PDI_EXT_CONFIG: SUB_TYPE (Bitfield-Mask: 0x07) */ - -/* ------------------------------- ECAT_EVENT_MASK ------------------------------ */ -#define ECAT_EVENT_MASK_DC_LE_MASK_Pos (0UL) /*!< ECAT EVENT_MASK: DC_LE_MASK (Bit 0) */ -#define ECAT_EVENT_MASK_DC_LE_MASK_Msk (0x1UL) /*!< ECAT EVENT_MASK: DC_LE_MASK (Bitfield-Mask: 0x01) */ -#define ECAT_EVENT_MASK_DL_SE_MASK_Pos (2UL) /*!< ECAT EVENT_MASK: DL_SE_MASK (Bit 2) */ -#define ECAT_EVENT_MASK_DL_SE_MASK_Msk (0x4UL) /*!< ECAT EVENT_MASK: DL_SE_MASK (Bitfield-Mask: 0x01) */ -#define ECAT_EVENT_MASK_AL_SE_MASK_Pos (3UL) /*!< ECAT EVENT_MASK: AL_SE_MASK (Bit 3) */ -#define ECAT_EVENT_MASK_AL_SE_MASK_Msk (0x8UL) /*!< ECAT EVENT_MASK: AL_SE_MASK (Bitfield-Mask: 0x01) */ -#define ECAT_EVENT_MASK_MIR_0_MASK_Pos (4UL) /*!< ECAT EVENT_MASK: MIR_0_MASK (Bit 4) */ -#define ECAT_EVENT_MASK_MIR_0_MASK_Msk (0x10UL) /*!< ECAT EVENT_MASK: MIR_0_MASK (Bitfield-Mask: 0x01) */ -#define ECAT_EVENT_MASK_MIR_1_MASK_Pos (5UL) /*!< ECAT EVENT_MASK: MIR_1_MASK (Bit 5) */ -#define ECAT_EVENT_MASK_MIR_1_MASK_Msk (0x20UL) /*!< ECAT EVENT_MASK: MIR_1_MASK (Bitfield-Mask: 0x01) */ -#define ECAT_EVENT_MASK_MIR_2_MASK_Pos (6UL) /*!< ECAT EVENT_MASK: MIR_2_MASK (Bit 6) */ -#define ECAT_EVENT_MASK_MIR_2_MASK_Msk (0x40UL) /*!< ECAT EVENT_MASK: MIR_2_MASK (Bitfield-Mask: 0x01) */ -#define ECAT_EVENT_MASK_MIR_3_MASK_Pos (7UL) /*!< ECAT EVENT_MASK: MIR_3_MASK (Bit 7) */ -#define ECAT_EVENT_MASK_MIR_3_MASK_Msk (0x80UL) /*!< ECAT EVENT_MASK: MIR_3_MASK (Bitfield-Mask: 0x01) */ -#define ECAT_EVENT_MASK_MIR_4_MASK_Pos (8UL) /*!< ECAT EVENT_MASK: MIR_4_MASK (Bit 8) */ -#define ECAT_EVENT_MASK_MIR_4_MASK_Msk (0x100UL) /*!< ECAT EVENT_MASK: MIR_4_MASK (Bitfield-Mask: 0x01) */ -#define ECAT_EVENT_MASK_MIR_5_MASK_Pos (9UL) /*!< ECAT EVENT_MASK: MIR_5_MASK (Bit 9) */ -#define ECAT_EVENT_MASK_MIR_5_MASK_Msk (0x200UL) /*!< ECAT EVENT_MASK: MIR_5_MASK (Bitfield-Mask: 0x01) */ -#define ECAT_EVENT_MASK_MIR_6_MASK_Pos (10UL) /*!< ECAT EVENT_MASK: MIR_6_MASK (Bit 10) */ -#define ECAT_EVENT_MASK_MIR_6_MASK_Msk (0x400UL) /*!< ECAT EVENT_MASK: MIR_6_MASK (Bitfield-Mask: 0x01) */ -#define ECAT_EVENT_MASK_MIR_7_MASK_Pos (11UL) /*!< ECAT EVENT_MASK: MIR_7_MASK (Bit 11) */ -#define ECAT_EVENT_MASK_MIR_7_MASK_Msk (0x800UL) /*!< ECAT EVENT_MASK: MIR_7_MASK (Bitfield-Mask: 0x01) */ - -/* ----------------------------- ECAT_AL_EVENT_MASK ----------------------------- */ -#define ECAT_AL_EVENT_MASK_AL_CE_MASK_Pos (0UL) /*!< ECAT AL_EVENT_MASK: AL_CE_MASK (Bit 0) */ -#define ECAT_AL_EVENT_MASK_AL_CE_MASK_Msk (0x1UL) /*!< ECAT AL_EVENT_MASK: AL_CE_MASK (Bitfield-Mask: 0x01) */ -#define ECAT_AL_EVENT_MASK_DC_LE_MASK_Pos (1UL) /*!< ECAT AL_EVENT_MASK: DC_LE_MASK (Bit 1) */ -#define ECAT_AL_EVENT_MASK_DC_LE_MASK_Msk (0x2UL) /*!< ECAT AL_EVENT_MASK: DC_LE_MASK (Bitfield-Mask: 0x01) */ -#define ECAT_AL_EVENT_MASK_ST_S0_MASK_Pos (2UL) /*!< ECAT AL_EVENT_MASK: ST_S0_MASK (Bit 2) */ -#define ECAT_AL_EVENT_MASK_ST_S0_MASK_Msk (0x4UL) /*!< ECAT AL_EVENT_MASK: ST_S0_MASK (Bitfield-Mask: 0x01) */ -#define ECAT_AL_EVENT_MASK_ST_S1_MASK_Pos (3UL) /*!< ECAT AL_EVENT_MASK: ST_S1_MASK (Bit 3) */ -#define ECAT_AL_EVENT_MASK_ST_S1_MASK_Msk (0x8UL) /*!< ECAT AL_EVENT_MASK: ST_S1_MASK (Bitfield-Mask: 0x01) */ -#define ECAT_AL_EVENT_MASK_SM_A_MASK_Pos (4UL) /*!< ECAT AL_EVENT_MASK: SM_A_MASK (Bit 4) */ -#define ECAT_AL_EVENT_MASK_SM_A_MASK_Msk (0x10UL) /*!< ECAT AL_EVENT_MASK: SM_A_MASK (Bitfield-Mask: 0x01) */ -#define ECAT_AL_EVENT_MASK_EEP_E_MASK_Pos (5UL) /*!< ECAT AL_EVENT_MASK: EEP_E_MASK (Bit 5) */ -#define ECAT_AL_EVENT_MASK_EEP_E_MASK_Msk (0x20UL) /*!< ECAT AL_EVENT_MASK: EEP_E_MASK (Bitfield-Mask: 0x01) */ -#define ECAT_AL_EVENT_MASK_WP_D_MASK_Pos (6UL) /*!< ECAT AL_EVENT_MASK: WP_D_MASK (Bit 6) */ -#define ECAT_AL_EVENT_MASK_WP_D_MASK_Msk (0x40UL) /*!< ECAT AL_EVENT_MASK: WP_D_MASK (Bitfield-Mask: 0x01) */ -#define ECAT_AL_EVENT_MASK_SMI_0_MASK_Pos (8UL) /*!< ECAT AL_EVENT_MASK: SMI_0_MASK (Bit 8) */ -#define ECAT_AL_EVENT_MASK_SMI_0_MASK_Msk (0x100UL) /*!< ECAT AL_EVENT_MASK: SMI_0_MASK (Bitfield-Mask: 0x01) */ -#define ECAT_AL_EVENT_MASK_SMI_1_MASK_Pos (9UL) /*!< ECAT AL_EVENT_MASK: SMI_1_MASK (Bit 9) */ -#define ECAT_AL_EVENT_MASK_SMI_1_MASK_Msk (0x200UL) /*!< ECAT AL_EVENT_MASK: SMI_1_MASK (Bitfield-Mask: 0x01) */ -#define ECAT_AL_EVENT_MASK_SMI_2_MASK_Pos (10UL) /*!< ECAT AL_EVENT_MASK: SMI_2_MASK (Bit 10) */ -#define ECAT_AL_EVENT_MASK_SMI_2_MASK_Msk (0x400UL) /*!< ECAT AL_EVENT_MASK: SMI_2_MASK (Bitfield-Mask: 0x01) */ -#define ECAT_AL_EVENT_MASK_SMI_3_MASK_Pos (11UL) /*!< ECAT AL_EVENT_MASK: SMI_3_MASK (Bit 11) */ -#define ECAT_AL_EVENT_MASK_SMI_3_MASK_Msk (0x800UL) /*!< ECAT AL_EVENT_MASK: SMI_3_MASK (Bitfield-Mask: 0x01) */ -#define ECAT_AL_EVENT_MASK_SMI_4_MASK_Pos (12UL) /*!< ECAT AL_EVENT_MASK: SMI_4_MASK (Bit 12) */ -#define ECAT_AL_EVENT_MASK_SMI_4_MASK_Msk (0x1000UL) /*!< ECAT AL_EVENT_MASK: SMI_4_MASK (Bitfield-Mask: 0x01) */ -#define ECAT_AL_EVENT_MASK_SMI_5_MASK_Pos (13UL) /*!< ECAT AL_EVENT_MASK: SMI_5_MASK (Bit 13) */ -#define ECAT_AL_EVENT_MASK_SMI_5_MASK_Msk (0x2000UL) /*!< ECAT AL_EVENT_MASK: SMI_5_MASK (Bitfield-Mask: 0x01) */ -#define ECAT_AL_EVENT_MASK_SMI_6_MASK_Pos (14UL) /*!< ECAT AL_EVENT_MASK: SMI_6_MASK (Bit 14) */ -#define ECAT_AL_EVENT_MASK_SMI_6_MASK_Msk (0x4000UL) /*!< ECAT AL_EVENT_MASK: SMI_6_MASK (Bitfield-Mask: 0x01) */ -#define ECAT_AL_EVENT_MASK_SMI_7_MASK_Pos (15UL) /*!< ECAT AL_EVENT_MASK: SMI_7_MASK (Bit 15) */ -#define ECAT_AL_EVENT_MASK_SMI_7_MASK_Msk (0x8000UL) /*!< ECAT AL_EVENT_MASK: SMI_7_MASK (Bitfield-Mask: 0x01) */ -#define ECAT_AL_EVENT_MASK_SMI_8_MASK_Pos (16UL) /*!< ECAT AL_EVENT_MASK: SMI_8_MASK (Bit 16) */ -#define ECAT_AL_EVENT_MASK_SMI_8_MASK_Msk (0x10000UL) /*!< ECAT AL_EVENT_MASK: SMI_8_MASK (Bitfield-Mask: 0x01) */ -#define ECAT_AL_EVENT_MASK_SMI_9_MASK_Pos (17UL) /*!< ECAT AL_EVENT_MASK: SMI_9_MASK (Bit 17) */ -#define ECAT_AL_EVENT_MASK_SMI_9_MASK_Msk (0x20000UL) /*!< ECAT AL_EVENT_MASK: SMI_9_MASK (Bitfield-Mask: 0x01) */ -#define ECAT_AL_EVENT_MASK_SMI_10_MASK_Pos (18UL) /*!< ECAT AL_EVENT_MASK: SMI_10_MASK (Bit 18) */ -#define ECAT_AL_EVENT_MASK_SMI_10_MASK_Msk (0x40000UL) /*!< ECAT AL_EVENT_MASK: SMI_10_MASK (Bitfield-Mask: 0x01) */ -#define ECAT_AL_EVENT_MASK_SMI_11_MASK_Pos (19UL) /*!< ECAT AL_EVENT_MASK: SMI_11_MASK (Bit 19) */ -#define ECAT_AL_EVENT_MASK_SMI_11_MASK_Msk (0x80000UL) /*!< ECAT AL_EVENT_MASK: SMI_11_MASK (Bitfield-Mask: 0x01) */ -#define ECAT_AL_EVENT_MASK_SMI_12_MASK_Pos (20UL) /*!< ECAT AL_EVENT_MASK: SMI_12_MASK (Bit 20) */ -#define ECAT_AL_EVENT_MASK_SMI_12_MASK_Msk (0x100000UL) /*!< ECAT AL_EVENT_MASK: SMI_12_MASK (Bitfield-Mask: 0x01) */ -#define ECAT_AL_EVENT_MASK_SMI_13_MASK_Pos (21UL) /*!< ECAT AL_EVENT_MASK: SMI_13_MASK (Bit 21) */ -#define ECAT_AL_EVENT_MASK_SMI_13_MASK_Msk (0x200000UL) /*!< ECAT AL_EVENT_MASK: SMI_13_MASK (Bitfield-Mask: 0x01) */ -#define ECAT_AL_EVENT_MASK_SMI_14_MASK_Pos (22UL) /*!< ECAT AL_EVENT_MASK: SMI_14_MASK (Bit 22) */ -#define ECAT_AL_EVENT_MASK_SMI_14_MASK_Msk (0x400000UL) /*!< ECAT AL_EVENT_MASK: SMI_14_MASK (Bitfield-Mask: 0x01) */ -#define ECAT_AL_EVENT_MASK_SMI_15_MASK_Pos (23UL) /*!< ECAT AL_EVENT_MASK: SMI_15_MASK (Bit 23) */ -#define ECAT_AL_EVENT_MASK_SMI_15_MASK_Msk (0x800000UL) /*!< ECAT AL_EVENT_MASK: SMI_15_MASK (Bitfield-Mask: 0x01) */ - -/* ------------------------------- ECAT_EVENT_REQ ------------------------------- */ -#define ECAT_EVENT_REQ_DC_LE_Pos (0UL) /*!< ECAT EVENT_REQ: DC_LE (Bit 0) */ -#define ECAT_EVENT_REQ_DC_LE_Msk (0x1UL) /*!< ECAT EVENT_REQ: DC_LE (Bitfield-Mask: 0x01) */ -#define ECAT_EVENT_REQ_DL_SE_Pos (2UL) /*!< ECAT EVENT_REQ: DL_SE (Bit 2) */ -#define ECAT_EVENT_REQ_DL_SE_Msk (0x4UL) /*!< ECAT EVENT_REQ: DL_SE (Bitfield-Mask: 0x01) */ -#define ECAT_EVENT_REQ_AL_SE_Pos (3UL) /*!< ECAT EVENT_REQ: AL_SE (Bit 3) */ -#define ECAT_EVENT_REQ_AL_SE_Msk (0x8UL) /*!< ECAT EVENT_REQ: AL_SE (Bitfield-Mask: 0x01) */ -#define ECAT_EVENT_REQ_MIR_0_Pos (4UL) /*!< ECAT EVENT_REQ: MIR_0 (Bit 4) */ -#define ECAT_EVENT_REQ_MIR_0_Msk (0x10UL) /*!< ECAT EVENT_REQ: MIR_0 (Bitfield-Mask: 0x01) */ -#define ECAT_EVENT_REQ_MIR_1_Pos (5UL) /*!< ECAT EVENT_REQ: MIR_1 (Bit 5) */ -#define ECAT_EVENT_REQ_MIR_1_Msk (0x20UL) /*!< ECAT EVENT_REQ: MIR_1 (Bitfield-Mask: 0x01) */ -#define ECAT_EVENT_REQ_MIR_2_Pos (6UL) /*!< ECAT EVENT_REQ: MIR_2 (Bit 6) */ -#define ECAT_EVENT_REQ_MIR_2_Msk (0x40UL) /*!< ECAT EVENT_REQ: MIR_2 (Bitfield-Mask: 0x01) */ -#define ECAT_EVENT_REQ_MIR_3_Pos (7UL) /*!< ECAT EVENT_REQ: MIR_3 (Bit 7) */ -#define ECAT_EVENT_REQ_MIR_3_Msk (0x80UL) /*!< ECAT EVENT_REQ: MIR_3 (Bitfield-Mask: 0x01) */ -#define ECAT_EVENT_REQ_MIR_4_Pos (8UL) /*!< ECAT EVENT_REQ: MIR_4 (Bit 8) */ -#define ECAT_EVENT_REQ_MIR_4_Msk (0x100UL) /*!< ECAT EVENT_REQ: MIR_4 (Bitfield-Mask: 0x01) */ -#define ECAT_EVENT_REQ_MIR_5_Pos (9UL) /*!< ECAT EVENT_REQ: MIR_5 (Bit 9) */ -#define ECAT_EVENT_REQ_MIR_5_Msk (0x200UL) /*!< ECAT EVENT_REQ: MIR_5 (Bitfield-Mask: 0x01) */ -#define ECAT_EVENT_REQ_MIR_6_Pos (10UL) /*!< ECAT EVENT_REQ: MIR_6 (Bit 10) */ -#define ECAT_EVENT_REQ_MIR_6_Msk (0x400UL) /*!< ECAT EVENT_REQ: MIR_6 (Bitfield-Mask: 0x01) */ -#define ECAT_EVENT_REQ_MIR_7_Pos (11UL) /*!< ECAT EVENT_REQ: MIR_7 (Bit 11) */ -#define ECAT_EVENT_REQ_MIR_7_Msk (0x800UL) /*!< ECAT EVENT_REQ: MIR_7 (Bitfield-Mask: 0x01) */ - -/* ------------------------------ ECAT_AL_EVENT_REQ ----------------------------- */ -#define ECAT_AL_EVENT_REQ_AL_CE_Pos (0UL) /*!< ECAT AL_EVENT_REQ: AL_CE (Bit 0) */ -#define ECAT_AL_EVENT_REQ_AL_CE_Msk (0x1UL) /*!< ECAT AL_EVENT_REQ: AL_CE (Bitfield-Mask: 0x01) */ -#define ECAT_AL_EVENT_REQ_DC_LE_Pos (1UL) /*!< ECAT AL_EVENT_REQ: DC_LE (Bit 1) */ -#define ECAT_AL_EVENT_REQ_DC_LE_Msk (0x2UL) /*!< ECAT AL_EVENT_REQ: DC_LE (Bitfield-Mask: 0x01) */ -#define ECAT_AL_EVENT_REQ_ST_S0_Pos (2UL) /*!< ECAT AL_EVENT_REQ: ST_S0 (Bit 2) */ -#define ECAT_AL_EVENT_REQ_ST_S0_Msk (0x4UL) /*!< ECAT AL_EVENT_REQ: ST_S0 (Bitfield-Mask: 0x01) */ -#define ECAT_AL_EVENT_REQ_ST_S1_Pos (3UL) /*!< ECAT AL_EVENT_REQ: ST_S1 (Bit 3) */ -#define ECAT_AL_EVENT_REQ_ST_S1_Msk (0x8UL) /*!< ECAT AL_EVENT_REQ: ST_S1 (Bitfield-Mask: 0x01) */ -#define ECAT_AL_EVENT_REQ_SM_A_Pos (4UL) /*!< ECAT AL_EVENT_REQ: SM_A (Bit 4) */ -#define ECAT_AL_EVENT_REQ_SM_A_Msk (0x10UL) /*!< ECAT AL_EVENT_REQ: SM_A (Bitfield-Mask: 0x01) */ -#define ECAT_AL_EVENT_REQ_EEP_E_Pos (5UL) /*!< ECAT AL_EVENT_REQ: EEP_E (Bit 5) */ -#define ECAT_AL_EVENT_REQ_EEP_E_Msk (0x20UL) /*!< ECAT AL_EVENT_REQ: EEP_E (Bitfield-Mask: 0x01) */ -#define ECAT_AL_EVENT_REQ_WP_D_Pos (6UL) /*!< ECAT AL_EVENT_REQ: WP_D (Bit 6) */ -#define ECAT_AL_EVENT_REQ_WP_D_Msk (0x40UL) /*!< ECAT AL_EVENT_REQ: WP_D (Bitfield-Mask: 0x01) */ -#define ECAT_AL_EVENT_REQ_SMI_0_Pos (8UL) /*!< ECAT AL_EVENT_REQ: SMI_0 (Bit 8) */ -#define ECAT_AL_EVENT_REQ_SMI_0_Msk (0x100UL) /*!< ECAT AL_EVENT_REQ: SMI_0 (Bitfield-Mask: 0x01) */ -#define ECAT_AL_EVENT_REQ_SMI_1_Pos (9UL) /*!< ECAT AL_EVENT_REQ: SMI_1 (Bit 9) */ -#define ECAT_AL_EVENT_REQ_SMI_1_Msk (0x200UL) /*!< ECAT AL_EVENT_REQ: SMI_1 (Bitfield-Mask: 0x01) */ -#define ECAT_AL_EVENT_REQ_SMI_2_Pos (10UL) /*!< ECAT AL_EVENT_REQ: SMI_2 (Bit 10) */ -#define ECAT_AL_EVENT_REQ_SMI_2_Msk (0x400UL) /*!< ECAT AL_EVENT_REQ: SMI_2 (Bitfield-Mask: 0x01) */ -#define ECAT_AL_EVENT_REQ_SMI_3_Pos (11UL) /*!< ECAT AL_EVENT_REQ: SMI_3 (Bit 11) */ -#define ECAT_AL_EVENT_REQ_SMI_3_Msk (0x800UL) /*!< ECAT AL_EVENT_REQ: SMI_3 (Bitfield-Mask: 0x01) */ -#define ECAT_AL_EVENT_REQ_SMI_4_Pos (12UL) /*!< ECAT AL_EVENT_REQ: SMI_4 (Bit 12) */ -#define ECAT_AL_EVENT_REQ_SMI_4_Msk (0x1000UL) /*!< ECAT AL_EVENT_REQ: SMI_4 (Bitfield-Mask: 0x01) */ -#define ECAT_AL_EVENT_REQ_SMI_5_Pos (13UL) /*!< ECAT AL_EVENT_REQ: SMI_5 (Bit 13) */ -#define ECAT_AL_EVENT_REQ_SMI_5_Msk (0x2000UL) /*!< ECAT AL_EVENT_REQ: SMI_5 (Bitfield-Mask: 0x01) */ -#define ECAT_AL_EVENT_REQ_SMI_6_Pos (14UL) /*!< ECAT AL_EVENT_REQ: SMI_6 (Bit 14) */ -#define ECAT_AL_EVENT_REQ_SMI_6_Msk (0x4000UL) /*!< ECAT AL_EVENT_REQ: SMI_6 (Bitfield-Mask: 0x01) */ -#define ECAT_AL_EVENT_REQ_SMI_7_Pos (15UL) /*!< ECAT AL_EVENT_REQ: SMI_7 (Bit 15) */ -#define ECAT_AL_EVENT_REQ_SMI_7_Msk (0x8000UL) /*!< ECAT AL_EVENT_REQ: SMI_7 (Bitfield-Mask: 0x01) */ -#define ECAT_AL_EVENT_REQ_SMI_8_Pos (16UL) /*!< ECAT AL_EVENT_REQ: SMI_8 (Bit 16) */ -#define ECAT_AL_EVENT_REQ_SMI_8_Msk (0x10000UL) /*!< ECAT AL_EVENT_REQ: SMI_8 (Bitfield-Mask: 0x01) */ -#define ECAT_AL_EVENT_REQ_SMI_9_Pos (17UL) /*!< ECAT AL_EVENT_REQ: SMI_9 (Bit 17) */ -#define ECAT_AL_EVENT_REQ_SMI_9_Msk (0x20000UL) /*!< ECAT AL_EVENT_REQ: SMI_9 (Bitfield-Mask: 0x01) */ -#define ECAT_AL_EVENT_REQ_SMI_10_Pos (18UL) /*!< ECAT AL_EVENT_REQ: SMI_10 (Bit 18) */ -#define ECAT_AL_EVENT_REQ_SMI_10_Msk (0x40000UL) /*!< ECAT AL_EVENT_REQ: SMI_10 (Bitfield-Mask: 0x01) */ -#define ECAT_AL_EVENT_REQ_SMI_11_Pos (19UL) /*!< ECAT AL_EVENT_REQ: SMI_11 (Bit 19) */ -#define ECAT_AL_EVENT_REQ_SMI_11_Msk (0x80000UL) /*!< ECAT AL_EVENT_REQ: SMI_11 (Bitfield-Mask: 0x01) */ -#define ECAT_AL_EVENT_REQ_SMI_12_Pos (20UL) /*!< ECAT AL_EVENT_REQ: SMI_12 (Bit 20) */ -#define ECAT_AL_EVENT_REQ_SMI_12_Msk (0x100000UL) /*!< ECAT AL_EVENT_REQ: SMI_12 (Bitfield-Mask: 0x01) */ -#define ECAT_AL_EVENT_REQ_SMI_13_Pos (21UL) /*!< ECAT AL_EVENT_REQ: SMI_13 (Bit 21) */ -#define ECAT_AL_EVENT_REQ_SMI_13_Msk (0x200000UL) /*!< ECAT AL_EVENT_REQ: SMI_13 (Bitfield-Mask: 0x01) */ -#define ECAT_AL_EVENT_REQ_SMI_14_Pos (22UL) /*!< ECAT AL_EVENT_REQ: SMI_14 (Bit 22) */ -#define ECAT_AL_EVENT_REQ_SMI_14_Msk (0x400000UL) /*!< ECAT AL_EVENT_REQ: SMI_14 (Bitfield-Mask: 0x01) */ -#define ECAT_AL_EVENT_REQ_SMI_15_Pos (23UL) /*!< ECAT AL_EVENT_REQ: SMI_15 (Bit 23) */ -#define ECAT_AL_EVENT_REQ_SMI_15_Msk (0x800000UL) /*!< ECAT AL_EVENT_REQ: SMI_15 (Bitfield-Mask: 0x01) */ - -/* ----------------------------- ECAT_RX_ERR_COUNT0 ----------------------------- */ -#define ECAT_RX_ERR_COUNT0_INVALID_FRAME_Pos (0UL) /*!< ECAT RX_ERR_COUNT0: INVALID_FRAME (Bit 0) */ -#define ECAT_RX_ERR_COUNT0_INVALID_FRAME_Msk (0xffUL) /*!< ECAT RX_ERR_COUNT0: INVALID_FRAME (Bitfield-Mask: 0xff) */ -#define ECAT_RX_ERR_COUNT0_RX_ERROR_Pos (8UL) /*!< ECAT RX_ERR_COUNT0: RX_ERROR (Bit 8) */ -#define ECAT_RX_ERR_COUNT0_RX_ERROR_Msk (0xff00UL) /*!< ECAT RX_ERR_COUNT0: RX_ERROR (Bitfield-Mask: 0xff) */ - -/* ----------------------------- ECAT_RX_ERR_COUNT1 ----------------------------- */ -#define ECAT_RX_ERR_COUNT1_INVALID_FRAME_Pos (0UL) /*!< ECAT RX_ERR_COUNT1: INVALID_FRAME (Bit 0) */ -#define ECAT_RX_ERR_COUNT1_INVALID_FRAME_Msk (0xffUL) /*!< ECAT RX_ERR_COUNT1: INVALID_FRAME (Bitfield-Mask: 0xff) */ -#define ECAT_RX_ERR_COUNT1_RX_ERROR_Pos (8UL) /*!< ECAT RX_ERR_COUNT1: RX_ERROR (Bit 8) */ -#define ECAT_RX_ERR_COUNT1_RX_ERROR_Msk (0xff00UL) /*!< ECAT RX_ERR_COUNT1: RX_ERROR (Bitfield-Mask: 0xff) */ - -/* --------------------------- ECAT_FWD_RX_ERR_COUNT0 --------------------------- */ -#define ECAT_FWD_RX_ERR_COUNT0_FORW_ERROR_Pos (0UL) /*!< ECAT FWD_RX_ERR_COUNT0: FORW_ERROR (Bit 0) */ -#define ECAT_FWD_RX_ERR_COUNT0_FORW_ERROR_Msk (0xffUL) /*!< ECAT FWD_RX_ERR_COUNT0: FORW_ERROR (Bitfield-Mask: 0xff) */ - -/* --------------------------- ECAT_FWD_RX_ERR_COUNT1 --------------------------- */ -#define ECAT_FWD_RX_ERR_COUNT1_FORW_ERROR_Pos (0UL) /*!< ECAT FWD_RX_ERR_COUNT1: FORW_ERROR (Bit 0) */ -#define ECAT_FWD_RX_ERR_COUNT1_FORW_ERROR_Msk (0xffUL) /*!< ECAT FWD_RX_ERR_COUNT1: FORW_ERROR (Bitfield-Mask: 0xff) */ - -/* ----------------------------- ECAT_PROC_ERR_COUNT ---------------------------- */ -#define ECAT_PROC_ERR_COUNT_UNIT_ERROR_Pos (0UL) /*!< ECAT PROC_ERR_COUNT: UNIT_ERROR (Bit 0) */ -#define ECAT_PROC_ERR_COUNT_UNIT_ERROR_Msk (0xffUL) /*!< ECAT PROC_ERR_COUNT: UNIT_ERROR (Bitfield-Mask: 0xff) */ - -/* ----------------------------- ECAT_PDI_ERR_COUNT ----------------------------- */ -#define ECAT_PDI_ERR_COUNT_PDI_ERROR_COUNTER_Pos (0UL) /*!< ECAT PDI_ERR_COUNT: PDI_ERROR_COUNTER (Bit 0) */ -#define ECAT_PDI_ERR_COUNT_PDI_ERROR_COUNTER_Msk (0xffUL) /*!< ECAT PDI_ERR_COUNT: PDI_ERROR_COUNTER (Bitfield-Mask: 0xff) */ - -/* ---------------------------- ECAT_LOST_LINK_COUNT0 --------------------------- */ -#define ECAT_LOST_LINK_COUNT0_LL_COUNTER_Pos (0UL) /*!< ECAT LOST_LINK_COUNT0: LL_COUNTER (Bit 0) */ -#define ECAT_LOST_LINK_COUNT0_LL_COUNTER_Msk (0xffUL) /*!< ECAT LOST_LINK_COUNT0: LL_COUNTER (Bitfield-Mask: 0xff) */ - -/* ---------------------------- ECAT_LOST_LINK_COUNT1 --------------------------- */ -#define ECAT_LOST_LINK_COUNT1_LL_COUNTER_Pos (0UL) /*!< ECAT LOST_LINK_COUNT1: LL_COUNTER (Bit 0) */ -#define ECAT_LOST_LINK_COUNT1_LL_COUNTER_Msk (0xffUL) /*!< ECAT LOST_LINK_COUNT1: LL_COUNTER (Bitfield-Mask: 0xff) */ - -/* ------------------------------- ECAT_WD_DIVIDE ------------------------------- */ -#define ECAT_WD_DIVIDE_WD_DIV_Pos (0UL) /*!< ECAT WD_DIVIDE: WD_DIV (Bit 0) */ -#define ECAT_WD_DIVIDE_WD_DIV_Msk (0xffffUL) /*!< ECAT WD_DIVIDE: WD_DIV (Bitfield-Mask: 0xffff) */ - -/* ------------------------------ ECAT_WD_TIME_PDI ------------------------------ */ -#define ECAT_WD_TIME_PDI_WD_TIME_PDI_Pos (0UL) /*!< ECAT WD_TIME_PDI: WD_TIME_PDI (Bit 0) */ -#define ECAT_WD_TIME_PDI_WD_TIME_PDI_Msk (0xffffUL) /*!< ECAT WD_TIME_PDI: WD_TIME_PDI (Bitfield-Mask: 0xffff) */ - -/* ----------------------------- ECAT_WD_TIME_PDATA ----------------------------- */ -#define ECAT_WD_TIME_PDATA_WD_TIME_PD_Pos (0UL) /*!< ECAT WD_TIME_PDATA: WD_TIME_PD (Bit 0) */ -#define ECAT_WD_TIME_PDATA_WD_TIME_PD_Msk (0xffffUL) /*!< ECAT WD_TIME_PDATA: WD_TIME_PD (Bitfield-Mask: 0xffff) */ - -/* ----------------------------- ECAT_WD_STAT_PDATA ----------------------------- */ -#define ECAT_WD_STAT_PDATA_WD_STAT_PD_Pos (0UL) /*!< ECAT WD_STAT_PDATA: WD_STAT_PD (Bit 0) */ -#define ECAT_WD_STAT_PDATA_WD_STAT_PD_Msk (0x1UL) /*!< ECAT WD_STAT_PDATA: WD_STAT_PD (Bitfield-Mask: 0x01) */ - -/* ----------------------------- ECAT_WD_COUNT_PDATA ---------------------------- */ -#define ECAT_WD_COUNT_PDATA_WD_COUNTER_PD_Pos (0UL) /*!< ECAT WD_COUNT_PDATA: WD_COUNTER_PD (Bit 0) */ -#define ECAT_WD_COUNT_PDATA_WD_COUNTER_PD_Msk (0xffUL) /*!< ECAT WD_COUNT_PDATA: WD_COUNTER_PD (Bitfield-Mask: 0xff) */ - -/* ------------------------------ ECAT_WD_COUNT_PDI ----------------------------- */ -#define ECAT_WD_COUNT_PDI_WD_COUNTER_PDI_Pos (0UL) /*!< ECAT WD_COUNT_PDI: WD_COUNTER_PDI (Bit 0) */ -#define ECAT_WD_COUNT_PDI_WD_COUNTER_PDI_Msk (0xffUL) /*!< ECAT WD_COUNT_PDI: WD_COUNTER_PDI (Bitfield-Mask: 0xff) */ - -/* -------------------------------- ECAT_EEP_CONF ------------------------------- */ -#define ECAT_EEP_CONF_TO_PDI_Pos (0UL) /*!< ECAT EEP_CONF: TO_PDI (Bit 0) */ -#define ECAT_EEP_CONF_TO_PDI_Msk (0x1UL) /*!< ECAT EEP_CONF: TO_PDI (Bitfield-Mask: 0x01) */ -#define ECAT_EEP_CONF_FORCE_Pos (1UL) /*!< ECAT EEP_CONF: FORCE (Bit 1) */ -#define ECAT_EEP_CONF_FORCE_Msk (0x2UL) /*!< ECAT EEP_CONF: FORCE (Bitfield-Mask: 0x01) */ - -/* ------------------------------- ECAT_EEP_STATE ------------------------------- */ -#define ECAT_EEP_STATE_ACCESS_Pos (0UL) /*!< ECAT EEP_STATE: ACCESS (Bit 0) */ -#define ECAT_EEP_STATE_ACCESS_Msk (0x1UL) /*!< ECAT EEP_STATE: ACCESS (Bitfield-Mask: 0x01) */ - -/* ----------------------------- ECAT_EEP_CONT_STAT ----------------------------- */ -#define ECAT_EEP_CONT_STAT_W_EN_Pos (0UL) /*!< ECAT EEP_CONT_STAT: W_EN (Bit 0) */ -#define ECAT_EEP_CONT_STAT_W_EN_Msk (0x1UL) /*!< ECAT EEP_CONT_STAT: W_EN (Bitfield-Mask: 0x01) */ -#define ECAT_EEP_CONT_STAT_EMUL_Pos (5UL) /*!< ECAT EEP_CONT_STAT: EMUL (Bit 5) */ -#define ECAT_EEP_CONT_STAT_EMUL_Msk (0x20UL) /*!< ECAT EEP_CONT_STAT: EMUL (Bitfield-Mask: 0x01) */ -#define ECAT_EEP_CONT_STAT_BYTES_Pos (6UL) /*!< ECAT EEP_CONT_STAT: BYTES (Bit 6) */ -#define ECAT_EEP_CONT_STAT_BYTES_Msk (0x40UL) /*!< ECAT EEP_CONT_STAT: BYTES (Bitfield-Mask: 0x01) */ -#define ECAT_EEP_CONT_STAT_ALG_Pos (7UL) /*!< ECAT EEP_CONT_STAT: ALG (Bit 7) */ -#define ECAT_EEP_CONT_STAT_ALG_Msk (0x80UL) /*!< ECAT EEP_CONT_STAT: ALG (Bitfield-Mask: 0x01) */ -#define ECAT_EEP_CONT_STAT_CMD_REG_Pos (8UL) /*!< ECAT EEP_CONT_STAT: CMD_REG (Bit 8) */ -#define ECAT_EEP_CONT_STAT_CMD_REG_Msk (0x700UL) /*!< ECAT EEP_CONT_STAT: CMD_REG (Bitfield-Mask: 0x07) */ -#define ECAT_EEP_CONT_STAT_ERROR_Pos (11UL) /*!< ECAT EEP_CONT_STAT: ERROR (Bit 11) */ -#define ECAT_EEP_CONT_STAT_ERROR_Msk (0x800UL) /*!< ECAT EEP_CONT_STAT: ERROR (Bitfield-Mask: 0x01) */ -#define ECAT_EEP_CONT_STAT_L_STAT_Pos (12UL) /*!< ECAT EEP_CONT_STAT: L_STAT (Bit 12) */ -#define ECAT_EEP_CONT_STAT_L_STAT_Msk (0x1000UL) /*!< ECAT EEP_CONT_STAT: L_STAT (Bitfield-Mask: 0x01) */ -#define ECAT_EEP_CONT_STAT_ERROR_AC_Pos (13UL) /*!< ECAT EEP_CONT_STAT: ERROR_AC (Bit 13) */ -#define ECAT_EEP_CONT_STAT_ERROR_AC_Msk (0x2000UL) /*!< ECAT EEP_CONT_STAT: ERROR_AC (Bitfield-Mask: 0x01) */ -#define ECAT_EEP_CONT_STAT_ERROR_WE_Pos (14UL) /*!< ECAT EEP_CONT_STAT: ERROR_WE (Bit 14) */ -#define ECAT_EEP_CONT_STAT_ERROR_WE_Msk (0x4000UL) /*!< ECAT EEP_CONT_STAT: ERROR_WE (Bitfield-Mask: 0x01) */ -#define ECAT_EEP_CONT_STAT_BUSY_Pos (15UL) /*!< ECAT EEP_CONT_STAT: BUSY (Bit 15) */ -#define ECAT_EEP_CONT_STAT_BUSY_Msk (0x8000UL) /*!< ECAT EEP_CONT_STAT: BUSY (Bitfield-Mask: 0x01) */ - -/* -------------------------------- ECAT_EEP_ADR -------------------------------- */ -#define ECAT_EEP_ADR_EEPROM_ADDR_Pos (0UL) /*!< ECAT EEP_ADR: EEPROM_ADDR (Bit 0) */ -#define ECAT_EEP_ADR_EEPROM_ADDR_Msk (0xffffffffUL) /*!< ECAT EEP_ADR: EEPROM_ADDR (Bitfield-Mask: 0xffffffff) */ - -/* -------------------------------- ECAT_EEP_DATA ------------------------------- */ -#define ECAT_EEP_DATA_EEP_DATA_Pos (0UL) /*!< ECAT EEP_DATA: EEP_DATA (Bit 0) */ -#define ECAT_EEP_DATA_EEP_DATA_Msk (0xffffffffUL) /*!< ECAT EEP_DATA: EEP_DATA (Bitfield-Mask: 0xffffffff) */ - -/* ----------------------------- ECAT_MII_CONT_STAT ----------------------------- */ -#define ECAT_MII_CONT_STAT_W_EN_Pos (0UL) /*!< ECAT MII_CONT_STAT: W_EN (Bit 0) */ -#define ECAT_MII_CONT_STAT_W_EN_Msk (0x1UL) /*!< ECAT MII_CONT_STAT: W_EN (Bitfield-Mask: 0x01) */ -#define ECAT_MII_CONT_STAT_MIC_PDI_Pos (1UL) /*!< ECAT MII_CONT_STAT: MIC_PDI (Bit 1) */ -#define ECAT_MII_CONT_STAT_MIC_PDI_Msk (0x2UL) /*!< ECAT MII_CONT_STAT: MIC_PDI (Bitfield-Mask: 0x01) */ -#define ECAT_MII_CONT_STAT_MI_LD_Pos (2UL) /*!< ECAT MII_CONT_STAT: MI_LD (Bit 2) */ -#define ECAT_MII_CONT_STAT_MI_LD_Msk (0x4UL) /*!< ECAT MII_CONT_STAT: MI_LD (Bitfield-Mask: 0x01) */ -#define ECAT_MII_CONT_STAT_PHY_ADDR_Pos (3UL) /*!< ECAT MII_CONT_STAT: PHY_ADDR (Bit 3) */ -#define ECAT_MII_CONT_STAT_PHY_ADDR_Msk (0xf8UL) /*!< ECAT MII_CONT_STAT: PHY_ADDR (Bitfield-Mask: 0x1f) */ -#define ECAT_MII_CONT_STAT_CMD_REG_Pos (8UL) /*!< ECAT MII_CONT_STAT: CMD_REG (Bit 8) */ -#define ECAT_MII_CONT_STAT_CMD_REG_Msk (0x300UL) /*!< ECAT MII_CONT_STAT: CMD_REG (Bitfield-Mask: 0x03) */ -#define ECAT_MII_CONT_STAT_ERROR_Pos (14UL) /*!< ECAT MII_CONT_STAT: ERROR (Bit 14) */ -#define ECAT_MII_CONT_STAT_ERROR_Msk (0x4000UL) /*!< ECAT MII_CONT_STAT: ERROR (Bitfield-Mask: 0x01) */ -#define ECAT_MII_CONT_STAT_BUSY_Pos (15UL) /*!< ECAT MII_CONT_STAT: BUSY (Bit 15) */ -#define ECAT_MII_CONT_STAT_BUSY_Msk (0x8000UL) /*!< ECAT MII_CONT_STAT: BUSY (Bitfield-Mask: 0x01) */ - -/* ------------------------------ ECAT_MII_PHY_ADR ------------------------------ */ -#define ECAT_MII_PHY_ADR_PHY_ADDR_Pos (0UL) /*!< ECAT MII_PHY_ADR: PHY_ADDR (Bit 0) */ -#define ECAT_MII_PHY_ADR_PHY_ADDR_Msk (0x1fUL) /*!< ECAT MII_PHY_ADR: PHY_ADDR (Bitfield-Mask: 0x1f) */ -#define ECAT_MII_PHY_ADR_PHY_CADDR_Pos (7UL) /*!< ECAT MII_PHY_ADR: PHY_CADDR (Bit 7) */ -#define ECAT_MII_PHY_ADR_PHY_CADDR_Msk (0x80UL) /*!< ECAT MII_PHY_ADR: PHY_CADDR (Bitfield-Mask: 0x01) */ - -/* ---------------------------- ECAT_MII_PHY_REG_ADR ---------------------------- */ -#define ECAT_MII_PHY_REG_ADR_PHY_REG_ADDR_Pos (0UL) /*!< ECAT MII_PHY_REG_ADR: PHY_REG_ADDR (Bit 0) */ -#define ECAT_MII_PHY_REG_ADR_PHY_REG_ADDR_Msk (0x1fUL) /*!< ECAT MII_PHY_REG_ADR: PHY_REG_ADDR (Bitfield-Mask: 0x1f) */ - -/* ------------------------------ ECAT_MII_PHY_DATA ----------------------------- */ -#define ECAT_MII_PHY_DATA_PHY_RW_DATA_Pos (0UL) /*!< ECAT MII_PHY_DATA: PHY_RW_DATA (Bit 0) */ -#define ECAT_MII_PHY_DATA_PHY_RW_DATA_Msk (0xffffUL) /*!< ECAT MII_PHY_DATA: PHY_RW_DATA (Bitfield-Mask: 0xffff) */ - -/* --------------------------- ECAT_MII_ECAT_ACS_STATE -------------------------- */ -#define ECAT_MII_ECAT_ACS_STATE_EN_ACS_MII_BY_PDI_Pos (0UL) /*!< ECAT MII_ECAT_ACS_STATE: EN_ACS_MII_BY_PDI (Bit 0) */ -#define ECAT_MII_ECAT_ACS_STATE_EN_ACS_MII_BY_PDI_Msk (0x1UL) /*!< ECAT MII_ECAT_ACS_STATE: EN_ACS_MII_BY_PDI (Bitfield-Mask: 0x01) */ - -/* --------------------------- ECAT_MII_PDI_ACS_STATE --------------------------- */ -#define ECAT_MII_PDI_ACS_STATE_ACS_MII_BY_PDI_Pos (0UL) /*!< ECAT MII_PDI_ACS_STATE: ACS_MII_BY_PDI (Bit 0) */ -#define ECAT_MII_PDI_ACS_STATE_ACS_MII_BY_PDI_Msk (0x1UL) /*!< ECAT MII_PDI_ACS_STATE: ACS_MII_BY_PDI (Bitfield-Mask: 0x01) */ -#define ECAT_MII_PDI_ACS_STATE_FORCE_PDI_ACS_S_Pos (1UL) /*!< ECAT MII_PDI_ACS_STATE: FORCE_PDI_ACS_S (Bit 1) */ -#define ECAT_MII_PDI_ACS_STATE_FORCE_PDI_ACS_S_Msk (0x2UL) /*!< ECAT MII_PDI_ACS_STATE: FORCE_PDI_ACS_S (Bitfield-Mask: 0x01) */ - -/* --------------------------- ECAT_DC_RCV_TIME_PORT0 --------------------------- */ -#define ECAT_DC_RCV_TIME_PORT0_LOCAL_TIME_P0_Pos (0UL) /*!< ECAT DC_RCV_TIME_PORT0: LOCAL_TIME_P0 (Bit 0) */ -#define ECAT_DC_RCV_TIME_PORT0_LOCAL_TIME_P0_Msk (0xffffffffUL) /*!< ECAT DC_RCV_TIME_PORT0: LOCAL_TIME_P0 (Bitfield-Mask: 0xffffffff) */ - -/* --------------------------- ECAT_DC_RCV_TIME_PORT1 --------------------------- */ -#define ECAT_DC_RCV_TIME_PORT1_LOCAL_TIME_P1_Pos (0UL) /*!< ECAT DC_RCV_TIME_PORT1: LOCAL_TIME_P1 (Bit 0) */ -#define ECAT_DC_RCV_TIME_PORT1_LOCAL_TIME_P1_Msk (0xffffffffUL) /*!< ECAT DC_RCV_TIME_PORT1: LOCAL_TIME_P1 (Bitfield-Mask: 0xffffffff) */ - -/* ------------------------------ ECAT_DC_SYS_TIME ------------------------------ */ -#define ECAT_DC_SYS_TIME_WRITE_ACCESS_WRITEMode_Pos (0UL) /*!< ECAT DC_SYS_TIME: WRITE_ACCESS_WRITEMode (Bit 0) */ -#define ECAT_DC_SYS_TIME_WRITE_ACCESS_WRITEMode_Msk (0xffffffffUL) /*!< ECAT DC_SYS_TIME: WRITE_ACCESS_WRITEMode (Bitfield-Mask: 0xffffffff) */ - -/* ------------------------------ ECAT_DC_SYS_TIME ------------------------------ */ -#define ECAT_DC_SYS_TIME_READ_ACCESS_READMode_Pos (0UL) /*!< ECAT DC_SYS_TIME: READ_ACCESS_READMode (Bit 0) */ -#define ECAT_DC_SYS_TIME_READ_ACCESS_READMode_Msk (0xffffffffUL) /*!< ECAT DC_SYS_TIME: READ_ACCESS_READMode (Bitfield-Mask: 0xffffffff) */ - -/* ---------------------------- ECAT_RECEIVE_TIME_PU ---------------------------- */ -#define ECAT_RECEIVE_TIME_PU_RECEIVE_TIME_PU_Pos (0UL) /*!< ECAT RECEIVE_TIME_PU: RECEIVE_TIME_PU (Bit 0) */ -#define ECAT_RECEIVE_TIME_PU_RECEIVE_TIME_PU_Msk (0xffffffffUL) /*!< ECAT RECEIVE_TIME_PU: RECEIVE_TIME_PU (Bitfield-Mask: 0xffffffff) */ - -/* --------------------------- ECAT_DC_SYS_TIME_OFFSET -------------------------- */ -#define ECAT_DC_SYS_TIME_OFFSET_DC_SYS_TIME_OFFSET_Pos (0UL) /*!< ECAT DC_SYS_TIME_OFFSET: DC_SYS_TIME_OFFSET (Bit 0) */ -#define ECAT_DC_SYS_TIME_OFFSET_DC_SYS_TIME_OFFSET_Msk (0xffffffffUL) /*!< ECAT DC_SYS_TIME_OFFSET: DC_SYS_TIME_OFFSET (Bitfield-Mask: 0xffffffff) */ - -/* --------------------------- ECAT_DC_SYS_TIME_DELAY --------------------------- */ -#define ECAT_DC_SYS_TIME_DELAY_CLK_DELAY_Pos (0UL) /*!< ECAT DC_SYS_TIME_DELAY: CLK_DELAY (Bit 0) */ -#define ECAT_DC_SYS_TIME_DELAY_CLK_DELAY_Msk (0xffffffffUL) /*!< ECAT DC_SYS_TIME_DELAY: CLK_DELAY (Bitfield-Mask: 0xffffffff) */ - -/* ---------------------------- ECAT_DC_SYS_TIME_DIFF --------------------------- */ -#define ECAT_DC_SYS_TIME_DIFF_TIME_DIF_Pos (0UL) /*!< ECAT DC_SYS_TIME_DIFF: TIME_DIF (Bit 0) */ -#define ECAT_DC_SYS_TIME_DIFF_TIME_DIF_Msk (0x7fffffffUL) /*!< ECAT DC_SYS_TIME_DIFF: TIME_DIF (Bitfield-Mask: 0x7fffffff) */ -#define ECAT_DC_SYS_TIME_DIFF_CPY_Pos (31UL) /*!< ECAT DC_SYS_TIME_DIFF: CPY (Bit 31) */ -#define ECAT_DC_SYS_TIME_DIFF_CPY_Msk (0x80000000UL) /*!< ECAT DC_SYS_TIME_DIFF: CPY (Bitfield-Mask: 0x01) */ - -/* -------------------------- ECAT_DC_SPEED_COUNT_START ------------------------- */ -#define ECAT_DC_SPEED_COUNT_START_COUNT_START_Pos (0UL) /*!< ECAT DC_SPEED_COUNT_START: COUNT_START (Bit 0) */ -#define ECAT_DC_SPEED_COUNT_START_COUNT_START_Msk (0x7fffUL) /*!< ECAT DC_SPEED_COUNT_START: COUNT_START (Bitfield-Mask: 0x7fff) */ - -/* -------------------------- ECAT_DC_SPEED_COUNT_DIFF -------------------------- */ -#define ECAT_DC_SPEED_COUNT_DIFF_DEVIATION_Pos (0UL) /*!< ECAT DC_SPEED_COUNT_DIFF: DEVIATION (Bit 0) */ -#define ECAT_DC_SPEED_COUNT_DIFF_DEVIATION_Msk (0xffffUL) /*!< ECAT DC_SPEED_COUNT_DIFF: DEVIATION (Bitfield-Mask: 0xffff) */ - -/* ------------------------- ECAT_DC_SYS_TIME_FIL_DEPTH ------------------------- */ -#define ECAT_DC_SYS_TIME_FIL_DEPTH_FILTER_DEPTH_Pos (0UL) /*!< ECAT DC_SYS_TIME_FIL_DEPTH: FILTER_DEPTH (Bit 0) */ -#define ECAT_DC_SYS_TIME_FIL_DEPTH_FILTER_DEPTH_Msk (0xfUL) /*!< ECAT DC_SYS_TIME_FIL_DEPTH: FILTER_DEPTH (Bitfield-Mask: 0x0f) */ - -/* ------------------------ ECAT_DC_SPEED_COUNT_FIL_DEPTH ----------------------- */ -#define ECAT_DC_SPEED_COUNT_FIL_DEPTH_FILTER_DEPTH_Pos (0UL) /*!< ECAT DC_SPEED_COUNT_FIL_DEPTH: FILTER_DEPTH (Bit 0) */ -#define ECAT_DC_SPEED_COUNT_FIL_DEPTH_FILTER_DEPTH_Msk (0xfUL) /*!< ECAT DC_SPEED_COUNT_FIL_DEPTH: FILTER_DEPTH (Bitfield-Mask: 0x0f) */ - -/* ------------------------------ ECAT_DC_CYC_CONT ------------------------------ */ -#define ECAT_DC_CYC_CONT_SYNC_Pos (0UL) /*!< ECAT DC_CYC_CONT: SYNC (Bit 0) */ -#define ECAT_DC_CYC_CONT_SYNC_Msk (0x1UL) /*!< ECAT DC_CYC_CONT: SYNC (Bitfield-Mask: 0x01) */ -#define ECAT_DC_CYC_CONT_LATCH_U0_Pos (4UL) /*!< ECAT DC_CYC_CONT: LATCH_U0 (Bit 4) */ -#define ECAT_DC_CYC_CONT_LATCH_U0_Msk (0x10UL) /*!< ECAT DC_CYC_CONT: LATCH_U0 (Bitfield-Mask: 0x01) */ -#define ECAT_DC_CYC_CONT_LATCH_U1_Pos (5UL) /*!< ECAT DC_CYC_CONT: LATCH_U1 (Bit 5) */ -#define ECAT_DC_CYC_CONT_LATCH_U1_Msk (0x20UL) /*!< ECAT DC_CYC_CONT: LATCH_U1 (Bitfield-Mask: 0x01) */ - -/* --------------------------------- ECAT_DC_ACT -------------------------------- */ -#define ECAT_DC_ACT_SYNC_OUT_Pos (0UL) /*!< ECAT DC_ACT: SYNC_OUT (Bit 0) */ -#define ECAT_DC_ACT_SYNC_OUT_Msk (0x1UL) /*!< ECAT DC_ACT: SYNC_OUT (Bitfield-Mask: 0x01) */ -#define ECAT_DC_ACT_SYNC_0_Pos (1UL) /*!< ECAT DC_ACT: SYNC_0 (Bit 1) */ -#define ECAT_DC_ACT_SYNC_0_Msk (0x2UL) /*!< ECAT DC_ACT: SYNC_0 (Bitfield-Mask: 0x01) */ -#define ECAT_DC_ACT_SYNC_1_Pos (2UL) /*!< ECAT DC_ACT: SYNC_1 (Bit 2) */ -#define ECAT_DC_ACT_SYNC_1_Msk (0x4UL) /*!< ECAT DC_ACT: SYNC_1 (Bitfield-Mask: 0x01) */ - -/* ------------------------------ ECAT_DC_PULSE_LEN ----------------------------- */ -#define ECAT_DC_PULSE_LEN_PULS_LENGTH_Pos (0UL) /*!< ECAT DC_PULSE_LEN: PULS_LENGTH (Bit 0) */ -#define ECAT_DC_PULSE_LEN_PULS_LENGTH_Msk (0xffffUL) /*!< ECAT DC_PULSE_LEN: PULS_LENGTH (Bitfield-Mask: 0xffff) */ - -/* ------------------------------ ECAT_DC_ACT_STAT ------------------------------ */ -#define ECAT_DC_ACT_STAT_S0_ACK_STATE_Pos (0UL) /*!< ECAT DC_ACT_STAT: S0_ACK_STATE (Bit 0) */ -#define ECAT_DC_ACT_STAT_S0_ACK_STATE_Msk (0x1UL) /*!< ECAT DC_ACT_STAT: S0_ACK_STATE (Bitfield-Mask: 0x01) */ -#define ECAT_DC_ACT_STAT_S1_ACK_STATE_Pos (1UL) /*!< ECAT DC_ACT_STAT: S1_ACK_STATE (Bit 1) */ -#define ECAT_DC_ACT_STAT_S1_ACK_STATE_Msk (0x2UL) /*!< ECAT DC_ACT_STAT: S1_ACK_STATE (Bitfield-Mask: 0x01) */ -#define ECAT_DC_ACT_STAT_S_TIME_Pos (2UL) /*!< ECAT DC_ACT_STAT: S_TIME (Bit 2) */ -#define ECAT_DC_ACT_STAT_S_TIME_Msk (0x4UL) /*!< ECAT DC_ACT_STAT: S_TIME (Bitfield-Mask: 0x01) */ - -/* ----------------------------- ECAT_DC_SYNC0_STAT ----------------------------- */ -#define ECAT_DC_SYNC0_STAT_S0_STATE_Pos (0UL) /*!< ECAT DC_SYNC0_STAT: S0_STATE (Bit 0) */ -#define ECAT_DC_SYNC0_STAT_S0_STATE_Msk (0x1UL) /*!< ECAT DC_SYNC0_STAT: S0_STATE (Bitfield-Mask: 0x01) */ - -/* ----------------------------- ECAT_DC_SYNC1_STAT ----------------------------- */ -#define ECAT_DC_SYNC1_STAT_S1_STATE_Pos (0UL) /*!< ECAT DC_SYNC1_STAT: S1_STATE (Bit 0) */ -#define ECAT_DC_SYNC1_STAT_S1_STATE_Msk (0x1UL) /*!< ECAT DC_SYNC1_STAT: S1_STATE (Bitfield-Mask: 0x01) */ - -/* --------------------------- ECAT_DC_CYC_START_TIME --------------------------- */ -#define ECAT_DC_CYC_START_TIME_DC_CYC_START_TIME_Pos (0UL) /*!< ECAT DC_CYC_START_TIME: DC_CYC_START_TIME (Bit 0) */ -#define ECAT_DC_CYC_START_TIME_DC_CYC_START_TIME_Msk (0xffffffffUL) /*!< ECAT DC_CYC_START_TIME: DC_CYC_START_TIME (Bitfield-Mask: 0xffffffff) */ - -/* -------------------------- ECAT_DC_NEXT_SYNC1_PULSE -------------------------- */ -#define ECAT_DC_NEXT_SYNC1_PULSE_DC_NEXT_SYNC1_PULSE_Pos (0UL) /*!< ECAT DC_NEXT_SYNC1_PULSE: DC_NEXT_SYNC1_PULSE (Bit 0) */ -#define ECAT_DC_NEXT_SYNC1_PULSE_DC_NEXT_SYNC1_PULSE_Msk (0xffffffffUL) /*!< ECAT DC_NEXT_SYNC1_PULSE: DC_NEXT_SYNC1_PULSE (Bitfield-Mask: 0xffffffff) */ - -/* --------------------------- ECAT_DC_SYNC0_CYC_TIME --------------------------- */ -#define ECAT_DC_SYNC0_CYC_TIME_TIME_BETWEEN_SYNC0_Pos (0UL) /*!< ECAT DC_SYNC0_CYC_TIME: TIME_BETWEEN_SYNC0 (Bit 0) */ -#define ECAT_DC_SYNC0_CYC_TIME_TIME_BETWEEN_SYNC0_Msk (0xffffffffUL) /*!< ECAT DC_SYNC0_CYC_TIME: TIME_BETWEEN_SYNC0 (Bitfield-Mask: 0xffffffff) */ - -/* --------------------------- ECAT_DC_SYNC1_CYC_TIME --------------------------- */ -#define ECAT_DC_SYNC1_CYC_TIME_TIME_SYNC1_SYNC0_Pos (0UL) /*!< ECAT DC_SYNC1_CYC_TIME: TIME_SYNC1_SYNC0 (Bit 0) */ -#define ECAT_DC_SYNC1_CYC_TIME_TIME_SYNC1_SYNC0_Msk (0xffffffffUL) /*!< ECAT DC_SYNC1_CYC_TIME: TIME_SYNC1_SYNC0 (Bitfield-Mask: 0xffffffff) */ - -/* ----------------------------- ECAT_DC_LATCH0_CONT ---------------------------- */ -#define ECAT_DC_LATCH0_CONT_L0_POS_Pos (0UL) /*!< ECAT DC_LATCH0_CONT: L0_POS (Bit 0) */ -#define ECAT_DC_LATCH0_CONT_L0_POS_Msk (0x1UL) /*!< ECAT DC_LATCH0_CONT: L0_POS (Bitfield-Mask: 0x01) */ -#define ECAT_DC_LATCH0_CONT_L0_NEG_Pos (1UL) /*!< ECAT DC_LATCH0_CONT: L0_NEG (Bit 1) */ -#define ECAT_DC_LATCH0_CONT_L0_NEG_Msk (0x2UL) /*!< ECAT DC_LATCH0_CONT: L0_NEG (Bitfield-Mask: 0x01) */ - -/* ----------------------------- ECAT_DC_LATCH1_CONT ---------------------------- */ -#define ECAT_DC_LATCH1_CONT_L1_POS_Pos (0UL) /*!< ECAT DC_LATCH1_CONT: L1_POS (Bit 0) */ -#define ECAT_DC_LATCH1_CONT_L1_POS_Msk (0x1UL) /*!< ECAT DC_LATCH1_CONT: L1_POS (Bitfield-Mask: 0x01) */ -#define ECAT_DC_LATCH1_CONT_L1_NEG_Pos (1UL) /*!< ECAT DC_LATCH1_CONT: L1_NEG (Bit 1) */ -#define ECAT_DC_LATCH1_CONT_L1_NEG_Msk (0x2UL) /*!< ECAT DC_LATCH1_CONT: L1_NEG (Bitfield-Mask: 0x01) */ - -/* ----------------------------- ECAT_DC_LATCH0_STAT ---------------------------- */ -#define ECAT_DC_LATCH0_STAT_EV_L0_POS_Pos (0UL) /*!< ECAT DC_LATCH0_STAT: EV_L0_POS (Bit 0) */ -#define ECAT_DC_LATCH0_STAT_EV_L0_POS_Msk (0x1UL) /*!< ECAT DC_LATCH0_STAT: EV_L0_POS (Bitfield-Mask: 0x01) */ -#define ECAT_DC_LATCH0_STAT_EV_L0_NEG_Pos (1UL) /*!< ECAT DC_LATCH0_STAT: EV_L0_NEG (Bit 1) */ -#define ECAT_DC_LATCH0_STAT_EV_L0_NEG_Msk (0x2UL) /*!< ECAT DC_LATCH0_STAT: EV_L0_NEG (Bitfield-Mask: 0x01) */ -#define ECAT_DC_LATCH0_STAT_L0_PIN_Pos (2UL) /*!< ECAT DC_LATCH0_STAT: L0_PIN (Bit 2) */ -#define ECAT_DC_LATCH0_STAT_L0_PIN_Msk (0x4UL) /*!< ECAT DC_LATCH0_STAT: L0_PIN (Bitfield-Mask: 0x01) */ - -/* ----------------------------- ECAT_DC_LATCH1_STAT ---------------------------- */ -#define ECAT_DC_LATCH1_STAT_EV_L1_POS_Pos (0UL) /*!< ECAT DC_LATCH1_STAT: EV_L1_POS (Bit 0) */ -#define ECAT_DC_LATCH1_STAT_EV_L1_POS_Msk (0x1UL) /*!< ECAT DC_LATCH1_STAT: EV_L1_POS (Bitfield-Mask: 0x01) */ -#define ECAT_DC_LATCH1_STAT_EV_L1_NEG_Pos (1UL) /*!< ECAT DC_LATCH1_STAT: EV_L1_NEG (Bit 1) */ -#define ECAT_DC_LATCH1_STAT_EV_L1_NEG_Msk (0x2UL) /*!< ECAT DC_LATCH1_STAT: EV_L1_NEG (Bitfield-Mask: 0x01) */ -#define ECAT_DC_LATCH1_STAT_L1_PIN_Pos (2UL) /*!< ECAT DC_LATCH1_STAT: L1_PIN (Bit 2) */ -#define ECAT_DC_LATCH1_STAT_L1_PIN_Msk (0x4UL) /*!< ECAT DC_LATCH1_STAT: L1_PIN (Bitfield-Mask: 0x01) */ - -/* --------------------------- ECAT_DC_LATCH0_TIME_POS -------------------------- */ -#define ECAT_DC_LATCH0_TIME_POS_DC_LATCH0_TIME_POS_Pos (0UL) /*!< ECAT DC_LATCH0_TIME_POS: DC_LATCH0_TIME_POS (Bit 0) */ -#define ECAT_DC_LATCH0_TIME_POS_DC_LATCH0_TIME_POS_Msk (0xffffffffUL) /*!< ECAT DC_LATCH0_TIME_POS: DC_LATCH0_TIME_POS (Bitfield-Mask: 0xffffffff) */ - -/* --------------------------- ECAT_DC_LATCH0_TIME_NEG -------------------------- */ -#define ECAT_DC_LATCH0_TIME_NEG_DC_LATCH0_TIME_NEG_Pos (0UL) /*!< ECAT DC_LATCH0_TIME_NEG: DC_LATCH0_TIME_NEG (Bit 0) */ -#define ECAT_DC_LATCH0_TIME_NEG_DC_LATCH0_TIME_NEG_Msk (0xffffffffUL) /*!< ECAT DC_LATCH0_TIME_NEG: DC_LATCH0_TIME_NEG (Bitfield-Mask: 0xffffffff) */ - -/* --------------------------- ECAT_DC_LATCH1_TIME_POS -------------------------- */ -#define ECAT_DC_LATCH1_TIME_POS_DC_LATCH1_TIME_POS_Pos (0UL) /*!< ECAT DC_LATCH1_TIME_POS: DC_LATCH1_TIME_POS (Bit 0) */ -#define ECAT_DC_LATCH1_TIME_POS_DC_LATCH1_TIME_POS_Msk (0xffffffffUL) /*!< ECAT DC_LATCH1_TIME_POS: DC_LATCH1_TIME_POS (Bitfield-Mask: 0xffffffff) */ - -/* --------------------------- ECAT_DC_LATCH1_TIME_NEG -------------------------- */ -#define ECAT_DC_LATCH1_TIME_NEG_DC_LATCH1_TIME_NEG_Pos (0UL) /*!< ECAT DC_LATCH1_TIME_NEG: DC_LATCH1_TIME_NEG (Bit 0) */ -#define ECAT_DC_LATCH1_TIME_NEG_DC_LATCH1_TIME_NEG_Msk (0xffffffffUL) /*!< ECAT DC_LATCH1_TIME_NEG: DC_LATCH1_TIME_NEG (Bitfield-Mask: 0xffffffff) */ - -/* -------------------------- ECAT_DC_ECAT_CNG_EV_TIME -------------------------- */ -#define ECAT_DC_ECAT_CNG_EV_TIME_ECAT_CNG_EV_TIME_Pos (0UL) /*!< ECAT DC_ECAT_CNG_EV_TIME: ECAT_CNG_EV_TIME (Bit 0) */ -#define ECAT_DC_ECAT_CNG_EV_TIME_ECAT_CNG_EV_TIME_Msk (0xffffffffUL) /*!< ECAT DC_ECAT_CNG_EV_TIME: ECAT_CNG_EV_TIME (Bitfield-Mask: 0xffffffff) */ - -/* -------------------------- ECAT_DC_PDI_START_EV_TIME ------------------------- */ -#define ECAT_DC_PDI_START_EV_TIME_PDI_START_EV_TIME_Pos (0UL) /*!< ECAT DC_PDI_START_EV_TIME: PDI_START_EV_TIME (Bit 0) */ -#define ECAT_DC_PDI_START_EV_TIME_PDI_START_EV_TIME_Msk (0xffffffffUL) /*!< ECAT DC_PDI_START_EV_TIME: PDI_START_EV_TIME (Bitfield-Mask: 0xffffffff) */ - -/* --------------------------- ECAT_DC_PDI_CNG_EV_TIME -------------------------- */ -#define ECAT_DC_PDI_CNG_EV_TIME_PDI_CNG_EV_TIME_Pos (0UL) /*!< ECAT DC_PDI_CNG_EV_TIME: PDI_CNG_EV_TIME (Bit 0) */ -#define ECAT_DC_PDI_CNG_EV_TIME_PDI_CNG_EV_TIME_Msk (0xffffffffUL) /*!< ECAT DC_PDI_CNG_EV_TIME: PDI_CNG_EV_TIME (Bitfield-Mask: 0xffffffff) */ - -/* ----------------------------------- ECAT_ID ---------------------------------- */ -#define ECAT_ID_MOD_REV_Pos (0UL) /*!< ECAT ID: MOD_REV (Bit 0) */ -#define ECAT_ID_MOD_REV_Msk (0xffUL) /*!< ECAT ID: MOD_REV (Bitfield-Mask: 0xff) */ -#define ECAT_ID_MOD_TYPE_Pos (8UL) /*!< ECAT ID: MOD_TYPE (Bit 8) */ -#define ECAT_ID_MOD_TYPE_Msk (0xff00UL) /*!< ECAT ID: MOD_TYPE (Bitfield-Mask: 0xff) */ -#define ECAT_ID_MOD_NUMBER_Pos (16UL) /*!< ECAT ID: MOD_NUMBER (Bit 16) */ -#define ECAT_ID_MOD_NUMBER_Msk (0xffff0000UL) /*!< ECAT ID: MOD_NUMBER (Bitfield-Mask: 0xffff) */ - -/* --------------------------------- ECAT_STATUS -------------------------------- */ -#define ECAT_STATUS_PARERR_Pos (0UL) /*!< ECAT STATUS: PARERR (Bit 0) */ -#define ECAT_STATUS_PARERR_Msk (0x1UL) /*!< ECAT STATUS: PARERR (Bitfield-Mask: 0x01) */ - - -/* ================================================================================ */ -/* ================ Group 'USB' Position & Mask ================ */ -/* ================================================================================ */ - - -/* --------------------------------- USB_GOTGCTL -------------------------------- */ -#define USB_GOTGCTL_SesReqScs_Pos (0UL) /*!< USB GOTGCTL: SesReqScs (Bit 0) */ -#define USB_GOTGCTL_SesReqScs_Msk (0x1UL) /*!< USB GOTGCTL: SesReqScs (Bitfield-Mask: 0x01) */ -#define USB_GOTGCTL_SesReq_Pos (1UL) /*!< USB GOTGCTL: SesReq (Bit 1) */ -#define USB_GOTGCTL_SesReq_Msk (0x2UL) /*!< USB GOTGCTL: SesReq (Bitfield-Mask: 0x01) */ -#define USB_GOTGCTL_VbvalidOvEn_Pos (2UL) /*!< USB GOTGCTL: VbvalidOvEn (Bit 2) */ -#define USB_GOTGCTL_VbvalidOvEn_Msk (0x4UL) /*!< USB GOTGCTL: VbvalidOvEn (Bitfield-Mask: 0x01) */ -#define USB_GOTGCTL_VbvalidOvVal_Pos (3UL) /*!< USB GOTGCTL: VbvalidOvVal (Bit 3) */ -#define USB_GOTGCTL_VbvalidOvVal_Msk (0x8UL) /*!< USB GOTGCTL: VbvalidOvVal (Bitfield-Mask: 0x01) */ -#define USB_GOTGCTL_AvalidOvEn_Pos (4UL) /*!< USB GOTGCTL: AvalidOvEn (Bit 4) */ -#define USB_GOTGCTL_AvalidOvEn_Msk (0x10UL) /*!< USB GOTGCTL: AvalidOvEn (Bitfield-Mask: 0x01) */ -#define USB_GOTGCTL_AvalidOvVal_Pos (5UL) /*!< USB GOTGCTL: AvalidOvVal (Bit 5) */ -#define USB_GOTGCTL_AvalidOvVal_Msk (0x20UL) /*!< USB GOTGCTL: AvalidOvVal (Bitfield-Mask: 0x01) */ -#define USB_GOTGCTL_BvalidOvEn_Pos (6UL) /*!< USB GOTGCTL: BvalidOvEn (Bit 6) */ -#define USB_GOTGCTL_BvalidOvEn_Msk (0x40UL) /*!< USB GOTGCTL: BvalidOvEn (Bitfield-Mask: 0x01) */ -#define USB_GOTGCTL_BvalidOvVal_Pos (7UL) /*!< USB GOTGCTL: BvalidOvVal (Bit 7) */ -#define USB_GOTGCTL_BvalidOvVal_Msk (0x80UL) /*!< USB GOTGCTL: BvalidOvVal (Bitfield-Mask: 0x01) */ -#define USB_GOTGCTL_HstNegScs_Pos (8UL) /*!< USB GOTGCTL: HstNegScs (Bit 8) */ -#define USB_GOTGCTL_HstNegScs_Msk (0x100UL) /*!< USB GOTGCTL: HstNegScs (Bitfield-Mask: 0x01) */ -#define USB_GOTGCTL_HNPReq_Pos (9UL) /*!< USB GOTGCTL: HNPReq (Bit 9) */ -#define USB_GOTGCTL_HNPReq_Msk (0x200UL) /*!< USB GOTGCTL: HNPReq (Bitfield-Mask: 0x01) */ -#define USB_GOTGCTL_HstSetHNPEn_Pos (10UL) /*!< USB GOTGCTL: HstSetHNPEn (Bit 10) */ -#define USB_GOTGCTL_HstSetHNPEn_Msk (0x400UL) /*!< USB GOTGCTL: HstSetHNPEn (Bitfield-Mask: 0x01) */ -#define USB_GOTGCTL_DevHNPEn_Pos (11UL) /*!< USB GOTGCTL: DevHNPEn (Bit 11) */ -#define USB_GOTGCTL_DevHNPEn_Msk (0x800UL) /*!< USB GOTGCTL: DevHNPEn (Bitfield-Mask: 0x01) */ -#define USB_GOTGCTL_ConlDSts_Pos (16UL) /*!< USB GOTGCTL: ConlDSts (Bit 16) */ -#define USB_GOTGCTL_ConlDSts_Msk (0x10000UL) /*!< USB GOTGCTL: ConlDSts (Bitfield-Mask: 0x01) */ -#define USB_GOTGCTL_DbncTime_Pos (17UL) /*!< USB GOTGCTL: DbncTime (Bit 17) */ -#define USB_GOTGCTL_DbncTime_Msk (0x20000UL) /*!< USB GOTGCTL: DbncTime (Bitfield-Mask: 0x01) */ -#define USB_GOTGCTL_ASesVId_Pos (18UL) /*!< USB GOTGCTL: ASesVId (Bit 18) */ -#define USB_GOTGCTL_ASesVId_Msk (0x40000UL) /*!< USB GOTGCTL: ASesVId (Bitfield-Mask: 0x01) */ -#define USB_GOTGCTL_BSesVld_Pos (19UL) /*!< USB GOTGCTL: BSesVld (Bit 19) */ -#define USB_GOTGCTL_BSesVld_Msk (0x80000UL) /*!< USB GOTGCTL: BSesVld (Bitfield-Mask: 0x01) */ -#define USB_GOTGCTL_OTGVer_Pos (20UL) /*!< USB GOTGCTL: OTGVer (Bit 20) */ -#define USB_GOTGCTL_OTGVer_Msk (0x100000UL) /*!< USB GOTGCTL: OTGVer (Bitfield-Mask: 0x01) */ - -/* --------------------------------- USB_GOTGINT -------------------------------- */ -#define USB_GOTGINT_SesEndDet_Pos (2UL) /*!< USB GOTGINT: SesEndDet (Bit 2) */ -#define USB_GOTGINT_SesEndDet_Msk (0x4UL) /*!< USB GOTGINT: SesEndDet (Bitfield-Mask: 0x01) */ -#define USB_GOTGINT_SesReqSucStsChng_Pos (8UL) /*!< USB GOTGINT: SesReqSucStsChng (Bit 8) */ -#define USB_GOTGINT_SesReqSucStsChng_Msk (0x100UL) /*!< USB GOTGINT: SesReqSucStsChng (Bitfield-Mask: 0x01) */ -#define USB_GOTGINT_HstNegSucStsChng_Pos (9UL) /*!< USB GOTGINT: HstNegSucStsChng (Bit 9) */ -#define USB_GOTGINT_HstNegSucStsChng_Msk (0x200UL) /*!< USB GOTGINT: HstNegSucStsChng (Bitfield-Mask: 0x01) */ -#define USB_GOTGINT_HstNegDet_Pos (17UL) /*!< USB GOTGINT: HstNegDet (Bit 17) */ -#define USB_GOTGINT_HstNegDet_Msk (0x20000UL) /*!< USB GOTGINT: HstNegDet (Bitfield-Mask: 0x01) */ -#define USB_GOTGINT_ADevTOUTChg_Pos (18UL) /*!< USB GOTGINT: ADevTOUTChg (Bit 18) */ -#define USB_GOTGINT_ADevTOUTChg_Msk (0x40000UL) /*!< USB GOTGINT: ADevTOUTChg (Bitfield-Mask: 0x01) */ -#define USB_GOTGINT_DbnceDone_Pos (19UL) /*!< USB GOTGINT: DbnceDone (Bit 19) */ -#define USB_GOTGINT_DbnceDone_Msk (0x80000UL) /*!< USB GOTGINT: DbnceDone (Bitfield-Mask: 0x01) */ - -/* --------------------------------- USB_GAHBCFG -------------------------------- */ -#define USB_GAHBCFG_GlblIntrMsk_Pos (0UL) /*!< USB GAHBCFG: GlblIntrMsk (Bit 0) */ -#define USB_GAHBCFG_GlblIntrMsk_Msk (0x1UL) /*!< USB GAHBCFG: GlblIntrMsk (Bitfield-Mask: 0x01) */ -#define USB_GAHBCFG_HBstLen_Pos (1UL) /*!< USB GAHBCFG: HBstLen (Bit 1) */ -#define USB_GAHBCFG_HBstLen_Msk (0x1eUL) /*!< USB GAHBCFG: HBstLen (Bitfield-Mask: 0x0f) */ -#define USB_GAHBCFG_DMAEn_Pos (5UL) /*!< USB GAHBCFG: DMAEn (Bit 5) */ -#define USB_GAHBCFG_DMAEn_Msk (0x20UL) /*!< USB GAHBCFG: DMAEn (Bitfield-Mask: 0x01) */ -#define USB_GAHBCFG_NPTxFEmpLvl_Pos (7UL) /*!< USB GAHBCFG: NPTxFEmpLvl (Bit 7) */ -#define USB_GAHBCFG_NPTxFEmpLvl_Msk (0x80UL) /*!< USB GAHBCFG: NPTxFEmpLvl (Bitfield-Mask: 0x01) */ -#define USB_GAHBCFG_PTxFEmpLvl_Pos (8UL) /*!< USB GAHBCFG: PTxFEmpLvl (Bit 8) */ -#define USB_GAHBCFG_PTxFEmpLvl_Msk (0x100UL) /*!< USB GAHBCFG: PTxFEmpLvl (Bitfield-Mask: 0x01) */ -#define USB_GAHBCFG_AHBSingle_Pos (23UL) /*!< USB GAHBCFG: AHBSingle (Bit 23) */ -#define USB_GAHBCFG_AHBSingle_Msk (0x800000UL) /*!< USB GAHBCFG: AHBSingle (Bitfield-Mask: 0x01) */ - -/* --------------------------------- USB_GUSBCFG -------------------------------- */ -#define USB_GUSBCFG_TOutCal_Pos (0UL) /*!< USB GUSBCFG: TOutCal (Bit 0) */ -#define USB_GUSBCFG_TOutCal_Msk (0x7UL) /*!< USB GUSBCFG: TOutCal (Bitfield-Mask: 0x07) */ -#define USB_GUSBCFG_PHYSel_Pos (6UL) /*!< USB GUSBCFG: PHYSel (Bit 6) */ -#define USB_GUSBCFG_PHYSel_Msk (0x40UL) /*!< USB GUSBCFG: PHYSel (Bitfield-Mask: 0x01) */ -#define USB_GUSBCFG_SRPCap_Pos (8UL) /*!< USB GUSBCFG: SRPCap (Bit 8) */ -#define USB_GUSBCFG_SRPCap_Msk (0x100UL) /*!< USB GUSBCFG: SRPCap (Bitfield-Mask: 0x01) */ -#define USB_GUSBCFG_HNPCap_Pos (9UL) /*!< USB GUSBCFG: HNPCap (Bit 9) */ -#define USB_GUSBCFG_HNPCap_Msk (0x200UL) /*!< USB GUSBCFG: HNPCap (Bitfield-Mask: 0x01) */ -#define USB_GUSBCFG_USBTrdTim_Pos (10UL) /*!< USB GUSBCFG: USBTrdTim (Bit 10) */ -#define USB_GUSBCFG_USBTrdTim_Msk (0x3c00UL) /*!< USB GUSBCFG: USBTrdTim (Bitfield-Mask: 0x0f) */ -#define USB_GUSBCFG_OtgI2CSel_Pos (16UL) /*!< USB GUSBCFG: OtgI2CSel (Bit 16) */ -#define USB_GUSBCFG_OtgI2CSel_Msk (0x10000UL) /*!< USB GUSBCFG: OtgI2CSel (Bitfield-Mask: 0x01) */ -#define USB_GUSBCFG_TxEndDelay_Pos (28UL) /*!< USB GUSBCFG: TxEndDelay (Bit 28) */ -#define USB_GUSBCFG_TxEndDelay_Msk (0x10000000UL) /*!< USB GUSBCFG: TxEndDelay (Bitfield-Mask: 0x01) */ -#define USB_GUSBCFG_ForceHstMode_Pos (29UL) /*!< USB GUSBCFG: ForceHstMode (Bit 29) */ -#define USB_GUSBCFG_ForceHstMode_Msk (0x20000000UL) /*!< USB GUSBCFG: ForceHstMode (Bitfield-Mask: 0x01) */ -#define USB_GUSBCFG_ForceDevMode_Pos (30UL) /*!< USB GUSBCFG: ForceDevMode (Bit 30) */ -#define USB_GUSBCFG_ForceDevMode_Msk (0x40000000UL) /*!< USB GUSBCFG: ForceDevMode (Bitfield-Mask: 0x01) */ -#define USB_GUSBCFG_CTP_Pos (31UL) /*!< USB GUSBCFG: CTP (Bit 31) */ -#define USB_GUSBCFG_CTP_Msk (0x80000000UL) /*!< USB GUSBCFG: CTP (Bitfield-Mask: 0x01) */ - -/* --------------------------------- USB_GRSTCTL -------------------------------- */ -#define USB_GRSTCTL_CSftRst_Pos (0UL) /*!< USB GRSTCTL: CSftRst (Bit 0) */ -#define USB_GRSTCTL_CSftRst_Msk (0x1UL) /*!< USB GRSTCTL: CSftRst (Bitfield-Mask: 0x01) */ -#define USB_GRSTCTL_FrmCntrRst_Pos (2UL) /*!< USB GRSTCTL: FrmCntrRst (Bit 2) */ -#define USB_GRSTCTL_FrmCntrRst_Msk (0x4UL) /*!< USB GRSTCTL: FrmCntrRst (Bitfield-Mask: 0x01) */ -#define USB_GRSTCTL_RxFFlsh_Pos (4UL) /*!< USB GRSTCTL: RxFFlsh (Bit 4) */ -#define USB_GRSTCTL_RxFFlsh_Msk (0x10UL) /*!< USB GRSTCTL: RxFFlsh (Bitfield-Mask: 0x01) */ -#define USB_GRSTCTL_TxFFlsh_Pos (5UL) /*!< USB GRSTCTL: TxFFlsh (Bit 5) */ -#define USB_GRSTCTL_TxFFlsh_Msk (0x20UL) /*!< USB GRSTCTL: TxFFlsh (Bitfield-Mask: 0x01) */ -#define USB_GRSTCTL_TxFNum_Pos (6UL) /*!< USB GRSTCTL: TxFNum (Bit 6) */ -#define USB_GRSTCTL_TxFNum_Msk (0x7c0UL) /*!< USB GRSTCTL: TxFNum (Bitfield-Mask: 0x1f) */ -#define USB_GRSTCTL_DMAReq_Pos (30UL) /*!< USB GRSTCTL: DMAReq (Bit 30) */ -#define USB_GRSTCTL_DMAReq_Msk (0x40000000UL) /*!< USB GRSTCTL: DMAReq (Bitfield-Mask: 0x01) */ -#define USB_GRSTCTL_AHBIdle_Pos (31UL) /*!< USB GRSTCTL: AHBIdle (Bit 31) */ -#define USB_GRSTCTL_AHBIdle_Msk (0x80000000UL) /*!< USB GRSTCTL: AHBIdle (Bitfield-Mask: 0x01) */ - -/* ---------------------------- USB_GINTSTS_HOSTMODE ---------------------------- */ -#define USB_GINTSTS_HOSTMODE_CurMod_Pos (0UL) /*!< USB GINTSTS_HOSTMODE: CurMod (Bit 0) */ -#define USB_GINTSTS_HOSTMODE_CurMod_Msk (0x1UL) /*!< USB GINTSTS_HOSTMODE: CurMod (Bitfield-Mask: 0x01) */ -#define USB_GINTSTS_HOSTMODE_ModeMis_Pos (1UL) /*!< USB GINTSTS_HOSTMODE: ModeMis (Bit 1) */ -#define USB_GINTSTS_HOSTMODE_ModeMis_Msk (0x2UL) /*!< USB GINTSTS_HOSTMODE: ModeMis (Bitfield-Mask: 0x01) */ -#define USB_GINTSTS_HOSTMODE_OTGInt_Pos (2UL) /*!< USB GINTSTS_HOSTMODE: OTGInt (Bit 2) */ -#define USB_GINTSTS_HOSTMODE_OTGInt_Msk (0x4UL) /*!< USB GINTSTS_HOSTMODE: OTGInt (Bitfield-Mask: 0x01) */ -#define USB_GINTSTS_HOSTMODE_Sof_Pos (3UL) /*!< USB GINTSTS_HOSTMODE: Sof (Bit 3) */ -#define USB_GINTSTS_HOSTMODE_Sof_Msk (0x8UL) /*!< USB GINTSTS_HOSTMODE: Sof (Bitfield-Mask: 0x01) */ -#define USB_GINTSTS_HOSTMODE_RxFLvl_Pos (4UL) /*!< USB GINTSTS_HOSTMODE: RxFLvl (Bit 4) */ -#define USB_GINTSTS_HOSTMODE_RxFLvl_Msk (0x10UL) /*!< USB GINTSTS_HOSTMODE: RxFLvl (Bitfield-Mask: 0x01) */ -#define USB_GINTSTS_HOSTMODE_incomplP_Pos (21UL) /*!< USB GINTSTS_HOSTMODE: incomplP (Bit 21) */ -#define USB_GINTSTS_HOSTMODE_incomplP_Msk (0x200000UL) /*!< USB GINTSTS_HOSTMODE: incomplP (Bitfield-Mask: 0x01) */ -#define USB_GINTSTS_HOSTMODE_PrtInt_Pos (24UL) /*!< USB GINTSTS_HOSTMODE: PrtInt (Bit 24) */ -#define USB_GINTSTS_HOSTMODE_PrtInt_Msk (0x1000000UL) /*!< USB GINTSTS_HOSTMODE: PrtInt (Bitfield-Mask: 0x01) */ -#define USB_GINTSTS_HOSTMODE_HChInt_Pos (25UL) /*!< USB GINTSTS_HOSTMODE: HChInt (Bit 25) */ -#define USB_GINTSTS_HOSTMODE_HChInt_Msk (0x2000000UL) /*!< USB GINTSTS_HOSTMODE: HChInt (Bitfield-Mask: 0x01) */ -#define USB_GINTSTS_HOSTMODE_PTxFEmp_Pos (26UL) /*!< USB GINTSTS_HOSTMODE: PTxFEmp (Bit 26) */ -#define USB_GINTSTS_HOSTMODE_PTxFEmp_Msk (0x4000000UL) /*!< USB GINTSTS_HOSTMODE: PTxFEmp (Bitfield-Mask: 0x01) */ -#define USB_GINTSTS_HOSTMODE_ConIDStsChng_Pos (28UL) /*!< USB GINTSTS_HOSTMODE: ConIDStsChng (Bit 28) */ -#define USB_GINTSTS_HOSTMODE_ConIDStsChng_Msk (0x10000000UL) /*!< USB GINTSTS_HOSTMODE: ConIDStsChng (Bitfield-Mask: 0x01) */ -#define USB_GINTSTS_HOSTMODE_DisconnInt_Pos (29UL) /*!< USB GINTSTS_HOSTMODE: DisconnInt (Bit 29) */ -#define USB_GINTSTS_HOSTMODE_DisconnInt_Msk (0x20000000UL) /*!< USB GINTSTS_HOSTMODE: DisconnInt (Bitfield-Mask: 0x01) */ -#define USB_GINTSTS_HOSTMODE_SessReqInt_Pos (30UL) /*!< USB GINTSTS_HOSTMODE: SessReqInt (Bit 30) */ -#define USB_GINTSTS_HOSTMODE_SessReqInt_Msk (0x40000000UL) /*!< USB GINTSTS_HOSTMODE: SessReqInt (Bitfield-Mask: 0x01) */ -#define USB_GINTSTS_HOSTMODE_WkUpInt_Pos (31UL) /*!< USB GINTSTS_HOSTMODE: WkUpInt (Bit 31) */ -#define USB_GINTSTS_HOSTMODE_WkUpInt_Msk (0x80000000UL) /*!< USB GINTSTS_HOSTMODE: WkUpInt (Bitfield-Mask: 0x01) */ - -/* --------------------------- USB_GINTSTS_DEVICEMODE --------------------------- */ -#define USB_GINTSTS_DEVICEMODE_CurMod_Pos (0UL) /*!< USB GINTSTS_DEVICEMODE: CurMod (Bit 0) */ -#define USB_GINTSTS_DEVICEMODE_CurMod_Msk (0x1UL) /*!< USB GINTSTS_DEVICEMODE: CurMod (Bitfield-Mask: 0x01) */ -#define USB_GINTSTS_DEVICEMODE_ModeMis_Pos (1UL) /*!< USB GINTSTS_DEVICEMODE: ModeMis (Bit 1) */ -#define USB_GINTSTS_DEVICEMODE_ModeMis_Msk (0x2UL) /*!< USB GINTSTS_DEVICEMODE: ModeMis (Bitfield-Mask: 0x01) */ -#define USB_GINTSTS_DEVICEMODE_OTGInt_Pos (2UL) /*!< USB GINTSTS_DEVICEMODE: OTGInt (Bit 2) */ -#define USB_GINTSTS_DEVICEMODE_OTGInt_Msk (0x4UL) /*!< USB GINTSTS_DEVICEMODE: OTGInt (Bitfield-Mask: 0x01) */ -#define USB_GINTSTS_DEVICEMODE_Sof_Pos (3UL) /*!< USB GINTSTS_DEVICEMODE: Sof (Bit 3) */ -#define USB_GINTSTS_DEVICEMODE_Sof_Msk (0x8UL) /*!< USB GINTSTS_DEVICEMODE: Sof (Bitfield-Mask: 0x01) */ -#define USB_GINTSTS_DEVICEMODE_RxFLvl_Pos (4UL) /*!< USB GINTSTS_DEVICEMODE: RxFLvl (Bit 4) */ -#define USB_GINTSTS_DEVICEMODE_RxFLvl_Msk (0x10UL) /*!< USB GINTSTS_DEVICEMODE: RxFLvl (Bitfield-Mask: 0x01) */ -#define USB_GINTSTS_DEVICEMODE_GINNakEff_Pos (6UL) /*!< USB GINTSTS_DEVICEMODE: GINNakEff (Bit 6) */ -#define USB_GINTSTS_DEVICEMODE_GINNakEff_Msk (0x40UL) /*!< USB GINTSTS_DEVICEMODE: GINNakEff (Bitfield-Mask: 0x01) */ -#define USB_GINTSTS_DEVICEMODE_GOUTNakEff_Pos (7UL) /*!< USB GINTSTS_DEVICEMODE: GOUTNakEff (Bit 7) */ -#define USB_GINTSTS_DEVICEMODE_GOUTNakEff_Msk (0x80UL) /*!< USB GINTSTS_DEVICEMODE: GOUTNakEff (Bitfield-Mask: 0x01) */ -#define USB_GINTSTS_DEVICEMODE_ErlySusp_Pos (10UL) /*!< USB GINTSTS_DEVICEMODE: ErlySusp (Bit 10) */ -#define USB_GINTSTS_DEVICEMODE_ErlySusp_Msk (0x400UL) /*!< USB GINTSTS_DEVICEMODE: ErlySusp (Bitfield-Mask: 0x01) */ -#define USB_GINTSTS_DEVICEMODE_USBSusp_Pos (11UL) /*!< USB GINTSTS_DEVICEMODE: USBSusp (Bit 11) */ -#define USB_GINTSTS_DEVICEMODE_USBSusp_Msk (0x800UL) /*!< USB GINTSTS_DEVICEMODE: USBSusp (Bitfield-Mask: 0x01) */ -#define USB_GINTSTS_DEVICEMODE_USBRst_Pos (12UL) /*!< USB GINTSTS_DEVICEMODE: USBRst (Bit 12) */ -#define USB_GINTSTS_DEVICEMODE_USBRst_Msk (0x1000UL) /*!< USB GINTSTS_DEVICEMODE: USBRst (Bitfield-Mask: 0x01) */ -#define USB_GINTSTS_DEVICEMODE_EnumDone_Pos (13UL) /*!< USB GINTSTS_DEVICEMODE: EnumDone (Bit 13) */ -#define USB_GINTSTS_DEVICEMODE_EnumDone_Msk (0x2000UL) /*!< USB GINTSTS_DEVICEMODE: EnumDone (Bitfield-Mask: 0x01) */ -#define USB_GINTSTS_DEVICEMODE_ISOOutDrop_Pos (14UL) /*!< USB GINTSTS_DEVICEMODE: ISOOutDrop (Bit 14) */ -#define USB_GINTSTS_DEVICEMODE_ISOOutDrop_Msk (0x4000UL) /*!< USB GINTSTS_DEVICEMODE: ISOOutDrop (Bitfield-Mask: 0x01) */ -#define USB_GINTSTS_DEVICEMODE_EOPF_Pos (15UL) /*!< USB GINTSTS_DEVICEMODE: EOPF (Bit 15) */ -#define USB_GINTSTS_DEVICEMODE_EOPF_Msk (0x8000UL) /*!< USB GINTSTS_DEVICEMODE: EOPF (Bitfield-Mask: 0x01) */ -#define USB_GINTSTS_DEVICEMODE_IEPInt_Pos (18UL) /*!< USB GINTSTS_DEVICEMODE: IEPInt (Bit 18) */ -#define USB_GINTSTS_DEVICEMODE_IEPInt_Msk (0x40000UL) /*!< USB GINTSTS_DEVICEMODE: IEPInt (Bitfield-Mask: 0x01) */ -#define USB_GINTSTS_DEVICEMODE_OEPInt_Pos (19UL) /*!< USB GINTSTS_DEVICEMODE: OEPInt (Bit 19) */ -#define USB_GINTSTS_DEVICEMODE_OEPInt_Msk (0x80000UL) /*!< USB GINTSTS_DEVICEMODE: OEPInt (Bitfield-Mask: 0x01) */ -#define USB_GINTSTS_DEVICEMODE_incompISOIN_Pos (20UL) /*!< USB GINTSTS_DEVICEMODE: incompISOIN (Bit 20) */ -#define USB_GINTSTS_DEVICEMODE_incompISOIN_Msk (0x100000UL) /*!< USB GINTSTS_DEVICEMODE: incompISOIN (Bitfield-Mask: 0x01) */ -#define USB_GINTSTS_DEVICEMODE_incomplSOOUT_Pos (21UL) /*!< USB GINTSTS_DEVICEMODE: incomplSOOUT (Bit 21) */ -#define USB_GINTSTS_DEVICEMODE_incomplSOOUT_Msk (0x200000UL) /*!< USB GINTSTS_DEVICEMODE: incomplSOOUT (Bitfield-Mask: 0x01) */ -#define USB_GINTSTS_DEVICEMODE_ConIDStsChng_Pos (28UL) /*!< USB GINTSTS_DEVICEMODE: ConIDStsChng (Bit 28) */ -#define USB_GINTSTS_DEVICEMODE_ConIDStsChng_Msk (0x10000000UL) /*!< USB GINTSTS_DEVICEMODE: ConIDStsChng (Bitfield-Mask: 0x01) */ -#define USB_GINTSTS_DEVICEMODE_SessReqInt_Pos (30UL) /*!< USB GINTSTS_DEVICEMODE: SessReqInt (Bit 30) */ -#define USB_GINTSTS_DEVICEMODE_SessReqInt_Msk (0x40000000UL) /*!< USB GINTSTS_DEVICEMODE: SessReqInt (Bitfield-Mask: 0x01) */ -#define USB_GINTSTS_DEVICEMODE_WkUpInt_Pos (31UL) /*!< USB GINTSTS_DEVICEMODE: WkUpInt (Bit 31) */ -#define USB_GINTSTS_DEVICEMODE_WkUpInt_Msk (0x80000000UL) /*!< USB GINTSTS_DEVICEMODE: WkUpInt (Bitfield-Mask: 0x01) */ - -/* ---------------------------- USB_GINTMSK_HOSTMODE ---------------------------- */ -#define USB_GINTMSK_HOSTMODE_ModeMisMsk_Pos (1UL) /*!< USB GINTMSK_HOSTMODE: ModeMisMsk (Bit 1) */ -#define USB_GINTMSK_HOSTMODE_ModeMisMsk_Msk (0x2UL) /*!< USB GINTMSK_HOSTMODE: ModeMisMsk (Bitfield-Mask: 0x01) */ -#define USB_GINTMSK_HOSTMODE_OTGIntMsk_Pos (2UL) /*!< USB GINTMSK_HOSTMODE: OTGIntMsk (Bit 2) */ -#define USB_GINTMSK_HOSTMODE_OTGIntMsk_Msk (0x4UL) /*!< USB GINTMSK_HOSTMODE: OTGIntMsk (Bitfield-Mask: 0x01) */ -#define USB_GINTMSK_HOSTMODE_SofMsk_Pos (3UL) /*!< USB GINTMSK_HOSTMODE: SofMsk (Bit 3) */ -#define USB_GINTMSK_HOSTMODE_SofMsk_Msk (0x8UL) /*!< USB GINTMSK_HOSTMODE: SofMsk (Bitfield-Mask: 0x01) */ -#define USB_GINTMSK_HOSTMODE_RxFLvlMsk_Pos (4UL) /*!< USB GINTMSK_HOSTMODE: RxFLvlMsk (Bit 4) */ -#define USB_GINTMSK_HOSTMODE_RxFLvlMsk_Msk (0x10UL) /*!< USB GINTMSK_HOSTMODE: RxFLvlMsk (Bitfield-Mask: 0x01) */ -#define USB_GINTMSK_HOSTMODE_incomplPMsk_Pos (21UL) /*!< USB GINTMSK_HOSTMODE: incomplPMsk (Bit 21) */ -#define USB_GINTMSK_HOSTMODE_incomplPMsk_Msk (0x200000UL) /*!< USB GINTMSK_HOSTMODE: incomplPMsk (Bitfield-Mask: 0x01) */ -#define USB_GINTMSK_HOSTMODE_PrtIntMsk_Pos (24UL) /*!< USB GINTMSK_HOSTMODE: PrtIntMsk (Bit 24) */ -#define USB_GINTMSK_HOSTMODE_PrtIntMsk_Msk (0x1000000UL) /*!< USB GINTMSK_HOSTMODE: PrtIntMsk (Bitfield-Mask: 0x01) */ -#define USB_GINTMSK_HOSTMODE_HChIntMsk_Pos (25UL) /*!< USB GINTMSK_HOSTMODE: HChIntMsk (Bit 25) */ -#define USB_GINTMSK_HOSTMODE_HChIntMsk_Msk (0x2000000UL) /*!< USB GINTMSK_HOSTMODE: HChIntMsk (Bitfield-Mask: 0x01) */ -#define USB_GINTMSK_HOSTMODE_PTxFEmpMsk_Pos (26UL) /*!< USB GINTMSK_HOSTMODE: PTxFEmpMsk (Bit 26) */ -#define USB_GINTMSK_HOSTMODE_PTxFEmpMsk_Msk (0x4000000UL) /*!< USB GINTMSK_HOSTMODE: PTxFEmpMsk (Bitfield-Mask: 0x01) */ -#define USB_GINTMSK_HOSTMODE_ConIDStsChngMsk_Pos (28UL) /*!< USB GINTMSK_HOSTMODE: ConIDStsChngMsk (Bit 28) */ -#define USB_GINTMSK_HOSTMODE_ConIDStsChngMsk_Msk (0x10000000UL) /*!< USB GINTMSK_HOSTMODE: ConIDStsChngMsk (Bitfield-Mask: 0x01) */ -#define USB_GINTMSK_HOSTMODE_DisconnIntMsk_Pos (29UL) /*!< USB GINTMSK_HOSTMODE: DisconnIntMsk (Bit 29) */ -#define USB_GINTMSK_HOSTMODE_DisconnIntMsk_Msk (0x20000000UL) /*!< USB GINTMSK_HOSTMODE: DisconnIntMsk (Bitfield-Mask: 0x01) */ -#define USB_GINTMSK_HOSTMODE_SessReqIntMsk_Pos (30UL) /*!< USB GINTMSK_HOSTMODE: SessReqIntMsk (Bit 30) */ -#define USB_GINTMSK_HOSTMODE_SessReqIntMsk_Msk (0x40000000UL) /*!< USB GINTMSK_HOSTMODE: SessReqIntMsk (Bitfield-Mask: 0x01) */ -#define USB_GINTMSK_HOSTMODE_WkUpIntMsk_Pos (31UL) /*!< USB GINTMSK_HOSTMODE: WkUpIntMsk (Bit 31) */ -#define USB_GINTMSK_HOSTMODE_WkUpIntMsk_Msk (0x80000000UL) /*!< USB GINTMSK_HOSTMODE: WkUpIntMsk (Bitfield-Mask: 0x01) */ - -/* --------------------------- USB_GINTMSK_DEVICEMODE --------------------------- */ -#define USB_GINTMSK_DEVICEMODE_ModeMisMsk_Pos (1UL) /*!< USB GINTMSK_DEVICEMODE: ModeMisMsk (Bit 1) */ -#define USB_GINTMSK_DEVICEMODE_ModeMisMsk_Msk (0x2UL) /*!< USB GINTMSK_DEVICEMODE: ModeMisMsk (Bitfield-Mask: 0x01) */ -#define USB_GINTMSK_DEVICEMODE_OTGIntMsk_Pos (2UL) /*!< USB GINTMSK_DEVICEMODE: OTGIntMsk (Bit 2) */ -#define USB_GINTMSK_DEVICEMODE_OTGIntMsk_Msk (0x4UL) /*!< USB GINTMSK_DEVICEMODE: OTGIntMsk (Bitfield-Mask: 0x01) */ -#define USB_GINTMSK_DEVICEMODE_SofMsk_Pos (3UL) /*!< USB GINTMSK_DEVICEMODE: SofMsk (Bit 3) */ -#define USB_GINTMSK_DEVICEMODE_SofMsk_Msk (0x8UL) /*!< USB GINTMSK_DEVICEMODE: SofMsk (Bitfield-Mask: 0x01) */ -#define USB_GINTMSK_DEVICEMODE_RxFLvlMsk_Pos (4UL) /*!< USB GINTMSK_DEVICEMODE: RxFLvlMsk (Bit 4) */ -#define USB_GINTMSK_DEVICEMODE_RxFLvlMsk_Msk (0x10UL) /*!< USB GINTMSK_DEVICEMODE: RxFLvlMsk (Bitfield-Mask: 0x01) */ -#define USB_GINTMSK_DEVICEMODE_GINNakEffMsk_Pos (6UL) /*!< USB GINTMSK_DEVICEMODE: GINNakEffMsk (Bit 6) */ -#define USB_GINTMSK_DEVICEMODE_GINNakEffMsk_Msk (0x40UL) /*!< USB GINTMSK_DEVICEMODE: GINNakEffMsk (Bitfield-Mask: 0x01) */ -#define USB_GINTMSK_DEVICEMODE_GOUTNakEffMsk_Pos (7UL) /*!< USB GINTMSK_DEVICEMODE: GOUTNakEffMsk (Bit 7) */ -#define USB_GINTMSK_DEVICEMODE_GOUTNakEffMsk_Msk (0x80UL) /*!< USB GINTMSK_DEVICEMODE: GOUTNakEffMsk (Bitfield-Mask: 0x01) */ -#define USB_GINTMSK_DEVICEMODE_ErlySuspMsk_Pos (10UL) /*!< USB GINTMSK_DEVICEMODE: ErlySuspMsk (Bit 10) */ -#define USB_GINTMSK_DEVICEMODE_ErlySuspMsk_Msk (0x400UL) /*!< USB GINTMSK_DEVICEMODE: ErlySuspMsk (Bitfield-Mask: 0x01) */ -#define USB_GINTMSK_DEVICEMODE_USBSuspMsk_Pos (11UL) /*!< USB GINTMSK_DEVICEMODE: USBSuspMsk (Bit 11) */ -#define USB_GINTMSK_DEVICEMODE_USBSuspMsk_Msk (0x800UL) /*!< USB GINTMSK_DEVICEMODE: USBSuspMsk (Bitfield-Mask: 0x01) */ -#define USB_GINTMSK_DEVICEMODE_USBRstMsk_Pos (12UL) /*!< USB GINTMSK_DEVICEMODE: USBRstMsk (Bit 12) */ -#define USB_GINTMSK_DEVICEMODE_USBRstMsk_Msk (0x1000UL) /*!< USB GINTMSK_DEVICEMODE: USBRstMsk (Bitfield-Mask: 0x01) */ -#define USB_GINTMSK_DEVICEMODE_EnumDoneMsk_Pos (13UL) /*!< USB GINTMSK_DEVICEMODE: EnumDoneMsk (Bit 13) */ -#define USB_GINTMSK_DEVICEMODE_EnumDoneMsk_Msk (0x2000UL) /*!< USB GINTMSK_DEVICEMODE: EnumDoneMsk (Bitfield-Mask: 0x01) */ -#define USB_GINTMSK_DEVICEMODE_ISOOutDropMsk_Pos (14UL) /*!< USB GINTMSK_DEVICEMODE: ISOOutDropMsk (Bit 14) */ -#define USB_GINTMSK_DEVICEMODE_ISOOutDropMsk_Msk (0x4000UL) /*!< USB GINTMSK_DEVICEMODE: ISOOutDropMsk (Bitfield-Mask: 0x01) */ -#define USB_GINTMSK_DEVICEMODE_EOPFMsk_Pos (15UL) /*!< USB GINTMSK_DEVICEMODE: EOPFMsk (Bit 15) */ -#define USB_GINTMSK_DEVICEMODE_EOPFMsk_Msk (0x8000UL) /*!< USB GINTMSK_DEVICEMODE: EOPFMsk (Bitfield-Mask: 0x01) */ -#define USB_GINTMSK_DEVICEMODE_IEPIntMsk_Pos (18UL) /*!< USB GINTMSK_DEVICEMODE: IEPIntMsk (Bit 18) */ -#define USB_GINTMSK_DEVICEMODE_IEPIntMsk_Msk (0x40000UL) /*!< USB GINTMSK_DEVICEMODE: IEPIntMsk (Bitfield-Mask: 0x01) */ -#define USB_GINTMSK_DEVICEMODE_OEPIntMsk_Pos (19UL) /*!< USB GINTMSK_DEVICEMODE: OEPIntMsk (Bit 19) */ -#define USB_GINTMSK_DEVICEMODE_OEPIntMsk_Msk (0x80000UL) /*!< USB GINTMSK_DEVICEMODE: OEPIntMsk (Bitfield-Mask: 0x01) */ -#define USB_GINTMSK_DEVICEMODE_incompISOINMsk_Pos (20UL) /*!< USB GINTMSK_DEVICEMODE: incompISOINMsk (Bit 20) */ -#define USB_GINTMSK_DEVICEMODE_incompISOINMsk_Msk (0x100000UL) /*!< USB GINTMSK_DEVICEMODE: incompISOINMsk (Bitfield-Mask: 0x01) */ -#define USB_GINTMSK_DEVICEMODE_incomplSOOUTMsk_Pos (21UL) /*!< USB GINTMSK_DEVICEMODE: incomplSOOUTMsk (Bit 21) */ -#define USB_GINTMSK_DEVICEMODE_incomplSOOUTMsk_Msk (0x200000UL) /*!< USB GINTMSK_DEVICEMODE: incomplSOOUTMsk (Bitfield-Mask: 0x01) */ -#define USB_GINTMSK_DEVICEMODE_ConIDStsChngMsk_Pos (28UL) /*!< USB GINTMSK_DEVICEMODE: ConIDStsChngMsk (Bit 28) */ -#define USB_GINTMSK_DEVICEMODE_ConIDStsChngMsk_Msk (0x10000000UL) /*!< USB GINTMSK_DEVICEMODE: ConIDStsChngMsk (Bitfield-Mask: 0x01) */ -#define USB_GINTMSK_DEVICEMODE_DisconnIntMsk_Pos (29UL) /*!< USB GINTMSK_DEVICEMODE: DisconnIntMsk (Bit 29) */ -#define USB_GINTMSK_DEVICEMODE_DisconnIntMsk_Msk (0x20000000UL) /*!< USB GINTMSK_DEVICEMODE: DisconnIntMsk (Bitfield-Mask: 0x01) */ -#define USB_GINTMSK_DEVICEMODE_SessReqIntMsk_Pos (30UL) /*!< USB GINTMSK_DEVICEMODE: SessReqIntMsk (Bit 30) */ -#define USB_GINTMSK_DEVICEMODE_SessReqIntMsk_Msk (0x40000000UL) /*!< USB GINTMSK_DEVICEMODE: SessReqIntMsk (Bitfield-Mask: 0x01) */ -#define USB_GINTMSK_DEVICEMODE_WkUpIntMsk_Pos (31UL) /*!< USB GINTMSK_DEVICEMODE: WkUpIntMsk (Bit 31) */ -#define USB_GINTMSK_DEVICEMODE_WkUpIntMsk_Msk (0x80000000UL) /*!< USB GINTMSK_DEVICEMODE: WkUpIntMsk (Bitfield-Mask: 0x01) */ - -/* ---------------------------- USB_GRXSTSR_HOSTMODE ---------------------------- */ -#define USB_GRXSTSR_HOSTMODE_ChNum_Pos (0UL) /*!< USB GRXSTSR_HOSTMODE: ChNum (Bit 0) */ -#define USB_GRXSTSR_HOSTMODE_ChNum_Msk (0xfUL) /*!< USB GRXSTSR_HOSTMODE: ChNum (Bitfield-Mask: 0x0f) */ -#define USB_GRXSTSR_HOSTMODE_BCnt_Pos (4UL) /*!< USB GRXSTSR_HOSTMODE: BCnt (Bit 4) */ -#define USB_GRXSTSR_HOSTMODE_BCnt_Msk (0x7ff0UL) /*!< USB GRXSTSR_HOSTMODE: BCnt (Bitfield-Mask: 0x7ff) */ -#define USB_GRXSTSR_HOSTMODE_DPID_Pos (15UL) /*!< USB GRXSTSR_HOSTMODE: DPID (Bit 15) */ -#define USB_GRXSTSR_HOSTMODE_DPID_Msk (0x18000UL) /*!< USB GRXSTSR_HOSTMODE: DPID (Bitfield-Mask: 0x03) */ -#define USB_GRXSTSR_HOSTMODE_PktSts_Pos (17UL) /*!< USB GRXSTSR_HOSTMODE: PktSts (Bit 17) */ -#define USB_GRXSTSR_HOSTMODE_PktSts_Msk (0x1e0000UL) /*!< USB GRXSTSR_HOSTMODE: PktSts (Bitfield-Mask: 0x0f) */ - -/* --------------------------- USB_GRXSTSR_DEVICEMODE --------------------------- */ -#define USB_GRXSTSR_DEVICEMODE_EPNum_Pos (0UL) /*!< USB GRXSTSR_DEVICEMODE: EPNum (Bit 0) */ -#define USB_GRXSTSR_DEVICEMODE_EPNum_Msk (0xfUL) /*!< USB GRXSTSR_DEVICEMODE: EPNum (Bitfield-Mask: 0x0f) */ -#define USB_GRXSTSR_DEVICEMODE_BCnt_Pos (4UL) /*!< USB GRXSTSR_DEVICEMODE: BCnt (Bit 4) */ -#define USB_GRXSTSR_DEVICEMODE_BCnt_Msk (0x7ff0UL) /*!< USB GRXSTSR_DEVICEMODE: BCnt (Bitfield-Mask: 0x7ff) */ -#define USB_GRXSTSR_DEVICEMODE_DPID_Pos (15UL) /*!< USB GRXSTSR_DEVICEMODE: DPID (Bit 15) */ -#define USB_GRXSTSR_DEVICEMODE_DPID_Msk (0x18000UL) /*!< USB GRXSTSR_DEVICEMODE: DPID (Bitfield-Mask: 0x03) */ -#define USB_GRXSTSR_DEVICEMODE_PktSts_Pos (17UL) /*!< USB GRXSTSR_DEVICEMODE: PktSts (Bit 17) */ -#define USB_GRXSTSR_DEVICEMODE_PktSts_Msk (0x1e0000UL) /*!< USB GRXSTSR_DEVICEMODE: PktSts (Bitfield-Mask: 0x0f) */ -#define USB_GRXSTSR_DEVICEMODE_FN_Pos (21UL) /*!< USB GRXSTSR_DEVICEMODE: FN (Bit 21) */ -#define USB_GRXSTSR_DEVICEMODE_FN_Msk (0x1e00000UL) /*!< USB GRXSTSR_DEVICEMODE: FN (Bitfield-Mask: 0x0f) */ - -/* --------------------------- USB_GRXSTSP_DEVICEMODE --------------------------- */ -#define USB_GRXSTSP_DEVICEMODE_EPNum_Pos (0UL) /*!< USB GRXSTSP_DEVICEMODE: EPNum (Bit 0) */ -#define USB_GRXSTSP_DEVICEMODE_EPNum_Msk (0xfUL) /*!< USB GRXSTSP_DEVICEMODE: EPNum (Bitfield-Mask: 0x0f) */ -#define USB_GRXSTSP_DEVICEMODE_BCnt_Pos (4UL) /*!< USB GRXSTSP_DEVICEMODE: BCnt (Bit 4) */ -#define USB_GRXSTSP_DEVICEMODE_BCnt_Msk (0x7ff0UL) /*!< USB GRXSTSP_DEVICEMODE: BCnt (Bitfield-Mask: 0x7ff) */ -#define USB_GRXSTSP_DEVICEMODE_DPID_Pos (15UL) /*!< USB GRXSTSP_DEVICEMODE: DPID (Bit 15) */ -#define USB_GRXSTSP_DEVICEMODE_DPID_Msk (0x18000UL) /*!< USB GRXSTSP_DEVICEMODE: DPID (Bitfield-Mask: 0x03) */ -#define USB_GRXSTSP_DEVICEMODE_PktSts_Pos (17UL) /*!< USB GRXSTSP_DEVICEMODE: PktSts (Bit 17) */ -#define USB_GRXSTSP_DEVICEMODE_PktSts_Msk (0x1e0000UL) /*!< USB GRXSTSP_DEVICEMODE: PktSts (Bitfield-Mask: 0x0f) */ -#define USB_GRXSTSP_DEVICEMODE_FN_Pos (21UL) /*!< USB GRXSTSP_DEVICEMODE: FN (Bit 21) */ -#define USB_GRXSTSP_DEVICEMODE_FN_Msk (0x1e00000UL) /*!< USB GRXSTSP_DEVICEMODE: FN (Bitfield-Mask: 0x0f) */ - -/* ---------------------------- USB_GRXSTSP_HOSTMODE ---------------------------- */ -#define USB_GRXSTSP_HOSTMODE_ChNum_Pos (0UL) /*!< USB GRXSTSP_HOSTMODE: ChNum (Bit 0) */ -#define USB_GRXSTSP_HOSTMODE_ChNum_Msk (0xfUL) /*!< USB GRXSTSP_HOSTMODE: ChNum (Bitfield-Mask: 0x0f) */ -#define USB_GRXSTSP_HOSTMODE_BCnt_Pos (4UL) /*!< USB GRXSTSP_HOSTMODE: BCnt (Bit 4) */ -#define USB_GRXSTSP_HOSTMODE_BCnt_Msk (0x7ff0UL) /*!< USB GRXSTSP_HOSTMODE: BCnt (Bitfield-Mask: 0x7ff) */ -#define USB_GRXSTSP_HOSTMODE_DPID_Pos (15UL) /*!< USB GRXSTSP_HOSTMODE: DPID (Bit 15) */ -#define USB_GRXSTSP_HOSTMODE_DPID_Msk (0x18000UL) /*!< USB GRXSTSP_HOSTMODE: DPID (Bitfield-Mask: 0x03) */ -#define USB_GRXSTSP_HOSTMODE_PktSts_Pos (17UL) /*!< USB GRXSTSP_HOSTMODE: PktSts (Bit 17) */ -#define USB_GRXSTSP_HOSTMODE_PktSts_Msk (0x1e0000UL) /*!< USB GRXSTSP_HOSTMODE: PktSts (Bitfield-Mask: 0x0f) */ - -/* --------------------------------- USB_GRXFSIZ -------------------------------- */ -#define USB_GRXFSIZ_RxFDep_Pos (0UL) /*!< USB GRXFSIZ: RxFDep (Bit 0) */ -#define USB_GRXFSIZ_RxFDep_Msk (0xffffUL) /*!< USB GRXFSIZ: RxFDep (Bitfield-Mask: 0xffff) */ - -/* --------------------------- USB_GNPTXFSIZ_HOSTMODE --------------------------- */ -#define USB_GNPTXFSIZ_HOSTMODE_NPTxFStAddr_Pos (0UL) /*!< USB GNPTXFSIZ_HOSTMODE: NPTxFStAddr (Bit 0) */ -#define USB_GNPTXFSIZ_HOSTMODE_NPTxFStAddr_Msk (0xffffUL) /*!< USB GNPTXFSIZ_HOSTMODE: NPTxFStAddr (Bitfield-Mask: 0xffff) */ -#define USB_GNPTXFSIZ_HOSTMODE_NPTxFDep_Pos (16UL) /*!< USB GNPTXFSIZ_HOSTMODE: NPTxFDep (Bit 16) */ -#define USB_GNPTXFSIZ_HOSTMODE_NPTxFDep_Msk (0xffff0000UL) /*!< USB GNPTXFSIZ_HOSTMODE: NPTxFDep (Bitfield-Mask: 0xffff) */ - -/* -------------------------- USB_GNPTXFSIZ_DEVICEMODE -------------------------- */ -#define USB_GNPTXFSIZ_DEVICEMODE_INEPTxF0StAddr_Pos (0UL) /*!< USB GNPTXFSIZ_DEVICEMODE: INEPTxF0StAddr (Bit 0) */ -#define USB_GNPTXFSIZ_DEVICEMODE_INEPTxF0StAddr_Msk (0xffffUL) /*!< USB GNPTXFSIZ_DEVICEMODE: INEPTxF0StAddr (Bitfield-Mask: 0xffff) */ -#define USB_GNPTXFSIZ_DEVICEMODE_INEPTxF0Dep_Pos (16UL) /*!< USB GNPTXFSIZ_DEVICEMODE: INEPTxF0Dep (Bit 16) */ -#define USB_GNPTXFSIZ_DEVICEMODE_INEPTxF0Dep_Msk (0xffff0000UL) /*!< USB GNPTXFSIZ_DEVICEMODE: INEPTxF0Dep (Bitfield-Mask: 0xffff) */ - -/* -------------------------------- USB_GNPTXSTS -------------------------------- */ -#define USB_GNPTXSTS_NPTxFSpcAvail_Pos (0UL) /*!< USB GNPTXSTS: NPTxFSpcAvail (Bit 0) */ -#define USB_GNPTXSTS_NPTxFSpcAvail_Msk (0xffffUL) /*!< USB GNPTXSTS: NPTxFSpcAvail (Bitfield-Mask: 0xffff) */ -#define USB_GNPTXSTS_NPTxQSpcAvail_Pos (16UL) /*!< USB GNPTXSTS: NPTxQSpcAvail (Bit 16) */ -#define USB_GNPTXSTS_NPTxQSpcAvail_Msk (0xff0000UL) /*!< USB GNPTXSTS: NPTxQSpcAvail (Bitfield-Mask: 0xff) */ -#define USB_GNPTXSTS_NPTxQTop_Pos (24UL) /*!< USB GNPTXSTS: NPTxQTop (Bit 24) */ -#define USB_GNPTXSTS_NPTxQTop_Msk (0x7f000000UL) /*!< USB GNPTXSTS: NPTxQTop (Bitfield-Mask: 0x7f) */ - -/* ---------------------------------- USB_GUID ---------------------------------- */ -#define USB_GUID_MOD_REV_Pos (0UL) /*!< USB GUID: MOD_REV (Bit 0) */ -#define USB_GUID_MOD_REV_Msk (0xffUL) /*!< USB GUID: MOD_REV (Bitfield-Mask: 0xff) */ -#define USB_GUID_MOD_TYPE_Pos (8UL) /*!< USB GUID: MOD_TYPE (Bit 8) */ -#define USB_GUID_MOD_TYPE_Msk (0xff00UL) /*!< USB GUID: MOD_TYPE (Bitfield-Mask: 0xff) */ -#define USB_GUID_MOD_NUMBER_Pos (16UL) /*!< USB GUID: MOD_NUMBER (Bit 16) */ -#define USB_GUID_MOD_NUMBER_Msk (0xffff0000UL) /*!< USB GUID: MOD_NUMBER (Bitfield-Mask: 0xffff) */ - -/* -------------------------------- USB_GDFIFOCFG ------------------------------- */ -#define USB_GDFIFOCFG_GDFIFOCfg_Pos (0UL) /*!< USB GDFIFOCFG: GDFIFOCfg (Bit 0) */ -#define USB_GDFIFOCFG_GDFIFOCfg_Msk (0xffffUL) /*!< USB GDFIFOCFG: GDFIFOCfg (Bitfield-Mask: 0xffff) */ -#define USB_GDFIFOCFG_EPInfoBaseAddr_Pos (16UL) /*!< USB GDFIFOCFG: EPInfoBaseAddr (Bit 16) */ -#define USB_GDFIFOCFG_EPInfoBaseAddr_Msk (0xffff0000UL) /*!< USB GDFIFOCFG: EPInfoBaseAddr (Bitfield-Mask: 0xffff) */ - -/* -------------------------------- USB_HPTXFSIZ -------------------------------- */ -#define USB_HPTXFSIZ_PTxFStAddr_Pos (0UL) /*!< USB HPTXFSIZ: PTxFStAddr (Bit 0) */ -#define USB_HPTXFSIZ_PTxFStAddr_Msk (0xffffUL) /*!< USB HPTXFSIZ: PTxFStAddr (Bitfield-Mask: 0xffff) */ -#define USB_HPTXFSIZ_PTxFSize_Pos (16UL) /*!< USB HPTXFSIZ: PTxFSize (Bit 16) */ -#define USB_HPTXFSIZ_PTxFSize_Msk (0xffff0000UL) /*!< USB HPTXFSIZ: PTxFSize (Bitfield-Mask: 0xffff) */ - -/* -------------------------------- USB_DIEPTXF1 -------------------------------- */ -#define USB_DIEPTXF1_INEPnTxFStAddr_Pos (0UL) /*!< USB DIEPTXF1: INEPnTxFStAddr (Bit 0) */ -#define USB_DIEPTXF1_INEPnTxFStAddr_Msk (0xffffUL) /*!< USB DIEPTXF1: INEPnTxFStAddr (Bitfield-Mask: 0xffff) */ -#define USB_DIEPTXF1_INEPnTxFDep_Pos (16UL) /*!< USB DIEPTXF1: INEPnTxFDep (Bit 16) */ -#define USB_DIEPTXF1_INEPnTxFDep_Msk (0xffff0000UL) /*!< USB DIEPTXF1: INEPnTxFDep (Bitfield-Mask: 0xffff) */ - -/* -------------------------------- USB_DIEPTXF2 -------------------------------- */ -#define USB_DIEPTXF2_INEPnTxFStAddr_Pos (0UL) /*!< USB DIEPTXF2: INEPnTxFStAddr (Bit 0) */ -#define USB_DIEPTXF2_INEPnTxFStAddr_Msk (0xffffUL) /*!< USB DIEPTXF2: INEPnTxFStAddr (Bitfield-Mask: 0xffff) */ -#define USB_DIEPTXF2_INEPnTxFDep_Pos (16UL) /*!< USB DIEPTXF2: INEPnTxFDep (Bit 16) */ -#define USB_DIEPTXF2_INEPnTxFDep_Msk (0xffff0000UL) /*!< USB DIEPTXF2: INEPnTxFDep (Bitfield-Mask: 0xffff) */ - -/* -------------------------------- USB_DIEPTXF3 -------------------------------- */ -#define USB_DIEPTXF3_INEPnTxFStAddr_Pos (0UL) /*!< USB DIEPTXF3: INEPnTxFStAddr (Bit 0) */ -#define USB_DIEPTXF3_INEPnTxFStAddr_Msk (0xffffUL) /*!< USB DIEPTXF3: INEPnTxFStAddr (Bitfield-Mask: 0xffff) */ -#define USB_DIEPTXF3_INEPnTxFDep_Pos (16UL) /*!< USB DIEPTXF3: INEPnTxFDep (Bit 16) */ -#define USB_DIEPTXF3_INEPnTxFDep_Msk (0xffff0000UL) /*!< USB DIEPTXF3: INEPnTxFDep (Bitfield-Mask: 0xffff) */ - -/* -------------------------------- USB_DIEPTXF4 -------------------------------- */ -#define USB_DIEPTXF4_INEPnTxFStAddr_Pos (0UL) /*!< USB DIEPTXF4: INEPnTxFStAddr (Bit 0) */ -#define USB_DIEPTXF4_INEPnTxFStAddr_Msk (0xffffUL) /*!< USB DIEPTXF4: INEPnTxFStAddr (Bitfield-Mask: 0xffff) */ -#define USB_DIEPTXF4_INEPnTxFDep_Pos (16UL) /*!< USB DIEPTXF4: INEPnTxFDep (Bit 16) */ -#define USB_DIEPTXF4_INEPnTxFDep_Msk (0xffff0000UL) /*!< USB DIEPTXF4: INEPnTxFDep (Bitfield-Mask: 0xffff) */ - -/* -------------------------------- USB_DIEPTXF5 -------------------------------- */ -#define USB_DIEPTXF5_INEPnTxFStAddr_Pos (0UL) /*!< USB DIEPTXF5: INEPnTxFStAddr (Bit 0) */ -#define USB_DIEPTXF5_INEPnTxFStAddr_Msk (0xffffUL) /*!< USB DIEPTXF5: INEPnTxFStAddr (Bitfield-Mask: 0xffff) */ -#define USB_DIEPTXF5_INEPnTxFDep_Pos (16UL) /*!< USB DIEPTXF5: INEPnTxFDep (Bit 16) */ -#define USB_DIEPTXF5_INEPnTxFDep_Msk (0xffff0000UL) /*!< USB DIEPTXF5: INEPnTxFDep (Bitfield-Mask: 0xffff) */ - -/* -------------------------------- USB_DIEPTXF6 -------------------------------- */ -#define USB_DIEPTXF6_INEPnTxFStAddr_Pos (0UL) /*!< USB DIEPTXF6: INEPnTxFStAddr (Bit 0) */ -#define USB_DIEPTXF6_INEPnTxFStAddr_Msk (0xffffUL) /*!< USB DIEPTXF6: INEPnTxFStAddr (Bitfield-Mask: 0xffff) */ -#define USB_DIEPTXF6_INEPnTxFDep_Pos (16UL) /*!< USB DIEPTXF6: INEPnTxFDep (Bit 16) */ -#define USB_DIEPTXF6_INEPnTxFDep_Msk (0xffff0000UL) /*!< USB DIEPTXF6: INEPnTxFDep (Bitfield-Mask: 0xffff) */ - -/* ---------------------------------- USB_HCFG ---------------------------------- */ -#define USB_HCFG_FSLSPclkSel_Pos (0UL) /*!< USB HCFG: FSLSPclkSel (Bit 0) */ -#define USB_HCFG_FSLSPclkSel_Msk (0x3UL) /*!< USB HCFG: FSLSPclkSel (Bitfield-Mask: 0x03) */ -#define USB_HCFG_FSLSSupp_Pos (2UL) /*!< USB HCFG: FSLSSupp (Bit 2) */ -#define USB_HCFG_FSLSSupp_Msk (0x4UL) /*!< USB HCFG: FSLSSupp (Bitfield-Mask: 0x01) */ -#define USB_HCFG_DescDMA_Pos (23UL) /*!< USB HCFG: DescDMA (Bit 23) */ -#define USB_HCFG_DescDMA_Msk (0x800000UL) /*!< USB HCFG: DescDMA (Bitfield-Mask: 0x01) */ -#define USB_HCFG_FrListEn_Pos (24UL) /*!< USB HCFG: FrListEn (Bit 24) */ -#define USB_HCFG_FrListEn_Msk (0x3000000UL) /*!< USB HCFG: FrListEn (Bitfield-Mask: 0x03) */ -#define USB_HCFG_PerSchedEna_Pos (26UL) /*!< USB HCFG: PerSchedEna (Bit 26) */ -#define USB_HCFG_PerSchedEna_Msk (0x4000000UL) /*!< USB HCFG: PerSchedEna (Bitfield-Mask: 0x01) */ - -/* ---------------------------------- USB_HFIR ---------------------------------- */ -#define USB_HFIR_FrInt_Pos (0UL) /*!< USB HFIR: FrInt (Bit 0) */ -#define USB_HFIR_FrInt_Msk (0xffffUL) /*!< USB HFIR: FrInt (Bitfield-Mask: 0xffff) */ -#define USB_HFIR_HFIRRldCtrl_Pos (16UL) /*!< USB HFIR: HFIRRldCtrl (Bit 16) */ -#define USB_HFIR_HFIRRldCtrl_Msk (0x10000UL) /*!< USB HFIR: HFIRRldCtrl (Bitfield-Mask: 0x01) */ - -/* ---------------------------------- USB_HFNUM --------------------------------- */ -#define USB_HFNUM_FrNum_Pos (0UL) /*!< USB HFNUM: FrNum (Bit 0) */ -#define USB_HFNUM_FrNum_Msk (0xffffUL) /*!< USB HFNUM: FrNum (Bitfield-Mask: 0xffff) */ -#define USB_HFNUM_FrRem_Pos (16UL) /*!< USB HFNUM: FrRem (Bit 16) */ -#define USB_HFNUM_FrRem_Msk (0xffff0000UL) /*!< USB HFNUM: FrRem (Bitfield-Mask: 0xffff) */ - -/* --------------------------------- USB_HPTXSTS -------------------------------- */ -#define USB_HPTXSTS_PTxFSpcAvail_Pos (0UL) /*!< USB HPTXSTS: PTxFSpcAvail (Bit 0) */ -#define USB_HPTXSTS_PTxFSpcAvail_Msk (0xffffUL) /*!< USB HPTXSTS: PTxFSpcAvail (Bitfield-Mask: 0xffff) */ -#define USB_HPTXSTS_PTxQSpcAvail_Pos (16UL) /*!< USB HPTXSTS: PTxQSpcAvail (Bit 16) */ -#define USB_HPTXSTS_PTxQSpcAvail_Msk (0xff0000UL) /*!< USB HPTXSTS: PTxQSpcAvail (Bitfield-Mask: 0xff) */ -#define USB_HPTXSTS_PTxQTop_Pos (24UL) /*!< USB HPTXSTS: PTxQTop (Bit 24) */ -#define USB_HPTXSTS_PTxQTop_Msk (0xff000000UL) /*!< USB HPTXSTS: PTxQTop (Bitfield-Mask: 0xff) */ - -/* ---------------------------------- USB_HAINT --------------------------------- */ -#define USB_HAINT_HAINT_Pos (0UL) /*!< USB HAINT: HAINT (Bit 0) */ -#define USB_HAINT_HAINT_Msk (0x3fffUL) /*!< USB HAINT: HAINT (Bitfield-Mask: 0x3fff) */ - -/* -------------------------------- USB_HAINTMSK -------------------------------- */ -#define USB_HAINTMSK_HAINTMsk_Pos (0UL) /*!< USB HAINTMSK: HAINTMsk (Bit 0) */ -#define USB_HAINTMSK_HAINTMsk_Msk (0x3fffUL) /*!< USB HAINTMSK: HAINTMsk (Bitfield-Mask: 0x3fff) */ - -/* -------------------------------- USB_HFLBADDR -------------------------------- */ -#define USB_HFLBADDR_Starting_Address_Pos (0UL) /*!< USB HFLBADDR: Starting_Address (Bit 0) */ -#define USB_HFLBADDR_Starting_Address_Msk (0xffffffffUL) /*!< USB HFLBADDR: Starting_Address (Bitfield-Mask: 0xffffffff) */ - -/* ---------------------------------- USB_HPRT ---------------------------------- */ -#define USB_HPRT_PrtConnSts_Pos (0UL) /*!< USB HPRT: PrtConnSts (Bit 0) */ -#define USB_HPRT_PrtConnSts_Msk (0x1UL) /*!< USB HPRT: PrtConnSts (Bitfield-Mask: 0x01) */ -#define USB_HPRT_PrtConnDet_Pos (1UL) /*!< USB HPRT: PrtConnDet (Bit 1) */ -#define USB_HPRT_PrtConnDet_Msk (0x2UL) /*!< USB HPRT: PrtConnDet (Bitfield-Mask: 0x01) */ -#define USB_HPRT_PrtEna_Pos (2UL) /*!< USB HPRT: PrtEna (Bit 2) */ -#define USB_HPRT_PrtEna_Msk (0x4UL) /*!< USB HPRT: PrtEna (Bitfield-Mask: 0x01) */ -#define USB_HPRT_PrtEnChng_Pos (3UL) /*!< USB HPRT: PrtEnChng (Bit 3) */ -#define USB_HPRT_PrtEnChng_Msk (0x8UL) /*!< USB HPRT: PrtEnChng (Bitfield-Mask: 0x01) */ -#define USB_HPRT_PrtOvrCurrAct_Pos (4UL) /*!< USB HPRT: PrtOvrCurrAct (Bit 4) */ -#define USB_HPRT_PrtOvrCurrAct_Msk (0x10UL) /*!< USB HPRT: PrtOvrCurrAct (Bitfield-Mask: 0x01) */ -#define USB_HPRT_PrtOvrCurrChng_Pos (5UL) /*!< USB HPRT: PrtOvrCurrChng (Bit 5) */ -#define USB_HPRT_PrtOvrCurrChng_Msk (0x20UL) /*!< USB HPRT: PrtOvrCurrChng (Bitfield-Mask: 0x01) */ -#define USB_HPRT_PrtRes_Pos (6UL) /*!< USB HPRT: PrtRes (Bit 6) */ -#define USB_HPRT_PrtRes_Msk (0x40UL) /*!< USB HPRT: PrtRes (Bitfield-Mask: 0x01) */ -#define USB_HPRT_PrtSusp_Pos (7UL) /*!< USB HPRT: PrtSusp (Bit 7) */ -#define USB_HPRT_PrtSusp_Msk (0x80UL) /*!< USB HPRT: PrtSusp (Bitfield-Mask: 0x01) */ -#define USB_HPRT_PrtRst_Pos (8UL) /*!< USB HPRT: PrtRst (Bit 8) */ -#define USB_HPRT_PrtRst_Msk (0x100UL) /*!< USB HPRT: PrtRst (Bitfield-Mask: 0x01) */ -#define USB_HPRT_PrtLnSts_Pos (10UL) /*!< USB HPRT: PrtLnSts (Bit 10) */ -#define USB_HPRT_PrtLnSts_Msk (0xc00UL) /*!< USB HPRT: PrtLnSts (Bitfield-Mask: 0x03) */ -#define USB_HPRT_PrtPwr_Pos (12UL) /*!< USB HPRT: PrtPwr (Bit 12) */ -#define USB_HPRT_PrtPwr_Msk (0x1000UL) /*!< USB HPRT: PrtPwr (Bitfield-Mask: 0x01) */ -#define USB_HPRT_PrtSpd_Pos (17UL) /*!< USB HPRT: PrtSpd (Bit 17) */ -#define USB_HPRT_PrtSpd_Msk (0x60000UL) /*!< USB HPRT: PrtSpd (Bitfield-Mask: 0x03) */ - -/* ---------------------------------- USB_DCFG ---------------------------------- */ -#define USB_DCFG_DevSpd_Pos (0UL) /*!< USB DCFG: DevSpd (Bit 0) */ -#define USB_DCFG_DevSpd_Msk (0x3UL) /*!< USB DCFG: DevSpd (Bitfield-Mask: 0x03) */ -#define USB_DCFG_NZStsOUTHShk_Pos (2UL) /*!< USB DCFG: NZStsOUTHShk (Bit 2) */ -#define USB_DCFG_NZStsOUTHShk_Msk (0x4UL) /*!< USB DCFG: NZStsOUTHShk (Bitfield-Mask: 0x01) */ -#define USB_DCFG_DevAddr_Pos (4UL) /*!< USB DCFG: DevAddr (Bit 4) */ -#define USB_DCFG_DevAddr_Msk (0x7f0UL) /*!< USB DCFG: DevAddr (Bitfield-Mask: 0x7f) */ -#define USB_DCFG_PerFrInt_Pos (11UL) /*!< USB DCFG: PerFrInt (Bit 11) */ -#define USB_DCFG_PerFrInt_Msk (0x1800UL) /*!< USB DCFG: PerFrInt (Bitfield-Mask: 0x03) */ -#define USB_DCFG_DescDMA_Pos (23UL) /*!< USB DCFG: DescDMA (Bit 23) */ -#define USB_DCFG_DescDMA_Msk (0x800000UL) /*!< USB DCFG: DescDMA (Bitfield-Mask: 0x01) */ -#define USB_DCFG_PerSchIntvl_Pos (24UL) /*!< USB DCFG: PerSchIntvl (Bit 24) */ -#define USB_DCFG_PerSchIntvl_Msk (0x3000000UL) /*!< USB DCFG: PerSchIntvl (Bitfield-Mask: 0x03) */ - -/* ---------------------------------- USB_DCTL ---------------------------------- */ -#define USB_DCTL_RmtWkUpSig_Pos (0UL) /*!< USB DCTL: RmtWkUpSig (Bit 0) */ -#define USB_DCTL_RmtWkUpSig_Msk (0x1UL) /*!< USB DCTL: RmtWkUpSig (Bitfield-Mask: 0x01) */ -#define USB_DCTL_SftDiscon_Pos (1UL) /*!< USB DCTL: SftDiscon (Bit 1) */ -#define USB_DCTL_SftDiscon_Msk (0x2UL) /*!< USB DCTL: SftDiscon (Bitfield-Mask: 0x01) */ -#define USB_DCTL_GNPINNakSts_Pos (2UL) /*!< USB DCTL: GNPINNakSts (Bit 2) */ -#define USB_DCTL_GNPINNakSts_Msk (0x4UL) /*!< USB DCTL: GNPINNakSts (Bitfield-Mask: 0x01) */ -#define USB_DCTL_GOUTNakSts_Pos (3UL) /*!< USB DCTL: GOUTNakSts (Bit 3) */ -#define USB_DCTL_GOUTNakSts_Msk (0x8UL) /*!< USB DCTL: GOUTNakSts (Bitfield-Mask: 0x01) */ -#define USB_DCTL_SGNPInNak_Pos (7UL) /*!< USB DCTL: SGNPInNak (Bit 7) */ -#define USB_DCTL_SGNPInNak_Msk (0x80UL) /*!< USB DCTL: SGNPInNak (Bitfield-Mask: 0x01) */ -#define USB_DCTL_CGNPInNak_Pos (8UL) /*!< USB DCTL: CGNPInNak (Bit 8) */ -#define USB_DCTL_CGNPInNak_Msk (0x100UL) /*!< USB DCTL: CGNPInNak (Bitfield-Mask: 0x01) */ -#define USB_DCTL_SGOUTNak_Pos (9UL) /*!< USB DCTL: SGOUTNak (Bit 9) */ -#define USB_DCTL_SGOUTNak_Msk (0x200UL) /*!< USB DCTL: SGOUTNak (Bitfield-Mask: 0x01) */ -#define USB_DCTL_CGOUTNak_Pos (10UL) /*!< USB DCTL: CGOUTNak (Bit 10) */ -#define USB_DCTL_CGOUTNak_Msk (0x400UL) /*!< USB DCTL: CGOUTNak (Bitfield-Mask: 0x01) */ -#define USB_DCTL_GMC_Pos (13UL) /*!< USB DCTL: GMC (Bit 13) */ -#define USB_DCTL_GMC_Msk (0x6000UL) /*!< USB DCTL: GMC (Bitfield-Mask: 0x03) */ -#define USB_DCTL_IgnrFrmNum_Pos (15UL) /*!< USB DCTL: IgnrFrmNum (Bit 15) */ -#define USB_DCTL_IgnrFrmNum_Msk (0x8000UL) /*!< USB DCTL: IgnrFrmNum (Bitfield-Mask: 0x01) */ -#define USB_DCTL_NakOnBble_Pos (16UL) /*!< USB DCTL: NakOnBble (Bit 16) */ -#define USB_DCTL_NakOnBble_Msk (0x10000UL) /*!< USB DCTL: NakOnBble (Bitfield-Mask: 0x01) */ -#define USB_DCTL_EnContOnBNA_Pos (17UL) /*!< USB DCTL: EnContOnBNA (Bit 17) */ -#define USB_DCTL_EnContOnBNA_Msk (0x20000UL) /*!< USB DCTL: EnContOnBNA (Bitfield-Mask: 0x01) */ - -/* ---------------------------------- USB_DSTS ---------------------------------- */ -#define USB_DSTS_SuspSts_Pos (0UL) /*!< USB DSTS: SuspSts (Bit 0) */ -#define USB_DSTS_SuspSts_Msk (0x1UL) /*!< USB DSTS: SuspSts (Bitfield-Mask: 0x01) */ -#define USB_DSTS_EnumSpd_Pos (1UL) /*!< USB DSTS: EnumSpd (Bit 1) */ -#define USB_DSTS_EnumSpd_Msk (0x6UL) /*!< USB DSTS: EnumSpd (Bitfield-Mask: 0x03) */ -#define USB_DSTS_ErrticErr_Pos (3UL) /*!< USB DSTS: ErrticErr (Bit 3) */ -#define USB_DSTS_ErrticErr_Msk (0x8UL) /*!< USB DSTS: ErrticErr (Bitfield-Mask: 0x01) */ -#define USB_DSTS_SOFFN_Pos (8UL) /*!< USB DSTS: SOFFN (Bit 8) */ -#define USB_DSTS_SOFFN_Msk (0x3fff00UL) /*!< USB DSTS: SOFFN (Bitfield-Mask: 0x3fff) */ - -/* --------------------------------- USB_DIEPMSK -------------------------------- */ -#define USB_DIEPMSK_XferComplMsk_Pos (0UL) /*!< USB DIEPMSK: XferComplMsk (Bit 0) */ -#define USB_DIEPMSK_XferComplMsk_Msk (0x1UL) /*!< USB DIEPMSK: XferComplMsk (Bitfield-Mask: 0x01) */ -#define USB_DIEPMSK_EPDisbldMsk_Pos (1UL) /*!< USB DIEPMSK: EPDisbldMsk (Bit 1) */ -#define USB_DIEPMSK_EPDisbldMsk_Msk (0x2UL) /*!< USB DIEPMSK: EPDisbldMsk (Bitfield-Mask: 0x01) */ -#define USB_DIEPMSK_AHBErrMsk_Pos (2UL) /*!< USB DIEPMSK: AHBErrMsk (Bit 2) */ -#define USB_DIEPMSK_AHBErrMsk_Msk (0x4UL) /*!< USB DIEPMSK: AHBErrMsk (Bitfield-Mask: 0x01) */ -#define USB_DIEPMSK_TimeOUTMsk_Pos (3UL) /*!< USB DIEPMSK: TimeOUTMsk (Bit 3) */ -#define USB_DIEPMSK_TimeOUTMsk_Msk (0x8UL) /*!< USB DIEPMSK: TimeOUTMsk (Bitfield-Mask: 0x01) */ -#define USB_DIEPMSK_INTknTXFEmpMsk_Pos (4UL) /*!< USB DIEPMSK: INTknTXFEmpMsk (Bit 4) */ -#define USB_DIEPMSK_INTknTXFEmpMsk_Msk (0x10UL) /*!< USB DIEPMSK: INTknTXFEmpMsk (Bitfield-Mask: 0x01) */ -#define USB_DIEPMSK_INEPNakEffMsk_Pos (6UL) /*!< USB DIEPMSK: INEPNakEffMsk (Bit 6) */ -#define USB_DIEPMSK_INEPNakEffMsk_Msk (0x40UL) /*!< USB DIEPMSK: INEPNakEffMsk (Bitfield-Mask: 0x01) */ -#define USB_DIEPMSK_TxfifoUndrnMsk_Pos (8UL) /*!< USB DIEPMSK: TxfifoUndrnMsk (Bit 8) */ -#define USB_DIEPMSK_TxfifoUndrnMsk_Msk (0x100UL) /*!< USB DIEPMSK: TxfifoUndrnMsk (Bitfield-Mask: 0x01) */ -#define USB_DIEPMSK_BNAInIntrMsk_Pos (9UL) /*!< USB DIEPMSK: BNAInIntrMsk (Bit 9) */ -#define USB_DIEPMSK_BNAInIntrMsk_Msk (0x200UL) /*!< USB DIEPMSK: BNAInIntrMsk (Bitfield-Mask: 0x01) */ -#define USB_DIEPMSK_NAKMsk_Pos (13UL) /*!< USB DIEPMSK: NAKMsk (Bit 13) */ -#define USB_DIEPMSK_NAKMsk_Msk (0x2000UL) /*!< USB DIEPMSK: NAKMsk (Bitfield-Mask: 0x01) */ - -/* --------------------------------- USB_DOEPMSK -------------------------------- */ -#define USB_DOEPMSK_XferComplMsk_Pos (0UL) /*!< USB DOEPMSK: XferComplMsk (Bit 0) */ -#define USB_DOEPMSK_XferComplMsk_Msk (0x1UL) /*!< USB DOEPMSK: XferComplMsk (Bitfield-Mask: 0x01) */ -#define USB_DOEPMSK_EPDisbldMsk_Pos (1UL) /*!< USB DOEPMSK: EPDisbldMsk (Bit 1) */ -#define USB_DOEPMSK_EPDisbldMsk_Msk (0x2UL) /*!< USB DOEPMSK: EPDisbldMsk (Bitfield-Mask: 0x01) */ -#define USB_DOEPMSK_AHBErrMsk_Pos (2UL) /*!< USB DOEPMSK: AHBErrMsk (Bit 2) */ -#define USB_DOEPMSK_AHBErrMsk_Msk (0x4UL) /*!< USB DOEPMSK: AHBErrMsk (Bitfield-Mask: 0x01) */ -#define USB_DOEPMSK_SetUPMsk_Pos (3UL) /*!< USB DOEPMSK: SetUPMsk (Bit 3) */ -#define USB_DOEPMSK_SetUPMsk_Msk (0x8UL) /*!< USB DOEPMSK: SetUPMsk (Bitfield-Mask: 0x01) */ -#define USB_DOEPMSK_OUTTknEPdisMsk_Pos (4UL) /*!< USB DOEPMSK: OUTTknEPdisMsk (Bit 4) */ -#define USB_DOEPMSK_OUTTknEPdisMsk_Msk (0x10UL) /*!< USB DOEPMSK: OUTTknEPdisMsk (Bitfield-Mask: 0x01) */ -#define USB_DOEPMSK_Back2BackSETup_Pos (6UL) /*!< USB DOEPMSK: Back2BackSETup (Bit 6) */ -#define USB_DOEPMSK_Back2BackSETup_Msk (0x40UL) /*!< USB DOEPMSK: Back2BackSETup (Bitfield-Mask: 0x01) */ -#define USB_DOEPMSK_OutPktErrMsk_Pos (8UL) /*!< USB DOEPMSK: OutPktErrMsk (Bit 8) */ -#define USB_DOEPMSK_OutPktErrMsk_Msk (0x100UL) /*!< USB DOEPMSK: OutPktErrMsk (Bitfield-Mask: 0x01) */ -#define USB_DOEPMSK_BnaOutIntrMsk_Pos (9UL) /*!< USB DOEPMSK: BnaOutIntrMsk (Bit 9) */ -#define USB_DOEPMSK_BnaOutIntrMsk_Msk (0x200UL) /*!< USB DOEPMSK: BnaOutIntrMsk (Bitfield-Mask: 0x01) */ -#define USB_DOEPMSK_BbleErrMsk_Pos (12UL) /*!< USB DOEPMSK: BbleErrMsk (Bit 12) */ -#define USB_DOEPMSK_BbleErrMsk_Msk (0x1000UL) /*!< USB DOEPMSK: BbleErrMsk (Bitfield-Mask: 0x01) */ -#define USB_DOEPMSK_NAKMsk_Pos (13UL) /*!< USB DOEPMSK: NAKMsk (Bit 13) */ -#define USB_DOEPMSK_NAKMsk_Msk (0x2000UL) /*!< USB DOEPMSK: NAKMsk (Bitfield-Mask: 0x01) */ -#define USB_DOEPMSK_NYETMsk_Pos (14UL) /*!< USB DOEPMSK: NYETMsk (Bit 14) */ -#define USB_DOEPMSK_NYETMsk_Msk (0x4000UL) /*!< USB DOEPMSK: NYETMsk (Bitfield-Mask: 0x01) */ - -/* ---------------------------------- USB_DAINT --------------------------------- */ -#define USB_DAINT_InEpInt_Pos (0UL) /*!< USB DAINT: InEpInt (Bit 0) */ -#define USB_DAINT_InEpInt_Msk (0xffffUL) /*!< USB DAINT: InEpInt (Bitfield-Mask: 0xffff) */ -#define USB_DAINT_OutEPInt_Pos (16UL) /*!< USB DAINT: OutEPInt (Bit 16) */ -#define USB_DAINT_OutEPInt_Msk (0xffff0000UL) /*!< USB DAINT: OutEPInt (Bitfield-Mask: 0xffff) */ - -/* -------------------------------- USB_DAINTMSK -------------------------------- */ -#define USB_DAINTMSK_InEpMsk_Pos (0UL) /*!< USB DAINTMSK: InEpMsk (Bit 0) */ -#define USB_DAINTMSK_InEpMsk_Msk (0xffffUL) /*!< USB DAINTMSK: InEpMsk (Bitfield-Mask: 0xffff) */ -#define USB_DAINTMSK_OutEpMsk_Pos (16UL) /*!< USB DAINTMSK: OutEpMsk (Bit 16) */ -#define USB_DAINTMSK_OutEpMsk_Msk (0xffff0000UL) /*!< USB DAINTMSK: OutEpMsk (Bitfield-Mask: 0xffff) */ - -/* -------------------------------- USB_DVBUSDIS -------------------------------- */ -#define USB_DVBUSDIS_DVBUSDis_Pos (0UL) /*!< USB DVBUSDIS: DVBUSDis (Bit 0) */ -#define USB_DVBUSDIS_DVBUSDis_Msk (0xffffUL) /*!< USB DVBUSDIS: DVBUSDis (Bitfield-Mask: 0xffff) */ - -/* ------------------------------- USB_DVBUSPULSE ------------------------------- */ -#define USB_DVBUSPULSE_DVBUSPulse_Pos (0UL) /*!< USB DVBUSPULSE: DVBUSPulse (Bit 0) */ -#define USB_DVBUSPULSE_DVBUSPulse_Msk (0xfffUL) /*!< USB DVBUSPULSE: DVBUSPulse (Bitfield-Mask: 0xfff) */ - -/* ------------------------------- USB_DIEPEMPMSK ------------------------------- */ -#define USB_DIEPEMPMSK_InEpTxfEmpMsk_Pos (0UL) /*!< USB DIEPEMPMSK: InEpTxfEmpMsk (Bit 0) */ -#define USB_DIEPEMPMSK_InEpTxfEmpMsk_Msk (0xffffUL) /*!< USB DIEPEMPMSK: InEpTxfEmpMsk (Bitfield-Mask: 0xffff) */ - -/* --------------------------------- USB_PCGCCTL -------------------------------- */ -#define USB_PCGCCTL_StopPclk_Pos (0UL) /*!< USB PCGCCTL: StopPclk (Bit 0) */ -#define USB_PCGCCTL_StopPclk_Msk (0x1UL) /*!< USB PCGCCTL: StopPclk (Bitfield-Mask: 0x01) */ -#define USB_PCGCCTL_GateHclk_Pos (1UL) /*!< USB PCGCCTL: GateHclk (Bit 1) */ -#define USB_PCGCCTL_GateHclk_Msk (0x2UL) /*!< USB PCGCCTL: GateHclk (Bitfield-Mask: 0x01) */ - - -/* ================================================================================ */ -/* ================ struct 'USB0_EP0' Position & Mask ================ */ -/* ================================================================================ */ - - -/* ------------------------------ USB_EP_DIEPCTL0 ----------------------------- */ -#define USB_EP_DIEPCTL0_MPS_Pos (0UL) /*!< USB0_EP0 DIEPCTL0: MPS (Bit 0) */ -#define USB_EP_DIEPCTL0_MPS_Msk (0x3UL) /*!< USB0_EP0 DIEPCTL0: MPS (Bitfield-Mask: 0x03) */ -#define USB_EP_DIEPCTL0_USBActEP_Pos (15UL) /*!< USB0_EP0 DIEPCTL0: USBActEP (Bit 15) */ -#define USB_EP_DIEPCTL0_USBActEP_Msk (0x8000UL) /*!< USB0_EP0 DIEPCTL0: USBActEP (Bitfield-Mask: 0x01) */ -#define USB_EP_DIEPCTL0_NAKSts_Pos (17UL) /*!< USB0_EP0 DIEPCTL0: NAKSts (Bit 17) */ -#define USB_EP_DIEPCTL0_NAKSts_Msk (0x20000UL) /*!< USB0_EP0 DIEPCTL0: NAKSts (Bitfield-Mask: 0x01) */ -#define USB_EP_DIEPCTL0_EPType_Pos (18UL) /*!< USB0_EP0 DIEPCTL0: EPType (Bit 18) */ -#define USB_EP_DIEPCTL0_EPType_Msk (0xc0000UL) /*!< USB0_EP0 DIEPCTL0: EPType (Bitfield-Mask: 0x03) */ -#define USB_EP_DIEPCTL0_Stall_Pos (21UL) /*!< USB0_EP0 DIEPCTL0: Stall (Bit 21) */ -#define USB_EP_DIEPCTL0_Stall_Msk (0x200000UL) /*!< USB0_EP0 DIEPCTL0: Stall (Bitfield-Mask: 0x01) */ -#define USB_EP_DIEPCTL0_TxFNum_Pos (22UL) /*!< USB0_EP0 DIEPCTL0: TxFNum (Bit 22) */ -#define USB_EP_DIEPCTL0_TxFNum_Msk (0x3c00000UL) /*!< USB0_EP0 DIEPCTL0: TxFNum (Bitfield-Mask: 0x0f) */ -#define USB_EP_DIEPCTL0_CNAK_Pos (26UL) /*!< USB0_EP0 DIEPCTL0: CNAK (Bit 26) */ -#define USB_EP_DIEPCTL0_CNAK_Msk (0x4000000UL) /*!< USB0_EP0 DIEPCTL0: CNAK (Bitfield-Mask: 0x01) */ -#define USB_EP_DIEPCTL0_SNAK_Pos (27UL) /*!< USB0_EP0 DIEPCTL0: SNAK (Bit 27) */ -#define USB_EP_DIEPCTL0_SNAK_Msk (0x8000000UL) /*!< USB0_EP0 DIEPCTL0: SNAK (Bitfield-Mask: 0x01) */ -#define USB_EP_DIEPCTL0_EPDis_Pos (30UL) /*!< USB0_EP0 DIEPCTL0: EPDis (Bit 30) */ -#define USB_EP_DIEPCTL0_EPDis_Msk (0x40000000UL) /*!< USB0_EP0 DIEPCTL0: EPDis (Bitfield-Mask: 0x01) */ -#define USB_EP_DIEPCTL0_EPEna_Pos (31UL) /*!< USB0_EP0 DIEPCTL0: EPEna (Bit 31) */ -#define USB_EP_DIEPCTL0_EPEna_Msk (0x80000000UL) /*!< USB0_EP0 DIEPCTL0: EPEna (Bitfield-Mask: 0x01) */ - -/* ------------------------------ USB_EP_DIEPINT0 ----------------------------- */ -#define USB_EP_DIEPINT0_XferCompl_Pos (0UL) /*!< USB0_EP0 DIEPINT0: XferCompl (Bit 0) */ -#define USB_EP_DIEPINT0_XferCompl_Msk (0x1UL) /*!< USB0_EP0 DIEPINT0: XferCompl (Bitfield-Mask: 0x01) */ -#define USB_EP_DIEPINT0_EPDisbld_Pos (1UL) /*!< USB0_EP0 DIEPINT0: EPDisbld (Bit 1) */ -#define USB_EP_DIEPINT0_EPDisbld_Msk (0x2UL) /*!< USB0_EP0 DIEPINT0: EPDisbld (Bitfield-Mask: 0x01) */ -#define USB_EP_DIEPINT0_AHBErr_Pos (2UL) /*!< USB0_EP0 DIEPINT0: AHBErr (Bit 2) */ -#define USB_EP_DIEPINT0_AHBErr_Msk (0x4UL) /*!< USB0_EP0 DIEPINT0: AHBErr (Bitfield-Mask: 0x01) */ -#define USB_EP_DIEPINT0_TimeOUT_Pos (3UL) /*!< USB0_EP0 DIEPINT0: TimeOUT (Bit 3) */ -#define USB_EP_DIEPINT0_TimeOUT_Msk (0x8UL) /*!< USB0_EP0 DIEPINT0: TimeOUT (Bitfield-Mask: 0x01) */ -#define USB_EP_DIEPINT0_INTknTXFEmp_Pos (4UL) /*!< USB0_EP0 DIEPINT0: INTknTXFEmp (Bit 4) */ -#define USB_EP_DIEPINT0_INTknTXFEmp_Msk (0x10UL) /*!< USB0_EP0 DIEPINT0: INTknTXFEmp (Bitfield-Mask: 0x01) */ -#define USB_EP_DIEPINT0_INEPNakEff_Pos (6UL) /*!< USB0_EP0 DIEPINT0: INEPNakEff (Bit 6) */ -#define USB_EP_DIEPINT0_INEPNakEff_Msk (0x40UL) /*!< USB0_EP0 DIEPINT0: INEPNakEff (Bitfield-Mask: 0x01) */ -#define USB_EP_DIEPINT0_TxFEmp_Pos (7UL) /*!< USB0_EP0 DIEPINT0: TxFEmp (Bit 7) */ -#define USB_EP_DIEPINT0_TxFEmp_Msk (0x80UL) /*!< USB0_EP0 DIEPINT0: TxFEmp (Bitfield-Mask: 0x01) */ -#define USB_EP_DIEPINT0_BNAIntr_Pos (9UL) /*!< USB0_EP0 DIEPINT0: BNAIntr (Bit 9) */ -#define USB_EP_DIEPINT0_BNAIntr_Msk (0x200UL) /*!< USB0_EP0 DIEPINT0: BNAIntr (Bitfield-Mask: 0x01) */ - -/* ----------------------------- USB_EP_DIEPTSIZ0 ----------------------------- */ -#define USB_EP_DIEPTSIZ0_XferSize_Pos (0UL) /*!< USB0_EP0 DIEPTSIZ0: XferSize (Bit 0) */ -#define USB_EP_DIEPTSIZ0_XferSize_Msk (0x7fUL) /*!< USB0_EP0 DIEPTSIZ0: XferSize (Bitfield-Mask: 0x7f) */ -#define USB_EP_DIEPTSIZ0_PktCnt_Pos (19UL) /*!< USB0_EP0 DIEPTSIZ0: PktCnt (Bit 19) */ -#define USB_EP_DIEPTSIZ0_PktCnt_Msk (0x180000UL) /*!< USB0_EP0 DIEPTSIZ0: PktCnt (Bitfield-Mask: 0x03) */ - -/* ------------------------------ USB_EP_DIEPDMA0 ----------------------------- */ -#define USB_EP_DIEPDMA0_DMAAddr_Pos (0UL) /*!< USB0_EP0 DIEPDMA0: DMAAddr (Bit 0) */ -#define USB_EP_DIEPDMA0_DMAAddr_Msk (0xffffffffUL) /*!< USB0_EP0 DIEPDMA0: DMAAddr (Bitfield-Mask: 0xffffffff) */ - -/* ------------------------------ USB_EP_DTXFSTS0 ----------------------------- */ -#define USB_EP_DTXFSTS0_INEPTxFSpcAvail_Pos (0UL) /*!< USB0_EP0 DTXFSTS0: INEPTxFSpcAvail (Bit 0) */ -#define USB_EP_DTXFSTS0_INEPTxFSpcAvail_Msk (0xffffUL) /*!< USB0_EP0 DTXFSTS0: INEPTxFSpcAvail (Bitfield-Mask: 0xffff) */ - -/* ----------------------------- USB_EP_DIEPDMAB0 ----------------------------- */ -#define USB_EP_DIEPDMAB0_DMABufferAddr_Pos (0UL) /*!< USB0_EP0 DIEPDMAB0: DMABufferAddr (Bit 0) */ -#define USB_EP_DIEPDMAB0_DMABufferAddr_Msk (0xffffffffUL) /*!< USB0_EP0 DIEPDMAB0: DMABufferAddr (Bitfield-Mask: 0xffffffff) */ - -/* ------------------------------ USB_EP_DOEPCTL0 ----------------------------- */ -#define USB_EP_DOEPCTL0_MPS_Pos (0UL) /*!< USB0_EP0 DOEPCTL0: MPS (Bit 0) */ -#define USB_EP_DOEPCTL0_MPS_Msk (0x3UL) /*!< USB0_EP0 DOEPCTL0: MPS (Bitfield-Mask: 0x03) */ -#define USB_EP_DOEPCTL0_USBActEP_Pos (15UL) /*!< USB0_EP0 DOEPCTL0: USBActEP (Bit 15) */ -#define USB_EP_DOEPCTL0_USBActEP_Msk (0x8000UL) /*!< USB0_EP0 DOEPCTL0: USBActEP (Bitfield-Mask: 0x01) */ -#define USB_EP_DOEPCTL0_NAKSts_Pos (17UL) /*!< USB0_EP0 DOEPCTL0: NAKSts (Bit 17) */ -#define USB_EP_DOEPCTL0_NAKSts_Msk (0x20000UL) /*!< USB0_EP0 DOEPCTL0: NAKSts (Bitfield-Mask: 0x01) */ -#define USB_EP_DOEPCTL0_EPType_Pos (18UL) /*!< USB0_EP0 DOEPCTL0: EPType (Bit 18) */ -#define USB_EP_DOEPCTL0_EPType_Msk (0xc0000UL) /*!< USB0_EP0 DOEPCTL0: EPType (Bitfield-Mask: 0x03) */ -#define USB_EP_DOEPCTL0_Snp_Pos (20UL) /*!< USB0_EP0 DOEPCTL0: Snp (Bit 20) */ -#define USB_EP_DOEPCTL0_Snp_Msk (0x100000UL) /*!< USB0_EP0 DOEPCTL0: Snp (Bitfield-Mask: 0x01) */ -#define USB_EP_DOEPCTL0_Stall_Pos (21UL) /*!< USB0_EP0 DOEPCTL0: Stall (Bit 21) */ -#define USB_EP_DOEPCTL0_Stall_Msk (0x200000UL) /*!< USB0_EP0 DOEPCTL0: Stall (Bitfield-Mask: 0x01) */ -#define USB_EP_DOEPCTL0_CNAK_Pos (26UL) /*!< USB0_EP0 DOEPCTL0: CNAK (Bit 26) */ -#define USB_EP_DOEPCTL0_CNAK_Msk (0x4000000UL) /*!< USB0_EP0 DOEPCTL0: CNAK (Bitfield-Mask: 0x01) */ -#define USB_EP_DOEPCTL0_SNAK_Pos (27UL) /*!< USB0_EP0 DOEPCTL0: SNAK (Bit 27) */ -#define USB_EP_DOEPCTL0_SNAK_Msk (0x8000000UL) /*!< USB0_EP0 DOEPCTL0: SNAK (Bitfield-Mask: 0x01) */ -#define USB_EP_DOEPCTL0_EPDis_Pos (30UL) /*!< USB0_EP0 DOEPCTL0: EPDis (Bit 30) */ -#define USB_EP_DOEPCTL0_EPDis_Msk (0x40000000UL) /*!< USB0_EP0 DOEPCTL0: EPDis (Bitfield-Mask: 0x01) */ -#define USB_EP_DOEPCTL0_EPEna_Pos (31UL) /*!< USB0_EP0 DOEPCTL0: EPEna (Bit 31) */ -#define USB_EP_DOEPCTL0_EPEna_Msk (0x80000000UL) /*!< USB0_EP0 DOEPCTL0: EPEna (Bitfield-Mask: 0x01) */ - -/* ------------------------------ USB_EP_DOEPINT0 ----------------------------- */ -#define USB_EP_DOEPINT0_XferCompl_Pos (0UL) /*!< USB0_EP0 DOEPINT0: XferCompl (Bit 0) */ -#define USB_EP_DOEPINT0_XferCompl_Msk (0x1UL) /*!< USB0_EP0 DOEPINT0: XferCompl (Bitfield-Mask: 0x01) */ -#define USB_EP_DOEPINT0_EPDisbld_Pos (1UL) /*!< USB0_EP0 DOEPINT0: EPDisbld (Bit 1) */ -#define USB_EP_DOEPINT0_EPDisbld_Msk (0x2UL) /*!< USB0_EP0 DOEPINT0: EPDisbld (Bitfield-Mask: 0x01) */ -#define USB_EP_DOEPINT0_AHBErr_Pos (2UL) /*!< USB0_EP0 DOEPINT0: AHBErr (Bit 2) */ -#define USB_EP_DOEPINT0_AHBErr_Msk (0x4UL) /*!< USB0_EP0 DOEPINT0: AHBErr (Bitfield-Mask: 0x01) */ -#define USB_EP_DOEPINT0_SetUp_Pos (3UL) /*!< USB0_EP0 DOEPINT0: SetUp (Bit 3) */ -#define USB_EP_DOEPINT0_SetUp_Msk (0x8UL) /*!< USB0_EP0 DOEPINT0: SetUp (Bitfield-Mask: 0x01) */ -#define USB_EP_DOEPINT0_OUTTknEPdis_Pos (4UL) /*!< USB0_EP0 DOEPINT0: OUTTknEPdis (Bit 4) */ -#define USB_EP_DOEPINT0_OUTTknEPdis_Msk (0x10UL) /*!< USB0_EP0 DOEPINT0: OUTTknEPdis (Bitfield-Mask: 0x01) */ -#define USB_EP_DOEPINT0_StsPhseRcvd_Pos (5UL) /*!< USB0_EP0 DOEPINT0: StsPhseRcvd (Bit 5) */ -#define USB_EP_DOEPINT0_StsPhseRcvd_Msk (0x20UL) /*!< USB0_EP0 DOEPINT0: StsPhseRcvd (Bitfield-Mask: 0x01) */ -#define USB_EP_DOEPINT0_Back2BackSETup_Pos (6UL) /*!< USB0_EP0 DOEPINT0: Back2BackSETup (Bit 6) */ -#define USB_EP_DOEPINT0_Back2BackSETup_Msk (0x40UL) /*!< USB0_EP0 DOEPINT0: Back2BackSETup (Bitfield-Mask: 0x01) */ -#define USB_EP_DOEPINT0_BNAIntr_Pos (9UL) /*!< USB0_EP0 DOEPINT0: BNAIntr (Bit 9) */ -#define USB_EP_DOEPINT0_BNAIntr_Msk (0x200UL) /*!< USB0_EP0 DOEPINT0: BNAIntr (Bitfield-Mask: 0x01) */ -#define USB_EP_DOEPINT0_PktDrpSts_Pos (11UL) /*!< USB0_EP0 DOEPINT0: PktDrpSts (Bit 11) */ -#define USB_EP_DOEPINT0_PktDrpSts_Msk (0x800UL) /*!< USB0_EP0 DOEPINT0: PktDrpSts (Bitfield-Mask: 0x01) */ -#define USB_EP_DOEPINT0_BbleErrIntrpt_Pos (12UL) /*!< USB0_EP0 DOEPINT0: BbleErrIntrpt (Bit 12) */ -#define USB_EP_DOEPINT0_BbleErrIntrpt_Msk (0x1000UL) /*!< USB0_EP0 DOEPINT0: BbleErrIntrpt (Bitfield-Mask: 0x01) */ -#define USB_EP_DOEPINT0_NAKIntrpt_Pos (13UL) /*!< USB0_EP0 DOEPINT0: NAKIntrpt (Bit 13) */ -#define USB_EP_DOEPINT0_NAKIntrpt_Msk (0x2000UL) /*!< USB0_EP0 DOEPINT0: NAKIntrpt (Bitfield-Mask: 0x01) */ -#define USB_EP_DOEPINT0_NYETIntrpt_Pos (14UL) /*!< USB0_EP0 DOEPINT0: NYETIntrpt (Bit 14) */ -#define USB_EP_DOEPINT0_NYETIntrpt_Msk (0x4000UL) /*!< USB0_EP0 DOEPINT0: NYETIntrpt (Bitfield-Mask: 0x01) */ - -/* ----------------------------- USB_EP_DOEPTSIZ0 ----------------------------- */ -#define USB_EP_DOEPTSIZ0_XferSize_Pos (0UL) /*!< USB0_EP0 DOEPTSIZ0: XferSize (Bit 0) */ -#define USB_EP_DOEPTSIZ0_XferSize_Msk (0x7fUL) /*!< USB0_EP0 DOEPTSIZ0: XferSize (Bitfield-Mask: 0x7f) */ -#define USB_EP_DOEPTSIZ0_PktCnt_Pos (19UL) /*!< USB0_EP0 DOEPTSIZ0: PktCnt (Bit 19) */ -#define USB_EP_DOEPTSIZ0_PktCnt_Msk (0x180000UL) /*!< USB0_EP0 DOEPTSIZ0: PktCnt (Bitfield-Mask: 0x03) */ -#define USB_EP_DOEPTSIZ0_SUPCnt_Pos (29UL) /*!< USB0_EP0 DOEPTSIZ0: SUPCnt (Bit 29) */ -#define USB_EP_DOEPTSIZ0_SUPCnt_Msk (0x60000000UL) /*!< USB0_EP0 DOEPTSIZ0: SUPCnt (Bitfield-Mask: 0x03) */ - -/* ------------------------------ USB_EP_DOEPDMA0 ----------------------------- */ -#define USB_EP_DOEPDMA0_DMAAddr_Pos (0UL) /*!< USB0_EP0 DOEPDMA0: DMAAddr (Bit 0) */ -#define USB_EP_DOEPDMA0_DMAAddr_Msk (0xffffffffUL) /*!< USB0_EP0 DOEPDMA0: DMAAddr (Bitfield-Mask: 0xffffffff) */ - -/* ----------------------------- USB_EP_DOEPDMAB0 ----------------------------- */ -#define USB_EP_DOEPDMAB0_DMABufferAddr_Pos (0UL) /*!< USB0_EP0 DOEPDMAB0: DMABufferAddr (Bit 0) */ -#define USB_EP_DOEPDMAB0_DMABufferAddr_Msk (0xffffffffUL) /*!< USB0_EP0 DOEPDMAB0: DMABufferAddr (Bitfield-Mask: 0xffffffff) */ - - -/* ================================================================================ */ -/* ================ Group 'USB_EP' Position & Mask ================ */ -/* ================================================================================ */ - - -/* --------------------------- USB_EP_DIEPCTL_ISOCONT --------------------------- */ -#define USB_EP_DIEPCTL_ISOCONT_MPS_Pos (0UL) /*!< USB_EP DIEPCTL_ISOCONT: MPS (Bit 0) */ -#define USB_EP_DIEPCTL_ISOCONT_MPS_Msk (0x7ffUL) /*!< USB_EP DIEPCTL_ISOCONT: MPS (Bitfield-Mask: 0x7ff) */ -#define USB_EP_DIEPCTL_ISOCONT_USBActEP_Pos (15UL) /*!< USB_EP DIEPCTL_ISOCONT: USBActEP (Bit 15) */ -#define USB_EP_DIEPCTL_ISOCONT_USBActEP_Msk (0x8000UL) /*!< USB_EP DIEPCTL_ISOCONT: USBActEP (Bitfield-Mask: 0x01) */ -#define USB_EP_DIEPCTL_ISOCONT_EO_FrNum_Pos (16UL) /*!< USB_EP DIEPCTL_ISOCONT: EO_FrNum (Bit 16) */ -#define USB_EP_DIEPCTL_ISOCONT_EO_FrNum_Msk (0x10000UL) /*!< USB_EP DIEPCTL_ISOCONT: EO_FrNum (Bitfield-Mask: 0x01) */ -#define USB_EP_DIEPCTL_ISOCONT_NAKSts_Pos (17UL) /*!< USB_EP DIEPCTL_ISOCONT: NAKSts (Bit 17) */ -#define USB_EP_DIEPCTL_ISOCONT_NAKSts_Msk (0x20000UL) /*!< USB_EP DIEPCTL_ISOCONT: NAKSts (Bitfield-Mask: 0x01) */ -#define USB_EP_DIEPCTL_ISOCONT_EPType_Pos (18UL) /*!< USB_EP DIEPCTL_ISOCONT: EPType (Bit 18) */ -#define USB_EP_DIEPCTL_ISOCONT_EPType_Msk (0xc0000UL) /*!< USB_EP DIEPCTL_ISOCONT: EPType (Bitfield-Mask: 0x03) */ -#define USB_EP_DIEPCTL_ISOCONT_Snp_Pos (20UL) /*!< USB_EP DIEPCTL_ISOCONT: Snp (Bit 20) */ -#define USB_EP_DIEPCTL_ISOCONT_Snp_Msk (0x100000UL) /*!< USB_EP DIEPCTL_ISOCONT: Snp (Bitfield-Mask: 0x01) */ -#define USB_EP_DIEPCTL_ISOCONT_Stall_Pos (21UL) /*!< USB_EP DIEPCTL_ISOCONT: Stall (Bit 21) */ -#define USB_EP_DIEPCTL_ISOCONT_Stall_Msk (0x200000UL) /*!< USB_EP DIEPCTL_ISOCONT: Stall (Bitfield-Mask: 0x01) */ -#define USB_EP_DIEPCTL_ISOCONT_TxFNum_Pos (22UL) /*!< USB_EP DIEPCTL_ISOCONT: TxFNum (Bit 22) */ -#define USB_EP_DIEPCTL_ISOCONT_TxFNum_Msk (0x3c00000UL) /*!< USB_EP DIEPCTL_ISOCONT: TxFNum (Bitfield-Mask: 0x0f) */ -#define USB_EP_DIEPCTL_ISOCONT_CNAK_Pos (26UL) /*!< USB_EP DIEPCTL_ISOCONT: CNAK (Bit 26) */ -#define USB_EP_DIEPCTL_ISOCONT_CNAK_Msk (0x4000000UL) /*!< USB_EP DIEPCTL_ISOCONT: CNAK (Bitfield-Mask: 0x01) */ -#define USB_EP_DIEPCTL_ISOCONT_SNAK_Pos (27UL) /*!< USB_EP DIEPCTL_ISOCONT: SNAK (Bit 27) */ -#define USB_EP_DIEPCTL_ISOCONT_SNAK_Msk (0x8000000UL) /*!< USB_EP DIEPCTL_ISOCONT: SNAK (Bitfield-Mask: 0x01) */ -#define USB_EP_DIEPCTL_ISOCONT_SetEvenFr_Pos (28UL) /*!< USB_EP DIEPCTL_ISOCONT: SetEvenFr (Bit 28) */ -#define USB_EP_DIEPCTL_ISOCONT_SetEvenFr_Msk (0x10000000UL) /*!< USB_EP DIEPCTL_ISOCONT: SetEvenFr (Bitfield-Mask: 0x01) */ -#define USB_EP_DIEPCTL_ISOCONT_SetOddFr_Pos (29UL) /*!< USB_EP DIEPCTL_ISOCONT: SetOddFr (Bit 29) */ -#define USB_EP_DIEPCTL_ISOCONT_SetOddFr_Msk (0x20000000UL) /*!< USB_EP DIEPCTL_ISOCONT: SetOddFr (Bitfield-Mask: 0x01) */ -#define USB_EP_DIEPCTL_ISOCONT_EPDis_Pos (30UL) /*!< USB_EP DIEPCTL_ISOCONT: EPDis (Bit 30) */ -#define USB_EP_DIEPCTL_ISOCONT_EPDis_Msk (0x40000000UL) /*!< USB_EP DIEPCTL_ISOCONT: EPDis (Bitfield-Mask: 0x01) */ -#define USB_EP_DIEPCTL_ISOCONT_EPEna_Pos (31UL) /*!< USB_EP DIEPCTL_ISOCONT: EPEna (Bit 31) */ -#define USB_EP_DIEPCTL_ISOCONT_EPEna_Msk (0x80000000UL) /*!< USB_EP DIEPCTL_ISOCONT: EPEna (Bitfield-Mask: 0x01) */ - -/* --------------------------- USB_EP_DIEPCTL_INTBULK --------------------------- */ -#define USB_EP_DIEPCTL_INTBULK_MPS_Pos (0UL) /*!< USB_EP DIEPCTL_INTBULK: MPS (Bit 0) */ -#define USB_EP_DIEPCTL_INTBULK_MPS_Msk (0x7ffUL) /*!< USB_EP DIEPCTL_INTBULK: MPS (Bitfield-Mask: 0x7ff) */ -#define USB_EP_DIEPCTL_INTBULK_USBActEP_Pos (15UL) /*!< USB_EP DIEPCTL_INTBULK: USBActEP (Bit 15) */ -#define USB_EP_DIEPCTL_INTBULK_USBActEP_Msk (0x8000UL) /*!< USB_EP DIEPCTL_INTBULK: USBActEP (Bitfield-Mask: 0x01) */ -#define USB_EP_DIEPCTL_INTBULK_DPID_Pos (16UL) /*!< USB_EP DIEPCTL_INTBULK: DPID (Bit 16) */ -#define USB_EP_DIEPCTL_INTBULK_DPID_Msk (0x10000UL) /*!< USB_EP DIEPCTL_INTBULK: DPID (Bitfield-Mask: 0x01) */ -#define USB_EP_DIEPCTL_INTBULK_NAKSts_Pos (17UL) /*!< USB_EP DIEPCTL_INTBULK: NAKSts (Bit 17) */ -#define USB_EP_DIEPCTL_INTBULK_NAKSts_Msk (0x20000UL) /*!< USB_EP DIEPCTL_INTBULK: NAKSts (Bitfield-Mask: 0x01) */ -#define USB_EP_DIEPCTL_INTBULK_EPType_Pos (18UL) /*!< USB_EP DIEPCTL_INTBULK: EPType (Bit 18) */ -#define USB_EP_DIEPCTL_INTBULK_EPType_Msk (0xc0000UL) /*!< USB_EP DIEPCTL_INTBULK: EPType (Bitfield-Mask: 0x03) */ -#define USB_EP_DIEPCTL_INTBULK_Snp_Pos (20UL) /*!< USB_EP DIEPCTL_INTBULK: Snp (Bit 20) */ -#define USB_EP_DIEPCTL_INTBULK_Snp_Msk (0x100000UL) /*!< USB_EP DIEPCTL_INTBULK: Snp (Bitfield-Mask: 0x01) */ -#define USB_EP_DIEPCTL_INTBULK_Stall_Pos (21UL) /*!< USB_EP DIEPCTL_INTBULK: Stall (Bit 21) */ -#define USB_EP_DIEPCTL_INTBULK_Stall_Msk (0x200000UL) /*!< USB_EP DIEPCTL_INTBULK: Stall (Bitfield-Mask: 0x01) */ -#define USB_EP_DIEPCTL_INTBULK_TxFNum_Pos (22UL) /*!< USB_EP DIEPCTL_INTBULK: TxFNum (Bit 22) */ -#define USB_EP_DIEPCTL_INTBULK_TxFNum_Msk (0x3c00000UL) /*!< USB_EP DIEPCTL_INTBULK: TxFNum (Bitfield-Mask: 0x0f) */ -#define USB_EP_DIEPCTL_INTBULK_CNAK_Pos (26UL) /*!< USB_EP DIEPCTL_INTBULK: CNAK (Bit 26) */ -#define USB_EP_DIEPCTL_INTBULK_CNAK_Msk (0x4000000UL) /*!< USB_EP DIEPCTL_INTBULK: CNAK (Bitfield-Mask: 0x01) */ -#define USB_EP_DIEPCTL_INTBULK_SNAK_Pos (27UL) /*!< USB_EP DIEPCTL_INTBULK: SNAK (Bit 27) */ -#define USB_EP_DIEPCTL_INTBULK_SNAK_Msk (0x8000000UL) /*!< USB_EP DIEPCTL_INTBULK: SNAK (Bitfield-Mask: 0x01) */ -#define USB_EP_DIEPCTL_INTBULK_SetD0PID_Pos (28UL) /*!< USB_EP DIEPCTL_INTBULK: SetD0PID (Bit 28) */ -#define USB_EP_DIEPCTL_INTBULK_SetD0PID_Msk (0x10000000UL) /*!< USB_EP DIEPCTL_INTBULK: SetD0PID (Bitfield-Mask: 0x01) */ -#define USB_EP_DIEPCTL_INTBULK_SetD1PID_Pos (29UL) /*!< USB_EP DIEPCTL_INTBULK: SetD1PID (Bit 29) */ -#define USB_EP_DIEPCTL_INTBULK_SetD1PID_Msk (0x20000000UL) /*!< USB_EP DIEPCTL_INTBULK: SetD1PID (Bitfield-Mask: 0x01) */ -#define USB_EP_DIEPCTL_INTBULK_EPDis_Pos (30UL) /*!< USB_EP DIEPCTL_INTBULK: EPDis (Bit 30) */ -#define USB_EP_DIEPCTL_INTBULK_EPDis_Msk (0x40000000UL) /*!< USB_EP DIEPCTL_INTBULK: EPDis (Bitfield-Mask: 0x01) */ -#define USB_EP_DIEPCTL_INTBULK_EPEna_Pos (31UL) /*!< USB_EP DIEPCTL_INTBULK: EPEna (Bit 31) */ -#define USB_EP_DIEPCTL_INTBULK_EPEna_Msk (0x80000000UL) /*!< USB_EP DIEPCTL_INTBULK: EPEna (Bitfield-Mask: 0x01) */ - -/* ------------------------------- USB_EP_DIEPINT ------------------------------- */ -#define USB_EP_DIEPINT_XferCompl_Pos (0UL) /*!< USB_EP DIEPINT: XferCompl (Bit 0) */ -#define USB_EP_DIEPINT_XferCompl_Msk (0x1UL) /*!< USB_EP DIEPINT: XferCompl (Bitfield-Mask: 0x01) */ -#define USB_EP_DIEPINT_EPDisbld_Pos (1UL) /*!< USB_EP DIEPINT: EPDisbld (Bit 1) */ -#define USB_EP_DIEPINT_EPDisbld_Msk (0x2UL) /*!< USB_EP DIEPINT: EPDisbld (Bitfield-Mask: 0x01) */ -#define USB_EP_DIEPINT_AHBErr_Pos (2UL) /*!< USB_EP DIEPINT: AHBErr (Bit 2) */ -#define USB_EP_DIEPINT_AHBErr_Msk (0x4UL) /*!< USB_EP DIEPINT: AHBErr (Bitfield-Mask: 0x01) */ -#define USB_EP_DIEPINT_TimeOUT_Pos (3UL) /*!< USB_EP DIEPINT: TimeOUT (Bit 3) */ -#define USB_EP_DIEPINT_TimeOUT_Msk (0x8UL) /*!< USB_EP DIEPINT: TimeOUT (Bitfield-Mask: 0x01) */ -#define USB_EP_DIEPINT_INTknTXFEmp_Pos (4UL) /*!< USB_EP DIEPINT: INTknTXFEmp (Bit 4) */ -#define USB_EP_DIEPINT_INTknTXFEmp_Msk (0x10UL) /*!< USB_EP DIEPINT: INTknTXFEmp (Bitfield-Mask: 0x01) */ -#define USB_EP_DIEPINT_INEPNakEff_Pos (6UL) /*!< USB_EP DIEPINT: INEPNakEff (Bit 6) */ -#define USB_EP_DIEPINT_INEPNakEff_Msk (0x40UL) /*!< USB_EP DIEPINT: INEPNakEff (Bitfield-Mask: 0x01) */ -#define USB_EP_DIEPINT_TxFEmp_Pos (7UL) /*!< USB_EP DIEPINT: TxFEmp (Bit 7) */ -#define USB_EP_DIEPINT_TxFEmp_Msk (0x80UL) /*!< USB_EP DIEPINT: TxFEmp (Bitfield-Mask: 0x01) */ -#define USB_EP_DIEPINT_BNAIntr_Pos (9UL) /*!< USB_EP DIEPINT: BNAIntr (Bit 9) */ -#define USB_EP_DIEPINT_BNAIntr_Msk (0x200UL) /*!< USB_EP DIEPINT: BNAIntr (Bitfield-Mask: 0x01) */ - -/* ------------------------------- USB_EP_DIEPTSIZ ------------------------------ */ -#define USB_EP_DIEPTSIZ_XferSize_Pos (0UL) /*!< USB_EP DIEPTSIZ: XferSize (Bit 0) */ -#define USB_EP_DIEPTSIZ_XferSize_Msk (0x7ffffUL) /*!< USB_EP DIEPTSIZ: XferSize (Bitfield-Mask: 0x7ffff) */ -#define USB_EP_DIEPTSIZ_PktCnt_Pos (19UL) /*!< USB_EP DIEPTSIZ: PktCnt (Bit 19) */ -#define USB_EP_DIEPTSIZ_PktCnt_Msk (0x1ff80000UL) /*!< USB_EP DIEPTSIZ: PktCnt (Bitfield-Mask: 0x3ff) */ - -/* ------------------------------- USB_EP_DIEPDMA ------------------------------- */ -#define USB_EP_DIEPDMA_DMAAddr_Pos (0UL) /*!< USB_EP DIEPDMA: DMAAddr (Bit 0) */ -#define USB_EP_DIEPDMA_DMAAddr_Msk (0xffffffffUL) /*!< USB_EP DIEPDMA: DMAAddr (Bitfield-Mask: 0xffffffff) */ - -/* ------------------------------- USB_EP_DTXFSTS ------------------------------- */ -#define USB_EP_DTXFSTS_INEPTxFSpcAvail_Pos (0UL) /*!< USB_EP DTXFSTS: INEPTxFSpcAvail (Bit 0) */ -#define USB_EP_DTXFSTS_INEPTxFSpcAvail_Msk (0xffffUL) /*!< USB_EP DTXFSTS: INEPTxFSpcAvail (Bitfield-Mask: 0xffff) */ - -/* ------------------------------- USB_EP_DIEPDMAB ------------------------------ */ -#define USB_EP_DIEPDMAB_DMABufferAddr_Pos (0UL) /*!< USB_EP DIEPDMAB: DMABufferAddr (Bit 0) */ -#define USB_EP_DIEPDMAB_DMABufferAddr_Msk (0xffffffffUL) /*!< USB_EP DIEPDMAB: DMABufferAddr (Bitfield-Mask: 0xffffffff) */ - -/* --------------------------- USB_EP_DOEPCTL_ISOCONT --------------------------- */ -#define USB_EP_DOEPCTL_ISOCONT_MPS_Pos (0UL) /*!< USB_EP DOEPCTL_ISOCONT: MPS (Bit 0) */ -#define USB_EP_DOEPCTL_ISOCONT_MPS_Msk (0x7ffUL) /*!< USB_EP DOEPCTL_ISOCONT: MPS (Bitfield-Mask: 0x7ff) */ -#define USB_EP_DOEPCTL_ISOCONT_USBActEP_Pos (15UL) /*!< USB_EP DOEPCTL_ISOCONT: USBActEP (Bit 15) */ -#define USB_EP_DOEPCTL_ISOCONT_USBActEP_Msk (0x8000UL) /*!< USB_EP DOEPCTL_ISOCONT: USBActEP (Bitfield-Mask: 0x01) */ -#define USB_EP_DOEPCTL_ISOCONT_EO_FrNum_Pos (16UL) /*!< USB_EP DOEPCTL_ISOCONT: EO_FrNum (Bit 16) */ -#define USB_EP_DOEPCTL_ISOCONT_EO_FrNum_Msk (0x10000UL) /*!< USB_EP DOEPCTL_ISOCONT: EO_FrNum (Bitfield-Mask: 0x01) */ -#define USB_EP_DOEPCTL_ISOCONT_NAKSts_Pos (17UL) /*!< USB_EP DOEPCTL_ISOCONT: NAKSts (Bit 17) */ -#define USB_EP_DOEPCTL_ISOCONT_NAKSts_Msk (0x20000UL) /*!< USB_EP DOEPCTL_ISOCONT: NAKSts (Bitfield-Mask: 0x01) */ -#define USB_EP_DOEPCTL_ISOCONT_EPType_Pos (18UL) /*!< USB_EP DOEPCTL_ISOCONT: EPType (Bit 18) */ -#define USB_EP_DOEPCTL_ISOCONT_EPType_Msk (0xc0000UL) /*!< USB_EP DOEPCTL_ISOCONT: EPType (Bitfield-Mask: 0x03) */ -#define USB_EP_DOEPCTL_ISOCONT_Snp_Pos (20UL) /*!< USB_EP DOEPCTL_ISOCONT: Snp (Bit 20) */ -#define USB_EP_DOEPCTL_ISOCONT_Snp_Msk (0x100000UL) /*!< USB_EP DOEPCTL_ISOCONT: Snp (Bitfield-Mask: 0x01) */ -#define USB_EP_DOEPCTL_ISOCONT_Stall_Pos (21UL) /*!< USB_EP DOEPCTL_ISOCONT: Stall (Bit 21) */ -#define USB_EP_DOEPCTL_ISOCONT_Stall_Msk (0x200000UL) /*!< USB_EP DOEPCTL_ISOCONT: Stall (Bitfield-Mask: 0x01) */ -#define USB_EP_DOEPCTL_ISOCONT_TxFNum_Pos (22UL) /*!< USB_EP DOEPCTL_ISOCONT: TxFNum (Bit 22) */ -#define USB_EP_DOEPCTL_ISOCONT_TxFNum_Msk (0x3c00000UL) /*!< USB_EP DOEPCTL_ISOCONT: TxFNum (Bitfield-Mask: 0x0f) */ -#define USB_EP_DOEPCTL_ISOCONT_CNAK_Pos (26UL) /*!< USB_EP DOEPCTL_ISOCONT: CNAK (Bit 26) */ -#define USB_EP_DOEPCTL_ISOCONT_CNAK_Msk (0x4000000UL) /*!< USB_EP DOEPCTL_ISOCONT: CNAK (Bitfield-Mask: 0x01) */ -#define USB_EP_DOEPCTL_ISOCONT_SNAK_Pos (27UL) /*!< USB_EP DOEPCTL_ISOCONT: SNAK (Bit 27) */ -#define USB_EP_DOEPCTL_ISOCONT_SNAK_Msk (0x8000000UL) /*!< USB_EP DOEPCTL_ISOCONT: SNAK (Bitfield-Mask: 0x01) */ -#define USB_EP_DOEPCTL_ISOCONT_SetEvenFr_Pos (28UL) /*!< USB_EP DOEPCTL_ISOCONT: SetEvenFr (Bit 28) */ -#define USB_EP_DOEPCTL_ISOCONT_SetEvenFr_Msk (0x10000000UL) /*!< USB_EP DOEPCTL_ISOCONT: SetEvenFr (Bitfield-Mask: 0x01) */ -#define USB_EP_DOEPCTL_ISOCONT_SetOddFr_Pos (29UL) /*!< USB_EP DOEPCTL_ISOCONT: SetOddFr (Bit 29) */ -#define USB_EP_DOEPCTL_ISOCONT_SetOddFr_Msk (0x20000000UL) /*!< USB_EP DOEPCTL_ISOCONT: SetOddFr (Bitfield-Mask: 0x01) */ -#define USB_EP_DOEPCTL_ISOCONT_EPDis_Pos (30UL) /*!< USB_EP DOEPCTL_ISOCONT: EPDis (Bit 30) */ -#define USB_EP_DOEPCTL_ISOCONT_EPDis_Msk (0x40000000UL) /*!< USB_EP DOEPCTL_ISOCONT: EPDis (Bitfield-Mask: 0x01) */ -#define USB_EP_DOEPCTL_ISOCONT_EPEna_Pos (31UL) /*!< USB_EP DOEPCTL_ISOCONT: EPEna (Bit 31) */ -#define USB_EP_DOEPCTL_ISOCONT_EPEna_Msk (0x80000000UL) /*!< USB_EP DOEPCTL_ISOCONT: EPEna (Bitfield-Mask: 0x01) */ - -/* --------------------------- USB_EP_DOEPCTL_INTBULK --------------------------- */ -#define USB_EP_DOEPCTL_INTBULK_MPS_Pos (0UL) /*!< USB_EP DOEPCTL_INTBULK: MPS (Bit 0) */ -#define USB_EP_DOEPCTL_INTBULK_MPS_Msk (0x7ffUL) /*!< USB_EP DOEPCTL_INTBULK: MPS (Bitfield-Mask: 0x7ff) */ -#define USB_EP_DOEPCTL_INTBULK_USBActEP_Pos (15UL) /*!< USB_EP DOEPCTL_INTBULK: USBActEP (Bit 15) */ -#define USB_EP_DOEPCTL_INTBULK_USBActEP_Msk (0x8000UL) /*!< USB_EP DOEPCTL_INTBULK: USBActEP (Bitfield-Mask: 0x01) */ -#define USB_EP_DOEPCTL_INTBULK_DPID_Pos (16UL) /*!< USB_EP DOEPCTL_INTBULK: DPID (Bit 16) */ -#define USB_EP_DOEPCTL_INTBULK_DPID_Msk (0x10000UL) /*!< USB_EP DOEPCTL_INTBULK: DPID (Bitfield-Mask: 0x01) */ -#define USB_EP_DOEPCTL_INTBULK_NAKSts_Pos (17UL) /*!< USB_EP DOEPCTL_INTBULK: NAKSts (Bit 17) */ -#define USB_EP_DOEPCTL_INTBULK_NAKSts_Msk (0x20000UL) /*!< USB_EP DOEPCTL_INTBULK: NAKSts (Bitfield-Mask: 0x01) */ -#define USB_EP_DOEPCTL_INTBULK_EPType_Pos (18UL) /*!< USB_EP DOEPCTL_INTBULK: EPType (Bit 18) */ -#define USB_EP_DOEPCTL_INTBULK_EPType_Msk (0xc0000UL) /*!< USB_EP DOEPCTL_INTBULK: EPType (Bitfield-Mask: 0x03) */ -#define USB_EP_DOEPCTL_INTBULK_Snp_Pos (20UL) /*!< USB_EP DOEPCTL_INTBULK: Snp (Bit 20) */ -#define USB_EP_DOEPCTL_INTBULK_Snp_Msk (0x100000UL) /*!< USB_EP DOEPCTL_INTBULK: Snp (Bitfield-Mask: 0x01) */ -#define USB_EP_DOEPCTL_INTBULK_Stall_Pos (21UL) /*!< USB_EP DOEPCTL_INTBULK: Stall (Bit 21) */ -#define USB_EP_DOEPCTL_INTBULK_Stall_Msk (0x200000UL) /*!< USB_EP DOEPCTL_INTBULK: Stall (Bitfield-Mask: 0x01) */ -#define USB_EP_DOEPCTL_INTBULK_TxFNum_Pos (22UL) /*!< USB_EP DOEPCTL_INTBULK: TxFNum (Bit 22) */ -#define USB_EP_DOEPCTL_INTBULK_TxFNum_Msk (0x3c00000UL) /*!< USB_EP DOEPCTL_INTBULK: TxFNum (Bitfield-Mask: 0x0f) */ -#define USB_EP_DOEPCTL_INTBULK_CNAK_Pos (26UL) /*!< USB_EP DOEPCTL_INTBULK: CNAK (Bit 26) */ -#define USB_EP_DOEPCTL_INTBULK_CNAK_Msk (0x4000000UL) /*!< USB_EP DOEPCTL_INTBULK: CNAK (Bitfield-Mask: 0x01) */ -#define USB_EP_DOEPCTL_INTBULK_SNAK_Pos (27UL) /*!< USB_EP DOEPCTL_INTBULK: SNAK (Bit 27) */ -#define USB_EP_DOEPCTL_INTBULK_SNAK_Msk (0x8000000UL) /*!< USB_EP DOEPCTL_INTBULK: SNAK (Bitfield-Mask: 0x01) */ -#define USB_EP_DOEPCTL_INTBULK_SetD0PID_Pos (28UL) /*!< USB_EP DOEPCTL_INTBULK: SetD0PID (Bit 28) */ -#define USB_EP_DOEPCTL_INTBULK_SetD0PID_Msk (0x10000000UL) /*!< USB_EP DOEPCTL_INTBULK: SetD0PID (Bitfield-Mask: 0x01) */ -#define USB_EP_DOEPCTL_INTBULK_SetD1PID_Pos (29UL) /*!< USB_EP DOEPCTL_INTBULK: SetD1PID (Bit 29) */ -#define USB_EP_DOEPCTL_INTBULK_SetD1PID_Msk (0x20000000UL) /*!< USB_EP DOEPCTL_INTBULK: SetD1PID (Bitfield-Mask: 0x01) */ -#define USB_EP_DOEPCTL_INTBULK_EPDis_Pos (30UL) /*!< USB_EP DOEPCTL_INTBULK: EPDis (Bit 30) */ -#define USB_EP_DOEPCTL_INTBULK_EPDis_Msk (0x40000000UL) /*!< USB_EP DOEPCTL_INTBULK: EPDis (Bitfield-Mask: 0x01) */ -#define USB_EP_DOEPCTL_INTBULK_EPEna_Pos (31UL) /*!< USB_EP DOEPCTL_INTBULK: EPEna (Bit 31) */ -#define USB_EP_DOEPCTL_INTBULK_EPEna_Msk (0x80000000UL) /*!< USB_EP DOEPCTL_INTBULK: EPEna (Bitfield-Mask: 0x01) */ - -/* ------------------------------- USB_EP_DOEPINT ------------------------------- */ -#define USB_EP_DOEPINT_XferCompl_Pos (0UL) /*!< USB_EP DOEPINT: XferCompl (Bit 0) */ -#define USB_EP_DOEPINT_XferCompl_Msk (0x1UL) /*!< USB_EP DOEPINT: XferCompl (Bitfield-Mask: 0x01) */ -#define USB_EP_DOEPINT_EPDisbld_Pos (1UL) /*!< USB_EP DOEPINT: EPDisbld (Bit 1) */ -#define USB_EP_DOEPINT_EPDisbld_Msk (0x2UL) /*!< USB_EP DOEPINT: EPDisbld (Bitfield-Mask: 0x01) */ -#define USB_EP_DOEPINT_AHBErr_Pos (2UL) /*!< USB_EP DOEPINT: AHBErr (Bit 2) */ -#define USB_EP_DOEPINT_AHBErr_Msk (0x4UL) /*!< USB_EP DOEPINT: AHBErr (Bitfield-Mask: 0x01) */ -#define USB_EP_DOEPINT_SetUp_Pos (3UL) /*!< USB_EP DOEPINT: SetUp (Bit 3) */ -#define USB_EP_DOEPINT_SetUp_Msk (0x8UL) /*!< USB_EP DOEPINT: SetUp (Bitfield-Mask: 0x01) */ -#define USB_EP_DOEPINT_OUTTknEPdis_Pos (4UL) /*!< USB_EP DOEPINT: OUTTknEPdis (Bit 4) */ -#define USB_EP_DOEPINT_OUTTknEPdis_Msk (0x10UL) /*!< USB_EP DOEPINT: OUTTknEPdis (Bitfield-Mask: 0x01) */ -#define USB_EP_DOEPINT_StsPhseRcvd_Pos (5UL) /*!< USB_EP DOEPINT: StsPhseRcvd (Bit 5) */ -#define USB_EP_DOEPINT_StsPhseRcvd_Msk (0x20UL) /*!< USB_EP DOEPINT: StsPhseRcvd (Bitfield-Mask: 0x01) */ -#define USB_EP_DOEPINT_Back2BackSETup_Pos (6UL) /*!< USB_EP DOEPINT: Back2BackSETup (Bit 6) */ -#define USB_EP_DOEPINT_Back2BackSETup_Msk (0x40UL) /*!< USB_EP DOEPINT: Back2BackSETup (Bitfield-Mask: 0x01) */ -#define USB_EP_DOEPINT_BNAIntr_Pos (9UL) /*!< USB_EP DOEPINT: BNAIntr (Bit 9) */ -#define USB_EP_DOEPINT_BNAIntr_Msk (0x200UL) /*!< USB_EP DOEPINT: BNAIntr (Bitfield-Mask: 0x01) */ -#define USB_EP_DOEPINT_PktDrpSts_Pos (11UL) /*!< USB_EP DOEPINT: PktDrpSts (Bit 11) */ -#define USB_EP_DOEPINT_PktDrpSts_Msk (0x800UL) /*!< USB_EP DOEPINT: PktDrpSts (Bitfield-Mask: 0x01) */ -#define USB_EP_DOEPINT_BbleErrIntrpt_Pos (12UL) /*!< USB_EP DOEPINT: BbleErrIntrpt (Bit 12) */ -#define USB_EP_DOEPINT_BbleErrIntrpt_Msk (0x1000UL) /*!< USB_EP DOEPINT: BbleErrIntrpt (Bitfield-Mask: 0x01) */ -#define USB_EP_DOEPINT_NAKIntrpt_Pos (13UL) /*!< USB_EP DOEPINT: NAKIntrpt (Bit 13) */ -#define USB_EP_DOEPINT_NAKIntrpt_Msk (0x2000UL) /*!< USB_EP DOEPINT: NAKIntrpt (Bitfield-Mask: 0x01) */ -#define USB_EP_DOEPINT_NYETIntrpt_Pos (14UL) /*!< USB_EP DOEPINT: NYETIntrpt (Bit 14) */ -#define USB_EP_DOEPINT_NYETIntrpt_Msk (0x4000UL) /*!< USB_EP DOEPINT: NYETIntrpt (Bitfield-Mask: 0x01) */ - -/* ----------------------------- USB_EP_DOEPTSIZ_ISO ---------------------------- */ -#define USB_EP_DOEPTSIZ_ISO_XferSize_Pos (0UL) /*!< USB_EP DOEPTSIZ_ISO: XferSize (Bit 0) */ -#define USB_EP_DOEPTSIZ_ISO_XferSize_Msk (0x7ffffUL) /*!< USB_EP DOEPTSIZ_ISO: XferSize (Bitfield-Mask: 0x7ffff) */ -#define USB_EP_DOEPTSIZ_ISO_PktCnt_Pos (19UL) /*!< USB_EP DOEPTSIZ_ISO: PktCnt (Bit 19) */ -#define USB_EP_DOEPTSIZ_ISO_PktCnt_Msk (0x1ff80000UL) /*!< USB_EP DOEPTSIZ_ISO: PktCnt (Bitfield-Mask: 0x3ff) */ -#define USB_EP_DOEPTSIZ_ISO_RxDPID_Pos (29UL) /*!< USB_EP DOEPTSIZ_ISO: RxDPID (Bit 29) */ -#define USB_EP_DOEPTSIZ_ISO_RxDPID_Msk (0x60000000UL) /*!< USB_EP DOEPTSIZ_ISO: RxDPID (Bitfield-Mask: 0x03) */ - -/* --------------------------- USB_EP_DOEPTSIZ_CONTROL -------------------------- */ -#define USB_EP_DOEPTSIZ_CONTROL_XferSize_Pos (0UL) /*!< USB_EP DOEPTSIZ_CONTROL: XferSize (Bit 0) */ -#define USB_EP_DOEPTSIZ_CONTROL_XferSize_Msk (0x7ffffUL) /*!< USB_EP DOEPTSIZ_CONTROL: XferSize (Bitfield-Mask: 0x7ffff) */ -#define USB_EP_DOEPTSIZ_CONTROL_PktCnt_Pos (19UL) /*!< USB_EP DOEPTSIZ_CONTROL: PktCnt (Bit 19) */ -#define USB_EP_DOEPTSIZ_CONTROL_PktCnt_Msk (0x1ff80000UL) /*!< USB_EP DOEPTSIZ_CONTROL: PktCnt (Bitfield-Mask: 0x3ff) */ -#define USB_EP_DOEPTSIZ_CONTROL_SUPCnt_Pos (29UL) /*!< USB_EP DOEPTSIZ_CONTROL: SUPCnt (Bit 29) */ -#define USB_EP_DOEPTSIZ_CONTROL_SUPCnt_Msk (0x60000000UL) /*!< USB_EP DOEPTSIZ_CONTROL: SUPCnt (Bitfield-Mask: 0x03) */ - -/* ------------------------------- USB_EP_DOEPDMA ------------------------------- */ -#define USB_EP_DOEPDMA_DMAAddr_Pos (0UL) /*!< USB_EP DOEPDMA: DMAAddr (Bit 0) */ -#define USB_EP_DOEPDMA_DMAAddr_Msk (0xffffffffUL) /*!< USB_EP DOEPDMA: DMAAddr (Bitfield-Mask: 0xffffffff) */ - -/* ------------------------------- USB_EP_DOEPDMAB ------------------------------ */ -#define USB_EP_DOEPDMAB_DMABufferAddr_Pos (0UL) /*!< USB_EP DOEPDMAB: DMABufferAddr (Bit 0) */ -#define USB_EP_DOEPDMAB_DMABufferAddr_Msk (0xffffffffUL) /*!< USB_EP DOEPDMAB: DMABufferAddr (Bitfield-Mask: 0xffffffff) */ - - -/* ================================================================================ */ -/* ================ Group 'USB_CH' Position & Mask ================ */ -/* ================================================================================ */ - - -/* -------------------------------- USB_CH_HCCHAR ------------------------------- */ -#define USB_CH_HCCHAR_MPS_Pos (0UL) /*!< USB_CH HCCHAR: MPS (Bit 0) */ -#define USB_CH_HCCHAR_MPS_Msk (0x7ffUL) /*!< USB_CH HCCHAR: MPS (Bitfield-Mask: 0x7ff) */ -#define USB_CH_HCCHAR_EPNum_Pos (11UL) /*!< USB_CH HCCHAR: EPNum (Bit 11) */ -#define USB_CH_HCCHAR_EPNum_Msk (0x7800UL) /*!< USB_CH HCCHAR: EPNum (Bitfield-Mask: 0x0f) */ -#define USB_CH_HCCHAR_EPDir_Pos (15UL) /*!< USB_CH HCCHAR: EPDir (Bit 15) */ -#define USB_CH_HCCHAR_EPDir_Msk (0x8000UL) /*!< USB_CH HCCHAR: EPDir (Bitfield-Mask: 0x01) */ -#define USB_CH_HCCHAR_EPType_Pos (18UL) /*!< USB_CH HCCHAR: EPType (Bit 18) */ -#define USB_CH_HCCHAR_EPType_Msk (0xc0000UL) /*!< USB_CH HCCHAR: EPType (Bitfield-Mask: 0x03) */ -#define USB_CH_HCCHAR_MC_EC_Pos (20UL) /*!< USB_CH HCCHAR: MC_EC (Bit 20) */ -#define USB_CH_HCCHAR_MC_EC_Msk (0x300000UL) /*!< USB_CH HCCHAR: MC_EC (Bitfield-Mask: 0x03) */ -#define USB_CH_HCCHAR_DevAddr_Pos (22UL) /*!< USB_CH HCCHAR: DevAddr (Bit 22) */ -#define USB_CH_HCCHAR_DevAddr_Msk (0x1fc00000UL) /*!< USB_CH HCCHAR: DevAddr (Bitfield-Mask: 0x7f) */ -#define USB_CH_HCCHAR_OddFrm_Pos (29UL) /*!< USB_CH HCCHAR: OddFrm (Bit 29) */ -#define USB_CH_HCCHAR_OddFrm_Msk (0x20000000UL) /*!< USB_CH HCCHAR: OddFrm (Bitfield-Mask: 0x01) */ -#define USB_CH_HCCHAR_ChDis_Pos (30UL) /*!< USB_CH HCCHAR: ChDis (Bit 30) */ -#define USB_CH_HCCHAR_ChDis_Msk (0x40000000UL) /*!< USB_CH HCCHAR: ChDis (Bitfield-Mask: 0x01) */ -#define USB_CH_HCCHAR_ChEna_Pos (31UL) /*!< USB_CH HCCHAR: ChEna (Bit 31) */ -#define USB_CH_HCCHAR_ChEna_Msk (0x80000000UL) /*!< USB_CH HCCHAR: ChEna (Bitfield-Mask: 0x01) */ - -/* -------------------------------- USB_CH_HCINT -------------------------------- */ -#define USB_CH_HCINT_XferCompl_Pos (0UL) /*!< USB_CH HCINT: XferCompl (Bit 0) */ -#define USB_CH_HCINT_XferCompl_Msk (0x1UL) /*!< USB_CH HCINT: XferCompl (Bitfield-Mask: 0x01) */ -#define USB_CH_HCINT_ChHltd_Pos (1UL) /*!< USB_CH HCINT: ChHltd (Bit 1) */ -#define USB_CH_HCINT_ChHltd_Msk (0x2UL) /*!< USB_CH HCINT: ChHltd (Bitfield-Mask: 0x01) */ -#define USB_CH_HCINT_AHBErr_Pos (2UL) /*!< USB_CH HCINT: AHBErr (Bit 2) */ -#define USB_CH_HCINT_AHBErr_Msk (0x4UL) /*!< USB_CH HCINT: AHBErr (Bitfield-Mask: 0x01) */ -#define USB_CH_HCINT_STALL_Pos (3UL) /*!< USB_CH HCINT: STALL (Bit 3) */ -#define USB_CH_HCINT_STALL_Msk (0x8UL) /*!< USB_CH HCINT: STALL (Bitfield-Mask: 0x01) */ -#define USB_CH_HCINT_NAK_Pos (4UL) /*!< USB_CH HCINT: NAK (Bit 4) */ -#define USB_CH_HCINT_NAK_Msk (0x10UL) /*!< USB_CH HCINT: NAK (Bitfield-Mask: 0x01) */ -#define USB_CH_HCINT_ACK_Pos (5UL) /*!< USB_CH HCINT: ACK (Bit 5) */ -#define USB_CH_HCINT_ACK_Msk (0x20UL) /*!< USB_CH HCINT: ACK (Bitfield-Mask: 0x01) */ -#define USB_CH_HCINT_NYET_Pos (6UL) /*!< USB_CH HCINT: NYET (Bit 6) */ -#define USB_CH_HCINT_NYET_Msk (0x40UL) /*!< USB_CH HCINT: NYET (Bitfield-Mask: 0x01) */ -#define USB_CH_HCINT_XactErr_Pos (7UL) /*!< USB_CH HCINT: XactErr (Bit 7) */ -#define USB_CH_HCINT_XactErr_Msk (0x80UL) /*!< USB_CH HCINT: XactErr (Bitfield-Mask: 0x01) */ -#define USB_CH_HCINT_BblErr_Pos (8UL) /*!< USB_CH HCINT: BblErr (Bit 8) */ -#define USB_CH_HCINT_BblErr_Msk (0x100UL) /*!< USB_CH HCINT: BblErr (Bitfield-Mask: 0x01) */ -#define USB_CH_HCINT_FrmOvrun_Pos (9UL) /*!< USB_CH HCINT: FrmOvrun (Bit 9) */ -#define USB_CH_HCINT_FrmOvrun_Msk (0x200UL) /*!< USB_CH HCINT: FrmOvrun (Bitfield-Mask: 0x01) */ -#define USB_CH_HCINT_DataTglErr_Pos (10UL) /*!< USB_CH HCINT: DataTglErr (Bit 10) */ -#define USB_CH_HCINT_DataTglErr_Msk (0x400UL) /*!< USB_CH HCINT: DataTglErr (Bitfield-Mask: 0x01) */ -#define USB_CH_HCINT_BNAIntr_Pos (11UL) /*!< USB_CH HCINT: BNAIntr (Bit 11) */ -#define USB_CH_HCINT_BNAIntr_Msk (0x800UL) /*!< USB_CH HCINT: BNAIntr (Bitfield-Mask: 0x01) */ -#define USB_CH_HCINT_XCS_XACT_ERR_Pos (12UL) /*!< USB_CH HCINT: XCS_XACT_ERR (Bit 12) */ -#define USB_CH_HCINT_XCS_XACT_ERR_Msk (0x1000UL) /*!< USB_CH HCINT: XCS_XACT_ERR (Bitfield-Mask: 0x01) */ -#define USB_CH_HCINT_DESC_LST_ROLLIntr_Pos (13UL) /*!< USB_CH HCINT: DESC_LST_ROLLIntr (Bit 13) */ -#define USB_CH_HCINT_DESC_LST_ROLLIntr_Msk (0x2000UL) /*!< USB_CH HCINT: DESC_LST_ROLLIntr (Bitfield-Mask: 0x01) */ - -/* ------------------------------- USB_CH_HCINTMSK ------------------------------ */ -#define USB_CH_HCINTMSK_XferComplMsk_Pos (0UL) /*!< USB_CH HCINTMSK: XferComplMsk (Bit 0) */ -#define USB_CH_HCINTMSK_XferComplMsk_Msk (0x1UL) /*!< USB_CH HCINTMSK: XferComplMsk (Bitfield-Mask: 0x01) */ -#define USB_CH_HCINTMSK_ChHltdMsk_Pos (1UL) /*!< USB_CH HCINTMSK: ChHltdMsk (Bit 1) */ -#define USB_CH_HCINTMSK_ChHltdMsk_Msk (0x2UL) /*!< USB_CH HCINTMSK: ChHltdMsk (Bitfield-Mask: 0x01) */ -#define USB_CH_HCINTMSK_AHBErrMsk_Pos (2UL) /*!< USB_CH HCINTMSK: AHBErrMsk (Bit 2) */ -#define USB_CH_HCINTMSK_AHBErrMsk_Msk (0x4UL) /*!< USB_CH HCINTMSK: AHBErrMsk (Bitfield-Mask: 0x01) */ -#define USB_CH_HCINTMSK_StallMsk_Pos (3UL) /*!< USB_CH HCINTMSK: StallMsk (Bit 3) */ -#define USB_CH_HCINTMSK_StallMsk_Msk (0x8UL) /*!< USB_CH HCINTMSK: StallMsk (Bitfield-Mask: 0x01) */ -#define USB_CH_HCINTMSK_NakMsk_Pos (4UL) /*!< USB_CH HCINTMSK: NakMsk (Bit 4) */ -#define USB_CH_HCINTMSK_NakMsk_Msk (0x10UL) /*!< USB_CH HCINTMSK: NakMsk (Bitfield-Mask: 0x01) */ -#define USB_CH_HCINTMSK_AckMsk_Pos (5UL) /*!< USB_CH HCINTMSK: AckMsk (Bit 5) */ -#define USB_CH_HCINTMSK_AckMsk_Msk (0x20UL) /*!< USB_CH HCINTMSK: AckMsk (Bitfield-Mask: 0x01) */ -#define USB_CH_HCINTMSK_NyetMsk_Pos (6UL) /*!< USB_CH HCINTMSK: NyetMsk (Bit 6) */ -#define USB_CH_HCINTMSK_NyetMsk_Msk (0x40UL) /*!< USB_CH HCINTMSK: NyetMsk (Bitfield-Mask: 0x01) */ -#define USB_CH_HCINTMSK_XactErrMsk_Pos (7UL) /*!< USB_CH HCINTMSK: XactErrMsk (Bit 7) */ -#define USB_CH_HCINTMSK_XactErrMsk_Msk (0x80UL) /*!< USB_CH HCINTMSK: XactErrMsk (Bitfield-Mask: 0x01) */ -#define USB_CH_HCINTMSK_BblErrMsk_Pos (8UL) /*!< USB_CH HCINTMSK: BblErrMsk (Bit 8) */ -#define USB_CH_HCINTMSK_BblErrMsk_Msk (0x100UL) /*!< USB_CH HCINTMSK: BblErrMsk (Bitfield-Mask: 0x01) */ -#define USB_CH_HCINTMSK_FrmOvrunMsk_Pos (9UL) /*!< USB_CH HCINTMSK: FrmOvrunMsk (Bit 9) */ -#define USB_CH_HCINTMSK_FrmOvrunMsk_Msk (0x200UL) /*!< USB_CH HCINTMSK: FrmOvrunMsk (Bitfield-Mask: 0x01) */ -#define USB_CH_HCINTMSK_DataTglErrMsk_Pos (10UL) /*!< USB_CH HCINTMSK: DataTglErrMsk (Bit 10) */ -#define USB_CH_HCINTMSK_DataTglErrMsk_Msk (0x400UL) /*!< USB_CH HCINTMSK: DataTglErrMsk (Bitfield-Mask: 0x01) */ -#define USB_CH_HCINTMSK_BNAIntrMsk_Pos (11UL) /*!< USB_CH HCINTMSK: BNAIntrMsk (Bit 11) */ -#define USB_CH_HCINTMSK_BNAIntrMsk_Msk (0x800UL) /*!< USB_CH HCINTMSK: BNAIntrMsk (Bitfield-Mask: 0x01) */ -#define USB_CH_HCINTMSK_DESC_LST_ROLLIntrMsk_Pos (13UL) /*!< USB_CH HCINTMSK: DESC_LST_ROLLIntrMsk (Bit 13) */ -#define USB_CH_HCINTMSK_DESC_LST_ROLLIntrMsk_Msk (0x2000UL) /*!< USB_CH HCINTMSK: DESC_LST_ROLLIntrMsk (Bitfield-Mask: 0x01) */ - -/* -------------------------- USB_CH_HCTSIZ_BUFFERMODE -------------------------- */ -#define USB_CH_HCTSIZ_BUFFERMODE_XferSize_Pos (0UL) /*!< USB_CH HCTSIZ_BUFFERMODE: XferSize (Bit 0) */ -#define USB_CH_HCTSIZ_BUFFERMODE_XferSize_Msk (0x7ffffUL) /*!< USB_CH HCTSIZ_BUFFERMODE: XferSize (Bitfield-Mask: 0x7ffff) */ -#define USB_CH_HCTSIZ_BUFFERMODE_PktCnt_Pos (19UL) /*!< USB_CH HCTSIZ_BUFFERMODE: PktCnt (Bit 19) */ -#define USB_CH_HCTSIZ_BUFFERMODE_PktCnt_Msk (0x1ff80000UL) /*!< USB_CH HCTSIZ_BUFFERMODE: PktCnt (Bitfield-Mask: 0x3ff) */ -#define USB_CH_HCTSIZ_BUFFERMODE_Pid_Pos (29UL) /*!< USB_CH HCTSIZ_BUFFERMODE: Pid (Bit 29) */ -#define USB_CH_HCTSIZ_BUFFERMODE_Pid_Msk (0x60000000UL) /*!< USB_CH HCTSIZ_BUFFERMODE: Pid (Bitfield-Mask: 0x03) */ - -/* -------------------------- USB_CH_HCTSIZ_SCATGATHER -------------------------- */ -#define USB_CH_HCTSIZ_SCATGATHER_SCHED_INFO_Pos (0UL) /*!< USB_CH HCTSIZ_SCATGATHER: SCHED_INFO (Bit 0) */ -#define USB_CH_HCTSIZ_SCATGATHER_SCHED_INFO_Msk (0xffUL) /*!< USB_CH HCTSIZ_SCATGATHER: SCHED_INFO (Bitfield-Mask: 0xff) */ -#define USB_CH_HCTSIZ_SCATGATHER_NTD_Pos (8UL) /*!< USB_CH HCTSIZ_SCATGATHER: NTD (Bit 8) */ -#define USB_CH_HCTSIZ_SCATGATHER_NTD_Msk (0xff00UL) /*!< USB_CH HCTSIZ_SCATGATHER: NTD (Bitfield-Mask: 0xff) */ -#define USB_CH_HCTSIZ_SCATGATHER_Pid_Pos (29UL) /*!< USB_CH HCTSIZ_SCATGATHER: Pid (Bit 29) */ -#define USB_CH_HCTSIZ_SCATGATHER_Pid_Msk (0x60000000UL) /*!< USB_CH HCTSIZ_SCATGATHER: Pid (Bitfield-Mask: 0x03) */ - -/* --------------------------- USB_CH_HCDMA_BUFFERMODE -------------------------- */ -#define USB_CH_HCDMA_BUFFERMODE_DMAAddr_Pos (0UL) /*!< USB_CH HCDMA_BUFFERMODE: DMAAddr (Bit 0) */ -#define USB_CH_HCDMA_BUFFERMODE_DMAAddr_Msk (0xffffffffUL) /*!< USB_CH HCDMA_BUFFERMODE: DMAAddr (Bitfield-Mask: 0xffffffff) */ - -/* --------------------------- USB_CH_HCDMA_SCATGATHER -------------------------- */ -#define USB_CH_HCDMA_SCATGATHER_CTD_Pos (3UL) /*!< USB_CH HCDMA_SCATGATHER: CTD (Bit 3) */ -#define USB_CH_HCDMA_SCATGATHER_CTD_Msk (0x1f8UL) /*!< USB_CH HCDMA_SCATGATHER: CTD (Bitfield-Mask: 0x3f) */ -#define USB_CH_HCDMA_SCATGATHER_DMAAddr_Pos (9UL) /*!< USB_CH HCDMA_SCATGATHER: DMAAddr (Bit 9) */ -#define USB_CH_HCDMA_SCATGATHER_DMAAddr_Msk (0xfffffe00UL) /*!< USB_CH HCDMA_SCATGATHER: DMAAddr (Bitfield-Mask: 0x7fffff) */ - -/* -------------------------------- USB_CH_HCDMAB ------------------------------- */ -#define USB_CH_HCDMAB_Buffer_Address_Pos (0UL) /*!< USB_CH HCDMAB: Buffer_Address (Bit 0) */ -#define USB_CH_HCDMAB_Buffer_Address_Msk (0xffffffffUL) /*!< USB_CH HCDMAB: Buffer_Address (Bitfield-Mask: 0xffffffff) */ - - -/* ================================================================================ */ -/* ================ Group 'USIC' Position & Mask ================ */ -/* ================================================================================ */ - - -/* ----------------------------------- USIC_ID ---------------------------------- */ -#define USIC_ID_MOD_REV_Pos (0UL) /*!< USIC ID: MOD_REV (Bit 0) */ -#define USIC_ID_MOD_REV_Msk (0xffUL) /*!< USIC ID: MOD_REV (Bitfield-Mask: 0xff) */ -#define USIC_ID_MOD_TYPE_Pos (8UL) /*!< USIC ID: MOD_TYPE (Bit 8) */ -#define USIC_ID_MOD_TYPE_Msk (0xff00UL) /*!< USIC ID: MOD_TYPE (Bitfield-Mask: 0xff) */ -#define USIC_ID_MOD_NUMBER_Pos (16UL) /*!< USIC ID: MOD_NUMBER (Bit 16) */ -#define USIC_ID_MOD_NUMBER_Msk (0xffff0000UL) /*!< USIC ID: MOD_NUMBER (Bitfield-Mask: 0xffff) */ - - -/* ================================================================================ */ -/* ================ Group 'USIC_CH' Position & Mask ================ */ -/* ================================================================================ */ - - -/* -------------------------------- USIC_CH_CCFG -------------------------------- */ -#define USIC_CH_CCFG_SSC_Pos (0UL) /*!< USIC_CH CCFG: SSC (Bit 0) */ -#define USIC_CH_CCFG_SSC_Msk (0x1UL) /*!< USIC_CH CCFG: SSC (Bitfield-Mask: 0x01) */ -#define USIC_CH_CCFG_ASC_Pos (1UL) /*!< USIC_CH CCFG: ASC (Bit 1) */ -#define USIC_CH_CCFG_ASC_Msk (0x2UL) /*!< USIC_CH CCFG: ASC (Bitfield-Mask: 0x01) */ -#define USIC_CH_CCFG_IIC_Pos (2UL) /*!< USIC_CH CCFG: IIC (Bit 2) */ -#define USIC_CH_CCFG_IIC_Msk (0x4UL) /*!< USIC_CH CCFG: IIC (Bitfield-Mask: 0x01) */ -#define USIC_CH_CCFG_IIS_Pos (3UL) /*!< USIC_CH CCFG: IIS (Bit 3) */ -#define USIC_CH_CCFG_IIS_Msk (0x8UL) /*!< USIC_CH CCFG: IIS (Bitfield-Mask: 0x01) */ -#define USIC_CH_CCFG_RB_Pos (6UL) /*!< USIC_CH CCFG: RB (Bit 6) */ -#define USIC_CH_CCFG_RB_Msk (0x40UL) /*!< USIC_CH CCFG: RB (Bitfield-Mask: 0x01) */ -#define USIC_CH_CCFG_TB_Pos (7UL) /*!< USIC_CH CCFG: TB (Bit 7) */ -#define USIC_CH_CCFG_TB_Msk (0x80UL) /*!< USIC_CH CCFG: TB (Bitfield-Mask: 0x01) */ - -/* -------------------------------- USIC_CH_KSCFG ------------------------------- */ -#define USIC_CH_KSCFG_MODEN_Pos (0UL) /*!< USIC_CH KSCFG: MODEN (Bit 0) */ -#define USIC_CH_KSCFG_MODEN_Msk (0x1UL) /*!< USIC_CH KSCFG: MODEN (Bitfield-Mask: 0x01) */ -#define USIC_CH_KSCFG_BPMODEN_Pos (1UL) /*!< USIC_CH KSCFG: BPMODEN (Bit 1) */ -#define USIC_CH_KSCFG_BPMODEN_Msk (0x2UL) /*!< USIC_CH KSCFG: BPMODEN (Bitfield-Mask: 0x01) */ -#define USIC_CH_KSCFG_NOMCFG_Pos (4UL) /*!< USIC_CH KSCFG: NOMCFG (Bit 4) */ -#define USIC_CH_KSCFG_NOMCFG_Msk (0x30UL) /*!< USIC_CH KSCFG: NOMCFG (Bitfield-Mask: 0x03) */ -#define USIC_CH_KSCFG_BPNOM_Pos (7UL) /*!< USIC_CH KSCFG: BPNOM (Bit 7) */ -#define USIC_CH_KSCFG_BPNOM_Msk (0x80UL) /*!< USIC_CH KSCFG: BPNOM (Bitfield-Mask: 0x01) */ -#define USIC_CH_KSCFG_SUMCFG_Pos (8UL) /*!< USIC_CH KSCFG: SUMCFG (Bit 8) */ -#define USIC_CH_KSCFG_SUMCFG_Msk (0x300UL) /*!< USIC_CH KSCFG: SUMCFG (Bitfield-Mask: 0x03) */ -#define USIC_CH_KSCFG_BPSUM_Pos (11UL) /*!< USIC_CH KSCFG: BPSUM (Bit 11) */ -#define USIC_CH_KSCFG_BPSUM_Msk (0x800UL) /*!< USIC_CH KSCFG: BPSUM (Bitfield-Mask: 0x01) */ - -/* --------------------------------- USIC_CH_FDR -------------------------------- */ -#define USIC_CH_FDR_STEP_Pos (0UL) /*!< USIC_CH FDR: STEP (Bit 0) */ -#define USIC_CH_FDR_STEP_Msk (0x3ffUL) /*!< USIC_CH FDR: STEP (Bitfield-Mask: 0x3ff) */ -#define USIC_CH_FDR_DM_Pos (14UL) /*!< USIC_CH FDR: DM (Bit 14) */ -#define USIC_CH_FDR_DM_Msk (0xc000UL) /*!< USIC_CH FDR: DM (Bitfield-Mask: 0x03) */ -#define USIC_CH_FDR_RESULT_Pos (16UL) /*!< USIC_CH FDR: RESULT (Bit 16) */ -#define USIC_CH_FDR_RESULT_Msk (0x3ff0000UL) /*!< USIC_CH FDR: RESULT (Bitfield-Mask: 0x3ff) */ - -/* --------------------------------- USIC_CH_BRG -------------------------------- */ -#define USIC_CH_BRG_CLKSEL_Pos (0UL) /*!< USIC_CH BRG: CLKSEL (Bit 0) */ -#define USIC_CH_BRG_CLKSEL_Msk (0x3UL) /*!< USIC_CH BRG: CLKSEL (Bitfield-Mask: 0x03) */ -#define USIC_CH_BRG_TMEN_Pos (3UL) /*!< USIC_CH BRG: TMEN (Bit 3) */ -#define USIC_CH_BRG_TMEN_Msk (0x8UL) /*!< USIC_CH BRG: TMEN (Bitfield-Mask: 0x01) */ -#define USIC_CH_BRG_PPPEN_Pos (4UL) /*!< USIC_CH BRG: PPPEN (Bit 4) */ -#define USIC_CH_BRG_PPPEN_Msk (0x10UL) /*!< USIC_CH BRG: PPPEN (Bitfield-Mask: 0x01) */ -#define USIC_CH_BRG_CTQSEL_Pos (6UL) /*!< USIC_CH BRG: CTQSEL (Bit 6) */ -#define USIC_CH_BRG_CTQSEL_Msk (0xc0UL) /*!< USIC_CH BRG: CTQSEL (Bitfield-Mask: 0x03) */ -#define USIC_CH_BRG_PCTQ_Pos (8UL) /*!< USIC_CH BRG: PCTQ (Bit 8) */ -#define USIC_CH_BRG_PCTQ_Msk (0x300UL) /*!< USIC_CH BRG: PCTQ (Bitfield-Mask: 0x03) */ -#define USIC_CH_BRG_DCTQ_Pos (10UL) /*!< USIC_CH BRG: DCTQ (Bit 10) */ -#define USIC_CH_BRG_DCTQ_Msk (0x7c00UL) /*!< USIC_CH BRG: DCTQ (Bitfield-Mask: 0x1f) */ -#define USIC_CH_BRG_PDIV_Pos (16UL) /*!< USIC_CH BRG: PDIV (Bit 16) */ -#define USIC_CH_BRG_PDIV_Msk (0x3ff0000UL) /*!< USIC_CH BRG: PDIV (Bitfield-Mask: 0x3ff) */ -#define USIC_CH_BRG_SCLKOSEL_Pos (28UL) /*!< USIC_CH BRG: SCLKOSEL (Bit 28) */ -#define USIC_CH_BRG_SCLKOSEL_Msk (0x10000000UL) /*!< USIC_CH BRG: SCLKOSEL (Bitfield-Mask: 0x01) */ -#define USIC_CH_BRG_MCLKCFG_Pos (29UL) /*!< USIC_CH BRG: MCLKCFG (Bit 29) */ -#define USIC_CH_BRG_MCLKCFG_Msk (0x20000000UL) /*!< USIC_CH BRG: MCLKCFG (Bitfield-Mask: 0x01) */ -#define USIC_CH_BRG_SCLKCFG_Pos (30UL) /*!< USIC_CH BRG: SCLKCFG (Bit 30) */ -#define USIC_CH_BRG_SCLKCFG_Msk (0xc0000000UL) /*!< USIC_CH BRG: SCLKCFG (Bitfield-Mask: 0x03) */ - -/* -------------------------------- USIC_CH_INPR -------------------------------- */ -#define USIC_CH_INPR_TSINP_Pos (0UL) /*!< USIC_CH INPR: TSINP (Bit 0) */ -#define USIC_CH_INPR_TSINP_Msk (0x7UL) /*!< USIC_CH INPR: TSINP (Bitfield-Mask: 0x07) */ -#define USIC_CH_INPR_TBINP_Pos (4UL) /*!< USIC_CH INPR: TBINP (Bit 4) */ -#define USIC_CH_INPR_TBINP_Msk (0x70UL) /*!< USIC_CH INPR: TBINP (Bitfield-Mask: 0x07) */ -#define USIC_CH_INPR_RINP_Pos (8UL) /*!< USIC_CH INPR: RINP (Bit 8) */ -#define USIC_CH_INPR_RINP_Msk (0x700UL) /*!< USIC_CH INPR: RINP (Bitfield-Mask: 0x07) */ -#define USIC_CH_INPR_AINP_Pos (12UL) /*!< USIC_CH INPR: AINP (Bit 12) */ -#define USIC_CH_INPR_AINP_Msk (0x7000UL) /*!< USIC_CH INPR: AINP (Bitfield-Mask: 0x07) */ -#define USIC_CH_INPR_PINP_Pos (16UL) /*!< USIC_CH INPR: PINP (Bit 16) */ -#define USIC_CH_INPR_PINP_Msk (0x70000UL) /*!< USIC_CH INPR: PINP (Bitfield-Mask: 0x07) */ - -/* -------------------------------- USIC_CH_DX0CR ------------------------------- */ -#define USIC_CH_DX0CR_DSEL_Pos (0UL) /*!< USIC_CH DX0CR: DSEL (Bit 0) */ -#define USIC_CH_DX0CR_DSEL_Msk (0x7UL) /*!< USIC_CH DX0CR: DSEL (Bitfield-Mask: 0x07) */ -#define USIC_CH_DX0CR_INSW_Pos (4UL) /*!< USIC_CH DX0CR: INSW (Bit 4) */ -#define USIC_CH_DX0CR_INSW_Msk (0x10UL) /*!< USIC_CH DX0CR: INSW (Bitfield-Mask: 0x01) */ -#define USIC_CH_DX0CR_DFEN_Pos (5UL) /*!< USIC_CH DX0CR: DFEN (Bit 5) */ -#define USIC_CH_DX0CR_DFEN_Msk (0x20UL) /*!< USIC_CH DX0CR: DFEN (Bitfield-Mask: 0x01) */ -#define USIC_CH_DX0CR_DSEN_Pos (6UL) /*!< USIC_CH DX0CR: DSEN (Bit 6) */ -#define USIC_CH_DX0CR_DSEN_Msk (0x40UL) /*!< USIC_CH DX0CR: DSEN (Bitfield-Mask: 0x01) */ -#define USIC_CH_DX0CR_DPOL_Pos (8UL) /*!< USIC_CH DX0CR: DPOL (Bit 8) */ -#define USIC_CH_DX0CR_DPOL_Msk (0x100UL) /*!< USIC_CH DX0CR: DPOL (Bitfield-Mask: 0x01) */ -#define USIC_CH_DX0CR_SFSEL_Pos (9UL) /*!< USIC_CH DX0CR: SFSEL (Bit 9) */ -#define USIC_CH_DX0CR_SFSEL_Msk (0x200UL) /*!< USIC_CH DX0CR: SFSEL (Bitfield-Mask: 0x01) */ -#define USIC_CH_DX0CR_CM_Pos (10UL) /*!< USIC_CH DX0CR: CM (Bit 10) */ -#define USIC_CH_DX0CR_CM_Msk (0xc00UL) /*!< USIC_CH DX0CR: CM (Bitfield-Mask: 0x03) */ -#define USIC_CH_DX0CR_DXS_Pos (15UL) /*!< USIC_CH DX0CR: DXS (Bit 15) */ -#define USIC_CH_DX0CR_DXS_Msk (0x8000UL) /*!< USIC_CH DX0CR: DXS (Bitfield-Mask: 0x01) */ - -/* -------------------------------- USIC_CH_DX1CR ------------------------------- */ -#define USIC_CH_DX1CR_DSEL_Pos (0UL) /*!< USIC_CH DX1CR: DSEL (Bit 0) */ -#define USIC_CH_DX1CR_DSEL_Msk (0x7UL) /*!< USIC_CH DX1CR: DSEL (Bitfield-Mask: 0x07) */ -#define USIC_CH_DX1CR_DCEN_Pos (3UL) /*!< USIC_CH DX1CR: DCEN (Bit 3) */ -#define USIC_CH_DX1CR_DCEN_Msk (0x8UL) /*!< USIC_CH DX1CR: DCEN (Bitfield-Mask: 0x01) */ -#define USIC_CH_DX1CR_INSW_Pos (4UL) /*!< USIC_CH DX1CR: INSW (Bit 4) */ -#define USIC_CH_DX1CR_INSW_Msk (0x10UL) /*!< USIC_CH DX1CR: INSW (Bitfield-Mask: 0x01) */ -#define USIC_CH_DX1CR_DFEN_Pos (5UL) /*!< USIC_CH DX1CR: DFEN (Bit 5) */ -#define USIC_CH_DX1CR_DFEN_Msk (0x20UL) /*!< USIC_CH DX1CR: DFEN (Bitfield-Mask: 0x01) */ -#define USIC_CH_DX1CR_DSEN_Pos (6UL) /*!< USIC_CH DX1CR: DSEN (Bit 6) */ -#define USIC_CH_DX1CR_DSEN_Msk (0x40UL) /*!< USIC_CH DX1CR: DSEN (Bitfield-Mask: 0x01) */ -#define USIC_CH_DX1CR_DPOL_Pos (8UL) /*!< USIC_CH DX1CR: DPOL (Bit 8) */ -#define USIC_CH_DX1CR_DPOL_Msk (0x100UL) /*!< USIC_CH DX1CR: DPOL (Bitfield-Mask: 0x01) */ -#define USIC_CH_DX1CR_SFSEL_Pos (9UL) /*!< USIC_CH DX1CR: SFSEL (Bit 9) */ -#define USIC_CH_DX1CR_SFSEL_Msk (0x200UL) /*!< USIC_CH DX1CR: SFSEL (Bitfield-Mask: 0x01) */ -#define USIC_CH_DX1CR_CM_Pos (10UL) /*!< USIC_CH DX1CR: CM (Bit 10) */ -#define USIC_CH_DX1CR_CM_Msk (0xc00UL) /*!< USIC_CH DX1CR: CM (Bitfield-Mask: 0x03) */ -#define USIC_CH_DX1CR_DXS_Pos (15UL) /*!< USIC_CH DX1CR: DXS (Bit 15) */ -#define USIC_CH_DX1CR_DXS_Msk (0x8000UL) /*!< USIC_CH DX1CR: DXS (Bitfield-Mask: 0x01) */ - -/* -------------------------------- USIC_CH_DX2CR ------------------------------- */ -#define USIC_CH_DX2CR_DSEL_Pos (0UL) /*!< USIC_CH DX2CR: DSEL (Bit 0) */ -#define USIC_CH_DX2CR_DSEL_Msk (0x7UL) /*!< USIC_CH DX2CR: DSEL (Bitfield-Mask: 0x07) */ -#define USIC_CH_DX2CR_INSW_Pos (4UL) /*!< USIC_CH DX2CR: INSW (Bit 4) */ -#define USIC_CH_DX2CR_INSW_Msk (0x10UL) /*!< USIC_CH DX2CR: INSW (Bitfield-Mask: 0x01) */ -#define USIC_CH_DX2CR_DFEN_Pos (5UL) /*!< USIC_CH DX2CR: DFEN (Bit 5) */ -#define USIC_CH_DX2CR_DFEN_Msk (0x20UL) /*!< USIC_CH DX2CR: DFEN (Bitfield-Mask: 0x01) */ -#define USIC_CH_DX2CR_DSEN_Pos (6UL) /*!< USIC_CH DX2CR: DSEN (Bit 6) */ -#define USIC_CH_DX2CR_DSEN_Msk (0x40UL) /*!< USIC_CH DX2CR: DSEN (Bitfield-Mask: 0x01) */ -#define USIC_CH_DX2CR_DPOL_Pos (8UL) /*!< USIC_CH DX2CR: DPOL (Bit 8) */ -#define USIC_CH_DX2CR_DPOL_Msk (0x100UL) /*!< USIC_CH DX2CR: DPOL (Bitfield-Mask: 0x01) */ -#define USIC_CH_DX2CR_SFSEL_Pos (9UL) /*!< USIC_CH DX2CR: SFSEL (Bit 9) */ -#define USIC_CH_DX2CR_SFSEL_Msk (0x200UL) /*!< USIC_CH DX2CR: SFSEL (Bitfield-Mask: 0x01) */ -#define USIC_CH_DX2CR_CM_Pos (10UL) /*!< USIC_CH DX2CR: CM (Bit 10) */ -#define USIC_CH_DX2CR_CM_Msk (0xc00UL) /*!< USIC_CH DX2CR: CM (Bitfield-Mask: 0x03) */ -#define USIC_CH_DX2CR_DXS_Pos (15UL) /*!< USIC_CH DX2CR: DXS (Bit 15) */ -#define USIC_CH_DX2CR_DXS_Msk (0x8000UL) /*!< USIC_CH DX2CR: DXS (Bitfield-Mask: 0x01) */ - -/* -------------------------------- USIC_CH_DX3CR ------------------------------- */ -#define USIC_CH_DX3CR_DSEL_Pos (0UL) /*!< USIC_CH DX3CR: DSEL (Bit 0) */ -#define USIC_CH_DX3CR_DSEL_Msk (0x7UL) /*!< USIC_CH DX3CR: DSEL (Bitfield-Mask: 0x07) */ -#define USIC_CH_DX3CR_INSW_Pos (4UL) /*!< USIC_CH DX3CR: INSW (Bit 4) */ -#define USIC_CH_DX3CR_INSW_Msk (0x10UL) /*!< USIC_CH DX3CR: INSW (Bitfield-Mask: 0x01) */ -#define USIC_CH_DX3CR_DFEN_Pos (5UL) /*!< USIC_CH DX3CR: DFEN (Bit 5) */ -#define USIC_CH_DX3CR_DFEN_Msk (0x20UL) /*!< USIC_CH DX3CR: DFEN (Bitfield-Mask: 0x01) */ -#define USIC_CH_DX3CR_DSEN_Pos (6UL) /*!< USIC_CH DX3CR: DSEN (Bit 6) */ -#define USIC_CH_DX3CR_DSEN_Msk (0x40UL) /*!< USIC_CH DX3CR: DSEN (Bitfield-Mask: 0x01) */ -#define USIC_CH_DX3CR_DPOL_Pos (8UL) /*!< USIC_CH DX3CR: DPOL (Bit 8) */ -#define USIC_CH_DX3CR_DPOL_Msk (0x100UL) /*!< USIC_CH DX3CR: DPOL (Bitfield-Mask: 0x01) */ -#define USIC_CH_DX3CR_SFSEL_Pos (9UL) /*!< USIC_CH DX3CR: SFSEL (Bit 9) */ -#define USIC_CH_DX3CR_SFSEL_Msk (0x200UL) /*!< USIC_CH DX3CR: SFSEL (Bitfield-Mask: 0x01) */ -#define USIC_CH_DX3CR_CM_Pos (10UL) /*!< USIC_CH DX3CR: CM (Bit 10) */ -#define USIC_CH_DX3CR_CM_Msk (0xc00UL) /*!< USIC_CH DX3CR: CM (Bitfield-Mask: 0x03) */ -#define USIC_CH_DX3CR_DXS_Pos (15UL) /*!< USIC_CH DX3CR: DXS (Bit 15) */ -#define USIC_CH_DX3CR_DXS_Msk (0x8000UL) /*!< USIC_CH DX3CR: DXS (Bitfield-Mask: 0x01) */ - -/* -------------------------------- USIC_CH_DX4CR ------------------------------- */ -#define USIC_CH_DX4CR_DSEL_Pos (0UL) /*!< USIC_CH DX4CR: DSEL (Bit 0) */ -#define USIC_CH_DX4CR_DSEL_Msk (0x7UL) /*!< USIC_CH DX4CR: DSEL (Bitfield-Mask: 0x07) */ -#define USIC_CH_DX4CR_INSW_Pos (4UL) /*!< USIC_CH DX4CR: INSW (Bit 4) */ -#define USIC_CH_DX4CR_INSW_Msk (0x10UL) /*!< USIC_CH DX4CR: INSW (Bitfield-Mask: 0x01) */ -#define USIC_CH_DX4CR_DFEN_Pos (5UL) /*!< USIC_CH DX4CR: DFEN (Bit 5) */ -#define USIC_CH_DX4CR_DFEN_Msk (0x20UL) /*!< USIC_CH DX4CR: DFEN (Bitfield-Mask: 0x01) */ -#define USIC_CH_DX4CR_DSEN_Pos (6UL) /*!< USIC_CH DX4CR: DSEN (Bit 6) */ -#define USIC_CH_DX4CR_DSEN_Msk (0x40UL) /*!< USIC_CH DX4CR: DSEN (Bitfield-Mask: 0x01) */ -#define USIC_CH_DX4CR_DPOL_Pos (8UL) /*!< USIC_CH DX4CR: DPOL (Bit 8) */ -#define USIC_CH_DX4CR_DPOL_Msk (0x100UL) /*!< USIC_CH DX4CR: DPOL (Bitfield-Mask: 0x01) */ -#define USIC_CH_DX4CR_SFSEL_Pos (9UL) /*!< USIC_CH DX4CR: SFSEL (Bit 9) */ -#define USIC_CH_DX4CR_SFSEL_Msk (0x200UL) /*!< USIC_CH DX4CR: SFSEL (Bitfield-Mask: 0x01) */ -#define USIC_CH_DX4CR_CM_Pos (10UL) /*!< USIC_CH DX4CR: CM (Bit 10) */ -#define USIC_CH_DX4CR_CM_Msk (0xc00UL) /*!< USIC_CH DX4CR: CM (Bitfield-Mask: 0x03) */ -#define USIC_CH_DX4CR_DXS_Pos (15UL) /*!< USIC_CH DX4CR: DXS (Bit 15) */ -#define USIC_CH_DX4CR_DXS_Msk (0x8000UL) /*!< USIC_CH DX4CR: DXS (Bitfield-Mask: 0x01) */ - -/* -------------------------------- USIC_CH_DX5CR ------------------------------- */ -#define USIC_CH_DX5CR_DSEL_Pos (0UL) /*!< USIC_CH DX5CR: DSEL (Bit 0) */ -#define USIC_CH_DX5CR_DSEL_Msk (0x7UL) /*!< USIC_CH DX5CR: DSEL (Bitfield-Mask: 0x07) */ -#define USIC_CH_DX5CR_INSW_Pos (4UL) /*!< USIC_CH DX5CR: INSW (Bit 4) */ -#define USIC_CH_DX5CR_INSW_Msk (0x10UL) /*!< USIC_CH DX5CR: INSW (Bitfield-Mask: 0x01) */ -#define USIC_CH_DX5CR_DFEN_Pos (5UL) /*!< USIC_CH DX5CR: DFEN (Bit 5) */ -#define USIC_CH_DX5CR_DFEN_Msk (0x20UL) /*!< USIC_CH DX5CR: DFEN (Bitfield-Mask: 0x01) */ -#define USIC_CH_DX5CR_DSEN_Pos (6UL) /*!< USIC_CH DX5CR: DSEN (Bit 6) */ -#define USIC_CH_DX5CR_DSEN_Msk (0x40UL) /*!< USIC_CH DX5CR: DSEN (Bitfield-Mask: 0x01) */ -#define USIC_CH_DX5CR_DPOL_Pos (8UL) /*!< USIC_CH DX5CR: DPOL (Bit 8) */ -#define USIC_CH_DX5CR_DPOL_Msk (0x100UL) /*!< USIC_CH DX5CR: DPOL (Bitfield-Mask: 0x01) */ -#define USIC_CH_DX5CR_SFSEL_Pos (9UL) /*!< USIC_CH DX5CR: SFSEL (Bit 9) */ -#define USIC_CH_DX5CR_SFSEL_Msk (0x200UL) /*!< USIC_CH DX5CR: SFSEL (Bitfield-Mask: 0x01) */ -#define USIC_CH_DX5CR_CM_Pos (10UL) /*!< USIC_CH DX5CR: CM (Bit 10) */ -#define USIC_CH_DX5CR_CM_Msk (0xc00UL) /*!< USIC_CH DX5CR: CM (Bitfield-Mask: 0x03) */ -#define USIC_CH_DX5CR_DXS_Pos (15UL) /*!< USIC_CH DX5CR: DXS (Bit 15) */ -#define USIC_CH_DX5CR_DXS_Msk (0x8000UL) /*!< USIC_CH DX5CR: DXS (Bitfield-Mask: 0x01) */ - -/* -------------------------------- USIC_CH_SCTR -------------------------------- */ -#define USIC_CH_SCTR_SDIR_Pos (0UL) /*!< USIC_CH SCTR: SDIR (Bit 0) */ -#define USIC_CH_SCTR_SDIR_Msk (0x1UL) /*!< USIC_CH SCTR: SDIR (Bitfield-Mask: 0x01) */ -#define USIC_CH_SCTR_PDL_Pos (1UL) /*!< USIC_CH SCTR: PDL (Bit 1) */ -#define USIC_CH_SCTR_PDL_Msk (0x2UL) /*!< USIC_CH SCTR: PDL (Bitfield-Mask: 0x01) */ -#define USIC_CH_SCTR_DSM_Pos (2UL) /*!< USIC_CH SCTR: DSM (Bit 2) */ -#define USIC_CH_SCTR_DSM_Msk (0xcUL) /*!< USIC_CH SCTR: DSM (Bitfield-Mask: 0x03) */ -#define USIC_CH_SCTR_HPCDIR_Pos (4UL) /*!< USIC_CH SCTR: HPCDIR (Bit 4) */ -#define USIC_CH_SCTR_HPCDIR_Msk (0x10UL) /*!< USIC_CH SCTR: HPCDIR (Bitfield-Mask: 0x01) */ -#define USIC_CH_SCTR_DOCFG_Pos (6UL) /*!< USIC_CH SCTR: DOCFG (Bit 6) */ -#define USIC_CH_SCTR_DOCFG_Msk (0xc0UL) /*!< USIC_CH SCTR: DOCFG (Bitfield-Mask: 0x03) */ -#define USIC_CH_SCTR_TRM_Pos (8UL) /*!< USIC_CH SCTR: TRM (Bit 8) */ -#define USIC_CH_SCTR_TRM_Msk (0x300UL) /*!< USIC_CH SCTR: TRM (Bitfield-Mask: 0x03) */ -#define USIC_CH_SCTR_FLE_Pos (16UL) /*!< USIC_CH SCTR: FLE (Bit 16) */ -#define USIC_CH_SCTR_FLE_Msk (0x3f0000UL) /*!< USIC_CH SCTR: FLE (Bitfield-Mask: 0x3f) */ -#define USIC_CH_SCTR_WLE_Pos (24UL) /*!< USIC_CH SCTR: WLE (Bit 24) */ -#define USIC_CH_SCTR_WLE_Msk (0xf000000UL) /*!< USIC_CH SCTR: WLE (Bitfield-Mask: 0x0f) */ - -/* -------------------------------- USIC_CH_TCSR -------------------------------- */ -#define USIC_CH_TCSR_WLEMD_Pos (0UL) /*!< USIC_CH TCSR: WLEMD (Bit 0) */ -#define USIC_CH_TCSR_WLEMD_Msk (0x1UL) /*!< USIC_CH TCSR: WLEMD (Bitfield-Mask: 0x01) */ -#define USIC_CH_TCSR_SELMD_Pos (1UL) /*!< USIC_CH TCSR: SELMD (Bit 1) */ -#define USIC_CH_TCSR_SELMD_Msk (0x2UL) /*!< USIC_CH TCSR: SELMD (Bitfield-Mask: 0x01) */ -#define USIC_CH_TCSR_FLEMD_Pos (2UL) /*!< USIC_CH TCSR: FLEMD (Bit 2) */ -#define USIC_CH_TCSR_FLEMD_Msk (0x4UL) /*!< USIC_CH TCSR: FLEMD (Bitfield-Mask: 0x01) */ -#define USIC_CH_TCSR_WAMD_Pos (3UL) /*!< USIC_CH TCSR: WAMD (Bit 3) */ -#define USIC_CH_TCSR_WAMD_Msk (0x8UL) /*!< USIC_CH TCSR: WAMD (Bitfield-Mask: 0x01) */ -#define USIC_CH_TCSR_HPCMD_Pos (4UL) /*!< USIC_CH TCSR: HPCMD (Bit 4) */ -#define USIC_CH_TCSR_HPCMD_Msk (0x10UL) /*!< USIC_CH TCSR: HPCMD (Bitfield-Mask: 0x01) */ -#define USIC_CH_TCSR_SOF_Pos (5UL) /*!< USIC_CH TCSR: SOF (Bit 5) */ -#define USIC_CH_TCSR_SOF_Msk (0x20UL) /*!< USIC_CH TCSR: SOF (Bitfield-Mask: 0x01) */ -#define USIC_CH_TCSR_EOF_Pos (6UL) /*!< USIC_CH TCSR: EOF (Bit 6) */ -#define USIC_CH_TCSR_EOF_Msk (0x40UL) /*!< USIC_CH TCSR: EOF (Bitfield-Mask: 0x01) */ -#define USIC_CH_TCSR_TDV_Pos (7UL) /*!< USIC_CH TCSR: TDV (Bit 7) */ -#define USIC_CH_TCSR_TDV_Msk (0x80UL) /*!< USIC_CH TCSR: TDV (Bitfield-Mask: 0x01) */ -#define USIC_CH_TCSR_TDSSM_Pos (8UL) /*!< USIC_CH TCSR: TDSSM (Bit 8) */ -#define USIC_CH_TCSR_TDSSM_Msk (0x100UL) /*!< USIC_CH TCSR: TDSSM (Bitfield-Mask: 0x01) */ -#define USIC_CH_TCSR_TDEN_Pos (10UL) /*!< USIC_CH TCSR: TDEN (Bit 10) */ -#define USIC_CH_TCSR_TDEN_Msk (0xc00UL) /*!< USIC_CH TCSR: TDEN (Bitfield-Mask: 0x03) */ -#define USIC_CH_TCSR_TDVTR_Pos (12UL) /*!< USIC_CH TCSR: TDVTR (Bit 12) */ -#define USIC_CH_TCSR_TDVTR_Msk (0x1000UL) /*!< USIC_CH TCSR: TDVTR (Bitfield-Mask: 0x01) */ -#define USIC_CH_TCSR_WA_Pos (13UL) /*!< USIC_CH TCSR: WA (Bit 13) */ -#define USIC_CH_TCSR_WA_Msk (0x2000UL) /*!< USIC_CH TCSR: WA (Bitfield-Mask: 0x01) */ -#define USIC_CH_TCSR_TSOF_Pos (24UL) /*!< USIC_CH TCSR: TSOF (Bit 24) */ -#define USIC_CH_TCSR_TSOF_Msk (0x1000000UL) /*!< USIC_CH TCSR: TSOF (Bitfield-Mask: 0x01) */ -#define USIC_CH_TCSR_TV_Pos (26UL) /*!< USIC_CH TCSR: TV (Bit 26) */ -#define USIC_CH_TCSR_TV_Msk (0x4000000UL) /*!< USIC_CH TCSR: TV (Bitfield-Mask: 0x01) */ -#define USIC_CH_TCSR_TVC_Pos (27UL) /*!< USIC_CH TCSR: TVC (Bit 27) */ -#define USIC_CH_TCSR_TVC_Msk (0x8000000UL) /*!< USIC_CH TCSR: TVC (Bitfield-Mask: 0x01) */ -#define USIC_CH_TCSR_TE_Pos (28UL) /*!< USIC_CH TCSR: TE (Bit 28) */ -#define USIC_CH_TCSR_TE_Msk (0x10000000UL) /*!< USIC_CH TCSR: TE (Bitfield-Mask: 0x01) */ - -/* --------------------------------- USIC_CH_PCR -------------------------------- */ -#define USIC_CH_PCR_CTR0_Pos (0UL) /*!< USIC_CH PCR: CTR0 (Bit 0) */ -#define USIC_CH_PCR_CTR0_Msk (0x1UL) /*!< USIC_CH PCR: CTR0 (Bitfield-Mask: 0x01) */ -#define USIC_CH_PCR_CTR1_Pos (1UL) /*!< USIC_CH PCR: CTR1 (Bit 1) */ -#define USIC_CH_PCR_CTR1_Msk (0x2UL) /*!< USIC_CH PCR: CTR1 (Bitfield-Mask: 0x01) */ -#define USIC_CH_PCR_CTR2_Pos (2UL) /*!< USIC_CH PCR: CTR2 (Bit 2) */ -#define USIC_CH_PCR_CTR2_Msk (0x4UL) /*!< USIC_CH PCR: CTR2 (Bitfield-Mask: 0x01) */ -#define USIC_CH_PCR_CTR3_Pos (3UL) /*!< USIC_CH PCR: CTR3 (Bit 3) */ -#define USIC_CH_PCR_CTR3_Msk (0x8UL) /*!< USIC_CH PCR: CTR3 (Bitfield-Mask: 0x01) */ -#define USIC_CH_PCR_CTR4_Pos (4UL) /*!< USIC_CH PCR: CTR4 (Bit 4) */ -#define USIC_CH_PCR_CTR4_Msk (0x10UL) /*!< USIC_CH PCR: CTR4 (Bitfield-Mask: 0x01) */ -#define USIC_CH_PCR_CTR5_Pos (5UL) /*!< USIC_CH PCR: CTR5 (Bit 5) */ -#define USIC_CH_PCR_CTR5_Msk (0x20UL) /*!< USIC_CH PCR: CTR5 (Bitfield-Mask: 0x01) */ -#define USIC_CH_PCR_CTR6_Pos (6UL) /*!< USIC_CH PCR: CTR6 (Bit 6) */ -#define USIC_CH_PCR_CTR6_Msk (0x40UL) /*!< USIC_CH PCR: CTR6 (Bitfield-Mask: 0x01) */ -#define USIC_CH_PCR_CTR7_Pos (7UL) /*!< USIC_CH PCR: CTR7 (Bit 7) */ -#define USIC_CH_PCR_CTR7_Msk (0x80UL) /*!< USIC_CH PCR: CTR7 (Bitfield-Mask: 0x01) */ -#define USIC_CH_PCR_CTR8_Pos (8UL) /*!< USIC_CH PCR: CTR8 (Bit 8) */ -#define USIC_CH_PCR_CTR8_Msk (0x100UL) /*!< USIC_CH PCR: CTR8 (Bitfield-Mask: 0x01) */ -#define USIC_CH_PCR_CTR9_Pos (9UL) /*!< USIC_CH PCR: CTR9 (Bit 9) */ -#define USIC_CH_PCR_CTR9_Msk (0x200UL) /*!< USIC_CH PCR: CTR9 (Bitfield-Mask: 0x01) */ -#define USIC_CH_PCR_CTR10_Pos (10UL) /*!< USIC_CH PCR: CTR10 (Bit 10) */ -#define USIC_CH_PCR_CTR10_Msk (0x400UL) /*!< USIC_CH PCR: CTR10 (Bitfield-Mask: 0x01) */ -#define USIC_CH_PCR_CTR11_Pos (11UL) /*!< USIC_CH PCR: CTR11 (Bit 11) */ -#define USIC_CH_PCR_CTR11_Msk (0x800UL) /*!< USIC_CH PCR: CTR11 (Bitfield-Mask: 0x01) */ -#define USIC_CH_PCR_CTR12_Pos (12UL) /*!< USIC_CH PCR: CTR12 (Bit 12) */ -#define USIC_CH_PCR_CTR12_Msk (0x1000UL) /*!< USIC_CH PCR: CTR12 (Bitfield-Mask: 0x01) */ -#define USIC_CH_PCR_CTR13_Pos (13UL) /*!< USIC_CH PCR: CTR13 (Bit 13) */ -#define USIC_CH_PCR_CTR13_Msk (0x2000UL) /*!< USIC_CH PCR: CTR13 (Bitfield-Mask: 0x01) */ -#define USIC_CH_PCR_CTR14_Pos (14UL) /*!< USIC_CH PCR: CTR14 (Bit 14) */ -#define USIC_CH_PCR_CTR14_Msk (0x4000UL) /*!< USIC_CH PCR: CTR14 (Bitfield-Mask: 0x01) */ -#define USIC_CH_PCR_CTR15_Pos (15UL) /*!< USIC_CH PCR: CTR15 (Bit 15) */ -#define USIC_CH_PCR_CTR15_Msk (0x8000UL) /*!< USIC_CH PCR: CTR15 (Bitfield-Mask: 0x01) */ -#define USIC_CH_PCR_CTR16_Pos (16UL) /*!< USIC_CH PCR: CTR16 (Bit 16) */ -#define USIC_CH_PCR_CTR16_Msk (0x10000UL) /*!< USIC_CH PCR: CTR16 (Bitfield-Mask: 0x01) */ -#define USIC_CH_PCR_CTR17_Pos (17UL) /*!< USIC_CH PCR: CTR17 (Bit 17) */ -#define USIC_CH_PCR_CTR17_Msk (0x20000UL) /*!< USIC_CH PCR: CTR17 (Bitfield-Mask: 0x01) */ -#define USIC_CH_PCR_CTR18_Pos (18UL) /*!< USIC_CH PCR: CTR18 (Bit 18) */ -#define USIC_CH_PCR_CTR18_Msk (0x40000UL) /*!< USIC_CH PCR: CTR18 (Bitfield-Mask: 0x01) */ -#define USIC_CH_PCR_CTR19_Pos (19UL) /*!< USIC_CH PCR: CTR19 (Bit 19) */ -#define USIC_CH_PCR_CTR19_Msk (0x80000UL) /*!< USIC_CH PCR: CTR19 (Bitfield-Mask: 0x01) */ -#define USIC_CH_PCR_CTR20_Pos (20UL) /*!< USIC_CH PCR: CTR20 (Bit 20) */ -#define USIC_CH_PCR_CTR20_Msk (0x100000UL) /*!< USIC_CH PCR: CTR20 (Bitfield-Mask: 0x01) */ -#define USIC_CH_PCR_CTR21_Pos (21UL) /*!< USIC_CH PCR: CTR21 (Bit 21) */ -#define USIC_CH_PCR_CTR21_Msk (0x200000UL) /*!< USIC_CH PCR: CTR21 (Bitfield-Mask: 0x01) */ -#define USIC_CH_PCR_CTR22_Pos (22UL) /*!< USIC_CH PCR: CTR22 (Bit 22) */ -#define USIC_CH_PCR_CTR22_Msk (0x400000UL) /*!< USIC_CH PCR: CTR22 (Bitfield-Mask: 0x01) */ -#define USIC_CH_PCR_CTR23_Pos (23UL) /*!< USIC_CH PCR: CTR23 (Bit 23) */ -#define USIC_CH_PCR_CTR23_Msk (0x800000UL) /*!< USIC_CH PCR: CTR23 (Bitfield-Mask: 0x01) */ -#define USIC_CH_PCR_CTR24_Pos (24UL) /*!< USIC_CH PCR: CTR24 (Bit 24) */ -#define USIC_CH_PCR_CTR24_Msk (0x1000000UL) /*!< USIC_CH PCR: CTR24 (Bitfield-Mask: 0x01) */ -#define USIC_CH_PCR_CTR25_Pos (25UL) /*!< USIC_CH PCR: CTR25 (Bit 25) */ -#define USIC_CH_PCR_CTR25_Msk (0x2000000UL) /*!< USIC_CH PCR: CTR25 (Bitfield-Mask: 0x01) */ -#define USIC_CH_PCR_CTR26_Pos (26UL) /*!< USIC_CH PCR: CTR26 (Bit 26) */ -#define USIC_CH_PCR_CTR26_Msk (0x4000000UL) /*!< USIC_CH PCR: CTR26 (Bitfield-Mask: 0x01) */ -#define USIC_CH_PCR_CTR27_Pos (27UL) /*!< USIC_CH PCR: CTR27 (Bit 27) */ -#define USIC_CH_PCR_CTR27_Msk (0x8000000UL) /*!< USIC_CH PCR: CTR27 (Bitfield-Mask: 0x01) */ -#define USIC_CH_PCR_CTR28_Pos (28UL) /*!< USIC_CH PCR: CTR28 (Bit 28) */ -#define USIC_CH_PCR_CTR28_Msk (0x10000000UL) /*!< USIC_CH PCR: CTR28 (Bitfield-Mask: 0x01) */ -#define USIC_CH_PCR_CTR29_Pos (29UL) /*!< USIC_CH PCR: CTR29 (Bit 29) */ -#define USIC_CH_PCR_CTR29_Msk (0x20000000UL) /*!< USIC_CH PCR: CTR29 (Bitfield-Mask: 0x01) */ -#define USIC_CH_PCR_CTR30_Pos (30UL) /*!< USIC_CH PCR: CTR30 (Bit 30) */ -#define USIC_CH_PCR_CTR30_Msk (0x40000000UL) /*!< USIC_CH PCR: CTR30 (Bitfield-Mask: 0x01) */ -#define USIC_CH_PCR_CTR31_Pos (31UL) /*!< USIC_CH PCR: CTR31 (Bit 31) */ -#define USIC_CH_PCR_CTR31_Msk (0x80000000UL) /*!< USIC_CH PCR: CTR31 (Bitfield-Mask: 0x01) */ - -/* ----------------------------- USIC_CH_PCR_ASCMode ---------------------------- */ -#define USIC_CH_PCR_ASCMode_SMD_Pos (0UL) /*!< USIC_CH PCR_ASCMode: SMD (Bit 0) */ -#define USIC_CH_PCR_ASCMode_SMD_Msk (0x1UL) /*!< USIC_CH PCR_ASCMode: SMD (Bitfield-Mask: 0x01) */ -#define USIC_CH_PCR_ASCMode_STPB_Pos (1UL) /*!< USIC_CH PCR_ASCMode: STPB (Bit 1) */ -#define USIC_CH_PCR_ASCMode_STPB_Msk (0x2UL) /*!< USIC_CH PCR_ASCMode: STPB (Bitfield-Mask: 0x01) */ -#define USIC_CH_PCR_ASCMode_IDM_Pos (2UL) /*!< USIC_CH PCR_ASCMode: IDM (Bit 2) */ -#define USIC_CH_PCR_ASCMode_IDM_Msk (0x4UL) /*!< USIC_CH PCR_ASCMode: IDM (Bitfield-Mask: 0x01) */ -#define USIC_CH_PCR_ASCMode_SBIEN_Pos (3UL) /*!< USIC_CH PCR_ASCMode: SBIEN (Bit 3) */ -#define USIC_CH_PCR_ASCMode_SBIEN_Msk (0x8UL) /*!< USIC_CH PCR_ASCMode: SBIEN (Bitfield-Mask: 0x01) */ -#define USIC_CH_PCR_ASCMode_CDEN_Pos (4UL) /*!< USIC_CH PCR_ASCMode: CDEN (Bit 4) */ -#define USIC_CH_PCR_ASCMode_CDEN_Msk (0x10UL) /*!< USIC_CH PCR_ASCMode: CDEN (Bitfield-Mask: 0x01) */ -#define USIC_CH_PCR_ASCMode_RNIEN_Pos (5UL) /*!< USIC_CH PCR_ASCMode: RNIEN (Bit 5) */ -#define USIC_CH_PCR_ASCMode_RNIEN_Msk (0x20UL) /*!< USIC_CH PCR_ASCMode: RNIEN (Bitfield-Mask: 0x01) */ -#define USIC_CH_PCR_ASCMode_FEIEN_Pos (6UL) /*!< USIC_CH PCR_ASCMode: FEIEN (Bit 6) */ -#define USIC_CH_PCR_ASCMode_FEIEN_Msk (0x40UL) /*!< USIC_CH PCR_ASCMode: FEIEN (Bitfield-Mask: 0x01) */ -#define USIC_CH_PCR_ASCMode_FFIEN_Pos (7UL) /*!< USIC_CH PCR_ASCMode: FFIEN (Bit 7) */ -#define USIC_CH_PCR_ASCMode_FFIEN_Msk (0x80UL) /*!< USIC_CH PCR_ASCMode: FFIEN (Bitfield-Mask: 0x01) */ -#define USIC_CH_PCR_ASCMode_SP_Pos (8UL) /*!< USIC_CH PCR_ASCMode: SP (Bit 8) */ -#define USIC_CH_PCR_ASCMode_SP_Msk (0x1f00UL) /*!< USIC_CH PCR_ASCMode: SP (Bitfield-Mask: 0x1f) */ -#define USIC_CH_PCR_ASCMode_PL_Pos (13UL) /*!< USIC_CH PCR_ASCMode: PL (Bit 13) */ -#define USIC_CH_PCR_ASCMode_PL_Msk (0xe000UL) /*!< USIC_CH PCR_ASCMode: PL (Bitfield-Mask: 0x07) */ -#define USIC_CH_PCR_ASCMode_RSTEN_Pos (16UL) /*!< USIC_CH PCR_ASCMode: RSTEN (Bit 16) */ -#define USIC_CH_PCR_ASCMode_RSTEN_Msk (0x10000UL) /*!< USIC_CH PCR_ASCMode: RSTEN (Bitfield-Mask: 0x01) */ -#define USIC_CH_PCR_ASCMode_TSTEN_Pos (17UL) /*!< USIC_CH PCR_ASCMode: TSTEN (Bit 17) */ -#define USIC_CH_PCR_ASCMode_TSTEN_Msk (0x20000UL) /*!< USIC_CH PCR_ASCMode: TSTEN (Bitfield-Mask: 0x01) */ -#define USIC_CH_PCR_ASCMode_MCLK_Pos (31UL) /*!< USIC_CH PCR_ASCMode: MCLK (Bit 31) */ -#define USIC_CH_PCR_ASCMode_MCLK_Msk (0x80000000UL) /*!< USIC_CH PCR_ASCMode: MCLK (Bitfield-Mask: 0x01) */ - -/* ----------------------------- USIC_CH_PCR_SSCMode ---------------------------- */ -#define USIC_CH_PCR_SSCMode_MSLSEN_Pos (0UL) /*!< USIC_CH PCR_SSCMode: MSLSEN (Bit 0) */ -#define USIC_CH_PCR_SSCMode_MSLSEN_Msk (0x1UL) /*!< USIC_CH PCR_SSCMode: MSLSEN (Bitfield-Mask: 0x01) */ -#define USIC_CH_PCR_SSCMode_SELCTR_Pos (1UL) /*!< USIC_CH PCR_SSCMode: SELCTR (Bit 1) */ -#define USIC_CH_PCR_SSCMode_SELCTR_Msk (0x2UL) /*!< USIC_CH PCR_SSCMode: SELCTR (Bitfield-Mask: 0x01) */ -#define USIC_CH_PCR_SSCMode_SELINV_Pos (2UL) /*!< USIC_CH PCR_SSCMode: SELINV (Bit 2) */ -#define USIC_CH_PCR_SSCMode_SELINV_Msk (0x4UL) /*!< USIC_CH PCR_SSCMode: SELINV (Bitfield-Mask: 0x01) */ -#define USIC_CH_PCR_SSCMode_FEM_Pos (3UL) /*!< USIC_CH PCR_SSCMode: FEM (Bit 3) */ -#define USIC_CH_PCR_SSCMode_FEM_Msk (0x8UL) /*!< USIC_CH PCR_SSCMode: FEM (Bitfield-Mask: 0x01) */ -#define USIC_CH_PCR_SSCMode_CTQSEL1_Pos (4UL) /*!< USIC_CH PCR_SSCMode: CTQSEL1 (Bit 4) */ -#define USIC_CH_PCR_SSCMode_CTQSEL1_Msk (0x30UL) /*!< USIC_CH PCR_SSCMode: CTQSEL1 (Bitfield-Mask: 0x03) */ -#define USIC_CH_PCR_SSCMode_PCTQ1_Pos (6UL) /*!< USIC_CH PCR_SSCMode: PCTQ1 (Bit 6) */ -#define USIC_CH_PCR_SSCMode_PCTQ1_Msk (0xc0UL) /*!< USIC_CH PCR_SSCMode: PCTQ1 (Bitfield-Mask: 0x03) */ -#define USIC_CH_PCR_SSCMode_DCTQ1_Pos (8UL) /*!< USIC_CH PCR_SSCMode: DCTQ1 (Bit 8) */ -#define USIC_CH_PCR_SSCMode_DCTQ1_Msk (0x1f00UL) /*!< USIC_CH PCR_SSCMode: DCTQ1 (Bitfield-Mask: 0x1f) */ -#define USIC_CH_PCR_SSCMode_PARIEN_Pos (13UL) /*!< USIC_CH PCR_SSCMode: PARIEN (Bit 13) */ -#define USIC_CH_PCR_SSCMode_PARIEN_Msk (0x2000UL) /*!< USIC_CH PCR_SSCMode: PARIEN (Bitfield-Mask: 0x01) */ -#define USIC_CH_PCR_SSCMode_MSLSIEN_Pos (14UL) /*!< USIC_CH PCR_SSCMode: MSLSIEN (Bit 14) */ -#define USIC_CH_PCR_SSCMode_MSLSIEN_Msk (0x4000UL) /*!< USIC_CH PCR_SSCMode: MSLSIEN (Bitfield-Mask: 0x01) */ -#define USIC_CH_PCR_SSCMode_DX2TIEN_Pos (15UL) /*!< USIC_CH PCR_SSCMode: DX2TIEN (Bit 15) */ -#define USIC_CH_PCR_SSCMode_DX2TIEN_Msk (0x8000UL) /*!< USIC_CH PCR_SSCMode: DX2TIEN (Bitfield-Mask: 0x01) */ -#define USIC_CH_PCR_SSCMode_SELO_Pos (16UL) /*!< USIC_CH PCR_SSCMode: SELO (Bit 16) */ -#define USIC_CH_PCR_SSCMode_SELO_Msk (0xff0000UL) /*!< USIC_CH PCR_SSCMode: SELO (Bitfield-Mask: 0xff) */ -#define USIC_CH_PCR_SSCMode_TIWEN_Pos (24UL) /*!< USIC_CH PCR_SSCMode: TIWEN (Bit 24) */ -#define USIC_CH_PCR_SSCMode_TIWEN_Msk (0x1000000UL) /*!< USIC_CH PCR_SSCMode: TIWEN (Bitfield-Mask: 0x01) */ -#define USIC_CH_PCR_SSCMode_SLPHSEL_Pos (25UL) /*!< USIC_CH PCR_SSCMode: SLPHSEL (Bit 25) */ -#define USIC_CH_PCR_SSCMode_SLPHSEL_Msk (0x2000000UL) /*!< USIC_CH PCR_SSCMode: SLPHSEL (Bitfield-Mask: 0x01) */ -#define USIC_CH_PCR_SSCMode_MCLK_Pos (31UL) /*!< USIC_CH PCR_SSCMode: MCLK (Bit 31) */ -#define USIC_CH_PCR_SSCMode_MCLK_Msk (0x80000000UL) /*!< USIC_CH PCR_SSCMode: MCLK (Bitfield-Mask: 0x01) */ - -/* ----------------------------- USIC_CH_PCR_IICMode ---------------------------- */ -#define USIC_CH_PCR_IICMode_SLAD_Pos (0UL) /*!< USIC_CH PCR_IICMode: SLAD (Bit 0) */ -#define USIC_CH_PCR_IICMode_SLAD_Msk (0xffffUL) /*!< USIC_CH PCR_IICMode: SLAD (Bitfield-Mask: 0xffff) */ -#define USIC_CH_PCR_IICMode_ACK00_Pos (16UL) /*!< USIC_CH PCR_IICMode: ACK00 (Bit 16) */ -#define USIC_CH_PCR_IICMode_ACK00_Msk (0x10000UL) /*!< USIC_CH PCR_IICMode: ACK00 (Bitfield-Mask: 0x01) */ -#define USIC_CH_PCR_IICMode_STIM_Pos (17UL) /*!< USIC_CH PCR_IICMode: STIM (Bit 17) */ -#define USIC_CH_PCR_IICMode_STIM_Msk (0x20000UL) /*!< USIC_CH PCR_IICMode: STIM (Bitfield-Mask: 0x01) */ -#define USIC_CH_PCR_IICMode_SCRIEN_Pos (18UL) /*!< USIC_CH PCR_IICMode: SCRIEN (Bit 18) */ -#define USIC_CH_PCR_IICMode_SCRIEN_Msk (0x40000UL) /*!< USIC_CH PCR_IICMode: SCRIEN (Bitfield-Mask: 0x01) */ -#define USIC_CH_PCR_IICMode_RSCRIEN_Pos (19UL) /*!< USIC_CH PCR_IICMode: RSCRIEN (Bit 19) */ -#define USIC_CH_PCR_IICMode_RSCRIEN_Msk (0x80000UL) /*!< USIC_CH PCR_IICMode: RSCRIEN (Bitfield-Mask: 0x01) */ -#define USIC_CH_PCR_IICMode_PCRIEN_Pos (20UL) /*!< USIC_CH PCR_IICMode: PCRIEN (Bit 20) */ -#define USIC_CH_PCR_IICMode_PCRIEN_Msk (0x100000UL) /*!< USIC_CH PCR_IICMode: PCRIEN (Bitfield-Mask: 0x01) */ -#define USIC_CH_PCR_IICMode_NACKIEN_Pos (21UL) /*!< USIC_CH PCR_IICMode: NACKIEN (Bit 21) */ -#define USIC_CH_PCR_IICMode_NACKIEN_Msk (0x200000UL) /*!< USIC_CH PCR_IICMode: NACKIEN (Bitfield-Mask: 0x01) */ -#define USIC_CH_PCR_IICMode_ARLIEN_Pos (22UL) /*!< USIC_CH PCR_IICMode: ARLIEN (Bit 22) */ -#define USIC_CH_PCR_IICMode_ARLIEN_Msk (0x400000UL) /*!< USIC_CH PCR_IICMode: ARLIEN (Bitfield-Mask: 0x01) */ -#define USIC_CH_PCR_IICMode_SRRIEN_Pos (23UL) /*!< USIC_CH PCR_IICMode: SRRIEN (Bit 23) */ -#define USIC_CH_PCR_IICMode_SRRIEN_Msk (0x800000UL) /*!< USIC_CH PCR_IICMode: SRRIEN (Bitfield-Mask: 0x01) */ -#define USIC_CH_PCR_IICMode_ERRIEN_Pos (24UL) /*!< USIC_CH PCR_IICMode: ERRIEN (Bit 24) */ -#define USIC_CH_PCR_IICMode_ERRIEN_Msk (0x1000000UL) /*!< USIC_CH PCR_IICMode: ERRIEN (Bitfield-Mask: 0x01) */ -#define USIC_CH_PCR_IICMode_SACKDIS_Pos (25UL) /*!< USIC_CH PCR_IICMode: SACKDIS (Bit 25) */ -#define USIC_CH_PCR_IICMode_SACKDIS_Msk (0x2000000UL) /*!< USIC_CH PCR_IICMode: SACKDIS (Bitfield-Mask: 0x01) */ -#define USIC_CH_PCR_IICMode_HDEL_Pos (26UL) /*!< USIC_CH PCR_IICMode: HDEL (Bit 26) */ -#define USIC_CH_PCR_IICMode_HDEL_Msk (0x3c000000UL) /*!< USIC_CH PCR_IICMode: HDEL (Bitfield-Mask: 0x0f) */ -#define USIC_CH_PCR_IICMode_ACKIEN_Pos (30UL) /*!< USIC_CH PCR_IICMode: ACKIEN (Bit 30) */ -#define USIC_CH_PCR_IICMode_ACKIEN_Msk (0x40000000UL) /*!< USIC_CH PCR_IICMode: ACKIEN (Bitfield-Mask: 0x01) */ -#define USIC_CH_PCR_IICMode_MCLK_Pos (31UL) /*!< USIC_CH PCR_IICMode: MCLK (Bit 31) */ -#define USIC_CH_PCR_IICMode_MCLK_Msk (0x80000000UL) /*!< USIC_CH PCR_IICMode: MCLK (Bitfield-Mask: 0x01) */ - -/* ----------------------------- USIC_CH_PCR_IISMode ---------------------------- */ -#define USIC_CH_PCR_IISMode_WAGEN_Pos (0UL) /*!< USIC_CH PCR_IISMode: WAGEN (Bit 0) */ -#define USIC_CH_PCR_IISMode_WAGEN_Msk (0x1UL) /*!< USIC_CH PCR_IISMode: WAGEN (Bitfield-Mask: 0x01) */ -#define USIC_CH_PCR_IISMode_DTEN_Pos (1UL) /*!< USIC_CH PCR_IISMode: DTEN (Bit 1) */ -#define USIC_CH_PCR_IISMode_DTEN_Msk (0x2UL) /*!< USIC_CH PCR_IISMode: DTEN (Bitfield-Mask: 0x01) */ -#define USIC_CH_PCR_IISMode_SELINV_Pos (2UL) /*!< USIC_CH PCR_IISMode: SELINV (Bit 2) */ -#define USIC_CH_PCR_IISMode_SELINV_Msk (0x4UL) /*!< USIC_CH PCR_IISMode: SELINV (Bitfield-Mask: 0x01) */ -#define USIC_CH_PCR_IISMode_WAFEIEN_Pos (4UL) /*!< USIC_CH PCR_IISMode: WAFEIEN (Bit 4) */ -#define USIC_CH_PCR_IISMode_WAFEIEN_Msk (0x10UL) /*!< USIC_CH PCR_IISMode: WAFEIEN (Bitfield-Mask: 0x01) */ -#define USIC_CH_PCR_IISMode_WAREIEN_Pos (5UL) /*!< USIC_CH PCR_IISMode: WAREIEN (Bit 5) */ -#define USIC_CH_PCR_IISMode_WAREIEN_Msk (0x20UL) /*!< USIC_CH PCR_IISMode: WAREIEN (Bitfield-Mask: 0x01) */ -#define USIC_CH_PCR_IISMode_ENDIEN_Pos (6UL) /*!< USIC_CH PCR_IISMode: ENDIEN (Bit 6) */ -#define USIC_CH_PCR_IISMode_ENDIEN_Msk (0x40UL) /*!< USIC_CH PCR_IISMode: ENDIEN (Bitfield-Mask: 0x01) */ -#define USIC_CH_PCR_IISMode_DX2TIEN_Pos (15UL) /*!< USIC_CH PCR_IISMode: DX2TIEN (Bit 15) */ -#define USIC_CH_PCR_IISMode_DX2TIEN_Msk (0x8000UL) /*!< USIC_CH PCR_IISMode: DX2TIEN (Bitfield-Mask: 0x01) */ -#define USIC_CH_PCR_IISMode_TDEL_Pos (16UL) /*!< USIC_CH PCR_IISMode: TDEL (Bit 16) */ -#define USIC_CH_PCR_IISMode_TDEL_Msk (0x3f0000UL) /*!< USIC_CH PCR_IISMode: TDEL (Bitfield-Mask: 0x3f) */ -#define USIC_CH_PCR_IISMode_MCLK_Pos (31UL) /*!< USIC_CH PCR_IISMode: MCLK (Bit 31) */ -#define USIC_CH_PCR_IISMode_MCLK_Msk (0x80000000UL) /*!< USIC_CH PCR_IISMode: MCLK (Bitfield-Mask: 0x01) */ - -/* --------------------------------- USIC_CH_CCR -------------------------------- */ -#define USIC_CH_CCR_MODE_Pos (0UL) /*!< USIC_CH CCR: MODE (Bit 0) */ -#define USIC_CH_CCR_MODE_Msk (0xfUL) /*!< USIC_CH CCR: MODE (Bitfield-Mask: 0x0f) */ -#define USIC_CH_CCR_HPCEN_Pos (6UL) /*!< USIC_CH CCR: HPCEN (Bit 6) */ -#define USIC_CH_CCR_HPCEN_Msk (0xc0UL) /*!< USIC_CH CCR: HPCEN (Bitfield-Mask: 0x03) */ -#define USIC_CH_CCR_PM_Pos (8UL) /*!< USIC_CH CCR: PM (Bit 8) */ -#define USIC_CH_CCR_PM_Msk (0x300UL) /*!< USIC_CH CCR: PM (Bitfield-Mask: 0x03) */ -#define USIC_CH_CCR_RSIEN_Pos (10UL) /*!< USIC_CH CCR: RSIEN (Bit 10) */ -#define USIC_CH_CCR_RSIEN_Msk (0x400UL) /*!< USIC_CH CCR: RSIEN (Bitfield-Mask: 0x01) */ -#define USIC_CH_CCR_DLIEN_Pos (11UL) /*!< USIC_CH CCR: DLIEN (Bit 11) */ -#define USIC_CH_CCR_DLIEN_Msk (0x800UL) /*!< USIC_CH CCR: DLIEN (Bitfield-Mask: 0x01) */ -#define USIC_CH_CCR_TSIEN_Pos (12UL) /*!< USIC_CH CCR: TSIEN (Bit 12) */ -#define USIC_CH_CCR_TSIEN_Msk (0x1000UL) /*!< USIC_CH CCR: TSIEN (Bitfield-Mask: 0x01) */ -#define USIC_CH_CCR_TBIEN_Pos (13UL) /*!< USIC_CH CCR: TBIEN (Bit 13) */ -#define USIC_CH_CCR_TBIEN_Msk (0x2000UL) /*!< USIC_CH CCR: TBIEN (Bitfield-Mask: 0x01) */ -#define USIC_CH_CCR_RIEN_Pos (14UL) /*!< USIC_CH CCR: RIEN (Bit 14) */ -#define USIC_CH_CCR_RIEN_Msk (0x4000UL) /*!< USIC_CH CCR: RIEN (Bitfield-Mask: 0x01) */ -#define USIC_CH_CCR_AIEN_Pos (15UL) /*!< USIC_CH CCR: AIEN (Bit 15) */ -#define USIC_CH_CCR_AIEN_Msk (0x8000UL) /*!< USIC_CH CCR: AIEN (Bitfield-Mask: 0x01) */ -#define USIC_CH_CCR_BRGIEN_Pos (16UL) /*!< USIC_CH CCR: BRGIEN (Bit 16) */ -#define USIC_CH_CCR_BRGIEN_Msk (0x10000UL) /*!< USIC_CH CCR: BRGIEN (Bitfield-Mask: 0x01) */ - -/* -------------------------------- USIC_CH_CMTR -------------------------------- */ -#define USIC_CH_CMTR_CTV_Pos (0UL) /*!< USIC_CH CMTR: CTV (Bit 0) */ -#define USIC_CH_CMTR_CTV_Msk (0x3ffUL) /*!< USIC_CH CMTR: CTV (Bitfield-Mask: 0x3ff) */ - -/* --------------------------------- USIC_CH_PSR -------------------------------- */ -#define USIC_CH_PSR_ST0_Pos (0UL) /*!< USIC_CH PSR: ST0 (Bit 0) */ -#define USIC_CH_PSR_ST0_Msk (0x1UL) /*!< USIC_CH PSR: ST0 (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_ST1_Pos (1UL) /*!< USIC_CH PSR: ST1 (Bit 1) */ -#define USIC_CH_PSR_ST1_Msk (0x2UL) /*!< USIC_CH PSR: ST1 (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_ST2_Pos (2UL) /*!< USIC_CH PSR: ST2 (Bit 2) */ -#define USIC_CH_PSR_ST2_Msk (0x4UL) /*!< USIC_CH PSR: ST2 (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_ST3_Pos (3UL) /*!< USIC_CH PSR: ST3 (Bit 3) */ -#define USIC_CH_PSR_ST3_Msk (0x8UL) /*!< USIC_CH PSR: ST3 (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_ST4_Pos (4UL) /*!< USIC_CH PSR: ST4 (Bit 4) */ -#define USIC_CH_PSR_ST4_Msk (0x10UL) /*!< USIC_CH PSR: ST4 (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_ST5_Pos (5UL) /*!< USIC_CH PSR: ST5 (Bit 5) */ -#define USIC_CH_PSR_ST5_Msk (0x20UL) /*!< USIC_CH PSR: ST5 (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_ST6_Pos (6UL) /*!< USIC_CH PSR: ST6 (Bit 6) */ -#define USIC_CH_PSR_ST6_Msk (0x40UL) /*!< USIC_CH PSR: ST6 (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_ST7_Pos (7UL) /*!< USIC_CH PSR: ST7 (Bit 7) */ -#define USIC_CH_PSR_ST7_Msk (0x80UL) /*!< USIC_CH PSR: ST7 (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_ST8_Pos (8UL) /*!< USIC_CH PSR: ST8 (Bit 8) */ -#define USIC_CH_PSR_ST8_Msk (0x100UL) /*!< USIC_CH PSR: ST8 (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_ST9_Pos (9UL) /*!< USIC_CH PSR: ST9 (Bit 9) */ -#define USIC_CH_PSR_ST9_Msk (0x200UL) /*!< USIC_CH PSR: ST9 (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_RSIF_Pos (10UL) /*!< USIC_CH PSR: RSIF (Bit 10) */ -#define USIC_CH_PSR_RSIF_Msk (0x400UL) /*!< USIC_CH PSR: RSIF (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_DLIF_Pos (11UL) /*!< USIC_CH PSR: DLIF (Bit 11) */ -#define USIC_CH_PSR_DLIF_Msk (0x800UL) /*!< USIC_CH PSR: DLIF (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_TSIF_Pos (12UL) /*!< USIC_CH PSR: TSIF (Bit 12) */ -#define USIC_CH_PSR_TSIF_Msk (0x1000UL) /*!< USIC_CH PSR: TSIF (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_TBIF_Pos (13UL) /*!< USIC_CH PSR: TBIF (Bit 13) */ -#define USIC_CH_PSR_TBIF_Msk (0x2000UL) /*!< USIC_CH PSR: TBIF (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_RIF_Pos (14UL) /*!< USIC_CH PSR: RIF (Bit 14) */ -#define USIC_CH_PSR_RIF_Msk (0x4000UL) /*!< USIC_CH PSR: RIF (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_AIF_Pos (15UL) /*!< USIC_CH PSR: AIF (Bit 15) */ -#define USIC_CH_PSR_AIF_Msk (0x8000UL) /*!< USIC_CH PSR: AIF (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_BRGIF_Pos (16UL) /*!< USIC_CH PSR: BRGIF (Bit 16) */ -#define USIC_CH_PSR_BRGIF_Msk (0x10000UL) /*!< USIC_CH PSR: BRGIF (Bitfield-Mask: 0x01) */ - -/* ----------------------------- USIC_CH_PSR_ASCMode ---------------------------- */ -#define USIC_CH_PSR_ASCMode_TXIDLE_Pos (0UL) /*!< USIC_CH PSR_ASCMode: TXIDLE (Bit 0) */ -#define USIC_CH_PSR_ASCMode_TXIDLE_Msk (0x1UL) /*!< USIC_CH PSR_ASCMode: TXIDLE (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_ASCMode_RXIDLE_Pos (1UL) /*!< USIC_CH PSR_ASCMode: RXIDLE (Bit 1) */ -#define USIC_CH_PSR_ASCMode_RXIDLE_Msk (0x2UL) /*!< USIC_CH PSR_ASCMode: RXIDLE (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_ASCMode_SBD_Pos (2UL) /*!< USIC_CH PSR_ASCMode: SBD (Bit 2) */ -#define USIC_CH_PSR_ASCMode_SBD_Msk (0x4UL) /*!< USIC_CH PSR_ASCMode: SBD (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_ASCMode_COL_Pos (3UL) /*!< USIC_CH PSR_ASCMode: COL (Bit 3) */ -#define USIC_CH_PSR_ASCMode_COL_Msk (0x8UL) /*!< USIC_CH PSR_ASCMode: COL (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_ASCMode_RNS_Pos (4UL) /*!< USIC_CH PSR_ASCMode: RNS (Bit 4) */ -#define USIC_CH_PSR_ASCMode_RNS_Msk (0x10UL) /*!< USIC_CH PSR_ASCMode: RNS (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_ASCMode_FER0_Pos (5UL) /*!< USIC_CH PSR_ASCMode: FER0 (Bit 5) */ -#define USIC_CH_PSR_ASCMode_FER0_Msk (0x20UL) /*!< USIC_CH PSR_ASCMode: FER0 (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_ASCMode_FER1_Pos (6UL) /*!< USIC_CH PSR_ASCMode: FER1 (Bit 6) */ -#define USIC_CH_PSR_ASCMode_FER1_Msk (0x40UL) /*!< USIC_CH PSR_ASCMode: FER1 (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_ASCMode_RFF_Pos (7UL) /*!< USIC_CH PSR_ASCMode: RFF (Bit 7) */ -#define USIC_CH_PSR_ASCMode_RFF_Msk (0x80UL) /*!< USIC_CH PSR_ASCMode: RFF (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_ASCMode_TFF_Pos (8UL) /*!< USIC_CH PSR_ASCMode: TFF (Bit 8) */ -#define USIC_CH_PSR_ASCMode_TFF_Msk (0x100UL) /*!< USIC_CH PSR_ASCMode: TFF (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_ASCMode_BUSY_Pos (9UL) /*!< USIC_CH PSR_ASCMode: BUSY (Bit 9) */ -#define USIC_CH_PSR_ASCMode_BUSY_Msk (0x200UL) /*!< USIC_CH PSR_ASCMode: BUSY (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_ASCMode_RSIF_Pos (10UL) /*!< USIC_CH PSR_ASCMode: RSIF (Bit 10) */ -#define USIC_CH_PSR_ASCMode_RSIF_Msk (0x400UL) /*!< USIC_CH PSR_ASCMode: RSIF (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_ASCMode_DLIF_Pos (11UL) /*!< USIC_CH PSR_ASCMode: DLIF (Bit 11) */ -#define USIC_CH_PSR_ASCMode_DLIF_Msk (0x800UL) /*!< USIC_CH PSR_ASCMode: DLIF (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_ASCMode_TSIF_Pos (12UL) /*!< USIC_CH PSR_ASCMode: TSIF (Bit 12) */ -#define USIC_CH_PSR_ASCMode_TSIF_Msk (0x1000UL) /*!< USIC_CH PSR_ASCMode: TSIF (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_ASCMode_TBIF_Pos (13UL) /*!< USIC_CH PSR_ASCMode: TBIF (Bit 13) */ -#define USIC_CH_PSR_ASCMode_TBIF_Msk (0x2000UL) /*!< USIC_CH PSR_ASCMode: TBIF (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_ASCMode_RIF_Pos (14UL) /*!< USIC_CH PSR_ASCMode: RIF (Bit 14) */ -#define USIC_CH_PSR_ASCMode_RIF_Msk (0x4000UL) /*!< USIC_CH PSR_ASCMode: RIF (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_ASCMode_AIF_Pos (15UL) /*!< USIC_CH PSR_ASCMode: AIF (Bit 15) */ -#define USIC_CH_PSR_ASCMode_AIF_Msk (0x8000UL) /*!< USIC_CH PSR_ASCMode: AIF (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_ASCMode_BRGIF_Pos (16UL) /*!< USIC_CH PSR_ASCMode: BRGIF (Bit 16) */ -#define USIC_CH_PSR_ASCMode_BRGIF_Msk (0x10000UL) /*!< USIC_CH PSR_ASCMode: BRGIF (Bitfield-Mask: 0x01) */ - -/* ----------------------------- USIC_CH_PSR_SSCMode ---------------------------- */ -#define USIC_CH_PSR_SSCMode_MSLS_Pos (0UL) /*!< USIC_CH PSR_SSCMode: MSLS (Bit 0) */ -#define USIC_CH_PSR_SSCMode_MSLS_Msk (0x1UL) /*!< USIC_CH PSR_SSCMode: MSLS (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_SSCMode_DX2S_Pos (1UL) /*!< USIC_CH PSR_SSCMode: DX2S (Bit 1) */ -#define USIC_CH_PSR_SSCMode_DX2S_Msk (0x2UL) /*!< USIC_CH PSR_SSCMode: DX2S (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_SSCMode_MSLSEV_Pos (2UL) /*!< USIC_CH PSR_SSCMode: MSLSEV (Bit 2) */ -#define USIC_CH_PSR_SSCMode_MSLSEV_Msk (0x4UL) /*!< USIC_CH PSR_SSCMode: MSLSEV (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_SSCMode_DX2TEV_Pos (3UL) /*!< USIC_CH PSR_SSCMode: DX2TEV (Bit 3) */ -#define USIC_CH_PSR_SSCMode_DX2TEV_Msk (0x8UL) /*!< USIC_CH PSR_SSCMode: DX2TEV (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_SSCMode_PARERR_Pos (4UL) /*!< USIC_CH PSR_SSCMode: PARERR (Bit 4) */ -#define USIC_CH_PSR_SSCMode_PARERR_Msk (0x10UL) /*!< USIC_CH PSR_SSCMode: PARERR (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_SSCMode_RSIF_Pos (10UL) /*!< USIC_CH PSR_SSCMode: RSIF (Bit 10) */ -#define USIC_CH_PSR_SSCMode_RSIF_Msk (0x400UL) /*!< USIC_CH PSR_SSCMode: RSIF (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_SSCMode_DLIF_Pos (11UL) /*!< USIC_CH PSR_SSCMode: DLIF (Bit 11) */ -#define USIC_CH_PSR_SSCMode_DLIF_Msk (0x800UL) /*!< USIC_CH PSR_SSCMode: DLIF (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_SSCMode_TSIF_Pos (12UL) /*!< USIC_CH PSR_SSCMode: TSIF (Bit 12) */ -#define USIC_CH_PSR_SSCMode_TSIF_Msk (0x1000UL) /*!< USIC_CH PSR_SSCMode: TSIF (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_SSCMode_TBIF_Pos (13UL) /*!< USIC_CH PSR_SSCMode: TBIF (Bit 13) */ -#define USIC_CH_PSR_SSCMode_TBIF_Msk (0x2000UL) /*!< USIC_CH PSR_SSCMode: TBIF (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_SSCMode_RIF_Pos (14UL) /*!< USIC_CH PSR_SSCMode: RIF (Bit 14) */ -#define USIC_CH_PSR_SSCMode_RIF_Msk (0x4000UL) /*!< USIC_CH PSR_SSCMode: RIF (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_SSCMode_AIF_Pos (15UL) /*!< USIC_CH PSR_SSCMode: AIF (Bit 15) */ -#define USIC_CH_PSR_SSCMode_AIF_Msk (0x8000UL) /*!< USIC_CH PSR_SSCMode: AIF (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_SSCMode_BRGIF_Pos (16UL) /*!< USIC_CH PSR_SSCMode: BRGIF (Bit 16) */ -#define USIC_CH_PSR_SSCMode_BRGIF_Msk (0x10000UL) /*!< USIC_CH PSR_SSCMode: BRGIF (Bitfield-Mask: 0x01) */ - -/* ----------------------------- USIC_CH_PSR_IICMode ---------------------------- */ -#define USIC_CH_PSR_IICMode_SLSEL_Pos (0UL) /*!< USIC_CH PSR_IICMode: SLSEL (Bit 0) */ -#define USIC_CH_PSR_IICMode_SLSEL_Msk (0x1UL) /*!< USIC_CH PSR_IICMode: SLSEL (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_IICMode_WTDF_Pos (1UL) /*!< USIC_CH PSR_IICMode: WTDF (Bit 1) */ -#define USIC_CH_PSR_IICMode_WTDF_Msk (0x2UL) /*!< USIC_CH PSR_IICMode: WTDF (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_IICMode_SCR_Pos (2UL) /*!< USIC_CH PSR_IICMode: SCR (Bit 2) */ -#define USIC_CH_PSR_IICMode_SCR_Msk (0x4UL) /*!< USIC_CH PSR_IICMode: SCR (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_IICMode_RSCR_Pos (3UL) /*!< USIC_CH PSR_IICMode: RSCR (Bit 3) */ -#define USIC_CH_PSR_IICMode_RSCR_Msk (0x8UL) /*!< USIC_CH PSR_IICMode: RSCR (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_IICMode_PCR_Pos (4UL) /*!< USIC_CH PSR_IICMode: PCR (Bit 4) */ -#define USIC_CH_PSR_IICMode_PCR_Msk (0x10UL) /*!< USIC_CH PSR_IICMode: PCR (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_IICMode_NACK_Pos (5UL) /*!< USIC_CH PSR_IICMode: NACK (Bit 5) */ -#define USIC_CH_PSR_IICMode_NACK_Msk (0x20UL) /*!< USIC_CH PSR_IICMode: NACK (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_IICMode_ARL_Pos (6UL) /*!< USIC_CH PSR_IICMode: ARL (Bit 6) */ -#define USIC_CH_PSR_IICMode_ARL_Msk (0x40UL) /*!< USIC_CH PSR_IICMode: ARL (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_IICMode_SRR_Pos (7UL) /*!< USIC_CH PSR_IICMode: SRR (Bit 7) */ -#define USIC_CH_PSR_IICMode_SRR_Msk (0x80UL) /*!< USIC_CH PSR_IICMode: SRR (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_IICMode_ERR_Pos (8UL) /*!< USIC_CH PSR_IICMode: ERR (Bit 8) */ -#define USIC_CH_PSR_IICMode_ERR_Msk (0x100UL) /*!< USIC_CH PSR_IICMode: ERR (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_IICMode_ACK_Pos (9UL) /*!< USIC_CH PSR_IICMode: ACK (Bit 9) */ -#define USIC_CH_PSR_IICMode_ACK_Msk (0x200UL) /*!< USIC_CH PSR_IICMode: ACK (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_IICMode_RSIF_Pos (10UL) /*!< USIC_CH PSR_IICMode: RSIF (Bit 10) */ -#define USIC_CH_PSR_IICMode_RSIF_Msk (0x400UL) /*!< USIC_CH PSR_IICMode: RSIF (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_IICMode_DLIF_Pos (11UL) /*!< USIC_CH PSR_IICMode: DLIF (Bit 11) */ -#define USIC_CH_PSR_IICMode_DLIF_Msk (0x800UL) /*!< USIC_CH PSR_IICMode: DLIF (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_IICMode_TSIF_Pos (12UL) /*!< USIC_CH PSR_IICMode: TSIF (Bit 12) */ -#define USIC_CH_PSR_IICMode_TSIF_Msk (0x1000UL) /*!< USIC_CH PSR_IICMode: TSIF (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_IICMode_TBIF_Pos (13UL) /*!< USIC_CH PSR_IICMode: TBIF (Bit 13) */ -#define USIC_CH_PSR_IICMode_TBIF_Msk (0x2000UL) /*!< USIC_CH PSR_IICMode: TBIF (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_IICMode_RIF_Pos (14UL) /*!< USIC_CH PSR_IICMode: RIF (Bit 14) */ -#define USIC_CH_PSR_IICMode_RIF_Msk (0x4000UL) /*!< USIC_CH PSR_IICMode: RIF (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_IICMode_AIF_Pos (15UL) /*!< USIC_CH PSR_IICMode: AIF (Bit 15) */ -#define USIC_CH_PSR_IICMode_AIF_Msk (0x8000UL) /*!< USIC_CH PSR_IICMode: AIF (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_IICMode_BRGIF_Pos (16UL) /*!< USIC_CH PSR_IICMode: BRGIF (Bit 16) */ -#define USIC_CH_PSR_IICMode_BRGIF_Msk (0x10000UL) /*!< USIC_CH PSR_IICMode: BRGIF (Bitfield-Mask: 0x01) */ - -/* ----------------------------- USIC_CH_PSR_IISMode ---------------------------- */ -#define USIC_CH_PSR_IISMode_WA_Pos (0UL) /*!< USIC_CH PSR_IISMode: WA (Bit 0) */ -#define USIC_CH_PSR_IISMode_WA_Msk (0x1UL) /*!< USIC_CH PSR_IISMode: WA (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_IISMode_DX2S_Pos (1UL) /*!< USIC_CH PSR_IISMode: DX2S (Bit 1) */ -#define USIC_CH_PSR_IISMode_DX2S_Msk (0x2UL) /*!< USIC_CH PSR_IISMode: DX2S (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_IISMode_DX2TEV_Pos (3UL) /*!< USIC_CH PSR_IISMode: DX2TEV (Bit 3) */ -#define USIC_CH_PSR_IISMode_DX2TEV_Msk (0x8UL) /*!< USIC_CH PSR_IISMode: DX2TEV (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_IISMode_WAFE_Pos (4UL) /*!< USIC_CH PSR_IISMode: WAFE (Bit 4) */ -#define USIC_CH_PSR_IISMode_WAFE_Msk (0x10UL) /*!< USIC_CH PSR_IISMode: WAFE (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_IISMode_WARE_Pos (5UL) /*!< USIC_CH PSR_IISMode: WARE (Bit 5) */ -#define USIC_CH_PSR_IISMode_WARE_Msk (0x20UL) /*!< USIC_CH PSR_IISMode: WARE (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_IISMode_END_Pos (6UL) /*!< USIC_CH PSR_IISMode: END (Bit 6) */ -#define USIC_CH_PSR_IISMode_END_Msk (0x40UL) /*!< USIC_CH PSR_IISMode: END (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_IISMode_RSIF_Pos (10UL) /*!< USIC_CH PSR_IISMode: RSIF (Bit 10) */ -#define USIC_CH_PSR_IISMode_RSIF_Msk (0x400UL) /*!< USIC_CH PSR_IISMode: RSIF (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_IISMode_DLIF_Pos (11UL) /*!< USIC_CH PSR_IISMode: DLIF (Bit 11) */ -#define USIC_CH_PSR_IISMode_DLIF_Msk (0x800UL) /*!< USIC_CH PSR_IISMode: DLIF (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_IISMode_TSIF_Pos (12UL) /*!< USIC_CH PSR_IISMode: TSIF (Bit 12) */ -#define USIC_CH_PSR_IISMode_TSIF_Msk (0x1000UL) /*!< USIC_CH PSR_IISMode: TSIF (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_IISMode_TBIF_Pos (13UL) /*!< USIC_CH PSR_IISMode: TBIF (Bit 13) */ -#define USIC_CH_PSR_IISMode_TBIF_Msk (0x2000UL) /*!< USIC_CH PSR_IISMode: TBIF (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_IISMode_RIF_Pos (14UL) /*!< USIC_CH PSR_IISMode: RIF (Bit 14) */ -#define USIC_CH_PSR_IISMode_RIF_Msk (0x4000UL) /*!< USIC_CH PSR_IISMode: RIF (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_IISMode_AIF_Pos (15UL) /*!< USIC_CH PSR_IISMode: AIF (Bit 15) */ -#define USIC_CH_PSR_IISMode_AIF_Msk (0x8000UL) /*!< USIC_CH PSR_IISMode: AIF (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSR_IISMode_BRGIF_Pos (16UL) /*!< USIC_CH PSR_IISMode: BRGIF (Bit 16) */ -#define USIC_CH_PSR_IISMode_BRGIF_Msk (0x10000UL) /*!< USIC_CH PSR_IISMode: BRGIF (Bitfield-Mask: 0x01) */ - -/* -------------------------------- USIC_CH_PSCR -------------------------------- */ -#define USIC_CH_PSCR_CST0_Pos (0UL) /*!< USIC_CH PSCR: CST0 (Bit 0) */ -#define USIC_CH_PSCR_CST0_Msk (0x1UL) /*!< USIC_CH PSCR: CST0 (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSCR_CST1_Pos (1UL) /*!< USIC_CH PSCR: CST1 (Bit 1) */ -#define USIC_CH_PSCR_CST1_Msk (0x2UL) /*!< USIC_CH PSCR: CST1 (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSCR_CST2_Pos (2UL) /*!< USIC_CH PSCR: CST2 (Bit 2) */ -#define USIC_CH_PSCR_CST2_Msk (0x4UL) /*!< USIC_CH PSCR: CST2 (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSCR_CST3_Pos (3UL) /*!< USIC_CH PSCR: CST3 (Bit 3) */ -#define USIC_CH_PSCR_CST3_Msk (0x8UL) /*!< USIC_CH PSCR: CST3 (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSCR_CST4_Pos (4UL) /*!< USIC_CH PSCR: CST4 (Bit 4) */ -#define USIC_CH_PSCR_CST4_Msk (0x10UL) /*!< USIC_CH PSCR: CST4 (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSCR_CST5_Pos (5UL) /*!< USIC_CH PSCR: CST5 (Bit 5) */ -#define USIC_CH_PSCR_CST5_Msk (0x20UL) /*!< USIC_CH PSCR: CST5 (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSCR_CST6_Pos (6UL) /*!< USIC_CH PSCR: CST6 (Bit 6) */ -#define USIC_CH_PSCR_CST6_Msk (0x40UL) /*!< USIC_CH PSCR: CST6 (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSCR_CST7_Pos (7UL) /*!< USIC_CH PSCR: CST7 (Bit 7) */ -#define USIC_CH_PSCR_CST7_Msk (0x80UL) /*!< USIC_CH PSCR: CST7 (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSCR_CST8_Pos (8UL) /*!< USIC_CH PSCR: CST8 (Bit 8) */ -#define USIC_CH_PSCR_CST8_Msk (0x100UL) /*!< USIC_CH PSCR: CST8 (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSCR_CST9_Pos (9UL) /*!< USIC_CH PSCR: CST9 (Bit 9) */ -#define USIC_CH_PSCR_CST9_Msk (0x200UL) /*!< USIC_CH PSCR: CST9 (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSCR_CRSIF_Pos (10UL) /*!< USIC_CH PSCR: CRSIF (Bit 10) */ -#define USIC_CH_PSCR_CRSIF_Msk (0x400UL) /*!< USIC_CH PSCR: CRSIF (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSCR_CDLIF_Pos (11UL) /*!< USIC_CH PSCR: CDLIF (Bit 11) */ -#define USIC_CH_PSCR_CDLIF_Msk (0x800UL) /*!< USIC_CH PSCR: CDLIF (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSCR_CTSIF_Pos (12UL) /*!< USIC_CH PSCR: CTSIF (Bit 12) */ -#define USIC_CH_PSCR_CTSIF_Msk (0x1000UL) /*!< USIC_CH PSCR: CTSIF (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSCR_CTBIF_Pos (13UL) /*!< USIC_CH PSCR: CTBIF (Bit 13) */ -#define USIC_CH_PSCR_CTBIF_Msk (0x2000UL) /*!< USIC_CH PSCR: CTBIF (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSCR_CRIF_Pos (14UL) /*!< USIC_CH PSCR: CRIF (Bit 14) */ -#define USIC_CH_PSCR_CRIF_Msk (0x4000UL) /*!< USIC_CH PSCR: CRIF (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSCR_CAIF_Pos (15UL) /*!< USIC_CH PSCR: CAIF (Bit 15) */ -#define USIC_CH_PSCR_CAIF_Msk (0x8000UL) /*!< USIC_CH PSCR: CAIF (Bitfield-Mask: 0x01) */ -#define USIC_CH_PSCR_CBRGIF_Pos (16UL) /*!< USIC_CH PSCR: CBRGIF (Bit 16) */ -#define USIC_CH_PSCR_CBRGIF_Msk (0x10000UL) /*!< USIC_CH PSCR: CBRGIF (Bitfield-Mask: 0x01) */ - -/* ------------------------------- USIC_CH_RBUFSR ------------------------------- */ -#define USIC_CH_RBUFSR_WLEN_Pos (0UL) /*!< USIC_CH RBUFSR: WLEN (Bit 0) */ -#define USIC_CH_RBUFSR_WLEN_Msk (0xfUL) /*!< USIC_CH RBUFSR: WLEN (Bitfield-Mask: 0x0f) */ -#define USIC_CH_RBUFSR_SOF_Pos (6UL) /*!< USIC_CH RBUFSR: SOF (Bit 6) */ -#define USIC_CH_RBUFSR_SOF_Msk (0x40UL) /*!< USIC_CH RBUFSR: SOF (Bitfield-Mask: 0x01) */ -#define USIC_CH_RBUFSR_PAR_Pos (8UL) /*!< USIC_CH RBUFSR: PAR (Bit 8) */ -#define USIC_CH_RBUFSR_PAR_Msk (0x100UL) /*!< USIC_CH RBUFSR: PAR (Bitfield-Mask: 0x01) */ -#define USIC_CH_RBUFSR_PERR_Pos (9UL) /*!< USIC_CH RBUFSR: PERR (Bit 9) */ -#define USIC_CH_RBUFSR_PERR_Msk (0x200UL) /*!< USIC_CH RBUFSR: PERR (Bitfield-Mask: 0x01) */ -#define USIC_CH_RBUFSR_RDV0_Pos (13UL) /*!< USIC_CH RBUFSR: RDV0 (Bit 13) */ -#define USIC_CH_RBUFSR_RDV0_Msk (0x2000UL) /*!< USIC_CH RBUFSR: RDV0 (Bitfield-Mask: 0x01) */ -#define USIC_CH_RBUFSR_RDV1_Pos (14UL) /*!< USIC_CH RBUFSR: RDV1 (Bit 14) */ -#define USIC_CH_RBUFSR_RDV1_Msk (0x4000UL) /*!< USIC_CH RBUFSR: RDV1 (Bitfield-Mask: 0x01) */ -#define USIC_CH_RBUFSR_DS_Pos (15UL) /*!< USIC_CH RBUFSR: DS (Bit 15) */ -#define USIC_CH_RBUFSR_DS_Msk (0x8000UL) /*!< USIC_CH RBUFSR: DS (Bitfield-Mask: 0x01) */ - -/* -------------------------------- USIC_CH_RBUF -------------------------------- */ -#define USIC_CH_RBUF_DSR_Pos (0UL) /*!< USIC_CH RBUF: DSR (Bit 0) */ -#define USIC_CH_RBUF_DSR_Msk (0xffffUL) /*!< USIC_CH RBUF: DSR (Bitfield-Mask: 0xffff) */ - -/* -------------------------------- USIC_CH_RBUFD ------------------------------- */ -#define USIC_CH_RBUFD_DSR_Pos (0UL) /*!< USIC_CH RBUFD: DSR (Bit 0) */ -#define USIC_CH_RBUFD_DSR_Msk (0xffffUL) /*!< USIC_CH RBUFD: DSR (Bitfield-Mask: 0xffff) */ - -/* -------------------------------- USIC_CH_RBUF0 ------------------------------- */ -#define USIC_CH_RBUF0_DSR0_Pos (0UL) /*!< USIC_CH RBUF0: DSR0 (Bit 0) */ -#define USIC_CH_RBUF0_DSR0_Msk (0xffffUL) /*!< USIC_CH RBUF0: DSR0 (Bitfield-Mask: 0xffff) */ - -/* -------------------------------- USIC_CH_RBUF1 ------------------------------- */ -#define USIC_CH_RBUF1_DSR1_Pos (0UL) /*!< USIC_CH RBUF1: DSR1 (Bit 0) */ -#define USIC_CH_RBUF1_DSR1_Msk (0xffffUL) /*!< USIC_CH RBUF1: DSR1 (Bitfield-Mask: 0xffff) */ - -/* ------------------------------ USIC_CH_RBUF01SR ------------------------------ */ -#define USIC_CH_RBUF01SR_WLEN0_Pos (0UL) /*!< USIC_CH RBUF01SR: WLEN0 (Bit 0) */ -#define USIC_CH_RBUF01SR_WLEN0_Msk (0xfUL) /*!< USIC_CH RBUF01SR: WLEN0 (Bitfield-Mask: 0x0f) */ -#define USIC_CH_RBUF01SR_SOF0_Pos (6UL) /*!< USIC_CH RBUF01SR: SOF0 (Bit 6) */ -#define USIC_CH_RBUF01SR_SOF0_Msk (0x40UL) /*!< USIC_CH RBUF01SR: SOF0 (Bitfield-Mask: 0x01) */ -#define USIC_CH_RBUF01SR_PAR0_Pos (8UL) /*!< USIC_CH RBUF01SR: PAR0 (Bit 8) */ -#define USIC_CH_RBUF01SR_PAR0_Msk (0x100UL) /*!< USIC_CH RBUF01SR: PAR0 (Bitfield-Mask: 0x01) */ -#define USIC_CH_RBUF01SR_PERR0_Pos (9UL) /*!< USIC_CH RBUF01SR: PERR0 (Bit 9) */ -#define USIC_CH_RBUF01SR_PERR0_Msk (0x200UL) /*!< USIC_CH RBUF01SR: PERR0 (Bitfield-Mask: 0x01) */ -#define USIC_CH_RBUF01SR_RDV00_Pos (13UL) /*!< USIC_CH RBUF01SR: RDV00 (Bit 13) */ -#define USIC_CH_RBUF01SR_RDV00_Msk (0x2000UL) /*!< USIC_CH RBUF01SR: RDV00 (Bitfield-Mask: 0x01) */ -#define USIC_CH_RBUF01SR_RDV01_Pos (14UL) /*!< USIC_CH RBUF01SR: RDV01 (Bit 14) */ -#define USIC_CH_RBUF01SR_RDV01_Msk (0x4000UL) /*!< USIC_CH RBUF01SR: RDV01 (Bitfield-Mask: 0x01) */ -#define USIC_CH_RBUF01SR_DS0_Pos (15UL) /*!< USIC_CH RBUF01SR: DS0 (Bit 15) */ -#define USIC_CH_RBUF01SR_DS0_Msk (0x8000UL) /*!< USIC_CH RBUF01SR: DS0 (Bitfield-Mask: 0x01) */ -#define USIC_CH_RBUF01SR_WLEN1_Pos (16UL) /*!< USIC_CH RBUF01SR: WLEN1 (Bit 16) */ -#define USIC_CH_RBUF01SR_WLEN1_Msk (0xf0000UL) /*!< USIC_CH RBUF01SR: WLEN1 (Bitfield-Mask: 0x0f) */ -#define USIC_CH_RBUF01SR_SOF1_Pos (22UL) /*!< USIC_CH RBUF01SR: SOF1 (Bit 22) */ -#define USIC_CH_RBUF01SR_SOF1_Msk (0x400000UL) /*!< USIC_CH RBUF01SR: SOF1 (Bitfield-Mask: 0x01) */ -#define USIC_CH_RBUF01SR_PAR1_Pos (24UL) /*!< USIC_CH RBUF01SR: PAR1 (Bit 24) */ -#define USIC_CH_RBUF01SR_PAR1_Msk (0x1000000UL) /*!< USIC_CH RBUF01SR: PAR1 (Bitfield-Mask: 0x01) */ -#define USIC_CH_RBUF01SR_PERR1_Pos (25UL) /*!< USIC_CH RBUF01SR: PERR1 (Bit 25) */ -#define USIC_CH_RBUF01SR_PERR1_Msk (0x2000000UL) /*!< USIC_CH RBUF01SR: PERR1 (Bitfield-Mask: 0x01) */ -#define USIC_CH_RBUF01SR_RDV10_Pos (29UL) /*!< USIC_CH RBUF01SR: RDV10 (Bit 29) */ -#define USIC_CH_RBUF01SR_RDV10_Msk (0x20000000UL) /*!< USIC_CH RBUF01SR: RDV10 (Bitfield-Mask: 0x01) */ -#define USIC_CH_RBUF01SR_RDV11_Pos (30UL) /*!< USIC_CH RBUF01SR: RDV11 (Bit 30) */ -#define USIC_CH_RBUF01SR_RDV11_Msk (0x40000000UL) /*!< USIC_CH RBUF01SR: RDV11 (Bitfield-Mask: 0x01) */ -#define USIC_CH_RBUF01SR_DS1_Pos (31UL) /*!< USIC_CH RBUF01SR: DS1 (Bit 31) */ -#define USIC_CH_RBUF01SR_DS1_Msk (0x80000000UL) /*!< USIC_CH RBUF01SR: DS1 (Bitfield-Mask: 0x01) */ - -/* --------------------------------- USIC_CH_FMR -------------------------------- */ -#define USIC_CH_FMR_MTDV_Pos (0UL) /*!< USIC_CH FMR: MTDV (Bit 0) */ -#define USIC_CH_FMR_MTDV_Msk (0x3UL) /*!< USIC_CH FMR: MTDV (Bitfield-Mask: 0x03) */ -#define USIC_CH_FMR_ATVC_Pos (4UL) /*!< USIC_CH FMR: ATVC (Bit 4) */ -#define USIC_CH_FMR_ATVC_Msk (0x10UL) /*!< USIC_CH FMR: ATVC (Bitfield-Mask: 0x01) */ -#define USIC_CH_FMR_CRDV0_Pos (14UL) /*!< USIC_CH FMR: CRDV0 (Bit 14) */ -#define USIC_CH_FMR_CRDV0_Msk (0x4000UL) /*!< USIC_CH FMR: CRDV0 (Bitfield-Mask: 0x01) */ -#define USIC_CH_FMR_CRDV1_Pos (15UL) /*!< USIC_CH FMR: CRDV1 (Bit 15) */ -#define USIC_CH_FMR_CRDV1_Msk (0x8000UL) /*!< USIC_CH FMR: CRDV1 (Bitfield-Mask: 0x01) */ -#define USIC_CH_FMR_SIO0_Pos (16UL) /*!< USIC_CH FMR: SIO0 (Bit 16) */ -#define USIC_CH_FMR_SIO0_Msk (0x10000UL) /*!< USIC_CH FMR: SIO0 (Bitfield-Mask: 0x01) */ -#define USIC_CH_FMR_SIO1_Pos (17UL) /*!< USIC_CH FMR: SIO1 (Bit 17) */ -#define USIC_CH_FMR_SIO1_Msk (0x20000UL) /*!< USIC_CH FMR: SIO1 (Bitfield-Mask: 0x01) */ -#define USIC_CH_FMR_SIO2_Pos (18UL) /*!< USIC_CH FMR: SIO2 (Bit 18) */ -#define USIC_CH_FMR_SIO2_Msk (0x40000UL) /*!< USIC_CH FMR: SIO2 (Bitfield-Mask: 0x01) */ -#define USIC_CH_FMR_SIO3_Pos (19UL) /*!< USIC_CH FMR: SIO3 (Bit 19) */ -#define USIC_CH_FMR_SIO3_Msk (0x80000UL) /*!< USIC_CH FMR: SIO3 (Bitfield-Mask: 0x01) */ -#define USIC_CH_FMR_SIO4_Pos (20UL) /*!< USIC_CH FMR: SIO4 (Bit 20) */ -#define USIC_CH_FMR_SIO4_Msk (0x100000UL) /*!< USIC_CH FMR: SIO4 (Bitfield-Mask: 0x01) */ -#define USIC_CH_FMR_SIO5_Pos (21UL) /*!< USIC_CH FMR: SIO5 (Bit 21) */ -#define USIC_CH_FMR_SIO5_Msk (0x200000UL) /*!< USIC_CH FMR: SIO5 (Bitfield-Mask: 0x01) */ - -/* -------------------------------- USIC_CH_TBUF -------------------------------- */ -#define USIC_CH_TBUF_TDATA_Pos (0UL) /*!< USIC_CH TBUF: TDATA (Bit 0) */ -#define USIC_CH_TBUF_TDATA_Msk (0xffffUL) /*!< USIC_CH TBUF: TDATA (Bitfield-Mask: 0xffff) */ - -/* --------------------------------- USIC_CH_BYP -------------------------------- */ -#define USIC_CH_BYP_BDATA_Pos (0UL) /*!< USIC_CH BYP: BDATA (Bit 0) */ -#define USIC_CH_BYP_BDATA_Msk (0xffffUL) /*!< USIC_CH BYP: BDATA (Bitfield-Mask: 0xffff) */ - -/* -------------------------------- USIC_CH_BYPCR ------------------------------- */ -#define USIC_CH_BYPCR_BWLE_Pos (0UL) /*!< USIC_CH BYPCR: BWLE (Bit 0) */ -#define USIC_CH_BYPCR_BWLE_Msk (0xfUL) /*!< USIC_CH BYPCR: BWLE (Bitfield-Mask: 0x0f) */ -#define USIC_CH_BYPCR_BDSSM_Pos (8UL) /*!< USIC_CH BYPCR: BDSSM (Bit 8) */ -#define USIC_CH_BYPCR_BDSSM_Msk (0x100UL) /*!< USIC_CH BYPCR: BDSSM (Bitfield-Mask: 0x01) */ -#define USIC_CH_BYPCR_BDEN_Pos (10UL) /*!< USIC_CH BYPCR: BDEN (Bit 10) */ -#define USIC_CH_BYPCR_BDEN_Msk (0xc00UL) /*!< USIC_CH BYPCR: BDEN (Bitfield-Mask: 0x03) */ -#define USIC_CH_BYPCR_BDVTR_Pos (12UL) /*!< USIC_CH BYPCR: BDVTR (Bit 12) */ -#define USIC_CH_BYPCR_BDVTR_Msk (0x1000UL) /*!< USIC_CH BYPCR: BDVTR (Bitfield-Mask: 0x01) */ -#define USIC_CH_BYPCR_BPRIO_Pos (13UL) /*!< USIC_CH BYPCR: BPRIO (Bit 13) */ -#define USIC_CH_BYPCR_BPRIO_Msk (0x2000UL) /*!< USIC_CH BYPCR: BPRIO (Bitfield-Mask: 0x01) */ -#define USIC_CH_BYPCR_BDV_Pos (15UL) /*!< USIC_CH BYPCR: BDV (Bit 15) */ -#define USIC_CH_BYPCR_BDV_Msk (0x8000UL) /*!< USIC_CH BYPCR: BDV (Bitfield-Mask: 0x01) */ -#define USIC_CH_BYPCR_BSELO_Pos (16UL) /*!< USIC_CH BYPCR: BSELO (Bit 16) */ -#define USIC_CH_BYPCR_BSELO_Msk (0x1f0000UL) /*!< USIC_CH BYPCR: BSELO (Bitfield-Mask: 0x1f) */ -#define USIC_CH_BYPCR_BHPC_Pos (21UL) /*!< USIC_CH BYPCR: BHPC (Bit 21) */ -#define USIC_CH_BYPCR_BHPC_Msk (0xe00000UL) /*!< USIC_CH BYPCR: BHPC (Bitfield-Mask: 0x07) */ - -/* -------------------------------- USIC_CH_TBCTR ------------------------------- */ -#define USIC_CH_TBCTR_DPTR_Pos (0UL) /*!< USIC_CH TBCTR: DPTR (Bit 0) */ -#define USIC_CH_TBCTR_DPTR_Msk (0x3fUL) /*!< USIC_CH TBCTR: DPTR (Bitfield-Mask: 0x3f) */ -#define USIC_CH_TBCTR_LIMIT_Pos (8UL) /*!< USIC_CH TBCTR: LIMIT (Bit 8) */ -#define USIC_CH_TBCTR_LIMIT_Msk (0x3f00UL) /*!< USIC_CH TBCTR: LIMIT (Bitfield-Mask: 0x3f) */ -#define USIC_CH_TBCTR_STBTM_Pos (14UL) /*!< USIC_CH TBCTR: STBTM (Bit 14) */ -#define USIC_CH_TBCTR_STBTM_Msk (0x4000UL) /*!< USIC_CH TBCTR: STBTM (Bitfield-Mask: 0x01) */ -#define USIC_CH_TBCTR_STBTEN_Pos (15UL) /*!< USIC_CH TBCTR: STBTEN (Bit 15) */ -#define USIC_CH_TBCTR_STBTEN_Msk (0x8000UL) /*!< USIC_CH TBCTR: STBTEN (Bitfield-Mask: 0x01) */ -#define USIC_CH_TBCTR_STBINP_Pos (16UL) /*!< USIC_CH TBCTR: STBINP (Bit 16) */ -#define USIC_CH_TBCTR_STBINP_Msk (0x70000UL) /*!< USIC_CH TBCTR: STBINP (Bitfield-Mask: 0x07) */ -#define USIC_CH_TBCTR_ATBINP_Pos (19UL) /*!< USIC_CH TBCTR: ATBINP (Bit 19) */ -#define USIC_CH_TBCTR_ATBINP_Msk (0x380000UL) /*!< USIC_CH TBCTR: ATBINP (Bitfield-Mask: 0x07) */ -#define USIC_CH_TBCTR_SIZE_Pos (24UL) /*!< USIC_CH TBCTR: SIZE (Bit 24) */ -#define USIC_CH_TBCTR_SIZE_Msk (0x7000000UL) /*!< USIC_CH TBCTR: SIZE (Bitfield-Mask: 0x07) */ -#define USIC_CH_TBCTR_LOF_Pos (28UL) /*!< USIC_CH TBCTR: LOF (Bit 28) */ -#define USIC_CH_TBCTR_LOF_Msk (0x10000000UL) /*!< USIC_CH TBCTR: LOF (Bitfield-Mask: 0x01) */ -#define USIC_CH_TBCTR_STBIEN_Pos (30UL) /*!< USIC_CH TBCTR: STBIEN (Bit 30) */ -#define USIC_CH_TBCTR_STBIEN_Msk (0x40000000UL) /*!< USIC_CH TBCTR: STBIEN (Bitfield-Mask: 0x01) */ -#define USIC_CH_TBCTR_TBERIEN_Pos (31UL) /*!< USIC_CH TBCTR: TBERIEN (Bit 31) */ -#define USIC_CH_TBCTR_TBERIEN_Msk (0x80000000UL) /*!< USIC_CH TBCTR: TBERIEN (Bitfield-Mask: 0x01) */ - -/* -------------------------------- USIC_CH_RBCTR ------------------------------- */ -#define USIC_CH_RBCTR_DPTR_Pos (0UL) /*!< USIC_CH RBCTR: DPTR (Bit 0) */ -#define USIC_CH_RBCTR_DPTR_Msk (0x3fUL) /*!< USIC_CH RBCTR: DPTR (Bitfield-Mask: 0x3f) */ -#define USIC_CH_RBCTR_LIMIT_Pos (8UL) /*!< USIC_CH RBCTR: LIMIT (Bit 8) */ -#define USIC_CH_RBCTR_LIMIT_Msk (0x3f00UL) /*!< USIC_CH RBCTR: LIMIT (Bitfield-Mask: 0x3f) */ -#define USIC_CH_RBCTR_SRBTM_Pos (14UL) /*!< USIC_CH RBCTR: SRBTM (Bit 14) */ -#define USIC_CH_RBCTR_SRBTM_Msk (0x4000UL) /*!< USIC_CH RBCTR: SRBTM (Bitfield-Mask: 0x01) */ -#define USIC_CH_RBCTR_SRBTEN_Pos (15UL) /*!< USIC_CH RBCTR: SRBTEN (Bit 15) */ -#define USIC_CH_RBCTR_SRBTEN_Msk (0x8000UL) /*!< USIC_CH RBCTR: SRBTEN (Bitfield-Mask: 0x01) */ -#define USIC_CH_RBCTR_SRBINP_Pos (16UL) /*!< USIC_CH RBCTR: SRBINP (Bit 16) */ -#define USIC_CH_RBCTR_SRBINP_Msk (0x70000UL) /*!< USIC_CH RBCTR: SRBINP (Bitfield-Mask: 0x07) */ -#define USIC_CH_RBCTR_ARBINP_Pos (19UL) /*!< USIC_CH RBCTR: ARBINP (Bit 19) */ -#define USIC_CH_RBCTR_ARBINP_Msk (0x380000UL) /*!< USIC_CH RBCTR: ARBINP (Bitfield-Mask: 0x07) */ -#define USIC_CH_RBCTR_RCIM_Pos (22UL) /*!< USIC_CH RBCTR: RCIM (Bit 22) */ -#define USIC_CH_RBCTR_RCIM_Msk (0xc00000UL) /*!< USIC_CH RBCTR: RCIM (Bitfield-Mask: 0x03) */ -#define USIC_CH_RBCTR_SIZE_Pos (24UL) /*!< USIC_CH RBCTR: SIZE (Bit 24) */ -#define USIC_CH_RBCTR_SIZE_Msk (0x7000000UL) /*!< USIC_CH RBCTR: SIZE (Bitfield-Mask: 0x07) */ -#define USIC_CH_RBCTR_RNM_Pos (27UL) /*!< USIC_CH RBCTR: RNM (Bit 27) */ -#define USIC_CH_RBCTR_RNM_Msk (0x8000000UL) /*!< USIC_CH RBCTR: RNM (Bitfield-Mask: 0x01) */ -#define USIC_CH_RBCTR_LOF_Pos (28UL) /*!< USIC_CH RBCTR: LOF (Bit 28) */ -#define USIC_CH_RBCTR_LOF_Msk (0x10000000UL) /*!< USIC_CH RBCTR: LOF (Bitfield-Mask: 0x01) */ -#define USIC_CH_RBCTR_ARBIEN_Pos (29UL) /*!< USIC_CH RBCTR: ARBIEN (Bit 29) */ -#define USIC_CH_RBCTR_ARBIEN_Msk (0x20000000UL) /*!< USIC_CH RBCTR: ARBIEN (Bitfield-Mask: 0x01) */ -#define USIC_CH_RBCTR_SRBIEN_Pos (30UL) /*!< USIC_CH RBCTR: SRBIEN (Bit 30) */ -#define USIC_CH_RBCTR_SRBIEN_Msk (0x40000000UL) /*!< USIC_CH RBCTR: SRBIEN (Bitfield-Mask: 0x01) */ -#define USIC_CH_RBCTR_RBERIEN_Pos (31UL) /*!< USIC_CH RBCTR: RBERIEN (Bit 31) */ -#define USIC_CH_RBCTR_RBERIEN_Msk (0x80000000UL) /*!< USIC_CH RBCTR: RBERIEN (Bitfield-Mask: 0x01) */ - -/* ------------------------------- USIC_CH_TRBPTR ------------------------------- */ -#define USIC_CH_TRBPTR_TDIPTR_Pos (0UL) /*!< USIC_CH TRBPTR: TDIPTR (Bit 0) */ -#define USIC_CH_TRBPTR_TDIPTR_Msk (0x3fUL) /*!< USIC_CH TRBPTR: TDIPTR (Bitfield-Mask: 0x3f) */ -#define USIC_CH_TRBPTR_TDOPTR_Pos (8UL) /*!< USIC_CH TRBPTR: TDOPTR (Bit 8) */ -#define USIC_CH_TRBPTR_TDOPTR_Msk (0x3f00UL) /*!< USIC_CH TRBPTR: TDOPTR (Bitfield-Mask: 0x3f) */ -#define USIC_CH_TRBPTR_RDIPTR_Pos (16UL) /*!< USIC_CH TRBPTR: RDIPTR (Bit 16) */ -#define USIC_CH_TRBPTR_RDIPTR_Msk (0x3f0000UL) /*!< USIC_CH TRBPTR: RDIPTR (Bitfield-Mask: 0x3f) */ -#define USIC_CH_TRBPTR_RDOPTR_Pos (24UL) /*!< USIC_CH TRBPTR: RDOPTR (Bit 24) */ -#define USIC_CH_TRBPTR_RDOPTR_Msk (0x3f000000UL) /*!< USIC_CH TRBPTR: RDOPTR (Bitfield-Mask: 0x3f) */ - -/* -------------------------------- USIC_CH_TRBSR ------------------------------- */ -#define USIC_CH_TRBSR_SRBI_Pos (0UL) /*!< USIC_CH TRBSR: SRBI (Bit 0) */ -#define USIC_CH_TRBSR_SRBI_Msk (0x1UL) /*!< USIC_CH TRBSR: SRBI (Bitfield-Mask: 0x01) */ -#define USIC_CH_TRBSR_RBERI_Pos (1UL) /*!< USIC_CH TRBSR: RBERI (Bit 1) */ -#define USIC_CH_TRBSR_RBERI_Msk (0x2UL) /*!< USIC_CH TRBSR: RBERI (Bitfield-Mask: 0x01) */ -#define USIC_CH_TRBSR_ARBI_Pos (2UL) /*!< USIC_CH TRBSR: ARBI (Bit 2) */ -#define USIC_CH_TRBSR_ARBI_Msk (0x4UL) /*!< USIC_CH TRBSR: ARBI (Bitfield-Mask: 0x01) */ -#define USIC_CH_TRBSR_REMPTY_Pos (3UL) /*!< USIC_CH TRBSR: REMPTY (Bit 3) */ -#define USIC_CH_TRBSR_REMPTY_Msk (0x8UL) /*!< USIC_CH TRBSR: REMPTY (Bitfield-Mask: 0x01) */ -#define USIC_CH_TRBSR_RFULL_Pos (4UL) /*!< USIC_CH TRBSR: RFULL (Bit 4) */ -#define USIC_CH_TRBSR_RFULL_Msk (0x10UL) /*!< USIC_CH TRBSR: RFULL (Bitfield-Mask: 0x01) */ -#define USIC_CH_TRBSR_RBUS_Pos (5UL) /*!< USIC_CH TRBSR: RBUS (Bit 5) */ -#define USIC_CH_TRBSR_RBUS_Msk (0x20UL) /*!< USIC_CH TRBSR: RBUS (Bitfield-Mask: 0x01) */ -#define USIC_CH_TRBSR_SRBT_Pos (6UL) /*!< USIC_CH TRBSR: SRBT (Bit 6) */ -#define USIC_CH_TRBSR_SRBT_Msk (0x40UL) /*!< USIC_CH TRBSR: SRBT (Bitfield-Mask: 0x01) */ -#define USIC_CH_TRBSR_STBI_Pos (8UL) /*!< USIC_CH TRBSR: STBI (Bit 8) */ -#define USIC_CH_TRBSR_STBI_Msk (0x100UL) /*!< USIC_CH TRBSR: STBI (Bitfield-Mask: 0x01) */ -#define USIC_CH_TRBSR_TBERI_Pos (9UL) /*!< USIC_CH TRBSR: TBERI (Bit 9) */ -#define USIC_CH_TRBSR_TBERI_Msk (0x200UL) /*!< USIC_CH TRBSR: TBERI (Bitfield-Mask: 0x01) */ -#define USIC_CH_TRBSR_TEMPTY_Pos (11UL) /*!< USIC_CH TRBSR: TEMPTY (Bit 11) */ -#define USIC_CH_TRBSR_TEMPTY_Msk (0x800UL) /*!< USIC_CH TRBSR: TEMPTY (Bitfield-Mask: 0x01) */ -#define USIC_CH_TRBSR_TFULL_Pos (12UL) /*!< USIC_CH TRBSR: TFULL (Bit 12) */ -#define USIC_CH_TRBSR_TFULL_Msk (0x1000UL) /*!< USIC_CH TRBSR: TFULL (Bitfield-Mask: 0x01) */ -#define USIC_CH_TRBSR_TBUS_Pos (13UL) /*!< USIC_CH TRBSR: TBUS (Bit 13) */ -#define USIC_CH_TRBSR_TBUS_Msk (0x2000UL) /*!< USIC_CH TRBSR: TBUS (Bitfield-Mask: 0x01) */ -#define USIC_CH_TRBSR_STBT_Pos (14UL) /*!< USIC_CH TRBSR: STBT (Bit 14) */ -#define USIC_CH_TRBSR_STBT_Msk (0x4000UL) /*!< USIC_CH TRBSR: STBT (Bitfield-Mask: 0x01) */ -#define USIC_CH_TRBSR_RBFLVL_Pos (16UL) /*!< USIC_CH TRBSR: RBFLVL (Bit 16) */ -#define USIC_CH_TRBSR_RBFLVL_Msk (0x7f0000UL) /*!< USIC_CH TRBSR: RBFLVL (Bitfield-Mask: 0x7f) */ -#define USIC_CH_TRBSR_TBFLVL_Pos (24UL) /*!< USIC_CH TRBSR: TBFLVL (Bit 24) */ -#define USIC_CH_TRBSR_TBFLVL_Msk (0x7f000000UL) /*!< USIC_CH TRBSR: TBFLVL (Bitfield-Mask: 0x7f) */ - -/* ------------------------------- USIC_CH_TRBSCR ------------------------------- */ -#define USIC_CH_TRBSCR_CSRBI_Pos (0UL) /*!< USIC_CH TRBSCR: CSRBI (Bit 0) */ -#define USIC_CH_TRBSCR_CSRBI_Msk (0x1UL) /*!< USIC_CH TRBSCR: CSRBI (Bitfield-Mask: 0x01) */ -#define USIC_CH_TRBSCR_CRBERI_Pos (1UL) /*!< USIC_CH TRBSCR: CRBERI (Bit 1) */ -#define USIC_CH_TRBSCR_CRBERI_Msk (0x2UL) /*!< USIC_CH TRBSCR: CRBERI (Bitfield-Mask: 0x01) */ -#define USIC_CH_TRBSCR_CARBI_Pos (2UL) /*!< USIC_CH TRBSCR: CARBI (Bit 2) */ -#define USIC_CH_TRBSCR_CARBI_Msk (0x4UL) /*!< USIC_CH TRBSCR: CARBI (Bitfield-Mask: 0x01) */ -#define USIC_CH_TRBSCR_CSTBI_Pos (8UL) /*!< USIC_CH TRBSCR: CSTBI (Bit 8) */ -#define USIC_CH_TRBSCR_CSTBI_Msk (0x100UL) /*!< USIC_CH TRBSCR: CSTBI (Bitfield-Mask: 0x01) */ -#define USIC_CH_TRBSCR_CTBERI_Pos (9UL) /*!< USIC_CH TRBSCR: CTBERI (Bit 9) */ -#define USIC_CH_TRBSCR_CTBERI_Msk (0x200UL) /*!< USIC_CH TRBSCR: CTBERI (Bitfield-Mask: 0x01) */ -#define USIC_CH_TRBSCR_CBDV_Pos (10UL) /*!< USIC_CH TRBSCR: CBDV (Bit 10) */ -#define USIC_CH_TRBSCR_CBDV_Msk (0x400UL) /*!< USIC_CH TRBSCR: CBDV (Bitfield-Mask: 0x01) */ -#define USIC_CH_TRBSCR_FLUSHRB_Pos (14UL) /*!< USIC_CH TRBSCR: FLUSHRB (Bit 14) */ -#define USIC_CH_TRBSCR_FLUSHRB_Msk (0x4000UL) /*!< USIC_CH TRBSCR: FLUSHRB (Bitfield-Mask: 0x01) */ -#define USIC_CH_TRBSCR_FLUSHTB_Pos (15UL) /*!< USIC_CH TRBSCR: FLUSHTB (Bit 15) */ -#define USIC_CH_TRBSCR_FLUSHTB_Msk (0x8000UL) /*!< USIC_CH TRBSCR: FLUSHTB (Bitfield-Mask: 0x01) */ - -/* -------------------------------- USIC_CH_OUTR -------------------------------- */ -#define USIC_CH_OUTR_DSR_Pos (0UL) /*!< USIC_CH OUTR: DSR (Bit 0) */ -#define USIC_CH_OUTR_DSR_Msk (0xffffUL) /*!< USIC_CH OUTR: DSR (Bitfield-Mask: 0xffff) */ -#define USIC_CH_OUTR_RCI_Pos (16UL) /*!< USIC_CH OUTR: RCI (Bit 16) */ -#define USIC_CH_OUTR_RCI_Msk (0x1f0000UL) /*!< USIC_CH OUTR: RCI (Bitfield-Mask: 0x1f) */ - -/* -------------------------------- USIC_CH_OUTDR ------------------------------- */ -#define USIC_CH_OUTDR_DSR_Pos (0UL) /*!< USIC_CH OUTDR: DSR (Bit 0) */ -#define USIC_CH_OUTDR_DSR_Msk (0xffffUL) /*!< USIC_CH OUTDR: DSR (Bitfield-Mask: 0xffff) */ -#define USIC_CH_OUTDR_RCI_Pos (16UL) /*!< USIC_CH OUTDR: RCI (Bit 16) */ -#define USIC_CH_OUTDR_RCI_Msk (0x1f0000UL) /*!< USIC_CH OUTDR: RCI (Bitfield-Mask: 0x1f) */ - -/* --------------------------------- USIC_CH_IN --------------------------------- */ -#define USIC_CH_IN_TDATA_Pos (0UL) /*!< USIC_CH IN: TDATA (Bit 0) */ -#define USIC_CH_IN_TDATA_Msk (0xffffUL) /*!< USIC_CH IN: TDATA (Bitfield-Mask: 0xffff) */ - - -/* ================================================================================ */ -/* ================ struct 'CAN' Position & Mask ================ */ -/* ================================================================================ */ - - -/* ----------------------------------- CAN_CLC ---------------------------------- */ -#define CAN_CLC_DISR_Pos (0UL) /*!< CAN CLC: DISR (Bit 0) */ -#define CAN_CLC_DISR_Msk (0x1UL) /*!< CAN CLC: DISR (Bitfield-Mask: 0x01) */ -#define CAN_CLC_DISS_Pos (1UL) /*!< CAN CLC: DISS (Bit 1) */ -#define CAN_CLC_DISS_Msk (0x2UL) /*!< CAN CLC: DISS (Bitfield-Mask: 0x01) */ -#define CAN_CLC_EDIS_Pos (3UL) /*!< CAN CLC: EDIS (Bit 3) */ -#define CAN_CLC_EDIS_Msk (0x8UL) /*!< CAN CLC: EDIS (Bitfield-Mask: 0x01) */ - -/* ----------------------------------- CAN_ID ----------------------------------- */ -#define CAN_ID_MOD_REV_Pos (0UL) /*!< CAN ID: MOD_REV (Bit 0) */ -#define CAN_ID_MOD_REV_Msk (0xffUL) /*!< CAN ID: MOD_REV (Bitfield-Mask: 0xff) */ -#define CAN_ID_MOD_TYPE_Pos (8UL) /*!< CAN ID: MOD_TYPE (Bit 8) */ -#define CAN_ID_MOD_TYPE_Msk (0xff00UL) /*!< CAN ID: MOD_TYPE (Bitfield-Mask: 0xff) */ -#define CAN_ID_MOD_NUMBER_Pos (16UL) /*!< CAN ID: MOD_NUMBER (Bit 16) */ -#define CAN_ID_MOD_NUMBER_Msk (0xffff0000UL) /*!< CAN ID: MOD_NUMBER (Bitfield-Mask: 0xffff) */ - -/* ----------------------------------- CAN_FDR ---------------------------------- */ -#define CAN_FDR_STEP_Pos (0UL) /*!< CAN FDR: STEP (Bit 0) */ -#define CAN_FDR_STEP_Msk (0x3ffUL) /*!< CAN FDR: STEP (Bitfield-Mask: 0x3ff) */ -#define CAN_FDR_DM_Pos (14UL) /*!< CAN FDR: DM (Bit 14) */ -#define CAN_FDR_DM_Msk (0xc000UL) /*!< CAN FDR: DM (Bitfield-Mask: 0x03) */ - -/* ---------------------------------- CAN_LIST ---------------------------------- */ -#define CAN_LIST_BEGIN_Pos (0UL) /*!< CAN LIST: BEGIN (Bit 0) */ -#define CAN_LIST_BEGIN_Msk (0xffUL) /*!< CAN LIST: BEGIN (Bitfield-Mask: 0xff) */ -#define CAN_LIST_END_Pos (8UL) /*!< CAN LIST: END (Bit 8) */ -#define CAN_LIST_END_Msk (0xff00UL) /*!< CAN LIST: END (Bitfield-Mask: 0xff) */ -#define CAN_LIST_SIZE_Pos (16UL) /*!< CAN LIST: SIZE (Bit 16) */ -#define CAN_LIST_SIZE_Msk (0xff0000UL) /*!< CAN LIST: SIZE (Bitfield-Mask: 0xff) */ -#define CAN_LIST_EMPTY_Pos (24UL) /*!< CAN LIST: EMPTY (Bit 24) */ -#define CAN_LIST_EMPTY_Msk (0x1000000UL) /*!< CAN LIST: EMPTY (Bitfield-Mask: 0x01) */ - -/* ---------------------------------- CAN_MSPND --------------------------------- */ -#define CAN_MSPND_PND_Pos (0UL) /*!< CAN MSPND: PND (Bit 0) */ -#define CAN_MSPND_PND_Msk (0xffffffffUL) /*!< CAN MSPND: PND (Bitfield-Mask: 0xffffffff) */ - -/* ---------------------------------- CAN_MSID ---------------------------------- */ -#define CAN_MSID_INDEX_Pos (0UL) /*!< CAN MSID: INDEX (Bit 0) */ -#define CAN_MSID_INDEX_Msk (0x3fUL) /*!< CAN MSID: INDEX (Bitfield-Mask: 0x3f) */ - -/* --------------------------------- CAN_MSIMASK -------------------------------- */ -#define CAN_MSIMASK_IM_Pos (0UL) /*!< CAN MSIMASK: IM (Bit 0) */ -#define CAN_MSIMASK_IM_Msk (0xffffffffUL) /*!< CAN MSIMASK: IM (Bitfield-Mask: 0xffffffff) */ - -/* --------------------------------- CAN_PANCTR --------------------------------- */ -#define CAN_PANCTR_PANCMD_Pos (0UL) /*!< CAN PANCTR: PANCMD (Bit 0) */ -#define CAN_PANCTR_PANCMD_Msk (0xffUL) /*!< CAN PANCTR: PANCMD (Bitfield-Mask: 0xff) */ -#define CAN_PANCTR_BUSY_Pos (8UL) /*!< CAN PANCTR: BUSY (Bit 8) */ -#define CAN_PANCTR_BUSY_Msk (0x100UL) /*!< CAN PANCTR: BUSY (Bitfield-Mask: 0x01) */ -#define CAN_PANCTR_RBUSY_Pos (9UL) /*!< CAN PANCTR: RBUSY (Bit 9) */ -#define CAN_PANCTR_RBUSY_Msk (0x200UL) /*!< CAN PANCTR: RBUSY (Bitfield-Mask: 0x01) */ -#define CAN_PANCTR_PANAR1_Pos (16UL) /*!< CAN PANCTR: PANAR1 (Bit 16) */ -#define CAN_PANCTR_PANAR1_Msk (0xff0000UL) /*!< CAN PANCTR: PANAR1 (Bitfield-Mask: 0xff) */ -#define CAN_PANCTR_PANAR2_Pos (24UL) /*!< CAN PANCTR: PANAR2 (Bit 24) */ -#define CAN_PANCTR_PANAR2_Msk (0xff000000UL) /*!< CAN PANCTR: PANAR2 (Bitfield-Mask: 0xff) */ - -/* ----------------------------------- CAN_MCR ---------------------------------- */ -#define CAN_MCR_CLKSEL_Pos (0UL) /*!< CAN MCR: CLKSEL (Bit 0) */ -#define CAN_MCR_CLKSEL_Msk (0xfUL) /*!< CAN MCR: CLKSEL (Bitfield-Mask: 0x0f) */ -#define CAN_MCR_MPSEL_Pos (12UL) /*!< CAN MCR: MPSEL (Bit 12) */ -#define CAN_MCR_MPSEL_Msk (0xf000UL) /*!< CAN MCR: MPSEL (Bitfield-Mask: 0x0f) */ - -/* ---------------------------------- CAN_MITR ---------------------------------- */ -#define CAN_MITR_IT_Pos (0UL) /*!< CAN MITR: IT (Bit 0) */ -#define CAN_MITR_IT_Msk (0xffUL) /*!< CAN MITR: IT (Bitfield-Mask: 0xff) */ - - -/* ================================================================================ */ -/* ================ Group 'CAN_NODE' Position & Mask ================ */ -/* ================================================================================ */ - - -/* -------------------------------- CAN_NODE_NCR -------------------------------- */ -#define CAN_NODE_NCR_INIT_Pos (0UL) /*!< CAN_NODE NCR: INIT (Bit 0) */ -#define CAN_NODE_NCR_INIT_Msk (0x1UL) /*!< CAN_NODE NCR: INIT (Bitfield-Mask: 0x01) */ -#define CAN_NODE_NCR_TRIE_Pos (1UL) /*!< CAN_NODE NCR: TRIE (Bit 1) */ -#define CAN_NODE_NCR_TRIE_Msk (0x2UL) /*!< CAN_NODE NCR: TRIE (Bitfield-Mask: 0x01) */ -#define CAN_NODE_NCR_LECIE_Pos (2UL) /*!< CAN_NODE NCR: LECIE (Bit 2) */ -#define CAN_NODE_NCR_LECIE_Msk (0x4UL) /*!< CAN_NODE NCR: LECIE (Bitfield-Mask: 0x01) */ -#define CAN_NODE_NCR_ALIE_Pos (3UL) /*!< CAN_NODE NCR: ALIE (Bit 3) */ -#define CAN_NODE_NCR_ALIE_Msk (0x8UL) /*!< CAN_NODE NCR: ALIE (Bitfield-Mask: 0x01) */ -#define CAN_NODE_NCR_CANDIS_Pos (4UL) /*!< CAN_NODE NCR: CANDIS (Bit 4) */ -#define CAN_NODE_NCR_CANDIS_Msk (0x10UL) /*!< CAN_NODE NCR: CANDIS (Bitfield-Mask: 0x01) */ -#define CAN_NODE_NCR_TXDIS_Pos (5UL) /*!< CAN_NODE NCR: TXDIS (Bit 5) */ -#define CAN_NODE_NCR_TXDIS_Msk (0x20UL) /*!< CAN_NODE NCR: TXDIS (Bitfield-Mask: 0x01) */ -#define CAN_NODE_NCR_CCE_Pos (6UL) /*!< CAN_NODE NCR: CCE (Bit 6) */ -#define CAN_NODE_NCR_CCE_Msk (0x40UL) /*!< CAN_NODE NCR: CCE (Bitfield-Mask: 0x01) */ -#define CAN_NODE_NCR_CALM_Pos (7UL) /*!< CAN_NODE NCR: CALM (Bit 7) */ -#define CAN_NODE_NCR_CALM_Msk (0x80UL) /*!< CAN_NODE NCR: CALM (Bitfield-Mask: 0x01) */ - -/* -------------------------------- CAN_NODE_NSR -------------------------------- */ -#define CAN_NODE_NSR_LEC_Pos (0UL) /*!< CAN_NODE NSR: LEC (Bit 0) */ -#define CAN_NODE_NSR_LEC_Msk (0x7UL) /*!< CAN_NODE NSR: LEC (Bitfield-Mask: 0x07) */ -#define CAN_NODE_NSR_TXOK_Pos (3UL) /*!< CAN_NODE NSR: TXOK (Bit 3) */ -#define CAN_NODE_NSR_TXOK_Msk (0x8UL) /*!< CAN_NODE NSR: TXOK (Bitfield-Mask: 0x01) */ -#define CAN_NODE_NSR_RXOK_Pos (4UL) /*!< CAN_NODE NSR: RXOK (Bit 4) */ -#define CAN_NODE_NSR_RXOK_Msk (0x10UL) /*!< CAN_NODE NSR: RXOK (Bitfield-Mask: 0x01) */ -#define CAN_NODE_NSR_ALERT_Pos (5UL) /*!< CAN_NODE NSR: ALERT (Bit 5) */ -#define CAN_NODE_NSR_ALERT_Msk (0x20UL) /*!< CAN_NODE NSR: ALERT (Bitfield-Mask: 0x01) */ -#define CAN_NODE_NSR_EWRN_Pos (6UL) /*!< CAN_NODE NSR: EWRN (Bit 6) */ -#define CAN_NODE_NSR_EWRN_Msk (0x40UL) /*!< CAN_NODE NSR: EWRN (Bitfield-Mask: 0x01) */ -#define CAN_NODE_NSR_BOFF_Pos (7UL) /*!< CAN_NODE NSR: BOFF (Bit 7) */ -#define CAN_NODE_NSR_BOFF_Msk (0x80UL) /*!< CAN_NODE NSR: BOFF (Bitfield-Mask: 0x01) */ -#define CAN_NODE_NSR_LLE_Pos (8UL) /*!< CAN_NODE NSR: LLE (Bit 8) */ -#define CAN_NODE_NSR_LLE_Msk (0x100UL) /*!< CAN_NODE NSR: LLE (Bitfield-Mask: 0x01) */ -#define CAN_NODE_NSR_LOE_Pos (9UL) /*!< CAN_NODE NSR: LOE (Bit 9) */ -#define CAN_NODE_NSR_LOE_Msk (0x200UL) /*!< CAN_NODE NSR: LOE (Bitfield-Mask: 0x01) */ - -/* -------------------------------- CAN_NODE_NIPR ------------------------------- */ -#define CAN_NODE_NIPR_ALINP_Pos (0UL) /*!< CAN_NODE NIPR: ALINP (Bit 0) */ -#define CAN_NODE_NIPR_ALINP_Msk (0xfUL) /*!< CAN_NODE NIPR: ALINP (Bitfield-Mask: 0x0f) */ -#define CAN_NODE_NIPR_LECINP_Pos (4UL) /*!< CAN_NODE NIPR: LECINP (Bit 4) */ -#define CAN_NODE_NIPR_LECINP_Msk (0xf0UL) /*!< CAN_NODE NIPR: LECINP (Bitfield-Mask: 0x0f) */ -#define CAN_NODE_NIPR_TRINP_Pos (8UL) /*!< CAN_NODE NIPR: TRINP (Bit 8) */ -#define CAN_NODE_NIPR_TRINP_Msk (0xf00UL) /*!< CAN_NODE NIPR: TRINP (Bitfield-Mask: 0x0f) */ -#define CAN_NODE_NIPR_CFCINP_Pos (12UL) /*!< CAN_NODE NIPR: CFCINP (Bit 12) */ -#define CAN_NODE_NIPR_CFCINP_Msk (0xf000UL) /*!< CAN_NODE NIPR: CFCINP (Bitfield-Mask: 0x0f) */ - -/* -------------------------------- CAN_NODE_NPCR ------------------------------- */ -#define CAN_NODE_NPCR_RXSEL_Pos (0UL) /*!< CAN_NODE NPCR: RXSEL (Bit 0) */ -#define CAN_NODE_NPCR_RXSEL_Msk (0x7UL) /*!< CAN_NODE NPCR: RXSEL (Bitfield-Mask: 0x07) */ -#define CAN_NODE_NPCR_LBM_Pos (8UL) /*!< CAN_NODE NPCR: LBM (Bit 8) */ -#define CAN_NODE_NPCR_LBM_Msk (0x100UL) /*!< CAN_NODE NPCR: LBM (Bitfield-Mask: 0x01) */ - -/* -------------------------------- CAN_NODE_NBTR ------------------------------- */ -#define CAN_NODE_NBTR_BRP_Pos (0UL) /*!< CAN_NODE NBTR: BRP (Bit 0) */ -#define CAN_NODE_NBTR_BRP_Msk (0x3fUL) /*!< CAN_NODE NBTR: BRP (Bitfield-Mask: 0x3f) */ -#define CAN_NODE_NBTR_SJW_Pos (6UL) /*!< CAN_NODE NBTR: SJW (Bit 6) */ -#define CAN_NODE_NBTR_SJW_Msk (0xc0UL) /*!< CAN_NODE NBTR: SJW (Bitfield-Mask: 0x03) */ -#define CAN_NODE_NBTR_TSEG1_Pos (8UL) /*!< CAN_NODE NBTR: TSEG1 (Bit 8) */ -#define CAN_NODE_NBTR_TSEG1_Msk (0xf00UL) /*!< CAN_NODE NBTR: TSEG1 (Bitfield-Mask: 0x0f) */ -#define CAN_NODE_NBTR_TSEG2_Pos (12UL) /*!< CAN_NODE NBTR: TSEG2 (Bit 12) */ -#define CAN_NODE_NBTR_TSEG2_Msk (0x7000UL) /*!< CAN_NODE NBTR: TSEG2 (Bitfield-Mask: 0x07) */ -#define CAN_NODE_NBTR_DIV8_Pos (15UL) /*!< CAN_NODE NBTR: DIV8 (Bit 15) */ -#define CAN_NODE_NBTR_DIV8_Msk (0x8000UL) /*!< CAN_NODE NBTR: DIV8 (Bitfield-Mask: 0x01) */ - -/* ------------------------------- CAN_NODE_NECNT ------------------------------- */ -#define CAN_NODE_NECNT_REC_Pos (0UL) /*!< CAN_NODE NECNT: REC (Bit 0) */ -#define CAN_NODE_NECNT_REC_Msk (0xffUL) /*!< CAN_NODE NECNT: REC (Bitfield-Mask: 0xff) */ -#define CAN_NODE_NECNT_TEC_Pos (8UL) /*!< CAN_NODE NECNT: TEC (Bit 8) */ -#define CAN_NODE_NECNT_TEC_Msk (0xff00UL) /*!< CAN_NODE NECNT: TEC (Bitfield-Mask: 0xff) */ -#define CAN_NODE_NECNT_EWRNLVL_Pos (16UL) /*!< CAN_NODE NECNT: EWRNLVL (Bit 16) */ -#define CAN_NODE_NECNT_EWRNLVL_Msk (0xff0000UL) /*!< CAN_NODE NECNT: EWRNLVL (Bitfield-Mask: 0xff) */ -#define CAN_NODE_NECNT_LETD_Pos (24UL) /*!< CAN_NODE NECNT: LETD (Bit 24) */ -#define CAN_NODE_NECNT_LETD_Msk (0x1000000UL) /*!< CAN_NODE NECNT: LETD (Bitfield-Mask: 0x01) */ -#define CAN_NODE_NECNT_LEINC_Pos (25UL) /*!< CAN_NODE NECNT: LEINC (Bit 25) */ -#define CAN_NODE_NECNT_LEINC_Msk (0x2000000UL) /*!< CAN_NODE NECNT: LEINC (Bitfield-Mask: 0x01) */ - -/* -------------------------------- CAN_NODE_NFCR ------------------------------- */ -#define CAN_NODE_NFCR_CFC_Pos (0UL) /*!< CAN_NODE NFCR: CFC (Bit 0) */ -#define CAN_NODE_NFCR_CFC_Msk (0xffffUL) /*!< CAN_NODE NFCR: CFC (Bitfield-Mask: 0xffff) */ -#define CAN_NODE_NFCR_CFSEL_Pos (16UL) /*!< CAN_NODE NFCR: CFSEL (Bit 16) */ -#define CAN_NODE_NFCR_CFSEL_Msk (0x70000UL) /*!< CAN_NODE NFCR: CFSEL (Bitfield-Mask: 0x07) */ -#define CAN_NODE_NFCR_CFMOD_Pos (19UL) /*!< CAN_NODE NFCR: CFMOD (Bit 19) */ -#define CAN_NODE_NFCR_CFMOD_Msk (0x180000UL) /*!< CAN_NODE NFCR: CFMOD (Bitfield-Mask: 0x03) */ -#define CAN_NODE_NFCR_CFCIE_Pos (22UL) /*!< CAN_NODE NFCR: CFCIE (Bit 22) */ -#define CAN_NODE_NFCR_CFCIE_Msk (0x400000UL) /*!< CAN_NODE NFCR: CFCIE (Bitfield-Mask: 0x01) */ -#define CAN_NODE_NFCR_CFCOV_Pos (23UL) /*!< CAN_NODE NFCR: CFCOV (Bit 23) */ -#define CAN_NODE_NFCR_CFCOV_Msk (0x800000UL) /*!< CAN_NODE NFCR: CFCOV (Bitfield-Mask: 0x01) */ - - -/* ================================================================================ */ -/* ================ Cluster Group 'CAN_MO' Position & Mask ================ */ -/* ================================================================================ */ - - -/* -------------------------------- CAN_MO_MOFCR -------------------------------- */ -#define CAN_MO_MOFCR_MMC_Pos (0UL) /*!< CAN_MO MOFCR: MMC (Bit 0) */ -#define CAN_MO_MOFCR_MMC_Msk (0xfUL) /*!< CAN_MO MOFCR: MMC (Bitfield-Mask: 0x0f) */ -#define CAN_MO_MOFCR_RXTOE_Pos (4UL) /*!< CAN_MO MOFCR: RXTOE (Bit 4) */ -#define CAN_MO_MOFCR_RXTOE_Msk (0x10UL) /*!< CAN_MO MOFCR: RXTOE (Bitfield-Mask: 0x01) */ -#define CAN_MO_MOFCR_GDFS_Pos (8UL) /*!< CAN_MO MOFCR: GDFS (Bit 8) */ -#define CAN_MO_MOFCR_GDFS_Msk (0x100UL) /*!< CAN_MO MOFCR: GDFS (Bitfield-Mask: 0x01) */ -#define CAN_MO_MOFCR_IDC_Pos (9UL) /*!< CAN_MO MOFCR: IDC (Bit 9) */ -#define CAN_MO_MOFCR_IDC_Msk (0x200UL) /*!< CAN_MO MOFCR: IDC (Bitfield-Mask: 0x01) */ -#define CAN_MO_MOFCR_DLCC_Pos (10UL) /*!< CAN_MO MOFCR: DLCC (Bit 10) */ -#define CAN_MO_MOFCR_DLCC_Msk (0x400UL) /*!< CAN_MO MOFCR: DLCC (Bitfield-Mask: 0x01) */ -#define CAN_MO_MOFCR_DATC_Pos (11UL) /*!< CAN_MO MOFCR: DATC (Bit 11) */ -#define CAN_MO_MOFCR_DATC_Msk (0x800UL) /*!< CAN_MO MOFCR: DATC (Bitfield-Mask: 0x01) */ -#define CAN_MO_MOFCR_RXIE_Pos (16UL) /*!< CAN_MO MOFCR: RXIE (Bit 16) */ -#define CAN_MO_MOFCR_RXIE_Msk (0x10000UL) /*!< CAN_MO MOFCR: RXIE (Bitfield-Mask: 0x01) */ -#define CAN_MO_MOFCR_TXIE_Pos (17UL) /*!< CAN_MO MOFCR: TXIE (Bit 17) */ -#define CAN_MO_MOFCR_TXIE_Msk (0x20000UL) /*!< CAN_MO MOFCR: TXIE (Bitfield-Mask: 0x01) */ -#define CAN_MO_MOFCR_OVIE_Pos (18UL) /*!< CAN_MO MOFCR: OVIE (Bit 18) */ -#define CAN_MO_MOFCR_OVIE_Msk (0x40000UL) /*!< CAN_MO MOFCR: OVIE (Bitfield-Mask: 0x01) */ -#define CAN_MO_MOFCR_FRREN_Pos (20UL) /*!< CAN_MO MOFCR: FRREN (Bit 20) */ -#define CAN_MO_MOFCR_FRREN_Msk (0x100000UL) /*!< CAN_MO MOFCR: FRREN (Bitfield-Mask: 0x01) */ -#define CAN_MO_MOFCR_RMM_Pos (21UL) /*!< CAN_MO MOFCR: RMM (Bit 21) */ -#define CAN_MO_MOFCR_RMM_Msk (0x200000UL) /*!< CAN_MO MOFCR: RMM (Bitfield-Mask: 0x01) */ -#define CAN_MO_MOFCR_SDT_Pos (22UL) /*!< CAN_MO MOFCR: SDT (Bit 22) */ -#define CAN_MO_MOFCR_SDT_Msk (0x400000UL) /*!< CAN_MO MOFCR: SDT (Bitfield-Mask: 0x01) */ -#define CAN_MO_MOFCR_STT_Pos (23UL) /*!< CAN_MO MOFCR: STT (Bit 23) */ -#define CAN_MO_MOFCR_STT_Msk (0x800000UL) /*!< CAN_MO MOFCR: STT (Bitfield-Mask: 0x01) */ -#define CAN_MO_MOFCR_DLC_Pos (24UL) /*!< CAN_MO MOFCR: DLC (Bit 24) */ -#define CAN_MO_MOFCR_DLC_Msk (0xf000000UL) /*!< CAN_MO MOFCR: DLC (Bitfield-Mask: 0x0f) */ - -/* -------------------------------- CAN_MO_MOFGPR ------------------------------- */ -#define CAN_MO_MOFGPR_BOT_Pos (0UL) /*!< CAN_MO MOFGPR: BOT (Bit 0) */ -#define CAN_MO_MOFGPR_BOT_Msk (0xffUL) /*!< CAN_MO MOFGPR: BOT (Bitfield-Mask: 0xff) */ -#define CAN_MO_MOFGPR_TOP_Pos (8UL) /*!< CAN_MO MOFGPR: TOP (Bit 8) */ -#define CAN_MO_MOFGPR_TOP_Msk (0xff00UL) /*!< CAN_MO MOFGPR: TOP (Bitfield-Mask: 0xff) */ -#define CAN_MO_MOFGPR_CUR_Pos (16UL) /*!< CAN_MO MOFGPR: CUR (Bit 16) */ -#define CAN_MO_MOFGPR_CUR_Msk (0xff0000UL) /*!< CAN_MO MOFGPR: CUR (Bitfield-Mask: 0xff) */ -#define CAN_MO_MOFGPR_SEL_Pos (24UL) /*!< CAN_MO MOFGPR: SEL (Bit 24) */ -#define CAN_MO_MOFGPR_SEL_Msk (0xff000000UL) /*!< CAN_MO MOFGPR: SEL (Bitfield-Mask: 0xff) */ - -/* -------------------------------- CAN_MO_MOIPR -------------------------------- */ -#define CAN_MO_MOIPR_RXINP_Pos (0UL) /*!< CAN_MO MOIPR: RXINP (Bit 0) */ -#define CAN_MO_MOIPR_RXINP_Msk (0xfUL) /*!< CAN_MO MOIPR: RXINP (Bitfield-Mask: 0x0f) */ -#define CAN_MO_MOIPR_TXINP_Pos (4UL) /*!< CAN_MO MOIPR: TXINP (Bit 4) */ -#define CAN_MO_MOIPR_TXINP_Msk (0xf0UL) /*!< CAN_MO MOIPR: TXINP (Bitfield-Mask: 0x0f) */ -#define CAN_MO_MOIPR_MPN_Pos (8UL) /*!< CAN_MO MOIPR: MPN (Bit 8) */ -#define CAN_MO_MOIPR_MPN_Msk (0xff00UL) /*!< CAN_MO MOIPR: MPN (Bitfield-Mask: 0xff) */ -#define CAN_MO_MOIPR_CFCVAL_Pos (16UL) /*!< CAN_MO MOIPR: CFCVAL (Bit 16) */ -#define CAN_MO_MOIPR_CFCVAL_Msk (0xffff0000UL) /*!< CAN_MO MOIPR: CFCVAL (Bitfield-Mask: 0xffff) */ - -/* -------------------------------- CAN_MO_MOAMR -------------------------------- */ -#define CAN_MO_MOAMR_AM_Pos (0UL) /*!< CAN_MO MOAMR: AM (Bit 0) */ -#define CAN_MO_MOAMR_AM_Msk (0x1fffffffUL) /*!< CAN_MO MOAMR: AM (Bitfield-Mask: 0x1fffffff) */ -#define CAN_MO_MOAMR_MIDE_Pos (29UL) /*!< CAN_MO MOAMR: MIDE (Bit 29) */ -#define CAN_MO_MOAMR_MIDE_Msk (0x20000000UL) /*!< CAN_MO MOAMR: MIDE (Bitfield-Mask: 0x01) */ - -/* ------------------------------- CAN_MO_MODATAL ------------------------------- */ -#define CAN_MO_MODATAL_DB0_Pos (0UL) /*!< CAN_MO MODATAL: DB0 (Bit 0) */ -#define CAN_MO_MODATAL_DB0_Msk (0xffUL) /*!< CAN_MO MODATAL: DB0 (Bitfield-Mask: 0xff) */ -#define CAN_MO_MODATAL_DB1_Pos (8UL) /*!< CAN_MO MODATAL: DB1 (Bit 8) */ -#define CAN_MO_MODATAL_DB1_Msk (0xff00UL) /*!< CAN_MO MODATAL: DB1 (Bitfield-Mask: 0xff) */ -#define CAN_MO_MODATAL_DB2_Pos (16UL) /*!< CAN_MO MODATAL: DB2 (Bit 16) */ -#define CAN_MO_MODATAL_DB2_Msk (0xff0000UL) /*!< CAN_MO MODATAL: DB2 (Bitfield-Mask: 0xff) */ -#define CAN_MO_MODATAL_DB3_Pos (24UL) /*!< CAN_MO MODATAL: DB3 (Bit 24) */ -#define CAN_MO_MODATAL_DB3_Msk (0xff000000UL) /*!< CAN_MO MODATAL: DB3 (Bitfield-Mask: 0xff) */ - -/* ------------------------------- CAN_MO_MODATAH ------------------------------- */ -#define CAN_MO_MODATAH_DB4_Pos (0UL) /*!< CAN_MO MODATAH: DB4 (Bit 0) */ -#define CAN_MO_MODATAH_DB4_Msk (0xffUL) /*!< CAN_MO MODATAH: DB4 (Bitfield-Mask: 0xff) */ -#define CAN_MO_MODATAH_DB5_Pos (8UL) /*!< CAN_MO MODATAH: DB5 (Bit 8) */ -#define CAN_MO_MODATAH_DB5_Msk (0xff00UL) /*!< CAN_MO MODATAH: DB5 (Bitfield-Mask: 0xff) */ -#define CAN_MO_MODATAH_DB6_Pos (16UL) /*!< CAN_MO MODATAH: DB6 (Bit 16) */ -#define CAN_MO_MODATAH_DB6_Msk (0xff0000UL) /*!< CAN_MO MODATAH: DB6 (Bitfield-Mask: 0xff) */ -#define CAN_MO_MODATAH_DB7_Pos (24UL) /*!< CAN_MO MODATAH: DB7 (Bit 24) */ -#define CAN_MO_MODATAH_DB7_Msk (0xff000000UL) /*!< CAN_MO MODATAH: DB7 (Bitfield-Mask: 0xff) */ - -/* --------------------------------- CAN_MO_MOAR -------------------------------- */ -#define CAN_MO_MOAR_ID_Pos (0UL) /*!< CAN_MO MOAR: ID (Bit 0) */ -#define CAN_MO_MOAR_ID_Msk (0x1fffffffUL) /*!< CAN_MO MOAR: ID (Bitfield-Mask: 0x1fffffff) */ -#define CAN_MO_MOAR_IDE_Pos (29UL) /*!< CAN_MO MOAR: IDE (Bit 29) */ -#define CAN_MO_MOAR_IDE_Msk (0x20000000UL) /*!< CAN_MO MOAR: IDE (Bitfield-Mask: 0x01) */ -#define CAN_MO_MOAR_PRI_Pos (30UL) /*!< CAN_MO MOAR: PRI (Bit 30) */ -#define CAN_MO_MOAR_PRI_Msk (0xc0000000UL) /*!< CAN_MO MOAR: PRI (Bitfield-Mask: 0x03) */ - -/* -------------------------------- CAN_MO_MOCTR -------------------------------- */ -#define CAN_MO_MOCTR_RESRXPND_Pos (0UL) /*!< CAN_MO MOCTR: RESRXPND (Bit 0) */ -#define CAN_MO_MOCTR_RESRXPND_Msk (0x1UL) /*!< CAN_MO MOCTR: RESRXPND (Bitfield-Mask: 0x01) */ -#define CAN_MO_MOCTR_RESTXPND_Pos (1UL) /*!< CAN_MO MOCTR: RESTXPND (Bit 1) */ -#define CAN_MO_MOCTR_RESTXPND_Msk (0x2UL) /*!< CAN_MO MOCTR: RESTXPND (Bitfield-Mask: 0x01) */ -#define CAN_MO_MOCTR_RESRXUPD_Pos (2UL) /*!< CAN_MO MOCTR: RESRXUPD (Bit 2) */ -#define CAN_MO_MOCTR_RESRXUPD_Msk (0x4UL) /*!< CAN_MO MOCTR: RESRXUPD (Bitfield-Mask: 0x01) */ -#define CAN_MO_MOCTR_RESNEWDAT_Pos (3UL) /*!< CAN_MO MOCTR: RESNEWDAT (Bit 3) */ -#define CAN_MO_MOCTR_RESNEWDAT_Msk (0x8UL) /*!< CAN_MO MOCTR: RESNEWDAT (Bitfield-Mask: 0x01) */ -#define CAN_MO_MOCTR_RESMSGLST_Pos (4UL) /*!< CAN_MO MOCTR: RESMSGLST (Bit 4) */ -#define CAN_MO_MOCTR_RESMSGLST_Msk (0x10UL) /*!< CAN_MO MOCTR: RESMSGLST (Bitfield-Mask: 0x01) */ -#define CAN_MO_MOCTR_RESMSGVAL_Pos (5UL) /*!< CAN_MO MOCTR: RESMSGVAL (Bit 5) */ -#define CAN_MO_MOCTR_RESMSGVAL_Msk (0x20UL) /*!< CAN_MO MOCTR: RESMSGVAL (Bitfield-Mask: 0x01) */ -#define CAN_MO_MOCTR_RESRTSEL_Pos (6UL) /*!< CAN_MO MOCTR: RESRTSEL (Bit 6) */ -#define CAN_MO_MOCTR_RESRTSEL_Msk (0x40UL) /*!< CAN_MO MOCTR: RESRTSEL (Bitfield-Mask: 0x01) */ -#define CAN_MO_MOCTR_RESRXEN_Pos (7UL) /*!< CAN_MO MOCTR: RESRXEN (Bit 7) */ -#define CAN_MO_MOCTR_RESRXEN_Msk (0x80UL) /*!< CAN_MO MOCTR: RESRXEN (Bitfield-Mask: 0x01) */ -#define CAN_MO_MOCTR_RESTXRQ_Pos (8UL) /*!< CAN_MO MOCTR: RESTXRQ (Bit 8) */ -#define CAN_MO_MOCTR_RESTXRQ_Msk (0x100UL) /*!< CAN_MO MOCTR: RESTXRQ (Bitfield-Mask: 0x01) */ -#define CAN_MO_MOCTR_RESTXEN0_Pos (9UL) /*!< CAN_MO MOCTR: RESTXEN0 (Bit 9) */ -#define CAN_MO_MOCTR_RESTXEN0_Msk (0x200UL) /*!< CAN_MO MOCTR: RESTXEN0 (Bitfield-Mask: 0x01) */ -#define CAN_MO_MOCTR_RESTXEN1_Pos (10UL) /*!< CAN_MO MOCTR: RESTXEN1 (Bit 10) */ -#define CAN_MO_MOCTR_RESTXEN1_Msk (0x400UL) /*!< CAN_MO MOCTR: RESTXEN1 (Bitfield-Mask: 0x01) */ -#define CAN_MO_MOCTR_RESDIR_Pos (11UL) /*!< CAN_MO MOCTR: RESDIR (Bit 11) */ -#define CAN_MO_MOCTR_RESDIR_Msk (0x800UL) /*!< CAN_MO MOCTR: RESDIR (Bitfield-Mask: 0x01) */ -#define CAN_MO_MOCTR_SETRXPND_Pos (16UL) /*!< CAN_MO MOCTR: SETRXPND (Bit 16) */ -#define CAN_MO_MOCTR_SETRXPND_Msk (0x10000UL) /*!< CAN_MO MOCTR: SETRXPND (Bitfield-Mask: 0x01) */ -#define CAN_MO_MOCTR_SETTXPND_Pos (17UL) /*!< CAN_MO MOCTR: SETTXPND (Bit 17) */ -#define CAN_MO_MOCTR_SETTXPND_Msk (0x20000UL) /*!< CAN_MO MOCTR: SETTXPND (Bitfield-Mask: 0x01) */ -#define CAN_MO_MOCTR_SETRXUPD_Pos (18UL) /*!< CAN_MO MOCTR: SETRXUPD (Bit 18) */ -#define CAN_MO_MOCTR_SETRXUPD_Msk (0x40000UL) /*!< CAN_MO MOCTR: SETRXUPD (Bitfield-Mask: 0x01) */ -#define CAN_MO_MOCTR_SETNEWDAT_Pos (19UL) /*!< CAN_MO MOCTR: SETNEWDAT (Bit 19) */ -#define CAN_MO_MOCTR_SETNEWDAT_Msk (0x80000UL) /*!< CAN_MO MOCTR: SETNEWDAT (Bitfield-Mask: 0x01) */ -#define CAN_MO_MOCTR_SETMSGLST_Pos (20UL) /*!< CAN_MO MOCTR: SETMSGLST (Bit 20) */ -#define CAN_MO_MOCTR_SETMSGLST_Msk (0x100000UL) /*!< CAN_MO MOCTR: SETMSGLST (Bitfield-Mask: 0x01) */ -#define CAN_MO_MOCTR_SETMSGVAL_Pos (21UL) /*!< CAN_MO MOCTR: SETMSGVAL (Bit 21) */ -#define CAN_MO_MOCTR_SETMSGVAL_Msk (0x200000UL) /*!< CAN_MO MOCTR: SETMSGVAL (Bitfield-Mask: 0x01) */ -#define CAN_MO_MOCTR_SETRTSEL_Pos (22UL) /*!< CAN_MO MOCTR: SETRTSEL (Bit 22) */ -#define CAN_MO_MOCTR_SETRTSEL_Msk (0x400000UL) /*!< CAN_MO MOCTR: SETRTSEL (Bitfield-Mask: 0x01) */ -#define CAN_MO_MOCTR_SETRXEN_Pos (23UL) /*!< CAN_MO MOCTR: SETRXEN (Bit 23) */ -#define CAN_MO_MOCTR_SETRXEN_Msk (0x800000UL) /*!< CAN_MO MOCTR: SETRXEN (Bitfield-Mask: 0x01) */ -#define CAN_MO_MOCTR_SETTXRQ_Pos (24UL) /*!< CAN_MO MOCTR: SETTXRQ (Bit 24) */ -#define CAN_MO_MOCTR_SETTXRQ_Msk (0x1000000UL) /*!< CAN_MO MOCTR: SETTXRQ (Bitfield-Mask: 0x01) */ -#define CAN_MO_MOCTR_SETTXEN0_Pos (25UL) /*!< CAN_MO MOCTR: SETTXEN0 (Bit 25) */ -#define CAN_MO_MOCTR_SETTXEN0_Msk (0x2000000UL) /*!< CAN_MO MOCTR: SETTXEN0 (Bitfield-Mask: 0x01) */ -#define CAN_MO_MOCTR_SETTXEN1_Pos (26UL) /*!< CAN_MO MOCTR: SETTXEN1 (Bit 26) */ -#define CAN_MO_MOCTR_SETTXEN1_Msk (0x4000000UL) /*!< CAN_MO MOCTR: SETTXEN1 (Bitfield-Mask: 0x01) */ -#define CAN_MO_MOCTR_SETDIR_Pos (27UL) /*!< CAN_MO MOCTR: SETDIR (Bit 27) */ -#define CAN_MO_MOCTR_SETDIR_Msk (0x8000000UL) /*!< CAN_MO MOCTR: SETDIR (Bitfield-Mask: 0x01) */ - -/* -------------------------------- CAN_MO_MOSTAT ------------------------------- */ -#define CAN_MO_MOSTAT_RXPND_Pos (0UL) /*!< CAN_MO MOSTAT: RXPND (Bit 0) */ -#define CAN_MO_MOSTAT_RXPND_Msk (0x1UL) /*!< CAN_MO MOSTAT: RXPND (Bitfield-Mask: 0x01) */ -#define CAN_MO_MOSTAT_TXPND_Pos (1UL) /*!< CAN_MO MOSTAT: TXPND (Bit 1) */ -#define CAN_MO_MOSTAT_TXPND_Msk (0x2UL) /*!< CAN_MO MOSTAT: TXPND (Bitfield-Mask: 0x01) */ -#define CAN_MO_MOSTAT_RXUPD_Pos (2UL) /*!< CAN_MO MOSTAT: RXUPD (Bit 2) */ -#define CAN_MO_MOSTAT_RXUPD_Msk (0x4UL) /*!< CAN_MO MOSTAT: RXUPD (Bitfield-Mask: 0x01) */ -#define CAN_MO_MOSTAT_NEWDAT_Pos (3UL) /*!< CAN_MO MOSTAT: NEWDAT (Bit 3) */ -#define CAN_MO_MOSTAT_NEWDAT_Msk (0x8UL) /*!< CAN_MO MOSTAT: NEWDAT (Bitfield-Mask: 0x01) */ -#define CAN_MO_MOSTAT_MSGLST_Pos (4UL) /*!< CAN_MO MOSTAT: MSGLST (Bit 4) */ -#define CAN_MO_MOSTAT_MSGLST_Msk (0x10UL) /*!< CAN_MO MOSTAT: MSGLST (Bitfield-Mask: 0x01) */ -#define CAN_MO_MOSTAT_MSGVAL_Pos (5UL) /*!< CAN_MO MOSTAT: MSGVAL (Bit 5) */ -#define CAN_MO_MOSTAT_MSGVAL_Msk (0x20UL) /*!< CAN_MO MOSTAT: MSGVAL (Bitfield-Mask: 0x01) */ -#define CAN_MO_MOSTAT_RTSEL_Pos (6UL) /*!< CAN_MO MOSTAT: RTSEL (Bit 6) */ -#define CAN_MO_MOSTAT_RTSEL_Msk (0x40UL) /*!< CAN_MO MOSTAT: RTSEL (Bitfield-Mask: 0x01) */ -#define CAN_MO_MOSTAT_RXEN_Pos (7UL) /*!< CAN_MO MOSTAT: RXEN (Bit 7) */ -#define CAN_MO_MOSTAT_RXEN_Msk (0x80UL) /*!< CAN_MO MOSTAT: RXEN (Bitfield-Mask: 0x01) */ -#define CAN_MO_MOSTAT_TXRQ_Pos (8UL) /*!< CAN_MO MOSTAT: TXRQ (Bit 8) */ -#define CAN_MO_MOSTAT_TXRQ_Msk (0x100UL) /*!< CAN_MO MOSTAT: TXRQ (Bitfield-Mask: 0x01) */ -#define CAN_MO_MOSTAT_TXEN0_Pos (9UL) /*!< CAN_MO MOSTAT: TXEN0 (Bit 9) */ -#define CAN_MO_MOSTAT_TXEN0_Msk (0x200UL) /*!< CAN_MO MOSTAT: TXEN0 (Bitfield-Mask: 0x01) */ -#define CAN_MO_MOSTAT_TXEN1_Pos (10UL) /*!< CAN_MO MOSTAT: TXEN1 (Bit 10) */ -#define CAN_MO_MOSTAT_TXEN1_Msk (0x400UL) /*!< CAN_MO MOSTAT: TXEN1 (Bitfield-Mask: 0x01) */ -#define CAN_MO_MOSTAT_DIR_Pos (11UL) /*!< CAN_MO MOSTAT: DIR (Bit 11) */ -#define CAN_MO_MOSTAT_DIR_Msk (0x800UL) /*!< CAN_MO MOSTAT: DIR (Bitfield-Mask: 0x01) */ -#define CAN_MO_MOSTAT_LIST_Pos (12UL) /*!< CAN_MO MOSTAT: LIST (Bit 12) */ -#define CAN_MO_MOSTAT_LIST_Msk (0xf000UL) /*!< CAN_MO MOSTAT: LIST (Bitfield-Mask: 0x0f) */ -#define CAN_MO_MOSTAT_PPREV_Pos (16UL) /*!< CAN_MO MOSTAT: PPREV (Bit 16) */ -#define CAN_MO_MOSTAT_PPREV_Msk (0xff0000UL) /*!< CAN_MO MOSTAT: PPREV (Bitfield-Mask: 0xff) */ -#define CAN_MO_MOSTAT_PNEXT_Pos (24UL) /*!< CAN_MO MOSTAT: PNEXT (Bit 24) */ -#define CAN_MO_MOSTAT_PNEXT_Msk (0xff000000UL) /*!< CAN_MO MOSTAT: PNEXT (Bitfield-Mask: 0xff) */ - - -/* ================================================================================ */ -/* ================ struct 'VADC' Position & Mask ================ */ -/* ================================================================================ */ - - -/* ---------------------------------- VADC_CLC ---------------------------------- */ -#define VADC_CLC_DISR_Pos (0UL) /*!< VADC CLC: DISR (Bit 0) */ -#define VADC_CLC_DISR_Msk (0x1UL) /*!< VADC CLC: DISR (Bitfield-Mask: 0x01) */ -#define VADC_CLC_DISS_Pos (1UL) /*!< VADC CLC: DISS (Bit 1) */ -#define VADC_CLC_DISS_Msk (0x2UL) /*!< VADC CLC: DISS (Bitfield-Mask: 0x01) */ -#define VADC_CLC_EDIS_Pos (3UL) /*!< VADC CLC: EDIS (Bit 3) */ -#define VADC_CLC_EDIS_Msk (0x8UL) /*!< VADC CLC: EDIS (Bitfield-Mask: 0x01) */ - -/* ----------------------------------- VADC_ID ---------------------------------- */ -#define VADC_ID_MOD_REV_Pos (0UL) /*!< VADC ID: MOD_REV (Bit 0) */ -#define VADC_ID_MOD_REV_Msk (0xffUL) /*!< VADC ID: MOD_REV (Bitfield-Mask: 0xff) */ -#define VADC_ID_MOD_TYPE_Pos (8UL) /*!< VADC ID: MOD_TYPE (Bit 8) */ -#define VADC_ID_MOD_TYPE_Msk (0xff00UL) /*!< VADC ID: MOD_TYPE (Bitfield-Mask: 0xff) */ -#define VADC_ID_MOD_NUMBER_Pos (16UL) /*!< VADC ID: MOD_NUMBER (Bit 16) */ -#define VADC_ID_MOD_NUMBER_Msk (0xffff0000UL) /*!< VADC ID: MOD_NUMBER (Bitfield-Mask: 0xffff) */ - -/* ---------------------------------- VADC_OCS ---------------------------------- */ -#define VADC_OCS_TGS_Pos (0UL) /*!< VADC OCS: TGS (Bit 0) */ -#define VADC_OCS_TGS_Msk (0x3UL) /*!< VADC OCS: TGS (Bitfield-Mask: 0x03) */ -#define VADC_OCS_TGB_Pos (2UL) /*!< VADC OCS: TGB (Bit 2) */ -#define VADC_OCS_TGB_Msk (0x4UL) /*!< VADC OCS: TGB (Bitfield-Mask: 0x01) */ -#define VADC_OCS_TG_P_Pos (3UL) /*!< VADC OCS: TG_P (Bit 3) */ -#define VADC_OCS_TG_P_Msk (0x8UL) /*!< VADC OCS: TG_P (Bitfield-Mask: 0x01) */ -#define VADC_OCS_SUS_Pos (24UL) /*!< VADC OCS: SUS (Bit 24) */ -#define VADC_OCS_SUS_Msk (0xf000000UL) /*!< VADC OCS: SUS (Bitfield-Mask: 0x0f) */ -#define VADC_OCS_SUS_P_Pos (28UL) /*!< VADC OCS: SUS_P (Bit 28) */ -#define VADC_OCS_SUS_P_Msk (0x10000000UL) /*!< VADC OCS: SUS_P (Bitfield-Mask: 0x01) */ -#define VADC_OCS_SUSSTA_Pos (29UL) /*!< VADC OCS: SUSSTA (Bit 29) */ -#define VADC_OCS_SUSSTA_Msk (0x20000000UL) /*!< VADC OCS: SUSSTA (Bitfield-Mask: 0x01) */ - -/* -------------------------------- VADC_GLOBCFG -------------------------------- */ -#define VADC_GLOBCFG_DIVA_Pos (0UL) /*!< VADC GLOBCFG: DIVA (Bit 0) */ -#define VADC_GLOBCFG_DIVA_Msk (0x1fUL) /*!< VADC GLOBCFG: DIVA (Bitfield-Mask: 0x1f) */ -#define VADC_GLOBCFG_DCMSB_Pos (7UL) /*!< VADC GLOBCFG: DCMSB (Bit 7) */ -#define VADC_GLOBCFG_DCMSB_Msk (0x80UL) /*!< VADC GLOBCFG: DCMSB (Bitfield-Mask: 0x01) */ -#define VADC_GLOBCFG_DIVD_Pos (8UL) /*!< VADC GLOBCFG: DIVD (Bit 8) */ -#define VADC_GLOBCFG_DIVD_Msk (0x300UL) /*!< VADC GLOBCFG: DIVD (Bitfield-Mask: 0x03) */ -#define VADC_GLOBCFG_DIVWC_Pos (15UL) /*!< VADC GLOBCFG: DIVWC (Bit 15) */ -#define VADC_GLOBCFG_DIVWC_Msk (0x8000UL) /*!< VADC GLOBCFG: DIVWC (Bitfield-Mask: 0x01) */ -#define VADC_GLOBCFG_DPCAL0_Pos (16UL) /*!< VADC GLOBCFG: DPCAL0 (Bit 16) */ -#define VADC_GLOBCFG_DPCAL0_Msk (0x10000UL) /*!< VADC GLOBCFG: DPCAL0 (Bitfield-Mask: 0x01) */ -#define VADC_GLOBCFG_DPCAL1_Pos (17UL) /*!< VADC GLOBCFG: DPCAL1 (Bit 17) */ -#define VADC_GLOBCFG_DPCAL1_Msk (0x20000UL) /*!< VADC GLOBCFG: DPCAL1 (Bitfield-Mask: 0x01) */ -#define VADC_GLOBCFG_DPCAL2_Pos (18UL) /*!< VADC GLOBCFG: DPCAL2 (Bit 18) */ -#define VADC_GLOBCFG_DPCAL2_Msk (0x40000UL) /*!< VADC GLOBCFG: DPCAL2 (Bitfield-Mask: 0x01) */ -#define VADC_GLOBCFG_DPCAL3_Pos (19UL) /*!< VADC GLOBCFG: DPCAL3 (Bit 19) */ -#define VADC_GLOBCFG_DPCAL3_Msk (0x80000UL) /*!< VADC GLOBCFG: DPCAL3 (Bitfield-Mask: 0x01) */ -#define VADC_GLOBCFG_SUCAL_Pos (31UL) /*!< VADC GLOBCFG: SUCAL (Bit 31) */ -#define VADC_GLOBCFG_SUCAL_Msk (0x80000000UL) /*!< VADC GLOBCFG: SUCAL (Bitfield-Mask: 0x01) */ - -/* ------------------------------- VADC_GLOBICLASS ------------------------------ */ -#define VADC_GLOBICLASS_STCS_Pos (0UL) /*!< VADC GLOBICLASS: STCS (Bit 0) */ -#define VADC_GLOBICLASS_STCS_Msk (0x1fUL) /*!< VADC GLOBICLASS: STCS (Bitfield-Mask: 0x1f) */ -#define VADC_GLOBICLASS_CMS_Pos (8UL) /*!< VADC GLOBICLASS: CMS (Bit 8) */ -#define VADC_GLOBICLASS_CMS_Msk (0x700UL) /*!< VADC GLOBICLASS: CMS (Bitfield-Mask: 0x07) */ -#define VADC_GLOBICLASS_STCE_Pos (16UL) /*!< VADC GLOBICLASS: STCE (Bit 16) */ -#define VADC_GLOBICLASS_STCE_Msk (0x1f0000UL) /*!< VADC GLOBICLASS: STCE (Bitfield-Mask: 0x1f) */ -#define VADC_GLOBICLASS_CME_Pos (24UL) /*!< VADC GLOBICLASS: CME (Bit 24) */ -#define VADC_GLOBICLASS_CME_Msk (0x7000000UL) /*!< VADC GLOBICLASS: CME (Bitfield-Mask: 0x07) */ - -/* ------------------------------- VADC_GLOBBOUND ------------------------------- */ -#define VADC_GLOBBOUND_BOUNDARY0_Pos (0UL) /*!< VADC GLOBBOUND: BOUNDARY0 (Bit 0) */ -#define VADC_GLOBBOUND_BOUNDARY0_Msk (0xfffUL) /*!< VADC GLOBBOUND: BOUNDARY0 (Bitfield-Mask: 0xfff) */ -#define VADC_GLOBBOUND_BOUNDARY1_Pos (16UL) /*!< VADC GLOBBOUND: BOUNDARY1 (Bit 16) */ -#define VADC_GLOBBOUND_BOUNDARY1_Msk (0xfff0000UL) /*!< VADC GLOBBOUND: BOUNDARY1 (Bitfield-Mask: 0xfff) */ - -/* ------------------------------- VADC_GLOBEFLAG ------------------------------- */ -#define VADC_GLOBEFLAG_SEVGLB_Pos (0UL) /*!< VADC GLOBEFLAG: SEVGLB (Bit 0) */ -#define VADC_GLOBEFLAG_SEVGLB_Msk (0x1UL) /*!< VADC GLOBEFLAG: SEVGLB (Bitfield-Mask: 0x01) */ -#define VADC_GLOBEFLAG_REVGLB_Pos (8UL) /*!< VADC GLOBEFLAG: REVGLB (Bit 8) */ -#define VADC_GLOBEFLAG_REVGLB_Msk (0x100UL) /*!< VADC GLOBEFLAG: REVGLB (Bitfield-Mask: 0x01) */ -#define VADC_GLOBEFLAG_SEVGLBCLR_Pos (16UL) /*!< VADC GLOBEFLAG: SEVGLBCLR (Bit 16) */ -#define VADC_GLOBEFLAG_SEVGLBCLR_Msk (0x10000UL) /*!< VADC GLOBEFLAG: SEVGLBCLR (Bitfield-Mask: 0x01) */ -#define VADC_GLOBEFLAG_REVGLBCLR_Pos (24UL) /*!< VADC GLOBEFLAG: REVGLBCLR (Bit 24) */ -#define VADC_GLOBEFLAG_REVGLBCLR_Msk (0x1000000UL) /*!< VADC GLOBEFLAG: REVGLBCLR (Bitfield-Mask: 0x01) */ - -/* -------------------------------- VADC_GLOBEVNP ------------------------------- */ -#define VADC_GLOBEVNP_SEV0NP_Pos (0UL) /*!< VADC GLOBEVNP: SEV0NP (Bit 0) */ -#define VADC_GLOBEVNP_SEV0NP_Msk (0xfUL) /*!< VADC GLOBEVNP: SEV0NP (Bitfield-Mask: 0x0f) */ -#define VADC_GLOBEVNP_REV0NP_Pos (16UL) /*!< VADC GLOBEVNP: REV0NP (Bit 16) */ -#define VADC_GLOBEVNP_REV0NP_Msk (0xf0000UL) /*!< VADC GLOBEVNP: REV0NP (Bitfield-Mask: 0x0f) */ - -/* --------------------------------- VADC_GLOBTF -------------------------------- */ -#define VADC_GLOBTF_CDGR_Pos (4UL) /*!< VADC GLOBTF: CDGR (Bit 4) */ -#define VADC_GLOBTF_CDGR_Msk (0xf0UL) /*!< VADC GLOBTF: CDGR (Bitfield-Mask: 0x0f) */ -#define VADC_GLOBTF_CDEN_Pos (8UL) /*!< VADC GLOBTF: CDEN (Bit 8) */ -#define VADC_GLOBTF_CDEN_Msk (0x100UL) /*!< VADC GLOBTF: CDEN (Bitfield-Mask: 0x01) */ -#define VADC_GLOBTF_CDSEL_Pos (9UL) /*!< VADC GLOBTF: CDSEL (Bit 9) */ -#define VADC_GLOBTF_CDSEL_Msk (0x600UL) /*!< VADC GLOBTF: CDSEL (Bitfield-Mask: 0x03) */ -#define VADC_GLOBTF_CDWC_Pos (15UL) /*!< VADC GLOBTF: CDWC (Bit 15) */ -#define VADC_GLOBTF_CDWC_Msk (0x8000UL) /*!< VADC GLOBTF: CDWC (Bitfield-Mask: 0x01) */ -#define VADC_GLOBTF_PDD_Pos (16UL) /*!< VADC GLOBTF: PDD (Bit 16) */ -#define VADC_GLOBTF_PDD_Msk (0x10000UL) /*!< VADC GLOBTF: PDD (Bitfield-Mask: 0x01) */ -#define VADC_GLOBTF_MDWC_Pos (23UL) /*!< VADC GLOBTF: MDWC (Bit 23) */ -#define VADC_GLOBTF_MDWC_Msk (0x800000UL) /*!< VADC GLOBTF: MDWC (Bitfield-Mask: 0x01) */ - -/* --------------------------------- VADC_BRSSEL -------------------------------- */ -#define VADC_BRSSEL_CHSELG0_Pos (0UL) /*!< VADC BRSSEL: CHSELG0 (Bit 0) */ -#define VADC_BRSSEL_CHSELG0_Msk (0x1UL) /*!< VADC BRSSEL: CHSELG0 (Bitfield-Mask: 0x01) */ -#define VADC_BRSSEL_CHSELG1_Pos (1UL) /*!< VADC BRSSEL: CHSELG1 (Bit 1) */ -#define VADC_BRSSEL_CHSELG1_Msk (0x2UL) /*!< VADC BRSSEL: CHSELG1 (Bitfield-Mask: 0x01) */ -#define VADC_BRSSEL_CHSELG2_Pos (2UL) /*!< VADC BRSSEL: CHSELG2 (Bit 2) */ -#define VADC_BRSSEL_CHSELG2_Msk (0x4UL) /*!< VADC BRSSEL: CHSELG2 (Bitfield-Mask: 0x01) */ -#define VADC_BRSSEL_CHSELG3_Pos (3UL) /*!< VADC BRSSEL: CHSELG3 (Bit 3) */ -#define VADC_BRSSEL_CHSELG3_Msk (0x8UL) /*!< VADC BRSSEL: CHSELG3 (Bitfield-Mask: 0x01) */ -#define VADC_BRSSEL_CHSELG4_Pos (4UL) /*!< VADC BRSSEL: CHSELG4 (Bit 4) */ -#define VADC_BRSSEL_CHSELG4_Msk (0x10UL) /*!< VADC BRSSEL: CHSELG4 (Bitfield-Mask: 0x01) */ -#define VADC_BRSSEL_CHSELG5_Pos (5UL) /*!< VADC BRSSEL: CHSELG5 (Bit 5) */ -#define VADC_BRSSEL_CHSELG5_Msk (0x20UL) /*!< VADC BRSSEL: CHSELG5 (Bitfield-Mask: 0x01) */ -#define VADC_BRSSEL_CHSELG6_Pos (6UL) /*!< VADC BRSSEL: CHSELG6 (Bit 6) */ -#define VADC_BRSSEL_CHSELG6_Msk (0x40UL) /*!< VADC BRSSEL: CHSELG6 (Bitfield-Mask: 0x01) */ -#define VADC_BRSSEL_CHSELG7_Pos (7UL) /*!< VADC BRSSEL: CHSELG7 (Bit 7) */ -#define VADC_BRSSEL_CHSELG7_Msk (0x80UL) /*!< VADC BRSSEL: CHSELG7 (Bitfield-Mask: 0x01) */ - -/* --------------------------------- VADC_BRSPND -------------------------------- */ -#define VADC_BRSPND_CHPNDG0_Pos (0UL) /*!< VADC BRSPND: CHPNDG0 (Bit 0) */ -#define VADC_BRSPND_CHPNDG0_Msk (0x1UL) /*!< VADC BRSPND: CHPNDG0 (Bitfield-Mask: 0x01) */ -#define VADC_BRSPND_CHPNDG1_Pos (1UL) /*!< VADC BRSPND: CHPNDG1 (Bit 1) */ -#define VADC_BRSPND_CHPNDG1_Msk (0x2UL) /*!< VADC BRSPND: CHPNDG1 (Bitfield-Mask: 0x01) */ -#define VADC_BRSPND_CHPNDG2_Pos (2UL) /*!< VADC BRSPND: CHPNDG2 (Bit 2) */ -#define VADC_BRSPND_CHPNDG2_Msk (0x4UL) /*!< VADC BRSPND: CHPNDG2 (Bitfield-Mask: 0x01) */ -#define VADC_BRSPND_CHPNDG3_Pos (3UL) /*!< VADC BRSPND: CHPNDG3 (Bit 3) */ -#define VADC_BRSPND_CHPNDG3_Msk (0x8UL) /*!< VADC BRSPND: CHPNDG3 (Bitfield-Mask: 0x01) */ -#define VADC_BRSPND_CHPNDG4_Pos (4UL) /*!< VADC BRSPND: CHPNDG4 (Bit 4) */ -#define VADC_BRSPND_CHPNDG4_Msk (0x10UL) /*!< VADC BRSPND: CHPNDG4 (Bitfield-Mask: 0x01) */ -#define VADC_BRSPND_CHPNDG5_Pos (5UL) /*!< VADC BRSPND: CHPNDG5 (Bit 5) */ -#define VADC_BRSPND_CHPNDG5_Msk (0x20UL) /*!< VADC BRSPND: CHPNDG5 (Bitfield-Mask: 0x01) */ -#define VADC_BRSPND_CHPNDG6_Pos (6UL) /*!< VADC BRSPND: CHPNDG6 (Bit 6) */ -#define VADC_BRSPND_CHPNDG6_Msk (0x40UL) /*!< VADC BRSPND: CHPNDG6 (Bitfield-Mask: 0x01) */ -#define VADC_BRSPND_CHPNDG7_Pos (7UL) /*!< VADC BRSPND: CHPNDG7 (Bit 7) */ -#define VADC_BRSPND_CHPNDG7_Msk (0x80UL) /*!< VADC BRSPND: CHPNDG7 (Bitfield-Mask: 0x01) */ - -/* -------------------------------- VADC_BRSCTRL -------------------------------- */ -#define VADC_BRSCTRL_SRCRESREG_Pos (0UL) /*!< VADC BRSCTRL: SRCRESREG (Bit 0) */ -#define VADC_BRSCTRL_SRCRESREG_Msk (0xfUL) /*!< VADC BRSCTRL: SRCRESREG (Bitfield-Mask: 0x0f) */ -#define VADC_BRSCTRL_XTSEL_Pos (8UL) /*!< VADC BRSCTRL: XTSEL (Bit 8) */ -#define VADC_BRSCTRL_XTSEL_Msk (0xf00UL) /*!< VADC BRSCTRL: XTSEL (Bitfield-Mask: 0x0f) */ -#define VADC_BRSCTRL_XTLVL_Pos (12UL) /*!< VADC BRSCTRL: XTLVL (Bit 12) */ -#define VADC_BRSCTRL_XTLVL_Msk (0x1000UL) /*!< VADC BRSCTRL: XTLVL (Bitfield-Mask: 0x01) */ -#define VADC_BRSCTRL_XTMODE_Pos (13UL) /*!< VADC BRSCTRL: XTMODE (Bit 13) */ -#define VADC_BRSCTRL_XTMODE_Msk (0x6000UL) /*!< VADC BRSCTRL: XTMODE (Bitfield-Mask: 0x03) */ -#define VADC_BRSCTRL_XTWC_Pos (15UL) /*!< VADC BRSCTRL: XTWC (Bit 15) */ -#define VADC_BRSCTRL_XTWC_Msk (0x8000UL) /*!< VADC BRSCTRL: XTWC (Bitfield-Mask: 0x01) */ -#define VADC_BRSCTRL_GTSEL_Pos (16UL) /*!< VADC BRSCTRL: GTSEL (Bit 16) */ -#define VADC_BRSCTRL_GTSEL_Msk (0xf0000UL) /*!< VADC BRSCTRL: GTSEL (Bitfield-Mask: 0x0f) */ -#define VADC_BRSCTRL_GTLVL_Pos (20UL) /*!< VADC BRSCTRL: GTLVL (Bit 20) */ -#define VADC_BRSCTRL_GTLVL_Msk (0x100000UL) /*!< VADC BRSCTRL: GTLVL (Bitfield-Mask: 0x01) */ -#define VADC_BRSCTRL_GTWC_Pos (23UL) /*!< VADC BRSCTRL: GTWC (Bit 23) */ -#define VADC_BRSCTRL_GTWC_Msk (0x800000UL) /*!< VADC BRSCTRL: GTWC (Bitfield-Mask: 0x01) */ - -/* --------------------------------- VADC_BRSMR --------------------------------- */ -#define VADC_BRSMR_ENGT_Pos (0UL) /*!< VADC BRSMR: ENGT (Bit 0) */ -#define VADC_BRSMR_ENGT_Msk (0x3UL) /*!< VADC BRSMR: ENGT (Bitfield-Mask: 0x03) */ -#define VADC_BRSMR_ENTR_Pos (2UL) /*!< VADC BRSMR: ENTR (Bit 2) */ -#define VADC_BRSMR_ENTR_Msk (0x4UL) /*!< VADC BRSMR: ENTR (Bitfield-Mask: 0x01) */ -#define VADC_BRSMR_ENSI_Pos (3UL) /*!< VADC BRSMR: ENSI (Bit 3) */ -#define VADC_BRSMR_ENSI_Msk (0x8UL) /*!< VADC BRSMR: ENSI (Bitfield-Mask: 0x01) */ -#define VADC_BRSMR_SCAN_Pos (4UL) /*!< VADC BRSMR: SCAN (Bit 4) */ -#define VADC_BRSMR_SCAN_Msk (0x10UL) /*!< VADC BRSMR: SCAN (Bitfield-Mask: 0x01) */ -#define VADC_BRSMR_LDM_Pos (5UL) /*!< VADC BRSMR: LDM (Bit 5) */ -#define VADC_BRSMR_LDM_Msk (0x20UL) /*!< VADC BRSMR: LDM (Bitfield-Mask: 0x01) */ -#define VADC_BRSMR_REQGT_Pos (7UL) /*!< VADC BRSMR: REQGT (Bit 7) */ -#define VADC_BRSMR_REQGT_Msk (0x80UL) /*!< VADC BRSMR: REQGT (Bitfield-Mask: 0x01) */ -#define VADC_BRSMR_CLRPND_Pos (8UL) /*!< VADC BRSMR: CLRPND (Bit 8) */ -#define VADC_BRSMR_CLRPND_Msk (0x100UL) /*!< VADC BRSMR: CLRPND (Bitfield-Mask: 0x01) */ -#define VADC_BRSMR_LDEV_Pos (9UL) /*!< VADC BRSMR: LDEV (Bit 9) */ -#define VADC_BRSMR_LDEV_Msk (0x200UL) /*!< VADC BRSMR: LDEV (Bitfield-Mask: 0x01) */ -#define VADC_BRSMR_RPTDIS_Pos (16UL) /*!< VADC BRSMR: RPTDIS (Bit 16) */ -#define VADC_BRSMR_RPTDIS_Msk (0x10000UL) /*!< VADC BRSMR: RPTDIS (Bitfield-Mask: 0x01) */ - -/* -------------------------------- VADC_GLOBRCR -------------------------------- */ -#define VADC_GLOBRCR_DRCTR_Pos (16UL) /*!< VADC GLOBRCR: DRCTR (Bit 16) */ -#define VADC_GLOBRCR_DRCTR_Msk (0xf0000UL) /*!< VADC GLOBRCR: DRCTR (Bitfield-Mask: 0x0f) */ -#define VADC_GLOBRCR_WFR_Pos (24UL) /*!< VADC GLOBRCR: WFR (Bit 24) */ -#define VADC_GLOBRCR_WFR_Msk (0x1000000UL) /*!< VADC GLOBRCR: WFR (Bitfield-Mask: 0x01) */ -#define VADC_GLOBRCR_SRGEN_Pos (31UL) /*!< VADC GLOBRCR: SRGEN (Bit 31) */ -#define VADC_GLOBRCR_SRGEN_Msk (0x80000000UL) /*!< VADC GLOBRCR: SRGEN (Bitfield-Mask: 0x01) */ - -/* -------------------------------- VADC_GLOBRES -------------------------------- */ -#define VADC_GLOBRES_RESULT_Pos (0UL) /*!< VADC GLOBRES: RESULT (Bit 0) */ -#define VADC_GLOBRES_RESULT_Msk (0xffffUL) /*!< VADC GLOBRES: RESULT (Bitfield-Mask: 0xffff) */ -#define VADC_GLOBRES_GNR_Pos (16UL) /*!< VADC GLOBRES: GNR (Bit 16) */ -#define VADC_GLOBRES_GNR_Msk (0xf0000UL) /*!< VADC GLOBRES: GNR (Bitfield-Mask: 0x0f) */ -#define VADC_GLOBRES_CHNR_Pos (20UL) /*!< VADC GLOBRES: CHNR (Bit 20) */ -#define VADC_GLOBRES_CHNR_Msk (0x1f00000UL) /*!< VADC GLOBRES: CHNR (Bitfield-Mask: 0x1f) */ -#define VADC_GLOBRES_EMUX_Pos (25UL) /*!< VADC GLOBRES: EMUX (Bit 25) */ -#define VADC_GLOBRES_EMUX_Msk (0xe000000UL) /*!< VADC GLOBRES: EMUX (Bitfield-Mask: 0x07) */ -#define VADC_GLOBRES_CRS_Pos (28UL) /*!< VADC GLOBRES: CRS (Bit 28) */ -#define VADC_GLOBRES_CRS_Msk (0x30000000UL) /*!< VADC GLOBRES: CRS (Bitfield-Mask: 0x03) */ -#define VADC_GLOBRES_FCR_Pos (30UL) /*!< VADC GLOBRES: FCR (Bit 30) */ -#define VADC_GLOBRES_FCR_Msk (0x40000000UL) /*!< VADC GLOBRES: FCR (Bitfield-Mask: 0x01) */ -#define VADC_GLOBRES_VF_Pos (31UL) /*!< VADC GLOBRES: VF (Bit 31) */ -#define VADC_GLOBRES_VF_Msk (0x80000000UL) /*!< VADC GLOBRES: VF (Bitfield-Mask: 0x01) */ - -/* -------------------------------- VADC_GLOBRESD ------------------------------- */ -#define VADC_GLOBRESD_RESULT_Pos (0UL) /*!< VADC GLOBRESD: RESULT (Bit 0) */ -#define VADC_GLOBRESD_RESULT_Msk (0xffffUL) /*!< VADC GLOBRESD: RESULT (Bitfield-Mask: 0xffff) */ -#define VADC_GLOBRESD_GNR_Pos (16UL) /*!< VADC GLOBRESD: GNR (Bit 16) */ -#define VADC_GLOBRESD_GNR_Msk (0xf0000UL) /*!< VADC GLOBRESD: GNR (Bitfield-Mask: 0x0f) */ -#define VADC_GLOBRESD_CHNR_Pos (20UL) /*!< VADC GLOBRESD: CHNR (Bit 20) */ -#define VADC_GLOBRESD_CHNR_Msk (0x1f00000UL) /*!< VADC GLOBRESD: CHNR (Bitfield-Mask: 0x1f) */ -#define VADC_GLOBRESD_EMUX_Pos (25UL) /*!< VADC GLOBRESD: EMUX (Bit 25) */ -#define VADC_GLOBRESD_EMUX_Msk (0xe000000UL) /*!< VADC GLOBRESD: EMUX (Bitfield-Mask: 0x07) */ -#define VADC_GLOBRESD_CRS_Pos (28UL) /*!< VADC GLOBRESD: CRS (Bit 28) */ -#define VADC_GLOBRESD_CRS_Msk (0x30000000UL) /*!< VADC GLOBRESD: CRS (Bitfield-Mask: 0x03) */ -#define VADC_GLOBRESD_FCR_Pos (30UL) /*!< VADC GLOBRESD: FCR (Bit 30) */ -#define VADC_GLOBRESD_FCR_Msk (0x40000000UL) /*!< VADC GLOBRESD: FCR (Bitfield-Mask: 0x01) */ -#define VADC_GLOBRESD_VF_Pos (31UL) /*!< VADC GLOBRESD: VF (Bit 31) */ -#define VADC_GLOBRESD_VF_Msk (0x80000000UL) /*!< VADC GLOBRESD: VF (Bitfield-Mask: 0x01) */ - -/* -------------------------------- VADC_EMUXSEL -------------------------------- */ -#define VADC_EMUXSEL_EMUXGRP0_Pos (0UL) /*!< VADC EMUXSEL: EMUXGRP0 (Bit 0) */ -#define VADC_EMUXSEL_EMUXGRP0_Msk (0xfUL) /*!< VADC EMUXSEL: EMUXGRP0 (Bitfield-Mask: 0x0f) */ -#define VADC_EMUXSEL_EMUXGRP1_Pos (4UL) /*!< VADC EMUXSEL: EMUXGRP1 (Bit 4) */ -#define VADC_EMUXSEL_EMUXGRP1_Msk (0xf0UL) /*!< VADC EMUXSEL: EMUXGRP1 (Bitfield-Mask: 0x0f) */ - - -/* ================================================================================ */ -/* ================ Group 'VADC_G' Position & Mask ================ */ -/* ================================================================================ */ - - -/* -------------------------------- VADC_G_ARBCFG ------------------------------- */ -#define VADC_G_ARBCFG_ANONC_Pos (0UL) /*!< VADC_G ARBCFG: ANONC (Bit 0) */ -#define VADC_G_ARBCFG_ANONC_Msk (0x3UL) /*!< VADC_G ARBCFG: ANONC (Bitfield-Mask: 0x03) */ -#define VADC_G_ARBCFG_ARBRND_Pos (4UL) /*!< VADC_G ARBCFG: ARBRND (Bit 4) */ -#define VADC_G_ARBCFG_ARBRND_Msk (0x30UL) /*!< VADC_G ARBCFG: ARBRND (Bitfield-Mask: 0x03) */ -#define VADC_G_ARBCFG_ARBM_Pos (7UL) /*!< VADC_G ARBCFG: ARBM (Bit 7) */ -#define VADC_G_ARBCFG_ARBM_Msk (0x80UL) /*!< VADC_G ARBCFG: ARBM (Bitfield-Mask: 0x01) */ -#define VADC_G_ARBCFG_ANONS_Pos (16UL) /*!< VADC_G ARBCFG: ANONS (Bit 16) */ -#define VADC_G_ARBCFG_ANONS_Msk (0x30000UL) /*!< VADC_G ARBCFG: ANONS (Bitfield-Mask: 0x03) */ -#define VADC_G_ARBCFG_CAL_Pos (28UL) /*!< VADC_G ARBCFG: CAL (Bit 28) */ -#define VADC_G_ARBCFG_CAL_Msk (0x10000000UL) /*!< VADC_G ARBCFG: CAL (Bitfield-Mask: 0x01) */ -#define VADC_G_ARBCFG_BUSY_Pos (30UL) /*!< VADC_G ARBCFG: BUSY (Bit 30) */ -#define VADC_G_ARBCFG_BUSY_Msk (0x40000000UL) /*!< VADC_G ARBCFG: BUSY (Bitfield-Mask: 0x01) */ -#define VADC_G_ARBCFG_SAMPLE_Pos (31UL) /*!< VADC_G ARBCFG: SAMPLE (Bit 31) */ -#define VADC_G_ARBCFG_SAMPLE_Msk (0x80000000UL) /*!< VADC_G ARBCFG: SAMPLE (Bitfield-Mask: 0x01) */ - -/* -------------------------------- VADC_G_ARBPR -------------------------------- */ -#define VADC_G_ARBPR_PRIO0_Pos (0UL) /*!< VADC_G ARBPR: PRIO0 (Bit 0) */ -#define VADC_G_ARBPR_PRIO0_Msk (0x3UL) /*!< VADC_G ARBPR: PRIO0 (Bitfield-Mask: 0x03) */ -#define VADC_G_ARBPR_CSM0_Pos (3UL) /*!< VADC_G ARBPR: CSM0 (Bit 3) */ -#define VADC_G_ARBPR_CSM0_Msk (0x8UL) /*!< VADC_G ARBPR: CSM0 (Bitfield-Mask: 0x01) */ -#define VADC_G_ARBPR_PRIO1_Pos (4UL) /*!< VADC_G ARBPR: PRIO1 (Bit 4) */ -#define VADC_G_ARBPR_PRIO1_Msk (0x30UL) /*!< VADC_G ARBPR: PRIO1 (Bitfield-Mask: 0x03) */ -#define VADC_G_ARBPR_CSM1_Pos (7UL) /*!< VADC_G ARBPR: CSM1 (Bit 7) */ -#define VADC_G_ARBPR_CSM1_Msk (0x80UL) /*!< VADC_G ARBPR: CSM1 (Bitfield-Mask: 0x01) */ -#define VADC_G_ARBPR_PRIO2_Pos (8UL) /*!< VADC_G ARBPR: PRIO2 (Bit 8) */ -#define VADC_G_ARBPR_PRIO2_Msk (0x300UL) /*!< VADC_G ARBPR: PRIO2 (Bitfield-Mask: 0x03) */ -#define VADC_G_ARBPR_CSM2_Pos (11UL) /*!< VADC_G ARBPR: CSM2 (Bit 11) */ -#define VADC_G_ARBPR_CSM2_Msk (0x800UL) /*!< VADC_G ARBPR: CSM2 (Bitfield-Mask: 0x01) */ -#define VADC_G_ARBPR_ASEN0_Pos (24UL) /*!< VADC_G ARBPR: ASEN0 (Bit 24) */ -#define VADC_G_ARBPR_ASEN0_Msk (0x1000000UL) /*!< VADC_G ARBPR: ASEN0 (Bitfield-Mask: 0x01) */ -#define VADC_G_ARBPR_ASEN1_Pos (25UL) /*!< VADC_G ARBPR: ASEN1 (Bit 25) */ -#define VADC_G_ARBPR_ASEN1_Msk (0x2000000UL) /*!< VADC_G ARBPR: ASEN1 (Bitfield-Mask: 0x01) */ -#define VADC_G_ARBPR_ASEN2_Pos (26UL) /*!< VADC_G ARBPR: ASEN2 (Bit 26) */ -#define VADC_G_ARBPR_ASEN2_Msk (0x4000000UL) /*!< VADC_G ARBPR: ASEN2 (Bitfield-Mask: 0x01) */ - -/* -------------------------------- VADC_G_CHASS -------------------------------- */ -#define VADC_G_CHASS_ASSCH0_Pos (0UL) /*!< VADC_G CHASS: ASSCH0 (Bit 0) */ -#define VADC_G_CHASS_ASSCH0_Msk (0x1UL) /*!< VADC_G CHASS: ASSCH0 (Bitfield-Mask: 0x01) */ -#define VADC_G_CHASS_ASSCH1_Pos (1UL) /*!< VADC_G CHASS: ASSCH1 (Bit 1) */ -#define VADC_G_CHASS_ASSCH1_Msk (0x2UL) /*!< VADC_G CHASS: ASSCH1 (Bitfield-Mask: 0x01) */ -#define VADC_G_CHASS_ASSCH2_Pos (2UL) /*!< VADC_G CHASS: ASSCH2 (Bit 2) */ -#define VADC_G_CHASS_ASSCH2_Msk (0x4UL) /*!< VADC_G CHASS: ASSCH2 (Bitfield-Mask: 0x01) */ -#define VADC_G_CHASS_ASSCH3_Pos (3UL) /*!< VADC_G CHASS: ASSCH3 (Bit 3) */ -#define VADC_G_CHASS_ASSCH3_Msk (0x8UL) /*!< VADC_G CHASS: ASSCH3 (Bitfield-Mask: 0x01) */ -#define VADC_G_CHASS_ASSCH4_Pos (4UL) /*!< VADC_G CHASS: ASSCH4 (Bit 4) */ -#define VADC_G_CHASS_ASSCH4_Msk (0x10UL) /*!< VADC_G CHASS: ASSCH4 (Bitfield-Mask: 0x01) */ -#define VADC_G_CHASS_ASSCH5_Pos (5UL) /*!< VADC_G CHASS: ASSCH5 (Bit 5) */ -#define VADC_G_CHASS_ASSCH5_Msk (0x20UL) /*!< VADC_G CHASS: ASSCH5 (Bitfield-Mask: 0x01) */ -#define VADC_G_CHASS_ASSCH6_Pos (6UL) /*!< VADC_G CHASS: ASSCH6 (Bit 6) */ -#define VADC_G_CHASS_ASSCH6_Msk (0x40UL) /*!< VADC_G CHASS: ASSCH6 (Bitfield-Mask: 0x01) */ -#define VADC_G_CHASS_ASSCH7_Pos (7UL) /*!< VADC_G CHASS: ASSCH7 (Bit 7) */ -#define VADC_G_CHASS_ASSCH7_Msk (0x80UL) /*!< VADC_G CHASS: ASSCH7 (Bitfield-Mask: 0x01) */ - -/* -------------------------------- VADC_G_ICLASS ------------------------------- */ -#define VADC_G_ICLASS_STCS_Pos (0UL) /*!< VADC_G ICLASS: STCS (Bit 0) */ -#define VADC_G_ICLASS_STCS_Msk (0x1fUL) /*!< VADC_G ICLASS: STCS (Bitfield-Mask: 0x1f) */ -#define VADC_G_ICLASS_CMS_Pos (8UL) /*!< VADC_G ICLASS: CMS (Bit 8) */ -#define VADC_G_ICLASS_CMS_Msk (0x700UL) /*!< VADC_G ICLASS: CMS (Bitfield-Mask: 0x07) */ -#define VADC_G_ICLASS_STCE_Pos (16UL) /*!< VADC_G ICLASS: STCE (Bit 16) */ -#define VADC_G_ICLASS_STCE_Msk (0x1f0000UL) /*!< VADC_G ICLASS: STCE (Bitfield-Mask: 0x1f) */ -#define VADC_G_ICLASS_CME_Pos (24UL) /*!< VADC_G ICLASS: CME (Bit 24) */ -#define VADC_G_ICLASS_CME_Msk (0x7000000UL) /*!< VADC_G ICLASS: CME (Bitfield-Mask: 0x07) */ - -/* -------------------------------- VADC_G_ALIAS -------------------------------- */ -#define VADC_G_ALIAS_ALIAS0_Pos (0UL) /*!< VADC_G ALIAS: ALIAS0 (Bit 0) */ -#define VADC_G_ALIAS_ALIAS0_Msk (0x1fUL) /*!< VADC_G ALIAS: ALIAS0 (Bitfield-Mask: 0x1f) */ -#define VADC_G_ALIAS_ALIAS1_Pos (8UL) /*!< VADC_G ALIAS: ALIAS1 (Bit 8) */ -#define VADC_G_ALIAS_ALIAS1_Msk (0x1f00UL) /*!< VADC_G ALIAS: ALIAS1 (Bitfield-Mask: 0x1f) */ - -/* -------------------------------- VADC_G_BOUND -------------------------------- */ -#define VADC_G_BOUND_BOUNDARY0_Pos (0UL) /*!< VADC_G BOUND: BOUNDARY0 (Bit 0) */ -#define VADC_G_BOUND_BOUNDARY0_Msk (0xfffUL) /*!< VADC_G BOUND: BOUNDARY0 (Bitfield-Mask: 0xfff) */ -#define VADC_G_BOUND_BOUNDARY1_Pos (16UL) /*!< VADC_G BOUND: BOUNDARY1 (Bit 16) */ -#define VADC_G_BOUND_BOUNDARY1_Msk (0xfff0000UL) /*!< VADC_G BOUND: BOUNDARY1 (Bitfield-Mask: 0xfff) */ - -/* -------------------------------- VADC_G_SYNCTR ------------------------------- */ -#define VADC_G_SYNCTR_STSEL_Pos (0UL) /*!< VADC_G SYNCTR: STSEL (Bit 0) */ -#define VADC_G_SYNCTR_STSEL_Msk (0x3UL) /*!< VADC_G SYNCTR: STSEL (Bitfield-Mask: 0x03) */ -#define VADC_G_SYNCTR_EVALR1_Pos (4UL) /*!< VADC_G SYNCTR: EVALR1 (Bit 4) */ -#define VADC_G_SYNCTR_EVALR1_Msk (0x10UL) /*!< VADC_G SYNCTR: EVALR1 (Bitfield-Mask: 0x01) */ -#define VADC_G_SYNCTR_EVALR2_Pos (5UL) /*!< VADC_G SYNCTR: EVALR2 (Bit 5) */ -#define VADC_G_SYNCTR_EVALR2_Msk (0x20UL) /*!< VADC_G SYNCTR: EVALR2 (Bitfield-Mask: 0x01) */ -#define VADC_G_SYNCTR_EVALR3_Pos (6UL) /*!< VADC_G SYNCTR: EVALR3 (Bit 6) */ -#define VADC_G_SYNCTR_EVALR3_Msk (0x40UL) /*!< VADC_G SYNCTR: EVALR3 (Bitfield-Mask: 0x01) */ - -/* --------------------------------- VADC_G_BFL --------------------------------- */ -#define VADC_G_BFL_BFL0_Pos (0UL) /*!< VADC_G BFL: BFL0 (Bit 0) */ -#define VADC_G_BFL_BFL0_Msk (0x1UL) /*!< VADC_G BFL: BFL0 (Bitfield-Mask: 0x01) */ -#define VADC_G_BFL_BFL1_Pos (1UL) /*!< VADC_G BFL: BFL1 (Bit 1) */ -#define VADC_G_BFL_BFL1_Msk (0x2UL) /*!< VADC_G BFL: BFL1 (Bitfield-Mask: 0x01) */ -#define VADC_G_BFL_BFL2_Pos (2UL) /*!< VADC_G BFL: BFL2 (Bit 2) */ -#define VADC_G_BFL_BFL2_Msk (0x4UL) /*!< VADC_G BFL: BFL2 (Bitfield-Mask: 0x01) */ -#define VADC_G_BFL_BFL3_Pos (3UL) /*!< VADC_G BFL: BFL3 (Bit 3) */ -#define VADC_G_BFL_BFL3_Msk (0x8UL) /*!< VADC_G BFL: BFL3 (Bitfield-Mask: 0x01) */ -#define VADC_G_BFL_BFA0_Pos (8UL) /*!< VADC_G BFL: BFA0 (Bit 8) */ -#define VADC_G_BFL_BFA0_Msk (0x100UL) /*!< VADC_G BFL: BFA0 (Bitfield-Mask: 0x01) */ -#define VADC_G_BFL_BFA1_Pos (9UL) /*!< VADC_G BFL: BFA1 (Bit 9) */ -#define VADC_G_BFL_BFA1_Msk (0x200UL) /*!< VADC_G BFL: BFA1 (Bitfield-Mask: 0x01) */ -#define VADC_G_BFL_BFA2_Pos (10UL) /*!< VADC_G BFL: BFA2 (Bit 10) */ -#define VADC_G_BFL_BFA2_Msk (0x400UL) /*!< VADC_G BFL: BFA2 (Bitfield-Mask: 0x01) */ -#define VADC_G_BFL_BFA3_Pos (11UL) /*!< VADC_G BFL: BFA3 (Bit 11) */ -#define VADC_G_BFL_BFA3_Msk (0x800UL) /*!< VADC_G BFL: BFA3 (Bitfield-Mask: 0x01) */ -#define VADC_G_BFL_BFI0_Pos (16UL) /*!< VADC_G BFL: BFI0 (Bit 16) */ -#define VADC_G_BFL_BFI0_Msk (0x10000UL) /*!< VADC_G BFL: BFI0 (Bitfield-Mask: 0x01) */ -#define VADC_G_BFL_BFI1_Pos (17UL) /*!< VADC_G BFL: BFI1 (Bit 17) */ -#define VADC_G_BFL_BFI1_Msk (0x20000UL) /*!< VADC_G BFL: BFI1 (Bitfield-Mask: 0x01) */ -#define VADC_G_BFL_BFI2_Pos (18UL) /*!< VADC_G BFL: BFI2 (Bit 18) */ -#define VADC_G_BFL_BFI2_Msk (0x40000UL) /*!< VADC_G BFL: BFI2 (Bitfield-Mask: 0x01) */ -#define VADC_G_BFL_BFI3_Pos (19UL) /*!< VADC_G BFL: BFI3 (Bit 19) */ -#define VADC_G_BFL_BFI3_Msk (0x80000UL) /*!< VADC_G BFL: BFI3 (Bitfield-Mask: 0x01) */ - -/* --------------------------------- VADC_G_BFLS -------------------------------- */ -#define VADC_G_BFLS_BFC0_Pos (0UL) /*!< VADC_G BFLS: BFC0 (Bit 0) */ -#define VADC_G_BFLS_BFC0_Msk (0x1UL) /*!< VADC_G BFLS: BFC0 (Bitfield-Mask: 0x01) */ -#define VADC_G_BFLS_BFC1_Pos (1UL) /*!< VADC_G BFLS: BFC1 (Bit 1) */ -#define VADC_G_BFLS_BFC1_Msk (0x2UL) /*!< VADC_G BFLS: BFC1 (Bitfield-Mask: 0x01) */ -#define VADC_G_BFLS_BFC2_Pos (2UL) /*!< VADC_G BFLS: BFC2 (Bit 2) */ -#define VADC_G_BFLS_BFC2_Msk (0x4UL) /*!< VADC_G BFLS: BFC2 (Bitfield-Mask: 0x01) */ -#define VADC_G_BFLS_BFC3_Pos (3UL) /*!< VADC_G BFLS: BFC3 (Bit 3) */ -#define VADC_G_BFLS_BFC3_Msk (0x8UL) /*!< VADC_G BFLS: BFC3 (Bitfield-Mask: 0x01) */ -#define VADC_G_BFLS_BFS0_Pos (16UL) /*!< VADC_G BFLS: BFS0 (Bit 16) */ -#define VADC_G_BFLS_BFS0_Msk (0x10000UL) /*!< VADC_G BFLS: BFS0 (Bitfield-Mask: 0x01) */ -#define VADC_G_BFLS_BFS1_Pos (17UL) /*!< VADC_G BFLS: BFS1 (Bit 17) */ -#define VADC_G_BFLS_BFS1_Msk (0x20000UL) /*!< VADC_G BFLS: BFS1 (Bitfield-Mask: 0x01) */ -#define VADC_G_BFLS_BFS2_Pos (18UL) /*!< VADC_G BFLS: BFS2 (Bit 18) */ -#define VADC_G_BFLS_BFS2_Msk (0x40000UL) /*!< VADC_G BFLS: BFS2 (Bitfield-Mask: 0x01) */ -#define VADC_G_BFLS_BFS3_Pos (19UL) /*!< VADC_G BFLS: BFS3 (Bit 19) */ -#define VADC_G_BFLS_BFS3_Msk (0x80000UL) /*!< VADC_G BFLS: BFS3 (Bitfield-Mask: 0x01) */ - -/* --------------------------------- VADC_G_BFLC -------------------------------- */ -#define VADC_G_BFLC_BFM0_Pos (0UL) /*!< VADC_G BFLC: BFM0 (Bit 0) */ -#define VADC_G_BFLC_BFM0_Msk (0xfUL) /*!< VADC_G BFLC: BFM0 (Bitfield-Mask: 0x0f) */ -#define VADC_G_BFLC_BFM1_Pos (4UL) /*!< VADC_G BFLC: BFM1 (Bit 4) */ -#define VADC_G_BFLC_BFM1_Msk (0xf0UL) /*!< VADC_G BFLC: BFM1 (Bitfield-Mask: 0x0f) */ -#define VADC_G_BFLC_BFM2_Pos (8UL) /*!< VADC_G BFLC: BFM2 (Bit 8) */ -#define VADC_G_BFLC_BFM2_Msk (0xf00UL) /*!< VADC_G BFLC: BFM2 (Bitfield-Mask: 0x0f) */ -#define VADC_G_BFLC_BFM3_Pos (12UL) /*!< VADC_G BFLC: BFM3 (Bit 12) */ -#define VADC_G_BFLC_BFM3_Msk (0xf000UL) /*!< VADC_G BFLC: BFM3 (Bitfield-Mask: 0x0f) */ - -/* -------------------------------- VADC_G_BFLNP -------------------------------- */ -#define VADC_G_BFLNP_BFL0NP_Pos (0UL) /*!< VADC_G BFLNP: BFL0NP (Bit 0) */ -#define VADC_G_BFLNP_BFL0NP_Msk (0xfUL) /*!< VADC_G BFLNP: BFL0NP (Bitfield-Mask: 0x0f) */ -#define VADC_G_BFLNP_BFL1NP_Pos (4UL) /*!< VADC_G BFLNP: BFL1NP (Bit 4) */ -#define VADC_G_BFLNP_BFL1NP_Msk (0xf0UL) /*!< VADC_G BFLNP: BFL1NP (Bitfield-Mask: 0x0f) */ -#define VADC_G_BFLNP_BFL2NP_Pos (8UL) /*!< VADC_G BFLNP: BFL2NP (Bit 8) */ -#define VADC_G_BFLNP_BFL2NP_Msk (0xf00UL) /*!< VADC_G BFLNP: BFL2NP (Bitfield-Mask: 0x0f) */ -#define VADC_G_BFLNP_BFL3NP_Pos (12UL) /*!< VADC_G BFLNP: BFL3NP (Bit 12) */ -#define VADC_G_BFLNP_BFL3NP_Msk (0xf000UL) /*!< VADC_G BFLNP: BFL3NP (Bitfield-Mask: 0x0f) */ - -/* -------------------------------- VADC_G_QCTRL0 ------------------------------- */ -#define VADC_G_QCTRL0_SRCRESREG_Pos (0UL) /*!< VADC_G QCTRL0: SRCRESREG (Bit 0) */ -#define VADC_G_QCTRL0_SRCRESREG_Msk (0xfUL) /*!< VADC_G QCTRL0: SRCRESREG (Bitfield-Mask: 0x0f) */ -#define VADC_G_QCTRL0_XTSEL_Pos (8UL) /*!< VADC_G QCTRL0: XTSEL (Bit 8) */ -#define VADC_G_QCTRL0_XTSEL_Msk (0xf00UL) /*!< VADC_G QCTRL0: XTSEL (Bitfield-Mask: 0x0f) */ -#define VADC_G_QCTRL0_XTLVL_Pos (12UL) /*!< VADC_G QCTRL0: XTLVL (Bit 12) */ -#define VADC_G_QCTRL0_XTLVL_Msk (0x1000UL) /*!< VADC_G QCTRL0: XTLVL (Bitfield-Mask: 0x01) */ -#define VADC_G_QCTRL0_XTMODE_Pos (13UL) /*!< VADC_G QCTRL0: XTMODE (Bit 13) */ -#define VADC_G_QCTRL0_XTMODE_Msk (0x6000UL) /*!< VADC_G QCTRL0: XTMODE (Bitfield-Mask: 0x03) */ -#define VADC_G_QCTRL0_XTWC_Pos (15UL) /*!< VADC_G QCTRL0: XTWC (Bit 15) */ -#define VADC_G_QCTRL0_XTWC_Msk (0x8000UL) /*!< VADC_G QCTRL0: XTWC (Bitfield-Mask: 0x01) */ -#define VADC_G_QCTRL0_GTSEL_Pos (16UL) /*!< VADC_G QCTRL0: GTSEL (Bit 16) */ -#define VADC_G_QCTRL0_GTSEL_Msk (0xf0000UL) /*!< VADC_G QCTRL0: GTSEL (Bitfield-Mask: 0x0f) */ -#define VADC_G_QCTRL0_GTLVL_Pos (20UL) /*!< VADC_G QCTRL0: GTLVL (Bit 20) */ -#define VADC_G_QCTRL0_GTLVL_Msk (0x100000UL) /*!< VADC_G QCTRL0: GTLVL (Bitfield-Mask: 0x01) */ -#define VADC_G_QCTRL0_GTWC_Pos (23UL) /*!< VADC_G QCTRL0: GTWC (Bit 23) */ -#define VADC_G_QCTRL0_GTWC_Msk (0x800000UL) /*!< VADC_G QCTRL0: GTWC (Bitfield-Mask: 0x01) */ -#define VADC_G_QCTRL0_TMEN_Pos (28UL) /*!< VADC_G QCTRL0: TMEN (Bit 28) */ -#define VADC_G_QCTRL0_TMEN_Msk (0x10000000UL) /*!< VADC_G QCTRL0: TMEN (Bitfield-Mask: 0x01) */ -#define VADC_G_QCTRL0_TMWC_Pos (31UL) /*!< VADC_G QCTRL0: TMWC (Bit 31) */ -#define VADC_G_QCTRL0_TMWC_Msk (0x80000000UL) /*!< VADC_G QCTRL0: TMWC (Bitfield-Mask: 0x01) */ - -/* --------------------------------- VADC_G_QMR0 -------------------------------- */ -#define VADC_G_QMR0_ENGT_Pos (0UL) /*!< VADC_G QMR0: ENGT (Bit 0) */ -#define VADC_G_QMR0_ENGT_Msk (0x3UL) /*!< VADC_G QMR0: ENGT (Bitfield-Mask: 0x03) */ -#define VADC_G_QMR0_ENTR_Pos (2UL) /*!< VADC_G QMR0: ENTR (Bit 2) */ -#define VADC_G_QMR0_ENTR_Msk (0x4UL) /*!< VADC_G QMR0: ENTR (Bitfield-Mask: 0x01) */ -#define VADC_G_QMR0_CLRV_Pos (8UL) /*!< VADC_G QMR0: CLRV (Bit 8) */ -#define VADC_G_QMR0_CLRV_Msk (0x100UL) /*!< VADC_G QMR0: CLRV (Bitfield-Mask: 0x01) */ -#define VADC_G_QMR0_TREV_Pos (9UL) /*!< VADC_G QMR0: TREV (Bit 9) */ -#define VADC_G_QMR0_TREV_Msk (0x200UL) /*!< VADC_G QMR0: TREV (Bitfield-Mask: 0x01) */ -#define VADC_G_QMR0_FLUSH_Pos (10UL) /*!< VADC_G QMR0: FLUSH (Bit 10) */ -#define VADC_G_QMR0_FLUSH_Msk (0x400UL) /*!< VADC_G QMR0: FLUSH (Bitfield-Mask: 0x01) */ -#define VADC_G_QMR0_CEV_Pos (11UL) /*!< VADC_G QMR0: CEV (Bit 11) */ -#define VADC_G_QMR0_CEV_Msk (0x800UL) /*!< VADC_G QMR0: CEV (Bitfield-Mask: 0x01) */ -#define VADC_G_QMR0_RPTDIS_Pos (16UL) /*!< VADC_G QMR0: RPTDIS (Bit 16) */ -#define VADC_G_QMR0_RPTDIS_Msk (0x10000UL) /*!< VADC_G QMR0: RPTDIS (Bitfield-Mask: 0x01) */ - -/* --------------------------------- VADC_G_QSR0 -------------------------------- */ -#define VADC_G_QSR0_FILL_Pos (0UL) /*!< VADC_G QSR0: FILL (Bit 0) */ -#define VADC_G_QSR0_FILL_Msk (0xfUL) /*!< VADC_G QSR0: FILL (Bitfield-Mask: 0x0f) */ -#define VADC_G_QSR0_EMPTY_Pos (5UL) /*!< VADC_G QSR0: EMPTY (Bit 5) */ -#define VADC_G_QSR0_EMPTY_Msk (0x20UL) /*!< VADC_G QSR0: EMPTY (Bitfield-Mask: 0x01) */ -#define VADC_G_QSR0_REQGT_Pos (7UL) /*!< VADC_G QSR0: REQGT (Bit 7) */ -#define VADC_G_QSR0_REQGT_Msk (0x80UL) /*!< VADC_G QSR0: REQGT (Bitfield-Mask: 0x01) */ -#define VADC_G_QSR0_EV_Pos (8UL) /*!< VADC_G QSR0: EV (Bit 8) */ -#define VADC_G_QSR0_EV_Msk (0x100UL) /*!< VADC_G QSR0: EV (Bitfield-Mask: 0x01) */ - -/* --------------------------------- VADC_G_Q0R0 -------------------------------- */ -#define VADC_G_Q0R0_REQCHNR_Pos (0UL) /*!< VADC_G Q0R0: REQCHNR (Bit 0) */ -#define VADC_G_Q0R0_REQCHNR_Msk (0x1fUL) /*!< VADC_G Q0R0: REQCHNR (Bitfield-Mask: 0x1f) */ -#define VADC_G_Q0R0_RF_Pos (5UL) /*!< VADC_G Q0R0: RF (Bit 5) */ -#define VADC_G_Q0R0_RF_Msk (0x20UL) /*!< VADC_G Q0R0: RF (Bitfield-Mask: 0x01) */ -#define VADC_G_Q0R0_ENSI_Pos (6UL) /*!< VADC_G Q0R0: ENSI (Bit 6) */ -#define VADC_G_Q0R0_ENSI_Msk (0x40UL) /*!< VADC_G Q0R0: ENSI (Bitfield-Mask: 0x01) */ -#define VADC_G_Q0R0_EXTR_Pos (7UL) /*!< VADC_G Q0R0: EXTR (Bit 7) */ -#define VADC_G_Q0R0_EXTR_Msk (0x80UL) /*!< VADC_G Q0R0: EXTR (Bitfield-Mask: 0x01) */ -#define VADC_G_Q0R0_V_Pos (8UL) /*!< VADC_G Q0R0: V (Bit 8) */ -#define VADC_G_Q0R0_V_Msk (0x100UL) /*!< VADC_G Q0R0: V (Bitfield-Mask: 0x01) */ - -/* -------------------------------- VADC_G_QINR0 -------------------------------- */ -#define VADC_G_QINR0_REQCHNR_Pos (0UL) /*!< VADC_G QINR0: REQCHNR (Bit 0) */ -#define VADC_G_QINR0_REQCHNR_Msk (0x1fUL) /*!< VADC_G QINR0: REQCHNR (Bitfield-Mask: 0x1f) */ -#define VADC_G_QINR0_RF_Pos (5UL) /*!< VADC_G QINR0: RF (Bit 5) */ -#define VADC_G_QINR0_RF_Msk (0x20UL) /*!< VADC_G QINR0: RF (Bitfield-Mask: 0x01) */ -#define VADC_G_QINR0_ENSI_Pos (6UL) /*!< VADC_G QINR0: ENSI (Bit 6) */ -#define VADC_G_QINR0_ENSI_Msk (0x40UL) /*!< VADC_G QINR0: ENSI (Bitfield-Mask: 0x01) */ -#define VADC_G_QINR0_EXTR_Pos (7UL) /*!< VADC_G QINR0: EXTR (Bit 7) */ -#define VADC_G_QINR0_EXTR_Msk (0x80UL) /*!< VADC_G QINR0: EXTR (Bitfield-Mask: 0x01) */ - -/* -------------------------------- VADC_G_QBUR0 -------------------------------- */ -#define VADC_G_QBUR0_REQCHNR_Pos (0UL) /*!< VADC_G QBUR0: REQCHNR (Bit 0) */ -#define VADC_G_QBUR0_REQCHNR_Msk (0x1fUL) /*!< VADC_G QBUR0: REQCHNR (Bitfield-Mask: 0x1f) */ -#define VADC_G_QBUR0_RF_Pos (5UL) /*!< VADC_G QBUR0: RF (Bit 5) */ -#define VADC_G_QBUR0_RF_Msk (0x20UL) /*!< VADC_G QBUR0: RF (Bitfield-Mask: 0x01) */ -#define VADC_G_QBUR0_ENSI_Pos (6UL) /*!< VADC_G QBUR0: ENSI (Bit 6) */ -#define VADC_G_QBUR0_ENSI_Msk (0x40UL) /*!< VADC_G QBUR0: ENSI (Bitfield-Mask: 0x01) */ -#define VADC_G_QBUR0_EXTR_Pos (7UL) /*!< VADC_G QBUR0: EXTR (Bit 7) */ -#define VADC_G_QBUR0_EXTR_Msk (0x80UL) /*!< VADC_G QBUR0: EXTR (Bitfield-Mask: 0x01) */ -#define VADC_G_QBUR0_V_Pos (8UL) /*!< VADC_G QBUR0: V (Bit 8) */ -#define VADC_G_QBUR0_V_Msk (0x100UL) /*!< VADC_G QBUR0: V (Bitfield-Mask: 0x01) */ - -/* -------------------------------- VADC_G_ASCTRL ------------------------------- */ -#define VADC_G_ASCTRL_SRCRESREG_Pos (0UL) /*!< VADC_G ASCTRL: SRCRESREG (Bit 0) */ -#define VADC_G_ASCTRL_SRCRESREG_Msk (0xfUL) /*!< VADC_G ASCTRL: SRCRESREG (Bitfield-Mask: 0x0f) */ -#define VADC_G_ASCTRL_XTSEL_Pos (8UL) /*!< VADC_G ASCTRL: XTSEL (Bit 8) */ -#define VADC_G_ASCTRL_XTSEL_Msk (0xf00UL) /*!< VADC_G ASCTRL: XTSEL (Bitfield-Mask: 0x0f) */ -#define VADC_G_ASCTRL_XTLVL_Pos (12UL) /*!< VADC_G ASCTRL: XTLVL (Bit 12) */ -#define VADC_G_ASCTRL_XTLVL_Msk (0x1000UL) /*!< VADC_G ASCTRL: XTLVL (Bitfield-Mask: 0x01) */ -#define VADC_G_ASCTRL_XTMODE_Pos (13UL) /*!< VADC_G ASCTRL: XTMODE (Bit 13) */ -#define VADC_G_ASCTRL_XTMODE_Msk (0x6000UL) /*!< VADC_G ASCTRL: XTMODE (Bitfield-Mask: 0x03) */ -#define VADC_G_ASCTRL_XTWC_Pos (15UL) /*!< VADC_G ASCTRL: XTWC (Bit 15) */ -#define VADC_G_ASCTRL_XTWC_Msk (0x8000UL) /*!< VADC_G ASCTRL: XTWC (Bitfield-Mask: 0x01) */ -#define VADC_G_ASCTRL_GTSEL_Pos (16UL) /*!< VADC_G ASCTRL: GTSEL (Bit 16) */ -#define VADC_G_ASCTRL_GTSEL_Msk (0xf0000UL) /*!< VADC_G ASCTRL: GTSEL (Bitfield-Mask: 0x0f) */ -#define VADC_G_ASCTRL_GTLVL_Pos (20UL) /*!< VADC_G ASCTRL: GTLVL (Bit 20) */ -#define VADC_G_ASCTRL_GTLVL_Msk (0x100000UL) /*!< VADC_G ASCTRL: GTLVL (Bitfield-Mask: 0x01) */ -#define VADC_G_ASCTRL_GTWC_Pos (23UL) /*!< VADC_G ASCTRL: GTWC (Bit 23) */ -#define VADC_G_ASCTRL_GTWC_Msk (0x800000UL) /*!< VADC_G ASCTRL: GTWC (Bitfield-Mask: 0x01) */ -#define VADC_G_ASCTRL_TMEN_Pos (28UL) /*!< VADC_G ASCTRL: TMEN (Bit 28) */ -#define VADC_G_ASCTRL_TMEN_Msk (0x10000000UL) /*!< VADC_G ASCTRL: TMEN (Bitfield-Mask: 0x01) */ -#define VADC_G_ASCTRL_TMWC_Pos (31UL) /*!< VADC_G ASCTRL: TMWC (Bit 31) */ -#define VADC_G_ASCTRL_TMWC_Msk (0x80000000UL) /*!< VADC_G ASCTRL: TMWC (Bitfield-Mask: 0x01) */ - -/* --------------------------------- VADC_G_ASMR -------------------------------- */ -#define VADC_G_ASMR_ENGT_Pos (0UL) /*!< VADC_G ASMR: ENGT (Bit 0) */ -#define VADC_G_ASMR_ENGT_Msk (0x3UL) /*!< VADC_G ASMR: ENGT (Bitfield-Mask: 0x03) */ -#define VADC_G_ASMR_ENTR_Pos (2UL) /*!< VADC_G ASMR: ENTR (Bit 2) */ -#define VADC_G_ASMR_ENTR_Msk (0x4UL) /*!< VADC_G ASMR: ENTR (Bitfield-Mask: 0x01) */ -#define VADC_G_ASMR_ENSI_Pos (3UL) /*!< VADC_G ASMR: ENSI (Bit 3) */ -#define VADC_G_ASMR_ENSI_Msk (0x8UL) /*!< VADC_G ASMR: ENSI (Bitfield-Mask: 0x01) */ -#define VADC_G_ASMR_SCAN_Pos (4UL) /*!< VADC_G ASMR: SCAN (Bit 4) */ -#define VADC_G_ASMR_SCAN_Msk (0x10UL) /*!< VADC_G ASMR: SCAN (Bitfield-Mask: 0x01) */ -#define VADC_G_ASMR_LDM_Pos (5UL) /*!< VADC_G ASMR: LDM (Bit 5) */ -#define VADC_G_ASMR_LDM_Msk (0x20UL) /*!< VADC_G ASMR: LDM (Bitfield-Mask: 0x01) */ -#define VADC_G_ASMR_REQGT_Pos (7UL) /*!< VADC_G ASMR: REQGT (Bit 7) */ -#define VADC_G_ASMR_REQGT_Msk (0x80UL) /*!< VADC_G ASMR: REQGT (Bitfield-Mask: 0x01) */ -#define VADC_G_ASMR_CLRPND_Pos (8UL) /*!< VADC_G ASMR: CLRPND (Bit 8) */ -#define VADC_G_ASMR_CLRPND_Msk (0x100UL) /*!< VADC_G ASMR: CLRPND (Bitfield-Mask: 0x01) */ -#define VADC_G_ASMR_LDEV_Pos (9UL) /*!< VADC_G ASMR: LDEV (Bit 9) */ -#define VADC_G_ASMR_LDEV_Msk (0x200UL) /*!< VADC_G ASMR: LDEV (Bitfield-Mask: 0x01) */ -#define VADC_G_ASMR_RPTDIS_Pos (16UL) /*!< VADC_G ASMR: RPTDIS (Bit 16) */ -#define VADC_G_ASMR_RPTDIS_Msk (0x10000UL) /*!< VADC_G ASMR: RPTDIS (Bitfield-Mask: 0x01) */ - -/* -------------------------------- VADC_G_ASSEL -------------------------------- */ -#define VADC_G_ASSEL_CHSEL0_Pos (0UL) /*!< VADC_G ASSEL: CHSEL0 (Bit 0) */ -#define VADC_G_ASSEL_CHSEL0_Msk (0x1UL) /*!< VADC_G ASSEL: CHSEL0 (Bitfield-Mask: 0x01) */ -#define VADC_G_ASSEL_CHSEL1_Pos (1UL) /*!< VADC_G ASSEL: CHSEL1 (Bit 1) */ -#define VADC_G_ASSEL_CHSEL1_Msk (0x2UL) /*!< VADC_G ASSEL: CHSEL1 (Bitfield-Mask: 0x01) */ -#define VADC_G_ASSEL_CHSEL2_Pos (2UL) /*!< VADC_G ASSEL: CHSEL2 (Bit 2) */ -#define VADC_G_ASSEL_CHSEL2_Msk (0x4UL) /*!< VADC_G ASSEL: CHSEL2 (Bitfield-Mask: 0x01) */ -#define VADC_G_ASSEL_CHSEL3_Pos (3UL) /*!< VADC_G ASSEL: CHSEL3 (Bit 3) */ -#define VADC_G_ASSEL_CHSEL3_Msk (0x8UL) /*!< VADC_G ASSEL: CHSEL3 (Bitfield-Mask: 0x01) */ -#define VADC_G_ASSEL_CHSEL4_Pos (4UL) /*!< VADC_G ASSEL: CHSEL4 (Bit 4) */ -#define VADC_G_ASSEL_CHSEL4_Msk (0x10UL) /*!< VADC_G ASSEL: CHSEL4 (Bitfield-Mask: 0x01) */ -#define VADC_G_ASSEL_CHSEL5_Pos (5UL) /*!< VADC_G ASSEL: CHSEL5 (Bit 5) */ -#define VADC_G_ASSEL_CHSEL5_Msk (0x20UL) /*!< VADC_G ASSEL: CHSEL5 (Bitfield-Mask: 0x01) */ -#define VADC_G_ASSEL_CHSEL6_Pos (6UL) /*!< VADC_G ASSEL: CHSEL6 (Bit 6) */ -#define VADC_G_ASSEL_CHSEL6_Msk (0x40UL) /*!< VADC_G ASSEL: CHSEL6 (Bitfield-Mask: 0x01) */ -#define VADC_G_ASSEL_CHSEL7_Pos (7UL) /*!< VADC_G ASSEL: CHSEL7 (Bit 7) */ -#define VADC_G_ASSEL_CHSEL7_Msk (0x80UL) /*!< VADC_G ASSEL: CHSEL7 (Bitfield-Mask: 0x01) */ - -/* -------------------------------- VADC_G_ASPND -------------------------------- */ -#define VADC_G_ASPND_CHPND0_Pos (0UL) /*!< VADC_G ASPND: CHPND0 (Bit 0) */ -#define VADC_G_ASPND_CHPND0_Msk (0x1UL) /*!< VADC_G ASPND: CHPND0 (Bitfield-Mask: 0x01) */ -#define VADC_G_ASPND_CHPND1_Pos (1UL) /*!< VADC_G ASPND: CHPND1 (Bit 1) */ -#define VADC_G_ASPND_CHPND1_Msk (0x2UL) /*!< VADC_G ASPND: CHPND1 (Bitfield-Mask: 0x01) */ -#define VADC_G_ASPND_CHPND2_Pos (2UL) /*!< VADC_G ASPND: CHPND2 (Bit 2) */ -#define VADC_G_ASPND_CHPND2_Msk (0x4UL) /*!< VADC_G ASPND: CHPND2 (Bitfield-Mask: 0x01) */ -#define VADC_G_ASPND_CHPND3_Pos (3UL) /*!< VADC_G ASPND: CHPND3 (Bit 3) */ -#define VADC_G_ASPND_CHPND3_Msk (0x8UL) /*!< VADC_G ASPND: CHPND3 (Bitfield-Mask: 0x01) */ -#define VADC_G_ASPND_CHPND4_Pos (4UL) /*!< VADC_G ASPND: CHPND4 (Bit 4) */ -#define VADC_G_ASPND_CHPND4_Msk (0x10UL) /*!< VADC_G ASPND: CHPND4 (Bitfield-Mask: 0x01) */ -#define VADC_G_ASPND_CHPND5_Pos (5UL) /*!< VADC_G ASPND: CHPND5 (Bit 5) */ -#define VADC_G_ASPND_CHPND5_Msk (0x20UL) /*!< VADC_G ASPND: CHPND5 (Bitfield-Mask: 0x01) */ -#define VADC_G_ASPND_CHPND6_Pos (6UL) /*!< VADC_G ASPND: CHPND6 (Bit 6) */ -#define VADC_G_ASPND_CHPND6_Msk (0x40UL) /*!< VADC_G ASPND: CHPND6 (Bitfield-Mask: 0x01) */ -#define VADC_G_ASPND_CHPND7_Pos (7UL) /*!< VADC_G ASPND: CHPND7 (Bit 7) */ -#define VADC_G_ASPND_CHPND7_Msk (0x80UL) /*!< VADC_G ASPND: CHPND7 (Bitfield-Mask: 0x01) */ - -/* -------------------------------- VADC_G_CEFLAG ------------------------------- */ -#define VADC_G_CEFLAG_CEV0_Pos (0UL) /*!< VADC_G CEFLAG: CEV0 (Bit 0) */ -#define VADC_G_CEFLAG_CEV0_Msk (0x1UL) /*!< VADC_G CEFLAG: CEV0 (Bitfield-Mask: 0x01) */ -#define VADC_G_CEFLAG_CEV1_Pos (1UL) /*!< VADC_G CEFLAG: CEV1 (Bit 1) */ -#define VADC_G_CEFLAG_CEV1_Msk (0x2UL) /*!< VADC_G CEFLAG: CEV1 (Bitfield-Mask: 0x01) */ -#define VADC_G_CEFLAG_CEV2_Pos (2UL) /*!< VADC_G CEFLAG: CEV2 (Bit 2) */ -#define VADC_G_CEFLAG_CEV2_Msk (0x4UL) /*!< VADC_G CEFLAG: CEV2 (Bitfield-Mask: 0x01) */ -#define VADC_G_CEFLAG_CEV3_Pos (3UL) /*!< VADC_G CEFLAG: CEV3 (Bit 3) */ -#define VADC_G_CEFLAG_CEV3_Msk (0x8UL) /*!< VADC_G CEFLAG: CEV3 (Bitfield-Mask: 0x01) */ -#define VADC_G_CEFLAG_CEV4_Pos (4UL) /*!< VADC_G CEFLAG: CEV4 (Bit 4) */ -#define VADC_G_CEFLAG_CEV4_Msk (0x10UL) /*!< VADC_G CEFLAG: CEV4 (Bitfield-Mask: 0x01) */ -#define VADC_G_CEFLAG_CEV5_Pos (5UL) /*!< VADC_G CEFLAG: CEV5 (Bit 5) */ -#define VADC_G_CEFLAG_CEV5_Msk (0x20UL) /*!< VADC_G CEFLAG: CEV5 (Bitfield-Mask: 0x01) */ -#define VADC_G_CEFLAG_CEV6_Pos (6UL) /*!< VADC_G CEFLAG: CEV6 (Bit 6) */ -#define VADC_G_CEFLAG_CEV6_Msk (0x40UL) /*!< VADC_G CEFLAG: CEV6 (Bitfield-Mask: 0x01) */ -#define VADC_G_CEFLAG_CEV7_Pos (7UL) /*!< VADC_G CEFLAG: CEV7 (Bit 7) */ -#define VADC_G_CEFLAG_CEV7_Msk (0x80UL) /*!< VADC_G CEFLAG: CEV7 (Bitfield-Mask: 0x01) */ - -/* -------------------------------- VADC_G_REFLAG ------------------------------- */ -#define VADC_G_REFLAG_REV0_Pos (0UL) /*!< VADC_G REFLAG: REV0 (Bit 0) */ -#define VADC_G_REFLAG_REV0_Msk (0x1UL) /*!< VADC_G REFLAG: REV0 (Bitfield-Mask: 0x01) */ -#define VADC_G_REFLAG_REV1_Pos (1UL) /*!< VADC_G REFLAG: REV1 (Bit 1) */ -#define VADC_G_REFLAG_REV1_Msk (0x2UL) /*!< VADC_G REFLAG: REV1 (Bitfield-Mask: 0x01) */ -#define VADC_G_REFLAG_REV2_Pos (2UL) /*!< VADC_G REFLAG: REV2 (Bit 2) */ -#define VADC_G_REFLAG_REV2_Msk (0x4UL) /*!< VADC_G REFLAG: REV2 (Bitfield-Mask: 0x01) */ -#define VADC_G_REFLAG_REV3_Pos (3UL) /*!< VADC_G REFLAG: REV3 (Bit 3) */ -#define VADC_G_REFLAG_REV3_Msk (0x8UL) /*!< VADC_G REFLAG: REV3 (Bitfield-Mask: 0x01) */ -#define VADC_G_REFLAG_REV4_Pos (4UL) /*!< VADC_G REFLAG: REV4 (Bit 4) */ -#define VADC_G_REFLAG_REV4_Msk (0x10UL) /*!< VADC_G REFLAG: REV4 (Bitfield-Mask: 0x01) */ -#define VADC_G_REFLAG_REV5_Pos (5UL) /*!< VADC_G REFLAG: REV5 (Bit 5) */ -#define VADC_G_REFLAG_REV5_Msk (0x20UL) /*!< VADC_G REFLAG: REV5 (Bitfield-Mask: 0x01) */ -#define VADC_G_REFLAG_REV6_Pos (6UL) /*!< VADC_G REFLAG: REV6 (Bit 6) */ -#define VADC_G_REFLAG_REV6_Msk (0x40UL) /*!< VADC_G REFLAG: REV6 (Bitfield-Mask: 0x01) */ -#define VADC_G_REFLAG_REV7_Pos (7UL) /*!< VADC_G REFLAG: REV7 (Bit 7) */ -#define VADC_G_REFLAG_REV7_Msk (0x80UL) /*!< VADC_G REFLAG: REV7 (Bitfield-Mask: 0x01) */ -#define VADC_G_REFLAG_REV8_Pos (8UL) /*!< VADC_G REFLAG: REV8 (Bit 8) */ -#define VADC_G_REFLAG_REV8_Msk (0x100UL) /*!< VADC_G REFLAG: REV8 (Bitfield-Mask: 0x01) */ -#define VADC_G_REFLAG_REV9_Pos (9UL) /*!< VADC_G REFLAG: REV9 (Bit 9) */ -#define VADC_G_REFLAG_REV9_Msk (0x200UL) /*!< VADC_G REFLAG: REV9 (Bitfield-Mask: 0x01) */ -#define VADC_G_REFLAG_REV10_Pos (10UL) /*!< VADC_G REFLAG: REV10 (Bit 10) */ -#define VADC_G_REFLAG_REV10_Msk (0x400UL) /*!< VADC_G REFLAG: REV10 (Bitfield-Mask: 0x01) */ -#define VADC_G_REFLAG_REV11_Pos (11UL) /*!< VADC_G REFLAG: REV11 (Bit 11) */ -#define VADC_G_REFLAG_REV11_Msk (0x800UL) /*!< VADC_G REFLAG: REV11 (Bitfield-Mask: 0x01) */ -#define VADC_G_REFLAG_REV12_Pos (12UL) /*!< VADC_G REFLAG: REV12 (Bit 12) */ -#define VADC_G_REFLAG_REV12_Msk (0x1000UL) /*!< VADC_G REFLAG: REV12 (Bitfield-Mask: 0x01) */ -#define VADC_G_REFLAG_REV13_Pos (13UL) /*!< VADC_G REFLAG: REV13 (Bit 13) */ -#define VADC_G_REFLAG_REV13_Msk (0x2000UL) /*!< VADC_G REFLAG: REV13 (Bitfield-Mask: 0x01) */ -#define VADC_G_REFLAG_REV14_Pos (14UL) /*!< VADC_G REFLAG: REV14 (Bit 14) */ -#define VADC_G_REFLAG_REV14_Msk (0x4000UL) /*!< VADC_G REFLAG: REV14 (Bitfield-Mask: 0x01) */ -#define VADC_G_REFLAG_REV15_Pos (15UL) /*!< VADC_G REFLAG: REV15 (Bit 15) */ -#define VADC_G_REFLAG_REV15_Msk (0x8000UL) /*!< VADC_G REFLAG: REV15 (Bitfield-Mask: 0x01) */ - -/* -------------------------------- VADC_G_SEFLAG ------------------------------- */ -#define VADC_G_SEFLAG_SEV0_Pos (0UL) /*!< VADC_G SEFLAG: SEV0 (Bit 0) */ -#define VADC_G_SEFLAG_SEV0_Msk (0x1UL) /*!< VADC_G SEFLAG: SEV0 (Bitfield-Mask: 0x01) */ -#define VADC_G_SEFLAG_SEV1_Pos (1UL) /*!< VADC_G SEFLAG: SEV1 (Bit 1) */ -#define VADC_G_SEFLAG_SEV1_Msk (0x2UL) /*!< VADC_G SEFLAG: SEV1 (Bitfield-Mask: 0x01) */ - -/* -------------------------------- VADC_G_CEFCLR ------------------------------- */ -#define VADC_G_CEFCLR_CEV0_Pos (0UL) /*!< VADC_G CEFCLR: CEV0 (Bit 0) */ -#define VADC_G_CEFCLR_CEV0_Msk (0x1UL) /*!< VADC_G CEFCLR: CEV0 (Bitfield-Mask: 0x01) */ -#define VADC_G_CEFCLR_CEV1_Pos (1UL) /*!< VADC_G CEFCLR: CEV1 (Bit 1) */ -#define VADC_G_CEFCLR_CEV1_Msk (0x2UL) /*!< VADC_G CEFCLR: CEV1 (Bitfield-Mask: 0x01) */ -#define VADC_G_CEFCLR_CEV2_Pos (2UL) /*!< VADC_G CEFCLR: CEV2 (Bit 2) */ -#define VADC_G_CEFCLR_CEV2_Msk (0x4UL) /*!< VADC_G CEFCLR: CEV2 (Bitfield-Mask: 0x01) */ -#define VADC_G_CEFCLR_CEV3_Pos (3UL) /*!< VADC_G CEFCLR: CEV3 (Bit 3) */ -#define VADC_G_CEFCLR_CEV3_Msk (0x8UL) /*!< VADC_G CEFCLR: CEV3 (Bitfield-Mask: 0x01) */ -#define VADC_G_CEFCLR_CEV4_Pos (4UL) /*!< VADC_G CEFCLR: CEV4 (Bit 4) */ -#define VADC_G_CEFCLR_CEV4_Msk (0x10UL) /*!< VADC_G CEFCLR: CEV4 (Bitfield-Mask: 0x01) */ -#define VADC_G_CEFCLR_CEV5_Pos (5UL) /*!< VADC_G CEFCLR: CEV5 (Bit 5) */ -#define VADC_G_CEFCLR_CEV5_Msk (0x20UL) /*!< VADC_G CEFCLR: CEV5 (Bitfield-Mask: 0x01) */ -#define VADC_G_CEFCLR_CEV6_Pos (6UL) /*!< VADC_G CEFCLR: CEV6 (Bit 6) */ -#define VADC_G_CEFCLR_CEV6_Msk (0x40UL) /*!< VADC_G CEFCLR: CEV6 (Bitfield-Mask: 0x01) */ -#define VADC_G_CEFCLR_CEV7_Pos (7UL) /*!< VADC_G CEFCLR: CEV7 (Bit 7) */ -#define VADC_G_CEFCLR_CEV7_Msk (0x80UL) /*!< VADC_G CEFCLR: CEV7 (Bitfield-Mask: 0x01) */ - -/* -------------------------------- VADC_G_REFCLR ------------------------------- */ -#define VADC_G_REFCLR_REV0_Pos (0UL) /*!< VADC_G REFCLR: REV0 (Bit 0) */ -#define VADC_G_REFCLR_REV0_Msk (0x1UL) /*!< VADC_G REFCLR: REV0 (Bitfield-Mask: 0x01) */ -#define VADC_G_REFCLR_REV1_Pos (1UL) /*!< VADC_G REFCLR: REV1 (Bit 1) */ -#define VADC_G_REFCLR_REV1_Msk (0x2UL) /*!< VADC_G REFCLR: REV1 (Bitfield-Mask: 0x01) */ -#define VADC_G_REFCLR_REV2_Pos (2UL) /*!< VADC_G REFCLR: REV2 (Bit 2) */ -#define VADC_G_REFCLR_REV2_Msk (0x4UL) /*!< VADC_G REFCLR: REV2 (Bitfield-Mask: 0x01) */ -#define VADC_G_REFCLR_REV3_Pos (3UL) /*!< VADC_G REFCLR: REV3 (Bit 3) */ -#define VADC_G_REFCLR_REV3_Msk (0x8UL) /*!< VADC_G REFCLR: REV3 (Bitfield-Mask: 0x01) */ -#define VADC_G_REFCLR_REV4_Pos (4UL) /*!< VADC_G REFCLR: REV4 (Bit 4) */ -#define VADC_G_REFCLR_REV4_Msk (0x10UL) /*!< VADC_G REFCLR: REV4 (Bitfield-Mask: 0x01) */ -#define VADC_G_REFCLR_REV5_Pos (5UL) /*!< VADC_G REFCLR: REV5 (Bit 5) */ -#define VADC_G_REFCLR_REV5_Msk (0x20UL) /*!< VADC_G REFCLR: REV5 (Bitfield-Mask: 0x01) */ -#define VADC_G_REFCLR_REV6_Pos (6UL) /*!< VADC_G REFCLR: REV6 (Bit 6) */ -#define VADC_G_REFCLR_REV6_Msk (0x40UL) /*!< VADC_G REFCLR: REV6 (Bitfield-Mask: 0x01) */ -#define VADC_G_REFCLR_REV7_Pos (7UL) /*!< VADC_G REFCLR: REV7 (Bit 7) */ -#define VADC_G_REFCLR_REV7_Msk (0x80UL) /*!< VADC_G REFCLR: REV7 (Bitfield-Mask: 0x01) */ -#define VADC_G_REFCLR_REV8_Pos (8UL) /*!< VADC_G REFCLR: REV8 (Bit 8) */ -#define VADC_G_REFCLR_REV8_Msk (0x100UL) /*!< VADC_G REFCLR: REV8 (Bitfield-Mask: 0x01) */ -#define VADC_G_REFCLR_REV9_Pos (9UL) /*!< VADC_G REFCLR: REV9 (Bit 9) */ -#define VADC_G_REFCLR_REV9_Msk (0x200UL) /*!< VADC_G REFCLR: REV9 (Bitfield-Mask: 0x01) */ -#define VADC_G_REFCLR_REV10_Pos (10UL) /*!< VADC_G REFCLR: REV10 (Bit 10) */ -#define VADC_G_REFCLR_REV10_Msk (0x400UL) /*!< VADC_G REFCLR: REV10 (Bitfield-Mask: 0x01) */ -#define VADC_G_REFCLR_REV11_Pos (11UL) /*!< VADC_G REFCLR: REV11 (Bit 11) */ -#define VADC_G_REFCLR_REV11_Msk (0x800UL) /*!< VADC_G REFCLR: REV11 (Bitfield-Mask: 0x01) */ -#define VADC_G_REFCLR_REV12_Pos (12UL) /*!< VADC_G REFCLR: REV12 (Bit 12) */ -#define VADC_G_REFCLR_REV12_Msk (0x1000UL) /*!< VADC_G REFCLR: REV12 (Bitfield-Mask: 0x01) */ -#define VADC_G_REFCLR_REV13_Pos (13UL) /*!< VADC_G REFCLR: REV13 (Bit 13) */ -#define VADC_G_REFCLR_REV13_Msk (0x2000UL) /*!< VADC_G REFCLR: REV13 (Bitfield-Mask: 0x01) */ -#define VADC_G_REFCLR_REV14_Pos (14UL) /*!< VADC_G REFCLR: REV14 (Bit 14) */ -#define VADC_G_REFCLR_REV14_Msk (0x4000UL) /*!< VADC_G REFCLR: REV14 (Bitfield-Mask: 0x01) */ -#define VADC_G_REFCLR_REV15_Pos (15UL) /*!< VADC_G REFCLR: REV15 (Bit 15) */ -#define VADC_G_REFCLR_REV15_Msk (0x8000UL) /*!< VADC_G REFCLR: REV15 (Bitfield-Mask: 0x01) */ - -/* -------------------------------- VADC_G_SEFCLR ------------------------------- */ -#define VADC_G_SEFCLR_SEV0_Pos (0UL) /*!< VADC_G SEFCLR: SEV0 (Bit 0) */ -#define VADC_G_SEFCLR_SEV0_Msk (0x1UL) /*!< VADC_G SEFCLR: SEV0 (Bitfield-Mask: 0x01) */ -#define VADC_G_SEFCLR_SEV1_Pos (1UL) /*!< VADC_G SEFCLR: SEV1 (Bit 1) */ -#define VADC_G_SEFCLR_SEV1_Msk (0x2UL) /*!< VADC_G SEFCLR: SEV1 (Bitfield-Mask: 0x01) */ - -/* -------------------------------- VADC_G_CEVNP0 ------------------------------- */ -#define VADC_G_CEVNP0_CEV0NP_Pos (0UL) /*!< VADC_G CEVNP0: CEV0NP (Bit 0) */ -#define VADC_G_CEVNP0_CEV0NP_Msk (0xfUL) /*!< VADC_G CEVNP0: CEV0NP (Bitfield-Mask: 0x0f) */ -#define VADC_G_CEVNP0_CEV1NP_Pos (4UL) /*!< VADC_G CEVNP0: CEV1NP (Bit 4) */ -#define VADC_G_CEVNP0_CEV1NP_Msk (0xf0UL) /*!< VADC_G CEVNP0: CEV1NP (Bitfield-Mask: 0x0f) */ -#define VADC_G_CEVNP0_CEV2NP_Pos (8UL) /*!< VADC_G CEVNP0: CEV2NP (Bit 8) */ -#define VADC_G_CEVNP0_CEV2NP_Msk (0xf00UL) /*!< VADC_G CEVNP0: CEV2NP (Bitfield-Mask: 0x0f) */ -#define VADC_G_CEVNP0_CEV3NP_Pos (12UL) /*!< VADC_G CEVNP0: CEV3NP (Bit 12) */ -#define VADC_G_CEVNP0_CEV3NP_Msk (0xf000UL) /*!< VADC_G CEVNP0: CEV3NP (Bitfield-Mask: 0x0f) */ -#define VADC_G_CEVNP0_CEV4NP_Pos (16UL) /*!< VADC_G CEVNP0: CEV4NP (Bit 16) */ -#define VADC_G_CEVNP0_CEV4NP_Msk (0xf0000UL) /*!< VADC_G CEVNP0: CEV4NP (Bitfield-Mask: 0x0f) */ -#define VADC_G_CEVNP0_CEV5NP_Pos (20UL) /*!< VADC_G CEVNP0: CEV5NP (Bit 20) */ -#define VADC_G_CEVNP0_CEV5NP_Msk (0xf00000UL) /*!< VADC_G CEVNP0: CEV5NP (Bitfield-Mask: 0x0f) */ -#define VADC_G_CEVNP0_CEV6NP_Pos (24UL) /*!< VADC_G CEVNP0: CEV6NP (Bit 24) */ -#define VADC_G_CEVNP0_CEV6NP_Msk (0xf000000UL) /*!< VADC_G CEVNP0: CEV6NP (Bitfield-Mask: 0x0f) */ -#define VADC_G_CEVNP0_CEV7NP_Pos (28UL) /*!< VADC_G CEVNP0: CEV7NP (Bit 28) */ -#define VADC_G_CEVNP0_CEV7NP_Msk (0xf0000000UL) /*!< VADC_G CEVNP0: CEV7NP (Bitfield-Mask: 0x0f) */ - -/* -------------------------------- VADC_G_REVNP0 ------------------------------- */ -#define VADC_G_REVNP0_REV0NP_Pos (0UL) /*!< VADC_G REVNP0: REV0NP (Bit 0) */ -#define VADC_G_REVNP0_REV0NP_Msk (0xfUL) /*!< VADC_G REVNP0: REV0NP (Bitfield-Mask: 0x0f) */ -#define VADC_G_REVNP0_REV1NP_Pos (4UL) /*!< VADC_G REVNP0: REV1NP (Bit 4) */ -#define VADC_G_REVNP0_REV1NP_Msk (0xf0UL) /*!< VADC_G REVNP0: REV1NP (Bitfield-Mask: 0x0f) */ -#define VADC_G_REVNP0_REV2NP_Pos (8UL) /*!< VADC_G REVNP0: REV2NP (Bit 8) */ -#define VADC_G_REVNP0_REV2NP_Msk (0xf00UL) /*!< VADC_G REVNP0: REV2NP (Bitfield-Mask: 0x0f) */ -#define VADC_G_REVNP0_REV3NP_Pos (12UL) /*!< VADC_G REVNP0: REV3NP (Bit 12) */ -#define VADC_G_REVNP0_REV3NP_Msk (0xf000UL) /*!< VADC_G REVNP0: REV3NP (Bitfield-Mask: 0x0f) */ -#define VADC_G_REVNP0_REV4NP_Pos (16UL) /*!< VADC_G REVNP0: REV4NP (Bit 16) */ -#define VADC_G_REVNP0_REV4NP_Msk (0xf0000UL) /*!< VADC_G REVNP0: REV4NP (Bitfield-Mask: 0x0f) */ -#define VADC_G_REVNP0_REV5NP_Pos (20UL) /*!< VADC_G REVNP0: REV5NP (Bit 20) */ -#define VADC_G_REVNP0_REV5NP_Msk (0xf00000UL) /*!< VADC_G REVNP0: REV5NP (Bitfield-Mask: 0x0f) */ -#define VADC_G_REVNP0_REV6NP_Pos (24UL) /*!< VADC_G REVNP0: REV6NP (Bit 24) */ -#define VADC_G_REVNP0_REV6NP_Msk (0xf000000UL) /*!< VADC_G REVNP0: REV6NP (Bitfield-Mask: 0x0f) */ -#define VADC_G_REVNP0_REV7NP_Pos (28UL) /*!< VADC_G REVNP0: REV7NP (Bit 28) */ -#define VADC_G_REVNP0_REV7NP_Msk (0xf0000000UL) /*!< VADC_G REVNP0: REV7NP (Bitfield-Mask: 0x0f) */ - -/* -------------------------------- VADC_G_REVNP1 ------------------------------- */ -#define VADC_G_REVNP1_REV8NP_Pos (0UL) /*!< VADC_G REVNP1: REV8NP (Bit 0) */ -#define VADC_G_REVNP1_REV8NP_Msk (0xfUL) /*!< VADC_G REVNP1: REV8NP (Bitfield-Mask: 0x0f) */ -#define VADC_G_REVNP1_REV9NP_Pos (4UL) /*!< VADC_G REVNP1: REV9NP (Bit 4) */ -#define VADC_G_REVNP1_REV9NP_Msk (0xf0UL) /*!< VADC_G REVNP1: REV9NP (Bitfield-Mask: 0x0f) */ -#define VADC_G_REVNP1_REV10NP_Pos (8UL) /*!< VADC_G REVNP1: REV10NP (Bit 8) */ -#define VADC_G_REVNP1_REV10NP_Msk (0xf00UL) /*!< VADC_G REVNP1: REV10NP (Bitfield-Mask: 0x0f) */ -#define VADC_G_REVNP1_REV11NP_Pos (12UL) /*!< VADC_G REVNP1: REV11NP (Bit 12) */ -#define VADC_G_REVNP1_REV11NP_Msk (0xf000UL) /*!< VADC_G REVNP1: REV11NP (Bitfield-Mask: 0x0f) */ -#define VADC_G_REVNP1_REV12NP_Pos (16UL) /*!< VADC_G REVNP1: REV12NP (Bit 16) */ -#define VADC_G_REVNP1_REV12NP_Msk (0xf0000UL) /*!< VADC_G REVNP1: REV12NP (Bitfield-Mask: 0x0f) */ -#define VADC_G_REVNP1_REV13NP_Pos (20UL) /*!< VADC_G REVNP1: REV13NP (Bit 20) */ -#define VADC_G_REVNP1_REV13NP_Msk (0xf00000UL) /*!< VADC_G REVNP1: REV13NP (Bitfield-Mask: 0x0f) */ -#define VADC_G_REVNP1_REV14NP_Pos (24UL) /*!< VADC_G REVNP1: REV14NP (Bit 24) */ -#define VADC_G_REVNP1_REV14NP_Msk (0xf000000UL) /*!< VADC_G REVNP1: REV14NP (Bitfield-Mask: 0x0f) */ -#define VADC_G_REVNP1_REV15NP_Pos (28UL) /*!< VADC_G REVNP1: REV15NP (Bit 28) */ -#define VADC_G_REVNP1_REV15NP_Msk (0xf0000000UL) /*!< VADC_G REVNP1: REV15NP (Bitfield-Mask: 0x0f) */ - -/* -------------------------------- VADC_G_SEVNP -------------------------------- */ -#define VADC_G_SEVNP_SEV0NP_Pos (0UL) /*!< VADC_G SEVNP: SEV0NP (Bit 0) */ -#define VADC_G_SEVNP_SEV0NP_Msk (0xfUL) /*!< VADC_G SEVNP: SEV0NP (Bitfield-Mask: 0x0f) */ -#define VADC_G_SEVNP_SEV1NP_Pos (4UL) /*!< VADC_G SEVNP: SEV1NP (Bit 4) */ -#define VADC_G_SEVNP_SEV1NP_Msk (0xf0UL) /*!< VADC_G SEVNP: SEV1NP (Bitfield-Mask: 0x0f) */ - -/* -------------------------------- VADC_G_SRACT -------------------------------- */ -#define VADC_G_SRACT_AGSR0_Pos (0UL) /*!< VADC_G SRACT: AGSR0 (Bit 0) */ -#define VADC_G_SRACT_AGSR0_Msk (0x1UL) /*!< VADC_G SRACT: AGSR0 (Bitfield-Mask: 0x01) */ -#define VADC_G_SRACT_AGSR1_Pos (1UL) /*!< VADC_G SRACT: AGSR1 (Bit 1) */ -#define VADC_G_SRACT_AGSR1_Msk (0x2UL) /*!< VADC_G SRACT: AGSR1 (Bitfield-Mask: 0x01) */ -#define VADC_G_SRACT_AGSR2_Pos (2UL) /*!< VADC_G SRACT: AGSR2 (Bit 2) */ -#define VADC_G_SRACT_AGSR2_Msk (0x4UL) /*!< VADC_G SRACT: AGSR2 (Bitfield-Mask: 0x01) */ -#define VADC_G_SRACT_AGSR3_Pos (3UL) /*!< VADC_G SRACT: AGSR3 (Bit 3) */ -#define VADC_G_SRACT_AGSR3_Msk (0x8UL) /*!< VADC_G SRACT: AGSR3 (Bitfield-Mask: 0x01) */ -#define VADC_G_SRACT_ASSR0_Pos (8UL) /*!< VADC_G SRACT: ASSR0 (Bit 8) */ -#define VADC_G_SRACT_ASSR0_Msk (0x100UL) /*!< VADC_G SRACT: ASSR0 (Bitfield-Mask: 0x01) */ -#define VADC_G_SRACT_ASSR1_Pos (9UL) /*!< VADC_G SRACT: ASSR1 (Bit 9) */ -#define VADC_G_SRACT_ASSR1_Msk (0x200UL) /*!< VADC_G SRACT: ASSR1 (Bitfield-Mask: 0x01) */ -#define VADC_G_SRACT_ASSR2_Pos (10UL) /*!< VADC_G SRACT: ASSR2 (Bit 10) */ -#define VADC_G_SRACT_ASSR2_Msk (0x400UL) /*!< VADC_G SRACT: ASSR2 (Bitfield-Mask: 0x01) */ -#define VADC_G_SRACT_ASSR3_Pos (11UL) /*!< VADC_G SRACT: ASSR3 (Bit 11) */ -#define VADC_G_SRACT_ASSR3_Msk (0x800UL) /*!< VADC_G SRACT: ASSR3 (Bitfield-Mask: 0x01) */ - -/* ------------------------------- VADC_G_EMUXCTR ------------------------------- */ -#define VADC_G_EMUXCTR_EMUXSET_Pos (0UL) /*!< VADC_G EMUXCTR: EMUXSET (Bit 0) */ -#define VADC_G_EMUXCTR_EMUXSET_Msk (0x7UL) /*!< VADC_G EMUXCTR: EMUXSET (Bitfield-Mask: 0x07) */ -#define VADC_G_EMUXCTR_EMUXACT_Pos (8UL) /*!< VADC_G EMUXCTR: EMUXACT (Bit 8) */ -#define VADC_G_EMUXCTR_EMUXACT_Msk (0x700UL) /*!< VADC_G EMUXCTR: EMUXACT (Bitfield-Mask: 0x07) */ -#define VADC_G_EMUXCTR_EMUXCH_Pos (16UL) /*!< VADC_G EMUXCTR: EMUXCH (Bit 16) */ -#define VADC_G_EMUXCTR_EMUXCH_Msk (0x3ff0000UL) /*!< VADC_G EMUXCTR: EMUXCH (Bitfield-Mask: 0x3ff) */ -#define VADC_G_EMUXCTR_EMUXMODE_Pos (26UL) /*!< VADC_G EMUXCTR: EMUXMODE (Bit 26) */ -#define VADC_G_EMUXCTR_EMUXMODE_Msk (0xc000000UL) /*!< VADC_G EMUXCTR: EMUXMODE (Bitfield-Mask: 0x03) */ -#define VADC_G_EMUXCTR_EMXCOD_Pos (28UL) /*!< VADC_G EMUXCTR: EMXCOD (Bit 28) */ -#define VADC_G_EMUXCTR_EMXCOD_Msk (0x10000000UL) /*!< VADC_G EMUXCTR: EMXCOD (Bitfield-Mask: 0x01) */ -#define VADC_G_EMUXCTR_EMXST_Pos (29UL) /*!< VADC_G EMUXCTR: EMXST (Bit 29) */ -#define VADC_G_EMUXCTR_EMXST_Msk (0x20000000UL) /*!< VADC_G EMUXCTR: EMXST (Bitfield-Mask: 0x01) */ -#define VADC_G_EMUXCTR_EMXCSS_Pos (30UL) /*!< VADC_G EMUXCTR: EMXCSS (Bit 30) */ -#define VADC_G_EMUXCTR_EMXCSS_Msk (0x40000000UL) /*!< VADC_G EMUXCTR: EMXCSS (Bitfield-Mask: 0x01) */ -#define VADC_G_EMUXCTR_EMXWC_Pos (31UL) /*!< VADC_G EMUXCTR: EMXWC (Bit 31) */ -#define VADC_G_EMUXCTR_EMXWC_Msk (0x80000000UL) /*!< VADC_G EMUXCTR: EMXWC (Bitfield-Mask: 0x01) */ - -/* --------------------------------- VADC_G_VFR --------------------------------- */ -#define VADC_G_VFR_VF0_Pos (0UL) /*!< VADC_G VFR: VF0 (Bit 0) */ -#define VADC_G_VFR_VF0_Msk (0x1UL) /*!< VADC_G VFR: VF0 (Bitfield-Mask: 0x01) */ -#define VADC_G_VFR_VF1_Pos (1UL) /*!< VADC_G VFR: VF1 (Bit 1) */ -#define VADC_G_VFR_VF1_Msk (0x2UL) /*!< VADC_G VFR: VF1 (Bitfield-Mask: 0x01) */ -#define VADC_G_VFR_VF2_Pos (2UL) /*!< VADC_G VFR: VF2 (Bit 2) */ -#define VADC_G_VFR_VF2_Msk (0x4UL) /*!< VADC_G VFR: VF2 (Bitfield-Mask: 0x01) */ -#define VADC_G_VFR_VF3_Pos (3UL) /*!< VADC_G VFR: VF3 (Bit 3) */ -#define VADC_G_VFR_VF3_Msk (0x8UL) /*!< VADC_G VFR: VF3 (Bitfield-Mask: 0x01) */ -#define VADC_G_VFR_VF4_Pos (4UL) /*!< VADC_G VFR: VF4 (Bit 4) */ -#define VADC_G_VFR_VF4_Msk (0x10UL) /*!< VADC_G VFR: VF4 (Bitfield-Mask: 0x01) */ -#define VADC_G_VFR_VF5_Pos (5UL) /*!< VADC_G VFR: VF5 (Bit 5) */ -#define VADC_G_VFR_VF5_Msk (0x20UL) /*!< VADC_G VFR: VF5 (Bitfield-Mask: 0x01) */ -#define VADC_G_VFR_VF6_Pos (6UL) /*!< VADC_G VFR: VF6 (Bit 6) */ -#define VADC_G_VFR_VF6_Msk (0x40UL) /*!< VADC_G VFR: VF6 (Bitfield-Mask: 0x01) */ -#define VADC_G_VFR_VF7_Pos (7UL) /*!< VADC_G VFR: VF7 (Bit 7) */ -#define VADC_G_VFR_VF7_Msk (0x80UL) /*!< VADC_G VFR: VF7 (Bitfield-Mask: 0x01) */ -#define VADC_G_VFR_VF8_Pos (8UL) /*!< VADC_G VFR: VF8 (Bit 8) */ -#define VADC_G_VFR_VF8_Msk (0x100UL) /*!< VADC_G VFR: VF8 (Bitfield-Mask: 0x01) */ -#define VADC_G_VFR_VF9_Pos (9UL) /*!< VADC_G VFR: VF9 (Bit 9) */ -#define VADC_G_VFR_VF9_Msk (0x200UL) /*!< VADC_G VFR: VF9 (Bitfield-Mask: 0x01) */ -#define VADC_G_VFR_VF10_Pos (10UL) /*!< VADC_G VFR: VF10 (Bit 10) */ -#define VADC_G_VFR_VF10_Msk (0x400UL) /*!< VADC_G VFR: VF10 (Bitfield-Mask: 0x01) */ -#define VADC_G_VFR_VF11_Pos (11UL) /*!< VADC_G VFR: VF11 (Bit 11) */ -#define VADC_G_VFR_VF11_Msk (0x800UL) /*!< VADC_G VFR: VF11 (Bitfield-Mask: 0x01) */ -#define VADC_G_VFR_VF12_Pos (12UL) /*!< VADC_G VFR: VF12 (Bit 12) */ -#define VADC_G_VFR_VF12_Msk (0x1000UL) /*!< VADC_G VFR: VF12 (Bitfield-Mask: 0x01) */ -#define VADC_G_VFR_VF13_Pos (13UL) /*!< VADC_G VFR: VF13 (Bit 13) */ -#define VADC_G_VFR_VF13_Msk (0x2000UL) /*!< VADC_G VFR: VF13 (Bitfield-Mask: 0x01) */ -#define VADC_G_VFR_VF14_Pos (14UL) /*!< VADC_G VFR: VF14 (Bit 14) */ -#define VADC_G_VFR_VF14_Msk (0x4000UL) /*!< VADC_G VFR: VF14 (Bitfield-Mask: 0x01) */ -#define VADC_G_VFR_VF15_Pos (15UL) /*!< VADC_G VFR: VF15 (Bit 15) */ -#define VADC_G_VFR_VF15_Msk (0x8000UL) /*!< VADC_G VFR: VF15 (Bitfield-Mask: 0x01) */ - -/* -------------------------------- VADC_G_CHCTR -------------------------------- */ -#define VADC_G_CHCTR_ICLSEL_Pos (0UL) /*!< VADC_G CHCTR: ICLSEL (Bit 0) */ -#define VADC_G_CHCTR_ICLSEL_Msk (0x3UL) /*!< VADC_G CHCTR: ICLSEL (Bitfield-Mask: 0x03) */ -#define VADC_G_CHCTR_BNDSELL_Pos (4UL) /*!< VADC_G CHCTR: BNDSELL (Bit 4) */ -#define VADC_G_CHCTR_BNDSELL_Msk (0x30UL) /*!< VADC_G CHCTR: BNDSELL (Bitfield-Mask: 0x03) */ -#define VADC_G_CHCTR_BNDSELU_Pos (6UL) /*!< VADC_G CHCTR: BNDSELU (Bit 6) */ -#define VADC_G_CHCTR_BNDSELU_Msk (0xc0UL) /*!< VADC_G CHCTR: BNDSELU (Bitfield-Mask: 0x03) */ -#define VADC_G_CHCTR_CHEVMODE_Pos (8UL) /*!< VADC_G CHCTR: CHEVMODE (Bit 8) */ -#define VADC_G_CHCTR_CHEVMODE_Msk (0x300UL) /*!< VADC_G CHCTR: CHEVMODE (Bitfield-Mask: 0x03) */ -#define VADC_G_CHCTR_SYNC_Pos (10UL) /*!< VADC_G CHCTR: SYNC (Bit 10) */ -#define VADC_G_CHCTR_SYNC_Msk (0x400UL) /*!< VADC_G CHCTR: SYNC (Bitfield-Mask: 0x01) */ -#define VADC_G_CHCTR_REFSEL_Pos (11UL) /*!< VADC_G CHCTR: REFSEL (Bit 11) */ -#define VADC_G_CHCTR_REFSEL_Msk (0x800UL) /*!< VADC_G CHCTR: REFSEL (Bitfield-Mask: 0x01) */ -#define VADC_G_CHCTR_RESREG_Pos (16UL) /*!< VADC_G CHCTR: RESREG (Bit 16) */ -#define VADC_G_CHCTR_RESREG_Msk (0xf0000UL) /*!< VADC_G CHCTR: RESREG (Bitfield-Mask: 0x0f) */ -#define VADC_G_CHCTR_RESTBS_Pos (20UL) /*!< VADC_G CHCTR: RESTBS (Bit 20) */ -#define VADC_G_CHCTR_RESTBS_Msk (0x100000UL) /*!< VADC_G CHCTR: RESTBS (Bitfield-Mask: 0x01) */ -#define VADC_G_CHCTR_RESPOS_Pos (21UL) /*!< VADC_G CHCTR: RESPOS (Bit 21) */ -#define VADC_G_CHCTR_RESPOS_Msk (0x200000UL) /*!< VADC_G CHCTR: RESPOS (Bitfield-Mask: 0x01) */ -#define VADC_G_CHCTR_BWDCH_Pos (28UL) /*!< VADC_G CHCTR: BWDCH (Bit 28) */ -#define VADC_G_CHCTR_BWDCH_Msk (0x30000000UL) /*!< VADC_G CHCTR: BWDCH (Bitfield-Mask: 0x03) */ -#define VADC_G_CHCTR_BWDEN_Pos (30UL) /*!< VADC_G CHCTR: BWDEN (Bit 30) */ -#define VADC_G_CHCTR_BWDEN_Msk (0x40000000UL) /*!< VADC_G CHCTR: BWDEN (Bitfield-Mask: 0x01) */ - -/* --------------------------------- VADC_G_RCR --------------------------------- */ -#define VADC_G_RCR_DRCTR_Pos (16UL) /*!< VADC_G RCR: DRCTR (Bit 16) */ -#define VADC_G_RCR_DRCTR_Msk (0xf0000UL) /*!< VADC_G RCR: DRCTR (Bitfield-Mask: 0x0f) */ -#define VADC_G_RCR_DMM_Pos (20UL) /*!< VADC_G RCR: DMM (Bit 20) */ -#define VADC_G_RCR_DMM_Msk (0x300000UL) /*!< VADC_G RCR: DMM (Bitfield-Mask: 0x03) */ -#define VADC_G_RCR_WFR_Pos (24UL) /*!< VADC_G RCR: WFR (Bit 24) */ -#define VADC_G_RCR_WFR_Msk (0x1000000UL) /*!< VADC_G RCR: WFR (Bitfield-Mask: 0x01) */ -#define VADC_G_RCR_FEN_Pos (25UL) /*!< VADC_G RCR: FEN (Bit 25) */ -#define VADC_G_RCR_FEN_Msk (0x6000000UL) /*!< VADC_G RCR: FEN (Bitfield-Mask: 0x03) */ -#define VADC_G_RCR_SRGEN_Pos (31UL) /*!< VADC_G RCR: SRGEN (Bit 31) */ -#define VADC_G_RCR_SRGEN_Msk (0x80000000UL) /*!< VADC_G RCR: SRGEN (Bitfield-Mask: 0x01) */ - -/* --------------------------------- VADC_G_RES --------------------------------- */ -#define VADC_G_RES_RESULT_Pos (0UL) /*!< VADC_G RES: RESULT (Bit 0) */ -#define VADC_G_RES_RESULT_Msk (0xffffUL) /*!< VADC_G RES: RESULT (Bitfield-Mask: 0xffff) */ -#define VADC_G_RES_DRC_Pos (16UL) /*!< VADC_G RES: DRC (Bit 16) */ -#define VADC_G_RES_DRC_Msk (0xf0000UL) /*!< VADC_G RES: DRC (Bitfield-Mask: 0x0f) */ -#define VADC_G_RES_CHNR_Pos (20UL) /*!< VADC_G RES: CHNR (Bit 20) */ -#define VADC_G_RES_CHNR_Msk (0x1f00000UL) /*!< VADC_G RES: CHNR (Bitfield-Mask: 0x1f) */ -#define VADC_G_RES_EMUX_Pos (25UL) /*!< VADC_G RES: EMUX (Bit 25) */ -#define VADC_G_RES_EMUX_Msk (0xe000000UL) /*!< VADC_G RES: EMUX (Bitfield-Mask: 0x07) */ -#define VADC_G_RES_CRS_Pos (28UL) /*!< VADC_G RES: CRS (Bit 28) */ -#define VADC_G_RES_CRS_Msk (0x30000000UL) /*!< VADC_G RES: CRS (Bitfield-Mask: 0x03) */ -#define VADC_G_RES_FCR_Pos (30UL) /*!< VADC_G RES: FCR (Bit 30) */ -#define VADC_G_RES_FCR_Msk (0x40000000UL) /*!< VADC_G RES: FCR (Bitfield-Mask: 0x01) */ -#define VADC_G_RES_VF_Pos (31UL) /*!< VADC_G RES: VF (Bit 31) */ -#define VADC_G_RES_VF_Msk (0x80000000UL) /*!< VADC_G RES: VF (Bitfield-Mask: 0x01) */ - -/* --------------------------------- VADC_G_RESD -------------------------------- */ -#define VADC_G_RESD_RESULT_Pos (0UL) /*!< VADC_G RESD: RESULT (Bit 0) */ -#define VADC_G_RESD_RESULT_Msk (0xffffUL) /*!< VADC_G RESD: RESULT (Bitfield-Mask: 0xffff) */ -#define VADC_G_RESD_DRC_Pos (16UL) /*!< VADC_G RESD: DRC (Bit 16) */ -#define VADC_G_RESD_DRC_Msk (0xf0000UL) /*!< VADC_G RESD: DRC (Bitfield-Mask: 0x0f) */ -#define VADC_G_RESD_CHNR_Pos (20UL) /*!< VADC_G RESD: CHNR (Bit 20) */ -#define VADC_G_RESD_CHNR_Msk (0x1f00000UL) /*!< VADC_G RESD: CHNR (Bitfield-Mask: 0x1f) */ -#define VADC_G_RESD_EMUX_Pos (25UL) /*!< VADC_G RESD: EMUX (Bit 25) */ -#define VADC_G_RESD_EMUX_Msk (0xe000000UL) /*!< VADC_G RESD: EMUX (Bitfield-Mask: 0x07) */ -#define VADC_G_RESD_CRS_Pos (28UL) /*!< VADC_G RESD: CRS (Bit 28) */ -#define VADC_G_RESD_CRS_Msk (0x30000000UL) /*!< VADC_G RESD: CRS (Bitfield-Mask: 0x03) */ -#define VADC_G_RESD_FCR_Pos (30UL) /*!< VADC_G RESD: FCR (Bit 30) */ -#define VADC_G_RESD_FCR_Msk (0x40000000UL) /*!< VADC_G RESD: FCR (Bitfield-Mask: 0x01) */ -#define VADC_G_RESD_VF_Pos (31UL) /*!< VADC_G RESD: VF (Bit 31) */ -#define VADC_G_RESD_VF_Msk (0x80000000UL) /*!< VADC_G RESD: VF (Bitfield-Mask: 0x01) */ - - -/* ================================================================================ */ -/* ================ struct 'DSD' Position & Mask ================ */ -/* ================================================================================ */ - - -/* ----------------------------------- DSD_CLC ---------------------------------- */ -#define DSD_CLC_DISR_Pos (0UL) /*!< DSD CLC: DISR (Bit 0) */ -#define DSD_CLC_DISR_Msk (0x1UL) /*!< DSD CLC: DISR (Bitfield-Mask: 0x01) */ -#define DSD_CLC_DISS_Pos (1UL) /*!< DSD CLC: DISS (Bit 1) */ -#define DSD_CLC_DISS_Msk (0x2UL) /*!< DSD CLC: DISS (Bitfield-Mask: 0x01) */ -#define DSD_CLC_EDIS_Pos (3UL) /*!< DSD CLC: EDIS (Bit 3) */ -#define DSD_CLC_EDIS_Msk (0x8UL) /*!< DSD CLC: EDIS (Bitfield-Mask: 0x01) */ - -/* ----------------------------------- DSD_ID ----------------------------------- */ -#define DSD_ID_MOD_REV_Pos (0UL) /*!< DSD ID: MOD_REV (Bit 0) */ -#define DSD_ID_MOD_REV_Msk (0xffUL) /*!< DSD ID: MOD_REV (Bitfield-Mask: 0xff) */ -#define DSD_ID_MOD_TYPE_Pos (8UL) /*!< DSD ID: MOD_TYPE (Bit 8) */ -#define DSD_ID_MOD_TYPE_Msk (0xff00UL) /*!< DSD ID: MOD_TYPE (Bitfield-Mask: 0xff) */ -#define DSD_ID_MOD_NUMBER_Pos (16UL) /*!< DSD ID: MOD_NUMBER (Bit 16) */ -#define DSD_ID_MOD_NUMBER_Msk (0xffff0000UL) /*!< DSD ID: MOD_NUMBER (Bitfield-Mask: 0xffff) */ - -/* ----------------------------------- DSD_OCS ---------------------------------- */ -#define DSD_OCS_SUS_Pos (24UL) /*!< DSD OCS: SUS (Bit 24) */ -#define DSD_OCS_SUS_Msk (0xf000000UL) /*!< DSD OCS: SUS (Bitfield-Mask: 0x0f) */ -#define DSD_OCS_SUS_P_Pos (28UL) /*!< DSD OCS: SUS_P (Bit 28) */ -#define DSD_OCS_SUS_P_Msk (0x10000000UL) /*!< DSD OCS: SUS_P (Bitfield-Mask: 0x01) */ -#define DSD_OCS_SUSSTA_Pos (29UL) /*!< DSD OCS: SUSSTA (Bit 29) */ -#define DSD_OCS_SUSSTA_Msk (0x20000000UL) /*!< DSD OCS: SUSSTA (Bitfield-Mask: 0x01) */ - -/* --------------------------------- DSD_GLOBCFG -------------------------------- */ -#define DSD_GLOBCFG_MCSEL_Pos (0UL) /*!< DSD GLOBCFG: MCSEL (Bit 0) */ -#define DSD_GLOBCFG_MCSEL_Msk (0x7UL) /*!< DSD GLOBCFG: MCSEL (Bitfield-Mask: 0x07) */ - -/* --------------------------------- DSD_GLOBRC --------------------------------- */ -#define DSD_GLOBRC_CH0RUN_Pos (0UL) /*!< DSD GLOBRC: CH0RUN (Bit 0) */ -#define DSD_GLOBRC_CH0RUN_Msk (0x1UL) /*!< DSD GLOBRC: CH0RUN (Bitfield-Mask: 0x01) */ -#define DSD_GLOBRC_CH1RUN_Pos (1UL) /*!< DSD GLOBRC: CH1RUN (Bit 1) */ -#define DSD_GLOBRC_CH1RUN_Msk (0x2UL) /*!< DSD GLOBRC: CH1RUN (Bitfield-Mask: 0x01) */ -#define DSD_GLOBRC_CH2RUN_Pos (2UL) /*!< DSD GLOBRC: CH2RUN (Bit 2) */ -#define DSD_GLOBRC_CH2RUN_Msk (0x4UL) /*!< DSD GLOBRC: CH2RUN (Bitfield-Mask: 0x01) */ -#define DSD_GLOBRC_CH3RUN_Pos (3UL) /*!< DSD GLOBRC: CH3RUN (Bit 3) */ -#define DSD_GLOBRC_CH3RUN_Msk (0x8UL) /*!< DSD GLOBRC: CH3RUN (Bitfield-Mask: 0x01) */ - -/* ---------------------------------- DSD_CGCFG --------------------------------- */ -#define DSD_CGCFG_CGMOD_Pos (0UL) /*!< DSD CGCFG: CGMOD (Bit 0) */ -#define DSD_CGCFG_CGMOD_Msk (0x3UL) /*!< DSD CGCFG: CGMOD (Bitfield-Mask: 0x03) */ -#define DSD_CGCFG_BREV_Pos (2UL) /*!< DSD CGCFG: BREV (Bit 2) */ -#define DSD_CGCFG_BREV_Msk (0x4UL) /*!< DSD CGCFG: BREV (Bitfield-Mask: 0x01) */ -#define DSD_CGCFG_SIGPOL_Pos (3UL) /*!< DSD CGCFG: SIGPOL (Bit 3) */ -#define DSD_CGCFG_SIGPOL_Msk (0x8UL) /*!< DSD CGCFG: SIGPOL (Bitfield-Mask: 0x01) */ -#define DSD_CGCFG_DIVCG_Pos (4UL) /*!< DSD CGCFG: DIVCG (Bit 4) */ -#define DSD_CGCFG_DIVCG_Msk (0xf0UL) /*!< DSD CGCFG: DIVCG (Bitfield-Mask: 0x0f) */ -#define DSD_CGCFG_RUN_Pos (15UL) /*!< DSD CGCFG: RUN (Bit 15) */ -#define DSD_CGCFG_RUN_Msk (0x8000UL) /*!< DSD CGCFG: RUN (Bitfield-Mask: 0x01) */ -#define DSD_CGCFG_BITCOUNT_Pos (16UL) /*!< DSD CGCFG: BITCOUNT (Bit 16) */ -#define DSD_CGCFG_BITCOUNT_Msk (0x1f0000UL) /*!< DSD CGCFG: BITCOUNT (Bitfield-Mask: 0x1f) */ -#define DSD_CGCFG_STEPCOUNT_Pos (24UL) /*!< DSD CGCFG: STEPCOUNT (Bit 24) */ -#define DSD_CGCFG_STEPCOUNT_Msk (0xf000000UL) /*!< DSD CGCFG: STEPCOUNT (Bitfield-Mask: 0x0f) */ -#define DSD_CGCFG_STEPS_Pos (28UL) /*!< DSD CGCFG: STEPS (Bit 28) */ -#define DSD_CGCFG_STEPS_Msk (0x10000000UL) /*!< DSD CGCFG: STEPS (Bitfield-Mask: 0x01) */ -#define DSD_CGCFG_STEPD_Pos (29UL) /*!< DSD CGCFG: STEPD (Bit 29) */ -#define DSD_CGCFG_STEPD_Msk (0x20000000UL) /*!< DSD CGCFG: STEPD (Bitfield-Mask: 0x01) */ -#define DSD_CGCFG_SGNCG_Pos (30UL) /*!< DSD CGCFG: SGNCG (Bit 30) */ -#define DSD_CGCFG_SGNCG_Msk (0x40000000UL) /*!< DSD CGCFG: SGNCG (Bitfield-Mask: 0x01) */ - -/* --------------------------------- DSD_EVFLAG --------------------------------- */ -#define DSD_EVFLAG_RESEV0_Pos (0UL) /*!< DSD EVFLAG: RESEV0 (Bit 0) */ -#define DSD_EVFLAG_RESEV0_Msk (0x1UL) /*!< DSD EVFLAG: RESEV0 (Bitfield-Mask: 0x01) */ -#define DSD_EVFLAG_RESEV1_Pos (1UL) /*!< DSD EVFLAG: RESEV1 (Bit 1) */ -#define DSD_EVFLAG_RESEV1_Msk (0x2UL) /*!< DSD EVFLAG: RESEV1 (Bitfield-Mask: 0x01) */ -#define DSD_EVFLAG_RESEV2_Pos (2UL) /*!< DSD EVFLAG: RESEV2 (Bit 2) */ -#define DSD_EVFLAG_RESEV2_Msk (0x4UL) /*!< DSD EVFLAG: RESEV2 (Bitfield-Mask: 0x01) */ -#define DSD_EVFLAG_RESEV3_Pos (3UL) /*!< DSD EVFLAG: RESEV3 (Bit 3) */ -#define DSD_EVFLAG_RESEV3_Msk (0x8UL) /*!< DSD EVFLAG: RESEV3 (Bitfield-Mask: 0x01) */ -#define DSD_EVFLAG_ALEV0_Pos (16UL) /*!< DSD EVFLAG: ALEV0 (Bit 16) */ -#define DSD_EVFLAG_ALEV0_Msk (0x10000UL) /*!< DSD EVFLAG: ALEV0 (Bitfield-Mask: 0x01) */ -#define DSD_EVFLAG_ALEV1_Pos (17UL) /*!< DSD EVFLAG: ALEV1 (Bit 17) */ -#define DSD_EVFLAG_ALEV1_Msk (0x20000UL) /*!< DSD EVFLAG: ALEV1 (Bitfield-Mask: 0x01) */ -#define DSD_EVFLAG_ALEV2_Pos (18UL) /*!< DSD EVFLAG: ALEV2 (Bit 18) */ -#define DSD_EVFLAG_ALEV2_Msk (0x40000UL) /*!< DSD EVFLAG: ALEV2 (Bitfield-Mask: 0x01) */ -#define DSD_EVFLAG_ALEV3_Pos (19UL) /*!< DSD EVFLAG: ALEV3 (Bit 19) */ -#define DSD_EVFLAG_ALEV3_Msk (0x80000UL) /*!< DSD EVFLAG: ALEV3 (Bitfield-Mask: 0x01) */ - -/* -------------------------------- DSD_EVFLAGCLR ------------------------------- */ -#define DSD_EVFLAGCLR_RESEC0_Pos (0UL) /*!< DSD EVFLAGCLR: RESEC0 (Bit 0) */ -#define DSD_EVFLAGCLR_RESEC0_Msk (0x1UL) /*!< DSD EVFLAGCLR: RESEC0 (Bitfield-Mask: 0x01) */ -#define DSD_EVFLAGCLR_RESEC1_Pos (1UL) /*!< DSD EVFLAGCLR: RESEC1 (Bit 1) */ -#define DSD_EVFLAGCLR_RESEC1_Msk (0x2UL) /*!< DSD EVFLAGCLR: RESEC1 (Bitfield-Mask: 0x01) */ -#define DSD_EVFLAGCLR_RESEC2_Pos (2UL) /*!< DSD EVFLAGCLR: RESEC2 (Bit 2) */ -#define DSD_EVFLAGCLR_RESEC2_Msk (0x4UL) /*!< DSD EVFLAGCLR: RESEC2 (Bitfield-Mask: 0x01) */ -#define DSD_EVFLAGCLR_RESEC3_Pos (3UL) /*!< DSD EVFLAGCLR: RESEC3 (Bit 3) */ -#define DSD_EVFLAGCLR_RESEC3_Msk (0x8UL) /*!< DSD EVFLAGCLR: RESEC3 (Bitfield-Mask: 0x01) */ -#define DSD_EVFLAGCLR_ALEC0_Pos (16UL) /*!< DSD EVFLAGCLR: ALEC0 (Bit 16) */ -#define DSD_EVFLAGCLR_ALEC0_Msk (0x10000UL) /*!< DSD EVFLAGCLR: ALEC0 (Bitfield-Mask: 0x01) */ -#define DSD_EVFLAGCLR_ALEC1_Pos (17UL) /*!< DSD EVFLAGCLR: ALEC1 (Bit 17) */ -#define DSD_EVFLAGCLR_ALEC1_Msk (0x20000UL) /*!< DSD EVFLAGCLR: ALEC1 (Bitfield-Mask: 0x01) */ -#define DSD_EVFLAGCLR_ALEC2_Pos (18UL) /*!< DSD EVFLAGCLR: ALEC2 (Bit 18) */ -#define DSD_EVFLAGCLR_ALEC2_Msk (0x40000UL) /*!< DSD EVFLAGCLR: ALEC2 (Bitfield-Mask: 0x01) */ -#define DSD_EVFLAGCLR_ALEC3_Pos (19UL) /*!< DSD EVFLAGCLR: ALEC3 (Bit 19) */ -#define DSD_EVFLAGCLR_ALEC3_Msk (0x80000UL) /*!< DSD EVFLAGCLR: ALEC3 (Bitfield-Mask: 0x01) */ - - -/* ================================================================================ */ -/* ================ Group 'DSD_CH' Position & Mask ================ */ -/* ================================================================================ */ - - -/* -------------------------------- DSD_CH_MODCFG ------------------------------- */ -#define DSD_CH_MODCFG_DIVM_Pos (16UL) /*!< DSD_CH MODCFG: DIVM (Bit 16) */ -#define DSD_CH_MODCFG_DIVM_Msk (0xf0000UL) /*!< DSD_CH MODCFG: DIVM (Bitfield-Mask: 0x0f) */ -#define DSD_CH_MODCFG_DWC_Pos (23UL) /*!< DSD_CH MODCFG: DWC (Bit 23) */ -#define DSD_CH_MODCFG_DWC_Msk (0x800000UL) /*!< DSD_CH MODCFG: DWC (Bitfield-Mask: 0x01) */ - -/* -------------------------------- DSD_CH_DICFG -------------------------------- */ -#define DSD_CH_DICFG_DSRC_Pos (0UL) /*!< DSD_CH DICFG: DSRC (Bit 0) */ -#define DSD_CH_DICFG_DSRC_Msk (0xfUL) /*!< DSD_CH DICFG: DSRC (Bitfield-Mask: 0x0f) */ -#define DSD_CH_DICFG_DSWC_Pos (7UL) /*!< DSD_CH DICFG: DSWC (Bit 7) */ -#define DSD_CH_DICFG_DSWC_Msk (0x80UL) /*!< DSD_CH DICFG: DSWC (Bitfield-Mask: 0x01) */ -#define DSD_CH_DICFG_ITRMODE_Pos (8UL) /*!< DSD_CH DICFG: ITRMODE (Bit 8) */ -#define DSD_CH_DICFG_ITRMODE_Msk (0x300UL) /*!< DSD_CH DICFG: ITRMODE (Bitfield-Mask: 0x03) */ -#define DSD_CH_DICFG_TSTRMODE_Pos (10UL) /*!< DSD_CH DICFG: TSTRMODE (Bit 10) */ -#define DSD_CH_DICFG_TSTRMODE_Msk (0xc00UL) /*!< DSD_CH DICFG: TSTRMODE (Bitfield-Mask: 0x03) */ -#define DSD_CH_DICFG_TRSEL_Pos (12UL) /*!< DSD_CH DICFG: TRSEL (Bit 12) */ -#define DSD_CH_DICFG_TRSEL_Msk (0x7000UL) /*!< DSD_CH DICFG: TRSEL (Bitfield-Mask: 0x07) */ -#define DSD_CH_DICFG_TRWC_Pos (15UL) /*!< DSD_CH DICFG: TRWC (Bit 15) */ -#define DSD_CH_DICFG_TRWC_Msk (0x8000UL) /*!< DSD_CH DICFG: TRWC (Bitfield-Mask: 0x01) */ -#define DSD_CH_DICFG_CSRC_Pos (16UL) /*!< DSD_CH DICFG: CSRC (Bit 16) */ -#define DSD_CH_DICFG_CSRC_Msk (0xf0000UL) /*!< DSD_CH DICFG: CSRC (Bitfield-Mask: 0x0f) */ -#define DSD_CH_DICFG_STROBE_Pos (20UL) /*!< DSD_CH DICFG: STROBE (Bit 20) */ -#define DSD_CH_DICFG_STROBE_Msk (0xf00000UL) /*!< DSD_CH DICFG: STROBE (Bitfield-Mask: 0x0f) */ -#define DSD_CH_DICFG_SCWC_Pos (31UL) /*!< DSD_CH DICFG: SCWC (Bit 31) */ -#define DSD_CH_DICFG_SCWC_Msk (0x80000000UL) /*!< DSD_CH DICFG: SCWC (Bitfield-Mask: 0x01) */ - -/* -------------------------------- DSD_CH_FCFGC -------------------------------- */ -#define DSD_CH_FCFGC_CFMDF_Pos (0UL) /*!< DSD_CH FCFGC: CFMDF (Bit 0) */ -#define DSD_CH_FCFGC_CFMDF_Msk (0xffUL) /*!< DSD_CH FCFGC: CFMDF (Bitfield-Mask: 0xff) */ -#define DSD_CH_FCFGC_CFMC_Pos (8UL) /*!< DSD_CH FCFGC: CFMC (Bit 8) */ -#define DSD_CH_FCFGC_CFMC_Msk (0x300UL) /*!< DSD_CH FCFGC: CFMC (Bitfield-Mask: 0x03) */ -#define DSD_CH_FCFGC_CFEN_Pos (10UL) /*!< DSD_CH FCFGC: CFEN (Bit 10) */ -#define DSD_CH_FCFGC_CFEN_Msk (0x400UL) /*!< DSD_CH FCFGC: CFEN (Bitfield-Mask: 0x01) */ -#define DSD_CH_FCFGC_SRGM_Pos (14UL) /*!< DSD_CH FCFGC: SRGM (Bit 14) */ -#define DSD_CH_FCFGC_SRGM_Msk (0xc000UL) /*!< DSD_CH FCFGC: SRGM (Bitfield-Mask: 0x03) */ -#define DSD_CH_FCFGC_CFMSV_Pos (16UL) /*!< DSD_CH FCFGC: CFMSV (Bit 16) */ -#define DSD_CH_FCFGC_CFMSV_Msk (0xff0000UL) /*!< DSD_CH FCFGC: CFMSV (Bitfield-Mask: 0xff) */ -#define DSD_CH_FCFGC_CFMDCNT_Pos (24UL) /*!< DSD_CH FCFGC: CFMDCNT (Bit 24) */ -#define DSD_CH_FCFGC_CFMDCNT_Msk (0xff000000UL) /*!< DSD_CH FCFGC: CFMDCNT (Bitfield-Mask: 0xff) */ - -/* -------------------------------- DSD_CH_FCFGA -------------------------------- */ -#define DSD_CH_FCFGA_CFADF_Pos (0UL) /*!< DSD_CH FCFGA: CFADF (Bit 0) */ -#define DSD_CH_FCFGA_CFADF_Msk (0xffUL) /*!< DSD_CH FCFGA: CFADF (Bitfield-Mask: 0xff) */ -#define DSD_CH_FCFGA_CFAC_Pos (8UL) /*!< DSD_CH FCFGA: CFAC (Bit 8) */ -#define DSD_CH_FCFGA_CFAC_Msk (0x300UL) /*!< DSD_CH FCFGA: CFAC (Bitfield-Mask: 0x03) */ -#define DSD_CH_FCFGA_SRGA_Pos (10UL) /*!< DSD_CH FCFGA: SRGA (Bit 10) */ -#define DSD_CH_FCFGA_SRGA_Msk (0xc00UL) /*!< DSD_CH FCFGA: SRGA (Bitfield-Mask: 0x03) */ -#define DSD_CH_FCFGA_ESEL_Pos (12UL) /*!< DSD_CH FCFGA: ESEL (Bit 12) */ -#define DSD_CH_FCFGA_ESEL_Msk (0x3000UL) /*!< DSD_CH FCFGA: ESEL (Bitfield-Mask: 0x03) */ -#define DSD_CH_FCFGA_EGT_Pos (14UL) /*!< DSD_CH FCFGA: EGT (Bit 14) */ -#define DSD_CH_FCFGA_EGT_Msk (0x4000UL) /*!< DSD_CH FCFGA: EGT (Bitfield-Mask: 0x01) */ -#define DSD_CH_FCFGA_CFADCNT_Pos (24UL) /*!< DSD_CH FCFGA: CFADCNT (Bit 24) */ -#define DSD_CH_FCFGA_CFADCNT_Msk (0xff000000UL) /*!< DSD_CH FCFGA: CFADCNT (Bitfield-Mask: 0xff) */ - -/* -------------------------------- DSD_CH_IWCTR -------------------------------- */ -#define DSD_CH_IWCTR_NVALCNT_Pos (0UL) /*!< DSD_CH IWCTR: NVALCNT (Bit 0) */ -#define DSD_CH_IWCTR_NVALCNT_Msk (0x3fUL) /*!< DSD_CH IWCTR: NVALCNT (Bitfield-Mask: 0x3f) */ -#define DSD_CH_IWCTR_INTEN_Pos (7UL) /*!< DSD_CH IWCTR: INTEN (Bit 7) */ -#define DSD_CH_IWCTR_INTEN_Msk (0x80UL) /*!< DSD_CH IWCTR: INTEN (Bitfield-Mask: 0x01) */ -#define DSD_CH_IWCTR_REPCNT_Pos (8UL) /*!< DSD_CH IWCTR: REPCNT (Bit 8) */ -#define DSD_CH_IWCTR_REPCNT_Msk (0xf00UL) /*!< DSD_CH IWCTR: REPCNT (Bitfield-Mask: 0x0f) */ -#define DSD_CH_IWCTR_REPVAL_Pos (12UL) /*!< DSD_CH IWCTR: REPVAL (Bit 12) */ -#define DSD_CH_IWCTR_REPVAL_Msk (0xf000UL) /*!< DSD_CH IWCTR: REPVAL (Bitfield-Mask: 0x0f) */ -#define DSD_CH_IWCTR_NVALDIS_Pos (16UL) /*!< DSD_CH IWCTR: NVALDIS (Bit 16) */ -#define DSD_CH_IWCTR_NVALDIS_Msk (0x3f0000UL) /*!< DSD_CH IWCTR: NVALDIS (Bitfield-Mask: 0x3f) */ -#define DSD_CH_IWCTR_IWS_Pos (23UL) /*!< DSD_CH IWCTR: IWS (Bit 23) */ -#define DSD_CH_IWCTR_IWS_Msk (0x800000UL) /*!< DSD_CH IWCTR: IWS (Bitfield-Mask: 0x01) */ -#define DSD_CH_IWCTR_NVALINT_Pos (24UL) /*!< DSD_CH IWCTR: NVALINT (Bit 24) */ -#define DSD_CH_IWCTR_NVALINT_Msk (0x3f000000UL) /*!< DSD_CH IWCTR: NVALINT (Bitfield-Mask: 0x3f) */ - -/* ------------------------------- DSD_CH_BOUNDSEL ------------------------------ */ -#define DSD_CH_BOUNDSEL_BOUNDARYL_Pos (0UL) /*!< DSD_CH BOUNDSEL: BOUNDARYL (Bit 0) */ -#define DSD_CH_BOUNDSEL_BOUNDARYL_Msk (0xffffUL) /*!< DSD_CH BOUNDSEL: BOUNDARYL (Bitfield-Mask: 0xffff) */ -#define DSD_CH_BOUNDSEL_BOUNDARYU_Pos (16UL) /*!< DSD_CH BOUNDSEL: BOUNDARYU (Bit 16) */ -#define DSD_CH_BOUNDSEL_BOUNDARYU_Msk (0xffff0000UL) /*!< DSD_CH BOUNDSEL: BOUNDARYU (Bitfield-Mask: 0xffff) */ - -/* --------------------------------- DSD_CH_RESM -------------------------------- */ -#define DSD_CH_RESM_RESULT_Pos (0UL) /*!< DSD_CH RESM: RESULT (Bit 0) */ -#define DSD_CH_RESM_RESULT_Msk (0xffffUL) /*!< DSD_CH RESM: RESULT (Bitfield-Mask: 0xffff) */ - -/* --------------------------------- DSD_CH_OFFM -------------------------------- */ -#define DSD_CH_OFFM_OFFSET_Pos (0UL) /*!< DSD_CH OFFM: OFFSET (Bit 0) */ -#define DSD_CH_OFFM_OFFSET_Msk (0xffffUL) /*!< DSD_CH OFFM: OFFSET (Bitfield-Mask: 0xffff) */ - -/* --------------------------------- DSD_CH_RESA -------------------------------- */ -#define DSD_CH_RESA_RESULT_Pos (0UL) /*!< DSD_CH RESA: RESULT (Bit 0) */ -#define DSD_CH_RESA_RESULT_Msk (0xffffUL) /*!< DSD_CH RESA: RESULT (Bitfield-Mask: 0xffff) */ - -/* -------------------------------- DSD_CH_TSTMP -------------------------------- */ -#define DSD_CH_TSTMP_RESULT_Pos (0UL) /*!< DSD_CH TSTMP: RESULT (Bit 0) */ -#define DSD_CH_TSTMP_RESULT_Msk (0xffffUL) /*!< DSD_CH TSTMP: RESULT (Bitfield-Mask: 0xffff) */ -#define DSD_CH_TSTMP_CFMDCNT_Pos (16UL) /*!< DSD_CH TSTMP: CFMDCNT (Bit 16) */ -#define DSD_CH_TSTMP_CFMDCNT_Msk (0xff0000UL) /*!< DSD_CH TSTMP: CFMDCNT (Bitfield-Mask: 0xff) */ -#define DSD_CH_TSTMP_NVALCNT_Pos (24UL) /*!< DSD_CH TSTMP: NVALCNT (Bit 24) */ -#define DSD_CH_TSTMP_NVALCNT_Msk (0x3f000000UL) /*!< DSD_CH TSTMP: NVALCNT (Bitfield-Mask: 0x3f) */ - -/* -------------------------------- DSD_CH_CGSYNC ------------------------------- */ -#define DSD_CH_CGSYNC_SDCOUNT_Pos (0UL) /*!< DSD_CH CGSYNC: SDCOUNT (Bit 0) */ -#define DSD_CH_CGSYNC_SDCOUNT_Msk (0xffUL) /*!< DSD_CH CGSYNC: SDCOUNT (Bitfield-Mask: 0xff) */ -#define DSD_CH_CGSYNC_SDCAP_Pos (8UL) /*!< DSD_CH CGSYNC: SDCAP (Bit 8) */ -#define DSD_CH_CGSYNC_SDCAP_Msk (0xff00UL) /*!< DSD_CH CGSYNC: SDCAP (Bitfield-Mask: 0xff) */ -#define DSD_CH_CGSYNC_SDPOS_Pos (16UL) /*!< DSD_CH CGSYNC: SDPOS (Bit 16) */ -#define DSD_CH_CGSYNC_SDPOS_Msk (0xff0000UL) /*!< DSD_CH CGSYNC: SDPOS (Bitfield-Mask: 0xff) */ -#define DSD_CH_CGSYNC_SDNEG_Pos (24UL) /*!< DSD_CH CGSYNC: SDNEG (Bit 24) */ -#define DSD_CH_CGSYNC_SDNEG_Msk (0xff000000UL) /*!< DSD_CH CGSYNC: SDNEG (Bitfield-Mask: 0xff) */ - -/* ------------------------------- DSD_CH_RECTCFG ------------------------------- */ -#define DSD_CH_RECTCFG_RFEN_Pos (0UL) /*!< DSD_CH RECTCFG: RFEN (Bit 0) */ -#define DSD_CH_RECTCFG_RFEN_Msk (0x1UL) /*!< DSD_CH RECTCFG: RFEN (Bitfield-Mask: 0x01) */ -#define DSD_CH_RECTCFG_SSRC_Pos (4UL) /*!< DSD_CH RECTCFG: SSRC (Bit 4) */ -#define DSD_CH_RECTCFG_SSRC_Msk (0x30UL) /*!< DSD_CH RECTCFG: SSRC (Bitfield-Mask: 0x03) */ -#define DSD_CH_RECTCFG_SDVAL_Pos (15UL) /*!< DSD_CH RECTCFG: SDVAL (Bit 15) */ -#define DSD_CH_RECTCFG_SDVAL_Msk (0x8000UL) /*!< DSD_CH RECTCFG: SDVAL (Bitfield-Mask: 0x01) */ -#define DSD_CH_RECTCFG_SGNCS_Pos (30UL) /*!< DSD_CH RECTCFG: SGNCS (Bit 30) */ -#define DSD_CH_RECTCFG_SGNCS_Msk (0x40000000UL) /*!< DSD_CH RECTCFG: SGNCS (Bitfield-Mask: 0x01) */ -#define DSD_CH_RECTCFG_SGND_Pos (31UL) /*!< DSD_CH RECTCFG: SGND (Bit 31) */ -#define DSD_CH_RECTCFG_SGND_Msk (0x80000000UL) /*!< DSD_CH RECTCFG: SGND (Bitfield-Mask: 0x01) */ - - -/* ================================================================================ */ -/* ================ struct 'DAC' Position & Mask ================ */ -/* ================================================================================ */ - - -/* ----------------------------------- DAC_ID ----------------------------------- */ -#define DAC_ID_MODR_Pos (0UL) /*!< DAC ID: MODR (Bit 0) */ -#define DAC_ID_MODR_Msk (0xffUL) /*!< DAC ID: MODR (Bitfield-Mask: 0xff) */ -#define DAC_ID_MODT_Pos (8UL) /*!< DAC ID: MODT (Bit 8) */ -#define DAC_ID_MODT_Msk (0xff00UL) /*!< DAC ID: MODT (Bitfield-Mask: 0xff) */ -#define DAC_ID_MODN_Pos (16UL) /*!< DAC ID: MODN (Bit 16) */ -#define DAC_ID_MODN_Msk (0xffff0000UL) /*!< DAC ID: MODN (Bitfield-Mask: 0xffff) */ - -/* -------------------------------- DAC_DAC0CFG0 -------------------------------- */ -#define DAC_DAC0CFG0_FREQ_Pos (0UL) /*!< DAC DAC0CFG0: FREQ (Bit 0) */ -#define DAC_DAC0CFG0_FREQ_Msk (0xfffffUL) /*!< DAC DAC0CFG0: FREQ (Bitfield-Mask: 0xfffff) */ -#define DAC_DAC0CFG0_MODE_Pos (20UL) /*!< DAC DAC0CFG0: MODE (Bit 20) */ -#define DAC_DAC0CFG0_MODE_Msk (0x700000UL) /*!< DAC DAC0CFG0: MODE (Bitfield-Mask: 0x07) */ -#define DAC_DAC0CFG0_SIGN_Pos (23UL) /*!< DAC DAC0CFG0: SIGN (Bit 23) */ -#define DAC_DAC0CFG0_SIGN_Msk (0x800000UL) /*!< DAC DAC0CFG0: SIGN (Bitfield-Mask: 0x01) */ -#define DAC_DAC0CFG0_FIFOIND_Pos (24UL) /*!< DAC DAC0CFG0: FIFOIND (Bit 24) */ -#define DAC_DAC0CFG0_FIFOIND_Msk (0x3000000UL) /*!< DAC DAC0CFG0: FIFOIND (Bitfield-Mask: 0x03) */ -#define DAC_DAC0CFG0_FIFOEMP_Pos (26UL) /*!< DAC DAC0CFG0: FIFOEMP (Bit 26) */ -#define DAC_DAC0CFG0_FIFOEMP_Msk (0x4000000UL) /*!< DAC DAC0CFG0: FIFOEMP (Bitfield-Mask: 0x01) */ -#define DAC_DAC0CFG0_FIFOFUL_Pos (27UL) /*!< DAC DAC0CFG0: FIFOFUL (Bit 27) */ -#define DAC_DAC0CFG0_FIFOFUL_Msk (0x8000000UL) /*!< DAC DAC0CFG0: FIFOFUL (Bitfield-Mask: 0x01) */ -#define DAC_DAC0CFG0_NEGATE_Pos (28UL) /*!< DAC DAC0CFG0: NEGATE (Bit 28) */ -#define DAC_DAC0CFG0_NEGATE_Msk (0x10000000UL) /*!< DAC DAC0CFG0: NEGATE (Bitfield-Mask: 0x01) */ -#define DAC_DAC0CFG0_SIGNEN_Pos (29UL) /*!< DAC DAC0CFG0: SIGNEN (Bit 29) */ -#define DAC_DAC0CFG0_SIGNEN_Msk (0x20000000UL) /*!< DAC DAC0CFG0: SIGNEN (Bitfield-Mask: 0x01) */ -#define DAC_DAC0CFG0_SREN_Pos (30UL) /*!< DAC DAC0CFG0: SREN (Bit 30) */ -#define DAC_DAC0CFG0_SREN_Msk (0x40000000UL) /*!< DAC DAC0CFG0: SREN (Bitfield-Mask: 0x01) */ -#define DAC_DAC0CFG0_RUN_Pos (31UL) /*!< DAC DAC0CFG0: RUN (Bit 31) */ -#define DAC_DAC0CFG0_RUN_Msk (0x80000000UL) /*!< DAC DAC0CFG0: RUN (Bitfield-Mask: 0x01) */ - -/* -------------------------------- DAC_DAC0CFG1 -------------------------------- */ -#define DAC_DAC0CFG1_SCALE_Pos (0UL) /*!< DAC DAC0CFG1: SCALE (Bit 0) */ -#define DAC_DAC0CFG1_SCALE_Msk (0x7UL) /*!< DAC DAC0CFG1: SCALE (Bitfield-Mask: 0x07) */ -#define DAC_DAC0CFG1_MULDIV_Pos (3UL) /*!< DAC DAC0CFG1: MULDIV (Bit 3) */ -#define DAC_DAC0CFG1_MULDIV_Msk (0x8UL) /*!< DAC DAC0CFG1: MULDIV (Bitfield-Mask: 0x01) */ -#define DAC_DAC0CFG1_OFFS_Pos (4UL) /*!< DAC DAC0CFG1: OFFS (Bit 4) */ -#define DAC_DAC0CFG1_OFFS_Msk (0xff0UL) /*!< DAC DAC0CFG1: OFFS (Bitfield-Mask: 0xff) */ -#define DAC_DAC0CFG1_TRIGSEL_Pos (12UL) /*!< DAC DAC0CFG1: TRIGSEL (Bit 12) */ -#define DAC_DAC0CFG1_TRIGSEL_Msk (0x7000UL) /*!< DAC DAC0CFG1: TRIGSEL (Bitfield-Mask: 0x07) */ -#define DAC_DAC0CFG1_DATMOD_Pos (15UL) /*!< DAC DAC0CFG1: DATMOD (Bit 15) */ -#define DAC_DAC0CFG1_DATMOD_Msk (0x8000UL) /*!< DAC DAC0CFG1: DATMOD (Bitfield-Mask: 0x01) */ -#define DAC_DAC0CFG1_SWTRIG_Pos (16UL) /*!< DAC DAC0CFG1: SWTRIG (Bit 16) */ -#define DAC_DAC0CFG1_SWTRIG_Msk (0x10000UL) /*!< DAC DAC0CFG1: SWTRIG (Bitfield-Mask: 0x01) */ -#define DAC_DAC0CFG1_TRIGMOD_Pos (17UL) /*!< DAC DAC0CFG1: TRIGMOD (Bit 17) */ -#define DAC_DAC0CFG1_TRIGMOD_Msk (0x60000UL) /*!< DAC DAC0CFG1: TRIGMOD (Bitfield-Mask: 0x03) */ -#define DAC_DAC0CFG1_ANACFG_Pos (19UL) /*!< DAC DAC0CFG1: ANACFG (Bit 19) */ -#define DAC_DAC0CFG1_ANACFG_Msk (0xf80000UL) /*!< DAC DAC0CFG1: ANACFG (Bitfield-Mask: 0x1f) */ -#define DAC_DAC0CFG1_ANAEN_Pos (24UL) /*!< DAC DAC0CFG1: ANAEN (Bit 24) */ -#define DAC_DAC0CFG1_ANAEN_Msk (0x1000000UL) /*!< DAC DAC0CFG1: ANAEN (Bitfield-Mask: 0x01) */ -#define DAC_DAC0CFG1_REFCFGL_Pos (28UL) /*!< DAC DAC0CFG1: REFCFGL (Bit 28) */ -#define DAC_DAC0CFG1_REFCFGL_Msk (0xf0000000UL) /*!< DAC DAC0CFG1: REFCFGL (Bitfield-Mask: 0x0f) */ - -/* -------------------------------- DAC_DAC1CFG0 -------------------------------- */ -#define DAC_DAC1CFG0_FREQ_Pos (0UL) /*!< DAC DAC1CFG0: FREQ (Bit 0) */ -#define DAC_DAC1CFG0_FREQ_Msk (0xfffffUL) /*!< DAC DAC1CFG0: FREQ (Bitfield-Mask: 0xfffff) */ -#define DAC_DAC1CFG0_MODE_Pos (20UL) /*!< DAC DAC1CFG0: MODE (Bit 20) */ -#define DAC_DAC1CFG0_MODE_Msk (0x700000UL) /*!< DAC DAC1CFG0: MODE (Bitfield-Mask: 0x07) */ -#define DAC_DAC1CFG0_SIGN_Pos (23UL) /*!< DAC DAC1CFG0: SIGN (Bit 23) */ -#define DAC_DAC1CFG0_SIGN_Msk (0x800000UL) /*!< DAC DAC1CFG0: SIGN (Bitfield-Mask: 0x01) */ -#define DAC_DAC1CFG0_FIFOIND_Pos (24UL) /*!< DAC DAC1CFG0: FIFOIND (Bit 24) */ -#define DAC_DAC1CFG0_FIFOIND_Msk (0x3000000UL) /*!< DAC DAC1CFG0: FIFOIND (Bitfield-Mask: 0x03) */ -#define DAC_DAC1CFG0_FIFOEMP_Pos (26UL) /*!< DAC DAC1CFG0: FIFOEMP (Bit 26) */ -#define DAC_DAC1CFG0_FIFOEMP_Msk (0x4000000UL) /*!< DAC DAC1CFG0: FIFOEMP (Bitfield-Mask: 0x01) */ -#define DAC_DAC1CFG0_FIFOFUL_Pos (27UL) /*!< DAC DAC1CFG0: FIFOFUL (Bit 27) */ -#define DAC_DAC1CFG0_FIFOFUL_Msk (0x8000000UL) /*!< DAC DAC1CFG0: FIFOFUL (Bitfield-Mask: 0x01) */ -#define DAC_DAC1CFG0_NEGATE_Pos (28UL) /*!< DAC DAC1CFG0: NEGATE (Bit 28) */ -#define DAC_DAC1CFG0_NEGATE_Msk (0x10000000UL) /*!< DAC DAC1CFG0: NEGATE (Bitfield-Mask: 0x01) */ -#define DAC_DAC1CFG0_SIGNEN_Pos (29UL) /*!< DAC DAC1CFG0: SIGNEN (Bit 29) */ -#define DAC_DAC1CFG0_SIGNEN_Msk (0x20000000UL) /*!< DAC DAC1CFG0: SIGNEN (Bitfield-Mask: 0x01) */ -#define DAC_DAC1CFG0_SREN_Pos (30UL) /*!< DAC DAC1CFG0: SREN (Bit 30) */ -#define DAC_DAC1CFG0_SREN_Msk (0x40000000UL) /*!< DAC DAC1CFG0: SREN (Bitfield-Mask: 0x01) */ -#define DAC_DAC1CFG0_RUN_Pos (31UL) /*!< DAC DAC1CFG0: RUN (Bit 31) */ -#define DAC_DAC1CFG0_RUN_Msk (0x80000000UL) /*!< DAC DAC1CFG0: RUN (Bitfield-Mask: 0x01) */ - -/* -------------------------------- DAC_DAC1CFG1 -------------------------------- */ -#define DAC_DAC1CFG1_SCALE_Pos (0UL) /*!< DAC DAC1CFG1: SCALE (Bit 0) */ -#define DAC_DAC1CFG1_SCALE_Msk (0x7UL) /*!< DAC DAC1CFG1: SCALE (Bitfield-Mask: 0x07) */ -#define DAC_DAC1CFG1_MULDIV_Pos (3UL) /*!< DAC DAC1CFG1: MULDIV (Bit 3) */ -#define DAC_DAC1CFG1_MULDIV_Msk (0x8UL) /*!< DAC DAC1CFG1: MULDIV (Bitfield-Mask: 0x01) */ -#define DAC_DAC1CFG1_OFFS_Pos (4UL) /*!< DAC DAC1CFG1: OFFS (Bit 4) */ -#define DAC_DAC1CFG1_OFFS_Msk (0xff0UL) /*!< DAC DAC1CFG1: OFFS (Bitfield-Mask: 0xff) */ -#define DAC_DAC1CFG1_TRIGSEL_Pos (12UL) /*!< DAC DAC1CFG1: TRIGSEL (Bit 12) */ -#define DAC_DAC1CFG1_TRIGSEL_Msk (0x7000UL) /*!< DAC DAC1CFG1: TRIGSEL (Bitfield-Mask: 0x07) */ -#define DAC_DAC1CFG1_SWTRIG_Pos (16UL) /*!< DAC DAC1CFG1: SWTRIG (Bit 16) */ -#define DAC_DAC1CFG1_SWTRIG_Msk (0x10000UL) /*!< DAC DAC1CFG1: SWTRIG (Bitfield-Mask: 0x01) */ -#define DAC_DAC1CFG1_TRIGMOD_Pos (17UL) /*!< DAC DAC1CFG1: TRIGMOD (Bit 17) */ -#define DAC_DAC1CFG1_TRIGMOD_Msk (0x60000UL) /*!< DAC DAC1CFG1: TRIGMOD (Bitfield-Mask: 0x03) */ -#define DAC_DAC1CFG1_ANACFG_Pos (19UL) /*!< DAC DAC1CFG1: ANACFG (Bit 19) */ -#define DAC_DAC1CFG1_ANACFG_Msk (0xf80000UL) /*!< DAC DAC1CFG1: ANACFG (Bitfield-Mask: 0x1f) */ -#define DAC_DAC1CFG1_ANAEN_Pos (24UL) /*!< DAC DAC1CFG1: ANAEN (Bit 24) */ -#define DAC_DAC1CFG1_ANAEN_Msk (0x1000000UL) /*!< DAC DAC1CFG1: ANAEN (Bitfield-Mask: 0x01) */ -#define DAC_DAC1CFG1_REFCFGH_Pos (28UL) /*!< DAC DAC1CFG1: REFCFGH (Bit 28) */ -#define DAC_DAC1CFG1_REFCFGH_Msk (0xf0000000UL) /*!< DAC DAC1CFG1: REFCFGH (Bitfield-Mask: 0x0f) */ - -/* -------------------------------- DAC_DAC0DATA -------------------------------- */ -#define DAC_DAC0DATA_DATA0_Pos (0UL) /*!< DAC DAC0DATA: DATA0 (Bit 0) */ -#define DAC_DAC0DATA_DATA0_Msk (0xfffUL) /*!< DAC DAC0DATA: DATA0 (Bitfield-Mask: 0xfff) */ - -/* -------------------------------- DAC_DAC1DATA -------------------------------- */ -#define DAC_DAC1DATA_DATA1_Pos (0UL) /*!< DAC DAC1DATA: DATA1 (Bit 0) */ -#define DAC_DAC1DATA_DATA1_Msk (0xfffUL) /*!< DAC DAC1DATA: DATA1 (Bitfield-Mask: 0xfff) */ - -/* -------------------------------- DAC_DAC01DATA ------------------------------- */ -#define DAC_DAC01DATA_DATA0_Pos (0UL) /*!< DAC DAC01DATA: DATA0 (Bit 0) */ -#define DAC_DAC01DATA_DATA0_Msk (0xfffUL) /*!< DAC DAC01DATA: DATA0 (Bitfield-Mask: 0xfff) */ -#define DAC_DAC01DATA_DATA1_Pos (16UL) /*!< DAC DAC01DATA: DATA1 (Bit 16) */ -#define DAC_DAC01DATA_DATA1_Msk (0xfff0000UL) /*!< DAC DAC01DATA: DATA1 (Bitfield-Mask: 0xfff) */ - -/* -------------------------------- DAC_DAC0PATL -------------------------------- */ -#define DAC_DAC0PATL_PAT0_Pos (0UL) /*!< DAC DAC0PATL: PAT0 (Bit 0) */ -#define DAC_DAC0PATL_PAT0_Msk (0x1fUL) /*!< DAC DAC0PATL: PAT0 (Bitfield-Mask: 0x1f) */ -#define DAC_DAC0PATL_PAT1_Pos (5UL) /*!< DAC DAC0PATL: PAT1 (Bit 5) */ -#define DAC_DAC0PATL_PAT1_Msk (0x3e0UL) /*!< DAC DAC0PATL: PAT1 (Bitfield-Mask: 0x1f) */ -#define DAC_DAC0PATL_PAT2_Pos (10UL) /*!< DAC DAC0PATL: PAT2 (Bit 10) */ -#define DAC_DAC0PATL_PAT2_Msk (0x7c00UL) /*!< DAC DAC0PATL: PAT2 (Bitfield-Mask: 0x1f) */ -#define DAC_DAC0PATL_PAT3_Pos (15UL) /*!< DAC DAC0PATL: PAT3 (Bit 15) */ -#define DAC_DAC0PATL_PAT3_Msk (0xf8000UL) /*!< DAC DAC0PATL: PAT3 (Bitfield-Mask: 0x1f) */ -#define DAC_DAC0PATL_PAT4_Pos (20UL) /*!< DAC DAC0PATL: PAT4 (Bit 20) */ -#define DAC_DAC0PATL_PAT4_Msk (0x1f00000UL) /*!< DAC DAC0PATL: PAT4 (Bitfield-Mask: 0x1f) */ -#define DAC_DAC0PATL_PAT5_Pos (25UL) /*!< DAC DAC0PATL: PAT5 (Bit 25) */ -#define DAC_DAC0PATL_PAT5_Msk (0x3e000000UL) /*!< DAC DAC0PATL: PAT5 (Bitfield-Mask: 0x1f) */ - -/* -------------------------------- DAC_DAC0PATH -------------------------------- */ -#define DAC_DAC0PATH_PAT6_Pos (0UL) /*!< DAC DAC0PATH: PAT6 (Bit 0) */ -#define DAC_DAC0PATH_PAT6_Msk (0x1fUL) /*!< DAC DAC0PATH: PAT6 (Bitfield-Mask: 0x1f) */ -#define DAC_DAC0PATH_PAT7_Pos (5UL) /*!< DAC DAC0PATH: PAT7 (Bit 5) */ -#define DAC_DAC0PATH_PAT7_Msk (0x3e0UL) /*!< DAC DAC0PATH: PAT7 (Bitfield-Mask: 0x1f) */ -#define DAC_DAC0PATH_PAT8_Pos (10UL) /*!< DAC DAC0PATH: PAT8 (Bit 10) */ -#define DAC_DAC0PATH_PAT8_Msk (0x7c00UL) /*!< DAC DAC0PATH: PAT8 (Bitfield-Mask: 0x1f) */ - -/* -------------------------------- DAC_DAC1PATL -------------------------------- */ -#define DAC_DAC1PATL_PAT0_Pos (0UL) /*!< DAC DAC1PATL: PAT0 (Bit 0) */ -#define DAC_DAC1PATL_PAT0_Msk (0x1fUL) /*!< DAC DAC1PATL: PAT0 (Bitfield-Mask: 0x1f) */ -#define DAC_DAC1PATL_PAT1_Pos (5UL) /*!< DAC DAC1PATL: PAT1 (Bit 5) */ -#define DAC_DAC1PATL_PAT1_Msk (0x3e0UL) /*!< DAC DAC1PATL: PAT1 (Bitfield-Mask: 0x1f) */ -#define DAC_DAC1PATL_PAT2_Pos (10UL) /*!< DAC DAC1PATL: PAT2 (Bit 10) */ -#define DAC_DAC1PATL_PAT2_Msk (0x7c00UL) /*!< DAC DAC1PATL: PAT2 (Bitfield-Mask: 0x1f) */ -#define DAC_DAC1PATL_PAT3_Pos (15UL) /*!< DAC DAC1PATL: PAT3 (Bit 15) */ -#define DAC_DAC1PATL_PAT3_Msk (0xf8000UL) /*!< DAC DAC1PATL: PAT3 (Bitfield-Mask: 0x1f) */ -#define DAC_DAC1PATL_PAT4_Pos (20UL) /*!< DAC DAC1PATL: PAT4 (Bit 20) */ -#define DAC_DAC1PATL_PAT4_Msk (0x1f00000UL) /*!< DAC DAC1PATL: PAT4 (Bitfield-Mask: 0x1f) */ -#define DAC_DAC1PATL_PAT5_Pos (25UL) /*!< DAC DAC1PATL: PAT5 (Bit 25) */ -#define DAC_DAC1PATL_PAT5_Msk (0x3e000000UL) /*!< DAC DAC1PATL: PAT5 (Bitfield-Mask: 0x1f) */ - -/* -------------------------------- DAC_DAC1PATH -------------------------------- */ -#define DAC_DAC1PATH_PAT6_Pos (0UL) /*!< DAC DAC1PATH: PAT6 (Bit 0) */ -#define DAC_DAC1PATH_PAT6_Msk (0x1fUL) /*!< DAC DAC1PATH: PAT6 (Bitfield-Mask: 0x1f) */ -#define DAC_DAC1PATH_PAT7_Pos (5UL) /*!< DAC DAC1PATH: PAT7 (Bit 5) */ -#define DAC_DAC1PATH_PAT7_Msk (0x3e0UL) /*!< DAC DAC1PATH: PAT7 (Bitfield-Mask: 0x1f) */ -#define DAC_DAC1PATH_PAT8_Pos (10UL) /*!< DAC DAC1PATH: PAT8 (Bit 10) */ -#define DAC_DAC1PATH_PAT8_Msk (0x7c00UL) /*!< DAC DAC1PATH: PAT8 (Bitfield-Mask: 0x1f) */ - - -/* ================================================================================ */ -/* ================ Group 'CCU4' Position & Mask ================ */ -/* ================================================================================ */ - - -/* --------------------------------- CCU4_GCTRL --------------------------------- */ -#define CCU4_GCTRL_PRBC_Pos (0UL) /*!< CCU4 GCTRL: PRBC (Bit 0) */ -#define CCU4_GCTRL_PRBC_Msk (0x7UL) /*!< CCU4 GCTRL: PRBC (Bitfield-Mask: 0x07) */ -#define CCU4_GCTRL_PCIS_Pos (4UL) /*!< CCU4 GCTRL: PCIS (Bit 4) */ -#define CCU4_GCTRL_PCIS_Msk (0x30UL) /*!< CCU4 GCTRL: PCIS (Bitfield-Mask: 0x03) */ -#define CCU4_GCTRL_SUSCFG_Pos (8UL) /*!< CCU4 GCTRL: SUSCFG (Bit 8) */ -#define CCU4_GCTRL_SUSCFG_Msk (0x300UL) /*!< CCU4 GCTRL: SUSCFG (Bitfield-Mask: 0x03) */ -#define CCU4_GCTRL_MSE0_Pos (10UL) /*!< CCU4 GCTRL: MSE0 (Bit 10) */ -#define CCU4_GCTRL_MSE0_Msk (0x400UL) /*!< CCU4 GCTRL: MSE0 (Bitfield-Mask: 0x01) */ -#define CCU4_GCTRL_MSE1_Pos (11UL) /*!< CCU4 GCTRL: MSE1 (Bit 11) */ -#define CCU4_GCTRL_MSE1_Msk (0x800UL) /*!< CCU4 GCTRL: MSE1 (Bitfield-Mask: 0x01) */ -#define CCU4_GCTRL_MSE2_Pos (12UL) /*!< CCU4 GCTRL: MSE2 (Bit 12) */ -#define CCU4_GCTRL_MSE2_Msk (0x1000UL) /*!< CCU4 GCTRL: MSE2 (Bitfield-Mask: 0x01) */ -#define CCU4_GCTRL_MSE3_Pos (13UL) /*!< CCU4 GCTRL: MSE3 (Bit 13) */ -#define CCU4_GCTRL_MSE3_Msk (0x2000UL) /*!< CCU4 GCTRL: MSE3 (Bitfield-Mask: 0x01) */ -#define CCU4_GCTRL_MSDE_Pos (14UL) /*!< CCU4 GCTRL: MSDE (Bit 14) */ -#define CCU4_GCTRL_MSDE_Msk (0xc000UL) /*!< CCU4 GCTRL: MSDE (Bitfield-Mask: 0x03) */ - -/* --------------------------------- CCU4_GSTAT --------------------------------- */ -#define CCU4_GSTAT_S0I_Pos (0UL) /*!< CCU4 GSTAT: S0I (Bit 0) */ -#define CCU4_GSTAT_S0I_Msk (0x1UL) /*!< CCU4 GSTAT: S0I (Bitfield-Mask: 0x01) */ -#define CCU4_GSTAT_S1I_Pos (1UL) /*!< CCU4 GSTAT: S1I (Bit 1) */ -#define CCU4_GSTAT_S1I_Msk (0x2UL) /*!< CCU4 GSTAT: S1I (Bitfield-Mask: 0x01) */ -#define CCU4_GSTAT_S2I_Pos (2UL) /*!< CCU4 GSTAT: S2I (Bit 2) */ -#define CCU4_GSTAT_S2I_Msk (0x4UL) /*!< CCU4 GSTAT: S2I (Bitfield-Mask: 0x01) */ -#define CCU4_GSTAT_S3I_Pos (3UL) /*!< CCU4 GSTAT: S3I (Bit 3) */ -#define CCU4_GSTAT_S3I_Msk (0x8UL) /*!< CCU4 GSTAT: S3I (Bitfield-Mask: 0x01) */ -#define CCU4_GSTAT_PRB_Pos (8UL) /*!< CCU4 GSTAT: PRB (Bit 8) */ -#define CCU4_GSTAT_PRB_Msk (0x100UL) /*!< CCU4 GSTAT: PRB (Bitfield-Mask: 0x01) */ - -/* --------------------------------- CCU4_GIDLS --------------------------------- */ -#define CCU4_GIDLS_SS0I_Pos (0UL) /*!< CCU4 GIDLS: SS0I (Bit 0) */ -#define CCU4_GIDLS_SS0I_Msk (0x1UL) /*!< CCU4 GIDLS: SS0I (Bitfield-Mask: 0x01) */ -#define CCU4_GIDLS_SS1I_Pos (1UL) /*!< CCU4 GIDLS: SS1I (Bit 1) */ -#define CCU4_GIDLS_SS1I_Msk (0x2UL) /*!< CCU4 GIDLS: SS1I (Bitfield-Mask: 0x01) */ -#define CCU4_GIDLS_SS2I_Pos (2UL) /*!< CCU4 GIDLS: SS2I (Bit 2) */ -#define CCU4_GIDLS_SS2I_Msk (0x4UL) /*!< CCU4 GIDLS: SS2I (Bitfield-Mask: 0x01) */ -#define CCU4_GIDLS_SS3I_Pos (3UL) /*!< CCU4 GIDLS: SS3I (Bit 3) */ -#define CCU4_GIDLS_SS3I_Msk (0x8UL) /*!< CCU4 GIDLS: SS3I (Bitfield-Mask: 0x01) */ -#define CCU4_GIDLS_CPRB_Pos (8UL) /*!< CCU4 GIDLS: CPRB (Bit 8) */ -#define CCU4_GIDLS_CPRB_Msk (0x100UL) /*!< CCU4 GIDLS: CPRB (Bitfield-Mask: 0x01) */ -#define CCU4_GIDLS_PSIC_Pos (9UL) /*!< CCU4 GIDLS: PSIC (Bit 9) */ -#define CCU4_GIDLS_PSIC_Msk (0x200UL) /*!< CCU4 GIDLS: PSIC (Bitfield-Mask: 0x01) */ - -/* --------------------------------- CCU4_GIDLC --------------------------------- */ -#define CCU4_GIDLC_CS0I_Pos (0UL) /*!< CCU4 GIDLC: CS0I (Bit 0) */ -#define CCU4_GIDLC_CS0I_Msk (0x1UL) /*!< CCU4 GIDLC: CS0I (Bitfield-Mask: 0x01) */ -#define CCU4_GIDLC_CS1I_Pos (1UL) /*!< CCU4 GIDLC: CS1I (Bit 1) */ -#define CCU4_GIDLC_CS1I_Msk (0x2UL) /*!< CCU4 GIDLC: CS1I (Bitfield-Mask: 0x01) */ -#define CCU4_GIDLC_CS2I_Pos (2UL) /*!< CCU4 GIDLC: CS2I (Bit 2) */ -#define CCU4_GIDLC_CS2I_Msk (0x4UL) /*!< CCU4 GIDLC: CS2I (Bitfield-Mask: 0x01) */ -#define CCU4_GIDLC_CS3I_Pos (3UL) /*!< CCU4 GIDLC: CS3I (Bit 3) */ -#define CCU4_GIDLC_CS3I_Msk (0x8UL) /*!< CCU4 GIDLC: CS3I (Bitfield-Mask: 0x01) */ -#define CCU4_GIDLC_SPRB_Pos (8UL) /*!< CCU4 GIDLC: SPRB (Bit 8) */ -#define CCU4_GIDLC_SPRB_Msk (0x100UL) /*!< CCU4 GIDLC: SPRB (Bitfield-Mask: 0x01) */ - -/* ---------------------------------- CCU4_GCSS --------------------------------- */ -#define CCU4_GCSS_S0SE_Pos (0UL) /*!< CCU4 GCSS: S0SE (Bit 0) */ -#define CCU4_GCSS_S0SE_Msk (0x1UL) /*!< CCU4 GCSS: S0SE (Bitfield-Mask: 0x01) */ -#define CCU4_GCSS_S0DSE_Pos (1UL) /*!< CCU4 GCSS: S0DSE (Bit 1) */ -#define CCU4_GCSS_S0DSE_Msk (0x2UL) /*!< CCU4 GCSS: S0DSE (Bitfield-Mask: 0x01) */ -#define CCU4_GCSS_S0PSE_Pos (2UL) /*!< CCU4 GCSS: S0PSE (Bit 2) */ -#define CCU4_GCSS_S0PSE_Msk (0x4UL) /*!< CCU4 GCSS: S0PSE (Bitfield-Mask: 0x01) */ -#define CCU4_GCSS_S1SE_Pos (4UL) /*!< CCU4 GCSS: S1SE (Bit 4) */ -#define CCU4_GCSS_S1SE_Msk (0x10UL) /*!< CCU4 GCSS: S1SE (Bitfield-Mask: 0x01) */ -#define CCU4_GCSS_S1DSE_Pos (5UL) /*!< CCU4 GCSS: S1DSE (Bit 5) */ -#define CCU4_GCSS_S1DSE_Msk (0x20UL) /*!< CCU4 GCSS: S1DSE (Bitfield-Mask: 0x01) */ -#define CCU4_GCSS_S1PSE_Pos (6UL) /*!< CCU4 GCSS: S1PSE (Bit 6) */ -#define CCU4_GCSS_S1PSE_Msk (0x40UL) /*!< CCU4 GCSS: S1PSE (Bitfield-Mask: 0x01) */ -#define CCU4_GCSS_S2SE_Pos (8UL) /*!< CCU4 GCSS: S2SE (Bit 8) */ -#define CCU4_GCSS_S2SE_Msk (0x100UL) /*!< CCU4 GCSS: S2SE (Bitfield-Mask: 0x01) */ -#define CCU4_GCSS_S2DSE_Pos (9UL) /*!< CCU4 GCSS: S2DSE (Bit 9) */ -#define CCU4_GCSS_S2DSE_Msk (0x200UL) /*!< CCU4 GCSS: S2DSE (Bitfield-Mask: 0x01) */ -#define CCU4_GCSS_S2PSE_Pos (10UL) /*!< CCU4 GCSS: S2PSE (Bit 10) */ -#define CCU4_GCSS_S2PSE_Msk (0x400UL) /*!< CCU4 GCSS: S2PSE (Bitfield-Mask: 0x01) */ -#define CCU4_GCSS_S3SE_Pos (12UL) /*!< CCU4 GCSS: S3SE (Bit 12) */ -#define CCU4_GCSS_S3SE_Msk (0x1000UL) /*!< CCU4 GCSS: S3SE (Bitfield-Mask: 0x01) */ -#define CCU4_GCSS_S3DSE_Pos (13UL) /*!< CCU4 GCSS: S3DSE (Bit 13) */ -#define CCU4_GCSS_S3DSE_Msk (0x2000UL) /*!< CCU4 GCSS: S3DSE (Bitfield-Mask: 0x01) */ -#define CCU4_GCSS_S3PSE_Pos (14UL) /*!< CCU4 GCSS: S3PSE (Bit 14) */ -#define CCU4_GCSS_S3PSE_Msk (0x4000UL) /*!< CCU4 GCSS: S3PSE (Bitfield-Mask: 0x01) */ -#define CCU4_GCSS_S0STS_Pos (16UL) /*!< CCU4 GCSS: S0STS (Bit 16) */ -#define CCU4_GCSS_S0STS_Msk (0x10000UL) /*!< CCU4 GCSS: S0STS (Bitfield-Mask: 0x01) */ -#define CCU4_GCSS_S1STS_Pos (17UL) /*!< CCU4 GCSS: S1STS (Bit 17) */ -#define CCU4_GCSS_S1STS_Msk (0x20000UL) /*!< CCU4 GCSS: S1STS (Bitfield-Mask: 0x01) */ -#define CCU4_GCSS_S2STS_Pos (18UL) /*!< CCU4 GCSS: S2STS (Bit 18) */ -#define CCU4_GCSS_S2STS_Msk (0x40000UL) /*!< CCU4 GCSS: S2STS (Bitfield-Mask: 0x01) */ -#define CCU4_GCSS_S3STS_Pos (19UL) /*!< CCU4 GCSS: S3STS (Bit 19) */ -#define CCU4_GCSS_S3STS_Msk (0x80000UL) /*!< CCU4 GCSS: S3STS (Bitfield-Mask: 0x01) */ - -/* ---------------------------------- CCU4_GCSC --------------------------------- */ -#define CCU4_GCSC_S0SC_Pos (0UL) /*!< CCU4 GCSC: S0SC (Bit 0) */ -#define CCU4_GCSC_S0SC_Msk (0x1UL) /*!< CCU4 GCSC: S0SC (Bitfield-Mask: 0x01) */ -#define CCU4_GCSC_S0DSC_Pos (1UL) /*!< CCU4 GCSC: S0DSC (Bit 1) */ -#define CCU4_GCSC_S0DSC_Msk (0x2UL) /*!< CCU4 GCSC: S0DSC (Bitfield-Mask: 0x01) */ -#define CCU4_GCSC_S0PSC_Pos (2UL) /*!< CCU4 GCSC: S0PSC (Bit 2) */ -#define CCU4_GCSC_S0PSC_Msk (0x4UL) /*!< CCU4 GCSC: S0PSC (Bitfield-Mask: 0x01) */ -#define CCU4_GCSC_S1SC_Pos (4UL) /*!< CCU4 GCSC: S1SC (Bit 4) */ -#define CCU4_GCSC_S1SC_Msk (0x10UL) /*!< CCU4 GCSC: S1SC (Bitfield-Mask: 0x01) */ -#define CCU4_GCSC_S1DSC_Pos (5UL) /*!< CCU4 GCSC: S1DSC (Bit 5) */ -#define CCU4_GCSC_S1DSC_Msk (0x20UL) /*!< CCU4 GCSC: S1DSC (Bitfield-Mask: 0x01) */ -#define CCU4_GCSC_S1PSC_Pos (6UL) /*!< CCU4 GCSC: S1PSC (Bit 6) */ -#define CCU4_GCSC_S1PSC_Msk (0x40UL) /*!< CCU4 GCSC: S1PSC (Bitfield-Mask: 0x01) */ -#define CCU4_GCSC_S2SC_Pos (8UL) /*!< CCU4 GCSC: S2SC (Bit 8) */ -#define CCU4_GCSC_S2SC_Msk (0x100UL) /*!< CCU4 GCSC: S2SC (Bitfield-Mask: 0x01) */ -#define CCU4_GCSC_S2DSC_Pos (9UL) /*!< CCU4 GCSC: S2DSC (Bit 9) */ -#define CCU4_GCSC_S2DSC_Msk (0x200UL) /*!< CCU4 GCSC: S2DSC (Bitfield-Mask: 0x01) */ -#define CCU4_GCSC_S2PSC_Pos (10UL) /*!< CCU4 GCSC: S2PSC (Bit 10) */ -#define CCU4_GCSC_S2PSC_Msk (0x400UL) /*!< CCU4 GCSC: S2PSC (Bitfield-Mask: 0x01) */ -#define CCU4_GCSC_S3SC_Pos (12UL) /*!< CCU4 GCSC: S3SC (Bit 12) */ -#define CCU4_GCSC_S3SC_Msk (0x1000UL) /*!< CCU4 GCSC: S3SC (Bitfield-Mask: 0x01) */ -#define CCU4_GCSC_S3DSC_Pos (13UL) /*!< CCU4 GCSC: S3DSC (Bit 13) */ -#define CCU4_GCSC_S3DSC_Msk (0x2000UL) /*!< CCU4 GCSC: S3DSC (Bitfield-Mask: 0x01) */ -#define CCU4_GCSC_S3PSC_Pos (14UL) /*!< CCU4 GCSC: S3PSC (Bit 14) */ -#define CCU4_GCSC_S3PSC_Msk (0x4000UL) /*!< CCU4 GCSC: S3PSC (Bitfield-Mask: 0x01) */ -#define CCU4_GCSC_S0STC_Pos (16UL) /*!< CCU4 GCSC: S0STC (Bit 16) */ -#define CCU4_GCSC_S0STC_Msk (0x10000UL) /*!< CCU4 GCSC: S0STC (Bitfield-Mask: 0x01) */ -#define CCU4_GCSC_S1STC_Pos (17UL) /*!< CCU4 GCSC: S1STC (Bit 17) */ -#define CCU4_GCSC_S1STC_Msk (0x20000UL) /*!< CCU4 GCSC: S1STC (Bitfield-Mask: 0x01) */ -#define CCU4_GCSC_S2STC_Pos (18UL) /*!< CCU4 GCSC: S2STC (Bit 18) */ -#define CCU4_GCSC_S2STC_Msk (0x40000UL) /*!< CCU4 GCSC: S2STC (Bitfield-Mask: 0x01) */ -#define CCU4_GCSC_S3STC_Pos (19UL) /*!< CCU4 GCSC: S3STC (Bit 19) */ -#define CCU4_GCSC_S3STC_Msk (0x80000UL) /*!< CCU4 GCSC: S3STC (Bitfield-Mask: 0x01) */ - -/* ---------------------------------- CCU4_GCST --------------------------------- */ -#define CCU4_GCST_S0SS_Pos (0UL) /*!< CCU4 GCST: S0SS (Bit 0) */ -#define CCU4_GCST_S0SS_Msk (0x1UL) /*!< CCU4 GCST: S0SS (Bitfield-Mask: 0x01) */ -#define CCU4_GCST_S0DSS_Pos (1UL) /*!< CCU4 GCST: S0DSS (Bit 1) */ -#define CCU4_GCST_S0DSS_Msk (0x2UL) /*!< CCU4 GCST: S0DSS (Bitfield-Mask: 0x01) */ -#define CCU4_GCST_S0PSS_Pos (2UL) /*!< CCU4 GCST: S0PSS (Bit 2) */ -#define CCU4_GCST_S0PSS_Msk (0x4UL) /*!< CCU4 GCST: S0PSS (Bitfield-Mask: 0x01) */ -#define CCU4_GCST_S1SS_Pos (4UL) /*!< CCU4 GCST: S1SS (Bit 4) */ -#define CCU4_GCST_S1SS_Msk (0x10UL) /*!< CCU4 GCST: S1SS (Bitfield-Mask: 0x01) */ -#define CCU4_GCST_S1DSS_Pos (5UL) /*!< CCU4 GCST: S1DSS (Bit 5) */ -#define CCU4_GCST_S1DSS_Msk (0x20UL) /*!< CCU4 GCST: S1DSS (Bitfield-Mask: 0x01) */ -#define CCU4_GCST_S1PSS_Pos (6UL) /*!< CCU4 GCST: S1PSS (Bit 6) */ -#define CCU4_GCST_S1PSS_Msk (0x40UL) /*!< CCU4 GCST: S1PSS (Bitfield-Mask: 0x01) */ -#define CCU4_GCST_S2SS_Pos (8UL) /*!< CCU4 GCST: S2SS (Bit 8) */ -#define CCU4_GCST_S2SS_Msk (0x100UL) /*!< CCU4 GCST: S2SS (Bitfield-Mask: 0x01) */ -#define CCU4_GCST_S2DSS_Pos (9UL) /*!< CCU4 GCST: S2DSS (Bit 9) */ -#define CCU4_GCST_S2DSS_Msk (0x200UL) /*!< CCU4 GCST: S2DSS (Bitfield-Mask: 0x01) */ -#define CCU4_GCST_S2PSS_Pos (10UL) /*!< CCU4 GCST: S2PSS (Bit 10) */ -#define CCU4_GCST_S2PSS_Msk (0x400UL) /*!< CCU4 GCST: S2PSS (Bitfield-Mask: 0x01) */ -#define CCU4_GCST_S3SS_Pos (12UL) /*!< CCU4 GCST: S3SS (Bit 12) */ -#define CCU4_GCST_S3SS_Msk (0x1000UL) /*!< CCU4 GCST: S3SS (Bitfield-Mask: 0x01) */ -#define CCU4_GCST_S3DSS_Pos (13UL) /*!< CCU4 GCST: S3DSS (Bit 13) */ -#define CCU4_GCST_S3DSS_Msk (0x2000UL) /*!< CCU4 GCST: S3DSS (Bitfield-Mask: 0x01) */ -#define CCU4_GCST_S3PSS_Pos (14UL) /*!< CCU4 GCST: S3PSS (Bit 14) */ -#define CCU4_GCST_S3PSS_Msk (0x4000UL) /*!< CCU4 GCST: S3PSS (Bitfield-Mask: 0x01) */ -#define CCU4_GCST_CC40ST_Pos (16UL) /*!< CCU4 GCST: CC40ST (Bit 16) */ -#define CCU4_GCST_CC40ST_Msk (0x10000UL) /*!< CCU4 GCST: CC40ST (Bitfield-Mask: 0x01) */ -#define CCU4_GCST_CC41ST_Pos (17UL) /*!< CCU4 GCST: CC41ST (Bit 17) */ -#define CCU4_GCST_CC41ST_Msk (0x20000UL) /*!< CCU4 GCST: CC41ST (Bitfield-Mask: 0x01) */ -#define CCU4_GCST_CC42ST_Pos (18UL) /*!< CCU4 GCST: CC42ST (Bit 18) */ -#define CCU4_GCST_CC42ST_Msk (0x40000UL) /*!< CCU4 GCST: CC42ST (Bitfield-Mask: 0x01) */ -#define CCU4_GCST_CC43ST_Pos (19UL) /*!< CCU4 GCST: CC43ST (Bit 19) */ -#define CCU4_GCST_CC43ST_Msk (0x80000UL) /*!< CCU4 GCST: CC43ST (Bitfield-Mask: 0x01) */ - -/* ---------------------------------- CCU4_MIDR --------------------------------- */ -#define CCU4_MIDR_MODR_Pos (0UL) /*!< CCU4 MIDR: MODR (Bit 0) */ -#define CCU4_MIDR_MODR_Msk (0xffUL) /*!< CCU4 MIDR: MODR (Bitfield-Mask: 0xff) */ -#define CCU4_MIDR_MODT_Pos (8UL) /*!< CCU4 MIDR: MODT (Bit 8) */ -#define CCU4_MIDR_MODT_Msk (0xff00UL) /*!< CCU4 MIDR: MODT (Bitfield-Mask: 0xff) */ -#define CCU4_MIDR_MODN_Pos (16UL) /*!< CCU4 MIDR: MODN (Bit 16) */ -#define CCU4_MIDR_MODN_Msk (0xffff0000UL) /*!< CCU4 MIDR: MODN (Bitfield-Mask: 0xffff) */ - - -/* ================================================================================ */ -/* ================ Group 'CCU4_CC4' Position & Mask ================ */ -/* ================================================================================ */ - - -/* -------------------------------- CCU4_CC4_INS -------------------------------- */ -#define CCU4_CC4_INS_EV0IS_Pos (0UL) /*!< CCU4_CC4 INS: EV0IS (Bit 0) */ -#define CCU4_CC4_INS_EV0IS_Msk (0xfUL) /*!< CCU4_CC4 INS: EV0IS (Bitfield-Mask: 0x0f) */ -#define CCU4_CC4_INS_EV1IS_Pos (4UL) /*!< CCU4_CC4 INS: EV1IS (Bit 4) */ -#define CCU4_CC4_INS_EV1IS_Msk (0xf0UL) /*!< CCU4_CC4 INS: EV1IS (Bitfield-Mask: 0x0f) */ -#define CCU4_CC4_INS_EV2IS_Pos (8UL) /*!< CCU4_CC4 INS: EV2IS (Bit 8) */ -#define CCU4_CC4_INS_EV2IS_Msk (0xf00UL) /*!< CCU4_CC4 INS: EV2IS (Bitfield-Mask: 0x0f) */ -#define CCU4_CC4_INS_EV0EM_Pos (16UL) /*!< CCU4_CC4 INS: EV0EM (Bit 16) */ -#define CCU4_CC4_INS_EV0EM_Msk (0x30000UL) /*!< CCU4_CC4 INS: EV0EM (Bitfield-Mask: 0x03) */ -#define CCU4_CC4_INS_EV1EM_Pos (18UL) /*!< CCU4_CC4 INS: EV1EM (Bit 18) */ -#define CCU4_CC4_INS_EV1EM_Msk (0xc0000UL) /*!< CCU4_CC4 INS: EV1EM (Bitfield-Mask: 0x03) */ -#define CCU4_CC4_INS_EV2EM_Pos (20UL) /*!< CCU4_CC4 INS: EV2EM (Bit 20) */ -#define CCU4_CC4_INS_EV2EM_Msk (0x300000UL) /*!< CCU4_CC4 INS: EV2EM (Bitfield-Mask: 0x03) */ -#define CCU4_CC4_INS_EV0LM_Pos (22UL) /*!< CCU4_CC4 INS: EV0LM (Bit 22) */ -#define CCU4_CC4_INS_EV0LM_Msk (0x400000UL) /*!< CCU4_CC4 INS: EV0LM (Bitfield-Mask: 0x01) */ -#define CCU4_CC4_INS_EV1LM_Pos (23UL) /*!< CCU4_CC4 INS: EV1LM (Bit 23) */ -#define CCU4_CC4_INS_EV1LM_Msk (0x800000UL) /*!< CCU4_CC4 INS: EV1LM (Bitfield-Mask: 0x01) */ -#define CCU4_CC4_INS_EV2LM_Pos (24UL) /*!< CCU4_CC4 INS: EV2LM (Bit 24) */ -#define CCU4_CC4_INS_EV2LM_Msk (0x1000000UL) /*!< CCU4_CC4 INS: EV2LM (Bitfield-Mask: 0x01) */ -#define CCU4_CC4_INS_LPF0M_Pos (25UL) /*!< CCU4_CC4 INS: LPF0M (Bit 25) */ -#define CCU4_CC4_INS_LPF0M_Msk (0x6000000UL) /*!< CCU4_CC4 INS: LPF0M (Bitfield-Mask: 0x03) */ -#define CCU4_CC4_INS_LPF1M_Pos (27UL) /*!< CCU4_CC4 INS: LPF1M (Bit 27) */ -#define CCU4_CC4_INS_LPF1M_Msk (0x18000000UL) /*!< CCU4_CC4 INS: LPF1M (Bitfield-Mask: 0x03) */ -#define CCU4_CC4_INS_LPF2M_Pos (29UL) /*!< CCU4_CC4 INS: LPF2M (Bit 29) */ -#define CCU4_CC4_INS_LPF2M_Msk (0x60000000UL) /*!< CCU4_CC4 INS: LPF2M (Bitfield-Mask: 0x03) */ - -/* -------------------------------- CCU4_CC4_CMC -------------------------------- */ -#define CCU4_CC4_CMC_STRTS_Pos (0UL) /*!< CCU4_CC4 CMC: STRTS (Bit 0) */ -#define CCU4_CC4_CMC_STRTS_Msk (0x3UL) /*!< CCU4_CC4 CMC: STRTS (Bitfield-Mask: 0x03) */ -#define CCU4_CC4_CMC_ENDS_Pos (2UL) /*!< CCU4_CC4 CMC: ENDS (Bit 2) */ -#define CCU4_CC4_CMC_ENDS_Msk (0xcUL) /*!< CCU4_CC4 CMC: ENDS (Bitfield-Mask: 0x03) */ -#define CCU4_CC4_CMC_CAP0S_Pos (4UL) /*!< CCU4_CC4 CMC: CAP0S (Bit 4) */ -#define CCU4_CC4_CMC_CAP0S_Msk (0x30UL) /*!< CCU4_CC4 CMC: CAP0S (Bitfield-Mask: 0x03) */ -#define CCU4_CC4_CMC_CAP1S_Pos (6UL) /*!< CCU4_CC4 CMC: CAP1S (Bit 6) */ -#define CCU4_CC4_CMC_CAP1S_Msk (0xc0UL) /*!< CCU4_CC4 CMC: CAP1S (Bitfield-Mask: 0x03) */ -#define CCU4_CC4_CMC_GATES_Pos (8UL) /*!< CCU4_CC4 CMC: GATES (Bit 8) */ -#define CCU4_CC4_CMC_GATES_Msk (0x300UL) /*!< CCU4_CC4 CMC: GATES (Bitfield-Mask: 0x03) */ -#define CCU4_CC4_CMC_UDS_Pos (10UL) /*!< CCU4_CC4 CMC: UDS (Bit 10) */ -#define CCU4_CC4_CMC_UDS_Msk (0xc00UL) /*!< CCU4_CC4 CMC: UDS (Bitfield-Mask: 0x03) */ -#define CCU4_CC4_CMC_LDS_Pos (12UL) /*!< CCU4_CC4 CMC: LDS (Bit 12) */ -#define CCU4_CC4_CMC_LDS_Msk (0x3000UL) /*!< CCU4_CC4 CMC: LDS (Bitfield-Mask: 0x03) */ -#define CCU4_CC4_CMC_CNTS_Pos (14UL) /*!< CCU4_CC4 CMC: CNTS (Bit 14) */ -#define CCU4_CC4_CMC_CNTS_Msk (0xc000UL) /*!< CCU4_CC4 CMC: CNTS (Bitfield-Mask: 0x03) */ -#define CCU4_CC4_CMC_OFS_Pos (16UL) /*!< CCU4_CC4 CMC: OFS (Bit 16) */ -#define CCU4_CC4_CMC_OFS_Msk (0x10000UL) /*!< CCU4_CC4 CMC: OFS (Bitfield-Mask: 0x01) */ -#define CCU4_CC4_CMC_TS_Pos (17UL) /*!< CCU4_CC4 CMC: TS (Bit 17) */ -#define CCU4_CC4_CMC_TS_Msk (0x20000UL) /*!< CCU4_CC4 CMC: TS (Bitfield-Mask: 0x01) */ -#define CCU4_CC4_CMC_MOS_Pos (18UL) /*!< CCU4_CC4 CMC: MOS (Bit 18) */ -#define CCU4_CC4_CMC_MOS_Msk (0xc0000UL) /*!< CCU4_CC4 CMC: MOS (Bitfield-Mask: 0x03) */ -#define CCU4_CC4_CMC_TCE_Pos (20UL) /*!< CCU4_CC4 CMC: TCE (Bit 20) */ -#define CCU4_CC4_CMC_TCE_Msk (0x100000UL) /*!< CCU4_CC4 CMC: TCE (Bitfield-Mask: 0x01) */ - -/* -------------------------------- CCU4_CC4_TCST ------------------------------- */ -#define CCU4_CC4_TCST_TRB_Pos (0UL) /*!< CCU4_CC4 TCST: TRB (Bit 0) */ -#define CCU4_CC4_TCST_TRB_Msk (0x1UL) /*!< CCU4_CC4 TCST: TRB (Bitfield-Mask: 0x01) */ -#define CCU4_CC4_TCST_CDIR_Pos (1UL) /*!< CCU4_CC4 TCST: CDIR (Bit 1) */ -#define CCU4_CC4_TCST_CDIR_Msk (0x2UL) /*!< CCU4_CC4 TCST: CDIR (Bitfield-Mask: 0x01) */ - -/* ------------------------------- CCU4_CC4_TCSET ------------------------------- */ -#define CCU4_CC4_TCSET_TRBS_Pos (0UL) /*!< CCU4_CC4 TCSET: TRBS (Bit 0) */ -#define CCU4_CC4_TCSET_TRBS_Msk (0x1UL) /*!< CCU4_CC4 TCSET: TRBS (Bitfield-Mask: 0x01) */ - -/* ------------------------------- CCU4_CC4_TCCLR ------------------------------- */ -#define CCU4_CC4_TCCLR_TRBC_Pos (0UL) /*!< CCU4_CC4 TCCLR: TRBC (Bit 0) */ -#define CCU4_CC4_TCCLR_TRBC_Msk (0x1UL) /*!< CCU4_CC4 TCCLR: TRBC (Bitfield-Mask: 0x01) */ -#define CCU4_CC4_TCCLR_TCC_Pos (1UL) /*!< CCU4_CC4 TCCLR: TCC (Bit 1) */ -#define CCU4_CC4_TCCLR_TCC_Msk (0x2UL) /*!< CCU4_CC4 TCCLR: TCC (Bitfield-Mask: 0x01) */ -#define CCU4_CC4_TCCLR_DITC_Pos (2UL) /*!< CCU4_CC4 TCCLR: DITC (Bit 2) */ -#define CCU4_CC4_TCCLR_DITC_Msk (0x4UL) /*!< CCU4_CC4 TCCLR: DITC (Bitfield-Mask: 0x01) */ - -/* --------------------------------- CCU4_CC4_TC -------------------------------- */ -#define CCU4_CC4_TC_TCM_Pos (0UL) /*!< CCU4_CC4 TC: TCM (Bit 0) */ -#define CCU4_CC4_TC_TCM_Msk (0x1UL) /*!< CCU4_CC4 TC: TCM (Bitfield-Mask: 0x01) */ -#define CCU4_CC4_TC_TSSM_Pos (1UL) /*!< CCU4_CC4 TC: TSSM (Bit 1) */ -#define CCU4_CC4_TC_TSSM_Msk (0x2UL) /*!< CCU4_CC4 TC: TSSM (Bitfield-Mask: 0x01) */ -#define CCU4_CC4_TC_CLST_Pos (2UL) /*!< CCU4_CC4 TC: CLST (Bit 2) */ -#define CCU4_CC4_TC_CLST_Msk (0x4UL) /*!< CCU4_CC4 TC: CLST (Bitfield-Mask: 0x01) */ -#define CCU4_CC4_TC_CMOD_Pos (3UL) /*!< CCU4_CC4 TC: CMOD (Bit 3) */ -#define CCU4_CC4_TC_CMOD_Msk (0x8UL) /*!< CCU4_CC4 TC: CMOD (Bitfield-Mask: 0x01) */ -#define CCU4_CC4_TC_ECM_Pos (4UL) /*!< CCU4_CC4 TC: ECM (Bit 4) */ -#define CCU4_CC4_TC_ECM_Msk (0x10UL) /*!< CCU4_CC4 TC: ECM (Bitfield-Mask: 0x01) */ -#define CCU4_CC4_TC_CAPC_Pos (5UL) /*!< CCU4_CC4 TC: CAPC (Bit 5) */ -#define CCU4_CC4_TC_CAPC_Msk (0x60UL) /*!< CCU4_CC4 TC: CAPC (Bitfield-Mask: 0x03) */ -#define CCU4_CC4_TC_ENDM_Pos (8UL) /*!< CCU4_CC4 TC: ENDM (Bit 8) */ -#define CCU4_CC4_TC_ENDM_Msk (0x300UL) /*!< CCU4_CC4 TC: ENDM (Bitfield-Mask: 0x03) */ -#define CCU4_CC4_TC_STRM_Pos (10UL) /*!< CCU4_CC4 TC: STRM (Bit 10) */ -#define CCU4_CC4_TC_STRM_Msk (0x400UL) /*!< CCU4_CC4 TC: STRM (Bitfield-Mask: 0x01) */ -#define CCU4_CC4_TC_SCE_Pos (11UL) /*!< CCU4_CC4 TC: SCE (Bit 11) */ -#define CCU4_CC4_TC_SCE_Msk (0x800UL) /*!< CCU4_CC4 TC: SCE (Bitfield-Mask: 0x01) */ -#define CCU4_CC4_TC_CCS_Pos (12UL) /*!< CCU4_CC4 TC: CCS (Bit 12) */ -#define CCU4_CC4_TC_CCS_Msk (0x1000UL) /*!< CCU4_CC4 TC: CCS (Bitfield-Mask: 0x01) */ -#define CCU4_CC4_TC_DITHE_Pos (13UL) /*!< CCU4_CC4 TC: DITHE (Bit 13) */ -#define CCU4_CC4_TC_DITHE_Msk (0x6000UL) /*!< CCU4_CC4 TC: DITHE (Bitfield-Mask: 0x03) */ -#define CCU4_CC4_TC_DIM_Pos (15UL) /*!< CCU4_CC4 TC: DIM (Bit 15) */ -#define CCU4_CC4_TC_DIM_Msk (0x8000UL) /*!< CCU4_CC4 TC: DIM (Bitfield-Mask: 0x01) */ -#define CCU4_CC4_TC_FPE_Pos (16UL) /*!< CCU4_CC4 TC: FPE (Bit 16) */ -#define CCU4_CC4_TC_FPE_Msk (0x10000UL) /*!< CCU4_CC4 TC: FPE (Bitfield-Mask: 0x01) */ -#define CCU4_CC4_TC_TRAPE_Pos (17UL) /*!< CCU4_CC4 TC: TRAPE (Bit 17) */ -#define CCU4_CC4_TC_TRAPE_Msk (0x20000UL) /*!< CCU4_CC4 TC: TRAPE (Bitfield-Mask: 0x01) */ -#define CCU4_CC4_TC_TRPSE_Pos (21UL) /*!< CCU4_CC4 TC: TRPSE (Bit 21) */ -#define CCU4_CC4_TC_TRPSE_Msk (0x200000UL) /*!< CCU4_CC4 TC: TRPSE (Bitfield-Mask: 0x01) */ -#define CCU4_CC4_TC_TRPSW_Pos (22UL) /*!< CCU4_CC4 TC: TRPSW (Bit 22) */ -#define CCU4_CC4_TC_TRPSW_Msk (0x400000UL) /*!< CCU4_CC4 TC: TRPSW (Bitfield-Mask: 0x01) */ -#define CCU4_CC4_TC_EMS_Pos (23UL) /*!< CCU4_CC4 TC: EMS (Bit 23) */ -#define CCU4_CC4_TC_EMS_Msk (0x800000UL) /*!< CCU4_CC4 TC: EMS (Bitfield-Mask: 0x01) */ -#define CCU4_CC4_TC_EMT_Pos (24UL) /*!< CCU4_CC4 TC: EMT (Bit 24) */ -#define CCU4_CC4_TC_EMT_Msk (0x1000000UL) /*!< CCU4_CC4 TC: EMT (Bitfield-Mask: 0x01) */ -#define CCU4_CC4_TC_MCME_Pos (25UL) /*!< CCU4_CC4 TC: MCME (Bit 25) */ -#define CCU4_CC4_TC_MCME_Msk (0x2000000UL) /*!< CCU4_CC4 TC: MCME (Bitfield-Mask: 0x01) */ - -/* -------------------------------- CCU4_CC4_PSL -------------------------------- */ -#define CCU4_CC4_PSL_PSL_Pos (0UL) /*!< CCU4_CC4 PSL: PSL (Bit 0) */ -#define CCU4_CC4_PSL_PSL_Msk (0x1UL) /*!< CCU4_CC4 PSL: PSL (Bitfield-Mask: 0x01) */ - -/* -------------------------------- CCU4_CC4_DIT -------------------------------- */ -#define CCU4_CC4_DIT_DCV_Pos (0UL) /*!< CCU4_CC4 DIT: DCV (Bit 0) */ -#define CCU4_CC4_DIT_DCV_Msk (0xfUL) /*!< CCU4_CC4 DIT: DCV (Bitfield-Mask: 0x0f) */ -#define CCU4_CC4_DIT_DCNT_Pos (8UL) /*!< CCU4_CC4 DIT: DCNT (Bit 8) */ -#define CCU4_CC4_DIT_DCNT_Msk (0xf00UL) /*!< CCU4_CC4 DIT: DCNT (Bitfield-Mask: 0x0f) */ - -/* -------------------------------- CCU4_CC4_DITS ------------------------------- */ -#define CCU4_CC4_DITS_DCVS_Pos (0UL) /*!< CCU4_CC4 DITS: DCVS (Bit 0) */ -#define CCU4_CC4_DITS_DCVS_Msk (0xfUL) /*!< CCU4_CC4 DITS: DCVS (Bitfield-Mask: 0x0f) */ - -/* -------------------------------- CCU4_CC4_PSC -------------------------------- */ -#define CCU4_CC4_PSC_PSIV_Pos (0UL) /*!< CCU4_CC4 PSC: PSIV (Bit 0) */ -#define CCU4_CC4_PSC_PSIV_Msk (0xfUL) /*!< CCU4_CC4 PSC: PSIV (Bitfield-Mask: 0x0f) */ - -/* -------------------------------- CCU4_CC4_FPC -------------------------------- */ -#define CCU4_CC4_FPC_PCMP_Pos (0UL) /*!< CCU4_CC4 FPC: PCMP (Bit 0) */ -#define CCU4_CC4_FPC_PCMP_Msk (0xfUL) /*!< CCU4_CC4 FPC: PCMP (Bitfield-Mask: 0x0f) */ -#define CCU4_CC4_FPC_PVAL_Pos (8UL) /*!< CCU4_CC4 FPC: PVAL (Bit 8) */ -#define CCU4_CC4_FPC_PVAL_Msk (0xf00UL) /*!< CCU4_CC4 FPC: PVAL (Bitfield-Mask: 0x0f) */ - -/* -------------------------------- CCU4_CC4_FPCS ------------------------------- */ -#define CCU4_CC4_FPCS_PCMP_Pos (0UL) /*!< CCU4_CC4 FPCS: PCMP (Bit 0) */ -#define CCU4_CC4_FPCS_PCMP_Msk (0xfUL) /*!< CCU4_CC4 FPCS: PCMP (Bitfield-Mask: 0x0f) */ - -/* --------------------------------- CCU4_CC4_PR -------------------------------- */ -#define CCU4_CC4_PR_PR_Pos (0UL) /*!< CCU4_CC4 PR: PR (Bit 0) */ -#define CCU4_CC4_PR_PR_Msk (0xffffUL) /*!< CCU4_CC4 PR: PR (Bitfield-Mask: 0xffff) */ - -/* -------------------------------- CCU4_CC4_PRS -------------------------------- */ -#define CCU4_CC4_PRS_PRS_Pos (0UL) /*!< CCU4_CC4 PRS: PRS (Bit 0) */ -#define CCU4_CC4_PRS_PRS_Msk (0xffffUL) /*!< CCU4_CC4 PRS: PRS (Bitfield-Mask: 0xffff) */ - -/* --------------------------------- CCU4_CC4_CR -------------------------------- */ -#define CCU4_CC4_CR_CR_Pos (0UL) /*!< CCU4_CC4 CR: CR (Bit 0) */ -#define CCU4_CC4_CR_CR_Msk (0xffffUL) /*!< CCU4_CC4 CR: CR (Bitfield-Mask: 0xffff) */ - -/* -------------------------------- CCU4_CC4_CRS -------------------------------- */ -#define CCU4_CC4_CRS_CRS_Pos (0UL) /*!< CCU4_CC4 CRS: CRS (Bit 0) */ -#define CCU4_CC4_CRS_CRS_Msk (0xffffUL) /*!< CCU4_CC4 CRS: CRS (Bitfield-Mask: 0xffff) */ - -/* ------------------------------- CCU4_CC4_TIMER ------------------------------- */ -#define CCU4_CC4_TIMER_TVAL_Pos (0UL) /*!< CCU4_CC4 TIMER: TVAL (Bit 0) */ -#define CCU4_CC4_TIMER_TVAL_Msk (0xffffUL) /*!< CCU4_CC4 TIMER: TVAL (Bitfield-Mask: 0xffff) */ - -/* --------------------------------- CCU4_CC4_CV -------------------------------- */ -#define CCU4_CC4_CV_CAPTV_Pos (0UL) /*!< CCU4_CC4 CV: CAPTV (Bit 0) */ -#define CCU4_CC4_CV_CAPTV_Msk (0xffffUL) /*!< CCU4_CC4 CV: CAPTV (Bitfield-Mask: 0xffff) */ -#define CCU4_CC4_CV_FPCV_Pos (16UL) /*!< CCU4_CC4 CV: FPCV (Bit 16) */ -#define CCU4_CC4_CV_FPCV_Msk (0xf0000UL) /*!< CCU4_CC4 CV: FPCV (Bitfield-Mask: 0x0f) */ -#define CCU4_CC4_CV_FFL_Pos (20UL) /*!< CCU4_CC4 CV: FFL (Bit 20) */ -#define CCU4_CC4_CV_FFL_Msk (0x100000UL) /*!< CCU4_CC4 CV: FFL (Bitfield-Mask: 0x01) */ - -/* -------------------------------- CCU4_CC4_INTS ------------------------------- */ -#define CCU4_CC4_INTS_PMUS_Pos (0UL) /*!< CCU4_CC4 INTS: PMUS (Bit 0) */ -#define CCU4_CC4_INTS_PMUS_Msk (0x1UL) /*!< CCU4_CC4 INTS: PMUS (Bitfield-Mask: 0x01) */ -#define CCU4_CC4_INTS_OMDS_Pos (1UL) /*!< CCU4_CC4 INTS: OMDS (Bit 1) */ -#define CCU4_CC4_INTS_OMDS_Msk (0x2UL) /*!< CCU4_CC4 INTS: OMDS (Bitfield-Mask: 0x01) */ -#define CCU4_CC4_INTS_CMUS_Pos (2UL) /*!< CCU4_CC4 INTS: CMUS (Bit 2) */ -#define CCU4_CC4_INTS_CMUS_Msk (0x4UL) /*!< CCU4_CC4 INTS: CMUS (Bitfield-Mask: 0x01) */ -#define CCU4_CC4_INTS_CMDS_Pos (3UL) /*!< CCU4_CC4 INTS: CMDS (Bit 3) */ -#define CCU4_CC4_INTS_CMDS_Msk (0x8UL) /*!< CCU4_CC4 INTS: CMDS (Bitfield-Mask: 0x01) */ -#define CCU4_CC4_INTS_E0AS_Pos (8UL) /*!< CCU4_CC4 INTS: E0AS (Bit 8) */ -#define CCU4_CC4_INTS_E0AS_Msk (0x100UL) /*!< CCU4_CC4 INTS: E0AS (Bitfield-Mask: 0x01) */ -#define CCU4_CC4_INTS_E1AS_Pos (9UL) /*!< CCU4_CC4 INTS: E1AS (Bit 9) */ -#define CCU4_CC4_INTS_E1AS_Msk (0x200UL) /*!< CCU4_CC4 INTS: E1AS (Bitfield-Mask: 0x01) */ -#define CCU4_CC4_INTS_E2AS_Pos (10UL) /*!< CCU4_CC4 INTS: E2AS (Bit 10) */ -#define CCU4_CC4_INTS_E2AS_Msk (0x400UL) /*!< CCU4_CC4 INTS: E2AS (Bitfield-Mask: 0x01) */ -#define CCU4_CC4_INTS_TRPF_Pos (11UL) /*!< CCU4_CC4 INTS: TRPF (Bit 11) */ -#define CCU4_CC4_INTS_TRPF_Msk (0x800UL) /*!< CCU4_CC4 INTS: TRPF (Bitfield-Mask: 0x01) */ - -/* -------------------------------- CCU4_CC4_INTE ------------------------------- */ -#define CCU4_CC4_INTE_PME_Pos (0UL) /*!< CCU4_CC4 INTE: PME (Bit 0) */ -#define CCU4_CC4_INTE_PME_Msk (0x1UL) /*!< CCU4_CC4 INTE: PME (Bitfield-Mask: 0x01) */ -#define CCU4_CC4_INTE_OME_Pos (1UL) /*!< CCU4_CC4 INTE: OME (Bit 1) */ -#define CCU4_CC4_INTE_OME_Msk (0x2UL) /*!< CCU4_CC4 INTE: OME (Bitfield-Mask: 0x01) */ -#define CCU4_CC4_INTE_CMUE_Pos (2UL) /*!< CCU4_CC4 INTE: CMUE (Bit 2) */ -#define CCU4_CC4_INTE_CMUE_Msk (0x4UL) /*!< CCU4_CC4 INTE: CMUE (Bitfield-Mask: 0x01) */ -#define CCU4_CC4_INTE_CMDE_Pos (3UL) /*!< CCU4_CC4 INTE: CMDE (Bit 3) */ -#define CCU4_CC4_INTE_CMDE_Msk (0x8UL) /*!< CCU4_CC4 INTE: CMDE (Bitfield-Mask: 0x01) */ -#define CCU4_CC4_INTE_E0AE_Pos (8UL) /*!< CCU4_CC4 INTE: E0AE (Bit 8) */ -#define CCU4_CC4_INTE_E0AE_Msk (0x100UL) /*!< CCU4_CC4 INTE: E0AE (Bitfield-Mask: 0x01) */ -#define CCU4_CC4_INTE_E1AE_Pos (9UL) /*!< CCU4_CC4 INTE: E1AE (Bit 9) */ -#define CCU4_CC4_INTE_E1AE_Msk (0x200UL) /*!< CCU4_CC4 INTE: E1AE (Bitfield-Mask: 0x01) */ -#define CCU4_CC4_INTE_E2AE_Pos (10UL) /*!< CCU4_CC4 INTE: E2AE (Bit 10) */ -#define CCU4_CC4_INTE_E2AE_Msk (0x400UL) /*!< CCU4_CC4 INTE: E2AE (Bitfield-Mask: 0x01) */ - -/* -------------------------------- CCU4_CC4_SRS -------------------------------- */ -#define CCU4_CC4_SRS_POSR_Pos (0UL) /*!< CCU4_CC4 SRS: POSR (Bit 0) */ -#define CCU4_CC4_SRS_POSR_Msk (0x3UL) /*!< CCU4_CC4 SRS: POSR (Bitfield-Mask: 0x03) */ -#define CCU4_CC4_SRS_CMSR_Pos (2UL) /*!< CCU4_CC4 SRS: CMSR (Bit 2) */ -#define CCU4_CC4_SRS_CMSR_Msk (0xcUL) /*!< CCU4_CC4 SRS: CMSR (Bitfield-Mask: 0x03) */ -#define CCU4_CC4_SRS_E0SR_Pos (8UL) /*!< CCU4_CC4 SRS: E0SR (Bit 8) */ -#define CCU4_CC4_SRS_E0SR_Msk (0x300UL) /*!< CCU4_CC4 SRS: E0SR (Bitfield-Mask: 0x03) */ -#define CCU4_CC4_SRS_E1SR_Pos (10UL) /*!< CCU4_CC4 SRS: E1SR (Bit 10) */ -#define CCU4_CC4_SRS_E1SR_Msk (0xc00UL) /*!< CCU4_CC4 SRS: E1SR (Bitfield-Mask: 0x03) */ -#define CCU4_CC4_SRS_E2SR_Pos (12UL) /*!< CCU4_CC4 SRS: E2SR (Bit 12) */ -#define CCU4_CC4_SRS_E2SR_Msk (0x3000UL) /*!< CCU4_CC4 SRS: E2SR (Bitfield-Mask: 0x03) */ - -/* -------------------------------- CCU4_CC4_SWS -------------------------------- */ -#define CCU4_CC4_SWS_SPM_Pos (0UL) /*!< CCU4_CC4 SWS: SPM (Bit 0) */ -#define CCU4_CC4_SWS_SPM_Msk (0x1UL) /*!< CCU4_CC4 SWS: SPM (Bitfield-Mask: 0x01) */ -#define CCU4_CC4_SWS_SOM_Pos (1UL) /*!< CCU4_CC4 SWS: SOM (Bit 1) */ -#define CCU4_CC4_SWS_SOM_Msk (0x2UL) /*!< CCU4_CC4 SWS: SOM (Bitfield-Mask: 0x01) */ -#define CCU4_CC4_SWS_SCMU_Pos (2UL) /*!< CCU4_CC4 SWS: SCMU (Bit 2) */ -#define CCU4_CC4_SWS_SCMU_Msk (0x4UL) /*!< CCU4_CC4 SWS: SCMU (Bitfield-Mask: 0x01) */ -#define CCU4_CC4_SWS_SCMD_Pos (3UL) /*!< CCU4_CC4 SWS: SCMD (Bit 3) */ -#define CCU4_CC4_SWS_SCMD_Msk (0x8UL) /*!< CCU4_CC4 SWS: SCMD (Bitfield-Mask: 0x01) */ -#define CCU4_CC4_SWS_SE0A_Pos (8UL) /*!< CCU4_CC4 SWS: SE0A (Bit 8) */ -#define CCU4_CC4_SWS_SE0A_Msk (0x100UL) /*!< CCU4_CC4 SWS: SE0A (Bitfield-Mask: 0x01) */ -#define CCU4_CC4_SWS_SE1A_Pos (9UL) /*!< CCU4_CC4 SWS: SE1A (Bit 9) */ -#define CCU4_CC4_SWS_SE1A_Msk (0x200UL) /*!< CCU4_CC4 SWS: SE1A (Bitfield-Mask: 0x01) */ -#define CCU4_CC4_SWS_SE2A_Pos (10UL) /*!< CCU4_CC4 SWS: SE2A (Bit 10) */ -#define CCU4_CC4_SWS_SE2A_Msk (0x400UL) /*!< CCU4_CC4 SWS: SE2A (Bitfield-Mask: 0x01) */ -#define CCU4_CC4_SWS_STRPF_Pos (11UL) /*!< CCU4_CC4 SWS: STRPF (Bit 11) */ -#define CCU4_CC4_SWS_STRPF_Msk (0x800UL) /*!< CCU4_CC4 SWS: STRPF (Bitfield-Mask: 0x01) */ - -/* -------------------------------- CCU4_CC4_SWR -------------------------------- */ -#define CCU4_CC4_SWR_RPM_Pos (0UL) /*!< CCU4_CC4 SWR: RPM (Bit 0) */ -#define CCU4_CC4_SWR_RPM_Msk (0x1UL) /*!< CCU4_CC4 SWR: RPM (Bitfield-Mask: 0x01) */ -#define CCU4_CC4_SWR_ROM_Pos (1UL) /*!< CCU4_CC4 SWR: ROM (Bit 1) */ -#define CCU4_CC4_SWR_ROM_Msk (0x2UL) /*!< CCU4_CC4 SWR: ROM (Bitfield-Mask: 0x01) */ -#define CCU4_CC4_SWR_RCMU_Pos (2UL) /*!< CCU4_CC4 SWR: RCMU (Bit 2) */ -#define CCU4_CC4_SWR_RCMU_Msk (0x4UL) /*!< CCU4_CC4 SWR: RCMU (Bitfield-Mask: 0x01) */ -#define CCU4_CC4_SWR_RCMD_Pos (3UL) /*!< CCU4_CC4 SWR: RCMD (Bit 3) */ -#define CCU4_CC4_SWR_RCMD_Msk (0x8UL) /*!< CCU4_CC4 SWR: RCMD (Bitfield-Mask: 0x01) */ -#define CCU4_CC4_SWR_RE0A_Pos (8UL) /*!< CCU4_CC4 SWR: RE0A (Bit 8) */ -#define CCU4_CC4_SWR_RE0A_Msk (0x100UL) /*!< CCU4_CC4 SWR: RE0A (Bitfield-Mask: 0x01) */ -#define CCU4_CC4_SWR_RE1A_Pos (9UL) /*!< CCU4_CC4 SWR: RE1A (Bit 9) */ -#define CCU4_CC4_SWR_RE1A_Msk (0x200UL) /*!< CCU4_CC4 SWR: RE1A (Bitfield-Mask: 0x01) */ -#define CCU4_CC4_SWR_RE2A_Pos (10UL) /*!< CCU4_CC4 SWR: RE2A (Bit 10) */ -#define CCU4_CC4_SWR_RE2A_Msk (0x400UL) /*!< CCU4_CC4 SWR: RE2A (Bitfield-Mask: 0x01) */ -#define CCU4_CC4_SWR_RTRPF_Pos (11UL) /*!< CCU4_CC4 SWR: RTRPF (Bit 11) */ -#define CCU4_CC4_SWR_RTRPF_Msk (0x800UL) /*!< CCU4_CC4 SWR: RTRPF (Bitfield-Mask: 0x01) */ - -/* ------------------------------- CCU4_CC4_ECRD0 ------------------------------- */ -#define CCU4_CC4_ECRD0_CAPV_Pos (0UL) /*!< CCU4_CC4 ECRD0: CAPV (Bit 0) */ -#define CCU4_CC4_ECRD0_CAPV_Msk (0xffffUL) /*!< CCU4_CC4 ECRD0: CAPV (Bitfield-Mask: 0xffff) */ -#define CCU4_CC4_ECRD0_FPCV_Pos (16UL) /*!< CCU4_CC4 ECRD0: FPCV (Bit 16) */ -#define CCU4_CC4_ECRD0_FPCV_Msk (0xf0000UL) /*!< CCU4_CC4 ECRD0: FPCV (Bitfield-Mask: 0x0f) */ -#define CCU4_CC4_ECRD0_SPTR_Pos (20UL) /*!< CCU4_CC4 ECRD0: SPTR (Bit 20) */ -#define CCU4_CC4_ECRD0_SPTR_Msk (0x300000UL) /*!< CCU4_CC4 ECRD0: SPTR (Bitfield-Mask: 0x03) */ -#define CCU4_CC4_ECRD0_VPTR_Pos (22UL) /*!< CCU4_CC4 ECRD0: VPTR (Bit 22) */ -#define CCU4_CC4_ECRD0_VPTR_Msk (0xc00000UL) /*!< CCU4_CC4 ECRD0: VPTR (Bitfield-Mask: 0x03) */ -#define CCU4_CC4_ECRD0_FFL_Pos (24UL) /*!< CCU4_CC4 ECRD0: FFL (Bit 24) */ -#define CCU4_CC4_ECRD0_FFL_Msk (0x1000000UL) /*!< CCU4_CC4 ECRD0: FFL (Bitfield-Mask: 0x01) */ -#define CCU4_CC4_ECRD0_LCV_Pos (25UL) /*!< CCU4_CC4 ECRD0: LCV (Bit 25) */ -#define CCU4_CC4_ECRD0_LCV_Msk (0x2000000UL) /*!< CCU4_CC4 ECRD0: LCV (Bitfield-Mask: 0x01) */ - -/* ------------------------------- CCU4_CC4_ECRD1 ------------------------------- */ -#define CCU4_CC4_ECRD1_CAPV_Pos (0UL) /*!< CCU4_CC4 ECRD1: CAPV (Bit 0) */ -#define CCU4_CC4_ECRD1_CAPV_Msk (0xffffUL) /*!< CCU4_CC4 ECRD1: CAPV (Bitfield-Mask: 0xffff) */ -#define CCU4_CC4_ECRD1_FPCV_Pos (16UL) /*!< CCU4_CC4 ECRD1: FPCV (Bit 16) */ -#define CCU4_CC4_ECRD1_FPCV_Msk (0xf0000UL) /*!< CCU4_CC4 ECRD1: FPCV (Bitfield-Mask: 0x0f) */ -#define CCU4_CC4_ECRD1_SPTR_Pos (20UL) /*!< CCU4_CC4 ECRD1: SPTR (Bit 20) */ -#define CCU4_CC4_ECRD1_SPTR_Msk (0x300000UL) /*!< CCU4_CC4 ECRD1: SPTR (Bitfield-Mask: 0x03) */ -#define CCU4_CC4_ECRD1_VPTR_Pos (22UL) /*!< CCU4_CC4 ECRD1: VPTR (Bit 22) */ -#define CCU4_CC4_ECRD1_VPTR_Msk (0xc00000UL) /*!< CCU4_CC4 ECRD1: VPTR (Bitfield-Mask: 0x03) */ -#define CCU4_CC4_ECRD1_FFL_Pos (24UL) /*!< CCU4_CC4 ECRD1: FFL (Bit 24) */ -#define CCU4_CC4_ECRD1_FFL_Msk (0x1000000UL) /*!< CCU4_CC4 ECRD1: FFL (Bitfield-Mask: 0x01) */ -#define CCU4_CC4_ECRD1_LCV_Pos (25UL) /*!< CCU4_CC4 ECRD1: LCV (Bit 25) */ -#define CCU4_CC4_ECRD1_LCV_Msk (0x2000000UL) /*!< CCU4_CC4 ECRD1: LCV (Bitfield-Mask: 0x01) */ - - -/* ================================================================================ */ -/* ================ Group 'CCU8' Position & Mask ================ */ -/* ================================================================================ */ - - -/* --------------------------------- CCU8_GCTRL --------------------------------- */ -#define CCU8_GCTRL_PRBC_Pos (0UL) /*!< CCU8 GCTRL: PRBC (Bit 0) */ -#define CCU8_GCTRL_PRBC_Msk (0x7UL) /*!< CCU8 GCTRL: PRBC (Bitfield-Mask: 0x07) */ -#define CCU8_GCTRL_PCIS_Pos (4UL) /*!< CCU8 GCTRL: PCIS (Bit 4) */ -#define CCU8_GCTRL_PCIS_Msk (0x30UL) /*!< CCU8 GCTRL: PCIS (Bitfield-Mask: 0x03) */ -#define CCU8_GCTRL_SUSCFG_Pos (8UL) /*!< CCU8 GCTRL: SUSCFG (Bit 8) */ -#define CCU8_GCTRL_SUSCFG_Msk (0x300UL) /*!< CCU8 GCTRL: SUSCFG (Bitfield-Mask: 0x03) */ -#define CCU8_GCTRL_MSE0_Pos (10UL) /*!< CCU8 GCTRL: MSE0 (Bit 10) */ -#define CCU8_GCTRL_MSE0_Msk (0x400UL) /*!< CCU8 GCTRL: MSE0 (Bitfield-Mask: 0x01) */ -#define CCU8_GCTRL_MSE1_Pos (11UL) /*!< CCU8 GCTRL: MSE1 (Bit 11) */ -#define CCU8_GCTRL_MSE1_Msk (0x800UL) /*!< CCU8 GCTRL: MSE1 (Bitfield-Mask: 0x01) */ -#define CCU8_GCTRL_MSE2_Pos (12UL) /*!< CCU8 GCTRL: MSE2 (Bit 12) */ -#define CCU8_GCTRL_MSE2_Msk (0x1000UL) /*!< CCU8 GCTRL: MSE2 (Bitfield-Mask: 0x01) */ -#define CCU8_GCTRL_MSE3_Pos (13UL) /*!< CCU8 GCTRL: MSE3 (Bit 13) */ -#define CCU8_GCTRL_MSE3_Msk (0x2000UL) /*!< CCU8 GCTRL: MSE3 (Bitfield-Mask: 0x01) */ -#define CCU8_GCTRL_MSDE_Pos (14UL) /*!< CCU8 GCTRL: MSDE (Bit 14) */ -#define CCU8_GCTRL_MSDE_Msk (0xc000UL) /*!< CCU8 GCTRL: MSDE (Bitfield-Mask: 0x03) */ - -/* --------------------------------- CCU8_GSTAT --------------------------------- */ -#define CCU8_GSTAT_S0I_Pos (0UL) /*!< CCU8 GSTAT: S0I (Bit 0) */ -#define CCU8_GSTAT_S0I_Msk (0x1UL) /*!< CCU8 GSTAT: S0I (Bitfield-Mask: 0x01) */ -#define CCU8_GSTAT_S1I_Pos (1UL) /*!< CCU8 GSTAT: S1I (Bit 1) */ -#define CCU8_GSTAT_S1I_Msk (0x2UL) /*!< CCU8 GSTAT: S1I (Bitfield-Mask: 0x01) */ -#define CCU8_GSTAT_S2I_Pos (2UL) /*!< CCU8 GSTAT: S2I (Bit 2) */ -#define CCU8_GSTAT_S2I_Msk (0x4UL) /*!< CCU8 GSTAT: S2I (Bitfield-Mask: 0x01) */ -#define CCU8_GSTAT_S3I_Pos (3UL) /*!< CCU8 GSTAT: S3I (Bit 3) */ -#define CCU8_GSTAT_S3I_Msk (0x8UL) /*!< CCU8 GSTAT: S3I (Bitfield-Mask: 0x01) */ -#define CCU8_GSTAT_PRB_Pos (8UL) /*!< CCU8 GSTAT: PRB (Bit 8) */ -#define CCU8_GSTAT_PRB_Msk (0x100UL) /*!< CCU8 GSTAT: PRB (Bitfield-Mask: 0x01) */ -#define CCU8_GSTAT_PCRB_Pos (10UL) /*!< CCU8 GSTAT: PCRB (Bit 10) */ -#define CCU8_GSTAT_PCRB_Msk (0x400UL) /*!< CCU8 GSTAT: PCRB (Bitfield-Mask: 0x01) */ - -/* --------------------------------- CCU8_GIDLS --------------------------------- */ -#define CCU8_GIDLS_SS0I_Pos (0UL) /*!< CCU8 GIDLS: SS0I (Bit 0) */ -#define CCU8_GIDLS_SS0I_Msk (0x1UL) /*!< CCU8 GIDLS: SS0I (Bitfield-Mask: 0x01) */ -#define CCU8_GIDLS_SS1I_Pos (1UL) /*!< CCU8 GIDLS: SS1I (Bit 1) */ -#define CCU8_GIDLS_SS1I_Msk (0x2UL) /*!< CCU8 GIDLS: SS1I (Bitfield-Mask: 0x01) */ -#define CCU8_GIDLS_SS2I_Pos (2UL) /*!< CCU8 GIDLS: SS2I (Bit 2) */ -#define CCU8_GIDLS_SS2I_Msk (0x4UL) /*!< CCU8 GIDLS: SS2I (Bitfield-Mask: 0x01) */ -#define CCU8_GIDLS_SS3I_Pos (3UL) /*!< CCU8 GIDLS: SS3I (Bit 3) */ -#define CCU8_GIDLS_SS3I_Msk (0x8UL) /*!< CCU8 GIDLS: SS3I (Bitfield-Mask: 0x01) */ -#define CCU8_GIDLS_CPRB_Pos (8UL) /*!< CCU8 GIDLS: CPRB (Bit 8) */ -#define CCU8_GIDLS_CPRB_Msk (0x100UL) /*!< CCU8 GIDLS: CPRB (Bitfield-Mask: 0x01) */ -#define CCU8_GIDLS_PSIC_Pos (9UL) /*!< CCU8 GIDLS: PSIC (Bit 9) */ -#define CCU8_GIDLS_PSIC_Msk (0x200UL) /*!< CCU8 GIDLS: PSIC (Bitfield-Mask: 0x01) */ -#define CCU8_GIDLS_CPCH_Pos (10UL) /*!< CCU8 GIDLS: CPCH (Bit 10) */ -#define CCU8_GIDLS_CPCH_Msk (0x400UL) /*!< CCU8 GIDLS: CPCH (Bitfield-Mask: 0x01) */ - -/* --------------------------------- CCU8_GIDLC --------------------------------- */ -#define CCU8_GIDLC_CS0I_Pos (0UL) /*!< CCU8 GIDLC: CS0I (Bit 0) */ -#define CCU8_GIDLC_CS0I_Msk (0x1UL) /*!< CCU8 GIDLC: CS0I (Bitfield-Mask: 0x01) */ -#define CCU8_GIDLC_CS1I_Pos (1UL) /*!< CCU8 GIDLC: CS1I (Bit 1) */ -#define CCU8_GIDLC_CS1I_Msk (0x2UL) /*!< CCU8 GIDLC: CS1I (Bitfield-Mask: 0x01) */ -#define CCU8_GIDLC_CS2I_Pos (2UL) /*!< CCU8 GIDLC: CS2I (Bit 2) */ -#define CCU8_GIDLC_CS2I_Msk (0x4UL) /*!< CCU8 GIDLC: CS2I (Bitfield-Mask: 0x01) */ -#define CCU8_GIDLC_CS3I_Pos (3UL) /*!< CCU8 GIDLC: CS3I (Bit 3) */ -#define CCU8_GIDLC_CS3I_Msk (0x8UL) /*!< CCU8 GIDLC: CS3I (Bitfield-Mask: 0x01) */ -#define CCU8_GIDLC_SPRB_Pos (8UL) /*!< CCU8 GIDLC: SPRB (Bit 8) */ -#define CCU8_GIDLC_SPRB_Msk (0x100UL) /*!< CCU8 GIDLC: SPRB (Bitfield-Mask: 0x01) */ -#define CCU8_GIDLC_SPCH_Pos (10UL) /*!< CCU8 GIDLC: SPCH (Bit 10) */ -#define CCU8_GIDLC_SPCH_Msk (0x400UL) /*!< CCU8 GIDLC: SPCH (Bitfield-Mask: 0x01) */ - -/* ---------------------------------- CCU8_GCSS --------------------------------- */ -#define CCU8_GCSS_S0SE_Pos (0UL) /*!< CCU8 GCSS: S0SE (Bit 0) */ -#define CCU8_GCSS_S0SE_Msk (0x1UL) /*!< CCU8 GCSS: S0SE (Bitfield-Mask: 0x01) */ -#define CCU8_GCSS_S0DSE_Pos (1UL) /*!< CCU8 GCSS: S0DSE (Bit 1) */ -#define CCU8_GCSS_S0DSE_Msk (0x2UL) /*!< CCU8 GCSS: S0DSE (Bitfield-Mask: 0x01) */ -#define CCU8_GCSS_S0PSE_Pos (2UL) /*!< CCU8 GCSS: S0PSE (Bit 2) */ -#define CCU8_GCSS_S0PSE_Msk (0x4UL) /*!< CCU8 GCSS: S0PSE (Bitfield-Mask: 0x01) */ -#define CCU8_GCSS_S1SE_Pos (4UL) /*!< CCU8 GCSS: S1SE (Bit 4) */ -#define CCU8_GCSS_S1SE_Msk (0x10UL) /*!< CCU8 GCSS: S1SE (Bitfield-Mask: 0x01) */ -#define CCU8_GCSS_S1DSE_Pos (5UL) /*!< CCU8 GCSS: S1DSE (Bit 5) */ -#define CCU8_GCSS_S1DSE_Msk (0x20UL) /*!< CCU8 GCSS: S1DSE (Bitfield-Mask: 0x01) */ -#define CCU8_GCSS_S1PSE_Pos (6UL) /*!< CCU8 GCSS: S1PSE (Bit 6) */ -#define CCU8_GCSS_S1PSE_Msk (0x40UL) /*!< CCU8 GCSS: S1PSE (Bitfield-Mask: 0x01) */ -#define CCU8_GCSS_S2SE_Pos (8UL) /*!< CCU8 GCSS: S2SE (Bit 8) */ -#define CCU8_GCSS_S2SE_Msk (0x100UL) /*!< CCU8 GCSS: S2SE (Bitfield-Mask: 0x01) */ -#define CCU8_GCSS_S2DSE_Pos (9UL) /*!< CCU8 GCSS: S2DSE (Bit 9) */ -#define CCU8_GCSS_S2DSE_Msk (0x200UL) /*!< CCU8 GCSS: S2DSE (Bitfield-Mask: 0x01) */ -#define CCU8_GCSS_S2PSE_Pos (10UL) /*!< CCU8 GCSS: S2PSE (Bit 10) */ -#define CCU8_GCSS_S2PSE_Msk (0x400UL) /*!< CCU8 GCSS: S2PSE (Bitfield-Mask: 0x01) */ -#define CCU8_GCSS_S3SE_Pos (12UL) /*!< CCU8 GCSS: S3SE (Bit 12) */ -#define CCU8_GCSS_S3SE_Msk (0x1000UL) /*!< CCU8 GCSS: S3SE (Bitfield-Mask: 0x01) */ -#define CCU8_GCSS_S3DSE_Pos (13UL) /*!< CCU8 GCSS: S3DSE (Bit 13) */ -#define CCU8_GCSS_S3DSE_Msk (0x2000UL) /*!< CCU8 GCSS: S3DSE (Bitfield-Mask: 0x01) */ -#define CCU8_GCSS_S3PSE_Pos (14UL) /*!< CCU8 GCSS: S3PSE (Bit 14) */ -#define CCU8_GCSS_S3PSE_Msk (0x4000UL) /*!< CCU8 GCSS: S3PSE (Bitfield-Mask: 0x01) */ -#define CCU8_GCSS_S0ST1S_Pos (16UL) /*!< CCU8 GCSS: S0ST1S (Bit 16) */ -#define CCU8_GCSS_S0ST1S_Msk (0x10000UL) /*!< CCU8 GCSS: S0ST1S (Bitfield-Mask: 0x01) */ -#define CCU8_GCSS_S1ST1S_Pos (17UL) /*!< CCU8 GCSS: S1ST1S (Bit 17) */ -#define CCU8_GCSS_S1ST1S_Msk (0x20000UL) /*!< CCU8 GCSS: S1ST1S (Bitfield-Mask: 0x01) */ -#define CCU8_GCSS_S2ST1S_Pos (18UL) /*!< CCU8 GCSS: S2ST1S (Bit 18) */ -#define CCU8_GCSS_S2ST1S_Msk (0x40000UL) /*!< CCU8 GCSS: S2ST1S (Bitfield-Mask: 0x01) */ -#define CCU8_GCSS_S3ST1S_Pos (19UL) /*!< CCU8 GCSS: S3ST1S (Bit 19) */ -#define CCU8_GCSS_S3ST1S_Msk (0x80000UL) /*!< CCU8 GCSS: S3ST1S (Bitfield-Mask: 0x01) */ -#define CCU8_GCSS_S0ST2S_Pos (20UL) /*!< CCU8 GCSS: S0ST2S (Bit 20) */ -#define CCU8_GCSS_S0ST2S_Msk (0x100000UL) /*!< CCU8 GCSS: S0ST2S (Bitfield-Mask: 0x01) */ -#define CCU8_GCSS_S1ST2S_Pos (21UL) /*!< CCU8 GCSS: S1ST2S (Bit 21) */ -#define CCU8_GCSS_S1ST2S_Msk (0x200000UL) /*!< CCU8 GCSS: S1ST2S (Bitfield-Mask: 0x01) */ -#define CCU8_GCSS_S2ST2S_Pos (22UL) /*!< CCU8 GCSS: S2ST2S (Bit 22) */ -#define CCU8_GCSS_S2ST2S_Msk (0x400000UL) /*!< CCU8 GCSS: S2ST2S (Bitfield-Mask: 0x01) */ -#define CCU8_GCSS_S3ST2S_Pos (23UL) /*!< CCU8 GCSS: S3ST2S (Bit 23) */ -#define CCU8_GCSS_S3ST2S_Msk (0x800000UL) /*!< CCU8 GCSS: S3ST2S (Bitfield-Mask: 0x01) */ - -/* ---------------------------------- CCU8_GCSC --------------------------------- */ -#define CCU8_GCSC_S0SC_Pos (0UL) /*!< CCU8 GCSC: S0SC (Bit 0) */ -#define CCU8_GCSC_S0SC_Msk (0x1UL) /*!< CCU8 GCSC: S0SC (Bitfield-Mask: 0x01) */ -#define CCU8_GCSC_S0DSC_Pos (1UL) /*!< CCU8 GCSC: S0DSC (Bit 1) */ -#define CCU8_GCSC_S0DSC_Msk (0x2UL) /*!< CCU8 GCSC: S0DSC (Bitfield-Mask: 0x01) */ -#define CCU8_GCSC_S0PSC_Pos (2UL) /*!< CCU8 GCSC: S0PSC (Bit 2) */ -#define CCU8_GCSC_S0PSC_Msk (0x4UL) /*!< CCU8 GCSC: S0PSC (Bitfield-Mask: 0x01) */ -#define CCU8_GCSC_S1SC_Pos (4UL) /*!< CCU8 GCSC: S1SC (Bit 4) */ -#define CCU8_GCSC_S1SC_Msk (0x10UL) /*!< CCU8 GCSC: S1SC (Bitfield-Mask: 0x01) */ -#define CCU8_GCSC_S1DSC_Pos (5UL) /*!< CCU8 GCSC: S1DSC (Bit 5) */ -#define CCU8_GCSC_S1DSC_Msk (0x20UL) /*!< CCU8 GCSC: S1DSC (Bitfield-Mask: 0x01) */ -#define CCU8_GCSC_S1PSC_Pos (6UL) /*!< CCU8 GCSC: S1PSC (Bit 6) */ -#define CCU8_GCSC_S1PSC_Msk (0x40UL) /*!< CCU8 GCSC: S1PSC (Bitfield-Mask: 0x01) */ -#define CCU8_GCSC_S2SC_Pos (8UL) /*!< CCU8 GCSC: S2SC (Bit 8) */ -#define CCU8_GCSC_S2SC_Msk (0x100UL) /*!< CCU8 GCSC: S2SC (Bitfield-Mask: 0x01) */ -#define CCU8_GCSC_S2DSC_Pos (9UL) /*!< CCU8 GCSC: S2DSC (Bit 9) */ -#define CCU8_GCSC_S2DSC_Msk (0x200UL) /*!< CCU8 GCSC: S2DSC (Bitfield-Mask: 0x01) */ -#define CCU8_GCSC_S2PSC_Pos (10UL) /*!< CCU8 GCSC: S2PSC (Bit 10) */ -#define CCU8_GCSC_S2PSC_Msk (0x400UL) /*!< CCU8 GCSC: S2PSC (Bitfield-Mask: 0x01) */ -#define CCU8_GCSC_S3SC_Pos (12UL) /*!< CCU8 GCSC: S3SC (Bit 12) */ -#define CCU8_GCSC_S3SC_Msk (0x1000UL) /*!< CCU8 GCSC: S3SC (Bitfield-Mask: 0x01) */ -#define CCU8_GCSC_S3DSC_Pos (13UL) /*!< CCU8 GCSC: S3DSC (Bit 13) */ -#define CCU8_GCSC_S3DSC_Msk (0x2000UL) /*!< CCU8 GCSC: S3DSC (Bitfield-Mask: 0x01) */ -#define CCU8_GCSC_S3PSC_Pos (14UL) /*!< CCU8 GCSC: S3PSC (Bit 14) */ -#define CCU8_GCSC_S3PSC_Msk (0x4000UL) /*!< CCU8 GCSC: S3PSC (Bitfield-Mask: 0x01) */ -#define CCU8_GCSC_S0ST1C_Pos (16UL) /*!< CCU8 GCSC: S0ST1C (Bit 16) */ -#define CCU8_GCSC_S0ST1C_Msk (0x10000UL) /*!< CCU8 GCSC: S0ST1C (Bitfield-Mask: 0x01) */ -#define CCU8_GCSC_S1ST1C_Pos (17UL) /*!< CCU8 GCSC: S1ST1C (Bit 17) */ -#define CCU8_GCSC_S1ST1C_Msk (0x20000UL) /*!< CCU8 GCSC: S1ST1C (Bitfield-Mask: 0x01) */ -#define CCU8_GCSC_S2ST1C_Pos (18UL) /*!< CCU8 GCSC: S2ST1C (Bit 18) */ -#define CCU8_GCSC_S2ST1C_Msk (0x40000UL) /*!< CCU8 GCSC: S2ST1C (Bitfield-Mask: 0x01) */ -#define CCU8_GCSC_S3ST1C_Pos (19UL) /*!< CCU8 GCSC: S3ST1C (Bit 19) */ -#define CCU8_GCSC_S3ST1C_Msk (0x80000UL) /*!< CCU8 GCSC: S3ST1C (Bitfield-Mask: 0x01) */ -#define CCU8_GCSC_S0ST2C_Pos (20UL) /*!< CCU8 GCSC: S0ST2C (Bit 20) */ -#define CCU8_GCSC_S0ST2C_Msk (0x100000UL) /*!< CCU8 GCSC: S0ST2C (Bitfield-Mask: 0x01) */ -#define CCU8_GCSC_S1ST2C_Pos (21UL) /*!< CCU8 GCSC: S1ST2C (Bit 21) */ -#define CCU8_GCSC_S1ST2C_Msk (0x200000UL) /*!< CCU8 GCSC: S1ST2C (Bitfield-Mask: 0x01) */ -#define CCU8_GCSC_S2ST2C_Pos (22UL) /*!< CCU8 GCSC: S2ST2C (Bit 22) */ -#define CCU8_GCSC_S2ST2C_Msk (0x400000UL) /*!< CCU8 GCSC: S2ST2C (Bitfield-Mask: 0x01) */ -#define CCU8_GCSC_S3ST2C_Pos (23UL) /*!< CCU8 GCSC: S3ST2C (Bit 23) */ -#define CCU8_GCSC_S3ST2C_Msk (0x800000UL) /*!< CCU8 GCSC: S3ST2C (Bitfield-Mask: 0x01) */ - -/* ---------------------------------- CCU8_GCST --------------------------------- */ -#define CCU8_GCST_S0SS_Pos (0UL) /*!< CCU8 GCST: S0SS (Bit 0) */ -#define CCU8_GCST_S0SS_Msk (0x1UL) /*!< CCU8 GCST: S0SS (Bitfield-Mask: 0x01) */ -#define CCU8_GCST_S0DSS_Pos (1UL) /*!< CCU8 GCST: S0DSS (Bit 1) */ -#define CCU8_GCST_S0DSS_Msk (0x2UL) /*!< CCU8 GCST: S0DSS (Bitfield-Mask: 0x01) */ -#define CCU8_GCST_S0PSS_Pos (2UL) /*!< CCU8 GCST: S0PSS (Bit 2) */ -#define CCU8_GCST_S0PSS_Msk (0x4UL) /*!< CCU8 GCST: S0PSS (Bitfield-Mask: 0x01) */ -#define CCU8_GCST_S1SS_Pos (4UL) /*!< CCU8 GCST: S1SS (Bit 4) */ -#define CCU8_GCST_S1SS_Msk (0x10UL) /*!< CCU8 GCST: S1SS (Bitfield-Mask: 0x01) */ -#define CCU8_GCST_S1DSS_Pos (5UL) /*!< CCU8 GCST: S1DSS (Bit 5) */ -#define CCU8_GCST_S1DSS_Msk (0x20UL) /*!< CCU8 GCST: S1DSS (Bitfield-Mask: 0x01) */ -#define CCU8_GCST_S1PSS_Pos (6UL) /*!< CCU8 GCST: S1PSS (Bit 6) */ -#define CCU8_GCST_S1PSS_Msk (0x40UL) /*!< CCU8 GCST: S1PSS (Bitfield-Mask: 0x01) */ -#define CCU8_GCST_S2SS_Pos (8UL) /*!< CCU8 GCST: S2SS (Bit 8) */ -#define CCU8_GCST_S2SS_Msk (0x100UL) /*!< CCU8 GCST: S2SS (Bitfield-Mask: 0x01) */ -#define CCU8_GCST_S2DSS_Pos (9UL) /*!< CCU8 GCST: S2DSS (Bit 9) */ -#define CCU8_GCST_S2DSS_Msk (0x200UL) /*!< CCU8 GCST: S2DSS (Bitfield-Mask: 0x01) */ -#define CCU8_GCST_S2PSS_Pos (10UL) /*!< CCU8 GCST: S2PSS (Bit 10) */ -#define CCU8_GCST_S2PSS_Msk (0x400UL) /*!< CCU8 GCST: S2PSS (Bitfield-Mask: 0x01) */ -#define CCU8_GCST_S3SS_Pos (12UL) /*!< CCU8 GCST: S3SS (Bit 12) */ -#define CCU8_GCST_S3SS_Msk (0x1000UL) /*!< CCU8 GCST: S3SS (Bitfield-Mask: 0x01) */ -#define CCU8_GCST_S3DSS_Pos (13UL) /*!< CCU8 GCST: S3DSS (Bit 13) */ -#define CCU8_GCST_S3DSS_Msk (0x2000UL) /*!< CCU8 GCST: S3DSS (Bitfield-Mask: 0x01) */ -#define CCU8_GCST_S3PSS_Pos (14UL) /*!< CCU8 GCST: S3PSS (Bit 14) */ -#define CCU8_GCST_S3PSS_Msk (0x4000UL) /*!< CCU8 GCST: S3PSS (Bitfield-Mask: 0x01) */ -#define CCU8_GCST_CC80ST1_Pos (16UL) /*!< CCU8 GCST: CC80ST1 (Bit 16) */ -#define CCU8_GCST_CC80ST1_Msk (0x10000UL) /*!< CCU8 GCST: CC80ST1 (Bitfield-Mask: 0x01) */ -#define CCU8_GCST_CC81ST1_Pos (17UL) /*!< CCU8 GCST: CC81ST1 (Bit 17) */ -#define CCU8_GCST_CC81ST1_Msk (0x20000UL) /*!< CCU8 GCST: CC81ST1 (Bitfield-Mask: 0x01) */ -#define CCU8_GCST_CC82ST1_Pos (18UL) /*!< CCU8 GCST: CC82ST1 (Bit 18) */ -#define CCU8_GCST_CC82ST1_Msk (0x40000UL) /*!< CCU8 GCST: CC82ST1 (Bitfield-Mask: 0x01) */ -#define CCU8_GCST_CC83ST1_Pos (19UL) /*!< CCU8 GCST: CC83ST1 (Bit 19) */ -#define CCU8_GCST_CC83ST1_Msk (0x80000UL) /*!< CCU8 GCST: CC83ST1 (Bitfield-Mask: 0x01) */ -#define CCU8_GCST_CC80ST2_Pos (20UL) /*!< CCU8 GCST: CC80ST2 (Bit 20) */ -#define CCU8_GCST_CC80ST2_Msk (0x100000UL) /*!< CCU8 GCST: CC80ST2 (Bitfield-Mask: 0x01) */ -#define CCU8_GCST_CC81ST2_Pos (21UL) /*!< CCU8 GCST: CC81ST2 (Bit 21) */ -#define CCU8_GCST_CC81ST2_Msk (0x200000UL) /*!< CCU8 GCST: CC81ST2 (Bitfield-Mask: 0x01) */ -#define CCU8_GCST_CC82ST2_Pos (22UL) /*!< CCU8 GCST: CC82ST2 (Bit 22) */ -#define CCU8_GCST_CC82ST2_Msk (0x400000UL) /*!< CCU8 GCST: CC82ST2 (Bitfield-Mask: 0x01) */ -#define CCU8_GCST_CC83ST2_Pos (23UL) /*!< CCU8 GCST: CC83ST2 (Bit 23) */ -#define CCU8_GCST_CC83ST2_Msk (0x800000UL) /*!< CCU8 GCST: CC83ST2 (Bitfield-Mask: 0x01) */ - -/* --------------------------------- CCU8_GPCHK --------------------------------- */ -#define CCU8_GPCHK_PASE_Pos (0UL) /*!< CCU8 GPCHK: PASE (Bit 0) */ -#define CCU8_GPCHK_PASE_Msk (0x1UL) /*!< CCU8 GPCHK: PASE (Bitfield-Mask: 0x01) */ -#define CCU8_GPCHK_PACS_Pos (1UL) /*!< CCU8 GPCHK: PACS (Bit 1) */ -#define CCU8_GPCHK_PACS_Msk (0x6UL) /*!< CCU8 GPCHK: PACS (Bitfield-Mask: 0x03) */ -#define CCU8_GPCHK_PISEL_Pos (3UL) /*!< CCU8 GPCHK: PISEL (Bit 3) */ -#define CCU8_GPCHK_PISEL_Msk (0x18UL) /*!< CCU8 GPCHK: PISEL (Bitfield-Mask: 0x03) */ -#define CCU8_GPCHK_PCDS_Pos (5UL) /*!< CCU8 GPCHK: PCDS (Bit 5) */ -#define CCU8_GPCHK_PCDS_Msk (0x60UL) /*!< CCU8 GPCHK: PCDS (Bitfield-Mask: 0x03) */ -#define CCU8_GPCHK_PCTS_Pos (7UL) /*!< CCU8 GPCHK: PCTS (Bit 7) */ -#define CCU8_GPCHK_PCTS_Msk (0x80UL) /*!< CCU8 GPCHK: PCTS (Bitfield-Mask: 0x01) */ -#define CCU8_GPCHK_PCST_Pos (15UL) /*!< CCU8 GPCHK: PCST (Bit 15) */ -#define CCU8_GPCHK_PCST_Msk (0x8000UL) /*!< CCU8 GPCHK: PCST (Bitfield-Mask: 0x01) */ -#define CCU8_GPCHK_PCSEL0_Pos (16UL) /*!< CCU8 GPCHK: PCSEL0 (Bit 16) */ -#define CCU8_GPCHK_PCSEL0_Msk (0xf0000UL) /*!< CCU8 GPCHK: PCSEL0 (Bitfield-Mask: 0x0f) */ -#define CCU8_GPCHK_PCSEL1_Pos (20UL) /*!< CCU8 GPCHK: PCSEL1 (Bit 20) */ -#define CCU8_GPCHK_PCSEL1_Msk (0xf00000UL) /*!< CCU8 GPCHK: PCSEL1 (Bitfield-Mask: 0x0f) */ -#define CCU8_GPCHK_PCSEL2_Pos (24UL) /*!< CCU8 GPCHK: PCSEL2 (Bit 24) */ -#define CCU8_GPCHK_PCSEL2_Msk (0xf000000UL) /*!< CCU8 GPCHK: PCSEL2 (Bitfield-Mask: 0x0f) */ -#define CCU8_GPCHK_PCSEL3_Pos (28UL) /*!< CCU8 GPCHK: PCSEL3 (Bit 28) */ -#define CCU8_GPCHK_PCSEL3_Msk (0xf0000000UL) /*!< CCU8 GPCHK: PCSEL3 (Bitfield-Mask: 0x0f) */ - -/* ---------------------------------- CCU8_MIDR --------------------------------- */ -#define CCU8_MIDR_MODR_Pos (0UL) /*!< CCU8 MIDR: MODR (Bit 0) */ -#define CCU8_MIDR_MODR_Msk (0xffUL) /*!< CCU8 MIDR: MODR (Bitfield-Mask: 0xff) */ -#define CCU8_MIDR_MODT_Pos (8UL) /*!< CCU8 MIDR: MODT (Bit 8) */ -#define CCU8_MIDR_MODT_Msk (0xff00UL) /*!< CCU8 MIDR: MODT (Bitfield-Mask: 0xff) */ -#define CCU8_MIDR_MODN_Pos (16UL) /*!< CCU8 MIDR: MODN (Bit 16) */ -#define CCU8_MIDR_MODN_Msk (0xffff0000UL) /*!< CCU8 MIDR: MODN (Bitfield-Mask: 0xffff) */ - - -/* ================================================================================ */ -/* ================ Group 'CCU8_CC8' Position & Mask ================ */ -/* ================================================================================ */ - - -/* -------------------------------- CCU8_CC8_INS -------------------------------- */ -#define CCU8_CC8_INS_EV0IS_Pos (0UL) /*!< CCU8_CC8 INS: EV0IS (Bit 0) */ -#define CCU8_CC8_INS_EV0IS_Msk (0xfUL) /*!< CCU8_CC8 INS: EV0IS (Bitfield-Mask: 0x0f) */ -#define CCU8_CC8_INS_EV1IS_Pos (4UL) /*!< CCU8_CC8 INS: EV1IS (Bit 4) */ -#define CCU8_CC8_INS_EV1IS_Msk (0xf0UL) /*!< CCU8_CC8 INS: EV1IS (Bitfield-Mask: 0x0f) */ -#define CCU8_CC8_INS_EV2IS_Pos (8UL) /*!< CCU8_CC8 INS: EV2IS (Bit 8) */ -#define CCU8_CC8_INS_EV2IS_Msk (0xf00UL) /*!< CCU8_CC8 INS: EV2IS (Bitfield-Mask: 0x0f) */ -#define CCU8_CC8_INS_EV0EM_Pos (16UL) /*!< CCU8_CC8 INS: EV0EM (Bit 16) */ -#define CCU8_CC8_INS_EV0EM_Msk (0x30000UL) /*!< CCU8_CC8 INS: EV0EM (Bitfield-Mask: 0x03) */ -#define CCU8_CC8_INS_EV1EM_Pos (18UL) /*!< CCU8_CC8 INS: EV1EM (Bit 18) */ -#define CCU8_CC8_INS_EV1EM_Msk (0xc0000UL) /*!< CCU8_CC8 INS: EV1EM (Bitfield-Mask: 0x03) */ -#define CCU8_CC8_INS_EV2EM_Pos (20UL) /*!< CCU8_CC8 INS: EV2EM (Bit 20) */ -#define CCU8_CC8_INS_EV2EM_Msk (0x300000UL) /*!< CCU8_CC8 INS: EV2EM (Bitfield-Mask: 0x03) */ -#define CCU8_CC8_INS_EV0LM_Pos (22UL) /*!< CCU8_CC8 INS: EV0LM (Bit 22) */ -#define CCU8_CC8_INS_EV0LM_Msk (0x400000UL) /*!< CCU8_CC8 INS: EV0LM (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_INS_EV1LM_Pos (23UL) /*!< CCU8_CC8 INS: EV1LM (Bit 23) */ -#define CCU8_CC8_INS_EV1LM_Msk (0x800000UL) /*!< CCU8_CC8 INS: EV1LM (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_INS_EV2LM_Pos (24UL) /*!< CCU8_CC8 INS: EV2LM (Bit 24) */ -#define CCU8_CC8_INS_EV2LM_Msk (0x1000000UL) /*!< CCU8_CC8 INS: EV2LM (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_INS_LPF0M_Pos (25UL) /*!< CCU8_CC8 INS: LPF0M (Bit 25) */ -#define CCU8_CC8_INS_LPF0M_Msk (0x6000000UL) /*!< CCU8_CC8 INS: LPF0M (Bitfield-Mask: 0x03) */ -#define CCU8_CC8_INS_LPF1M_Pos (27UL) /*!< CCU8_CC8 INS: LPF1M (Bit 27) */ -#define CCU8_CC8_INS_LPF1M_Msk (0x18000000UL) /*!< CCU8_CC8 INS: LPF1M (Bitfield-Mask: 0x03) */ -#define CCU8_CC8_INS_LPF2M_Pos (29UL) /*!< CCU8_CC8 INS: LPF2M (Bit 29) */ -#define CCU8_CC8_INS_LPF2M_Msk (0x60000000UL) /*!< CCU8_CC8 INS: LPF2M (Bitfield-Mask: 0x03) */ - -/* -------------------------------- CCU8_CC8_CMC -------------------------------- */ -#define CCU8_CC8_CMC_STRTS_Pos (0UL) /*!< CCU8_CC8 CMC: STRTS (Bit 0) */ -#define CCU8_CC8_CMC_STRTS_Msk (0x3UL) /*!< CCU8_CC8 CMC: STRTS (Bitfield-Mask: 0x03) */ -#define CCU8_CC8_CMC_ENDS_Pos (2UL) /*!< CCU8_CC8 CMC: ENDS (Bit 2) */ -#define CCU8_CC8_CMC_ENDS_Msk (0xcUL) /*!< CCU8_CC8 CMC: ENDS (Bitfield-Mask: 0x03) */ -#define CCU8_CC8_CMC_CAP0S_Pos (4UL) /*!< CCU8_CC8 CMC: CAP0S (Bit 4) */ -#define CCU8_CC8_CMC_CAP0S_Msk (0x30UL) /*!< CCU8_CC8 CMC: CAP0S (Bitfield-Mask: 0x03) */ -#define CCU8_CC8_CMC_CAP1S_Pos (6UL) /*!< CCU8_CC8 CMC: CAP1S (Bit 6) */ -#define CCU8_CC8_CMC_CAP1S_Msk (0xc0UL) /*!< CCU8_CC8 CMC: CAP1S (Bitfield-Mask: 0x03) */ -#define CCU8_CC8_CMC_GATES_Pos (8UL) /*!< CCU8_CC8 CMC: GATES (Bit 8) */ -#define CCU8_CC8_CMC_GATES_Msk (0x300UL) /*!< CCU8_CC8 CMC: GATES (Bitfield-Mask: 0x03) */ -#define CCU8_CC8_CMC_UDS_Pos (10UL) /*!< CCU8_CC8 CMC: UDS (Bit 10) */ -#define CCU8_CC8_CMC_UDS_Msk (0xc00UL) /*!< CCU8_CC8 CMC: UDS (Bitfield-Mask: 0x03) */ -#define CCU8_CC8_CMC_LDS_Pos (12UL) /*!< CCU8_CC8 CMC: LDS (Bit 12) */ -#define CCU8_CC8_CMC_LDS_Msk (0x3000UL) /*!< CCU8_CC8 CMC: LDS (Bitfield-Mask: 0x03) */ -#define CCU8_CC8_CMC_CNTS_Pos (14UL) /*!< CCU8_CC8 CMC: CNTS (Bit 14) */ -#define CCU8_CC8_CMC_CNTS_Msk (0xc000UL) /*!< CCU8_CC8 CMC: CNTS (Bitfield-Mask: 0x03) */ -#define CCU8_CC8_CMC_OFS_Pos (16UL) /*!< CCU8_CC8 CMC: OFS (Bit 16) */ -#define CCU8_CC8_CMC_OFS_Msk (0x10000UL) /*!< CCU8_CC8 CMC: OFS (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_CMC_TS_Pos (17UL) /*!< CCU8_CC8 CMC: TS (Bit 17) */ -#define CCU8_CC8_CMC_TS_Msk (0x20000UL) /*!< CCU8_CC8 CMC: TS (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_CMC_MOS_Pos (18UL) /*!< CCU8_CC8 CMC: MOS (Bit 18) */ -#define CCU8_CC8_CMC_MOS_Msk (0xc0000UL) /*!< CCU8_CC8 CMC: MOS (Bitfield-Mask: 0x03) */ -#define CCU8_CC8_CMC_TCE_Pos (20UL) /*!< CCU8_CC8 CMC: TCE (Bit 20) */ -#define CCU8_CC8_CMC_TCE_Msk (0x100000UL) /*!< CCU8_CC8 CMC: TCE (Bitfield-Mask: 0x01) */ - -/* -------------------------------- CCU8_CC8_TCST ------------------------------- */ -#define CCU8_CC8_TCST_TRB_Pos (0UL) /*!< CCU8_CC8 TCST: TRB (Bit 0) */ -#define CCU8_CC8_TCST_TRB_Msk (0x1UL) /*!< CCU8_CC8 TCST: TRB (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_TCST_CDIR_Pos (1UL) /*!< CCU8_CC8 TCST: CDIR (Bit 1) */ -#define CCU8_CC8_TCST_CDIR_Msk (0x2UL) /*!< CCU8_CC8 TCST: CDIR (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_TCST_DTR1_Pos (3UL) /*!< CCU8_CC8 TCST: DTR1 (Bit 3) */ -#define CCU8_CC8_TCST_DTR1_Msk (0x8UL) /*!< CCU8_CC8 TCST: DTR1 (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_TCST_DTR2_Pos (4UL) /*!< CCU8_CC8 TCST: DTR2 (Bit 4) */ -#define CCU8_CC8_TCST_DTR2_Msk (0x10UL) /*!< CCU8_CC8 TCST: DTR2 (Bitfield-Mask: 0x01) */ - -/* ------------------------------- CCU8_CC8_TCSET ------------------------------- */ -#define CCU8_CC8_TCSET_TRBS_Pos (0UL) /*!< CCU8_CC8 TCSET: TRBS (Bit 0) */ -#define CCU8_CC8_TCSET_TRBS_Msk (0x1UL) /*!< CCU8_CC8 TCSET: TRBS (Bitfield-Mask: 0x01) */ - -/* ------------------------------- CCU8_CC8_TCCLR ------------------------------- */ -#define CCU8_CC8_TCCLR_TRBC_Pos (0UL) /*!< CCU8_CC8 TCCLR: TRBC (Bit 0) */ -#define CCU8_CC8_TCCLR_TRBC_Msk (0x1UL) /*!< CCU8_CC8 TCCLR: TRBC (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_TCCLR_TCC_Pos (1UL) /*!< CCU8_CC8 TCCLR: TCC (Bit 1) */ -#define CCU8_CC8_TCCLR_TCC_Msk (0x2UL) /*!< CCU8_CC8 TCCLR: TCC (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_TCCLR_DITC_Pos (2UL) /*!< CCU8_CC8 TCCLR: DITC (Bit 2) */ -#define CCU8_CC8_TCCLR_DITC_Msk (0x4UL) /*!< CCU8_CC8 TCCLR: DITC (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_TCCLR_DTC1C_Pos (3UL) /*!< CCU8_CC8 TCCLR: DTC1C (Bit 3) */ -#define CCU8_CC8_TCCLR_DTC1C_Msk (0x8UL) /*!< CCU8_CC8 TCCLR: DTC1C (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_TCCLR_DTC2C_Pos (4UL) /*!< CCU8_CC8 TCCLR: DTC2C (Bit 4) */ -#define CCU8_CC8_TCCLR_DTC2C_Msk (0x10UL) /*!< CCU8_CC8 TCCLR: DTC2C (Bitfield-Mask: 0x01) */ - -/* --------------------------------- CCU8_CC8_TC -------------------------------- */ -#define CCU8_CC8_TC_TCM_Pos (0UL) /*!< CCU8_CC8 TC: TCM (Bit 0) */ -#define CCU8_CC8_TC_TCM_Msk (0x1UL) /*!< CCU8_CC8 TC: TCM (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_TC_TSSM_Pos (1UL) /*!< CCU8_CC8 TC: TSSM (Bit 1) */ -#define CCU8_CC8_TC_TSSM_Msk (0x2UL) /*!< CCU8_CC8 TC: TSSM (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_TC_CLST_Pos (2UL) /*!< CCU8_CC8 TC: CLST (Bit 2) */ -#define CCU8_CC8_TC_CLST_Msk (0x4UL) /*!< CCU8_CC8 TC: CLST (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_TC_CMOD_Pos (3UL) /*!< CCU8_CC8 TC: CMOD (Bit 3) */ -#define CCU8_CC8_TC_CMOD_Msk (0x8UL) /*!< CCU8_CC8 TC: CMOD (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_TC_ECM_Pos (4UL) /*!< CCU8_CC8 TC: ECM (Bit 4) */ -#define CCU8_CC8_TC_ECM_Msk (0x10UL) /*!< CCU8_CC8 TC: ECM (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_TC_CAPC_Pos (5UL) /*!< CCU8_CC8 TC: CAPC (Bit 5) */ -#define CCU8_CC8_TC_CAPC_Msk (0x60UL) /*!< CCU8_CC8 TC: CAPC (Bitfield-Mask: 0x03) */ -#define CCU8_CC8_TC_TLS_Pos (7UL) /*!< CCU8_CC8 TC: TLS (Bit 7) */ -#define CCU8_CC8_TC_TLS_Msk (0x80UL) /*!< CCU8_CC8 TC: TLS (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_TC_ENDM_Pos (8UL) /*!< CCU8_CC8 TC: ENDM (Bit 8) */ -#define CCU8_CC8_TC_ENDM_Msk (0x300UL) /*!< CCU8_CC8 TC: ENDM (Bitfield-Mask: 0x03) */ -#define CCU8_CC8_TC_STRM_Pos (10UL) /*!< CCU8_CC8 TC: STRM (Bit 10) */ -#define CCU8_CC8_TC_STRM_Msk (0x400UL) /*!< CCU8_CC8 TC: STRM (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_TC_SCE_Pos (11UL) /*!< CCU8_CC8 TC: SCE (Bit 11) */ -#define CCU8_CC8_TC_SCE_Msk (0x800UL) /*!< CCU8_CC8 TC: SCE (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_TC_CCS_Pos (12UL) /*!< CCU8_CC8 TC: CCS (Bit 12) */ -#define CCU8_CC8_TC_CCS_Msk (0x1000UL) /*!< CCU8_CC8 TC: CCS (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_TC_DITHE_Pos (13UL) /*!< CCU8_CC8 TC: DITHE (Bit 13) */ -#define CCU8_CC8_TC_DITHE_Msk (0x6000UL) /*!< CCU8_CC8 TC: DITHE (Bitfield-Mask: 0x03) */ -#define CCU8_CC8_TC_DIM_Pos (15UL) /*!< CCU8_CC8 TC: DIM (Bit 15) */ -#define CCU8_CC8_TC_DIM_Msk (0x8000UL) /*!< CCU8_CC8 TC: DIM (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_TC_FPE_Pos (16UL) /*!< CCU8_CC8 TC: FPE (Bit 16) */ -#define CCU8_CC8_TC_FPE_Msk (0x10000UL) /*!< CCU8_CC8 TC: FPE (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_TC_TRAPE0_Pos (17UL) /*!< CCU8_CC8 TC: TRAPE0 (Bit 17) */ -#define CCU8_CC8_TC_TRAPE0_Msk (0x20000UL) /*!< CCU8_CC8 TC: TRAPE0 (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_TC_TRAPE1_Pos (18UL) /*!< CCU8_CC8 TC: TRAPE1 (Bit 18) */ -#define CCU8_CC8_TC_TRAPE1_Msk (0x40000UL) /*!< CCU8_CC8 TC: TRAPE1 (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_TC_TRAPE2_Pos (19UL) /*!< CCU8_CC8 TC: TRAPE2 (Bit 19) */ -#define CCU8_CC8_TC_TRAPE2_Msk (0x80000UL) /*!< CCU8_CC8 TC: TRAPE2 (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_TC_TRAPE3_Pos (20UL) /*!< CCU8_CC8 TC: TRAPE3 (Bit 20) */ -#define CCU8_CC8_TC_TRAPE3_Msk (0x100000UL) /*!< CCU8_CC8 TC: TRAPE3 (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_TC_TRPSE_Pos (21UL) /*!< CCU8_CC8 TC: TRPSE (Bit 21) */ -#define CCU8_CC8_TC_TRPSE_Msk (0x200000UL) /*!< CCU8_CC8 TC: TRPSE (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_TC_TRPSW_Pos (22UL) /*!< CCU8_CC8 TC: TRPSW (Bit 22) */ -#define CCU8_CC8_TC_TRPSW_Msk (0x400000UL) /*!< CCU8_CC8 TC: TRPSW (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_TC_EMS_Pos (23UL) /*!< CCU8_CC8 TC: EMS (Bit 23) */ -#define CCU8_CC8_TC_EMS_Msk (0x800000UL) /*!< CCU8_CC8 TC: EMS (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_TC_EMT_Pos (24UL) /*!< CCU8_CC8 TC: EMT (Bit 24) */ -#define CCU8_CC8_TC_EMT_Msk (0x1000000UL) /*!< CCU8_CC8 TC: EMT (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_TC_MCME1_Pos (25UL) /*!< CCU8_CC8 TC: MCME1 (Bit 25) */ -#define CCU8_CC8_TC_MCME1_Msk (0x2000000UL) /*!< CCU8_CC8 TC: MCME1 (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_TC_MCME2_Pos (26UL) /*!< CCU8_CC8 TC: MCME2 (Bit 26) */ -#define CCU8_CC8_TC_MCME2_Msk (0x4000000UL) /*!< CCU8_CC8 TC: MCME2 (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_TC_EME_Pos (27UL) /*!< CCU8_CC8 TC: EME (Bit 27) */ -#define CCU8_CC8_TC_EME_Msk (0x18000000UL) /*!< CCU8_CC8 TC: EME (Bitfield-Mask: 0x03) */ -#define CCU8_CC8_TC_STOS_Pos (29UL) /*!< CCU8_CC8 TC: STOS (Bit 29) */ -#define CCU8_CC8_TC_STOS_Msk (0x60000000UL) /*!< CCU8_CC8 TC: STOS (Bitfield-Mask: 0x03) */ - -/* -------------------------------- CCU8_CC8_PSL -------------------------------- */ -#define CCU8_CC8_PSL_PSL11_Pos (0UL) /*!< CCU8_CC8 PSL: PSL11 (Bit 0) */ -#define CCU8_CC8_PSL_PSL11_Msk (0x1UL) /*!< CCU8_CC8 PSL: PSL11 (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_PSL_PSL12_Pos (1UL) /*!< CCU8_CC8 PSL: PSL12 (Bit 1) */ -#define CCU8_CC8_PSL_PSL12_Msk (0x2UL) /*!< CCU8_CC8 PSL: PSL12 (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_PSL_PSL21_Pos (2UL) /*!< CCU8_CC8 PSL: PSL21 (Bit 2) */ -#define CCU8_CC8_PSL_PSL21_Msk (0x4UL) /*!< CCU8_CC8 PSL: PSL21 (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_PSL_PSL22_Pos (3UL) /*!< CCU8_CC8 PSL: PSL22 (Bit 3) */ -#define CCU8_CC8_PSL_PSL22_Msk (0x8UL) /*!< CCU8_CC8 PSL: PSL22 (Bitfield-Mask: 0x01) */ - -/* -------------------------------- CCU8_CC8_DIT -------------------------------- */ -#define CCU8_CC8_DIT_DCV_Pos (0UL) /*!< CCU8_CC8 DIT: DCV (Bit 0) */ -#define CCU8_CC8_DIT_DCV_Msk (0xfUL) /*!< CCU8_CC8 DIT: DCV (Bitfield-Mask: 0x0f) */ -#define CCU8_CC8_DIT_DCNT_Pos (8UL) /*!< CCU8_CC8 DIT: DCNT (Bit 8) */ -#define CCU8_CC8_DIT_DCNT_Msk (0xf00UL) /*!< CCU8_CC8 DIT: DCNT (Bitfield-Mask: 0x0f) */ - -/* -------------------------------- CCU8_CC8_DITS ------------------------------- */ -#define CCU8_CC8_DITS_DCVS_Pos (0UL) /*!< CCU8_CC8 DITS: DCVS (Bit 0) */ -#define CCU8_CC8_DITS_DCVS_Msk (0xfUL) /*!< CCU8_CC8 DITS: DCVS (Bitfield-Mask: 0x0f) */ - -/* -------------------------------- CCU8_CC8_PSC -------------------------------- */ -#define CCU8_CC8_PSC_PSIV_Pos (0UL) /*!< CCU8_CC8 PSC: PSIV (Bit 0) */ -#define CCU8_CC8_PSC_PSIV_Msk (0xfUL) /*!< CCU8_CC8 PSC: PSIV (Bitfield-Mask: 0x0f) */ - -/* -------------------------------- CCU8_CC8_FPC -------------------------------- */ -#define CCU8_CC8_FPC_PCMP_Pos (0UL) /*!< CCU8_CC8 FPC: PCMP (Bit 0) */ -#define CCU8_CC8_FPC_PCMP_Msk (0xfUL) /*!< CCU8_CC8 FPC: PCMP (Bitfield-Mask: 0x0f) */ -#define CCU8_CC8_FPC_PVAL_Pos (8UL) /*!< CCU8_CC8 FPC: PVAL (Bit 8) */ -#define CCU8_CC8_FPC_PVAL_Msk (0xf00UL) /*!< CCU8_CC8 FPC: PVAL (Bitfield-Mask: 0x0f) */ - -/* -------------------------------- CCU8_CC8_FPCS ------------------------------- */ -#define CCU8_CC8_FPCS_PCMP_Pos (0UL) /*!< CCU8_CC8 FPCS: PCMP (Bit 0) */ -#define CCU8_CC8_FPCS_PCMP_Msk (0xfUL) /*!< CCU8_CC8 FPCS: PCMP (Bitfield-Mask: 0x0f) */ - -/* --------------------------------- CCU8_CC8_PR -------------------------------- */ -#define CCU8_CC8_PR_PR_Pos (0UL) /*!< CCU8_CC8 PR: PR (Bit 0) */ -#define CCU8_CC8_PR_PR_Msk (0xffffUL) /*!< CCU8_CC8 PR: PR (Bitfield-Mask: 0xffff) */ - -/* -------------------------------- CCU8_CC8_PRS -------------------------------- */ -#define CCU8_CC8_PRS_PRS_Pos (0UL) /*!< CCU8_CC8 PRS: PRS (Bit 0) */ -#define CCU8_CC8_PRS_PRS_Msk (0xffffUL) /*!< CCU8_CC8 PRS: PRS (Bitfield-Mask: 0xffff) */ - -/* -------------------------------- CCU8_CC8_CR1 -------------------------------- */ -#define CCU8_CC8_CR1_CR1_Pos (0UL) /*!< CCU8_CC8 CR1: CR1 (Bit 0) */ -#define CCU8_CC8_CR1_CR1_Msk (0xffffUL) /*!< CCU8_CC8 CR1: CR1 (Bitfield-Mask: 0xffff) */ - -/* -------------------------------- CCU8_CC8_CR1S ------------------------------- */ -#define CCU8_CC8_CR1S_CR1S_Pos (0UL) /*!< CCU8_CC8 CR1S: CR1S (Bit 0) */ -#define CCU8_CC8_CR1S_CR1S_Msk (0xffffUL) /*!< CCU8_CC8 CR1S: CR1S (Bitfield-Mask: 0xffff) */ - -/* -------------------------------- CCU8_CC8_CR2 -------------------------------- */ -#define CCU8_CC8_CR2_CR2_Pos (0UL) /*!< CCU8_CC8 CR2: CR2 (Bit 0) */ -#define CCU8_CC8_CR2_CR2_Msk (0xffffUL) /*!< CCU8_CC8 CR2: CR2 (Bitfield-Mask: 0xffff) */ - -/* -------------------------------- CCU8_CC8_CR2S ------------------------------- */ -#define CCU8_CC8_CR2S_CR2S_Pos (0UL) /*!< CCU8_CC8 CR2S: CR2S (Bit 0) */ -#define CCU8_CC8_CR2S_CR2S_Msk (0xffffUL) /*!< CCU8_CC8 CR2S: CR2S (Bitfield-Mask: 0xffff) */ - -/* -------------------------------- CCU8_CC8_CHC -------------------------------- */ -#define CCU8_CC8_CHC_ASE_Pos (0UL) /*!< CCU8_CC8 CHC: ASE (Bit 0) */ -#define CCU8_CC8_CHC_ASE_Msk (0x1UL) /*!< CCU8_CC8 CHC: ASE (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_CHC_OCS1_Pos (1UL) /*!< CCU8_CC8 CHC: OCS1 (Bit 1) */ -#define CCU8_CC8_CHC_OCS1_Msk (0x2UL) /*!< CCU8_CC8 CHC: OCS1 (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_CHC_OCS2_Pos (2UL) /*!< CCU8_CC8 CHC: OCS2 (Bit 2) */ -#define CCU8_CC8_CHC_OCS2_Msk (0x4UL) /*!< CCU8_CC8 CHC: OCS2 (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_CHC_OCS3_Pos (3UL) /*!< CCU8_CC8 CHC: OCS3 (Bit 3) */ -#define CCU8_CC8_CHC_OCS3_Msk (0x8UL) /*!< CCU8_CC8 CHC: OCS3 (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_CHC_OCS4_Pos (4UL) /*!< CCU8_CC8 CHC: OCS4 (Bit 4) */ -#define CCU8_CC8_CHC_OCS4_Msk (0x10UL) /*!< CCU8_CC8 CHC: OCS4 (Bitfield-Mask: 0x01) */ - -/* -------------------------------- CCU8_CC8_DTC -------------------------------- */ -#define CCU8_CC8_DTC_DTE1_Pos (0UL) /*!< CCU8_CC8 DTC: DTE1 (Bit 0) */ -#define CCU8_CC8_DTC_DTE1_Msk (0x1UL) /*!< CCU8_CC8 DTC: DTE1 (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_DTC_DTE2_Pos (1UL) /*!< CCU8_CC8 DTC: DTE2 (Bit 1) */ -#define CCU8_CC8_DTC_DTE2_Msk (0x2UL) /*!< CCU8_CC8 DTC: DTE2 (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_DTC_DCEN1_Pos (2UL) /*!< CCU8_CC8 DTC: DCEN1 (Bit 2) */ -#define CCU8_CC8_DTC_DCEN1_Msk (0x4UL) /*!< CCU8_CC8 DTC: DCEN1 (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_DTC_DCEN2_Pos (3UL) /*!< CCU8_CC8 DTC: DCEN2 (Bit 3) */ -#define CCU8_CC8_DTC_DCEN2_Msk (0x8UL) /*!< CCU8_CC8 DTC: DCEN2 (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_DTC_DCEN3_Pos (4UL) /*!< CCU8_CC8 DTC: DCEN3 (Bit 4) */ -#define CCU8_CC8_DTC_DCEN3_Msk (0x10UL) /*!< CCU8_CC8 DTC: DCEN3 (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_DTC_DCEN4_Pos (5UL) /*!< CCU8_CC8 DTC: DCEN4 (Bit 5) */ -#define CCU8_CC8_DTC_DCEN4_Msk (0x20UL) /*!< CCU8_CC8 DTC: DCEN4 (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_DTC_DTCC_Pos (6UL) /*!< CCU8_CC8 DTC: DTCC (Bit 6) */ -#define CCU8_CC8_DTC_DTCC_Msk (0xc0UL) /*!< CCU8_CC8 DTC: DTCC (Bitfield-Mask: 0x03) */ - -/* -------------------------------- CCU8_CC8_DC1R ------------------------------- */ -#define CCU8_CC8_DC1R_DT1R_Pos (0UL) /*!< CCU8_CC8 DC1R: DT1R (Bit 0) */ -#define CCU8_CC8_DC1R_DT1R_Msk (0xffUL) /*!< CCU8_CC8 DC1R: DT1R (Bitfield-Mask: 0xff) */ -#define CCU8_CC8_DC1R_DT1F_Pos (8UL) /*!< CCU8_CC8 DC1R: DT1F (Bit 8) */ -#define CCU8_CC8_DC1R_DT1F_Msk (0xff00UL) /*!< CCU8_CC8 DC1R: DT1F (Bitfield-Mask: 0xff) */ - -/* -------------------------------- CCU8_CC8_DC2R ------------------------------- */ -#define CCU8_CC8_DC2R_DT2R_Pos (0UL) /*!< CCU8_CC8 DC2R: DT2R (Bit 0) */ -#define CCU8_CC8_DC2R_DT2R_Msk (0xffUL) /*!< CCU8_CC8 DC2R: DT2R (Bitfield-Mask: 0xff) */ -#define CCU8_CC8_DC2R_DT2F_Pos (8UL) /*!< CCU8_CC8 DC2R: DT2F (Bit 8) */ -#define CCU8_CC8_DC2R_DT2F_Msk (0xff00UL) /*!< CCU8_CC8 DC2R: DT2F (Bitfield-Mask: 0xff) */ - -/* ------------------------------- CCU8_CC8_TIMER ------------------------------- */ -#define CCU8_CC8_TIMER_TVAL_Pos (0UL) /*!< CCU8_CC8 TIMER: TVAL (Bit 0) */ -#define CCU8_CC8_TIMER_TVAL_Msk (0xffffUL) /*!< CCU8_CC8 TIMER: TVAL (Bitfield-Mask: 0xffff) */ - -/* --------------------------------- CCU8_CC8_CV -------------------------------- */ -#define CCU8_CC8_CV_CAPTV_Pos (0UL) /*!< CCU8_CC8 CV: CAPTV (Bit 0) */ -#define CCU8_CC8_CV_CAPTV_Msk (0xffffUL) /*!< CCU8_CC8 CV: CAPTV (Bitfield-Mask: 0xffff) */ -#define CCU8_CC8_CV_FPCV_Pos (16UL) /*!< CCU8_CC8 CV: FPCV (Bit 16) */ -#define CCU8_CC8_CV_FPCV_Msk (0xf0000UL) /*!< CCU8_CC8 CV: FPCV (Bitfield-Mask: 0x0f) */ -#define CCU8_CC8_CV_FFL_Pos (20UL) /*!< CCU8_CC8 CV: FFL (Bit 20) */ -#define CCU8_CC8_CV_FFL_Msk (0x100000UL) /*!< CCU8_CC8 CV: FFL (Bitfield-Mask: 0x01) */ - -/* -------------------------------- CCU8_CC8_INTS ------------------------------- */ -#define CCU8_CC8_INTS_PMUS_Pos (0UL) /*!< CCU8_CC8 INTS: PMUS (Bit 0) */ -#define CCU8_CC8_INTS_PMUS_Msk (0x1UL) /*!< CCU8_CC8 INTS: PMUS (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_INTS_OMDS_Pos (1UL) /*!< CCU8_CC8 INTS: OMDS (Bit 1) */ -#define CCU8_CC8_INTS_OMDS_Msk (0x2UL) /*!< CCU8_CC8 INTS: OMDS (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_INTS_CMU1S_Pos (2UL) /*!< CCU8_CC8 INTS: CMU1S (Bit 2) */ -#define CCU8_CC8_INTS_CMU1S_Msk (0x4UL) /*!< CCU8_CC8 INTS: CMU1S (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_INTS_CMD1S_Pos (3UL) /*!< CCU8_CC8 INTS: CMD1S (Bit 3) */ -#define CCU8_CC8_INTS_CMD1S_Msk (0x8UL) /*!< CCU8_CC8 INTS: CMD1S (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_INTS_CMU2S_Pos (4UL) /*!< CCU8_CC8 INTS: CMU2S (Bit 4) */ -#define CCU8_CC8_INTS_CMU2S_Msk (0x10UL) /*!< CCU8_CC8 INTS: CMU2S (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_INTS_CMD2S_Pos (5UL) /*!< CCU8_CC8 INTS: CMD2S (Bit 5) */ -#define CCU8_CC8_INTS_CMD2S_Msk (0x20UL) /*!< CCU8_CC8 INTS: CMD2S (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_INTS_E0AS_Pos (8UL) /*!< CCU8_CC8 INTS: E0AS (Bit 8) */ -#define CCU8_CC8_INTS_E0AS_Msk (0x100UL) /*!< CCU8_CC8 INTS: E0AS (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_INTS_E1AS_Pos (9UL) /*!< CCU8_CC8 INTS: E1AS (Bit 9) */ -#define CCU8_CC8_INTS_E1AS_Msk (0x200UL) /*!< CCU8_CC8 INTS: E1AS (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_INTS_E2AS_Pos (10UL) /*!< CCU8_CC8 INTS: E2AS (Bit 10) */ -#define CCU8_CC8_INTS_E2AS_Msk (0x400UL) /*!< CCU8_CC8 INTS: E2AS (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_INTS_TRPF_Pos (11UL) /*!< CCU8_CC8 INTS: TRPF (Bit 11) */ -#define CCU8_CC8_INTS_TRPF_Msk (0x800UL) /*!< CCU8_CC8 INTS: TRPF (Bitfield-Mask: 0x01) */ - -/* -------------------------------- CCU8_CC8_INTE ------------------------------- */ -#define CCU8_CC8_INTE_PME_Pos (0UL) /*!< CCU8_CC8 INTE: PME (Bit 0) */ -#define CCU8_CC8_INTE_PME_Msk (0x1UL) /*!< CCU8_CC8 INTE: PME (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_INTE_OME_Pos (1UL) /*!< CCU8_CC8 INTE: OME (Bit 1) */ -#define CCU8_CC8_INTE_OME_Msk (0x2UL) /*!< CCU8_CC8 INTE: OME (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_INTE_CMU1E_Pos (2UL) /*!< CCU8_CC8 INTE: CMU1E (Bit 2) */ -#define CCU8_CC8_INTE_CMU1E_Msk (0x4UL) /*!< CCU8_CC8 INTE: CMU1E (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_INTE_CMD1E_Pos (3UL) /*!< CCU8_CC8 INTE: CMD1E (Bit 3) */ -#define CCU8_CC8_INTE_CMD1E_Msk (0x8UL) /*!< CCU8_CC8 INTE: CMD1E (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_INTE_CMU2E_Pos (4UL) /*!< CCU8_CC8 INTE: CMU2E (Bit 4) */ -#define CCU8_CC8_INTE_CMU2E_Msk (0x10UL) /*!< CCU8_CC8 INTE: CMU2E (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_INTE_CMD2E_Pos (5UL) /*!< CCU8_CC8 INTE: CMD2E (Bit 5) */ -#define CCU8_CC8_INTE_CMD2E_Msk (0x20UL) /*!< CCU8_CC8 INTE: CMD2E (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_INTE_E0AE_Pos (8UL) /*!< CCU8_CC8 INTE: E0AE (Bit 8) */ -#define CCU8_CC8_INTE_E0AE_Msk (0x100UL) /*!< CCU8_CC8 INTE: E0AE (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_INTE_E1AE_Pos (9UL) /*!< CCU8_CC8 INTE: E1AE (Bit 9) */ -#define CCU8_CC8_INTE_E1AE_Msk (0x200UL) /*!< CCU8_CC8 INTE: E1AE (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_INTE_E2AE_Pos (10UL) /*!< CCU8_CC8 INTE: E2AE (Bit 10) */ -#define CCU8_CC8_INTE_E2AE_Msk (0x400UL) /*!< CCU8_CC8 INTE: E2AE (Bitfield-Mask: 0x01) */ - -/* -------------------------------- CCU8_CC8_SRS -------------------------------- */ -#define CCU8_CC8_SRS_POSR_Pos (0UL) /*!< CCU8_CC8 SRS: POSR (Bit 0) */ -#define CCU8_CC8_SRS_POSR_Msk (0x3UL) /*!< CCU8_CC8 SRS: POSR (Bitfield-Mask: 0x03) */ -#define CCU8_CC8_SRS_CM1SR_Pos (2UL) /*!< CCU8_CC8 SRS: CM1SR (Bit 2) */ -#define CCU8_CC8_SRS_CM1SR_Msk (0xcUL) /*!< CCU8_CC8 SRS: CM1SR (Bitfield-Mask: 0x03) */ -#define CCU8_CC8_SRS_CM2SR_Pos (4UL) /*!< CCU8_CC8 SRS: CM2SR (Bit 4) */ -#define CCU8_CC8_SRS_CM2SR_Msk (0x30UL) /*!< CCU8_CC8 SRS: CM2SR (Bitfield-Mask: 0x03) */ -#define CCU8_CC8_SRS_E0SR_Pos (8UL) /*!< CCU8_CC8 SRS: E0SR (Bit 8) */ -#define CCU8_CC8_SRS_E0SR_Msk (0x300UL) /*!< CCU8_CC8 SRS: E0SR (Bitfield-Mask: 0x03) */ -#define CCU8_CC8_SRS_E1SR_Pos (10UL) /*!< CCU8_CC8 SRS: E1SR (Bit 10) */ -#define CCU8_CC8_SRS_E1SR_Msk (0xc00UL) /*!< CCU8_CC8 SRS: E1SR (Bitfield-Mask: 0x03) */ -#define CCU8_CC8_SRS_E2SR_Pos (12UL) /*!< CCU8_CC8 SRS: E2SR (Bit 12) */ -#define CCU8_CC8_SRS_E2SR_Msk (0x3000UL) /*!< CCU8_CC8 SRS: E2SR (Bitfield-Mask: 0x03) */ - -/* -------------------------------- CCU8_CC8_SWS -------------------------------- */ -#define CCU8_CC8_SWS_SPM_Pos (0UL) /*!< CCU8_CC8 SWS: SPM (Bit 0) */ -#define CCU8_CC8_SWS_SPM_Msk (0x1UL) /*!< CCU8_CC8 SWS: SPM (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_SWS_SOM_Pos (1UL) /*!< CCU8_CC8 SWS: SOM (Bit 1) */ -#define CCU8_CC8_SWS_SOM_Msk (0x2UL) /*!< CCU8_CC8 SWS: SOM (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_SWS_SCM1U_Pos (2UL) /*!< CCU8_CC8 SWS: SCM1U (Bit 2) */ -#define CCU8_CC8_SWS_SCM1U_Msk (0x4UL) /*!< CCU8_CC8 SWS: SCM1U (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_SWS_SCM1D_Pos (3UL) /*!< CCU8_CC8 SWS: SCM1D (Bit 3) */ -#define CCU8_CC8_SWS_SCM1D_Msk (0x8UL) /*!< CCU8_CC8 SWS: SCM1D (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_SWS_SCM2U_Pos (4UL) /*!< CCU8_CC8 SWS: SCM2U (Bit 4) */ -#define CCU8_CC8_SWS_SCM2U_Msk (0x10UL) /*!< CCU8_CC8 SWS: SCM2U (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_SWS_SCM2D_Pos (5UL) /*!< CCU8_CC8 SWS: SCM2D (Bit 5) */ -#define CCU8_CC8_SWS_SCM2D_Msk (0x20UL) /*!< CCU8_CC8 SWS: SCM2D (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_SWS_SE0A_Pos (8UL) /*!< CCU8_CC8 SWS: SE0A (Bit 8) */ -#define CCU8_CC8_SWS_SE0A_Msk (0x100UL) /*!< CCU8_CC8 SWS: SE0A (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_SWS_SE1A_Pos (9UL) /*!< CCU8_CC8 SWS: SE1A (Bit 9) */ -#define CCU8_CC8_SWS_SE1A_Msk (0x200UL) /*!< CCU8_CC8 SWS: SE1A (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_SWS_SE2A_Pos (10UL) /*!< CCU8_CC8 SWS: SE2A (Bit 10) */ -#define CCU8_CC8_SWS_SE2A_Msk (0x400UL) /*!< CCU8_CC8 SWS: SE2A (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_SWS_STRPF_Pos (11UL) /*!< CCU8_CC8 SWS: STRPF (Bit 11) */ -#define CCU8_CC8_SWS_STRPF_Msk (0x800UL) /*!< CCU8_CC8 SWS: STRPF (Bitfield-Mask: 0x01) */ - -/* -------------------------------- CCU8_CC8_SWR -------------------------------- */ -#define CCU8_CC8_SWR_RPM_Pos (0UL) /*!< CCU8_CC8 SWR: RPM (Bit 0) */ -#define CCU8_CC8_SWR_RPM_Msk (0x1UL) /*!< CCU8_CC8 SWR: RPM (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_SWR_ROM_Pos (1UL) /*!< CCU8_CC8 SWR: ROM (Bit 1) */ -#define CCU8_CC8_SWR_ROM_Msk (0x2UL) /*!< CCU8_CC8 SWR: ROM (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_SWR_RCM1U_Pos (2UL) /*!< CCU8_CC8 SWR: RCM1U (Bit 2) */ -#define CCU8_CC8_SWR_RCM1U_Msk (0x4UL) /*!< CCU8_CC8 SWR: RCM1U (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_SWR_RCM1D_Pos (3UL) /*!< CCU8_CC8 SWR: RCM1D (Bit 3) */ -#define CCU8_CC8_SWR_RCM1D_Msk (0x8UL) /*!< CCU8_CC8 SWR: RCM1D (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_SWR_RCM2U_Pos (4UL) /*!< CCU8_CC8 SWR: RCM2U (Bit 4) */ -#define CCU8_CC8_SWR_RCM2U_Msk (0x10UL) /*!< CCU8_CC8 SWR: RCM2U (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_SWR_RCM2D_Pos (5UL) /*!< CCU8_CC8 SWR: RCM2D (Bit 5) */ -#define CCU8_CC8_SWR_RCM2D_Msk (0x20UL) /*!< CCU8_CC8 SWR: RCM2D (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_SWR_RE0A_Pos (8UL) /*!< CCU8_CC8 SWR: RE0A (Bit 8) */ -#define CCU8_CC8_SWR_RE0A_Msk (0x100UL) /*!< CCU8_CC8 SWR: RE0A (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_SWR_RE1A_Pos (9UL) /*!< CCU8_CC8 SWR: RE1A (Bit 9) */ -#define CCU8_CC8_SWR_RE1A_Msk (0x200UL) /*!< CCU8_CC8 SWR: RE1A (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_SWR_RE2A_Pos (10UL) /*!< CCU8_CC8 SWR: RE2A (Bit 10) */ -#define CCU8_CC8_SWR_RE2A_Msk (0x400UL) /*!< CCU8_CC8 SWR: RE2A (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_SWR_RTRPF_Pos (11UL) /*!< CCU8_CC8 SWR: RTRPF (Bit 11) */ -#define CCU8_CC8_SWR_RTRPF_Msk (0x800UL) /*!< CCU8_CC8 SWR: RTRPF (Bitfield-Mask: 0x01) */ - -/* -------------------------------- CCU8_CC8_STC -------------------------------- */ -#define CCU8_CC8_STC_CSE_Pos (0UL) /*!< CCU8_CC8 STC: CSE (Bit 0) */ -#define CCU8_CC8_STC_CSE_Msk (0x1UL) /*!< CCU8_CC8 STC: CSE (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_STC_STM_Pos (1UL) /*!< CCU8_CC8 STC: STM (Bit 1) */ -#define CCU8_CC8_STC_STM_Msk (0x6UL) /*!< CCU8_CC8 STC: STM (Bitfield-Mask: 0x03) */ - -/* ------------------------------- CCU8_CC8_ECRD0 ------------------------------- */ -#define CCU8_CC8_ECRD0_CAPV_Pos (0UL) /*!< CCU8_CC8 ECRD0: CAPV (Bit 0) */ -#define CCU8_CC8_ECRD0_CAPV_Msk (0xffffUL) /*!< CCU8_CC8 ECRD0: CAPV (Bitfield-Mask: 0xffff) */ -#define CCU8_CC8_ECRD0_FPCV_Pos (16UL) /*!< CCU8_CC8 ECRD0: FPCV (Bit 16) */ -#define CCU8_CC8_ECRD0_FPCV_Msk (0xf0000UL) /*!< CCU8_CC8 ECRD0: FPCV (Bitfield-Mask: 0x0f) */ -#define CCU8_CC8_ECRD0_SPTR_Pos (20UL) /*!< CCU8_CC8 ECRD0: SPTR (Bit 20) */ -#define CCU8_CC8_ECRD0_SPTR_Msk (0x300000UL) /*!< CCU8_CC8 ECRD0: SPTR (Bitfield-Mask: 0x03) */ -#define CCU8_CC8_ECRD0_VPTR_Pos (22UL) /*!< CCU8_CC8 ECRD0: VPTR (Bit 22) */ -#define CCU8_CC8_ECRD0_VPTR_Msk (0xc00000UL) /*!< CCU8_CC8 ECRD0: VPTR (Bitfield-Mask: 0x03) */ -#define CCU8_CC8_ECRD0_FFL_Pos (24UL) /*!< CCU8_CC8 ECRD0: FFL (Bit 24) */ -#define CCU8_CC8_ECRD0_FFL_Msk (0x1000000UL) /*!< CCU8_CC8 ECRD0: FFL (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_ECRD0_LCV_Pos (25UL) /*!< CCU8_CC8 ECRD0: LCV (Bit 25) */ -#define CCU8_CC8_ECRD0_LCV_Msk (0x2000000UL) /*!< CCU8_CC8 ECRD0: LCV (Bitfield-Mask: 0x01) */ - -/* ------------------------------- CCU8_CC8_ECRD1 ------------------------------- */ -#define CCU8_CC8_ECRD1_CAPV_Pos (0UL) /*!< CCU8_CC8 ECRD1: CAPV (Bit 0) */ -#define CCU8_CC8_ECRD1_CAPV_Msk (0xffffUL) /*!< CCU8_CC8 ECRD1: CAPV (Bitfield-Mask: 0xffff) */ -#define CCU8_CC8_ECRD1_FPCV_Pos (16UL) /*!< CCU8_CC8 ECRD1: FPCV (Bit 16) */ -#define CCU8_CC8_ECRD1_FPCV_Msk (0xf0000UL) /*!< CCU8_CC8 ECRD1: FPCV (Bitfield-Mask: 0x0f) */ -#define CCU8_CC8_ECRD1_SPTR_Pos (20UL) /*!< CCU8_CC8 ECRD1: SPTR (Bit 20) */ -#define CCU8_CC8_ECRD1_SPTR_Msk (0x300000UL) /*!< CCU8_CC8 ECRD1: SPTR (Bitfield-Mask: 0x03) */ -#define CCU8_CC8_ECRD1_VPTR_Pos (22UL) /*!< CCU8_CC8 ECRD1: VPTR (Bit 22) */ -#define CCU8_CC8_ECRD1_VPTR_Msk (0xc00000UL) /*!< CCU8_CC8 ECRD1: VPTR (Bitfield-Mask: 0x03) */ -#define CCU8_CC8_ECRD1_FFL_Pos (24UL) /*!< CCU8_CC8 ECRD1: FFL (Bit 24) */ -#define CCU8_CC8_ECRD1_FFL_Msk (0x1000000UL) /*!< CCU8_CC8 ECRD1: FFL (Bitfield-Mask: 0x01) */ -#define CCU8_CC8_ECRD1_LCV_Pos (25UL) /*!< CCU8_CC8 ECRD1: LCV (Bit 25) */ -#define CCU8_CC8_ECRD1_LCV_Msk (0x2000000UL) /*!< CCU8_CC8 ECRD1: LCV (Bitfield-Mask: 0x01) */ - - -/* ================================================================================ */ -/* ================ Group 'POSIF' Position & Mask ================ */ -/* ================================================================================ */ - - -/* --------------------------------- POSIF_PCONF -------------------------------- */ -#define POSIF_PCONF_FSEL_Pos (0UL) /*!< POSIF PCONF: FSEL (Bit 0) */ -#define POSIF_PCONF_FSEL_Msk (0x3UL) /*!< POSIF PCONF: FSEL (Bitfield-Mask: 0x03) */ -#define POSIF_PCONF_QDCM_Pos (2UL) /*!< POSIF PCONF: QDCM (Bit 2) */ -#define POSIF_PCONF_QDCM_Msk (0x4UL) /*!< POSIF PCONF: QDCM (Bitfield-Mask: 0x01) */ -#define POSIF_PCONF_HIDG_Pos (4UL) /*!< POSIF PCONF: HIDG (Bit 4) */ -#define POSIF_PCONF_HIDG_Msk (0x10UL) /*!< POSIF PCONF: HIDG (Bitfield-Mask: 0x01) */ -#define POSIF_PCONF_MCUE_Pos (5UL) /*!< POSIF PCONF: MCUE (Bit 5) */ -#define POSIF_PCONF_MCUE_Msk (0x20UL) /*!< POSIF PCONF: MCUE (Bitfield-Mask: 0x01) */ -#define POSIF_PCONF_INSEL0_Pos (8UL) /*!< POSIF PCONF: INSEL0 (Bit 8) */ -#define POSIF_PCONF_INSEL0_Msk (0x300UL) /*!< POSIF PCONF: INSEL0 (Bitfield-Mask: 0x03) */ -#define POSIF_PCONF_INSEL1_Pos (10UL) /*!< POSIF PCONF: INSEL1 (Bit 10) */ -#define POSIF_PCONF_INSEL1_Msk (0xc00UL) /*!< POSIF PCONF: INSEL1 (Bitfield-Mask: 0x03) */ -#define POSIF_PCONF_INSEL2_Pos (12UL) /*!< POSIF PCONF: INSEL2 (Bit 12) */ -#define POSIF_PCONF_INSEL2_Msk (0x3000UL) /*!< POSIF PCONF: INSEL2 (Bitfield-Mask: 0x03) */ -#define POSIF_PCONF_DSEL_Pos (16UL) /*!< POSIF PCONF: DSEL (Bit 16) */ -#define POSIF_PCONF_DSEL_Msk (0x10000UL) /*!< POSIF PCONF: DSEL (Bitfield-Mask: 0x01) */ -#define POSIF_PCONF_SPES_Pos (17UL) /*!< POSIF PCONF: SPES (Bit 17) */ -#define POSIF_PCONF_SPES_Msk (0x20000UL) /*!< POSIF PCONF: SPES (Bitfield-Mask: 0x01) */ -#define POSIF_PCONF_MSETS_Pos (18UL) /*!< POSIF PCONF: MSETS (Bit 18) */ -#define POSIF_PCONF_MSETS_Msk (0x1c0000UL) /*!< POSIF PCONF: MSETS (Bitfield-Mask: 0x07) */ -#define POSIF_PCONF_MSES_Pos (21UL) /*!< POSIF PCONF: MSES (Bit 21) */ -#define POSIF_PCONF_MSES_Msk (0x200000UL) /*!< POSIF PCONF: MSES (Bitfield-Mask: 0x01) */ -#define POSIF_PCONF_MSYNS_Pos (22UL) /*!< POSIF PCONF: MSYNS (Bit 22) */ -#define POSIF_PCONF_MSYNS_Msk (0xc00000UL) /*!< POSIF PCONF: MSYNS (Bitfield-Mask: 0x03) */ -#define POSIF_PCONF_EWIS_Pos (24UL) /*!< POSIF PCONF: EWIS (Bit 24) */ -#define POSIF_PCONF_EWIS_Msk (0x3000000UL) /*!< POSIF PCONF: EWIS (Bitfield-Mask: 0x03) */ -#define POSIF_PCONF_EWIE_Pos (26UL) /*!< POSIF PCONF: EWIE (Bit 26) */ -#define POSIF_PCONF_EWIE_Msk (0x4000000UL) /*!< POSIF PCONF: EWIE (Bitfield-Mask: 0x01) */ -#define POSIF_PCONF_EWIL_Pos (27UL) /*!< POSIF PCONF: EWIL (Bit 27) */ -#define POSIF_PCONF_EWIL_Msk (0x8000000UL) /*!< POSIF PCONF: EWIL (Bitfield-Mask: 0x01) */ -#define POSIF_PCONF_LPC_Pos (28UL) /*!< POSIF PCONF: LPC (Bit 28) */ -#define POSIF_PCONF_LPC_Msk (0x70000000UL) /*!< POSIF PCONF: LPC (Bitfield-Mask: 0x07) */ - -/* --------------------------------- POSIF_PSUS --------------------------------- */ -#define POSIF_PSUS_QSUS_Pos (0UL) /*!< POSIF PSUS: QSUS (Bit 0) */ -#define POSIF_PSUS_QSUS_Msk (0x3UL) /*!< POSIF PSUS: QSUS (Bitfield-Mask: 0x03) */ -#define POSIF_PSUS_MSUS_Pos (2UL) /*!< POSIF PSUS: MSUS (Bit 2) */ -#define POSIF_PSUS_MSUS_Msk (0xcUL) /*!< POSIF PSUS: MSUS (Bitfield-Mask: 0x03) */ - -/* --------------------------------- POSIF_PRUNS -------------------------------- */ -#define POSIF_PRUNS_SRB_Pos (0UL) /*!< POSIF PRUNS: SRB (Bit 0) */ -#define POSIF_PRUNS_SRB_Msk (0x1UL) /*!< POSIF PRUNS: SRB (Bitfield-Mask: 0x01) */ - -/* --------------------------------- POSIF_PRUNC -------------------------------- */ -#define POSIF_PRUNC_CRB_Pos (0UL) /*!< POSIF PRUNC: CRB (Bit 0) */ -#define POSIF_PRUNC_CRB_Msk (0x1UL) /*!< POSIF PRUNC: CRB (Bitfield-Mask: 0x01) */ -#define POSIF_PRUNC_CSM_Pos (1UL) /*!< POSIF PRUNC: CSM (Bit 1) */ -#define POSIF_PRUNC_CSM_Msk (0x2UL) /*!< POSIF PRUNC: CSM (Bitfield-Mask: 0x01) */ - -/* --------------------------------- POSIF_PRUN --------------------------------- */ -#define POSIF_PRUN_RB_Pos (0UL) /*!< POSIF PRUN: RB (Bit 0) */ -#define POSIF_PRUN_RB_Msk (0x1UL) /*!< POSIF PRUN: RB (Bitfield-Mask: 0x01) */ - -/* --------------------------------- POSIF_MIDR --------------------------------- */ -#define POSIF_MIDR_MODR_Pos (0UL) /*!< POSIF MIDR: MODR (Bit 0) */ -#define POSIF_MIDR_MODR_Msk (0xffUL) /*!< POSIF MIDR: MODR (Bitfield-Mask: 0xff) */ -#define POSIF_MIDR_MODT_Pos (8UL) /*!< POSIF MIDR: MODT (Bit 8) */ -#define POSIF_MIDR_MODT_Msk (0xff00UL) /*!< POSIF MIDR: MODT (Bitfield-Mask: 0xff) */ -#define POSIF_MIDR_MODN_Pos (16UL) /*!< POSIF MIDR: MODN (Bit 16) */ -#define POSIF_MIDR_MODN_Msk (0xffff0000UL) /*!< POSIF MIDR: MODN (Bitfield-Mask: 0xffff) */ - -/* --------------------------------- POSIF_HALP --------------------------------- */ -#define POSIF_HALP_HCP_Pos (0UL) /*!< POSIF HALP: HCP (Bit 0) */ -#define POSIF_HALP_HCP_Msk (0x7UL) /*!< POSIF HALP: HCP (Bitfield-Mask: 0x07) */ -#define POSIF_HALP_HEP_Pos (3UL) /*!< POSIF HALP: HEP (Bit 3) */ -#define POSIF_HALP_HEP_Msk (0x38UL) /*!< POSIF HALP: HEP (Bitfield-Mask: 0x07) */ - -/* --------------------------------- POSIF_HALPS -------------------------------- */ -#define POSIF_HALPS_HCPS_Pos (0UL) /*!< POSIF HALPS: HCPS (Bit 0) */ -#define POSIF_HALPS_HCPS_Msk (0x7UL) /*!< POSIF HALPS: HCPS (Bitfield-Mask: 0x07) */ -#define POSIF_HALPS_HEPS_Pos (3UL) /*!< POSIF HALPS: HEPS (Bit 3) */ -#define POSIF_HALPS_HEPS_Msk (0x38UL) /*!< POSIF HALPS: HEPS (Bitfield-Mask: 0x07) */ - -/* ---------------------------------- POSIF_MCM --------------------------------- */ -#define POSIF_MCM_MCMP_Pos (0UL) /*!< POSIF MCM: MCMP (Bit 0) */ -#define POSIF_MCM_MCMP_Msk (0xffffUL) /*!< POSIF MCM: MCMP (Bitfield-Mask: 0xffff) */ - -/* --------------------------------- POSIF_MCSM --------------------------------- */ -#define POSIF_MCSM_MCMPS_Pos (0UL) /*!< POSIF MCSM: MCMPS (Bit 0) */ -#define POSIF_MCSM_MCMPS_Msk (0xffffUL) /*!< POSIF MCSM: MCMPS (Bitfield-Mask: 0xffff) */ - -/* --------------------------------- POSIF_MCMS --------------------------------- */ -#define POSIF_MCMS_MNPS_Pos (0UL) /*!< POSIF MCMS: MNPS (Bit 0) */ -#define POSIF_MCMS_MNPS_Msk (0x1UL) /*!< POSIF MCMS: MNPS (Bitfield-Mask: 0x01) */ -#define POSIF_MCMS_STHR_Pos (1UL) /*!< POSIF MCMS: STHR (Bit 1) */ -#define POSIF_MCMS_STHR_Msk (0x2UL) /*!< POSIF MCMS: STHR (Bitfield-Mask: 0x01) */ -#define POSIF_MCMS_STMR_Pos (2UL) /*!< POSIF MCMS: STMR (Bit 2) */ -#define POSIF_MCMS_STMR_Msk (0x4UL) /*!< POSIF MCMS: STMR (Bitfield-Mask: 0x01) */ - -/* --------------------------------- POSIF_MCMC --------------------------------- */ -#define POSIF_MCMC_MNPC_Pos (0UL) /*!< POSIF MCMC: MNPC (Bit 0) */ -#define POSIF_MCMC_MNPC_Msk (0x1UL) /*!< POSIF MCMC: MNPC (Bitfield-Mask: 0x01) */ -#define POSIF_MCMC_MPC_Pos (1UL) /*!< POSIF MCMC: MPC (Bit 1) */ -#define POSIF_MCMC_MPC_Msk (0x2UL) /*!< POSIF MCMC: MPC (Bitfield-Mask: 0x01) */ - -/* --------------------------------- POSIF_MCMF --------------------------------- */ -#define POSIF_MCMF_MSS_Pos (0UL) /*!< POSIF MCMF: MSS (Bit 0) */ -#define POSIF_MCMF_MSS_Msk (0x1UL) /*!< POSIF MCMF: MSS (Bitfield-Mask: 0x01) */ - -/* ---------------------------------- POSIF_QDC --------------------------------- */ -#define POSIF_QDC_PALS_Pos (0UL) /*!< POSIF QDC: PALS (Bit 0) */ -#define POSIF_QDC_PALS_Msk (0x1UL) /*!< POSIF QDC: PALS (Bitfield-Mask: 0x01) */ -#define POSIF_QDC_PBLS_Pos (1UL) /*!< POSIF QDC: PBLS (Bit 1) */ -#define POSIF_QDC_PBLS_Msk (0x2UL) /*!< POSIF QDC: PBLS (Bitfield-Mask: 0x01) */ -#define POSIF_QDC_PHS_Pos (2UL) /*!< POSIF QDC: PHS (Bit 2) */ -#define POSIF_QDC_PHS_Msk (0x4UL) /*!< POSIF QDC: PHS (Bitfield-Mask: 0x01) */ -#define POSIF_QDC_ICM_Pos (4UL) /*!< POSIF QDC: ICM (Bit 4) */ -#define POSIF_QDC_ICM_Msk (0x30UL) /*!< POSIF QDC: ICM (Bitfield-Mask: 0x03) */ -#define POSIF_QDC_DVAL_Pos (8UL) /*!< POSIF QDC: DVAL (Bit 8) */ -#define POSIF_QDC_DVAL_Msk (0x100UL) /*!< POSIF QDC: DVAL (Bitfield-Mask: 0x01) */ - -/* --------------------------------- POSIF_PFLG --------------------------------- */ -#define POSIF_PFLG_CHES_Pos (0UL) /*!< POSIF PFLG: CHES (Bit 0) */ -#define POSIF_PFLG_CHES_Msk (0x1UL) /*!< POSIF PFLG: CHES (Bitfield-Mask: 0x01) */ -#define POSIF_PFLG_WHES_Pos (1UL) /*!< POSIF PFLG: WHES (Bit 1) */ -#define POSIF_PFLG_WHES_Msk (0x2UL) /*!< POSIF PFLG: WHES (Bitfield-Mask: 0x01) */ -#define POSIF_PFLG_HIES_Pos (2UL) /*!< POSIF PFLG: HIES (Bit 2) */ -#define POSIF_PFLG_HIES_Msk (0x4UL) /*!< POSIF PFLG: HIES (Bitfield-Mask: 0x01) */ -#define POSIF_PFLG_MSTS_Pos (4UL) /*!< POSIF PFLG: MSTS (Bit 4) */ -#define POSIF_PFLG_MSTS_Msk (0x10UL) /*!< POSIF PFLG: MSTS (Bitfield-Mask: 0x01) */ -#define POSIF_PFLG_INDXS_Pos (8UL) /*!< POSIF PFLG: INDXS (Bit 8) */ -#define POSIF_PFLG_INDXS_Msk (0x100UL) /*!< POSIF PFLG: INDXS (Bitfield-Mask: 0x01) */ -#define POSIF_PFLG_ERRS_Pos (9UL) /*!< POSIF PFLG: ERRS (Bit 9) */ -#define POSIF_PFLG_ERRS_Msk (0x200UL) /*!< POSIF PFLG: ERRS (Bitfield-Mask: 0x01) */ -#define POSIF_PFLG_CNTS_Pos (10UL) /*!< POSIF PFLG: CNTS (Bit 10) */ -#define POSIF_PFLG_CNTS_Msk (0x400UL) /*!< POSIF PFLG: CNTS (Bitfield-Mask: 0x01) */ -#define POSIF_PFLG_DIRS_Pos (11UL) /*!< POSIF PFLG: DIRS (Bit 11) */ -#define POSIF_PFLG_DIRS_Msk (0x800UL) /*!< POSIF PFLG: DIRS (Bitfield-Mask: 0x01) */ -#define POSIF_PFLG_PCLKS_Pos (12UL) /*!< POSIF PFLG: PCLKS (Bit 12) */ -#define POSIF_PFLG_PCLKS_Msk (0x1000UL) /*!< POSIF PFLG: PCLKS (Bitfield-Mask: 0x01) */ - -/* --------------------------------- POSIF_PFLGE -------------------------------- */ -#define POSIF_PFLGE_ECHE_Pos (0UL) /*!< POSIF PFLGE: ECHE (Bit 0) */ -#define POSIF_PFLGE_ECHE_Msk (0x1UL) /*!< POSIF PFLGE: ECHE (Bitfield-Mask: 0x01) */ -#define POSIF_PFLGE_EWHE_Pos (1UL) /*!< POSIF PFLGE: EWHE (Bit 1) */ -#define POSIF_PFLGE_EWHE_Msk (0x2UL) /*!< POSIF PFLGE: EWHE (Bitfield-Mask: 0x01) */ -#define POSIF_PFLGE_EHIE_Pos (2UL) /*!< POSIF PFLGE: EHIE (Bit 2) */ -#define POSIF_PFLGE_EHIE_Msk (0x4UL) /*!< POSIF PFLGE: EHIE (Bitfield-Mask: 0x01) */ -#define POSIF_PFLGE_EMST_Pos (4UL) /*!< POSIF PFLGE: EMST (Bit 4) */ -#define POSIF_PFLGE_EMST_Msk (0x10UL) /*!< POSIF PFLGE: EMST (Bitfield-Mask: 0x01) */ -#define POSIF_PFLGE_EINDX_Pos (8UL) /*!< POSIF PFLGE: EINDX (Bit 8) */ -#define POSIF_PFLGE_EINDX_Msk (0x100UL) /*!< POSIF PFLGE: EINDX (Bitfield-Mask: 0x01) */ -#define POSIF_PFLGE_EERR_Pos (9UL) /*!< POSIF PFLGE: EERR (Bit 9) */ -#define POSIF_PFLGE_EERR_Msk (0x200UL) /*!< POSIF PFLGE: EERR (Bitfield-Mask: 0x01) */ -#define POSIF_PFLGE_ECNT_Pos (10UL) /*!< POSIF PFLGE: ECNT (Bit 10) */ -#define POSIF_PFLGE_ECNT_Msk (0x400UL) /*!< POSIF PFLGE: ECNT (Bitfield-Mask: 0x01) */ -#define POSIF_PFLGE_EDIR_Pos (11UL) /*!< POSIF PFLGE: EDIR (Bit 11) */ -#define POSIF_PFLGE_EDIR_Msk (0x800UL) /*!< POSIF PFLGE: EDIR (Bitfield-Mask: 0x01) */ -#define POSIF_PFLGE_EPCLK_Pos (12UL) /*!< POSIF PFLGE: EPCLK (Bit 12) */ -#define POSIF_PFLGE_EPCLK_Msk (0x1000UL) /*!< POSIF PFLGE: EPCLK (Bitfield-Mask: 0x01) */ -#define POSIF_PFLGE_CHESEL_Pos (16UL) /*!< POSIF PFLGE: CHESEL (Bit 16) */ -#define POSIF_PFLGE_CHESEL_Msk (0x10000UL) /*!< POSIF PFLGE: CHESEL (Bitfield-Mask: 0x01) */ -#define POSIF_PFLGE_WHESEL_Pos (17UL) /*!< POSIF PFLGE: WHESEL (Bit 17) */ -#define POSIF_PFLGE_WHESEL_Msk (0x20000UL) /*!< POSIF PFLGE: WHESEL (Bitfield-Mask: 0x01) */ -#define POSIF_PFLGE_HIESEL_Pos (18UL) /*!< POSIF PFLGE: HIESEL (Bit 18) */ -#define POSIF_PFLGE_HIESEL_Msk (0x40000UL) /*!< POSIF PFLGE: HIESEL (Bitfield-Mask: 0x01) */ -#define POSIF_PFLGE_MSTSEL_Pos (20UL) /*!< POSIF PFLGE: MSTSEL (Bit 20) */ -#define POSIF_PFLGE_MSTSEL_Msk (0x100000UL) /*!< POSIF PFLGE: MSTSEL (Bitfield-Mask: 0x01) */ -#define POSIF_PFLGE_INDSEL_Pos (24UL) /*!< POSIF PFLGE: INDSEL (Bit 24) */ -#define POSIF_PFLGE_INDSEL_Msk (0x1000000UL) /*!< POSIF PFLGE: INDSEL (Bitfield-Mask: 0x01) */ -#define POSIF_PFLGE_ERRSEL_Pos (25UL) /*!< POSIF PFLGE: ERRSEL (Bit 25) */ -#define POSIF_PFLGE_ERRSEL_Msk (0x2000000UL) /*!< POSIF PFLGE: ERRSEL (Bitfield-Mask: 0x01) */ -#define POSIF_PFLGE_CNTSEL_Pos (26UL) /*!< POSIF PFLGE: CNTSEL (Bit 26) */ -#define POSIF_PFLGE_CNTSEL_Msk (0x4000000UL) /*!< POSIF PFLGE: CNTSEL (Bitfield-Mask: 0x01) */ -#define POSIF_PFLGE_DIRSEL_Pos (27UL) /*!< POSIF PFLGE: DIRSEL (Bit 27) */ -#define POSIF_PFLGE_DIRSEL_Msk (0x8000000UL) /*!< POSIF PFLGE: DIRSEL (Bitfield-Mask: 0x01) */ -#define POSIF_PFLGE_PCLSEL_Pos (28UL) /*!< POSIF PFLGE: PCLSEL (Bit 28) */ -#define POSIF_PFLGE_PCLSEL_Msk (0x10000000UL) /*!< POSIF PFLGE: PCLSEL (Bitfield-Mask: 0x01) */ - -/* --------------------------------- POSIF_SPFLG -------------------------------- */ -#define POSIF_SPFLG_SCHE_Pos (0UL) /*!< POSIF SPFLG: SCHE (Bit 0) */ -#define POSIF_SPFLG_SCHE_Msk (0x1UL) /*!< POSIF SPFLG: SCHE (Bitfield-Mask: 0x01) */ -#define POSIF_SPFLG_SWHE_Pos (1UL) /*!< POSIF SPFLG: SWHE (Bit 1) */ -#define POSIF_SPFLG_SWHE_Msk (0x2UL) /*!< POSIF SPFLG: SWHE (Bitfield-Mask: 0x01) */ -#define POSIF_SPFLG_SHIE_Pos (2UL) /*!< POSIF SPFLG: SHIE (Bit 2) */ -#define POSIF_SPFLG_SHIE_Msk (0x4UL) /*!< POSIF SPFLG: SHIE (Bitfield-Mask: 0x01) */ -#define POSIF_SPFLG_SMST_Pos (4UL) /*!< POSIF SPFLG: SMST (Bit 4) */ -#define POSIF_SPFLG_SMST_Msk (0x10UL) /*!< POSIF SPFLG: SMST (Bitfield-Mask: 0x01) */ -#define POSIF_SPFLG_SINDX_Pos (8UL) /*!< POSIF SPFLG: SINDX (Bit 8) */ -#define POSIF_SPFLG_SINDX_Msk (0x100UL) /*!< POSIF SPFLG: SINDX (Bitfield-Mask: 0x01) */ -#define POSIF_SPFLG_SERR_Pos (9UL) /*!< POSIF SPFLG: SERR (Bit 9) */ -#define POSIF_SPFLG_SERR_Msk (0x200UL) /*!< POSIF SPFLG: SERR (Bitfield-Mask: 0x01) */ -#define POSIF_SPFLG_SCNT_Pos (10UL) /*!< POSIF SPFLG: SCNT (Bit 10) */ -#define POSIF_SPFLG_SCNT_Msk (0x400UL) /*!< POSIF SPFLG: SCNT (Bitfield-Mask: 0x01) */ -#define POSIF_SPFLG_SDIR_Pos (11UL) /*!< POSIF SPFLG: SDIR (Bit 11) */ -#define POSIF_SPFLG_SDIR_Msk (0x800UL) /*!< POSIF SPFLG: SDIR (Bitfield-Mask: 0x01) */ -#define POSIF_SPFLG_SPCLK_Pos (12UL) /*!< POSIF SPFLG: SPCLK (Bit 12) */ -#define POSIF_SPFLG_SPCLK_Msk (0x1000UL) /*!< POSIF SPFLG: SPCLK (Bitfield-Mask: 0x01) */ - -/* --------------------------------- POSIF_RPFLG -------------------------------- */ -#define POSIF_RPFLG_RCHE_Pos (0UL) /*!< POSIF RPFLG: RCHE (Bit 0) */ -#define POSIF_RPFLG_RCHE_Msk (0x1UL) /*!< POSIF RPFLG: RCHE (Bitfield-Mask: 0x01) */ -#define POSIF_RPFLG_RWHE_Pos (1UL) /*!< POSIF RPFLG: RWHE (Bit 1) */ -#define POSIF_RPFLG_RWHE_Msk (0x2UL) /*!< POSIF RPFLG: RWHE (Bitfield-Mask: 0x01) */ -#define POSIF_RPFLG_RHIE_Pos (2UL) /*!< POSIF RPFLG: RHIE (Bit 2) */ -#define POSIF_RPFLG_RHIE_Msk (0x4UL) /*!< POSIF RPFLG: RHIE (Bitfield-Mask: 0x01) */ -#define POSIF_RPFLG_RMST_Pos (4UL) /*!< POSIF RPFLG: RMST (Bit 4) */ -#define POSIF_RPFLG_RMST_Msk (0x10UL) /*!< POSIF RPFLG: RMST (Bitfield-Mask: 0x01) */ -#define POSIF_RPFLG_RINDX_Pos (8UL) /*!< POSIF RPFLG: RINDX (Bit 8) */ -#define POSIF_RPFLG_RINDX_Msk (0x100UL) /*!< POSIF RPFLG: RINDX (Bitfield-Mask: 0x01) */ -#define POSIF_RPFLG_RERR_Pos (9UL) /*!< POSIF RPFLG: RERR (Bit 9) */ -#define POSIF_RPFLG_RERR_Msk (0x200UL) /*!< POSIF RPFLG: RERR (Bitfield-Mask: 0x01) */ -#define POSIF_RPFLG_RCNT_Pos (10UL) /*!< POSIF RPFLG: RCNT (Bit 10) */ -#define POSIF_RPFLG_RCNT_Msk (0x400UL) /*!< POSIF RPFLG: RCNT (Bitfield-Mask: 0x01) */ -#define POSIF_RPFLG_RDIR_Pos (11UL) /*!< POSIF RPFLG: RDIR (Bit 11) */ -#define POSIF_RPFLG_RDIR_Msk (0x800UL) /*!< POSIF RPFLG: RDIR (Bitfield-Mask: 0x01) */ -#define POSIF_RPFLG_RPCLK_Pos (12UL) /*!< POSIF RPFLG: RPCLK (Bit 12) */ -#define POSIF_RPFLG_RPCLK_Msk (0x1000UL) /*!< POSIF RPFLG: RPCLK (Bitfield-Mask: 0x01) */ - -/* --------------------------------- POSIF_PDBG --------------------------------- */ -#define POSIF_PDBG_QCSV_Pos (0UL) /*!< POSIF PDBG: QCSV (Bit 0) */ -#define POSIF_PDBG_QCSV_Msk (0x3UL) /*!< POSIF PDBG: QCSV (Bitfield-Mask: 0x03) */ -#define POSIF_PDBG_QPSV_Pos (2UL) /*!< POSIF PDBG: QPSV (Bit 2) */ -#define POSIF_PDBG_QPSV_Msk (0xcUL) /*!< POSIF PDBG: QPSV (Bitfield-Mask: 0x03) */ -#define POSIF_PDBG_IVAL_Pos (4UL) /*!< POSIF PDBG: IVAL (Bit 4) */ -#define POSIF_PDBG_IVAL_Msk (0x10UL) /*!< POSIF PDBG: IVAL (Bitfield-Mask: 0x01) */ -#define POSIF_PDBG_HSP_Pos (5UL) /*!< POSIF PDBG: HSP (Bit 5) */ -#define POSIF_PDBG_HSP_Msk (0xe0UL) /*!< POSIF PDBG: HSP (Bitfield-Mask: 0x07) */ -#define POSIF_PDBG_LPP0_Pos (8UL) /*!< POSIF PDBG: LPP0 (Bit 8) */ -#define POSIF_PDBG_LPP0_Msk (0x3f00UL) /*!< POSIF PDBG: LPP0 (Bitfield-Mask: 0x3f) */ -#define POSIF_PDBG_LPP1_Pos (16UL) /*!< POSIF PDBG: LPP1 (Bit 16) */ -#define POSIF_PDBG_LPP1_Msk (0x3f0000UL) /*!< POSIF PDBG: LPP1 (Bitfield-Mask: 0x3f) */ -#define POSIF_PDBG_LPP2_Pos (22UL) /*!< POSIF PDBG: LPP2 (Bit 22) */ -#define POSIF_PDBG_LPP2_Msk (0xfc00000UL) /*!< POSIF PDBG: LPP2 (Bitfield-Mask: 0x3f) */ - - -/* ================================================================================ */ -/* ================ struct 'PORT0' Position & Mask ================ */ -/* ================================================================================ */ - - -/* ---------------------------------- PORT0_OUT --------------------------------- */ -#define PORT0_OUT_P0_Pos (0UL) /*!< PORT0 OUT: P0 (Bit 0) */ -#define PORT0_OUT_P0_Msk (0x1UL) /*!< PORT0 OUT: P0 (Bitfield-Mask: 0x01) */ -#define PORT0_OUT_P1_Pos (1UL) /*!< PORT0 OUT: P1 (Bit 1) */ -#define PORT0_OUT_P1_Msk (0x2UL) /*!< PORT0 OUT: P1 (Bitfield-Mask: 0x01) */ -#define PORT0_OUT_P2_Pos (2UL) /*!< PORT0 OUT: P2 (Bit 2) */ -#define PORT0_OUT_P2_Msk (0x4UL) /*!< PORT0 OUT: P2 (Bitfield-Mask: 0x01) */ -#define PORT0_OUT_P3_Pos (3UL) /*!< PORT0 OUT: P3 (Bit 3) */ -#define PORT0_OUT_P3_Msk (0x8UL) /*!< PORT0 OUT: P3 (Bitfield-Mask: 0x01) */ -#define PORT0_OUT_P4_Pos (4UL) /*!< PORT0 OUT: P4 (Bit 4) */ -#define PORT0_OUT_P4_Msk (0x10UL) /*!< PORT0 OUT: P4 (Bitfield-Mask: 0x01) */ -#define PORT0_OUT_P5_Pos (5UL) /*!< PORT0 OUT: P5 (Bit 5) */ -#define PORT0_OUT_P5_Msk (0x20UL) /*!< PORT0 OUT: P5 (Bitfield-Mask: 0x01) */ -#define PORT0_OUT_P6_Pos (6UL) /*!< PORT0 OUT: P6 (Bit 6) */ -#define PORT0_OUT_P6_Msk (0x40UL) /*!< PORT0 OUT: P6 (Bitfield-Mask: 0x01) */ -#define PORT0_OUT_P7_Pos (7UL) /*!< PORT0 OUT: P7 (Bit 7) */ -#define PORT0_OUT_P7_Msk (0x80UL) /*!< PORT0 OUT: P7 (Bitfield-Mask: 0x01) */ -#define PORT0_OUT_P8_Pos (8UL) /*!< PORT0 OUT: P8 (Bit 8) */ -#define PORT0_OUT_P8_Msk (0x100UL) /*!< PORT0 OUT: P8 (Bitfield-Mask: 0x01) */ -#define PORT0_OUT_P9_Pos (9UL) /*!< PORT0 OUT: P9 (Bit 9) */ -#define PORT0_OUT_P9_Msk (0x200UL) /*!< PORT0 OUT: P9 (Bitfield-Mask: 0x01) */ -#define PORT0_OUT_P10_Pos (10UL) /*!< PORT0 OUT: P10 (Bit 10) */ -#define PORT0_OUT_P10_Msk (0x400UL) /*!< PORT0 OUT: P10 (Bitfield-Mask: 0x01) */ -#define PORT0_OUT_P11_Pos (11UL) /*!< PORT0 OUT: P11 (Bit 11) */ -#define PORT0_OUT_P11_Msk (0x800UL) /*!< PORT0 OUT: P11 (Bitfield-Mask: 0x01) */ -#define PORT0_OUT_P12_Pos (12UL) /*!< PORT0 OUT: P12 (Bit 12) */ -#define PORT0_OUT_P12_Msk (0x1000UL) /*!< PORT0 OUT: P12 (Bitfield-Mask: 0x01) */ -#define PORT0_OUT_P13_Pos (13UL) /*!< PORT0 OUT: P13 (Bit 13) */ -#define PORT0_OUT_P13_Msk (0x2000UL) /*!< PORT0 OUT: P13 (Bitfield-Mask: 0x01) */ -#define PORT0_OUT_P14_Pos (14UL) /*!< PORT0 OUT: P14 (Bit 14) */ -#define PORT0_OUT_P14_Msk (0x4000UL) /*!< PORT0 OUT: P14 (Bitfield-Mask: 0x01) */ -#define PORT0_OUT_P15_Pos (15UL) /*!< PORT0 OUT: P15 (Bit 15) */ -#define PORT0_OUT_P15_Msk (0x8000UL) /*!< PORT0 OUT: P15 (Bitfield-Mask: 0x01) */ - -/* ---------------------------------- PORT0_OMR --------------------------------- */ -#define PORT0_OMR_PS0_Pos (0UL) /*!< PORT0 OMR: PS0 (Bit 0) */ -#define PORT0_OMR_PS0_Msk (0x1UL) /*!< PORT0 OMR: PS0 (Bitfield-Mask: 0x01) */ -#define PORT0_OMR_PS1_Pos (1UL) /*!< PORT0 OMR: PS1 (Bit 1) */ -#define PORT0_OMR_PS1_Msk (0x2UL) /*!< PORT0 OMR: PS1 (Bitfield-Mask: 0x01) */ -#define PORT0_OMR_PS2_Pos (2UL) /*!< PORT0 OMR: PS2 (Bit 2) */ -#define PORT0_OMR_PS2_Msk (0x4UL) /*!< PORT0 OMR: PS2 (Bitfield-Mask: 0x01) */ -#define PORT0_OMR_PS3_Pos (3UL) /*!< PORT0 OMR: PS3 (Bit 3) */ -#define PORT0_OMR_PS3_Msk (0x8UL) /*!< PORT0 OMR: PS3 (Bitfield-Mask: 0x01) */ -#define PORT0_OMR_PS4_Pos (4UL) /*!< PORT0 OMR: PS4 (Bit 4) */ -#define PORT0_OMR_PS4_Msk (0x10UL) /*!< PORT0 OMR: PS4 (Bitfield-Mask: 0x01) */ -#define PORT0_OMR_PS5_Pos (5UL) /*!< PORT0 OMR: PS5 (Bit 5) */ -#define PORT0_OMR_PS5_Msk (0x20UL) /*!< PORT0 OMR: PS5 (Bitfield-Mask: 0x01) */ -#define PORT0_OMR_PS6_Pos (6UL) /*!< PORT0 OMR: PS6 (Bit 6) */ -#define PORT0_OMR_PS6_Msk (0x40UL) /*!< PORT0 OMR: PS6 (Bitfield-Mask: 0x01) */ -#define PORT0_OMR_PS7_Pos (7UL) /*!< PORT0 OMR: PS7 (Bit 7) */ -#define PORT0_OMR_PS7_Msk (0x80UL) /*!< PORT0 OMR: PS7 (Bitfield-Mask: 0x01) */ -#define PORT0_OMR_PS8_Pos (8UL) /*!< PORT0 OMR: PS8 (Bit 8) */ -#define PORT0_OMR_PS8_Msk (0x100UL) /*!< PORT0 OMR: PS8 (Bitfield-Mask: 0x01) */ -#define PORT0_OMR_PS9_Pos (9UL) /*!< PORT0 OMR: PS9 (Bit 9) */ -#define PORT0_OMR_PS9_Msk (0x200UL) /*!< PORT0 OMR: PS9 (Bitfield-Mask: 0x01) */ -#define PORT0_OMR_PS10_Pos (10UL) /*!< PORT0 OMR: PS10 (Bit 10) */ -#define PORT0_OMR_PS10_Msk (0x400UL) /*!< PORT0 OMR: PS10 (Bitfield-Mask: 0x01) */ -#define PORT0_OMR_PS11_Pos (11UL) /*!< PORT0 OMR: PS11 (Bit 11) */ -#define PORT0_OMR_PS11_Msk (0x800UL) /*!< PORT0 OMR: PS11 (Bitfield-Mask: 0x01) */ -#define PORT0_OMR_PS12_Pos (12UL) /*!< PORT0 OMR: PS12 (Bit 12) */ -#define PORT0_OMR_PS12_Msk (0x1000UL) /*!< PORT0 OMR: PS12 (Bitfield-Mask: 0x01) */ -#define PORT0_OMR_PS13_Pos (13UL) /*!< PORT0 OMR: PS13 (Bit 13) */ -#define PORT0_OMR_PS13_Msk (0x2000UL) /*!< PORT0 OMR: PS13 (Bitfield-Mask: 0x01) */ -#define PORT0_OMR_PS14_Pos (14UL) /*!< PORT0 OMR: PS14 (Bit 14) */ -#define PORT0_OMR_PS14_Msk (0x4000UL) /*!< PORT0 OMR: PS14 (Bitfield-Mask: 0x01) */ -#define PORT0_OMR_PS15_Pos (15UL) /*!< PORT0 OMR: PS15 (Bit 15) */ -#define PORT0_OMR_PS15_Msk (0x8000UL) /*!< PORT0 OMR: PS15 (Bitfield-Mask: 0x01) */ -#define PORT0_OMR_PR0_Pos (16UL) /*!< PORT0 OMR: PR0 (Bit 16) */ -#define PORT0_OMR_PR0_Msk (0x10000UL) /*!< PORT0 OMR: PR0 (Bitfield-Mask: 0x01) */ -#define PORT0_OMR_PR1_Pos (17UL) /*!< PORT0 OMR: PR1 (Bit 17) */ -#define PORT0_OMR_PR1_Msk (0x20000UL) /*!< PORT0 OMR: PR1 (Bitfield-Mask: 0x01) */ -#define PORT0_OMR_PR2_Pos (18UL) /*!< PORT0 OMR: PR2 (Bit 18) */ -#define PORT0_OMR_PR2_Msk (0x40000UL) /*!< PORT0 OMR: PR2 (Bitfield-Mask: 0x01) */ -#define PORT0_OMR_PR3_Pos (19UL) /*!< PORT0 OMR: PR3 (Bit 19) */ -#define PORT0_OMR_PR3_Msk (0x80000UL) /*!< PORT0 OMR: PR3 (Bitfield-Mask: 0x01) */ -#define PORT0_OMR_PR4_Pos (20UL) /*!< PORT0 OMR: PR4 (Bit 20) */ -#define PORT0_OMR_PR4_Msk (0x100000UL) /*!< PORT0 OMR: PR4 (Bitfield-Mask: 0x01) */ -#define PORT0_OMR_PR5_Pos (21UL) /*!< PORT0 OMR: PR5 (Bit 21) */ -#define PORT0_OMR_PR5_Msk (0x200000UL) /*!< PORT0 OMR: PR5 (Bitfield-Mask: 0x01) */ -#define PORT0_OMR_PR6_Pos (22UL) /*!< PORT0 OMR: PR6 (Bit 22) */ -#define PORT0_OMR_PR6_Msk (0x400000UL) /*!< PORT0 OMR: PR6 (Bitfield-Mask: 0x01) */ -#define PORT0_OMR_PR7_Pos (23UL) /*!< PORT0 OMR: PR7 (Bit 23) */ -#define PORT0_OMR_PR7_Msk (0x800000UL) /*!< PORT0 OMR: PR7 (Bitfield-Mask: 0x01) */ -#define PORT0_OMR_PR8_Pos (24UL) /*!< PORT0 OMR: PR8 (Bit 24) */ -#define PORT0_OMR_PR8_Msk (0x1000000UL) /*!< PORT0 OMR: PR8 (Bitfield-Mask: 0x01) */ -#define PORT0_OMR_PR9_Pos (25UL) /*!< PORT0 OMR: PR9 (Bit 25) */ -#define PORT0_OMR_PR9_Msk (0x2000000UL) /*!< PORT0 OMR: PR9 (Bitfield-Mask: 0x01) */ -#define PORT0_OMR_PR10_Pos (26UL) /*!< PORT0 OMR: PR10 (Bit 26) */ -#define PORT0_OMR_PR10_Msk (0x4000000UL) /*!< PORT0 OMR: PR10 (Bitfield-Mask: 0x01) */ -#define PORT0_OMR_PR11_Pos (27UL) /*!< PORT0 OMR: PR11 (Bit 27) */ -#define PORT0_OMR_PR11_Msk (0x8000000UL) /*!< PORT0 OMR: PR11 (Bitfield-Mask: 0x01) */ -#define PORT0_OMR_PR12_Pos (28UL) /*!< PORT0 OMR: PR12 (Bit 28) */ -#define PORT0_OMR_PR12_Msk (0x10000000UL) /*!< PORT0 OMR: PR12 (Bitfield-Mask: 0x01) */ -#define PORT0_OMR_PR13_Pos (29UL) /*!< PORT0 OMR: PR13 (Bit 29) */ -#define PORT0_OMR_PR13_Msk (0x20000000UL) /*!< PORT0 OMR: PR13 (Bitfield-Mask: 0x01) */ -#define PORT0_OMR_PR14_Pos (30UL) /*!< PORT0 OMR: PR14 (Bit 30) */ -#define PORT0_OMR_PR14_Msk (0x40000000UL) /*!< PORT0 OMR: PR14 (Bitfield-Mask: 0x01) */ -#define PORT0_OMR_PR15_Pos (31UL) /*!< PORT0 OMR: PR15 (Bit 31) */ -#define PORT0_OMR_PR15_Msk (0x80000000UL) /*!< PORT0 OMR: PR15 (Bitfield-Mask: 0x01) */ - -/* --------------------------------- PORT0_IOCR0 -------------------------------- */ -#define PORT0_IOCR0_PC0_Pos (3UL) /*!< PORT0 IOCR0: PC0 (Bit 3) */ -#define PORT0_IOCR0_PC0_Msk (0xf8UL) /*!< PORT0 IOCR0: PC0 (Bitfield-Mask: 0x1f) */ -#define PORT0_IOCR0_PC1_Pos (11UL) /*!< PORT0 IOCR0: PC1 (Bit 11) */ -#define PORT0_IOCR0_PC1_Msk (0xf800UL) /*!< PORT0 IOCR0: PC1 (Bitfield-Mask: 0x1f) */ -#define PORT0_IOCR0_PC2_Pos (19UL) /*!< PORT0 IOCR0: PC2 (Bit 19) */ -#define PORT0_IOCR0_PC2_Msk (0xf80000UL) /*!< PORT0 IOCR0: PC2 (Bitfield-Mask: 0x1f) */ -#define PORT0_IOCR0_PC3_Pos (27UL) /*!< PORT0 IOCR0: PC3 (Bit 27) */ -#define PORT0_IOCR0_PC3_Msk (0xf8000000UL) /*!< PORT0 IOCR0: PC3 (Bitfield-Mask: 0x1f) */ - -/* --------------------------------- PORT0_IOCR4 -------------------------------- */ -#define PORT0_IOCR4_PC4_Pos (3UL) /*!< PORT0 IOCR4: PC4 (Bit 3) */ -#define PORT0_IOCR4_PC4_Msk (0xf8UL) /*!< PORT0 IOCR4: PC4 (Bitfield-Mask: 0x1f) */ -#define PORT0_IOCR4_PC5_Pos (11UL) /*!< PORT0 IOCR4: PC5 (Bit 11) */ -#define PORT0_IOCR4_PC5_Msk (0xf800UL) /*!< PORT0 IOCR4: PC5 (Bitfield-Mask: 0x1f) */ -#define PORT0_IOCR4_PC6_Pos (19UL) /*!< PORT0 IOCR4: PC6 (Bit 19) */ -#define PORT0_IOCR4_PC6_Msk (0xf80000UL) /*!< PORT0 IOCR4: PC6 (Bitfield-Mask: 0x1f) */ -#define PORT0_IOCR4_PC7_Pos (27UL) /*!< PORT0 IOCR4: PC7 (Bit 27) */ -#define PORT0_IOCR4_PC7_Msk (0xf8000000UL) /*!< PORT0 IOCR4: PC7 (Bitfield-Mask: 0x1f) */ - -/* --------------------------------- PORT0_IOCR8 -------------------------------- */ -#define PORT0_IOCR8_PC8_Pos (3UL) /*!< PORT0 IOCR8: PC8 (Bit 3) */ -#define PORT0_IOCR8_PC8_Msk (0xf8UL) /*!< PORT0 IOCR8: PC8 (Bitfield-Mask: 0x1f) */ -#define PORT0_IOCR8_PC9_Pos (11UL) /*!< PORT0 IOCR8: PC9 (Bit 11) */ -#define PORT0_IOCR8_PC9_Msk (0xf800UL) /*!< PORT0 IOCR8: PC9 (Bitfield-Mask: 0x1f) */ -#define PORT0_IOCR8_PC10_Pos (19UL) /*!< PORT0 IOCR8: PC10 (Bit 19) */ -#define PORT0_IOCR8_PC10_Msk (0xf80000UL) /*!< PORT0 IOCR8: PC10 (Bitfield-Mask: 0x1f) */ -#define PORT0_IOCR8_PC11_Pos (27UL) /*!< PORT0 IOCR8: PC11 (Bit 27) */ -#define PORT0_IOCR8_PC11_Msk (0xf8000000UL) /*!< PORT0 IOCR8: PC11 (Bitfield-Mask: 0x1f) */ - -/* -------------------------------- PORT0_IOCR12 -------------------------------- */ -#define PORT0_IOCR12_PC12_Pos (3UL) /*!< PORT0 IOCR12: PC12 (Bit 3) */ -#define PORT0_IOCR12_PC12_Msk (0xf8UL) /*!< PORT0 IOCR12: PC12 (Bitfield-Mask: 0x1f) */ -#define PORT0_IOCR12_PC13_Pos (11UL) /*!< PORT0 IOCR12: PC13 (Bit 11) */ -#define PORT0_IOCR12_PC13_Msk (0xf800UL) /*!< PORT0 IOCR12: PC13 (Bitfield-Mask: 0x1f) */ -#define PORT0_IOCR12_PC14_Pos (19UL) /*!< PORT0 IOCR12: PC14 (Bit 19) */ -#define PORT0_IOCR12_PC14_Msk (0xf80000UL) /*!< PORT0 IOCR12: PC14 (Bitfield-Mask: 0x1f) */ -#define PORT0_IOCR12_PC15_Pos (27UL) /*!< PORT0 IOCR12: PC15 (Bit 27) */ -#define PORT0_IOCR12_PC15_Msk (0xf8000000UL) /*!< PORT0 IOCR12: PC15 (Bitfield-Mask: 0x1f) */ - -/* ---------------------------------- PORT0_IN ---------------------------------- */ -#define PORT0_IN_P0_Pos (0UL) /*!< PORT0 IN: P0 (Bit 0) */ -#define PORT0_IN_P0_Msk (0x1UL) /*!< PORT0 IN: P0 (Bitfield-Mask: 0x01) */ -#define PORT0_IN_P1_Pos (1UL) /*!< PORT0 IN: P1 (Bit 1) */ -#define PORT0_IN_P1_Msk (0x2UL) /*!< PORT0 IN: P1 (Bitfield-Mask: 0x01) */ -#define PORT0_IN_P2_Pos (2UL) /*!< PORT0 IN: P2 (Bit 2) */ -#define PORT0_IN_P2_Msk (0x4UL) /*!< PORT0 IN: P2 (Bitfield-Mask: 0x01) */ -#define PORT0_IN_P3_Pos (3UL) /*!< PORT0 IN: P3 (Bit 3) */ -#define PORT0_IN_P3_Msk (0x8UL) /*!< PORT0 IN: P3 (Bitfield-Mask: 0x01) */ -#define PORT0_IN_P4_Pos (4UL) /*!< PORT0 IN: P4 (Bit 4) */ -#define PORT0_IN_P4_Msk (0x10UL) /*!< PORT0 IN: P4 (Bitfield-Mask: 0x01) */ -#define PORT0_IN_P5_Pos (5UL) /*!< PORT0 IN: P5 (Bit 5) */ -#define PORT0_IN_P5_Msk (0x20UL) /*!< PORT0 IN: P5 (Bitfield-Mask: 0x01) */ -#define PORT0_IN_P6_Pos (6UL) /*!< PORT0 IN: P6 (Bit 6) */ -#define PORT0_IN_P6_Msk (0x40UL) /*!< PORT0 IN: P6 (Bitfield-Mask: 0x01) */ -#define PORT0_IN_P7_Pos (7UL) /*!< PORT0 IN: P7 (Bit 7) */ -#define PORT0_IN_P7_Msk (0x80UL) /*!< PORT0 IN: P7 (Bitfield-Mask: 0x01) */ -#define PORT0_IN_P8_Pos (8UL) /*!< PORT0 IN: P8 (Bit 8) */ -#define PORT0_IN_P8_Msk (0x100UL) /*!< PORT0 IN: P8 (Bitfield-Mask: 0x01) */ -#define PORT0_IN_P9_Pos (9UL) /*!< PORT0 IN: P9 (Bit 9) */ -#define PORT0_IN_P9_Msk (0x200UL) /*!< PORT0 IN: P9 (Bitfield-Mask: 0x01) */ -#define PORT0_IN_P10_Pos (10UL) /*!< PORT0 IN: P10 (Bit 10) */ -#define PORT0_IN_P10_Msk (0x400UL) /*!< PORT0 IN: P10 (Bitfield-Mask: 0x01) */ -#define PORT0_IN_P11_Pos (11UL) /*!< PORT0 IN: P11 (Bit 11) */ -#define PORT0_IN_P11_Msk (0x800UL) /*!< PORT0 IN: P11 (Bitfield-Mask: 0x01) */ -#define PORT0_IN_P12_Pos (12UL) /*!< PORT0 IN: P12 (Bit 12) */ -#define PORT0_IN_P12_Msk (0x1000UL) /*!< PORT0 IN: P12 (Bitfield-Mask: 0x01) */ -#define PORT0_IN_P13_Pos (13UL) /*!< PORT0 IN: P13 (Bit 13) */ -#define PORT0_IN_P13_Msk (0x2000UL) /*!< PORT0 IN: P13 (Bitfield-Mask: 0x01) */ -#define PORT0_IN_P14_Pos (14UL) /*!< PORT0 IN: P14 (Bit 14) */ -#define PORT0_IN_P14_Msk (0x4000UL) /*!< PORT0 IN: P14 (Bitfield-Mask: 0x01) */ -#define PORT0_IN_P15_Pos (15UL) /*!< PORT0 IN: P15 (Bit 15) */ -#define PORT0_IN_P15_Msk (0x8000UL) /*!< PORT0 IN: P15 (Bitfield-Mask: 0x01) */ - -/* --------------------------------- PORT0_PDR0 --------------------------------- */ -#define PORT0_PDR0_PD0_Pos (0UL) /*!< PORT0 PDR0: PD0 (Bit 0) */ -#define PORT0_PDR0_PD0_Msk (0x7UL) /*!< PORT0 PDR0: PD0 (Bitfield-Mask: 0x07) */ -#define PORT0_PDR0_PD1_Pos (4UL) /*!< PORT0 PDR0: PD1 (Bit 4) */ -#define PORT0_PDR0_PD1_Msk (0x70UL) /*!< PORT0 PDR0: PD1 (Bitfield-Mask: 0x07) */ -#define PORT0_PDR0_PD2_Pos (8UL) /*!< PORT0 PDR0: PD2 (Bit 8) */ -#define PORT0_PDR0_PD2_Msk (0x700UL) /*!< PORT0 PDR0: PD2 (Bitfield-Mask: 0x07) */ -#define PORT0_PDR0_PD3_Pos (12UL) /*!< PORT0 PDR0: PD3 (Bit 12) */ -#define PORT0_PDR0_PD3_Msk (0x7000UL) /*!< PORT0 PDR0: PD3 (Bitfield-Mask: 0x07) */ -#define PORT0_PDR0_PD4_Pos (16UL) /*!< PORT0 PDR0: PD4 (Bit 16) */ -#define PORT0_PDR0_PD4_Msk (0x70000UL) /*!< PORT0 PDR0: PD4 (Bitfield-Mask: 0x07) */ -#define PORT0_PDR0_PD5_Pos (20UL) /*!< PORT0 PDR0: PD5 (Bit 20) */ -#define PORT0_PDR0_PD5_Msk (0x700000UL) /*!< PORT0 PDR0: PD5 (Bitfield-Mask: 0x07) */ -#define PORT0_PDR0_PD6_Pos (24UL) /*!< PORT0 PDR0: PD6 (Bit 24) */ -#define PORT0_PDR0_PD6_Msk (0x7000000UL) /*!< PORT0 PDR0: PD6 (Bitfield-Mask: 0x07) */ -#define PORT0_PDR0_PD7_Pos (28UL) /*!< PORT0 PDR0: PD7 (Bit 28) */ -#define PORT0_PDR0_PD7_Msk (0x70000000UL) /*!< PORT0 PDR0: PD7 (Bitfield-Mask: 0x07) */ - -/* --------------------------------- PORT0_PDR1 --------------------------------- */ -#define PORT0_PDR1_PD8_Pos (0UL) /*!< PORT0 PDR1: PD8 (Bit 0) */ -#define PORT0_PDR1_PD8_Msk (0x7UL) /*!< PORT0 PDR1: PD8 (Bitfield-Mask: 0x07) */ -#define PORT0_PDR1_PD9_Pos (4UL) /*!< PORT0 PDR1: PD9 (Bit 4) */ -#define PORT0_PDR1_PD9_Msk (0x70UL) /*!< PORT0 PDR1: PD9 (Bitfield-Mask: 0x07) */ -#define PORT0_PDR1_PD10_Pos (8UL) /*!< PORT0 PDR1: PD10 (Bit 8) */ -#define PORT0_PDR1_PD10_Msk (0x700UL) /*!< PORT0 PDR1: PD10 (Bitfield-Mask: 0x07) */ -#define PORT0_PDR1_PD11_Pos (12UL) /*!< PORT0 PDR1: PD11 (Bit 12) */ -#define PORT0_PDR1_PD11_Msk (0x7000UL) /*!< PORT0 PDR1: PD11 (Bitfield-Mask: 0x07) */ -#define PORT0_PDR1_PD12_Pos (16UL) /*!< PORT0 PDR1: PD12 (Bit 16) */ -#define PORT0_PDR1_PD12_Msk (0x70000UL) /*!< PORT0 PDR1: PD12 (Bitfield-Mask: 0x07) */ -#define PORT0_PDR1_PD13_Pos (20UL) /*!< PORT0 PDR1: PD13 (Bit 20) */ -#define PORT0_PDR1_PD13_Msk (0x700000UL) /*!< PORT0 PDR1: PD13 (Bitfield-Mask: 0x07) */ -#define PORT0_PDR1_PD14_Pos (24UL) /*!< PORT0 PDR1: PD14 (Bit 24) */ -#define PORT0_PDR1_PD14_Msk (0x7000000UL) /*!< PORT0 PDR1: PD14 (Bitfield-Mask: 0x07) */ -#define PORT0_PDR1_PD15_Pos (28UL) /*!< PORT0 PDR1: PD15 (Bit 28) */ -#define PORT0_PDR1_PD15_Msk (0x70000000UL) /*!< PORT0 PDR1: PD15 (Bitfield-Mask: 0x07) */ - -/* --------------------------------- PORT0_PDISC -------------------------------- */ -#define PORT0_PDISC_PDIS0_Pos (0UL) /*!< PORT0 PDISC: PDIS0 (Bit 0) */ -#define PORT0_PDISC_PDIS0_Msk (0x1UL) /*!< PORT0 PDISC: PDIS0 (Bitfield-Mask: 0x01) */ -#define PORT0_PDISC_PDIS1_Pos (1UL) /*!< PORT0 PDISC: PDIS1 (Bit 1) */ -#define PORT0_PDISC_PDIS1_Msk (0x2UL) /*!< PORT0 PDISC: PDIS1 (Bitfield-Mask: 0x01) */ -#define PORT0_PDISC_PDIS2_Pos (2UL) /*!< PORT0 PDISC: PDIS2 (Bit 2) */ -#define PORT0_PDISC_PDIS2_Msk (0x4UL) /*!< PORT0 PDISC: PDIS2 (Bitfield-Mask: 0x01) */ -#define PORT0_PDISC_PDIS3_Pos (3UL) /*!< PORT0 PDISC: PDIS3 (Bit 3) */ -#define PORT0_PDISC_PDIS3_Msk (0x8UL) /*!< PORT0 PDISC: PDIS3 (Bitfield-Mask: 0x01) */ -#define PORT0_PDISC_PDIS4_Pos (4UL) /*!< PORT0 PDISC: PDIS4 (Bit 4) */ -#define PORT0_PDISC_PDIS4_Msk (0x10UL) /*!< PORT0 PDISC: PDIS4 (Bitfield-Mask: 0x01) */ -#define PORT0_PDISC_PDIS5_Pos (5UL) /*!< PORT0 PDISC: PDIS5 (Bit 5) */ -#define PORT0_PDISC_PDIS5_Msk (0x20UL) /*!< PORT0 PDISC: PDIS5 (Bitfield-Mask: 0x01) */ -#define PORT0_PDISC_PDIS6_Pos (6UL) /*!< PORT0 PDISC: PDIS6 (Bit 6) */ -#define PORT0_PDISC_PDIS6_Msk (0x40UL) /*!< PORT0 PDISC: PDIS6 (Bitfield-Mask: 0x01) */ -#define PORT0_PDISC_PDIS7_Pos (7UL) /*!< PORT0 PDISC: PDIS7 (Bit 7) */ -#define PORT0_PDISC_PDIS7_Msk (0x80UL) /*!< PORT0 PDISC: PDIS7 (Bitfield-Mask: 0x01) */ -#define PORT0_PDISC_PDIS8_Pos (8UL) /*!< PORT0 PDISC: PDIS8 (Bit 8) */ -#define PORT0_PDISC_PDIS8_Msk (0x100UL) /*!< PORT0 PDISC: PDIS8 (Bitfield-Mask: 0x01) */ -#define PORT0_PDISC_PDIS9_Pos (9UL) /*!< PORT0 PDISC: PDIS9 (Bit 9) */ -#define PORT0_PDISC_PDIS9_Msk (0x200UL) /*!< PORT0 PDISC: PDIS9 (Bitfield-Mask: 0x01) */ -#define PORT0_PDISC_PDIS10_Pos (10UL) /*!< PORT0 PDISC: PDIS10 (Bit 10) */ -#define PORT0_PDISC_PDIS10_Msk (0x400UL) /*!< PORT0 PDISC: PDIS10 (Bitfield-Mask: 0x01) */ -#define PORT0_PDISC_PDIS11_Pos (11UL) /*!< PORT0 PDISC: PDIS11 (Bit 11) */ -#define PORT0_PDISC_PDIS11_Msk (0x800UL) /*!< PORT0 PDISC: PDIS11 (Bitfield-Mask: 0x01) */ -#define PORT0_PDISC_PDIS12_Pos (12UL) /*!< PORT0 PDISC: PDIS12 (Bit 12) */ -#define PORT0_PDISC_PDIS12_Msk (0x1000UL) /*!< PORT0 PDISC: PDIS12 (Bitfield-Mask: 0x01) */ -#define PORT0_PDISC_PDIS13_Pos (13UL) /*!< PORT0 PDISC: PDIS13 (Bit 13) */ -#define PORT0_PDISC_PDIS13_Msk (0x2000UL) /*!< PORT0 PDISC: PDIS13 (Bitfield-Mask: 0x01) */ -#define PORT0_PDISC_PDIS14_Pos (14UL) /*!< PORT0 PDISC: PDIS14 (Bit 14) */ -#define PORT0_PDISC_PDIS14_Msk (0x4000UL) /*!< PORT0 PDISC: PDIS14 (Bitfield-Mask: 0x01) */ -#define PORT0_PDISC_PDIS15_Pos (15UL) /*!< PORT0 PDISC: PDIS15 (Bit 15) */ -#define PORT0_PDISC_PDIS15_Msk (0x8000UL) /*!< PORT0 PDISC: PDIS15 (Bitfield-Mask: 0x01) */ - -/* ---------------------------------- PORT0_PPS --------------------------------- */ -#define PORT0_PPS_PPS0_Pos (0UL) /*!< PORT0 PPS: PPS0 (Bit 0) */ -#define PORT0_PPS_PPS0_Msk (0x1UL) /*!< PORT0 PPS: PPS0 (Bitfield-Mask: 0x01) */ -#define PORT0_PPS_PPS1_Pos (1UL) /*!< PORT0 PPS: PPS1 (Bit 1) */ -#define PORT0_PPS_PPS1_Msk (0x2UL) /*!< PORT0 PPS: PPS1 (Bitfield-Mask: 0x01) */ -#define PORT0_PPS_PPS2_Pos (2UL) /*!< PORT0 PPS: PPS2 (Bit 2) */ -#define PORT0_PPS_PPS2_Msk (0x4UL) /*!< PORT0 PPS: PPS2 (Bitfield-Mask: 0x01) */ -#define PORT0_PPS_PPS3_Pos (3UL) /*!< PORT0 PPS: PPS3 (Bit 3) */ -#define PORT0_PPS_PPS3_Msk (0x8UL) /*!< PORT0 PPS: PPS3 (Bitfield-Mask: 0x01) */ -#define PORT0_PPS_PPS4_Pos (4UL) /*!< PORT0 PPS: PPS4 (Bit 4) */ -#define PORT0_PPS_PPS4_Msk (0x10UL) /*!< PORT0 PPS: PPS4 (Bitfield-Mask: 0x01) */ -#define PORT0_PPS_PPS5_Pos (5UL) /*!< PORT0 PPS: PPS5 (Bit 5) */ -#define PORT0_PPS_PPS5_Msk (0x20UL) /*!< PORT0 PPS: PPS5 (Bitfield-Mask: 0x01) */ -#define PORT0_PPS_PPS6_Pos (6UL) /*!< PORT0 PPS: PPS6 (Bit 6) */ -#define PORT0_PPS_PPS6_Msk (0x40UL) /*!< PORT0 PPS: PPS6 (Bitfield-Mask: 0x01) */ -#define PORT0_PPS_PPS7_Pos (7UL) /*!< PORT0 PPS: PPS7 (Bit 7) */ -#define PORT0_PPS_PPS7_Msk (0x80UL) /*!< PORT0 PPS: PPS7 (Bitfield-Mask: 0x01) */ -#define PORT0_PPS_PPS8_Pos (8UL) /*!< PORT0 PPS: PPS8 (Bit 8) */ -#define PORT0_PPS_PPS8_Msk (0x100UL) /*!< PORT0 PPS: PPS8 (Bitfield-Mask: 0x01) */ -#define PORT0_PPS_PPS9_Pos (9UL) /*!< PORT0 PPS: PPS9 (Bit 9) */ -#define PORT0_PPS_PPS9_Msk (0x200UL) /*!< PORT0 PPS: PPS9 (Bitfield-Mask: 0x01) */ -#define PORT0_PPS_PPS10_Pos (10UL) /*!< PORT0 PPS: PPS10 (Bit 10) */ -#define PORT0_PPS_PPS10_Msk (0x400UL) /*!< PORT0 PPS: PPS10 (Bitfield-Mask: 0x01) */ -#define PORT0_PPS_PPS11_Pos (11UL) /*!< PORT0 PPS: PPS11 (Bit 11) */ -#define PORT0_PPS_PPS11_Msk (0x800UL) /*!< PORT0 PPS: PPS11 (Bitfield-Mask: 0x01) */ -#define PORT0_PPS_PPS12_Pos (12UL) /*!< PORT0 PPS: PPS12 (Bit 12) */ -#define PORT0_PPS_PPS12_Msk (0x1000UL) /*!< PORT0 PPS: PPS12 (Bitfield-Mask: 0x01) */ -#define PORT0_PPS_PPS13_Pos (13UL) /*!< PORT0 PPS: PPS13 (Bit 13) */ -#define PORT0_PPS_PPS13_Msk (0x2000UL) /*!< PORT0 PPS: PPS13 (Bitfield-Mask: 0x01) */ -#define PORT0_PPS_PPS14_Pos (14UL) /*!< PORT0 PPS: PPS14 (Bit 14) */ -#define PORT0_PPS_PPS14_Msk (0x4000UL) /*!< PORT0 PPS: PPS14 (Bitfield-Mask: 0x01) */ -#define PORT0_PPS_PPS15_Pos (15UL) /*!< PORT0 PPS: PPS15 (Bit 15) */ -#define PORT0_PPS_PPS15_Msk (0x8000UL) /*!< PORT0 PPS: PPS15 (Bitfield-Mask: 0x01) */ - -/* --------------------------------- PORT0_HWSEL -------------------------------- */ -#define PORT0_HWSEL_HW0_Pos (0UL) /*!< PORT0 HWSEL: HW0 (Bit 0) */ -#define PORT0_HWSEL_HW0_Msk (0x3UL) /*!< PORT0 HWSEL: HW0 (Bitfield-Mask: 0x03) */ -#define PORT0_HWSEL_HW1_Pos (2UL) /*!< PORT0 HWSEL: HW1 (Bit 2) */ -#define PORT0_HWSEL_HW1_Msk (0xcUL) /*!< PORT0 HWSEL: HW1 (Bitfield-Mask: 0x03) */ -#define PORT0_HWSEL_HW2_Pos (4UL) /*!< PORT0 HWSEL: HW2 (Bit 4) */ -#define PORT0_HWSEL_HW2_Msk (0x30UL) /*!< PORT0 HWSEL: HW2 (Bitfield-Mask: 0x03) */ -#define PORT0_HWSEL_HW3_Pos (6UL) /*!< PORT0 HWSEL: HW3 (Bit 6) */ -#define PORT0_HWSEL_HW3_Msk (0xc0UL) /*!< PORT0 HWSEL: HW3 (Bitfield-Mask: 0x03) */ -#define PORT0_HWSEL_HW4_Pos (8UL) /*!< PORT0 HWSEL: HW4 (Bit 8) */ -#define PORT0_HWSEL_HW4_Msk (0x300UL) /*!< PORT0 HWSEL: HW4 (Bitfield-Mask: 0x03) */ -#define PORT0_HWSEL_HW5_Pos (10UL) /*!< PORT0 HWSEL: HW5 (Bit 10) */ -#define PORT0_HWSEL_HW5_Msk (0xc00UL) /*!< PORT0 HWSEL: HW5 (Bitfield-Mask: 0x03) */ -#define PORT0_HWSEL_HW6_Pos (12UL) /*!< PORT0 HWSEL: HW6 (Bit 12) */ -#define PORT0_HWSEL_HW6_Msk (0x3000UL) /*!< PORT0 HWSEL: HW6 (Bitfield-Mask: 0x03) */ -#define PORT0_HWSEL_HW7_Pos (14UL) /*!< PORT0 HWSEL: HW7 (Bit 14) */ -#define PORT0_HWSEL_HW7_Msk (0xc000UL) /*!< PORT0 HWSEL: HW7 (Bitfield-Mask: 0x03) */ -#define PORT0_HWSEL_HW8_Pos (16UL) /*!< PORT0 HWSEL: HW8 (Bit 16) */ -#define PORT0_HWSEL_HW8_Msk (0x30000UL) /*!< PORT0 HWSEL: HW8 (Bitfield-Mask: 0x03) */ -#define PORT0_HWSEL_HW9_Pos (18UL) /*!< PORT0 HWSEL: HW9 (Bit 18) */ -#define PORT0_HWSEL_HW9_Msk (0xc0000UL) /*!< PORT0 HWSEL: HW9 (Bitfield-Mask: 0x03) */ -#define PORT0_HWSEL_HW10_Pos (20UL) /*!< PORT0 HWSEL: HW10 (Bit 20) */ -#define PORT0_HWSEL_HW10_Msk (0x300000UL) /*!< PORT0 HWSEL: HW10 (Bitfield-Mask: 0x03) */ -#define PORT0_HWSEL_HW11_Pos (22UL) /*!< PORT0 HWSEL: HW11 (Bit 22) */ -#define PORT0_HWSEL_HW11_Msk (0xc00000UL) /*!< PORT0 HWSEL: HW11 (Bitfield-Mask: 0x03) */ -#define PORT0_HWSEL_HW12_Pos (24UL) /*!< PORT0 HWSEL: HW12 (Bit 24) */ -#define PORT0_HWSEL_HW12_Msk (0x3000000UL) /*!< PORT0 HWSEL: HW12 (Bitfield-Mask: 0x03) */ -#define PORT0_HWSEL_HW13_Pos (26UL) /*!< PORT0 HWSEL: HW13 (Bit 26) */ -#define PORT0_HWSEL_HW13_Msk (0xc000000UL) /*!< PORT0 HWSEL: HW13 (Bitfield-Mask: 0x03) */ -#define PORT0_HWSEL_HW14_Pos (28UL) /*!< PORT0 HWSEL: HW14 (Bit 28) */ -#define PORT0_HWSEL_HW14_Msk (0x30000000UL) /*!< PORT0 HWSEL: HW14 (Bitfield-Mask: 0x03) */ -#define PORT0_HWSEL_HW15_Pos (30UL) /*!< PORT0 HWSEL: HW15 (Bit 30) */ -#define PORT0_HWSEL_HW15_Msk (0xc0000000UL) /*!< PORT0 HWSEL: HW15 (Bitfield-Mask: 0x03) */ - - -/* ================================================================================ */ -/* ================ struct 'PORT1' Position & Mask ================ */ -/* ================================================================================ */ - - -/* ---------------------------------- PORT1_OUT --------------------------------- */ -#define PORT1_OUT_P0_Pos (0UL) /*!< PORT1 OUT: P0 (Bit 0) */ -#define PORT1_OUT_P0_Msk (0x1UL) /*!< PORT1 OUT: P0 (Bitfield-Mask: 0x01) */ -#define PORT1_OUT_P1_Pos (1UL) /*!< PORT1 OUT: P1 (Bit 1) */ -#define PORT1_OUT_P1_Msk (0x2UL) /*!< PORT1 OUT: P1 (Bitfield-Mask: 0x01) */ -#define PORT1_OUT_P2_Pos (2UL) /*!< PORT1 OUT: P2 (Bit 2) */ -#define PORT1_OUT_P2_Msk (0x4UL) /*!< PORT1 OUT: P2 (Bitfield-Mask: 0x01) */ -#define PORT1_OUT_P3_Pos (3UL) /*!< PORT1 OUT: P3 (Bit 3) */ -#define PORT1_OUT_P3_Msk (0x8UL) /*!< PORT1 OUT: P3 (Bitfield-Mask: 0x01) */ -#define PORT1_OUT_P4_Pos (4UL) /*!< PORT1 OUT: P4 (Bit 4) */ -#define PORT1_OUT_P4_Msk (0x10UL) /*!< PORT1 OUT: P4 (Bitfield-Mask: 0x01) */ -#define PORT1_OUT_P5_Pos (5UL) /*!< PORT1 OUT: P5 (Bit 5) */ -#define PORT1_OUT_P5_Msk (0x20UL) /*!< PORT1 OUT: P5 (Bitfield-Mask: 0x01) */ -#define PORT1_OUT_P6_Pos (6UL) /*!< PORT1 OUT: P6 (Bit 6) */ -#define PORT1_OUT_P6_Msk (0x40UL) /*!< PORT1 OUT: P6 (Bitfield-Mask: 0x01) */ -#define PORT1_OUT_P7_Pos (7UL) /*!< PORT1 OUT: P7 (Bit 7) */ -#define PORT1_OUT_P7_Msk (0x80UL) /*!< PORT1 OUT: P7 (Bitfield-Mask: 0x01) */ -#define PORT1_OUT_P8_Pos (8UL) /*!< PORT1 OUT: P8 (Bit 8) */ -#define PORT1_OUT_P8_Msk (0x100UL) /*!< PORT1 OUT: P8 (Bitfield-Mask: 0x01) */ -#define PORT1_OUT_P9_Pos (9UL) /*!< PORT1 OUT: P9 (Bit 9) */ -#define PORT1_OUT_P9_Msk (0x200UL) /*!< PORT1 OUT: P9 (Bitfield-Mask: 0x01) */ -#define PORT1_OUT_P10_Pos (10UL) /*!< PORT1 OUT: P10 (Bit 10) */ -#define PORT1_OUT_P10_Msk (0x400UL) /*!< PORT1 OUT: P10 (Bitfield-Mask: 0x01) */ -#define PORT1_OUT_P11_Pos (11UL) /*!< PORT1 OUT: P11 (Bit 11) */ -#define PORT1_OUT_P11_Msk (0x800UL) /*!< PORT1 OUT: P11 (Bitfield-Mask: 0x01) */ -#define PORT1_OUT_P12_Pos (12UL) /*!< PORT1 OUT: P12 (Bit 12) */ -#define PORT1_OUT_P12_Msk (0x1000UL) /*!< PORT1 OUT: P12 (Bitfield-Mask: 0x01) */ -#define PORT1_OUT_P13_Pos (13UL) /*!< PORT1 OUT: P13 (Bit 13) */ -#define PORT1_OUT_P13_Msk (0x2000UL) /*!< PORT1 OUT: P13 (Bitfield-Mask: 0x01) */ -#define PORT1_OUT_P14_Pos (14UL) /*!< PORT1 OUT: P14 (Bit 14) */ -#define PORT1_OUT_P14_Msk (0x4000UL) /*!< PORT1 OUT: P14 (Bitfield-Mask: 0x01) */ -#define PORT1_OUT_P15_Pos (15UL) /*!< PORT1 OUT: P15 (Bit 15) */ -#define PORT1_OUT_P15_Msk (0x8000UL) /*!< PORT1 OUT: P15 (Bitfield-Mask: 0x01) */ - -/* ---------------------------------- PORT1_OMR --------------------------------- */ -#define PORT1_OMR_PS0_Pos (0UL) /*!< PORT1 OMR: PS0 (Bit 0) */ -#define PORT1_OMR_PS0_Msk (0x1UL) /*!< PORT1 OMR: PS0 (Bitfield-Mask: 0x01) */ -#define PORT1_OMR_PS1_Pos (1UL) /*!< PORT1 OMR: PS1 (Bit 1) */ -#define PORT1_OMR_PS1_Msk (0x2UL) /*!< PORT1 OMR: PS1 (Bitfield-Mask: 0x01) */ -#define PORT1_OMR_PS2_Pos (2UL) /*!< PORT1 OMR: PS2 (Bit 2) */ -#define PORT1_OMR_PS2_Msk (0x4UL) /*!< PORT1 OMR: PS2 (Bitfield-Mask: 0x01) */ -#define PORT1_OMR_PS3_Pos (3UL) /*!< PORT1 OMR: PS3 (Bit 3) */ -#define PORT1_OMR_PS3_Msk (0x8UL) /*!< PORT1 OMR: PS3 (Bitfield-Mask: 0x01) */ -#define PORT1_OMR_PS4_Pos (4UL) /*!< PORT1 OMR: PS4 (Bit 4) */ -#define PORT1_OMR_PS4_Msk (0x10UL) /*!< PORT1 OMR: PS4 (Bitfield-Mask: 0x01) */ -#define PORT1_OMR_PS5_Pos (5UL) /*!< PORT1 OMR: PS5 (Bit 5) */ -#define PORT1_OMR_PS5_Msk (0x20UL) /*!< PORT1 OMR: PS5 (Bitfield-Mask: 0x01) */ -#define PORT1_OMR_PS6_Pos (6UL) /*!< PORT1 OMR: PS6 (Bit 6) */ -#define PORT1_OMR_PS6_Msk (0x40UL) /*!< PORT1 OMR: PS6 (Bitfield-Mask: 0x01) */ -#define PORT1_OMR_PS7_Pos (7UL) /*!< PORT1 OMR: PS7 (Bit 7) */ -#define PORT1_OMR_PS7_Msk (0x80UL) /*!< PORT1 OMR: PS7 (Bitfield-Mask: 0x01) */ -#define PORT1_OMR_PS8_Pos (8UL) /*!< PORT1 OMR: PS8 (Bit 8) */ -#define PORT1_OMR_PS8_Msk (0x100UL) /*!< PORT1 OMR: PS8 (Bitfield-Mask: 0x01) */ -#define PORT1_OMR_PS9_Pos (9UL) /*!< PORT1 OMR: PS9 (Bit 9) */ -#define PORT1_OMR_PS9_Msk (0x200UL) /*!< PORT1 OMR: PS9 (Bitfield-Mask: 0x01) */ -#define PORT1_OMR_PS10_Pos (10UL) /*!< PORT1 OMR: PS10 (Bit 10) */ -#define PORT1_OMR_PS10_Msk (0x400UL) /*!< PORT1 OMR: PS10 (Bitfield-Mask: 0x01) */ -#define PORT1_OMR_PS11_Pos (11UL) /*!< PORT1 OMR: PS11 (Bit 11) */ -#define PORT1_OMR_PS11_Msk (0x800UL) /*!< PORT1 OMR: PS11 (Bitfield-Mask: 0x01) */ -#define PORT1_OMR_PS12_Pos (12UL) /*!< PORT1 OMR: PS12 (Bit 12) */ -#define PORT1_OMR_PS12_Msk (0x1000UL) /*!< PORT1 OMR: PS12 (Bitfield-Mask: 0x01) */ -#define PORT1_OMR_PS13_Pos (13UL) /*!< PORT1 OMR: PS13 (Bit 13) */ -#define PORT1_OMR_PS13_Msk (0x2000UL) /*!< PORT1 OMR: PS13 (Bitfield-Mask: 0x01) */ -#define PORT1_OMR_PS14_Pos (14UL) /*!< PORT1 OMR: PS14 (Bit 14) */ -#define PORT1_OMR_PS14_Msk (0x4000UL) /*!< PORT1 OMR: PS14 (Bitfield-Mask: 0x01) */ -#define PORT1_OMR_PS15_Pos (15UL) /*!< PORT1 OMR: PS15 (Bit 15) */ -#define PORT1_OMR_PS15_Msk (0x8000UL) /*!< PORT1 OMR: PS15 (Bitfield-Mask: 0x01) */ -#define PORT1_OMR_PR0_Pos (16UL) /*!< PORT1 OMR: PR0 (Bit 16) */ -#define PORT1_OMR_PR0_Msk (0x10000UL) /*!< PORT1 OMR: PR0 (Bitfield-Mask: 0x01) */ -#define PORT1_OMR_PR1_Pos (17UL) /*!< PORT1 OMR: PR1 (Bit 17) */ -#define PORT1_OMR_PR1_Msk (0x20000UL) /*!< PORT1 OMR: PR1 (Bitfield-Mask: 0x01) */ -#define PORT1_OMR_PR2_Pos (18UL) /*!< PORT1 OMR: PR2 (Bit 18) */ -#define PORT1_OMR_PR2_Msk (0x40000UL) /*!< PORT1 OMR: PR2 (Bitfield-Mask: 0x01) */ -#define PORT1_OMR_PR3_Pos (19UL) /*!< PORT1 OMR: PR3 (Bit 19) */ -#define PORT1_OMR_PR3_Msk (0x80000UL) /*!< PORT1 OMR: PR3 (Bitfield-Mask: 0x01) */ -#define PORT1_OMR_PR4_Pos (20UL) /*!< PORT1 OMR: PR4 (Bit 20) */ -#define PORT1_OMR_PR4_Msk (0x100000UL) /*!< PORT1 OMR: PR4 (Bitfield-Mask: 0x01) */ -#define PORT1_OMR_PR5_Pos (21UL) /*!< PORT1 OMR: PR5 (Bit 21) */ -#define PORT1_OMR_PR5_Msk (0x200000UL) /*!< PORT1 OMR: PR5 (Bitfield-Mask: 0x01) */ -#define PORT1_OMR_PR6_Pos (22UL) /*!< PORT1 OMR: PR6 (Bit 22) */ -#define PORT1_OMR_PR6_Msk (0x400000UL) /*!< PORT1 OMR: PR6 (Bitfield-Mask: 0x01) */ -#define PORT1_OMR_PR7_Pos (23UL) /*!< PORT1 OMR: PR7 (Bit 23) */ -#define PORT1_OMR_PR7_Msk (0x800000UL) /*!< PORT1 OMR: PR7 (Bitfield-Mask: 0x01) */ -#define PORT1_OMR_PR8_Pos (24UL) /*!< PORT1 OMR: PR8 (Bit 24) */ -#define PORT1_OMR_PR8_Msk (0x1000000UL) /*!< PORT1 OMR: PR8 (Bitfield-Mask: 0x01) */ -#define PORT1_OMR_PR9_Pos (25UL) /*!< PORT1 OMR: PR9 (Bit 25) */ -#define PORT1_OMR_PR9_Msk (0x2000000UL) /*!< PORT1 OMR: PR9 (Bitfield-Mask: 0x01) */ -#define PORT1_OMR_PR10_Pos (26UL) /*!< PORT1 OMR: PR10 (Bit 26) */ -#define PORT1_OMR_PR10_Msk (0x4000000UL) /*!< PORT1 OMR: PR10 (Bitfield-Mask: 0x01) */ -#define PORT1_OMR_PR11_Pos (27UL) /*!< PORT1 OMR: PR11 (Bit 27) */ -#define PORT1_OMR_PR11_Msk (0x8000000UL) /*!< PORT1 OMR: PR11 (Bitfield-Mask: 0x01) */ -#define PORT1_OMR_PR12_Pos (28UL) /*!< PORT1 OMR: PR12 (Bit 28) */ -#define PORT1_OMR_PR12_Msk (0x10000000UL) /*!< PORT1 OMR: PR12 (Bitfield-Mask: 0x01) */ -#define PORT1_OMR_PR13_Pos (29UL) /*!< PORT1 OMR: PR13 (Bit 29) */ -#define PORT1_OMR_PR13_Msk (0x20000000UL) /*!< PORT1 OMR: PR13 (Bitfield-Mask: 0x01) */ -#define PORT1_OMR_PR14_Pos (30UL) /*!< PORT1 OMR: PR14 (Bit 30) */ -#define PORT1_OMR_PR14_Msk (0x40000000UL) /*!< PORT1 OMR: PR14 (Bitfield-Mask: 0x01) */ -#define PORT1_OMR_PR15_Pos (31UL) /*!< PORT1 OMR: PR15 (Bit 31) */ -#define PORT1_OMR_PR15_Msk (0x80000000UL) /*!< PORT1 OMR: PR15 (Bitfield-Mask: 0x01) */ - -/* --------------------------------- PORT1_IOCR0 -------------------------------- */ -#define PORT1_IOCR0_PC0_Pos (3UL) /*!< PORT1 IOCR0: PC0 (Bit 3) */ -#define PORT1_IOCR0_PC0_Msk (0xf8UL) /*!< PORT1 IOCR0: PC0 (Bitfield-Mask: 0x1f) */ -#define PORT1_IOCR0_PC1_Pos (11UL) /*!< PORT1 IOCR0: PC1 (Bit 11) */ -#define PORT1_IOCR0_PC1_Msk (0xf800UL) /*!< PORT1 IOCR0: PC1 (Bitfield-Mask: 0x1f) */ -#define PORT1_IOCR0_PC2_Pos (19UL) /*!< PORT1 IOCR0: PC2 (Bit 19) */ -#define PORT1_IOCR0_PC2_Msk (0xf80000UL) /*!< PORT1 IOCR0: PC2 (Bitfield-Mask: 0x1f) */ -#define PORT1_IOCR0_PC3_Pos (27UL) /*!< PORT1 IOCR0: PC3 (Bit 27) */ -#define PORT1_IOCR0_PC3_Msk (0xf8000000UL) /*!< PORT1 IOCR0: PC3 (Bitfield-Mask: 0x1f) */ - -/* --------------------------------- PORT1_IOCR4 -------------------------------- */ -#define PORT1_IOCR4_PC4_Pos (3UL) /*!< PORT1 IOCR4: PC4 (Bit 3) */ -#define PORT1_IOCR4_PC4_Msk (0xf8UL) /*!< PORT1 IOCR4: PC4 (Bitfield-Mask: 0x1f) */ -#define PORT1_IOCR4_PC5_Pos (11UL) /*!< PORT1 IOCR4: PC5 (Bit 11) */ -#define PORT1_IOCR4_PC5_Msk (0xf800UL) /*!< PORT1 IOCR4: PC5 (Bitfield-Mask: 0x1f) */ -#define PORT1_IOCR4_PC6_Pos (19UL) /*!< PORT1 IOCR4: PC6 (Bit 19) */ -#define PORT1_IOCR4_PC6_Msk (0xf80000UL) /*!< PORT1 IOCR4: PC6 (Bitfield-Mask: 0x1f) */ -#define PORT1_IOCR4_PC7_Pos (27UL) /*!< PORT1 IOCR4: PC7 (Bit 27) */ -#define PORT1_IOCR4_PC7_Msk (0xf8000000UL) /*!< PORT1 IOCR4: PC7 (Bitfield-Mask: 0x1f) */ - -/* --------------------------------- PORT1_IOCR8 -------------------------------- */ -#define PORT1_IOCR8_PC8_Pos (3UL) /*!< PORT1 IOCR8: PC8 (Bit 3) */ -#define PORT1_IOCR8_PC8_Msk (0xf8UL) /*!< PORT1 IOCR8: PC8 (Bitfield-Mask: 0x1f) */ -#define PORT1_IOCR8_PC9_Pos (11UL) /*!< PORT1 IOCR8: PC9 (Bit 11) */ -#define PORT1_IOCR8_PC9_Msk (0xf800UL) /*!< PORT1 IOCR8: PC9 (Bitfield-Mask: 0x1f) */ -#define PORT1_IOCR8_PC10_Pos (19UL) /*!< PORT1 IOCR8: PC10 (Bit 19) */ -#define PORT1_IOCR8_PC10_Msk (0xf80000UL) /*!< PORT1 IOCR8: PC10 (Bitfield-Mask: 0x1f) */ -#define PORT1_IOCR8_PC11_Pos (27UL) /*!< PORT1 IOCR8: PC11 (Bit 27) */ -#define PORT1_IOCR8_PC11_Msk (0xf8000000UL) /*!< PORT1 IOCR8: PC11 (Bitfield-Mask: 0x1f) */ - -/* -------------------------------- PORT1_IOCR12 -------------------------------- */ -#define PORT1_IOCR12_PC12_Pos (3UL) /*!< PORT1 IOCR12: PC12 (Bit 3) */ -#define PORT1_IOCR12_PC12_Msk (0xf8UL) /*!< PORT1 IOCR12: PC12 (Bitfield-Mask: 0x1f) */ -#define PORT1_IOCR12_PC13_Pos (11UL) /*!< PORT1 IOCR12: PC13 (Bit 11) */ -#define PORT1_IOCR12_PC13_Msk (0xf800UL) /*!< PORT1 IOCR12: PC13 (Bitfield-Mask: 0x1f) */ -#define PORT1_IOCR12_PC14_Pos (19UL) /*!< PORT1 IOCR12: PC14 (Bit 19) */ -#define PORT1_IOCR12_PC14_Msk (0xf80000UL) /*!< PORT1 IOCR12: PC14 (Bitfield-Mask: 0x1f) */ -#define PORT1_IOCR12_PC15_Pos (27UL) /*!< PORT1 IOCR12: PC15 (Bit 27) */ -#define PORT1_IOCR12_PC15_Msk (0xf8000000UL) /*!< PORT1 IOCR12: PC15 (Bitfield-Mask: 0x1f) */ - -/* ---------------------------------- PORT1_IN ---------------------------------- */ -#define PORT1_IN_P0_Pos (0UL) /*!< PORT1 IN: P0 (Bit 0) */ -#define PORT1_IN_P0_Msk (0x1UL) /*!< PORT1 IN: P0 (Bitfield-Mask: 0x01) */ -#define PORT1_IN_P1_Pos (1UL) /*!< PORT1 IN: P1 (Bit 1) */ -#define PORT1_IN_P1_Msk (0x2UL) /*!< PORT1 IN: P1 (Bitfield-Mask: 0x01) */ -#define PORT1_IN_P2_Pos (2UL) /*!< PORT1 IN: P2 (Bit 2) */ -#define PORT1_IN_P2_Msk (0x4UL) /*!< PORT1 IN: P2 (Bitfield-Mask: 0x01) */ -#define PORT1_IN_P3_Pos (3UL) /*!< PORT1 IN: P3 (Bit 3) */ -#define PORT1_IN_P3_Msk (0x8UL) /*!< PORT1 IN: P3 (Bitfield-Mask: 0x01) */ -#define PORT1_IN_P4_Pos (4UL) /*!< PORT1 IN: P4 (Bit 4) */ -#define PORT1_IN_P4_Msk (0x10UL) /*!< PORT1 IN: P4 (Bitfield-Mask: 0x01) */ -#define PORT1_IN_P5_Pos (5UL) /*!< PORT1 IN: P5 (Bit 5) */ -#define PORT1_IN_P5_Msk (0x20UL) /*!< PORT1 IN: P5 (Bitfield-Mask: 0x01) */ -#define PORT1_IN_P6_Pos (6UL) /*!< PORT1 IN: P6 (Bit 6) */ -#define PORT1_IN_P6_Msk (0x40UL) /*!< PORT1 IN: P6 (Bitfield-Mask: 0x01) */ -#define PORT1_IN_P7_Pos (7UL) /*!< PORT1 IN: P7 (Bit 7) */ -#define PORT1_IN_P7_Msk (0x80UL) /*!< PORT1 IN: P7 (Bitfield-Mask: 0x01) */ -#define PORT1_IN_P8_Pos (8UL) /*!< PORT1 IN: P8 (Bit 8) */ -#define PORT1_IN_P8_Msk (0x100UL) /*!< PORT1 IN: P8 (Bitfield-Mask: 0x01) */ -#define PORT1_IN_P9_Pos (9UL) /*!< PORT1 IN: P9 (Bit 9) */ -#define PORT1_IN_P9_Msk (0x200UL) /*!< PORT1 IN: P9 (Bitfield-Mask: 0x01) */ -#define PORT1_IN_P10_Pos (10UL) /*!< PORT1 IN: P10 (Bit 10) */ -#define PORT1_IN_P10_Msk (0x400UL) /*!< PORT1 IN: P10 (Bitfield-Mask: 0x01) */ -#define PORT1_IN_P11_Pos (11UL) /*!< PORT1 IN: P11 (Bit 11) */ -#define PORT1_IN_P11_Msk (0x800UL) /*!< PORT1 IN: P11 (Bitfield-Mask: 0x01) */ -#define PORT1_IN_P12_Pos (12UL) /*!< PORT1 IN: P12 (Bit 12) */ -#define PORT1_IN_P12_Msk (0x1000UL) /*!< PORT1 IN: P12 (Bitfield-Mask: 0x01) */ -#define PORT1_IN_P13_Pos (13UL) /*!< PORT1 IN: P13 (Bit 13) */ -#define PORT1_IN_P13_Msk (0x2000UL) /*!< PORT1 IN: P13 (Bitfield-Mask: 0x01) */ -#define PORT1_IN_P14_Pos (14UL) /*!< PORT1 IN: P14 (Bit 14) */ -#define PORT1_IN_P14_Msk (0x4000UL) /*!< PORT1 IN: P14 (Bitfield-Mask: 0x01) */ -#define PORT1_IN_P15_Pos (15UL) /*!< PORT1 IN: P15 (Bit 15) */ -#define PORT1_IN_P15_Msk (0x8000UL) /*!< PORT1 IN: P15 (Bitfield-Mask: 0x01) */ - -/* --------------------------------- PORT1_PDR0 --------------------------------- */ -#define PORT1_PDR0_PD0_Pos (0UL) /*!< PORT1 PDR0: PD0 (Bit 0) */ -#define PORT1_PDR0_PD0_Msk (0x7UL) /*!< PORT1 PDR0: PD0 (Bitfield-Mask: 0x07) */ -#define PORT1_PDR0_PD1_Pos (4UL) /*!< PORT1 PDR0: PD1 (Bit 4) */ -#define PORT1_PDR0_PD1_Msk (0x70UL) /*!< PORT1 PDR0: PD1 (Bitfield-Mask: 0x07) */ -#define PORT1_PDR0_PD2_Pos (8UL) /*!< PORT1 PDR0: PD2 (Bit 8) */ -#define PORT1_PDR0_PD2_Msk (0x700UL) /*!< PORT1 PDR0: PD2 (Bitfield-Mask: 0x07) */ -#define PORT1_PDR0_PD3_Pos (12UL) /*!< PORT1 PDR0: PD3 (Bit 12) */ -#define PORT1_PDR0_PD3_Msk (0x7000UL) /*!< PORT1 PDR0: PD3 (Bitfield-Mask: 0x07) */ -#define PORT1_PDR0_PD4_Pos (16UL) /*!< PORT1 PDR0: PD4 (Bit 16) */ -#define PORT1_PDR0_PD4_Msk (0x70000UL) /*!< PORT1 PDR0: PD4 (Bitfield-Mask: 0x07) */ -#define PORT1_PDR0_PD5_Pos (20UL) /*!< PORT1 PDR0: PD5 (Bit 20) */ -#define PORT1_PDR0_PD5_Msk (0x700000UL) /*!< PORT1 PDR0: PD5 (Bitfield-Mask: 0x07) */ -#define PORT1_PDR0_PD6_Pos (24UL) /*!< PORT1 PDR0: PD6 (Bit 24) */ -#define PORT1_PDR0_PD6_Msk (0x7000000UL) /*!< PORT1 PDR0: PD6 (Bitfield-Mask: 0x07) */ -#define PORT1_PDR0_PD7_Pos (28UL) /*!< PORT1 PDR0: PD7 (Bit 28) */ -#define PORT1_PDR0_PD7_Msk (0x70000000UL) /*!< PORT1 PDR0: PD7 (Bitfield-Mask: 0x07) */ - -/* --------------------------------- PORT1_PDR1 --------------------------------- */ -#define PORT1_PDR1_PD8_Pos (0UL) /*!< PORT1 PDR1: PD8 (Bit 0) */ -#define PORT1_PDR1_PD8_Msk (0x7UL) /*!< PORT1 PDR1: PD8 (Bitfield-Mask: 0x07) */ -#define PORT1_PDR1_PD9_Pos (4UL) /*!< PORT1 PDR1: PD9 (Bit 4) */ -#define PORT1_PDR1_PD9_Msk (0x70UL) /*!< PORT1 PDR1: PD9 (Bitfield-Mask: 0x07) */ -#define PORT1_PDR1_PD10_Pos (8UL) /*!< PORT1 PDR1: PD10 (Bit 8) */ -#define PORT1_PDR1_PD10_Msk (0x700UL) /*!< PORT1 PDR1: PD10 (Bitfield-Mask: 0x07) */ -#define PORT1_PDR1_PD11_Pos (12UL) /*!< PORT1 PDR1: PD11 (Bit 12) */ -#define PORT1_PDR1_PD11_Msk (0x7000UL) /*!< PORT1 PDR1: PD11 (Bitfield-Mask: 0x07) */ -#define PORT1_PDR1_PD12_Pos (16UL) /*!< PORT1 PDR1: PD12 (Bit 16) */ -#define PORT1_PDR1_PD12_Msk (0x70000UL) /*!< PORT1 PDR1: PD12 (Bitfield-Mask: 0x07) */ -#define PORT1_PDR1_PD13_Pos (20UL) /*!< PORT1 PDR1: PD13 (Bit 20) */ -#define PORT1_PDR1_PD13_Msk (0x700000UL) /*!< PORT1 PDR1: PD13 (Bitfield-Mask: 0x07) */ -#define PORT1_PDR1_PD14_Pos (24UL) /*!< PORT1 PDR1: PD14 (Bit 24) */ -#define PORT1_PDR1_PD14_Msk (0x7000000UL) /*!< PORT1 PDR1: PD14 (Bitfield-Mask: 0x07) */ -#define PORT1_PDR1_PD15_Pos (28UL) /*!< PORT1 PDR1: PD15 (Bit 28) */ -#define PORT1_PDR1_PD15_Msk (0x70000000UL) /*!< PORT1 PDR1: PD15 (Bitfield-Mask: 0x07) */ - -/* --------------------------------- PORT1_PDISC -------------------------------- */ -#define PORT1_PDISC_PDIS0_Pos (0UL) /*!< PORT1 PDISC: PDIS0 (Bit 0) */ -#define PORT1_PDISC_PDIS0_Msk (0x1UL) /*!< PORT1 PDISC: PDIS0 (Bitfield-Mask: 0x01) */ -#define PORT1_PDISC_PDIS1_Pos (1UL) /*!< PORT1 PDISC: PDIS1 (Bit 1) */ -#define PORT1_PDISC_PDIS1_Msk (0x2UL) /*!< PORT1 PDISC: PDIS1 (Bitfield-Mask: 0x01) */ -#define PORT1_PDISC_PDIS2_Pos (2UL) /*!< PORT1 PDISC: PDIS2 (Bit 2) */ -#define PORT1_PDISC_PDIS2_Msk (0x4UL) /*!< PORT1 PDISC: PDIS2 (Bitfield-Mask: 0x01) */ -#define PORT1_PDISC_PDIS3_Pos (3UL) /*!< PORT1 PDISC: PDIS3 (Bit 3) */ -#define PORT1_PDISC_PDIS3_Msk (0x8UL) /*!< PORT1 PDISC: PDIS3 (Bitfield-Mask: 0x01) */ -#define PORT1_PDISC_PDIS4_Pos (4UL) /*!< PORT1 PDISC: PDIS4 (Bit 4) */ -#define PORT1_PDISC_PDIS4_Msk (0x10UL) /*!< PORT1 PDISC: PDIS4 (Bitfield-Mask: 0x01) */ -#define PORT1_PDISC_PDIS5_Pos (5UL) /*!< PORT1 PDISC: PDIS5 (Bit 5) */ -#define PORT1_PDISC_PDIS5_Msk (0x20UL) /*!< PORT1 PDISC: PDIS5 (Bitfield-Mask: 0x01) */ -#define PORT1_PDISC_PDIS6_Pos (6UL) /*!< PORT1 PDISC: PDIS6 (Bit 6) */ -#define PORT1_PDISC_PDIS6_Msk (0x40UL) /*!< PORT1 PDISC: PDIS6 (Bitfield-Mask: 0x01) */ -#define PORT1_PDISC_PDIS7_Pos (7UL) /*!< PORT1 PDISC: PDIS7 (Bit 7) */ -#define PORT1_PDISC_PDIS7_Msk (0x80UL) /*!< PORT1 PDISC: PDIS7 (Bitfield-Mask: 0x01) */ -#define PORT1_PDISC_PDIS8_Pos (8UL) /*!< PORT1 PDISC: PDIS8 (Bit 8) */ -#define PORT1_PDISC_PDIS8_Msk (0x100UL) /*!< PORT1 PDISC: PDIS8 (Bitfield-Mask: 0x01) */ -#define PORT1_PDISC_PDIS9_Pos (9UL) /*!< PORT1 PDISC: PDIS9 (Bit 9) */ -#define PORT1_PDISC_PDIS9_Msk (0x200UL) /*!< PORT1 PDISC: PDIS9 (Bitfield-Mask: 0x01) */ -#define PORT1_PDISC_PDIS10_Pos (10UL) /*!< PORT1 PDISC: PDIS10 (Bit 10) */ -#define PORT1_PDISC_PDIS10_Msk (0x400UL) /*!< PORT1 PDISC: PDIS10 (Bitfield-Mask: 0x01) */ -#define PORT1_PDISC_PDIS11_Pos (11UL) /*!< PORT1 PDISC: PDIS11 (Bit 11) */ -#define PORT1_PDISC_PDIS11_Msk (0x800UL) /*!< PORT1 PDISC: PDIS11 (Bitfield-Mask: 0x01) */ -#define PORT1_PDISC_PDIS12_Pos (12UL) /*!< PORT1 PDISC: PDIS12 (Bit 12) */ -#define PORT1_PDISC_PDIS12_Msk (0x1000UL) /*!< PORT1 PDISC: PDIS12 (Bitfield-Mask: 0x01) */ -#define PORT1_PDISC_PDIS13_Pos (13UL) /*!< PORT1 PDISC: PDIS13 (Bit 13) */ -#define PORT1_PDISC_PDIS13_Msk (0x2000UL) /*!< PORT1 PDISC: PDIS13 (Bitfield-Mask: 0x01) */ -#define PORT1_PDISC_PDIS14_Pos (14UL) /*!< PORT1 PDISC: PDIS14 (Bit 14) */ -#define PORT1_PDISC_PDIS14_Msk (0x4000UL) /*!< PORT1 PDISC: PDIS14 (Bitfield-Mask: 0x01) */ -#define PORT1_PDISC_PDIS15_Pos (15UL) /*!< PORT1 PDISC: PDIS15 (Bit 15) */ -#define PORT1_PDISC_PDIS15_Msk (0x8000UL) /*!< PORT1 PDISC: PDIS15 (Bitfield-Mask: 0x01) */ - -/* ---------------------------------- PORT1_PPS --------------------------------- */ -#define PORT1_PPS_PPS0_Pos (0UL) /*!< PORT1 PPS: PPS0 (Bit 0) */ -#define PORT1_PPS_PPS0_Msk (0x1UL) /*!< PORT1 PPS: PPS0 (Bitfield-Mask: 0x01) */ -#define PORT1_PPS_PPS1_Pos (1UL) /*!< PORT1 PPS: PPS1 (Bit 1) */ -#define PORT1_PPS_PPS1_Msk (0x2UL) /*!< PORT1 PPS: PPS1 (Bitfield-Mask: 0x01) */ -#define PORT1_PPS_PPS2_Pos (2UL) /*!< PORT1 PPS: PPS2 (Bit 2) */ -#define PORT1_PPS_PPS2_Msk (0x4UL) /*!< PORT1 PPS: PPS2 (Bitfield-Mask: 0x01) */ -#define PORT1_PPS_PPS3_Pos (3UL) /*!< PORT1 PPS: PPS3 (Bit 3) */ -#define PORT1_PPS_PPS3_Msk (0x8UL) /*!< PORT1 PPS: PPS3 (Bitfield-Mask: 0x01) */ -#define PORT1_PPS_PPS4_Pos (4UL) /*!< PORT1 PPS: PPS4 (Bit 4) */ -#define PORT1_PPS_PPS4_Msk (0x10UL) /*!< PORT1 PPS: PPS4 (Bitfield-Mask: 0x01) */ -#define PORT1_PPS_PPS5_Pos (5UL) /*!< PORT1 PPS: PPS5 (Bit 5) */ -#define PORT1_PPS_PPS5_Msk (0x20UL) /*!< PORT1 PPS: PPS5 (Bitfield-Mask: 0x01) */ -#define PORT1_PPS_PPS6_Pos (6UL) /*!< PORT1 PPS: PPS6 (Bit 6) */ -#define PORT1_PPS_PPS6_Msk (0x40UL) /*!< PORT1 PPS: PPS6 (Bitfield-Mask: 0x01) */ -#define PORT1_PPS_PPS7_Pos (7UL) /*!< PORT1 PPS: PPS7 (Bit 7) */ -#define PORT1_PPS_PPS7_Msk (0x80UL) /*!< PORT1 PPS: PPS7 (Bitfield-Mask: 0x01) */ -#define PORT1_PPS_PPS8_Pos (8UL) /*!< PORT1 PPS: PPS8 (Bit 8) */ -#define PORT1_PPS_PPS8_Msk (0x100UL) /*!< PORT1 PPS: PPS8 (Bitfield-Mask: 0x01) */ -#define PORT1_PPS_PPS9_Pos (9UL) /*!< PORT1 PPS: PPS9 (Bit 9) */ -#define PORT1_PPS_PPS9_Msk (0x200UL) /*!< PORT1 PPS: PPS9 (Bitfield-Mask: 0x01) */ -#define PORT1_PPS_PPS10_Pos (10UL) /*!< PORT1 PPS: PPS10 (Bit 10) */ -#define PORT1_PPS_PPS10_Msk (0x400UL) /*!< PORT1 PPS: PPS10 (Bitfield-Mask: 0x01) */ -#define PORT1_PPS_PPS11_Pos (11UL) /*!< PORT1 PPS: PPS11 (Bit 11) */ -#define PORT1_PPS_PPS11_Msk (0x800UL) /*!< PORT1 PPS: PPS11 (Bitfield-Mask: 0x01) */ -#define PORT1_PPS_PPS12_Pos (12UL) /*!< PORT1 PPS: PPS12 (Bit 12) */ -#define PORT1_PPS_PPS12_Msk (0x1000UL) /*!< PORT1 PPS: PPS12 (Bitfield-Mask: 0x01) */ -#define PORT1_PPS_PPS13_Pos (13UL) /*!< PORT1 PPS: PPS13 (Bit 13) */ -#define PORT1_PPS_PPS13_Msk (0x2000UL) /*!< PORT1 PPS: PPS13 (Bitfield-Mask: 0x01) */ -#define PORT1_PPS_PPS14_Pos (14UL) /*!< PORT1 PPS: PPS14 (Bit 14) */ -#define PORT1_PPS_PPS14_Msk (0x4000UL) /*!< PORT1 PPS: PPS14 (Bitfield-Mask: 0x01) */ -#define PORT1_PPS_PPS15_Pos (15UL) /*!< PORT1 PPS: PPS15 (Bit 15) */ -#define PORT1_PPS_PPS15_Msk (0x8000UL) /*!< PORT1 PPS: PPS15 (Bitfield-Mask: 0x01) */ - -/* --------------------------------- PORT1_HWSEL -------------------------------- */ -#define PORT1_HWSEL_HW0_Pos (0UL) /*!< PORT1 HWSEL: HW0 (Bit 0) */ -#define PORT1_HWSEL_HW0_Msk (0x3UL) /*!< PORT1 HWSEL: HW0 (Bitfield-Mask: 0x03) */ -#define PORT1_HWSEL_HW1_Pos (2UL) /*!< PORT1 HWSEL: HW1 (Bit 2) */ -#define PORT1_HWSEL_HW1_Msk (0xcUL) /*!< PORT1 HWSEL: HW1 (Bitfield-Mask: 0x03) */ -#define PORT1_HWSEL_HW2_Pos (4UL) /*!< PORT1 HWSEL: HW2 (Bit 4) */ -#define PORT1_HWSEL_HW2_Msk (0x30UL) /*!< PORT1 HWSEL: HW2 (Bitfield-Mask: 0x03) */ -#define PORT1_HWSEL_HW3_Pos (6UL) /*!< PORT1 HWSEL: HW3 (Bit 6) */ -#define PORT1_HWSEL_HW3_Msk (0xc0UL) /*!< PORT1 HWSEL: HW3 (Bitfield-Mask: 0x03) */ -#define PORT1_HWSEL_HW4_Pos (8UL) /*!< PORT1 HWSEL: HW4 (Bit 8) */ -#define PORT1_HWSEL_HW4_Msk (0x300UL) /*!< PORT1 HWSEL: HW4 (Bitfield-Mask: 0x03) */ -#define PORT1_HWSEL_HW5_Pos (10UL) /*!< PORT1 HWSEL: HW5 (Bit 10) */ -#define PORT1_HWSEL_HW5_Msk (0xc00UL) /*!< PORT1 HWSEL: HW5 (Bitfield-Mask: 0x03) */ -#define PORT1_HWSEL_HW6_Pos (12UL) /*!< PORT1 HWSEL: HW6 (Bit 12) */ -#define PORT1_HWSEL_HW6_Msk (0x3000UL) /*!< PORT1 HWSEL: HW6 (Bitfield-Mask: 0x03) */ -#define PORT1_HWSEL_HW7_Pos (14UL) /*!< PORT1 HWSEL: HW7 (Bit 14) */ -#define PORT1_HWSEL_HW7_Msk (0xc000UL) /*!< PORT1 HWSEL: HW7 (Bitfield-Mask: 0x03) */ -#define PORT1_HWSEL_HW8_Pos (16UL) /*!< PORT1 HWSEL: HW8 (Bit 16) */ -#define PORT1_HWSEL_HW8_Msk (0x30000UL) /*!< PORT1 HWSEL: HW8 (Bitfield-Mask: 0x03) */ -#define PORT1_HWSEL_HW9_Pos (18UL) /*!< PORT1 HWSEL: HW9 (Bit 18) */ -#define PORT1_HWSEL_HW9_Msk (0xc0000UL) /*!< PORT1 HWSEL: HW9 (Bitfield-Mask: 0x03) */ -#define PORT1_HWSEL_HW10_Pos (20UL) /*!< PORT1 HWSEL: HW10 (Bit 20) */ -#define PORT1_HWSEL_HW10_Msk (0x300000UL) /*!< PORT1 HWSEL: HW10 (Bitfield-Mask: 0x03) */ -#define PORT1_HWSEL_HW11_Pos (22UL) /*!< PORT1 HWSEL: HW11 (Bit 22) */ -#define PORT1_HWSEL_HW11_Msk (0xc00000UL) /*!< PORT1 HWSEL: HW11 (Bitfield-Mask: 0x03) */ -#define PORT1_HWSEL_HW12_Pos (24UL) /*!< PORT1 HWSEL: HW12 (Bit 24) */ -#define PORT1_HWSEL_HW12_Msk (0x3000000UL) /*!< PORT1 HWSEL: HW12 (Bitfield-Mask: 0x03) */ -#define PORT1_HWSEL_HW13_Pos (26UL) /*!< PORT1 HWSEL: HW13 (Bit 26) */ -#define PORT1_HWSEL_HW13_Msk (0xc000000UL) /*!< PORT1 HWSEL: HW13 (Bitfield-Mask: 0x03) */ -#define PORT1_HWSEL_HW14_Pos (28UL) /*!< PORT1 HWSEL: HW14 (Bit 28) */ -#define PORT1_HWSEL_HW14_Msk (0x30000000UL) /*!< PORT1 HWSEL: HW14 (Bitfield-Mask: 0x03) */ -#define PORT1_HWSEL_HW15_Pos (30UL) /*!< PORT1 HWSEL: HW15 (Bit 30) */ -#define PORT1_HWSEL_HW15_Msk (0xc0000000UL) /*!< PORT1 HWSEL: HW15 (Bitfield-Mask: 0x03) */ - - -/* ================================================================================ */ -/* ================ struct 'PORT2' Position & Mask ================ */ -/* ================================================================================ */ - - -/* ---------------------------------- PORT2_OUT --------------------------------- */ -#define PORT2_OUT_P0_Pos (0UL) /*!< PORT2 OUT: P0 (Bit 0) */ -#define PORT2_OUT_P0_Msk (0x1UL) /*!< PORT2 OUT: P0 (Bitfield-Mask: 0x01) */ -#define PORT2_OUT_P1_Pos (1UL) /*!< PORT2 OUT: P1 (Bit 1) */ -#define PORT2_OUT_P1_Msk (0x2UL) /*!< PORT2 OUT: P1 (Bitfield-Mask: 0x01) */ -#define PORT2_OUT_P2_Pos (2UL) /*!< PORT2 OUT: P2 (Bit 2) */ -#define PORT2_OUT_P2_Msk (0x4UL) /*!< PORT2 OUT: P2 (Bitfield-Mask: 0x01) */ -#define PORT2_OUT_P3_Pos (3UL) /*!< PORT2 OUT: P3 (Bit 3) */ -#define PORT2_OUT_P3_Msk (0x8UL) /*!< PORT2 OUT: P3 (Bitfield-Mask: 0x01) */ -#define PORT2_OUT_P4_Pos (4UL) /*!< PORT2 OUT: P4 (Bit 4) */ -#define PORT2_OUT_P4_Msk (0x10UL) /*!< PORT2 OUT: P4 (Bitfield-Mask: 0x01) */ -#define PORT2_OUT_P5_Pos (5UL) /*!< PORT2 OUT: P5 (Bit 5) */ -#define PORT2_OUT_P5_Msk (0x20UL) /*!< PORT2 OUT: P5 (Bitfield-Mask: 0x01) */ -#define PORT2_OUT_P6_Pos (6UL) /*!< PORT2 OUT: P6 (Bit 6) */ -#define PORT2_OUT_P6_Msk (0x40UL) /*!< PORT2 OUT: P6 (Bitfield-Mask: 0x01) */ -#define PORT2_OUT_P7_Pos (7UL) /*!< PORT2 OUT: P7 (Bit 7) */ -#define PORT2_OUT_P7_Msk (0x80UL) /*!< PORT2 OUT: P7 (Bitfield-Mask: 0x01) */ -#define PORT2_OUT_P8_Pos (8UL) /*!< PORT2 OUT: P8 (Bit 8) */ -#define PORT2_OUT_P8_Msk (0x100UL) /*!< PORT2 OUT: P8 (Bitfield-Mask: 0x01) */ -#define PORT2_OUT_P9_Pos (9UL) /*!< PORT2 OUT: P9 (Bit 9) */ -#define PORT2_OUT_P9_Msk (0x200UL) /*!< PORT2 OUT: P9 (Bitfield-Mask: 0x01) */ -#define PORT2_OUT_P10_Pos (10UL) /*!< PORT2 OUT: P10 (Bit 10) */ -#define PORT2_OUT_P10_Msk (0x400UL) /*!< PORT2 OUT: P10 (Bitfield-Mask: 0x01) */ -#define PORT2_OUT_P11_Pos (11UL) /*!< PORT2 OUT: P11 (Bit 11) */ -#define PORT2_OUT_P11_Msk (0x800UL) /*!< PORT2 OUT: P11 (Bitfield-Mask: 0x01) */ -#define PORT2_OUT_P12_Pos (12UL) /*!< PORT2 OUT: P12 (Bit 12) */ -#define PORT2_OUT_P12_Msk (0x1000UL) /*!< PORT2 OUT: P12 (Bitfield-Mask: 0x01) */ -#define PORT2_OUT_P13_Pos (13UL) /*!< PORT2 OUT: P13 (Bit 13) */ -#define PORT2_OUT_P13_Msk (0x2000UL) /*!< PORT2 OUT: P13 (Bitfield-Mask: 0x01) */ -#define PORT2_OUT_P14_Pos (14UL) /*!< PORT2 OUT: P14 (Bit 14) */ -#define PORT2_OUT_P14_Msk (0x4000UL) /*!< PORT2 OUT: P14 (Bitfield-Mask: 0x01) */ -#define PORT2_OUT_P15_Pos (15UL) /*!< PORT2 OUT: P15 (Bit 15) */ -#define PORT2_OUT_P15_Msk (0x8000UL) /*!< PORT2 OUT: P15 (Bitfield-Mask: 0x01) */ - -/* ---------------------------------- PORT2_OMR --------------------------------- */ -#define PORT2_OMR_PS0_Pos (0UL) /*!< PORT2 OMR: PS0 (Bit 0) */ -#define PORT2_OMR_PS0_Msk (0x1UL) /*!< PORT2 OMR: PS0 (Bitfield-Mask: 0x01) */ -#define PORT2_OMR_PS1_Pos (1UL) /*!< PORT2 OMR: PS1 (Bit 1) */ -#define PORT2_OMR_PS1_Msk (0x2UL) /*!< PORT2 OMR: PS1 (Bitfield-Mask: 0x01) */ -#define PORT2_OMR_PS2_Pos (2UL) /*!< PORT2 OMR: PS2 (Bit 2) */ -#define PORT2_OMR_PS2_Msk (0x4UL) /*!< PORT2 OMR: PS2 (Bitfield-Mask: 0x01) */ -#define PORT2_OMR_PS3_Pos (3UL) /*!< PORT2 OMR: PS3 (Bit 3) */ -#define PORT2_OMR_PS3_Msk (0x8UL) /*!< PORT2 OMR: PS3 (Bitfield-Mask: 0x01) */ -#define PORT2_OMR_PS4_Pos (4UL) /*!< PORT2 OMR: PS4 (Bit 4) */ -#define PORT2_OMR_PS4_Msk (0x10UL) /*!< PORT2 OMR: PS4 (Bitfield-Mask: 0x01) */ -#define PORT2_OMR_PS5_Pos (5UL) /*!< PORT2 OMR: PS5 (Bit 5) */ -#define PORT2_OMR_PS5_Msk (0x20UL) /*!< PORT2 OMR: PS5 (Bitfield-Mask: 0x01) */ -#define PORT2_OMR_PS6_Pos (6UL) /*!< PORT2 OMR: PS6 (Bit 6) */ -#define PORT2_OMR_PS6_Msk (0x40UL) /*!< PORT2 OMR: PS6 (Bitfield-Mask: 0x01) */ -#define PORT2_OMR_PS7_Pos (7UL) /*!< PORT2 OMR: PS7 (Bit 7) */ -#define PORT2_OMR_PS7_Msk (0x80UL) /*!< PORT2 OMR: PS7 (Bitfield-Mask: 0x01) */ -#define PORT2_OMR_PS8_Pos (8UL) /*!< PORT2 OMR: PS8 (Bit 8) */ -#define PORT2_OMR_PS8_Msk (0x100UL) /*!< PORT2 OMR: PS8 (Bitfield-Mask: 0x01) */ -#define PORT2_OMR_PS9_Pos (9UL) /*!< PORT2 OMR: PS9 (Bit 9) */ -#define PORT2_OMR_PS9_Msk (0x200UL) /*!< PORT2 OMR: PS9 (Bitfield-Mask: 0x01) */ -#define PORT2_OMR_PS10_Pos (10UL) /*!< PORT2 OMR: PS10 (Bit 10) */ -#define PORT2_OMR_PS10_Msk (0x400UL) /*!< PORT2 OMR: PS10 (Bitfield-Mask: 0x01) */ -#define PORT2_OMR_PS11_Pos (11UL) /*!< PORT2 OMR: PS11 (Bit 11) */ -#define PORT2_OMR_PS11_Msk (0x800UL) /*!< PORT2 OMR: PS11 (Bitfield-Mask: 0x01) */ -#define PORT2_OMR_PS12_Pos (12UL) /*!< PORT2 OMR: PS12 (Bit 12) */ -#define PORT2_OMR_PS12_Msk (0x1000UL) /*!< PORT2 OMR: PS12 (Bitfield-Mask: 0x01) */ -#define PORT2_OMR_PS13_Pos (13UL) /*!< PORT2 OMR: PS13 (Bit 13) */ -#define PORT2_OMR_PS13_Msk (0x2000UL) /*!< PORT2 OMR: PS13 (Bitfield-Mask: 0x01) */ -#define PORT2_OMR_PS14_Pos (14UL) /*!< PORT2 OMR: PS14 (Bit 14) */ -#define PORT2_OMR_PS14_Msk (0x4000UL) /*!< PORT2 OMR: PS14 (Bitfield-Mask: 0x01) */ -#define PORT2_OMR_PS15_Pos (15UL) /*!< PORT2 OMR: PS15 (Bit 15) */ -#define PORT2_OMR_PS15_Msk (0x8000UL) /*!< PORT2 OMR: PS15 (Bitfield-Mask: 0x01) */ -#define PORT2_OMR_PR0_Pos (16UL) /*!< PORT2 OMR: PR0 (Bit 16) */ -#define PORT2_OMR_PR0_Msk (0x10000UL) /*!< PORT2 OMR: PR0 (Bitfield-Mask: 0x01) */ -#define PORT2_OMR_PR1_Pos (17UL) /*!< PORT2 OMR: PR1 (Bit 17) */ -#define PORT2_OMR_PR1_Msk (0x20000UL) /*!< PORT2 OMR: PR1 (Bitfield-Mask: 0x01) */ -#define PORT2_OMR_PR2_Pos (18UL) /*!< PORT2 OMR: PR2 (Bit 18) */ -#define PORT2_OMR_PR2_Msk (0x40000UL) /*!< PORT2 OMR: PR2 (Bitfield-Mask: 0x01) */ -#define PORT2_OMR_PR3_Pos (19UL) /*!< PORT2 OMR: PR3 (Bit 19) */ -#define PORT2_OMR_PR3_Msk (0x80000UL) /*!< PORT2 OMR: PR3 (Bitfield-Mask: 0x01) */ -#define PORT2_OMR_PR4_Pos (20UL) /*!< PORT2 OMR: PR4 (Bit 20) */ -#define PORT2_OMR_PR4_Msk (0x100000UL) /*!< PORT2 OMR: PR4 (Bitfield-Mask: 0x01) */ -#define PORT2_OMR_PR5_Pos (21UL) /*!< PORT2 OMR: PR5 (Bit 21) */ -#define PORT2_OMR_PR5_Msk (0x200000UL) /*!< PORT2 OMR: PR5 (Bitfield-Mask: 0x01) */ -#define PORT2_OMR_PR6_Pos (22UL) /*!< PORT2 OMR: PR6 (Bit 22) */ -#define PORT2_OMR_PR6_Msk (0x400000UL) /*!< PORT2 OMR: PR6 (Bitfield-Mask: 0x01) */ -#define PORT2_OMR_PR7_Pos (23UL) /*!< PORT2 OMR: PR7 (Bit 23) */ -#define PORT2_OMR_PR7_Msk (0x800000UL) /*!< PORT2 OMR: PR7 (Bitfield-Mask: 0x01) */ -#define PORT2_OMR_PR8_Pos (24UL) /*!< PORT2 OMR: PR8 (Bit 24) */ -#define PORT2_OMR_PR8_Msk (0x1000000UL) /*!< PORT2 OMR: PR8 (Bitfield-Mask: 0x01) */ -#define PORT2_OMR_PR9_Pos (25UL) /*!< PORT2 OMR: PR9 (Bit 25) */ -#define PORT2_OMR_PR9_Msk (0x2000000UL) /*!< PORT2 OMR: PR9 (Bitfield-Mask: 0x01) */ -#define PORT2_OMR_PR10_Pos (26UL) /*!< PORT2 OMR: PR10 (Bit 26) */ -#define PORT2_OMR_PR10_Msk (0x4000000UL) /*!< PORT2 OMR: PR10 (Bitfield-Mask: 0x01) */ -#define PORT2_OMR_PR11_Pos (27UL) /*!< PORT2 OMR: PR11 (Bit 27) */ -#define PORT2_OMR_PR11_Msk (0x8000000UL) /*!< PORT2 OMR: PR11 (Bitfield-Mask: 0x01) */ -#define PORT2_OMR_PR12_Pos (28UL) /*!< PORT2 OMR: PR12 (Bit 28) */ -#define PORT2_OMR_PR12_Msk (0x10000000UL) /*!< PORT2 OMR: PR12 (Bitfield-Mask: 0x01) */ -#define PORT2_OMR_PR13_Pos (29UL) /*!< PORT2 OMR: PR13 (Bit 29) */ -#define PORT2_OMR_PR13_Msk (0x20000000UL) /*!< PORT2 OMR: PR13 (Bitfield-Mask: 0x01) */ -#define PORT2_OMR_PR14_Pos (30UL) /*!< PORT2 OMR: PR14 (Bit 30) */ -#define PORT2_OMR_PR14_Msk (0x40000000UL) /*!< PORT2 OMR: PR14 (Bitfield-Mask: 0x01) */ -#define PORT2_OMR_PR15_Pos (31UL) /*!< PORT2 OMR: PR15 (Bit 31) */ -#define PORT2_OMR_PR15_Msk (0x80000000UL) /*!< PORT2 OMR: PR15 (Bitfield-Mask: 0x01) */ - -/* --------------------------------- PORT2_IOCR0 -------------------------------- */ -#define PORT2_IOCR0_PC0_Pos (3UL) /*!< PORT2 IOCR0: PC0 (Bit 3) */ -#define PORT2_IOCR0_PC0_Msk (0xf8UL) /*!< PORT2 IOCR0: PC0 (Bitfield-Mask: 0x1f) */ -#define PORT2_IOCR0_PC1_Pos (11UL) /*!< PORT2 IOCR0: PC1 (Bit 11) */ -#define PORT2_IOCR0_PC1_Msk (0xf800UL) /*!< PORT2 IOCR0: PC1 (Bitfield-Mask: 0x1f) */ -#define PORT2_IOCR0_PC2_Pos (19UL) /*!< PORT2 IOCR0: PC2 (Bit 19) */ -#define PORT2_IOCR0_PC2_Msk (0xf80000UL) /*!< PORT2 IOCR0: PC2 (Bitfield-Mask: 0x1f) */ -#define PORT2_IOCR0_PC3_Pos (27UL) /*!< PORT2 IOCR0: PC3 (Bit 27) */ -#define PORT2_IOCR0_PC3_Msk (0xf8000000UL) /*!< PORT2 IOCR0: PC3 (Bitfield-Mask: 0x1f) */ - -/* --------------------------------- PORT2_IOCR4 -------------------------------- */ -#define PORT2_IOCR4_PC4_Pos (3UL) /*!< PORT2 IOCR4: PC4 (Bit 3) */ -#define PORT2_IOCR4_PC4_Msk (0xf8UL) /*!< PORT2 IOCR4: PC4 (Bitfield-Mask: 0x1f) */ -#define PORT2_IOCR4_PC5_Pos (11UL) /*!< PORT2 IOCR4: PC5 (Bit 11) */ -#define PORT2_IOCR4_PC5_Msk (0xf800UL) /*!< PORT2 IOCR4: PC5 (Bitfield-Mask: 0x1f) */ -#define PORT2_IOCR4_PC6_Pos (19UL) /*!< PORT2 IOCR4: PC6 (Bit 19) */ -#define PORT2_IOCR4_PC6_Msk (0xf80000UL) /*!< PORT2 IOCR4: PC6 (Bitfield-Mask: 0x1f) */ -#define PORT2_IOCR4_PC7_Pos (27UL) /*!< PORT2 IOCR4: PC7 (Bit 27) */ -#define PORT2_IOCR4_PC7_Msk (0xf8000000UL) /*!< PORT2 IOCR4: PC7 (Bitfield-Mask: 0x1f) */ - -/* --------------------------------- PORT2_IOCR8 -------------------------------- */ -#define PORT2_IOCR8_PC8_Pos (3UL) /*!< PORT2 IOCR8: PC8 (Bit 3) */ -#define PORT2_IOCR8_PC8_Msk (0xf8UL) /*!< PORT2 IOCR8: PC8 (Bitfield-Mask: 0x1f) */ -#define PORT2_IOCR8_PC9_Pos (11UL) /*!< PORT2 IOCR8: PC9 (Bit 11) */ -#define PORT2_IOCR8_PC9_Msk (0xf800UL) /*!< PORT2 IOCR8: PC9 (Bitfield-Mask: 0x1f) */ -#define PORT2_IOCR8_PC10_Pos (19UL) /*!< PORT2 IOCR8: PC10 (Bit 19) */ -#define PORT2_IOCR8_PC10_Msk (0xf80000UL) /*!< PORT2 IOCR8: PC10 (Bitfield-Mask: 0x1f) */ -#define PORT2_IOCR8_PC11_Pos (27UL) /*!< PORT2 IOCR8: PC11 (Bit 27) */ -#define PORT2_IOCR8_PC11_Msk (0xf8000000UL) /*!< PORT2 IOCR8: PC11 (Bitfield-Mask: 0x1f) */ - -/* -------------------------------- PORT2_IOCR12 -------------------------------- */ -#define PORT2_IOCR12_PC12_Pos (3UL) /*!< PORT2 IOCR12: PC12 (Bit 3) */ -#define PORT2_IOCR12_PC12_Msk (0xf8UL) /*!< PORT2 IOCR12: PC12 (Bitfield-Mask: 0x1f) */ -#define PORT2_IOCR12_PC13_Pos (11UL) /*!< PORT2 IOCR12: PC13 (Bit 11) */ -#define PORT2_IOCR12_PC13_Msk (0xf800UL) /*!< PORT2 IOCR12: PC13 (Bitfield-Mask: 0x1f) */ -#define PORT2_IOCR12_PC14_Pos (19UL) /*!< PORT2 IOCR12: PC14 (Bit 19) */ -#define PORT2_IOCR12_PC14_Msk (0xf80000UL) /*!< PORT2 IOCR12: PC14 (Bitfield-Mask: 0x1f) */ -#define PORT2_IOCR12_PC15_Pos (27UL) /*!< PORT2 IOCR12: PC15 (Bit 27) */ -#define PORT2_IOCR12_PC15_Msk (0xf8000000UL) /*!< PORT2 IOCR12: PC15 (Bitfield-Mask: 0x1f) */ - -/* ---------------------------------- PORT2_IN ---------------------------------- */ -#define PORT2_IN_P0_Pos (0UL) /*!< PORT2 IN: P0 (Bit 0) */ -#define PORT2_IN_P0_Msk (0x1UL) /*!< PORT2 IN: P0 (Bitfield-Mask: 0x01) */ -#define PORT2_IN_P1_Pos (1UL) /*!< PORT2 IN: P1 (Bit 1) */ -#define PORT2_IN_P1_Msk (0x2UL) /*!< PORT2 IN: P1 (Bitfield-Mask: 0x01) */ -#define PORT2_IN_P2_Pos (2UL) /*!< PORT2 IN: P2 (Bit 2) */ -#define PORT2_IN_P2_Msk (0x4UL) /*!< PORT2 IN: P2 (Bitfield-Mask: 0x01) */ -#define PORT2_IN_P3_Pos (3UL) /*!< PORT2 IN: P3 (Bit 3) */ -#define PORT2_IN_P3_Msk (0x8UL) /*!< PORT2 IN: P3 (Bitfield-Mask: 0x01) */ -#define PORT2_IN_P4_Pos (4UL) /*!< PORT2 IN: P4 (Bit 4) */ -#define PORT2_IN_P4_Msk (0x10UL) /*!< PORT2 IN: P4 (Bitfield-Mask: 0x01) */ -#define PORT2_IN_P5_Pos (5UL) /*!< PORT2 IN: P5 (Bit 5) */ -#define PORT2_IN_P5_Msk (0x20UL) /*!< PORT2 IN: P5 (Bitfield-Mask: 0x01) */ -#define PORT2_IN_P6_Pos (6UL) /*!< PORT2 IN: P6 (Bit 6) */ -#define PORT2_IN_P6_Msk (0x40UL) /*!< PORT2 IN: P6 (Bitfield-Mask: 0x01) */ -#define PORT2_IN_P7_Pos (7UL) /*!< PORT2 IN: P7 (Bit 7) */ -#define PORT2_IN_P7_Msk (0x80UL) /*!< PORT2 IN: P7 (Bitfield-Mask: 0x01) */ -#define PORT2_IN_P8_Pos (8UL) /*!< PORT2 IN: P8 (Bit 8) */ -#define PORT2_IN_P8_Msk (0x100UL) /*!< PORT2 IN: P8 (Bitfield-Mask: 0x01) */ -#define PORT2_IN_P9_Pos (9UL) /*!< PORT2 IN: P9 (Bit 9) */ -#define PORT2_IN_P9_Msk (0x200UL) /*!< PORT2 IN: P9 (Bitfield-Mask: 0x01) */ -#define PORT2_IN_P10_Pos (10UL) /*!< PORT2 IN: P10 (Bit 10) */ -#define PORT2_IN_P10_Msk (0x400UL) /*!< PORT2 IN: P10 (Bitfield-Mask: 0x01) */ -#define PORT2_IN_P11_Pos (11UL) /*!< PORT2 IN: P11 (Bit 11) */ -#define PORT2_IN_P11_Msk (0x800UL) /*!< PORT2 IN: P11 (Bitfield-Mask: 0x01) */ -#define PORT2_IN_P12_Pos (12UL) /*!< PORT2 IN: P12 (Bit 12) */ -#define PORT2_IN_P12_Msk (0x1000UL) /*!< PORT2 IN: P12 (Bitfield-Mask: 0x01) */ -#define PORT2_IN_P13_Pos (13UL) /*!< PORT2 IN: P13 (Bit 13) */ -#define PORT2_IN_P13_Msk (0x2000UL) /*!< PORT2 IN: P13 (Bitfield-Mask: 0x01) */ -#define PORT2_IN_P14_Pos (14UL) /*!< PORT2 IN: P14 (Bit 14) */ -#define PORT2_IN_P14_Msk (0x4000UL) /*!< PORT2 IN: P14 (Bitfield-Mask: 0x01) */ -#define PORT2_IN_P15_Pos (15UL) /*!< PORT2 IN: P15 (Bit 15) */ -#define PORT2_IN_P15_Msk (0x8000UL) /*!< PORT2 IN: P15 (Bitfield-Mask: 0x01) */ - -/* --------------------------------- PORT2_PDR0 --------------------------------- */ -#define PORT2_PDR0_PD0_Pos (0UL) /*!< PORT2 PDR0: PD0 (Bit 0) */ -#define PORT2_PDR0_PD0_Msk (0x7UL) /*!< PORT2 PDR0: PD0 (Bitfield-Mask: 0x07) */ -#define PORT2_PDR0_PD1_Pos (4UL) /*!< PORT2 PDR0: PD1 (Bit 4) */ -#define PORT2_PDR0_PD1_Msk (0x70UL) /*!< PORT2 PDR0: PD1 (Bitfield-Mask: 0x07) */ -#define PORT2_PDR0_PD2_Pos (8UL) /*!< PORT2 PDR0: PD2 (Bit 8) */ -#define PORT2_PDR0_PD2_Msk (0x700UL) /*!< PORT2 PDR0: PD2 (Bitfield-Mask: 0x07) */ -#define PORT2_PDR0_PD3_Pos (12UL) /*!< PORT2 PDR0: PD3 (Bit 12) */ -#define PORT2_PDR0_PD3_Msk (0x7000UL) /*!< PORT2 PDR0: PD3 (Bitfield-Mask: 0x07) */ -#define PORT2_PDR0_PD4_Pos (16UL) /*!< PORT2 PDR0: PD4 (Bit 16) */ -#define PORT2_PDR0_PD4_Msk (0x70000UL) /*!< PORT2 PDR0: PD4 (Bitfield-Mask: 0x07) */ -#define PORT2_PDR0_PD5_Pos (20UL) /*!< PORT2 PDR0: PD5 (Bit 20) */ -#define PORT2_PDR0_PD5_Msk (0x700000UL) /*!< PORT2 PDR0: PD5 (Bitfield-Mask: 0x07) */ -#define PORT2_PDR0_PD6_Pos (24UL) /*!< PORT2 PDR0: PD6 (Bit 24) */ -#define PORT2_PDR0_PD6_Msk (0x7000000UL) /*!< PORT2 PDR0: PD6 (Bitfield-Mask: 0x07) */ -#define PORT2_PDR0_PD7_Pos (28UL) /*!< PORT2 PDR0: PD7 (Bit 28) */ -#define PORT2_PDR0_PD7_Msk (0x70000000UL) /*!< PORT2 PDR0: PD7 (Bitfield-Mask: 0x07) */ - -/* --------------------------------- PORT2_PDR1 --------------------------------- */ -#define PORT2_PDR1_PD8_Pos (0UL) /*!< PORT2 PDR1: PD8 (Bit 0) */ -#define PORT2_PDR1_PD8_Msk (0x7UL) /*!< PORT2 PDR1: PD8 (Bitfield-Mask: 0x07) */ -#define PORT2_PDR1_PD9_Pos (4UL) /*!< PORT2 PDR1: PD9 (Bit 4) */ -#define PORT2_PDR1_PD9_Msk (0x70UL) /*!< PORT2 PDR1: PD9 (Bitfield-Mask: 0x07) */ -#define PORT2_PDR1_PD10_Pos (8UL) /*!< PORT2 PDR1: PD10 (Bit 8) */ -#define PORT2_PDR1_PD10_Msk (0x700UL) /*!< PORT2 PDR1: PD10 (Bitfield-Mask: 0x07) */ -#define PORT2_PDR1_PD11_Pos (12UL) /*!< PORT2 PDR1: PD11 (Bit 12) */ -#define PORT2_PDR1_PD11_Msk (0x7000UL) /*!< PORT2 PDR1: PD11 (Bitfield-Mask: 0x07) */ -#define PORT2_PDR1_PD12_Pos (16UL) /*!< PORT2 PDR1: PD12 (Bit 16) */ -#define PORT2_PDR1_PD12_Msk (0x70000UL) /*!< PORT2 PDR1: PD12 (Bitfield-Mask: 0x07) */ -#define PORT2_PDR1_PD13_Pos (20UL) /*!< PORT2 PDR1: PD13 (Bit 20) */ -#define PORT2_PDR1_PD13_Msk (0x700000UL) /*!< PORT2 PDR1: PD13 (Bitfield-Mask: 0x07) */ -#define PORT2_PDR1_PD14_Pos (24UL) /*!< PORT2 PDR1: PD14 (Bit 24) */ -#define PORT2_PDR1_PD14_Msk (0x7000000UL) /*!< PORT2 PDR1: PD14 (Bitfield-Mask: 0x07) */ -#define PORT2_PDR1_PD15_Pos (28UL) /*!< PORT2 PDR1: PD15 (Bit 28) */ -#define PORT2_PDR1_PD15_Msk (0x70000000UL) /*!< PORT2 PDR1: PD15 (Bitfield-Mask: 0x07) */ - -/* --------------------------------- PORT2_PDISC -------------------------------- */ -#define PORT2_PDISC_PDIS0_Pos (0UL) /*!< PORT2 PDISC: PDIS0 (Bit 0) */ -#define PORT2_PDISC_PDIS0_Msk (0x1UL) /*!< PORT2 PDISC: PDIS0 (Bitfield-Mask: 0x01) */ -#define PORT2_PDISC_PDIS1_Pos (1UL) /*!< PORT2 PDISC: PDIS1 (Bit 1) */ -#define PORT2_PDISC_PDIS1_Msk (0x2UL) /*!< PORT2 PDISC: PDIS1 (Bitfield-Mask: 0x01) */ -#define PORT2_PDISC_PDIS2_Pos (2UL) /*!< PORT2 PDISC: PDIS2 (Bit 2) */ -#define PORT2_PDISC_PDIS2_Msk (0x4UL) /*!< PORT2 PDISC: PDIS2 (Bitfield-Mask: 0x01) */ -#define PORT2_PDISC_PDIS3_Pos (3UL) /*!< PORT2 PDISC: PDIS3 (Bit 3) */ -#define PORT2_PDISC_PDIS3_Msk (0x8UL) /*!< PORT2 PDISC: PDIS3 (Bitfield-Mask: 0x01) */ -#define PORT2_PDISC_PDIS4_Pos (4UL) /*!< PORT2 PDISC: PDIS4 (Bit 4) */ -#define PORT2_PDISC_PDIS4_Msk (0x10UL) /*!< PORT2 PDISC: PDIS4 (Bitfield-Mask: 0x01) */ -#define PORT2_PDISC_PDIS5_Pos (5UL) /*!< PORT2 PDISC: PDIS5 (Bit 5) */ -#define PORT2_PDISC_PDIS5_Msk (0x20UL) /*!< PORT2 PDISC: PDIS5 (Bitfield-Mask: 0x01) */ -#define PORT2_PDISC_PDIS6_Pos (6UL) /*!< PORT2 PDISC: PDIS6 (Bit 6) */ -#define PORT2_PDISC_PDIS6_Msk (0x40UL) /*!< PORT2 PDISC: PDIS6 (Bitfield-Mask: 0x01) */ -#define PORT2_PDISC_PDIS7_Pos (7UL) /*!< PORT2 PDISC: PDIS7 (Bit 7) */ -#define PORT2_PDISC_PDIS7_Msk (0x80UL) /*!< PORT2 PDISC: PDIS7 (Bitfield-Mask: 0x01) */ -#define PORT2_PDISC_PDIS8_Pos (8UL) /*!< PORT2 PDISC: PDIS8 (Bit 8) */ -#define PORT2_PDISC_PDIS8_Msk (0x100UL) /*!< PORT2 PDISC: PDIS8 (Bitfield-Mask: 0x01) */ -#define PORT2_PDISC_PDIS9_Pos (9UL) /*!< PORT2 PDISC: PDIS9 (Bit 9) */ -#define PORT2_PDISC_PDIS9_Msk (0x200UL) /*!< PORT2 PDISC: PDIS9 (Bitfield-Mask: 0x01) */ -#define PORT2_PDISC_PDIS10_Pos (10UL) /*!< PORT2 PDISC: PDIS10 (Bit 10) */ -#define PORT2_PDISC_PDIS10_Msk (0x400UL) /*!< PORT2 PDISC: PDIS10 (Bitfield-Mask: 0x01) */ -#define PORT2_PDISC_PDIS11_Pos (11UL) /*!< PORT2 PDISC: PDIS11 (Bit 11) */ -#define PORT2_PDISC_PDIS11_Msk (0x800UL) /*!< PORT2 PDISC: PDIS11 (Bitfield-Mask: 0x01) */ -#define PORT2_PDISC_PDIS12_Pos (12UL) /*!< PORT2 PDISC: PDIS12 (Bit 12) */ -#define PORT2_PDISC_PDIS12_Msk (0x1000UL) /*!< PORT2 PDISC: PDIS12 (Bitfield-Mask: 0x01) */ -#define PORT2_PDISC_PDIS13_Pos (13UL) /*!< PORT2 PDISC: PDIS13 (Bit 13) */ -#define PORT2_PDISC_PDIS13_Msk (0x2000UL) /*!< PORT2 PDISC: PDIS13 (Bitfield-Mask: 0x01) */ -#define PORT2_PDISC_PDIS14_Pos (14UL) /*!< PORT2 PDISC: PDIS14 (Bit 14) */ -#define PORT2_PDISC_PDIS14_Msk (0x4000UL) /*!< PORT2 PDISC: PDIS14 (Bitfield-Mask: 0x01) */ -#define PORT2_PDISC_PDIS15_Pos (15UL) /*!< PORT2 PDISC: PDIS15 (Bit 15) */ -#define PORT2_PDISC_PDIS15_Msk (0x8000UL) /*!< PORT2 PDISC: PDIS15 (Bitfield-Mask: 0x01) */ - -/* ---------------------------------- PORT2_PPS --------------------------------- */ -#define PORT2_PPS_PPS0_Pos (0UL) /*!< PORT2 PPS: PPS0 (Bit 0) */ -#define PORT2_PPS_PPS0_Msk (0x1UL) /*!< PORT2 PPS: PPS0 (Bitfield-Mask: 0x01) */ -#define PORT2_PPS_PPS1_Pos (1UL) /*!< PORT2 PPS: PPS1 (Bit 1) */ -#define PORT2_PPS_PPS1_Msk (0x2UL) /*!< PORT2 PPS: PPS1 (Bitfield-Mask: 0x01) */ -#define PORT2_PPS_PPS2_Pos (2UL) /*!< PORT2 PPS: PPS2 (Bit 2) */ -#define PORT2_PPS_PPS2_Msk (0x4UL) /*!< PORT2 PPS: PPS2 (Bitfield-Mask: 0x01) */ -#define PORT2_PPS_PPS3_Pos (3UL) /*!< PORT2 PPS: PPS3 (Bit 3) */ -#define PORT2_PPS_PPS3_Msk (0x8UL) /*!< PORT2 PPS: PPS3 (Bitfield-Mask: 0x01) */ -#define PORT2_PPS_PPS4_Pos (4UL) /*!< PORT2 PPS: PPS4 (Bit 4) */ -#define PORT2_PPS_PPS4_Msk (0x10UL) /*!< PORT2 PPS: PPS4 (Bitfield-Mask: 0x01) */ -#define PORT2_PPS_PPS5_Pos (5UL) /*!< PORT2 PPS: PPS5 (Bit 5) */ -#define PORT2_PPS_PPS5_Msk (0x20UL) /*!< PORT2 PPS: PPS5 (Bitfield-Mask: 0x01) */ -#define PORT2_PPS_PPS6_Pos (6UL) /*!< PORT2 PPS: PPS6 (Bit 6) */ -#define PORT2_PPS_PPS6_Msk (0x40UL) /*!< PORT2 PPS: PPS6 (Bitfield-Mask: 0x01) */ -#define PORT2_PPS_PPS7_Pos (7UL) /*!< PORT2 PPS: PPS7 (Bit 7) */ -#define PORT2_PPS_PPS7_Msk (0x80UL) /*!< PORT2 PPS: PPS7 (Bitfield-Mask: 0x01) */ -#define PORT2_PPS_PPS8_Pos (8UL) /*!< PORT2 PPS: PPS8 (Bit 8) */ -#define PORT2_PPS_PPS8_Msk (0x100UL) /*!< PORT2 PPS: PPS8 (Bitfield-Mask: 0x01) */ -#define PORT2_PPS_PPS9_Pos (9UL) /*!< PORT2 PPS: PPS9 (Bit 9) */ -#define PORT2_PPS_PPS9_Msk (0x200UL) /*!< PORT2 PPS: PPS9 (Bitfield-Mask: 0x01) */ -#define PORT2_PPS_PPS10_Pos (10UL) /*!< PORT2 PPS: PPS10 (Bit 10) */ -#define PORT2_PPS_PPS10_Msk (0x400UL) /*!< PORT2 PPS: PPS10 (Bitfield-Mask: 0x01) */ -#define PORT2_PPS_PPS11_Pos (11UL) /*!< PORT2 PPS: PPS11 (Bit 11) */ -#define PORT2_PPS_PPS11_Msk (0x800UL) /*!< PORT2 PPS: PPS11 (Bitfield-Mask: 0x01) */ -#define PORT2_PPS_PPS12_Pos (12UL) /*!< PORT2 PPS: PPS12 (Bit 12) */ -#define PORT2_PPS_PPS12_Msk (0x1000UL) /*!< PORT2 PPS: PPS12 (Bitfield-Mask: 0x01) */ -#define PORT2_PPS_PPS13_Pos (13UL) /*!< PORT2 PPS: PPS13 (Bit 13) */ -#define PORT2_PPS_PPS13_Msk (0x2000UL) /*!< PORT2 PPS: PPS13 (Bitfield-Mask: 0x01) */ -#define PORT2_PPS_PPS14_Pos (14UL) /*!< PORT2 PPS: PPS14 (Bit 14) */ -#define PORT2_PPS_PPS14_Msk (0x4000UL) /*!< PORT2 PPS: PPS14 (Bitfield-Mask: 0x01) */ -#define PORT2_PPS_PPS15_Pos (15UL) /*!< PORT2 PPS: PPS15 (Bit 15) */ -#define PORT2_PPS_PPS15_Msk (0x8000UL) /*!< PORT2 PPS: PPS15 (Bitfield-Mask: 0x01) */ - -/* --------------------------------- PORT2_HWSEL -------------------------------- */ -#define PORT2_HWSEL_HW0_Pos (0UL) /*!< PORT2 HWSEL: HW0 (Bit 0) */ -#define PORT2_HWSEL_HW0_Msk (0x3UL) /*!< PORT2 HWSEL: HW0 (Bitfield-Mask: 0x03) */ -#define PORT2_HWSEL_HW1_Pos (2UL) /*!< PORT2 HWSEL: HW1 (Bit 2) */ -#define PORT2_HWSEL_HW1_Msk (0xcUL) /*!< PORT2 HWSEL: HW1 (Bitfield-Mask: 0x03) */ -#define PORT2_HWSEL_HW2_Pos (4UL) /*!< PORT2 HWSEL: HW2 (Bit 4) */ -#define PORT2_HWSEL_HW2_Msk (0x30UL) /*!< PORT2 HWSEL: HW2 (Bitfield-Mask: 0x03) */ -#define PORT2_HWSEL_HW3_Pos (6UL) /*!< PORT2 HWSEL: HW3 (Bit 6) */ -#define PORT2_HWSEL_HW3_Msk (0xc0UL) /*!< PORT2 HWSEL: HW3 (Bitfield-Mask: 0x03) */ -#define PORT2_HWSEL_HW4_Pos (8UL) /*!< PORT2 HWSEL: HW4 (Bit 8) */ -#define PORT2_HWSEL_HW4_Msk (0x300UL) /*!< PORT2 HWSEL: HW4 (Bitfield-Mask: 0x03) */ -#define PORT2_HWSEL_HW5_Pos (10UL) /*!< PORT2 HWSEL: HW5 (Bit 10) */ -#define PORT2_HWSEL_HW5_Msk (0xc00UL) /*!< PORT2 HWSEL: HW5 (Bitfield-Mask: 0x03) */ -#define PORT2_HWSEL_HW6_Pos (12UL) /*!< PORT2 HWSEL: HW6 (Bit 12) */ -#define PORT2_HWSEL_HW6_Msk (0x3000UL) /*!< PORT2 HWSEL: HW6 (Bitfield-Mask: 0x03) */ -#define PORT2_HWSEL_HW7_Pos (14UL) /*!< PORT2 HWSEL: HW7 (Bit 14) */ -#define PORT2_HWSEL_HW7_Msk (0xc000UL) /*!< PORT2 HWSEL: HW7 (Bitfield-Mask: 0x03) */ -#define PORT2_HWSEL_HW8_Pos (16UL) /*!< PORT2 HWSEL: HW8 (Bit 16) */ -#define PORT2_HWSEL_HW8_Msk (0x30000UL) /*!< PORT2 HWSEL: HW8 (Bitfield-Mask: 0x03) */ -#define PORT2_HWSEL_HW9_Pos (18UL) /*!< PORT2 HWSEL: HW9 (Bit 18) */ -#define PORT2_HWSEL_HW9_Msk (0xc0000UL) /*!< PORT2 HWSEL: HW9 (Bitfield-Mask: 0x03) */ -#define PORT2_HWSEL_HW10_Pos (20UL) /*!< PORT2 HWSEL: HW10 (Bit 20) */ -#define PORT2_HWSEL_HW10_Msk (0x300000UL) /*!< PORT2 HWSEL: HW10 (Bitfield-Mask: 0x03) */ -#define PORT2_HWSEL_HW11_Pos (22UL) /*!< PORT2 HWSEL: HW11 (Bit 22) */ -#define PORT2_HWSEL_HW11_Msk (0xc00000UL) /*!< PORT2 HWSEL: HW11 (Bitfield-Mask: 0x03) */ -#define PORT2_HWSEL_HW12_Pos (24UL) /*!< PORT2 HWSEL: HW12 (Bit 24) */ -#define PORT2_HWSEL_HW12_Msk (0x3000000UL) /*!< PORT2 HWSEL: HW12 (Bitfield-Mask: 0x03) */ -#define PORT2_HWSEL_HW13_Pos (26UL) /*!< PORT2 HWSEL: HW13 (Bit 26) */ -#define PORT2_HWSEL_HW13_Msk (0xc000000UL) /*!< PORT2 HWSEL: HW13 (Bitfield-Mask: 0x03) */ -#define PORT2_HWSEL_HW14_Pos (28UL) /*!< PORT2 HWSEL: HW14 (Bit 28) */ -#define PORT2_HWSEL_HW14_Msk (0x30000000UL) /*!< PORT2 HWSEL: HW14 (Bitfield-Mask: 0x03) */ -#define PORT2_HWSEL_HW15_Pos (30UL) /*!< PORT2 HWSEL: HW15 (Bit 30) */ -#define PORT2_HWSEL_HW15_Msk (0xc0000000UL) /*!< PORT2 HWSEL: HW15 (Bitfield-Mask: 0x03) */ - - -/* ================================================================================ */ -/* ================ struct 'PORT3' Position & Mask ================ */ -/* ================================================================================ */ - - -/* ---------------------------------- PORT3_OUT --------------------------------- */ -#define PORT3_OUT_P0_Pos (0UL) /*!< PORT3 OUT: P0 (Bit 0) */ -#define PORT3_OUT_P0_Msk (0x1UL) /*!< PORT3 OUT: P0 (Bitfield-Mask: 0x01) */ -#define PORT3_OUT_P1_Pos (1UL) /*!< PORT3 OUT: P1 (Bit 1) */ -#define PORT3_OUT_P1_Msk (0x2UL) /*!< PORT3 OUT: P1 (Bitfield-Mask: 0x01) */ -#define PORT3_OUT_P2_Pos (2UL) /*!< PORT3 OUT: P2 (Bit 2) */ -#define PORT3_OUT_P2_Msk (0x4UL) /*!< PORT3 OUT: P2 (Bitfield-Mask: 0x01) */ -#define PORT3_OUT_P3_Pos (3UL) /*!< PORT3 OUT: P3 (Bit 3) */ -#define PORT3_OUT_P3_Msk (0x8UL) /*!< PORT3 OUT: P3 (Bitfield-Mask: 0x01) */ -#define PORT3_OUT_P4_Pos (4UL) /*!< PORT3 OUT: P4 (Bit 4) */ -#define PORT3_OUT_P4_Msk (0x10UL) /*!< PORT3 OUT: P4 (Bitfield-Mask: 0x01) */ -#define PORT3_OUT_P5_Pos (5UL) /*!< PORT3 OUT: P5 (Bit 5) */ -#define PORT3_OUT_P5_Msk (0x20UL) /*!< PORT3 OUT: P5 (Bitfield-Mask: 0x01) */ -#define PORT3_OUT_P6_Pos (6UL) /*!< PORT3 OUT: P6 (Bit 6) */ -#define PORT3_OUT_P6_Msk (0x40UL) /*!< PORT3 OUT: P6 (Bitfield-Mask: 0x01) */ -#define PORT3_OUT_P7_Pos (7UL) /*!< PORT3 OUT: P7 (Bit 7) */ -#define PORT3_OUT_P7_Msk (0x80UL) /*!< PORT3 OUT: P7 (Bitfield-Mask: 0x01) */ -#define PORT3_OUT_P8_Pos (8UL) /*!< PORT3 OUT: P8 (Bit 8) */ -#define PORT3_OUT_P8_Msk (0x100UL) /*!< PORT3 OUT: P8 (Bitfield-Mask: 0x01) */ -#define PORT3_OUT_P9_Pos (9UL) /*!< PORT3 OUT: P9 (Bit 9) */ -#define PORT3_OUT_P9_Msk (0x200UL) /*!< PORT3 OUT: P9 (Bitfield-Mask: 0x01) */ -#define PORT3_OUT_P10_Pos (10UL) /*!< PORT3 OUT: P10 (Bit 10) */ -#define PORT3_OUT_P10_Msk (0x400UL) /*!< PORT3 OUT: P10 (Bitfield-Mask: 0x01) */ -#define PORT3_OUT_P11_Pos (11UL) /*!< PORT3 OUT: P11 (Bit 11) */ -#define PORT3_OUT_P11_Msk (0x800UL) /*!< PORT3 OUT: P11 (Bitfield-Mask: 0x01) */ -#define PORT3_OUT_P12_Pos (12UL) /*!< PORT3 OUT: P12 (Bit 12) */ -#define PORT3_OUT_P12_Msk (0x1000UL) /*!< PORT3 OUT: P12 (Bitfield-Mask: 0x01) */ -#define PORT3_OUT_P13_Pos (13UL) /*!< PORT3 OUT: P13 (Bit 13) */ -#define PORT3_OUT_P13_Msk (0x2000UL) /*!< PORT3 OUT: P13 (Bitfield-Mask: 0x01) */ -#define PORT3_OUT_P14_Pos (14UL) /*!< PORT3 OUT: P14 (Bit 14) */ -#define PORT3_OUT_P14_Msk (0x4000UL) /*!< PORT3 OUT: P14 (Bitfield-Mask: 0x01) */ -#define PORT3_OUT_P15_Pos (15UL) /*!< PORT3 OUT: P15 (Bit 15) */ -#define PORT3_OUT_P15_Msk (0x8000UL) /*!< PORT3 OUT: P15 (Bitfield-Mask: 0x01) */ - -/* ---------------------------------- PORT3_OMR --------------------------------- */ -#define PORT3_OMR_PS0_Pos (0UL) /*!< PORT3 OMR: PS0 (Bit 0) */ -#define PORT3_OMR_PS0_Msk (0x1UL) /*!< PORT3 OMR: PS0 (Bitfield-Mask: 0x01) */ -#define PORT3_OMR_PS1_Pos (1UL) /*!< PORT3 OMR: PS1 (Bit 1) */ -#define PORT3_OMR_PS1_Msk (0x2UL) /*!< PORT3 OMR: PS1 (Bitfield-Mask: 0x01) */ -#define PORT3_OMR_PS2_Pos (2UL) /*!< PORT3 OMR: PS2 (Bit 2) */ -#define PORT3_OMR_PS2_Msk (0x4UL) /*!< PORT3 OMR: PS2 (Bitfield-Mask: 0x01) */ -#define PORT3_OMR_PS3_Pos (3UL) /*!< PORT3 OMR: PS3 (Bit 3) */ -#define PORT3_OMR_PS3_Msk (0x8UL) /*!< PORT3 OMR: PS3 (Bitfield-Mask: 0x01) */ -#define PORT3_OMR_PS4_Pos (4UL) /*!< PORT3 OMR: PS4 (Bit 4) */ -#define PORT3_OMR_PS4_Msk (0x10UL) /*!< PORT3 OMR: PS4 (Bitfield-Mask: 0x01) */ -#define PORT3_OMR_PS5_Pos (5UL) /*!< PORT3 OMR: PS5 (Bit 5) */ -#define PORT3_OMR_PS5_Msk (0x20UL) /*!< PORT3 OMR: PS5 (Bitfield-Mask: 0x01) */ -#define PORT3_OMR_PS6_Pos (6UL) /*!< PORT3 OMR: PS6 (Bit 6) */ -#define PORT3_OMR_PS6_Msk (0x40UL) /*!< PORT3 OMR: PS6 (Bitfield-Mask: 0x01) */ -#define PORT3_OMR_PS7_Pos (7UL) /*!< PORT3 OMR: PS7 (Bit 7) */ -#define PORT3_OMR_PS7_Msk (0x80UL) /*!< PORT3 OMR: PS7 (Bitfield-Mask: 0x01) */ -#define PORT3_OMR_PS8_Pos (8UL) /*!< PORT3 OMR: PS8 (Bit 8) */ -#define PORT3_OMR_PS8_Msk (0x100UL) /*!< PORT3 OMR: PS8 (Bitfield-Mask: 0x01) */ -#define PORT3_OMR_PS9_Pos (9UL) /*!< PORT3 OMR: PS9 (Bit 9) */ -#define PORT3_OMR_PS9_Msk (0x200UL) /*!< PORT3 OMR: PS9 (Bitfield-Mask: 0x01) */ -#define PORT3_OMR_PS10_Pos (10UL) /*!< PORT3 OMR: PS10 (Bit 10) */ -#define PORT3_OMR_PS10_Msk (0x400UL) /*!< PORT3 OMR: PS10 (Bitfield-Mask: 0x01) */ -#define PORT3_OMR_PS11_Pos (11UL) /*!< PORT3 OMR: PS11 (Bit 11) */ -#define PORT3_OMR_PS11_Msk (0x800UL) /*!< PORT3 OMR: PS11 (Bitfield-Mask: 0x01) */ -#define PORT3_OMR_PS12_Pos (12UL) /*!< PORT3 OMR: PS12 (Bit 12) */ -#define PORT3_OMR_PS12_Msk (0x1000UL) /*!< PORT3 OMR: PS12 (Bitfield-Mask: 0x01) */ -#define PORT3_OMR_PS13_Pos (13UL) /*!< PORT3 OMR: PS13 (Bit 13) */ -#define PORT3_OMR_PS13_Msk (0x2000UL) /*!< PORT3 OMR: PS13 (Bitfield-Mask: 0x01) */ -#define PORT3_OMR_PS14_Pos (14UL) /*!< PORT3 OMR: PS14 (Bit 14) */ -#define PORT3_OMR_PS14_Msk (0x4000UL) /*!< PORT3 OMR: PS14 (Bitfield-Mask: 0x01) */ -#define PORT3_OMR_PS15_Pos (15UL) /*!< PORT3 OMR: PS15 (Bit 15) */ -#define PORT3_OMR_PS15_Msk (0x8000UL) /*!< PORT3 OMR: PS15 (Bitfield-Mask: 0x01) */ -#define PORT3_OMR_PR0_Pos (16UL) /*!< PORT3 OMR: PR0 (Bit 16) */ -#define PORT3_OMR_PR0_Msk (0x10000UL) /*!< PORT3 OMR: PR0 (Bitfield-Mask: 0x01) */ -#define PORT3_OMR_PR1_Pos (17UL) /*!< PORT3 OMR: PR1 (Bit 17) */ -#define PORT3_OMR_PR1_Msk (0x20000UL) /*!< PORT3 OMR: PR1 (Bitfield-Mask: 0x01) */ -#define PORT3_OMR_PR2_Pos (18UL) /*!< PORT3 OMR: PR2 (Bit 18) */ -#define PORT3_OMR_PR2_Msk (0x40000UL) /*!< PORT3 OMR: PR2 (Bitfield-Mask: 0x01) */ -#define PORT3_OMR_PR3_Pos (19UL) /*!< PORT3 OMR: PR3 (Bit 19) */ -#define PORT3_OMR_PR3_Msk (0x80000UL) /*!< PORT3 OMR: PR3 (Bitfield-Mask: 0x01) */ -#define PORT3_OMR_PR4_Pos (20UL) /*!< PORT3 OMR: PR4 (Bit 20) */ -#define PORT3_OMR_PR4_Msk (0x100000UL) /*!< PORT3 OMR: PR4 (Bitfield-Mask: 0x01) */ -#define PORT3_OMR_PR5_Pos (21UL) /*!< PORT3 OMR: PR5 (Bit 21) */ -#define PORT3_OMR_PR5_Msk (0x200000UL) /*!< PORT3 OMR: PR5 (Bitfield-Mask: 0x01) */ -#define PORT3_OMR_PR6_Pos (22UL) /*!< PORT3 OMR: PR6 (Bit 22) */ -#define PORT3_OMR_PR6_Msk (0x400000UL) /*!< PORT3 OMR: PR6 (Bitfield-Mask: 0x01) */ -#define PORT3_OMR_PR7_Pos (23UL) /*!< PORT3 OMR: PR7 (Bit 23) */ -#define PORT3_OMR_PR7_Msk (0x800000UL) /*!< PORT3 OMR: PR7 (Bitfield-Mask: 0x01) */ -#define PORT3_OMR_PR8_Pos (24UL) /*!< PORT3 OMR: PR8 (Bit 24) */ -#define PORT3_OMR_PR8_Msk (0x1000000UL) /*!< PORT3 OMR: PR8 (Bitfield-Mask: 0x01) */ -#define PORT3_OMR_PR9_Pos (25UL) /*!< PORT3 OMR: PR9 (Bit 25) */ -#define PORT3_OMR_PR9_Msk (0x2000000UL) /*!< PORT3 OMR: PR9 (Bitfield-Mask: 0x01) */ -#define PORT3_OMR_PR10_Pos (26UL) /*!< PORT3 OMR: PR10 (Bit 26) */ -#define PORT3_OMR_PR10_Msk (0x4000000UL) /*!< PORT3 OMR: PR10 (Bitfield-Mask: 0x01) */ -#define PORT3_OMR_PR11_Pos (27UL) /*!< PORT3 OMR: PR11 (Bit 27) */ -#define PORT3_OMR_PR11_Msk (0x8000000UL) /*!< PORT3 OMR: PR11 (Bitfield-Mask: 0x01) */ -#define PORT3_OMR_PR12_Pos (28UL) /*!< PORT3 OMR: PR12 (Bit 28) */ -#define PORT3_OMR_PR12_Msk (0x10000000UL) /*!< PORT3 OMR: PR12 (Bitfield-Mask: 0x01) */ -#define PORT3_OMR_PR13_Pos (29UL) /*!< PORT3 OMR: PR13 (Bit 29) */ -#define PORT3_OMR_PR13_Msk (0x20000000UL) /*!< PORT3 OMR: PR13 (Bitfield-Mask: 0x01) */ -#define PORT3_OMR_PR14_Pos (30UL) /*!< PORT3 OMR: PR14 (Bit 30) */ -#define PORT3_OMR_PR14_Msk (0x40000000UL) /*!< PORT3 OMR: PR14 (Bitfield-Mask: 0x01) */ -#define PORT3_OMR_PR15_Pos (31UL) /*!< PORT3 OMR: PR15 (Bit 31) */ -#define PORT3_OMR_PR15_Msk (0x80000000UL) /*!< PORT3 OMR: PR15 (Bitfield-Mask: 0x01) */ - -/* --------------------------------- PORT3_IOCR0 -------------------------------- */ -#define PORT3_IOCR0_PC0_Pos (3UL) /*!< PORT3 IOCR0: PC0 (Bit 3) */ -#define PORT3_IOCR0_PC0_Msk (0xf8UL) /*!< PORT3 IOCR0: PC0 (Bitfield-Mask: 0x1f) */ -#define PORT3_IOCR0_PC1_Pos (11UL) /*!< PORT3 IOCR0: PC1 (Bit 11) */ -#define PORT3_IOCR0_PC1_Msk (0xf800UL) /*!< PORT3 IOCR0: PC1 (Bitfield-Mask: 0x1f) */ -#define PORT3_IOCR0_PC2_Pos (19UL) /*!< PORT3 IOCR0: PC2 (Bit 19) */ -#define PORT3_IOCR0_PC2_Msk (0xf80000UL) /*!< PORT3 IOCR0: PC2 (Bitfield-Mask: 0x1f) */ -#define PORT3_IOCR0_PC3_Pos (27UL) /*!< PORT3 IOCR0: PC3 (Bit 27) */ -#define PORT3_IOCR0_PC3_Msk (0xf8000000UL) /*!< PORT3 IOCR0: PC3 (Bitfield-Mask: 0x1f) */ - -/* --------------------------------- PORT3_IOCR4 -------------------------------- */ -#define PORT3_IOCR4_PC4_Pos (3UL) /*!< PORT3 IOCR4: PC4 (Bit 3) */ -#define PORT3_IOCR4_PC4_Msk (0xf8UL) /*!< PORT3 IOCR4: PC4 (Bitfield-Mask: 0x1f) */ -#define PORT3_IOCR4_PC5_Pos (11UL) /*!< PORT3 IOCR4: PC5 (Bit 11) */ -#define PORT3_IOCR4_PC5_Msk (0xf800UL) /*!< PORT3 IOCR4: PC5 (Bitfield-Mask: 0x1f) */ -#define PORT3_IOCR4_PC6_Pos (19UL) /*!< PORT3 IOCR4: PC6 (Bit 19) */ -#define PORT3_IOCR4_PC6_Msk (0xf80000UL) /*!< PORT3 IOCR4: PC6 (Bitfield-Mask: 0x1f) */ -#define PORT3_IOCR4_PC7_Pos (27UL) /*!< PORT3 IOCR4: PC7 (Bit 27) */ -#define PORT3_IOCR4_PC7_Msk (0xf8000000UL) /*!< PORT3 IOCR4: PC7 (Bitfield-Mask: 0x1f) */ - -/* --------------------------------- PORT3_IOCR8 -------------------------------- */ -#define PORT3_IOCR8_PC8_Pos (3UL) /*!< PORT3 IOCR8: PC8 (Bit 3) */ -#define PORT3_IOCR8_PC8_Msk (0xf8UL) /*!< PORT3 IOCR8: PC8 (Bitfield-Mask: 0x1f) */ -#define PORT3_IOCR8_PC9_Pos (11UL) /*!< PORT3 IOCR8: PC9 (Bit 11) */ -#define PORT3_IOCR8_PC9_Msk (0xf800UL) /*!< PORT3 IOCR8: PC9 (Bitfield-Mask: 0x1f) */ -#define PORT3_IOCR8_PC10_Pos (19UL) /*!< PORT3 IOCR8: PC10 (Bit 19) */ -#define PORT3_IOCR8_PC10_Msk (0xf80000UL) /*!< PORT3 IOCR8: PC10 (Bitfield-Mask: 0x1f) */ -#define PORT3_IOCR8_PC11_Pos (27UL) /*!< PORT3 IOCR8: PC11 (Bit 27) */ -#define PORT3_IOCR8_PC11_Msk (0xf8000000UL) /*!< PORT3 IOCR8: PC11 (Bitfield-Mask: 0x1f) */ - -/* -------------------------------- PORT3_IOCR12 -------------------------------- */ -#define PORT3_IOCR12_PC12_Pos (3UL) /*!< PORT3 IOCR12: PC12 (Bit 3) */ -#define PORT3_IOCR12_PC12_Msk (0xf8UL) /*!< PORT3 IOCR12: PC12 (Bitfield-Mask: 0x1f) */ -#define PORT3_IOCR12_PC13_Pos (11UL) /*!< PORT3 IOCR12: PC13 (Bit 11) */ -#define PORT3_IOCR12_PC13_Msk (0xf800UL) /*!< PORT3 IOCR12: PC13 (Bitfield-Mask: 0x1f) */ -#define PORT3_IOCR12_PC14_Pos (19UL) /*!< PORT3 IOCR12: PC14 (Bit 19) */ -#define PORT3_IOCR12_PC14_Msk (0xf80000UL) /*!< PORT3 IOCR12: PC14 (Bitfield-Mask: 0x1f) */ -#define PORT3_IOCR12_PC15_Pos (27UL) /*!< PORT3 IOCR12: PC15 (Bit 27) */ -#define PORT3_IOCR12_PC15_Msk (0xf8000000UL) /*!< PORT3 IOCR12: PC15 (Bitfield-Mask: 0x1f) */ - -/* ---------------------------------- PORT3_IN ---------------------------------- */ -#define PORT3_IN_P0_Pos (0UL) /*!< PORT3 IN: P0 (Bit 0) */ -#define PORT3_IN_P0_Msk (0x1UL) /*!< PORT3 IN: P0 (Bitfield-Mask: 0x01) */ -#define PORT3_IN_P1_Pos (1UL) /*!< PORT3 IN: P1 (Bit 1) */ -#define PORT3_IN_P1_Msk (0x2UL) /*!< PORT3 IN: P1 (Bitfield-Mask: 0x01) */ -#define PORT3_IN_P2_Pos (2UL) /*!< PORT3 IN: P2 (Bit 2) */ -#define PORT3_IN_P2_Msk (0x4UL) /*!< PORT3 IN: P2 (Bitfield-Mask: 0x01) */ -#define PORT3_IN_P3_Pos (3UL) /*!< PORT3 IN: P3 (Bit 3) */ -#define PORT3_IN_P3_Msk (0x8UL) /*!< PORT3 IN: P3 (Bitfield-Mask: 0x01) */ -#define PORT3_IN_P4_Pos (4UL) /*!< PORT3 IN: P4 (Bit 4) */ -#define PORT3_IN_P4_Msk (0x10UL) /*!< PORT3 IN: P4 (Bitfield-Mask: 0x01) */ -#define PORT3_IN_P5_Pos (5UL) /*!< PORT3 IN: P5 (Bit 5) */ -#define PORT3_IN_P5_Msk (0x20UL) /*!< PORT3 IN: P5 (Bitfield-Mask: 0x01) */ -#define PORT3_IN_P6_Pos (6UL) /*!< PORT3 IN: P6 (Bit 6) */ -#define PORT3_IN_P6_Msk (0x40UL) /*!< PORT3 IN: P6 (Bitfield-Mask: 0x01) */ -#define PORT3_IN_P7_Pos (7UL) /*!< PORT3 IN: P7 (Bit 7) */ -#define PORT3_IN_P7_Msk (0x80UL) /*!< PORT3 IN: P7 (Bitfield-Mask: 0x01) */ -#define PORT3_IN_P8_Pos (8UL) /*!< PORT3 IN: P8 (Bit 8) */ -#define PORT3_IN_P8_Msk (0x100UL) /*!< PORT3 IN: P8 (Bitfield-Mask: 0x01) */ -#define PORT3_IN_P9_Pos (9UL) /*!< PORT3 IN: P9 (Bit 9) */ -#define PORT3_IN_P9_Msk (0x200UL) /*!< PORT3 IN: P9 (Bitfield-Mask: 0x01) */ -#define PORT3_IN_P10_Pos (10UL) /*!< PORT3 IN: P10 (Bit 10) */ -#define PORT3_IN_P10_Msk (0x400UL) /*!< PORT3 IN: P10 (Bitfield-Mask: 0x01) */ -#define PORT3_IN_P11_Pos (11UL) /*!< PORT3 IN: P11 (Bit 11) */ -#define PORT3_IN_P11_Msk (0x800UL) /*!< PORT3 IN: P11 (Bitfield-Mask: 0x01) */ -#define PORT3_IN_P12_Pos (12UL) /*!< PORT3 IN: P12 (Bit 12) */ -#define PORT3_IN_P12_Msk (0x1000UL) /*!< PORT3 IN: P12 (Bitfield-Mask: 0x01) */ -#define PORT3_IN_P13_Pos (13UL) /*!< PORT3 IN: P13 (Bit 13) */ -#define PORT3_IN_P13_Msk (0x2000UL) /*!< PORT3 IN: P13 (Bitfield-Mask: 0x01) */ -#define PORT3_IN_P14_Pos (14UL) /*!< PORT3 IN: P14 (Bit 14) */ -#define PORT3_IN_P14_Msk (0x4000UL) /*!< PORT3 IN: P14 (Bitfield-Mask: 0x01) */ -#define PORT3_IN_P15_Pos (15UL) /*!< PORT3 IN: P15 (Bit 15) */ -#define PORT3_IN_P15_Msk (0x8000UL) /*!< PORT3 IN: P15 (Bitfield-Mask: 0x01) */ - -/* --------------------------------- PORT3_PDR0 --------------------------------- */ -#define PORT3_PDR0_PD0_Pos (0UL) /*!< PORT3 PDR0: PD0 (Bit 0) */ -#define PORT3_PDR0_PD0_Msk (0x7UL) /*!< PORT3 PDR0: PD0 (Bitfield-Mask: 0x07) */ -#define PORT3_PDR0_PD1_Pos (4UL) /*!< PORT3 PDR0: PD1 (Bit 4) */ -#define PORT3_PDR0_PD1_Msk (0x70UL) /*!< PORT3 PDR0: PD1 (Bitfield-Mask: 0x07) */ -#define PORT3_PDR0_PD2_Pos (8UL) /*!< PORT3 PDR0: PD2 (Bit 8) */ -#define PORT3_PDR0_PD2_Msk (0x700UL) /*!< PORT3 PDR0: PD2 (Bitfield-Mask: 0x07) */ -#define PORT3_PDR0_PD3_Pos (12UL) /*!< PORT3 PDR0: PD3 (Bit 12) */ -#define PORT3_PDR0_PD3_Msk (0x7000UL) /*!< PORT3 PDR0: PD3 (Bitfield-Mask: 0x07) */ -#define PORT3_PDR0_PD4_Pos (16UL) /*!< PORT3 PDR0: PD4 (Bit 16) */ -#define PORT3_PDR0_PD4_Msk (0x70000UL) /*!< PORT3 PDR0: PD4 (Bitfield-Mask: 0x07) */ -#define PORT3_PDR0_PD5_Pos (20UL) /*!< PORT3 PDR0: PD5 (Bit 20) */ -#define PORT3_PDR0_PD5_Msk (0x700000UL) /*!< PORT3 PDR0: PD5 (Bitfield-Mask: 0x07) */ -#define PORT3_PDR0_PD6_Pos (24UL) /*!< PORT3 PDR0: PD6 (Bit 24) */ -#define PORT3_PDR0_PD6_Msk (0x7000000UL) /*!< PORT3 PDR0: PD6 (Bitfield-Mask: 0x07) */ -#define PORT3_PDR0_PD7_Pos (28UL) /*!< PORT3 PDR0: PD7 (Bit 28) */ -#define PORT3_PDR0_PD7_Msk (0x70000000UL) /*!< PORT3 PDR0: PD7 (Bitfield-Mask: 0x07) */ - -/* --------------------------------- PORT3_PDR1 --------------------------------- */ -#define PORT3_PDR1_PD8_Pos (0UL) /*!< PORT3 PDR1: PD8 (Bit 0) */ -#define PORT3_PDR1_PD8_Msk (0x7UL) /*!< PORT3 PDR1: PD8 (Bitfield-Mask: 0x07) */ -#define PORT3_PDR1_PD9_Pos (4UL) /*!< PORT3 PDR1: PD9 (Bit 4) */ -#define PORT3_PDR1_PD9_Msk (0x70UL) /*!< PORT3 PDR1: PD9 (Bitfield-Mask: 0x07) */ -#define PORT3_PDR1_PD10_Pos (8UL) /*!< PORT3 PDR1: PD10 (Bit 8) */ -#define PORT3_PDR1_PD10_Msk (0x700UL) /*!< PORT3 PDR1: PD10 (Bitfield-Mask: 0x07) */ -#define PORT3_PDR1_PD11_Pos (12UL) /*!< PORT3 PDR1: PD11 (Bit 12) */ -#define PORT3_PDR1_PD11_Msk (0x7000UL) /*!< PORT3 PDR1: PD11 (Bitfield-Mask: 0x07) */ -#define PORT3_PDR1_PD12_Pos (16UL) /*!< PORT3 PDR1: PD12 (Bit 16) */ -#define PORT3_PDR1_PD12_Msk (0x70000UL) /*!< PORT3 PDR1: PD12 (Bitfield-Mask: 0x07) */ -#define PORT3_PDR1_PD13_Pos (20UL) /*!< PORT3 PDR1: PD13 (Bit 20) */ -#define PORT3_PDR1_PD13_Msk (0x700000UL) /*!< PORT3 PDR1: PD13 (Bitfield-Mask: 0x07) */ -#define PORT3_PDR1_PD14_Pos (24UL) /*!< PORT3 PDR1: PD14 (Bit 24) */ -#define PORT3_PDR1_PD14_Msk (0x7000000UL) /*!< PORT3 PDR1: PD14 (Bitfield-Mask: 0x07) */ -#define PORT3_PDR1_PD15_Pos (28UL) /*!< PORT3 PDR1: PD15 (Bit 28) */ -#define PORT3_PDR1_PD15_Msk (0x70000000UL) /*!< PORT3 PDR1: PD15 (Bitfield-Mask: 0x07) */ - -/* --------------------------------- PORT3_PDISC -------------------------------- */ -#define PORT3_PDISC_PDIS0_Pos (0UL) /*!< PORT3 PDISC: PDIS0 (Bit 0) */ -#define PORT3_PDISC_PDIS0_Msk (0x1UL) /*!< PORT3 PDISC: PDIS0 (Bitfield-Mask: 0x01) */ -#define PORT3_PDISC_PDIS1_Pos (1UL) /*!< PORT3 PDISC: PDIS1 (Bit 1) */ -#define PORT3_PDISC_PDIS1_Msk (0x2UL) /*!< PORT3 PDISC: PDIS1 (Bitfield-Mask: 0x01) */ -#define PORT3_PDISC_PDIS2_Pos (2UL) /*!< PORT3 PDISC: PDIS2 (Bit 2) */ -#define PORT3_PDISC_PDIS2_Msk (0x4UL) /*!< PORT3 PDISC: PDIS2 (Bitfield-Mask: 0x01) */ -#define PORT3_PDISC_PDIS3_Pos (3UL) /*!< PORT3 PDISC: PDIS3 (Bit 3) */ -#define PORT3_PDISC_PDIS3_Msk (0x8UL) /*!< PORT3 PDISC: PDIS3 (Bitfield-Mask: 0x01) */ -#define PORT3_PDISC_PDIS4_Pos (4UL) /*!< PORT3 PDISC: PDIS4 (Bit 4) */ -#define PORT3_PDISC_PDIS4_Msk (0x10UL) /*!< PORT3 PDISC: PDIS4 (Bitfield-Mask: 0x01) */ -#define PORT3_PDISC_PDIS5_Pos (5UL) /*!< PORT3 PDISC: PDIS5 (Bit 5) */ -#define PORT3_PDISC_PDIS5_Msk (0x20UL) /*!< PORT3 PDISC: PDIS5 (Bitfield-Mask: 0x01) */ -#define PORT3_PDISC_PDIS6_Pos (6UL) /*!< PORT3 PDISC: PDIS6 (Bit 6) */ -#define PORT3_PDISC_PDIS6_Msk (0x40UL) /*!< PORT3 PDISC: PDIS6 (Bitfield-Mask: 0x01) */ -#define PORT3_PDISC_PDIS7_Pos (7UL) /*!< PORT3 PDISC: PDIS7 (Bit 7) */ -#define PORT3_PDISC_PDIS7_Msk (0x80UL) /*!< PORT3 PDISC: PDIS7 (Bitfield-Mask: 0x01) */ -#define PORT3_PDISC_PDIS8_Pos (8UL) /*!< PORT3 PDISC: PDIS8 (Bit 8) */ -#define PORT3_PDISC_PDIS8_Msk (0x100UL) /*!< PORT3 PDISC: PDIS8 (Bitfield-Mask: 0x01) */ -#define PORT3_PDISC_PDIS9_Pos (9UL) /*!< PORT3 PDISC: PDIS9 (Bit 9) */ -#define PORT3_PDISC_PDIS9_Msk (0x200UL) /*!< PORT3 PDISC: PDIS9 (Bitfield-Mask: 0x01) */ -#define PORT3_PDISC_PDIS10_Pos (10UL) /*!< PORT3 PDISC: PDIS10 (Bit 10) */ -#define PORT3_PDISC_PDIS10_Msk (0x400UL) /*!< PORT3 PDISC: PDIS10 (Bitfield-Mask: 0x01) */ -#define PORT3_PDISC_PDIS11_Pos (11UL) /*!< PORT3 PDISC: PDIS11 (Bit 11) */ -#define PORT3_PDISC_PDIS11_Msk (0x800UL) /*!< PORT3 PDISC: PDIS11 (Bitfield-Mask: 0x01) */ -#define PORT3_PDISC_PDIS12_Pos (12UL) /*!< PORT3 PDISC: PDIS12 (Bit 12) */ -#define PORT3_PDISC_PDIS12_Msk (0x1000UL) /*!< PORT3 PDISC: PDIS12 (Bitfield-Mask: 0x01) */ -#define PORT3_PDISC_PDIS13_Pos (13UL) /*!< PORT3 PDISC: PDIS13 (Bit 13) */ -#define PORT3_PDISC_PDIS13_Msk (0x2000UL) /*!< PORT3 PDISC: PDIS13 (Bitfield-Mask: 0x01) */ -#define PORT3_PDISC_PDIS14_Pos (14UL) /*!< PORT3 PDISC: PDIS14 (Bit 14) */ -#define PORT3_PDISC_PDIS14_Msk (0x4000UL) /*!< PORT3 PDISC: PDIS14 (Bitfield-Mask: 0x01) */ -#define PORT3_PDISC_PDIS15_Pos (15UL) /*!< PORT3 PDISC: PDIS15 (Bit 15) */ -#define PORT3_PDISC_PDIS15_Msk (0x8000UL) /*!< PORT3 PDISC: PDIS15 (Bitfield-Mask: 0x01) */ - -/* ---------------------------------- PORT3_PPS --------------------------------- */ -#define PORT3_PPS_PPS0_Pos (0UL) /*!< PORT3 PPS: PPS0 (Bit 0) */ -#define PORT3_PPS_PPS0_Msk (0x1UL) /*!< PORT3 PPS: PPS0 (Bitfield-Mask: 0x01) */ -#define PORT3_PPS_PPS1_Pos (1UL) /*!< PORT3 PPS: PPS1 (Bit 1) */ -#define PORT3_PPS_PPS1_Msk (0x2UL) /*!< PORT3 PPS: PPS1 (Bitfield-Mask: 0x01) */ -#define PORT3_PPS_PPS2_Pos (2UL) /*!< PORT3 PPS: PPS2 (Bit 2) */ -#define PORT3_PPS_PPS2_Msk (0x4UL) /*!< PORT3 PPS: PPS2 (Bitfield-Mask: 0x01) */ -#define PORT3_PPS_PPS3_Pos (3UL) /*!< PORT3 PPS: PPS3 (Bit 3) */ -#define PORT3_PPS_PPS3_Msk (0x8UL) /*!< PORT3 PPS: PPS3 (Bitfield-Mask: 0x01) */ -#define PORT3_PPS_PPS4_Pos (4UL) /*!< PORT3 PPS: PPS4 (Bit 4) */ -#define PORT3_PPS_PPS4_Msk (0x10UL) /*!< PORT3 PPS: PPS4 (Bitfield-Mask: 0x01) */ -#define PORT3_PPS_PPS5_Pos (5UL) /*!< PORT3 PPS: PPS5 (Bit 5) */ -#define PORT3_PPS_PPS5_Msk (0x20UL) /*!< PORT3 PPS: PPS5 (Bitfield-Mask: 0x01) */ -#define PORT3_PPS_PPS6_Pos (6UL) /*!< PORT3 PPS: PPS6 (Bit 6) */ -#define PORT3_PPS_PPS6_Msk (0x40UL) /*!< PORT3 PPS: PPS6 (Bitfield-Mask: 0x01) */ -#define PORT3_PPS_PPS7_Pos (7UL) /*!< PORT3 PPS: PPS7 (Bit 7) */ -#define PORT3_PPS_PPS7_Msk (0x80UL) /*!< PORT3 PPS: PPS7 (Bitfield-Mask: 0x01) */ -#define PORT3_PPS_PPS8_Pos (8UL) /*!< PORT3 PPS: PPS8 (Bit 8) */ -#define PORT3_PPS_PPS8_Msk (0x100UL) /*!< PORT3 PPS: PPS8 (Bitfield-Mask: 0x01) */ -#define PORT3_PPS_PPS9_Pos (9UL) /*!< PORT3 PPS: PPS9 (Bit 9) */ -#define PORT3_PPS_PPS9_Msk (0x200UL) /*!< PORT3 PPS: PPS9 (Bitfield-Mask: 0x01) */ -#define PORT3_PPS_PPS10_Pos (10UL) /*!< PORT3 PPS: PPS10 (Bit 10) */ -#define PORT3_PPS_PPS10_Msk (0x400UL) /*!< PORT3 PPS: PPS10 (Bitfield-Mask: 0x01) */ -#define PORT3_PPS_PPS11_Pos (11UL) /*!< PORT3 PPS: PPS11 (Bit 11) */ -#define PORT3_PPS_PPS11_Msk (0x800UL) /*!< PORT3 PPS: PPS11 (Bitfield-Mask: 0x01) */ -#define PORT3_PPS_PPS12_Pos (12UL) /*!< PORT3 PPS: PPS12 (Bit 12) */ -#define PORT3_PPS_PPS12_Msk (0x1000UL) /*!< PORT3 PPS: PPS12 (Bitfield-Mask: 0x01) */ -#define PORT3_PPS_PPS13_Pos (13UL) /*!< PORT3 PPS: PPS13 (Bit 13) */ -#define PORT3_PPS_PPS13_Msk (0x2000UL) /*!< PORT3 PPS: PPS13 (Bitfield-Mask: 0x01) */ -#define PORT3_PPS_PPS14_Pos (14UL) /*!< PORT3 PPS: PPS14 (Bit 14) */ -#define PORT3_PPS_PPS14_Msk (0x4000UL) /*!< PORT3 PPS: PPS14 (Bitfield-Mask: 0x01) */ -#define PORT3_PPS_PPS15_Pos (15UL) /*!< PORT3 PPS: PPS15 (Bit 15) */ -#define PORT3_PPS_PPS15_Msk (0x8000UL) /*!< PORT3 PPS: PPS15 (Bitfield-Mask: 0x01) */ - -/* --------------------------------- PORT3_HWSEL -------------------------------- */ -#define PORT3_HWSEL_HW0_Pos (0UL) /*!< PORT3 HWSEL: HW0 (Bit 0) */ -#define PORT3_HWSEL_HW0_Msk (0x3UL) /*!< PORT3 HWSEL: HW0 (Bitfield-Mask: 0x03) */ -#define PORT3_HWSEL_HW1_Pos (2UL) /*!< PORT3 HWSEL: HW1 (Bit 2) */ -#define PORT3_HWSEL_HW1_Msk (0xcUL) /*!< PORT3 HWSEL: HW1 (Bitfield-Mask: 0x03) */ -#define PORT3_HWSEL_HW2_Pos (4UL) /*!< PORT3 HWSEL: HW2 (Bit 4) */ -#define PORT3_HWSEL_HW2_Msk (0x30UL) /*!< PORT3 HWSEL: HW2 (Bitfield-Mask: 0x03) */ -#define PORT3_HWSEL_HW3_Pos (6UL) /*!< PORT3 HWSEL: HW3 (Bit 6) */ -#define PORT3_HWSEL_HW3_Msk (0xc0UL) /*!< PORT3 HWSEL: HW3 (Bitfield-Mask: 0x03) */ -#define PORT3_HWSEL_HW4_Pos (8UL) /*!< PORT3 HWSEL: HW4 (Bit 8) */ -#define PORT3_HWSEL_HW4_Msk (0x300UL) /*!< PORT3 HWSEL: HW4 (Bitfield-Mask: 0x03) */ -#define PORT3_HWSEL_HW5_Pos (10UL) /*!< PORT3 HWSEL: HW5 (Bit 10) */ -#define PORT3_HWSEL_HW5_Msk (0xc00UL) /*!< PORT3 HWSEL: HW5 (Bitfield-Mask: 0x03) */ -#define PORT3_HWSEL_HW6_Pos (12UL) /*!< PORT3 HWSEL: HW6 (Bit 12) */ -#define PORT3_HWSEL_HW6_Msk (0x3000UL) /*!< PORT3 HWSEL: HW6 (Bitfield-Mask: 0x03) */ -#define PORT3_HWSEL_HW7_Pos (14UL) /*!< PORT3 HWSEL: HW7 (Bit 14) */ -#define PORT3_HWSEL_HW7_Msk (0xc000UL) /*!< PORT3 HWSEL: HW7 (Bitfield-Mask: 0x03) */ -#define PORT3_HWSEL_HW8_Pos (16UL) /*!< PORT3 HWSEL: HW8 (Bit 16) */ -#define PORT3_HWSEL_HW8_Msk (0x30000UL) /*!< PORT3 HWSEL: HW8 (Bitfield-Mask: 0x03) */ -#define PORT3_HWSEL_HW9_Pos (18UL) /*!< PORT3 HWSEL: HW9 (Bit 18) */ -#define PORT3_HWSEL_HW9_Msk (0xc0000UL) /*!< PORT3 HWSEL: HW9 (Bitfield-Mask: 0x03) */ -#define PORT3_HWSEL_HW10_Pos (20UL) /*!< PORT3 HWSEL: HW10 (Bit 20) */ -#define PORT3_HWSEL_HW10_Msk (0x300000UL) /*!< PORT3 HWSEL: HW10 (Bitfield-Mask: 0x03) */ -#define PORT3_HWSEL_HW11_Pos (22UL) /*!< PORT3 HWSEL: HW11 (Bit 22) */ -#define PORT3_HWSEL_HW11_Msk (0xc00000UL) /*!< PORT3 HWSEL: HW11 (Bitfield-Mask: 0x03) */ -#define PORT3_HWSEL_HW12_Pos (24UL) /*!< PORT3 HWSEL: HW12 (Bit 24) */ -#define PORT3_HWSEL_HW12_Msk (0x3000000UL) /*!< PORT3 HWSEL: HW12 (Bitfield-Mask: 0x03) */ -#define PORT3_HWSEL_HW13_Pos (26UL) /*!< PORT3 HWSEL: HW13 (Bit 26) */ -#define PORT3_HWSEL_HW13_Msk (0xc000000UL) /*!< PORT3 HWSEL: HW13 (Bitfield-Mask: 0x03) */ -#define PORT3_HWSEL_HW14_Pos (28UL) /*!< PORT3 HWSEL: HW14 (Bit 28) */ -#define PORT3_HWSEL_HW14_Msk (0x30000000UL) /*!< PORT3 HWSEL: HW14 (Bitfield-Mask: 0x03) */ -#define PORT3_HWSEL_HW15_Pos (30UL) /*!< PORT3 HWSEL: HW15 (Bit 30) */ -#define PORT3_HWSEL_HW15_Msk (0xc0000000UL) /*!< PORT3 HWSEL: HW15 (Bitfield-Mask: 0x03) */ - - -/* ================================================================================ */ -/* ================ struct 'PORT4' Position & Mask ================ */ -/* ================================================================================ */ - - -/* ---------------------------------- PORT4_OUT --------------------------------- */ -#define PORT4_OUT_P0_Pos (0UL) /*!< PORT4 OUT: P0 (Bit 0) */ -#define PORT4_OUT_P0_Msk (0x1UL) /*!< PORT4 OUT: P0 (Bitfield-Mask: 0x01) */ -#define PORT4_OUT_P1_Pos (1UL) /*!< PORT4 OUT: P1 (Bit 1) */ -#define PORT4_OUT_P1_Msk (0x2UL) /*!< PORT4 OUT: P1 (Bitfield-Mask: 0x01) */ -#define PORT4_OUT_P2_Pos (2UL) /*!< PORT4 OUT: P2 (Bit 2) */ -#define PORT4_OUT_P2_Msk (0x4UL) /*!< PORT4 OUT: P2 (Bitfield-Mask: 0x01) */ -#define PORT4_OUT_P3_Pos (3UL) /*!< PORT4 OUT: P3 (Bit 3) */ -#define PORT4_OUT_P3_Msk (0x8UL) /*!< PORT4 OUT: P3 (Bitfield-Mask: 0x01) */ -#define PORT4_OUT_P4_Pos (4UL) /*!< PORT4 OUT: P4 (Bit 4) */ -#define PORT4_OUT_P4_Msk (0x10UL) /*!< PORT4 OUT: P4 (Bitfield-Mask: 0x01) */ -#define PORT4_OUT_P5_Pos (5UL) /*!< PORT4 OUT: P5 (Bit 5) */ -#define PORT4_OUT_P5_Msk (0x20UL) /*!< PORT4 OUT: P5 (Bitfield-Mask: 0x01) */ -#define PORT4_OUT_P6_Pos (6UL) /*!< PORT4 OUT: P6 (Bit 6) */ -#define PORT4_OUT_P6_Msk (0x40UL) /*!< PORT4 OUT: P6 (Bitfield-Mask: 0x01) */ -#define PORT4_OUT_P7_Pos (7UL) /*!< PORT4 OUT: P7 (Bit 7) */ -#define PORT4_OUT_P7_Msk (0x80UL) /*!< PORT4 OUT: P7 (Bitfield-Mask: 0x01) */ -#define PORT4_OUT_P8_Pos (8UL) /*!< PORT4 OUT: P8 (Bit 8) */ -#define PORT4_OUT_P8_Msk (0x100UL) /*!< PORT4 OUT: P8 (Bitfield-Mask: 0x01) */ -#define PORT4_OUT_P9_Pos (9UL) /*!< PORT4 OUT: P9 (Bit 9) */ -#define PORT4_OUT_P9_Msk (0x200UL) /*!< PORT4 OUT: P9 (Bitfield-Mask: 0x01) */ -#define PORT4_OUT_P10_Pos (10UL) /*!< PORT4 OUT: P10 (Bit 10) */ -#define PORT4_OUT_P10_Msk (0x400UL) /*!< PORT4 OUT: P10 (Bitfield-Mask: 0x01) */ -#define PORT4_OUT_P11_Pos (11UL) /*!< PORT4 OUT: P11 (Bit 11) */ -#define PORT4_OUT_P11_Msk (0x800UL) /*!< PORT4 OUT: P11 (Bitfield-Mask: 0x01) */ -#define PORT4_OUT_P12_Pos (12UL) /*!< PORT4 OUT: P12 (Bit 12) */ -#define PORT4_OUT_P12_Msk (0x1000UL) /*!< PORT4 OUT: P12 (Bitfield-Mask: 0x01) */ -#define PORT4_OUT_P13_Pos (13UL) /*!< PORT4 OUT: P13 (Bit 13) */ -#define PORT4_OUT_P13_Msk (0x2000UL) /*!< PORT4 OUT: P13 (Bitfield-Mask: 0x01) */ -#define PORT4_OUT_P14_Pos (14UL) /*!< PORT4 OUT: P14 (Bit 14) */ -#define PORT4_OUT_P14_Msk (0x4000UL) /*!< PORT4 OUT: P14 (Bitfield-Mask: 0x01) */ -#define PORT4_OUT_P15_Pos (15UL) /*!< PORT4 OUT: P15 (Bit 15) */ -#define PORT4_OUT_P15_Msk (0x8000UL) /*!< PORT4 OUT: P15 (Bitfield-Mask: 0x01) */ - -/* ---------------------------------- PORT4_OMR --------------------------------- */ -#define PORT4_OMR_PS0_Pos (0UL) /*!< PORT4 OMR: PS0 (Bit 0) */ -#define PORT4_OMR_PS0_Msk (0x1UL) /*!< PORT4 OMR: PS0 (Bitfield-Mask: 0x01) */ -#define PORT4_OMR_PS1_Pos (1UL) /*!< PORT4 OMR: PS1 (Bit 1) */ -#define PORT4_OMR_PS1_Msk (0x2UL) /*!< PORT4 OMR: PS1 (Bitfield-Mask: 0x01) */ -#define PORT4_OMR_PS2_Pos (2UL) /*!< PORT4 OMR: PS2 (Bit 2) */ -#define PORT4_OMR_PS2_Msk (0x4UL) /*!< PORT4 OMR: PS2 (Bitfield-Mask: 0x01) */ -#define PORT4_OMR_PS3_Pos (3UL) /*!< PORT4 OMR: PS3 (Bit 3) */ -#define PORT4_OMR_PS3_Msk (0x8UL) /*!< PORT4 OMR: PS3 (Bitfield-Mask: 0x01) */ -#define PORT4_OMR_PS4_Pos (4UL) /*!< PORT4 OMR: PS4 (Bit 4) */ -#define PORT4_OMR_PS4_Msk (0x10UL) /*!< PORT4 OMR: PS4 (Bitfield-Mask: 0x01) */ -#define PORT4_OMR_PS5_Pos (5UL) /*!< PORT4 OMR: PS5 (Bit 5) */ -#define PORT4_OMR_PS5_Msk (0x20UL) /*!< PORT4 OMR: PS5 (Bitfield-Mask: 0x01) */ -#define PORT4_OMR_PS6_Pos (6UL) /*!< PORT4 OMR: PS6 (Bit 6) */ -#define PORT4_OMR_PS6_Msk (0x40UL) /*!< PORT4 OMR: PS6 (Bitfield-Mask: 0x01) */ -#define PORT4_OMR_PS7_Pos (7UL) /*!< PORT4 OMR: PS7 (Bit 7) */ -#define PORT4_OMR_PS7_Msk (0x80UL) /*!< PORT4 OMR: PS7 (Bitfield-Mask: 0x01) */ -#define PORT4_OMR_PS8_Pos (8UL) /*!< PORT4 OMR: PS8 (Bit 8) */ -#define PORT4_OMR_PS8_Msk (0x100UL) /*!< PORT4 OMR: PS8 (Bitfield-Mask: 0x01) */ -#define PORT4_OMR_PS9_Pos (9UL) /*!< PORT4 OMR: PS9 (Bit 9) */ -#define PORT4_OMR_PS9_Msk (0x200UL) /*!< PORT4 OMR: PS9 (Bitfield-Mask: 0x01) */ -#define PORT4_OMR_PS10_Pos (10UL) /*!< PORT4 OMR: PS10 (Bit 10) */ -#define PORT4_OMR_PS10_Msk (0x400UL) /*!< PORT4 OMR: PS10 (Bitfield-Mask: 0x01) */ -#define PORT4_OMR_PS11_Pos (11UL) /*!< PORT4 OMR: PS11 (Bit 11) */ -#define PORT4_OMR_PS11_Msk (0x800UL) /*!< PORT4 OMR: PS11 (Bitfield-Mask: 0x01) */ -#define PORT4_OMR_PS12_Pos (12UL) /*!< PORT4 OMR: PS12 (Bit 12) */ -#define PORT4_OMR_PS12_Msk (0x1000UL) /*!< PORT4 OMR: PS12 (Bitfield-Mask: 0x01) */ -#define PORT4_OMR_PS13_Pos (13UL) /*!< PORT4 OMR: PS13 (Bit 13) */ -#define PORT4_OMR_PS13_Msk (0x2000UL) /*!< PORT4 OMR: PS13 (Bitfield-Mask: 0x01) */ -#define PORT4_OMR_PS14_Pos (14UL) /*!< PORT4 OMR: PS14 (Bit 14) */ -#define PORT4_OMR_PS14_Msk (0x4000UL) /*!< PORT4 OMR: PS14 (Bitfield-Mask: 0x01) */ -#define PORT4_OMR_PS15_Pos (15UL) /*!< PORT4 OMR: PS15 (Bit 15) */ -#define PORT4_OMR_PS15_Msk (0x8000UL) /*!< PORT4 OMR: PS15 (Bitfield-Mask: 0x01) */ -#define PORT4_OMR_PR0_Pos (16UL) /*!< PORT4 OMR: PR0 (Bit 16) */ -#define PORT4_OMR_PR0_Msk (0x10000UL) /*!< PORT4 OMR: PR0 (Bitfield-Mask: 0x01) */ -#define PORT4_OMR_PR1_Pos (17UL) /*!< PORT4 OMR: PR1 (Bit 17) */ -#define PORT4_OMR_PR1_Msk (0x20000UL) /*!< PORT4 OMR: PR1 (Bitfield-Mask: 0x01) */ -#define PORT4_OMR_PR2_Pos (18UL) /*!< PORT4 OMR: PR2 (Bit 18) */ -#define PORT4_OMR_PR2_Msk (0x40000UL) /*!< PORT4 OMR: PR2 (Bitfield-Mask: 0x01) */ -#define PORT4_OMR_PR3_Pos (19UL) /*!< PORT4 OMR: PR3 (Bit 19) */ -#define PORT4_OMR_PR3_Msk (0x80000UL) /*!< PORT4 OMR: PR3 (Bitfield-Mask: 0x01) */ -#define PORT4_OMR_PR4_Pos (20UL) /*!< PORT4 OMR: PR4 (Bit 20) */ -#define PORT4_OMR_PR4_Msk (0x100000UL) /*!< PORT4 OMR: PR4 (Bitfield-Mask: 0x01) */ -#define PORT4_OMR_PR5_Pos (21UL) /*!< PORT4 OMR: PR5 (Bit 21) */ -#define PORT4_OMR_PR5_Msk (0x200000UL) /*!< PORT4 OMR: PR5 (Bitfield-Mask: 0x01) */ -#define PORT4_OMR_PR6_Pos (22UL) /*!< PORT4 OMR: PR6 (Bit 22) */ -#define PORT4_OMR_PR6_Msk (0x400000UL) /*!< PORT4 OMR: PR6 (Bitfield-Mask: 0x01) */ -#define PORT4_OMR_PR7_Pos (23UL) /*!< PORT4 OMR: PR7 (Bit 23) */ -#define PORT4_OMR_PR7_Msk (0x800000UL) /*!< PORT4 OMR: PR7 (Bitfield-Mask: 0x01) */ -#define PORT4_OMR_PR8_Pos (24UL) /*!< PORT4 OMR: PR8 (Bit 24) */ -#define PORT4_OMR_PR8_Msk (0x1000000UL) /*!< PORT4 OMR: PR8 (Bitfield-Mask: 0x01) */ -#define PORT4_OMR_PR9_Pos (25UL) /*!< PORT4 OMR: PR9 (Bit 25) */ -#define PORT4_OMR_PR9_Msk (0x2000000UL) /*!< PORT4 OMR: PR9 (Bitfield-Mask: 0x01) */ -#define PORT4_OMR_PR10_Pos (26UL) /*!< PORT4 OMR: PR10 (Bit 26) */ -#define PORT4_OMR_PR10_Msk (0x4000000UL) /*!< PORT4 OMR: PR10 (Bitfield-Mask: 0x01) */ -#define PORT4_OMR_PR11_Pos (27UL) /*!< PORT4 OMR: PR11 (Bit 27) */ -#define PORT4_OMR_PR11_Msk (0x8000000UL) /*!< PORT4 OMR: PR11 (Bitfield-Mask: 0x01) */ -#define PORT4_OMR_PR12_Pos (28UL) /*!< PORT4 OMR: PR12 (Bit 28) */ -#define PORT4_OMR_PR12_Msk (0x10000000UL) /*!< PORT4 OMR: PR12 (Bitfield-Mask: 0x01) */ -#define PORT4_OMR_PR13_Pos (29UL) /*!< PORT4 OMR: PR13 (Bit 29) */ -#define PORT4_OMR_PR13_Msk (0x20000000UL) /*!< PORT4 OMR: PR13 (Bitfield-Mask: 0x01) */ -#define PORT4_OMR_PR14_Pos (30UL) /*!< PORT4 OMR: PR14 (Bit 30) */ -#define PORT4_OMR_PR14_Msk (0x40000000UL) /*!< PORT4 OMR: PR14 (Bitfield-Mask: 0x01) */ -#define PORT4_OMR_PR15_Pos (31UL) /*!< PORT4 OMR: PR15 (Bit 31) */ -#define PORT4_OMR_PR15_Msk (0x80000000UL) /*!< PORT4 OMR: PR15 (Bitfield-Mask: 0x01) */ - -/* --------------------------------- PORT4_IOCR0 -------------------------------- */ -#define PORT4_IOCR0_PC0_Pos (3UL) /*!< PORT4 IOCR0: PC0 (Bit 3) */ -#define PORT4_IOCR0_PC0_Msk (0xf8UL) /*!< PORT4 IOCR0: PC0 (Bitfield-Mask: 0x1f) */ -#define PORT4_IOCR0_PC1_Pos (11UL) /*!< PORT4 IOCR0: PC1 (Bit 11) */ -#define PORT4_IOCR0_PC1_Msk (0xf800UL) /*!< PORT4 IOCR0: PC1 (Bitfield-Mask: 0x1f) */ -#define PORT4_IOCR0_PC2_Pos (19UL) /*!< PORT4 IOCR0: PC2 (Bit 19) */ -#define PORT4_IOCR0_PC2_Msk (0xf80000UL) /*!< PORT4 IOCR0: PC2 (Bitfield-Mask: 0x1f) */ -#define PORT4_IOCR0_PC3_Pos (27UL) /*!< PORT4 IOCR0: PC3 (Bit 27) */ -#define PORT4_IOCR0_PC3_Msk (0xf8000000UL) /*!< PORT4 IOCR0: PC3 (Bitfield-Mask: 0x1f) */ - -/* --------------------------------- PORT4_IOCR4 -------------------------------- */ -#define PORT4_IOCR4_PC4_Pos (3UL) /*!< PORT4 IOCR4: PC4 (Bit 3) */ -#define PORT4_IOCR4_PC4_Msk (0xf8UL) /*!< PORT4 IOCR4: PC4 (Bitfield-Mask: 0x1f) */ -#define PORT4_IOCR4_PC5_Pos (11UL) /*!< PORT4 IOCR4: PC5 (Bit 11) */ -#define PORT4_IOCR4_PC5_Msk (0xf800UL) /*!< PORT4 IOCR4: PC5 (Bitfield-Mask: 0x1f) */ -#define PORT4_IOCR4_PC6_Pos (19UL) /*!< PORT4 IOCR4: PC6 (Bit 19) */ -#define PORT4_IOCR4_PC6_Msk (0xf80000UL) /*!< PORT4 IOCR4: PC6 (Bitfield-Mask: 0x1f) */ -#define PORT4_IOCR4_PC7_Pos (27UL) /*!< PORT4 IOCR4: PC7 (Bit 27) */ -#define PORT4_IOCR4_PC7_Msk (0xf8000000UL) /*!< PORT4 IOCR4: PC7 (Bitfield-Mask: 0x1f) */ - -/* ---------------------------------- PORT4_IN ---------------------------------- */ -#define PORT4_IN_P0_Pos (0UL) /*!< PORT4 IN: P0 (Bit 0) */ -#define PORT4_IN_P0_Msk (0x1UL) /*!< PORT4 IN: P0 (Bitfield-Mask: 0x01) */ -#define PORT4_IN_P1_Pos (1UL) /*!< PORT4 IN: P1 (Bit 1) */ -#define PORT4_IN_P1_Msk (0x2UL) /*!< PORT4 IN: P1 (Bitfield-Mask: 0x01) */ -#define PORT4_IN_P2_Pos (2UL) /*!< PORT4 IN: P2 (Bit 2) */ -#define PORT4_IN_P2_Msk (0x4UL) /*!< PORT4 IN: P2 (Bitfield-Mask: 0x01) */ -#define PORT4_IN_P3_Pos (3UL) /*!< PORT4 IN: P3 (Bit 3) */ -#define PORT4_IN_P3_Msk (0x8UL) /*!< PORT4 IN: P3 (Bitfield-Mask: 0x01) */ -#define PORT4_IN_P4_Pos (4UL) /*!< PORT4 IN: P4 (Bit 4) */ -#define PORT4_IN_P4_Msk (0x10UL) /*!< PORT4 IN: P4 (Bitfield-Mask: 0x01) */ -#define PORT4_IN_P5_Pos (5UL) /*!< PORT4 IN: P5 (Bit 5) */ -#define PORT4_IN_P5_Msk (0x20UL) /*!< PORT4 IN: P5 (Bitfield-Mask: 0x01) */ -#define PORT4_IN_P6_Pos (6UL) /*!< PORT4 IN: P6 (Bit 6) */ -#define PORT4_IN_P6_Msk (0x40UL) /*!< PORT4 IN: P6 (Bitfield-Mask: 0x01) */ -#define PORT4_IN_P7_Pos (7UL) /*!< PORT4 IN: P7 (Bit 7) */ -#define PORT4_IN_P7_Msk (0x80UL) /*!< PORT4 IN: P7 (Bitfield-Mask: 0x01) */ -#define PORT4_IN_P8_Pos (8UL) /*!< PORT4 IN: P8 (Bit 8) */ -#define PORT4_IN_P8_Msk (0x100UL) /*!< PORT4 IN: P8 (Bitfield-Mask: 0x01) */ -#define PORT4_IN_P9_Pos (9UL) /*!< PORT4 IN: P9 (Bit 9) */ -#define PORT4_IN_P9_Msk (0x200UL) /*!< PORT4 IN: P9 (Bitfield-Mask: 0x01) */ -#define PORT4_IN_P10_Pos (10UL) /*!< PORT4 IN: P10 (Bit 10) */ -#define PORT4_IN_P10_Msk (0x400UL) /*!< PORT4 IN: P10 (Bitfield-Mask: 0x01) */ -#define PORT4_IN_P11_Pos (11UL) /*!< PORT4 IN: P11 (Bit 11) */ -#define PORT4_IN_P11_Msk (0x800UL) /*!< PORT4 IN: P11 (Bitfield-Mask: 0x01) */ -#define PORT4_IN_P12_Pos (12UL) /*!< PORT4 IN: P12 (Bit 12) */ -#define PORT4_IN_P12_Msk (0x1000UL) /*!< PORT4 IN: P12 (Bitfield-Mask: 0x01) */ -#define PORT4_IN_P13_Pos (13UL) /*!< PORT4 IN: P13 (Bit 13) */ -#define PORT4_IN_P13_Msk (0x2000UL) /*!< PORT4 IN: P13 (Bitfield-Mask: 0x01) */ -#define PORT4_IN_P14_Pos (14UL) /*!< PORT4 IN: P14 (Bit 14) */ -#define PORT4_IN_P14_Msk (0x4000UL) /*!< PORT4 IN: P14 (Bitfield-Mask: 0x01) */ -#define PORT4_IN_P15_Pos (15UL) /*!< PORT4 IN: P15 (Bit 15) */ -#define PORT4_IN_P15_Msk (0x8000UL) /*!< PORT4 IN: P15 (Bitfield-Mask: 0x01) */ - -/* --------------------------------- PORT4_PDR0 --------------------------------- */ -#define PORT4_PDR0_PD0_Pos (0UL) /*!< PORT4 PDR0: PD0 (Bit 0) */ -#define PORT4_PDR0_PD0_Msk (0x7UL) /*!< PORT4 PDR0: PD0 (Bitfield-Mask: 0x07) */ -#define PORT4_PDR0_PD1_Pos (4UL) /*!< PORT4 PDR0: PD1 (Bit 4) */ -#define PORT4_PDR0_PD1_Msk (0x70UL) /*!< PORT4 PDR0: PD1 (Bitfield-Mask: 0x07) */ -#define PORT4_PDR0_PD2_Pos (8UL) /*!< PORT4 PDR0: PD2 (Bit 8) */ -#define PORT4_PDR0_PD2_Msk (0x700UL) /*!< PORT4 PDR0: PD2 (Bitfield-Mask: 0x07) */ -#define PORT4_PDR0_PD3_Pos (12UL) /*!< PORT4 PDR0: PD3 (Bit 12) */ -#define PORT4_PDR0_PD3_Msk (0x7000UL) /*!< PORT4 PDR0: PD3 (Bitfield-Mask: 0x07) */ -#define PORT4_PDR0_PD4_Pos (16UL) /*!< PORT4 PDR0: PD4 (Bit 16) */ -#define PORT4_PDR0_PD4_Msk (0x70000UL) /*!< PORT4 PDR0: PD4 (Bitfield-Mask: 0x07) */ -#define PORT4_PDR0_PD5_Pos (20UL) /*!< PORT4 PDR0: PD5 (Bit 20) */ -#define PORT4_PDR0_PD5_Msk (0x700000UL) /*!< PORT4 PDR0: PD5 (Bitfield-Mask: 0x07) */ -#define PORT4_PDR0_PD6_Pos (24UL) /*!< PORT4 PDR0: PD6 (Bit 24) */ -#define PORT4_PDR0_PD6_Msk (0x7000000UL) /*!< PORT4 PDR0: PD6 (Bitfield-Mask: 0x07) */ -#define PORT4_PDR0_PD7_Pos (28UL) /*!< PORT4 PDR0: PD7 (Bit 28) */ -#define PORT4_PDR0_PD7_Msk (0x70000000UL) /*!< PORT4 PDR0: PD7 (Bitfield-Mask: 0x07) */ - -/* --------------------------------- PORT4_PDISC -------------------------------- */ -#define PORT4_PDISC_PDIS0_Pos (0UL) /*!< PORT4 PDISC: PDIS0 (Bit 0) */ -#define PORT4_PDISC_PDIS0_Msk (0x1UL) /*!< PORT4 PDISC: PDIS0 (Bitfield-Mask: 0x01) */ -#define PORT4_PDISC_PDIS1_Pos (1UL) /*!< PORT4 PDISC: PDIS1 (Bit 1) */ -#define PORT4_PDISC_PDIS1_Msk (0x2UL) /*!< PORT4 PDISC: PDIS1 (Bitfield-Mask: 0x01) */ -#define PORT4_PDISC_PDIS2_Pos (2UL) /*!< PORT4 PDISC: PDIS2 (Bit 2) */ -#define PORT4_PDISC_PDIS2_Msk (0x4UL) /*!< PORT4 PDISC: PDIS2 (Bitfield-Mask: 0x01) */ -#define PORT4_PDISC_PDIS3_Pos (3UL) /*!< PORT4 PDISC: PDIS3 (Bit 3) */ -#define PORT4_PDISC_PDIS3_Msk (0x8UL) /*!< PORT4 PDISC: PDIS3 (Bitfield-Mask: 0x01) */ -#define PORT4_PDISC_PDIS4_Pos (4UL) /*!< PORT4 PDISC: PDIS4 (Bit 4) */ -#define PORT4_PDISC_PDIS4_Msk (0x10UL) /*!< PORT4 PDISC: PDIS4 (Bitfield-Mask: 0x01) */ -#define PORT4_PDISC_PDIS5_Pos (5UL) /*!< PORT4 PDISC: PDIS5 (Bit 5) */ -#define PORT4_PDISC_PDIS5_Msk (0x20UL) /*!< PORT4 PDISC: PDIS5 (Bitfield-Mask: 0x01) */ -#define PORT4_PDISC_PDIS6_Pos (6UL) /*!< PORT4 PDISC: PDIS6 (Bit 6) */ -#define PORT4_PDISC_PDIS6_Msk (0x40UL) /*!< PORT4 PDISC: PDIS6 (Bitfield-Mask: 0x01) */ -#define PORT4_PDISC_PDIS7_Pos (7UL) /*!< PORT4 PDISC: PDIS7 (Bit 7) */ -#define PORT4_PDISC_PDIS7_Msk (0x80UL) /*!< PORT4 PDISC: PDIS7 (Bitfield-Mask: 0x01) */ -#define PORT4_PDISC_PDIS8_Pos (8UL) /*!< PORT4 PDISC: PDIS8 (Bit 8) */ -#define PORT4_PDISC_PDIS8_Msk (0x100UL) /*!< PORT4 PDISC: PDIS8 (Bitfield-Mask: 0x01) */ -#define PORT4_PDISC_PDIS9_Pos (9UL) /*!< PORT4 PDISC: PDIS9 (Bit 9) */ -#define PORT4_PDISC_PDIS9_Msk (0x200UL) /*!< PORT4 PDISC: PDIS9 (Bitfield-Mask: 0x01) */ -#define PORT4_PDISC_PDIS10_Pos (10UL) /*!< PORT4 PDISC: PDIS10 (Bit 10) */ -#define PORT4_PDISC_PDIS10_Msk (0x400UL) /*!< PORT4 PDISC: PDIS10 (Bitfield-Mask: 0x01) */ -#define PORT4_PDISC_PDIS11_Pos (11UL) /*!< PORT4 PDISC: PDIS11 (Bit 11) */ -#define PORT4_PDISC_PDIS11_Msk (0x800UL) /*!< PORT4 PDISC: PDIS11 (Bitfield-Mask: 0x01) */ -#define PORT4_PDISC_PDIS12_Pos (12UL) /*!< PORT4 PDISC: PDIS12 (Bit 12) */ -#define PORT4_PDISC_PDIS12_Msk (0x1000UL) /*!< PORT4 PDISC: PDIS12 (Bitfield-Mask: 0x01) */ -#define PORT4_PDISC_PDIS13_Pos (13UL) /*!< PORT4 PDISC: PDIS13 (Bit 13) */ -#define PORT4_PDISC_PDIS13_Msk (0x2000UL) /*!< PORT4 PDISC: PDIS13 (Bitfield-Mask: 0x01) */ -#define PORT4_PDISC_PDIS14_Pos (14UL) /*!< PORT4 PDISC: PDIS14 (Bit 14) */ -#define PORT4_PDISC_PDIS14_Msk (0x4000UL) /*!< PORT4 PDISC: PDIS14 (Bitfield-Mask: 0x01) */ -#define PORT4_PDISC_PDIS15_Pos (15UL) /*!< PORT4 PDISC: PDIS15 (Bit 15) */ -#define PORT4_PDISC_PDIS15_Msk (0x8000UL) /*!< PORT4 PDISC: PDIS15 (Bitfield-Mask: 0x01) */ - -/* ---------------------------------- PORT4_PPS --------------------------------- */ -#define PORT4_PPS_PPS0_Pos (0UL) /*!< PORT4 PPS: PPS0 (Bit 0) */ -#define PORT4_PPS_PPS0_Msk (0x1UL) /*!< PORT4 PPS: PPS0 (Bitfield-Mask: 0x01) */ -#define PORT4_PPS_PPS1_Pos (1UL) /*!< PORT4 PPS: PPS1 (Bit 1) */ -#define PORT4_PPS_PPS1_Msk (0x2UL) /*!< PORT4 PPS: PPS1 (Bitfield-Mask: 0x01) */ -#define PORT4_PPS_PPS2_Pos (2UL) /*!< PORT4 PPS: PPS2 (Bit 2) */ -#define PORT4_PPS_PPS2_Msk (0x4UL) /*!< PORT4 PPS: PPS2 (Bitfield-Mask: 0x01) */ -#define PORT4_PPS_PPS3_Pos (3UL) /*!< PORT4 PPS: PPS3 (Bit 3) */ -#define PORT4_PPS_PPS3_Msk (0x8UL) /*!< PORT4 PPS: PPS3 (Bitfield-Mask: 0x01) */ -#define PORT4_PPS_PPS4_Pos (4UL) /*!< PORT4 PPS: PPS4 (Bit 4) */ -#define PORT4_PPS_PPS4_Msk (0x10UL) /*!< PORT4 PPS: PPS4 (Bitfield-Mask: 0x01) */ -#define PORT4_PPS_PPS5_Pos (5UL) /*!< PORT4 PPS: PPS5 (Bit 5) */ -#define PORT4_PPS_PPS5_Msk (0x20UL) /*!< PORT4 PPS: PPS5 (Bitfield-Mask: 0x01) */ -#define PORT4_PPS_PPS6_Pos (6UL) /*!< PORT4 PPS: PPS6 (Bit 6) */ -#define PORT4_PPS_PPS6_Msk (0x40UL) /*!< PORT4 PPS: PPS6 (Bitfield-Mask: 0x01) */ -#define PORT4_PPS_PPS7_Pos (7UL) /*!< PORT4 PPS: PPS7 (Bit 7) */ -#define PORT4_PPS_PPS7_Msk (0x80UL) /*!< PORT4 PPS: PPS7 (Bitfield-Mask: 0x01) */ -#define PORT4_PPS_PPS8_Pos (8UL) /*!< PORT4 PPS: PPS8 (Bit 8) */ -#define PORT4_PPS_PPS8_Msk (0x100UL) /*!< PORT4 PPS: PPS8 (Bitfield-Mask: 0x01) */ -#define PORT4_PPS_PPS9_Pos (9UL) /*!< PORT4 PPS: PPS9 (Bit 9) */ -#define PORT4_PPS_PPS9_Msk (0x200UL) /*!< PORT4 PPS: PPS9 (Bitfield-Mask: 0x01) */ -#define PORT4_PPS_PPS10_Pos (10UL) /*!< PORT4 PPS: PPS10 (Bit 10) */ -#define PORT4_PPS_PPS10_Msk (0x400UL) /*!< PORT4 PPS: PPS10 (Bitfield-Mask: 0x01) */ -#define PORT4_PPS_PPS11_Pos (11UL) /*!< PORT4 PPS: PPS11 (Bit 11) */ -#define PORT4_PPS_PPS11_Msk (0x800UL) /*!< PORT4 PPS: PPS11 (Bitfield-Mask: 0x01) */ -#define PORT4_PPS_PPS12_Pos (12UL) /*!< PORT4 PPS: PPS12 (Bit 12) */ -#define PORT4_PPS_PPS12_Msk (0x1000UL) /*!< PORT4 PPS: PPS12 (Bitfield-Mask: 0x01) */ -#define PORT4_PPS_PPS13_Pos (13UL) /*!< PORT4 PPS: PPS13 (Bit 13) */ -#define PORT4_PPS_PPS13_Msk (0x2000UL) /*!< PORT4 PPS: PPS13 (Bitfield-Mask: 0x01) */ -#define PORT4_PPS_PPS14_Pos (14UL) /*!< PORT4 PPS: PPS14 (Bit 14) */ -#define PORT4_PPS_PPS14_Msk (0x4000UL) /*!< PORT4 PPS: PPS14 (Bitfield-Mask: 0x01) */ -#define PORT4_PPS_PPS15_Pos (15UL) /*!< PORT4 PPS: PPS15 (Bit 15) */ -#define PORT4_PPS_PPS15_Msk (0x8000UL) /*!< PORT4 PPS: PPS15 (Bitfield-Mask: 0x01) */ - -/* --------------------------------- PORT4_HWSEL -------------------------------- */ -#define PORT4_HWSEL_HW0_Pos (0UL) /*!< PORT4 HWSEL: HW0 (Bit 0) */ -#define PORT4_HWSEL_HW0_Msk (0x3UL) /*!< PORT4 HWSEL: HW0 (Bitfield-Mask: 0x03) */ -#define PORT4_HWSEL_HW1_Pos (2UL) /*!< PORT4 HWSEL: HW1 (Bit 2) */ -#define PORT4_HWSEL_HW1_Msk (0xcUL) /*!< PORT4 HWSEL: HW1 (Bitfield-Mask: 0x03) */ -#define PORT4_HWSEL_HW2_Pos (4UL) /*!< PORT4 HWSEL: HW2 (Bit 4) */ -#define PORT4_HWSEL_HW2_Msk (0x30UL) /*!< PORT4 HWSEL: HW2 (Bitfield-Mask: 0x03) */ -#define PORT4_HWSEL_HW3_Pos (6UL) /*!< PORT4 HWSEL: HW3 (Bit 6) */ -#define PORT4_HWSEL_HW3_Msk (0xc0UL) /*!< PORT4 HWSEL: HW3 (Bitfield-Mask: 0x03) */ -#define PORT4_HWSEL_HW4_Pos (8UL) /*!< PORT4 HWSEL: HW4 (Bit 8) */ -#define PORT4_HWSEL_HW4_Msk (0x300UL) /*!< PORT4 HWSEL: HW4 (Bitfield-Mask: 0x03) */ -#define PORT4_HWSEL_HW5_Pos (10UL) /*!< PORT4 HWSEL: HW5 (Bit 10) */ -#define PORT4_HWSEL_HW5_Msk (0xc00UL) /*!< PORT4 HWSEL: HW5 (Bitfield-Mask: 0x03) */ -#define PORT4_HWSEL_HW6_Pos (12UL) /*!< PORT4 HWSEL: HW6 (Bit 12) */ -#define PORT4_HWSEL_HW6_Msk (0x3000UL) /*!< PORT4 HWSEL: HW6 (Bitfield-Mask: 0x03) */ -#define PORT4_HWSEL_HW7_Pos (14UL) /*!< PORT4 HWSEL: HW7 (Bit 14) */ -#define PORT4_HWSEL_HW7_Msk (0xc000UL) /*!< PORT4 HWSEL: HW7 (Bitfield-Mask: 0x03) */ -#define PORT4_HWSEL_HW8_Pos (16UL) /*!< PORT4 HWSEL: HW8 (Bit 16) */ -#define PORT4_HWSEL_HW8_Msk (0x30000UL) /*!< PORT4 HWSEL: HW8 (Bitfield-Mask: 0x03) */ -#define PORT4_HWSEL_HW9_Pos (18UL) /*!< PORT4 HWSEL: HW9 (Bit 18) */ -#define PORT4_HWSEL_HW9_Msk (0xc0000UL) /*!< PORT4 HWSEL: HW9 (Bitfield-Mask: 0x03) */ -#define PORT4_HWSEL_HW10_Pos (20UL) /*!< PORT4 HWSEL: HW10 (Bit 20) */ -#define PORT4_HWSEL_HW10_Msk (0x300000UL) /*!< PORT4 HWSEL: HW10 (Bitfield-Mask: 0x03) */ -#define PORT4_HWSEL_HW11_Pos (22UL) /*!< PORT4 HWSEL: HW11 (Bit 22) */ -#define PORT4_HWSEL_HW11_Msk (0xc00000UL) /*!< PORT4 HWSEL: HW11 (Bitfield-Mask: 0x03) */ -#define PORT4_HWSEL_HW12_Pos (24UL) /*!< PORT4 HWSEL: HW12 (Bit 24) */ -#define PORT4_HWSEL_HW12_Msk (0x3000000UL) /*!< PORT4 HWSEL: HW12 (Bitfield-Mask: 0x03) */ -#define PORT4_HWSEL_HW13_Pos (26UL) /*!< PORT4 HWSEL: HW13 (Bit 26) */ -#define PORT4_HWSEL_HW13_Msk (0xc000000UL) /*!< PORT4 HWSEL: HW13 (Bitfield-Mask: 0x03) */ -#define PORT4_HWSEL_HW14_Pos (28UL) /*!< PORT4 HWSEL: HW14 (Bit 28) */ -#define PORT4_HWSEL_HW14_Msk (0x30000000UL) /*!< PORT4 HWSEL: HW14 (Bitfield-Mask: 0x03) */ -#define PORT4_HWSEL_HW15_Pos (30UL) /*!< PORT4 HWSEL: HW15 (Bit 30) */ -#define PORT4_HWSEL_HW15_Msk (0xc0000000UL) /*!< PORT4 HWSEL: HW15 (Bitfield-Mask: 0x03) */ - - -/* ================================================================================ */ -/* ================ struct 'PORT5' Position & Mask ================ */ -/* ================================================================================ */ - - -/* ---------------------------------- PORT5_OUT --------------------------------- */ -#define PORT5_OUT_P0_Pos (0UL) /*!< PORT5 OUT: P0 (Bit 0) */ -#define PORT5_OUT_P0_Msk (0x1UL) /*!< PORT5 OUT: P0 (Bitfield-Mask: 0x01) */ -#define PORT5_OUT_P1_Pos (1UL) /*!< PORT5 OUT: P1 (Bit 1) */ -#define PORT5_OUT_P1_Msk (0x2UL) /*!< PORT5 OUT: P1 (Bitfield-Mask: 0x01) */ -#define PORT5_OUT_P2_Pos (2UL) /*!< PORT5 OUT: P2 (Bit 2) */ -#define PORT5_OUT_P2_Msk (0x4UL) /*!< PORT5 OUT: P2 (Bitfield-Mask: 0x01) */ -#define PORT5_OUT_P3_Pos (3UL) /*!< PORT5 OUT: P3 (Bit 3) */ -#define PORT5_OUT_P3_Msk (0x8UL) /*!< PORT5 OUT: P3 (Bitfield-Mask: 0x01) */ -#define PORT5_OUT_P4_Pos (4UL) /*!< PORT5 OUT: P4 (Bit 4) */ -#define PORT5_OUT_P4_Msk (0x10UL) /*!< PORT5 OUT: P4 (Bitfield-Mask: 0x01) */ -#define PORT5_OUT_P5_Pos (5UL) /*!< PORT5 OUT: P5 (Bit 5) */ -#define PORT5_OUT_P5_Msk (0x20UL) /*!< PORT5 OUT: P5 (Bitfield-Mask: 0x01) */ -#define PORT5_OUT_P6_Pos (6UL) /*!< PORT5 OUT: P6 (Bit 6) */ -#define PORT5_OUT_P6_Msk (0x40UL) /*!< PORT5 OUT: P6 (Bitfield-Mask: 0x01) */ -#define PORT5_OUT_P7_Pos (7UL) /*!< PORT5 OUT: P7 (Bit 7) */ -#define PORT5_OUT_P7_Msk (0x80UL) /*!< PORT5 OUT: P7 (Bitfield-Mask: 0x01) */ -#define PORT5_OUT_P8_Pos (8UL) /*!< PORT5 OUT: P8 (Bit 8) */ -#define PORT5_OUT_P8_Msk (0x100UL) /*!< PORT5 OUT: P8 (Bitfield-Mask: 0x01) */ -#define PORT5_OUT_P9_Pos (9UL) /*!< PORT5 OUT: P9 (Bit 9) */ -#define PORT5_OUT_P9_Msk (0x200UL) /*!< PORT5 OUT: P9 (Bitfield-Mask: 0x01) */ -#define PORT5_OUT_P10_Pos (10UL) /*!< PORT5 OUT: P10 (Bit 10) */ -#define PORT5_OUT_P10_Msk (0x400UL) /*!< PORT5 OUT: P10 (Bitfield-Mask: 0x01) */ -#define PORT5_OUT_P11_Pos (11UL) /*!< PORT5 OUT: P11 (Bit 11) */ -#define PORT5_OUT_P11_Msk (0x800UL) /*!< PORT5 OUT: P11 (Bitfield-Mask: 0x01) */ -#define PORT5_OUT_P12_Pos (12UL) /*!< PORT5 OUT: P12 (Bit 12) */ -#define PORT5_OUT_P12_Msk (0x1000UL) /*!< PORT5 OUT: P12 (Bitfield-Mask: 0x01) */ -#define PORT5_OUT_P13_Pos (13UL) /*!< PORT5 OUT: P13 (Bit 13) */ -#define PORT5_OUT_P13_Msk (0x2000UL) /*!< PORT5 OUT: P13 (Bitfield-Mask: 0x01) */ -#define PORT5_OUT_P14_Pos (14UL) /*!< PORT5 OUT: P14 (Bit 14) */ -#define PORT5_OUT_P14_Msk (0x4000UL) /*!< PORT5 OUT: P14 (Bitfield-Mask: 0x01) */ -#define PORT5_OUT_P15_Pos (15UL) /*!< PORT5 OUT: P15 (Bit 15) */ -#define PORT5_OUT_P15_Msk (0x8000UL) /*!< PORT5 OUT: P15 (Bitfield-Mask: 0x01) */ - -/* ---------------------------------- PORT5_OMR --------------------------------- */ -#define PORT5_OMR_PS0_Pos (0UL) /*!< PORT5 OMR: PS0 (Bit 0) */ -#define PORT5_OMR_PS0_Msk (0x1UL) /*!< PORT5 OMR: PS0 (Bitfield-Mask: 0x01) */ -#define PORT5_OMR_PS1_Pos (1UL) /*!< PORT5 OMR: PS1 (Bit 1) */ -#define PORT5_OMR_PS1_Msk (0x2UL) /*!< PORT5 OMR: PS1 (Bitfield-Mask: 0x01) */ -#define PORT5_OMR_PS2_Pos (2UL) /*!< PORT5 OMR: PS2 (Bit 2) */ -#define PORT5_OMR_PS2_Msk (0x4UL) /*!< PORT5 OMR: PS2 (Bitfield-Mask: 0x01) */ -#define PORT5_OMR_PS3_Pos (3UL) /*!< PORT5 OMR: PS3 (Bit 3) */ -#define PORT5_OMR_PS3_Msk (0x8UL) /*!< PORT5 OMR: PS3 (Bitfield-Mask: 0x01) */ -#define PORT5_OMR_PS4_Pos (4UL) /*!< PORT5 OMR: PS4 (Bit 4) */ -#define PORT5_OMR_PS4_Msk (0x10UL) /*!< PORT5 OMR: PS4 (Bitfield-Mask: 0x01) */ -#define PORT5_OMR_PS5_Pos (5UL) /*!< PORT5 OMR: PS5 (Bit 5) */ -#define PORT5_OMR_PS5_Msk (0x20UL) /*!< PORT5 OMR: PS5 (Bitfield-Mask: 0x01) */ -#define PORT5_OMR_PS6_Pos (6UL) /*!< PORT5 OMR: PS6 (Bit 6) */ -#define PORT5_OMR_PS6_Msk (0x40UL) /*!< PORT5 OMR: PS6 (Bitfield-Mask: 0x01) */ -#define PORT5_OMR_PS7_Pos (7UL) /*!< PORT5 OMR: PS7 (Bit 7) */ -#define PORT5_OMR_PS7_Msk (0x80UL) /*!< PORT5 OMR: PS7 (Bitfield-Mask: 0x01) */ -#define PORT5_OMR_PS8_Pos (8UL) /*!< PORT5 OMR: PS8 (Bit 8) */ -#define PORT5_OMR_PS8_Msk (0x100UL) /*!< PORT5 OMR: PS8 (Bitfield-Mask: 0x01) */ -#define PORT5_OMR_PS9_Pos (9UL) /*!< PORT5 OMR: PS9 (Bit 9) */ -#define PORT5_OMR_PS9_Msk (0x200UL) /*!< PORT5 OMR: PS9 (Bitfield-Mask: 0x01) */ -#define PORT5_OMR_PS10_Pos (10UL) /*!< PORT5 OMR: PS10 (Bit 10) */ -#define PORT5_OMR_PS10_Msk (0x400UL) /*!< PORT5 OMR: PS10 (Bitfield-Mask: 0x01) */ -#define PORT5_OMR_PS11_Pos (11UL) /*!< PORT5 OMR: PS11 (Bit 11) */ -#define PORT5_OMR_PS11_Msk (0x800UL) /*!< PORT5 OMR: PS11 (Bitfield-Mask: 0x01) */ -#define PORT5_OMR_PS12_Pos (12UL) /*!< PORT5 OMR: PS12 (Bit 12) */ -#define PORT5_OMR_PS12_Msk (0x1000UL) /*!< PORT5 OMR: PS12 (Bitfield-Mask: 0x01) */ -#define PORT5_OMR_PS13_Pos (13UL) /*!< PORT5 OMR: PS13 (Bit 13) */ -#define PORT5_OMR_PS13_Msk (0x2000UL) /*!< PORT5 OMR: PS13 (Bitfield-Mask: 0x01) */ -#define PORT5_OMR_PS14_Pos (14UL) /*!< PORT5 OMR: PS14 (Bit 14) */ -#define PORT5_OMR_PS14_Msk (0x4000UL) /*!< PORT5 OMR: PS14 (Bitfield-Mask: 0x01) */ -#define PORT5_OMR_PS15_Pos (15UL) /*!< PORT5 OMR: PS15 (Bit 15) */ -#define PORT5_OMR_PS15_Msk (0x8000UL) /*!< PORT5 OMR: PS15 (Bitfield-Mask: 0x01) */ -#define PORT5_OMR_PR0_Pos (16UL) /*!< PORT5 OMR: PR0 (Bit 16) */ -#define PORT5_OMR_PR0_Msk (0x10000UL) /*!< PORT5 OMR: PR0 (Bitfield-Mask: 0x01) */ -#define PORT5_OMR_PR1_Pos (17UL) /*!< PORT5 OMR: PR1 (Bit 17) */ -#define PORT5_OMR_PR1_Msk (0x20000UL) /*!< PORT5 OMR: PR1 (Bitfield-Mask: 0x01) */ -#define PORT5_OMR_PR2_Pos (18UL) /*!< PORT5 OMR: PR2 (Bit 18) */ -#define PORT5_OMR_PR2_Msk (0x40000UL) /*!< PORT5 OMR: PR2 (Bitfield-Mask: 0x01) */ -#define PORT5_OMR_PR3_Pos (19UL) /*!< PORT5 OMR: PR3 (Bit 19) */ -#define PORT5_OMR_PR3_Msk (0x80000UL) /*!< PORT5 OMR: PR3 (Bitfield-Mask: 0x01) */ -#define PORT5_OMR_PR4_Pos (20UL) /*!< PORT5 OMR: PR4 (Bit 20) */ -#define PORT5_OMR_PR4_Msk (0x100000UL) /*!< PORT5 OMR: PR4 (Bitfield-Mask: 0x01) */ -#define PORT5_OMR_PR5_Pos (21UL) /*!< PORT5 OMR: PR5 (Bit 21) */ -#define PORT5_OMR_PR5_Msk (0x200000UL) /*!< PORT5 OMR: PR5 (Bitfield-Mask: 0x01) */ -#define PORT5_OMR_PR6_Pos (22UL) /*!< PORT5 OMR: PR6 (Bit 22) */ -#define PORT5_OMR_PR6_Msk (0x400000UL) /*!< PORT5 OMR: PR6 (Bitfield-Mask: 0x01) */ -#define PORT5_OMR_PR7_Pos (23UL) /*!< PORT5 OMR: PR7 (Bit 23) */ -#define PORT5_OMR_PR7_Msk (0x800000UL) /*!< PORT5 OMR: PR7 (Bitfield-Mask: 0x01) */ -#define PORT5_OMR_PR8_Pos (24UL) /*!< PORT5 OMR: PR8 (Bit 24) */ -#define PORT5_OMR_PR8_Msk (0x1000000UL) /*!< PORT5 OMR: PR8 (Bitfield-Mask: 0x01) */ -#define PORT5_OMR_PR9_Pos (25UL) /*!< PORT5 OMR: PR9 (Bit 25) */ -#define PORT5_OMR_PR9_Msk (0x2000000UL) /*!< PORT5 OMR: PR9 (Bitfield-Mask: 0x01) */ -#define PORT5_OMR_PR10_Pos (26UL) /*!< PORT5 OMR: PR10 (Bit 26) */ -#define PORT5_OMR_PR10_Msk (0x4000000UL) /*!< PORT5 OMR: PR10 (Bitfield-Mask: 0x01) */ -#define PORT5_OMR_PR11_Pos (27UL) /*!< PORT5 OMR: PR11 (Bit 27) */ -#define PORT5_OMR_PR11_Msk (0x8000000UL) /*!< PORT5 OMR: PR11 (Bitfield-Mask: 0x01) */ -#define PORT5_OMR_PR12_Pos (28UL) /*!< PORT5 OMR: PR12 (Bit 28) */ -#define PORT5_OMR_PR12_Msk (0x10000000UL) /*!< PORT5 OMR: PR12 (Bitfield-Mask: 0x01) */ -#define PORT5_OMR_PR13_Pos (29UL) /*!< PORT5 OMR: PR13 (Bit 29) */ -#define PORT5_OMR_PR13_Msk (0x20000000UL) /*!< PORT5 OMR: PR13 (Bitfield-Mask: 0x01) */ -#define PORT5_OMR_PR14_Pos (30UL) /*!< PORT5 OMR: PR14 (Bit 30) */ -#define PORT5_OMR_PR14_Msk (0x40000000UL) /*!< PORT5 OMR: PR14 (Bitfield-Mask: 0x01) */ -#define PORT5_OMR_PR15_Pos (31UL) /*!< PORT5 OMR: PR15 (Bit 31) */ -#define PORT5_OMR_PR15_Msk (0x80000000UL) /*!< PORT5 OMR: PR15 (Bitfield-Mask: 0x01) */ - -/* --------------------------------- PORT5_IOCR0 -------------------------------- */ -#define PORT5_IOCR0_PC0_Pos (3UL) /*!< PORT5 IOCR0: PC0 (Bit 3) */ -#define PORT5_IOCR0_PC0_Msk (0xf8UL) /*!< PORT5 IOCR0: PC0 (Bitfield-Mask: 0x1f) */ -#define PORT5_IOCR0_PC1_Pos (11UL) /*!< PORT5 IOCR0: PC1 (Bit 11) */ -#define PORT5_IOCR0_PC1_Msk (0xf800UL) /*!< PORT5 IOCR0: PC1 (Bitfield-Mask: 0x1f) */ -#define PORT5_IOCR0_PC2_Pos (19UL) /*!< PORT5 IOCR0: PC2 (Bit 19) */ -#define PORT5_IOCR0_PC2_Msk (0xf80000UL) /*!< PORT5 IOCR0: PC2 (Bitfield-Mask: 0x1f) */ -#define PORT5_IOCR0_PC3_Pos (27UL) /*!< PORT5 IOCR0: PC3 (Bit 27) */ -#define PORT5_IOCR0_PC3_Msk (0xf8000000UL) /*!< PORT5 IOCR0: PC3 (Bitfield-Mask: 0x1f) */ - -/* --------------------------------- PORT5_IOCR4 -------------------------------- */ -#define PORT5_IOCR4_PC4_Pos (3UL) /*!< PORT5 IOCR4: PC4 (Bit 3) */ -#define PORT5_IOCR4_PC4_Msk (0xf8UL) /*!< PORT5 IOCR4: PC4 (Bitfield-Mask: 0x1f) */ -#define PORT5_IOCR4_PC5_Pos (11UL) /*!< PORT5 IOCR4: PC5 (Bit 11) */ -#define PORT5_IOCR4_PC5_Msk (0xf800UL) /*!< PORT5 IOCR4: PC5 (Bitfield-Mask: 0x1f) */ -#define PORT5_IOCR4_PC6_Pos (19UL) /*!< PORT5 IOCR4: PC6 (Bit 19) */ -#define PORT5_IOCR4_PC6_Msk (0xf80000UL) /*!< PORT5 IOCR4: PC6 (Bitfield-Mask: 0x1f) */ -#define PORT5_IOCR4_PC7_Pos (27UL) /*!< PORT5 IOCR4: PC7 (Bit 27) */ -#define PORT5_IOCR4_PC7_Msk (0xf8000000UL) /*!< PORT5 IOCR4: PC7 (Bitfield-Mask: 0x1f) */ - -/* --------------------------------- PORT5_IOCR8 -------------------------------- */ -#define PORT5_IOCR8_PC8_Pos (3UL) /*!< PORT5 IOCR8: PC8 (Bit 3) */ -#define PORT5_IOCR8_PC8_Msk (0xf8UL) /*!< PORT5 IOCR8: PC8 (Bitfield-Mask: 0x1f) */ -#define PORT5_IOCR8_PC9_Pos (11UL) /*!< PORT5 IOCR8: PC9 (Bit 11) */ -#define PORT5_IOCR8_PC9_Msk (0xf800UL) /*!< PORT5 IOCR8: PC9 (Bitfield-Mask: 0x1f) */ -#define PORT5_IOCR8_PC10_Pos (19UL) /*!< PORT5 IOCR8: PC10 (Bit 19) */ -#define PORT5_IOCR8_PC10_Msk (0xf80000UL) /*!< PORT5 IOCR8: PC10 (Bitfield-Mask: 0x1f) */ -#define PORT5_IOCR8_PC11_Pos (27UL) /*!< PORT5 IOCR8: PC11 (Bit 27) */ -#define PORT5_IOCR8_PC11_Msk (0xf8000000UL) /*!< PORT5 IOCR8: PC11 (Bitfield-Mask: 0x1f) */ - -/* ---------------------------------- PORT5_IN ---------------------------------- */ -#define PORT5_IN_P0_Pos (0UL) /*!< PORT5 IN: P0 (Bit 0) */ -#define PORT5_IN_P0_Msk (0x1UL) /*!< PORT5 IN: P0 (Bitfield-Mask: 0x01) */ -#define PORT5_IN_P1_Pos (1UL) /*!< PORT5 IN: P1 (Bit 1) */ -#define PORT5_IN_P1_Msk (0x2UL) /*!< PORT5 IN: P1 (Bitfield-Mask: 0x01) */ -#define PORT5_IN_P2_Pos (2UL) /*!< PORT5 IN: P2 (Bit 2) */ -#define PORT5_IN_P2_Msk (0x4UL) /*!< PORT5 IN: P2 (Bitfield-Mask: 0x01) */ -#define PORT5_IN_P3_Pos (3UL) /*!< PORT5 IN: P3 (Bit 3) */ -#define PORT5_IN_P3_Msk (0x8UL) /*!< PORT5 IN: P3 (Bitfield-Mask: 0x01) */ -#define PORT5_IN_P4_Pos (4UL) /*!< PORT5 IN: P4 (Bit 4) */ -#define PORT5_IN_P4_Msk (0x10UL) /*!< PORT5 IN: P4 (Bitfield-Mask: 0x01) */ -#define PORT5_IN_P5_Pos (5UL) /*!< PORT5 IN: P5 (Bit 5) */ -#define PORT5_IN_P5_Msk (0x20UL) /*!< PORT5 IN: P5 (Bitfield-Mask: 0x01) */ -#define PORT5_IN_P6_Pos (6UL) /*!< PORT5 IN: P6 (Bit 6) */ -#define PORT5_IN_P6_Msk (0x40UL) /*!< PORT5 IN: P6 (Bitfield-Mask: 0x01) */ -#define PORT5_IN_P7_Pos (7UL) /*!< PORT5 IN: P7 (Bit 7) */ -#define PORT5_IN_P7_Msk (0x80UL) /*!< PORT5 IN: P7 (Bitfield-Mask: 0x01) */ -#define PORT5_IN_P8_Pos (8UL) /*!< PORT5 IN: P8 (Bit 8) */ -#define PORT5_IN_P8_Msk (0x100UL) /*!< PORT5 IN: P8 (Bitfield-Mask: 0x01) */ -#define PORT5_IN_P9_Pos (9UL) /*!< PORT5 IN: P9 (Bit 9) */ -#define PORT5_IN_P9_Msk (0x200UL) /*!< PORT5 IN: P9 (Bitfield-Mask: 0x01) */ -#define PORT5_IN_P10_Pos (10UL) /*!< PORT5 IN: P10 (Bit 10) */ -#define PORT5_IN_P10_Msk (0x400UL) /*!< PORT5 IN: P10 (Bitfield-Mask: 0x01) */ -#define PORT5_IN_P11_Pos (11UL) /*!< PORT5 IN: P11 (Bit 11) */ -#define PORT5_IN_P11_Msk (0x800UL) /*!< PORT5 IN: P11 (Bitfield-Mask: 0x01) */ -#define PORT5_IN_P12_Pos (12UL) /*!< PORT5 IN: P12 (Bit 12) */ -#define PORT5_IN_P12_Msk (0x1000UL) /*!< PORT5 IN: P12 (Bitfield-Mask: 0x01) */ -#define PORT5_IN_P13_Pos (13UL) /*!< PORT5 IN: P13 (Bit 13) */ -#define PORT5_IN_P13_Msk (0x2000UL) /*!< PORT5 IN: P13 (Bitfield-Mask: 0x01) */ -#define PORT5_IN_P14_Pos (14UL) /*!< PORT5 IN: P14 (Bit 14) */ -#define PORT5_IN_P14_Msk (0x4000UL) /*!< PORT5 IN: P14 (Bitfield-Mask: 0x01) */ -#define PORT5_IN_P15_Pos (15UL) /*!< PORT5 IN: P15 (Bit 15) */ -#define PORT5_IN_P15_Msk (0x8000UL) /*!< PORT5 IN: P15 (Bitfield-Mask: 0x01) */ - -/* --------------------------------- PORT5_PDR0 --------------------------------- */ -#define PORT5_PDR0_PD0_Pos (0UL) /*!< PORT5 PDR0: PD0 (Bit 0) */ -#define PORT5_PDR0_PD0_Msk (0x7UL) /*!< PORT5 PDR0: PD0 (Bitfield-Mask: 0x07) */ -#define PORT5_PDR0_PD1_Pos (4UL) /*!< PORT5 PDR0: PD1 (Bit 4) */ -#define PORT5_PDR0_PD1_Msk (0x70UL) /*!< PORT5 PDR0: PD1 (Bitfield-Mask: 0x07) */ -#define PORT5_PDR0_PD2_Pos (8UL) /*!< PORT5 PDR0: PD2 (Bit 8) */ -#define PORT5_PDR0_PD2_Msk (0x700UL) /*!< PORT5 PDR0: PD2 (Bitfield-Mask: 0x07) */ -#define PORT5_PDR0_PD3_Pos (12UL) /*!< PORT5 PDR0: PD3 (Bit 12) */ -#define PORT5_PDR0_PD3_Msk (0x7000UL) /*!< PORT5 PDR0: PD3 (Bitfield-Mask: 0x07) */ -#define PORT5_PDR0_PD4_Pos (16UL) /*!< PORT5 PDR0: PD4 (Bit 16) */ -#define PORT5_PDR0_PD4_Msk (0x70000UL) /*!< PORT5 PDR0: PD4 (Bitfield-Mask: 0x07) */ -#define PORT5_PDR0_PD5_Pos (20UL) /*!< PORT5 PDR0: PD5 (Bit 20) */ -#define PORT5_PDR0_PD5_Msk (0x700000UL) /*!< PORT5 PDR0: PD5 (Bitfield-Mask: 0x07) */ -#define PORT5_PDR0_PD6_Pos (24UL) /*!< PORT5 PDR0: PD6 (Bit 24) */ -#define PORT5_PDR0_PD6_Msk (0x7000000UL) /*!< PORT5 PDR0: PD6 (Bitfield-Mask: 0x07) */ -#define PORT5_PDR0_PD7_Pos (28UL) /*!< PORT5 PDR0: PD7 (Bit 28) */ -#define PORT5_PDR0_PD7_Msk (0x70000000UL) /*!< PORT5 PDR0: PD7 (Bitfield-Mask: 0x07) */ - -/* --------------------------------- PORT5_PDR1 --------------------------------- */ -#define PORT5_PDR1_PD8_Pos (0UL) /*!< PORT5 PDR1: PD8 (Bit 0) */ -#define PORT5_PDR1_PD8_Msk (0x7UL) /*!< PORT5 PDR1: PD8 (Bitfield-Mask: 0x07) */ -#define PORT5_PDR1_PD9_Pos (4UL) /*!< PORT5 PDR1: PD9 (Bit 4) */ -#define PORT5_PDR1_PD9_Msk (0x70UL) /*!< PORT5 PDR1: PD9 (Bitfield-Mask: 0x07) */ -#define PORT5_PDR1_PD10_Pos (8UL) /*!< PORT5 PDR1: PD10 (Bit 8) */ -#define PORT5_PDR1_PD10_Msk (0x700UL) /*!< PORT5 PDR1: PD10 (Bitfield-Mask: 0x07) */ -#define PORT5_PDR1_PD11_Pos (12UL) /*!< PORT5 PDR1: PD11 (Bit 12) */ -#define PORT5_PDR1_PD11_Msk (0x7000UL) /*!< PORT5 PDR1: PD11 (Bitfield-Mask: 0x07) */ -#define PORT5_PDR1_PD12_Pos (16UL) /*!< PORT5 PDR1: PD12 (Bit 16) */ -#define PORT5_PDR1_PD12_Msk (0x70000UL) /*!< PORT5 PDR1: PD12 (Bitfield-Mask: 0x07) */ -#define PORT5_PDR1_PD13_Pos (20UL) /*!< PORT5 PDR1: PD13 (Bit 20) */ -#define PORT5_PDR1_PD13_Msk (0x700000UL) /*!< PORT5 PDR1: PD13 (Bitfield-Mask: 0x07) */ -#define PORT5_PDR1_PD14_Pos (24UL) /*!< PORT5 PDR1: PD14 (Bit 24) */ -#define PORT5_PDR1_PD14_Msk (0x7000000UL) /*!< PORT5 PDR1: PD14 (Bitfield-Mask: 0x07) */ -#define PORT5_PDR1_PD15_Pos (28UL) /*!< PORT5 PDR1: PD15 (Bit 28) */ -#define PORT5_PDR1_PD15_Msk (0x70000000UL) /*!< PORT5 PDR1: PD15 (Bitfield-Mask: 0x07) */ - -/* --------------------------------- PORT5_PDISC -------------------------------- */ -#define PORT5_PDISC_PDIS0_Pos (0UL) /*!< PORT5 PDISC: PDIS0 (Bit 0) */ -#define PORT5_PDISC_PDIS0_Msk (0x1UL) /*!< PORT5 PDISC: PDIS0 (Bitfield-Mask: 0x01) */ -#define PORT5_PDISC_PDIS1_Pos (1UL) /*!< PORT5 PDISC: PDIS1 (Bit 1) */ -#define PORT5_PDISC_PDIS1_Msk (0x2UL) /*!< PORT5 PDISC: PDIS1 (Bitfield-Mask: 0x01) */ -#define PORT5_PDISC_PDIS2_Pos (2UL) /*!< PORT5 PDISC: PDIS2 (Bit 2) */ -#define PORT5_PDISC_PDIS2_Msk (0x4UL) /*!< PORT5 PDISC: PDIS2 (Bitfield-Mask: 0x01) */ -#define PORT5_PDISC_PDIS3_Pos (3UL) /*!< PORT5 PDISC: PDIS3 (Bit 3) */ -#define PORT5_PDISC_PDIS3_Msk (0x8UL) /*!< PORT5 PDISC: PDIS3 (Bitfield-Mask: 0x01) */ -#define PORT5_PDISC_PDIS4_Pos (4UL) /*!< PORT5 PDISC: PDIS4 (Bit 4) */ -#define PORT5_PDISC_PDIS4_Msk (0x10UL) /*!< PORT5 PDISC: PDIS4 (Bitfield-Mask: 0x01) */ -#define PORT5_PDISC_PDIS5_Pos (5UL) /*!< PORT5 PDISC: PDIS5 (Bit 5) */ -#define PORT5_PDISC_PDIS5_Msk (0x20UL) /*!< PORT5 PDISC: PDIS5 (Bitfield-Mask: 0x01) */ -#define PORT5_PDISC_PDIS6_Pos (6UL) /*!< PORT5 PDISC: PDIS6 (Bit 6) */ -#define PORT5_PDISC_PDIS6_Msk (0x40UL) /*!< PORT5 PDISC: PDIS6 (Bitfield-Mask: 0x01) */ -#define PORT5_PDISC_PDIS7_Pos (7UL) /*!< PORT5 PDISC: PDIS7 (Bit 7) */ -#define PORT5_PDISC_PDIS7_Msk (0x80UL) /*!< PORT5 PDISC: PDIS7 (Bitfield-Mask: 0x01) */ -#define PORT5_PDISC_PDIS8_Pos (8UL) /*!< PORT5 PDISC: PDIS8 (Bit 8) */ -#define PORT5_PDISC_PDIS8_Msk (0x100UL) /*!< PORT5 PDISC: PDIS8 (Bitfield-Mask: 0x01) */ -#define PORT5_PDISC_PDIS9_Pos (9UL) /*!< PORT5 PDISC: PDIS9 (Bit 9) */ -#define PORT5_PDISC_PDIS9_Msk (0x200UL) /*!< PORT5 PDISC: PDIS9 (Bitfield-Mask: 0x01) */ -#define PORT5_PDISC_PDIS10_Pos (10UL) /*!< PORT5 PDISC: PDIS10 (Bit 10) */ -#define PORT5_PDISC_PDIS10_Msk (0x400UL) /*!< PORT5 PDISC: PDIS10 (Bitfield-Mask: 0x01) */ -#define PORT5_PDISC_PDIS11_Pos (11UL) /*!< PORT5 PDISC: PDIS11 (Bit 11) */ -#define PORT5_PDISC_PDIS11_Msk (0x800UL) /*!< PORT5 PDISC: PDIS11 (Bitfield-Mask: 0x01) */ -#define PORT5_PDISC_PDIS12_Pos (12UL) /*!< PORT5 PDISC: PDIS12 (Bit 12) */ -#define PORT5_PDISC_PDIS12_Msk (0x1000UL) /*!< PORT5 PDISC: PDIS12 (Bitfield-Mask: 0x01) */ -#define PORT5_PDISC_PDIS13_Pos (13UL) /*!< PORT5 PDISC: PDIS13 (Bit 13) */ -#define PORT5_PDISC_PDIS13_Msk (0x2000UL) /*!< PORT5 PDISC: PDIS13 (Bitfield-Mask: 0x01) */ -#define PORT5_PDISC_PDIS14_Pos (14UL) /*!< PORT5 PDISC: PDIS14 (Bit 14) */ -#define PORT5_PDISC_PDIS14_Msk (0x4000UL) /*!< PORT5 PDISC: PDIS14 (Bitfield-Mask: 0x01) */ -#define PORT5_PDISC_PDIS15_Pos (15UL) /*!< PORT5 PDISC: PDIS15 (Bit 15) */ -#define PORT5_PDISC_PDIS15_Msk (0x8000UL) /*!< PORT5 PDISC: PDIS15 (Bitfield-Mask: 0x01) */ - -/* ---------------------------------- PORT5_PPS --------------------------------- */ -#define PORT5_PPS_PPS0_Pos (0UL) /*!< PORT5 PPS: PPS0 (Bit 0) */ -#define PORT5_PPS_PPS0_Msk (0x1UL) /*!< PORT5 PPS: PPS0 (Bitfield-Mask: 0x01) */ -#define PORT5_PPS_PPS1_Pos (1UL) /*!< PORT5 PPS: PPS1 (Bit 1) */ -#define PORT5_PPS_PPS1_Msk (0x2UL) /*!< PORT5 PPS: PPS1 (Bitfield-Mask: 0x01) */ -#define PORT5_PPS_PPS2_Pos (2UL) /*!< PORT5 PPS: PPS2 (Bit 2) */ -#define PORT5_PPS_PPS2_Msk (0x4UL) /*!< PORT5 PPS: PPS2 (Bitfield-Mask: 0x01) */ -#define PORT5_PPS_PPS3_Pos (3UL) /*!< PORT5 PPS: PPS3 (Bit 3) */ -#define PORT5_PPS_PPS3_Msk (0x8UL) /*!< PORT5 PPS: PPS3 (Bitfield-Mask: 0x01) */ -#define PORT5_PPS_PPS4_Pos (4UL) /*!< PORT5 PPS: PPS4 (Bit 4) */ -#define PORT5_PPS_PPS4_Msk (0x10UL) /*!< PORT5 PPS: PPS4 (Bitfield-Mask: 0x01) */ -#define PORT5_PPS_PPS5_Pos (5UL) /*!< PORT5 PPS: PPS5 (Bit 5) */ -#define PORT5_PPS_PPS5_Msk (0x20UL) /*!< PORT5 PPS: PPS5 (Bitfield-Mask: 0x01) */ -#define PORT5_PPS_PPS6_Pos (6UL) /*!< PORT5 PPS: PPS6 (Bit 6) */ -#define PORT5_PPS_PPS6_Msk (0x40UL) /*!< PORT5 PPS: PPS6 (Bitfield-Mask: 0x01) */ -#define PORT5_PPS_PPS7_Pos (7UL) /*!< PORT5 PPS: PPS7 (Bit 7) */ -#define PORT5_PPS_PPS7_Msk (0x80UL) /*!< PORT5 PPS: PPS7 (Bitfield-Mask: 0x01) */ -#define PORT5_PPS_PPS8_Pos (8UL) /*!< PORT5 PPS: PPS8 (Bit 8) */ -#define PORT5_PPS_PPS8_Msk (0x100UL) /*!< PORT5 PPS: PPS8 (Bitfield-Mask: 0x01) */ -#define PORT5_PPS_PPS9_Pos (9UL) /*!< PORT5 PPS: PPS9 (Bit 9) */ -#define PORT5_PPS_PPS9_Msk (0x200UL) /*!< PORT5 PPS: PPS9 (Bitfield-Mask: 0x01) */ -#define PORT5_PPS_PPS10_Pos (10UL) /*!< PORT5 PPS: PPS10 (Bit 10) */ -#define PORT5_PPS_PPS10_Msk (0x400UL) /*!< PORT5 PPS: PPS10 (Bitfield-Mask: 0x01) */ -#define PORT5_PPS_PPS11_Pos (11UL) /*!< PORT5 PPS: PPS11 (Bit 11) */ -#define PORT5_PPS_PPS11_Msk (0x800UL) /*!< PORT5 PPS: PPS11 (Bitfield-Mask: 0x01) */ -#define PORT5_PPS_PPS12_Pos (12UL) /*!< PORT5 PPS: PPS12 (Bit 12) */ -#define PORT5_PPS_PPS12_Msk (0x1000UL) /*!< PORT5 PPS: PPS12 (Bitfield-Mask: 0x01) */ -#define PORT5_PPS_PPS13_Pos (13UL) /*!< PORT5 PPS: PPS13 (Bit 13) */ -#define PORT5_PPS_PPS13_Msk (0x2000UL) /*!< PORT5 PPS: PPS13 (Bitfield-Mask: 0x01) */ -#define PORT5_PPS_PPS14_Pos (14UL) /*!< PORT5 PPS: PPS14 (Bit 14) */ -#define PORT5_PPS_PPS14_Msk (0x4000UL) /*!< PORT5 PPS: PPS14 (Bitfield-Mask: 0x01) */ -#define PORT5_PPS_PPS15_Pos (15UL) /*!< PORT5 PPS: PPS15 (Bit 15) */ -#define PORT5_PPS_PPS15_Msk (0x8000UL) /*!< PORT5 PPS: PPS15 (Bitfield-Mask: 0x01) */ - -/* --------------------------------- PORT5_HWSEL -------------------------------- */ -#define PORT5_HWSEL_HW0_Pos (0UL) /*!< PORT5 HWSEL: HW0 (Bit 0) */ -#define PORT5_HWSEL_HW0_Msk (0x3UL) /*!< PORT5 HWSEL: HW0 (Bitfield-Mask: 0x03) */ -#define PORT5_HWSEL_HW1_Pos (2UL) /*!< PORT5 HWSEL: HW1 (Bit 2) */ -#define PORT5_HWSEL_HW1_Msk (0xcUL) /*!< PORT5 HWSEL: HW1 (Bitfield-Mask: 0x03) */ -#define PORT5_HWSEL_HW2_Pos (4UL) /*!< PORT5 HWSEL: HW2 (Bit 4) */ -#define PORT5_HWSEL_HW2_Msk (0x30UL) /*!< PORT5 HWSEL: HW2 (Bitfield-Mask: 0x03) */ -#define PORT5_HWSEL_HW3_Pos (6UL) /*!< PORT5 HWSEL: HW3 (Bit 6) */ -#define PORT5_HWSEL_HW3_Msk (0xc0UL) /*!< PORT5 HWSEL: HW3 (Bitfield-Mask: 0x03) */ -#define PORT5_HWSEL_HW4_Pos (8UL) /*!< PORT5 HWSEL: HW4 (Bit 8) */ -#define PORT5_HWSEL_HW4_Msk (0x300UL) /*!< PORT5 HWSEL: HW4 (Bitfield-Mask: 0x03) */ -#define PORT5_HWSEL_HW5_Pos (10UL) /*!< PORT5 HWSEL: HW5 (Bit 10) */ -#define PORT5_HWSEL_HW5_Msk (0xc00UL) /*!< PORT5 HWSEL: HW5 (Bitfield-Mask: 0x03) */ -#define PORT5_HWSEL_HW6_Pos (12UL) /*!< PORT5 HWSEL: HW6 (Bit 12) */ -#define PORT5_HWSEL_HW6_Msk (0x3000UL) /*!< PORT5 HWSEL: HW6 (Bitfield-Mask: 0x03) */ -#define PORT5_HWSEL_HW7_Pos (14UL) /*!< PORT5 HWSEL: HW7 (Bit 14) */ -#define PORT5_HWSEL_HW7_Msk (0xc000UL) /*!< PORT5 HWSEL: HW7 (Bitfield-Mask: 0x03) */ -#define PORT5_HWSEL_HW8_Pos (16UL) /*!< PORT5 HWSEL: HW8 (Bit 16) */ -#define PORT5_HWSEL_HW8_Msk (0x30000UL) /*!< PORT5 HWSEL: HW8 (Bitfield-Mask: 0x03) */ -#define PORT5_HWSEL_HW9_Pos (18UL) /*!< PORT5 HWSEL: HW9 (Bit 18) */ -#define PORT5_HWSEL_HW9_Msk (0xc0000UL) /*!< PORT5 HWSEL: HW9 (Bitfield-Mask: 0x03) */ -#define PORT5_HWSEL_HW10_Pos (20UL) /*!< PORT5 HWSEL: HW10 (Bit 20) */ -#define PORT5_HWSEL_HW10_Msk (0x300000UL) /*!< PORT5 HWSEL: HW10 (Bitfield-Mask: 0x03) */ -#define PORT5_HWSEL_HW11_Pos (22UL) /*!< PORT5 HWSEL: HW11 (Bit 22) */ -#define PORT5_HWSEL_HW11_Msk (0xc00000UL) /*!< PORT5 HWSEL: HW11 (Bitfield-Mask: 0x03) */ -#define PORT5_HWSEL_HW12_Pos (24UL) /*!< PORT5 HWSEL: HW12 (Bit 24) */ -#define PORT5_HWSEL_HW12_Msk (0x3000000UL) /*!< PORT5 HWSEL: HW12 (Bitfield-Mask: 0x03) */ -#define PORT5_HWSEL_HW13_Pos (26UL) /*!< PORT5 HWSEL: HW13 (Bit 26) */ -#define PORT5_HWSEL_HW13_Msk (0xc000000UL) /*!< PORT5 HWSEL: HW13 (Bitfield-Mask: 0x03) */ -#define PORT5_HWSEL_HW14_Pos (28UL) /*!< PORT5 HWSEL: HW14 (Bit 28) */ -#define PORT5_HWSEL_HW14_Msk (0x30000000UL) /*!< PORT5 HWSEL: HW14 (Bitfield-Mask: 0x03) */ -#define PORT5_HWSEL_HW15_Pos (30UL) /*!< PORT5 HWSEL: HW15 (Bit 30) */ -#define PORT5_HWSEL_HW15_Msk (0xc0000000UL) /*!< PORT5 HWSEL: HW15 (Bitfield-Mask: 0x03) */ - - -/* ================================================================================ */ -/* ================ struct 'PORT6' Position & Mask ================ */ -/* ================================================================================ */ - - -/* ---------------------------------- PORT6_OUT --------------------------------- */ -#define PORT6_OUT_P0_Pos (0UL) /*!< PORT6 OUT: P0 (Bit 0) */ -#define PORT6_OUT_P0_Msk (0x1UL) /*!< PORT6 OUT: P0 (Bitfield-Mask: 0x01) */ -#define PORT6_OUT_P1_Pos (1UL) /*!< PORT6 OUT: P1 (Bit 1) */ -#define PORT6_OUT_P1_Msk (0x2UL) /*!< PORT6 OUT: P1 (Bitfield-Mask: 0x01) */ -#define PORT6_OUT_P2_Pos (2UL) /*!< PORT6 OUT: P2 (Bit 2) */ -#define PORT6_OUT_P2_Msk (0x4UL) /*!< PORT6 OUT: P2 (Bitfield-Mask: 0x01) */ -#define PORT6_OUT_P3_Pos (3UL) /*!< PORT6 OUT: P3 (Bit 3) */ -#define PORT6_OUT_P3_Msk (0x8UL) /*!< PORT6 OUT: P3 (Bitfield-Mask: 0x01) */ -#define PORT6_OUT_P4_Pos (4UL) /*!< PORT6 OUT: P4 (Bit 4) */ -#define PORT6_OUT_P4_Msk (0x10UL) /*!< PORT6 OUT: P4 (Bitfield-Mask: 0x01) */ -#define PORT6_OUT_P5_Pos (5UL) /*!< PORT6 OUT: P5 (Bit 5) */ -#define PORT6_OUT_P5_Msk (0x20UL) /*!< PORT6 OUT: P5 (Bitfield-Mask: 0x01) */ -#define PORT6_OUT_P6_Pos (6UL) /*!< PORT6 OUT: P6 (Bit 6) */ -#define PORT6_OUT_P6_Msk (0x40UL) /*!< PORT6 OUT: P6 (Bitfield-Mask: 0x01) */ -#define PORT6_OUT_P7_Pos (7UL) /*!< PORT6 OUT: P7 (Bit 7) */ -#define PORT6_OUT_P7_Msk (0x80UL) /*!< PORT6 OUT: P7 (Bitfield-Mask: 0x01) */ -#define PORT6_OUT_P8_Pos (8UL) /*!< PORT6 OUT: P8 (Bit 8) */ -#define PORT6_OUT_P8_Msk (0x100UL) /*!< PORT6 OUT: P8 (Bitfield-Mask: 0x01) */ -#define PORT6_OUT_P9_Pos (9UL) /*!< PORT6 OUT: P9 (Bit 9) */ -#define PORT6_OUT_P9_Msk (0x200UL) /*!< PORT6 OUT: P9 (Bitfield-Mask: 0x01) */ -#define PORT6_OUT_P10_Pos (10UL) /*!< PORT6 OUT: P10 (Bit 10) */ -#define PORT6_OUT_P10_Msk (0x400UL) /*!< PORT6 OUT: P10 (Bitfield-Mask: 0x01) */ -#define PORT6_OUT_P11_Pos (11UL) /*!< PORT6 OUT: P11 (Bit 11) */ -#define PORT6_OUT_P11_Msk (0x800UL) /*!< PORT6 OUT: P11 (Bitfield-Mask: 0x01) */ -#define PORT6_OUT_P12_Pos (12UL) /*!< PORT6 OUT: P12 (Bit 12) */ -#define PORT6_OUT_P12_Msk (0x1000UL) /*!< PORT6 OUT: P12 (Bitfield-Mask: 0x01) */ -#define PORT6_OUT_P13_Pos (13UL) /*!< PORT6 OUT: P13 (Bit 13) */ -#define PORT6_OUT_P13_Msk (0x2000UL) /*!< PORT6 OUT: P13 (Bitfield-Mask: 0x01) */ -#define PORT6_OUT_P14_Pos (14UL) /*!< PORT6 OUT: P14 (Bit 14) */ -#define PORT6_OUT_P14_Msk (0x4000UL) /*!< PORT6 OUT: P14 (Bitfield-Mask: 0x01) */ -#define PORT6_OUT_P15_Pos (15UL) /*!< PORT6 OUT: P15 (Bit 15) */ -#define PORT6_OUT_P15_Msk (0x8000UL) /*!< PORT6 OUT: P15 (Bitfield-Mask: 0x01) */ - -/* ---------------------------------- PORT6_OMR --------------------------------- */ -#define PORT6_OMR_PS0_Pos (0UL) /*!< PORT6 OMR: PS0 (Bit 0) */ -#define PORT6_OMR_PS0_Msk (0x1UL) /*!< PORT6 OMR: PS0 (Bitfield-Mask: 0x01) */ -#define PORT6_OMR_PS1_Pos (1UL) /*!< PORT6 OMR: PS1 (Bit 1) */ -#define PORT6_OMR_PS1_Msk (0x2UL) /*!< PORT6 OMR: PS1 (Bitfield-Mask: 0x01) */ -#define PORT6_OMR_PS2_Pos (2UL) /*!< PORT6 OMR: PS2 (Bit 2) */ -#define PORT6_OMR_PS2_Msk (0x4UL) /*!< PORT6 OMR: PS2 (Bitfield-Mask: 0x01) */ -#define PORT6_OMR_PS3_Pos (3UL) /*!< PORT6 OMR: PS3 (Bit 3) */ -#define PORT6_OMR_PS3_Msk (0x8UL) /*!< PORT6 OMR: PS3 (Bitfield-Mask: 0x01) */ -#define PORT6_OMR_PS4_Pos (4UL) /*!< PORT6 OMR: PS4 (Bit 4) */ -#define PORT6_OMR_PS4_Msk (0x10UL) /*!< PORT6 OMR: PS4 (Bitfield-Mask: 0x01) */ -#define PORT6_OMR_PS5_Pos (5UL) /*!< PORT6 OMR: PS5 (Bit 5) */ -#define PORT6_OMR_PS5_Msk (0x20UL) /*!< PORT6 OMR: PS5 (Bitfield-Mask: 0x01) */ -#define PORT6_OMR_PS6_Pos (6UL) /*!< PORT6 OMR: PS6 (Bit 6) */ -#define PORT6_OMR_PS6_Msk (0x40UL) /*!< PORT6 OMR: PS6 (Bitfield-Mask: 0x01) */ -#define PORT6_OMR_PS7_Pos (7UL) /*!< PORT6 OMR: PS7 (Bit 7) */ -#define PORT6_OMR_PS7_Msk (0x80UL) /*!< PORT6 OMR: PS7 (Bitfield-Mask: 0x01) */ -#define PORT6_OMR_PS8_Pos (8UL) /*!< PORT6 OMR: PS8 (Bit 8) */ -#define PORT6_OMR_PS8_Msk (0x100UL) /*!< PORT6 OMR: PS8 (Bitfield-Mask: 0x01) */ -#define PORT6_OMR_PS9_Pos (9UL) /*!< PORT6 OMR: PS9 (Bit 9) */ -#define PORT6_OMR_PS9_Msk (0x200UL) /*!< PORT6 OMR: PS9 (Bitfield-Mask: 0x01) */ -#define PORT6_OMR_PS10_Pos (10UL) /*!< PORT6 OMR: PS10 (Bit 10) */ -#define PORT6_OMR_PS10_Msk (0x400UL) /*!< PORT6 OMR: PS10 (Bitfield-Mask: 0x01) */ -#define PORT6_OMR_PS11_Pos (11UL) /*!< PORT6 OMR: PS11 (Bit 11) */ -#define PORT6_OMR_PS11_Msk (0x800UL) /*!< PORT6 OMR: PS11 (Bitfield-Mask: 0x01) */ -#define PORT6_OMR_PS12_Pos (12UL) /*!< PORT6 OMR: PS12 (Bit 12) */ -#define PORT6_OMR_PS12_Msk (0x1000UL) /*!< PORT6 OMR: PS12 (Bitfield-Mask: 0x01) */ -#define PORT6_OMR_PS13_Pos (13UL) /*!< PORT6 OMR: PS13 (Bit 13) */ -#define PORT6_OMR_PS13_Msk (0x2000UL) /*!< PORT6 OMR: PS13 (Bitfield-Mask: 0x01) */ -#define PORT6_OMR_PS14_Pos (14UL) /*!< PORT6 OMR: PS14 (Bit 14) */ -#define PORT6_OMR_PS14_Msk (0x4000UL) /*!< PORT6 OMR: PS14 (Bitfield-Mask: 0x01) */ -#define PORT6_OMR_PS15_Pos (15UL) /*!< PORT6 OMR: PS15 (Bit 15) */ -#define PORT6_OMR_PS15_Msk (0x8000UL) /*!< PORT6 OMR: PS15 (Bitfield-Mask: 0x01) */ -#define PORT6_OMR_PR0_Pos (16UL) /*!< PORT6 OMR: PR0 (Bit 16) */ -#define PORT6_OMR_PR0_Msk (0x10000UL) /*!< PORT6 OMR: PR0 (Bitfield-Mask: 0x01) */ -#define PORT6_OMR_PR1_Pos (17UL) /*!< PORT6 OMR: PR1 (Bit 17) */ -#define PORT6_OMR_PR1_Msk (0x20000UL) /*!< PORT6 OMR: PR1 (Bitfield-Mask: 0x01) */ -#define PORT6_OMR_PR2_Pos (18UL) /*!< PORT6 OMR: PR2 (Bit 18) */ -#define PORT6_OMR_PR2_Msk (0x40000UL) /*!< PORT6 OMR: PR2 (Bitfield-Mask: 0x01) */ -#define PORT6_OMR_PR3_Pos (19UL) /*!< PORT6 OMR: PR3 (Bit 19) */ -#define PORT6_OMR_PR3_Msk (0x80000UL) /*!< PORT6 OMR: PR3 (Bitfield-Mask: 0x01) */ -#define PORT6_OMR_PR4_Pos (20UL) /*!< PORT6 OMR: PR4 (Bit 20) */ -#define PORT6_OMR_PR4_Msk (0x100000UL) /*!< PORT6 OMR: PR4 (Bitfield-Mask: 0x01) */ -#define PORT6_OMR_PR5_Pos (21UL) /*!< PORT6 OMR: PR5 (Bit 21) */ -#define PORT6_OMR_PR5_Msk (0x200000UL) /*!< PORT6 OMR: PR5 (Bitfield-Mask: 0x01) */ -#define PORT6_OMR_PR6_Pos (22UL) /*!< PORT6 OMR: PR6 (Bit 22) */ -#define PORT6_OMR_PR6_Msk (0x400000UL) /*!< PORT6 OMR: PR6 (Bitfield-Mask: 0x01) */ -#define PORT6_OMR_PR7_Pos (23UL) /*!< PORT6 OMR: PR7 (Bit 23) */ -#define PORT6_OMR_PR7_Msk (0x800000UL) /*!< PORT6 OMR: PR7 (Bitfield-Mask: 0x01) */ -#define PORT6_OMR_PR8_Pos (24UL) /*!< PORT6 OMR: PR8 (Bit 24) */ -#define PORT6_OMR_PR8_Msk (0x1000000UL) /*!< PORT6 OMR: PR8 (Bitfield-Mask: 0x01) */ -#define PORT6_OMR_PR9_Pos (25UL) /*!< PORT6 OMR: PR9 (Bit 25) */ -#define PORT6_OMR_PR9_Msk (0x2000000UL) /*!< PORT6 OMR: PR9 (Bitfield-Mask: 0x01) */ -#define PORT6_OMR_PR10_Pos (26UL) /*!< PORT6 OMR: PR10 (Bit 26) */ -#define PORT6_OMR_PR10_Msk (0x4000000UL) /*!< PORT6 OMR: PR10 (Bitfield-Mask: 0x01) */ -#define PORT6_OMR_PR11_Pos (27UL) /*!< PORT6 OMR: PR11 (Bit 27) */ -#define PORT6_OMR_PR11_Msk (0x8000000UL) /*!< PORT6 OMR: PR11 (Bitfield-Mask: 0x01) */ -#define PORT6_OMR_PR12_Pos (28UL) /*!< PORT6 OMR: PR12 (Bit 28) */ -#define PORT6_OMR_PR12_Msk (0x10000000UL) /*!< PORT6 OMR: PR12 (Bitfield-Mask: 0x01) */ -#define PORT6_OMR_PR13_Pos (29UL) /*!< PORT6 OMR: PR13 (Bit 29) */ -#define PORT6_OMR_PR13_Msk (0x20000000UL) /*!< PORT6 OMR: PR13 (Bitfield-Mask: 0x01) */ -#define PORT6_OMR_PR14_Pos (30UL) /*!< PORT6 OMR: PR14 (Bit 30) */ -#define PORT6_OMR_PR14_Msk (0x40000000UL) /*!< PORT6 OMR: PR14 (Bitfield-Mask: 0x01) */ -#define PORT6_OMR_PR15_Pos (31UL) /*!< PORT6 OMR: PR15 (Bit 31) */ -#define PORT6_OMR_PR15_Msk (0x80000000UL) /*!< PORT6 OMR: PR15 (Bitfield-Mask: 0x01) */ - -/* --------------------------------- PORT6_IOCR0 -------------------------------- */ -#define PORT6_IOCR0_PC0_Pos (3UL) /*!< PORT6 IOCR0: PC0 (Bit 3) */ -#define PORT6_IOCR0_PC0_Msk (0xf8UL) /*!< PORT6 IOCR0: PC0 (Bitfield-Mask: 0x1f) */ -#define PORT6_IOCR0_PC1_Pos (11UL) /*!< PORT6 IOCR0: PC1 (Bit 11) */ -#define PORT6_IOCR0_PC1_Msk (0xf800UL) /*!< PORT6 IOCR0: PC1 (Bitfield-Mask: 0x1f) */ -#define PORT6_IOCR0_PC2_Pos (19UL) /*!< PORT6 IOCR0: PC2 (Bit 19) */ -#define PORT6_IOCR0_PC2_Msk (0xf80000UL) /*!< PORT6 IOCR0: PC2 (Bitfield-Mask: 0x1f) */ -#define PORT6_IOCR0_PC3_Pos (27UL) /*!< PORT6 IOCR0: PC3 (Bit 27) */ -#define PORT6_IOCR0_PC3_Msk (0xf8000000UL) /*!< PORT6 IOCR0: PC3 (Bitfield-Mask: 0x1f) */ - -/* --------------------------------- PORT6_IOCR4 -------------------------------- */ -#define PORT6_IOCR4_PC4_Pos (3UL) /*!< PORT6 IOCR4: PC4 (Bit 3) */ -#define PORT6_IOCR4_PC4_Msk (0xf8UL) /*!< PORT6 IOCR4: PC4 (Bitfield-Mask: 0x1f) */ -#define PORT6_IOCR4_PC5_Pos (11UL) /*!< PORT6 IOCR4: PC5 (Bit 11) */ -#define PORT6_IOCR4_PC5_Msk (0xf800UL) /*!< PORT6 IOCR4: PC5 (Bitfield-Mask: 0x1f) */ -#define PORT6_IOCR4_PC6_Pos (19UL) /*!< PORT6 IOCR4: PC6 (Bit 19) */ -#define PORT6_IOCR4_PC6_Msk (0xf80000UL) /*!< PORT6 IOCR4: PC6 (Bitfield-Mask: 0x1f) */ -#define PORT6_IOCR4_PC7_Pos (27UL) /*!< PORT6 IOCR4: PC7 (Bit 27) */ -#define PORT6_IOCR4_PC7_Msk (0xf8000000UL) /*!< PORT6 IOCR4: PC7 (Bitfield-Mask: 0x1f) */ - -/* ---------------------------------- PORT6_IN ---------------------------------- */ -#define PORT6_IN_P0_Pos (0UL) /*!< PORT6 IN: P0 (Bit 0) */ -#define PORT6_IN_P0_Msk (0x1UL) /*!< PORT6 IN: P0 (Bitfield-Mask: 0x01) */ -#define PORT6_IN_P1_Pos (1UL) /*!< PORT6 IN: P1 (Bit 1) */ -#define PORT6_IN_P1_Msk (0x2UL) /*!< PORT6 IN: P1 (Bitfield-Mask: 0x01) */ -#define PORT6_IN_P2_Pos (2UL) /*!< PORT6 IN: P2 (Bit 2) */ -#define PORT6_IN_P2_Msk (0x4UL) /*!< PORT6 IN: P2 (Bitfield-Mask: 0x01) */ -#define PORT6_IN_P3_Pos (3UL) /*!< PORT6 IN: P3 (Bit 3) */ -#define PORT6_IN_P3_Msk (0x8UL) /*!< PORT6 IN: P3 (Bitfield-Mask: 0x01) */ -#define PORT6_IN_P4_Pos (4UL) /*!< PORT6 IN: P4 (Bit 4) */ -#define PORT6_IN_P4_Msk (0x10UL) /*!< PORT6 IN: P4 (Bitfield-Mask: 0x01) */ -#define PORT6_IN_P5_Pos (5UL) /*!< PORT6 IN: P5 (Bit 5) */ -#define PORT6_IN_P5_Msk (0x20UL) /*!< PORT6 IN: P5 (Bitfield-Mask: 0x01) */ -#define PORT6_IN_P6_Pos (6UL) /*!< PORT6 IN: P6 (Bit 6) */ -#define PORT6_IN_P6_Msk (0x40UL) /*!< PORT6 IN: P6 (Bitfield-Mask: 0x01) */ -#define PORT6_IN_P7_Pos (7UL) /*!< PORT6 IN: P7 (Bit 7) */ -#define PORT6_IN_P7_Msk (0x80UL) /*!< PORT6 IN: P7 (Bitfield-Mask: 0x01) */ -#define PORT6_IN_P8_Pos (8UL) /*!< PORT6 IN: P8 (Bit 8) */ -#define PORT6_IN_P8_Msk (0x100UL) /*!< PORT6 IN: P8 (Bitfield-Mask: 0x01) */ -#define PORT6_IN_P9_Pos (9UL) /*!< PORT6 IN: P9 (Bit 9) */ -#define PORT6_IN_P9_Msk (0x200UL) /*!< PORT6 IN: P9 (Bitfield-Mask: 0x01) */ -#define PORT6_IN_P10_Pos (10UL) /*!< PORT6 IN: P10 (Bit 10) */ -#define PORT6_IN_P10_Msk (0x400UL) /*!< PORT6 IN: P10 (Bitfield-Mask: 0x01) */ -#define PORT6_IN_P11_Pos (11UL) /*!< PORT6 IN: P11 (Bit 11) */ -#define PORT6_IN_P11_Msk (0x800UL) /*!< PORT6 IN: P11 (Bitfield-Mask: 0x01) */ -#define PORT6_IN_P12_Pos (12UL) /*!< PORT6 IN: P12 (Bit 12) */ -#define PORT6_IN_P12_Msk (0x1000UL) /*!< PORT6 IN: P12 (Bitfield-Mask: 0x01) */ -#define PORT6_IN_P13_Pos (13UL) /*!< PORT6 IN: P13 (Bit 13) */ -#define PORT6_IN_P13_Msk (0x2000UL) /*!< PORT6 IN: P13 (Bitfield-Mask: 0x01) */ -#define PORT6_IN_P14_Pos (14UL) /*!< PORT6 IN: P14 (Bit 14) */ -#define PORT6_IN_P14_Msk (0x4000UL) /*!< PORT6 IN: P14 (Bitfield-Mask: 0x01) */ -#define PORT6_IN_P15_Pos (15UL) /*!< PORT6 IN: P15 (Bit 15) */ -#define PORT6_IN_P15_Msk (0x8000UL) /*!< PORT6 IN: P15 (Bitfield-Mask: 0x01) */ - -/* --------------------------------- PORT6_PDR0 --------------------------------- */ -#define PORT6_PDR0_PD0_Pos (0UL) /*!< PORT6 PDR0: PD0 (Bit 0) */ -#define PORT6_PDR0_PD0_Msk (0x7UL) /*!< PORT6 PDR0: PD0 (Bitfield-Mask: 0x07) */ -#define PORT6_PDR0_PD1_Pos (4UL) /*!< PORT6 PDR0: PD1 (Bit 4) */ -#define PORT6_PDR0_PD1_Msk (0x70UL) /*!< PORT6 PDR0: PD1 (Bitfield-Mask: 0x07) */ -#define PORT6_PDR0_PD2_Pos (8UL) /*!< PORT6 PDR0: PD2 (Bit 8) */ -#define PORT6_PDR0_PD2_Msk (0x700UL) /*!< PORT6 PDR0: PD2 (Bitfield-Mask: 0x07) */ -#define PORT6_PDR0_PD3_Pos (12UL) /*!< PORT6 PDR0: PD3 (Bit 12) */ -#define PORT6_PDR0_PD3_Msk (0x7000UL) /*!< PORT6 PDR0: PD3 (Bitfield-Mask: 0x07) */ -#define PORT6_PDR0_PD4_Pos (16UL) /*!< PORT6 PDR0: PD4 (Bit 16) */ -#define PORT6_PDR0_PD4_Msk (0x70000UL) /*!< PORT6 PDR0: PD4 (Bitfield-Mask: 0x07) */ -#define PORT6_PDR0_PD5_Pos (20UL) /*!< PORT6 PDR0: PD5 (Bit 20) */ -#define PORT6_PDR0_PD5_Msk (0x700000UL) /*!< PORT6 PDR0: PD5 (Bitfield-Mask: 0x07) */ -#define PORT6_PDR0_PD6_Pos (24UL) /*!< PORT6 PDR0: PD6 (Bit 24) */ -#define PORT6_PDR0_PD6_Msk (0x7000000UL) /*!< PORT6 PDR0: PD6 (Bitfield-Mask: 0x07) */ -#define PORT6_PDR0_PD7_Pos (28UL) /*!< PORT6 PDR0: PD7 (Bit 28) */ -#define PORT6_PDR0_PD7_Msk (0x70000000UL) /*!< PORT6 PDR0: PD7 (Bitfield-Mask: 0x07) */ - -/* --------------------------------- PORT6_PDISC -------------------------------- */ -#define PORT6_PDISC_PDIS0_Pos (0UL) /*!< PORT6 PDISC: PDIS0 (Bit 0) */ -#define PORT6_PDISC_PDIS0_Msk (0x1UL) /*!< PORT6 PDISC: PDIS0 (Bitfield-Mask: 0x01) */ -#define PORT6_PDISC_PDIS1_Pos (1UL) /*!< PORT6 PDISC: PDIS1 (Bit 1) */ -#define PORT6_PDISC_PDIS1_Msk (0x2UL) /*!< PORT6 PDISC: PDIS1 (Bitfield-Mask: 0x01) */ -#define PORT6_PDISC_PDIS2_Pos (2UL) /*!< PORT6 PDISC: PDIS2 (Bit 2) */ -#define PORT6_PDISC_PDIS2_Msk (0x4UL) /*!< PORT6 PDISC: PDIS2 (Bitfield-Mask: 0x01) */ -#define PORT6_PDISC_PDIS3_Pos (3UL) /*!< PORT6 PDISC: PDIS3 (Bit 3) */ -#define PORT6_PDISC_PDIS3_Msk (0x8UL) /*!< PORT6 PDISC: PDIS3 (Bitfield-Mask: 0x01) */ -#define PORT6_PDISC_PDIS4_Pos (4UL) /*!< PORT6 PDISC: PDIS4 (Bit 4) */ -#define PORT6_PDISC_PDIS4_Msk (0x10UL) /*!< PORT6 PDISC: PDIS4 (Bitfield-Mask: 0x01) */ -#define PORT6_PDISC_PDIS5_Pos (5UL) /*!< PORT6 PDISC: PDIS5 (Bit 5) */ -#define PORT6_PDISC_PDIS5_Msk (0x20UL) /*!< PORT6 PDISC: PDIS5 (Bitfield-Mask: 0x01) */ -#define PORT6_PDISC_PDIS6_Pos (6UL) /*!< PORT6 PDISC: PDIS6 (Bit 6) */ -#define PORT6_PDISC_PDIS6_Msk (0x40UL) /*!< PORT6 PDISC: PDIS6 (Bitfield-Mask: 0x01) */ -#define PORT6_PDISC_PDIS7_Pos (7UL) /*!< PORT6 PDISC: PDIS7 (Bit 7) */ -#define PORT6_PDISC_PDIS7_Msk (0x80UL) /*!< PORT6 PDISC: PDIS7 (Bitfield-Mask: 0x01) */ -#define PORT6_PDISC_PDIS8_Pos (8UL) /*!< PORT6 PDISC: PDIS8 (Bit 8) */ -#define PORT6_PDISC_PDIS8_Msk (0x100UL) /*!< PORT6 PDISC: PDIS8 (Bitfield-Mask: 0x01) */ -#define PORT6_PDISC_PDIS9_Pos (9UL) /*!< PORT6 PDISC: PDIS9 (Bit 9) */ -#define PORT6_PDISC_PDIS9_Msk (0x200UL) /*!< PORT6 PDISC: PDIS9 (Bitfield-Mask: 0x01) */ -#define PORT6_PDISC_PDIS10_Pos (10UL) /*!< PORT6 PDISC: PDIS10 (Bit 10) */ -#define PORT6_PDISC_PDIS10_Msk (0x400UL) /*!< PORT6 PDISC: PDIS10 (Bitfield-Mask: 0x01) */ -#define PORT6_PDISC_PDIS11_Pos (11UL) /*!< PORT6 PDISC: PDIS11 (Bit 11) */ -#define PORT6_PDISC_PDIS11_Msk (0x800UL) /*!< PORT6 PDISC: PDIS11 (Bitfield-Mask: 0x01) */ -#define PORT6_PDISC_PDIS12_Pos (12UL) /*!< PORT6 PDISC: PDIS12 (Bit 12) */ -#define PORT6_PDISC_PDIS12_Msk (0x1000UL) /*!< PORT6 PDISC: PDIS12 (Bitfield-Mask: 0x01) */ -#define PORT6_PDISC_PDIS13_Pos (13UL) /*!< PORT6 PDISC: PDIS13 (Bit 13) */ -#define PORT6_PDISC_PDIS13_Msk (0x2000UL) /*!< PORT6 PDISC: PDIS13 (Bitfield-Mask: 0x01) */ -#define PORT6_PDISC_PDIS14_Pos (14UL) /*!< PORT6 PDISC: PDIS14 (Bit 14) */ -#define PORT6_PDISC_PDIS14_Msk (0x4000UL) /*!< PORT6 PDISC: PDIS14 (Bitfield-Mask: 0x01) */ -#define PORT6_PDISC_PDIS15_Pos (15UL) /*!< PORT6 PDISC: PDIS15 (Bit 15) */ -#define PORT6_PDISC_PDIS15_Msk (0x8000UL) /*!< PORT6 PDISC: PDIS15 (Bitfield-Mask: 0x01) */ - -/* ---------------------------------- PORT6_PPS --------------------------------- */ -#define PORT6_PPS_PPS0_Pos (0UL) /*!< PORT6 PPS: PPS0 (Bit 0) */ -#define PORT6_PPS_PPS0_Msk (0x1UL) /*!< PORT6 PPS: PPS0 (Bitfield-Mask: 0x01) */ -#define PORT6_PPS_PPS1_Pos (1UL) /*!< PORT6 PPS: PPS1 (Bit 1) */ -#define PORT6_PPS_PPS1_Msk (0x2UL) /*!< PORT6 PPS: PPS1 (Bitfield-Mask: 0x01) */ -#define PORT6_PPS_PPS2_Pos (2UL) /*!< PORT6 PPS: PPS2 (Bit 2) */ -#define PORT6_PPS_PPS2_Msk (0x4UL) /*!< PORT6 PPS: PPS2 (Bitfield-Mask: 0x01) */ -#define PORT6_PPS_PPS3_Pos (3UL) /*!< PORT6 PPS: PPS3 (Bit 3) */ -#define PORT6_PPS_PPS3_Msk (0x8UL) /*!< PORT6 PPS: PPS3 (Bitfield-Mask: 0x01) */ -#define PORT6_PPS_PPS4_Pos (4UL) /*!< PORT6 PPS: PPS4 (Bit 4) */ -#define PORT6_PPS_PPS4_Msk (0x10UL) /*!< PORT6 PPS: PPS4 (Bitfield-Mask: 0x01) */ -#define PORT6_PPS_PPS5_Pos (5UL) /*!< PORT6 PPS: PPS5 (Bit 5) */ -#define PORT6_PPS_PPS5_Msk (0x20UL) /*!< PORT6 PPS: PPS5 (Bitfield-Mask: 0x01) */ -#define PORT6_PPS_PPS6_Pos (6UL) /*!< PORT6 PPS: PPS6 (Bit 6) */ -#define PORT6_PPS_PPS6_Msk (0x40UL) /*!< PORT6 PPS: PPS6 (Bitfield-Mask: 0x01) */ -#define PORT6_PPS_PPS7_Pos (7UL) /*!< PORT6 PPS: PPS7 (Bit 7) */ -#define PORT6_PPS_PPS7_Msk (0x80UL) /*!< PORT6 PPS: PPS7 (Bitfield-Mask: 0x01) */ -#define PORT6_PPS_PPS8_Pos (8UL) /*!< PORT6 PPS: PPS8 (Bit 8) */ -#define PORT6_PPS_PPS8_Msk (0x100UL) /*!< PORT6 PPS: PPS8 (Bitfield-Mask: 0x01) */ -#define PORT6_PPS_PPS9_Pos (9UL) /*!< PORT6 PPS: PPS9 (Bit 9) */ -#define PORT6_PPS_PPS9_Msk (0x200UL) /*!< PORT6 PPS: PPS9 (Bitfield-Mask: 0x01) */ -#define PORT6_PPS_PPS10_Pos (10UL) /*!< PORT6 PPS: PPS10 (Bit 10) */ -#define PORT6_PPS_PPS10_Msk (0x400UL) /*!< PORT6 PPS: PPS10 (Bitfield-Mask: 0x01) */ -#define PORT6_PPS_PPS11_Pos (11UL) /*!< PORT6 PPS: PPS11 (Bit 11) */ -#define PORT6_PPS_PPS11_Msk (0x800UL) /*!< PORT6 PPS: PPS11 (Bitfield-Mask: 0x01) */ -#define PORT6_PPS_PPS12_Pos (12UL) /*!< PORT6 PPS: PPS12 (Bit 12) */ -#define PORT6_PPS_PPS12_Msk (0x1000UL) /*!< PORT6 PPS: PPS12 (Bitfield-Mask: 0x01) */ -#define PORT6_PPS_PPS13_Pos (13UL) /*!< PORT6 PPS: PPS13 (Bit 13) */ -#define PORT6_PPS_PPS13_Msk (0x2000UL) /*!< PORT6 PPS: PPS13 (Bitfield-Mask: 0x01) */ -#define PORT6_PPS_PPS14_Pos (14UL) /*!< PORT6 PPS: PPS14 (Bit 14) */ -#define PORT6_PPS_PPS14_Msk (0x4000UL) /*!< PORT6 PPS: PPS14 (Bitfield-Mask: 0x01) */ -#define PORT6_PPS_PPS15_Pos (15UL) /*!< PORT6 PPS: PPS15 (Bit 15) */ -#define PORT6_PPS_PPS15_Msk (0x8000UL) /*!< PORT6 PPS: PPS15 (Bitfield-Mask: 0x01) */ - -/* --------------------------------- PORT6_HWSEL -------------------------------- */ -#define PORT6_HWSEL_HW0_Pos (0UL) /*!< PORT6 HWSEL: HW0 (Bit 0) */ -#define PORT6_HWSEL_HW0_Msk (0x3UL) /*!< PORT6 HWSEL: HW0 (Bitfield-Mask: 0x03) */ -#define PORT6_HWSEL_HW1_Pos (2UL) /*!< PORT6 HWSEL: HW1 (Bit 2) */ -#define PORT6_HWSEL_HW1_Msk (0xcUL) /*!< PORT6 HWSEL: HW1 (Bitfield-Mask: 0x03) */ -#define PORT6_HWSEL_HW2_Pos (4UL) /*!< PORT6 HWSEL: HW2 (Bit 4) */ -#define PORT6_HWSEL_HW2_Msk (0x30UL) /*!< PORT6 HWSEL: HW2 (Bitfield-Mask: 0x03) */ -#define PORT6_HWSEL_HW3_Pos (6UL) /*!< PORT6 HWSEL: HW3 (Bit 6) */ -#define PORT6_HWSEL_HW3_Msk (0xc0UL) /*!< PORT6 HWSEL: HW3 (Bitfield-Mask: 0x03) */ -#define PORT6_HWSEL_HW4_Pos (8UL) /*!< PORT6 HWSEL: HW4 (Bit 8) */ -#define PORT6_HWSEL_HW4_Msk (0x300UL) /*!< PORT6 HWSEL: HW4 (Bitfield-Mask: 0x03) */ -#define PORT6_HWSEL_HW5_Pos (10UL) /*!< PORT6 HWSEL: HW5 (Bit 10) */ -#define PORT6_HWSEL_HW5_Msk (0xc00UL) /*!< PORT6 HWSEL: HW5 (Bitfield-Mask: 0x03) */ -#define PORT6_HWSEL_HW6_Pos (12UL) /*!< PORT6 HWSEL: HW6 (Bit 12) */ -#define PORT6_HWSEL_HW6_Msk (0x3000UL) /*!< PORT6 HWSEL: HW6 (Bitfield-Mask: 0x03) */ -#define PORT6_HWSEL_HW7_Pos (14UL) /*!< PORT6 HWSEL: HW7 (Bit 14) */ -#define PORT6_HWSEL_HW7_Msk (0xc000UL) /*!< PORT6 HWSEL: HW7 (Bitfield-Mask: 0x03) */ -#define PORT6_HWSEL_HW8_Pos (16UL) /*!< PORT6 HWSEL: HW8 (Bit 16) */ -#define PORT6_HWSEL_HW8_Msk (0x30000UL) /*!< PORT6 HWSEL: HW8 (Bitfield-Mask: 0x03) */ -#define PORT6_HWSEL_HW9_Pos (18UL) /*!< PORT6 HWSEL: HW9 (Bit 18) */ -#define PORT6_HWSEL_HW9_Msk (0xc0000UL) /*!< PORT6 HWSEL: HW9 (Bitfield-Mask: 0x03) */ -#define PORT6_HWSEL_HW10_Pos (20UL) /*!< PORT6 HWSEL: HW10 (Bit 20) */ -#define PORT6_HWSEL_HW10_Msk (0x300000UL) /*!< PORT6 HWSEL: HW10 (Bitfield-Mask: 0x03) */ -#define PORT6_HWSEL_HW11_Pos (22UL) /*!< PORT6 HWSEL: HW11 (Bit 22) */ -#define PORT6_HWSEL_HW11_Msk (0xc00000UL) /*!< PORT6 HWSEL: HW11 (Bitfield-Mask: 0x03) */ -#define PORT6_HWSEL_HW12_Pos (24UL) /*!< PORT6 HWSEL: HW12 (Bit 24) */ -#define PORT6_HWSEL_HW12_Msk (0x3000000UL) /*!< PORT6 HWSEL: HW12 (Bitfield-Mask: 0x03) */ -#define PORT6_HWSEL_HW13_Pos (26UL) /*!< PORT6 HWSEL: HW13 (Bit 26) */ -#define PORT6_HWSEL_HW13_Msk (0xc000000UL) /*!< PORT6 HWSEL: HW13 (Bitfield-Mask: 0x03) */ -#define PORT6_HWSEL_HW14_Pos (28UL) /*!< PORT6 HWSEL: HW14 (Bit 28) */ -#define PORT6_HWSEL_HW14_Msk (0x30000000UL) /*!< PORT6 HWSEL: HW14 (Bitfield-Mask: 0x03) */ -#define PORT6_HWSEL_HW15_Pos (30UL) /*!< PORT6 HWSEL: HW15 (Bit 30) */ -#define PORT6_HWSEL_HW15_Msk (0xc0000000UL) /*!< PORT6 HWSEL: HW15 (Bitfield-Mask: 0x03) */ - - -/* ================================================================================ */ -/* ================ struct 'PORT7' Position & Mask ================ */ -/* ================================================================================ */ - - -/* ---------------------------------- PORT7_OUT --------------------------------- */ -#define PORT7_OUT_P0_Pos (0UL) /*!< PORT7 OUT: P0 (Bit 0) */ -#define PORT7_OUT_P0_Msk (0x1UL) /*!< PORT7 OUT: P0 (Bitfield-Mask: 0x01) */ -#define PORT7_OUT_P1_Pos (1UL) /*!< PORT7 OUT: P1 (Bit 1) */ -#define PORT7_OUT_P1_Msk (0x2UL) /*!< PORT7 OUT: P1 (Bitfield-Mask: 0x01) */ -#define PORT7_OUT_P2_Pos (2UL) /*!< PORT7 OUT: P2 (Bit 2) */ -#define PORT7_OUT_P2_Msk (0x4UL) /*!< PORT7 OUT: P2 (Bitfield-Mask: 0x01) */ -#define PORT7_OUT_P3_Pos (3UL) /*!< PORT7 OUT: P3 (Bit 3) */ -#define PORT7_OUT_P3_Msk (0x8UL) /*!< PORT7 OUT: P3 (Bitfield-Mask: 0x01) */ -#define PORT7_OUT_P4_Pos (4UL) /*!< PORT7 OUT: P4 (Bit 4) */ -#define PORT7_OUT_P4_Msk (0x10UL) /*!< PORT7 OUT: P4 (Bitfield-Mask: 0x01) */ -#define PORT7_OUT_P5_Pos (5UL) /*!< PORT7 OUT: P5 (Bit 5) */ -#define PORT7_OUT_P5_Msk (0x20UL) /*!< PORT7 OUT: P5 (Bitfield-Mask: 0x01) */ -#define PORT7_OUT_P6_Pos (6UL) /*!< PORT7 OUT: P6 (Bit 6) */ -#define PORT7_OUT_P6_Msk (0x40UL) /*!< PORT7 OUT: P6 (Bitfield-Mask: 0x01) */ -#define PORT7_OUT_P7_Pos (7UL) /*!< PORT7 OUT: P7 (Bit 7) */ -#define PORT7_OUT_P7_Msk (0x80UL) /*!< PORT7 OUT: P7 (Bitfield-Mask: 0x01) */ -#define PORT7_OUT_P8_Pos (8UL) /*!< PORT7 OUT: P8 (Bit 8) */ -#define PORT7_OUT_P8_Msk (0x100UL) /*!< PORT7 OUT: P8 (Bitfield-Mask: 0x01) */ -#define PORT7_OUT_P9_Pos (9UL) /*!< PORT7 OUT: P9 (Bit 9) */ -#define PORT7_OUT_P9_Msk (0x200UL) /*!< PORT7 OUT: P9 (Bitfield-Mask: 0x01) */ -#define PORT7_OUT_P10_Pos (10UL) /*!< PORT7 OUT: P10 (Bit 10) */ -#define PORT7_OUT_P10_Msk (0x400UL) /*!< PORT7 OUT: P10 (Bitfield-Mask: 0x01) */ -#define PORT7_OUT_P11_Pos (11UL) /*!< PORT7 OUT: P11 (Bit 11) */ -#define PORT7_OUT_P11_Msk (0x800UL) /*!< PORT7 OUT: P11 (Bitfield-Mask: 0x01) */ -#define PORT7_OUT_P12_Pos (12UL) /*!< PORT7 OUT: P12 (Bit 12) */ -#define PORT7_OUT_P12_Msk (0x1000UL) /*!< PORT7 OUT: P12 (Bitfield-Mask: 0x01) */ -#define PORT7_OUT_P13_Pos (13UL) /*!< PORT7 OUT: P13 (Bit 13) */ -#define PORT7_OUT_P13_Msk (0x2000UL) /*!< PORT7 OUT: P13 (Bitfield-Mask: 0x01) */ -#define PORT7_OUT_P14_Pos (14UL) /*!< PORT7 OUT: P14 (Bit 14) */ -#define PORT7_OUT_P14_Msk (0x4000UL) /*!< PORT7 OUT: P14 (Bitfield-Mask: 0x01) */ -#define PORT7_OUT_P15_Pos (15UL) /*!< PORT7 OUT: P15 (Bit 15) */ -#define PORT7_OUT_P15_Msk (0x8000UL) /*!< PORT7 OUT: P15 (Bitfield-Mask: 0x01) */ - -/* ---------------------------------- PORT7_OMR --------------------------------- */ -#define PORT7_OMR_PS0_Pos (0UL) /*!< PORT7 OMR: PS0 (Bit 0) */ -#define PORT7_OMR_PS0_Msk (0x1UL) /*!< PORT7 OMR: PS0 (Bitfield-Mask: 0x01) */ -#define PORT7_OMR_PS1_Pos (1UL) /*!< PORT7 OMR: PS1 (Bit 1) */ -#define PORT7_OMR_PS1_Msk (0x2UL) /*!< PORT7 OMR: PS1 (Bitfield-Mask: 0x01) */ -#define PORT7_OMR_PS2_Pos (2UL) /*!< PORT7 OMR: PS2 (Bit 2) */ -#define PORT7_OMR_PS2_Msk (0x4UL) /*!< PORT7 OMR: PS2 (Bitfield-Mask: 0x01) */ -#define PORT7_OMR_PS3_Pos (3UL) /*!< PORT7 OMR: PS3 (Bit 3) */ -#define PORT7_OMR_PS3_Msk (0x8UL) /*!< PORT7 OMR: PS3 (Bitfield-Mask: 0x01) */ -#define PORT7_OMR_PS4_Pos (4UL) /*!< PORT7 OMR: PS4 (Bit 4) */ -#define PORT7_OMR_PS4_Msk (0x10UL) /*!< PORT7 OMR: PS4 (Bitfield-Mask: 0x01) */ -#define PORT7_OMR_PS5_Pos (5UL) /*!< PORT7 OMR: PS5 (Bit 5) */ -#define PORT7_OMR_PS5_Msk (0x20UL) /*!< PORT7 OMR: PS5 (Bitfield-Mask: 0x01) */ -#define PORT7_OMR_PS6_Pos (6UL) /*!< PORT7 OMR: PS6 (Bit 6) */ -#define PORT7_OMR_PS6_Msk (0x40UL) /*!< PORT7 OMR: PS6 (Bitfield-Mask: 0x01) */ -#define PORT7_OMR_PS7_Pos (7UL) /*!< PORT7 OMR: PS7 (Bit 7) */ -#define PORT7_OMR_PS7_Msk (0x80UL) /*!< PORT7 OMR: PS7 (Bitfield-Mask: 0x01) */ -#define PORT7_OMR_PS8_Pos (8UL) /*!< PORT7 OMR: PS8 (Bit 8) */ -#define PORT7_OMR_PS8_Msk (0x100UL) /*!< PORT7 OMR: PS8 (Bitfield-Mask: 0x01) */ -#define PORT7_OMR_PS9_Pos (9UL) /*!< PORT7 OMR: PS9 (Bit 9) */ -#define PORT7_OMR_PS9_Msk (0x200UL) /*!< PORT7 OMR: PS9 (Bitfield-Mask: 0x01) */ -#define PORT7_OMR_PS10_Pos (10UL) /*!< PORT7 OMR: PS10 (Bit 10) */ -#define PORT7_OMR_PS10_Msk (0x400UL) /*!< PORT7 OMR: PS10 (Bitfield-Mask: 0x01) */ -#define PORT7_OMR_PS11_Pos (11UL) /*!< PORT7 OMR: PS11 (Bit 11) */ -#define PORT7_OMR_PS11_Msk (0x800UL) /*!< PORT7 OMR: PS11 (Bitfield-Mask: 0x01) */ -#define PORT7_OMR_PS12_Pos (12UL) /*!< PORT7 OMR: PS12 (Bit 12) */ -#define PORT7_OMR_PS12_Msk (0x1000UL) /*!< PORT7 OMR: PS12 (Bitfield-Mask: 0x01) */ -#define PORT7_OMR_PS13_Pos (13UL) /*!< PORT7 OMR: PS13 (Bit 13) */ -#define PORT7_OMR_PS13_Msk (0x2000UL) /*!< PORT7 OMR: PS13 (Bitfield-Mask: 0x01) */ -#define PORT7_OMR_PS14_Pos (14UL) /*!< PORT7 OMR: PS14 (Bit 14) */ -#define PORT7_OMR_PS14_Msk (0x4000UL) /*!< PORT7 OMR: PS14 (Bitfield-Mask: 0x01) */ -#define PORT7_OMR_PS15_Pos (15UL) /*!< PORT7 OMR: PS15 (Bit 15) */ -#define PORT7_OMR_PS15_Msk (0x8000UL) /*!< PORT7 OMR: PS15 (Bitfield-Mask: 0x01) */ -#define PORT7_OMR_PR0_Pos (16UL) /*!< PORT7 OMR: PR0 (Bit 16) */ -#define PORT7_OMR_PR0_Msk (0x10000UL) /*!< PORT7 OMR: PR0 (Bitfield-Mask: 0x01) */ -#define PORT7_OMR_PR1_Pos (17UL) /*!< PORT7 OMR: PR1 (Bit 17) */ -#define PORT7_OMR_PR1_Msk (0x20000UL) /*!< PORT7 OMR: PR1 (Bitfield-Mask: 0x01) */ -#define PORT7_OMR_PR2_Pos (18UL) /*!< PORT7 OMR: PR2 (Bit 18) */ -#define PORT7_OMR_PR2_Msk (0x40000UL) /*!< PORT7 OMR: PR2 (Bitfield-Mask: 0x01) */ -#define PORT7_OMR_PR3_Pos (19UL) /*!< PORT7 OMR: PR3 (Bit 19) */ -#define PORT7_OMR_PR3_Msk (0x80000UL) /*!< PORT7 OMR: PR3 (Bitfield-Mask: 0x01) */ -#define PORT7_OMR_PR4_Pos (20UL) /*!< PORT7 OMR: PR4 (Bit 20) */ -#define PORT7_OMR_PR4_Msk (0x100000UL) /*!< PORT7 OMR: PR4 (Bitfield-Mask: 0x01) */ -#define PORT7_OMR_PR5_Pos (21UL) /*!< PORT7 OMR: PR5 (Bit 21) */ -#define PORT7_OMR_PR5_Msk (0x200000UL) /*!< PORT7 OMR: PR5 (Bitfield-Mask: 0x01) */ -#define PORT7_OMR_PR6_Pos (22UL) /*!< PORT7 OMR: PR6 (Bit 22) */ -#define PORT7_OMR_PR6_Msk (0x400000UL) /*!< PORT7 OMR: PR6 (Bitfield-Mask: 0x01) */ -#define PORT7_OMR_PR7_Pos (23UL) /*!< PORT7 OMR: PR7 (Bit 23) */ -#define PORT7_OMR_PR7_Msk (0x800000UL) /*!< PORT7 OMR: PR7 (Bitfield-Mask: 0x01) */ -#define PORT7_OMR_PR8_Pos (24UL) /*!< PORT7 OMR: PR8 (Bit 24) */ -#define PORT7_OMR_PR8_Msk (0x1000000UL) /*!< PORT7 OMR: PR8 (Bitfield-Mask: 0x01) */ -#define PORT7_OMR_PR9_Pos (25UL) /*!< PORT7 OMR: PR9 (Bit 25) */ -#define PORT7_OMR_PR9_Msk (0x2000000UL) /*!< PORT7 OMR: PR9 (Bitfield-Mask: 0x01) */ -#define PORT7_OMR_PR10_Pos (26UL) /*!< PORT7 OMR: PR10 (Bit 26) */ -#define PORT7_OMR_PR10_Msk (0x4000000UL) /*!< PORT7 OMR: PR10 (Bitfield-Mask: 0x01) */ -#define PORT7_OMR_PR11_Pos (27UL) /*!< PORT7 OMR: PR11 (Bit 27) */ -#define PORT7_OMR_PR11_Msk (0x8000000UL) /*!< PORT7 OMR: PR11 (Bitfield-Mask: 0x01) */ -#define PORT7_OMR_PR12_Pos (28UL) /*!< PORT7 OMR: PR12 (Bit 28) */ -#define PORT7_OMR_PR12_Msk (0x10000000UL) /*!< PORT7 OMR: PR12 (Bitfield-Mask: 0x01) */ -#define PORT7_OMR_PR13_Pos (29UL) /*!< PORT7 OMR: PR13 (Bit 29) */ -#define PORT7_OMR_PR13_Msk (0x20000000UL) /*!< PORT7 OMR: PR13 (Bitfield-Mask: 0x01) */ -#define PORT7_OMR_PR14_Pos (30UL) /*!< PORT7 OMR: PR14 (Bit 30) */ -#define PORT7_OMR_PR14_Msk (0x40000000UL) /*!< PORT7 OMR: PR14 (Bitfield-Mask: 0x01) */ -#define PORT7_OMR_PR15_Pos (31UL) /*!< PORT7 OMR: PR15 (Bit 31) */ -#define PORT7_OMR_PR15_Msk (0x80000000UL) /*!< PORT7 OMR: PR15 (Bitfield-Mask: 0x01) */ - -/* --------------------------------- PORT7_IOCR0 -------------------------------- */ -#define PORT7_IOCR0_PC0_Pos (3UL) /*!< PORT7 IOCR0: PC0 (Bit 3) */ -#define PORT7_IOCR0_PC0_Msk (0xf8UL) /*!< PORT7 IOCR0: PC0 (Bitfield-Mask: 0x1f) */ -#define PORT7_IOCR0_PC1_Pos (11UL) /*!< PORT7 IOCR0: PC1 (Bit 11) */ -#define PORT7_IOCR0_PC1_Msk (0xf800UL) /*!< PORT7 IOCR0: PC1 (Bitfield-Mask: 0x1f) */ -#define PORT7_IOCR0_PC2_Pos (19UL) /*!< PORT7 IOCR0: PC2 (Bit 19) */ -#define PORT7_IOCR0_PC2_Msk (0xf80000UL) /*!< PORT7 IOCR0: PC2 (Bitfield-Mask: 0x1f) */ -#define PORT7_IOCR0_PC3_Pos (27UL) /*!< PORT7 IOCR0: PC3 (Bit 27) */ -#define PORT7_IOCR0_PC3_Msk (0xf8000000UL) /*!< PORT7 IOCR0: PC3 (Bitfield-Mask: 0x1f) */ - -/* --------------------------------- PORT7_IOCR4 -------------------------------- */ -#define PORT7_IOCR4_PC4_Pos (3UL) /*!< PORT7 IOCR4: PC4 (Bit 3) */ -#define PORT7_IOCR4_PC4_Msk (0xf8UL) /*!< PORT7 IOCR4: PC4 (Bitfield-Mask: 0x1f) */ -#define PORT7_IOCR4_PC5_Pos (11UL) /*!< PORT7 IOCR4: PC5 (Bit 11) */ -#define PORT7_IOCR4_PC5_Msk (0xf800UL) /*!< PORT7 IOCR4: PC5 (Bitfield-Mask: 0x1f) */ -#define PORT7_IOCR4_PC6_Pos (19UL) /*!< PORT7 IOCR4: PC6 (Bit 19) */ -#define PORT7_IOCR4_PC6_Msk (0xf80000UL) /*!< PORT7 IOCR4: PC6 (Bitfield-Mask: 0x1f) */ -#define PORT7_IOCR4_PC7_Pos (27UL) /*!< PORT7 IOCR4: PC7 (Bit 27) */ -#define PORT7_IOCR4_PC7_Msk (0xf8000000UL) /*!< PORT7 IOCR4: PC7 (Bitfield-Mask: 0x1f) */ - -/* --------------------------------- PORT7_IOCR8 -------------------------------- */ -#define PORT7_IOCR8_PC8_Pos (3UL) /*!< PORT7 IOCR8: PC8 (Bit 3) */ -#define PORT7_IOCR8_PC8_Msk (0xf8UL) /*!< PORT7 IOCR8: PC8 (Bitfield-Mask: 0x1f) */ -#define PORT7_IOCR8_PC9_Pos (11UL) /*!< PORT7 IOCR8: PC9 (Bit 11) */ -#define PORT7_IOCR8_PC9_Msk (0xf800UL) /*!< PORT7 IOCR8: PC9 (Bitfield-Mask: 0x1f) */ -#define PORT7_IOCR8_PC10_Pos (19UL) /*!< PORT7 IOCR8: PC10 (Bit 19) */ -#define PORT7_IOCR8_PC10_Msk (0xf80000UL) /*!< PORT7 IOCR8: PC10 (Bitfield-Mask: 0x1f) */ -#define PORT7_IOCR8_PC11_Pos (27UL) /*!< PORT7 IOCR8: PC11 (Bit 27) */ -#define PORT7_IOCR8_PC11_Msk (0xf8000000UL) /*!< PORT7 IOCR8: PC11 (Bitfield-Mask: 0x1f) */ - -/* ---------------------------------- PORT7_IN ---------------------------------- */ -#define PORT7_IN_P0_Pos (0UL) /*!< PORT7 IN: P0 (Bit 0) */ -#define PORT7_IN_P0_Msk (0x1UL) /*!< PORT7 IN: P0 (Bitfield-Mask: 0x01) */ -#define PORT7_IN_P1_Pos (1UL) /*!< PORT7 IN: P1 (Bit 1) */ -#define PORT7_IN_P1_Msk (0x2UL) /*!< PORT7 IN: P1 (Bitfield-Mask: 0x01) */ -#define PORT7_IN_P2_Pos (2UL) /*!< PORT7 IN: P2 (Bit 2) */ -#define PORT7_IN_P2_Msk (0x4UL) /*!< PORT7 IN: P2 (Bitfield-Mask: 0x01) */ -#define PORT7_IN_P3_Pos (3UL) /*!< PORT7 IN: P3 (Bit 3) */ -#define PORT7_IN_P3_Msk (0x8UL) /*!< PORT7 IN: P3 (Bitfield-Mask: 0x01) */ -#define PORT7_IN_P4_Pos (4UL) /*!< PORT7 IN: P4 (Bit 4) */ -#define PORT7_IN_P4_Msk (0x10UL) /*!< PORT7 IN: P4 (Bitfield-Mask: 0x01) */ -#define PORT7_IN_P5_Pos (5UL) /*!< PORT7 IN: P5 (Bit 5) */ -#define PORT7_IN_P5_Msk (0x20UL) /*!< PORT7 IN: P5 (Bitfield-Mask: 0x01) */ -#define PORT7_IN_P6_Pos (6UL) /*!< PORT7 IN: P6 (Bit 6) */ -#define PORT7_IN_P6_Msk (0x40UL) /*!< PORT7 IN: P6 (Bitfield-Mask: 0x01) */ -#define PORT7_IN_P7_Pos (7UL) /*!< PORT7 IN: P7 (Bit 7) */ -#define PORT7_IN_P7_Msk (0x80UL) /*!< PORT7 IN: P7 (Bitfield-Mask: 0x01) */ -#define PORT7_IN_P8_Pos (8UL) /*!< PORT7 IN: P8 (Bit 8) */ -#define PORT7_IN_P8_Msk (0x100UL) /*!< PORT7 IN: P8 (Bitfield-Mask: 0x01) */ -#define PORT7_IN_P9_Pos (9UL) /*!< PORT7 IN: P9 (Bit 9) */ -#define PORT7_IN_P9_Msk (0x200UL) /*!< PORT7 IN: P9 (Bitfield-Mask: 0x01) */ -#define PORT7_IN_P10_Pos (10UL) /*!< PORT7 IN: P10 (Bit 10) */ -#define PORT7_IN_P10_Msk (0x400UL) /*!< PORT7 IN: P10 (Bitfield-Mask: 0x01) */ -#define PORT7_IN_P11_Pos (11UL) /*!< PORT7 IN: P11 (Bit 11) */ -#define PORT7_IN_P11_Msk (0x800UL) /*!< PORT7 IN: P11 (Bitfield-Mask: 0x01) */ -#define PORT7_IN_P12_Pos (12UL) /*!< PORT7 IN: P12 (Bit 12) */ -#define PORT7_IN_P12_Msk (0x1000UL) /*!< PORT7 IN: P12 (Bitfield-Mask: 0x01) */ -#define PORT7_IN_P13_Pos (13UL) /*!< PORT7 IN: P13 (Bit 13) */ -#define PORT7_IN_P13_Msk (0x2000UL) /*!< PORT7 IN: P13 (Bitfield-Mask: 0x01) */ -#define PORT7_IN_P14_Pos (14UL) /*!< PORT7 IN: P14 (Bit 14) */ -#define PORT7_IN_P14_Msk (0x4000UL) /*!< PORT7 IN: P14 (Bitfield-Mask: 0x01) */ -#define PORT7_IN_P15_Pos (15UL) /*!< PORT7 IN: P15 (Bit 15) */ -#define PORT7_IN_P15_Msk (0x8000UL) /*!< PORT7 IN: P15 (Bitfield-Mask: 0x01) */ - -/* --------------------------------- PORT7_PDR0 --------------------------------- */ -#define PORT7_PDR0_PD0_Pos (0UL) /*!< PORT7 PDR0: PD0 (Bit 0) */ -#define PORT7_PDR0_PD0_Msk (0x7UL) /*!< PORT7 PDR0: PD0 (Bitfield-Mask: 0x07) */ -#define PORT7_PDR0_PD1_Pos (4UL) /*!< PORT7 PDR0: PD1 (Bit 4) */ -#define PORT7_PDR0_PD1_Msk (0x70UL) /*!< PORT7 PDR0: PD1 (Bitfield-Mask: 0x07) */ -#define PORT7_PDR0_PD2_Pos (8UL) /*!< PORT7 PDR0: PD2 (Bit 8) */ -#define PORT7_PDR0_PD2_Msk (0x700UL) /*!< PORT7 PDR0: PD2 (Bitfield-Mask: 0x07) */ -#define PORT7_PDR0_PD3_Pos (12UL) /*!< PORT7 PDR0: PD3 (Bit 12) */ -#define PORT7_PDR0_PD3_Msk (0x7000UL) /*!< PORT7 PDR0: PD3 (Bitfield-Mask: 0x07) */ -#define PORT7_PDR0_PD4_Pos (16UL) /*!< PORT7 PDR0: PD4 (Bit 16) */ -#define PORT7_PDR0_PD4_Msk (0x70000UL) /*!< PORT7 PDR0: PD4 (Bitfield-Mask: 0x07) */ -#define PORT7_PDR0_PD5_Pos (20UL) /*!< PORT7 PDR0: PD5 (Bit 20) */ -#define PORT7_PDR0_PD5_Msk (0x700000UL) /*!< PORT7 PDR0: PD5 (Bitfield-Mask: 0x07) */ -#define PORT7_PDR0_PD6_Pos (24UL) /*!< PORT7 PDR0: PD6 (Bit 24) */ -#define PORT7_PDR0_PD6_Msk (0x7000000UL) /*!< PORT7 PDR0: PD6 (Bitfield-Mask: 0x07) */ -#define PORT7_PDR0_PD7_Pos (28UL) /*!< PORT7 PDR0: PD7 (Bit 28) */ -#define PORT7_PDR0_PD7_Msk (0x70000000UL) /*!< PORT7 PDR0: PD7 (Bitfield-Mask: 0x07) */ - -/* --------------------------------- PORT7_PDR1 --------------------------------- */ -#define PORT7_PDR1_PD8_Pos (0UL) /*!< PORT7 PDR1: PD8 (Bit 0) */ -#define PORT7_PDR1_PD8_Msk (0x7UL) /*!< PORT7 PDR1: PD8 (Bitfield-Mask: 0x07) */ -#define PORT7_PDR1_PD9_Pos (4UL) /*!< PORT7 PDR1: PD9 (Bit 4) */ -#define PORT7_PDR1_PD9_Msk (0x70UL) /*!< PORT7 PDR1: PD9 (Bitfield-Mask: 0x07) */ -#define PORT7_PDR1_PD10_Pos (8UL) /*!< PORT7 PDR1: PD10 (Bit 8) */ -#define PORT7_PDR1_PD10_Msk (0x700UL) /*!< PORT7 PDR1: PD10 (Bitfield-Mask: 0x07) */ -#define PORT7_PDR1_PD11_Pos (12UL) /*!< PORT7 PDR1: PD11 (Bit 12) */ -#define PORT7_PDR1_PD11_Msk (0x7000UL) /*!< PORT7 PDR1: PD11 (Bitfield-Mask: 0x07) */ -#define PORT7_PDR1_PD12_Pos (16UL) /*!< PORT7 PDR1: PD12 (Bit 16) */ -#define PORT7_PDR1_PD12_Msk (0x70000UL) /*!< PORT7 PDR1: PD12 (Bitfield-Mask: 0x07) */ -#define PORT7_PDR1_PD13_Pos (20UL) /*!< PORT7 PDR1: PD13 (Bit 20) */ -#define PORT7_PDR1_PD13_Msk (0x700000UL) /*!< PORT7 PDR1: PD13 (Bitfield-Mask: 0x07) */ -#define PORT7_PDR1_PD14_Pos (24UL) /*!< PORT7 PDR1: PD14 (Bit 24) */ -#define PORT7_PDR1_PD14_Msk (0x7000000UL) /*!< PORT7 PDR1: PD14 (Bitfield-Mask: 0x07) */ -#define PORT7_PDR1_PD15_Pos (28UL) /*!< PORT7 PDR1: PD15 (Bit 28) */ -#define PORT7_PDR1_PD15_Msk (0x70000000UL) /*!< PORT7 PDR1: PD15 (Bitfield-Mask: 0x07) */ - -/* --------------------------------- PORT7_PDISC -------------------------------- */ -#define PORT7_PDISC_PDIS0_Pos (0UL) /*!< PORT7 PDISC: PDIS0 (Bit 0) */ -#define PORT7_PDISC_PDIS0_Msk (0x1UL) /*!< PORT7 PDISC: PDIS0 (Bitfield-Mask: 0x01) */ -#define PORT7_PDISC_PDIS1_Pos (1UL) /*!< PORT7 PDISC: PDIS1 (Bit 1) */ -#define PORT7_PDISC_PDIS1_Msk (0x2UL) /*!< PORT7 PDISC: PDIS1 (Bitfield-Mask: 0x01) */ -#define PORT7_PDISC_PDIS2_Pos (2UL) /*!< PORT7 PDISC: PDIS2 (Bit 2) */ -#define PORT7_PDISC_PDIS2_Msk (0x4UL) /*!< PORT7 PDISC: PDIS2 (Bitfield-Mask: 0x01) */ -#define PORT7_PDISC_PDIS3_Pos (3UL) /*!< PORT7 PDISC: PDIS3 (Bit 3) */ -#define PORT7_PDISC_PDIS3_Msk (0x8UL) /*!< PORT7 PDISC: PDIS3 (Bitfield-Mask: 0x01) */ -#define PORT7_PDISC_PDIS4_Pos (4UL) /*!< PORT7 PDISC: PDIS4 (Bit 4) */ -#define PORT7_PDISC_PDIS4_Msk (0x10UL) /*!< PORT7 PDISC: PDIS4 (Bitfield-Mask: 0x01) */ -#define PORT7_PDISC_PDIS5_Pos (5UL) /*!< PORT7 PDISC: PDIS5 (Bit 5) */ -#define PORT7_PDISC_PDIS5_Msk (0x20UL) /*!< PORT7 PDISC: PDIS5 (Bitfield-Mask: 0x01) */ -#define PORT7_PDISC_PDIS6_Pos (6UL) /*!< PORT7 PDISC: PDIS6 (Bit 6) */ -#define PORT7_PDISC_PDIS6_Msk (0x40UL) /*!< PORT7 PDISC: PDIS6 (Bitfield-Mask: 0x01) */ -#define PORT7_PDISC_PDIS7_Pos (7UL) /*!< PORT7 PDISC: PDIS7 (Bit 7) */ -#define PORT7_PDISC_PDIS7_Msk (0x80UL) /*!< PORT7 PDISC: PDIS7 (Bitfield-Mask: 0x01) */ -#define PORT7_PDISC_PDIS8_Pos (8UL) /*!< PORT7 PDISC: PDIS8 (Bit 8) */ -#define PORT7_PDISC_PDIS8_Msk (0x100UL) /*!< PORT7 PDISC: PDIS8 (Bitfield-Mask: 0x01) */ -#define PORT7_PDISC_PDIS9_Pos (9UL) /*!< PORT7 PDISC: PDIS9 (Bit 9) */ -#define PORT7_PDISC_PDIS9_Msk (0x200UL) /*!< PORT7 PDISC: PDIS9 (Bitfield-Mask: 0x01) */ -#define PORT7_PDISC_PDIS10_Pos (10UL) /*!< PORT7 PDISC: PDIS10 (Bit 10) */ -#define PORT7_PDISC_PDIS10_Msk (0x400UL) /*!< PORT7 PDISC: PDIS10 (Bitfield-Mask: 0x01) */ -#define PORT7_PDISC_PDIS11_Pos (11UL) /*!< PORT7 PDISC: PDIS11 (Bit 11) */ -#define PORT7_PDISC_PDIS11_Msk (0x800UL) /*!< PORT7 PDISC: PDIS11 (Bitfield-Mask: 0x01) */ -#define PORT7_PDISC_PDIS12_Pos (12UL) /*!< PORT7 PDISC: PDIS12 (Bit 12) */ -#define PORT7_PDISC_PDIS12_Msk (0x1000UL) /*!< PORT7 PDISC: PDIS12 (Bitfield-Mask: 0x01) */ -#define PORT7_PDISC_PDIS13_Pos (13UL) /*!< PORT7 PDISC: PDIS13 (Bit 13) */ -#define PORT7_PDISC_PDIS13_Msk (0x2000UL) /*!< PORT7 PDISC: PDIS13 (Bitfield-Mask: 0x01) */ -#define PORT7_PDISC_PDIS14_Pos (14UL) /*!< PORT7 PDISC: PDIS14 (Bit 14) */ -#define PORT7_PDISC_PDIS14_Msk (0x4000UL) /*!< PORT7 PDISC: PDIS14 (Bitfield-Mask: 0x01) */ -#define PORT7_PDISC_PDIS15_Pos (15UL) /*!< PORT7 PDISC: PDIS15 (Bit 15) */ -#define PORT7_PDISC_PDIS15_Msk (0x8000UL) /*!< PORT7 PDISC: PDIS15 (Bitfield-Mask: 0x01) */ - -/* ---------------------------------- PORT7_PPS --------------------------------- */ -#define PORT7_PPS_PPS0_Pos (0UL) /*!< PORT7 PPS: PPS0 (Bit 0) */ -#define PORT7_PPS_PPS0_Msk (0x1UL) /*!< PORT7 PPS: PPS0 (Bitfield-Mask: 0x01) */ -#define PORT7_PPS_PPS1_Pos (1UL) /*!< PORT7 PPS: PPS1 (Bit 1) */ -#define PORT7_PPS_PPS1_Msk (0x2UL) /*!< PORT7 PPS: PPS1 (Bitfield-Mask: 0x01) */ -#define PORT7_PPS_PPS2_Pos (2UL) /*!< PORT7 PPS: PPS2 (Bit 2) */ -#define PORT7_PPS_PPS2_Msk (0x4UL) /*!< PORT7 PPS: PPS2 (Bitfield-Mask: 0x01) */ -#define PORT7_PPS_PPS3_Pos (3UL) /*!< PORT7 PPS: PPS3 (Bit 3) */ -#define PORT7_PPS_PPS3_Msk (0x8UL) /*!< PORT7 PPS: PPS3 (Bitfield-Mask: 0x01) */ -#define PORT7_PPS_PPS4_Pos (4UL) /*!< PORT7 PPS: PPS4 (Bit 4) */ -#define PORT7_PPS_PPS4_Msk (0x10UL) /*!< PORT7 PPS: PPS4 (Bitfield-Mask: 0x01) */ -#define PORT7_PPS_PPS5_Pos (5UL) /*!< PORT7 PPS: PPS5 (Bit 5) */ -#define PORT7_PPS_PPS5_Msk (0x20UL) /*!< PORT7 PPS: PPS5 (Bitfield-Mask: 0x01) */ -#define PORT7_PPS_PPS6_Pos (6UL) /*!< PORT7 PPS: PPS6 (Bit 6) */ -#define PORT7_PPS_PPS6_Msk (0x40UL) /*!< PORT7 PPS: PPS6 (Bitfield-Mask: 0x01) */ -#define PORT7_PPS_PPS7_Pos (7UL) /*!< PORT7 PPS: PPS7 (Bit 7) */ -#define PORT7_PPS_PPS7_Msk (0x80UL) /*!< PORT7 PPS: PPS7 (Bitfield-Mask: 0x01) */ -#define PORT7_PPS_PPS8_Pos (8UL) /*!< PORT7 PPS: PPS8 (Bit 8) */ -#define PORT7_PPS_PPS8_Msk (0x100UL) /*!< PORT7 PPS: PPS8 (Bitfield-Mask: 0x01) */ -#define PORT7_PPS_PPS9_Pos (9UL) /*!< PORT7 PPS: PPS9 (Bit 9) */ -#define PORT7_PPS_PPS9_Msk (0x200UL) /*!< PORT7 PPS: PPS9 (Bitfield-Mask: 0x01) */ -#define PORT7_PPS_PPS10_Pos (10UL) /*!< PORT7 PPS: PPS10 (Bit 10) */ -#define PORT7_PPS_PPS10_Msk (0x400UL) /*!< PORT7 PPS: PPS10 (Bitfield-Mask: 0x01) */ -#define PORT7_PPS_PPS11_Pos (11UL) /*!< PORT7 PPS: PPS11 (Bit 11) */ -#define PORT7_PPS_PPS11_Msk (0x800UL) /*!< PORT7 PPS: PPS11 (Bitfield-Mask: 0x01) */ -#define PORT7_PPS_PPS12_Pos (12UL) /*!< PORT7 PPS: PPS12 (Bit 12) */ -#define PORT7_PPS_PPS12_Msk (0x1000UL) /*!< PORT7 PPS: PPS12 (Bitfield-Mask: 0x01) */ -#define PORT7_PPS_PPS13_Pos (13UL) /*!< PORT7 PPS: PPS13 (Bit 13) */ -#define PORT7_PPS_PPS13_Msk (0x2000UL) /*!< PORT7 PPS: PPS13 (Bitfield-Mask: 0x01) */ -#define PORT7_PPS_PPS14_Pos (14UL) /*!< PORT7 PPS: PPS14 (Bit 14) */ -#define PORT7_PPS_PPS14_Msk (0x4000UL) /*!< PORT7 PPS: PPS14 (Bitfield-Mask: 0x01) */ -#define PORT7_PPS_PPS15_Pos (15UL) /*!< PORT7 PPS: PPS15 (Bit 15) */ -#define PORT7_PPS_PPS15_Msk (0x8000UL) /*!< PORT7 PPS: PPS15 (Bitfield-Mask: 0x01) */ - -/* --------------------------------- PORT7_HWSEL -------------------------------- */ -#define PORT7_HWSEL_HW0_Pos (0UL) /*!< PORT7 HWSEL: HW0 (Bit 0) */ -#define PORT7_HWSEL_HW0_Msk (0x3UL) /*!< PORT7 HWSEL: HW0 (Bitfield-Mask: 0x03) */ -#define PORT7_HWSEL_HW1_Pos (2UL) /*!< PORT7 HWSEL: HW1 (Bit 2) */ -#define PORT7_HWSEL_HW1_Msk (0xcUL) /*!< PORT7 HWSEL: HW1 (Bitfield-Mask: 0x03) */ -#define PORT7_HWSEL_HW2_Pos (4UL) /*!< PORT7 HWSEL: HW2 (Bit 4) */ -#define PORT7_HWSEL_HW2_Msk (0x30UL) /*!< PORT7 HWSEL: HW2 (Bitfield-Mask: 0x03) */ -#define PORT7_HWSEL_HW3_Pos (6UL) /*!< PORT7 HWSEL: HW3 (Bit 6) */ -#define PORT7_HWSEL_HW3_Msk (0xc0UL) /*!< PORT7 HWSEL: HW3 (Bitfield-Mask: 0x03) */ -#define PORT7_HWSEL_HW4_Pos (8UL) /*!< PORT7 HWSEL: HW4 (Bit 8) */ -#define PORT7_HWSEL_HW4_Msk (0x300UL) /*!< PORT7 HWSEL: HW4 (Bitfield-Mask: 0x03) */ -#define PORT7_HWSEL_HW5_Pos (10UL) /*!< PORT7 HWSEL: HW5 (Bit 10) */ -#define PORT7_HWSEL_HW5_Msk (0xc00UL) /*!< PORT7 HWSEL: HW5 (Bitfield-Mask: 0x03) */ -#define PORT7_HWSEL_HW6_Pos (12UL) /*!< PORT7 HWSEL: HW6 (Bit 12) */ -#define PORT7_HWSEL_HW6_Msk (0x3000UL) /*!< PORT7 HWSEL: HW6 (Bitfield-Mask: 0x03) */ -#define PORT7_HWSEL_HW7_Pos (14UL) /*!< PORT7 HWSEL: HW7 (Bit 14) */ -#define PORT7_HWSEL_HW7_Msk (0xc000UL) /*!< PORT7 HWSEL: HW7 (Bitfield-Mask: 0x03) */ -#define PORT7_HWSEL_HW8_Pos (16UL) /*!< PORT7 HWSEL: HW8 (Bit 16) */ -#define PORT7_HWSEL_HW8_Msk (0x30000UL) /*!< PORT7 HWSEL: HW8 (Bitfield-Mask: 0x03) */ -#define PORT7_HWSEL_HW9_Pos (18UL) /*!< PORT7 HWSEL: HW9 (Bit 18) */ -#define PORT7_HWSEL_HW9_Msk (0xc0000UL) /*!< PORT7 HWSEL: HW9 (Bitfield-Mask: 0x03) */ -#define PORT7_HWSEL_HW10_Pos (20UL) /*!< PORT7 HWSEL: HW10 (Bit 20) */ -#define PORT7_HWSEL_HW10_Msk (0x300000UL) /*!< PORT7 HWSEL: HW10 (Bitfield-Mask: 0x03) */ -#define PORT7_HWSEL_HW11_Pos (22UL) /*!< PORT7 HWSEL: HW11 (Bit 22) */ -#define PORT7_HWSEL_HW11_Msk (0xc00000UL) /*!< PORT7 HWSEL: HW11 (Bitfield-Mask: 0x03) */ -#define PORT7_HWSEL_HW12_Pos (24UL) /*!< PORT7 HWSEL: HW12 (Bit 24) */ -#define PORT7_HWSEL_HW12_Msk (0x3000000UL) /*!< PORT7 HWSEL: HW12 (Bitfield-Mask: 0x03) */ -#define PORT7_HWSEL_HW13_Pos (26UL) /*!< PORT7 HWSEL: HW13 (Bit 26) */ -#define PORT7_HWSEL_HW13_Msk (0xc000000UL) /*!< PORT7 HWSEL: HW13 (Bitfield-Mask: 0x03) */ -#define PORT7_HWSEL_HW14_Pos (28UL) /*!< PORT7 HWSEL: HW14 (Bit 28) */ -#define PORT7_HWSEL_HW14_Msk (0x30000000UL) /*!< PORT7 HWSEL: HW14 (Bitfield-Mask: 0x03) */ -#define PORT7_HWSEL_HW15_Pos (30UL) /*!< PORT7 HWSEL: HW15 (Bit 30) */ -#define PORT7_HWSEL_HW15_Msk (0xc0000000UL) /*!< PORT7 HWSEL: HW15 (Bitfield-Mask: 0x03) */ - - -/* ================================================================================ */ -/* ================ struct 'PORT8' Position & Mask ================ */ -/* ================================================================================ */ - - -/* ---------------------------------- PORT8_OUT --------------------------------- */ -#define PORT8_OUT_P0_Pos (0UL) /*!< PORT8 OUT: P0 (Bit 0) */ -#define PORT8_OUT_P0_Msk (0x1UL) /*!< PORT8 OUT: P0 (Bitfield-Mask: 0x01) */ -#define PORT8_OUT_P1_Pos (1UL) /*!< PORT8 OUT: P1 (Bit 1) */ -#define PORT8_OUT_P1_Msk (0x2UL) /*!< PORT8 OUT: P1 (Bitfield-Mask: 0x01) */ -#define PORT8_OUT_P2_Pos (2UL) /*!< PORT8 OUT: P2 (Bit 2) */ -#define PORT8_OUT_P2_Msk (0x4UL) /*!< PORT8 OUT: P2 (Bitfield-Mask: 0x01) */ -#define PORT8_OUT_P3_Pos (3UL) /*!< PORT8 OUT: P3 (Bit 3) */ -#define PORT8_OUT_P3_Msk (0x8UL) /*!< PORT8 OUT: P3 (Bitfield-Mask: 0x01) */ -#define PORT8_OUT_P4_Pos (4UL) /*!< PORT8 OUT: P4 (Bit 4) */ -#define PORT8_OUT_P4_Msk (0x10UL) /*!< PORT8 OUT: P4 (Bitfield-Mask: 0x01) */ -#define PORT8_OUT_P5_Pos (5UL) /*!< PORT8 OUT: P5 (Bit 5) */ -#define PORT8_OUT_P5_Msk (0x20UL) /*!< PORT8 OUT: P5 (Bitfield-Mask: 0x01) */ -#define PORT8_OUT_P6_Pos (6UL) /*!< PORT8 OUT: P6 (Bit 6) */ -#define PORT8_OUT_P6_Msk (0x40UL) /*!< PORT8 OUT: P6 (Bitfield-Mask: 0x01) */ -#define PORT8_OUT_P7_Pos (7UL) /*!< PORT8 OUT: P7 (Bit 7) */ -#define PORT8_OUT_P7_Msk (0x80UL) /*!< PORT8 OUT: P7 (Bitfield-Mask: 0x01) */ -#define PORT8_OUT_P8_Pos (8UL) /*!< PORT8 OUT: P8 (Bit 8) */ -#define PORT8_OUT_P8_Msk (0x100UL) /*!< PORT8 OUT: P8 (Bitfield-Mask: 0x01) */ -#define PORT8_OUT_P9_Pos (9UL) /*!< PORT8 OUT: P9 (Bit 9) */ -#define PORT8_OUT_P9_Msk (0x200UL) /*!< PORT8 OUT: P9 (Bitfield-Mask: 0x01) */ -#define PORT8_OUT_P10_Pos (10UL) /*!< PORT8 OUT: P10 (Bit 10) */ -#define PORT8_OUT_P10_Msk (0x400UL) /*!< PORT8 OUT: P10 (Bitfield-Mask: 0x01) */ -#define PORT8_OUT_P11_Pos (11UL) /*!< PORT8 OUT: P11 (Bit 11) */ -#define PORT8_OUT_P11_Msk (0x800UL) /*!< PORT8 OUT: P11 (Bitfield-Mask: 0x01) */ -#define PORT8_OUT_P12_Pos (12UL) /*!< PORT8 OUT: P12 (Bit 12) */ -#define PORT8_OUT_P12_Msk (0x1000UL) /*!< PORT8 OUT: P12 (Bitfield-Mask: 0x01) */ -#define PORT8_OUT_P13_Pos (13UL) /*!< PORT8 OUT: P13 (Bit 13) */ -#define PORT8_OUT_P13_Msk (0x2000UL) /*!< PORT8 OUT: P13 (Bitfield-Mask: 0x01) */ -#define PORT8_OUT_P14_Pos (14UL) /*!< PORT8 OUT: P14 (Bit 14) */ -#define PORT8_OUT_P14_Msk (0x4000UL) /*!< PORT8 OUT: P14 (Bitfield-Mask: 0x01) */ -#define PORT8_OUT_P15_Pos (15UL) /*!< PORT8 OUT: P15 (Bit 15) */ -#define PORT8_OUT_P15_Msk (0x8000UL) /*!< PORT8 OUT: P15 (Bitfield-Mask: 0x01) */ - -/* ---------------------------------- PORT8_OMR --------------------------------- */ -#define PORT8_OMR_PS0_Pos (0UL) /*!< PORT8 OMR: PS0 (Bit 0) */ -#define PORT8_OMR_PS0_Msk (0x1UL) /*!< PORT8 OMR: PS0 (Bitfield-Mask: 0x01) */ -#define PORT8_OMR_PS1_Pos (1UL) /*!< PORT8 OMR: PS1 (Bit 1) */ -#define PORT8_OMR_PS1_Msk (0x2UL) /*!< PORT8 OMR: PS1 (Bitfield-Mask: 0x01) */ -#define PORT8_OMR_PS2_Pos (2UL) /*!< PORT8 OMR: PS2 (Bit 2) */ -#define PORT8_OMR_PS2_Msk (0x4UL) /*!< PORT8 OMR: PS2 (Bitfield-Mask: 0x01) */ -#define PORT8_OMR_PS3_Pos (3UL) /*!< PORT8 OMR: PS3 (Bit 3) */ -#define PORT8_OMR_PS3_Msk (0x8UL) /*!< PORT8 OMR: PS3 (Bitfield-Mask: 0x01) */ -#define PORT8_OMR_PS4_Pos (4UL) /*!< PORT8 OMR: PS4 (Bit 4) */ -#define PORT8_OMR_PS4_Msk (0x10UL) /*!< PORT8 OMR: PS4 (Bitfield-Mask: 0x01) */ -#define PORT8_OMR_PS5_Pos (5UL) /*!< PORT8 OMR: PS5 (Bit 5) */ -#define PORT8_OMR_PS5_Msk (0x20UL) /*!< PORT8 OMR: PS5 (Bitfield-Mask: 0x01) */ -#define PORT8_OMR_PS6_Pos (6UL) /*!< PORT8 OMR: PS6 (Bit 6) */ -#define PORT8_OMR_PS6_Msk (0x40UL) /*!< PORT8 OMR: PS6 (Bitfield-Mask: 0x01) */ -#define PORT8_OMR_PS7_Pos (7UL) /*!< PORT8 OMR: PS7 (Bit 7) */ -#define PORT8_OMR_PS7_Msk (0x80UL) /*!< PORT8 OMR: PS7 (Bitfield-Mask: 0x01) */ -#define PORT8_OMR_PS8_Pos (8UL) /*!< PORT8 OMR: PS8 (Bit 8) */ -#define PORT8_OMR_PS8_Msk (0x100UL) /*!< PORT8 OMR: PS8 (Bitfield-Mask: 0x01) */ -#define PORT8_OMR_PS9_Pos (9UL) /*!< PORT8 OMR: PS9 (Bit 9) */ -#define PORT8_OMR_PS9_Msk (0x200UL) /*!< PORT8 OMR: PS9 (Bitfield-Mask: 0x01) */ -#define PORT8_OMR_PS10_Pos (10UL) /*!< PORT8 OMR: PS10 (Bit 10) */ -#define PORT8_OMR_PS10_Msk (0x400UL) /*!< PORT8 OMR: PS10 (Bitfield-Mask: 0x01) */ -#define PORT8_OMR_PS11_Pos (11UL) /*!< PORT8 OMR: PS11 (Bit 11) */ -#define PORT8_OMR_PS11_Msk (0x800UL) /*!< PORT8 OMR: PS11 (Bitfield-Mask: 0x01) */ -#define PORT8_OMR_PS12_Pos (12UL) /*!< PORT8 OMR: PS12 (Bit 12) */ -#define PORT8_OMR_PS12_Msk (0x1000UL) /*!< PORT8 OMR: PS12 (Bitfield-Mask: 0x01) */ -#define PORT8_OMR_PS13_Pos (13UL) /*!< PORT8 OMR: PS13 (Bit 13) */ -#define PORT8_OMR_PS13_Msk (0x2000UL) /*!< PORT8 OMR: PS13 (Bitfield-Mask: 0x01) */ -#define PORT8_OMR_PS14_Pos (14UL) /*!< PORT8 OMR: PS14 (Bit 14) */ -#define PORT8_OMR_PS14_Msk (0x4000UL) /*!< PORT8 OMR: PS14 (Bitfield-Mask: 0x01) */ -#define PORT8_OMR_PS15_Pos (15UL) /*!< PORT8 OMR: PS15 (Bit 15) */ -#define PORT8_OMR_PS15_Msk (0x8000UL) /*!< PORT8 OMR: PS15 (Bitfield-Mask: 0x01) */ -#define PORT8_OMR_PR0_Pos (16UL) /*!< PORT8 OMR: PR0 (Bit 16) */ -#define PORT8_OMR_PR0_Msk (0x10000UL) /*!< PORT8 OMR: PR0 (Bitfield-Mask: 0x01) */ -#define PORT8_OMR_PR1_Pos (17UL) /*!< PORT8 OMR: PR1 (Bit 17) */ -#define PORT8_OMR_PR1_Msk (0x20000UL) /*!< PORT8 OMR: PR1 (Bitfield-Mask: 0x01) */ -#define PORT8_OMR_PR2_Pos (18UL) /*!< PORT8 OMR: PR2 (Bit 18) */ -#define PORT8_OMR_PR2_Msk (0x40000UL) /*!< PORT8 OMR: PR2 (Bitfield-Mask: 0x01) */ -#define PORT8_OMR_PR3_Pos (19UL) /*!< PORT8 OMR: PR3 (Bit 19) */ -#define PORT8_OMR_PR3_Msk (0x80000UL) /*!< PORT8 OMR: PR3 (Bitfield-Mask: 0x01) */ -#define PORT8_OMR_PR4_Pos (20UL) /*!< PORT8 OMR: PR4 (Bit 20) */ -#define PORT8_OMR_PR4_Msk (0x100000UL) /*!< PORT8 OMR: PR4 (Bitfield-Mask: 0x01) */ -#define PORT8_OMR_PR5_Pos (21UL) /*!< PORT8 OMR: PR5 (Bit 21) */ -#define PORT8_OMR_PR5_Msk (0x200000UL) /*!< PORT8 OMR: PR5 (Bitfield-Mask: 0x01) */ -#define PORT8_OMR_PR6_Pos (22UL) /*!< PORT8 OMR: PR6 (Bit 22) */ -#define PORT8_OMR_PR6_Msk (0x400000UL) /*!< PORT8 OMR: PR6 (Bitfield-Mask: 0x01) */ -#define PORT8_OMR_PR7_Pos (23UL) /*!< PORT8 OMR: PR7 (Bit 23) */ -#define PORT8_OMR_PR7_Msk (0x800000UL) /*!< PORT8 OMR: PR7 (Bitfield-Mask: 0x01) */ -#define PORT8_OMR_PR8_Pos (24UL) /*!< PORT8 OMR: PR8 (Bit 24) */ -#define PORT8_OMR_PR8_Msk (0x1000000UL) /*!< PORT8 OMR: PR8 (Bitfield-Mask: 0x01) */ -#define PORT8_OMR_PR9_Pos (25UL) /*!< PORT8 OMR: PR9 (Bit 25) */ -#define PORT8_OMR_PR9_Msk (0x2000000UL) /*!< PORT8 OMR: PR9 (Bitfield-Mask: 0x01) */ -#define PORT8_OMR_PR10_Pos (26UL) /*!< PORT8 OMR: PR10 (Bit 26) */ -#define PORT8_OMR_PR10_Msk (0x4000000UL) /*!< PORT8 OMR: PR10 (Bitfield-Mask: 0x01) */ -#define PORT8_OMR_PR11_Pos (27UL) /*!< PORT8 OMR: PR11 (Bit 27) */ -#define PORT8_OMR_PR11_Msk (0x8000000UL) /*!< PORT8 OMR: PR11 (Bitfield-Mask: 0x01) */ -#define PORT8_OMR_PR12_Pos (28UL) /*!< PORT8 OMR: PR12 (Bit 28) */ -#define PORT8_OMR_PR12_Msk (0x10000000UL) /*!< PORT8 OMR: PR12 (Bitfield-Mask: 0x01) */ -#define PORT8_OMR_PR13_Pos (29UL) /*!< PORT8 OMR: PR13 (Bit 29) */ -#define PORT8_OMR_PR13_Msk (0x20000000UL) /*!< PORT8 OMR: PR13 (Bitfield-Mask: 0x01) */ -#define PORT8_OMR_PR14_Pos (30UL) /*!< PORT8 OMR: PR14 (Bit 30) */ -#define PORT8_OMR_PR14_Msk (0x40000000UL) /*!< PORT8 OMR: PR14 (Bitfield-Mask: 0x01) */ -#define PORT8_OMR_PR15_Pos (31UL) /*!< PORT8 OMR: PR15 (Bit 31) */ -#define PORT8_OMR_PR15_Msk (0x80000000UL) /*!< PORT8 OMR: PR15 (Bitfield-Mask: 0x01) */ - -/* --------------------------------- PORT8_IOCR0 -------------------------------- */ -#define PORT8_IOCR0_PC0_Pos (3UL) /*!< PORT8 IOCR0: PC0 (Bit 3) */ -#define PORT8_IOCR0_PC0_Msk (0xf8UL) /*!< PORT8 IOCR0: PC0 (Bitfield-Mask: 0x1f) */ -#define PORT8_IOCR0_PC1_Pos (11UL) /*!< PORT8 IOCR0: PC1 (Bit 11) */ -#define PORT8_IOCR0_PC1_Msk (0xf800UL) /*!< PORT8 IOCR0: PC1 (Bitfield-Mask: 0x1f) */ -#define PORT8_IOCR0_PC2_Pos (19UL) /*!< PORT8 IOCR0: PC2 (Bit 19) */ -#define PORT8_IOCR0_PC2_Msk (0xf80000UL) /*!< PORT8 IOCR0: PC2 (Bitfield-Mask: 0x1f) */ -#define PORT8_IOCR0_PC3_Pos (27UL) /*!< PORT8 IOCR0: PC3 (Bit 27) */ -#define PORT8_IOCR0_PC3_Msk (0xf8000000UL) /*!< PORT8 IOCR0: PC3 (Bitfield-Mask: 0x1f) */ - -/* --------------------------------- PORT8_IOCR4 -------------------------------- */ -#define PORT8_IOCR4_PC4_Pos (3UL) /*!< PORT8 IOCR4: PC4 (Bit 3) */ -#define PORT8_IOCR4_PC4_Msk (0xf8UL) /*!< PORT8 IOCR4: PC4 (Bitfield-Mask: 0x1f) */ -#define PORT8_IOCR4_PC5_Pos (11UL) /*!< PORT8 IOCR4: PC5 (Bit 11) */ -#define PORT8_IOCR4_PC5_Msk (0xf800UL) /*!< PORT8 IOCR4: PC5 (Bitfield-Mask: 0x1f) */ -#define PORT8_IOCR4_PC6_Pos (19UL) /*!< PORT8 IOCR4: PC6 (Bit 19) */ -#define PORT8_IOCR4_PC6_Msk (0xf80000UL) /*!< PORT8 IOCR4: PC6 (Bitfield-Mask: 0x1f) */ -#define PORT8_IOCR4_PC7_Pos (27UL) /*!< PORT8 IOCR4: PC7 (Bit 27) */ -#define PORT8_IOCR4_PC7_Msk (0xf8000000UL) /*!< PORT8 IOCR4: PC7 (Bitfield-Mask: 0x1f) */ - -/* --------------------------------- PORT8_IOCR8 -------------------------------- */ -#define PORT8_IOCR8_PC8_Pos (3UL) /*!< PORT8 IOCR8: PC8 (Bit 3) */ -#define PORT8_IOCR8_PC8_Msk (0xf8UL) /*!< PORT8 IOCR8: PC8 (Bitfield-Mask: 0x1f) */ -#define PORT8_IOCR8_PC9_Pos (11UL) /*!< PORT8 IOCR8: PC9 (Bit 11) */ -#define PORT8_IOCR8_PC9_Msk (0xf800UL) /*!< PORT8 IOCR8: PC9 (Bitfield-Mask: 0x1f) */ -#define PORT8_IOCR8_PC10_Pos (19UL) /*!< PORT8 IOCR8: PC10 (Bit 19) */ -#define PORT8_IOCR8_PC10_Msk (0xf80000UL) /*!< PORT8 IOCR8: PC10 (Bitfield-Mask: 0x1f) */ -#define PORT8_IOCR8_PC11_Pos (27UL) /*!< PORT8 IOCR8: PC11 (Bit 27) */ -#define PORT8_IOCR8_PC11_Msk (0xf8000000UL) /*!< PORT8 IOCR8: PC11 (Bitfield-Mask: 0x1f) */ - -/* ---------------------------------- PORT8_IN ---------------------------------- */ -#define PORT8_IN_P0_Pos (0UL) /*!< PORT8 IN: P0 (Bit 0) */ -#define PORT8_IN_P0_Msk (0x1UL) /*!< PORT8 IN: P0 (Bitfield-Mask: 0x01) */ -#define PORT8_IN_P1_Pos (1UL) /*!< PORT8 IN: P1 (Bit 1) */ -#define PORT8_IN_P1_Msk (0x2UL) /*!< PORT8 IN: P1 (Bitfield-Mask: 0x01) */ -#define PORT8_IN_P2_Pos (2UL) /*!< PORT8 IN: P2 (Bit 2) */ -#define PORT8_IN_P2_Msk (0x4UL) /*!< PORT8 IN: P2 (Bitfield-Mask: 0x01) */ -#define PORT8_IN_P3_Pos (3UL) /*!< PORT8 IN: P3 (Bit 3) */ -#define PORT8_IN_P3_Msk (0x8UL) /*!< PORT8 IN: P3 (Bitfield-Mask: 0x01) */ -#define PORT8_IN_P4_Pos (4UL) /*!< PORT8 IN: P4 (Bit 4) */ -#define PORT8_IN_P4_Msk (0x10UL) /*!< PORT8 IN: P4 (Bitfield-Mask: 0x01) */ -#define PORT8_IN_P5_Pos (5UL) /*!< PORT8 IN: P5 (Bit 5) */ -#define PORT8_IN_P5_Msk (0x20UL) /*!< PORT8 IN: P5 (Bitfield-Mask: 0x01) */ -#define PORT8_IN_P6_Pos (6UL) /*!< PORT8 IN: P6 (Bit 6) */ -#define PORT8_IN_P6_Msk (0x40UL) /*!< PORT8 IN: P6 (Bitfield-Mask: 0x01) */ -#define PORT8_IN_P7_Pos (7UL) /*!< PORT8 IN: P7 (Bit 7) */ -#define PORT8_IN_P7_Msk (0x80UL) /*!< PORT8 IN: P7 (Bitfield-Mask: 0x01) */ -#define PORT8_IN_P8_Pos (8UL) /*!< PORT8 IN: P8 (Bit 8) */ -#define PORT8_IN_P8_Msk (0x100UL) /*!< PORT8 IN: P8 (Bitfield-Mask: 0x01) */ -#define PORT8_IN_P9_Pos (9UL) /*!< PORT8 IN: P9 (Bit 9) */ -#define PORT8_IN_P9_Msk (0x200UL) /*!< PORT8 IN: P9 (Bitfield-Mask: 0x01) */ -#define PORT8_IN_P10_Pos (10UL) /*!< PORT8 IN: P10 (Bit 10) */ -#define PORT8_IN_P10_Msk (0x400UL) /*!< PORT8 IN: P10 (Bitfield-Mask: 0x01) */ -#define PORT8_IN_P11_Pos (11UL) /*!< PORT8 IN: P11 (Bit 11) */ -#define PORT8_IN_P11_Msk (0x800UL) /*!< PORT8 IN: P11 (Bitfield-Mask: 0x01) */ -#define PORT8_IN_P12_Pos (12UL) /*!< PORT8 IN: P12 (Bit 12) */ -#define PORT8_IN_P12_Msk (0x1000UL) /*!< PORT8 IN: P12 (Bitfield-Mask: 0x01) */ -#define PORT8_IN_P13_Pos (13UL) /*!< PORT8 IN: P13 (Bit 13) */ -#define PORT8_IN_P13_Msk (0x2000UL) /*!< PORT8 IN: P13 (Bitfield-Mask: 0x01) */ -#define PORT8_IN_P14_Pos (14UL) /*!< PORT8 IN: P14 (Bit 14) */ -#define PORT8_IN_P14_Msk (0x4000UL) /*!< PORT8 IN: P14 (Bitfield-Mask: 0x01) */ -#define PORT8_IN_P15_Pos (15UL) /*!< PORT8 IN: P15 (Bit 15) */ -#define PORT8_IN_P15_Msk (0x8000UL) /*!< PORT8 IN: P15 (Bitfield-Mask: 0x01) */ - -/* --------------------------------- PORT8_PDR0 --------------------------------- */ -#define PORT8_PDR0_PD0_Pos (0UL) /*!< PORT8 PDR0: PD0 (Bit 0) */ -#define PORT8_PDR0_PD0_Msk (0x7UL) /*!< PORT8 PDR0: PD0 (Bitfield-Mask: 0x07) */ -#define PORT8_PDR0_PD1_Pos (4UL) /*!< PORT8 PDR0: PD1 (Bit 4) */ -#define PORT8_PDR0_PD1_Msk (0x70UL) /*!< PORT8 PDR0: PD1 (Bitfield-Mask: 0x07) */ -#define PORT8_PDR0_PD2_Pos (8UL) /*!< PORT8 PDR0: PD2 (Bit 8) */ -#define PORT8_PDR0_PD2_Msk (0x700UL) /*!< PORT8 PDR0: PD2 (Bitfield-Mask: 0x07) */ -#define PORT8_PDR0_PD3_Pos (12UL) /*!< PORT8 PDR0: PD3 (Bit 12) */ -#define PORT8_PDR0_PD3_Msk (0x7000UL) /*!< PORT8 PDR0: PD3 (Bitfield-Mask: 0x07) */ -#define PORT8_PDR0_PD4_Pos (16UL) /*!< PORT8 PDR0: PD4 (Bit 16) */ -#define PORT8_PDR0_PD4_Msk (0x70000UL) /*!< PORT8 PDR0: PD4 (Bitfield-Mask: 0x07) */ -#define PORT8_PDR0_PD5_Pos (20UL) /*!< PORT8 PDR0: PD5 (Bit 20) */ -#define PORT8_PDR0_PD5_Msk (0x700000UL) /*!< PORT8 PDR0: PD5 (Bitfield-Mask: 0x07) */ -#define PORT8_PDR0_PD6_Pos (24UL) /*!< PORT8 PDR0: PD6 (Bit 24) */ -#define PORT8_PDR0_PD6_Msk (0x7000000UL) /*!< PORT8 PDR0: PD6 (Bitfield-Mask: 0x07) */ -#define PORT8_PDR0_PD7_Pos (28UL) /*!< PORT8 PDR0: PD7 (Bit 28) */ -#define PORT8_PDR0_PD7_Msk (0x70000000UL) /*!< PORT8 PDR0: PD7 (Bitfield-Mask: 0x07) */ - -/* --------------------------------- PORT8_PDR1 --------------------------------- */ -#define PORT8_PDR1_PD8_Pos (0UL) /*!< PORT8 PDR1: PD8 (Bit 0) */ -#define PORT8_PDR1_PD8_Msk (0x7UL) /*!< PORT8 PDR1: PD8 (Bitfield-Mask: 0x07) */ -#define PORT8_PDR1_PD9_Pos (4UL) /*!< PORT8 PDR1: PD9 (Bit 4) */ -#define PORT8_PDR1_PD9_Msk (0x70UL) /*!< PORT8 PDR1: PD9 (Bitfield-Mask: 0x07) */ -#define PORT8_PDR1_PD10_Pos (8UL) /*!< PORT8 PDR1: PD10 (Bit 8) */ -#define PORT8_PDR1_PD10_Msk (0x700UL) /*!< PORT8 PDR1: PD10 (Bitfield-Mask: 0x07) */ -#define PORT8_PDR1_PD11_Pos (12UL) /*!< PORT8 PDR1: PD11 (Bit 12) */ -#define PORT8_PDR1_PD11_Msk (0x7000UL) /*!< PORT8 PDR1: PD11 (Bitfield-Mask: 0x07) */ -#define PORT8_PDR1_PD12_Pos (16UL) /*!< PORT8 PDR1: PD12 (Bit 16) */ -#define PORT8_PDR1_PD12_Msk (0x70000UL) /*!< PORT8 PDR1: PD12 (Bitfield-Mask: 0x07) */ -#define PORT8_PDR1_PD13_Pos (20UL) /*!< PORT8 PDR1: PD13 (Bit 20) */ -#define PORT8_PDR1_PD13_Msk (0x700000UL) /*!< PORT8 PDR1: PD13 (Bitfield-Mask: 0x07) */ -#define PORT8_PDR1_PD14_Pos (24UL) /*!< PORT8 PDR1: PD14 (Bit 24) */ -#define PORT8_PDR1_PD14_Msk (0x7000000UL) /*!< PORT8 PDR1: PD14 (Bitfield-Mask: 0x07) */ -#define PORT8_PDR1_PD15_Pos (28UL) /*!< PORT8 PDR1: PD15 (Bit 28) */ -#define PORT8_PDR1_PD15_Msk (0x70000000UL) /*!< PORT8 PDR1: PD15 (Bitfield-Mask: 0x07) */ - -/* --------------------------------- PORT8_PDISC -------------------------------- */ -#define PORT8_PDISC_PDIS0_Pos (0UL) /*!< PORT8 PDISC: PDIS0 (Bit 0) */ -#define PORT8_PDISC_PDIS0_Msk (0x1UL) /*!< PORT8 PDISC: PDIS0 (Bitfield-Mask: 0x01) */ -#define PORT8_PDISC_PDIS1_Pos (1UL) /*!< PORT8 PDISC: PDIS1 (Bit 1) */ -#define PORT8_PDISC_PDIS1_Msk (0x2UL) /*!< PORT8 PDISC: PDIS1 (Bitfield-Mask: 0x01) */ -#define PORT8_PDISC_PDIS2_Pos (2UL) /*!< PORT8 PDISC: PDIS2 (Bit 2) */ -#define PORT8_PDISC_PDIS2_Msk (0x4UL) /*!< PORT8 PDISC: PDIS2 (Bitfield-Mask: 0x01) */ -#define PORT8_PDISC_PDIS3_Pos (3UL) /*!< PORT8 PDISC: PDIS3 (Bit 3) */ -#define PORT8_PDISC_PDIS3_Msk (0x8UL) /*!< PORT8 PDISC: PDIS3 (Bitfield-Mask: 0x01) */ -#define PORT8_PDISC_PDIS4_Pos (4UL) /*!< PORT8 PDISC: PDIS4 (Bit 4) */ -#define PORT8_PDISC_PDIS4_Msk (0x10UL) /*!< PORT8 PDISC: PDIS4 (Bitfield-Mask: 0x01) */ -#define PORT8_PDISC_PDIS5_Pos (5UL) /*!< PORT8 PDISC: PDIS5 (Bit 5) */ -#define PORT8_PDISC_PDIS5_Msk (0x20UL) /*!< PORT8 PDISC: PDIS5 (Bitfield-Mask: 0x01) */ -#define PORT8_PDISC_PDIS6_Pos (6UL) /*!< PORT8 PDISC: PDIS6 (Bit 6) */ -#define PORT8_PDISC_PDIS6_Msk (0x40UL) /*!< PORT8 PDISC: PDIS6 (Bitfield-Mask: 0x01) */ -#define PORT8_PDISC_PDIS7_Pos (7UL) /*!< PORT8 PDISC: PDIS7 (Bit 7) */ -#define PORT8_PDISC_PDIS7_Msk (0x80UL) /*!< PORT8 PDISC: PDIS7 (Bitfield-Mask: 0x01) */ -#define PORT8_PDISC_PDIS8_Pos (8UL) /*!< PORT8 PDISC: PDIS8 (Bit 8) */ -#define PORT8_PDISC_PDIS8_Msk (0x100UL) /*!< PORT8 PDISC: PDIS8 (Bitfield-Mask: 0x01) */ -#define PORT8_PDISC_PDIS9_Pos (9UL) /*!< PORT8 PDISC: PDIS9 (Bit 9) */ -#define PORT8_PDISC_PDIS9_Msk (0x200UL) /*!< PORT8 PDISC: PDIS9 (Bitfield-Mask: 0x01) */ -#define PORT8_PDISC_PDIS10_Pos (10UL) /*!< PORT8 PDISC: PDIS10 (Bit 10) */ -#define PORT8_PDISC_PDIS10_Msk (0x400UL) /*!< PORT8 PDISC: PDIS10 (Bitfield-Mask: 0x01) */ -#define PORT8_PDISC_PDIS11_Pos (11UL) /*!< PORT8 PDISC: PDIS11 (Bit 11) */ -#define PORT8_PDISC_PDIS11_Msk (0x800UL) /*!< PORT8 PDISC: PDIS11 (Bitfield-Mask: 0x01) */ -#define PORT8_PDISC_PDIS12_Pos (12UL) /*!< PORT8 PDISC: PDIS12 (Bit 12) */ -#define PORT8_PDISC_PDIS12_Msk (0x1000UL) /*!< PORT8 PDISC: PDIS12 (Bitfield-Mask: 0x01) */ -#define PORT8_PDISC_PDIS13_Pos (13UL) /*!< PORT8 PDISC: PDIS13 (Bit 13) */ -#define PORT8_PDISC_PDIS13_Msk (0x2000UL) /*!< PORT8 PDISC: PDIS13 (Bitfield-Mask: 0x01) */ -#define PORT8_PDISC_PDIS14_Pos (14UL) /*!< PORT8 PDISC: PDIS14 (Bit 14) */ -#define PORT8_PDISC_PDIS14_Msk (0x4000UL) /*!< PORT8 PDISC: PDIS14 (Bitfield-Mask: 0x01) */ -#define PORT8_PDISC_PDIS15_Pos (15UL) /*!< PORT8 PDISC: PDIS15 (Bit 15) */ -#define PORT8_PDISC_PDIS15_Msk (0x8000UL) /*!< PORT8 PDISC: PDIS15 (Bitfield-Mask: 0x01) */ - -/* ---------------------------------- PORT8_PPS --------------------------------- */ -#define PORT8_PPS_PPS0_Pos (0UL) /*!< PORT8 PPS: PPS0 (Bit 0) */ -#define PORT8_PPS_PPS0_Msk (0x1UL) /*!< PORT8 PPS: PPS0 (Bitfield-Mask: 0x01) */ -#define PORT8_PPS_PPS1_Pos (1UL) /*!< PORT8 PPS: PPS1 (Bit 1) */ -#define PORT8_PPS_PPS1_Msk (0x2UL) /*!< PORT8 PPS: PPS1 (Bitfield-Mask: 0x01) */ -#define PORT8_PPS_PPS2_Pos (2UL) /*!< PORT8 PPS: PPS2 (Bit 2) */ -#define PORT8_PPS_PPS2_Msk (0x4UL) /*!< PORT8 PPS: PPS2 (Bitfield-Mask: 0x01) */ -#define PORT8_PPS_PPS3_Pos (3UL) /*!< PORT8 PPS: PPS3 (Bit 3) */ -#define PORT8_PPS_PPS3_Msk (0x8UL) /*!< PORT8 PPS: PPS3 (Bitfield-Mask: 0x01) */ -#define PORT8_PPS_PPS4_Pos (4UL) /*!< PORT8 PPS: PPS4 (Bit 4) */ -#define PORT8_PPS_PPS4_Msk (0x10UL) /*!< PORT8 PPS: PPS4 (Bitfield-Mask: 0x01) */ -#define PORT8_PPS_PPS5_Pos (5UL) /*!< PORT8 PPS: PPS5 (Bit 5) */ -#define PORT8_PPS_PPS5_Msk (0x20UL) /*!< PORT8 PPS: PPS5 (Bitfield-Mask: 0x01) */ -#define PORT8_PPS_PPS6_Pos (6UL) /*!< PORT8 PPS: PPS6 (Bit 6) */ -#define PORT8_PPS_PPS6_Msk (0x40UL) /*!< PORT8 PPS: PPS6 (Bitfield-Mask: 0x01) */ -#define PORT8_PPS_PPS7_Pos (7UL) /*!< PORT8 PPS: PPS7 (Bit 7) */ -#define PORT8_PPS_PPS7_Msk (0x80UL) /*!< PORT8 PPS: PPS7 (Bitfield-Mask: 0x01) */ -#define PORT8_PPS_PPS8_Pos (8UL) /*!< PORT8 PPS: PPS8 (Bit 8) */ -#define PORT8_PPS_PPS8_Msk (0x100UL) /*!< PORT8 PPS: PPS8 (Bitfield-Mask: 0x01) */ -#define PORT8_PPS_PPS9_Pos (9UL) /*!< PORT8 PPS: PPS9 (Bit 9) */ -#define PORT8_PPS_PPS9_Msk (0x200UL) /*!< PORT8 PPS: PPS9 (Bitfield-Mask: 0x01) */ -#define PORT8_PPS_PPS10_Pos (10UL) /*!< PORT8 PPS: PPS10 (Bit 10) */ -#define PORT8_PPS_PPS10_Msk (0x400UL) /*!< PORT8 PPS: PPS10 (Bitfield-Mask: 0x01) */ -#define PORT8_PPS_PPS11_Pos (11UL) /*!< PORT8 PPS: PPS11 (Bit 11) */ -#define PORT8_PPS_PPS11_Msk (0x800UL) /*!< PORT8 PPS: PPS11 (Bitfield-Mask: 0x01) */ -#define PORT8_PPS_PPS12_Pos (12UL) /*!< PORT8 PPS: PPS12 (Bit 12) */ -#define PORT8_PPS_PPS12_Msk (0x1000UL) /*!< PORT8 PPS: PPS12 (Bitfield-Mask: 0x01) */ -#define PORT8_PPS_PPS13_Pos (13UL) /*!< PORT8 PPS: PPS13 (Bit 13) */ -#define PORT8_PPS_PPS13_Msk (0x2000UL) /*!< PORT8 PPS: PPS13 (Bitfield-Mask: 0x01) */ -#define PORT8_PPS_PPS14_Pos (14UL) /*!< PORT8 PPS: PPS14 (Bit 14) */ -#define PORT8_PPS_PPS14_Msk (0x4000UL) /*!< PORT8 PPS: PPS14 (Bitfield-Mask: 0x01) */ -#define PORT8_PPS_PPS15_Pos (15UL) /*!< PORT8 PPS: PPS15 (Bit 15) */ -#define PORT8_PPS_PPS15_Msk (0x8000UL) /*!< PORT8 PPS: PPS15 (Bitfield-Mask: 0x01) */ - -/* --------------------------------- PORT8_HWSEL -------------------------------- */ -#define PORT8_HWSEL_HW0_Pos (0UL) /*!< PORT8 HWSEL: HW0 (Bit 0) */ -#define PORT8_HWSEL_HW0_Msk (0x3UL) /*!< PORT8 HWSEL: HW0 (Bitfield-Mask: 0x03) */ -#define PORT8_HWSEL_HW1_Pos (2UL) /*!< PORT8 HWSEL: HW1 (Bit 2) */ -#define PORT8_HWSEL_HW1_Msk (0xcUL) /*!< PORT8 HWSEL: HW1 (Bitfield-Mask: 0x03) */ -#define PORT8_HWSEL_HW2_Pos (4UL) /*!< PORT8 HWSEL: HW2 (Bit 4) */ -#define PORT8_HWSEL_HW2_Msk (0x30UL) /*!< PORT8 HWSEL: HW2 (Bitfield-Mask: 0x03) */ -#define PORT8_HWSEL_HW3_Pos (6UL) /*!< PORT8 HWSEL: HW3 (Bit 6) */ -#define PORT8_HWSEL_HW3_Msk (0xc0UL) /*!< PORT8 HWSEL: HW3 (Bitfield-Mask: 0x03) */ -#define PORT8_HWSEL_HW4_Pos (8UL) /*!< PORT8 HWSEL: HW4 (Bit 8) */ -#define PORT8_HWSEL_HW4_Msk (0x300UL) /*!< PORT8 HWSEL: HW4 (Bitfield-Mask: 0x03) */ -#define PORT8_HWSEL_HW5_Pos (10UL) /*!< PORT8 HWSEL: HW5 (Bit 10) */ -#define PORT8_HWSEL_HW5_Msk (0xc00UL) /*!< PORT8 HWSEL: HW5 (Bitfield-Mask: 0x03) */ -#define PORT8_HWSEL_HW6_Pos (12UL) /*!< PORT8 HWSEL: HW6 (Bit 12) */ -#define PORT8_HWSEL_HW6_Msk (0x3000UL) /*!< PORT8 HWSEL: HW6 (Bitfield-Mask: 0x03) */ -#define PORT8_HWSEL_HW7_Pos (14UL) /*!< PORT8 HWSEL: HW7 (Bit 14) */ -#define PORT8_HWSEL_HW7_Msk (0xc000UL) /*!< PORT8 HWSEL: HW7 (Bitfield-Mask: 0x03) */ -#define PORT8_HWSEL_HW8_Pos (16UL) /*!< PORT8 HWSEL: HW8 (Bit 16) */ -#define PORT8_HWSEL_HW8_Msk (0x30000UL) /*!< PORT8 HWSEL: HW8 (Bitfield-Mask: 0x03) */ -#define PORT8_HWSEL_HW9_Pos (18UL) /*!< PORT8 HWSEL: HW9 (Bit 18) */ -#define PORT8_HWSEL_HW9_Msk (0xc0000UL) /*!< PORT8 HWSEL: HW9 (Bitfield-Mask: 0x03) */ -#define PORT8_HWSEL_HW10_Pos (20UL) /*!< PORT8 HWSEL: HW10 (Bit 20) */ -#define PORT8_HWSEL_HW10_Msk (0x300000UL) /*!< PORT8 HWSEL: HW10 (Bitfield-Mask: 0x03) */ -#define PORT8_HWSEL_HW11_Pos (22UL) /*!< PORT8 HWSEL: HW11 (Bit 22) */ -#define PORT8_HWSEL_HW11_Msk (0xc00000UL) /*!< PORT8 HWSEL: HW11 (Bitfield-Mask: 0x03) */ -#define PORT8_HWSEL_HW12_Pos (24UL) /*!< PORT8 HWSEL: HW12 (Bit 24) */ -#define PORT8_HWSEL_HW12_Msk (0x3000000UL) /*!< PORT8 HWSEL: HW12 (Bitfield-Mask: 0x03) */ -#define PORT8_HWSEL_HW13_Pos (26UL) /*!< PORT8 HWSEL: HW13 (Bit 26) */ -#define PORT8_HWSEL_HW13_Msk (0xc000000UL) /*!< PORT8 HWSEL: HW13 (Bitfield-Mask: 0x03) */ -#define PORT8_HWSEL_HW14_Pos (28UL) /*!< PORT8 HWSEL: HW14 (Bit 28) */ -#define PORT8_HWSEL_HW14_Msk (0x30000000UL) /*!< PORT8 HWSEL: HW14 (Bitfield-Mask: 0x03) */ -#define PORT8_HWSEL_HW15_Pos (30UL) /*!< PORT8 HWSEL: HW15 (Bit 30) */ -#define PORT8_HWSEL_HW15_Msk (0xc0000000UL) /*!< PORT8 HWSEL: HW15 (Bitfield-Mask: 0x03) */ - - -/* ================================================================================ */ -/* ================ struct 'PORT9' Position & Mask ================ */ -/* ================================================================================ */ - - -/* ---------------------------------- PORT9_OUT --------------------------------- */ -#define PORT9_OUT_P0_Pos (0UL) /*!< PORT9 OUT: P0 (Bit 0) */ -#define PORT9_OUT_P0_Msk (0x1UL) /*!< PORT9 OUT: P0 (Bitfield-Mask: 0x01) */ -#define PORT9_OUT_P1_Pos (1UL) /*!< PORT9 OUT: P1 (Bit 1) */ -#define PORT9_OUT_P1_Msk (0x2UL) /*!< PORT9 OUT: P1 (Bitfield-Mask: 0x01) */ -#define PORT9_OUT_P2_Pos (2UL) /*!< PORT9 OUT: P2 (Bit 2) */ -#define PORT9_OUT_P2_Msk (0x4UL) /*!< PORT9 OUT: P2 (Bitfield-Mask: 0x01) */ -#define PORT9_OUT_P3_Pos (3UL) /*!< PORT9 OUT: P3 (Bit 3) */ -#define PORT9_OUT_P3_Msk (0x8UL) /*!< PORT9 OUT: P3 (Bitfield-Mask: 0x01) */ -#define PORT9_OUT_P4_Pos (4UL) /*!< PORT9 OUT: P4 (Bit 4) */ -#define PORT9_OUT_P4_Msk (0x10UL) /*!< PORT9 OUT: P4 (Bitfield-Mask: 0x01) */ -#define PORT9_OUT_P5_Pos (5UL) /*!< PORT9 OUT: P5 (Bit 5) */ -#define PORT9_OUT_P5_Msk (0x20UL) /*!< PORT9 OUT: P5 (Bitfield-Mask: 0x01) */ -#define PORT9_OUT_P6_Pos (6UL) /*!< PORT9 OUT: P6 (Bit 6) */ -#define PORT9_OUT_P6_Msk (0x40UL) /*!< PORT9 OUT: P6 (Bitfield-Mask: 0x01) */ -#define PORT9_OUT_P7_Pos (7UL) /*!< PORT9 OUT: P7 (Bit 7) */ -#define PORT9_OUT_P7_Msk (0x80UL) /*!< PORT9 OUT: P7 (Bitfield-Mask: 0x01) */ -#define PORT9_OUT_P8_Pos (8UL) /*!< PORT9 OUT: P8 (Bit 8) */ -#define PORT9_OUT_P8_Msk (0x100UL) /*!< PORT9 OUT: P8 (Bitfield-Mask: 0x01) */ -#define PORT9_OUT_P9_Pos (9UL) /*!< PORT9 OUT: P9 (Bit 9) */ -#define PORT9_OUT_P9_Msk (0x200UL) /*!< PORT9 OUT: P9 (Bitfield-Mask: 0x01) */ -#define PORT9_OUT_P10_Pos (10UL) /*!< PORT9 OUT: P10 (Bit 10) */ -#define PORT9_OUT_P10_Msk (0x400UL) /*!< PORT9 OUT: P10 (Bitfield-Mask: 0x01) */ -#define PORT9_OUT_P11_Pos (11UL) /*!< PORT9 OUT: P11 (Bit 11) */ -#define PORT9_OUT_P11_Msk (0x800UL) /*!< PORT9 OUT: P11 (Bitfield-Mask: 0x01) */ -#define PORT9_OUT_P12_Pos (12UL) /*!< PORT9 OUT: P12 (Bit 12) */ -#define PORT9_OUT_P12_Msk (0x1000UL) /*!< PORT9 OUT: P12 (Bitfield-Mask: 0x01) */ -#define PORT9_OUT_P13_Pos (13UL) /*!< PORT9 OUT: P13 (Bit 13) */ -#define PORT9_OUT_P13_Msk (0x2000UL) /*!< PORT9 OUT: P13 (Bitfield-Mask: 0x01) */ -#define PORT9_OUT_P14_Pos (14UL) /*!< PORT9 OUT: P14 (Bit 14) */ -#define PORT9_OUT_P14_Msk (0x4000UL) /*!< PORT9 OUT: P14 (Bitfield-Mask: 0x01) */ -#define PORT9_OUT_P15_Pos (15UL) /*!< PORT9 OUT: P15 (Bit 15) */ -#define PORT9_OUT_P15_Msk (0x8000UL) /*!< PORT9 OUT: P15 (Bitfield-Mask: 0x01) */ - -/* ---------------------------------- PORT9_OMR --------------------------------- */ -#define PORT9_OMR_PS0_Pos (0UL) /*!< PORT9 OMR: PS0 (Bit 0) */ -#define PORT9_OMR_PS0_Msk (0x1UL) /*!< PORT9 OMR: PS0 (Bitfield-Mask: 0x01) */ -#define PORT9_OMR_PS1_Pos (1UL) /*!< PORT9 OMR: PS1 (Bit 1) */ -#define PORT9_OMR_PS1_Msk (0x2UL) /*!< PORT9 OMR: PS1 (Bitfield-Mask: 0x01) */ -#define PORT9_OMR_PS2_Pos (2UL) /*!< PORT9 OMR: PS2 (Bit 2) */ -#define PORT9_OMR_PS2_Msk (0x4UL) /*!< PORT9 OMR: PS2 (Bitfield-Mask: 0x01) */ -#define PORT9_OMR_PS3_Pos (3UL) /*!< PORT9 OMR: PS3 (Bit 3) */ -#define PORT9_OMR_PS3_Msk (0x8UL) /*!< PORT9 OMR: PS3 (Bitfield-Mask: 0x01) */ -#define PORT9_OMR_PS4_Pos (4UL) /*!< PORT9 OMR: PS4 (Bit 4) */ -#define PORT9_OMR_PS4_Msk (0x10UL) /*!< PORT9 OMR: PS4 (Bitfield-Mask: 0x01) */ -#define PORT9_OMR_PS5_Pos (5UL) /*!< PORT9 OMR: PS5 (Bit 5) */ -#define PORT9_OMR_PS5_Msk (0x20UL) /*!< PORT9 OMR: PS5 (Bitfield-Mask: 0x01) */ -#define PORT9_OMR_PS6_Pos (6UL) /*!< PORT9 OMR: PS6 (Bit 6) */ -#define PORT9_OMR_PS6_Msk (0x40UL) /*!< PORT9 OMR: PS6 (Bitfield-Mask: 0x01) */ -#define PORT9_OMR_PS7_Pos (7UL) /*!< PORT9 OMR: PS7 (Bit 7) */ -#define PORT9_OMR_PS7_Msk (0x80UL) /*!< PORT9 OMR: PS7 (Bitfield-Mask: 0x01) */ -#define PORT9_OMR_PS8_Pos (8UL) /*!< PORT9 OMR: PS8 (Bit 8) */ -#define PORT9_OMR_PS8_Msk (0x100UL) /*!< PORT9 OMR: PS8 (Bitfield-Mask: 0x01) */ -#define PORT9_OMR_PS9_Pos (9UL) /*!< PORT9 OMR: PS9 (Bit 9) */ -#define PORT9_OMR_PS9_Msk (0x200UL) /*!< PORT9 OMR: PS9 (Bitfield-Mask: 0x01) */ -#define PORT9_OMR_PS10_Pos (10UL) /*!< PORT9 OMR: PS10 (Bit 10) */ -#define PORT9_OMR_PS10_Msk (0x400UL) /*!< PORT9 OMR: PS10 (Bitfield-Mask: 0x01) */ -#define PORT9_OMR_PS11_Pos (11UL) /*!< PORT9 OMR: PS11 (Bit 11) */ -#define PORT9_OMR_PS11_Msk (0x800UL) /*!< PORT9 OMR: PS11 (Bitfield-Mask: 0x01) */ -#define PORT9_OMR_PS12_Pos (12UL) /*!< PORT9 OMR: PS12 (Bit 12) */ -#define PORT9_OMR_PS12_Msk (0x1000UL) /*!< PORT9 OMR: PS12 (Bitfield-Mask: 0x01) */ -#define PORT9_OMR_PS13_Pos (13UL) /*!< PORT9 OMR: PS13 (Bit 13) */ -#define PORT9_OMR_PS13_Msk (0x2000UL) /*!< PORT9 OMR: PS13 (Bitfield-Mask: 0x01) */ -#define PORT9_OMR_PS14_Pos (14UL) /*!< PORT9 OMR: PS14 (Bit 14) */ -#define PORT9_OMR_PS14_Msk (0x4000UL) /*!< PORT9 OMR: PS14 (Bitfield-Mask: 0x01) */ -#define PORT9_OMR_PS15_Pos (15UL) /*!< PORT9 OMR: PS15 (Bit 15) */ -#define PORT9_OMR_PS15_Msk (0x8000UL) /*!< PORT9 OMR: PS15 (Bitfield-Mask: 0x01) */ -#define PORT9_OMR_PR0_Pos (16UL) /*!< PORT9 OMR: PR0 (Bit 16) */ -#define PORT9_OMR_PR0_Msk (0x10000UL) /*!< PORT9 OMR: PR0 (Bitfield-Mask: 0x01) */ -#define PORT9_OMR_PR1_Pos (17UL) /*!< PORT9 OMR: PR1 (Bit 17) */ -#define PORT9_OMR_PR1_Msk (0x20000UL) /*!< PORT9 OMR: PR1 (Bitfield-Mask: 0x01) */ -#define PORT9_OMR_PR2_Pos (18UL) /*!< PORT9 OMR: PR2 (Bit 18) */ -#define PORT9_OMR_PR2_Msk (0x40000UL) /*!< PORT9 OMR: PR2 (Bitfield-Mask: 0x01) */ -#define PORT9_OMR_PR3_Pos (19UL) /*!< PORT9 OMR: PR3 (Bit 19) */ -#define PORT9_OMR_PR3_Msk (0x80000UL) /*!< PORT9 OMR: PR3 (Bitfield-Mask: 0x01) */ -#define PORT9_OMR_PR4_Pos (20UL) /*!< PORT9 OMR: PR4 (Bit 20) */ -#define PORT9_OMR_PR4_Msk (0x100000UL) /*!< PORT9 OMR: PR4 (Bitfield-Mask: 0x01) */ -#define PORT9_OMR_PR5_Pos (21UL) /*!< PORT9 OMR: PR5 (Bit 21) */ -#define PORT9_OMR_PR5_Msk (0x200000UL) /*!< PORT9 OMR: PR5 (Bitfield-Mask: 0x01) */ -#define PORT9_OMR_PR6_Pos (22UL) /*!< PORT9 OMR: PR6 (Bit 22) */ -#define PORT9_OMR_PR6_Msk (0x400000UL) /*!< PORT9 OMR: PR6 (Bitfield-Mask: 0x01) */ -#define PORT9_OMR_PR7_Pos (23UL) /*!< PORT9 OMR: PR7 (Bit 23) */ -#define PORT9_OMR_PR7_Msk (0x800000UL) /*!< PORT9 OMR: PR7 (Bitfield-Mask: 0x01) */ -#define PORT9_OMR_PR8_Pos (24UL) /*!< PORT9 OMR: PR8 (Bit 24) */ -#define PORT9_OMR_PR8_Msk (0x1000000UL) /*!< PORT9 OMR: PR8 (Bitfield-Mask: 0x01) */ -#define PORT9_OMR_PR9_Pos (25UL) /*!< PORT9 OMR: PR9 (Bit 25) */ -#define PORT9_OMR_PR9_Msk (0x2000000UL) /*!< PORT9 OMR: PR9 (Bitfield-Mask: 0x01) */ -#define PORT9_OMR_PR10_Pos (26UL) /*!< PORT9 OMR: PR10 (Bit 26) */ -#define PORT9_OMR_PR10_Msk (0x4000000UL) /*!< PORT9 OMR: PR10 (Bitfield-Mask: 0x01) */ -#define PORT9_OMR_PR11_Pos (27UL) /*!< PORT9 OMR: PR11 (Bit 27) */ -#define PORT9_OMR_PR11_Msk (0x8000000UL) /*!< PORT9 OMR: PR11 (Bitfield-Mask: 0x01) */ -#define PORT9_OMR_PR12_Pos (28UL) /*!< PORT9 OMR: PR12 (Bit 28) */ -#define PORT9_OMR_PR12_Msk (0x10000000UL) /*!< PORT9 OMR: PR12 (Bitfield-Mask: 0x01) */ -#define PORT9_OMR_PR13_Pos (29UL) /*!< PORT9 OMR: PR13 (Bit 29) */ -#define PORT9_OMR_PR13_Msk (0x20000000UL) /*!< PORT9 OMR: PR13 (Bitfield-Mask: 0x01) */ -#define PORT9_OMR_PR14_Pos (30UL) /*!< PORT9 OMR: PR14 (Bit 30) */ -#define PORT9_OMR_PR14_Msk (0x40000000UL) /*!< PORT9 OMR: PR14 (Bitfield-Mask: 0x01) */ -#define PORT9_OMR_PR15_Pos (31UL) /*!< PORT9 OMR: PR15 (Bit 31) */ -#define PORT9_OMR_PR15_Msk (0x80000000UL) /*!< PORT9 OMR: PR15 (Bitfield-Mask: 0x01) */ - -/* --------------------------------- PORT9_IOCR0 -------------------------------- */ -#define PORT9_IOCR0_PC0_Pos (3UL) /*!< PORT9 IOCR0: PC0 (Bit 3) */ -#define PORT9_IOCR0_PC0_Msk (0xf8UL) /*!< PORT9 IOCR0: PC0 (Bitfield-Mask: 0x1f) */ -#define PORT9_IOCR0_PC1_Pos (11UL) /*!< PORT9 IOCR0: PC1 (Bit 11) */ -#define PORT9_IOCR0_PC1_Msk (0xf800UL) /*!< PORT9 IOCR0: PC1 (Bitfield-Mask: 0x1f) */ -#define PORT9_IOCR0_PC2_Pos (19UL) /*!< PORT9 IOCR0: PC2 (Bit 19) */ -#define PORT9_IOCR0_PC2_Msk (0xf80000UL) /*!< PORT9 IOCR0: PC2 (Bitfield-Mask: 0x1f) */ -#define PORT9_IOCR0_PC3_Pos (27UL) /*!< PORT9 IOCR0: PC3 (Bit 27) */ -#define PORT9_IOCR0_PC3_Msk (0xf8000000UL) /*!< PORT9 IOCR0: PC3 (Bitfield-Mask: 0x1f) */ - -/* --------------------------------- PORT9_IOCR4 -------------------------------- */ -#define PORT9_IOCR4_PC4_Pos (3UL) /*!< PORT9 IOCR4: PC4 (Bit 3) */ -#define PORT9_IOCR4_PC4_Msk (0xf8UL) /*!< PORT9 IOCR4: PC4 (Bitfield-Mask: 0x1f) */ -#define PORT9_IOCR4_PC5_Pos (11UL) /*!< PORT9 IOCR4: PC5 (Bit 11) */ -#define PORT9_IOCR4_PC5_Msk (0xf800UL) /*!< PORT9 IOCR4: PC5 (Bitfield-Mask: 0x1f) */ -#define PORT9_IOCR4_PC6_Pos (19UL) /*!< PORT9 IOCR4: PC6 (Bit 19) */ -#define PORT9_IOCR4_PC6_Msk (0xf80000UL) /*!< PORT9 IOCR4: PC6 (Bitfield-Mask: 0x1f) */ -#define PORT9_IOCR4_PC7_Pos (27UL) /*!< PORT9 IOCR4: PC7 (Bit 27) */ -#define PORT9_IOCR4_PC7_Msk (0xf8000000UL) /*!< PORT9 IOCR4: PC7 (Bitfield-Mask: 0x1f) */ - -/* --------------------------------- PORT9_IOCR8 -------------------------------- */ -#define PORT9_IOCR8_PC8_Pos (3UL) /*!< PORT9 IOCR8: PC8 (Bit 3) */ -#define PORT9_IOCR8_PC8_Msk (0xf8UL) /*!< PORT9 IOCR8: PC8 (Bitfield-Mask: 0x1f) */ -#define PORT9_IOCR8_PC9_Pos (11UL) /*!< PORT9 IOCR8: PC9 (Bit 11) */ -#define PORT9_IOCR8_PC9_Msk (0xf800UL) /*!< PORT9 IOCR8: PC9 (Bitfield-Mask: 0x1f) */ -#define PORT9_IOCR8_PC10_Pos (19UL) /*!< PORT9 IOCR8: PC10 (Bit 19) */ -#define PORT9_IOCR8_PC10_Msk (0xf80000UL) /*!< PORT9 IOCR8: PC10 (Bitfield-Mask: 0x1f) */ -#define PORT9_IOCR8_PC11_Pos (27UL) /*!< PORT9 IOCR8: PC11 (Bit 27) */ -#define PORT9_IOCR8_PC11_Msk (0xf8000000UL) /*!< PORT9 IOCR8: PC11 (Bitfield-Mask: 0x1f) */ - -/* ---------------------------------- PORT9_IN ---------------------------------- */ -#define PORT9_IN_P0_Pos (0UL) /*!< PORT9 IN: P0 (Bit 0) */ -#define PORT9_IN_P0_Msk (0x1UL) /*!< PORT9 IN: P0 (Bitfield-Mask: 0x01) */ -#define PORT9_IN_P1_Pos (1UL) /*!< PORT9 IN: P1 (Bit 1) */ -#define PORT9_IN_P1_Msk (0x2UL) /*!< PORT9 IN: P1 (Bitfield-Mask: 0x01) */ -#define PORT9_IN_P2_Pos (2UL) /*!< PORT9 IN: P2 (Bit 2) */ -#define PORT9_IN_P2_Msk (0x4UL) /*!< PORT9 IN: P2 (Bitfield-Mask: 0x01) */ -#define PORT9_IN_P3_Pos (3UL) /*!< PORT9 IN: P3 (Bit 3) */ -#define PORT9_IN_P3_Msk (0x8UL) /*!< PORT9 IN: P3 (Bitfield-Mask: 0x01) */ -#define PORT9_IN_P4_Pos (4UL) /*!< PORT9 IN: P4 (Bit 4) */ -#define PORT9_IN_P4_Msk (0x10UL) /*!< PORT9 IN: P4 (Bitfield-Mask: 0x01) */ -#define PORT9_IN_P5_Pos (5UL) /*!< PORT9 IN: P5 (Bit 5) */ -#define PORT9_IN_P5_Msk (0x20UL) /*!< PORT9 IN: P5 (Bitfield-Mask: 0x01) */ -#define PORT9_IN_P6_Pos (6UL) /*!< PORT9 IN: P6 (Bit 6) */ -#define PORT9_IN_P6_Msk (0x40UL) /*!< PORT9 IN: P6 (Bitfield-Mask: 0x01) */ -#define PORT9_IN_P7_Pos (7UL) /*!< PORT9 IN: P7 (Bit 7) */ -#define PORT9_IN_P7_Msk (0x80UL) /*!< PORT9 IN: P7 (Bitfield-Mask: 0x01) */ -#define PORT9_IN_P8_Pos (8UL) /*!< PORT9 IN: P8 (Bit 8) */ -#define PORT9_IN_P8_Msk (0x100UL) /*!< PORT9 IN: P8 (Bitfield-Mask: 0x01) */ -#define PORT9_IN_P9_Pos (9UL) /*!< PORT9 IN: P9 (Bit 9) */ -#define PORT9_IN_P9_Msk (0x200UL) /*!< PORT9 IN: P9 (Bitfield-Mask: 0x01) */ -#define PORT9_IN_P10_Pos (10UL) /*!< PORT9 IN: P10 (Bit 10) */ -#define PORT9_IN_P10_Msk (0x400UL) /*!< PORT9 IN: P10 (Bitfield-Mask: 0x01) */ -#define PORT9_IN_P11_Pos (11UL) /*!< PORT9 IN: P11 (Bit 11) */ -#define PORT9_IN_P11_Msk (0x800UL) /*!< PORT9 IN: P11 (Bitfield-Mask: 0x01) */ -#define PORT9_IN_P12_Pos (12UL) /*!< PORT9 IN: P12 (Bit 12) */ -#define PORT9_IN_P12_Msk (0x1000UL) /*!< PORT9 IN: P12 (Bitfield-Mask: 0x01) */ -#define PORT9_IN_P13_Pos (13UL) /*!< PORT9 IN: P13 (Bit 13) */ -#define PORT9_IN_P13_Msk (0x2000UL) /*!< PORT9 IN: P13 (Bitfield-Mask: 0x01) */ -#define PORT9_IN_P14_Pos (14UL) /*!< PORT9 IN: P14 (Bit 14) */ -#define PORT9_IN_P14_Msk (0x4000UL) /*!< PORT9 IN: P14 (Bitfield-Mask: 0x01) */ -#define PORT9_IN_P15_Pos (15UL) /*!< PORT9 IN: P15 (Bit 15) */ -#define PORT9_IN_P15_Msk (0x8000UL) /*!< PORT9 IN: P15 (Bitfield-Mask: 0x01) */ - -/* --------------------------------- PORT9_PDR0 --------------------------------- */ -#define PORT9_PDR0_PD0_Pos (0UL) /*!< PORT9 PDR0: PD0 (Bit 0) */ -#define PORT9_PDR0_PD0_Msk (0x7UL) /*!< PORT9 PDR0: PD0 (Bitfield-Mask: 0x07) */ -#define PORT9_PDR0_PD1_Pos (4UL) /*!< PORT9 PDR0: PD1 (Bit 4) */ -#define PORT9_PDR0_PD1_Msk (0x70UL) /*!< PORT9 PDR0: PD1 (Bitfield-Mask: 0x07) */ -#define PORT9_PDR0_PD2_Pos (8UL) /*!< PORT9 PDR0: PD2 (Bit 8) */ -#define PORT9_PDR0_PD2_Msk (0x700UL) /*!< PORT9 PDR0: PD2 (Bitfield-Mask: 0x07) */ -#define PORT9_PDR0_PD3_Pos (12UL) /*!< PORT9 PDR0: PD3 (Bit 12) */ -#define PORT9_PDR0_PD3_Msk (0x7000UL) /*!< PORT9 PDR0: PD3 (Bitfield-Mask: 0x07) */ -#define PORT9_PDR0_PD4_Pos (16UL) /*!< PORT9 PDR0: PD4 (Bit 16) */ -#define PORT9_PDR0_PD4_Msk (0x70000UL) /*!< PORT9 PDR0: PD4 (Bitfield-Mask: 0x07) */ -#define PORT9_PDR0_PD5_Pos (20UL) /*!< PORT9 PDR0: PD5 (Bit 20) */ -#define PORT9_PDR0_PD5_Msk (0x700000UL) /*!< PORT9 PDR0: PD5 (Bitfield-Mask: 0x07) */ -#define PORT9_PDR0_PD6_Pos (24UL) /*!< PORT9 PDR0: PD6 (Bit 24) */ -#define PORT9_PDR0_PD6_Msk (0x7000000UL) /*!< PORT9 PDR0: PD6 (Bitfield-Mask: 0x07) */ -#define PORT9_PDR0_PD7_Pos (28UL) /*!< PORT9 PDR0: PD7 (Bit 28) */ -#define PORT9_PDR0_PD7_Msk (0x70000000UL) /*!< PORT9 PDR0: PD7 (Bitfield-Mask: 0x07) */ - -/* --------------------------------- PORT9_PDR1 --------------------------------- */ -#define PORT9_PDR1_PD8_Pos (0UL) /*!< PORT9 PDR1: PD8 (Bit 0) */ -#define PORT9_PDR1_PD8_Msk (0x7UL) /*!< PORT9 PDR1: PD8 (Bitfield-Mask: 0x07) */ -#define PORT9_PDR1_PD9_Pos (4UL) /*!< PORT9 PDR1: PD9 (Bit 4) */ -#define PORT9_PDR1_PD9_Msk (0x70UL) /*!< PORT9 PDR1: PD9 (Bitfield-Mask: 0x07) */ -#define PORT9_PDR1_PD10_Pos (8UL) /*!< PORT9 PDR1: PD10 (Bit 8) */ -#define PORT9_PDR1_PD10_Msk (0x700UL) /*!< PORT9 PDR1: PD10 (Bitfield-Mask: 0x07) */ -#define PORT9_PDR1_PD11_Pos (12UL) /*!< PORT9 PDR1: PD11 (Bit 12) */ -#define PORT9_PDR1_PD11_Msk (0x7000UL) /*!< PORT9 PDR1: PD11 (Bitfield-Mask: 0x07) */ -#define PORT9_PDR1_PD12_Pos (16UL) /*!< PORT9 PDR1: PD12 (Bit 16) */ -#define PORT9_PDR1_PD12_Msk (0x70000UL) /*!< PORT9 PDR1: PD12 (Bitfield-Mask: 0x07) */ -#define PORT9_PDR1_PD13_Pos (20UL) /*!< PORT9 PDR1: PD13 (Bit 20) */ -#define PORT9_PDR1_PD13_Msk (0x700000UL) /*!< PORT9 PDR1: PD13 (Bitfield-Mask: 0x07) */ -#define PORT9_PDR1_PD14_Pos (24UL) /*!< PORT9 PDR1: PD14 (Bit 24) */ -#define PORT9_PDR1_PD14_Msk (0x7000000UL) /*!< PORT9 PDR1: PD14 (Bitfield-Mask: 0x07) */ -#define PORT9_PDR1_PD15_Pos (28UL) /*!< PORT9 PDR1: PD15 (Bit 28) */ -#define PORT9_PDR1_PD15_Msk (0x70000000UL) /*!< PORT9 PDR1: PD15 (Bitfield-Mask: 0x07) */ - -/* --------------------------------- PORT9_PDISC -------------------------------- */ -#define PORT9_PDISC_PDIS0_Pos (0UL) /*!< PORT9 PDISC: PDIS0 (Bit 0) */ -#define PORT9_PDISC_PDIS0_Msk (0x1UL) /*!< PORT9 PDISC: PDIS0 (Bitfield-Mask: 0x01) */ -#define PORT9_PDISC_PDIS1_Pos (1UL) /*!< PORT9 PDISC: PDIS1 (Bit 1) */ -#define PORT9_PDISC_PDIS1_Msk (0x2UL) /*!< PORT9 PDISC: PDIS1 (Bitfield-Mask: 0x01) */ -#define PORT9_PDISC_PDIS2_Pos (2UL) /*!< PORT9 PDISC: PDIS2 (Bit 2) */ -#define PORT9_PDISC_PDIS2_Msk (0x4UL) /*!< PORT9 PDISC: PDIS2 (Bitfield-Mask: 0x01) */ -#define PORT9_PDISC_PDIS3_Pos (3UL) /*!< PORT9 PDISC: PDIS3 (Bit 3) */ -#define PORT9_PDISC_PDIS3_Msk (0x8UL) /*!< PORT9 PDISC: PDIS3 (Bitfield-Mask: 0x01) */ -#define PORT9_PDISC_PDIS4_Pos (4UL) /*!< PORT9 PDISC: PDIS4 (Bit 4) */ -#define PORT9_PDISC_PDIS4_Msk (0x10UL) /*!< PORT9 PDISC: PDIS4 (Bitfield-Mask: 0x01) */ -#define PORT9_PDISC_PDIS5_Pos (5UL) /*!< PORT9 PDISC: PDIS5 (Bit 5) */ -#define PORT9_PDISC_PDIS5_Msk (0x20UL) /*!< PORT9 PDISC: PDIS5 (Bitfield-Mask: 0x01) */ -#define PORT9_PDISC_PDIS6_Pos (6UL) /*!< PORT9 PDISC: PDIS6 (Bit 6) */ -#define PORT9_PDISC_PDIS6_Msk (0x40UL) /*!< PORT9 PDISC: PDIS6 (Bitfield-Mask: 0x01) */ -#define PORT9_PDISC_PDIS7_Pos (7UL) /*!< PORT9 PDISC: PDIS7 (Bit 7) */ -#define PORT9_PDISC_PDIS7_Msk (0x80UL) /*!< PORT9 PDISC: PDIS7 (Bitfield-Mask: 0x01) */ -#define PORT9_PDISC_PDIS8_Pos (8UL) /*!< PORT9 PDISC: PDIS8 (Bit 8) */ -#define PORT9_PDISC_PDIS8_Msk (0x100UL) /*!< PORT9 PDISC: PDIS8 (Bitfield-Mask: 0x01) */ -#define PORT9_PDISC_PDIS9_Pos (9UL) /*!< PORT9 PDISC: PDIS9 (Bit 9) */ -#define PORT9_PDISC_PDIS9_Msk (0x200UL) /*!< PORT9 PDISC: PDIS9 (Bitfield-Mask: 0x01) */ -#define PORT9_PDISC_PDIS10_Pos (10UL) /*!< PORT9 PDISC: PDIS10 (Bit 10) */ -#define PORT9_PDISC_PDIS10_Msk (0x400UL) /*!< PORT9 PDISC: PDIS10 (Bitfield-Mask: 0x01) */ -#define PORT9_PDISC_PDIS11_Pos (11UL) /*!< PORT9 PDISC: PDIS11 (Bit 11) */ -#define PORT9_PDISC_PDIS11_Msk (0x800UL) /*!< PORT9 PDISC: PDIS11 (Bitfield-Mask: 0x01) */ -#define PORT9_PDISC_PDIS12_Pos (12UL) /*!< PORT9 PDISC: PDIS12 (Bit 12) */ -#define PORT9_PDISC_PDIS12_Msk (0x1000UL) /*!< PORT9 PDISC: PDIS12 (Bitfield-Mask: 0x01) */ -#define PORT9_PDISC_PDIS13_Pos (13UL) /*!< PORT9 PDISC: PDIS13 (Bit 13) */ -#define PORT9_PDISC_PDIS13_Msk (0x2000UL) /*!< PORT9 PDISC: PDIS13 (Bitfield-Mask: 0x01) */ -#define PORT9_PDISC_PDIS14_Pos (14UL) /*!< PORT9 PDISC: PDIS14 (Bit 14) */ -#define PORT9_PDISC_PDIS14_Msk (0x4000UL) /*!< PORT9 PDISC: PDIS14 (Bitfield-Mask: 0x01) */ -#define PORT9_PDISC_PDIS15_Pos (15UL) /*!< PORT9 PDISC: PDIS15 (Bit 15) */ -#define PORT9_PDISC_PDIS15_Msk (0x8000UL) /*!< PORT9 PDISC: PDIS15 (Bitfield-Mask: 0x01) */ - -/* ---------------------------------- PORT9_PPS --------------------------------- */ -#define PORT9_PPS_PPS0_Pos (0UL) /*!< PORT9 PPS: PPS0 (Bit 0) */ -#define PORT9_PPS_PPS0_Msk (0x1UL) /*!< PORT9 PPS: PPS0 (Bitfield-Mask: 0x01) */ -#define PORT9_PPS_PPS1_Pos (1UL) /*!< PORT9 PPS: PPS1 (Bit 1) */ -#define PORT9_PPS_PPS1_Msk (0x2UL) /*!< PORT9 PPS: PPS1 (Bitfield-Mask: 0x01) */ -#define PORT9_PPS_PPS2_Pos (2UL) /*!< PORT9 PPS: PPS2 (Bit 2) */ -#define PORT9_PPS_PPS2_Msk (0x4UL) /*!< PORT9 PPS: PPS2 (Bitfield-Mask: 0x01) */ -#define PORT9_PPS_PPS3_Pos (3UL) /*!< PORT9 PPS: PPS3 (Bit 3) */ -#define PORT9_PPS_PPS3_Msk (0x8UL) /*!< PORT9 PPS: PPS3 (Bitfield-Mask: 0x01) */ -#define PORT9_PPS_PPS4_Pos (4UL) /*!< PORT9 PPS: PPS4 (Bit 4) */ -#define PORT9_PPS_PPS4_Msk (0x10UL) /*!< PORT9 PPS: PPS4 (Bitfield-Mask: 0x01) */ -#define PORT9_PPS_PPS5_Pos (5UL) /*!< PORT9 PPS: PPS5 (Bit 5) */ -#define PORT9_PPS_PPS5_Msk (0x20UL) /*!< PORT9 PPS: PPS5 (Bitfield-Mask: 0x01) */ -#define PORT9_PPS_PPS6_Pos (6UL) /*!< PORT9 PPS: PPS6 (Bit 6) */ -#define PORT9_PPS_PPS6_Msk (0x40UL) /*!< PORT9 PPS: PPS6 (Bitfield-Mask: 0x01) */ -#define PORT9_PPS_PPS7_Pos (7UL) /*!< PORT9 PPS: PPS7 (Bit 7) */ -#define PORT9_PPS_PPS7_Msk (0x80UL) /*!< PORT9 PPS: PPS7 (Bitfield-Mask: 0x01) */ -#define PORT9_PPS_PPS8_Pos (8UL) /*!< PORT9 PPS: PPS8 (Bit 8) */ -#define PORT9_PPS_PPS8_Msk (0x100UL) /*!< PORT9 PPS: PPS8 (Bitfield-Mask: 0x01) */ -#define PORT9_PPS_PPS9_Pos (9UL) /*!< PORT9 PPS: PPS9 (Bit 9) */ -#define PORT9_PPS_PPS9_Msk (0x200UL) /*!< PORT9 PPS: PPS9 (Bitfield-Mask: 0x01) */ -#define PORT9_PPS_PPS10_Pos (10UL) /*!< PORT9 PPS: PPS10 (Bit 10) */ -#define PORT9_PPS_PPS10_Msk (0x400UL) /*!< PORT9 PPS: PPS10 (Bitfield-Mask: 0x01) */ -#define PORT9_PPS_PPS11_Pos (11UL) /*!< PORT9 PPS: PPS11 (Bit 11) */ -#define PORT9_PPS_PPS11_Msk (0x800UL) /*!< PORT9 PPS: PPS11 (Bitfield-Mask: 0x01) */ -#define PORT9_PPS_PPS12_Pos (12UL) /*!< PORT9 PPS: PPS12 (Bit 12) */ -#define PORT9_PPS_PPS12_Msk (0x1000UL) /*!< PORT9 PPS: PPS12 (Bitfield-Mask: 0x01) */ -#define PORT9_PPS_PPS13_Pos (13UL) /*!< PORT9 PPS: PPS13 (Bit 13) */ -#define PORT9_PPS_PPS13_Msk (0x2000UL) /*!< PORT9 PPS: PPS13 (Bitfield-Mask: 0x01) */ -#define PORT9_PPS_PPS14_Pos (14UL) /*!< PORT9 PPS: PPS14 (Bit 14) */ -#define PORT9_PPS_PPS14_Msk (0x4000UL) /*!< PORT9 PPS: PPS14 (Bitfield-Mask: 0x01) */ -#define PORT9_PPS_PPS15_Pos (15UL) /*!< PORT9 PPS: PPS15 (Bit 15) */ -#define PORT9_PPS_PPS15_Msk (0x8000UL) /*!< PORT9 PPS: PPS15 (Bitfield-Mask: 0x01) */ - -/* --------------------------------- PORT9_HWSEL -------------------------------- */ -#define PORT9_HWSEL_HW0_Pos (0UL) /*!< PORT9 HWSEL: HW0 (Bit 0) */ -#define PORT9_HWSEL_HW0_Msk (0x3UL) /*!< PORT9 HWSEL: HW0 (Bitfield-Mask: 0x03) */ -#define PORT9_HWSEL_HW1_Pos (2UL) /*!< PORT9 HWSEL: HW1 (Bit 2) */ -#define PORT9_HWSEL_HW1_Msk (0xcUL) /*!< PORT9 HWSEL: HW1 (Bitfield-Mask: 0x03) */ -#define PORT9_HWSEL_HW2_Pos (4UL) /*!< PORT9 HWSEL: HW2 (Bit 4) */ -#define PORT9_HWSEL_HW2_Msk (0x30UL) /*!< PORT9 HWSEL: HW2 (Bitfield-Mask: 0x03) */ -#define PORT9_HWSEL_HW3_Pos (6UL) /*!< PORT9 HWSEL: HW3 (Bit 6) */ -#define PORT9_HWSEL_HW3_Msk (0xc0UL) /*!< PORT9 HWSEL: HW3 (Bitfield-Mask: 0x03) */ -#define PORT9_HWSEL_HW4_Pos (8UL) /*!< PORT9 HWSEL: HW4 (Bit 8) */ -#define PORT9_HWSEL_HW4_Msk (0x300UL) /*!< PORT9 HWSEL: HW4 (Bitfield-Mask: 0x03) */ -#define PORT9_HWSEL_HW5_Pos (10UL) /*!< PORT9 HWSEL: HW5 (Bit 10) */ -#define PORT9_HWSEL_HW5_Msk (0xc00UL) /*!< PORT9 HWSEL: HW5 (Bitfield-Mask: 0x03) */ -#define PORT9_HWSEL_HW6_Pos (12UL) /*!< PORT9 HWSEL: HW6 (Bit 12) */ -#define PORT9_HWSEL_HW6_Msk (0x3000UL) /*!< PORT9 HWSEL: HW6 (Bitfield-Mask: 0x03) */ -#define PORT9_HWSEL_HW7_Pos (14UL) /*!< PORT9 HWSEL: HW7 (Bit 14) */ -#define PORT9_HWSEL_HW7_Msk (0xc000UL) /*!< PORT9 HWSEL: HW7 (Bitfield-Mask: 0x03) */ -#define PORT9_HWSEL_HW8_Pos (16UL) /*!< PORT9 HWSEL: HW8 (Bit 16) */ -#define PORT9_HWSEL_HW8_Msk (0x30000UL) /*!< PORT9 HWSEL: HW8 (Bitfield-Mask: 0x03) */ -#define PORT9_HWSEL_HW9_Pos (18UL) /*!< PORT9 HWSEL: HW9 (Bit 18) */ -#define PORT9_HWSEL_HW9_Msk (0xc0000UL) /*!< PORT9 HWSEL: HW9 (Bitfield-Mask: 0x03) */ -#define PORT9_HWSEL_HW10_Pos (20UL) /*!< PORT9 HWSEL: HW10 (Bit 20) */ -#define PORT9_HWSEL_HW10_Msk (0x300000UL) /*!< PORT9 HWSEL: HW10 (Bitfield-Mask: 0x03) */ -#define PORT9_HWSEL_HW11_Pos (22UL) /*!< PORT9 HWSEL: HW11 (Bit 22) */ -#define PORT9_HWSEL_HW11_Msk (0xc00000UL) /*!< PORT9 HWSEL: HW11 (Bitfield-Mask: 0x03) */ -#define PORT9_HWSEL_HW12_Pos (24UL) /*!< PORT9 HWSEL: HW12 (Bit 24) */ -#define PORT9_HWSEL_HW12_Msk (0x3000000UL) /*!< PORT9 HWSEL: HW12 (Bitfield-Mask: 0x03) */ -#define PORT9_HWSEL_HW13_Pos (26UL) /*!< PORT9 HWSEL: HW13 (Bit 26) */ -#define PORT9_HWSEL_HW13_Msk (0xc000000UL) /*!< PORT9 HWSEL: HW13 (Bitfield-Mask: 0x03) */ -#define PORT9_HWSEL_HW14_Pos (28UL) /*!< PORT9 HWSEL: HW14 (Bit 28) */ -#define PORT9_HWSEL_HW14_Msk (0x30000000UL) /*!< PORT9 HWSEL: HW14 (Bitfield-Mask: 0x03) */ -#define PORT9_HWSEL_HW15_Pos (30UL) /*!< PORT9 HWSEL: HW15 (Bit 30) */ -#define PORT9_HWSEL_HW15_Msk (0xc0000000UL) /*!< PORT9 HWSEL: HW15 (Bitfield-Mask: 0x03) */ - - -/* ================================================================================ */ -/* ================ struct 'PORT14' Position & Mask ================ */ -/* ================================================================================ */ - - -/* --------------------------------- PORT14_OUT --------------------------------- */ -#define PORT14_OUT_P0_Pos (0UL) /*!< PORT14 OUT: P0 (Bit 0) */ -#define PORT14_OUT_P0_Msk (0x1UL) /*!< PORT14 OUT: P0 (Bitfield-Mask: 0x01) */ -#define PORT14_OUT_P1_Pos (1UL) /*!< PORT14 OUT: P1 (Bit 1) */ -#define PORT14_OUT_P1_Msk (0x2UL) /*!< PORT14 OUT: P1 (Bitfield-Mask: 0x01) */ -#define PORT14_OUT_P2_Pos (2UL) /*!< PORT14 OUT: P2 (Bit 2) */ -#define PORT14_OUT_P2_Msk (0x4UL) /*!< PORT14 OUT: P2 (Bitfield-Mask: 0x01) */ -#define PORT14_OUT_P3_Pos (3UL) /*!< PORT14 OUT: P3 (Bit 3) */ -#define PORT14_OUT_P3_Msk (0x8UL) /*!< PORT14 OUT: P3 (Bitfield-Mask: 0x01) */ -#define PORT14_OUT_P4_Pos (4UL) /*!< PORT14 OUT: P4 (Bit 4) */ -#define PORT14_OUT_P4_Msk (0x10UL) /*!< PORT14 OUT: P4 (Bitfield-Mask: 0x01) */ -#define PORT14_OUT_P5_Pos (5UL) /*!< PORT14 OUT: P5 (Bit 5) */ -#define PORT14_OUT_P5_Msk (0x20UL) /*!< PORT14 OUT: P5 (Bitfield-Mask: 0x01) */ -#define PORT14_OUT_P6_Pos (6UL) /*!< PORT14 OUT: P6 (Bit 6) */ -#define PORT14_OUT_P6_Msk (0x40UL) /*!< PORT14 OUT: P6 (Bitfield-Mask: 0x01) */ -#define PORT14_OUT_P7_Pos (7UL) /*!< PORT14 OUT: P7 (Bit 7) */ -#define PORT14_OUT_P7_Msk (0x80UL) /*!< PORT14 OUT: P7 (Bitfield-Mask: 0x01) */ -#define PORT14_OUT_P8_Pos (8UL) /*!< PORT14 OUT: P8 (Bit 8) */ -#define PORT14_OUT_P8_Msk (0x100UL) /*!< PORT14 OUT: P8 (Bitfield-Mask: 0x01) */ -#define PORT14_OUT_P9_Pos (9UL) /*!< PORT14 OUT: P9 (Bit 9) */ -#define PORT14_OUT_P9_Msk (0x200UL) /*!< PORT14 OUT: P9 (Bitfield-Mask: 0x01) */ -#define PORT14_OUT_P10_Pos (10UL) /*!< PORT14 OUT: P10 (Bit 10) */ -#define PORT14_OUT_P10_Msk (0x400UL) /*!< PORT14 OUT: P10 (Bitfield-Mask: 0x01) */ -#define PORT14_OUT_P11_Pos (11UL) /*!< PORT14 OUT: P11 (Bit 11) */ -#define PORT14_OUT_P11_Msk (0x800UL) /*!< PORT14 OUT: P11 (Bitfield-Mask: 0x01) */ -#define PORT14_OUT_P12_Pos (12UL) /*!< PORT14 OUT: P12 (Bit 12) */ -#define PORT14_OUT_P12_Msk (0x1000UL) /*!< PORT14 OUT: P12 (Bitfield-Mask: 0x01) */ -#define PORT14_OUT_P13_Pos (13UL) /*!< PORT14 OUT: P13 (Bit 13) */ -#define PORT14_OUT_P13_Msk (0x2000UL) /*!< PORT14 OUT: P13 (Bitfield-Mask: 0x01) */ -#define PORT14_OUT_P14_Pos (14UL) /*!< PORT14 OUT: P14 (Bit 14) */ -#define PORT14_OUT_P14_Msk (0x4000UL) /*!< PORT14 OUT: P14 (Bitfield-Mask: 0x01) */ -#define PORT14_OUT_P15_Pos (15UL) /*!< PORT14 OUT: P15 (Bit 15) */ -#define PORT14_OUT_P15_Msk (0x8000UL) /*!< PORT14 OUT: P15 (Bitfield-Mask: 0x01) */ - -/* --------------------------------- PORT14_OMR --------------------------------- */ -#define PORT14_OMR_PS0_Pos (0UL) /*!< PORT14 OMR: PS0 (Bit 0) */ -#define PORT14_OMR_PS0_Msk (0x1UL) /*!< PORT14 OMR: PS0 (Bitfield-Mask: 0x01) */ -#define PORT14_OMR_PS1_Pos (1UL) /*!< PORT14 OMR: PS1 (Bit 1) */ -#define PORT14_OMR_PS1_Msk (0x2UL) /*!< PORT14 OMR: PS1 (Bitfield-Mask: 0x01) */ -#define PORT14_OMR_PS2_Pos (2UL) /*!< PORT14 OMR: PS2 (Bit 2) */ -#define PORT14_OMR_PS2_Msk (0x4UL) /*!< PORT14 OMR: PS2 (Bitfield-Mask: 0x01) */ -#define PORT14_OMR_PS3_Pos (3UL) /*!< PORT14 OMR: PS3 (Bit 3) */ -#define PORT14_OMR_PS3_Msk (0x8UL) /*!< PORT14 OMR: PS3 (Bitfield-Mask: 0x01) */ -#define PORT14_OMR_PS4_Pos (4UL) /*!< PORT14 OMR: PS4 (Bit 4) */ -#define PORT14_OMR_PS4_Msk (0x10UL) /*!< PORT14 OMR: PS4 (Bitfield-Mask: 0x01) */ -#define PORT14_OMR_PS5_Pos (5UL) /*!< PORT14 OMR: PS5 (Bit 5) */ -#define PORT14_OMR_PS5_Msk (0x20UL) /*!< PORT14 OMR: PS5 (Bitfield-Mask: 0x01) */ -#define PORT14_OMR_PS6_Pos (6UL) /*!< PORT14 OMR: PS6 (Bit 6) */ -#define PORT14_OMR_PS6_Msk (0x40UL) /*!< PORT14 OMR: PS6 (Bitfield-Mask: 0x01) */ -#define PORT14_OMR_PS7_Pos (7UL) /*!< PORT14 OMR: PS7 (Bit 7) */ -#define PORT14_OMR_PS7_Msk (0x80UL) /*!< PORT14 OMR: PS7 (Bitfield-Mask: 0x01) */ -#define PORT14_OMR_PS8_Pos (8UL) /*!< PORT14 OMR: PS8 (Bit 8) */ -#define PORT14_OMR_PS8_Msk (0x100UL) /*!< PORT14 OMR: PS8 (Bitfield-Mask: 0x01) */ -#define PORT14_OMR_PS9_Pos (9UL) /*!< PORT14 OMR: PS9 (Bit 9) */ -#define PORT14_OMR_PS9_Msk (0x200UL) /*!< PORT14 OMR: PS9 (Bitfield-Mask: 0x01) */ -#define PORT14_OMR_PS10_Pos (10UL) /*!< PORT14 OMR: PS10 (Bit 10) */ -#define PORT14_OMR_PS10_Msk (0x400UL) /*!< PORT14 OMR: PS10 (Bitfield-Mask: 0x01) */ -#define PORT14_OMR_PS11_Pos (11UL) /*!< PORT14 OMR: PS11 (Bit 11) */ -#define PORT14_OMR_PS11_Msk (0x800UL) /*!< PORT14 OMR: PS11 (Bitfield-Mask: 0x01) */ -#define PORT14_OMR_PS12_Pos (12UL) /*!< PORT14 OMR: PS12 (Bit 12) */ -#define PORT14_OMR_PS12_Msk (0x1000UL) /*!< PORT14 OMR: PS12 (Bitfield-Mask: 0x01) */ -#define PORT14_OMR_PS13_Pos (13UL) /*!< PORT14 OMR: PS13 (Bit 13) */ -#define PORT14_OMR_PS13_Msk (0x2000UL) /*!< PORT14 OMR: PS13 (Bitfield-Mask: 0x01) */ -#define PORT14_OMR_PS14_Pos (14UL) /*!< PORT14 OMR: PS14 (Bit 14) */ -#define PORT14_OMR_PS14_Msk (0x4000UL) /*!< PORT14 OMR: PS14 (Bitfield-Mask: 0x01) */ -#define PORT14_OMR_PS15_Pos (15UL) /*!< PORT14 OMR: PS15 (Bit 15) */ -#define PORT14_OMR_PS15_Msk (0x8000UL) /*!< PORT14 OMR: PS15 (Bitfield-Mask: 0x01) */ -#define PORT14_OMR_PR0_Pos (16UL) /*!< PORT14 OMR: PR0 (Bit 16) */ -#define PORT14_OMR_PR0_Msk (0x10000UL) /*!< PORT14 OMR: PR0 (Bitfield-Mask: 0x01) */ -#define PORT14_OMR_PR1_Pos (17UL) /*!< PORT14 OMR: PR1 (Bit 17) */ -#define PORT14_OMR_PR1_Msk (0x20000UL) /*!< PORT14 OMR: PR1 (Bitfield-Mask: 0x01) */ -#define PORT14_OMR_PR2_Pos (18UL) /*!< PORT14 OMR: PR2 (Bit 18) */ -#define PORT14_OMR_PR2_Msk (0x40000UL) /*!< PORT14 OMR: PR2 (Bitfield-Mask: 0x01) */ -#define PORT14_OMR_PR3_Pos (19UL) /*!< PORT14 OMR: PR3 (Bit 19) */ -#define PORT14_OMR_PR3_Msk (0x80000UL) /*!< PORT14 OMR: PR3 (Bitfield-Mask: 0x01) */ -#define PORT14_OMR_PR4_Pos (20UL) /*!< PORT14 OMR: PR4 (Bit 20) */ -#define PORT14_OMR_PR4_Msk (0x100000UL) /*!< PORT14 OMR: PR4 (Bitfield-Mask: 0x01) */ -#define PORT14_OMR_PR5_Pos (21UL) /*!< PORT14 OMR: PR5 (Bit 21) */ -#define PORT14_OMR_PR5_Msk (0x200000UL) /*!< PORT14 OMR: PR5 (Bitfield-Mask: 0x01) */ -#define PORT14_OMR_PR6_Pos (22UL) /*!< PORT14 OMR: PR6 (Bit 22) */ -#define PORT14_OMR_PR6_Msk (0x400000UL) /*!< PORT14 OMR: PR6 (Bitfield-Mask: 0x01) */ -#define PORT14_OMR_PR7_Pos (23UL) /*!< PORT14 OMR: PR7 (Bit 23) */ -#define PORT14_OMR_PR7_Msk (0x800000UL) /*!< PORT14 OMR: PR7 (Bitfield-Mask: 0x01) */ -#define PORT14_OMR_PR8_Pos (24UL) /*!< PORT14 OMR: PR8 (Bit 24) */ -#define PORT14_OMR_PR8_Msk (0x1000000UL) /*!< PORT14 OMR: PR8 (Bitfield-Mask: 0x01) */ -#define PORT14_OMR_PR9_Pos (25UL) /*!< PORT14 OMR: PR9 (Bit 25) */ -#define PORT14_OMR_PR9_Msk (0x2000000UL) /*!< PORT14 OMR: PR9 (Bitfield-Mask: 0x01) */ -#define PORT14_OMR_PR10_Pos (26UL) /*!< PORT14 OMR: PR10 (Bit 26) */ -#define PORT14_OMR_PR10_Msk (0x4000000UL) /*!< PORT14 OMR: PR10 (Bitfield-Mask: 0x01) */ -#define PORT14_OMR_PR11_Pos (27UL) /*!< PORT14 OMR: PR11 (Bit 27) */ -#define PORT14_OMR_PR11_Msk (0x8000000UL) /*!< PORT14 OMR: PR11 (Bitfield-Mask: 0x01) */ -#define PORT14_OMR_PR12_Pos (28UL) /*!< PORT14 OMR: PR12 (Bit 28) */ -#define PORT14_OMR_PR12_Msk (0x10000000UL) /*!< PORT14 OMR: PR12 (Bitfield-Mask: 0x01) */ -#define PORT14_OMR_PR13_Pos (29UL) /*!< PORT14 OMR: PR13 (Bit 29) */ -#define PORT14_OMR_PR13_Msk (0x20000000UL) /*!< PORT14 OMR: PR13 (Bitfield-Mask: 0x01) */ -#define PORT14_OMR_PR14_Pos (30UL) /*!< PORT14 OMR: PR14 (Bit 30) */ -#define PORT14_OMR_PR14_Msk (0x40000000UL) /*!< PORT14 OMR: PR14 (Bitfield-Mask: 0x01) */ -#define PORT14_OMR_PR15_Pos (31UL) /*!< PORT14 OMR: PR15 (Bit 31) */ -#define PORT14_OMR_PR15_Msk (0x80000000UL) /*!< PORT14 OMR: PR15 (Bitfield-Mask: 0x01) */ - -/* -------------------------------- PORT14_IOCR0 -------------------------------- */ -#define PORT14_IOCR0_PC0_Pos (3UL) /*!< PORT14 IOCR0: PC0 (Bit 3) */ -#define PORT14_IOCR0_PC0_Msk (0xf8UL) /*!< PORT14 IOCR0: PC0 (Bitfield-Mask: 0x1f) */ -#define PORT14_IOCR0_PC1_Pos (11UL) /*!< PORT14 IOCR0: PC1 (Bit 11) */ -#define PORT14_IOCR0_PC1_Msk (0xf800UL) /*!< PORT14 IOCR0: PC1 (Bitfield-Mask: 0x1f) */ -#define PORT14_IOCR0_PC2_Pos (19UL) /*!< PORT14 IOCR0: PC2 (Bit 19) */ -#define PORT14_IOCR0_PC2_Msk (0xf80000UL) /*!< PORT14 IOCR0: PC2 (Bitfield-Mask: 0x1f) */ -#define PORT14_IOCR0_PC3_Pos (27UL) /*!< PORT14 IOCR0: PC3 (Bit 27) */ -#define PORT14_IOCR0_PC3_Msk (0xf8000000UL) /*!< PORT14 IOCR0: PC3 (Bitfield-Mask: 0x1f) */ - -/* -------------------------------- PORT14_IOCR4 -------------------------------- */ -#define PORT14_IOCR4_PC4_Pos (3UL) /*!< PORT14 IOCR4: PC4 (Bit 3) */ -#define PORT14_IOCR4_PC4_Msk (0xf8UL) /*!< PORT14 IOCR4: PC4 (Bitfield-Mask: 0x1f) */ -#define PORT14_IOCR4_PC5_Pos (11UL) /*!< PORT14 IOCR4: PC5 (Bit 11) */ -#define PORT14_IOCR4_PC5_Msk (0xf800UL) /*!< PORT14 IOCR4: PC5 (Bitfield-Mask: 0x1f) */ -#define PORT14_IOCR4_PC6_Pos (19UL) /*!< PORT14 IOCR4: PC6 (Bit 19) */ -#define PORT14_IOCR4_PC6_Msk (0xf80000UL) /*!< PORT14 IOCR4: PC6 (Bitfield-Mask: 0x1f) */ -#define PORT14_IOCR4_PC7_Pos (27UL) /*!< PORT14 IOCR4: PC7 (Bit 27) */ -#define PORT14_IOCR4_PC7_Msk (0xf8000000UL) /*!< PORT14 IOCR4: PC7 (Bitfield-Mask: 0x1f) */ - -/* -------------------------------- PORT14_IOCR8 -------------------------------- */ -#define PORT14_IOCR8_PC8_Pos (3UL) /*!< PORT14 IOCR8: PC8 (Bit 3) */ -#define PORT14_IOCR8_PC8_Msk (0xf8UL) /*!< PORT14 IOCR8: PC8 (Bitfield-Mask: 0x1f) */ -#define PORT14_IOCR8_PC9_Pos (11UL) /*!< PORT14 IOCR8: PC9 (Bit 11) */ -#define PORT14_IOCR8_PC9_Msk (0xf800UL) /*!< PORT14 IOCR8: PC9 (Bitfield-Mask: 0x1f) */ -#define PORT14_IOCR8_PC10_Pos (19UL) /*!< PORT14 IOCR8: PC10 (Bit 19) */ -#define PORT14_IOCR8_PC10_Msk (0xf80000UL) /*!< PORT14 IOCR8: PC10 (Bitfield-Mask: 0x1f) */ -#define PORT14_IOCR8_PC11_Pos (27UL) /*!< PORT14 IOCR8: PC11 (Bit 27) */ -#define PORT14_IOCR8_PC11_Msk (0xf8000000UL) /*!< PORT14 IOCR8: PC11 (Bitfield-Mask: 0x1f) */ - -/* -------------------------------- PORT14_IOCR12 ------------------------------- */ -#define PORT14_IOCR12_PC12_Pos (3UL) /*!< PORT14 IOCR12: PC12 (Bit 3) */ -#define PORT14_IOCR12_PC12_Msk (0xf8UL) /*!< PORT14 IOCR12: PC12 (Bitfield-Mask: 0x1f) */ -#define PORT14_IOCR12_PC13_Pos (11UL) /*!< PORT14 IOCR12: PC13 (Bit 11) */ -#define PORT14_IOCR12_PC13_Msk (0xf800UL) /*!< PORT14 IOCR12: PC13 (Bitfield-Mask: 0x1f) */ -#define PORT14_IOCR12_PC14_Pos (19UL) /*!< PORT14 IOCR12: PC14 (Bit 19) */ -#define PORT14_IOCR12_PC14_Msk (0xf80000UL) /*!< PORT14 IOCR12: PC14 (Bitfield-Mask: 0x1f) */ -#define PORT14_IOCR12_PC15_Pos (27UL) /*!< PORT14 IOCR12: PC15 (Bit 27) */ -#define PORT14_IOCR12_PC15_Msk (0xf8000000UL) /*!< PORT14 IOCR12: PC15 (Bitfield-Mask: 0x1f) */ - -/* ---------------------------------- PORT14_IN --------------------------------- */ -#define PORT14_IN_P0_Pos (0UL) /*!< PORT14 IN: P0 (Bit 0) */ -#define PORT14_IN_P0_Msk (0x1UL) /*!< PORT14 IN: P0 (Bitfield-Mask: 0x01) */ -#define PORT14_IN_P1_Pos (1UL) /*!< PORT14 IN: P1 (Bit 1) */ -#define PORT14_IN_P1_Msk (0x2UL) /*!< PORT14 IN: P1 (Bitfield-Mask: 0x01) */ -#define PORT14_IN_P2_Pos (2UL) /*!< PORT14 IN: P2 (Bit 2) */ -#define PORT14_IN_P2_Msk (0x4UL) /*!< PORT14 IN: P2 (Bitfield-Mask: 0x01) */ -#define PORT14_IN_P3_Pos (3UL) /*!< PORT14 IN: P3 (Bit 3) */ -#define PORT14_IN_P3_Msk (0x8UL) /*!< PORT14 IN: P3 (Bitfield-Mask: 0x01) */ -#define PORT14_IN_P4_Pos (4UL) /*!< PORT14 IN: P4 (Bit 4) */ -#define PORT14_IN_P4_Msk (0x10UL) /*!< PORT14 IN: P4 (Bitfield-Mask: 0x01) */ -#define PORT14_IN_P5_Pos (5UL) /*!< PORT14 IN: P5 (Bit 5) */ -#define PORT14_IN_P5_Msk (0x20UL) /*!< PORT14 IN: P5 (Bitfield-Mask: 0x01) */ -#define PORT14_IN_P6_Pos (6UL) /*!< PORT14 IN: P6 (Bit 6) */ -#define PORT14_IN_P6_Msk (0x40UL) /*!< PORT14 IN: P6 (Bitfield-Mask: 0x01) */ -#define PORT14_IN_P7_Pos (7UL) /*!< PORT14 IN: P7 (Bit 7) */ -#define PORT14_IN_P7_Msk (0x80UL) /*!< PORT14 IN: P7 (Bitfield-Mask: 0x01) */ -#define PORT14_IN_P8_Pos (8UL) /*!< PORT14 IN: P8 (Bit 8) */ -#define PORT14_IN_P8_Msk (0x100UL) /*!< PORT14 IN: P8 (Bitfield-Mask: 0x01) */ -#define PORT14_IN_P9_Pos (9UL) /*!< PORT14 IN: P9 (Bit 9) */ -#define PORT14_IN_P9_Msk (0x200UL) /*!< PORT14 IN: P9 (Bitfield-Mask: 0x01) */ -#define PORT14_IN_P10_Pos (10UL) /*!< PORT14 IN: P10 (Bit 10) */ -#define PORT14_IN_P10_Msk (0x400UL) /*!< PORT14 IN: P10 (Bitfield-Mask: 0x01) */ -#define PORT14_IN_P11_Pos (11UL) /*!< PORT14 IN: P11 (Bit 11) */ -#define PORT14_IN_P11_Msk (0x800UL) /*!< PORT14 IN: P11 (Bitfield-Mask: 0x01) */ -#define PORT14_IN_P12_Pos (12UL) /*!< PORT14 IN: P12 (Bit 12) */ -#define PORT14_IN_P12_Msk (0x1000UL) /*!< PORT14 IN: P12 (Bitfield-Mask: 0x01) */ -#define PORT14_IN_P13_Pos (13UL) /*!< PORT14 IN: P13 (Bit 13) */ -#define PORT14_IN_P13_Msk (0x2000UL) /*!< PORT14 IN: P13 (Bitfield-Mask: 0x01) */ -#define PORT14_IN_P14_Pos (14UL) /*!< PORT14 IN: P14 (Bit 14) */ -#define PORT14_IN_P14_Msk (0x4000UL) /*!< PORT14 IN: P14 (Bitfield-Mask: 0x01) */ -#define PORT14_IN_P15_Pos (15UL) /*!< PORT14 IN: P15 (Bit 15) */ -#define PORT14_IN_P15_Msk (0x8000UL) /*!< PORT14 IN: P15 (Bitfield-Mask: 0x01) */ - -/* -------------------------------- PORT14_PDISC -------------------------------- */ -#define PORT14_PDISC_PDIS0_Pos (0UL) /*!< PORT14 PDISC: PDIS0 (Bit 0) */ -#define PORT14_PDISC_PDIS0_Msk (0x1UL) /*!< PORT14 PDISC: PDIS0 (Bitfield-Mask: 0x01) */ -#define PORT14_PDISC_PDIS1_Pos (1UL) /*!< PORT14 PDISC: PDIS1 (Bit 1) */ -#define PORT14_PDISC_PDIS1_Msk (0x2UL) /*!< PORT14 PDISC: PDIS1 (Bitfield-Mask: 0x01) */ -#define PORT14_PDISC_PDIS2_Pos (2UL) /*!< PORT14 PDISC: PDIS2 (Bit 2) */ -#define PORT14_PDISC_PDIS2_Msk (0x4UL) /*!< PORT14 PDISC: PDIS2 (Bitfield-Mask: 0x01) */ -#define PORT14_PDISC_PDIS3_Pos (3UL) /*!< PORT14 PDISC: PDIS3 (Bit 3) */ -#define PORT14_PDISC_PDIS3_Msk (0x8UL) /*!< PORT14 PDISC: PDIS3 (Bitfield-Mask: 0x01) */ -#define PORT14_PDISC_PDIS4_Pos (4UL) /*!< PORT14 PDISC: PDIS4 (Bit 4) */ -#define PORT14_PDISC_PDIS4_Msk (0x10UL) /*!< PORT14 PDISC: PDIS4 (Bitfield-Mask: 0x01) */ -#define PORT14_PDISC_PDIS5_Pos (5UL) /*!< PORT14 PDISC: PDIS5 (Bit 5) */ -#define PORT14_PDISC_PDIS5_Msk (0x20UL) /*!< PORT14 PDISC: PDIS5 (Bitfield-Mask: 0x01) */ -#define PORT14_PDISC_PDIS6_Pos (6UL) /*!< PORT14 PDISC: PDIS6 (Bit 6) */ -#define PORT14_PDISC_PDIS6_Msk (0x40UL) /*!< PORT14 PDISC: PDIS6 (Bitfield-Mask: 0x01) */ -#define PORT14_PDISC_PDIS7_Pos (7UL) /*!< PORT14 PDISC: PDIS7 (Bit 7) */ -#define PORT14_PDISC_PDIS7_Msk (0x80UL) /*!< PORT14 PDISC: PDIS7 (Bitfield-Mask: 0x01) */ -#define PORT14_PDISC_PDIS8_Pos (8UL) /*!< PORT14 PDISC: PDIS8 (Bit 8) */ -#define PORT14_PDISC_PDIS8_Msk (0x100UL) /*!< PORT14 PDISC: PDIS8 (Bitfield-Mask: 0x01) */ -#define PORT14_PDISC_PDIS9_Pos (9UL) /*!< PORT14 PDISC: PDIS9 (Bit 9) */ -#define PORT14_PDISC_PDIS9_Msk (0x200UL) /*!< PORT14 PDISC: PDIS9 (Bitfield-Mask: 0x01) */ -#define PORT14_PDISC_PDIS12_Pos (12UL) /*!< PORT14 PDISC: PDIS12 (Bit 12) */ -#define PORT14_PDISC_PDIS12_Msk (0x1000UL) /*!< PORT14 PDISC: PDIS12 (Bitfield-Mask: 0x01) */ -#define PORT14_PDISC_PDIS13_Pos (13UL) /*!< PORT14 PDISC: PDIS13 (Bit 13) */ -#define PORT14_PDISC_PDIS13_Msk (0x2000UL) /*!< PORT14 PDISC: PDIS13 (Bitfield-Mask: 0x01) */ -#define PORT14_PDISC_PDIS14_Pos (14UL) /*!< PORT14 PDISC: PDIS14 (Bit 14) */ -#define PORT14_PDISC_PDIS14_Msk (0x4000UL) /*!< PORT14 PDISC: PDIS14 (Bitfield-Mask: 0x01) */ -#define PORT14_PDISC_PDIS15_Pos (15UL) /*!< PORT14 PDISC: PDIS15 (Bit 15) */ -#define PORT14_PDISC_PDIS15_Msk (0x8000UL) /*!< PORT14 PDISC: PDIS15 (Bitfield-Mask: 0x01) */ - -/* --------------------------------- PORT14_PPS --------------------------------- */ -#define PORT14_PPS_PPS0_Pos (0UL) /*!< PORT14 PPS: PPS0 (Bit 0) */ -#define PORT14_PPS_PPS0_Msk (0x1UL) /*!< PORT14 PPS: PPS0 (Bitfield-Mask: 0x01) */ -#define PORT14_PPS_PPS1_Pos (1UL) /*!< PORT14 PPS: PPS1 (Bit 1) */ -#define PORT14_PPS_PPS1_Msk (0x2UL) /*!< PORT14 PPS: PPS1 (Bitfield-Mask: 0x01) */ -#define PORT14_PPS_PPS2_Pos (2UL) /*!< PORT14 PPS: PPS2 (Bit 2) */ -#define PORT14_PPS_PPS2_Msk (0x4UL) /*!< PORT14 PPS: PPS2 (Bitfield-Mask: 0x01) */ -#define PORT14_PPS_PPS3_Pos (3UL) /*!< PORT14 PPS: PPS3 (Bit 3) */ -#define PORT14_PPS_PPS3_Msk (0x8UL) /*!< PORT14 PPS: PPS3 (Bitfield-Mask: 0x01) */ -#define PORT14_PPS_PPS4_Pos (4UL) /*!< PORT14 PPS: PPS4 (Bit 4) */ -#define PORT14_PPS_PPS4_Msk (0x10UL) /*!< PORT14 PPS: PPS4 (Bitfield-Mask: 0x01) */ -#define PORT14_PPS_PPS5_Pos (5UL) /*!< PORT14 PPS: PPS5 (Bit 5) */ -#define PORT14_PPS_PPS5_Msk (0x20UL) /*!< PORT14 PPS: PPS5 (Bitfield-Mask: 0x01) */ -#define PORT14_PPS_PPS6_Pos (6UL) /*!< PORT14 PPS: PPS6 (Bit 6) */ -#define PORT14_PPS_PPS6_Msk (0x40UL) /*!< PORT14 PPS: PPS6 (Bitfield-Mask: 0x01) */ -#define PORT14_PPS_PPS7_Pos (7UL) /*!< PORT14 PPS: PPS7 (Bit 7) */ -#define PORT14_PPS_PPS7_Msk (0x80UL) /*!< PORT14 PPS: PPS7 (Bitfield-Mask: 0x01) */ -#define PORT14_PPS_PPS8_Pos (8UL) /*!< PORT14 PPS: PPS8 (Bit 8) */ -#define PORT14_PPS_PPS8_Msk (0x100UL) /*!< PORT14 PPS: PPS8 (Bitfield-Mask: 0x01) */ -#define PORT14_PPS_PPS9_Pos (9UL) /*!< PORT14 PPS: PPS9 (Bit 9) */ -#define PORT14_PPS_PPS9_Msk (0x200UL) /*!< PORT14 PPS: PPS9 (Bitfield-Mask: 0x01) */ -#define PORT14_PPS_PPS10_Pos (10UL) /*!< PORT14 PPS: PPS10 (Bit 10) */ -#define PORT14_PPS_PPS10_Msk (0x400UL) /*!< PORT14 PPS: PPS10 (Bitfield-Mask: 0x01) */ -#define PORT14_PPS_PPS11_Pos (11UL) /*!< PORT14 PPS: PPS11 (Bit 11) */ -#define PORT14_PPS_PPS11_Msk (0x800UL) /*!< PORT14 PPS: PPS11 (Bitfield-Mask: 0x01) */ -#define PORT14_PPS_PPS12_Pos (12UL) /*!< PORT14 PPS: PPS12 (Bit 12) */ -#define PORT14_PPS_PPS12_Msk (0x1000UL) /*!< PORT14 PPS: PPS12 (Bitfield-Mask: 0x01) */ -#define PORT14_PPS_PPS13_Pos (13UL) /*!< PORT14 PPS: PPS13 (Bit 13) */ -#define PORT14_PPS_PPS13_Msk (0x2000UL) /*!< PORT14 PPS: PPS13 (Bitfield-Mask: 0x01) */ -#define PORT14_PPS_PPS14_Pos (14UL) /*!< PORT14 PPS: PPS14 (Bit 14) */ -#define PORT14_PPS_PPS14_Msk (0x4000UL) /*!< PORT14 PPS: PPS14 (Bitfield-Mask: 0x01) */ -#define PORT14_PPS_PPS15_Pos (15UL) /*!< PORT14 PPS: PPS15 (Bit 15) */ -#define PORT14_PPS_PPS15_Msk (0x8000UL) /*!< PORT14 PPS: PPS15 (Bitfield-Mask: 0x01) */ - -/* -------------------------------- PORT14_HWSEL -------------------------------- */ -#define PORT14_HWSEL_HW0_Pos (0UL) /*!< PORT14 HWSEL: HW0 (Bit 0) */ -#define PORT14_HWSEL_HW0_Msk (0x3UL) /*!< PORT14 HWSEL: HW0 (Bitfield-Mask: 0x03) */ -#define PORT14_HWSEL_HW1_Pos (2UL) /*!< PORT14 HWSEL: HW1 (Bit 2) */ -#define PORT14_HWSEL_HW1_Msk (0xcUL) /*!< PORT14 HWSEL: HW1 (Bitfield-Mask: 0x03) */ -#define PORT14_HWSEL_HW2_Pos (4UL) /*!< PORT14 HWSEL: HW2 (Bit 4) */ -#define PORT14_HWSEL_HW2_Msk (0x30UL) /*!< PORT14 HWSEL: HW2 (Bitfield-Mask: 0x03) */ -#define PORT14_HWSEL_HW3_Pos (6UL) /*!< PORT14 HWSEL: HW3 (Bit 6) */ -#define PORT14_HWSEL_HW3_Msk (0xc0UL) /*!< PORT14 HWSEL: HW3 (Bitfield-Mask: 0x03) */ -#define PORT14_HWSEL_HW4_Pos (8UL) /*!< PORT14 HWSEL: HW4 (Bit 8) */ -#define PORT14_HWSEL_HW4_Msk (0x300UL) /*!< PORT14 HWSEL: HW4 (Bitfield-Mask: 0x03) */ -#define PORT14_HWSEL_HW5_Pos (10UL) /*!< PORT14 HWSEL: HW5 (Bit 10) */ -#define PORT14_HWSEL_HW5_Msk (0xc00UL) /*!< PORT14 HWSEL: HW5 (Bitfield-Mask: 0x03) */ -#define PORT14_HWSEL_HW6_Pos (12UL) /*!< PORT14 HWSEL: HW6 (Bit 12) */ -#define PORT14_HWSEL_HW6_Msk (0x3000UL) /*!< PORT14 HWSEL: HW6 (Bitfield-Mask: 0x03) */ -#define PORT14_HWSEL_HW7_Pos (14UL) /*!< PORT14 HWSEL: HW7 (Bit 14) */ -#define PORT14_HWSEL_HW7_Msk (0xc000UL) /*!< PORT14 HWSEL: HW7 (Bitfield-Mask: 0x03) */ -#define PORT14_HWSEL_HW8_Pos (16UL) /*!< PORT14 HWSEL: HW8 (Bit 16) */ -#define PORT14_HWSEL_HW8_Msk (0x30000UL) /*!< PORT14 HWSEL: HW8 (Bitfield-Mask: 0x03) */ -#define PORT14_HWSEL_HW9_Pos (18UL) /*!< PORT14 HWSEL: HW9 (Bit 18) */ -#define PORT14_HWSEL_HW9_Msk (0xc0000UL) /*!< PORT14 HWSEL: HW9 (Bitfield-Mask: 0x03) */ -#define PORT14_HWSEL_HW10_Pos (20UL) /*!< PORT14 HWSEL: HW10 (Bit 20) */ -#define PORT14_HWSEL_HW10_Msk (0x300000UL) /*!< PORT14 HWSEL: HW10 (Bitfield-Mask: 0x03) */ -#define PORT14_HWSEL_HW11_Pos (22UL) /*!< PORT14 HWSEL: HW11 (Bit 22) */ -#define PORT14_HWSEL_HW11_Msk (0xc00000UL) /*!< PORT14 HWSEL: HW11 (Bitfield-Mask: 0x03) */ -#define PORT14_HWSEL_HW12_Pos (24UL) /*!< PORT14 HWSEL: HW12 (Bit 24) */ -#define PORT14_HWSEL_HW12_Msk (0x3000000UL) /*!< PORT14 HWSEL: HW12 (Bitfield-Mask: 0x03) */ -#define PORT14_HWSEL_HW13_Pos (26UL) /*!< PORT14 HWSEL: HW13 (Bit 26) */ -#define PORT14_HWSEL_HW13_Msk (0xc000000UL) /*!< PORT14 HWSEL: HW13 (Bitfield-Mask: 0x03) */ -#define PORT14_HWSEL_HW14_Pos (28UL) /*!< PORT14 HWSEL: HW14 (Bit 28) */ -#define PORT14_HWSEL_HW14_Msk (0x30000000UL) /*!< PORT14 HWSEL: HW14 (Bitfield-Mask: 0x03) */ -#define PORT14_HWSEL_HW15_Pos (30UL) /*!< PORT14 HWSEL: HW15 (Bit 30) */ -#define PORT14_HWSEL_HW15_Msk (0xc0000000UL) /*!< PORT14 HWSEL: HW15 (Bitfield-Mask: 0x03) */ - - -/* ================================================================================ */ -/* ================ struct 'PORT15' Position & Mask ================ */ -/* ================================================================================ */ - - -/* --------------------------------- PORT15_OUT --------------------------------- */ -#define PORT15_OUT_P0_Pos (0UL) /*!< PORT15 OUT: P0 (Bit 0) */ -#define PORT15_OUT_P0_Msk (0x1UL) /*!< PORT15 OUT: P0 (Bitfield-Mask: 0x01) */ -#define PORT15_OUT_P1_Pos (1UL) /*!< PORT15 OUT: P1 (Bit 1) */ -#define PORT15_OUT_P1_Msk (0x2UL) /*!< PORT15 OUT: P1 (Bitfield-Mask: 0x01) */ -#define PORT15_OUT_P2_Pos (2UL) /*!< PORT15 OUT: P2 (Bit 2) */ -#define PORT15_OUT_P2_Msk (0x4UL) /*!< PORT15 OUT: P2 (Bitfield-Mask: 0x01) */ -#define PORT15_OUT_P3_Pos (3UL) /*!< PORT15 OUT: P3 (Bit 3) */ -#define PORT15_OUT_P3_Msk (0x8UL) /*!< PORT15 OUT: P3 (Bitfield-Mask: 0x01) */ -#define PORT15_OUT_P4_Pos (4UL) /*!< PORT15 OUT: P4 (Bit 4) */ -#define PORT15_OUT_P4_Msk (0x10UL) /*!< PORT15 OUT: P4 (Bitfield-Mask: 0x01) */ -#define PORT15_OUT_P5_Pos (5UL) /*!< PORT15 OUT: P5 (Bit 5) */ -#define PORT15_OUT_P5_Msk (0x20UL) /*!< PORT15 OUT: P5 (Bitfield-Mask: 0x01) */ -#define PORT15_OUT_P6_Pos (6UL) /*!< PORT15 OUT: P6 (Bit 6) */ -#define PORT15_OUT_P6_Msk (0x40UL) /*!< PORT15 OUT: P6 (Bitfield-Mask: 0x01) */ -#define PORT15_OUT_P7_Pos (7UL) /*!< PORT15 OUT: P7 (Bit 7) */ -#define PORT15_OUT_P7_Msk (0x80UL) /*!< PORT15 OUT: P7 (Bitfield-Mask: 0x01) */ -#define PORT15_OUT_P8_Pos (8UL) /*!< PORT15 OUT: P8 (Bit 8) */ -#define PORT15_OUT_P8_Msk (0x100UL) /*!< PORT15 OUT: P8 (Bitfield-Mask: 0x01) */ -#define PORT15_OUT_P9_Pos (9UL) /*!< PORT15 OUT: P9 (Bit 9) */ -#define PORT15_OUT_P9_Msk (0x200UL) /*!< PORT15 OUT: P9 (Bitfield-Mask: 0x01) */ -#define PORT15_OUT_P10_Pos (10UL) /*!< PORT15 OUT: P10 (Bit 10) */ -#define PORT15_OUT_P10_Msk (0x400UL) /*!< PORT15 OUT: P10 (Bitfield-Mask: 0x01) */ -#define PORT15_OUT_P11_Pos (11UL) /*!< PORT15 OUT: P11 (Bit 11) */ -#define PORT15_OUT_P11_Msk (0x800UL) /*!< PORT15 OUT: P11 (Bitfield-Mask: 0x01) */ -#define PORT15_OUT_P12_Pos (12UL) /*!< PORT15 OUT: P12 (Bit 12) */ -#define PORT15_OUT_P12_Msk (0x1000UL) /*!< PORT15 OUT: P12 (Bitfield-Mask: 0x01) */ -#define PORT15_OUT_P13_Pos (13UL) /*!< PORT15 OUT: P13 (Bit 13) */ -#define PORT15_OUT_P13_Msk (0x2000UL) /*!< PORT15 OUT: P13 (Bitfield-Mask: 0x01) */ -#define PORT15_OUT_P14_Pos (14UL) /*!< PORT15 OUT: P14 (Bit 14) */ -#define PORT15_OUT_P14_Msk (0x4000UL) /*!< PORT15 OUT: P14 (Bitfield-Mask: 0x01) */ -#define PORT15_OUT_P15_Pos (15UL) /*!< PORT15 OUT: P15 (Bit 15) */ -#define PORT15_OUT_P15_Msk (0x8000UL) /*!< PORT15 OUT: P15 (Bitfield-Mask: 0x01) */ - -/* --------------------------------- PORT15_OMR --------------------------------- */ -#define PORT15_OMR_PS0_Pos (0UL) /*!< PORT15 OMR: PS0 (Bit 0) */ -#define PORT15_OMR_PS0_Msk (0x1UL) /*!< PORT15 OMR: PS0 (Bitfield-Mask: 0x01) */ -#define PORT15_OMR_PS1_Pos (1UL) /*!< PORT15 OMR: PS1 (Bit 1) */ -#define PORT15_OMR_PS1_Msk (0x2UL) /*!< PORT15 OMR: PS1 (Bitfield-Mask: 0x01) */ -#define PORT15_OMR_PS2_Pos (2UL) /*!< PORT15 OMR: PS2 (Bit 2) */ -#define PORT15_OMR_PS2_Msk (0x4UL) /*!< PORT15 OMR: PS2 (Bitfield-Mask: 0x01) */ -#define PORT15_OMR_PS3_Pos (3UL) /*!< PORT15 OMR: PS3 (Bit 3) */ -#define PORT15_OMR_PS3_Msk (0x8UL) /*!< PORT15 OMR: PS3 (Bitfield-Mask: 0x01) */ -#define PORT15_OMR_PS4_Pos (4UL) /*!< PORT15 OMR: PS4 (Bit 4) */ -#define PORT15_OMR_PS4_Msk (0x10UL) /*!< PORT15 OMR: PS4 (Bitfield-Mask: 0x01) */ -#define PORT15_OMR_PS5_Pos (5UL) /*!< PORT15 OMR: PS5 (Bit 5) */ -#define PORT15_OMR_PS5_Msk (0x20UL) /*!< PORT15 OMR: PS5 (Bitfield-Mask: 0x01) */ -#define PORT15_OMR_PS6_Pos (6UL) /*!< PORT15 OMR: PS6 (Bit 6) */ -#define PORT15_OMR_PS6_Msk (0x40UL) /*!< PORT15 OMR: PS6 (Bitfield-Mask: 0x01) */ -#define PORT15_OMR_PS7_Pos (7UL) /*!< PORT15 OMR: PS7 (Bit 7) */ -#define PORT15_OMR_PS7_Msk (0x80UL) /*!< PORT15 OMR: PS7 (Bitfield-Mask: 0x01) */ -#define PORT15_OMR_PS8_Pos (8UL) /*!< PORT15 OMR: PS8 (Bit 8) */ -#define PORT15_OMR_PS8_Msk (0x100UL) /*!< PORT15 OMR: PS8 (Bitfield-Mask: 0x01) */ -#define PORT15_OMR_PS9_Pos (9UL) /*!< PORT15 OMR: PS9 (Bit 9) */ -#define PORT15_OMR_PS9_Msk (0x200UL) /*!< PORT15 OMR: PS9 (Bitfield-Mask: 0x01) */ -#define PORT15_OMR_PS10_Pos (10UL) /*!< PORT15 OMR: PS10 (Bit 10) */ -#define PORT15_OMR_PS10_Msk (0x400UL) /*!< PORT15 OMR: PS10 (Bitfield-Mask: 0x01) */ -#define PORT15_OMR_PS11_Pos (11UL) /*!< PORT15 OMR: PS11 (Bit 11) */ -#define PORT15_OMR_PS11_Msk (0x800UL) /*!< PORT15 OMR: PS11 (Bitfield-Mask: 0x01) */ -#define PORT15_OMR_PS12_Pos (12UL) /*!< PORT15 OMR: PS12 (Bit 12) */ -#define PORT15_OMR_PS12_Msk (0x1000UL) /*!< PORT15 OMR: PS12 (Bitfield-Mask: 0x01) */ -#define PORT15_OMR_PS13_Pos (13UL) /*!< PORT15 OMR: PS13 (Bit 13) */ -#define PORT15_OMR_PS13_Msk (0x2000UL) /*!< PORT15 OMR: PS13 (Bitfield-Mask: 0x01) */ -#define PORT15_OMR_PS14_Pos (14UL) /*!< PORT15 OMR: PS14 (Bit 14) */ -#define PORT15_OMR_PS14_Msk (0x4000UL) /*!< PORT15 OMR: PS14 (Bitfield-Mask: 0x01) */ -#define PORT15_OMR_PS15_Pos (15UL) /*!< PORT15 OMR: PS15 (Bit 15) */ -#define PORT15_OMR_PS15_Msk (0x8000UL) /*!< PORT15 OMR: PS15 (Bitfield-Mask: 0x01) */ -#define PORT15_OMR_PR0_Pos (16UL) /*!< PORT15 OMR: PR0 (Bit 16) */ -#define PORT15_OMR_PR0_Msk (0x10000UL) /*!< PORT15 OMR: PR0 (Bitfield-Mask: 0x01) */ -#define PORT15_OMR_PR1_Pos (17UL) /*!< PORT15 OMR: PR1 (Bit 17) */ -#define PORT15_OMR_PR1_Msk (0x20000UL) /*!< PORT15 OMR: PR1 (Bitfield-Mask: 0x01) */ -#define PORT15_OMR_PR2_Pos (18UL) /*!< PORT15 OMR: PR2 (Bit 18) */ -#define PORT15_OMR_PR2_Msk (0x40000UL) /*!< PORT15 OMR: PR2 (Bitfield-Mask: 0x01) */ -#define PORT15_OMR_PR3_Pos (19UL) /*!< PORT15 OMR: PR3 (Bit 19) */ -#define PORT15_OMR_PR3_Msk (0x80000UL) /*!< PORT15 OMR: PR3 (Bitfield-Mask: 0x01) */ -#define PORT15_OMR_PR4_Pos (20UL) /*!< PORT15 OMR: PR4 (Bit 20) */ -#define PORT15_OMR_PR4_Msk (0x100000UL) /*!< PORT15 OMR: PR4 (Bitfield-Mask: 0x01) */ -#define PORT15_OMR_PR5_Pos (21UL) /*!< PORT15 OMR: PR5 (Bit 21) */ -#define PORT15_OMR_PR5_Msk (0x200000UL) /*!< PORT15 OMR: PR5 (Bitfield-Mask: 0x01) */ -#define PORT15_OMR_PR6_Pos (22UL) /*!< PORT15 OMR: PR6 (Bit 22) */ -#define PORT15_OMR_PR6_Msk (0x400000UL) /*!< PORT15 OMR: PR6 (Bitfield-Mask: 0x01) */ -#define PORT15_OMR_PR7_Pos (23UL) /*!< PORT15 OMR: PR7 (Bit 23) */ -#define PORT15_OMR_PR7_Msk (0x800000UL) /*!< PORT15 OMR: PR7 (Bitfield-Mask: 0x01) */ -#define PORT15_OMR_PR8_Pos (24UL) /*!< PORT15 OMR: PR8 (Bit 24) */ -#define PORT15_OMR_PR8_Msk (0x1000000UL) /*!< PORT15 OMR: PR8 (Bitfield-Mask: 0x01) */ -#define PORT15_OMR_PR9_Pos (25UL) /*!< PORT15 OMR: PR9 (Bit 25) */ -#define PORT15_OMR_PR9_Msk (0x2000000UL) /*!< PORT15 OMR: PR9 (Bitfield-Mask: 0x01) */ -#define PORT15_OMR_PR10_Pos (26UL) /*!< PORT15 OMR: PR10 (Bit 26) */ -#define PORT15_OMR_PR10_Msk (0x4000000UL) /*!< PORT15 OMR: PR10 (Bitfield-Mask: 0x01) */ -#define PORT15_OMR_PR11_Pos (27UL) /*!< PORT15 OMR: PR11 (Bit 27) */ -#define PORT15_OMR_PR11_Msk (0x8000000UL) /*!< PORT15 OMR: PR11 (Bitfield-Mask: 0x01) */ -#define PORT15_OMR_PR12_Pos (28UL) /*!< PORT15 OMR: PR12 (Bit 28) */ -#define PORT15_OMR_PR12_Msk (0x10000000UL) /*!< PORT15 OMR: PR12 (Bitfield-Mask: 0x01) */ -#define PORT15_OMR_PR13_Pos (29UL) /*!< PORT15 OMR: PR13 (Bit 29) */ -#define PORT15_OMR_PR13_Msk (0x20000000UL) /*!< PORT15 OMR: PR13 (Bitfield-Mask: 0x01) */ -#define PORT15_OMR_PR14_Pos (30UL) /*!< PORT15 OMR: PR14 (Bit 30) */ -#define PORT15_OMR_PR14_Msk (0x40000000UL) /*!< PORT15 OMR: PR14 (Bitfield-Mask: 0x01) */ -#define PORT15_OMR_PR15_Pos (31UL) /*!< PORT15 OMR: PR15 (Bit 31) */ -#define PORT15_OMR_PR15_Msk (0x80000000UL) /*!< PORT15 OMR: PR15 (Bitfield-Mask: 0x01) */ - -/* -------------------------------- PORT15_IOCR0 -------------------------------- */ -#define PORT15_IOCR0_PC0_Pos (3UL) /*!< PORT15 IOCR0: PC0 (Bit 3) */ -#define PORT15_IOCR0_PC0_Msk (0xf8UL) /*!< PORT15 IOCR0: PC0 (Bitfield-Mask: 0x1f) */ -#define PORT15_IOCR0_PC1_Pos (11UL) /*!< PORT15 IOCR0: PC1 (Bit 11) */ -#define PORT15_IOCR0_PC1_Msk (0xf800UL) /*!< PORT15 IOCR0: PC1 (Bitfield-Mask: 0x1f) */ -#define PORT15_IOCR0_PC2_Pos (19UL) /*!< PORT15 IOCR0: PC2 (Bit 19) */ -#define PORT15_IOCR0_PC2_Msk (0xf80000UL) /*!< PORT15 IOCR0: PC2 (Bitfield-Mask: 0x1f) */ -#define PORT15_IOCR0_PC3_Pos (27UL) /*!< PORT15 IOCR0: PC3 (Bit 27) */ -#define PORT15_IOCR0_PC3_Msk (0xf8000000UL) /*!< PORT15 IOCR0: PC3 (Bitfield-Mask: 0x1f) */ - -/* -------------------------------- PORT15_IOCR4 -------------------------------- */ -#define PORT15_IOCR4_PC4_Pos (3UL) /*!< PORT15 IOCR4: PC4 (Bit 3) */ -#define PORT15_IOCR4_PC4_Msk (0xf8UL) /*!< PORT15 IOCR4: PC4 (Bitfield-Mask: 0x1f) */ -#define PORT15_IOCR4_PC5_Pos (11UL) /*!< PORT15 IOCR4: PC5 (Bit 11) */ -#define PORT15_IOCR4_PC5_Msk (0xf800UL) /*!< PORT15 IOCR4: PC5 (Bitfield-Mask: 0x1f) */ -#define PORT15_IOCR4_PC6_Pos (19UL) /*!< PORT15 IOCR4: PC6 (Bit 19) */ -#define PORT15_IOCR4_PC6_Msk (0xf80000UL) /*!< PORT15 IOCR4: PC6 (Bitfield-Mask: 0x1f) */ -#define PORT15_IOCR4_PC7_Pos (27UL) /*!< PORT15 IOCR4: PC7 (Bit 27) */ -#define PORT15_IOCR4_PC7_Msk (0xf8000000UL) /*!< PORT15 IOCR4: PC7 (Bitfield-Mask: 0x1f) */ - -/* -------------------------------- PORT15_IOCR8 -------------------------------- */ -#define PORT15_IOCR8_PC8_Pos (3UL) /*!< PORT15 IOCR8: PC8 (Bit 3) */ -#define PORT15_IOCR8_PC8_Msk (0xf8UL) /*!< PORT15 IOCR8: PC8 (Bitfield-Mask: 0x1f) */ -#define PORT15_IOCR8_PC9_Pos (11UL) /*!< PORT15 IOCR8: PC9 (Bit 11) */ -#define PORT15_IOCR8_PC9_Msk (0xf800UL) /*!< PORT15 IOCR8: PC9 (Bitfield-Mask: 0x1f) */ -#define PORT15_IOCR8_PC10_Pos (19UL) /*!< PORT15 IOCR8: PC10 (Bit 19) */ -#define PORT15_IOCR8_PC10_Msk (0xf80000UL) /*!< PORT15 IOCR8: PC10 (Bitfield-Mask: 0x1f) */ -#define PORT15_IOCR8_PC11_Pos (27UL) /*!< PORT15 IOCR8: PC11 (Bit 27) */ -#define PORT15_IOCR8_PC11_Msk (0xf8000000UL) /*!< PORT15 IOCR8: PC11 (Bitfield-Mask: 0x1f) */ - -/* -------------------------------- PORT15_IOCR12 ------------------------------- */ -#define PORT15_IOCR12_PC12_Pos (3UL) /*!< PORT15 IOCR12: PC12 (Bit 3) */ -#define PORT15_IOCR12_PC12_Msk (0xf8UL) /*!< PORT15 IOCR12: PC12 (Bitfield-Mask: 0x1f) */ -#define PORT15_IOCR12_PC13_Pos (11UL) /*!< PORT15 IOCR12: PC13 (Bit 11) */ -#define PORT15_IOCR12_PC13_Msk (0xf800UL) /*!< PORT15 IOCR12: PC13 (Bitfield-Mask: 0x1f) */ -#define PORT15_IOCR12_PC14_Pos (19UL) /*!< PORT15 IOCR12: PC14 (Bit 19) */ -#define PORT15_IOCR12_PC14_Msk (0xf80000UL) /*!< PORT15 IOCR12: PC14 (Bitfield-Mask: 0x1f) */ -#define PORT15_IOCR12_PC15_Pos (27UL) /*!< PORT15 IOCR12: PC15 (Bit 27) */ -#define PORT15_IOCR12_PC15_Msk (0xf8000000UL) /*!< PORT15 IOCR12: PC15 (Bitfield-Mask: 0x1f) */ - -/* ---------------------------------- PORT15_IN --------------------------------- */ -#define PORT15_IN_P0_Pos (0UL) /*!< PORT15 IN: P0 (Bit 0) */ -#define PORT15_IN_P0_Msk (0x1UL) /*!< PORT15 IN: P0 (Bitfield-Mask: 0x01) */ -#define PORT15_IN_P1_Pos (1UL) /*!< PORT15 IN: P1 (Bit 1) */ -#define PORT15_IN_P1_Msk (0x2UL) /*!< PORT15 IN: P1 (Bitfield-Mask: 0x01) */ -#define PORT15_IN_P2_Pos (2UL) /*!< PORT15 IN: P2 (Bit 2) */ -#define PORT15_IN_P2_Msk (0x4UL) /*!< PORT15 IN: P2 (Bitfield-Mask: 0x01) */ -#define PORT15_IN_P3_Pos (3UL) /*!< PORT15 IN: P3 (Bit 3) */ -#define PORT15_IN_P3_Msk (0x8UL) /*!< PORT15 IN: P3 (Bitfield-Mask: 0x01) */ -#define PORT15_IN_P4_Pos (4UL) /*!< PORT15 IN: P4 (Bit 4) */ -#define PORT15_IN_P4_Msk (0x10UL) /*!< PORT15 IN: P4 (Bitfield-Mask: 0x01) */ -#define PORT15_IN_P5_Pos (5UL) /*!< PORT15 IN: P5 (Bit 5) */ -#define PORT15_IN_P5_Msk (0x20UL) /*!< PORT15 IN: P5 (Bitfield-Mask: 0x01) */ -#define PORT15_IN_P6_Pos (6UL) /*!< PORT15 IN: P6 (Bit 6) */ -#define PORT15_IN_P6_Msk (0x40UL) /*!< PORT15 IN: P6 (Bitfield-Mask: 0x01) */ -#define PORT15_IN_P7_Pos (7UL) /*!< PORT15 IN: P7 (Bit 7) */ -#define PORT15_IN_P7_Msk (0x80UL) /*!< PORT15 IN: P7 (Bitfield-Mask: 0x01) */ -#define PORT15_IN_P8_Pos (8UL) /*!< PORT15 IN: P8 (Bit 8) */ -#define PORT15_IN_P8_Msk (0x100UL) /*!< PORT15 IN: P8 (Bitfield-Mask: 0x01) */ -#define PORT15_IN_P9_Pos (9UL) /*!< PORT15 IN: P9 (Bit 9) */ -#define PORT15_IN_P9_Msk (0x200UL) /*!< PORT15 IN: P9 (Bitfield-Mask: 0x01) */ -#define PORT15_IN_P10_Pos (10UL) /*!< PORT15 IN: P10 (Bit 10) */ -#define PORT15_IN_P10_Msk (0x400UL) /*!< PORT15 IN: P10 (Bitfield-Mask: 0x01) */ -#define PORT15_IN_P11_Pos (11UL) /*!< PORT15 IN: P11 (Bit 11) */ -#define PORT15_IN_P11_Msk (0x800UL) /*!< PORT15 IN: P11 (Bitfield-Mask: 0x01) */ -#define PORT15_IN_P12_Pos (12UL) /*!< PORT15 IN: P12 (Bit 12) */ -#define PORT15_IN_P12_Msk (0x1000UL) /*!< PORT15 IN: P12 (Bitfield-Mask: 0x01) */ -#define PORT15_IN_P13_Pos (13UL) /*!< PORT15 IN: P13 (Bit 13) */ -#define PORT15_IN_P13_Msk (0x2000UL) /*!< PORT15 IN: P13 (Bitfield-Mask: 0x01) */ -#define PORT15_IN_P14_Pos (14UL) /*!< PORT15 IN: P14 (Bit 14) */ -#define PORT15_IN_P14_Msk (0x4000UL) /*!< PORT15 IN: P14 (Bitfield-Mask: 0x01) */ -#define PORT15_IN_P15_Pos (15UL) /*!< PORT15 IN: P15 (Bit 15) */ -#define PORT15_IN_P15_Msk (0x8000UL) /*!< PORT15 IN: P15 (Bitfield-Mask: 0x01) */ - -/* -------------------------------- PORT15_PDISC -------------------------------- */ -#define PORT15_PDISC_PDIS2_Pos (2UL) /*!< PORT15 PDISC: PDIS2 (Bit 2) */ -#define PORT15_PDISC_PDIS2_Msk (0x4UL) /*!< PORT15 PDISC: PDIS2 (Bitfield-Mask: 0x01) */ -#define PORT15_PDISC_PDIS3_Pos (3UL) /*!< PORT15 PDISC: PDIS3 (Bit 3) */ -#define PORT15_PDISC_PDIS3_Msk (0x8UL) /*!< PORT15 PDISC: PDIS3 (Bitfield-Mask: 0x01) */ -#define PORT15_PDISC_PDIS4_Pos (4UL) /*!< PORT15 PDISC: PDIS4 (Bit 4) */ -#define PORT15_PDISC_PDIS4_Msk (0x10UL) /*!< PORT15 PDISC: PDIS4 (Bitfield-Mask: 0x01) */ -#define PORT15_PDISC_PDIS5_Pos (5UL) /*!< PORT15 PDISC: PDIS5 (Bit 5) */ -#define PORT15_PDISC_PDIS5_Msk (0x20UL) /*!< PORT15 PDISC: PDIS5 (Bitfield-Mask: 0x01) */ -#define PORT15_PDISC_PDIS6_Pos (6UL) /*!< PORT15 PDISC: PDIS6 (Bit 6) */ -#define PORT15_PDISC_PDIS6_Msk (0x40UL) /*!< PORT15 PDISC: PDIS6 (Bitfield-Mask: 0x01) */ -#define PORT15_PDISC_PDIS7_Pos (7UL) /*!< PORT15 PDISC: PDIS7 (Bit 7) */ -#define PORT15_PDISC_PDIS7_Msk (0x80UL) /*!< PORT15 PDISC: PDIS7 (Bitfield-Mask: 0x01) */ -#define PORT15_PDISC_PDIS8_Pos (8UL) /*!< PORT15 PDISC: PDIS8 (Bit 8) */ -#define PORT15_PDISC_PDIS8_Msk (0x100UL) /*!< PORT15 PDISC: PDIS8 (Bitfield-Mask: 0x01) */ -#define PORT15_PDISC_PDIS9_Pos (9UL) /*!< PORT15 PDISC: PDIS9 (Bit 9) */ -#define PORT15_PDISC_PDIS9_Msk (0x200UL) /*!< PORT15 PDISC: PDIS9 (Bitfield-Mask: 0x01) */ -#define PORT15_PDISC_PDIS12_Pos (12UL) /*!< PORT15 PDISC: PDIS12 (Bit 12) */ -#define PORT15_PDISC_PDIS12_Msk (0x1000UL) /*!< PORT15 PDISC: PDIS12 (Bitfield-Mask: 0x01) */ -#define PORT15_PDISC_PDIS13_Pos (13UL) /*!< PORT15 PDISC: PDIS13 (Bit 13) */ -#define PORT15_PDISC_PDIS13_Msk (0x2000UL) /*!< PORT15 PDISC: PDIS13 (Bitfield-Mask: 0x01) */ -#define PORT15_PDISC_PDIS14_Pos (14UL) /*!< PORT15 PDISC: PDIS14 (Bit 14) */ -#define PORT15_PDISC_PDIS14_Msk (0x4000UL) /*!< PORT15 PDISC: PDIS14 (Bitfield-Mask: 0x01) */ -#define PORT15_PDISC_PDIS15_Pos (15UL) /*!< PORT15 PDISC: PDIS15 (Bit 15) */ -#define PORT15_PDISC_PDIS15_Msk (0x8000UL) /*!< PORT15 PDISC: PDIS15 (Bitfield-Mask: 0x01) */ - -/* --------------------------------- PORT15_PPS --------------------------------- */ -#define PORT15_PPS_PPS0_Pos (0UL) /*!< PORT15 PPS: PPS0 (Bit 0) */ -#define PORT15_PPS_PPS0_Msk (0x1UL) /*!< PORT15 PPS: PPS0 (Bitfield-Mask: 0x01) */ -#define PORT15_PPS_PPS1_Pos (1UL) /*!< PORT15 PPS: PPS1 (Bit 1) */ -#define PORT15_PPS_PPS1_Msk (0x2UL) /*!< PORT15 PPS: PPS1 (Bitfield-Mask: 0x01) */ -#define PORT15_PPS_PPS2_Pos (2UL) /*!< PORT15 PPS: PPS2 (Bit 2) */ -#define PORT15_PPS_PPS2_Msk (0x4UL) /*!< PORT15 PPS: PPS2 (Bitfield-Mask: 0x01) */ -#define PORT15_PPS_PPS3_Pos (3UL) /*!< PORT15 PPS: PPS3 (Bit 3) */ -#define PORT15_PPS_PPS3_Msk (0x8UL) /*!< PORT15 PPS: PPS3 (Bitfield-Mask: 0x01) */ -#define PORT15_PPS_PPS4_Pos (4UL) /*!< PORT15 PPS: PPS4 (Bit 4) */ -#define PORT15_PPS_PPS4_Msk (0x10UL) /*!< PORT15 PPS: PPS4 (Bitfield-Mask: 0x01) */ -#define PORT15_PPS_PPS5_Pos (5UL) /*!< PORT15 PPS: PPS5 (Bit 5) */ -#define PORT15_PPS_PPS5_Msk (0x20UL) /*!< PORT15 PPS: PPS5 (Bitfield-Mask: 0x01) */ -#define PORT15_PPS_PPS6_Pos (6UL) /*!< PORT15 PPS: PPS6 (Bit 6) */ -#define PORT15_PPS_PPS6_Msk (0x40UL) /*!< PORT15 PPS: PPS6 (Bitfield-Mask: 0x01) */ -#define PORT15_PPS_PPS7_Pos (7UL) /*!< PORT15 PPS: PPS7 (Bit 7) */ -#define PORT15_PPS_PPS7_Msk (0x80UL) /*!< PORT15 PPS: PPS7 (Bitfield-Mask: 0x01) */ -#define PORT15_PPS_PPS8_Pos (8UL) /*!< PORT15 PPS: PPS8 (Bit 8) */ -#define PORT15_PPS_PPS8_Msk (0x100UL) /*!< PORT15 PPS: PPS8 (Bitfield-Mask: 0x01) */ -#define PORT15_PPS_PPS9_Pos (9UL) /*!< PORT15 PPS: PPS9 (Bit 9) */ -#define PORT15_PPS_PPS9_Msk (0x200UL) /*!< PORT15 PPS: PPS9 (Bitfield-Mask: 0x01) */ -#define PORT15_PPS_PPS10_Pos (10UL) /*!< PORT15 PPS: PPS10 (Bit 10) */ -#define PORT15_PPS_PPS10_Msk (0x400UL) /*!< PORT15 PPS: PPS10 (Bitfield-Mask: 0x01) */ -#define PORT15_PPS_PPS11_Pos (11UL) /*!< PORT15 PPS: PPS11 (Bit 11) */ -#define PORT15_PPS_PPS11_Msk (0x800UL) /*!< PORT15 PPS: PPS11 (Bitfield-Mask: 0x01) */ -#define PORT15_PPS_PPS12_Pos (12UL) /*!< PORT15 PPS: PPS12 (Bit 12) */ -#define PORT15_PPS_PPS12_Msk (0x1000UL) /*!< PORT15 PPS: PPS12 (Bitfield-Mask: 0x01) */ -#define PORT15_PPS_PPS13_Pos (13UL) /*!< PORT15 PPS: PPS13 (Bit 13) */ -#define PORT15_PPS_PPS13_Msk (0x2000UL) /*!< PORT15 PPS: PPS13 (Bitfield-Mask: 0x01) */ -#define PORT15_PPS_PPS14_Pos (14UL) /*!< PORT15 PPS: PPS14 (Bit 14) */ -#define PORT15_PPS_PPS14_Msk (0x4000UL) /*!< PORT15 PPS: PPS14 (Bitfield-Mask: 0x01) */ -#define PORT15_PPS_PPS15_Pos (15UL) /*!< PORT15 PPS: PPS15 (Bit 15) */ -#define PORT15_PPS_PPS15_Msk (0x8000UL) /*!< PORT15 PPS: PPS15 (Bitfield-Mask: 0x01) */ - -/* -------------------------------- PORT15_HWSEL -------------------------------- */ -#define PORT15_HWSEL_HW0_Pos (0UL) /*!< PORT15 HWSEL: HW0 (Bit 0) */ -#define PORT15_HWSEL_HW0_Msk (0x3UL) /*!< PORT15 HWSEL: HW0 (Bitfield-Mask: 0x03) */ -#define PORT15_HWSEL_HW1_Pos (2UL) /*!< PORT15 HWSEL: HW1 (Bit 2) */ -#define PORT15_HWSEL_HW1_Msk (0xcUL) /*!< PORT15 HWSEL: HW1 (Bitfield-Mask: 0x03) */ -#define PORT15_HWSEL_HW2_Pos (4UL) /*!< PORT15 HWSEL: HW2 (Bit 4) */ -#define PORT15_HWSEL_HW2_Msk (0x30UL) /*!< PORT15 HWSEL: HW2 (Bitfield-Mask: 0x03) */ -#define PORT15_HWSEL_HW3_Pos (6UL) /*!< PORT15 HWSEL: HW3 (Bit 6) */ -#define PORT15_HWSEL_HW3_Msk (0xc0UL) /*!< PORT15 HWSEL: HW3 (Bitfield-Mask: 0x03) */ -#define PORT15_HWSEL_HW4_Pos (8UL) /*!< PORT15 HWSEL: HW4 (Bit 8) */ -#define PORT15_HWSEL_HW4_Msk (0x300UL) /*!< PORT15 HWSEL: HW4 (Bitfield-Mask: 0x03) */ -#define PORT15_HWSEL_HW5_Pos (10UL) /*!< PORT15 HWSEL: HW5 (Bit 10) */ -#define PORT15_HWSEL_HW5_Msk (0xc00UL) /*!< PORT15 HWSEL: HW5 (Bitfield-Mask: 0x03) */ -#define PORT15_HWSEL_HW6_Pos (12UL) /*!< PORT15 HWSEL: HW6 (Bit 12) */ -#define PORT15_HWSEL_HW6_Msk (0x3000UL) /*!< PORT15 HWSEL: HW6 (Bitfield-Mask: 0x03) */ -#define PORT15_HWSEL_HW7_Pos (14UL) /*!< PORT15 HWSEL: HW7 (Bit 14) */ -#define PORT15_HWSEL_HW7_Msk (0xc000UL) /*!< PORT15 HWSEL: HW7 (Bitfield-Mask: 0x03) */ -#define PORT15_HWSEL_HW8_Pos (16UL) /*!< PORT15 HWSEL: HW8 (Bit 16) */ -#define PORT15_HWSEL_HW8_Msk (0x30000UL) /*!< PORT15 HWSEL: HW8 (Bitfield-Mask: 0x03) */ -#define PORT15_HWSEL_HW9_Pos (18UL) /*!< PORT15 HWSEL: HW9 (Bit 18) */ -#define PORT15_HWSEL_HW9_Msk (0xc0000UL) /*!< PORT15 HWSEL: HW9 (Bitfield-Mask: 0x03) */ -#define PORT15_HWSEL_HW10_Pos (20UL) /*!< PORT15 HWSEL: HW10 (Bit 20) */ -#define PORT15_HWSEL_HW10_Msk (0x300000UL) /*!< PORT15 HWSEL: HW10 (Bitfield-Mask: 0x03) */ -#define PORT15_HWSEL_HW11_Pos (22UL) /*!< PORT15 HWSEL: HW11 (Bit 22) */ -#define PORT15_HWSEL_HW11_Msk (0xc00000UL) /*!< PORT15 HWSEL: HW11 (Bitfield-Mask: 0x03) */ -#define PORT15_HWSEL_HW12_Pos (24UL) /*!< PORT15 HWSEL: HW12 (Bit 24) */ -#define PORT15_HWSEL_HW12_Msk (0x3000000UL) /*!< PORT15 HWSEL: HW12 (Bitfield-Mask: 0x03) */ -#define PORT15_HWSEL_HW13_Pos (26UL) /*!< PORT15 HWSEL: HW13 (Bit 26) */ -#define PORT15_HWSEL_HW13_Msk (0xc000000UL) /*!< PORT15 HWSEL: HW13 (Bitfield-Mask: 0x03) */ -#define PORT15_HWSEL_HW14_Pos (28UL) /*!< PORT15 HWSEL: HW14 (Bit 28) */ -#define PORT15_HWSEL_HW14_Msk (0x30000000UL) /*!< PORT15 HWSEL: HW14 (Bitfield-Mask: 0x03) */ -#define PORT15_HWSEL_HW15_Pos (30UL) /*!< PORT15 HWSEL: HW15 (Bit 30) */ -#define PORT15_HWSEL_HW15_Msk (0xc0000000UL) /*!< PORT15 HWSEL: HW15 (Bitfield-Mask: 0x03) */ - - - -/* ================================================================================ */ -/* ================ Peripheral memory map ================ */ -/* ================================================================================ */ - -#define PPB_BASE 0xE000E000UL -#define DLR_BASE 0x50004900UL -#define ERU0_BASE 0x50004800UL -#define ERU1_BASE 0x40044000UL -#define GPDMA0_BASE 0x500142C0UL -#define GPDMA0_CH0_BASE 0x50014000UL -#define GPDMA0_CH1_BASE 0x50014058UL -#define GPDMA0_CH2_BASE 0x500140B0UL -#define GPDMA0_CH3_BASE 0x50014108UL -#define GPDMA0_CH4_BASE 0x50014160UL -#define GPDMA0_CH5_BASE 0x500141B8UL -#define GPDMA0_CH6_BASE 0x50014210UL -#define GPDMA0_CH7_BASE 0x50014268UL -#define GPDMA1_BASE 0x500182C0UL -#define GPDMA1_CH0_BASE 0x50018000UL -#define GPDMA1_CH1_BASE 0x50018058UL -#define GPDMA1_CH2_BASE 0x500180B0UL -#define GPDMA1_CH3_BASE 0x50018108UL -#define FCE_BASE 0x50020000UL -#define FCE_KE0_BASE 0x50020020UL -#define FCE_KE1_BASE 0x50020040UL -#define FCE_KE2_BASE 0x50020060UL -#define FCE_KE3_BASE 0x50020080UL -#define PBA0_BASE 0x40000000UL -#define PBA1_BASE 0x48000000UL -#define FLASH0_BASE 0x58001000UL -#define PREF_BASE 0x58004000UL -#define PMU0_BASE 0x58000508UL -#define WDT_BASE 0x50008000UL -#define RTC_BASE 0x50004A00UL -#define SCU_CLK_BASE 0x50004600UL -#define SCU_OSC_BASE 0x50004700UL -#define SCU_PLL_BASE 0x50004710UL -#define SCU_GENERAL_BASE 0x50004000UL -#define SCU_INTERRUPT_BASE 0x50004074UL -#define SCU_PARITY_BASE 0x5000413CUL -#define SCU_TRAP_BASE 0x50004160UL -#define SCU_HIBERNATE_BASE 0x50004300UL -#define SCU_POWER_BASE 0x50004200UL -#define SCU_RESET_BASE 0x50004400UL -#define LEDTS0_BASE 0x48010000UL -#define SDMMC_CON_BASE 0x500040B4UL -#define SDMMC_BASE 0x4801C000UL -#define EBU_BASE 0x58008000UL -#define ETH0_CON_BASE 0x50004040UL -#define ETH0_BASE 0x5000C000UL -#define ECAT0_CON_BASE 0x500041B0UL -#define ECAT0_BASE 0x54010000UL -#define ECAT0_FMMU0_BASE 0x54010600UL -#define ECAT0_FMMU1_BASE 0x54010610UL -#define ECAT0_FMMU2_BASE 0x54010620UL -#define ECAT0_FMMU3_BASE 0x54010630UL -#define ECAT0_FMMU4_BASE 0x54010640UL -#define ECAT0_FMMU5_BASE 0x54010650UL -#define ECAT0_FMMU6_BASE 0x54010660UL -#define ECAT0_FMMU7_BASE 0x54010670UL -#define ECAT0_SM0_BASE 0x54010800UL -#define ECAT0_SM1_BASE 0x54010808UL -#define ECAT0_SM2_BASE 0x54010810UL -#define ECAT0_SM3_BASE 0x54010818UL -#define ECAT0_SM4_BASE 0x54010820UL -#define ECAT0_SM5_BASE 0x54010828UL -#define ECAT0_SM6_BASE 0x54010830UL -#define ECAT0_SM7_BASE 0x54010838UL -#define USB0_BASE 0x50040000UL -#define USB_EP_BASE 0x50040900UL -#define USB0_EP1_BASE 0x50040920UL -#define USB0_EP2_BASE 0x50040940UL -#define USB0_EP3_BASE 0x50040960UL -#define USB0_EP4_BASE 0x50040980UL -#define USB0_EP5_BASE 0x500409A0UL -#define USB0_EP6_BASE 0x500409C0UL -#define USB0_CH0_BASE 0x50040500UL -#define USB0_CH1_BASE 0x50040520UL -#define USB0_CH2_BASE 0x50040540UL -#define USB0_CH3_BASE 0x50040560UL -#define USB0_CH4_BASE 0x50040580UL -#define USB0_CH5_BASE 0x500405A0UL -#define USB0_CH6_BASE 0x500405C0UL -#define USB0_CH7_BASE 0x500405E0UL -#define USB0_CH8_BASE 0x50040600UL -#define USB0_CH9_BASE 0x50040620UL -#define USB0_CH10_BASE 0x50040640UL -#define USB0_CH11_BASE 0x50040660UL -#define USB0_CH12_BASE 0x50040680UL -#define USB0_CH13_BASE 0x500406A0UL -#define USIC0_BASE 0x40030008UL -#define USIC1_BASE 0x48020008UL -#define USIC2_BASE 0x48024008UL -#define USIC0_CH0_BASE 0x40030000UL -#define USIC0_CH1_BASE 0x40030200UL -#define USIC1_CH0_BASE 0x48020000UL -#define USIC1_CH1_BASE 0x48020200UL -#define USIC2_CH0_BASE 0x48024000UL -#define USIC2_CH1_BASE 0x48024200UL -#define CAN_BASE 0x48014000UL -#define CAN_NODE0_BASE 0x48014200UL -#define CAN_NODE1_BASE 0x48014300UL -#define CAN_NODE2_BASE 0x48014400UL -#define CAN_NODE3_BASE 0x48014500UL -#define CAN_NODE4_BASE 0x48014600UL -#define CAN_NODE5_BASE 0x48014700UL -#define CAN_MO_BASE 0x48015000UL -#define VADC_BASE 0x40004000UL -#define VADC_G0_BASE 0x40004400UL -#define VADC_G1_BASE 0x40004800UL -#define VADC_G2_BASE 0x40004C00UL -#define VADC_G3_BASE 0x40005000UL -#define DSD_BASE 0x40008000UL -#define DSD_CH0_BASE 0x40008100UL -#define DSD_CH1_BASE 0x40008200UL -#define DSD_CH2_BASE 0x40008300UL -#define DSD_CH3_BASE 0x40008400UL -#define DAC_BASE 0x48018000UL -#define CCU40_BASE 0x4000C000UL -#define CCU41_BASE 0x40010000UL -#define CCU42_BASE 0x40014000UL -#define CCU43_BASE 0x48004000UL -#define CCU40_CC40_BASE 0x4000C100UL -#define CCU40_CC41_BASE 0x4000C200UL -#define CCU40_CC42_BASE 0x4000C300UL -#define CCU40_CC43_BASE 0x4000C400UL -#define CCU41_CC40_BASE 0x40010100UL -#define CCU41_CC41_BASE 0x40010200UL -#define CCU41_CC42_BASE 0x40010300UL -#define CCU41_CC43_BASE 0x40010400UL -#define CCU42_CC40_BASE 0x40014100UL -#define CCU42_CC41_BASE 0x40014200UL -#define CCU42_CC42_BASE 0x40014300UL -#define CCU42_CC43_BASE 0x40014400UL -#define CCU43_CC40_BASE 0x48004100UL -#define CCU43_CC41_BASE 0x48004200UL -#define CCU43_CC42_BASE 0x48004300UL -#define CCU43_CC43_BASE 0x48004400UL -#define CCU80_BASE 0x40020000UL -#define CCU81_BASE 0x40024000UL -#define CCU80_CC80_BASE 0x40020100UL -#define CCU80_CC81_BASE 0x40020200UL -#define CCU80_CC82_BASE 0x40020300UL -#define CCU80_CC83_BASE 0x40020400UL -#define CCU81_CC80_BASE 0x40024100UL -#define CCU81_CC81_BASE 0x40024200UL -#define CCU81_CC82_BASE 0x40024300UL -#define CCU81_CC83_BASE 0x40024400UL -#define POSIF0_BASE 0x40028000UL -#define POSIF1_BASE 0x4002C000UL -#define PORT0_BASE 0x48028000UL -#define PORT1_BASE 0x48028100UL -#define PORT2_BASE 0x48028200UL -#define PORT3_BASE 0x48028300UL -#define PORT4_BASE 0x48028400UL -#define PORT5_BASE 0x48028500UL -#define PORT6_BASE 0x48028600UL -#define PORT7_BASE 0x48028700UL -#define PORT8_BASE 0x48028800UL -#define PORT9_BASE 0x48028900UL -#define PORT14_BASE 0x48028E00UL -#define PORT15_BASE 0x48028F00UL - - -/* ================================================================================ */ -/* ================ Peripheral declaration ================ */ -/* ================================================================================ */ - -#define PPB ((PPB_Type *) PPB_BASE) -#define DLR ((DLR_GLOBAL_TypeDef *) DLR_BASE) -#define ERU0 ((ERU_GLOBAL_TypeDef *) ERU0_BASE) -#define ERU1 ((ERU_GLOBAL_TypeDef *) ERU1_BASE) -#define GPDMA0 ((GPDMA0_GLOBAL_TypeDef *) GPDMA0_BASE) -#define GPDMA0_CH0 ((GPDMA0_CH_TypeDef *) GPDMA0_CH0_BASE) -#define GPDMA0_CH1 ((GPDMA0_CH_TypeDef *) GPDMA0_CH1_BASE) -#define GPDMA0_CH2 ((GPDMA0_CH_TypeDef *) GPDMA0_CH2_BASE) -#define GPDMA0_CH3 ((GPDMA0_CH_TypeDef *) GPDMA0_CH3_BASE) -#define GPDMA0_CH4 ((GPDMA0_CH_TypeDef *) GPDMA0_CH4_BASE) -#define GPDMA0_CH5 ((GPDMA0_CH_TypeDef *) GPDMA0_CH5_BASE) -#define GPDMA0_CH6 ((GPDMA0_CH_TypeDef *) GPDMA0_CH6_BASE) -#define GPDMA0_CH7 ((GPDMA0_CH_TypeDef *) GPDMA0_CH7_BASE) -#define GPDMA1 ((GPDMA1_GLOBAL_TypeDef *) GPDMA1_BASE) -#define GPDMA1_CH0 ((GPDMA1_CH_TypeDef *) GPDMA1_CH0_BASE) -#define GPDMA1_CH1 ((GPDMA1_CH_TypeDef *) GPDMA1_CH1_BASE) -#define GPDMA1_CH2 ((GPDMA1_CH_TypeDef *) GPDMA1_CH2_BASE) -#define GPDMA1_CH3 ((GPDMA1_CH_TypeDef *) GPDMA1_CH3_BASE) -#define FCE ((FCE_GLOBAL_TypeDef *) FCE_BASE) -#define FCE_KE0 ((FCE_KE_TypeDef *) FCE_KE0_BASE) -#define FCE_KE1 ((FCE_KE_TypeDef *) FCE_KE1_BASE) -#define FCE_KE2 ((FCE_KE_TypeDef *) FCE_KE2_BASE) -#define FCE_KE3 ((FCE_KE_TypeDef *) FCE_KE3_BASE) -#define PBA0 ((PBA_GLOBAL_TypeDef *) PBA0_BASE) -#define PBA1 ((PBA_GLOBAL_TypeDef *) PBA1_BASE) -#define FLASH0 ((FLASH0_GLOBAL_TypeDef *) FLASH0_BASE) -#define PREF ((PREF_GLOBAL_TypeDef *) PREF_BASE) -#define PMU0 ((PMU0_GLOBAL_TypeDef *) PMU0_BASE) -#define WDT ((WDT_GLOBAL_TypeDef *) WDT_BASE) -#define RTC ((RTC_GLOBAL_TypeDef *) RTC_BASE) -#define SCU_CLK ((SCU_CLK_TypeDef *) SCU_CLK_BASE) -#define SCU_OSC ((SCU_OSC_TypeDef *) SCU_OSC_BASE) -#define SCU_PLL ((SCU_PLL_TypeDef *) SCU_PLL_BASE) -#define SCU_GENERAL ((SCU_GENERAL_TypeDef *) SCU_GENERAL_BASE) -#define SCU_INTERRUPT ((SCU_INTERRUPT_TypeDef *) SCU_INTERRUPT_BASE) -#define SCU_PARITY ((SCU_PARITY_TypeDef *) SCU_PARITY_BASE) -#define SCU_TRAP ((SCU_TRAP_TypeDef *) SCU_TRAP_BASE) -#define SCU_HIBERNATE ((SCU_HIBERNATE_TypeDef *) SCU_HIBERNATE_BASE) -#define SCU_POWER ((SCU_POWER_TypeDef *) SCU_POWER_BASE) -#define SCU_RESET ((SCU_RESET_TypeDef *) SCU_RESET_BASE) -#define LEDTS0 ((LEDTS0_GLOBAL_TypeDef *) LEDTS0_BASE) -#define SDMMC_CON ((SDMMC_CON_Type *) SDMMC_CON_BASE) -#define SDMMC ((SDMMC_GLOBAL_TypeDef *) SDMMC_BASE) -#define EBU ((EBU_Type *) EBU_BASE) -#define ETH0_CON ((ETH0_CON_GLOBAL_TypeDef *) ETH0_CON_BASE) -#define ETH0 ((ETH_GLOBAL_TypeDef *) ETH0_BASE) -#define ECAT0_CON ((ECAT0_CON_Type *) ECAT0_CON_BASE) -#define ECAT0 ((ECAT_Type *) ECAT0_BASE) -#define ECAT0_FMMU0 ((ECAT0_FMMU_Type *) ECAT0_FMMU0_BASE) -#define ECAT0_FMMU1 ((ECAT0_FMMU_Type *) ECAT0_FMMU1_BASE) -#define ECAT0_FMMU2 ((ECAT0_FMMU_Type *) ECAT0_FMMU2_BASE) -#define ECAT0_FMMU3 ((ECAT0_FMMU_Type *) ECAT0_FMMU3_BASE) -#define ECAT0_FMMU4 ((ECAT0_FMMU_Type *) ECAT0_FMMU4_BASE) -#define ECAT0_FMMU5 ((ECAT0_FMMU_Type *) ECAT0_FMMU5_BASE) -#define ECAT0_FMMU6 ((ECAT0_FMMU_Type *) ECAT0_FMMU6_BASE) -#define ECAT0_FMMU7 ((ECAT0_FMMU_Type *) ECAT0_FMMU7_BASE) -#define ECAT0_SM0 ((ECAT0_SM_Type *) ECAT0_SM0_BASE) -#define ECAT0_SM1 ((ECAT0_SM_Type *) ECAT0_SM1_BASE) -#define ECAT0_SM2 ((ECAT0_SM_Type *) ECAT0_SM2_BASE) -#define ECAT0_SM3 ((ECAT0_SM_Type *) ECAT0_SM3_BASE) -#define ECAT0_SM4 ((ECAT0_SM_Type *) ECAT0_SM4_BASE) -#define ECAT0_SM5 ((ECAT0_SM_Type *) ECAT0_SM5_BASE) -#define ECAT0_SM6 ((ECAT0_SM_Type *) ECAT0_SM6_BASE) -#define ECAT0_SM7 ((ECAT0_SM_Type *) ECAT0_SM7_BASE) -#define USB0 ((USB0_GLOBAL_TypeDef *) USB0_BASE) -#define USB0_EP0 ((USB0_EP0_TypeDef *) USB_EP_BASE) -#define USB0_EP1 ((USB0_EP_TypeDef *) USB0_EP1_BASE) -#define USB0_EP2 ((USB0_EP_TypeDef *) USB0_EP2_BASE) -#define USB0_EP3 ((USB0_EP_TypeDef *) USB0_EP3_BASE) -#define USB0_EP4 ((USB0_EP_TypeDef *) USB0_EP4_BASE) -#define USB0_EP5 ((USB0_EP_TypeDef *) USB0_EP5_BASE) -#define USB0_EP6 ((USB0_EP_TypeDef *) USB0_EP6_BASE) -#define USB0_CH0 ((USB0_CH_TypeDef *) USB0_CH0_BASE) -#define USB0_CH1 ((USB0_CH_TypeDef *) USB0_CH1_BASE) -#define USB0_CH2 ((USB0_CH_TypeDef *) USB0_CH2_BASE) -#define USB0_CH3 ((USB0_CH_TypeDef *) USB0_CH3_BASE) -#define USB0_CH4 ((USB0_CH_TypeDef *) USB0_CH4_BASE) -#define USB0_CH5 ((USB0_CH_TypeDef *) USB0_CH5_BASE) -#define USB0_CH6 ((USB0_CH_TypeDef *) USB0_CH6_BASE) -#define USB0_CH7 ((USB0_CH_TypeDef *) USB0_CH7_BASE) -#define USB0_CH8 ((USB0_CH_TypeDef *) USB0_CH8_BASE) -#define USB0_CH9 ((USB0_CH_TypeDef *) USB0_CH9_BASE) -#define USB0_CH10 ((USB0_CH_TypeDef *) USB0_CH10_BASE) -#define USB0_CH11 ((USB0_CH_TypeDef *) USB0_CH11_BASE) -#define USB0_CH12 ((USB0_CH_TypeDef *) USB0_CH12_BASE) -#define USB0_CH13 ((USB0_CH_TypeDef *) USB0_CH13_BASE) -#define USIC0 ((USIC_GLOBAL_TypeDef *) USIC0_BASE) -#define USIC1 ((USIC_GLOBAL_TypeDef *) USIC1_BASE) -#define USIC2 ((USIC_GLOBAL_TypeDef *) USIC2_BASE) -#define USIC0_CH0 ((USIC_CH_TypeDef *) USIC0_CH0_BASE) -#define USIC0_CH1 ((USIC_CH_TypeDef *) USIC0_CH1_BASE) -#define USIC1_CH0 ((USIC_CH_TypeDef *) USIC1_CH0_BASE) -#define USIC1_CH1 ((USIC_CH_TypeDef *) USIC1_CH1_BASE) -#define USIC2_CH0 ((USIC_CH_TypeDef *) USIC2_CH0_BASE) -#define USIC2_CH1 ((USIC_CH_TypeDef *) USIC2_CH1_BASE) -#define CAN ((CAN_GLOBAL_TypeDef *) CAN_BASE) -#define CAN_NODE0 ((CAN_NODE_TypeDef *) CAN_NODE0_BASE) -#define CAN_NODE1 ((CAN_NODE_TypeDef *) CAN_NODE1_BASE) -#define CAN_NODE2 ((CAN_NODE_TypeDef *) CAN_NODE2_BASE) -#define CAN_NODE3 ((CAN_NODE_TypeDef *) CAN_NODE3_BASE) -#define CAN_NODE4 ((CAN_NODE_TypeDef *) CAN_NODE4_BASE) -#define CAN_NODE5 ((CAN_NODE_TypeDef *) CAN_NODE5_BASE) -#define CAN_MO ((CAN_MO_CLUSTER_Type *) CAN_MO_BASE) -#define VADC ((VADC_GLOBAL_TypeDef *) VADC_BASE) -#define VADC_G0 ((VADC_G_TypeDef *) VADC_G0_BASE) -#define VADC_G1 ((VADC_G_TypeDef *) VADC_G1_BASE) -#define VADC_G2 ((VADC_G_TypeDef *) VADC_G2_BASE) -#define VADC_G3 ((VADC_G_TypeDef *) VADC_G3_BASE) -#define DSD ((DSD_GLOBAL_TypeDef *) DSD_BASE) -#define DSD_CH0 ((DSD_CH_TypeDef *) DSD_CH0_BASE) -#define DSD_CH1 ((DSD_CH_TypeDef *) DSD_CH1_BASE) -#define DSD_CH2 ((DSD_CH_TypeDef *) DSD_CH2_BASE) -#define DSD_CH3 ((DSD_CH_TypeDef *) DSD_CH3_BASE) -#define DAC ((DAC_GLOBAL_TypeDef *) DAC_BASE) -#define CCU40 ((CCU4_GLOBAL_TypeDef *) CCU40_BASE) -#define CCU41 ((CCU4_GLOBAL_TypeDef *) CCU41_BASE) -#define CCU42 ((CCU4_GLOBAL_TypeDef *) CCU42_BASE) -#define CCU43 ((CCU4_GLOBAL_TypeDef *) CCU43_BASE) -#define CCU40_CC40 ((CCU4_CC4_TypeDef *) CCU40_CC40_BASE) -#define CCU40_CC41 ((CCU4_CC4_TypeDef *) CCU40_CC41_BASE) -#define CCU40_CC42 ((CCU4_CC4_TypeDef *) CCU40_CC42_BASE) -#define CCU40_CC43 ((CCU4_CC4_TypeDef *) CCU40_CC43_BASE) -#define CCU41_CC40 ((CCU4_CC4_TypeDef *) CCU41_CC40_BASE) -#define CCU41_CC41 ((CCU4_CC4_TypeDef *) CCU41_CC41_BASE) -#define CCU41_CC42 ((CCU4_CC4_TypeDef *) CCU41_CC42_BASE) -#define CCU41_CC43 ((CCU4_CC4_TypeDef *) CCU41_CC43_BASE) -#define CCU42_CC40 ((CCU4_CC4_TypeDef *) CCU42_CC40_BASE) -#define CCU42_CC41 ((CCU4_CC4_TypeDef *) CCU42_CC41_BASE) -#define CCU42_CC42 ((CCU4_CC4_TypeDef *) CCU42_CC42_BASE) -#define CCU42_CC43 ((CCU4_CC4_TypeDef *) CCU42_CC43_BASE) -#define CCU43_CC40 ((CCU4_CC4_TypeDef *) CCU43_CC40_BASE) -#define CCU43_CC41 ((CCU4_CC4_TypeDef *) CCU43_CC41_BASE) -#define CCU43_CC42 ((CCU4_CC4_TypeDef *) CCU43_CC42_BASE) -#define CCU43_CC43 ((CCU4_CC4_TypeDef *) CCU43_CC43_BASE) -#define CCU80 ((CCU8_GLOBAL_TypeDef *) CCU80_BASE) -#define CCU81 ((CCU8_GLOBAL_TypeDef *) CCU81_BASE) -#define CCU80_CC80 ((CCU8_CC8_TypeDef *) CCU80_CC80_BASE) -#define CCU80_CC81 ((CCU8_CC8_TypeDef *) CCU80_CC81_BASE) -#define CCU80_CC82 ((CCU8_CC8_TypeDef *) CCU80_CC82_BASE) -#define CCU80_CC83 ((CCU8_CC8_TypeDef *) CCU80_CC83_BASE) -#define CCU81_CC80 ((CCU8_CC8_TypeDef *) CCU81_CC80_BASE) -#define CCU81_CC81 ((CCU8_CC8_TypeDef *) CCU81_CC81_BASE) -#define CCU81_CC82 ((CCU8_CC8_TypeDef *) CCU81_CC82_BASE) -#define CCU81_CC83 ((CCU8_CC8_TypeDef *) CCU81_CC83_BASE) -#define POSIF0 ((POSIF_GLOBAL_TypeDef *) POSIF0_BASE) -#define POSIF1 ((POSIF_GLOBAL_TypeDef *) POSIF1_BASE) -#define PORT0 ((PORT0_Type *) PORT0_BASE) -#define PORT1 ((PORT1_Type *) PORT1_BASE) -#define PORT2 ((PORT2_Type *) PORT2_BASE) -#define PORT3 ((PORT3_Type *) PORT3_BASE) -#define PORT4 ((PORT4_Type *) PORT4_BASE) -#define PORT5 ((PORT5_Type *) PORT5_BASE) -#define PORT6 ((PORT6_Type *) PORT6_BASE) -#define PORT7 ((PORT7_Type *) PORT7_BASE) -#define PORT8 ((PORT8_Type *) PORT8_BASE) -#define PORT9 ((PORT9_Type *) PORT9_BASE) -#define PORT14 ((PORT14_Type *) PORT14_BASE) -#define PORT15 ((PORT15_Type *) PORT15_BASE) - - -/** @} */ /* End of group Device_Peripheral_Registers */ -/** @} */ /* End of group XMC4800 */ -/** @} */ /* End of group Infineon */ - -#ifdef __cplusplus -} -#endif - - -#endif /* XMC4800_H */ - diff --git a/variants/XMC4800/config/XMC4800_Relax_Kit/pins_arduino.h b/variants/XMC4800/config/XMC4800_Relax_Kit/pins_arduino.h deleted file mode 100644 index cbb884d1..00000000 --- a/variants/XMC4800/config/XMC4800_Relax_Kit/pins_arduino.h +++ /dev/null @@ -1,312 +0,0 @@ -/* -pins_arduino.h - Pin definition functions for Arduino -Part of Arduino - http://www.arduino.cc/ - -Copyright (c) 2007 David A. Mellis - -This library is free software; you can redistribute it and/or -modify it under the terms of the GNU Lesser General Public -License as published by the Free Software Foundation; either -version 2.1 of the License, or (at your option) any later version. - -This library is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -Lesser General Public License for more details. - -You should have received a copy of the GNU Lesser General -Public License along with this library; if not, write to the -Free Software Foundation, Inc., 59 Temple Place, Suite 330, -Boston, MA 02111-1307 USA -*/ -#ifndef PINS_ARDUINO_H_ -#define PINS_ARDUINO_H_ - -//**************************************************************************** -// @Project Includes -//**************************************************************************** -#include - -//**************************************************************************** -// @Defines -//**************************************************************************** -// XMC_BOARD for stringifying into serial or other text outputs/logs -// Note the actual name XMC and number MUST have a character between -// to avoid issues with other defined macros e.g. XMC1100 -#define XMC_BOARD XMC 4800 Relax Kit - -/* On board LED is ON when digital output is 0, LOW, False, OFF */ -#define XMC_LED_ON 0 - -// Following were defines now evaluated by compilation as const variables -// After definitions of associated mapping arrays -extern const uint8_t NUM_DIGITAL; -extern const uint8_t GND; -extern const uint8_t NUM_PWM4; -extern const uint8_t NUM_PWM8; -extern const uint8_t NUM_PWM; -extern const uint8_t NUM_INTERRUPT; -extern const uint8_t NUM_ANALOG_INPUTS; -#ifdef DAC -extern const uint8_t NUM_ANALOG_OUTPUTS; -#endif -#define NUM_LEDS 2 -#define NUM_BUTTONS 2 -#define NUM_SERIAL 2 -#define NUM_TONE_PINS 16 -#define NUM_TASKS_VARIANT 32 - -// Indicate unit has RTC/Alarm -#define HAS_RTC 1 - -// Board has two serial ports pre-assigned to debug and on-board - -#define PWM4_TIMER_PERIOD (0x11EF) // Generate 490Hz @fCCU=144MHz -#define PWM8_TIMER_PERIOD (0x11EF) // Generate 490Hz @fCCU=144MHz - -#define PCLK 144000000u - -#define PIN_SPI_SS 10 -#define PIN_SPI_MOSI 11 -#define PIN_SPI_MISO 12 -#define PIN_SPI_SCK 13 - -extern uint8_t SS; -extern uint8_t MOSI; -extern uint8_t MISO; -extern uint8_t SCK; - -#define PIN_SPI_SS_SD 28 -#define PIN_SPI_MOSI_SD 29 -#define PIN_SPI_MISO_SD 30 -#define PIN_SPI_SCK_SD 31 - -static const uint8_t SS_SD = PIN_SPI_SS_SD; -static const uint8_t MOSI_SD = PIN_SPI_MOSI_SD; -static const uint8_t MISO_SD = PIN_SPI_MISO_SD; -static const uint8_t SCK_SD = PIN_SPI_SCK_SD; - -#define A0 0 -#define A1 1 -#define A2 2 -#define A3 3 -#define A4 4 -#define A5 5 - -#define LED_BUILTIN 13 // Standard Arduino LED -#define LED1 24 // Additional LED1 -#define LED2 25 // Additional LED2 -#define BUTTON1 26 // Additional BUTTON1 -#define BUTTON2 27 // Additional BUTTON2 -#define GND 50 // GND - - -#define digitalPinToPCICR(p) (((p) >= 0 && (p) <= 21) ? (&PCICR) : ((uint8_t *)0)) -#define digitalPinToPCICRbit(p) (((p) <= 7) ? 2 : (((p) <= 13) ? 0 : 1)) -#define digitalPinToPCMSK(p) (((p) <= 7) ? (&PCMSK2) : (((p) <= 13) ? (&PCMSK0) : (((p) <= 21) ? (&PCMSK1) : ((uint8_t *)0)))) -#define digitalPinToPCMSKbit(p) (((p) <= 7) ? (p) : ((p) <= 13) ? ((p) - 8) : ((p) - 14)) -#define digitalPinToInterrupt(p) ((p) == 2 ? 0 : ((p) == 3 ? 1 : NOT_AN_INTERRUPT)) - -#ifdef ARDUINO_MAIN -// Mapping of digital pins and comments -const XMC_PORT_PIN_t mapping_port_pin[] = -{ - /* 0 */ {XMC_GPIO_PORT2, 15}, // RX P2.15 - /* 1 */ {XMC_GPIO_PORT2 ,14}, // TX P2.14 - /* 2 */ {XMC_GPIO_PORT1 ,0}, // GPIO / External INT 0 P1.0 - /* 3 */ {XMC_GPIO_PORT1 ,1}, // PWM40-0 / External INT 1 P1.1 - /* 4 */ {XMC_GPIO_PORT1 ,8}, // GPIO P1.8 - /* 5 */ {XMC_GPIO_PORT2 ,12}, // PWM8-0 P2.12 - /* 6 */ {XMC_GPIO_PORT2 ,11}, // PWM8-1 P2.11 - /* 7 */ {XMC_GPIO_PORT1 ,9}, // GPIO P1.9 - /* 8 */ {XMC_GPIO_PORT1 ,10}, // GPIO P1.10 - /* 9 */ {XMC_GPIO_PORT1 ,11}, // PWM8-2 output P1.11 - /* 10 */ {XMC_GPIO_PORT3 ,10}, // SPI-SS / PWM4-1 // TODO: SPI_SS_1 P3.10 - /* 11 */ {XMC_GPIO_PORT3 ,8}, // SPI-MOSI / PWM4-2 P3.8 - /* 12 */ {XMC_GPIO_PORT3 ,7}, // SPI-MISO P3.7 - /* 13 */ {XMC_GPIO_PORT3 ,9}, // SPI-SCK / LED BUILTIN P3.9 - /* 14 */ {XMC_GPIO_PORT2 ,3}, // AREF TODO: P2.3 - /* 15 */ {XMC_GPIO_PORT3 ,15}, // I2C Data / Address SDA / A4 P3.15 (Hardwired to A4) - /* 16 */ {XMC_GPIO_PORT0 ,13}, // I2C Clock SCL / A5 P0.13 (Hardwired to A5) - /* 17 */ {XMC_GPIO_PORT14 ,0}, // A0 / ADC Input P14.0 (INPUT ONLY) - /* 18 */ {XMC_GPIO_PORT14 ,1}, // A1 / ADC Input P14.1 (INPUT ONLY) - /* 19 */ {XMC_GPIO_PORT14 ,2}, // A2 / ADC Input P14.2 (INPUT ONLY) - /* 20 */ {XMC_GPIO_PORT14 ,3}, // A3 / ADC Input P14.3 (INPUT ONLY) - /* 21 */ {XMC_GPIO_PORT14 ,4}, // A4 / ADC Input / SDA P14.4 (Hardwired to SDA) - /* 22 */ {XMC_GPIO_PORT14 ,5}, // A5 / ADC Input / SCL P14.5 (Hardwired to SCL) - /* 23 */ {XMC_GPIO_PORT3 ,10}, // SPI_SS_2 P3.10 - /* 24 */ {XMC_GPIO_PORT5 ,9}, // Additional LED1 P5.9 - /* 25 */ {XMC_GPIO_PORT5 ,8}, // Additional LED2 P5.8 - /* 26 */ {XMC_GPIO_PORT15 ,13}, // Additional BUTTON1 P15.13 (INPUT ONLY) - /* 27 */ {XMC_GPIO_PORT15 ,12}, // Additional BUTTON2 P15.12 (INPUT ONLY) - /* 28 */ {XMC_GPIO_PORT4 ,1}, // SPI_SS_3 (SD CARD) P4.1 - /* 29 */ {XMC_GPIO_PORT3 ,5}, // SPI-MOSI (SD CARD) P3.5 - /* 30 */ {XMC_GPIO_PORT4 ,0}, // SPI-MISO (SD CARD) P4.0 - /* 31 */ {XMC_GPIO_PORT3 ,6}, // SPI-SCK (SD CARD) P3.6 - /* 32 */ {XMC_GPIO_PORT1 ,6}, // P1.6 - /* 33 */ {XMC_GPIO_PORT1 ,7} // P1.7 -}; -const uint8_t GND = ( sizeof( mapping_port_pin ) / sizeof( XMC_PORT_PIN_t ) ); -const uint8_t NUM_DIGITAL = ( sizeof( mapping_port_pin ) / sizeof( XMC_PORT_PIN_t ) );; - -const XMC_PIN_INTERRUPT_t mapping_interrupt[] = { - /* 0 */ {CCU40, CCU40_CC43, 3, 0, CCU40_IN3_P1_0}, - /* 1 */ {CCU40, CCU40_CC42, 2, 1, CCU40_IN2_P1_1} -}; -const uint8_t NUM_INTERRUPT = ( sizeof( mapping_interrupt ) / sizeof( XMC_PIN_INTERRUPT_t ) ); - -/* Mapping of Arduino Pins to PWM4 channels as pin and index in PWM4 channel - mapping array XMC_PWM4_t mapping_pwm4[] - last entry 255 for both parts. - Putting both parts in array means if a PWM4 channel gets reassigned for - another function later a gap in channel numbers will not mess things up */ -const uint8_t mapping_pin_PWM4[][ 2 ] = { - { 3, 0 }, - { 10, 1 }, - { 11, 2 }, - { 255, 255 } }; - -/* Configurations of PWM channels for CCU4 type */ -XMC_PWM4_t mapping_pwm4[] = - { - {CCU40, CCU40_CC42, 2, mapping_port_pin[3], P1_1_AF_CCU40_OUT2, DISABLED}, // PWM disabled 3 P1.1 - {CCU41, CCU41_CC40, 0, mapping_port_pin[10], P3_10_AF_CCU41_OUT0, DISABLED}, // PWM disabled 10 P3.10 - {CCU41, CCU41_CC42, 2, mapping_port_pin[11], P3_8_AF_CCU41_OUT2, DISABLED} // PWM disabled 11 P3.8 - }; -const uint8_t NUM_PWM4 = ( sizeof( mapping_pwm4 ) / sizeof( XMC_PWM4_t ) ); - -/* Mapping in same manner as PWM4 for PWM8 channels */ -const uint8_t mapping_pin_PWM8[][ 2 ] = { - { 5, 0 }, - { 6, 1 }, - { 9, 2 }, - { 255, 255 } }; - -/* Configurations of PWM channels for CCU8 type */ -XMC_PWM8_t mapping_pwm8[] = - { - {CCU81, CCU81_CC83, 3, XMC_CCU8_SLICE_COMPARE_CHANNEL_2, mapping_port_pin[5], P2_12_AF_CCU81_OUT33, DISABLED}, // PWM disabled 5 P2.12 - {CCU80, CCU80_CC82, 2, XMC_CCU8_SLICE_COMPARE_CHANNEL_2, mapping_port_pin[6], P2_11_AF_CCU80_OUT22, DISABLED}, // PWM disabled 6 P2.11 - {CCU81, CCU81_CC81, 1, XMC_CCU8_SLICE_COMPARE_CHANNEL_1, mapping_port_pin[9], P1_11_AF_CCU81_OUT11, DISABLED} // PWM disabled 9 P1.11 - }; -const uint8_t NUM_PWM8 = ( sizeof( mapping_pwm8 ) / sizeof( XMC_PWM8_t ) ); -const uint8_t NUM_PWM = ( sizeof( mapping_pwm4 ) / sizeof( XMC_PWM4_t ) ) - + ( sizeof( mapping_pwm8 ) / sizeof( XMC_PWM8_t ) ); - -/* Analog Pin mappings and configurations */ -XMC_ADC_t mapping_adc[] = - { - {VADC, 0, VADC_G0, 0, 4 , DISABLED}, - {VADC, 1, VADC_G0, 0, 15, DISABLED}, - {VADC, 2, VADC_G1, 1, 15, DISABLED}, - {VADC, 3, VADC_G1, 1, 3 , DISABLED}, - {VADC, 0, VADC_G2, 2, 1 , DISABLED}, - {VADC, 1, VADC_G2, 2, 0 , DISABLED} - }; -const uint8_t NUM_ANALOG_INPUTS = ( sizeof( mapping_adc ) / sizeof( XMC_ADC_t ) ); - -/* - * UART objects - * - * Serial 0 is Debug port - * Serial 1 is on-board port - */ -RingBuffer rx_buffer_debug; -RingBuffer tx_buffer_debug; -RingBuffer rx_buffer_on_board; -RingBuffer tx_buffer_on_board; - -XMC_UART_t XMC_UART_debug = -{ - .channel = XMC_UART0_CH0, - .rx = { .port = (XMC_GPIO_PORT_t *)PORT1_BASE, - .pin = (uint8_t)4 - }, - .rx_config = { .mode = XMC_GPIO_MODE_INPUT_TRISTATE, - .output_level = XMC_GPIO_OUTPUT_LEVEL_HIGH, - .output_strength = XMC_GPIO_OUTPUT_STRENGTH_STRONG_SOFT_EDGE - }, - .tx = { .port = (XMC_GPIO_PORT_t *)PORT1_BASE, - .pin = (uint8_t)5 - }, - .tx_config = { .mode = (XMC_GPIO_MODE_t) XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT2, - .output_level = XMC_GPIO_OUTPUT_LEVEL_HIGH, - .output_strength = XMC_GPIO_OUTPUT_STRENGTH_STRONG_SOFT_EDGE - }, - .input_source = (XMC_USIC_CH_INPUT_t)USIC0_C0_DX0_P1_4, - .irq_num = USIC0_0_IRQn, - .irq_service_request = 0 -}; - -XMC_UART_t XMC_UART_1 = -{ - .channel = XMC_UART1_CH0, - .rx = { .port = (XMC_GPIO_PORT_t *)PORT2_BASE, - .pin = (uint8_t)15 - }, - .rx_config = { .mode = XMC_GPIO_MODE_INPUT_TRISTATE, - .output_level = XMC_GPIO_OUTPUT_LEVEL_HIGH, - .output_strength = XMC_GPIO_OUTPUT_STRENGTH_STRONG_SOFT_EDGE - }, - .tx = { .port = (XMC_GPIO_PORT_t *)PORT2_BASE, - .pin = (uint8_t)14 - }, - .tx_config = { .mode = (XMC_GPIO_MODE_t) XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT2, - .output_level = XMC_GPIO_OUTPUT_LEVEL_HIGH, - .output_strength = XMC_GPIO_OUTPUT_STRENGTH_STRONG_SOFT_EDGE - }, - .input_source = (XMC_USIC_CH_INPUT_t)USIC1_C0_DX0_P2_15, - .irq_num = USIC1_0_IRQn, - .irq_service_request = 0 -}; - -// Debug port -HardWwareSerial Serial( &XMC_UART_0, &rx_buffer_0, &tx_buffer_0 ); -// On-board port -HardwareSerial Serial1( &XMC_UART_1, &rx_buffer_1, &tx_buffer_1 ); - -// Serial Interrupt and event handling -#ifdef __cplusplus -extern "C" { -#endif -void serialEventRun( ); -void serialEvent( ) __attribute__((weak)); -void serialEvent1( ) __attribute__((weak)); - - -void serialEventRun( ) -{ -if( serialEvent ) - { - if( Serial.available( ) ) - serialEvent( ); - } -if( serialEvent1 ) - { - if( Serial1.available( ) ) - serialEvent1( ); - } -} - - -void USIC0_0_IRQHandler( ) -{ -Serial.IrqHandler( ); -} - - -void USIC1_0_IRQHandler( ) -{ -Serial1.IrqHandler( ); -} -#ifdef __cplusplus -} -#endif -#endif /* ARDUINO_MAIN */ - -#ifdef __cplusplus -extern HardwareSerial Serial; -extern HardwareSerial Serial1; -#endif /* cplusplus */ - -#endif /* PINS_ARDUINO_H_ */ diff --git a/variants/XMC4800/linker_script.ld b/variants/XMC4800/linker_script.ld deleted file mode 100644 index f78f953f..00000000 --- a/variants/XMC4800/linker_script.ld +++ /dev/null @@ -1,287 +0,0 @@ -/** - * @file XMC4800x2048.ld - * @date 2016-03-08 - * - * @cond - ********************************************************************************************************************* - * Linker file for the GNU C Compiler v1.2 - * Supported devices: XMC4800-E196x2048 - * XMC4800-F144x2048 - * XMC4800-F100x2048 - * - * Copyright (c) 2015-2016, Infineon Technologies AG - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the - * following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list of conditions and the following - * disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following - * disclaimer in the documentation and/or other materials provided with the distribution. - * - * Neither the name of the copyright holders nor the names of its contributors may be used to endorse or promote - * products derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY,OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * To improve the quality of the software, users are encouraged to share modifications, enhancements or bug fixes with - * Infineon Technologies AG dave@infineon.com). - ********************************************************************************************************************* - * - * Change History - * -------------- - * - * 2015-05-22: - * - Initial version - * - * 2015-07-13: - * - Updates from ARM template for C++ and fixes for GCC 4.9q2 - * - * 2016-03-08: - * - Fix size of BSS and DATA sections to be multiple of 4 - * - Add assertion to check that region SRAM_combined does not overflowed no_init section - * - * @endcond - * - */ - -OUTPUT_FORMAT("elf32-littlearm") -OUTPUT_ARCH(arm) -ENTRY(Reset_Handler) - -stack_size = DEFINED(stack_size) ? stack_size : 2048; -no_init_size = 64; - -MEMORY -{ - FLASH_1_cached(RX) : ORIGIN = 0x08000000, LENGTH = 0x00200000 - FLASH_1_uncached(RX) : ORIGIN = 0x0C000000, LENGTH = 0x00200000 - PSRAM_1(!RX) : ORIGIN = 0x1FFE8000, LENGTH = 0x18000 - DSRAM_1_system(!RX) : ORIGIN = 0x20000000, LENGTH = 0x20000 - DSRAM_2_comm(!RX) : ORIGIN = 0x20020000, LENGTH = 0x20000 - SRAM_combined(!RX) : ORIGIN = 0x1FFE8000, LENGTH = 0x00058000 -} - -SECTIONS -{ - /* TEXT section */ - - .text : - { - sText = .; - KEEP(*(.reset)); - *(.text .text.* .gnu.linkonce.t.*); - - /* C++ Support */ - KEEP(*(.init)) - KEEP(*(.fini)) - - /* .ctors */ - *crtbegin.o(.ctors) - *crtbegin?.o(.ctors) - *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors) - *(SORT(.ctors.*)) - *(.ctors) - - /* .dtors */ - *crtbegin.o(.dtors) - *crtbegin?.o(.dtors) - *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) - *(SORT(.dtors.*)) - *(.dtors) - - *(.rodata .rodata.*) - *(.gnu.linkonce.r*) - - . = ALIGN(4); - } > FLASH_1_cached AT > FLASH_1_uncached - - .eh_frame_hdr : ALIGN (4) - { - KEEP (*(.eh_frame_hdr)) - } > FLASH_1_cached AT > FLASH_1_uncached - - .eh_frame : ALIGN (4) - { - KEEP (*(.eh_frame)) - } > FLASH_1_cached AT > FLASH_1_uncached - - /* Exception handling, exidx needs a dedicated section */ - .ARM.extab : ALIGN(4) - { - *(.ARM.extab* .gnu.linkonce.armextab.*) - } > FLASH_1_cached AT > FLASH_1_uncached - - . = ALIGN(4); - __exidx_start = .; - .ARM.exidx : ALIGN(4) - { - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - } > FLASH_1_cached AT > FLASH_1_uncached - __exidx_end = .; - . = ALIGN(4); - - /* DSRAM layout (Lowest to highest)*/ - Stack (NOLOAD) : - { - __stack_start = .; - . = . + stack_size; - __stack_end = .; - __initial_sp = .; - } > SRAM_combined - - /* functions with __attribute__((section(".ram_code"))) */ - .ram_code : - { - . = ALIGN(4); /* section size must be multiple of 4 */ - __ram_code_start = .; - *(.ram_code) - . = ALIGN(4); /* section size must be multiple of 4 */ - __ram_code_end = .; - } > SRAM_combined AT > FLASH_1_uncached - __ram_code_load = LOADADDR (.ram_code); - __ram_code_size = __ram_code_end - __ram_code_start; - - /* Standard DATA and user defined DATA/BSS/CONST sections */ - .data : - { - . = ALIGN(4); /* section size must be multiple of 4 */ - __data_start = .; - *(vtable) - * (.data); - * (.data*); - *(*.data); - *(.gnu.linkonce.d*) - - . = ALIGN(4); - /* preinit data */ - PROVIDE_HIDDEN (__preinit_array_start = .); - KEEP(*(.preinit_array)) - PROVIDE_HIDDEN (__preinit_array_end = .); - - . = ALIGN(4); - /* init data */ - PROVIDE_HIDDEN (__init_array_start = .); - KEEP(*(SORT(.init_array.*))) - KEEP(*(.init_array)) - PROVIDE_HIDDEN (__init_array_end = .); - - . = ALIGN(4); - /* finit data */ - PROVIDE_HIDDEN (__fini_array_start = .); - KEEP(*(SORT(.fini_array.*))) - KEEP(*(.fini_array)) - PROVIDE_HIDDEN (__fini_array_end = .); - - . = ALIGN(4); /* section size must be multiple of 4 */ - __data_end = .; - } > SRAM_combined AT > FLASH_1_uncached - __data_load = LOADADDR (.data); - __data_size = __data_end - __data_start; - - /* BSS section */ - .bss (NOLOAD) : - { - . = ALIGN(4); /* section size must be multiple of 4 */ - __bss_start = .; - * (.bss); - * (.bss*); - * (COMMON); - *(.gnu.linkonce.b*) - . = ALIGN(4); /* section size must be multiple of 4 */ - __bss_end = .; - } > SRAM_combined - __bss_size = __bss_end - __bss_start; - - /* Shift location counter, so that ETH_RAM and USB_RAM are located above DSRAM_1_system */ - __shift_loc = (__bss_end >= ORIGIN(DSRAM_1_system)) ? 0 : (ORIGIN(DSRAM_1_system) - __bss_end); - - USB_RAM (__bss_end + __shift_loc) (NOLOAD) : - { - . = ALIGN(4); /* section size must be multiple of 4 */ - USB_RAM_start = .; - *(USB_RAM) - . = ALIGN(4); /* section size must be multiple of 4 */ - USB_RAM_end = .; - } > SRAM_combined - USB_RAM_size = USB_RAM_end - USB_RAM_start; - - ETH_RAM (USB_RAM_end) (NOLOAD) : - { - . = ALIGN(4); /* section size must be multiple of 4 */ - ETH_RAM_start = .; - *(ETH_RAM) - . = ALIGN(4); /* section size must be multiple of 4 */ - ETH_RAM_end = .; - . = ALIGN(8); - Heap_Bank1_Start = .; - } > SRAM_combined - ETH_RAM_size = ETH_RAM_end - ETH_RAM_start; - - __malloc_heap_start = Heap_Bank1_Start; - __malloc_heap_end = __malloc_heap_start + 0x2000; - end = __malloc_heap_end; - __malloc_heap_size = __malloc_heap_end - __malloc_heap_start; - - /* .no_init section contains chipid, SystemCoreClock and trimming data. See system.c file*/ - .no_init ORIGIN(SRAM_combined) + LENGTH(SRAM_combined) - no_init_size (NOLOAD) : - { - Heap_Bank1_End = .; - * (.no_init); - } > SRAM_combined - - /* Heap - Bank1*/ - Heap_Bank1_Size = Heap_Bank1_End - Heap_Bank1_Start; - - ASSERT(Heap_Bank1_Start <= Heap_Bank1_End, "region SRAM_combined overflowed no_init section") - - /DISCARD/ : - { - *(.comment) - } - - .stab 0 (NOLOAD) : { *(.stab) } - .stabstr 0 (NOLOAD) : { *(.stabstr) } - - /* DWARF 1 */ - .debug 0 : { *(.debug) } - .line 0 : { *(.line) } - - /* GNU DWARF 1 extensions */ - .debug_srcinfo 0 : { *(.debug_srcinfo) } - .debug_sfnames 0 : { *(.debug_sfnames) } - - /* DWARF 1.1 and DWARF 2 */ - .debug_aranges 0 : { *(.debug_aranges) } - .debug_pubnames 0 : { *(.debug_pubnames) } - .debug_pubtypes 0 : { *(.debug_pubtypes) } - - /* DWARF 2 */ - .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } - .debug_abbrev 0 : { *(.debug_abbrev) } - .debug_line 0 : { *(.debug_line) } - .debug_frame 0 : { *(.debug_frame) } - .debug_str 0 : { *(.debug_str) } - .debug_loc 0 : { *(.debug_loc) } - .debug_macinfo 0 : { *(.debug_macinfo) } - - /* DWARF 2.1 */ - .debug_ranges 0 : { *(.debug_ranges) } - - /* SGI/MIPS DWARF 2 extensions */ - .debug_weaknames 0 : { *(.debug_weaknames) } - .debug_funcnames 0 : { *(.debug_funcnames) } - .debug_typenames 0 : { *(.debug_typenames) } - .debug_varnames 0 : { *(.debug_varnames) } - - /* Build attributes */ - .build_attributes 0 : { *(.ARM.attributes) } -} diff --git a/variants/XMC4800/startup_XMC4800.S b/variants/XMC4800/startup_XMC4800.S deleted file mode 100644 index 15c036a4..00000000 --- a/variants/XMC4800/startup_XMC4800.S +++ /dev/null @@ -1,440 +0,0 @@ -/********************************************************************************************************************* - * @file startup_XMC4800.S - * @brief CMSIS Core Device Startup File for Infineon XMC4800 Device Series - * @version V1.2 - * @date 24 Jan 2020 - * - * @cond - ********************************************************************************************************************* - * Copyright (c) 2015-2016, Infineon Technologies AG - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the - * following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list of conditions and the following - * disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following - * disclaimer in the documentation and/or other materials provided with the distribution. - * - * Neither the name of the copyright holders nor the names of its contributors may be used to endorse or promote - * products derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY,OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * To improve the quality of the software, users are encouraged to share modifications, enhancements or bug fixes with - * Infineon Technologies AG dave@infineon.com). - ********************************************************************************************************************* - * - **************************** Change history ******************************** - * V1.0,Sep, 03, 2015 JFT:Initial version - * V1.1,Jan, 05, 2016 JFT:Fix .reset section attributes - * V1.2,Jan, 24, 2020, Silence compiler warning - * - * @endcond - */ - -/* Silence "IT blocks containing more than one conditional instruction - * are deprecated in ARMv8" warning. - * - * XMC4800 is a Cortex-M4, which has an ARMv7E-M architecture. - */ -.arch armv7e-m - -/* ===========START : MACRO DEFINITION MACRO DEFINITION ================== */ - -.macro Entry Handler - .long \Handler -.endm - -.macro Insert_ExceptionHandler Handler_Func - .weak \Handler_Func - .thumb_set \Handler_Func, Default_Handler -.endm - -/* =============END : MACRO DEFINITION MACRO DEFINITION ================== */ - -/* ================== START OF VECTOR TABLE DEFINITION ====================== */ -/* Vector Table - This gets programed into VTOR register by onchip BootROM */ - .syntax unified - - .section .reset, "a", %progbits - - .align 2 - .globl __Vectors - .type __Vectors, %object -__Vectors: - .long __initial_sp /* Top of Stack */ - .long Reset_Handler /* Reset Handler */ - - Entry NMI_Handler /* NMI Handler */ - Entry HardFault_Handler /* Hard Fault Handler */ - Entry MemManage_Handler /* MPU Fault Handler */ - Entry BusFault_Handler /* Bus Fault Handler */ - Entry UsageFault_Handler /* Usage Fault Handler */ - .long 0 /* Reserved */ - .long 0 /* Reserved */ - .long 0 /* Reserved */ - .long 0 /* Reserved */ - Entry SVC_Handler /* SVCall Handler */ - Entry DebugMon_Handler /* Debug Monitor Handler */ - .long 0 /* Reserved */ - Entry PendSV_Handler /* PendSV Handler */ - Entry SysTick_Handler /* SysTick Handler */ - - /* Interrupt Handlers for Service Requests (SR) from XMC4800 Peripherals */ - Entry SCU_0_IRQHandler /* Handler name for SR SCU_0 */ - Entry ERU0_0_IRQHandler /* Handler name for SR ERU0_0 */ - Entry ERU0_1_IRQHandler /* Handler name for SR ERU0_1 */ - Entry ERU0_2_IRQHandler /* Handler name for SR ERU0_2 */ - Entry ERU0_3_IRQHandler /* Handler name for SR ERU0_3 */ - Entry ERU1_0_IRQHandler /* Handler name for SR ERU1_0 */ - Entry ERU1_1_IRQHandler /* Handler name for SR ERU1_1 */ - Entry ERU1_2_IRQHandler /* Handler name for SR ERU1_2 */ - Entry ERU1_3_IRQHandler /* Handler name for SR ERU1_3 */ - .long 0 /* Not Available */ - .long 0 /* Not Available */ - .long 0 /* Not Available */ - Entry PMU0_0_IRQHandler /* Handler name for SR PMU0_0 */ - .long 0 /* Not Available */ - Entry VADC0_C0_0_IRQHandler /* Handler name for SR VADC0_C0_0 */ - Entry VADC0_C0_1_IRQHandler /* Handler name for SR VADC0_C0_1 */ - Entry VADC0_C0_2_IRQHandler /* Handler name for SR VADC0_C0_1 */ - Entry VADC0_C0_3_IRQHandler /* Handler name for SR VADC0_C0_3 */ - Entry VADC0_G0_0_IRQHandler /* Handler name for SR VADC0_G0_0 */ - Entry VADC0_G0_1_IRQHandler /* Handler name for SR VADC0_G0_1 */ - Entry VADC0_G0_2_IRQHandler /* Handler name for SR VADC0_G0_2 */ - Entry VADC0_G0_3_IRQHandler /* Handler name for SR VADC0_G0_3 */ - Entry VADC0_G1_0_IRQHandler /* Handler name for SR VADC0_G1_0 */ - Entry VADC0_G1_1_IRQHandler /* Handler name for SR VADC0_G1_1 */ - Entry VADC0_G1_2_IRQHandler /* Handler name for SR VADC0_G1_2 */ - Entry VADC0_G1_3_IRQHandler /* Handler name for SR VADC0_G1_3 */ - Entry VADC0_G2_0_IRQHandler /* Handler name for SR VADC0_G2_0 */ - Entry VADC0_G2_1_IRQHandler /* Handler name for SR VADC0_G2_1 */ - Entry VADC0_G2_2_IRQHandler /* Handler name for SR VADC0_G2_2 */ - Entry VADC0_G2_3_IRQHandler /* Handler name for SR VADC0_G2_3 */ - Entry VADC0_G3_0_IRQHandler /* Handler name for SR VADC0_G3_0 */ - Entry VADC0_G3_1_IRQHandler /* Handler name for SR VADC0_G3_1 */ - Entry VADC0_G3_2_IRQHandler /* Handler name for SR VADC0_G3_2 */ - Entry VADC0_G3_3_IRQHandler /* Handler name for SR VADC0_G3_3 */ - Entry DSD0_0_IRQHandler /* Handler name for SR DSD0_0 */ - Entry DSD0_1_IRQHandler /* Handler name for SR DSD0_1 */ - Entry DSD0_2_IRQHandler /* Handler name for SR DSD0_2 */ - Entry DSD0_3_IRQHandler /* Handler name for SR DSD0_3 */ - Entry DSD0_4_IRQHandler /* Handler name for SR DSD0_4 */ - Entry DSD0_5_IRQHandler /* Handler name for SR DSD0_5 */ - Entry DSD0_6_IRQHandler /* Handler name for SR DSD0_6 */ - Entry DSD0_7_IRQHandler /* Handler name for SR DSD0_7 */ - Entry DAC0_0_IRQHandler /* Handler name for SR DAC0_0 */ - Entry DAC0_1_IRQHandler /* Handler name for SR DAC0_0 */ - Entry CCU40_0_IRQHandler /* Handler name for SR CCU40_0 */ - Entry CCU40_1_IRQHandler /* Handler name for SR CCU40_1 */ - Entry CCU40_2_IRQHandler /* Handler name for SR CCU40_2 */ - Entry CCU40_3_IRQHandler /* Handler name for SR CCU40_3 */ - Entry CCU41_0_IRQHandler /* Handler name for SR CCU41_0 */ - Entry CCU41_1_IRQHandler /* Handler name for SR CCU41_1 */ - Entry CCU41_2_IRQHandler /* Handler name for SR CCU41_2 */ - Entry CCU41_3_IRQHandler /* Handler name for SR CCU41_3 */ - Entry CCU42_0_IRQHandler /* Handler name for SR CCU42_0 */ - Entry CCU42_1_IRQHandler /* Handler name for SR CCU42_1 */ - Entry CCU42_2_IRQHandler /* Handler name for SR CCU42_2 */ - Entry CCU42_3_IRQHandler /* Handler name for SR CCU42_3 */ - Entry CCU43_0_IRQHandler /* Handler name for SR CCU43_0 */ - Entry CCU43_1_IRQHandler /* Handler name for SR CCU43_1 */ - Entry CCU43_2_IRQHandler /* Handler name for SR CCU43_2 */ - Entry CCU43_3_IRQHandler /* Handler name for SR CCU43_3 */ - Entry CCU80_0_IRQHandler /* Handler name for SR CCU80_0 */ - Entry CCU80_1_IRQHandler /* Handler name for SR CCU80_1 */ - Entry CCU80_2_IRQHandler /* Handler name for SR CCU80_2 */ - Entry CCU80_3_IRQHandler /* Handler name for SR CCU80_3 */ - Entry CCU81_0_IRQHandler /* Handler name for SR CCU81_0 */ - Entry CCU81_1_IRQHandler /* Handler name for SR CCU81_1 */ - Entry CCU81_2_IRQHandler /* Handler name for SR CCU81_2 */ - Entry CCU81_3_IRQHandler /* Handler name for SR CCU81_3 */ - Entry POSIF0_0_IRQHandler /* Handler name for SR POSIF0_0 */ - Entry POSIF0_1_IRQHandler /* Handler name for SR POSIF0_1 */ - Entry POSIF1_0_IRQHandler /* Handler name for SR POSIF1_0 */ - Entry POSIF1_1_IRQHandler /* Handler name for SR POSIF1_1 */ - .long 0 /* Not Available */ - .long 0 /* Not Available */ - .long 0 /* Not Available */ - .long 0 /* Not Available */ - Entry CAN0_0_IRQHandler /* Handler name for SR CAN0_0 */ - Entry CAN0_1_IRQHandler /* Handler name for SR CAN0_1 */ - Entry CAN0_2_IRQHandler /* Handler name for SR CAN0_2 */ - Entry CAN0_3_IRQHandler /* Handler name for SR CAN0_3 */ - Entry CAN0_4_IRQHandler /* Handler name for SR CAN0_4 */ - Entry CAN0_5_IRQHandler /* Handler name for SR CAN0_5 */ - Entry CAN0_6_IRQHandler /* Handler name for SR CAN0_6 */ - Entry CAN0_7_IRQHandler /* Handler name for SR CAN0_7 */ - Entry USIC0_0_IRQHandler /* Handler name for SR USIC0_0 */ - Entry USIC0_1_IRQHandler /* Handler name for SR USIC0_1 */ - Entry USIC0_2_IRQHandler /* Handler name for SR USIC0_2 */ - Entry USIC0_3_IRQHandler /* Handler name for SR USIC0_3 */ - Entry USIC0_4_IRQHandler /* Handler name for SR USIC0_4 */ - Entry USIC0_5_IRQHandler /* Handler name for SR USIC0_5 */ - Entry USIC1_0_IRQHandler /* Handler name for SR USIC1_0 */ - Entry USIC1_1_IRQHandler /* Handler name for SR USIC1_1 */ - Entry USIC1_2_IRQHandler /* Handler name for SR USIC1_2 */ - Entry USIC1_3_IRQHandler /* Handler name for SR USIC1_3 */ - Entry USIC1_4_IRQHandler /* Handler name for SR USIC1_4 */ - Entry USIC1_5_IRQHandler /* Handler name for SR USIC1_5 */ - Entry USIC2_0_IRQHandler /* Handler name for SR USIC2_0 */ - Entry USIC2_1_IRQHandler /* Handler name for SR USIC2_1 */ - Entry USIC2_2_IRQHandler /* Handler name for SR USIC2_2 */ - Entry USIC2_3_IRQHandler /* Handler name for SR USIC2_3 */ - Entry USIC2_4_IRQHandler /* Handler name for SR USIC2_4 */ - Entry USIC2_5_IRQHandler /* Handler name for SR USIC2_5 */ - Entry LEDTS0_0_IRQHandler /* Handler name for SR LEDTS0_0 */ - .long 0 /* Not Available */ - Entry FCE0_0_IRQHandler /* Handler name for SR FCE0_0 */ - Entry GPDMA0_0_IRQHandler /* Handler name for SR GPDMA0_0 */ - Entry SDMMC0_0_IRQHandler /* Handler name for SR SDMMC0_0 */ - Entry USB0_0_IRQHandler /* Handler name for SR USB0_0 */ - Entry ETH0_0_IRQHandler /* Handler name for SR ETH0_0 */ - Entry ECAT0_0_IRQHandler /* Handler name for SR ECAT0_0 */ - Entry GPDMA1_0_IRQHandler /* Handler name for SR GPDMA1_0 */ - .long 0 /* Not Available */ - - .size __Vectors, . - __Vectors -/* ================== END OF VECTOR TABLE DEFINITION ======================= */ - -/* ================== START OF VECTOR ROUTINES ============================= */ - - .align 1 - .thumb - -/* Reset Handler */ - .thumb_func - .globl Reset_Handler - .type Reset_Handler, %function -Reset_Handler: - ldr sp,=__initial_sp - -#ifndef __SKIP_SYSTEM_INIT - ldr r0, =SystemInit - blx r0 -#endif - -/* Initialize data - * - * Between symbol address __copy_table_start__ and __copy_table_end__, - * there are array of triplets, each of which specify: - * offset 0: LMA of start of a section to copy from - * offset 4: VMA of start of a section to copy to - * offset 8: size of the section to copy. Must be multiply of 4 - * - * All addresses must be aligned to 4 bytes boundary. - */ - ldr r4, =__copy_table_start__ - ldr r5, =__copy_table_end__ - -.L_loop0: - cmp r4, r5 - bge .L_loop0_done - ldr r1, [r4] - ldr r2, [r4, #4] - ldr r3, [r4, #8] - -.L_loop0_0: - subs r3, #4 - ittt ge - ldrge r0, [r1, r3] - strge r0, [r2, r3] - bge .L_loop0_0 - - adds r4, #12 - b .L_loop0 - -.L_loop0_done: - -/* Zero initialized data - * Between symbol address __zero_table_start__ and __zero_table_end__, - * there are array of tuples specifying: - * offset 0: Start of a BSS section - * offset 4: Size of this BSS section. Must be multiply of 4 - * - * Define __SKIP_BSS_CLEAR to disable zeroing uninitialzed data in startup. - */ -#ifndef __SKIP_BSS_CLEAR - ldr r3, =__zero_table_start__ - ldr r4, =__zero_table_end__ - -.L_loop2: - cmp r3, r4 - bge .L_loop2_done - ldr r1, [r3] - ldr r2, [r3, #4] - movs r0, 0 - -.L_loop2_0: - subs r2, #4 - itt ge - strge r0, [r1, r2] - bge .L_loop2_0 - - adds r3, #8 - b .L_loop2 -.L_loop2_done: -#endif /* __SKIP_BSS_CLEAR */ - -#ifndef __SKIP_LIBC_INIT_ARRAY - ldr r0, =__libc_init_array - blx r0 -#endif - - ldr r0, =main - blx r0 - -.align 2 -__copy_table_start__: - .long __data_load, __data_start, __data_size - .long __ram_code_load, __ram_code_start, __ram_code_size -__copy_table_end__: - -__zero_table_start__: - .long __bss_start, __bss_size - .long USB_RAM_start, USB_RAM_size - .long ETH_RAM_start, ETH_RAM_size -__zero_table_end__: - - .pool - .size Reset_Handler,.-Reset_Handler - -/* ======================================================================== */ -/* ========== START OF EXCEPTION HANDLER DEFINITION ======================== */ - -/* Default exception Handlers - Users may override this default functionality by - defining handlers of the same name in their C code */ - - .align 1 - .thumb_func - .weak Default_Handler - .type Default_Handler, %function -Default_Handler: - b . - .size Default_Handler, . - Default_Handler - - Insert_ExceptionHandler NMI_Handler - Insert_ExceptionHandler HardFault_Handler - Insert_ExceptionHandler MemManage_Handler - Insert_ExceptionHandler BusFault_Handler - Insert_ExceptionHandler UsageFault_Handler - Insert_ExceptionHandler SVC_Handler - Insert_ExceptionHandler DebugMon_Handler - Insert_ExceptionHandler PendSV_Handler - Insert_ExceptionHandler SysTick_Handler - - Insert_ExceptionHandler SCU_0_IRQHandler - Insert_ExceptionHandler ERU0_0_IRQHandler - Insert_ExceptionHandler ERU0_1_IRQHandler - Insert_ExceptionHandler ERU0_2_IRQHandler - Insert_ExceptionHandler ERU0_3_IRQHandler - Insert_ExceptionHandler ERU1_0_IRQHandler - Insert_ExceptionHandler ERU1_1_IRQHandler - Insert_ExceptionHandler ERU1_2_IRQHandler - Insert_ExceptionHandler ERU1_3_IRQHandler - Insert_ExceptionHandler PMU0_0_IRQHandler - Insert_ExceptionHandler VADC0_C0_0_IRQHandler - Insert_ExceptionHandler VADC0_C0_1_IRQHandler - Insert_ExceptionHandler VADC0_C0_2_IRQHandler - Insert_ExceptionHandler VADC0_C0_3_IRQHandler - Insert_ExceptionHandler VADC0_G0_0_IRQHandler - Insert_ExceptionHandler VADC0_G0_1_IRQHandler - Insert_ExceptionHandler VADC0_G0_2_IRQHandler - Insert_ExceptionHandler VADC0_G0_3_IRQHandler - Insert_ExceptionHandler VADC0_G1_0_IRQHandler - Insert_ExceptionHandler VADC0_G1_1_IRQHandler - Insert_ExceptionHandler VADC0_G1_2_IRQHandler - Insert_ExceptionHandler VADC0_G1_3_IRQHandler - Insert_ExceptionHandler VADC0_G2_0_IRQHandler - Insert_ExceptionHandler VADC0_G2_1_IRQHandler - Insert_ExceptionHandler VADC0_G2_2_IRQHandler - Insert_ExceptionHandler VADC0_G2_3_IRQHandler - Insert_ExceptionHandler VADC0_G3_0_IRQHandler - Insert_ExceptionHandler VADC0_G3_1_IRQHandler - Insert_ExceptionHandler VADC0_G3_2_IRQHandler - Insert_ExceptionHandler VADC0_G3_3_IRQHandler - Insert_ExceptionHandler DSD0_0_IRQHandler - Insert_ExceptionHandler DSD0_1_IRQHandler - Insert_ExceptionHandler DSD0_2_IRQHandler - Insert_ExceptionHandler DSD0_3_IRQHandler - Insert_ExceptionHandler DSD0_4_IRQHandler - Insert_ExceptionHandler DSD0_5_IRQHandler - Insert_ExceptionHandler DSD0_6_IRQHandler - Insert_ExceptionHandler DSD0_7_IRQHandler - Insert_ExceptionHandler DAC0_0_IRQHandler - Insert_ExceptionHandler DAC0_1_IRQHandler - Insert_ExceptionHandler CCU40_0_IRQHandler - Insert_ExceptionHandler CCU40_1_IRQHandler - Insert_ExceptionHandler CCU40_2_IRQHandler - Insert_ExceptionHandler CCU40_3_IRQHandler - Insert_ExceptionHandler CCU41_0_IRQHandler - Insert_ExceptionHandler CCU41_1_IRQHandler - Insert_ExceptionHandler CCU41_2_IRQHandler - Insert_ExceptionHandler CCU41_3_IRQHandler - Insert_ExceptionHandler CCU42_0_IRQHandler - Insert_ExceptionHandler CCU42_1_IRQHandler - Insert_ExceptionHandler CCU42_2_IRQHandler - Insert_ExceptionHandler CCU42_3_IRQHandler - Insert_ExceptionHandler CCU43_0_IRQHandler - Insert_ExceptionHandler CCU43_1_IRQHandler - Insert_ExceptionHandler CCU43_2_IRQHandler - Insert_ExceptionHandler CCU43_3_IRQHandler - Insert_ExceptionHandler CCU80_0_IRQHandler - Insert_ExceptionHandler CCU80_1_IRQHandler - Insert_ExceptionHandler CCU80_2_IRQHandler - Insert_ExceptionHandler CCU80_3_IRQHandler - Insert_ExceptionHandler CCU81_0_IRQHandler - Insert_ExceptionHandler CCU81_1_IRQHandler - Insert_ExceptionHandler CCU81_2_IRQHandler - Insert_ExceptionHandler CCU81_3_IRQHandler - Insert_ExceptionHandler POSIF0_0_IRQHandler - Insert_ExceptionHandler POSIF0_1_IRQHandler - Insert_ExceptionHandler POSIF1_0_IRQHandler - Insert_ExceptionHandler POSIF1_1_IRQHandler - Insert_ExceptionHandler CAN0_0_IRQHandler - Insert_ExceptionHandler CAN0_1_IRQHandler - Insert_ExceptionHandler CAN0_2_IRQHandler - Insert_ExceptionHandler CAN0_3_IRQHandler - Insert_ExceptionHandler CAN0_4_IRQHandler - Insert_ExceptionHandler CAN0_5_IRQHandler - Insert_ExceptionHandler CAN0_6_IRQHandler - Insert_ExceptionHandler CAN0_7_IRQHandler - Insert_ExceptionHandler USIC0_0_IRQHandler - Insert_ExceptionHandler USIC0_1_IRQHandler - Insert_ExceptionHandler USIC0_2_IRQHandler - Insert_ExceptionHandler USIC0_3_IRQHandler - Insert_ExceptionHandler USIC0_4_IRQHandler - Insert_ExceptionHandler USIC0_5_IRQHandler - Insert_ExceptionHandler USIC1_0_IRQHandler - Insert_ExceptionHandler USIC1_1_IRQHandler - Insert_ExceptionHandler USIC1_2_IRQHandler - Insert_ExceptionHandler USIC1_3_IRQHandler - Insert_ExceptionHandler USIC1_4_IRQHandler - Insert_ExceptionHandler USIC1_5_IRQHandler - Insert_ExceptionHandler USIC2_0_IRQHandler - Insert_ExceptionHandler USIC2_1_IRQHandler - Insert_ExceptionHandler USIC2_2_IRQHandler - Insert_ExceptionHandler USIC2_3_IRQHandler - Insert_ExceptionHandler USIC2_4_IRQHandler - Insert_ExceptionHandler USIC2_5_IRQHandler - Insert_ExceptionHandler LEDTS0_0_IRQHandler - Insert_ExceptionHandler FCE0_0_IRQHandler - Insert_ExceptionHandler GPDMA0_0_IRQHandler - Insert_ExceptionHandler SDMMC0_0_IRQHandler - Insert_ExceptionHandler USB0_0_IRQHandler - Insert_ExceptionHandler ETH0_0_IRQHandler - Insert_ExceptionHandler ECAT0_0_IRQHandler - Insert_ExceptionHandler GPDMA1_0_IRQHandler - -/* ============= END OF INTERRUPT HANDLER DEFINITION ====================== */ - - .end diff --git a/variants/XMC4800/system_XMC4800.c b/variants/XMC4800/system_XMC4800.c deleted file mode 100644 index 9f177755..00000000 --- a/variants/XMC4800/system_XMC4800.c +++ /dev/null @@ -1,748 +0,0 @@ -/********************************************************************************************************************* - * @file system_XMC4800.c - * @brief CMSIS Cortex-M4 Device Peripheral Access Layer Header File for the Infineon XMC4800 Device Series - * @version V1.0.4 - * @date 19. Jun 2017 - * - * @cond - ********************************************************************************************************************* - * Copyright (c) 2015-2017, Infineon Technologies AG - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the - * following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list of conditions and the following - * disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following - * disclaimer in the documentation and/or other materials provided with the distribution. - * - * Neither the name of the copyright holders nor the names of its contributors may be used to endorse or promote - * products derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY,OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * To improve the quality of the software, users are encouraged to share modifications, enhancements or bug fixes with - * Infineon Technologies AG dave@infineon.com). - ********************************************************************************************************************* - * - ********************** Version History *************************************** - * V1.0.0, 22. May 2015, Initial version - * V1.0.1, 26. Jan 2016, Disable trap generation from clock unit - * V1.0.2, 01. Jun 2016, Fix masking of OSCHPCTRL value - * V1.0.3, 09. Feb 2017, Fix activation of USBPLL when SDMMC clock is enabled - * V1.0.4, 19. Jun 2017, Rely on cmsis_compiler.h instead of defining __WEAK - ****************************************************************************** -* @endcond -*/ - -/******************************************************************************* - * Default clock initialization - * fPLL = 288MHz => fSYS = 144MHz => fCPU = 144MHz - * => fPB = 144MHz - * => fCCU = 144MHz - * => fETH = 72MHz - * => fUSB = 48MHz - * => fEBU = 72MHz - * - * fUSBPLL = 200MHz => fECAT = 100MHz - * - * fOFI = 24MHz => fWDT = 24MHz - *******************************************************************************/ - -/******************************************************************************* - * HEADER FILES - *******************************************************************************/ -#include - -#include -#include "system_XMC4800.h" - -/******************************************************************************* - * MACROS - *******************************************************************************/ -#define CHIPID_LOC ((uint8_t *)0x20000000UL) - -#define PMU_FLASH_WS (0x4U) - -#define FOSCREF (2500000U) - -#define DELAY_CNT_50US_50MHZ (2500UL) -#define DELAY_CNT_150US_50MHZ (7500UL) -#define DELAY_CNT_50US_48MHZ (2400UL) -#define DELAY_CNT_50US_72MHZ (3600UL) -#define DELAY_CNT_50US_96MHZ (4800UL) -#define DELAY_CNT_50US_120MHZ (6000UL) -#define DELAY_CNT_50US_144MHZ (7200UL) - -#define SCU_PLL_PLLSTAT_OSC_USABLE (SCU_PLL_PLLSTAT_PLLHV_Msk | \ - SCU_PLL_PLLSTAT_PLLLV_Msk | \ - SCU_PLL_PLLSTAT_PLLSP_Msk) - -/* -//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------ -*/ - -/* -// Clock configuration -*/ - -/* -// External crystal frequency [Hz] -// <8000000=> 8MHz -// <12000000=> 12MHz -// <16000000=> 16MHz -// Defines external crystal frequency -// Default: 8MHz -*/ -#define OSCHP_FREQUENCY (12000000U) - -/* USB PLL settings, fUSBPLL = 200MHz */ -/* Note: Implicit divider of 2, fUSBPLLVCO = 400MHz */ -#if OSCHP_FREQUENCY == 8000000U -#define USB_PDIV (1U) -#define USB_NDIV (99U) - -#elif OSCHP_FREQUENCY == 12000000U -#define USB_PDIV (2U) -#define USB_NDIV (99U) - -#elif OSCHP_FREQUENCY == 16000000U -#define USB_PDIV (3U) -#define USB_NDIV (99U) - -#else -#error "External crystal frequency not supported" - -#endif - -/* -// Backup clock calibration mode -// <0=> Factory calibration -// <1=> Automatic calibration -// Default: Automatic calibration -*/ -#define FOFI_CALIBRATION_MODE 1 -#define FOFI_CALIBRATION_MODE_FACTORY 0 -#define FOFI_CALIBRATION_MODE_AUTOMATIC 1 - -/* -// Standby clock (fSTDBY) source selection -// <0=> Internal slow oscillator (32768Hz) -// <1=> External crystal (32768Hz) -// Default: Internal slow oscillator (32768Hz) -*/ -#define STDBY_CLOCK_SRC 0 -#define STDBY_CLOCK_SRC_OSI 0 -#define STDBY_CLOCK_SRC_OSCULP 1 - -/* -// PLL clock source selection -// <0=> External crystal -// <1=> Internal fast oscillator -// Default: External crystal -*/ -#define PLL_CLOCK_SRC 0 -#define PLL_CLOCK_SRC_EXT_XTAL 0 -#define PLL_CLOCK_SRC_OFI 1 - -/* PLL settings, fPLL = 288MHz */ -#if PLL_CLOCK_SRC == PLL_CLOCK_SRC_EXT_XTAL -#if OSCHP_FREQUENCY == 8000000U -#define PLL_PDIV (1U) -#define PLL_NDIV (71U) -#define PLL_K2DIV (0U) - -#elif OSCHP_FREQUENCY == 12000000U -#define PLL_PDIV (1U) -#define PLL_NDIV (47U) -#define PLL_K2DIV (0U) - -#elif OSCHP_FREQUENCY == 16000000U -#define PLL_PDIV (1U) -#define PLL_NDIV (35U) -#define PLL_K2DIV (0U) - -#else -#error "External crystal frequency not supported" - -#endif - -#define VCO ((OSCHP_FREQUENCY / (PLL_PDIV + 1UL)) * (PLL_NDIV + 1UL)) - -#else /* PLL_CLOCK_SRC == PLL_CLOCK_SRC_EXT_XTAL */ -#define PLL_PDIV (1U) -#define PLL_NDIV (23U) -#define PLL_K2DIV (0U) - -#define VCO ((OFI_FREQUENCY / (PLL_PDIV + 1UL)) * (PLL_NDIV + 1UL)) - -#endif /* PLL_CLOCK_SRC == PLL_CLOCK_SRC_OFI */ - -#define PLL_K2DIV_24MHZ ((VCO / OFI_FREQUENCY) - 1UL) -#define PLL_K2DIV_48MHZ ((VCO / 48000000U) - 1UL) -#define PLL_K2DIV_72MHZ ((VCO / 72000000U) - 1UL) -#define PLL_K2DIV_96MHZ ((VCO / 96000000U) - 1UL) -#define PLL_K2DIV_120MHZ ((VCO / 120000000U) - 1UL) - -#define SCU_CLK_CLKCLR_ENABLE_USBCLK SCU_CLK_CLKCLR_USBCDI_Msk -#define SCU_CLK_CLKCLR_ENABLE_MMCCLK SCU_CLK_CLKCLR_MMCCDI_Msk -#define SCU_CLK_CLKCLR_ENABLE_ETHCLK SCU_CLK_CLKCLR_ETH0CDI_Msk -#define SCU_CLK_CLKCLR_ENABLE_EBUCLK SCU_CLK_CLKCLR_EBUCDI_Msk -#define SCU_CLK_CLKCLR_ENABLE_CCUCLK SCU_CLK_CLKCLR_CCUCDI_Msk - -#define SCU_CLK_SYSCLKCR_SYSSEL_OFI (0U << SCU_CLK_SYSCLKCR_SYSSEL_Pos) -#define SCU_CLK_SYSCLKCR_SYSSEL_PLL (1U << SCU_CLK_SYSCLKCR_SYSSEL_Pos) - -#define SCU_CLK_USBCLKCR_USBSEL_USBPLL (0U << SCU_CLK_USBCLKCR_USBSEL_Pos) -#define SCU_CLK_USBCLKCR_USBSEL_PLL (1U << SCU_CLK_USBCLKCR_USBSEL_Pos) - -#define SCU_CLK_ECATCLKCR_ECATSEL_USBPLL (0U << SCU_CLK_ECATCLKCR_ECATSEL_Pos) -#define SCU_CLK_ECATCLKCR_ECATSEL_PLL (1U << SCU_CLK_ECATCLKCR_ECATSEL_Pos) - -#define SCU_CLK_WDTCLKCR_WDTSEL_OFI (0U << SCU_CLK_WDTCLKCR_WDTSEL_Pos) -#define SCU_CLK_WDTCLKCR_WDTSEL_STANDBY (1U << SCU_CLK_WDTCLKCR_WDTSEL_Pos) -#define SCU_CLK_WDTCLKCR_WDTSEL_PLL (2U << SCU_CLK_WDTCLKCR_WDTSEL_Pos) - -#define SCU_CLK_EXTCLKCR_ECKSEL_SYS (0U << SCU_CLK_EXTCLKCR_ECKSEL_Pos) -#define SCU_CLK_EXTCLKCR_ECKSEL_USBPLL (2U << SCU_CLK_EXTCLKCR_ECKSEL_Pos) -#define SCU_CLK_EXTCLKCR_ECKSEL_PLL (3U << SCU_CLK_EXTCLKCR_ECKSEL_Pos) - -#define EXTCLK_PIN_P0_8 (1) -#define EXTCLK_PIN_P1_15 (2) - -/* -// Clock tree -// System clock source selection -// <0=> fOFI -// <1=> fPLL -// Default: fPLL -// System clock divider <1-256><#-1> -// Default: 2 -// CPU clock divider -// <0=> fCPU = fSYS -// <1=> fCPU = fSYS / 2 -// Default: fCPU = fSYS -// Peripheral clock divider -// <0=> fPB = fCPU -// <1=> fPB = fCPU / 2 -// Default: fPB = fCPU -// CCU clock divider -// <0=> fCCU = fCPU -// <1=> fCCU = fCPU / 2 -// Default: fCCU = fCPU -// Enable WDT clock -// WDT clock source <0=> fOFI -// <1=> fSTDBY -// <2=> fPLL -// Default: fOFI -// WDT clock divider <1-256><#-1> -// Default: 1 -// -// Enable EBU clock -// EBU clock divider <1-64><#-1> -// Default: 4 -// -// Enable ETH clock -// -// Enable MMC clock -// -// Enable USB clock -// USB clock source <0=> fUSBPLL -// <1=> fPLL -// Default: fPLL -// USB clock source divider <1-8><#-1> -// Default: 6 -// -// ECAT clock source <0=> fUSBPLL -// <1=> fPLL -// Default: fUSBPLL -// ECAT clock divider <1-4><#-1> -// Default: 2 -// Enable external clock -// External Clock Source Selection -// <0=> fSYS -// <2=> fUSB -// <3=> fPLL -// Default: fPLL -// External Clock divider <1-512><#-1> -// Default: 288 -// Only valid for USB PLL and PLL clocks -// External Clock Pin Selection -// <0=> Disabled -// <1=> P0.8 -// <2=> P1.15 -// Default: Disabled -// -// -*/ -#define __CLKSET (0x00000000UL) -#define __SYSCLKCR (0x00010001UL) -#define __CPUCLKCR (0x00000000UL) -#define __PBCLKCR (0x00000000UL) -#define __CCUCLKCR (0x00000000UL) -#define __WDTCLKCR (0x00000000UL) -#define __EBUCLKCR (0x00000003UL) -#define __USBCLKCR (0x00010005UL) -#define __ECATCLKCR (0x00000001UL) - -#define __EXTCLKCR (0x01200003UL) -#define __EXTCLKPIN (0U) - -/* -// -*/ - -/* -//-------- <<< end of configuration section >>> ------------------ -*/ - -#define ENABLE_PLL \ - (((__SYSCLKCR & SCU_CLK_SYSCLKCR_SYSSEL_Msk) == SCU_CLK_SYSCLKCR_SYSSEL_PLL) || \ - ((__ECATCLKCR & SCU_CLK_ECATCLKCR_ECATSEL_Msk) == SCU_CLK_ECATCLKCR_ECATSEL_PLL) || \ - ((__CLKSET & SCU_CLK_CLKSET_EBUCEN_Msk) != 0) || \ - (((__CLKSET & SCU_CLK_CLKSET_USBCEN_Msk) != 0) && ((__USBCLKCR & SCU_CLK_USBCLKCR_USBSEL_Msk) == SCU_CLK_USBCLKCR_USBSEL_PLL)) || \ - (((__CLKSET & SCU_CLK_CLKSET_WDTCEN_Msk) != 0) && ((__WDTCLKCR & SCU_CLK_WDTCLKCR_WDTSEL_Msk) == SCU_CLK_WDTCLKCR_WDTSEL_PLL))) - -#define ENABLE_USBPLL \ - (((__ECATCLKCR & SCU_CLK_ECATCLKCR_ECATSEL_Msk) == SCU_CLK_ECATCLKCR_ECATSEL_USBPLL) || \ - (((__CLKSET & SCU_CLK_CLKSET_USBCEN_Msk) != 0) && ((__USBCLKCR & SCU_CLK_USBCLKCR_USBSEL_Msk) == SCU_CLK_USBCLKCR_USBSEL_USBPLL)) || \ - (((__CLKSET & SCU_CLK_CLKSET_MMCCEN_Msk) != 0) && ((__USBCLKCR & SCU_CLK_USBCLKCR_USBSEL_Msk) == SCU_CLK_USBCLKCR_USBSEL_USBPLL))) - -/******************************************************************************* - * GLOBAL VARIABLES - *******************************************************************************/ -#if defined ( __CC_ARM ) -#if defined(XMC4800_E196x2048) || defined(XMC4800_F144x2048) || defined(XMC4800_F100x2048) -uint32_t SystemCoreClock __attribute__((at(0x2003FFC0))); -uint8_t g_chipid[16] __attribute__((at(0x2003FFC4))); -#elif defined(XMC4800_E196x1536) || defined(XMC4800_F144x1536) || defined(XMC4800_F100x1536) -uint32_t SystemCoreClock __attribute__((at(0x2002CFC0))); -uint8_t g_chipid[16] __attribute__((at(0x2002CFC4))); -#elif defined(XMC4800_E196x1024) || defined(XMC4800_F144x1024) || defined(XMC4800_F100x1024) -uint32_t SystemCoreClock __attribute__((at(0x2001FFC0))); -uint8_t g_chipid[16] __attribute__((at(0x2001FFC4))); -#else -#error "system_XMC4800.c: device not supported" -#endif -#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) -#if defined(XMC4800_E196x2048) || defined(XMC4800_F144x2048) || defined(XMC4800_F100x2048) -uint32_t SystemCoreClock __attribute__((section(".ARM.__at_0x2003FFC0"))); -uint8_t g_chipid[16] __attribute__((section(".ARM.__at_0x2003FFC0"))); -#elif defined(XMC4800_E196x1536) || defined(XMC4800_F144x1536) || defined(XMC4800_F100x1536) -uint32_t SystemCoreClock __attribute__((section(".ARM.__at_0x2002CFC0"))); -uint8_t g_chipid[16] __attribute__((section(".ARM.__at_0x2002CFC4"))); -#elif defined(XMC4800_E196x1024) || defined(XMC4800_F144x1024) || defined(XMC4800_F100x1024) -uint32_t SystemCoreClock __attribute__((section(".ARM.__at_0x2001FFC0"))); -uint8_t g_chipid[16] __attribute__((section(".ARM.__at_0x2001FFC4"))); -#else -#error "system_XMC4800.c: device not supported" -#endif -#elif defined ( __ICCARM__ ) -#if defined(XMC4800_E196x2048) || defined(XMC4800_F144x2048) || defined(XMC4800_F100x2048) || \ - defined(XMC4800_E196x1536) || defined(XMC4800_F144x1536) || defined(XMC4800_F100x1536) || \ - defined(XMC4800_E196x1024) || defined(XMC4800_F144x1024) || defined(XMC4800_F100x1024) -__no_init uint32_t SystemCoreClock; -__no_init uint8_t g_chipid[16]; -#else -#error "system_XMC4800.c: device not supported" -#endif -#elif defined ( __GNUC__ ) -#if defined(XMC4800_E196x2048) || defined(XMC4800_F144x2048) || defined(XMC4800_F100x2048) || \ - defined(XMC4800_E196x1536) || defined(XMC4800_F144x1536) || defined(XMC4800_F100x1536) || \ - defined(XMC4800_E196x1024) || defined(XMC4800_F144x1024) || defined(XMC4800_F100x1024) -uint32_t SystemCoreClock __attribute__((section(".no_init"))); -uint8_t g_chipid[16] __attribute__((section(".no_init"))); -#else -#error "system_XMC4800.c: device not supported" -#endif -#elif defined ( __TASKING__ ) -#if defined(XMC4800_E196x2048) || defined(XMC4800_F144x2048) || defined(XMC4800_F100x2048) -uint32_t SystemCoreClock __at( 0x2003FFC0 ); -uint8_t g_chipid[16] __at( 0x2003FFC4 ); -#elif defined(XMC4800_E196x1536) || defined(XMC4800_F144x1536) || defined(XMC4800_F100x1536) -uint32_t SystemCoreClock __at( 0x2002CFC0 ); -uint8_t g_chipid[16] __at( 0x2002CFC4 ); -#elif defined(XMC4800_E196x1024) || defined(XMC4800_F144x1024) || defined(XMC4800_F100x1024) -uint32_t SystemCoreClock __at( 0x2001FFC0 ); -uint8_t g_chipid[16] __at( 0x2001FFC4 ); -#else -#error "system_XMC4800.c: device not supported" -#endif -#else -#error "system_XMC4800.c: compiler not supported" -#endif - -extern uint32_t __Vectors; - -/******************************************************************************* - * LOCAL FUNCTIONS - *******************************************************************************/ -static void delay(uint32_t cycles) -{ - volatile uint32_t i; - - for(i = 0UL; i < cycles ;++i) - { - __NOP(); - } -} - -/******************************************************************************* - * API IMPLEMENTATION - *******************************************************************************/ - -__WEAK void SystemInit(void) -{ - memcpy(g_chipid, CHIPID_LOC, 16); - - SystemCoreSetup(); - SystemCoreClockSetup(); -} - -__WEAK void SystemCoreSetup(void) -{ - uint32_t temp; - - /* relocate vector table */ - __disable_irq(); - SCB->VTOR = (uint32_t)(&__Vectors); - __DSB(); - __enable_irq(); - -#if ((__FPU_PRESENT == 1) && (__FPU_USED == 1)) - SCB->CPACR |= ((3UL << 10*2) | /* set CP10 Full Access */ - (3UL << 11*2) ); /* set CP11 Full Access */ -#endif - - /* Enable unaligned memory access - SCB_CCR.UNALIGN_TRP = 0 */ - SCB->CCR &= ~(SCB_CCR_UNALIGN_TRP_Msk); - - temp = FLASH0->FCON; - temp &= ~FLASH_FCON_WSPFLASH_Msk; - temp |= PMU_FLASH_WS; - FLASH0->FCON = temp; -} - -__WEAK void SystemCoreClockSetup(void) -{ -#if FOFI_CALIBRATION_MODE == FOFI_CALIBRATION_MODE_FACTORY - /* Enable factory calibration */ - SCU_PLL->PLLCON0 |= SCU_PLL_PLLCON0_FOTR_Msk; -#else - /* Automatic calibration uses the fSTDBY */ - - /* Enable HIB domain */ - /* Power up HIB domain if and only if it is currently powered down */ - if((SCU_POWER->PWRSTAT & SCU_POWER_PWRSTAT_HIBEN_Msk) == 0) - { - SCU_POWER->PWRSET |= SCU_POWER_PWRSET_HIB_Msk; - - while((SCU_POWER->PWRSTAT & SCU_POWER_PWRSTAT_HIBEN_Msk) == 0) - { - /* wait until HIB domain is enabled */ - } - } - - /* Remove the reset only if HIB domain were in a state of reset */ - if((SCU_RESET->RSTSTAT) & SCU_RESET_RSTSTAT_HIBRS_Msk) - { - SCU_RESET->RSTCLR |= SCU_RESET_RSTCLR_HIBRS_Msk; - delay(DELAY_CNT_150US_50MHZ); - } - -#if STDBY_CLOCK_SRC == STDBY_CLOCK_SRC_OSCULP - /* Enable OSC_ULP */ - if ((SCU_HIBERNATE->OSCULCTRL & SCU_HIBERNATE_OSCULCTRL_MODE_Msk) != 0UL) - { - /*enable OSC_ULP*/ - while (SCU_GENERAL->MIRRSTS & SCU_GENERAL_MIRRSTS_OSCULCTRL_Msk) - { - /* check SCU_MIRRSTS to ensure that no transfer over serial interface is pending */ - } - SCU_HIBERNATE->OSCULCTRL &= ~SCU_HIBERNATE_OSCULCTRL_MODE_Msk; - - /* Check if the clock is OK using OSCULP Oscillator Watchdog*/ - while (SCU_GENERAL->MIRRSTS & SCU_GENERAL_MIRRSTS_HDCR_Msk) - { - /* check SCU_MIRRSTS to ensure that no transfer over serial interface is pending */ - } - SCU_HIBERNATE->HDCR |= SCU_HIBERNATE_HDCR_ULPWDGEN_Msk; - - /* wait till clock is stable */ - do - { - while (SCU_GENERAL->MIRRSTS & SCU_GENERAL_MIRRSTS_HDCLR_Msk) - { - /* check SCU_MIRRSTS to ensure that no transfer over serial interface is pending */ - } - SCU_HIBERNATE->HDCLR |= SCU_HIBERNATE_HDCLR_ULPWDG_Msk; - - delay(DELAY_CNT_50US_50MHZ); - - } while ((SCU_HIBERNATE->HDSTAT & SCU_HIBERNATE_HDSTAT_ULPWDG_Msk) != 0UL); - - } - - /* now OSC_ULP is running and can be used*/ - /* Select OSC_ULP as the clock source for RTC and STDBY*/ - while (SCU_GENERAL->MIRRSTS & SCU_GENERAL_MIRRSTS_HDCR_Msk) - { - /* check SCU_MIRRSTS to ensure that no transfer over serial interface is pending */ - } - SCU_HIBERNATE->HDCR |= SCU_HIBERNATE_HDCR_RCS_Msk | SCU_HIBERNATE_HDCR_STDBYSEL_Msk; -#endif /* STDBY_CLOCK_SRC == STDBY_CLOCK_SRC_OSCULP */ - - /* Enable automatic calibration of internal fast oscillator */ - SCU_PLL->PLLCON0 |= SCU_PLL_PLLCON0_AOTREN_Msk; -#endif /* FOFI_CALIBRATION_MODE == FOFI_CALIBRATION_MODE_AUTOMATIC */ - - delay(DELAY_CNT_50US_50MHZ); - -#if ENABLE_PLL - - /* enable PLL */ - SCU_PLL->PLLCON0 &= ~(SCU_PLL_PLLCON0_VCOPWD_Msk | SCU_PLL_PLLCON0_PLLPWD_Msk); - -#if PLL_CLOCK_SRC != PLL_CLOCK_SRC_OFI - /* enable OSC_HP */ - if ((SCU_OSC->OSCHPCTRL & SCU_OSC_OSCHPCTRL_MODE_Msk) != 0U) - { - SCU_OSC->OSCHPCTRL &= ~(SCU_OSC_OSCHPCTRL_MODE_Msk | SCU_OSC_OSCHPCTRL_OSCVAL_Msk); - SCU_OSC->OSCHPCTRL |= ((OSCHP_GetFrequency() / FOSCREF) - 1UL) << SCU_OSC_OSCHPCTRL_OSCVAL_Pos; - - /* select OSC_HP clock as PLL input */ - SCU_PLL->PLLCON2 &= ~SCU_PLL_PLLCON2_PINSEL_Msk; - - /* restart OSC Watchdog */ - SCU_PLL->PLLCON0 &= ~SCU_PLL_PLLCON0_OSCRES_Msk; - - while ((SCU_PLL->PLLSTAT & SCU_PLL_PLLSTAT_OSC_USABLE) != SCU_PLL_PLLSTAT_OSC_USABLE) - { - /* wait till OSC_HP output frequency is usable */ - } - } -#else /* PLL_CLOCK_SRC != PLL_CLOCK_SRC_OFI */ - - /* select backup clock as PLL input */ - SCU_PLL->PLLCON2 |= SCU_PLL_PLLCON2_PINSEL_Msk; -#endif - - /* Go to bypass the Main PLL */ - SCU_PLL->PLLCON0 |= SCU_PLL_PLLCON0_VCOBYP_Msk; - - /* disconnect Oscillator from PLL */ - SCU_PLL->PLLCON0 |= SCU_PLL_PLLCON0_FINDIS_Msk; - - /* Setup divider settings for main PLL */ - SCU_PLL->PLLCON1 = ((PLL_NDIV << SCU_PLL_PLLCON1_NDIV_Pos) | - (PLL_K2DIV_24MHZ << SCU_PLL_PLLCON1_K2DIV_Pos) | - (PLL_PDIV << SCU_PLL_PLLCON1_PDIV_Pos)); - - /* Set OSCDISCDIS */ - SCU_PLL->PLLCON0 |= SCU_PLL_PLLCON0_OSCDISCDIS_Msk; - - /* connect Oscillator to PLL */ - SCU_PLL->PLLCON0 &= ~SCU_PLL_PLLCON0_FINDIS_Msk; - - /* restart PLL Lock detection */ - SCU_PLL->PLLCON0 |= SCU_PLL_PLLCON0_RESLD_Msk; - - while ((SCU_PLL->PLLSTAT & SCU_PLL_PLLSTAT_VCOLOCK_Msk) == 0U) - { - /* wait for PLL Lock at 24MHz*/ - } - - /* Disable bypass- put PLL clock back */ - SCU_PLL->PLLCON0 &= ~SCU_PLL_PLLCON0_VCOBYP_Msk; - while ((SCU_PLL->PLLSTAT & SCU_PLL_PLLSTAT_VCOBYST_Msk) != 0U) - { - /* wait for normal mode */ - } - -#endif /* ENABLE_PLL */ - - /* Before scaling to final frequency we need to setup the clock dividers */ - SCU_CLK->SYSCLKCR = __SYSCLKCR; - SCU_CLK->PBCLKCR = __PBCLKCR; - SCU_CLK->CPUCLKCR = __CPUCLKCR; - SCU_CLK->CCUCLKCR = __CCUCLKCR; - SCU_CLK->WDTCLKCR = __WDTCLKCR; - SCU_CLK->EBUCLKCR = __EBUCLKCR; - SCU_CLK->USBCLKCR = __USBCLKCR; - SCU_CLK->ECATCLKCR = __ECATCLKCR; - SCU_CLK->EXTCLKCR = __EXTCLKCR; - -#if ENABLE_PLL - /* PLL frequency stepping...*/ - /* Reset OSCDISCDIS */ - SCU_PLL->PLLCON0 &= ~SCU_PLL_PLLCON0_OSCDISCDIS_Msk; - - SCU_PLL->PLLCON1 = ((PLL_NDIV << SCU_PLL_PLLCON1_NDIV_Pos) | - (PLL_K2DIV_48MHZ << SCU_PLL_PLLCON1_K2DIV_Pos) | - (PLL_PDIV << SCU_PLL_PLLCON1_PDIV_Pos)); - - delay(DELAY_CNT_50US_48MHZ); - - SCU_PLL->PLLCON1 = ((PLL_NDIV << SCU_PLL_PLLCON1_NDIV_Pos) | - (PLL_K2DIV_72MHZ << SCU_PLL_PLLCON1_K2DIV_Pos) | - (PLL_PDIV << SCU_PLL_PLLCON1_PDIV_Pos)); - - delay(DELAY_CNT_50US_72MHZ); - - SCU_PLL->PLLCON1 = ((PLL_NDIV << SCU_PLL_PLLCON1_NDIV_Pos) | - (PLL_K2DIV_96MHZ << SCU_PLL_PLLCON1_K2DIV_Pos) | - (PLL_PDIV << SCU_PLL_PLLCON1_PDIV_Pos)); - - delay(DELAY_CNT_50US_96MHZ); - - SCU_PLL->PLLCON1 = ((PLL_NDIV << SCU_PLL_PLLCON1_NDIV_Pos) | - (PLL_K2DIV_120MHZ << SCU_PLL_PLLCON1_K2DIV_Pos) | - (PLL_PDIV << SCU_PLL_PLLCON1_PDIV_Pos)); - - delay(DELAY_CNT_50US_120MHZ); - - SCU_PLL->PLLCON1 = ((PLL_NDIV << SCU_PLL_PLLCON1_NDIV_Pos) | - (PLL_K2DIV << SCU_PLL_PLLCON1_K2DIV_Pos) | - (PLL_PDIV << SCU_PLL_PLLCON1_PDIV_Pos)); - - delay(DELAY_CNT_50US_144MHZ); - -#endif /* ENABLE_PLL */ - -#if ENABLE_USBPLL - /* enable USB PLL first */ - SCU_PLL->USBPLLCON &= ~(SCU_PLL_USBPLLCON_VCOPWD_Msk | SCU_PLL_USBPLLCON_PLLPWD_Msk); - - /* USB PLL uses as clock input the OSC_HP */ - /* check and if not already running enable OSC_HP */ - if ((SCU_OSC->OSCHPCTRL & SCU_OSC_OSCHPCTRL_MODE_Msk) != 0U) - { - /* check if Main PLL is switched on for OSC WDG*/ - if ((SCU_PLL->PLLCON0 &(SCU_PLL_PLLCON0_VCOPWD_Msk | SCU_PLL_PLLCON0_PLLPWD_Msk)) != 0UL) - { - /* enable PLL first */ - SCU_PLL->PLLCON0 &= ~(SCU_PLL_PLLCON0_VCOPWD_Msk | SCU_PLL_PLLCON0_PLLPWD_Msk); - } - - SCU_OSC->OSCHPCTRL &= ~(SCU_OSC_OSCHPCTRL_MODE_Msk | SCU_OSC_OSCHPCTRL_OSCVAL_Msk); - SCU_OSC->OSCHPCTRL |= ((OSCHP_GetFrequency() / FOSCREF) - 1UL) << SCU_OSC_OSCHPCTRL_OSCVAL_Pos; - - /* restart OSC Watchdog */ - SCU_PLL->PLLCON0 &= ~SCU_PLL_PLLCON0_OSCRES_Msk; - - while ((SCU_PLL->PLLSTAT & SCU_PLL_PLLSTAT_OSC_USABLE) != SCU_PLL_PLLSTAT_OSC_USABLE) - { - /* wait till OSC_HP output frequency is usable */ - } - } - - /* Setup USB PLL */ - /* Go to bypass the USB PLL */ - SCU_PLL->USBPLLCON |= SCU_PLL_USBPLLCON_VCOBYP_Msk; - - /* disconnect Oscillator from USB PLL */ - SCU_PLL->USBPLLCON |= SCU_PLL_USBPLLCON_FINDIS_Msk; - - /* Setup Divider settings for USB PLL */ - SCU_PLL->USBPLLCON = ((USB_NDIV << SCU_PLL_USBPLLCON_NDIV_Pos) | - (USB_PDIV << SCU_PLL_USBPLLCON_PDIV_Pos)); - - /* Set OSCDISCDIS */ - SCU_PLL->USBPLLCON |= SCU_PLL_USBPLLCON_OSCDISCDIS_Msk; - - /* connect Oscillator to USB PLL */ - SCU_PLL->USBPLLCON &= ~SCU_PLL_USBPLLCON_FINDIS_Msk; - - /* restart PLL Lock detection */ - SCU_PLL->USBPLLCON |= SCU_PLL_USBPLLCON_RESLD_Msk; - - while ((SCU_PLL->USBPLLSTAT & SCU_PLL_USBPLLSTAT_VCOLOCK_Msk) == 0U) - { - /* wait for PLL Lock */ - } -#endif - - /* Enable selected clocks */ - SCU_CLK->CLKSET = __CLKSET; - -#if __EXTCLKPIN != 0 -#if __EXTCLKPIN == EXTCLK_PIN_P1_15 - /* P1.15 */ - PORT1->PDR1 &= ~PORT1_PDR1_PD15_Msk; - PORT1->IOCR12 = (PORT1->IOCR12 & ~PORT0_IOCR12_PC15_Msk) | (0x11U << PORT0_IOCR12_PC15_Pos); -#else - /* P0.8 */ - PORT0->HWSEL &= ~PORT0_HWSEL_HW8_Msk; - PORT0->PDR1 &= ~PORT0_PDR1_PD8_Msk; - PORT0->IOCR8 = (PORT0->IOCR8 & ~PORT0_IOCR8_PC8_Msk) | (0x11U << PORT0_IOCR8_PC8_Pos); -#endif -#endif /* ENABLE_EXTCLK == 1 */ - - SystemCoreClockUpdate(); -} - -__WEAK void SystemCoreClockUpdate(void) -{ - uint32_t pdiv; - uint32_t ndiv; - uint32_t kdiv; - uint32_t temp; - - if (SCU_CLK->SYSCLKCR & SCU_CLK_SYSCLKCR_SYSSEL_Msk) - { - /* fPLL is clock source for fSYS */ - if(SCU_PLL->PLLCON2 & SCU_PLL_PLLCON2_PINSEL_Msk) - { - /* PLL input clock is the backup clock (fOFI) */ - temp = OFI_FREQUENCY; - } - else - { - /* PLL input clock is the high performance osicllator (fOSCHP) */ - temp = OSCHP_GetFrequency(); - } - - /* check if PLL is locked */ - if (SCU_PLL->PLLSTAT & SCU_PLL_PLLSTAT_VCOLOCK_Msk) - { - /* PLL normal mode */ - /* read back divider settings */ - pdiv = ((SCU_PLL->PLLCON1 & SCU_PLL_PLLCON1_PDIV_Msk) >> SCU_PLL_PLLCON1_PDIV_Pos) + 1; - ndiv = ((SCU_PLL->PLLCON1 & SCU_PLL_PLLCON1_NDIV_Msk) >> SCU_PLL_PLLCON1_NDIV_Pos) + 1; - kdiv = ((SCU_PLL->PLLCON1 & SCU_PLL_PLLCON1_K2DIV_Msk) >> SCU_PLL_PLLCON1_K2DIV_Pos) + 1; - - temp = (temp / (pdiv * kdiv)) * ndiv; - } - else - { - /* PLL prescalar mode */ - /* read back divider settings */ - kdiv = ((SCU_PLL->PLLCON1 & SCU_PLL_PLLCON1_K1DIV_Msk) >> SCU_PLL_PLLCON1_K1DIV_Pos) + 1; - - temp = (temp / kdiv); - } - } - else - { - /* fOFI is clock source for fSYS */ - temp = OFI_FREQUENCY; - } - - temp = temp / ((SCU_CLK->SYSCLKCR & SCU_CLK_SYSCLKCR_SYSDIV_Msk) + 1); - temp = temp / ((SCU_CLK->CPUCLKCR & SCU_CLK_CPUCLKCR_CPUDIV_Msk) + 1); - - SystemCoreClock = temp; -} - -__WEAK uint32_t OSCHP_GetFrequency(void) -{ - return OSCHP_FREQUENCY; -} diff --git a/variants/XMC4800/system_XMC4800.h b/variants/XMC4800/system_XMC4800.h deleted file mode 100644 index 9b8de3da..00000000 --- a/variants/XMC4800/system_XMC4800.h +++ /dev/null @@ -1,107 +0,0 @@ -/********************************************************************************************************************* - * @file system_XMC4800.h - * @brief Device specific initialization for the XMC4800-Series according to CMSIS - * @version V1.0 - * @date 22 May 2015 - * - * @cond - ********************************************************************************************************************* - * Copyright (c) 2015-2016, Infineon Technologies AG - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the - * following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list of conditions and the following - * disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following - * disclaimer in the documentation and/or other materials provided with the distribution. - * - * Neither the name of the copyright holders nor the names of its contributors may be used to endorse or promote - * products derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY,OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * To improve the quality of the software, users are encouraged to share modifications, enhancements or bug fixes with - * Infineon Technologies AG dave@infineon.com). - ********************************************************************************************************************* - * - **************************** Change history ********************************* - * V1.0, 22 May 2015, JFT, Initial version - ***************************************************************************** - * @endcond - */ - -#ifndef SYSTEM_XMC4800_H -#define SYSTEM_XMC4800_H - -/******************************************************************************* - * HEADER FILES - *******************************************************************************/ - -#include - -/******************************************************************************* - * MACROS - *******************************************************************************/ - -#define OFI_FREQUENCY (24000000UL) /**< 24MHz Backup Clock (fOFI) frequency. */ -#define OSI_FREQUENCY (32768UL) /**< 32KHz Internal Slow Clock source (fOSI) frequency. */ - -/******************************************************************************* - * GLOBAL VARIABLES - *******************************************************************************/ - -extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ -extern uint8_t g_chipid[16]; - -/******************************************************************************* - * API PROTOTYPES - *******************************************************************************/ - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @brief Initialize the system - * - */ -void SystemInit(void); - -/** - * @brief Initialize CPU settings - * - */ -void SystemCoreSetup(void); - -/** - * @brief Initialize clock - * - */ -void SystemCoreClockSetup(void); - -/** - * @brief Update SystemCoreClock variable - * - */ -void SystemCoreClockUpdate(void); - -/** - * @brief Returns frequency of the high performace oscillator - * User needs to overload this function to return the correct oscillator frequency - */ -uint32_t OSCHP_GetFrequency(void); - -#ifdef __cplusplus -} -#endif - -#endif From ad40d04da73d9facbd4ed5dce19d757f49a67de4 Mon Sep 17 00:00:00 2001 From: Paul Carpenter Date: Fri, 29 Jul 2022 08:59:17 +0100 Subject: [PATCH 41/78] Change ANCIENT extensions to correct type One wire examples have ancient pde extension, change to correct ino extension for Arduino IDE chnaging to not opening pde by default --- .../{DS18x20_Temperature.pde => DS18x20_Temperature.ino} | 0 .../DS2408_Switch/{DS2408_Switch.pde => DS2408_Switch.ino} | 0 .../examples/DS250x_PROM/{DS250x_PROM.pde => DS250x_PROM.ino} | 0 3 files changed, 0 insertions(+), 0 deletions(-) rename libraries/OneWire/examples/DS18x20_Temperature/{DS18x20_Temperature.pde => DS18x20_Temperature.ino} (100%) rename libraries/OneWire/examples/DS2408_Switch/{DS2408_Switch.pde => DS2408_Switch.ino} (100%) rename libraries/OneWire/examples/DS250x_PROM/{DS250x_PROM.pde => DS250x_PROM.ino} (100%) diff --git a/libraries/OneWire/examples/DS18x20_Temperature/DS18x20_Temperature.pde b/libraries/OneWire/examples/DS18x20_Temperature/DS18x20_Temperature.ino similarity index 100% rename from libraries/OneWire/examples/DS18x20_Temperature/DS18x20_Temperature.pde rename to libraries/OneWire/examples/DS18x20_Temperature/DS18x20_Temperature.ino diff --git a/libraries/OneWire/examples/DS2408_Switch/DS2408_Switch.pde b/libraries/OneWire/examples/DS2408_Switch/DS2408_Switch.ino similarity index 100% rename from libraries/OneWire/examples/DS2408_Switch/DS2408_Switch.pde rename to libraries/OneWire/examples/DS2408_Switch/DS2408_Switch.ino diff --git a/libraries/OneWire/examples/DS250x_PROM/DS250x_PROM.pde b/libraries/OneWire/examples/DS250x_PROM/DS250x_PROM.ino similarity index 100% rename from libraries/OneWire/examples/DS250x_PROM/DS250x_PROM.pde rename to libraries/OneWire/examples/DS250x_PROM/DS250x_PROM.ino From 4978c74422dd58498c1f036274ef1d64f16a66f9 Mon Sep 17 00:00:00 2001 From: boramonideep Date: Fri, 29 Jul 2022 15:31:25 +0200 Subject: [PATCH 42/78] fixed some ADC channels and LED polarity --- .../config/XMC4200_Platform2GO/pins_arduino.h | 25 +++++++++++-------- 1 file changed, 14 insertions(+), 11 deletions(-) diff --git a/variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h b/variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h index 9c1c213c..967f4e5f 100644 --- a/variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h +++ b/variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h @@ -35,8 +35,8 @@ //**************************************************************************** #define XMC_BOARD XMC 4200 Platform 2GO -/* On board LED is ON when digital output is 0, LOW, False, OFF */ -#define XMC_LED_ON 0 +/* On board LED is ON when digital output is 1, HIGH, TRUE, ON */ +#define XMC_LED_ON 1 // Following were defines now evaluated by compilation as const variables // After definitions of associated mapping arrays @@ -125,8 +125,8 @@ const XMC_PORT_PIN_t mapping_port_pin[]= /* 17 */ {XMC_GPIO_PORT14, 6}, // A1 / ADC Input P14.6 (INPUT ONLY) X2-25 /* 18 */ {XMC_GPIO_PORT14, 7}, // A2 / ADC Input P14.7 (INPUT ONLY) X2-28 /* 19 */ {XMC_GPIO_PORT14, 8}, // A3 / ADC Input / AN_MikroBus / DAC0 P14.8 (INPUT ONLY) X2-33 - /* 20 */ {XMC_GPIO_PORT14, 4}, // A4 / ADC Input / SDA / AN1_2GO_1 P14.4 (Hardwired to SDA) X2-24 - /* 21 */ {XMC_GPIO_PORT14, 5}, // A5 / ADC Input / SCL / AN2_2GO_2 P14.5 (Hardwired to SCL) X2-30 + /* 20 */ {XMC_GPIO_PORT14, 4}, // A6 / ADC Input / SDA / AN1_2GO_1 P14.4 (Hardwired to SDA) X2-24 + /* 21 */ {XMC_GPIO_PORT14, 5}, // A7 / ADC Input / SCL / AN2_2GO_2 P14.5 (Hardwired to SCL) X2-30 //Additional pins for port X1 starting here /* 22 */ {XMC_GPIO_PORT1, 1}, // PWM_MikroBus P1.1 X1-12 @@ -225,14 +225,17 @@ const uint8_t NUM_ANALOG_OUTPUTS = ( sizeof( mapping_dac ) / sizeof( XMC_ARD_DAC XMC_ADC_t mapping_adc[] = { //Result reg numbers are now equal to channel numbers - {VADC, 0, VADC_G0, 0, 0, DISABLED}, - {VADC, 1, VADC_G0, 0, 1, DISABLED}, - {VADC, 2, VADC_G1, 1, 2, DISABLED}, - {VADC, 3, VADC_G1, 1, 3, DISABLED}, - {VADC, 0, VADC_G2, 2, 0, DISABLED}, - {VADC, 1, VADC_G2, 2, 1, DISABLED}, + {VADC, 0, VADC_G0, 0, 0, DISABLED}, //A0 + {VADC, 6, VADC_G0, 0, 1, DISABLED}, //A1 + {VADC, 7, VADC_G0, 0, 2, DISABLED}, //A2 + {VADC, 0, VADC_G1, 1, 0, DISABLED}, //A3 + {VADC, 0, VADC_G1, 1, 0, DISABLED}, //A4 + {VADC, 0, VADC_G1, 1, 0, DISABLED}, //A5 //Additional ADC channels starting here - {VADC, 6, VADC_G2, 2, 6, DISABLED}, + {VADC, 4, VADC_G0, 0, 3, DISABLED}, //A6 + {VADC, 5, VADC_G0, 0, 4, DISABLED}, //A7 + + {VADC, 6, VADC_G2, 2, 6, DISABLED}, {VADC, 5, VADC_G2, 2, 5, DISABLED}, {VADC, 3, VADC_G2, 2, 3, DISABLED}, {VADC, 7, VADC_G1, 1, 7, DISABLED}, From 7014bf58a9099196f18d17a99d54b90abf3108d4 Mon Sep 17 00:00:00 2001 From: Paul Carpenter Date: Sat, 30 Jul 2022 00:17:39 +0100 Subject: [PATCH 43/78] Wiki extra docs update Extra Docs for XMC4400 and XMC4700 X1 and X2 pinouts. New XMC1100 Boot Kit pinout image --- .../circuit/UNOFFICIAL-XMC1400_TSSOP38.pdf | Bin 0 -> 93421 bytes resources/readme.md | 16 +- .../Pictures/PNG/XMC 1100_BootKit_V1_2_0.png | Bin 0 -> 660992 bytes .../Pictures/SVG/XMC1100_BootKit_V1_2_0.svg | 6496 +++++++++++++++++ .../wiki/Pictures/XMC 1100_BootKit_PO.jpg | Bin 0 -> 251809 bytes resources/wiki/xmc4400-X1-X2.csv | 74 + resources/wiki/xmc4700-X1-X2.csv | 4 +- 7 files changed, 6587 insertions(+), 3 deletions(-) create mode 100644 resources/circuit/UNOFFICIAL-XMC1400_TSSOP38.pdf create mode 100644 resources/wiki/Pictures/PNG/XMC 1100_BootKit_V1_2_0.png create mode 100644 resources/wiki/Pictures/SVG/XMC1100_BootKit_V1_2_0.svg create mode 100644 resources/wiki/Pictures/XMC 1100_BootKit_PO.jpg create mode 100644 resources/wiki/xmc4400-X1-X2.csv diff --git a/resources/circuit/UNOFFICIAL-XMC1400_TSSOP38.pdf b/resources/circuit/UNOFFICIAL-XMC1400_TSSOP38.pdf new file mode 100644 index 0000000000000000000000000000000000000000..17bf53c5f2268f16b7d2bbce819679398fc3dc0c GIT binary patch literal 93421 zcmd41bySpX+dhh-Qqt1h-7qvrONn%M!@y8Ohf>lYEh*hYcS(0QNJ@A2z#e_x=lkBZ ze{1c%|J-ZVa9?rud0ufJ1I;H%X%-GvZe$K}c5;x34YH6BGMk#U3(%aL{^=P`9quEX z5}Y*bBMT=1`-;ISz_Gw-!70Le9B|xl?68j^oEn@e?4tzt362Yn4~`Yi8O{{WiUFBT z!pYp&1?2Qsk`#>m*vu(6LYW?Ps-mY#xAg^N(ykYb8@ota`JO>@bI#8 zG9ZhHAe-Bp{Ruwje<#7i!JM2;!q~+a2(pBEWo&8gOwI)(Q28$g?*D^9%H2gq)di*r znN3xU+{Fp}r=dvB&dSb-%w}p#&cVtKON`h*Pcd0latmXi^IsZcXIpZ%k05*V|Fwtb zKjL*^>RnvSo$SfkB+Xr|P0dwg#P$C*8t{ME@W<9a7CV{SyZpywHVKfu3#{u*&iB^^ zHWhPc5ZK8S<`W0|KO-1P4RjOc%3_}8C5R_c=fPsskn;9tWP z%K|keT@(SlvE$I|QKu0bOc-El%yMk+N-E?oU zCH_mUGzp=*JK4F@D={MMDD8!qA(@?N<B5GaAMcXuWS|N)>uG*YzAP zGW+ax`xsr2d=^q96Q=e%q)bMLzi)<$Vhxim>Xjq)EESn3NLc9|uSSq*1b+`GY*p)w zTl3fAyQmI?t#$@q(;nz|;%KQeD?OwRot)^2L^4Ypw&&4e-KSQ?f%M9J9ai5i#jY-QJ=DH2qjEpj)-_lG$(DMAa^mLR4kGL3h6x%QBMK)){*_i>Dl+ zOG+RC*iHg!1ColnRMsXVE3bb%@+`rju!TwmZAF?zl=4-jMkdt7*KBobbDeAnuQF!k znO;#tGxF}J(S!0Nu-kPa1oWomT~l6M@ax5{NE-WW1n}!VYg-OsEd&c|d{~cBw-80t zXZ9_MpxH9f5dC#T?Yw@!;RcQxL>7`?$|L5vYXf`6=2m@7ML&ncfIVG%G{{`MP2b1y zca%~NR9NOjFsoEIA8YGPJd&65P1ri^nj5|?O<8qu(G+jajiP;UOaIy0v|nX66ZASS zK_p;;u(H=iWs-{QnyEUJgh{70#MvN|gpcHMg3hqF$4#wH&(GTCur-;`OA41vI&DT% zby2TsrrRZ0;m6X*M$f6@SV}U;l+tb zvK8I~lGJh4Oe}!BVkr{i;Gmb6q3hTgwhERAw53&PEDcr0OYO?mTBHqCw2rPu8#5JY z3O$v_Ij%L9OW?SXVa|=g!~q^t1PE{&lY$l)k#=ODE?-D(av4?upQ+_N<=&{NJd<9z z0?-{{rV?3iY(+q#JzQ}L=cR+-YzzuOxJ+OoOKS@Z__w(_=!D#EBa$n;hSr?b_*Kdg zA;3>*B+2eG%+;KSgK&5f^b$4Ud2gGOyP8=ify3p)j7!r25gf%Jid&z?A$!95$sG6*c&>G&E;&y1V2%n5oMHbC&KXjgPuDrKo~> zmD+;AFja_Cl?<=NraAVqzdP2&Ci^}%L%ySQk5a#(DT$7RkALXnXlz@12-ODhcQwm` zv4tR0PR|FZNs(yZp`P-w?TT;a5j&e5UA+hIvS0>r%Atl*-MOXZ0Lw+)(0W=wLmk1B z7-V`=n@f{UcRNn;egJ1ndlu!y(sQ7C7O3cHmA#+4KKvj%Kj}SZfO*mtxm{<$S#e0 zubx;hvM}28GgVX1E~)xOF3>g=-mWa}pzfg03DC${u|@}wX>S*TLiZk4ndwq0k+I9Z zWW0NYJ6cK2O@V>-UI{-=RWj-;M>h*PC{Ad5W#io3f z1Hlj6p5{g!O28=Jc8-ZslAhh^jt|K4#fewUNOsf-MPI(Lf3I;)siksoXw?t+;mb8C zh|!Q}g{n0Rp?O`?MIDiA!}G6hAXeIX6St^vGX*a8Nd9{TYJ*tdq|ijlYK#?tI>QQp zzaoUM5d20ue|(lFL1$Ggdx8l*)m@C**YE?kD8o9M#uNVxA!*AA;_P)uy;xDiK|GDS zY3oL*W^80sHIeiz)2OGEHa4H_OLKLy3wKG>BW-i5mH--e6AwH#@(9E;W`o|kgSUxm z7p*@RvT!=EY514MKgF(vj;1YJC&)8M7P)frV#QNhW;EmM5G8h$c$RndVv!d-Xb@}+ z2HO!$EVMBMHP|zCY7V{$$FHL%sgA&37zuAnFS1(tK?}U$*Y1Oa<7)$T1GDW^EtpN_ zU4GS-mJ$&q!c&D~Qb-SVmwZv`LNUYa+Rn60#H0#0pb)9Ny|2s8Ph?uGW?7ju_U+9F zTum2cwcS~cJ4xiQbbxg^0tuFwlc+5clG;c*~MvMrYzfSMKJR|!T=M1 zKPUijJ=wr9@aXmAHU2vGZHCzYKuz{yMMh7%s~nbG4=vPkW26gt#_sUQ3$Y*sGN?S&Q`M zrO5_P)kjraO8W2pl#KY=(|_cOh{J5q;4i*_Y;S%@7|ytPxiM%nrmgruZw{e0=|rQ! z#2%7h>h5MTYs~^~%27(Yl7Td_n6orOCYU;Hl)$431Ep3xLlwkCI+%Leh1vQ{{@-X4 z5u}H@nEYWS(>ZCAs6P42X>!_W@>fZ2k!FkM&XKOI6~TDM(V30G0c^A0o|96TUwL?i zJ=A)GL~DRLJ1+1&()0q=pDDFrEQEKK@tDh`^BPD8a{-eA0zAc=x3HEB#MeGF>~_~5 zM(r+qW32y!nM}2+R!#Q6JG{i<*Tk#^=8<=@#e*lH97bf5%BS@9wuZ_~h!Y&JvWqHD0dUiYQqAMsOns z6FlTqu0rzCQ#U#Bhj}-hkf!;HhI!{POSHS2jub?l1v8KYzm+mkpVFX%JlKw_g2mwd zJg%d8z;8R)xv1}g;ku@}EbchX+0h?mK#tGyHGKDo*?$36G7-B8a8T4Gs;RtF7fmovrkyy$#&CE~WZYLyom+3s89nbNCx%4o@lO zxw1x5wjaVv zy3w-(O4wA?ECAbcxJ@uwCtT$Vvs%hn5L{!GGwDHf))Brytx< zC73CELD2GkXhM4uDoYslA4f3$ZQOjS+nHn+vBGn$JBI=FfES)-pY- z)Ux^|Y=xg;MI?UJc$L`;Vi~J48aO+6(+4?lo4Yz}Y7P;P{y;NYESWH@Fu=)Us$)J< zJE&7Zo&7}#oI1-UzJ-;FAP={Cj?CvouB*Z65hU0e zhAr(7B`YMV4V|rY!Y*`^g%iloLPN8?S>o^GrZkd7ndJ9b) zQOxeE+M1g5Rts}>DQ1h_A1p`F^cDyijA4ejjHsBx?sZ&gc4q*2F~^~-XHHIilMWSy zUrrr?Bj2j|V-K=5LX=TE(Y(dC&Tnm`(%q6?mD{#|veYOV27Hmy(++`K_`-y8mQu;a z&Tg!~Q7S*}g!sz|aheI1CF55EXCbjvz+SrFZ={D7PThH7JCdtWM2HsTU=#9&9Jn-p z> zjX|B2_7Eh&dpwS_;_6Bts#2+V?335s38+E_-TheQFC+1ozlC58>}>ZKAwfz_VM|FX zqJP32cJNp@CGo_cF?4?6#Rc4aB~-56Pe%+Fu|1(DLWNy$4?_^okXR@LPeb*;R(0+4 z9~=532~vtjBqAN8o6(KoTa-U?cxn1Q+r$glBR!~#N`ktX`W6GUHbWve(t`Tdm$2zH zTDBQO=^&dDmzT!gckXT8mj?G#%)0IrG9U3MXDl<0O`tZadz!Et-^razlGoNcG%V=wZrZ`Df zZk7wn->y~#Xdti2G0F`w74cQJuwRx^cbWb8*7MvY-WX8uW2&dKjXl>u6Dw~_I==>3 zJC4VM9gvr0nMGggM#Og~QV=dNUya|{T}!L_x+t2s4bR0_LYrKeZy+;hU`B<&@bq*p z%^RZdki_XN7I`h+I;7f6w6(rzfLlh(U#H@SOPh$DZthp6@M-JS@8UGW;#Q`il9GJ0 zc8e(eBxO!yubif{VDB~|79?pB_3M)+-OK%&&F4M)pXE*a+T))L4hErL5=cn3^EZ#G zIkgPcbx!6A=E@@M^Y=S#+&Iljt>}lgJ1YcNsxR{e-K@uxY+AC~`%$ESi|3*YWhbP6 zANb5Vs{K7zpI2+urXgNXNFMt(D2!Wsv|lJ5=e-6Ne^~`$2EP*r3skb}F|SnsPpv;<4P8JscRs&k{+TX8dSSgt46xHi_91Q*?A z$_vRG5JJDubuG;7anw@4;mN(1db;7m5bZrc*fF2VyI3g$MqT@M z={|}r@Xk$b={LyGx!~}b@fP)@pE8Ry`$ck?g(_zsXP`Yu(i3B1a#=C}PZ=<=sLNoP z{n~C2@w>P?@r1q0gOcRXN-zcC=OU|t;G>fmvuD0+;Z;TMGE)UD?iV8^Daedu>ONwp zru`P8D@uU+)-{j*H&(2vvIb;j*Vo2oUX7W+thW5Tp+AF~3#6@nX&lq(57jagI(`ar zq6&?T3uG2)=5XH=uVi&>Kp47;*$d6r>V6RoI=~XAwfuu~@r5eF)u+XkdN6;;tj0F^ zqKn-}$%i@ss1c>a8N;qgWL0vCe6jw@qZzt{+`8Ia%_H#bsAFz-6LME4O-J+04X{`> zcpPvAmOp~U&|Hn}RzjWSo%4<=6}UDYo{&y%3{nD2D%dj_r02HKv**+2wtnE34qApy zNZkd{yY5Kw)4!2F|8C+U^+X=F>?MU3TYGg|6Z>uJ*3`=NX3Kr*E$(mCk$#;=G4AFY zofhjiOlL(FW)x5ODP_#vWK>vn7^082mxjE^!aFd0_&*Tfe~{uoaN!>Wk%xnW>t7(2 z{td$a4U6UY z2l{3Ee*xWP>QHD4o=giX%!5mRtSLXmH+1DZA}wJ|+1<+gF}4pUJ6W-uR-lkUFFZ8oOeV)pX{(!PsYrN+Kep6Vt^@dGy#j7qgvuv_^;`DZS zN9x1m_G7s^EsWVk$$I8@WPZ;uHApyTwvo_-%;zPxtLx_kv*)?jh(WkNVb5UP4 z$nz1=;N=UNv#jq}uMdEy;UmiJQU#aUH7FMKMs68y=JOsa-)!mP5Jc|#R(+vUhNjAy z9uG^;&|r^;o7=fn`}Tdq=d&X}#;f7SF_7N_TYFg415wU?D#mUk_<(mivtYIRiYTbP zGSQE#b>UXA8056U>!*R5%o`Cf(WWh%j7N*j~jjUeE;)0a)F+^1|8{4Cd7YgIDw|0wSQc{>xU zl>c_oe=3Oult9}$3~E!)%uR}`rDdi_2Ck?m|HQKUc&$Ce(Cik*ph@GNg94n zJ}O^I6lf;xTNpS_Tbhjz&-3)!%J!{h#7PZ%DmYrqXbtOS7LkJ21<5fbMzWahmDudp zCvI3SZ>b=q9-9=U3|N4dX#!TOsyK~w)mEMAJLsZw$y8<7fMU<%*z0r#a2FXDl#WA%_5E_w< zA$O%X)djXuYACW-3iC16rOANJBJVtI({L-VjgAV3-{D90qU=?x$<$ejlAc=^edyE2 zYC<&v46QiDr|*Leq6x~D>**-H31|6(@(!bhbFC!Sgx5{f;;N%~iXN$xQ^#JndWw50 zTWLcS34NToE){jo+KSNG7*6y0cucwwtG|an}WU{ zJZ~{wb+ruBw3zqh=4PfrHNgO@`r9=4TX)0#9JKW&z*XgyGBeqXB7yn5S$RqGYGqZS zx>m%%N<04+x59nHfhY9tP-aP-0T+~-zvMxG zH9awt^Y&}v7x{4|g^xYFzhezlCbzAZ@@`zQ>U~(;ZhGtw0U54ab(DOKN^UFPgife4 zwybH_>EM&w!D9n^g~Qo$P|w9qAEUX+miD>?NU71(=yIb!iFGV5;dv3(D8g2h+HGrV z3#Nv91n1yWX;5o*$s1hvDpd@bO`L*ki`2#1W?8p^z-;#9*!ziP?d4GY9JUIgvwn#3 zPJzG!%Qap8BxWRkOSb{1aP1doer>&{@x^89mhHH;)hu>wAg0(?bK+Yc^Iu@zRMHfx zj2!NfJSXz>)=HPEwWX@jGo0cv*!z1hzI-N&Wa>&pZ6*Fr0$u&Kkr82%r4(Oic>#bI4eT}X{ItO+k(V$OL4v{RoC)V z_{ZX1njI8S*u&a!ZukW2EYr<)M}C^@7!m7+L^kTEPaC?(>@cC*Xh+*;CbC&5F5ymq zYaaAU6XX$1T$7reGpgsgokB<5-i0rhTCsaBszv@842_uqKcM%P4jGwpovzdzLNTX) zH7*Mhik!%Yj(?SB+)BdlBSkDaTllR7@0D*7j4>tJtbKfwvhdKQ@w*4X(qQ00G?EN~ zEF0K=j3e$$jMQ0OxhK3?v8P)^v7$SmdjtDjCvyl zyA^4nQ|n8ClK`8G90Onj-{DaJ05X#GBM z4GY>~+%w4fM7Z&Ko3&i9zKVlYpz61erW?mS4eqy@*1OMRBY$qxyb z4W27TE+;nYqiKFq;{E1E76}t$OSYa$D6S_~La!F}!z_o`l&M^yFKyRf+jM8bC~<7M z4OeeaXpVXaZ8LaJN4#{berGq=Iry*~zR`Ca{od2Los`>ZD2{gQ(fYf&8Gl=S4c@0r ze>s%s5hD7O9>7PYBO4|t!A7D!DnGbY&F|hExHbir5I7{v5R$6p6QISybBtYm-=r&fv%keBd1Q9 zlfO-^gzXIr`PZq)bqoi;vznEy&AC9u#`8i`?~RMm zOfyxlq!r{;r-}>mAiCpg(zJfjh0OED`FOu=#YWhyAj-?hd~c7Mj)#MN`>uSn+aj&| z-9=Am%TkhPU;Z^Nah_t(q)h#&@EOfM`uwy(=KFayMxV=Am$qa7p#VT_wHciqqk(Uw zO;`T){j1J=r@fpK;3OE&g{-=0nWMU*=zuL4^oQ@W9V4TA#C<1p7y&wMk6~CFY2<=*KJj9D~CY^SbzlXZm9uA15G!g3tTT-g3f%C$|8K9mSgWxpeoDH zg=JnDAR{9RuXfSjEL=bGf(}L&i)e~-GhMH@Q$Ytlehvxx1bVM;hB@@fc4LOqBW3EY zEG!RWy*cM*mV@(GK#Wyv5=BNEwstt8CaNb&JQgQmiVL?Yx;;0raw*b!^HEIrqG&{^ zs_2Fe*BP-Vzs9eqYy%-!mVW`RKCEq4MrIA$-<~ z0;`h~CBkjJU|Ehuy0+P~7pb0pHad89CTgPw^$=kT)d$tU74B5VCZ_buUAC5yr|#Ig z8U|efH3MNs>PPf6%9fpk8qT~2HG$2!G9S9Sl@BQXwQp0|et8LSQ1ICnyOUP^P-CVq zWK!xoaVLi74U*m=$<2z>ImBkG@VyvlOOFbSW}G>~zE&jCF9r^*gHauGs5r(H$TAL5 z7X9yv3&W4qin;-Y4cLHko?~!DuHs%AJTS^@(FUpwsC7%vs$fV@*H3fB%Xpt*XJh%& zqoU{)Z}_6i@|QJO3FEmKE~+uYlUhQVjwpW#4sp!CV>TjsZlMSi8OnF1t$mZ~{~EZ% zCUn=fUf>!WO#A*bX6ibp@{zpXVD95orT}0;Q?JQC-~kypnD7)ogm-=BCH%R=-#Ye#T(j${zYU1!Sf;fY zm$dpvtHG9$*xZTTN$u98|32~O^SR}k^B?Go2NH59O^?Js?R8n15iMz_Y^AgWHv+Ej zV>@Sh(dR4e8D}^(6@DYu^+B2;TYhV?gLvbe$31~Sl)31Rc0YBxrA`zp;}g%`4OD1$ zY#4}jXAMft0SFR z9L3>iDO)0J?kcGnN}m;^CRD(>3HFNn+tF&tf&I5j18*Z<7=ml<-8)74mCDv@_+;On*R|c%7-``C(_{Tu z_~?G9QgMr|TeN;v+a$@V3A+4#&uW64?xHX%hYzdwSw|aTnx?$0M#&`ETkA?zJ$KRN zHbN)H*&kFuevcQnADV3{dI%#}NPcKm1h>Xv4HotkePVv!mxi0S9JCYf>h?g?00a~f z8)g}{2&%lT(bHD~_xb5w2y%ZE>p`FWQ|f zhp%PWalji=H2+NgBni)IS)8jk7u`uZJ|A~HK<5&>qd11`T4b4gI#WBl_M-7J)`X?u zO}nG}le*_)#3=W1X&Wn&;d72ij2;z&x-OQ#v6X~C4W* zU|vwVhr_A!|1Q zXm~?zZWqU%TkFQrY8+TQATPJF#aoaQ3_przkY#wXwV)>P!Es=)0p&*OTDoXf>>UW5 zi@t-P;nkx@j>>bFN!GDql6%9uy4yt+^2UfxCzbUk`#RgWu_c>&OEWo^#m0C8W3v8Z z!Wj81Zc(I<3xulDNh`ZMk%EuD4_st~QWp)_dwPX(TQp{>%=z4lNG2LP2gNpX`~e+> zMsj`xP}w@Xl`mxl13=-`ghsB2b6SMmv7)4T>pH>Q?L8)a&)e{-yH2`$Q6PKcPC3=# z+W3I=^Y3y5KbF-)#<9kh`N<*;w)Ku1fKd0R;53X0w&(eA2KK+P0N z$QyftX^O2(M%Hw{*K?YWvg$1DbS~IjuJI67%E+GtOW4^ld3$tAFcZ#%bOz zoQ7CUU}>iN$%2d|g2PE>5G$(E#CPSr&g*ku7dUM73I8cg`+(JGv`?gAxc;rDlO11n z;d)=6QXYp=g?qnu`HaVR z)K+62vA-Vp@*x&Y=P&X534pL;^gNW>-$BL_D}Tq<&W#;li;^c7)fQWI1k<6(pTFo( zV9}%h=HoKAtmh1y2x8K3Qh4&vZ9+%1uvweTO1r@BOYv~AV6euv+R1R-5axRY*(by1ruH-0SlpL>eEc zd}3aEC)V15*YIRK=A4Jm9cVYb$I|_l37B^;T!t$$aBz}t^7%t1%5ZW@{ch_Qt7s+f zp=o$~KadVT5kdh0Fsi&Lxm85tREmw3|9P?2&NSs$LyZ>pMagWgFdnwkhj7Q0HY>%& z6P`|7?o0*W@If=a>mQl*SHAVM-@%GDG6lK$*8n!pc`0)vE{%Rhwx-K(kfnBCN!83U zL^}(`>Gul^gizN9^FgahAQ0ds6#aem&|2LV1M#i_9xjWCQNF$PFW zRe{=;8@mY~dn-U2`@MohkhvW~(F)r(M|Y|uSOc0?xn&SH4Hv@?#hZ@bc7ke4-{@$Z zv<4)^n>5Teql_g#MddRePC8Fe^Ub6s5~nvGKNdP8XaJ&1!J}ZmMaZUW)VO@)jv6;a zzO1dOH(>l$h>LHedUUbI%Mwed+lfc^dwpp*Kw?y>h3MJ&Q1fJ@+7mnMxJp$N{9JSF z9{+%BT8~~QNO;rM`L?5AW+BO1*jLrfkT?8CPsC?Z3ry~)2i2JV?wnxlS3%W?2?bPX zorDCXv?b$~m@e${gPLuo>jP!dOmW=N8%KQi^?WK{vvKF&WGZW)zmWAN!5&bUkAlV< zCQY=@9e0*cDcOqZG)_LS*h#XCdE#Rp`*&AaV6pRQQC55(v!uKGOfAw&{~d`4-NcJ1 z$qZg^g5Z}*a4BBf^kwK#UjX{4gHc<2!5Ez%^<40Png28=Fr@YUi+1wk=-p5ssS-L8Iz9?2vG?~eQ&`B+PqL%|x5 z@2f!ff=Pe-Me41KS}gj94buo%MN~eUinBt=5X(TZ`c>*m-c*y|qk>wAi4a#rSCLRx z#1A&M_^EgPM2l?X|5&?Z*KS1g8A*v)cfk41w305og5sa92hudqnQg&3zHXRumdi7*kP^EX!eg5 zovsH4a(TxKDCI>$7NX6S4wB2NS<|iOW6`Tk<;~?KUeYuW3286w8^(o$(4Q6}d1lKc z|50qP%tWFIpIYU&eW7t(jkhHofmGfe4mEYT2?CE1Dt`r%?q~FP$dfF89`Wu)1&^)i z(Vzdd*h+L!dAT}kTKJhOvtBst?4(cTTP;WPB-VC(2JiW-ru7BWzU3+7r{}7-B(b}6 z$W=xR$uCmxJTui}x@G><9R_C;XbL0r-36y`_c$kNfO?z$%II8OO%h88s?<0w&Y zGvSS~(1R@J9Xnr{$KFH8hLa?oelOyn<(2A3grPm#gJv#_bVQ|h+J-hI1=Z5&j2}4O zd{GdBWQtQ3Utowclww-TNb}cs?*c#TZXdn$y~y*Vi(Z&m(GrskpjUU671$xO%b3}o zn;CS~Dw$#XRXdrY!jwM4#*+k1Ch-Ya(L)OcwC;Rj z6g|?nM6RP@;(c$M-xiv|V3G~JO6v_obxRE-PSPu-uk|?>2ufNkxUZ>uheZqr6ik)~ z#`deh){dz+oWQ55L~Uzh(uwJwsh^$q_~nnF%$Z z16z_q6h329uwhuP|EU9CCWLjrdscg~*k}sib`Hsw|Dktas2MGA473h$H21SO=hf|O z_GJp%s8`VtZ4xXL-IwcogyB#@$NVCLgsE_=|cRX5M zv;f*68Uj5$!&2Hz`rV%K>F;StZOzJRXtDnhVVjqyvzMkX$MwU&2J*Xs#HYH|ov&yg zUa7c=+R{Yd2D`xZ^Q=P0;P-hW7B29ITn=L|u1YcOd1|lq5I@bTynREXsC4284V`P8 z7-lU7l~6_Rt11PP61CqZfm2!%IhKRP9{J}%lg6h{p(pF!KU20vw$7Y=i7VA@Gbc?p zqK{W5mgmX_>-JUW)QT)HUmp}IqnM3g7n)$sxZ`KNo9+MfyGFxDT_bN2?}KJr#~Q~o zl!TH_5|MZ&QPuR+BrBoF-^}tA=h?G^{ZRdMZ&#LoADQM6tv>2x zsF9cA28*BUpVmK=3uioeS8S19f$!Vd%y!~`T(r$*D zzlm=mtCOI6a#sQy=6;@Ql~tnpMWd#$=7*7$6D3Q{Hx=VD_mwH_KF!#S_yhGaSbgKI z?^x1g!)Ax(yZa^vz8`u=z|N97ycZ490-d& zlLF=+OcnAMnJK8SqZ3Og?7G8*0zVbxpRu#{A8_R~IAi@l!kZ8U~n6J6AdfKnFc_9`BjkggXEQfcz?GXpFDAFm;t?KU&m169V53J~hwlHAiSpi=Qerg1)@dDbd?RL5F=g<)wCwxnL_xB4r=pkeJY~u639*9*BSHe`Q~VwNy-|CtD* zi|g*gr-7Yt2J(Ee>*6({w#=)GzBOD~pt;$+Y2uSsTxz4@_}ZTqZO0R@WxXSmVK=4u z=wPp&Y_7JWE7vo+(M#SMvWVO)4?{%)-2PpnV7D=L&NKQ(yaJVUnSoY537h>VgEXsn zeKm*cg3JcO8Q%aXoVzEkrSVw{FjLvQIP)8g*~Xr8lLDAj{Ezi+8`pHBy&NU$-w2kO zFii$ge%;)tJiK@+1jX*~+LtMo6|4^LCErYa_cMhGknFe)BHeq1Uud`QhBjL=6l`n> z>D62M?oZkCXR(D{GY!d37bN{+dKwwplkZg-#3@pAy1Ldi=la!GtRH?SMQxOqA`jdS zH#efb{rC0?#Gy8fWiw@ni`5U?N;$ZHvOwwt)ac(>T=G^V5@u+A)!79kpcPz~9VRzH zod&&NXKLjFhHCoXyY)AK%Iy@E8vRie+5pSoE=u{KPY-jnM8xz-joVG#*nB>8UM+(21?bQsSJ@~{XRqFMGIV%1cC6&RGQtjL?Xg^8RuFvUw`D6#VnabRn{U8t ze6a?$_XH4@!uv`b#fz~@#gqYbTJNkbO=`~{QjLZ(^?i~=cU+p~4l9z>iUh@w;J!Gb%Rp6E9ixTVJqn z7cl2irsQGKPwA zG_bQ+1TuZ{xF7kIsF$st{BTATu!l;sy?22SyP~D*LBG|=u>gvHH8t-bp zt-78%fNxptIsATm(AWYyWAzcd{H;Q82kg)C+JEasDgf`d5$>~KQs1vvy3;9m`Y}bF zqzuuhJ4UN>htiP?C8&;0hN>R97@gTIjKVpY=eIx3lM%Sfg#2$uHm8P1(Ol7K%&Jk) zbgc4lQ>T*>Kd~;%GgG815T?7cPr(_v&)hdF$FuIg#&tbuvFSoFEm$a^xQjHbt;se# zSZ*v*_T0$+Tzi@S>QF!V-P}T)=fdQf9^c5s2NKct;$t&NBcU~m?lu4OzLpLVk4aY; zFFr4_LrKl{W^)-61@s%aD8gVLFp^ZCyTXkS-I9-p@C8-$2=}=Lq1c`8aT7)sCK#w% z>AHhyl7NAKJZg`R5z^u7EjN`%q4<+t@uy@8&VjW?X@Q3x-H%|`VsKtuLfhv;QAyw$ zQAJ!+Hy?{)(tE^om(u-QQ{BCSvds&UgdIVtgp+rbA62$2KB&@ZtNs1kZSjF?RXO0J z3hFiq5AZm%^Uyp~o0VK^qz6yu-jycMLssMqsx_MT*Kj)8HLL}QWHl=d`=d)AGw?v} z&CD-E5}N$TpEVcFCU)wGw&7F7dIG7uzgM0f{O+$1T1Q>oeYnf%!%$T$csC2S61W_S zLnJg3qfjZtcz8A?-Duc{LBYcaj7c!l~1alXPoFeEhXnQ!4$iBpu&Q*xVL~q-8a5;yEGov75d3^jShw^ zt=xka!~J%g3s4~GI*rRkb9~j0os*2JWN4{aORWF>IIZ>i-juhwr zqWucCSCdi91IHDsl9b(zWt{~}gSj=Dwh;467-ueY_cl}1+LZOTA#RekXw23DR%zpJ zMmofDM6#Cm%CLZUk#=FE7kJR*)xtnE3KgWz%X;K2pL#2NhVQFS%e878n*1#ZTL;!J z4QEc8vfdFZu9e&`Z%fHHPZlZ@*@YS8NvB`Ji)pH%x~{q-3I810ops|k z&xbjDp8KF3a9}b(a$6W&yk+|C_{Wa`j@p_O!FkNK#(=wKxdwQx^qAxK&g4ha4$ z@!CjkYsR|C4hXMtj(>PtIv}(`e8FyOIV8Wt#DWCrRo=oRbdtPV=^%Nh))3%tvxgQ& z+(~k4^~R0-GHQ1X?UlZ=sG5)%D8XomttlX*{TMAoL!8kGfu((fB%T=c_{UaKTXUiu zire^5Tvr^?IvR3ut{{D(1Hx8wfFQYD4KcwUS_E5Y4Xc^gM=ZxsOvFsz>@i!t0b?iE z!=(+~+kSXqgLrtsJ!XFSaM%9WOh+fcZy2U`;#1yyZ-SoJ)g%V8&tQm>bMlA> zM?SvxPn`&(U861Qd6lgHIEX~;X0$qdA3}(7h@dmXOT#ruHVf{msN!Y)NAUNjm?}h`6nq- zn8Zsuu=|JbU^xQsvZ7TmIwaOZZppuqQzHhvlKl|#2B|8BTpnpLLRQME^A+X@);Ko` zWiZW;J4Q)j`A?YyXUt+g7SxDHo#bNgu)4+ksi{Ax_yeGy+dd4PgSxAJ|^T$2RM7s(+hrPkAMnQU2C?2CF#OVCteL`pg@kM2g~5j4Mw*Rc`@7jlN2% zRkCB+y}1zalDTSI70#|a*%PZi_3$|L(7tUEx@}?hHX!vjz!hOb7hyxmOhU-i+@}iv z9QZTPSwh^X2#tv_aq`K*hO6}LWql0*Ec7+-Ow6(U?Z6TnpEV7;m}@C*=X?yUv9424 z`8hHq9R9%8P;@hf#d8D+H`!B|t^%N-YpD6mUVY-O{r;6yw5N^fYg?Q3!j z4gM_yDZE-Eb_Br|LCGtVN?KD6bjMLLh3=}f2{f&mG&fW(?3eJdm3*6QQnTSvvio_l zymx1NUW#l?+NWNqrrN~@+5KKLuM%s1#wL1Ba8w)cDQcZiw@Ke(USw1rzIpqhcej-G z+w1Bpug2Oe|CWJhkT;uM|73fTw06z9lfytir+DcMLU+H2K1)uiZA#>>H6hy|NWBi{ z0MK5HF7Z^F=uzL4l3Sj9RfmmZ8p~dQFl^mh!-Z9{S?2SZgI2KDn$siB-#A6=R9(Cu zE0@_glPy&Y_wTqYe%`?5W9y-Lim$@d5O?dQvltf{RyW;;PCz>y7N)o2=$TgzWX_x@ zzXh~y96Kee{VM`9Gp;JW9sZ0$%-f$j;;wYF8s4J%Cu4^-r!0O_Kz{%R@MD}P>-pCv zgQ0=Ux^wWbSqT5QnV3lsPn)zuWB4P5*nCX>ZPthCg-KkpnWd~>tz6=k z30lU&ejj2+Uk+Efw#l&ratB1;Sp)PzXICc_(ynFWct#I%{}&VA0A2SJEZo>e<21I- z#HDe|9$i!3k=;!^jGy~$@$^80N;-X+mH7jG$5q?#`1UH zLBuaAnnyK)M>Wh{^M20XV}e(vJsZ)i{w#1u98JrUI#j2Az|2+uJE#=p^;p%=K8+Ms zp>=txmj`I$oJS47$6tn@`aDWbC6mHD``|IpbO;`^dMD9j`akurO&cbK-MM|F3`qP3 zD?*!eH{7U`*253x>ThmvScN-4vinZx7`W7s%#suA+-k^UQrZU{T|eao*gAjE(ox2; z)ZMU7g<)gftm<-DJ2Yz6Lak*dnC5me*)}RsaL-b^=3^W(gX7X^%Sw7E-SZEnEB9*Q zQ#cknyagIpoF=vVsk!q9egU|%nyMtPNlNMloSs%TsxRyWm@!KLI&DnTKSrd*x}M6< zE&3P7crp82S$^&7G~-8=&WvSq{oMWSL1Up6blZ&MsG^Gh#v--d1+~9O5303Mlf2{S zM%ipKQkN9KnZd0MPESrMSo;`|6m#FeOQP3Gb0*jKCdwKnv^3?KQmIIQm7`hy` zZxt&6)g{FH5B!f~I5f6K>@TQh1KrTl2Q2w-eau?4o}cm1Xg(XUzRY&-J?G7x%C_u6 z=E!t-ZQ(0z@bH~d)huoa$=>U)Bl(tzDsSu}1VG0+#j4|?!W#+$sM8iKT^&7AL#4j=sf!fPT|Xqn)OHqa9WQYiGPmwx*Z|fmWuq z)?Em;t)+QZ(9&1Dij5}C99gIRiU6c2QxXEH7hL+)>z(_gT2Wl{FvfKBESwgN60>xN z%0Pi1d7~jo>M-%rVsk{^VNi8e!oQ+OzuXR*e^zE>|74LMI^}O2+q)Z+5t6Ltj>P_9 zvpp$9g3@rl4EPn1K&4S?xfVa(Nuo5>W|x)5R!R|16^jzYL)_@LT*Xxr2V^M@*^%*0 zH!kCqR&YM_7TNTM$GHupi=#c2nInO% zIZJ`LwUIPNQEFr=6%2^_)p4HKOd&Q>e9{W;Q)2Wb&Xh2v3hK~U$?QvUEgA~D5wBdF zw%Kmwt2Wclb=t)O|B}J)&{h+=V^$M-6|{FQ#?!#d6qI?z@=rEW)zC0Abg@L1rp=0oQrZ2gsJxcB zVTTgh-Fhi&ll<$n$-9(iV*8fMe}5AKzkJ_`d=J`g$E}Iim8dc!qu$xcKaD$vD zx&6~D!?17IQEXhyr%aoUqgIvZCWg%H*U^V!J)|i%giCyz*6YT*li+fJHmPMO6$}Iu zIm4W#x7%eYP2FWKip%J79+J}bA3Y@7((f5&?m91L&MWI0517UhJpcbiS>g)y^JO}Z4oS9M$ z1*o%mDD^1?j;S1r9Ca&4))_SfPQ2*u;!C4L@02ODDsMvCNg}vHiW89LqWLL@p(;mU zrmd8&RRy2rEXxujPU+tsa0KHbzC|?-*{Kb-13OH(s$si}(~|dIho$^xojpn&%RYfx z2uLhN^6R#_Qqm>TQ|T&;nXp<#dIm6CWwOs8m&E9$@-t|UJ{_}3^C6|(0XZvymZO~V zR4RvM1=_+i($%tpSEJo#-6f#Jstn7t>nhm_7`Yq^y)uPvGd-EHDjv-EQtE6gkNn++ zNw2}_gs01HF*@j)zGZh3&g}GCEBr|FG6wKsw9jTOy$BzN4r_)kRU@Q785=Tvhq1P7 zA}uw8jz&l>y*175c1QP|R!zz-{{HoBVGW_X#P^kX3G%X>#U|N}B|sFZ8lG!W*=j%H zJ)(#qM=CoTcDY8?ssaX7Z#YkGIfb!=gYu3FQY#^1o1x8QS$Z{WN2$;yg!B|GG0#n@ zPtR!$WDKZa;7_22MyV2?QwG0*2)@#`eE~UWdXkLB|vXdDp^R!b-#APEt527zwrC>l0wYc(5p4GPb4pV7DdC?C3)E1cDU~~(#l3HxrGmBx6@b)2 zijMd2q>dJ*Y}Muuvr@VH6nNtyadnonh^rMmUTvi|xc?P;*dUumUROq*cHNP_D_etM zXiI?tk_ohNg*IFeTve%X_DpdGCuV4;!2=rHEDx_G|C)utG43h9%xw|NN+Fst!!|gF zwWQ+kqqvo)#GUw5;N3PxeC@Asvct~jpHXg8x<12Y8Yxt?Co%jSC9^WiXnl~P z9CA-MoRtdQn78p-Ox~&rlkvMKPLB=70c&WxhKIDbMAe)n^s~RV$^JZKKWJX)P;Yx>LIBOUos|O}~)N-MTC_2T_?=axZDZZQtO$XSWP44|OnwG^;fY-lx=cC_HKqlo3EG7aMj{!(3=0VTIVx3H zmtMXd)4uv5`{2u!2RutKc0vKZjQN(+~-Ng-O+2q8SMZ4qbs5OORBK ztW0XCb_#sAma`scV`*jt>It$Xd?@kS+56td0s?hjgSey1Z zpIMITZ^IHkOEUK~J~28xFw~3D7_9ORr(2V1N}Dga&b-Ne#G z6H%GYDI$u&7^?CdXwO3)67gm4Qp1$$F1JXjCP1UmG7~0omxvW^mWicVuI|Wk=3r3i z6{S&BIOk!Of>p{dnKX+8@XTu!q5ErWA@7`|^ruGJz8gJJ`Dtr=#fO-;Jjt8a4ftKU z_H^I;RJ^_sx<@lI5j5T+Sv7F;`L%tdNy7kw0Y# z3a*n|aI-F+Lb}Em*#IEbEc@KYBL^2^+E@zWP;o`@ zw6e$zdp6>CcfUGb4pZC(ozMfHvvYqzeG&eF8~8$BDem<8HSEu~+2drVKV(Rsi%?Q` zJ9ZLVM&i2#T^-lgG5)w8INa48cl9QCsG#Ky2ru{fULcNBM3;7rYPKCdH z8gLyh_~k7hq8dB(uD|=udu8Km&`H(tSJY!?A>Pj}77^B7>h5=Zi#neV^gcH#kP_kt zWND$rdGX}LQSj$&9|c=!gP)oN=lE4E6t=mR^mg`l;7`Bs39&Nrvvb^-G^KTUkl59I zuIb9N_CfXhj^FPM^RlQZts2(*1De^A_BmQN1si<>kui1QDGMa`wNOJJN7l>6k1KfB2@|i>?HT+ir~Xu_@ZhIM6d~pl4XL z1d)`#J=w}F@sE!xVO2XeR)kE&))Yq;iaVYYI($}hL=}@x1to#Bz)!qcwESK;?Ox80 ztC^NRuo^nbIM&Y8I(+<9Sc$UTunRhZ*9Atty^U?HE}_*{t3SnDKn@vdgEr+SYg6z&KT|>i#cINpoxc58^m0mi!tD# zKAwp-qiW8}y1SS~l=(S&T-etjfnY@SDP#Pg=v9{UelpZ;84q=`gOghNK)IxOjwHEs z3gqLzlp6ix(f#CNDRN)Ynip?(IU6tbbM&mRALEWk1jTQ~{OI7n+22H7`P{Bep*GRSLEY$szUG+eotdK*c&yKXv9M#T%-nl%c(BY?F$7~G zdq$YK?<4qsa6@Zlc{>Lw)spzAA&@K$7+J{~aP`Qo%e=KFl?ju>yx0&fwhv~s!uYN8 zf{<{bZaRqwf={tF*b4JT>3!{^;p4vLz7AG9_X-NuYq^> z$zRF*(PMJiRHu6QFF-s@a)yO*Q4DnRcx;R*v~u!6F<2-61?=FkZ-~tuy<(s;_-7Zm zT8og}1L0D5))P%DS&X8MB20Y=+Wb6}*!c)XND}E-8xz&vgNDW;pl$MyYeHO%G*1gh zFG~y*3AQ&I45mwWTv2dw>*VmYVL(KE=%Y4032kV7=n$17DDQv;oZztCrl<_mb zC{(S#B$YT2xNKG#II3LsX-)9v?TjTxxe4X4iKUX9=o*Y&zr!(ci}y1mmsPB0K(8Qj zbP4@GMp+uh5_6d>rr5#WRkib&@8ptA8C?hCALVqyfHADJ%D4+SWC{zZ zk}}}-XqAl1)}-;nA^CZPj7muB>_9QgsbUoCg%#~5>(JgOsrx=dz2X$05I-2@E8zt! zcY0LV(IbbXxTgN>LT!(sQ18*kia^=95T&HcsF_)$Nf(}X_4^kWeZ8pPNzn=gPyZlw zCB~Kw{5^a?-KES>Vx3Wj6~ih^J6yvgsUsfqbwU*brA}9qK~e-fBKAA5ArgAZQNZP* zgS%J`BkNvP@)lehF${iq$&=P{_)?j_>`H>Q61N`7;U#T)%Hiw(D?v03*nk~uTd470 zEsDzk8o9G-%>a#5fW`&m3P_j!lyM~k(3+iR89;=+Ad=>A$+$u>t0rq*4Qp)+aLM3y z=9ABz)Loqr#UN&+L)&^3o)dAQ0h|Hc%}nNh?utgb~&aOiwo>S#t|g5n#!ZT zoO2-BFY007jHbbO`~3(bkK0iTn=OOSUyHFZNmppZHl1B@(2$sBl&8Ti2KS$re$0F@ zcJavnQh@tU156Q929E=#_#{K!srz#&#wOeHG>kkAGe*Tq9%Cw*JWZdWB!sEfsvN#t z2ZMhCMKX>3S4>r6C^ymz(<3`c}z)}X`}t>vC&s7_NzexTSM9KHjQ&L zW~ITk)txM=oTP1UVX2=N6Lt4a-)!@P->EKQuUPSfEb~^~pZ48(l*;CLe?Qf^>P?K> zzCn%iA$hOz3T=H@%}Yvr@5Q=y;q!18d-P`szHEEcflgez%nR#$CM~ZpNI+0w8`PMBkIr#(^~;I;(9`ZQZw^IEQHvac0;c{!#F>od z-ehzKi07oPyk}f?H`!N` z(ulAGS+n}k6;{t0jv^=nMV&5-o?YXY$ZjY_Z2K^SzWqpx8*Or^N<=|ulw&gkc?zCA z1v1AdAC_px!qh9)uho&B4k6i}a145umFGFf)PpwXDHkYuA-5kJWHw|xUVoYna8bA5 zvJ8J!8QKo{8qxj4d^^+;-~O&w8!_yB+7HaoLVjTXx$L$2D9?4+T|Gx57TwSF3$aHb z|EgWad6GzFjGv6av6MfD-f`1gyp%wXC-Y-@`!BDWQZ6O~H0CN>4e8&|vP%{T@n^J) zimAFhHOJa3ukA#|s+7{~-hC8^bTIO?3!3zX-UrVG#uXiMO@} z&iu!gW@8auc#@e^L-4pFO>GEAtM~-j?NH5@iAV^z{La-1lP8YnUk7-`(CIzx=K^X9 zg1oT?%*x8SuZS++^|CUr)`J@6@>&rCP+*e%WPe$;)i3V>l64&!ydEzswZO+xb@$7# z1suALwdRiw5p}S$XWL~w06Pz#o0>0t&hCD~OhiACs^`+aCeqzn8u_=^LxpK9;gBD9 ze-_5J*2}iwsq71=y9sq`RU@C&1yuy5ye_+_rw?hWw{US6Xt`ZF@KCKC_aHdLd{~Rw z{H~~6tVMkGts_Qb0{%|hI@~_pKbv*Edo?dRB-PsUt-~^} zI`{kMrBCH&fLhT#_vN=zHV;3`wXHup&F ztmzZl-otiXwCLrYCYicaMr5~&&3>&8z5>(^?AgJhk>QYY%Xxx-RvEBVj z0HzL(efS+G!?-Ohn?Ac0j?hOvbYVii;Cb$EKWl4uxIB=M)~2ss-xd!FIv@n+K>&a zikNSOQRhj%Mxc`5O;~D)nY&dj#H*eoMu`3>@VnFyAzEV*MyQ@-dZ}*VGwV!D_Mokn zzp%iJ-Wgpn)_cF?}HiSf|tAXV9x;@5qF*=fuRH)Z9!|ipaFeS zX-RM-;F1b9FAE&!Uj$gj*^e>o;PkwAxtv-WvwSue)V*CZjDW*;{XjV7nhO&i%ZujVb!)MuE+6m$LGd z_-xCs>r_56Yd)8Kq#ulj!a_qNlYeRVMw0Um2mkqY*t6F^KiLD!>(ok2<5$O{O`|^v zjK^4AuVR|UO@bE>*$K@Nzx87N{W9VY|g;K1Gw&_UQj`yNR7btZdSMUEDfj0S8loF)I z-_+qCXdMX2qVhiJsAp{5NfMHA4m;D8phD)PT+RG3m)=tv8O-Q#cNULGGK9iD^Ih#sEDhscm*Ul8MfwTat-x zCdAg0x_Sf$EA(%O*wIf+R^Hv5oAB{wY9 zVN)q>+x4UAoVN1xNaFrN=%1jWXmG}aB>d0-`{yTh;FyfO<99yIwv?(<*Q&OboGtk; z0<}4L#$RXBt@C#ow@xWAYnV%Fx_P)N=L^pF49huxMvWGpT5-INEo4lbLu9#qRGV_~3oGHs`xb3NA*C z2~dYpfrzaG1doIHvq)53IAse;*eGm2r$vt`#cr3wLnm^UKdG2`JK<`|z)~S75n;hE zAMYesizE92&(RLkVmEINFO}yhSbZa6*5xz)LR7s9{HiK#*fTGYyHryFVaC>FIDELt zwiYe4Jsq}K08s*;cavN@V)*=`us5*FI-^`%Xbrj^jB=?(8@9+oExGPV3k}U?*@GCa zvP3PJ^_QQ@Uw-t%Dzwm(GvI}07)~)dJsGyC1Z^0kBOMt0f4SR6Q7Z6S&f#KBIbvkX zV50$!Wd5x@;^4yv;SyOzsl>>1`fw13?7-~7dff&w{L|lcdog+)2r=9QCtR!wYy+^v z#geudA8aLQF%W~5blW~*>5j)w>VuI=RN(JiHNy5f*?ft4sHedZhm*n)IEo=m<#SRn znuwoF9F3o3cLHwo>xb-gyK~B{dAxSt0GL8Lg3@TBpt=~(ra^E zL@@Iy*g?>(g#7~Ig2BwC71_%p8#C_fsP<(Lr#!n=6^xm;l9*br6E@cpkkq~WmPSAp zdXz3Dj+=h>(RqF9K_JC+f1MO{qkCD>~((^=aOLd zgD?PnY!?lGFl7)~M4Xo6!#P*VM_b@uaLUK9Q4cn#>s%ZTb6A<3jNsA?q=`cw1|l`; znRIfxq0-a?vY3k{hm9Ps#Z~?ljP@<1nT%LLMB=C)sDAs^05*h%{MtE4S^VUdi)d?LIOLDwj)L@+{J;U}3op6WGQn+~2z7v~5a{f?Yzl!wb=0P?qccekY)}{gANt zP@KVRCB6#}QOWJLtrX(f`0ia}JF)LBKG>qMlrU^9p)u^vXejWeATLTE{^W{KNC>G` zc~prk-0>c-XcDHcxt;w*y+GP~81YBbFY&s?a9#P*%yyOntGqQZaq;eDmiCbj= zQI;SPBU$r~VxYTE0W$Gp&73!yzvHj`gswuqCG@P{PKdb(Uwcj<3gsuUbHkyhIC>i; z%YX28hK@8`5t-(Q?>n=<_6Mp|rigy56<-`P9|6?P^$S-%6LGx?FCRneHYzsGs<_H| zBNhJW@r=IPdNBFELg-_4okZ@)zme~?i>!BkH+v!>|4f}(w2gpY`h2$m7 zmbl@*15hkWb;t?){(u;?_{b;LulI~`@K7}Z{lz`O(?(VMyPn)qbW3m`a({>B zAI;B$tJCD7z4?p&tH&P(IZZ&UT^Dy72JKUhbe+910!Gr%@e}f>U z__S;)j-jH9XK`WXC}s zyWkEOt9W0yehG4pR@F`Vj0la zg-wgZ2esiYyk-lfdM*sQQ(n2FAl-S+8ZM?@X!N*1q#T4Jcgg1){QXVga$`b0lPy$zqhpzV#Wk+L2(< zZ}3JyU|J8^T{il8wH`F_oOY~9CsOpBQ1GWXYGf&_u!S(`IBEw1#Yf^&gkhUu6HZY) zMZ9?Gn{C_6u47i3Su){5py`x8U!61QjA?r5VG^aatv;%(o5(oBhrXNGmb>@lqRho} zrl}-0GVS<9bbHtEK2oe}C9^lg!A1R^paq*MQL@;y+oQts+>+IIsXs8g2Y%q?>V7Qf zl&7md8dyHUPaOYoBqOAR$0|Qz94V&sQ47@bHMxy6kGVVe@WHwM?NI=<=I!Aj^WycK zk=q(1vbKY5NZ1z>_Jadm-8N9hR~%H9<0!}9pBBqolG|~HM(+W z>$!eUrPZ|;r$fpN_TaAjUza#me(t~Ddc*f-)Sq@AoHDt4pSBnti;Qxf+_xE6f4%7M z%S|V%^+DX?-<^yI%?OuChYw6fcU2Tz)Y&`kuC*~a>TBKcf_PT%B1o1hZN1LQoow#k z-q9`wj9P-5UsG*YgS57_gX;WVlm=?0d53$`_EvX$#&}coZ~9kG_8v0Wx8`) zN=h94cFwCJw^#+GECFQ>#|2BTgner}@bQ9^osIjMfDO{YAweT9FHvnXr|E-ZEm zEJ#j6&+b!!@PR5$h33>9x~GDfoQ>NvYcKgg;L$8A-iJ0%S4Rh9%0|MuEXq2Toc%sU zGV^thOaTa;J~_rQMEqYMj!z10C|;W~0Y4vZi5PMAOOK$>0G{%)h>#GEMIiGS7ixsh zMD1P3>A%1VqU!yuYNilaY^wQFi$$hU z&=E}7UULr=VL4p8vXoHew4&*nJ0(zNi1gz5fGPAP;?oPA_3+W#wTEz*(b%RrEtzO> zC|GGB`7>~j8tq9yQ$IbTPMA~ach+IbY7Bo_v|H}NQ5Txn?f)V2a=5?2DMSJ9&4Il2 z2$^`nEk;GJY=y>m*ZKn^aE82kd9r=vYdpOsN2FynhT|l^o~1$*b5Xb>2~kvqyxZ`; z^WBVF&FCn%YDXJ%YBt{Cw0CwEBvMc9m05e6z1;A)L+Rze^Wdrq{Kph1e_i0nxuS}3XQVll=C!{HV!}{=xb32bIjaa!4iGLd^QFd8O#H^a@ zTKjqsz!H)5BD?>rq0IWQXRoucI;ekI_8Xc*FwzK$l7(o;HsmFWChIgeN;4Z8T%^Im z9ARotNr(!W^Zd@vS#HD(Fyy!n6gnA$^(_<>8XXGy4OMk-@>+ENVLLW>Eg7`QQLS_x zVwd|}^YS`3%988)C~~=h_%_dMUy}9rW^9VmRd(d6;dpCHQT?7j5 znGR4}gYegJGLKuN=7gLem4LMRX_9{8of>aTF8Yu`%m|0}LzeGJu8BGz24N)`rK%et z^zeJ?TGcmH{=U5imL{U4`8wI52GNzQ_Hj3KQm0Qc+%Dc-b09$vn(i6DENYY7#!E`Y zut5hz#jx+aGKC`59MpncYN@B=2A@UlAZS!tvyc}?IHPf~Xme!(DyqV)slgzTg<#dqJsC;Ksnu{~G?JlJy0Dz|!!z|v`Tzv4KC`w?i zp@M`AWAw$S-99b3h#hqUK;-J_&gil zB2es7qub&Ty)K@+n09Jjc0=gupf!ebGv?OC!sY$?&+_6vN_4_>)Dpt4T_{zp{GO1+ zf)b3UsbAaFN3g<16d|V`df+8;7NR(VzX!_~u2w^REMOPwCxSM1y7_cjSwZUO75FA( zj(wvkc11_^c!G*-{5kly9cY4X_yGM11y0B6U?i$IzA^F>@qQ^8siM19KdxRI!nS!E z_d+Y)ylbDdusw7k@m+SgupeH_m({juUB5XoCF~i50JSLb1A8}e(rLae6!l76TQjt! z3mwJOCJ^%&_iY$?4Cn1A7s2*VtNQ)xe$-F{JoZW@@^KRO${D-G@*ugeR*8mH)UJ1f z$ig-rb01dud!UANuOMHaZ&e__<4k3wGP0H5;v*3cEMTaTJF8xK#H8JHObvEN4vqi_ z`->Y4-dta5s~vI}sZnsk1Gal8qgnNc5B6wmkRh)ruNYBkt5DmL_=R(gkUk}FN08+( z3L7HiAk(vWoH?rX(O?g#TBmrx>pra3g}9*n25%X%hFDU0R3MNIHE9Cxd6cG(AiQWPN3E= z?ynbXe>oWb0q?e8Lz$KlVHU1YOq&4j_TvD~txK4Y%FKBAi6$YY8I^iaW__Q}MjxO0 z6K$}d#w9TIW7~5(+Hy_4?_#OxY+P?bjhA1=8Q)dL+2&%srXN_Twh;K!5^Qc6& zAt!y89Nigg7e?%83ZYJ06>5UlZ)y0vbm4llykavM$+3bFb0e~h4Pi!1@ZCWaPIcZ? z^Y15$?V*G7_d|yv*82BJh(>Du`{0neamB`?zv}U3A3@kjIxwi}NYWhhZJMv5=nh2u_EA-{P_)4yUdJmsS#q(nMSgG zCcy4hEAdv*bRZjv39?Jj)ALNMdpOE+$15a2Kh_JB@++BG)ohHI;7Ba^)MzPilFnWC zryxuLRqgI#NURw%nf5f`e2#pM=^CB7*rGt6NrZWdLk>@(-=+&rUUFRn&#{JO!yHrf z%kw7(`Z#XQ2x_yk&@?=_cv`+ZwgxrF30m(*Nz=sO3k*q)7DBm?H9xMZ)4dGW4&7>@ z=B)NCM=c>YdD|`4IZFu3bV%3@6f+DL=-%PTPMAA<5}4cR6j2+50I5^H9xjg%9xi+d zsHoj`P|hZBk#iSilq|e#3LlB{UMs>QMA1+a4uu3z^sISO_gvv~-(A*%??w#aI)&hCDg?s%L3}vKn#b?INTlTc%6S%!4JSA>AD+(Dt~6IcTkypNTYtH`*Jc zs(pV5$!^v($mq*psQrDDqkb0cuW3D>dcT^9`Ol^tOjSn}=C;KZPJ=mQqIhZ{O(Pci zefElhnu^-TAH)$`=I5%=vkt>3`2v0jf6%AsANy^Hi8$DL8pNUK{Ul--ah9Rtk;iZo z+)aQ&SUE*tXbk}8c*+`OA=%Sc-&lYRPyCVvqcg)J!H1Yz{77Wz%Shy+2sS9uO)@Bm z7}xJyX~FjjVlq1fF{ttlRw98|%~eu6ol{>s@*w=J$a+aQRAM_V2M^hx<^_^_Wz1o( zvcu7P@d#C1VMlo|0Dm_T+%+4uYE}z}t(j_#20lj7=VmFUDfFRn8&GpndV5e-l6*)_|5*{1T5I>_$OX8-MEF_v;G1-dV9;=>n zwLj+d$)q;X`$g2KvrWwGlZ@KyZqQSozc0BVWZ1LAm!OkA880xw#M^^(rul&C?v>+Z)k zg{ZYRS}@|9mF8{jnW5Xqm0$i}Jt#!xiN5d*)b>;<7-^`1jJ3T7+?P9-{f+w@FZ7oi zY^EB~w2Wod35T$oaP2RDW^Z6;`%nyT8jT5K*5WlJ8P?HpKkv&u7@P*fFZM_=-@ZUL z+-X(_MsH*0%vISSbs z0c!dcraty*X?creq9K;WjUp_JMYEa3k&i-8n#WRkLQ}Wnxzb}ndf&0_rBjUhF(m^9 zhhT!k91xWFc=Z~EktQ%B{G+=U!<+eKpdq#Vl%R7MYfYIUHvkt&Vp(WzlAahPh|WH-XM7j9vMdf zvSXDM5}-jGti(m(f?_EB{hmikjWQlo7cRxL<+g^dt!E}>;F=vas31TAN|hpZI5mZ4 z#-#y^#D6YRI%_ov<$dNgN>!|S%w)U#M9Fy;LKe^885oJN-n5vE7bZ2mTc(;BauA#g zA&}BHZ*v-hm8flGvurO(a0ikl$(JqN;Vo80>lx%XtDmpxh~_-YPZwlPk?P|SE8US^ ztU{BrS&kGTxKl-n{{mmRi;*>ILg~9$71@UqH`o^uW>LIQw5|z972r9az)8@0yE@d= zgG!AM4{I+gFeDd5oJST9OY`P=bV(U_)Drqtzkn+W8~IkrKD40U`3?VD%JMWcKv17{9cxU}*C<_d9w z8M){4x^?5VF$XEmmve`*fm!M#DM0!=zyAH&23_&Og`h2`-)SSjI~wD((cL5{UmTZU zW+6q&J?)*J=6-Dq*@Bb_Ffhx9+Q(@r!J{afXebqN(Sn3wpN>@*DT)dFW0xLSnRz#{Y=Np?gHO?v;iT z&3I#koODC-JhL8un{h+(S~RzJAxR>Z=8LxAvV+8VK(>;~o)0g+1HkpA^%OU0)}b?1 zg~^VDf2;U2Q13pOL9JQrG9cv|iQaFD$CbqK#|eSnFZKLBxpHcLd zoY$gvnO{z+s9zu;8N!2lu&;+4vDynS${^~fNYl85&87wnzf3r1HoOvAc&sZ&TsddT z3U?ZYT++Otajwe=(|Xakv&u_H*_Q7*X-|fnDkX%T@;r6?lB5p|)nld9LJI8p=@65B z352l^4eIf_7H!jr&)(}eml5t9fes8E&lS_ge)aleE(*MUH(6YC{&+1al=&HMDSX!{ zi2YI8!562b+@{1*sYDCIOwXDMG?jUxG!k|1ObwEz;P1~lIhoSXF7aBRt+ISm(Eby} zoGkIM7g;4!5Z}l6sU{^*wHa_3l%$mtul9|nqgAe?ZQda*XUp9h7#^q^?Jla_PLFV+ zbd0$@iL>yg&ARZkz(NnOuaE<%YRwINYruqy=W(4AIC-#)%WrO@;H|xH88*KIXhTMy zeqivr#|5(Io3t@mdFs>Y000Iij>$%iso94DLl=?;X6A_N?}R|0TY<^TFLVGGZWfi$ zs6|pi6*~Y(lSL(LGBZ0MxXO4(X0@T*L@qmbU1*Z=jt)Sk)zKGRn{g{L*+KdMY$-Cy zfW`m_(yq_qXX{d912M_0V)*PAeH(Hu#fKR2$txiHoKDeoI^t-vs3b-iX%MaGFq*qr zt+!Li%^b}dddek7895NSg$vGwVUOxIp`?KYysU?O=e6du-R07wjN*vY!|tnXrnB8J zbWJ}Rd5qczsOL7Wmi7`atqXOTvH+&hn9W+OYa_$_&F`kOQp(LH$T2V@`g!Q3Ixe$6 zLKS0R%*%CHamPZ)=x}vL$XFGdP5vMZ8T`6PKXwSjMzWG^Ho=X7ahGPbN;eyFpu+`n zBQ|3r-50U|@9xnG09`cL4rMy5G-DyQaQRV8F))6fv+msCWDkukxN9I1)3r`PC)EwI`axPr9)h3*`K={wBkd7u@D zf8FQ>v(|Vd>*U#W)D71`TSw5U9>;vOdoioheG*HH!2ORW1mJVQsFbaVc?FwwG25{` zM?$Akj%#@Gcv|9kD-JA2xZ?vNMSOJ(o3{hO=*0(mol`+8h7h&~#L%~L&0t4;ds`qi z=h6H0R2|EDdwk9~QS5kL`dj%7%w{|7l7Z`DmTE=UUYKKU2Io-#&Sv;KPW$D%KJ4am zKT0z@t5qZEX8Rh%=KXy++e0Evg~O)Pc3!BbqIrUnxs+YNXs({I=wepwLYDk`yPvA4 zxn6p5)>|KPMXY1bM;ttN|JVtl@R8#wlHuHlp5QLHt% zwf=>+K*G6(ro}9tg8wB9&mQmneSyeQK>T|gz!3L8lov6Go8$$Cs%+HYvT)iZ1$#@i-r^F@(Q_u4aF+QU8IV%>M!g z|6*VK#s2@qHQnq7i!S?5^nbs@)Bi~m>-YjL7dP<<98z!Ij{z8f{{)i(S7|_>0pdn) z(%gu_v;qofkdyTb@v~JMrkNH4!v7cb^SoxQ$VKVaQ~r&f-mlEH7|5*JQcU_qk*$=4 zv*axXXR^>I=4fzw2HH~%`7_`Hy;Dh3TMMrAWLbBWP>xIXn^>m@qh|7(Sczv;h~`s!Ox zsUzDw2ri>eORP?f@k$Q?T&=I=V9XSg|F{tTMgG@DVBG*_MvaXGE?VI)6dEjCqHlee zPVqm^>1M%ea#^Z>nKVoNWjfkzG7H9aQ28Ie(E9)JVp5Jm_$whg;9oC+J4?0+tP9rU z2LDPR%la7)c9jppjjW^IkCr^Z3i}F-6uNNdHOutEg+BPOl z?&U(&H#^ZNhtC_-7M^`eou9R>RCtS&SF|0Ql5+b@*{7PagIC7$`Tx=N)&Ws{QQIhz z5-K4f9RkuIB_N?99nvY?-8D3#AOg}z3`!#{CEXx7MmH+sm*$^+u(6RGtGcJf zm>E8dQ%IHd(@9dcaQxY(e}rGTnj8;Zj+1|kUqP>Ytg3q5kC>xs`Cear38i^58l-JJ z;O)Dazwt^{<1o@mnY;bs3(1dK8PjGXmW|035)i4P9~Vm6d4;4oNWMHl_4t6fc~su{ zdDgy@ZoAcCWb>!bs>ex>C%hT5);EH64m6olS+XenyX^h@SY;TpC{Phog)1aXbO)4x ztXyrH6&vUR!UZOy{}HY*8HL6AL{G-U^>bPKSWhX#j|EU&9}Xi?q|kIaR2OIXiPz~{ zKS5NNQOI=P`3f1juBB1{lkOC#Gf6Ma> zmt+azU3SIG0~2h6AyIy%>_}P1P&vsWN=TbWHtgz_$poP zRAnpr7=-rJ=*YD*jzyNT`SSAlEXPvy$5Kz@JIw97A&S3->hP^y zkj2(JJRo$C#2K{fPAx7Iu;LJ~O1B*}vKf>ZPt6%gWhxE7HUaS(C=nabMc2zv9-YQC zb;y~29ZQAMe@bQVNi07~J!I=i9P?FT3+2lbqSbJEboQ_`kB>@Rc5K}Jc_x_Y*@j5` z8%W&XF?C-qQtl9}8JI5%!vH~ch?eS`8FxY!|L=CGE7ixTTnicPGLsqDbwr55 ztjm!*b=RTSRh3u-D49QRegkwKm}$rZ5BS_qlj4=Xm&4-0cV=jVK+qDvS!t}e4?rO- z`Ol~rmvC!^1i%&&-H5*HJQPZ}LrtB;jKD>G0+P377FWJQ>b(p7{XX=aD_Z4g9B{_n zg%-cF3ylUJW8XU{Gl&DI22sb)@8!0KxaGL7*90H%0y9#@{G{@wT=`u_QWeQ}37VuG zi{86M%lI+fI}F{^sMQ`Lx$`6(e+!&sfMKjJkTk=6WQDs#trYGi4w`uEcV~u4b)VH> zGNg;;9^z-21yETliUI_eof84w|7pn5{;A5T4QG6>d5d>d$_ z{hE%o1$ohb2|h^6#$N>?+$HJH!7ZiUx6LsMw`F^vGAQ3|@x~>1;PGfztHH|OTPJbu zB}8d=_x0Hf@9kD~$8l`bl||`(g5?9jn~xo;$?;j7nR}q!j0XsfmVJ^+3A%$l<|}D- zROG}#OM$>4iR~im;l(#vhAU}NROGjtmI8u9k{^q#FT-1qc#?7N0~wKBBPh8*M#@0O zhJEo9e96(+D+`>cv&P!q1<}7d z@n2b#ldglx_DPat5E>n-ntiI8ovPbfZ~WCjY86<%TvO#wTg=KIax)4xbsIf#kk&ts zYNjld_VfAHOg0_)ZU4uivKu9cfe_)x9<()iP)aTm)BNzo8|iZc`_4LTH?SE`ujG>6ba@h#$+C zRdcbatAXv?Nor=vmsocr@el2sXG~VHn!KRwRJIL0doHunWJlhC>xdb#+IG%C!YV0} z!MBh2@P%TvKzz>zK@M0|{6D(-yEH-RTxMjRVR{qHR=u5JdMnIpnWJHBkRRT&cvd^L z5ksFvjy@Z7ZO4A#1r21Tp3LD{IoFd^)y;+J&2sVXHJ<2RvOqjJu-w;5>mnwfxX+i6 zqVa9Dkd}BVEAdUigQHSC7x1iTNFsdAk9$kZ(fPJg2_3Y+{Cl0GO6(BNsw9104sVjG z9^zO}MZ2~pDji;DktbHR%Dndf-VcsZ@~+nJMx(!}%l(|1C)n=y6$_rik;*LCRTARM zt7sQ7!!D6px)g~Eygk!jtB136819jhLT1h-)}x&#x?Yfdi_czu@wJ{7c>ksreyqP- z52p>Sr)_3#ZsDCW*9326u9ysarFFWCuXP#50{3opTu)f&ASYg`gC`?A8yhdW5|Mtl zN#XDt62L~W*AT)eUoJFwQqtkxtPwak;}C`PJN;S@AD{;FHxlAHD1o;`@Yno+67A40 z^pjKy zTI+V_VobFkeTrY3{szMH4x5Q@x*_tI6ykPmp zJ#|TVTABZfskS6+z5W|%wGERWd<0vZ$5s+{kz$kZenJORIzWx^xM}#YAKW^~qc(os zP+_86pS1z{{9?R*b=#|7?2);FKe6!1xf9aTx{hSfTa4~#UWFI2;}3L!cP>YKh#kzM z`Qcvw{~zV^{9ION#>WZ5q?NO{`OfTSb^OyaJN_k2k*`WP$BLa9oy^Yi8NI~XVd-C| zcQCgSjsYYGg0XbK3BWZ04hAbEKxn0Ztiw*MsX}Apcf+GURkOIjE(?fsnX_IsW}1}V z-B!AKiP3HK0aB#-{Wc4X+wx!ybRO+5rXp;QhZRs7Sd!Sep z0Lgj}nUesQyY~ccOYb0CW^q~mHTcn&1FA*bK1QMdWST8zuN+=FsY)CW$t33rj_ow z7;tRh-qFRp-);dcBQGFHyn7LFUu<2MkQ#p%N|3o3e2*t|k9W5~4*zi!lvn*v1l*y| z>@+F)|Gy*@SeyUjr=4&|qBpGq4x#K0x8dB#hLZ)#$`!bsHuwBMii*ue)@5Icd|ThM#aIY<(TfrW=NsKK^sBonp(iPLLkF zk&vuSY2J8Iva|DWRNXpTNb6?}RC-G@n~R3FE`S!g!@PCc-mpB-5T+728>6b|0Z-1; z`3laHHOll%v6`=Y-4bu{(XoVTMJNj>M9#Q)MIp!GM$(B z!+n{yLl7-JGwU#PW%;`#isieGHgu>6llakOB6ZUE*#4NCA7v;w|8p!^UqeCZVveWf zM@2R%RqJ;nMtW0!@bU}l7js1T#UruSsr9@AN*dLZedF;z^trEYU=^O06u)KrZA~F9 z-i^k^mG=W|5e!Wu)>Y+~G8k%bRR5|UH^MZDM#H=n)825Th+9%XB`ug&2zCj+xS>=t zg&bsr6$wEnw?)8Sm?uqPwx$r<`p0hSPew$moH$Bm{~&!X9>A)QKIrJ8GEf@8EQ~j^ zzkvf3Q^4>uUc8rt=);gDrt169Q$uCZzK4aDOiBY5^J##BcqCc8SA%$DT!Of|3VA#( zMeN}LrI~TR*kDAh4}zDAaM$BYH~_#*-pT%kJCDSl%L8D3JWvesg%S|JnoVi8w}A^3 z!^-|s9EivMGsk+q9lSh)H{Q3(2GL37=9Y@iB2Fma{0Vp`B>x205S~n7)U&osM4)+uU@LvL-5u54* zl5|u38TZ#&@`+K|;89*j!&5`aaAj3HDcMtMReLGxp@szUUVf^4`#)tCkb@O$O<;EX zNG6V`vcU_%$vhkI{LD91$cJA$cm_;i031XQwEnGMw0!*zGjS#pncZpu zN-HmA-H@TC)<1HXRK2kU7?`p&0|om!ie?!wRGe#@EeV1@3W6q=K&sc)CD9z(iGLR-B-JJ zwByzdMe1n*Z+r9kIUPabOjc&{C~2g8UmxSB@7Q2NX@yg|UL84fhiU6ixmvcn<*AT@ z2e_o9(GU7j{}y8I7dwJ_#+O&td8n_Aa5vdQK+q>|KZf62x-rDFM4np#+jdhcH%I zGP}{zqIY%KdO_EJCB3glz`#RrMQeVFct^9Ws%(Bzsea*2EZ%>eL4KlGM#FVsU(M?M z(qx@-s4r6~wLxWf&@e~1K5LKBUgu5JDZ9hY?+P!iT?kx4w=rNYvzb)D+Bv**o?XAH zt{>|32Qr1g99omE35~;|v9uS?{539F z>ve0gV>AtGZi9(kTW5;?90&TpNWGmMcHpKv@EKS@8!X`AmXdCxYOR;CO)rAnpb@`h z9tcPZ-R;jj@5Ql?jV%?&gRRAMKxs*#v`MAn>?Pv*)|uG$vBOZ>k3adRVdiZx^FKAc zpK5x4msFYTFgWZmkcjp}Y4PkKfUl%3D1Ue>fwCOZ0R>NZ1>~1)Rkg#aDr>C2)L0{D z$=8BwkS6w!$YSy}3wsEbJ)|27Mz>deR`O0c-nt>kGQfDf!~-Z=GoYhwYG00SUk=kP z=ztYh*65I|d(@uZfSx5Agq1d9mo&3@&l;0JjiO4M$@F)4Ozn9>YEu5xoMqWQSmeGu zY=<3I*5v){Zh2Z;tEp?iZUFjnUU7PZ@lTWnnmi0mR=Z2(rK#f&2S>e%+LCrrbo)KY zh7RdpIS!6$x*%4f+#I@+(!97BGGIVxQJ?uns-Uu_rX2>Gfx%37K$`1u5A654LO2UZ zrr6ib?6*Q|JS%IoOdLsDKE5Y~YFpYH^aO(_T6pG54@nygELrj8%g5%~jSXKOX$R&` z-FNxTORDC%RNFfCshBo~Vv`eG`vxr){Gv*Oj6!i)9D)X(R7hP_GmD4gPruhKK?<8< zacpBHKl^T^?Cp?*sm0I4VS&ts9vSAg#qNdqd^FPS)!Fnp+pyOzUZH5`FxoVZH06G!$dK zIcxCu+G$g2;E|2&rsIX0;sjVUn?22=Yy#w^wxuVZX&p`pvD*|Ywt2JjOo|YKM$4Au z@fySDx&EFE_P(3|Jepu3&Zd#-SsT-+hw#f_`hHQ8{8Iw7=c2oC0yOCnpJ{$H!tfe# zjE76l+L*x)f}d7X1M1xD#R_XQ`bW^aekTn4fbdPRDFjXG^IPjbfU%E-AQV_Cz~awO zV38nb+y?~o5!Pt2zzPGc=5FgQ5HPy*j?%rvFl&?xX$}TkC&fzr1^a{J*ht13MC6xPa5! zp-bMR_$c^+;S#|74e+2XG%5Cy9iSfu zP)6Ih&oSr!PT&!g=q?5$9&oV$VY@_HqrCx^tm`G(_xq&PM+N2p2H5uu?&k~p4)C9J zmCN1S-Ss2dfVjcH{l_z@?+FhKJzk=jg*y@K69nt#QDLtKFc+~K|gCET-;a=vTb|*{iyXt%F!ZAs-SE|Xqp#7T(Zct>{R;npW zEx_WGC%V*}wE57LBPnVRP}xu(%`13*`kU1M-u6!GcJM#LuD^g)hj|a+27F632iPR_ z_}8h^nC9^z09gb8c|XkmzlXX1JB%r;-~yneyHh;?CZx4_21PM1C=!79*=@CVqVS$B z0LSp&s_VV^5s%K-ghIuI-pOrl`Hlas^Xv3e{M&2!F6eSmJ2yE$e zMbQJ%Z*LB|e=@C8u`WS~j%S$7AVe$CB(BJZhug$_$cLko%u7Q=*#(MSX-p*)$nGCZ zCDtiDG<}q!@q)W@(2+P!vjL(tz`38Or%JIak?EVTN>>8YH|vxLX4!Q#yH!rjBo($oq%P*~tSKy3_N$`cI&4>F(_5W^UySZ|Hl+J3@D%-#I%t zyJ@(Xnp@J}4L`ioaG@9c59zMUBW>wrYi_A7`xY?OaIyYhfvlUU?;Rx1dmj&34G&X~ z|J-FYOzH2^RlnDLF!k`TbaT1`zB82pa=8y8BTRpn{eMQfs%CbU=JyJ~=>Nm=E}uJ= z2J|2Qm-+o9{4aAQODAg&8+tyG|JcgdIsn1wd1M>_GSZgj&K8z;X#cYoJ{jB1ishUl zW!yrDR>oc&7wTrZVAG$C4FkbA*xU^do^ZeB-GoW}edW8jEVhpjW>a7!{rd0QU^BEV zsqzp0M^Zy$_3Rf4j3-x9wRpu#yego(#l3NK_`7ghF6r?Ymb4dCj)3)0hjg^|IbRI5UY{dwRu2(@(g^Kj#Z&X(Jx9RKvXSG-zpFX?V~dRx_Jf~Zl~l7W}TLAe9B z-lHkESU0!EJh!MI9ImUBSoSN9ft%l?XLOQnzXh+9KYB!{@W6sK`^0LVJ0{3n-Z->R za84h=&bK6kuD14wjvcsfuUZxA6&@T&-ZtI5xJB`#+^Vr%pWSX8LT)dZKHZRCrW}&n zqj-w0m`H96EjI&KRI3BVH#e%)axWw!2?Un|_M;9&3_}I|`0$iBOKP%} zM$rZ0%EZPL2d{a0N^Y}Rxn+a;K5KwCZFAQ0Tdxw6jvH23$eKeLx_W&0M(Q~EzSuwv zejEhPs0Ph^sE6B94vV!;Q(Se6t~X>0iDqi2SIOJg30=bcg+${_DoFSaN{c{ghqwY* zztN8rOx4sbk7_?y7nQo|=zn1ty~r@|u4{akCKX#Njun!B)WQLz~5Nc82Bh2-|bb8-gWG$TKsw3bZC=zF*9)2oC+)v1p@efm&oxMO$u8 z#CYg7Y7n{`QPF4%jS!*}2=0A$84q&pd3P#dG6nu+FFbmFr1E33_K@P0Y_EdSq-fDpzi+;6o`Gqa>4s(X;I%;K9PWZZE3oG5cNfYzB*H;y z_&T5$y~$Nk;ISs9c`)r@*rmTd{`n7Df{uqev;77db(a^pb4#I~r}0vlE>GP>53YJu zZP>#J$yQ0bWSo`fy>c}OY}JG~&Oc>w>E-zwY09m|Wx|3o-)7DPBe7O7n$z62TK`r*u3igtVmeM+sccMmFZwno zvR~?i(ooW+J+Qdl>Ngw`Q(QgF$IbAYfbxl#+NpR`P~KwZRv#Na7gN(&FyhB(hy>>L zE6lySGc9pnyX~W4d>ty?tIoL7ayyCeXK+-^0zbHpm_=)d-P>-{S+da^tLrVz^OIfv z-QzL^j@I0j&Tg!NH^fQ9RF*e`MefKj14HeZcN6GbbACrgVKcRCEgr1w6>NlWGrc2y z%q!2@e0xyBToup~1dr=ROx1^QA?tlMVy`@v@FVRt8E@W9Ysse`ueChg`*+LFidU%& zg-<7o^UnN7UR^DfobGvEfGWQ#vvYIX1jv(VCS{zhRsZ%|jKqsd*-5mIgtG+n=K9ti zH48dHa&Nzty2@WNKX;i!7%b;vA?7H(3$p`fWL~-AIGbr5EkQ^fzPC(YG#XDw`ziQr4{Pg*r#ZhWBE)uzZnAZ(Xr# zM(Vb^y(6@njOX(@0vc2#k$q$z9hJBxk;toD5#e!MJ;9IE`r;?)8~t*Xji;{4_{DP@ zjvm>OMChBMZt1fI9CgG=KzU1^WT9*0?|{|3Pu>BNV=ahl6zi1th3Cmf4Y)4*w_%>1 z{BKj8ZvzZ&J7y>0CjoUW1A;3?dI1Ntp;}w&KEOkOr=~Kmr)_&2mU+e{=9%^ywjB-7 zSo@@k@nD93@E<$B(qVl()RNpINM_-BZZm1HoK@gjN^Hbf;O{qk&NKG6*BwgMu~*j< z6xV|Rjz5KMD4vcKVI~|!vU=Z2M;~<=dYIzEx_$bd`D;8>TmqTxE|gexD0XN;pCzWy zyPWA|p~RD(Xw$CSh0qGZ_?19co0hy`iXsviXS0X2+D2V84(#1^hmSd8!wj03M(cBV za=U%j#D5rfupOS;q-gQJwa?7Z|0c-l^)6^LLl#@PJ8=lOC<a*md#jZaQHRrn>axUu-BXZ!=2&*FN}iGW zdCH3-{`!;&5e|jTrcLJX$}EMiysfZI_6g{d;d1|MZ_;fJ$zoT7!ibqN9Xyxa!i4gN&OWuFOY+49S zmnqkLeP*eW&ts|&v7)szr#4 z4v0PSY_}+!FV~&{2_XH#FWAno4pdFWEx~&M69V?&UdPbxf%^GK;Tk8-0BYCTQ*7Pp zUs$09&aOKL2{D^j>CO0WJ^M}7*0(O#mqUrJeW_N;w%Dt`n;EucPxyW*yk?cs#TN-9 z3msb1(FLh@PjId}qJO07Of&w=vD#j2g@x5=fpfUF8?as-pnid280n1?T zj!Wk7Q1r!h!Cc1*0(r^{J2Rhze`o1>e<4%cHNv0su-^Y5_f4c5-_C`Puj{Di=TUKnq+opB!;dL{ z^cLYCEK@LvrXn+cGbPZ03|55vUT0zWE%Tll6#ifip*0pZy3PHOlleljK6P{-{XC0s zfrmQ>&3ba)T^tU#Vem{5U+4Z!vZwFoR(&2&FiPnGH9P&;WD_lhx-^Ff!se;Ym4pAX ziej|}aO|lKDEeR$Y9fa~CG#5KS$EApimoBrTUQ3YvUMbne*G~1$%^Hy7nb9;TlWP_ z?cm)BN~-#3_UAyXiSXFMuyGmqP4dZ7P2b{Dc2$&Off1em@H==qN!ui9p(0%o`h&Ut zDO?=xIDg<`N=-mc_`UngrLwrG`NwOU+=W7mky!)ZMk6@fE1qEc)kFj4kWg#V6c>b! z!oGAeQ2s$mwpmY3iD>Koqg%SawpS5{UG_T?3s_CsSw3w(V`?+ranb!gY{p$DBcD`p zTK4gcy~$mV9|%%BdBnTC#a^J*IV{5&`$Se`|EROOaD`!af)%_raunB^<$}r?@Qoa{ z_QaLwegEaSBi3tf-oW6AtPB+2mLEnHH0rwqOJ~uM;Do=(dXqlPCFB#dl!rvy~-LsN0Uw%)o^vN29Fcqd!bvr8s;h6c(m6ZfvFeY?aLN)V;h~ShbDJVn0|zT|3iz>NtU{+PhM~;Cp-3wg{3Oydmzxx%saoxPtAq zXzJjPCm$qiHN<3ha+R5v$t@@Fc_t;DG(Zv!)oia5(=#Lw^s-nT?VNLdR}>YtRkKfd?wl{W_J(qJT4S#N*T-S=Xz#Lss)|MUvmRs-tmUvbnW%;h*e5tGH{ z*dH7VX1EY@zP+}PtU0?$s$j#AXb@T)OxLtZhedwrel6M^pnrMP!%Zb5Se{M?hCFp& zK``v53wj25#$FYztN1^FBnZ`v_bR4eVBbvS7JY1fnEp11{Y@G21Q%RgbZPI4XwOP> z+-#fHxniR+K96gMR2DU->cJ+2_X~g+dg(+$t4YyORpm{$Ckw-52McQRv|MM@N|(f& z3FJ${+K8H$DG3Il7)#Z#j3=Di@A=32t8q9qtYa`^b@c)Y<#xZgiZvcP={?)kHVz$L zYl3BzI(T3AEN*;+A@#gAus~+U#|5Xp{jGC|#(f&E!y&QXk2CyS7Q#15RGQKkJ5|Kz z5C}qgH$w+Jgk4bQgVt}SCF%Z4<9bzJw7AySC>q2h*vnzGE6x?x*XEwAr)*ib=u3Vl zWv{lhy{SRo@4VOcbs4;wmmjNJt4mZ0A?NpTvWJ~rR#CEgGw`PG5jZXFAmJ*bQ>fUd zq(wNDztCRSW&LJTxRJq+SK^h6*NyV&be5&={f*5QHp?|H`9Z#CYNQl4w4RT5Ulp%t~QnyJz~NQr;gjnlGz zdgg&B%ppyAQMBm<)m678COMQgePRdwoTPj`F({Z-Gq*m!o8^1-*vxwG`iHZ@-yq_) zB8r3SHj=%>ndY1oYgJ`YOX>!J-LB@@*Ew}ljgjt&Ghxblpd}Jw;8hmlo>*_#T5fdy zrm&Z3?jw)Vv?e+aXWL&?sY*LdWzi+a6SC*}#DA%gnap5d;rkS#&bZ!C_$|%kvN~?w z+z<0?S|-yr9t8C-?XWWRlI*R6#`1TwN~(RTDWROco2Y+Y$2Ha(VT0w6OJ zAqh!jI`dVh7fk_IpOtrZh)Km925?>MJL(QcW4B=~txyz=N-!i%)I?(y^KTtu3p<}l z$TP_DNGt;_%Nuyk)OW&00p8uPT-75<9@zQyk-SH7 znfS?Idq~ZD?;zD%;lJ;^J3~)_&%Z0np^4(xYe{srw-0YY%h<8jRzt0;;G6jus=9h2 zSu5L-)*BLo{kss=0LYPiqwpth4)aJ4RQw(;qKxlHF$8yN zQhnVYID3e6i{aVcpu{Aazi$S8_iu7sStaN`dLnlrY>FHhy+H@Ng9Qr`B|MEm1*ugF z*Rtd)P1fG#LY~gn$rUeO+i&EE9&qi@K~v@t#jE?rmR+dsaXa^Auh4n-c)xvrpT9%n235dC58y3NT}1AW$no%dUh5$bd29;6Fyd)TgFMEUFi z!m;M*^Q)DFt&+y?>_9+fJm9xDz5dQHM&5VJGoQhzLoncsJe)e>yxP6d)%ebWj)iq5YD%7DN`a#aGoQ1FpdD>Z-imJ!HyEJ4VMDnD^bxXNMiw*OfdVDa zAiC@<8@O~I)&AVs8n%N^b~Mq88l!o387ZNGLT)p(H9%CdII6kRQR=L;0f9@uBHIl_ znwz)Z$1`B+PY>nq8M&1WUGjeVf^cV zRRmW?tMJV1fm8L^5E(lAfq!v`E+H~vi#ux8^{MEi9G}96#x4nHMn4~ z?Uc!bY7yDpxB?_ydr~{NdH46Q^TSuQdv7AE_ngYqFs>{Dw z$I2=}Y4)AMGesm z^BzzmO;|%vcVt6{G6tgg2{aNV{UUU+G)0mKlkeQ)~Hjnqewc` zO;G^RSkT?8b$2Q8^zftCF>PuTMalAU-HYirI=WW?~B(m$fE(v{>o@>~=c`VUcE5QQCMtS3g%`k`Dg zf0W5^z-Lm;7XwB%yB>!N>b)L(?CZ>++m6`axk;Kw6JGjqKF5AX*S*sIV+;J0-h88W z8SAeOz!^AJJuAjeFCe+yIRa$AO-FfKGIe|}_wfG~wtaTNZ=d~q>R@B+>*JpIggX$Q z3br$;{6pa2!ptE?G4%DYm}hmR|MKZE`ZKP6_H}USQIz&gmu$ZmE7`BGkneL1b~Ji< z{H?xQ1&^(a(B?9KPWi~lY3O#^*VkKO!1>O)q|SK31me z>FDPuuzT#c_^7Z|DIG-h%HgxuMn>KFp)+yL;MgKs!VyOJ*feFDm zKQ6)SY9hnG!J963t0T9;D~TiH{Q6&=TP5o0M1BM*96w(yi$2dd%fQEK z%>0eA>0r49_Z&=RSWt)4kJS%zq_HY=GnMtWZ>fF4wQqQt{ot?&W@KDDU;lY zjMc))aO3{^&euo8jw^nSv2DjU?C56OrwLP7YyuCuHs^jSH)GA5?Eb0x$QadhdN{W( zd~3B^e<~vvQP7Umh!GM@$6OqU+}WMl60WyMzczbH>#o2`i}Se4jmq7YWNMpj*fr-M zp-y5|aG**@Rc{OU3((>aeoxb`UB|o^FG$F@Ac&Xky!%T@>-$?5U7lxq3#F&Tq|;I3 z7fr>uR8{k0e)90}_gJ#A^~*93Z#&XoOMc)P?Xu$G4sL$FH9Q+*bz4?u+)o?uHE#{> z2jB2`efq@}su?{?z$K7M4G}wZ^5JrqYFzYE4O`!J2!1%n=~St)7G9TowXsRPh9lr~ zTDjT8uaQ-z@{lC`(n|dA41>Y-{G_kRj^(cL*(voKYrJJYC7ITp6ZfaoX6`Ra`3YYv z?bg+W?y>tEa;(|7IRlk*Y#rNluu`_0wrY&utum~wVN+EcI{3eG_2K1l9vZM1rx3oi zG(TK!d!95i`;fKZiqT_r_%DfSQQ(m1_i=V)d04Y8sfd>FhPOG)(|LQ4F#ScCY7G@W z+*o_Ji^^HzW4fDewMn{m>pqu3tAp81G}# zWgV#FE>D=LT{se^+Ol~Rv<(3{`m{Ely zetNvxv&x_K?VOlhnAhLRa-cC_udfJ)Rl~U!Gq10smC-ieg5#r zn_0h;FfQ9a3whsUmhc#;&akvvGznf9OpI^K4tm!QDelWA2TKG93BTEwJHuaiY*Rc` zr{5oxXDQ7 zT!c0Y#CEwh3>BC-(^1em-CByYSOet=Ipw9Uc|o6OIc+|?nJL9Q#~}q{)K|gQY+-Cc znDz6SlhA|gxQM5YPunV;2x#L?x*{g3X9)c?RSKYKEd8WiOEeCvpiI>_4VYJrg6cjc zrn&y!V1}CK8pW_@z7}@JJD>fjx7z%Qw%!Up{}&H?u0Ejd9BxM}@TtggMh?B?Jjv#{ z)B~Bm7q{roe>{czO<}sreBGvw+HQJU|3RxFMv1Z9$0Mc0|D}mK&R|);jHQ)O4PWJ9 zqyAupsqHaMZa-eljN4}+L73zE1szGk+Qg&i=Nfal+DS#aR)W=UXC!))Ibg?MS<{lI z|EW(73O1G@)gL^P;}fMIcbBGLq=>8=<_*<+x35FvD)KV+Wjs#N*F^~O?dzFUpD`Dx?C8m{g5@5xn7=^i^84sMZZ%(NEof`)4bb4q+}1D9x^Z%eX}F!H7&@v zUu#@GZk*@PelqY0;#c1IDyJo1{+;)uTR5|dY(Hf6qK+=;I_2c+Kz!x^!=jOCRiQ)2 zjqfoA2Fev;n>208V=FLM)Ed8{})J zO}~(OYZ#6vAK2FP!TM`5@@IdYYWZA3$Sj?9zWLQvB4N{UwBEx3@4$#DLn-W z*Mhre(?_MfU|+!&5{hO&@f-7-Iw@XfytdLMmezY4+VfmwU$t6;8OEs#1j$un2mi!9oWp%y6 zFjwL8>LBtp9SU#c%~?Ia-xEV^&njkW5!0GW{lU@;pCpQ_f4D&D7{uSL%N&8mx&g_? zisxZp#GV*xT#yPh5}genK&Wvc;?qs6j=R=tH+DRf8E30ueOAQ>BQsIwyT(gBV!vur zcKjsI|7efO7O`ItTOif@No&jb>47Xr}&eP}*+P=6b}W{|Cq+r5ISE-+Imm zvfK6z7B|Dzy!^iZA5zexxw6qIa0&!wetgDsFcqN+=DZF0clO@DwVqA{KJ_mlD*-CO zP6h`-bYL+1<7>z~vZB)caNHvx_hV~>x0i*CwJ4~zvg$m-DmKG(_5hS;W!yC&mOXmjokPN-_=TLc}~71BQC)LMm4 zj%FwT+JsIG<+9Hi8gASxNc3zdzdowt)Pn&HA8oVTyhNSX(Tb0Uzs{oaP|IhU>%PkN zgK-RD&+9+So!jqdVmd9e!s}|WQkKXijeT<=X~@S&cPkCiBc)M)@9v)K7dZL{_BLLD zju-zNU^0rgg+h()c1nH~<-ca;WvyeH{te}MQp#XtHC@B3R|2oM4ztNYTkC;A$Bd#E zcGsiu!EX+~SVFAA_>KMFpSCp{Q-PA##L@~VFOFxk-YW)eUATL4fxb(} z=);t#tpJ=yC8m+1m*vgk_U1p9T;>%DHUt$eHy~EH)<{8tKdwWE4m()^o{j5F*`tbo z^a6Hbj*;M%(UKab-tQ8pOCjl0pN!sJ8gm_2p4AOD-Nn?&px_`cHf;1I=o%L#!W z2p1S#w z9WlePFr2!K zx>GGR)x@=$DpP%>|7P40Zj@bEL*A6MiF)~Q4gdiDNA=q~nYTph4I2l1?I3uM|opL%nn^ z!0JbNUGz6>tUlt7N{n1O1OgDs!s+$(Fqx=7WCd-S4p~anvtFO^~G?Ct+Xp7Liz`Hq5Hc>FS$m*JmVQJ4QPOp;8I#o zZIp|Wgx?55n13gJ7l|ZhUbR&HTSwk!kwZrD>}F!w_`C(a=7aR7?vyF+{u7*jyHZT` zoDt`vxDsefRWKPRpp>SP0TpdLSxt=KHx}nH|I~R}7g;$>V1snJwo{y_|0ZY@pAD^c z+I@Ek^9;&ynM_DhK>S`q>GY1lcuO9cPn*pBUWOj9_V(_1@kSsoB7H9gn7 zt|98#*gW;Ij%*S_50cZp-O#%EV8S&N;;dK}U6&Vv?^ldTL(LrWi4ec@hmq62#q-kX)=e!3rTivYcA*#QKPcm)0+z2U%zhNa&aA2CYM+m&59OKkgtTM@9 zF%wtr@=NRW47J-gRb=G|U{DK`n{E>}d9wME@>jXdXE))J#75IEL-KpYO(tSm@26Er zXP;|1eYUHX*G_u&yPrj`TP9x~wNu#6QiRP^X%kW|ZUYoPkTE-XwxVEhlxiECQV`*& z@a{X7qJmlYllLMT>Ah1E>{H%J4 z%jfUGiA@w66%zf>A!2;w8s)-bz{D=;uiJGxc9wc&O62Imncdxz{@&t`$r>&ZTO|8Z z>eT@epMKfk_Y;z&XYq^u&zBbaKh+MINvCHK=2Ta(U=uxw`X!E8A@M;~JHkX?wdc7h zQAETWY{HRv3{h!m3wk#e#$3e;cA^KR61pFKe@;E5cVY;|ldH}UjTBiW8ohJODF zE%KjAbcU1hvk*4nQ0DEL@b?>$CJdlM-77F3dw$d>_N|WWmmofE5v;+Y7@2Sr>k#>_ z>}MX+eW7^|6jk;a+L;Vdz+(?s7zM`qik~`!IWrA$D?+Z~Sbzs;+r990J;W-;5H}6@ z$;yc@SP}N2Vomq^xA{u?l47BGBHvbd9E0(*K0>wPVT&FGaXik4Err-E>zKxIiYD^= z%>4U#^yh`l1(l|(PEN!Le^zvfi=taRm?nZBNvleIlKv!UkzQPx29(G@)Vc-M$d9cV5Yvr7CI9Ezla+Q=^!6;S?=R9T-)=KYk zBjse$)ef4PJa%>j=PAzQ;ompt{!;+%UHl)kFzWyj{X@YhLp^l3@aX79P#ekYQ5zHM zN`PBy245!*rfwMmC*)3j z3Ty^JR3PdDq{&@W8sXtm6zqpzNI!@!T_L90JGn~U551heYQaMNek4i1Bk|XV&(jIL zeXB$=Ty>J;@!Uyn*v5?9`DRV;V)`$e9+jBcmb9$bz(ENWO{{7)()}jR2Oy(N>J98{ z@aM%34`15R)tJA)axY@hNx134hP-I!s^JHGEhXiorA$daER9nEx^*@ z!5Kd-svO<_LylWag0k=@*0+|N-4ZZF%b1aTj%Xhig?b$cb(_~EerQI)UrD-Je)_7K z(}w@*6`fKy;LzgTp#T$nz8vdTO*y%3QeC!`q+}qSA8A%g8mOAEIPAzeo|9F3p&?#)Qcb`_;5b-vBSoi+5mTD_cR(x1bUW_@--oeZCVyYC3?uGU1{H9 zw^~E*-@YJ!-C&}8`!$Axk8F$Fb--fJYMjx%z@~KDx*HE(chasD+`zuwaXS9JS=6-c7EG8Eul8@hTLhqLrURJ)(*Gb<(3ZK@iw?rj7W zrm)ZqDL>D01Q|a%*xz*n@>tT7uf<5?r!_fKii_19*XGo2&=SV*sn*s0vO@b=a@Z#u zZhMyqGgpCkI7_sdDdlqk?fYQ|x*wmGm-N|ypD<4OGvtS`LTx4e(7VRzzcGGFD#u<) z+%`R1V^m^!b+$@EqB85gmFb8N15lp6R}op&f0Jq5XyCSle>Rt4)+G&K64%zks3Pi}aIV$f2MN7jw?nb7oX z^ekOE7!jJ=^IVQk1?$1GF$vQsrm)=`&{ISfCl&d>M#wM|w7jPiir2c=o;Zk_jXo$8 zQDpJXSemaKPtJHMNnL)=)>TJK6a8?sbTtCBx+!#aslk~ux^$(b`DnFZ4t3U97~0Yr zdf1eExJSCQ2wo&N zw}eZsMD)mzusd**Po;P0gh63A`$#64~s3^fo|RiO(f@Qexu$ZfM=@JS4z-&)MA zJ7o7gEiGzV3uB(x8|9tQmA`JWGZOAs$yQXD19%yq=%4c(QvC1n*X^0X= zj4RWF2kHy3ea)(4jj?od&@ZkJnry+3zdjFk?EZ}4*2Jy|5kt|$-kvh$SWIj)3a*O2 z4~u5dDuQ?#?HZo}T|7decl^3nLO*XS@|82qjSnnno|xu=MqNHrsGlc8{A4ai{bb@G z3lPs`40YR{u{%9%(wd>ni&LjQ*sTkK02{A;jN#|>_PiLR;E}nb(DR>OZ(xtLuQ#ZC z{?F(h5}$Y2Z5Tp;Mz2lbai{@Dx5|$k4*DOt3}{U~>ydE;eO4`nj%(ET9OiQy>OVR$ zSFCpE@vq?FcgjrdHyBc5<#%u~Xn03n66??TPD`P=WM9KW>vSc#p(hBxHrOUewjmH(5A|XRNu~ z8!8G3kf`B-$ld zoE|X`@v6s*8Gus!L{Qd1h&>pC-TjjEyc1d;o#n%vGNpdN)%jTe7Sb5zdnI$qp0>%R zUWZ)l@yoDk`TKtoeoJofPV1eFpgX`DpXR!_7d`*Y58|2AW%+;QJ`2q1;s4xB)gwV! zREu#Dl9CK=2`EnP8fY$1ex7ncl`aC==sFZx$tHf~$PwhXilq2Xqx%R0U;h(<_`CK zm|f{jD>(g=-gv?GdZ&Ym^;mZ6zvpXy@5(^Mu%xh5<94s2N66HT_-hbc3b}XnCA6+ zBX-g50k}>-;V=0*oz+7S-r3RP5Fl^(j4_A%kFD%g5tME9#GZ;SoAhH2{Hn#EfuBWr z$BS*v0flRHEMfdF4pLjrlQUz1^hmOBQ|53}A+!-Kv=P=(N=Uen@ayx1klm}2;dHaS ziostJ%`QibLm^;9oeFC!Ltc0Iy)d@3*G$EG8MYHIU(GL$SshBo^N)4#5A0Yr2CSQe z3$GG%LQ7Ow;)Z%uvF^7_++Ksjr{ID$Y3=?{+E=T2gg-lW&*48hCC;S^0(NAM?XC@5 zW_ly_5NY|}VCL9<$WX}`>D)^VMr`87ef1Mn>W{QPkF+aB*=tk*{T@iE{ z=*dX^aIKZys28FxHVPa5)B~YFsV%E2=s>AUEjI|03B{7v50e?JJ7|xoYjPy97u!0a z*s@l4jaM7|%+H#>Rr~(FEW=gn!8@$_jfOhUCNk-(E%XzVc^E-I^%hmriFtfp=;4jC z%HYS+t?9x^ux|)jfgE@TD8AjLkl0l-EJ}5}lQ^=G)DMiX8{Ny3n+#{!%DVrCt~#|C z9_i(^Z;M>CPPZs=jWLg-+CEtqwiDOz?~|c4%`Nvafu_E#4Qo?L-Ny5Sac-`MmtCk; z))|4PBb0A#L7H8BuChA2wkrmr!$-dbCY6+)Mat{*_I9Qo+HL?7QVtBP;?TYNC|V5s zN@`qVmjsJtlY93pKvaz)sh%d!gbsLIJTZpHfuMYP=*fU z8WKC87le*}2nr5iY0Y<0m@WCSudWqa?nE$FV?rP(OE8oUkl6s4ePWXF1L)nXe&C>y z@(*47P3+N~Gm_N4YF47=DUtbp;mZY`ia7ULtijweWkEzZvH{MG4Bg)PcZ1m-8sh9_ ziHb`SM?l4$R?DrH+aw9ps1o5_oz*12XyuEVY1UClhHM!@TUjLM4Da zFT)sumQa)G7V8V6mml*hXF6md%szou4{ZSyg*-5_w*o&x#ksVQ;71?1Z zxK>l@Q@85pL%Wx~)Hn5pz*islg|9QJ10#8SlarA@jn8>mM}se0X#$-RM1FSpw3niz zGdlp8(J4G>SgcwWlll8%KqgIJAXf`GY_Du|5l{7Htmp)+ZL}xi0}+zmWn%3~Q>YdM zj2&v9^I&PpUTUhsn>gjU1YmOE+&sj6-yVp3&;eviyjS8~5ywGIr@z$MY%dr&!Xj~g zxw?^8(unoP$x#5k{ijHg6BT_}7f$FesIaMr`5&Oc~ImM26je$FRj|MNSx_z~>|$>G2u_xZx*_ z1rz=K9+@fya8~#ebcyYioO=X3$BzMzB|}rD=gTDdkFK{2Bj8jQ*w`VKzkUvDk?1R| z&0ITsiha%{sbp5!dXW*qd)xmIVar{O>D`XIYADdR9?->bXtFaRJDKS?#uRT1?G`LWdGR@90tgB>4rdgFFJpH$V$O~Qdz-}*U*u&~G z0VKa40tyQ3l3R43&NfxD6fOX=BLr;hfIm0?LZnm1Zs za}I-L&6*tt2ZnWHKv8;fc5EQ#=@Lo4hp4`yjfyq2VjRo_H9Dk^y_$Y9iCO^hvFMJp z(WO7u#~MFc#&->a!JiYL^XXTw%ubw7)OnrJsT2$vtMKGQtk&2RvE^T<*=USDnX1W# z^rbg^^8fzDV6$JJ)Bdxe0sr4U$MJT1s0NDNE0WjXcmK9aJ_2=CX8X9WUsuar)cDFF z)ll^cAKtvDmR{L(c^dhT;W^y!DxhI0=cd-nK|4@6!wau&&HWTr=JvVqKJ}+*S%dk7 z%da_l=VpC1i;{b}4$#XjZz|X%@vK+RYN%}5x#oVgea`X++t!n#3^ikGAcEYwbH%+;bvjs`KW-wHDP-?BW=I9)`9a$Q;o z`L6}yuiL<0NAiHaymxfVWQbe*(H`g=ad&rzXRsN zmB=`n_7Oum#lSjMb2D!trjxi-?L*pV`N4ZFZ^V|Pc~$YN<^D(y17sh`6lzday_~q? ziMNz?CsTW?hi2V^zW7|~)1kxu%EoLQdz+1^b%l4C{#RJ>IfS9t)wpJGQQpsW19*s= zc%w1_Bllz_ZyrCx7|Fu>H8UA)&7*Oil8GG7Ez7M`#MIMZnK+I033e-)4k-m!h(xuL zQ5Rk;*H`=XNGXT{H$;u|D;Y$4w$vOF1}bUoRx$QREh{HXQ%WnQg-b)P(65?eK4~Jw z>cZgDneR_qIA zgmvt+O!Y=X6fK&@>e0(liAU1=c}hgKOOwBKmI4Ddyb%m$X4eo5RP4({P_t(p+=Gu& z!!+hhYVcswN@Q4JDr(12tduZP17i>YzOxQT{OC95W zPXPh*;_uy*(W3O?6@rC~k&U&aX5=dLdY)plgd)>raDO6d{84gub6i{1ildY3n zmI3n;Ofo%5R;0XRJSFG1e2QvN_r>M9OhGp6zj6^3Eogn46?S!&(+W|6Jy!E+g+u^G z&usOdYRE5ZWmuILlTAP$g^$)*E^{Rsa`IKfTSEKiO}SjEwk>Je319OHQL{(RqCOWEWMbU&r*@6p*Vj*{q1oEuaJyb| zk$RqCJ(Xb}V!aeDW{`LyP;O>hMps8+TW}g2KO0(z?Y?m5sR-46)ytJjLkzSPP`B!t z%ZUzgI42pK`D$a;ZJy!J%=JEO*19jM(@i>~dw{HxM;RJRMVPc|KoEC@7^k_gt0qy^mY!L$Z_9XF zR^_JZo)>io<69jsnnnSE#Zr0r3>6nrQN@gubjP;x%L}UfE6s%szt=6?gDq0cEjmkc zBOaJfg2PprpbeSil9g?HNNW?<=Erz|b9m_{-b^veQY+G_8MUE8Rs0=4^C)$I>9Bt6 ziww^wXy@Oz$O_1(|6+JN?DwxgzUW+&|687o%9_H@(Bc3pNZ)7mkbtuOF=cZlG{a!d z8u-vWZOUxgS;(CA_JLcjk8%H!TOU=bZZ@4=vCI{sK){o*G{sX~1wWY!)p9mLI|^fj zCPXoXMp{R1an=xAcdMipcLF4_o{_m7h@?IVK57i(`pTN(2PLfj>o14U&BtjO|J8iw z+_27;92327zXGFsj5(+fDs-z3%Tft1@7+f&#oiK|j1Gm0ozomi)#7XXKBuZr71JvK zX>~(_*($lI&tj$Cb^u7(vxbJy>Ne0020v(y8>Fhan1cJzpIc8 zm?cYbjND%jx2pk;tk|j>H5>+NQziLO%`hhQS%_2~DI%sLQY0Ov5!WQiu-3ax;A1$6 z!S7G!{|1NjC})ML;yiq-E-U>Rs>3#UiJ61G5j}=7y!lKQ1)ND|sZ+thY@Fc;F7r}d z66m;LKIsf8Ya>1bN)313nuDsX2hN3yp?IrwgP`BC^8)ug?4^$dv>Wq|xrvXPLD+~t zi*Q5xCwlouqa~X8TJ#{O0z7;CE3;e_ccFNO4nLkU*J&rF@(e;54#(PQu$s4G0pe+k z*m_SwFg{}hM>%P5YBaPCI^f6RXn{(Fx~njgkm%G`+LK_5D)=>Pwj|k(2~-|?tf6jz zJy(Q)Rfx5ebzhh&RGB_ehz=D6ey&;SR$TPLAS$SW9pop?hCLq}?I$$Jh?-Txf-Tp_ zFptn``UVvthCiS}l$iJ&<2$H0cNp}gv(T7@eLfbYDwu`6j0Tt*Dx%FO$aE6i`L81~ zWQ>m8YB3T{7N==eXUNV(&Y8$8%V;bdYgHkcXSI6b#92rQLElOBuh~oTz!=Z6E#sun zK4}&7@J~3QE_4yqF^+#7T4mmt{R#1DR<#iid7EpnCJy*pHW9}!o6x->*c0r1(4#KN zZtio__S2~Rhl02LDEANKY=}{B{S_EluqRn?p+-@qf$vXML#c(QBVEs!f*G*i;oGS%8N z^G~am5$^;`2cm4*US-gg7?+RsCs@5VQeUB#-A<$ge?{5ez(vmXAK3>n^bT zik(yN9pe{r$|MET>F*pk-tR?maKBoO-CZ4pZB1=9Kl{wa5$CQ?A^uwVeCFnv+9BfS z>o)GjVdVXk&wL__=rxFUoSKliCj&tY&!-;##yK;Q_tyx+&GX*Jr*pNDf>5pC9LF+i z(r%7>IjB=$kC2qu2g4262CQ@}g8O zN2K|kHg$~M{x>m~TIACr(r6W6wd<+`_K> zy!-{!A-~iO&W{&QU6W=btbd8Mba9%I&hBp5lM{NJzhSpqa?rhz65m_e3#%AyY@Np* zUM7_LV@;3hvhaLGlyCmFfKXciu2FT=ca2m&E_Xrc5-zs=6?YD`1ubGAlkoen*=RDN zO4m{o0dnlql{0TWR;7<;t$=|_zVTOmS<}7EvsO1iLGeN(RQa$JYBJMrOC=L^OuV1( zZj+MAo_IMD=Sj!Hz)Uth%a?d6VwytDsL@L zLP&{gNcfit_*!`Mqp0QL<~g~Vhl(#Pyy1a$%hN~^W_C-7;1E2 zJ@YPD{Qcu?Y1R&E0zs3DI`N+@TXOI zLUijn=5%H0E+a5^u56_n#ctKrT&o@k+~XL`!|#M3ZeTAMa{~XBQ;YDgxd>QkwZpOmIY)n+Igxp;3{tH z$RFWT@$h>Ms>ztBgY8?9ZaYBn3;AVx?Afb56C92Nf(wpevyq8N=!%`4e0^O6AkP!4 zsYXif1LYu!_!n6Yi<{O)k5xhQO-GYQFWZ0tSsCAf%MA@}S;FtVD~682u>DYXz){r) zt(%W=pK|k*Ilu@nZca))Y_Fi-1;j{xb@aS)F@5${P{SujoB~ewrMy@((_NM4mof@e z_%5kB^w=@=bhnY4J~?JfK$;>E@a$q^*VtA1#C*tPE5nZRSTg0R{ICwa-jd;_mx^b* zS#B$ioXVIWAI-L+sX1wgb?vuxDl@f0>3IftUQvVcnv*_#rwk@aK{P+_D<)se{_uE< z-nPND&g8kURB4>BQGd>@-E}gyK@Bjw*8X8uDx&|Npdas*;qS|Ykhl^y4lxrwp4}-W zm{<;v^Lq4a^$tg(4k@_yQSirTJfW-2aevN#kTxLJ?v_tWI3enTYR7_d9G{JQoYgpu zC^MCXaM}72k*%>(kopBzzgejbXjC4w;uLMlSipjX6{mUT+Z`j7VpFfeX|6a_7IRA*-1;;%R&*lZsTrRvF$ZYUm)l4Llovm?V@Wr zODv9T8)85Rkkkv+fIPFpvB1O>t6Ow9o6UdM@#AzbAPef2zCD}rcQmTlHcRNEDU7V7 z#yiIm*q!g3*TigM&-fBZTU2Ip?f7B`ayq1_GlySm$;1oSZL`7as23lb0CS$rtwHp_ za|ZSct(f8~?4)NmDWW6BZE7{|@C6JIWh`$rcdI0=MMDIzRw4~J!G@WZX+X@>I48Y& zKMA1pZY*XnsFup2H}Vf@1J*Gzz5ok=syi$fdV2T|!ZWxaAc(~iR=aE`kdI{J@?TDGni1GRGv zNf3pS@IqJuk~-kDiL6B;LV4^LJjBxh0P|Bt-HIrNf&2Fhod0@PNc3)J+ySfG++q8n zP)l@Tx0j+PYiPn@doI1PG+p2N!Pi=x7?d71z#f%`-ZL8$3toqXo^0I~%*W~tD_%znsy{_J?%h)?C)=&EP!lTPu(UYrG zfu?L<+U%Ybk~I!0K`mINI=G%LrBvYMDu+0K0;q5`O&VR(NKUf&RaimmF|1K#OSi!< zO~-gJ0@WI~+`vTC{ybk!oDUqIG`=`4n;K0GvXYtw5-9>lQ#L*%d=NU)Sa(W56$PcS zM4kAQv~$-8=yu6K#l4$;q6{z3zU@3)8rpcfV~>GEqwR*w4;y0=O1v5zoa#^VNRtRy zbHO_0OTr3ucgAN-2M2zk3(SLzN|TIP2~s|RU!CkCl8R7)+hA#yRS(DMU22C`6_|lM zyRHnK#xF8k5<=?!dSJyEt@nm`piaTG?Py`_|JLHxhaYYus+C{j9ZKF2%4luU|6qD& z%uoug`I(+~vqN#PQY3nveDx?Q9LZ7MUEPu}Hm&oXTTEhFb?0|5%#U|-tw=t3R5T2y#&-02QYpp2nG!G4_xP5>)m5-v!NbEJ7AV@lF0 zvhd8D06d>1IquITzKb@0SiM2{o86{(Z#$LQOOf|-K4rPAS3eX23xJKgIqoBioA#y{dg@r9$V#Z!wLi4K|oGsO!d@faC4XgSGn@l$_SQ44Hdzt@pTIj zf-iK9pB>zA%L>cTrw3b`?0^oI$`374NNyivE*Wt^I9zv>N`R61Azv5uEt;J9{lENc zzfQ1Oe5ifUo)Ya9wHt~@q5)YGSRzYqRqqHfJ>l9-VFc3YD966^Gx^h_`Ld45x18T} z;Yr+{t;{XfJoT7(u!v=}1H`tSQbKHj9B^YbdN9?a<|2%(x=Juw0ATt)k*xKhi++%Ra|986%{X`I067d)@qX!UN;SUwV1K! z!-Zi`tOj?Fjau;R#u8zsjVuWnW9Q;pCEt*;RKY$4XZ&w;>7%VkhE^4-aI%?vTG8AK zqF6!iF{YDnrCN8s;y*3pG$$W-Oa55#n18Yu|Dm>&%#BoabVkr`bThV+j_&tYl{~*n z)I1`@kX9_9*S__WV41{WGO~alPe*ye_Tgi$NS~&dQs7~LQ}kk{L&E(gsY3Y~p6%!1 zJhUZDA)-t>LPQKmrYJxbzCmoB%GyAzOnMF+2#l$5hiNSxL#_DxxUhrnY-e?Bhe7(Wd5m0;QlBYR? zep&1O5cd)*$iDo7E3Q@hNdLuHG0>J4o}w;xX^obu(%9R*w^I|1(6MBt&nNqHj-xDF z49y0iQn*=!QfG#oy60ML-EU!HZz4tv$cK($ zi{t0X22ZSZ*a8@~RH-}9dA{vaTk>A+d7=~H>d>TYDE>sOiPSIRt(yjJ9m%c)Jy_9hcJp=x2^+{7baX){tjDhrj%ciA7nfpR2MjY zt0+W+zy}2>H4h<%LOm1X7{GeJEQyR}baVJDxw&V3Nc6_99i{Q=>Q1O4OEv@Sk>hI_ z7tOuj3)@W?RXyC(^AiaYW+G@JO_e7~bfIJ;O^s;?#O#hw(*uVE!#k>ek!xqth7Qu? zY3qkyXV{zT_39}Ekw6RO^#$PdwMv3{2R@U-7CH9vdOS-z>ZeWh{T4?m4;{a&AGYJS znDy&xguF58VBc+1)01kMPYuzAf@~!A4OIQHWZtL-o#`)|uX#ZPg5}u`r!C>as9I(? z-HKbFoQDl174QTu(O zsON-+v`MmTo@04pC1on{FE74!n9^&rS$$7z862Wx$$D;MudV_q=%28678NqO;W|gw>AP_78QR9=hCUaTn;_Rc2zR&Y)(hTkRP?93kT4o<>#OY0g|ljiXkOvINgSQBZUyI=N>ejfbN{|kcc)n z&QTdW(dTSOp|=HIdltGNbKWm` z7lg+ItCRV2EYG}lwBxxJ{@<=<1oplW?|pMY3b1k|GI#&R6rPR|WYzouoyTIx{$xcj|kvYTft!?}3%P7$QA1Qb@XMy^Eo&AO~7&YD2_PA+*Gv zB$37iOz~#5tq=@JxRJN_mzYs+=(_B|JsSF~Ka8G9&`BRjkva;h7JKz%y~Fy~n#6QR z$~!Yxhw1iWx}RJ92xw~BkX-DALe`^YaZ2c&TW6a;@VWXNb|J>Nw+72>v?-}=5>4Xr zN;&z6LVswtivsZnBpsv)3x{1g_?KdQ(nRjkD`=e@CVu=iH$4tH_4~ft8V2sfhkO=6 zTyZh(Y#U>&`)yBGk>^5EK^k<{YG8-aMZ~aD_Dmt%Xuevh#?R5XrmQ!PI_P_Vu=-f)Xp&|nG>5S2 ziN$ka)soQsCh`pA5ux9t)_!89nGa?BmFkw@O+q{|s^m6nLY*D|*`fP)S-HWP)dbNj z6UfrCqo9(KM6IFdb`o{G6~@?*)Jc-ZW|^hc4cFTT3Xfpi3mNEwBelh zo2Gc$7a1p`{l<#V)Z9_r$mR0*!uw7lhl`=Y2}L#IPe)h7`LDVyYe}hnW)iAQM}ccY zuH!?awPTgTQe1KBbQ+_ALW)M0r>N(X>qKY$a9+OBDssK~Sq#sHdz#1-X6{6b^*0Gq z<;fD3^LMizQ#>61%`|lbDXEUYg48Rf@r~sMqT>yE!vLwV_dnSlaYcf-H*ixOF)Z`~ z6+)B5J%z@NK7g45$EJoyw!R7hmSQ_8H1W*1ZH9YQv8capM$Uac=Ym_z-EsN;L)ngh z>daDes&BeFClF$0{%Jj9&_Y_GGimWFgL{d5*-Nd&rjh!cUP*Ah-Z+u)g;ZCq8HQBr z6xtuG*YD&K9qw^WjCqtQU|$4)heg`Ew<0&)JR7pLOflzp+m|v)(&qo$-j_Jz;93hx z)t?R31NhHF;9R|(Jc$MAv4IHT7$Edij~1IERwkgip(Wr8BC}LG7M&jIb%KW^v1Q6f zZ=tD)Gd=UVOk~6}k0Qb1dawl2+ zec$|-n4y=)F);}uc7pY;Im=_;$EMu8tC9LY9}}&+5+K<^{I;{Ws;b>qGW;5}0sHKN zR~sX=ZW&}yn}{TsrQq(Lvh2FuOvfH>p7QGA2s5eU0-^;P>PPLZX}X<>gg$M07BY^x ztA5l)Hqrd(Iu&`q-aOVArNll@tFuq0^%Cmag~kDP6{DTL{J(YuU5bPy+h>AOmY8=( z51%M1>(Grb+7Z%NbF>)}DyH{5OWNfEluzi|e$2BeW;-eDJ%U!J3N>*^cShat(QiV< zVvWghX%iMFOhXQwv%U2bg$+3q9+MI2eMxY-4=9hT9F#qi=`D`rlx|B?1(WLz##%(x z+3vKot_cA`39~ZSJ9Lxrgw);&U&w1{F&)xukR04i2EC7Nc;K|LyX_k&2_HFeNbf>f zyo*iqGijBZCQ_0Q#?rlAaD=t8rc5a<@FMy05Sa{b2`7c!0*fiNxD(KmM;MQs4R5`M zgtz3$3$o}1#&Egrr0Bh=)`JwaZfV-!a-cB0V(2K9i2C+5+{pTNGO#(ICRACyop9J;ZB}^S%9S2@r1Lz5UXK`#6`QD>JAvk5dd=k z0V#+(7_&p1u}3C98P@#Vf-j7<_4*G7v^JP8Kj=&gE3Jt;<$LS@F9=%#yk9~`$a1$* z=b80ibrC%Df#xAw0N+2{tPrKHqR%dRpy#VDLxnr_jbV&);*m{(S%0lQ*h#m2b|H~ zu^GZzoC)s9BNj*h3js)8komt5sJ%_h{ue^)!C29q6Y%;4jb6wM53xS^uy5BJB z->HM3=_XucDe|XWTt7B+zbzEeg7@GLZ(|$+sT@2=V1e(cOhl&<7)oW3{u-!n2e ziHHU~Sq0Q-9DY8z38ZZ`l23x*{;mZNC-zprpE8e-kSYTlKYu6AR^?#!l^}MhQ|p`{ zcA376iQbIhopGO?flD@YZlJtqiSQj!-TP%jRNuaN8656@!`Lyn0`mggNa5>`4}w92 z{h0f8J9i;HfqEaF`U!)jsGo}6L|f%R*R-epC{3mUQ%Gq1W*!qu^lika2nAuoG#tn9 z1tHK#xyC+C7LLN>8`%K4)|Ztb542aEAY=M<&I@w{8Txz@n0;2$_d;v7^ucL_Eri3@ zyJA6$6(dZ$h@v&{1@3SKlfly+L72ycLg78py-vI}rYki_EP+gd|46FJV$(4+KSm^Q zEh3mSbDD|uxfdm~VWW_hqf&qP#b7QCUXvpoQPhrutl4{K;Qc&j#`}N7o!nae5R|gx zfcwAQ)~sU}pYB zHh?GuZ;`vhEw{#&8M@O9MbMC-u0@66m&jl$is2{TJn1V;%lNGl!HD!lE1{vtoyFU_ zYsVTDeDN#L{0J2y2QK7VcbHMSMaWw@3TcEZkPDt(3!0Yci-_5P4SCAs1mlK{es~Hd ze+nkl?yY|hW*7!s$GivA45uY7_GS!y$GPRGms*?Njx^Sf0>v_aS%NFT-bZmOfGYs( zql6B@72xgz-HdncO!TAt3AL#Pdt$?&IaOnscW^QM*qa7-!l;WBoB;EOW<|5_DIh*Eyrv_e7~NQ^fQq~bs`5)2QD>*csGRzUY7WOGM@ zV+=CRT;z0v9?sp>9RTjoaiEI+4{0id2mbgoVP8i|Ji}PX9V;}EP{t{~oKnDZ0BP!+ z2dXAkKMH12JBlRi8!e|KyyXbKQIX_OF`@aUnEK2tBdjNtb!P&9JU|?LXBN9d3X*hk zQ2YRuOFUs*+RIq1=tUD(yi%=gYFK4L%2~`8vRR+)WTS&CCPesX=*Dna??P$3gU!hc zXcIgq_L~m+Iu`!J(SY6vyxqyQmyAsp7MNbgs-wl6Lg$wvf`Un5Ry)cf>ic*SPV=9L zwSp$O^V0~7?XO}$x<69KUlvZZqL#YnX=fK$4z|VL0bO5Wp+gsFOu3|ACrT#%ZZEahUbLNSJxr_D@<(1}IFw<_Qe!D`m#UUZ6zX{n}A)XY>?`wKGjoUV2>$JK0-)z~^=rBm+6I!}^*Du{8?t;DD} z0+V;cSawt)IonaF2K3J+$fISVC16c)BAr>KQ9qfuRXq__XRr-Ald>$7$U?7@1ukTOvf#1>N}eaP zd7XCn)My%4dwN!-%Uo8Mip&5PwRP53qk=N1+?{3KjZ`H!P_5b~8&9t=wb+Mlh?;@6 zCS8sb4JcP=>OhK!hfA3nwja315Xu$j^HIEuRHlQpP!FR7Rw{vPyu$d^N$PR&QA`I5=C^-z&j-eSzL5MKD`%vQ zuN!`{N&LIw8LRA3vMJ^BoKW|4Ew1$O9Sx(JE_g8dPKhij0ze$wBI-7<&(O~Lwr ztMBuC`0tSjPv_f9WF`MkeJSzGw*W4Gzevmi$zi}V8HK-Jax8_>;XndK%8lWNzc*i@ ziN%-==TOf*3lS6)%=<2@@i^Y&->CvF2NKvbZua*zh2{KjQBjpdO^26foTdFOh7

  • OVkv&S{R8D1{JU!W zd+{Ai-|5AU<8RBQ-)>vIPmsjFxvCuge)5=~@@abu_8-6qQA;9~bHSbyYcP=7l{+FII?$Vg~)#M$wpMy`qztX3w2@Ae$%{}Aqn?hY@ zL7!*#eR2-w*n(zk<{xIRZFe)I7l4MtBVIw!+z3R|M7I^~TXRGuJ8plT`2XNSA89u8 zgR(r%ja7!Sv`f8#f%2>1+9Ek{bcDWTHDdYg_8*wqj2l>J3MO~`$f$20Cl@V{ucg0z ziBWZ1wO8?0^&Rb+kYJ~rs9>>Fzz975YEjQke40a(q%U{Y!&E!7ea?ec$b%Wh(Se2b zt)iV>LuvVCT1#V3^6I1?F6ugSnT>CmFaZy(?cxK_pj_nRaA#D-n`#q*RfF>U7Q@U| zCiEUoPn7kVp5KBq?tDu-cT2^{c@ETsA?K(f^nCPD?d75{@f>jJ!T$`gP1|fn-$&Eg^Y5naaQ8-ibBH@1<-c5PJv+-D_S9K; z8DV8Fwjod2kVrK9^k-ff;ROHn9j?4GQX2rfvJ+mtLfw&HdGn!qUujDE2MA#f`}|2J zzIfJa<6OJTAced>&oY#vBi)_Phd%#8HrD%^^{o#4!S1|5i)70aZi{~l@5!DDtL>Ni zcG6=KudHxFtm@v6zqXlPblfmjnsA}qS@>eM#KbT1U+hl2VdTC4W^s(ZDziXd3F+Xk zE6@gblcGFPrbzxmUUfFF!MNApuHCP;V$Y8JyuN=Mv{N4oq=UPsYx@SD+j~A-HTQz} zYjn>o!dib?rc+%t_ksAkpkxG;WH5f(nD$cHI_9z6%>A}BX};9i@ueOkAPREK7}39+avX=fm>%WQSf)H&DUwI!o17^u!J`BZ&0i;{o8aYVtouRHyA z@mc=l@W(|p3EEqiwn9SN%z*FEs}=57-*!E6`$EqvkK+<|*I0#to!RVR_>Hn zJQw73JI_00^$F=WW+xbTpXJxD{mUZ+VQw^bl$gtkK0PUoeAYX`2G2jumfs-E-3PQJ z)h(-H;#>v8wv>O4@}z_XElQSl1;W&waLyS#1*Q{R=hy6t*zbsBIU#_;3vk^^9-r8@ z6WS(jxLIEl_!Pgx+7l%3K`DFggeApDM0@3grR%{{2iyNc*IR(K6?FZBZL#8|NO36c z?(XjHkmBy{?(XjH5ZsEpOVLo=-L2iw_j~vI?>@Ucb2D@Nch0qhWbVYOT~%$_gvP2} z0=H}mV^gAY)0_33Kj6qSTdz$+bw<~wH@}E$53R{q1k7C)Jy(FeTva_+kjAoICS6y6 zon3hyR|tZg1szw&$EwL{Ae8IIs>y&m%i}+60HmUQUM(g|yzT&#G==tOSeg(Xbg-#zbjb5@*$AQCOS2FxzZ&Tn)fgzYP|Bq8*9((30Co_+~ zc9Dg-oU{Dj*Do(`WGg-g13&Kvd=7$^FW5)H=I#HKo&G5wmhd+J2hjRIK>tPC(p-A~ zBD>9FF*uQ|W>5pP*cYzUeX^wej$GXY1&rQY@tD7`^3JryQgyc#?klo&=v%g)kD6{a z@M<<5GFTHeUb+`)yM^4TD)nzT=cK;iMc(a7tztSc&YR$hN!6Q7J4753u`Su8B-)wv z5C&1k?97H7_3$-cgG@z1FFI6>-Be>$wNRZGKioEzjoFk0)1z6EAHMgrlaJ;z;gAwv z6e8?-FGO|5uBw_8lJ35}mQ>Dp2!X_Ham-At@gSC#7$=@N$*OV<>A>Hl!*$jgyKSl( zv)v1UOsU3RWKf64<)PHlvvbo#wEXX^Fd9uJ;VhS`hFqTO^E#)O6ixV@1&rA|#X$$& zR4QMsu~ya6C(W1QI01<1l?4;~T2zf~m0RBQd)~znOxorZ6Fwmr*WK4DAazQLM%9op ztHr3!zwPqw`jdxHJ!fjh&Fw2M>Y-h}D{tOgf4YanK)|h1z zXrVF!+WZN!UT)I=G=eH1r>cpeTG9%pv@x5Q zsODc8!sL~_GL2$Ijj9<6IyLhH!n4^aMeMnRF%Mk44`yfxRKP;+57B*s!D6#{Qrz0r zGhBm#d|Le4w}pz3MRRJw4rmbNEN}s6tIHIPIM9^9Zbg%>7AT<6SW^wtiFgl$))`f! zT)nSU;U#~5aum}E+6M|?+>VB;miX~}t+R6znJc>rO#<6Epfx-zNGT>O1aU%vx17ffXNEu42 zf{OY1imv#LML&5(o?I+_5z4ZcH7}XX6Ix3s{f)&b`A*(dJbiZU;{AkI7@Z~rswtQp zq%I|?!Gk>tRZduxQ#9ss19+Wxla*H)WsDOQf!ujqq4^L z%&Fi5P}u_lyqm7isTw;`$7tv^;IGFh8aE~04_Y+w)ikP;oj4J#T&l+PNv*gwrSv^D zMUytVWX&3MV;6iDRV{Oh#w-BsBWoH0ZTW-)lck`Xq;dAWKzebus)>1e)9=!evWdAY za2Bc`_l88$ixpK(%IT9dkLxgsniWjSS(7y@OlT#V%BwE2zZWO#`I#&QBz26@>_st2 z!!8AEDtt;mDPImC9mVTO;tDS(YIO{Q01b|ddcn~*w=AJUbdkC zvo2fuw+62WXz3xe3U$|`>vVj2=Z7=B|gtNJek3~1k76M$2 zM@4_q^9i#x#}lV$$`&V;azuQk2_;NTRF6#hR(O=X=de8eorct$ZK@EzzR3ocqb=+W zEtt#jXBH;S<~j`t@Y>v7k#KoHA4Qc&t($QKif7An6=K9qP3O4JVHF36h^r~v7%hOr z=CHh`vx6LBv+4G7xF|_^!*g;CVaAl2s^znKy(>Qcf?2ioE*o3o*0SxYyjsFJw(Kbu z8&?6Yd#LtTf6MCa8Ossz6swFDatuzegI2aXFU%Xf*9PS{QE;hKN>4Uz(!tH;f6>jC z0WSJvtR*519#R!o=HEA>3vgAJTP$Hu{Z?C)c(L9f%vMvOwS=MtrYs6rVmUXYI77Dt zEon+yWGzNBx7x5y9t(|E(Wwp{4`At(W*9r?k*S4F{a&3VtJIZc@(9wRlr^=hHj7=X z*w?7$2((l*tik{eTBzMsnq>8|mVZ}6J=QZmL7>B_u4`EMObvfm!{iK|8jhiXW#O0X z&-~b;$ajF^v?TKX7FaqjdQ(oCtS(_oNHm4f*%0eyb_8 zYsb*X-UYJd4^Zs+py7=qk4+!X1tSv9i%NT;$x#UhkoZ%OhyJPOf_?7I+VzRWibMjB zyHuAvB$cyV90})592bT}!n(V}89WK+`FxC27cxKG9UpA@Lc3tX?gH}yWS4*qZxINF zJJhT3-2M<;AU1>0-V{2yaayAvXx!VpA+( zcMrm%!B`tcGNBN;yeW|6#d}}9`~lV=KgEh<Ej^2lo$Jv zj6#Ji;IPpx0Ha7o;UCL(p&_ZBJ|?#}$CJ2!O7;-$NapesvtUXfvCUHw2Y0@CN*%hY z$A~{MEU3XSQB^ExOTLXzmn|qolZ?`rE#Qz;F8~D+SXWeoy#iyUrUc&sG@Mo_*-$hp zn6f93Am=L$Gjs{?2^HT1NHn=>sP;l|sGHEi6@`n}qQ3pq2JWaN8jLzBlGX(hcIiYc zEO5$4C73Rd5+=B@B=>_WrS!nNqBBG)+eP(zPri~kV*<%^{yVA>*RlmQFbvPK1ubyr zTedJ4MdCQ58mto*k^%N5B4Qym1HUT<&JZQJ{j@?TN2GYloJ6u)q&UW$BwY+jGJzYV z98VqHfr6-sHIAeWEnW-f_EXQV%7r<2rLzhlAJO7{D-y{Z(c+S*1d`2yFAsDS;@5P1 zt5g(&yrppV@{KvC^(sNTKOnVW?vk^j1T3`&TQX;LT?2!Se#JDbv6df>EPe)liu}xp z+!CYwrbYQdr$}^a7d#Rj;}D-fy<78Dmz?h2=F!<3q==#$w&W z;+7_pgcm!7i&0G4P$~?o^%=cH4I+w`1D`FxJC7HpdLEcS()S{(gc98m1jh4*XMhZrRPC867qokT1 z-KAi%n+ZmwxU`$Ck})ed%Kv1>oIf#i2-a8pRE?Z`cZg*yrZ)x#M2qQMF(F1v!F;X4 zr&Ug2d9BK)#im8>PEA0IC7ohRt&6>BsDzzXzuN%0`pG#lD@7pFpzj_)qj9axr^S9x z?M_Efjm4Yjl^UxSeYQ%SR@0T%R3V%Xe+JyEHHfkv+YEnv1CO;kr)eIg% z&B5rCb)S|%jZ7XQgW701ED))Ls*TxyNuZb{lx&77t$cS5QtP90LRN;rxIsa)m6PPP zC7%}4y}7hO&XV;~KzlC-=>gdc21WcX2yzv&KM6NW0H+RP!KP|%wU>gFoO}km3Tk&B zQVS|D2{&7S+8}1>N7ZbGpmo(s6%?yKrPR4xaWbOiM@}C9=AQ_(HQ@oz}jjYDrJwU{dbVDfmY@<>ZnAxjk$Iqu`BEBOotE)3$HIM5L&T9TQ4bY zcdkrv&fK4kQ0ci8K9h@FMCw9SHrrAtyTd@_2!v|mnw47su}zO?zi@!3w!y1D4>O0zp`qZnJF9tc~=8A`O zaJR{7GxPtXD>t{qhqA<0Q?|AuQD(*Gj$Yjg3G2m&k zCtH;1Hhp5{l@eU~<&6^ckSv9#=bCIR{03`yU+h(C=TgNWTatX3W-li0^1`2cl7^P813IV|NoWP zu?XnszxeqA#mC1lebh?-<)4yqE$2FvEcTwoIu;DL6g9x0|8;^({SR+7@?Q2k?5uU3 zf5qZT{ulbaW>eYrd3#Wu2NrJfbxX6^_Ql{WAH3z!YMdNKP|T23IXju+n*WpKA%c0} zbh-ZV%n+Bj-V@OJPadBv@iwqvv_hI#QswI19nkI(TgYEI(GI{^;6Pap=)>!23- z7@o~Fa`Bu?ld<>%Pv*T5R5S6M3%nGNpUXqcgOBv4L}AxX*9#NXoY{rj#b8u0%PKdB zo4JuN`ab4?Z&Czw0lES;X^y;XaDzNK;N5#Xhdsqji7#Bi+80*++-Gd{-MLQlRdp+D;pdz zMOpZtv7g2GOaj;)lAAgeCD={@`wUMA2LkLVbjIvIRAHB}InecUwcNWuq5q+1>E99k zqsrgy+<+afpQG=Qif2JrX0ZQnb8m|Ox_&ozrusiA_m3BC*dWv@=l?iiI6KFa(ym+D z04t&{wRgCFKzx6tum&&e_JCCEtZ{M<$_GMQZftNTsYSjcFGl|l5BxtfFfYZRy2Eq0 z(ENHf!W~rwB-t8n0eVYv{c5w_mH2bC*{}JESInKSpiHaF`{M4zpOS8yN?>i0 zPC)quiJb%W#k1Te^3*Yze>}m$cV5NBE!dCTo-UZTtB`)g4V#5K)&aI1tznvX{mQYD z?CMSKpJ)v++4-FsY|z(<`riHcesK-+py|_WS!)_NYPA*;1~c9aSFJrR{)0!@FqAW_;XeJ_hH)i^-ccyE%oo~ z8~>ka{Xbi|f1dgOzW&<$>k!}bXQ$`&&$Dk&&!4A<3*Wy_Exvzy|3>!B|Jil$A=+s{ zPvZakmh1aOU>YlhU-X#du-|X1(V2B{`4Rx(AoppS`8JN(GtTEzS5|PDaQ1=U8NAfg zwYDMQ!Izm|=>=JoBb?KYTX5%81}_*boF`d=SB?qlhpByngxUf$dM(qE-@P}pXr>** zlJn#~N=*UF*~(Go$kO3L zK51V(ztuQhOUq$}G?ZitxB2&nV_QSI&=4P1tgpVnVGxNb8?D^M=~oTF$Vuo+4rBGr zkDJlajYVr$^v#*ssCC!-luvfB7j+fU!(I?47_j-QJ&+s7!frGsg0dmYsqiWk6N zF8@R_(gKZ5U*lj zPMM&*!OAaGj80E^_HlOJav#CN@OFqesG#VBgiZAVJR(FyAXX8FQ_*dDdE)kXx3iS^ zQW^22tIM0*;RuVjFxt(TLyZ7`~vVC%T!!XD@GHLi2p zM`n5(jI4|P-X#E%tlZJH74&dIhyqM`|3THfqr2DWr#_C~djmG1+>aznYJ7PSNI>*t zMn7J6(2>a?dnrPUS?uX7{>mA?WbqpG_p9HJ01l3n@s^9z#^u{I1SIABWn}V0bO#%A z>{~{B+)@st7%D=97$VL_ZDc;q2Wq69JhqR3rrh~JSoKWTclXD<2Jz=fLcU z;MI=n4QEsSH6Cs=2Qm_TP2P7b+(yfXcqDBI5) zN!@V)ZM-@X9&FirEIlue?VI@rF<^l3-Zc^Vnoc_N=JmD`M*V(p?M1Gqr3Dx9QwL`Y zzTf&LXGY;{%tirT#|mENuHvMS_e+P(<|anRn{La6ZKN(OaQn}I;m?JZaTnu<{`it20Aj#bQuP#o5igSCpFX<9aK%_@td${` zrBFV>9_0v;bq)uCqc-u1!sLjXPO45X$w22n4UL(ugj)In$!p98l#0+?S$Pp1`87K7 z$8fNp+g$HXfyn<~I}r_Ede;QE?P1XsADyJL;o!mZRtDo=y1q2ciAl7%_JHFx)v;|4 zMjdY+x-q1oL71w=WDLv3Qv-r0e-j-m{jA|Z7_Z#(hxo5Y-}q-@Bf%Z%9KBSLev(8F zMZAw9(OX~4NBnQhnBUZTMgpQQTGM*}HJ`3JjXUd+_wnQ5w^4MToj$A5(+VEOcDajJ z|6XvhH7{tGXSk*R4^IUm&!XYC{~KbN(Jod(3VBErc__H|yj{P2MZBR>{y(IJgYknI z{*L`@p*^6NYvWtD{cQBOMR)V8c9+hMZQZTedlSh=Zf-@ufRDlUQxs+jXvY)m9gZFL zWC)<)2$WAiSqMZiVvVOvd(InodNKlPR2wow=TP8dkz!)0^<&m-WF6aK4XSzz9Mm^( z8h=SL`;wNe4ehVWZJ|KkQEw%O1&M(xc!j}A68O^sQxiKt^E>fQVI%_b*a*e!NSG4} zH=LVMk->X2=yryHqZvB+oU%a!GP+OL9~&Eym>rRDF?vkd9Fgb+EWzx?1A5;`ws05O zN~5BT#6!N#v{j+(uFtbC6vh(N%3YNI*B-j|KA*6UFm3 zQnySO5IsG@@N`d6ql=GKqKk#asYF4OmZ=hMiZ_2l-oFO{O6;@RR(x_BuOlATW+NxC z)r<>`v@R=O<L4QPYtK2obaC=0HxBpTa{s*t-6xDuwCr4FM6KZiAi#MtN_?26csk zWWp6WL>f6HQkAb^Si@*zpnSct8utjR1elfN^|PY@{|mI>)W>D;dz6sz@gpHJD|w>|1!;FIQ4;PnoZi_02U(RYv`LMgC#8@XGCWgkISlF6Q0Dg9FL-;^a zO*LB;3cy&uOdc_5~pW($mVIr#1x3Jmb6+Z@fWZFWX#l~Me; zSI+F+l(P^`@5>B*B765#L~zQsq@$UGTtZ{Xi?QRwz^31x&qY?)s;i9rX<}N}Dhs(U z5?QU;dFj^|D-vhc+{D0S`KdjRsx^Fgj_nVQFWIt zXZl(3vsdJx+H6ywby{_hDeQh?4J*oJxTsA_YKpg9_od*pk-(-4a?1C?E20(4ky~qI zhnjuIW~#x;3+=?lRKG%>TAY<_LzTZ*b1f8YJTKHp7!&t|ne{+i^G&v1;B>|GFj7ol zFEG32wEMd;89`=!NwSqR0so0p!uU-%9&O~Uz?t~!ui`NQYP7s9rmw)LhV>Aw!HdbO(;~aR|l8 z3N%Gh=f%8FVR(;qgT%CtXOy)>tb|8_rJcn1IHXe$HE1fsJ(3n+D>KVp@*C$2i5kl@ zj`4X2&D$`7i7fT1lmCKAOMwY`(@b#G%yxN}^5;iI`g}nTf%O?P+5+hU15HJQEpl?+ zsK1l$7o=aq))wybygU)RH^R~Mh;W&dWuZg$cKWImBegtk(Tey z_e_lKzOgLu;?rwIc=p;l)1PWlQ15BM{TxVJFAb=hypEfDImzTD)Ke<$N?nDHrCt%w z&2p80**&d(3Nbr)yd<8}7_TK^E0r+BG$#q&2xRS3z)tQBpBq82apILq?w2;yFlWhC zE&>o2Yd;|BHikPCtR(SJ%whVoL}ilk$_$Gg2lzWa#4HlDCM1fn&S@wW+w?x9AIq;< zZTUJxuvD$Ck{sa6VY4QPMHit|!BFFvI}QEDJOfZ5!p-yl#+JigkrH;WIlM~Xq2SpM z8^*m#BgTJA@#Og)GfWV|gVDR1I!w^IlsbIVA3kDe_yxh$1$=ASzgGF(nzjEuP!lv< zOP|V|wl_a<&4Sq36~8)S2BnAMb+PpZ5eM!a>lsF5H> zJXESrC#quI5P}YuTMMQOCjcd#la2^GJ}d-1ewT%a3g5~c>URb{8cMW;2=Q0NBE2XB zT5K2E)u{ZilKz~qsJ8SArst31ag7sXgjJ&6ZVDnsy_G*T6+{+@P(&?f!EB2JZ9*V^th7pv<7i$CudD^{^E1?ruhktT>;&7!It zILt9{t~q0^fc4E7>whES7F;;p`^I9R-o{l~dcHAe$h7u>msX_7OBIVKinlsc1bm5= zRleg~yJLU1L6aoTzaoi(vB@(@`RqZN$KD}g6`D<;YFyU=)i~*Q#Rf67hJe|^nQot% zh-EwbRj^0m#<&xzQjl4^-}Rb>hhu{V!7(i(EjtE;1?c=c+ZZ_98s1bcx;o?+tl}*P z=+qv95Bv>48RF&|47&Qsx;8P;V`;{W`qv{bLzT8B_5vn=SPYZ?FdJ=1dcZ9llOAP< z^v602Nz}L7y3aekxVA1a@X(G~SS^mP6=D2F&-pn-L;Q|94%?Lm6K*WS+APEJ!ailC zVOIt*zxJ?7a~&0jLi-2Wo*=p$Z(!)y7f#?XYpD&^_l<_EEI=bivFP(qk~_6pvct^m*XWE@iMec%0xXWdIQmdDgWq8pNpY{H#u9G|2KSg>Jt> z4wB~SbBo4ou@xyk76g=voh}$8R`|m-XQX=~%U7hgO~hok{jyb;9Z9Q0om|f#a!D{Q zecbMoYj{rEt@5dYP6X0S8!{%|x)^GHj2#qn)W!EDv_hSDr!b80<*%;yX7`OMmjWgX zVfPIgyW_dAgz>@oT=M5-#@;7sx#2El+2Zd4G>HyEpjHxX1h*LNY|xnRYHAyo%Uf{o z-KvIWxgZhTs!(ECx9i1t#K?(Axlky3y;wr;BSRyvlGH}OU1D;IN+X?)C7fyC;iKUb ztDA<)iAe1pBLsYrTh0V8%=P59GD`iMF%zqoXCK||>or`JXv0u<)LNDm?P?Yc;u@E9 ze*jH1?&Lb|#JZKqIj`G<$-cwU7R4OHM!$lsWf+N*!i`Oh9b%b z10NAaRBQ4@cfL`Voz1Y$rqjzmtN~ASbn#In31ZW&nI8W>PYy*9DF)dAc)Dx0GMbB; zGTi1kzH6|;_+5mi060mZg@lSidh%0-`or+}k(@>XFJKngAynbWu}{fc4nr}bGs7H) zNGe{PIjrn>v`X|LjyS#PFbA>Nj8@8oaa8@UBr(UB%zH`)PPMJvK@FTZP$E7K_v$=f zW)FgjAHi2f1F$A-f!Rr5epp4nNV?2q1O+o@SQ!@WbIv`P=c+bDoV+LhZv+7pMfizO zg4Q=b*c3ce99QB$$k5|R>Ka7mnChnONM4!BMT!$E4`1zemJjibykGp}Hu>@nX1Uqr zBoMASu=?>YkPIU){AOZPvmt(Pe1o!6kUJeda@2F-`|VcE9XajOUT3(TfHu0>Y%k3e z$^64q>{Mo4F79S%{mWxh2;X3EHdg&kcC@%Agv(>#gct58;53XQ559~m4?sTRZdl5f zS2yqVc>@N`t!5 ztiw!0p?mmcX_YB3mu4|=>-T09>o0w3OrLRt9u~-#W`Ni(4U(rdq~SK|COf9(su=p= zT1anEG+}#9daix~8&~rcp;;m4X%ot4-&OEj*X21j5}aF@BRv@S)k{#c6%hTvaw6oKW(LdXzKPN<~>ft zzm+5qB<|PYmyH4tuK{Y~^W?3{`q5JdC1QCoZ(*}d*m3?4Mnh@|AU_Xu_Vt{zfn;+b zmn}&S6ZeUcGTn21W_bgbqG~!q`-|c+%ra@y$gR`F$PByV%jC6Y$Y~D~LrRuPUWj4( z`QjS{i3M|)`!~4TGu*Gkaq2TxAPyc^Q)xM*tXU6}+jR-=dS#eDK~FB^=}$z~&P}jP zIt>Mw?AKzI{#_L4FB64fIvjH#*ZZ3RfF+_v0*`H_sBsMAHjcTR8Z*V#^ z*fb4Tfhg>TWvlyoD|=OMjFD(E#qHmn4yKNL1afn&m%a-Cq+t5Hx0>ZeLNeJ&XQ-uS z*!cx)TcnwrZ5>SQTuR4N@@&C8sKQX2G!(#clwYG~K9qMN#NKw6vH-I-!>uhV1v!}1xQMHhs$zb4y+_{UrGV94L&?fAEu4L)uLZB0q^UqDp z6J}Zhy&Wf8A^1-DYz5HULjplk{;PnTuGTFqn43%ixMxzRHO;=wnRa@3f~t1>&+Fj_ zNz3YC)4S^&5h+B@bWja){>PX73tzioo?+mrZY_j1dtlQ>+2yGvk*A?PeRP znn-Fr;|;Vl=xo2nVU%$mbG!*?9))_c7tU&n@g~&M3gIBI=z7Wt5HxF|p5Rh9yHDVZ zT0>6u0^9UzdbqwY#C4U)@b+R3H28j$!wy zv-}YbZo7C&wUd!BR1Vn}uyr80F>6Yq85=Wfpi6HO7Jf4=x}!|8E3X%LGtA2X?3yny zj4G2%UPC+>mIJO$CRh?NZ?zQ=tL_}BH&~fV)>>d+Y|3D6aVn~nGOlordllf*0|3m? zy(=3^EUzJ2;xp|1)ZEUHV^bfy8k7U!vB^_<5jO}zDzs4$GErtKZJMQQN?@dWnr0*q zfSA+;Ft-tAh^P0cF26I6&f7c=0U% zYUR_Ik%@+Of`2Y?-wR`Kc1U2~HaLvdK=O=+%=AX|7z*0c>yc`*@AKr4!G_(ol_#mP zHNr$zG(A1}-tc}ZCI9pwKivu8O0y+VYW}qL2Fd&)h9IWb5eOh&`FBQ+-S3S55gJJF z(*Kn=SQP)20*&-Au`n^pmU!te2kt#K>~j&Mw^D}VFMI?X^Y^gcUzbl|gohoCC)mGI zI{6RkIp)n6zXr#gl=3hC3btW1Cvh7t+ZX8K;P!rI`|(QcglSO!OCnEaH&1?w?=R<4 z8JkJ;lpM{wXOeIHLB5z-(+DA6IEtx|^7MqLLN2Quxxv@DGE}zPVEEL$zOOVvf?1NR)8ZTbdx75ahP3xo zw+VDh4yAC&_q^53nCcpz#=ERM_0}<8a`v@PRS%6dCU6wl-3rr6t86Yq2K9n{0_oX6 zegWEJ6at1e~a*gq9__Z$`=XL7&n_nWl6~kT)VP2q% zH2*2{jR_0-!Q7xjXWGK*{iM7PdQ~%v?We4$6B*tjenp%3i>pCMY~ z*`K1uZ$A!Uc%nZKwlBlTx7s05A@E3$y5Scs9|+oP0Rq)4`-}R1Ge-YFuA_7+U+%Yv zIHs8eIKv`UMtXY`kPhYbwd3AXAsCrio5KZA-seMK_kpn-ep~*L%i4;bL5|Schd;{T z2AQ`k{$a#Y^OX2Q6Bk(iQ2hfrp{*_%;IdrF5SQN-A;-8ks3%H(kqE9rJc6>h$ z&&nJE6S4-jG0?^E>|lluL6`fN@v3&BlVI_(cH-{0MsVQeqEkg0bu%N0DZ0q_f~-mh zu;+G>xKY!@BLw2O4{8P8UW(VJ5V$u<89gQcyr#Z?#`(s^M53MyM(K}mrpsJ2W2Izd ztO2gRl~V7PS^c*Tn_$iafE|KXLrWR*y*JwUkJ>(g5dUJAx(jXVpeMLMC^pZF!CtT6 z6#|pw-zid(AS%A)U$v&-z1upknDFpB*@)L|67X(x4-Kilyj~bRsOJ**zPF^Qcu!GD zgwjk`=<8O*PUnkJA~(v#mtAr92~GIc(%i3?4x)Q~NCMNFI9=f;T7v;?8IeIJzX~OA4oWR2+s{%!R zu^x(jEN??QyJYd(Xu&eG=8I8DG5-1~?H<9Q-#EhuZ5O8kQ_JdcvwjIzj_AzrWmqqR z6W&7|=0-O<2}Zyce{*QMwo zs#r-RP7_dGr#Y{mpI-Yk=N$82!uZ}Gm5$?5F`^1-b^>3}#B$+zr)u@Za%#L5)VxM~ zH#$r8(EozJcKp@z>N|TQpKNSnW3(lT;z(6O-p za}Gx@46u_hHa9hM`e&!?WNfVlHlt%<;$-7sXZ;^kV&+!HOoU9#U>zkmK0d<#Dak*^ zdr5eB;OJ$HZA_ia7zr6!8JON7{D&rFV*6)A4|d^X>;SHg6~M_@#Msc*$QbMi?tg0R zmR0QutD&sEddb@cOYtcnUKFM6`)N>J5XmX`2)4@?NR}XYSfgGVNIUSaDIyjv79*O4 zzcn?j8gmtU_RQM&a%Y=9x4fB@G&W@)S!LU%{9(S4UDWA*$nr!jn7a1;`#1go)cKJ0 z(E0L`^RP}4Oc9|ac2-~(VPP{p0sBXD3KP7zYNh1>4{N8Pqcp+Kp1d;WLNPV|0Y0r4 z7SX}xpJ_v%A$s+t`TY(cF0%}P9OSC~mLb2NBqM~{Ofm)OWnNgGyQcPg}imnj0)pLYg2AHid{yH1+q5kvV za7qi0zjP6=wEZn)nTuk{iWA$iqoF#~N>C|zrsEXA)>a8Sk%ez)q&XP!fhqoI#c-*? zdH)nSVSx#c-`8jDm5T{+0=X}argLO!5GbXVrfDH6qsC#z~(Oxg7$GR!rp z;vnOC9T)Yl%%s(XMF~01&PM!5y!!KCy;OwBfSKI&sLl1IRa`Mi1>UMDD49zKy&L-` zWtg12d>U$Z_cqCtvbeIQsL08gyVmMhcq%M$l?Uk4C1qUtu(|%GVQZ^a0{B8f_a}h+ zJCe3e$WEZzIMGr#`Z{bW>WzigE26hzg2Wzdr%L=!%5P{9$O~c>4nZ(gj!bH)m_(l< zzo!Y~$7L~>`xlm^?60pc-$|si*6od) z7`p14nE^F3u(7d+t%So6Av(DKoTjrz(56m?|w-|6;C=bun?Vv4v16?k!Vb zr+u>QLj1w=@hhZqk_>)~dqw>hs#(;V;I~Yi`$nq_MVhhs{lP5Sqm!cmbc?!2ERBy} z$;Czz9@Dl8p=EHt_*Yl-Nj(Zt$MHGdWKjf^*K*(53qw>?HFH(6XCdRXbYE921}J1z zb#GmJQ4j4<4`1G?AY>*524lnZ1A&HsiPJ8skeFE?hUUy)?3aOuR9h*7D%3(8~Q{e z-Fe1%Xw8UImaAH}dEv4uP?BKeVT(0DT#5AWZ3(cwen=p+))En6qk5f$IeIQmPSU`%M6hqbuV8p>f>XN z(|C1|?{6pRn=dcb3!c-u4t)Fz@4%HnnD6--GH($mlmxuh#6%>yIW2i zUz^-O7|v(z`|0j6qEO_A&6(_r&Y_;U1yrGD@t}h` z%f%21q2SGkQ;A9+9~YQyPnT;ZnPY5xO+D7!7v^|aSLUKJwAYm`c%m*YBR- z$&>}Zud?2h27~y5p4qytZ%bsmya~H-iZ-EN?Tq~TyqKW2%YNP?xf0BqnC!Q>?4qNa zDb1-3&cKU@8re%YGvWV;8$H3^7plLD5h9W3^{7|D4iA?2`w4|KdA^7zVC32^jigt8 zY)?^fQrWvp%i4BxJUKjCmH+Qn^3Z8k(QeXR@?ZEivI?sFA3~!%Lr0_t5%TNHmVBL> zJ!E_~f$^EbTd2jPmWAq&ZhB~Mkk!#kW@FEh5dwvUU*t;#F?2+NwbF3~gy2%;Y(JDA zZR(AV*tP3<&T_^lItGW&v)Xu9cd7Qd1%Mp5PL5Hi=(Dq41#Z=+Bcy4qk0Q>`dp?~> z3pB!*%@1g8rPln`g%|?FqUQ!(?HS?rq80tzG8LW9@m(rRWMHp}gdjYGu+f3hw$^#A zE<)Jm4OpO$S4$jGr`K17p|9N^=dEe)%=Mg^m(L$LxZs9{s%Y992q)KTzvvDLu{~dP zzgwM%5;J5v_pzVmn?}>|8l%znd^J+aMS$u4gWx^ z%_T1$3Hw{ZMzT>PjSxnR&p=aHKS#FP#rk@*b<1`9Sh*b^bm!G;8$`80c$Ainy^dA& z`Ne@t!T4c0{I~maGoL%~?~%M;7ftzx<5}Uo){BM)K;1CoMqgyylqc@ayL^{*8;c8w zIH96r?DZYw^Y0^ZEEKe~j6)(lwfcgBjE#UzNAz4-IrO6PsTka=aPURFgr$o9$G%1O2B7OIe3^g@hE!Bt(} zXBq9!vs=fCQ+oLpQSn6xx`Qe;+nV#RV5wdzHcFcy|ysHpid>;2## z!_QaSdpu9E+Bt`F>eI@tj~+efCVV4#f8KjIXDSz%?evK#cG;)Q5E)jc{!`-xx&mg5EhRtcOwwoya*2gkY#xn*)i}@ufrZ*XtnZE{K`LOZ{2t@Am<{6|378SfQk_?Hcq1#n z!frdNS~xK=nW>wtnrwc9Z>hXfR^E-o%Az&V)Rfp*Jm|7^rI}h-gh@)WU+5b;KM{+; zcIV>E?^ta+KV*YD`9gT1{|WTf=OID#w1X%>%ieGex5jyXH)-hdfQoW~0o$(RJMSPd zeYe}rM~^KNyqOO)&z}vdf16**8WH}^$0M+NC@i#fw2kT~YscQ0DTh<**7H@gf|d$#)i!rDu%PPFcjI^5lsG4?Um^3c+<&!XY0-?;hS zz^bm2+~ne7Y-He>vu{(NXYnx?LdBqV5oG6O^j)xKTtQTP9v;4*l=NybKH`?`XKip9 z2ttweVX4lK`&p;9;qe36^Ijlhp`mH5Y^y3&p}EHtL+iPYik{$&lOd|mo%6YW0~3cJ z@9HlY?+pTcJ1#glC)x)w+o{pxbN9Wwa~lev~#<_9XqDz zgx1__{_0|8`E34#a`#)@hpQ*$aP=do>DX@6=T3_Ln?PIIumqc>@N0sr-+j_eg0`%m zx}=L0kb^nyD#Jk<_m$z-+7?9m;I%dL&t`uEZ*y|0LxzTm27-dvCR=i9@f1u7ysDk8 zHtVaK3y4OaW=i&zk(U-L9Qgi}4c5$JphvG=JnioqIkR#RSWwW)%IWpURZ~H$4~kOE zB{m*gvSYRP^4oc=FC2Vc(Nj}Xm}wVGk55j{v$1B4wmF_w{q9^d`+1eao-V-p#~TyM zZfM>9G?rH(Tx@~X!r%LI2z5%LX6zsBS&981#Mz(pH(_2FEq4{C~$TK za69kGGPqrP-mI7RaRjr~GA45Sz*XR)c99ycwmi#EA(Fxqo)_`RWMY0A4*n9dhVr`<-0un7kXs2 zV}kXL&!MCXEZC@FzVBQXlSh|SRrQuPD6ud;Sxb~(M??pUX1>6~E7;r9#W)1wQBJ6MHAC!cuPFl+v$ef95<(HEr)uxEBxv0DRP4B~hp- ztZsO8l-1}`f3YuT%SIzc=dtq1pF^HNU%8W~p-tMA<~|~!;>6!>xu3J_u4sFQJToey zL&A%UlPrXmj=q#YUYiJ_*UWmbH!tqKihDjV=SvEIf0#z*Z&fT+-V-2TW4(JEq$NsP zX&%KE{vA_8lpTwh?c9Mw$x$%NbmWO-#_wdw1dO}$@f=jS}cg|&X67tg1#Qq zetwrgvyJ)oI@uH6eIZ$#SXXN0s56MGuR1{giOmNh;NgQ{mmP2f$}8+}HK8wN(3RI0 zgHptIKWphKzGKElzV3i{ramq+{~{ntV&FogAcabTi4*i(k-vIDoBC_IXv9yMJsWvXbZN#zZzvfL+D{{kkTq&0#%X9eej`V3zs0J%!sfH>vfX%17mDTM_gN{L zAKgB1WQAxdE@rF?bS&@Kno(BwjXmfrb7hjxOjFS^xp_rAalyCwzbd=xu&B1LO~=q7 z9fPzI(=#BUfJg~Q2na|HNVl{~NsFRf8bsy7mF|#~5Ksi9LrPIl5JUtde`jXU>&55$ z<2yX_taH|WSL}V(UT2u+h1oB)8Q8nybAy0qxdY3 z)Na2l(;He)#acXgKF}o%~@Ik@SYPO%R9eY~l!E{FJY@KEn@Gco{ zW?^LNRDnVaDAJ7==4&O1KeU%x(Re3h^M5c5f8vN&V;%jWw^G)g${oYzCW&-yiPuJt@n9Ry>en);N$s-AD6$O%Dh}(G-dB?j3zXC ze0ZU_^ExmxLP0NRPFjVZpMJd$G?Nl zI~7=!JJ}SApz`v&md4~=`ChU_f2gf$t9!ax?PXumbYm_^vjA366s%L91F_)CzH6*& z01tlekbFjwU;K^N0mF!6%1+dc3xyq5gy+#*b3wc+s~%oa^6|#5Uj%LCqMLO*^CEno zO5a7_#yEx7WUHwFf3Klyui@-`3MTh%4h%Nv^YxY zYTf)emEEoqtJl8%K>kM|OJ#{cwyt#Dj1sZ4cPuKwRHsc;Li79b!+3*IU)Vt0&e8bB zW+hL_fAD|B74_w7lkkf`2QI_e{eAEoU+?wJEcKd(m!bz}r|+1G)hm0wk#q44ZbAtN z$Z}zQychX7XJV#`?d>|X{I3*sIxAdPRTP^bcZsg6BS#LoRSl0kD%5pCEk9e|-fL); zTwWJ5w`23v3EEv*5;riHulTHk*2!>wkoQH?$pcnWi@WDxXBF-+}5?-BCvW_j3;#@P9fU92GBtf+W6%0KM8@Y*NL7kS zAM1k$b|+X_M;yv4F4`c;Wln7jhssE3akA8E@s;>rB>g}~cl(Z8FIUV~1156Ds`cBf z$GrdY){hBK9l7A~il)@!)I6ua(;q&#%Ib z?N4EoM0qYfbeL=Lw+xKq?k!rp;@Y@o)5pRd5NMSrpIV?$$+8iuz1Oc@^{Ladd+j^? z+G5v3hPX!@loWK~XSoH8nyO;k5TG#M~?*4kE@#oS!D-?QVL zmsPY42Mw+a<{*1_z3naXYhMRb>r6@eh*VaG?ivbBl(8GGo_|(rzCH1>u_5^x_sZ-S zwrE}CK@ro}(Yf_xh4F^+Md{}Z4{G)#4?-uY1M}F{NP@yjRUge=KM8#Es$~O@d#djG zp;Mys-%X6oja}-jLlVJ?Nf&2~_sE08977A3ifiWdVrTyTOa0)!EDcaPy+KUYl8lp39`W0)L4BJJwDtM)2TJ+a=DQA*e&5#mJ)(R1^ zhfe8}lzbyL`bVvWx^nD~pzjn$B%oWUkMeR_YrZT})UyWX+2~&hyR( zc6^&(jVaMYBX0{8OL&-!mJhzrN{F5A;@q(8e|IjM%;R*Z(NIx}#n+V+iu9MsjL6;Sv#1pK_IB^aFka|#juJJv zC^x0z(vn%mC{uGd+%F5t_FUt?@CDIIt0YV!@kmKn@q}d>*WJBzqS$?RA%n{ITO>SZ zBPa^lXU~3$CyF4Few;{BL$l`jNw@1U36D^d2FAvZ9Le#Nb=J}mvyo2}NhZg>c7d2a zcSq^)(;(Ikn@*&B*u1U-_$Dz*qJdn*7WXh&mhs;S2VFH3Z6Ur@0(f?GPr7s~`I4SP z3Xyc)Q$ZFojM@{6A0b2~56cBFlJIE#bFz=ho$BqgPv(H*2lrOPgw(XcoLldqsU(Oo z5{~2{q-%Z#v>~M3ez1^aCS%Rnh0p}Qlr1KPZwm8P(--6k&6)BP0n@Z+tQ+80}bqq;03Wd17O z7AhmPpeWrS5#^g9W3#p-znUO^WzHbBZkAJi&X)1ol2y2cg8*w8h3egDC9yQiPW96G zaQ5nY{n=SC7gyI6(bO8|Q`_7xZ3ST|WagdJE)w@b)E2-~YqXvGCubV=q@KqM@a*Nn zn0B;NY7*_yIWDZV6(q&+{qz372e#qW`lV6CS$;34?tCOmlPHU!Zt|a?uxdXq5g%N| zDvX+EKU0>UTKFPyezBCQpn-?hc0asjSm;{JM?WVi6Dtk~6nVqDyI7>P9(9g|rPcRd zo^Xk*T68ezU(yyof%h$Bj*|__1?;a0mTwYJxzEIQ6 zZbJJ?2b5LD=-}?We#46@)p@hqNcj~XW z$Bw!;atnM-Xf!?RL%r8fb(x&Ce6~$j{4Diui}rd*-(v&CD;F6@HFb>CGA1J$Y8XG+ zDDWRPj|5Fi3n~fQM(k7@Kp{8W|9E^p(3xiNC&IoIPDPZgGIT2F3LO}U>)Wpvzp=r;P!U-mE>+fcT!X?X5(m-9&S znd^Fa8A@+C*yayb$6uzej9C}*C*?YNh&BrdG`UMKB!XUP%8U7Rp3*%C3A|8hUA~38Lf@xRkYr*39ByWb#YJdP${)4=a84!?le3nkNoMICkv0Bs(tf z4(x09`3K51)RZZSb~&|eB~i>9es)nPov~XL?lD&6{%22F$vhJ*pOU`5I)6~L)wr>p zVHh`pA_}adhDyGX0moryQV684hcnn3u0-^0=;?c1?;pQI8c}zIzqq zmnnM04ZARHgDI3co z>z9$er|l>T7nu*aUMs!Ajd{A(eTqT*@}YbkoVtnJ5BvPB`YEzaLy_@7)P1qJUFuwh zZ#Vx6OWz=pliF2$-ft@W&T`MDtd->*TR%fEfAfX)8(*tVzF?(bfNwYO{vYNT~SbSy_B zeYpDyglU)cU4Pq24m2HHxv&jkZ3tPoet-HE2a%>*sCsPgYnW>Cc{ij?MqF!t&1X7o z<5~AKTKZ0hAydwjbZh6fIO^KC$#H>^7FizDv#O4ZqU|d3J)nKEIcJfIxZb1>vmg|UfS~E|QIgN$|XrC$Yy(vr%Z;5VWd~js~uC4GcQ8wO0UOuYe1H(q2L0_ zA9PZdw!(>YsT+bQxm8r!S!F>dKFZj!6sAEkO~$C??{S>3T8)iMGly-7y!W>;GMBva8{V49pmOi4>6egVumXUr=<)-Gw#>vE! z*__oOJ!hF7c*$3tASTOo?k}lDo1YxZ`mDgj$7mSSXrHf*&T+*}EhD ziln5v-1SB64IUNJ2Lg-(4xX0JIfAELE5@jhx#-I@e!~-EOvxs0(u<)!7)QgNLJ5)F zZrjqy(gZ!~%lec*>btzhTDRC5gK3@i`cCqDbB2Iz1*X-sh#l?E3_kLOscT(e8I+SN z6bdb~qx_5_Nz)shx@4qpWHNnew9qEaDW$W%$I(0xso#`SRA2wkl~E>UR^}lqG9y39 z__v|dVV)1G?)$ZhGT3Ihv={TEwV4z!+hv&)c`4%QG$n{xD)J?>5dr34Mixe0p<)3M zEymtk#r$Oz5_hf&50bu&3!vhi1Z&G1FEyO!aF#^VpJU7DwO$=F31hLg;c#viV!!^( zC0tlcNFwNSOD5yjFe%Zy6i}DD5jQ}>XBw2wt?g>fnZ^k|NbOHI-#Hhh(MbBJ=Vn#n zQe`40d)<*(mil$bgMRoOj}c2Q6z7+r4C2#Q)Wheic5(z*HlZqaGFhd_`Knna6Jy-d zb?xqVgr6W0A?tIgNRZiX5rJw^xVT1fjy@cJ53yD_8;hT}|XlMT}I${EZbvg5K51a850atHr3K0lSY_+XXwU zq{Z|&QJBg2cwL?Q=+nx$%a30heT*dI%zXVd^p#f4WKpFbuUo0fo>wUL=`!$18Tk`1 z75Re+=dimuviT+`u{BV}lk4|epV&`)7ee!t+AJ*Wkxrzl=5=H^c+4MuPjT>Y9(gC5 z(;jx1Ofyx;sXBhMkxUT_x-K-|I3;JQ2PE}09#4j)y@r!BVPf8DhGf~ z%14?}#cXwy33yuf{0Rsf2V{|Prp3tQS z@S@aJ4BRfLt6a2l2TT972T2=&O(9@Y6bc1K%D})V1Qd)wAixNjKVP_UGy+1v0OK$O z8vnv!VKPX(9%ql!<0MK3I0y7dfaismfIUv)@xR*w=lFO)TwILbV?$+tu_HasFYX-Y z`*++g3=rq1ADqNte&TR><8(M57&r#+2k#Hi{fvjh;&MhpF?hS**W#BRhyhU6@HXZk za~$F8Cv^<@TOAxx#V|6!H>&=kgyHUhx~l_l=XE{ZZ1l0-U^@p_TTiT)n~$dr7HkdN zZdVW#2DWvu@jkl3>ug-C-0`>X|4|=?%KCqn2G|yB2RH%>fWY3vmzCttQji2}{zc%K ze?TsP1(c8sj^O6yZe@e@v~sn_g5)5;p#YXs1rGco92%x@+cm` zC+aA9f&q*$2P9z(eWX0P9RzduQ3L`6LC6|GxPl!m2myjPN`i1x;YSNeSOWA>Ai@}o z;2H+Z&m6bEeijjMir);sO4!E7(-UZX_#J~UY+S)QxMF{8Dt9+`oP(dQ{}N!)zwOw6 znXbQeZk!VGf4A)Ou0YM>+VQV;DyjC9m1=9{>WypjUSLxg?g^m>a9R!A3|$>?+XM`7 zTmjX;%>&0n{Yg6|WTI?cjs)9*|J4BmVcY?B z{iTD;V2*boK6_k;L;&gIj^F$t(Z^%Rz>vs4aTpA+0{^u|LC}BV(17=2 zI0y!KwjI-Zol9USwgtqkP&8X%xB=kdw5Kt)aH2E(Mutgou1p@_sj^SjWkU!=j14TiO+X6TgP^`EEH(zg0D}W~L zi6=wrI|Kk_iw20Sopk-D(HW$ C!q+JP literal 0 HcmV?d00001 diff --git a/resources/readme.md b/resources/readme.md index dd2e084c..1f3bfe57 100644 --- a/resources/readme.md +++ b/resources/readme.md @@ -1,4 +1,18 @@ # Resources Folder ## Linked resources for Wiki and other documentation This folder contains sub-folders for documentation resources, primarily to link to files -and images for wiki. \ No newline at end of file +and images for wiki. + +### folder wiki contains + +xmc4700-X1-X2.csv XMC4700 Relax Kit (and Lite) CSV of X1 and X2 connector pinout + +to follow soon + +xmc4400-X1-X2.csv XMC4400 Platform 2 Go CSV of X1 and X2 connector pinout + +### Folder wiki/Pictures + + .jpg JPEG updates of Pinout image for wiki + SVG folder of source version(s) in SVG format + PNG folder of intermediate version(s) in PNG format \ No newline at end of file diff --git a/resources/wiki/Pictures/PNG/XMC 1100_BootKit_V1_2_0.png b/resources/wiki/Pictures/PNG/XMC 1100_BootKit_V1_2_0.png new file mode 100644 index 0000000000000000000000000000000000000000..d084e7b0550c85f79bee702a0feafd9be27935e8 GIT binary patch literal 660992 zcmXtf1yo#H(=5&)fx+F~-3E7;0Kp}=1b26L3+@_{0KqjtaF+nV-2=g0-{Jo6V-2ui zWS!HycXw5F?PxU>*>}i<$WTyF@8spA)S;l@ETEuZu|WvHe{i_68-QPMt`hQ^AmGan zWF7_ljpQV!>k0*hQv3D|JrsD64*ZkAO5|6y+?;E38&4B8*pxKx7eZ*9Sq?+AYFr*a zZ67Z`+WGmgvO`MFoq-wMM11Pq4sDYw+Kju9iScq@5F9=`?qwXD#N|SYp0JkZyn(OL ze*X!pe9+WvP{g%&zRy>m)5cq))xTOFo^7jMG3jH9|Nnz7clu`ZcN+okW9M42O`R@i zky&CI6FECPX`FKwlh6d2qD~!CmMT6?7s>hEZ_H%qIDeH&Xk|xddGs$z!mJATP$Mw! zF{TnfW~!xw>*xzH3+KR^rEIYh2p@!_=JaR-KltSY5XZPEVV-&*VoSgOzek!RRqNPL za~4UDlW*y4TR6y<+70OdX9`E6M$8R{B}hP0n*^Q%d50zrgpZY!5ye4)j|4Vr!}jK` z`L3(i+WK1CGiIRuUd3-vnVzbQ*uVL)kbcA{f8QjVRvcV-1WDKi$M&!NbI4;41CyM3 zkgZ7|SQq$oJg*){z1?`OHFX9-N!|c4Nnr479}LAV3>Za>6$%$>oXf9YO{@#sv>mkT z!O-Usyu!-Ou>(Kwad2qI;n(Qen32Z&G@F56ImBE`=xb8%(>!Cq@5{g05JI(8cjc_U zM^l07a!uR!g29ItL0Ulw3wnsu2JSeGid-C9kS%Y&hy_O?7hzK!ToK=kNg@hQUb?dU za3IjFm6QWEtxs~{q99V9S;$?zJh)Rb5PP52>nRk@8BXQ5*EvmW1BkWxVZK(l?t!X2u-&R|- zi}#aLtIvd1+IASS1-7(+-AswOk*KMRKsmhFI`mB*^!F^EC-)8GwPaET;8RDCK7QX1 zjgjV zVRQAlwExm-x0Idt=t4t^UKH-a1$;^cf|Lkzy+D6vp<(+JVpWzjDaYnlE&RGOrDXiJ zav8v-?c(D`Q2c1lbg0sz%2I++tC^Rl#*A;8F`l>OF|A$5iJ-1NGS$^G`#SCRg))pB z6f(f0?D{%~RiUkyy~bA7ck9nQYU<~gOQV>6%x5bjaG2SBEfpTN94)geg!V+l?gSb% z=5#;S6(gjFVuN0X#J~cIU$3-B7+)FaEBo`YJ z>>G63>G0?qBnndvlP}a=Th*-^#I$CVIs~H8cs5LlI zi6d(HbV-h~n?kAzM&KWqeP-@60hTx2_1Ddt5FlH7HR(&}2ZIkQB_c4Mhtbf`IISjf z2juVyF`|?rX&!&O=cT9P2FZ|Xe49&B$4nd~5}&*RWwWDlpu#d(n8C%_FUNnR2f?8B zc3%p4954Lp2}hZ`Doag;IzdpOK~~L&-I59(!wW_|ll+LW(Rs1}cSb*bkO?^>*$^+L z?6vP!?j8*4%3FFJZ@$%k%M2CE-n_14&Tvm0bylLtZ{caezOp@ID^d7J-q1`_E%WH# zW!q#(t0xwQaij%U|BE;5BLZo{_SqQMGWF<4QlBUyhn6CY8?Ss>X53Fo%Gqe4<-IvJGyg)#3w4-z6FyK`s6b%& z-?e}iS|)FNgRZ;Lg9N%iYb@Vf^AwAfBm058ZrmTqU|ulpM1#9>AoB-f9>&1c3uOH} z`AMIQx}_b#*`cywz=AQ{Z01d!)LuG!lAhgC;s52@hKEM}eVYIO5=F65k0whgWpcmu zelN%SZ)F8=y{dr^Gu>-8Dl;bX`uaqTdhx3Me>MEhV~x!h>nuPNcMF3e17#UTBjbGQ zV=Jw$Ha0dzKY!*i)pTGk2rgN!FR?!&a6LNQ`WG~Qnok)vzY)|DIP{BuhRw1OMR>`w z_L+HH5KS9~DJbxHn(W|6%DTbX;F6lj4ZypbCpf49YOYIh>n?755z2&ggf_T}J5!t; zwIhZ*aM+$~v4;P|Y2VQeKl_sHZc8s(sfz^VgW^IFMF1;}XLEwkO^Diz6Rp{ie#esQ~bR9#CVsry>kyM1L6 z1iNt9Dyv<(!c9&EgO0L4o3eOFMx-<%B}_R|!%^_gW;ImRzI}lDVV|SPIQNCk44+VZ zV`g(;kRwn%N`>2h-LQV1yg7=k16k{5rzF)6F^Dg1PJ%z6}hG3ySD zbsfuVI~D1uek;;+9Ym*(W}sJ`KK-8+96>oqJCXNK!d=5vU5%uL?q4qUw+#<(L-}v% zeWw$XJmG_HW+tXT*O2bE0x66Hq^7{HFz%3ydAwn~nMZ2!oAtoB>K$U1XcA=;mleol z*BPqlA9?wkFsWxLRA1|BY{SII6 zC>1C9<5zt>IQY4{%g2c_MFT|wpZNm&uM0YZFDFIGM(fy>Q+-x{v7?@}9nooi`=F<< zKfHelC*J)*+c3P`hA~ONTfP{B0}+$-qwlClqNr=seD<^|7Y3 zD@A`w*pk63qBoFcfo;>5aLcNymua44uNDZ=Ytkmzk=naj6nLn1H+9(`|ltV!Dsx**qG{B{nkImK*S_=Pmt{ua{N^fzQ{} zskm5J-kmSkHTC|F9x21rpB2KdkLE9f71>IRT)nU7wC^ecA7rz$T~@sJZxsV>k(E7%B~!+a|D3Fp z($RGD;pO`EnU8t2SgSsI&`juQ3hU~sY3ots(2bA*-UR>mN=g~KuIXqx3$vjQ1YA|z z;JUA(Rc#>8nz0>0XiJQXDS_nLC(n*IcAI}8VH~I{cm_@sZPi>tLUBbz*4Z+({EJ^WH0ZH) z+C5m>s#Ae$QcgY59dD_QwaLbg#c?yF`#hrdZEnai6%`HbBDLTNzc*++hwt+DDBIaw zjemGWen3d{uu!W(I{Dd|P^9tGmIHD)j09+JvOtwGxx2~UwsEQbX+}MPO7-96oti8F z%8KccSI%OIx9AH5!#V;UifBU+*Gv09b>j*5c-!|f)i{!Q`?VsQV@rFte*rd_Jjr7) zsu*Q5IS9tI7GGV#V7{!fG8(9R8dZN5JI#o|zh~1-fU+rg(h(~9df5e4Y*BY~4T&&O zW5zxAFCYhjB;{z;OVt@d$P0~XxHvf_8ucvxeAjKM9z9uYcP5Vf@J&lOJ_LyYH}-h3 zKGKd?5t3JKkYJfA#}GZZO`SUId5Ty@?5L%>3e~C9u+#X4w22MIeAtN3>9cGyR79-_ z{7j*~gnUP0a7>lRUFUsT$g=NE^l$gQ8?G(sNC1kd_*OmXq?&byzrQ{?(uo-RhSgex)~f%g^Y{N%)#I|D{0uzXS~$5fA|AAy z%!j@?CV-MS_WAi9Pe);~<=54SY_fHj{KCSmhl^nbJ1PMI!6woA9YT{vZyhSIrEDA~ zewg&ign_TFuT8Qc)t^!)sIvq;dBqR5eb5p^&-Ej^$Ul~#?QV!A`S2h}FE-)_6CR(Et_+|$TI+AK7;C_5AF;i~thXwboa zQk0XQY9Bzi0!n|St6d~OA%z&ZaKC21#8+l>%mj;XJlZWc#b+4#L<1NC3gBmi;X!3- z8YPOw@3PA``O)5xtdE&RQ5Go928$^>*}9%MQ&VR&A_{?9 zBL@xfmQA~pELT#5^>MrVtyicsnCL;Y#>h$M&xH~NTzwCZa#T49=s++&zJl@<@NLi% zVST0u(P7d;Cew?H@;^yAIXJ{sRoU|KHd>)QR_(EI*X9K=bQm0SpfYpY79*$D7Av0h zD^(gRi9fzh2Dw(89Ch1m#8fWBOZ6WVAiQ9D?Sdc5fE3Rqr?oWXpj&spzm>-Ch@wsB z@c?mPZOSJHcAbb#Dg!Y)rN2IJa#_hnd#^M@4T1qmg@R7pAp*GtH?sLiwc&GIVj@N? z4Jb5-9hJRdL1a*N-<=q-m%Vr@g8nL){!7;3dx{7XaD)jJYIf)ApXSc~Shk-^U<9BG zI&MVA5?0qThjK)S)ILk#90d_(lOv9q@D zoLSh1ZbY1MAw&cb*fCh~g!I|v7!lCfxXS0wh8a?n!Ta6-z;4v*=N^|?mZF?)Iq8I+ zPy$kI`js7ZnmgXG-Q)bo_?6Hwvi+nj)~diCmjcer%#0e-IU+Jro;DRfLL8Dui(3!Q zF4e1N_^i-UEy?(qJb7%>o3u7Fx;m$!v007v149N%pDC`rJKjfhk8{PA9-gMZ>WYir}! z!W{N4->^s&6y^LC&!k1U6Pa))q5kr8;PaI}hSL?GO2o}Kc>wRGn6v#{wam-K*%7(6 zrkm?+Nn~m}@*dm*tV)%Z~R*Bv{3@PWdscM%Cx9{CCq5J>~d*oZ&hN#T;9#-b*2v^`6__$|VjY zw^g7oLnlopZu7H_kB`T9s;qwlXzCkLq)I;RbVE}2Bhv8*q8-1VIF=>Y6oCr6J0-6v zaR~{$FcCV;P3u>b zGu%K!;vy6SIGcqoKz*55s*Jnxr6|SA^Z=yq(n>rWrplYs&yGrqvW<$0nj}YEoXjXS zYJo_h$%tdOT<)L^s0t0u%~){nTQphm&V?d@#(@7YYl~wrNsAL}){kn+fu+p##h6I)6ork?@4Lz)s&?LzU%S%)|8zT$ZFCG zHEgdfJgGd|h2Xc#&ZbL=O}1|}4==lRWY)c}#Vnq&E)$_a@y9J#>gM^v6RO3gpLWOp zwfo<^pK3T)jEkK*05g?P&MFr_aGq0}98j!+g>exXrnq6{uR2OTvA3APnpDX_95!Z| z?o^O^e~8UIoUi+nl!2!6G<3ELCJ zsP+m9j1tvAPiMb@-+4dk@nZj(8W3-3MuPZ=tQlYAe)asaiUJ9G;R(niH*3oVjE|2G zJ(PgqM`l>UzMg_gRv+;3KVYqR>^5Z`H5Ai3N{4ffaIhr((yUztPgd7E|AQuF$CeKkOZ?Xl*pEpo-^YRs#Jf%^^!H*xHaCkA`tIg*a2#GK`Y22~rg_Uc*O!{%2V2W_n77D|RQ zvI@~QnenG|*J(#&C&X0oOgJiB`qhJkAQ%!|mscj*K=#)48u7zU$P63`fH}Kf`K{@TgZ}V{Oxv zIuR*GwO1>*8uU2-E&Yx3*8@lN$FMn8sX7ufQ}9uk5^m)EuH>!DjV_)#b9{=NZJ!w= zAFnV60+|*KH-UL?Zvloe%wg>ymWdv53%N-zm;CJX_xwtHDd3Uk27zk{T7vyQ6*)mT zWi;+wr4#0&hX3i7GEnrlcR%bKvz}mS4(qmRwYjhFUWYMsbec_h`p8qaR-O_*p%R zYXXvLr-6W!nLal}f;vu(`aA$4P)1b7f)j6ey1v3@nv9LPfH=gHtzN_0Rm3=ea9Oft z@sSa3j>$zkBX4dzCWQBexpyIp9o{Gso;o+b6c-x2NdS7yeZ*I739K0E2|>@TBm~kX zM^mq38N-g6CE695JPi#;n9nqn_*tGd8`PV`j=IRj9(E)%Y6!q8%yaJACb;cwGvI#w z?UowCd1^XkXlLTUtm!se@T^8qZ6+8nGuwd;d??0nK?v$Oge;d2?>T3<2`S=o^^_H5 zsGM$u#R^0!7Wj(aIt2Ev4$q&m3_>HDdCmV@@ z4_F;{pRKo$3(@5f@MSI-)z>CT=0*54)_dFcTyH%nd&yj=gHeOh)_qqIpqT>T{GOEc zK9P$i>Sm3zG#hZ?1Tn;1@V@bJC9ZHJxVui-GJ^q662>x#2Ge9fG=+zf5c_EauT0Jj zI~c!q6{#*+Oof3R^MQK?YP`?+==<`IFHXwJb218Q|`ew)*uS7L`M<*4=K#BwOP#ydMHlicOad1 zhj*$X_xOiyDXZe(cAIkiVT z^m3;hWQXs|V%ikL%(qmnxoNfKX`6hFIcZVRiAHk&S>)`Q zs;wH}=u&T$(EjubR_N~?xN?(?*-v-*u{L^g#Zt6sDao}$T0-KBXwelpU)l(tpL>s& zxVpPfOui(JB`s2$P6`Iqm+&Q<*$*o#7j{w^c%fiqkpdL|=(e82OoqQxWL zs}70e-BgLLqC_DQ3*p%X?My~_K;N-(mWpKYKYPZTpXenyD}j)iwVHLWcmI{gwg1Ya z!@V-YeGQk}2+nVG2U|E!y3ia_8<@ujDiNcz5H)ZK%IY#OQyHmMR>7gd z2r;eY|3HriGx-ZMYXCov9K?{$)S!dZAx3WC^>Cj7D8?v~RJ{xCiF)G$=RyX2?`H3T0<@h)&7Bt$bfqgeHU4KDM)d`qR=Ld@9=KY72MXZ)2YI2 zsa_?ZW7)u&YJ$(r$G82++N80cW%VcdlM0~7(5EBwClod|W_k6P_C{QP*K3Sfznhw4 zHfTxe?3A9h7O>65=nYNFr4>|vug;Ay#6D)?vt10uyzWSn{fwDnEy;48+Ip{p8&ZB479yil z%<QTNOyqA0RUd8LQS90R zqfjYMMM#O6F2`3760SHIL;Q$okQs9?d7g@CHm%BPxdB71`;k^$GI@QL@aPy4s*$u1x;alEE`(CUGi#eZK*K`i)j@J9J5u=(Fs+fhJ< z7iFJZUokXGFf}SorsIWi{FOLd5Z>zOVIh1NH>mH5P$`AJBl_f)<$T%eJFX!_GZ3A6 z{h!L)ibd|yY($=V(4oyQd>>WC;M7SlpMGDUbQZ-LH`$2#VmpuO_K%-h)N6`X;t6rJ zlBjjpCGao)uYGN1$qVRC-`#~AV&^ZTA!O^LkxV1bV*l+mg(;|kry4*UZcxi!IJnNTcS{ z#nM7AciT^Y8s|;%rI^IR3z1+!L#5eCa2>$xWW{~na3MiiLjwySr3z(XCI>Cm%A8r$ z$#O}P8Rx|D(dU%)zK;MG-f5tzsIL!1%(i3~;TU-G_K%ClotDaNYT^aNO+Zi8S?Rm< zyV&mSIFktHn&8g?m~H8dF7xOHqUas8>;6PJLq<_m)#q@3MUHs`~K|kvbMR(rxT^k$}xsQyO=w_ur`1o-{F**rX;$X-+ znl7wdx#kq^n1%a0aS}A~qMzFvLRocL5&jwP>9;{iFtSU0?V8{w{-k>}WwwsdAuZ5` zwJwdgXgqlS;^s&WOHSQz@%}sHIUCQ$o z=}M!blY9JNsd@M!hv_al)h}i2m@IZ{ZLrI+`OR3vs98D4pP)KOs`O zJb6rh_ZX~HrG(b^7)As^r@v=&X|n8!+Urq9>p&J_Kho{zzj)Oqm8wt6 zWk#RN0|1^%6353ESB=%1SgkkVAV!A4J;sFZ>Epo| zOQ9APx5W%t>D>?LQna2RHFTuf^D{5lYpCwwvwKSrj_U6>kriUXFPuR6 zbrds#f-(sZoX91`8x0CG$)LsNCCm?gFHWm4elBio#32#Ke^_Yb1nRdh+MGg`6r(&P zF5REBeonVzy?CFWDki1?TH^RR#|V%TOFx&8&Q1|acXx`0Am5YL4B!u72LjKKr^cJ~ zGn>|0x7xLz0K#gucJK9H^ZId3#t%aCWXfDq-0?chGWZcdP63%PJv}X5rryhrsv>-?neTf-aMJZE9&mk7BS)Ju`O)rAGm&<$h#Vct=ld67An4{tJ7D-F4fYXWSsxDCD;qj9=*|H*S)cFO~&`k>EPe85zv*IAznf%%(!M+R(O?~$nrr+ z8{Q)MN1KojxjuQBl~j^s^VLO1kg9RzsB~g+@Q>wL2Ha8X(GRq-7Dj&FJo?SIT%I22 zWfIWJfG+`ydW)fMkv42ERZeQ&BNqZFVj4Ww-Q4ba*{*g4__Uvg*a5w}aVh!;0tkwL zmi6}oj3}cLaRebuXeJIFs){_W1p z2gVE!%ZsUh!voZ{yI?>#?Pf>K4|L!;nz!GZmJJ*)@H?cP5ZeEFywdd9rJttSh8h!T zWS29-0V9mnec7a#e_-kW?CwZB*|_+_Quxw$-{~6X)XK{VtE5D~QVZeWgngRb=^L~? z3vF=HtaNvG(>uS-`uX$e^_J{UH4pZjtFGkSVlyRTGEx-T)zUMint8@=Sl8Qgr=9iH zENOl3VDu!g#9hZv_bfB;tXu=;pA1|euD^50xXVT3vAC#X3M%PztMBguiyv)7I|X%t zNVi;OpZW+>D zqV)~fZ~bROD#XjuSP*gY^A2k`B?!r2l)&uKhp-?`#(vHxd{nh=V#=wip@AG^ zS{su_+Q}wQU2I>DAvwQwyu{OE{IvTz{;%0TR@%SfqK8Yh-s{Cqs6By#yY7&B+2cgQ zHssF@uaM|Yh3JdO=L_mk!N?(6btSa#C63~PKkHN68XD>xo@pU^rVYH~6?%&!C&JsB z#3bWNoSZ+>$^1M4I{ZLYeK*B9!GB5YQnkw6>~2<;&HkMi>M5v_kQablK#5MhSS7pT zR(~Oq#T$~N*ePg46MkXinybMIv82AyniK@vkWIIi5ON#u#iBn^RR;=K=Y?%L{Jt@J z8g;*>f>Z#wO*x$Nw86jk5mv4Gl@7mIQ=^rjrx@4%#MG1YE7{ z?aO#FeqoZTD};~(b610Q6|fgvz6{t)r#!kk7*%q`=N*@cDIqR|FyLStf>x;+qsb^= zq}IpIy*E}6YSTBge|eWMdDaci-%tK@0*qaq|19FwnGND%R`Q#f^~NQt79YWk*2z(0 zn&+tB6`7k`ho%2vHK-XOu*!WGro$0$z#3~QCX`H#>NW)z>MH|`1X)q`EC~omXh1Lz zxXdO1SFmM`_IQVo2o4Ys5p9oro7{@4-#6_S4spWj z#5c9(p7`^E-)Xl!Rxcv$s!tYyyS(rCAA3#n?9tgrtQLyP%vt=Za z)Q?@CUVe?W-*<8Y(>Gx~3R%$fosY4)1innT&#go3k}66sSR$t=cooFm(OrmXZLVj9 zrP{!`*hMhzDX)v`%+<#(&IKo-GyB)w%_Lclu%W3TNr7gu<%Y+N!e*ira7&puuRk3; zh)3-s4v{}JMwFC(j%~+ zE2*f60usk>8T)H1t6**KU}kEX!lKVxk|Q5h&f)m0Qb`Go!YxmSIpUwDQ!jGcZV3^^ zq9#!=mLvkiXag9*OsyrGIa!C@B(M%B!b`j>b@*7G+5k_2ik^_9Z22P&KmY3Bubq`2 zv#OO9-DejJNvu9hj;&g3{bu{U%8G*BIt#L5J;r*=al(N?lmk6Y!g3?ep;FHH%8$-7 zrFsl0a-~s+NKKB5<5-pZtrsO3Tml?1u@eV<)Wcy3+l#YbY1-NZ>2bbV%ftb6&kdj3 z>S4&^*yP_QeS(0I0kl6ZOTVQXns<{Pz}ZIoPh88HGp>Xvs`eFIaoe-sO0$2@5*JjT z=HD8w$v~*^4RbXO>I&ZZVay z;>8A>g-ki>F-GJV&V|sIn+V93#aq?;&ixcV;Lx}0_^2D zIw!*ng;oVcSEgN;tRi7wa9cteYuJVWX->0)IG_8{^763dj98Rm^Er$ta%@<*gY8%r zA0n4!-KTk0TDn0DJuyXBx@f78y*(|3U1vu9(OFw}KhaXP?-SYfLo%iUGVTQufNHD87wh1Gb8!as7#F>!&BYBYZJ4{{&u0w zUC>b2(C?{D^@rObfzWv$*73@8;=kD>^^<2$SCTmVQcT)wJ%E(OM$us5NA%yktlkBO zo-U*A(;c3SP?VAG~*)%6aV{D}Btxje60Tpt2Oae97SB zX^cqw{1oA1317T#4#6>r{AJsW$|@O(c$-c3qrb4Qo~5}t+)Ui`(ozg~+M0kt(zN!A zKNt=ey>EMy=I_6+(qc%X)$Q`83(rw4BrmDzXfBI8nJj(Ppfd-nF&Uf?IY>SFf0 zE?r+PYBJt4dz*7AJ3d)p6B7kuzf}eon8muY5)Q`ec8n|HdtGy7%Id#Bjx5BvA4`>@ zWQhIDe4mB|Sa8ZSfih2_ z&V2@F5si8Y-k)T!T7Q9xwv7RhwngR%`Sq z=p7Jhe3Q57!z9?dWhvKdCLkN-N-qG+V|se~$@Yi8l0Pu^b9$`yyZX8LnYQ&s^`DQp z=jxG2kQqvNyQEAkvf!78+b`#~edL(4#aUjJWK5Of@$=0??s;2 znOoFzzQD`C!4ix6Y#hUuW{*$hm6h^u z3xDBZ%Q}B5=CqkyAl@eToPCpQEXr$^=OgI%RDsJn$%!6w;7Tvsd7Y6hIrW~-JUvZb(zwe2$^z$Yd z8jU70&i|@^DMR*JDa{&y`vaQ-B8Dq|T<9P?jxJ&#eBroLCHHGT-8c%YO`*e&!%B;U z1a{$y!V8XU{g>TqZ2RQ2(jXMQK`3!AGNmFNHa>ldRwDO@$~&Ruti>fx7zU2pAMyQ|N`(^}r;6^z}z;HK}d}6ye)qXc=U7+H^nC2ZhTsdpLerEpQ z+;Hb={`D*B=IqO1bB4>;GP?%IO-SY;1KUhuI5?h=t4tkf(3w7C6mWk6W8p{(T`}$+ zAhl%N^~)0`cb2kv+7pLe^0J8vvuKrBST^A0Mti2ZZ-oKLpt2k{JExADhlhg~BB$+% zXvJ&@*i48#eny-^`mk_0MuC@IY?s{S%R=(ZO*=qRB|hBBRF>IcCJiwffFEVo6lwkT zZA1Vt(2m#Nii9TWfK~JP`PsT0NO{*UnhHS1n`%&bwzWZ`23fLQ>zxcEZ5!h(XgR9j zjKGxPD*B%gN&eMak0#bTY?pu0QvQU6Rfds^8<}ac*$#bQE1an}w5ZoD_Nw*Z`JJkq zfErVt8_=-L`b@d`_Ro5Q0K<0=J5+HX;>;{VM#<}Zdz)plN(JDjvzY9bw9X!&6FEl$ z1Z84N_v;@vmk58af&N)%y~zMPwXs3&i-1@;AEShgqJ&M$fWuUpA`f^e1s^?u#-T96 z31WFSf6mU6I{iegB@|Jv&%Iw4R+KO$0fE$`Chic7XB-?l&}FHVpyZ`%$pb{~($L7@ zXROY51$+r@ygQ>5-;)6Bak=y8qiU;%n%*XV%=2C(Q%&nP%M^Vi(|@8x;H&inMfjci z<5^9hu!es&2atR!tO2aqO{feR(5JEy)9TX_V+c3s7R4KziQp#+=-A?T4IZ*GD3&C^ z%qvj(3Jp^8i z><1K`b>f-<2;6~6tVe%&7^zPEteCXP2{#JbSp>O(KRzbHdY;a|xH6>|hQGe+8w}p_ zhY+vQtUwBkYl(Lg&9$z;C>u>j*T{L%JULR+F``#WuiY(G1aXiXk z);Uu!L&J%aGq!-G*nDcDkpJH9jYvB^7HLaI5fy$3DozUOE2Ib$hD!n0S*2tRAL~zE z85w@qzm-*$knl-2$CNth@ZRlLny++Knb*{wzn{JIBQ4eQzPhGz<+9KDtlAj_Uf+7z z4HPXCh<75UDjxG4!bpZcs889=93mj1NGs`ygULKydhIKvDJ$r_t6=1j9rFS7g}-dD z48bzp2{uM)qbLM@5}HHBFD?0-@~ zAdsPvvHqriC6yXL?(^qOXqqcgOL(d#0Twxo*nWB@CMs;?O%yml-}4fhIH)y??k{n3 zbK7vTrcObaw#FW2;V(HbJo?f7dw|G7q&MOW$0JbQD&&oOHn2le)l8B zvbFr-dK(a<$k=-Jgu+owLF^#vkTD=wkZlH+ahqc+&;z21WA6dI7B}GL>c1N{R(|Xug0?NGebzHivkP=aFy344 zKA=Xuq7UVWp_+sL$&7ppQfxgRo^*Ys=_39^T=VKm+jhgAf}(0#)4$L$HbVD`7t_Vr z?Mw_|nm2+Qj{Mktxu?@X{))xZ8uIy*gZcGESMIDA-}j%{fZQ!b}B zsWV&FT7n2>@>E7x?C0mi5UFb#dEN5>rymmf%m=O*_&1+x=A&Y1S>2NCn z%s0Dy!(CAR;mO>}iYlzIvhwiY4oJJTH6y?SC$Fsh?s8Hf^3NZwt#f{r<{TZ$gcMDu zR)a5XG7(Ivxhn>7=DC0f&P~|Qt=#jIqSypJaa0@_>|7&G5u+KjVM%M)*a}K<6H?*w zsgXcRWVH(gazUegRg2tY4rR5qpRLEbc~`8_K9|~WOfZ`sN^83we1wfe=SyzDarv2b zEb5i?Q5(^y1}}q6j2^dFrhglSJgoclcKh<7vZkh@s3WXha%?3H0C3vfcWI2d?h|Nh79x` z@+ZVA5}AZy$lwD%B0?C)$b!#MOJXxz>n=MbE^Tst+w`44Cku#$x`^DnDNs+(i=d5( zw!ZWaS|daIJz>*%*@9FY(_|kwn8i*#+sz?R1-k7}TZvH8bkprv3|g+e+5Do$FJ}zn zr(CMoh4g`lv}j8=QrO_vU^|A7b6*qRDf+cI|5GS^BB*Fm8$~3w+Fg1zz3%r!^=6Zn zNrFSL=E(p2Nr>LuWV8#4OT|_zWD<~aVG0B*pJn(HFy8M8OUXH1F)+wbM&P2?o2){B zGhyx)@FnFcu#vE+ST>6-9hC~4zqxsGr zPHLLqOO-fh=jb0EoKQ5g2QTl^Fqi=mRMSZsyx$+A!96LfV=f52{^#cD0UY$mVC_P! zP_%em^T$7jGb+f53rftdu1@p+*>Lvw44m#t@y96!%G;(>X06#ECUW?cd*1WoZ9U+O zwY9Yc!NCAWaZIVsy@VFz+zbJqFt#)WX7q*|M7_LMV&mG!xqUUWT>cAPCZ>xf;sUVm zoVj@vK72sFsOK0nXS7#DrbdwO71N>h;8zIHLSP-2r*<$U{Yqt$1u8OSC=?_%-&xd& zA*Sjw(R+)5BrLrv|3;@a9^Qe$-CpQ}m*B6$}v zoU}^ci`soLkMea@>9Mzfvq^NsX!To5iLN(`R$TT=ZcPsB^4eBx_Ep04F%ljgX!TZ; zw0v}-2~C!!GQ@!q=pT~lb*}nMy@VV}m5|)G>Eb9cqo)C)Ji1%j-kcMLAwCT!4KHv7 z*A5D|qf9pH40x3F3g{L6Qnjk;t3Nso%9WA=f||GTxc! ztx59Z@vE-@B7{WtEmz+XR@|CR$BoD7oW1SfeYi`!*CWTa+xTHaF~c$<&+Odyd(a8O zK>iZ>mf1?n9@2^N%b>>cEB23n<5qsC4C@l8U}2gsdjoVY?-&X;X1}^KfKGNbRP8pj zGkEi6^9y`uBP*ZcHL%Rr#D_jv=dQu7xG6lYx7=KqfH-9}Y+srF=LN8WzR>?}koxiZ z;uOsu{gP!TNHGBC7o}YQLh%#!zB?9QweINisO;A-d6aMPL+LlW(*YXx^434T^^I#h z-jtlpibfBfQ_lK&khx_LWfTEY$~oLuNxEb?Fc&6(d!DigbkgOiNqhgz zCO#Zk$Hai(e%L2P#5driM1-ed_BTzt!Ouarm2XVtEvTDj4r_kRU`%d`9xW=guu5Vu zkYbKiV^+}kgz|N-^h;^T%8E-|Sa@|S2Np}5d|dgrl2o;p$bb6l)ag-XC0pp`E=Ss3 zGOn&nY+YxRP4A?or2$VJR_smPeIs1_yE08}Z4D#cUmwVxK|tH6J|Vq1UY)!RID<_; zT^&7mZ+70&fxWYvlt)llRTZz+5{ra2Pa?lm7Kq;>f>6g1)}Op)?E6i6Ao9E z-`70Dr;~if^Y*H^RNKD5+6~SmA(p4BhvT0SG_FxG5p3tIS#<9()(-Pqs^P*p;H=Qu zm&dM@UPDJ`O!0)g>1v|robLZx{39WPmdNK7An8{@DGvzUjVAvv(LNENwz7V|#G!Wh zpFwT9G(}jcHK=85L`C_nm?AKLe#=(QsiTKJ-_YSSz@@&&CSO%SW~|l z;jHBn!jk^=QYGS$WEfoU{4(R7+tI<_VZeL?g97p*3~KW__=R$FbG_fV#w(-tpz6X5bMaEIl@OAdl zMs?ZE%^tVJi({=>ANMEq6WEk*AGEuCdBPI=51rLC5Uw9+q?%;0i-FA+L`8y3{Z3K`#lCdn<)(AfAXeXPXI-97Wd>&b9y)_0JWfx!)+Z0%)b zmR9R<)Ikf!8o+co|NHmvV)NMfNW!i0I`6A}%B)htGGXx|71#9+?`N%z`*%f&|2{-) z8@tsrwRrdKl-Y|~#_1zcj3Rn&Wtot1@qbFoGi5Nkt3@bcLy-pb-2@O#K@cM& zuc}M;X9-BD4bQsrP9F34o>lZFR?3$RM$lXlk<}$ypku;GBX@OTH8zHRjs0@L=iV?X zYrTwC?6G3Im=(S4jG-(*G^m&pGIlVerUx$yAt3^b1-0i#J5D1j3n{4T4aaR$Xe-xv z{wb)5QVPnnXNH4ht_dgyVqy@PIyOJ>wg-op7@wE{A-p8=!l~u)emb5;lG4tWPfUi0 ziVPlc*S1Yo_6qEs+s-t}=8Z8fbZ2L0KN;(&tQ_b>u03F^1y@(KlK8L+lBGi~zI1i~ z?_@^v1b8wq;6wi$$x8g&Y`x3m6* zEmIs8t9Bzi!Dt0rb&MxQ7Mwibux?zGH`ooGafVe8D;{_;Y%CTH(f= zo;*G-zlux^gYp{96`QS z26|2R3kD`u>ZbE!!lKmoFC{!`Q>)>d5dBa%dI_#8_ALt1EvJtguP-&!dA<#%b%JS( zx@mror!8ej_%9dn0UZbRLqxXtqh9a8`5KX9?z~PVCp#C$#Kz`*`5P`YF6g2lI~0XQ zZ(wU>C5^bOLu{Grp5{3ag;j!p%|MgEVl4V??|IYTJ$~gKcX&n@s>_H}K=f4ah~r2oi4ThdQ)B9G*A||1(TpUdUkg9FWa$e>2fz& ziSucfTBw3})Z3ZO%-q~s3D8cfJ<9_-&h&}W+RgT3`}_NVO}GCCgkm;dz^_c{&?|0Q zNJ;4Vnjmk=v-e=92Zp%nd5<|@iF>+B==o4-DvQHfRkO_=ys@)Z@Wwm{@BKzoXrVy8 zxD$yKCp({N%4U~$yeQP`OQXigb>f%7eA#JI_%qJdarsMZ&;T~aTSc-i_EG68&#BSV z{u3aie9Arv9<)w`PPEVAq2@{R-5-42 zrP;fjPqCyYiA2X>gXcXv%*a?4F$P2lmbHRbpih^u!_izwRQBES6PhO96AAR~_>$nE znXj8-O1vjMtXKVx4pSuIt81$Xyn5Cp)S#`by-t}ad*r;-vAdtyeC(PZg*DXq&YF?n(oivyiFL^+81 zni!&@qiJi)NfM=<>YA~``$R}k^E->MjOD-um{qv_CpwrFgNj6X-t^T5zL~b({(bX1 z(z;~$%ISot*nPOagUy6ASs0EaIGCwU+%bI>g|xv=p43}ssF8Id<=?}f6(%ScFamzc zfk_m~a;kst67?uH5i6mosW~|@F^EjHP({ZZPKG^#j=^LGk_J9VIB>OttW;j{wB30} z^7dp&j>91-f*Q{26Ii&2 zW@A(k8H}Zu)X;EC$4MWH4^{k`E~esv9sOz#_sP_j+vKn9XY43tTq_m9-k(*vEj3q@ zeCKZRxx6=!YF#r$QkIUZtrrzRg`~cMd2K#7N8X@)p97$a~`;(gbw&T93#*d8Sh z7US(Os5Ra0kG#jARvhmJj!;{m*8a9Ah9b~(CG@f*5mA=W;NLT!e6L0RQ(Sd2es^8rjNE|484i|dbTDjW@ zc>U5e{pI`~bQ|0+h0#ovK6l5S>)r>yVTimocRPr~em>n_$<5_Xz12LW1tQfugLq&y zjEVQ%CI58Te7^dl@wBG>Y*{GB`+0}>HN#L-)1x=}Z;4#`OJ`S?|8Vd5V`A~dfe7LO z?JKiu_BTFCk$VBD(bD&wDzmPrUI@hy{o#S6;+P{UVt?*P6Z}yfpyO{B-(B`M%&2-> z!|voTWpVSUNCvNdC`2|Ria121%#u`*x{3WHeXgKIE`IZl(JrJl>5*BGGx*qjletRI zm7XQRaxC`gpy+$+LFFPzGV1Vu8@O&YqWpnk_hdp{bvV)*Q7%?O?*u;$e|w!gAbx$x zSK$-=Hu|3zvFeGqG#3jV4XztXL5yIiv!s!D3La6zdEN)jjd(h$?bb_UA4B$_1Ws6l z<Di|6ZXIzll)bq7T~T1A_<*l)|p;xzJ-6AYsiK@mv_BKAV-tUql(n^n7s zWiUo3JXBNC<;=~AlBt!p)4T7H^w$Xg_{jco;wF&hSmx#R_MO1s;36t5W(k+Upx$&k z1hXPKa=7!+M@k6^$gd*HpH)@d!Ao&6wB8w-m6p@|rsAC0Sr_3VYFts3lr9Nno97a1 zI>9`gIgURkR@Cz=Vw#$ql$4a?IXuZXF=Dt-J+$R^Q9#=`JUmW@9XtICkMtwl%+h=a zn$q^nS~)UO-jr0+f1yU@;YL@+gX-xj>KRfTA4|%pLsl}`s3%7zcL#8|wh;cYC_rqX za<4MwI3VRQ3wvlnCpslOv_aS{J)vKC<*erTqHn=w1`$l^@NO+b%J1Lx0V43!GCMmXNMl3Rt-&t$$V*XC>(Mzydu#Sd& zuU2XKVE3B6-;L5YVb;t&npZXf@ZdRrd0mNSLRTeh`hiXTf z%&$cB3wrMu&MeOnd(Xy#g1(EawR*rMjX)?R3%R~ZiO9|O8R0i>BaRrYl!*kR*aMuo09OZ zFi-(KA`sE|w)ty_)4V9Wa29HOgZtXY!tgtEYoQR6P-SvowzD;H zKTM3{7Z)nR(D3jGb$2VGk|JmCvE&@3H&kY8<0=i4h}0L1EhpyEM0q&8C=3aeNXqRe z)13|N*Z6L9nGj`ntUTtxvAv!{w<0(wiNOmV#!`8jfs*U(Up_kgEny6K6YNR?vVPA7 zn1zr8=-Y%%M5{gHjiVVt_Ly1*9!!Ri@Ee>wfn`s%#4bvx?m zdu^AGZ=3zys_RsCZP$a%dBwOTNExD>D^)n&s6+lYZYijim6s=ElwI)mZy$=%=!=eHjG(F>dShF|~kz51+Ja@MsT* zhtIFTDpL@^?$UbLvW#`9}$a`kd`dG4kK?}GhplFfgId7k(1%K zR`&cy0%(Ji7`+_P1bM3AyY`XsQ4tkPkM3Kt6$AgEj6{l>AH(!aMK0sG@UpTQ-0sM& z{4}zLkg?`pKeUyWMO73SCoh}bNmS9$STn^;aOQrZGJE?$H;(x9v=U@ebp{) z)_UQi_jF&YWGrstYc)&J5f$DnrqJ>7n}}Z#1zhKUveK>id-h{r^B=10Y_eMt>=cud zbEQg!@|0OZYWP$%a;3FUdeb0R@d9&Y!&R_Q={^J{Y+gY-@d#w31tkP~jSEX7q>D+x zV&UT}v#3cC6-cLa?cgg6Du;$0Dc6^XyV{huef{blOCxG|ol#$28THPk@rnh4O0f)M zE~(;3VuXSyZ*q}U;~KhsWFq_L?g)m;ClMWIyt%T8;xcM+TR9A5g|fy@r0%Jn#hFjy zh16xs=H7wlR;;BW1j$`}wqf!QhL1_Y3E{o12>+ z;1z8z`u?51z&a}_HFd8FT+2-K^kdR@>o7%~odN{#p)p5CN5%}nv!=LV-kU#z&cJ0W zpFZ}fs=@57F7&&(awyFC?K?O!Qndt)h6>0c>`P(yu`kLdjw)*V=t`dO3n2_vL42h|Eu$-^Jo9=e21Xb%KMhtVTovb zK}TG+_^P7GsK~s(=IM=3zhD>k-cNj8tM|g%Bte~sVtC5=_3{zMiZ$d&;C6FpQj-~9 zT*xcbP|wBbr=Z@bD@7ITbD27$`7gRXZk03b8eerNrjJgDv@iWr%qOp3jBgq&G;6%y z;nEygGSKH`^&dsAAGL%gT!`#q25u;K>^=BzOffU@43B=|!z*uUO(E{TdJr%MLjrOI zIxnmpfmDZHF|;T-?I(@`vXFko5EZu(*QpvQ=PyhC`Ed;C$wxVM{89MnXGKN-A?eat zF;Q2J1+AQt@d?4SY)H)&VEcS21nfu=Eqsp=b7f6(da~Fmiwv$zn~4f9{_U(vH%b9d z`O1$x=T8{rA2ni=vQgULMP)QxW(oZQ?$sfC(AtqmAAecTu}gQ&)pN}^+Y`se@pM5v z>?dS}*pC!dD3)5ARKk;4qp_o3OZL)KN*b%cy~r~c(M6Tl&=hvn=V}4>+hbe{2m|Zp zy4mEUZ_lV(mUI2W+BOtf zkV%nhU_okD$0qZJd3$?POh8&Hd=oWrAjRkE3=}VDZjLPs7OkWkUA(vzv_Uy5t)l^= zpnZ0SC&){9QTZ&k%(vi{1VMVk?T;bZ+aTf8LJoj5+KT-QmS?De&wN{#P><`x#;{x;dazC7oG z{^e1Zo1pm}03m`(K@-y940;uuj+F%Wi|v8btAnY4<4_y}Zu=Lu^Zl2{^Np*kyw@jg z(`@LEuO>`lJ=I| z?6q(lwro6th8>XslfjOFqDNCzvf4@-D@3k@i)myUgQl(Ds-~=@Ak%fS9kyj1G}Uo zKHkm~dUIM&Ss(x8Zzpr29!eI}l)5u&w(uWES$}46DmrBnRp%C}Hx$(F?q1OmFBYY@ zdWv4e(4Nupt-cX2+^ysVRL4Iy-;g3wO#LBsg{-gokWWN~9>EYW9&cJa`l+E8EgKne z46il8q>Ph_H3er8R>fbTHQX0`E-VVsUK~LyTavAi&AI4_kmz$suo_|-pXAv;L`B)J z(1?m)(W#1x^j+6?a zc3Pw|$95z|WnuoYVlgIgp3UtPbhL$(AndbR*nJw1fYP27S5ptxUu)vv1VMu{SV468 zEoIr_{PJRAgg~=#6@f^(-HJ8P5sZwpOV&cAPt_}&w)aKgLIMZ zN0Mg`UceFlY}B93oiizzSBN%=>F(}+0TfTCzrLJzdTzD1=sWd56@i>soo+A$3}Vr1 zVjB1ymRJu&@SS&D-OQ;Z4uWjcuImzJ4Zo}G4gM{QKVyb3m#tgy&Tmj*%1ewVm;JK( z+v`ql<@;k0>-}#um44&%e>T6qfo_7_9)6+cE6fhiqX?QJqyZM={*-;@T!Cv%{TtIP zP*wTm4#Be}pzn778({AG0jkib=c~g0WUlUKRn=`PJ3Icie;Syfa!fxc?9KW-yC2t1 z&ke+dKzGvvGJT0VHiHoqS#UZIOS2_AK}xS<&h836_J2UxNt$1{T*txj0 zy1~CZio>@!ymRB@uAz}?#%3Mbx3wEb$hVy5ce}Lzc-CGEWJ1MQjDolI@mK&f zsX{e6ny>IaT-I|Qz)DpsmFMX(-2*s}>rURwby>69V-B(&Q+k8{^8;|ROff69fH~aI zUa!sV@anm)v?|684tov@kFXH?gR;0M1 z_RkIHA;R{%lO=X-vmPNVwa;3SYEGR3!RlU;e-{IX?)`=mS9Ez1oIMM&=E%SfSIPK7JvNOrTuPVBfqElObfslYs{%|PfjK{49GOw67C z;MWLqcX6-)D>PKK=b_p4|4W^Os|ea!+4NowJBT=zJiMfYKIXJdTno0}R46o4jS zt=+S6r@93W`s=um<$JX83R{PtTP{f{ zo9;hklKQ2^rI(W?jkpZD!;e(%@GN)nxeNfj_-<)=9?(9mnqKTT?kryZe9p6iru*>yd{C!XMMY9Y6-$F*OmvQ- z87eCa-D#N*)DdjO7UD5kldJ~j&s1=;gMeYi8Wx`8h>C*G;Pw6(jXgz;77YX#ie;0! zE6uYr>rlmrA$|tbAF|WZEO_~rt!$%b=MLos+)%OG#3)h!7Ffd*#lz%nd^M+>Aqd{T zWy)IN%jmYEMVM;O+1{@2cv=2_Eh$>AIy>)$8?Rf`)R814bb*6NK63KoDudUYYOZXY zOsE#vXB9aGUeUQWeA(0WJ@9UjU}zX852#6$4&(;d%Wn?0EIshY7 zgDwyLdic=I=CF`?_6;Bfe7t4ZCu7jo9Cv|O7Q>Iy2|Q_~rBpj};5;@LG(Bq>-(T*T z9~uOJxnx!oce&nFsu)nT?S+Ngtx#>H)<;92iU)l2T3cI#c#uy?Pv;8&8Oid74Q4XSbcP1C3yI0e zI~9QO0qpSi!3_{UyY`0kHuFFI?PL5pF}CFt@m8E?KP~8~T{+C1k(*gqw8_cILA+tU zH#fk~00zeAlj>T4EmNnQ>Ni=btOMj3+V?XrSP(G_dexkSw%^OkANkY@V}Kgutw=!~ z4nlc>+~<#JAjZU+#{5XDN}E+sU*^PAB6EzXy~<^_SO!9q;s-#PX5r^iKm{teYo{Sc zl?(qBG|^aQP4^l+9B>$=`)cNc8%NXVVvomCSC&&fk5tXRB(NDQ71e~I{|=SmWAPQ0 zCNr_#uJ(V6W_wwkKZOnKAflDa5JLN31*$JP-{vJ~TF(?g);`VmNELy!KT~8re2y8c z#=oEIQ%c(Uo^Nvm?|;+(lJc%-g+aF?_?~?T^|)&9P)IP4OD~>zlT>YPdiu{{Tr#i` z;!+`(^{(P2Ka$bNgL}uy#-X&S7*=DspIn3hId*%MpF^Rnh%wCkE3IlhME#kji9Tn* z>(2YaFp*ko6&@c%*Zs+zsuAMg6L?kn&wKs0@u<=lli7kU)UIsD8$Gk>aj=}tsT2fp zbBl|^-_{;=S{w*PVS(U@$NLA!jZNiRUj%M;d2U-W%RGT_a2x?2hs)=|Q1ZiH&|}Y} zIIy(F;M-DN&~h8F`sx0KVp9q2Z>G425RnjpVxzLIv6q7M6A$M6!iTcsX0v;MS$G>s z4i0fonjZ+Kb6blf-!Bwc%|e%Ga2XyRCH=+{Ikb|fnj}pz{MRxm7f*ON1=q#Q&&IgO zDF&}0A!LFjs&MnBcs2>dA}``wESw2Q7nppe5>*kI`P-WNkKZ8VgZY4jp8FowuEjxq zWkm}03QI)T7Z6ceTHP5cO#>d3q2n9$=>EiJ2~RDU+U_>EGCmP&8RTJHB=?&X?1hA6 zHCYB56AGkl$;uCD<~r9QVogtHtiJ`H2`20b<)5YzN5{U?;Atpm>Ed_lQ$dxaij(DP zi}uLFuht-bJpSzU{2z?fc}M#8EWD&f{6R3nq~$TbBWi3IkL|WNn=3>NzFHsX6e?(# zN`BNsDR?^Hrs(MT+<(H{#X*ad6ybhH-PT9-@zXR1Oj`{JCCvv+4I??}yL<}@zr$-6 z0A+M`nGVJEuCA``TvjzUG^_&pb6bKa{vd=VYJGkE-`fG!QgR=E(^9-VKYj%b)%pyu zz+GOBzX>${zO@!JP={LG55H!R!*^QGo59u#uk)J)L!o@G@p|8XeZ*%iCNrL0SGlLp z-pWsg#%}@*P%!|6q4YPLrx%P`im2xAN|o}yArWAi1G`vy^LbcU*!m0hEKsPZE|=Bb z-`{s_Z<`E#$qj4py}xX#aIM#7_yMFR(gBaT020yZ22&c&!T!Ea7_TOvu7AIA%Wi;t z*X{lr%6yHFrvZARe=8d=%~ri3aQ9-Td;kr4)5T1Et}_zp0jl8FZRL=d04k<*IX_Uz zuqQKE$xjdN0K{AM)-oC5R^~qh5b|8eN?BU21aHmn&DSg4XT82RLM_@rgU;VL-c3Lq zg@i`%LT5V_3jygn5RU2A+xw}(9JKk@8!|Hrz2@+y8IhXym~-n zB^%B8AXOv~M}w)lH=M3{Iqb^F9x;vd&3{{oVw+A4n|aUkbuoIFiQ;<|<_f3w)ull* zq0R1WK=y!nURNsh`7>3b5xse)VwG7iLwxjVVEFH5X!)|Qm%r;aCS>g;IOX_H{SxseC zLKH-rv*Qh&N%>HIH@Hr{H`r)^s9lLhi)8iR)*)DL$Jv_tX^jx`jq}N$xjI}|#Vs`I z2)$G>Pu4-@eYL$khi7-(UK8sHZYh}x(kG22S+tOC<4UR6BK{)8K9)al&?+-^_86q3 zi5zI6#c|n%#lGo}+f^Z`lV_u!8IZMUzAt;DNvMvHEiY;{PI_ z$Z*1sg3T;_oPH2wSR{cITRlY~AZQ2{@6GRQOg=kvpraFLMS`e+HCTTltE8$+qQZvG z5|j8PKrz9hn67B;jkRTza#jPY_)E;8Is0^_rT%7uaDHI{Ba))LvN9il4C4&U1?#YF z`^Alo*^LKGMwi!kyXjhiX>6CjK2dKehgda5*VJ^m=gH^l;^Aci4s`44hcf2Fc=1N$ zATKAKt#}TP0Qjt^{x>~5fs=8&>PbB37L54QzGdz92-K7Cy%Ogsfx8ny&6M~5Ru2TZ z&LU`vj@w#6Typ&P2Cy}00z|Wafl-u9$>ef0Se9_-Cg6NqX@GbkdG=Mt+xrJQH8pj$ z)%5)Q{P{);KwVFpv$C>wI<#g>+J$9Pj%&}w!jVhXs6vdkdPDzrfOQ{NJh_1exjnx6 zgQl|bX2@|Xm42`_i2uK$ zBJ!7N(C$O_Nw=(2KY{CB--|7Hyq-b3E`R%Ch?tAHbu%~}#_@UTf87g3*<9vrmj^&_ z-QP+Y!ZYD3nqqNdktv-hq7I3?7=O`!`Tl<`h?PSUzIx5YObhk#In90)D$lUW5UYOS z&Y(%|g1jDD@b1BFJ-JT^C4I*OSwB$qezNLqAzYj?pXe))9rp>pQ-rF6%s?mjFbAy> zxie?ai+^WIMX6@VRG4oAzl22^JWE0lzlpSqHvD&bb!9wP=pN!=f^h04?-}0l#T2Pl z=nnB$s5h>~2XecFM})NgI8DJvVPOs*xJygKr& zVQE?IBN>HNRBaji()vx&Tsp*RIlollvZFTJ1OGQrCY!N&Uw;~t707UKbOd{T-1IG1 zTb*e{cecWb2M?WG7xX=iby=6QP}n^5C^Nk&^M7P2e~OyXC{ngt?DiyfE=pgOk8Np3 z-bP>A-G?QR<;tyg?>AAQtE5}%v_+sY9#q6tnwK`Qtw`EZEpKh;5dTbuI|5mn+i(8` zHH(6p3!`>HiT`6!b90)LBdo&v^vXLzi0|i}(iGU7ejn03irrj~s*Vm1NipFQr72(~ z$<;N|O2{;mSeZKhkx6Q3Zcb}ly0~1lLe7+nXj#Glu^&Jo(W1jxW9B~&G{`d)5C~Y5 znxi7$ZC|wgeaP`zHR$am{F4<{SON6j!%;?=!D2Tz*SEKYRv(L`;!6r$IMNuM?w>+1 z(2nqL)zp=xXJeAIQpUC(J_B=~a%iZ%ju-!Xg0_A(C^oc$hK>|v$CQT$F}u~)plV$Z zYX-H#2J6wHnvg#A)Og^$zNhu>BMqG@{O8ZQaN&LZCXwnoH{>RH^7klEUqul6NO0W} z((}HK?QvJQI)te0fNNKOY%krg>oJPHrW~*8^i7Yo{MP<1QmW*6?`PHk(DA=`VxgDv z@By$k~W&N}-F*`fE`4vRXI&SnBO*h%=(nY!S=9=i}EIDDPLV%qO zl{`TB^-*<2;LEMss@t5xb7}qakydwBs$xQ->S!!J*Y9eb#?peavY{M-FCMp2LJu>} zLBgAmjzModc_R@x*QK6i{crJ)pPow=L3(xLX?(zwDfq1H&7S^U1ig{B^1vLi-@fvu zv6znq&7{-o^BpntA{afUN)@t?-buz21L(@CdyH6+S^OTZ3*D@Z0VRB7+{dCAQN!2#dF>I6^aRdDJDOSN zmHB|0y%z?O)nb||u7Ol?C*tqVkBR?Ym-w#!m5;Wc22622%HIl*qTWiNib$YBK~*69 zu6`(wZ*IoY{ccaJoA>*+`oCXYjyH)gwiR+{3pTpC)w&Yz5u!-QBySlLAcwz=QzS1< z=G;7+CgCQ*$%)9V=;clMQt=!B(uc>@Vt;kP@41HlRP=*GQ80NUPPG&l^iS+ysU8hN z#sAnNk_o;Rk2?$3+1rUpE7a&$Oyv$8K_YV2>P&2;)$Udv2lRjY`geQz^T}$x*8s&* z7kbt*FRbS>cM55YKuONs@2;^`6)~O0f~@T%XI!H9`t#ORwd7+i#y+kzbd$n$jLUt- z+cU6&dGWnZda|;zeSIcK3#vLm{!dxJtdfgTo*e69u}L5Eb3j2DTP^EB-U87&pf99q6J3s3=Un5e-SC88Tm&8YfL> zt&`Er6VZyo*o!+NY?-rSon|sms@M7-+{bt<(_*$^)mWQC?$bBq{Y(+6?Q>)DI6^H0 zUO#?ce@v+K2F(Sgay~ViLpl~RUbP|F)#|4GEe zu^=DQ|1HSb#2H@xWJMpT9pl9h%y|)oAv7aq7M3^VuJS7%W+WGqhmjW>9dVdi#BFsU z1}J}Erl*1o{3YE+obZ#fVlSEl07S+uY#3dp(CR1dI&?X0mGl?FA*vOz&-9F@jzvm- z2KGBQk1(2A+~CZZB7C@TiNv*xj}$Q;kZ=?;P~5QY6jrvjA{rWOjci`mEpj8{ zBQh0+h>_y_Bj2(<%dZ@f9#F`LreQ(ONG27li?@=1wFu6i6v^<&(d|L4Pa)}TP(9Fc z9QaM5$k28BU#&gwaaAMG-$u_R;l2ZBv>s^PFN!d3a^B?CHGo{XO<)7&LLi$&k$NLS z^T1`ii5fiIY!9@pJ*IK%$dDf<-B$2FevDI6eP#|kIXQW+mMvN^9k{E-O`yp4{>GqYGc$7t>)EdZMACpAD;_HW&kF(ea_N}R6%8eB^;_@m z*1w#GzlpT(JYKs2t@9uejeV-y;;j+jB<>4qAo8OahMlA{d^88>doac0t!_%;6LnH2Y(h|l&$b2wq<9A=y# z;dC=!{A!-xzv42HoOxUd^Eim+cW`0@dmcgWEZE{GC@LPxlRnY^CWrNIS{d-Ivqb3X znBn##(N#35r_c#P6kj7DLR9_YM2s^f7_DXC`<^kAB3pNQWdC99Nd5xRk4>w1i) z5JM)Vo&s&gga^3Ao>b0mf#z=!{rIHLZ73Z{9T`k|{ZXxL?ZIL87q#{t}a?dh(tEvyQ&-VCs7?dzk3yv!4pA!nElVz^JNVSosSnUiH zpeQnTe*XbBBW*oIo(p*6@dEx7gmZ4VP6<30Moj^3g;W@Y)^z|&3$s}57eJ(+AHXCb zl?JRK$7#9_IUr~gEpDV7G;eg8ySME zte&7yR_XFW`P!3|E@bqtN$&o#B|vnJR zt1q`hcy`;f`^j2kxEBXVX91ezq&Db6VNFeFLO@ElaSzXqHnqo2$0SxjJn}J-zw@Ktsy^rnJP|-?f(Ynako)w4P4w2 zlG|qH2T9pl!W7tjhb~)x>0yzxjilI{jS|w+qp{;nj-i_!0?l{azbrOdqTmay|HM!d z9O#wk-V1oSbN&|a;_iR9`rU4$EzgQNBMYOOJ|0ntbLJLzh0Ag0>#y_rb{p#43zi7% zU^7-TZCd1X`CnZEz8#0AM;~u75L?hA-3yPL=go4w_}7a*%yJ<0u^{tMrKOUoP{{P2 z-fmv`WV(%VGeFp3FkswjE!4RVX=Z)IhYek3kw+S110#K%a*iUVglLikh0GC8&6+P;%9Q3+TFl%dha5w@fjozm;`o z>0!hIz>@~G%q7D!$r+__6bP+)@JV(irh)lePElr%zJO!RLC&0;${EEnY)fL^xWmX%~D_!wsvhOc8~PuE&aJ4fcF{8*}bL5mV3@RPulQ z_vj5}j`L<>ZEJp5j5k@&L95Ra(5q|w2gofU!lc&St9ybs#}SX;iXaF_AF4_MCc59k z$=vByJNxoX*7NrawSHMO3%z2!sUIoxCnCF8pd`il;hDxxk~f+(l1Mj}Jqa2XI<_ zOOWsId2S!DYs8$^f6V$)wG4P3fJT|u^sndUc~Gw3E@!y+b>gfeG;72ZeDJgPw=ais zKA}OwSq61HVY4=mG}4*ml|InU=%#-LeMkF$xv!0X zC4Sop{LFOS-(jXPR+fY}Oh*@)5*g+)AznygqA$856KAomJ<&2Zuh6NvEOsMf;IcVJ=Rx z$ht`0)y3t37Wrij6%iUnZ)t2~1n;jNh_8U4HA4PDLs%{k7W5L{^1HULS>K_kbGnl` z0Sv4vkIj6PeywE;tbjZve%gewy*pdOmtF9G0HObYZu1nn=@GV;`}FA(MB3OV4h}1b zig3vo+?hE;5fPE)uH)ll6y2zW#l;Md0Bh?*%l(-vovk-v@XaWFZ4Qt0I01W{tqDD1 znkwQpG1U9>MEqP9#LY%3qEPEcIIYo~I;c7k-xpj4!y{2T1ZsEYp0Y}=6@Vw{$Uf5s zSs+yGl8T6m3!m9RmC5&g`ChSR*w>F|iLUj*EkmTk0)Hj~B0y1)uuXwsRYb*uN&yDh z<=2n0t*F!e+UV|~MK+ZIx;Citn$LD@M+LTK<5lkPKtA} zqt!XJ6Vf2ViLiqWjDaF?Q=uQv`_1Ll&AhD^8-gm4Y?YCcJA%m^x=uN1m>}fd%k+pt z_Rq66iJ+_A1v8RCG*A=`U}%>jtJd~Y3Vv!$6_0E!Mf=53SQ@tJ3_@J$B(jUY^=~;D zlcUED;i{&ElN3{Jx78Tq@dBT|8CjHZ<#1`libsCMhcpHw1SZJvXl?!=<4SeSv+Yx? zV_H1U;4~xDxyiB)vY*8jJOp-jTf+JgZDG)CZ2FKLY|ZxQv27|y2t8Y3msyyW+S)S7 z#Z;!cY$&hY5-EryZO^-V*zC5q-c@=p*f(4HATxqrmZ;!2?2jey4Bp}35HSzc ztn>bZD=}3i3Db6Q%=Cz~6SJ`z1uuRkyA{a=1^GTYmTKgM~xQi+)V0OVijO$7)HgC*e}{7Zi%Y~b}mRqQRkApAftnO`IE9nf=aOw zdwPNfIkU1C>YTPjJg4fNWHsYWTSpoC=opvaICwr>_PUey|h$P zABb9B0AGVlBlH5~bls2VjJm*V8*6E1c1>Ux-^eyFlxd6t%)0dSTs$AFT2}$EliKLqjpuQ1D1xn4t%1N5aEhK; zwt3AdaK)bLCV|^@)(4l6-|KJP9&v#(&Dn+5gM#nX)zz1WvEkuATC-5otE;|?UAnru zb7xZ^7KHD2@_V2Sj7_Fepi7{rAbw;EczH?$fKa8=l6krxxAvr46Dl~Wwqg|%m=c>i z0gnw+BEFM#@uDRz+br+yO^ChGq&9I=a(dC&y56q{?q7F_}7f`(}8 zZ<3Xq&`4MCOn)`tILYwBF^+W5I~Gv=F;R05j_JMN&T+tOfl(OgS7XUS;?wN{ ztwlJ9sAuu|J~T8mjtq~BFQ`$351op~N+v4A>UD<)%L|>x!gwG4C^_*tV62jsstkcg zSeZ_cMq_(d_)fG|nY4Y3eqgZw>;bvKzFldg%qzk$!di!Lcgb_5B$G%|IVbz@m&)`afu^m5wIL#F;yMsZ9(NIrDjv}lzgYPSEQ z=`4e??7}Vl5lZ(f-QC^Y4N6K$w{#;V-Q7q?3rHi~ozl|XEg)TIbIzPU&d4~!_`>t- zd#`(~YZ?EOwc*rRES3Agl=N;-m8~FZdDI4(D@1KZwqFPR3LZ~6K7bJC{I|5EK)?T! zfMXLxoam%3Xfd7jj#D~{C{%<;RNClmw5?LzTV2*;h}HK}Yn&!iLp=WGT(WRz{RS+J zXe@W{qgM2+JyrYAJx)kVl7wWrY2fy;OYl6Z`H>Q(YZ*ydpIe#xyz|9kDzq z2U<@O9-k95g-rAtF|rwAv+Y4OS|);ceqxG&YOitOdYhH5MYKP)4b5-IW=hJ-a;?vl zAE9WP?iOSt!bZ0Gw?@9VQAkTjgmrh5ji&L19=EEx5FInKR}>aTmzL6ZZ@}k~ZaFnN z@@9sS59S4tPDu13y9Bn|7Wgi~Ic~C<4MSdt+?O47ntcEp)#`~Fn^B9^5o|pV)DWLh z0ovcPbE*J%u3ittr#$~yY!bgm$3^&^ygc$3fVX>~ntl{80`}QzaBXu-NCw(&%70(| z+bpk7SG;7?M}dGm_2s|2r)Q`KW_o&jhc&R*O{+)Vs|~WsxK?{FG&_#;_WRGDjQPOp z5f^#YPNla3P*I_uc#n<-ra@=NpJ@a3bj78Hfh|6pHT_DS6JHIDSmR&UB!RPKALrJ5 zA5K0a_s9x(Hf<*;NVh)UA5Bjs$Dxoj#Y|&KI|Lze#AXI?071mVJKI+p27NZ*%XTQ@ zz`CcKy6u+C+8U`cH*x}d8!7U?*rx+-71^Okh-f{dV1ne*^V84Ab&Bo^MYmu4O=llj zFe1LBvt5e+Dfh%GUg-i?<9L34wr+%e6ebJHm`;-HW;ltmVuxGSYgnc0vOaZ9n!o0; z-+we_1_U5OCOgUGL7UyaQ=CD-jY`fxt8X`BIfL{Y!A`~`be0q)7h zTg)MJEqYB=8Uc#P<59hkB$VRjqL>vg>q!@ap$%~*{N6-4NhvW$e!#W>eeRl?*fo?G zv6A630_UDWgg?u7ZpMX1kYYuC$Nc)-#Tu`K)in`!456Fw8AKN4awQ*v-H=3PgzCcX zIy7!%?3DK`3gd<^3bsKCD~gWW<^Q!L0INzFU1TLx02>f&hF9XX^j}vmwT3W-JT}n= zYkb=9s*fvYLr@qE7qoUdEPJh}%ht_K!Z+=p!Vz8!KHEp!VZ^7~ZCG2l1`PX(zIYp& z0jSA!;Y?#V=B6yIf(Qcp#;*q!8l-eYNhm{wP38WxXBD}n&DqUGloZlRxz)MR_xE4) zm}&GYzd1B!g@o|)lZ)}^8(|LdHfKwoU6^A8K_-n4-=-LmPZa*Hky4yKRf%?axPlj- z6R$QTQpHXoua$He1G^IPEJsETDXm}u%sM!Y8uo~$-NQD{T;YQJE4yxZCPvDgy0nMXF5Kp^+ea3Ay6?3g+-!AOJM z6SG14`H@HKDlrMJTmmpi7UbrJTXM$qZ0w(ROkU08dAcvHBBr;$kf0cGgkhn{B?JL! z@%pFBc`XVGN)|X1zSP#&*SDPsYp3*qsJ60u%L>i5y9Geac7at(VRYi7mvNPs3GhQj z!<@7LZ{xsA+tV{cC#O+qqmK#TY@0rPVN8~xfsPfv-|t$o?|5qS4@(CiONUnwhG$A1ZJ-FI zOpwpxfm{IBH7vk52J&i3#^fnIAhceE+LG{}&*O@L=I3q8v}4xN_4MwxH;Z!jx@)#D;L9-Wb6uNafhFMz_(JWOUT(1i&saEjrxISS%ld9mHf*G zN*)P?;e)V#TBefk6qtF}qA})PMumkEVSUDu6poxqQb`bRVYE`auZ+3y z>(%1|6GR3GmdJ_LU&~2c~mNGwTqU#~nQwB06V7AVKtK3T8`n)(! zx{1ypJV02N6MV9ct+=3FI!sS;PedtcG%aKJ^y)1nOqh`RZK)Ly&15~F7hnXFBKuhv zmy52dxEXtBYaq7~JwA+j^GB(FF4DF+FCGv5x6ASDk*>v)p9a5Rq%;SAk5klshxAdY zs3(PHyL|YxG}y|=fyYjnSZ|1>Bo=?@^9z=JWI{21cx(xe%be4oabKKXWU=$l`+6(~ zxDS+YV4g*6Ff!hpZ36~fLj5;tb5-hC#S;DO2NiG5wHu? zRr+3)9i^}sJO{T^Q33UQngiF?UW_^=oxN%WK-Ib#cVM_>@6CKWm;4*jD zS<$`(JW$*56f#9jPhU=c&1HOf>9AR-;nvW&YNtof8Q)9e`mDKoI9v8WX8;%)tx#h& zaP$U`KiM2Nd!bNpw$5+K7*GMM%8rGB;i$Ni|Dot>s-BZv#{fwMWPI;Z4%i`-%B&yu^JDMh&E3ve&h*ix&Pgt$9_LMBXBX<9RyX@1 zEs7XEw*c!l{i^q+l5pUU<2s+An#b|GKvN_cj4m$^Eo_djsmg;MK%L1C7Ttz#PsQ%Y z^3#+4Bf}O#fkheMfPCp7#+R2~ObQOqmtI`;VHdGZ@ov$>3zZt#5|k})@E`0!FFsCu$xAwaJuj*P1@Pi0 zJK@iOYSm#tp*!Oc=F8l49a<-E;uxC~^}vM7g;BT=HP#2Cpr!Y+u; z!lM3hS5;dIC*7;=Xb)_I!~XYq zAL_X=l73G$r!==kS$08GR;CMRPwx|v_P#{4m-OqvxC6$WqG&-vhH;p1WMz~DHMbWay+ zv$>jfQ#c&)E!B9(Uq%6UTPU`!pO-~{cfK+2{aLEqVla3hM}1G@s+8RN>q5@d0;bs! zJSd{*uKWS~CNkN5FfTW9z7K;6nXbEnj7!m01*t>&E zk(bA7;C3!Y0q9kYlUSka`4pEEyT*+W1W^1oiEwTX%5r_3Ng;?td9w30W(w08T%Tjg zOrhZDO*e>0=y=H_ zb^r%d^g(-02r5y=)oU2kN+{R&Up@)S`@N0)($Z%TMY~oj26{jpl@efPyj1E z{?WDfsjMXP;MpBbS33uP8{>_SNC#v7HE$FF&uI=vux#D5FKXj0RV&qI;te|hb z_~pr`BGdh?7WNjkQhpPk_{lTsC>d2RR@U~eSG*!YENrg%;I&1bJF)5NziPqezr`~r zT0O@c@1<~t(_H=(3ceijuj)2{1a7^<=G6w14m?m z`4pi|cVc|tz!rH)|G7XGIJ`nieI9-+bR?G~QU^+qW5!|t6soD|`c<GKn6%b`a%)Kv0I`$!}O7d5QvdsOpBwU6|01TddRk%nwkfB zT0S3>gPeQiTqLC&aCm@lNk$PFJa--~awBovZ-t`IXq$$2Qx-pZAv*zV!y}p17K+O;lPh3{-{@7TKWgLpVoel zkDoPZ0V>ZLLJ5^Yqr=8CLq((UJfOH}Pr2vNMsx!UAm7#E=Srd`aM~{dW7L~(85!!} zJ7Ys2ystZ%W02c?r<}%`D~b*a+LPc2r(adB;TrG3zKz@St?5z-uoYq70^8w=ea)-q z;OQH;?cv8F=OL=p?a^;Ml~rfg{-Xx=EhqIDuechrLQW7>KL?qxRIauL+tpUSW&pnn z^oh24ClwFA*f9#c$z6-!Eyu9!z#9Zc4d?k+6LsCQ#H+aixF&Fz^%_5)E;qgNNhSqW zg!3@)>p%Dw>`T}b+{?wIUp2J2k4t8pC@>S9u z&@8K4TbJFzS2S;*p6i5RysnQCu9?bpTRqO7U%#u9o7*+njx0dxX;&Nfd4hNCNd^i5 zwTXSFU)XBkpmS835mta2e8N`0S$5gK%&>xjX{-DsrD5TP?xPlgRhXn zSkl0F)HXoub)4xEkq)vd_WKt*Bf((*+*WC|=*V#d6p(Pot^TVe;EUuqh| zEVsQ~AIOgy_cfu3u-x4-Sbr7xE2!)>jeL&|izs-AdP$YhZCVm3KEeITKKd`F`)21X zi1g&eg_@5vMylL-yN}U7gQ6a~EmE@G z@yqcHRO?6H$T;%tjEVhN?c77}c3f6GLt{Ko??~a#(jz8ADJw{pxN)`N!jBFKj?W*6 zOT;PwyH6n1IMr}CHt7Ku6D>21HeR}Ah%$H@6;i5QQ2NNoBUDR&j?}4a8D;w(tMuo5 zp`W(MdB0E~2Omz^i}k&9UY|!i)xXg;kV^LJS0=YYZX=UO@!`>Hctkj{DlbJ}+iywT z;_(=Y{_12I^GEu<6Sgywm`qlN+R&a&!JG{|n6XyJYjdJ@^`eY*k(-a07d7k)s!c>c ziMGv<;HAkX8%4YS8b-1=z3G`O2g~nh%C}Z$VPx{uCNenHEk*t@mJEGVJ@8!I-`yzp zSvM64brosnyO8`mvH?}wXo(x{5RKJX3&8u)8te>16@iEyPMtScBU{gdR7^`jrwse4 zCyvQSjg$&4BV%t3BY^w^Is~Xzf`pbC$f?*m$hu>6rqMMo#&HAkgZ2^f5_vF>_p z)Aq`gAWpS6p7Y{sX10SPub?n}pPmFVY|Gx4V~KX{ce@=Ap6y@?QkE|!mkR}R@lTLr zEhjOm1<%U|e%0LoBxc&illmoUk`t|prriwR!^l_f=rxtuf9=oUeWtFhtv&M*;J`Ff zs=>=KGGVBIY@{ZQ83FD)h^}w=!x8^bYOvoKPCj|HiMZ>#uegSeI)JNXSHPS9{r=&l zrT8#?hCpicyJ=bbAC zH6q|6VF3T@x|-w_^MT4q?G?82Ro`*&Rwa_(mjyHk{;4?>rC*z`e#bVW3z z)H;snKbn}=n#*t?(7~jRj|}FT;aUR>zJnKxWr&gmue^~R_L8u7jt~LQrnuPoF6kc5 z#X#zFuT`RqGk|B#E5SKXZf<+|;96sjePAm`H~*Plwx?uvM?zwxD#e_TEZHNWNN3&` z;^W~o694Eai&w}SL0z4zxn)oAEuC#ohq?I>dw4*R%#NULV2O>2XaR<}0|qKki&v6- z*+2K-wOT+$Ma<2O8@!5-SK9=3p5mjhqTLb{spHHrI_3g<=Vqw3A}TlLhAiRDK|}OwGW>V79Pzs z!Ql_*(6SO{44B@1#(;cbrp-%;Xw9xHNW8c14?}58&s>Z%jUFb$2_gGs+0;-PA!`Ar ztliJ8R2LL7p6pM2GdXEK{ei$}u3kFgVj!2=+vd3--1Vq*p`Air!Rsy2Bs6~_RbBmF zo=1ONyggN53~UCHp*BYt>%+ zJU1UJi4&0tud2)K?8@sbX0X}9^i0J=;w8zYWhfODqcLLK(8HxBqA4dWLA4@u&%~FQ z;EE#;J!VN2uvB*$J0|B8))@I=Z7oKMAHC^x5C5iz)~U32|KHGb;|amq?u?o;6-IP! zf1aYimU;wItwRfAO>O3naPELEd{n}pdF}1tcQ^)pXwMIJ<~crO=Rx7NBS5`2ng=^r zDGYQetVqfY2Z3fg@)7nL#(Y{3XAKo4{W_ki>K2(ND;<(UCLvEpODhVI0xL;$SVGhR zvZCKUZBF+YP&fU1Qp=fxs&+Y-?*H!v_>ovnXbteZ+6E7cbINiJ_6Jjix*sd_(%t&p zL8>AiC_0)&OYUP_b5TtI`uT8|kf{ikezO+i*=Qe=7L6RS*lyrV2P9G$} zk(&b7Ie#U12ceYPMbB;p@d}Y7?1`L^cOru3$=Uc&gV!JB$xd zNs`ZzgEq+|QHWxp^~ppXzvJ@vz}tRqvNp$V&=>X>I%A<>;rL3^kjc<-j^umSBEQ)l z{-Zv%^n`@NBq-8Z`e6ur@x#p9OlgYzNSlfbp-d6MN0Z<9x{@-^6h&!ca~&_Ve%=ij zT&y9RY-)dTP{=;-O9pLnd>A&bb@Cw)dEUvn8{@F&*a~>*yxy5MAD$UNz7EdAB^F89 zq>j@SRaRz>mrVmwzj!V;bq;s9^KT)L=IZ}Wi@DTbZ!uT#={2#0T%RD@ucD{?=(&)l zj7LbW+z=&E?`Rmehe>zM|M#<_zQMh2_Pt-n`gq6PyRzq7FM1~q+>iR=6?0HJgi@U7 ztRH4!^I*fE10;$l@F{TR@X#Xj<~h>OvV#~R0>DMWVURZq6jxi93J07 zQScpyv9UBGc^7QC(uvkvN=*7mOJqOk{}k#bkduYDye8S2&WkEPsIWo$wnS^yGXyeZ zbr2HVGMjhRb=0cbf(^Y0va*OMvDhGTqA6yaN)mI5iqpq(=IqEsN(!nVq>--~KA@q; zjFxMNOmRSgcf(=4pYDCROLDm+^D@ZdcaB>qwPl5Nc)T(#sU{Irx)N>rX1MX7|LpHf z!d#Q}Gt>54Y2yrL(;*4L6iIa0gdx}nwcZ`K@7f59JzWqZ^1-lxC`$Sg-BdW_uapR2 z-EWoQAxMmfbcrX#zr$w&+^%ei^edQC^ybYd-yag#19^oTSM1KiX|mH+8+zZWW|O|g zP8x_#&qY8^>snn?^IA6=6ISf@RddnQ)chk?KEK@JZf^{z4rkz)zfH8{ymzM>2frCF z3V%FB?zR(A8kU_#THIB z_z{h^?**W{wS7jI8h%Ddk`GYM*;`vjc!Ru}_XDuES@Y?&0M7Bq=fJLYIf8-vf79=I zUdN|0E+qwp(M*s7mjIxStn`6I)Q@Uv`OoWcB3eA?cbDTK$Jfb51b=eARw&yu@LRA3 zTcPKW*mzB2EWv9o1{Yxopl-3H!^r^e;D#a=xZEcqBR5eG(2aRA!t zQh($0u*c;>aPQLR@4R0(8Mc=rD~gNyx|6j-wnsZTH3XqV0)E6rEofP8@0d;3+oLt; z`EenPedqd#F-U8C-BkOdw8HG>n%+rhq0TKNTn8Tsj&q(31ieJI3M;M~G2{@~Jx42%xdQAzgz2Zerid@Qda?>Qiwu*@N5e`Z5Nc-mQm z!p{Df`Q=bDBq=#=2Q4l&F&1BeR2H#@_In9`!lamEZmOsA`{HX+DEpsUfkk4P%4Bcl zG6GyZvWVGRp@2A9Z@cN{Rc(`AU(Z`l*yq&v;Z5Y96#N>bOs!^V)|t)$lDUnfCA#4o zkeRO@B}7&-9*D_;Kz3QTmYshr-y;Y&pcVH-m%Mf@G139%Ay_S)bfJRbG-BzX=x1Y) znlfLo7UOV=lCEXtStnW3UtXA!fguFF8l=>oXmUBAQ6u+=R_!D~my8HDh1Q|lX6WLB z^$R5k*?gc4GQ;x_@?Bh_fQ3f1Yam(r!-fJS2WkA5SH?HN8hkTXvAH#j)^v+B$L@9A zDDdFW6@RLy_ff5~6=KM>Wr5p+@R`GP8)lqMr+-5ap#Qs^ax!j6sPOIG;#bFj& zE;nsC44##jp2-sZFET}Fo44nkFlbT0f^*exTrJ_v3hoqk%?CxUGV~bLjFCr`9llRM zIc;BeYeBmkI|rCc1CZ>(vTHr>&qktEn*P~7{s!h-I5E@ac_RREKa?Odj__}W=N&b_ z=B({Iz&_M{4aB-AUin-#ubA$l%aVO*T1bT7-!3?m*R{#gZqH-4mGK1G?`@<i{w5P)N(-YDfB3RM7n zAfT5E)t!KxsfY(Bo!YBn0rD<$1`l`Re!};_^oY;(p@3Ty;D7%CP}s^9U~jb^TDInZ zYU4FN&x`Gj)z=RPU?{Zp^!16+r&+fLyo8}a?TFB)wSz~yFIzyWvZ}N70{5|}BfJB3 zy;qacE106_lhY6t$$qn)OukCF{m^uL{|oqVNam}IBnECeUY=9{0sA)#Ev@Y53xPPg zze8`kuv5t9ElAvD>TlONl?Fue#E>^>|MouWV7FpyJM4(%dGP=JXTgu!r4KjCs~Cyd zekY9`tMBCDS5n!2xHnju;U4Sg639FB_r1v=>xb=41fQ6S2X*Ay_(fy)C%eP9Y0x|? zf6bJ?2_{b~f0JJba`v>&j|d1E*y*P7w6v}NK$-4g!N6RWeDwR~vi~yDs&rAgNFZ?G z^sm@$b3%MM8c?{F*7>YBJ z;Iq9~eB^5qZ23n=&g2U5c$X<1)M~>5CgVvLCDX-Q42(s) zqCy*%(CS1rdsM8gufc_TKvF;ecw4pRfxFcxZF_guIDe`XlCMcSidZNi z9E&C{>z!zH5NQ4w{9V#{G$ab?D$!~z)ZDDrygpfqvFZv@nmt~cQ5*m~bD?2-#BBMntZG156J&pD+W!xH;AYNJe`5tUnCbDz~< zY5$)6^Yun)0h~)Kt9N%eekLZDS{bOO!uTmEfyCfmcdpt6B_y< zZ{>(kC?QWvA`A;0^;UKg3j1jY{`D!Oc+ZNNH88Owk#jrd`xCj_JKN;pcAQEy>FR9A z6ota_KECr!&NNumQ6?Zu1w`l~)rb!cUNsX5{2AGj5GG1((F92w%-ctObuM|`s$ioX z3G^z25Pko+$WCBD|uA9~HY_$!D%E&#ul1$UzmgTyjm#8^7zD^$;lYJp=gHvj#*){F6 zfY3br_jf_w?L`S49<~5j6nD4x_5{FFN)(Y7HfgDD4~kGK3_9AkWaZ=hq+}B)N3#TY z%JTBMbwNOVhI0&*-^tr8H?p+?C2~u@i-6rU%o#Ya7C=OmId*^|RGjPtR9Tz@AgRF2 z-1NQyR74&;P!xvoMSNRD7#I{VV8uYqq%^?pH~}Mxtq)3I>^or1zk2_Tn+e$R6;vQn ziqwhbUS2KjAYHruJ4@ib&g@7BohJ0S_v-saRqx-XlbF*f--!uql;VOm_^!$xJc+Yd z89koF*1cfR{CTw5UpDji_xRWEdg|r}?Dt}MjYS$-&pB)!PJ8NZ89K7oL@I@e+RvSY zQ=B{kZI;^OsZxdA)t|2V1LpkRczbm|L6cnGK9<0oiqut#{5OZ(xK{5smY@LVTk-y3 z0alS;F>>kl^H_uB7~ECkwheU22pJvGvK^k4hkaUJ%AoJaCDnf=p# zR{g(&ny};x5xGNBct)=$CG%`A;nYvhRKkl@@jPoD$2h$aoOFI6Twv`zZGrR4)_V^7{sTS7 z1)P$V>TmA)zL|kbe;j@%<-#r<(uued^Yy&9SXdO2tg}(n?%jbdo{P2}m`KD&g?h9@ zFo++;D@NJd5fPDj>UxUGa%Hyo-I@kRq8%Z?5lZrWv(nmfY{p%2&j6(&lfYkv5;*!b z$C5Ijv|p|C-3U24{JKjEF0gWdp~+UjeLei{+>?u)g9+M~B#+$RZ0iH0&JkqL58hg!+?> zb$=yTcJ@Y_XGXWOx+$hjh9gduxCAgEqT)RM zajBxKJO~JssI3U$i9FFk)}4mPP%v+o8b_Rx%f6gVS$kz=eYwB68L&)Ejx-g03>fpS z_*}tP>-^ifeKCvTr0GiVW^A#Tr`Dbkt&y^pyXYsTG;tQkqRP8)8-9uX<9xqH5~Gx= zY5EiAX%}vH_68HE8kTB{B~9#{siB16GCV@MgyB(Y=5+NPhzhr~yE{)d&UXfWM*%VZ z`2Nr5tgex}Db&&f(hl^f!QxO<2`Z3iRFc`O%b;Y+2MVGiM{KsG#4#o>>& z66Bi#N_9rFo5CI?iRCc2*@@Igpd{I6BLYe8_EW?QRr&a>skc0#3KIf#-zag!QQqO6 zrIs)-mX_mL>+@1jP{4|b(kGK)$L7<1FFl+T3FPgUFz5d@HxR?}#Er!4s{aB(4E`%g zLDca%$cXk8^2ug+%%jrL(z5h)4OZ3>!W{OJ-fK8$Ks2520e=$Q`MyHC`Vv>P)%T*M z)Yh;FLUozv$;q;=k2DfoFy#IE&+VR%X820N;6(YeX{SM1(Wg!p8q=o@AqIrP1saIz zf2Id`;wleRHySq^PV2D0df(9qexxN9*bsL0ExTL6G=u#GOJ(S!c<`1MRc>kyW3O4)9bk&u;160 zZ>>AGOeAqq6^2jlnk_%v(yH7OW+2B7BB|)8Muq=ZXhv2eoOt%UE|*eozgyH$ZvHU- z5~yb0s2FuZw!|H{`-b86_xqe)c_z}t&l0$pxo@+Pv9`=?l&F%w8a}dGjFnuB=R67F zvupG7FQz*l7J47rcf8NLQg4>=UcG47wH&v8d`9u>z8m3hIx5RCDY!vbi7RINMw+Y~ zh`udzxqV5cu0#_*F=X~l+fx%-Lt~-kfmER3EbmuS{BFNAqG}MM1U*qtl}k4~;aWKY zeTbqskID*t5jto3TYXB8`}Q0T&7a>F*;2ARQSIBe#kp;k#S4damTNU9c-VV4PVMSX z=YJ2*)7pOG&~Dx5R4sv=l#ewkzrz6Slbm^mNfQitKi(j7Nvox zXr4DLhQGAOI#V0GTco*qb$T>ZMnt&SkUGX9_^joSN6k9e4sS;XvR>` zS&j3w8|tyV<20PGvf#1d_l{8K)V5%xN*xs6^sZc$3004Tx6S?K?!Jk5Cy}h<7?6IM z`RdOCSk(xOBmH!69?D^bH2XrFowv8V&gQOcf}9a{xM8%L8=-UT-0aeY`w0rWRpq?m zvJfPx`^zW5`<$EDB|Z6c7CJSLJs>RCC9zk?ss`_1iCrGcEc&Ci2P-CBvy^^fA{BAj(uZRZD!k#X;w!Ck%apJY^N*~}IVZgst zt85PWc4{U1_czv08=3}v-Pj)Atjm7aUP$F%QvTmtIH4K=(7@YGh0EWawf01uT)JLL zAUv3X0^`Em6p^sMeaD0~uLQOf5oL`p=UxlH{DdwAKKG! zn)%C%KIs^HJA@FWR##3NpRY&S-8AEbIv`I*g1^tzzA1rdiF=D5L*#ye;^#_z&XWn1 z4kjW=>$TplMH%eY(g)Wt2s~w65^PBFcfBmbyG`alJ})DTHj_itl)v>{h1Z&1JU5*` zs#fEln~W9crfk)GwfDBC$Z6UcSiYTn8A-?Kz~U21T&+eB>_nn4)u6HELD!^u`$c9b z_T2=hSP5r;N#t&|@xlS&!I9Brj4g6>^p+Gfk1A~wMhrS_NH~t9hd)|G6iuiHx#+YR z@~7??!VKH=y3Nb({F`_Z!9gjU%%KGfmi{`4Wh@o5to$I0 zYlNmuj*n-Tx$norAKgmP)A#s7ln>`cixQ*Cq=a7Uiaq*mqy$NsifH5m6YoC~V#=a{ zLCRWng;!6Y6bMQnf?Tt-RW6lqVvG%r?Ls;LbV;KA*iQ?IuK1QzhWf4;Ti~RbtLKx3 z2Et=lXDn@Msb#6uug&}t>n-mD2$|&9pVI0p^!n?Vi16Z|9xTo*(Ri|~F!lhSU6>r;IoOT110h62C8g1fa=*02 zhIiPr_j0Y?CPz5CNS37Fa;38tS}l$=f2AHsEqa($ZG6l5%91Y)^ z9c@)w5hd`d$S4J{-iK~MZWTx!mk~EpkFQHEb%zK(CV6rdo%ZBejsLR6qkTt&JllO^ zoxgaqcH``JCe+DS#@rK*>7j$SClJ8G!d{32@hbuiwIS^Sv7?Dhcwca-h5@w?N#&xsWw+MG8mg@6c(1)#=F+OU6QLpi< zLSBz#udyPgD;ns5k1DvQzS^4pNm8`V-&rypK4`rEmd^ufmIs&u_It|1|) z=kr@Ps*GsyEK$`a51L=#Wa1!M;l}YmrsaDtc+a}v5pdomc43l_jD|KnH8YG?%wp14 z0}eR{HVTQYDAb)HN&>Aq2R6_y*~!XyaYv5-){#Skc~)GZB1>H`(6-lVlq+7&>~oF| z8Aa|ozi??Ouo0_3RG3pIIkUi`#^HKlugZG%O^{I#Iw@>pg$#MNxEd3;-SY7BQ>Y3A zM*B}JK7+zQ1a6R8tn5WNJVJgLYs7>)j1pHEc^YzdoT=kK6#?@L9V~J|bL0}8@}~+O zI$#R{v>jvd)soLHx{DFva zYhoQ@W^vQOYU%@u&vB@uUGq);eqp&xU;IJ;kzd!tseDdVYo%{0Rz${>(z45$Mbq7` z$=QgA(+!-M_a>}`!^HN-n}m|f<_-7H-Uyx*j!y> z_rkp`l?di8wAPZ81HcJ z^5vedhGU7BmwoU-FAUsKHCwI#A8hW zmuP>t*!`L3R1%F&K#o6~6z4s=@cIY*iuE9>sK)4uBS4J#3Ra1#%&802wgPQ3G3X5@ z;1d3=+arjcp}>R=S$p78P_I}VB9&GeLd{U1Y87(1Rd@JS`906)cK5FlN7c8>3fgs# zimFWz-J4^>_wQN46%pmQ|566hesBo*8e#9;Xz->|d{};hiz9mBJ9#&K3Sub)T?@N} zFLFo$Uy9_>I74yT#&}3Gk2JjWicj!Xsku3x zcd| zBV2c2k=c`M>1ObAOiQKO-p9?OIl*qFo7Vp_Jp+Vr{2NohogTb(BP*a!*e5j<4*RJ1 z0j37`FbB%db9s2J**fjpX%our{&^~?u*}+p$U4Q1a8RdI7!O$t$2F%bZUfN?V(BIS zp1VR){CDd98E~evUraVg(2!!+9;~^?0f%nR$l5cUV24FeE?co_6yAR`&d5(UBx1HPSNSnCP*Nz{3v-!OqC?wk}3lFzxTKBYWb}C z((VIkv$U6qm43wKi#?<1+U=eXKAbKt2{u+#vlF9RN7-Frq*?L~&u>Nsxy|k###eh= zR-c5K_1lx4j^?WO7K+n&ZwWs!DP?-zp){JqvDo;<_s7)I=ArXTEnC7)YYuJ2$(pgE zB*Q$Q{XK|n`?kj;+;bvwYybST_8k6e-0nNuw{;W0=Qr(leSQTNFLuKfGM||vL8qBp zru;gFY=CjKEF(7HY~~eDjb`&j8W)c4Pq4z>5EYpGQAA$(p2k8>lR#S&Wjp_i8F@_t zmP`l^b#h`RX!{FqA*P&w^m5JoznSUd#pYzH5oL?JCJRg{D4!lrP5~)gIoX6L>)!Aq zB1#3MAG?>3i1jbnj=A5#vmRl^ z6-s1@{{H@j4nLA5cU!V71?SS$BAL5l_eF71KX zxg?{xKSYHw>72;FBZ0$rBXW*=+3s;K45*)o6Evif{x)cR~3Yg!4vpm+RX&AeV$nvyWioQGq z9-scdyZ3Z z{prHE>dx1<2xK`&3*861276hLVe6^XXi*a7sV1oKiUp-50;92_E@$nZa7M=YBCnS2 zfkR7%4(C$OZ)G;q{Z4?d)q=yTp>?pL$7j^arkhiVkz#0l@UJ?LWVKchYaU>u8drxE z9v&|=q{k%l44p$h?8UYKx2kOu=>ammZ(D%OZ22POs7i2)iMpA7P$zQ ze+9ey9HUv;GXCxECz91cjKfF>uqv>!GmxdyFW^-btHuuxfXBE+m!(aJi43o#wmM6b zQ!^2$mc%Y*40}XGpb$06?Dk;U>Ult*_jI#cmSDv0L4oKHENL}55QDnRpKHrwA-1vA z&U?ztO}9>r9R6W0$U?zI1G0tR(5LMBX(FQDQU49kO+1lE& z43Vqm74vPC6-+l?ZEcF$lc7tEw9E*$wbTl6o$>xi_75hHmONP=;OuLDgtLLxLU6qX z3+qrtTS`j+t7ru}kb2oH9oYb<5`b!_33+k*{gdHQ`b1E1WP)3HhT}etMhFZu|&EOkha>l>#J1KUofmV^M)b{LEe>I-_ z^8dX=yDFoS|Fe%*zd{o|6hzozCb89ivOpHRj-|=f%;K;7T|W17kK*Q;LHzM-P1H49 z_7FCPW!QVCTw>W}9Oo-b=5noq-&jKhzHkZG(PQlSTWqr!c@~)#lXaYc(SJ+4R`<^T z{eU|9^BDKM`YE$%6O;P{mm*#_0ILL2W|m-u)Ig7}O8ALOmVi5Nc|3H@k1w^ zFWbuzDcFf{L=)j1)&lI%e?2i|ABRm7@pm3+<&!LCwJ&cs{d_~z^X2w3wU-;rv80{Y zG=?9KCwpAR1hUL|V??+yuKIH_qoT4bz9-O&^4+$K*laiWdR zc#7rwu`}au+RSb1(wJ=Dv>3Y{-$de(knEMX9yzqeZR83DZ+>Cc^WpP_Ts$HX&?zR# z7Ecc%j;6PL1xSZKA|3I6iZnUpWHb~(`KBstsg43MrjaD2xT%yxiuxuS3>j>-R=}S> znmRfHqgC-Pw*}h6%4dordtM72g!WG_6-T94vtb86%R4@B&4`u&B#k@KE zi~)%qlN2G2GORmp!u* zRI7gH-kFn#FBjou=?i(2Y%eYqUzSK5m$JsIJa4GIpIH0kN%lTfrDbFMzw2e}>=ead+f32eQU$GTkS+sedse|JMOBzSDe4(W< z_A{ib)x|U*=B~f6%o5?}%&IWaJ*b#@U7_HN$pmh03~{5i4yff(w`s&7baLv)xeO<@ z>rtB5XWn5k^@JpkgEV*NpN>df@%zvh-{%ZW?6a(YrKJL zm~7eN8{WzvTtEh_VH^IQUSRH?#9&V+OqLH;r|$tIR2g*1B$%85ZrcJ*mChPQ7Y!5L zGbG&707idm22Qi7fDc0N^!ZzfKqJ@P!*x_ zIBuxOW87=C=b)Gcs?$*rSq%!}EmELb!phGdVU@wjGxr$R&6;`mCH-G;IzF4K^^oi@ zRNBaumK#hdjGCXycvs3KRAAvr8}VUw(SYxla$4Brq>5>iTg4Ct^+-)oP!cJ8(W4pl zoT@;qcT}31ZhnvvuG&$y9rmMqo|4aK$^YE}JWsao=Y)BuoHnvZSA8*u<;24((YPvB zmpLEj+Y>)jDrbG%-9>`&ed#)4ZS#uP^1-CPCf(+_yei{qyXIOZJRi7eL*dawVtlw# zW+CoWXbqhcw9weQ>LgH4+DOxGO+{okf{!QpPLG*Eo<9i9iMLF?_Oy%Bb>8%(ySDkr zur{)szE@jZjFb3Qk3>-}_mHmuIat0uH3`w(_pC#Uz3d%jYBJ6X@r{t**JvNqFGqSa zgMISc7n?`~`&MG)s|OsTM>NLioGxRqtc2 zKgK@_uI10(QLnwo$A)m`v?4Lsi~-SYdCK^aUT$YtT?3nMhndS>KYD(hf?_^IN`;0q z=Nx6pkml6K-8vTUMG9T-5u(fQ7*V}~$xhqTCr&8K*hN$zBn%)iLcm$Q|F={yJ0q^D zWwIxV{M9YpFnHIN-UhYsum~P!@*MeP*XM5lh0&7U$_Fwd&1rND?R4bg z6^s_v5uv-^p?}xf!yBf$lccW*)rVEL+E|7C*Bd8oq+86x5@dhq|B&HHy5%Opy1lj}W5$qdxE@r;&SjWT-@0WP=qCpEGsSfx2IVJuD2 zO61ZNtU@?S{W430>DH6Tz6Oc%+|i#uW>&IDQ0OIK^V8sSW%Z>!@f#F!p&J4O(r9V# z4=2+CdAj_DK-911IT&A$hx!W(E!BFCVBdzA)5;gY9koJf_o}42?p`px2ZCh|7-Ov#-9$#h}b0myfMHBj@M?3v6P(QRZ<<2>BPOv4h395VX2zs z<0HGG`5e}^Uag$>cP#k`UknmhCWJzRiYmn5gLOJs@=yY<;{zEyE_LB}n!h1cxD87pS9Zts`xx|Iy8aCz%nO|$)`2P0nKesih(iiUTq zl!H+AHCml-NwU?u?^15Kz7V7hB0a2#zEXWXD)(QM;Q78evPO64HYx2)voIUp;6s!G zj)KkXsRsFFQmdVJA{!&p!1h+~z=BXnj5*IGqZMEX7`8S9yZh!6YjIwKV)4FO&nw?!s z_`94I6ucc&0q^^HY24gWuS^Sq(_(%U5mRIj>~p}(dt=(rWU-Ijh=W&r^$`vv_p*YN z610dhVMPW~reP<(_v%q62#ont?eS!Cy7VI+A-d!A3rT}<%i#B9>tPaY{lcQHp|@G? zZ3huvGhCc<^C!hjIHejm+7;jAh9&3;6*X=sLcT>E@>$IBXek@khE;|gl_{7Tp#5tj zCmY06gJ|h_d?A8bP8icSsaYm`5YJFkid?7Zj{(_Wxs156L$C!sCB(OE*o3h z?RiZiwc*VBW!1ACfF6=IW~pRkZ6(W4Ryw!3I#wtdd0*B2$lTs;wbL%rUIT(>jEMvP zIy&OR!^6`wVo0r&O`QOzQZS^F?=s;@1FHkuKYR&yF;72n=cKbnEJ{aq=?fUbi8k-b zh3x4O@-qF~XnnM^t3Z}q(H%P%@tt3$o?bM%YXXCZkMe#UM_a4wFzcz$HR_7QU@J7x7}nj z1eUt1UY2^LwLTnp&2~Qrzy~5Vb`8>cfkp~;>~-FtyP>Q@FX+*|_E3=g!tSd>nAR)Z zlJ+5EEm;G?h2pv?gljy*JPW3@0gTh}ycB#5t27Kv{1#<&|&&Se+U4PsL2mLbgd?{294USzcpLNMq zTWw06LNtO)2+SQA6Ac99G(kIwqW73xw{3|ju_xCz*Y$T|yi~8(-E%x=++k()zDxAC zPJThlMijqC(Cw*wahcNr_ZN^I?>JPSEKr?}VCce?f@()SsqqRU-a%jyf?=h?UD2f_=D4}F>9e9thu#B?cwsu~y8&?> z{6mo<=hEo0b)I~)Jt9(~2iLry94JFv!!cK^xLb`bBd*w`Z&K)t6pKi#_nc*zMh2tS{p-KP=?(_@wl7h2 z&x{R+`4VN8VUofIOga(*R@TSI>xq_nx*47xT0`FqSvB8lk5~bKQfyfTAjNv{m^l3& z4X&3GNVV`Q;rR#{x())wN@Ykgpydb!f|?^Esr<0@GDa*o_uTjghayObiK#QkfLK8t z7l6u*8v!d_SxT#n%D!NizP)W)#F$Nr#i@+9+AI$?lfwB6MBLeV*nYA2Fh85=wk*Rk zX5!};^6Qs441TGV-1n0~j$+kzdbsZMIC(Jc-jxp`B4Sxs=Ex)96jY+YM2|`^I5bo) zlm7`aszhXBSF8~dVTdXJ<%aR^(%gND&~m+pTU+?jE1KBSpWE9N8_G^RnghgSC_R zufq%3fZi787uiWsUlA)a4riakH>;`xkMxHhF%oe{B&mf+@%ZxtZxOC75&-J6 z>4dE05l%wXBKtDPQoaKJj~eIqv>SK1&M(DPqo_fr1mR;j`24YPz=21J0YeO|6P2 zzQ-lF#AwCh0U8#T(8?2~H0I$LnL7P}QSLgQRaQ)j<6_f6rDq4S8ltUx$^fuS2+Zc4 zx&;aoYO+5O6FLy-7#&6Z9Tq1B1}^+7y4x15G-kf$$>k3``IKeywm}~J2~ZS#omR|U z;4_|7`>#p=Na9>Z+GQqS;R+?kiM2hNVT9{MI@;*Y;*+&;o|;`=7UL}2`3Pmqp2&Fb zOPqIp-iWEcsw&yCDn5#v1i~dvu60{oI+MN000GH^DnOsPgc4W3KP+ z^qI5tk}thpm400eAZ^P0x)SmmDmP>*I)UVI3AEm)#Qt!kkPm`LjyLOee)-U5I8l69 zF8Ydsgh}3W=g-nt($qvS*&7qyj>AdPYMn{$LA zC!Wx9`FF66{_ogYde`k)6t`vN)3|@}CL;gJnX2ve4U+lcT4=@h(r&Tx>WjFX-}Rv_ zv}>#RcP>v(fTtHZ?fP*Ip3HdmM6V^|xS zjFQ?3S)9GT2RmTYYJsW-_z$o7$tgF-yqw=)(b}!9QdhgjZQZTazmIh!aa|2~lm_jb~)Z4FgA`pV=-#_ ztrD956R+!QJ%R_%fQ?c*K;^jHHRmpEXtm6;Yl?x6>dHE|cFHBmmH+A|bUP-T<#s8dovGE*Dk2L*lJpy$eF8lftKYde>f3G(vyTDwYDD z5=H#?pQ(vSRD=g@wi&LHR_i}z<9+2!<3R)><6f7#{_OI6y3~Y)pN6@RKLEFfs3Mr8#28}S z{6k>D3>+6+WT&;sSdIV66-x) zVY74US@ir#jt4)V2ABy?7@<{q<8aJL!Q;vs6gzu=ec-aL4;=ak0C(syp}wt8-OlEp zHA9R}WNmHE%r<>Q_PiDU(H|)j4rxoWj~&OSlRSV$ zjtC^36G(|Q)Px(;VPz;A-uhUvhqm{f+$h%Savtxb5|fC}d;nJ^uO(_i@OEbYD>WDG zq|3knJ9kWiq)sm6VN-?@n> zJk5v$=F*LtcB;Ry|LTk3v{j zxV0wqq}`%{A4pgLwOdVqC|gKKNM%yM2NTE80YhHyA6656fc`!__%(o()Gm+b*dhi% zX=G$&^_uJm{>zfB`-;IStL$s3rETWz{WUroB))|c(PTlp>E%jZn-Nr+qiMvRI&~h) z_~*EH+(Xmo_-H|^`eXS|YkKoqQe@LYJl&Z!;FFy}C*ta<&ut-KO!5)McRvO(V2 zZd@PK&i+4~|If44k-+uW)H9*8_rc{t2(y(8m48|Ek_#y9I*%NcUlK)JQ-CtoJjCdg zJ3;7XllEgoZ9LhKL)-?iPDFY-V%wFfN&_x=85=^-dGd$UJHI_mp{IV@zxsE?P-7Z5 z@J>Vw#Qr`%lBsIgDgCoD&CFuh=6sN)E^*B0WvO+&)f_9Z8??1I81-JD*Ah$q@Dr7> z)K$ni2tRb(>1@kb^vTw$WssQURNVQWVC#U&%~yunW8%?8h86BSiI@_b5hJ!2 z;zrO|>TU6}9s?Gm1DwG57*wGTB2-mlx@U}#p>e}bNyOz!il^6-XF&H?*oPf(V{@I5 z*t0B=8>9n^a`$hgs=9r9LN0iH-mG(Y(12J*#v3#j{Sl~>3Q=I{SIJlLz2pXVJd%BI z!^j!c0#svh+ejf$2AWDz4($P4ROlZy;*-84>teIyv6V(oD>>eNWO6v|I^+<}2!iQ~ z{iO74hVhQKt@X8l)t2QJFE)z2>hFeKAqs(j!sS2r6hdvhrH$pC( zp}-ziQ4uZ61GA6)cbz-0IQIF7s(;AjBuUfog&TsPQ}MBYgjl7arG*Fi6j~7SSPYKL zH#@|bA_@u;+$ct9mV)d%sNK6J%%M zDGIi1hjj_luF2F@8G5+zR8GuDh9wEWs0#_AMrK!TIN-&9JknQ=wdS{zowLJfxq$={7FAGR>7kz8+6lf#&)$;*mF>){G=7m(-jE>&G^$?C zPO^f-X0|t?Ue72ph^>*d2x%V+4$cUwDZaX=FlxforG?e0P&MNB8M=Newo<`pz2#3^ zl((n9rPgNEETe%1QuEoSB;zmLwjed|ir~um8YH94ZDp;k0=cBZ3Wl5uFKq}FKXUM5 z&=9eig2t)eH8)7E=j(1!zZvl{JOEwt`kkkae+5FV3I~LzPRrX$^LnahTb%K#tWg%% z?}V3LsbK#wg7irwl|N8Nj3l z#P7Aw!>PY7!e>!etfzI4;(-lx~Y`>O`Y{0Q4O%8_@ zNw{kY7TWLd1K0~r3qcRf`Cw8>l*E8IhmzR^{wFXp$M7K<_lFku8||gbgR0uy^KGXu zzK_Y46mvhA($Tb-Suec(?EF7a;bj4kwvtueC2`rJ)L!#do&gn2dhUSWrY|9u@Q;jt z28J6~k!UujF6#3zMyk7QI1(sK>8Sl?91eZoqp`aZK_lZ?3j?|Q4Qk-~8LTriV96R6 zA5YVpbbEVSd30P?$1%ybi#{p(=I7RipMZxQMtRYSA!hvc-@NJ8CPe3=lt9pqUITO+VB-Y**W=Suc|s03Z8p9T=Q4c=wTX!dFm-UCn?swy3vpQtQ_S+X*$}*l zCXRBz)2q$U%El&&9X;8S1c2$gT7dKpc-hW~vf8JG{)|m4s)J}XE=+_ z4LC0o8{q6k*_2<;{*p!Ux|EMs;YrVE?ZmQ-HOZN2!>UeqT|3nLbV_5O^!XaR(MKE) z5SOHNf*8T)RRDBVI)v_mO-vFogQN0gkQox-i zC%+>xqj9o^!r+*am~QpA5@!yrF-x+I&B1p~qB@rmGsG|LB&2_(moS8;Xfwuk+O%T^ zKnn^a#!^u|bm?-*^%$t)1go6G`=n7JFeL2Ud0`~x_ru6!ybjV=;FX&%Ps-)b^O^OlJNttRepWgf^z`FVeahs3IkQ&BEiS^c~g=tfx)_3CX>&fq2V-Z zF|kl+Ybk0*4W7@t0DKw?gx;i|npSt)v?T_sBYUKbzV9+D@zTbKBV>q2E1*JjQ49In z9(_HYFWF+WkYTC*1@2~wp*#2(h>b%WhqZV_GYLt4pcQSsocRFfaEeT+AqbxUUs8rk z+e4BT^%ssv3Rn{oKR3T7)s%9$So?}pjiHy3+y1pgI91u;jzdHQAU4paDzo$P#nohK z+DgZ0kTsz8VQ=2a(~(_3NdYa85}jIF6#I3hfV71)J!K+JgXd_vkoFWq6g(`}Dm#Z( ze6(LaKtB`6+5rNkhvu~hhfp0hT9f}vghY>1j`a|b2KZzEh5i7*C;hh3jK5V^qrgnX zvMUpS(-}j8gWpBS4wgxw0uvp&xx$urrJ9Cs5O^$zZ&34~v~DhSHPtKuSP}J3DGsFQ ztmGTcmAJYPM`((^9TzL64))D$3g%ODjaa;FE+(Yu;3d2wEp{Bdo#FkjKzT*tX;p6% zr}SUSrndvO{-)~aJ?fTeb-H}_S%_c$#n7DpvmGcw2qhbWCI3<9DpVxCYje%w$H(V&{DM={A54ho!Pu8cNqat@QqHjzP}$_ElVI3v!QgjrgGtjgLGO6m zcIgc|YZ_CUmnyAQIyXfpCr@oUGb~v2nzN=nA66QyC)=j{%f5RC9zH$2lFuH~3$cl5 zbN8~B=vRXzgVSJ3Bq_ln;eqT&u54 z;?T1#kMBJ5O+y5hi=Oxh*OQ1(i-XxY2%4gaZBNFSDp`maq}(>sTj?rSzn;qIiJbkE z)%I7VCdX3;plXa*@y*5;zSVtq8?LxRj?>?MDW+W{RDB#vc_F~IJU$_6>I}IwKiFN; zNP9Q!>2GyW356gNn7O);t7*4SwFU9A8HgKin#v$zssC`CjrjJyTA9ro4j(6J*3++i zI9r;Zu&Mlh_-Uh8Fz_uj*JlIKjkm`7=Nt8A`|hUhhTV*pi|B-XpX$c49&mD8j>f&q% zhb{Ew=~9TZqbXx?6w67D$;tvf(k2ghAPI^PLRr~g?C-PN@sv~uD)wYi!X!D%&!e$A z6F0w{`SRb5Blw+lcMZnSRWqu*>)?|&luwnnp4P^YzEh*~{v=jEB0-AS7fO4bsCwCM z;Iy3^yQq1tt;8I0f&k!2bucO*;%@D>F@m)lV{IH(-L>(t#wQ%%0x{nGiQf*0Iyf7;8<{YWnmW)fd zNmVNU?eVrt&Nn?2v#+!Jz@w?DNgNSTs29}lJ_?_&%$a2Yh=Q*@*m|ynx}FP+EiG(- zsSX9b?^|aR#?;l3sN2_zXq1iXGTu7VK16^pV`m|gjbm|pc4qFziE76SL|Ekd2cFym-i>d8kVkt2(F#yMVNuFGQF6{ZyW@x|m4(08K`%&;rD&J?|k3WHi zKRELY4#~dB?Ytpq`0)s?J#zeN37HeF)tpeAI}ycV;L)~$X!pacaY;((^h-K}6Y zO9eOv`*KbX>Yh$z-lOBp^=N@z*TJG9(n}#KYdw}WW^p04oEkrl$+C;+0OhUV&p*%Z z-j5@Z9Oj65RmS02wnH`TCHer7oQ!sLaq`5uD|&H}rK4H6cTGqgur^BXuvxiQij7%ps;`wR>`4W!+wfX;Tqc9Om59$EH#OWoX5Frk5 z4i#C5Q66oa_M|Y-WQu$zh)G%E<&xI&dP4E?9-xQrn>##@x`%sw1kDGc3*v|c9M|_z?Am1lw)oS+B(Vhk%Fi9^tJk4!n~Vq zD8;*-6;Opr>XDKh8%Ndpit<~m)kv=|BEBH(nF>J)|xa~N|)0wSU>z8+;~1U zCC4sy$IR5ZvM^^?)nv&rEd%QMxC&&mvWcc5CfW2$;s}n^D-E{6`AcJJDea=40M}L= zkm_9t$;iks62@{BCD_U=HL=73a1&>`*=ASh?`Gjt26Mf|xM>adp7AJAPBG+Y+iYOp z0{GAO%+KSGShyW{Yik2;B>+JTlCA*eoS1uUUu?4NN>FCg&Oe#b=}h`CWzP0OWMH*dAT>~6!~q4gFqEUQS@Q~g7zL|s%7S!>sj zk=Odb`<9>4$;mj6kC>_QLrgm4=*;rOy#S?i>PSv>pb{r#gxj%=<)IfGL1}(*N#N1k zQf$C9nhuc}FWT|p6BiRoH9O8uU-LLI@P7UkxqNf|aWrA5XAhZTLeFq&ptiN*Bkt-Q zqqYz`!qe^F@?v2?@EF}YEN%u3A-iXsV~w=nj6UNFdxzcdHJj1(M?hTrVl)xcvD!eYcN9?HctO6AjTzTsu$OtIdb5+#wM!^p-3%|ijuat0<0)% zXmuK#MTP5f1asTpOLuG=VAC&w{0H2LG}Lxg?(eWH5aqba*99jYWvb`x?VTSA&#hU$ z*S_^c3=I}5Y@?GNU_HMP>{5WF?_^gQOIB)`0^Zq5ahWjU*k6#PXBRU{JIeFcJ1{wT zF1foOYI4MtE+3bSB_SKXj)qOcNKJI0EXK_-4m@L{1hI^J4EL{h-D8EJ{=lawvn|1M z&CbaIQs0Db?lCu>4|waH)&;&x<(d_SncCRsr}^W@W}%~_1GK=#2B|9d!Kh+#`kRET zm8Y&(YmdJUdKwd@JA9K$cU3DFF-7BsTz?wz)7chAi|puvn>egQbmo>8KVU3X7o9vd zOx_4#DaW?ENIO9*Jnz;x{sb;&nl30b+3~BhNvo8Q%}0}O{$E{^{v^kyCTYLhH8&z_ z!FD5?_P~vFPLFz{wBNiJmR{J{yLZ+j}kfHayLC%LirIrlp9r)#_s}5+n zM5)G#>IZGeDA8Gj;daR-3t{PTrbWTmzpnUqcNAM)-ab(V-is>?2rc|n23dk;&Lt2C z^1OwDlW5TNIpgBurZ+oc3u!~SKOCM<;D1J5pccEJi1Tj5ZgM0;_BjfET5hr@dXRW$ zq*EzCS#zcdSw%<3aG#Mr0k9w>fbbZi#VI3@*KecB?qU(73yr56n*>|ww~7Z9RoY~T z54fUe|3b(#Rx;2*qF6T~-{>y*mnb4rs$bUGmgU`BWYeKLf*$eD-Nr=}8kCVisJ~i& zG+UuMGb&4`26n|kwDdAZX|;itQIT?30H~jFAn|~U5Hwe ztt~AfDuCTib-f@Ju?j(D%9x@}0m?KmJ@spWX(fyK7GSHZtCqXHqN-Ov|8PJ2oWJ46 zap9dy?Sb+Pd*MMzla2D?B2&KVkZbLe$6h-TJ>113CAF`qgfLd9xef z(hMkeX3I_>QN^KN_D0bMmxgE$ct%@Gu^-$ALcW+D>h4lhNzSgpY<;hS?a5ZIdyey$j<+luV)(Q66|WLhqwx4_pfbpe zLA!#w+0nac4;wArlA55&_$5QMGL+Bh1sfM1KCgG9Pz9SEeUsa1@4=?&y#f%A+JL(u zL%(%pzrEDJDXN!$)^+22`9$dhbhsQ6??7qPpq7wB>FPrBjQ^66vvE`GRZRbcxG|~H zQCIyb??h@lF{~vh?KqXFIdbV?;`tl zPqQB_^u#OLhnGXSlQmS(Q~g_u0!~p;?S|R#^Zu8Wc7x=Yp;P}3o5|AuGO6Sk@UHJD z%q+eYw3?cb&__$9u)QpK>HRdrATkQz|58t~sWh{(EKMzrNc{q1v~cbhsg{g9KrOZZ z8c9i;M!)R9Ecn^M93uKF{IJIAqE{t>d_y(BEv}}9FbVP?UvRZ#)LSlkBky3H>t{-A zbXCMEjS}Bv&9)nIQ_Z)5|EWnq(H$=}l}A}wuVngnM@wQd3KBOO+q_F>l2|;AITODW9by=#voDYJ>o}HiPp2PG7 z8u>wkI&*xAMv6+gEpRzVLj?>pWR`BSI4iR?OS}AR%j{E=xRwBxI}rCgL2itfi{1w? zG$tBBUPeSlO8{}>O2FmdRsJiPlF;3~=EMkLxR$p6^0U9w|4#3O0kI|fT^ZeHA{D1e zCE*T<{(?q~^`}%#?f~FySHU$$tNEMp>HZzfp09Yn*mIRjHI^kqfIi>4yPy$wE+-eG z4U_<(bO&z~Mstoali}gg@oj{S$|p=hL{-R^;{(UY0FhC@eZZkGIu(i8X1>u;Ykz#j zm`YTLnlg{`=CAq&wmtv1yU>2Y4&o`*nKgV%IU5i}7AHnZQ%g(x8#M=dC?KlChVA$> zohuJWjrQFr*^r4T3wm!snFH-;Y=w6{0nmL^YgWS%{3?P>d+} z%TVd)V>ET!rPny?vUj+ftoZM=iKf%!-CfQC9`EAja-9k*=|*BK$6R|MND1h!d*|#~ z37GTV5#Fo-6i8m9mX%A~cOi6px~vS!F<;<6OmRFhD^Zi-Lik1vmh+>A#|Z(Ugh^mW zAWPFFVXK0fGDi1e=@1_yf9I&l4``Rs50a4lE${4%_6AAoLv11w)M)bKw(k*Ra5W%A zjB)Zi{xpHlg*k0o&(d-UTbez07#21li#Q;Y>mph;kYqr$5LjNxQYN`pM zd+uO8Dyc1lu+^j0n*KWwNs=bs@nU207 z5o&a}>|-$G_D7DS$o7v??8VBB-Jy*>m_@rvo16i6*zW3w<5Pu0?w1S8F0rlu^-*B- zj;#r%(hk}rJ^8s4Ied;ry`pkS_YpEo1z2+jh!#F>{~Z>_D%kt4k)Fe5{r%m_7bH4> zwfP>N{s#m8=$oA{LQA`dI%&~3H|#l-CZe?Ho0*OR;0GFT-gkBx+Y!*a(dm19d<+0^ zkFfi0Ssn&ld9j3ZosZK+I~?)+834?y1}V9}i( z;BrHo#Y3jsQacM6b;{ZvaV^2;-WRA)i2v6a37l@Fz5|fP;J!EvbYM~XiM8|37XiX+ zHE27sHe6+o$8idX2AhU`y-jur#V;CPAUI5{_oyEnOqHTg%7~8|mzcP##atnw!9rM9 zMH#J&RHqx~L9dK02PTn`d77E$i#cCz^N+#uKgVMcY>3X_$=RMkSuvPxO#oYQn-Y_h zkZma<6;=>uCpZ#azy{;fWFOFm!WeOJD8m^M!FPet{guXgDl>wUoC6PYgf8~XpZ^*A zCm1%zC(qCTdEp~g4c9EXGS;$0=EbyY-JV#0x$U9co48x`dmxN-XXPDWnJ5Hgym)wc zoaf*Dj0EI^oZJ8#&{j7i+%|h|k_=ly#j7eN#P5T0U-OkZv#qx8XMXGun@m5-knsis z<)v888_@9g4y)#?S@nWKpRjLV>_Su~NVr;P)6#H=Em>Mhu>cYLF64jdC+zw%|8#(X7ZJdtHa)nQE4%oHV z`U{FB^qN^*9^L*$6T-e{Ao_|KoxvgwQf@Af4EwG|LKt^_dN`~VT;6h*a%|XNv^O77e1QAZM zxL+xLvIZfJ+%=1otduT~x{P-&eXQ;!s~pJepsH=Z)^PF}5(Gv_234V3aJpaeb~4WV zaY~g$Wt4ICmJT_$vRZZpryi?Y>l-`VKJF543zr`B^0%ge-t^o=`_6zOLp~M)9bSV_>5NgO06Tw(Np6zHUDijK+G=?{yCpOOy zcstVp=!lDtuP3A?93b&OJ~6bO)O0M@c~Sv;BL_vU>Sg@Gvry#aW=AwK-cN&cnT8Vd zsfB+8D%wM!Os!p#%d8V=_w()O@=Vt4c-mD9*3s`_2};BmlZV|vddx#BI`+{CP9*8P*L4pEsTA%{7JohE^BphQ0Ei?9$??xiPMT0rZ1Hm$ zF$59?npax%c~N_+Hs7y>bHaU@m~1(@+XddQ|lN$*o9Erg|00x z%eVcRo|_9bs)i-44g6>D<4Tj|pI%QX(I>gHTVcP`hJvA((ua9#k+GB}dukYN?^VH# z2m(bs#gZQ^u@bI;aqL70f)TK9uGA`O>I}^=BooKJ94=OM>9enq^yWzvxx`k?WR=y{ z9!&?r8GgJLp#d<9mVzbX6IMgOOVznyrr_B#ho)v^GN*-ySsJY@CWp%&_HMB`_?oyX zv)amb41{i6>SfKAN}F1dF99N8&;objMJ}(jM52ECdVVqWjNyxQ4J4v;TdeaR&TeG% z-AU9h^JE+7GwO`RB_zyx-D5{SB6|0cIhPjuzw2T^k#KJJkna0z2uqi6D2sODd$t~y z6rxesGu?x8d$u_iezN%E%R-jcs82hQ$7S|OZTX!E)!nlh9+uEGHqrNvr2Kp*zfJ3_ zg9#-iCE#$3D0E+3X7=8RF88*&qI~YLd~l1kujvSC`T5UoF?T)w5c8WIbyx`UhtFrk zdmFx#R&#x-+mL_5KMpR{F8Yp&xB1k4ojP`C@Z-IOC=q5>M1t`E`)DbliH?njPtDHD zeZPN$fi2TWa|ro*?j!*xM6T36jT4m;C?uk= z@XwqNXFIT0ig|C)yv>IRC2ewC@+_|T*BGK^CCIeU(p3}9&YCL?F8iB(=Adm6&>5!JkEun&7EIt6BDcAm`87EW@81 zcv}0LFx^NJ{HG}0Al%b5i3f{fr6TcA%`v%?!IEk3j-=;zE*~Ac#WtuIFJBzt?wm#9 z=X^(IT}H>TaYtdakrU9#cMe6nQ_Bl{QV`bBmYanEQ^hf!_Y?dq6TL&$AY+rWE+g=F zFrH=3O#M`qu{+ngb#8naDT`hkd5ht%sG(v^fi7^m0*>6s-X7nfu?s61kKyR7Wo(^e z&eU6e0}2Dj zROBW_xrZh`Fk1184%uDFDCD&U?;J)9Ow$#MJBJB3|Gcdu3m+@2ZN5e9>{Z=|m66*Af3*M#` zdbk$;{%KWSGc~b>>AovbC!L#tD5(IN#IDJgkWg0fTN_ClUbhaOu0sNnUZh{0qBMBX z7bM{dE3Iy$+Oz`^*){jUy!*HJ>xl}68#fwW7%c-(*S)|+9{*b(dJ1^!%mpIYv>*ht z$9pqp?d*GP>P4Stpd7SG^M+jPtEi-QtZC-)o_+_-`T2^SSC&q^rMnz=Yb#xCL*!@o z*%5%qG>DuR%>9WL3}aK(6&vR_}Y*}puNUD<~se9zjLgnRlF zX3qnsSl$vD^h&gyjiC~B5PGNlE|7iE^}&()jiA3>)0N`g5(>#D-o-jsu5&EuSZ7v# zZ{r&+!z%GmV_5+G(WNQzqe|J7nAN(Q4hVjB`9BDAb?*}*w^WwEe^PG$*T-5~ar4z% z>uJyQg9EED>@d?POTGIp(Nr%EK0Y~vW{M?G;MFOD3HKOFFa&M#Q^<#Xgob`l2)k1hUWpm!RqOb>Uqp zV5$RH^^+pLAAmk<38XzZtTxA|Gk=_0@(QXpXs)xlfMsnz0*!`)9J9!?r0_)F2J`R- zFB==1lH_^RS$?Cd#+e{d68L=)Aga4~tYXqq#J}W`eMH1Q(zQx)8<9ap7;+^!5*-hQ z^S$sRTJl8s2}9FlYa}DC&K=T2D+TALB)R3on(l@o9jtAyGqbUxP^wYJpL!5IL|N8h z{qExHl5ea)PRK8zQzY*c~J#OR~`-C5J5!xJb?^E zQ05tWE@*R^R=_MfWGIwMczFqih8BB#Zm$3QPru7`NQdd*i9c{%n%fe0&3Du2yMQ?d z5DU$^U`A5=7Z_$RKeFlv?*fK~RMeD;+j3Y~nK0PdGP1tB_8luse01D5*b@`)feSCU za^Dp!>}ILmsuuIUO)^DTvJEwN(#rLtE)DuK;~f#gX0=HceHH?R;pc}^mcM$Ot1@~z zZGU)ciup4w?d(E~*Zhfq&nm|Rbo(OxcvxcsX_|t9-ezXNjTB$hWyE6kc`LH`K3KB( zLxR&||94D<0m#D$>_UvJjsffx^K7~hlkk^oN^v4dN zsGd}N;rt~?qA``@z0YlRRsR|TvQ{u_6 z=SeT6f1XfJ87Pr{LgtAE8#jWu%lz3*aQDpv_m$^IXtY4n*6xw0=L!w&`3unjq20NC zUwF?tgUcGS3&Z(c&!VP4v1TITGv@g_lVy$sLGH}ulIL|vG)}3xZ#Q+5*B#+$R7fkTGyD2De%$CU zi3y$#ej2D3(yCzRf>YcD0E<7QwsSWAf;Y?yw?xfxNM3J1{U#*nG2jJHW&hmw3~w6+ zz(^IST6w6V_rI`yclk3^E#;0B14y>JJ6?pT8sJlQQz1p4ZU-WaHP1x-yHc0Bz^tRr zLg?BT6dH-iDIhTU3itHe%O$Y!+Xs(&BR%q=V*P3jS7wKeTW-PI(>)VsDu8uh*uD*6 zVV2QsC#h{u+~|Db;7-+o{7MC);vHMo2irYQbb-V3qBYvFqh!t%Fhl5N5PgsbxCwwZ zDGoq}T;5bNSo6$Y22NVNUo0)M&4r$~UclqT!ba@5|%2U*K;vSP=?6u|>8ZmOd*T@s}0%v_I9Vvf(n0$x({Vc0kT@WnbV$Ref! z`s^j(RbTIQ_UV803V>b*P`mO}-0xkefE205mcxoi&EHND&tDa>Lre#$@zJrU`fp;< z9B;6$};2aP0(fprPYw)kQ^8LV>M24mVu{`ZrEXc7CT&x+cUekS?X>Ei0)3V|UY0ejT$^WC>Uf5|>~WuDH$|bb8vma4dun$1T5Ei@ zh``e7`CL;7Rs*E~#gNMtKm+4fd{r~)77j;Y!nVJYm3=w~p3Gd45_k~)mjlU?dzJ&~ zuQrST>6IWaTu-!n_;aFiFM)1O;hx0Gs(&Jrbp`J>kPNZ@3Wr~1C$2{2$`(say^ZV{ zjiYit1$F1W>Sb@-DLgbkLlOurU^XzGH|N+h5i#<4Ll}e+AIt)NIs2{Ntz*gWo#CaE zW z_Hn>zf<(%8%mO>=>a?dvhIT@QysJF-=w++>BYB8f3?tHSzgU zoqp(&T)+eHJ7F>_3pc1vQTd!Sw*Q|+tkzp!-A6%@}yObKVVnJq#SSYQT?` zetdic9;<{V#wbBf@{Bw;MRo&|6R=WP^O`bp0Ay$_Z@12z`~m>B8;~Z6gvIrSUHYS;nZ*f87;hsp-oOLqa-LZGbVFkUxJ260PnQ-5KUW9Rm3n(}W$biFw(Sck2w8m7x=~T1& zs=PHb_aRwx+{S?l}H{^BQ0RIl~j-&HFASkZrw^U}~FQff(HuvkzCXGf3HOCIavo*3rXLIn7L z92^4C$aE29T>LyDyNm#|3C2YcnlcA&$ABU74j*P}YAV2V)>IV+QsG$i>ciO4vvMIb zDPv}OuJjDDS=kT(0_FEwM@U1HK7CnU|1RW?z}vM=uTY9QCG?_rd%8K)uNCYd%N4!@ z*6xleV(ec4BU5$go0+-6i+WV7SZcvXutqVUhb8gVAlXn$l*GNRmow4ePGbZYl7W@c zXb5tliFRL+xgwI@$s!K^x8PlEb~w}~%2lkX225|6+@jGl4cq@KwR0eo{vx&D86Gex zN+)2R{08ibyoE*pdcshDKfKqbJJzQpkTC>AAP%W4w6*;I(R7wUadl1C4g?MEgS!*l zT?Tgx4#C~s-Q696TX1&>?hqh^;O_4Jo%{Lfoxf107;4X+?p~{}1-T@qT7=FP8qik3 z%Bu^sxb;5DkTX1@I^M8jCU{FIj@_tha+ib2I+-~%j$>i;T5S$2M{;awxYRWx%k9QY z06W)gv65re>!eyUO#&ne3bL%o_?86NrK3vtS?EPT5`>{HdP3uGEL<-oM6{HpxRIzNka-U&uaZ6XIOrB;1dk$ctj@%^ z>%Kd0u5?tsF|YYQJks{q1;doZ2G%SMBSkHtUq7=**sD>rA6WchKwG8UZ2TIW?MEfd z`f4UG}JK!8`TdM ziX-qCPg&icuPD;7h$t$em>YO7(ogFL?!Y1ntV?*)WTRv1gYISfBwqgl6k$v$3S1$DWx2 zF<3yr)3Iw0o#4`+(&&A*b-OqN4pK_mKGk?CWU3KFU>quT2#bqAU&TJDl;apBzQ2m`nuqd&Y1RzPLc88ZA0agtpzvz1+!>SHHx3Apx-a0*uZ| zEhTIlkbh-5G-Lq7688euckFs=;=dRAkCK_wzgz2mJ=;8tO7^#shnoJRx5l5>~6+gV^(Dr*5Ecz`t-nsh+yO_0}bWUe)@phK40U$aO$ku z_m#d|e@QUohJ_x9-4P>{W=m zybBq!4gm3oV`9ANY~#z6`_-84o@;m+2jHZJ(Wr)>Jb^lf0gc`LbwJ23uZ#--_6r08 z-(b;OX=x032St{6XSTVg>z(1iMFQOFaFF~XnPa=aF}J9UqX6>~6`TbC6xXEw!~u%m z@)jzlV}&J9J%bf(QU(Be$*n!2^4H)a^VC$jkrsA|N+fXBQ2_?=1Q60Qw&w&)LYRSY zVO3E|%+Lm%p<4zS)9k1-Ru1)&#wz#;cBN*_qkUvX&EACRX@y~lVbATzPR*|3XwVk~ z94+7>fU%ARF}=PXZFmG3T~;$AEy%Ef1j>sct^jwpqr;IffBkd#a=o>X#N;nW0vFo9 z9XFQKy7ibN*E(J`=wX3(k73E;-sn^MxKBEv)WlmrAeq45Eq>abFA1Iu6oS6Sj zg-@al_D~@M%)ZT|I8^mXUzUINC+z{ex7++fK8J*do`Z{{Gl9_(e9i{HH)|eaXn#K1E=R8ymO_VRV@LAF>V)1eY*gk*kI6@8+TXtu zJkEO#gFf}R<(w=yf39=$>ZBS!you=!9>wCo$sP4{B2RSXQ@GW>$QOK0!os(mHSv_+d5?y~yoTH^d>CSM>wrhUxpmg!3HKD&#AS@)BF}VP4CpjUu$3 z%Pxz|E_xIniH55i48mI&)z+~L*r+)G^r zBB%{Bn0Zx7tN7R&9gu?ptT^aS0GrUBljm^1(n{QjQJWi<7+NBJsTH6T0|i=)M--Sf z5)VTyHy}uZB+pKCkmFPaOWr~X5)(R$Ox+orsb7QB-a1f8{AvfE{W3a?7vfVs%JueRy^!L}ds85}A;9 zFsWn>CHhik}JzM;#*O@~6ekciS21743)}OH!pof0ZNs}P6G#oO< zjK-t+>f%;SG2az&hhuAEV-p0hw9%u7fN)FJqo%NWs(E*rVzEyJXPNdx$+NHX zjec>8Bs2uE{p3HEQrzlBE5qSCi2la@o;l-E%fb`hNbnbNw7)HE z%*{vc;kpxeI(ozGUeM}i&B}v2fk8@ps8oc}^ItDzv-7`^p7$cRuL8u%`%~a;Nr7R0 zWB*)prUou_0hEaY+y_=N2ovf#XXl?wC$$kho~P7S?Qbk(bF#V4s|a65xWmgA5Xm6y zUT*Ktz+@>36qP>v+&fJyFR!mC$|IFbsHVt^Y)iJqXr_$a@ke>lu3c&6NOu?LkvStf z0^qo>0rn0y%2eODHY77Y-s)SPC!XOO^TV=9FYL#wm9vVj|9UuOIe<_=CY zU$K>8TigBlKGl4BC*Bk+d^n<~w0Ra6amb%R{Xlws&>Tsv4Z8FN*Giv?xAPkjCb<^u zlJA_!#YWQmkruzU$Ga)MT@c%V9BA~C2P!RtG8ZP(v(yzGN0A$!85|Vr-B}NUJ^a=Ko?8p%S zI~!*Q`nyO6z70kNuhruFrcyVJ(a$05vwT*-nXG2v!NG+2*e@rjYNd> zVOfKqc2HIm8DdOUC>SPbw)7ZFDPUo!dx6)*e>$v zn#-dk#f`=g2;OOiTG&};fRsg!&Bg81mJZ9gCfjb4Y-=elg`x-jE5L|_ZiwY;bg2u1 z%AuUxH=0yBpBo*a;$ETWYx+zp5oN@LFMBGXTY-i-QNcAQi3uw3mjelX4{*?J1&S5N zvnBLDq+a{_QEZGHq1Ep$eegG2OK-qxm{@A+2~vZ=(@3CH(0L?Z1FT9SFcjwg<(WEo z5J%&D-F*8v_^5L|L4H4<&!={wEKQ?IoO7^6P@O8I*E+2Xw##JDZvn|`pjwS4mFP(w zT`kNjI-a?vJ1wSa{Qj3E4u=np(Ucpxq1f5+1eVteg^kHO+|`wpLxO}!t#qnM25mGM zCwVoGJHIYo;D}B}`~jAS{(1kn*IW>g7POARFcd74v-N*t;ZSbq0bBGWtUry!x9BYm zxvph0l(hfnq60ASzR00{uD(>%)aK)PR(d&Bg_Em3__T@!2i?Z-VzK9nOy0-Al<}>f z_^^5BTDQ|NzFOo{Sc$BOHjOStVh;+DI;C_av~^XTwD?Qy{`L@T10zRnWWT@B?c+!* zz}(?79iT^I2_`mLFwV4+kN0=f&ro^AiRBUAdwrk2s3rBPwgPrw%445DDTi0mM+{b~ z&%fA{XloM3f22$01RUP2iMjMz^Gq+LPz!gq7Xt?F6GD>wy~x>o%H}+K+&;~p>!nDDRmn1n*y=(=fv6P`zM%; z{dk_|Cn9REUd%|D&rFo)b)1kW5cm=6jYxUa?FHUMpNX=yACHBQ`OoxJuD!v?6*#aW zFuU0$n^SaxMTGb$ByHhJ>x43AdH0E(_>uTX3Owk89!tYmAwO}F?g|ocVAcPS6nkxV zGw+fHKBCJ!mYnvzg)8p);7|TWH9b~JJ(R6VoI@k>-AxCo?ztRGBO4pU4U|iM=Bc92 zIbf#gqE`kiF(`aqDmr~GX9de7sAsFR%T3N&%A3Ny^4l#-l=_CCgqfmp3)+FcE2O{e zQd3{%(1rfOR1|#TP6u)ZpCV9$fDH*y7_bJh;{+GYI{(WTp? zv#lm%IM$M5%>=8_;PC?}167{(O!gwJnMJjiWYpjOlTOAO|7|{Pg*jsCH)_z-znT%3+Idsu2 zRtE31dlUd2W!Efu3S-{I_lyMF$Y6(Ac4&DPK%a3c5&dQjBrh@Zvr5q|hu}N{ohFF& ztnW&yj8!h~K)TE+Wr7njo-#Vk`DV)AXo79!@Z_WjXi}uzlN316WRT+Nu1sR?Yuo@% zQdkKaKQH*={q3iYJCVKbiH>rqf!D^vY!fI{G!#&T0DwUx7*aaGc4hGAV2mbe7`l8_ zyU0EhDQ~H&*|WpU4Vkh{hcmEL#a1YB)~$T&EAIoVlP53F^e)9jC(3 zmoqTJ{WI!edlNd3$vs*s>|*-Qu37tgB(ot1doMcVynYo8&%T1=ok7e&0X6c&7$p?3%neO|_nsuFS3k}&c9IYfutu)geB>Z3jkg-j$ z?LM*tZd#^i8%}nh;lBQTCc;1fai0T(GYcnY+E<8{I>)?`|MLP+$Tl>$rv3S?!gSnS zS=B)IFsV87wqs%8UweH6cV z=2JCa#7(YV#%wwtxhn9`kCR_8$TYseknVEyWshG{k=?B`Ku4%szx@`AT45*saPinL z<@@b@lS++cir%!sXb1uniuj~4lgCj>!SVE-TXCC}VP+0sEEs3Z#>)C@VF8cRcJ-HN ziA;gg5AA9;jl2;~IjS(pIrh)BYeo-ZooyfM-lPAp)AoLtvzmN?X6(KF64MoIYM!C< z^ZN?6a#`$#-Db@6|~@rRe1^1SX(K5Qy7RqC=XqbD!Prc^W=o(jEE*|$BqIZvfZc(Oi{4k>AMdHG+_VRj)2flVbkZRShaFZQr!Rhr5s|V! zMrBf`;7FKtL5-8N$XwR?%jDOUAJ$Y+g*7x5j3>ofcBdI6a9(?^)!(WfasaMCyKc?W zxwqLqRI_$9HSdt9TtkRVYOEG0Ebam}k|Aqea4jVTXM(9v#>43Sj$t?oI+Ivuzy3fe z`M8bkcf7-XVNCEiawN}u+8;&AH0Sc0OYO%NF3%}qaH<&Mzn1u-Rq}_T!Hnj;7J_5|qcj zeY~0w#VXvmT)b!nWJ{^YWZhx!wSS3@M(BF8ZEdLIo>}jnnJZt!rNg4ZcG9F;z{hHs z2HjuM6cr^OuXxXw{y9ou`5IzacUDR7dA}(VM<^KbmDCu{40*u%QY+l>? zMbBtH5OznGJV0xRhlhZmehw^oww?Zp*6Q{98hEkeuFEh_ib(#8q|Z$by9&v!^Xz2R z^FS{piifesfzQw4H$OKJ86prj%TYN+^_zVxuC_qmnRa;q3?UqW(>MAE)!Ma#t*uWu zkhmLe!`SOY4I~NwFr6JGB}WQT=-l~j<;GlJSA_U2MeHPFHLsZFw_3o@h%5G^sMW zJvXd^H<^l8Kr(r@B#~zb&OLFlTBUOB(sG+4dH(yDBIKqgT3QKOm{OijF@VslU1DL7 zZT}Q1y!7>zM08#>q$aqu054FM9nIArWsW1325LgZQ^=4ca?-EUe8XM+2nQ`Q=8Mj> z7IGfWtX*e7SPG;bmv@O^)*l?PTejB-G$@EPb>QB+mnjHA?M^#$GQ@ zHqyWmZm#SRKJPSF<%Q>EE5hhdyVDeDNIYMG^(w!C6)fXUnY zlQmfMk5h>;?Ew@a$K1PRiWu3x&QC^^9koXq*vSeHILc`o$LQq4LMN;f>Rw_g`x=%M0`W<#_t4J<9wRWw^lp&KN;0_?YL*RVV)c3@*zQoo(TLT~Asy{{rqK}L)v2Bo5;6`a z71thvz=Ckwq+gTbVL^(;ri!%!6t!$PrBN&7V_2eK4U*+ZREsvRPms2M4udv*TnvD7m?w z;WJ;d$UI_Lco;4%lH=nnM9-tU|3LPJ3lh#nTY^o2aM|+k*nR@UsizmQ|GkF)@Q$LO z1gFmTwddH?m+o*Dm)J9$GZV*m8b4GeJiGxcyt{A0HQZ4|%OFTph{`Ay(Rtwr)B)7) zI>QN>06&_c_XoZP^1S%Yxzd^>!haHNTO$iyGLvTl2+zfJcg=Y07IH=|4glZBEl1=D*ST_SE~S z6tIb}%TE(2BsF=pgfNICOp|^N`lZl(mdW73P^RL#e97!!hH1qocz8*aJxt#tFnSXH zOR)h?<%lg@WySg7q@ggB{>|f5PD{2IK?PSGhD+-80p$k)F7bEQ>a~+T!ZNLcuaSF9 zjSakv$_JZ^jN>^9n9}+?9Ki77*P&f=oR8} zn`mNweJBcA+W5ueILly|ENlbm2eyLDO?axnH%H?qrHGd$%}=mU-0_}?o!NLWa{i^F zZ#t>4%3onQ7aC#FNj2mKk3;rXIn4&fvOGR+d$Kvbgr73OA17?vo_ha${Us?T<2va& z3)^&itiTY&9rw9BCZjCRD+;LJ{kCxYB43Ex(uLl4KE@75xtHbgIOdZ9<96d#z1fs@ z@dAsy>RynGtPQ)oF+e|XYM&HO*PV3DZ-W_NzQjYqi#F}KU#w;Je&i;8zYNdJ%rv}k zo&mDTG<4g6sID7)cAR6Ie+`)|RRPpu$BTH)61nuX>(WJYCU0RJk0OHwVv->I-mHQG zL*Be&8g_nunI5Gd%xZnC>}~?jaA#(@nZ_fJ2L9KQAkm#dS*ES2C0*eDUzMynLk~-e zoI|&7zn|LuBA&P2nBG1F{YOqg$(9Q~G_JsUfetAvH=-Knf&z}B)XsG%4vvasv zR>p}{&vCQ?2~cP6jz{Z4iT4g4VWRJNy*S0(Xhu4wR6}wRTVMNJEy#r9*+a}R!URce z$&N6rNb^p%o{0`O!_YcxN#$|oe{(DI1ft?~q$%5>%S)n@B|;enP{rt1%>McXsS<{W z67TeOXWf2BC^Xy2ijhwv*)|}jHdyOn} z)0Oj@I6BtThhTM-XlvWQm^`U41XUh%v9CVr@|vn_?RAOon3zkWLxss@G3TA$bTdD0KMsDC9X^H+seD(H8tyEe^v=5<#(OEIwW%Xv4s zzEHvyn7D#Y0ev3VYQ$6Cw^Ya{cd;~jDo~GU&vKpSDD$qKE}V{@zOJp^*TvD%nR*4B{2w3k-G(4=;uq4jHb((AHZ}r& zj|8sntEvBZjzWMuWpc6J9RkEQU;k0R%-7KEn}CjZo;k+`c4di{~@RkCV@Z26Ve?`8y4OY+W- zmxch1S{>m$Zl)yt^v5^*ZC75Km5w4ESQ|iHa1IXK`iM>a57tRAqe@hFMyWtwkYNK5_%+k;qvvc^eQ0@MxKGVKhsY<_G<#awOU?Zw)`p>cH=SrA9-JJu>ON8#&uMtOd!=$6btuhIwQRZi~^wG>bBqy2UtqQ}=Q*CmsjKF=zuJ#UIG{QiH=zCIIm3U3kF zXlqPQzY?6D!0bY;{5#nJzM@~0YD#repr^}DO$f4v+y?3gwxk*iSq z)k3fr$CB2818k%i83j?h3k3|AE(`W26j60O-3kj67xZ(DWr!-I@=o1lghh?zZvS-yux)mwsxRJSwDq7o}1{e%~b{c?Y1?B|y!M-`m%c7Wbm z>{kJm`R>Wn{#i9=3jG4-`Gf&WERFbPD8Z&W7gIjzW7t%UIvg$k{ev;9^iG%i>Tx`g z-1~sd?uzhWih+8VLOfG7RX11GkP1tGT4z5{G5;jkBNARIE~X99irV1?H^y1q=n1MS z`$zr-cckeA0lbNfMxvDn#*IydnM<4$6+4k9@53b(oxJ5~IYKg5=pxKM0w)M!M;nnGr{rPNv zwNl(~?wjD)Nli75C4YYI7dN}F2B$^$gVbn?*CH&}f;Xqdx*S4NeW zZziMmas=Hc_37T>v`oank)?V%^Xb$ZX+Q-0q;QbH;muVD4~9iiWx#%V91$8zRul|9 z@YHoXN+l5V$*|#E$)=E*bBECcV)irvyunD(O2V z3@*gwMtfrW&UdPs&U4-#*QHzney0%p+TOs?*$ivWN1( z)-RIi(=u{&C$u|UJ$jpW0SmI+e(Mke(lWaZ`_UxKp28^i6a)8 z21*QI@Kn2`KEj|k;>b#!x|1^{z}3e8cb&I~seoymVj>NOkUF@8pDD~kXzVnr|81~P zj{Wa; z=JtcQ5M$h1m^yB@*d#gXb#?bR$L{ox&}&WlYU7TfnzRMO##wlD9u&UTcV(%x|JFLU zPjJrt+(2ONL`*p|VO^kh*(DsX``6vAU>wt5$Em2E`|CPQ(P1^ZBSz)j({f9be<*NR zC1m~tC~bRl^@0n%t}S?>@TWZ7D|BCts3ZN zz3kZJt``L-D7gTOVt3tQTARdI-WaIT#5CB=e-|(cs(-*?!|IO)*uHzzRCy{sB#?#b>nUPOY70^j$`b3oIgw(*2?T)P9DbR(ZG@3ev z(7W4gU3PD5H{fr`G?{+(u0p_!PA1@Ui%CpO)CW27dur@)F4B z?bqPXQHh^7C4qeI)_I$z#oaZfz~1^z>;t$VMx-KqL7Ob9P*I4Pn~uPqH~th8OL>C( zPBoCS{one>gvmJRC?4tbaBUod5v}b{w3uIH?*TPa1T|si!23l*FIg_+FwM+!J*htV z;lZi8dgpCuWUu2K9gWhj#<4W!z|%wjLw5GjhvK2^br=Lxe8{X zuGmW%m6EywhqPhrw!*)4&IcS^80gOzPC5;W)Ln(lJosKe@u!)h!6ZFBc>>fs< zj-@*(TS9+^SS}z_yzq^aX;fHwXfwKjR8(N#U@}i@q&RdB5$; zo(y$*Go_y71dp-8-Y;ANa}K=%6%~EsS8|yUt#~K&SD10!dTl}3-jKo=D{4L|6(~*r ztSiLLO7&B&n#87W_2(1)pKotG)&sui=>cTo(hccRN!Pz#C68#&g!Si!6^)jZeh`mm z=hq`V-pc!=o79~XT#nD5wz9vm>~D5AdxyGi)J0wCTlS=D`n}LD9Xn&ZdB5YTludey zaj9`(TPFA@@Ub{Pn08Rr!q%L>>yB2<&!t`;8)18(_J0QR|M1)wBai;j765MB4IE(B z_X*HoYL~p1aRKC!JdCUuwDuXy%^n6K5)umwOaH%S>nmg;@RF-`H8wdpd6PD<>iA8h zLBFq5J{yFKTcF9{k!9=+ zS`PK(v|sOE{Y3_p)<9U~Bh1h*=0rqG&MGO0Z^OdJM1hy6X@f0fL>{}0`rHlSnMETJ z7G$A;#4sjc>V48cRd0kBr>bfHMV1oDKz=0r|Tr%$R zZ%vu!O}5?k+r^9FpBP&a7^d1pX3LSqOJ=I@7#x(6wMP0>IrjgX$Frc=i z3mT+xWE%KX7*G*wk|(33iNyHLR2(AwgT7lL9I5WzA;x8!P!^a{a>+O7(qq#ZJDO4^ zt)QfRMGG0C`c`Zf9eNb@=;&sy26xh6LyMFWobQGV0k&Hsbua)yDa2JzZ% z(_i-WU5A0#rz5;4z>)HJ>Q-$lk+_i9r~{oNMYb#=tGMU49vEB6w$5HSQY9bey%y`w zht_j)wLgsh*!LlmzKe~nh_fEJ*9{u_!x!a(Ci7$*7yR*W_MZUpm%PjlLSXDz=I1>{ zTCGGVCQ~@f>+Lb}4c4CEbHO-HK}e>*zTw-4K>cfK`c<2Xz8O@0GJ-g%?hADxPvV;0XilM`gTB?Tj4- z6`bo{QXtoI_IPqInDgMfxjZt#`qYl%TKvWHE}OX16CxE}wHp?Y&Cc|vLW7?DM7^f# z^-JjpAvVwnz0qCxZ}4&ZJu>eVh0}6#LVHJv&75yNZu2j#UvuVpdNFw);8cW>8oV8A zJS~(74!w3c!9j}%cdo%KK>fSp1=5aDlcc=h#Db_Iz_H9ZraPwoS-O5rceX!x#APl9Y z=TB3~3%RQ?{axI~8?z0;gI>ntnX8XDcc`8K`W=F@3oB4a1fD7Q zAp`!EwhBS|jg#&IW^<$Pyy_{?6-vgVYd&xf98=VcybnU6=W~pAez7lj#p3w=-*f7gwjgkz14|Vt_ct(b+T=(`1Sxb* z?Vtz+VP4k9`=$8QkJ^8{UsRq;Wy;kSi%XyvWmgB9DbZk-|FKTN!7f(^PK3OQ^#U#- zQHfSnqwhEPGI25@Y}O7jmVH06{^(0qJl%fqyHS-x z&NM;F@BG-Sr8SF|Q=S%Hw11B)*k)ep**UXmKXej&Xs%6Wic_jt!p#F2JJwH5 z=W5U&$TtR~as>5V?B&sjOi*DGA~W(2_YZ`ZFJ`yZ%`$SIe){poIwr zB>>q7LP0A|mW%Y7Eh41pC6N@DdX)(3>(~3)kNxhxa7*EC>Pa)ZxY>B(^N58~%~U9# zMKG;KrOJhMp$>h^Vp2#U)yFa1K{5)rwkxG-cw~qJdHAEQYx-0%H7A;Bi`fw<9n#zU zi4J`{$v%_JYGZ0SdKj&~cFhav^ApYC=NqlZ)Ub7!hBb9 z{=QT+y*N|UAS|4E`g1qLqe8mF#O`3ImHq>NK>#h@m9r4BuUAs9m2?wUxp4dgo`25Q zhq^N4e2RwD{=jm$6NfUS8=3M^0P2%(f zA0bmI8cZW-{FLNw)|V-m|1gw60s<`V?mN1~n&VaZYAMpFisjos=G;2h5R_u6$NV;b zTZJBWWZA^U#i>-NFZcQj747W!Tm}>G#_^p4Np3*h3otY!s)2n3_J6kQE}}~V=)4-| zt7CyU`hBQ)10|%uJefBL!2ee$?XCfL{C_^Pc!7In;NubRw`;8HvE>H1l)mtQ4#Q%CBZ$!_A%414o zn1xB9Sa7bGoFP6XqA^TtE*}s9FmF_}>pb@l)FLtKPZ&a;CRbp^+)=NNFch}KTY6!Xq6DVzqHkjU{T2m6r$~EZDT(ta_@Pk7S(J}$*4EU;LcOE!DQVW&(2f}t%6waoMfdfqc}X6G z^&_C1%~42sQr(nPCX~0?9DyP74@fsiflxoc!%{=FLw?kKFz4xsbAsEcWf)LZ`58fiCq^gj1kvB-a}nPtc)o zYD_SSp8d;Evbu`2Bk!q|NF+*-lH?27ZUASSkLlElE%Cyi^QI>W*hO#?qgW@tgCuHW zz%G0{w;g3J)Wyn}hPYHETcivlKvi0*%h+f);N^Es?Vq$_-7W&=LF)xy%i2r@z0YpehbpU6E zlW*>K1!~+Q-wk&;Jw=5>VRCZB(e)v7S(E&WK8YN7;pkKFOVlqX8Q%_; z$m0^NbmT^@ilcPNK)9ztiiK-1i^F=k^8wVl=7|CuH>pa1d!XTe*J#uEoo^?UpvCkW zAlBr$bxvPi0^u~FaVOi*f|)U~sgV{P&iwA1G?I#^CFd8E>8-d#M5X$+b><(8e`<9G zcJU<>{lLY`A?P8Nq^Ot($fAer$F>TSQw{DLA~jvtGXJrMcQm12rQij_@<{Vr9oOKH z7RP7UIdnCO*6g-A2pg6WQ4vVT#;(T<8|%4$xOcL;@)G_phH(!wQKredbtS}57z7h= zm@0^5HvTiLgfWf#!0gWGms2M5#F_EY#><}Y*ho6UtvVA#?Culq;#Gc^?E-?V0xRft zMdy#2+>lJkx8MUap87-GgeaB+Xxs1p?oT$oseTZP&So@(nOE6Q=1CChfFY*j}TI+us|fL28QKN39oe#og`G2?rG^LQds zp1-0|^BHEX?R)@=At>Ix@}($K^FZy1hZ_ClXX(@_M2hp)=$DhOPhCWhlqn8ef|qSz zc(vZ)Yr<(2l>ob?GM+rxJcIMAf48y5`V?H`O?Tj*7@{?j5zUDyC(u7X^B`^OLYL>` zNM+zS==PBobB85JCK4oCz`CHF5ocv`Gd#YeuAiu?OlRDf?UNX6@d6n>mYk`ZxQdYK zma@IFMW{hPlf~df8rOiOD9aA?@UsSkq|a3yCfxEMf-Jga<=3QIf_ALZpNiH49?ni;dh0oxKW&?ZmiyT8SF1Oj z@S@W5&G4@gKpFBRnih(|)^>)ROBDgf`plmF=Yk?#EBLDftpx|9J=&6WVJ2F;Xd0kH z6!7u)K7fGr`qn_0+RkSg!H>{h)1?}{N#cBCzjvtUR8}DX@L6X$j~zFYvw7})PMtpS z-ISfk=M?|c^Ids7S~8-XjlI%vg|jrbzk$HS0?q3(tg6QN1v;Hoe>J8w^RE}o1`3?+ z7%)YCxhMRgqP1!6w{Nb=)(j(bImeDsj1C_%JJ;dvT(u?w2T<9z4(E0zXJ*JtPE)rA zJz48tfCW<)79MHTzW!j?ibboxE#1X2H0R@3A77K};Rh1T8l_8Aj#|81ytUX#ye7g7 zT|O4kL>X~q;Y13Qgy(;Jvv$}XgfA^E9o=j2$eTHxl)Gp{8aO1>z!cwgvO1r)>jY#h z;BVUt9Z%Ycizj6qXtdpHiodZ2220B^(w%1w{vZ0nYbWix$h4{4Y@D1T6>8rvZkRSb zdydOXm$MC$Oz}keBik85*aQz8tLuseKR{7Gn0j#@_Y8;7h5RW3FN3tO`$((s zHSK5EUsskzLT8j(1=xX12bM}G%IK`k3u8-=?YK(IkLk=XiE@dnmfG0b zPPzA~kEmFxakWTpI^JG zG#Z^HW;}v7zEffhPbpDpuHyp|3kr*tCkS6v$q4@Z5o9f`0oMIv=F>%|1TK*|t zpHlMY=l4AqNQ0uqThiZS|B&^|*+RpUw? z@+wn&$}S48(lkqR?|t!Ib$sdF1T4AN^!a-LfAZ+=WOkAlN53hN!+PXz^NaHN^K`G% z<*461@n5m(8%Q&%zB-=}xcVuEu!1dU#zbsGJkGNg#ZGLcaYZuTqM!Mz!_OQ#Xaz$` z6@zz627ubG4`3E7eo2`uW<;{)M+}A1`E9DuU^2^7$^e*)2$_=K*|QJgxQ^cnV^Gm2 zIGK?so!Ie^0I?-j;xnm>-28FsK8>TunGoQdaoj;9AD9IS9RX!3>?>>>Y_Fgg%dGC5 zBo((%QtAI`qkwU@LhXb;iq-L6{?)rcsjuD@5Ex-mh=k!>^Xa(~oDgGU)|ln!@r3OiJ32YBbY89}0F= zDISJ|H1KXfPC~=MXrd^amR{R~w3JD)v{tGpSQv|xtoWylNyu!aHU)XePqHQ{3AJJg z%BWlMkp=o8@+CE>d>vYpuatZ0;@Uk;kXOaLPhVTJ5~B5S#X(^JUJezCJ5CIEvn{s3 zf~bBi;BfpelmfUjNm@<7$27jFq@d!J_;FP z`oKs&X>u|N|IeJzgYXcvrWJ^h_(hsj0=fBqRP4o29>g`0d|I?;yc=q>Ii&tkDR^q* z#2KtQXL)wga&?ph!k!>&`;M?^oYwzJ*aB;8Ws|w`rTQ}=f2-@;=$7h&4jW+ zp~)h>6ZJXPM=oT`-);WfP|M(9w?uZ0FG102*j9ZKMj4E!6L=>Tx7KDdexHD4(k0geX z(IVnFI?T)-HcW604LgwpiVHOTe^h;Ac%0uBZ|V@Ptf{h2HR=6Av)j z%Ed+`Uz>-%I+&hLhNK1wc&6~njsH73DtHd2)8vD0-~Gg|(|D_O^F(^@l|&Vhcq%NV zqn_l|xN56KKTpUD2T3>H$5xTeD!Shp)EWLR9d3wCoS!YR#U;mRUp#FwZPVm63iY)k0CYm0f95hYtS=<1^d#B94@7El~O#yv8F zHAFbEgJwjCWeHVATZ-$SUOv>Y`ExVvcZ*ZZxmU^%@>tb-mu`sEuaw}lU2i!~CZ}d@ zLMk#|c{L1Hv^?AVz}}tJT(F~KQ5Fa@#VdmnI|?EoU?We4$`)@w-+mzkD~<+3P9~aU zk-~xq_5nnX+yYlsF-*)&IIC1(a1&U6j_AJ@HZo04%b&!ltZz*%_K z*fw*e|6a-e@J`4mN3Ts3Ou?%{(xsa=K_gxo%`cKDW&Gdrr(RyT{#uno#xeXtV6Z}{ z?^P)Hu*CSfpHpzEKxKASz~PMebJ_0*$80PV)$F_Fn307put`u}Tnr2f{0p8z<@?JW z)qjlmq7bAS&$a=%l7kmfMpk~9nd@X{*)sFRo7z|f$T0MAMk`~pjO?-Nxc@p+2rr$% zNRkRv5(pH)H;RFQ%3{%fS`;*->P{|q+vsUr+!$DklE;uBJ+3|8nZ)ORU~A9r$T5G| zknhhjpS=4TT#BoDN%fVPFHO<(hi`_kBgU-T)f(8Y5Ie^K`$3#~ieZbLtpBOe#R@g& zX|H=%7OXINy#vED`Dqm_7J>{ILu+TX;q9L;5VvI0>ioWMVkX7s8IwhD?uIvY>%~pZ zNDkH*JEb}OA+?NH0|e!CFn$7O&j@kK<{Y_X6zc1I#;fIZq*S3489JW(EEXv?Pv*Pv z$mdmxU<~TrLsG9(vUXwmMPXh^J~fOV(ska2iD2<=Lkkxkz3K|;r#7Y22kG>H@4<#S zrP2p7RUf4fNpzZ0<0=1rY)XGZ{?(=_jxSb046IAr3X@SV$NQyIAB zZQ#eE%owcsR5>Z(i@k}Qn#MoyJidUs&$gC4_4tUJ7746Eb(%p>&>BrCq4W@yd>mxrwfP(TnfB{lu+EI1vvB zvuxuwcuE*)HHwy@ff2SC>BouG>E4+@F8&Fe4W6Fr5F9TE%{%m*(1gucj} zP_%3OVIeU^#!sAGjJx3X2Uptw@c8!gIt%f-&JLF(0#Bf)gd-(|Y#_M$$M^x(rQ78K zYnXyCWN{>|uEM8fqxPkaC(8YLYCYq=VR> z3-XE_)?iTJ94!q>tf%(GMcU$D*O08G_-64x4_l4&o2i=6%zf-@liy$ZuYjN$7C|i&9ea@@Wm=DtA zWXda9C<>(@Y?z}q2q>^M2p?zuy4`M@-K7@UxG@ZLSm9M19lBSML~=Fq2GJ;fav?Sb zqOW5~^{i>h07Ht$lT3^V2WoT3&mA(g0U5Uo)^Tx(_i;27N&BQ7;x693Fe&zp~rlD8?+paTz^^QpF4U!qx^ z&!`OdSb5a;(yciH7xI<(Ma%2`nIY1YVAkijIGSNa+#M$Pf*nJv*RI=%*};@lv5g`< z?%usNW-a>to!@j#)UdYsUs*IWMn@HeQ4MfvY;V2NZNDh9j+jy`IUdV)yq8%oH#ovJ zafp@}ZU2BAW@eWCWr+9aD^WgMtd&uscO5P~&3hSb4Ep1^d5nt4h8mK0Pcf5y2w|l} z6gt+0mRekTs_V3lLg2$f_Y{kriILlRRw*;y(KDH&PW+Lo4)S^(<=FYd>2ir_eB_x-o`;|InWn_y9b1YyfC zH4X7dQmtR&qW+ee*u`Syiv6RhbPRMmkDA`<1w5OgBYeKH@kDNL!WufM=GO{YHF7;XFYZ7lf0MT{=DuTsst^qGKHZa{mC7CB@^uoAS znZi@&+DRuMY0|9Lw!PU`=OnSi*9TT{$(pyD&H5mTULP0V{4YOSDrJJ3zSRFb0Q!GD z0Q`i#J@;0nnBH)$v#$!|*d%Ecz(dalEo7E7{N(+=HXPJbMCRwuz}KUnf?$M}FrVQ*=l;;pU(qfHvkdU*3Eiaw zCB)7sougGaTdET5Sm;HPTogBjRcnhbcx0f-6Ky+f340XfbR3Pi?AH5DCdM9MWo`k5 zT2N%k1{I0O3f7wZD-w&Vgze%Tqt*Fi7+Av=E6m{7KM+mEuDF=2Q&1$-=%cR8a=X7@ zOtkdV%N&-jGloqTp4gGgPH9QQE<q4dCN`5m5$ zhI3e;^p)n13X80As}0*U;(*>CXpG&L_xQ!t(lKcHd;Ek<$;INwHA)Llf6Ar-7aRXAK`$y5;@7s~)7 zAn%&XJ=ov@JfM6?@ePpGUQn{eCre>>q(h&bgD2I8{%FcbHA|kJ#s_-g$(q2u@l5gi zB%W3+3H`O2DQi2@8fhCfd`%9u;b`@^#auv^B?Y8R$04<0I$hScr@0>1;^*Asaqc|1 z@=g5+i@m;f)Zv86+kGOLERL+oc+8^c+B9?WMi^$k_Q47tzLJ1%2Eg+=EJvTVTD-8! z0QJKvzmVWrq3KmO2tk?Hh6xj`H!vedO02l>5SSDe9CHU9MQVLYHg%aQY1+ddHj-6J z{N+n^VFewZ0;zi$i8Ib^3NskIx2Hem8zNPQaiP-poqxqbG;FB7np7EE=I+j|kH*HdO*M!=v_$o&p}^L~;?Y-;x@ z?K-uU$rQ&6fB4wvddm3kBpEADFF6uDq%;~{x)*wpPNLGp#6<2rmG%9%uD3@`G4XQm z9rdokqG09ML%~uwBgP-MWR}#;O6@=s}KPViRawMVc_X z4od0j@A`1+lD?@@@>BiPD;6Q211$M)KZp;^_y}7eJf%gQG)PM-Lgc&4Hja{s`ASK@ z(`HDMYGhq7IXJ$Ez1sZc*oq?_#&px%xc-OntP;vlDa@|S$WPC$ZBA!{O=dnb3wCxO zEy3D#i!@iEWir7x15q&=E+}8*ivF8E((L$0sco+zG6(yRV zWMamy=|8AWUzm^_b(`J!VUUjvAxv4niMve@FBhbByw>~&3lJ1o14&I5KSxi;xwup^#%z&=#xrS#x5;Q&+2hP#=-^bvkNH>P7!0dx zLtqGI52!)kO~EHt{c0f87~$3~(!Neu1|EfT zwXfSR3wZ9Fia~z<0?-H@j2cUz52PtxUmLHx-HX{Af4lZ_W%&0}_}7}~(I>(voRBqI z^)W7S^Z+P~owMRLM%Qw%zk3TB7i&LWDm7`{PBpg4X?r1pQyF@nGP0MXXe}+x{9qn*4C(RYU|IT}{(*>tW-ydh)HrQ+J;ox5k#K}!KBZ%1)Ysbv zL2i!mBTb8Gc>4`>T@@-QJc?IRpOmXJDA6i~M$v$){Yd`h>-RGM-e>>sTaYL`wGvPo zkzdno!Y&TFSY7mN+K2Z>lNQl%xZ{AR#xg55&ys<@B`OeiIh~Zi3!t7Cbi~k9>|3qCi6g0JSf`lq$F&6&4TJ#iL7G1Kq z8o1h)lam9Bs@{7M(27tTh&^4$e6S(XntNXC?RxCv?ytZ_$2P2JlS%ep*@;&>f} zSagNL{BPCOnDWS{VU8s^R;5QiaV(;vOv=w{%*#Z@+zh>J_VT-ThD$MxN|;70vD#EM z#r2U^d_KxE5nXU2Iil8qsb4|5;6?I;7Qr;(Bx>GkR3QTQY}kkVG5A5*r_|gb&`$(N z0~yepjmbK>8@_w0I5>{+^5@z5gnV`m+&LtYlJn}-eAh`}V}zeU()gfuG23!q(W!eH zXJn-Q8u2lt)11>dy8h<}vqY9aY)nqGt4H;~SZayv|K3CBE1#_@6O)4*MQf-U41j3eVRWNk>zDFay(?V zKd?E{vfR_a7VS^h9FDZ4`9c7#5*}4kW1plHhOUX}&*CkYzjo(nR9)h83sO0|?zu9i zY0NpMX8xwDu^PEJL3U#}c%IXN4MtpCpg8^iZtfY_M*WHCpLf>gyX)cgJk8h~%=_%F zcugT8ENN>Mb+ZIF#n>%cj-!MEsWUaavh66$qEtM4eAk2wAg?;40n1CpCMVn$a zSN`OY!D<;^vh|JH@&4DTH(FdVLAcUTl2wqN)Ek z_RqfyjjfTfK=)L(G487}g9(#3(NA*&Qqx`~?};yh&!8t>qPNfv zk0%`8{l#~jyp5h2VNYZ+iq)t|4gAHe#WI(4f}Lnn>vOd6du(2c)`qUZ$W2Y7e8@>> z1)AR8x7pW)!*_IaRum^4rIpJ9oyqy&aeo6RD~K*a^$U;|>VNyZ1Qy)6uUEOFHBZF#%7UpkLk6%ECfeB8 z+>PW_5Vps$1a>cKyYn|r=v6s9y-%UnR5#s}5qtk9>cQdv`2NowhJry}P>(m`wx=>T z1>^iGWCQznqD8Pn)`@#wz&{TB5ksb)=_bUuE-c{zf&CM)ydVfmN839s&^@}gZi7Nb zE7982>_L4xJZ6B>ip-{xjLa6u#E@|>i&@Q(M=wg)um&Uf?KKV87}lDO9IG@6wxv(0 zJX)c)}$cVfZU2cluC6gl4Q_n*Ri)yz-FbO*1it45WAD;g0|(5Cgh*gO~W#JmPwZ>9Y)5S zNeTe>`{XIakw$A=$~cj?=mX9 zqp7d27qy;X%*VM{uAcmTd^chL&iH>ylz-3)S6nd zW5b0K@;~&X%Inc6rZ8)DI%h#lIhEMHK^J_k2Xj_atN9=FTRI-t;DQg6!ggcL%)?uZ zE!d5jP`U)ic5cwJ5mHk#j7%QBo{MEv4#Aw8WsLHcr=}N@tXe?VzdR`F>jO>(60>NK zD^VSL)?qgXj?fB%q7p$?9(jN-`S7i!=l44C>kknMQ}P zTH^%pik<#yfmlp@7-QY#$9#joQc=G|Jx8UE&Z#dy^BFd0w2{dVAc2?nZHwVA%h17u z(G*r2&)CFK`zg3$w!e;;{X?Yt7lq>3AwF*|{Gh_q%JwvDw*EhH_EQEq-%MowC#^u+ zQ6eZEz{KI?rlFp4p+xW2G&atgE117rJeal?315u@ zMk%8ZSj9!sev6a)ZiPEafzF!HpoPle7_OE6U^Sq!|B1+JGv=xn^p0#Mb|FfMV!Y3? zfKWsI6!42nYB!XNfebz>DtUQH=SSE%+k|Iu*h0EfYt(76$h50&6f@W&>Cp3RpP1vw zEk-3)6Qz`8wXGFs_(LyC3Ktd@z~mN}7XxiWmrmwPR3T4DTD$~D zd=R9fd94G>o~of`PO08mYKIa<rd1Ry#0T9{$CL<_RpSrLj#jL)iTv|=x2|a_AA5G zv`#I7j0Aao2vimYT)-y4$(u!Kb$Wn2OcBYVBt{S2M$v%UJd-`pi;Y?<)Xits{# zlrbrbR)G2~{0eEIYFC}VDSmw7Vlz}pb>TF_ra>((I)6va@r(_zq*=i$;PdS8BTY0l`VW8&XAF)5WY!b&y7#e26qSuqon z@&~6P9FBcS%wIhk;9be0@@HZ1)^(uiCIZYn_LEn!W}{LaB_N>cFq%zcxI=q(D|KwG zzK+8x1AzMQ+nGbHD3Sk$JbE`igTD>CZU`Wbprf^>6*Ua|in-`|?4pIu8j%ROc}tx%W@F2K_2%oI-!TLA z{q)>MGO$+l=C*&$iN&Hae7EKD(XiIfZt&jbYdb*>nPd!;qLgjB67rlMXMmZ*y1~x` zvg5(AI3=S2VC(VTYNmSA-e~3P(=10ou0A#EQCA|R8NPXj!8j;kWS%+NIGzlrOmsOi zv6WCLq4CfQA#Hsm3C|JK7RStb_N*I&)S+u)_`mzYyA}A5r$ z_-uK1mBYv^u%LqfCN#Hb%kQgb&1z3w11R*8?b_qJgskD0MZtgj5dW zUG~DiTnL4KHISsh8c9%_wDqmHHyfcFlbg?RAKAvY_Mg1t2L|J|S|Ao6WMl%0S~qeD z+$C7`k|b9F+=!ozl3PTK&~(BBeWYQ;=QOrKZMO(`RGTNW=SS}>8^LD(u|aB*cO z`BW#YkFYN;8v2_Ns2v%QV8r8i{(hTX&Wp-M<|fbqM{KUJd$mvm6Wg5^X8gj@@WHD7 z3}*A5uljHyQ60Yq@?(!j)#OL z*Ny8u7^J{L>!^IyQH^bj;+nj-Fg`iYfbpUF$TAabY6BUmF{DW5ct$|CcY7=&Ex@!8 zgP${ReTAtas_Wb><7i|h@m@J3N}-jInN{W*tj7-KVVcC+trxwf9TC}A~M=({O*?VV=M?~2W_a0-vDO}H|yr671S8nA}%3BH)`C=cs@ zB|6;owtWur!0-oM&6O(eY}*`$ZVxP5A8&C(;D_$wAKvu^aJeCEVShTr!h#n66um{q zSn@*TKRDl(3Tx2i{=V;}`)T6fq@k^m{8RC-Mllhlq^caKg^cr!t#u3AshH0hSqeSa zp9Dee-7g_n)w(YYUt69Y7RKVu1vrN-ToueXnRxf~*Sa4Yk>B6!Io(?91VB%o6hma# z@NjgH6-(Ki>!umDpA}y9ySoO>yH|uH;iX7^Jjovo_6N`aD}q$U)g!opI|JQRE@BJTL>MtRxwGP3kK;okifhAm=@JZ!INv66jRLF$|rpaHzlJP<9Kl z=X<_&33@Ct$vx(K+Ouy7l?va~TLs&d=HUX(i|Ujb3nbVE=gaW4S)I1BVOT4N2Aj~k z$lWjQUc2|`a#B$+7Z_TVM-$^Wq6*XPXkl%QAuGk-tOm|{6~aIlTz*(6ho-QxhHziD)2|XG$Q`YBNle zr>p&0*K##nZl1w?ieIz*UTl+;iC=g#j9 zPsa8BotijRQqATs#S!srYU5A0hiTc_W-bkVjn?B8RaIzE5H8_Sy>+ZNRyEm5QcPQI zXp!eI5**+Y5iSr$iW&@-7p{+6SjCRSdh{7Cxm|TMxPgco9u_|iBEU~8`+0JY%#$Uz zxK4v?!q3ky+lp_1WQm_Ku;WF8^_P>}!fh8legKSq4$uEn6*SI-Rov?ng39`IzIIq*w(6eimLH;1RPj?Gv>`=cQmCOC1=5GX+#u2<01F zHhxkf&nS2vE~;09wz9F$f)+U6Cl+1JZWJ?!#ZzRPj!1xq3cLFP35TDGuO7R;s#bWL zt|vol4N+g&CoPF9gr?n4TwVq>T_o1_r<%D)qbY4v5gr_?MeJ=n873OVzKA!g|Jp6+ zEProhJr)%W&-mLvn`9?=rrZ?<$2zs$tCY;eQOR&f5yGz19^(?s+LpGy3#|(;KA214weKVuMCZE-V?O^mjd4ViOQN;ae|R{2~qSLYeoy#sB03 zw*fY)v742h6*OD@+HL($9p~*=pfJ`U42BJss+{0vE9&QNfB_cOj|(Rk_0y!Lmm)+9 z2>Db}#>q=i;xv$(gRWLl(TOcy=lGRo6LS+#_WbW69UeQLgfByfSK|x`%CH(OT9lSC zH(UHMS9xDvWe+GX2en`;>Cu86$XtLE^Ut{ByDRl4~5`^K(@i9oTM1za!;rnI?UM&T1UPbav5aZG1p7m4w5oswqn+%Q3s zKnTk?1iEy$lF=g#Xh8=@9m#w^qN{SCu-mHPj0P>*ubS2Fr_uYFyPYvqjSQLs4o=P& z3@y!KvSG&um(aR}J4k9+p-(Qmn@cX;T9sm7p@IyTTt7#`_jBw!{UvuHiv}o4eX<&E z_1E*mO@Prs>1P5rUBglgMJH+=nF51k1hi-MPErjS%mT?21R@vgKwC`lW)5$_G94KB zk_lJ)W*-D^`&!>^&~OG8r=QF5UL%+;w?O3a+APrBt!&?ZttP%il}suX)F>t@N!qld z(2%b%;3!i8{BG@%AIy%K!Gb8P;SlsyKmk?CL|tD4uJS+zEkg5{i9AFw-S#7=(+#`M z_b`AQKrNawfUQ^eDY3Cdt#Bwk9&WgZ3?myl@JB+lZnd-%_V)z4@v+P!xqhoOKO-~u z1Z)L_F}fjDceGE!cPrDzo^3^8YrYYQ>$oRoTuh9eEOJY|TEKAhpxvG!9^}nDasY#F zOAmYJpZ3BhiHF}Gx*NuB^}Vt=twX1$Wuv3y>oB<3x)7vjvbN<|_Yy5mLWq;mUTdmnag%GqYI;zNi z8;G<%j1pbqgbT6Z)!jsx}w5GB?*w_i$Nt z?BIC*O39#UeW4r{@ok}gD8j9#xAiicYoQ}ufdLu{jNpTF@P^%&Oe~MB66S_1#h8hs zB2l{WzxafJ+*I#lyWi4-qne8$7PwrqWHxrPw84%68HAP_3(0;;{P`EM5TnIk-fx-( z^~r&=Fw|hzCxhC)2e+Da_tDUt^)qU1)&3+RW6f7+;yv(wmP}3l$P6HKYvH5UzZ8^a_6#Wn!a8^bc_bVxucjk z^h3%1>j>E53ZCcKe(&D?`GQ}qg^LCdesp>eUd^l{_n91TtF_C`cP^XPTmcaL_AsN60@gz z-TG=v0v}FsDvnqSQgZ#`L+7(Gm`O2`+&6zz%~|!fZ!gg1Vs%X9eY)v=ZHyR`<8n4b zBb2!n!G@U-kewHgies8AdVtwV?bP-qfs}ts+PApQmx`O2ue^|EB@J zgzENa^gmgvTUTCCX2DE04zAWoW@w5&i>L<|t@S^Bw-LFZ@X<)!eIb}_2|p&Q9rzwB zsY8n!4Uj|T$|rbO2nsOqspFzWG-+tY@&d`5lH*ml;DqT=lgm_oXOGcz5(N>f-Xqi~ z-5n^4G3atYYGDUqB(@XjMfoSQAB$JY=&r5{Vn70#hg~l{|8h!JU|7oV$F<(htTK36 zC7m1B8)nC|P+uly3l~~pk~`{za$SWHG=mf+5Pk`h;`heE7IQsZaFQm8HXz#s#G)M| z&IJkMLX;OTdXqrslf@RWoEOLjA~(a60EH3^RAky~B~AyOB_O_;XU=TDP)!Q>BT%%z z{<|CE!494nHAAE^XS8aX=FW_Cw^xAw_kXT%nv0bZgf z?3k_>fT(0b1S{m6MQDJWxS=Fmn`RQYK36i8DG&ho zCJXO%B%8PTW{jj>r6WwuDZ9U>S_wWiv4h({C8F5H#7i8BvrlA_OdRA9pTJpbHn*+g znGuB-E*hdScmcPPzUvYc_B(@`F@uxBc^aaKOk4YWgE?&s5P8p1IPR7SP&VJ&efX_I zQ7mJ)=c!lyDpwM?kS06jPdd)qAZ*?`8hl1 z?F`CP43w9(++k(a!v2aI4IPWGb{w^{{gN-gQES_3QeBo>YDAZ8 zcGN>=g{RdrCK0VCBtxegOjV+K+X!D8q|Ga%qmAbnrivGgBF9rOTZc2Ch_A-*%Pjt| zsZHNg44vc+-y7t$>X_G+aCvW`yM8CsJT}5(fO8V3!bYU9~mH`$f2P z&Q=Tb0c7`(ru|Jtwjl^>*L)zH-xq6O`puGlbdIc8=K_`Ig(LmUx`A3VHan(LjoX6U z?rW|zM4zhz4MP{?{IS2>cl+As5tfZSWf_8(Pj=@^8;c$P8bGhHfF}eT#P*rzrq~-* z&iiqL$fNCUg_e2j(P&XoQM} zRGZDH$MNVXNTkEhbceeGCii#;at&DEZfF(T1kiHH@yQv<8gws_a$31+E#No#z$4JD z|7(%xkKgvRpUyTjg^LeL%z)vHRk4KP}nUXf9uOb;lh|^M&)!t_*5|OF*0leteUs ze;_ZAOYg&@cEM@?$$1WIp=I_u)s0WZu4aOlaQfJ_itlGYzr7FonB&V(d}FfoCimdM zAp6GIeC#@~E0)Wy#~aOYdkpt91uIR!%|l#2UBh{&_E6Dq!h`zlh~(>Ik>Wu@nDsb8 z{v?H)o%^@n(MBhXx~3b~j<(M_96YLb#f4)Vi&K|!IFQ!Y_(aDZ&EDtIA`7OBy$f3L z4=}mRA$T zVKj^}yn6uScNLyaFejUb=I*i5e2Kq%yoAQ<{cC8lmGn=e8oC24#E?6krk-R1Q`d;O zD9dQO6b>JNP|q5wq1hQyPScPPZ$;e`2eDI6+qUQkeAQEADM@z}K~ zosyY#DHdKrCVBOCSH$299L1ZFDstMG_`NAT8e2J)$WqEvSguqTB3I%}tLr5_g7@5? z$g=D@B9VqifFAf#^k(yu(L|HSatVdTr~W#!X`c2t<_q^oc>Y3F#1J{@vfs%1_bYL9xO=3GyZ2BA-ji9~|u&^6u;S@9qTI+x1 zy)-=;LE4bO*|*0#S1K9qBWBE0m-%@Kl|_YRr&lq2rZ^NPNU! z+L+opU*P;y=g8hRpry!A1-3$8xA=X}vsm}bvFkkFf{{xU23p>;z91lBD{O9*@pwql zG5F-=qkIjIjMpB*aPB~>{?EZ2*Dr4fpf00j8Rz4F}u`JO_$ol-W2%rfuczddp~?Y-|yl znaN&LgRLe4t{A!(T6Jf0-zY0)HELdhtPwSnVN|`EQEB$pLf6nz7SRu`pAGH*-dNH8 z*;q;K3pb^5H#4~92|bhKnsiIquEmzZCD5cRdEg}y6PQ@pr3;pOjyM49SR`AeCE3DK zzfRjk6-5iCdmQn>^c-awBpSM^(7D`;Hp?$mY<2p^HdAk=)i>_mldLfEo?K%jaz=ej z9ot@=DQdU+FpxmL`e3(l*V?l*MIF6V$IU~7NdqAF2`mI4~ercdVH*bjjh zYyHB9U~{hLz%O4DKV!;e?$2?`u@E3$C|>fm%}aZCnziX<;H2`3y&Zo^ zXW(TvpyJ7y=syrlv&Hk8nP1z_zS#xm5{l`jl;Z`S6cYK95vyrmVKEF>Rl8hfC} z5Jx<+{IfqhXe)vXXn4;?q4#~yzgKIgi0_qU)CRnrPR$$xlA#)*mQ4U_rlA5gf+8)% z9^pn7F??%1?`u;`OiV|gFUCr$At%1Qb(lL`$E~!cU8~fiq|Z_N=R8F?ku0jfg>({#?`pDY&QVC*JKN~x{2cv$IllWeY{?%DGqLwP@d~}`RqIJ6xpPESIqSFCEM z9%KbLnVS>Z%Zf$=Bpv$-4Matx-trO*k4A$iGiDS^1MH_>PKPP^&Xj9oR_v_5mJJg5 zu?H&%^}`p(1n5l}4b2?bSy`u*x6x|c@AB^y^YUlAeTUtn%Qb@#&7!d{n=k2x){%QN zs?p~e!|+mke%E|cuMa8VmAyY|^xN=VKOc1X8-!h3^-)yu_Tdq7%WV;EJzZuV%KPre zNW`b&#)qo(pfVaP;P`gV&(Ku4c%JHlSn8SvN-uQ|*3@&v#Ze&wUW&$j<{gLH??N5C zE9NaTzxGg&B-}cCU%eY=YIXHR>iZ;LdY^y=%46$-VYARcp5MlzQv^Us6FA!eii_ro zaDUzp)R(zD(@NdfM3~qkB#}u4+BtkAP!#XsZbYQe?my7G!PLAOF`=w4Bm!G<4RM7&=d)%AK<&t=-&X2{6 zIsDMEIZ=;?{aK^aR`d=2f)|I^bzw$rnK`jG@~G(9r`#ZAJVRyNWSJiK4Cw(~Xv_G> z9Eu{*1q{r4LFbF+58tcuDepY6rb!p28>EpT^YUXoCOOoMV{BLd#F`L_&();gh8}ZF z_tjI$hhquBSon#Av5{|A)8=jPF4bPY{XsVBD6eIX*G0Q}c1OA1$5IL5hugdg2!X`s z7Oo%4(hewr+Ov0pnes7CAsw1?(8GKA+5E0)q57W$(zOW=t?JKf70-J^V-1#%p9^}e zzQSV)#dA?_=gy>(>`VC*ai#Lh<+Q=umYW)YJP1p#J7oFxkgZ5q$mM2AeuKd=@>t;E z!;-!K=7oTFQ44_;PzVVPvR{S%Z?y)F+K`>=I&yod_5+PEc6i<5!}_1bMS=brJd*kh z+8JV@CM?Y+tmS$vgrtd6tjmr=5ogMeyLLe${&zlhWO7EJw&4!b+ooq=&5!{)(80a9 zc(ax<`LC8s{8ljTuzPK^)F_s5`&iK0t|nYi_j!mB`Z{}}{-*IL)T;C&%@m}9b<>DM-LQQa5bfE;yeOsa59ZU zVT>9m89I;Sw|q}?+-U0C*yAp6jdH@d&;`*Vw8sixXz*Wp`di8dS}C)8JJrl9(sF@@ zojcb(p@gQ-B^Q2}i@wT|jcAnf@$G)Evf5hSkIVAD=}yMT)mq!YkKLHIL}{>}}!$DnXP9qXl+&mA+(1US!`@o!jM6g=s7 zPa03cyrJlSm4={>V{1gi1#J`gD9^Id)sg;IS^Et)c`?`|(4 zh6?o1m5pbu_`I+gSGc>&KvN@fGD~a@WbJ zQ!lVNAX7$M9eHhwD~U&NOnr<;v}`Z}Pw&thml~bx|c6G?jz}E^ZT=NZmiE-WnQymF1j1K+)qGT>b zxKZjVxL(mOO{`o0>=M4to9Nd_GjYv;aS>GCpX~b+wzp_avi}i$e;_=P7mC?4&4EtV>hamuR#Y)mS)+EFT$Olzco`F_)Y^G0Ie~Um7B`M*C+t@rt2i zBCxUFu15p!pT5|_voDk-DOAS3;3|8BQVb4B({`suvH8}{FPWUrQH(~2plK7nUlUPi z>Fn;HPu-q{C*b1=PAqvNyRQH=7d_nDhwqGUqD0cQe8f3}WeazERgl?v5R*PtB1>Wb ztRd!O@cUyhF81j$gLC(}z&Pl?*fwyOxBJIGKSC>$l)G6AC}oeJ{#-^Xc(?dGoV-6G z%HMSg!5i$aCrB*1X4MS5Hv^T{)n5+wR{h>v$Gbs9**ZE}uS-Kin84&nRA#BRhbsNo z!K*oK}6DpzvEP{1aKs&R6wVjv~r!-g~gWJ(2XFKKz`MKt#i9? z(A2jyhOtpNWM(kN`fGL)$9qQU*u)SRLu9&vT&i7QQZG%CR7xUFw2(U5)GB|Ek(C3e zJp(*rTUafWDM7#2v5Yblf8H~MaSUj$PSk z`@Zh2m$;$fzZo;gk0GInapvpbtTo~Ns>gC<)iHE^Yhmd>Vego7Qy)G%2yyAOZ3hk; zp2D88+dSQ~sdejL&sV?yADYf8s?COL+J)lo?gV#tcQ5Yl?(XjH#R>!{?rz21-Q5cm zclh(X-};YolC^S@J9}r(%rz+sJzWpTyk)gf&MU-ty{0&v@yD{8#>bb)$+?1&20EsH zce%TczD*c3yEU^1XH~Fr zT>j!R?Ri;T@H^V{E`6N2q%Jl`h#yj*9a|*s{nyXry<*VzI+vcAF(dfuxqTzVaDMz% z#?|s@+Szy4&;xZZD&K_L=x3jIX4(j2jQmZSp^I65i+sRB+SNAx=4_XWN&l6r*Zmxs zNr9sCx3nRws3t01o`oTJRl-~zl%h9ASjY4n4gW}SSNm{#t-jH5d>O8Q(|gNu{r`58 zg8z0CGAP)rKKsxM#~ra%k$rNrIErDN1qut5?*cJo{GNQ|^OKW;85t{mSGOv*GQIR` z5HyJ3;VN)P_r0f&*Qu!N z+Is0Lp@lj68{7#CMuYj877FVnHooP|YAeNHARNn9D z_pb|BK40~|e8=kNyh}(_LzCkgPHL{Yz!@iEOC+*<{Pb2-RDXWG4*b5Lb293S%-S44 zoZ0(4B_M-A>ga%=oikihj}_L~3Pwrbu1lTGQ5hX)u|Ef$9r)Dkrh`vCGD4X#VJI-g zC3pwu;p|d};l&d^e?J8~w^? z;J3)Cno+1$wL(uw3?a?uFN4s)DKMm=F&FEcp%*ChZ|g*jijc-@e^vKc)F|jnAWEjP zYv2-PO^J4fTXW4}nZW8u$2Duw_v4trCv$}H7FMTTakjOs8DFH%fV~siGMxYA$*q** z&X;-{MU>@mefZ(KkWc*^cz>$O$k(dI#O|DV%>vFXz%lJs^8TiF0V|S5b#n` zw&(F3R?uZ<;LFQnCpog1{3b^-q<&|;uG;$|i_5(qD!#7I?8n7*eTzktciOrDX+Kz% z-`nfU*Yol5$`p%`^z}gH440O!SHvLCOUA3ueRc2qGW>{1^}-YT*W*yqId@1x*}wHO z4($0pn#5A^^+(L%XQY0uFixYtL9bFjFp(Zg6qaY0*gEK3_5Sa-9jkVRE3S8VRYAn{ zEm`MI6bA*1RD~-ejy~w}Ii+Ox73}C%(jp^x1YKKrH(-Dt-Y$phwRssJBTDn{#=k(L zG8`oYAmbyO{oW2W!_yQlYi#!#k_=gpuF`)2@U@o|r*=0rEM!HXHDfiiCy@L`UE)Ll zE%0y1JW{0fVc^YfS+Xq=OPNebfrm+?{WIK{`N; z9i2ii8+MHThN_2WVTJ+o5-n24do#NYK2S@TO0lD`t6Gr>E7Bk=?rsr98);iULnU3- zA**)QCzirH*JNUO>Vx+B@=8}t%mcXahN&yeV9Z0g0AiXs<8=>y7arI{H~7-d{lchC zw=8SPNUw{}t#TPj6bwNCy0pS^n;}jZ3Mq8W zntT$DaQ~~5>TaJd$z+^k#>>NjU_SO*Ogj6T-YCpvfx@TQr5;rHB>u|(131;l+v@qY z`dh(_fzv^mHa>XnbQ(+eXNwMu{OaZ%1}_Zrfhl*s90`R6+`N)thA@7LIJyL>Lvf!) z_jGpKP*FmAC%Ou}-@3EBxpjQ~Eez;(^FkMEr=) z=kA`(E{|^@^@Qn%w%*}1wTYcSx^hJlHn8|QB88jxdp~0_QVx57 zI0h>Rnv*y%|4b{?@KT^@gSXUqkJVDCcXUJO{WP$7nZ544Zup~$K3p|bHC3;>t-Yf5tj=j{^4y|3)T8yb30V%ySSb__#TbpWrEVZweeO;w4 z-!qS9dzD^K3`eanuEzhq!XCdsw{?oY5?c)d#eVA3sNw=-=BGT;%F!E45z4=LUGts+g)C&& zk5`~0%GC^D8F#E-;yt-hX_`iwL)WT<#s*yHuzkRZNkcMUgo53HWe=_ zr-fdDpSLm~L(Gsh`7un^MA6kUc&4QPXRE?>hbbWJ>2voxyC$cW&m%z(3QeI2Le^Cq zDj9_)FY4p}QriHztG6B{i=N`E9$%jh--J9<&&Oc{ZY*dCG%^u%euP*cb!t-;OsrcJ zC8mg>aX5tzl5Qkn%I`YNln@Ms;3gRqtzd9iMkKUvPv7cdyIJ_2<`xzfJUzD_Y9{ZA zYb!u3-VRF-PicCbhxpUe3Lnj$Do?e5ou{`C9=PO(pvP|U3$-a@2I=U3dM3uOO~Zq* z+V(dtHe3@M-zyP0WB!CV5msS9uyz}I)l1@rj&4^0WH&55!;y4N%ZEsFD2+e+#L^O! zR5$c2ZO>@w4BIE=40)$$_+47F&B2mTQ?zZZ^9(I6Zh4tL0%!hdTXUm{6L2~8PSz1X z+fkr4w#m0M_IG~w##SM_J*#uCZPBr{))t$>6W>77NmG0!3>c|4j`8-gZ^HNUY z9gp0NEvxJjq!GD>%g|>48-`0(b`Hn)wEuE3B>G$Zv@87MDBu~6d`u`CEet23V*AhX z!ZxnP{`Qpo$@#B;@gT>*5!Z^g7D9Q(?P#+P2+6jA&P!>np6m=yN*H!wT7;!KKEM%^ zd;45hV9Cb3=Z+5U7BI89_2D^WV`;{jP*abm>O+;cXvESXLQ`> z!vhp$+4VwMBB)oVC<-*kE<9vo;90ZvI^$Y}ZRLu{3EDelGe`)XtnHnEiR4>uMBj0O z6Q=S9WqOBxV}FcieEgOExHxZRdqDFE9nJroc_i2Jsg?;HO%LExaa6Al$kFSqE)Nwc zK(vu_4BSj1!QW>hSPqcQdx@uu{LNMGI9HdNj#iE+SMWjmC>d&G96bs`9KlOy@DTj- zTfeE+zwIApG1aJ3MqK?ov<2Yj3|3- z-V4rYr6y#77h6Y=GJtF>t6KZa(zWT!D$RHl5O?)P>#_tpaR?8_#4GAoe1%t|A%3;>a*`9t09k_m^3)i!&YR(I9y1y9CpYOVn z+?MkUVrAz=c*wSDG97mS>nkT<8D#;hI^k`~N(@Swfbkj9ZURmu7UTHKUy4AE_9Jit zq4B??IOymSpX*9ryN($vMId3!81u*%zFosXSw+Ls`f>o+%@& z6YK+F+WaJvlz7*ZJd%mis=T|VKkK}C_u6CCt2j4JG4tJgA6vH!a-i0SjRh!DS+(OZ z=+BZ~N)VAaAY_1AkGE zI}oRf1DuqMV8j~vb)&)F*k?H}g&tg@aSfm->bFCcI_7pM`z`;(trfqO{Ux{0T~AVK z81$G<#oNb0(Li7YbAV&OV2EyatjDW>6b#r9qaD`Sz~obee|#Ui9gH;>+i6E_#3EE- z-;ynah4CUbTQbY|IDIo}D&_^wHm}ScC(P z`XVb%Jr1`_?$;@`@t9;2!Pw*&`sftiQTl}%^JMP{Q4AFl8l$>(w_C)~@9-3&a3a3+ zB((P}%+My3s-z#c{KLdN;G#ctw-1-fW|++(4qPI$KsKrrGTS+=22oG~W62YSjj{Lz z!GJ=TOJ}RlW7zp+J5g}By!S=<7Frgjth+|b_56WC@QF!qV5stff0z5vk?oJ0(&>FL z*!L=X_u_WcW}}MH??NwNppQaI0K~D=?X-!-==LZcR%GQH!I=oR`I1 ziS4rwO3{)kRIlJnwkI1>PI)2{93OB^g&>nO7dS-BTpn`&tCQ_zpPFqkn3&gA@OsXB z!Ii;nBG94`OHhKQP+eZF$ z7>PJCq2~1}HfWb*o~nrMLXFM#u>be?IY+Vp%(o?0XKvlfW-Ikh&3a%+sncaaL&>I@ zSGH6ZZNwQQYIny$(yb51eOsp}ml=zsj_J6#_pj}&Rvh}}a2&nNonWWww63rGyEi_x ziaZoWLOHWZ`t35ob3<2hWO<1+CQSw4Z`}HE=lOZ<1Gkmmn)=GN{C!tl-TiAboGOc&~7$F}`r zd4C|XK5sRK9r0RzU0Sa3HvWlVj>Fxc>5;-z7_yQi$~yYD^MZpN zaH6Yc&@)L+?3+RrcoT_|FRs(KW;o&ccsIiwLPk8iTd}y#w!5Bdq}{?oMZ_=eV1hw7 zMBm*pdcK56lum@-|KkQCxH8H=Q;%`t^bkjt&2(~lTKQ)lkXgToSx0=o;o()?;I(-t zf*Opzq!Y>M+|eI-Xl+h^Lp^`skUY}++4TD4EbtD4O-6co>MBRu72ojwj~A9b!-R8` zuUicCXBjc65SL7)h6okvTJDH{fmc@h8BNdUOkm~|iP`W3a8M_Wq(K0fv5|?r2-nHU zf=`7)W&gIgu>~ERpmX-i7v(h{Lz*cEY1AFz5^cpxo8Sm_k;@uqDoQ2F!`F=fXxyU` ztcF7sD*THTQb!~Ye+n+4#miaLBvhF&i~s>4ejV{V0BpxOx}VY$KCyaE885lSzyaka z)(S0$1$M@b+q$GC%r?~>f3Nypvn6NSSG4mX#3Yx%vY~+)OU7@z=wx}8YKWzt)-`S; z8rbqfKUt-Gv-h!1ZJ$?)6gv1pk)Q>Gs_&3__dx2$J-4dn$q^M&5)@T(;03EI&KuCc92x60TLd z><e^(Aq?FPP>&f4*h$dq=&SMgJ8?6)NZ(>yTa%X#+R2d4j{|0M=6bpwm;wbC81f zJ$=pkA0o#gf2sf`h5WMqBv(b>s)-)f+b^Rm@8U#6t6Gr1iY!YgrT4j zwmQhI{nB01zecy!s&d$s83L-X$Cdt4dx|VxVu>b~0g|S`Cfi0;m#7<-VK#Nh*4b5$ z$!j?6`krVryvTPuVTKP;qDFJr$;Yws@D03O=ai~Z-@ae0Xd#GEj>MeCvsU;khG`RD z{E4kp*Dwre_b$*#`GL<+m=nQJ>Fkcqlni6~2Qaui8$%ABZLGWW16rST!Mg@lZo3qs z5(SM)cW}@^_k}zPUzb}82~(;ZcPjmy_h8(ZR!Ff3owl0RTS#h|>F-(rXS6Vk*@gu} z^Cj)E4=GAqB>`91pvbQ}X_8<*(QzDG=`?9|r6Q?xirjpd!h0=bu9`wg{r9nfT^<3r z@@c!v%?{(z$^YB>hW@wpv8`S;+ijjb;G1^5&=STaBs8?QhhtRePQR1}m!|9Erz+B` z{M0WAiDv=9MM2F`Dzf}copP6Rl{Tl%Pgd2Qm)F0*UJOFFnGqHmHuR%kJUyH?aeqD0 zniGtGd8D$oHZj$Ud5J4G+3NJFK&^99aw!;}QsIiPd?uwBcY9E8++ny2saVv)$$kJQ z18B2FE&?k3H+&s7YZ^*gg&rFz9#ZLA`TT$Iy>0LhcEYc7_ms2GqmJvgnQ7U=)>jRa zy5|9@(omjdS@xdeq|IFthIWrV0>&XRmV>kS6UJ-jv=ETx0hM#Y1g{CaO4kd^LeUfgLY_%lvhGhnSm}MURp_BysXS2- z^}~~Ey8EVg>HNZFzxb))c50>EQhykwQ#M=IR(k=pcznpw@~_s)8Bxr2lTVr(t2C1s zkKMd9*)R(CvRh*m?^FCojY4*^^)Vb#^Chb`c{ZG_G`z;D8Y&yF$mb}52_TXBXkOM> zG-z3T2@2nmsm|R#`4=wp=e>7Uwuvlw03M?qn5SLb<{XV80lv9Kk95=FZG9wB5jUG? zwe~TnWDjiY91E)L;y~!naKE~VZML)Q7%|H2UZz1R0`nST)C-h|c^7&{mEZK=DpNhE`#b zYo+YpEetN2#PBTtT#6yZhfz$=_$k{>%Nek$$XVupIrUKjdrI=}Mxl%di@YGYvWKDn z5mcS>35wgyH4MmSlm2(b;EN%pxnmT)-o2c$C0W50_Za`-nMUhemHiXX)U;T<5)%dD zC%1#UJqurP2BA8roP0}VWqhq#^0!7MDBcW0Mu9dr>r&Z`V~i2On#v>))r;@X({n&Kmd!tc!Y=C~KH1ZK579ad; zX?RX$>yS>f@a6O4EyC-mKVo==(>Z7Z>6Jr^(|yo_ps>2I3c{FiDyUw$-(}TIm6lS! z0Ci`mMbxf49qQP^Z=BbH0d78BCR&wtcAQsUORQ;$B-*5gW}wP#jDoVcu1(R09yYnh zp;uG5Mc{W;20nMs%;+EtGEq)H(~8_Hx2tMTT~Rs==eieRQ$9Ie8g1G10X0Dd6RJOR3tO5c(I^2}{g3`-UD`*#SiZ}^ z+cHeWvj#6eOMhr}yyyVII-_Q3p06?#dwKjp%_!Sqf0n-B=j?gb7LxN8Qp=P@g;sYfB@=8zXhq9tO(EcvJ73{LvrD z`sc!qU2B?(Qs2}RYlV^xzC;d9jmdwzMqpr?GHK;gTUE7Eo_29cGS#}~0Zo-xM9)ab|3?D7AZ>7O`~F126b zpka@;=*$XvI!2=6@bk!|#KFYDeiLj^2a~ohe(`{_1dqDUo}uZ(NQ(__cuW6xQ$P{h#6^(F<_nwtcAvM3^QfwLue3As=t2kd zW+^xSy<}rtJv8x*W6K@z&S>C$1OlIu!xZ&xSY@gxuIKNw!>qc&hH@u3=eq6I)z^zO zu9?}{#hKJcp~P6Q8JPhRS(3&M>#R|e9(T2y$D$V1X2(>{B93%o)4*5UJJq9GT3czb zVgX}UkB?85QbTjK!sn|MP0RK!A|9~GTi@@t#Dh?*IjDA?q7Sn47{zdgI~#mdnh`)Q zdi|YWEr?{hRn4H}aplq}8gbsZa{19DMNCo7Uqe27g|}u^)C!$yk223!vgV3QN);c& zCv>J(Tf_Clv@^}=zwQLrWx}}P`EIjsc@L>fAL4S34<#ScKSl2Tt~>^G;e-Ej>s6yj=5 zTkY*l7%nC;U)1bwa0+UPNoZy~9)GcQ1@$PNJ#!?)K@-RJ98khijMY*vVXod7a@>|< zE+$PGJ`k7LH-@EbkYNXEAgpii3>Mw@@s`Y($YtR<#}?&u<>=}XZ4dcf3i}h)7(?Zo zO}`6yK}sbD~S1d5iumJiQv&rPJXh6aowU+DOuuryk4(7`c^y_}Z&6-jzCW(z3q z2*QIB7Z~lw$HE*HZX)m^IlaFJB{Z!{3WJ5Gops#Wx{pfCMmgm7LOU-@BqT65M8tGBlBq6+7`W_bO=<~SLRtQ^YFg>h(u!VHSW$p?C@nH5pLI`gaI!tMRF^H7Fnghfl9}`mKcF!kNSN+Rq>)&iS9EN6;SkxjnKhRVNMxz z^9~@~&sc}auGx>rX^#M<)P!j&;#xNL{i4L6LJM?H@)NQO3)BMuz!a=x4(-{q@pX*XPNR)- zH%gt_wsVUAdC=NPb>T1;ZN~zTAb;Ff$7Ii1+&izfGOZn z+u;4(c9VjzLDtwbJ{{_e*Gx(>dqd}7asnPB@OlPENDbJqxO>EuU!q;x_oI_G8fypt`ASRloy+?4g)rW<}VcOnxCwt1Uh7@FS>LAPRa zdVMAu?tTj~+1Xuh`N>{eZBpGQMi$m58w`8kkuiA*Qf(kB$@kMQ07r<+{aDSvhQhAN z(n75@e&<%tyAf7NKZuXL+_iZZq-2(8;S{>LUH@u0yFkE(iV!!Yz1XrxRW(?k#+4Hm56Gs`ck|P$OWx&y<%ld#Q2?2IL z;ZfuqY;)ao3T(TgXgMPeDs3|cY%m6RE#;V&2x??effN$SH{De4Qo(o|AwU}7Dzkmgz;RTU(`0_ z#c8p|iZ;QfX)M+W?jFr@d&yhr{vuUh1c7Wo2a2J6>iiR9ghA&JmXWnsW`}~Q@T*qfqXQP?sfzFH9Ch`7m>oTS& z2y{mT%AeecKunQz&Xbf(>XMo}tn@Syi!>CNTP0On^#*N=EI?IPdcJ+w&PbVNL+=oNsrWL`<=mqpER({9f(wZW(EFHe;GL`XR1oY34J6; zbJ0rFSv-J9ol)^~OX$yybh(~Z8w4>F0ZatOi$3VDJ!)W(53t{+Z0lCHs)9d zY$sed(gmB_M_Y@NW107RSug~pTjUnwf8mz&?d}b!V=-16SDTB!Ji~+)*NH^A6OPNR z;Ibt-4!^IdGNJM!A)4Z_K*8#D`@~mj){<6Hl=; zIQSi~*7{$W<4u@fspHCejC27u`JPlqOh$8gr?=u^^IvXl&AO_-`jq?*uLb<>pChZ% z?l|YK+dtPidTw7wLI8?+S8cuC>1OU-V5a%{jS64JiBXOS-oFc; za@w&{V*Fg~-D{iXP zr~9YZO=4IjFnu4G@u*qj@4c5~4ME^003him=)b9>lo{{{uGa|-eIoKX{~-3izSiUZ zcrDBO^5UueRwV)xeXcwfR!z&bnKhr9_-}Sp>sRsV5df~nhA>h^R|<}WA>0qBTq9p= z*fX45H|^zN=Gm(oIxYQPj6T;t{QCD*uJXK_*!S?uL(W8?!{k$0wWhN=p7lU?WHcfE zM@OgE9(khBP49F!>&^R#q0htJlt^}fBXnLFyR3=m_a5o*&3U0odKdOAMl8cc8~zb! z0Dr7MSB?T~lQQ`KQ?pZXQdoB&aex4?vP1c69~Jx*WT22DTsZ%O&v#RLXS-zmvCh-C z-eScwDl*&v&dtobK%R%soa6#yBiE6wXaJ?IehVZzd#6Bew3g45&UaDmA{ z`C69}&H8ym$O4R5HTs@k6J{!EhKUzC$ z#r#f42nyv>+-UZ63(XPNpPYzuAT?P90-r3A1U@H(z?}B_d+!@7;{)rPTmHd+y5&cp zS<%(8sz+e}#TcSt8wJ@S8@vKI^K%7Wm5zx&I=|S0x<7T%Ctl{)(&a2E;azdD?E2%} z7SbZAx6Q3l6GYpPDChKQ?Nk_TEz+TJ3#|BO#0^ko<}Yc(^^tMcey4IIS%s5C!sCFcdpkPD|J>92RO|G`yT&Y~Fnkm*R%|9jMN@UanP| zN)dOwjhK^)nOmn$oG|X%rFqYeu^zo%UNkCw*3& zxk||Z{Fo@Lp}4B>U+v;$D&Oz*(7|%S-g-$87*c;UmUqbD#!}61X3MUI&}EJ?F*a2E zp^g@1HYMx_0I_J6H8m47rmLNgN-)F1-UZqZ+VRQ1J}xw|xor@OO;gRvNL7dKVSRzm&CHUuyIJ$>$A9pWuqO`oj0PDmmb`& z=8->6hr_3y0uL5uj*z)@q-Uf~acmJNVe2VHUc6iOu}X>?b6@wK2&V2i{=XLh_sQwF z*WvsYn=_+!}0@6ZDu5ZaCp5`{T0T+S78 z0}=d!!DCT(1=UuKe|f>^+0KY=xyhp_6Y0DX@cs)C?(Y_zs)bO=q(SYI&2>`P%Tt&AhA4ga`9gX#$T4 zgDIO-4OSUtKxOCE%a@7k$9pedrQWreaf!@U=}B@!Q2Ps>-9AJiAX!?BODbXJ-yoBJ z?%!a9VM&rd&VKwo}>-|=<9Q9!mxTY2|z1gP)fc#}Fj3H*#&98fo$)MSz(O^)a#nk1Dn zh$p1mpZ$oc5)4_)p)63^qFvI^qTt>wYu_lU2VWl_HZK{gT|BRcK7aT3*FS2wA#=id zjT#nS_5LO8b6s=Ea1)i%6)}9O^6^7LTJw$z7eYPKAMsE(Tn3;HsjI$dvW)56lPUa4 z2w7!Wv}0ugr#k{Cf64Szyu3B^8ONQtlqRe^t5?HLK8i?pE z>wwsAD`0Er&+;4Nv=IGD_U7)DbHhok;8HMlI3j2}O~lE|;^4Onsvx|brK@ppou2XJ z18#v($h0@TVaK3PqlgIuUsz>_gV>+`s0UIk*<+b@|rP_*wZtyA^-9ozi-6`(9)v(=lU!f%#rmgpE2@J zYD_Y>+1Y%$O34~^dp4PkyfVTlLX5y^6Soma~;U;Jm86KS*=0{Cb(+zV0zX|G)s^&N2J!gkAT*KP`&9u+n9<8RSz{#fWx;_PK8h%bY5X!2DgAHMq>mS# z%N=al(l9h2#D37j+P#sFls(@69#9i5kS6B|b_IdkxZ=YXdWl3+9B<*`k^-V%L$t`z zc46MP)N;K6*@Rn`J-++#kv4aKUl);0nRYWpI8_t^0_6n@q-Z1vuGP$5V)Qbz zOWB@6MaLd#bgg2uf14+N%{02LN4u7SwFz3+n*eIfDfnUmA)yF6M9o`^Wz!0N@>pLJMd>u{)~5O96BXB26= zB^_Nu$NgAbjE;2;O$sGC`gW(ABWT z1fMQ?rIe}t%IAa4bAgwg=#M4h-@!**vz+}_HwXPLAr<2?xYO_td{zO9XarOfzyp@j zO^1YO2dyIR{rK8Ifo_cvR9%>3R-UFDMKtPN7D%tB-$dJ;@)VwHPrA zIPy)`Tka(vQ08Rj;2WzV3N2YoYn#Uvfr|9vFnel1M&i*3H57|tqhwQ4MBqJ%jUSrp z2d#`Lel`sWVWO8E_zu41Vmb`u!LkY$tb+Y0RZLZLmR-i_Dt~bODYMC-*3S*~+$HIF zE;h%J(ex^|DFVORC)p>WL}!mIU#%z1``zva!Z~E$rpR?_Z?IuN3`gRNM8OR z?}#lTLAERlo+y@=?=P)AEwXVic6CiJ4>^(mrNmAPydU2wG%7h#9vvIj#IFB60IwrhW1xMEuAJ7t*a8svZQZ=3<#+C$L?o;T~2j!82o zEW=3vi6F&jI%@4U1 z+i&5`Kh=gD>or=JSghNx{7B{Ktc>hLi&TqbdEiXZfznTM($Ps+rtG|P+zCpc!fB9( zVmw@vlcD**p9pH5M1j!X2V#F@6zOUwJdztg(b&J9TxxzpGs$zOBuftj8L(`MOhVgPq9EIH0O4S%bP36L5m*_vgmwoL3%KH3es``FM!%ee8AFq+LhtL@ zVyZw%o~xNt0HxL9YES)Wx)9GuNi(Y_9dY=dRv=LHr0em6U5~pJ{o8uVZk(A_mFCN> zYOU(_W>FL{VK1g}d~bqo^RAGlKbORAjWL=m4N#u}Ax8k9Z`H}=3q;+pabMAA(0nm^ z7U}mvCk|eriQUq$i%PIzk`|Lmzb@=YLB&7Mac5n#!!xpFu&JCJKFL3syk06l$BCCn z$@s_<*@cfp2%%4@l3yZvlVFA?on20PXq?<~iX%WkX_hiz>>>m0rQr zmBUyZ6-UGXms9G+G4c(~2oi=9HNFW4R4!aJv&-O3IWlk*Ye$2d*mCo-imgSgN}`iu z;+B6CnV_WCXmySgYw1qBNLT2hV?=j_=JCEYsL}5M!AXrZG;u2-H>vz$5+($~Wn#$5 ze-H2+9^q%ba&|OGcuf^r7qioAjGPX0QtF22CC~YR5MO&v!y*~CpwqUSfD=I#IjU?B z22S!PmNXr#j*jskk4BM$TaLvS$SARf1Tn=XSW(hG_hjkZ8|zJz3>8X?{l4$Huczdv zOx=ACO#ZPp;6qi3KQ7@cd2Keb*e^hu@f{aqeUHAF|34h##$efyV(EZo9q{tplr-xz zn{H*12(aaw1>f8`Yin!xQsXS2nWo`e^CoXxYetwMiZAI$Aq;G(k=P-qTK%r!Rwe_J z%B7SG(V(=$Mo=}Gl*+^gUl>YC#EFq<9ua##r0uIEIDL)FshcT1{qTBINA`tqS_(%- zOY;q3tKEP5u}KsXX#N_qcIi{ZvqXSqWT^j&`xtfuPAX9FtHq9o;+Gq3@a38X^cHb% z%ZJ&5EN>!rH6)#*#{1ur-_k=IY1hYw+(Tm}JX2K?b9yy!etU zH6c!+_ExE~1FHi?%gHREyIxvE`a~@M`zpZ{u~(GsPM7Rz95pwiXW$_zr4qqmc;FWl zw6jXO_(?}8;w+`N+uKh%NZfKKNIN|pi~Sy&v=lri4v!!>~~?gdbNo)cs-Crj1Y)r~O&6 z{l)~w(5i`ouYkq@MgxJ1rB&6Y5qY%r&oF6Q1Sh?hL6skJDeR3>L8gU9{uxC4SJjEU~?#)X}vLDr-`=gLsd(M@wHSv*g_VpndQ76q|24JaudzHLY>t0jNOfWW90wu+!Zee1`mCa6l%vYiznM29v)WU1>`HkYyb8IbQN z=o#+ip4zXb;U%H|qlX>_qJj~IiSjqs^gg7!+4d0GoN}r?Iyy}}+cn8!ea?G>&Gzm63yC`Qe_pdsRuk#*cZ$IcTxJg!X;5YBI=i%o zn_Jq{)Km)|DFq~Nx*snmP-Nr0nfP+4G=O4=1YhAb!1CquGTd02^P;$U=;@rrz&HZ}hRo(*5S= zYIv20$YzzjL2C8*O7wJ593Tn|-1?Y6Ak%ovY1w%XUGCoD4_)tEX(H|EG-~?M55yQU zkg9IxRF~4y($?F3PW(XOytr#-`l3<#SPwkB@>Ozja>#ANE1F^4%c$I>&;z1i#2fLW zTK&qfnihJH+I&M78c!5_6#V@6V)^{nQ3E$yAgT<|yo7k@^AlvIjR8+V-4bkZ^ZmCt z<|!@DH!);c!9A>Fo>$4l;PMq%vH&g|!3xGM{Gv^=OX_RS|F1_5f$k z_w1YA*j2kO3L5d)ezq;a+o;TYoKnd;*#={*Ki|xUedjgDuX-zb23u-fFT))%tc{IZ`fsN4I_fgt zV4T!nlloWP2=ha~oo6z+3c$i{JSH3HDS-2@lvpgthK@gsN{9E)H_!P2 z$cqOVhqnm@nSv}9_t%%?2yPp`(Nm$C;zD2VL;kFmZ2gF4G0ROG)pb-G(+bX{VLdVb zO_{qw1}?H-A>^7=!Z%jW@Q9W%$U#1HKzS^o?Kn#ebNbUhC**< zHvWzr%|T{E&k@iY(0uc?I(Rtke@iS>H7ARiTfg2M|E8dCUU7sc0q{O6qz7;UV8lYG zMPCFfK7Rep6Q+(v4beye0uiu$q^t7sIlZzGRQ_sh^NJe?P4fBSu>GGt=>T#O^opMn zr}e4>)wBNK#9mY|(ky7Vs=&?Mb#P{Ivvk^#b)Qn;KjOPR=@ju^^PN@$n{P^@CwL|s z`J&S2c_65q-lvLpe?eE<3iVsm2CO@-lgyhYEm_s}epD&6HojjrS-gxgX2%wKlCV%BIQckWqqldM{jCQDmI@-^9n>l9_{o0I2wU?)Z+X3Cd7!^&5}NT4{=)i89~(^MBtxe0x66>=`6} zzb-hgiM%T1=81742(gepdd1W1b;oPe>r)kkTv4d()9MuSqlT>cGYs3Wd{|OM0)V%~ zauUeQZns|6U}CY)s~JB&c4!H+-!ECB#MRLfwe3^>9j6rF_y3rBtEe{EE?T!xpg@5J zcXxNU;;zM^xVsd0x8Ux@onpaVf){ry?ocQYoRe?=dyjGMbD3nVcg;DU3A|oKil0{E z;1K;idd?S~g-&BBUFn#r+uJpywsYA?wZ)FuF%s;Yr%_g^q(?pG{>?7ZCK5&vqha}V z6atX<_`)~a68@uZ+fGf^IHfLx?h2ZJK!pRCBJCnF!d({XDtBGE6#1lt{}PU*5&kW0 zP;g=py|FV`v(Td3?&Iw&Xpq4sCz~2-4S6l1<;RI(v4N$hcVo6Uttq8uGQl9%$99FK zm>x`F!3bVtN0hVYaxbnt$s8g8Dvf2`=TQ;g>(@KDPwpt97vX4<^EvOcSX$A@)ftS~ zJ9rd~hJh35q-^|<-G3ku+T5l|DMFt?1jeWg-};W>2wVFIN*M9+2`!i_ikGty|8&Ib zHb;~}Nv@(%p6=YB4y0A)oK3Nx+;V`T6slScg#EaKE%E#sfNW{Uwh7j7SZ&bI#7<^v zD*CvI&^Ob6Cul`oT%@*c5hf6f>i2hhK$%))C2T?b(Pa+to2K ze;e1#6b@L{7d3n)L&u{>90b@Sio@_?2L5z$c3H=9hU0rp1s*4swX(qeXTgC=ix+19 zO{0FplF^GIOq_LlgvvFz%*@Q61}xvU>P&&dE<{4p&+n_g^JHU<&mC8uSN;l@AZ_jC zx#u5{+w;&Yau{(kL=07=2=_P>u4>Vl|@emhW=Z^JX|@Xx+aIP3U+Q?VRMt>lf0uGg(Em4&Jd3V`V5O(ribo5(UYu8(&&&Zy~X|dRzP}Ens=h|f=pP8pE z_wLm+1Ph}MV*2?&;04c;U@hUU;OC@xthIB2pzqY7XKdtsTzUrnhx~AC^q;mxnzT3^ z%$J39K2S3Pq+N5O>X|c zywmUVP!^MCa zFB(8v;D5(dO=GD+N5SNPqGVTDSgEfdfd>Sb6Gf_54&5&B$$Vk1clHZzc)n-j5RKqX zHp!U;i*KN;8tCsXiuy+%uOY*qBz^lWEX-O9LPAg3(gG^YX^x0-u(whm*~pU%$`@%N z%2RL}iko9MZtjske&0>AbdZTQwolIQn9tbSU^4YVZr3H(wgD{K!nw%a_L*3c_-9s{ zK``N9aGhAxh5WNz$mwOrTsx(qs&`=uNoOmu)(1Dv)JCaOT$XwvUb#B-`j(}>Cz88L zbf{p$Sx2-sER+>Tkd&PHu_-fl*+x&o(LT2{O-idcF>4imjQc0T=sb%fJ+!ONC zU)WOVul3C+n8k|1USZeWO_@2^>4t$RJ|KBF)3C!^p|@d$g&&joeH8lS$~IxvW}M_c zvgfDi#XO~^Xv^|I3^oCnBrqJRVyYJz|0+fU_X=N7+wkN7>?+?MKX2mZ9i6fuL1Aej z&S5VwWqy8{PP|J_b{nYOe^Lop0~*cui(P7TU9G@ z#joVn(eIHYiWJAE+|{6#+)YW*j6oV1mf|?IqCZ2Fa%GMh0BAA%?)9PCw4C6iAxAV=-jtWvBF9r#A(fr_u2KqgA)0 zr6@O&#soE|stNY#59uM}py^3z>aFSQ{ucc`M`PnFQ$uD2 z&-Kv*r2;vnc@hr2WtPGb#4a|PiRH(~``ZUAQ8Na=Hz*CGT7o2lA6#pmkRhi5vqW=J zV;0xr8hT3l${&Bl_De`QY(PiB9z_d@Lwr|POiY%Bh!iL{&<-_Al>EYA#oyrzl0xcF zy@?vc(N;G6v+_l#Z`7!(uQCT489qV0@N19GPd-C)$0A9a#-Za|ykgEhtg;yM5m!EV z(jE5>Wx^kLvsGF)+Svuy1AQ~WLxdPjT0 zT}1xw1?H%{gGn1t1pID$ANZ`^rV4g{Ij}u0gyI@?J6m4n8B_jiBK3`7v{GrfRnMa> z2*CK}cysiA)q6m@9T*Z`uKagSp**wq{R1TMid^LG*L$j&oA1g$;e@7h8|kg@!CGIR zZ@p`xTkwUf!p-#rB(Dr<3~!w|C}k^Ei}z$bVg23kF+ue@B^eTgadlelH(WI&l?og3O6E2HJk*r zf*~46-h0p9hg}9oZ`SO3W_vs|_C*|0C3~2ym=uwGvf@{O%y>h3BRaotk&eifR9dp> z+S=^1RO&8_^k$UxCi11L!J zDL%z*`4lllj)w&S$<~PkmgN@o2uTE;i~J~qzpWGsRom(fpJBVi+Q*LZ| z?|$bkxkX)(AX;cbvKOBdeq92-=m!4DwEFN#Za9g~&IV7S8}p5fY5yWfG@({ZC$3y5 z3@~|W4x9f1CX-T;&fEOWOy9!6E+zw-?Sm~=SG#qS{hE!3!i4vUxsMyiWSAKnvnRB& zhSIOVraJQ&?|#<@k@XtfPzyNVL!__QqHxW+99k%=>@5`^4J%Y#QvX3@DG@o(ntM1j zLb7-CwkS$bXD75hIL6RF|K-{vf}g`3lJI z^hbf)*n4}9sdw7V(uo}6+I&+Uth&JLU{Pg}%bG1=U!lcHa?Dh)c z^m}L(T!kYEfxQdgFWJPwq6xl!_KHl5u#1Aois{=JJxY$UUieod=P-jM1E? zl?mSuo?@$O3>f~6PSLC})NGOTr263Fe?@TkpiD3|l=W{v^g|%DjABpKIi>mNL{+~0 zXank!g4e+`i$fqbs}*ZAYy>6ZVVb#PBx~`YH-PY%7OBE1+kMS%83nVNm3#gommW+g zGGk>Gh<>H{Rx#WE{{OrHlJTY*#ZuJDO;+uXA!lMPWIu-;5tCr^Q!yzB0BL=$whVn0ePrGAF)s}9=|n{ zz4hbwE4hMAHv&4<(tWj3%L}YJN3o%kI^DiCH|*izp^m=pMdksGeEwEqHCJ&`YBC$j z*n#Wjo5JgNgm7+Z_jTkfxmP2o;~e@^96ufUOv7J0_gcCm<6=*Tg$y;>m823&0gvy` z(ldbbl`0qn=@HVX>XY`14vd=KtPOL7Jqx6bsR7FCn=0U2MhhQJfmX`GmV`oLJoN>A z$mRmeE4iG_`)wp`>BtCKav5(|WgyU#!qGz@GGc$y^HXz!GJ!y&gJkK7{F(Go7b0cY z8AZv@Iy2~9&MPQ;*ws!srItHd4T`mnz%WObgf0jGSijFw4x_pN*C5(xKol^ef?1u9 zq0+7fUH)fte|EgJ|(}UIcmEsUI-V;5KJ>QPCy{2{S`iGOXn3LKFPXrgt%@lr7r|Y^&u*K!D z1Xp1Y@iJv+P^lfAw!0m0`j5+Xp37BN`Fqbe>8n;K9Y>ef4J)+p>7I|@;#_zQHj`F>;&TxPIGj&K=?e)rl zdU{vurjI}9k16uyGOwHcUvMNV?!R^qtl=v4x_#cID&IB6vwuk-3JwHJZgv;K6H9iN z99yjVGD>sygd;1uM{kaJnG%V_WDD^s6GXF9W7*SM00R2?T9l?PHB(U z;Ucc#Zs`%~CkXK0Khb}oL~DVf+}*(STY3_#WA4yOJ;|0-qM`_5)Yc)i>E!>VIsD9^ zBkfA5shKgIy$+`FHNkoOoM(^R7k)@2OGU3qws&kM2V5XRH-bRRWBX=T&CG{P) zwD;{5^G#!Fmk-$tV;Zki144{(qu@@mQY?!JCszKwHT&Xz$pw(q_$^9Z6rXeSo2Bad zCwg;_(~LaCS}`ictCrU{c4s@C`8)y$8ilzd^@?Nd5#Wkh$BxLZWguQ1k-k-(#K{5W z>y$Ol9vKpAeL6Scd~<}$j%q40qp_~;y{&V}nmPy(9(Ij^+%g+4dy|;9kVy$fQ--aG z`P(gkO4z-=))?BMePoY6&JewbP|aPE6+(vOetKPqo*xFx2xC1__OYt%r>S%br9%5i zEEUBkjjsUKi!u$naXc9eNS1~=W-yHUf)(>Ud3hdgt^%`Gk631`!<%_e7YLNH?`Xt| zl{Sz84spobbs+OZ^KfIdRd%8~dPF%bf&K8I42)0FlyLC?IlT*~YyRAl#yJ+TNU7^?ogdx-}YJKO-Kvy!(WE8w(>>AjvVuM+wl>prSZs;Vi=&xDiQ;j6eYh zIDF0z0Bs5-LnvNgMEASi?!~`l-Id+~wwSiAhW`C?6m9+Vl=n+2W%g_Q$H~Vgppwe< z@iE+yilK8&>i%bMk>_)LL^45+fupT1#Q4Fj)ouejWJe~g)xdo~tioB>+patKUeQee zE4Tfxqw9u_!XL0u;m1n}a=}v!a%^QsIKs&2t5|MhQx0*r{Ta1$Jydj?M1ArIt&tVw z`>G<1eNOnHA*`)Ytltr20o3N?oYH4ACigW85sOfejrY8bUS(r9n)myV|l>?YM#sc{Dc*b!n0{) zb^OksNuq?w>4uiZ$@O2*GC8a1Mn^Jr5+0y)xBhgi6IR_(BjgXvrJ#SXtNX|A)g~K> zlM-g;FVA9+(WXumV8ZLZ0_6eBV*No-G7oH-sPFv$r1)(V=!4A{C3GO_DJg7bg+(rL z%Cb_+j@Y#SBx1893|dd_l^=QJohn~iH==kdnsP}SQ$)PL=ArN3lJaRijeH$ijgC9Q z?n1QZjh3Yd4Wzeb?cJ9p_h8;)eCd8o6VX}E4;1xnJ%I$CIM_KAltL#dPg&Sk`3Yqd z;QYd#_=da|>S?Fg(6}R&QlQU;7~C`&tTpW|i9)DsLf$}}aXr72Xj0QW&uhuV&%4gW z;$GCy^e@+&NG3pnid2&zd6qp)-3iyu@D`r2pG{WDV;?z34G_NB4TRg(8Ra znQp@0WPQ+mL4u2YZ9!A zBCx}YA|f;Qw-k%gF&=`e;CHuJUDI{T((|EUsN7Ogwo#TtwnX(0qF*7#oRoYcG3=pM z%51NQjvc0^dJQ^1DI=U_vF<#KQclEbAE8+IC|j$I55G*-k$ZBR?GvhBO49&H>{O)#D4L9M6~@_BH;hpa%HC5t|fVYj}>W3e@{ZNFY7Q;Vvf1{7o$be0A(d^&UvI_W%L zUfq*%y09a+KFy4XZWB=#U$9lw&KTnpQEmxy7Sad+`si43+t2Cri2c}O@QuZM`0U2V zJnAH1P{YKrXE9nz6&D_ZHd@C*&dXqZ5(L0P$Exi=e!vk2n|6wD;W+>E2Cq}v=XUUu z3f4Y`Y$2cXmPhBz+kI62NFI`2!!{8E1Z^Rd9_d;9G- z2(cg$4q?-xeW`H3>7?Ks=bj>|NZP;cQZs>fAOJTu7h$cj)F(}11NZlDm1o_3imSs6sD9u}U zp?s)#VasU`=qfc8TIFQGvV4~%Pen{WJ9x zfcgQ}j4a;0wZMZy*Mri+FNBLDHqXrZ4msJ~@z&~uOpA@`GDdyY}En~3~l+|BjCsMZqGEhzM7Cmxc zf5s}0CLy!H)F!JIYE0V-neI%{{8-7& znx#M=C2PgLTcd&59PPy?EAj*%V zZ2bhwTpDova7)aEQQ8V62q0H`I}qZ7^DOET5K)vF+GXBPk9&fPQq9wgAbFHM`pPoq zV?KI?$RL=5P+32bzXoAP>PXqgi_~kFpC111W0CTCCC=TF{3w?H`@*<#;0~*Oy$|Uw zh!lC-&xzC8d(;+vzY(>SW)ByG@NS#kuc+Bh@HQN9d}wHusJe9eh**2Ad|v+WHX)Dv>;{d<)$0D!mhpS2P#NB6Kg{bK7w^j8|k2{DYXaIw$IT z-uu3oVf0v9;Cs~Glo4q2eM4WJ#)n^G@Y1W31tqdMdNQqm2OU3r(JCyY5lB>?v=Tx#crow!A zH4&*K#ZH&!1W#1tLJfx%Sz%y*AZ3|HDyDASVMgog#>@SUHnjo zNa)2o_oy}~yWSpA!Eqal^!0?)`1}pOD~U**&K`iVRnu_$;@$JK%9>&aHg6_dUeMWA z68C=kUC_J{<`B=G#z9R_XWkfn1pRy7e+ia6X{D6(n3yl7XVRXX6m`iQ6n*wLcsiIa z3?5UDj|@EgnEO(!ZNtox6u9RnLrt0dxhuSuvL>ZkhGs}788j~Oq#Lp(a4^MjXb={# zkN27L8p)^HMcC|h-I)LIN92l*j;6UQ$CHStfVTKCS%1)JuYcE-*CxnYH?yIBd@OgBD5$1(T-lXpM;1e zP3F&2BB7X9yZ&cPD*A^1-;L~w9fgAa2^&3Hon`>4ZlOm#Etmxpn#Po)S2C7mIhtS0|jx_o30S9%V`)Yx(Rgqxj(KwA)vJb1|7A+(I z8d};)4TfgDS_c!Y&c|^b!4(Ayx`$EuuU^-B42t!nqP91Jdc`r=ec#9tC9RJz5` zPRi(_inG>~vPoqjzm_Kp0R8;cm-%X+lc`CrsMHfkYCER5B`u2jC<-#;>Fb6<$1MiS zYd**8`nlv93WIN=`l0e7hv)hy2|p__^3;0ctG@+XEwef!{ek9a!YtQaHTYTiz71^b zpq0AC%W5Vg-+Fw_)GS6*Mr^nc3yTVh3irlwV1O4)`?L(56pyGYWe)3W#LdQH1@Vh@ zcgKB$bSExJtR>fUk_1iMO=Sf~(wo6ykS`ei(R8Y49lI zcQTz%$wQVpB2w!N>TkwSVf$>49Li$uy^s55CVf@Vw}N-TUt`$bH@2(|WzPqjz5nsm zP0GoA>psFyiK$78Qf^Ci#}==2BzC~^eEhWI@OUFj-Y{VND(QkhOkgI+Kuv!wK%OUy zWcvJQT}#~(@$;Xf(viR-zi1l#a){Me`QR0DyQPc7bb6mUTpq-Johtbm9`@~toJn8)n+~KX<<=&=8g@PL?l-mHyKByp%M}jh(A_4&@rnQ5U2aZE?YVB z_l@sAN%y+84;t8}Ns4&dh_f2Y+tugiKQ9Q=%fZ0Ku_KQOiNBIVsAa}Xq10fI8b5IN z6J4h!EWskC?gHZltHRP_tJ5UVK8ojyv*+Ng3KZp_(xXV!aMPX4LI;Y8l00=;6!?e6 zy|B5wd>9q_Uz_Y>Dj_-)%3VAnTD2l9ZO)O2rjWb{=#ZU4rE)7isz;gRDfvVGSrC!Ueq^Eo7u43Uk7+^9q& z@22SYpbo8>0%;+v{kj!v)||=!iu&4Z3TOAoDp`mn?LbjM(8;D{B1b7CE!ko$vpP5? zQ*1|}Gl}h_B{V8S%>8uur)q5{cO(f^nAIcvloJ1ZK`W93N}TQs3x!g3AjFTj;r91N zxwXx_XmPk#o?U~1Ufz3)pKN=?^cqW77{#zH%jnKYcN7YIQ>wL{ZYV|X;S6a;pd2oq z>VseZSl=N9rl)_ojGEEW@lklPHtbR|;bZxbtT6H{dOn-vW+M5b@yrbkG&(|E3`jN7 z`mtDYTGY|f!|c8ka>}x*$VqaF%C(?{!9)vU*Fnh|Jta(~Tnqt1UIwspkw@(=Iq(YASAqOdY;8t*W|L_(%-Mnk`F z9^vRZfSa|JD(sgYrna9Z8eUoRp27RB>JOHM(SX^L2Ho_GtnD3yYdY0*W2}TcZC%$w=A9-eI-qqO(v_3qYhyXb&6iY z?Z!(rmbq!OCKeu)LSm}Q%G#5c&-3lt5$LkfKZu#q%jCp=p35ec_d;Gl?PK9hRdkyt z-L8J8Lj#Hq#k=V=G}r#5GW;tua{^FcbF~xMGOwB*CQ`p%b$AooRPde(ho^bWOGIeB z9~L>08I#YTNin+fO&q~)^RSK4!(%=E>;6fOMY`P`)$O=}$<+g1qs~wOCj+hBYO7u$ zw(o;-S<~pxPz3SEsQh^;8D_;9Njh9!(GG|d^YXHS}8P>bqqWw`j+sNXi`i}O^LQ4ZO%IsY4W9ZC`2RIJOx?$11Z41n0|&N zlB1#DPqo}xie(B0C56(SOK%sLuUlNJ>rD@%!6i~p!c*g^RhmU~Yv~MvF%$!AR53-t zI})!{{bbk^KUK@}3yy`TCtaBC`48L1>Rb`I6A1D)& z3z*y`!$MB7K6X_rQwG&Hp^S)mje+Q39l5H)E)qSOrmTAZ66o}cK7_v~2HvOy05b{# zIj{3|?I;E5yRR|kNAL}su)O4J)#(Z~1m0mn%qvjv5>LBTp^ z&B~|~GfS%JI7-QS1YcQLo0=QNb?GU{E1*kvX4bU{6otGD+);i9>n2V-I-kPcL#>+v9Tj>WQm z|C7+`nmy75n;`U;?HP?&yoXW8$f%f_Nv2UZ{z~+BJ7IN~pBwi{j38Mxa0%`XA%HyL z1!1(-32Ok4Bx`-*S>&E?nN!>Q;&Jg|8bvjr&mCjgsUef;_z?T0)kh zVf0B0x-BUFw8FAh&hIjJ7Cl#;gg9piux?#*@c_=G3hx5pmQ%av1ZvV2T*q!k#=n3iP(m}PKN_zlm^o$rkRy0tnxFcPl99{-B$Vb z*PaNL-+%FtK1Gt+D+;l{W`kO=3>`)BGCzdz@?0oZsI=Z8<$!e7h!9`41A&H+R-0dBUI!iTJ3|&ssU7TNp z9v;`@mlKo!PyDm3^*;sHUgFno5$|U6SqE0E)Y3$bj;|d;sbLAZvUrrE-jO1BkE+uPPR?QYsCqO;*W8unz6R~?p;pz0w^Mv}t)7hfF zC_Q!lkvmeB26alE6G(4UWF^{fHCpzB7aAr3Z^%iPuA_4ZCMmu8b00rnjHdo43BCGt za;?2S_Y%YWpuND`?fw|*av26}UQ&<83{{=Ap4GE8HH%I@?GCIX@@~*we|cLw zoeRy0MP1V3#XB<~F~|XY&d(tyVy?fwlj4Y^K{{G{27%tsPCI*_yFSvy?8-1GXa{!r zc*Gru^2fz-QFd%rlP@V>ZXUP2BR&@dhQ5M= z)C%d=pkie*@sk1D&Qn)Y*TCJkSif^opO}}5p$o5{=lm^wwDFS|4$a=z!$+BzEXcuJ z2popVrk#6nbK%MBOd6)-IyeL;3|o+o32cu^BQEl*C1~Qt&E(b~{=3DLuKUVgiD|lM zcXY7LJWOkudj(!$Bk#Yz?5J3>xu6jD$je3}nd&iW8b06k7Cqgp)-6jF{b*R9OmyO$ z$&;s*^i$9oA5g~~<8HBUt=r*T;&4ELiH<(sVJo4A!)05jl|uxHMEw>K7YLxHXvj`F;iE1k_* zAUC-&5edl}jB+ehQ1~T?KHg|Qykv3eySIJ3Ga`!6u;Zrr_pwW|Cp@b5AnS96&Rao1 zMs!XNk*BMD__#H&ab=e2LJ@|S*7?)|+0E>!p}_AZq3H9|N*bq;?_7@lSHtclwL!dH z>F@{J(6&Sg%O=@v8FPPgmQd#u(X1K(o*g1v7!6n&UF)Kdjh%r*;5jyq^U!SPaOYS0 z_G_RaMxl=6ESG#24bZC>bnM0aX0>y3>O`T@KbAmVGBAWbY#Bawf&|VNQMTlQly;N{ z8su)``JRF1StDx?HwH&Yb|2one|HC<$=Kxs&|uO(TiezRLWqRH#b1Pi3hu6jzo^iq z0)Cn&du-~>kzKMV(f4^^`79CqATry<+q6Yjo=)u4i8$V>=!lg6A1%)}7AoQr2j$Vk zLvG4es%hk+<28np#;CqnQBq1lUtzl6nYUY@jiVU=ISF?l`$piqKarpZDI=rZMpwHc zNKYyfJ^n_(ToEI`In8}+YnL%4;8J^_dEG&XHG#X#jwcr&4n_D6xqI^b#td=Pq8f4O zkk9y0K;NEv$x6-BQt9K9eiwPHW4F4pvaVdwm1VvnXtJ z?1=hRsS1N&fw%J7<*K8(VE(QXT_99E-Q#IvyNrCRvmU{nb|lc4SxQx#Fl^T{CBB=luA^sQh~+2hDfz9m_}swOY{w?E1=2XY2ftrWoAm+}(DS zo<7W4oU51TWoKRjEX{NmDr(9Pp$_mXz{pALO#i2klcMjMJuj84s@dpWSCy1>)1{j0 zWM~p=gzn0(W9zwrdqlLUGFym}_FwVBuC`oBbj|AHs1&j2k%WeAXJ|Uv`U?x*1J>>s z#9J~q0L!U%I6BQ z8p0-{`n21}>bH-8vA6%{1>i>66JEdYC_Nz}X%3_2LC~+o%#tEH^giy{1LpRA^)`#U zqa)KtVi%_n`hpLCo>yS@)E}uUzZ_`71 zCyG$PtbY2((NsUKLxZ-4fQ{VtW9}03qLhX?aJ17mwa{;0bUT}$7CKoCp32L&yKeiA zet*w>eI{*BSX}Z}4tT_QNpx`po? zba%1AL)BnC5T#gBdO`LVnIy1Vikv@B&V{8($G;Y*G%Mf<23)tfEJil92bIOsVC>wd z9kKDux75W~i*w12jcE0<_gCeCf~V&_5C6qq%I)(%7Q2VWm7#9g(kYUX%tuS;=E(nV zD;&FpFsET%?GK_Dpd~s6pTzr#)<)c{|@2k?Hp?=2fM6vqPhL!JEBZT zxR*s-lJsaW=CjKdM8q)Q*`ccUjp}Pkd_3p(Q+Pjsjw}Rv$>4B~gN{RLDF*odzS?Qx-5Rc|jBSxS^06a75tS ztXz?S`)8qY;$`F4i#8WQ992@9;**rQLA~)Fo(Wuuxer!oa%9NV~(X1EY(4T>v`_0gdJ#IGZL(1r#5_6wAE4*LB?r8b*V^ zRoK0qNonunUD~_Gn{c--h>o^%wAl$a8buqjd}6cVBU~ORt)6hp@9E z(?O?~w~S0U5iZdLgY7=V;JrgOmk*Zp;##u95kV_>u0?wm(EOSbO%&iFaeU&c{sD|X z0Q}rjlCQ}nJX}HPoE9266gxa?-~Om_Fy#)2_M9nkZ4eMQYyWYAeDpSj$^**Ra|FFd zf;?jP%=Q$k=)vosg&uocNHPTx%US333=7xlpuB*gc32b8_|ucX)B(qD5OsPCe#k2R zE}6NbL#TSK++d2mG7umu#~qc4!X131N=#Z<-zDwe4QxrLZQ4^zn7TCHct$m?Nd4cg zSPtD4w_zU6RL4s&b?kgao#;h(`NZWj{6u`$U+)=o=4OgCV9=$|<-KK*ii;`DIkLiJ z0cDi!*oa9O*u}<$WV@8i z#oH)P$^)?oApchFD-ndWdHvQmfo)U|3JZiJ>dtP*){Be##on6M0MCEkQ4q2sD!&sC znP7|%VZ(^Ca^<8PqJuHgfb6vGcdlu_8;cEKib1jXpgEjM6be3hl6bvLXt`NfqT)|$ zFafbluBz^&UQXJ!ciQ1z6Cx65*-^E2DGP@MQ%kMU)7c&z5!M)_XO{B!g_`8Ghqf}W z{p*H(lg#5JQU)vrIylNc@~cZ83;+DvQ}uostyiEWP$3OL0hd>|l^~9qmFhWcqGFOQ z&Qx8Yhio?4TC%@vR)zA1YHoyzR@C_0Owl*Q#l;+hrzg3s$2ITMxFF-= zDe$5@Nro<%7`NO?l7j|m*1Co}abTyIR7n2exBFaW%ji*-_XD4aU{Q;K@*0EG$V>|- zjHc^4Ub%^6sBsYdhe z=P$|h+SY#8cCEzY@>q@W!#_GW9b2Msa2v$>9$tvxchu^%E5ejQ_#}@3zqF)m;{^E! z&kHG283^rJwoATm4G}Y{uCDyKo6zQO_iE}SeRep9D{AO!>Hu54{fQ;YFX+qfiAK`b z5mh@y9+BV|nGdp~r~%SRXOGa(W{sIUFY#0?^Wcxg6>-2L!gXjW1+3di8qw`u``H&{DZkFaZ^Xrj1OhdY3*Ti1tNBTkr%{SP34X{jqV(H+#K7)0q$u>Pkg0sI5U- zXJW@EsLdHwU>p9A5B}sRolo(&WNkRLbBX4IfcH5TNd0wv}A&nr$36`OdY z7kEoNLo$-lA;^Mhp!Jd)M@a7?LNLfupAd?lt2?8F8*(Yijow3)>G*gx(OszUn&sxo zpFkD`5KkQAQ&d)-vFCyLWfySv$2~5@fpjb}f=bu!TIiPq-thOi6202pcI0i()lN^= zDa#c3(t)8NI5B`d=gTGuPKuxB_tuH$b(l?5UEU#2QhSR2j|hwwidYhOlpG|*1Y1359>=dQ(UoP!x zAB(f<88@JEE}5o^QM4CZqXN>#^s9}*EoR7heE}Hh7tv8S@c|ja>#6ct)pwEP zj$TfL(~9`Wy?rtu<`36t5@HHVXUs)fiXKd3b&wa*Zt&y3<;1UOWBzky3)h*dTP<#L zkS5?UPMYTuqAjz?EoZ@>*>cgo1J2m629x_gB$jB3H5SUI5_9CG#`ZOs;$`nX zGipORb`7;;t7R!Y`m$nlWNZ;WzsvnVV0ij0=Cu0!)-$|YTaIxxNp4%0{r>K*dw8Y7 z6bHEv$~{3q?h9kaa8Q48QcNE~7^qF{Lj#SWVSgA5gSM%(GW)kt0JPM$TAPm7)+-Ld z8Iv$fv6B5WkAo5H&P@NdnGV)ilUZm>AdXmqSUWP_b7r{O2nYPFl{&hik|)D zEHs+xRopVUWuG+mjK;R(O{7*&gG#8DGZ|j3C_p0V&jMk$Z}~dyT_hfZ83tUw zB86e-P$yYrnVYC%9PoSfME(_mhQx%Gld(~L!DXq1C6BpKQnyIJ(g@j(v{ugNU-MOd zGy&R#+o$u6)^V$f$!^e@HB!>C#(qe3rK5`s%_8C*;F)6M7o9hgbZ^YN6JI2#n9pzy zR=jdG`x{1e^#Bwg>B;DX5LEWkD3|H%R{+j)5p1K#FWIX!e>Wb?iVOh)9savIY+!p( zMj_DSIKIB#w|Q(sY`6%Z-LBN!K4WkrX`4ttY(;XF*FK@6ce^XfrE5sJ(c(#RluY4wN3R3BB<7d z!eBS!^mJA~|NOJ#3sNSzk4dd6PKRaIDIjtJNmw)&Mzsb$aS8)?fr!-6 zxF5-N0;pe3$-PQv6)B?yUkg)Vb8dmE7&|}21J`!$MQ*;=Ty~aOqppz=NiDf&@sJ$h zE_+?i8(EqLge{h0<2co@h3x;l#luAN4Iiw?=s%?phZDnP3%LilUz>oOAc(iK&V9r+^MNp-xKK2 z=)uvte)`B=d=a*&>u8DNQfow6V=jjf7AXH_6!e5pd_jX5H1GJ+KLHs%n798`MPy9E z`x7hM%l(-Xl>~{j972K9H^2AbSE1K$q=%sGS4I||Y9cp|u}q|3wGd4T4gb6(Pv$K9 zU{jh;Jwv}1M;U&Z)!Vb1aMI7LT!f)SZ!4TW&c*8I1H#}cRol@^_DqXDV79ir4XGlN z6PKKkmndwkeIQSCL^!eNr#UGtbxjfvZomSGeceUfe;5<-@vJluvde-r+Gj_B=%{!i zYSg{Nse7r_gg_0FdJ;0+d$MxM49Ii+SAeSI-@*&+oqLdVq~50q%-+Xh(cIU++dqUO zysrM>z8}TCKN-C{zAnF)ov{!3e);b_y! z2k+4}E05wU*a~#z{W-o%!j}Xiitz%++`mJ+A>#J{QnL=U2i;Y1hAFFC5EgzjtfkXB zc4t->=T`IapMa7)4Q|1#yG!Z68_L}7g5qYh6s6kz9J1YwDIEvOquHAS$sUxZj>}-d z&44J#hZ=W}ls})z>-`VwrKV{~hr`rWdD5$9GnL_nNGMZKWCYV>ph$eZelL3)*+`wQ zzk|$}Z*p8-0Ax)fj(F6kX+u#Kb|X3F}mqK_XK?tLG z7EDe(KIu@3t;|o10Sds_#D|om!$FEHFL{UhM$WpWL=3AXk1prA02oQ~b@Fm19-tU9 zY|4heo{M7cRO0l#E#MMGtIwxe>T%qHfCp(RZ55@z!9RD}0bMFV_!a$k;3+3pM!GJV zo~-dCU6s7^x1l!K`&J1JJWO9S3VZZrUY91y$#`W>9)a<-HDqjJ_GpXB_I^tu6B&*T z0|N^Q-iMbo#!a7au^f9blh}Us$+?eZ7X7{`~pIfGzL71;I1FTelG)rz= zx`tY598+Cfivjr1M(sG7rRm}>qL?sX1I5w)lvY1+B#By*bSaG z3$xuA$HN!axKam{d_bFE7%dWQ=-&1Oy9(A~tzE1Wa_zfHG@tvI&%N;NT{C9I5WZXJ zAFM~{15f-vqTNn{|9v?jCS<7Pt8&B*>rUaavhd4thvIs6H;*qoX+UTp!|hTfM_Hh# zVE9GJ83rtPw}YkK0Bsx6Ni}t`wrVGj0?qZk4#g&mh_77UyAXK}RzD49AfVH|>Ly*n z({o0ZtjUGXi}Hky*ja((Syvk|A2~*ITi-oHTe|afodY)!K&8FJp(LY``;)$e12KXe zPaxti*gO1W)C2B+gLOIDOmete)akCI$4jDuxNU3@C4f?L$pAV^Ja!5>U%`3`8gf8M z*8!=A9aF7kXYmc2PQ$^cvM>re6vJ#89{{?AX*~fWRZe`-+k2DemP<0x-RirRdv;sX z$^GShh;q4L9>zG56ri6h5k2!f!@M4;rQg_)FqECAKgh_w(Fg^>1QP|}B?MkJ2p&;R zR{WYud2aJ$*KmzbP_RKlvpev1^8EbVzHJ`q^vm=g7=9+0M zcrZB+Hj`7$4)QUN5V?10zv$4QkgF7mQ}N5~{t+`3DglJFr2Jo~@06!@r8+`nMX>|84m&4>ZvEU6D*ura13A=K-sWUAAoFqIYXdba>PStg(5f zg2Ge2BJx)^+GsG=O#P}tMx1zjXcaeY9*`SG=TUP&wnUz9U~}*pyWD>x zYRq~(`cZ1@<>fot!HpxqXqg}ppyvkhhY_>pyRy&Fl=zo0d)bZt#s2eZw2_yQuLVLJp_O`&7mH{bfRC?i?aaH~-iSa;)OhF<34#o=)Vp0k+^(=Y5XRb5;u1 zZHC&SLkFYwB$n_bw-&A8DOTyHJ~kFY91j6KGX_%Z&WO>Z0+=#jA_WL*ad*@c$5#{%0GBYv$MHlY$5bF!$P*ZLDk8^GQv1i6=hY(dkztW%&)~uK z!BfCt(`TlK+{qiaju?EfhNpq$Y1ni1-#2VJ}e-m8z{{Rv} z?Y@MArwtbIgj49wq>hjh1VkzVV_134S)BT(&qCO9>#ie>v?M{<=f1;Vr*z+58jWML zfk>fiLESyKeOnDRjhR&y0X5rTFj!GUpj1r69c7;(EsL5m9Nu1{gyB|IreF5ZzbU~P z&v^>cbuh+IxpRu~2S?cPz#}AT5xtg;EhM>SK`|j?4Xt8DUk3Nl-B2hpLY0*h<9LN> zq@9Sf>KKD-G`Vs>dFu{_-*zFFop}i(p9;9;?gs#vo+*->F3{6IU!`%hFvd_QmZ(;J zGU+7QOy;qbhhfXg6}nXIm<7(qPPIixSjirwlbrolDYTj; zc`Ppt2t>ovrNen-j6sJrRP`t=Eb4w$vzc=piS*HxyId?YB>eG&>j+-+ z=1E@uJ1PG1o$*x@Mew|rjq&u$6P*1Nm)(0K&VTw51_vYuA6kR!&K`s3y>y&ykA(d2 zTPt|(Gvnj<$j*?Lyk>&&NzIl`HcG+H-4XBm^Biw^{oHf>f4(=*|Nc^mPkyA2KmLO( z0H6F^k@tS6z?RK6mIV*|I^^Sj+s7MUH~ZUv_-v8C`DlSlFY>ta9-r5~GR@zAaQ2$~ z(pO8o?Ok~;yV&Et2ScuYR)Q~ndZ2UHeH`)EA1UztA640~-ez=6ap;KRtTSBR_vblY zaCLI&0)VN!=8In~cS)Hpx;O@ONtrH|MC*XGK?*EaDbtRIQLok-*RhErO>b{6*E>>JO*qcoPt3UkC!i zFq{)kwG?5}DO{=3_e;Gx?fX)pN^|$Q^Kt8>LRl>2XfYC{mAL7&e6ey{>$4m}W-&#~ zQA^jm_-_xZu9R8W>bHKrxDFycv3`d%@ z(g>r#SaX}o7|Ru$H*cf-zUkui0ZOp78$HMS2V z$`vMyC0yIWIR?U^3KV8ym4ybz^Lak~?OSlae=7sI6vM*zkYbv z>@I6VVY)!}7}YXHYoZ_|)S92)em9kJmDt->(AS&e@{7*JagK3VX`o=>U;p`M9ND^) zstmYLcqEiTWwWfg;xcqtW$X1fpp|0GL>Q&macjJPW+KnXf&DnfFqF)Y6B1)vv-fR7 z+^$B?Q^No;>3Nh;)fse9LpmNHP=0AvrDGH<5O$=M!srl;sT&g4K-ySd8X;N+8%;t< zqx~`fRw9kCoOrz_656n-wCV{B^YA>ump(JV)1E)dHP1W$jw>z zgmpIG|523}T@#0L-F0t(9~gRbv+bCl);#OlF`oZhNj~+_J{%`*|NRFd{_}?FobrD0 zOP_nUhMa!NTouc?XSwXSXLVB@^ObLwdBa<$c;!n{WHXW@V~W3c|1>}Tk0GwS)Z>wz zA!lEHgjc^j%~@x-6ib>v`HN}(^>YKf@cAkBABcF$B}aJm%WFLCvZD{BJX-wrbCZ1O zGXnrj7c|#>t;|baJHgk#Fu;pnaQs6bpJ+r8b5vGcbn!%@dn$HuRA?mxmYU$spG4P< z>RQ8dOoZ#WxUNkQK&@758s}P8tj36#hr zQ@mq@iAVM^9)vi;BHMB~7Nnt6m(*D46a!B?4fiQMxP2MiM3Qo0it_FP)7L*tG+AU+ z8a601w_>6mdSvRxr@%p}hyAUu@?GrzwT&m&| z`^L0}cW4ZUrRE?ZdxhdfFTaxYS3QM)e(_&}F(}Jpy%D6_2%#pVO+1unN(eiXEyn;2 zgct&+N_D!(jX%5}Gg{(VPdi9{&m-J-(>6@m=FAH=QMDy`6v7CEWnl=HEWe$w5wuW7 zr4p%R0&|Qb_A-XzOsV;~TCFj1@DSPlepV0lar&kdX|KkwesMEmY=VkbjQUlEjEp%o zXc`ims!te(SUr7sC#+@7ktD&)6e5a{P7=#af)MlwNCT4@mx@fG0zuBU$=8dsr2ws( zLW-k-(V8P82hmZ)1A7lrm?_P<=ZsBEamPImaQVgO9#eZ6458M9GZijAXA7CNCz75h zk~la)tyZG)vs);j(RGDJ!6+Q9@DdUoKr~avD21KL(tq;F$YPC={k!Rx5?9nSBti4~ zIbJX-K&fE<_hAifxdpCY%Z+IgXG;4Rt+10lNZUJZ zb$?9IhDVPadBShD7oO+x);DE&&6}tA{3rVP$j4{+#Sd5Fd2_4wnpdRx^4H5vQs%m^ zm3Yl7()`0`i_LYu_>~f21Rwk0EFlB1eyzW!0gwsZMY z=N_M@U6vpS42O?svYRB|{$7R68*Q$u5i{FF4x~!C7Tgk`@B?h z+t)lN$=AMB=}5{%5xn4)yq{+29z_C>t!!-Xa(vujVpTmL-IZFl+@124HY#i#$Sk7Q!D%|3Ts ziNF3x0pB;g>_sU)@!>uap5WIHhrH^Ilic@+Gto8S+BKg(Z!aGKtn*CrDGc!d72M3A5 zI0UJ$Z-9J04@k6*LlGRusgo`O6-6WyE=t8ueQnD@2n#7dYXxG~>%{j%N~IzV4;d-r zdbPIWVhWdr>Sv*44L_aMa@vp4LdUa{lBv@%U5XfKU#DI5vXnBWJ-n$se5qAk(;n*7 zp82YMKROXUjrLfGeCrZ5U9>}JWnm0U*}w=P5D6FUM}R3@-=_coAOJ~3K~zQGrJLz{ z&U$28qU;($LLvt|`qpiv=jIjcyXRpJO&8c4N@Sfp2^xAF+hYCIXJB307xyWaMpMSi zS-5BS5k;p{_{LpS!iX7Z=xJ2W=%)7tGJY}}2t(dP$lhK~efcH08oVb=Nuf7oXlnqSX^=oRL+;WAW?-;W2>e&Bhv^0Z*Kw$`_WaZ!> zSDbnhr>^Z`-}W-U+IN_VhaToi?Sha@3C*<7BoNpp4k}A)=)s0cmB{zeehDERToI>Z zHab9s1|cLy2ts41m20HkJ}!C1Mby4j;mg0;3dXSIjMK5)WA~@X^kfONp;Fz|@nOi} z(Q&pvx@SpcYA4K0|#jHu&R?@d>?V zsdfJPT{-^qhgF{T{88Td$32{P_WW#9FS$0wU;S-?(J@6XC;9j9R=D@(RdYz0+wTgv z^dgURYVkIH?}rM!@cBuea@x|@(l@?SX5$8%lTM7!f&B**n>Nm!dTl<*X5UEMjQd6u zC!J`|;SD#RWOLh{ovnL>fH%G_!#A%RB$F0==RYgF^mP+Fdham3Imx>}FwK>hdfa;B zN~DB)w+3@UxR!&fu1N6d&lf4oXtEi}OJ6s^(=Si(&Fcp7eZ%km!36L9P=SwqAnq%J z!0_{1YwUesm}1fJoEMMrp^we*f%oL_eZ$`Ub5EJ6Y0XqV9=ncDXkPHj3I6f#`}p0L zq`B=*pXa`KjH{m=6PAS;&2PVAoDct1FTekq40qob@az|jap^@d$)yxL@1^njU-_ps zRI7%UzkY(h`AC5ezpoeHH$1dGBc+T95ol&PYNVcSc-v^Lo8N1#@qHi1 zvhmy`Q5ee-jfVdIe)9QzlOTx8)^&s7M!gy;8L;iy@TrD*Z>3Vf_x)xjr^UjN77I^m zEMJV6X)1|Y-gi<3bvh18W!{h4F!&jTy#=SD^PDVp>2?i(&#{)nD;f3WzY2dQ(^# z$q&BsWA@yCm>0kL=?tz}3ssLVeDhW|Z5hU_9Uy;q?B#`MnJ^1*r9`+kPkH7g3_j;< zde-!yf{^o`|5Ro+jj;34o2XTM0wGxN8NCkU!mK!ra7!b{%PeQ^cIO_6*~)Z4Mo4P; zfa2aU+)}`L9Q1)nj4_;MB{1cX>ST#vY6fFK8WV>vHTudXF|_n?7Bnq_Fu=tA5rie_ z$>kRL)qHrn_COGz!jKKZrDzn>QgHsNm7KX@kly|rB9-L9oulzRsAc;Gs5Z=wfWQ)D zR6U23(&(Cxv|A=MM#pKMftu0m^(&}?hG;F{{>Dw*@Zk1l+0FJihCWnCNw%+-k%LE? z_q29IN^#Ev4(2iI@ivE-z^i^m0L0H1xlH!?c5bXZx!6P$jk z!^1m5p7YGkAwHS3CsoOj4NN5(LAs%WZy`{yWi167#gI6 zKY4QxZ~T*~CMjbKeDFQJBs@XF6TJH!J-p*R(|q7POZTJS{XvCOPPX|UFO9vBF1y&{ zMc1UL`Eft~gCAE}xx(TPUK@v$UU06F_N?qi_8o7Jm}Cl|V;OczU{F$q@6%o~g?72eYRS!*?CJXovMn#4#t zon~rk8o_MJ>vlg7*LCM8cp4;8YeTA%VY)+-i^ z1VPYD$=yzrv=b?<%i2Sa79(w1m$jGC`uS*%+hSovt;?5Vu-l1{>7<}}tSPaVvmZ+> z>!ORrpoOqZ%j9<o=jVwNFj z&)DKQSW!g6NOnz6V~il{X1RUGR%ZU`=e+IR&*im$b}i@s^j>lUNp@93iaJ6FuO0%W zL0SmMWo2(4W8n<9ZoQwi&N%C)S7Rq7`ya~l(6_g;VyaBP<=`#UP{uU%vNOT`?prfn2@n8gy*z)!3c!yB7{|sv4u2(Ey)}Ql9EZsW_r&gTIuF~ zZQu4VC!Kr}Ui#S0Uwg8d1r>?5ZFA`bXC0GLW@>bd>6sZWS-G12)j5(gn&FuWDa*#l zSaDV~ia;wupx{{~w+t|3XL;cM?cjP`I2~fussEiSLsT26h#W zP_g*c7xNQ;GgI;B$8H@*tXpgU9dOQK>wNor6@Gqejn}^_!yEr(ihF*(s-qg@wXaO` z$A6Y*&9KF5UNQd~80eQAJiIsw^!h)Z`*=T3zkHS`8tj*Bdt`2CWnsp!V!&!HFU;t+<+{1N9n%HPvtKlZV++nW&7n6Z z(b_OE8Slr3|0>5@-kIm5a}IIZ7Kb;yI?Y>NpFJvGcK?A0DWSj5;-;H@%4Nd^R~?zN zj_b~L`BK8h4YO^rX`{`-!x0N`xpQ#nh~k8GbMJQ>*4sR?Gj6j(hZP&v&tKjkWgguf zQ7Gtn^=l1BOC|&>J7mP_qKhXQT~eltB@q)OG>v#WDJ+f#t)xoBDA%@KlF4M9h>6$J zS|cn`AETRk7?s^rW&}YnC*;Q%(^S9+AqawiWYR$hu%u{~*-*c<*58=fj6$u;8tR)` zt=4P{U|!nmg~E;6$(Y9Xt>nu>B+f$R9ZefA74~zqHP4j54Hp`)+O!G5|`+{zN*l7%wstt5kbxf8^?@~BC+*dRRuDJTj}0gaC#6!Dst(Ih4G8bc2T zr%BX=ARR0 z5IqC&F_My~T8K$OA&{9hNZZ9|MO2yuVUUi8j%t7djm%;~;`XfQxQW&WNlz4vF{FYS zglkPb^`)2m?4=+7R(0uL9XoP8VrsGFqhpGg)PX`VuuKQYvgNGDf z`$BAxd*1^A&wa@l|Lgs|O~pq88#mZ|>w9yJrnfy3Hoa&zZm`+@XoylY)iv8537g?h z?fBPkl*#o-e)4~YfcP@G?rWuHKe%PH!%g2CqEa<{|HdkB{?jRjS6RI9`O7!${ozll zoPUl>CM_6RAsHNy?7DAZ9~P})d_pyekI^yB;DCjckVpuEVD8PW5xNAhYRKY8H_c5$ zf8fw8QMPKO#lgeTg3E_iSgcxUEn2^0;EcQI;x~dWDbvNW(I7t-nk09c%y;_Smn1*ME_77brAn5qw2lOUcLPTqQ$^p+J^p4-#9rgcJ?6T7To zUDS-;e+V4}^~sn-2uap)DAYnKhf4UmMSCvvZfmGfv6TRy|2d9 z!NUw9NG~Sgi4+3CiO;-}OSWy}mharc)UG_ap?(m8dmnlPqYY|$hLLUC@sCWhS$ZVG zuud@4N2Mwx*teHlu9r(!ok(zSCx?IZFq1#sNouCd8CH@ZVbiA;sY|n;YVnt85I@4E zW=Rf6MTkLJ7J5~Nz;-Ab!*oz)^xzb|NY0UxwF;8L0xO=N*nn>|>g*xbt?a|b#RM8v z3s6;`sOl3He8OUtO1X@s#oWUwBp4_P&8Up;4;y=iKuY%J4-*N^a3tmsE~2H|4S)j} z)>W${Qp=yjs4&7A8shAsm3R;Cq#OjKjNwGrWw<9t*{`ubs9`$}gKiSk{JuVm#B%Jo zJ#9PANEJrlI*7V2jL{Lg7Ars|r6DgAkpVrFL=~pF^(Q;|>5kpaGFPk^Jf^Hm?YQ!i z^SS-*t&C4hA?o+%^=nph-kGNzd!Yu(SbXZ+KcyE)ltWJ5dly&9TJuESjilgo4{y=m59w@O;AOM z`h8Ve2;0R(K02ylCwmdnA}o&8E39dfn~i(g)(w0=JHVCC8|8)1Pjb$gb3=86fa|}pf?CaxO3ptIUj6bkpZMQJ-t>+s zzWC{Wdb07ga>w01Klo9N54SbwmJQ{K1e^t5Z zd!5P7ATap;Z2$4)ua_C0m?b%W{cxNiDwPzx(@mWPeyb}nJ$)%*_73@r%fkC zMW^rM&mg6RF=~#XZLwIybrYmgDN?Bvel2RQ53?kUF>!XI#$-Q{NHj^3FboO95Un+i zWfKGeK@d=_rb(wgDwQe&0|S)HWh#|YQx($)cXAxJNz5pvn3$a0JjpePMTUAA^?-wF$mLfEkQmQQG6Vs|7Y8V{1uiIF^os?-0 zUs@_us?$ET?*Bsj+C>-3g}_*g>12$G&03KHDJ@oc3GRJxKb0G^BwpCJZuF6V{zoU} z{aaYBomwvD-{F@^TMpeg#`xWP$!dd_~mv^iUd8vrhhRa1SnT3%-nT9n=d$vBl#)rz2y$1>&DsUgg^!% z)O`Ac#pyCZ1`%go62uvkjE;#TUz4Aiq_=+qSDbVzhj#Cx7AVfMQuJc6TFJTeP^0fL zb#vcF8_GI?VCsYn7NHazlnR}6IpM{ZvgR3QBeYFejgXea&3II6MQ;A)O>Dj4Zd{pQ zt){7TaJ6Oz#rYRr%qg$Dh@e_S2yjygKu|4|@iGa*$%vai_;vF4J~FSJv@pzwSXqNH z?421!2tlYLiUw-ZBGGahSjU|HAusxpj^o!Ya>P9kyX`F;ZSP9wtz1!G-=Y!;gg>31^JOskFKuV$@ zpb|w$AgyPWF{WCL)gw}na2y8HS#&zV)ZhSx@(d$mQ`A~A0@{{E6oy!J#p$uabsVmI z>iGmgK)G5Yn@(ffkL~fZHku@o$X66Shrn|g&1J|2A&F4o7=w+#1+o|-ZP=WZSdk(b zMyUFJjs`U{mWyY*=*W-BEUiHZg!}jod4*-8YBPXANE;nivAhg25l;?HJ#^6W(nKo6 zPUeud6W`x$4-@%uO7|9FmX3mYnF48hSl+RRo*fS~&l@4dWV!Z)-gv+A%`$h~74YCM zS2w@A;9Qq?{9%^g`=cp-b<=zzqdkRnD^f|pP2U^hO>duK#ioOtv>`qg(*?~(|7Lka z*e5?%WPC#Nhwq%?58pW}^111ILtJ%5g1%nKr#{-pOJ6&|#tk;R_eT8XJA0a;PYF-( zxqs;A_x@;-k9>TFeIpTXd|if%&hP96^QxDn`TW0>IOmEZSQZQpNKV;2yN|#B)+zQM zh&XwZ!|0e|Xoch@*Dg#jU-z{#*L^KczrJ$F;_|0@+R=JsoOSB&KRd(f zl@>c5jkxByNk0FHm{{^W!NJ3dbFVx?v83tENxtyOcv&_hdEcMsc*bv!vH2v2ATV5Z z@vK|f@G6V1|MMVkdixYJMZ+1VI=t*fsiwMSpkMOu*A4QfcTDm6Kc3>0lWku9qBNu9 zF?rkH7cYPHnjbK~bp!IuzFbr|sctBXGRGOrU z@B5@uDYDrtel0fS^*onIhfU%{2+<5*YM>E{B&8$>f;c6$HqBJn4PqsoPLfV1nV6VD zh*<)}X|rArf`D4BMifQ$eVvW{ZQZZ-P^9*7q)wzvd&pDk@7q5&(D=<#$8{khqm>M4 zd|rqIX*ct2JqJ3i+er!2nmMU;{dUr(y{uL=6i*ACv&%_u-bEKn!62-~gfd2(I5^&O zP+>%_Z;*|dmHhOk2Z@B{ylZQ35|;BSqgAR_EXh5$9_IF2?qPjRlNC0Wka6MKK%`ic z8{(ujecbin4kk-Qan@B6YgeDqzgAU4CVzQ|Be(5^i6VW{CTAo|*)clWFtPstlleS@ zT5+zGq!1}|RKr8!2}#mQ;33E&8PF1|VZv)v)5`?}wJ2g@OAs zLBi+|ki@}5jivRFB@@NVq>B-fvM_{bGFyf@@kJLia@+mfcK1F;XKFaE&FYoCJnic9 zxb#)eWZw;UGeX2_t+9jyGFBOtwI+-N)#(|2`ftBPDa}jj&M>r-u;+dJ&XVtlAOvYOA*NTedcFmK;E3(om@oDn+4GqF5=D>d8`` znOT^W5rTAYFQW$zv2N`;sylX(2f~EMz2ij=1iMIk65$#uS`+4{n9>1fTghf1lK~tJ zCW8XPn9Res(k8dLRy8 z+Bb3l*Yn6`(ySO>jeLwcepRi}+mk&mq>kcCv+#Ag za>(L=+g7vV(FoUN4j}{Z%O9^~`=cS{vZ23Ea^eXKPy4?7j{|)99~bD?T5#FL9y{({ z&At&usjOK$Y%@3zUt4FK>QFnf4v5on8xv=bYCUcL;_W@W?swB1KB72ni!(2M`3tU2 z@`9^p{kwnr72{lZ-s~Omx1Nz;&(>MR(ktIE!AUJ1HdkKivGbm|e&vd0-5R?Yj&{zO zF2w`umfXiKx_BbcC1oBXq?EX>OB6*-vziy zRaz_*>3D@HEu}13inwXKUv7BOV(TwwJDt{9XxWoy0NTZWI|viU@XV49vG)YBel8mm zKVh#02xHheaS)YT&z8+6v-QW@=#dFAeEEuubR<*TrnvXU`{=8NtdbtK5Tx|%xvOeb zv@^|9FTIpxGRc44e-C>e*-OTCag;_WO-4vgkqK-8z0FkE29zI@C(@Y{X5$!GA3|j+ zPgMxgmSkm}baAwaU&11#!KOv+VpQF;B~HU^fF1=0{0c?CimoePY#sldk&xB~OGmSz z6_yo~O~L{lfN)~g!$`1apL*7WVL~fdnI;S>eD#OF;;x5A7}N$|#Nk0RBV#=GZP(Ca zyW~|wO$b~af^bRbI1^FHlnE;l-@o(Ml*<86ea`uej_l@#x7>?HaN(6_Q1X5Hu@G9< z!y^wVM$4o zO_LH2C?{>EM1VSbGaFZDYlDeCzqjD$X6|_i;|I7xAX46O2-^}Y?m$&1S4>P+YQKn` z9%zPlLEN5}n*;>L4$*!Y?Z>JFJCj0NHmX`gTC?>PLN=oUVexTfr}3IL22-cB=GMQ} z=2{>{(*3Lqio z6E(*Jjw9x!_HM`KMKW0}*1n(oT#=y_7Ja>vpWRa97r*rR+{b5$u7CVuiCm9hu;1dA z+iP5ZW0ePPTRo=?*A+)8`#Ia;0_)VZSJZ2%x z@oiZGoz{sZx$_4N#u&mdtb5BONhXub%*>#a!g3Z5duiQXLqQP{hcUH=HMw4_uyGuR zWHQ+d#cJ$V5Jc2!wK>X^qak8CrLJyQ$}Ch~`}US<$JTWhA}|&rQ5GXu+LbR$rLFFy zlv#?*X|3l{Butl_>EiK(rjZi64na)97}4~ei045D3G@e=@f~|uwR#nvn`Zh4_rtz5 zB>P?R_Z;GcYDBN}NCPWFO>2UeP$|YMGxXkmH>aGonNn_uBZWMbP-7v;NtYGE#u0)c zZINuMH(J7j8cLNWVWhw)QW#PgP%SD#mflhhJPem3iy1BU>LZFf#^5vqISPcuAaOF9kPEen*A- z$0isH=Vp3Ix-Q97isS+rm{b@tF*-)y-~eu-b9!Nn;o!az66y4D>6=UWX=;9eFC}Hq zrnjeu4Ws)=r;;QUs8SJAt;Oo8gp17e;q>Jw9zM*G!_({y$_%dW;r!P4zS; zaqDjvrp8$1S}{?19O`JLdeK284l!B;t;>~P#!95oK`jnD5&}^tPNkEG2^S0qiI6sy zn?hA*Fe*gInA|kRU{r{XLNE$rbo~-;?Yl($doMm7Mk`7|g}h%OP$7}g7$H!$g{pT< zf;d#qmKF%f3Xz~k$T&RRvN2kL(FkcZ>)Zpt5b9yk=~1Bc@IRi&cr>u>OFKQIifu*{b}GZ2nXDm^~Abo%t= zpi)~RcDRc!9w&53na79*Ng<^qnM^iAXd2!p4G1Bgw1f<_PV(ogQiKp_O_OwT-9*c> zg+p9g38{7xq2bZe*mkW}V`gTCp`jrL1_p?th*~YEx0z|SajUOMySGc@dt1(iGx@&H z^z<~+f=nib<2Yy?ckJnO8m%Lyr>B8ga-pHxX}oXLw{>3{>$HFFwC+NrO#Azz!BT3N zPRC*~Q(mCiwvE?9o-&Q!EaX4aI5wTOu~6Mw|1R{tOU!g}Jke0fw8I2p-OFR{`PQ#N zBbYdJh_s2PME(N@35X{+1HxgYmh`kn_0-`2LxE!7p+g)VA0w$XC&;;zdrw#lD-nB% zG%Hi@8-!I?xTu&EF^$1zr@lktTP|akCaN#53aA2Ww26ro1O`C?&4iTbo-FjFP>w?+ zzzBgW1Q}t`s~|r*#(`3q69X031rsY|TDPwwuwrA~xSo=vkR*|e>>DEtB3}I3XLIMR zyO72p5u}qIXFdB|cJDgOWLV`CD?`#)aXGfcu{{RDkOMo%DObjM?VnwXu;RYQNe%H= zpMDdTW3&CH2dRz5{kUvt2XufCHaQ>{MSwsWNCE+(;{eFh8VN|-MtWX+pHYh8;nigO z`Om8djDUXm|@#@e}xfnqVzaP#_7p>v_`a% zGBL3v;>=NmG#>Q?0uG}XD&<+}dX$3-l_@z#V0_JZ7!gDf(?+v@{{(wJ`u&sg)o^1fU*N(@6+hbp(b5l` zmILjV;%rx~kT!O@4-@*RT9Nka(dgJ%TiWhCVn|vJSaXkqbP||mSYbRqP_-gDn47Jq z6XM`5ftG^ta-M^=GA5N^;G9!gd+HVv*&ZC%!FHV3Q^)}b(d8PILsN|G+KavO5Vl{$ zbCRfPp;1xX?0oh`OH0hu9{=#AcfWu7s>gd9T|Bw*Z{Jz`{Qu^EEPZ`+(Z&A@=#nzW z0b1+kB-FO&daX1tOKvRfdj3RWA%dVmJRGZ1ra^MFk}|EtMk`6=6i!&49hK&nX&G>(}uaq4W#a+=4kwZ4n_#4MzgS%{QrEqkfZriI#Z zvE_>q9gC4M%T>y>FY83~EVQjo^<0X0=_+NqcswD5nNP|zQ&)$vDQHW?f)J7w+K|;2 zd1)vJjf)^<1PK%Wwdwp&ULdfwW*EWYFhU3z#KtoM3xkEg)AP6-8lEq4-E6?FlOZzx ztRN7IKnNls&_G36Ov{MS7%baj-80T(?B=c1Y5_`GI3f-O5w1%~`$U_E+4Q{2=sBSu zZ!m!+EtK*>hFG2h`H<}&{7?23XILdIlJz}mOdNsPuqGX++6EnaxFmZx)5>z=o>6Z2 z{7=|?-X=mR5K7|;aQgdrpzW&@;$v&`qr(%j&$>w4hfqq z5)F7p#BBxh(l-ORb+03#HK72FX{vY1Xm*S1L}6OUbmVhqWi3`sA62Dbj_5lq&`yMG(* zjsm&R;HdyC5!)CUgQ`pu)Qb3ixvBUNLC9b^6hlghVyN+Lo7Kw<#aUK0RXG1k9TAoD zG3g>@Ohy7AuoBr=;SyA_5}9R>o9sj@(Phw4fU|isx!->^vpvM@_#rZe$Y^xEuQI@} zfE7aE4fIC+YuD`%t~(_yD^SKrDUC!3ZIGcrXoC^G2H7_;anjWOkqu7O7g;xjXejew z?zIk_6I3v{o-D@=mUU8yG*l^4LMoLa3>87-H`O@pM#AmHK%-1s&MG<@ z*^?TCOKZyO_I+&6n$)U(X(wM=)i3QN%R+%eGNg6CmlLM6+}A?e zYOhnLb7&z&%#-=L>Ei!g2-Oz81hG2CvLFa!Ls8d-AOP2aD4xV85DaO-jHOY;rmzu) zgHp4?NHV7L`6`4YiD1AeMunkyt!J zDf)we6T^s&Rx+-S4r0HYx-lw%LQs=}w2s@+))uN+=efh6m?(pUF+6QkKWyn^YF~{g zX$ZUoQ)6k|K(TsNilI}I?7O3cA4d40LQ8>TNmi~*apDQqraX*qBhwl37}@!f~mo2v-O~qgi!A4}+-`yC1eG)k6BFtH&jDX;J719keNEFsRxL zR;mvjl!+<@>{PB}7*OXTLxg1m0w>jryJ`)IOD;N=+S$NqagCsrS`jUOjex|^N`{9z zdknRsuA3PIo-1H}%Cj!I=%R}*jv8H3<~X3!q_L6JM+nhO)!ZQ8fb9*_&OP7r4;_-w8OSE;ZLI_B>n5qwc5PxX^KWx4YFpSHXR8T-(%t~BJ z7}7>`CRiHRL%p0ln$Sd8LXedfeMXYe;IxJ>3E~h36DvG0vgzAW5rVuWz;#%6_Bu9i zT1h%Nh@HuzZHe|Ga+`bUJ8_shP8y_m+ivhB1#XA^VDZugi2VHF+?py$NazZhZ81>m@)yLka&(oGMm6nry-Rh@?5+~Bl9yj zV|jXvg*G}qGW8ZPVMrlA%@7tny-9{w4nj|sgy-Vg7Rk_%(T3c30drss6RCPTnK_g3 zinKT&3>!j4(im)`sYzKsf^(5Jf`qj2t0iisF}zd`M=6Ff30ALN$GA1c$mk5UA{^f8 z)0@q3>ZKbQePjgxNR_^m9lX9I{sB#8`)-o+wy-pG!`W3CqL!|6LncSh`gKGVpJ4Z1 zFgi~897GJ+7M5ibVaQL6F?hu)UbE?Zl2xCd?b!`LH3&Gge}wg$Ha@n@OG4lsC9z`~ z_qkTXT_JG$`$&WlRo^EaD&F>-XV7;}KmMK)<6rs__MZK*zloHHOfo*kb!3IbYA?aw zO2EmvG*?`B*|$*gJ~4UQhgOXgg%q`8-^b$s6ZuFtg{n-Wf=W{bW11?I&i8y3lrfQy zkv4g)5S3~A=%R}*y6ED+GrFYAakNCyT%(0f z;axDBg-J?*ZO;-9ojgn$Btg4^1~fvpOzhUs(8lKczpZ1WVPTwzN=-c|cb{q|{ zwisct(7Cdd8fCHXJ1tx2yXAbp*uHep#ghh_`AQk;=WNo8pU7(yPbR|%Z6GfVd7)zC zRb$8-MGZrbkYt2KQ5brO)imue#KyT(^}e%aH2X|I28k;LW5STP1X&~K*Rp_O{$JtFo%HHmORx%CaTPyYV8~ z(8hqFZD?#dhVBlgVPb}!Xa<7lX6fnZo(|{<7m*lmTV(ilC`U( zs#2-;Ei3oTx8Cji=8t>tdpBRbmzAZZR5I@y@#4LAmvhfKcRkTe% zF^;x0bInE)mXk3;+D7~qk(H3kd-m_#^|IE#L`Jt9m~d)3Y=_JkqdLQW*3Pc zN{m(QNVpU4lF*M$!%E1hNJ3EHqH$V2trw1CVgq4F{`l3djfkOITc#x;RwL$I?IK54 zSJoBVY&NgTi=I5fR*MVgE>J3$nAo~y-Tk6msZc7Fs2_Y5Uxe?TJj%`G37StWVlOUX zOL86}24&ljzL=3PId+YPG0W!2+&oV|{^VFRxBM=BYC)+WxTUVxBm4q>g76_AN*0f<>b>8-mPEE3FdJawfbNe2C@Rxsx^CxE6q7;_4NgX~x1S3La zc$gpfsShxH+fLTz7nr(!8~^s>Kg;5=^K8HE1{#a296xh`>$ICZFo;P^eI<*z%7Sa8 zlbI)_2{)t~cDw`Qyj=)@Pn#?!+SXl?Gv>MX*p~B1nvrlT0!>QYKXxmE(~8 zQTozBYYHZ&5cSB^Awm!~v7IsQu*=+FB5Go|U_vgW2J!i@4+T8gX!89061PNQ;&TJ+ zP&Rv%OW{SPVOB^|cUu#t)r>OF9u&0vb%YF%g!V)}Cdn(t+FZ!DPabD>r9;Xnr5LJg z&fg^K58+ZzxGRO@dDtS6LWaFE6OPxvQdbRGc%LC^u3{C2 zFk!1R9l%+yI#Q|6(Si~Rci+MOkG=OQ)pdXY1{h#~R|^AD<|;sIjcwcQ5RP7cCVADy ztAWdHJMWFt&wr--|N77RZRJga^W|pQt1?n1E34aN*0L;Y+s@6)Z@ZJZAR}WkvM1lp zZjYFa$d-*VDs4o}a+8lwS?(d;R5Ky z?_yRN#B*`)zK*T;>|kVcf>LFiFl=Do;W2b{JF}lXh?!ktO$qDV9h60qq9%ek#IbD7 z*H;-{xQGTkr5IB-H4H5=1W`nDWrY(DALQ{rt6-V|+ms8r1kjNJTPbcI9i>^l$fthy z5OecOyyIJoprk-uGSfd<{z%C>lwKA?<)KAML=^x+EnX_k@ienUT`ouX#ERT2pFYl*nYur`{*h$EiQnYm9#ak}UP+MN%w|?Ub z#4ntud#K$+F@?=2UFna-q{hfuKPF#uw#GHWc$^D$QVJ{wg|NDGkphB?rl2)r%A#lj zj!A&7RM@p=536fy)D{-l*J?36G0t?|XQCA`q%7>0cnxcZw-`f~q}(9XqlmJj+P*65 zkSa$4o%q*GZXM;rGn14bws_#^F#x8wOfoq=ofx-m5<#O$yIoNfSyNwde(N^wh6&C)UVIG(^z+V zy<71*=3Vbh2$V}4+s)=y(iSqzz&a&8YjMQqeqdF4gy8NuY%Ob>(B!pD!ZH%Ci@~@^n zrDyXn#Fwp?6^CVn4zBRQwetIpwl%<7_{orDFIM^?Vr8!Er1$j^mNN{Ooy*Dh4ucyC z%Vb3KKrWP7doxdyhkLNt=f!C@svGuoPHb`$%!NY=Pu4)}l%i%VhuF^(<;&(RD%M8< z6(9CPrw^Whqr6DQ3Otm)-WJ$6Y2bJJSI0%qg(#JZ%9!#NR|QW=oqtyfq5~%&32R-^ zzxBa>Yh~~t{@MvgLM7+h6p7wf%QFg6Av|Cqy7E9!7?`R(q=g2A7hLc=w3bs=z2{G6 za_Y&t3$^g=K+{c=L1#8O`i`#aF(UC(3-Lhokpgn}F5Y~1)T2H5x6Hjip%>+=$b|9abtINOwvIQS}l3ENM?fh#? zWe6tw=`pVW{m!Nu1TYx_?(yxO_n(CLb=CA!V^*d0&>Y5yU%8(f%_jG+(5K?~;-e2* z0zM%lLE~7};O`dtpmvE+xRLM^bN32j$^gat|&*m^ZJpyleZ- z#@Y-sx4j>Pz73Ch7KAU{lNly!2n(c?jqYGR>f>sT-hiUqAEo#?X%1WG$T~jp$iB=C zK3q+B*8CCUqg6E)+4E}j&?4xA_=LevMRGK@e{36(l0_*O=x0scaLw?J}LQ= z#Cyi&CN7?@kHdW{me8xpVb_=cJj_s8Tz!(Q+b14p#a+;Jm4&M{`$Uy0tCa9?mscBg zXd8}KRj5Gnwd$4A*WU8kykEPlF|JogVj(fpC;k2B(R3*sES9Q|aHt+~+hhK1@hy2Yfz6#=f5G`Px6*_! zTSw`42;hXs!b@O+7^XH^l z;f+a+Y3xruJR%DGa>ACfy*MrIPf``dzMGpkK>z(iMsny&bJd;IsEhD%q_*p9e@?&Y zaAp`PB(xKiaZ33V-bn9GXWK~?zfkFHEBR(zu!-+!q7?PJjoM_bAz4VGc?4j_Ae{#H zw+%HZwz5PJWe#-4mD2k4o9oSKe*}U1E9|nP+m4R@_%N1PZ~SD*TH1Rr}(VyrNwk`Rdw)BI>sv&a!O=3@P+w?qo%(7DFZC=o7noQrfGbg zcX>9Rec$8XF4}^pGWl^bmqL{BI=58R=s5^7!OIPW5)AZ#CR&j)(=mC561elzEF2Kp z+Dgkbyjfq2`u?Kf@tGGW@AsUNO(F|smT39yT^Y#}@C{zgSfr|+gjGYMZ$%iTyIi8m zr}-s}C`z!JAo4f%x@6o7jpRUkK}#%1Zr_!WAonNkpTWvtg!i(3F$C&V>8S6G}8G|B@vZE$cwwfy+ad-hA?kimG4lV_HQZyFwn- zmIi}{B3%Zw0=k89{mF=aQBSRvo5lJIKJ7{@GKc#K*Ti9+T(Wx;l-XFx;e)z^nIu znUhI%`PlJ@9vgsGT|)z69+lCN;PYlPUQeRiXa#aE zgb9=PpkAfAinH9}`nhCLtNV0OHaykIi~g2OyN`X)`Ru}*bc$W?wtiVM@aeolb?H{$ zI%O=d*i&DK)5XU}2&1gEW6enEE%{_&-pf}n?AiJ=Gc%>m8uoYS0)LRD{|H8%`h`%) z2v6RN>3;9qd^{fmMb>FINm%bf%7)8n5@Ot~f>()w7fLb*gry(lbUB2~Z@ni7wEunh zMb>~rN$zBpuC*~8$QF&J2EYn15v}2G0-jNDBI_YEI?-Re9JQvsj>2W+Z4a!R@5Twg zqD>C`v}+2N8xZX;DVU?L-y#{9 zLy|D_2azBhx(%6%|ICP&v|5al2Fz0|!0K3ySqC!v?2GKbUz3&rP>+MeYsG1BjRyMK z)Uf%=P-Q~XEY0BNe$#|+(?1B05_{jUs8xndcT~cT;q-o&td(kYTgp*~`jZ+@qlhO` zLZ7>}cuE_Cg4^5j%;sE4o2I%IcwPz*QBp|zuW4SpZ-aMifyfggCX@y-465TbN(wFj zW(K_25@R(!#J|xKdbY{K1v06haUNSCug9>#q(vRS{$+MwD%Nj-eK2>XUc2T4Jqv3ARt!1${PeEjUWOzZcaj&{%HtqE>6ZsAFjNkZ)ftfo!YdJFETB+fh% z)AL)$r)l-~S7qr)ONpR?Yk2uwKaERE zi7CpEUR;mDuB^XHwN){Mlf5nk$rj9LxV>Y2JO}$?NT(~$!{L3Ebgyzs@lMns6oHx; zxw_QD0ejQ~3jmw&uBi=B&3~gp@EE$Grndx*oho_WDTN+mE3cWJw`Ef%xP8^(e(Y zxzcOdZT51)`5XFsch>g$-|MtEWrVNuG=`LfF=bt)m6;XN&dof>PqH@3v)1m;ivJzi z&6q!%`ax82C5A!==$dct=cGCaU5HphcAiwSy+jA)s>k(SgOg^k zdF~Fi%Fyb>T0`SO4*+~B)_)STiDx;HMn~HM2G1ASJKsQSqqB_A4IrM|*70c&S4Rj5SjRSra24G7_;~23SaFO>J!v@AK zYh(7Y@Ui;uELyJEB~YN@%VD5C3YC|aGcYhHvxU?yMF`vn{ZzDB<;Ux1PE=Z~>eWW6 zJJmi_MFQ_prxh_oUC+}iCfbU0OT4m>n!~T}M}`_0(G-6Xt{nSAkMz?zSFLMDTMBB9O``Qy;=S#k#vr31wg3Y+!d~!PZ}H>($CcG;qc$E)(kY$++|Que zTBY?@df}d3|8^SLga~C(?Ve!;;ejjRc4R_aM8hx{nA-TqCI%~`@;w&pXRj55J^6BR z5v#x2Q}ep!;n^-Kf>;ekGHLhwl1bwwbX3-#o!JDb1Q(3als^8H(6AL+LR^ z0(ReH#L>a%nalFiK8G>T)yzp7>elwES8JPf<@~vQ3v3d z$J4QDX8i{HFc`Sh(qHKER3=#M$!nC(y7&q3-#TzVA3|7hv9VZzXpOYh(hNFfh*4om zgiAh%HAmkz?fhLXRhzJ*qAfHH6e+ztUJq;t*29sXL?ta_p5Z2vG3$$h30uq~P_>LV zv2gMk(IBLX{5=Ca{`VLh0peLz0-SmRrWHQvDJ|^bY9SoLo3{oW_7lxlfk~gKnc^{Ps?A z13!)eztoILYD71Bvjt7Lh!}Oo8;A&-22rIJO0kr}#4AY&r>4c-zGOP;j~{ns)bYCL zs`a#!s^@yD+N)v)rODGY5+@Z+dWWY|L5BHThc*z_3Bl=fy)M|5usM@i_ysZhC5HZZ zKfS4BE1)uc4$C4t-NdYP1VXP%j1>=`j^_uHcU9eVw<{aCar?^@UgzN_CD5B&=izKG zm>Nl?0%P&xekIL2cjD?B(FqFOGDHPMVPlw;)?ZF^m0yDE4_i%nefwLTkNg9!at?!k z*2Di+*WWHE7)r$#K&bN>^#@ZV!lT_q$%v)IezyCQC@Ps2v9u9CZQ+5Nam-cJ6u0Is z#qO;l9hdrtD0>oX34!Ov12L5ia9K* za7UNOt9#`2@mtU8gP{%el1V0$!~tuAZ0ONGUOV=k>mX4KT;y$=fRb11ip~T84``6V^1ZG5D6D@`%uBNCc2M_loOw{u> zD{2wW{mqseM9c^|Rrm}|&D>LuF+}9F{D_EU^>F02E%}buM-vW-W}8W-tWFl$`n`Ia zmBb7^T~b)`MqlHAJ@te_kHAb56U}IHYOMXa&;!<8OrFL%(Qe1o5)7VJ-9k$pAfrZT zN(%0Gu>r-^5(Grr2*}|#GjSane^R9q$tX?w#7fjbd1b#QuYwg}N!r9h)JbSz@xKrl z85*RCGP#+M%k;$$l7Xo_GUaPdj!__l)Dm>Ek}qb6S9#q_u5)xg5-e!8(<~PM=U7Mm zSEo|`erfuVhld*Hyd?@Kl~v~Jj6dZ3GMONrmMzyrXIj4{tHrzYtflqYOzCZ@W2q`2 zt~=PF2vosH16|ppK&4YDR*B;}wI~+)*m~4%$-af6A6DB9qtmyCrs?;M?)9WpB_R@O5syl$)*SPg&2 zC)3{iWQ73Hkl|Mm09cV(>o0&(Q4St7^THj283_S|0H*E<%+e z@Vw`p4Tf(bXpV}@L_bsf+ar#v0LT!&9!u?1_nn-`TqzN}5}<;$4DH_FAD-ne%I3d+ zJZe=?vx)3SrPo%v0x&!|i$f`3=*azfB$t0Su=!(E%Oiz`aL=c=Yc&(VW4<`;b^G;V z*S_LxK4Onv!pZl2Z(q+G)$7M$ zVo&Zr@>w~QsGXN8!Y=1KA3HZXNF5H#?h9*8zQ^zO!dF>^=1$Kh4{bYBDua_mk7Ef6 zEf1?+GjD1<9zM=@7CyUo-+I!nWIjG#w>MNl3XvI4!^CZ#cN-tw-c9WR}$G0Y!3H@-S#pR*T3qlQJ%jIFv>JiE8gEDuj}t5+!&mXz3Y+ z&OY&!zh)LFVyn8j-dSe3UK&?V7yUoB-F}SxpUs2#KShKK z7e_o~4&}GQvj|$dml{r_&_H+-RlEk^j@B*P9tu3U_&!Ljt5A{W29S^-iUC&!95X<_ zXiCMN+iB`WkR^Q)ggRogSNlamysYq+{#T~%N3UL%1J;;iMeVd7kDB}||Zkt9S zgOaHY1XN^Sm9Sp717M^K`66rUZ|9CySuq@Y2VdV%tMCa)8{ktpG-A=ZVZv#O0${mY zLDJQU9WbBVY*w(QQ4z;T@E-K}3v%`z(BykV-VuVq>l!oLmYZ%h5NM(}pumP_hONqB zS2_k#_NPu^{&mmXAzrYFwWnC!+nenTh1_2W{$bJA*nPJKb#ju5#1KdW#pu@ZdlkCN zk+5P4t^t&`*c27Vn({0vYDkMpqO_3+J&!Uk&&c*Z@4d=ZpEP$2Z~t<*!t;Dq?EcEG zpiIXbBoag%3{=Bfrr2UBPcE`VWWtJ@KHDDz^|z21LiMVnl8}XekAq=^;SOg3%*J`(YxeQ`}y2 zXA%|EXa`Zb6!EJrfhy=9^9REBr`CPa`4To(S!E!H3~_%BQ^WLOJ)NJ4KqY<}+nq11 zCOjruG=*-2&`5aMb*OY=l;%a$pPQ_oblK7|j8qy79*0qkm4}}@d`K%))Z4XTaS1vj zdtdKE(Gl0w-GRTYAGxGTbK^4i?0+bD(^?U2gpNBYH&hfOeaI^T1U|pH3<~v#!?tRq42-@!M7Faoz-q#+LE;dpWPwU%U zu;`HcCp7bQ=cvqv&RgS8QTO=5(i}Xh%->nj1`VNr^rY4T->y_{HUd27LUG}|Bj=!k z7ONkqO~5&8kW`3%K|ymqk}mq`C?-`9+I-hC zmO3^dhW?D~7MXDk145j5T0$H-Sq&H*egeixC{exs>QFeNkXNsFz*ys>Q&#zWL?y;X zMoJF+gm_4ZFKcDjMXG9nPxPT=nUT|8KX};5PxGUX-rJRgT^{Zv`y?Jd?2=?Ysce;5 z#}Wm%BdN3PKFrGdzXrOWHr}GE&q4QOCC_)0U%u+Hv%o2k2u@7BYB5tO^%z3USdw*2 z*3`jHD`G*rL7FKgnsjqQ@{OiqG^%JR4E)FstzE45`* zjWb9PsDwjXZ@a;@YK%H~)BG^FF`)6$d!S-sNdNOIlN{c7K(zbTJGI-3r~ST#?;Ujs zQxzN7Bx5fD+3}@7YHESN_Yn3Bq ztAvA-k1VVc8IJ*906PFS(nuE3far`}9- zrv)onc@YZ4zrA`!S99ELt!Vq2wqpGnu0!{IY2_?kYG5s{G?4LLw`q^?PQ_v%hLgOk zKH>qyG?DVBH+6dVlD|hA6LZk;#icY)HmfTd5NzBHqRXR^YmWRG6LrSYGYVAsAb05>z^;Hu}lK-qu7rvs#u(fB3%z~Z!5 z$|o7PkNYwycF>dNVF{x@H-NC}pXG2#W=i^kENud{JUC^o;+I+d-C>hGm&(8oIQA|Z zqWE~WHTRzl@@%ab?YjcVJ3&K=SY?~WUspuqo37Rrr{RMA`=FXUztHrc{3TVQDDZLum@zUnOnCP0r)JVN#J0m$3JCyoNs z_XoKipI_~@U?c;bx;d%B?kyI{qcOcRgwyl7*@N&i(@?R&j)AKoWt^KAtgH`;{lO#atb`4{~a z#Y^Sv?7qWhKVw}EC%U2%j)nYELAO-gje~L4J_Ta)Gp&9mbTY@GrA}eV(s_yu!E)>r zS2^U$sx9}4*^#iqkGi`aJW$!Rm)*THdK4DFHsfhxqR;9mI&!|g~TmNHTQ7gN14mN7$Mw5I-*f+sa5?rT#=~<*t zx0jIj|E8t7KfTNlBP}fL6PM-F*UbljfUZ6wpLo}EY~o#6xV#>k@&2@8T1q$z;tQPt z8*qS|suRdvHH%!Fon|XMo$u+K zno|}aQqZL_WWcQeV0=Ut;Ytrfl>O%Je90+Fv#0E=XRS4*LZlPzWTg=`rpKfJ?50q! zv2f^yVTR;kJrvit*u9S)CYYf*!}rpoVj_s4lOBb#dSy<}Ov7YGH|JhRBDqqj_I+jkw`6xtF@vOR-tKFjtwA|#Xuhs&pfQU!&2 z?0=yC`CNFNn@0AKg!&r_Pjyss4wUhg@uE-7-55AjoReB1y+eQDI zE`e$O^E0`Q4cF zD9NqBoiA}bYg>T!Y5fPXUu?T@5m5qW&!y5}xTJGu4^(FLW4M2U)hjwwFTdN|s>a5e zG}@mVcL1TK5HQW^al!Cfb?>Qa0RMEv0Et7yU%jwlKdBpkbBo7A)P>arcoauW80H22 z9xn8oC^nUUKLDBafQ+e0&4Hoh0>f#SF6HV>YnBJaF4JdsRxx!dchTpaa*|Na3%vIt zv;;e~7UtMnS0)(A)-?_9;Jdr2Y;;y6A7Vf zkOb@)v|dcbY&=wo^>T+9Yicb%dB&6R!bCRo?y$fFa0D$ncPXRvYm%j$ia-e1D*eOi z=tCK-Y3^|`T&APa!Ra@Grez_56*T0NYWfk!xou?OE7 zbq1qg$uLGue3A(b@^gxy1Q(r9Fl-txA3a#brKmwB4U{c+fOAp0JIhC^s|_J;<>oYX zvRa;xv&RRgWJXI7i9)`Rr7ekwhEEY$Q|DR6%1~L^F@lNzU#kUYGil&6Kfz4N<{GZJ zc=~xa3h-U04@sv1Ta(QwFH~B4+}JKsfXlK!kJc)YmQRa4pS*D0fm~jttwi{!SZ~sQ z^`YcCkJ8mfbmbxH<9-#bu$$+D?e8BxePeaQZ3>C_858}NRQYe6BTn%U2Ew8P;=F7W zl-c#4{E10?ciTepy~ww7?N01IKMDZuc8!?8Z|il>cDn|#$X#W!lJ-czan_U5tpu@F zAZ#5tpo(*`n&B8Qr7X%2!t)((R9QnKGIzDeqTuZ;oTZ~p&e=A}s8DgFCwaHKAFCU+ zn-eCz{InroY~;rIkdlIAU&1lKi)~7RB20sxR7P9ErJGa645Ils%zg zOGlVA(TKT%u7p=cBHM7vl@A;AwcT3fpJ(mzY3RrQoP(3{U8XuN(kJDTUj0@Y{{;7F zH6cvfG$nZkjVd$J(_d-A8P8)>Xp1s!hN1n1TgW$Dsz`&ShN;EyAy87qTc~qr9AM4q z!O@`{7%N&5m5rpLBRC66H+IFH7p|Pn)<|8R`tSFR5a`5vp zA=4XcWl26Ob73P?VFt%vW!Ok43Bu;m+mu`YOcLz}HrW3x<8Py1HZi|N!+yc1 z^@(fd%l!}u5=~69{gt6MVIvg;!V)J#3^CJTC!$ZB=RwQ&|2rRP-LH&Mg9aU{8A(sC z^%2iffh3Sq!Qn`tBxtipht!%M>WCWB>*uC?DbUXXCT!a;8Vs^)tRci9Vj@`<#gL{D z_wf@)?J%j8pbj}Ff^S6I%xW1*4u+{!!ZnQb|%uq)`B-Oy%?o$TW}F zfYMw98vLXaWB+O=z&k3@NKQQhU}scMamvD$4-pF@Ak z&hzbLmH7RNn6~{PX>CN9;B`2A?gR4EZuyGn@csV<$1wleCwrO$@9cK!b6R0IHj0P| zEE77BqunHvaLy($NshSfB3Z=1pYS{F+=48H|lOEjZ-M3P|-St$qn+ z-fPO#c&xaHS>F}AZ}s$W#XHfzc`h{oe|}LqEvkLcQu4WSw*`ua7j}-2w7L-e3JX?!uf)jlhOGriwmz12;ilmMx zM~lFWCGUGcTND_YE?zG!XJeEm^)YIYufX`Liw-oL8V-P~q%r-tds+I(=gvdO^g%;q z67q@msPA9wHu-0n=htWvohLVBJ7SW)mosyn;l+)Yi|(5e?>SC#Bt`P0xdg4=fRQEI ze3fDsXMjX0NQW+8+nK_Q+P2UVASW1Ef?5X~xfD_TpZ&(nJ%MF1rc`#4A9FtSos!Yn^Ly2@r=3XM6zH>)RU9P+Bn$B7bMUT+dI8Fj8C z6#C)36ejyRi@IB%Bl`ZlzF7*uTUn0b(kZANWR3V^37W!sD@15-O$GSzp56)JwXyH< zzn96-Z-MO7*RVlZ`XWHiU+0hu{P(7e!9iAM7rX8*bS8mTLH(ufjy<3kXNHS*Vq{fr z?z&*mye4gropUJSD19{e42W@DAE&(!Na9#CUD{hewN=d?Z}=Q5>_{PnCkI$%BDwTa z_z;}HE}eQgpxuf179#3V)s{v`bwv8GlvYO+?5(UnKjB&#j(P0;luQM}^RiLP)@I_h zqq*Y0O_PSO8B1`Hc`Emm@Sg&X8YbMyXcs^*H z`cUZl{}z7kge`Vtwu@(Ews%?YvSVpuIIDxsA5T&fr4>)=)zrjU3piXgB>=KEngGWL zHA6LHRYU@TpS9(gpYOgTF9W`qW4dHZ3eh*0DYL<7##21}o!hsVPm7w9HPY%2Twy8> zQ86maEWVmRVYd>>(+Pr-d%v70Q>B$mZ+VbX?d9?d>yie2C5#P~99US76UAug*OC(6 z&gwEjXiXlcPNcR1_pXLAd@Bb4?y?7_|KDa>)s5*|M5=r!I)D_mgH>*sC^Z#9BtbL& zA6HTu@Zil1{MhbeiO%j5>n1|GoW+JFo;kai9HI;nW(;X!8Ab|XWLU_xHx zMkkn+d-SbBLI`sqUzdUM3~q-jtn~ApimtP5(8vkS^*E6q=_i{DcK_>#fQSu9)Q0)^ zcVo53IpPvq(m!k-)e{&~$01aA)-{Nv+p+c0b(P*(KY&0@_CDT8WWFG0;dXPn6}$2D zM(4VEeqH~;AY{ zuNGPyQQ1B>TpukSV))A_techFm}HO~Od%R%FBENQocX{K?DB{^2)L<5&U#|E1So!| z6;!s;A7t zLBC}J+&MfcS$TUpPx1+;^>HlWm$49Wr6GG8qqC`1vU-eu*947U)fbmOqDB`OsjlT} zXl?8n!i@#NOsdZ|l6?^xpQ^q}_#l1bo!K$~OR0!mxo-IPhjpB-Z`G99+CLcB1pGZ`BJ3T-NM zo|qe6(|V2s*eHV?1(=py;d<0MwuM&0qB9SD<oT3YU^j?(F{ z;wG6igV!gcdp%d@kRQG`NmQ<#-R(h%PrJo7ZC7_puI=l4CmX=47$LSv=C@at3tt8Q z#SvHg#e8h+^ua_Ee195JV7`nH79Q(-TIkg%B>Zo1mOcW4 z_6AQRD|NV|{#4HWdZ!SnpmlWU-9lVWvS(K&jY~%C55{mPZsi^L37?c4Q@`vlr9q7T z=q_9uc0Sk9`$h!AXFy{!&BjFH~4s<)eqWdH&_K7NWHOw=@h`>bulY^4-fTD0V}@|WBA3z9y(M? zmGdwVb|44n9R#c!EB!}HHRRaO8_M~32S8!0_htFawjZJJSJgA(NAloCB)aTBj` zrnw@NVhNnHBIKe`Nj1wkRol~O3<>_68Rs@6xz#qfmP@i-kfDZp<*^v|UDPW`@Hxxz z@}Y{T9=xxH_uQY#*Ryrz640WH%YaXQu4gAIfA({mWFOo3{aLqO=N*xBcrIOWl`bCopV{YgP>o-rTeb?jp{4P=ore&LTLDp{o|=6Js&9V9vbFEut*D3ScW|e_ z34R)MHkN-k-GDkxrHYCmfHLes&S@XD$;WR`G?}Rd^K3zb??zmq)OS#-uJSwZB zkB&EqWBgw}VkF8b%phyHIxxHwQS1F_zejhCs=?OkG=tKjF+mC4PX$t#Py~_bHc|Kzlml`<=sor;z2y})|4!gkPd&@zseuANNnpsiv za!yKBG>F^k!`yvES6_YujDieb&O?=I*oL)m^q;vi16Wd#*Km&nByIeJ?}Fs!9O9(9 zE)9VqTZ<(XNzm-S=1RDE7-#ZXClQLDf{pltoow8kIFq9Z^NkU?j(GE==L{X| zzOP8+r6vPHL(xj{q)(zD8CG0rk8lyhQ(D>?Y$PO%0Z&xLLJS(lOyvy$#(Alz8{f)f zGgjOovAV@dBD(t&b#$p}7=fdO2Whk+Jo3`mm=DzOVyp}UsIvYs>fr-G={b#4niL*A zdqef|SvrJW&#;xjWdyM?DcRAiCdvLE$EZy|Na~1K_h2sGAHBX`K079 zpDZi=!9YQ)_OFD&luDL+O|4iq_U>m<*RcDDC4YMykgQ(SlRd=E1#9O8ctfYzsFuuH zQN_rPK|ioVf(x`L>W#fGJa6%ZG~`rsVHiY3P>LX=Q{uPk!lVg79XPj4X$V+3Zz1#? z>7Esr^f6SheR}=1=>hs|_o`Wex4|m?bu<+w-(pxg+s3%cyF$;VL&?>(ztcrwX(Kq3 z6*b7F{(Z)-6XUc8tWudO->D_9(W`j05REXtew?* zRv-gw9os|~HNLuN2KHXd!gg~*HN&Owv^aLf>OzK~)QNBq*eiiQFL?NhQ)n^?5 zwMo~3;y9*H1!wd|c@N$l%fOx<9$3RYbw4{NXB1pD=1Te0^z`Nq&K_PmNGL_&#T&=6 zGIlF|23CMAF_DFv5w3aR+t+~ab52VSPb*997bxso3@3##78N(9Q+$-}WKfWu{{j)i zRezbq^8{E!Wr;o#xo}nZx(ZlSAh0mnE_-7y*g8x`@iD=ja-r%ePnkivlMd|#YPXuS zNb&YZ##Cyb0x?fKhjhOvlfFE|J$oKr68h6vZ_H?)JkgIuw?b!HZco9DO~rXUr=bjq z4ig4mQ|J?*YV~eqpB-#X_^o$~>~_2bDT&uM2iWRBx~$hF3|U4xqr#iz$6--L%hjF? zB3HYQ4BVu&cgk*sTzFX^ktP^@j@fQJj&B%STCUYCaO!07VK%=7Iak3U3uXX?=DF-W zyuW?i2IFQqD`ojU_aJ`$4tsH7sBn8dq%P)l({wtBDj(WgJy;|0*vZv{dsuDwJHy>V zI-}OfKk-Z&bMj#ZE!ssW9M*gp{KtJy7Qv|v7!Cb#(+%_;bysZiqqvBCEfd%j98ATxO}e~{dPU}+*$aM ze)9#mY>p5C@*1{6sqslF9WKg_I*d|=!m?xr==(#XhLn5-8$K3Gh-n^35-b!=1U@ww zIOY2Nrw;)e8)+yvW#xDx{@zf|Jb9v$+b_`b@dYnN7UhwIe0?LiDwp8h&bzAP_m_#Z ziMk~97YPMznc=RJam(xShu1@&G+B-w^joafoYp^K`G3N;Q=Q>(HmDEJjR1oL8Mp@+ zjIdp2zAg+U!gGllbN`YUX^DgStiNiL|MDkK2$u*~R%V=>y`Q@gj1S*0ZgpX8w4pAK zt0DlvHm$QTc8i%CDTGENd3bIPi-~8|*DOR>JbHS4@LlaG zeDl5q#Ps1+%#g5`W}-SJTAt$wHD8G@zgo9DJQ;E#euAZS@4-FR5)kdwIXa9+W3@3V z>zDKrLYEc^0+)(oj7@)DPb|JQ+Yk1<+^*r5w_R}-;*ox3dS&cYnY^|MLhSP0(A{(O zZ7p{h<~um`%WVwTv5SaKPh0{m9eg5sZ!+=Ay*~bsX1`1$`ufr>$JMaZQ&y3=EC5!Vz+I$GX0UB=pK;o7|U2#ph%-ggOQq%Q88|?{zITV zn)`bhas;auA@~Pv*a2$?z8`z5>7c>lh77~AiugH?Hiw=7vwlvL%70mFTb zhgqx~t#n|o?npKbf>}ytI^4}FI?L{U#>y_i{VQV;*y?=L_-a1lZ06TNCaiBB*Rq?y zPQb?nF88^9)3wFJ#~L>?4~tO0lu}`sF)c+-O##{aZ)3BR1qJYTX8Wf;pL=bE(tN)r zm6e#=M_@X&JeL}x6EWhWH7(us>YCr?#y{S5{=q>GaZ)@HTw}s$VxKfHA6@DG=*Pej zoBAOE5BiOihZ2;A9R72sjPcg8H&MAy)Zw>r0HN!ef^J5RNzI3vNNG*a#RS>H*&TtN|CqU%NOi(ki&?Gz7rq54zyYR5%Y26pGNrA7HLT^}J#*}D=4-r05AtHcfv-&*4(o8X$0LPM#Qtd!OH zbtYka>Crr3BsxAvfc@dL4y&k`F*Eb-4$6PCf0F)k`vCLtAMyQVn@03yZRg)Cv5^cX zQ0sb@6NtVTkMHJ-a0~VJ>DkSPs^w>X&(gG{GLwf;|I*vlJ=nn?W3TIV)sKjbe6tyd zJP*?!qk#br{Rz7*HBUBaKydnYm}XS13}1-x$&+?Rn;hM)Jj*akcVv)ktqhHoG)P5^ z5@KBvVoU_h%58HbuvRWJNZ}^jMiad zQn=y5d`s)xj(KC$Mb#t2TD!OJLCPNe1(HP^(qHT7|NI;r3r*Y|o}Y23I3*CxYVj3b zc-3H2mYj{TUsf>DC(Faz|0e9?Hzk(;`~ILmT*Z^=NE2N* z082I6QVvQb!OX7HDRp8B&Z839C=zZkwY@weOT!8-o@?<47cl=hcGGh+gF$iJ7gXrq zHagS*gPfzg`B>TYcFOMOYnd2#1?LjPZdo}6`1N~-4vwMdP$Va^ zwG5+1y!!um`pTd<+OBCdxVr>*_u#Vl;)}aOaCaxTyGw8g?(XhR(BKv{xbyA(RK4H+ z-rA|!>AB{dK7G2QmWMnp3r$c)1z>OhqC4$sG}QE??B?0%+Ttc#t<*!9#_(0DVxjO! zem^Nfs)%3?nHot~T+ZLCyx?KPz5mrv)Y zy^Un^dmeuh9#=asF}I%+==%EmN)PF7w{^KW@NMnSbebAGgC6~@*ROX5{{>t0mO0$C zAGWkVCccu!RD`85mo?k(d)3{$#{0qHs&K1sJr<{adJuu%4MXCb^tZ2l8-XG)HGb!v zw@)K~x_#CfOpm*f|?6dg1s z%(NovtY~b~)>i-#gF`S`IJtoe2I-um5kecc_|Wu3QEBU znF@pNbiRZtIpf8jjQ6kXNO8d|W8L)GPIxC+tu<>9f^NIsmbW-7l&h}97|gNxcoF`* z_5*FM7FKtB-i|2F8efc@`*a%i(yuU)+vVt7S;qsFE00WjO-tj*Tvo2b*R0@VCYcwY z6L@kDa z1-~xZ0>`K_V{>#wifZ=t8NM=8n~a7m|J|M`+{re@3@Wju!Xf5L7g&B+bQ*Y(Sk!zM zL;~9qM85pI9-MQX#2=lPFnwpFWJBm0fISJaveMOhAKGDFay)@yl|A~N&RcAaD`vE= zzY3P5$EdTTJ3C~b@9$SPK{g^ou_908UrR7G^*(?fqv}_@N88YQT8F@R41G9B9=q$db86TTTI6t48-wQslgYz?KTYpRWw zCvHhO&Oc9CnE7u@Tmeu0vIaN7f}EUbkKF;m$HI)WrLmVe&(j|9?7TbJ!nwJ@8&^?J z=XjP+mGKYDE2hl8fAc2-UqyBn^XXmw@IhKS1h|eX*?|lEedvpu5?cD=6d18U5Lnw4 zx$mi6AwLcMIihuDA-;X&#@uqLVV6c>!x5^)$hk9eZyrD5Tzce%bnifpmQ{jHi-bX2 zS4UB*z9EIP2nbPPWGc?mmM2(bk+m+0edgW2@%Rc;)3pEjv>`pxeLOjoSA-Vlz_EWw zqKa^9Z0k!|Y$*mT2|@Jjnv$0D(xKbld6k06!|1WxH2heBFCNh`&5f@xb*f^+&4!Pt z#)%Z8otRh^WfCJ|Y)+BVW#n4<9=)_sSlxuMj?Xv`m1;CkSXqKDrPG9iU)8KpP$Frg zscBp+s>_H>GD0Lu5^uwq>l!$xOSjUnYjXu}57j>fsvHmPdHWvrf#bbTK{|3SO> z`RZ4vq1{zgI*fuUNMMEg{K$g~fQp?aG44jS=@H0>#Xl&BI2sKfK)?P*CFNaEDOb}@q&jf@b@E-Yg+ta4--;-O zU>!q|>*F*b6IX7W3NfgJu{+ikzdr>=gfTiPsR87w(+@;3kf!}AJJnBRw(^~yln=lG zI+_bOR0eT+dPX71#~B>XGYZ}~MK8cX;>W`K+AbJ{>QXin!e>+!PczTCb}`q_yFPoV z)$|SB%@ZQ*BJ=}y8#&(3Ljog7w^P%Ov~B=g5;}}{r1?m7#wmmwrH863KWXECP705F zZ{;D^n@Fxhmh-3*x5@ZNmD@AG%DXqql{!ziP0K29mdAd2goSMW6^rGT$D(m|gwSLc zl>bY^g(@yWjxRWfBqT@z@vYDDy;K1?o`k$cV{LUUv*kuEz`NiR0Sb2IKY7F#Sqq<)8!eOw(^0YeGgP_Q==i#@|4v22J6>tWUD=kYrh!2T`4 zmgEk9IZ~4_@R3ho^qCj0;O^*2Vds#tTJ6;w%D?NY2|tHkP)7Q!%cx|oJ8 zMsqRcdsR-Y&4&5ZqRS(QnW2>YMQ*4}cC`Mm`W}>Yb6rxX%5aR3nY{e*e_8<5+>#UM zJZBOh_kF6WFSpc^R&~YS2=SJfkp^K+350(9Fa-6h1s1IO!q)JQd%p;6NWN&z?{rd_ zP=~K{y~1s2`k0(n5wT(t<4I2I+*IrIZdC<@bW-y2X2>m#L+jr@ZvHG==DavIee2l~ z>A7)uRw%1B-9KX)*t~~8+iH$}A6dw~t@B3<3ck>78b` zLVJmv<9guZ=f}Y2@>y+$53bO>9Fm!gxX_r%%(XJ0e!0=--IRXojua0^{r5Z@ke4gqku-bUz8A&Vc0GWEcfP6bu{C`E+i>>!noV3>yz8O4 z_ONMDQFo=^vx`j5ctVEYr#XxXrA~!%4Es}$h%|L$it#1DfMc!8l-|%fr!_+ad5YCi zC#K43c~)c8sNh{|Y^v31J1(?J+n!IAQ@c^k5RbBbeMlZ$`-P!vd3wN>=bZO6)w6+; zY&iVRn+!j09v^M>0)Bs7{dwy}6L~Tk{q?KV2rI@>P0GIhld1uxR82cbp|3cPsV_=` zvVn_HZy^Z|yPDEmqCzyDoj8^eoxnDUS0vRsqye`!VbG#PMo~mkhX~rKF&)v(V0d+j zkydq>tA9b+g8MVeKIEW01=(7GS3pjXXFx*mvsKg~>xi2qT%J2{_g>Bd8*c=kA@AD;vQb#tX02Y$25V`ha-~W6CUU6F&AD_19HG5Lbmyc^DC8 zf_GOz!z&W~!pzhMy}k`U_G!um0 zryktUJ@Cd*9$Y2}vQOHL&Y=6!R(!mY{yo(mIe^>Lbx**~d=f{tBh17@>1hD`+h?Cm zpz~rEW8f@Q>~P*E(i40gfhV6Mt&1$decoeNcznRyz6;13;?L`!$D7nz-%vT$Zr7Q+ z%9;+u?MJ@D6xB8`!thB+Yo}kIMnz^w-}*_fgV219{-C~}=6}#@8v5PmT=?!llkPZt zJ~-g!-z-=3sJ;<^<;jR#E>zBs`} z2BQEw7r+aWf`_N%_x=LE2bEC~cJdvLXvCgxvdfHujM~7JKjKjb3niLfACHYOO*B8W zYvmjPM%K$@<`?svF)X90Tzd+o1_`H1sBr~Bl5(AieE_Ejk*VsUAzF%=JbqJ3PKW!~ zMw_UN94Z9yk>Eh*s*@Y4A_0#E^~1;ymV<|Yq_^*%ViBf@I*V3KoDNbu^s;-ef>qdB zlkM;wRifXua`7>Dz7r=dCMg!6_xye#(R%%A8R>CF!-T8VYz+OZsBd9ms5ipb47f`|f9`nDlSp-H|d z!U=~^Y6_!t)f7w<^c_2;|7+bH%Y9Htx2)V{CR{!44^3Qc9yyt!})$oA;k|LS}F zgY=+bl4YM@)>F#v*}?Bjx9iI9s;IR!z4tl0clTzJ)zaNPP04o;>uts1eI*&7oq)kY z(4Lq`R-N#i+r-fS>{XyGxd_B)R6|e;JMtPeo%3ZHlD%y*RUaT$63H_B@A$TRqY&3~ zQGj~8r3|sV}bdD z@``Q!0VXmN$uM7qR#Bt#h+Q^hi@Ibv#CLJ)te#W2r()X-zSHVfi+?LO|NF=f9U~_O zS4W>H?-^XN#Ps`lM6@+k9*M4;xGb$>O~^mcnHZ!_5~{J6qZYI`#vBPY@f}1g6`Y#%Zabhy2izMGu~%3bD=-Uo@Ti4nB*Ym*P;MSq1DC(WOb(b!TGISQ$R>{QZ($k5$IaY29xOA~8uKIlC}ApwTjaTD=0i^VvonZIuYPfF72!}gQz(!!FL{zFtJ8F4<{L7A7VWiofb5@E|DD(n%@w!XVPJjJGdMHVkRaVMBE?m) z_7)!nx+9BcBIsruIojr05cmvLw9BPZNWg{5fK!}5dZjDI!5vqv@l!{V^Qf>ufWKlU zC9@epXua4aH%pqcq27|>vTfZJCZct7AR%WPDXcCb^xOoU9Khvwgf6c9 zQBs;8m15T)5zBz4!kPrZm&yW`y|HIxO_b}wtU$6Pb&D440UJ;rW=ROv!72+?eq zWt%7Re!$@i;wKpzKD{*NyREdh3U}FDAO z{1T@bVn%#RMmj|P;5)ykBEJFztD@njc{I-_R7^|82V-EsVXEc~xfw?n7*k(%1h$_Q zClz~cbFXr~U4UKTp^Rqpgqp3w(MXS0bREnOCsMnPxNEgnyz?T)fJwj-%uoR2_Tw=+ zY3u>uNV+J6zu?DvDA1QfU2*@`Bz`2re)jgL>%&Wguyw8L;>c>+X)pHO(3&(mei~r5 zW?EqZrUAh9K$q#s@>R`UPVYzjZ++jq`atcOdzI0Ikju5wLp~Zv)9bgud!fomzj&)e zQOu$;8aA5#v&$cSv>fcR;I(@8U#ki=9tjAugEHHxxS9C!!5UNC#JGidFH~Kjk(u6X z-qBv}HNDag>lRM4Py_gTbM$&CLsyrBSGuzH`%)`*8zZHv-x@1CP>8%W>OrtFTJ? z`bMuWLKIMvHu>$wiC$OE&frL+6uxaBtPD--iaos3g^>{kWD#G12 z1reg1mJR!TI|m=#NfdC37npKAR+v3>Mn*xI&dy5|proX1wi0kZhcKEz7 zfZcwK+?R9~&NmuE4h%(ab}c;$@@vE_SsQxrtV`f8b<$~!D#b|y4RBR@$Cde7Re1g_ z0iSNSggC-$ZyK*_e>uPBeSBZy0+Uu!M7{7@&kNh@&9|zgU8bLC{=PN2c}`fmnTJq6 zi6M=XmUKrzm2&J+#e$K)7ia19f2fV3ieW=R3GoG;I2}mwvJVtcnVC07si~Ih<;9M; zIKcxTgc+E!pjsMP zTOFAGrzdfV>D!N6ud^A?A4*z=%kUNGKqJ3x z$xtMj()c7n-q6(G!Np{?Z#6Xdb*>s@*VwW-3A3;%KL%s4D~Z`Klx~5p456aRDN(9w zi4{I1N4v}()tkQm7V$oi6)8fnFC^Ok4@A`F-i{t((1IR`hwhN4tmF;y?G=*$(HC$# z{cxma+dY2FL?|dI%}fg8htAAptvB@a>A9r;`b5vh_)4(5ySrT?a%d?Ch0OafI6=T) z%YTU}w}&Ze(iw2xr3B$Js$1u*ym{AOG-v&Z zsPA6sXGbiORXzMY-iMb%MCYcagKT-H(;C-Sur+>~L(?a_C z$BK%xJ4;m4reiT}b=<-I-44nP-%;Sf-u7KZ%&ix@NpTu-P zjUXd05C{Pzm-|}&Gf*dp(U6f%KU!P+u(%*J z>4CK6hOwD%hc6%$w6cE0KNU37u|;KsNX)|5{k5W;No;w&#K~*AK@;^WJn;z?^=fr^ zN`7@t?dRl|YRZ(_IjAb^pRfa3zDg?af>U=*a`iVb_>(iFTa$+VZ)Z85Qz%{6!?Qo3 zBfoSFU;6R)r!cyv16|#am1F%T@^&2^XkXFdsykc`EWD*@@%j11>iK`n1^0(P{%|E> z9k`v#JBafPn;9G=LfzMI_W7k(6{Aou9CYd%q?mI1;~$Pj$*2TTQ-!mdbPO$qzeik> zcK_W0m(4d@qe|Ac>l|j+*_tBOHE}X%XHcn)bH=Z!hU4(Z`X7a>zW;Rb{){HWGp-l^ z#}>?wME3nl;vn!!+A(=al1!Us3wkYS46~r^;9p^GsF<`7*rzIjaQ zx|VT_dlAqE{OtvRC!jC^Mv8U_KMenO|Rj;<;dx3X^{`@VR`$LL~O z%dT$3D0aB?kMRn=O#T+HkWb4`1wZ1v#MPD5L9=0mxZ3jcF)gMAt>R^PQ;ZR^DoL%! z7;YJxe*BbW8M}m1VZ)W0XWVR^5-n;rAm$fg&MircP5}t~6a2QTKW8^>hLmp>G{eLMrL*#({oN zw+wF^6Uk@F zKw0kl0wES{jV*(0e&c(q8)!rde3Ll!x&)^icgKh#=M^)EwGj3T8aU;-{& zTRl(mN(kuYoJ7K0&H%QOF-Udei<~Qxo-3MZ9KLlyzPn>b$6m{uEQps^<>QbWmcgur z-fhpYVgL+u?}+1l5J6c}?3l-~0^$jSHinHY z!SsAme*I25zLyTYOoCw1xIZXlu9npkI>9BXq*M4$F4vc|HbC~Lqe!Ny_R36+u^W9$cyxKPz^qG9hhKv@io6xH(GQy$|lkzpL^5_V$Hot*xN#aL4 z|C0cqOU|cmKMk_#cRM@d7BFj+nKP~=qViy&K%8P*SA{qY!L19)15H-X`D{3k7Zwj* z6BTSct%poB!_zdInu26tv7m@m01rws-a^>Z3Ly1B?q<7*CVgP;l$ELj(_epTly{sJ zlr>JkXfw|Jhxw#dGC=!=LGGqF*iq)zqem!fA_pjeS7P# zjwVjSP4F=zkI%qz*?QvFWpZ3pK&E)NGIR6OF4Cu0!p4dx1s9crXS$MH{uu6)SOnTrjR zI_3wQzsm|hfLVQ{JC(}5uZ?QM$jUZS-y>N|+ljr(>(5)j95s$lVaCE8eyh+8rT^0y zD%0mbl3hc>{EIf(@3W^e@%V|I#?FI`M;_W|tEg~#u%8;-UU5d)FhWD5 zz${&l8r6z&oGHIhucCofY#pW`EC9rSqs=!bM@RO1dwk`C5Kk(9}PRQlIfn{ zaGc^7AB|n<#^wt`rh0DdTQ7}TffDm=60`(B^Z&01rIUN^w0EG}Tubm4`LX8)w+8mZ zcmkl_*sm#$7;I~_e~K7F2|tCh`jS5i^xg{OxUFb23#eA89hD2k;k>`U>p728Z+h;> z`W|uSXC52g*2nvuxBY&X=rfhXW@@=C>9WAp(d2w~E>wur6(XHI3q4{^@B6PaRb-N< z)_8p+DeNTP)s>sKz#&)@xq>Rl`5l2Cr-uIJTcAR+MlmfpWPt+onsV)B9Ry%$JeJ0J zfL?u1?V3!~lN-*zmE^3&oNK}?^4pBd(7Hw9FULDzX^Tv(wd6Wn@iBamMR{Lpd+{l+ zoS~aUH?ou&39U9`G#kCu&R-E720m+;xOxRuqO>i}7-9nR?lMm^+q+;PShx2?0g?MG z9Hq}#qV#hU#IJa02p&Z7Mcl?f_ST!yZ+@@&>`kf9! zUifv_`c<+$V+8F4l`%4iLNFA?G~~D^yHKkzKwZRuCHxL&BQ(SWQeY```3pw-iH#|9 zBd5AEU_lFx3!F1?B64NhqW@53y52jA$#MOE?`woUK=IV1lgd)Hkt4?HZ^&ARJhV-i zH$IjZen=iDJO~GR4&~nIb?zk)T$n?X1D~FmJA&4mZ3t5T6qqy076KCc0D~tD4q);88FnFei znmG#zrHfMUq<72UL@j^nU0j~Xf?BBf#b^^)ohR}!Glqus16B2=;9qZ2idn({$`BDk zu6%60ZE;kRZTEzSAIJ1Q=WM+icfC~f*;b)H8M{SC)EJ(2rC&TyCqJ3v58-4g}e?vD^08ZI$6mW3JmF(+7+Y<8Xs7rRGe7lCU|E8FA*d0 z!6;iM>acwIHDuEGnh4Y>CH;*9sq6S?m=`N}qjB(4z)b6?lyjFTeUaj;G4kYuRhY@H zoy%dB{i%gn`hGuqK*#Ku*10YBq5guM=_a3!To}-52)J5jkeF88KG@QcaO{=6QvXm< zIY_3wJ!ZvcYB@Yv=Am#GkuMm*%QYcWGKGO5R;B$_TZ2NSP?V-LG19y_beRsD1i()r zU$UVJYG{}fw?tI~>Aw-{Tstm}&r7CbK?$bPFj|crqJwt4NI;!K)QM<%Ye`q_=Eb4& z7)kS#RHr<)8Dvl*_ZN_azCOMS05+TXzLzz z=ew8x`JDgxCUoV6_TPA-E7sM+<2LMDmvPV~3n`wSBV_*T=JC_L;iuc5=NXR`lR5zb zf#-$vo}rEHj|W<2`dh6;XgPZGEF9KqWcO@@Yzw8#&{Ed05<&Aco4Zcs*OHZX^z~wJ zZTa^0GkG<-S`1N4#T$P4+VA#nS~d-kEQ$yymIf(8<4#Pv0zYc zt`qcSmEg({@2P^+OtE$B$U;RL8;Vr(6s^nxq~9cFrYQxuLC|E~@gg_V&s>~fEFoxa zAU=(N$bRV>%7W-mxaRe|jSCXuT<+}v8)d$9T+}`pPMgo&Cdil+XEiJ5h#-EG(}Y0S z9YgwB@?KHNVOu!QnLMVK=<7l1?K~x^n2iq*m3{da(LBs}@Q=fJ5Uvs$o)WKLU!f1F z{JH65tb4YFR_M1I7KSPBj*qL>pybh#<9pJ9Jrn3|NbF_l<9e?5&r;^IUYBRwKq}gqLAl%SZAuK zm=9(khMi8?jB0sP{z#u)*070vodNSh!=U;wf@E}^LCCMpWVG!1?W6Zs5F&J6h1UH3 zhaOLkpP4Do=+~#z>s){4%K}>=u0|6Xy4&(8qyq&UNjRqQ`{|ut0`GaDceYNu6xu|P zQMtZ(zn>Y-G8#Su|D)<0xBVU=S=PP3e~*x3X%8WTKVk}4RQSg1Nx9MG#o4;;FR-<> zb$ir(=~lbHAjf)WWB5vV=$zSX^ZN$8rkM~F1ljX1)&X4-1Nb#tttIx*n7w2Qa428B z#4a*>Q=)Mug1fkfwblC{$NglSB%x!MKxf+yHB1bkmma|XG4^b~LqL)}U#gy@HITw4 z&meBbOrcn3+Gy`ckCQ9IZ<1R|jTCZ66oJj|5u>ll!qhUaaZB{&98hv*C>1%`keK?} zWX-Cl9r;s=fdDHxBZQtlLnHWCf)+WQwpe~DcC};{3^^70)K;j(K9ZK-sbG7R`-?2Se+2j~Y*D!)lC<1e)Tmsia?i+k%mP@KI|U43I;Rx0!)zqt}_@wVI4 z(Z>IXGP@~hPWr}ge#DF;b|VYYVaGcQ>6a!!tLK1%zDa`z4ugk=bmsP(GNB7A zq!~us=p2_BKBO7LMhlexW)nvWV4mhRX~S;+_=iQR{Jv|3;ri0%(Y$Tz@|kI7>(UEp zHG&hk199?=prHiI7gkcU&CCe_h-Jjrsf^O!C4QjDax$Tt5HzxLMp9!e$$K=GYE4!t zX7t85*`2e?<|37AfGoX$nMUm&!rPO!L~*FF%R0)p2_Ql|9%zYJn$HIIlwxwiz< z!9;+@EAm}qRG0DTT-!`ls)OU|C!j^*;RUNm+rHan2l5Po9LJKYYP>pml?aexyrPuh zp={_02RHBN;uN?ka1Nm1RbjPer0EV9(volwonoaaqEuOC0x@Lh;nA`E@&P?#tMaKT zA_a^Zo+>0bR!i6L^(|D5=1G5<;J{m*3*m*73Xr6@VPso1@|Dqw^H8k$rfnb#fb>C? zC}o0i2;Bh*QHeZa;%)Ah2R8s)Z?hd83X#QWGK?IoUN-req|A+=Dw~R#M5c(p%noia z<_IMoxaDinguZqoR}&1Nx`Ll;O(hbcB}q#q63z;hQHRXc|3;|uBUljeBPWlZ|D@X* zN=YHY9V_J0Au^LM^O@&rVrk*y!eOi=<(VY3nn1Hm(y7i}c^uVsT2%KSr{&o9x|Npw z>W%OFRAT9sK*AriqE80z{6DEE@?97*M{LB&9S;d*ZA>UJ)BF~G+N{a_^x?1X-kMYC zqeIiK0C;`j;|Pnuni$}qWKxA%(K@xC&?xI+;~U+KNKs=a7)(xkkg2UXnIpfIT4-)a zKGz7KK-gKr*Lq%(jl0t>2E}t7c>xg~=%R6w`Y+0y9wzf;Kf}b{l9Vv1<YOxQJO ze0YAs;*0g(c>>G54s^d^e3bRMdVuKM>UtWnz<3UV+G<_eQE+cJsD|RQV9@#7>a@ua<(igGgG^XH!9{8 zZ2USUVV>2cW;=#=DnSO+kEyySO1ecLS^rU`hLAc`r8_?JV=x3w!6_@fEXufvZs(gJ zaK}!x+FRb^-s#8o$8?R2()LNUz}mZKgVE^VzxROW)6-9vhS&dw)KjD5WacbG)XdzJ zQ2wM(>7z~G>;ze^wPX^MiYZERGr&?cCEt@V85?BJ+xN=pPjDs(7k5&+OP`i=r= z3ULzBicL#?X0%Et$bd6~ZYBIOuEEi~@#PNXq#j}EV{oiq)&k~SGmSe^7Rdt?JXjhP zk&@!*&zMJPET02(Dvox|D^jx(<+)Bb_%S<)d8j-Yq@Xt)DI+A+z)`UzGNLodg@DHJ zqqj8w!r{$)Md(bvE6!-<-{l6^*a(u6>6wtF%WL{)w1C5(e$^^-6taZC8lSx#aqLCB zrwE`r6_&eWJqsayEQDQr#TSXCX+KVx)CSwQH|J;hLi@f-%GTM&0@a_`NNmXr`ALZG z8saQy{t2Z_YfELNyOtTq2{bg8w!o-1X(}ooXtc-@L){Mfzb>X&6p)lbCg!&P(x=CH zon;SP#sC;t?Jp&Ktz*OX={@P*Ond`C<9|WHDYg{%@|lQR`#ayOGrx?;PccvujP4+4 z_NZn09M~wYP@u2UjeH>oFcja_EqEC4((W4QGHO$}kBo)(m9TQtSxikKvn#6!7p_XC z->3k{lJJ-3`~Px&qlAmv?6yHmj4W8{kGdez!kR9;B$6a1DIiqOWU(oXgjo?h>U?hN zhn+>937BS#ntk@NFA_A(%;Bige?MrYd78qr__#NF{NIc`Hd$<<3(=Fuk*5yPlDG@{ z=}X-e)m>SvA$rqz(tm>i3>uyZovbB9x7AgG%P12e?uyg^=@@ef-q4s+y24pO6kzCZ zEgx_|l(nM_sq+=WdRvSEFhI>$sCc5a07^F{ zHv{bz@YU1*h;-uHwc<#rk~Rv*yp&9?IyoBf=nhUjwu3_WXB+zW99xzf@IoS1FH=wy zooZQo++Nm`1=o8mgzA6D;|uwN;9C;CepM(Hd9ANA;AdrY@`VO1u9k&utqelVU75;s zF|VJG$N#>HIc%Z9RN)^+dvTX5lV{(d~@ z`A7g9vAS?AoHqtgWH+*|k6m}Pk{p6JRP*4#t4pzGLIyW)P^|} zS+i%gbpNI-VQ$y|Q&1@p=OBYhk>8|W{%e_$?LejfO|&I2X(vo*_QavFNXqX-MFJfd{*eZ=MIz~=k3v&N_voYL z;?fm}{V^a{^34hMCCVh(@p!HUb5z`08SRO3Px|=Oh_uA*W=X;?`}|NiMxjP93izIS zca^g&(&`V}w-9I_JC^4?ZluX@qlrBx7isFY{+AX!d5y6>ZsN9HgN+q}yaTHj zo&QowHElws_%MgsB2GY5@F`?D202CxAi^pcLcZuwv>)=3th$e<;}e51dD);;3^Sg0 zUk+-85i)hkYaCBus*23oRJZ(}=c_y=#_A~tbxra}{R~V6*dc(0{Mkkk1p4d{dnQKt z;J)^is%U0__maryuzbGLZ8AgYUy22{B%>J46*~iiCx&XW%IxkbK3&1kG1!P-i=E|q zaYHT=iYz?vHWBq1btFYXNg=MD!XWwqD)J#S%`=j`PL35HTonP+*(R5GTYYQ6VpMMvTK+QL{z*(^3=goEBEyM zgIP$Y(@Y#cq<6hbzBuWXJbdrg&@sO)duN`d&}|9Tdq_go)XzM;jyU?4i*faukM%Yv z((e0M8GZeJ{O7obt>Nu0G4QWoa0C1Gtu)lfN3FM3Z_V0WPa~!OpX%7{*H6EW@O#>J zVqX0E=lTRqeeMCDZT%h2{By678cJ&F!-~T-baN0Wj)K_`C@bq#%C1rzcgegMoCI&P zH@9sH&oT0t5y4oBl?RLi)e0`LLJLFeuoNwBYvDd|LE2eF>okgw;-)B#Eq{nD zMIl1w!8!UdTJu&<$Jk<4e=@woIK)|JdL1!*CCoq)POz}eJdc4q9yKu-WW^w)RrPH1l6@=-!BP$uY9&mF^^tbjIP|A49njN*Mai4& z&KXwKd|R{E(n8TzmD}_0A$3pxV%U9v!3-nWrTspfoIC>gmBR!J1RMu zW=`lvRV9m>o?F6)i5z0pBW<+wXYh5((PQekjb^7zrRTe9mB@#k3H#*smSF?RtQ?LR z{>5Y0`W_V0v|^$cDXCRHr;PN-t`KaEHaX`FsKu3RocuG5lcUsOQZ}yCM!vWH51SsY zwPR9!t#0L4&tPLo0Qmo?1Y{1TVu-e};Som+5kT`tlUw}1JKSws1BVRKuh|CKe7M~Lv| zWF?`shwu05W12%cpH=l>yXEj@${=M{z}vBQ)M8lWc7o+ogvGzWgFO^sr7)zK`}XTM zQvpMsoHM6W$!Sx=_Yq>&PUjHD+OeBo>6UTNJt-+E$1D|e$v1`MIC3BmNC%^oWuocR zw(j0Yn;g9++EHJgInYS4Jv21)XBY-F^2ulrynHo4wp&hPJFX_qkia*;;#}|+}Utfom zo|A(PXeO36!XQ@pvY~6Voc)cAc)Ud*VCLKB-_ff6L)T0@7v1m1^y)T(PgmJ%9#_Ic z9m6qS3CkD&ikK{U`*k!+o-KLESiOsq=&(rf0W?unC5hd>P*Ynf{hJNMM9tBp_m9iE zmcNJ5*`*IM7>kz;9WdSmP4{)-my+uAO_5tbrjo*wc|YY9Y^*_Z#yS(jRSFa3if@0i z+02d)#JF%tiK3ZhNtDHZA-h$5TkiBcg|9Soc}tWc`jMvWjvarDQ-l3IO*Ee=JPb%QVRPXbvkOD^|;jl zF3wEpMSZv;gY%E*zgx6+UR_i@FV7oZi*N=reZQzPqRRjJC4v)_8*%3Z01ah_C-dZ> zEAzu$%o@KKZ+A!sKbF3^iV=ak{;_M;&Nx zCd^$QSt_NL$i4Ta#II=9JbJ=Yej)~&=mx07OK%^a89Q0uj#nQ%heB%!k9I%t&F+EW zZ~+GUjN5drksRNA&C@;~I*5<+4%ykQ+IDV?4c?=W@$9aj7e(?-e&^duU`8478-G&ZP zfe(Wm8J7`;=Gg;f@((C+Sqv||_Ym_-I*Zh0_Q72BBd4IcnRfYxaFZu|p^-|HKHA&)?` zJJf?6o}l9+*CFWEi)#h6lqDkEl^;F)ly!O294D(eo}(V+g^{cTMNpzF_aRM842!vdu*G z>45WT@VC6=KAc}$q@LS|#*-}xqa=C&8hT5PFCTxeN}mU|@1Pvbrmp+GzQ@*W&$CZ&e++_?-Js`D9rYVpz2S9xw_TiV`&b4AyxCp_Uun0F7+-yqiJF18 zJG?YJg(EpyMK+*i{s+!ovZ}&U2g1IXXw9PeTF0=K zMVz-%HJ5m`;9y|^vG=}O6+Zl2F6>`=s35Y-0X5cmEAt+^X}oy8l_GT65!vj7MepkI zf$gbNi6u|I(<7>+IbD5da(bjmRQtE!t5b?DgN5eVulb3SSIv+xRU@`eFfT-(wpRB)PBj zE9+=-+6I%cTK9y#H}6e#1!3g$(DbXxW4;vZHDv3c_bSXR#!7iPJ(jQ){-N1~55h=b zPaDr95Pq({a{Qn#vxnDfCU>QZQF5MX>Auqun|_?ba|O|>A?Qy6$) z|9Eo#J!>uWrB3ke0wH~rtDyo_@WUWxP~tY0Gq2oZe)4D!VL;Ufe496gdMxO?*rim} zWcqu?pf<_v?|dxOMw%X?ej7f4v2w3Rg(xUip{KuBWTuAVSVYyP3m*b(NYVi(PtBhQ z#UDj~3)rVo%Ooo1(AsE8N0LkvSNndkwR43K9{E{ijI04 zIzjSVoig``ZzC=p9?GpO7AzPiGYJ=!)RKxF`FcX0!En3NE#SF)#XC>Y_*-kt;tcKIH+O)QV6?ykXIi+ivZFYa!|Ay{#T;_g!1DXxX$4#geb^!d;GzBhA|OJkIwZpO!%0+*fs0|Die}-%NrhzX>~QBTR&l&Y+4rHO z_^uty=GglSG}KR-sNZlsz7gfaEz4X9Osuby%^T;?XPb3E-V;q%*DKa^DXWLs@4)eS zsYq2s5bTyv(+IHSD`00cpxp&Mrp9esvD((^F!AX^+pYf=N0*Jx$!Zu`SYw zFFuH%1L)q6W>)QX%o!*bB#vdQO2DN;h%*jgyKAWaqWiVT6E+@QYNaRLSoi5%S6UHI zH1om1hi7l$u6~d-tnN$rfMLye^ZC4nZ9w3(!wRhxw<1#wntdQrXxf<@Z9;sGP!hQk z@~lSUt($l~n?)8G>QkKQ#QPU|Rj}t;at?CBXf6GB7|@9KIA!CD!N@p63^m_y5>>Ad zFj7CBdSFp3z{Ic&F^5!W5ciZ0;@pqMD6w>H&(5CLH1%q=OkN-*9W$-ly{0Q$y(=Rd zTwCi|J@E>x%yOvCi%J=uq^4LQc^SsNxjn9KM~V>cMDpjbL-YLg}PvL~yB! zQH815B?Zug)A70VOuCmfou4)xk<(KUMd@hJd zV4wp@6G<+ucnuMRH(6~rA&4|8d{)^6KhE{^N8r1l*=t`Z4=`0}pis+|0_LZQL@FG8 z^_LNHq*5km*uG5>xH-eMJf_-c%Y2!@?XuL2&xrc;2HVA}FO8^eGIU;D9XCV@w;u0u_GYeu3a)o8->uQi@& zU+zkKBYxoWFiQsXPJFHv$cuD*hh6XexXfnZX1Qq$$}c8~P|_lpp*9kdU$wQC8_6tJ z)k+F6q8s=g@3~*=xRc$ayW2&$4(f7Uw{!6yMEXxVYiSC(r zIWca@{E{kG_{RB)HTaSL%{W23YN%->@B9!5rXovPU@dgob`lcq%qM3L01lS_fX z>suCtYD~!mz4Zqlw&riB zS+<3-PQyt|BZ6=s6gK6l@&_@yTs?o#8%_#KotrA!QaW@OF^k10@*%hUkcZQt*F)Nm`g_?BwN-%y5nd(d@dbgN=(4+eXv zF#UQIf-u>bhhWQGM?tYU$cUi8;GzV#UV@hn)qk7hAtjN*f^v#TMV|moAejs}Ms5{? zg%P$A@k@T^*%nvK;9#97YDdC^5~u+u$8n-hXKgN1Hd1)uD2+2mxpO!#Q+H)JP_-(K zAejEW?8+#n0TU|*kRK*7uBy}S-?dZ7_2F`9u2|yrUV`DKG$hvv&#_1}_prN>c8CD%ixME1 zXgt{Vm!M*jgOgO9h3p{FnZVTuDP9Q!PCBVX$RI*5NK!ty`F>hHBJe2UD`NaJ9D-?I zV(RsTc|{A*r|{@S9+Yla#~IRuXa1A9oId}rnE&f(>$peGs zuhaPV+P0Y+yY5xw9=kp9oQ+qyXp1|Q_&T`VJry?Zb6qyyT13{#5+3g#m_@usEFerg zqGxVnw|h)^ zp2}epSl(T09V{F#`)FCgh@$YAe!ZjbAU6Hjw<#kus$x(j=5sjbNZD z+j-55EjhNwps@nLIZzE7$%MtZig36b(#KCzR!p!e2K5(K6`+UHXAk~PCRr8^7BQL6DhMwBLt^UVMpLfBu;s19bHiWkR|akV-MAt!~8it^Lt|R zM(!`(9fzpM*c-ZoobX4>|E&esw?AzdXIcwKkz`RIv00HzWzRXfqeCv$*)F{h`~HC% z%}`_*7OSIC>NuGkJzs3)D_Xuh>P2RFS(Y5DL{K?oJ}YRY|HYm<(3S!V#}A*ol^Ucz z<)}!97Mtr~k)GmMiQEu(11=>Xnm=Q++95a??jm0-{5{-}AC7^XWPP~=4YJ;LzNbjh z(h>j@0zgEl3XyqR!qc0+Bde7-^NQOB6W=)o=`Y+%iY@wGerYz$^`CY;uZ*J1n-40^ z>>KC&CSZ)Bic^Bn{}7xv)<8%CakYqXC(ftoQ?yfn_=#UVr&5h*Fez)ZXr{~6w4_&4M zUL%?|GyBcUf-ep{lNc75wgrEV(!81U=(jXMAmwg$lwj{k^=|z<(!0rgja#<%-k;#Q zeP~Xnd;6OP`M!Tjd(qx2+x+EUswvBaJcbV(MPKQXUmol=vw;I^yk*Rdo1!7q;G#~Y zugmCoH|^}x&ddJ1V%LEl4NkoW#m!e(OzF5A50^1d_YV^&3AQ~hK=I4>P?t2;oIo;R zq~wo>qTg~3x__TC$ z=Xu}5B`mQ=#zZujZf4EH!C^t zPeaq3{qH6n8+*&ntP-j!z~C;y=Yi(>G-EW8DjP2#_>ZM2h2OoQXuRjS%S}JZR1}_CWR>oG%Z&@`|+g4n-ec2xLbgrig~o8 ztIl#AX65*}`oKp7YZr%j*?bA?_yWsxhx?{M5?o3vc1@k zUUol~Wcv&gp82_vi+{|(6A}^@$O&|vo!znYc(LM=e%&I?syN%2ndrRf+PO}5nJvNB z6yllAC4Yx6qAp_LRq$*&)a;quuu(?x5zRwFBRyTJzwK9QKOPacc>G1#&oL%7D0 z&z}CN4}Es(E<$k1o^XW`zh=9%c{nsTFjm`U<#s-fgl$|U3LgVK$;0-rP~*&mC<&qNON@O@Oq z!%hDM-S5fYxWJYO76ppRmMORaukNQ%gG-HuFvtfJ@-U=2>PXa+_o6E)xA!(wpIpm0s4xEv|_EHc^R>#uwtT>fnF?WFQ36=BqF9_T+y80YIFtm2TK zWxrLIUKC=?{gm5*@F`T*wLC@v3}38__5N;2t^bm_s+d}*BL#(9q4#Z%<(NNyiy9{$ zQP16+-5k>=kZlZUmF!#g-lLwYp9US2umf-XBiGCYV7NaD@iY6(tQ@@;S-68s!a{;W zvTJiLbvtDbu_xP{!l_H8q~IS*N))VmW{9qqGcsanw`Z}Tx`-w?Il(_skE^jf3s6-a zJ3xJL;bgVb-m_#)wa~ z?Xip~{-;9T6XAz{@p~UWFXc5yOa#1GO={ah^K_M{+7WY5CN(&^c-da7Nlas zZ2ee47FKHFxf;qJdyX|32#FJ_)MuA{m*@RsmUa6~7X^qLvxu>1^|OfI$d>Yzuw6Ks znps>$!c5I3jtG1&o(bVEeIR6vo=YIM^!%6;0TkiVLP+S62`vn*QI0NBQ}mN7*vSA> zqt|Kp;ni;4U7>neuYs+HdcRfIqXK2HK~1OpKZB}@3k?|RLUs=x9jYNTG;U+{XvGA9 zh6F_v7cxiKNF@}T(lF6L}q*2DjyP$8;uvPPCwUH;SxBJ(l3;@)GxzK#( zi{@DMRRQs^6?4wdRMs5IgesUSGiKs8CeDz=mwp+N+keb7?j)>``5OLYXH3vTvzXW} zI!cwdW{8>Clz3-S?@ih@Dju|LE-H1npd}yzb(NPA>@b;1q;HY1;FCj&RqouhrI4k1 zzpb032W2NBI1uf#Atdc}B??#qtc&-fG@E?(^IL1Nsc}qS=g z7A@i7ovlm3VGJVp3D?gB$boOD%%dG_l{2IkTnty$fgLH1*cL6MmKr!*%p^X|!G~s` zVI$4~WfcupJeSx4>^_&IW(YwINdYuzI74K~b{D(_>=L$NNTn{8oSGTXY<;Dwd?J>b zJjp&4Y2=s41b0#&CCn#|_xHKQ_sqCkwo?n*61uxN|^ z|BlC=B!iCyycd%l! z_)2tlgl376ELpcQDobn@x1Y!b@)g#*&N_6NtIbJBjR-a5*I=H>{$*N8$}d$=mIt_` zS~7L#L>N2be~;-N!kU1Jn?Ja<&4D09hL4V#V+fs<)HDF@UK3ysax(zSqA`%jCw%s? zmr4nRd}&Y0(6EK@n7`>k%`YUOPNC0&+zpgL_s1lcn1*A$ho5N1ukGA?H-k`Mx7n0Y^@ zvXa8mojxB&Uja3BnE5aHXazXzKwQ}s+jlN@_+Tj`F*=e|kOHsgr@kuQGa}OcUk>Pv zqb`3_Loem4_)xMq@KT~kiMSp3D20Ch0GYJ#Wst7)3HvnQ^oI z5T5w?dzVGrE|GcbRdYDtUcm6J9vEFQ;ZANm$45Q;z~$LUk>x^l9G+du6-q)AkUEB z#{r*OMDX7C>`I&V2?bYUf=GS)9sWzpX&xLhVq3M?_oRQQ(6J-Z1*&Sb8_>L!J zC4;wXD!DA!w|&0PnBZ(hQ>kvB1vTfmdOXi`TF#LbbVjNYW{;e;s%#i9oJO_`S_0Jw z9j2u85>gt00yo*xS3M%d-=rwrPXL|n1A9g8-APrlp9H@(ztUbccpI_De9dWtbt;Yy zVQN;4W~kzF--F=BmOIiH8GNo}1L*zyyG&*=m_`^&wcr;b-FJ-QLQ#ka(Nc~bzzBx?6&h@4RBn27kulgqmCKqn3UIMCa;^P3^of<_wJt<3g~5SA zI95;k*1(}%QozJQcNH8ii_H+OjRc627TLK+4~ELNbQ}Oqrl)rm$si<+2`(|_ajS}F z7BKTWdrgoHd#cqPS>}zu>kAnwUX#G6@(!Nf5>7r(-X0*nAsFY%$SdGTZ(NsrST24K znC`a3T^z+A8aQ!}d3x||<#Kyr*K2j8WjZbTkxGvnbK67(<52C%qELB7znza^)(>$! z6cST0WZug(AAH;3l39X=8Q=R$LzSR{q}V{9Y)C%XRixyZac4JB|24*DN93P&nc-8* zWYEg#PUY`9*(^J8mUtEZhF_tev;_ zXA2ST0NeD~eu-G}wUHB7HjB3`HY!j^bgekbJZ)M8)-2xJ_cnnOTF$ts>UG0|a>=fv zTb8|Q%jZ6VqV)dM zs>xy#;OUqSJ0gVp!~Nl~Vf_{wU*9L!=(wfl)~M+QccuetOYlucv2m@6i8~{dB^ps% zQeb3lFyjGwQ;Pc*++;0Aj;aZnDD<3021V?R)5&_& zZ}yt-N$t$VGL*y_1hTcRyxak-b{o+CoZZDTeWevz_;%s4y zlsb_PIqB+ba}!YY49o^3TrDchpRJ*r53QQLigTrxnP_Qt2)~XOgSRd{FG&!)|Do`f z`D~%gzZO6GrVntn_+z8^3wMjt*0kZ)v(Dzn`-AutwTM_zQIS`!oUX1eaNT{`cqG#% zcT9NmD&EG$@;~`3Ek@_oR-_@#g>UCTVtYKYFAG4bL-Iw@fU_9s!(wGXkklX;*V}u< ziB)SR&ss4~X$)awW?ZrU5eFBMT9Q0d{~VWIe{y%Iku4?8TyCGV_5^Ne zna!#=UnsXeU|O5vn{yQfGmI#JD@?97c`wP0fMEf@DK0j~OGKvfSO79FjLs3?{`6SV z1?uaK9zf)Zg|Hx_RizULnkC(r$o1nVMGd^TVYcPE8eiOa2BDWZZ57@@!Kx~v1MZX9kLtxV-g2%0z=hir74r7ZYt zKOIlmC`Sz#ptATJOWll9M_u(=oWjOSnQ)h>e6DZd>oKefG5pI%2lC$dZ|4HOP@Z|) z(tEThC+ybk8h!*HdMn!tPKrJ_(C_*zpnc&Bc#%Z<{cVKYJ9g)Re5gLr2{kaF<{IY| zAHd{R4I@i!)T_~AS%^^yT@}wE1cOaUN}hUJxV_PUN4&@(BrQZ3b~8BO)p06L4Xy+M zKRe1~JtOJ9j?Ak@CQaX6$i}B#CrfH$4RkGXnsj z(kDHdKZZwj$sy4b0tV>|Z~}XJiaj$OroGv?PMdvu3ntcdau5t|?1fHG-*a>_`5!KS zzkqq3K-U-U*4fsx>X+)b6&qO(w)evxE9RcF=l9cLvsGNqDcib+Gdl43ev?;rqc3n!~v45Y3K8BlbVl*egnSyhx?RoQ3I(bf(~h0)*?QO4OwmbGrkkNZ?toi%s46ibJQ%V zO6|Cs6kH}Gj>ZX)_aq!#9&!57&LUNAL@&F(I3XC()^Y9_>-Rf|KgZ%n`kqt9y6&Mw zYT-LCIZ8E$^&6AN@|<>p!O#y6ALJTP_F8KcGn)@#B;D|e=fI2rhR*D8@(owl-L-Dg z1DAcT199a2C9q1zs$K)-Q4my#cNTwdug>mm?>Zq8F4bh->>|L3+h!I^$D~5yPIbKh zQ?H5#fs#`rhz&nQuXH0tC@>NP$}`l;{bv|mhp?36O@++|eZkNyrajrD!X6xAV$*~+ z*^+W{@DT85BxYa=oRRN&vo;fMM`tJT<$6639-Qva_BpB8`#NQ+6NyGz*x8x2x~k9T zv^g1pN}Q3CQv&|r`1tcbC)eSAs@LJhI85*l-o=%PVw2;plf~->9v5@I-n!etR+jx0 z>B)~QsG@>#e4i^NCFSgQC;qa#KKMJjCf>BUhqL3OqX?ZI=N5M-izsMld@cAfG9eWC z;4?&$2V{V|bin`hs<^7+KR4-zhgeyi7?kZaL<4(7v!`3p_IiW}qL7CnL?%RaP&!z; z4oREBOdA;2^q`qA@rGpHa-rl-HMcH}he*6U1Df59y--zeHG556P9Mf+;!}!Q2T@aZ z_B;z4Lo4;<7agId$lYr(;%d~)JTF(Wj361kw0P73ch>mufPHGa+`gVpv;2z!cXNnh+ftG*Zb|r}gAjDht6?)B|oZu09@0nN5^V zKZn<4rky;Vf9T9=NQX(_T(b5jky0zp>^FnN zmo#De(s_^R=l{(LnZ&FJ=A<2rVp^S!^$d}Lo-IR5J%)nrONy11}@xcKe&ev@|y#t}mQ`EFOU z4JNPd7DSR+JYDbm-4>DWOOZcg*krrFW$`kIu ziBs0AEe^#0(2M*V&I65K$^TmjChS+grZ*L2w)!bVJ=T8Qft3x6PQ`8vmqW+|ltnPw zZpyedeQ9ABBJnI|Qy8vOPmrbqXe{Z?jCK6#h=>HK?sap=z1M#$rG0bAu7;Fw^)8`z ziR;y&2MU*dq3^&G6+K=^IKB0VwRc0 ziAsdoC2Sob99K3}MX@+cQ86W+v$r~Uz~P4Jz$-33-1ehxp21X+%gi7T!X<=|*7dR$ z$80yz)DU@0E+Tf9)ZbW>>UGe+M9Pvc0nu*ChIQ9mX;E)4nq_|nhMF5FkL*1%M;dGg zRSu32^A)G;6+oX+@I)^))3Ojxi>MK)`bgnN)E=7xfhOp&>EX=4*z_6-@S zQqCpzI{rrYZk;$%GQt7`EsF=g#N||*$14{wbLUH4YbM<_*b-Anp$hdeA?km$-^el8 z0UuQD=;r71&E?r6<%J9oDV-Z~q*FiJYlEx5L3wJ^cDoX05R^dk16|9SP7Ye|wy(Pj zOFzCqNI>w1Ui=9W;?jG@_whQtcM|+gq33ak{p%2}?%(%^-aLMAPb$PeXsa2R;Z5w= z2FXavzvahG{@4fa^(Pp9)N;q*xBtt%%VqaN@)TcSW?X#y*AY_BKOJo3Por{e_iJ|T z`)P)4k2^7hWMl`gH#3L-NS>8C)jR)MV3Xv?Bx#KW9NV_x#K6Yw*`L|L zkZ@u$*9xGnQW6NZHM$^(XSHV9UrhMhZC<6&d!(MTnA`-$#$NV3_2TU%D83hJDA~~FuQGLhN=%B5vP#*&x08T>9IW=199d@lq!ALok|BXh$W^~LJDmt*vUqqkERtO85Fv>JyNoCSO;Z@nIU z_JO$_?`<&jRbwK^Khu(g>XfpPG-D1$2eAu)-=fnGXEkUKyZvLOq!3uobm?`AM6iVW z1Hf_7erqe$iuSiD(%HD91D-+q8xColJBecaPT>T*`Qh(}hW*i`2#Wb}?;PW<{k2LL zq0)>1`)^XcUfFZGp>D|0*Cb(@D^&^A(Rya(uq*OZe(a9!#^@|9aD@Wv!^dX@zRp3x z!H$+}#Nt%kjR;bm7em>X%$$%hg@ew)7PDPb7I(g2!ek8l!Swa2hSd12issF7#NZFep~i>TPAMh<_4;-=Optz ztH@=q$naG10t>`3}8VmK~Rc{;+PtL#CW z0tMz50}QVBn|1{Q>(+3{*1Z;quEbVW7lApI1_PF<`!$-8igeDg77mkbhS;cFz2Qm< zm!_skUz|a2M$~NzM%}`I8T_^f9s1qIdJaexNCg^Nr!j=GaC1$ALW9hF9V+Dw`OGUM zLJ2}8S&2Zi-NWfS#9)qe8GYmu#oZ=sMJ`rY@5(Vs%*I{q!XVpKuG>Pgh}QE#RI1l$ z)w3k(8#I64=Kh3MkwL3NwgS8S7{YCJ%3L@?T5rL4K)JG!Chq4bZ~@3qmt;qaQhi6f zFK*sMjjhUV5>z7S+d?j_71Doj0D~d1WYY~i>^7P~f0)cT3{{H^R zxdSfQvW`=Jhi~8x{k}N<%~3G>T1-{^&24yOq2a8lim8P~wP-T8;X zzMg=*G63EHDjL!{tR!N{+Rt7Mp1X$T8xJh=FY_>xtiobcW55n%VIuwdI(VSYTgt9O z4Kk!HB?Hn=9-_Q?a7zPGO=3h1t`2XiKNPYg?Ax5N{ zFeqbDSlmVXWY?I?a(ph?aUP>Ma_1uAWH6Jo*FSCg;}gC{Rdnsp6?Q!>=6iMgL{h%DO0_)UOt?Y^E+hZ(CQq4j ziI|!@eG=ljF>l9r&?iY%`7UfdFQnpXaxy#caJZw%5d+QU2-J|l5+Lv)vYvJMmw`uG z(_0$Uc1N@!W%~gD5?uO2Rt2}d$@PMODKoP_75Eg)m_9jz`xP119H4Q$`5rS8_%<8Z zeY1A-E29$%9$kVs+b9if%SK*E1Z(lAJY0H-%9XIIhiySQ)yxMDxZBU-^yPbfG-heI z+1vvMa$9FH28x%MQmO?P%8KQWY)Y;vQc&z~hM+{OQ{P`conI*XJ&(unk4{+fg^{ja zwFg>excY|$`S^|ltV;Scn2ts8W~%GqN_a^nC2%6jDF!De0R+P#-*>5u!bhK7ba^T% zQGm0gE)*rm;wvNlQtBKZ*5ydUKOxPJ`4jZhyAs`03 zH6lFSMsay!MNPr)W`O>C-`blq1Ey#FqcgA=G)0NO?}}RwM4*BZU8Mze&DobLQX^k4!X(yfVB{1))blh#XkWwG|6opZw!-B(H(9^uMHD;x0Fo-KhetN|;1>i%)6s9_`Z_0mWFHU>b$G=kS6| zhEF;+=^(9Wp-I|2RUbm|Vf*rA=v)Q9X+ZgqCXPLz`LqtFNF)R>hr8NsmAk5X5hLK$<{|2$t zs|Vd;{bYjLrlV3Z-us$GD~Wdv*vVD@<+O`LF*h14BjEp*0S5PpD)Dfm8H^Cp4mYJc zE^1&UMPKGXWCKh$Oxk$DQIl1LS4luhSAH1~(xq3iv4&Ic_VH)eekOMUP7TAVJL`EU zDBT~wb~`^Vod=tBJXM`oQ4v*Yx+b6D`zI8=B}f64Jp{ygQ4Frozb&dM~mlCRi8 zVg`ttvUTPTlZ&7%AG~Omr)pt3;F(W_A7O34`NJTshD+ZEX~Xy zqH?(Y#esQ`gY=K1a$@}rRugSk!^HaFXcGgTxYnTg$NB5&Qng*@^nX$>JLz(KM_BfR(38jlp`9Um`g#^2@7pw^r&tsHe+}8$GY_Q3aLnjcogcY z5^jW1ySVbh5t7s4FTtpGE}pc<7z?sHHUN6#1S(X0axTI0w9g3KnIv9psfwB3idNiC zWgnWD)dCf)y$`gT{``G2J>k*nb+&8d6`{ct5-g2iV02AEBO?M0{8A|U8&x;j-D~Nv znC~}av3wZB2GnIKaUG(t@QIjTwj^YYCx7|cWW64L?v*L2liT`jV~&i;P}cmgMgX2J zifEcDOaePy*;}975Lv>mi8G8_CPb0Yg~O4>$?(Qv4P&etd+g)nL57C3-6FV&?ZBKW z?9!~rC+jP5I&KFVpQ7R)qE#8z!^-gbAh;_#wITsday1(*D&wrrA05f%KgNBBUEOY@ zE$vH+U!CqZMO15kOnwCBxn6WP-{)QwH(nz8u3+Ny(+P!yAcsaVumwSz9!`v+ghErF zQ0yYyxRS`qVR*{Q?N8*(Cd$BoSi>+762tA?k}p(i7mZK5AF^*=b~jDtQ7LJHfZe9G zin_YLg(j+hsEX$KqD@EY;K{GDD4xVGi}!#2>382A1m&{mk-(3nH z+zyO=%xI}IB>c8}T}xcD;QmaaTkkkPw^Vf}NXbF++1S#k$FjPhwl;6Nh402Vc%DQQQv;IueZg8 z3BsGS!T3d4Ql_+Pz}H1~yna%^!8W9&?M)G@SZmUx14LNX8+!XQuB|a=yMe`ybtz+% zjt=6~FhnzY=N`&o=KN2AaKMzrA1!9mu*CWVXDds#)Tl5dhdMOhqb$yr`%0axm8jMD zrZ=6<$4HJU--vHb&XhmN)MsmWp(m8b|852N>qW1V69n}_gH6cz~abnYgwf=Jt zv~HTrvGD$;1udpd_Sw#G95NnXV);bfbA2_K@B&n$5-bI#)6t| z)A9_>B(z$=D_|E^sC#tlPOklB@iLd_QO}2$Dl{5o#2?*J=U&JeC$P8ebNM{Zhl%4l zy27r|hRB7=YN<)ab)Q$y`}wc--UN3~aG!W}#2broim8|{Bp(5#=41)wPWQRr0e$N>a$>Edc ztl1cdNE$&rGJuE*8X~bOz-9VuFoE{AO{_az!yX_gU(IQ`M`U$a#k)w%|~|u!L$b z9%pUTmWr80F;cz=6JXH{#aft5q^WTnJFCtnSE4ibGd&~#Gr1+?KHc-L_{Vc2cgR6U z93%T`j*88Ru`X}AZw$_|BlY5J93ht^8COXB%%wKJLTiy8Ai0YRG?1uVJ_aN>LH%qT zX#^D2dhyWWBr$q}aN#ly84 zM4(ha_?hh{+985r)1cSyhlWk#oC=VS9!;k>r?i{b6CYG0jJ7Tq1~F^ksb^c^bejbA zU~C}uBW+ls(t%b0l#VL3KMlfmv4oQ3ccBavI}n|N4D6g$&H`zqo6w%{aIEe_iKsy_ zic9%#RD28x?M@7?@}toctyTB4saTGs0grsxI*H??r|!InKbZb=1><5?dC^?PzZEW? z-fsPQNig2Zl7D254%Gc;HrlJc*F)+CcBb`y3N%I>OecS+D1Jqdauw?xnh|A1u>`Wp z8dM?c5J~&lQSewoYG>nx%%JjoQn>gOpZbkIbBfQNS@*ky@SK?2p=Z)O@?j4?o3 zFk(i}d53cm65KYYX0W~qp!xog!Wr9 zT(%TAVn1r*DNqol_i!uCJSlD48Z~gd)bQNmWuay0us{*_lop|;GLnpIsnNnjsHwR! zgaAIVC3o1VwPaLY9Xsj%m~K_K4M+wy&lI#J4VZpSJJw8#%+v=l#&G~&yC%<=o<=er zp5742G3VSDk?B!Nn9O`tCi!J`6OOo&>Zt|G#wtG_-qgb-8OSz_Fl3u~^(=FLJMNf- zOu!YbS4FoIV1JzV`**^Ku+#aSX=|SeWe<0>xfefi)U|kTe*@I_hY`bMQiV2fc2Ymtt6lVz@eb%6&5&?{MivzU%Z4c243%l+YP ziuymF^W#jn*e#q_r<`)&7a~TzM!7sQocri>er)c#;tiqPT!%d!FROkRXsz3eVfafZ zFHw>CJURa_?-4Eg)eXr?&EkQ!&@qP4RmB28L8Sy0A#WD%(${5w_OGWiPU88MHh(3| zSe;>=KiVq%{yfyS9M+^eWjR9K3|+LaY6^aPPRo=ZDOll`_?!>mMsgA$Ah)^}zFG}# z1E$EAVMfEi_R5#+P#?5hUvQ&S5w+GuUv8Fk zlDSKF1woSsM|Jtfk@9{peB@|kV)$a&cLLVFN9Pt(q7#y;CqfmFeAUE|g-)1ElKQ_tBD(oeZ~Vqu!XI^W zI9=gDNuDrOk1&c$c>{-*^j936xzx835q95*Y{x%?YX)EJPDdFOX!%4`7nbTC%cZ;< zT$x*{`#&~1Q5#+9Q4LbklQ}jMppu7w5k$OR=N{TBmI;0dK#${+ylgpt9D+iXI`0KT z4iG32LK1U-mF)>?*BxnQidBC8{H53eD);idNd1Ub39kr8v|G@gxY#&7P5b+vSu|`L z53`dW8=l$m4=~>SvOq=Oy4Yx=K@us30)|wxfs!obd=4z7oKQ6tH->$lkz}6BIdp}A zeyUY`>i3wLdyd=}>=sHV3SO)~Vh1B|)zQW$D2k=@P7;*XcV^ur)Q<>zSQ+k%HgI&{ z!ItKXmGqeliV}wI7Eviwpu(UyUA7%)Yz}I*IUGX@mel)E!}XtvnJG_W|MZ`T5f=_) z87V|b8CKxC$2cDORpCDf*(h+-KcC?<$dX+g%9{pmXsptXcq6EqJ>sBXNG}H=>lGzbQ3eD?$`%?Mn;nsL|Y>8s9Fb90252*C<(u}iP(ZiELe(I7bRmBr2;hmY*jBvZ zV;Oe>(hoS`Eg?2pYd98NL+94?vPF)acEsf3dymVjDmW1KO=P4FrrVBeB-LpFum8lB6ff3q~`|LG#)BSp># zqX1*#%O7wFu@6Y#bhp*L z9XY}3ymAe^-H|~axcvP(5C-~86yBM|fDIwcER#DgV}Q^8?(a}~@fSYVz}VB-0a^=x zvRet~8-1-oZ%xam_WMNawC2|4W_~9xm+tk%n*HD8UTW)WBRVa;bg21nA3*FRweULk)JD*t!%)JSdU76t?I+J6`IFHq}5RUqSu3>AB0`;L|e zxui)(Qe5eP9l$7l2BZv&!Zt0O=8l6`12z2uPz z3syWnh#dXgaM49OQ7K^#yALtM-qPhb?Jl~!QMnH{Jnm@mO*Wd2LV}kYbnSZ2?;TW3 zt*hT8>U;6oGvi?h?T$a&0q?#YW^iF}z|tdSM0Q9q@?!y-%&R20K<1jV&~L+7M3|}H z&5r$CL=E{IN~tp?lw@)^7YIVjQ1#6f7U|_nMTkllUHX#b*uJ|?7RrU(Z9goF_FPTc zo7L6#UOEegyX{WKY0Q95gAiQqe~C-SbHBjuT<6=G@~$Pi@@j3M@Ya-=M&80Ft=t>+ zm6P@*bUsqpiGL>u` zTAcmxlLUD7&VVYQeJ#ASE=0n*@18ksEBGt9FV{umxfwNT>wARE== zW)SXlh47R`Ki@pNlPjJCJuDOlTp9VkEP3<;zY>&&QBs+Bf{yQp(^$`Ae8?zq=2Qxq zz1>_a)bh8V+@ch{`tG*X;5#}q`KjCMWgWoG&8P>*rc_?gWve1O<8Q{wi%dt5G$gIviU#BCH;eD# zNFg4?4T8&3S*I33VTgJRIJ^KEGtf*FO}db0&5K=f~h^ zzmouwguE2P4-!_3%kq3)D`sxp&@73HuLKKtOdU>q(9fMFB_`U?z& za8yRYSg|2Zyb!^0V2gW&8Kd3+8*#$`oB#q^BI5V(P?Ar%`}zU`mvZ!97|hbSuE%DH z$d6_ryPvR7;ahw7ai5<*(|%s~o(rh;eTT1VWW2YfL=fwgkPhG_+u9jHLLEBLP<9dZe1c z@F)&kv}aHLFvk7Zu(4F_phOKcQUau-LKYtsG|?)uBiY2S=ugmLx$&Lq-^3(TmU}VO z{`+967yqvikxl}_`E5{*S~HsH>4KJroMebTrT3C>viH7htqiWvH{U^dkJTon#W_nn zEwhSS^c2Cj>&E%f6ytwz4oi1p)17}fH2GXtUhqV`RTdjlw88^A65)7$+N=-V_9B5T z*1o@l>rUEiyFTGJA>2>riWKo8nk~#bT6)7d6)i;RVFYw!$@2(a=I-;zOq?%2@A#7Z zvq~@>*FbKm5cKHMhqgUETN9vKTxX;YE_F(dA6r08l;*$QdC~Cv(AuDkA7ds(oRer8 zU?J0F5$W3#?nJ(o6tcojQkBd_)+j)h6;e`&udkRY>Q#51F`r>JRcVu)`D^F^=kSS$ z&FGrXB(n^>=8dWGG{A}qV{U+XIpule3wZ8M&36lMOe+p|WAp0pK-AM(k{K<2D=FMw zb~;H(oRmh0e=W#;6l6ZwFl@%5{#P^IpNg2fPn)vDM%fz%GAtO)HMC!h9$1o+H?SHv z8Vq~W>(A>|!5?{l50pY!9nG|5(DV6G)|JI1`qj_Pnad%d2AULyYO4*JDoc?_X$Ykt z@_eIABOM6G05e|*jto^uL^PUa5U^O8LQ%tJCJ9(6wvtG}jV%fP^-lbavou0Als!@jZVGIjOU zf5E(*q50}{G+eB?x+$Y2`QBI=RyX6~Ox-J!u>y19<|k&x)GrnNs!s4oQRB43rq^0@ zmF}$D`(fd^znOE1TG~K+|KAkr*D)2${4qqRlzRwExUZ>G*4Cfh)nnI&W%y zluWQS<-n&Q*wn4wQbro;H|q3ERCE)w$pj0d$^bYtJSn zc(nLATeW~7Bvb!y9i$q>38=-ALSR6FKd`=Ssrj19Mb}9L=>=W9fVQPzi!!1)ctvKvM3$`NnmUYumYgNLP$t z|2$VlTJ!aN@8|L)NQk%06l1-a=JLd;3NOm>YqaZBnuR%nhU+1~YX2UYtNT)bm^zy4 zduMBzEDI<(z;MWuiru^xuIhTfG_CyKEWl(-wZ%C^%-JwMo0(6!+0KBS&Mdp>%0*H} zb4Qtt$ofPUfsWJc*Vp5Bv%fv1H)ammOg!|=&Cr40!F!BfcC=&Fst=ivM5Trk)8I-I zVc~C23%HkL9IC72c_#P@9XDvUle?9gijfI|Bcs3|j-JJ(TRs!Mp4+*9#>TT>UT4prQmiK6x0p92UU!w2 zRj%3OM`(5VOEY@(cHxM9JljtVmL$-7)i1)Q_2*gZ4x#5^oO@l6(f*-(;ixF;7@_G1 z^X>(k{9G8DeXVfZHR>t+2zGa6@?3jCgRsEMOM9J4uY8LW=026smL91@mj4I zlTlgco&r*dZVzok_tJ93%l)J>*Ko{{%L+T)@z$iGiQ%SEDdo@S4L!Lkdx&K7VflrG+&fqE;Pl}%{qH*?Xh<< zAz9jzP7kEeJS-lKVIL%f?~GmhnBhDvaVPTj`64ad!(I1dZo3 z1bwbj01TcyUh#@Wv|R~ z_dFJE-Ib}H72HUXAg>sR=-Pzof?(vA&_C3mHWSR#oY->Nrni>kL`Fw+6K~3g&4vCZ zlAW$nk>P+%=A*B?Z~m8{#j)d@&R6kpRt$X^dQu+Ra;}A1GU|M-W6jsAy*a`qRsB` zZ{WaQ6qb1nOXM-xf^Md|tr$FH>FUR~kl3sl*^w&a>MFM50)MfP&%Bwk$e|;s${Yyn z4HG0KkNnpGo^C(-Eu*WYerOAMm!LS{Ahq(pPw)8j#5S`iOR~?+OT?-n2Bpb4k20!N ztxB17c6()PwKQhYr|~2q5!9y&Wfkw@__vd&B-c+^6e-iH5SB2XBvO>x|H0L1xweol zT(Z{aGo=QGM52O6f`dEzH&x_*%;iG*F%etr$csexHdc?3CE-Jrk#k(d&Gew>E-f`C zg!n#@%N?=fEml$#GUSq7T3HTHqzX0HeaVL+WlGzcH3`Z76zfk2uYz~tQdD?#(nI6j z;;=!{lJj;da(otLmTBvBKPs2@+$;4%Raz2X;TH?^q6lUD5YUq~48sZ_^C_?NXh^fLS=V4|lxvM5dKoaCkY%3q$<}IyDM%0A$`Jr&`s0%$KKp*ow7wp{r#0nIDr!jTPS3{%i= zd%kpOrNuS7_4%bX-gWBN$8Kp{^`n0-2|lYuzN>W_uw&$>y-k?16R_a@ntH%lnwRg5 zTsAFeZgrS|@Le0F*{u6lEmK*);8CG+()=8c=Ke4o5$gZkUg@`gae+l6G?IodTOkr_@8nxyL8$bs_~q;n1MK*L{2@s2&c4=!`_QdWT{ zziKoLQH~k@v9Jj(<}U&t7-}Xo9R0ym1J@eSRvKh5sx+~o^*5tD`R|Cd-?2=m+h+<$ zuT^V>6vzKp5POUMR~e7^?DQjie)y_Uq*_}quY&I@>mPKpspb3A_Dv{Tc>3B`kj=g0 zEr;6w+2W%wFX4o$^(GdFBeT{S7Di$wuI%!1K(FyWaw$L4cMLx8*J{oZi^)3_&Jj){dnb8jt2H9V0dcwrq-rCT4GzSzd$7b&8yy z0)>xbJ}W6kn3{M%n0zQ1dj5J;L+G;x4T>pOVR_+%bnBNK93e^R=3Y}eAN)1#-`4Cs z=B+?yK6Kqm2Au#-H9$JHF&PNm5~!aj3~Bm08t;F4p_xr4e#P36z%k*3MyU*Ml??mH zTJe)LQ4FIufQjGBRma44s8)dJ|Sn7+UIul~Ybk+r7j{h}Y?{Qwf z@;-0)zWLi#Xz-L8E@d+_ecvzscxv!&{sX{=rwabvj?<R!wc#av)E@qg6CBvBr>KEEqeD}fpDT!rr7?Y)wa~wb7Wt+?TbgV^+oxVMFmu6dpu$a?!9%bjf z-&nDC*0XrlRd=u{R1Xu4WE;6HlI%N8e@ftUx=leoGE>YlE3jzkMj~Q ziXB#ToXyWOJ9p#HrGoh|xyd?xm@c^$p}b%o;s1dNg1vt>x3adhoGd`y9DBGM0-&8j zKOb6bNAnS7e~jM%Ya{Kv(7p$?2>j%uI{RMuv#S2w_luGQ?7vA+xX^1O3xFy+O_1K%h@MG@I5M`N(FG?}#$r_sbGwSLt=?!44fepRd7 z{8m^QU8EeA^@WGf$ADv7@{4@XH?``8nFkFVyQ@zlOe%sdywK2*VFNht`@U-?l-Ly5 zn!AK^!SFb5h*@M3&^o^tmDtVEqJE2H#uM*I^5=gJFlJy-n`UJ1(bD-nJgS&tLp=5{ zV*v(PK7ipbFA-lKTyPO^pYIZ(@r_okL>vq2y583_5V4pKC>DyCZr}YrKLs2R^ENQN&3seQe z!&P*gVHAFef~g<#*6krrXprRcgBeNv9f?4P{0kF89L}*vE*BN2#|w$vN-=Ec>yTCe z%m{QYa`Zzw>qMp`Vq@VST2Qt}`x5y^JCZ0(;bVWHVx9HyzQ{3AzP6sQvAD1RSU1{{ zv&W1vWnM=|7Sa1pwrch82RyOYJ6e*s92M};Y1_Nz8c4!~r;!;}zI4M3R!QB4@z zPHQ`GU+#=5_BK2(_F4|IjfdkYKl4QiGdW|+V#s=Ns^D7v@pPDbu&BIz+ zi3=z~`4y@*8r#yLGe`@ul1$-3-T*bKlxs|`YGb|pckZ3{8I15`UETC$woNTfz8B<> zRvdNax9ar`a<0s}#9p(-n!^>SqluV$-7KY?-4Y(-1j_|$qJMN|OnWx^Z@mR+4}4Ch z6CI}Wmltr_tgp}4`7L+(A&wgr3K#ijr=Ft7(Uu2jZ-<;DaAx)JP}Fa_O38|i4zM%9 zU8yD|8GcA;Va%A1R-`exh2PMsAs@TCFG2_nBHei5dop(@@$i}a6vL;qXdRYi4_mmu z;q-pfpgc&q3N%P|aeFVVI1Oim18+By3M97GhoeuRIS%RpYXh)$=-P#uJeM^w3+I1- z2HpjJL|@$?JXL7~Lbz7<#XmW5=T+t0*{r(%?nrRNzMMOjv-bSS#&&Xy%%FlJS*($K zui+*uSa-n5cF|3twJ<`2c>8QNr0m{`8b9o*8IyW1{iKzri&us5102%$Zs`SF7D<*| z?X!m50`C}eIALxYrX~L(DP2Hf;lCj1xU-c5eUnWoynZ*rNY3Czjus0E24(ljd~IYRJ1HR|2ZmYTgRh%cu()4PZbKLs=xY~L?? zX3?N^33%G5jzDpy*WnY#6E@o|Y(BjuSv;inAH<}ajdW- zAL!6Dj^^n`Xp2ZwT9?JJ2$S0boA)qO1YxZ!?u(DQ}Bf6JH&9>u~kHV!V$FgZouG6pbk! zs*;i4%@%?E4v3v%+Tn&t+~MD>zeKY^gLgu-7nqV%#o6v#R0yr|h3EEH@|R`LnLxPz zd4GSp6gizP>y4I9JxbDD%R^s7LSM7YG^0XD9;vO>CTt%nTdPyVBUZ$t3H&q#eSbIQ zku&94AHJ3^4tC|`$UL93|D)17ERTRNgM*m?|GVZEZfTnaGU)G8?t{>4je%t7@;JM* z5xPHX@>$jyyMonpO3uUkK~>A8$maX=Jl3Y$&8Dx%VoeC4uyG^i^t9Oa@sz<`Eqvq0b=Zf`Z||M-Vk=-=8MTUgFE)%(N#^`3#YO}&7{z+Y?EK*iJ$0^l zt(|NlNkWbPverKwIK$A(+PNR;+=YgezHzpBYP87ywaC_25{2>KV`i-smL)|b{i!PjJg61QKFb_J3nPWp8f+_=Ac|sQ zbbkQ~m0MLa3z+eg#J6j=Cl`)1eqjUS#%Byn``)P~SOg(`F52W=uyYG8i zGsyk%deZ`MD5<{w7)hil*J(lhWtQz849taR0CDEp56SBn0v_jSiVMK+)vfZ3d^vB6 zDJr78e&SaUcp?WzWIu-fd@p-^n)L0IAfj&sZ25G#PXB>-1NuF2fj50zTg2l9UV=!# z{p{I%p&VhU{ReMp!SAL?`}gA3maEY_uWf&N@3&yIkGzBoTf(KC_+sH{Wp%pc*D>c2 zj8TVTm+OvIIIsJ7+-!X;`+2Nq_t*DQ{GZi>K#~~EUm6gTow9uLR;hXNK~bIY>6&s| zan=Jd>gK1FS*NpBvaE28qtyo?LSj{**WP)`WAOvSR*Ds`{@Z7kGQ9~BaD0Kb z4k+_flW;RXB6;VKGErvJeSX1IR)jq_>P4X#S~HxQQ-TPHSW?6coRkAL$1y?)=>=4c zr6Wn)hFncFC}&c{N0(QImlC@ru}l_23HKt6sKj^+dH=h&w>8&?Djv6Gl2X~c{pN8i zu0k$bkJ1Udi`{?SiuuZk6}c5mlW!k)#7M7>6z+x4K>}1L&j;KA6f?O+LKMaUo5P~B zL;0GrbB&((y=6_5v<%^^Zu#wT%4FMbuoy63IYS9?ng+zFW0{c?k49aXWdcsf%^MYk z6vHQ5KYJ9An?m3$=30A0>hIx5(P2dt3dzI|<7VdlMZc~gM#IC`hMU3JD>lwoW+aw| zP$kdjEngo%f~e1jF@hsSaOPIDBGt$GGVN1A8YjuDE9GJRO*5oqQKbo;ZH{}HlYMG& zx>r@F=P^@O^{B3i92LgEzBy2e{GrqOy@41X>4>t1H*`h%;^3zYCp{W^fI}Kna`jS( zDx>_L=;|qnL>6|^PHi+J8**tQgd%=yn7FV->akE3t)Ks!Lx4KvQraK=xF_IL_-g8l z&?TYc`*yeH{jl!r;=~i*_};1e_JerAS*{zyz^5N1 z|G>53Mizm|07jfL>Tox&eskH2G&?iXW16Bn0L+_@e0^AB+j{K0aN3FDas(I=D8VEk zCjO$HCqt=f_$X6XW(c82==U-;2jJpW5R;c*Q`g&BRr7}FXtF~eibS>LJnaU+%eXps z?aBbLb!4-6lk9w7Rsq2XR%YgIQ0Od@P3r+T8@+8CcZ{F1ec#;$KAtA)0MdqXDY^uq zJNYIc6+oGJ0Afdjh-IMdu5O39A&(ay?{?8V``DcTBPc&{J1>H9`+Ahgcm4(rpy>1L zC90%;^}N4y1H@L$faP7F1F~MK{ycf30r1d3(Lv7JM33phkxs%j8MudTHz0iDa9=)*EGLTI(6- z+KfDK*YUdQH}0!WqEmMS2K%dR*Lk(Hv_PzH9)M~Ra?$m6zxo8wB)@5E;{oTs4O)3D zlT4rHT;U6gE;DV`@Z1`QKi=Kpsn|+VY#Ka#p}3f9F-(13HM$f_z9Qz-%+NEXntEnKJMpgpKhZRw#~ce zS{_Kqv#ai_Dyvv;sUNWIX9;KmS)Ys4fxBY^;f^uLsvw zOf&GP#ivYDY&OUlh+NOe3vJBsLnkx;m(~{?ItMgHsZwNHuw4E?bPcO&Lu6fGS(*b_ za6WQ2oHR)Xxry>W^(k*}MOvl4+S#~3;i)rfFPbz=@S!dE_^|CtYC02*L>8qfs!Vh_ z{lE^7o>p{!VZD&2Ms#S*me(w;)agT$GhiW^!nP6;UqKzvmzvs_xZrHvM>|K(^;&Cx~$6(}PS0-sAAi9X*nS z0^h&{flTb@i{BNY;wQ?!RAvuNDz;Qd!oY7HH~>QXXc~(+B8LdaTf`bVFJReBH=A9q zLHyTaq!gCzzoERCC8j*t)%!F4>K5?2hxgS3@4o=`Zs_SCM?pm7%cQ^yea`DHRm;PM zXBw9sA+q~MxkimYD3}85UdHBsV8}80P}li;An?G``7~~KJqhIEz=C=wAR%y^7Q>1g zZhv-CELC*_%2;l|tZNo(e~jb$H){)fdh%@of?h3K!FZ25L?1)p7#+dRYPxg=g$Ma%+eLZNMd5y!4IPh2e^1Mgn zh&;Q%CcGPDI4nk!`_pCqt3EV=&9tP93>@gy(^!ll&(6+toTtUcviMTiCixRUB08Y=3_5U&*`gYklLeMS zUC@67I1PRz{>x8HosXmkIlclQ1{~l+a5jM5>g#=BRM|to^Lq;HAiwWa3Dz=qc-%~$7G*gV zQ^e0fi|IjIGVum1u#v_6$s`h`4XS#25K(B}h673iGJBG?4}DxPBn94<_~pO4x-LmG z#9%mKbUTPOm_?dW3j;z{<~1`0Z+|7(ksXk>mhiy8PWbjab-U!TrVxv!jKrSA1n_*G zAu%=l!%|;HZBLX4c0yYO!Mia9-pPp8Z!PSv|G8_7es79aC(;E)O`@VT=o1|ZWu&xP zVgyFqbTuoYFl{yDpm_mhx=QpJF?xk5H4?Q}U?V3gjhWE;L{T_}LMK=^ou{37&Ax*+(np0!h<{ied^p9onc@~kskF>ms?B33{gQ{Qv2$e7dtKP zX3rR>Iyjg_DR>CNQ(yE!4Yu#3G+;%g{x2rn^h;$?vJubVy>uAnk>Uk~1cQ0K)zrrQ ztIrvBS71Vxf7~8*#Q0ULynppn01eW>GCx^FjbTvrKQdJ?s_!qy%VxsAV;8vpKe556 z3w_mR>!fK~U}yJ@<<@E&AP)mX;97U5IXM$Rv5)`ta_GRs7#bONkhEeP{LfL$fDxPh>$+}qEaf%=R(E?-%7Phwgk2^63sm9S;N5%SWEQj?L%@0?$ z|2GRTdw3C3%M5rP7US*`IP zVry$F_w!+X2oW1O>D|KvS)jp2ySuSyK2Q!-c0OCCXJqgIo=daQ8pmp({PRD)%_qcz zY)?kB9B>M0dQzA%mtqXz>>BW-K z0zEq+f(-DR$&%2x#}r3%=bz`yKmXW=?;l;|@JNKLbGPEQ9?Fn{gYB=$`Qloyz_=7? zCSGQwy}D%Wzj#8EARCT4^^n|LPv4oGFTmcD9q{pFjL2EO}6z$fUar({_qjI7tgIyp6}TFi5i4u`cS1=lEGbwqNGYvmlR$|9Y*t=!8wQ%Kcwjs$sNOG- z!%dQZi*zs*F2>_4Vi>uIRoDU2)5kL34L8pS??+coadc51!tX z0IGBvjwG?8xvw64+W8+qEUx&E)$`Nb!OPR35&i8gHlZMuUyl&(XB0NI%7WLhPWDy} zMp4aMPUecEYUnve2L^LBNBXp2LmKR9fwvLkfRQ>0&)a`2p`;-L5YJcc(tAt$drL_K zhHWWicA+ySdf1RX>;v;~!g(~fPtg!eQfNu8Bsp;Hj^PKi5!*CLrXfF%<^@EkgOzT# z>g4#!uj+1}33)0Md9ep0KUJ`=IM_=(508TB29ccBq}Hk*hOz$0EO${vYD+zex0`I9BzbS3WZ+}=sbi~JGdRVH&{!rR<7ZP?C;un zlZEg5dZm&4U3n-mzugWwmd5z43lKE}Wfe~gO`ZKUgM_1?=srw!fk(n+JP@f|iv5i> zjlQ8x@bLI}d&xN9I1U7;PsjKqy5H<8>FX=xDyG^`6!$!IeRy}?H&i)1ZiOTO;}4zQ zeBZwd!HxsPU^9^7X*O75R8&-eV11AmR8@!KL>(U=N89ZjHmMcewO(zE0(7MQi1tKo z>0WrKTReeMx60PzKQN>Em0fm_Iv-W@nfF{@>9q{5|HAFCb3s@p9%Q@fIkqK4BN?aJ zuiy20ZL!fbUfe#eG|lQf4U>O@VyIb~-Mg70bC>587+ZhXbGr=#qax_Cd*?XFM%(*y z672ps4Ms(XwS83#yY})e8*b9q`@1(3c@cgyTJloQ{_@o$p70*>KB?d}_yn zJ-@;!LD>4qesyh{)Cn!c#vj);Y)mJnW$ou#1bnf71a+APoXsfBpAL<1smJ-0I>BRu zhc^mBAdlZ_XYebo>Lsd>Bm0C?IUJbb>roQ_L4TGEvy%)~+J#6B78*e`lnncBA7*Dw zw)Yq~Ao<%UEczQt0%e2r6jcCEG86b&a>2xdBy}trX-z;PX}<>fT`EF3buxHVVSA+9 zB|92AmljLdzbRhDJjpT*&VrFw)^JntPPBTnrNXz8HwqYZvCY()b}|&V1!ywjRnse*8)VBYL0y z7!qVc%ar+MyXk(^#q??AMoD@r1G16eZ#el8!AfuF_3-h(Kk`xmvCPmUp~#7mQE0$2 zd2(UQ29uxMp=nJ2CuD3m_}g;otHBrwyD?XFYBj1J3xl~57fm1pb!Ad;U}8_P!5=r=1LjP42Gmf zcqF70%AN1uzk^uzAbKyY^cXkmVS>qQ_SAYg88?i15j8ihh-Ng6;pBCnL@at|99 zSJ+CI6!sn>PBIXP@|WN52>ul$$ZrF;`VA~L)3)nKf@5s{1vC-t!7Og2SJu_*8ycoJ zHYT(;t}#D>!Z1iUHc3?wN$`~!2<6@Nt7dhYfN9YZy6>XwPv#(ji_Q*2;eD>Q$*}X< z!TS&Hxt$X60yN(WfmYsy&qEuNC;a^UJSg|^I(N#+aCHCv9RtW;#>sQ?yTCK6S^EOI zEdE7&@Q$T)@d8uMsTYI~$;g6F@6GcAnVOWjtO69cC~Hr%9*l1qu_Y#&{&WJ^2fbKO z(z*MT0abeH{b>jHsEBYAybL|2SOX=Mu-Vli!u~vUlp70w%1laYjVI_6hpPSh9Y#The?rV>Oshams`*l3;jjUBz6J6ZhWCXD` zZ*?p>?)~udgRa76sByi_31%wdXCW`r!d#XMzB&%{=6e!#QT#*?oh!?D7Y{> zf-4NaWGezT0uKH26zy@ezA9}o46nxPrgI^`R^3ifi2MCwjAQje-@ur51ZAtT`GKn-3-}o2v4dK5^E)t%Q?QkY|3mL z_btQdD%g^*H)aIJ2G&DMr)<>7awyAQ%z@FD zxDL^ktuF8LRKb6iTM64=LhzpY*n z$E>4y4N+^xx-*91Nyd?TpvA>nAYQ#Zs=jQDb~bBt+*%UD!;zu)j-E$IwE-a-`~?e) zgrQzAt~&lFx<$|++H$zk_KR~-p`YJnS$^CR>j@nwR?{vi;43QcZ$P~dr3;VZ3Agg_ z@`f8?Q!qsXnw+4(mqK}A3@UY7fC_(F%jssE%Ly<pKt)}7LMOMyS=K3rnE+Q@U>yaQ5r0i-25!MZ`!^>%**kfIA1 zysfAM@a**5Tp!RkcmmY&#$$YL$$(V*J}l9l!(KN9D9p1Je6ADloyJ%SZ<2>i!eQY5 zy$AsMF|&bZfByUdDhBF~i9N^1PW_c1=H{UweLV^pFoj6~Sh2LU1nhiPK`?7#Lf*FH zZo&I_2Na?~+L5QVqa|f!U%)=Hoq6SSbqPSik-%OwLO`xp+TsK7PfLw*^q3iQi(GhW zgc#dMUAEt7Bx7imhll6mC;9n#ET5_|I4AknL^+GY0{aVAhcSp`FSjDl+&U@o)0^#& zNF(lI6kfgFcLphGzfJfmBzAeaChF)ZXv*Iei5A>5jPbp5k9n(53$(Z7pnaUMz|({- zLy|oWQ|M5=9vGwPSs|Et?+n9Syxo?rzXFe{_RT6Xok^@cC(2Jyethu~Pp}q4-I*Mc zbSTnJ!_fp>?-u7K4Pyc#Cpmau_^$P_505Gtcfqcy@N-VL3`nGF8VS>FONS^)>6;H# ze{{T*(2U!-u*~ovm&odM?gkVyrw(8By;*UuDFH$mPL&wSo~rqZ-M>h#g1*5C34IfS z6k~~i^{a&}q{jBIM=!7m!-+BEQrltg8@3>Nu8sVOpv;#@xmQ+ep|@<}LeC=^OzC45 zi&{VIb{voGOXMlM9f|tFxro5;G#Cm@XP-ujLD8A5$%tc%b*1HbNMP@XDr@q)iNkK| zO;1AkRhZI5YX#Y~58!g9#-|N~2d!8ho@K1DkSt|Q%xo-*zm+4)-C$N*$nYIyA&!G@ zkoT}&Wx*F&sAzA7Yw3)SB_Q=g7HhoSgbWM5!=o@L3NtHW48kq*^Q?_tD~5Io8*VRQ zVz43l69j=V33L)<1=JtRDr$>0*CFYnGm#Qt%f;ZJMmRzY`52YM%{-K1`K4Kx48`sR zQPP7krK+#IV+&7X4^*RxhFbCL9TrYK#2XC&&%0TxPKjSe#nLk@dP84!KDmK_n1mQ?S7oS7j@`4&O1sB7bfk= z8=d@pciKy}e$XN8cRGapB#XP(CTW2hO%Yo3hh@~n{0D8%h(ddoD1A?5Tej#ffihYj z9xMqthcxoMz+141YP9D#b%nzhCYUKk+^~UfMX2;GkNC$5nKB!6|FHOlNizHfU2EP3 z+CuMc4U_f@TT9%oWOl>V2rCoO3q)c33emUng!AhW6vGb*BZ7-kf7UY{$r!^Xmr`ds za*U-O$UZeEN~YDY7Z@0>5shlWKCA6m@s8zDlcrFu&-Yf!rXyr|9;W4y+rsBp0y7|2 z5^4qUb0Im#la=fA^PYEg+@*}EFqzD!_)B6x7S$Thm!b=G_QQWgA|Mnl&#lT$p8xdO zYQ9w{oS^Bs^0sYxK*8i<|9yO7UtsWe2_?vex>*Ak-~T#KT_im+F8Z#r=(|QLIOT$} zNX8ag@3-wvOXUId&tX-%Ow65)41p|Hb}?iW2&4OKFQ-8eIGEZy)%X=<>%u;1*G}R~ zuncw9d}-G@P9k#UHk z?k9HPbnILjY0n^0=-C^&{Jg|cP>AOK#%)kAHs1BfVRa^gsOt0*`Et?KMcsx!m@0G( zLZt!g4Y+v0_j%lkjE+uDWCQT)Eg%Bt78V8_WW$la0A0Jm#=#tReE?wsX?BZ*ipPdfj7^83mNV_h(q4Urk4(Qi9;Ht`GBL zW|o(wY-||1fQA93+xlr#O=lM{H~?5oJcW!TIcnkFqQ39fEqk|>Gj%`|d|HC&>mKVY zyE_1kNDn@RDR>#pBxLhlwAU59x&cjBX$v_3_@dWqcUyVe0IGw+>uO*;$OhH@CaKEH zwC6F!7{CzG2F4oCXfR|hd_P`z-XC`?tgJu~BB+P3m!zJYoMYbuQ?A_Q>4|5GD zN+W=@(g7`J(A#E)zkd1`HV10K(iCU*oUgal*nox_;-w*`$3Wdr?xTVP%F_>^b*N== z8iWj__#B|D{}j0IEW2jCxsnC^_7!*2nj;)ANn|{k{k6}CC7D56O?g~)esK}?go}5z z*KqnR{o+wBc)EO}Nit86DE$)lj{o_LO5bOmi}`s~Z|srWImKo!*N(e>PRQd1?)`nLYTyHr=EXBEXx zpT5u7Ur*L&f+>X;vy^)L>66^b7JqLd2#&2Je_U+LYG>bl0SkPuI4X!849 z2yMo{BsLWmzQa{$>;3P&7yWno<(e^?(Wf85#-f<>0dfIcyWZThY-2@K3o}g?ZfW%z zYG1kTvXh_2*$LWzwLmcyQ1HMd#xT>Hh@xuQ-W3}k@3Qo-Ww&*@2G-Gg3v#XNnmR)j z9#8~j;j5>GURs^jaWiJZ-Rs{*D0Onl+hcB~*! zd1E~Pjlyq@s|Jri?Op&B)(~)*mvbr#4rdLEo#nVx zxKZ+}7eKH}S>wcvki$!22uz)7D)q9|(jH9E&YPwNbR4~g-=cEc+b#bH%q=b|v{l%w zGD)c>83X-0w1q4{ygG0Xa0N4-A^5Cuiu6>|KbEMBvRbY$X99LJ1zDQL3ikLb$33P0o!vU)6X;mYrLYgt;H5E!)8B;yK^4=l*?0Bz6kY6jTMM818QnIv%Oc6(8ip(DBZAkQV74jMhNhrkUfV;|riPRoE zD2P;+q@sxBq~saeNxo=EzFr@$)oyx|Fi-z`bjyb8`4{ShMD_J>c4Ivx!^M6u{$~M3 zeHs3@yatIXLuTwoXeRSKcX_s-Hehio%>*Lwc2>o%2Ce5?(N-@l~THQ~F7$H5!F>!1Tnxn=ddlu*4Cc)#o!G>JRZh>BsLr z(Kgn*NV>YRuDOAQyX6o!C3V*6T7M*WZ6LGt;Ewn;)V|SEkB1)26ccckfnj52e@a0O z0vG6^ktc{_7osmt)k>)0A|U~_%k6zo-28O&Xkb2EJYbpuTu;cs;uq0lN+9wQw2}Fr zq{&~@MRGWhwhj|^uzpp8RRXK*HKWkIsiq_ilF zrN`U>hU`Ep&V_&egfsbEMI^|E{jcoi{#9+`Oe4fats5ruMF!V|&qMR01F9yTlOcqW z9AANDts^6DgV9pUY!Rl9ViwQXx(8)%7^i0JUc5RIXF*h zn%xdjjXP2;{m%94cn8;pOu1R=6RW5+w(2s;$~t~q{pe9jMc&<6NK&>MRxOTWuSh|9 zdJ;~f0G5;{SO2U?@7PPTN<9rLTs3&rNq`$I?4+NMX5d@PbJ+UT4whJ=;PubSLE>c-1&I@-4J{r(}cy*h$K zL}jN%NI8<)qdl~{NyO7=gz9Mz8!RyPg)mq}T3gu*}tX7^7fLvIu$XD*44kLMAd63c`?>V?sh~_J;==zT*eW;ce0N1c8-WC;P3p zDP=3P(~4Dg61tu={=+Az_4k-HVoosZqfs;s1Y^o3wf+Vxg#MR)vzP+CN0*z(RMWZ9 z71>p1g5QKEM(_<@n;=A0mw>9iaVno9t5RgHRs$t^s>2h>gFLF*7>z&Oc>`ubmtKe5 z68%lYU9bH{%4cHMS)zA#am=)2}M)WH5}lCJjmJ7Zk1d832aBgX%u>7K(Xd%wSdPffOM+t$f$GAFyq zc1<=W+va53w(ZHbp3~?1d;YHLYM-us)?W9$@AZ1WTB`oH_GCh?PD`LhgL%7KdPGTe zXW9Scqw$&YH7a&%*8(o}A}_s;c&lAG|9ffl@r#I0b5wLj7evn;t9x7_a3ctBgZJTT zS^aV+C5BcDQBU-IockdCC#WfQ+~vaPi6x}V<{Oa~AVj{6$>|3yY0->Ky;AW@v}@#| z78|3MA3DP9k9BQ7_%83HS6?T>KOY7d!$=0iQq(;Rlp)fhZjUBM3DQaRN|6Y6tm|zO zoZ~vpBkCss&bJIcPNRD;qh$^Q+1Zg+FOwaM?c~|GXJ^fJ1#NW<3tZoc$ytn9E_e6r zwPUhg7l~Nh%bfl^O$$*g_CI1X+}hBfdrHC5lYs{P8L7GVbgg;l9I82qziYTR%9nJB zQ79jaOB{rA2%3tuVBM?F*L3T-{ude&$B=|B3wj{jL)9^_-5mHPhake}5|1KKv^b!Y zA4V3r4k?e#k73Myj@RO(FZ62EA9*9FA%-#x+J%I~EMBue@>j+P93$5*17a?31Dkkb zE9Qucuhtv)f-MkE@Q0<1UR!h!Jp6u0u(=D^@usdcj%?vfRt%~C7H)Z5hQo_=+EGL7 z<#3#*A^t}+LfmYQtr6$XsEvBttsdncAO{|i196a@m3!~g!dGi%*#>If{6QOvNtgeM zwNf;|G4VNsEDd?EctOZSw?Q0Nxrb&>Q{GNy%)$zlGQ9tx;25#L?H>{b9M#=Sql>1c zJr88@2jV3kG_d0VTrsxZCoZ9(!-DkbBsIS!A$aNcO4dH%IgZw(+_SHLY@-_2X)^HL ziy~+-$4D$y4&8c3>#$`vRi;d_H*JU@70FTxi1JOG|zv$Az zDB2d!@?6aT4Y#|(Y>Ugtj5g(&;`b%I{R%?_aYnDyg*qMUiO)wtY7DxjyN?d4SOcMI z1{wxTpi@`}hZIPXyX0srTF+>PX)4ynO-M(oqsjk!EsCVePHnWt0eE_(MNH{?Qz@zB z-SVSSYf-^7o$rCQk*#+_3jU zVD4;m?zPT;442k<3JbIJA?#TUbVvUncs}IMxPmt4H=c2m3apMT#B-hj%ZNcbqUFmZ z96^$z2UhvFt(<2UC-$aDuHgJeKrkx})yuoUA5ZxIZqnj9mY z5S8;OH^ZHnk3J3(SW27oT@zOz%^aQ|RvgDVtesDB8$Ex{b&l&;~H-SD7S^cEa@;iz}1zZ}4+%x($TQ0^2K)JQ0if zBS_=S>hD26Y9N{EhhgNPq=xG?e6Ad_R{us#e)yQW2{>XlaUJF?CN1Vh8ca7ghiUPO zwHYWC>tL`iBH79kiAz8ehZ1#jfPh3th;2WiB7;bHoRx{JbOKSv%ni{#;w1dKZ}4|e zez9@n6RZzV`wyct44j3x?Uo4 zT6*#>PJ!p;oEZc^#4awpa?7{EQ%ooEY>s`Zd?%H0IhocsgA3stvLuG;PQw`W`V}v^ zBTs^aq-xvd4uV1!rvYrD<@h2PkFVmLD>RgZu`J)90s|`9gTbLh z>FF=1hIDM=yKC}&be!MWcu%+-Ju4C2B`6=nVu&{Mi_O-x#J_%=|M<~zb3V@J#H=J8 z?8zgw$Z4QK@dJ3<@(bs6g1`$u6KGKf8t7|KjO0xvEaGrp{{2vwzuu-tL?Xm9=tLF= ztz6ApQgADp@V}kRd9FYwukCTgd*O9aT4SLk43}W6&hqZ*d-beP*Yj>@efec`y7AJN z<`?}?eIy=yZcf95*QA7uq3gxRy;OL#6oWjQmVyilkk_C_6Hi@X5OW~;`@SGZqd73^ zxFvO$Lqp<7D*9_Thxk^Q5clI4avGrR0aG1?+x=J^%ePS~Qjb-ay{`xRt?7Qsy}DRCuG++T?20 zk6$Rzy*o@ksf^|1%k69}Rb>ULE_P>k>kT5+fXMMx?kA_ZEfpZir? zPDr6zKc7YO4(pzUYq~WKYa4;p+mBNASv()-VNHapOBzU0Ie{T`A z1i`{gq;W9WYu)D<(9(>lL{%-rCo4C&v`~?IAMgKha`Ml0eyd~*17)RqedNvFQk=H? z6Gl`qq)Ib-+wB-I%Zx9oLaSV3=z>bA=K;mI$s2eIrTb*`(|mq}&U<2}j*5e5us9ep<%Ym2j3(Sws%b85W9o3X&RWa6WJ-8@4yvf6<&1 z(Yyd#D0omNJ}^OJ25t25%CYZv_usyF0d*})ys2DLK*14xW>-~B&Gp05o#6i(n_fkC z7+v62e7glx+KdK8ps=ry{i5%W`N?-Y2_3tu4=cm;xL9hb&majC*wR26SkbIz*=hY1 zuBsv-;i(HBf~S{DuIGG#x)^Qo`ZAm?XJ$IoDQBjNZe`IlitDsh>c?X380RKHPXNF( z_Gz1{&IBqqS5YdjsDDAgQ9V=mbR~rN{5Qmm)?8Ctl$&!@cu^dnBGbEPN^gRBX~OnX zS3t+r*v0KCz^DN3cV_r>?JojvR{?^8EptIE$@3UgM4^yxnq(yYV&D4$_}=HT6&&qQ zhq7H+=trKyiYb(?NW}K@8`SJOOgNQ{1^K5ZRODJf- z@0o>|6BubFG9hF3-%N0()m)*eV?Uouk$0bpu;!wR*Ci-qQ_QxJ*D#zHizS*IH$e(gCq4{gWpb`bvC3-+xx zJ+|a{;o?@${ZVNZ(!uLC zH#1)CW9yM{oUjQ_U%Dq`lP6;D(j z*L_GeEeU<>k2up@44HDFby2`&GvDi;g!?~A-yE8Fvm`i@GP7m@XfQW{(ZJ<#h{%^~ zsr2-*T<`3Ym0Q=>(96zMBaGc&4VHVKA0dG4PMO!TA6R=hSlIEhP&0`b=2DW>>$MtI zNaQ9^!umPf`_r0uPAkWvr}0)k`_LC3gM>MjDWt|!SBQUHm{z{8`{8vkUQjH|YT>X_ zX6IU;E1Tz1mY90DTA5y@PCRL`X5F(!*C_o-78!vxt5}z8@p~cHz^Nyj&=)(v7>n=i z!J^6rj-yLO#ZZc17lkPx2vheqPS_do^RBue;}cMjkw+sHc0$1$R9al4x6JUJa$M$k z%3xk!2!ZL-!Yc)w<`=?^+fQ8Y5r`>vsXI3HM|++ZJw??x z1&bO*QkQmH-+3&vFD>N~Z;-)lryo0vwJk}%$99iIMIHuSQd*1XTOuWa7#;WuBh3kE zD%X~UznKT`_z{(tsdZnx>b=b_4sm{zr%n}{rWO6|TO8l4Vv|}TM~TV5y{P2PTHY+# z?%)7bR1yXW_6voej?n@yqZwP^iq0#x{PsJkrLHtpJp?;lGRaL-EG9TKmP|Ine=q;r z5KLZW;w1!G~!KF4vbd@Wu9N|$F;DWfCx2&8jI{$fx9{b}q4S3Ga z=WY%zKqR~fB4EmwVjyyGN$umkNbJ4$lup{|8_X zE@V+#>gT4z4m-u2B-1HEZQ+S8cvwLoigC!4d)FXzdsRS+$&d9(4r9QMu#OUU^-lzVyxrSajDmO z%F4v=bQc3AfOqk1buP`^O45U1qI2r%g+Iof9e!x3O}9+1SO0VRs=Kj~V|$nhv=2@; zP-aApI3f^M%6gZ2#3>Y7H*#@@r=J>BIRNz#kN`;3F()%q2vOY$PKCYK4l*)IfAb)0@>x z*Cv}tt*C~?s=G@8E!hKo<@M&}7kO#eO7t>k49m?)+J14h-l`+>gKMuPxbN_7D3TRW zd%Hl;>qELy8yPQfowVfD^%^nM)s&D$&-s0WREICwtGwc4{1MgGo4##(pH00A#|Jq@ zbaa_m^EQP1w{i4=i@WGV9#>J$^R;xIxTaVpe=H!V4I5Ptb=K5n}gA~oC8T?!|ZyTgcW zvcVvH2y_%Bb|6o@+bY}o`buQGOSTuXzGrbkyn$J7%L4pKlcbe#P0}r=(KLi5yTFMd zWR8!cOgC2Le}AKZ#^;fi= zkFFa+rFZ@8nNKUwkM)5c;}77mhS(3hp`cQO11n0|c4Ng}Fp*AG8j9$Tj2$q#kC2iv zVwM9NOC->9)lxF8(Db|WvVvwvE2@a7bPVcc8?r#90Y-(t^EU`Gl{FJQoSxx6OLKaoVmbSQR(>QD50!c9mB_JP)XJvJ z61_#)EO%KX6uUGD+rM^La}urTMBH4Cv^;^h9B$6>!7aY%d^GAx<`;CpuZkcXj&bk z2%V)=!0!r5oLg_&+$ZEp?bRi?oIr+yQeX-tPTHdZ|1uDhWdZhQr%HTz;Ito1#psed7)0`gSW2=ua6e` z8}ig`uxby!1M6fC4g*(e<9RJTudve0PgH1IX4x9u#ieLA9XsJw9X2Dk!THA=m_fV# z*Td6Y;jy&r_ezAj*wuI{wwPi@1ufGXzw*|9b}6LS=aVNQimAC3<`#9^zF4 z7Z3FHXz#w@7dYyoOv&(h_nm9si-a0W(y-b*xvudg*v}cr&#z|PQ;MY_ppcG(o-NZ`u1HZU;Mm?Vi!4Tf1|b&%H9`0cNQE<2&eDcyzk8ax=e zJbr+C*AuSd{i-#NA}K~r2GN@+C`+X$g9JfVQAD>IqGLVjYe)NZH%tW1k`_c+Fw%|0xSht{2(Od zz%3F7g`9jAW=G1;Y#HqaTf34X76PZFtc-Y{E3{pH846j^s6NU+uWV@E|9O=NPl^~m ze$Wk_Kb2VgMl;wuhTewQ=P{}&BYp}qg^|uwCjEo`bXS-f12!GYzi}vwQ&<>>Hj)V% z-)mo#EO6B1pCkXT0x>Sbx%GK}n+gMYhCZPV(v;&|C0}o+?Mx%_VaseQVv*I6I@Zgp z*X&J#sRIWx_y}ZWCM(HZb3>z24Xqg?n1mzNG95gTyh5=8BJ7!PJHFm<)+0o6v!ypG z-L0#FgjF+@sWacs({Oe~en7E0?>MDD8cJXN-`K#?+}0ZGvG6!t97B1hAyEJ}bvMUD zX}yi!PKed`z-@@q5&mc074iap=RCK_X~i^2Iou!gtV!zg!$1SGpkp(5_stH_%r5Fcp>IxD*;?*%&AyajF+xF&89 zBMqOrx)Le$roAqdN2JC&9rviZnpt^|-+kYO(QUbB4-aL1<~A{N^1 zrs~*$8>>djg<>`Gtr~_Z0@y1db&3WPIO5q^u(r>>qCB(8Z1+$i1 z7}W0>Q1sSQ^p?EP@C}jkv-O$+2X#->=R3 zmn$Q%@zzB6dQJOlpAiWbC$E5nBKvb8V!q#sL3d^JWQt&@ww$oYc7Ep^k`o0Hn~anq zWFkYB=Pc@g9@+)*pyeR!dd>Q^+b8LU;D&R;iO-c^=X44}Wr*T)On!53)9ns>v0hIa z%x)2~k8P6q3MMVvhkK0Om$!F`5LUXy(}jBReWuVkx97d7*?10eGUH#+1jEYN{JHhY z1v6Jc^9?HMkj>)wHbJ{}$k6oP-LcQ=@E&3@&yXR`uIxh@J?z6yJr1U7bF-!$v1HV( z%{~c+sM{8KN~vP@K2pY99^iAdOX>giK;Q#pHVOBvkM5=cIZ#1hP46^g)_}5Xm-kg1 zO%mg8Npx&0bL@q&Z&MI!7;V3Gs*iu@!7Ml;91K6o{hYg=F7jy&hHZZwHtl>Zc45$3 z89kqJVYxxEkU_M;X`)=2XP0(d$QFvC7X{I9+{Vqqsj;J4F|uvn8< z^&bkgWGOjNFwvfbohZ=UKMn<%cOeI7Q>+Y-W(3?pWG0yG;j~WEODZi2x~e0hKQ5pr z?qLaWg(BjFc4sxxpY{s1z+KrPxwzin!a`bXh^yZb<9v(gR6gW7vkj7Aam|ONtIJijHSjgRH8zQ5eS7>glh|;BS z$Zt<_o+KjDs%d@qU`wuoYebf zH?b1oKDI8^)J|Q~!T9snC3??agPky1?9IBk_3pjQwf8mO*RBy6&7eAf`0#iz;;RBnJs_I;PZ=R>)bI?spd#6t1s$Pf-HO?JHX2c zGnoJov9{=RlhtQt_X1z8SG(fR`=K(X-jnhEyAQ?{wD=ucD+}fEZEPrd^SN!v*V_8j z{MP~mGVz}orn2qdd*HybZI^>F((Z8ZDIJ1D;-cWrld(P~cl>8Bx@=;={Q<=v%^n0)V4Kl8$tUXnbQ?b87ehHH>8-bZp1t?%HBwco9*SeT@ zg|{T^ZzHxMZ=5+x(A-A4`~)a^6mb3i`Q5Y?Sja-gQP`}Wniea2+hV;cH?&ulqCsagwFiq2bO;cG4Urt#g6)L z95A@Fwgm->jZsv9&@<`;c%c07zyRQLVAy?qUT2Jg0Z+_pY@t@sVd4vZ!5qsdm2Rdxp+Ld;DGyE~!^&(hJ95kuaPMUg zYTvDdY}O%wN%55a|FZxe;@467a2l7puqPsOze-xnDNfgv_^y1{R#qDjv)||B@q2>F zxAJO?K)N5`wQu)r>tZtA!t5q4T<&$;KDugUdB-W#K771pI=eJ5-fjU2_J;$N_4P0F z3tD`)!b!fLn!vLQGa{}rc2Bv)lYI0qLWm8bVeiq8q6saxTU~MzTZ4~zrJ4UOq;C;6u;ByzZ2;|0z%Og{^VHQzcO4)ZSUnF&m#%x=B4tDZ+?pD zpLxQdC*7Mx>2y3ID23H;sXwN0ca5yk@Q*tV)rgeJ>6&fCe&rmu( zl#Iy+XRlE3mBy<@%>L*JM=7LQ*Lwbp%eQMT*7d>^w+t+0ShG$k>nWIbp1=mtM~_6e!vtzq z$g~2>nDbLS#`$V!W~xT#JuH$tE4{hWn@}&Tjklf2-1P`d4hA}VjSz=%a>+3acSGbQ z)y7lY?w?|OcS`vMgg_|2`+|LNn0BUK=v0-3@n$$}LkTAx*5>2bdG~!*tv5*~-&azn zc{)h2jpxypqV;o8Zq_M@lu z7Vs6FmVXzGNdGi@JXUMVYg+(<#jxw(#cZ>8B9@#T7LOHAe$flOPT})CJ4F(DyAF9m^UkdtcX4eW({_L81(l12dGGTh zn>0Fi3>@oeKIpPFp!&AElfWAdb~0N3cbD(Q!R~t9r|V#ScYQZ*dJzr-MTaLm$f-kI zS?P8*YjiPj^Kj$9=&;=5N2R6IZZyEG)CS9d*Oq32_5^z(htok4pIzZT z|H&y=V;yo54E@gwEzI6Kqc>2GdfK4h?Md1o>^D>yRjOp{XaQO?gC)Vw-cd?D3QPwi zqAd74Y?`QjWe1q^!wDzIP&yc1re1tEkB0b|zr&a1nQzZ*12j^3{=szbygzrSLn5nE)ThgWXMf z=D)i=+T;nb?Uent`@2BGA7|bXq(>xuibcHB%AhfGe~drkZvcgM|owYRnn@ zXyP_vi2fMPhbMp>V(ck$NSIbma(QH|@UxknxG+>73R(qIw6XVD0p>tMC?OJ4w1{d= zs2>rGwDQm2cwfEWA-PLRZaxU~X(fw(Taijmp&?kg;ww2s5xJOz*FjL>fl4LjWNz69 zTlqZuNKI^tQxX=ihKlttcp3gQMsbf4p!5b-T^TQZ#om5Ul1dDzECz!K*B$XR4%D2; z;oSLW8e9xX)ea+ME2EsuNl`>(mPT>rp)%TKnd4S_|6JkK6Su(lbSbv_}m zLr{ifSounxc)BU*A`+_FgWms!8%U%1uF7W2^ctEN+RQ*7zguhvb*#I7ivA4wjxJKk zlOxdMI>nDP1y!E@%5|}bxw6Uc6n3+5-2kYf`S`4qShSl;46(aifwY@F?~{l_7}Y0V1?T!_02*iJTwhGG3QG8ycYUNu z9kxctoP!)ZlbP+RmYsIW*87_N?OyoJj<1oiW6x0z|MuR4zoX&$N2Xw)rkz(HqIW@R z^`|8``$At+AzC#kxT?*9-C7dW_0ptIX6M~x9mf#<4Ykv;ntK?EFK1*`Q}a8osxeFN z{73*GkAaJF&<_&qd1()aPT=#nXVaZB8;RPK<}EX~w4^IK>=wndwXZis?RK@u=EB40 zHs@fh@&0Blxd|it^Xxb(U>pIrZFarJZLf{+8Zy#se7eg8y=3~gUVLn}%E9N0>F~zy zoQhamm(!>kQgI=ypobUoU?*434eOuwbrw1R_thh@W|x%iOu!*wAIal}nf39;&ApRt zF}>liiIPebjs%%v@ZC%QjUwd!0Ia;l-M4`s=(CmmIf>g)kuKh|T7TGr1(wJw=*qmZ zLy>z)-U-@h^k!G5YT^~EYC!{1ggumV`5G7s@WD~7V%t9>^y$(oz|gB*eEs1!cz>x# zgDbKQ(xx3@BqLhYYS>c)g7f}ayv#YmteL~2M;NNA=Hw$sp6m34@IXz8DyyLIk)o5zzq$4o+nkL zp&F{V^|hwWZdve^J5@kK%4^XnFxyw|s8E1I4`-?+2{v|+l(5`%Edm~IMdQJf2q7u) z`jvu3SY3@8Kk-{>`P#vW4#Y&UH(IWL*1d@`!+4XIAQ9J~VLyZfeKCT2hALoqG$-3QDtgjq+=1inc zb#tO!A^btlG+d3W~;ju_47&`JMt^q9B3|Rjh5us z%j`fD#+nGIFic>He~Hoa(QEbga;M$mzwGw5-43NC;k(^~JYK(J-3lm_Z|mZHy}hXs zJ(yhbYs{&TR#Y>&4$4ljpGk31Yu{&n6%l!EMwHK!{#3uExRvK+Ak?|cfZ=Q9wC0Y^ zD|5I!)R)<^udz;H8KFR4673BaF};@RyYgE-;=Nruan?gm$vgY+pdW`v50S>q9n3ee5qfM?a9fnZ$M${OLk6WvzXP5 z0V156+dyEGzBt>52Nr{lisADM!HgRrOV;%`)@^E`^m;$lqfDQ;>A3X1^tK?}zG%BV z1WvRa0O6PSwqHkI@&!9;cucH55bA_vP<=39c#48U`-|ctO=@3@pa@1^6}i>Gk_#{I~`R zY%AXwQ+%!=U*_Ur)(|2eMqc-@7`Z5D!JyQ{*dGFGN;IGXa=Zdq{0ru`TZ#M|tuk(4 z-n7dA{$iG*aI3Zc2?R2zQ~TYELV7$%2Gj06RD^}QsH zdw#C5u^zM2>tJr){NssB{|ODdow^-<7tneswr5BB+|*a4hYC_qH5kcv`y?0El0Sv- zyt{A-_u6|lp8R_aU&glcWK@~)V^Q_!zHp9BR8~?_C@sgyo(%8gb2}_B5KA!JTuu^Z zAjYWXuhpf+X&TRc#4Cowjk++2m653AL2&dhJ}+VN^wq7P8k>!JCe=NF+)+{6@3Zja z4MqXGpC_TTHqnT{nM#Seo-t^X1z+zh7VGn1Tc7H5*r_n(Bq#yi7#@=GGWPdUWm@$% zD)e;?TE#q3z-uMd?W%|Y1K+#eqxl+eFx>I;{Si2TxfDBM{4|&S(f=jEehHV&_IppO zOP!7Kh9KR*(d=d*sipxWA%SzQ#Aq-+`kg?_!O6*~-8OGr&%ed-=;GELd-zM-1x|yf za#-U44|3jnGS%v!Mu~q7hlh!8Wsf`pi-L@`wY6fx^ZTXm6mSGi7HD+J$;t6OZ3ldb zFzdi+_5q{wv$Opy&x;-4;5#;36_BKOG>IgaJ`+p{uTf{c`AyuHCj%E{8+jsKNX01I zd9Jesuadi6t`sRm4SNlNHH9E+xr!@Pgq3Sx5JqIqV#8Rpq@Vb6U&(u5!jq>l27bV> zsnO;wCT8KsQ~yH;&orOhQH(%^<64pB#`?BYFf)U$I!?94(MU*JUq*M%jUrnb6T!oe zct?ug5*V_BP6AIu~Us9AV{`vBZuYEMWM?~*SoXg+rU6d zVo5d&5c6g?9^m#nUwgDFB10a4EhUaX_{$NGSO3*!Y0=ki?1*gSv z4~#@%k&L}Lbhj!EHzc{yq%@AcjvpzE@x7nDD7NuxVA0m$08sYxrnMe>db0jGq@W|R z;a#R(U3uB3iQ`^6(OxiT@2p8`tdx^w!@-T3Y#pE~%8UsYj9eXHel-$T@|pd^*k2s; zw7v<$qUBi0>}7jaLh}glaT7C_RXuper(c896dN4UXEQ{CrDuRaCdUXhCtub|$R}GV z6BDa1DIwRTqc>^1HGECm(pF}@-{bdWO?nT5MZg`9f?Q;A^#XS`F}Qep>Z!1lyLlg4 z1i5M}Kb)S=JUH2+Bgd$Hn!}9V{$oNHbp8-KNx zQ`F7pzLZfEm-Be+9mJJ!^g6)R2}shp4cZP~3SYSRaXR^K7fE^q;h4K%$=`Vs#lVNy zX#MEsWgpB98PdE5`OYb4+uoSr2-p;NPAsZg+=T>O?39h6%r7K~rlOET)ar$^bi%HE z+Cn&XdCU`BqK1h+4FMfDecvrJpbYtT$l0|6eEOLI=RE`adXo2nrqYOM-TdNWt=qLB zaBBL?Qf=%wRi2ri7G%RQ0cw+8FLT+O79GsNU!n_;Q$rU^2MP~B^ldPMTj=EwI7FTT z#9MJWtn>%M(eZ%j_1EJ&D~lk@>qZJVatd@=U=|TtFu%U0Km%faVS(BA<4vekyXy1? zNLm9~S2fd#w1M$d)`-(hpI7U$^73oG7;>2;yLm+kW}i3xy8X1Y9v^%lDg_GUqnIq0 zs!R?>6M?@Uay(az=((w0q0#eyg5?*}3mL}J(a}Mt)0)tS2*|+Hb@RKpumNUB;CXEw z0b^V8fkU&;w?~M-s*8(5TsPfA@}p0D&zCBHhJ-SijH1;qj%V?=xn(U@XafB^QIejo zl4D{*4s15CoU(w8#@A&43Bj+=8Hvkjvuw2b2hsPbFT;KidjMDmUZ~V{-N_;Gosc95 zy`6w+HQ@dDk=)}bV7E}6^|P~MW$Sf$rHfU``{g|>bJG#!u7PeRM(;Ui==$Pn&Uc3J zlLMiXIzhT9Vq0S4SQq_?1D>ha&0aVg5gmC!OT$#Vi0h+;`QwDn%A z^}Nklo|ox8Q4`wKL|Nlt!_a~Rf=7+zoGqqGbeGe+?tSC=ib$YrI1P|$U8K-`!bSXbnKlH&H^ZsP-O&uf^6ZnXohrGd}PN$WRbN_ z+poK4SGfI+pn5oHH0`%TcDWU7`=rdm2+ag>jy*NOND!OwuXV=>VB#~_m~>GG>B4vz zGs5>bAKJ95bmo`;#4);h>g2nAF-B=PI!F^LUE+GMmmyBvX-8XR6)90>W8-3M14^)_P#fUk9=*@*<9?OmEo|CW$A_?8RMz=aWCCZ#oP*;^v zEr6@+7G?J-9Lz)>8mCHUc3Ai8Y7GgKMG4`7XS=_=)sS z^S1SI0a#%&Z(7z+2ii*zb?^Z_6_n^YTztCu3d6j2s=b zbK4y|?W{(!S$}WehHAGX<4NZi&*;bwiSi(ldh>lt z4w64NhklM}e_WriRJB^guvW?>Jhd5gp_ycLHD$=_y3Gk(+G=6|UB=vUS_N0e=52q& zm)VZT&9U1lK+NToquwM_`0-FBoj#K=7jgJe}K8e2XOTGs{Kbx2!22ty>mElWv zw(Ypb$QO?S-A*;jGWef-+xP7Y*8XB-#6&~I^RL z+t$ZJ)3tXtu*d-mlbDD|-;ca;qZob;D(~Yj%myfG3_9!3(9*U5P0FYHYTpSd%FOyP zN5{*KM~6XdvnybZQ^r^36OgQMxatwY7#tEgHR6J=BtO%R$mlNs9Ok-;d{kyTY&hgRjUa zC!UGB<2m<-6*KOKWuxcom;ji8bWYpDx7(@Ws;X#aqd_}h_Q!SRrB_GLDgi+`n^<;wu@~eD~kx5;WOif{H{@5Rg)(~{=j#}pmbl2LU)8AkYvi1h2 z@7JY2&%<3Ti}Z| ztUvfH&RZ7=U7D=ZiFvtrBA`|fk`EBu16S&UxN-)@rqJ+NCJ_KHg+vt8vswnQfuc9) zi7K01>VN9#B>Pjn7VY~f=Ji7=>l-tz{TB-1u#pe23AeDA2Op!Z2Oc}TRzogHA%d`E zA~m3rdJv&0%A!gWI_Cq=N#^lx#l@_$xpih~6Nx`(eh66k0qwSdAB!C}JdX$24F6 zy{Yz&9aOq9LMBTVp~FRoIUvg`jSdrMB{|-KxYjgBBSvF3 zK~{vp6^lAYnwW}ifU2v6sx#dAu;PHubF$kYGNInTE2c*$=?y;|3m}c|pVeTcI6|Q$ zd=NCYSvVSfV4xARn2?X$xmA{k8s1Q0rD3Bk=Hz#onz%34ORux9+(ll^6?1l~i{Os0%ODh3pSzlCzJn8W9I9RdIOrd32>_(cZCsX}eHG7bouBB@ zGy*SEm-0?e7O*54jYKT_t*9{(cDwc>)!(^3QkaGa>&$j9+gl6{C+NX%lc<>SUNfoU zrJz^nLzoVFEj$~tL#G!OfkfZTv`^wl_2a;WFXeQcA2f)~ZZD7&M zsi=tj>PX&>d_T+-6F?*jm9!m3$i43J3Bk94!jJ**YTAK`1)}+iJiNTzZ&!U0dE=db zfo)ip`yn>49)5LlKp=bFX-*DEeO^`CdPjVHcAx-+T8Q@5;becl9eu@%Y^th^eN`Z! z=mS9y{P8V>n6~#40^QPnr8!3PzADPzi??ja*$dNt_fgwa&xh<_;r`C)P9D!| zN?C_KYVL*Sr>~Y8`;82}<;6=T$AfPq*Y-{2nc!>D*0`jzlTSm3{X6!Gliq@YzieyY z!NeA0zWV`25h@g|ntew^M8{kh@>oxf`J4a-)8PHhLIO;kikOxqjoFm`_@cL5!dfwW?ax)v~#)jqOMzvYjU5e?FGq zOB-GCp2Kc0O7K1rGfywtZo`+4AB-$NpN>eIobQ=9l8Cf5u|)wEQ8(aw?kP?Xa~tp@ z?U}*XFJjnZ(7Hx@!jmw0nh7vUAz-0`$;o@pO)=PNf%PVe<#=U%icVy~jR7drqm2R5 zVroQPF=9|Xze;KqYPuPcoa-lNpH?b zP(cvwf>bmFyx=utjBCTcO@i*Dg?rVQ2L06|8*lPPekc5WyQc(|1~c*(@SYlanTCY^iaN(8sfyXd?H|j{dq~?!U{WD;Em83{o{VALnQnSuk(2xmU=5za)6hHmD6z3J7v%}D=BDBe zOlenF{8(-1wSRNs)WA?vMOWkdG2BRX8zf5+k!fGk;eSV-VufS*tfr-`t1)rig_ng< zw*2?$!Z*vUH?hqwh=G~z4-6LT5uBD<3}|Du&WZP@-Yq5E5K66=CvPH zUSAVq2uRX@1Fm<7fkE45n$30wHF{&UT);@Ah}U)?1WKpzH|Jl6lB((#pWUWzwEkx= z2GF^@*&l`~MTP>r6eVTlzOO$I%=FW3cXS3~p$3{5K;UnU+WD95Upm?+Meg60)g4Kq zhQE=|`@>$>eZo-4H}$-XR16&0p^%v%nEh)jb_>|8`Cc3<$=cHX{Xe44F}%(;+SY9v z+ji2}wvEQNZKFwJ+eu@qanjhfZ8x@)^XA)oU*})ER=d`GFy|QKX2aJajinjbMif*s zC5-EweY@J0?3Cs+;jGNT;75B(O#HW5 z=5M~oY{floR8t@^8he%Q>sitdo;Ga@&wAoG*+cl14$I}Q#~XBJ6yri7L(Y0%5NrNV z3*gaqzXgr0W^LRUj;M(JwavT4uN>{$MJ2VrH6EjXXv}o@X-;TZPr;8kCB#3KIjxlm z1BDqSzl+X{&01=!`uiW56tCkD$A?)~rez4!ME~*xCfHA{^h{DEcP>XyP?5!ynHU#+ zy+WG+#mR(38&7?p@uSqg4$3~ZeVf$NMaS|Oo?PU8zg38e8lN7CC1xpuF0CYPH${mD zlhb&_A}o(=`VkMQwcp5-vm+=bJbF(9N`DTmc5#xJ z#a^Tmsr~86ruaoJks=`n_CBC7VLK!cWl8<%{imO($qK$gbc>P3V?=`(t^GdPCZh0* zEsWS-{aV(-Gz0*gN{UuoL#@h>R7g7n!w5SBS5+Bni!tYSUXEggB?4mwtk{C|bAJjq zoFOV<(;xyZb=Rb#!^3=MA$TtO*HFlK7otOAsqGhh|mHu9!oh zK_i6)LUF<;F9cGJ3RuX{g={8>71pY+3`n~$8uq%*ROL%dd=yj5wtX+D5mh_e&(Fw9;5Ht1#VSiH;GJ!+>$c>EeS zjy>qoo@vVgY<5i}KHo>2o3M9|jj%W!_jE6`G&BIrn3rmgk9dOmpu=U`y06%HHh(s! z)4?SWr)l1_dd^`05!!Fq|6#MbamL{)lORQke0zTnGBrKzck$xv_Mj&D3HgKY=t2d} zY&Y0Sb#>D{Z-3DB-lQ)A!7@4mI-Q@>jf%Pn5Pu_l3fQ~*dw37+UdFj*+@Y=;=yi6sTDCYlZ*mXZHrBCRCl zN<(EKhxXg&naG3&G6MVHY=PIagjKE*DjLOzC=y*DB?Vd{)70y$qhlH=gwL(O>Eo2%d{zd@?5v^L%rhZ%0m6!8?otrpY#r;UG(v~$;7a9~ zvH|haE$mlpJQ#71_3l-{dSrpf2!$x3-bIX(9H!gS72up zG~z~_*fxi6bpClG0r*Cy@V2YBSZ(+ScrztS9U40Gy54vH&M`jDK#Kp>Be>YEct&n6 zu#+4I=i_tk6=(iSCuw`5Tsg@eQ+J59BPv; zOOMSsQ-{i7)8Cnm`F_W*Y!OaUu^w>Zw*IYK=t8yM(k#!Dc9PeftP>UC2-S}15y$%LC^3sd@97bYGmUP&$ikl_npV@8(<6Zm*g927=r+`a-T|t_*xxn7 z%r`?-{qK3F8y{C#vnsVG(e*UM!jhOfXm?gS4p$BPuEDfGS4*~-xQXBe}Cp2{Y<&X-PHJz$!wu>!TuTZR4!HA7H{fu*rR0BI~7PKv{wMfMYblV|oqx zFnTpIm3sR{5FBx{U)n{XgvwOp=w7F#4T$gBIVKgst1!p3vA7JdRC6T-df(f{wU4qo zOViM#%Yx2t=-QRUeU&&Fx=*4o-mZ(y?-v-A=AqL9=N7(+Ha0OHK$Q4f~q?H-PqXpJN^)Pa#5zoLg5{cSKodI^If; z)#|uEA~*^37!@LoKj#v=15woJI3I-;78cv3#aTOp{O?yeRKmcQcY#QK+HfXrCW9W( zEFiH{a1;PqC`4*f($g0g7eh?mgqI2cfSKiD$Ah4EAdYeXIE+JmV(@d2VkCNm zOI3w<;ZOLsQ$pv0&OY0(tjU0q1aHWm-9}OxX^xZbxTt{kq6S>jlnh2GCL=e?Q<}nY+ZHH@*gCf= z5}aAAyvMCvDKYe7-dse7=U4svfjh~@T64-uHYSU13iA^1mn~C(|Y>RyTwb z$ukku#{kIUY^I;-FE)5?zbgi(rhWM0Vs?l!o1)Jqgfa%0<&fnhG!vOfHx4(8+it=DQW6-8)eE?v)4gze2{s08N zp`+>iO%*-h9k%^R$pknhR6tm?>G4eA8t_vBu~bgLJ&nn94D(kA9C_nUH?sLlb ze)9lm&Ojh6Nt(#vxq zZsHgUMQo(mlYU)_(k=-h>*d+k2lXJYbM;st&Br^W?KYminJCBMGc(rMRE#%&JrJDm zva!U_X}4eW_mOXv)jVGk^BT?j8jH;EnvVuG%7>d)R?!LsXMM}dq{3Cb*_n6Pchvs! z2?7bP!EQ5#Sg340-^nO>fAWvvP4M`fp+fonIk|xS1>TJ2HcBAJX*U>pyze*tI$aw1%d;-Qn1a)9DL+a6%XFPD=A8>-DPqW-Y%mhA%c z70!u&8%#pp7ERWFwdqpanhbJ@a(mk=wOQ~RyQcs~s!+S@2lk4BaeXAF|Ln9kRoGmxF`I$a^ zG^RW>o+HOr!PD|H0>OQAG!$)TCd*CshRt0bQ{h~;$lhOOvmcY|n5D2m&x*Zd7ll7# zY-$iq#BtZyuR@PMnEwr3$tjeod9K*OdqkV9`lPKE541)t#I<;jrM-uiEn7Zmnmo^> zHtHsRH3{h+^~>nhX$l)7A)C(pvHrLstft5HFs65|A$x}mti3>=@svGpjJgwNu*dgx zhVP8qa<0UHyc0kdn=+c10<=U?f)o&7*s^3YqWsx;6>HK1*aPxXXrnscJ~PTcc^~`X z)PJ^sF6_Z)?0;3~hA;DW{p^o?V9@*MJyRe#1~ftCTLFcLC*zw55IX$X$oM4pe8O5= zTDU&nZ(@;{UqMTiKjXmv0@ts<0FxBBj(vtPC#Ix)W3bz3TZhI%A^(BP68s4v7#SJa zxdDC^AeJ-ibpX?!Pq6u##S_r{_{0&Y1Bwyghxcx0mj{jUD2eKm(eaS&d1{(rlgsLDj(4<%FK4RNs38z@KiY(C9iur znriwtm%v3;+wXUE_|dO>aeZXq7Nv%P+B1XWkUl@USWBFvasB9J=nmr@c%Pa0Y%2L| z?cnW3T^sE-qeB@a#Y1SOxpBc1ibiKBhF*dgNn>)a za}N9n4X%X8uz{IAR|_{cfBK*1_!l7-#VJMa3ZRrTIWGpDXB+9T(dzGPOTh8b;(F=R zf6Cu$5*rlLvsR?UpS)N{gCqpmiZ72d$rIPuIZh&o7GO8Z~#SByCX0Pr~}%UkUpe%H(wEofgT1l ze*2Zv&F1?>{|9R>wbrbDP$(ySyvr3&cBMi_Sw4cKEYEK01^Zl+uU2NYeN`k9_s7Zk z2%Dp^; zEWPHWq79ax&A1wyTOgXSoP{9tm|$Qkz32vQhYB__4oq(GNtjG`f+7-zL!t6TEC%!R z&5-iP8F>`>BADAa$YhwU#i)4E!pOo;^^#*9r-rA~@VTWg2Va?EHwIKS(^VA+GRL|3 zeMA2=C4buz>z(s{9NMdAMtB?8LlOIsFLlFUtfOw^e=X;JzZm6z_RcGgk*fJZ>G?Ic zf-q>d7GB-yk_CtF0td#{0;o*Pdc-Z3S-YDJZ+<; zNa-gF@lIyji7}XBpX>B}ubH?Z!`3HXcAsuL8DHwRnN^2}N;nC&i0tG3@WcQ`_x8#H z5+ch^_kVB+e0OITZKFn?3Y#$GZ&R(CdvAy15abTsoGHFjz5ksFkbTK1q{~~}HFC7f z@nmXwve|5=l(1g`h3-ee_DdC%bUPTaEO}y*_9n*%X_dd92Yw1~h!hOAxd7=9i8>EI-JVf{}EQ>Y% zFU6-*8u^tT#W+RJK|M~NnNeidAu)(hy4VNQkq>XWXAkN`8(;uMhQ9uc56NWo%S>c1 z)|c-&bdBG*GIk@1kc8M7Gv=}lD>B1n>Q0HzV?3PqOr{j2EslJ^H%~mI6Df;#{zxGy z^nwTgKCB11b0T)j7RG7YUX)Ax&w1IjP7)1=~cmrl>HiAzt*U#~iQc zO!oRZJ1gce@^y4A;=rT{Sn%D%C*Q`r$ihQu8Z)xj7?=*dI3OQAoHlz-$b$VXoR=WU zG8N*FGvS0&ifFGE{Zfpz=~D8?N0G$kJwCH%0)<0U@C%Bh2EIq>ueLZ|?F8LJy$~K9 zq!pmbg)zKa!5p+6vKI@jFbkqJb%+) z?QA?5nS{gRv&mYV`y=u2>teguOF#>A5~5PL)voe?UJ|&AFbb#Pr)&@UbjtsV=KH&l zduk70+uFfWggzbK#dLWr*o@-4uN}W=3`vTsj9DDdZZOr0*@wMKD(a>^yrYYNfm)~pcwrSC31-)z~ zcV-BYq-)Jt<-T)) zlc$L6>8J+3xQz~6hvIEPd_lYr-3#bt}>5vQ5UZA=SsLd(`s-fRB-Pt&8 z+x%RQRu$XK;yhfJ;^-CyrJ{LHoWSlcxo zruj9t4(gPAnJ)#KC23zL8)TJp%Ih-bo{OlP`0wlxqBQMQhSd(L5Rnw3B7A&Q^_-|p zO1q*(gPy5#C@T?HR~+aa({R^m@pet;@f|6v%?Vnv$`U=H%^#n`#9zqkZ#k2r4O9AK z%`wY!!C@b*8ui<7$ueldnejTLollo!hM?B#s|I-wLPxnZvmWn!x%06PG>j}Sxite= zXbWrdOx%Ck=$FP*D1DaJ1>;N9wB2Wk0o}6{AqyP_T|o_OG^n_19Wi{)guaSLyUhr` z9~=g`5C42=UX8qnxtv7Yu=7!A8_D9B3zG5%SK0{^P3n(@#~%wtY4(V-d-R!+aa!%5?FAST)@u4_nAo@1!&fUhDJOwtqMQ5{%N z^HgsvOo_`E9^)xVU)Z;xA`c8(UZc6(N}BtZES0%Zu6J8U6CpsZl1 zQH3dC_}9@2@So{eNvIY|pxxd&@S7ARMl%ke8gzUYZ81e{pRgIg`v#?5wn@wjrJX`P zUp@C2%AeKA|7}y9(%^DcXv?(}Nhp?T3o>ucyI%9+WQQGOCJIMC@_$u8m(dj76PhfB zR?q(xF;Xy9Rf#XD%yrbJ-JefNTuhF`j3d-UB0)vSr8y&+IWg0byf;P8XmsO}rClE! zOuEcnu9LJ|5s`DE9w6Y$&jXK`VlWyFHHi4zs*SMqRY!9-l%cN2U?h;q(~8OgQA`FJ z1#9}3VtBP4JjIMF`ZKzxpg&DmJ z-+HD(kzjgF96YX07CpK43aTp#YL&&Psmp1!3zb!oP$v{AF#6_Kt|6I5y$k!*i21fC zE4{xzBC9`Rq8WE%ea*j_OhVQ}?AEU@6oD19LQJd*P=KIHR}`cEPE1UJBobCzKTT{X zB0~LL3Js0@TaL3ln+#6m*Tf!mDVV1mBn2tNIKo+SiI~}uRKnD<>Nupz22^c0IKn*t z1Pi~yhEUZv`g$@3nQ18+D*>6}Dl7AeZYB$G(Y|%!wss41~)=t3Nrz$TM**6`BafENFqOZF9e$hp3-(S=5sBt zo5ge3#fA55w3vE#zV%1f75dTB0z;qI1A=jlTI=z4DWuL_Vew(c)dX}`QV#xQ<98k? zD=(!)iwFf*_gIO<5txdF(Cf-L$^G6=K{sKWpaw&&zRBZocXdvpK3W#?rwYntMqroy zTx8m$rSfF{TWub>Mg29R7$pY!@f4!aBKY2Q@2A=u-0I+$iHW63bM{;!j1sVPwIJ=S zu?J!To{{=ab|W*_1n!1BcXmmvebI+W6%72n{N;5R+2SKg~UQK$jtr@(@nx}M1N}V3$SHbM(|aJhF|_r zLa^deeC!^>Stm7zHH0PhN9u-rl*pk76>{VvqIsvP=sg5LmZ9_Tk?c=oFU`Z5;`VzK~aZOJeH zP_8~OjMQnYZWlx}=e1M^(?kN|oB6M9&bSH=9fXm23W7+W#!#dcM9%jGO}8D&i>@h7 zKE7*O^Yh2>pvZUS3om#6f7ZNCemhOJ&+8mIWgp(aMq#@wgEU~u%S^=|oT8HTf_xY7 zD)2_A*LQaheLaF)VUZ6eVkj^nDl0^tUtyRkf>I<75|Hvkj3@jhol__h)^#F*Vhs~+ z36?IL!!1z{>Fps?SR=Kl80hAzzyV!V3wcO>8nELX6!Pyf6=Vx4Rx_kbo}mdFsj)!% z;YUqWt!eBp5q-$7!E@%J7MJzJ++5KU2lb&Mu`ctZc?vRJUo)L>oyj5?U?Yux7Z?PO zr$DjXJdz|)MFpvfGOwC`Ts9yx;rb|q2vG)Bb>BGfineVTn&DD#40-47p^+XGP$7xL zqRt{DWpSd*I+`cu>TPWDq1AoRE-!KD%&(>1Z#s62)>_*`{d~pnYV+{L z?#Y$ENL{8c*qRVJX>UlXKqd$pjSAO+s#Bd>xkNs*+mtT@*DQH<<079Jj$Y@H0EJNVFZgj15ab z?4>R+`PxA?A9J8sPU>0K>BsldZ^LNNJgvLm%@oH*>0X}BXsio423*o+_#6gB(X}Io zSwM&k5obeF(YMT_z7+)J)aO71!s}`pG?b;PvQUYlQuF9xz0+{JRSL28fPx8mDO1bV zZq+WbIVAQ>{UB5|2SEzZzoOG0pvSyCOjA<0SNcW=LXJut2svgv5D;(Q*%nJ$Xes;?EzgI0xRw{#RxO#5?GQArcS zr+ep#8|w*Dklze23CFs&GfqPW1x4Vj z;qr1A$-KvEKzu$x&yOfP$YY{4m*9rY?QWZU|5TLmR3@f~V;)qL)76WSP{lE!Q7M<$ z2bPBZ_ksL&Rs4>y3*K`eBpfmlcl^&jV%MZX`1Xz*HrY0lv#AvcEwyi%qbaePnlTDS z#A5+X#6cWiIRvqbs-{t-A`C1@pQrvQ6t=CF|BJG7``vN7w(>nHyFyF7_4M5<%h+=g zzu<()5|gx{NP&_}0hS`gb@$7auvKtQrarvSPnJ*kGwG=i~(C!Wl_T@$J- z!im`nvJT@2;+2PE8>vV#!X%m4WrQECQk9f~*>$T~%k+{UmI8w>>*9TuOM;v#=mN9A zP_isB256K~<0Zu}c!WcP75+JVDyw)^)Dv+35vZgAyMP1{Du8|F^(zG2hnu&5@Z|wH zCBBMQdu-YjHgg<;Sl)&<$|5rMB;ZdmmcJ4JNG19K_mX>%~ zgouiZ8qWpv69{oIc%sb?K`Tf;QU469Y&|_!xVc&z>3})Fln}#UY5C%w%N+`jToVWi z3u_SWX%ObQX;>J$V@(t#R{*nNN4xnLx~}+9%X%W$mRm&kTm*+>ZRKsn{w-^eZc+q-iYCk z^vW584jHO~2oW)RG7f{_d1)voSPtaA`3s{w!7D&2clfsjNK71+r}eO8UBn?GdxWA* z9^?pOC^fY)DTtkHZHl5C31c4U982u^uJes~3sxJBYMuw`(D@Co(|F}O+6x;jhx&i3tKk1v7yPDzplc)-Dh*YOV%NtB^{d8`Kt2O_Rb=)FTmi7A(=f#RzMZ zBilIr_Q@GsNIAMd*wYNsyX*dGVelfBrttT$eK;LctFAv-b{BgO_iWm%_KVOBx{ex_ z9>z_jSC;)E&s6~}EOjdf@wmMy(tTqrDgO~i&9Qg=bjbSyW0y;rA_tR=8J=sOnO=DM zyK;kbiDRh{#aJMWJ61S(|L~&fC10m?hNBs15@%jGD2XDnAPY9a5M-1eF{MB#!*$`& z6S02@xq3I)b=OxJ=xFXMn60D=*)Hfmx zmX^wIw|~Nw#pVGap^y5 z5&}vsngvav=<@@rSCu@-Ud)~#Ll!mt(_ui7XhzSE@wnM*qsQ+qeVV0p;gRnlz-fu+ z8IGD_-GTU6o~*A-uI}oMb0+R$(69l3dZQLMR&a#ZAs!jF!btYMc(!#c+*v=gDihXVNm?9Ye_cS=)vllw7UK>#UR*XKxowbQlOVNa?^ZQrfQ`1=&XYj zYlIwEw1nY-QzcLKb~|@!7A_sPogh($;M03?qh05_mW~cV`ubDu@7-jr(~d*2$@$gi z>1Ljl3_QyGuV*R?@c(V21)Rj4>Nih3z_?~m8UgAjzNVHI=UM%1w0rC4_krCNM@QFB zOgL!<)_Q{&8(-r+E0z7I|suLWdO& z6g*4|49VGqd1dk_n&?^1Cl%klXRNDdb<8TGbz&VbJ4q&)y}X8?yMfgp>;(C%t5pc! zCM~T|JO3|=1R1i_iLuacvb5u{F_DV)zc~jF)`hF?so}j%FuSdE){6YIXY%%7l$h+G zcundF#KuAy)+x9WObeXTVq_e&`BK?>SiTYEw?H$aiDQCmhHquTMET=@vMiD1kp-zj zv$90H^1fcN%rMoI84lUwYMv1Ol%-6pvi}(?MIzj~rN|{4YZNdbI80b5=4Cs4LV8(0 zk)NsGwxVRNLYH^+Ez+pxs*Gl)*56XTKd8kVjaQl%NHMN8{vwUG~B&6{XJrN@`d3T*wq(35Tpft5v>V+I#Vp{S`T{bK~>WRC_Bu1ZirYJ9yYobz93CkLgsqIHz6i zT`-q~?XH%8H1LmVs)kZfla>7$KQXT(f-a6I7F$c2fb7*Qo3H7A(ag~f)`kRuICMGL zbb|JHXB1Pjy*=1`?cY@GxV@vXJCvccH>O~y`!*(qQRE6ACelb|LLcsUOC7VL@-l!q zvX6<2OGNvMZ?vDxR z8>&_JLhLhHNDLGZ29S}F&P!M(1;h;}%Ki}$p{Yk2fzPcz&QC)OM`DpAlAx4jssiHY z^a&#wY^t{M)~Ec`6H_kXsUqY?a~|E5)B99vFx{?j`(@H&VflNHrmD3F>^Y%JESh9W zphT0u@pw89Uvk{y&G;Zr7YNn-q2U4-CMH%TtoL}2Bs9Vf4UIZHSjxyQ(oCnR{+69f zkAQHgXVgm*Bl2|6^L;KQ4I(0Efs+_Hx0*Oy5t}`K=*Oe;pHEgL@5O$tA!A+`YT9sI zS`^5@!vzts;RS&z|Ks;+qxT42jJGBB%5JC+t_Gum@7d$|vla(R%ZYkniKX(un}%dO z`;C4f!>$8s@+MYsW@%{%5CBVCSy6xCe_5XV`|9sg+~ z-QO*cKkfIL$@F@BW}8{OUY}s`FMwF_6XH8USqvzSr6@lwR2?607qc@n*Lg4N4OSQk zJeOYp%jZZ%2Z6^P63^sI0F=R}zAD(@(htFV3t`6Rze6ju6lJb7j1APIdaeZX-CT6p zdq3^w($nY(cuLzrUq}$gtk=c>y#C}*Jzy98dl+20X?LFZ9vR6<%Ysre<0;=yd=x}0 zAzXd*7k(!~iBOOm+D_)`6lJoeur)(yBbQHia9VcM!q!|QT@*#ruTfi--d3b&Q8BwD zjTK(pbV&V0@-J;Fm%BOOckm`7c^Qg?pH4j`)+9KrSBfz>*)TYlGaK4-jKl(0k(w^K ztGFvS%nA)A#x8&bEyTES*Tp03a(~~J<_BSrIu>JMn4!g5NhZLAh7N{GHBb)Z=8n&M zZJ1%kXAvu~9xn@EAtM@=64do4XYpXkq7%yob;9_r{(u9inPgm*tI$6bnfBw`g6&jFWBxMjs zl~{igux0P)H=!+2l08L-0UN<_WqkSsvynTE98v{dr?-Zal*sUg>miu&UpDfgBB>SO z`U5+u(Q?-A$c&j{;=6+3DoA=sGhKwLtbeewt;6l);oWt+%q@CiRRGI#l=gl|`F;~d3qnuj z2(SADM+Cn>G3lQ3+TiMQ&%IQe$Zn^&36t~o2jJ9E3k#|(t*xKBqo?P^&WTU>{Lv9b ztLqup&d-%bSud{_B#RTkVn~#d@qw`U>BjlgFVVGK3e_&tAn@KIUb+ANbiF96sm(4g zhnZ;HbUXyPpVkciy&j>~XmzCpJTnwFoo9`!Lx(rM3<^b6RTtl5n*Up{F*hQ`1Lh0sy-awC<)R%bII;#n=sqQdwpk}KJI;wJ9oQ{=9l(p zpnAn8!{;xP>4ikB(P{qVJM0Su(#mT@wT^#Z=N@L=Y|B)N(GWbmHf^+B9ggvRqag5p z!%?4E7Fof|Z~haYE{vw*GN^#DE=Pm(C#hoV6%`*uaxUYofY<0uToOaP752e4pRzMP zQD>6Vs%43p?T4EjJ@!!pO?>kU+`U^gZw@X_%(~ z%$o4LZ98|lL^XB)t%fT9v)n-#A;MkB!1*u1q!to+MM$^$LxeVA3@(z;pdiAa`?cSz zWqy%EielnH>Vc4A(}I$L;7m!y(Qw4l>VI8vo9>9HH>8*p)FK-;fl;sdgJ-2dEg|UR zoSqw!WwKMl3oCnQL7VKG0zyPvpDX`oFjc-Ff$ff7OLUi#I*hiYzZ&lMF^H1fY2kwz z&M^UgelNQ}eKb`hnZ&!h4$}Qn>4Lbw>s~jL9RB9nOj#j;yUFnQ(4lLaiMb!B?q5ZxEuuJ) z{lpw9-fqJ%r|R zWWJw6!29rpzPT0BySYVnOfI)Yd0!xkdEz2UP={ZyS9@x>m$eX&{MYV_JD3EdSbz88 zr8!%Kk$-q>+K5a=<%|M5EGQ-}(z@_oAwT-*WPUXwRRCnrYRJwccza20Q~G1)xU1 z+yBtU3;5O3)utH0K9&Gjf!!v6X9!51>JH33J=2emj}@JN$jKo93RxK$83q8)GE*om zNtOVx>j5b{@W_Rgl{Pak{wu4iz*jQsd>tL*H#T&EPtC^nx3&nc+;J(t1CI$r z0@SlW{I@#nKw{W%g>oS&WEA;F%!G$ICtqcMbdas{-!JDoo$$4NxNSbE{}Fz-zuM`{ zZaSTO%(}>&YIVDfn0!CVtsC&YLtJ?XFoy$W)kL1wx9tB*B$0o4QkL5RPED-g_)0a# z1>y8FI}8=$+^FbK*_qCD5QNs zs%4CISY5qvf>rJtq#&KgU}bD%Nf=&PBbkV{e@#T}C;cQi^VoVS(f*q0079a%NFL`l z%@yF9sb2$2vDsfyCX7EXbAQ)RU%?YBK^%tYFGLnFZIVzTH}jD&j+#go?MpKz|juJmmaw4ucSRY$azH?l))-5qnD4OJJ+tqK@$8eq*X$6 z%;U>5Bvc1I4i+{Q1aeibd{|8B^vAN&v_^$ARga8Fq|{_EW)l;|9=RC&`7T?M{Y{jI z^A7|*u+CoODQ?)}b30*k)BOiON&_S^7VH z24AE+8O~2X*QaCjc(YkM8iwxguhLS==jUhleQLd7AO|ZH(f{sb(dlkp?IwM(t;qQm z3`4uiBt>W7(`^n^{}Nz2jXR1moClMKVup)n&iY0Ld8SK+?|XQcb|0KXkS&$7F`|m$ycI$YG#5Iy$hh zuv;&DpGh2mn3NWroME^`93T8yzUa*bbjEVl5qlymPV%!uiNHN_8Rp_z~nB= zzTO9@>>Z$kKz{!G+4j(W@hJeMXlS)sq?_Qmk@;VPZHkU77Qxey_^&ROXWk1B1UcS2 zR3L1~;AEllzfE6@82PE(Dc z2~PftqcNf^+Y(wd_&Q1*$`yK!-*I_8(RT3z9Nd4o> zs-RRpK{q{%l;@B4Hf__qdA^S1^pNzSdpP82E{c7;_hC8FJeJN2Yt0E>C}u;8Ev|iz z58IWNACw*Z)jvm%uc8C1wJaqrHsnaiz(K`2J!CZ>L!T|twO<`0TaI$jpYgoJY9HL@ z`sIcrqh1H+mbx?z!Jp>uWOx#bG_V9>pZB1<|9&Z_lw4hww$SJRVa9(0>+s|!8}$3@ z>F9l#+H=L$5K|w!%KR&<*gsi7zd%u4HmdvY4pN{6_%t=*<1Gh1>Y8Gtaz z-3CmmU#0V2$f*`?+@1KoEiJgS%veE|`YqTzSo3mmGsWe&r9QvSE=42EbXDhJy7H8y zs@Q_!9mOR9bidD@LC>pb7}K$HI$#AznlD#NX|&mBO9LeO)quWUOiWC@$rcX~MFVLT ztlHjJ{jXaP{1jnKF+A6h!otFB+i-SUfRn}W=3v}b$#VpyzZ4vu; z>j#jAw+A?43ftQ=KLdDxLfv@Tc$k@+bDmyI2j&0p287iWiiy)CF+4qXJ~tVPEJ~mE&o-73^fdr2ryXcx zAZCqylb*V8Iw%es&BV(@HxpxHal1QR7iEl##K?FJFJt1*)ESLKlZS9bgd=9Pr=Tvu zB$S_zBW%*eHr^kLKNOX0wGC6$!-7s zk7uYh5erFG-!Ug=+Q%GRYoYi%Xc3}5XkO&y+mx8PA67b8N*SY{Kt4}Qrn`D6sV$ot zRm1PHO7aEm(XGbJM{I1kZw6ZClV&4Mk}M**-{G^EgRZOodKv94G_mke&-F~)&~W>N zXk`+${PlDG__E@Jv;q$6U8!&XJafAw zqc&}hFPb4VY)VTMvZz4NP>?#VaGuaze=YOzO_KcQ5ZL+VYeI}S^j{c6A1BnR$21f& zND2vo$0b=PY&ANfc!1*fZn8epxejrf@vqaP74;e^GnR5$MbzNpi)MQFYsj(CBXlP9 z7FzIC@SuEA0b-3mw46|)RHT-aftTp)fn(h!lW$sHh`onr2K=9@iTz$n5fEz_gOM%I zmon07&Z52WtGBgmNgyenb+O(R^q~tzpGuUCd)!&?>n7ryi`W$QbJnt)i@5)QsC2A} z507n!z+}Sea;ro9LDIB-Dxb_5)f7uyH~geWw|ek>ndNIYF3Q{Sk_1ubfCSlsxv-)D zqo3TJv0rpIO%Z{+Wm*j?L&AIETUrU>*H8?d(YF7F3vGzN_CNMLMcdy*Lq<-{35dbE z0`hSh>Mv4_q78r={=&k-Qth}e<$At0oX%?X7busDRq$^;)ed4mu1>`q#qGj&u zE%}_sfj^R)8uSYUq+qrotx+3TS+#Fh79CCk9vlWqVy2h1qoOG)MA3D7dN(rqu6O^M zCP%gt_>mQ&E6yqio2djA=P9gtX8hsP8& z$x<|i2dNjYldbXPq6(11_8+f3MAN+I(l%Q0+TSt-*T zUs436v;DFM=I5{V7~h9?2_C-_<0}+FX9;;rF8Ayc4pkQ%P__LtA*biy;=026oMDL1CqOU|b+0 zy;o86K{`xnNkbxD9aY$@+yMWzu{)+>L+a=$4`o4F0azkT3c4mkSv-=uWjON z8D_Pc`n8*2EUOQZvu^?8xSg*2coD1BG8x0e!1jB~P+caj^M6`^`9sB3g9K|B>TGlt z6=C?WTNw`zF>wJ85$t~&Q_CYgE7aLZ<0^1)MGb- zkNwatRdHF_?Hkl6V6kgXM4n}F7?B}}D3upYPfy3hf+~Z6g@>;-8AT5c36XvQ((l+$ zcqhr3R6g}WxsFqLqhRcpVX^*y{atMsXi-sw;*bOv#2subNJ1?ILH!B^p=4#C@~A3k zjG&E)C23Se&-Q%ot%CkY`Xw$Y1c-Q{)e3(hI(R?0 zeGF5V91O>GQ}b+w9YsdqXOo5X%~_J^h(iYca`sGII|98bN>7o)6h6Fv@V#L-o$%S; zxsgfw*n|;pWYsSq6d-bFC6@Rv17an}8w-QT1jH16^ z#dtv?EttXDasZ|@CKoXlO1!k+qBQm3+uPG`vfRCb3=h7=7JXd-(NH5^#%1A=yb*85 zE9iFBK>=vZ*a+kk_T_f|e%|g)spQ63lb=*W^X^tu8cu>g%VpdDiZ%`R;$;1LJ?LIx z{e0&58~{H*6A(5M&`h0+qX9or9}`Q(etGTsPK+9%Oia6QncC>44^#hdRxPt@c^3hO zTV-U(z_u{Qf!6~)efPVAVmaC{z9%h>Y8B;$7I0hzzS{cjal2j@Y8`;F)!XO2*l7>n zS@7oe_I9**C1WS2q<`ZrFb+=Xg0Kg0N*xFHdv0E5^I1Oc<^!v!>U0>Q(Y>dO z2g-{i<%-()K*N0E-avtUM<*Xw=}jSI~hYS&Yab=?ob9=0+MSyMdU1h z5oH)xl>@O8Y558x9#6nmm=M`3XL3sTaEeRjMOSj;IdjPsi=q$CT2SNm<1#Ov3_Bd zHEj|9#-fJC#@V&C$fSgf3>@0=T_EqAx7K~q(hZm=Z3XHQz$f4a!5tc6IPh8u9gM_G zoeL!l^Z3U)=LcRG&&$JnLqO8$I1n5rgu$TerS8ppKO^)nznTU7gZERlZbKm9;9m&! zTL)0?JG#sL;-OKi*#~CC2~)>!dcY9vcEc&~S#kciz|v*aeF-SEQlRfoA|Dria~$W= z@++p)a>C608=9<%ly4?+ZJV6~J4Ph+oi6Yglm%lD4CSYN5SjdZJ!V=;1j}r0?`(kY z=Rl^0i}H{5-1Twa_uSl@%HihUvZ5!6{q z)d6}DM2;8Gi|=b`X_BcmGUU869v(P;PV}K!X+MZ!ob8u2d zT04!zXljR%K?b4|RIyc5UG&({sRRTmqx32lFiRrE_eBm-f2`X`r_wa@$;n3_5$e8{ z+E;!aI{aOeHF`OlHq=*Qe^8?;9PxbvouHlN@p#+ zolnLEE$dg@90XKQ-s;kR(sWK{?f_$fQ`TP*()gkhcaWP3u2ppjPP$rPq? z#ef!&c~p&@&rNSywT#1q?_tV=m=+)^jnPq;Sov?Ia)!_N(R~@=znJ!E?GNp$Wh0*Q zt;)orqezkh+~Hitv2V3E=j$VNWc|l2f4sc8!S{LKGnJO%@F7li_M;KAeaOL_&LN|~ zlaG>r$A-DBYCs%YXi3EPklcZHM{A?dXs9OGX`SBUAgsm`w)zdKN1(ht8h8bzQu^)= zKJaI!`^)!|!(yRACG;!k^4r{r6VM;gY&jKknA~jy{C<*bY$2C^r4M7Rdw~2>At|NT zG~ejDHMYDYi03EFDIG+0ZQt7Xh~d<$t>#A1AkiAW5i!o=YU^+ zDaDrx#{8$9Xmol!R3(fa{9RfCrfCy2)>3FSm}$^Op?kSEZxFg}lWVVmB4SqqZ|?M6 z>$G4*ZHr)-6g7^9nel>pdnyBzqq)_dG{Om z|0gt0dReE6L4asGFR1*(GSk1zefyV1-~T7GjO%?e|D!&9J;#2H0JRi$%l89A6(uE9 z;1)Pz;qr8$QtD_KsOJ3J#sc@pBgLt@l8%ln|7fRDCiOtBv0%gEzqGo+(Ns22{gLH+ zF_z`I5hiT$0lx6=a{jkB!KLm}Eik4obT+ReEkJHKgD6LaDi8uwclO&F$r>8RSH!^l zN(1y@2C&hHB1Wjw28>a@f7H+GNu!epB!sbsMU%&QBd-%lXj0)8_avQPoa`Bln`-0S z?~|L4uz^EZ7X)zoK2vUWzTy9g5o5NP!;<;kV9TzSD*ND(nT@l3zt&tF$dyK< z9zzo$@&83EWFQO)`du`wsnE2RGZ_qb8yk!zqziD3XR3EMW2~BLJ zkIUjVhW_+A99p8;7}!H$h&%OQeMKRkqi={?ZUmnA*rW@Z(dfV|<-Sdh=dA{?a2rE1 zldD@g9*LM$7J)cqh~4_AxnHRPuQTay09O$a_VVIzj9E^h4Tnr7WBF`>F+`xjL`)hd zD3#Qz{qLnJ!moRmcYlMbU2XGd>K1)*WA(?5CFhm~Gt7^g{?d#!H%n){)w^6*Tw+54 zCq3lx8})|jRNaN4-<8-K*hPvdk(~ZhrM;mcy{wa-P>cvf)eKnRVa6!+T;Y#s7F@CN zgZ2;$WgX|jSQ|ev%`=z{R>ibQZ+L9&Ht`m|doO|*faN=G4nded89$z z!?tbRoIIZl5!e?W?6b;!*f@MLeCq4A@Z~&*Mxx#=sn=d(4tM+7JM8C22lKx*e(HTE z^L#<{J{IyiWVwT>WSEG-<96G6+f=*d=1i#4?aW~C+W9WlvEi`!GUfUQFiZUT0Nhw2 zuF3_&`a*vm+J1%r*$L3w0^1GzH+Iy@&-L4jPr6Qz+e&M;mY3L7y2sxQiJv!#iP=^k z`lxB3^4=L0cjbd&uwP@I0p^UvKfy4n+|DXj_&7%E%;@rU8PcD!5wN>%=k;dR_@xzb zT2ds$99e3)&FR8hCL8%%fo?B2fDCwI%qryPW476xiy?*HTk4vdm44dj4U8(i_#Ap| z;gajiK(|hi6I{mzAJ>m8q18(Yyc3GUze;DcL$*`%{P%EQcMrp9%blLG#uGtER&QYM z)%?m8i4t)MqvbCm>C{_htw(i3VRehB1Ca|30~5Pkj5l-?_o3<2)Iu-$fV=kz*tGPg zus;@jeOWZ$l6lNbDWL^)VR?u~f1pI?O+AEH$^)3s73aHDqhNE9K|Jk72Z<@ShN;lX zP$6|hqk>lnsY&~o&8RWakA$I1cv8)>;bxPwtGw>U%Ps(hPt*8^<+=P5;id^5G{a+=L&XNg=Tw%ZBSxo!;A&nd4@F&Y$ zuu)*qBX_wG<{kjZ7?XWPDw(8_sB|Lo-WAe3=;4%tUH9tr)o8(1A*->vBY*p+89$a0 zEH2WkurFQ!TVm?uygB2=o$XjoI(+jTaqLUDFS}soXob#HB|j{$_Y@keA^hFC`W$%Q zoggjkqMFKaM;URXLl^RJi$|bkWNFBghN1b~tFIf0fhP&TY>t8s866_hXaKA;PeU3= z$|$5WXZ^78KeI?&ksvyvJ*OKdMhR!c6KzT+DK4t1L6~R7#={$QK7zEAmX$@Y+3M;v znTk26^+;3G<)awjF~t_H-u95ghyX6A9zy zDYVS)la+=IjgU`IwO6C4vEOC2T#r|*T)*h$)<6T3b?&6qM|`)k3{DIaS#;UjH{J-S ze>bj)K$n%Lu>QoU;+!g==6nLBg7|Scb~7^sI$O4#rh-w+OCid7`+nzm1?KMY>h<|p zU0=_{#(#3Xya#l}Wc^|5s}m!5*B*O$Vvvn_zgtKw1=|R{4}tYn{H$20|3@Xtecz|} zUl#~)boM>n`R9ia4CW_pJLe}9ho|J32JL8xyU(6s--jq5jxZYVk&>+}~yDOo_i%Adq zi__0&cZAx35I^dU;dKx+m{9jKOoPf)H%-_08&ui{@gb(MzDomK&=N0JH)0XIgeWX7 z5t3%1i2ieye1wHw@}xl>-cMAW!gc*j0|+A}5rRzp8?4!kFxdH>bAbNTDYr>Ur9o2a z9G2n?K(riVhMc%4xd#;~daxV?Qh|yoQp2SS5dsl861<#7lEgYP$=p6boVlYqS7+%9 zw4PeP$thyqDXIly#|iqkOv72gk)SNeu7Z{I+~wO}KqLgELrx!~At_xTHEDcDX!+kL zdk5@jzQ5+ZMKgf@0#(b7tXRS_O$_7!3_WHo2&CdMrTW^1op=GIC3y%H1+SlPcXZNV z1~^s>`|fgA^yFT-m0H|x))qD`I{Kz< zsncfhb81TV-x51cvUtR_zDSX(rt8%Lh+W(iY9)m_$kkgKM6cBybLu6rkZ_4LemS3R zvOg;U!AW3q^|GV0+liu(pTPXMH6{ zN0}fnt%*T%Ji=4NVYkMOc4?7Axt+Uyv40(FT!nS8p>RKUw(h~iUipysPYv__F`tZ< zTbf(vd}H}zojC0L6=!Opj4TEFM=68g;cqH43u5S(r)SEhPp(=nwu!Ow%_&PEmg4Wv zT?72?+T>TR(fuUDk3o|2j)9apo2)<7SRIjJXhmM^NtgY8g zRyvuXNE8$Lml-VA_v7uhGNc#`;?DJ(k#>9CVp)7 z27PK5%P8hob;|E++P6?I-LEDCa&mODP98~Mk+IfR=HZ80RK2$nO?k!3SJyM&`^KB- z$<~$QI@2R7nRoMdWcMagqa zDCmb=w55E)Q7%q=?H4Uk#fEAC`62dNh_y<%ncO484S^p^nosInc)-1<4Y`E8u#o}A=< z`7bo)Oq&7PY!+Her#e-G z;dy(TluHkxC>o|gDu&rN(Qt|TQ@!KYS=*9kVt<2PbLo3h5vP_(e+(ytW})9y4xvBxg5F= z7Rtd30ElOTAHfFgBeT+E6$hiJwX5$J4iXmaLmiPcz&ehD=Y-Hj$Ob`<)(^27^ZUc= zQrQ?12d(M(cpru*wV9Aa5>71>E5C32%Z98WZ{h*DtZtxeo?)EPnRcfRhbN$zyg8GVwE)zD}40%;ktt@Zk}S0AjIYNb|ww7%kI{ zCwkDh(#MtPqL}z`s(-#%#lZ1Fhfi?EP3>Al|L$8(krBsAR9D=(Gf(C_jDkh@+#gk@ z%?w3{B?-!_^$n8qIvnnJA48y>C%kIWe$G#9y{!PcxAU0!yct;Q?mo@1wb!IWubA5_ zK(WJjoSmU0WcFu0Nkb745&yN(DQIbp16{8C=9BcT`zXLX%0Et-yyOkgg6;QjV+4FB zT2wjTFbo#fKHN_I$QfoM!>k7EFA?x($>7P&COSM1*0*!qysB{I80tDlnRPb=e2=x> zKbn@l@bp+{KPqe}`IJHgyS^?SZ+(q|@Oq7Tfa1$P88@`@x{icv{J@Zx$?Wj$ehOU? zn(F3hTY97!4?vxQzmZE7ZF$Wah3(1L9b})vJLJU-<^1~NmvL@$vy}u_RTvAWOjCWq zmqHeXHc}*2i}%Sa$*Twy$%yVbJv!t;pxodwE%LvysF9W)h*d zo?|$f*odl3*S_lI;enV(=LB1&bwx-4Z=@BVrYcKaV4nq^#tA7ABPAoxaw}5IPAq}CxIIwIl+z2+$ z(v!iII6_%TTjhHkjK8#`uy_?3lg2fI_*+1H+-g~oS|H7)-I~kFL&yfPt_+7+M#$E(Es*)bYL8yn* znr2w>47kqs6XN{>jaOdVvyB9;Pjb^*EEUw|WmTl+8tQ&KG;ug60VyD%R+~p)<1wGW ze!a~{88H&R$9z=&hq0l@Sn^N@+$#9v<33rF_z;CS!SanS(b#d)^Fj_Z2dmMf5Z(Da zEy3p7<0X9TYJ2EaK~jMVM``hjV2BWb;2F|}SgNQV4!6GLJ^E$%NEp%C!hxtokUFNF z)vg{{Dt$b%t;;ET~b`_~Qq7bA-D(}!;L&=h#1_j<0)75na z6z=qml6MyPq$5evLjt}Xmd$c{&HCJNzB<UN>l3!KDM(Rr6AL2R-9BF5~v)$ym0Rx|2%3PutMFNRpVxx~j-po`#}EdR$n)seEM z=Ga&=%`kKt(3^)6Iry74(#z)xHfsrNSn2(KG~4U0Dv-lN6`Q@vf&hVsxW`&X*l(vyKy1>Sn7!R1ZHPuFq$0Q5&C(?>M4^5Nqdi z+}nOTUp~LOBHsg3X5F&!kYVCxQ+anFem9BS3+t%6-g-59WzOdzg#N=L)#g{7uFuOn zYyom_Pu_0RR?*ACG&Kbh^SANX^=kE(!-sxo5WUa!zkInTQN)>L|R2+VFQ{0;vMv$^#7+MP+3pRA8xXQtoRtJTN9SM^pzXDC`8G8#z7c>yf~qZO0aGOf`?8e0zS?+o4M5^6>Ft`<|sq! zt(B0w)rg!-yZ5XC-|;k4h%BgI7XBu)qLXxJmIp6mFE!WtkDq%=GDQ-@jBCL%W7n40Pzs5Grw3xDz zM$6+Sb^5cF(U=6sXsyPE`m@aa$}UH|PfW`t-+34sPSyLGtYMUAIIH!!h~I0s4Hju= z#O^Vy>&qi*DD68~|43F~a1Rn_5aiQ0Peph0aC;buQ*J_E8abCLBQ)}=Vj-8XOOC|IRvw+nws$0@N5#DzJO87=91Ys!V) zVHa4!a-|@;MBDBR%I*H27eIfChHQ?N$j2|$Pcfzu_QVN+7S&u5dJQlQ6NXw$c$5bp z-ZZhXNiT@T)dPz710-#h)Q29G(tF|qU8~UAC=pJU9Ova7U6>%HHbM zcB^#6bi+>)|6I0--4Q?)BOP)Bh75?BWdXWLQchdZ%gxrOhGvt7>#f=5!y4WN$(LzT z5~-ldeAWB*_N~EMNAqa|Nh)WncIn+aO&#M*rT18@`dCyfuH3Lx^iOD)~)ADQXRdS2e=3<>+}wNC(b{p-%y*x&ArVk(9EAE{y* zuTACC+!UpyEDKzHDAiARc}pu7j-SDuUPq^jFc3EhJ&+2Mc_*dR_o^u2bf#SXg9!Pf7@w$S-!Cr-R_&4U$eMf z)^9D18pGWgNuZCG30Ae43P!W6VD40>8)s*0~y8o z0wS`o6@~oz(*&2%(ou+Mm-UNR0=m6w?Pds>Up(vL;h{vRG+0S_SOF4pA^3p3rlnJA zYbo2}bz83a=sVLu5SQ zqQ?&12d5JRStx;EfdouYUsgj8?I^d#tNB`Qubw27?y8`uxw1`xUBjz=IYtrA{6-0G zn>-(EUYMVLb!&AhRCd}t{XHODf2eTvkRNUbv=P@vNtE+wk!PZ9Yhi9YVM_FFh0k4bL#`4q$GsHbf6W6?=mHkA z;$*ritzEYQn7W>4pEX%1^T7x(MUtt)UII`K^kE%cJ2-K8Gdf7&AL+hx*+IkiA?d@2 zPR9)^_G>S8C59!vHyB_@^+93j7W$*0ig^xOZPneS`A>oHdVU62o6;s-tToWxtddk> zH3_?Iu26J!d)x^0y;PeKlg20-CyPy1rTh3QUG>ad+ldG*OyGMsGQ1JJ1*Ut&l zEK>I9vKl4uPg-iNjTo1ZV=!~3-tm8afawt9z@4wIj{0x&b??CV{pk8NOT! zpoEo}`))jUm!xRY)1S!3k=_~8*+M@RO~8lcmx!T!y&eOCzdFOa!>I^u)3%MY*c@#) z9BHi-qlAqJdwOHq6PUgYSLV@K1lKc5kS(!v$e(ZmwfzEho8@R8bUL&ohyU0_#a89i zx_ydu)lEFsHmp;_XO?!wuQGNYoG3AQ9>({B!?U7J+jT1<*G%=Gyqv9NX9(ChXdh&& zry^OCXR|_}aMOQvp8fu<<$VsE0v~gCse96H3k?9-+(pm8w8$^1sVG;u&fX4YN#>i4?si z?zxz(EZDPz1V&InLa2|}N_f~v!frS#7a6P>s7RTP> zfh(es*%Y6+f7H6#ya!Yb(YoF_zxE~tZ) zsT3jXTiPNY1rWw}?!R~`(Yoit zI$%A=y*lJty3`DVrOJAGZoJw;U*)yt2fRhxj7b4n36EW_dAu{IS_W08)TUW3aE){O z=`xw(r6E|C$9bH|I3z}o!rhC6WR7P)%(dH+PBmD<@D#_crL@dnUIOEm-fWw(ZNtuJ z?#mLSgk}znW9n5D;5aorihC|bXZVeGEoIX8kmr!*GtBX!u^W(fUO)s;n`R|R;IOW> zUvF+;L9??KM*=iyOUQn@L$MfR@&I7zSOtM4WK*0)Npi8*FxpA1no!jB2>Do`r?|m8 zS48$VJfdrHNss2uaEgj~aH!R2B$A0J83K8;4@`}4kL567*-Rvd?4ZP9-`T&-19i?& zv5=OI!r&IxmO6V3s9=QkX@NW@+C*a&^CbxaE^`%I$LW|=je|;0RonNn?!x4bIca`F z7{_VOs7tfvZ2p$kaOPjF_%(CFG&D-1LlNWDm<#K9iks5AkD}38NqB5c{Md0;t@&_W zM+Q-rU%9jDBCHrFQ``HCopvMp6%092q-}4VoF};4SKc|sa*&mF_!g`rUBmO?D6vZl z{9Z@gTls~Bfxrwb{PdmMwC84jtna(gKi^ZxaB-OgRj5CMEKU!c9>PS1#d%dB;8bFd zYLYkB=C!0)$h< z3)3^BEs!~HYig%)l@kWv9ZWK)DN}SLhGf9HXZ=QQBd*eE!(*2H50} z>!hX+b41mymtj23&b@6Hvf%vv#MmXOmtFnI1fx66-v_*45~x0i1b-q=ahOAt*p+88 z(Q_K&s4uXo4f79lKJky|Hecm66(u>Q;tkDyKQdB>48>&%ZM0-#R#xo25u+y)i!s7X zGNeXjxFSIcQqHP4C;ld^t)CABjTVz+B96hPY|ZfzIP5!=;88ji?`Ho{ zV#(IaJy}PLL|ctaEKdjB<7V<*h>UGBL+<&_49 z-bLoZ^-v+6}RIVgn`#n46Cg1>y$J&}ggrQ#r8gA3Sk`ZCnS z2794cuF6iz!lt)h@f8tk$s4PqF?Qy*U$9~b%Cv!yQ8)=X`u<RE|EU!2{1&M)FXgh}+F8{p8G`7h3j=U87f_N+`-pmLr;36ay>AxL)FSq`T= z3kP86F1;N-mTu3Q2m9yp9%mpdri#trj6)s6Q+=MYOyD0;qshXjEC`Eq=D0{``iJzF zrs!%8f?^{kYGTGzB04u{FrkBzoUE5+w;ok14yUo+Y&cJ^TS<2nAfYHcfD6aowb=A& z3VI$qb1Xo$y%HzehYi`C10;(i&F=vly$pQz=~uu20Z-4XfaEB!KzHh20zplFgBMt4 zpbhMJ{MY<}spni6aKg`zq^bu@6M#uT^m z=K4!+jOgrjqB^FolS2Lw_%r?qO{Z3kj3wfLpwhI(8d)dv3qpSwvb*R6{pxfDDzjGV zQeJ}r8$0b8FQY8UIHZ*CsNepETB(`@mjeFA_B=2t9rpW?)eC6gD^CG0|fyGV!>rK%q=I2f75QRD2KrPJ?(&z1TNsK z;uGd|D!@^;9Sj&#h;&penfT+ zhLvMVr3>nCwR>)?*3*geurmB5tKlZYsbld2J&9 zNoqMkEaC5iGGgR1#$qh+cZY>|F3ovSp?-l|Otxd1N>~9aViVi-p)$kM?$Bh&ZThgd zC`mFjd%IH8y(c3^4?`ShLCuB1v2U6^!mZ5FMn&Q6Kfhru_{Up+#n3l3n8bq#9m_+< zyBZm6clvc4dqYuV?itN$Y* z3_YM@O*wx(*%})=QZ&jvc@*G2!YKdnfQ7g593xd;Ygg1m=N58L6?@nrCw!7Wdt-{P zh`D(k5z)qCItY@mbYPO7?poeX=Wv|1f}FWC*lfslf$nr|VdYTK+h*#C z<_AuoqS9rXK6H?I-W>wfR=$|UVb`Ae1iHj&3Vw(R3L5pOyK~U#7?Wz~NyiuZ>pUm5 zqwMw%BdF9k8+tiD3k8ocfxo#;acyLgzrt+Adz&JH;n`CdvU8SSMkGCan!~#`i7M&| ziP?f^N2q(udf38q|M;~b5{OCYz=x<%hMh`LaTobN+fuJMof$vczi7X(AlK)dh(9suvS2)(CxO6G(5nItQ_Iule4}UR?FC`Ioa+r`r!@`Li|R+ z-4x%hciOWi74+zXEFpN&dzDvd!ey-G(s`)!mU+f})&9OXU{Gt8c5qea{+xm<#2aCp zOv+oda-TIGe$>gAaLo{mbe+4D;&>S90VrdCxpr45S-`5&IJ!=@g}W&{8&l`lTCJVE z>h>zhy_<^oa}NDu9_{^h$-If(GwV0;HO1@Umz2Xmc(%5kJ%Qe*SAcsxUDJi#ORt<5 z$7>i8rVk~6Wp&~3Mx3Y-fJRXTEkkGx8H&bGW#97jSe|U%h1mV>98pOxB`Y2X>gHe) z1C%Qc+iIbdeWBwC?9_{wOYx zzCHi$PXDz^i1=QT5pf&7^~AoFvfI!c+PYhhx!U%ltjPGy}TerdY1&>#JBQ$?*Nm=<~Y|kHNM6Z0kmLF zL%3??oZE$bUJ_}FGW!kHRut8C=lW2UD@P>QTVM)77YG(K#Li{JsA+AQP~XsFGmEn~ zE7=HhIGjkUK0e04#0wK;i^BNlN+U@Ise1wTu)+GqL`iyeo+~n#t8ST7@I5(n5P3yP zY~#WfNqGi;qn8PWD5TXLJ{;|;SyGm*~9PO zx}`q~&hn|Os`OedP0MVSc!vZTn(KHUy+b(GxS1c!Uu5c?ad@3AlJ7jf#R62i$A>(Y9A1~KOG_KG(?c0b9B@!o-^cWW%pjh=6UA=rp^rbPkpx-_f-uXTbuqGIvNOKO;cd4rx&h2#nS_X zi0M#ia7w%e1udp{a2T>g#c$dpG%&TnX1ed10-Z;?iS3oa?Arq-`8~t_Wc4|GFIV^% zB9C81Io+&FQ!Y_UJw8<}erSdm6UEZQ$2qSt)ksJXqaHawCoKo<6AF@cn!>X*nuAbT z=*nvp4Yl$pHe^gCzv3hWFWF0!6SbEreBWOT?Kr#g9jf|CXJe7o&w9piXU_=1m}PqX zI1JZh%U(d$Z*xD{8`*dkGf2pp#0xCGmDp5(`~kZlTCDX#26m4zX?Jx=Ag+ih3v&FK&Z zR~w`{V{?o~w94}ek9VgxT=Tz@ z{owi@GZxSDUGA*Cb$>}<;GsL4BXKI9N6s34RjkHcpGMAmM?L3rw+;Y*XK9#qy`kc} zA&kIZ8(#yzRp_|)_O1IxwznRL0UlNm4rO| zu>Pn$21OVDK&cv>!;AvCmfj=BJ!vMoSvOOWv{7f>mT<0X7VhEfTSe*FecYc4C!cqIPu@}aO-@*20@#qG(FHkc9e)*6iWqI?}*f{gO^uDzM4$Kks^352vg z2EUb1rSbOfCt?m!kf~BZXf=7hzfq7=_-DJSCS}^l)R{}={l%7`YV+{wdT%v6o8t%F zbWkKu9j~)qV*~oMZ&k0_{;%@l7w-EmdKRhOGa0uKfg91aW3U=3CXOv|L)oyY6M63b zKn1QbP6}*nT3!@hcTT@_H!6NYiV(O^B9|Tu9$k$=xYT%~HsNM3(7~LZcdO}h_VOAY zwnxvYz0oGvdbnvAN)+%+9&>+=39UuL$I$~H?0EF@S`vDR2q?8AGO*BoO{7O6Ej)z9 z0Ued^1y{8^9UB`_89u?5h^OSK6_)<1mkI+`tW#tjch-2ahS4Ch?*V^mSpgV3022{J zfP+V;2DqQH^+W}QCzHkJ|DFr@sW@MiuS|Wn?EX`wE@BYgsS1wdwdb$Cr8xCu9B{-W z$Nio!{V^S)%3wKA9|D9kD&TW2Fy4mCyW@5neG~G_e;3SZQ~AN%$9ZIJ zLLv@pSj5q5fBsHQ`ElJl!C`{@cp6PAr!MFvK*z#7%<{gmHFHE`!ApR|K`c)aR3Y_S zvM?>*uKhPLe|5H}K<(md$Y*x5n#GA8)ejjbZ*-u)a8e9ur!kGX6rChUreRfTj1v zv6fPouPr_MEkt!4b;{&m+a1+hD_XH6L@nZ)Q!8Kp0UO!Fg8sN}KO?_7-xMCW%w!Ktxgu)+Cv}K zpN>pt>lNMpps+~dD_5`JqZgCO52c?JA3=usCi}M>QJRg|EP|CreKgdfO@H&muNC8w zyutF{qFN0@$~Z#i((v|jO4Sf1n)3KD$cdh>MqvsjJ3-Wr52p*-_JioCIVaI9(7wR* zfjdyl0oH#LHCf;F6MV+S#Ej}H)nf8{bflN@Hiix_Ub2e$oSjI-B1YYXzO3u~u>aVg z3)E_xqkTU`#pSOBCE6aP^M12(=OR=$NOQkm!!qX&y5DYlB>y_}{9?Ha7m}66=k=&i zUHIYk@szkgmb~XB!uQY#%x#v5i6u_A>P0a>&9K*az4dj=Ra>o~(!?O#0QFYSjnC@J zlE1&BcU~>WT0S$pGeM@aY#i2n)xM!C*>pdidS4l#{WEB+T&;MvPa8n3bzC3+edIgJ zLO#f130U%ZaSZRI_I(^MrwHb}DEcT(kQmins_T&c^IErYM;$Jevcf$FD&6hR+Itu9-wCy`SruPaQ-VZj1 z=XH%NpJi>qWTFWqLa&D0;U``%y*;Xt17IC;>{oJ!xnUGOwzuTopEkKX39BTH_g`p(L}76F&-Kv94j=( zS6z!0|Facxc>HL(UXpYFks^bU_IvyjrI=z3gyt_vOX3m{S`;!CAgSDeVZLO&LhB=A zvnF3}x{4v2fL@N#SStv8Id~wOk}nY4w2-Vxq^9($3y|z?^s??N*I3=Y6Lib@m@gxD zPu^!EzpN=qlnmRURRm%5SZ0WLmD0x*yZNycRj&FCH(!FgYx#F;|1l2skgJX~5eFf+ zB)p_07ZlXVa$L%tw@mqwVk@E)6cPAJ8)aV#DPkpwJ3xo=AnSWSHh3>5ED9V+Sji)A z5LGWy5Q#lmbe0;H6mT$otUBT-OYBLC@i9C8Sr_rB;{+36)Z@JRL<5GxEM zr=vn@3U~3wWhEgW0fdP&uV}Fq?zC>45qTCHK*pa6-wc*P#EP0ZL{Y3Z9Fd%ROT8x( z-54TIy}v?>$1R0*^_M|}CkEhM(Ql+o@TF5O6GOooaT8fFcBE*~tEcTO#o8fGv`a_qA z&y$jpD$Em`reOsi-{|y01_FcDvM=`vaPaUq>yFbGcbv7D)`3c8Yp^36e3mW< z7tY*0O_%pY!;sAMPt|Adl}BtKQkzp z2B!FyjURglAw$7>b-t8dx_N_%BiuIJr1&?0*@vg)IwPoWOFFK2z)oYf=;&zM1GN9- z3(A0iCU5~H_b9(Azp7jFS^DY_fp&AhtNQ%vMB_hM8YhxtG)BS&7%s~L4QNdcvttyr zIt8n}WeKE)3X1(C4Qb>}X9<)Im&P!LfyGD@No*C3k>~fCA+JzavZVnM?+o!w-$Ig- z)Km&|Qa3O0X^X|th;xKI*MG9ZjV7c!V$s$Hk)JB%->Y$Zct{NVJb+Kw8#C-srhF~% zc-nCP5iQ6_hf`=m%ImrIkx3voF7T>o-qZ~Lr=t$RAi_BYEmRm88o4Y<+CYDs#9wi| zpw#uq_nv>xcX(R6>L`b2oKaGcmS>NUSdqD-5U-zM#zqr-sI%;sOdUG_9?h_9n1;Tg zprI`!QjONAXA&OwP3Zr50sfS@Q{YX~u_D6FK)&(lrVw#{%?#qY{N%T>^i}F(V)+EY6nQvWqF9$!B-_aME@(cbdaShvv!5>3ugjVPKy|;+k zt5w<9+TeWA*5ZI>K^U#Tn26r=(=_R#6t|82%J8wnJZMh^n)^O@YRRUR+&EJB?NMg9 z{Y6?rV-oIl@w{hxzYZCC-Z-gd2D)M{!)l9h*4W(oYicp}(YF17Q(j`pp6|3siL?*C zq1jp=lne-H6am&{U4C50;GvEe`1ESS@%M_meqv@UPdB$yeH2PvvHHFZ+~G1?a=C8V zi>z!LogJ@Diz&SD?du4WI{h*pbqn)GCIBCpIAgY50SiG&BBZP!n%C$(qW4<{-)9N|4rNonJd{w0H3HyD7QQg%xfdZ@9&XUL9_d8}wVo z+>D??Ji=ALUlW@Pnve}lQij9}AkvgfhADh{$-7Zs1R@xA!^2DVM77qhw3>r85s)h` zhK-b@nY~S9@Z-g+;FX|+f~zI==9uh!;ew=Cqe@bwV?;}}Z}$Bm%}Fe+Fb3H5qA~)vz)*uONls;P+z~WY!3uIoaePBfu&ad7 z*?7~I6Ou&8V9)HI;zPmhmDhsWc}2q3kUt9>y&x(HS#RR=`1&0`rJ^-*ZbhATnJ~{qiMvKamzb^_skyex`=dt>F+;)5+8I*wjAvb*1K78W~gfMJNx8xqQ>j z8%vA;XNye*%$h7kJ)}*g+x+Pq+yi2-jDgUqD)qYE>I~8U#tjkun76wl7;&lI-?t~C zb>j^)o@n%vmPtoD%)Ohg-6K*Gkp{ne?yiT6ZOvwjyi?;#Oa-MdmA2I7?qafAHbH(4 zb?lTu2dA-Fl6!l9+!xO+{~wypF)9)VrU+qPYk?V2XrHQBap+cqXlwrzWIow?p~ zuJ?XE^r_XVwOZ}=-v8e|j#BBfXdGs4sV+Bz`Fnz+BJYspK#i5|$?Bj|v<9Q*p81j3 zZN2kEmif?#VTw3Xy?k}@d>d(bABcn>S<$$~gHcNB@g?4#3`_UcvkcQL(hvX(boKzp z@0L=s+~t%CV&pCAC={kH%&VJBkeqR|NgfGGKUj@l>4UGtT-q-6><6|bSvuV!#9>2- zSO|*xz3DycKL(_J^K)%2I2oGLG5|C-J!Kk-s?v;;uaF&H{N+ZG$V^8$QEW2w=Vt` zji6sGy8J#PvcY$nX1F9OpdzgimKo_&9;b7YPfbll)c@@I!?zB9Wb&_K`L- z(2CpLv6;@PmaM@XxM2*S5NeB!W7p?MA>AGtUSg@@b4iPb z(tFJ0YFR36*27j{Lj#!My=ThmYC^EGNu0R{mAD66ml3yJ&Qad~cKT7g%|mNRf{I@G z5b7eU5R3SQaTSW^JB#4%(llQO+zq$Jh&NwDaMgO!sHm&Eyx|Gd$Wa~uTL?l{OVO$R zjq=RjZfr@t7!SYnrB8+xL6X&+{$>vW7-Ha}C$)JXjw~AtQ{1%gA+OhIIGK1&8a`gg zkPvw6jAcLDT>j9$1disH!uB%w)BBmwY0nq}h804!Oa=bW7O+~a@8 z#6U#&z$@I;Vy^G2B@hSz1m(P}8qWxQ@nc|MOy=;p{cT{-Zr$}D1l|_EUH~C@&%iV0 z!S|Q@f8K-bn}(==*~dutgFR~siHTVLc+rIZGSx`w;7R?cy<@6I_bRZZ0xWxdb>4ho+Dt|0NgC`oJH z1)7IlVkm-+c!o=`WVNzTE2{@tUUbI1Ui&j)FuY7rFb^nj?tbX?aM;;Ua$W&JXU{3a zDz~on+(wmL{Y3h>RQbAWV<3~&gwrh1a0N*!1GISg?>r)_iBcZ*j)B^Qwp_K^d^rY`V9z2ZCdX)B3Wt zozZ6VtuD5%@|NFO&c0ue`8_H&+pS67d3X_=Hyb7&&4BvtN6o#rTab;yeh08dDOfRT zd}PIpd~xbhSe~;`b!IX~9Wspd4iih%sz&@8jKZ?C^sIv;hN)&94>~8L97%Oij&?z? z-@I#g^VVXJtc$XE6cicfGSOn7qR@x-p+9>`&)iL1AMYk-at#L-_{wd8%RVW{EUmRx zSGZ;SSX44G4oFhep=w%5T*&c9=qDtV3Y|{3=G(yyX78(2v1EcK~Ab_34SehE92r^7L1Klf; zO*k+!xum27s(bDpT|}Zzr*v7P>bdHx!1>F6$xK-M}$$CpWELkAP4 zDd@-OBx>l}a7;1Zqqy2wUS1&qEetLU1KER2KWgpG-?~P5sh1nep#7#G_!#e&Yrn@= zh5i{ko`GdEuN8G%=KEZu|K<61M4L9SynIEi8<@&S6wqwa>TLGNwS7B1k&Byibr7d- zOPEdVq4wB0V!c8!_=_VPJ$@nba^48|B|>>_^X6a1@7kB!H&N@;8XH%C&#!oTmf4iB zr7Qy+%Pi1v<3M59GPl_f1(_w+M^|{wfW>fO+>mT&ph}PY06#rb8q8W-tNrcOOD67Z zx52N`F;jP@R?=Nipi~T-)07Z;;7>G_u#B1@6e;+2dBo*uwksa0c`#`fw5rd$;m@hd zQ{78BRZs>po9ok)TY&lMFI>5MpUUQA1Dt|QXhSl~`h!6kIu^vNu&jxq6&s14lnXj= ziXFjxVQb6V1GwF|d4G023gDBNMHa2dq;!D~4*@7~#_fckyU-l{CO@@Sx5%pfZajVn zwZjGxmspoJOG{-*(8;vdVv-RCth1V!;#Aha`E8k!@h4O;{YZjC<*6F;iwd!U=gh_dW0WR_O~mCw4-Uil|?)=h2~& z@AY)duBfIhZh&3N_)8|^gV3*LE*2~n$q0X8cmUA+%hjmK7;gl&5uh1OSMNGC_=JtfUIc2< zDwERCrO<1dpv1@te0Dw}Zn(J{OH03rD%Kfod4{PfYf?iIWKPyXa_Yt4f4eUChEt$DI|-53oqdyvYV5kMPd* zF~25$Btma?S+6ifdP?q>VCI%3zp%?B@xK^$ulnKtIR3`RJ$W7V!D}J>Z&gh4cNcGL z&Vc8CtetEhz#7^jBUB^?-H(674HlK-5G=jjaI#o~txgy2*dW`D!+VeAYRv&4QvIc2 z#gr9CZeg&sj1swJ`Qhm)Ns4?}jbFz$B|q`rFVw0U$RquOu|D0p}D)x>FNpIJnW*oo~d1L3%9}UP-iAit4R_@LPeF=J=+-JWB^bG`lIrR4yC^r)Va?Y&5Ewj$pC z5m%Q80COXtfzYA}HdNYw9Sjl6ACrkGATA}LCEvg=d(X`Ja<~2vn0dDvu3n$N*7v-c zTk*cDKGN3i-08KPP*70LthZEFU-4I056F@^_`4~+{AAB}-%@HTxcSoWSEnM={r5Z)j6_!C3LLr%yj@%IIse!-%wx?D+G3Ew?xFLdHQr z-U6Ih0ycp;(QIZi@@CtysorLNLV8{KSO-44HK$~@7w6Tmt$UnMm_ms?lqd4u+yzQN zcrvjZ9*ODqsb{@evqFy4)Q2{g`rEYL0v$XxT452W9wBMEabXKc0W9)lBjkj{^weal zfN3+!bpY-e173qab|S5%(JJQSy2*F1WQ(XFnS$9>{}}QD3YHpSn)d<_Y@B|&!E#Y# zFTsg=8a8^fH%@F;rG4V?=gjspmf+#7IkDwOYzgCa$}v!7l%+sR8CGJ5unc8HMzQXV zQu5g1#jtvG1IW2)-Yg(H{3m0_TQOnpdo9!&eyq}Hyf}1_@5)hF_m(p+qg|HjOd2C^ zX6vQ(Hzn$IUQgwoFn6*pBYq+sh*T7ONg)dXJdWF?q6-aTDanO;%3P5*4G?+vo_X%r z3CfhBH8uK7O-T=V8dvt;iZOf^Hj|tzi^iu^1fM=GDv4 zZx4ioLsZ%Jpyt^QkoTWLUe^TXlImYyLNghT7l59z(x>?NV0O^pS@eo|VF)~hYOL=a&?5=kpVPFmv(i{P`dih*6i?gRkplhMg*RX%NK; zR1JZ{!s>_jy_cG@XO102j}W{63D zc|39nCsj~?c&`bRsPprUFuK98>9>Z;G2Pcj|HcGc7r+@ul3;t|c=?j?#J3>>LK5

    {%T>ca%s3@DaQ~k8km78Jy$SLiUEfJuVK_sS-{08XLfFLVcjI= zoENrHj_LP;N<{|qdxCw&F=NBUNYdKqKOcqTU(4X}Q|OCb6m*4P`-MKO4)#-EkR_(S zQW(Y8zcn6PkU=T<@)s+(`~Ea{{xv<|0bnScacY#)Pl<8kZGD_{e1tpyn!<75YnN3F zTK1SDhU6ar$YeEl{WZ-)ch@svoW-qw?i)bLJhmXqIcN5#G#z(zgnVA}!b>@hJ9^JO zI9P9j2G<(?d2^N%FNnNh8db**rC(p@K1g9)*G;{WgFiWYclNWg$qcuK^3b3+h^f4X z>uZL4$2Yn%%;8h2x$qB5Ici!B5!>SVjotL+-nojKt*xyCzIS$Z;`=_4$k6BM^wUpg z@#4j_vDb>sj-CYN{l;#Yo4XIKA2YF{dAEq-O4`_t?1 zcE0joXJOekLI~n@)qLQKr*ThH2b)(kF-wN2_k8kFvQE299XEEvoKsKuvQ=Kum(C`B zzTpoK?VHPcj6ds0=AE(+wq=uA(aDyhG{1qL1=sfx%;0- ztzKCoJCF=(8cg8fq6J7BEd(ka#;%ACO!pCi9|#0el)^1ogRs#^`Xr2>HLE$->)&_h zPj0?6I=(?1Hh%(Md7P{zca$A7^CR^#xpCWLE6e@L_>vACpHWdBeWp8?a38()fin(1 zVXoVF>^^eEYiq5rbg1w=(2AV2=+YkJk3N9YzV;EEShyHSE2TO4%&S z^2!RLWpSis2LuCVr^1{kQ`E~R(b-M9FG<6g(O98Sk&F<+R16z*KhYYgHBu?$rp=Je z4g5h9l;@G_Nzr}X11x!VIs52f{0Hrp2*Q|@ArFlg zc)M5#8kHn&+lX)|@Lusz`5Z~drb32{3AZKjl%~ngV~0$+=u9q+Ed&uvN)JjQl`<8& z-Xc6S*^t8lA3n_L&`eH0zpir9$@_M8jjd5jo_(F!pF4`J8{4Cvtx_}3KIGK(?JbMM zORFa}DpRFQ#v(YQ>#Pm!tusi zG`F@g)`?+9E0Cc$D*wg`$f;AOGIi=yF249;>gwvq=kxUT4)sX5XYu;>1YPMod)37l zTNUBZ$<=)7)}?^Cjotpjc7A^LK0}f+zS0BKom#`%wmzz2Z$Y7Q$oVtq+Vn%()?Nbi zt$W40W6MhayAx;a{u4l^PqXY9m#PNI*r}E&Z1xV}hFg-%n&Aw39;NWODfC11UIfbZ?sFoeeXUF>QJ{nem;jNu8U151G~1=Ai4 z=6?>OT$#)8M#2XH*I;6^k6~Vhzl3?Pd76Gw<{04Xm^k>m!Meu)i!sK&rFZ~C4o$?U zWNzne@))~wgE$fR6DFX4C(wYY{r+L#Q@k^tGrbHXld3Q&RC6&wOawR^D3quB872j) z1(J%>7)^Io&)30Sg8yYYJt_OGolhf9V3G8pe zIAa4GfEi4`5B3?x1nkGLYdP5Wfe!`C_W~yah3Mv(pg+1Xgv3%zYFcveW;hJ^3nnG% z6bvD8Y|y^%0-G^p)-9NU4MvsxQ{Xef@{O22{xOCWxjkq@JBDdI7h|*phW%WINl(gP zNUZaKzhlgnK8ragj{|?eTsRNWKVJ6_zV~779Dm2$5DMer5#YD<%g;t*NVq75e=3#01DwmmiI|EXWb_e%8n5M2) za>Tqa%qSo34j)a)~6bpH>FZ9`*&MN`YJy;J}ey_mn8eiN}GQax&D z>-ycqn#C?Hn|+S^#PDQO0k?f8m0kOaHy`suW>Gz12IUQJ_!t)tTYUYbDfFaW*0c_O z*#7)c6Y-ShkrhJ^yUBHNJf*qy(+7}oeJm-MF{+F+Z&GYJ^ z+TjaWoPGA$?AWn`l`B^cnimR%IOUX6xaOK`hFtfKrOT=w$mI!1iPT21kVBE{vAOrk z-(oo>x$)^7Z5@LHi+tX5?tN%U?y@g@Fl?3eKfsnZ)Nslrr*rpLZzY5#Am zdVC|ZKl{P1=po~r)eAS2clWh1T1Xrr0o8AuJ1h#Ns~zKY<9SVykTu36B$a3awC+#$ zkcA2~CXLBQ;5#->B-)YMkj+;_$~b23p=+G-e6?qb2B$1sYemJ)<4&7bo>6g~?(*(& z6XNo&WNPuM1+VYF^3}D-yq`GnyyKldttvWDOck~<^3~82bvWXK2NQ}9d}zPt{%2XW zW*ezYf2ODB`J%18mn*+}J2(FF64PAEV%$N~Ir_|_c=&h!V2lV+8L(E8pcHZOI8Ev1 zF|J9|Qd$t#f?i>~Lb6(u4-^?yH8uT8i=ec&lmpd%AYy`6jO|XPBQ;w2prS*I+r&dFMi&5wM65ls*=*I%caQF#5wfzgNfG~MPn}S za@MDROjAqo5l;d&?H!4#3orhuzV#=cqGsGAq?E`|2)iM~KBpbRl9yJ}<7qv1=A_M| zPCsA*K32ZDkLE{TCezkM)r=`jKK?MAiZW7bx3c~5XOW3Cu^=ri?|F2_!c02m5G}TL z(YJE7Ksao{XYyG`)A*qS5t7W-n-=6ZJoRd&Rtg~?pLW;VT2JjNF+`Ads8p`8nM_X&2dwt?lk3KV@W_Cp)QduuLCe)#8V}v$_!cIlFuI`9!Ege5dJTH_x zDdq~wY#Z&lZ2!wYtS7TQ)iaMfeCov5{ttVuYpNtkfff?GtPYKb%BIksOD2<|NBf*~ z-qFMt%?OEx$7-k_9b(Tl6N@~Ybmv0ZX3o83GM+nN~_iXt6z-jthTP1J#S zbkMd6m@r`iJv}{Kef8B$n>LMbILx|r>-gq3zez_&$FS=GWV6`|G0#x_a5LkFUV0#o znpQ(?JjC**Bx3_YeM`xUhAo|G8p=b2Y)Rf5j<_}$Qx)Ni{YP=ppWlQ^rhsTAG|oJa zwzV4Q+qBG+fBJs9^ILb851(JX6E?i&amzPTv~O2bHwwOXO9c~W?H)6ePUs^r0q6ka z^Nbm4`6aLBnX~_!ugLV;@;sZic|AU4<(nco$HC ziDQfS>^WuZGi}$(mqb!=@ag?8xDJ{fV#x!ecDc@FpDyF3JNsC(v3UOpW5(yMs%ma5 z`K&N;cTMnp3MNi1pa&CsPGfjdCXb16^O#ular(sx3o-FzImRb(N0+FluGnB_3z)F|WUg{YlkQ#sx)GP?ObP3H!e_SGI6 zpUSfOA6atAVQ++|Vbl&MV@!eHF202c#H%r+L8-UP_b>x;B1VPq4d6};DU!ty24BHE zi9~>ZVd|^@zGNE{F@8E8Mlo?Sh9r3$BhPw;Ap(p5aZJ#DD{xh?p9cEPg1$h13QiqH ziE}UgL{9~VP?;RGZ*kDRU+{X*5>?-yCLJjTl8s z!FBpb47qS1hLoxTUI3oOkRV^dkSfzLY88p;GlG4L#|-=ga2e)YOrxI^Itnw`J24l| zwZV3;4UT^nh7=)Kt`xt=kTu`NJWJiZi#{3-Cu2yNf+@hCF$$RDG3WnG48b-%IJQ4w z#?~uGD9LQ$hnDn+JX@)9)CwSwWqg~*!+jAUpQi!UCVQ;?xY+m83<)Eh@`nSmFLtD5M-V_)>^`C>k3OF$*E6o-mr}2OdCO(k1GF z-`z{JbrY6!oCp89;IDoW+(!JOtJPrN#SkSW0PeE#~- z3q1bx>jRspHC{T;FO=HFyS#pkvqRibKaK_^!GZ*e910JKEx?NI#+zN+X557FIH7?- zPAncnS{7?xUQSg-ITOa3dtr5B14=0x!(lAPVf47M*nzsGfLta+$Bt$u&YaF0%I4lC z{7{GtW-Ju$ei}eJSQXWXo}mBzz~e|rUYC-EJsoJzq=>E4c|tPF(mNi<4!oM0n!D)g z9vp~it>vNZ?WFmHhagbOJftXNheFjqfGwP@zi{1pH+#QUoGogw{C*% zdsNOEPwlC5Xj!c?A5xuh9_QM(sTuyN-1GT4Jhrl(zrM07;rK3a@Fy$T_VOk47@__0MR}Gka5>=E zH-0Smz^5a8__8R{GS!r>`&^RizmVi-&+OiN9yg~C#=Q6)fZ?*pQfW<1b^ln&i~2>nmKQ9B5LRTUvcCy0Dy6KQNe}OQjUmRYO0!R9DGBVKIXD5Z}PW zasbp+Nv{6t+j@^UEF4>K-M6av;AaNB-1{i-0Zhz16m~U062Q)K`AUY)&?sOTJCRT& zSctJxITOP}6tY&H!NjhIGSE+^6t`hs$Ulc6lHM^=<{C_(JqSX=?2pDc`l}U;pEo?a z8m)%P@fMTk!@P^iaMPMs|D59KYZG*=8&cjr2@}YljOm!SgC0y!uQ5c+0hnMJ;0%oX zsX&5UhY5}k#01dWF{+ZiF{FsVC>KgenV-?0X7d4z0;Djwc3=YP;T)I`!w@syqyM?5 ztz>>HhGf_aGw{;E{tKjxkI4fhIJPHuv9AKI4gM<(0q|Jx{WOgFqLY3Z+jGJGha+WN z%<&iSNsRofhJGgVd5p^H?-H72d?Q2P7xHVOeJJpBLJ zJMTCvx|_DW-8wVp{Qfxi?%umCn-GeA^SoYL?#$eoGyQy?^Z7gvrVP!=w4*;% zU|vioXFmHFYqZbq@op&c)1I(f7#a)>d;a9(}iKVDYG` z)mB>^kyfNOwD86YOZoK3!S6LWpri~&Es94?8zV-Qm-$mikFB$Ufl>#mq8Tw{VOgMk zl<(uYJ^KiOK;K;!%aV*5QJFVQD^0q#89$lA?hKl{?N{dGx@3|V8d+R`qhW|rSYC>> zAHxT1+a53>5-#kS0ceLptX;Jp-}l*PLcSSGHai69H5(>cTuiih&x(%s2`Oo@tbDl= zX+t1{2uIM3ne(DNupNj*Sru#L&gO2}bR98Xx@%zm3YH~Vzr2wN2j$;G(vtW>P$P-W zF0Y8Le(v4E#c#i*_b(g$P%`NS+fn-jtE2ALH*3X+1B*m@`;PM?;pp?ia>l06goUK4 zyb^14DX!KpN%Y{P6eE;U44W{4SW6;Rw|bi%e$a?H$+~1+y0Y}^t7Q~vh0hID@v83)MYgpyA zV}=f&*}S~z|1Dg-wrFHHNV2y5F;(TW^oeDm{ZF5Mq9f!wp}{JQ5C|2qsbM=sGbXF4 zmmj&fwPx#^Yu{S^>rmP!TwpSkgl*v`+K_EUIF%*XMNw>9Q&L-lwDW`iX_H41i3CZd zdv==&qCp=0(-oAC?8>YGSoyDasr}0fjEj~~5E+CJ0+o*Q7cbV?A?giHO(v^m?%cTm zB$G*=eDX=Y{N*q2^jZi8gO_-om(QXH3+7__@IA1kwvBH*unf=FY-osg3exXrOJPev zVaV zk4&FkJbh=6kz5PyKv;10cO!h~$QI&lnn=;kpFssB;;x1*J%dQwW`BC=lMJc0*j&@~ zybT5g>lT}&n#%FDcwX0iId+uIJ%2VDF(ZfDeG)I#RTj_vJK5{Jnp%&+RUcwK)?Vxk z3L3-qm{d`Iw}F zY&F60nAq#BU0hEVSzVc{$d9vL!5pXF^klMl3!`cJULW&!34Qf&en20D%!osRoOxR* z)zfx;5ZH+bW?ojnftM8U#%&!u_oEh)tvx#J<(P7hS@d6Twln;ZE^U;XGygw!!GvGL&k}!G9V3Nh(dt1^E#V*>l! zLcbXKPCW^XR!o1$ZQnLb*;D~0+ozbG=es{rtf|}fhhYSmy00Uv{5gbtU7lQ2lYcA~ zhM>yLhsza$PGGW80_>cWDaS+?xg~M^=g#(y-1b#tVv_T_ZU31}yQ(lZckYF~t3xf- zn0?NDdTqlHUP1D;hyEk*w>dGsbU~D(4(}Rio-)bd);l}+7FG#wY09^W!KloNxF(bk*@baNyH(Z_Hq3WZzSx{Ll5P;>#pO6 zKl~vJ7xwCQ&qfG^te^GFmZU2$>9l(3`f5kQqlM(_XtMGC4a-BQloRqEigG zuj5vr16;@9lyUzvZpZ%A%WMgvObMKuNNxMXv5|r#{qiNGtYVLmRkWu5yfA(f$ zd(mKJ9XlvoaK|whf3|kWs48dW>+g*(mo|fy*?JasV~kDjt)X&sbzTO-=_en|v;SH| zM?C)#Xj_tV&p4Fd|E4SG^F5E+XBX3W%RC0jAi@cuLqUXNqb-S$5-B9Yl4v0~^R*Z8 zwZtSP+qRUDj-_r63w%)bL)b2tE-ILXr{!m9csTjA^oC z2mrEVnXn-gF~>7=um7T?iYdV$OGwc&q?og=I-h8zd3LW|zl}@3@kiR)dpg;;o-Za& z9E{aXawA#Wf=Z+*3m52yw$`Q96Ng+mqx`^QL{!ev@$_FMAYsmwWA}4~4c(VDz6rbsy8f9dQ4<&+r{M5r)l5J1EBwgfl<#@IGC zJ^~Bv1c>O~gY7IfZ{7@Kh|COZ+s5;D9(!4qwVnLZ1rS!BeV*2Y$D&O=2go-zCP=tG zGe#8i@@g}tH)BLGE4O#_nK2TuC37!75GmlaTi@QbL51Eh^|T6V7JY*)@0|j$ZJqwX z!Y5Myn00z^ml)PqvqoAlP_1Rl5v_DThJa;J*~{Xba7>8ne$$rMhw6)LiAF`9O?F>6 z{-`iNy}p$<7p0kbK-cn~2M;|S=hPGXE`QsL4;}vxx-9CZjCc6PMFVrg3OItZPu{)q z*qg2@VcvoyZWqZn1ylNS>n^V9rGWdfBrQ1Vs$!1$Y4Lyrr<4zi?~T#8&ST^u0VbZ@bpuKZ4!NR$i6@2l z`#BBNzTIOKvjRh)%%p#vl!2lVLn35*LbaGIl-Dz#qnPrc8VtE`3?@S*dlIsGBDu(Y ztk+`7nQ}3zpZ09bY$t@tg2=_;n4teNIn(w;$;t>It8O+LQzp=X$?|9>-$s0A=>AIE zh#^w?YUc(FGus=o=OT*$ru?g>_r-S!n=$0bB)SNq$=#NTV=`N^7`l^nW*wfcqxbT( z2u7DCHo5IQxwJ7s)@LOK|6X9UL($$k#3{E__^z?LbkpV*TK%?1tVJ_!hE24%>k@cjPKqPX4({|>`{*CyOSY`` zO$K1FXgnhiJ_399#q*{QE8^KJ59X<*bvTyb>;nb^uzYI=?{72Jgs*&e7Jpf=nR{NZ zr6c8W`}|E@d-^0cG`xc)1y`Rsf&1Uu+Gof2gJQ~*DO`X3^~{|+mzI_m_St720Jd)3 znkOcC(n%+=YSk*%t?Nf?+qfztv__{*z)&J2L$G+~vDXNMf*gAOQ8-1WoaD$ur|`-% z*Ynsv-=KDD14qo7ERH>LKcwAN+N4~cmCr2YiQ68dq`8AinVyswg^Qcj2KaUO=Lp#?INiUJ^6yq{`396JSNEOwyOnaVM)$T3det7%)wNnaw)n!#IEJM6x9dSC5W3Sz9s5T?vixS4cWgsZA9ky?) zw-*0(?(vilIy8xrY_AVT5k$8)ftzBOtEqkUjUsPx_=Mphhk)%&U47jn*T|x%Se{5k zYMYt^Rl=rN`=C=G8Y=(B5HQouQyZ zRb>gkyyn8Z_HA3dhDUFIieVio21&c~WUCwv5TTS&(GieNrSQ?LTeSi(qPa=!fR=)8=Ih{CCW{H3DQyF62N878Y1gPf0%exP=x7wz zw^-T|ry$`mGLyYDYD6Um?mw0V3s;cN$$|=p0-XQpsSKGmBD0N5JCtVg>+j>n6YNtt z#4fKMWRLm6*n0-A7*X8v>XyGYELu`sgv2Qd2O65*e=M1ZUsk3^ekCbYu~v%8NfS^> zkDB#sQK=Z^`%RYim=WupvJy77Hc=f^YJ@cr87aVljjN4_!pfBnT+n^Ux#u0+zjx-(b z))W>sv@t26(ISE@C_*PkV6uR2yoY(cvPJFKwiLM;*%ZXj-;r zLU2OC)0VVkRop5}r3E?=#Y?tfg^N0g86E2&*r6#?n(adJ{NG=seCkNbMpe5?@SxPp zpL55zXa3~cIbV44*|!}b(3U0n_GQP(^Upd|1Pk)ByPCIdrS+|Klsf^W)~Iv>VP{3> z`+vA^*sy_R%a(D;C71BaU;dK9!a~kD=N#tG-{q3l-9|^s%f%|SN=b#w@8X6Vf`cX5jZJO_2 z*?%_gUVLacg8cZBiZY8I-?%4Dko(4vDvM29^2phrVJb`7a;E)`p0X*Q#>ARnk|hqr zR8$mV?6UhaRk>yWP5U2A)kbdG_43Six)0{xhtVqS4a+j$*{wULJ1H{?!}#Rg`F2on z{{3Z4`OLuBF|FagGwXT(i7sO4xN8idlZ(>PHkU7`;(^aMvTSaT(UW~JWgiy|Xrnzb z5+kx2!sw8=7`6+{0sRq%5v#+nhHEg|EoGSfpMnXx55ttZJkig#p20AE=V5d~_Q906 z^d&g-D(2$40h1c#WBk(J#}Fmu7;<0>Mk{8&oos&~xC*1RZDaIevME}R1J`4Y#|;<~ zV=yq4zH9xu<95tG&BX}wf;oO6OvcThfon0DN2@S|SC%BY52Ic5JZ68d#blc7OelFE zh+zbL|A^7QDZ(6wTr9z4z1)Q%!}_yn19KhSh7m5#ia|RVhV=o=HM0XFCj3jxvAm4_ z)AMRE#NV@-^{>jT=SGa(cL|0WzOSzpe3G&Fy)<9Fq%e<=0SE*H-~C1rD^|OlesY*Y z4-T?qS(+uw(g;a@fWw@f{4@Xp%sZcQ5- z8+(pc15_0Sd1FHhF%SMdMN+=thGa44+_kGbz` z;}=h@*;zAo8`Gvuqq(`6qmMqCqmMqibNcUo_d8yE@x{*1`|rO$4?n!K>M@fIAcTNm z08%ayr75>8#(SFicR$CA54}Xm;8MaRQLJbXI}{)iaF`qp(Y$OkkFMT=@HB2~9FW~E7jg%O-@Tv2tq>Q`##(1+b(?bs{6|dJU>2p-!Ux( z9jQT00MtM$zgn~HuM25gwT2OCEjB&z-0alrRjVB>?PN!6q`P(<1-V&C+6R>p{mmll zrj)e^62iFWs1&i)_g=vU;Nh;!LJSk+0 zYAkJ39%WiGQfs1~Ped6_837DZl2&0+zpaCN|91|Do_jdMr;a015W$WFx&60SF!#xY zJo4o0#1kowK4M=k{rs_{J5t2jlO)=c)V;Tc*Y5roPD7j`D}=8#T5HO*pv-fzG8se( zA=n(SGl7TBa1LDwtm%w~h@ZVib`zfG^Zu&!M8YA)jT(?<>Bk0Nn#>`e%w>dmz*xa3 z(heX(4bTB1Xd5Cko&RbR8U`srrKfrMFaP3*prCwgHGxQgJAe08zIXL~Jp008EK8z% z#U*DQ%9WR#OgLDA-{GQ^Polk@+SlJ_(erOHT-#JtmKTiw)VONM zzE8-qNNnghrewm1#jQ=-Ub9+6TU~40(BPl~hWyV_c$)=FZ>nL^afdPK{8_>(b&4md zlc@jWL&Uc4fLQW7Ep1J$g~JQC$CIgXc1t^>BZUOCZ1sHYr?es!PmhbW#RE-^trVv` zQd$w0N#T1cBtlM6C>+XYxAeR|Bm$XEAvbSB2n*r+DCHw92PFi}jSX_gyqb^{f{5iX z%n4z8E{T`kBBs)W>;R3gFAvu*TpHFuC=g;?Ni|x#XiFd?QMB?GM+38l@zZ3`47+E^ot*TZd@#$5(Uwax#oREYeNTq%EfI@ zvVCPO??3(qMO&IF3l(C8i;+$UtvtN=z=F3Q|Mmfm>~)tyW*hE zWfpI4<*eI2fSSUDW6D|g>MyCOn+>pWrF-SGcP8hZbZMy9tQCNjZ+OhPE>81yMMVnOs+3tX4M9~>EEzhuZ_<9~ zV2k3M@~Zo8E90lXY~{qW>PV$DskG+AW5T@pY!y{I_aWGe4+lMTRbF~M$xE;ACh_>e zQH69g{_@kM9f!-AS3-=~kvA zZMa}=Ig?Hqc&gdP`KdfY24LPbt<3sHA>l#!3eC{9RJn;Dj-up+7K;iQkJ&(r+ zym1rMuE#KMV6qyPW5jy0%2hXDh>sPRKzuPq;K#?1H2(|C!}LWKVe~w*+DE zVFczTT!zucsm`p!&P+RL5_+;%~!kK-0Ak)5cF>Y2@VX}2@!(4xT;aZI5&fA!C^Oejx z{)RcXK1QJUr+uy9lZ;C)=-XlGhu`WNExG&FomJp<;llHxTzKBjJ1G;#JN)a>-upgB z%nEYEtS(Ki&z%+Jb7y^c9Up*5k>D4P_n*03R3>-2jPJoSe@(r$eWUjh0L4R(Vf-4SafK?+iTWN-68eVA;MXid&%BKAeI|DFkC>keY2Vp8Wk&go-1CA|dQh z02y>35a6iFa1>SEk|!Wi@x&m6`WZji| zLDp(n!EOuedcM!PjWwjwX=d!ZPY<`IPa1qFO(&qVgs2^Y)>ay|$B1|vRv_4U*=sLz zj=Lk}Ql@;WZJTxLYMFD*94dyFQ!%8R!qPAo9WaWE51Bw~Dn(UA0oqfnS@15&q)RI4 z(z3mkhMEQ%H`P;`^cfwDGPJZx_*?Xl*jrmDtZ%2PxQvw0)Hs^uFTYGtg@`GsZQB7 zHCu7Q5va7#*fH(!VEl{x;mZ%`Dn@wFzF%2y1y?A|UJh=z_dW3L)$jJGQgu-|76pkwQKG;e*Nxt661 z9!^yh9g-FW5+U=9m{*Xw&t|= z&lpXT?)$U?Q?lh`=J!`J_7)~(tUI0ureO#Qx@|*aj_GgcsgUhr2%7Kp(YEuteXb|} z_;(jrT|)jtCqcgR)|GUXGG*6yC`Ml=yWe-_%>O1mk;t_7dl(Y4jeHH6#h7fV+-u>+ zUe=SvB8)>=E;eSSg)nj8p6}7@#eXcGzdN~g-O}{8IwzD2yPC0we?&^4|3%O`Bg2w; zFDXD;gs`a88c!;QT7jL`H1@jc+<$WVp&=v@-`Gvt8iKwL(xSwNY1(FtuL)yOt{|v0 zsu}4nJ8CQk;u(h|EizA@tjMn`L;S+;3V>=31I|Z zvjJBkl@S+qO~#J)O?#wm$QsM(+J+Ej*=)OnDX-EBqLw6uVw4Op7)4`?OT0OWn;}TD zt;s?Hp^V*G7)hB761Jo%O9Q0VNCfq^q~4a4c|HY7p%M7~kS(1ATsGJqAhg!Jzj{3@ z*Q__T5%k5Kn0quO$o7l z!J4q63GeR(85@WqhDJ%fxB`@7RJeq;H{WNu;}%4V!AC?+fx%rvpm!xb@7FxC}42+zRUfXe@Qt7h;(w2|e~j zYmHW!`&22k?}MM6rV$#XQUtUqpF|6UR%p*h`ySf&u{?#;3dhgfCrYDy7i`;c7b+fv(ES|){HgcG9L4$$m-)Yc_w@!Lpgjf*Coa~}cN2pj~3LNd~F808dF79E7N zY`jDp!b_u-Z%CkBL`TQRZ++aB{Fu8>gZC|4cY zp8n?bhk+0>x#){*8Yl_1D^T>mPcAzb&)pezcFg*+EZbSzb{A)2vXWL{1c}e3cm15* z?K$+9%e$-BLT~ukata5E+U@?9dmo7P=coB!ji%<_g`7R@Z@&MRv44jma*yi()z_$1 z9Zj8?TGb?4761OtGkbbFA1PXU*TYUE5*r&E8(-Mdn+r%;9IPlYI%7(slWCLTp%qAr zLM^CPuvMx&U!&~*JB!gRttnNSW=rNNx(Ah?AvAKvM3jqkCDp#dLtzUL(lJ|7X|ud^ z49Sw~o+1QT8O<8yfzAm&gw-Y5+c`fI+-U_$7`N-(M(6HmF0^lm7G%aEJKMp|=+tPs zrs*7g8?)hzwoP{iDASHkK3jkWN4u0@(IUYYf)Ex%g+-qXKraYrO|j<_(3*r41Ty;+ zlY*oW)Y}#fSO_wuN%Vd`J#-EmK5$m%-DRs-vwjnv-*p^(rC7dlEz_s$%qa2WMONNd zw0DqdH?QQNf`FAF(Y)UL3A#aA6kt)UAS@+Aq(cgGJhjMNVmfo&wZ;N$tr0?+Y!NWo zCR)(2W(~3R8wpu9mTe=YB&tj~nHCTgFhoL3YHEZFI`Hg z;4qRMFDDXgdG96nv9|iyk$ZYG%F{wAdOa^f;N5+HtnS~hq&{dr{}YLpHnn%~a_2Y) zGuXX*YQ1|N8yL7$#(zDsy~5+^mVMzw1gHOT&~9by77w>L_r5Y7yP}zn9X?f49nQU{ z4B4LnH&D5c!|WdvG4Gllar^gyJJ?O(oW1xzjaM+)EESk6nw#if5Na=W5w@jUqlL0B zcdh?=SOMMM>vWq`rV?O}qhh$6STQ{Kbk~#(v8-#mm&V?)(Ytfqd%mghshDswMO9ZK zlUR{|29y&vpLIBwv^S7DaC*;Lc#OFa)@*b#KW0#m-Ydapp+<0 zBBRZbi=fJq5xFpAi9q6L-;gUBKy@vv(xwJSWJ-~;g1ntUtd&p7XrGLEb>}9`{Ome< zqVJ1Uc5O>oo$c);jnIZ160)nk!Wpn=aOb+UBA|Q%Na6zG*-{xGqBTKn2q0GoI;7}4 zJC-(k8BvNNr3h#IoCQ#j*11 z-Nu?cLIyx7#hMM9*=NES0?w|xSAJCJEt{oEWeWXVlkKr{2qaLXp~x5DIGIwO++&!N zCDr*i`zON=W=X=d0#YE129ko#(x8BplnOzq5MW6li2|a&0^dh#O+Xu>F1O`=wxq~0 zL{CU-3YEvE`gYtzI&Gzul4v?oDH3&c4kpXD6D3IYwZaHnQyvIYq>X^K$nuOr8x8i*&+UK-)p_+Hl| z)j^nY%3j&W6m~F*v~0BUabqrivK=f3J5-DpZ^~PIW*|h-_^LI3eR|l;_fqM zURuDQkvm~g`oYvQBTPLrLb^i}C>S`ibNF`(dG+`0B%1R&tz$8+M6dMzt-aWbKG8sa zInrM2VN_Sxlg~UQ{Kb#E9Um7Kyp~vmDc{S3@U8LZ{vdkH*y+3f9Nir}a6@dvYft#u zXQfR+`L!JL{rx}EM(hq2-m#u-J^SO4NMygVva+*!`Nju=>$=2JZkMo|V?!!ias$mm z(rk4FP69{@lWDOtNQ{VVLiSuXe@gcNH|MkNWzbLOkTe7`BuNfoB7;CC+ec^1nYyjp za!iJRB@sG}$k}9{teupgZL^NtZ32j3*Y?2>F`z8-MbP!R>u~qJ(Y!La0qm1TqY)@+9JqX8O0|4peq3AP+mgyufb}z` zsV?0pq*|Y}n{Y&=AR>!pNu;>Fba-JjTIftoJ+(HXW691&X#v`nU`tc(Bl4diT4}V- zlrwogq`R0xfhlV;e3eG!l2*$6Xo)$#u>>lWM5mJY&GjS`abzHbN_HSD2bE5Mw2_ug zr{kI>5ki9O%80_s9CxfvvP(#rk$Q6R({b$RAXGYm_Fc5^@`{_}{Z(}bj2%1nfB{?) z1BOzHwQJXI#7Gu&p?L7s9CYD~J-Mw91#kTAZ5lVu1oXDGM32AN{?Vydgmx;vzbD}) z;ifOQ|BhZt@55pCx#PE`KihBG0KK*U!*KfN>dW3;?!L7PU$HR*{$I?QmQ4cqD)bmr z*^9mSP+?=VG)~W*C@n*d>}#+ogc7vX54rtb0HMK zO1juN#7)0B5PhY(b`OeoC3x?VF=PVf21_#BbrBd+ropmkmR(L+T5G(V?RH2>!VwHo znn9jVCmkd+qjxFz2MC1%{SY{UQ1Fu-5UJjB zWt3~kx1Ak>EFq&^kRe0JICjQzK8^A%{9wSGJ86C-0x1PrTBr;;;|M{ZGdn9&&4an$ zvJ?BvGU)?dC2G1;B1kHbC=j504=b%HKqHk%gQN-cv1c57vhIj%Yhek6?Lz|v6p*sC z8#=IXglJ3rsUfm)Rzoa>Or*i}u$4v%L0E$nGIPIY+R%AujT;zRBbCMl;=V_*kVt8D z?w`o$%?J!hnARqHD41=#bkMfKPo`0gji_J%VN0}Uo@2stK-%b{V!X;C!cv<1J=>(h zFtVf=l!vNofwYVA6vU%=^$qA`0HNQ)xShw;`@0s&{C@(1-v>PP{yNPt-qdqzRv5*)OlJhXJ<@Yd;nHw;UsSOxc z+P&C|j|?`(@;T3Yb?h-AN=AINqr15{;G$khnPWeWw(P}T?8Tl#GNn25f(8ydB*>4x zov&AQ^Pk#z`d;V33C4`F`O3uw9DYc! z-|he8x>nv>o@VYn6?yB7Co~T~9_P(PX;!au`PmPOIrQNE*R?xnZ`Le)BE_0T9@{th zTz+E#L&xQ36uk37nkQ~a($=Ub9V|KfyAdWHG_dFK12@E1u6o=3LFQwGve6e)Ix6qW z*PStmnWM}|eO-Hsw>GwL$AZnoQa;s1K`uXXBu7ptqabLrp&`!IPpt=gc$DWa`wZIF7^m_3OFy)?2Bs?{bYAJ9aFW zU3M8mh76&jqk~5td4zfMddeON(G^~3ugd`_E+uV1qjK3Id=dc*Cm2B5M)N{z?fYpj zA%wK7fE@xYlm?adkV%&U*JrS>DHc|jMg}Hmw6r3PK%r1VAu<7|l@Y$p3UKCM6*8`ek%xJ%*Ga4aa$ehf+`DjvT5|%(JMF`&nm|Z7?xMibIYT@fK1$pebk*vnARx*)X;gI6@N8hEy&L1PKNL42l#`Fn$!eu>;+n zFr`ew!U}{CmfcDE^oNTsx+w2+B9Y+12Or$&_jUy{N0qSOaMO=yNq8*Z+RpN=`R}TI zhZS-Bl3A;9ZH5@O8uHY1F1FdxZi#F z#`s|uUmKmU)9?0y^-Da~yyNkyQv(#2?|HG@mtRd$S8ozR%F86<#yAWgYTiCiJ)dC8 zB!^Ks@!-6dl0>6|Lk{ZdA1zzq(%7Up^3WjfE={v$oyVsR3U;msj9l9zPsRy{1)n~l z%RHvBNwH*Enx)ZTj5c+(q-ml1srhEz^!J>C)kvaw`o|Dm%cp~<8D;5+l~8V<4eH) zn99>lz&#kJrM_?ua0oC2*oLuVe!Y)n{|Dpo-kaaww=ix&FYQjFKfyQx_yb*9Nrf2q zsacqs<=+C=0W)`V{a*r30{SYeSdL-aU)#;~|5xJCe+ zp4D#;=~LyuxkYi~Ep3ECf@fbyV59GyMu#f1bFR@u1?CH#+EfcuRNS$%ru)N zFS;b!^8=vOZ+l#OZW~|ubpd1dw^=+d&5u9b${*e+p?XyRUy=zWC^NpFTZ;11a2bNJ5b@N-~%x$;b#y|i0Pwu|^Zbpn4!PQq^O)8aQ{`~pf)+V|l z#EkZ#D+D{FV6{q8w9hb(JANjEMwAnZhOq-St2S)o{wH2buisqPJY%1cZQs1)TlB!u9|Lk{5I3*N+aJzUQ?FFB6Q>{$m5XdNFbvLdoMlYGZyy!4u$;=3mM3QUHK z2tX)=a2%SwG&}qhYyA{$+Q)Y!qR@~vmL0&hEJKp{fbZeQ68K4%fKrqTo1wxcAOpyN zMTHQiv`h-nK|>a1gmFbiR5!ojMr1cEKx!xz7CxPoQhCc||7akteLStT>-)lOXyDaH z=2y0NbR1JxX9&8D>$mXs^KVm9P{1)2!x`ZPP?;=}-r#CQyYlG>JGholM{|<2G#M`` zrD%670#<;q(lmHJ6+vTJ4W@)Cp%o3L(@_K?ki=CrKOkeO9D9*cOmDgG&jP z7ZV5ta1(Cbn`^fu8shQb$kLMd^s0)Eq^~UD$l@kT4oPlrlBwDalsRE$jvPlIWkFJ+ z-2?=}kSQtL8NT+luQ6}lyiWI}SZq)D9^~UQ`&aYDS;LvXrip@}#UWz`@$|AfF1T|s zTEi*RDtYkB2XNmTTPTe>{Or>cIQWJItgY+4Eq8ojU%v3EVKjE6X^y+QPRalr`1#4S zZT%TLR{jWRe)lE!@%mczor+-t5F+b_c)R9?FSN6LqtBS>B_9eY^YdS|vVDiolzkj( zxA-htlIFS}7xUe36!FJ9I+(JL!>@mC260?hbLJNs7%|LZ*}|@>te;%h!muGWM;;pF zuD{3l!|m-{c2NO;zNxfxnRzcIIseiI23J{pdb#m4yy=haeCNl_l$AsUc(V6@r`DIFJ;A~9%bqg>Lh<{WK+l&9(urW5qc^Gr#u8k14Z1%YCtOn{9z63++?S~0kCj$TY0P7E8O8@%89O&JZ=l?SPHm8H{ zU0K9E_s4kT$v79BlTX%;9By;=8C|0#KmKkpho7{AZ~ds5`))78_u=BNHS+nhBix$v z!arcY0G~T6N;J}U;Pk*Fai&diIOd2Df14A_BV|U7u$li%6#)1CW6yUUvzRo~=GrHV zNhdUq-O_W!ZrK8tG1F{LxY#5wj@!@XnLCrLddu4>Df8fO;!8Iz_kNN2SVrZfGl`b< zdO%ig@96AsF52A6+dn#-@s&}YSh9mBmh9+U?uC^NoH(U|<0e;d*K0i=y%mK4_8nHl z=l;65bANHeCSYL#Nt}FCv4K5 z*kCDqVG%2c>Ud$uqcv`&V@WwIn|7xKJ+ozm1Urb8rmhtK@gzMq{uAKQ7LW!|QO_iulY>h>f7&!gUg@R8G*`TbK7Sfpx_Y+Jsb z^?!bpsL~W_4a&m@JPGSnipfJNnf$|3shm0EOlsYk1|HBlqgex3U1e~&SGxd8un1TZr4*#oY}&DdU?k+14la!=t+oZEl?b=H zql$f^?OV6ltxlK%A$uk5wANUjV#Gny34Qh;L`jr}^|ieJm#0znEkq98pJTpoB%zXE zTl|&!cQ(y^_Q*s_lPItxT5Dpy$F_iA#JR`o@Wy7{_Ud9;7>H!FU3|3fBW&|*(VmYC z*a#~?+DlR6C8?M(g4y3aouZ*tNGW-9(HhSA;;*7@?TG>)!iJg_Aw>L~(`TH1%Wtn7 zVQG1n^7V+iWwpHU>woadiuX9GbR>2#Vh9;91lR!a=Rg0M&6_t5c=_GIyESc`bNeCy zCRP=&;+omq`DzU>tZd-wQzvrW(`&f?8S^fB=qm^Co#V#v)j7QzIbHqaYQA>=GA@}l zoUb1>YWEscSScwVcQ!j#{u*fB@SgY6`)`Pyc;zjHyIe;6*B{21eO{0UZuoFHfwNAJ zaLo^mj`d&f?cnlnH}Rz}6fpa+AP+s>we3Yq(o7t0Q@h2dzClq@E>Q~RFHCXU&0T%D z*@uOg`$U|ZuOCD>WbTW*{@%f{vqLOj(PjK}!8sAW^o1zzEJ<_xnR{Hzzb`nzZ5YAZ z^Xc97wHCMbymm`|>R>^o z#n1zGy@tAKO0R9006g8>j2sjKqcP;h(U^Ul2keW<2+8&;DuE&(8#&Ct*d|ZHkQIwC zq(^_K1P;Um`ES!DX&wTm0PkQjHi|IhN@G9k%Jq%E6&MVBmcB`ui@SY}&^IabH_U@& z0?DUyT74EVa{&?lP%N^>;SS#?4vXLu>%+fYyq|d&vsi+6mvd{fVVQs zIuipSk!akgcbv#5gz90>@#jvR~nY+mHW8VRNm=i}RD*c}p1pf14BQLCSPT zK~(U~uNLyvZ#R)jm9jXK8vE?SMLm|S*vTl;-{y31(fLu1IWolb!?t&JDn3aVyPwV6 zo8vTWQIrprY(TL0xsYu<5_s}{L;LPiFqddiK=IB)bow%M96BfKG}=dlPo z7R6zQhK^p1k!Xs!Y-orxdqNq@x3&|sC5Mh3#G4!YbBf=yC@n2TN=ZwL+2)1~8}K}j z>C>mPc=2M2ii(&xaUw6g(9=~r)t-~8WGZZk2|<%1Ip@5i@(7uDJjGA0n?p-$7ipJF zrp4Oz+uWaDKS%%k$Da?_0kgaa3idm5CiR4}esf-@^-mm6FQjIMPJMA!rpExrqg|#5w+_G-N-=4mx_5DrZGHv5yQ{!k#KQ)c9 z=N*Av5TbQe4J-fr6s=9IlmjSXYJsE$zA~ftLYbWtvWG5=Rtn{6WX4g)Lm8#g-m*dj zv`Hu}EhJ%yqI>@I^lwzs{nACJo|IVgLODsLM5w;)if4cS^f#(zjEc-SX+MhoSwZWn zO$^e4q=3>HV>TvgTix}Txp?l8tL;H01;`RfNl698lgb%)^1eL%r^k8!rKPl|O`D`J8Z^p= zpr69=Q>4(iLLjAu#AlF#QqMAEh1O`-$JIV<%BKVy%Mu93Mgz^h3mS@D4-pDw1c4#j zO%%S*sh>R|e(;5}@3IR6Pp95V)R6#PsdU)8WNvYm6s?(~D13FGiNe>b8xKhHOxpR3N~Vub)EY ziTk{>=GGTlx46lpCr1b2`<@XA_B=!&V9uE>QArma4)AuejjBn5nfmS1C?0My8e*{| z7hV24+S(JjFWnL;DBe`t{=S8@5kg8^P`%#>PP_499{QgXi10zM;3GbU*74Q|KQtO`TcoQ`y^%h$_CwK z9B}?P8rJ=q9V;#cl55`b@7=iEyLQwRd%(faJ1?Z!@Sew)ep&pXlQOxOeOL(3gPJWq zvkwdLqhGYp+NLNjlDxbi#q7gEY~1Ye@~cVCIz7U&6)sK9iX#v0Qo*RMwD|w*op+pF zRlUW(d!KUa^pcrmCX=3!Neowjb$y2M?dXJjefl!F`&(_&IP5@I~O44DJsc!XX@V*kGRJx)B{= zVF&l$l*)|=#;QK&U;qFh07*naRGk_aM9NG$JIHpdtMGvtF#**<)94)7SJL?w%f zKVF9ENJlXpVlcIYX94Hs{$2z;fgwX;n6#(!*>hRXhcFlI^S~&~emoD@0*uam-=i2} zBZ^UG98Gs_?eGXk~T$=zs3f#7b&xCTHdlf^H{1W&b zaAR)zhcWTe&tSR%-^UOy%|k5f3CuoPj5&rM!w^m*b8SyySnCk*TTDdz>fC3)kXz@c zbK6*i@fYeI&i@gH?S2s`!3+hThuPP^!w@zXU`QDY_$nq2&dYtayS(FQOl|41+_c|e zN|U52GaVlK zW1Q=+{l^W>=Pyj(3fwZVJ=Ui7n~k1zio=I*jPRLb+Q=`K#M%{KxHC%il;Iy_<*SyjqKu^{DnGTP#HeP5G>G z&g(0eANAn8CHjV|&J5&DsU-VaCoP-n+4S2dgBjaC>7tuHu%Wzi#2Y&{)t^$5R-~ms zg#x_-7O=~XpOW6OY-_UprNxD%8R+RX`&oKDWV&xL5?mX+T!NDp#I+)m zQ3P^iMM}#4cO>oS${|d7NL)Z99K`SNQ9DzjFdCR@N6cv+-&)H{Tes!4hg>c@elmVX zjLzMyINB#IY%&5G7j0UQSDpFvgtz`fBG~v=;{gZni z3PLK4P}(RfgrHK})Zr0BQz$I#9D&n)E_AlFvuo!rqohHQ7Y3+x)wkZ)>nT{a}0?fYrWD2WBB7~r&wTsVu`8Tw-^*$q} zGoG_$Tci5qXMU<5xbu1uj2iK&umq8jc^q@`vE2XG8miKg@gF>mQRhs3L#O;5sl_|a zT>pnx^E+ExDLZPKKjDg#RyYO0sj-)~x?BGIl87ggA}RyuWSSJ3U9M!}dru{>y@U2Q zml3ceoxV?JB*4TIj#cRut7WFS4Odt>g^kgJNTn&6J?f>-rjF$LM>an&aqJ`+aBS8- zvm#zxS@D&Mqi4)-es$R?x^w8xyi%HEz(G_5+Ey=IT=>$wH$`EELqS!9WKB7tk`Q$( z>vX6vf5*ggKbL;?@FSLYX*IDZo5gV)M&y+casw#ef2sb}PwF$zq;2P_l+eRNTmmp>%P)r>547xXTSU#Y^Trfs@Cj?C;02G zCd!=#q;0Mt?Pu8-a}PVH`z-L@evR40 zJ`FIOGrgRWh|8+FE=Cm^l3;sluMlE;Ym)Lj7uS|#ym#=?E0_->4!exT^&wEP+O?jz z_Z#t!oBvd>FMSx2G0mMf#QE>v=V2Xyy=S~b&Bdre`XQ5{e7MhP4G;Y>PB>(I`ho#L zBrJLL^)%<58DjpzG}nDR%IGSKzrC8~{TGG#+p8&NOm!$N>EF@2@wBSe1QJ39#06;ss=?>{Q&eSZJ$UKZzJ)H06%|BbPM*jF5h>H8fBIxvI6hwvW= z8>1}gK_LIYFPgfggKzkUoqu5dG{J%)iJ^V%L6u?rLmtWfy|1?IyD()w0N(>X%h04u zK8BF_1n?)!h5iWe9ZW~O8!uu=1~A0LRSYkK`#MJ5GY#Vk{;R#L?==|W;4t6?hUggf z!9BU@H(?&TPr?vTkL+Ro6owe;e%h$SkTk!>l#pGGiH^H3H{Iyr2cr^WoE7b}tbsku zg&5Wv;Ag-cz}Xldp>JTkbJpdi-vxXNxE53Qc?G6?tDB@5s`vUc3^@}3KAmejx6gEo z-u=@ZpM7cW{RE7f?3)3><7U~cdNs?PUyL(mhCRp-xErrOmGL&O@ZQ1@ zeo!**c#gb$*qwUj)H0@3=HV&L#@%r~{qQQ%10GU8b;=mtKc|vY?s$!?KlBc_rQqHx zXYuCNc7FcKHi{z-cYI(fpF3?Vcf7D=e>NSYOk(bt{a{(vaTt}|AY6a_^;A|?a_zO( z_Oulj7xRs8e1j*Rc!K%!=QDcrXs*Bhde*L8JE(lAsxUuUmPkj!T3|_u(wZ*q)8$&! z%o>NA*E{;x(Gh3So9jqt275VbN6y}rH(uwpTs3Cwr27_wFs$KTZ z#wL4X?QTX}65sb|Sh0@9q{P%YvpQ|`uM5j7?(3+iK)1)q+K?Sr;d?3WE)>Ocbjl8? zX8)EhZC%+?T71R0u8iqW0(6_~=FCEcxp?}R|7x`7GeT-y?I4vP7>S^@#`h&oUjjob z5Ym)+SPCZ`QUx{nf4TI^Q`bjF<<-a*|1u{Wwjz-zswm1?ADT>;$>Pg8QgGy z?OM}N{3OBR^?Q_~deW(P*+koBUB_gGxf?J@*F5 z^k9LZQktipUrOIYo@0$>4dt z=RjLm7hN0Uj2SnEaQQ<%nwh1KUh^yWiJ>yMe2O(ENBZMHKeYSaN5>ALG zfATmoS9Z3uu7!@y!KI-}Y5C@|t$zLbP1fjH)3N#}kBUZ?;uICo8dqxa*z$W@Hzju0 zF5fcp@RN@Gpfz&ceTmlQvQd{D^;Xl4#A{_0;Tid-PyBB6;?1Afwtj6zL<8Xr*Q@B@KTJ*q-e{eX})_N zM~;7gI=;KJRS2O~CMnPw91D~()rF%g@!LcAt*vCV$0$EU^+~hLb)Q3HQwOObt{s3( z*5kp)h6^|CPuQ1~l(09J^&kV!`XNUOIm)h7_=X1}4 zF~0weLR#D2*?r#JqAp@Un(!X*Sq7feL*p?_zw8=})x*BnXH3LA*B@xi-s|k=bK@cW z|AEcGj`Tkem{Gf^KPe+EljL+D_y;5RQXH6HNMC|t35FOL3bQaB`9J6W))-^n-wd<7 zrI-%>aQG{x(|;_6@cAo7;j$;Zj3JVa06qsi*=L;w;xP<4F&9JNT$!79Pjv^-M!oVkUZGl{SIdD9tJgZy1lLY>VQQzzE zrcK$mGRtgM^Wb9%JWn%zwn>Ukr!~9keU`4sFlW|37Eycj9QW>puV;QfusvKLFTtEA z`;2GqN^ueFkHl*Q&;B;~TB1`M!}d_|u^e{RX;{N= z)BTHf^3^}@S-Jc1<41GTc@sJ9M~m3dxMz=@Qzn-%XLJFl{%8@Yta;#y25f$E+0^|f zW$ZvBy`*>#g2CWp3}LAKsZV{19DB?OdN5)%Tf3KH%UNX z^hlLjo%xZssk6LeWy_3ESDG;;<@n>qQZi@!6GbPCdM>>o`MC*Gr%xGKF$yo6K^H?d zp$P>;R#K)5f|+*m#}~C&z7unNg)cBZIB0}Y2&M78!ME~Ac+Y-!p`go|b7%K9_?o6I zjqKjuU<_mX5KRkG@qXLZ`(A_6M70@ZNNR#{54ZWpXY= z{my|P7DLu9NgILzq-WF!+V}Cb#um_u;>j164*tv#&}db^vCXQQ?)4*OgtV|Ni><9&2v=>C(kZ#l*=|H>QQIjibv#6?sRs#daMdM7fYM^K7uF;Bs6Cl_S(jqIrmD zKFP-PtF)z}zGIK~JWbx%(fC2Ty}h}8ohT~sGEzFxKm;qDKwH9bEj$Sni9r6?vhbTn zT{!XVipj-a-nwYV9HlozkDi$B6s!L#dK6ZJ5TQIHSKGzCdxb3Oc|JAX0 zUE##h6=YiD5ANF7ys&9w%RHycf4?tvSOdkg56eU?*WbM4?GU>f(7r#yE-&e{n>%AF zo5~Y8qiO;UeoHe#OY9NFIK@STckN*G?z)_rcQ0m58$&o0AUy;zlNS!~+`ZRRF?oFN zG10nx>EnwEH{bOgbR_Di=XP`M_!C=dpV}vgbcvjZ@8`yrur4c@VT^_b=N{WJk-W5FMgaCi|OM;~25U%tYg2b%lh zzP--^m_E4-hUsFy&3EV@OtJP)_z9(8k{BrJ-(%eVJ1a`~`oW|zq{cNE3E)GyWqz;EJnaMChcG2vWtf}dxIWXn=)LKduy@~| zeL*Sa_zWD4zZG+g3mCjz`)ispkd@DJ;7t0z9q#^poDW_c=DRobDmpz6jykP@SN@)2 z?#V-wx4WBsZvS~FAGE%WD5ZJh z#fpC9&lhiO_w($eH_<8*cPrQ2n&gy z^b5;^Wm!2Y!y6C1#-`2N7=z7>G2@wi?S<`LOc8$~~9$Er+E^1o{3vCH}+rqJJ0*;Go zJ6N#}Mo$@sZcnqib{mx$NL%1rCX(2c^yJJvbFnp|v&FXScD}l?rID6of>Fh#lmtQ) z7M4@r+_>ZK-&**_)LFB?S6ondU%X+r$SWzP=)`i=_6)ky*LsA1PuR7VHScJPY~9)P zwNx@ii4``>R|*A$6CU-Ob~5=rvk-mGt;;VxjTh#xA(rf4Miy{vuDbkGzVpqG^t5F= zGdz6LeeCQ?a-qy4U-vHO^oFhUJ?{OIcpMvcq?IN8=!={teB!nV+^gUM9_zPjlK*+W;mJnn&cYSQy%vqlhq0o`3rtEYp>qd`x z&m1O9s{CO6Q*WO@M;ze}O%^&r;AA|klJL!)&uwSLee>|^n>bQf1lCsZFE z4dq2+i+1mh=jWZQU6=g1hkreojh?8Nt-7%0jN^!wmz;IB6_1OOMQpTKf3{pxB_*17;TSp%;QT*-IRsD#WNZ92wA32uM zlSdOShyZAzb+c0XugTixkC!+uWtNR&nbfSTz!;D3CkhJ-_bGu%N*TjE!}o0+I@$`O ze%aDI_?+6>oFJC=II^aISJoRM{ird8tg7q!M+bfP9n;P$q4v!i*|q#kfL$B)R~9^$ z{`1L~28R8OKI&|jB`=y|q;e|N6@SZ6K3eV*DI=svGiV=zltcHSiV7v;hPI60w3C8- z?OW~q`Kbh_o*3v}4kx`Qz|Vf&MO(WeT!z9YuZ%L|J@tI^tHTex9V`?V$<-J&{lUcJ z7+Zs@F@1tBMMqPghhp=C;F|1qUXc#JY2yA>lH7F5q@;U!N zwD#5^@4*MkAa>B(x$gc|n7HTJ_lk{}lBhCz&0J^Z+7A|z?A=zcFH-w3|J@j+%A1(= zer1?>&&T+u{51D>0raa!&0u_Heu*hfT8z0F{ceb5ZN(T31Dt|U`23{L^cfhU2+V%0 z!)*Ts43TvshBO(7^&EJlbzf}6TnqQoTPD>PTQN!+yU%*eJP6B zqNq@^?ClJ9-VYyyRZCEl&e3}!tLKKBoGkX^xY1!o+cjG zJn(3OH9$H%`vSS6E9YhHRN{pRjE&zON1*1V6y&O7peOuTY9ZAvM>`N&M3TiwKm zkLl$opI_6&%j=9?)QX!<=8hLO^S`fbsI=qHZg&IPp;haJB2-pM@p#?Av? zhrQvw?|m;%P#9_f9|>G*tl^c3l=Qky6djvD_{8v3l=P(rly9AFTR)` z{_ux`mL>Y;>$nbDYYKcp0g_#Rf14+7ha=88g7S$Yaid{o%^1t;Fa3~3Z?2=Mxs#cb ztC>2j25I$1*d|&!Su=knFF*J)x+6|VhH%muupKNRh#=`&xxTFB&1KZCT0>(Z#uzLL zodAPEfL7QD+C`>U-613qCFqh+yDLrf$eBc{qAY7~z|UIb35%Ha z_xfWJ(Ha|#+|f+C6tum)hIG*ROe`Gu^c%aHD37Pu-qb{wEph%3M#q!rj3;za-qk7? z1kXdZcQL~XQDeCvB`T95BcMXtEc@$X#?6^P^|Xmd%XCCeKW#SWpM4}xzp#X^m>C3$ zgacHMD&@wneX!s9)xN!%Z5wKtEL{Q!L@4Kp(NlV)jnpg5g#{5#J#hv{&6&W$MQi(&(L}=mzVVqe#K^C!&R7I`9Q zr!C9kt>sG(-`?7^ARw)l0w-9M>gtTxXjU!WaAs`VF2;llu-q^zJ($2YX2Xik`(MLv zO;DY%aSAK3vT6L?Z6uy~>r?HE-)_={;r#XuO@G%d?IWs!A>s?xf2B1Zi&|QfXzF6w zy|34Zl=?|wN(F*SBP<6!u%yTL(6KDxbOsH)@#sSGCXS+P(&$bh^pCZs$;Uo?2En}i?qi%%zIvo~(S|E_yt$FX?O;#jxSx*G^W!xP zX3w5YSy>qyH*Q1-!G#xI$e1x>c;%Jh9yt##5*eR|-mK$W7ffbJ?VA)u9Il@`mhU{> z`AU@G$Q%+ zJu&Y2MK70h!m$Cqb9*NBMX`{ z%iSM8>313$W7Y5i##-T$JG*b=ouU=&UYljqoc-&Ftbb;3 zs@UXn51f=~Ts@?`aKliI`+y{-eB>rf#Mx08qu)IlFb24H0ykj1SN;cMc6%V0 zfhm<*lv~%?z~||IVLy&3W%?0D(eYmxawCpORk|5do-`a5VOZWD=fT2|@<1j|M&tXWl>6mh(zOt(CVLW0&7`0Egm(JrDw)uXH6tDxc zZ;CM`PydTaj_Nk=?M`$0>oD6j6q+#JKM!Ndz}Dr~`_$Za&%-EwzK_Cz|Wum zDD15B`TTWxL#kn}zc!C2a`%q2=LRV*GC%H)BRKZR0RR1k{6VD1v?&g6zgod>ABZ#W zr4+uenK{j6*@6lR26$rmKFplv@WD$4lN#ro9^{iBi?XZU??)DW?jZQg>vkw*; z8ymUrzCEjt>+9>e^2#f@?6S+a{PN4`=;+|a8*dy`x&+-WA_l^e;3=XCN~MidKHHvM z%Ktv|1_2=mhJ%D_%CI9LM9yR7<%Mf`1>5U;rogTY^GU3T)@p{zz<;| z2q4+M@O8A-*uGCS=Gc0^N5|{yaVJ*)S7cO)J$~wBD%-Qr+JTjnlCYDH?c|o8Op`>RkQ54wriK`Ieg1cxdie>=IsHiTMwVc^0e>%Q(17VK0X_| z_a#M-az-c2Pg4L02!Ty^pjD2h5Q0!N+RxZ`s5s<*S7el*BV~HGN$5U5{kGYERwSnk z>g#q~aPt5FAOJ~3K~%Bi`AF$gh9;6W?XBB)kx3?TLm?jg%?;fAy@z?^&##ir`jnL9 zamRPA;^6<-~eV>Zr!cf)pF?VmDx0?EgUJ`X3T_Wpw2r1Fc z`uyUtr9ZV&d@;Du-?*c-<$d;u0*e0UJThB->TdiAM_hC))#n^tYX$YZNmXavvi8S+ zCSF_1?DwCbtIwPo_q$SG%Rgf3@9Vbjnz$Pu;mWA6tu8wlpgolq@eP~8b$&X0lnhZQ zZL*l2S8;hc!9-?ALZ*9r05Z!~0|HkXBVna{l=9hLyFHTH;ztya7mSP?S5Sc?BwOEJ zU)GsUfYvlEUQTSWLL%~8ESoAfNPc&UnzWHl5bb+t&z!e*z~wMy@%PQUx$mp@a_*-t z$e;M0sqeR=fy>6tx@JvF?cEP)-(DO~q(jk2aL~GT);2N!FR#7t^{3w|JS?rL4CEuE zg;pLaZHP9#4?YJU`N&5YIdUYKOoq*yH}l!gezwPq{a~Rro~5B<&xuK2`}11vzv^%r zZ$A@XY3_M#2fux__qVAcKhWzL1)M))1pjkxugkz6K6wN?+ftl-`<_Bj_W|Qi%4hw{ zH`3Yg44}8K&0hcXuahrc^x075UO$Vu_g0LtaNZ$7Z{-M!qQX57^?!~jDVF^RmA=c4Mg^m*dY@&MEYI+X>y6U2rrPGxtIWX9+BYh3 z-FMYJ^+ikt!^M~&k)c9ZZo&9QewSXWgF`rk{eq3@)Lz)PaogY1`$fuV1?vWoG6hu@ z6*KlPTDvbczcS>Fc2CjGebI#RRvCzoVhD|AF+Lujfqq_Pf1-bR)Gkc<&Yo~FrVQsv z3|a6UdS!E67!Q}eSWB-;XCOK-WWq-V(Hxdp={4@3r|X1N+ex@^FxaQYHF zKgN_b*}4C_OPkV|6s-TjkSdJ-$Bx{xZ^4)-cVW~n&_5CzU9Y-UG3U>G48iv)`j=G=MBhm4?)0m^_#69{#Px5Fsgs?4WlMc=_zaiB zXPA4<#TSIR_=500EptS<#n->M_i_Qtg74fo^mn_i;QQa~o%Zdo4{tbpFc1t2KK8BQ zQ(9)6=rH5N;qRSYZJIZp&Mr)M=DeIrYOZ7UWwZ8W9qt*1Fj-RD!IIj6m3sa0gL(b! zqZ&HX{P*KS3C!LZELyaPMT-^VvWpj+eL=YOGl{YHc((2fO`g%Czn zA~cN3ksC^BV??SnTKQ` zaL+3Q!yy8Z0B$&dB_vaF^R+*_grCk^LOPKq)zU@E_pm*m5@9h#1{vX-GAy))jMt|- zDL|O$aGlQPwzGd{Gl0NGAf!MJ(BJ=mB4WCsl_Hf$5@MiIrq5pM*$)bQJ){9(0X8MM zB`kbo5zfXs%Ey!uEiT}Fvue2Xm`PZcjX>gO6mPz;0a41+X58tcd@B*ptlqpcm`!Dc@46I*L+KJHyr?3tq`>Ql&sOmy+V|1Ek5J}3 z(wbcPq)AD_lDSejbB;SgG6_KjjU^;*pYv-xWuP@#?c-@vPG&2O?hN$N1wn?iXpv^k7kR)itBbx88cu_bTjw8|qfhB?ZKUAdt+UTDuUw z3Kbx$j&_2~2o>W7!U$<2rG?*p9qomaS+;B$ANj~fhM(ym;I`*C4?Ddrk>!G4>^aEh z6A!%I@9*C&+|KV79*m0k0hs;%StJ^-rgi72Vy_V%(-N<5yr=K!3wqnSveZ{qX-p`{y0R)HYO%LH8z+<;3Hm`px+pVMvP*8mh zBPQ?J1@#byL9U09%JfubjPwLx;R`61l5!k;-8()k`uyMh>LzpsqRWy5w7`KLyVN2q zN~8l)gOYR#K}P$85v1ZVym%LJASfgmt&G2i0ENyaAr0Lta)F?*NTJD~kd90K)bUtF z`6SXF&F$@MtF5IY7Dv7f#KNF-}CpczFtlTlPMJ}DoSEOPwLiu^1HJwe()C9w{ z=SN5;l1RV_xc$m-{#~H8rn9}BWG0g{I_|sEdI^K>bHnfIM2ChTm~-S@VXl;}BH^Ll z+R5g(wwsX{TlSB3LXeh%fTxN0njlbxWULG@Dj1?XT7>UuQoCEI4CNswPU`WB@}8=+r#;JOg?qWTsyz8X~f3*pm6ml8FnnovvxS8;Voia=DO4y zt7l7JBRt=bkbaKf&7DWxWS_Q->9+A^>h)-HF=UD|JJ)Pmjxmv1;`)XN5xIaeAtlO^ zNXtUHmMOrDIH;XF`;``zSuV$i3)$^w=<+=h9lnSW7?){DqIHt)`(7S`ky22AMO22# zvu#Q&hp>>?fiRXE#!GgBDTJy@)JdWh1ca}F$Z31I01LkdcUQ>`4rAsoWL2wQe!mfZHUu3!AC*W+J>#s=OV zs@?Pa6?c6pemB;zWr7EUWZYj&uM#Vtu7<@t@wI>NaylG<*+8L#NgyY6C0VkU6Ok&$MQfq|j zH4PS8qXcH8T$%SCnj$T+0bgt45;ACP4Mj@PVwwFJLXee$j8?c><7z{6xZ2F?YE4k- zzQr;Cgt9(GLQwBmq=iks=sVS*Z|6`#E?vqA48~N`a%Ia9q=5RWG0KF z4bc;_BxlX3BLI5)_1U>shP_B0^&lmdDCVrA&kN(5TLlUgrc%ie9t4B zN)wDm%z2Z^A_6WNP@adhZM0HkvsnVcAX+J6ZS4f25nR{BPp8RdvIO(<&{~sCX9&73 zJ{qMIu4S8&pG*c^qp)kOZzLEDP*74tM_UIiP0jeekLxl#p=hKbgQs{?kHhjL1qsrHd^84BH~N2m}CXb`hqb9_Is}#0a(f; zgCPt7mS@=%WE9f((5WV5a}yaUNJv4OW8qr@OIYMU_I7o?bZG^PIaj{B^aZ5`;jUroD*ApKtg&-;{qB4XGhY*%yJYn=OcP$~2 zb^u{J=Kq}WvH<*4C(<=42gmnu@j4sZx(;qV5{PUzJJ`UbZCeK~-nRT8f7d@3iS`J= z=n14^uK;zc7G$5e{pzlh_WHT~gz~lYvtr2OA_VFC9*)<&@JcE()bxLM#AE86jdwED z3&j|#h*$fxufPy8?|{te5dM>3V?0cr050!t)EXAt*2#N+IXLEQC=4uJvRuK0(+`Z4 zNwzEAylcq%+=mWmfrs#J#%_$F=s;qu58+*cys$m)$T{x*#Do98!iLS6*N18k*!IW~ zHS+kpV)+g{0NKaPIIgb}tT%bFqeTU_tnlvGxxqK(lqD0tLgkbz4*ohEWHfIY(m~R3 zoWmlK$dL#8>jWy4@Us$fvVYqG&j+pXb(TiQ!b9K#8DW$i5d@`5A{`rzpbMWiKRaYM zUuy^nNlYk1W>^w|Agnc=Qqkgjlx8i0C8d-`T%_Y*TN2lCsCI3n?I0{kAsS18$av^v z8nkg-_W|ulL?mS5FmkFDPfBc|2zyz!CA--2_~H@1B|bR1yz=gvGsfRcb^7olFF)pc z0WbV3D{a=cat&7Hzb0}1w9Ku4ImN(;5ep}E(Mk69gi3hVcqZMA%!4cNQxbq zo-l3n^KA|4yj`_B<>_Y}@yZ|mw4hY^{*0LGQ0V!fVQgioH%ibpzpkk)wX2S*ynJd~ zT4-r%V*IqJ_^}xA-A&AxIDt+L>v!y;yvq1)H0;>LtM(B9h`sI6xPJzbaZtwqk0s?lDxTPE2C>hlePp+O-)R!9>wg@c|5v$ z9lrAXvQWt1(b4Hn&M)Bn_q>O1&zpzsI$ZX?qgsFS=={Kr=Jv?@E;@>_TJhG~t0@WO z5w%mfU1avLR@xYK0ieLKAUoja+mhy$^F7J4Y-;QvUXFB78kANv`B^-rD96TeU85rN z6_&3Mj$>E}t$S24X!F2YtUxJ^z{9409duOm*jbzQe#u$`uFsx-a%Fy&N5T@cC%eG+ zJsD4LDej0*Tm7de=a9+F@jE-{K#`IH|Om3g|^NP}DZFAQLnG}9q9hqbryP_PcungVRhRXDL zCKnQ6*(fh%_D4Um$3i**R3-sJVuuP4wu8#1P}vm14wwjdCjefiXSvfHhqCeIwGaQT z{vO}=52kQNNGUfBYW33h(6)8Ba`ATuwEryab;|%oO`uBJ_D6fBxj+%efqfi6B2MGh zRsKMmgM$LkmjjjA03;G@Te>3i@X9p@f1v1H0g0G_Zrc?!mmf=|jo@EWSI= z37^lWbkgu@nRt_8*OLByj+*0K0(lax;m@CF<=oo~2@PW;)fcaPx06)Ip!>yoj1SBq z{Qp9n!QMNE@Nb5)5?OTW34w!=g7t5SC!dWEX%P#tCX!7`3|J+iBpMAP(?amE; zH;G+9*|?AMo=;Btr>?|-V9{^3(6Dw;b082X&(F_4=;v29nl__WEFOuV?OuKnV4pljurIb*)q)zWo#GSP($*<-?5fNh%|Y9!L52GYL9E+~LL z7EVLf$qA!S>DE+qOK)}9K}5pF;A!BF@)bIfK*uvE4O*)n!bWI7XGm885ek4M(HRdVz>S0$^OZB{ zsH>;*Pc8**X$pkJsC1^Iby33udCER7A@GmaTkhCQN?CEK2r)9~EMH&WQJqkJ;j}#WrOxK~8E>|?i<*++=Om0y zCXG>@$E<8Gw zOcsnCS5&)oS;we^@}1)lYiPYIo=zVZtr ztDNa>wJn6}Ap8)tgNWu~jTnJ+ED!?e*jPf44=79K;*~WTVFWos_IzLeBByStRDVrX zpQQ61zCjDo^LO`4Nr9FEUkH>0PY5!WAR{0nP5p9OC<@aVq_FEs+gW_V$T8EpmpLUM zu|`#z^JrT=mg6Gx!cgCWC@VzfN6x}B^>K}0sp_F3NrcLWG-jBT~ z9e)Gwx#rzJ@bkAHzn}KHBLUUCgTOhTbUuCQm&5;5)0AvVbIYZj<(ROLff)adujF4p z_vFyOUw!4f8)yBiSKvT!$w!(VXBqoS%1ppqmlJ>n%pK~>z?qosZ+u5q@;?mS7v_tY znB<-ZUoWkB{MuIj>&5b66IQqUErlMyq0}629@+kWM<;GX>@y)#w=BcLpAJd5eUH6b ziygut9Ks>|XQOtF?`>M*KMEMRVfn-#a^#2J{e;ZB0qKk(B{Er*ut*7s)|wQWgjQtH zY?Xox0+CJSI$jXey2mS~+w?btAe=Mw1bWmQSdvIa;%ZG=K-lxhWIJe)ro^Ya>nVXi zZggDq~Syfx-cTK0BA9gOL3D?Ym{MX;iT6GvAt<=C-}1jMGI$k;mxcumU| zE`9jE|$Xg z$PYz+cHESy{^DH?ORw_dx?S*7i2pBo0tY!4EV>kJ4ET}0cjI0@T z_>8BNe*NsK1x47NTNgW!1O|{U=?&P0ohH@S&~e|#j^z2bOsR#BQse@q!C4VU|INGag*GH zz!t`s*%p$XxQX03C;Iplb)WBjG4Suc-bYr%1Dou04)JPoq;AR6K!b*p1)T(c`mah4Szc9XT@e zUm&s&wj!|CV8MSqj=Ewxv6e5AumfyBvYq29CwuI5C7`!7{?zIVCJ;m5QpF1AEUIy z>X%^k@`4mCt%?u4H_QvKq*%Hl!}({2m^P*NbE&lEr@!i=pg?l%RlV!6eq)y3+#e?% zS6p;nn6u{|xQ)mFRAPK|sxUsIKgZlgZ^HOvJ_4Kp45@ZLgndWfGxkOX__l0*CB;j( zba493dv?>VTRvEs?}P-e{k)6C_r&?^TNV4XBB>6=gO@hrX9saFYuUfjB^#3rG<<}} zI|~660__Yaa@&n5ZjwJrSMn}vMx%KkrU zvrlTEc87=K2=bzWabs*QIyb~8J{s*8kEj&H07R8KsafA zu-g`N(Mtl^2z)eM%4ds8V+lcxbchNIfuK|QY}XkSP$_K6Wd9T~tu^&JOQZ5|5L8Kr zLTM9HinNsEij4ZrAJd9$Izx;0jb8`@DlmZV?5PlfQNm%A<=_g7YCAwsN<=V-PH0e> z-tr}FI-xz^r8Jp%k`<3HVcI2A35J4%WSpu%hy?+pGs%g>pKd0tHB{hA*DRy7uz*7iDgU;H1)<^G25j1GP=!y+@pQ z%RM_EF9>G?Opa84Q;)XXrQe-;dCeALElIM|WP#H`9#}S#&yO(7t}E1Gl-&J_bS?v7d*`{XrHOJQ z+2gu(Tw_tu{X%y6)^vOyMyAM>>Cp=d*HdlCS~_j7LsH{a$wE~+i6P;*V0+3bTo+uM zv|DbE`$tg~RG&t|vB9wrmKBf2y=wqWY0rNcEJ%YZ9u(abaH{ZB$J_Po?$N#vrUBKGF0|~q998iiK7XD z+*=%vsY00Pyt6y=<=OyWDx7$Qi7W zJ>Wc=cKj7cY+r5t{Fyrvvo5(kJnW#q?S}PBEOxH5X>D-HAE91K1%gT$~^dJ499^Z4)d{Yqs32t8Re4ihq>pLY!<$g zWb1Z|dv5V6X~h$Q%YPN6cwkRb=9WLUF=e9887BvMWnq&0A8BXf7K_L4&+XQRB)|Pb z3j_PBoutgRa+}F>YB~GcAqEXpIP-!=?zl0Fi_iPgWTp%}4h+I8o^o%u@2d%!)ek?oF-a3{jbUZr^2G-9Fqv-oCb#+@UI$EG|R~?kAzQ z8yr*c=~I;-3@T^qn^D|1=w~i0S^Z?gJ~aYoqg5JS9F9mEOsevj*E2o`y z8h77)H>aL@DossI6c-nB`|Y=L-F4UT{`>DUZQ3;My6Y|~Dk>;1?`c=iHMK}jP;Bpl z)W|LyF(^80JSUwvlbqqXs9_CBlUcrMyLsE6UTUwYYnG->9#MVEZ@#@dk{O=jx^AIs zStJ_U*s-FVWiNch?z(nL&`C*xplP9LDsn*qIiUbqnu;zf1SN^Wj!P?d6xkL%qTL}` zrhh0%Dw!Z@TeM1EnQPrqC>1irii8=|F?AJ7mT-mV-IA*XgukLe-(8bDESBTHAZ8dx zZ~kO^ethLt%ECFQp&*5sIYhE@>Zc4WB{$chFr10h)PiI=ln6mP4oTsVDI^pZl9G!Z z(G$7RwjEL71hRa=l8_@bN0y0)BsW)en-#y75lXtgjAj#&_R??x5%LQw-dZ1Pi8iY~ zEwfqC3iFaES*{>rIm8vHQRK9$z)M3(hW+Gb=aCc8ku=3C#f>L;5t3&d>mqP08{4#L zjwh*$#wbYHD5guXBcZCQr-HIOCg${16UZIs9Q+}Pa9$Q8r-bn4(S`pa7Bh<-)xj8Vg0T)KJ3gk&m3L3ZKe z5?rn+YB;BVDVecy!ip-IS4SW4WdzRkA>{``8B#bSN0O1Kt8992Yer>4h6S1{>2{r? zTb40w--g!2KOM@oS?vt^73a*w`Ps!f(l>ylmUdeaMK~1`7NejOt5VA_XD`G>{Y0_{PXQmhX)6 zt-r3s6@rr{6!EW%C-dNvN=kA9Y`AU?Q~t1oZFPMX6XCES*(|~bZDD+wu3`oS{qQ`HyY_}-LQ^?7diMF`Z z)Hw_rtn$fflW<64+-My|0m~9>+hJo`bhfQ*xJEeC^Lg?4Bw|$q(RGQ*bM_x}+7~as zk>t$Ng8Tjc8*}|!_bX4x@WQJBPCu`a-(Ho;QM3I#_H@^MxBL@>!>0MzR&G&U>(IYQ z!88TSJ~p`O$6dL?^XB+@_01&hF_(<6cMCoGRE*=l5n%nME`PMU?`>nj@c|yZ#|y%h z6suf!ODh+i6Ydf(elc7~S1Is&`}qDxz)ZXf!T+RZsqnAyIkE2({!?Hs&^Z$kE z6F{HD%+&KkthhIZ(cUF#9CJ#Llm3!TWWd4MRx>Vm;`9c#ztg9<;z8iOgKp&iJv>g& znh*!WHF)RZKW1>-(vdw{YP`3C@@>~WMFHV3V5 zlBy+Pv9mD&jd0cTn<)SN(Tpq#^WpYpKHT2ix!yw`?dG>94CAoD*?p2SM-I=yr^?** z&Q4q*SiQTIXI52n;St6EF;eD(4?gJe`O!xo<)Vu&qO7cpWy_W^Yt}3(Dk@mCXb}J_ zR;*ynnl+qo!U_E8PdzK%OGrX=*qHh>Ff9xr*ep^MO&`rEzxfV&w(dpXfqVb4kURhK zlHSr9&jqM$Se3KtvmIkUTzE4XVUJ`CW@VEzcpy2Y`Mhx3^Jq;eWJMw&3nVj%FWyG~ z;sX4m3Q?09W_2TW^wilg^$#1$FcAjMT zRB7<=ejn+j{$K0){yZ%Zd?NP9>ab`{AkqfC^4L-RkL z_Ni7~BN8fM;SdmlwzMK9GHM_b&i@9%l6+)cK~`j31b_eMB3@ef3CWbn?88QJ%@wB+ z_UqV|jhQrPt!-r88!OrL{$?~G)6XBBqYD?dH2XNS}4GnZ%ro<$zbFu zvyj^~>Rw&SAOoVSs|Y3y0zk6Dplx>(8It6sOc^ec5XcF$(o`hXuPCLtnORa{{=gq+ zrz>pb^eg;TUeGUFriIm#LT`>SA{dYqOS#M3>*zk$MT`5;U2keVATxI|?bv<+N`r~9 zJB}NT5sKts)tO5~${CU`D_Uf7=JA1-{XVHZiJB`TZE8mof>=xC2WvKNbcN%bqDNG0 z*&z%Jjr5xkt}D_V*Cm9EBr9YEf@Hcb1$p_~np)zcQmBET=$4eG$jEvCN%uobW7qk! z_KBBi3b-zg?a-J$&;HUprk-{r8U6CnGecCj$GG-yFR*@dl`Tuy$Icn=zvhPv&?N;c zVUTEz(XgYQip3k)yt4{ff_}1wP{77TMi4;8r+CT~*R)7F7N(*QQdP8ljEkghN}7F< zavfS68$S{ml8i3E@$wQ~*>$A>sKg}A*S@X(J0#6-#Pp=EK5k?bG{iB64}4H^TqVo) zDq!u;P+0W^8FK23@)4232hCK>YHMqn_u0zL#|6vxsKv)0!N4)4|27?KcLd)LcRuuz zzhBD1r}}VhgF4%w;DnhB_~s;}r1Q4DqkdBBlZ*1DlmV*JiVP zm~+nkCRzP*(1SjfuinnZSKLc$TLQ;%`KYpnH+S#lmB+6kKPQ4~+1N>wXmykio_d?* z8#XdKYap8D^HL0D30dNp707F4l4+; z^~SjzGdhnqH#TtHiNpELOIx^mk*C~z;(|&1;+Uaa{LelMCi0u(hw-&>aLmJ%DYb* zTyXRM94YhM%LyKSB8DtOFd(sKufy=6Dhr=0pr+R0>F49@t#P>e25+47=)JiV6)2p2 zNh2SxGMPLPj)Gq&%dmhA6*>gd*2T6?guG;ePavxxe8gCGCOuz^e<9*<>@>u3;zCCjMi4S zvu%I8Ih(Pgv|h*9U4eZlh$jRed}Q=ctsDrWM`{QG4NVSnXZg75+9=IYmz->w#YXx(Rqe2HwaJ|~WwU-$S3=0b zcT(K^yRI?qw~h^P?xjs^-e&bkefpe;;2HTg;-xM1g%t2}JinRSfHS}7&b~%(Ql=U> zAJ0*_lQeK`c<%d6)NQml=B7-PZZ~p%nZ^|xirDy462}mf&h|0rus&@7d!c@_#nWds zQM0zs;v^f`|4ncxC;+~L7Yuy^ubzAdRNz#g1lR+-0CY6Mk7rsm5-;Ms5?Iphx8KAo zMH>R<0Ivb-fGNO{KpO`y-yNju{Q7}&@pAG`19I`yCd<>`pAC!ws(?%Iu1$Tq?Z@Gz zG_6Sg>%bZ5c8>$b1CQV-h*qXQj{-KP+dd$@z6(4_7pW3RZ+}Gk+F7@Yq5 z61)fY1-$g7?r&=i?>rBp_j#Uxca1851$gKBNj&w<*Z42Q6VE1?K3QkVM4gjP2=K_0 zG4B3D_5pvBlP$Aget_5BOmg+lBD}gV$(WH^4??B`nzsKJ?2ZbXWuKV*>)|~5_fz=I zO)dQPs!aL}HsVECMhyGHFS0KTGX-k5Lz84sG^pC{a3H7Kk6tudc5fEf(INhb47h`F z3knZqpIJfgI8#<{uYmqpeg3bf9m6mvDJj|iMkLRm6j`FhHmOJAn3HGV%k6rXwa1d&bKk49w01?iOw(p> zO|!W9?&qajes@mia#>LrI&%!)Jgb$3e|w2c*C8w`$igAn8b!^A5r+?F$I>07@&e@K zkKq01U!icqU;^h%BvoOcm#Q?pxRRYKD=8KVrf~UKq{I(`PM?VVBU0z#JY%L)yugcw-B+?C@3cR%~wH{w=m-fu2H*L8NOyj#AFmetE=?-G14 z?(lJ`b1yhH6m4&(cH<@z@i><2uzu;gQnf4=*pZAAF1_>{&6-aSZEJ5~tm}ZJdD0h2 z&?szzrMb+x{VamnT@w@`1Sfvy_pDi8A(BZ`0;sHN5O2S~Mq2vztz_kS5yqV2e6k1R z^2E+ss>++mkR>vO@KRgcF4JXHuTqdCNnSx4+otKQ-82R2aS|!4@&>RSA_DrwED~)A z`l~KgyDMm{-pc?@1H;8_Pm=F~2n2$)TlTbPI}SpXrQq05UNEE+5g?aJ%1GO$!I7wV zZw)0aaazg-(Nx#yvm09&ZaWmVIS5@L%M}y~k)!7Xm||I2jV}SX2T99f#3Ij*g_1!N1e#bk;jkuS7@w#{{v2|-T6 z#y`r>_z!cavTc&>&bXXNFxVD}pr-^V-Vjj^XP^W#dspx2e16iUlNA}^xYWrmO=(i5 z^wb#)J99RYEKyz4%&8aON;KMz;|di}pI^ArU9)+&{Qj#qp`}ZD4>=OXpEQHlZ+wPN zR&HRD2%_o=fs7!sIBt7XjQ4FBM1XHBh^YwQ-&7xNDoH*8kr8#(Vc zZQq+QFq}iuNYEb87<1Y*Dpplux$SEw9XE4T(~51^SR1wy>KH;wG99Jf?L?H654 z{4?w3VH353=f~^=A;2~Tp{&nGAbb^AzsX|FheeDo(`apTDIH(U(iH}?XZpD2%1rM3 zOB?UJSkSrteGkVd-)XbulYaPo60L166K2(N%HkB?nCt1sR2$0Ws|?nx z>$&Xiza6}oPx(%pJ8#P7r1=31LooMS_5AVPc7FHEOzyZbi|=37)T3=*1>Sxy$@D2Y zS(yiyp0vkY?)qyx`FS!!N>nsWA~PcM;WC4hPYCeAM+P_jCX<4Eg~dx#oON1|4?Z%O zI#KVX>iPb6!`%J1HZJ&Hn8*JW=k$|;1iC4wg@6FcKsCSGdQWZBf$S`qU_hd}#`!X& z%x{1~;4=Eo`sl!$c=PNt@H}AqW<9^gLD3iO`WkRK@VD*@g@6xkZ)3|FNlv{#r_;23c27=q_n^9hidZtF9^LwID%#RqBM>3C$! zQoIsl4*=f<)~DOBDBX?^)7$Ux$;nRtJw1JFFX6dhzYhF?uC%7>(%Y#7cBGH>I=u5) zo?iA89;>+^y{(ye5Ut(+wj3Ltzbl#5P-S}+ zD-;ce&gv{l+ZQGbjBv^9L4G5`MMadX zpvG}y@_BP(16e_hQzjOX9sB}=05dU!K4v!Yc%0naz9UnCK!6)=xPg~nez}vBS-pBS z7hilaLxv1t=gyrJ6%{dc>QpK#d#h^iSiE$k>-K$a|8(BXhtzD_cBJ<|T;FTCtSF2< zX*!KBeoCySjzUSrm1Pq7*$g>i3gx?Mc?>+`d6;aYZlx|tJx zxxg7YbzDQ^imgSWsTEn%m^X5iJ$cUT=WBN~pZLP^HIZ|^eT04Vne*G;yZ?n8x4sQ2 z?Ew;2RQ#@B``Yzvs@Ng5`P8veVgBfu$4*@_^eAzBs>wfpf!4l1Gp}xsWFOkA8NhEEXs+~LVrA$UC65E!pq_v@*iN%9x+1pIK zrj=7oF(k0c{d|cQRa&~)?h7Gk0X^!Db*(57l z2vk)w+f_(38rO^&*k8(*HR`t2Vb(M=R#H(~W0=vM93lIO)FrXD)-X5_rc4V;dzXKj zU6_}{s4-(bkC6>)p|ueu7(uuWPP`S;X-O!ur!F(B9tOY$F7?=$5g#;zFC*NkG`s5B zM~Sw?y1Z%t!?5Ja-Ss^5k5~D@4^Qb-wghrRjQ!RWK3lhiR==Oo^N;#?#JnL(Fs%|J zWgolYfklx-MGeE}&s(EU@BfDG6D9GLd*+wF{85f#TV$pyN2P?zUdLqcyu%G&(w0*n zuhS4NBH&}>8S_%wh}=b5FyOW>-a2p7OCN@C1OiEwBq0gFuc+vXiXy962yEM8V08oL zvNeH}KQ!4VbO=OnlD%yVT?7fgM4=mE!_v=AeDk%1!%sc`r0H3CnTce(YXm}iysD|@ z!mN_)Sk|z!FMD=)*)n09$A--$t*(O<2w75Gt8CrVI%N3#!4u`6{AVXS6Q>(7qU7cS z0yi2(*d|T3Nu^|S=D9}`F6iV(s zKU>{Ic0(PqqJa>&jzv|-PcVD`UXuWG=FFj_q=cJpx``7`IN^Znc1JRqyaq2g+yyf} z{7`;-=CuA~2Q}90X{CRb_io?Y(&ZtuCz>KJtm9K^kRzOH@Ak z*yto>zIAM%lYHsG3CHwab}$sC$8zAMBAxf$5KlfE=Xbw6@O}AZ@bVkU&VB9=*WcR8 z^|yL`!MM>H&p(#mnbvjW;XXe2D8(^H`&qZqV#ZV-`FRR|y5A$AKKLlbQL}rW+xg%0 z^Mfmz*}lW((WhcOc3&=)d%6^#wk@zM(Q7QN>k=tr|0HU2)SZMk|LhAA-kfk9UZ%#u za4p`v^#f=DeJjA>muE0+ zp8tT=nYts<!q_#!+a>c#ZG4!jHenJ!WWJXOchbWI>Or}uY%`tudQjL+HT2k^Xbpi4dTA>OsP z2#-K|CjI@Bz~6yic5CA+csYL^N|#MQSLoKmr+CCk$1z+B48 z$+jIf-8k`LDvy#98ohsjxAXl-)|_`Pn(@AslFp9iiBk3AjZ+FxW6ZSj8l ztz!c`@?^XhDYId-#mQ$k^58u=ov!%@Lr%8*4zPOP<%&ufaPsGA>w+Ko+470S#p9aE z>8Ie@f|4;R;R8g;UcE1osN8BlOGinB%pEH11t8soyw*pmp!$fXD^vTMPq`ZOdl(DwlHqMp_BAoJJnj~V}PKl z>dAQhbr1M_KJL2fE}EK}xZ{ql_ww4cYkBn1M|t$oN2#i+B0D>qb?eq4_mNmVX+Xcm z;+9xm1PN912A|E2O@ksBGj{@k!mixz#-=u2e04dAWN&3>PIlkN>!woVpplzfNKxqk zd=tl_mkdJ9(?2Wr`O0S=IqUSY!^)5&D)~c7$%Wkp!Wi$SJ^LCca9`*3{r#}6& zDSHZ}y;h1!MKF2NL{6GJYiaJ>fe);E=)K3K&AXU_PSABo8-E}Pu>1=L`Z&CgMW9pC!|FH03ZNKL_t&q6J;Mw ztG1Trw6rnQm5FZJ%01t`i5z4yWFOo9`U08+#i~w7R`IJYMoW9A=gxpgK5Bg{B9>%~ z9-{h_o#>{;07*lX??FPMP*(A~4o$DF(nqxzBwOO_yzOaZ0izTR>8ba~NVXGjq3ZP& z$}ly6FWy3I>u#?UbbdZV>QneJnCj0&Ye`Z6=6Vz)j?62ia@|JMU?%xlxk$kvw0jd# zyFH3!S)R8{ho`SBdCC~*LCT~g*z1~vbF*MqPp^hgKih%h^zOgoNt3tUUdP3kEI?7a zhNW4>x#$6%Xe8t~s`BTS?ap}(Ez!v%jx4()FuvqB(bky1-=)(;`O>v>BH06S{IkdY zL0_`*y5{P-NCzpSyD)0bY%&)dzSCU3(YI%%7?NiRB2y+}XBGPDcDK&Y8SNwguwjz3 zXeCNZI}-RTe?T&Q8cr%jGHqJi(L>5W>$(l(`9moF420A7cvcdgQb*CX=%f>7t{+@d zTANi`_-Vz$56=%duG3Q0di{vwM?c}Vics}a59BSm=5|8>d)gYj``7fvQ}NadkNEMC zFNvg>Xf!(c!lxri5|ZWz+d!B$zS92Kst-HbjOCb=O&-U<>7$Xl^?6Or?U<(3XFDz1 z;q|va?Y>B%M~ZzBLGvDgCs#fS9*~$L0#!wrvpY>9n$FG~rIN{KEnUYZ|j_o~K>z7#U-R>}K(xC;U9E;&VpG4N@5IT{O(R-3_ zn)}~CeS?c4OMKcb`(egZor&YRjyX4{_qoi?Irt<}>=UoqSFMtrDbxG~0%3;=$AQ=1 zPIBWl2PS>4{#k@y{xpK$FLjPvJ1}>a=PR@P6N3q3H3EK#(PbLVQHR}CHXp6%=_k_x zU6(lPv>-pcvKd*Hm^sZy<({r*Qqv^za(f=XWqH-H`W5c~-c1>z6ffK1K)8ZKbCFt& zH+Mb-m5pSi=7&qzrhI?It`@pjX&)^J_^qzm_C(pu+HD0+bxCQ#4K| zlrIy=l5tEys#Vam!=m~#i;53Y?0Db6Ilu#rMqtU-K_h=6ySH= zJ}<(1XvP8^h6{bAP%ZBEcX|5X-t^}<9x2ivkCX`mKf&`DD#cU9d>%G)YPt;_VFv?G zy)>1siPuWH(w$PkF1*rfU*o?Fk31PekzvZ*u0gtK3Lbefc2H7g)n_IX#(G`Q#Bn;$ zzL+4M5S_-q2g9PpDXME7esz5dzq;PbF&4smY5nE)Y$6%n%YE}Ui*KG>&mVr9$$4k> zZEW5bCXCfydGABxulp_!WXPxSIY}AaFY()FBGm73i8Z?vk5ssLe3bsf`hKyd5`q=4 zn(sPhIVRN6~$&$oF=T2ZmVTgHmub?H-_dvb_4}Y|W zf3L1#a9)t=7K0xjRf;a$8H#D1+!ZdqM)E|8C zL7si~S&E8^sH&>s>Z`A&y}h?2dfv!kwbM6O<_$z87z`jBmm0@pt(#=hw9!mG>xj;E zU03kQr`y@Sqq@g7{5~yp=>^C3l3dv-la0?T=d;>9lx5^lUDt&B!3vz=)eJj!a(3>d zoR%Y#vxqg;vh2P$sj8@^!f}`|a3B+o8D(#Ja&<}bx}C$@qOI8Jk+ddBQijuhMxeE* zG&hoQPvNjZt1a94Rn6WS0&ONL5>m*AR*;9~x+EH+96n=0L+0^AA9JPDecM0Wxgffv z_4Yj*Dm6owiTHgq)YTIj-T#8t#zySg78JjZ8VTapgUGUi3P^?nNef9;P=$)IJL&A) zy!EblQ+!5lRF?ya#?f=;5<04^(RX;!wY%ThcDY^GB8{4JB>s^@m^&BAH0w0LzyxMF)bCLVrm`(Nr>!2ndBXS?(-vUKGwI(^UvIw9#hT zB!B^}?UGMXIh-&G5{e|D$R6RRNeU_gBpD$|RN9tT+89rb5zzw()4+{IDO7ZPDFYz{ zQXovbY0&1{Ua4@$A*a5TEX%kxCk{To3W;WFjI)eT2i)y-Q>l1L@WmCKEpsoL3EaO?i$w# zA&4W;_1AQ~S~uYNqVWK`)GVVDGTKUy#gtF0clJ&L(kLCeiT zEgV9DHUu+6#x@M}VAs2K()c0x{W>Y5cUvPNKTBV}k#K(Jgj3YkM1NBM-lp64Jo$cb zd`2Fctl*~WE&tI@9?;G6j5E%lwY8P8W5+Uf>{!N+A5SP0;*?WP;l20XqqTMa#Zmo! z|F>hY*rJ{bGv2`)_x8ev+nYG!0gq6Mc6(RVwHYX~M8vPsn)FDW+>lPna{GLz)wO#m zuQ?%|+P03rz5BJc)#$bUL80g{`h+Gvef&G5;;R$wg4h3^TsZxBea4{#vd0~%G44oj z|My)HN2`yCQg&pxULMhsKwU!-vBbyMJJ-`5){k|ELB*43xDF6`dZlNZ=iW%n2dZr)}wq|`esRh8HePx^(ibcMm7f$Bla zZ2SGveyesKHQUFPzm4+J>q+Ju;SCui31-jqbJt(nv1~YeM&H4}?|(PMq$6v4`X6?~ z#Bn;yKQUNvy!XtnSY;CMON{x9&gNh18^{ToPrmuPvK=y zd=Wp=|GG-Q2YWF8f#*H)FFaq6UTCdySoLs>RS$pZwmgNGzVbQh&+Qi$J!SAF&_UJe zbW|tlfgt_7OE9`F-1l%hiAKWYx~k?90<1RWkZtMe&qFXO#AVB*A@Wk7M$nOpd;L zd5=ME2WAb+p|UB-o@kduxix9?*`78EBR(#fJ%}rx-}FVBa8RhK$}P9tLLd;}r$7B^ zFaMYhw6wI)($d1_(o1`-Ba8I3QkFU=?1hStqNK@3&%8(3+)-ro^X?m2 zmU#N1D>>u5+h}P^V3{_msyOGKd6c@~_@0hGLI~Erv5Hq;Sj=G8CDGPOvb_xf7`rP8 z^$QI$^g$PHec?kIHf^Oc6~~WE!LU+>oH~`g6}9Th*B76@rKTFq70jAAiAG&x&FW7n zu~X8(uzz}u+C0@)6lja>O@(%C+fI&|E^jL&jIBF};^5?E8xup05e1FS0skn6J zkTVKvOs!;C2~}0Qc;}yQQ)U_TpH)z_x3-pe`JQy8T(8KqlrEdAC*9 zw_Uhm;|8kR+L)|`$<}mAiwEPY%Kk(*axc&CpFce)RZ&%4OR9D+{f)tF-(G_jbM=h2 z#E+tz%QM0P3Q>_Hw_A;5K$7qqE_*-Q&4{BWBdJ{j_LJt%;LSy=iN$-qI#fmG%u|lw zPj_?${an-L`RktMNB?@;d#MNkisGf*NZ?2kVM!$qP$U^$l5vD!h#myRJAOx&yn^7i zL%nU|0+K9~;R}%y$i%QxG_*C4a%{3>l>*(5A_N!)=n7IdVnR|huUw^YNVyJi+v+^* z0!>FwwqxT}G7_#!X4)6UO__vk&}4-s9AqJIlC2&OV%Y>V6-iNWT?mbw^n zK(Z~cEf6k_nMBcp$a)ahHlQ_%5CZ?;VjRDQ-Ozv&i+R^xOZUsV+UYMt2jMD9U8zjn zNEux~1~OHN-s9yHkDJCLPb?yt>e;VE!hRMUKL%-^0yT+-IF4cCLvrPmRWbUs3GKzR zhGb~jdWKRTM>B0yU0F8l$g*0Z$|=$SWu)uV9fY99OfgjUA;l9kFaCr^C2HmfUFAMl^XcRjE_6`bV-tZN~50>sknex=qZ4 zi__GA)7p%rC7-kk9)d}lR@WLKXV4*A6|E}AX%FD*n? zJC8%kkOQ|iZv8M&q-kVJ-hN1LOLGoP`q$LdP*qjM^yyx|*uQ^&d_Eu3r%z|aiWLVW zWn@{7(aXO=-mg@~azvl+sfxw~F~eqBX%>q%d*;;BO0(F|hhaT<=J!?66w^vG*;M1L zGktIt)h#KS6JKOV4~#x8mtD)RX76X;1lU_Hu6q9&BZg_ciaHz! z)2I0O@h_viza+)zGL5_b*4|4YZQ1b4-$l9YhHN%%vAFl4cK-e+ZyGnaM5VFW<&Afe z6y_^^R$l^m^W7Bf?Ov6s&(@nf_fmp!V>Ct%@7>l{7A86gk1vXGqjj>gWd8AZj935F zWnz5f;XbauzJ+O%^!)}KCyvt*(LSf)0Q}(lVJ^D7nWK;NGiac~FMrp3F^?9sB!F!NpV3 z%)m<@0#B)vjdyHc6=ve8an__i@5_3c9Qgj(1e~?cvcvJreh&pIUJ6|+U1ZqT_*8o~6qTrcUxoG%i}4VpN&di0%G+nQWHU1YtNO0f%oyum+X`nhAjO#4os+>c9U4`R)pR-V3S za_90#m+#@pk3CV{6BkV4u6K6um-oHhK6}X&8rludh-yM13pdpB)F*rU*!ow4GtM}J zIdkT)e*Jpxyz|b^l^H9(m*u*01mF`vP=TW)T8x z2U(HHS2U{X+j#KOzcT0CBPkp{fM76#JWc1l$9~JY&AVxAYEKQzFZgh9enGr_Wpl_? z#ZX5QLu1iaHh;Q~rLQidz!H=w0kRbhpY0-a4ONoJEN_+?Dx)}SHc=$Wl*(PEMZ(^xyDg*lGa?1@}uXP~=m21kW*t8RgE?*pwPy!i9ii$rFqa zgsOn5pe(FK2tm%&Nr?30Ch%?x880ePswxPdiW$(U-nNtImR-maWM^bhADC&mt?phHb0tKd2a(?ZMdhZB$C8gcCQC?a5^h9W2#Svc)c?AB&dTa$zb4J1%f?3KD! zWVE#cqK){bO(ft8;KmZj8`eX#!Be&L@n#OVP^S3V-V{$?i>{Tf{l&NWVCe=bch`4b zzet9kG5W}4Jf^e+RHn|Dh_BhCaZ5QhMvOwAUK<)RaBF;B1!i>h zp;S8`|Klx!`4Ni74FQQ-32Dc@cm06h-Td^>7hYLjU^|W+^lSY3vSX!FPM(9TDh}|W z5MrCtZe6hZ^{wIf<{k7`eIA+E0|(B5dE<>Yc;k&XIzOLy;)z^%;f4JA*Iy=6;qxJ3 zIz07BH8(COV^d9x+>pjk=MCnD*S2-8bJIy>G{-Ien6A$B_ochJ`nX{%EpNsZaLw_< z`1{h`pDX332P7HB%%4VE&9`W;d#z!&z4W~&jg_-c)sNMDeNUxoD;##LwHY--Ls4P- z8k<+|Pjcd=Uycws7*ti_8*}}gWtWQwC`=mPGZ-{wqRxQ+9x*p*yw3GkXL8qH+c8YR zqxa@Ad4kT{FBWk9t*u;jZ40UbQzz-%cD+X;jvTHL4D>wik;AoKX+Gn}Xxw~l78m}c z8PgP8eMN)|&k6TP#Ti|uQBtf@Hno~iNaEUGWOn+!6c13i_s(qYe>g@mCH7l=>6sVe zR8>0+9jvlvufv0n#klaCaG#{i%Wouk{;|AX%lAD$9crDvAj@#cd0|$4W-@bnR}B4| zNBMc}Egz>Z=vhIuY`97y(f7?)R3LLiH&xAP3xd?vJ6v>mGx3DWsV4^c+z23%lPo@i`96?p2T~AezMQ^Yw&z;8u1iG`;sjW;hpyf@W`r@@l2QZXDYQX zrr;@*isg?z+E+q?A*Cu4#_H@Fgq$%| zr+jsPUVAIamTfi}VTt?h>=j>Ojg6Jbr&}pN76aydcb&ks6Kzx80D{x$plZG#?!I zeXlLYU(nU2tU_-fR5V248|V0G*yEC4EOXB9f)thZEgpO3w&ad&tE`UxDM;qP^T`=} z&~Vf(3(ILs^&NFvxvQ0LKlo{{9!m@x<;_}R~XwqHU<>X2!4OsHfDVOV514nt&}n#LIK z{COcn{OAD}>j*BcDG{>O5r5!h#V6dbyTn*4)^P{;Uy&G?` zYi`*|#CGxNK{Uxrb1_pX_Pn`-rJGh`sW8}8N$qJyOQa}&{R5OG0g9X2klT|px7@q1 zOvuEnq*EZbv@ul+lPwf5Y;XmNER&;Yn3kbrZrOe8CQUllkYzMkB3qKkmsLWNOfa6r z4h12tQBftCT+vsB9m$(us49}?d9r{2SAZ-b$uh!q$c)7aw+UR&Oaq~69%&$8un2;1 zQ7s4E5#A}6I(OZnlj5 zOpcy2o+~a}fX~-;>o--_^2(oIBCp9KSXHmI62cVJ$D_Eei))&gduu%%zAPbZ8zBVN zo?4Hi16RUP zkw_q1!EP(%MI1DpfFz?z5-H)LOA<0&_aTzxo!^ct;L|8nBphU~5{?kwD8J)!Nm37G zj^Yb@=_Zc^?;NZQgV5 z);D46K13pg=uoB^c9)W-=bgepStk_t`iQ#CduX58L?DoXrm8G{=?}d0=Eq!m<$d%k z%;GP9IFBP{jz>{cT*F0JF0tk)>t9{T@^_b$DI|uYg);LCe%AQ%rm3-yHxh1a!*Bc_ z_Rc%ZuBu-DpS5;5b$ZE6dPqn@?}QrKMG&zeHl$osYOXGgWHbxGP1!dwiT5f)jY$3;- z3(ssyc4mL>YA40^_IFoi3iJX}iYm+ZBf|I1eE<~FDWoPE7KjBs!Bf%>+gzCl;*JX{ zMA#9u3WxnqN+nGp=$+lffM_&HSjeJ9$Sh$q(A7t#EjTf1*+lY!#>z%wNP-ockYT{$ zcokw-w<~*d=SQ75kr2?DFh7X$CN`e6gG5e?<>Cd*KPdrv8JK<$%sAV8w2pI zzieSfnafLGIT?Uot=z>G_ilM*J30T@3O4@rze#ue8PGe{dmq2&7x_ou`tjI=rTSXK z-9OFq{f`Xddz!jA7H54h$~m8WZAqDALX1i)dh?mFaf4jn`TFS6nNMF@#-}eG?WcC^ zQ4#LDZQ{YKPknT}_u53$CR_JdT=q%h-!c(Ca6ys}T(Eo9^R+*knj^!;%|5ZH80C#K z5x)D4J(D0;d})07(f&)E36r8ee#zv=fAR^@aqZemKUl`4AAA{pey=Vz0YAj_|NaZO zYRr5G<5yaS@fe+4HurxJds|odA||$ZA*MtAZYD5b+zs*=Uz6Wr2$7eYuCzNeVa$6U zz?9yEm{{riiu2PLUz5*bYU#FM*t}9b+hrKj-cMm_>CVO6IHhmyKVsskN8;NU;_4#I z4R$f+{7hEw_BV!oda@W5(nt;d^JA9%4Wm^sw_#+67hrDepJK?Z5`G129<$A{)7E2* zfk)!!m}Dj}=1!Mk9<0rn>we*g&wd|6$n48-+0-3S9JM#+;mG1TK3ZJI5e!QzpJdq2 zriAN89A_)$ykwZhKQ)d#Z1NY`$dQ<{PM>5AwJZHQDLqfM3%|LY~ULJ_4=qg^iSgxZ^^13ae{?dJTj^$gaVfNT6z>3T!80lof@H zi6)jNo;M*ROBc+i>SJey&Vu@!-|u^Uo7!d9a~mRE&##Gwy(yuU!p;`ZUa(O}v2?=T zR*6&y6@(r-v=C7jLXFN9iYYuUNP&w$D>ZC3U|Gg5W`u%TE8lcnwK6AO6}?`H_~dw7sh*b)apEMY1if=nMsT|B475-?#@LfQ||+B}omvT578 zmAX0ekX8icYH%HNA&1K5aO-MO*#h(WH0gYfOun0bAP~?qVAkPn*nn@FF(;j!U<_@P zB1qvXs412^t^EC?sOPs*x2T%(+9dJH1dYPM5`xBfjO31fUf8yRFbwJM>Z7xxgPrSJ z7#z&8L`InJmNP%&Te+uJzlr8QXtn&G&$7 zMXg$`6cq>Wry6I~_gF{H+H6MPt_8a3=&C#=zBq=Nsj>DYtIvh7Xjs)6U zQf9@96|7jXVlS84Gk#c9YfgrAKH&Ucuj2e)ubOcFfBt^msQuhuRa z9Qw|~Nw>V8-sWGWy4dp6J>DayUle^$e2kGUK;u3Z-~7vKmmoBay~mP$9o9TPZFjjB z_%bG8_i{|t$zO}p9ZdiK7)-zQw!h2X{R89WnmujBob)eajA55!N@(T+)fnFp4fJA^ z9NRI=hHqw0ZhDnzDMe%2%WyWHpDR5?j&puiF zDdCz4*6~2`XChoZg=sGqe@5avBmVAVyesxd`Bw6w;Eyt1UWw9g*vwTHMvE2vM{Q zDMj`g;z5CwBwU-Mlmr3_0z$0`wJGNb8J`9LrjKk3fg=o|BTJom*FlxmohzUn3*k7X z1f*ELBQffU3dc5OGhSdkJ3>GW$x6UiMRflj4P8wg9AU+np@caaDZq9q8s-!U3<;6=@O}wX!q%V!)xsu} z!{tj^3BC|iVi6M(%O2f{*6EBPU!)=Sg8m+KcL)U!gfw0sN|W(C+C_+6TS;V2J(-F) zL@W{!mkJ-e9X)hz*-5?S4EgztxLeU$6J}G!WH$_rI!21okt#}?vL?sI&*f>88WH&9 z*S&-zB?{=5;7cgmxs%HJMl2bDSOsO4MOhF)r~yrtFyAL4Q3j4{PKaOZoI92w;{*ub zG$nPY%zY^hK?$%>M3~W%CfhPVN^AV$^P@sV@2)N$`Ncg5z(QanaD-sKkW|@aR5>p7 zP7J(|;Kj{EBMDUKqr5Cyhsb!0yyugBb`3U$)Jj%10-ByDpU2Xgnb9)ji%oRx>O|I* zQ==_nl~pX7IhVe!Ub^r38~v6;T{MXut1#py;FPdGurErTZoPj4!72XhE%8G>v#R7IGbfV9@;90%E6tVjas#sN*}Wzl{CtreoA;uEsy zH55!aJ|`k1M?}k69IvDgNT~o{D?+VMzGnzOVPQ!dDFjkL3_+!kR7sn-v~ir+&~q+b z)2uh=eoDJAjS^-oiBYxB$LMYTE#R+x%>Tsg-^(6z{udMT|K7Xy&xj)qb@}3Fre=CP zjlT;9G5znSF~K)iV{A7*4jhFEefi|yZSVep@roU|F^Yy;UWN5cV;a-=C&Y?p3x9d~ z{GNX~7xbwjn-vq9nR)4O#jie>xoo0&uM}QRZ2{_wKXJOZe2;s-GW-F{Ng+f@eJ2UL zy-7~{`#^;gnh^H%^xWRl)3a`(d9M(%e$h#%0>zkQMwFTegkyY6943e#+zoW7(0+i3 zj4tgEQ5S;Hc!Ah9+V^2hEGvG1meLrWy0+;M1x2-l6o!n^z{ms@KNu!LM)cv!kTh*? zV%L^!70+4TTV@?~l=FdQZ@GWX1FJ77bIZPT;D4Uww0HI%>vavH3aSGk5GD1>NHRcJ zqy0_*6bQ#Qo$%8BsR?>&wox9HI{D@V8O05jJAB@yZKf%0{uUA&n4vV~TF`DmLE59} zB0aKa7yvmr$6)w zD-#@c**R1lItO9NA!B7UWM4?J>dNcLb`Fq?MU7gPfl*)wK+*hMc zZ|R;AWTj+K`!phPbnzNllC&f6f`GDIj-b62>BbR_^~931kt57@oz<&gpojPYOGze; zEZ$we4thIr_gzFZo+QlW5L@!Y_hQ6_P$7zBW1|ycQ8bAch7?pdq%adexwJXhN#JRX z)C!@&v25m-)e?!skwTi1E&)nPV@}|@;JQQNtE7e`+89%7^Bb+Ha*Rq!1s;C7oA{uH zHkW)&HEvxEmGkFP*4T*OH;BmO5eNbu4smvNMdYCNut2zSYniy`g)jAO-KqM$yhEU5 zLm;TbW`^w&nbrPDbcFv4`Z&K@`lC1uax_+rKH-9QX>R1S}JSMsK6)8_G2fi zjgqazOODv6MicsZq#eN;wX8=p3`xjvprtpxMeA3OqS0Cl-}lEeSgFrD&~@CTSGi~r{31>*e6^i)Ghgk^1wkOXvxDnr!ie;rV#!K8GHl!_C7vbew*=a< zsJ0xU(jp@uT`U`^4vQ~S6&l5aZ5x7P1cVT1DNV;%t6{~+NGMYhG^8%k+WeIKLTt;B zI%E5L(kiM>tfAwOT2m=3n!_AYKvXLiMYVLSSYgn&((QwvPP@@3Y_E?nRDB4cG+Ls3 zkj@C79gCq*JSo7j5wD41zNj0k*NyTGQFtfs9A6V#V~Mh#>6ihjb39lu4$FMG?LISbb@P@0(+dxBW;Ox9ca#xcT!l@E_S7Zop2GZz)IRkAsJL5i7-T17PyX4SLKT5*)`2J zfj|d7T06t{Nh$hUgI!)jt?N+H+l5Z0%|6B=#OBWDfVxV&j$VSc7F51~%I6W;6rocj zJRIW%6sAp^-Rth7koCZlghkU=?FhoqN9XhCz#o2obn)sG$ssFH)GC2+qv&j*cn?`f zATA_}WdwqdFjN#IU^zr%F|5iYBH|!y8(CA1Oh!$dc)kFAnIZ{jJdLO>L&T$~u0B*M zhYCXQe8N-)H86nIAwrroF`Z76?;pUKQIC~~5t&g*;D`AAgXmP&oNtLzQpx~RriS4k>1kT@DsJbsfuH#^y*nQVSg;@SViopq99%ij z$eCcD2@nRTrk8>TCtlGjgCoUcwPGDDt-(VbouQg!{xtp%!7Hf8UgJ$X3mlB8rYXY& z2erP&+x(}-G$}KUX-wl4p)4--q6N;&j$!_1M{E*18tLGi{O(BQ!b4u)uh}ckORZ|% zqJC=ri_T-t;b(I2TX!ED@Q;9W$2Qu=3t}9{(a~u1RlmP{-$%+K*&s>;2&VHY1R@s0 zT{I7S-Ym)zacW%C!S_6$f*)Y3fC}FOKfnqVPNF>;#HrsJjpuv~P(H`(w0L}3PENMTZfR*JIP3JyDAIY&3v7h>_UKO?U#{Hd5}o)OrCrTP$hP%9Ntn5#u#PasLbc(7mGz-f-DnsLVXq#*&h_A0VVe zrTPd5MtWZfa+bgo#j3ZVyRJy0YJnw8`CuYYSX!e?&yN6MTSYC6L{^mJ?`o#7Ic>;O z*T$)@$E~d*YYQAdhW6Q!Q6$Q0Yi1mD_JP+_)K-6|?Z)Tg9Rs};f$dmj$ILw@Qcwqq z?R{WJP-96M9TH^wN0XJ(M%t00=M$*>h*DE+lu(9TEt&=g1zs73nOosR5yfqXQlcXf zv=FFb?7ffzp$!R&v=GuZzDDs1RN$dUrArB35U}&5_5*5bYrppjcXAYzQVb3bZe?u8 zt+Mf>9QWa)Ud?U2CV1qUv+3P=1Q2XrPk8o+>_raBQfr8=o4|))CU$7UH^Q zePj3U)j~d_>DXcXAQ~1(BC+w?>1|W=b|~uSNXlz=e;!6+)nEP0t_|VUlwt^H?DKsN zd*|$tpJ^zM5O>Y-ccwiC3!?`*r4THtkCTkpH23A{Oi!(IFtajB5b6m(?^uEZW|rXv zn)U7JSL{g;kH?ukdp1%^Iy*b*?HzAkoJb^?J9jSq{r$AHwN1PtOPXB~BPu|I04It& zYc>OpWZU|+G_|(U+1JN_R~S-hAOxNe2sDn;L=eO*n^|^@*_KNKlBAHxqG>CbQDz|} zDw~I>Tl5VnZZ}sPB_FARDUGa`R1gypG9`6_@<6&pvtQ6bh_hrKb!Q*c9>l`m3aw+Q z?(7$H-RYCp{Qik0&pi6PJXl6>wMKh7?<*BV5KhV0WgG-X$y4wl;+Vg)ySX=liO8b~ z;0F*Ek5gEni{(;EKs1K1E#t|8Q5%i24cD4lOOOy6Tbnp-siD_0{y(+akT4O;q9UFE zT`YSlnmSiRW0Yxy5E4g7LNp7V_z0d!kN(>lacznrRKj(J%9HRzupLCykP_N25)ue- zBa~Y*42V#Ql*eWa;b9Qm!E?1iO@n@(Rq$<#Fj_hrk5-~&4j37S2l;eqb)ch6#9V(*^0)*D)S{1!l zVhV=7DvR#OVr1P-=^PaI&&(Na;`(7oYkvocR4+A=s5y0LR3=Md^HyZGf%u$R)J5hI zDzT$Kq`Gh6>>1^YDu4XM<$t+su(kKUq~{BnDKPNZD(t~54Q`wYIsRROu#j#HRTwPZ zrW!(@AoLMpC}V5PBF0BZ1s=k3UI8g1uo6|E0>XS68A&o&Sw=@~3=wf~6AA2?gX7vb zmW``5uCI_84{I=wQW{YR&;wb>R)3F)M1K!>o@UKUK8GLT zPWUP-K`FTI<_u3hTcEN+^5K6^?l#i8wC=B7Ilx!{rxJV2M{m6|i&F5ew~r5(xa%)D zRz5ZUnSTHKk}O_ibI$`g9(~-*ud0yLR7;Lq7GeJ-qp!tHw`N$qZZrw};eSuEVBU0h z{$BypS8*ECn8xddyZ(~n?dNy#pC2pZe=i>$ANZE{cCm9;KzW&@r7a{D6`Z;}%H?0I zV86w~FQ!yl@xf2@a@(J>Me;<_)Ew}M50~+k|DHUxU@)UudQ>a*brxHmpE>GfedYI3 zeEr)4>@(kHFr(@1Q~d1eYTkX$#K}!B7r(nQ%kAIKQQau<3sA^u{_B@z9D0f~>NB@p zonzhs7CYC4Tyj-{(=Qw!={*)&!R_DAu5H;8UJpRL{3sTla6I&I=cgde^4K;Ch9BQwe) z-26-n=lybY(#4V)N$&sDGSc~g@|aCiZ;m%!^EBy6V!8K(g$oyQ!womk+S-cedCZ$P zkGt-=i*J4FTSGo0C!TmBU;p~o*|~EkbLPz9{`>Fe$}6vAto?zILQ(Yd7$QidKm`Rh zZ{5gKnLfg*Bn|t{Z9YzGE13p&WE{iG$fP!C4 zSkgoDMwY9*ER0-MI>v)W2S(}O#vu_WjJPPrMpzcovP>zMTQteF9i(L$j}|GJJ=6!% zuz4+3btUl=jz(iT`l4kEGMONL{E4-mdG3WgFnpfp06 zzqK-kw%QB9^9cHTizQ0}5gDP7DHMt&M-hZ$qtMtIg6IxNS)F>V_WpQ3Gyl+n)h(E8X{$eSQ#nJ^$0=|N>GxQW4 zR;&y=9s}Dlgkd6zc5Oq9SY~+v5NfRFpND}SA`9jcjVBF{vNeR>PMkS&h*X+*S9_O) z&Q_eI3vrzU0&v<|pk)Wnj5?w-$A|?4uww&OJWg!M;+KElV2G6wS9|QtA=oGy2(g7A zs)jwJf}TEt{yxIi4tgy?V%{w5Ky~|tATq_xE$(efQDT)is6vpE^!jT*EO7%stqj3s~2h9+fT_b1V*< zTh8HgE9gvn{QlXgS5BOBSOfdkC;0aL+fY*-MW~o%QM=$h^ltlKAhm6Ec-bxA%ARuR zHOak6sil2;$cqpAWYe0)eJqYT)5UrndTZDGEX@H+ohgwr>(=|6@s3XVcFf-6XJ2o$ zb%Y#wN;`#)Ik@iR&&>aPt)JiDk>!8>vz(`&_c-SCc2=)!q@jKSqP2)eRu*_@MS;t| zIDX!}59SF1Js~Ocw@35*`TiW|ym{g_<-?B^xa-~=|9)PA?q0>Cj~DpFXZtwqq$oH2 zvWBvx`OdoYo*eBRA;%v5y5}NH<8{C^DKm{}OyhOKuWuOS>@#BA@cRr`ex(w}8U4ci z+@~w}^rdA40c_mj^X+R=9D8~PPdqSVh?sfDh27+Gnx?h0nAK=ro*kVb|NGXMw3s=qmCI`G}!m_2GuV~`4x35PE!PnlhnA<*b1hYT;AelnIdw=;nk8U;%+au>y z@c3s>;I7pjtk^tpl=j1$dbr`K7A`q)E>UN^s^>fB?#IKMdbsG?7l=BNm6sjQr%qeI z*Z;hEYA0;f5P{@WBUp=9y=39EZ<;{_|XO%{AP9`|UI~ zHge;QH}bc?{f(!e9_JemII-ODr9NV9)p9uyDO?PDboF_GT7q$v)Z| z;~6Bd=gwm3+&QRFkzKo%U?784>MWLiM@-p?9(mpcB$G+@n^BJ%$Re~vD@mXvT1X;! zqsGxvF{lG#mW^BV-7yBurkqJzwjq6ry~Dt^2y6#iN<^s~ZO}u`FyCdOIE*Z92k92W zokw0o0Z55-#*Va4&;g#HQ>@YGAVgZFVoCqB+E}vIBr#AMI+KF9Y^t5)(Yk4M*G7QrvoS_#;!~s zgMl|B=1Ji*Be1ECMCl1Ux^=)DH;Rpqm8dpkPUsuIAQh7Ha_lG!Qs>60wOq{Iz6WSU zHVk+u*H5!l%$YxznX?+Gm{UjA4|w#Y&4pdv{o>#Sv)mK*TYxPkVcy5m)pZ)eHX|L_@<*4%mNksLIu94}C8Xdj$1DRbzYa<04hP?8aw z?>?|?!V1huarA{t=-c&8x;9-3q&GYj{Jv>@__?|JO|2!d^~He8{%wGRPH?E3EBWh< zd2aq@mT&&0f{7xuUn`{2il*j}{T4es_;4N#9KXz^EGbb6Hf;6@LwN25^RC!;p-p+2 zdH-+U8L)bt&)nG-haNPnR%!1H$z(JQGb|o_I8Q^p#k{%JxM@rFwP|e+N2x@%?+l1W z1&uQ-vN_Gh%|3@5=Ekn zskV-gQ{LRk$3N4@bw3%-YIwt`F+Tra)9F+HikK#4rZJ6aye??(47vZIJe!}J$tiE{ z;O_f!y#4HnM-6P-yuhygQ4O26ba2IYQ(XVE8df|};Gq?HRk?K0$fW%f&Hg4|hO>fTPcfaNE^6 z@>xwZE_mpc0tX)NQ1YQU;&hj~*^EY8{fgaulUI$JNfJx3tu)VQz#TD6oyHF?c29AFfc$xg=t7FTegfyB*I;H-335f zTN@8Q{4j5N)0@VTGKgY(yA%gwTX*yLd^z3(EamZu$f0Nqk;YL!lEXir_Kbx-YeXLp6#);C#Ew;%Ab%>l%&zys2k%~jQ zCr#nSRyL>82qCCEV6LB?RpG@7D&GC<4iWUHs0@vvsg{yn9WYQ6BWhO=ZSST!Pz>mR zPDdac8nly$Q|L{J=I$<*9k+jK$@@+?eZ}|g*p%PaQWnV;D)JugKx1`v^sK`^EgxL< z#=)K2QNHp+ML4pvC1UPSIPS{f001BWNklStv&Hx(?+1ah+zZwIO$= zO3Gl$JCK%92H7@P#{4uVB$Zm=Xh;i9Va%|7LW6^Z5CY|s^*z!#P1drRZJXy!<@02l zcCph6@X!Qdh?mc?ZSw{sCXPAq3WORuw`@fVkh)0LU@ChoZ7Qmar->#f1+Lc2^Fk~) ziinx#(}qZy z6wsA5YL9{K+Zk-@9#5(%ML00P;Iq#gCnMW7enqAGr)1_7;KYRP=4tfoO^ z7e{adL(B;cqDa^|y28YhYlSGOmTU)EUq!?ZnUhKrEG>J|+uZXf5sB1BlaZy-&cf+h zDW@WCF>6j$R_y3cQ3xAEMG_(oR?qMNgH}EZ8l%iObYb9cAC%$7R#SLYJU^mnHm+hW zdLT{M)k8Xy=2@L%_P_1Vx#yiu<@|aq*XDtTUgSUi>t_t4GHw_u@zDCM-0Q{TU zu03I0>mVP#VKo5rYGQ1={8Zkse=UDm*TuVj{yhCzpRc`T3CkAjzI{-FV+nqJ(IH%Q z-&Vf%mc0_V7{sfgasM~bwdw0X`_A>jH-2|z_N|}!P1(UyS$xJki(kJ~MMa%?m*z8? z4Dvj11WgMX}NpZPYw zy51O+f9D5jq=ZX9SjI`mkG_XjK2^YV1t%UmJpIjQ#<=6|+@z$8*6^o$v)p%k{i}Vt zCq&~6i!XkrocDjcm!JG^^-x>1sX5>ef6Owo(PG&Vk#S{I)A;Ab^rf7}G^X*o;QCuK zEI%&7oLLqZygR|QH)bX!Wl9hN&NwZ~Z*DR#*@qv?Gk>lA3Ze zPc=VmP6ab7qpaLAKBaUjm|Gn~3c-f&XJ;oXRv6-E=FFKiH#g(^!^)2B+qbiP`SNk==uBnZMBw2Fi@3DVVMvQ# z;3Zw)tfjNq)jmu_4Wu$$f6K!qLZ-OOny#J!zI6G`;g7%j;ZYYZSy#!SryRlqYj={@ z3b&YGltwfE;KfvbaycDM9aPS!B6r(rUcB|MR3COAOFwh^6HdZ?UI^aTbmKF1+irf4 zifjR)HF+J9nP01xe)RNpR@y&s&3Eq5=!O zs|8IPcOJfGL(|U}wDy(@L_~lbNDsQ{?QNC0Tpmv=LO=91N}(Bwch-IYmQ@@VFLpMi zL<-BK+XNc&g^35v3;u5Xg2zF~VnjB^YsWU{%2E-^RX}|R5<$`ubW8B0>6}XeHChta z0wp9JQV~Z}CTtQyU=<_Bg_O9_D6@qoF9a3>S6Vbik|dO|fOUjKqM2>Si(&wc63{C& zj@DF$MGq2lb{G_pks2!&LAZwe8H&Od0uhM}d8L$4Yq{jLqPwh&KmX|&5ifHO4Sjv6 zKUl!)9pFG2#Vt9d6#ZL-7hq{c&i5#^w^N}dHAq8539~Pt5tfaWs6^W~GUgRa%#=x* z!Y32>l-W^3COA+r)>RTR-QWc3BZx_#8 zuefbfPcTCwoVLx>z)`CRI^ z>tAZ$w(CQlmlg2>B$e?TQ?^Cou=zB+?SL-3Jo>5ZQ$1hk*|>8*yAUFa=DS)7vu)2K z5{BgR1y<+N#E)Od$^Y>dlC?&;luBp$_-B4jZ(kaUcTO%>ptaTG;*Wfvzux@~gb-L! zoANpJ?Ej%Nd2UA!-D|s;T~=#MiieimJJ_~OJRYZ~r)TdM-V5yP$4WoIm6Ra1(;ZRp`^Z+V$Ja`=1Z(XrubIySr)@OG^Af4=Ss|2qd9>+F$LNmiC* zn+DN@pr%ohNxecNwwHnC){yIdQpTyvqbLOj9oNQfe=;RDSA4OOGv3k3@2?#eYwU{74U9{^kJJ|Ez}py}Xj!@5*x1FKQ+&Uuy3NnNe>I*=7MWHdwTEOy1Ud z{zZ>iOpGe0-y5uas=(=Q?;JJl55K9UvSRY@sDt)*@jT7e?Ewev?;wRK9oxJ$VBH3v zS&bI={Go2QC0En<=fN~7GmU9X<8{HcH)i-;QF3|VdlFp!-4yMe;T~Tmvl=b>`b}4; zyGPMDWA9%+zqx6UH@zW7O|>ylTfE5O_jhFZ;Dy8HfvL3ScXwoIY7R)H6~`Pkwb8*B z*7#orzC3n%F0=ba)boG!xcjGhzWJBoQJKL$P5s=_FX(ugAk{PZy0U4_1HaAJ6*Alh zKqLW&oU_|)zxB`=EU1km1)Om}9p8OmD=lM4nVN*lEtee5RrhUSW5;;kgsGr9?&1ZC zygxkjKalfrEI~!grf+1U+0V@ZwvJs#E;n%l?fB!5XTgF6ELyaP+itsUh=i%As34Qc zjQVUQlNnOdjKohLTycb�%xepBtCXJt4G4tbB64r@}BMM<~>VlvFiT<7@CnbSyn7 zkmd1A`|4Kp!~gkV*{K)2NgY#F-8|@6bKTZ1R(|D=%h#uRm!EUl8-nP9`iyq$M8Q!+ zZ3jzf79V$1Q{|%hZ{6|I=1+7chtq_3DQt&P_W7$e`wd@)MX3qCqj$chT0RTV6VL?G@WA}+B&Q5~w`PP`~~U<`{vQZkgD zHKZKbyc(;jg2Zu05Gxw}id|cIMg+I3%QI=%>@k!FHKHXdMh>V9LEkavep!!uZzgMxkO?~G+=F2(9?lEXD)7a4cIo;jxEMhX5L&Pl{KKj zX>W$ER-DF0B8{`5JZ_XznY`J?&W*@e9C!Xm9#)UOrACvs#Us|k{>$39qLh?eCGt=g zl_XlLq8E_y2O=y@Q$yuvXoc$SA`pVu%vz$^USv+?{B66G_4I1`HKNvuU>A*e&Dntv zO(6);VTcceMS?6Zz*h=iDf(1^d(t8nBh}{Smi->xx~=Tk+@Wp#6?T|?S5kuU1;KcKt3cxa4Z=5vsr-2nwkk-HzYZBg;El z5w=@2V-DCEbC`{O-&n>aC(PyW%O7RGhO(En4glN)%sS+)bZ)*E9j13}Qr!5pZ0?GC zEB0FIvhkUKrVSzg`Ln4T>JIj+vw)cs%&Jm~DL0_%>nu)PZgyEpIO0&3?K>y;g8TD* zIp)r`xb@EL(6pLr$zx9zhDe!Xj&z5}ml7tLHWi%zuHo^T3*MdJqK{6U^z#E_pEeS< zE%5!xUut*WljE&ty?md+`EzYPbkXQ1Cl=j3%NZ$N_8>6(_3Izi3@ww*Y0i8{C;$DG zetz@gn#oo%jejCclQPqo#x!1YJo#*ajaz(z0RHet^TM9lU~&B|89wug-3vNe+QOkE zrm9LwN7qzKA`HS1etS!Xx4kJowCzRv*j#&KW)vwiXO_jS*O^hDzx*}N+uqm3mgi?O zd*<%jFm<)^Pr&12r(2FV5IBFLW!66CbJc}uKK;uw79BSHHJq#xH%Jslk#{PB-}WME)`L}IkKCXq-mFfhKMe(b&rw$^v_E}Ut**qD-tzR;&d`RsrC zq0}rIZr67Ar1;HEeEi@@*AZU|)R>4Q!<=z|(= z4R`jJ#Sn8-O-&RWiUa}+m1$O z#bDgUu8o~orjt7(gV8J88S%lH4YfKNN=KAO4w@@%tHF&^pZYfUDTVbhjP2yIG{R2bsr^E5Z@Fr1DS1c6VeHQjA3hO^Mx zc*rP2PzViDX>6^FWhxAnbLm`uIQDr0LIw;OlnMjZ^tRF_QXIMTFd|hJ*&ajW1Q8nt zlYZ78F%_CS{RtG6b6n0)qZQRBs=u zkRj~pA|pb=1+(#$C=iKi)mTTBo1h{PSV|)m=1IZCvAZKn`ih3oS}U{;$%j4>FGmH6UI$c zlYi%&wzQVstIxnKDxyAf+esbROquWFd>n(H_3-%6DVDG_oPKf z+X&)j>0*Z^i-rl8>Z2p?|j?dkvf~U1_%LjXPb87ND?O=6I}G(1mCl=N%%f9=XHfUR08?$H6#v)sL)A!$ZM_q3H!Xw-y@uJG5C-8YOKR{z`1*cu|CX?tRKx?fZdHf}@Zhh0J6sK6! zDSYU?M@OT{@{;}lfP6a3^AEpBH8$=DZy(!n34>70T(r+U=Usl##ra(WWnDjd^mLuc zV%ZiA`|aDe=;Xsc8f+40cD}G-DM}SPxPr|(pyPoDWh~#k?Cj6H6RImv?E~b30%1NJ zoOk%lvwPdKH|DhW#p>DB^tKMlGOd@${y_>@gdPYDIt+_G8)n2GFVI?xQe}>TV;PSR zWj;Sd#zag+ zbg}YgsAC=$lX+ymKy+7UNmOEtS$!Xx+lCHV`vF>O3cFgz(MBWpS{K)?g+Kz10#_-V z;&Cupxr|cu`yOr>Qpn|~T^vFAnsi5iv<044^s9gx+a+n+SeA`0bw(WvAtA{1BW#H- z`7jsNE=WVG;Rl5M1BM7IUC5ydAU&j#2_+0#CIKuIMj@lc@bQV_=hJ#yz1axK$(c9hD#;$=uY^{k0A#SO2r8O#*CjY{V zBMye*JugV=Y=TGm@@aY zwUDoLAmS8ceYLJ%xRCjw&2WhI?!OB)5DHBJ&_WZ40K3-4Zx7P5{i^MaQRf_Q&CZX- z26FLz>t_*`S(GoW7!;kV=it*$!fxuJTtUO!s=;7OryaHrM0;1Rw^~}GmmdEfZai*QrPcjG zB7N?LZ@tjj`^Sf43nOLNiE8sq<Vr*@8m0A`3jd@atWXN z+~;CWX-`8y38nAegIh1u9{Gm8&+cx+7*bu>yIQ$TouI_MDTk^3d3mkdq#BHtZ zI|Dkp6vs|cLH%kV2;c`lPjl+>=s2U|5}I2>s;hSI9XO4D9!!%m)0oCIUQ=Xqn%~`? z<)&ZOaMtO=jf?&PMZ=O7o_f|}*^%R4gw3rXSA2JXRjWOI_B}H?amtBNj$anxl27(< z#|?Eu3Yz`_#ka3Xarqa=HwJ!vLx%I-nc!zvj~?N8kN&~ z-u9;~LcoFhzr5Pv$*^Trz}LS$^*Lm;3T_BiwOKmR%b|<}9&Tx6-F=d&qHb zo4BEH(-qmxTUPo1ulR2n)$=c)dj8A)UXQyLcYpk7I?@H+_p9d#CWxK*=t=WBwhcag@%M*8~t$mdPDRb5>jhaP$;Kls59 z0C?)Dr|^BB(@#I0d+)uMnwlC;I_V_7^rbJ2TbB@FpoV-o3@UA#T06qJhu1J`$v!MP z>h{+1VIp}Prm;Y_y4nZ-eGc9b^HIEr%c`1*_ut+ zWYasOKtgB|h@lth2#SIVzKZY@QIH~4UJyi7#6lH95$PzshZaIeAiZtcCfm#GPJhbz z{c&by`({IefbZVdwb#x(t zq}JNaU;#`7MTU`6O=t)Vp;6*#k0#JFp-?5>o+1onpI_Sx(K@LUI_)9^j*tX}#)QG8 z`11V(yd@ML>m!{^@%|$pu)(p|vYx1S-Y0E766ZAg3l#=SF?)Pa{1L3v?@WHKm)QtG}d4(2h`7X&E@ zrxZ(6?DH`+7y<-^8HH8Y>!&m?OT2d|zjiB_CZec=x~!|OZ?{J5yev$`>CM|PhYv&egBZag?07S2>5@()a2+>oR5wXy!xo~Na)Z)x^~=TO zwO7}5kr@)m(UiB0r3-|eCKk=3ZSj_KYCl*uwrP9KP>(Aq^XC%?g)oKDjw^!={6ZE91!422#_eOloOr(zK=~v}6il+sedPx=0BQ zE=`U_y>O}V8*F%UIpgQeK+l95jvYOO`G-#9g;$o)7Htnz4dwaWU;b#mrsuL?$%u>m zGh2dxh^^b^FV;N>)7LIt>Q`Fs?ubMp3>!A=Gws_KEJyAZ8IwhIB+0***RfB9>O&09 zSJ(SK6=4={X@Q2%Q0T! z&mJ!Gd16GlK`Jd-@K}t&gLG!>?cqn?4>4sERH^0)q8uj({0_pGdzr{Q1@tcty*t8uziQkKc0$HSMT!LGs>PYk(Au@yH@5O z>Z7DsZn?gY0sMDhfRq`)00!{6;>qXYcswwFZs(VBL0IGH`F`$uILdze zD#GN-8(O&G)(FX@#OoCt_B9{xzBD*ztR@6J`CuvM|Fnr=leRNul1W}rW5wz;-#)#& zA8ccj%X2R#c=7S>eV}ii66BZHws6B01zdc2Gs~7+3>&JGOiHS29q#&l(H=KXTX21x zc$?(z%c9(US-VfmZEqJac%)9nWSwKr^KUZisL-^XbB3hF+wYMIgTYlpU8@TmlW%qLF5o7u7D;sm9%$;ZM z#Tm1P67VQf*rwkN;)NA;oORDqwf&Q;dFB7jVfM%Z^8E&hw8QUT?_0v&7Y;n|KrXo8 z0;;R4u`G*`BS-SmOE2;K^Unh+^T%zs-Nr9}`Abed`DBIVTh)*MZCF;jbV2Kt`JBRS>y?ODX}LI zoR*I;1a87++_V~;C7W=g38c_KlkFLl92b${ho!4hSflG`9upDFM=!{SPyjs?Km)W? zM+K8;Zz3U}AP>?OBG%p5yVE{^X~m(ThQQd-1oJ{j0p=Z?Fpa^KIJ#Rh4+lhY}nyvil*{EJe@DBRFMZFGugtcDc|XGM+KCd*fun$%KnC z;*}Xc7;eY)001BWNkl+_nvRFope!nG{cJo&sgq_Bqv{HC8caUx^JjA7~0r6iL{ zrca;F2`8MuO*h@t_l|oQ~-7>VhyJe+5T9hnvdT6NAjb?&h#GT?Inpo zq`~EylUgYsZ!qg94;z-LdpTU9QCj}_Dk2U!(8r)s)#oWL)Hraz&J#zI#v3_P+LB_8 zNA51>{)b~El9C&*Dqz-342mu%TAdeq^Uy(AVDR|<667IaG zjc1-u@QVxcd-Ni_=a0o)bXhasIIEt5u*QRbDQ4Q#o+rSbc|O6#KknOSXz~PutyMOE z`+H{(zJm|&GJdSdiq%%Pb$NLqMpYP$9c8feQ!Tf?tW@VG=Y=@=_&_d9OB1kuqs1dn z#E=rohZ@}Z+oDe1Is^D>V^5MYCa^Cs0T=~@fH06o4H{}uCXOEg-F4&x7{CDjD{0Xo#PcE%t z;riFRE$=uJ`L$c$>y*{v>gU$x2%9Y8>2_W7CsnPCz4CSTsR)y{B_D2X#&SM;NYvwx zKhEo~zfMI(1yV}3Y}rC{bLZ?(FTVI9OO`BQ)TmLkw6w5({rXNJM_FhB*X=OIkeLBp zz7&kpy!aiRO`Er~cGI?^H1d?RX^=DwEJMfDb!0|)VIZda9EV`qLQkgfx{_&zk1^f= z#a*=OKF5KYCgBwtr5(&VvC}j>`w~qH-#snj)v;44jJhUBrD=F`8Sj0x4!1Q%)#mNg zu3xFO1&udb*H-T+^7;*tNKo_Mhx)c9OCN0Y8nPjk)Z+0tQwxjbzTZ1;UFqSIo_CX$ z>%>xdrq@^CxRmTzw|$?F?s%ra-M$6QkU9bvAyfzsWCv-va3N43K6Eq-RdHQAKWRP9 zu4@^ekFflsKMwU*c8mq1mx2_QviKB^(|BFBq%4bJr)JM9e;mr%6Wk{`#{wt19slE{c-D@H| z26o0%CT*ulxoJS)NY(zfbVx`W0azKz!f|aZJAt$%c3jN}JFz(N<`yL2L2JJjq(s^_ zR-{dlZayQE##+PG)&H*Qj2yR=y(Fbn9!ZY!{lRh&X$ORk)EqRSA%X#<*NZC*oJ1>b zvJGMAXu5`*N-HB^zj_ZCnQPv4UAxV(MAYruzbyN_5Izq=>waB%gvJ<;k9fio0n?A3 z$qpq^8NJM=HWCdjT2e|)pwwDHp<_g%zEDz9lwXFEh)`;JXx(0i-}GkEp7(Z*3H(B5 zZ*LwSRY!R4mVdJM5eJBZab+_#uYQH$_t<~E@%w0o{=TkhrKU&USK2Oh>uYe*Hi^16 zS^NH$Q&QD+hb5M8(1-i-@Ob-LB5L>BLEVQq{`$9{8l!eX@wAY?f?^^pAAz3l;kXS^d(_ ziEMuya4T2aKY99(i8oLGMWDQ=&9|?2u+y+(qr-2`ZufdSRsXLc&5BThT9d;NP_25|IzevQ`q?`Id}cWa|8{^#60{^#7@otV!1ZXV}- zw{NE=uUGK!-95MM0RB6$yQEA$a9ZZ?06Hj1cY<}mi@*awH+QiC3}68NJt!&ey%Sjw z)+op%#Thna*HkIPhUh!p$L|xlIODGHcsj2eKi0^_Cx2cj9NfQ|uHh4OhEM4Ix2;}e zB`ZI*?naT`P&VmS_BnH8f6A_D?QT??MO)IQE!nqE$kwLL*^uhn($u%5d)Zo{HEHw4 z+C7&JwW+CzrlzJox2dnMr@p?v&uxUDbM7TqA`@u@l0hC1VZ%qc*A!r zNjpf|2W%Q@0PL3#G=dZx9>SWAuZIDYbkf-ImL3OJ9>=Dru9={8kP=KZ9Mh);%n2K5 zs==e&+KeALYOvHt8HqHG=|yQ?3=v965lTAfnve1+6H|o;jk$ZvTdU@N{Nl3F(L};m z7S4C(oON*X$OA^+xcb5HZ{&8+1!m3zHbXQ?DHXvXK=XN3)}oC6Nc)f3jUkI+bQqwc zh?nfya3$!fe3?wC?;Xxj4yLZi8VSNQRl;hwJuD~N#?p0>@l-Bt@)rStz!ri}WQu8d z270lE6;F~*$1w{1n6?);6~-Fj!)OjbEY{g%+0D8Xcer9*7b~40<~pQZ7sqjMX;0TI zGAYe<$H8>L5CRQNkuF+>l+ZLZ(;y{XqOOA`1o>!aQsOqY0AQ`zfRzbvahlaVm0Y`# zMqd>+&=ygosI_?;>3XF?u-nwWc0&^_DGMnj1wzk|7m5jW6G_sWHs{DS2SHk>Kr9<| zDm%5IP)asa3Jgudi|BAVMW_GLQK4^|KM$cBXkH(lis4wb)wpdLvdeZe?I{qtiBGzi z2&9YKoJfdNulkq{Fw`}ey+67_M-bB5pXJg~gtj3BgH10^M)jiXl?A$JH#D~65s(h~ znnBQ`(_fuLP}7*<%crt7#_|VV&?8=BQo^fE(mW=bkqNQO5}J;So3e2&2XD$AU0}PT zONGfuUy#z`Aqbxj;vJsvB4<+6D>iQ2$a&|T*U#F1cHHsC=04Z|?$t_u_iAOY>wo&# z%3jxfQq{`7H!l3FRqKqIr|(U)_ClJr-kyrEaq)}R!lS=0zZoj(e!WcI-{fzf4uqq8 znUEJ0EPt=h+zA61z#hS89f6Djehz#WrPAD0jL-aC2z(4&13dQ`>oR}=4B!hyBJP@% zn|CoI%YP9pOZLc~xM}P+|B-50`QEOktJygg{VTn#YOVXH%-1qpYd-5<`z%rKUmnzN z=+VH(wrx);)jN^&Sz+5Yno#Dpxgmx?Ng8}!G$9BGK|s?PVtSP^DUc$gD99==BzUBn zLn>2R{?hdT;Ugb+wWR|DBD z*?)xJs}vmB&=AAOm;`53E*+Iw+46NwDI<)`Z`C!mohH<>43W|o@gqzFGX6K{8k*>t z$P_{#{9cun=?g+O(kg;Wo6oH`Mwri;nCpEa)aJOd%+b@QJo&^6ljNI~Ovj|$vN5Cp z-Bh7pt_$dpRhdZ_5(#wMCO=E?Npf*EBH%^ny1LF%DmxGw2%m|xU8I}Iu%+o>8hC|< zw@c_&R{bG#J(p1`+lGcFDAH6HGB0y{k*h@ee}SYR>um!ad|uRF#>xi}7>K?*rLx0^ zjEbdCdO$;&_zHn*r!ag5!VG|jwbw-x=q07-p?m_72q7&6t|ok@N5uLno6J4oy1CFh zVeWdDS{I$kq#U}abo73jAFGlCVclSwKg3AaA?`S&qc%;XNlJ+&-CS1mfY1mCjj-k+ zVEFNSG`vE?^o9_cj;Az?-IhQ$M>9s+1E!+8j6oAT6pr{FOhtjH)oYsdxr3fd2;U>KnuhTn7A-KGNmwB4z^50*it3fu(z>+yM+=0RI8J z{D%GHqGioBUvxdbC^Xi&uk^HB+RoeWJej)k^Ejr^gjG6R|91AP>r`IP=JpvuJMDfD zX&|$}TS8vm;oVF5l0mvXItMp4Hr^G9L|*+Ij;M_~X!^`;9W4?v;WDHw@OpCNBv-nm z0U@RG><|KPhuLpeN@5w3B~NJdPvj5MwiU^dAtG|=d$a44nXnzdM}-YZ38sP6w2X=( zGqiFX2>OwB3Omt4fs{lIlVoeu3O?9QF!L1D}aZxb2D+iBcB@yqWDgKo{Wmf@Q0;(uOkXm9~>J?9DVF zSdQ|o@p;u?*LHTU#1W!@M2irgn^(-Ppg=PaKx1`$MdH=O)#X3G&{i%}5e zAT)Gu9!@&mX9{FAqwn?I$`xpa7dIWls@Xv&^25{-x<)eEMsq5LV_OKXA0dP&$;;Ez zy^wre%NKrc=j-_kMLRL92|*@WsGhjq{OijXoeSrhIA~X>$G17nfu*MMRBbp z!e?TZ7UBqj+t`K_0>9&sue&YV8Y8P6SN0v_wF{6^3d^#(OCVb|SM&0(KiE^p`9hFv z3*gI}Lo)gn(6DZ?^~jB9wa(k)$8iyk?XKx%ZS1f2$19(EG1<4Y^(%t6-re()HUF1T z*XZ^wHy*%$9J@lw>;*gwO#PhdG7I<+xFPem#~$U9PS@6!V^p$k{l?ADDA`OlT4IMh}LH0ZMm@jFa}U@5CM=^>>p z&>mi7E3c4J(?dgZi$_MCBMv|Jpp*1}7-b$j#{^6Lj6Y)H$M!aDYCN4n0=lW?30>&O zjBkwNf@!penq-fWRj&Z}RF)&9Hqd$<)C(byrjbbkl-b7YLR)3LYqEn|DKlomJAM$J{V@M7go_y+yN(WSWU)m;%Gh{T8X& zkVtnHpm>xLNqW7|lVNWMaxd48rkV2z5?+r|Fny^YaZ*u54)g)t6TnHf(NBwMaBbYI z4^o%1MaKNuN+oD)ZbM3mw_pS=XnxbHYwqe)Sf^Og`$tP_)&}30A1o?x)OR@XX9nj`&rIsM;6 zLxc6ivgOV*UvxbN@P8BiC1p+q7684v9GQMW#erT%%<(dKs!6a^!xz?Y(voCEQoqik z`V))FH1uBKbPdrb>Q#6iY=+x-rpIY913jirkToi%h1JLd54$187YH zgd$?HN{=jgll`25j3<$Xj>wQYexYO6N5rx_o;}Xy`PuGAe}j zva-`Ew`~PL_j`+UQ<;Vc!$3M|rLgdHQI|L!)GNufN&%gzYhUO}mUJUeG_5_{CL0c7 z?|fcHCej&WVuAQFs6BQ91Hl2p&#Dbu#G6&s=$bYLk2%JdwlES&zHWvX;`MbJ!*}xW z$+o@iDAFt!Qr5k#q-87hm75{hOdZ#D&^U=LkxWXM=Y%p~K(Yz2|j|aUahK?dPG%~!0CeTWYkWuCT zBML*vv<;DL*R|asx69ASsp&e?o}IVpggn0@EnSIhjX|GLv7-A&4P+*>nb7q1c)Cm| zrgR*ox=J|+2{IhQYHY)8Zi7gSv}L0Oeb}1DdQE3*b=&B|(z46f+Lw!DY{nmqM*)|7AS8b%_NwO_)Cht!T<&^fE;$zIK2Boig}0lC@Spyym;c- zIIgQ4=0kacabrx%hxV*8X^W~<*W0Qb2AAm^G{?)BQGGwoq*Up-$B#AHYjThFB>*g6 zWwBhdk@PeX}K)jw)66KhH>M@F@F4bN=izot*vF@!iB_QogE;Gii(&x zaU!WyiX}^W@srmw8HYMRm65?rC?t@z(~!&?5_ud0CXLY$drxnnackoWh<3~X&^1Dorp2@&Yy))S$Z;= zYlJ2cw#9qzEv8;N#V+#j?Az9@jpM1Ur(Aew1I%p0OwM(M>#EQ`bnm?v)&MBdsK2aU#;8!Ldk=83xi2PIHS9U%LU1>A}%-EGfy?47?e`<|HnDG~}kO zL|uopl<2xn01aOkg3y)F<~mr?C0{r3bb033^wJs6Y?ef#3xTP1Cu6fevp2Xvn^ecP zrHhkQ=Lj;X*OgJZDKrdS!=q{BX$EFEj9C;?nda(Ra2o26^)61k+tdKMV%E3!re*s8 z0YU!0Wi)KK4ruuFZR?rF9qxt2L%%e!Z9QUZmCd>hy_0-XCYfxjawsg&7&oTfB_8PD}dkpzLh`xwT+vuF5njzbxs|4 z<_{W~v#*EZBAp#IHtRRqj3_tw+wDcnn%VAEvGDyAC!bwU#c+eElT22wvAE*;7S8=v z9@kwS?)BJjy_@9J?>4aCK3?8`rL4zonp<3sJ-wc-RW_B&hBB&R&kk7rdP$Vm9!gO$ zSw}Ynm7m&N^yfSd{D$h3Y~SGU%OfMSHM_VrT=P_z8He>wAaz7KDS7kJ^rD(7>q7v- z4L}rc%v%NV&$bJl*tkP=>B)4-8`ShS0+)*UzA zcq3c4Zl$TIiFxzp@$;YmoFDw)2UJ!n8=dQ~zn;SnKb%A&!P>QJIsg3gdn`xjMrWg6 z)U0-EI>B4Z7qd-wDIQY7&|$+VD=#L$D4*@EG2UIep{{mw?YeSTUs)Oq#48Tjd#lP5Mb&^$3>G4#1hJ1#qY^wLlPb{ zV{EHJiE^6J(F1l{W!$ys*sgJe3W{)ln7Ed2FUz6mS5ev_TX1R7< zrPvgy!BY^Nr+W-v$2RCWjkN}*nag;Dq4!P<>;$=V+t7(r5t@edn%%>+bWN#%^xi|I zzVr}EW#L7jr4!_7`Rd$i0^4zLl4+%CF?tx_bp6R4ji7sj?Is0@Y-C2|AwiwP zuL@inE85suB_niRCX;x%Y^d)j)ROQ(OaX~kp`sg;CfWnFBf$UI!Ia*DVnSl z4iJkcKuED88P(UeHc>1LY$P5b2nn5#;X%)&4lmSA8d6CT8hC|9+_BMt3U3f^hB%5# zhaKr8ZJBj`&0wh4hhOLN6u~WViRCXev04SsU}kr3CXIp z7JE-IF->)yU2|EOhDMhwu5V$*`$H%!P|xeX-5=$~+ge%v-r!!#wrx1#*s z&Y3~3`bC(4zYFnc!-?OjXYt2r-uibLUprt=*`f|$0DBI7jW`aY7eZ#{w}YH;M`54J zn2y-~ahjH`4(0oL2$#2a0K(-ur!OdG`k4X#c}^42x^55b*}y-598?!0t?^=K-66k`86AM71@*QNRy@6Z%osc;H0f z<}S;x1@1y!3wsKOWa!k4+k5k`<+W^Xj5GcEw^>`OxngA5_)$T$F6)uz|RJxE&WPgWd z982xap*7 z&#vA$y~elX3hjMeSHi|)b|@_4HS#5GN8KC3Nk=okK_I+7&^6_EV!4Q{T0}b7@n)h{ z8_71EHcgU7;z*V5+LyL55=o@(AY2zGmClhej+8{DO_S?TEOc}sNLUuaakO|crEk+5 z%t_^h$_g+McvjWZR^N7hSQCp-<_(}3I*DY8U|}KgXdBzp2?`AlN!KCbSWsR{ z-k4&%t{}Ogj;fj_ya>|L#m;0pYqZmpnVwu&lXM)a(n%5lFTOEjA)273wgG8Fp<(Wn zn5?zaGzo{`exoU$Jd$8>A*Si0uBDB~UtiL?Z1v{mBMzEYe$v4+^?+%jr7fI9id0QA zjjPsCwPHKeR8yRCl#)%;F#KVx1VDE+WJk=MJC`f2xPo`yd51_O!ViD=L(Vwk3<~-S zZ~y=x07*naRL(#Dd@O4x&xKvUA>)fVZJ!}LwxpWTB>^rxY!sCZF%JFh`&f?Tq3_LL z+@K%=!P?sBPDz-+$l}7A)#+bJHvKIdc*XmA|HT%};>D zx)1FKx2|@s8!<`m_YBXqC$|!7l~^gs)C0}Wos>E2)F5Y_8U$eF8jGp>SM&0dgDC5w zetGPvI6u9-nfvc7X3I94UtHb7KkqLgKh*nJaN+w&MpYQSs-F8oen{h^H+m<00{+hH z7k`}Q%pWwcVUx{2?=R`J?QidBWv|H|7JvL@^U@l?0NT;pL!uOTuNU1FJTTa7q}_&y{FO1UZ?@{WFX#; zIu_F2I|`wQq^}zKTkj8mjr}b1ZdAzJ?o6krP#MCqxEJ^~?J>3<6mioZj6xAOT}he$ z2mFgYOUmpA90B|pH8}bsiuk%Hvwk>=Fnk6Gqwa}(;IDhI4xbyIeIY?np~j8BD&YQy zxAX3z6bJ6t`)q~BBlyj=1w8j+oWI-`<>qS&xa;px!ucAPb|G{^c^apFBhX7p(Awtm z#Itc0y*8L=RC3=#F>bl8GePjuYf08`w7KT8@aIO#Oy0lq?J{<{K{O&sCna9LAQ%=* zoW1MnoVI4k;uoy9Q<2PlRy^Xz%sgXSfA)QPSq*o5b1Gv?gM7HTrPI1CjS1?bDF%mo zwG-q0%H}@H?^@=bhLn<2Dn&Zo-r3r`d2|2v)sTYDp%AW=)H-RVA3Kv-ryWf8G5y$6 z@ABAF?-Fe{Ry9!1@yoBi;gQR)yZj6rAxxob=7mQtyJ(&=u5LRL*9EeBi&;roitbP6D&ka8l;q+9Bh&x>K8`Fb0CW!k(`j`9r2 zqxbA719Zy>r0HD-Mqk$S#zLTZ12|S3q=PU$=tGBKpX6_U`NM!sdxt8D#P)mH_u}th3@U(#>n7K(iLHM8l~A6Pn7!PCQcCI^izZz% z%O7hn}Q7<2T>qDM@{8tPgR+8I49i79P$6uvx z!7}n<0eoi0=Sb7gJiWgQvRJ-+ImaJ=Jc&dCfcx&dkLR9yjyZGYuyEnR-MlzDV{L7W z%Q6!T<%K>r-#CvWrVQd=pVo5h9g9iZF4rADf&E79d_v&71)p~M9#1=*d*Fy&BV~MH z7&iSlYPa49@#+nq+P`_?w)iPOy(=`czeU{gS^URp|h}yy&g>e<#pQPj>9@3OVqiP`?Y`{7x!I$N*Rg$&=?dG3CSnT9+dij4=4& z!ZQAPNG)}%x^?D$jZy`C+I7WF@NeJ>+6T2A@f}n;?s2pm3O|lg%lr!X8L%$1Jc%M( z{?^NJMrMv7fS+W_uu%i%Y`WY*z&H9R17HZs;P_7+mW=_v2He-f_9C9eqw<89*Xrz%7BWNm_5_W(ofZZ zd&#miv-k1jWVQXpqff+{INoIHB$Knx2y*uSG;-rr;aoXwQJ0@w+Qc&tmny%7UBD+R ztm9GFbtfd++zC6|_tga{CeJbP`gd=(`l0LNEo(ls8c@WsPH4#43>x3BQS00Z#kf+k zr76*E-TXEh^y?#uV&#p7+v9y2&~+9~_r{d_F_Bi&M?c#&`tApF5G#pA_>N=1W6sZ2yQ zrP`5z@Of0&RDU2{+*DhaMIBOT=Q6xx2$*;Zye4RxG8?sQwT;)zrE2aJvLry5U&T3$ z46^3UfNdI7*)~P4OF^$hS8pVk==87qYJu>0`c}exIYlxcC3dV?IhO;{O3|{ZlBCZ^ zX<;ee@<9;rBPxQ*|55X@=EL-fTY2rKQ|DM`DF+z6&m47t@%aj4J~PUP>iqVG0#5x-10}^8Pdrev(|w+OA;D7%N}mi5__Cs>Ue{~;uq0__EKoJ!O?@|R6ne#UA zJ5)GJM;wkK4m#4NE^0vhvt2w+0;om}>MMa}6hTo=J1H|1rTFQKl&J?U1KtIeWtLr> zDX%9iKq)!yLJ=QdN0Bn8pooiKqsWpEP;Iv+v&}gul4}`oD~gaQ0^R_wLXjAEqDZ2f zP(;n&QKZJJDCJPsskyJCh^J41=_qn!Z&ds4k4ky|Zxn%b6YyT9Z4N<^F-K>9e;U|< zYR9gWb{mRhdm7jRTn$V>kxDK~S+Y;2E&dm!B*~V!y-S(nfGdI5QHIh7p_ERa1?QsL z`300J>nT)d)O)D&vj|0;RG|o@D}e|4QEnmKi6R|EP7Owd^*#I<>---@)eeVO-%9f5 z+f;PK+20Iu#7Xu1{-(m6n&}o5YHZq~JOtti$&kUjE`z=Ip(tmcp?JZ0hxjmbc>a|n zCmgM2a4x;Ng|ki#GHJZYw(YwX_uka(&PP2rJ7H%@CtrOq$-7Ub_|2=k7t&K-<+Aw2 zQ~{tumjXpF=X-tbbNaqRnK>d%(5o|Jc$ll6Sxaqe=j2DDO9DJ_?sTqtW-XNs{Sp7| zCLF5(rEu&7+wQp`lgVUG9W!j$Fv8(5O-;KN^0ln8YO3q@(s6(OgMOD|>iU#qeN^)g zX@5rwAqWf#;UY=qOhyIu2IQ3l*|BB^58i%1)Arws6R$iI|Ijkltz1d+qs6R^G;#EK zCo*zMnNr9k)Vnko@Kd(moYv5oF^7Hf^5RgF*LW<1GqlJTWa{@%T3Wn+(btppzNq_@|4O>0`@JOA&5R|MkIaJm0Q5BiV7<;69dp1pmLtb3^dAb-N3?|B#b)l)T_ zLN}Y~C7IeI9xgJKZYO3st&osRcaFg{l{u}<`s#F0cxe44hrX;ZbZ{ib;BvgfN*L~> z@zh1pnj^T$9u#__!{06*M|2>VUCUM;GhXv6VT>%D&S3`mo*-c}fZNbOvZgAh8j?sX z$0jNyD?VLG`F=q*Zi|vkxEwTUUp`n{&&nOu1dGCmq7Vo{>!z*bSJ!j;KI2*67G>W= zt5!6&L?1qN7)v8@Y#c2=5Y*dh8(8x6hh=_m!Ms>y!_Tda+w_T^JXUSqO6~g1Ys!b0 zeA8X!UKm@vc81V2v31bmD;=|Fr1!Cd=&uy`%$boXbel(1sW7LGsT*XS94p;RIr zt*&pbD%7+IPHn3QYFiMxi9p~;mqx!y0ma?Q>J7&na}2KQvS`uH1<;8^;@7BtZ#&Y_ zi96fRV`zNuz~O}b1|M$jTfNyAPTgk+=N()@NuGxtktAo|yKLt>b%o)B@_kOBZtW-> zJGOnD!^6LhS-<{w@1A#i647S&L|{q}tMXm9=cFzDMa6J~L{c(mmbcHaB~VEdTo?A9 z^4Umq$A!u*ov+zgyl>@@ra@_mMr)he?vA_KC@$(-Nj-o8d|A*_@8+7W3r5WGa>Nb0 zK5!VeuSY3vJKRIza-DE_@13f`3WJmHDdvF_xbgd$R2-i0dEqC!EgMJXjZVl)tlJgTqSO!bfPZF|9k+{RfKu1o4g3K3F-lo+28w9tihWR_E~Drk;CmG+ye3N-^;vq*>bDf`Sb_H5wzb&ov`rn6nFnJ#??>cGh)*28EyXKrr3u1D)$5wffr)L z>?g?|(&sa5(WYkZdS@#s+hx^`D2=hs1E3K_eqOtH4)?#ejay#sZ{*=_!t`%LDdalA z@Auz9yVp_<@4x>(@4x>(0GD2RDL?(`Pr2~I3%hRCCw_9=A^#{?vi|hRx{pvM?*}e!{HW!1m(H@8zv`SLTd)v(Pjl_n$Jn$TH*jJ3M-%lr+{v&@-7$0EFSe zwJc%@YxCey#fvA;nR3Fo*^@oQTx`ciTfZ4;XiWUtR3?6X5;f1S!j7xVPi8ue?(-90 zwmLsvfF^x;CTzLDDO$XKc0Nn};4gKIqF2&;odCTJ?svJ~`W45c++v z*w>WWk@#D>EhdWXf|2r_ZO^(@4H|&vF^2iG12`eT=govI0m0puo-6ZSk1`?7!lMj} zdra+{&Fb{!QSR?C2wg{7X=0@CjTlTw)375evD;dZ(na(1^1KmRdm7`6!LyW7g@JX1 zp@X4y&Z^XLyDzDSOrOvUY{Nrk!&ZEn#$bN{P1Dgbp>-a=mtiwU5t>wn@I=|Lu>~!i zMjxl8oz_-Qw7Ho>_n*l4K_%4fXyd-h%@iinOrAe+)9Xu?kE*U~98ugfoI$077#Z9O zt`NiX3-!awhLbmVkU4Tt`CO~TFj~qh$T$2LZZpkW>Xytr?Y?By-M`oK!(mE;B{Zeu zRGSH;ZOPEIP}|6l2iG+=g~~B#Jm4pDA0N48uW-p`drfpp-Ph7Xha*>P63OW^zCL-@ z)YWEv3!*NGlZqn^0hWd3x(t#&@~4lc#=}R%AEJ$a+YuJ+w-O`d|K7U{qJvMWO0Ct4jaV@ z)62N`-EF&G(6p00YFy~1emTK0hxh(|*xk^jU_kKK-}Py8)(w^=sjhV>Ezzi}clgzf5&r(?VwNmx z@8hi7U@@w~VEC}FkjeP~{!gIm+kY-_K*t5TDLDDAqHf_v{lU=b9*+Fq0$#eZ1=ohq zV4X7_D%oim^W@|G>~%_j<&SrpoxO}*BV|A-LDmCPyDV=+`EqncL1x_-g}YE{lb@r) zViwU|rQzWez}v zA*E1ZPGf;#J=B{_dD+o<1T~l}q}}_cFT9Q-zp7CoLQ68=lbLn>#X1xrL#C`S>VD`t zLXh;F@KvMpkfCFkRW-_t7u30Uw8Od&QKX+2)mB|mha#m$q7+75o$1zQ)_H)xpcG6e z^-#{222#R(4@Eij;Lg(Jd0+E!?}BKbq|Ekehu7aua{K?PXtbl|`#AT4Cbm|o%uF5O zx|zs;F1YWZ7<*4KDK2VXIqwi3ciz)RO`U^f!R&oJ-2bpj@|H}h)B4Ecamq^dosu$z z1zH2`{!=;V9?|3V{N`gR{`#{h*FF_y!mQn!_206}u`8E3_o9ea7&PHe%>LF+N#)Ir z30_^@(Brz1#R1;_`TqR<{VJ|{X6B^QDwn!e!k%D=C?O5P1{B2u*P74d*cb8&}iZ(oQT20pWm8{P0`z2o`jn zIZm|3S@QOJiiJ)fb72b2z%O)SkwlG8bAEEt<)<$Z&Gt>(9(adDJ1x^0qwv9&Xwq;rHNH3?osw4Y_U&g?`;zII;XW(-Lz9VvJ10sC@AaVQd|mUv|hS z@?sV^YqA5E1xxYG?(QMDnc(52bre+;^3HfZhBk8TVTT|`1Bo?oNya008pogigpXqL|pEz~aP_&{jh8qevN#^S*o8Yj)>im05 zFjQAWS`IR85paS;JTB=(3~ye$b>2SH$KvyvB$M5ZPKyfyto+~)cvN_i>q>4mG;zz) zKfJV~?WqrZqx|_8{sIt!cq+!PBRjfvOnSnkNt3w!_S?Dbw%hvcB@+k)j&5yjeWCOD z4}XC2-0OxHSJrdX9?0mI#oF5c&)#{5*;UnF|FciKefmtwr1y|Y51k;=`O%9s0TD$- zswf}`qDV(XRGM^@A_1g_5)%l7k`O}rq)h6}WXheH+fUi=ANx+Z(=rJO;OngC8OS~D z?o;kLd#|&;YsFfP?l(qL+TTkBY5?5UxW%y8o-~GCP;X@66d|5qTemH>qZbDyPdM&{% zzu7V7{=LO(GgEjT>_5#%b4)U7guzX>=Q=Lj@#kh5n>?=gS?~Q(`_PB4108>u7j#@; z_j5z^o4Eb;+XwwJk3BC4)40*4bc})F?_G!B$Xg3o@=_Al&Y^V=Mh*5WwxJ18l#%c6 zJ4|1QQe1TOF!&B_r9)o@HfrG9g5K7CZ9{5u9L0S(xX$45Am0W zVw`erE%)DD#N-JUo(Ippl;FKNDIWM^?oYzDB~LsP=kA*eIOF78@@MwkG*A39&M$tR z$IKaJt<%?UbQv;nBTw94yu%~0KYcU9eHX{L^lxFxN9)9*>i!nW6Rl)*%QPgUVv<-? z5(o+OE^fom-H}*S@r9GUM+62lXv#78w_hS%7V+`g#d|Spc^!AZy_&+H`qHHBlCsq$ ze)I9;n7MQd?=4r{b;ze<=^8#$!_qYhgC@2siKP|488CJHrbfWjF?B&<(8Td1&8clu zJhh;-w3Jb!MzLVQ0#d0IBSwtiw9`)Gz4zX0T_!Itk4Pj!Boe{r^HE-2P9~FK%a#rb zOij23qI!Ts!l9 zsHr2U8~DbJV&qu|J)7UZaOS*MKYTdZzX(}XL;l!d>~i7B%(?3cjJhagdrr;>v_DTd zc&`Z?*Hn*`8Au6R_M1FBuKTTq$nK*D24*kSwPcL2KTN=pq%*DnAA0@(EW<*y_$>%P z3XE>OOLh!Ya+9fydfSl?N*R*c@kmJ zmcG^fitUK1*8iwTav_vDM(>(*k+!YKFhhqH(&oR2o6#);t2m!h@{ox%UQGhejgi&_ zsen$cTfMrkRQ&(dOZ*Iu{u zomtn7I_XgSPMSiUNko?7+#Ts+rfa6x}U zMfv#m+6BEpk4RTc^G}G7S>#9fefaW&Z)Pg((iJN!#*Nx<6p`^INLvnR{$$;dbbS;V zPaqx8GcH~#iFDGC$$;l#c@CPLV$EBHj5>B-48uqx#Fi05`^jUD*rW7?mp}9;l5O3I zaLC8aSD%a(@HZ}OK}L5x6wQoBi+jU(T>++vqqcH!Q8@8#~h z@8*?PI=;jE??5zRW9Xuj;=k7zbzmVC|M?BE>URMum)e)jd_48`5$F5+?ck>Fbi6$) z#Z%8ESonT_gn%EM9p>2=6I}7@C=dOq^H5|{mCLF%4hQVhvogr@pdp&ueQqgfm$LIb z%MzVR-aQZ2u5+0AUW#jf7v-{_^^)e(SF1cMn(U<HLq z`KkyOYXpn8t%kX1gu&#~f-HD4=Ow8C&H#S9jZOFyN-5G_tM+G4tAg*hk#*<)x^tqees6>kDRL!|}xq`7#u#SJjL4-$a=|KY}95eok)8bx(L6<)L#Ps-$T*l)@*5Ipl07*naRGsUI zFFZHQt8XUxMTd$P!+;UPjBPd(?hRh~TZ(j2a_jeV1#W*^P{_cMI?{tPhO`Ow{&1G! zQm=VBk7>u`y8kVkXQ$UMcm7HXS=ev*ADD7-my+e);;2bwj2{qY{D3fLPiylozW(Lq z-1O>70M6K}oXw4?R#N7^?@i+S`?M{4(ryEId0{oj{pAw?et-N}E<3bMyiLYW;lQefLpOQNfj0 z=2iphhUQvA>oh*~35`8`d3?Nb15e)YAcZ6P;}wU|BLRMN)HF=T!N@phw#UbhzQdc< z^;Tm%bxBG8B7ZuTB3j#osE;w()fwyyU}cE~O*au{fZ&!`Y4e9)oReO-i~(s6(-*|A zX=vd*tV%7CN~SKDu-7E2d|}p9tiy9{n(FHzk)mkuAPT~Pl)Jj&C*k7!;X@8R7(QOg z_%Q>?+huB9=F`}h!F0H6)TlAK`{h#HR1*k+Pv{7tf#)Ed6b|4y%CbsGu!Po0Cb**@ zTg-z^Ly-s>8=0{cLD0b?M)=IEK2e$d{#PnHdI5nT0KFic6fxDBPSr9ko4zEvQrC3c zf@LaWWye(`7+t4(1L1EU+@@wyYb%vubTX}C<9$JN!-ucYrLKM*bJwom+)=~t%iq6n zq;;3nK(e!UV!0nyQ-_RZz%)@(9fv8x9y)RKnoF<&=*Z&6)+D zvY|1G2U;SXG}EaRWmLg*mO%3iWPO~B?cuJiB9id1-}oF&YKW9g>fdwmJc(#- zWT3BrNE*DATZlb62jAve`WX={zlF~gc=a(7vlp^q!Iy=GX`Ei{m^kaIkbt{p^WVLy zdXb-m)epXkn30ce7)Br?h}1Qs3xUwBY(ScYGz`#uc&+V$ zs3R!@%3EM-q>M!Qi?rNI6DVJqKhRb(vH?XLJb+SOWKeO#r=fgG+9OTpGNF#JJ1p}W z$^f=9yZ-$^d$Y3k?Q5ou&;X?XaZxIW?)u5~s5Ga?P$gPs_TRrn`H(z~Dh2SN3}{Znxcs>#TWwcwv0=jo&N$-?Ow+_P zO%jRDCd5xX@kFoEm^@wg{D@8zsStt!!{h+1kR`EZRxPNYUb-Za-3bgv0W_}JOaVGW zg~?!FfWZMjR=av#C)I=zC?vn88ETp-HUc=Aw3505ELzT{FP0rW&q=VwNi#~A=m_ef z&1|{hesl>{)wRrDv?wnsoga?X{p9N=WrjttYQ0$epAUw{Ja?#1(-|lXjFv&Slpvi> zOtADkS|k(N4j!O;t_QZQ%9b1#T(7lc3DnniHP~x!>f4d9*>T903w;#`9X*hTn~8(d zo$&FiL&|n_ncI1egrYMcKOQU=e(Yl>yPMI`7Jx~T?%n&(g?bhcF0@!CC) zUOV*pa%%ksDMRCp*WN0XQX*`Jq=*t8RY=2nhZ-_Hcd%%U|_fyk}jl&Exo97w6|KhzS?X~-yvY`V~;ev?s&~-oaqhWx=^;{$_@zo79uCG0%W_9&p>z8jR zUH17>F+6UwSJ_B}=OQ&t5xS@n%&p0+Mvfdwb#*l(M~>v`tFLaI{_L~Q?oicCMNOhd z!epNjg`BjTdj8imXSncyp)B6i+)Bz+HKnPKt1hf3C6me{{P2Jw6a-8*HKus3Z4XD#w!Uf{C?;DRePL!MyN*urDHqV+lmgNrPj}0*TyS12rJ+i6lwUxwPkgI!6c3Z?`=iMGka@XR?1i;l1o%3tW`)D1agy(&Uy(m9_i# z(H*u`h$=aHXe-}27nLH^a_4Iy8mdsGSpgIY(w^|SwZk@^$o{q9U2?ryJd`1B1V!ky zCy9<~_wT1s1WJg`a*52IJ&9?Vq6miy5zT%&{m^Onpv*a7Ie=X%`UoG$PzZ{0a z|7^tJ+?UeP^{c(M-fsTTTbOus{~lKP{|>foW80k*{S{pu~G=Rw-eRl^9{jCE$H-72 z{!D_Evsd!^dtYKp&kySIY0(A>z!8FGArJyzKPk!zHJxczm|^{f;?oQ~JB5>M#t7sq z0;m^x&9i3BV%Dr#UuAcDg@-@r+1ciAvn%=A?C$J}$?;4}J052~{8jTFy1}lePNAvl zQfe#iN+#L(@$2^6M_wR*7%A%d{&(V~0ZzR1s~fC;leqo2gq8&%9w=S`@AGMe3S&R$zr!F(0; zGzjks=b_4lo<}A1^adTHqqq0FdqQuHkwe#hGylKfs~k^1E$^JH9C-;-X62x$6k1y?N-dBNb+j_`vq=nX5DTAh=nE~8P0-w++F|6z&GG|fE45C?naNXVy z_@$?o?P`{r!S!r4xRSE1T*Y$~*#g-V9)a!)qZvM&RI?gr`66gO1L=7<@dl9F5bZ8S zw+3JUx)s86Ge|oHNStJ2r_>+MaX<*PEK$(nor11qqqQ@N7zp}X%W=LgNYCpOH!XyY zFf8PDs$8UNtJ1KYWX>X`I%XJ#I*zDgDun>gQ|7(xI2D<;5q>L2{UW7=wB11+qqS{I z|L-BS-BdHu3}j2&bfjym-=ATE&=^iWL!_qyy`rGGAw(d6=a+a=;zp2u)YSa5|pdKM9C7wNf8?kK*A5CBx6Bw&Fe@ zz2Y9 z@#S3%+P7O-<=I^lznM&CUSnh94woW$o@bPo7Bz$=|LAs&{8Tt5Q#)HmFJ3^Y|0i*D5A(ov>c+A0aP!(u4N4= zY@x=pUA_kQ>?G1{$0>IeQJZl(r3Z~ z)mcfPqX;YAR%WzPdPvtn=q8#O=$1T@o{Ns4pB17;2&BZ2V76agdLCXTiRKF`#Twuw zqkurO0_axo+eOY~jiap|>DHd%Ws|*x;cxXcl1_$*<5FVChE=uEg^t@pUiCIYN-2cs zBDFBOZW-_1v2)~TUl&qMAp()zNjA>~qD$sE58rWq^Yk74HPS18h$} ztQ$|8-kDGQccOQ>fnN_A*?K8aAO6QNZmhY_uP)2`)i>RaZwi-RTfdRcK2&Hz-~GZn zLg$a1^7Tr1U%fwB^TciOKetW@mEOnEzuos+AGh-1gR7}seR;>pkx1n5;^N|tC4yfW zwrx|fvFeuox~6y-%|N$;O8p=`r1UVtc~F{<770SoLRc1Bz(6a}aO+&8aL_Cd8MSd6 zl1kZ-Oe14y+(a5-J0M*=*U73(wja{Q)>ZsBtG)*Z~vfGlL zhs<&)GUL@b&FKu#Wx;)~%As^U$0J6%F4FN3R=ew8)3!6lWM@F)CU>l`Q?mj<05=`a zrqpalt0XEG9HEpi9bxDwUzOa!wlF)qnf5$YI+n9g$M5N^uGv}8%z*MNHhei=Mm<4x zll0@Jn$ZkjCr={JPT{8F+25}!*+SRQ36?U`NdmG*f~q})rmM0gy}cyMV}t~MVYqp9 zP2GZYIRf-0gRmf-vG)*9M0TGk1CMb?Mc~pso z%iIGrUx$8vjw%Dtb+lgY!`B0W5iU_>G0rxOD|^VtmC{4Ef+)hL2@lDp7T+UH2ehq5 z3QH-osuvJWH)NPDpsRTvtx6l&@nyIW2*=K*X$z#|BGVaF4cG2G31FaU?f5%}ZlGt4 z$VF@TQ_uZOMFzHSN%pu&Px&ZiNf{|6UM7W`iqT@VCPX&LE4!YTj^WuUgb--qVw^-H z!m!kD-gA&n24VUTx`8G&O-M}Xxk#x>o`j}hMcSmoBQGHoN{DMZ=^4^bGM%0(;wwC7)_`;IK+pfSaSeL8FFk~}$Y1MzhC z3iaKG=5y${5(+~Wo1!V6_-F$SiLYkB+Y=&@2*(_A3?oL2AP@+!cI{eTeDOtUYinEQ zA9BbcOr1Iv!!TI6awRXk@B*<|XCD_SaodK+66t2p%mC7JNyVZpUa*OEZkmLlAq)Lz zhDIi6;ReihIZOi0b+MXL$mR@oGJ`MeFj%wL)fXX>C1He-&JO5z+M#LN6E{Q5bMcp# z$-LwDOi0^VyJ^LefaALT{Frt@AX3wBmtmo%&zB73ty-ZAEv)&iE)0*iAMH(KCG7{u z-yR6S2;^lI1YIp4R0&N+`PvCH0G``ziISH|sQKBFsEaqOWlnr&TGs6x99vk-&4Wj@ z8VL)Zh45wja7H!~*YY9!xzjLBgiqbqMbgZfCS?Z4cG^fSnI#OYmgj&#$ShGKgenmd zdaH+$GR98hW#U;L9)ZOE;`wl_n`%QeSaK{n{J?X z)m1>lqWA5Ws@A%f_8<1`Hg9_Mtt5~AL-l_mVU4k)49++u#Grxd_wRXd$*&qX^k9EZ zpXj4c)BNS37=OL1h)}TWt0JA2od2_W{{H78d>vxIA9_4Sb4+sCPa>Vxd;0k}FTUFO zzWj@e^VoAYi)UU)@UMTX`*K0PMp2>00sHtk^3VY71$0k8A7{oZNurG&!GPezV}qP? zdg$9+wb_UNVYHANDU=CmE7_5WZC}qZ)#$NicJ3RR!P9(%O1AHwly2^_9Xmzx*M~mz zVdvtZ$74MHk2o7Qxg4-hY0kXoUQ94*gu%2ueQd6B`RBjlTy%Lom;W@v?|$7DtNqez zNzS;SmJ^N%a@ce~!JuHqD@h*zXPgDIyAL4xWPXNw?{7xa;QQapC2*E5w|RS3Dks9R zsBp*kqyBtxjD~8D3HzF4Qj$B)Z|2A!_&MhW#hd*7+BmBhI!r#uLQ2Vfm&EvNro~V1 z={Z^wpa9cAEWdG!$ER=FGn2_|RD8+sOWEt}i5-_aci+L37x@}=_SAMn^&(Gh?#%PL@ zb{oJ|hmT~}-_2%A^UjG0E-Wl$;>3w8UAmNbJkG%fAIwQ7oy3`Eo=JUuJqI0h5GS5^ zBC}`Drn$M9Bab|iqmMqCbIv)3bUOFhq#44dL;8|t`f-J1UR@;{f(H8@djKO39E(3c zf^Jwm`}#+``Jd16StchOvo}W{w!2!<^KjA*(e(|ip0k2Q?|jOCYPN7#s1QqN+ifV@ z6{OdazSG?xPvUqENuQZ)C=w%2qEOp<5V%2u`xOH37L3Jhzp=0jRVy6zB#g<`*IirNSU! zAq@>TXkq#T=tAJd;&{y|WIWL;Pa5e-C5jOOqwCY(YD_HgNC@5XtMg|&$as>}g5}8dwMZdo&i7#y zhX|CGqFW{+Nnvx48poezNTX;X;IcMNkeD`nqeYz zRR$(q8_#vXbJ0v6nM5N^nG_k%1q6m^5;1*PnxWF$gr-zvy4mWr1 z%kt6B3aHX4(~r=4HW;>@4C@-JS(}bg>p3K(O9t6$^lJ(YOK6xv!;c`KY50ZuD++`e z*}ojk>4JdSin^%pePcVAW*@f#dHsf=9)M37Q4r=p&>m)7>aL6LqMWn+)0 zcGWFF{hCG2um5>#;_yrV8kw-I`?h|W%S-nqNi<9LJi=o7>D%tf*;}lraQNtxG{3$w zpF~nJ^Su-|-_^vTxdRwnuA^x%{Qw_7xVVnJ_ZUF`GM!{fa_&#+IseR1w}cG9toPHb zUFUQnWB?X?k)gKULxsEMV$ouoCCltiFVIS}W68zKY!)rHx$GwqqKzJv>m7c2WdlWp zjlA+qDFgef-_oYdE=PRFPhLc0OP$A6zll;+?efb@`wA}l@a;o;#YsKwVwxK_xZC9c zSMhcV*Us(Xj6HJu-!?a{@A3xv-);EShd%rd!gb;Cf5y4<_k~<~bpxBLT?X{aRl$6B zx}Tq3(Do31|D!bDJ-&vCyI7olVvyQ8k8^%p$8}fb^Q(3b)iX{GF@IstgPBL3igDIy zAr^d*;h7f_TzGCS(J^F@vC|*a7u*t}uwPrJcJ%HBcmF8Hnb(HUO*s9R!JPS154O1O z{~9^(rVzoro^Qs_-jS?WIp1#aWC>C*^jwODcPUSJbMY2_`GN{GI($MYuV1`3_q@A? z|E#EE)UV$olYOiF$9LAS{+91>)WkBLpTD`&c9vGf7#etV<&{@j=fCpGE4=mATkO93 z?#!J#H)mVY)U#f>?esF9ODvNhe^fsX`Pu)`Z^{sarr|g)N1XIqmaW`CBB98gS?_=8 z&3JX5_v8bYsb^^j!bK4VO&P-2>En6rt`}ImvWCh2FnYU(X@hi0`hBD|$ao$kQ)uZl zQfOeAn4uuL>)}tP2?>p0b`U6~Bg(!#fpxWi zO*dzL*_=+*txv?`w(DrC0-Fm$%l*Th<<$kc>mfa|M#ldu5N)M1QmTQbrhEY#Zg6Siu0Xbc#(4 zQ3?w3=@-eza~w2uymS&z^N@Z&Nnx?c5$O3r>FSCA);!IM#WD=kbu2u*u!-;lZYqUt zg^{j}G(7N`B!xl7@>6IOlP5Jt%buCT0AOJ~3K~!Syss>z7GUK8> zxZ|zW-1y3h-ZyHGGe=Xm>JF-xpARG}=DUxtT4>)ia*EmO+Rdu9F2DFrl<%DBXXI3a z$8U&Jx5?w=%XeN(c1f|`+9&$i4>CJQeTsuy2TZJn~eW z;vyx3EiBmaN}2YA3qUwunas9u0v+dv3RDN!-AcYi)f(4Z@_{{rmbmnikvFo}+2ecD zrp23@5d!+>`S`Rl*Z4G^aj;#9p?BR8Z%*ZQa2-z)Pdgae*QbmqDJdZk2(WpxB8@Vc zTyoB79RPM7KqiN{PUFxsULm5m?3foC7Uzpr_c(K1LlTN7+cNn=5fU4C%X>Xe;&(g+%7Im>HD zEP3`FG{a!T_YWt$`(T9dsC#b(8~!zi{+>pjp;DK8R)8V)CN6NFQdi8VMRkaic zLam0JLNm#;{8UA&SoH6=%xX=JZj#REW;;W|b@4(wksv;(n(UDgEeLthy33j6pk*#7qG}w*0bT2&zb-60wzew5VLcC z%axM#c9LprN_L&Vi0@7&e`pb=r4irKz|uDt@bTN9QNGE*a~!-_0{escxDD#jlK%K} zQkJ^E+O^dHq&}Qa!XH5B8cwsi?bu%|CACTk^)lIMnWYsZH+G>m@H}KZfwOvT&SVMr zrN{6<5n5>xB9%f$qjyN;)H@1eLcjbuZTcsx#h zRTXP$Ye{=HO+iUox5&q0LU}pG{e5iQP|twT15zcSeDl-S=IRx=?4}Xc`;{=@hy!0E z6u;d~c~03b<-2GV$*Wkrd8E1bSn>w?2ya+Vpu8VOeF(2PfwQs_!?v-ejl>vN$j1L{ zAiQQBBTt<)yXuRzzt=RctZ>Az3Ho|2cjtZS(+8IjIDAxN;*07U`SH5Z6o$}?iqP`I z5bzPvbo3$}y-Y{Ons2r%y)eRex#!rBN+Z(_GMz#u5_s`AZZv_rp_Wxm)zn8!j=t=8 zhD;lc;ZxVtb1#0tRo6d8Q*#n2CGUT-l)pdw4zK;|dPa>HfUkd$yz%`g-E$=Ch7F_g zsn;2vHVFsvbIwn1aMoF8;W!T0Uw?fs*Vumi;`t?1HL3gZJC{x4nj=T^y@%#A z`E(OQiUL&p?vSl+=Zfc-uqoO$hWTJs1CO0Mm78B*iS71s&;5B&zU!e>R}O_#<+`QL zozLE$JniZy&E0ytKmYzqiYe1get4Tw(Doauapwii{NF`>tiaB{OY1sVmLQ$Z-RD2w zR>XvTHgn~5QU3aHGoQ}tkKV%&QA+st8%buqSl0bQI}o9u;MyzmIOeo1)Yf^F6zBG* z90xvKkYVbiZ(k{GANl~fq|9Pq-}W=t%tz{3-hI-EFz}?wpzeEkVy=)s61HZ}c11R#Sfi~jkR^Yj9XwUXyKOl)Z z{s*H5|63zv%7Clso|O3^5aXLCWv)UU{kdNN00kVIlUP(|q3k6WiLTd{#uy7Nl{$Mu3Y-Tv&dW2R4eQb5vk3F`(zw`fYoF-yaQrw$%bH*4+nT0m#`h5Ipo&LVHW!F6k(KKy6WQk!07%^y+T-o0j z9U$G>L5Q>w^m(3XYL0aMj_?LGuBh~{SiKhMc<6|&hUc~<+GxISfnje;e7SC61oH6g z6ka-p&@D78pyJG1*v@RJ3GF|lN|J=>$4fP}#zSj{g_&1|XJ@iWTrQrSP-#0>5Gf^g ztO4m|uLUXFqQ!+k^Mx_|;jBUIasbk<%VIallmm9<^8q0)dEiAnPofEdVd&g>-Psr) ztYr2l%h^9rkaI0cDXDcbBwd@5y?0^KH78;fx4SP5FQIhW2#ni&tb6+t$_xvChZ2(p z&t|cmV6Q{=X2K=MU=~>jAsUcU6pijzFnHQHc0YO=70=8;f3+4f=p#6G7-DG>8tc(Z z3(>ypTPo07c# zIG?21kZ48^Sd=;*n_QRm;Q(X%mojd*QPijBQ#f+K4TDCG-Y+8q$G-dV$DoTy#&L-3 zH*h~QBgTF3+^j*ym^`z8;XpCZtDvxM6T2QgZCPla{%<>V?)TTfusE`1-XbDJg$zA@ zKa4RUHoaHL!Vf-V(4aDc!v@S<{^FOv*|d4{KF3WQeRE)7!J67gU|iXLqcMi&S0+BI ze5=_@T@kEo65i_dxB^_iMk;8~EF~FNFu1(@2LpGTcxQUiN}N?2k@0j^dE}~N>q)R( z8sm+mGHIrsau~z*AB&c?GpVa@=IR@tq_L@uNVFZ7+Jop~EVQ;Iw*;$zg= zyLrj_s9g8@NBUS_1YO&l%^uVC@Nw78h1=DhKJ;N{ zqdh4z8#O>~#q!s-jg;B6AVYIi?oDva5rOSCRNAuKrhav&8~X~>V0ByYdz2c(1M*P{ zlp}#xQKZ2uz#mYK+bwtAv*?gWmBl|hd^S)jmK5EqYd{UIe+fKlGB?*pY|DFQaqrWooCx?Asx9@Y`4+SU_|H1vdf3iV~;&XSy>qe9B=?X{_&6b?6c2W)iNzO{P4p$ z?X=Ul=%R}{DQE!ViFC2;Nwf~7x~`OnEiOh=+ifLdcYh1D(;3TgGM(-*hN;YRZ7I=% zg=m^VG8Iz^O=-c*7hWZ!3oe@WQ+%dQ-I_|~{O0d`nQrFr(+`)$UcVKYL}Iv$r>-T< zAiZ)ub5|^3NnbFQuEfhY5C@{s4z?1BwEQCp_|}2XjU-mmC15OcL}+9ZQM9bhvn?et*C8!k z44_cA&`?QTLesOPkf6#=Q$BtKjk^!!k2gL>b1e7warupp^ZXxw#+RQiq1MgN&#-85 z^YDQ6P8umBBhEb-v&av~jUXOH%2H3tGi@gs8gc4gZ25dS(Z)3WjohFAdOJwh(^a1?=hSN4e<8+c=;CT!^`o~n_wM?14pA56(i6v-gBXH z4gUQn6C5-UfxtI!KCG@Fu+J3o#*798!G&MK%4G!hm_*)`Nva{)d4N0n(H?YTXyD)F_8kR4wVC2L>l$HiaeNoH$T9;RJojs12LUkg^?gI-i#qnf# zxW@QsKZL185>0Wel&>+p&MREHaD^p`!<0@PNbS<)tXN$^X<7dd!()oBtp9vn+50cN za;iU>VZSp^#GDvm+3R00=i!$~#p0Bfm!JvRXu7FbW316@sBTP$Y$H&!Yz0kCb(9`H z#kZ!WDc!hw6;o^rEt5n`XRs`jq;y!5j*}Wagh7Yx?&8LeN`JZ>k<6xONr~_r@H~WW zAcY{7Ng*Qvh9A9qDT027 zuSZ9E)ay{d&QU)k5{VxIhviJn#K!ez-9d$Zj+@e-R~J=(<#uR7aLtjUn6Y3pX=fV~ z^9&1y?0GCT%Rj<(nm1IqJbQa0Gj)1?us7qOy3JmWYF0NPQlwG4v3Ko=HFzhW#tj`I z;&HFb6W0*+c#*Hypx8CKd-$c3j&L)0)O@239=tCdAIkf-9 zy+`)_MazUQXCyeTv9QbAkGcCXL^H3!# zcXn9k$!@lF2`~{wU`+y^N0A36YLGp>oAtg#m62QtT-RZq23!oBPA;)?J8%K2Z0M10 zw%Z*Z%(f+pQnXy0ZR?@HpMYK3Eqg195V*95^#EQ(DRQ3b@Lj`E=OvNdP7QE8P?w#r z1J9t8OCx|gvVR?s2Rr~wMv*&->~=bq=Kze(Zqr1a%coEzmP8R>F0dDlkP3`N-GlS`Z(fg(%pq-Rp*7~sz+&!bY*G5JBZP3NMBz66St8H76DE!Xooz-=h? zR2)?%)f3JG9?S0k`E({_2BVH+%l5ueJpFte$C3Qv`ZnR2X$l^FI=)p>W_g9p@S*Bf zHEf8%ORpuj$?vLiy~De+Q`9$jd@wKFI&I#k8E(F=0K=dY@$#ed!rXjU6KmHwj2zx` z*xNz-`F=Tnq5bEM)5C?@NwocTa`5;Kapt|6;g&b@2^VzUkr(bs^7_LmZhk$V!u~zq ze_y&c`DtUVw>RK{e<))Po`WwuxTkd zlG$ZIgtso;o8P{=f+y!~-0JdO!V0VfI>m>ELZRn?lRHjdxNso=GiT1^!3Q7YgcDBS zFMnwhn)1Rs zFaA8e-kz&9r%iK9@>-YD6V9kRc_HW!+Jr>WU)^ji%N!|LDEKEh& z8lq*(f&CDUIl@lPLbS+b}pnCQ3JJu;pz zYa8dRIjQ!&FEE8brX5d8fgw95F}8;g0%3lG;fF#)GyQmW8YdOY#!G{AT{M3f&G0KF zOVbvF5E!AtwsvbqmW*ln1J6mfEth>6E!7*xVizZjdU`^J(n%6&G6!Z#G1~N?j+CtPG7K9zh{8$bYNC`k6%9Y@ekpIzs+SC`t6sJ2m*wN8YW1Z-yt-Hp zDdS2>%&{pyXaZ)TA5Y57wqqYQVD$N002aP^%_+&v(f3CkI4!?vQ4BZf;MJu_&RB!J zM%}NYvn!|yY$lB)woVbBH6JabCa(%1AhuCegx7q!jLmE6F*QL`jan|YbQKNJwBo#k zijEhW2A;%ijFDKd41rK3k3xX1p$mcLx5)2bf?E|uW=z~vQ;yegI;Q^7+e$?vuRmH z|KyMmb|}uk2@!OiNXGByvoF@&e&mE{uV3-|Ykut8)vQR&tN+2ofkXF9#G47G^u*|+ zex6=*%e4zfhx1SFH?&ME88a9otUoho*zmHW_Som(jceA4$bfQ;JhSnT%Z@wgyFq6U zcZtk*8tk%gSutxX){?i+L^*oYi2CX!8xXFEo^fz8F)2-h{9s5-D+$XX7aWQ?&^I_a zXUh3a0skf6MD z+V+{Q%&qT~5;GW}=T`;W56|-kp-RQuPwesS@Uq`d$CHwRfXVBNYqre;rW@RO$}S8q z33BGc3$||qlTWZ%_5NS~Se&*2HX+;aif z>-uHU@Sz6JKB5l$%=c29aMl*~+|^>#h_?IvgO9~nzS7~dS^e4PuqyufLW0vz?7pk| z(rXFsyQ8RgjqU>Zd4k=yvC?Ac3L7C{R69GpvQnM0Qk{MFgg`)W`uVlo@T>f9!~2Ck z^dSfBdsiEQ_fcvM0PKWh-u*ESx~g}ENXt9;$>^qF%wgL{%4Fi|ySqR~rOLMA5Y&M6 z&Ftr0fseaiyhr>9MF8BM{k*kWhhJyEtK$G}Fp4~w*I~MgQuyq`w&QBr6f2WZq}vRX z3M2&Vm2HcTA`6c0V!er|!Tt=o&zk^6N=>0{@c&m7!SUy-6Ln1flx_10RB70I zJ$z3gaBOyebYN+=oh{``4(i%;P}k0-sPepT439h&=i&<^IpshrRykaKW0XJsp^#uV zb<&mV9iDk1!F9h-Z#7OlHpn$MMS1SU#Q$UOyyN7m>i+*e=iWPa`u3LHluZH&gb)Iu z*H8rkK@lq|qVhZ{;7`Q%SkMO%AK^j8f(22*!h_hTB2{_~Ng%x^yPNI1vpfCXbAErE zneCfwLg3NI`Mh4q&dhD+p1Ct~&*yx;pU*gHZBMV7Ffr+uzfE%3Apx%a^61;h_kOgC z`yWbk&RfQRY`3?V$m*)fegCU{%NGiS%wNl>ZXCb=-`|kto}Z-o<^yF+o3m?~&a#K| z$*pVs>nSS18s^-At3@MFvA=&J#fA!%d@vWPPw!Q zI>UoxDGEs|p1!;9)xP_?Ut4!T{^y&{$_*x|iK&ZUE5gmt=7%!kACs76<4f$?&ZkAd5I$}RMyju(ps`>Qs(tx4@&^XLfY8j@`3_I zq4T5fH&iZTj-fR|O0-twlf8f*Q^r(u&yj}IDb@}uh1Lo`XUu$y+eq6*DGyI6c6eE4 zo_idTS+jWQJHN!9HBImL_LH6{n-lNLd)^`IZn$SgvaOE_X`5pe+R-5t2Uo>t-Pt?o z>8)Mg!jkC?b$|Wu5`L1?|GRV$*vwy3d{3|cXZ*V41pBw>>=VL(8|XdFal83*^V`k zBqSw)elv$5x;l~R3;`*z2h3|$XE!qIkq4w_e0-#BqqQQJOwzVy6(A@pB>(IdLLx&E zWMvsTn?q+cZgUd{pK~mM{X+C@X(8oxkg*-ScJG%`%Xc=#V$t3~xbx9xIP1XqIN=a6 z&nK76JfB1E-?q6AW#{m;PpCYA49J)-Eu3C?q!rOgWu;#fh`;80)dA%*n+~5@9wK~7 zdA>e}?wNgcb_Bhmdf{1u35Y#YH4` z-kZy4{(e{X!BgHFJZ-Xa0z!_^!VUQr(IjFO2^3nsHQMXuBu=+w8~LMReLoJoViHl3nAzTsLC|zI%%Wz-^dP zmE!cT&G<5ssp2)@DvZ+Qp2G88VLgU4_!35)Qbh4vYoc~!8Ex7+RRjyinS&u=BEU3E zDbKGkeegVR8b*oo%82d$14Awpw`*kA=C*0ztirzPFv^*oW0n`mlARbr>}1B1GUs5F zIK?u$Acj~OiwJNuhA07}YPlVw0xBNo_Y9LnPXHHA()M!TT#Tm-n7;Xc43jd~13$); zpY4v6Nn#9o55@FD1?HM7k}^+X2$|yJn+lJQ#Slux>7B;?*83yOd-I@C%`xVyPv!MlH#IwnTfDvEArg= zrxbntiWRTr`SqPiPCY5eWgj!uL33x@T=S)JK5}^vJ6e5?I4po;3m$qr!=LU=@xmjc zBeAuHU;HM?RhP#(^`y}R@rCC_xb@db&Us6SZ{C<-!F-3t28+#G&CSRAFN{z=MU~)G z@s}SO!sTQC6{TgJPs=(pxSxNNjT;g?@|!HTUz6lRUysnaP0_i{d=hg+Izo`0~(_I@!t>U?&aOF`xA$A z`*SVa@nS2}%7fg0`4POlt)JC92Zz?*(VJn-&Iw8N*NqcTJdt=j&Xz4(uq=xcPdt&u zix=~~?|lz|B}He)1x| zeB}j1ViA*$q%tx+ya=XZPIPM z%$`+8d*@i2I*?MZ_~6-euWu(lX0%`lK~P9~6T_b;r8!4y{W#ny+m?5nC8ZTaDU#V7 z)5j1S4q!`3Dlv$Z63@#oC|CKjDEwB|%$ol8K6hui9SqRbJqc+fCBZiRG+(Z6(^taOTnHb(JNjMTPfjP`eTtu}&xp$HG2o zL{E;3FFb)vB1x<~%6M31TYf;G&W%{9z5&?W#^z_9ZL$~4{>p-* z4$;9xhD=Knq)tOsOF9H~4%mhS39rt?_JBu4q!G#YRML27a-wkJB+ zdT$x~U2p=HV-y23nre8@JC5hqcRo&HU|6kH9uITlH5ZQ~WOCd4SoiaXXz(2vW%RCJ z54HM+pg*0Tbdq6Dal<|@JV^WYar?7R=qt*_>;G1wbl@z4rpEqL=(ieI`a&cb8bShga^AqxXsa#;@-o*(A) zlg)SHy9&Vzmwm36JAPh0Zu`I7pXTf{Lc1;hUb8OGx4ttvr{t20%>CY`t=_n0r!5T* zg*t5AZkGEBT3S8seK12+rR2A_nD3x$R&&W^J)E{Q$h3NkwHxwWdqaXtFOHT-nG*gX zG4>PwTg>eJ&=0%vha=Q9Qf^yp3J^mwX*V-u%yq*S27kC0)|7@v6cZ44Q66Grj#IYz6eMz$$GqD>LTml*A8M0+uYU@MxUPQ&zFk(3$P zFHd4ra0~fgB4yTX@VM&o_$WdKOzrQNK2t_}hxy_-Pv$?@9%4ttIF*xc6 z^z)yJv*;j)n|?gV4}La4WrgIZB`&}H+4viSE!#YnEDrF_w~fDqFS#hf^*0TW&uc6R z*WZ+&b*E2tmE@9(BIBYI_XXNE`7|%E`P(l?-|T(yH*wr1LCXf8*$Zv{erJ}y-#N_D zUU74bnFo&UzsG);?cTD=|H9A<6|=v={L^c8*MvNpbX{~P1o-PhO0*=L{4MHgKJz{ZUm`S`~_ z&boDm({x>z#~ynO+qOC4h$Du!>*(khN6HKi<}Umqa^huA@yE9(h2Ps5s4 zLonnLa|2k7^<-b`x0X~kf+$D$X7HZLWLWvLCzhmDzA|sgouW40wP4{vHPf4>V?~0* z4-F9)^@y;1%FBC?yEVZZW}kELM`oTd|HFw*T@|fQuA%3p^`yH8sqrBmEmvxO!(Gqc z{qm1oyy&z=Gro7!IZIlPzu?F-bXpy}_BYRpoew<=IVFV$Wr|@_+_69CuLD|nsC)`0 zDW4dIKsZ69?HUqB2q1(G#!y~%NCjiL5o92YE|jnowluNU1yVu)A`mi5tbj2wMVdN* zLZO#*%-6H99J8HP2q93uhsvgq(m_ZIJ6erS_u+*^s%P2u-)!yfeut{7h{onr{JJyQ zb06W<|?!>T4n3 zAXOULw-cN`jZjrJ2yjFWwn3nw7I*q|L|r9;?b~4EDx6~vA--fWF%4vLsIDH=wsv^= zX=H5`rmy=Xr)jqQ;01)Ag{<}vaDIYlID93 z{Cf4AibI3G^`Tlv)7#cNCzDDM@f4YzX;_md>;yS!#tfpqq-#z0u_EI!_ppkNkRAJO z>k9piaK|7hVpcLkaAT_-XiwqxCLB6*2lqG@Wdk`xM-MxC+eJuNk-+92GNK>HQ-ENG zRVG?qSQA{ku7z4*WA*mXa^FkUWvM)oKtZjURRmtz$j)tTP!+GuW^*@ox3`ns-iGD- z3_S4im$On~Nx_CKZC6oQc~xB?LM)j@wf7QGqi=(4t1xfpYbvG701g{&dkW7DG2_?; zM9L#b+v1upy^lo;oB7_&_t4WjK=aHxuKmhI9DLwRl&8?XBA?DNxTcdGe_T#|K0-9$ z6h4OrL#nggVBx}r)Ya87ZQ3-n)|`6kskFDZvvTFiDQ&+m5Or;inqAJcGBXxAer_e* z$sA8_>?M`+IeC6H*Pb_@qpo`rfGbXE=JJ!9x%_vpGQU2`{CYzU6xZJ?9QK~Y40e8q zzU{YmceDE0d$UiS{=wh{q3Gn}p|dUt^3}H|IP{bN_05u>eLl(Y?+6g9d}Ek|g$Fvk z{hZN?;raVHT=&&-RL8M(nr#a%V06l$b+_L_J`3+gJI6!-+KeW8ET=IkKD>(Di&`?>DWeMgq z+x+^@B)xr#Y4sM@UsKMz-#&G()DlW~Gck6cngOl@zB}^8XTCqc+*5)a__oQbb6S^; zmqb?YXS4pn3=du1&nKR%n^J?ktme1x?jn~Q_r<>*xMfN^8IS!iq{)?-Qk;>v9aH*p z6o#lMVm8JTWkPmn1Rg2;y9!hGGZUlenGCI%LH*Z9yq3eLDZT`p&v2>GTQFro@7hfp z#$q<+PW1H>kbQZ(OJk7h=ZZaGX{DxtFluO4fuf)6u>oIr3M*;Uu zu%DMOs-2%quxunc3;&K_SUGhZ=6&2#T#WJg8QGpM7heAorp%~_g9^ud2=kte#R(YF zuh^yqOwF`+HKvR%P}pxZroSe_!G&cxtelYwo zdv;SVORjxlx5wOi*IrVybZf$9o8 zCxG7BYvQiElSFzGC#C(=NdYPGv01S2Aj<1%Of^hI0!Xd7+HvGxfYlmS+m-I;D=QmC z*}S@oQzspIWdGx9;e~a`tQLI_tvMs5GYfmNX|MgcH9DCbkQqt1AsWT%NfFTkl}*gC^nVbwavPRA!Lf&Z$U=9gGesVu}z#V2z1-9!sK)h1MEBodEPM zXGP@%5z<0P6MbDQL(&>o2qfALCUR9G$FJrcxuBxqkfx_s{rQEP>t;_wYyXRWZ|ajK zsYQ&~m!QrGvTE%%f=`z5?JvHMFI|5JT|EQXmZYJsoEty?0iM78QTEriQId>kuM~ng zPLOqpZeIMK$2t1_r(%cP2tu5zHN>jx0Kt7X{F!i9l6Y{uf#oziz?v1?c=ES@edQ1Kli!g8OXBw$HBGjql}um47+H52`?y?N zJLzm5y`zQBPE-2W^87Mh+q4~_Gy-kN%VY|rHQilZJbcIh5Y&_}yKMzHT(y%b>jsB9lf)hdL+3Q$0KQ-93+e$*rq#_t%18z+uJXPg1#Q8zEm2 zs;MQ{(M8(JQKM`!LbG}G7MdJ~zIEyN3oY9|eo$vGcHBkfb;Jkk{sh%l86p&iv~T_a zVP!EZR*P#nNMA5=&M9a)%#7EQ_HqO)o91{Oc28y;)g_d|Y3+lSUZhqu0z`*7^_s%9 zqkBElJv-5sjW0(NBojd(m>#c14|MSI_wVDeKR!*op`40_a^h7HW`XBaS$NLk~R^zhH!N{`u$g(n~MxQ&J|A zSG=^ff6}<>hB9|(vf!ny{akgr5j&s%qZdi##(O)>t%@VU3~13I+_ljSQ?+| z9{)vs*GGE@#s!x?UN+la4a_H?$e%)PMSZ}P8-5(3fZpJ9Mp21x67hy`d#+Hhe@K22U zewJ?A{95jlg{OkbS)XUt(WSeOJw#7`I%7{SpOh*PLf{A+CtweKm>YMoKdm)>W&o8- zAuJm^5G0-GV@q2Pp7Kqpfq<~>5(|W=bV3Ad*N_Xs*us`8i*gyGr#?>Y0S6MQsX@l1 z5;2h!T0E?!zP@ti`<@m;jB9rH*4r9liz?^46^rA20^vWoUW5{vcta)`*II*?Xjz6p zBl>*?d`+_*L}xQd1=tQq8!wdrVH70V+uQ2i5&cLpl6p6@%~PC(pAxh(roFpr*BAl? zz|WAWWH6Gzc!V5vaBt zjtiFY@^7BP?#eOe?1Kq6R1&U;W4kVi4V`RzY8CUOLu3MCHYzO^TVWpl$wPF#+`|6H zA40eyg6}K(+PZn+Z_m@RaR+Y+R!khfrF^uPGr!z`XnP;}0M_U$|swiT58NvN(wfx#DQ8lYxpK|#-$@S($s-vHdwVUbPu!Yu*n+eaJ zPH^TlR4R>5Pb?fYWoe3;(JIarg0)GnHk-^64!AfQHX_@52n&g8Ii#LkMw_(~9SBfv zJ5&Zjq$2_PVgXXV6>NQ4mBQWBG9 zKswo-uN0Ed?#xAs@86WxGHviO3AC4IX0(QQ#-+VwfSp@==~NzVMQbGrf;hlI;tGK) zEuz9A>;#CpQLIqexGXlUHQ9W2N-q1i+;R)I+_Jaxs8hq1?$jYce(tLHC;n0 z8Gy@v_Xgc2EqU)E`gdGO_m=B`j#nPdKXBGZ)W3~PSQ?8HE^s;Ff;Z2PWnUub3Z8sm zY7_A#lu*JjCL(1#;A5DG>>>N=+@R*xw{~#xy|oh(GY4N7=7paPj=HC+nrrj!+pDNO zaQ7MY%7Z`tTMsLLpPFd#pP3}ZWD?{s9wNo`pRr{mVAKgk{1`*ZoP{YRc@Sd^JGMLp z%%HhA4f}nJnxz6$O7ayZj-GxH7&$%Aiz)A!!SEDN2S)vH9!9aU2BV&s$Xnz;F$BE_wz#-Pn|am-92jKy?;&r;f*}TKQfY8HK8)j7yjluzLk79 z5R|*mj@(1^cIXv}&Y|m|j{IPTN3OqrUmxd9#X$RnBj{8rwT59|rhNvblpT!*+nrE= zT)_-h7fN=7w01iqJsGrCAT5LyK-m_7+FIr~b!3G``yTmxo_sb-KAE8-o1#MHi3ZC+ z2(%Q4fP-wTrfJE6SXC9su)vvP-y;I@n-$IPE2uf&KjE<}XKcKtXX~5??S{a=#ZH-b z!L}Wpp|Z_=L_=l6ZPR*4iIU4_>CLC`QyK7l6V3*~u#&To$*(A~lA}kv#5GIte#KwnSSn4%YtxIdf zj_%IDj?PY+Ufs;vmd^Y7+S=pOCk{8E-f=lhz{cJbTmSTT{9K;Fj$St2{Wy)nVy+vd z!FERxGDD|=V3rd?<^`|b_Z-WgUWwHd;lL9PV!=rZ$*%9CN!d)dCm!Sp1WmTf$-0cy zFRth5<(nboqBLYvXr}&>roR0a^=;}Y-}=%NF~B{&`RNF2eI5p!8F>G=XseytUwqs0nwrh z5%mbU*WW8sfuBpEb7_PVL51@pDS(+Y(e_c0VgU?H$Xq4ZCPN!ysnr|HmH zqVs3v=uPgudD*`j%BS1Z?EgNxx7-9I*FK-W>i0LKmVWfVqVxW@n^r;zCH&)HGVSlP z7$w3e2lQm8;wMYnx!{&64u02YS=roEgIw}pEi3L!kxeM(EDdtl#StuL_dh_%PQ~xu z*Twq3O(=xfj8OpW34BJY8Sa_FHd`<%q1|Eqh{v0zxXnh!D`TExeA-fu(Oxr?;qfV~ z(~3#-DPn9N3^K9eV^`aatO*!fCi6E&$CVe!o5YBH+&IDU#-2+DQ;+|Co{5vQUL5m$ zI}4p_!Nj>|kPrPo#bGcVt`CZEV|iDz-beZCf37oQ`eVwr$(CJ5Dk*n#9Jiai2PXxH){3X`RPnA8u!ibdQ5YhyAHU za@k$@=f@Lji~iS#BDS4$$AtZ2cZ<#3{;7Po z_zA0!HOuO}9>zqJVOs|SDJ~*BPNoETK5w`x_JDQmt(lg_ky-Br1?#jc;@WYXOySRt zgk5UXMIH5EZOz~Y6Jll@2w>NQ4*^xC2f?}bzAYNjpw@NJ?Bxu5?>2KEcX6-NPFl!y z{d|CGWc1_BJoExTb)6p#PbiKIF<+1v2>_B(EkLas`|#*Vu9?9G^EB{g;o~AaHqH($ zNuKlqsF_Dir}WmzvhmtDq?m>mfTtfyJ@qGM8|q@T7SFe^tu{6u+YgCujm(>eCt&O^ z=blF9OC2XR@u`%_iAcWUrXLetB@)!>ZYeK(v$S_*^3@~|$GjkRJgU%<3b&w56>ud>*7D z6*ZJ}O8U>=%$B6TR`i7fw^mmokPo;Tm5S@YcM>}3M)3t0v>m1ecSc7p2$w5nfgtr# zpS(YJUS(}FXww;9QFyJIx*F*XmL@brT^>gAWzlo0z3jwaf|n||7>S^BTu@HmKBIAD zh-`jsvXwbf-_(o1oS`!$P^3?gcoAND7F6>S`Z?=VDqwS`h?qi#L>3K1OLrPr;i4l% zqY8of2U(Z>a0?R}+n^GSXB4@j4;5zM`>jThjEldQ(#T*ap}z+f5{k~i5;|TKD;N8N z@sT^!Y|4OtAi0|zXPS>`sm1v1>8+)4dTWGIVemO@)UR3H{qQv#dimo-kRF>1O(4{H zpUdFq0n8WVim%)5ZKvy1cnRi?>H5AQn9d-7I|st~k2oU7@P zH)t`L$zq}oec8)YM~8-!eIQGZs$8Yvv$(}onc#6Y_XCtomEqA>Ve8347nv4iA{(NC z6c@!z93U?cMd~|G-1QqtNZ{>jI|mp)eqJbeV$NfQfGnXekpZew0Ab zWuA{_3w;XHywT?twvBx4%N=np6!P6xkWBoIoSx|754^WS)R z&PdC(d1jlgr?Z4<<=*?!JVvj_t|2u88kO&y?7dme znLA*-c#6vkzTM!4cfYH?jJ=$rNJdS;k99r>)M)KF8GJD}5wbhvWc3gf_;?*9k2UTu zGYBLBTR7>AuyF51~3sAhimh(?Kgk z!p-zEpS53o_lj-CFJ348rtiZh36%y{d(OtS)~WJFX{kvrai_Y>WoRW$9~#M8qK$bl6MlXqEinA}ixdTGb6d}bc6PUPb`X+~OXE%sbA`MV$%x*x8CY3HOj>Ukq6&)<%l&?YK; zfBBnMp8LV^Q0IkAXg|5KYkseU8-mm2BrZakURmJHL>md_3lq@GzX~NSWPc1~juS!R zsYP>-icLrEcAv%SX7yeYkaZLVEEiKXO)Vf3JE%X9+IG0=WrGO;#;$cf3ud%n&k!c7 zHXT}%#)v@U<_d+0i~FT;Ttf7z2$l43lJG^2$ogGt{pa#jNRwuE%^_m#z)o8&7}Tlc zae|$NgvZ3@5r|08pW7O5*W=XkG6zOrhT=K^(kPK~%b zn~e2ilnBFFXc4{?M8W`J)?92>dmpE9*2P2q?(D_BUZ;=@Kr%P5G@UQLeO6%tGa)@2@XL2vWUIu1I5Zx5xj``k5o%DdRoSUP9w~D`AaY1 z;d1Z;E>-yN?Vna(tg>C6O588yPsb9OM4gSiL?0<+Oa8+@lwz<6=)%Tj)f#g`E$YOS zq3RkkCz;H5R@f@TT(*h&l6K3wyy~*dHC08E?Gh(X#PjSc)6cLZFj~O;2w0q=;0Ue4 zTv|S$1bRiy`d9N^Ea%BtSF}L6{{1z6g|F{a4Y&2y5W04Jb6qRVvjG~Uw?A?J5KU?t zLJ^K-(6sq&XQw1-JzgQ|;0%QzRN+x>kf~C7@8PC(l=HwS@|c8>mKeOU!k|UfZG2a$ z7ldYL#Wu(6VS@K+-fG}BK@B7Y%|^*xP?DOp_{p3&;pZpq3jf#rhSrs*-Pc3(_7^PS z`!aR_9lmY%HAAX}_5yb<0B&qwrb&!8s1{a_AlViQ;mFU{P*siO4ZqV*PYeY?%UTAj zby$dK9{SHcQWn0j6%w#UkY6i28s-g7uJF^nYF0Rx92WUOCk z7&${P3|PoAUAao*^7EQtd>U|Pc&a?@@>WdGbGh65(0AvTb4>4C;}czhH#=GHOFFBi zVuQ~$)k0?X#=po)M49_8q>&kRaidr(&qltZd;E)H!1?c)w@gB4~U7G1F65i5V5XB)1JYT$jT9SPbJ`^th z_1gupM`|L1j};%8Si`R17;<)v>O3GmTm#PBRU@qStNq}IP+k2ubUyWnxmM977|Sip zm`8@l_2o873`=YTDPXV96f_ADMdtTA!u6q);gL8Z*xF1YSE^t&!#`HEfab`*!_XjOc~gnYjmONR$HQuR+I$}m_bv8glqN2wo=H8X z#ozl)87xyFXG#=SSPEltuoVT)bZPB4{^Bg)c=9sE_ltff?3`rOI^IoNee1m80@Iv;9M-FF3X5DD@8KT-nrf(yK)36dT?PD2()G_ zV_XM#&+;BErnxAF=wyR#HiL90TL?j~Elbx6uBFqnl~hQOb97si!8yatbu#!)qgqE5 zcxkZ&bS7gPgwR@+mo7GS_gV{1(Clt@y1ttIddy>i-f8A!ud)ayUfS$?#J; z4~5tj34J1GCJMD(C@3huB=ylwc_cx`YvJhuL6q9>))iRh9tNSYz*v(nc&%=qoI=G= z94LnC#8JF&Pfd&Tkp_~$f|3V$isPG7mB0UNs-Ivv?`Jp>dm@j`frZ9m$Ti|reRMGc zZ=r_|Mx#SrD%moAuhIG=XyT)GjB+zOdi=Js_D`tOjp3b*qPDNe)s}5bbos;@e0JVN zyzGxH4dnYyqu`Wh!vhFDyubQRlAr4ozL*4_-G-V+^q^|IZTKGcXpE|DY3zW!M7xVJ zY;-f5)0&{L54I@rfxudUe@LXu5XqOS4YnLBW zKbwuY{_b+|jYSVm^=ZsTtGDNz`j{1MzP6}_ItMXLC9$hfL15LJnz*M?4gYxKs>K&J zi@MR4e0A@SI62AD?K)%Hz2NhL92Nu{)UusG)nnjN5?Mw*^hZ#_*&(I|uiw=r3wM|W zN7cK-D}bQI(#DiuN(@6M{FC>$SdthV3@Cd(F;gULi@VHmxw-Dq$ufJuE{21x*-Fw+f7`CBy|l=_lHhK@ zmOYO~9cLjNtH2$Zqw+Q_qgv2Y;55@kX3Gr8RTa5|U9B-`f6#EYaalsh@}oPm zOt0nSHPiQp_BT%U?NL_qRnHN5gxLn;-_xKO8t=^orTVLprrKPrGgicBB#qKp{^k&D92Uw%5#5M zQlDT+zIqCKl-*K4ITtySP%@Kq;_BaSdL2YqRROdTg6$cq*xYc98vK@j)|hLl zJOO%;AB=go{}CCMO8`4F5vR;W0{d7})ewcxr(1Xll*A4-vUiUiqL7^UeCfSP8irkE zIYW_lH*K8ia}NU8n6|8X1@h9TEn8C0jP(?|lMK-waV69ESSTs2wi<52`;jmOS6^9@ zVJUr9CQyn!Q3vd!#YFpaC>oy!M6u`bv9n~lMz=j@)pcj#;?J3JvN1^t9cAcp`sJ7& z4r0cHzf&?1SjMd~qQ2W6q*w3thR4RkxWji;d9Q4F0kK-#c1ssteNK9m=D7ncKaGi> ztlQeq)N$syW~X!vZ}{olBT;;be>H0vCryIn%@chN`-4jxPD1;*sGgOIt|?~nCATRV zC|LwtH;SBSpU6hqntE2qqEW~#`w;>nu6tgI8p`4lQYJ;h(nHjkw#YVdmb)eqqkkX{ zMOQ8OyF_=9!cc}t#wryf?jCwAm3NvLGG6tm3u zAC}InS}g|> zzLw(TTzxqbE^27$QRjHq`oLU=4z1Eue)*@jGcH4+M_>?WS|fF^XtW$v6LL&?j1<|{ zltlS8I^91m+Zs~#)C7fmY5kdon=M)Jm~)5aK`7_*abFmIjQY^_;Qp!fvIal*sR?@w z(N3V_;_#-sfoRnjEL_KC5CXc0-vq@9=jsAR!sc?j|F@ot(8K-2THq`(T3O(WZe-T! z#8Ih@)owJE^etLC48z)O{E1_(CJ(rB@QEhY|eRtOQ zh5=$-j+UX~Bemd+Ccp}E*Ikm& zT1})%3;fi%hX0}#2E2lG--^z42=EUGkSE?CM)>9$U3rHW{C4TJ7w>%ho9eQSm>Ev3 z|AIa|*c#emkVuDcW4li_eMSmiu$koN?H-;Wr%?+Z4+W2u`3-V~M~zPVj== zXZc+sICoYx$wstiECtYaEL7!BkmA4#ok*NNExn{c5AvWmj8;Vpj3RTZ{HuOlNRJ8<@h}0GoU_=Etekma}}4{%h3&Cb!8P&L_;4WK)1G&wp!~@^#pRenx8c1I{SyDnucas`#1{ezdf#pTQ1buKw4_%in+CFAP6CD#8?!?{V5>uzCYth zq3>G1yVGOd%2Ajbw(_7e^-=;cG$EFhqz#%y3KPF!*7R6!W_uDH$DvA;M=VB}3d{PK zTL)i2_Ul!UoHW6zkEsKg5W{F|420LlHioK*$u$GcO;PK*o=PPWXSNsH+qLo{1f@N} zi_pU+fdW{{ofcxWytHp>*X1vMEg!9I*=zm}@wG?ztcho)^%KQ%+ymZ47uzxWuAnZ~ z0Tp4QN&aOZ5&Z<31I{0Uo$CuJj1fuZ7VZWo+{vr({Km;xaN{PucWoTxf@wUSa)s3p zg9xGya$*RTPoDa>NFZACnr+t-&hHjAQt5BHi|b zaW+!2iyKZE=K+nvuma)WWg(JUprgL_dV+~;_ybGH8k-{Oe4w|*5BK+H|6lZ=1BT&P zJ=ouM4`WHas8|IjDU8=^66TZVjMqmTOyMOvp!P$FL{)wFcQtE|+s2=QlnAPD^@=*H z<1|e1lZ^|!MeAEqmS(C9H>SzN@zvQx+@1r%t7SDwKA`XW_~+}ty6(ob3Cg&x;=@MY zw~X}a&3fQ@*t?=C8S=~K3T5Ue=2HlWPL67e3IRwYM&RH1)W4F4Ecb^EfrW+h&?vQ_ z6t5nL3p&I3saGK2{f2OB#;ruEjH>wZVAMOHRWOAEi=p|qYD@>>&mJ5g0qYW6$R#9| z+14-D%{|q5MO{gK&JZKbX=-YDpi@y5m3}tLS-6B7>n+_~c(g1Xb+HqbFzIYEMMv7T zIUbrWI61Ilg8z;IUYw)b8_gKuma03*L<%(NIERBV~gxchl#09@G4OV65 z>)m-#!XBQsPRu$uwzrqo*Ay1Ah6xnA7IS3hv;Xw|vgMUNIPq?0 z0hNIb3Y;%3nGv}s;3>oSB2m^r51?v3^Knk4(*CyaN=4O zIjePG4l%2T&{G-z8%Gw{;wV8L*T}$R($!((J8bL9E~!NOok(F!xIp5#6%C^+FL3hI1Ch#f8nx}37%yj64e!D^z7VYA~+halIE}BpVszh52H>j zFZ2|oJU2Q*xH_vjSL-^Z)i~1NR3*(7Tg|n%2N{eI$>u%RUc*wLv~eR9-=(=cV`lwW zx;J}WcLkhU?lhN{7a$c|S{YLWt?LWOt;IQc9B7vcz4W8f?%K&K*L1NI>98Vv|{XKOT(DW zj%tW3W>_D)h02_ehpoZ4|6(OWt%Q7DTpJTNrXB{JonkoNn$9?$7&pT05pO&-L}jao zoAFAagcALP$S7H>ntGz^{fG0@c)>b3IEND4MONwAY z^?gxiHe7aQ+DV)S({e6l2*>rjjDBl&y)4()!xuE2VZA)uF1s|Frn!+vwMmPfOz7#3(9DuuE{5_aRsBpXodhDt0?Rm9jphhAqf*1b^2 zR4@Up8qAP&t(J5%S8&I9A8tH)x&$ey_VW$o9gb`<=R~?RT~dy!%XmX*b|Xj9 z(w0SkI(_DO0gxFree8$jt^g7K*vnzH7>Pj`RShHu2n6}o9)J56#r?ac4|1|p_ z@n*bVZWC_~tMuvu!zaCN7g)S0KnzCOAY7cBoEOZed^69@J_nTxiF%;fWi*;RWNA>O zXnr^nbOfQLVXrQMlT%Yv#g`JOWp*N!y7FE+Kuz?FG<;e&UQ6+m`pF;TS(+bmbh0j4 z<@SWv6)Dn~8V|=zx4~!I8OzBD%9!GoPvjrTRh1Y4JX1B|P-sgbhGc72Vw3v^i0LQWJtur;@qeA9`R7VZ zDZ#ffTBui^ftkLT2Ch?BpN3bTcD`s8lT|kBg;XoUf^`UmXZW0jf4WV-kWu5s=X|Xu zkDQdh1~UUv5G5aono!LF6Z!PZP#}pHNM?EnbFvR)T`LFI2F=>*fJd`k*}jB6yO7G~;Tu{#?AQ@$4ZEBY%L4FY z4rk-@!A#2Kyvz8BKzE2*o&d2F?NVmB8Sj)KS&DB7IO!I1*?p>WMyI{-<0`=ke|zqJ zmu?R(AJ1T-e^B3c-KwBf9^kvqTne_8i##~ zm%GPpH?us-8e-%?HtT~P0NXY__+gqUB8hsH3?~V4vpgbESt0UwI5g4%g@nWfmY%M4 za+Gzt{L^dMOK0DS)Y3KyZI4~HAqOMsI%PBWQcy)PQX{aQjl4BI;gFr|!ej;{P`WSt z^v@|Vpr*db<7z&Dw&&Fj(dCD}6rp85YBXuv=3>&KuZ`4aU&Qv8>&)vbH&@B87N>bn zbG~gdTuO2j$$`at@cts5ytH;QKqS>Zc>{|h)@+u6V7Z08-a ziDBswu<2I73Wq=u$KDgKOWKkYY&6mp?tfyQkfJQ%;LI9WG5WGm3VT6>pP_1M_P10s z!n7cupkRWs%X3N@qOK1VL+uGix-Y%9R7y1(g4ib13p6nViIs`UTG26wu4L3;(W{(* zva`e*2Z0^2F;v)~ejkX-wq6x&RIgECx*wZ8rmeRY+*M)9Cr${3z_XP{hU}wjGmED#Iv~HK(~E-)gDsr#0LB`25JVs%Bhq?F5?|h zU3KE&SJ%9oO&8mMw4t8iHXbbCn|FblVWqKnX6=62M8tHs&MsH1=1+B8jvoVo*6CU{ z*CA^IfoyP_XyYY*8O-#5hSND#j<~K#4kahQtqtSTU1J(+gYiY3QrSKlZCcSA!agKg4fmC0Joz}&VKorjTeH7$P~ayr6rWc&rP88_Dda@^T6 zoWF7;8u^aU#_)7!b;e$MxR9kTC>?zD%AlfFfTuR7smFK(HXZgIHg$7;gktyc^6Hvp zU8f*<9^?HP%Z6#9AH!qXf?8c`-TCLwpR1ZOo83Y|L~7!kI7Zw$9p>&vnL@oZ*c;{JCE*B}1&dLD>sLv!{&7;eHa3ML zsM>O>9<8oR-Hc8%U+n?xWkm(O#{pUg)vRm~s#AIO#u4ZBd z>-WC=H5(f1=nV&9Aw4E$bDVuMBZTlQs=C*TQDw0>&^(@`}vVcozo8_mf z<{rE|I|I&b4n{AxbK17vtT#UJhg=uhd52sGb5%t6c*kVfZT9u`?NP>UJY~8>O%Ud2&DxLp(^X(RwDhMd ztXQeoNaiMUBrL@KkV4!YgLmbenRRZgav6nJY_w01K*yOHVDs97$lYxcFUPq2F)VA= zi6~}E*CYVQ%PY?AKf}t`bu}hu35_M6%*7nI1PSxf_i5H+sA*vTya}M9xsYr$rw=yD zhv@Y4@0v;LFrDCA6O{);@xnLMZFBd`=MtnsN%>yd+OHn%q%6k1!4IlkwL&tf!QYO7 zSQ)z%4bfMrRoAebb*QxRDWu{Y`sirCJS<`;r)ummgf{{5n(fAT>^l6sA0{4ukXg2_ zsPKJMA}ZqZ4c==m3p?_Un!A>+6Db(zp=n#s=$XrF3dff7!b)Xe#$%?Ht=Cg^P`o(y z@#&T@q72siD6Vho(Wn32@Tho>OCRyr61un~t#p@x;to<-Sc&_Gb(PyN!KvT`;}lu( zsiG<7Rnk)1UHN&nEaGeaSYX`G3jRt2;v?>b?PL>i1h$q(g8nlLr}6gF4E2N)M<+F( z8vN!Yn5p_!(*-Fp$OSI;iVgalFJm~w!jEUcOG^jZ_=OJxn%LPmEk`#>_GF{PCC{ph z$bcx1JA*Q2WDW&TO(I&2 zdXtSFE31x2L?VaQdrq&)#W|A$T&g{n-uaC|HM6UdnjWn*KM4h8EK8=-b9MRsM9y8 zO0kU{TPQC3c?CXF8-&tl53bW~gQw#m7FwE~@^06wWK4$EG_dpeB_(La5 zFt9Mm!-bFalH2p<<^~;z*x9{F7GO!i&s-+F= zVqo)Fb3wfhzfQFrRXCKLB3wTs7KJuh+rCXBobNNo`SVJwv6VM1j#J4nIZKUa6UC>x zIPTeeCm-P|Kq)oE^p(+Cwx$-0e=8|XBX)AIes+pe%NTyW9ix8om{yld_ITU`wm=RDHUZ%>7j^Id%}^gpyh=wVDVp0U?? z+rPxT$0CBH?b&gbh$)PW$FQj4po66=6BHVeI+IBEv&7162FTRKl0r{f#Jg#N##x}M z-ZE;Qa=DR#uQ4madnVyHNu~-Jl!8o2%qJcZE2kc6p_Bs>Bq*TlZFxz2y>3U=z_;X9 z`o*fWU871X=)C)m93``JeQS=TybZ=+_4U#>wGLn&sPc0P_vtSB)YiV0s|D)iZ+8<& z2I`No>B}2c=gwVXCK7ZtLP@|*{fI0-f%vqqWHmrQBlxlN0){w7x_GmsfFoRCgPo9hbji6?fTG zG`B6VN3pMnl)k)*v$$#8R}vY{P$Xpu8C^07*aMBKsxH=Hiizi~=#0U;c2$v8W$_W} zfEKEVDDUM;S_tk~nDIXdm@*DhlcGW=fgIBbfeif>6=M|d@Ezs2rJi&S{cU>t7uk&9 zwVBe->ev?zZEXXGIg<@tTdRw(e*+OKumos)?`tWhG6RIcjdnRn2v{!S@hNk6SQP&6 zTtEH4xd!Stk185LV?85SyB0GkCa$nkk!;o#45XtWI~0p2iLCv> zOh%>*p-dzr(E#V4j8Gg@`vVJP?I*E}pQWEAv<$$xm-I*74-MveBxiLpsbt%~aDTx* z>3EqPg@hu~-5e59GD6DBS7H;7c5e)o%oI_>%|I|HawTyL7qBu2)a{ZddpXA3jK+`S z<3S_51RXb(D(vMeHi^I_Q0hq%xC&dokqz9VitYAIu*fX8(K%`Yu8xZ+ZmZ>Yqu`J` z6D`wAz&U+VMR(=c^!bkPHJ3##3SF5;icw>WN5 z;|ZJ75Ljd?_g|WlEpZ=a=MxEOcAAg4{X#UOL~i|9152cLV!)WKy5$=jRClPRXU_pR zInQ|MB)Ov+%ut$QC@96%!pd;X(2&sZG7VEjl0fy55_iOuY}y8lEiZ9RP-5{wk{7E_ zr<6vT7^x5#g_DDg+8fO9fQdn?r!?4w{z_Qm!FBR%R@q4l5GP}-szS7hA|q^y^<}L_ z%$`9h91SfHQe+5W@lrdoZ(mvM()kn~Ilhiesn>QVMY;*R<~O9eot9A6?0MPySV~q- zdCb3r1K|svGe7cw2)4*mnfefWH~WGApWGj1*3t)LRn+@(XtX|o=qRc505n)-jZ~o& zGUqjLC=+QhW>qj04Uh?Drl9D!+ERwF*ag0X*vt^C*9#dw3$h|H6EI5;ocN=DG;XFQ zgq*Z#poIwZ=GuN+WF?`~G&dGrks=&bOIO9!2A+E)gCU=*pIRx7dW4&1FFSC=w)5Kt@BCncG zM|*AUNsg+dAOo9-mKps(bZTJXt4Cat>^dVu|H)82z;LwPYKE?@1^?=J zLd|?~=Lm2iduWP77h*@Ac5&!lW@l}pm$dxIQkM;16L93d-*gl~wj3mJInfgGkPAPU zGcFfFxPV9H#MuENn$r12v6yig!G+dUPphxC@#G?-AxH+;{A9H7()CCL970M+#lH)K z3o|q{G}@tq!{+ctRLB<%`QTiddOLG$O2cSwCtoCHoHP#Q;H6dg&Z~8kD8qqNC7z$ zB(hC1XuvS-MXAZ2)adfN#@Xh5EU6bg}M zvI1ZtK9G!z@#yyvxq&+qo#dJsILVJ;5i4}eW=%y6I$v!A;u|eXB&h&HgS1fF5qB?s z-scM^pos$vzjxli*l#@`BD76cL1OpK=k_CeYjLtd2oy&!X{^y?+?;G^f51eMl_q%5 z6m(ZweLTDnM`RnjpcQx!HC+0VBiaJ(yH<5A zI;HerA~!2Fh0quYkYPAkDSUq;ipCCG*x4~76CX7iTD=UkJu@``Q$v*44^Bd;zrp}s zz5z}YN(ELKU4urWyjSVF#RjgV12XjTK9ggtEM|YaVgf|x2aRJ5@8SXFsv1u)v?M-l z9x)088SA789v^maVKiC`QdqRV=J<6s8PW@OXe=QzeaJ(F13o9jFFk%C393PZA;eMR zkbGx`dcyY-3a=I@O9dvY9v=-Y6n<-mlfP|5hr+OeogIPZrYM>X%I4DHG9u^}$$s>H z^wNW3!BDANNXfm-wwU~+D18<-Laf2JA}(H75?rT>Pd*>j4BUI;p1=0=Xa1vmzrskz z|1}lP_h=*#*y%{n+nsg>0mumUx}X%f#8eNX@B&A$%F~O{1`^>!_T=&U35N9j@XP`c z5oG`sHMB5FIE~P0InrEfCXkCtFI<1aRrzz{K zs#1Q-ACCrec=BFpm8|11Q*pkt$n}LVZS}{uDRc_$ZNZr)67^)f$$^%V;bhWnj`Cx* zfdCT|P-57LSZ~K>0IX&`tE`|RIk==+r584|B>!UkdvGkW5DG>-Kr@~?R%RkGXqHU5 zzVLZKep|(otfCVV(Y?Pn7CD)WOggogTsxVXm{b!Z9;x_{!;x&E-b8pX$TUrf6Ym%B zNup?l`iLj1H?g>En3=SgFw|BeBb{No#BLm*6J#OLnHa2?T$4z%ALX$rsJ51DqJF9d zAQ=yc1rz#BzhwEn0oKqZ|GmRmS6)j)$@E~^?#EvHlt85`c9H`zQbvVzy`NnXd0*?^{D-$q}I@AB!%z_IZGL|p@xvv za*>#61evCghL8lakP?WHn?Hf%B{otpjWm2Yj%?tAwHO@X%^<_Wmdk&{o$X~OocUz; zzcDKY@(je8udB(W0CKTbZNv2_w)9)SOuwm@*`P<4Q(OZB4P$?+JqhY2(A2?h#g#!| zdWvHQ0A#nR_S0B93$Sx9zi=qum+SdMdEu+7VdC=>bAi?V)?*2J?#~0P_BcJG>>aSE zB8Bxj{B>UxRk&lkA=b=zz1Nx34Br#)4^K%snJgR(Aupru8=<$EA&Ml|7JMNYHlOj2 z|3KC7UTdVU#s}Trw&nYu=VuUmt>XEg$N#^ln=jI6s)PUg_P-Z5xV!&L za{pT=|2g&m|9^cj_k9`v-+B1=unG+P;{&|f8YGH(T=@4pY-3ADnf+4>?9CU#>s&U{ z?Dfh;=y%ZTH!$F(if8YpC+L6wkpKK5cBgX%BO!ST7PD8~c1})Cm&LLf9=7TiB^HY? z9+58BSC6i=?Gzecr>Ki|tr)p)Ku0wNh>8r;r}Wr8W*k!L8Gm_Lj1ztbZLCBQoVI@! zTQAT%v<=p*k$;Dn6Wgu_Nxpn4-O&^twV#Ied?CgE$MO5e_uI-ZFF(9>1L=5cA2X?^ z7OfNcM2g50H~;67JaOx&rCT@hxvmpdAIb}j4%vP#+A3FW+|;=!Qz?(?;Xh*!Dg8kWsK#v8YrgYhL55k4Q_X} z7Eo5yvs7qaGPo$!wYPRElhf^5^Uz1=fiE)kxNo@%82BRicXn z1n}^hZ>RR%E?qd-2(ruVZnDqRy~U`y^*iKgyBEioeQV_H+-a3rt@uwx(|TM5T+_zc z>=n9RgC9i+VoKBv4fkm40p}eZZ4zYlt(BD*{afC;AzwbP59i{%1m+XTbok>9_4Qa> zj$~6)Qvj_-s0CJEHJ+_`J~uQ^L;bl#qVx-!M3lc&_Y-%@sB+&s=9-mP=wzN^S!K#I z67a`WHD?7Fev2nrgj!YBY}?Us9v||n)MN`Tr7!$`9=>j(T=6N{TDDJoEvR@*XHE#V zN>C^!Y7sY=r=v4e?CukhP*~I#d+#5npHR2N;V6`a2EjaNL~=+FR#ax;Mb#h|SkOWUf!Ks*vyW+Q=?nlX4>R@?HT}!*Tk z{Y5ohARqklp4FN7pgdE#w?Y2+luIOU_O5}sqDMf&A%2|1VdQnMnaPp;9q@m57W8Lf zs6MJuFL4;A#^>98janN|Ks2j+dS)M}V>@@I$k7<;N4y)GjC~$xYr4Opb~=YYts3e4 z5R5#xw>0_8)M1`ijxY=h9BKuneZIKlofpcAq298(Y1zO{{gU)Qu9b969!y21ukNH8 zBrv|Hd3IM{Wco_r1ZrDjHWq7dy&6Xn-7?8%iZJv{x_iCIR0C!}X=?pUhS2k*6?0l8 zqgCFIp?rCnP_?9*E??c_7<_sC&bz%E-Jj7P;n&7^#_Y5cA|Px)iASO9E}9V$#v4{ zB+^X7F!r@nOfWseMOBgB+Xp+RvJ8B;bkCjF>5)oJJ@7Q;{3J+JyX|I;u(on>CBx+v zDjF+UTyA#AILG$5(>&R=bmwnOz#Lq}*-w9;HXk1<>*E_=UtwXD2E?1dT#HFTR=YE4 zk~+Hu8mHliuSnUBPc9c{^(Q2|+EzOyP?sYLt}WAX4lKAW?W1;c|5o1Szx9WtQJ&Mb z6cs=6%a+M1G6th+3issSjuO+-W&-D2+;(pn)phZN)}zWK_uyS4h<+f|5uaXvo z*e#er4fI!%5-jeV|5mZ1UA6AaSTQ$W=u#lYXmN9wOYD)g-_1&K0xqp&UiHlnIsZb- z@0{OV=E3E9UZqL)$&RsH|BxrU__R(RA|6pg4oiPO*#kh_D{I{A#z%bV%!DuD%n01R zaYQ>k?+lG~AMWnn=ue#JlWTNzpTob@V32DxEoXPKv!``FE=SYJVR|JPOto)y_vOUf zr;xoE20bQB>)y!vFIoGpw;}Wp0$}yhkhPVXr`_6%s3cr-l)q@fupvWsfcp$$X=^&; zpLTqEgxiq(X{%fPLkN9RBk0>h6Xf~Reh~E{i{srkY;^wm6noYABF>xGHvBBd(d+mL zAW-culHheb`&sR6O71E1l^NIKGcIY|;V|1%@YAESD%mGbepOfLcNmeZ*FGB7*F1D)5g*) zRGN7#*GwDhKji!QPS~B^kMzvElBWxH%=clXc%7t8RtOg9b1gAuIm`jlER9B^(XYN-qKrAITqwgyM(&9|-#7+KoaRwf@}S$8#+ z2a^%j?&dz)zHC$bVI>2Zp6>X*oGr;4*OnxBr$R~R{*lgM`+6{M^7o7fk8l|Da`l!G z)9di~Z|(zC@Rd8IPT!|YM>%*z-tF6Mj+C>?joJe)S>uGU3VSj4*Em2j{enibSQ?ry@Ol{` z6Yf=M3+vSzrHmlO)WJ?`^o6Le>SfL9yeGg21X z(HNl>Z9eM|go>Sot*t$9v6-!pr}bSRa&1gWnO-R4_-#0RYbuzxK2zBG!wPqlqHzQ3PK4h4Q%os7?Mp8FJ~iN;hOJHPUz%sK3VPJ4+r7^SCe47A|473H1VFj4Q7Lg5VPd-xcL!KK>|Y0ZQq(iR0$sjs&REsIK` zxB0Q!>GMYi)K=^ytP9zgpWH2Xpc1`~q@5|Gu?9D6_+|tn;a>OQf-Wz6&}K?CD(9bj zQ28R8oDQn(w?uI0H9JSs*zlPRgcop~?ajAJN-MULH1rKm=A(1_JN=<)Xlb_r@e4zW z6LGcfb;06sy{nq?Bz;)WM*+4a?{yhB!g{+RJoLquL~;~#f$+m&e)e9@{gKi`4>p>ipb0)t<= z0hq@2FU}DcgXGUmVp^SrmC~o{C^!@~DtNgXKS^Wkdx5Dj+)9WuQXYxXxtD`3Eum{{ zip96bG>#S4;gF_lZ@lBs!&Ef-s)3j^iEeB z8i$IO2|D7Z@aCbv!PZ==2M)6mxlf7XMW;d)C8xMJv7M9{%VG z0f@Tm;V(9CtuODU1=(7nKk7%jUc4R;e8yH^6j$0HMiQS>^j6e<(r4i6M@@HB4!3(X z@jTlzDG0vI^fn0TVUlBE5_%|eRJP;q{ClZ(J-jy6y4>euiRR(23!eUBH<0R?$+XAu z+Frr5N?3n@bB^T@x$e%_Kb6q7yYIaEfF~$s62ro{?(X$4QA$YYiZkFd1avjr`T&)4 zq)&a*%VtPLw7X=pK(wf^6#@%eez5^aprC&hs5boG3RJ`s7ZkE$K7m6zOuNj!kr^g* z3IC;;y(Boci;3;77FOjS+`g#4Kg2)=eD7;aCGiAu$KHC`8IHfmwR;Q2tP5bx+fF`N z8U_fhO?L8;^a5#xNTI#{pJ~?k0f_2Qo%E)Eh2;l-y$vf)gbq8Go4PwW#%Hbi2ekf3 zXO=r|5;KtY$Tz2(*sqN{?NrCd@)gb0k2fUUuI%%v$asbJ&ttxAHMyIcL0z zK`hZZ!3sN(Uqvawy++~K^bwDf`%8Vm zs_2_TY!W}UE-TTv;)(1X#^~s@YKuQKkl)OvQFuI}_3-R>{RmTpYJ4i^SiO1wJ^vty zJhC@$1b_Y1+^px$+R_hPx!-u%jZ|D(+Oun8ne7s1;H?o**fpzeRKPS-J+ny%Z zd~q@kk0QvQ5noxLqV7d1yrg~7j0RR{^_`?SCyA2Bwyn~P{{t$$1I zqrd?o?5Zf(3?6A4JY2S9_|7~R^R>(38)8G=&;LIQ@UnCfDs$e!7FZkGyF${tsBK%d zxyG-{*rgQW@#L$OA$&W8`zg76mRe6Kbi!((QZs3JnLW{<*wYLn?&{k8;ltp?XHl^Z>8Oe@amy=0o;+deuGNGg=>&wrUd(r+{h zoCuCc2nxV_dvW!p`qwCKleP5h-GzGo+FfcBFgur0*VI_9Rd_Rfq6A3p7h+q}ZcQ%e zm*U=SqJbR-6VH@$P@e!cr_GZKeLfMP@|Na*Ea}x&^VKIlD#O`SD0wWyZUFFmd~;ye z?+hVe%`w?Zw|aA}cA1^X2umJo8SIJHMTdsM=6U1(!29#%Ob?cJo%G$ghTKd)6QYK7 z6CJMBXZ1+CcAJb-HC23F7asvhx$^ztj#(A`B~#qj@mKDcQA9Q~{m34LGSlTH4tm{H zSKxm9uDb?y``Mv6LMIuH2mZ;(g0pljX=c*6EXscnF|-sAx^>;DhmCDyCGL_Ww#f}dFIdsaEzh_x(9gtkewGltzp|jba;Wh0qCDJ6FLstj+Qv!!##72 zLo~R|rd6rDpE8P-Bh|CNEGBjgH&$mjeWVxiqWn&8?XX#!HSy=={`0@{%3-08|4Z&@?X z(C>8flatsk9{vt{tKnbyEfLss>Wa$BA}T7M)zs8lpY}7ba2uKo%Cu^J-<>SX%+8A0 z*f3PK-4lq5i@#zzSP;H*A;5h6Zwuh6!vGOY;KOebvfQa?BQbg$3cS~+?Xy`H*jD#- zJpDEUdWB5R0G<7ce6o@_Z2Kv!lgE`wteL@UNbAK_qyAB5yBS8IJoR>I)SW7O{$m?9 zCUQFeZ-aFus5zb6iFH5Tc1_tUzIEc6UtSXp!TUaiiyfe*HIwiVI({FgM6uCa%bKnX zv?UxE`MMT!f~L=^s`!ARY*oX<;~N&g$d)uSb5A&BXdDV2CAW|+Db=GGOQoOjKW9KjhxGW`)sYnQq=cbLjw; zg2j(>f1%qD4Ax)xh-Xx^29J4HJvAr-;fwg+M1me;ydT!xTdWo+Q)pwq@*>FmYwY_i z&kJIdvtJuSA<|u(FKYlVz>^I8=cmy2cgYJUgH~;)^69jk7Js^#eR8s2#3oeg|F4Yo zlr3TW;GZ9u{7$$gzh)%mNtm6-3ZW!{9eiN%%zQTSpkoIzxg?d@J8Z^G&h0T%a*9?g^9(tkt7qrTXh zIJ&OB=+XgGFY1aL1`{yJud%!Pd;}h6<wb{Sj35Vm4?~(jwSQ0h zpzlF3T*t-nx@!hV4NT-^p`{ByEW0(DvI-UtbJNt)ipm4DZ_hlQ)hS4oB|9^)HWT}+ zBgepdAZjrgODEc&Ef%~dzM$fhU8Z>`!VuMq#5>;3dJ^(2Gwk%sZgAWEAuu%Ys<4xo zbkU5yd4p)W4(>x~;AB2KC14Z~T1*c%G@Eo${lh&s!Y-W!stbNbOgL5!%nn>O^^&in zQdq;=+x9#2u3vYb-A+jPEZgnU>;H50UG$LUUU4?723huowzqD!1-#=~@Xy-{7|%GP zk#b`5FlVg6v3|M=R52v@z$+limS6dM<*cBpDt3GOXMtQ=H{V6;OwRhAqmrhkRHc4f zDyIzrFe-3?6+6c+54k@(>m5lmfdK2m62N&TT14tg2Vg(JQuT5XB`i1;0x?%tPJiKF z-vi;uq%rUA?qEI=LB2uzL*3mG>G9ByC@a@4AhqyQo|NW!S5>DkB&#ypKAWxH?h`;+ z_DGAYM;8XS($>X+5AJU!zh!W5Z){ASFx_00us&q5v)}pmd4))wxFSu$Q|ot#wcLz_ zY|rWGEwFB_Bc&IwSvsE0}j*-{k#U%Z)=df{d{r#LsgK)I$p^lrn2f{@$mMx zQve?pQvJn9MI+WkI??w9GCyH_aw9g&aZ}n7WYaO*8s?GVL|&WNxmkju64Exk%>zEj znwV2f9~a5~XGBEX%yuJL&wk^l3=ZN(}E>bA*xBe2i0b5vCQ~q;cxL+}GfP`-$FYU2B8!-w$bdgWQPX`Yus#N=tUvhW73n%<<$k;w=Ht22 zV&LONN7(9j9DKP0`7~25Y}$W@4<*Mt*b`8h!2fLA=%S2{u=vscYu8_B0sb42AOI#T z0r=v|NH3Da3hi<$RQ%91YzLw_CeUDVdducav;i4(J) zAw6+^ukid0^wk}b$Nh3{QfYMF&JlPnu9tziFqbi!hHErr_5_vb>iA2mrbkZTe4s|@ z_Pp4+iu5?#O{g|FBkZ?1tzy?aUSyFS;>t1;UqIu@%z9(tTWcH&p(Hu-jFY z=jJ|c@i`pfoAYnnU~UJw58wD-Z3>O3?#FiHp*?FLYe=poB!w4CSsY1*?aNg=snB}y z2qeIz)-0^`Ab~n&`%Pinrac@-N5{oh4>q@T53`Wx++6bWwg>&{nwsLWvR%N!9Xm(4 z^ZQckdAp)Ql1@i{_-3ylITOc(e1L{y_IY;htd9iLD4;~yT#i+ThlizPWhvO$5}J8e zI4T<(Q>Uk=Q5RT{DY#5XYAb^G?YOwE56v?8lI%(%lrqmGlVG(YsF|5JCVrpIXhOu; zd$zOo)G`|sCMwVf99|Jh7Ahz(s4)B=z|l^NOT^w?<46xLOh`2jXfBte1`@=hhvm3VlF6e|M3TIMGC_zmuEVWL2-2!sA%&yTzAh z50MY}@M$FAK`^qRxh;~Q!toB2Fgw3=6xCIskTeB<>i%`5rLNX&R0`K>{=|CqZ-aJE z>zi++L!RsSv+15?ltZ50?Xe;FWo_CR{v-*MFqY3d^!1kEymfWP#r^pSfoXK~oOzx} zrR(AKOTy81v6T?{`vc zE_bG-b;*G}cK-isaJ(|6vN8QGK}19{=1e?{#6SAEBojp`v{*1ir*1*mXtx4&euMZM z)l!GB(mV~pre_Z`@)f^@m`?p9iwb#XpjmT$T*K!Qs&1}O3t@01skq|bx11z3xC4;Z zK<-8SM6yeC*60PQxB@;61hF8_|{* zdOlACHJu}Rg{UJ`9r7!2s*GlVfK1mf&)dYq8Y76mACBa7*){^pEJHO>1W=Uu=cBfKb^7@6ml`>RO^$#m#B z*><|LiAuoLjF8z>L3B%OUUMPKL9T=D?J1gf+tmO=b|v?oQ|xjsp?p@ei&;3rBC*b6;H&5(coZ zZ#D9FLskjd$iXwF3>E_W)zDryQ^y3p)GrQJ^~m6Gowy?N>T+U%lHRL4M9o?Yc*sUD z1z918BY#5x7SF^gs(&+|ox>l-s*G z=aon3rDa(PM^^P~Nw_faj<|svYB8_$+_#RpEB%f@r6J-X9!%%7*-mUa7JWI9F|*{9 znGqOMzMV+pEBMI0-qq#`IGzxaAjRkpiun)~6qlOzUe+i^A|17h9<+CHRvXeau^Z3%SN-Z=BJe zAgNPgL#BZqOfIf|o-cuTaYcPf34Fd4fILG!uDl$Lz<76-4$XitMGdKxNPo4&2k6Eb zT-Jep^yRb)@VLKT2peO`Ui?i!`4^=X`t*tBzsYt&;}^U7{D39Oqw;b~y?^bl`S@DJ zKQ!n=%YDqu1pPuMmWOk*9>eAtbn-1%Ujsl0&Q-@fpA7Pc;K; zPp@L#$LI*|l2oG_kaGW3!nCLjH&HcM0Qn*lgVu-WJtbeCrWH%;Mxqzj-8{_#&g;$Q zPZ2U?UHXY9&zI-|Ap9g-Od2jWLzoJh^m-L6d#OY^v$M15tyiwd9SY9&5tf#mPuo^} zvf@9I#pG=cLR9pOSpQTmZ@u+tEI2@f*oMa9xQ}-&qceBqn?9$8Mlh95^tBR)v1gEYtdR^C?? zht1V>&;GyKe860XMsS4BdA_oKo))kiTeG(4qAjo<57$?#kNd}2uHxy7TnXz-g4ypS zGrX1u4o^5WYc;A^Cg?O`X*ORIq=9XPLqp%daueACS`D^(A)a~*X*^C;W?3#c(D10n zSKECyV@!0m9m!u@_YB09Pz$oCYuHvjPs&$a7W4=m2g!_$jhX%4z1M-Z6Y79e z{H)l)g(`ZV3waCm@K@)A5s>CMMIq|WtB=sa8So#cHUPensGt3nn} zeBSSaEw>@f&P2ezz1r{`2-GAJr|Gvhn%Z$L^Z`R0o~9mJY8d;=8XD(~6racC4)UJ0 zEoI+7R9$~rThO%0PD?g|5GPfzq`sIFHfY#yrE=0WDZ#fidKUPMpn=)CBQH2VTlq9;Lh+*1S+ZhG)niGgZS#47`n+9rzWHEa0qcf(L8i$B)5BM{BPE*JM zJLRyB|DhRon5aMEfOum6NrQr3Cx_(>h9nTK$ePh6gL#!tAdp!69*@O2b{NopH*?)z z(@n{w?FT>T|3HSadF-?S3J2&-r`XX-lq;E7|O%*nD>oqvnYG-+7R=QXVnG2yg zfkyWNV|Luz0=U2vTM?C?k@3xAjJ%?q60+y(a_z_Vau@@5iCa5Dx}cZ)dtNR^|5W`s zTf`7mvu&;z^K_Q<_pM>2%=RLu+oPHabTb3c47lOJool3h^x&?EWta~6H>&c}`AmSi zY<@Ux;LQ)T%Ym~pxr#P^G2e>OdBnVg{Ecw6*uxqo_scFNt1GCdp^+};JU9P-viy_n`LwUnCY42IC83+iBsz5t=` zmmPEY(6LA^?h-Ymf%F-uyT^C7olK$q%{VqxkxoFzBnptiwhg3lRqii=++6xCPUoy& zxQ+n2)G^ok5CtL)z8k-u%Y}JraxCR>@%qmwzL-c4t7EyQ;t5?jr}CX!9Z$DW6Vx2?iw33WCXOpe?jjZ`bJb##QNx| z6d*fcRr90iaKh!ZC8cm~^|?0TEz?Phfuud|A;ERrHOOR1D`}o_zR|{(per)^bBECS zq0umS8He@;EM2u31>@(#B4+A)FrHY+6^V^>o3cnXXza=tW;hVNW`bQ#1bzL{+kOw` z{c4=|98&aG#YcZ|EY|kBpsw0X&TCm)^UeIUOi8**;p2K15N~97Cx5;NGRr3bGBWWF z8V*@F{_F6_h~HH^&#T=fQ0>07bPgxc@timAP%|zU84`g&c_v0j>j zO}wk?le=I)SawUdGua%Y?--5RfR%79R^%J^laf|ffqe^Kwt{@#E@U$XTb>1eWB_bRXY!pX<}hJMhZ({KTy5!uG|t)g&v+_!_J@4ET9)iC>Z=o0n%-|u@=lqNW~LHa zP)GT!tA?w(Y~EIrT`ax`w9pa3gog1UxVJ74>n)rKv>WNgkOz;9E0inYxFqmA+>W!% zsjAtJTV##M&zvuOe>u}duKQ%PCWp7;0&+{tS5bpK$eL#1wBL6))g~{-eGv(zAb`6Clx@Ju zw6uE}E(kd!pkCYeL6)>4!o6r#9aILgDuGUl2hel$L9N^k6>S4Jti<>1(P9-p{&B=k zmJqL|r)UYDLEf@1|nUmmx^d^9YG2Ub~ zh3j~}%i~+XGh9O5iHiiXn#V=mD&tu1N&}0H%)zI-+Rv|TQEi_rlvKk(P>}|A9F+fWVZ=4|LjqIyI`=}gAA;DgzzY} z**yMOTmM2Y3-Y``KvY)amBI!9d{XYu@8a}}=-9AyZElI{s$$~8Fh{aXBOh11JR$Gg zOU5x3(*H%;PVl9R>t zx04Q*^m2Ypws2SlPICKGPBWpmJ!Es7iOr@EexmA8ty*)8g$g|i4vwVMRJ`Rns{ywS zpAZ?!iX)(d7a^0seLPnh6cTc?8HiTxe)SVfy|V){Vkh7M%v>4~69?ouXNTr3}YILx}3+R8!c+vcuynX(oArZa#TvSEk~`KOZ?(@uB^s zF#q||p++kIa?5z)-CfZ8)vy2C@Z;syj?jVs%j@BMpHH1=PHdI07P9{bOcBw)r!PFw zcRJ3-COVom%;}NzNDlYaNgv)Z-&ctTVlry~nrUisehU{#n!}*dZOVhjTjNI?O8U5lukF~D>`816aV?W7#nA_nW;Y>;`YYq_M$;f}({!ZJ zC2i+9Tnm=kt-EJ?N`-;WCCHy?uXpbRu57Z|jkipk7W|2IBoBVUiz->2Kg#_o5z$p| zV*7VLKvZ%-GuL!1ee2*r($kYS0+(rjwaF>^UP16FXn!o@GajClgan+`LIoua%~AC2 z*g%{AlC?S>vI)tY2|IznTCeqAaI7Oa>5Aw|TVUTLZd`hPd#3Tb!MIhr?-+@adu6$I zgsy;5l0UpCGhfGhj%4vA_V=5s4$*0g1ciUMO8bxJ@q*rujW(kYUdK5V(Lnh3g}2MC zyij?*+HYPc;}r+Re{V>$&(^pSPhErmh)OBSSM7Rkv z`Hr*x1_2Vp5_^2P%2NF_m5!A&7fsjiq4?JpC8+@2D7-DGk#P1+W z=!QJ@@K4Y{e@<+83(-g* z*i;E&9`5gBFP9FokK`uaKoIl{bnIs|(MD6It=3EamTgPEZeO7utbfW9QohIFN{QBD zrx{?Fp-JZ#*8q#;tGf&ef}X!z_me*80^o{=7h0SH{SBGpphh2%c zX}=`K=T`AxAXb^GZ4>G@^Oz7DHgmR9(MTG?6%wz2|J26l%5p8H)NfY5P&Ft90?S%W zzjq6_itJ{rJSrKDuks!t=+SMEh~;U;cb)N+XXJ;|%xCZ}OD}PI?0o_f=72(EyZ>i* zFE)V68ulTqdx7a47mww;1gVo@kV+0rs zN=uQvipQj+Y%T~QAhIiiyY`bdTo!g@^o85~o5|^y>Z>*HHrd;GQXrm8De1?SwlFs9 z@oM{()M8na=H`J;M~RB3FH*+FiKUHUJjn{+TMX>Bq|S94@3S*y|Kei}Cf?0bDpQA; zs-}zH&la|(S?P6U>n2-=#=vxYC26btr8`bfk9ORi-J1IoTqJ_;xMFEqo#LAb8QvhZ zO?j~*M_y*kMOgkA__~b&m*Nkq5{Y7`aD=eq$%}=o+xNEm{x z@KOv@>ckkdL`b{Ph3H!~?O*ov#2S9Q$K0PCZJc$ShoF&&zgCafTP%Q^kFu9(=aSof zL3VplNej&$>#pxJaG`zH8Q8ws=8f)qkxfZ$ESceBsEYrN)=2c7&mXkSk#wicfFSVp z_I@34Y6P&qg_s8;CWNAz_A$7pcW`9Z2gyN;HHg+;f~ z-aj)l)6ZvI+o22Q1?i2fymNDEl8Z`AIxk3Z8VNa5O0B6bMT{&#k&Y2Bsq54f2AMQP zrU)N5a^2XWvVGQAn1l6)kHqs(A=FG?UIEVmYMNl>l&aEknOic6uL6^M1|k{t&HA)D#7FKy zx7Jz=^v=)7WBUtH|JZH*8b1g^<0gzT&Se6V0M`c~xOoN!rx7A9-}QX6dl3#l+lR6z zfoY+HHwfMbYLahxYEG0F?ZguKFg!xmv;V9bvZLsR>%l^AC1#g{*6U!b{?tM}pV{0} z&|XL%3nQ^-;dr|Fiz1vETK{Jv%6!PB_3*&Zqh-32ywMpPgIzm#;vF=MfpPvckTK`<2B+%k7vJ^9^4=_Y_?`f1RJcLoA;O9s%&@8At(A+UKBiJxWcr3LB%N{Q6nL< zo`xqeCdNZh9u&d&00OH- z1+%JQX7>yG7u+NAph%FRB$VJyfsPUDw&(jtWQpBOF1TmAb7lM87D3=7xuw?z2P=AHlUL2muVF*avK1?ZL>ikseJG=Y8NW5<6qdInN;xaOb%EgH#YNf1Z^FN6x=8lCm})F$()wso{=lLs*BJ3CdG-adm9TPpcyB7H zuVB*HC9GuCGQU-#5dTW1?VZt;hE!S&U$By_-kHrlnq6A%O?(vG&EzOLRD$@-sghv3RSu-oc(wK^)gx9CZx5b-rt%&5Lt|& z4~zdRtK+0tUHn`rR{96aOo0bR4a`jETLL z`5U=#QG*34e0~xFM@udCy^Dkd^D5WdPGn!RIIk2tI*Y6pIjM&ktmUNYJy6@rK?jP;jze0BQN6PM4N&(EbRf6)=-_KUL4o`yH=c{g3pKGIS$xjNd*l)%r!qVj zbS?ex*&Z>nZ*$>8<`iE=jve}zzDTr1>Cr{Pv#N}F_2EEa>d z5|q>%-%+8=I2*HbQG1Z%$$~mn@D=Gne=CsTAoa28VC&#Gu-N-Xhjn5V6n1F9Bw`jQ zh~4ODOi(QO@}WL4A-NddkCVZ2U3}~6gHq1#NPMsE;#g{1Q@?lf%^3_@ZC4dcz3;wBf5>g%n8VBKcx0uQ77Jei*uAm75D-Kpq699nUiOUpMfKT}>s zX7O+YbU;`f-{aE`Bw+ZSZ}!}}zcJ9Ob^|ihVoFsPf|N4q%>^2(>iQ0x1(C{zsY)}b zH&4WWy~fonUUBJbFUX75igneQ8Uw+Y*d9AM5*S;`C2DahhAffT1qasqcKBXv`n4!SA|NFW0ZWKUfF3sGfh@{uNHmH~MDtfs#q5TKAF7ba$gS(a9lLclh_4142O46DQVzth?P8%gUrrBn zkbAwJR{O%L{rWpjAq*0K;jl4KyiJ7mL7gv+61bGxui0iRFO4`wMi9c!{zB+V%mVzG zkPp3gt0sO~VUN)usPl#g6V}{tQOB?c0*r<8p`RNAU9Cm^6&Lc0a=l}x}2Ga`$cp7&;8urS}NPKCV(GFd3(7- z{$n!3r(!Q!T9Y&5ao#cpSA$y;CqtxUT91Ba^W2eo#Jw1QBlPphmWy?r{ z)7k-TZR4pWd+jCYLbS(I=AGx~ZaLbu-tsp;%}(ftq_?|9_u0|ZWDkBNhLkItYdmer z5QZAP8SLzelo6+~>(og`@IdL_Wgj)RX>L*@C;JKE2<&Ru|Ht!jsE=Yl!PjLlZ9Qp5g?M-QTh`M}9j9uMgemsxUewFW=Cpm>IP8{GS z!esIt5m=!PCcu*9ap-u|zAsTxte5`jP^O=dJhlTavaAHQs~KT49Z2)mvr~Qipk%)G-UO;i;`R4$SUHI zvzkZQFo}Rbq@Y)o34wq0uojNp(Sj$Z&2s|FG3wP{_WmIq2eIFb5t?bIj=`J-{emhkG$c=baMB@rg(sWH?!{$ZU_AVc%@1Qwef3j zt8z?-clqyr6s%hFlD~E_!YNjMZ2Us3L9|J`&c|6@;~RJ0FIq?U*6MWD>lJwm6xrgj z3_?eT3v8W6yD}CQ65q7gA{cU>vL?|MrPK_SNR^z`D z>Rj*vA#RshgxLa>Ud(+GE6K+?7~RSjs(=C}-VNiUKrO?CpC}AYsJlSv+;;n&PNd%@Q1eSc7?gh%#b=z9-3JF#}RmU%iY70D(b5W6cu>^?Qz4W^|Fi6*dE8II9wK{0pX)NW907K2(t zD4a;+cAgy^xCml%`N&_P4%%2DB0iT~L*aE}bI>)%uEe@-87mdExn%ae6pZa3o2#&3Nlp)Zt~* zw+zOvC1jMk_4U2Fwla^0HMgPR;g4e4Ljxp!ql^EHJob__bnm~g{Di?})cvDfXX#dE zCwQ)B%!=RUc_%`fG+k$Cva$+up;Zn!erqU(IryF9MA9FHj>!*8CcRY^2&2hNBt{rRkibpo0Cd@86}qGJ8v*Gw>E9 zBv?_>Di7}y@m5zeoI)s3gGEFpLZGF1&#-oV-$Wd=HfH-7q5E6N3e8>g^G+utY&{Od)QyMgFBDU>^V?7ccW^o2Tl= zO<=|C*nCP=+B`JTP6&5`v#m>_)YSJYr~KZj$HO3s9U-@|0bsd-a|D`Dy0QP}S2=Nu zn~kzHG$58}uKhb{?u1>gRx(pifF3WZ-kHO^ixq_ejJ|PpN%kF?Aa2a;BBUkK#1@$6d&QFb6vImQpu0cEG>4cwNFDMVO*7>U#mn=g8f7I zbGyA{vEDRP`sD}O%L^GySQ5YmNns*#-`vQ1{c}6sqbcvvpq8;#AQGXqBxa~0sZR)7 zP9H@Qwag$7;7$S=1vlxBze&k|QIX1-!Q)zi!_XOjuRJ^rzXOx^x!wc?`B}NhuN2-SRw4#V{J1n%PwX#rx$M|lYk20h!o1JD&I7MT+ zv|3-)1$BIEpk45=Z0N+RcLa&ad@m|Eh zF+B98&WhUI>?a;Y|L%47iHBjv)D0{}Bw)Tz3bc^K(Gt|_6UQRL9w^YwH*(_oFF?CdZVBc()>hc_V;QNJd zhn#W=Vg^dB1QOCcAnbx$Mq&!2Vm~lvjD4k~#K754uh*zCmFIOn>;z!?h4X{=YMxZS zvUa_-^guLGv0~0gTqb?z+Oy@l2vj28$z~TTataE3;ECs)oE%_$UB}R%=DLh{F4AU4 zhs92lVtvCg+Pgfg$bd4KcR^Y&=ZE{ms_R$GqM34zEwyK;zaZAPw-d)6P{GNnQDs)c zKo?G`w30x{f1#0$A{TI69sKu|LXYn;A;m6VT9i^II0!{&El)jShvs;| zyq4wY&0CvOg%t?(x`Nw{_5SkpJmW;fPs+ub&a~auzgs`jNf*kuzU#NkBI-yKH0qm8 zWZ=CSGj~{r-W^I~p_4lBm^vULmcziUnsQl@2+C|pB;&Y|D@S4p!*Ak=us@BiuVW~g z9LW58+Ym-TzQgFR0DTl%nOMM}hI*%|hj88dpoB_=x?zY&!;tfeqrSR+23w(#4;O~+ zAZ$@%U23DwA!W$63jSuxk_`)$disK4p&TSc9#F&xZ1rq?!_!du$s@vF9D*JqEVfBV zKV^sBEioh`AzmvMD)*$noUs@K*0)~K->h!CI0?65B2IH8u1Z`q{lG{nmQ7AT7L>8= z%PfBTU6`fyp4qq?4r|zfznsU{Pmn(}s`lv?a4|)0|Al3F#G@H1VHc z)iICtcL2*eMnHG8I1V=Q$}FuuX*hHTtjzO6yF-Ft(z1+xdlJx$YtJam)zg^>q)S>J zPBjxbyozm9KWj0oGS2V6S~{LrS7e-jG3c@WO-aWw`pg=?N%|?~9?`gqm4hK8iFk-S zPB=^3@dub;Z2+dX^J$WWB18RuEjNC-;b(^Cll@FDz~w6@SIk!(OEL^RBzMpl2}bqf zgrB@E`!7iqAOARpMM~44SGC)HK5Wf2rV^Uzue-q+Ct+dpmN{DITv{lr4-~=&wg!CM zB$jre_UfILr;%N zqH$mtGj)PhXi+cIj05C@QjQ2L95P;~B#FM>8J4Bk*CN zp$3rmH$p-0MR8J?D(&(QjgW$mRobn;nwc(I zcoDrs-w(Yb5&TD0cxWY{c#%n_IM#r@84-#Sw1MpFi^*lAlYsvko6ny}WaS#OXA*CZ!0@?)GP01(W;ae#ga zH*=D!jm*^5Afwpg9OPc*D)M*hHCn2z*my&Ib-;*;JgIx+d?^2FO`fAdot2 z6@z7IJwz&sCj#AHdvOEgsr;9YQu42O!;MaHnW}Ox3l858{%r!zPJC>YUV@;(zhYwN z#wq4Zo_goJ2i?BNcD)oZOm>N)2%?ljv<|lDAGI;mgAi1zv-2<(HstMkAGDOQN+QwE z3$|}dEDpEa#py-y9(+TKiky+JUTA-Wzd`2g5!D6XB_Cf%D1fq#d`JQJu_pv(s@8`W z0LVXc^I!ihbp8_bkJjCOcEO6q41w}HotvpN`(spB=Bd^+V!1q4?FIHHMuX)ZeIlp$ zd+Yf%R_OkaNJJzfd7M4xk{RQ7hU1)EP5;k2i#1b*j@N>NX%i&C)!d}WrHi5vfp z9R1FSyWf1a{K#Tda_~I_3=Xo@%XA7gjY|5f>kAwr5_KJcIT7r3r!#IpNi-=DJ6E&iGVd4?K4&y=Mb3LW`1nJ0CLhN zgsTM<9~#4TfUO=)6diK+f_ted4qkks{NHpUcmHZ1y#@*Gl_WA&jQZ#?GpQ_%tTVe+3VdsfHehz&U8r0>%G1aXziC1zpg>%k#j%{ENov}$kA zjDejA~-EGjT{X_j;_j)J7t1yVo|Ick*-}Pf<~QOvh}G$+dMOU4 z#Uf+g@YYL!kt)MtS?UPg`2BrA%5>h(NZa>0^HbLNJ~gHyVV+VdU1ch+JotQkqjTxT z^tk@V9zfuO-0@M4X&2j72LAk?ySo%aXxO^Ny|mWP5b zYhJ9Hkfn!{2sQMxl#-S8En#MGm${RU$xZ*h8VjmI+BCvt3b$iv#BC=h9y z<($nZSfzvNbi25kS`AtwMsKnte=~XPes;R#`i+`uHp_@gg$6PD^jVq%z@1_sO1H^0 z=O--wcYjQF?FYe94$k2eCw-<;HPty!Pfg~%pC*xb86#Ul!)x}~MS}=OYME+Vx|e8) z-u|JlPG=n$g7^jG?8?JVphi%P;RPJa=^CkO6DQRJt-)1`wuJBLQ#0lNW9u5D>x#a7 z(5SI(Cynhijcwbuoiw)9ps|z2w(Z8YZO!e>{MVWf^FF*!@2>Ukz2}_0_YZqhYE)px zYWfO7KO*5R#HaL$%C|nr224f`>YJX1OK0o(2JYc4hHt!w$A80JP6Dm_*gjIZ1kIHw zrAbiCT6tQAV>2sq{;jIbSUgv4S9KmpvgIaRP!1k0tO&X-b;@lqi=!#JayCa-zp z(`z`O2I0#%PYEvvzlLXUa+t#Pe_rvB8jgrA!sw!46KC>x9Hh*`9OcJjzBJA5H;vD)#D!ZFcWuxc92U4+0bB#niKfl2F zd}}Ju1jkf5`nQaf06@nVxHSnryqVa0Y_M5X6b$u&{)?^o9bjDUOa8KUq~lV*N5E~~ z`i(zZ@ZR3Z$G_DqDU^o<)=Yi5)sK}9L4+YWt`GO|!(Hk)A8ZdGxWMb~i#0{Tr2SDE z_vhX$ONy3vv6 zCP(sg@gV>baJlx!kf)bqa*zIQDHE5pH&ar`eUN*Cy3Aw}M;|s9edxdB7K@15!IqAX z@Y;Gut3NRo!r`qTUNvj>_}U%>oi>d6^x&L(rQzD?8Gell$X%Zw>coLMb}XclyG%JD z5dd}xz3wY?vCgS}UGxq4^+eM%V5s0nK)GVBKH&6n6cre4$p+^jk*I3hIH=~T73DmZ#20e|pWbIJ`RI;a^`m6J zgQK@ZZ>WW2wmv=~cx<8l&Ko*hWj~X1U%Qkg-8z%oDzCcZkLEqfxhgHdx6TwLn<@OD zhmxXh6)|MvYIAL?N+IB~ZQZ63SoQsT4U`!%NLwA&;X? zS9JU}@Fj;|C2ZN;Xm(T{tuT!+L|C%9tD4Zy?zVHZ)3WS9*t6DzYR99PsCAHRhwqzF zivB@$>aePp?9b+E%`c}pc9UTuV#|(i2cz#4hev8I*Q3NB3{I z3p)l(>uS6nZ9@?7Bcv(v4F@6seNyMMs5y_~tGL&}c=~u6Qy=oNzQ996!r`sMqGRx^ zQi|QzbZPdQr_-LFP;-S+n9M9JFwoFMG&B)_MUF=}{piSCwMu(rp@A7Z*RsJ zj2N3gY$OX6@h`eckqT-N?HXf&xjQpbu{F-dsM$7Z={PmtE4b4}C+8-EL$2}5?a9>+ zkxc%^*be5)WLZ>A@ydtq`{@}SwfBLH`?eEL@ovH4G)|oK0Ne;cddsGlm?mGcKX*Ar zy4fZ;XUpO|5ySe6kT6&27yVUUzI3&UZ$5fsvyWLj7ySdo^}qn$)lT2DO-p0xG2Swc zghba7A@QIj;%cwXDX9W=WFv*98a4U2dh)_B<{1S=_EjZKshee}?E-CNWQx<&fj`#K zApmF~jfE-{?2hg6JPGwwyF63zrqCCjNFmCHEgfz7b(SS-h8ngj+EKUzaJg;meca&j zoAw&l5+_O=J=_0|M4UJz6uz=A26;H+_$Pqa^dZm-k<6ga)QP5k3y^9>3C7jJ{%eDy`4Ch&3O^EI)T>QDslXoIc0aI3qPOF>!E{$jN~ zJmHv-Tcl_<%C}r4zRp)8O6Rg}=4 z%H*ZJl!nW9<4_B@3^w~wl0>AK119CY0n{1oABxAv8YnQ*pNxTKAy9QzO#!rO6G;q| zMjMOq_0$hK9S=e!M&t4*egZJ%n8IyoFtMJ@X|m_pcJo>4?RilTb;u48FHJR71$F)1Q0 zBYBT52~kn@IY!(<6*kEqLh4}!TXM-+9VR@pVi*AFtk3}I-!{)31gH4;~;Tvp{zH8 zxmm{PzBF7y`O^ZBRUx|E6+3{FZ%(M?(y=eOo2oNLU&tAa(7^xWmdt}Q&hReFq$-6W zwESjg+G|QurpsDR+uiq2d!&Em?j$n69zTnNoU)$+1rB&*S69uzoTbWM#rp64P7F!r z+KTq~85>RP4$u|;r0)Rv(0UF{5gTB-xm3^Y{5WfdUuI`qK7FPeQt;dk(yx;@#|r0K6D2A9BEx7Sgi znS`6;bqt0GQGYjGM5Z(4te+DXl9`JAi|Qr)vd3~@N6pL>TgDxK@ZMY>JuN(T>*V#xXX6X zR7SbH9=>5j26uQp&Xy+LHfF`eb+@{lVsYC4{`L7!Xej-Q{U6AHL`WFhqff-ewXE=g zLj-8Wbvry28Z1@jE!hAj#9nye4cF8Aouf!`{!M0xxrFl?Gei07u4Bw3T^`+arH*;D zY>oa?FDY-`UfLM{py808g9{3(pL3;%LVIhXn9z=~FeSg}!Sb>H$r|zPukvCGp4e;x zZNjY@4zOc^9v%H_L}#4$PG*6iaavVodJX946vfiUGf}!~+lbZ%G+sODRp?VEBUViH=h=P~38 zApz>*I3eR!-0bj!d`c$)0nxpwy)2!|t-uD<7MA3C-?%^3DFU{T@0XMn?Xw3!+Tx*S zNTTS;9?a0n(FBWmwb(VO2RS$nxpJ7Es}vUna(fg$_SfPvrX5*zK>93Ly>D5E;FS4nmLE+UMG0ua3%jaD+)ql%`}Iv zn3Q~(PTWFaR6Dq9(fU(Mn`&fVu+FL@#Y)Z3S0l20RbNkkG}q!RI+vjZ#a|-5exiqk zB_DH23G3B1MGLxD;(>1ng?$yV?s?b5xUYM1@q2FY70W7?G|=u8fxGfAhbcE9FeT+L7GZ+P`-&~SZI7TP434809v zB3`m)KcH9mN7krLB-dLUA5v*(@XHQvKKr2ax{Z~{#-Z#CHdzLtkk;A@0RCC=ADUi{t>7K)YnyMG*g z==W?P`dlFCB$P$ys>+F+F(+jd9GxS8bbj}Oy1BLURIJJ<)mE6SlBx0L?TAa=81FN# zooNn8SYO@2D`exioW9<`HK3o7ytkx%y4i(pe9xnGQZRkw27hJ84*$krVoh6YqdIl? ze*A0=0uT@B{E{MoB$k;gQ^1gdQ+pKkvKbM~hFzUc#%pKA;?(-J2#KT|j{JrK&ViTl z^g84VjfwY-IX=I~Ja&QNW7Z~PS|w{W-sIws6ClIz=);KzDhbJ|m}Yr_4Arkj^Rq_u zLco06)G>{AcP1__EjnrF~1sn#e`y(z;ve1)E!q2_cWb745lfU<438vl^dprYvkVl%o zDbz`zC`r0DQCa<}Nhn$~YSDvY%Or_Cp^0|iY8OIdKjqf4UtIY=1hzuMkUSyPW`;u% zp>DfkwD0Gqx0r9y0YU0!twrdAadpo!LB5h_)Qte!N!`|pNVQ4}JG0^%rLe+&fp8LP zVsera20a0b5&LpjIa&V4``1|7QLn$aUom9a;yb6wXq|jqE$3prXRSz!3BB{2EJT@QT)q8{6+6 z7>Li#jwuZK>HNQDgoNW-6A=`{+>_P?!_hFj{<^yNd)GTb5W@fyV3@duYuT3^lG#Zs zA{yqvu(%J9?MJoxk{i4$x+}&%yRObaS-EWve9liVJ)BCE%Q9)zs`^s_?Z0;)84Vl5 z>D;=;sl4O(qd{moY+?=m`U$u-x*XusY~57A3OgPp&U z-+K++`dOkngGp)u30ZloPb~eaTJ^~Lt!ofu?NQII7l;&YP=^c|)Ktzn=CsKuIP)DG zVtd5#C_*Gse$uLCr1^?jvraQ~rc2CHe)Gh`f_VEUckS6k;J;Zko{G_wrgw@uvWMp~ zhUd69bMl#LNslLsAkrsHWpns_-to_0b=wYb4*}x}De3O<-QC@4P5Z@2iNueSnw|oJ zwgC5p&rGt2Sz=`0FG3x#s*fX%5o}*W0&Ui{0?KK|84EalZZ1iO^UtES4=k z>8a3It?vJ^8a2kN>8t2UcltIr#d_s%Mb6WUj)?$5&GZ}7CBJFXDZo_JK_i?htDc10 zHD}^w)uoaExS`Wit?fA3gDAa&c!`owamU`Y-OwUOb_tti%%__%AZmO=*DHvMW$ypq zo4LLzcpKV$CHr)(9DiQe@p}S7vzHa=IkXxMcN=mN~7Yv#2h0nAM#- zcc))L;ve5KS8hdf(mK+K||fLVbQPbgOw%iuno|J8z^@=4f#bxusxF1z9wZ)MXePN6l zBPum+Rdm{3MlXXybInj_nT1IBh$9w*>r)=hKZ*w!%lblNSHp|`OdA!_5q=_1MZtOR z#mjzdKm>d`#AGvOY1PQ?j)dV|WGXZx*d;%{y_YNG-+nvcMRN;%aXfuv_klTCGZ^5Y zP9Bw1DN}x~Z7!D9h|kLEkS$cSp}7TrZ9a?>Cj&n6g_7tXz{)yTt&}2(mv3{m0c@f} zK#j%acHudIUoBVJtRMIu%$cOBPsFyl9!t%?meacbb3_%F%d;Ww6e6117{zh`BA+>} zC3DwT3mQ>*x?T~BJ3knFr#>#rnti`GATJeLhEV~f7^lx<|GXQo zS$*Y;!q`R^{CFD8=nsJ<(w~=IVFj-65S~Bb>#$RqN2S!PI33se%`P{6!B+rv))QcD z^UxFVwAO3Y>}ycoE>`KxjKYvfjyd@OFzuZ7!^4<_BJSRol?f>Z2G?KV`3Mkx>)I^p z&swm2#a`l=Rsh2#;u#ukC$}7oMj&Ps>~*_cV6`c6W?Ge-s{do&5~3gniHdyj?#8m~ zg)RpVPr}-N%MUQaOMvF|dv5ZPI5hy5=+G#?|4|rwjuavV$oLt+OcQe7Z^npY<9%Hj zu^kJcK>wHeB)iMp^jwq<;0O)#P2i3Rk7&cscLj$2dpY<0J6B-i!&xl&$q<(L;!B;x z=E%ICsPfz{H==MkVgNH55T{Bt>L_3_zUg1AwSatqgaqWY(uPJxfTj@c{$yeIY`L!e zW|THw8m4x)YrX{YyD(sr#g<= z%6w9fOzwdD$VhYqI21-hl4FF6g4x|!b5dIBF_c~4}!iu*JkT_FE!hZz!LM) zj*2=_xg0~OmRwPMcs{ZQ5>lyGJq;-S9eC4_$%pM5$*@uBe-x+m6b-aE| zOrjai9mFOtR0?_Xa!~X1_?1YBMJW%y^#Xg`s zzOXtT%6^B;_ToxC6oX`W?}Lt_aDVUc=5Ba&3u6Y9u^!v^yf61~1*-5||NilL?2SeT zV}`BH1q3cN;b-}iFg8G!{Bwrd5)nP{qpUXFkPSc47C74>i5W^0L2$EBDyp1y#2u!c zsYF5lc4@FjC`7X-9!t+%Xf~wsb)z}pqLhlhvr`AYKBll#lVc_dIMk&y+-`~omC8Qc$`lZ&6r1%sO|FgmGD zob1XrHsc%Na?nlnJ79KVfm|>ek3jwQd`hz~^v?Mq>qSt8xr<~Y$$UA5wxRA8(bT$d zwe<1q-#WgU*lQ(_*(*oCU%hyFxa^wzd{+!RnT2x~LAt-iI`6R#qBSZp=H|~x8<2!WpE#zX(It)y zhAUB6vx|qNBI7zaDPVQ9K`m7||z6sa=Ydw8)qxC$Vg*|f9fb;NSLuR4( zthm|aP#%+w2*p`t<6ugsTxXmd(&d)o^eijjPMfLsX&)_r3fMWO1dwKa{Bk=w;^K_N z%z-6l?!9j%Z1lQZ_ z_U-U@8$HTo0EB>uNn-_%w}1~BBhoAR=rd{Iv>wif;;`#tu!}P9jdI?Ts&(&xeSwto(N~PZt@?Y% z6B3Ya?w0r5w_F)O843mY&#^NFF63v_=r@;Ro?N}s+z1ty#VoQwE$lXgqIk5cKx~|< zBzEa`<*+DmU&(i1*wmO|8u} zT}|NOS|CWa*onG4J2MkbP+=ugo1RiYfbeGzh`(l~X!!z3YU;XX!35;krz|@cI>v_({;_ahWd_q|JDXB8d>wjk1WGQ55?7uDu4p~=m?K5R(cm@ zaBig}o*Yf6W|kHz-a07Jd#%apU#^#Y42A$QcmjFOFWCOCug?Z-KSXN}abFpv;OEUr ziXGQiIW+iO{`PP0ivF{2$DF^Z*Y~oWdK`R1U%)B;r|V*E6^QN|(vCEp(5Wc0%(r@Y zaDI5VvA3{$6XXV@KxA3WHKspPj3h+=y@aDwMr0T(%#1>WPdZm-D=bjp?M~^+A%i zT&T;{kS@5#v+71BlH`OiM7i&sW!nLI_?Lt6FyjeNx=1xkECHriJAp`|7w%(Q+{Tlm z^$DlDg$f8uQ332Tidu<6K(~3h>@o2x%&WVB^>OpIBG~f6YWt967$k}iU&uWzXn@vd z`GNm~=c7w_bRI+$#OSN=gr~ihUtF!8@T4z&Anc z*7ulFz+?hs1c`rxh=K}$QI1s<1LrZ7(>Dw(fJ(9HI>KI}j0?F(18nO>z8b@812~OU zEk21)zY66|$mw?Jl_G3Y{sf6xOqWZHkoOG}L7e7T^)z)+-d+^d(cAFhwysPXqu~HX zQQ@YS8teO7W<0ir&FPE&I=6FRnQ47myECpu1zn*eUUkkgL5! zxmwc+oS{agVp%5JwPt34rr1xNBuVo1HaAK}#yBwokD%whYk=wUO~ zF4yT?ze;m0>q8~1ClHV`SJ@z39>76Tr+(?aSmgSylFGfNW8serJR6RLo{l_sB52amWk^$&ggPZ4T{)}iH)SL#83<9{zKS|f{g=5T78sHA7 zKhBt(2K_E9y0)g-y!>s}hNQPpx$?|ov`A5l%ZZ4f6fN72E45S)qt-KE`k{gQ*N<;E zgMlWNkoWNYQ*yn4K=)hyYxml>WRyMc8(q%6oG}CaO+kWll@~h-ma%^@2|@cNAJ~{- z0I=6|@%@}2rYlsRY_l_f^r8V}owO{59NS`U_TAf&i?ytJ@5muv>lcvqMSL>kjnf1% z$_t}Sr+*6Me43Viorhxoh%^%S4-GK$-ydic0kgETy8+DS>pkNdG_Gg!PFstdsf;&j zL!q^wzn!)mUoyi1Uk-Oi^uOD*E+beeS_ zCJWP#{#v(i|5_QS`cqRe(-(@%tZSTS?DDjW#rl+4c~K4Xr0YguRDqT-iq^Ql-oBTl zWA$9qERSeRwzwyi-etrvV5;le&QA`JI3KG^dC}Mj(|1$SEZgbpF>dh1`h^r4qB3$T ztTlnCsBa2Y6&iNGCGz#TwJCk1OY*j>dbZzMHoNSkG?wZo#HH&qzP|@6LnA6Nooqn! zrzs6fB^Jt%5wc;@xoP z$k{>Rfw{KC@WqQ&J$>blX{Q8h=)HHoKgXsZe9|1#*;W6T}h}Vf}8`A6XoN-)UKo%${Kyn$y2T z1W)eKSf4YG#KFf2FCuEjGPZL;ZAI<7cnrGlWDk0LH#FHq@s}rfY^5P*3DyJ*Wz15H zTBN1pS|2ar``eb!!B-V5K&MVq{b71dn-Pbc$?_R;@s-AMDS18OM5dEs@SP3!wnk# zCEj?=2rXS0M2k%@_E;?`8^}T+pl_kqBZtAf?sh?Hx&m9O2HV+88p_o;{TuHTWoqz- zD+N?vVb9l|1t}^stVTu}6qKzGhpNlut7YS`ZtlhV(p2-E3F{6q9QV?K8BB*14FAkE z-g1R(B2V^^n%*H>x?V8X_#gN>J}h>owm9`v;96i804@MN9M<)D76R%(9JZjJ+j+rJAhI$v#98g0h1 z+&02Tj7fNTGlAh82`MRqc_NXLj|O$iB-fqA_3G06@9H2AS#(>gn@ZG7t60y^wv&6q zw92Nr;U)5qg6!Pi(xL)yfB8&Nu_9yB=u#l~vT?Jftr^xq5$FH5jD+q@G)-`7MAsMi zv*7r0iah|~CWr7y&B6JYnmpojd&EPL^y~6A3!(PJiFEOC@rBG9@6YNq2qN)ijP3A5 zgUh!|UbPCEZSB@%5dn<4H%yO-==t)eyGSAK_1~l{W0KyPJk)yRx=NCx#-_{dv&J1A zPt*U=0_+$~ZDtXZ&PgV_Kc1tavKkw6!!UQ~>PQBG1O=5artf8(tytwLT{>TM@nnj^ z2Zo2M-uBfR-oVljTnSu@lkF1xMa8SQks{&TI{D0-<9by<_J04tB$}ATbsL$+qNnIa za!+$G&al&fDU4n)SH|dhHupOYlbF6~;xE3asgH7ZZFQObkdMZiuN4+w+lw5FW_x?k zD%6weTu?|!Sfq;6PC??{nX3}?LuQ8c^ThBy-x?*^1un*9y~K<;>r>^<7x{e6IK7`o zyOea=s}Hj;6c9*)8dR}K)F9bHy2|{DDSWYCn%d&Jv9{>;#3llfka9Vd{0E79T)BnD zLE51!gaR-51(nFsAQe>Ka%P)SlT745Tb?LPLP+-d9D|IXz{EjucF0ULX@|VQuh|^T zB~C#o);e77#Q$^=!T>|fprd$_?iZ4s-cj5XP0@rDn-iEPlBdRy@=T~1HI|D7SOo_M zBak?W#aE{FB)iJMag*+);%inz;z)C7Uyr`<21M;67oI~wb0z*h+a+TJJ%YHqJNn@l zM0Fk77Em_Y`4@Z}x>Ny;4>srx8GNc z$fVrNBW5L2_O`L#Iul=%6zR^^lcHpcd(G>Wy6!b}-Pt3=L{Dl~4UUGT2W5w^X)zyz zaTZv|z4UfoUkOHbDiOavJ)NshW;Wc+?`f+tNNlyba)145Q-7MEYT(rQ2B!5*2vUzL ztP&gs-lyv8qQx+^E8+=4*HZcuG;!YG_~w`zPv%?8h@sKwY@hV`Vw|1p%kDx)ypA=6 zG(dh7PYBk2 zH!Jn8+hq2ud3RxlE2!c@ul;M`ii5}3)I>_Tgsd!?O3emN`z;W799Dh69-Ah8vkpwn zG2HC*(G8hp|3wF;_n0){XOiPn8VvCH3s%oHQ6wiSFh4L02F;Ose@g&zVeG?0B?po^ ztZ2yr6&PeZNz?#`#4^tq)1>X^8C!Mcbg}F~dH;#8zdAV_PWudwjMl+lqgdD}?njDm zvxwK8D=xd6iB=~Y31xUcb(Sq*+wjqSdC}kpZ(suDx~K{+CvvqHC$W*#s>`+)KEsc# zCr-Y<{Tc62eu_7mJXNY|4Kbozt6rQz{ix0nCAFackgxMZqLkD6qfVt_h{tbPq#7L& ze%hs{+3U}rJMJwJWfmE6z877V2}Vj*a8@RQ3F~x#$z&|ZX``J~9`DJf=dIFzH!|}D z;(M0nci{S5H^f8N(Af0wSfx}N4LDIAQi4&_8zqIi6O2*XDY4tF-Q~0O%)LZ1YWkWw z+x+;J%jdl-(4$4#q-sB^gHM9_S5`1r5s{(O6oOpdcWs1YY*miieZJRm>rIQD0hrWI zGEWfDrym}2Sh#;Mjw0finXl0!6?kTlYDW9XS#N&@XM}!mqY-yBQ@?fYDT3clFR`0H=;4Y7V74WQKC~; zs233r`8j%62@S(k9OdKVA7`*g{mHZC?kNpbKkAFm5JyP*Wu7F}1|^_|6DGW4*u670 ziY_eBf=}q|Oetl6c$6&kGe)3Zuxb}{|CTj~%mZer(%MhpieQqJ%5Nl>DXexVY>lN2 zIl-#F);Gnm3g5oWlK`0Z@;uDu4WR(qAO_8g6r8&I6w{Pf25oR(c=OB?uvu z#<4P|+&MBQ*rxMByyWLU_M=Pu1t?sEG56j{xc#)g$~{&Lfph$=u;)1G4|b&QN(lU} z)BiYJAVJNFBf}@mb{fKBHhFbi%v|kw-mrKxh--IsTHTe9lOtzpYHHE;_V%xrt4`<3 z2`vC0k4(DW08AP&EwbXf;`ZAOK3H0;Q^G}pVEF?5U@(aFdgiRN%X-J@N_h+ zZ&A&ikc1Ti5|z#JFHPdcTcNVVw@yA)hR++Uu9@SsZhmHta20$>Bl$X(w^zLa;nNTf zoA+!__CK(zX;g3o8~%oJKAhV4Z=W$)?JZWLGqiptUunir92ZycIyn*OTz)k;BKzzl zEXTwWuP8h?i7_dzDOpfQcBxmpFw(Ag!8Q(@rkrJ|cx#^R4%rX4{VFXc^84S)Z|pSS z{jf&J@zLm??%B3pGSpw5A}^$g(p~@IaWrDR@mU`i-$(j%jz|imzz^k~B`Tz0K2Q^9 z0>%`=#g4T1aMLY6V@kx?=1ljP47ADG9x~Fo%KcM|mA~o7Myk}^QL=Egu-9v%$MPoo zNR+Q82djOgPAx0b+I8XVHe5_2v;1npeSYiXYpOXR-Q>=f)p5@-#$Jsvz^yZ2JBTyLt(P;r8I*HAgSVoOV>He8`@+htTlt z{5q^@$_i=lZ4j{L`4Z^!HXLGgWkE4A`*$pur|-J9N)9N*bp4tirxh&kk=9t%Q^DhL7+bfip1(LBZP+WKAWA^e2Du+M>B z@%jvpcH6+R>Fx1}lWl<9wX3eEQ&;_-zRpUs@@t(2&i>v?Sd61zeEE2kp?utE6bswK zr6}6SL~E|x9j$`KhZ*n?*gP0^g z0*^MC!{yksX__i==QD(O2Nf$-Q_Da39d^EGR;Gl7LFarh;Y7oQP8e}(RjOio5HR@D zf<3#-+3P5mDAP2FSJ-WK-kq;|Gv!t3Ufk?hbtDe{FS<*3Dh{%b_qi3(@oe$MFz0{TYFc_1b2eiKgjtMcbuB8*lX9G$ZtVa&#-lkC zZ*5z2W8qX+p?Iw~h>Wkocd57A%?>P6>>(w+f9qWBe|Ho6t>b zeAy2tqcAT~6C0+iR2{gfMs)|ab)IE5ac)EiCBaOp=df^4x%td^R!Nzzic(o8wujso z+$NmTznldj)Zsm&7q*q&zJAQt!uI^ro1$O z3X7Fm%$6AHGM;kawm9iGrw06yE#BFNy0cz2$dj9rr{G5pA22-J2(9IGP?Su5JVhV9 zI}9q|c9`uAp@TdakD$#eQ7GNoZ8B=P4Uk44V454=^-isz%GG0d{3@PZqN~zpXO)n4 z<4E6xFtO(x5xgf1Z=+?g+|FEcr+$C(MWLhY(q6SPgq^M-h?ZKPm>XTdFSWZL)9Kht z43fH3_2e(Y&SZdrG&Z416$zz32t7HCwMF?^Eh-7C5RkF#Ll zwqCN|40QM``Zb}$8_FB#9@Uskn4}?UTyOz=gV;QsnfKiUa)H;0IBnJPLx|bP*HGCz z?}|gdS8Xt3kdGpUa?<{&u2fm{ovEGY$TM?2SW49A@|vpI}+2S!>;V>7NcfkX&LKl6%W>Q=S3x2SxJ9kva5OKg-2=`@J-X z^5j`xe9k*WbWSo>@AO8uWQ|vk=bU38<_y$|tuT3h=mK$Qz`9{hnF;4Ul)P;YYqKtm zXGO(iS=Y^wf?r5#{fSYi0VhLsfu%;xhxx1YxVDSMQ_RJB+dqs7=+gppLEya^Ce7q_ ziI`V@KE9YOgaxL~0YZ+S|60Gfo~b{aE&s5+7^wb&-rWWMkANWbeIk~SkVr~OvcFj4 z8aF+3`dv^E1cX);TwE!@Kmm*lX`^~n%5iHlYJ8dU(P*WN#@SVyA!5oL7fRIHC-Z+v z{Hti~SY)`);)Y2ou(|tpaIf~0&+Mj@#ehvF;XWy?5|39cV6i;x3tKq69r^B+mEc2e zR?3K8hvxk0=f(mDMDzJIqi4*O>K9>3&Tx=6e2Q<=sHdTL&FWZ7Q+~6Ms=}qp~fun^Zqo2i*^A5s@(k)-EDvP&uSm`L4voN$~%!N-HlFjnFtFVZI_$g zp?sJ>m2_7+?q%ageEg)-@j7YJ2HzVhN>2N3_9h*NJ3T^_Gf`F!{0b)LEs$5 zlKa^y*@~|EHRhCBt&nKuW`GAQ$g3=&WLM-s_L6z17zW40XC&|KFW^-L{tAlB`M zW58=mntcIn^q>XV87!A}s{;&?|0iCNY*>*_s?!~I!lY6xcVS;-YHBk!o@btFG!bxk z?bnz&y1y=9DNbspUm4OHU8JUV0c)GB41&o?l|TPtq0S&OU|>wDxzKC5&J@Ag2e`l3^fYnOdp>C5FJeRFxqn3ks|Amcl>wPnA?Ue?DZ$9N{T0aT{7dx23 zw1Ri=(J#!uZrXg`Ii}6*wN3y}f3ky4V#>{PHgl4R5r_byt|j5?^quHAc2e6NE`BW# zk(j7DZLTJxNz_Nq+|m@NJZ=|z;gs1__c=h|fo14=W43I-saqcZTd9@K?Q%kXECupO zuy=Tvs#QwM!?Q{UaUry=p)-Pc1CQbQA|dBkvW7>+tVx}Bc9}I}xEnjSU(C~zJD~$V z!uh~#@hS!yV&tbTz}Go+Be{O?z2^lB{Uxn7-8K1Zf~DH55sg0xjsI_=VP4hu%L`Eu zP;G}2bBUt`ac+4fpry_?FEC;PUZqG?(!tUOhcaAMV#u24YYGijQpjeC%$DNvIPH7L zFa~Jo>lu*JG$nte9~R;f5qncv$=^ENsVY z!oU7j^%ir}mJR%iP)PnW=JlB9=sI_3)IWQ+PJ0Y?=Mnzk(CT)cNd}c}VI(Ep?0V7J z`Eci&tM|F~bnX*k`p={O)z3stvHhb_=L*@6#Z&e~z;tVZKS6oEm-_|9avX|5{Ze6zj=1Chq%O(m8`N@~qzRWnnr! zpC4~TUBrT!xaYhIw89*+gqx>=#Vv%;2J3g}oXx?<24K5`jD81Rv7PiS13aYrqs!&J zLcArv=UCU5w%vQ~5A{o}X{oLR&haa)@#CJzKNvj-|NaGpgn0$@R-q5iv8Lf+M z6eW%)1i#j0Wv>OIydA%5ltKRN@$b>UYUB6+WCvza5sr_K-)R-Sc;_mXdM}jIle}-y z6%f8r4qrZOv6fT?x_NqAw3PClPLMuUbQw>@>U3gcOEXPie|pPq;eYe@!#!gwv+zvX zJR1#MsN!~fs4$rW^k5*~`FRE7H2Um9qMUzZH5%8&Ug@C2|6o!kK0yiL;SK##5C}`F zE!w?%5(m{4NkTw4KgQlqs{)epq{esTgk1^Y+#St>XXuOldMD(%bsl7Jy-+MaN+Gb8 z-U7Tim%%-RAUy2Yv>pB+_oHUdjJJ|InV(d?chDYtWh3;859gL;ZJNuAMqxOE5m7a} znN38({bWJ*!zz={KB+!ugIX#HMR;Q@#Lq@S`)DFS4FhYbG}zW9o9v4-&v?K0cg9ZT6@fWzA|m8oQML`axExR=0LrHms;C zD?2Y4GpnpnHSnfQ9Qcon`=O1Dj1Ug=_t&>9y-rL`33vgL9!rAAd)A}&kn-04*R>><#Ii2%s;S0HR~9sYljisM3=?3B}z)K-R+ON+4B%d z%)ka|+FdU7=<BwA+C{)hI2(xwctC|H{^vOW zwQU|UI=V?6)rcyeitC_=kaz42KHo036AhQ%jR!w9~TfPx~*EcAJDA+ zM(X?Y&TFr@@`nzHkhb^~hhLQyFT4FYt8bxLEU5JN$=1UhLb;kQ3jc|RhSh7JDT#{ji z#mSpEN4?+1@zz`$6w~yCvDVmfjK^Z;5sNB#*m+#&Z#ge%O@aV-EH>1q%m5UXK*bwKrW;))Ic_{$8%h@EuV%a9JNiV0!N9N$bgN2dq(=d8sIbtwv?pUU8QkYCI|RapxKz7*9VlGN+ZExtE2)hMfKOq$l82VSq|FiXhbI^~g(Rx`Zm0pJtM}%*>#mP+9=Uyd+K~EMK zi3+IIjkkM)3(t9gR#iZE8DL!2It1ZsAAE6ItMtM9AON`*_i6ocZW_<*a?~=q_|^35 z(pQe0oj1*AYE$^K995(JHS^L3zAa;12vx__wntx;W?Ds1XE%hRso&|OX_4xsgR*-B z{2?5-i^F%(;5YrG+HLs?H8mSF-J)>_SMf8@{GV@`D`AsKjA+;-*)e^s4^C~r2r zWSld0#$WUu%BBE&4wS!#uZ08STI$0Elvx{-5W(yeooPdjS)v*2UyGce9*OFk`zQBO z9hU)xz|Yp6yVHFF&aMwvP#vCNdzVE0qKRQr(z(%d(gN3!`tTX7C|CXrwPBv>aF33K zuXdfOQ#X2WNA>oHzwJXdiH}9eA$cC7Mt0JNNYmL#bLO2?JzWqDc2E^K@qA3D=!}6k z2UrZ}tFZg~DM>75Dt0zzR`kQdRZ&qZO;`G`bU zTCFQ%kZV@?6Sgl;$0F#Ibv_(1Uo4Sk>HLp*DiY(eh$+T7_fVYc2!E4I#QaQ`2nwn% zXP9UujZARui^9TFuq3>iOGnBQ4j%~fl)CS`Ma;HaIbr#E>%>n<7;Jx24)M6uU-U!k zT?^ysq^co&m?6u?L#D|;%o%D92dg?L5D3_vUi}$EHnDrwAVh4bm404M>;X~y(~B#_ zmLvFT&G~V@5Wt6@ZvE5K83v}S)u>Q)o#n1I+IqV6ioYF^D#NwVWr}xXT*rnx=4z_I zAI?@(sH-The8d;mrhm#XO$ne50B9bguOz*lA5|%dXv>sMYc3SZp+Dk;*kZ%DvTVIT)?1*#T;U2hbwR zmuh0MEoNjk0rASpy3rIUlT&_I=8hE z<7mi&mgulARg|bt1*~Tve>JU|rEP~-0HGBtWMpLK^u0eQg^>T33(y5t1|Ap`^dFZ3 zIM=f5x-tNCQBU5B&Grk?l-YZVo*CBX?bowdXKVtl{vGH_sUOHW#V4yk z*KSgxnvZzMD}O62ySF(hw~$zjbpv7OqaU{d79*YSZHE)8XBf$~O%J&?4FYfkJ+;ef>7o z1ipd-z+7bbAaDUj#*cavO!uWIn*RmNHrJ7*f<{-d-Kp1-IaYR{zlfihxIh7rZ(T?E zaAr-43kmg-6AF&KPbyX}{IT204GsneGHJ9LOd_UT0sS;Npo$g%*!~5$ZqH2%CyE09 zfu_mIGmqP~k9{24f#6?MjIHA;FmUKb{XUQ-Qc6U@mTanV2t>B))4|}sG;b`tHaj}0 z-26Q8eQdbOz7J|W#Xl^q_gO#My>GUbuWb+o3HQDKpc;PCeBNIn9-3M#giUefvSe3| z)og2yOARsK9pN(H%gFT@AWdd8c`q)1HfCJ~N)7TnxtP;C16Dsho=7@Ncf35uF{k%G z;TWsTxnx}b#mT1PqKO1!v)w(`;$S#M>5^>3*qpk2^~&|RnAN5^hsW%cchJ(+;)JMG zVk)7FlHiP6M|?XUMM2%FOrXAX%WH8uEyj6|Lduf!aCxu?2C2$=QUm#`eKRlRMhkTT zEZH*BGx1sG{Z?qjV!$=6(0I6-1gvR|XXD7cKMi$HmJOEV$FpC=I$pha^RqKXf`j75VpJZpIjk8XY%B56&6-0DfLjTIX2aVjI7_BH?jWYZT4LqDlT^J z?wzGerSP4IWn4Ubs&hAa5`qMOY8L=wl^7JyvL7(pd0}5LR8Ab%M9O+lgeX)ut*}ok zO&I=b{*?@UOnxA-V1@L3U7rZNkmkV!)i6ch))K~y z$dY5c0;B}tw`sNuAc;py$8SlKbv#`pBV0-wEQy&=rVGk^xPpRqEcJD%GeEXF5hR8OE?f2+0VP<>OHDks0 zcw8|DX+5o|Oy_ZHbV(I7J)liUunijIhcBGH(g#rZHSYc9mNY0TCI3-Ady1Y zZ)G9thD`jY;5wg>SqduSmfs-!gTo*336|B0S~tZ4DT=BlM-MG`9v>Ipf}qpUvNTs6 z=pveBk%=fzXBy|XT(q(wz1v-zjXtJG_%(f2O~&kNGSET0C^* zFF)mp!rVxc6vZTivR;c)P_WR1qRe_bn92UWhbHHYsohG2nWcJ}7EI96xbl!va6#vB-NCLjP7mbiBxdllq6(vcZzIqN)5EFq zZ$-T?tEVQvKoOC@f_(S?{tR(_;qGQigiCbt_gi~F>WGX4MYf4FLvY#2Uc<%()Q$$M zow6CLy+A$)zUztt-ZljxmgcuA&p}507}8_e zi1J`t`n$%wA?t-lK{5Z)5wq*4ho$+Z_dY1DFLsSw&lB^>>BZ$5$$RgQaZeu;pQg@1 zm6bbXw7NKnBDa5{nKh~!KO4tkC9TMNS7idIBBcuu7HbhnD7a7ml*hyvz0dgcBToFm z#>=jK<@OF7nxP zSSva;Qj8Exn+&;RfzeNAOpF)$3kn|opzG~&?|8QG{k_r27cjNRD3Qxj?)LS0yxbTE zKBSlN`!u8kaf}}g8;5A$&^IG>20{mbY&o4H598W%1(W@?dY z+BlNY7+6b4hriWbNU#JAt%S?lBd*I6{9$f0z!#winRO}iij*+2fiDx>V+IxCrb@Vg zb>*Sn=NmjDvT9WN-4O{;tag7x61y8~N3Y#N*i79%AP(MllSOxUWc~ehHuBqqYm@g)9pz;!{j3w*1 zvE^3~IJ9}x(KRyP5I4>kOOlWfo2ik(2FNF>Rt?_2TaABWG5~=_0Kq!r!PEMreE{Ht zG#IBvAbw$-IkgXtf8d}Pz-U(A+TO0Dh0tngez&JiV7Fmwu+;*+aR3oM+zJLtc%%Lc zhTz}~be)r-F?w|Tk7>dRL`d6ie;#;n50=m^mw;qeWM1}je}gw=sZhpo}xE5C3CfB z{&WZDESQvQgH?{pRqySplEVLV-SUneQ{?)YZl+)O-)%JO$9f)f#66$j4hE!PuO{g8 z#hVBh>0~HV?xyq~cc1M_4YP*xBmz;J%o^Ribq@~ZD zTQ~h&VEh5P4*BoM%q-h?3=OXEN|x-ymgYy@_nsIwOC`QUc!@@-=znvKQlNLu*=G0e zoz6C>(;S7Xb>4Q|N4GK2S6XqUUWicwPpa$$<2$OZ&{?sjEPsvZ@IOu!0@794XDs~Ml>O93s(^& zhfyo_DVDjnUL-g%*F_)Gq64|EdBuO&v?E?IOFTkGfrl>JqYZzv6Rk{vj;BQan*Ppv ziI6F$^Xn1{Sh^k_3Z1}VAx-@*G>fJmkSx-lJX0xb1BN?p>*#=(L>&g^BdL!r(=sAP z$w@EH>6ip?GK=KFDw;2MKU&bl_vX!V!HEH2FVK_yM;T6bp)Nk26B;H_&}#J&C10qt z(roXQ?7zD53+~UaYPv>jr6@CPKzuNKT)*<)BMJQZ08w_Hon)zLzOCGu8pbC$a}c(I@uwz) zhMjb=4-TC~oX+w`X@tks@XN!N7Ql3t@~vQQ+ns#6)w-@$VMWI;*CfeBi8mE! zPYTKNLDG<>_I(vY7N}+V$-2trG6c}MGhZ6_P8Q^boF_fOu6$JmH&%t#9oz3RT;Hk< z`6Ft-eg4OPjsWo$2}B+4e}vyw7ZutbiTXlWjsqw2BP>TnP#bjL7TQKIHTY&nWECJ0 zj~e>D$J%tGv&Y2b&@ZFGnz%sqIt2nL1bp}-K{epYAHIi?)L!)DN=8t{bOqP+#g-Im zBc_OslM&qGL=qf<@DyUW*2+mVVFuZ)VMpdC!F9nnGh0ECJJbwFWy+lse232tz9`u& zct*-97~J<*sy_r{`g`Kxp6B}- z@_{r-u=g_-5v}e+6iEQIpp7WV1DbFFX9vU(;nNJySgY!H1gbTUE}tjJ)Ll}lN1EZh z(C8&_(-%&HJ*RJN3|A2P>ZuRvpI^vs$|VGj3LDW+K8C-~)3)k44P4nt#-fm+G8VtP z<4JKbgV7{hW$p2JkuV|xtbf&4Mtt|l>3ZC)&LiYGTkuVWpAyI+3pU}N7I?z)O+uG# zl>xH*FWV7KBW}kcX{P;1SdVODN1ISo`|fQW(9hs)d1h2^3QAMPUE{t5@xOd=3jDc2 zWkJw)W4lJ0cp@n?Y`_1dIlG6VYLVi?mljYb1m9%Z|CE;qmo$KqkmRLHG%^#-#X{V! zu7K(JUaeyxV>+tvnHS<&J=I`S8i7;ml1SO<70i5TXtyx7;-v1YsXp;(GpfIUt~=YL z0;NLX-fiDD_S@}>ZMGw$xi9h7k1#M?7GK7ZB~PWI8vtb!@16efRF%W}<6r7|Kaa|J zE8+~q>ZPF4kJ2C<&Woquta2tg=sv48`dqL#I}5Q`e7S}?mlj&VOZQ@c5&2xRjSk?= zCuLFgX8Cxwgb0LXMq{zi%NT%i`oZCGCr{<@Bmp)#?(UpG!JNosivr9H(wd=RVG9BN z3y`UM&~QI$)yQJBN#EsL2VcnjugJ<7%C45Hx5QW;P}+n7xg;1(w?e)Rjh*txtdb`H z68de!hKG+Wx5USR^$NrzEYRa?$KtwmkpnuYK=jE!z&OH4FpqGxd9L9q-{~W3-ngv9 zy%NwkEO#^AaO$Nm$)x)5pqgA-1%?$x= z@34lbYU3v%&>Fh8Mt*rIUb$8wi;%Qd*ZQGc0!)K4m2r<)8*QtV7PbtvGdL5IRiHHu z26}8s`Fpurz%^#YZASJ8XFRvn!%n;k1M653ebSw2b&_BhBy4M%Mx|hbH=;sgekR|x zE{nPq7_)T0Z|7*8Ot*6S`=O7Km^#L9znNu&EEDF#pt$=*g71GI8}$T&r*=9dGK0nc ziOz+hDij9gm8kOsg_gxDk`*ZapyQOv0120fVt7Z)*tiS@SLsJ`9ARrwiz^EEe;(nD z0*^pI=~)=-AeTp>(pmWe4Th^D+?Uqt7_On-wB!;=cCrX4%J7EsjsYL|v=?ATuO%FV zX`I`6kJgc0WVcZ zn;jMnPSy?p{}LMW-BfGd2wVqyL+&$Wb7Uw_sCW7>t&NI@tfl&}42l2lM+m|(#x)_L zEaR&_b%nQ|d-nTJ8y@s=o<=H%`VbjPTPh)`F;8$0c4)kGEzO=LffBucw2NJ^yZzvq z? zI-VWjpI}WTO+mbaDII zE>tkDH>3x8F|nvB+ddCFN?Ys(Qo%uMgB;3dintWiXjGR_BRNJ+7W=Xw48-Z2JifS_G07QdN=z;* z!oaIHL{e+HjAHcdsgkmtD-8WU5q!PjOD(@E#dz|${o%vn?^PP=boH-6MF_hYc6a`x zKAYc!j9W-d^}SdoNm6zuK7IR53mK!bmdYBy@IN-RnK1H!cKBG)G6$R*(;x)M3wP=P-< zRJQSYAr<`JH@>Q;&f3LTVRwUc9=#kpQ~z~)+&HRJOj&a0w3pM_f?3qx5N<2SP3#Xy zw_s~|c=)PNt(9NdsXB7`-Ub2os(St~{`1e>3Z#QCd<5RLTaEvgv;l(ZKsq60GfQ?bc>6~D_7Q~1pBsF(c>iK0WH&+JIZDJHj(A5hd>O)$J3f=)-mP?aMb5Oy2+`1&ZVYL#Uf=C`<$K z!1>>tAA&+RSnD@)TFug`jwlrhhAv zE{vd|AMkcdB#Y)+%G5lg5W&`nOm$-jsHmGun@W9E4WPrH8+xLmoNKN!Ij-OoYlQrcEeHFzhpK_xn^{$ph1 zbzaJx$7+{9HpRtXbibWXjz5j=2A9MDf!^q}ghcs^SOv=M^e4i}TwY3-`N1+aXygW#P){=FamINk-s7D&N z=oBi7iU!W`ege_P*2{GPA8$|dEp}UX{6(`C-WiU{%+&sVzp-Wy#H_5S%gaCM+N{}e zUS86+*k?@Y)gmqatnHYnd-#5)h@SEMN^&rPI6{Dfgd29t5a6%dc$eOL>_v+`{)b(* zK*|V4&{Hg=1<|d64eWq#%gJE?s!K#70` zBY_FM-86CCl_$*>riL0Mq5`s^k2JGIM|hDO_o=rTFOM$VRV;$zndPqKCA4DJ3*{UV z8O`-RUGH)BU%4eSJ|*jHua^xN6Frk+!9Ng$M=%_bYty}w+24{syb_ts4sgf&o5HpG z0}SGwu?;K&ix}JV^8`|SIRz1JV&7<(SDn>Mbj7kvW^=Zi$b5dPB>Vz~15*tRT5pq5|+3TMMC09-r=hkChcbp!vE zNIO(?bZj5mW=EsOoWA>R`o|l38kokvB>M)v86?ea0{8~39rBHYTl6Iu{(uq?&zBsB z7JcH%M>ib@7l{g>q;JKtP%TDEC4oNcC?YE#YLM1l1cQ@TA~z6$-q_pII`s(6IIAqy zikl72CsfeIKE`5{HHM=U;RyeHk1R4gS6yvZi9Py--TV9D_MNFUKEq&7mO)VhmB+OxDx%Ww{3u&11GwuX2^cstN2$R{dyPsS{tbCU;nju1sEJ3L7{ z3@VXUiz}=!95*Fgg@Zv}D~vt=mFRiuJd*Be5`q$eZ;pDQL2xaN@bD?l6O z&4iW^?su%Qkn!?*?ADkD-Zx@{agf2m!Ep4{ z)UR#tsUW(v0JB+vmXfmdI5=?9>`rV9HOa-BQfv4N8f1bzyStvv!Lx>I``To0M1K64 zgoj~8VFup-_G{TVQ%TW6p<5La9-!z^Bj7Z{QbD2gkco>)W_X)CwnC!#cSV2;Wg!v7 zskh>|t=eOIv-fA1HDceCoCLQxd%?>qo7Ky_*@hb#)#P>IseRf-v~!4#J5G%fIq?&K z_98p~UDd6O&-W;m(3vI}b{Ca$#NCn<^3|;s_vYj^lmOih#UIC^`g&Wl6I1$u)!vZI zorZH1|Lv8qpyxJBMK{~QGO(d<%QhKFda&^rIis}}rAn-cGAiir!;@!l1$IG<4 zAGsDyp)CIFv-q}_m^0vR9dCw&R9ee;M<&(}wtzb$mSg9ZbvH#NHEI`{RBglopD>bI zp;(ara*L|RFVPK{)1(1(5;XODHt)g5Z%to{O z?dqQ8#>+IwqScIR4=&g!(%UM|B`({%Nq~9z@uDVm#=mIz{|ZgZkea3sW20k{?Drc$ zB&iHoJ>Pq_ng7wI6A}WvVj!s1-+#m>C*M2D%F1Tl>Zl_CMzH39wN=N6aeb~hho4MR z?q+PJ21=FL^6h9?5dk*5Vy)>+Jb$6ELCu1yla^C#?0KE$7JrO1c}jWY8fzZ)$kVV>!OZ3)hJA^m=241aMzX z9;5w(G_;RGYBpaY7hl8%zk_a@# zbF9to@yMYL^o80vrcPQU9@ys2=I3}r{>n^CI6JFAcj$?XkL(S99mnw1n7U#M_J5r+ z)iWkdsZ}6*MPx?LBT5OveOfiyf74l6*?5cpR~o^;xF9swsNd7AeN0oNykIZN1)g}j zSH8Rw_T1DFUZ!nD^G4sEYx}Ys8&5S&5Emjc`fYeJR zNmd#8S@#ivX=hfe%C#31G;RM@N~={oxgl2`8jg{m0z?#d3li5a-)<~J6buzOuj0vGX(ScpI*`@0+6BlDlr-mtcQ;) zxp&wYh=4S{bM5H*+8#(i^tkGLl1^)~T8M0I9uu)8Y1L&}yF_pHke_TW$~EYQCx7*XYL}ft@*w zUEz&4@8(3-VMG7@?2(G)>@beqzM!a=KaoL@S6Q2cvP_0NS4<@%28lU4AEYF;;E#zX zV;~Cf&^keWi~r`wmx#V+d8~~NCmE6_HB!}sPnu)c9@i{Dv_GnT&>>D#lvIe?^VQB5@sZ1rJ?i{M?&t6u?zkF%{xK*i&S4&l;}h4{z^MoVhSdB8${TdGc;WiBTmN4 z`^QZq*$ie!Xn3v%sNYtg8?ru!!4KXA@|Z}mn&08~B?L%;JFdace=z(QQX3Dvf+-uJ zw%VR}i7P1Tv!_!^n1v~!(boiEk#FW2vwhA*qUW7O2R8IY2XrleTZ0lOnhW%$nUP=| z>i!{~3eZ9B<~u`PIyLjg7Xw2ou*m<{yb!+Cme`Fv*zJQ>OrNq(xyx-6{j6`kM?wmM z&GB!pD50CEH%O$(# zt92cQ#y6@Tlb(KUk?wvU!+p$~pJd$NhxLN4!Us$Rudc%YyL%pb5Vi9vUxw+9v;0q% zxwDGUB(>vwby-T4t6!Hs8?&n|Ya@zuM1Ol)aJkGV{KyQnMHUAJL}LjAE?cSq1130J zPNbw!QAtTCFi3`Ki9gr_d+|=dmrgL z$3-Msn6kgik7UVxymY%A;_0P4Mghb%Nx>NTM zqh!D}Pt@b(`0Fg*6-OblpC8E|L;cE{Vns3gR|h*PHEL@sC@iPrbqjWDdXGY{%vk=e zr>a_^JixbYb@834~(Q=b2g?loo+*6O)uJefJ(Rg$0E>=Tyl7;mudFPj*RXzI=r=B=>`b)3sptq_5yW{qH6=Cv2JA6Dxl@%5p@$L^qrr zflSvN^MKC~om=?B>R4$+8+*iIjtW5@{3O+EN`jzgx_VsE*8jLdpSCTUkZ=M2}NXQp# zuCcgFhzB}$wS+--F}K3Q8z=>%Wk#LsvAYt72T`ByF#CA+A%aKL6WhWmEEVl35mk{L}D^f2Xn@q7Afih=}IW4!B*SH+Eb2xD7NlfCEN8GS-c_ z4&Kr&2CoqJ^6#}_DPk8J(VVqI#8WxDTbZBF74#{G9-{xYx=_aTMWDJNrEPd{{S5C@ zl+P5<9=@~(n5G8ZE~NsmcUes5Wt_Rux~D33eZE%S4s_&Xy@6O|7r#wBjn7x3O?)rc zH9e-_A?JMkrC1BMzf@o^3iMdkp60Rk#R1-=JV zz^-=4gxk;W0EDjM=EY}{6A1m5t^KWB7F&LX;$b-Di~7An0!x#pfdoAaCu?40@)*gp zqdTGyE1()Q%%yxVJnJ-3iP+R`!Y=H^LC3M@VmyCVBa@`5t&(y0# zO+jzz=c|fuNtguAk)s?5yxOmFuC6t)aHYYusKRjCNWt{G+z=8TUDfKnA369wG`Pma zQ8dzi0>iRN;@pcLmPgKsXMyS+THQqzPhTfkw&=Cjeh5xZ(@3!w(F`B;<3sU6hVRdE zrVR~z9Z!}ZZh!bM^Qq-q_^bOq(0`1~-=EJ5BDX8XF~y z^@`z9_m2-d1G`h?zFQB6{X>s*?!x%DP_x-T4iC&WUcB~iK3XP6?wlRf+%8s@OlY3& z=PS6Lj|%2TtEUIzyAuZ1raje1Pr4T|X@%}i&Z;vHwXxy*ezh9Jbp4Z~q8J1|wgskX ztn9T_r*ujBrKzbJ`r-R;T)pQKWE#}wZ@-R;sth72dKwbJ|AMXI{nTO#P?mj6^E5!p zpX3f7HNH9GAt5iaOI;?<>N$}urVyb@&H--+`vYxc)LA|7Hb>?w1A|yh^AB|os=@9% zGJFGj4>yvr0YF0LHXX!pif@jLQ&AE1)XFzj^<266wuYLz>X&~ z(Drq3P^Hk{-GKi5)X3i_QgrWuJkwJX4)^}Oa_-35k{LR8ELrHfEcs_L{!^m$Fovmm zrr^?Cn{8pTw!vm|*7Y<8B5S|Q@2V&H(fYAL1Cw#YIkSA@_=s>qYB{ptpJ)^AY%_Mk z`Dd_Wxf}uD6}a!;3!~C%i4s&rohPAL|B^jAx`_~TX#nHtJ&G!q^W}s%{@3sf7IS4q zfL^GJyEhcG2N;$ao+#f$OINEGCg)i?sb`NiDPOTAsBKk=gJ(&&naxM&`fld-9dABx zrP%y_8rHd?glWXL8GHtTA4ene+ejG-njdfHtML!z(Ae28xzTjJhv4*?xtq&ec^u?} zzyZ}?BN9g=sER0X{lWCzei=3QDtoxEoc+>gAq{2z4j)WJ++YyG;xcnQ&PYI`VA z1Pl>aJazFcPi$?mDQ&m-bCF^eDi}Q~BJ2b(`psHsqVtlcS7Tg(vI1rcZ~9yZrAl3= zi3YKrHM*>%B>P_GKVi+0vx=2|ElySo@*$CzrP(zmt{$7k-Sns9*_reLWokpG)Uhh_ zrdIssv-G?5nk5B^$~dHo?8K|`{ar?yxGLVa4*JDh^iF+4WHxoog3^W zk?%eYE_P_&StFSAX5&ibpxD2e*M;rJhgMG_WrPTdv=fLc24c!zpP&zbmkg*XLweUK zCvK%_9&b@33li_{my-*NsCnN>!Exs-3l^g+pkqvzD?fq>I+L*#=Ed!ID!@EDMRi6~ zHr^xBoPGYO_fz3@v5NRb*jIMg&R}Gj9zT{`D+fHpKX(T9fWlZ6O-*#I2Ujs@S%zNv z+b1vp|6>m8&6U5gG|DPraM<+43dgnmey}~W6??aCjkp6ZvhrFtN)qw;+0peB#)QBW zKK;u^mGo7zhW{4HG9+=_f8$U->!I;Qcdn<#g4cg{_FaWKLA6gk-}vPD=k8ZZ02?A` z(Iq!-tjfyD%0a~aQIvM+{D(^HPB(hXnm`jH1;wy}ecMS%mZYq#2_Wef6&E*R&bW4` z@5t#h7$tusN1OSpjw)cMu(OF{#b~{#&nxEhVtqlS9(OEQCLgr$;zl!WS1#^&K)<}cH(lBYl!0hJSbqa> z_jJ8eh9*VO=lTr_44S{uE7{a~nWM$={oJpXdXaS(5fxbM5+5I$bY-`_S?T1v(M1T0 z<9abMf-4b5j6EDbe{PBiu$W5&nvY~3D zcT>uyo0+}EFPDm;oOZX-3=EvslnI7}B8}$S?5AQv_b~ z9nG})yzU21VTtd?T^4^H=Yi1ywn1=eZ+?MH*tXcFDs}5eGvnvm<$z7k@EB7r$`S1((rU9>EB=L6VfdXf$T=jrIjjSGDTS7>5T8 zQv@4Bb-JHU++R(?onnMC=?>a(gfZX0;4WI%%{KmmdPCq|sT-9a`;9HCp*-Ia5$gkq zJMp1sQkTblVbrTkBL!)tNGC5cZsv)A=W_GHVXCqK)G7E=D<(|UKbBaWj$|}z{ZCF4 z=ejyE=yHSXKQ_w-u4mgiZUYqrF~79Q{<@$fol@YlHuxrO(2SuJo z;kA+Dc%yN8^w_~;`2xntuVv;20t~2hnvK8zeBkjqD{ww-(KUP;criulx4b#;wL=7_ z@Z3PAvscEyT_Q*n2K0jUcOXj@f2>c1_6GG~axmo)1@#4HQez|~oS1D1QSh|~gX`wy zo|Kru=T)fuyuF^&%v)wRGeKQKtrqZH9|V3eXATT(s&-pVZYn=VN({o-$h~`ExU>q3 ze*Z37@8JB_m-s14&lnrKfM3p7y;bU`vTs7m>XOCCwl3o0SoxYNK42;|B8CC{bvJ%6gF@7uyx7#Ue(AJ>V(o6<+p0IvhX;*Z#W`pF} z6t1~2dGof8zPMB^Y*a^-zfcMakqN z)AW^&JqTh;S#Im=Mf|Fq5qR#XUqSPI9+a&-^mILUt-H!klD~kH%_0k~0vfJ=Rljd4 zcU5UqQEO{aXq5RQEmzLhzlRvfXFL90sIXXEUJ}nr^<-w=*vEJ#j+Bl>NHJd6KYUq? z0csS`Y8^XiKmfI5N3E;*X8{;l{K%lu3RU&_Du?U( zk+H|?Hx!yl?6c+iwO#;3LDN0RW*szsQ!CGRJ~VLH)*7Xxj)M&4%M;ns5zYXL!J}Tl zq*s(y>%^EGpD-gPXcRoMINJ(W7t_KCaBu!DJ$c~n%2tw8chv$RV-+1tPf)Vf(Tkah zZ+K(FRx>e$jLjS$yFoIn8c{fWS9uNPw>Eh@wc6AW3xtDGVqg^|`<~$kq9IZgE&Bg1 z>aP8tT{(Js*Y?hdhQ2=GS}v!_OtuVwIj_@VdjL=#_YV&p-=7@-m#J?(vxO2Xe=L9C zaXbI~@XVuX8b62}?ye~4LDu!B{L`M^Nb)@n^oo{iEO!2d62=5A652ww>}v6^a(X(P zc_yfWd<(_v9Lgte?s!=nWCn0+C`_zJtvSW|B0DUFAfrFAaY-3~o$FowT=biS%R%LY zA2d{R|78!7^2^HIv*C-qsb=ZpZcY5f$&sO({*O@; zwfAdEghDsUEFFFvCnT!&*IstNNqR>)7`Bav^8nPcn=lL6# z*&l37j#)Q)?i?5ih1UOI3{XNAcK?}HAe))ADWQhf9`b1Le~gJLM`jH=?Ydtjf#Um+ zXI)fQdic0Xv-s7sSpd}eM`%xW+ef`Oz|sh~R7EpYjPIsjr)u!0meW=pDB7nlHyE&7 zZTQ{y;ZV)| zR8-KwYy}vfaJpX;0tQ5^Hmm>aaKx0xk_XhwRb54sU8Gpc{^22~d>jAi+M3Zw(sb_F zp7jTmC#F)O?k!rf&`NhBeBp$gtlN4_iV)_)7AWP~O{eQ(SpEnKl(g7RpfZnA{(63# zIEN)(H4!zZU-w)8T`x(HodjxeU%Y^lz!iUOuv|hdJZdzUf-*s@J=l~;3( zmF9(Sciwy^ot~j6KU?O809B8Y)oZzKMgHg!0`6@+H?AIob@?IUgR88)AY}ASDI&cSN`h6_5;{vu)*2Zmz1`&_PlgTMCfG_O_A`ubHnxQP=DFtlH`-o8hB6<0|_4OY~d1?6Dn zeSgaIyBvkmc9Al^RsGQ)_CoL1^7j6{g~%P+NHr$LEF_&BH2)@y%SN&YBGyG$_k(tBerrc;I$L)GP0&F@iTMS~vli=4? zE83u(i6H$mk5;F(vXa~zbZidKC3_E)+?$7+CRP$6C#i%#4=8L3=H7SuBXeNyCp0uTOmalkTGn$Xl%Z*BWqiU0Vm`FE8OH z8q%Lnn(I(+l@lZNMTc`>|Fy9ro2545htG67g_F|y(Ip!S2XnNIT)H*D%PTwRwO82o zbVCb#ZqKBkQg^3FOa*UYmzDHhl7wA+a`;EV$Ku%ob=NavXjtBu*$Xv}SyWgx4=!yc zUhA%cB_M6y0eYAdA9D!!(^Jj%S@FI9xXDP#=Jz_;)UH>0pU8^bIg!Bqn87|i(bHuZ z?adxYMpMmdnA+xFM(SPMCACEeUitBMEbj3s5MR z0)l6~rlJ|c+zY!4I%i%oMrq{iy3>&ut4eHr{`1w__Fk_v1jtS!2v97>evGzjU46vZ>1Nz?uT2~c1-48n(Uu^4YA#DGmJuSiz6q@JI7#{AD3Et&YhbA z-83Mg8SzMeYxNafT;77W#T$WgE1%;!`&UeBwzOw|=h&fMzBsV+EeGg8OC3n?VsK6+ zr5)ZfX7M@CP43uv9?nhyj6PgGZ(Ex;wo@oiJ#5u+A_}-PC+yK%vxkT;0VYp_qOJQy zyj%;DuX3(%p8qNSXb4+3>VU3#GV8cQpFnE`-_emz-!E-~7Ewk$a&NQNjS~1XqIak( zhAe@;2bejhB2!0l z?IG_|Mn{~Ja!;UJ>3N1llq1K_Hui3MnsX2k@Ew%7)aBm5!BULHvVaj&fQURc$6U&d z1CZS!<(|I!YeZ*)M8SOiZ%D3r7zDikolz52m8Q*|I3Zi7zC=Gn7k_C{8&ehWG@2{OVX$2 z|42L5Clve#T6BNrdh_mXoT>qe2^rEvnv_4R3Ww%f>6@Js8_!Eo%-;aF+T~@<3A4tQ zQ)NrQd^&|jgPeushs3v_BquaeIBhl}Znl@j?a*qgl*pll7>j?@kHzWlbMeA1*nhB7 zmcD5gs?U~XCLrZx{_*CadTC}3tvDJ?wNt1&N{bB_#$3g@;;{C+Yz#*~YKZFN{Vo#_ zc3ffQd>||ORYOVg;>P@@0lUG26JF_fN!G`}R+^-HzH(G#a3z!H>q?YRFd=}G(M1ZJ z*BI#_KEjvX#pZ*>Kp@O$%HaA|wcjV0C>Hd#J*T7`-PwgQO8bVqqvP%OU-Or@s_EMM zN~n*;$#jEoKVAOzY9M2@NErIX+kBx{LoShhY>Uo43c$6>pF8@v+DF~(ovodKF5x5i z*C)al7yEq%YdM-K=k{I+#AvfM{i~oVok)y|;_d$r)l=`*g2|t|h6Jl)Y*uewgnGcz z-e2Hh*Ztcs22?s287sEjO_k3lmE|-24FcBdT-#%9ARV|>Z}ajor`V@@UJvW&KqpVk zwjq~>a7*=(5<6&AU#?nF6jis?_bqB8d&P3tlFRk?T6+;EO#3(S{Of(+r=_j97GBNn zkml16TXK?>LdZZataiWm!Nf+7ta&VxPEq1E(eu^44$sdXgOHIR65#zx3-`hwFA(Cx z`|@crYHa;!V(R5?X-(hFP@kA|_8S-!(c=kYK1rhjQ2Y4?gC%1HA4OZweV!vsW#>|& z0q}|o!d_sT(D~VGt>pgGeucSw5H+2bmxnqH_Mcv)SEVmBIcN1lpgb?LNjmG}KQDuk&{S}IlqJy^vuUeF2Ps_P|eAW>aP~Jbx@WW!cx$4Mre_2_KOx!Zs^=>iNgX4D! zWP4q9FeWglX9)vEW6KXsM!qIYp_|!Z&)@mcuI95AM&tAGPP4C{Uj9C*K+rZ9QlorL zC{2boO_EfD4kq5KjfW^fvc@VCR4qUNwCWd>E-WpbCjl7gw^NkyK*Mi;!Q_y-jbQ^O zVEB!}U%?#2K3*#OHZg9l+V+wGRO^QX)F{9ogn73diriOM&@(g)px9&b(}K#yvwkv^ zWJt=nH9Bai5l0tD3j&AeOjwM2gjFJpvH)J0S*}g}8{($fNGS@ZN_003kJoh>G`+mLe=bRzi-%VCkS)Dw$ z{6xj!XwVaK<#>qofL<24l^g;1R9P`*7BKXtWd2kAAKW0fyW&x9lOI!&7eerytBWe+ zW;ob?6^qOlb$a)-0qq}?!jcp5)*!e_T)7AvA%rAoIZOtKri(vitOTc_bDB;Rzo#I> zpINIc1iBa6qX(>I6Ibkp=g4DoJcsJyV^edYwvBSn7|3}n4A?PJJZ9(qEKV#{*h!0T zcwP!p5%A_mJ$0_cr}3xI!>w z@(s>%oxD)&9`6_+UaNK}D>M~6i-?m$9tR_VoZ17Dxo(1*G{Ll%O768?7Zt(7;wmuK zo^{kF!3qZ$kY?q8^riB7z)z&qcrTKlMJ#>E_b6WoV*={Bn6c)EGFfvdt&%XSIM$>4 ziS9&&Q^X9Co?I>Tl2Ot9=(gOA_H9+*%xD-`etj#k)?mI}yO&1i|Ksb)WDnI;r;AAH zQcgRHRoEbX{{|ni;*Y?Fz+vYFHj|iw@KpW0=h8@l5EZ32L6;o6XH|xdcgc4G7{+@O&lI(`aav^||WZ%nxgy_C&+b3~N|qKG`18i*|I5QF(FvsAlH zYL2r9VZIc|g!fU*PUB0wH%-+rjI|a1slkOj&|wm@6gT~LgJST8E7O1iB&hRjfb)m5 zD9?pxp59le-tSy=l^*TKX3l%=>U>W$U5VzeCg!q?z+&s0qG`OunIxC{$ffUzIz zbs_AAu=cpOY~6e;jk+>VSDP1%V9aBm8rXrB1%cL7RU1eZ7DC)2#*ajgR=OhZ zT8J>)(s46CfLNoxIpSB}V#Ss?$GF#xkGCAVdPtVuLTc*oH3vM2`%vq{Y~O!ggTjjq z>HNrBdw!ED`gBAcwln|S)p>$1SPns;_nzm5b|Mxxx*CVzr6}-Nw?fUTr>n+^{_^*s z%4e8Fy@GVY$YhIQ97jZPNp8y=Uvo=a9*N_E&#$a(H`c?tOQz zCa%qqUw-s^JBli&S3s(-4_s`;Pe%2R@rb_b=Q>w7p%yygHjCU;12i#UKWx{LL8Ohb zhvk86j>+G0@H%BNBzYn1OirrFW3D<10(|@U;#5EjujRC+!`%!i;JW{?rdu6vs@B}#c}rqCM(g&t&$DQgMfckPvjL!8 z;fhQ~tX;@9dXSLUX|8j4H)-U^DL$F<`Sa}+_SVTGI!CWij9{m`x&P+kR^NsFTP~=@ zEY$JocY{i4e^=wCo}!)2unhwkByQ_jsMWn?cJ^8#=F$_1_j^kj-S*mt6xWYmf%H`+ zAm<=;5A3M3D#pUjQEIo0kbDmxtVs?M*-1=ORP5$hs<2ATnlEo)1gDe=22LV{G_F2 zALWbC*~7s^*;n{_PdRK_?Us+X*{wL7V8>cV8Q+LQN^9%{-Q`D1zH7>mz`Ka<9#Z*} z+F+hn6@w^r_I$Aue}3JM>LwB3RrRmZI^u0RACHtO9&lcJXmw@Z5b})BssLKcIfi^y5I|OZ>m4jTYaxjAX`h@-iiMw9+_zI%6YTCaqncm zfO7=%{@vh9w%Mx_i@Uy;fg56efWRgRv0 zXi}`XoXfXN+?oQtaibj;RGGNJM-~DfW~~jRblbcwzHIGNNv_~#ry9YEB>VczQH$_g zJ&eBB$@~;}@WLa2wBP&gT|J;F&?he6N?u|o#0yw%Z03=VIK=lq2YCQFS2eH!svTYa zhQWUy;9eNB#^IiB$HqyT%`@4ks6DF|wIVOM|C!cln^T6L`!%Q1!ZtPEnNf>E(b;dq zO%eTindRe5VR8Mo)AvPlb45g8XamO3n_Wr<3%|qUFl^5ACQ=Skx9TUo&5GgQU1yS- zyQgcFjP7JT`s7+r*X>YQ8Jt1?pcJ)PLpy`(?PXq^%*{K-8|1(K-Y2TdV!CgdnG>`H z9L)yOJt{R@Of#Jf@>YGIu*HGaITmI=8LwfOs;DAxhS;Q}=^O9xU4z4%vk_%n?QX!h z*CYz~(NN+|@Pi#Kzm?l}s-NaC6dG>UP+5Ku$<*17LFyKwmUiX?;zW|Ax>~+aH<$dW z#uK#LYg>M`?6iDF+0yfUNxv8b@i_x=Vu)sMS-QMl8h$=I{V6u^zf^>}kYI%c!Se=n z!LFiN3yiK~+xzW;H!=)~i$BMtTUk{L&ONeTGb z8&>Ky>s}jJg%kW?vxq`uxz18Mjsjac3KjCIfhJ^@gvxmr3or9pay!BaD zYp;{N?(#-p!Y;aLhi%OH;KQ%`T~_`Hq3l2jM*i>FzRz22|?WP4h2W`15X7=qvV3o zU#uf~K8?`fllbE7F2?tu%B`wCM)PecN8CPY zJ;l^U=2(Dx27r@OYDySNA#x3b=?SP~f9=xH@jM@zrc_*F<7UQ`S30{rC@U?^ce}&o zt?&kh;7}7Ww2xqH0=<+tWtq%1e{B6?tgEymGgC?=+EnA+ncbC~{;41+bVD;k+?f5#h2Hgkw1t`$$9YPR3Fp_ zUduAQI-ioA`%POM4_LZQNczG(PY{#MVwJpupC!LGhNk(>JBY<$-~pHwr10Y@+urAcu(t{nG7wB-&?QwG;omt)Zq2hfXM z!p?xD-Yztpb``4r7Y+RVzvw{A-hjG)Gx7TF8cViakjT1833Wip2e-p_7Yhw@)tkbC z{M(vxsLID+$^-oM=jn~Ho0N)TQ7>(z9cv6fM21oByaYW|oF4JW)dEBLp~X2kw7HiB zBJA&S;VN|Cj#@}$2krAT>d>!-m6;xzptRDrH)=W%QS9fC9%pkcZiZC$T@NXrV}y== z|9+z!6R;x;B4^f4-pWcO{njwV6dEydN9sL$;q(+l(08BP#pa%5M(y}mxn?GhH$BZ0 zVEvfOv4X`dsSbO^iDEeSC*e?({Ry9-T~#>0q$wk_c&)p}iG+(>Kal9HZLomA8?%*b zdh$|5QQ>)Dz8LqCty{IjlP2psgN%x|(x*hU-15btU@l&IJ6f!>kN zKnaoKLou!2Q{rE`&}32W1=b@qNd&O=J54HQ{8PdYfG20cDCLnT{iU_IXd#A!!jneI47GdcEsQ@cQ?UJY%ueiU zcwd^4Z`uxtvgT=h#1N*JHDH*8rgPD-a9Llbmy`5t!l!tJB@L9w>Emz99`);AO(>4O w(mBz!{>p4)dwvb^=kNT_f%|{o;4LR)azPJ&KbCT@Is;ysFkQ7WRm<1^1GV9t`Tzg` literal 0 HcmV?d00001 diff --git a/resources/wiki/Pictures/SVG/XMC1100_BootKit_V1_2_0.svg b/resources/wiki/Pictures/SVG/XMC1100_BootKit_V1_2_0.svg new file mode 100644 index 00000000..cabf8943 --- /dev/null +++ b/resources/wiki/Pictures/SVG/XMC1100_BootKit_V1_2_0.svg @@ -0,0 +1,6496 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + image/svg+xml + + + + + + + + + + + + + + + + + + + + + XMC1100 Boot Kit + + + + + + + + + + + + + + + + + Pin Out for Arduino + The + Legend + + Information + + Labelling of Pins in Datasheet + + Pin Number in Arduino IDE + + Physical Pin Number + + + + + + + Warning + + + + + + + Additional Information + + + + + Unused + + 19 + + + IOREF + + IOREF + + 20 + + + + RESET + + 21 + + + 3V3 + + Power + + 22 + + + 5V + + Power + + 23 + + + GND + + Ground + + 24 + + + Vin + + Vin + + 26 + + + GND + + Ground + + 25 + + + 17 + + P2.6 + + ADC A0 + + 27 + + + 18 + + P2.8 + + ADC A1 + + 28 + + + 19 + + P2.9 + + ADC A2 + + 29 + + + 20 + + P2.10 + + ADC A3 + + 30 + + + 21 + + P2.11 + + ADC A4 + + 31 + + + 22 + + P2.2 + + ADC A5 + + 32 + + + GND + + 15 + + Ground + + + 18 + + 16 + + P2.0 + + I²C: SCL / ADC A7 + + + 15 + + P2.1 + + 17 + + I²C: SDA / ADC A6 + + + 7 + + + + P0.4 + + + + 8 + + GPIO + + + 6 + + P0.3 + + 7 + + PWM2 + + + + 3 + + + P0.0 + + 4 + + Interrupt 1 / PWM0 + + + 2 + + P1.4 + + 3 + + Interrupt 0 / LED5 + + + 0 + + P1.2 + + 1 + + RX / LED3 + + + 1 + + P1.3 + + 2 + + TX / LED4 + + + 9 + + P0.8 + + PWM3 + + + 8 + + P0.12 + + + 10 + + 9 + + + GPIO + + + + Micro USB + + + + + + + Debug LED + + + + + XMC4200 as Debugger + + + + + + + + + + + + + + + + + P0.1 + + 5 + + PWM1 + + + 4 + + + + P0.2 + + 6 + + GPIO + + + 5 + + + + P2.3 + + 16 + + 14 + + AREF + + + 13 + + P0.7 + + 14 + + SPI: SCK / Built-In LED + + + 11 + + P1.1 + + 12 + + SPI: MOSI / PWM5 + + + 12 + + P1.0 + + 13 + + SPI: MISO + + + 10 + + P0.9 + + 11 + + SPI: SS / PWM4 + + + + + + 24 + + + + P2.7 + + + Additional Pin: AD_AUX + + 33 + + + GND + + + Ground + + 35 + + + 23 + + + + P2.5 + + + + 34 + Additional Pin: AD_AUX + + + 28 + + + P0.11 + + 39 + + + 27 + + P0.10 + + 38 + + + 25 + + P0.5 + + 36 + + Additional Pin: AUX / GPIO / LED1 + + 26 + + P0.6 + + 37 + + + P0.13 + + 40 + + + + 29 + + + + Vin + + Vin + + + + In-Circuit Serial Programming Header + XMC1100 + Additional Pin: AUX / GPIO / LED2 + Additional Pin: AUX / GPIO + Additional Pin: AUX / GPIO + Additional Pin: AUX / GPIO + + + P2.4 + + RESET + + 41 + + + + 31 + + P1.5 + + LED6 + + + + + + + XMC1100 supports only fourindependent PWM signals at the same time. + + + + + + + + + + Pin 5 no PWM + + + + + + + + + Reconfiguration of the PWM pins can be done with additional effort. Please consult the datasheet. + + + + + + + Board can be reconfigured torun on 3.3 V as specified in board information. + www.infineon.com/XMC + www.github.com/Infineon + + GND + + Ground + P2.4 + V1.2.0 + + + + + + NOT fully complaint with Uno R3I2C is NOT available on A4 and A5See Wiki for more details. + www.github.com/Infineon/XMC-for-Arduino/wiki + + diff --git a/resources/wiki/Pictures/XMC 1100_BootKit_PO.jpg b/resources/wiki/Pictures/XMC 1100_BootKit_PO.jpg new file mode 100644 index 0000000000000000000000000000000000000000..cd24a56f121796bcf892cc0bd3badedf42834578 GIT binary patch literal 251809 zcmeFYWl&sEv@Y1VLm;?I;{k%ZI|OSiI0+B}q;UxzoZvJxBxrDH8gDc}Ai)C!Y24l2 zb+~V;UfrtqZcWY9oj+5vtJXPHd)2meYVW<)_pS3Z{j>~tp`oI#0zg3lpu9qP1pqwF z0TclkXz1wZXc*5A3=9lREPQON=R$;shl5W{L_$JLL`?jWoR;DxDK!}}F(nfvH60xT z1H(%SW*{>?kd~f-{y#cFd2Wh@iA9KwO-N5lOiKTMyFC2@5M!f}qT8XNFauDDQP7A{ zp8f#n002}}G?eH0{?CGmfrW;Sjf#Tvtag6^KtV%8Lq$c$z{4ZN#R9xUK}ACcU=U-H zFk$h(lqY4@dxuRX;1)to!J=T4oSIiNIz|Z;6a^U?yF;MkLL&MG?>#)dyhBrJ>pEG5 z#T3)>3+lU8Y;42Ae@`6aDET1RlvUL1A_}|LPS{mf#s55yN&6qh!}!lL0$}{dsF+yT z&ssI&=NX}*qhew|n-mKj6%By$yc#rg3=$@Oc|FXR%NU z|7Wn7-!N|{Fqndh#;2^tX`MxzPVSA0>5)J{YGoJ4vvSGDD4EkdNk|S4%yd8HAp@O#w_JCKilDdk>p!gz^-)W z>Jt1hI;vdCgr9^Pccx@Nsh0OJh{{&VrM({ zE6TeBjjBn3|m1BnW{X zs*c7b)-Tj)jvTiPH@)akIY-RBb(B_QJA6psf*gL)M7_o=v9|yLAlw7 z8*e$0c=LRr@k>U#>`>2^on!&Nn9~?2>!-)=Hj9w~1@%L@{>|tX>X_9w3hsQTq-Y3#M+Bv<}!vn8|#H$Kn|LM0PgN;^@p11l*o zJ3J&YPbct?)i9BQ`o*lD_0gN;bI<vPXKv$?HjlB4%57xPrLD=9)Q>bJ2xP8Y8bU6~afeN{FTUESLg(q=l^4aggm9o$ znK0aq?Q!XNkN8;5QbG3~DPg16KYsiv*&6 zE^YRKEoKNmgM*pGbXH4C<`Kmd`R@WT+S`j~NBrOR;!yX8%?n*sc6K-gGTCrxjq8~e zH07pF#gQ*R0rId_)*@l&6=B!qU&gW}CQZNP84c3rs#-B? z?i^?I)^olc8O=a=c61J@I<;gxVj-fjM;`KfAE|q|kiq4oMV5)@9(YfHPfdKT%QB&A zm(ZBK=HdHlwP1>y8PZ0b*GMJEoc#&IUUQOH_Y_(7ZUPV3Fv78#N zDO+-geq~if?pTaI0Z^e5!5h{$17*wSGLwXRmE{xZ7`}-b*y^{hb=JzF+h}&qfSiMp zW9fG#n?I}mkYcUEP-B`v*2@LEo?$P`+I)!67_c?;{G5Ii*!&*zM%di3FpXT)foke2 zzs1PMm%Q3fo^Hgcf0WlJHSC1bl0!A`%5&O`8AyU)Xs=i5?(kJ;9$Bn|G)9!k+>yNO zo_flp2Fj#*O8@<0U_SU;@2L6!Po8&BVFF6nKPz~BbB9!TN1EedYD`nX?SDdx0); zbr{i+?fogk?~dC~pG=#v!*J$N0;GmO)TK~j)`BB03mcpg;rrbF+m3Grxu-r*o`4Xw zYeTi`o~48W3gpQL!*Vd16@MgU+5&-~>JBW9s?i^k^;P^;+bS2$+l#I)LfyI~@zZ%X z^OA!7YUgntfi|v9Sa&micoc0P=co8~1_mY;`l>}3-W)$i1#d$D+hN9*qT2Y2`Z*D! zlGJ?t?Iw!J;vO6TItz}mP4@gtgPe#6wiVc`p*)OF2v-{xZ&%z?wOe^9-}@UFQ@rfB zEo`-s_bT>$wGGZZKlcU^G9y0)s)+MNzcJ$B|0uGc1)*{pCM1a&Q+~+ z?YH%5xdL|4$CYFD^T0kcM~6m3+J>a;FQklRasxeX8Y`6&+vP3Aq#xe(D1AI& zN;6Z_ppokWNr%=M{lrPOS5_(oy@k?srb-NS{maX;eW4}|v;NSqL9C3~{vo=3RPKNE z4N99Y@mAYuL>`nfr8|vm9R%r&QRspa(gRcpyEa7*J8A8u#yh&$mShh8Jy?MeUC9!k zVr}AU=q2rXY4!F=lKW*=bn5j;a#ivM8_&a(f8|nb*RH)~ti2;*%PIj>m_4<;Qz4{M&^TP%;nO@%vQ*To@1*utCvsck3#;T8nR{bpJ*DT15ANo^ zvj`2#mxv$J(qi7Sw|hO^G*i*#X)?qJ2CKjAh1UaL_^z>|FPjH)P3Sl}nGeRC^GvB# zGhinS^@rCmE1=4skj@6F0^>;h^`WFn&-?uUC6V8gHntrTi7>D7AQ=pZoYUczs+!M} zu|FXa;0pf&tVsPhQF)@BsqQvSFtNd_GASYn?b>jxHK%Gax9-s&X38~TOhEM^#2KNa z`?>eMB@=m|2%FgFfEkt#yQ6v<<(6K zBip-8dgF8X3^co(;^kJFJALn7pB ztM9|lb_9Ck4g-I{!gE(cvJ!LXO`WTL)pwc}KKMFOqb`6&vR}NvSxV3ICli92rLL8Z8$6L<@!<9G^ zjoKoWv3LG|0T~>X%4<^1I%q00Zbr!P%Ia}mTwV=>NZS2;Kg*Mn0n3GjglI2BDH_^ zjJR_a4X+x)0g$MjNm-u^Nu8&Zl0W{~x#A_ZsRWkp5e&o?IUi4` z$m6bYN-ZyY%M2uzMa_fqxuvVe3OV1CBb})6J)79MIP&Y$b~*B6nE!jEog<`Q4E6bZ zFg^L8{B0_hL{p~`l08()Ve8**-`A~2m|0b?r))_4d`S{32N=5q@;RE_rTM3N-!ty< ziZ-k7tIDWEe=Dy-if&i8)DZVWXdI$Yl}CckI3*MEPeT^A7rYC z^HI9BS|d$H_#Qqfs-GI;mmstK8eS z*pGer5IMD@5%!(p$n%Hxg_^NMdW{z^*IuC|t`h#TAHi(csG#O?9*-ll`cpRox!hd+ zc0fO({%PI+*y;V2b>y6bVlA*8k%R5Z%Cf1=nb*q@=)`-dNPC)`WizDOwD0i#tk&0| zly!vQcQRibkWfs=BiF@+KL`1)bhS?S3#T-z>jbsLdtQ;(e;X9=G!wR2{M50s3sLhz z!sY{Jik39JJugG+mXheA| zt99t20N$sxcjW>37%NE=g;@NFH5D&(0|zK&f@Zt6CCFS~Hw&mkzQ#g1wWWEs3`$54 zBnTc=AjDVvaw0x?>;12Gb#<%gc`bNq0tzc*qFXP6OkkE}OI3+TY-;lMXzmHhyxN8L z-B_)PP7^Y)v>rdxLtqWT2BHnXr_hB+8)6WduxCv+<~Nb}XjgOfelYb5ldN#(GRDZ&0AJ4WmzAAIrwtl8Kdi)eD7Eqr>D~;iETs0?bn5|K=~IsK!@C z)TPJdkNVbW>F?tVQ}9+W^5x^Yks$CGokDDkneRIU5%ZR_s?9m|x>(G_C1j}b2)idC z`CA{@!PE>*Tzh>3c$S45KG~Q#;T^idsl_Vws;Igy&W4il=C0MKE>kZ%jVx8Xa-yd=g1L5a|q@k~_;}@zEm^}Rlcz}6IC?fe0Nm@CK~<;bG|V5sYxEo-^nSi z??X8qvRLQ_p;$` zbbbuS|B!N>6}`Z=={1K9lgcxA_eLM#w~?~8Yl1aN9kKqq3vWY=@veFF3vulU#ch~;8IccT& zY*w%Xw=1i_d+Cu8Rpe#UT~+%d{nl1dImg%Z-8=KZsij~dkF(K>z)G3DqmHQNn;pj( zX1o7?p#RUC&UmZS`Np?xrpkGdx6T>QQPBYmveJ)WEL_LW;ZBDY%3w2`5Ih0yIjb(T zh%KM5Lt;`rJ&E7Ca$~pdcBiWq{8TgzVS8eg{c=|+AqH&dPzaPA`MJ0g_zmr6sb!hd zoMm{epFxGJ__96;qY>$9Tgi0tX7G}ERE4ncn&D!0t7Q?zk`<2H3ITgR2fbYIrn}Q2 zVxm#nth8{kGQrt*Je-liu#gB6eiya2ekEL1a`5tK>RUss4aSXo7B(2|1QPIt3V4H} zhj7e@#2j4k6Ca(WWbH6BlITm9Oj;L5`Ez0-)E&83#`kLW)rldSe(x7apl_LKKg*nj z@mNC2jHeBcc3Rq@=ubP4fk32A%@6-z%G1D^?lRA zTDrY_?mag6I=ZqlJ_0SGWw{YiS?gQH0uMHSAKys0?@&kxYDtR;oodM^j~_er!swAI zSySb}Rq_n|StifYj7G&WT>d~jHJy=eu39H)?~HWzYBaD@OU2Rt!|7`b0KQ}YJE2TN zeX-L5qv4^+#o#x6T#Qf|^Uv#jw^}*N6*U=*eW!#I`?VO1*HVOqsXt6^Cfluz8-10H zXdSogn7yFeh!wt^I#K${O;CMHe?kQsv4t^`t{+P#I&+J6@nOhR*XabO?U~ziW`D@f}YKaiasfR9Mc%I344zpoP*`*VOLpJ%8QF$kVmXAm&sYMr(X)l&d`# zhCGiciOM$1EYH&u({C95mPPgTd%`PKxuHc8mQ2okJ#S9d!FC=6O-i(W9Me1bR7ScopsV2?N0!?x;ubd9*Fphm zen%a+7alpQ7!d@aR;>`g>enlFj^DFKT&8+oKeRPr2vX1rMd4m+fIJ{rGL5y>3+7hs z-T4J_A2Lp)n(ot_%=|H}n#SGurnJ#=i88$MQ(DRA)fP+vgE-4?KOsQ{?9h6^~S%?%2jglm^- zR*Sgalb`R#@Onz_UvooZwz5@^)893hJL&8o)Dlv@+&5m5-S?@9-Rg{LXS3`{=UV7o z=e%K^t?XvisxOgJSp?Yb8=>@3Nva)e`c@!ZGg}O9d+T)UJKq(>&LGQ>{I_>OTx0n$ zZ+AtSYCf9r^@ygY8mw?8QdLk`>7J@x5(#`}P{UHm7Dc++phFsW4eZ#`fBwSBiP@xj z0^r1+7QIB%nlnwzAvuG&eZJ{byElA)o(rD@+e^0!_pon7l4jsq@el=TVHlweubTQ5@o7|9)zNIDO54QNl81Nk)=-Y`)32zqf=5(T8C}m{d>@Um4I*w~J zw{OHUG#z&$e3AP1ogEmMyHI$Ve1!f$w`(}fx@VGAx5(bFEJ{=Baf)>p=L_47IUSGo zs&5$^tAF(jD~RJ_)nLu21)ARUj`vd1< z&`Y2eXWfo<(~sk3kT=}sx(uEDC}Z&h(dVl)Oh?gKsma)rSdrIK9f}QS>n#E?mAA^s zSU%l=x8Pp)1ur{#=2fxk>UwW3g=$fhZCy=HQg`ca^sX<+9XMcOn~+-?4Cf{ zQLv;;iBrBILvCQvWSNQOZ$`ld?cn@YZVFp~gSHsttJ3T2SR5{<;7G77RiJLuGdMJUtNV%a}oLF1G9 zt%eWGrqDzn6H#ArCvA;#%UQ;)Q4NyEY^u3Po5O2rAPwuvwe>5bS5^#_rPFzP;S8%$ zRI9bhePer{Haw-5xLWZ-Fqf~xq-;s2g1pF_OZGQ6yw1wQ;4x~?uu_wM#W9@HgQ&b2 zT<9l}@OeaB{g!_zm#d+meIk-3NHW^11OOsWNh-{J?c|qjG(iW+-yIEPA;jY^KPz*7 ze?~{O|LeZELU0yFU(y<{5*{`y5zGl&sQvR}t%I!O-}=85Yg+CPg4cVNY^mvXRz;q} z$7O1t-u1bF@zk~`7Xg;OBQ|GaJsmA=pQUVBGa=s86J~H=36~-VojU(X<&d(0h$F&dad8rKl0umiKL%w6g)?beS6`Un;~ix}my?^-iup8kukoF5zJYQ}pbPFBEN)>Nq$wFT-yO@o&~p^9pv^1``IpdYylm)i#UeG4WE2%UW|dI)FiT9$3PO$gR(LI1iaV}XS+~h6 zIm|clu^}6_{zd-is$5&TA5RWMPN<>`{@^fOfWM#lO^*>h`}cG}c`>qOSE+GR?!)}% zbZr*6MB0#PvXhZ}@?hF6#y2P+bvB0|a|aKFAZ1+})9D~HUxz93(642O8r=|3J*dfw zw9le{O|*2&&BOQ)ST3U-q9=GneY?Y7+TgFi%PWyj+66LDJKbU=%B6($s`a!v&}Zp1 zF4SLjAII4j77Ny7^76dx2dpuf{KArQRTfiBw;BH=Nuy|z8NOO=5qNA=u-~J8b)qiq z+}yH?dDLkKEp8+RGM9wD@CpFTkt#fL=J&N0sjWLhrzn*Utn2 zHPX%|kwCmRECcADUA!D2WQvukXVFZF?JPkJr~8{d|C)cNqysb;P)Jy!v6wCkx`7v0 zrN1p%&5s3*9W7-*x8ICsOuX*jidLb9$c&W6FQIAD1`Gn)FS|bXOTjME)y_Bf@_9wu zX#A2%>@pO2)EZNHaOs)HLfRSwy?YF#opseIk8}kpj-*am=W^Ux^2BW$5Ug5vorhv; za~q&ZEW}47|KSQvLfl(kq zK=vBXLaAo|EQ87f6#pIyyj=IW_gpCO)UKF-e5)~|R33Pvav2|A2*<_(kil>?R1e#o z-MT%Iu#)(BXPgPY$WewjbBkblvSNXs#+_<7Op4AE5#WU$wZ36OhuuG!GCA+`Jcl4s zY)0@wP$#$Roq)n1SUFt{Bl;W+Ts74cV_s;#Zjy?+gSGv{I#w-R4bup7Q zbobocnC4!`s9KA-Ej%J28c!gM^M;-B{(?6LSv`rlO%^^3J0R6F=K7yZb}3&Z!v)*- z#~b!jVdDc`D}32qEy0IVops0P=Ecg&FbC~iCo{8S-hY-9O*yrf1Ez{YFS~w?q`9j8 z4cLX2S+E8*IbQE$u3VGK=?){_97gcM=&}-d2aUTNJ3+671_XIzSTrf~`>Bh3cj?}Oc9e{Tn zUv&!8xali*!@T>GjF9l-yXb^;Xetnx8vigXwl!R-XGfTKG4alZD=M4V`B%cJDgz2AyVL>Oh4K(J7w-By~`nUG=1fATt zS|sNQU~3$3C)Xog4=XwNYav6**PWD9+m?X0o83C@?GbkWzBZ$zWxNpXCuvmYQm5(n zhV#WJCqkmIG=AXiFOVF%U-L+N^4{#cn}dQ8f`ds?7iV}B;wl{m%q@;?!BRf2E7msM zAF*`V3)*mx8w{l`5t&(BMQtd;p&4PH(|rP9Tjn?f(v-l*U+G!eZEd7waR+K*NaF14 z)Efqm9?hw02S+vDIPPCtJONC}U5?KlhYXbeUW`%O7iRO~hLHze^iPR{BiNX7W(~9# z{-85rxC+kS7>kZ?b>3YrR|g09Jj85&Ow*OGr6?TtTmPDHR)ku4J) zLdIf(PC9QnV#e#wgXMPUgfffU(}0p8Ydr4c;~XY;O6V_&=pX0T#K;nLJzbO?<6k>J z$fQzv7M8`=lI{@^FW@d}KmuA%Hn}N&V=8_{>`aHK{&u^X*F9zBl*4*#zPo5VR!Uku zhwpOgaX2~}C9mTqp*#T$^e80fz!WqQ7n!sl2L%@cR5gLt5nJdCAEX|>RentzbI#Zv zl9^cWc&+ZG#Ofl=)RW20vfhyTqG0-}e@)6D2wJb=vSQ_jg7e3FJ}r6QES~Y1#dj

    J{`jP7&P ziPp4bhzbGykf(hS04r<9Ii>Y49{XU*&a?jFHqjq&YG<bx4Dpc;TSA4gs3w=`D&(WtA@+ zZ}2GAHunKeI}w(?DZ%n?Q6y~D1Kthwr3ZL8w5X&iZk<>%<_7`vEnr*ibbDh*>`!k}xIL0bnV7Vy z$J9~GbTCxW*Doo1#PfMw@>?MNlYw-B69*1Z6IvxIKJ340Uf4Wvr4@12*}^Q8rKUc5 zjlkf4s?1ClLj#{}v_v@VRHvC`U^o$;yovyWoAvJqd?LLa{JE(xa{^UR`lY@6(Dc zSJ`ILRwP*TrP^NEB{pCC{pZen=uefi=K9ht0O4+B8#(4 zgL0}6DNmaV@xODT(32=DtRJrYZr9=vWv^*1VsvZzF~V8FK-^dg6>C(<9A?3EEcXP6 zc6kD-*Rix5V3`vltiHuIRZF+0I@nk5rP&+&1QEuJFcl~>n+ z)^o8}#-E=6_ztU{^gFtUv0Myk;JhYnyai`Pe?}4ii{w*N^{(hgfe?nxySJBjDx8qE}sfEi4>dob~|Htayx7ODLL9f4+=Eo#ia+S*d zmoQ&(?tiJOY>B!{UR;V<=Y9fo&^#k89hLiRI%-}lPE@GuU(buwb?@IdLGVoki)(Oc zcx73y(6mHCpgbC403rvr)>ybKLZ$c#K+$}|o!Fvz_i-oqq~7K7E9_S4bWkH2SD$vCxL6cpg-7O&}vcIS3mL3BE-^_W{iQS`-BMo}#=6fn?PeGYq29u&%Rlf)4g^B6M$bA1DW_9lZ z@3I_>MSoyxG5vXtl^2?l!%_|_3wN|5qQ)O24svLF*{}-B6&Br4xPV2RJy=ONWEuhZ z!D~aRkN6|E1C`%lCwDD9D-(j=p5xOM+Yd#=&a*fErh5nGzQ<(`jYYws{Eu*RS#+z} znkT?X!P2g%!Btnu;p4`QJ6U*%7=TbCHQ)u5=}_RP^|yf-BV>12@3#|7)iD9?M!#s(mf+G5 zDoi8?!?{K!)fmH+UGBYf;^o(hZ_*oP17s3w{AYOd{B|nCtLY%-AmyNtDWZ!GBWYO6 zSGVu0P=&bF{4VW4-7y?0h8}U_@x#i|2?!ER$Gn7b#VudrG|2Nu?v?Qt;^X=IFMNUe zO<$y2;g2a(t~Q(maVh&VURYXw1Vu$3qxHSG-Pg@aUZ+p!-h5KUqtXCjp?^{F$nh{> z*R4O#CaSWZF@vm_Q$U)I5)GAs7q|hpK3M&c%9qGz0(=l2vBJ}Od(rzAQS{9-+Pj|B`3F7u z?RZwMGYJT*jteHb3}w>sEYd1n=Xdk1zYEbIyD@P3e*0b6hdytYDi(O1&VISo&(uXC z^92BZ!!;ED$8o2CO}a$KeXhHTeqSW5rJa3R_zK4Gqm3>MUQx?88*0$NcwO`jt^xv; zVBcr}!+x;?Q05uzxdOpEr!9fyG~s`ufOAEN)jwXpM3-qfaeL9j66C1Rjdjm41(?r+ zwHrddln%Jw@0q3s^B4!?Pj4HB>1eP_IqSp24nZV3x1p7YZf@C^LjC&?rO)7FqlI^# zoGYO}=zgH&(mir%E~mpRTX)3$+?|Sg4{+73OV`sVve@s(u&+>)H}pF2CrMz0*{P}( z^Cg*B^M!@E7s@OF#GAab1{MiqyBduW5k#Lsq(l$;SG&Ki?Sf5>WREX`>x6B#W5mYY zPp1A-8Q0dpLt8}&q@p86T8Pvay^4Q4=lj|6APEk|>LO?4mf@;>_=&#ks1@zSo=gi& z`3w_!M~^w{T9KM;qLH`;KOi6<`acOoX+e%d$KsD2l}oFLV1#oO{ZIV!D3JY~{u6-2 z>BAG?WtGN5>f3j)R2MZTd6_kGtqMoorpWv)!|(*dZE>sm8@`UvTV)71R$+J#BgkmO6W98^_tw1ob3c42CB ze(K{KGY_;OURt$BO0zsWnKH0y+8C5m{322vz^atxBHtmADK&Yteex2QcZ-#v6r~=Y z33yVYY>tnCwwXLoE~zN9nAg}^mb{{A7Iu+OL!(EQuT6_1)9_ED0YEEZG}nj2vsC| z2*lb}m4oS;7yFP9fVIyx0(?P4cOT{F-fZ^1)2avCZTr0dWOZGc(o39)@yE#?iK~Fz zNRXgjW3$oec@(eFTo_3qp!lApWAq=1l=O<*vJ#V&CJXtzmb#J)+DQ1RV#8c$CVJ6n(%4iFD8imS z_ahb=5fUpA={Uasj^U`%_x&f%N_Z&bZ{dA|1tkmph|928F{MPp397<;;KqE?57h79 zRwvaSSClpw#QJ20xxwiWrd_r*0-AA|Zp0*3!wwXd#o9=A^&F;UyTiYISe-dS03Z1+ zG|Sf>%uRu2pS1U(D{!V}AX7K1oO=?)#|BGmD+j6eYbU76ae0l68-)gN9-40|m7s#D zE&Z*GOPdf7L8e#yJqlYdnP53pWM~%= zmkN&Vt%953l6H$5jrM%LG=GhVACUEUg;G;vSOJpDj6Liy2TR))ofB>t6;3C-N?qe) zX~hNH{_e~1_npL@5^_(M+7{v%aA8BOV&>D_y{M(}7BE`-sD#Y%{6vIJMu4g zd>A|Vkk)i6j8Qh(a0uQ$5Zf_zn=d42zDa~Ks_jhv7(c9GB7(~E0-D{75j|tt0u{>% zVvM!{NU7MpKBVjmq1|*cWL`t|LOKm-3}-}aR(#)`-_(bo3{>YZ>M6>}uB?K{|LzeE zjZ~U2LnDTZI;BqhcC$<-*T7}wRN7#|0bbE2$qj^@mVt#?DN6O;|IVc+7#0L-C`ApJ zc{v=dQ~~WNFSMnOwM=gPRm(35Xfjc+9Ih*Uz0%jE;-pT^xa2ICa{#7l7)r-k2^Z>4 z^tpc(ikj`y=|9?OFZY6KYm405!ciJ2d-!|AV5Q^bGk--S=$$Z(?3jj(L^3B1s-yqT z|113b1zkL=NHw8X=$dy#$AKQ$XoaIq+-AGXVCRvYv(9L-T5prDGkut6)KDDRodUN(bD9wo@i24}X^UxG%F_|5t4aIU;?+j3F!BoiiikPoQ{kS4Ku~Rwni@V+ z&aY4$_Usvu$Dz=i!?#v67g0{5xp2eU!gi>T1^5pf2cw8{{zY=Ah8*J|OI(VvOm3S4 zK`@TMAF;E0vd^|};_xas;?|_cd=H7n%|tA79mE6|vYNQE5Mt!h8C6uTZ2EDGsm}WQ z;r9AvZ|n+D3%Sx&JRk4Msg*}{t>@q)PzH5SfQ;ZTyDaY>EFh7Lzu{=fIU+@4&eU;= zAiWY>9Xp+=@VYQ(JqtCtf7wm{s9#fy=YpL>{+HUB^p^^ev68Hl>T}FS%j(#leoI{u@p>7MMbPzNLohX5Ov;UQ60quP?DT{HbMS!rwScFLjEI1 zs*!pcLl?fsEoskcZtqZbKB1K-mXiA(r_2^fxSQuUL{*h)NF12ouBT-6u`0BEl-Pjc zH_>g%ny2^|i4!xb_ ztDufmo2IIrIq+8M{RAaz`W@lSaRrKYwY{Wk1#rZi?D`n-%yR3`R)DL&;&9_O9URd? zUMD5V%+=QHGc2I8$h^p4inl15MS8!E+ETO@Bb}0gQpV5ws|~LlpeOR14|+GfX_;T2 zuOuqF0h#kkthSaZJpnGdrMGix92YpP9s6;}Z}d#`c&NZUj&f257~Hh>>^u3do&cD^ zbIwZ-D^GyS57|LvXFxLqTWT(G*L-xp*JPRuQr#3=Ho#D`-M89q3ht?Ovv; z>Ivb2XMwei{|f(x9vaEFsHJIOe#^4XfL9c`M z>lHl>5)vGyUxFd~@DU^d{0ZQ{FB{hSz)Eb`IH)zy?`F|*Krrq84@F-ap957umduon zaFn`XX~Lgu6&z_peh#hZGgbKq6{t=*Uk|*k@@g+`a(qy_xZIrhu>LcZRXqWc`i>Ka z5%;P*;MwxSZgGnp=K~RP(6p+e61SjZc|h^!XLUCWapP)0byfcN4g-F(b7kWOi_l`}#0{C7uOw^xPXs3b3c0ds!&j#8-Iv)3c$ba!C3gF@^jk|-BPcHv|d zdDecNEGePMzb+?xJ7HSp=aVtt9(K8ttTKTu)V`9Wkz+|Hx>6ADRv+I{UndqB-pGRTxmv>KgT2?(h~huSHJ8`BUN4O3g3Q2 zNLjQ{xPo1V1jGmPYOW};24~_jf?`Utu3-4GKU?RmOUEQ<|dM4!u@e|9B{w7aSUJ|7orm6j&n6iHgX(X{dY`S z(4@V=TH-wF!_TNT(11vhOk*8V#rGh`DP0(j6dkhi`N{ZVzCYpTv~(BlSGBw8Vt6p} zz!DZZFn3W^)&> zz6Jj~AXJVar_tYUD#{)N4XeGSn+Pb4m5x>L5{G}B$PBFA0o;B#VRbtGmwMC>+)7U5 zlbIIwxd-C&k4csk?JpYjCFVS`N9Qa)w6@0~Wjexnn?PzWKB=?+RrO#wYF5jbGuyRz zf9BLaZ*T`DF@1-F?SOt0o+#_ve>F;>dQZvgR_xg#MV^*Rzr-||qw{UPwm$b;L=ek< zIosYioh{t`0oqEt5ye`{Y!#Z{DQ`?j!QV)^)&30LYtD)qE_ud}uhEbqRoxVwqFFqg zOQs8Rh&Jfo!o+2<+jLnDL?p%i8TbgnBPTw=?a^?ZaKj#+y23`v5iu!~h|<5Ts!*7p zLC`6v;M~YLUNb&;d#L4=JqVglz1$i$=%mKEwasM3Pd1pb_IBw4+AZjkB4vgDVvvKz z^dtQW=iPi(N=S-{5Pj2xDVO8=+l}zN`Ol*Z+LzhApGxMA&=~@Wb+&V|oQNkhJ*kYS zPLjzzoPrc)bR9SpI=S$A#(#-*ZdS@h*bNI==G1^q$83kbh0aP{{vas|_>E-P0=?{b zUV}|)qitQ@en2fPi>%1e719jm#j|H<0rhCtGA~01YpamV20&610QtO`*L-3T=Vhry za;a~8x#)i<1v8P2P>(3@!lYVL@8TmpKZE;>cDO!XzXctqv^LVf$R%dp&WwdEKu_0IBn zi}$=6n?4#&^Xk1wUu$LU+2}Q<=k}LhzTxn}dO+^!PkT1Lt=AM>?vwir{08X?>Zc0= zSNKbp-Kr*6dhLpWj%E*mYK_s8n|fs3Vly$bW9lqelBrIbC9}IvfV{0%u7NXUB6g?I zC3Ssme;hzq^13{OUvz=6QEtml?A)dQA3J{5l(Qm-Q;<%EPD4xG3e}y~V$d^YdN5b% zy-TFed%KFKS7nsRWo~EkK@q2wtkBrkm~lVlkB) zH;obLYmL6cR@Y<;2yDmLB`zpMbRpBUJ4|GwmSjJCv^h zyJ6rmOEz~>KK3ga(s@R8qCGNoJd=sSk7boEl}Y~_C>hO)rIKgY(-;NsgJygw12d_7 zHD|F z*R@XoZejmzmp!)bN1nvTAz`Hep$_}8j_&ju6F5G@!}=0M0B%x`>_Wn^%O4)Aki>i6 z(&x?c{Rv=VI4=Bm360_UOz#O0CiqwjD|YLfqVZ1s2a7`jWW}B26EzIaAEzWey*A% zH$FcsYo1;QMsz_MYJ+ANZ_96@J8vDcDN1FVh9$@>Q}t!%f(aDbu{yuzqfpN%(W~A+ zA2}yZN4xJ_4v|(v&jc1ZTqfR0GpKgd)#`)hhZVYTVe$CI7Fsm`jP4Rfg|(EhJgHr9 z!Tx6ZV{`K$(U2ZJEgLE6X~-GNfr@y4Z>#VRw^#a=LW*B~I2e@MU(a)wk;Tfnh|3zD z6;hLW-o5Fojm>MuD(2FOd3)S&sPM9p26`8_CF9j&x&T$3^ywkT*7u>pX1r63AzRXA z?ajsbT0^Hfx-OD#>L#5A#SfKnb&7o?7BQUhYy3=uYm!kToF6nTCQxwSwzdr)PMmKk zLTXoEX0i7>oJY>oA2?jt)Q;0TmEO`;w?iEA303oefvd{KviOLQq6(fZsJ7{so8)I) zLMwnw_?20Swpk6u=+0z1d4!Nog()az?5Dp#e(srL%e9rGSR?j;&QDgx=hkmu!58`6v8Pk^CuKC>U#>)9qtpGOUtr(-@re7TY!O~tAF8OEYuff3 zMHZ@1ksE1zQS?k@5EgJ-EQ6nX8%4p@W6&=C{ex@2IOv=Q=A8s@M6H3}>`6Ec^ zmzcvL`)2*N{;N)U9lF5f0Eo}8t=q@e;27j1vgK#X(VgzD&auwDdb#Mb$3w71N4MiM zFTP-D;qy@H#eU8H2%N0se7tapHCiNl-1P}dXY(|>oEn#1!+Zkp_-MH{DtCYb1s`9# zoKATn{d68BrDPlz|9nVSCxdv6)lR`iB@LMg?H7A;;}+fv+Jf`)wm@-rcX#RJfA7q?ckZ2gKh2j}Yd-9iD9iEVLZix+ash(B$bgSDJL#zxSimjw7xZCuSxHm+ z;=qT0)#<2AuVyFz_g7*>ddw%wOlq9@G)f=zyMHKKUF+p$Q4;uNJ7O^WW_wVNo|jT? z?4PwxS&piEkC>7rKu!<7&}bi zT_T^`g#fyh4@2qYUDT;Pk?x4Dv{TaY(~x#D6|J6uyTT{jazN zBa{kGzS3-D|3`U-b6Cas>+Dgq18gH|xpSp82Rb7Z>E*1ScjK)yCdVzxo;L{B zTXJTVpq)_A8rtY63R)c01%c<~=aH#aa8sEoD*M5b7rQgAv~%+M?q(qm9I^07mJv(* zRv)Gi*}(V(FtVbHdhQZDqPO`g`Vv$MWDs5$)pZ~I!cJ~0e6&d+|J)Q7%%6U!>VO0UGG{7vl@k-XFB zDCE}sJ#gj&ZrZxnse!?rv0}Uq7Mvh#HomZBS7h=cn2wFnT@u~cWXr;-PhOyw z@XM~DNvk$K&8JIHo!y3g9cps^YM$AL#UfdcG<<>VgzG`^$!rOamK^SxGdp8~;w?|o z8Vms!AGl^L@g9_D79YVpQJjHd0+YG$4$+qSCq~$L7IKbZ*-);C-*zeBgDl>VPo4dP zi}G8v#>2K#Id%&f!YG>CcgbP;!^s|nQP3e3pY}GvTZ?eAnp``NwOU+dX? z*tW1a(@Dwbcg8TT-NsyvomyvP)p+|_-eGil(Sr!OonKk=fH1t8`ds|+m$TkyC*`t% z>HSiuVcBZ8^NktAIoZo-Tc)<7m%8R-GU@>VMmn_MoDIxfmc2V@;`2^ggUEs^`H0S` z9`4^VYU>16OC(*XlGQP38Q*MmZ#q$X9wvTGYe@;S`k{RpIb6z2R%yfpUq3%zpSAFh z$x@t)|8%mkk}+fE;~*bsqbrC`a}JQ+vm4V7GrhebonYiiDs7G}Ap4+(?c?70(&r<1 zDp4US5430wc@5{es3IVmecn^3y>Zd~VpT~yQF16{#@1>uBF4_Zfw@D=HiKLboB}ai zRwA?Ntt#avEu!Z}-k}#slw-0blWO26S`KiVppd{&Hz>CAm)_(xS7>N*yK}q@C!dHe z+Fl<}cA=3{w$c&h|2yb-adBM)D3u{BJq;=h4;1PvB?~g99Sc8h9S%eM$+B;> z%gV)ud(%q7)Jrb^=f(eE2X3HGm(N;0dL_8*w`c61V@O-t zcX6YP_Vi*mGW!4jg8vUT(H?#f#-oh?KNM`6CoPT7|JUW*AKNWf-`b^g>*H*VdZW#? zDF_?KmX?;H@fRc1<^7MjGH^x=_sXUK@Rg3TfygM#$6;gIL1GC-JYMYbABvp*b~q-7 z_0V}`at}A_cNdko4u!8jB@FHQG9hZYicZ*UK+p%Ef};YwT{iwv$xb!TsQmx7OeL6m_?$ALa>@fvx@y;WXB?YbGY`pE>#YE8uA}OpR>4 zg5PT=_axcK85ya7D_zPe`yw>etrA`}i$}vkXkW?L+2;Yt>x`=;sELug_v~KZ^B2tR zoFhb`b#0Be5Nc2EdI~DB_~aG@5$HK>pWHEDj9K}wfs86|P+_I4BMMcbLG1)JVMXp0 zrJ8bT;roP*dY4#)p*vcsG!fNH7{C#Q#%-P$_?sA7NCvc#8omr^@1FC}OEy^Nc`_sE zNsp5{@My#xoNfqxLWV=j0ErH+p)cx#@Rp|*UA3Fs86Sw&r~j0#>zcgpk;x>;YjEN2 zALloxwX+jmd_~Z}B?tsjDk9M_!Jz)`1@+I>)mHgtb&K{=NrPulQl6!`Y#fStyidV5 zF`tvbl#qUi0rslWn-jg`iUk*Y%Qq6k#T(1*qGT~=x~%_p zr^)Zl(D$kAtt0mlNGc^K5uajSH_)xLG~ z#f~p~E!c+e&l7~ys{r+_36aygVZ}n(Y4E*X#hF!`2RPHdy||I51v@3FOkAUv7#ap&YUK6|Af$+hzEg^J!>y}pG( zroDAigWMOjq?i!Xkl;WaF%op?qsuDvuE{^83sL-F1pkHE08ZMwwa6GM?UTsdPHw5|~nJjfW0YM3lX zVxU0acG0u=?jII2`t&KvV{l^QupQi;-(KuAPhF z0AGTkQ)(_Iz_KFa1Conn1aD!l%P(#Hq(b6mZQ~lD>2J7Tn33GND)VuH+w*t_%Z_}s za^Xdhn_8@YF+!1l@YCxb(XBpO<|W4b3!%zVb~PB7iqeuNBkC<__k2~1Rxu3RXcc|U zs`g*w7v_F@Nog#N3em+*QI2Y_GMlcn*0*8m-S3wH4Q4Up^;++n#9_xDR|65t>r|?ih0AOke{@`V=J{JM%}&85kv9iGI3zOim1(l ztrINzRQ9CR;5wsODiAS4wDh!^nH3tahb|@LmB$k=dSkr$2H0{@!Q)W*JBDTkk5eE+ z*|>t}pwdhTFmmj571-H_qUMvyB~$!$nRju9bN}_Ar=7Q?ZPPxABc2fDL>wrVBzQ54 zL;H|7j~~MO86WRENUo3A$8A}mpA2jmh2;}}$Qja>BZbAz7)>M9&u2X+Mss2u#ng=3 zD0aJ>Qqmqz`I&8AU8qlx@AGe@%;a0i829ZTEB;-S_k@2PD~yk{tgpgfZko*PfMu2K z>i<&sQ7#kTkiTYUFyX41@MUDl!jNELt|(z^Qi5Dn4S4bnE$>ZLs#w2VtWryG@e}U; zn*6$EL<%Kt$u}e0PIxJG_xg@V5}UKGv5=*5}LU&v`y~$dw zB$wcWoK@Cx*HFoZFMvGeHNd^G8ZL=lqb3meoHM4T+wx9RVoToUN~+`Jo3uo#5d(Kv z5z#A2O*&c-9_sbYdixdO!Bwnwm0d1;N}OoLS(YU~cQs|e0kv;HP^tSY!=29-vbmdE zng-v4r-AzQAvS5m#asoY43l6?U>y(7$No`>zKs07A(~67MWbAlH)0uS6Xok0bo8L` zOgz+N5Tc?2+Z2tOZAjOQ)5Vamp_P#0ET;k84y8=u8Ix*S!I`FoBN&4~P-2!BIp6kH z(biznLb`>T4I6w%5AU69rWk#~PL_L8!Zx1o-bQshP4gn@pH^t=29C??fQBw9rs7wC zZwl;v9}n<8aAYl+KNv%EzUc_8*3@?JFpCB@&`7dr%tJHpN)%?BLs}A}oke_Emg~rc ziLXpsmUxfW1aMrAWxtOAoijGw+4R+Y7gwh%JuvPE9m+H%y5Hb0IXpcwN`_` zPjN}a^1cDvWdlyz5;l-p*SdVcT|5Qt-@rJMRY{%MzZ*W88%^?xqM(l0ah*&_IFy~U zDfg0S(VUXwdxc|OQuNuj=h5Mbp4}4IJ?^J!Y5==RQ$p#K z(M$G!CoS!gH&nNk+1Cqoi4ZcqV?tEcEf`wEjkfRszWk6lLNH=lVp z-UJk#unDdT=ieTfKfD>&4;v>YDxe4K)Q*Te?KgswF-ST-My5q(e9Z^;oTU&w0Bp17 zsA$s*)?Fgo%DAFnk0O*IG@yMg{gi@3#2?pd73X;9cKZskTy25h(c{zFXL1qVOPJr1 zmBMDZU|9u$R<{$7NCP)dlZ9eF`@XwjHMS429e2yc`aE#5S(Yr>$OU{2s9P}T)2FOcu5Y>deV@v0nV+zS_+Kw3Reb9(XN*x< z2neM81Gx8lGTcP3`no)E_;u5wQcOz$zNZo+sFILaLlKQ7(BRh&P&j*f*u!mNiKbb0 zLSOCgPVgs9(N4EPoK0vnD`9YuB)K33J7th%RIz21<&^&CHHry{%zRPLyTF zDMvU{qwu^J_zxR^@pT3g$mo>Vg}A4mj8X?(zBJUbvF+DS(oG`)ES8KS1z2ykKS*Kx zVRaWm`L-T86Dt0CO8C1A!ysq5Np3N)J@T3ZBlwsXY5gXelO0UhV7s!l6yDb`(5V#? z%~E&~0cR~US+kkq_^HCn*RoMmuprK#;AR$1o)o`!O1w}|LdQy*6cV%4I#v1V$t08M zW3G|ics3XSF$a?7$Eu+S<*~hGt@62rT)jB5Pt0%NPMlKJW7=2l3>9Ca-n{*rj%~-n zBBa0_`X=5nhzDt-3dt*{iL?~dS2OH$RV&=*vMlAwMfmZwU|E_5sR1ztS(bfEr%%c* z8?!7!-6!ETzJH1$`=C2wmC#e@ZN*m6#j*NeNk65`wM z`o@JuoD>ZqQ~b?HCJq@cSIOFtHxo>M;@tw0oxy?28bmxdq^9sHqQaWJ`j%^PYvfjR zPq}b;^|BNvVtpl^&b#+mBxrZELW5K^(7y8Jygi@Bg|d0}JA4BiUJ;X63jSbS{@Gl03$% z4O^XUc(``ftdx+1cSPZCUVe4z0rj^6G2ga@O1p|RoHVxAp|nn#6v!Kk13cq|So%_A zSLLfWrgLr-eQqG#Va6D5WBuO%9Od_jaU5_Bp23k>x!vKp;li~L%?`?;e+$)vOCJ|D z`^*PHDF~cAw2xL7jBwY%_jlSR!`#ml@SY&!gH*>;N8FAq^{_em?Xgp_`t-^MNeu|{ zEqh1yT1@h9K~BKeEb=-c)auBvdDfozsZ<%+=SNyIo?_64=uS<^T2IgW6Y8$qGbc1YRUc)R+2j3qd z1G@jL5gLjA3vBB@z^(sPk)nH@7>HyzmzUgs%WJp?aqCACxQWe~`F%>ewv$)9chX+^ zU3Fr}>$%Ro5RNSeE>2aE5Put=&!jt1q64_QoJPmNhEhfzTj{v8;JKm>Sx;AeUg7L^7x06 zu$qpV{8mNR<$BD%R1>iG&ye)uiw!%Z5?HzcQ1hYN&UWBor2l>hZu@brW4l1vVF zi#w;g&R%60n40YhrkV_YOEx4FA9n|IxFfRqoFh}$r8Zhr%ApVsK?jauer1-d{Cot zFNRL|&Dd6NHYf>(wRt^AzJqAh0$P<@gzvG1W>a@_W9tD^4j?3<#?-%?wtaCNL(seXuxFVA|pwFvsOldBR^Vz_OQIEyXt&O!*=|n$4os};jb^I zw#wG(5g)g;VWO?Ckv!^)LIFGU7t1{!lo=7JtPkA@Ozc`-YR(!t8K!|5G(H==`LueH zgp4K)=83__5%^*HxtwGkm=!fO>u+oxp_!C^%T*S6#E4)DrZ&ep0gTP z(xRINv#A92^{&#{Y3fK0*%&ayjmH-s+Bl#=n#srt+|b}M-e?Zn^VWu_1zI)1uw!lo z_wHbB?A%%qh^=f~mLj?`FbVi^1+G43Ncycp0j6;gh_2fuz6|{-27dY!_EfF@jRh;= zqf|e(8dRzqW0_q-Ri$H^G&GeM=`v2aan7r_MjPE7wq7T>A1XkY*|p+OluQXC7m~Yf zICqk)1XeOem;HbP3)(a$JcvCvFEBi>kiM`wgYB2ew2)}LRAr?|A)jkI@Tdt=F zQno@Q!Rr|)#NSPgbb3&|%v^MdG+9^$Kv0LfUKaBK@VKdSad?NyT}PFwIa0~3<#T?) z7XlTE;OAfi2YVDd77?XY>f4LeyScZ}R=kwRl6iND0`Z;0i_HK-pT)cvF0q{`DE-#S zlO_0bl}9A3=xho>zGY~CS7PHE8C?7TRR2(R^g2PnO5x4aM~f72qlZM|cIkJ?*R&RV zsOVk2>M|Ov_w2iJVfr6^eQ0foa!*#l^L1Ol5S#PBxKX2QQ|=oI-8GfqoAN_CGOini zuWJk^=?(Py^Et*nJA?km6(3r$hs#EcA~9gv&-=ZY+S;UIlAd8J&C2}~aW^`t$?$;% z|JHc*zeF6zxzE*+*(O+zrqe>rDxRve9}1sEwcE6Rf5lwmJ3gaVBuH1oz}CYU&CnT0 z!(4AX5xgB^75ibuu+5TQ3c|7D331ocvSR{Lsh#LLCS*8rEXt=mCRMJ33NsQ9t7H4c zladI}DW&}hm<#9;wQ{n?FV8NLM zckRKldT$oNfWEAaorsk z1pk!mM?1%@g4`W3SvcM}YNs>^5P^~$(~Pp-bxYwtn6K~;#T#iO^7gL0f46-Sq<%Cy z6L{F?^QzN7lqvIwq-PT9593eoCa!6UT}QAlua+m=%o@WO1&fyL zq!gyHH7^t~XxZ2`gw|WODfbcy(^y|JO^?^$*F;aDB2{h3l6a84VYzaQsn09d|_iNp342W&So}#<$p1LAK zv#ulj)3c3LdB=@?lxMwKgPN3q-q>RFy+S%EEE&H|)!9SJ4YBX@)38Nhisz^WIe4d< zwUH*7w1pbeND3--3O#6(pnr{MId6uniYD0YE9kl&igU#~uo1>*!=lBQ&}fAkV22d{mJgh9cbl2-Wn}O z_^0}1eMKg4Ed6+oru%SVsEU9#y&9`{9+;saGK$8kWomknxXn(v#xnT>uXX>Y3f-Q- z@W_nKq%D>Je>{}hne;%=sxgZcn6#OYa8R874he}l{AT5YeJS=sr))9US3viAMR~d6 zULc%)6yM%`!$YVKdgZ#?5$XC<-kOx}Rob{Mq{^1b%39jAtuDSGsXUZ3R*Iof=krs% zi0@!K)>i|0(sQnvrt?iZirM9U$RczhL-F4F_ur+jdvJIr(NfWs0UH9#E|oG&fa&n% zu?8ERaR8p5^*i4x>08~)9l84HkyO#CZw1xb`+NdE;-9jsiHxFQ_?7#o>(6Q;Ge$G~ zkK7XWe!>1pE03P8a$-~8^=($4{Cu+s6Rexh-%Ix4G?Nx7_xCwUJC>#aH zrLp6aoogzaQH2-;MI+zo-3p30?;*O;z^-Bo(P{V4lDsW59f!f$G{gcO1(*=v~6E%;R+ z7$!ef2;t5(i8jfp{;prrG?c#1IxDx|U!(0ojn6LfGL_&L=AfGumb69=Pa!&IVs?_~ zxk_Ke^gk3GT2wo!cQVUN-BZQe5a!Lz6RRMC{1Yv+I`xM1nhs3=bH}lttFiuY=ZLbZ zqPe&G7~Ng|C(EZ~NKWa59Xqhd`XRGPowF0`hX%qa<8VWUFk(iu@#@*^Y7Dq8;G_Etv|BF>q{ z$Cb?dDF^ic_35b4M{y;8tH9xuk7@l3bs7?9>#2CEJFh&_q!}NA z#Cnek^-~YLTihLe44?al!fa3b=pBEH_YY+-`#+vBq`cSLy~CG=t7_Q~QqG$QaL2X5`Rprlxpn^cH_{efH1O!-TCA`2 z)kM)=Z6}@>b#9%E2tRAc_7=Gi87j_OSy@4A$my&=}eb(#tN5>b&)#l*%CprnWq@Fq)XSmp7>(a}-|o^a6Qc_ieAM;f&? zb*F(lP<^8kKj^cDZ6suBIORQK~~*)zzBkQU^nBHS||sAW%AsC3u0 z{Zo=d{>;3=h~m_Kx=CxH?}h1yRFu0q!AcK({B9iwlSla`3-kSW56{1M*5WuJbgF3% z@r;tG?-<H@Jyep$zHXHCL%6{P9V?ZhJ>8N6Zb>qa#&h$U*<7tB9n*4O;}T(w^fe zPh4{JOs5Gy2V1V~k&2cw*<$jjdUmmCOAuK>Mx=mTwAydS~d|a?+MQ4hvIjNto?tI(ViQH^u6zLwvCkqIGirdHtf-!C^R3n)eT$7Cdu_U zrNSK*FJjmv5`0wI7cXfV5Ec`>?MqnH)8EVV748OKYJ1NQFLGMsFOmP8Mp7fre{Nc= zwoETfR-!wija?a53LVn=bV+!57Ln^Ho36g*h!&!|KK%^1xQTI838Rf&vzOuKtzF_! zQhMmCosyedCvE(^)?440ZxBa--%Ym5MbbrZLgwjtDN?a}d$gvgFF{{w&bJLWp`oel zFm}hzSPx%jt|Bvm#g#ttSBU{uZ-d0mJa9>RE8NseI3HuQksUuRQmQ=t3a&LxQ@{c* z^4Ni$ohXM{kqwY@?NdaQ?p4rlp@o31%hIBYNyYf?pk+*`f+XwC3ugO+K#ln8tR+G zm+*5P#H~w&AA1E-J&Y7f9|1VRO>Nqdl{rj@-%6doSwuTQ(;QtoNku>O+jB}OgqCe` znLb^B?{zofdXECtw+Df%Sa+dIpQ^ySbZPbLy=cQbu(%;B@3l!N2Aa5dc_Wp_>keuO zFN!J|gyj;%nc;84)Y54+LPhTAS(Ch|RY%r4Tm=2M7J-HjyGj!NFIb-Vl^Ff;m44ZA z*c$)OBb|IC`{)){^*h_}9{NW7W$DG)Q#Ao{+FGyx@bC}u1#R(Xez?f$9fA?YT>$a7 zDk)jI`o6-;u1a-n<`?C$FP@zvogUMDYFs}_L9lh0Ia|wvGk*IXjh<;XKp&@8Ry>?% ze7qUVdZ*$L|4>S_nfj{?W!gI4%~O8EwOPXqCumuFHag7yuG7>)S>e4I?3L&kN8+34 z0xS9}aV?YZn7$V!mNI5;(bX`&Ch0)V7TXOO9St0In38(|^#DxzE0;j5!u5Hwy@>oi z6O}@lPJJh80JM_=SOOLbOexRZqkkMdXgkEM;kGF@sxb0zmI%3^&Ifr)OpIlx#fM>s zF})wE6|>wn1bq&*Zv^<1TbsOa3FVME6F&a0qhbFoO6KcCZ^@?f^@BCx^l2V`S&oxd za;~#2dZDq2$E%23^B#LGeBN^)Y~Q_t7@eu>>944^Q@N{fnnz!woT5cHyZc8M=dsua zEb*rPRQ8kOa!sX|#?g;gfqmhWeTTlu&^oczn^zIdEe9?Q3u1aaM5$n&q}RzDvx2KG zN4@MSlSHP1q&@N+*z}ByW(q9xV)@i%_xlQ}mFeFK4H%B1+@vU(a_Q(7sX{v9g?64D zU*w+jvBytMQ^uyXK59D!O>mboDV}z6wPl5?{)qE^NolBz}VLTl+pmM->v z5H;vp0IZ^{6S+^16XiaYPmjk{z?E88)l27Hb~I|w7TKSZJ*LyUe=s#If}C`RZ@(tk zCw@~yhdbN1H0SX04u*%V2Ac#Q6#VLq+uOpnEFaILBvSJsP*bRno*dp@$KmWt;8av` zC0O1nRg!iI$e;>bsX_6YvRa=y94yugXieAVV-sPxWmff>WMm#D{ayH#{A|uiz09@_ zi~!d+D=X^EC$nZlvMtNnCs-AoO^cVH3R~}g4em6f3HJYCyOG|*3CoLDA)Rc1<6Q}= zhr~JdsV{F=wPQ@g@L5`XT9s=a5){e)!Y*U+vjmf2k3kfeUG$YZ)pCWdHeiPlFV@Pa zbkzF8*<$0Y`xb(^A;>*(4wJ!8Bwp>!K%Y&HvECsV>xB|vF{8i^Uv$l>8>7Zu-eu%3 z>dkt+5wjTSh=G|IUQn4l2%8tt?lF^#JhA)A`GrRqfVWB<;MsLi4W7aOY7IDC`DPxE zIWm0%UB{K4Paz3DA~C}Jp3$xB>^nxSEB+V_=8(p8aH8qCm>Fc3AhDwu)K!BbGZHL8 z_>s1nm)B@4yJd75ErFv%5ON_(?C|rr?P|xa&YS7Rnfux#zpW7ew&|mGAs|Mh%=wh2 z^*$A4lVX3#yjI*#-4jLu9!jHuK?&dV2Ul^XvwtWXA#wR6DM*7^Z?g$4eM5o&)#Vgr zOWALX8Gr)3P1$6ek22yIdmQ6j-k-@A&VRt2FQhMpk#)tlTltM!Jj+0DHJhD8vW@8{ zkyb2WmyUn0o)McQCi$p~QS9uWEg2R;k~{>KCgTmCoOZTd|%T2IuKri;n7tGWP zMMr#x*1#8)j*}TrrLK`iQ9|o^JNSWId%0WDONcMC6s|(#kiH!SV`ix$iYd(Vg0B&| zkxOe+r)LM;{sY(NIyD`2>HU7`IberOis>O(5CC>Aq{_%rhexC+bBeT;|5BFg5F66P zO8i(dpgf8ijb4E}bSRQd4LYQz=ImyH- ztr3DuV~M3mj^e{{L@Wz3&!3p4Rzh2Uk}*RV=2?ipo*nQ)d63i)6u(c*i%7a0RTcIr zvWN-|meaMHcyn(05xt=$J56`s9+w}v^T56Tgp<$bJ?8?l@{wEXd-c}YKvu8;?-rYZ z&ZjTzo`71JkQ(m+=U>Afz+k|L%*=~u6P-}6gB#i5@irt? z;wZ9dh;?B!m58WCj=`f~_U@TX#)uKMqq?sPX;xzi!J&n8=U5oo!r4eVd|ZnjCqmD$ z$dHTlZroUCy~kU{RIusyfXEMEAgd5SO&%X@4%r}tO83EqOM;VR+J+ALwCbZ7_05C$ zlD3sSN1FYWm)jYvd0alW;Bu5e4-E+)Ap<>9ZMiKpN$v zW5pG=k`XbW60X6&#_otaL{sL;a->jKfK+VN7|{P}lJFTWK9V+Io)Dop8auo9V{nAKBQN4YDI|0T76 zMHHSN^kbMYJZy8*`1TuC_c<2TPP@bW(J2@By7Ic|V@{9hmy)w|Wjpw%3??=dJS9=^ zFtJ>rZ-ahyN`IwCxvg>%Sr~O3TT;vXvug=~HIDk_hNRW)`No{9Ss0F%KIf3K282e$ zqJ^x#BJm-ymrqkxf4bEdN4vcoTJ_rU!yLJ_s5xxGE_w$GAc+Q3CvGnBwwhRy@wi=n z$g3cu45utm449v8b4Mn|>d2TdBbFmw&YU<}dbb3r)gN<==!|&_{K`*lmV=3#>p7$q zN(-WLhBm^Wu;1caL_5M`4#~oV%#5k|^!7FC&?pABd(2X7)=2Rq)4HXlh@<&2hbAH1 z6;k#sd6~k{vje&k>atbm51u6S|M`=AsnfG1n8NP0M9k-vcCV*}QoPQo2*8fiKp8>V zS!5T`*)^mr{|%UWYc%Ewk-=@|en+K`QNtP?c>D^9S!B(8U(|4%g81S0qjsT^P-(F! zw@+C~^Exxf^kI~b>wmL3^nY#~$;HaNR&?lz|LwqV!=b40=!PR8Z-rHmrf)Q~AGg5% z#;4=?lh&j*CWc!|axYSK&=iM;#jXzU_M+Pw=E9X&o`fTViW((1_bd}0;;P^JetzRS zxv7|nl7mduoI?KeoiTeO@M$kZ_RDU(@h7$(zt=B3b2j?_>T z$G!xp8Aocj#Pbr$X0Ak?RALG2xO+LdDX5WKY%7?sQ9L{G1?>#%&Ay5YxBl_J?<@az&viEi*5MjXquF(Jnz9-N1d7)>BO5Qlzb0RbJI!9`T1H{n zMkie}B;CCY@7Q~=+h)&K4yKWH4rS@qCju=i3|Yx~M^bl@m(HKVyJI~u7QoFhp5a(n zD96pgB~Kiw7U9h6l=d4|II~o4;;nSqcVpLWr|Vc|7;v@p<{3H;uA6teif?iQVB%Q$BusBt;J;phqPMqMQQH%Dzb0ctC%} z+`!yU*UJ~4Ren1-m9jgH;=NG}>1JVMJXTyEU9`JeZRLhr1{lNAEt5HRDON3BW=T-H zzE|}oy&%Hv*B2g&uOW@#Y|0Pv3D*wH_I&wxWdh;SSC;CNwNb6&DGqxiqnXd9{`ICQ zoVrhu1%p7$0EBaPMQx5K_>TuX1`MZ}{wmNWdkQ-|Kt zacq5=9DK+7>c%&(knl16!d9Ijl8^mn5fYb0VToUG@w}#Yw91lgX2dTCd)&4ERS+C> zkSn3!a>wS!?-UI5uKmMI<=2ni3uTGBnRGRp`ijovNfBj7^NaOac-W4X@u3`dCVGt#v2Q-V|NVf*#S(Myh>X+hfZT^7*-wy& zcERk$LWVQ&RhwB~(}R;Hg2cXkNF14)9#mNaP5WuQbE2&_0Q#V*J=R-d@t*d#%A2=1 zS^0q@5=_R)B*pE<@yT&;#a@So19p_wfQINdN9EFGm%m&C&lN`X44vSR#T;=5;c0Jg zt)zyGY^#zvd@gHt{m2+iQY#=%6g%TXm=8EV4s}P@$j8o7f^H{R7Gkf|pZ0JSFfh29 z{ZsQ;ROv*)PuDd_mRti(s!E-P?Bqfkp?b)eZk+ z zC8kf8yQw7v71b=qEw6Kp%C%=%$juPzPz)R(yKS1H5=@E39*avG)cq9@{?Ii36QLgM zEeHMuwr^zebL1}}#GfZJt1$ymRk_HG?gEx{`sJ16ZHh0 z*pSc9=6Bh7N8TLYMz!vveGVwY{}M=?&LmEbfOcc0{g5g|6>88!NOJn2p9Y zadgL@IZ;r@k|fAgU3fPrcx8%kJ$Pqn022t!eiFpaVfFd;Pv}hiGIjrf(dQ?nr!NyO=3W0l|IpGFqTMAQ3f#wD&w2D0Ok`A~t2n`2g3a#0 z1(7vUaUW(+5yTxn_Dwfia$h3R`LnN`9K+bUGes;XgPUBaAJhsa;KQ_i(Y#q^uz_Qm$1&UUny3Q(xw>O_opYE!<@)DOiL?d1Sb{G`^ zqSD9m{2M}}^(3R%2Q+OwpFtw!;*mzWu~a5br#IBiNTpb0xf8R*6gnh))k9#bJIQL; zt(|1>+ksJw{0R}XSxSQAke&SQ$@;vb_P`TpdV7ftWlU5r&x4uPK(!>iM`+C&*A51}o+LHTo5sUrl2i6?%*$1zR z%{B`M!++5w6#!gKeHUsW@aK|)J9w#p?rE`*LqugAV{Sk3f@X z7u7kc>);{j18k1OH&ZbnybY$q9Z_Wu+7yJ|zI(GbMsdTptf=U4<#H^Ej|}O>#R9PQ zr#BrI6_VGXlao3$hW96>l_3~rf{n>`NLlMrb|K%@bK}0pkFC9LMuP98dBh(~{TTEp zU9!zf4%*%o<_BB1z3|ytZN-k<$elJ+BuU`kl>ZoXLFI$wpl>5`-CTfTRO`rqvEZUX zT*9R%d0EQ_D{Lxu0T((fr4|+Fv{pTaY|ua8OJ(4u?D2mChVrKOb(_q`&KvXRVesZ_8qhS`S;5s+gWwYp)+P0JEdAX=ohd5;EZY2MG|xu zsvJGLW65%oa93`=C?<6Q4*t!(JfuFKR1_;m`4O9p4G%4IBoR1WAHV+7c|LBvvdB2s zUa&BBhi`35A(}MoO)?uJiA5u`bOERGXYXId95}Hid?lCBG*{MT^N`tLYoyKAd)!-T z^i^XjUHZFu=wYzFGFX*{dH*tLJEFEwNZU@qBK`WeP_Lrg*NBc@i$*}74T?_0;p+5* z>KGY3F#t(F_X0TSq2#^KM@sIHYP$ci=%nIJPeKFI->p~Ge_o!1s@LRI>_G&Tyd zh{8tj#9b1Vs!MW{*#rk@+-k+TuclYegt%3_^zNo@{^*YH3|qg%+?GwPZ=~q#Ph%O- z;k{A*#<9$~H_=dMA|Jr(OI%dYI9rLC6mehsBYJyLA(*0MzZ>SK0jv$k&96vQ%iCiHPW)C(k?fIdqq1O7O2jPdxwTgS7o*1P zcQrj1_YP}QhcDXKGA{fGn;&k>R=?zbY-n5XI0UHz|z_4VJMVBtbo#V<`VA^5NIrA+yh501iq1e-_k zpK&c&ESaVq#Tz-4EyfXIe1ilnoVpH>(n70hPVWQDoL3{^-sm`~O_gC8MlsF$z;C|- zuQa(5Qx_(ieqA|t3m`R%qK6cgs?hr~az4AxY{vuD$T(pcm7&>2kH)`WyC+j#71KSH zgRqBgax*H}zgg|CSKiEfIa>CM;1k#(_x-4Cu?%i7$-7q4Rh>ol2RYf4^`h%H<)r}% zkO{`uSBO|NzD4<~*d6znyt_e+7QrJFM$eY&YO;$g$BXdaphhxKw^m%K2jJmq*Y*%m zsBy4J##PXx+E$;LQ<>#;YnQB&77S?B_Hc(miZNX<=Eo}r796m!}c-sN&tHu3To#Heg$oimlg zw(J^zNFLZ6nxg+W`yvvnKZK;L4c@9zM$=l3L`QJ45n~-kbO(ZJSMZu?RWyPd+pF>PFCW zoeLjfa-i;2Jda<-E$LXF3Nm2~_?;d>DE{QFtTQ*=N*Th}9FGoMOJUz*5`6puUyTt| zjw2_#3!Pt4QpvYPcbRo2CNLksp)9F$kuE7-=_fbY8Tbt!bR14=v_mp<+g7 z7NrPW2+L2~b{#w)8Epjsrxm*}&?ATFTT+N-?`6H&>+vxL=CqS$R3J2XsoOSTVf3wo znis^W#7B`kr{Xm`7=c%y)7Xy1E&H-jnV&!DBOJ-pM}Fh8%92`ks-mGX3%;d_OgN~D z&2(>6Yw2uUWsJZWa8Y&%?4+ra-(DXPDxfM6-4uMc~<=sya1qAwA-`=6MZRN2CpvSVCr0UreKYlSPi)7Aq(EP(N&BFgdf# zqm{BRq3~n9?8Ma~wDio!f@{MHxKf&M$i!L3NRTuE3BH;}z(>YEzzi$LjOdY3Ma3fj zP?l^4yODyJSzd@sjLb76cy`JhyW0 z*=NBLrB~PUD#qLGTUA_`pNjf5$2I~;ND>}36p5B?2UW_hqA~DQz`b>Y(rxrE`bHpEx%W5{q;d*NuzPJZJMd|ZH??2iYX;|Vq|miqJ%qiNEg$M zXhclmj^Xu-umm@Qypd)$Tyis990FMu=1|7R=&Xd3x8)xRIO4PsSyY}386Ncqc&1!4 z2g5mfkqzCQJX(eIJB(!vJHf%x4{YN+)x9-K?_%D!!W z*otE3W5}q9sIY#P>0%RB3GSGO`K6?q{M*^fk6(t9w>(mq!n8IOg}Owf`sB3-{s7hG z*7cy#SyJfFb5%%~`>ImUc(bmFbcr#RM)=#b3x{X+uOIeVfzgT35!zE&48hkFv$@pt zDF7}{d{4v$h%7IWU>)msRelPGysT05_dWWgvlTp-!VYtUgZT;9*fVpe4gX7n-L=Ip z18?$8vgJ|n&ewDuyPk`j_9_u!1lJ7yd{$+Xt!4k6yTShxV-$vk;>-K=k+=C;ANDKV zQ=_qUw{U8<)xQt!TJSf7_GkD!hm$3J7 zu!06Ri1F3kIk1smo8p=Y&Wr;ZPDImv->>Z6O`W)Kc(!Op< zK=R-CXZ#S2Dv6^s#9Tm!L3nPtk0%fb@?-pBr^4PP;K29 zgJJ#F6h0ago(g-b9rHPTo zxF=JI*hZMYy@5ba1fjxnr39ywK^zKVg_KO`MvQ{xrZTtB;8tssFc)3Og7Jy87K+L# z*SSILYRJKz&j0s7o!RyslvKAue}X+`HvF7r5iu6627 zaZ`aB-!7Bvd~fOd26AggtMK-k#BVW*1NL+f6NZmV#qU0L4i1N9+%E(>l_^0R5HzWqPt}8V z-z_y-9-pzeTC43xB(7tWZI13gwLOdHV=FyJ=TS#iksMiEsH;&1q6e?#lV2wm=HB(u z_S=8KY;oV)LzJ&2|H#Iat*8TuBpHoHAben}Z0;ONY-tX5xx&kc2KQs^o1@GzHVoZ= zC;~u)MI=ds8;`4p5~>UPhav%?U?4C67h-qELh}!0O#4Hkkuo$&Nmswo&PwYO%!O$sJKQ^O#@7Ql`H zK3g8IwIgp>4jm_na{U-z>txG|Adg=LCJpHW70}7iV|nltKA9%4$cIw9n9A6h%rZ05 zGq6c;lSZ;f|DsBrB@Q0!GxAt8hxf3|wD3{fIVXA@U8(8}lt@lbf*tIr#XdJHKoEd8 zf5SHUS*&eWoue~J&tSnNf1@2S|v2m5lNu#3Och**xhDt&ya$F2&shdb*vXsyi zxX9Mt+~}q-#Po}jO3S%@b8|P{#24v~$REUNJ7vt*eB1JNCo06NzXJ!XTd1_c8qc>_ z0dy8#>=G)n0C1zerm9OyOpzv=dv8PhpuggQ?F@x29@{n-*R2UQDl4c?K@bf}7ta3v zgSGZ`pSfCczKU&<*p`~)52?y7dtV0-f7!^*}Q%q zN}9eM0{sy|RsLQ^vC>$Fv8+;tHH_C*zkMe;OFev7<|zAUUBPu0yegh(sCJ1Ro9oupTYz*oW*@2%ut9bb|U{!BY7V$k6uLQ#|u@JWbI~!{r5i+R2Eg=@#@`+QC0R-cS*NpT~F`={Vk8Tf_VH`IcB1!?F*UEgKz3>!4x572wN!!5ma-3x*7DbSZ z;Y33ax{Turp))qEf17u@Q#!HYjX35|SQ?V(I=48S1y=9^-03BdpJJsY^)28asxysX?06I#gdz z=K@`%gSwnPV+nTBNau5YQ2uh{9aO4+o%T_uB$*6Nd)@XVM+9;8J0ms#epXwuI0;rb zJ*E9dlJyi*f78pv#X1{&Lw`Jub?V!yqgc&sPHeEUk`_z9QBy#?N1B_rA02u1_)wAb zDqobThrZdghAxg2hZSjfXpSqY`@?EwB|5F-3p!2!-N`FP;()WLrrcG>%NvOP6Vc-= z&Vl8dL3d69??rFrp;xe9$p=n!!#or=!a(9Z(U~~C05!gpgFahgU2=d~_vLAF1k5_dafR9n(q_3K5TuC;^A7K*2V21u~@BHxk>cw@p5==tM-KP z!d^SG2>Tz(+pfP=I}aC&c$+V~(WWbdYD5BK5pYi%x#S+qJyRYArpwK0XGQg6wbM3u zYL7EnxaQmF?}R(aCtSs&tPFJL11+^!GDWbFa+(C2IRklPh6SBpJQ{cZNHywesXr=T7uE;UcG(Y(dBv9aWK>YiqYg6HpSLZmwal7E|VEH9`C>oXMx4 zdTO?ye&ZF5$hm4mYdL7?DMpcnJRCn9cz4A_H1`Jy`5 zF0|&wQg+zE%Ziqpzt`uv5{z1fS>g5Ka|TV<19$oWi*ky+5<$FM78esq=6F5 zj*09?2fj4M>uApxWf9c{awk0T*fNb6g7Na$n3HxwdGHup<7x#?b`8=o`FMu#So@|8 z|Nqg8>_Wef>B#sw`^UuP|I0J=|Kxv#CQs?s>n7~WSxwbBtr|q~ECu218m21W3O=w6 z(#tgM)x$Lv4T-E?9|dpbrbRy+tnrnWlVH3BKOb0{e)ZqicKi+JZ0nc*3VX;-6hqX* zfQD*}X6*7}=Eu7AIw|!o;&$e-+ySD8ThIy;%=)$}=Ktupt%Fi;y=az}X1NU=J$4F@ z)#8Y#9()=?==B%J-d)LU)AZ1b>aYAU5JjJ$PP=?>8AyqS$;_^$jd z`Y8l={4Ro;iA|CHX-vmWF3eUs&6XL15Xp147}6vfQHe(tn#di~D+aRbXi1_6ploP; zi=gSzDX%>1IN>XJtj>TJ4T-M{$GKnA3>R=V7UjCz3ZL2&XEEO9(4V5oK>y4G23-jj--h?-tW(410Ui&b?^Ku5T zM%Fci1yt1#KQ?Uws$ZR~6l0tUo&<|O44(+b zMCYn3wEHpc@wiyNLq({N!hg+BI#2y7j5_HJmb6rh&M)2!1Nu-`8SHVgg+G zrh@CE)U>&6!GCeB$jhMHiz|;>%Mg41p06 zr1lN9vjoguXl8Q40Zb_)C9^2W_G4-b&tb2o{}~Eqk|edD)pAuA4q84J+f*lFaxv7z z6JL(yF)-;XrDMfPhI+g!*MWtO(>&Y;umk-y!3hRr;RImQ53{Fmw z@vH#6W{a9O$fccCr2(haY=NjYkp3(~J54(lCU|I3!m;{BoUeKcQX!3B`t4FS@w@|W z-HqG8NT`-xs)A!TSw59?O;fve9>J-?nG6IO;dFaANGlF8-c7TBg6gmb`C^rnhvOMr zmq>o2I1Y$8>FKlmOmVJ2A}o4oZTS^qeCa>|Cx*(TR{~uRE== z3(Pwsgt(}-j;0R zF1aH|;t@a*HSdMw&cnB#y1~6HMvl|PZ7IT^h9J2Tq}7$?24<_A(T1FpCyB}g#G7Os zKj|Bc*##*typ~WIM6C)@ktET(BPURs(B~ETI7qGEx2=XOS{X2SvLOOGNyx+BK zS$7_)4n)f%6tKYwsdKc=_B>zo$=K`f2{*x^XILD9vi^Cm91m}}APy;0#2vzvq_S=_ zk6ddL&c{)@q1tMA*YbTq2C5Fy;=zWE2!q`co7>a2NKaOVIj$8Ec7~jZBs+>{K(L5k zFVba=)WRZZN3HH>8;$vE3t7s!9Z!BEdiXC}O z2R?!+9r&Ti3I+g4X^58~N*Q2*F#sCn`lq z67~oZNSQcYc8Xtoi9v*cxGxYt5_35!b}hbLm-;k!=6*}(|D;Q4i^yW?NlNIB*tw<4 z*{hR<6xY49HN-DXhPn_mMNTubhOSLoij+&25i6cgma!ba+qkl5g->8k8n`>|?p$V< zPp}ue{ZOsx_|ZLmR`e>gjzZVnQ*lG{^-H~U>J!-Cz}egde4L4<^ULWR>FeFi!HGVO zH*<=%N=tcwF4cc1dI7%eOKU%Q*~1S)#bL)bOC&8bP390ap{@2Q4TJLECpqKCdud9= z=qM~3Xo~0;a~E65Fp|(>_^+RgEvv)tlBEUcH4H#;etit$YgawjYFH1T{lBksGs+F5 z^PE|$mEVapDrIWUb2h!0JS(aa^;n^EROKm-Q-2++z!%DL73E@<4;|JV>VDbE{&pWr z@Wqc4-3NwSaV;qpI5lzhSz<<_+0Sza8?J%a)LDIlln(S=mRvrnEPTw* zG29h)WV3Q8f|{^rkPy_qzZzcIWyU{5)T5F3BZ}-hVcWukla|GUid>;~7p~foND2SV z6|)4Ny?D0r%*&GQ>dH);IqUH3@n5BupLzr0^DR(Vh*RFY@F%M9rqwmIqJ-?&`byBz z)6s)Rfh2+h{x;j9nzI-$?MGKry7d{J~+Sgm#GKHUopD zUFX^Rz=sUO2+ZP!5I*WRBo$UKa4t?=>`VkSxXw9hI3nS)F+^GKjXIQhOyei9X3=ZN z#jP9B$_gv;Ns6%FXauiFxk@B9yr^mTmjB}H7wr;K%-Ey}d1M=&TW~jUD7r5oucwW? zg&rUH?UWG!6R(&}&Phfr@-X&Aq=B*GPmVub>js>9;z~h=YB=Xi!hpwbT80@7Ynu;@ zO6}hg(~#5s<>UP6c}>0V^tWyF8Q4nE^SQFjELb!+z1+qG9I{E_A(G`=ar(#a$)VfO zNnrc^+6og5F5y-x_Pwp=Vd~6NvG*hD#F&0U1q>>w82lCKjeF&Tyl^4SE=;utzSSlxWv7p94LQ4>N%oTF7(8Q zOLb0_{2CbSY@6JJ&HMbqI-d)Xox^Kw{9m?`C=@nn#&F4RuWxUGt2QHXglElb z_MH-&?QGCtIIeUv;Fe-fSTjzmi*wN+6aA+!-yi0k2Cxn8I9>AowUo{CGE$jlx>tA@ zH1&j(U|4jFX>m?y9KQEX^L9k6)-<2J-|8FT{99{wKkUM_^0`IHf-c^#znEpGF{z}@ z|7(qXww>dJHqZ3(NQ`w%EnR`821CnR019zw8@=9;L~RaYT%bfR_zFx$Y?y{49D)AB zYdzsKJJ?#;QH^PGU5hO4q~n3<*-jkFNxSTSqx6UvH_%l-5=tGxPtJwva9y5xDkeFO z)vSkynZZ7XC2H2N$}-UX9xzzQ}BRt+S2Cc#&O?F796oFaz;PgD?pAlF7QsHL( zDG}M)1o?`3KS4i%rrhYp7FV zIPtGiCQbi~-Afw5@eAvPyrxywb`%pc#~MgP3Qzb;7pzQH7m>3X@Hf{dKh^Qz3)xM& zayc9t14_8w2)&Utm?vMTD`G<3S{_TPwZu`>Kq^G3tZ~Utk}OTK)}~ABD3s|?JU#Mu z=bdInZlx@`zX0KW|4+$hebo&lkZjT8A9v;12r+plwZo#Noq_saucr(9Au7h6$_}mS z$uNya4vbI^YcBN0cmlKrhnCIds^-j6iU?aXZln}L{b{nm3rAI^ENatx40@v*v7F_l zojWg>t2^h->(V>!NNZu+Qk}1vHVVuApS7m_&k~dg2V5ggEQ^kvKO~*JGJ4fRKWJ;y zRE?Kc6jw)Y-qDh`Ht*`Dm91hw+lcD*w^GuG-07=E>Yr42L+Tnx+E5kI0MG-<&tyTy zu38|z`Z4apoQx3>Zv76eg?`sE7MlTjm^8y4PJ(rs}6eZ#)BCW?1b`(3Dvm6u$U} z&o&lQ3BbFTfa;>NnhBxarRaj`Gg*Kwxu0MCxFA@*zhq2aSCeX5D*G|H{MRe9OO#bD zny)88j~xtmm#D%9fn4+siY@?p4B>i)FIda0fVZed&b%v|Z;=;aAdQ z<;UqC*RC36RFXy2bEH<2%NX9C1>spxf9g|Auv?f^1@nc^`K!-^wZ-s%?CJh|Gom>` zpSl|ahceOS%P`)Mzbmq9`zZwR5XIt}Vvx2*6OPm6p;rV*cg#qCmQkq(;`>(|M&b_Z)%e-XFRRu-7NR~M3Kyczz8B!KVAENZkA>nGq;-Z)esNmFeg>s{0{sIh$8ZB4>W z3@Y--+Q39Zu`l{$s(oGJ3nQK5@6F`TarIkI+>-mB_ zD@Z9&MD1tXhkiTb{_UEzed0u{mV%N|VAxzIxML-jEu>&UYjVY7a();Ghi$+vDv6m1 z2x=BP!iab~;T@O6(D5D`B^qJ;r+ms=)%8f{=Y&O$ihUxWfTK!KdtXmg#TRAHYH5tf z42S~@Ghn=_Jo%VQZ#XKyUsJ$Aw7@)E#2|liIM-{l`b#VN>!SyWTxj@)IRbX0-!E7h z1CRDVTInNeRc}80lj#$qZuvXR|BblvzYtk$?093uT*L=sk%B*aze0CFe_Bhf1#`zN zpM3+{y4ZuXB zzH(pi?)&zq#=>jSRa#HSCtCyAJ#NuAuam`tyvQH42^cPC2eextBBf6KJWS*qgCbJM z*I_-f$M-t_QzgtAD$Wvl;AAH~2g)865=9Y5elsA9!fK}lu*@(49A~rVb<)P!ssdBt z2p*9iiZMNLRJ(ZeK6SoD8$Q0tRd0e5x~R)0%G<t z=rwKz0Z}S@z=4J|7Sw3~Nu){siR(Vf>l)Eoaw&V^$=i zJBEeZCV}mg)4~%=6MM?puBB5FdE%4mZ^lI3`g=;b<_5t=4jurf_sYpe)Y;s1M*tjL zYdgq|P#a0gRsM_9d{2WTGeLBctYSj#L^>P}9g3_zz0Z zv>|c08oouMI#pLT#G#bE{9=km3e1(t1*_+_YO7Z9a2r2CsRVh`aRnlBIl|rV?a%~gLL3_+ zK}4hT3Wu1vi$KxRF<(VqI%|20RY;#WR?bm)!yh3J-jV!w*t2v|C2TcD-;1Xqocu3WBOfI>0gr*eB4Z|C&~&O z^GRY&JHUl}#_NRaCiVLUwYQ&zlFui{3`qlPlClEWq@1IqyQ~@v$DHDo0~{M3JmdX^^2y}xbCF6zKvc1~Sj5=oCOE~5Py|1o0{ytVxjBYVS|ZzdOO&?aj7 z!FABxkLlx&Xh)OJUU!fe!r0Z_XV8 zabM}wrw*H#16DmaESbO|#Nw8O_An@H%1SV0VDoJO6bbD-DmrD(eZ&RR# zsN`~~=K8tp8E5|50u@$%WO~&wO|}j@+~hgyrSq0KeF?Odiv#T{PecJ z!&Fl|2z&4k=(QgOsH|ET7mQoU`qO;+J_r9`1pr8$lVq0z0|8wV-b-k7;RwGswyjeX<~R{Z$BKPgOz9G3nFru_vo{kl*}L z0z7|1?)z-FN3VxAkBZR5p{l^Mx z9S&-AOde_)&Tf}4h;z(_*zG;OFb${F3Y%RDY9!RHPmKq9nu`ywCCxn4uPWi6yC(T$ z&EiC+<5K2?By(>i7Hx3S34+iNNLuYUL}!=O^GYsRLGP*17-&yD6+S%UE?m{`FPq6C&U_&?}%Dne|DsuQh^7v|uyF7{YsMO;eRPP|ADB21u!sZai zd9U~qKD@&dXK#*z`#o99Suv_O956{h2+4LW0MJk1ZuM?)##is;m!?|V(g)(IH$obW zvM+WCmB1Q7-vqwNhSY_IT7(pfaL40&vbE4ej*frV=PR=ItL=3TN2AO;j%j9BS-!)R zv~5p26oSsWxXUVaTNqpPdW#Hale#QueSYb9>SPblGo@!$U178qNl_k|^el_lAiEWQ za{se0m$9^}^?vvb^=wN>z!Hc*h0$>wKpkFT6*-`rufs>3DbhcM*&>OeV6B33q5UR~ z3Qf&w-CYa142$DW9<;RsW!a-JeNO5gI%e&TWHZO?;{4-{U+4(H7_V^;5JVmN0@Fui zrwiO@7VgBM+ednqGb&le3@cO?`yS5wN5&-dugXjW?XLWg~KCVO+jmFcFQs}XMKiv@)$RdT5?E->cdql zA#v@7QH_5nldwI8IP0wfPAdk;g3jaDwM|2g0rZh`oo(g7U0J=i)^E2OmYqlw@B;PG zY@)U_`+U&a10z|&|2q;3DD1Px0sC-UJgvlyU711nT(dC$4VHh@j`QdmPOfV{!z9}HJ7qdJ8Q}EXR`*1@u@SR zGbJb^t#y0*HZxVU`U@QL3LM5E!&DC~hXZ#lS&Rt_Lnk1eKg|_C-zAp z!GQ_o7W@&eo!^{pTQ3TtO_z3t2v{-E85nj^J8wY)xun;W3f zI9#11LvlXS`fw~~-R$sH1-N{IY!S18QWMGT$lG&Gp-KwQ`FILjrE<#CLzhpuAk{~F+%YNa#R@ead5Yp#fHvgTSpcwS=wq*>(7L`70fQR4gT`7 ziEpD;XcCm#&{lY!X$p5my?%XiRMTyR#%M_HXQY#(8DX~TqK+FORs%VMekOynpyd%~ zRoDeEdJITNqurt z=0amB*##3tmr{f_+YmN^YO&1Q?BMJxeTTD%$KTPVWa z8|N-66uzH_+JhGo;FU3aE{9QPJ#p_y8?;KE=);c#im3BGbgOkx2HehaB0h@qru^n? zpMFiRi0w}qUbT&Mk(E{4{SjiZ9hUCI>Jv!5vwFoi{P1q$K8w(OWZ| zmIJe!no;a4I)y_T;uc9dtpTe7nhRnS6VOhzn~PXc9lbckDEj7))SRtdxH7>*CQF8X ztE`Ljlu`4fCDQtu2L?};qIG$=el9o?a@?$jy!F=6+v|FhlWbh=xJ^Uoi#k)~ht_gT zF=ix?7bu(1tv22Q;^Vp1DCn}5t$;jib2{)Sly{5O!fPYDL(IzwFe+@xJL4};@sn%o zEz0ZUA&#&9L)XofnAqxT+uy8Nr~=e}tsCOW*$6cDEM;evikl2CUNxeY@7i8Tr5L$r zO*zR=$2CJk1BGkrlPCP%?{Mc(g0nX#igpEWby~&vy!=)e8=>UrTfbdVG;N1?7{mCj zm$FX9H|!~EiC5yKBLJ#jMfVp?l&uK6yI%()Tc=bM-sUN4(hQ;#&q3+JbsxuavKr4Y*WTY^LGb9paNd=I66f zSo5Y+2G=Gg7FDG$Y74Cu8`9<@_S&O4MM$`d9z-jqNnGK+k8usi>-L21@8%`~t||Dd z19dfJzH@f$pIEAgo%t8dnH%n~74Ca=OrwhKzB2zqamby}mC}omM<<4}GlaI~vyhA1 z@ztI?#0M1UkzbroCHy_ozlqXd9D@8EYoxS})Y(UebbFECXv+X5F(YAP6v})w8z`o) zbMZzA;1hm`*?%Zl12Sza^%zi+hM>SW4jRM==&dGG$%>(zYR!*MuuoXutJ1x}i>jo* zAK$MDe-1TVjo;G#IDH!#^UJ7P3g@OY5Sh{1Ah9LA-C}j`?oc*s7O$EEoGOUy;Ze5H zph@SE(b(n=+O8I^K{gY3v_EgM%tbsJwM5goCJ$tY|>b$@QNY2 zTgBpP73ZVO)TMes(X?6lw)?`$L%!x{Y1@KG_9}z_7C`tfKtzPjb`|GjOTPWVLjqIz zrc2{5vC`?+n@o5Wn9N!Gdn5?0s&ZrxQXc7u#JB&??Cw|JzTn3_#zQ@>?H zAxEh*c)(aj>Z>UAuUprCIU+qb-FGIiqxu6gk0}q;26pI2X&SjX2i7V9p-CwN8ZeME z6>;rPIL}KP>HZ!}tyFZyCY}+Y{X>eT0*Xc##NTk$DYz1bNSf9Jk zk$(%C|Dh=9Gur$^2~8H`MSJi}DxEK)`9X{^G_FVlNK8%+HYB9vD5F>X15B>GjAe+Xl@0`$Q zyN4;f*tKhUN8R8)R@|5U{%tx{-Qi_$Q@$m}-H8z6Ua9a%0b&NsiC)GJQ-K!QLEk8v zzEw_eaR;vu9u0!$=7z*6)II+s7onigXvt00=fNBT=d|3mw-8P`IRYIj=S`jQ z*ME8VE?gpuYbxgn^~bh(5^gbaB&zQ#Rf}qEir=jg%6W+UYO56G5c<_taU7LuRz7sb z6lD6!^Z5MKb#GZdShI#Qok^{ks8FazAD<(oj2-|A+fu~scV>yohyLG$`yTp$4K}I| z7juz;0D2h=t>Q1f@rRIw2b(Az+T*($#`&~_Tj561g+za9tLW+Ji=Z$uBcx<3rfi8N zY6C~HlQiZtk`r-K9jQhlS8%~5E+b!}6CI1FIufGpASL=B+BIg+C3II72x&g~TY+1U z^&f!u1%oxxn6X}dzhkQ`PEO(pcQCEj{}CF=35D0MI8emPy2d?Ln7tyji2^|X!b;NL z!b0GYqsba%Bm#l@iCMZe8CNfmtG}(T|8JfQ{^P{(C7rrigC_FNh!cOwoLF8o#fTi? zTcd=sdvX}q)9cj|-8Wk>?t78nUiB5W$0Txksd zG|zk~--MLwozJkvw^Q6$_fQ@S(uK)`DtbU*DC}eZt4CeZC+n8P{QjgLSFM9cKScf4 zQ&q(@_xk6T?Gp#{R+%BFYYt|YEx8jWr0($2U8DTC?5k(*(u;flbgSp4-nb2?g!?K1 z>Nkh_|4=S0{gqQYfWcGZ#jkVA`us@d4|Km|uBLhZS{|5SqRpwTP+xd`QJva#Iij#% zny0asJGW5!LSXPom-fm0KGpv*NAVxZ+R_u-^>yr_zUaY~-&^Di#@Q+*1HMwWv=7_< zIjz*X#RI+oYubk+|D2panGAn}t${xTSGnaoah2Af%YP_@4HCEg9b!JzuMW-L{*B1( zF?hV5Q_!`QTG!O?z<0WwpQxZ_x>d7$6zZ5zlghtKx}SLS82rS1*evMAUKWfr;#T&f znBTAdo-d{%`Y1oJ3G?$ldR=)Ha8}OI@m=8VXlSlQ&=aAf)|2^oEo1I<*LGM~A~>}8 zKc*19`cM|&-}@>z!``%5kLLFeO~d^|GbP#;C8U0OtE!1&ULh&4+yQyFe;P7c=P;HSntlg7YWMwiw$8jBp$|YjhjA z)8vbH<|pKq7tu6o5WO4+!NMaJ z>ekO&ZRq`Y*0vo)A_>DYt5~Bx6&j_9N9-S~97HUk)4Dgr3zS{MuFFD~6%9QIYRdO) z7VGuOZY%i>=ssT;;TRtC=3gO^e_^SwNWiP~*6G^!+O$WPwBJ}*&S za7P!5se+zjtbvQB@Cc|v#||K%Pv}c5Je{l%n}T8hRG@Ae2k@a4g`7|i>1?^K1$Y1X z)(Vwi(GD3-hW{)DtJE*nyxiEwcwnbfy`j~``l9N;s+Y8&+Z_OBv6Nv%57x4M`2`BG z#Zx8|Gu_}4wdQm{hJM~Md^#1C)=_UO2SJ90e?5G!%gfY^vUx*N+|*iTC*k)q4H5#P zbhq@{M@Fp;@P&962JhejcqmJE_&q^q-Gj?1qcm8f6Azg-w}`M6p?c| zfZ}<4tOKt!O4iUdx<2Hyy%BgAG^-kvkxNwdGY`3?f{5lS*;riLJG{%QVNjDKP=1;S~X0!2L zDo94XW4v=AxeAyf2)QfD3c_kBbRw#%y>71UZLBAd&7Rd$hkWCrXs1aB#81G~=l zK`IAF7DM(?PW4zQFrxjFbjeb6BNohFjj$S@Dx~ATg`Lb1d z?jWw(DD_mnj)4u&O0VWp1Zb$%?Ye=sMtF zE>`YZbicG}<@?>qQ)inG%r%79Fcalsu%f#9J^J(K+nc$r5|nf!v;MOu$HEnmutfwe z{)xO;por8xru5+e2?ID5G|VJOcx3UX(i$t5UX$&QOob*Mtb_#4ile^E%FJ+1(dXH) z>_~<)J;ee0T><9!R7$w$2EB~l4`3VC%$1Xf*8bcxQjXWDSAUq3HT^~izr~z8yt4<) zn9Llqv)?XyZfyML>y?(*H1}AL6TX zx;PyK8AI%%PLhL-%c!gINX1lQszR>U49wYLgyEN+KM)6~s^{9tOJS|qyUfNmb#FuF zM9tg)OMbwiqUU;BA@BX-`Bio_JG0@OP9?4idU{&}9pXwC;)3j=%Pvux*-be>6+L9V z>vm(l3Pw?&J)>=WDy$#2sHws=<|1v;4xn|2&!g;Q3?7FJ)Lq|CRQ%OC^uPT599wzM z%8J_ozXGeu0Na02gA^)jL)JT~SpK2>KC(XIuHJMi@3;!^m($VC`-0{l+i^VxM)X+P zu4&$={Bw@|m`gm0^D`nSb~< zasDs?LEhsQBsj#p)K^I=uP>^Y(WLKoT(}4Ke=#q{JAou}e`DCPw8&ySrMhpmU9H#p zaZK@S;e+jRCj19!?1}neC>)(~32glqI7ux@j*>!aTNQYpS?~WP>96^EvBE4eS(_xc zhvtb*AU`dWifXAcfy$UVEruc5eoS+QHJh&7vov0v4}N%LRijw5U=m0gNd4O{VtZIR zn;pUtkKIkOgd0v-gEFXUKa#k2pyFT7MX=!X=53?LRtMh5H_%_rn0iA^;PM4Qc_MC2 zBI$atF7y9fQ@rGacA@C`?d^fi>q(`3E!S*~5WyD-TxmoU{r3cm#s{P5lDeY(GaoCx z1%Q%mhSv^;*X^U>d)uX;t=UCEb~CxQE=d;ad4O7)*bzvUTJdQ@(bzqi8q|zEbFn?@ zJ+j4rZ(?}NTC*7|iII;1CD3)g#XX??&w^|Dsw_#=0vC2Df=Lcn zdG#>Eh%N)k8})fLzJ`K&6Sp%>IJ`q+fyXy z_n}TvDN20)5gHDob+qC$)FkR33N~5CPV+q<406;c&7~1-AN#Xb`Eyq4x|u4o#78L- z+3!i%}Y zP@EPh?ozZsfkJUFPAKjUrIaQRin|y0qQxyZK?A|vX`w)Hcc(ZM3O#veu6h5@GjnD> zoa=m<5Bs{-%9iZC)|Q{$_Z`We;bm96u&KOqGJZK|u#jhTazP<_uePyNhCkppK2JXK z6JE-ylpP+lZDe`1o1ef`@QM!dA)1bXwb;n`dG0q1OZ|Z9rxO9|PiFt5Nh?OQ+xcf5 z_<<%&8pDwp0}`#U;h819{?<>RV(sunSE1Cz$^;31e!ZluTpM+_T=`}sHzxBtK_|6# z4Hc9t7+2gTBf*}qBednQ829LgewXjf`-c&wR*|^7H}S6y`K;ERpLesJ-N%jz;oBKC zH9RKRFK<)rKcHGt*ds|K9x!bBt_x*EriO*=`{y^f1uN+Y@>GE@oYOz()!rU;pHh8F zOW5#z(XQ}PS@E?qFu90ijEnambg%O?$nH@!w@~RHZF&7zG6VmA486d=ItrgA^gRBt z`Tw?EBdfn%Ph0%!!vEDF%gQ&`4FuOcXtq;4KIaY?cDelY&vw)>H@dkhQ$@fu?tf2F z{6E?emCi%eDxdTqcll!f9O!>^$iC53TQOCjore7P$XEpY>lTL#%~s-7bpG?Ve?J58 zPeng)tKe}hkxb@^opP=9R91*ljO_-Z1RO@99H$Fv>;I{qHq(EhZT?>t9;_KKzuQ=` zn~mLHKp1Pt-7X@gJj|6q_AS6ED7#s-LZIMh z0($82zfuD?<)_g&DR81GD+*s_PA`|0bBwQFed(26n#t#{cSrm~@Zn$Kl} ze4TM_lSGa#wK5v|eGxtOBv^1e%-E!)j##C_l}c0%MrpJ``MFa4T%I^XVS{>qDDs|lgDtLonfvCY$KE(f_(ZB% z#pb2DZsi)6<4_kB6;#ct#9|TwU$DsfzG0*~7F89O%if@H%`E*=JkTjGw)Z>>44M;V5b zs)Sp~(uzVcTPZD||2a~6*>v}`nDX%1uTw?o=`xeej3tt#X7%v;@&U7Vjs)}ydSy~I z2%EQ7jx~+X!R8jhhfR4@*pOC&IV_3#*KQE zJc=N?sK|w$uj10NI(E7Mec%1Tbj>qZ=x14V=QrKs+15¥>Kr%_vUBb!N&uk_3@~ zg{BIcQX~7rkd^$X$zH_Nt{ALM`=cRAOV47~K3u#bf@O&LmxH^BTJN1nRc(N$KcUqi zeW7)uHJ^$%IY#nrM}nqiSE?qy3RmSSjLz%SMZylk?5uCNN1^>4J??eu33bKcwd_*W z6GmG54jd#5DXiNZYa6L0z?4qPB^A*zz)qE`tBG3cGi8!$6)mcT5*m7ozA6Kx*uW-u zrrxp-^nR82{ro%I$){03U7f?{Z(8FsrSvMoS9JPRGi462>I-5J`|8gvDm2noqQ)S& zva*`5B~$j!UxNY;l4h2#Bm>58QIYm-3;!~WrHA{|w|9CC)6$7Yo$1DppPlYF?)o+W zT3X7Q5?oQCcSX`JH@~{E_qDEo{=2_cg9#@~bRSjzjLcs6#7}7O1)o1zULZvK@DcGW zT|K$>8Joj~j7(TaR(zHV5R43D$JVfL|GmTbz`0Nl-v3(t%9}o;6PQrE3`+H*nBg)3 z1C_f)yG8Ffcc#3N?S0&#Os8)dKjAzi_wgV9NRc=k3hN;ZOYy2REKo%+@Hzd_*I#4G5Ic2|$^{hrrR($(HW2wNDZ(kKJRqLbm$DU`;-AT}g zcv=cj94>}#D`&44DLyEc+Z0dwaSv=96VUSoZB(r8?&_QP8MV?x1?>-NPorsNa*HgN zfnEBCm%nbTmC!hiH#VwGFodsAaOw9=TAS~BuW()!G*^^KTC~d{6m+?{kmBN1ZL)ei zD<-Ou=rt&eQ?AX+#k;f0jgH9}I`!L?1nn)13Q>^(ymDAGi@IK|9B!F;uHh`s^#cXO zWRiraMsoL8#<-qL5^4g!zSt#21tkGn;ME&8`=)cl(%%fIswZ+F3T=J)5IXz8Jd` zm}wK9A1xQx&&n>Rw-y||tfq$rFY-6Ag;R(L=E$F(nvlaWZJz@j@1XF%0Gp&+n$<$3 zY1WeaSGip)57fJq#xCkZlg7Wa$FMNRST~L~J@hSfcxz0YY%sW49AArwVmIOl)~qzl zBKVP9uA=xFD79IBS?a*W6#AlJV)N-J^2AQk!Zk>WE>71Dv(Y}H z&XDjSnMt-yFuNBA<0Y}EWH;r`N2!)(ARJurO_fgvU9G>RAJTU|xg2*9^740}CiYJ| znmbS=zKL46;yA3>zIO1+kzIq;vA(1)#m!IKIG}F$5B{%-!h^)Ahg6NV&;GHRH?c4o)A$^TZ5f?+Q1|Npvc)0FuzE4Jb!7jp%9qcJt=3}^zToki$jAmChe1((l32)rg zAFfD9$9XfS@|4r2(y@T=OM;pOWGZ^(yLB}68)@DLvAeEZlfd;RC8O8GEXUH`JmLSC zWTW>Mki;Tksx$Z<=-ken4J zqW42WFgYwUkZSo$)-$8)|Mq1nQ_X~0n%eW_n4PC%-LP0(svJhkIyI)DFS=!DF38C0A$?)n)P{i71$--;#Z}by+LuTk(K{s6B7?N#nU)lbIS}HnWnL z2lA&CRIO%yyn(!Kz*Ah`Z4S;I+hgFjuo$E>#(mOW%$m$!#^nzutE~-u)cPNh5X`Ccp z4@e30xyWt6P-ifa%0i8h#_t^IJ*}(y{lU`!=wCqk=3^+kd4sSPB;1hiEGOH~*nB0r zI{M76?6Qv=L9qroiw}>-wD#A_9^RZ5Z+BxZosDMpc-j!#_b&2N7_#}agHyZLN|}JP zO2vx<7=^>giqdRIaKxB6c#Q0Y2Yus@6EzYE+Fr5z4An$hhDy6xl6;*>kMoa}u!k*s}sKt!!BycQGRC z|2<1m|Cqp{r;SZBBs55bI7w=R`#ozS_i`hfoYU+F3QCi58z2D-qZQ>6ny6&c4iYi^ zZir~Rh?T<++JttF2iQEDAfEl_S^sNx)RMJ`bN~OhmW=&WKAd-}M|O@pxC;J%2!sDe3hAG8XZ`_ZfzA(J>{-jK z4EHv=;Hd_ATdBL13>UW+l3e3;W<>k6J~R#okYw6>!?i~%t_rqp@+G&E*pf|XTxEc* zbT7vo>j_sI9q>lSXgR|3+bn_IXYLOV&37C`hJ(yZZJui9vRL5!V@7P;P_l?i=j?3< zxEQ-ztH-ycqPkH$POCWJ_+rJPx)@1`;$Hyarub5``=R&Xq3a;f*Y;u4k&%6MSF4@7 zR;d$=d?Q#*PO3=8v2zi)GYL?+A@)D5s^4$O4&S6{D^4gPv$qoW(`9k$I)_TN%M6_O zb<1pee(U*kM^?)iJI(+o6M1-E&)rGNWze*Gf~b?e)vd4c*3C489d7ddMdj(VWW>qK4xfi11_|Vzm%HyhOY|UEjMH^>9;kG*3#R1Xyg1a zN?>;*U$`2k4p8UZCOEod7iJmMDcgnzg<=Bu=Dr-2Z%f`kkXm&G|Ma_T*qSuc)L0qg zyl%1?ao1{^AwJv{{2ocWyOq`OR8lV8Dbx`utZEZ1|2m&+pM)xY4b$5Fd7`dMoF~iV zO1>Yl8+VT^d$ZH07Gh**ZfbHMzhvNAMvVMNV%c70?8P`cei<%+lO7KdfYYjp3kJq( zpcQxycuoQFrI!Z93O}p|92=M(pO!o{l{ib6Zk}CI@8y0Oz*ZDk5%(5DkudT!Z>|I9 z4GedV)pf1-e&ef}2hJDiWn6Cu>qW+=OoW<*pF(S&EMmEJp9b%Kp=uCo^U5N8_4SAO z%vdx&_($=Zrd}_Y0!!XSLbWa2U=TYZ`Iw#Y;>+W~N{h+v!VVkR$g&VdT_7C6kvMsF z+fzAu;X{S_Rr|@>!Tvd+)zqL2NDex^Cu%Xat z9R4-wa>l)BYovMcyR_tC#S_MeP_YVJ7qh{}Nbjgwe12R0VyG#D1yq=>eb|eIZqDFF z^hUq@&a8w5eEgQWvekVjr$fGtSAtE;@ z#e`kUIi@Yy126u*(6g!FcRlZ#co^vz+NNji^+EL~8jTW)bLnEql#tD3cvIWnIpiy%BDfw8!LqmU2nPa zu_t~b>dM^cA(Ww??4SkE##oR{X5YdjpC#i2G7Z;HVI4S?&C(8cv#ljvRgkw9VQu77 zfmgAiWk0j48&#}FAsEUjCYL3)r$-AH*tjN_5dI;KvC-VHsX(qeo@pO+;XR*Q=DR#gz(YlDS}4SARiiL#_m zPNBgnfL)Bl*Wj^&QZXV+#;6p5MFgT*QmEv`RvCT1Yw>z{7Nj`OxIp3Z1+J?5Qh3pe zw%oa;v&pZ4ewy%Cta6S!SuCK?;aZ+SwgCieOp(vj%0WoGG0HtT*P>CRaF(1q!g*8h zQuwQ2MNB^vN@ua@KsPiW5~vgww3FxaWm|E7wVfCh^B&(vZj%kHT+-mTHTm_+9*yx^ zM$FD3sC=|y@req8IkV$$3oOp(AHS^t432EkAttS_}-uO z{smAJ_EC_y;H^|2R1@}|iQgN_qD=~9r^*Qa!;zicu(39H5 zY=>~%x2dpgLMmvHGVa=`P?=ne2a4eZK`-t!uRf3=BTI4wu*4hwpBs7qm%*oFfhoOc z0n6Pc2}rry1OGp4NB#COgM1SkwU=j-bSbR}k>v)KO=$&LKdpBUNAb5tk8y>c&!S&R zz|C~=*+E7e6Mh=HK~V6o@9pX`UC}P<(2p}MK~`{4>YN6heP?_z1bpkco%&>; zY3QB$E6-r^ZO+Q_u4^hxQu=|Y+v-Gr@IW2!cuAZC$#|pP?&E~s$%JjQ1y5NJB|ZZ9A3E?Yx+do%#nMdJ=bI(tn`WIFiYoEzsBarmo;eqND18tFUe%oyUS1*ukXYGB zgwZD{w(JlI+k`CNhEm57#kWg!d??(hajM&XOy3jnPPZQ>t_z1SEGYSTgr0#MYXgJs zIB1qQo_r2fE{7$X7{I16VL+a7&~^`liCGtAcpgOeKGkt{AgF8r2djwiwEqQ&cwt+6 zvDkh!ZK!}tKCTKeHE?}@-8V3L20P0=d!8I>nLizfH?&6UbW|0w=TK?0sA8)jOufiS zOq>Q$%fleurIJ;0{k_|61T2J<x87nAP(f#ai zG^x^Dk=JeuritnN+e$i-0ZGjuS<<9KTU21z8snnh{bOZf#EdAK5vLm_oaI>x$pDA- z!NRX~%l)g{oF%T$TYmw51`iqs;tLM1Gu`JNer)ANAD4+xJuGx>vH0B2Y!9%i9la_l zliL1nGOt&rDS)r1a~gWOdC>X}gT)hOg6JH70W?~BIDieaFJ{cQXk@!JE4P@jaK4)d zu55;%p&g;ukX2QYUFzz}0C+!l+ppSw9MKatUjz+WfQknr5ah(qQ=l*JgCq#ErdPpx zGl}UoU$|#K7np`6B8=W-(&I9-5R=47POEe^_BBbatEcQuOfIBu2DR_Tbv=u@h!?wJ zC=vFGY3CW_;Ce5r?4`lmtE~$S1tj2(WB72{z_$~h@t8no1^rlbAn$5~aCa-bv8D?l zH8zXOEukuj)brdRW8Lg17HFWjrQcokPd^7t0gKDV{OE%0G`CJ^ZgSafd8O2%5bQC6 zr7V^>ks|jo&XHhdy*Cr(V}7j}H#>|sXJ=;3r@oYXGnsz@SO)hB2I7A>^xS9>|Pkb^~jzmsNUm!0P7P(dBnzgoeE_2D7AxD1d%d;NrYIu=%|PpjvF1M9~-a0la5vkZHrJU*=Xde*9f^Y=@mZfR+T zxSEEriZu@JS^RFtHNW?gnaQ(6*UuA1SLyh36)wA;Cn^O?@AAR#Iv%Hw=N*OL?9Dzc zh=zr0>bh@ZGrn|?84{6*w_&R&MFc}DdhLlyV#AvsLW1!+{O#QFH}s~X#n17u^JT~{ z(RRX+1zGnG;JGpf!ya9Fs!4Y975?Z! zODC1oh*T+41s5$~;0iord=*Q;C3pjjjqN?2>ylGH@PfaRSTKbQL}jR!0jGkYIV1Ex z{TgaeU|+J&ZL00XvuxUde2h#hd^@T2@Z5aEJ5F8wc4I%2Xam(yi!9mchM~w@CyP%7 zQ3Fte@V|ifdbke>e|r9pmaoQ9_-#Q{8#(X}njGgteJdhLs-*={a^nugO<#gK*)` z>c}tSzSq?O4y!kPe*u+TOuYt3si$pJ|EH(aR)0?{9mO@RQT^oQ|E;1Y;(tRwI{opV z=5;yqzie+N^+T*G_1FpiDsFBjpT7Xu8uTJfmw+t(y$t7W$CB494Gh-_?9>-dUI0w4 z0!E&wTnO4-ojVjvi*4^P8~(y;To@@B=%WDYS3Z30KDbB$pdD!^=ZaPPmoyMAJ#3z0 z2Pn3h62!LSQ5}eU^zi)YXsRx1ywUEPyx@#zI`Ayb#jHM3epIe%yOj(Sdut7_1fX<6 z*GIN<%Z}x4q&@$jtxi-`?n!`N-)Y&z^S_zMQ4VnVETjqFzCnp*#^Fe-S?-hUwM2{6 z5wtNU&h2e-3Dw_qDQ4MbTunWF7(ih%d7v#FOU)+>@+C`dARC@njETCH5Sh)S7=p{( zQt#rcahXH+wW??0?NvS7JpvVaqf=BI9ENzRIn+4Dx?jH{=<6IcL@XO!>n8-hP7)rP zy?vuW$ra4lgp?0lNYH-0Vfb{!dKRMIrYPCG%)A$(P*l_O1x{^MQ_Yau1>Q_UctyGWu=^4gcyPDJ|IWPN>6Pr?>8)}GJ=;1OzLJ# z!1-kYaid-<8+H4^LsQpKiXS>$?8$RGAY(BXV#{G=!GEpR3g zhcT2PC!*qqZRM5Z*ebykI51joS}e9za=zAiPE+;8WmxvJikD7!Dyt2gR0B)9BoFUf zHKrDr=8o*(t?$#^5PeD9$wj*fqwy~YNPo!&r@(XElX5v%zD(Ww;MX)$aD@z)wX#f@}mo3vVDHhpf)NZd%P8i~z#2Zf^V z#`DSRjin)PQdSw|Go@~v;hkj|;%Wo(u5!-CQapaM=%uHLv=A=YKn@^(UQ!bLBz?+E zvB}K5Rwcct@2SGM^-m_1%hS#L>&b(#>tL+sc|E6j1uijATY*)-+JV;bx*rLLLuNTn zSzT`_jYkRULqE7LoX1mc5q|4``*UU}6(;H6pxZC_zKPS$Q|y+j(>cQd}FDW==sWXxv5pl^mkjGo#@hihzxXj{R&6 z=j^g#6ihFcysWa0mt3WLP^d|vMt zzgz0`3mXqmF2DRxjC|q}+a?Fkiy{%I^92`&w2cL0Jg*HA&%#}#TQrpXVRi%C!Lgbc zM%d23dFDe*+Ji)oprK_2Dr4lKe`!s?^omDvUELiPZ0$$8vUaucNlzAzWUfD?icKyA z8XH^SYU<+*99=|ZONt;AVr|vJ4xQ^q8mL&CA*riwn~b4SB@!Phxm8gnPE4?5I@t!c znw1Ge|5NIZw_cHK<4h(KyEbX`hKUv~_U}e9;f$P=e&+$%U%#6PzNOQ&J@8ZOrMfSYUQ9SWO*n*lBq7 zNYy$K9&KQnlpjOihdwfyeiXM!ZVL{zQEN=$#bp7gOAN7NMdZQRH67FpU2mq{N_*eC z=LoY^(SM_NS{qd>n?xBW?<34lpQI%aIC@r!xxiAzqx*F_INtLgS1)D0{*15YRh%y4 z^eJHyaGEur2;ibG4?7A<-P*I0E}UbQXeO++X>5gn5O|LF>H=ZY8i@C8pv6@_LyE%mc{M-*bcm;dT^GiRsXtFDXYyq&!IDY3Sj|6V<$x`KMk}>O z#*N~hnQp3#tR+SH(5BQbw3qk9&k6XJVlIXYID6Mh?(MGX{}g;a?=-_Vy*Sl*XtuHuVkX_Sf+~oZ>=#;Da8Sr_AsCW(Uy9oxJ%3cSga#K5t$CbqSab*7 z=-J*6KPI*vmWa^pu7{vDJqITxV-X9{V`BbMhOpe+j;PScNqpmo>+{VCM*c}8p>G)%#w_>e3179; zouvKv{`y7i*MN5-5RyJBCi1B&P@1yTw*G!aBP<1a$&wjXmz7Rk3n|v^RE$aPeM@;+I>W7KI0^($hard@5UpTY*`98dIg-Tr z&87+_^X$pGqk>`1?V{C&kfJ9fUyXIpm}}+?5a^?ET%@sFg;2xATIF=;G8_?`V1QfD z^V<3Ky!phJ6Ij}%^K~&OZ{kgD3G_QrDe?&h1bPCac*YQMKmBQ?2q|0<+KAbyRmG(v z=-0E*%r|cXCQ6UF>mg}o6~(i+lBZV^J@V`8JP;-3zB4NFcjz$cpZ^u_J)pciKm7-WtI54cSZXw8m2ja6Z-zGs)$;nF z6@G~bx`=9^JHU^uVXf=Fy#4_dL{QP1%_i!%n{j*l4iKOtRl&@&FCc#(Wf08{+b1m1 zSZMJ-E>#JbFc9*EOF=!$2ToI?-u{lPTuC{Nc-Y>Lzerx)0}s~lFOnB$e$;XPno=sZ zI*j7baT>nfZ2xS~IIrU-4z_n+&-22>yWnBfGylhapDwFIlz#EP3&<+|3y{-?k-=f6 zi!-raGjxJhY86_FKTkuq30|ix6pgq8Y0zhlWq&5ek&kv%~hB(nwf!YVX7A=sO# zuTFRtYy7@)ozW0*bV{xltW$0|D}ncT$}Y9d+hzzYpob)6b(2)_G#kI3zg|!pUfy`N ztpFU8TBO&r5TD5AvuPn;K2*qAc8uxJh6+u=xK0DL?TULpzdAmSrahTL{QT|da>kY3 zcl3*gM{Z$d)Rj73n%*3Z8$_y>;|g1UP;tviy^;_)>HRh_H&w2`0e#g3TVlta)^Iv1 z<0{wkoXQwCc%2+>j==E{fLhx_)ndc>j+_8ox5LgQ4#rQ$os;O*2G@z6Sf3@6_r?#) zA}7Ncq3NP3YtCG19jPG2xg@%dHY3gNZQiONlefH*! z{EDAdj5*QhsX>^AbJp2y`EAbl59AtuspC#38 zgS1_8FnB)RDvID=Xow7Hd%X2BZ^Rvs!mcMXVJ*?$a~$<5aSAMs#2c(<{G!(Wwv*Sw zj`H0c_enE7mm&*>^--OQ{zidBo&V`C1B6nG6OGynHaW+x8VfAH2|*|R z;4k*Iu+L=s0-sCQzkP!A+6;cYapC%=n;D)mwx`s7qx8r*aHPlDvpM;J;~eX0YjS~< z8|_AGnX&PXpX+!?(tW(*mH(rQa<=yVk)IBRLRPP%!x76j=ZO)$W0mWY1@XA6#Jq}k zstYox_zY{EU}i?(ryYXArDk65g!U@hd;AX)iFWRP0k+v6n>+1V26esOap3{m9zqyi z`!$e{DV`mXMMOURxo<$1Rq{r?|MTJ&&Sa+75KPq$lVH#_Ax%>ePlYx<%OJgOnF6!Z z+QywN74V9WZ&x;gawH1ra*3vHth=XG!r1Hv7LN~29)Aj!&F$81|A_oj1Bh)}yI75S z7uQ?2ji9DcmpB~7v4O{w$!DP%xwOZQkdjbYMVacB8K+}rsgHoqDu2zY@$clgvla^o zCr^0I7+b{bhR5cmyu9Z`WB#iDE+_6l$R2BphkTb-`KmBqJ|V!Rwb8e{m0M)7KU}jo zOE!u;n!RwMoRs+#LoLJtyytVWp1O8`K zF?-Jkl>`QFpQA!0vtqs+s2aZ+4vV#S{&G4L0Y^Wsd7c*RqR_kG|0=^!Mn|NjctiZD z|Hv1yn#K9{`x@Yh{65^L8afwzMo}r67c1MfAwj_(_q;HRjN~_1XxAxxA5X4qNv8{g zK9gy>82Q03p?yn#H4!Z%v@w>s3g}`E| zAr-APUb^NVK-nbs%e{$LjS&Vac4GrYaPpvI7GmtxNwR0B%yg;Tb7sm^r#A(iX zf?aBx9ck#>xIL#C74&}e>`pbMW!h<1vm3>%PgXBZXg+co0fBlAKs56nuWIO7!kY^N z#mh&0lm%c(ol?OTk67HU)3;W(_Jy+3MMYluTXNP;xaVY3|vE5`#td$6A5FS zou3o)18!#CsFQKuX{qP=#J<7bF0Wp}o)~_qIdr02{qiB{&xAUiS>2pHb+TMdxou%N zKb;BxbQ-l5i)C&>vNkr}jlM9>>lQB6)TN)0k4GnV(|#%od5#2<4d*dg)+iu&HAs9m z)LGXl>$);le7$03YtsQc#S)gZ)}&2zP%#?STs~Q^=m-;e$rvxqITn=mT)LGZ6)wA? znqODt6c@m)2HK0t^+&u_2SQaK`9b5HPwE9mW~<~3cj@w~Hf*m+14s?ZiC+V*walKJ zqB4-A^8cF`h3|g>XaNi4(zhcT+hjh|M5h!F`PQhKUFf5hK|2wtp5usl>Yv%1CNp7g zUnn5@%bqgO!dUx>b`1c4)^%Q)6A|Fc^A|9dD6QTUos(l|GUG>~;|ou4rG4gaQ{_PY zOtxmPe9}jQzv~?cVQV8%gLMBfsZPGpq%75GwUo<Vqhp68j+SXzFtj+|vQG5(J;^5Y6%qZ9r6{@Up5ayt?$W%Zq08>>%-Vb| zn9jH05B+57R-A}1`%&Ou*r=F8FUJ{o6jB5-?g0|NJ#OL_8Tad@+lvg2Qg6Q^(HNXG zfV{QI#=49)vX@#U4#Zu71_A>`C`GX;MK+3H#;vN$R%)3JNb-5UJp9RJ`H*8P5q9S> zPj$2xO2KH16Qs+eollMTIU3UqKD9(GY*9u5KXfpt&j2HEm+!N-tR*k{A-$a@Jo*&X zLXov43bN$TmT<>~sJG+Qi?kkFUK6A+(#q?O$(h^dIUTDop?PAfH?Ql;A~jVV&_hvy z07dO;3xGHD?Ap*}3H)b9XL^v;P_qXeSooT=jJTKxW3A$^nxELNxk$NyX25ca&}%h;}0gC zim(|3YG=_M(qL%~pmB~@1S<$D$QYvrztv0&+z96S&^!uE4x>&;;dm>}h5kKm%L6@U zI&rzewSVOHDh~5*nQd#>(D}{hB2`T6r0<7)WxuFpAqWlAHtsYGRnTP(ohFd<0E;v^QHBN6T4L=( zFc*K6vaOLt$${#0)hJYc?mBWfHVXi^qWrAxK!;#}aD{C|;6>dtm+T+bfb z{+3_e_HUtX-u+jQKwfL1@NS_cAgKK@zbFcXRBO7)x*q zC2vk`r3Jlg&xl8Mb{f!SGqcgA06ENwNxdsG;U8bOO_;ZdGAy`AW4T;ttq(m;rQg2E z&1l>GEyVm6aM=04bH_p7lDk6>(%$vTwLefRUt~pQN^X$A25A7?-#^@jIGlLE^_{lY zav?nX5NpRKb;MFJ(6_r)-1#dcZb~hLlLieJq{`wj63Fv}@Xrn*Ku1Yiz-cA}r0+rD zhLA{0xb*tEQQdC^+T<8<8UZHyjR;<=$5?6GN5|6p>c2X*2&D^=H_`~(cpkKUosUk& zt@;dxjJY2F{uaCD1kkr-FaXeNvHPqtCGCN&4hT}m>5J6 zCv&K1YZqv`SH84u!mi!OF8erL5Zd0(7DAKwSe#E8vqSy({V9i?bJN*I+gD950^!AUpi;!TrzXI{z6quDgSPZ(c>E z?VtBka|!1i7J}tS@`wFO7S+m4f;b5(n4PIPq(#{3{Y(A7`b~{I+GIcA8+zN6P}K{B zo9NiBY&4cy2AXQo`u6Fj_|b*K8z+-Y8N(236p}gyWP1PHi=mtWYTt>Wc!G)u!=H8J~gH1K&L&ono@=|obqh#L-N@sNl^8x$O){>bc|GJ4^XdK5i1 zVU|sH_3FfJi>uF-=(=C|jBpG~e7f^AGrY>pyz1k$-IQ=Txt%c@WWbsm(s4eCmx@Cv zg2Cv6W6@Y4DOuAS)=aCPCQxyUWf=9lSUy8oGA`lyn zhbT$0Z^^h4Y&$v)H7wQZvd6ao#C!DXHqA+OEB z(RS&#lP-AbSeLoQ&Yr2wQx=vw+uF^IO^R0wf60;*|62T-v{!5jX(Sf6?Rgj2Dv+LF zfYvk=b~1F7+Qw2O;a4s*_`_U^^?-N4Jo^gMbNNiTU)+!AyZz;7^Zygg z44=uHIsu1Tyqba)$b?Z{rs}RnA_kXZZU(j~;`A52tlXcoMe*r0GM4M|IO^mnmPC6HP_ z)ih-vW@c+1q;~$mAU*G6_D-r{xgIp_^B#Lm`lfi>m&1l7F`BNPWtV-DP zdb{}j5>)te;KY)(qRmDc*;WxTztfhueoLYzP(PUL7iBd|;2T}6g!vAX(h6wtQdhf_ zQ}CGYPUB&}9tGJ!(qUS4EU}q8JhhP(BcckR=-9_7JsB7nrhVUnuI{!7ea!?@Mb@=> zr0Q;Tuw|%RKf4vw^`&;;%RhKJsxB7N_D6u+ggp%p7>T~P(qbTUK<@CI1WztPexUv! zM>yt&Ea%6iLRa=P5c{>M1`sq$(SSb0M}tG-oOEW|chjq|j$Dn4ATPoTdFDU*S_pikbq$c(6u+75GI3Y@`atZml4!AoVi-MAmi+B=-Nt26CH=Y=S z5Ib8B_V>s{=()<;jDVpadc?|d*y*0c$vX%v2`0@_g2>2G=DFr)$lZ{{^=AK4+=tw zm6V)k?DB?M&{-xOUy@6|K>4(M<4SN8fDozkTg|1jr{&c^OVd_bVbizqt`D!*)rsq} zyJZ+8oNf-lM*;icwN7SKo(>ZG8)j#ELM~r+EeP)qPjFOz?=efZjg#TDJ9&Dpi(kL+ z(aWx&!d_C4c~{>m_};FhN45*-E*x^o7vHYtlwq63%Kb@+mgU**K2z-wC@mFe>WFAs ztLR*TMd_Kn`;=GviZk><#q%58AqEw(N!=ivk)KI0lw>{jK$BB+JfM-8>}yy1o{j?t z9&Q(hh+yN8wr)y7IFJO6$v(|Ye?U*4khhTu%5n;u3es=xAJCtMrO-d;QgK8)~0oTD(HE za{i996QcrgXlj~k)OFNMy_9NlT(g8Q2DDVU8A!WTfP##TkYu3mq319BCAfyHyJb%t z$uRxdoI^N3TFmGSpD_J0UD}%W?NnbY#acOxBnMY(K|{9X?hD}$cVqRGF)s*h7j&fs zJrll-%HYTii|jggQ{6an#+L5H5^rMGHYf&EwTvJ^B2Ww{?)Ykj&c_>!gp*R!|g|-wZ?(P~SxD)~ecQ5W9 zXem$j@do3g8dw1dIJ!rHV2Ej5x3qE8{o zc=)6cg+puEP>&gOs|P47C{!BK6e9noeJO{v5U4$Wfr@sTx z`&ySMnkV(dr64~|kwLStFU8;`F2@29HZti6SnvyL(DMs+cG9``FH?u+rOvd@Q4p>l z9amJ>{nX;?tC5K3nTWDya9ALGWTF+M(P`7bT^F;O9}4B13^|eu*Ti4IH$Styip_|) z5QM}&dkOZ%T0d?jJ(Sx_!pwr*4g21K=&F7{n)SNkKBr!FVvMwC`U%an3t#3zlXJdV z&|YyUw~T>U#U+HO(9sC>hHWi7LM;i&|$GKPA5E9KU037-k$ zuac+ueT#&qysphY*E*suADmmec*AC}TVy&2WZp7zNBGe!I)P-R4!^CMcI6Uif{$>k z9Y{2b!sV)BPsTpu%!cP4MgS{nAXmmSvkS^b_>tQ<^CxRq?#{rN2JO{KLvt=;b0-k1;>hS{Gr>YZLArdxZjem0b}F77UyFEm;u z1Gp#L2eOb$QIfIzq+N)UUk~J1Xk@&|6aj0R#Vm0m0R|pqpz|e77!#+wDmol`N^fdP z_`Bjy&xwlWYK0uG@Mk@f$Q3M!6|-!?`;#)*quA_<%4b9AM%$x0CeSHeW#WGPv{eK& z0ass9RzkE2pSDI+w!&r(Vz8JUA*7|EJRhINgxVjAtlou1XZ`?CP#kEHY(a_*7TBA2 z)}51GkZKh>{Ap_><&{aN%(10w7nPUAqXgu^D?7U?-hG8 z^+2U431S`{jO{9>^H8O5L8zQkc>b?|p&acSqUU0=tNJ}#_oc0$0xau)-YA--K9m~& z)JJJqO!=x`)%th=fu}7|$E^P3GBiB@mi&#doi3oS8mw>EF$;J4q_ARYwghMA`v!z4 zz1?3jsUWA3`C#O>UfhosKr}&uzP_o3tVexS3)lb5w8oPYV%EAGz||ZzwG#eY%Z!C5 zJd#3PsEJe97uO5=&YHlNebiF{FB@);3|@;m-=VbQ0SKw+q>w$7d~X5$Rr*`X*}@xc z2=0G_sR`WF^j0#xWvwlGwgULRUz!gSnKzr^H`J1cC<=-HzM0C6_lN4+Qkgr#_GcSa znwLUbY6&bQ{A!sqJL1)Ahjq?M<+DWWr>}${IJb?kVgq! z(i-Bf?t^ozL~PlX(-mQQ;~xs4xJc^1Bzs!QNeh_qbUMFmAj<{IyoT6H32DSGNe(gl zT@u}^+64?Un5!RK#PPwT?C!I7Z!*4)Pzx+(pK*pVxQe_Yk$L-8_flAf9g~8dxKRii z?;QNeus@=d<=VwW_4|~rrJ*&8w#;yH_)>H?t$()>05BXRd54s!z)$-)P;nhM#g#Yv zzPoX4*Qjbg_B1<(NOB6UJ4u7H(@jDYOtz?nSLDy}R=QmTPr5i}yp*;rjGmN0eh3M9XB+Ju z4;hubQ`kG?=C46&S>^}8IEO!1i&28q&?B_*a-%$SF*ropW7Ae3fg1o!bxy9ajm(F4Py#Rb7 z#&Fa5cEH|yjzqh$>Mcnj@p7^p%P)VWgX)$gxpkEn+bg^Ajfa-zQqUCRM;7iAmO$%#8k>7{na4*ta>u3*bOhehVdk+tgnH6me_$hQZxBvzW_H@& z7_aK)T*Eft=S#96t%dvm>!@33O@DYKR&$NpD$3&z&6OJ_)&dIM3sG#A^^4d7=I~c! zB^v>R>LA-41=g>}q#1Upp_JsgcFEs_{URohb4*t6tqmov$vh<&3Z^wEq*HBB7iff9K z3EyH*r!$B)LH32nM24NkAi8}dGU|x`tqNL42;GH4In8gDqm*9Y83rTsV{M z>0Cas0?TIbI7(W<_XHNXbCT*?e}?`0m@S4F@K|%aUp3r#B+O7Q7=*i=fTvH}ZDY`R zJgpdPQ(;y<63az*s4(YRrtJ+oX2#m4{XBrfR$kTI63tzIt#L;4s4b2aRr{FG#%%@y zWhic+NR$Ya0Aeo70%kk=J*>hva6^NSE({?xs>qs&;(r_4We9;8AlVf&Wv%Jl8i`5u zcMGdfI+}X=)`ZQ+ldJh>QclXH(i4A@2&+ce+6=VGsx4SW;EzY-zy9 zJuk8>MpxA_!{DrV+rUw6Wuvc2z$&rlk1+eVz%RI-v+F!N?;+$H9oFL=1d<~@m z#5O|!byf7u#827IAs&dD>E^ZF#bZdRBRO7%EL=3l-NBIKYdQ@8(lB85%gh$*4aiPR z#nA1)^SS?v0_(qOu>Z#o^Y72{cXy2eiX(c6MwLeU^NC4vn6^Wws0HlrcUfWCwBslu zECVp(tY&l#I^bo}1Ox2QE#0nEVkP0<8?ry~A$ip=wSM_;cS-;b*?c-}72k0Ivn=uZ zK``KXbv-d4u6ND^u9H=7jJ@2BQZRqh*Y+JOzH=O`CV>5o_pWR944rWf_oKHF9G09< zrruMAat9d0yrb5^+0>38TPo3VfaRqVb1U#eDvYGe<2!dlQfJz;e+k$42ym0K!n&iMY%DZ zoOXp3J3~Dh!B$X6JP8-Qfz&uT-ufm|m&SOO#>ESP?weztC5VyXIb1=jZX$25MLNG} zG+O0QP21sdX7C`9CccL=4W78G^fS@l9!V&=f5hNwaY1UykQZvOCnPSh*=Dl7<=<%3 zs%sO0Za|abX!?=8Y8Yagy*2L_$9IIwVKxJsbnFzDhG|xgCd-3tZwsXo?XKF2DIcHn z-G#_OOaqjjp@Ly95gJcW{EtSw_V=p76!Ohrrb@3JWyMAOPE^WNNRQscaQVmXs;Z;b z&2FQLebZofHP=VXyuy65fa68ypwy1c!19~{?e|8H&Q!(ek+|ZS*Uef>21^$~tBc99 z5{%8;I(eeR9(A$Liep%}K9V1`5vqm9D2|e*Z^_HS-w1PaRcZ!}uZ{>5qi)YRfCslb zS#fh(lS}p<&@F$~55*Njn3_Y#BP*M@S4CjoL-j zcE&`>P4H=fK-8K|vvd{lVO_MSr-3&Ke@k)xGR^XB z$){u^BAhYkZtN!S6%cBM?Tqo!cLBEUwfW^~@*zqT>W`)0 z12IJ2Zl=Om$E_?)sl$-3Dfe(yz{c5dPY#Z9JOI_9qZb_;O6<%U>jop!&&WsphLU)a z7U`e>NTbZE^8F9hH_!ncZFTmn{lLX4ku`rmFXqwFD2l z$kv#SzmPuBd^_LFjXdG&!DY2o4ZG;+u2D~do= zNI}&{^SUmbI$Cw2C46=UkY5n3PK&G8EKbGRddoXHWV=kR_k(u)ulyaCIuqKt7EZPS zoKhLsd z#*qHxJE<6_8NWe*A8@X#%|t2A$3o7K%p~qziHxxeNDp;um!7io=97v@vBPVxR|&HE z0(VRq+a1ZwFrNc!NT!#$Z?4$q@LfRTceoDNkyHu0KE}-bU7ZQH6n&T!_vy!+-=6kstiDG`c1k9@7=PwHyCO92kEo1cqxf|@*k5wyAk zjBmUT$fDDa|L#9rf3LJw3`8SMnX(IT-37jv&40j1L;wb7Es9KBDqe{04kmBD9i%Up zi-op7x|?dKDO5fnl70Ty-QZ)H6O>}AwIVShNhPC(1~?;fk&O{a!F-8@v?5mikJfpW z{K1{3(f29M#>fs0q2ng7!A%E9@5yv$|&-D7=Jw90D`OJ5A^c1(Qa zxNJ%`iOP4o)>j^Ocn9Sl?uopx7TuKmIw+)FhlkI|*sfr7^1-3hMg`L6r3jGx;SFK4 zG`$SQ6Pan3v4k{|)lB11sBWTqb3|BMq1`ZBJtHQKJ$AY&jeobTeL@=YV3q!t3_*wY zCw;bffd1!ulDz0!{ey(oc|a$9ME9rUeJRKLQ^W))ApeqFxGrsu!aJ-!!Np zoEVG_Kx}!9p>g4oshq>eL$O<5lXZ(LI9>Or+aq|+S_VS2w4w`_ad;_-&qpW_8(+}H zMBIx~GoDA33>>&U(sv}S_V{9Phs8C1Ka2)=>h8-1z0_R)gLGf@`H5+gC_Lw|o9hGT zry{U#Tr2M>@zjYU|C1`iKS;RA7Z8xPb{Gk>v=#sQRW=|{@diWDjiI@Uv$9-?U2_By zvc!fGFQgszLtZKD2I>0;#?M5f#oM4$Fo!JM(JDyY`zBe*c8r^Ulu$(Jmw`E1Xj>+q z@E1e>PQvYCUwNcT3)bxdHX>h~=m=FGiY_FpRe1$6K;o=S+dMl9w~(ek#*Mc>9kSh?+Nb~TFf`D z3@@9H+wN|^xf_u#Vf!UQFe;@yB$fQRN`MU^N5XPZ9Iwp0kOsbORLxNRN$IWoWZIUD z6l%rTKSUL@khw>_)ge%wW~5W(sI}U(aD!I0!5In_`~#ME2Fvp^1-S-!jW zv$F+xCjgyp!Ec~=-Uc5I6^;@P*A+VBq>x1vW&RF|uV@|tt-k{#JB`{YhwiDYutL>D6-fs$lEzUKp8;wv;m(!}?#1$0c4o~wUCR0bjABA8K2eH3l72dW$w8KZL z+))H|<(F@$Bgckq*J#vA(;~6;Xr+X|B%ft)A8>!x^Z+e5FWtnIs4J$$wl?%RQz@{{ zAluQL3yiAXunf7iU#A_Jg--bFu&k`-VmaZCnL0OT`t!&n&s3dwek%L}q+^G3cEE;f zQfQR(T_c^m*;&~c2MgfWcB4f~z&(rQO~I8>s`XNQrYQD>PR^?%+>Rz%!x^u3Qopd- zAO5q;BT7>v+AZV$sc153SH@Id*@aV^C3Od^$T1&uigPO{J3h4wH7xTiZuCt#FUN4% z?s7NCzXg1kTu>y@)~wp|QVf^FNRd`OamSVvOix{{t>JvfoxZ}Jy|B2zjx3kmTgv!% z`$@*M{RTsIajmBHr2kdr=g?oU(}1*~ZWJ)8nGv)(D<7j12EBF&Z2>{D-hI)j`s8ph zc!qhei66YVMMCt!-yG=8D7rZ9sCZ~6GOe~kIUPv(*%nSdR2KUuTys+|^{Noc+pZvc zQiT#+uuhzeOQ^4jxOihM%%2$54Hg^a=|6tdoS<;aTxam^j_O+X#Wl~WaLc5!2W5^b z*_e~`k~7L1_M)%J_bZZSa_q1+HRzbOqO`$~0!&M3mDsi;f>H6G+&WSzMHP=x3F#pI@E4g0LBJpMK z-N=gFv|cwK5E3eVIgrOKC1>hihem`pQoIGC}k z`-LQ|>vnWn09K)~b1~{Zpjkko!{We0Yu)@6j$w8ttV>|q_UlBc)Ozg;D>tjCA-xBM zFq3c4@5;BK#83x~+Z0W*FQ_pEvYKn`0R6oVI5e=e6u3V}@1))H$p42n=7{+FWNWJr zN1>_SagKJnY)E`X4)U8J4H`JcCf&pA=3@xu;Was3)LS8~d@gPOWKdElD{5G7hk6C= zfM|eu(E|7*L?gc+P3GHyD(2}=fxm8HM0;h*Z;P(CJ^_z0Xi}H>bl(DmdfwQ)D?eV? zYpU<$l~5+;h^x92EGfGxRY~OfGu%ENztWF#!N?tUYD3MJpVg(hXC~~IG*5O)b*jMO!g0HvVN&KdKL$ygLw3L zT=;&oO1gU%t`4MGu#YFSrIh!T&R3fq8ZruOGW+jLUxj8`AB_4bMvmcef3REpMa=7;lRnzd@~8PdaLNG5pAcqi_9w;$6>ci7(x-R9Kgr)jzGqVM zz$3H+e^k1KGT-i-1kDcX!Gw0>q+w@c7viMYj0B^7kOo8R3ozo1Jlz5{=J;AEi>U(U zK!g?JVvCg6kv4&W#Dj^f-GK%Za-ZQGa+e)~t`kwW|8$`>*5$>7TGSouDVoL|@K{b2 z24Tb^b8(GjSXn!(!`hjLV; zcfU4~ffc)A7jAh6X){d+$oB76a%>rgdc`byI?6!MT%XT0rR`Oj^|v$+^UAKv=y*8m zLQcCeuW?rU0VvPRm?9opEkriC91_2^>`kqOFYSY%CaIOLa@RCt^JD2E`cYKvL>9rEC(dv1 zD43aAHXk9yQu4Z>b%H>cZYi!rH}r0*zIE&$M27g-vTOZ5c7{425Y+tim;9oO&if|n z(*<0+OD;~I?UN6j@d;BKHsmop@0gIUv`r9nc*=6!_Y+ylk>|5&1@u1gYy~*1i%4(A zzmIA~td0;n)}qAt2w30#<#$bO%5w|5(_7B|Y960XHs#6RghvqMYmFix+I3v9IIXa9 z?N%Vu>V*XgJpmyM12j`E$QT)B`w1ErHrT&rmKg<`T_y1&7eA-6)5ptw6R4!EK7#R9 z9^mzW&*UI|{6_B8_`MoPIIK)TNLOc)JOp(=j>R`uWYtdmj{uA^2S>YA&1JZ002*f` z(n`z1*W>otcC(Gs>Ftcp4y1=d>;_$IAT9@m0q1!F?_(LYYoU@v9^5I%{-jkyuoV_w zLtG!0su$xQ>K8!QEX1G6Xl*HAdAgee0JxxWG}Hf$gq-YzIBte)PM~kOh~VFUJF=JW z4%-0!kdVG<#lsd$6X`1(q$;egW73-4{O_te<(}#F(PQYs<7+>Su)DIztoqV&Ugk`u zQVhmn>vUE(;+K68iP+;Ih1h-sA0Phdc~~)F6TOknJ#FEAM?r2wu}fNhP|^v@k1~uP z<*fA3($`qteT796h*I)zU$xeBxXFw|DudFO-Y_#I3dN$NZQ-84^h<9k$HU@~7^PUf zv^JZZX=zaxGW$T=GDq$;Z{GZFdIaZwZJ`)v&DB`*yoM%pi26y$V#To2 zF}c}gnxRfJw~L*hzxar&CI;_qeply8ZcQhY0$VZ|KYOZ5OOLwyL~^H9&C2K|Btz%} z(rG+aU)!4A6fs>}O)@N3sGI6k*118ayx`_E9iG--)ZIE@Q%PT%K1=1yIxktC>>ghl zCAzxOy1MuyI?U18fx6W8Hs$W2M9J+bMma&w>Q0Xax^L^w{t!Q%kXNra<6gsM17M8`kbtn_4_j zb%P=Xq+Yb)-6cwF>91$3S1`BJB484H_C&SWIKxzA^PZM9V$-LpHKcy)$%YVT7Xz_Ne1*R0&0G;Zf5tLrp~DIOhvV#t0M~ zvAle37&keHYGB3CTxc1>l&Py7&hdlP6WhS1WriHHm=OG10)|aqZu_?xf<&tvBVBiIaR=Q{NLeTjCPLIN=QXCt+kCNB!Dv z?sOKm8d*-JhSVwCP9Q^{s38FUF=Q>2OxNheH%60@U!J!P8{;`_SWHgEWCAA*udMH- z53zgm$)=~RSv!b;padsSG$ySjy042sC0GnICKZe)m-JJ8WRxwpf4P+%AQ^#5pg+jC zpc}~c>)TLuFNC7<)z+8M~f!7O?u*AO@$@~oI#bE}jB7eO#^ z5C`H5$67FH;cy0)Y|CK-f55mmwF?BNs_aG_m{Kb-aJCr4<3*s@F-B8eThs9hdt&S$ z?W+CRFCK!Db!=rYIqmI%wp!}|u1wnV=u6tAV1srZxpe6Y^ zDlcI_oQIZg*i_RDE>8^7S`X)ertCR;d34|>`Hgq)vg`!PjiV)^svKGT_^jrC^8Jb8 z{7~5FWB|`PdW~qYVxT5`)M_1m5*^!tiL~N?)keK-o`en|Y?u-n!pzdyA3<);KLEGm zt;On;kmaKSyCKUWpB~(q50g3-9l0xS+c?wB=0_$*%%xQR`1dt!zS2l7O!h{~Ue&2| zKg>^S^P{-RoW_-FX5yj@8=axRq^E`vO(G27+jyT0AP2H!n<%z_UeaB%4I9t(pD9b$ zD+K}V^+z!?yUQ#6GsLQ+k*AWhU$!@s<(UW*=bR)^Jy8klOw@0Pc8cf0M^M7e)aUr5HU~f=lbPt1D)ocQFcX<_Vyxl3vbolRBSH6e>7xvzHm$Px zWvJmYrokP_F`fAka9wtCOyW&-+G%NJGtcCR#OqEDl57oTyIl1B?Tl}f>1dbJJe+~z$r$@E`^7B>+dF(Fi*?3h`F25l zNe6MOFsT!te`q)=n1*{m=|WjR^akQduDCMbUy1|eprH7@B|N*616n;J+pXd&$?&k3 zbFJNVP-O>n(Z`0j1;1t-3k1Ai4z?iH?uw1R&Qf9%2zrrs1MFj^J2F{N={1i=0|--uX0p4 zZ&KEoS1UVd%7Vq|{A=7G8vlOWw0C2FDRk(^4mle{KQgt`KpGC5DIk4}^r<0ZpB7YkCmMgF6A*i4NmiILK_9+7cV`v5PZ<;V0e~VVo9U!5{GEf1? z>!POTlTv-QBGqc*kDV=n%4Mz_# zzCu|on@xX%b^bWu)^w^v7e4rsoO5!)`1>m@j_hCli$x_BMy3-6T)UZG|=&O`7^r9m`9>?$$G*{k0GC4Pl2|@fwt#N-zS1Iao z)4nO5S^6AIW4nP4Ij$s>8P#KwM2N|83PsnjDzZRn_$ zO`+@Zw|~xR|8bk?sMg3j_%J&r``OZ>!zSkB|Dfsl|Fdsu+WZev-=$bP$0g;s9+%05 zTh5u%-|#S)3m>Mk^=mKyWxmim$BG3EDzNYgzZzk)dLJq%(S@m7rnbt9QsSO}_ro;mva1&9E zxE<8>0y-|?L$ngXjZq3G@Y84->8iA~`mmm9F6X;o0#7KN^U0ne#H)GPNWr@;vw{7M z(jOnmnviYramOEx(g3#|ztUvV9J?~Hv+{P#F?ic@i*35xM>G#5z#Q60W|6T>>&f=&7ols26W(Aq`x?+~-Dl@Mr5LwH0jmL-J3>>C`*Sb;~{BjIA>= zrBK#hcgtINy_i*dcDklddM@jAf1)ronMSD0`F16` z_%8%5Z+!!z(?W?IM_n*9O z$PE)Xz)GjCDAd-#jg%tx{r_`*R=XfOfA!Sl}>?@kR`j}zU;K^U)_u;1|vaof#>uH$H z`w|1QT87ABa}C zrcm(u5-0V#n9jiTKF$2-CF>%Zu6kUUTyXEI{M^czPs?7;CIlWi?n=YcQ_Bb2Cx%gM z=1lsp1Y;t98;mEb`dgg7%9{#Hgra6zbZ`V*;med4ChskC4IDBTEm~0W z7HT3%M67uz`T^|_r?Si$SeB)AIfP33lEj(oL;{y0?a(8=c}GEmiwpN%MrBS5 zHqL4v5|M$asn&-JMc%Upqy8 zJ{ue4b^2Q4L{G4%D)$COyY}sBPeqT-Ua!9>g#j$|_7sCQV6nia>iX$yH%s37w&m}R z3TT$QP3_O z_mgYHe7h?Nt?xef{@?=JZmFr}^y6Lm9?<=X@^SOq>?|Dq;oN_SNG_yBf|*@jK^O^h z`)(Y{sQPfnp~?^$$a7d1XqV$DplBecxZ3DHYhA%Lx6yU zEwIdGB8vF9UHw+Lc273yL-A=@^gGvaq;EWyks2pU9k=O9{ybn zZFs{|j-uibiVj2)621|-^K{-SdPz<#Fr!CadX=er!%J0s?3F{N&@vcbnUsPnEAKn7 zVH?P=$oGox=|I?;I&taj$X!b`Oo$`a?s|t-Gj3)qjNaLoP4=ow-{5>rXP7Gv4i>h_uLtKz z$NX2<+mX;U7#)=kN0Wf#w%|5#Z zW(P9PyM62caYqzndQN8gtR+oZzb8VS#v#hoE_C~Qyna>gP&swuHF`{qA~o?Z+?ORs zrnDp8(4WLFP8H<5GRj8N2Hx{sQoT}$U{JXh8358Vdc9Vein^(-H`}8g@w=MCy-F?t z)!whQ8vwQ9G>Dw*K~V!ir7pNOGlGUNA*JZ|3-mefOV}S-$VHo3m3vE?S;UUay&g zkoDpkh~#OWGM4MXw^hJ##rl1&+&@7taxp~e&cz>`yp=WaUcW6)|Hj@Ke5_)M5Tuk2tgfa!IPG{a?L|@GUd8q@6Rt;ucPp(e8l<%v%;*0dv z I|*%cX4kgisR zazS(VGcDgrAFO+Du^7`>yW*l-R`oEn#UM{2et9H5dG@2eClzgy$ZN$*M0y-CM)aLm zXkQ11>MBovLln(FNb^v@b|}O6CRDoXk)yEae4@XxxDz6uFw;%`Nh7T9)HU>cP2BqW zB5U?0e$s=ILwkPfcd8?1I@&-U0$Md3kJ8qzF@$VqnRBHEwQ;x7pB-ng#Y%?D$0-Yp zS+aZrdx}19h(C2z0Mja`cS;uBUMiu?jDTyqayvcRH6V+#0owCBRh6O_wfl{n7hpYi zd6?#9&o=)+piB3o3Qq{i(yo`9r%zneTV(GQ zJ7ioe-657nP(b%*rAsMa^Zeux*4a%9F#z!3AAEa%U!i<~Oo{A`Yb2l=$~0 zZ>cYwZ^UZy8+rM28udk^eJ$XM1}|;^sSpsC?Hte1U0K<~%_C5C+`m0Inj!v9&}p+6 zNvnz2Kg+C%YpQv6Y5LNPJ)bjg%U;mfeglk3ggn?UBj1iun&fU2=QF1c9!Y&$+{3w4 zIVNXdc%Hyi+V|>X_D6%+UNxChczKYsy`LE!1F?F3Tc7H5f}E;2kei#o7_X{mv+4Sg zlLOpRq}4`tcpj942CCyL7d0NIhobn&>#XoNLDmx$>iJLY$ zx(7ZbS2~Es*l?rBSmt*dZ^yDTSvofp$hy4dXViZW;t|sp`J^R=zGUyI+V|Byv%p7~ zj|9=$*GH2Mj}HE>j%FCT#R^dvX|?@UHDYyi6Dx$nXUPX;SF#t#`YvySh-vZbZ*<5= zzOjdOx2VmuT1BS({;;ea&-Cik?FXviW`QkXUCLonS{L$$#@~F%Zu_%`cv8(aAFD#I zpcCZC6?C1pmJy!QcfMiC?yWcUZzZ=M8I{qPqY4?ZHQP<}SSb|ikWVp7;>-P%D0eK{ zlxJhX92FW2AHFCk*_wg%|tNF|=ac4VbZ8@aDNHJOLZPkGk%SVgR=f6AIrhTOfL? zAUKvWeFi76HflCB;e`7?6v{uwTaLs>&t}x(6iqrJ`W+{IMP$pGb()dWirNa0##}t4 zJbARSdv)ITa3kHq(+_UXyDOd%ET|$Xh%{GjPi`cs2vPbQZFJvY=Zql^-DUGdhLvqQ z&JW9&xx2?}9eDg<=cq2XBEV zN*;})Wyh7ci9)KcFj>TUmKA76pxFok4fr*MiBo~2B_kk&+)@S z1^>pBoC@d*=6?MaM#h`Ung<%4>g`F`A^eWT=+V0!nt)yND&HugHqM`A#)j#FMVy%a zRxWBfco0C0j=$EZ`;o;K{q$pN(P^fZ)7r1^s$<+Kotx>J-}WV}se&bmrhBbh6|PEu zcoa^PJsEe_uF^Vax9FC3krnV61twgn;@P@h7tg2~21dHz5U7 z_;g~coL>>$U^~YOY^x&YH|_Xg^hpQY=9)}Y*zg^nCMZ zC7war+$E#@0D@YdU(ahg$az_hp>U4_8p&^PQjvnn8jIyG{6r&apEiAz(54RytrQ`K zIUq-hK7$W8Xh|pBw|NoF9F2TS)uq>blG>@Hq!pGp3EGKr7|nwMg_cI{Z;x4C;xvlL zZE(|Zwnr39={=NBooY2&!L;8rVLu0R zT&Ob&{)hAQn`qF`T)z&_XEcAH(CR2q*Hl(`dkk}n$AKPLfzud?X+u#o6h z*hL@9#?rn|mscyeLF)WM<+8Z+I|>UEm+zDyrN;Ef1+gSS0ke&~_VGmtp(-OFwF8km zb!iw{S1r%<4@#>V`HQcw)iu-sx^02Y=889!k6CVQi&aYdX-(1Pb}ePiTBsB#B+_FbyWpme`GM?=^e@tT`99J^?+3# z`D2OsmWXH&WhcdP$cbSbmAm$ZU4tnNQWfBY0_U0&6-VdXL)vYR7-Xy0w?+P zhe@K(T{q1q2P5}kX#0eC`C0oHE2=X*^Lofa0dsHq*Bbj*KStNtsgBq+=|f_dI6r&~ z!%dX3uM0{oW=eKGVM1{~$3`M$fed_SJR%s(#jzEc~3K#I62Gm{K%SPkkuJlBVc8u5B0Bo7@|FNvaa~Kz<{ur%g*^4wI}u> zmZG!psgH5RJ?a2zyid`UyfQmS&nHji7xVE=wYPj)p-f0fNPfS8GxVwjT!QP-(hU@h zi|y?qQ7NboXJaWJ6|pp!>4}68(KL;!J#Bo=hf1T8SQ<>pP=~#>HoE9k3U$dll3kek zx&C7Kvc@fPMxh6}4SKW`Mq9D%mPYRvQTC+zFY=hqm;ykjSlR%KJ_m;WPG^ii!15A7as?@xCOo9@uPb+Dt^j>~gG_JB zSfXO>>R}thKqbuBG(W4>pP`Ht01f_E4O@n0g2QU@iTP_R^;L?L?>eA~iI;fWw3?rm zefz-Soge{;N~-!;T^D=qnE! z2beZ>9P3tRh;2UiK)pl|Z~Q>H2b-LkA3HSEvRQ&+JjZ7bBqjRo8klxS#Z4orIO~MI zgQTrCoiVILQ?6VE!t8V4`t%9~#eMQab67+7yxkVxfcaN}_K1B_qQ6T8*uv#@1Sh9& z6__1eZhD9W>y7H)_pVZ3XsGyZQ8cd7LWYL`@1V(j%@3OP313(hJnFGgVCG)Ec%-F(rSV$I#Fc*lF zhoA#ZuoRz8S0wsxGbT>GW9`~twT^m;#)D#ISqI9g1so-?qShclKfEFK#F@%_+yURG zIy3bs1}ArhzmZ>(n(IU|8Shib;G^9az$_MdW!EvlW@=MtI(eH%)`Ow(bdZxRNHpZ( zXs$r?0vmMX70~K zeaGr7Amqt(F>c!ho&1?xZ|;>Pt7WAmZniwE*}Qne3!{L#OgVtI3PMW47&k_IdKZ>+s#R2!o&Vjldw=)7@7>)G_rsjieY(1w|5$_yMJ`Mh}cfEahbdT@JnbdteUB&(fYc?BB^uohHDaQo>Fi?pt4A zF$B!z+rdS0%{11xCU$DAKQz!`YT;m7Nlbz>ffb7JaeR1RbZ|Y5aIlIOBqHzmM0-D) z;El+ksor#;CN5>{=e2Za@q$4BE2ix1Vm3uU!S1S2Gt`?jRM!5})k$%Y_F+(N%9kvLl%w2N=< zX=Ur_L|0^m;?|e;_LQIbUNqY_O70`VnEaj-Y^CbwLF{}v>I?WM6fH!5q)N6Dp3VQ+ z4%R?iH6v%u_9}m>Jr!qoJCEwkqM)m%Up1t2;P3a`xg?qtqIaUzZ}WS-jv+jJIzIUt ziye*RIGPw%>#QprofkN=-dyyG%6MHe$s~6g-MBn$JR@S~OZapXe^Apt&tc!UCKVS{ zp7o4z>c6@s3<3CcWy zrQuS3o9t^Var%*4V_E0#v*O4$-oxnmPXw}oaRgxr)#c-E>>%^owI!j?D~9`hZbKa zV|2EI8`ZDf3j(IHzkK!K@|N2baCgy`J?C%Ftnwy-ra z^KIQWg?PGYiPD&nH$-**U?GFLml%0g?x%V=#cKgmQrz0LhxFUO4@-`Q3bsaSn#ef$ z--;IyR;^_+-j(2==&%aL$j{SYdPOu1Y$I#+Fvnk?%y}aa&j<4~I_VJD8uux(*VG>`z2W}gE6J+Geww5Nr zinzIf+btm`iATj{bZJjc^v=pa;m>313(eo@Eo;`a6&%AkDJuheuq+6ts>`c7A^O$c zM8lMoa}^yj5EJ)wYJG>VN-%KdP+E$@BT@rKo4}bB!6`F+(}N6$UqUWFv$sW%%BC4p zFz=p(Te~CRQbr`>a|2BfYd!} zYK>~ItH*!dW+b-A?*zU#!|A^4h*klSQ|{s`!nxbb37H0t6qEj6z(%B0yjyZbt#PNO z?QAN?YJ?cYIbXQo-P_#N@|=ZxLGyD01qG(BdzAe`24B5w*927}%vo68BprWc77oD- zGRPA0dvtyznzmV;K_xD=?%a^HjaWJz)sVGe{`&_TzTy0XX>SOXHFf;PlUqbx8c}K3GtZ0Y#$Xa1LI8AC_^1V(C*J~~Ov9&R2z_M7kw-s6(EOvIqBj#}{Q_n7r+gl@WD8?X zCeCJfXEPfLj&X)@rD0|sKCw&Iwl)rby!T~2{!E|8L@8HklE6QDl8A$PDj-!HR$NN;BL2-EHb1MBw5DMOM_ z8|I5yG!g~s?Qj@|_YDgz1eqvjZ~ODR>(CaIemdoocB@Yz2nz+Irf92p8;beZ&7Y)Q z=V|kJ#Z>g*dwjEr#+*#qq-12{;c$6YTAf7dKN#3)USmnx?~l?l`|YMF_mS(#?T0>} z6D)~=QQ2bTuA?3M*LX3@mPsPz97-#hquI%&4IYB|lJ0tST)N)3C9ffRnY8Ehp)g_L zid#3YH6^Lz?y?I!j?)p|3Nv{qe^HoI_)eE1pK&x5S zf}Svb>Q9|A$8)BZSNcv6hPqnUb?yO6i&Ovzh>-5-qo`4VS91%!?28OB48AuTxpe=7LieInYWGdCkJ<%$t*< zy4{I8?2E%Tl7?5ZErp44`)tskRJy>l!cWZq0^F=7nOhJ1QaFRu_)QgBBtq#F zo(e6yMVCgMr>!M#)Z}??z|4~z*QV}DG#!D}+EJG-?J~m(I+DcG9a)pQgZw%#I1`R} zWb7!vU2_H9S33Pd=jC9juK~VHABCPYCr{Og2a)u;m|%UtpeI?w!?GN$(AG(-8XnS? zzRzTuHbFhuRJ&F;m{Q4@aIjM~8keyl`dcE!xm*CXhG8*-Tl4E<+z6Mu$kxS?PU}B) zmT8ghlUjm{2RYW61Ddt4`M&^L#Za(DYAYfH`9?wx{t9jRX}s1J)s?HZKkk)yb~8it z7a*2A1+NOC>HY9kYtkA63pvW;rdo=HlJkIzi^P7E)1XoP-m>hKSg_$2|05gtjLsiI z%hBzvj_vSu`;BsfKF_}+g=Ss<`|8st=}in&CF9uw;AQ=j&s$~n39#PGJWe}+9hJZY zbK>fTai)_wfPMpjC8J>CazbYqBC3gI_x;dR_|I~m|F!Qa|K-)s$mBml>AzGguayI_ z{{rky{sOju@)?Gw%IHK{sXBgD4U~f{kF)ln=_<~f9^)ft@iZCZXKIZ6SRC7xX@K2N zvwCfX){Tj}wRfjN1IUi7Z$`HS5InP{hz)E>THNEnj)MSA4EI}OZ|%O5OJ8ps+=po7G$0rkJXgGmj{uj?qnjwMEN` zxx<#{htD3r8CO4um8c)gh?Bom329#}-m0qjL|+KpB)BP&g4KF)*Pf*&;gcXbOes=eA(&G{289*+niU$v#ta(-jXkm|h8&y}!z>$Dues(_z2!td+cYxO z_PTgb)W|bw_<%gS`@VB+M-W%=fyQu?+wOwqrs}?%ZZ|lljNI#p!L$)&0^4o( zK%gbH5Y9$FoentINP%if#gIN3ydpC47oacj1Y)ydf|y@WZtTw0Od8AuMq~p_@9FUg z7V%{23RLABwe4y|HlO~qvo>=vHsM98M?X=92mmR#X?IAPsf#JoBFPk62^ifxRGjq; zbMG1-Y<=|?pJvC9XrfTA9+dMxE2uX4An^`FcM@KibpbZO?*3t&0LEI2YuS_Ya#w1n zOFrdc)zbP$ZIy#bC?VN9HlDQ znv=|ZJ17&7|EA_8>QrYC5vb2%6i-vcP5;}N&b+5j^Yhc#5JYBpVkuer@wGbKpD&?t zpwqN=G3hG$n7q!{!svOWr(Nmsl6ePDwhd0NY21`;X zp3uu(3vRjF5-&pAK{|QX;!Ik=?&zh(Rq;wL#)KOgyA@@lGAi)Fh)s=GApez9Uc2n1 z6TPM33B&mYJVWdd8>sIDa)+d#qmLzVF<$I-3OfwfmL=CQPx(h#wAuU53ODYf&p39kRQu6G0lb^UiP2C6rhf#VDg-symt*K%MCBH}C0H`Q!h zK5t;~stZKC#Lpu=4ygR&wc)$e}+NvBn)<|Uwqi~?1E#GJTW7#L3- zV8@xXnde_pBjsMr@zqY(j5+F3=eAB@K;4E7gA>Z2V>meaT)k1?#y5|hE62GwlJbez zP$nWgj06`Yn#GlMyNysXjM`i-LsX;;ePDBf$^${TbeQ#`;}hjY8fyz?=Bu)O9lpN& z_(7@@dZ#b#B<=OWA4knU&U95B7u#@J_wSbtmAfl()&1Ij2x@%O^kdxCoDm`bplCo! zXy}J70YbH&EsNj!^gXYOX#(*L%7j->&~a0r91ENs{)* z&~Z&FznWNR{WYtZyGzjOzfXcf;?Yw>4M^oYQkNH!KaDoSAcOwvg4jsfO+`9hHfvr9 z;XLaz-Cg(xsL=7j7_C1?V%1wRM05HwToPBdUtZL{&qGMCwD0Vj4K2Yd3?9bRl=n;^ zh%b|k)$)LjO;co8`X(uv=NC-4H2=aO_OeuNxshK3qNGDd?+WAJ`(Hu9TNI_!)nW z9OX!~C^V0}bdw+kD8U*{f+x2aS2tfdzfF0g)~hkc{y};dYtZDbx!2xP3r`Q>z2VvM z2*H^_DV9LwqQ}3DakASQbo-Kn|&iaQARO$4J z*;dc$I#UG}%jH;Tf|TBrPlQl}@Dt{(2-R+3d^vg2Hl`kix2s|8s^c(L`N+}Gad=rX zO@E_lQ>+f4-lxg-#e-xqquqg@;|_o6>ft?~Pmv=n^D3rdv&$gs>xaJpzJ{EFE z5{B)*DkxKLlo6C@I>zeW--I-EbL}Py2#A@=@lojp0HHTU+Y)JMc;1rTV+DStTxNw1 zmt1AesU4MmuOF4(N2lBvIa0xr_;ENwUm+LTnyOZz@^#kD-SnFF2@&X!QIM*Fye=xo z`3G{+oL}WaBuK9m3I%TSPq>_;TF!CXHD0ch%0uK1Kv3VPZ5r^!v=OF}2Du;I@y&?t zkKF4eZFYYXq={{8HG$a)8JffM^JwX>az zRJ6MMMg~t`+!uQ_knGIC_SR=~?&i}~FD=6FHkMif>fKfyL&`6i&Ss4$8Ly+Bz4*0n z2Y$6QJ*t+@-s{vn%>gCIUq z)s0`4mPSmTd;8=@mbhq}WxF^Go?CO)R|JZdp`(nTU$2vdo2%PBnpGSKAMv|N!e@_# z8+|?mT?h-L{sqJ}1!}u>>mE`hJO7kK`vI9G6yV5_hSe!`sjw~MjEVQ zHR#O9yw?E3HnS}Y2#HQ#yS`_s&}&OPjb*zt|I&S-NDuueAh8uMo0d_goPOnQK;-@m zGc)KIDV8m{iR)*E`gjg^H)Pi=<#dY(%@j~;1j~%5Ey5>xhP5|upIt~MlD1hTJN&F$ z+xaCX;P1cvd)uN;BhDs8*>4k~p=@2qc4*~`nBIuH$MuX11KgVmunbfU1Yk0B$rn#q zE%|JKVHjPJ9l8OZm7?}65Id|etrIhb7m}uC^#rQ;EONq@C&N=7Yn{q2>_LJS^HoG+ zzsf)GKe9dn0P>e#-!Kmi#1a9KnMKyg>0!^W;?gIwd_-{?L+uP`%I`E?j^0E@05$PA zJ^TQ^@}frRTQ8`SB%|Zt;#ACL^kM{#lrcts5CVFo$RAqx#0Ug06#vW|VC}vO)Zqms ztpemKtFbB;Rlj;qIuEziuT|hbZQPRK{3O=-sZb{8V~hRqQ)c23J$)hJ)K9lDDO2ms z(Vz`JrUq2Y=|DB3g1f^q?=Yk7V)$)7pb*phrmEWUy@%Yjc-?^qi&jZlA3S;4R+!^R zQ7WMxJ)W2}nN3n%Ib}d;X~rA&PX5o&(+!*&Yl~05n@0`Dgi8fdG&eTf`oJY! zTt=MYeS@N{rLI)Cnq>q+%8&w@(s=-K(9f-$Z=T^4hsK!B@qu{0q?*v@!}u>C-+@Rf zpfYbJV`yGz!lb=T{j-%jNjc=uegoM7^UE14dtaf!VLvduFci&wQIlk zeL}Urhq^!>vth4GV-z<3+4hw?u)cLtoi>&gu1HGPoD$h2jDq-_T3`g%MU_SP>IjD? zU=`YzBJ;RRv6%nN>~ghMC(Y^Y$^4({4F^9ZHLjZ>A2CTuc)_S}(8qr9R!gsMUY0k&JL9Myy*3 zNt4&;zdbIB3Lg!bZ0cqv)aW`S3YMB`xf6OLxo_{S*C(Tl_>`HNI-jDpS#xzjVL*iv0 zgh7YOSAT|{+(_z`Yi7)JJA?S3WK2)jI}}w{_U)UCjr)2MtkTu%BRkuLQFuPbj`3D} z7z@N8b+ndL)&}Qi7znFSh+no~dO24n)+kZBj=5O^FKE7Mc_=I(k`js7T3f8h&gOm^ zc27TinCjuAFj_AvN!_oMwDQ5b&uHLXT^a*eT~AtIt)CLpNm{TpHH^x;}B{Yq~0dn@-_k>&26XTHVn$x$m$OnZ@Df=>H>* zck6BNUwUIz&kD9TyxWx~*Q*Xz!ogi+L{(tp)`sMh-;D0bP^+wyAH?zkiHeo3l~H*< zug{i&r(tGaImVc(%gdFN%x2RcOSvekF^MgBQen7z=B;yES%iMvsJ*Y5B{b|7U6^&D z559l?;owCkGkL~vjNYRXkLIV0)*)&#>v0PQKRgfPy`M@@BZ0`rC<0dj)?3HzyZv8$ z+dCl9-6etp82FC>!f}hO_%Z*)s`PkZS|{AvM}|HsCD%$9-bz+G(w0evs0Cw&UJeNO z){N9@oBz_8KuMgMSiB%G6(-&b)?ZmgvJPcpI#CqKlyj+iKYex(P~^Z`riAv<`r%Tr za&35l>FrV!pxaLU^E8UW(E&~G)2<*;s&v=b0qOit4EUX>ou)|h$JsV`r!4o52SVoF z(ZG%%*G~$OkP(=%eoVlMc7IoEY}0+=6~~>?VCmdtKvAL8dh3Mej;NSeRRem{-aAJy zzjrINaSxJeMD{&daYQp4$YnbJ>=XE6HrMpEzchKr6k})yE;nIy%BTDdGa6{3@BtUN z_mf3qSw{0>7Qb6+S+`5bu{aF4QCrTq8j7C6SHgo4iyLT{)G&M53+*($IK>i7f&UR2N>3FqlES`ggvs03@Dbu7Ol?%F8l zRnSum3mM%CO_8a73f4M1E`>a@;zcLRo)};i>9qi`Wu)lwz!U zDwo!6+$D#Pkdue7SrJgP;o}sD;03<^n^FC|1Ttw4-6?Zvr)z^89Cb{3>wf%v(KH_Q zSU$IA(2Ak0Gn;%lKjMJjrj6h1t+Ta8mnumZ#DEistmt(miR27FbORTK@5lz)?sy*H zL{rD_7WgYPS!k4VFTRRdC;5hJ1qy^pUY=7Wu(*=wLXZ^u8kVSiJG7T0=Azqr<#vJE z$5T_&_$pK4sJHv&-(Ht7kpEc3AH>2+$U)8#XSLQjhit%bXGiY56PBRmLq(na(Zij( z3eed%&!!F?T-gw1y&`i_k-Q`t`soO}`oVt0^lZd2+HaAT^d6lrgmy{HZv1+)3cqJM zIj&fO7*jtP4&D+MV9|xJx%h!F5T(tMCG*>q4U*fQ1`c9NSJ{t zDb{E$X&p-a^QnORknxWRay3hYZDqaF?ZfMFqn#D&a*6mLq0#oA#w?Zj(uFfF( zvp!ZuF;i((hUa_T%+~~C_Q)~h)dgopmq+WMS`@4oH!7F;y{dakNfS`~n0- zpT6`FQ*&zC%$ZEpU6HRpTjGD(oSxk`~%tz zVb>f~s%g%Lm-R%3Y^eX@vot7pri!f`6x612^UmQ9xJxzpA2l9){~#(BGAWg&6-$#V zWnHV!77HY8TjXTLBxh8lB;U}{nf#;?81n^wn3OqnLtU#q(kyo25=>LJqk-K$D65BR?A#@Cy$XQ>zH-9|I@% zd4>JH1MwFCd{v^XjY{ONI5{Y&jzp63tuGM|8eMZ~5D92nhv5Oilt^Cm#4~R%)GS4W zIU|x;pU6ysd|NG@%VofOj@dghn%-;{{Sk)_X7kXM0BnO#=ax!e`DPXF@L$>A-FwBK zTul8g3r>72y8<`5Z*pI1QPtc}q=`yTTM8bn(QYAX4VAzR9TFI-ry&m=CW zkc8^{^D!EaUCu*djyU$8O8n9%;RQk~TgqHOtiEGSC`#Brn)x3FQ-8cIpp+d_EB5o4 zVQcyA9p$Ir*_Pm~^^gJZv_V$iRzzut@E6#YbC@gpnN`J9k0-5cdLdpVZv|6(hy&?= z@etO;@uB`Pm@KbcQiE2_-e=TJ6!Wvk!T+lPiW?}d{;zIr*ni?#iU*R^zI2sUIHa0g z;3EGt{26gc%CX%NNi)Flqc*kpUz}tC!pOxZbQsY}Rc@tE@l@ULS%Z~ss$U&M(fkCy z`tcWVS-ArG3t(nBvqd{{dQ`253Y^te;BL2mnDdp9J(Pc|)_b1u{5~~JmwD1@yD~2+U@uAl8*Y05Ni6J1=?RJJZQ=jOcvtB0S+4TU`?r~YlK%pv z{;|22RDD3K?Ki%nDmDil7ihK@RPvF@qPFfR>rtwHX<|ZrtT~9!V3?LZFwi?NcclJ@ z7Y<3v-$VePpV&xx?UPKY7LE*lHD99F;RNZV*oX@8S=WOU8*xpC|M%0YA%6iDQg&}Uzc-nm)(MMI4B1@aJ+0(&kle=jnaRS1cz4*K9AcW$3to0weM?%ZrMT+Oyu4^M z>jZyUED}1Rd>yy=-NgUxCK5vB(Xu$Zed$7cOXyD87J|49F5&_LGW^RxoOY6&1Qf4L zR!MPrL}Q`NMTgGDqx{r`sXn>rh%u?R`unMD#JBc2-ITk!g9P9Zkla+SXdoNcvPe`x zb1^B%bh04jBCYk3IayY75r>Sxpgzq5jXd`=C3+s0@5w(&L_4#YD={OR%KNrCzvSa> ztYR8#YL)H?d}6Uzhph;Bx%3BydiyL3607+M^oc|HbwA(^te+e4C?R$W=N=yW+*Dp| zI|U7f-BCyh5i;|=%qu(M!9Pt=eST2DR~c2@G6J`J+hD*|%aIECz;#SynhA``+CMka z60B4VW!I-Z7UgOI+qMF^cJ7WdLo@PAx2=PPAwqYdj-H0kt9NLqud9TLA;%47CQq?3 zHD=KX$D=~h>xKdL#DguuuIf=RAtog)vHN(mU2io2GbL~=U&tvRqpAkluQa=)FDDbu zD9P-RkMWuuJ%h3_?>k_@GNcHI-VnRirs-UW4x5-@Qgl@v5`X6()Lt4fU=YDGsi}Yj z5-1#z`04c;nic%0-YsplG#WBB*w;}PDBb4pk83EDv4z8!un&kP5#sFQhx@pm?0UXM!RE$-&)HujAsa z_Z?~ovk&LHAU#ccJ^&+8Uiv(MSXKWOXt}ebGAp#=G0}3y<~N5db?ane$jw$B6bI=* zGzzHG@8N5UL~10&0`h%+R_24C+4iq`gm<2EWf@pJ-WogKYHrlgA=glBf4G|@X%pxs zu=JfE-;4QhKNdxE5ASRO-z|u3JL0Oe<}zqo%~5|O=@|W;cd=JE(yPcBQOQ(fc`_3) zND^yiV#8+$H8q%`OKQicy2Vjv+>6_ zX6NK`xaRn#*jcVB53F&D^)sN}`0aO7EQSY7PDpz>FWar(g@4Dl3*a^?5E+ioLN=ca zQ%F_Z*J)mL=1j?*e9ujyb%s5GT~PwxJLW;hWZNgB!B0}IW*fzF-zToq>TQ#q52Yb1 z_*lf$sNfr`%TPT3vuGs;eAQpXX@KKV&)zp43!=aH()l)H!IS{~y6+m(FKDs2OutZu z(LEZ}`(P2d(&-~rrjX&5`N^sqxX83+I(DA%UZV*Ow?Ba1jCDFbNZkq?GCe%{3pnMt zoD@YzL6RNQ#8S_~)iX@=pe|e&6dk@;;VGna@EotTm){hlK6f-Vy$-SqA<5JIQr>>N z%T&zzZWx+*lV{XtVhz*uR;vd{-i*C5Gt$)W_CFQ3bsp34def}A;KKgiBjITmQjO=~ zm&i;kS_Z&mZtR*Zr-7l^$?I%`n-bOM$9NHt^TvgIwgv~@dNYD`k<*e_!f%A+7Hf}m zY{RHlz8`aX?{+@pn1LpT3)?ZTpQ0_YO)|zL&)^Pnd${*Akb{^{K3UM;0o-;E*T*e{ zuh^3Om*`;mD8_uB#Di5N!EG;dhz zQb0ID3l?R=EOvDe5R#iFNvGqMR*a+O7}@fyl#~1o0{17K!rD!`+4y3x ze$_X4LGZ#hy0^2ev(E+ij5fk{SH4K|a=dT4H0se7D2`9x7;aI1>qJ901l8t^%7-?C z16c`@o|W|TY^Uag&16;TiG+hyYAFq1&l1}pn)go-uspOFYLx1PvhassL-*VaXe?^bjtaGETqeaZSn=gvpxv zWBZdoJ5jOd4;Prq0w3;$*#mdCtTad4_l9yprKJ|;<;=EL z@qKE6;rpp=`8g-v4jdQo3-kTUtiUL;8RyB_!O5X!S%nqW3tupkY1@D zOy%P#rsgGgXtu1BR0bI?Lp{F49u?bE6w`EbHFJ9Fer^slauA!QnaLf|uQ*n_zx54F zrgvyJ@HoZ6k+7a)aXAyu3FnhooyDw$hM7ieKPM5UA5{`%yjF}WWP=GU<6zU3X37Sa zK1wn`auU6Mm##njox=C44gHLTVnIIMp905q0Uf`pj>gM`tPa~Igh*+%&vEDIb2QCS z`M~;G>OwTUIog%s<9Vhdv`3BOi>u4{2H)s1+5pg@fBm(y8tmq2+=K_oZ;g{v5SYN{ z_Q+>ZdXI|bEL9A>q$GONqg=epaSAk3^!#!Bb88{F|Nn~+^Gi)gUCusI)2hDWSI!iP z=N$IHx2fC#;<0W6LXvKe6vpz^mNb1W^BqQ5SW5$~rz->wjhPvHr)}53V2B~_MHQrzzu`Wcu7Gp=*D*A zM}pI6c%-a=*z}J}qf9~mDayH$j)byz7$t{pCyuQX z^SzqUC?}PznP9P?494YzkL%zdxt;vn^e)2=7tTT*^C!c?i&UNO?B~(m_GQ8Ros&LI zXLC=zQ#8cjkpjgRChC!rua%RMRdJ&&F*9wq%ejs1uufU#sQC6!#0O?9OX?Y@9@9T*RxVhTlCM^ipCA`P?F3d-80i z{HPN{YIkB-kBh%2=+R|2+SKZk(XwX#*Lze^Phs&&OTWg)GqZOpyJ>jKi6ygGKsx4A z?{`W$Lb`S$#G@fNJ1OiOF;nW}umbtO$*8<(lyBjbxc7naj(HsoYJIGc|J&KTgPhoQ z8HV(DdAI|Y@@0753GHHo6EIC6NG@ULn8ZSm2DN2Qzg+mZZ^_nj8zu)ain?4%0hT}F zZ%?=A_!3=813VsSeI7MyZaIZ0ts%;zTu(StYpd5u6#R~=^DOz1>k%K?Z`+YJ!T%LQ z!!2}_QWbP5w^-8Ksc42}7gZ8Gjs=Z+v$nuAP8TiTqOl0xshprtbHw-0+7R^(nELrk zkBRt}nS_fHioqJmi3o3(lnMU|P*!LiY}edhS>397mG05vNJGUpi4<=XO6f^?neix+ zqgz5@aL*T>9#=n~>1Oep18oHzUUz7U~kpQXt_(%ZB5`{To-;b z87>*=A}AGPkWA)l3=bWB*Pm~L-FTy`<$Kx9Ke2gN~s8rakYx#|+BI!eh1Le4xx)ah>GhOaf>J?xc0phkUW-^kp z>Sn4fd)t0Mu`BMa9XF)YL);4W8_83a4l&dnlnba8(-Z^NlcA55f*kHlf79EK?eeY_ zsm&Ia6@D#G`13aL4lR?ov5WQ(x5@O3=^b6qrXpcq!I=AI#m}qjK`tqAtmh$m5|{j5 zjON-fzx{*vlPaOIPXdDc+s*Gb>;`$#Q+prV|5ul$lEgA_XuXRvDhLm5*62`D@X(^R zVRNlddBJ6m3)~JJL+Ih63oORzTN%gl&+EzkqoN8a-dN%P{)6T7X`A0Q z<6^l!;ycWUY&d-R6j{0fk~sS0$I&916O;bWCj5uKdKUj54%#;@uUoQm2Q_PO_JL;? z%~jnDA~SeBkH7|UaZCS)XR_jIwW!Ha!bPiLRQX4x8){1|)6Y=?7pO;TvbV#-u?Egi z{&-!nZ+GTUBLATzIFiLIIO{!5j_|KI@gMs6lqyu^SF?Fj&+`+@kEpBpN$LU;mo`vL z{6^2y$N)Ud-ux<*%6jNuVNHQ|{G`FK!e-?UY{{3v?(Fbx^*x?bFq#~$K3|tjv$yO_ z3f$K&YgPDo@jx&ds?NF=k_8j@6z z$nesV^;v`#al2#``GJ{P9(bHmAK~9?o?(~fD76CTX#}uhdi#Z#n6qAod8O7UpOZIA zJnWBsH5KxL#@+`)+#Aurrb%qXvaMhfosAZc1k_#u-(4p4Fg(T0Np? z4SbQY{yKrcj>0AcfI5?Jd-cO8Dg^mk-x`9`Gm_~Pq{AnypUF!RBJTPUHwBmWqMSag zwd;+nX*nYUqV>;@cZ?EL9}%OMXLsDPoS^z=B?&McavVRdUUEsm`4UoN#+cO1sS@9x zslC)Vw?@^vBdc80Cv1^LH?Gcv%Ow)ygq42e`u+6#b*aCA-#4y*az4j=`@RTf4W|B$ z83H@Zw9_+8oh6+%#g4?X_Z+L!n{so|4f!9+kYpwDlr+*?nS7z57Eba{)vX0z0 z`-ACQUG}NES>q5ov1%gEPVOo%6D<^;t;huYiMzdf@an%g(Y*}#3n)^XJ1m#)@_3)S z_CQeLLMC#V4|eIB65~>~J-F9=6H~{gt|%UoO<7BcgX433k{#E7#9!!#EuU{SGg_TNq6ruR;gH(W9!edQ43W}7H3IjBk+WsTkM z4sXAK{(5aEO|`UO?mN9}g7U5dTbRty+raQ!KPyqJ%X6}3K8|G5%Ua-A8YN}@HC6XD z`{e*Rs zv3)IJQEe&YmhG|tvW6LhZV%~+`gz>k;?4aL!^?<uE(X}-ay3V#HD=7T8)w+NSGd^*^lxbHg}jaS5hd?b$rsC>wri$Y##sc zl~?@&fH5d%o40H`{Re436z!P(u5o|Rqt-r|u7T>;G26^1>Txmt*8-92P;joXdzu0A zF4cXK-cGNRo?o1<8$zDREJdgJHM7Dh5)XsT#1ySrIilM|Qg2Qt49zYQF!F-mX@oVW zsC|$#`2MGAHtiEb;D`pS0gd1Z%h05KlD2-r_#l#Po9bEU+5E*aC+C0@q+~-pY(wBi z6_`@S`zU>hJGbpGz$>@J>j6nUn)bYmife~Ue~; zc}h5S9{6@B9oP(K+~Zw-{OvQ%aBaz~IN=-Q@N_cYs$PAc&FqqM$&JJd#(;JMGIeJ^ zD@OOP1J#gXF$P>cf6n7mz5NeHhv{5D)7=v0LN_CL*w!f`l05MGgwij;@|tvs(q{X& zQ|#h`G9Te$hx~Me8cC#kHBarFSl8dUUIkD#2T38(QD+&TQ$6bY#L-#n+QkpjYiGJK z_YAW`IhI#2q}`0<=`jqhGEMxhvgdu0%X#7B45M)^>rdFs1TB5KW7>m10Ih_z@wT!xx6$8+F7N%>)V7=d`Rst{38pa7dI5W(&}X1W0;H+qse5XNU%b= z%or@g(<;m@KMHL|b7^?%v>;1&ob-m0nJ%!@OwTOo};dNakCT_4xD z#xv-|I)5O0=VJIW7b}iVt4~+r7vJw`CYis0jB>e)E>Tg%1j|Q}LUNMw`gvI2QHF7%h-EWTZqr_Z6T{XSgzgl0Ry;sJMnUBu-mhA0M&c4v2| zWMd}L@ATw?=A4_>>U6lqQ2t9g$#-c~FdDe5Ld$bZ*^T?a%2cDJN*f|S8x>mMAnwW$ zT&~m!B(=Cj?NuqDWbP9vkXTdsxFzrMa@r?hoQALl|AzXc(!j|Ba~aAjy{xf!BIHj96tEmmIX-UYnH1YvgLcUf%GzV{%69 zs+j5E{Y$9U{!&Ch&;YO($@cTNGAqusVa5ZhIyE^6Xs{cV5ksFPa#^`NRjWn_@l0ju z<29NDEbZlO6-d^I1i7`f>T@D*l$!qzwUd8H6 z_apc)d~@qv_WqnHv3f?sa7fWr=~dM(b8O z)MQ2&b!nc99w$>PCmMH5qy~dLutQgc!-W|GH@y0VysOS_n!ED}wZx8*k^Kpqf;tt% zFqHrU@z?9=5X$&mu5yCi=V3$T9|D9COnztQ5b;hb`md$%Iq_jj&K8GvDIY#0qy=#F z2wLZnvh6|iMV?S^4neESI*mk3Ez-^`$Hsq)s##I59FxBtz1F z{bEv6IhR$vO)4!5Cs~mE`oKgJ(DuF4^UE-@p{GJ{)s+>vVs?bMJ+?7$NH3p)!N z^`7e6ndCsVhG2#@XLg!o17V$n^zuYeohhkg%UK3!?t&f(-rwPbPXge71%c{JiRZ>d zx8q8u1``(?o2o2d@g-xrxNo&jo*3y>Ba~?_!U&0SN>6Cr7e0N z2r>UrIcVmnXprC1oR9YY^4URJz(jEvc8>XGOa)O!j3{GcvBkM3-k49Y-UR%kjN##? z`SKZ>Yv5aidTu68peatTs)xRLirM%C3ju_!e{SGCU_VeB7x+M4h-^@q9Lh9F||C=?4rH5CFOxi~<{_%IB;N|q;Qn1@g+u{`R z`kyEpki^!Wh-o$goQ>R5HkUAlxe-PJYM3J|UEknaJ7ui`UH^XbPK3VEdogu?}?R@U6UeW{K zZ#e(M8u*RZ{?uUOs3t)NhBIkg{q`@%VL)U6Ig{{uFZ+u2TwZ#%auUgW4zkl%js+O| zTH*SwNQHCaPiVW9pJ2E4IxNGZWpmY2t)ZTq7Nd~~(%kl%@TsNhI8_PVa>5+qshnA9 z2<$lX;+&>wVHXQEmeF}rP%|)2Yk)y~CKGuvgKBPJRl+XUVw{)|qe7|;2pK>nz+h?q zA1g`gZbyP+Vwssv3FTsJ2lL7a$T0ZYvi(3XwdftzR<|?%2>)lX$$O3a>7G}^JkcI! z`;n(A5rzW}`lCu9EXf!0TdB#@c;Y>cOk&3{oB#U=>Zwuc(KR7i>Ud;otlHxgEuO3E22*hxe*c5I*nt0ndLw>0 zE2{l%d4~lUr#ACBALB;W0}e(sAkql>M`k&HFvzz0&81sK_odjNy^=C4QF+*rlSjLq z&LJ~{aZiPgHtf89WaZzH)gtfY?5q}375o!yf|B0%kFV2Fv+0ot>F#_%c${C#zYz#I_hpb-j=oQQT960w9o`gHz5dv$1YsY2q&U*L~3S z>{nTDZ>S(f=jP*dFSK=vH5fEgn^YcGnjjUIk^0W~((2$jF$`MlviR-bF_=T}3;dDq zSB5|pz?9KtG_s_JjSbb`6zQnv_$f{IU01UJ*Uoa!GdQg8;BzmNmZhiTf>SHL(IxG< z>>`}6&h`E%CifbuRCL`EHv6%J>&YU56=y=?V)om0?($ho%enBK15hR>y!RE)TSWdJxk`si?D84Xkkyo&0z(>-OU#$NUy_= z-dQGyz`()O~EN~KGlxqk0ePilGYKk$^nC)dY3f77FjxFelCV&mHb{I3sd z4_x8`KOA7Z^iq6}LAZ;joDV1<$6LAn@b4p1oO%02@^}4Yn|=nr@tl7arOo(TpEeX> zKqlvFA@&Zb7cz5Rrkwy%uOw>r>}a@v`N{{k!&9J|eJ7kg69RshhBuyEs^3Axw7-$= z?izs#{&&N$Pu0uZpx@keBmbMQ%G2@X&AvfOdRTkl-!uAc?(Y)6}X(PcqG5E zYyCDiwMB`h@QbIduldLuxnt#*OYPg01KvLHTs_=0+GQBsO_VX@NM&4bT&fd?DaqNo zlVvpc{b-PcY$497_7~~9gy~$sL{cIwr0>OtI=Xn<{$F=yfWYN_OTJHGrHITdS+!>6 z#s{~oFFDkYU!j{93uZwSBnDy4zf#v_Llp07X*uXrL=hqJl}TQ~uUC`2ZOK=ZCV3mM zeruD~j-)T*8AbUoPDJ}V)eSm})YtD6r)=tg&bpc+1=~hgsCMm?>)nDdol>=qu(J~#r`1P3WUJsmW;%xDQWl3RZVSy5Mo@}U?l8c*wlXww*9Qi*mi~j=n7m3-)R_`m5(tzD6k?CZv?-Pr=ke$GGgNkx9$98 zTar}pm1-5b~0=ZN;=Xw$7vJiU__6PfX195dK zQxx_*s9*(!?Qwo8!b@SgvOlp>mo}qU`kjTS%plso22sw+wYUPa0zF7m#{2wwODi*P zK&5QcU+tH>aOr2lfE7Y27S|RyQ!f=;_oPV_9F{m#;$wh|=jfDFJH=#?!L@(bLM{MA zWT0aj7)3Ugn9%V)u~|FOSzL)671oIvSd^$`iHCY_ur&R#RTB!mMiZfp$U;6>N*-3% znrk`k`*~YoWGhaYI!TN_w&p^ ztB7c7{4$AC#7|WV9X{2mW_wAu9{Ypj{i zV$xJUG^?vH(QW3=6YG&KvNTM{_pfO@fqXPN5{gDjn);;l+V}4li9m(@@6R>Wf}oLK z+im*uZf5P92%N7B)qVJ;ucx!c{ivNTj{^}Q1^l`7K zdY=#Ca(yOx>fAb!;^<4-$@lU1I==8)j{gryt00ArfW}|5>(-J9muo~19I}RDF@^$h zMi>x;P@^?>E>3|D=?k&IxG^kL%D|$2L8Ut_Vpk`>zK=Psi?j*oLH`bQK+0~%KXXBd zYWg)jSwurU{r~q=;YIG~OBHuH)}qyDPW~%VJ!sQzG>(4y+3*sBZWRb;49KNFqKWu! z(9kOluN_sJ%KqqQE-&LnznpMl^e!X)Vd9FQ(NfDw!z=1XS#{mLTKSxdWitBhcgrOP0Tn4Vuurej3 zki~6?BTTG-=XP{!JSc4bGl49^E{(xJnROQ-XNoXi}WrnXUWqi?L z6q0@AmmEa&3%#ylyabSM>>)lB#0)LxNqi<0rVC7|-+~>6FF~hV8Cf<&*6es_Pt^wE zthhqEp4gM|B57Y_lTYPt^L5=8o0a@hLtFUXqSvJQj(+p5uc1GN=~wE%dfst98aI*l zK07^R!#Pxc#*ac&rb0s9_Isd)i7#@NHzEZmnN{23kU}vG+@?)GTtc2c)X&+D<0yAZRL~WJi-?9GP`#9pkZ_^a8F7E7 zZ;*9YG3|m~OAg9|^<4UDX2)q7iamamZ4gmPP7%IJI7E`St@Bh9Nm>BI}>8 zS9pZ!ppyp>6&jj1?2M6Z7C%b(9M5}MM^F_rqu6Nc<(WEnw;j?^YxZ4 zrJe@P;lUusPMvBhOk5-%T$Hg_LGSw+Sj{$@L85~ARsYGovaQ&HmbOV20h#t)dGUn5m`viRI;~IL(hIJ#Z7GY@D=z!5}U0jum!8{t!M)nztGen!2 zoRC6BkY*Wm2(nDKK=s_18gQq;h)<-@eLvv3*UAx?&Svy3^VKV6z~I-f*Cf&(0tFSI z={|v198jKThRtHqk6w9@xA+8j)KATw;Yn%1%y9jODkE`bS!(>jl>W-uS5ONqT6NC9 zT#j~i6n{1%iXaJx@_E40diJE03lvhF(0a3ij;aw*H zy)|VKt-4eZMc2}_(*(Iw+!JO&srK%H#ngg+p_rqSU;M7IlNS{qlB6P-=%XS-q>N^a{K< z#2MX)5HWTG{pt<|KLi=R$Qhl#07iiC|UuScBIuj2JsX|7n^ zsj{-rP8q%0O@7J639&-!A;y-ikB4j!Y^0v3s`hFboBo+CGX%u}=ei1}mA>bQomJaP zXU7P$m?i$QvO|ULX82gUgs)>^ZozMqMQR%)PVlzM2W%~;V_}ZT5`04C{t&+*%fA_} zn4^XKrs)c^EAaA)Gf^f~UKkpfDi#M=GU^#l zk7MbJ1-?KwJU^*kJicmxnof;3v^9cs`o`k3Sf1Vo2*oGivw`1EPO7N@v{g0HNvnJD z>JDKnUne75mz?F=HCoK`95u%OLqh9xbatYS-GBVTbU1=$&A>>6D8xg@kNVL5RWLlEIhuDwc2Jrf>t_Ap*7{DZcjYO?IMy>S29pZ#*KPu z@8`|HhJL6AQf$e4^BD=9IB~HU2QluB8Q(;vy0Wz)P*2L5=h?a&j)XH~ZUm~`t!t2X5erJqf{L>n|xqR zKu^thRqZGYwhCfiKxd=(mjiwhH8!F=3j2gtYP}G!W@MnKn$JSEn?>k0M%ArXukU)_ z*9I*=(H2wr-ZgBeHtuLGOsXt*daZwkT0d7T<%(nXyobQ7yK(?Ts0a~~sc04ag36Vsa_yxV2C1@w!=3aI+dQGK5<{cn2O$sbxvOX|08IZ*OJTI0SZh;@zhHQ+s= z=41>SBU%vj7fN{1tpe|CZsolhX|9-HrtS0-XS?VTu%7hr%D@1!urDN(oY0+4kOHr| zVsokD-T*s}I~y-jDq;e$^t>MU4yu84%aEdW*-S#j1H)BZZ<<}7a(8n`xghWN`Ssom zp`c0I#=?2=8AbQj#@=Xp{W>(SZWI=z*$3^qbtVDqIXmyRV6e}Y*^99JUg92Z3OYUC zIYFf9ZkBB(=XEcrc>5H*)%!ZXwUS$}q75;I>UVwx+5|+--$d`GHtaIjsMfb?Nc(l= zzM&8v&GLgB4(7NRYXMlieLODBS*}E4hrB^w?9Q;fehrQ#MlH5dfBH_;<~>U~Yn|_w z8}+&GsOT)QqR*r~voJ*b0Fw_4v0-b!i0)1S(buH!n^Hy2s)Dp>~9_-gsIBQ0iVSD0X& z`Tj^b?7VhKd%yM|b3J@6_A`f$D&Ydsw|WdVtbvieuv8qS`<(1^5Y~Qlv$ew4R(3jp{|aoHMs2 zTqzbcAL01!At%nMv!yae{UqiidYA*M1k$~K>i?i#Sd;!KS_4e!YtOVOR?II2kWTXFEEn zm7YcDk60p>SRsXq$LkAJEtd0D$o^E73nz^D+x*YF2vXnC#Xd~}fR*jk5yz=l3QXmN zXDjM9$k{G&r;=(##t$5W`Zx2wefBO$Jq5X%jZn zelQ5SRa{van21a#DE3~IG^IhK+U5AGxi8l8nuWbn z>GG&nfW1$O|H4Xbx~+5yXGP*&d4|xsk!qkzs@rke@3Lx&T z>=>m7`K(+z8Q{)=5kRWj4n%Xbi9t>DSB2OF=z}l2;N$d&H=TP!nVA+17UH3RG=9H4Gg@S4ZJdYg_Pws>!7F6yrW* zc-Mi^%}mYjgU$sNP`X~K0RGNAPSKI{1EWwUHzH2Nmm$(lkpCW@$eZY)ZLZ&CQZe2l z-)3e~I7vLRQV!|;QQB|%bG8keKq3Zwk|<8$6MtLx6!z|FMYqErSA0bP61mupA&VZs zXw?p1ayp!^2CQi*(tL5>=(PzM6wlfyoLl`P=Atd=9w)`r`{muY@if9Qxi504=WiHa z*x#17l||Iv*;bsPEESi<=$2*Wx`f@NwHv=I$L7!tk|@LoHndeyGRkOdX=c?}k3u>> z8OZm;8hLtr8u^`p!Q@*B-ChwaDHmWTfQ9}(lGPg5ET%^09_79aIvqN-(oBI^?fc_i zV#FH1_W5)DS5>2{{k`^4Ek>lZU6v!TP?<^&U3OEh+q#xmI$z`rVR_mJUP>JzSM*+H z4`|)wPA>nWfWhLmgTq6c_bRM+vviB(OOI(Fb{H;a`^d(ZV9Drr_Z6#V2C4Dd$meyeTz>z!XsO!w482yn4 zw?5_kw-kG!BJU`X<(*vRXG6oNUuFe*rf3~5x&OR=Oa8R{*JWk+uni_Tt(I`Ej`NU5($+cJMB_W*W3 z)QG2WJnZz!e9Pn@H&ZR9K^m&9$&^-si=vfvk}Rmz&lPE6K3m`eBRXx#;^K z*=6EdRVFACZVumH%S!9-GjAWh&tSV9K34lzWmc_dxOhTkZBMSr{dr-Yhblm6Hrm&> zmDXo559Y$Q4spbVSiIC<_!)V!c1+&IZi+vL6^{1to20+s@^zhScRef=0q~qLRzEs$ zD9NiWG`lRI9nIq^w5U?b+fJ&+8X1p&t*gxUdK(wBIJS}?>e%+9z{M8(S>0=?AK4i- ziQ*@RIAU%)+mb+6^~>S)laE`RLZQ3C9q6fbAtO>h1Gu(Mn^wdNBRWubG@gK?FQblm z<%M^0_L(IymPgl2vQsx*#QS=G60HrHL#wn%TQ_O9#1?EmbGCHd^?$8#smk2qrR#t% z8ocmx)#x@b;pZC!5(ZOTqs&guoL}ri8;LI%gyq=H{1qb6#;Y)a>Ja!)iTDtya6{?a6a<{N}_!> zZW%@8=5WZ)6~$Zl8hq(^wZ~X>3-nyk0n6aqdEitg33eCnJ4Dr=g;jlAF#xx7LW$Vj zyw95x1LTW~|4s1lNZejly<$4I30K=NpV~tE(H;ubtp$zc)Q$%MgSg6LNQ+!aa0($H zKlQ>x7F3Gd;9;KnVUe@?i+|`+TE?#j2FCXz99puDD{bW?pygNIuRh9utT>m!Y_zGW z(mE29MQKUgw&v+b%MCBNx9;xQV#s+(US0lwI498{8;NZuX3ZnfON#qdQuL|hcz*mL z(;*g+ts!ecBT=-qi_in*HzF*q%=HQU0h(a=avyvvatEhn0;ZbA({qLS#ga`G745^? zb)o;V5^cGNO6(@c-&E(*cfrIeENfJcEd#1P#aU{u16FaF0cDnTO_eqWqgMgDQ~o&; z&-A5&4&NO$JSIy4{9rF1pBdGt0;b~7MkBxd-YNnfT#gUsl!VKNC7l!enLi3d9+|h? zDl&+~KrrT_9J1PkDlrOQ>3S{Nx{gwn12$x%2kK>Ly})ZCp4vx}uNTeN`NN7P7Pd+& zKw#~VYKyA@A^*U=qGVevB)J9ahYnRsshiQJDmf;rH02-t;RAExIG(dohbaAf^;5A& zD#NOvcou~Z{ne73{mTCyJDmR-SNw+*nV&Zm$X%HRw%~O5x$kE`Tr;TJ`x%?te&ayo zW+reczK4~Ag*HFM#0uLU7ct-)e~~WzL*U{SOM*S!WL))OcP8pw4qv228{!gH3CIf!tLfMGs^6rOWzbMJbb8f{bua&Ac z?5NzY$TWp}(%dehx7CM-)kV7<1>X`&H+4&bDh=H<>gTR|*nT7ZFB8YG_qymnyk>Xx zfwJIvXL-KQjl^y~o3jbmI2dG(I??{D}0OcyIP!kZ|xPrp^C%IfrS1%97BF=d_&D z2d+h%P0Qg#D~a$5Mk|7ezw!lec5Tdod&GBZf9^l1a7>`&LMvBfKor5R0Vw#l4pMz@ zC!nV{z1=MquE)3;B#1W0b9O!3I7*q}F;E{DG4kvD?ZIsKjv>w*7DYf6q)FV8X!juY z^i+Xos-79Q%Udxnt5)#ctq3N$(~ekmy~Oa$+wkR&BX%~XHB2&i#Z1b+yh*Y8qpk)2 zaKBI2Yu4Mtw{9*2KMqCP9ruHu`GbVMckOgb{ape=Y<|a2b%Q4EPvI(PYkL-Kq{r!v zBD)4*6$}k*ql}X#E2`<`LYO*|V$0~BL<_zh2$0!vYurw)xKb6Y7F>`1=#B41 z=LCA6$7mi{>a6CtJw0q_Te8lsN^tEoS8mB>{%|~opyKd2F~57xR}KQss?W}xkj^Z0 z{P3DLNC}NZg#qd;IAF?O_Tiz92G@3Zt{no-53ldJtYg;ZGw|z&8Ey8&6O}3R@dACi zjBM08=nTazB2sww+TW_vS5hK*QFMyDxi$=$uUH}16qIjnKJ!kMkUrcx*A0uTF476` zIN|N9>_yrN6yq-SbNd`@cu+?1;0FtGc2sCx=C1}889K~|;*R#<#ppA3?*nN#hDl-Z z562=^d14@>J`;s?uSPi%j6d%wTt)wvj*E<3bUxY>-YyF}JLK8e&1@=619pt=+Sxe2 zVIrG>Kjc@7JUf;DxM=Zoye#y}VbS(n@6Mo$`g*-z4eKoz6MNy-wGep7TY`)m{*uVc zZQ^px2i=vl1%s+5!TdB+?0ow%(CoQ{3Zag z+rqND%jB44e>p=-^(s-8u2c?-!N2Ml5!(is^~8%FE@)noEi5V@M)$T`w5-|C7}sdJ z9B~^?CCz=IDv&Wyr_h6yRA}g$BiC^{@ZP_SuX+W+dI?(3!ehRT2%#lHE$3IHZ+7JT zj|o4aDMPiifiF^VfS>F?>I8-2W5mYEsq@Wqt(!hxmSe@8){UvDDJ$Pot|hl5^0q5T z<1r^@3zENut~@x=YcGdVMwdsDy+%r8wCU492KE>pmK=vp6sPR*hjPzC+r_$2*Zd-MAU?)RElo0?Iz&w@z!fs7fITmU)KSp@SpsobKbm2-oWiL_PHtxWr_^jdHrL=Uh7H9ksopPor4y}_4ad# z!KgVq8-{8x4VI2J!<+ng!@MXRJJY!RJrXr}-oKwHMwb+*X`+=~ysWP~Lf`uD?n6ga zno2DVsQ*JMZJn>VG2kQ&;V?JfpNT=yZ`9=Fa?py;a_hiz=jd7qum#_EmYD zx%}di&1?Z^qM2C`J9Lzp&EXzfd9mfD3N~#poW==iI(cb5wc4s;W^3A5>Z8!Df76?} z`cP|#&d?-bMwDZM2opyC|DASjVOAk0`N{SfRR)>J!JXur83LFCYPHf4((3Vcq56MF z;ogHn&K2D)yNgW*S?@RwIfrGF!f1|-#|>xph#UhxJr|z2eYwjWfam9kl)O~gXMAHM z&OVq{!eZz{k;u?AM>>5mmpJ{UW?H2*lIq61zkAHhil-|z6weqi^k@V)A0K#thZm=$a061PnQ|>;XS=L!UxA{L*sS~&G1)9xZpVRG6P6vVZQd}5zXpV zIP^5b!aM5^HLO3MkY4{9bC!sUZyN`;Cr1Hj`@j()Kai#07xCa2yoxxVp}-cp;V#1K zs~p!slCz5qT0M)WcVu|9#7m{&>Ghcd+DMP%OiIG>Iaj5VF$D4zCMmp*@^&jtgg2?F z?Wjq71gSxmPDC}oox8dvI|$xPLMQZ8Cy2pa$3l#{RTkDur&$n-`Oez2*WVQkJcjG6qtZ{i_;z4)aE}EYgpDQi`mUT&8 z;jA89Nm8h8M9XMB3rm1GJdC|}$V^`XmpgJdP7Y`8g>Ef_?3$o)u#|1#7gOk|*0kF! znys>)@Y}Ho;9M#einKBtnvC@F@AC6xf$e;#5vPL*E$pCFz_Z>o9X})_?Z}l~HM&Zw zNZ7x9?fJ8Blvkgb^G4{vUI+7@oA1Lf@e{hEn~17%G!A8C6{KWM6~^3{`P++y`_Gy- z>+Lub_to*3Guzhcg=hb;f6IxgP1mK61u@@64k#gA$tsGe#?l{arkZnqU@>9ruPdhL z&U{=Bgop-Z(0e34VKH)11T*u&Jn>QqkR}vmh*(O1i#hFg>#N*ikxtKL>RoZ;86d=} zZz~Rzpcw0FVWBP<3^c$TXUXl}F2c-<_xEVYkss&mIKXDJyQ8rlJlzz~LO7IY%w`6v?fL%;d#Wst4LWg758yd2NtOQ-O(+}#+YzWb$ z%-JwD-KD<~h|IdXkh8{Rn?SYPOmat-l+qirV|0PzYf74EW?LazU)46fNsP-+E8mnd42nNvtp$^fz@_I2a$XnUb+y(PJ z2=z`q_5j$CMF4xhU&1z+syw)*dl|BcE-ewJ8yM8V5A1@ms4jV}l#NC{XIN)c(X@&3 z8q47Fow0DZ(XlJbp!)rXz-`|9Seh0Gyg zvoQ3oE~d*`f5WI7>eDW}qs)` zKy^R79%*z{3cNBmB+<3U?&7TEoN2H$`n|)+q%{YQshedXm!j2$UFOB3T}E|}Wbqr> z=~G$5gXVDkK0br>uW$QJ>(N#-deXsFt`R9|2IYhbGr0yfrUj$rxn-v2_M^Hh6zNRr zetYz^?y9y5*d_i3MJ=3cuIaTI7x$r%cu#Xeo%aZe`#*;uv))a^0^w$EP!-?49Qsef!mW zHc8Hc=E}k?q3zH`HB8eI-E1_ZRHRKz%4E@BtI>BE=iik-E74{V$7H!VDWM~ec50ZS zaQ-NC1YB2qB>5gMDK!zLF|N*Ktd>;VQGsh>0C-E7`WEBIu0NVndzt600m7aIv(3IS zi0B}4%`QiyO-;>6>qND=NoC{Oy4S5}Waezy=oLrT*({TWD0Gg0KxLwf!5#B=qyi}3 zLDI{SeKv(@cx*OTSL4`sNFIy3$!Dw38cqc>RS6EbhHzVU(Uh!yCJIDgr|gi9p@_tm zHOr&pU?9(4Qc}x@zVT!ndtXt@oL3b5?5~R=V3DIyy62>yp~dU2>zE5YR0SPR+7LfV z^mKToq@1}OZbRD+W7jJ)Z!TQHkk3e>2kPnn-14o5wi1saYac>JkI>~ZH5a;@ex7eHZ%>4z|0KbjBmB#jIci&PwNiB<=PI}_M6l;( z!H&l^j+7QQAcD2jAZNA_|IOvB4-e5lE+!;@NiTwm)`Qo<^77FL;$$rZvq2q+o(T|2 z+fUA~s(RG)Pj&KGDEK!Zbz4-T9mtpr~;`44GI=YC}6^8lpjFBkfMNW7-8L*=VdS)ezco#@0U zyD7Y~<0CEG?kWLI7-++6bS)^c9lL+iE2=8%6HjX+Hs(NyMYi{Jt}IMAQ=a(5sbDmW zAy+UiAfS8serdZEZi<@+f0cT0SVLXr|-menXg(!|JVzIds28{ zIcZFLXytq-c6{YS9qA#%4BBG5t0$XTpo}hw54qhn5XED9tPlffW_+Ep;khw_s5nrd zq&DiaMWSc|M3qr*XPNW4cz{qU`8<9dOEH%fR4&4kYrq7fx@zXT*u7I9blz`cKj8iI9{=CK6Q%>Z>ViAL94>O=rF{nxvsP&PLH9{>UcSs+eI2<*AZ? z6pqaA&a8KA%RaBj=H0#&yZvp>b|n@=&CylY>>c8|ooyO!qpUgQ^ZM5yWkk# zh;E0aBo+1BcTZdU9r4F32sm8CUIR+lhc~o*cK+ya*Y26&?#l|*id|}N+g}Y%O)_u) zNWH^q*AZY`4oyNGf6W4gcZkj8pa}e_OWR7~J0{pYsy=;jR$wfLd~1X(+`hCilOoKn zGjDsGRA}`1J_w!F3pgZi2>p%&rVi#K(;}5dhk2n$lbv%o8EfJTniq5f8zwmbf*4Aj zQ0mRe<}6-KZsd>Qnd$r5rYai+<(9kDN5Zx2kvS`C!*TxJ9aml!3BBn8KhpL;hKEB? zgv-$|b(G(@N)4*Jr6Csj6axR5*~z*58;_{&iXs=s39$;ZVsW z2CfNQ$DU;QitgwNeXFUd`ZtQ&=NP6k6J%lE=@-cvzcz2ntY4NNnec;#^s|jw`_hYc zTfa|Xt(EE3D^WUR()5!@?n)4=pYiu(Kx^q4`CU49|5WZl%A$?{Gy|!HxR?8POuIDxOJ1GA(V@HVA-MRo{ zaRiW@IS=Xy9i+0e!>19Yk5pny(;ugQ46kpbxW(~mo+lo}Np*+3VQ^IS`DZf_ zVbMtqi^JwdK5Oy%NT7_!P%D_me&-jV~Xeb9s>fe4bS~0EMKkd5c}{g z)Veb5!(Q}&pJC1zET5DG9V*nv*X?R!A#o0U+rg5Ss~S;E+I}C#fw*GY6T}5$TvaTt z55c~IA(o80_-;q+-bPR=JmVhL35vSrXr`HUjz@3mjgS!@Jipbdxh)hp&r9W&E)gZY z;RI`Gb2X~rGWFU`W4g|J-K|flL*~Xf0cdecJ$Fb=s>M%CE^45nZiON$l z8V&oZ@4YpVKaCWz%r!ANS$wZ{w(CqIvreUo@?TTEb?^O-hg@5kbSMnNVKIBsZohmk z9llrlu@&%4mtFvuxIfoDMlSslbvYhF^;SVVd>Zb_mQ06p5nXV{J0FGq2tD171+LK0 zR!P-mVf>KzFuPN&S$6i${NH4yz-ugJ)k8O-Rd|D@a2LGKqzMlZ&_x&=j=JPod-!o1 zffn0km`ocT_yX_m*Ol&87O#)BzY%9JvO$l93?!>mHXDc1jKvxQ#iFWnLofELIiKCv zY#n};S0oOl{7ntY&3_W#lhlc!lY7pjtVVhfYWpr}sFQxs;finOrr>M9qgPhwG3s$_ zBoiywQyqnDNaFh`w5TVwq2N=)-5rUMyOKF5J$QSeYJY|IuUR#7?LY7ionv8%MPug8 zNu1zSg<92GX>vH2K%!5>^ucYF*~oSze}3`{8ye?6DHiphZql&YtNgN90pbFCZ2%)Jc7Z6-jF$FePj<-MSFMPCTU}w+%2Ko0W``4pe6E+lB^;U#OXk9>?_v351;Utpwb9Lz+Z)MYKJ?g#+H#m%Gp!;UOq*6P--K-E z)a-GTbd{1>FD;|mx+Pf2XFtg5H*E^kx9Y!ZC}~mcfNcai^J0m?elRIH8g_>!<5>pO z>Uc{EfNEFe*D38r_P4I~*i=C3E;7mt5>z$f!H-y3bD3j{VtGPu=8ZtnH%x?W`^bv; zM@T;&$$u_Cxs{x)U6=h#plWZLi2DX1NHi!}3s`n?F6WE`HB6;3D3-vpYfddDDcp z)den-%)dXt>1sAw6x`p1IbAS^kT=ROs+jkY#7pU|osdCIEJC+r$-&+eCv5*HkS zYqoV|kgbz6`vhSzPf+50wAB36dG2(*#1j*eq?{Vk zrAmJ~Y^0V3*!12!h9{%=Q0kOYEe!6T_H689#DJi=u6$AHZ6&^(>DAIKuDkiG4Ph|L z%~cRT-AJklPWaO_T1dh6_ErtoC<>q79H&L%V7B_|peX=Z8X1e$dX0yJqnS9WH{35Y zaG?PtZg;@agn3VCh%mrnpo@bK$j)#I{%m-{aQq(ja3qMbda8Qd8aa!?IHbQ(^cVEolqE0@M3ced=F0E8jDX>KDBqXw(ndRdl-~!oE$EAfR>|MUhfAiNXBSy3v04@kvHJ z9f0>OAFDQcxBbLqQ(zIdT2!Urp8N##n_7+VyOR2oo$@R26i7z14NdqD>E1)@GY*+w zC~?YS%=~39jamoEsVXEjbE(nr=R4LHGy6Bqq7PV&n}>)|dOrE!WJudZ;$1q++C)~; zb32IS(8p7qwJ>!z3ZL`42^qN~LRg|$ejlo&6yV=&qNtF?<)aCQf|+Hr2S$Xzhdsv* zEK)N<%lbTUYqVKag>3n;t=;;Cru^%KpGUs|4MLc5No@D=SLW;zuY%2j5S-qj3DaoH z-Fgj1Hfb9#)R3Zz)|O(ykjYM+bRKl0z5C7o!#pEnb9~Ykrh!g;_L44+gtpBTesL6l2GeT%9S0Bik)*WyL-Wjz_B%}lBbmyOE=r@uv%595XB!Ue2&fi=+Wefr1ucD z10k4yyfMhGI|`@8;J^)^0?2sX5#EC|OS#&uSgcOr5c73~{NW?%Zt9Xwb47?K3#R`Y z#*ARAF?HnRSv;=PcE@tzR!V0E@EnP2_kc!`qq00R+s+^j-CVp(VM>2myPrQerK0z?Ci7(fx4~t(X|Ygk zxIi}@X7->eY&)OeP0TIj@!J%0;7C4aR|K7PmmZG-56qb>E_4gB4HC(H8eFDo-WNen zVe@7ot!Mi!oy9wPJlosPq=YN-f&mz(bXV&H8)@BfRf^ZthW@4K}cLG%^`!RRG=?|pQm8zh40y%VB~=)Lz*#^{F8 zYxK@&qeSlnK@uY0F+yD#F&1lxgYt0r82OKC>IL zU5*ob{MA0>!D2|--O9PBlEb73#(&dLfD0%buNx%Kp*K^5TP41v*wMU z2B&n{vx6)_D(dKjm$mIuSCK^(v&R{^+m-NI)NIq)N)`*_63RW=7*F4h_9`Q=A1DXX z$@7=-IV}1bv+d_At+jBE_)EH_(wPu)!=k;F?gVm*_zw_u^uZI(mFbbtHtnV1!E(8cy4gq87j0^0NE}q9=e697 z)phfg5QSE3lsJ5^f6~>Q+Q}OSri6Q75}&Px*{An&(Y$d)VY9m zbH&s;^o3;8)lM~mxVK7b`$~;9`5&G_tMD z=@jD~nk?nt4dhYmQpmQWx6hJ(=}nwdS9T)z^y+i+oey+g(!;?z8N<@I^~?B5ahqlH zd|OcVHb#A$KGU;U9)VXjMZPzcGG|Dnp%Vg)Uk_q@bPB?Wo`@MVUSo?9lbL&KH@=*_ zB3M}uRCNdi2H%LKw-RAp@Oqd{S+DuKzPtlYRakX4s}j5q?!|}LjLUEL8_mcgn{K7= ze|;u(xi5T#@P1eMQg&zmV4jHl5JvZu^EIZ+Y%%CQ*@f8M{DY=qc4K`><>$KXDv~{y zp8Dr~jNUP}1AP;Q84->s`g+7zMRdJH%Mo6;u*V#)q6-V_dxKJxii*lVXjEu+^daL9 zc0tBkTpg=_OKpCQIPNPuXk78{8D)uI|EL`iKjbPj6QERNG~md&OqC zhu}O)p!QAg2q9VW1MA6PLfc zVU}@3a}$S|lbxV#H6V(He!hNXEVM6JpPG8S{D<-BLFwbkYs}L8@*lL5tDe62pfB^M z5fA%JDDTBxgLPr$ZeG+5DtE~;b1xi~#m{Lo;ze+$F4(~43q*r``Ow-4JNLD(k@r$n zK?o_?KVXJ6$gdC+#f`1=C;tAqWGc$z;C3|`YbL_lmt}c{F^331WpMHSP6^fV<5XUajiw-+XX%b{H*L3o<;A#A3Ig(^17n{vVR8I`o!Q zQ*UiQ(|lLbKsK53f^Ur)5e+EAyIE8~Rlh7hhtJzX!{nO+A4=;Gftxr|TLyye^I9(d zMBn)K4C~dmERyyzfAq2%&=qGXfg9bzBvIzZ&N9JoW)t!hcfQrNHkArF~ z7a5H}^XamoWl@q6=iI=(@!C0Q4rB3YJ_y&>6gYqpZ*ks8f-F@Y$5@jB`+TiO|e^lqF$lFaG6c)_Z_}GzCC(`yvIg&t9;K zHxr^DwpC4mD{BMGG|ash zHw7#a=FHWSQ@c%S!>SDt;Y2BD^RoTdPm_fq{j!QD#uFWRYHF0nFyrymVL=)lsqNvb zvAuMdFnwXqag>_owiWUdNIjj20Av;BdWF{-<+{;1uyOJ$&-d^xXURSN~hbsrNs>%D)$?B}6adf}lSM-qpTg(%Lu19#>j=n+T`4xHSkZ|Cr1V zC+Wis`%?5PZ#&@;8t`!0EA7`!0rRkS@>GQBJAFPt{{>sqJDY<<^)rxt zShnL9EqYge_7ESoPVtkdL@O6v}MT6hSwK+^&L(##s#%w z@)YAfi_~M;kS7O`9a<<}zM0>UpWEO`v06@!CvO&aY*htUc?_@WV#}QYure-Q+eyJj zzjRgAqC{@01X)<46XoQ7a=Uuv+YTF=F4OwtZ0MEnc7%>PE>iAtw1e~*50XdCMSU|k zS_q13IjCjqsBaq#4p+_Nh|Et$-)x{d2A4<{v0C`|T4^T%RsQl|%8YUiJWk-~uGEXS zH%5kzhjEj63*8FcqTY-A+{UfnKmRJ$$m40Le$A6PKk;0KY^qi=yiIStJn9|f{rG9J z{JfqA!T8*>c=Le+sr!h z$-FFNc9w_j#L&vr$nuO5m$u)29$@genu2!!K3IZMdd9TAlD|c2;$+1#yMxyet8%AW zF<~rv&Gx(+j}v7OY@NUNW9qH99tFw5QIw)*5kYYbhCvhn zD>Rf;%~+a1nZ(e-5V0!L8OV9{N#JF8w(;{}b(^jQ2md;O9C>zKG#H_Kh!LMxm@e^- zxf=q8-Lx-q{kj`=OKMXBbrakXh#I|2E@zatd^zBbj)_LNZg{LrqT7mZ^I$`(wGYcI z4)k{Md@OHf+Ionk+?x!DghM!#Ipv%I7rJb(UtMx(sEu}wE?p&jGx*x-=zT)f%}E|R zKN(Zzf2wB7AA1?cQqW16eokNgqtl}}wF7WMxMpZ`w*Gz*Vei*SH?GHKJ3yjILeg}lcf`0DTqbh{(u)J67e-%Tld zXn2DM_7&61N#nB=^B53#&yfZCG!pZNy7xA}dZzva6bP2I){*XT>Bg?eBtk=__-siSrfg_|ADE@wX_ULwl-_k;AvYACH zaAFVz+2>MEO@>s_k7JSOP0Rry2QdW^gt7q73UH0*hE z(dR2%q>FDcZ_S;~IBfBm&bALPaR|F@o?Jkc?TMuc!h#snY37C8(Pw@T@34v5DGF{> zkG($mo;4>i(z0g#&Gs8Lydf@qSodozIi6U2K&h5>WI(7-Q>&MIB~@p~Lt&nz|HiKo?Z5gb5>RZutd}#KmA~!-uGe3i$ z(B_!r3#~h3KS;NQ{ruJ4usflkfv65|Yp3$O_0RW^@)Zq-EG5bV$^uRx{^bTE=N4D{ zkGke(qQWlgtS>jv&>TO0*=tO3QQxj$xj?3BM@+u)x)AuVS-P>YM5&}6v;Dc}g{ezP zXhb>|BY!vu{SeI$@O!zP3P{?*g^G5CE~K%^0R84&uFYKnwAcL|zvzeZJ;QnVa)|Gv z8SC4F)qQEaEgymsfm(sw@XzB{dKp3@0JJEsL9o(`a05b}K=Y*+{0gNvUg^~Pd%L>Q;MJD18G-YVrhm6W9z8a5nwCTxj+?&^pr9b9(% z1wPq+v*IOeu8>QRaSEinR-#j+f5bFAviGuvx90Jm)r-Wl69X0AW2J?ws7)!JC@FVA z-}FLnobVj58TnjNnXv<|X}=`vbRp{yMf7XcH6bsXgg?eo4Rp&)b!RcLDr9y&M!s$> zXKZ=RUM{wos>;kpWNa4QM&o-(pvxL)AgZ{`uDd`2b!A+{kRnb$2a$qO)%80gX1rcO z4AgK2RNGFfZ#^jkBpPG(3UGqbkAIGvJ zz1f5o=a%-=6x9`Zg($b!_8=MW$W}f;{t}CpJ7n<~oyuxi%v*9f`ixw}DplHS?c%a% zsA0DM*z={^qE?=UGAJLn4fDSn_s#>Q1Q5`Mi}^*dyfHax_w}$1d}Qo=ry6rqBeF)| z{5Vak_AfBT^rGG9cl;z`ED(@sK)x_pQ*N*O1IriYRdR3CkDQLJIQ3pgInN5Mv@Z2l z%Iq>^-s>PG+&sjxrUnj6!Rm@W$`ycdPFgY~?Xi(#>R@nTgF?7xI&rD!t{77dW-ItB zg}EdN9OkAwUyfd?c0if`wBu-dp10RId3aHio>{^1tw}T@1)jK=iv6I+UscpI*sbk& z#q1ZyCwZreenGC|(YJNgSFxI_zUGchGjCF|{Uvy_4qZxDO#DGx^wbB59paF;gzmD5 zlegD!e;Dlq7>E!wfOBF zI_c-byFyb%jPGj4h$=mi?$3Z?n20vRI3nONHHvi$nP(Fe0*#})aY^#i7{AH|N`6uJ z%r16aU7>;P%!7~V7>4!08FWH_aS#>7B$DfN+mZf&cxEF~F1DgR9*w^4`TRm`ZOAZG z95M}~7vr3VsT9ae1h|Z8onlWrodj@my*~aG*JsZjuF&ME%&h^w5TjsJ=N!q!`1HDh zu&i3qOK8W;Y*wb?$s9ql*EQcH1!^(}rF$HBnK;?2Wz4d+RAX@uraL zDU(o0FZ{|9M^#H{D9=$sxg2(&annm?8jkv3UVEza)p0(9z`OoI`||zDjurwlafS($ z@nz*dmAJO?w&niypnx5#cyP*65Q-Qo`i1A-&x!o>L{dJKqpn;#8+kWlUIWAD^BgoU zbbsUR(e;~7Dcuyb7Mw(9JKV6iR3FT8=n&rvmZZ zbyDelUkcLH&F1^2p@p5g&0r0bN=x?c4YWL~dah{~!vzm#yQ zr(TrjE-3apsMU!W93`;K2F;UGW;N)b!onSE0yq`TA&^~h=JCovOK#AcRHh9*Pfv9e zuJs(P3Nq>y1Ig3$Fj-iV#Fu(|UMP*tz;Pf@uLiNm=RI$Yck=ZZ{p&BCPHqveYlOt} zA;;VDgGFR?;ufZ6Q`F(Pdka}nuf`I|hrC*S8YKr-+H2&x@B7ev4P#vJFuAXSVpYCwrA`i@INAT_qVi{o`{Qjqf|i%AX8pfq-YQ%B`~|(5_l=&F zzuITne%gC}{+4-T^x?L7;UU69g433}oTp(uI(B9);|=Da6hj4U!{;c)S;YRTMpP|q zX(0I~i?}shZCyd+I)BgIQBiZfMiv}5p=ruC;X&Y*{38t4dRX0mEyI;X{K@Ny8HuQJ zd9_CUuxNjKGu3Q?W2}(-OYFYh(o~jf&|wmD42`oG4jHz&9o6PkbMS&h=Er+x0KCi! z*bAJKs&tXremD@ZC9e(8S=ILU%0HGm`V88Vw=|UGn8AAv(y4|Jh zapVxj`!ck!2W$h@r)| z)8d}?%JW8U{L>f5{#MjYO-M%Rp^rI0Gx=-k{QUjnn|aa(8g*Uiw?qu=MJ~o=1%>`v zE{);iUenL8El1?_#S+RcvX@#*Y^WC!Po_@l;=>$Tj_=^NP{%ge9sj6u4h2Ok2=^OK zF@VipJP~Ik(szw*sdUjd!QPi(2*li4S)e`uiDI-J!Y}|q_5kr{ss-%U=>-$x=(x8@ z)zT5GCWY#{^K!2+`|gZXr8EZ;5QDtgC}*Gdo;d|JPxZSs2Lyf%zyfapYtnv<E_&*C4MhZ8AW1gb2ElNzvzPVew9TC_Yd?JT zzFe4)zY}SaWdX%S(7#d|SUhHZcBa%aQ04r5(bR&XXz_P9-5X0Lhu9@sjv0bS9hMuJ zRzC4t-P+OVb4dPgLbU2a&@E%+QHXR2zknZQfqNC3jH%8()M)8B3bA1BUI50 zM{s(c7m;*ae#xk6-u1tVKJP}HznuAKyqTrh#iixMr2v=~S+EKIuB^VemDOeR?7RT6 zg_)W`SLs1 z!q&3F3yR2aJmBHB7|*#%arPNu4%-q%IOeMv`RfqzBa~5$bNWK&+z=il>YCx zj*?@iHm5d$SN<#3C=-KcNS*K%{C6rmiGAs5@qXBr_jQK|^r4dDpFDCcM)@FeveU>K^88S*7O8hjPY6OnIG1!G z@oB1HX!en3B&B7jcZ=CGQ^38sUw7J5J7CHlRhQK4X#g{-Sgf7)D4s7!AjUC3$)N)( zwAJO*UY?=RkH-g#_%V2lTx6AZl#{mbqE_{c0suL5r;?7!uFYJndqF*Mn9wQudO^RZ z8lPF_*aD9qJ3`WH6KgcF{NUBFZ!O#F-ANnYALkbM#q|<}zo{h(9|`+uux|&dN*5Uy zqanq_r>-nt6Taxm8)M6**BmZUS4+5*ap$h-eN<-9*9zlzt{vS`hGI#91azOLTsNl8 zyad8zD~y2mLFyJ~7oDu$8efth2%r#wHi10ZH}p(R#h_3~e#l6~q2;GPs=ibK*2wi< z*r)Bu=gS^HM>7P&b!&ljgs&Ud<+Gove9!0#5{vEQpb5C0UoIvb#*}f1C?h#cfX2b? z*XOyR%X;Smc0Rnyw{52>q>}@+7ZNz1CoJ)hQ9?See?7G8NQQsxtC;A?^SokL?_BZT zACQxi^EJ#t7?BFdjTf@LDwMuaYiSQiqxX&r$#3h$HA#HP9Ny5!d$rB^CN)*;{L5wF z3-UqS>dlFFcOwUr%x~>_Ez*w`zGS3!E8hw`dafYZ-ux9JMX~Xy*>vw9lAA&eo_Vbp zG}rqmPZ?X&9DIW?%j13OH!L)dvEcPrjlv;LCVP4@O>?Ou-SB$MqNawG+~S!J`(vYA zuk_(IUGAdRY&h`?GX|^e61OQvex*;tnj4^Cj&h!+q8H(Wix@=A3|ii8%01eN77gtk zS&lElc-$y@V~(C0eX#MoIX}sa;~02rS<7TE<0?sk8Wk%*?1Xj&)vxQJ1;b|NP!H7> z?5h>aH9D?#%WVbN`-(6jU~`Pds!v9i@Ofr2Md0&302?}ZSd=T`U}rJ&rgNu`M|Bpj z6OanUMR1SeY}P(h%SYelaqu?2QEdgZw?RoP(HB$V_ry<0(H<5@Z|f>nt=9^lm2YC% z3(bq}ezmVG^?OGCM#r4}{r9*9-zn6*r+Y)haY#o`pXhH`FYGk1D*!oT$bD|fbC>K! zIpN&qC!`*o7iTqkZK2_cHa~0dls;A0?H}d9ql3|=_<-#kH|NwiK1xR^dRr~p;s5@` z{$s{#iYmw#*4~sCymrFrq)j)L#ED5xayh8?2605f~{&D!!ZUjm=%|F7%cZIH%|!;eQcd0wP@Ns zy0(PFyiGNDM7oc~aNP0K4G7gZhP50@XZ*9=3}av1{8eHlG{gcgRjkR}{oD%pZIIBh zR&zc_LbxduDK_;d+9dpkz0PEE7v6-ARt5)6K(4rND@sRDDn3ktj)F!_5IcDG+ht}M z@;>=GrUKu_@YB)z3x(eEMdmBRK%v?Nqqnz1J=~Ja{5{pHK7OjmG7)}PDd8e)^q145 zeD%cds;B=zvKTAh&abw}O_*~tX_seInS^Je&Z93z>{na#FNL9Fa-Zdmy{ezD zPjG4Km9>zKHt_Q=H&dz1^=$N+iURoaY3CYHrH>4b23*W!7jJHhG%VfBJb%*c3m7aB zXHo0K(6hTa*#q(RUSv@Q!=5IojmuDqdR^eBpq(~lR(De;ZOr=ymF*m4ZoHNTt;69ynQ@3!uBs43!ayk1Jqx>bYAqSGY(fT^%!@=v1e!KK}g8Ye{^ z8lpeAdjCu@fbJ_VQm6imKiN`e zdLB{3I7Rb2gUtQ%K5EdGf?3<-+kD)79hmu#dRs`ORpfTV@J1)v^~)XD_lWappIWNK zjBk6jr*$blJW2rzr<$$x*>w-2IxCBbLzq&zE!90IA(0)MZ(3{Z%6L<1X?o_P1Qwd| zK)YJ;%^AbV>Gwm_w_&d!*W%)2TzDHNJx|pW1eg|qq6qG_WMd+zUW!FeV;meu8i8s* zE1-kYwdU6Cnw z)cv^G-_;>cRl4fYQUDJfG%(Mjx0wv&JwO+Yf>*T*cdMn!EmiK988a=$^u!Z2b6tt%i0952;aNMn21YW;()%}5yBJ)bxt*AU# zRogqVrO`ik)M6aW$v8R*+k=OTHU1tpoO$h2#aTaXTJbiue|sk?gKu_nQPAuq?P4xNd!OQ|UVBeEKS;ezH0iPU zi5)9xNGp(byZL<%M;mHFZK9<_^_e-&*GRU_3M6T<%=@wn=yd6N4V}>O+1j48Ag=S! zO7xDZ6#=6<=;;ckjdqy!MRBfG3wzmxfayw7t=YN_!Qzp{L`mGxkY2^j4#1A*b}#mr zX&f3smFI+9hPSdCyOGU>T38_Z@~;5rvzhHHBrZLQcz=`Y|qYQE{Y z%k(q-llb2tsbG>??jn6WC9e812M>?dRv712EUBrF3r`MIDHOa8DN%C|gsmIsr&mRN zFotEGRtrs4%nt3GR@D;oG>QBY*qd^xuoxXhwGgMJjP}>~5m-RZM?*WKE1Q(G#u(iV z{@f+A0Cur!V9Pknv|j6mF7Fqpq`5p7sD7E5J@`ZsQVdI+U(-k0DfnupckcpN9IUZe zfE+HS>ITWrFhZxQYkq!D^m%m$2jopiOUH=pmKZXVs~2)9CmuQDl;z2p5D&F;0g=I zwG0V;H;e3eT@f*OE5@|?9o(R1ixE#fw!i9mfpljxgNdL7z9VuHiGI&5mDsxLJR*>75(YwQb4$!D1#h4t$ETk>d4WLF$>YTx-7h0 zMTP(tCH6}Nou(?+a=|z14v)@x<(VvFRJ9y*p(lqbswEs%7eZhUd=s;jUM|(hj12B7 zG(rNc^_q^3HJU#|o$8vMT)M|EjSeW0(NFgW9$`j2jZLO`Nab18YY10Uv|xOSnWv9Y zcASV1wM63dWV>w%bqs537CrCbz)GrT?SmnL?$RUQ=y}Jo>SU5<$TMh@mU3f;wB+0c zf%ws=8jHFY-Yr`HzR9^dicHAGBtQ3^t|t2 zh~tMR!3^HVpn(C(6zSv};g{o|2EkTJS#oN4F5)0h1Am~fxGNInx$mF$0pWaGGs0)SM~M7;!oKIP)$2swryD%-5mX@;zsOW zW||#0xB?4d!Fl?ouKJ|oZw>s@P(FRAP)1u0JxMiY90XIV5BA@o%90A#;%=}DNqPgy zvVh~o>#937&?xoRm0@An>~b7S1jHl5&XM`+)2KGFoNJwmB6;!8K739+0n zrxgR%{SOh2wGex!zWJXAyQ?UzY0Hj;09*Otfu#Xnl6BsT87zUQOYJiZ{6o78 zsydMgxCL0`#gwiaw;Dpyg#=B2^oP2Kb{He4Jyvn3HYk)V**Ba^(eeaxtS0hvsM>b! zA*#QMq)b`g!7SgMJ<%Kl!l@3*jc)W2S@rByY?QU{SmV_(XK3xEH#3`b;29xRAlGeS zk$0gx1_7}!SFS8OhALcXswwkhu+*O?d`jTdZ-o3JY#Ik`f#$oypRdd4NFiB!W=VNy zh$R z@^+4jsRjDAa1`pcLAOOrBrS1d6)X}`as2zIg*E!YzMO;(SN>Tfa3yu~*&Y|j!J$E5qqd=3sji(Rv-UY_<7KIuM{S*i7f9* zQprw_$<^24DaXc2MPFb2QNj6?ip$-9H+$5&Q5Gmv;@Q>%-psg9oDN=^2C41i14lga zU%mR``rlK|fJdAAvdvV8h{eCG#_3h*+Zub@0I#C24z8Ek%l@nc{Q3S;N!%%}t+*NQLcMBgquSg~N0mdw43%fJWtTiE~6a*7JZ&T7_uxbRo~^;it45 zmwHG`hwA+DX{lMv?%FMxZ>vIbZFxD+wg$Ge4>p&If3cgynbhIL^Oo8y^`peCFvah%bG4UQJ?616@RASY~7};c%HILTpm`jgxgqUrd*{_28rPel; zd$9b8&l3e{1cA1h1Lgz7$r!2}*Jwtc;w}Hq`~Aj$#Dhtcgdmq)7;6CXA*+;gPK9|M zR?hYF799HEb;78~vZc4UE1ozWZSVJLHB!_QM3BL(sXP9?Y6KE@i1Uz>yD>hZe*RFt?Y*aS*2hGC8>JQGT+fB-+C$e8#BOChY@;CL( zO-oyiMz{BIjIPgJ6WM#U=F)|KgZ=a!0|9goM>TnLWpno+Mq$+!>_F`Y5!&1s^>&UZ zUhZg!LLk@*Xk7E`=wD=iJ%~v9HuGjNb8a8mNMCvheH^0Rm5_KC)Kn zzqr1e4$~0m&CdXSv;5oY6{y}yu;gqdel4OKD9a8IGmPkeZO1IUxOLG6b+s9M79kIn z;Yu4eb<^IG%PP>Wl#?P6afbRGyh(Bb^A%8QWuLkVL0F22XfcSh`#Es?`Yc{i*F32$W%7CaNPxPLn=ubBTh1>(Q`BQ1mKWGz+DNKr_9hI(g zsoa?{=Va2)1d=z}GdG1uu&y-Av9q;|XM{%Lph+%_VryuF$aQK*+0yjJ zl@$cSD{^r`;bG$jsq#;nWAO5E?w5V+s;ssAiFl*L1APw%0SqE%NL#9EGgH8qfD6#_l&BljrQyJHv&3ill^m(h+w=paNYF(s)a>+nLTLJT22A;sI5) zuL%!l08jAWRC)iB@bA-zt+^Xf#keL+Rs4zm%P?xRKz$%!4Pq0d=*!H5l*UYJMsAVx zhi6~Il6>s@I@XJOVu>rI>2A0@&7A@43~r8a38D(2Wsro((82FYrZrwG*Ac-|K;zEY z*(K&8{Q!SFRXji3_|KO*DTe!5{bHSye?T3y9$R0jF#@GXM#W0cD{4DfHTykU zlzL>zv~c^mJd|V14H{79w`yXSNJ4bjeMhBdePzP7H)?)dx@tjwpR>#S_lZ1iS`?u? zh*TxyR%qis2g;ji?D7v9v4e?D$8z+Cub&}OIPX=(4i9SSOZ%eSdPjcs;1%=pZqQhL zDbMi7^Px=-)e*yK{g}YZV!~WBV)COs5`I!X&0zawq0;jpWx_VmD1Y5)O;H46Z&qX#GL_9^ac#t(}lp_ zH|V;5j0L0_TQ%I&X%#+FsoS&v?A(aDZ5CMOxJ9toD}2%T%qAH&tRng6*7P<>>v%0V zLgOSs*g3;KDaav&8)wPD)GX-dAxh>8s)jR@9vL^QL z;l=Qx_hF-d-dEnI9DR3;aZL#$xtJ{VM~P$i-^odDTYb`U#L=+s_GvlJ_1oXQYDltQ zKB!d@YAu@2tv$tHzSY*6{xEE_X+;`cG)muOAOm_9T-jo9e?6J^tgG8ZUtFJrP`jUF zFhe{&%2xHKqAyVw4MK?dTr-SvhC%l>kqb}FndC)g9{oO6D%lT14P>08L{Jsg>8k)z z0D@3XF5uSHW3q&kMRjstrS(Gfy_Kglxi9!9U$2SG%I?Ni*$YY|X{U5&>z7>u5sU{dec$h8+bx-^*%- zr2;IM4crk^0`Z{cruynnxW7ndk@lUS%zRxnY|Cmt_ANg{)m3g(ph$k^d<(1}YTijH zZ5WwSL5?>RCK6WZpT5A9kV^r~PXkP<}e&ON8P$CihZGYNRAQTECK_(%Mz+-g^ew9ajYxS6!&9 zUGMZj+1E}1#L}g8r$L#jii~7=aiTFw3jtBFe za%INXgvUa^HX?LXk83nGhL%t%yj=S&tfoX+^IIAY8Wvwf_A)@sU_a4zISfAFb?y9a zA`4GOM(ZqUGYCEZX_sy3H8>?miJMlK0jmzv5$1BJ9JfAkvG5gkg=dJ^`@6 zJeZB(f;M{locbVFhC0hd-gf@pp__{Fh{oqTv6}BvZ7k>s&2v7Xd2FQ@Tlqix20YeQ zc2iJ|{RTR?E{(nhHjpiNjD^}0+8^Q&6W*TVE4x>YkoX6Ut7E;f0y`Eq#*=Cl7B(KiLapXbn}w5{!C{C>X`aZ7cSz4z%Iw-Q^lKJHGTaiDt=rdz$C`zNu+a4eEfcgl53lbshGE^lZwm9yNHDKZl5EbA4pz;F0#rzBnRq%7FMZfjy^+L76!I2MMj_>+H3=F>GaQ&`w- zL?mA{7_W5%K&W?SAO5DuoL6lG^vR6g);5)+p}oqH+Ct-U-SzxnTL<8ZE?-Q2E%>ND zaYD ztnqyqXIjrMz%+6^sFW(GlR^S;UeOOI)ui-&KdTkhcWBr2`00vDw5bGw;|!k+H_ZpY zn^c_{(;Q|8$9*?WK2?7*94<@1atX>vCePOb5OGbH6u=~*$Vm6W+*;*k1q=99COu{e0n((;{gJwDr7rk z45TL^M&fIdpP>D#kMZ;eZ45i&gKwO*XtQqJ{)k69wLR>q=k&81L6&j;wMiR+#c>|s zn&&rXoM+Kt_Ff|ccPS@8o#QzuRSu9S_cKwM*@r_|?~t_di+M@zp#Dm*3pxq!Poy&*#-&q?!;uS_8v zRor0C@>QX=38ntHE%5YD;KyTkGZfsDQZ*=BHLP>Udto2V_6i_UjHKC55}Pr`*HX$5vl3n~sQdQ9)5?@P<%P8KpO&`Q-;l&6}#N zG>SfR&kIwBY(? zMtEAV3S@qCN5iwj)f=6r+Rkm|pdW+$WzIi4<;|UMU3CqA706S|!y}iUY>*KV|Km&E zMs@Ea?ccDs^GMs<#y0K=y-N02UYZjf!I`4K@e$hsqSW8PZBASvrHD5w#}mQV3Ohg| zguw1mtPAbRK-fx6{#7C;v(ei95K_a-OyRMD8}+_lM#G^?Gv=cJgSnia*f`mCCAL5A zbP(By(6^Gm0uoTxqY8|#R9&wp!1DCW;8+&N!@Vu*$%We>Hbo8^6Jb_TqT0rkQ+iJN z%c=JUPIt7D_YQ#$6W(5S<~oXe1AO1Y5Fh%aqBl7^e#x%0tQrO!OJA#RwmYbjW)n#S zJNP2R;}5$awk_77y3#F9^Ed`VbOVomEsp0bejmnQHQQRl=|7Z*SybP0#owc2Yo&!h z-)Bpi^1(NCzI8J1EPMA_XnVR#UgZY=e^*EU?1BQMCtI7qI+RK-!&9Wh>IK_@_QBO3_0x_$o$zn}poKpMcOAoGR`xP&*9HvxugrWn znZJv4oOWFOEs!bs8e!33pY&DpC{e-%v85CqjG4#oM#b|jqi4_afd zQ;4jl55?-&bcDbKjgzc1t%Er8M#k=u@VYndE#14z^N9EWTzxS{k79Y0vFZtrUd7Fp z+wQ|{)8bBvwg{`bqOt=}O;1ga8m$&>_ow2TNj|bchQGBW*66VIN3mLdPI!?2C5k6- zROipmb3c}M+hW=wx{$)s(Hx>W2~KYwnaA6eJIR4~{|lj*Wc+0P?p_Led70MdoI2Iz z)@%_(_OmpF-1q|Kp%aeESs;;9f}Zf~#F^BINfjKaNC*dQOtpv~+LsIR@#Y%T|DxWV>WwHe20dBGdEN+{rA}vB4uUM5OPan&+sG7Ar@Z5 zG9=%Y?P-f9xZM$9MQn1Bum$LIaN4o; z_Zo3co^rmj?>t=Nwd+!9Uh|?VCmz#Pu>{1}$=5kc=!K`HrG33Fz!$pUsheqPrTFYE zT-MU<>r}-R8e^xoS!N^uUTlOuW%c7scQx=q)A3Q`Y^Lc{=ZdN~M$^RVErWD?_^^HI z?5NiOuLF?-#2a_#_1QBov3rk7A59zk6xR@6&y`l)&sCgAMa6bL`9wUl?Wdl!{Rao8 z@eE0T29-78t48{6&%^U-%U<`ra-QecnOiJ^74N+D9MLQ{HGED&wbZVV5e~zKg+Py* z<9kJKp*13Ig$@%9HbB=s#F>w*@Y8^bd5oL+WL8^?VRSS_0V}P)QsG6RB7k=6V-Rd z(I^7?ZS-WO(0^qL3o8Fx6;yf5M83yZc#v>Qv(`rUJN{&wX43c6_}UTPbOm+T{eV8*BC)iY63IiK4v93;VI zRoG1p`a>Ql&&(>QuqNk89=C|YJkNUm9G*I`0>#^L4N9)38-kb+S8`y!q(U=9$+>v& znr7adsy6k`UE3Q9ovx7Oz~QqE$qnQr?tJc&4UPb)A#CT6P4HKsqP^e6LV(JXY*e8Z zo(em@x6Dqw>yzsH@#0gymV$J2fnKY?M$L|?4b+WBo#!ow8LRA0=9d zvKNGvx683g04wOS4^*tIy&m@btb1NV&Jf>PHCJkF^jfrk4Ck)Yj{*Bz3%+21pGD<1 zN<70Z!NpqEtT5MZMw9uHct71Na3HU+F?c&cP~^Quk-ueh;jY(P^;X|GYC+A!n!!xA zvTEkkC2-hg)mG-2T8x^Gk6+gZA+C~EMBaQ#?rrrsG(}X&S)o!xUA}H;9kcJN*b6Z& zS1}w=eqVoO_8jeC=4%)AxXRiIfdNFB0BQfkkQXiq(2?jWT?bPQEamKqDb$MoOEEJT+_*gl~b`}J0j&qbbTWEY{<%_>SV>7vo&3K;5+O1k6_$AjXvX!Ky6=IT1VDko8 zT+$$sOsR~`!qzYmI7eHfx%AZ9jCTP^GLAoOoW@ODb-{lj!ss6|+~ThYys})Wtuvfb zLiBfjYkKQw%;CH&EcqUo!Ii`58jksN2)p8PsBZQ<+%W@YSjm)A48Nw~ zCeXknR44ElBzaDamE+nW!qL6=%N%G#sc`e*kTo}@v}K{F%j9@LM2NUMC&g0ZbNK7q z1eia$e!|i^p3I3dqC{^#&WaW{-_bL26^-ES_X`=)6KYjad50sAIp5|62#+`;jHahh zr!`b_=;nns`QEE+7+goR9o&&kbBdB$^JPiO{D6FYT|bDai2iE%c>_g@s+-V+B)4G7;FL`9sM~O@Y5NK#a6{yjD1E7%9 z;%jpwnI8ZEQ##jL4aDxD)-gQSwyJ5u5*50$_#zKAOM^iUZhBUo2Q(=Vl^#=`|LmdX zs0tm?tkx>zJs_ITSIc0|;E{~sjHWeQ%IpgJAzB+YwC<`x^~`q$)vPC*US_vl@tjD( z#7UE{U3dPV3BX*0qT`0k2!u}e~ddxsNN?D{f`1YA}VOLOO}N?~b&PFI_l17rjJGPPm|*Gm7%B58_)|GP4MCl(xB73z{kA+V0YX^f z)@Hb77_;FIde>B$-;+!>cS!V;3kA52qa+RJd|s?4*ZK=^tyxA!h>&G2@RcEwmC*)N z1=ah}E9GvWid~030|tykm!mIhv`=O4ZS;&%aU+Dc8HJo^)pqdEyj9I2G^tFw{W#gT zEdeguW3vZXr)i_o{z|^xocM=Py9-X;X4AW(Fi`9&-xUUizBZR>9n37p9vqt6%6rL; z=?ID($f&Vf^0)qcZk94{<<=RNDG-@zGh1o5xha|m;mCFM%RK5i$>z>f=Wda?lpso| zUO%cIHqsl@ar-VG2Z{zd=;)3bs80GX5I{a?kA9)+U*OIc#k;FpBV2u4s z%@wLe3DT|>+XNk>Wo7;6TFZj|ymJ3rR#y9utW3gT#qN9BmkJX2u}yz&WPPNmPm7CI zl?{BjspFcU?w0plF)1wQ7tYbBc}y$5-&pFhS`!9cQ*Cr~HB%{0zSM`&EHYZrlY?z~ zZJ{icjaAC-ag~Fbgz2OB@uzJJLGteTPHO3yl=s5No=tok(ZXyCD`|uYvUS;lISN zk*oaf2Hm?lV}cU~*huU*lkbS%=BCiOU$lp+hMj5nshl+M)k)cimhdSNxGB>I`yPW@ z4f+lRA0P~EZL`Gw?g}5Dy;P4N=gjv1RehDL&kRV)Bb>ULZ~uh7rv3+y32l-!Lvz&s zM`y-E>&#h-=-`ua)|u2?&sU3o7{3Jry`0Uz-k?Fem{I6j=7p_B_N&=)DcMETfJW4- z$v6cic^!ziUX0EN?qC%&4lb2j@2~KA+Bq7CGDyWf-`pz6HL{IGI=v0JLosH6iYiU# zmg>cSiSA)eM6X@!D^NAa~#nEb#7b5>7vS966TP^=~O8Y!B^1}Vn|R5f#!LIPoJSyi|CRXVIZ3JJAL81TOklSa+QxnIbD7)=AXc3vbFdYx`$rtqp zTSp0Yi4;DE(w<+lf21uqJOnE>%)b7DkS9!^s9M;e?!&?gupS_~dr9&q_T6nY{+ed) zBjwazv)T{q2`tr_$Fz@$lUL>M!)R2TSI1q187$zFz#V`Xl8VZ`M5;?)kGrLrV?n23 zOQ#j^+FJ*orgouaJ^KO6g=X%sGdXRC+R9wf79f1c}Zraea2e9enX zb0#MQ%Z0oWP?>a>cavdTcVxIq@m8?WTDT9~CVBO$0UOjyT*Od%Uzj%Kq3J_Zp5Nj{ zICOk1)Tqb2!eo1mH27(nbWkn-qv^$0dj}T}=68K+$$>ds3|jGr6Lr@yXKY`QgN7yD z)N>PENyLLdJGabKa%!r*3~REf7i43K7S`k|#^9nNblPw;tl&wx{mq2dA0@J?&kpE^ zq&d^5TULD^C-FcR)95B5;4;ewS!X)4OtwONrzrt^;;IboAyZ{bjz{8cFImU>9UUb^q0Kx#poaGCBNY9_5P=q`JJ8(t3hc2 ztw>6*{hG^tpMEi4nTfT06Xh>wO7?>U8urJpPq622Y>SVZ(5?B+0yt5YBNnp%&Ds4J zW^kkU`rf1Z@s;M*1FYES)g|iSq;y5lcz3Ni&vbJhcx3Va z!@y~vKFaA=7L&Ok5R)_*?9n?U3YgQ3@Jam^u0WdH-1?1=MBZ12#n~Q(mp}WP*NyFv z$dd>dYZ|K9A6Tbe7i`QdfvB|s0{#@p4hFW{J$NUjh?;PJGhdG=pMBeZZumoTYv-4G zj_RbO012+OU^TWt6n$SDHZjA{cgYMNPvm6BDt)0x_T{K^%9iB8SVl<5$?>iMEbE>9 zfuH3VkM{m8cb`V&DgQ>W)GLt81DPF8fy!3^*~kR*6$uVq;A1fsQ3K0p+fdGajghW3 zatV}@Hiudzqx@y+~PwtTePyT9M_WIyR~sd>X7&Scn2Qb8OJ ztu_BJq77ApKXo2F1Od@1wWS_ATCt8h!IPL}(l9}a)V-v05@zjc=|Gi!L2qHANXyeR zLVH@TRQFcYJx6E7-dG$t2E@4(=fr@*I5N-eTPw?gQyVW-C-J}3R~$t!#kL7$=-#WP z9{a?zO1;l9B1de!}x{R}q{`?lkUnn?>hQV{2{n#7}%iKt4uH zn=#-#N!<2TtKLS8;n<)9XH4d8+eDju@T6|#+nfmvWLFZZ;{*=Y$#U1DpiUepq!8ykvX zZHk_@remsFs2n!O|9K%Ze3>yiZ2v6GhCoGk_oMDrbG$WLVGwO~lzMkvG{S1GpDL`cVSk)>;n(28ql?AdL~?{PX!@(FVS(10 zsfM|Ter>Q9AJQyw;r)OSWv}Eb&)H9@72_-z#XF*IspQ&J`ODRQ%ha!i;iUDwu8eYE zkG6d=mOY^|IU?9xg{=|^fmkUZEhQw8lT&8dud>_$b0I-?`pu)8(Dv(NEo65S3ghef z&|FepY|ef=;?S%DQ8SR8wOH12lvEA^okK!>K_M^L+Jrz3mLI-FSvcjXNWU(T%u(I> zl;w*pdq*Q3w%Veiw5`nWY zzk+Un>?-d7UTb35Rn&n@UI*7X zPFe`W@0pxfRO&a_Ez%AvB)t&xJ^MDG%<6MoNL7ndbVsVu!9)UdrD8b30a{smimbXJ za!N_Jz;x)vF9h$c>9s*6hsrwNNAr>SZS@ZL}hBOsIjmw#6k8|I*@ z11{B;Zzb5z9`j<3EGWA`qcxZ}jqHMt)K*bJBdO&>%7h!cu~&9Y+WF;PnfY^z#QfAe zCGN%}LAdkU@Qg3Xd6e)nEQ7&EX#}G;%JtgU}gFX)va`|CB1vpJ#y@v*3YAY-2l|swfS)PLLn2PCnK7f z?q2>!15jvBGw3fAS3Z->Vp6)<8ELUd^==Garx5w#1jFZCLl`R14$%WiuugevZmmX| zIeJ(NM~+4QNfLsJ-9=b;8NG{}jWbY!ay3;F0I&`UY5 z{lM*-=hEo}BG9)Lr@}4By$BJVZ^k_EWPGtD_z1o?rIvr z5V$1$WZM}eAmLLE6gJ@d6{F2|!!rUIUT1CN_BOAkOIIgN+yC6Eh)Pq3Ln>LoW z!iqLFN>|P44h9Kr%8u`r7bn1}5KlTMpXBsQhB4ei$Z}nqN;#N44f63?PA)b%1IzUp z&O;J@tJKj|8*iE0p5{ESgMIZJ7a6PMN)>bJC{Ho)JEd#=lS&K_VI;w5jgm;O*liOe zjjr-U;DL)oc-uQPgIQ*Wo%F9Pe%`|IKa95Xxq%_rTFL+I|BAr?A% z0G^5+pdtL2o`l(rgrugr^Jz02{@t&a4MN1Xb--euj3cHBaI$nR(2|Z2{ z7tj6fBUI3abO0X?$WTb~F8o~C`n5DecF_gilkiybsWPEG%z#fBfxm{9xaF#~8LXKy zv&z9cVk)8Mz;!r9y@*6~E;$SLN}l6Y3lOKNFaeX-Hk8Z7gZuHa>nW3fsC(QwdSAkpH!}4U&*wS=eDfx8odVq zkJ1;`_3Z3h(jwT)LQ6A9(-XleSoLun9@5Z96kg=VDz~8#&MzpC{ zcCE(8i;I*yZ{v2WcFN^sp9wdV0g9C!GD4EoOvHAqk$>o%eK_hgkyi|(srkKbd&drL zgPZSd6fd+fo}sZ9fioO_#v1Fd$%R19{2#d6$=qDd;>Fm1?LTm~eRwkFJEA2y;hz7d zrE%Exq$KA!q&zAT^|-H=+W-2Lz5BRUf@jgKC(7^Lp~o-9gUQk$^`_4@!lQJH&#%Er z#PaM@HqTg8yM^1NY!6AJ#Mf*PBcHSph~=iI%5G0Qak;+*`|R2iY$kNxNgH}}5MCUq z+pozwy0w#Jm{N2RJSio8royV?-YB!-Xv-ya|MMk=`uLCn{0v`sk0QT= zL4Aq+;pv=2=dCh})Jm0w;-&(-snYIRw(eTPU>xVqoM{bP8*yWM$Mfl67={Yt8L=wA zM3s9hLpLqDm2}04Z)GrxyX`rETgyU{w0s6*=;MU;(Dyd*Wb|dtA2!+~V8vYIakX4V zqs4pN=ZON!0koEL*B=d)nLA0W`19gnX}sSo-tD!1DB7iAURa&_(ZX(d=43N+bZQ>{h7>bzs1Q! z3lpvg?ZC43p@4Iv;(dJPHiAkkv@?@{N*b ziifcTO9ekQ2=6q@jXV3);xI13uT^F222gB=y_`t#fK0a&dhAxIxxxu$*%H3SlZa!k zF}r(PQ847#x@)+WHC@2Rxa_#-LiM+-u|x8FzE+lt8xh1^)PL)pIbH*oH1i8PNg;0x zj_+0jraTOrOK+#g_Gad2_t1W`VG|*s!=?|9jgA&J3mXk2eSv}Sd;eZd< z%Elb>{Bs*)AOb)}%?(pxcFm$Vw}tt$zJrz3C$2dZ637CEK}AzAR1G$cj+F@=lX27a-!sUlm~+Tms!`K#j} zib*vT2)=!J=*a!Ua6Q$G^1)u$t&(^249FLl(A@`?I^)leO~{uQL$ zx!K}UYveioHIYMJZeJSKceFO8(^HX3-7b(B7hi#2+GNU!xf3#;t(Hj2zlx*i)NI^9!vlG?2%w5pCz>7M}{fy1>G{|{ym0)B)SCq zY`XAuYQX5%!A4VfL;@X=_sTTs^bJr$r)2EuQ`=toL*tX&+2WX+hm0?)uoL?z0GtEV z9Kpdp#TFha^Ej#PU@*U?*JO0XTG-f^W}kihQ@p%fe(@P@xRP3~3Iv?a>zA?R7lVNd zH30KN@^xmP-}(KVsD^TMs#$V>QFy)$`PobhB8s!O7qxK^!@jQ1gnOjPHNd%?X7b_0Y$J>2C}L4o~wp7=&{1a!RWWs zb*^Zpm4e%N;*F_9ItGN0oU|3^*?g>dk_)II=wFq0#Pi*>rxeYMP|^(+xJ&OOHK@bMBB;*Xg>Hj4Fwsjd*2L;);C@S zWu;YSR9J1mPu5afnRQ8Td2nG8>G47P7^>Q?n4;A^@9cw$%&vGAi%qQCn80#{)H;7M%)e8aY%`pU9#B46kzJ40MB+8G~o@JvYs zc)g}KCLh7(fWftyr%Q31Yk1%|F@L0Ap|irKWzCN4CkM3#XFzqoN*)_v4qNpO+Rpi< z_Eyl?99?ZuwLhyZE>!UZbQB55DSMHMiT>iOJJ5>kTDCo~%Q`Z>(>g#N+Em4M47+a> zVl;tg?fa2BVyKpcF6-31%n2iCckiK8o00MBnjXG+_=963OoRX*t2uQ^Iy_M?+v+G#D%mbrJ zfOp?d5J$zp{3_}Mx{YZM50n^0MnjA!POxA{m3e=FnQ+s0P*mgLSe#DOU>B~bVpCg!S(Tnwu@7hsVMz~_ zHycE5)0e`@@|V%00XaF(AvTIqrC}`)V*BI!sWyp^59h;wvL>d4F>eU{uM zwoA$(-I_-ZD7xeavO?bTH_kUm55N+t`eIeDWKZzunCzc5Z1Z60Y^i}Uhh$$!##S(! z)alhC60^F+^!J^uzy|(rzPL*xhb8L(>BYspevu~&1a2P2Z{SErpsjMXClrqu2S%J4>IsvcX8r*S-pq#csm5xQROI~3X#89vAHV3 zh@zf(BA1D!7eQ7C_W0VbU7qxd=O0F~$EBllY(iDEaH+hxmJG_|QBuOR*M@Rr=??{K zdT%3NQIQXK|5CiofB3T_$Dj=T{zH>oH8VtMd7w-?t7KL(P_9h?!O)MEJxk620h04c`=KLY^lDMl%I@rHI(fIqMBmd9b z@Z}YAFb4PXY$#2<)Hb4(r{&Lc$3}+l$VZBKSD^Z%NrR$ON*VC`7)HPP6S#rET z?^_VM-X_?TtLgxr5px*6c-f)S`?Hm4=5v71{?pO++~S5;C-l0?p=tX+u7uj?67@O> zM~1QSyVdYQ%0K<(-t<{Pp&9p!Z2vIW+~{0>arNKVog9MoYFfs5;mLilHx3`$aT|hz z3u*X8{v_k$x4sTACORpY_#25fqjKxE7_4wJP8pQ>(_KPbI;|cZJdS90t7!Rg#t7 z)-1#`HM`DCt0G@Wnx~DL(Iri@jb7=^hyBCI>K?EXLkph{HS>!#@db?=Jl;n{(S^cW z7e*l-ZHR{nxZ_u~9D~c}_)dPSi$rmPi1W>yw@s&fsSF=9La?MASDM4xY@OBTAQ+;v z4laF)33fL2Qa8fc7M#+3O3EozRn^or_si}V%-8trY@8_E|WiibYaxr+cItatufw|sBkgjkXD`5;}T`f^XwGA~GS;V3$~ zttdg(Me9kFe{>A@hf!rTxWHFzf_cfASi4;&jCHtDo##t>2aCW)bj#jODHpce@y29s z$5B-+M5))sMcXq}^Rq?;W!M{?uWFHVA$|DK-D6@qH4O}j?qb)|9@RE`o81yGhMeqY z%f`~1^GaRi&V9O%MBtyORomZ^%qY!$4WD5dmV4_;zQkDHQNrB}G`4L-YnCi3|IsX$ zQDtO5i6Ma$jrNS?o*`?pUNbtii_{C3UTP8D>6OJVqmtjmdxVlGf$Dj1{foG3&3T=S z&HJ)|QOU#b;EFCF_22v8S|0mJhzPFB<~w+Tx&tiTJu>E{BeP}KM!nC+njD`_jeKS& zYN8~uv>%N7*EkO~+__-$4h_juJIk(2Ne(CERG#0_@v65T7)~AO=zjWH#QSMf)1-6?wpAVxj{8| zokb}6;xylA*f7j~`)HSWaznGII%UG6XP(2qZt`*78IqJ?+VNMZ2x%`N4qqhpaUtcd zasYc8nW$M;k{G~%GS5B~VpT>`yJwN6!k&^!wYm-G%r9P17!EnL4Rb$R)sx~Uzb73}2BY)z1mvMhB!WFC=38VZ5z)Zp=>{;#pQD1N3DBShZhN zKX7skX-VAF96kAnYrhEqH&_jLmt~WREMT2w{|fi3;yAtlEAP}-si<(!3pJY#cM_Y_`IBhV#4VbJe)4Vgz ztO7;LI4juU)+Eb2k3#&yRAVddemJ*0gXzH2e&S!Hu0x|qlU5s)AKNOcKpPfanjrM!98O5a(`TbAR5_bu`5p)# z{bgULr_>>Up`AnR7C4QXr?ft^84L2ovGOnOs!trs@e6`wA2xL4!OC7uFA$~$Dn?q@ zTN!BgudD2J?7)K9jEpI+<7eSJW8LYufWA?T`-$f=3e#zlA z{VisxFu$Vg5Ak!0?|6l|Io`MSHSgyuGVZ?S&|Vb+7?x&0S00EgEI4<5C%f`*h|yGi z_m3v)*lTo7MHwlm$LzjsvLw9$q}bp*vrhU`GwV8&eoQTZ-yr=-NZ=2{<tU_$a(yPCU{T4$z^)Hi;!{PdNTqfag`2nUCbGyAI3`Igq|Uk z`ms~Ce_o3(19AAmI2up{5YMZy-xK{6c$KimPteUo2XcDWg6?h76u1DFe;F~p8g>=H z7nK^+X^7xl)mq*pef;LOk$JQb6}s(LP0{xqq86ZSK0LY6$UA->D1>|Nf6zzY3b1Op zOqu}sJ&_k5TTeFzh1OHLoW~3=W$lKjqp>Gn5jrh`AD)%JF{x-_QzxB)h^Q!cZ@US)8sh$&;S&p`Lp!oirQu&t{+!%sPh2RT%0%*gc z&CB>yZHJ<{+AN<}({P?NR>8vRFtSgNR7__{e~!ks!xN#6QGe074srj(FOi6)Qll5M z3yTa$Rkt1SOzJjC+kQKUVc6d2q$sQ=p+=ppJelYEA*|jkFWWeK<~xX#$VQffu{ZIr zXGG{CCCqh5su{&Uta&BAFQ{Ik9e%F&8WvH+2=e&+ZO)#z47oz2bK+eQ@{T(tH{Uyg z;6RSkMtlXhy-b%*k#=*a_v3?0)U3a4e%nEuo@TY3=O}VSJAONYPU*XTvb2E~e)9{O zu{2`kND?j*k;Iw4rqE@e1LxDZqS}E^b|>&CEJVx1BrpxM;@pN?g=_>0AB_>9jk8bB z#DspA=-D0yVpQZGpvNEnip-Ht$j>$kAB=dIqY5X@Ft+{I-xGkfx|@$rrN4FJl;d4Q zpjkl7q6Pvo(x;r?Pyq0lFQbLh?12#13gr9D6Z=hVl7pMRUmNobGxZxWJ;4%pm5;h> zoR7D;x7a@(1f8FVnu_SX<9#>3!kNEulsB7CLul zx@hs$gsVGP_!3ujPc-R}rxwAhbtJ=&UotubeiT1~;?6%3!%xdcE9%IZayP4v6BUiE z98{(NR^JRKOc#iWU|u-6R9inds-_XXmCh7(I43Iau2Sx6JgZY8kfoQG|pHc}zHaWgfV9T?zko?L4@H1X;ye^E}PUbsPF>(LkVQ zUABXPhF}6Cj07%v3@&71rj@qZ>YIxf8nA4IOu6ri#BCl9B<|Wzr%SJ7JjZWle13au zl!AYDn`R1}T(6{e(tiJ?Qi&Kyz+nX&Mq6i8eO>DFz6}p;{ouO2TwF^!5LWLr*4Cdy zp)DTb#62WO{aqoQKePcWqnnUZB4(7P%J%)jB*t~?DZN!^w*q*m?w!i7gH>PcPwrhk zV0?|9K(5q*=N&4_3gcpmhB3N6&$)t=Uvro88&_q}1y9Apv|4HpOW{Xh5%ik|On6$2f zw{I+?tKTiLrQF}}bWEG-Pec0lck71T0+*w0v~RTr-I`j;;*VGHwgg1!AGeLkI^rsJ zhMeVzO{r%qiR8kmE}o1?)x-*Rp9JO3>F_QLV)796F7yI`L27c1*VU>V(p!#2EoQK+ zO0%GypPBg<2vf=`?^)*S0`;=OW*{e28RvBd)Zkfd5gw`Afah+OFD|mZ+0NhhXMT4$ zw4&jLLqmkhYxk83X209ogz;O$1?^+U`c3uH!~4-kxYr*7&lG8{H^ovUGDbE#l)P54 zat(p8syG3gVJh8k5XxFLbBhul&5H1-G^gm5S+hV+W0NnN=ah8;ioOA#ETw17%+)K} zrpj(I1*vadh=+WEKIUST;f@!ZHF`~?Dj-;#kb)I!>MD9E)afU>m@o6(Qf2NP4DNiB z?9Z@kM*>|cVNYyc7T~Gwgd~+$Ybp!dbWna=c+k7C*O-h&6bo$Ww9Rjq&J!9D;O_|m zhHB<+9+h1Z0uI(z&~F(RZgSwa#6uGUa$$^_QGA@d0@1qA{<0gxcijFrLdCyW@fwTp zO+O?Fwb}aJV4T?R9X2Md$5mX=J&H@$ym;L2_{7{ZTkYq_1n!od*RA_`#K~9~N7;*z z%|`we$b)Ke^taj(L86!P$56rr%dD9$BBCO~o?sPMuYhcVPLnOww(8AdF?Ab~&tmw3eO zpDUUWl}O!d_zKu$t(}34!L|kObV;~5UVh+YksAHk`cu(;aoSEwEiR~IbnXk9ZPu=a z6fcJ%4`lUl^VgXo;kyKAQr{4t654Ng^i&J-7UA)Nbdgk*2mAbZdBgM)S8tl*=JDaV z+@k^i!?fpL`A-$f^HxmV&$V|%?!71!<^EyZF;V`*h@4{kwA%cM2llO;PVukMkXz)d z@%Wp_3J{~33Z$X87+(ROS}gM%XYa*g<_Gx>ee{D#JdY9K ziGT~;EXqO7h+?z|qxJefj;>-jkP=X(TIVu%= z8f(^gC84Djl;f|H613yLenqua8lhukRIk<(58PF6qN>O*k+4} zpS*WF^fnoQu|*C zQg;%5)pq6Ap!e+YfE{aw>Wf#O^5;z7P`pEVqJHAGd$n=?AXhi*lHzvj;pr#5BR)!151Z~ggHcaXQxs5w{EsIk4|~4TN*El-7VUI8CrOQ) zMk;>Zn)Sd^2M%u|v&i)?X2{1vXr@?tgesh-@2?GzGdIR7<=;hYE^_Yn7%e&#Z#U#Z{^%(;eCFxHtYU9hUo zBtaDeH@s!2RK8@;eLTwwlD=0Z(`Ak_2)en_g?+g#{V4I?WLzAJKff; zP55hYMyh}>^?~0oi!#GC6!Sv&1>qeVegQF1wIhN{cVO}h_LgvT_ylvrVO zl+PKGXL0uvAYAxIXllQv&aSp_>hu%e1>w}e1JhW* zSY;52spuR8bNs&ksIAfj=lxVkR|Wr%+s-x{j^S}FiMtuR;{7Qw{YYO%Ky##|~AV`B;}3X6Cy&X6!(JAFo$Trh*VOyY12@aH(JQm}F72~dO`_$B$TU&~s-eOK z@l*k6t9J$SOG1%8R}}v+*5~iI$R|b2^T+I{uemx@cj!rFCBr}>49ZnJ2H_~@tci+) z-z;@@doC0XbJ(dGIKH~uLsqZY580`(g%}Fd{FFkrg z_PR#;J1od=2AeJRnctm(=x9c#i((5$EOd!wGL~y5EtnY6R3CGybaDy(Ep&-fuv~o@ zH|3#`FJiwa6t6Gh6Iw;ed`9b{1;HT|$q zKILz+EC)5Y#ThmJii?y?s^tWvpZz|kz1nr@770YImzpx;FZub&nL#-q-;FuwpHddA zqx5#LxKIUN1A^@At*h z>q+?DI*j=T{!Y88S*URv&P}pSEMY8w$Fg+L(!xep15VL&I*eb6#naz?VNemqmRn(oiZ#3-XEuPn^AKKb4lA}9}L zVLJK8Ax8mdk`jV*_Xligiaoq5gJg4?^Eb}JU2R%UFuSeMd~s~Y?g@=)!#k?>HY}N| z#|+F8?LQcW{-@UHt%bgZHV;d-hA=o(32bn3TDYtR@ec6!&Q!=z13@mcbkmC}Q%w!< zaCHPTNyU;rr`4Dybd=v@VAS@WJk{nzfUWFI%lz7&is1&LXGq}V8pAe1H=G{BruaUbRH`F`)q-mXkL@_ zad1ues^kaNETdehh9|->SS}e|Kk+`1#O>X-oiSA=?$V){PM(J9RO11bL-M|iBR4gQ zX1$~Y6Fk&p#r_^ZAMc?%?db@;oKY(A`hGmB$`d`trCidG6#!(@22S(zXo|95>Pr}w#B-zi?2dbF|dEzqv2m#Nj`+Ee%BvHlRK~E$e231mM z_J;?ne;8vMaapK)a7l2ed$K!z(-*w}f7}=b>F052BM$P%5}QcYOiK;9{pQ}8OZ-r8dvX`r(vLI`SwT{$V}SmM>NBIX7|b3P~gtCWZg0&UtRl_cpt{v3V`r zt*Axy#*Z<|yz3H4_YnmSiZXB3;RIY>O# z?#sf)mJ*_|UQzRDu-QJ2V57DqU3IcI-w4=hxbxpSOMwGcxed*K>ntyqd2cdFR;*3) zQW#i*=n{b2{UE|l0N}o@>Mf9R3Mc7U%gYBDXC!u5q{=erg*zGz@9VT~>akvMO>haV zh9zzFdh#~x)4|Cji#JKG8CPRcCxzb$&#HIjRy7{DYMv#nb~lOA5PHN?k*5^_fCd{J zBIhMfNLRuIGn3#EZG&CE^yc-j85&X_Js(z-@|4=+@zYi_tO0#&%^v33f zon2Y|*-jB}ij{2F^*j`bH$z4Z9LDKgw_7o7w>H=RY%&Tv$cuE7=$ zP>b6iUF&O*Hh63qX!b7s5xq~A?97t4!LcYFWY z_zu^WICS1LooB1#KJRJqiQ%M9Q7AojvIf?NCIR&^ulty>vtoav*VyYSUdx{pEb6d9 z0GvG6mDua*CC&I@6K{7X2|WwG5|-Y?er!Uy1@L%dXqQ}ASkptzp|9Sr5>4HKX@COW5qu#f~i4A1dvVKtq)-7B6{D8 zkV;i*oo@u(vrobLRV}uYrhBMyXb9CAd#^+@h&Kd5vZZ*Z)tUVPT_+OA?bLl z2k(xgF zZPg?QYqHxNR)Bny?L<1Ff;SP!$@viCdT`81|C`O+9n zdDrIQR{&;V{&U5~q_^KLTaGw$eh_J~^P-a4$$wkenN1L+eds6`t#T(#9x1#jmO{d6R}_ELv#qMngwN1VI~3{J_( zp$`GEQCu%rJ1xRWU&cTw9DR4zs~0hkXJ1%&m6o1rjNX=IEeD6>?_vjTzp$-}W8OK7 zedkz<1AORFr#A(WpE=9fdSfa4cq%Z#O-|mIkU8v4)>OW4hp?SuyyU2FdXWg9Zcr22$= z2ZJa^LZY>3Rv^9IXi`eP$HZP`XpuhZ@+U1)E42RnSz}OnN0rM`mdf+}f`)5vpO5hx z5ve%+T|N@AwAxd(%bpB{dr}iYxlc?yKMO5b9I8MyCmh*22VGpCW~wo44Q&_i4(}>= zs{BfdYSmRT3FjAT7RwI$Phj zCH9S#o^7(6VW)DctwWivIeCvC^GU-cFEQnP>NnaN6Jjw-tdEmA>~-5o!Q>+dp43L+ zI&W^j@i$vNa+nf=$!CE!kl1>Ud%ZnDlNANKnas6_LVEdo{;~QVrWaqx%i{NsiMi)n zsIR|0F5Yew@M2v5B&^_$=Akdw3^NQSe0^nxE=gQT82BVP?w=PQo!$hB z+)Sl_$Nhqfm-iZ4e9u%lCwiF*pA0aui>%4~J>;HVTJe_Lb6$N2YHqh~wuNZ`zEyZc zBsr(;cj%OFS_|Z7_MQ#w0QDRy3@b+pQ(LkTNAslJJ-v>i=>%ji1s^|s0sA}p`*7i<$B_PPrYjd$whJs|$OpvC z5YKrLODvA5{$h>cEM%=bi73-s_lTDL++tu2Tes-IYohzi!uz@YrAaR(^{e9Kio+F5Oadim4~W zE06_g_A_si=r*>LdCR8m(Ktjzl>bogsabqQ1^k7mGtGC+WTeMLI%YP-=wOZaIwdc# ze(wu0BE~0R>udO0^VahGv@uKxZ%{^OIfj}G{>dtfB|zrq{EDvv*lq$Xkfz@W+lgYY zM=x(mOw`RMn~1(<%?At_6U>O0<|C=6y{6NKShr^lbD*bsNcJtZx-KQr5yvWupPU^T zHI-a+uBTy!@-aYgYCJYG{nOv8f2K^jX8gj`EG2k^wkO>v=a&t%9qTC9Ucc237GO+(q_DeYWx+HE@_FWm6`nyQ0m;`1@Yx%c1w2RG_q zl{2yQ>B|+U!8!I}=*F!q<3B8lP^76bZWT0!vsT;a{}YA3TrDH&cH>^Zh1!F5Bb`3x zAZ${3lp9FJD-=$#YFK8z5fE2jf&U&wV^$*OV4H~%vJh(?1{C_nI@&oIiVy2+H@s=e zR?T})%&v(R0GV7V2D#-$dgh%g95fZi1FBN?P&T>VQdjI;G`Mm9|t=7d((DO(!>rX>2StFgiq?-TSd+M#|aUE*_B|W z{Pwz$Y+ZId5Qf~r{r(tanh1M6JqFqoxjzmo8K5x z&j1X1))UKz0vDhBhJDF*5qw@G_;AjclTIn`{#rQNQ?_CLgGmf47{+BOk*~^A^rVaQ zAQU7Qlk~Ou<;NN@7b>{?qR8NQg<7V5{v_>lAPVcpW--l{uVPze)ow5`Cy7?Xkfyk~+nc=7S-a_3-xG3?QWWKN<8z)!tfEdf+?c7t z3eysY5zFo9DcL@l|-%JDqL3Idq z_!E6Q>2-q(1gA^G9TcjT5Tu6*_H)z0vHGsi;^Jm^-?S&TMU136MmAfU7UC|Vtmxg! zw25gS6oV=)_lu*?P2g6p=`p8GU5QsBrQw4KYpVi!`G=9R0M7VTVTT88_c~*NqlOWy z4+mnuMf+jwzoW!qB6x89m(!vO-NZ(YF`@l@K1#6TunuW^B z&oECMr!s!P;V`a1m5mEZ{w4B7QV98i`IP>HZ28O5F>_QlF45$DGe*o{CNu}Pw1x=q>px`W$)^U!J&u?iDeS=O-o3=d>Mo)QI>y?*0l&;sm(-aEFO5|?#ia~i&LCj`Tl$lwm0>*J27*ty47K%}*zrxcOmx@3K zKxyx);Z1~+Y*L?_UPWKzc6`HB-R=LW{{0?NR&}G-7>Lp~_Sh<2qP^miMY1Zc$-94P z(L+tGu9bGt7>3eK25N;suqnPN>Nbs5fm%8fh-a)(!;_@Wgh>7ceF|!BV8R|(fXXR~ z^2htLwc};NH`i0#V?)T}W5kE5bIRe2mblr0ggy36zKGsLj&BtHHU8=d2*2;Yf9 zGFPxrvjf7HWNs*S_G6^4;Xm6F#>*-GVd)J1!y@#5D6C9AfRva`#bkvGxog;|z!tMV zyyZpkZ&h?x^EE^yC14}V2){qLq-^!2GG=^0zM*Y`XZ1VeZ~(<{9+@w$lC5xIj6Xv2 zUQZLMD@CSzu+6gap4R_9=`tSDy+rPR_XGJ^HIHx;TkLN%KVcX5ExDy4 ziX4U2Dvq`pGt^hHi$vr(5KBojrN4 zSOd~Z>{|UH?@a8WzcSFD_OK@-a!AVva1*_8aj(}A_ZFl5D5b#bKf=aVM26CCh1hH- zQ|XeTJ+|5oYf-_VaT)LJ8D($#xQ60&rEfvqyHma5X~@NP555Q<)kRTk(WURd<6a>r zpEwDnlYD4{m*WBcqBfZx5S)vG%1}0g>{Hxq!@O5wg8PYN|AJ2gQD4cHifCGb`6m% zZSZIrdD&9{OSGZ5v(J7#NMx8=KSN-cNcc$vq&Ie~Qe(0t-mOU7MDvyeejgu13(1k2 zzKm9=GF?He4Yeqs{%Coc4>(aSXon`}M5NLmx#XAwuFp$UcT6uCO3!$w*O~|1*aofo z*!sZPT%fL|#xrDmBLt?_}7#%?MS0e12ENJk2HBy@?`1f=wN))b7OAXCKcj;|1n4HJ-#A=zS( zFHZ@t7#vF|@)hSb!$oM;e#I)~PZxZ?ac`#Uv$az#&o}pJ0!i=#I;MNH>upWi|Ic?Q z`6d^WtujHWT3J+q5Stq4UtgZHRzC3P*wgMl;bwEir^aGuW7sdO{Pi8iO_2WF7NbBx zJEVOTx&`i^KddM&J_zm$<3pt9(yzH4mWP_cD@V(spz4|&T zmvmhxM?LedSOrr_1aVtaMn2NfWf^+fv)O|{V7LSve7nfI*DRLay$}u^IP- z1gzo1pV%EZ2o~zCIH7dhIMbW}n=sd_2KUMi+4_M?Pt~vA6?{hah2L zrc8f-t{6JF`he#ak+>{VKA**P6R`$PVn(C0@2wBzZ%?X&*Gu}7Pc%jnC`QDHoK;nw zuw7wzGF5ouAFl#4&rj4=o@BOsR^A&@z-Z7-ySG2ljiLf#Bb|LQGF?R3kRJmQ=hZGg zq9HKW{Y;OUw%5AdVoF1_IF2FHKt0zD{_}o)6VDF5aFc(e%+l_>MKPsKrwb#YHbFM+eGSN2f_%jf@I&jt(0c z6>zf8WUFZ5iKFpk*}l;T#)js6O&*B4j4*jK${bthEzXJ3%}2`o1p@THr*xKy>t)nS zR~Nryw7#AokfUF_*4+ipldl(xp1UM?yZ8Bx{Swoqt<|oXJImH$5tv_gGs;lmVV7kt zldw!ql-#bTwGqJkrParit3K)x`-M#MAC^F)%DnbX)z5s2_TUg$`askA#0d3C1tLCC zk1wEq<3umUy`?@ggUd8kY3jYd7ptC~R(`^2x^@E1mwm}S!0KPF9@Ih)-+@wMf8Ehe zcYUu`Ut{XzqXtsfO|E8710G&=`$q*E(iEFzc~TF4Y;KRaexdgQ-x5#`xUu-S;NA`+ zRJ23q9BYJQ*1O<^sea!Rbe@%ko6%xeHiRha+*A8VUUKh^y3}%p_yJBX7F>n_rMH^| zJ4kEF<79HOJ8j2a>sKDb&;L{o6eiZbt2>s6xsF+ojV;>mjFFBLc|Pc{euNOOqOwp6 znRNH!OFk3rk}wHbgMBd@J;nn5jjMhtxy%&CHsCfV!(yWy63}7eM#gAwBs=^Rw)@%P_37$rRdmEJg_+V=n5Ur-Q7vxihmgV zk$!xt30k(86T;(7oeb?uXiydBkNa-vek54?h$h=JD}BlLiFr4?gb3L6`>Mk=rX!Nn zSa!_eGKDl-sUy1#i9Wt5jk*@LCymttRB7bX(4e^s&#v! z>aTdDhLtShFgEyYdOK-p;;4k8knt@ z^^(vG#4lvk@$`-??S678OG@*`wUGt_$aL=wy)0gpzV#NyA#mg;CFqN8^;)!Pa&cXd zm<;zCU20mqM^Z-M!`n0;1z6;WD4 z_JVTOPCiI3@d*pSH#Wreh@x((c~Xqwc0BkagLbDWFCX$L(4;k~*B&FUDe7BLcpWg^;;haA*=t;IY&t`)1Kt~R>3dRCm#6ywtnS-F0w|cIacsJRAtnT1PGHz}%stf#K@R*L>kB?4r&-{?&fbLGTkU)Pm)piiU1+v)d ziAaQLut~kw@l2Oh&ztH|8+Eo+jVM86=mHO>)pucQd z7FbA`)flk@W`BkWGHBJ7pT)z^KXqx&8}I;;1?kw-faH`#ve+1Xlq~~HYKC%yN*xsRs`N)Jn$dw5 z5F19S+nS$MDI1rT`xLx1LtHT(Tl|Cr!aL!~wCi+CjiUE|TAa`qbA4#j1x=L!hxw>n zuDVF{Jt{IWcWm2uT~}%fQzRB@Tmxx}Felgw{OZk~*!wkNTGmX_45jnNbRi`E!-`=b zkb{25KoTIWN&#y=RPAw35$z2PZg0v?%O_4ay=oZ$U}7?yLPLuaw1Ja{kJd^j9i-L4 zttkB~N5KOI2bt#q`zmQEf0iMx8)sQNuDaAPn}SV~C<&d%tTLrsr+Z|*S-EGL|IRf!T12%j9Y8Xzt2|N*=eG#aZ*29=Y#_4^cr18xt`RB`!u%#vyR9(Y>`vm z*zv`75y6}Efl{awfi9b7Bvfx#oa9WKG&E{&hlRio)qK3BS=kAsj!V6A zO%;nu+Al`d!d@OZwFp1=!eZleeNXXpgBd2m z=vzWJHGaWLcQ`yzTaWBosHK``eo;*-r_t!Er#H@8PM_cw|Fx&uer^Uvs~FLENU-Xw z=CAiUhUc57Q0*mua3Nx7Udyk!)vft}$ml$mfXJ++&jZ{ZYXXntx(|i_H%lrJb}O*^%{r9~`*>DZPJmJUJ9#loVDf_0sxz2 zUzDvIbdK>a!3kLUu|v=H0ERg4DcQ1rXZ>Hq`M9CEIiQStaSgNXxgolZ5*u=FSr*Io z&G(%c7x*(n-fxV*0^4fBc@_fBX6InW>Aa|@#;);P6dWtqx=1BRKnsl<&rLc@vyv;$ zZFuEv-bWRLU8X;hOJ7xi$U#X(o`%k1Lxlrn-C7ocUguW8K3l@6z~*AnOq|rRo_6nn zUHGu>iO~+fA)29{hApwdeTGjIl)J90M=2!hG+M3@AG`nUa(-1dxP=DQI*!VI?3R?+ z$E*Dj9|27Kr1JjR_ecMa%bC(8;FJxUJ7HAK_HiHz!HL~J@?JqM28>t3WZz_tmsVbs zZMJiMX|Z}Yv^S_k3Qg^0;b3aUk@77cs;X>RG({T=l8ch&>+R4RLESW*4<)epu;{V4 zgJr}6g*jMeV};UoiB(cwzExH8O3EFAE`nx5o+IM_5JT|n4(#-rTN<{w2D{#&(7#`? z^Bh7X`Zeam+~fj6`%)d7mX0b78NC)C-``7_66wx7^JHG{?C5S?n!h-M`ccV)r@i%I zUJgg_VOXRTZ9u;x8onX!_7h;~x^hC>*rGEvKT%-wj`x#J`H(9W5!+ZI(&zd6W5PxF z8uID?_?#bZq}BJSF+OLQRi}^GEFhwmo}8QhNRypoQQd>_^JEGVr`CjNJmnQ-Yh^0$ zyeWKW*Hhsk6R2%3u41Z-lwo=&PYvqJ3nqR2=9N@;O9lln-$2A=_K5yZf?H1KGkn1* zU=yQ&SVs7|mXDtmrfIoptJE-w~_dWfgvH<+OG z;&1lE$hz};b=;{~yD%7WafDrNctM^yHxmZy_VB$^cBbD_-(4x_nz5C6^$yVDERtlR2g{{4!VGA<$GzQnMs6F>rG-MXXBC z3`x-;^kr{kNVO04oTr)Ji6sBOeNVgp_?{*h-}CtY_B}O{2$hMa)&-^<49PqjOQEnk z(Wjr>axlY-e>f?cXNdJ`WP3FdH)gp(pXIApUQ;z)vONmiE1g4&IfdNr%6S1^DB)N2 zVcFn_elH)W*RHsWu3TSEa?K^}qy&aKeCAQZhi^EzLf-#B&ExOdjn|9~$Fx`sJsr`U zt;TEpO_jk1<4u~ooZ5LJgkZ{)Fk`7oWxq{30g<~f6}1zjuqw||Im<3flY!G5a7-AA>78+f@-&C&cCpo0w^Wx<$s@|K6ldSQ zb%d}$*@x*!7W?m5+(5%<(UZJC<2>ynx@E^0%AQT4jcuj4H~i(h#Qk?5nAW_fIrxkc zp7^%eV3gl~y0Jf)(gTVQWi>r^6BI5~Z07n<)>5qM*~45BHhuE^hu-~{2H{YDPD_z zvU8#wU{}~IK6hWqvb~*vJ`Az_?qMp@zSLoNRMYqJYs}gh&Wc{Y%FrHUW{Mtr|LdF= z>iI#}wW$zWfhydN6sKeuJ*t6&L(T9H%kyI5fx`|%`*%p+;wD_jYRCC|%Pr5WPUcKU z#ZQM>OiK(%T|M(*t-oK5L5O7*3)1;@txP)QKXI7UqUNii{0&LVY?bHmjw%W95{Yz+ z+!zk;qp%t?0Z-{#e;zli)pTfTiJmM!El>>^pRJoM?7xgcbXpKgp!jeSIQ^P&u%#|~ z$`r}}gFP!cJd<}A&obSrc>Owx=X!TP@ap#}@ps?y94v`}M<1In)>bBOJpLwFlzCC< zR4o@l<_H{8Q7>{!MCiAA{KDrSJxrO}ALo^ot>6-k)D^!xK8@pD-Pe$MlQ^yUYj*nRkyMU5 zl;?C_ibo+ITjMzeP1oNUoM}w=DaCd>u&?hz++WP5p$|DaNx=Vv^u4Wc3aRIu>YO1) zGMpmbd_f^eRc5BYf*UAF5p}ctrPs}>-DV4D)srfm|6!tUlr*4n``c*E;+$6M@hUbrQGo$ExymBo4>p5!C zn;Ge=D4xDT2A{?&GYDU8ObtIlR+k7kt#)o+%FGg?mvgPjail25k$@9yI#@6^>Ym+n z4k86Opu_1dR1eIKguY<*_F9+iP?%wRp=dhIuH?o|rW{%Z7z#>yU}r!`h%GO|jQQln zGyQh8$*!$m16gIDr6u#XtbBiH>PIOf(Cd5!haw`(_njq@4pR3;><;3(dH=9{{lvXg zVc(_s$|x$AXkc5SdPXkvl)^^5BOt{6 zxCCZVE&#|Rwq008e3fbbwwAWeyFLU>Zi^HuW>FSzAXSpZXZX1O#m~&m%J1$UmQ9^K zNGw6U5A`FE-!#wqBo7oYL8OUS<62It{JDnXxi1#zpiNi8DW(8ZC0mS1xh+z&`#dB}*YVXC#WP&vY9Ej>!txBp1DslGOblJO5XAxLdRA1& z4(%iRipMn%(sDtpJP)h229$;|8<5TW0H1pDz+-DnMTcqCo{g5E;uN7yRbU=*mP@tk zMlbe&&(9>^^PJze7IRvYr;bu7JxW@(F0!i9nl}}LZLJ#?BU!+Z?fb3P(xN#~qfyvRw)j%#R`UJd) z#!(2r&Xz|isA^1+T#E`jfX5TIQ6=dYH=#>CvH zzuZxLC%~IyJz^CP55Z1iF7`>L@8f=VaYOvwg*z*VK>BpWs8+aQxvf?%g_FYjjNTVp z`GiM)ucoz@Yj2uO_lBqOG3_sc6OLUW<55AE4NWK=Ztk>$UTM3>_8x4UKb7$ilhcH^ zt^w@`@l=R5?125F%3s+8$xi+192lf0E}W*%DGz_JJ6M&OJqM<#s664q4e!_b&Vlvt zsNq)EA=jkD)2d^tOi*WcH=C;0jSVJ16x1|%WT5m9%b>)V)R*2L!{m>@*j~6q)KH9S zkMF!CX&eZgO0DSgirWX=Tz%E_7O0vx7nolkpD*M4wLPIeYdsAb1 zt9E(1tGY>CU^{X>tqWxD?!5{mRS{2Ie{&91k?_Lx|IUE;CF!>U^~1~uDX@^P*dj$6 zuN5K~YTo-kQd*Uaq0k6mHh&{sWSE=&9jL&1=e}9mZx~FgXd8Sjv?Fx_@sw=0XV18? zY?+l(gaNo8WKBQ)T2w+DMdcbTaeH8;mF6Ei7Cu7X|kokoyCxLg}?XZCKf z)X;*q?8Wy3ox)*13nvmfBk%kD*D5X9_3bC- z&>29TMe2*v&*A|TlwA^%Uo5Z~9X|9;IPjErxsn|>4OMqji zS}Cr?=NgM06F#}5GD+DQU*ji~9rBP48Z>Vnr$+;yw=E>i`dXF#uym5~IW56*!IH=k z@x;->ygJuhK2Vhn2O0bDZBPXWwA>$;ly;?uBgNAQL`1Mo{k6y`%lBZVf3KE^&0hb4 z&6H`eZa76(IkRvP=#3@1x&5s2`14G|!fnF!bpcXjVWh3=TI>g+ zng^v>%g$~Gj&|*1j*U@lz2bVXwmx#sFI|%iMnRCusw8DqW1A=`8LN_#9wG8%a(X;= zj!o~*wQTu)am4sZK)o5_SHa>D@!Pf^$z_?IsHAqxBM%N;12HEcM}1d68#;x1d8jt!H#mowp%D{LX9WYvnODRBw7*}OA(wtD@k!wO3`b5E?@hXNPb}?44tv1%C zS@MKLX00b8j4XsNU&r<5Pw@3|+Ppc$?!)h(p!ubxg_8LgJA#3`%g4z6q`Jn@;DU zdTrK;Zrl7#GH1V6mhH0HmMLOI5{+^!KDxnAQc$OiBhHrm)owR=v#a-&$897Rsr)8D zu^RE7Lcjz}j-()G|IQD=qSqN&|3SFt)39WT*!*UlyqVESh|L9^b4@{8Bq4je`b2(L zDY2IBIpqkowvS89T`#=XsX!4(5ot(7otL1uC+hKJlI0-yNxeW;e7&7!r^$jL9Cs%n zpEo=F8A=+F>}7h5Hixk#-(P5!aF!6^NyO$9lL)<*FUdY^O)b)1sU99pW*-TC(f3Nl zn}AS%j@Iy(4ymw@J;eV8kdx?P$TJ_WI6YPFtjVgHW<7`$FwoJ@)5KVLjb&u$*u=l*oukhA*yh_ofkFjS%yOM8qRJcF~i6NKvFNAMldoXYE1}#-hsOPn;3Sg%3;2CC&zn>Zhfh4k=ITQ0p&*fYZ2GgZ z;+E;9vD;)`p;^a;GMON^r=r9Xe-s+W{2lhRK`QKxRq*nV0#r_<7Fm0(+&kE?-L`?( zhm`l}tj6lcfMcV6Um~I_U+O@gUUA~Tws%Hl`sFPb5U@5s;x1UN9oSD|+WJz}Ry7tq zNNYs^12D69x$VP?BT9g)S&5jfF5TC~sCHeShHjM6jFryr$oJNk%<@6GH-iqowq zpFh&~7nnXl?Q9s7w7;Bk_T6r0)D%oA<6w+d`Y^WL)6S zww`wJ^M+6zXf#>eAY{u*BA{|=f3$guR3PoEzuLl_^@5e}3kLMd)h4UkZh;a+F|LKZ zgid&Bm`j@%-N)S0U2U-$ip)EdCaAe9cki@j|I%_Gb|=b+g+P@B5lLtW)|tci`G0D2OciSHqd7q?BBfgEO)JqT zg4e}~I&Z^c-&@8wnW-cAEtbt|_I%Xnioa=G>WIy2lbXe(M?~pFxM3;=On4Q)spdN9ILf{tj-;#qx1&CE5bAf*01{&eaxbru=;-3;T*3oDh z9JkA+;nt!9uTV>nM804DVvr8}?Rx2O0~)mpN0=i0z$LE`{ku_SYS3eE^4s4I9V(FF zo2rlsC{DX|Y&ZR#GwMdr+bfSN>v{d9UQ|v)kw*02R}Db!Bvh~GJ*H#A-N`F#qZKYQ z@O|{LMpMI&rYC80Uef}X9z7WwqXUkEiwxR>TrTBFDd_UQkg57IfstrPE8DsVXGr>Z z0!dohmzAm%}Hmjx7D@y8Df}~HQ-z6SIa%V&$8p$8A zIjSrw5e}>)c{Ivq+<^@~13%x^CFPtktL+LN>$ld;ajacxq9(fm0rlCD`8F&E5_gqd|h4O zNZp`^1@T(Vq2J)ZnbVVWFjSS!*TC8#KUS1r31GaeaXN zaj#2m`*T|JRG}+ii1kM~zV-WcO%mkJD8((mF`ZEnP3JhCLFdU#aBc+u2{M zvd5zrW8lL>8~5Bnovu-|kc=5wYNBtQwkL^Yr0{pzQ_HTp-Tk%;;o@k+?RZVFZ9o5NBLcIpnXsyH|NQ~`tnaLqAXVk zy}o50Wq5?L-unLU@3KHmI^C3biS9CG^7>+im_66$3g{v8{{44`A6}e)G$#Zc%VA@4 zT~Mz{16)(N-ZbJ36pvfK-;q$swRat=N%Trq;1L}+SHMg-?!y9Wj>cePSxxgsb}wLW zR$Q6+B2dj%vUmo+xi)R4!1$>;=i}EottLE4&LqpsqL1arpgI#3i;u#nrrXGY9DU|dXgnM zYwIabegcExG%V_Ovnm`XIA-8Wp&hd3u1NoJx&Z{1^E!Qi|4+Bj9wQlj+o1)o;(=c- z>*U0F9g70@4fKtR(5_AF_Dt&yj&-BKa*d_K*u5gl*;bDpqjjK_x3Nnju7Rt z>_S8__MkGeO$;pC7j2B>X^vx%5O=>tzjbX9W_UAxo{U65lD`m=VuD1kjsR>~hWqSY z&n9#vUoJu~?5s+2lcU<+04Igu=<8pPm-g|@AR2%f6G%$l0|+-^LTdSEdZ&U;<@8&b zC-_&&Uy(a!ra=`aOk@FCXZ4q6_}~AQDSuwG!Nkhq?%!T#H{Dl~SxC?Q!`i1szXaxg zv@&Stq*2?mUe-0dL%$3*w}kadS90a<^NcNt&oF3X7O5Y98NKaNwefgOXRoIM zbt#7Dgeg0VdEUNVMwXQ77163Hys1duXZ4eHJN;;ijrV|FjC3B=U7+sksA5o-)^DB8 z#td)7H0^`Dsj~TIT}gF@VzdUK+l%x;huHBN6y59JKM#gv&TO{EGKXU-?`Q)iVZEmn zHwNCyC)1bUsN#yqH#YJ>Jg!9oIXVJ;=@$IC`NCtKAGus=bABO`FXbi=YPiJCk>$yt zjb^}9?xQu*U?^hWO-(hTN-#>Zbs0LZL(~u3qIrU4zQs=-QKI0tRp<7YoU*0uz`c6@ z!~XEpQg#sAQRVJEOD4ZwGz7ZN?^*|BW*F?3yq#x*$Hc+moMMqri_vu&sI30&iph@1 zGykl--A$QC^3OrMY&doEZD*QsgWvkICcPUk{7vBSS41&dIkmV>3lV?*n(XDTF}iWj4gm0-P@oTfr7_KWow6zWTZkB8=_5uByLifr1IC4$*_nD0WNqE5mjI~fE>c#|CD=X0xW zc*wy0%d58HNM!hP#Lf^QdU*LJf;1;3%C(wse2;;t{|H za6nl(>185;kp7UeB%(S|47SYB1yTDoPd#4^^=SyTmSp`RSR}q!*LxU^0HOaY&#^Jii)A_xe<;O z3STg}gf_FEn~@-9%~wNPgM~Kpp=`O)7@UHLmt{Kj#=r(Jx47SI@q-kz}FpxW?|J$4A z&wF@6NOLv-IZyAKOC*T`yzVPjk|c`>o_t2;KYbCw;f?70$-$QIDIlLj`VR}{n@Q3z z->yuj&-|wkGqS3`z?hGmgRieD&!QfaBRR`A=6;$Reg9|-daP4IuBD@k(cToa=0ifA z2WWnjV?-+GuxEZbTHbcytP32tVk0nA{%!qKvgS+hH2GJiyZ-P#hnArHuUXTz=rbn4 z$xHvKs=xXHhNTu*+x0Ca%8?3|OdXXjllt6$tLuBd?gJK1T-ND(FMB_F*1Y-g5vtpd zBXJR$v!0S+kWl4R%L9P-Sm4a1a#|O+HNCa1+Q@Kk*q_IyIqu?H{dKlD3yQYV-YgSi3ZL(r-osQv~2K4@ln-*krL8VMV6< zB|19KX}ynGR4(H{T_c zH+>SOF6(g~r)cMfJo-#D`0;`RORv3VqP*r;F8E0BRe1iPIBMOVO*<3FrY!Dmgy z-7N*BFHn=Rutu1K5I!Qs$fFpgJNV(S1k&o4F=+VY6J5G@$%xEO$;!@Pt6d+PMv&ZM z;!3YAHZQ67^Q5Dj>B{Wry62x}LTBl+AkzDjiu>GePP8-R_tMgeMdmGE@b7{@65hG0 zl}~udPTZ#3RYnYdD);X69-jo(Z?8qA}c>mNFHz~(o zSrGbU>7AXgo!h*V?bRooKvw_TPR(@6LJ;nkTXQpDp)cqmPGMj1gIqBuA)K?msaR?dcE+^MeKidxcMCinlaQ2;5&DkG;gXK@hu4Ia3eeEbD>Awm3e2Y9=6B-)O_i#^Te%@y$Mf#?w7Q=v4?vRxH z7Xu>S1A1_p-Epw=zvXD>{6kYSGxS;;cSO3R*#2E!*!k0!>_`UL|6)M){)++mCfGb} zl!~daS{Odq&I{In7-ka7_^CQqU?TUA^yYw~)Dlc$+23hRys>(tZGR6&^exiav41UJ z4pQLs|2ow2(|GS@SEJtr0JKW){VxLKnMK{BVyF4AJS7j_&)?l z(t@u@86xoI@Q-v%&V9|+lejx(sfFB!ou5@go{JZ_@{F0o`BPH+yG4;}+XE(Ijj5~5 zSuKOevLzX0gt8oYzd|wJ<5hm|0!3xOX6%egpXgfg{~#bYymo8Vyja9e6b04=Tof=i(kcY;fi0tp_VxEH5rDems>P$+$e_xoo4Yi6yvI4ig3 z>YSY4-p{iu#MZIQ$PB?sPOd3@B;vmKANEG->#I=JZMgBZf?IWGfgH{`O%hBfrs7?V zXDkMjoJ;IYIEi0psMmk{r)v9j#Tzc=ADiD-1RXufBscz3>?q~4*1-~lA7WbTr&@7p%&{VIr_YNz9oDQ5j!&UHfW3)i%2@AzADnt0-1)?L$Wb;Ss!5(l5zpX7M zMAK);m;tg;ZK8wro9!I`EV1+Wz0|ML+zF(tJT?)j4$;>@pNXgZiCKu)D&wv=#$++2 ze7iI=Z6?3Q`9+jRTm4#uj?6%~I2`AbShZNnQ9n&xEA|@}2|8CF=2K$&!X!LQ*Z|%A zyD4|p#dW1Gj`gD6StEO8Hl!{LNU17Xx)SgYP@sFC3V-Q!+@&^T^FZp$*u<~Jcf-!A zw;~hoVmhhO!P@j|$;kucGv?&`t%ZgzWSxKw&o&5_2<@JR&#jFzOJL|-N+|hn# zctGh$<2s88$Hj)^`mQ)ZY)YxhPjMASrmSn{T2Ys~*6}M2^|FP-p9^KmFuudcKv^MEBfAi`!9S6HzYwC9UAl}(S2~Dg` zJ?pXyTYU_sf9NE)!V=d@6>Dw||04xY0(0bLDh?%FM0D(@Yo(PoS2X7^M(B4L*%_>N z7!eqiOS`u59j68L)=!{m9Y^iGX#HsLzZiS$gapsd__x>(yAJ*d>_IVw1^rF+ygArk zsS@|q`h=&;7&UFB-Y_PwGaGL`PYn6-bhrvW@yq(@-n8iA{)XkWBBOE9iswEUY#(~Z zpwhMV626g;csc51e9igOz*AM}y@ZNuzQE zpN_Lei!#J1yvJ&gkuRe!}+*yvX-V2HswZzzs8u%e|J}nS<7@4jnC1Kd!X0(i!dOB>> zq@7-(F|5DhJPv%OGHPdcY{w#LIg)&;)fmh{Hk8|ZwGWOpp7cm7Qu{9ZQX6kIrkz#f zEP$0-*mgA`z}TafRd(O--mN3=>3eZPF^2+7QbI{Qtq*}Z}f80=6#VMvnpq5{#K#)+zc8H6~lWm zQUi4|g+BOS?1c?#w8#K$3vrn(h9WaL_e-o9m#L7c*Xwql82$lFR*n{Y%Mut&`n6S_ zacN?G5BCfC!%4g)eeW6W(m4xJx9$2eje7weJ5J!an9Os=KdjsPTBt_#j7}xvQh&GW zA3(8Ai|r(3i`1sy-M(7KVSe|_%p!roaij|CG!E;ob~%BCaO#o929Jg)` zyQlw&-LXAtjY(b&L5X=8hSi~1Kyx6z;SjxBpx=YS3t!H!O|)}4Yf$_FksF&1pSMRk z5-c}wlMu(0+LD7+9@;Pa@(BQ(KrPG{iMdMjvkOlw{}a#8Jtirlq!dW;5+XQxUEe;K zAa_pQ`C>&2LU3bw^F}jWYUr@V@XqRr^8_(JKP_gOLaXg$^|iM1Y6p$A=jX|U3h-tt zWIO)TKF)htMF>rB}BJ=8N8V z%m6YLjt}>}`bA9V_$=;m*Es7=s$)!x(8+e|xA##tZ`>;KmP(bShbx;xfKk;MnN-$K zk~b5m0+TZ+T()b=_2XeqT~WrKF1SXc+_6MWY9tJ`Dw8ToDCC{fM*wO-+5KE7582If zo&AI>iB-Jb^hK@qQ!X~O4L!rxkBuUVynjpwmQ79sT?}88Du(5-!u!L!>|c!8u6VqH zY2P||_GApHi{UO%NQX6)Cs^$J&seocN?ld=DC589Osei02`DiFx#B$S-^O3FWZ z$9FNQFiA!_KkW_%J!9+)?tyLe+rOAwCr9;35i;-Ht*+CPj7{_!TPo_wnN@?BvKBc1RbR@mWmc05Y(*U zbs5Ye@+ex1jbQgUM2Vu{s8@iN3bH zr#uhf+DX%8bgRi0NX7i%>spvqCKz5f^HPK0gzQPRi=edUeoYnB=qLw)2%F(XXwhWgGa;g;NWS@2dYS*CA_KUaTN z>j3B2r6t0w&JRTTqB|H@rCUNBfgs7bli2#Of#d@F>XN#jozDKy(1fTGB(T{4ozQNc zBT9kz{d&0cN$x92P*a7es&gMYL=zs1C`l3K{7*8C+Zf{V7jhSPv#IUQz~CwCymm%Fd`@@ z3TQy{+8N%kXoOP(f5tX)pomCl7!i1^A61+|I`lpSW_%-yu%KcK;Fxc9?#@QU29t@d zQfhrHlGST#4Wp0k zy;xpprI@h3Qe!>cs$Wej6vh|uO7&SwZ~6`T^9Oq)QD|>+7*o9LPeAna#49jMwrRf{ zt47n$=8p88(G0{(GaZPk{SPRc3>r`w4ftB6WLJQLXf>l<{kvJEvmEU9_}seXmkmc{ zL&KDAeO<+UJSROT2tX&=g*;Y4vFt;ZC-ir4Q~8LprKEI&t>=ph>x?d2ZzlDvY~ zsdh)ujILj5Ukjy0e2V+@4ZPe6Ip$opz~!4MVq(y^13?w+@j*!y?mx7&BtAsH`8m;% z##>yslIr~En&nc3mLf+RYd{y_IozCZ>3E@<8b_NFejpD15kO(XLrnm38 zlPW5zOGd!VQj3XMcE!#kN9SblTmX0qFi_KBFR2umSm6wQuLD8-DpCsS>x-aQhM-D| z4G!?h+kxUqMXj6o_%wts)UV{>Kh=*1Cob!1Zx8>p(v+}ZXd#rLD$#?Tcu;@zK>z@M zss>BhtWGlNWDM!>9toXt66$@7M?1*J!kZr`a}Buqsqg~0R3~72TI)iwczx4<-J5TS zeSF%GwhhF?1x-`JQgqFAD$c;B`}H6f;`_^A;wO z3$CL_9{vlSidk;A^i1-XymnUZ0D(66S>^i1y(qjl;aj;wW6cGflGNyEvDDF&35wV% z*`alj=Bf()*iB(fgNEunsVGG#+cmo;Udqq5AoA&r`af6sV8WQfQ~n%8=LGU5;KtmY zHSqa;AVuhH{sc2~h85*ypZVzqD=!^%lLV;@B_{%n0CA>-1!ARbE@gGnGMNm~ z;82G2W)~Xg_OROA9F&j+i8mG8SyY+g4(*UC7 zLS7uHte5tWqo(=WRpcrdi|bbgY1!ZUCs)K!ub_mYjCQ`$>Rcjg8eYNm+w#wboOyJx(3AIaX zXo--dUh+?R!p-cB(vw05`P}@G>9@6hzG8wmlyQ3v^IQWk)-Un9TEPph6BBtxvB2yZ zWcAhkm?I@oGOI-LSJFj^f6V|sa_y^&cFAY=9O#?*M=vQ*$7;VuT4LOB6P`(Bf2D!~ zLPOWig9`XpamdCdZz-}=?dlK=czDWJiJh+%4BItp><=HOON2O_j9>L{Pz98ie{6M% zPi4LS8MTao#{i@}C-28yQ7ARyI)O~;{E%0&@Av{pjhF_H>(3`GJnri1*-9GlCNP)&*4>uG(k$PnmCIZ-p`b#?ry{p zsxE5B$tb%kM7^kA=37+%E%z*^503rcUD)sa*X1)!FX`gUvcFJqv(u)@hYOP)h-4fr zR1j_X+O$(6Qo%s;wK@j@NtA%|_|C)7_Q^kh-kTJ0OVx(Rnbf`4Gl?c#1L%A31_Sq0 zh7TtyU5p`f8wluI_0Le}Q391#hsMZXnD3zgb1GmDayc9S0-Pe^+5@$90 z;^msBfi}Bnz0#Yyw4ZU!6+$%;WGN!gEAA1G4KhrIl@Z^8kJJp@)g?##o>?P8dTZ|8 z=G-L=)nAphl-MvyB+c+BD@AANA^5*vnfJ(>$gtPLdyi|e0AUK?;ZDbD47tb&l}35XW6-3mVBU3BJ*0e{@^+hbd&D^ zn^tIAHFH>NwaEI`p$n`=jogpk_qa&=b)@Wh_Orsm@NW@B>UJ2Po@*xfo@h~)+YyAv zwl_Mc<=_x8aL;j1R&aG}7i@B|BZSw*>qBYxeu&VQoWqHKy|;EC2+h<%w7aF4roaA` zr(*<_Vl>9F2W(O)KTNH&{Pt{fFnVV9(3bD&yg=1##=D1HF4vj5m|bQAfpiR%nOO4} zR3+t_dfOc$wilzfgchF(Z56EafxypGP}i)(exD5`E`N$v*5n9F72Cm;ANh}u{uL0A zv)89Q&_5?WNU(K`cpZJ#Zs=oLxPe?@$;icxR|<~X&Y!PoJ7J@wtAw4Ds44y(WPBv~ z1VYWZqi)N|*Ndt~%YO7{4I8}2`#DpSWslKIU)+P)f_IJ{ow|XxBU9{fXd^lw1atZJ z{U$DO8{&4;2;?NXY5ludy!3A-js4NobRE@4TU|pDl>JH1@|)Csu~@1*1zp2Ic}}g? zP@{%09%o4-Avc~*q>h_@Fz#l(#78RU`LC4`+y@h>=4>m$%L!C% z>c;iV;ls4QJOyhU*lVmXTLkVH6s zTH4S=&<=j2jMf;I!gU<3yV~AEX!!)Ux9Cb|ww(>{O<(Ynsmcr(zf7ik9s2Im0mFR8djC&VGDy-+Aa!v@$DmrE1rB-FnYLBMteo`?u&9vg{ z@@B#6f$cH$WHirtGR{!9-2}U5 zXPwH;aeC7_lr>h7x>I5`P<;1r5l=yF#UNfdXIn8K<&FR$?P1pEE; zjBse+V1_~#;^&PSF;fxF?DS~ay8wUSYY1c4gj)s%8gr%eO;nL{MW%HLkd#G912b1F9G}0RZG5!SmEtt+L zC3WR5v_wLG^ol$NIYV12po9ZNTYok`pH}(l9AfuPzht`Otz>iSZUE7#mTFd>5S!=D z-?|%9HLEqMn)6btJZoj>2d{u+J*x;tY(FQo8|r>CSo2RNt*eT}N7<#-Uq}|dPl|Y# z{3T)^w^4vf&C7}nCn@#$!Bfih@pq{}e}-){Ztwf(h}92IxcJhLaC0ybE_$QY&+z32 z_3s=106<0|&XK7A9zt*7irt6&KATkc51M`+)PD0Sc~9$_XL4SR%ynN0Sw(<=Y%k1n z2=*S@O7o0|*YRn5#h(z}p&hV!bTzlc{W|{H{+TQrZ2%G2cRL`MS}u94v(-=zo*2f>s-o`2V!x72 z@3>8GKz>~*zWz8H!9^#oAutjU+TUE??9;_JoBjFc zAdP+iu-JEim|oR?jmMpp!P$q+mwDLJJw z459`n{JA7PKN(5ErT}NlwHk|C0}lsc6&rIwfqwu`R!88>V3{W>K~u2!>cOj=hGJYN z^j&;V-EQ+zL4n>U54V786uRltEt%zkig4pQinp+LF<;J9ZhvaIceGt=x2V3BRy6r5 zUDr+*(0*0Ns^Du!jK!3Akn|MO)2vxyN%#lMdEgfKLm-3b53S9Ua=X3<<554CQG zHLk=(KnALv*wSIX;tJJI-a8frlOK)YjSNCJK4SU&A{ zLgC>A7N7a9 zRZU)zi*L?T`O~Bxlh2?JGmvl-i&~ahsonyEm#4+?OS7G6PSx+mgbSr9Wb~OtkRUPE!Ko=RhmS+hxSj@H*YdL z%eVJ%rt70Q-W(pPc7RgZG@3-p`u;43fA!HckG(BRYvNS> zs54W7*oiay;O%{q$XZJ^b1|dC8zxjZq*?bW+gtmvyd&3nfNNv=U@jP+vI%UdwxBz= zZO4>&EHS0uG1Hndr!}8Ro2MGkU~m|N(S@&txpsT{KJcZGU5;eK{+^%1N|F33*-%p( zQfy-?u1SWSiFKRARWhR!hn>FVtKE1iYC=M;f02U=cpb4;l=|s_%#piK@#wl`F6|G` z2(>$}PRi?g6(|7lu~*0Wt2F{lPRsF3_`vUA5a3LcZ8cRT|H5x-0ibd}J=XriS#Dlo zov5pC|$98U0&1A}x4#NA5<$}3&!$5>{?#NzN*+Rs;!4Z6vo26F*^{xsDZdu64e3x@!VZ!rbT)d+}BERSj&mBflY@#K^j+a8CSb5 zk=!8)E05L(Mw!JP<@Z_k!3TsaHiA^Ln8h3``*@rGO7M4$PP}8j>vHo~EqES_OFCGI zqRp%S(EY$OhvWaBIl|+t|1<;8e&sJneJD{2=xRuUh{f%0$%VB_J$V(2des>9QW&k6ejVbWfgq1$Q&%W5F|( zKQOTo<{X!lY-J~A?ai5-O{lED5>{_Gx_w9&IGcG1z@eI6IQ{O@x>}>t=m44SxH~@K zyqWtF(zJAu@4^TG=#UNKNq7VF^hf(lY(<6ihZZ+Q<5tK#>v91!%+E06SLBMXLJsTg zzC7OJgYO1QT{jvI7F5I1mWY84Xfi=6_IN+56L-Pw8VPh#l`!o&XK93d6mSM21A=(Y z9XHhliD0;;b{;P@P$^&cH~NWF9xY-ya%L|D5^jf?>WU@ty{P7@AGEETEkN3hVb7?hqQVfBN*NR zK97;@W|bvP8kXL>Ysq#jQjqcybnVnAgT5{QPk{idK#=*T7V5BVl$li%d@`(8Zf`PU zl|OBJG>BE3lJnbO8sLVEHD@B0{L8dr;YA@@s_=jH2a2lS$&UO_f52e1KP%w`n%DCW z;4iIxm;M6T;N+WqA?m=j3$v8(v3egBkaZ2jY@OFyiT&bw$M*!n91qk}`=uzi!tYQ$`?siai)|{l*o6g39a`3u3Z#+?wX%eJ z@?|^w6|EdnR-xdH{C91}e*jlG4}~4(>cMX;Pe%p7MJr6JP_?l-er(YvD$jo+CWB!L zE)+_%g|-^IQ$dIP&Ly4}@u633;Eyc{71y0F9Tn47u*kqBLQ;iq-6ez$S~ju0;?7@C z8p-DS40!FccP%%2P`oSHwo)?FII8LxSL)};59(KnZP;q}jAIjN&zP?-P!?g@I`8xH zk@R!fn||`J0l3C(LgxQ30lpFEliHq0`V~=&wN$;PbL3GQ)|8`O#4OFsVV!bEj7&2~<*%<+I*Oq*I6Cu>_gPRUE@BTC zuzhu?YsB<7z>?{(|D}uvFRLbTv7dFrJR!le%0V32n(2m_dn;LMVUzHG#SgX1CMCHl zV-AXTEh9}bd8~>J%|f>nNBVzk64z07I%KZcL^?W9GhBSG>B5z4MuxyS96CnE< zykJ6wrU0Z(03^ny+SBxn5&nU+AUa1g`h8~zFH`L#1lNc6kepfe2FswG!l=R`mYw|v z#`38IP7b;TbU2dixo{OAmQ?~x?fWZ-_svf$Ln4Kj`o3b@rJMGgE+u1SO{E6*6PE96 zd#nT&)l;k;ulbN@O}io(!_DHRnlpwR9yt~htcCH z9*IeUP9Ad9?4;f6XzBFF@y!7m>x2~$AAIp~h$Q8F@v|{vY4NLHD8`xkL!@1v}=SajmM1NNIg`eWL`fJj6i!^a1 z7L9wP7E5&2C9}#g2Jbk)Cd^#SwrpBB$suqDex%bJbm7uu(FqE%P*7{K&KREvr6-nm zfq`@fKJL$oJ0_fO_%6x`g$ciH;A1@ZyyqO!NV_vi3iz}DZFqy~fMO*H?T4a>! z=dsD+9V`>lBYc>6aQXJ){xf87P?fKQ~(OL2$M()-@U=P?@p11RUk zsHhQOtO?LDt*YuU*h#P`E|@%hxZ%o4u0p|#%zyJBd8UFfIAC|Bs-ZV{%qQ+AsPAQU zf6q+=|9ska%oX_PPuN&Nc(9W%4s|KkN~KiCV^bDy2dXT0ioc^`%(keAPpI^72ToL) z42N5wcw>-1(=@|#^-ufxPf;8vUo5;vn6N47{fY#0T1^>OGsM=h)u|tNYHBeQha4S#GJF2?mvA3vEG3S+1cpTjIXt5;VuOE3^Gb= ziU_15TSBHX?k%S2gyp&U<{U`b9OPVFlW3J?&_0lFp^J9yW?Ae7CbldTEM13Jo8!%Z z(`1uf(aZzG$Ja9=wKg5?2AmIAle?-6?BV#)z;fAx2a3i?)O(Msnm_uS>LOuZ^Ji#P zx))$LDV(fLQk!!jy3-m5n2bdME+M6qXmR|NH0mu!i9N8B53iLHPtFy0raq2M_?8FU zg3VLgE+e5u6MFR(>%gZOw&XeeAML;NwhJr7zH9Z|Evj63-THoOI}9f8*;KB;Q%71e zbViVo!BNdrwB;^`3Dd-DuWtW5;9TuR&lS`kC;Ui;#;}+OcEbpAL+=IxMyNF_k7zwAtw3%rm_Pz-=N;nnp=j+B>^7HYU{EKfJTuL@x9O=(&;rZm_} zN=nLUbrp&$BuddHQJNX*p5k!VVm0Huq?cs4GO-+f^f=g}=`aCz2j9Z+er!5;9e1Ke z1t%ZHixX`Wnn^lqD;+j`YRJ~HAz=gFn5h9sLo_k_AxU^WN?&!wF2%E_<6spXO9$;-QQ{Pm}&e7Ba!?1G4px?#F#rZl??Y zqy%AeSR58Od9$@72_Td?59C5z7f$fzCSFm0azDry7*=@k_5ez3F{R^7;>?!3sTthM zN-^1og=f7jF#%T^1e<7UNv&&-c=TxAz1$j0_ip|km_Qp7n(2<`X&%O@4rFFvs7YGy zAIAY~iZZW6ztK(n`j#J@64O$&tk!B=KWNf;(P+d490SR8e>Uz8$L$m&B_M%{z@X3!k=YH}*uW+Mx7XMs_*I))4dbTln} z3UB4=u(e2so`jkjxIYG*U@C8WCt5DcI89C{zId)Ib0{l3Jw#(8{9O1=q@XLM;(6>*HdgE8W2W3GKsZ!`E;SLV?Af?Ix?j*YD+9YsN8ez%m4&P43qpWia0)_kE^E*d9fU6hua^ENFpR45GA^m$N%30(z1 zY8Er$(3SGmJSd6Kg;DXC$fd2)?5yVzsr2KU^S4?DZ^bV42C-q3;6^?Wsw7GuAu^`9 zT56}#TJK^pGaAOjIS2wT;;Az=%vw-Wcd9JHi4%9TEmFXfWsQxK#~dYJ5?DwOBc69< z4@|B%eNDr3jl=KERq=2hUTKI>+U!49^&&`7{s(aWQFUbQ4DcIh&dr9&`jArYrc}*D z%)WKPMXix%L^&&)D7to&&1#sVVH`PkQjhnUov~y=?jOJuU4FNk)8YpdLaw0?!kN-* z-!PP#6Yupy`v;x9W=)w2XTeXerbX0jsZNrFa{PCqH>z&W$-|(`;~+dhNW71rlP4+I zp`HJgT1JCNY|r-r6Asf~hJ?z{&%u`^R`hFcQ`Y?l=t#Z|ur1Si|0-V1QSW+i9;V&` zeIRKFu=%ZwN%N=I@Yf>|Dr(7GuKlnO4tVxQR!Z_OJ_b1%Ru3fQWvhTdFA-U?639aHF+5h4fl{6XGKN3%)lIWlT1DrZ^PF~1BFuc3W_E!^heS*$0-Tz z>Jz8lP}vf5UZjgKnX<(KW%G)eacmxmDTlo|YAZO;5+~zx%h0@Hq)f$C_PrIi(mht%DeP^Sc_o zF=NlOXQ^WZ8ZN%Fc>d=4iR=2`K-b9n!1t%w<}$N`|HcU~NzuIL4>oogE&5`tv0f6M zfcn=Zwt_xQqI}mM+lJEX=u7uhhIDZ7F#6We=7_MsD@m-TSC98(nY9Q;kV$rfYLmO< z{M(2h;NSEq?(1;2JhjwM^1UW4*8AoJ$Q$V4<(ecJp~sf*31L7UY!RbNU0L(Z=b*I@BQr z3em5g+W@&gb&Jbjjj%b-cb*9QdiM$bd2_NXGnoY%S^lmF5eP%wk|pzvGO6eyFjJ5k z$hs6*@=~h%ks$g4^Yk0vLnQ{^XhWyO!?-Z$}Tvvq+=aJ?lWpTLR zmPqU9ehcc`wK|E96-U^grczk%$45TeaRdLl=Ht+vKQNWklUHUn$TW9)4b z%SbRqD{5@wARXGI+E{9d&zsH0PS+E^5&7~<9q<__!Yiw1ggh-}aR>xAy!gSmxO-gm zAeB_FF{?fg31NX?zcJ0on3XSW!XGoyS;1vcQQif(X|Pi(%%Kc(tVYXBN{<$|B`&q; zoJDnVb=<4HIxhwxdd2%^S4H;kNc6V222RY#0@!~ z?I`-rjRb9Ik!*lh;99aeL-C4elz^{=!ICMRcFKUmG$T$C0)A%X$wLoqsQ!A*GHrC#a@oedbV8=|5#(cguE&pytT#i z2cPwj93>B<6X1m2yK@2z@1x~!N4HaxNfho+6FMO2hYt3k2p234YfaG-dpO8u)IB9iW)jN^=fS}EH?Im0}acOUZg(xB3r9VFbl(W za~MQLokRLc*N$x^wS?_CnZ#u7--FKOYaQc_p^G^gGnT7Z22%(*8?UT|$(SBf?36LLf9 z%sh(YZ10Vue76@6Ti-d7YHj?-r<{r;SO?vOPZ7sO{%H@nyoiobZZUB`{)1W9;+m_p zNqP3>ejil(cS6=KuiYqpAkH7-rG^|RhW^T;UFnn`f!R0N*R2<&Ob&6f-1*1*`(v_s z4mJw~Jv#aM4j;m&>y-`o$oO0kWg!?2axH1{^`Q64R*7bEIuB* z`%(M?OnGIpIYr}zdJ2r+pBDcEsL2~O!iym1v<+X>DVo(SLJRVGObJEFO3CBCU|KF5 zv>^_qf@-V$uzS8>m~ua;@oyYY=s-IIG!Xt0A9=x)sW4RsU-Q0|@vn^~W*@(r-u)~1 zaIU#GqqyCMfPX;*ew^uF?bq$o<%OV+MZV&3k*L2=2kY#*wm2NVN;@*l3}w2r5b&r; zNv0i1WoB&d+{y4@yttx(zni&x6-f4gFklh8p7@i}oP)@>|3HLOp^SM6$`Q~u_#XZ; z^atVKIl2bPMF8zjTdFa3p=~~e=^g9QFoJ%0uR=tT^6zI~8Kfiehh}9)^suHQ5T;qr zf;!Qptl}BlWkKMal#LlJB+4433V$KbnNRd`RIh%R zTtacaE8bC~2s=dmcKe$$y9|sO)9UpTllxHNoF;3V?CZ7*c&_^@ph2K_%S+U=o=&np zs{DP?lDQ02`wbo+#9A{`ynz`6$bN0(__BLpmb%!WT@ptX@(wR&Bh&C@&1EH!+BL`! zo|mH1NoUlFU0E>UfE_m!wNC-GmKUrqwUx$Viy3Q9uv0JI9E71Bgm8c53sT`}R%1`_ zNIB?C!6526mOj>4$|~%bp>aLQu~|8LwgdOI#rpxKOx{{jQAB((ZQ|t=+iU>bAp^u# zvB(nkWV|nSQq`>LRgC+{$YlJ0V;>%5$5Iuqd*CS++^ZNxC@63FhUMGFEEv>O4hh6) z=+>$%(f-Ku>pNG-JE>f~6G+%QbbF_51%7&s&1k(OdbQ*xZWjIbd9l!`=-Gw)H_6A8 zc6`<99e&PW_#qc_FFE~NXBpB9hF;E6v+Xg$*o0+6( z+6&+id#9~+Kh0ZD!6@_t2wKFWl#|)qsmz6YYIUp7)H!Eqc2 z&8G87wM{LSkW17ZUAmJbFPOP{&cPmpmhO&rUpE2qA`(;9qqAJzIJ-aFYTxJ{a(MP3 zmrC+3feFYPVWh<4_47nYEgI;HjT{8$c5+xLYs+&q?VFs!Z-Rx>KB|q^9NGhVFj{G< zACRZRAZjkQVt^NApOqz!nSK3^WwL+W^+yWUwrljlj5ofm-`_*}{Kx%R3~F1O?d!~- zY#C{K7Z7+c+!O?ZCw$9J%--za`xwt@meSu2_7HgB{1v7WyBV2h<0XpEyV|wf>NW8^ zKS*X5-+feH*}iq;QT$U#Kz#*^)yt4kD|o79i+;RU2}$w^OAE35fp}3qq%kT>Q8BmP zbf(l`n#-S0>)`UnBY1v@=uf#rrzpqfG`;WbIm;z!^|w(FyRKBVYtDap;i5DC|A!YI zY*}98B3u@#8T!Fg>jB}wqzR^&!^hcqQ(t!^YJi>RJd60l&+zlbt!WGAuBibJ{*o)u zp_7t|m8`3DW085DsnHkSbaTbp3*WHj5&@AO(hh?@<89`;D&a(%?VH#?>uVXd=QpZR zO{1w(Oxu{*bi$s%e{|DJL7A(9h(E}7j^T_QwH86M{fdH!CUuBbpTrJ-yyl#XdP1S+ z_oa&_!xdkinBj(^b)F|?*na|a_O6uv1M5hTDGR$So{b)B0!gqARJ<# zvGE@fd_u|g61`jk-?Y8yio5Pp{HGj1m_EH(I89)Tr#a?>IxqFCKhyyi9yosiP5esS z-0hRx(D}# z09VQ2g6qw4+cGiZoz(jNqsCOG2izCR$VYK*U9Lq$sUDK( zB_{H&O6e+NyEp}Q2o&cj?A)5^`@RWr=gn-q+E{&2(%Mc-sAi65>pe7w9$@l&v)#~3 z6}dA%sqqDT)R=kk!Y8_$Nh0b6d=rajqOKq6sMu>2a`D;Vxs0eNX@%NMjn#e(dH0{k zcAXR5%s_e10k3z7i&m&=Br{fB6A>B%V}mQ+rUii&m@9L{g%~uW!0zlR(A^l4;|3q9Pz2 z9G3E2#BdWWXZc&TgJ#1$T>+Ew!UXdqV;D1oIOsV5x>Xuj`tw;1!n@p=)P*0pqTX@z z_~b0Z>f>eJZm0+Ph%0KrbBQF%v1ULXS+|qsBfisX*hTMGUp)vI3aJEXFNOm_AGfMU7uvi~3Pd^M@LDW@~CV5SKy~7`^kPc_#d_0o2 z`in{WyM1r2&RfM@JTezwSw@|L^MnNjaH1O?DPP9SZRM$)UA7)aU5-j0oZjhz_hSIt zMW$}2Z+)FUUv?5s(uTUATm9?S!kOq)oSR9mF7luCRXR3hx<@t3Q4I!pmToIIp%=rm@WL~B5W2X3f_BS=UZ(3i zq7rA5^h)lexo`O^JPogte+Ey+J*cJq7V?9#Q4Z5J>dKy1_x8?K{q=OYG$;h|)N~rL zDVZAdo!d^{F+Mm-k%3L$2Iw)dxr_ms*cMefE2!hTyKFfkQ!9n#rYfEu4HN~EMZdk0 z?T{!Dd2(c(VXWWU%jYdtD@~z7 zO=Tgdz|23-hJ;{C!K||NH0gsW_bhDj?sO=M9NIL%9mmqb3`h$(0icl*1h*gZecHX3>(hgZC$zvzh({mwtV=9A~R-A8vrI>kHPAOyCK&Ag!;`IB^T|s#Cg@qblzk8)(eKUWF0~xb^wI-6BmY6Nul>_qS&F7s<|N24| ztli5o40vePOYA%QvoKy)-!r^4Q~r86QcuTL4nJ~Z9Uy0e*2yB?QyT0sE#cL!=EB(o z3y8zFu?G?IkB3}n>zzB)69(YWvc3P%EJYNA$1Oe&YP>pw#;h02Yrcq7iq2|UIFU_c z*S?T#E&yn=kB||byf{aHPUKKYgBcP4{e*b8uuJZ=x?4P+_1as&2)n|5JT`IzOps^j*d3O1cwy z_2|tqq_sZ(JS4B0`{)OYg}3B;R)Y@s)$t3W(my0Xyb(GkbNt#xa;ei4L_s zL-q9Qe*nLj&grg_4^^3FZfPF9F8$z5$q06g9^UR+TV$7VkB3hSFmo2dzu+SKyEwU% zfSi7;Pg(nfFd%|hWLCL7Uar=u0p?cG+bHhSW0o6&`S!9nGR?$m>3IZbRaR^4JkD8! zzRp9N>-b5VZwtK-Z`xkr@Dr$QCDvOmlHVa=&YZ9mceMx#qp#}2OfKM4hT(D4&#lSN zdrZdYBSxKK2`>-b5UL~@J22(AD6*1TC_3WnOWp)&WL}DNMCQD@u5bmg&@<#2!iyp? z+q+HDIc+;XX2&gM^Eor2iWwdr=vu{X8jsmfpIq;VzHA&m$0(3t(y3r6#t0RiluB?@Ll~6zx4<7cfkQ1Ugd%`2a|;tKy@3 z4?0E#6u{d0g3U$_5Bm*swemvC++DE~{(1T?Zmm6drrPr@oM8!Mx`k_b`&sw-u=Uy4 zm}aa_u8AoA*^8!hQNgyk9eko+!D5nwOdIkV^ZK%4$$Yn9$mfuse`AIEs9i#U_PQQW zvlsJ`!uTW^y&5uqto)Vx1Zn>kFV%q+Cfq%R3pF|^?usiY`gBM=bS+3@s2(V0NPC%~ z9;xz%fn=>kzm_=rdV0SqeiWbfy_Ru=o6u2(r!Hij0{{!iZASA7E4O5;@}>0-u@}&ts>*01N*AV>~ase zD(z)#N#uFK{&r>TUrJ)wV|ucjWdo)a)f5B|H8wlSus)B}-e6A)zM__h^`FW*cRDxA z`Qx=#4Sdtxf?hgYivoK~{!TurD*GRvf2|M_^)GPOILG^0p|Ao8)_*1F%`yrCWKce@#{tqG=^W1BW+Cc8ys0$oVd08vm z#P4ohtboJ8(XRu2%pX+3h)dNqd~RaV$g?1|U}+8&ZgneAT1LlC25HPZlZsJ_6DX)V zg66`;$m@0>>7}Q0*4Yzn+p;fTn=~JXVpC3Xu8@;_Xj!Y<{+V2CSY4+kOH>o^5h;uN zWksjMRHpZ*G;>%Z;3Il9d*^SuZfRBzFhds&^11~HLLI=kp<1ujAOxd{6}QQUm5L9; zfzmM74#MPK77%@#xCf%0>4!I|YVZ$EPJ&U>x~lM$q@xU#JZ%lh4=T}Y(-Mo0bj=!w z{Ykq~JS3j%fJ4T-JR^4Fa#@*VG*ur{lH`Kgarg1GV@*bDynTr%yUPp-$-d<{@Ejy?e-Bg*QF-a z3(lZ*7a8*gWTfyFwgNC8-tww-e*Fiq4tZ?->ri$N_cQN5q?aGpKlMJ=U!SirSqa{W zQ#L7k+s=$lB9z*2r%W}a@(({jDl_o~g5&`9OfJfl}A>MTuU%mRNQ>9MVWW~9c0NkC;UBxI({?Aw-qyf ze@1FmlF@w3g2@$5!iUz^he8gRgP_}ecap28naeY*BkhO^6)P6Tq3tfMqq&TBUm@~F zwhmm%L1Q5uf&yYp;-5cHAGOVF2Y;8Zo;sQ%#iJCH5!Z1O=eIDvpCIZ>c?*;jO4&j0 z2l90n;)86=s$N%?lTc_GX%uPN+2|DZm`Y%})_5W{(zgRy+m1}z4{_&%DzrmcRV_D@ zBm&Y%(5TMdI?Nt9S1tNE@Hc-@YHEheyQLFiMku>ZIg31{&oi)nkR8<^|ISR2zz1Y1 zJ^ON5e|8@b>#7iadB{7b8t*rGk%S|9uMo&NbCi|u#BTV_lO6yNzIo*maG@nqufy3| zTq@qm_Wt9GVy>5*5e3$T#1_A1Y`XFj{FtR9Dlzit>UWn$Z>yU2LCNA;8y2aIg-S{7 z)}ie*BjRMLf0!6t1JjVKm)`TAerjK}?*Bw4!$M;7x8)+m)**yI2d_OA`EX_+kcv6K ziZ%s{$MHBu@L74X5Qe*rzz@4zvrHN(rmYqhtXs(l8=C_JpNF}v7|XS|d>9@4|7N;< zs3tD4Xgv0a0mIHLr zI0@PVZ{D4q?;A5G#^;QPbJ^(j17nmyJ zROW-UGS&nIS%@Xy?D)Fy>A3%$ETASYY@2f1(^u@suKaNA{6}oF6#aK>>`@kksGfjC z*`wbW%?P19iV-&HmeuUOu16~NmXxuT-yJv~JENs#^eS<6=8{(=zV{xqf6En%{*)JM@#VYGnPGSp zuT49JSvyV#77M&19eS}*A5M&1q}L}{lD)rAb@#p4&e$Q=E30R&yyrJ&E;taRg&OQl zrgXR5kfbzxl!~*aqJLfK{Jb&e$_6zdc2aN>JEoKT*Is*2di`aM`kbGgY*Tpll%KR( zrgvgf{tlxka--l5whfJv1x%IHoyxa>=ZtaFJhkM zP>rYKxkfX4Q^c%`u4Hme?pD)UKAA}HYQDzWU^B{9c3x>DbwWDnXQdFDGP=@YX+2i= zE)3Q){tqC(rETsM89R6YUc*bVt|xR^9W`Db{C!7lPu`2R~jn z&5h^c<*dT84Kt)^AC9rqElfnX*AsUHj+@FItUBehXenS_2X1Xub{k@PSRz7|!#<_1 zH?-83=;z+;qjqYXWkceV+|EL6yOm@xqg5rzsb_&LOGK(jW`})lHEBPG9-1E=ErS!> zxxUY(UdQ&ax#9wL5N_HC#bHSIu_Cv7Uf1gdR_n&?uj5pvgKP_$5`>4N7n7#xNGvX1 z8tT3&e<2bZ0>x@Z!y4rFW_@DaPxq}SJzZYwIg#P|uw%DjRQU|j`SYfZg7>^U*hNE- zJXwk?_p@D@48|Z$8;OB_-iyGr8Yg(NEw~57=rXB}m``adiF_Np?26h$fA`wJSOt#> zKBzTw46yAeaB#W|IxCb>Kz$$$kt0EVH&010qrPdX+W88zF&b*J8nmCaeE5`fy@}p~ zhN&5dtNkopIrb}2Q=f~ggY&z1B?%nq>x7eAayCz0XJaRhgk`W4*<|Umq~IL(41qmB z#q}%ofYx}XLKxV7W&bmam7I96wqek)QtAB$XUsCKuYs@uGzr}!XQ+&yd{55d)>}ns zqZZF3&0XD=WwIDg15ISo#umUpd@xDg+kb}y59#RfE5nuk0YVUos16=Y=ifE5CuRPi z+BK!WA|6j&oOT;Q_IGtbw0r}9RSK`F{sI00I)eV9K6mt%7` z=YA-(vB%@^Zp=!9YOKq`qH5gl^9bq>h75f1<11(MA4Ome7sV+lAOJgw^c0p6{F#A& z4tfup4l5chdF7*P^@A(xhyCUr!nkLQ2bFK}mM`y!0_#)6^!${YHpop93u`?O;aHYTGH%A7s4 z8`_jzPn>{e=w`wpn{m{Zz`x%7n{alQBRKu*k(yXP(qYdPs1jGfugs;ECLq{ZbiSOs ztVK!p#G>@>b3V-<+&@(Wg~vP_e??y1Mi@+@TO*_#Feu9>kf@l_C@a-9`}%#5>o=85 zXIl<&C8niY14>fcgp{hJ`>*d}Xf@V(6Y-Zqp1j|`8$1o#snrT{X#UIL@swRNDi$>U z+hn4Abs8S={vNK8-#O*n=c2+~iAG-ZY`#E<$R2j?*^#6PJ;0D?E1cBIz(BcscHY5q zcOGYTGlpVBAq;BI1 zn~GkF^f#i??|i}KS}cm({OwKnQDmRAoEvL}yGnv+uhja%idIfc9|!X|^s13%Ucc8o|{&wuKlI#(}-P+wrU-O2A1@m%GD}MO|&S<}U zUQ00&>yO${&tIqfT-S2dt3``@BegEBKbX=>5sz;pc6beLNs_)%w4UT*UBBbF-gyZ6 zs2Ic@px)VA8b(XHaZ>eo^@~l`$od%Mz4%J5%eRdN>CZpgS*XkM7=TK^X_RK)vmL5p zI_D^O{AjMeWUSCzZRY);n-JBI4|^;mvUAtWHvu}gCrH3En?Sq+Sp}c1SZExN*g1S# zo&JbJ!`k=vn^>3sk`vmm7b&uaBb|D()I48| z#6ZhrD2;nUly&QCCNp^03sCw08QPG(~2?FnD@okqqVdC8}OR3sBN<_vw_0gBqJ zs!p)p3(d%McJv@R+q?Ju))hDL;uxyNrE(4~v4_G~d~{xeOwPnT#>myw1Wn2lha*(i z&~hgI^DRIqIpmD8EZ%4U#c6c( zNsvWl0pC<4Juipdbb5#kN*12Po_mz4AL*AJP${en_6znn05Dc;MS)YoAz^X!GSJv- zloXQ{(Z&XDw{FQK31ieX@vwhR50bbUCeKdGLnMz};z_|NT41)uY2b_-jY&4wPp<=i ze?yk`wolnPnQP+`H8r%5%XwK6pQhbyaGWzgx1V0gR~M<^j@a@ZFfl^QTl#ZrWvNNq-ETd!3u_PoK@uiCxP7kCMgl zkOnojWwFaBG5m(Mknx8U_+Fxdpx0ZDF>4n{*G{CJPm=ZPHD^1#u$gtlSZu@`;=iUL zi^J4krAAHDNk7yS8uXAo?v+ltkSZ_IhO7({9>>Vwc4?>%s;j01F=*rntFvhgH@aV& zArv+NYK}Fni-M;QIwya0KCY&_XL=;;mQ?~ZoU}#(XuXOO5k8#~*JC@ZJ3@POhdKqO z(;_+z2CXD|uEYr-LB9xds5uCoC*T@6d^_K`->&kkzBDp#Ib09k+*mWJW+(V4(9qz{0sj z3t@CFjOWY*BJ8N@fkG3@xf>ikFBTb5q!DEj9d2eD*`7aC6Mw3ZTXkwzj!mXoqCrKC z;_;Qk$*6AOHFG#StdH0t2-iTo%;>-&QYY}ol8k*k=+nH4 z_ocY9WCi4tZMAx<4H?l1Se>caNKXBoGas^^c`!OwrcH|6YQ_}%iN7&&qwa;hpx zsj~n#)%>!PK)l1|5zC>CwilA(D}nZ2yzM%2b{5n?`^>nCI;{RK_r}+KLER4SlDME| zVrQ|t0pVKZikD7sCXOk*>OI5pVqvn^&``!$%Y)zQ73NZT8^V6e|3Q}verrKsL$Q$B z5%(XASaCk(>@CA^wtY+Wxg<(3{e$dVr0UW6Y4e{w~x|D7vViT&{+nd$73T4xrD zV8Qb{8oDa;S$(D`Ekbp(sZDa|{k{|@hZVhtyr=OiXDW7|qR8(zPTBm>+!br11WQVBDxq! z*oz82yxD&5g8|_5rvTpN>W*n@P&-YDq= zS4$VpDVMa{Wyli3AqrVS+l7g{mf84T4%)TX9bmOtBk#SOM|q!< z0=oCh{5)ex#i-%eB8Tqt))7s|QJfaOI(ck`FDff*B+k|f997Gt$Ke-V)P3iIm`l#m zg+lt_sJ&YQq_9G;M&~f3l{G0cYkqz{d(|t)9{&$#m`2W{RP2s0=WpBXsi+w0Kowmi zkJ_o5QUtk`M8R8+ld_uhp6-IIE^xO+R14CiW5Am~rd=~8qU<@g8yfKT-~cw2$^FW> z6L&R#U2rMx^2zXZk(i97ADaeDSlCHSijNi!sp8vG0_OD0&bhZjXp=8Gf0<5raXhQS zx99RCcwa?|{itzvZI!9mo$#v!()^Bxk0n48eyq!$Qc@)qEhZ*cEjns3fB)lhy^Z_w zjZoHUe@M}mw5^I14VM`em_;cyJUpaO3}(^-et4to7wFfBJiU1`c`&ddUXEv}BAMT^ zk%&0$bHi#n)G|=y^N(9JfA8b|Uaw_x{S^HD?XIL+rNNDQ<39ia?+;_3X|$HcLe)Ze z{Q?_7FnRNK8X8!zRi+U$a zX4E1Lp?BY}_mx|{O;3ZQH1(uh9_)X?^UFLH+~nst@mg$6SSgyjSXD;{J0xUm-iLPg zqX^~1@b$PQYI%>pCr^?~hO+?}go7u6tlOFPDFPnbn2KkdI{Q5;nq%lYSlgup|!U5*tWuSRVLz!-@a7--YFYa2?PCVWf;0v>M$6DE1A`` zU74QwIjT%Wu3!=Gf^_4dA;Gfxv?0L`LnVc?SsGD{aA)MVs>5{Ohfuk&idKBe_#Y7; z;j`8)`LLFWgBRgMmgrJ|+6^*?@2Ah-T&8}X(QPGJj_8FT{E>TaFlWrb zBJwjF*>9qC)O&AX?nNT4jH+Z10_gQ83JKWVJwNs*AYl^Z!00a#ZZdQk<#?t#QUL;m zdw7Sco+C>*#0LYuZxmDJ%x!<%n2_<|{OPNI`Un+F z)I(8=5jakG|pWweP^;tD96S1(oXxiI7p|r}+B6Z#HU<%Wn)k*P~j%`}3iD-go0~{d7T15IW&$0X5H74+3&qsT}2zc!>X6jzlN^NQ2IHz6;TWBf*U;a^e=2oU9!? zE2clbc64!?!k_ArtV_7xx(7-d(`{j~X9Hhr@W&+w`{NDI*IccMmala5%5nOBa&+RO z0|8fFJ92UTRuZQ*ki7eaC_cM|8Gk&&NO}a(<=3IVQ{eexBO3guI(!gY`rT(P$twmod8A|)G;4>h&_+Ij~T*Gl*NCd<&?rwtJvP{ z;x)WPPMGGR+c!h9jq=XnFp2^WQgso{+Wa5BnouV_oHn!Y<+%|I5xS^yWfE#^>IU<@ zB~Klu`x)!LQ+6Uu`iUPh610<587%>H7?@<>ViB3HNhA)az%F>iSL{37PmRnrwNwcl zb&>Z|ovR~Z7Q5K)-ci!Yb92yM{z^Q}0B{G8Hx^y1czIQtGa*=IBDY`cezN$?UlquK zd0&=k)<r_t)8Nzs1@ zwU3@Q^}Hc0YGhMyLg^-qKWV#lwH-Tp4KM7JU9(`;;H)>uCW@$h0q91Ik*TJ4DRc$c zK?hRivI8@9$f8~pM=*!2zEFlnxrj|`9mOlT%r$ehjpPL0Y*l$|iL&T2S4D0xEqKw> zSn;&wZONyU_EK_Q2$r{YEw^|VH?2A?E+bML-x}iS!`xpI_ah?)wpp&Qg4@!ts|yH- z#S#h+>!TMOyj~g;f3;h88u_Z~wS4Td3(V9zG?lk`j9}}$SzIerLU}TSD}}C6qj^%7 zgmrQWqT7-W9E+{&RfC+9svLsNd`?K#EHh-xXTeOWqKY13)YZwm(4q5W!I)n32qqHf ztne$e>=7hZSIQVG?9LVMH03FgD8v|&HjNj7lEK7f^+M~7!JxhoOkL0%1%;JtA_b1) z_TGp$@i|4nOM2C4H?u-h#)aSR&wPfk-ux^`JIsBS5e-hKTlrN!#!W)&Zhhp`0%du_ zk_NPSn~CQx=kHHsIpklj1NnUt`?c|7hiYi{oR!adDv6jL>R#B&{Ouk+MK3*kC$%LH zE!65-NxQFctoyJt#;sl8O8o2F6YYlL+ZfrHn09C2W)akyYRU&w&CnwE=L2+@MZImr z*t4O+SiN7C(#t74GNUb}Ap*vTgC4{`7Azy*kyOpBNF}Z_g_v5R3>2fa6RV*k!EorqTxjU#g#Xasz$9}` zuP`vX^WN!}LYL>(wRNa75=4t^pG-HB zYNKvD0xz`v(akt_yxv4Xrqi0Dg3B&}Z;57#NYq&IB4K!ajYdl9lDE*$ppzy6Bp}gh z4CRk2Ai|ai(|<~>QR9WyzA?8N?X<8n(RI(57koPdE-A_X2e5Mk?3PKhu&9V@lAU@j zwE0l;<{MF5bq8eZ)G;K)Pl4W4;o9PWhHG0z!sC+oic{EQe?W-KN|o~IVpSpSQfIOA z(6Yfq5(hfS{MSI|Er?Jpk>SE=sK>b&lRB&8#Sb7&VcuFFglalNKJCp9!ZO%jYBIxP zlC=2YJ-gzKBPW~*?oL1N$H|56RG|gL&D)BBdIne-7R%g=1sb;ZTi1coYf|cz zjn}dal2|bRjlhyMG#Y_9CjPVc9n#a~rs(zfCe_1^= zO)a5aZr(cfnJm8g4ai&kM4(+}O5(M-j_#0VR0mx(nf$y!YdBwqJX)hLlNZL|`)h4u zV~_7=(ITg3Fjc9DxtrY0uYK)Zt5D!xQ~HGOkaZP2QxDEz3@ItmP$9|NeNcD2erYZ{ zOPrhO-Zq~6qOF}Su!`4|piHt?b(&GtKok*NdX+>N@lY+4YgQ9#+HCQ0p!G+h*p?I@ z^>3yjANDeM&yOl;O!lO-bO3+YkaBK($*RlYcgmd|vO!)9loqzgfGr`sJ)!k>8YHrxGsHA8k}9U3-QWROqJ)Je`(BI+$=a{9G$v`bhj{=s>A)-;Ec36Z!TG2>23RxNFCbtntFtRlKJT`&e^ZL7ib;(gWM zg5@)V|%n&({t>_Ty)YeoyH95(8)*RncSe-I-F)>6ql@}#b5#A{hEfm z-BTww`8b`MEplc|1MS+v)f&0^lHjEXY>;m;nD&tEafVI%M})-sBx}KD-Y)|P>uN`> z1x$>XgxdZ!r~6I|MdU3BI(nq+CvsXsK6MRq#;OOVhBG%VLX)ptViV!EiTM7qk!z)| z1R47~56xBQ+kSl#Fr{tRm_26}V2d2nA!po{+300z{8MEC|M^@!Iy$1&^X{0cDr%ed zhptSDHCw@RspM^^2eZiYJwrUg0PHW^q?O`*Z`YS#Msu3z1?hKGpJCLfGyqd5o_hDJA;DND}`=e($ z)7BEOoJH1aOsv!EuaaBu4t7u|S;42NfG4o`BEL{Pv}MEUovdfV^6>Z<>i_(>KY59`1_$29XIRJYli9~on|$bWU+G~kr#(>mCtZXzc%k{}cza#^iBrlsGn_)M=f z7{I(#>Y3A=Ej!F)lTk>#;*9w6>&&cYCF(&XvCtCSBTm02H4DEoruG>8ApW~IE+X%K z6m%^ko<8z4do!P3FzprLey1&9_z=G!R4U34wk&s(%vx=2-4&_ zuW#gTuR3&_mySW&o9I1^>x^@`Y_V&2pNZhg^0{L1d(KVOP{c++-0r4ecwU2FhPhhI z+%zbVf46Ab*jAH~t!~%92smsvF$m{m!blO(l5mNg5R-@*GS;q{%x@)L^h|R+yxg-J z5Z;m@tCHW51NLKy2=x4wg9L-L2afz?VqTZb=iYhUnjH;zJ9pnmNj1t~eNo3f_^L@HIT%5*rQu!^!UjF0Hn<2#m8XDvtle>G+6!}%5oO$#DN=tlj+zY_eY>pbzd&XfOb82Zn<;Aus ztks4qj5P0CtQDr&rK-_bBE@|U8AO}Hk?k9_?pQm!_z3db3GD9SMk(fHH+0grXK1S=qiV5gf$wuTcqn=X#EN zp~)&f?{@*@t##%a49-$_b^p1Ei_YqPubNCP8?P>FysPHj_c+ko(8-f`?mQAcSt5|5 zKjUc<;#i%c1+98Clv$ZKYZN{km~Z6N4s=O|>cuBZ^6w0efTrHBY~3;Z19;^d$-Tr?hjC^FD8N){o?P(B(@G^ym8bYaXrX$G#j?+;zA~L+4W3Uo|Il|3 zbcm_Va5>*${s)+B6|^MsCeDeQ2Q5Jy#JkFs;IXdiJ|l7t0mVwb9Jo8;{txFC--s{8 z(yzrU){L9@%PD5ByudoYV+@mn&o*%kc!PtwhQ+IKTRil}#p_jnoPSqrDG|#<5E+3R zRv_bT{fZdv8M|z^JZi3CSDfV8={!KJbj+PLIHGPkEUQQ3r>E|Gq=fw5G=ZVO{Zaf) z+2rGct0v;~Vo;yj8|l*NC}jBq&wJ*2ON}>F(b@;fe9%GTHfia0N<0eL6oGT1@@1JK z+!^Q6VvSr}XCAUqUcGH^nD)A^e4?F>%%IN)y*3L~m|6~Eri`0YzJdf=^`1SH90erQ zEC6oP=d_!(UYVMwEK!_9C``-`bc%H(8*a0c-({^95w~pm=Ghf-FBIH7dhMH(F@ncLD5F1Mam7a*jII?>OS1ajEfDerujK9F&AHz97v*_nLl|Sth|e# zhFvX^KHH{1V0{DYR^d6ZM9^*CFk$3uEDGHT#hXhl5ToK4E@q$3=~0>nWy}h1X{oU$ z&mXZ(0=Qo%j-=|~i5O%@p{HR?^ zt{R6wyxTgm(JANPHpRhW64{?lR(D! z0*px;;bzF*_%Mr36x1n72eQP7oj`4rzp`B}3OYQ;#dulcE8Y}jhWc5M&@DG_Ag}B_ zOP;B7zv3k>T*1f)(jog=lcWq}-V9b6>uu{IhpRs8>M>J5@Pnf;+YlyBm@g?BG(Z?4 z0N+oOuheT%;8~dWPOExig{u2S82`AJ32I5Ie}G8X-SAC+kfgPX_HtTD**XKh_k&oF zr16@|;bPuw`%f6+gAmgQk3gH5vXSge8mBwx0Fw*<6|XUBMS^#*x@NksZ^u3;m>5Gc zW=OZWpp_}oQ-Bj}za~mG8N(onO0GbGjJ@Cd=lXf7rx~iSM*3siVFTB2mfdvH6AXdM zk$2h#e~BL5-~Hl1&54i~3#>=C>vr0Nfg%{@#E?gfa8oDp!R?qXJ{pdhXl0mVNJ9Gkxj9m4R8gylMIB$PShHkTWmpw3LAigx%Jg zjm)k5>{hY%O>iP-fLHEGk}^XwkDe?CW&sSOz{vr-?Xr)*E=|q=B6X3ARe=BvJ>A!+j4xp&%lK_Wg2jkTICC#2sMJ*7Yiu8pWBUuZuwWO&RhK|0gNXjMJeji5=% zN8W6@7l-5(xFMQ^%!|yf&ls&#x+7F9lTiof_dN0|CSBr9EaPr%){`CsCJB>Aar=ge zYp?iK8xxjKpPdJXgc70GexVqb=UiOA1#6hSrU@fze*Ga&bp*!^h#+!8&wCO)`UUk| zRWN0ii>O!)e!R)jj`eiy+^lLasQ5(7D7_n}@5K!dU1}aY1sb~9@?iucL^KBtaYq#w zn9-2*`akn_P}`!j8muSD@@G|@rbW-KXG$B$9X34P{f-%#dY;`MaChcrRC2h+E)Wh( z)wNZaGZRkVjGo4&PorZ5YKlup7KIgfNE42!FYgg&Hk?{Vy>n1}BjJ{5hMFOu=cEMS z0|4}TmsJ9#vn)u3W(~eHm3G|ccJgPksU4kDn|uK5umg+o!!}qK2g~~Bf>xz;(ap*u zXI-d|sU|0j(dcHdxDMXPs>$l^m?WgFK=Nsj;p-f|j4V9KLHl^Uyu&!vIR37>+RMEJ`A7fT@vQe`A6!_>+WVu?o>QCO%PCyR+DEUZMv&3z;S7b7IzZv`C z1C_z@leF3bCh#XrM-BSXZx zZyIn^xYdh)&DWtmOh;P`}H&2KMj-bR1y8tgJ{)w5$&@ZxDWDDHs8Vl!+hGi*L6 zI3I~;&7-}ec8E2NQ5nz8X^tc-qu*0O@r?pS%R~}8DNOlH2r{Wm%#__)V50x^av9}T zWw596?!VpdO~c_9a=_2(p`7&;*{WcjsgwLF08x?N+@-!%zzb{B57!}hA1>zGU%CY1 zLhwaWZz@E!FdFI$aTQnYuiop~07{rr@}m}>oHt(mx(CZ`B0avF_!ZOJ<-s}UQ-2ty zFurzl1A#O-)(>iio2Q_D<8D3XV!6J#l>!%6*M0wicy*8|rl=aO6w~Lb{}GRq2#709 zkmJr_KSO{3N5X~4c+U>Gk$HQQg%aNxtr%6gHbtbkOjrBQ^k zjR`(_^Ov+8p2HerN%MMNW8;>$)P^91jm4EnndRidGz|?+)-FGYms)r#X?Z*x1aIi{ zOMpmhqVd+%Eg3DfpKH&yDy&4$mB+>zzR%FI(2MogMAvznf<7awjNO4=a^{}jIqetN zzun1KXmCL1N>WChI+L*RSHMhC!n*C@aJ;^2+(DJQBAr{+L^Cp2RC}k@`UrE}=E+=4 zKcC=>1G};==RZMY zD_nFvQ@c>2ViPD*?_)ENu%2yLnO#(7EghnT%@WkvdpW(WzRqT4ofD^59%#8gl}lHO z!Zcjyc2E`Fbd}N&(Hwmsihl3x?vhDK*p~^V(l?8ge9Z=KrDHubo3p5>0ZXi8ijCHj&Ons3ctoS>J|?!J~zSb1O+1 zO@hIcPDc0fzVOAO9q(dCRL5ex+Qi7$StYU>NY!~6Yuk@U9x0t*V}t>R}B4zpfxp@`9Q8n2EN7v7lLG8y$sMmbSD6aWhc(_qdyGsMqr z{%4l#k#!lTQ77+ChHS!&hOpCGH@)$sVIZhwo#(!yiWuhYs4)7xxle9AEwqyW+V)qU zPNY8%gN30=R7+EkalVSk{M66ZTq2Xhu2jF#oib}6goguB9_(71q*0_okL~&kiy~QeVH0PAG35LdP}W%gua3baF*< zF)YOib%FvJP$@k~Bxp(a^f9S8tXpE2_A+PgP*vlNvanB5#B25QTb{ZId?4eVGlXqD zv3rGcNBRwfW&lFRRV)v}ZugTn%N!>!FO zw*`Zu$3>IJ>7@N(g=e0BXdygMVitc=j+4Xun-f__#(BhUu_$ie!8r20Uyx@TeYiNl z%qqJe!j&F7p^#L3T?CnTv)^(>ZK0`laXqc{Ew!9*2r@J7J{L$E(0W%r_3V>hDO-WK z9;(+?z0_cTQfiVDA7p&bB@My;9yP1-bI+J*!Yuz49L72Ut$6Oez(;LB;nU;W)5-PMci4j)1>zs`^ft5uiNyxg#;i^yt{5w=iy8?UaucEHD5vZfGFjBg zWJi9{>GQGfFo>ddm1(OoXaX}Qbp<7L(DH%&a9u1)621#0{hMFtmsxWXzsB_%F=rzJ z6+Qgo@7F`O)s9Q+3YzZTFi2-?e)0hS1N>fkcUBMI^HY-H5Gp6~hLg!lzichu#bd~JB>%$BGIHi#ah*t{=5bgG6o_9?4|;A2 zR{!LvXVW%fBu!M6vN8fx7I`;lAUYM8?%3@yhj=!mu>TK0FU;ZfhxCP4>W@G6A9%1$RCZ*kGr>0se%pEjXEGRo5RRbk9%`DaX%kQI{!l_7L>m%(-C z2=Jm%vI@ZL@2Y{u+9oDByGAfKqT-^4#LYVrQtlYja#tN#)(<8rSg)3*CFD0C@DidR z<6_4n!xZp;nD$F4mPw??^{q`P-2j>RQ5}B-Ca-90c z)jiLWqxp>bXXaeXpk7@ts6XGny(0o$WJ)PRNfh?cYbwoon&QNTfJdO+U;wRcvE9s# zYCRYsW3hW`uzNb@>Jew4dR7@rB(1qfk;ZySA=oo|QX*b@J@z8>D~nlN5~1XkLUFOD zoY;qR@2?#0wi;cG+XCG4(7G*Yvq_@NZS*og4I_#iVK^utrKQ;AU(_HhUd zz*V5}DMi!W(JI~$lKZKBpiL#3JKF_h*+r){wxXd&bFE_5H^R&gkU5hMmi$z);C!Him7r;v}%+i*hivcPZJY}jMa%mq5kaEY=b zkwg68c6Vg9+{dJInjouxfVs!Svucfl+N;5)tF;`jZE=1B6B--=ZR_4?X$88S`KY@(}2&xy=coV>{yIOIvP0GnDjriNle7F z(V2wGOnG8In14g$eke%B%?1XB!&DV_VIp`c8DGhE_VU7ps0Asq;{E49@C%j^8{wbF zcDg`WTJSza6tx!vnN5*NJ5a{*0?0N1^33?B>{pqZh;`dgFC^4Hm)tu zNCE^85}>ihH8=zfgk<{rPt}<@HD_w3=4vk1O<(j{d+$|S-rxH?4?*v^a1E_SwYbJp zkNEsfKee5jD!norrB{4V?>K-2?&mZ@nt`Wo1N(=vg#x+K-$!m#te>}c1L3iKi6k}f zB?9$6J?yOaBRrh1)^!)^`OW9w`S9g}PTF!M9qpJ%T)_li8SR4XE{;Vh=JiE}X8+JF z*9dJ6e){3f2&BGYX6NSR!J;A5*~l(2T{DB}Am2{pH4eUI=&e3y*6{4lQC!xl;c?)_ z!o__p9r;1J`}Kzi4GM5u`I6Kk(J1&VKQ$1h{#L$=Jv!JbyW$}W*%iFXC4l!2K)*$A zvXfgGEH+Z#aF;*s`W9!3xsxQ8Mu$$_Twx`Z6`M#chawaujc>f*WNXu^ln>c$g~8XA zNU5fw?<;~j13VaAR??$}D8-dEq)s8@2Z?nzxHdbMraTLER!xMlg*t-_lzn$H}QmCa6cX33*2)61Nc_V%hc1?svlR+4I=HB7ZP&pE{a z=5@T$bOrO6u@#lNGKZ+kDt`J|2K+>eC5F3f`6JNZrTwCc)uL=DdUOH&`twqsUg<#$ zSTRNLkWECsqE%d_MkbqQ{Qao}gx&%kk)F+U1_0QRqD239Pv;li zkP7abLXY)ngRMF*cKs1HpM;j8EwtJ5>ADnaKF#PjnsuD_CfU%BDKt!5Rr@@nU4m~9l*{VE{bsCY&%CQ;*6jR4#f8U zQx5XaBVmt!m?S5>9+oaJ2#sM6Vq4J`F(y-a8TCxf<0jN_y7mG@6-q)rPBG9{HSdw4 zvpH+&^>w8KVH-1vR&`QcG{m4X7{>_E^xjG2p$P57BzskAb8$3_WExn1nIGOmWGaiK_uct}+E3x-zUxn00c8t4!{M40ygVV3oK`LpG z_u3+e3e6*_4|;D!jIq}7K;ON2qoe}sOoofL1<)rG&DozQNLm;uRd5EfF*_CB)G;QY z7#RA2;m*!ZKK>Ub{#x5Ls}Mhx74JHR9=ST>r%i-#HWjKf=n$A~J8F}7M+J0zJ=;Fi zTj`FELwkPRWkj{S=z;F$MCveXdr36Llp*tjvQZq51kdmzXKP|DQ13z(fw#3p^Jf7i zuKpfNcd1g36LnCvBBEkOGSQVA>9&sV83ly4rCCi4Jjl8(Y@Rhrl7I~3hoy})7rBS& z871m|C3OC7Se^(CO<3D8Nv9FHelVsuRq$-=eaUc8v@#rn)!J8H57$R~tkFHcF|s{) z?RkO5bPNB;nk(u8dRN4K?mWe+dZwC4j2JY72q((LF5&fd$Befzs_ zKKb$FSOb~4epFZ7(Q&XK^=r!|SIRI0zg%^x3Q?F96NmLD`@Oz}v1?D=*s4QzCn%Gv zSuhe{bV@#YJUGlrr?j&U#S8A+ZO@{&<@`Nl{ufOqH3e~9v1a$ zYzQfDxpTc6>t;%+>Puu)^&1GTxVN9fnXcsIR^_R35|v3#MmE=W)?GzO8M46WQd4K` z3iohk-mNQew{x>SHfQc@J=UO}ZZ5pc>Q=^#;7XKoLr%&fzHF zsUbRKXN(%s#kT3(ra@LNHMLekjYMfwWgq?&nyR;MGP;mrY^L~GG}yk=ruF}t!+*J` zWZzz7S=FlSoANSOwCZDvYeDdq6^jsrK$?*Y&slaVWS-a6#iC8e+F?J=pJXv-y{V5x zlv_hycPZ<`wkp|-b&*x&S$qMxlOe}*blBG!cVy{qv*i8a&<{&$zx*G0NYK*HWM7kY zv@uQIv&LpMO3UG)&jSuMAU^i-QPX-2gPUikrxxrmdmk^uLI;yWS0`6EKhUYfQgpv{ zDb|vk?LI%5KYRc3Yt?eYqS~$NxtRT2lSk{Oj@UMtpye&i#3N?_(0**q=m7P5bUvY1 zVYQ4@4IBRG-7p0J@D)JBbH>c8k>w>5C2BSCd@8>%5CbljF|dTS-n9|(4`8-b{wLt{ zVS}3+VzoGxWK^cxEpRB zkc>{ChdLYD_y%KHgt0g?3_q_yYxZW!o;@SqdbIS%DA>~HZ5OQzk7DMB_TSrkj0Y`C zPl@(msqn`6PvoZ=S##s7^WeAEqld3M#Ewraih`G6&-U@Edfg)*VLyq+I$^Eh^}_@0 z^OnAbHM8~n27f!Dn}UedzpGR#Rzu)3r<*o*-yWzm5_e{!HAa(aJZj*43T#KC>b(Br zpB>Twva&snG>lT^#6FzFqCY z7Mgt`_kDOf_p-Z7Wd{B=8X6nL;tZ}>$K&Vb(ZAp^d88pL?*+hWQa`ZVP3e@89X(XH z93e;>`^k<_^hHSY;ySFSf?pn3^MhNR8Q6Vc8js&vaaD)L)K^!c)HGw%ISX;p)Ly42 z1=M&XJEKXv+LtM-`x2PD(AiYHmw)&IQQ^*CNQXH6rcYIg&n{WJw4#@Znq& zId{WmwY<5)5WvU!J)C&ZupMN@$!iAmEtZYoHPsoP&9`xDbq}<(z}d&Twt2@3{{B8g zEuBV!`S%Q``DJLX^6G|KbE&Ebsy#*wLexhQk?o-YOd~KM7}+-QNc?HZ2<_Ag)K~X^ zS%!?IdkuLUGFOpJUPOZ_}Mr@~6*> zcraL^wYv`Fn^k?0^a3|T#fYEyC$ER}pCG|oP@P9X2s0`EL3zW$R4wBHNoo&x6ZB@tylnhI6=gqw5qy+!$`P9j~ULtK|^FlZPqB)vPN~g;Z!67wUv?j^Woo(gp ztfh5`bGB>WEBMJGE`2GNBK@+OXy01!AAm*WA0RE`%Sofj0F3#3>ExEHC*4*yYCy_@ z+?GRvx}@wJ60AVAHzOk|iw-FKsEVS*xGyUW%u$t%YG{Bye*LvYsksX6ZxJASnI~9| zoF1ijyiufx!5OAGk%>j#RNBJAvi1iw3FYj0yI>dnVx?=)%sfF+nQiZO*FP^>Xa!y&H|T zy6?9j0Ylf-`aRC1*)aT8h@TEd3VVncxOOfURC^&+4ui+RFg6!~z7`SB00M)%G2K)> z-Fgel8FKyyQ?sS-l6gWWm|bGG+1aM24IVe7l|2f{L~xXuwRL^kfUu)cU-7R-CI9%l zlSaCFa>FBJ61*pGINC&~v=vfYb)b9q*&V;@#LH*5KUZ%BSz}vkpUYJm#ZH%r(TF`n z5R<9v?lqMyZ0h{r0qEX>To-*m=SP>cOthtLN$mdv^vnO`DBt`01oMH#y(&j(_~XFG z(sp)^>0D;CGI*L%&v1IZ-QXor1F4;O7{mlf2PxhtWeVVwOLH& z`{X}B$`MA*y!a}7O;@evx3QXf^G1_}+;mOed7lM~M=Lb6hq9O#n0NCLJ_F7R$rD;t zXMI)nk)J+5!kdTEJ2mRMVie@hP?RBE^Rx)~aAjKYhvC#|=U{Na!2wn*(N$3NmdI9Q>%dYLEa;$uCOA43MyQU%c#!#HMY!jRgKyy)B})2? zjp);@EN#(q792q4DI3f}FN}0r8J^s40zc9#-GqN9Uz#m>Nns`N``k1;1?AalQNDES zU64#Jg-r*>0g&C4ggTWvukU+Bl(vMWo6o>S_yEVwTFPX#I|LYSy-*iMB~MrlAJ*U; zRffT4titemIsUGwXblnzMWVqdOcDkv7~Dg!U%;8a;uw&{R!Qs2_UB*0$t49=>Qf|s1k zf-kM7=2s&1la}|*(m_Mr#q>*)?(qiRDt~|Fm@$N0)SjM)k0FQu-Pem67r0_#V-gD# zm)UDR!vOz>fv=P>iaUV9tYntf+~gAQWXj$}cVwGOu>BcKQgUQSvN5#`p(7gb#!3XO z0O@ccruwcWa@Yg04c_BoU^wWa5!xP_U2>Nc%=whw-MVQ7ZpJ1zs3Q1EsGBQ+d!cV? z8@1ZgF=4fsTO?v*hNaSd%=zKNL1|h#de~H7-^fEaV20%@6V|1g9X#cUh5A2$;9aBP zgLeM>%@#)fUKMgD)hgvU{a^@zCeQ1vdITVr42Sbvt^6BQMbb!*PUNpBqa*RtZBJ^q z%bIOADNn2Osc|JC-dGOsz6Nkfai-mIhjHkTvg_k4{B>Q#0&pO05xiSixB;40C1Cs7 zz%Mf+UHJhq;|5>MH;Tb~wUuj5Cb5A-xD10D$uw(U(ih52IbV6{iLbLdQCb?yMBwB+$p=-u}(ayMe!Quy9W#*@}HF!RG!-+LiF* zIT02BJ2y48JRkt)h~iwu=#uRbD~T{hYh*a%=6i!@AzTV<1CBUpxI9{u#=M}h*fcZ$ zV%tkomy-#NDXr}D*Xf_mR~1fBP|TXy!L7KVd3w*}Xl`V@SNcg~B@UyUf>asroe*`x zo$rep+^pNQ_nkpzeM#>??$sgJLo`iKp;ou^Y62~nJy~zpPu^>24;$FngzUVL)d>r3 z`B@vTvVoh4DhfQ7J}AyJEolcH`lssA9mB15`ICm?f34`heY0%QI+h%P<-&&SJ>Ag} z(Kih8paIAJIN&cJ$y+Y^V?vwFpttM8RhF=3_5y%E1Y51f1eLO5BEBGmgszrVy!z}7MVWjWEs=gcesWh3$&G>r zZc>1#o%8)Ou_89c(WB?*KVXxz(mvK1N$oIx`)`5sHlUB}X28s^HA`FxNeq-HXiic8|&z7Db?Q@+HW^DbIV!nzKMlD%`BXLuQCC>Q+NmoC*4sRfrX7)x~dCj9&% zo!daIwoF!oN!xr@pPW5aeT~gZr1j((eiHLnU1- zs5*8lMdassf%lNra&*>SpSq?UuZQs={n_tXY2Ld`c~^dE%DKFBe;6owCdKIu#UV(Z zXGj9iY7^pI2Gmw7V_)7oFem=<6uJVf<#Uh0$ywIO0Hxp$-%Ew~_HMxxSCH?jS6zR< z{m3(0XHsq@Er3WT zYR^D@R2y@|rfySGWg-v49{%^@-+}`!c-Cj5rS>XEl*U1d2KvqHM7kBf z6tln3T!k?3vrm7#9#f(X3ugO5i&t~#&Rg1}6FOe!&`QD5aZQ!dKdczPg(7^8y-^ll zTi263FHQ%}V4JX@Smq5$vrb5a!k@3j_WSe zFs@c(^5B?LZi}3ykNUXuCqP+?2kFg)FEn>@kRYzh61A0$pib3?f)4b5x>#r$68@Ke z+kZUV{=bey`YM`i26uI^fJjRWyApFkRd5lcZ2!xx!osdHWgUSm$ zKgZuiReh%Gfm+);c?0z`L7>bITy5OgcxZsv;S3Xy@OSCc3Z<+E6Hvr`}7a6W6t1de%E1w ziAZRx+MTLW@cOt}(;#i1vu6lSUW59V&5#K1z(>&t_^7Qs*bxx@2bu)jPOXA9J^_nM zk2j)e0yMLKEKqYed~u6ge+dDFTUHPQj0o6Rn^b_Vr?F4Uyt>?evm_%M&YF}|i<&~pq+F$YmcU8{V~#H0}y?>3Fdh|d_< zTK=L-JFJs5m}{HTfEFZZI*VGfA|LyY$Q?)1$A2YGmO zKxdCmGuHsVC!e7~ABmP8SSkCLY}OfaJ)VxG@#e-BN6!|t35&8lnJ2aXvG7_C_zI#( zAupYlkzV)?<@~p(LuQ)p?`IFXx=7TClCKR8A^43Z7K@Et$+Pp2x{kvAx4GT}5>Q!_ zN=mMb!i1MV+Om{8pxfS9+mv)uy7W5XNm|P#jcKcy2)NDiHOp_1%zJj$A z;5PD7^|SZWiuXIr0#Bs+aDIHA(EQmPGw#39HEw@ZuDkmZOGR??K@G`$UB^gl? zz2qL2{bDLMnulOn5HZuz_Iz;7U*<(cu(rmMnZ&ib+HSoEyxLxcCGN5@rah>dFqixl z(e^KbK?Ry^1LLx{@M&6sbJtWN?9an+jbvfJGNt4O-m7cyhRd?LWaCPBIjzbp7-ZvO z15%w*+pPFocj=~WDP>+Kz&DzYc(eFcHW@8xU}h2PRlIC$3D$E~O*s6Uwt@H__x2IN zf_Ew-v%njV`$iA=p;GD+xKS+*tNN@!t2G+Fpr{&fEZf>lD7)tG6jz6gs+f_w0K?Jt zWNI7+S|yaErGRQjcKY-Q+2H-vf=heNiT&Mz!i(0#46vZJ+3=vzsKy^y!yIGkexj|0 zXw0Zw;+AsDcxYGVuZ+IgR}W=1KTkOxwEA>=MsxetEXq@R(%vS?rsKCGvE`l37hnQtG%dT-(Ak$6#L150G79p?5$b9 zC`0mB?Kvk>z@#>*9^ldmeZHgl8nR(`>81*oza^=;xo;k28i`HD53`+iJ3*2*Vk629 zQpZN=m@XSZD8s9h)@}=SR}Q<{?CdfuLeuV!1f z7Dp{8eh?R*m5IT8leW*xDeYguLLbi{B7Tw$&s9g)!*$3#G(F{b7o@|ahDXV;h5Ek! zu_Y-Z_^grB?kZ8((oCPA9s!}9&mAG=!p}oALwzUIJ}xyLKbxh~T*DbbzB@Irl#;b_ zSWnR{mw2SGclx$Pd^+*3N=J zzs464xcy$%kOll?<>WM>JE?X&j=e54{`LIYCOMlVt+zm0gQb%ZzllKl{x0i__uGqa zN+rMcMRC)U?p71BI_wJx=u|Z5N*I-qV$%DDX8y+XmX!HDj0CpiQMFGTSuuaksLBY5 zNd@adK6|}4sC~+hNrwrMz-V7 z@&ibG00C`k8|7XP_bG9$s}(6Ogt~+X2h@oeHTOyCpFk*gE185sVX(Jwg*J3P0$pAj ze@x6y_y@8Sdevd+$3Gy*=|8z;w&Sh?;UJ0oeuH_WHN-snzw3VZ|K;yLsOuzYsGV`c zquDOzu1x2?+_t{B$qKLK&Dz&hU;EHnP@pUJCTQ@-$|}48Jm8}sNI1DwAa`2N)c5rF z&)eO}`$PP*=&;~QWJmbyOJmPA7eZp#JAcHOvc!us-t(NbI1^^;IZKMmn(kLLH?6q z6JE^P(xmb%cBw8iz9DrL)32oSZ zrfxv#7YKoN4aytbgEEF0#aGmhb2pVg3;c)WFc~>3oIV|uFDTe6`61?5nmW^gkf1?Q z!S*LU1Pg!LdPw=jj;Ds2{(=Lh0(8zAF2%w;eSWT`xc>w6G=~$Y?Un!6DLBZ9s@*NM zc&k$i9t*CN&*q+OVG$65ijBDm@VVp5wlH%(-;=D*`CBRl9Sqoq0MX{{=;C%uiW&m1 zp4cgRE-%h&aUu!|{Q8%a6RNye`>3;}1*YG>$wg+YKh8vUPMQDi9^LsrPP43J+uyt1 zKP*heH4iTuE3K>0G(`|5xOgC3U<+)q!_s%~gpNn?>qD}cKhQ^kW`bZqS$KBN<44n6 z_3rAxv}nH8?TO_{vbLg<9q@z;=go9wc_e}4dLeD~{=jc<#srZy#4G!VUE;y1;uzhF zknGd{>4Y0u#9sMEP2H!IB?GJWn6x`Y5u@bwuRaaDHeJvKD&4Xppy^Cp>Egm)kEyt_xiE8nspq+45btW7-ktJ@m9g(Bsgl?S>f))H z3wCz+L59S_*UaQF+w#YME#gYc>Mr(=iK{IY`6#hbV;_-Rr#=b+9; z`UkZ4x}#SLLg;Rlx3Ep9^aRn}1&MOvADR3Uai;fLV{i!a~kklLi7%~4HF8!M|K zYsOy9uNPOh5C3bP|I_Z$mjTV0hRD`BTT}|I)DAGz+h{%Q9D||fWOuHH9LP-Rc^$lfd;yR z9hg)|pAdC$QuSqNR}r!Al&>}1vf8Dqn3hdlCivm!R-mI)rQOrX>iRb=GyBIgC!zFu z?uU)`wBDbT-b^hoc8{L^kF%;vCEv#x@K1gIt_e3sdYe*xRrG>U7Z8}42>+rAnvkp} zl!E9BSHc9!wR>R@owc2ymO>?Gt$1yFU+I>}~ z>Rq%LAJa!$TY5|%TBzOMC#jP*3rI_*cf>8;@rQN8peMgT*&m7lug(bXc&hia=k}`W ziDqXiIDdFF2CE=h73C}j2cJ-sj(E#^=mC#;mSlB>ZXVR!rXwkT{puiy{+1+Rmb7&^ zT4162WC@fC44^l@4wY`OdC2iB!xA6?N_@)1kHb@2fI-K4brF{1#nTqlmh}X9#{;Dt zinMDvVAX> z%Fe}WOvLzqJy|Ub)~W_E(i**$n&GvWqfk|R0*xlN2fmPe4k6JEO0;Xy>>PW{ucjKn zLS&Fr=9LwZhQR<5_}wbA`=~J{?c$`z#UfaP{y??5uH+uqNp)#OxN6zV?(EfqE%@zn zUms)cKKPcudJ9W)0_!TXSI%7q#&i{4DtioFyC`R>v}!@EeqL&tdu)<3L(VSa8DGw` z!*ZLVYLu5S5voQ`MP8Wks@vhiFFg0fOIY%;G-S2tP0B0{9I>s_RqKkjB&{5pE(A8c z-XOW_6!JY5J)#Oysyn2&qMa6YcOY>$_{qFSIZDmtH ztKG7&#!I=CoT9(JPM39s$U2lZQ|PVK;52;iB%vcdjc)0kghbLn8 zcJt7;52W$nG3C* zVfkFyddLb=^JRNy?#17q2LAx}dyEa?D4ZGFA`g4#Fgk&u?Dlr_y>5}_a8(vbvSv<(D)B9G8Xr+ zGP<@eer#It<(t=+1y-ok#l4!_mtQ`ZzX|k-uS9y@TkkiWYuR3N*W5+ye>o1U`Z6FG zzEB1E8Q*A#2p?(F_y@RA_WTFf1HG!K#?4jRZjU8fYTwOg4qJsP17Zt zX5mLqK@Vn!s`>lfccR5t9-Sj$%KGd?@n~0d4TH?64j0K$-Q3okOEN2Dxa$N98bnzGD6U5NY`{g;|tx2=XnM)l&ame+C0c zXNrPQ@A>Ib8E?Urk+Ut?x7#>F_X+V}X^F`;S^i+(4b3t-FsUR2rubx?oyh2|yovPs zZ5K+d{@6Qz-!kC#=CRa~*tp^-tx-rOX~Ql?6p>QR;v~Qi;^E$|WF{RRcXitjluY(l zTnqHyK_3S`QmM(M(A3WY-h$ab2dN9*oE7h@%NnW7nFxHg@MI9M)!R}oEO^7Jo@HjC z$HeVW&xI-Y>Bf2=zDwGyyL`_s5;^e{0^><-7U}&5*hGbvA|d6+C6C0R?-3`FN8rq@ z=&~7hu&1{t#X~lKmi-)!bhG5dOBcEF$>3MVif8R#z>D_p?+gLCwD)W_tzHU~-&M3X z0w_FOj6yYz23P*}l?qzk&7oXc3j-iwr_QDcVdO{!O#+?b*-GVgzzmJtHSFvUJ2VK$ zAXkIM(Cd=A@7jQoB+KHR>^tU(scbIVy_G~tm5^#~kE#1_#E=sxPOol);CsNgIZ`>f zJL6Cte^P0gd!P$7-g-7B&|vdnhmi(&vr;0JT^YI5y=X;neS8 z@1Z{i6AytUy@BqI!$kOWW!0@!q9W)wlJQ3<&krX&-#n|`C5p!P4{N_lj9R6sDCEI7*yZ3C# zawaVWQgBr&WBVpW86QJxkebRiCv(U0S0f!{HMwbQ7TY5_E1!0>S>)-XdL?TbXab|c z+XODahNE!;?g$!zR(OtqgXGF%EDhOBJWYEBU>CHP|FmW>FkQ-}nzO_wtGQ}v4>6*v zHE$EU9k8<$%HU&tW?#AZy#m?w48~kyZic(=+gsl%niYQ}aeqx+-~!EVaK%VVF;)W? zM!LpN15v?)dyFHH##~32YG)OsvKkwE`@AuC2bSi!jeAjz5)O)JV;;Xm;)=8}wPxMs zgdC<^fD3eqb+XuExrA*t%*t$LS1KJ1@PaJ3j>vM1NR$lsRbO5U_I{tAqjC6{gv8eQ zJW>8(8$kklqK>i|Kg^c&&>o;NrF^Q5pK+Em*SAQAaFS`6a5FD1{}!}SO<;OxvQsku zef{MI3u)kQ9&Qt|ViJ8Hk1&pcFp_zr;pQR4&tU`p2C+K}t?Y(eoJ1C-qXlk7F`q{v zj`DMj<-tac#a7_DT$Xn4OUhz1B{ww8hV34ez5|2qE$5F;WWM>bZQB+GqLaO4GIOs_%Pe%7mAUvyfZ7KC-{AT7!)!~t zZmH0`;UDHYd)7Xd8X$aVAxbl}WAsO^wF0B{$(2up$m!r?fmf+Ckf>Vs1{lS$`;*V= zgR{rOfVWu!xt#^bkZP#_>w%9g4d4W6>I^n5a2&L^HZM|(EjJ+clZ*P1dTyFP6nRKz(HuM zl~|SX8>dJP>JA2{3^LML+uxk(JQzHuDMu!_uE{_6B0n4cex2 zgp?zr`C>q@okkO^t?bZ5rMC&3T6{$1J$gg77xu55cuWs z3GI?h{aiy5x-4pQ&v7K4*GcQPqZ2xU0-KV>bi8>OA%}+14^b#4x3%I>4>!DdZNWru z$xnfdHOn5gXej|q0@S<>{WbW+B0%dMCKL!InYQ&&N1U5`LY;<&4XzUGX2m`407Vrx z4A&B-MUOk=XsGKwrn%CYCX-cWlG^Jw^z9f$QQMSbknFpbBWkLp81L7^tJrn}=XCim zAxaQ$AKekK{4F?eh$LWK!M@G4u|meLQz`c2<76+pu3!3FYAm4kE0B-=d6p*?|PPy1-vKyBN=_%!JJz^28Z%}3=q7ci``w+u! z_lqKfz~mh+{e_uluzdo0hRnq!L#=K&UHUKA(M6mO?(&$F&Pzj0Db)N*Xq9`S|L`G6 zSC*D@&a43i`DZeG*9?q!OxB-+O{Nlh`Ut{waN@s^+)i)l!p_Fjt#>L!G++ z=*A*Hnj#93NQ##Rj3&F&q5E$AYQJG7Xi*A&$*DMczWolwPmOoMk!XJ}{B01CzBjwX zGK8WFyex@ppJY7u@M55LHsq0kQj{OP)?v@I%$8m?1|(uPxyb0jRJ%AP*`MTf@H#(P zMhx>7flSdUt&k-jeMJXmp@wU!~a zpox)rVxGxkK(Y1x?aQkr`R6=1X`onA619Utw8uuB*71b-^SPYL)xf(E!Do*IG>d2P zZXM0H0DDPu!J&NLT&bWk9j%e7=4+hc^xv?)le)&vecHIG?dG!vA=dJ}(ey#{s!Jvq zZ^S)@^{69u9tqJ7Ve^s1r~5kli#BxpH3M%nmDh<2eU0ri>TgJ4E_=|rvx@fdMzbzy zJQo98-;G;BFG$jDL>A5j_W7X8h5kQ)<@}2?weVR{CR@n!2C1yCW0* z(eNHD}lm^Qp8`s{YIC=&kddhq4{^BAeDewS}iL?cf@T-_jYU$?4Y(wGE^hwv86$ zS{k#@iWIlLcYGI{%ECR4jmtty4*67+hlO{RaeR8lsvE!DF7zpzrZ?-=*av4*i4CQw z;U=GLwU0C-1|=@Bv>KKv$mT2-whrJKeou7~Z_QQcn9gMn>P@?4eVm@Sw{X$hm zCms!#mgq{`L{1>R-A{kofXbfBIzzK2>h+^U##Y2qan>?N=Kgm{)@Sho%#mqo6~xgI zlx^veDo<_23U+c%Qxh7mfB$xVB|{5h7;^-v+t%vV8pR}CkE;I?Wif(7x>qi<`)%4t ze(HR0@q6e@a;d`MMCVn3j$TT;E`?;V9lKQ+? zD%G=-2fi_%@^HE)s1wpqa)zSru2#ew?moDEQH=APo+qpqbo3#o_~_oRuUR>-+nC(} z3kg`~L~WRhs08U7^CGkZYlCBIj^-Hj#$#99;a{`q#CF&Gb$ZaXOJzOSG79O*E6s)z z*1^WrC8!nAnfziy{x*(13|<>Y6xCRy5k>k=2p5J_f6Pg!57w79Kh(4$@qJ+=PKuV< zqklU*-rc&yRyn}JZCHEH;uRffL;%PTTQ@+8_H^Dw+t(5GD2wF^jJQ~YOc^#S8BMAH zWbQdrBdJR=3nAdAHnYY|HCN(#W1)IImZE$TdVZFNRuZbqaWY)ugn7JRRI#GYCYBBb zQ7RC?6Wkv<_fqsE>tkrQYKJ1qWZ!^Tb)&M>^Ie6=rji?D>kpW###&|?sj7Mzub@v^ z>H6q)Ypw<%0WX$vn)>tWG_qCE{SjiZz1Xc|mJp)r8asyaj-lod*R(K(g!}0RaFZy- z6*{lOnxO;TsGZbJ@|57svj#FzCIWtLCax~S>p_^56Kh!6)Y6T~A;*~1;pR=l{PV|d z{bKMZy_Q;~zzp);)8};(`ZlsNk-R(P+d~@t!kGguLmY(O1^h5;DI8 zcm4ryyL`sbzcG#*ledB#s5(&Gh#~s z4cT8olSST>(%Z*`xVYQ_G5J%=y0zo~94) z5U@wmZr&@yF5D6+8#I7-(d(#Ee2EV`Oa}=Uwwsa_+{s*B==>FHB=C$0Q}3qJh$!DH2%W+ysrtlN;awAje0zL#iV z{f9V4OS|94paTPe&b)BzqHY#&oT%Y3VP|_yM%E~ui!wV&WENL;wg)~l?vdoA>qfy` zVt^6WqV?Byd2IPS2e*3PbIU>Dr$hZW`g6y;u26+G*qd2IqFJJBWqf)-yU32%sXf|FL0XYt z<|P;yZ0QO;y0nX__uNpE=w--qdp%p5E7{25t5&}#+XHD4EH4XUp!^(#&sG|*g^|)s#uJriw z?XtRJ7RVBB;7DEFpsQ_ALo`FIszdQEC%c9`4RPGMgKYQ7-N-?|uFU4gW9C=mOd0ug zYO{WbMyp3Wob-~iiHF!<9IvK|>eS%D`+J^!EoJ8Vyyv4q1H#0O_|6SER-E4Ejn6Qo zUTAr(sRR^;;dgdBWxt-uC|zQeliDy5sYfNLU7*DY2oc3@}hvxJOpsJ4#+jT)NW->*u2j%Wc@`iWC(uKZGZS=U9U2L)IYCF3Q5?Y3aSrc8kh%?b4q*K;cu zI`Sn8#RQ?OO0MTad7K>$T=}otpV^PW-3l%_3!sCrSDWDRc0_?)yI!l6i~NhD+L0mI z(UgPL&VccTC#}Eh^tB(GwKnZQqh}GH zp1fK3JepGQ{&O@X^73V42FF8>sUoFV&lH(DE zpd7lQecPN1+{8kROZ2Vj3<}dObGB|1{pYESVC|Jz88EI4FTu&@^d@a4+Rwtfv}Tu5 z2F{~vhF#!WtNa@8^w7>+xXfTZERaEt*SnRIub=iEH+TG7t)6#|Xm#Y&)z`W1#P-Pm zMY`Dgvd$Fr@WS3@RR@a1*$qq|7{GIxoT)m1WeC7Ya_l)19Ip)}0BHI-xB zuIz`w@$7SY#<$ib-d}dMAb?uGxAus*6Zq!7n{i8`M$3V81Khf%=BfQF=G%w?|F6w` zX%%*rbb92f1cVH~eA}LB@9#FG@lOlnY9tB!SWi0#3w_xjM&vQOopxAI>D1Y7^Q985)7Bva=aJVY6QEJ>u= zHbxxrxGxm}lB*O3NyIT(>BU1_FRGQSKRu&Y9{Y%6mDwTtjKxsl<{m;KwvyBLFgfM; z{V69%Xy(bFZ-2_>Z(panv}|5pwq}DYwP5=etJ1OA9QY^8m@uIUiqRkc0783t*x7gb zvi=v^47##!ihNEED#R&xXCoG_o-r|X>a5wmI^|)A!1lrPYTNC-*zVdJHSQ z@vz?s*yXt*mj3p|hp)SheaTc?erCHF>(?K@i{p}wa_%9Giz|ws-VD4yWS`)#y?>p~ zAEH;?_T**7o^*Nfx9t?^KdV2C9wL;WuH1-d*TbYJS>04_MA;DgR|(CK^L7@t2rPi_ zv1GH8+r0oBWpZi3YP0pp%aL04C9L}i!&qu^53A~FhHuJph>MQfJldwKO+K}z%6hr@ zzEK;|%@8r`{Q7Z!4VS#d%P%B2KH2S=N5lJf+6Ji?pzr*%P@Qr;+`nq7%Y)4wpq9ew zk5saGFZ7m9y^osTs3V50B52~L-#ccd5v9JbDEfLYFLLqN*pf|H&OmJY9XZ%L2kd1P zN@(>Fq@lA(6ic2}==3V4DXGGsa(5>H>Q9OyEI8i3-kaolmp7H~fo*O;^*Oefq$2kb zIeF0mXJN{=GF88-z+moRl2Fm$e=)E}W&GZcmaM1hxoI0yzP{k} zQQLmx`=`g z0!c=h1Fp`m%MeF*u7kUUGbhV@0oR|kU~;Vf8@@T{BV?{ED4?RF#fqi**+yaJO;1%T z66s$lh3dD^`AV29y)3=qlPdMd1b+t@TYu#dgt!_8$!ML+eB* zwXBVWb-qOp^kA|6j9Wd= zaf3<1-YKI_UikfL?$FY>;XOmU!qylRMt`8=3-lb6N0+=-U9m2}R5?1d!ss#_Um=Q2 zAuXd>8k{@#+HS$ZUlv)y7>D*}=a7hwN0@9fY!taj^?tBWLke;`Fg=?yShLokEvx#8 zdav$l&8s#oQ(r8%Z{fNB0IhS?&Z66rvEkzwYdL>4t2a`6y*jUqY9cmYTPpB`5~>lo zNtjFPPLRnOf6v$1PL_B*kqoKVUH#l{ohpO=$}B;d#Rq3t0_g}YcnOh7BBbhOA7nx> zm~H0C`T^B02D6<5%_~F(E%~!Uvo#2ZYQ20XpPw4XX&lcb-ch=>FC6JWV^;*a9J>lK zA#buu)Z8UuZnyyQCkhwW^La({5R#nYoQ|rmN1BNiVFMgDBx{VXZkll76cH@0?$Xe# zLi=V38vMegFWB)J<_8Q{zcE%2I+moGJ_TMGHVPwz`f}Q)45HIH9aJL*r)SjM_c4v@ z#|=fJ>h6LJs5^xv)v)0OMTPZ^?Us^4lkth_#*vTro5Bu% zr2JM#El=ZiEo1{jsW=~09#lwTO?~V6goYTL!CTJk-`uk()^iN@X_{ws_-^?νw4N#}ARbN=5)xBqsmW1yt+9RdRVqTx4K)MYLjW%@X@qYB7E>toSpl0J;f_9z}n+wo$f zY&?0Q+(LVL$0y-*fPhfTEtp9|H|dlegehz7B{7vOdOn2tIi2cY@;l3g<;oj9Z}r`z z!&(mT8uuJh1C!X$X;aVaq$$TY<|&8_)^StR*e2rBt>5;2dy2QBR7)2Ri|Z$96QeUY zkLd2nj`Z>_ar9U@@j9Uz4!DOy=Y&2FsSBE=yD1jP;{YmXg4VqRcLszzLsjOhxY{R* z-hD|7{q=YrxN3DSmd&ywh1u|9XwUO;{|Q)C(tV$>b#64*Xrk#R^` zK7|PC%wuH6;yF9d67OIZD-O}8+?c649=T=eS$^lU9Ca=_c{G-g)tP*{efzpkNb>92 z1U}mC2-2{IfpD2;{zQ8P4%e?t z>VHww`6dQc-1bU~-Su-y(C@)G{X(}GJxbqO0WA~wbW1>XE+#GOL! zd9)>ZjauKRD%(4QiB@$KmRcQt31yvyMlI@+9&j{L-LFiHiTNdVw|@QR>-SEU9&*7i z%iG13rbv}@Lv9SEFLtr7QBM~Dm$_B@FP@rhskgttt*%R>YCGmS8{zC(e}52AK!0;x zsDO?>lgsri!Nbu%wwLC|^&FH817H5yY%WrHv8kJo^1l)GmO*WW|Jp84C`F1DcP&<+ zKyh~n?vMa2Ry4ReRd-gf|oDcc1G837} zWUcl5?&rF%mPI*=)1RSq-#$gQF>$&>ZK*FCg#~6NTPoIg&7A$~5qPez+qwC+f&~s2;my9=ZaynoB z!>G|gMc_TWb)0Ieidq{s>EYQtA|4NqZA(#)pZJ{HTF&0F{V4{O)F0W!=J;Ucw2^XB zC21|DNm=}2*|w{M?IsUDbmbDF7IjRgqalIefj6#}TKk@3ZmQ~9vjv^|Cj{l{6@EQ1 zn$vqR5gF@&m2r{JMOYpYyqx&qMWdjUWF6FmNd>i5CCsL$*3!-BQZ~e(ycVAUdeOe@ zd8T(OBZ80oglaxYptnOfHeZ&3%+-Bc*71k_r1-iXb=lN?l}?g-4;uoH?Eg@SLi$&E zo{;>*U?+BW*3EX0exZC)uT4gP^c(SlJ+&T*8n++e!1D;wcMp#i7*@yFI#mQT>0lS> z@cl6F{3JxU2F_jNcwi%96-gzfa8!!d0A7-XXjNg3A#l_84>D_?0LmtTwjZbJo{r1( z4ar>K%NO8x-iue`yIofYk`ZRzaSlGi2yjBnk`HHA^-^T2K<%hB*ErJerQ4j&8&XEP zi9JJ@mJ!XER~UX(C%Oi%l0tWWZR;g(_arYr2l9M$3^Ty;v&GRa4-b%Lbaqj-EPLxZ z*{$TJ>A63Zwd({K{Ot3DWhNsU1MRUh`l0SdD=FrDrCm<8F7k2J4>{ALZEY*KUmBn0 z)4OJA-$7cZhsymsYOuTA!ZIfeW3F;Dd9h-*6WOneAyYAqyqx zV};r*H`-mJ^-E%^uX4k7eNFOWvd%8qq!_r8d=2taDH|ykUck8C1r`6?jhx8`Mw*N* zlDM1F1eF>`u=-32gFW@`fkf@cmKT7zl3RNYM@<#_t>5*>P3 zrA}9$!XI6mi;=yiDD%zWi0A&q4^^xArrU-(W?mAsfZ{x z2WAJj(Q_APvGR$d{ZZsz$FpcA1@rwV(QS3bZne8cwn-PKnGTUOxa(^M?XHi%ZrQ`? z{g=dR9Hjr^e@o%NqTEVw4YrSqvyPUGq0<9If@0J${uB&{zHC-Y`jEn~a&di=mSx4> zi6kS-Oh=^>5zhl?8y-Ab8n)`W{lg9xLOF!&Ov(RYK+gjO$^$+lHViZ0d9P7WR0~|z zoAelrW-fUPc+$?fSrCp)YDFt&P{b@`zqkxh&a8E?-rmE^9ne`>j6k~5bQ~Uz!7A=` z4gzWu%Hr;L`CJw?fmvND)c^xgG93-w^WfV%lPDI*KE2^ZmOyV%# zmc6JV`^PdjkpHBLZKB8OT<>ZA^-VTAd*|A~qNoWncIaI+Rsgb~1H&6YCAElH!_{m3 zla~=VYrD#(3Ffn0^df9;qX(q#a<}qkKyj_tleg|ys6fb@rfu!d9DR8<@_*J6QJM7L zcN|u)O<)H{p^>gZmIpHNubwtlT4nuGQr|<@&zRtf|2T}FOR0fcSPKfhNfMUih3HKR z2n!Mwck9-q7MF@SH2ruRbhpEpi5gQ7*G_Ky~E!t36q7K(bg-)D{ya)kUM+yv%7(S{<@XV ziGRHf&-zpG_}a*{KQcLocoO)sP5l^KHg%7(CptCz+g92$c84TQeqk^@yh+9?CeA(y z*|wKWmXzPHZ?vRR#@f*}-Fe8J&LTUf*SP2PU?l+#Ue71{8D)OzGI=xIj9qT@Wo3eLr%!2?(%1u2HJNhlx<)ZCuQ)W8?1=*oMv{f?#ignjZDhdjaU zVoxnnwqgZCR1cD%-?mW}>6d!m+ptY~5s(N){A5jM^3Bo@d@}Y1kwJ;T>$1`0cS7Mi zLZQ|juw>!!5qDXXV8>^T^5InB7rDS^vscCb40aTWk~)FO>?#aF6 zVJ~js;4!RwaV-A2u9}7u|7wIEUV#CF+d&cI9*5$^o~G z<4&-5W`541f`L6a4}$yW**jY_jWKm}$dP@-Q5F|+p9Y--LQ z2(~Zcn!hOgQTzMe$ z+2R(1;>YhAcc@lpJ>&X@B0h)JhS%|Ty&DLV$-%e(lL%&-B4O+dV&6V_ZRBTvh|13X z0Jo&a{4F$?VWFWmVX)K<9+$uo-=zp`;a;e^6;05<7SkFsl$-{a2irMQ(5qw21bs-W zWsD9ru27!hraeE>`CeOyWPg=*d>M7+W-`apb-5*l=+t%5Feln8#v# zKKVXGv=zpG(YK@#pCjm1iJOb{M}$}U9sNb_l+MOdiHj0l99l zLOk(*S;CO#*y&rVD+k>h%G#yuusOfxfI5;cZvT4bsj*f z^X9puX`@bovqQDJGa>z)2%FWiPm(B$)e?lLW-u;A#Q{6*i}?7R3Gn}p2741M?*HHB z_5b}jZoa?S-$OtXl7~!|Ar$9QU(Qw-z9}SeZzt{-B%t$KkoJDTww&K`1Ac>n}OHVrqbj(K!NpeEv498Ow!VcqB zn5ez|&s%<+DX-&HzEtTN4gECfA6!f2^iEp!h%igjE*SU3ul;J^c7fgP%MtFLJbrdO5;i=Ndx`ql?=<&X)f+J?&u)k1EMVd*WRmyMJDXZA%n&%rm#GDFGtg39 zC%qFDtv!t&Du;&HYXUsS*mbhkUs(45dNm3sC%t|W4Zsv}%*;KcBM_E~lqhE`1!}boR##uP^fusa`BBX|tZa?^Mavdw*E5{0sp4x(^>Z zaXl=gxD{c_t@MHSG#?Y3z*WmE>+i5fui@q$@?JvaYA7;G*H?t)WT|TSbTRVdrQD9R zVQU0>>+Z8_!1wDw>uLZm2ahI;H8rCdf$5C?EyD}DX4Uz$`caoxPAiiMIE?_SK_n!j zh{S<_nf+ZMYNy#n+uCt1E&_G^HB)r!I5+Ysp}pKo07Q(}=EYvdrI825c_0Oo*D+u2 z`g{0vwp%ZZ|B%IV8<^BFqZ2r6SNF8*3=c;oa4nJkQb^@;YCexI>(-4jIO!JKklSmj zJ|Q74a;GlyRZRCseI71sPEMFJTRBo&%x4mP+l0-;K2>g42&O}pVAJ_^qkihXgf;C_Kg-bC_#LQt??22KE%zU zW}{~zJ`ETu7~N1Wa$S-Fmri2M6NzgDkfc48%skp|l_CS-4pP%Y6RSA$LRiiTQR;$@xiMz#9Qrg*+lFEXSvvF1kXKth z^GI~RL6@?XhkFTv#2RYQBmPkz|5@K44%h|bzIO`d7>lBRB6L~4f2~6*c3d^ohAZAy z!-*Q`ryS?lv2mWx&cfHAGQG7Ijm^o-v_Rz1hn@( z6|%R`hHva;4A`T^!BDovaXSYKKA$k~5F<@;R$o#{A9!O`m=w~|xw9i{lFHzu-H!ZL8eQV3hr%UVBn2m5*!bY~xD)4K z=q82hRVv+vh7N{-mtWQU24^0c0_^7Zi_RW98(6s8`=wvq3j>JzoGZ+Zyh)0Ywm|(V zJ^*aQ=;hl4j;52eh2qk=iRNeH*z`C=9;!Nie3oz8)~p9&rV97kf7ToD@xgZydV(83 z@}{!<^sM=r77=%SQ>hY4Hxd`4!xOQ->$@VM>Z8Uz*~c1ao6j#5%57GegB`vp>0wX7 zrRg}bk``tz6Lyw`=?cLwPs{_ONx8tD?#)fS2DrvN9v?`@rC!!}VOG~Mis^mjeij)+Q z2qZF)`l{+X1D|premZv$WbbZ77pT|a1(c;X^|Qyr!=quO9*pIYwYx|tj2A0j0+a9> zUAcca`oaBwzB#PjNknIM?oHV(;vWXpcw5azPp$mhsESDkT$$U#Uyc4ful6_kT_I=b zJtV*0vN+;D&_c?uikwx9YV)nJlxCI$hwFb%y8F((g6|Y%@ zZ&}J;61fFq$DMV8FR(AQ7Dj>NbMMmniRV$$nb(bshcW$&Cg19^#Lq1)y=Hho+2%ay zd|tMn$V>Gyz}U%TBvIwW%siy^1g?pv{>&Dz5Q-MC&5AL@R;Kt6j(ro9JUwlP%Z|ip z(%5o!{@&^&EESpmehu%)jfFFlqm?36=8*ieTi09bKAZGv-}9o6Lgy732~ugPNDBgP zoC+fgB5qp`OpCqU#Y2iizeS5%D!BaG(&vv&n4he-p2jN-5{CXUDmRURw2ihL^-%d| z<6&y@fJX;5(8PMZP93+iK8K2$1ZR(3i$Yt6M?uxgqmxK~x*S*81^Blkdp@iT77hta z>1s3V%a$vX^aAz7nDgea%7)`;x56%`)FOhL;igM-B|f&WeTr%gj8rmV1hx2znjS0M zPOZbdLG&cb>6>-W^EqUOjNrF<{%96^9tC|94=+(J+hpfs_XuDhN!qdu^xEl817Bi4W(oSlC`Ia8O(p?!|mZ=kbYJ+K3}b^?)``He>~ zY#-ELWqS^-nx}KC00g9UdG!q9KfNP*##rN7WZ*Ixnq(T)<6gw!S6SS=Lk%#hH0B$I zugLSz4CqaJo=;hu>e;G&@)o0Gm}8iDa7vcJG>NkJJw;>tOEOG+rwfr2CbM1XrIU@G(RYPY_ zehLyef&d?roj%`hYtK;R;Lqr1r-ZLLR1#;e&j~2M$3yPhI5ciRx|}qKTMTX2ZH0`B zJinew(f2Mn3|lEf4N;-SFuPeF|N6gWYYlUaCUJfzMsa7tw1#e3CM#ULhBy)%=)jR; zO{V5c)AbJ%qzLw8m*&Ec&vROFTHSd;-EZ09rk8_c;_CR+3|+Y%_rF$UcO+BLa*Oi6 z&a%Cty6wqmk;JT%Ty9SUdT1`1y|@W15!%9xjb&tR@Lb5<<>2WnhFP3+o16MLOGSx$ z4Ud1zVunYxLjYpj`1pD{0W=IT-r7Iwfmy=dH&22B4>{L%>VV9WSMog^PTUvdinmcv zPIn$$eD9R>{I_rEI8kcoJ&oU6i>B0;M-g|V3m@+JIIoPeEGfRUw%ZTcWw{c{{|JBD za~zSNkU0%3t9Vp_k7j>Z@H1{g=JRW0zYMYN7^#Km#;pTPH$`v*(mgr`VJd;5d#tM@ zBaWq8qehUEWP5Y(UJJGqX6}dWCyOS&CqGYbb4<-B*Mb&0o?Ecy{NUGR%iv8VLtCJP zOd7gWQjzq5{y8P zobR6YKfjUACJj_Y7WmIsz7%6W*H}}Sasu?lN!oD4or%5Uik(QEM088yv z*O6epebR(g#wtDJK5A4;k)^3M`jc{VG^uRFWT%llqnqfj{Ovm;>7$8RD7cxAHe%JM zRRr84rIRKa&vNoSamIJSPy)||nkY?82tT!jd zt(GaN!2!@`FFYufd8&I}@1lwY$_$qZCqtl%1Cptz^}FPbyl=n=gw`fj>#{ASsINL(>)fXKJ?u&_3W*Av1u%DXCY1I5s9%!~~ts@ZmQqTXl z8gd=QBQw>Za2L0>%>gZb8qsTlwIJkaP=o`ve4&aa@(}QZ8-xI8QlZPZ1L4N}D^|il zPbh5+ZC*6C98)p=AO8;eR5Sl2;w$%IxS6v4nGtL-G@qNh>gu4D!*K$Gu6)!DvN458 zjS|;*Uo+WTE+`v(0`)m1dH&Tw$(>IdhI09K-R3Ma?VSz%J>4gDz0SL>oqM|@{`Qm< z$PoBg2HX5C;qecns{{1-^0DSR`&Tm61GdR0s}GK6{(p5W>U+#pz zBO-Eo3}TNB*UP^u1Rls29!V)C{C@lvb&~u0JqeBBZBHCe{P$dt6o}OQYb1H{rwDD> zZFmGOs;uAeT&oRo8m*s8+8U#nEnMNZwtdbmJ$yLe>YZYvkKwA@XfE%+o+gw{>b)F> zUIWt>)?UT=gYs##k$Hxy?CesB(nt6xD+OHHfjx;^(B^-Ajm7rQlEu?wG$7kxGHLvG zsp|Fs3E=m;W0f{x@KjI-jH>T>Ne|rWlT|>w={niks(iDWva#Fpq^487*W&W{I_te4_a*;@1CG4eTrm-)PkI@e@o_7e3@IHKJ?F8Dvn@p_;YYA zdJ^k_EmW8OMVYG|4;N2i>}k1Vt%u68whQIXOxM)w#?u-@f2CXTsO(hI7wJ)l%n@XM z9P}O@D!xAZl-GZViD#}e?7Tnr6*>Q_hnY3a9>L| zm!@=1)?_?8vN0&;)$l$yi1J{rH-Ifp;t;o!J)GH29% zme89p9JnR6mzJo?ZD0G5E%gR5$A3HdL~v?$@0VB6*YaNtKT8#!0YU4K`Z9=cy!o*K zyJnta&M|{u@RIl(KfwSG&mK$+!x(OJSS-f`UE*-mgw|L(VjF%=>ySCl} zkBzS#fjrOa(RALn$M-#xgRfzVtQ(Pnb32IV%xc@*j7kR;fd(9OQ4chM^A&5e6Y$ zBHyf&OTi-mzBrUi`)yS)f6*r=8~v6e7xI_(V%vyo7u#o=RfmgK%S|PStp^v;0$7N~ z?#lsdn8JnU&i$*GsYbZ2+kc0oiFsy^&WqXr=^>qh@8ZDorhew{`RerzVm6h6@6(j^QtDarl*mVt?_6 z8IHx2Q!Gl#z*cDu!^-s z6226A>`p+F!bb^#9#hw<8}ShCiUFzndoBCb z;bUU{kc<+)a*aDqe+s`$TIn%96R{k7MqXlG=hUdQOGy376Gq#K-jR084G-2=E^G;c zdEPE=?2y5hFBSrO^t`xV21ZOvx4l0@q5bzzzY(ITG8Rpza?x3>(p`QxQ1mba#7M15 zV&G*w4e+F?X3Au%%qH;2sJdAF=I6ws4PPR>qY=r>0((xFP4)i? z!csf_@f6cYV3!kB|DLHwEhE+ybozDtIR!L>9BSQzN=>ahLj~U=8npyNlZO%oZCYCA z%d3Z3FuBcT5SSKog{{4o*R7N3S-(#@yKprobLTH}om>p#Ld6Xd9CZv*!_@m(WH(%t zOpX~;Dy)yi{T?kI&$N%!_`iM)t-#;u&BQKFd5)){6rPD)#k4X_#A{X1RTHyUF}?iz zX2Ji6OzhUV#*!}m+ysBQdZ`qOJgYHCZ%RjS--a}79M8WU&FTt{x2zb!r*j;Nih?5z z^RG@Yo@&Tx3#|X}*JknQ9qw}0gpSg>GEsBpbwUeS z8;|E7<>#q7bjP(o?14#mLezl=nhBmfiWw6mg^DD_5Ih>`R8{^qxCkqE%d0lm`w00| zf|%7$D7FH6-43Al!7*hiAL84Y_LvU-!ezhwVIri?f5b*CxNCMbRo~7tn*l)MJ*ol7 z=Ul{-`e|I)?+s)K17y!7)ELaWbM=rsMTrAupdtg};7U;M%wpR7rUvi{7im` zb!q8?;Y$Q)@ z!!75ZW6Q2E9yoY&$Clo0+CQY>Ke69hZb{DuLo+IA0#)B__n=$9k;Y;rqUq?a*HdjT zJ-g%%#OZDtx1H6xV=E^k?F&+UX7U4u5s47BPjlllyjx%G0OvHNBFTzWshO-z=Df=9 z5CaFW^Vl}pd25tYk!Sn5#m4fBbA48mVkh+oW~814Al?jxX%My&b-w34Gh=3{jWnz# zT0M2|cotrO03_gIBnE9XQp;M{)I5TML)YCsj|nIfhGTrz2ddKSo5zhlC^`gjLi`;d zCmU)xXOBeaT>dF#?Q!s2#p_AyU-M#o{kY-aQ+A0z7A3Z_3%TpnN;U62HCnPhP+oph zYwQ;fwo`19)Y9F|_Ij5h`{!zHccfMPq@H7HsvSRTQ_6Vow{8gI`Uzd>l^1Lx3Y?X_ z4bZF`S8};A?c(+z%e*^Br+UV&OAV(!W0jt*d0zVUpXZZOsWJFSLTOljHZ=%$4Ly(i zhavf5kIIxN%Bsjk35c4n1-MqnW~v#auuvm-ISYPIpI&uI9E!yMG=#mYLV_jJezlWv zF7GlFdIY+dXeOe6u2-)B3&oVwk*-733W`(@Oc>$vrt~D9r>tfBfb5GkRwD+fiw4~2 z9d1ThY4|><_r}$ynjjcJcQVc$_Qt$9wNtm&ISm}*0!Z1`O2tz# z3;$vCP!wIjwrk@{1N@YAyy@dNDf~@`C$fATh$n~X9fq9f?JL&==)80on)h}|8ujEfkisr z+_{CReHU@X(i}mB3t|ZVpVxI45#FONQhbimtxw^a3as@0i2HvS`WVzgQj5@OdR^2V zFY5@;j;+8BmnhcgRo}Oaq`dAcnAwzFulm9PLR_NYC&Tl5Vu{KL>&2nAlRn&d^l z%>U*)C6(6b(y8Y2>SK9i!)8ck^b5xLX*@O?&$RP8SUlAYo!rL!Z(hDo+KxSa6>{bO zzlSkKL;CR&hYPo0`g2wCsEJue0SvM-aTGnE&x8EC(uWb<=Ei%jc*sJJ$YPz3fF|o8Gx?_|9I z4AwAfg^g}9jBd7#rv>GsiYZZt=y6a+C1bn6y3dapIyHD5Emy+l!t~%z_D4n9`KpEK z7qaE>CRDqrvh3cHjYPqBYc_8?(TGa?WHJT%^YMW0?|fQkMaDJkj?Zt?=0)q&<4s4 zJ!u6+!^$l`w>Iy^h(k_BTH)|ph^D<;)VcV7#zx9|S+y$n?#AHz(QPN~j*pd0;a5D6 zPbTvd8OTAe!e`v7UgDQf!BP=$#iDb^0IbEM-TVeNeVv14KqtfsuxJgBu3aQ}mYQj; zO!SQ1xUfe9M{>KK8JK=_zGmvBnP<2ipyA7xmVfAHB0efu==?sms$Q++=C*9UN6Ys_ z`5D!7zzuBD)%dGswW8T`EC#(@*%Efb6lPtoRo6D>Go^(!ld3+ar8-hqQH1Ab_xUsy zZ>H3WHWK~S@|Xag!8lU{x|#@F&3wcs%&TXS3pq8L0P`yQKsBXMnzoqAL?<+daP)`P zGN`yMHS^yKTfr)Adi-G{*|ht1%GZ0W>W+}f2}~SyL+;-o#fTI(tR!7xbKUMEhCnI+ zv2M%fI>48Pt>wfDb`HFaPu|-BaeT~YJfq|#T_O(p%0|s^80$L3Sbux8jePR#JPG!_ z_>Kq3j7_r*;KBqj*5o6nciY%FG4kIRy55Iv)79Rm8+6axY|75M#|{pD)c4G0ukKg# zczrB!boz#$5ETLH-r%KE*cY24Opt$)n zRn$wMmvrd(u@o{qg@*Gcx6sqc^rETc7!Cgzy)AZ{1iDdS9f7^f;*qpE`|T&w(2BXV z13;E+ViC_6)R&>nK-eP)X~o@!vID)nAZ6tb?c>O%9DDVJ zAeB7JKJQ}p)C?_b-aEF_v&+!RRYT2rF~bEJilFCW-~AHkzk4n25JHzjU%Y$rH8eWp z;S)U1{m#sUmtyeF%YPu!J#nv^|6M^n90H{$`h~F|`+3oQBlAgE`hv;m;hU5CEmr@7|h>MNtocG^DkUsklobWz}D&SGiN62hu%d|i9S zkgmDwh8*;ITSNx#meA!~8+vfa?;~54 z36e!#GUTb!@y;p!wn(ALEU1<~V}X%gCz?@(N}L{ ztXwtknt>xv?^E=6kVo%>m-3v;g=xMCRZRTCHyfYOZ%^C`52&QG_lhT1r$>l0lOAv-ypIRYN%qQC6?nLc_Oh;cYf5p3hS&90}%% zD~;!&10IV@YHE-7SpZW{-&4+!#~uN)G?PnOx41s8+e+WgOeq__(FgLjSBu@&%TehV zSj2ZQ=Fl-FM`V`B(q`s=B6{q%#YXECy;OSs)2FU7-6#L4nlCqW@VF9{8+u?6wZ{SX zb2msyos4CYj0T`9*A?ITzA*7c5!TuxJc~i}?Ooh(h`E7&erqNL+OK$sjTs?Pe?oys z7>UQ(;bG8xQ6|Pw-i~1gm?Ou;NXutpbxiP!pKY?B@M|9G;NO%)Rr7HSQMy$P&TqEPh!(PVtuGo+~2JuVXF#G+kv*Vx!Z0b#8Z+f$> z?E!YnH-GX9nvLPU(6LfYdso?2&u%^f4Zx>~E9^PVP{GA%W!UPu*xmb8KCc~wHB8Y- zX!-j&$0%fXV7-P$QGumN9Su5}f+-NQ-}#y3l^Fj9x1M~}^pV*HOWv2YJ^6vG!DA54 zz0GS!VnN}jd7bAMdu4;`=*ze|F`UcR|_2&Yi!wwy7D$p zoCmAEUcaz~zRETNC{DyTHygJnCJXw`nuEU8zC6=^m_FN3_|x4#52kp&JA?V-zDCan zJe^IiFFV&YZm>H6Qj6DLnrR>gij94NiRW@mQVB8auI=F6WC z4k`meGE@T~7gejjqj-8aR$JZ{W2Uq7`U7ngcy2$}%LI5l8Pe8ESMy?TRQp06mMT(b zY2#-@x;M_7v%L%aw0yd@o7bL;Y~zHJ6p<=pQ5=+d7Y6pb!`9B9ua`=ma=_PI^bO*_ zd5Cfaaux0wOl{Uux@a#x7(IM_S~0e^`-WAzISGNU;|GzzrbPrCCsoXP8^gB);lg}P znUX8kBLNC;+1m|DNeg%V#19%u+-H&gM(5Fh=)q^F)GS|UpFU?5Rg>Img<}W&Jw}w) z@{Spw-X_%E)<*9`!HYa5?SKaQAK&sQ=iZsgA<@!Az@%!z+@*JSJwCXtcfkRy! zUAL9u>&JIwMY~0ynRs$6=N48oFABpIcwG-nS`^}+^*Oye)x&-$r8X^9;{{-$MqfZm zF)%Iz>7OJ!lf5h};O7-8YoJ{X#Pfs&5YTAQ;NqB{y7;XI22GBwX2p7#(xhQ>XIG*Pv|f!z zUzU>{qOGfRv~2vsIl-;d=Xf>HnVLJcBR!8u2vS-aUQv#=OS5mAKjEZq_)^-nn_`hl z_e8t(aasH|-8;?llit4Oz1luq$ywj`UK~e$ciQb0J14PuG(1F59`&_P9#1JlTKW&5 zFP*Gfr+dabQEx<=K@jlZItz5tp09J`XLBjZFR6(b4QwJ^iiJ1Em9z~X2txY8wi>B9 zFn<*sKKN&jx1E3X^*h0r>5=5;=-p&+_N+?XA62q;#-M;y#%I)F2$gy~#Zd~ilZ4*! zd>~GE*D?6u+aU>wkdw2nAvhw*EMO>ily(bh>lho|nRejf9lkPOTgsA73 zc~)IfAlob4O8g={g#~omp2cPyHRtj!fH+S7F2IdJWy{#R{8v%9u8iqyXUxOT09$qB z7W83)RROF;m73N86*UnfdoenHI4xcyr{z;r8x+{ysBi@P=x-L!o8;{mWb^<)uz*6D z-xxsxcoar)n+xmL9gpirKD~`DWtNV~s#t_et!@;dQMpSa>3#$S!97&u!w-gp-$Z{4 zR1+z0hKJO0?yK37R^Q-xUdpLpRsHSqDSQ=V0` z{{#@dmdUvJX>t_P_6<34;<-qfF_gl(VGg!2)H#0}8*TecU*_XM>&p;k$&W;vMBBWY zNSXxkS0lb)X|kUhm@2Y;;_N2b$C-=h^1Up9J*j(N{g0arN;130Ri104B_G-!sf=dT zfpiwSz1LvihLQNxS1ogQN;(uBM`nAf1pC%0&Ea&_n%rP8aQ)o#ENhC&HCqTUNMqkd z&jU=fSUch{Um17*&BaAr#nbo?eAo`vlbLcqzT_q?vEB%!gd?iM>kU% zqdlH&bA3_v52iOyXDgsbC$8@~yDOGXbY4}9D`ut@O4lrU9ZBk)_@4%PG!(80(~c zfB#5Wnp@O^le~hr`fSo%TTtic3d{Jpr!GGBviG^p$Hz+sQI{S#q`uk|hL6FyfAJ;1 z{KHVCx;F~_uLmlwrko){(IpI8E$Vr`oeCN2)vz}XJ07IaE#vOE6s=}caQnO6U53b!Bqn=^ zC2n~MkBRkD?r|S%S&5KoPEoFFie_EH5!mG)c{BEiWCrWji5Gl8e+e6%Y)fvwmZIZ` zU(+I=b>taYH>Cc6S5^u(zKl_uHfKo6-<5q`(51QLdq5*d8p(K`jm;tx^2~=v6mwhJ zGTNqC|3Q#G{|7;0rYZP`aY@cs@GEN#!qmFy%dSy9VNi8jF?T3UI$U>k+GyY~=H3rYjPofpL7Q>F>7r$@rgn*ZXG1ZaQChkN%{Qdd`3y7y`Akm69CHHWt>EmWE?5BI^07dZXYnhAhh zyqoyNE?%DBc7&crXO>_EnDPNz3b9O^QAdLl^#n1IEa|y4btS$-mLj!_vZ(M(>~#)wAd0zUW0l7mYrx=jTazCi|a5#mt3X zc&2n}NVL8~yJ2+>(P4HDf9RQ>4+79>1>3S5@oC~S64W!NWjZ`b)_C?f1-d}fTpRIT zCKYWw*dMU}*b|-5H=84cicegAvr(H+tg|zYc7uKu_{Xg-*-NJ0vtPKTzE>tug{zXbl$oY=<|vd{FpFWb&ox5;?k0cSC@ z*n&RB{?sE|?!wY#^!ezS!n#=kJ7}60y|9fFTF6-29(5luSJLqIX%3eig>i&Yh?~5oNF~l0b54Za;L$4n_KT>es(0TIwBMvfI2yszj%}SYo(;B7%S0J% zBy9d4uzvd!)BNClB zmKD!vx3(C=o)-nb9%&Fxjvh}vDa0q=iPs~CQD7K_8tq*MFitFIR=%7R)T-wwXL>!6 zNi`gk8Gxh4!!?6Iu;=?%xi#S&YiqmA#x-g6$-kG%rfW58XpRO0O}=_))+%}!S-cI| zFV8pPOE=W)6sdTH?0gW=X(MA_X;U+NqY7%Hu64pw+|cNsbOx;{HWho1YkL`)S*pOy zMnBQ86V72%f0OjZ_<{9o*#L^S5TU#IMYLk$wloRfY5rdJV1a|L%B|tG$7{XPXpZJE z9ehB*m@_NtZQ8alqiBX%&d?VSz;LK;OkXMKZvUA<27WMM5t!9cGu>q#sk-UANLKI1 z?bMAhx(1LEc5vl~yr~{Y>QG$wem8p7JDg_Tiv8K^dNdoZ)}a~3HzA9TbzlL`smf(v z!Wv#Tnx!S$N}Ei9Jo>i|L}_<$>zk$nf4s_hp!}re@)Iosj+M=H{RNllT`eztX+!xH zd(4%Czc}I&vN0b4!OD`~x~qdf%6YUYWF729z{SXJyrnh}Ax<o4kXk2^F1PITA`{Vo&@$%tZ`Tc}(a*uBz7;muqUBh|5orT7 z?7K*9p6h$xjptpJV%6CXQ&Ve?^)4MEESJahtenY^C_lhQ9ie;*yK{s@)gy6D#n;8G zikuGUFLd8|wT_DMZ+|M#pkBqoj;50)!GHmPq%{46$S>09n5R{y&Q{&6Fa8ZbQ{HvX zd=?^y8WOhKVFoA&?nJkEExp;R)jVZ2u=L3ks`yEnO|+Y6i;p-Y(Gjni=dj=@>A2CECcF7mrBRLl z4W=8|$yZ@msQ$dYY!7~Pz6*6Akwo&RZ0Ww>wvg_mxi%pjn-PEVT1IXA zY1qs84eAebiqgU+%-^ca(O+Jatb{hFq-{5eLnD**c`;5#+x9dm5+jQ0w z=hzXr7MS;`^s<&8n|Lvj$ul?u1OS8^WS%e-lLg)_6^wp!^B2G1r}b8zD#D9ukkTDf zN^V+G*8u1M^i$>8o-og~8PjwfKiYan+c(X0hUyGFA53HT{#_YVGwBW;320!3M3tnZ z7t)*UN+X;eL5`UVntoO7lPNB7fpg%1m!OjJPkE`$S5lcDdl;F~#Xk?czIA-1JYSN& zDzM|F>XbR?)Tf{F(w|@--Jx=9*ZBb*xVE(#H9pV=W{^A9NzJ?3U~~M51cxxg+g`Z* zLGROsHahU!7~{))BYP^_nH17R<`SJsufc8+tmrBMzW~$vBI!9cfc8*DT#^fpf9-iq zyY{?J@fN&HWSLYzT+T+*uG+#{!(_9KChYrQ8JkKeZp^Njqi*}u5izfKg`dA9toDiD zW&M$&nCHx>OZEe`sR5_IbW4)p!zKUhUwY{lQn*=O4yj z(oSb>tp-EME$b1}zl~IU#Km1l_>BAUdQIyk<{T&OSLY^leicENC%=0nNwP~)Q?M@; z46RFA-)(VmF-gML&nT>LSeWsiycV)?Ff5k(9^h^4@y)s799X_m!7`aNqm10Q(90&N zexWz9&rZl8U;VBQvtN4YlA%k6$AVpXZdy(-V?1MA0(4dt;Nd-};VlJTH&HkK@6xmG!Bv z=I_+G5s+7zeZkj!sMhuR+6c4&srm+q#-ob}1osi1vY6e(s|srupbfE697kub3sole zK9#3DT8XVL7kL7KXv;@PJz$Y;S#UJ<1^dBN&eN|&Aj_u(TghaNPn6KD5axhzl!-lX zN5~Rr<}lL1fwTNt9pF`Hq^Qw<7zxb%RNd5iOk-6{>7w|SU8s7wVugq_G3tlIoy>7;^`jqo~^4%G6k|<)#zkn31?EADTaJnx%p?%dis~~C+X9Q}&Wawqf zVMWJYygmGUnDlldw6>!4$WOpxo;}vXQ>JJFFIj4gZ3|Z9gf{6_-VeM>aZT_E3(IrH z9^n?W7tj;RD&iK`Qyd?Rm8O3Yzu{jknA=RZn*=0ve&U&5J7k^cKyx8__G2ulR)DI@ zkhV?UqLH?ANR-?8do(K7fI4;u4#%JYLWr}(7!`ikT8({}^8;n|EUxW5s^ScSh?-Z7 z0$)HfKNzMaGE`u=vt$XuFuGTs7@yvD9H(npqLA%KI?p#E`iYcXBKql4uj=e5$p;D( zOBTV3ir-byqYHmdzAj8;Qm%6ow>^6bSp!$AvvW^X;Q+4m#kZd568^)mKz{fmGV@S- z-EP;j?Txd8qFi4+c7B5(S#49iq~CNxe3A z4M1BTH$b*>#49l{ZS+)j>>5^Q2ryA3<>xyzw;-5p3y-)B>UUqAzrC;Sh?*vkqScR^;u z(*5G_b3OSwNW>?+e zB=)=t_Nb5D9`@QOMV%4y67$5BD5T(z!+WIlG6|n|>n$uZB!NTd@=ty}$7^Wk3SMsk*^{YJaCtXYq%$zriP!u6ZY#GM zHTGWOd|%WCrSuzX2VUymRu&JA@hK)b-z3ZG;M62rtLH)HJuKYgUu?JuBDSxW#t;fC zP2@%%USi%TLPc{ZX3{GDDYO5rcd3@c~ilb<(`srbg}>1ivoR6;i|@4&rBZfz(&Qyk5Y zN0fGAFKOGN!GzJ28L}qNn91+h;yq^N^hxe#oz*nULD{ZBL;tI~uMCQ-Tf1z6lRyX( zg1cJ+!7UKHgEdYANswS^+zBMXT^je`jY}GLw*bMRafgP6;1@n>Io`^UXQE)~@Qr*DNoU|<=`6FmkM2}xb?j_l=s`gX z2Al!o>zw)0TW0x)XHDjcmQZB)B5xgOtJ05+#>;VXk?DtM3GvzGtWk71@xb2nNMm%v zK~U1_Kw@>f0&vTKTKRZL?urXDavfgVEhR~M^BMAbM(1pBP#SVaA(WB&gc4uXVC!PIq72y%qbqdYO%}T+OE*8(HtW1?R z;qykZG4B8k-@o4Gf&CuJ%%xxZ+$&$3u4J#s8}C(|Ed`I+?b|2UAbmOj)J2G^?DAK8QE#R9?*MgQM_=yRGU9&W!t@|s_*@E{;0H| zHjIK6$=@=38(XK7>kLMeVbS5>;F8mOhxbk#S7b~fA`}dSBq&lNCd~p6i2<=YVT~seTk(2%f zGgByx*LXQFeu~#syjA#tNti=$DN|wV+Q(?~t=aefO7o9mh)H6=jF|I^aaH{K`-GUJ zu&QLIxbs&2(J&EKzV?lNN-x|Xm<5!KhE7ss3RtuPjppVlPIHa&QV+E4Nf=wrsPj{K#^meZgjUo$;XU zylYwzmNsYwM5H!~;=d;9?v^T4>nHKEQJZFU z6ID&lZQ(g7Yk%?b?uC>1Waicr2Z}VCk!1G3R?S&1Wu%^Hp*ay_)3maaJ&1z)>ehJ& zt}up2oFS5I5AFI9<@F>)5<$##y404n$oJE9S;$rgdxd6@=@GR17=$!_GG{i)Shql+ z!r)&?zWn(2@pWlVY&Qodhb25=$DRa7aD`sV8$?{dsw$@%>kL(59u8+JxM41R*%vxq za~56GzQCiuuQ2LeB;o`O-Tx%UIjhA;J#b76=Vjrrn%~mHONLcyuc_31FWTC}KaO3W zWz=BPj%tYfHLtixtVF=Dnlbq(<#~blQsI$HV>wpc3A`k1U2Z8ypG`9aUNAU>eZ&esHnA! z*KvEOvAfOg4OvUC4c{!y1v@<{M~Q1Q8nu^xiStU!=n{wF9r8iSd0uw+sviev|9HQF*1 zaXxBVKsbhdboHvtIQ~M2U80pnfCThnEif={l+dmFP0fs?aJnKX9HLC)BW(jF!BN~y#a$~JK{%0KUKUg`Z_Fiy=J)xhRubl;y4&$or|Y^#wD^toVIey>?NYn=AUv>vPt`(%r0h0gU3$**F0MU)6%4;zZbQ=iHr ztrqR$BDyFSb`8#JQcdXCr#4Ew$gw=SQsMWuXMzv8wDj|Me!{5w2Fn&lX5*K`l!Bwm zH{Sj0%`c%*c=Kjj;oXp`d%^nLGHw-j8%KCavw>fOcR(?-6QQ6TmD%#H=-jbGzgJJT zwbKk~wjCX^D0^o1S~$opG4KtE!xM`9XEFW{=yhIlKIA;`+Jwb}=`iV@IdnR_(_78V1MG-hpUUf)+)pfLwVS}t+!B@Q z&dQy%#)b&Xt(Q(S^s@q*@|6%&{ zx|9k|q78>i#8{2IeW*s8YJ=N-O$R&obFh5E@S8fJ;EYtBQswKa|H=INna7kMlknnp_HF6*g^jH&5{0Y#tQrmA)L{7{D$AJ+ zKE|c~z=Q%zMnEx#CIMwd0+mT%6s&QPIIctaR~7E}gby*r!R@{kG8Z!Avrw&FdtSL# z)yRR@kw~ANlN6~9txnbSA$4mUeW`&Kh5B=CgNFOIn{>!!j_874ic#wZ_Pkg9m(t)kN?!X)+;^h0dw7^b+~La>Xv@ zF6PYD_l?jk%IOcF`aZgbDAddlu|7jgMWy&22UD?q;c$b+kx_eMuW#oF(TLQYFZIwl zci!F)vXQ&?uj-5(&Jt#3XXlnZ@LbQVRpxWkel3YmO@FkgqDk`zzRWdtlVW#?K>M|r z-_g=*6Z+j6e?It}SEegY87?*AXoo?_d)}^SIR51lsln=qW;@S*&N$VarhxG_MI+z! zPTZtYIe*S4r;Mo2eK$vKsxOh0RX2);X?`Wz^D zNA4y(SDr}iJ|1FIJn6FC2+rWTXzeZ~S#qVy#3drgp7?b{v43`0Bw^=gl-^JxudF$t zW0KhHiAz(E4<$(O(tkh5!VWIq^E(*n2T_~Ke}C0qCXRk zpC)!AuTj`?VJIvAc9y`2m5^}q07H^=#~?{J8OdGt2hbh(_J)!E#%QAbY_?Q?n7nJy zdEdf{(U__6sT^s3ii);9OTjDRLnW*euJzo|yqB5z2ClV*ee`Ev?frjfP=8nOp-iWh$4 z6S)KY1tBa?ESOhsfTE2`P}JXcDBAK zK3g~dFF@+}pJ>yb!^GDfzLJ}ci~r)15g@PHlzV`hucMqw`>sDMCs3y)3;@YWO+Co> zkVZr|2-zkqkn&NKE1yWdtQoEZljKxm+G;}I9>f9w?hmqzvgx&4x9R&RfISzKQ;rJb z3*F7X1=eW@p3KH0W1s5b;|7n#m1VwN@UYV7O+|!@^H2nDaIwt4*IdL_&%sCn1^!j_ zG_~cIBN<5(XX+~||KyjH@1sE|>@%tH{SVk4k-5*cG~I6!v5sXy6y-+xd+&z|Gi#;} zq5Q&NH(oHYq&y8te3)c3E^ai}_|H3eZ`{sA)N^s)iVqA6?B9>!b}qJGM9MeXd-yP` zC0fnvqe@oSMx*de{W?lb+uCNbaqNz}(_v6gL>s}`dJDsmu z*CG$TcpjK1OWhmmeQi*_3N;$dpQa~^MoS;!eqE7apK!n2*@0E!4Bzg#-rL&!0i+hq z={uBU@-$!ZEevYOd)fc|f);^#9=DrH|zvhs_HJ zBxjI!Xi<{gNOdY9(TdJ%Kz7HTYxAqP)V{LlMQ)v#y{k#(PQ*t9@_9HzM>wqpe8guf zF_Ok3L722>bJfNSsYwdhqy7UhDX)&oo5c|8CCV!LgDrH|Uy9cec6cG^f-|4kHoM5Mv7s&j7~Spe-ObbC5Xz7I|C3He0zop+5{~ zJ9}C?CA&V{CIwwyK#3sD&B8O($@`q5dvs=^n@jEpEa%r15S?ggbDMG_l!JAK=lcv$!XR@ z%O2Ggw2+VoSxE-Y(y9h~^OSJbynza_;IUZKif>7DOg9zF?K+WYpNTjmM>rctW(o<= zhgUrxnu^*rf>wxl5D?Id3I($wcW>jgsq9lg*#eS;u(#!F{C0EaZPUiwE4rhBjl!)G z`3xp*lFgREAO`_*DUwz~&}Od9uZen`rGH?H9aTd5`k0IU5W|xs@ z?@M#|P)-8lXDj_+Jym6W>2K`Po!}^?X*J1>k-o`Yx0U&)NqS`M8Hd}YqZwniZ0UP} zc7(^*gV1auADq>qE@QRoUQaG;rEYv9kh>E+ddiymtdSJ1ePEkf5A2;!Ml1Rs4lbwU zKd&vjlDVr~Ya{*%V3(+J_A1jYA9mR)oC6%vcC`Dtj%VKVOL5WG6&*^K^a8zW8LN`Y z7=)jHp?X`|CwktnUd<$35KiOu#C2b?*bZc1uzAT&aC;UsIiKwLbUDMcVC6_(#9^kk zVtp|Td#XWRgOU~RAn`$lr6||n64b>=oL+Y*y`-GCuZeY6q?xCfujeoPkcv~443RJfh;OAfBX&@%}a9pM=4YlAK-qAE`c%&T^lD9QJj!D-nIdXk1W{t8j030_o=h{Z^H z2&$Cusj3IIMJa}a*L4Zn@%hcI&Y)&3TSz7jDR_(PWj5ubdX!#o#^bD(z4mLNh0g;Q z?T2R2ZG;eyX_`pI*5Wt0c)Ri8D2JyrGa<@Ogxo$A94FdqMfjM2VkIFXGSu>=(1CTx z7WMvc*h)6x`8;3Zu)cy5w_ra#?hw_f#(hV()E)1KQrGY7I!R#^1j065Z+do zu$n2kH5q7OI2X9;%Wdv+Q5Tqs_~>qd&aq7r5@in1@N!9#l`_YF!5=ZaxHPW>nNTUL zIn%#>F&vApKKJDa@eMFm8L*fg*C$rawFxSupRO9n%p5GrW`As-QFwtg(^$MClW)B7 zM{M9F^S^m*Jlp*SS2dl#MG0SBPlP8h3rB+v`RlUZnT7iG;KXQKAU+OLIu{6}^UCGJ z!51Ae5%V^i$0d+uA@}OWt{R)`S*@aP!8yv&w|M_V2D{hMN)9B!((0a0=8;p00s07* zbE1V3du?V!t|>fEHWBFhGWOK@si~E7l}MiFKY&387&=cZoDR%YCQ+8C{|7M0^B2vS%C6NXA6~8tM;09 z&IyPMf07n{1{6sBu_*I`?sruRy0k*pGVSQF7;k2OBrg~K ztyA)0B$uG~3*q(2$fa*>8zTAQt)r=pi~HevI7h@V(L{GnBd4z&HK>GLkV~)d0Bbe+ zTR4M||D5Kg`<{SgU)qBHJ*-?CmR_qC zL$AH;%EKw|@SXx!jv{7>h1Uyn1=K2o#;WYo;HYzf_71<^<-3s!X*5gt zC=#kinYJy|w`W$1)UV_lSn_gYuCwdg;w`enPe^{HJ-FA z6GJ>j`b+>Yt+8}&Ugxnv-Ih0wRuC6zdy&ZTvM62JdU16zJ3Sm~>z?E8^uE~0()o^- zpNs|8xC)iikGh^y)_eRhKzA$6^xKqp@|z#u7Y@)L{oOD1xo_TokigR}zX^kg4p3s+ zbaeD8*{TUjcjMd^@QkT8s02)2Imx9{oA}~GuN+x0J3$Y=C`-R1Sa>>f!kGk@iQYMu zKl(<;=9Bmr4wwx;%%zaXhc)>f=WJ_G>IAQeKRv?5g0XsuN?Ke`Wp;|}#{Bk@LE4M2 zSJmC|uEK-Uv{aKs$X6d|`hO0WN+>GkyV1M;3k(!MP3*jId%p|&lAov$n7|>^z@9X| zb`!`=SFPNqAnZnQPn=u?@A9JHhSEW0&OKMGOnrN8Y`))}z>#86urUslFhu*%<(aLP=|qdJ9~T1am=vtEpBI_>b_6nbK0eX$#M~)3%(Jz7 zGh&x}=&t5a^sWC@1H3f8qMk{de60p(5kewDtVI2N%(iVLw_eXXC$Y2t6$*hLg}*FD zkL4F%$;!*F)A3=9z%}#rWFHEuQ%!iu%J3Wsb*w@}r0dA8Zd4zEBAOPntJ2dBsbm*K zm9?PyDXW-~M`+aha$*Zz`(SIOZ~d@fR?lEZk=KN{IbB`&hdz0272td-R_UX?WB@wX zOUSLkuWi@7=>ZwpolV3m1Pzhm&nv5T9~LN0F<$`mM7cCRg}3F|gqv7_#17n0TVLy1 zKAjPKNe#OVd*d!fG3b7=V@NwO))gxv{QG$UT391CzZ7@0piJ@J%{OGj+~LuUcDfX0 ztv%P7RWq~#M{x5~F?jXdrFLvDsxiX1kEV#3bE+knPIXv8Lli`YaqcWec~UgfUg0Zs zPqTA3eKXfp5^jJJr`491W_xthhD79AQ)pn_Dv;^7aJ>BAQQ7`4{;oh;y6DtQ8g4U7 zrR9}y2(jeqbOW4-(U5RHIR5OsRC3_X)Etmam8;s~5J^i%;h#{txs!2t5otb}?Uwxe zRr}HLAHV`rX{M5Sx{R?+b2lAD9@r=?`I4JpxIBlm<8+H%Xvyp?5@?!HE@7%hy>!s>iRf^&cy|&D! z_eC^}Mg2vMjCe+0SXpvZC_53~B-Tq7(eh3Ee8!Ky62ji0j~y#?oYVCIN>IBxWV%$3 z!Wnp}-?foDyo=Tw2m}{@Y|2NO;z?lWGuN7D78}S9@bt8Zt{XQtIzTC;Um58I)3_BoId7j4{9{)hVes z|1vtC6cT@^CTqEU{xN+RRda2m*&VxV$w|OToj|rOyXuwgX0&koW#ZKJIA^jf({1u~ zC80Ys6YM@D884zy8z^OENx?y4e-NweRR1p_-)7kieN!OV@~5sZH?o>avUk}SOQvd)d0v~J)vo)Z^K0dG*T0-&gy zr6}vFbUs{9M96TqnSG5dhk?lNyOlafiAi&UQg(>F`$FAWC^$RD@2N;FOTrjm0W=2q zseljmAZe-vr8>Zj&q5mabpUqT*Ydq;WF+1F8+a0R+r8^<5j)H+=dY7Yqs)k#wKNvn z|FZPFy`k2x@deug(>^5ION2#Sh%9tO`01|4!|06sVgkAf0rFZggbV09+;Vyev$U)n zughe4j}46LM*`Z&QCW2AL~tE#6WKW2SLCGp_O>H&W%(lZObVH4JZ9m==7p#k#JPxg zIed1(#@qAq!3tWxujQkx%O*BAGd?>zGwuFiYU^P0VlA0MvsjLGV<@L)#@;b*-t&u% zeMjfxXZPE&Lif=#`umB~g`LpJ(>$36a+Ml2J=UnCgu)*>-VrX&G!lu~2}GXwMdgfE zsdmk_sh}1aqCHPiW|W>r$Zj0syfwr{bz?rfTmMO=`ih`^ma*de;0zc}Cm$-ltJ{?h zY}KN}w^h=r7%wokRDr8rg=3?hdKA?Ax@m+wty=(Q;VV;nh)1qjY_Q{!OJ@2O=%kja z7em4RI;ni#I#E&Oe4dsyWgC7cfL9XHiWmcE6U)hF3y7>&n<*;JQr++3;7Xmdmq*zD zNj3O!$x}Rb(SeP$DfNg}rJq&r`{ddA+)?u9TXj$OfFP0&lDo17xM*I61lJf%MamFu+SN zyQkq|1~aADGn(+OOrHX^>f5+!2PPIT&d}S4l$%fN39;W0U&RPIY3O8EPkUKyAF?7S z3iq44lkDCkyk#=hBGN%scSD|=V>R6`vf3V#eRGe+`)IM6HaVfUkX7Y<`dpP?m!E}yVm1P2T249!R8 z4H|&lmeV7dxpeP$Xi12ZN$L}M@#S=KV~w={!uVL;SC#s$PK6)q*?DKxG}vAi`agsT zWJ{CipXk)!PG>Tgo->_eiK+;!8}nvGIgIRGMfMoVP3(jZf0AlQh--E{ zVR*FTcb$i}18=%Z!0ScHn%QG1aQZI2u>zluic%+u?Tl8}TwfdPm`u$&&3M$W;-^yA zs|o4ykSNM-rsUa02{Q4HY8z##n9cO(4;v<3;aOo_<+0DoBFZ?$aB*>JDW)>1658@g zSxGtwj6lDkH33i>RV6M5d>IQsQS>?C6d}1stDvX-B2zwaf`1-CU^>15+Y;Ldyxcj~ zIYoG@)}CI%>uD5p1Ho})Wfbeh27S`%cx9h|EK;W|PR+RP6U9+M`ZSWsP0KV&B$K?- zN@&C;j1ztFYO8G(dO_HO=N!U1Iqd+{uV12?Eb&>A`%CqPHVY9VxVcEHVfXETlcdf5 zbRdK{mv$(0*n-u-U`U;aQ2)qvN3$`P!b(40~hellES1D(@5bUG0`x+-xf_Eyzh z)b?GSvN{IzD`b)UHC*PDD(T5(LA^<* zlC5F8PkwJ6TP|{4IRyE3GN%(p*pM{Xp`|*&K+n9hsNYvhhjNp6Bl>$L68zDtORhrQ z`<^?7`NQII46fLiMDru(#L4uYOxS=}eOliB*dxrAbaL4+Wj zSY@b+ozIA9-Un%cl7;cO`@pg1*SjOx6kj7DQ&Nm}9Y*RuUx#jb^fy({v^Cb3+_>3u z5e-N;vXD|)zY^yP7V01#Z)dHxo}C$_GD$~Gtcfp%>Dss!l``P_wrlVOY1oA_CyD`;LmTwILL3d@P#C zxHSaeHNTL{x1w~BZW}j5z9qS~TvF!qxZlLX{wXBLf`PSHrV1BSGm?zY>^HEvBIZ5K zw^iYaaZ(B+d^7Ajar2x^FVmi6Z=ag5A@`>FqhU2`PyNzzK=%peAXuH564M%+phFB-Ohe@11cpts*R0=n zN5Nm2Y}Cb*CZz1UbfyGd=@l=32)`3QEQ-xvG~n-gH0(RA{E^IGGl4`ms+-|av_@Rd z50orq@^N?5+at6ZDfo5oV;OPh0A}7wYgXHSu7wz1HXB-+yCN+Ed%XJZI4sm^T@sO$ z!wGOHCT)JJ9s>eBcTp9ou#SQ4Z0ZmaH^c(fM?Kc(MN>KpBSHCV$#?^jx^t$i#_M%c z^CpMbU6z|M245JSE%+)66zipX7mpBeg>+voxAV5KHBL@F&8G9Wqp0{hNq3q8VoHmNPo4XhN zG{P11=hPvM0Jv7k~U2@ z)Z{qJmdr;bOD^~k&T?DKY%es0Z>p$~Xr2n!GTIDuc0S&zC(qL8+`eXW4Vw_p*nsE1=oP-a7k>BZLl!#{W$K#3aL3w^Cr{cn2qVA@{bK}fB_n7{G zOdaI6Zk1r`V&^jHO|1aBaSv-naK2KNbMmjXs&h#jk1IHOupxAnY>oE;i1gxcCz;CM zd=wc1kZSc$-z`s%r0QFrudB5g5k3%_kZRo*VsA<+8)u7p@%bS)g`F~}3jeCnOB99H zG&ESA5DEFIdEPa&uIfKvQf)y_)Sv8gyN3vmq9yJO&i!)gF>Q6$w35own(y#faJAL3 zrePViK=IK~-6dnSc|`~%Zgc}Bu&?`~onf}vCb)9%F`BVkbQVnb2LSMDMrI|0Pg&r5 zK!k3ih=jQMdRc_+Y5dMDzxUNLv{m>tM#T9$W53fnukdsbKi%Z|sXAQy<~7bAz!%A- za}8kmHPpeys%a&BT6rQNO;mLHENGPRsAdd-VZj!_g<4?tC2cLDI-MxA=}8Ew$P~XMa;v zF!Ouxg^|(Cx2n?eZ$ZCX7Lxb9TrN!QcF{f6RJ+52xG7~QD%t68(ao~QulRpsY#)_) zn>hT4*DmDW8(pX^kcd|2-QT?ZY+0sZecOBxY?^K1_N~10VI5DA)T#fGw?}S3?z87p zn*TGJ2-5VffqTPFeKQjC*!cwa`-KrsN_!Be9Lk13e~4+ZCHsGg6^CjPMnU|io{3OP zdj2S~gXAu*;?wWh9c0qGL+fVQeB-u+o&C3}RXL@{lRb;Px!Na0Uv49@u9}g>dv5Il zYBwqEM=QszMeZ-MBW5#vWGwTLW`6+fpZjJq=lYKRd8>$v>%S&g`PZ_rMxhsd*2K&= zu83C5$-0i0)e52Pk#^Eb?QYUr8eSpn2DC}6S?F8b-mI%h1`$d*bV*g^5e~q-h0+gVxtuHhV)U09#^-iZ_JZrKC%NEy|#V6?KP9VWPfeHslOVv z{k4UHtZ$prfggNhb7WZA=2{-7c-F>woBpmFwrfI=`M-cKBq=Q)+l+>PR(`kg3*G7; zGX+|yn$BSfx_pN}_D!0OyxXxe!%1zzN8eaXtG^hyvS2jyv(nXwFh!wHfnR5;-*2vLnp@zZQ3H#vVH1} zGuz(EM+9|AimDHK2^3faUkE316XxfXZ2*J?<@I>OcStVH(GK6`zz}Ic=e%MSPA*7K z5KF8V&68gKO4w7jT53HNt)mxYzq_%+oFNXie>4maTH=GIl1bv%SS}qcrLKi=rEj)j$TA-{WPkDMJdgg% zP{QA@dDRx#SP}|>F$HJ~`8pMj^Hwtv*cTFf^0<;(?C)<7grmrfV(X@0FeE8qzf!yw zD+kWVfHrgr1z=o#71~g-1%4>1Z{JRPGVUu%}!3ixNXWb0(_c%9^AkM5ZNxTs+}w%@oFRWeXsA0XE^X)oI@TKK(F2 z_!0NgbP+?XfcTsjMDR%xumtjsmpTDaMTUVOaT<9dJ^tU&ar!?z!Bni+W0lz{?&WaXlKw)*wprIs#PaR6i9AWQiWM{W%l6WT4||MkWH HXa0Wxb9ySH literal 0 HcmV?d00001 diff --git a/resources/wiki/xmc4400-X1-X2.csv b/resources/wiki/xmc4400-X1-X2.csv new file mode 100644 index 00000000..f1c06b80 --- /dev/null +++ b/resources/wiki/xmc4400-X1-X2.csv @@ -0,0 +1,74 @@ +Additional pins for port X1,,,,, +Description,Pin,Port,,X1 pin,Other + GPIO / ETH_LED,25, P2.10,, X1-37, + GPIO / ETH_TXDO / PWM80-32,26, P2.8,, X1-35, + GPIO / ETH_RXER,27, P2.4,, X1-33, + GPIO / ETH_RXDO,28, P2.2,, X1-31, + GPIO / ETH_MDIO / PWM81-21,29, P2.0,, X1-29, + PWM80-13 / GPIO4_2GO_2,30, P2.6,, X1-27, + GPIO / RST,31, P5.2,, X1-25, + GPIO1_2GO_1,32, P5.0,, X1-23, + GPIO / IO_1,7, P1.14,, X1-21,IOL-8 + GPIO / CAN_TX,33, P1.12,, X1-19, + GPIO / GPIO2_2GO_1,34, P1.10,, X1-17, + GPIO / QSPI_IO1,35, P1.4,, X1-15, + GPIO / QSPI_IO3,36, P1.2,, X1-13, + GPIO / External INT 0,2, P1.0,, X1-11,IOL-3 + SPI-SCK / GPIO,13, P1.8,, X1-9,IOH-6 + GPIO / IO_0,4, P1.6,, X1-7,IOL-5 + GPIO / GPIO2_2GO_2,37, P4.0,, X1-5, + TX,1, P2.14,, X1-3,IOL-2 + RX,0, P2.15,, X1-4,IOL-1 + GPIO / IO_2,8, P4.1,, X1-6,IOH-1 + GPIO / SPI_CS_2GO_2,38, P1.7,(Chip Select - Slot 2), X1-8, + SPI-MOSI,11, P1.9,, X1-10,IOH-4 + GPIO1_2GO_2,39, P1.1,, X1-12, + GPIO / QSPI_IO3,40, P1.3,, X1-14, + GPIO / QSPI_IO0,41, P1.5,, X1-16, + GPIO / QSPI_CS,42, P1.11,, X1-18, + GPIO / CAN_RX,43, P1.13,, X1-20, + USB Debug RX,23, P1.15,, X1-22, + GPIO / ETH_INT,44, P5.1,, X1-24, + PWM81-02,45, P5.7,, X1-26, + PWM80-03 / ETH_MDC,46, P2.7,, X1-28, +" SWV """"DEBUG Do NOT Use **",47, P2.1,, X1-30, + AREF TODO: / ETH_RXD1 / PWM41-2,14, P2.3,, X1-32,IOH-8 + I2C Data / Address SDA / A4 / PWM41-0,15, P2.5,(Hardwired to A4), X1-34,IOH-9 + PWM80-22 / ETH_TXD1,48, P2.9,, X1-36, + A16 / ETH_CLK,49, P15.8,, X1-38, +Additional pins for port X2,,,,, +Description,Pin,Port,,X1 pin,Other + A14 / DAC 0 Output,50, P14.8,, X2-33, + A3 / ADC Input,20, P14.3,(INPUT ONLY), X2-31,Analog-4 +A11 - ADC Input,52, P14.15,(INPUT ONLY), X2-29, + A17 - ADC Input / ETH_CRS,53, P15.9,, X2-27, + A6 / AN1_2GO_1 - ADC Input,54, P14.6,(INPUT ONLY), X2-25, +A8 / AN1_2GO_2 - ADC Input,55, P14.12,(INPUT ONLY), X2-23, +A10 / ADC Input,56, P14.14,(INPUT ONLY), X2-21, + I2C Clock SCL / A5 - ADC Input,16, P3.0,(Hardwired to A5), X2-19,IOH-10 + BUTTON2,57, P3.2,, X2-17, + INT / GPIO3_2GO_1,58, P0.10,, X2-15, + INT,59, P0.1,, X2-13, + INT / GPIO3_2GO_2,60, P0.3,, X2-11, + USB Debug TX,24, P0.5,, X2-9, + PWM80-31 output / PWM3,9, P0.11,, X2-7,IOH-2 + PWM42-3 output / PWM1,5, P3.3,, X2-5,IOL-6 + CS_2GO_1,61, P3.5,(Chip Select - Slot 1), X2-3, + LED2,62, P0.7,, X2-1, + QSPI_CLK,63, P0.8,, X2-4, + PWM42-0 / PWM0 / External INT 1,3, P3.6,, X2-6,IOL-4 + PWM42-2 output / PWM2,6, P3.4,, X2-8,IOL-7 + CS_MB,64, P0.12,(Chip Select - MikroBUS), X2-10, + LED1,65, P0.6,, X2-12, + ETH_TXEN,66, P0.4,, X2-14, + SPI-SS / PWM80-01 / PWM4,10, P0.2,, X2-16,IOH-3 + SPI-MISO,12, P0.0,, X2-18,IOH-5 + GPIO4_2GO_1 / PWM80-12 / PWM,67, P0.9,, X2-20, + BUTTON1,68, P3.1,, X2-22, + A4 / ADC Input / SDA / GPIO,21, P14.4,(Hardwired to SDA), X2-24,Analog-5 + A9 / AN2_2GO_2 - ADC Input,69, P14.13,(INPUT ONLY), X2-26, + A7 / AN2_2GO_1 - ADC Input,70, P14.7,(INPUT ONLY), X2-28, + A5 / ADC Input / SCL,22, P14.5,(Hardwired to SCL), X2-30,Analog-6 + A12 - ADC Input,51, P15.2,(INPUT ONLY), X2-32, + A13 - ADC Input,71, P15.3,(INPUT ONLY), X2-34, + A15 / DAC 1 Output,72, P14.9,, X2-36, diff --git a/resources/wiki/xmc4700-X1-X2.csv b/resources/wiki/xmc4700-X1-X2.csv index f404d588..d8b7e7b2 100644 --- a/resources/wiki/xmc4700-X1-X2.csv +++ b/resources/wiki/xmc4700-X1-X2.csv @@ -62,5 +62,5 @@ PWM43-3 / PWM19,91,P6.2,14 SPI_3 SCLK,93,P0.8,10 ,94,P3.3,8 PWM40-0 / PWM20,95,P0.15,6 -PWM40-3 / PWM22,96,P0.12,4, -ECAT0.P1_LINK_ACT,97,P3.12,2,YES Pin 23 +PWM40-3 / PWM22,96,P0.12,4 +ECAT0.P1_LINK_ACT,97,P3.12,2 From 66c337a9135d4b586d7aa117acb740dbcbda93fe Mon Sep 17 00:00:00 2001 From: Paul Carpenter Date: Sat, 30 Jul 2022 00:23:08 +0100 Subject: [PATCH 44/78] Improve GPIO Reset Improve GPIO Reset pin maintainability and remove pin from digital i/o mapping as cannot be used. New XMC1100 Boot Kit pinout image in resources folder --- cores/Main.cpp | 2 +- cores/reset.c | 2 +- .../config/XMC1100_Boot_Kit/pins_arduino.h | 55 ++++++++++--------- .../config/XMC1400_Arduino_Kit/pins_arduino.h | 35 ++++++------ 4 files changed, 51 insertions(+), 43 deletions(-) diff --git a/cores/Main.cpp b/cores/Main.cpp index 8fa41c7a..39abd394 100644 --- a/cores/Main.cpp +++ b/cores/Main.cpp @@ -43,7 +43,7 @@ wiring_time_init(); wiring_analog_init(); // Initialize the reset pin for the XMC1100 Boot Kit series and XMC1400 Kit for Arduino as they are based on Arduino form-factor // Hence, a dedicated reset pin is required. -#if defined(XMC1100_Boot_Kit) || defined(XMC1400_Arduino_Kit) +#ifdef HAS_GPIO_RESET reset_init(); #endif diff --git a/cores/reset.c b/cores/reset.c index 172171af..e243ed41 100644 --- a/cores/reset.c +++ b/cores/reset.c @@ -26,7 +26,7 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #include -#if defined(XMC1100_Boot_Kit) || defined(XMC1400_Arduino_Kit) +#ifdef HAS_GPIO_RESET #include #include diff --git a/variants/XMC1100/config/XMC1100_Boot_Kit/pins_arduino.h b/variants/XMC1100/config/XMC1100_Boot_Kit/pins_arduino.h index 032163a7..73973ecf 100644 --- a/variants/XMC1100/config/XMC1100_Boot_Kit/pins_arduino.h +++ b/variants/XMC1100/config/XMC1100_Boot_Kit/pins_arduino.h @@ -54,6 +54,9 @@ extern const uint8_t NUM_ANALOG_INPUTS; // Indicate unit has RTC/Alarm for simpler RTC control #define HAS_RTC +// Indicate variant has a GPIO pin used for Reset pin +#define HAS_GPIO_RESET 1 + // Defines will be either set by ArduinoIDE in the menu or manually #ifdef SERIAL_HOSTPC // Comment out following line to use Serial on pins (board) @@ -65,7 +68,8 @@ extern const uint8_t NUM_ANALOG_INPUTS; #define SERIAL_DEBUG 1 #endif -#define PWM4_TIMER_PERIOD (2041U) // Generate 490Hz @fCCU=1MHz +// Generate 490Hz @fCCU=1MHz +#define PWM4_TIMER_PERIOD (2041U) #define PCLK 64000000u @@ -88,21 +92,23 @@ extern uint8_t SCK; #define A6 6 #define A7 7 -#define AD_AUX_1 24 // AD_AUX -#define AD_AUX_2 25 // AD_AUX -#define AUX_1 26 // AUX -#define AUX_2 27 // AUX -#define AUX_3 28 // AUX -#define AUX_4 29 // AUX -#define AUX_5 30 // AUX - -#define LED_BUILTIN 13 // Standard Arduino LED pin 13 -#define LED1 26 // Extended LEDs P0.5 -#define LED2 27 // Extended LEDs P0.6 -#define LED3 0 // Extended LEDs P1.2 -#define LED4 1 // Extended LEDs P1.3 -#define LED5 2 // Extended LEDs P1.4 -#define LED6 31 // Extended LEDs P1.5 +// AD_AUX Connector +#define AD_AUX_1 23 +#define AD_AUX_2 24 +// AUX Connector +#define AUX_1 25 +#define AUX_2 26 +#define AUX_3 27 +#define AUX_4 28 +#define AUX_5 29 + +#define LED_BUILTIN 13 +#define LED1 25 +#define LED2 26 +#define LED3 0 +#define LED4 1 +#define LED5 2 +#define LED6 30 #define digitalPinToInterrupt(p) ((p) == 2 ? 0 : ((p) == 3 ? 1 : NOT_AN_INTERRUPT)) @@ -133,15 +139,14 @@ const XMC_PORT_PIN_t mapping_port_pin[] = /* 20 */ {XMC_GPIO_PORT2, 10},// A3 / ADC Input P2.10 /* 21 */ {XMC_GPIO_PORT2, 11},// A4 / ADC Input P2.11 /* 22 */ {XMC_GPIO_PORT2, 2}, // A5 / ADC Input P2.2 (INPUT ONLY) - /* 23 */ {XMC_GPIO_PORT2, 4}, // RESET input ( DO NOT USE as GPIO ) P2.4 (INPUT ONLY) - /* 24 */ {XMC_GPIO_PORT2, 5}, // AD_AUX P2.5 (INPUT ONLY) - /* 25 */ {XMC_GPIO_PORT2, 7}, // AD_AUX P2.7 (INPUT ONLY) - /* 26 */ {XMC_GPIO_PORT0, 5}, // AUX / GPIO / LED 1 output P0.5 - /* 27 */ {XMC_GPIO_PORT0, 6}, // AUX / GPIO / LED 2 output P0.6 - /* 28 */ {XMC_GPIO_PORT0, 10},// AUX / GPIO P0.10 - /* 29 */ {XMC_GPIO_PORT0, 11},// AUX / GPIO P0.11 - /* 30 */ {XMC_GPIO_PORT0, 13},// AUX / GPIO P0.13 - /* 31 */ {XMC_GPIO_PORT1, 5} // LED 6 output P1.5 + /* 23 */ {XMC_GPIO_PORT2, 5}, // AD_AUX P2.5 (INPUT ONLY) + /* 24 */ {XMC_GPIO_PORT2, 7}, // AD_AUX P2.7 (INPUT ONLY) + /* 25 */ {XMC_GPIO_PORT0, 5}, // AUX / GPIO / LED 1 output P0.5 + /* 26 */ {XMC_GPIO_PORT0, 6}, // AUX / GPIO / LED 2 output P0.6 + /* 27 */ {XMC_GPIO_PORT0, 10},// AUX / GPIO P0.10 + /* 28 */ {XMC_GPIO_PORT0, 11},// AUX / GPIO P0.11 + /* 29 */ {XMC_GPIO_PORT0, 13},// AUX / GPIO P0.13 + /* 30 */ {XMC_GPIO_PORT1, 5} // LED 6 output P1.5 }; const uint8_t GND = ( sizeof( mapping_port_pin ) / sizeof( XMC_PORT_PIN_t ) ); const uint8_t NUM_DIGITAL = ( sizeof( mapping_port_pin ) / sizeof( XMC_PORT_PIN_t ) );; diff --git a/variants/XMC1400/config/XMC1400_Arduino_Kit/pins_arduino.h b/variants/XMC1400/config/XMC1400_Arduino_Kit/pins_arduino.h index 497ff15b..538d7721 100644 --- a/variants/XMC1400/config/XMC1400_Arduino_Kit/pins_arduino.h +++ b/variants/XMC1400/config/XMC1400_Arduino_Kit/pins_arduino.h @@ -54,6 +54,9 @@ extern const uint8_t NUM_ANALOG_INPUTS; // Indicate unit has RTC/Alarm #define HAS_RTC 1 +// Indicate variant has a GPIO pin used for Reset pin +#define HAS_GPIO_RESET 1 + // Defines will be either set by ArduinoIDE in the menu or manually #ifdef SERIAL_HOSTPC // Comment out following line to use Serial on pins (board) @@ -92,17 +95,17 @@ extern const uint8_t NUM_ANALOG_INPUTS; #define AD_AUX_3 8 // AD_AUX #define AD_AUX_4 9 // AD_AUX -#define AUX_1 26 // AUX +#define AUX_1 25 // AUX #define LED1 13 #define LED2 2 -#define LED3 27 +#define LED3 26 #define LED_BUILTIN LED1 #define EXT_INTR_0 3 -#define EXT_INTR_1 26 +#define EXT_INTR_1 25 -#define digitalPinToInterrupt(p) ((p) == 3 ? 0 : ((p) == 26 ? 1 : NOT_AN_INTERRUPT)) +#define digitalPinToInterrupt(p) ((p) == 3 ? 0 : ((p) == 25 ? 1 : NOT_AN_INTERRUPT)) /* Mapping interrupt handlers. Notice that XMC1400 can have interrupt handlers working in 3 modes, the defines below assumes the mode A. For details refer to assembly file and reference manual. @@ -128,7 +131,8 @@ extern const uint8_t NUM_ANALOG_INPUTS; #define ERU0_0_IRQHandler IRQ3_Handler // RESET #define ERU0_0_IRQn IRQ3_IRQn -#ifdef ARDUINO_MAIN //index is arduino pin count +#ifdef ARDUINO_MAIN +//index is Arduino pin count // Mapping of digital pins and comments const XMC_PORT_PIN_t mapping_port_pin[] = { @@ -153,13 +157,12 @@ const XMC_PORT_PIN_t mapping_port_pin[] = /* 18 */ {XMC_GPIO_PORT2 , 10}, // A3 / ADC Input P2.10 /* 19 */ {XMC_GPIO_PORT2 , 1}, // A4 / I2C Data / Address SDA P2.1 /* 20 */ {XMC_GPIO_PORT2 , 0}, // A5 / I2C Clock SCL P2.0 - /* 21 */ {XMC_GPIO_PORT2 , 4}, // RESET input ( DO NOT USE as GPIO ) P2.4 (INPUT ONLY) - /* 22 */ {XMC_GPIO_PORT2 , 11}, // GPIO / AD_AUX_1 Additional Pin P2.11 - /* 23 */ {XMC_GPIO_PORT2 , 7}, // GPIO / AD_AUX_2 Additional Pin P2.7 - /* 24 */ {XMC_GPIO_PORT2 , 5}, // GPIO / AD_AUX_3 Additional Pin P2.5 - /* 25 */ {XMC_GPIO_PORT2 , 2}, // GPIO / AD_AUX_4 Additional Pin P2.2 - /* 26 */ {XMC_GPIO_PORT1 , 4}, // External int 1 P1.4 - /* 27 */ {XMC_GPIO_PORT1 , 5} // LED3 output P1.5 + /* 21 */ {XMC_GPIO_PORT2 , 11}, // GPIO / AD_AUX_1 Additional Pin P2.11 + /* 22 */ {XMC_GPIO_PORT2 , 7}, // GPIO / AD_AUX_2 Additional Pin P2.7 + /* 23 */ {XMC_GPIO_PORT2 , 5}, // GPIO / AD_AUX_3 Additional Pin P2.5 + /* 24 */ {XMC_GPIO_PORT2 , 2}, // GPIO / AD_AUX_4 Additional Pin P2.2 + /* 25 */ {XMC_GPIO_PORT1 , 4}, // External int 1 P1.4 + /* 26 */ {XMC_GPIO_PORT1 , 5} // LED3 output P1.5 }; @@ -209,10 +212,10 @@ XMC_ADC_t mapping_adc[] = { VADC, 6, VADC_G0, 0, 7, DISABLED }, //A4 { VADC, 5, VADC_G0, 0, 10, DISABLED }, //A5 // Additional channels added here - { VADC, 4, VADC_G0, 0, 5, DISABLED }, //AUX 22 - { VADC, 1, VADC_G1, 1, 1, DISABLED }, //AUX 23 - { VADC, 7, VADC_G1, 1, 2, DISABLED }, //AUX 24 - { VADC, 7, VADC_G0, 0, 3, DISABLED } //AUX 25 + { VADC, 4, VADC_G0, 0, 5, DISABLED }, //AUX 21 + { VADC, 1, VADC_G1, 1, 1, DISABLED }, //AUX 22 + { VADC, 7, VADC_G1, 1, 2, DISABLED }, //AUX 23 + { VADC, 7, VADC_G0, 0, 3, DISABLED } //AUX 24 }; const uint8_t NUM_ANALOG_INPUTS = ( sizeof( mapping_adc ) / sizeof( XMC_ADC_t ) ); From ea0a2ef5c5c8805feb9fdb73be779842c6305656 Mon Sep 17 00:00:00 2001 From: Paul Carpenter Date: Sat, 30 Jul 2022 00:36:00 +0100 Subject: [PATCH 45/78] Tidy defines Ensure remote bug of comments on defines not present, Make more readable Fix XMC4400 comments of two X2-12 references --- .../config/XMC1100_H_BRIDGE2GO/pins_arduino.h | 13 +- .../config/XMC1100_XMC2GO/pins_arduino.h | 9 +- .../config/XMC1300_Boot_Kit/pins_arduino.h | 36 +-- .../config/XMC1300_Sense2GoL/pins_arduino.h | 11 +- variants/XMC4400/XMC4400.h | 0 .../config/XMC4400_Platform2GO/pins_arduino.h | 206 +++++++++--------- variants/XMC4400/linker_script.ld | 0 variants/XMC4400/startup_XMC4400.S | 0 variants/XMC4400/system_XMC4400.c | 0 variants/XMC4400/system_XMC4400.h | 0 .../XMC4700_Radar_Baseboard/pins_arduino.h | 18 +- .../config/XMC4700_Relax_Kit/pins_arduino.h | 53 ++--- 12 files changed, 181 insertions(+), 165 deletions(-) mode change 100755 => 100644 variants/XMC4400/XMC4400.h mode change 100755 => 100644 variants/XMC4400/linker_script.ld mode change 100755 => 100644 variants/XMC4400/startup_XMC4400.S mode change 100755 => 100644 variants/XMC4400/system_XMC4400.c mode change 100755 => 100644 variants/XMC4400/system_XMC4400.h diff --git a/variants/XMC1100/config/XMC1100_H_BRIDGE2GO/pins_arduino.h b/variants/XMC1100/config/XMC1100_H_BRIDGE2GO/pins_arduino.h index 3b73f043..54293386 100644 --- a/variants/XMC1100/config/XMC1100_H_BRIDGE2GO/pins_arduino.h +++ b/variants/XMC1100/config/XMC1100_H_BRIDGE2GO/pins_arduino.h @@ -68,7 +68,8 @@ extern const uint8_t NUM_ANALOG_INPUTS; #define SERIAL_DEBUG 1 #endif -#define PWM4_TIMER_PERIOD (2041U) // Generate 490Hz @fCCU=64MHz +// Generate 490Hz @fCCU=64MHz +#define PWM4_TIMER_PERIOD (2041U) #define PCLK 64000000u @@ -85,9 +86,9 @@ extern uint8_t SCK; #define A0 0 #define A1 1 -#define LED1 14 // Extended LEDs -#define LED2 15 // Extended LEDs -#define LED_BUILTIN LED1 //Standard Arduino LED: Used LED1 +#define LED1 14 +#define LED2 15 +#define LED_BUILTIN LED1 // H-BRIDGE2Go specific Pins #define SO PIN_SPI_MISO @@ -96,8 +97,8 @@ extern uint8_t SCK; // Following for DOCUMENTATION only //#define CSN PIN_SPI_SS -//#define DIR 6 -//#define DIS 10 +//#define DIR 6 +//#define DIS 10 //#define PWM 11 #define digitalPinToInterrupt(p) (((p) == 9) ? 0 : NOT_AN_INTERRUPT) diff --git a/variants/XMC1100/config/XMC1100_XMC2GO/pins_arduino.h b/variants/XMC1100/config/XMC1100_XMC2GO/pins_arduino.h index e8d40912..ade4a129 100644 --- a/variants/XMC1100/config/XMC1100_XMC2GO/pins_arduino.h +++ b/variants/XMC1100/config/XMC1100_XMC2GO/pins_arduino.h @@ -68,7 +68,8 @@ extern const uint8_t NUM_ANALOG_INPUTS; #define SERIAL_DEBUG 1 #endif -#define PWM4_TIMER_PERIOD (2041U) // Generate 490Hz @fCCU=1MHz +// Generate 490Hz @fCCU=1MHz +#define PWM4_TIMER_PERIOD (2041U) #define PCLK 64000000u @@ -87,9 +88,9 @@ extern uint8_t SCK; #define A2 2 #define A3 3 -#define LED1 14 // Extended LEDs -#define LED2 15 // Extended LEDs -#define LED_BUILTIN LED1 //Standard Arduino LED: Used LED1 +#define LED1 14 +#define LED2 15 +#define LED_BUILTIN LED1 #define digitalPinToInterrupt(p) (((p) == 9) ? 0 : NOT_AN_INTERRUPT) diff --git a/variants/XMC1300/config/XMC1300_Boot_Kit/pins_arduino.h b/variants/XMC1300/config/XMC1300_Boot_Kit/pins_arduino.h index 81af9a75..8a866af5 100644 --- a/variants/XMC1300/config/XMC1300_Boot_Kit/pins_arduino.h +++ b/variants/XMC1300/config/XMC1300_Boot_Kit/pins_arduino.h @@ -69,8 +69,10 @@ extern const uint8_t NUM_ANALOG_INPUTS; #define SERIAL_DEBUG 1 #endif -#define PWM4_TIMER_PERIOD (2041U) // Generate 490Hz @fCCU=1MHz -#define PWM8_TIMER_PERIOD (2041U) // Generate 490Hz @fCCU=1MHz +// Generate 490Hz @fCCU=1MHz +#define PWM4_TIMER_PERIOD (2041U) +// Generate 490Hz @fCCU=1MHz +#define PWM8_TIMER_PERIOD (2041U) #define PCLK 64000000u @@ -99,21 +101,21 @@ extern uint8_t SCK; #define PIN_SPI_SS_2 23 -#define AD_AUX_1 24 // AD_AUX -#define AD_AUX_2 25 // AD_AUX -#define AUX_1 26 // AUX -#define AUX_2 27 // AUX -#define AUX_3 28 // AUX -#define AUX_4 29 // AUX -#define AUX_5 30 // AUX - -#define LED1 24 // Extended LEDs P0.0 -#define LED2 25 // Extended LEDs P0.1 -#define LED3 29 // Extended LEDs P0.6 -#define LED4 30 // Extended LEDs P0.7 -#define LED5 27 // Extended LEDs P0.8 -#define LED6 28 // Extended LEDs P0.9 -#define LED_BUILTIN LED1 // Standard Arduino LED +#define AD_AUX_1 24 +#define AD_AUX_2 25 +#define AUX_1 26 +#define AUX_2 27 +#define AUX_3 28 +#define AUX_4 29 +#define AUX_5 30 + +#define LED1 24 +#define LED2 25 +#define LED3 29 +#define LED4 30 +#define LED5 27 +#define LED6 28 +#define LED_BUILTIN LED1 #define digitalPinToInterrupt(p) ((p) == 14 ? 0 : ((p) == 15 ? 1 : NOT_AN_INTERRUPT)) diff --git a/variants/XMC1300/config/XMC1300_Sense2GoL/pins_arduino.h b/variants/XMC1300/config/XMC1300_Sense2GoL/pins_arduino.h index b271fd30..10d8e980 100644 --- a/variants/XMC1300/config/XMC1300_Sense2GoL/pins_arduino.h +++ b/variants/XMC1300/config/XMC1300_Sense2GoL/pins_arduino.h @@ -58,7 +58,8 @@ extern const uint8_t NUM_ANALOG_INPUTS; // Indicate unit has RTC/Alarm #define HAS_RTC 1 -#define PWM4_TIMER_PERIOD (2041U) // Generate 490Hz @fCCU=1MHz +// Generate 490Hz @fCCU=1MHz +#define PWM4_TIMER_PERIOD (2041U) #define PCLK 64000000u @@ -76,10 +77,10 @@ extern uint8_t SCK; // Actual on board signal is TX_ON #define BGT_ON 2 -#define LED1 3 // Extended LEDs P0.5 D5 -#define LED2 5 // Extended LEDs P0.7 D4 -#define LED3 7 // Extended LEDs P0.9 D3 -#define LED_BUILTIN LED1 // Standard Arduino LED +#define LED1 3 +#define LED2 5 +#define LED3 7 +#define LED_BUILTIN LED1 // Disable external interrupt pins #define digitalPinToInterrupt(p) NOT_AN_INTERRUPT diff --git a/variants/XMC4400/XMC4400.h b/variants/XMC4400/XMC4400.h old mode 100755 new mode 100644 diff --git a/variants/XMC4400/config/XMC4400_Platform2GO/pins_arduino.h b/variants/XMC4400/config/XMC4400_Platform2GO/pins_arduino.h index 2aff29f7..b2bf6436 100644 --- a/variants/XMC4400/config/XMC4400_Platform2GO/pins_arduino.h +++ b/variants/XMC4400/config/XMC4400_Platform2GO/pins_arduino.h @@ -59,8 +59,10 @@ extern const uint8_t NUM_ANALOG_OUTPUTS; // Indicate unit has RTC/Alarm #define HAS_RTC 1 -#define PWM4_TIMER_PERIOD (0x11EF) //Generate 490Hz @fCCU=144MHz -#define PWM8_TIMER_PERIOD (0x11EF) // Generate 490Hz @fCCU=144MHz +//Generate 490Hz @fCCU=144MHz +#define PWM4_TIMER_PERIOD (0x11EF) +// Generate 490Hz @fCCU=144MHz +#define PWM8_TIMER_PERIOD (0x11EF) #define PCLK 64000000u @@ -74,32 +76,32 @@ extern uint8_t MOSI; extern uint8_t MISO; extern uint8_t SCK; -#define A0 0 // ADC G0CH0 P14.0 -#define A1 1 // ADC G0CH1 P14.1 -#define A2 2 // ADC G0CH2 P14.2 -#define A3 3 // ADC G0CH3 P14.3 -#define A4 4 // ADC G0CH4 P14.4 -#define A5 5 // ADC G0CH5 P14.5 +#define A0 0 +#define A1 1 +#define A2 2 +#define A3 3 +#define A4 4 +#define A5 5 //Additional ADC ports starting here -#define A6 6 // ADC G0CH6 on P14.6 -#define A7 7 // ADC G0CH7 on P14.7 -#define A8 8 // ADC G1CH4 on P14.12 -#define A9 9 // ADC G1CH5 on P14.13 -#define A10 10 // ADC G1CH6 on P14.14 -#define A11 11 // ADC G1CH7 on P14.15 -#define A12 12 // ADC G2CH2 on P15.2 -#define A13 13 // ADC G2CH3 on P15.3 -#define A14 14 // ADC G1CH0 on P14.8 -#define A15 15 // ADC G1CH1 on P14.9 -#define A16 16 // ADC G3CH0 on P15.8 -#define A17 17 // ADC G3CH1 on P15.9 - -#define LED1 65 // Additional LED1 -#define LED2 62 // Additional LED2 -#define LED_BUILTIN LED1 // Standard Arduino LED: Uses LED1 - -#define BUTTON1 68 // Additional BUTTON1 -#define BUTTON2 57 // Additional BUTTON2 +#define A6 6 +#define A7 7 +#define A8 8 +#define A9 9 +#define A10 10 +#define A11 11 +#define A12 12 +#define A13 13 +#define A14 14 +#define A15 15 +#define A16 16 +#define A17 17 + +#define LED1 65 +#define LED2 62 +#define LED_BUILTIN LED1 + +#define BUTTON1 68 +#define BUTTON2 57 #define digitalPinToInterrupt(p) ((p) == 2 ? 0 : ((p) == 3 ? 1 : NOT_AN_INTERRUPT)) @@ -107,91 +109,91 @@ extern uint8_t SCK; // Mapping of digital pins and comments const XMC_PORT_PIN_t mapping_port_pin[]= { - /* 0 */ {XMC_GPIO_PORT2, 15}, // RX P2.15 X1-4 - /* 1 */ {XMC_GPIO_PORT2, 14}, // TX P2.14 X1-3 - /* 2 */ {XMC_GPIO_PORT1, 0}, // GPIO / External INT 0 P1.0 X1-11 - /* 3 */ {XMC_GPIO_PORT3, 6}, // PWM42-0 / PWM0 / External INT 1 P3.6 X2-6 - /* 4 */ {XMC_GPIO_PORT1, 6}, // GPIO / IO_0 P1.6 X1-7 - /* 5 */ {XMC_GPIO_PORT3, 3}, // PWM42-3 output / PWM1 P3.3 X2-5 - /* 6 */ {XMC_GPIO_PORT3, 4}, // PWM42-2 output / PWM2 P3.4 X2-8 - /* 7 */ {XMC_GPIO_PORT1, 14}, // GPIO / IO_1 P1.14 X1-21 - /* 8 */ {XMC_GPIO_PORT4, 1}, // GPIO / IO_2 P4.1 X1-6 - /* 9 */ {XMC_GPIO_PORT0, 11}, // PWM80-31 output / PWM3 P0.11 X2-7 - /* 10 */ {XMC_GPIO_PORT0, 2}, // SPI-SS / PWM80-01 / PWM4 P0.2 X2-16 - /* 11 */ {XMC_GPIO_PORT1, 9}, // SPI-MOSI P1.9 X1-10 - /* 12 */ {XMC_GPIO_PORT0, 0}, // SPI-MISO P0.0 X2-12 - /* 13 */ {XMC_GPIO_PORT1, 8}, // SPI-SCK / GPIO P1.8 X1-9 - /* 14 */ {XMC_GPIO_PORT2, 3}, // AREF TODO: / ETH_RXD1 / PWM41-2 P2.3 X1-32 - /* 15 */ {XMC_GPIO_PORT2, 5}, // I2C Data / Address SDA / A4 / PWM41-0 P2.5 (Hardwired to A4) X1-34 - /* 16 */ {XMC_GPIO_PORT3, 0}, // I2C Clock SCL / A5 - ADC Input P3.0 (Hardwired to A5) X2-19 - /* 17 */ {XMC_GPIO_PORT14, 0}, // A0 / ADC Input P14.0 (INPUT ONLY) - /* 18 */ {XMC_GPIO_PORT14, 1}, // A1 / ADC Input P14.1 (INPUT ONLY) - /* 19 */ {XMC_GPIO_PORT14, 2}, // A2 / ADC Input P14.2 (INPUT ONLY) - /* 20 */ {XMC_GPIO_PORT14, 3}, // A3 / ADC Input P14.3 (INPUT ONLY) X2-31 - /* 21 */ {XMC_GPIO_PORT14, 4}, // A4 / ADC Input / SDA / GPIO P14.4 (Hardwired to SDA) X2-24 - /* 22 */ {XMC_GPIO_PORT14, 5}, // A5 / ADC Input / SCL P14.5 (Hardwired to SCL) X2-30 - /* 23 */ {XMC_GPIO_PORT1, 15}, // USB Debug RX P1.15 X1-22 - /* 24 */ {XMC_GPIO_PORT0, 5}, // USB Debug TX P0.5 X2-9 + /* 0 */ {XMC_GPIO_PORT2, 15}, // RX P2.15 X1-4 + /* 1 */ {XMC_GPIO_PORT2, 14}, // TX P2.14 X1-3 + /* 2 */ {XMC_GPIO_PORT1, 0}, // GPIO / External INT 0 P1.0 X1-11 + /* 3 */ {XMC_GPIO_PORT3, 6}, // PWM42-0 / PWM0 / External INT 1 P3.6 X2-6 + /* 4 */ {XMC_GPIO_PORT1, 6}, // GPIO / IO_0 P1.6 X1-7 + /* 5 */ {XMC_GPIO_PORT3, 3}, // PWM42-3 output / PWM1 P3.3 X2-5 + /* 6 */ {XMC_GPIO_PORT3, 4}, // PWM42-2 output / PWM2 P3.4 X2-8 + /* 7 */ {XMC_GPIO_PORT1, 14}, // GPIO / IO_1 P1.14 X1-21 + /* 8 */ {XMC_GPIO_PORT4, 1}, // GPIO / IO_2 P4.1 X1-6 + /* 9 */ {XMC_GPIO_PORT0, 11}, // PWM80-31 output / PWM3 P0.11 X2-7 + /* 10 */ {XMC_GPIO_PORT0, 2}, // SPI-SS / PWM80-01 / PWM4 P0.2 X2-16 + /* 11 */ {XMC_GPIO_PORT1, 9}, // SPI-MOSI P1.9 X1-10 + /* 12 */ {XMC_GPIO_PORT0, 0}, // SPI-MISO P0.0 X2-18 + /* 13 */ {XMC_GPIO_PORT1, 8}, // SPI-SCK / GPIO P1.8 X1-9 + /* 14 */ {XMC_GPIO_PORT2, 3}, // AREF TODO: / ETH_RXD1 / PWM41-2 P2.3 X1-32 + /* 15 */ {XMC_GPIO_PORT2, 5}, // I2C Data / Address SDA / A4 / PWM41-0 P2.5 (Hardwired to A4) X1-34 + /* 16 */ {XMC_GPIO_PORT3, 0}, // I2C Clock SCL / A5 - ADC Input P3.0 (Hardwired to A5) X2-19 + /* 17 */ {XMC_GPIO_PORT14, 0}, // A0 / ADC Input P14.0 (INPUT ONLY) + /* 18 */ {XMC_GPIO_PORT14, 1}, // A1 / ADC Input P14.1 (INPUT ONLY) + /* 19 */ {XMC_GPIO_PORT14, 2}, // A2 / ADC Input P14.2 (INPUT ONLY) + /* 20 */ {XMC_GPIO_PORT14, 3}, // A3 / ADC Input P14.3 (INPUT ONLY) X2-31 + /* 21 */ {XMC_GPIO_PORT14, 4}, // A4 / ADC Input / SDA / GPIO P14.4 (Hardwired to SDA) X2-24 + /* 22 */ {XMC_GPIO_PORT14, 5}, // A5 / ADC Input / SCL P14.5 (Hardwired to SCL) X2-30 + /* 23 */ {XMC_GPIO_PORT1, 15}, // USB Debug RX P1.15 X1-22 + /* 24 */ {XMC_GPIO_PORT0, 5}, // USB Debug TX P0.5 X2-9 //Additional pins for port X1 starting here - /* 25 */ {XMC_GPIO_PORT2, 10}, // GPIO / ETH_LED P2.10 X1-37 - /* 26 */ {XMC_GPIO_PORT2, 8}, // GPIO / ETH_TXDO / PWM80-32 P2.8 X1-35 - /* 27 */ {XMC_GPIO_PORT2, 4}, // GPIO / ETH_RXER P2.4 X1-33 - /* 28 */ {XMC_GPIO_PORT2, 2}, // GPIO / ETH_RXDO P2.2 X1-31 - /* 29 */ {XMC_GPIO_PORT2, 0}, // GPIO / ETH_MDIO / PWM81-21 P2.0 X1-29 - /* 30 */ {XMC_GPIO_PORT2, 6}, // PWM80-13 / GPIO4_2GO_2 P2.6 X1-27 - /* 31 */ {XMC_GPIO_PORT5, 2}, // GPIO / RST P5.2 X1-25 - /* 32 */ {XMC_GPIO_PORT5, 0}, // GPIO1_2GO_1 P5.0 X1-23 - /* 33 */ {XMC_GPIO_PORT1, 12}, // GPIO / CAN_TX P1.12 X1-19 - /* 34 */ {XMC_GPIO_PORT1, 10}, // GPIO / GPIO2_2GO_1 P1.10 X1-17 - /* 35 */ {XMC_GPIO_PORT1, 4}, // GPIO / QSPI_IO1 P1.4 X1-15 - /* 36 */ {XMC_GPIO_PORT1, 2}, // GPIO / QSPI_IO3 P1.2 X1-13 - /* 37 */ {XMC_GPIO_PORT4, 0}, // GPIO / GPIO2_2GO_2 P4.0 X1-5 - /* 38 */ {XMC_GPIO_PORT1, 7}, // GPIO / SPI_CS_2GO_2 P1.7 (Chip Select - Slot 2) X1-8 - /* 39 */ {XMC_GPIO_PORT1, 1}, // GPIO1_2GO_2 P1.1 X1-12 - /* 40 */ {XMC_GPIO_PORT1, 3}, // GPIO / QSPI_IO3 P1.3 X1-14 - /* 41 */ {XMC_GPIO_PORT1, 5}, // GPIO / QSPI_IO0 P1.5 X1-16 - /* 42 */ {XMC_GPIO_PORT1, 11}, // GPIO / QSPI_CS P1.11 X1-18 - /* 43 */ {XMC_GPIO_PORT1, 13}, // GPIO / CAN_RX P1.13 X1-20 - /* 44 */ {XMC_GPIO_PORT5, 1}, // GPIO / ETH_INT P5.1 X1-24 - /* 45 */ {XMC_GPIO_PORT5, 7}, // PWM81-02 P5.7 X1-26 - /* 46 */ {XMC_GPIO_PORT2, 7}, // PWM80-03 / ETH_MDC P2.7 X1-28 - /* 47 */ {XMC_GPIO_PORT2, 1}, // SWV ""DEBUG Do NOT Use ** P2.1 X1-30 - /* 48 */ {XMC_GPIO_PORT2, 9}, // PWM80-22 / ETH_TXD1 P2.9 X1-36 - /* 49 */ {XMC_GPIO_PORT15, 8}, // A16 / ETH_CLK P15.8 X1-38 + /* 25 */ {XMC_GPIO_PORT2, 10}, // GPIO / ETH_LED P2.10 X1-37 + /* 26 */ {XMC_GPIO_PORT2, 8}, // GPIO / ETH_TXDO / PWM80-32 P2.8 X1-35 + /* 27 */ {XMC_GPIO_PORT2, 4}, // GPIO / ETH_RXER P2.4 X1-33 + /* 28 */ {XMC_GPIO_PORT2, 2}, // GPIO / ETH_RXDO P2.2 X1-31 + /* 29 */ {XMC_GPIO_PORT2, 0}, // GPIO / ETH_MDIO / PWM81-21 P2.0 X1-29 + /* 30 */ {XMC_GPIO_PORT2, 6}, // PWM80-13 / GPIO4_2GO_2 P2.6 X1-27 + /* 31 */ {XMC_GPIO_PORT5, 2}, // GPIO / RST P5.2 X1-25 + /* 32 */ {XMC_GPIO_PORT5, 0}, // GPIO1_2GO_1 P5.0 X1-23 + /* 33 */ {XMC_GPIO_PORT1, 12}, // GPIO / CAN_TX P1.12 X1-19 + /* 34 */ {XMC_GPIO_PORT1, 10}, // GPIO / GPIO2_2GO_1 P1.10 X1-17 + /* 35 */ {XMC_GPIO_PORT1, 4}, // GPIO / QSPI_IO1 P1.4 X1-15 + /* 36 */ {XMC_GPIO_PORT1, 2}, // GPIO / QSPI_IO3 P1.2 X1-13 + /* 37 */ {XMC_GPIO_PORT4, 0}, // GPIO / GPIO2_2GO_2 P4.0 X1-5 + /* 38 */ {XMC_GPIO_PORT1, 7}, // GPIO / SPI_CS_2GO_2 P1.7 (Chip Select - Slot 2) X1-8 + /* 39 */ {XMC_GPIO_PORT1, 1}, // GPIO1_2GO_2 P1.1 X1-12 + /* 40 */ {XMC_GPIO_PORT1, 3}, // GPIO / QSPI_IO3 P1.3 X1-14 + /* 41 */ {XMC_GPIO_PORT1, 5}, // GPIO / QSPI_IO0 P1.5 X1-16 + /* 42 */ {XMC_GPIO_PORT1, 11}, // GPIO / QSPI_CS P1.11 X1-18 + /* 43 */ {XMC_GPIO_PORT1, 13}, // GPIO / CAN_RX P1.13 X1-20 + /* 44 */ {XMC_GPIO_PORT5, 1}, // GPIO / ETH_INT P5.1 X1-24 + /* 45 */ {XMC_GPIO_PORT5, 7}, // PWM81-02 P5.7 X1-26 + /* 46 */ {XMC_GPIO_PORT2, 7}, // PWM80-03 / ETH_MDC P2.7 X1-28 + /* 47 */ {XMC_GPIO_PORT2, 1}, // SWV ""DEBUG Do NOT Use ** P2.1 X1-30 + /* 48 */ {XMC_GPIO_PORT2, 9}, // PWM80-22 / ETH_TXD1 P2.9 X1-36 + /* 49 */ {XMC_GPIO_PORT15, 8}, // A16 / ETH_CLK P15.8 X1-38 //Additional pins for port X2 starting here - /* 50 */ {XMC_GPIO_PORT14, 8}, // A14 / DAC 0 Output P14.8 X2-33 - /* 51 */ {XMC_GPIO_PORT15, 2}, // A12 - ADC Input P15.2 (INPUT ONLY) X2-32 - /* 52 */ {XMC_GPIO_PORT14, 15}, // A11 - ADC Input P14.15 (INPUT ONLY) X2-29 - /* 53 */ {XMC_GPIO_PORT15, 9}, // A17 - ADC Input / ETH_CRS P15.9 X2-27 - /* 54 */ {XMC_GPIO_PORT14, 6}, // A6 / AN1_2GO_1 - ADC Input P14.6 (INPUT ONLY) X2-25 - /* 55 */ {XMC_GPIO_PORT14, 12}, // A8 / AN1_2GO_2 - ADC Input P14.12 (INPUT ONLY) X2-23 - /* 56 */ {XMC_GPIO_PORT14, 14}, // A10 / ADC Input P14.14 (INPUT ONLY) X2-21 - /* 57 */ {XMC_GPIO_PORT3, 2}, // BUTTON2 P3.2 X2-17 - /* 58 */ {XMC_GPIO_PORT0, 10}, // INT / GPIO3_2GO_1 P0.10 X2-15 - /* 59 */ {XMC_GPIO_PORT0, 1}, // INT P0.1 X2-13 - /* 60 */ {XMC_GPIO_PORT0, 3}, // INT / GPIO3_2GO_2 P0.3 X2-11 - /* 61 */ {XMC_GPIO_PORT3, 5}, // CS_2GO_1 P3.5 (Chip Select - Slot 1) X2-3 - /* 62 */ {XMC_GPIO_PORT0, 7}, // LED2 P0.7 X2-1 - /* 63 */ {XMC_GPIO_PORT0, 8}, // QSPI_CLK P0.8 X2-4 - /* 64 */ {XMC_GPIO_PORT0, 12}, // CS_MB P0.12 (Chip Select - MikroBUS) X2-10 - /* 65 */ {XMC_GPIO_PORT0, 6}, // LED1 P0.6 X2-12 - /* 66 */ {XMC_GPIO_PORT0, 4}, // ETH_TXEN P0.4 X2-14 - /* 67 */ {XMC_GPIO_PORT0, 9}, // GPIO4_2GO_1 / PWM80-12 / PWM P0.9 X2-20 - /* 68 */ {XMC_GPIO_PORT3, 1}, // BUTTON1 P3.1 X2-22 - /* 69 */ {XMC_GPIO_PORT14, 13}, // A9 / AN2_2GO_2 - ADC Input P14.13 (INPUT ONLY) X2-26 - /* 70 */ {XMC_GPIO_PORT14, 7}, // A7 / AN2_2GO_1 - ADC Input P14.7 (INPUT ONLY) X2-28 - /* 71 */ {XMC_GPIO_PORT15, 3}, // A13 - ADC Input P15.3 (INPUT ONLY) X2-34 - /* 72 */ {XMC_GPIO_PORT14, 9} // A15 / DAC 1 Output P14.9 X2-36 + /* 50 */ {XMC_GPIO_PORT14, 8}, // A14 / DAC 0 Output P14.8 X2-33 + /* 51 */ {XMC_GPIO_PORT15, 2}, // A12 - ADC Input P15.2 (INPUT ONLY) X2-32 + /* 52 */ {XMC_GPIO_PORT14, 15}, // A11 - ADC Input P14.15 (INPUT ONLY) X2-29 + /* 53 */ {XMC_GPIO_PORT15, 9}, // A17 - ADC Input / ETH_CRS P15.9 X2-27 + /* 54 */ {XMC_GPIO_PORT14, 6}, // A6 / AN1_2GO_1 - ADC Input P14.6 (INPUT ONLY) X2-25 + /* 55 */ {XMC_GPIO_PORT14, 12}, // A8 / AN1_2GO_2 - ADC Input P14.12 (INPUT ONLY) X2-23 + /* 56 */ {XMC_GPIO_PORT14, 14}, // A10 / ADC Input P14.14 (INPUT ONLY) X2-21 + /* 57 */ {XMC_GPIO_PORT3, 2}, // BUTTON2 P3.2 X2-17 + /* 58 */ {XMC_GPIO_PORT0, 10}, // INT / GPIO3_2GO_1 P0.10 X2-15 + /* 59 */ {XMC_GPIO_PORT0, 1}, // INT P0.1 X2-13 + /* 60 */ {XMC_GPIO_PORT0, 3}, // INT / GPIO3_2GO_2 P0.3 X2-11 + /* 61 */ {XMC_GPIO_PORT3, 5}, // CS_2GO_1 P3.5 (Chip Select - Slot 1) X2-3 + /* 62 */ {XMC_GPIO_PORT0, 7}, // LED2 P0.7 X2-1 + /* 63 */ {XMC_GPIO_PORT0, 8}, // QSPI_CLK P0.8 X2-4 + /* 64 */ {XMC_GPIO_PORT0, 12}, // CS_MB P0.12 (Chip Select - MikroBUS) X2-10 + /* 65 */ {XMC_GPIO_PORT0, 6}, // LED1 P0.6 X2-12 + /* 66 */ {XMC_GPIO_PORT0, 4}, // ETH_TXEN P0.4 X2-14 + /* 67 */ {XMC_GPIO_PORT0, 9}, // GPIO4_2GO_1 / PWM80-12 / PWM P0.9 X2-20 + /* 68 */ {XMC_GPIO_PORT3, 1}, // BUTTON1 P3.1 X2-22 + /* 69 */ {XMC_GPIO_PORT14, 13}, // A9 / AN2_2GO_2 - ADC Input P14.13 (INPUT ONLY) X2-26 + /* 70 */ {XMC_GPIO_PORT14, 7}, // A7 / AN2_2GO_1 - ADC Input P14.7 (INPUT ONLY) X2-28 + /* 71 */ {XMC_GPIO_PORT15, 3}, // A13 - ADC Input P15.3 (INPUT ONLY) X2-34 + /* 72 */ {XMC_GPIO_PORT14, 9} // A15 / DAC 1 Output P14.9 X2-36 }; const uint8_t GND = ( sizeof( mapping_port_pin ) / sizeof( XMC_PORT_PIN_t ) ); const uint8_t NUM_DIGITAL = ( sizeof( mapping_port_pin ) / sizeof( XMC_PORT_PIN_t ) );; const XMC_PIN_INTERRUPT_t mapping_interrupt[] = { - /* 0 */ {CCU40, CCU40_CC43, 3, 0, CCU40_IN3_P1_0}, - /* 1 */ {CCU42, CCU42_CC40, 0, 1, CCU42_IN0_P3_6} + /* 0 */ {CCU40, CCU40_CC43, 3, 0, CCU40_IN3_P1_0}, + /* 1 */ {CCU42, CCU42_CC40, 0, 1, CCU42_IN0_P3_6} }; const uint8_t NUM_INTERRUPT = ( sizeof( mapping_interrupt ) / sizeof( XMC_PIN_INTERRUPT_t ) ); diff --git a/variants/XMC4400/linker_script.ld b/variants/XMC4400/linker_script.ld old mode 100755 new mode 100644 diff --git a/variants/XMC4400/startup_XMC4400.S b/variants/XMC4400/startup_XMC4400.S old mode 100755 new mode 100644 diff --git a/variants/XMC4400/system_XMC4400.c b/variants/XMC4400/system_XMC4400.c old mode 100755 new mode 100644 diff --git a/variants/XMC4400/system_XMC4400.h b/variants/XMC4400/system_XMC4400.h old mode 100755 new mode 100644 diff --git a/variants/XMC4700/config/XMC4700_Radar_Baseboard/pins_arduino.h b/variants/XMC4700/config/XMC4700_Radar_Baseboard/pins_arduino.h index b32684a2..00d16954 100644 --- a/variants/XMC4700/config/XMC4700_Radar_Baseboard/pins_arduino.h +++ b/variants/XMC4700/config/XMC4700_Radar_Baseboard/pins_arduino.h @@ -65,8 +65,10 @@ extern const uint8_t NUM_ANALOG_OUTPUTS; // Board has two serial ports pre-assigned to debug and on-board -#define PWM4_TIMER_PERIOD (0x11EF) // Generate 490Hz @fCCU=144MHz -#define PWM8_TIMER_PERIOD (0x11EF) // Generate 490Hz @fCCU=144MHz +// Generate 490Hz @fCCU=144MHz +#define PWM4_TIMER_PERIOD (0x11EF) +// Generate 490Hz @fCCU=144MHz +#define PWM8_TIMER_PERIOD (0x11EF) #define PCLK 144000000u @@ -97,10 +99,14 @@ static const uint8_t SCK_SD = PIN_SPI_SCK_SD; #define A4 4 #define A5 5 -#define LED_RED 22 // LED Red channel -#define LED_GREEN 23 // LED Green channel -#define LED_BLUE 24 // LED Blue channel -#define BUTTON1 25 // Additional BUTTON1 +// LED Red channel +#define LED_RED 22 +// LED Green channel +#define LED_GREEN 23 +// LED Blue channel +#define LED_BLUE 24 +// Additional BUTTON1 +#define BUTTON1 25 #define digitalPinToInterrupt(p) ((p) == 2 ? 0 : ((p) == 32 ? 1 : NOT_AN_INTERRUPT)) diff --git a/variants/XMC4700/config/XMC4700_Relax_Kit/pins_arduino.h b/variants/XMC4700/config/XMC4700_Relax_Kit/pins_arduino.h index aaa975e6..9361ab42 100644 --- a/variants/XMC4700/config/XMC4700_Relax_Kit/pins_arduino.h +++ b/variants/XMC4700/config/XMC4700_Relax_Kit/pins_arduino.h @@ -64,8 +64,10 @@ extern const uint8_t NUM_ANALOG_OUTPUTS; // Board has two serial ports pre-assigned to debug and on-board -#define PWM4_TIMER_PERIOD (0x11EF) // Generate 490Hz @fCCU=144MHz -#define PWM8_TIMER_PERIOD (0x11EF) // Generate 490Hz @fCCU=144MHz +// Generate 490Hz @fCCU=144MHz +#define PWM4_TIMER_PERIOD (0x11EF) +// Generate 490Hz @fCCU=144MHz +#define PWM8_TIMER_PERIOD (0x11EF) #define PCLK 144000000u @@ -96,33 +98,34 @@ static const uint8_t SCK_SD = PIN_SPI_SCK_SD; #define A4 4 #define A5 5 //Additional ADC ports starting here -#define A6 6 // ADC G2CH6 on P15.6 -#define A7 7 // ADC G2CH5 on P15.5 -#define A8 8 // ADC G2CH3 on P15.3 -#define A9 9 // ADC G1CH7 on P14.15 -#define A10 10 // ADC G1CH5 on P14.13 -#define A11 11 // ADC G0CH7 on P14.7 -#define A12 12 // ADC G3CH7 on P15.15 -#define A13 13 // ADC G1CH1 on P14.9 -#define A14 14 // ADC G1CH0 on P14.8 -#define A15 15 // ADC G3CH6 on P15.14 -#define A16 16 // ADC G0CH6 on P14.6 -#define A17 17 // ADC G1CH4 on P14.12 -#define A18 18 // ADC G1CH6 on P14.14 -#define A19 19 // ADC G2CH2 on P15.2 -#define A20 20 // ADC G2CH4 on P15.4 -#define A21 21 // ADC G2CH7 on P15.7 +#define A6 6 +#define A7 7 +#define A8 8 +#define A9 9 +#define A10 10 +#define A11 11 +#define A12 12 +#define A13 13 +#define A14 14 +#define A15 15 +#define A16 16 +#define A17 17 +#define A18 18 +#define A19 19 +#define A20 20 +#define A21 21 // ADC G3CH0 on P15.8 not available // ADC G3CH1 on P15.9 not available // ADC G3CH4 on P15.12 button // ADC G3CH5 on P15.13 button -#define LED1 24 // Additional LED1 -#define LED2 25 // Additional LED2 -#define LED_BUILTIN LED1 //Standard Arduino LED: Uses LED1 -#define BUTTON1 26 // Additional BUTTON1 -#define BUTTON2 27 // Additional BUTTON2 +#define LED1 24 +#define LED2 25 +#define LED_BUILTIN LED1 + +#define BUTTON1 26 +#define BUTTON2 27 #define digitalPinToInterrupt(p) ((p) == 2 ? 0 : ((p) == 3 ? 1 : NOT_AN_INTERRUPT)) @@ -244,8 +247,8 @@ const uint8_t NUM_DIGITAL = ( sizeof( mapping_port_pin ) / sizeof( XMC_PORT_PIN_ const XMC_PIN_INTERRUPT_t mapping_interrupt[] = { - /* 0 */ {CCU40, CCU40_CC43, 3, 0, CCU40_IN3_P1_0}, - /* 1 */ {CCU40, CCU40_CC42, 2, 1, CCU40_IN2_P1_1} + /* 0 */ {CCU40, CCU40_CC43, 3, 0, CCU40_IN3_P1_0}, + /* 1 */ {CCU40, CCU40_CC42, 2, 1, CCU40_IN2_P1_1} }; const uint8_t NUM_INTERRUPT = ( sizeof( mapping_interrupt ) / sizeof( XMC_PIN_INTERRUPT_t ) ); From 627f7ed2d68ec0400d807d7d638e7e8419efb855 Mon Sep 17 00:00:00 2001 From: Paul Carpenter Date: Fri, 29 Jul 2022 00:51:57 +0100 Subject: [PATCH 46/78] Revert "Remove never used boards" This reverts commit dbfea22f5783c4ca5ff8440a4b705be995ff2035. --- boards.txt | 86 + .../config/XMC1400_Boot_Kit/pins_arduino.h | 265 + variants/XMC4800/XMC4800.h | 18752 ++++++++++++++++ .../config/XMC4800_Relax_Kit/pins_arduino.h | 312 + variants/XMC4800/linker_script.ld | 287 + variants/XMC4800/startup_XMC4800.S | 440 + variants/XMC4800/system_XMC4800.c | 748 + variants/XMC4800/system_XMC4800.h | 107 + 8 files changed, 20997 insertions(+) create mode 100644 variants/XMC1400/config/XMC1400_Boot_Kit/pins_arduino.h create mode 100644 variants/XMC4800/XMC4800.h create mode 100644 variants/XMC4800/config/XMC4800_Relax_Kit/pins_arduino.h create mode 100644 variants/XMC4800/linker_script.ld create mode 100644 variants/XMC4800/startup_XMC4800.S create mode 100644 variants/XMC4800/system_XMC4800.c create mode 100644 variants/XMC4800/system_XMC4800.h diff --git a/boards.txt b/boards.txt index aa1369d2..9825a22f 100644 --- a/boards.txt +++ b/boards.txt @@ -217,6 +217,50 @@ XMC1300_Sense2GoL.menu.LIB.NN.library.selected=-DARM_LIB_CMSIS_NN XMC1300_Sense2GoL.menu.LIB.DSP=ARM DSP XMC1300_Sense2GoL.menu.LIB.DSP.library.selected=-DARM_LIB_CMSIS_DSP +#################################################### +#XMC1400_Boot_Kit.name=XMC1400 Boot Kit +#XMC1400_Boot_Kit.upload.tool=xmcprog +#XMC1400_Boot_Kit.upload.speed=115200 +#XMC1400_Boot_Kit.upload.resetmethod=ck +#XMC1400_Boot_Kit.upload.maximum_size=204800 +#XMC1400_Boot_Kit.upload.wait_for_upload_port=true + +#XMC1400_Boot_Kit.communication=usb +#XMC1400_Boot_Kit.protocol=dragon_isp +#XMC1400_Boot_Kit.program.protocol=dragon_isp +#XMC1400_Boot_Kit.program.tool=xmcprog +#XMC1400_Boot_Kit.program.extra_params=-Pusb + +#XMC1400_Boot_Kit.serial.disableDTR=true +#XMC1400_Boot_Kit.serial.disableRTS=true + +#XMC1400_Boot_Kit.build.mcu=cortex-m0 +#XMC1400_Boot_Kit.build.f_cpu=48000000L +#XMC1400_Boot_Kit.build.board=ARM_XMC +#XMC1400_Boot_Kit.build.board.version=1404 +#XMC1400_Boot_Kit.build.board.type=Q064x0200 +#XMC1400_Boot_Kit.build.board.v=0200 +#XMC1400_Boot_Kit.build.core=./ +#XMC1400_Boot_Kit.build.variant=XMC1400 +#XMC1400_Boot_Kit.build.board_variant=XMC1400_Boot_Kit +#XMC1400_Boot_Kit.build.flash_size=200K +#XMC1400_Boot_Kit.build.flash_ld=linker_script_200k.ld +#XMC1400_Boot_Kit.build.extra_flags=-DARM_MATH_CM0 -DXMC1_SERIES + +#XMC1400_Boot_Kit.menu.UART.debug=PC +#XMC1400_Boot_Kit.menu.UART.debug.uart.selected=-DSERIAL_HOSTPC +#XMC1400_Boot_Kit.menu.UART.onBoard=On Board +#XMC1400_Boot_Kit.menu.UART.onBoard.uart.selected=-DSERIAL_ONBOARD + +#XMC1400_Boot_Kit.menu.LIB.NONE=None +#XMC1400_Boot_Kit.menu.LIB.NONE.library.selected= +#XMC1400_Boot_Kit.menu.LIB.NN=ARM NN Framework +#XMC1400_Boot_Kit.menu.LIB.NN.library.selected=-DARM_LIB_CMSIS_NN +#XMC1400_Boot_Kit.menu.LIB.DSP=ARM DSP +#XMC1400_Boot_Kit.menu.LIB.DSP.library.selected=-DARM_LIB_CMSIS_DSP +#XMC1400_Boot_Kit.menu.LIB.DSPNN=ARM DSP / ARM NN Framework +#XMC1400_Boot_Kit.menu.LIB.DSPNN.library.selected=-DARM_LIB_CMSIS_DSP -DARM_LIB_CMSIS_NN + #################################################### XMC1400_Arduino_Kit.name=XMC1400 Kit for Arduino XMC1400_Arduino_Kit.upload.tool=xmcprog @@ -261,6 +305,7 @@ XMC1400_Arduino_Kit.menu.LIB.DSP.library.selected=-DARM_LIB_CMSIS_DSP XMC1400_Arduino_Kit.menu.LIB.DSPNN=ARM DSP / ARM NN Framework XMC1400_Arduino_Kit.menu.LIB.DSPNN.library.selected=-DARM_LIB_CMSIS_DSP -DARM_LIB_CMSIS_NN + #################################################### XMC4400_Platform2GO.name=XMC4400 Platform 2GO XMC4400_Platform2GO.upload.tool=xmcprog @@ -384,3 +429,44 @@ XMC4700_Relax_Kit.menu.LIB.NN.library.selected=-DARM_LIB_CMSIS_NN XMC4700_Relax_Kit.menu.LIB.DSP=ARM DSP XMC4700_Relax_Kit.menu.LIB.DSP.library.selected=-DARM_LIB_CMSIS_DSP +#################################################### +# Not up to date +#XMC4800_Relax_Kit.name=XMC4800 Relax Kit +#XMC4800_Relax_Kit.upload.tool=xmcprog +#XMC4800_Relax_Kit.upload.speed=115200 +#XMC4800_Relax_Kit.upload.resetmethod=ck +#XMC4800_Relax_Kit.upload.maximum_size=2000000 +#XMC4800_Relax_Kit.upload.maximum_data_size=352000 +#XMC4800_Relax_Kit.upload.wait_for_upload_port=true +# +#XMC4800_Relax_Kit.communication=usb +#XMC4800_Relax_Kit.protocol=dragon_isp +#XMC4800_Relax_Kit.program.protocol=dragon_isp +#XMC4800_Relax_Kit.program.tool=xmcprog +#XMC4800_Relax_Kit.program.extra_params=-Pusb +# +#XMC4800_Relax_Kit.serial.disableDTR=true +#XMC4800_Relax_Kit.serial.disableRTS=true +# +#XMC4800_Relax_Kit.build.mcu=cortex-m4 +#XMC4800_Relax_Kit.build.f_cpu=144000000L +#XMC4800_Relax_Kit.build.board=ARM_XMC +#XMC4800_Relax_Kit.build.board.version=4800 +#XMC4800_Relax_Kit.build.board.type=F144x2048 +#XMC4800_Relax_Kit.build.board.v=2048 +#XMC4800_Relax_Kit.build.core=./ +#XMC4800_Relax_Kit.build.variant=XMC4800 +#XMC4800_Relax_Kit.build.board_variant=XMC4800_Relax_Kit +#XMC4800_Relax_Kit.build.flash_size=2000K +#XMC4800_Relax_Kit.build.flash_ld=linker_script.ld +#XMC4800_Relax_Kit.build.extra_flags=-DARM_MATH_CM4 -DXMC4_SERIES + +#XMC4800_Relax_Kit.menu.LIB.DSPNN=ARM DSP / ARM NN Framework +#XMC4800_Relax_Kit.menu.LIB.DSPNN.library.selected=-DARM_LIB_CMSIS_DSP -DARM_LIB_CMSIS_NN +#XMC4800_Relax_Kit.menu.LIB.NONE=None +#XMC4800_Relax_Kit.menu.LIB.NONE.library.selected= +#XMC4800_Relax_Kit.menu.LIB.NN=ARM NN Framework +#XMC4800_Relax_Kit.menu.LIB.NN.library.selected=-DARM_LIB_CMSIS_NN +#XMC4800_Relax_Kit.menu.LIB.DSP=ARM DSP +#XMC4800_Relax_Kit.menu.LIB.DSP.library.selected=-DARM_LIB_CMSIS_DSP + diff --git a/variants/XMC1400/config/XMC1400_Boot_Kit/pins_arduino.h b/variants/XMC1400/config/XMC1400_Boot_Kit/pins_arduino.h new file mode 100644 index 00000000..8eb2cd96 --- /dev/null +++ b/variants/XMC1400/config/XMC1400_Boot_Kit/pins_arduino.h @@ -0,0 +1,265 @@ +/* + pins_arduino.h - Pin definition functions for Arduino + Part of Arduino - http://www.arduino.cc/ + + Copyright (c) 2007 David A. Mellis + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General + Public License along with this library; if not, write to the + Free Software Foundation, Inc., 59 Temple Place, Suite 330, + Boston, MA 02111-1307 USA +*/ +#ifndef PINS_ARDUINO_H_ +#define PINS_ARDUINO_H_ + +//**************************************************************************** +// @Project Includes +//**************************************************************************** +#include + +//**************************************************************************** +// @Defines +//**************************************************************************** +// XMC_BOARD for stringifying into serial or other text outputs/logs +// Note the actual name XMC and number MUST have a character between +// to avoid issues with other defined macros e.g. XMC1400 +#define XMC_BOARD XMC 1400 Boot Kit + +/* On board LED is ON when digital output is 0, LOW, FALSE, OFF */ +#define XMC_LED_ON 0 + +// Following were defines now evaluated by compilation as const variables +// After definitions of associated mapping arrays +extern const uint8_t NUM_DIGITAL; +extern const uint8_t GND; +extern const uint8_t NUM_PWM4; +extern const uint8_t NUM_PWM; +extern const uint8_t NUM_INTERRUPT; +extern const uint8_t NUM_ANALOG_INPUTS; +#define NUM_LEDS 4 +#define NUM_SERIAL 1 +#define NUM_TONE_PINS 4 +#define NUM_TASKS_VARIANT 8 + +// Defines will be either set by ArduinoIDE in the menu or manually +#ifdef SERIAL_HOSTPC +// Comment out following line to use Serial on pins (board) +#define SERIAL_DEBUG 1 +#elif SERIAL_ONBOARD +// No SERIAL_DEBUG will be defined, kept here for clarity +#else +// Define the SERIAL_DEBUG as default setting +#define SERIAL_DEBUG 1 +#endif + +#define PWM4_TIMER_PERIOD (2041U) // Generate 490Hz @fCCU=1MHz + +#define PCLK 96000000u + +#define PIN_SPI_SS 10 +#define PIN_SPI_MOSI 11 +#define PIN_SPI_MISO 12 +#define PIN_SPI_SCK 13 + +#define A0 0 +#define A1 1 +#define A2 2 +#define A3 3 +#define A4 4 +#define A5 5 + +#define LED1 24 +#define LED2 25 +#define LED3 26 +#define LED4 27 +#define LED_BUILTIN LED1 + +#define EXT_INTR_0 2 +#define EXT_INTR_1 3 + +#define digitalPinToInterrupt(p) ((p) == 2 ? 0 : ((p) == 3 ? 1 : NOT_AN_INTERRUPT)) + +/* Mapping interrupt handlers. Notice that XMC1400 can have interrupt handlers working in 3 modes, the defines below assumes the mode A. + For details refer to assembly file and reference manual. +*/ +// #define USIC0_0_IRQHandler IRQ9_Handler // UART +#define USIC0_0_IRQn IRQ9_IRQn + +#define CCU40_0_IRQHandler IRQ21_Handler // interrupt 0 +#define CCU40_0_IRQn IRQ21_IRQn + +#define CCU40_1_IRQHandler IRQ22_Handler // interrupt 1 +#define CCU40_1_IRQn IRQ22_IRQn + +#define USIC0_4_IRQHandler IRQ13_Handler // I2C +#define USIC0_4_IRQn IRQ13_IRQn + +#define USIC0_5_IRQHandler IRQ14_Handler // I2C +#define USIC0_5_IRQn IRQ14_IRQn + +#ifdef ARDUINO_MAIN +// Mapping of digital pins and comments +const XMC_PORT_PIN_t mapping_port_pin[] = + { + /* 0 */ {XMC_GPIO_PORT1, 2}, // RX P1.2 + /* 1 */ {XMC_GPIO_PORT1, 3}, // TX P1.3 + /* 2 */ {XMC_GPIO_PORT0 , 0}, // External int 0 P0.0 + /* 3 */ {XMC_GPIO_PORT0 , 1}, // External int 1 / PWM40-1 output P0.1 + /* 4 */ {XMC_GPIO_PORT0 , 6}, // PWM40-0 output P0.6 + /* 5 */ {XMC_GPIO_PORT0 , 2}, // GPIO P0.2 + /* 6 */ {XMC_GPIO_PORT1 , 7}, // PWM40-1 output P1.7 + /* 7 */ {XMC_GPIO_PORT0 , 4}, // GPIO P0.4 + /* 8 */ {XMC_GPIO_PORT0 , 13}, // GPIO P0.13 + /* 9 */ {XMC_GPIO_PORT1 , 8}, // PWM80-2 output P1.8 + /* 10 */ {XMC_GPIO_PORT0 , 9}, // SPI-SS P0.9 + /* 11 */ {XMC_GPIO_PORT1 , 1}, // SPI-MOSI P1.1 + /* 12 */ {XMC_GPIO_PORT1 , 0}, // SPI-MISO P1.0 + /* 13 */ {XMC_GPIO_PORT0 , 7}, // SPI-SCK P0.7 + /* 14 */ {XMC_GPIO_PORT2 , 3}, // AREF P2.3 (INPUT ONLY) + /* 15 */ {XMC_GPIO_PORT2 , 1}, // I2C Data / Address SDA P2.1 + /* 16 */ {XMC_GPIO_PORT2 , 0}, // I2C Clock SCL P2.0 + /* 17 */ {XMC_GPIO_PORT2 , 6}, // A0 / ADC Input P2.6 (INPUT ONLY) + /* 18 */ {XMC_GPIO_PORT2 , 8}, // A1 / ADC Input P2.8 (INPUT ONLY) + /* 19 */ {XMC_GPIO_PORT2 , 9}, // A2 / ADC Input P2.9 (INPUT ONLY) + /* 20 */ {XMC_GPIO_PORT2 , 10}, // A3 / ADC Input P2.10 + /* 21 */ {XMC_GPIO_PORT2 , 11}, // A4 / ADC Input P2.11 + /* 22 */ {XMC_GPIO_PORT2 , 2}, // A5 / ADC Input P2.2 (INPUT ONLY) + /* 23 */ {XMC_GPIO_PORT2 , 4}, // RESET input ( DO NOT USE as GPIO ) P2.4 (INPUT ONLY) + /* 24 */ {XMC_GPIO_PORT4 , 0}, // LED + /* 25 */ {XMC_GPIO_PORT4 , 1}, // LED + /* 26 */ {XMC_GPIO_PORT4 , 2}, // LED + /* 27 */ {XMC_GPIO_PORT4 , 3}, // LED + }; +const uint8_t GND = ( sizeof( mapping_port_pin ) / sizeof( XMC_PORT_PIN_t ) ); +const uint8_t NUM_DIGITAL = ( sizeof( mapping_port_pin ) / sizeof( XMC_PORT_PIN_t ) );; + +const XMC_PIN_INTERRUPT_t mapping_interrupt[] = + { + /* 0 */ {CCU40, CCU40_CC40, 0, 0, CCU40_IN0_P0_0}, + /* 1 */ {CCU40, CCU40_CC41, 1, 1, CCU40_IN1_P0_1} + }; +const uint8_t NUM_INTERRUPT = ( sizeof( mapping_interrupt ) / sizeof( XMC_PIN_INTERRUPT_t ) ); + +/* Mapping of Arduino Pins to PWM4 channels as pin and index in PWM4 channel + mapping array XMC_PWM4_t mapping_pwm4[] + last entry 255 for both parts. + Putting both parts in array means if a PWM4 channel gets reassigned for + another function later a gap in channel numbers will not mess things up */ +const uint8_t mapping_pin_PWM4[][ 2 ] = { + { 3, 0 }, + { 4, 1 }, + { 6, 2 }, + { 9, 3 }, + { 255, 255 } }; + +/* Configurations of PWM channels for CCU4 type */ +XMC_PWM4_t mapping_pwm4[] = + { + {CCU40, CCU40_CC41, 1, mapping_port_pin[3], P0_1_AF_CCU40_OUT1, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 4 + {CCU40, CCU40_CC40, 0, mapping_port_pin[4], P0_6_AF_CCU40_OUT0, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 4 + {CCU40, CCU40_CC43, 3, mapping_port_pin[6], P1_7_AF_CCU40_OUT3, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 6 + {CCU40, CCU40_CC40, 0, mapping_port_pin[9], P1_8_AF_CCU40_OUT0, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 6 + }; +const uint8_t NUM_PWM = ( sizeof( mapping_pwm4 ) / sizeof( XMC_PWM4_t ) ); +const uint8_t NUM_PWM4 = ( sizeof( mapping_pwm4 ) / sizeof( XMC_PWM4_t ) ); + +/* Analog Pin mappings and configurations */ +XMC_ADC_t mapping_adc[] = + { + {VADC, 0, DISABLED}, + {VADC, 1, DISABLED}, + {VADC, 2, DISABLED}, + {VADC, 3, DISABLED}, + {VADC, 4, DISABLED}, + {VADC, 7, DISABLED} + }; +const uint8_t NUM_ANALOG_INPUTS = ( sizeof( mapping_adc ) / sizeof( XMC_ADC_t ) ); + +/* + * UART objects + */ +RingBuffer rx_buffer_0; +RingBuffer tx_buffer_0; + +/* First UART channel pins are swapped between debug and normal use */ +XMC_UART_t XMC_UART_0 = + { + .channel = XMC_UART0_CH1, + .rx = { .port = (XMC_GPIO_PORT_t*)PORT1_BASE, +#ifdef SERIAL_DEBUG + .pin = (uint8_t)3 +#else + .pin = (uint8_t)2 +#endif + }, + .rx_config = { .mode = XMC_GPIO_MODE_INPUT_TRISTATE, + .output_level = XMC_GPIO_OUTPUT_LEVEL_HIGH, + .input_hysteresis = XMC_GPIO_INPUT_HYSTERESIS_STANDARD + }, + .tx = { .port = (XMC_GPIO_PORT_t*)PORT1_BASE, +#ifdef SERIAL_DEBUG + .pin = (uint8_t)2 +#else + .pin = (uint8_t)3 +#endif + }, + .tx_config = { .mode = (XMC_GPIO_MODE_t) XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT7, + .output_level = XMC_GPIO_OUTPUT_LEVEL_HIGH, + .input_hysteresis = XMC_GPIO_INPUT_HYSTERESIS_STANDARD + }, +#ifdef SERIAL_DEBUG + .input_source_dx0 = (XMC_USIC_INPUT_t)USIC0_C1_DX0_P1_3, +#else + .input_source_dx0 = (XMC_USIC_INPUT_t)USIC0_C0_DX0_P1_2, +#endif + .input_source_dx1 = XMC_INPUT_INVALID, + .input_source_dx2 = XMC_INPUT_INVALID, + .input_source_dx3 = XMC_INPUT_INVALID, + .irq_num = USIC0_0_IRQn, + .irq_service_request = 0 + }; + +HardwareSerial Serial( &XMC_UART_0, &rx_buffer_0, &tx_buffer_0 ); + +// Serial Interrupt and event handling +#ifdef __cplusplus +extern "C" { +#endif +void serialEventRun( ); +void serialEvent( ) __attribute__((weak)); + + +void serialEventRun( ) +{ +if( serialEvent ) + { + if( Serial.available( ) ) + serialEvent( ); + } +} + + +void USIC0_0_IRQHandler( ) +{ +Serial.IrqHandler( ); +} +#ifdef __cplusplus +} +#endif +#endif /* ARDUINO_MAIN */ + +#ifdef __cplusplus +extern HardwareSerial Serial; +#endif /* cplusplus */ + +#endif // PINS_ARDUINO_H_ diff --git a/variants/XMC4800/XMC4800.h b/variants/XMC4800/XMC4800.h new file mode 100644 index 00000000..d4115135 --- /dev/null +++ b/variants/XMC4800/XMC4800.h @@ -0,0 +1,18752 @@ +/********************************************************************************************************************* + * Copyright (c) 2015-2017, Infineon Technologies AG + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the + * following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * + * Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following + * disclaimer in the documentation and/or other materials provided with the distribution. + * + * Neither the name of the copyright holders nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY,OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * To improve the quality of the software, users are encouraged to share modifications, enhancements or bug fixes with + * Infineon Technologies AG dave@infineon.com). + *********************************************************************************************************************/ + + +/****************************************************************************************************//** + * @file XMC4800.h + * + * @brief CMSIS Cortex-M4 Peripheral Access Layer Header File for + * XMC4800 from Infineon. + * + * @version V1.3.1 (Reference Manual v1.3) + * @date 19. June 2017 + * + * @note Generated with SVDConv V2.87l + * from CMSIS SVD File 'XMC4800_Processed_SVD.xml' Version 1.3.0 (Reference Manual v1.3), + * added support for ARM Compiler 6 (armclang) + *******************************************************************************************************/ + + + +/** @addtogroup Infineon + * @{ + */ + +/** @addtogroup XMC4800 + * @{ + */ + +#ifndef XMC4800_H +#define XMC4800_H + +#ifdef __cplusplus +extern "C" { +#endif + + +/* ------------------------- Interrupt Number Definition ------------------------ */ + +typedef enum { +/* ------------------- Cortex-M4 Processor Exceptions Numbers ------------------- */ + Reset_IRQn = -15, /*!< 1 Reset Vector, invoked on Power up and warm reset */ + NonMaskableInt_IRQn = -14, /*!< 2 Non maskable Interrupt, cannot be stopped or preempted */ + HardFault_IRQn = -13, /*!< 3 Hard Fault, all classes of Fault */ + MemoryManagement_IRQn = -12, /*!< 4 Memory Management, MPU mismatch, including Access Violation + and No Match */ + BusFault_IRQn = -11, /*!< 5 Bus Fault, Pre-Fetch-, Memory Access Fault, other address/memory + related Fault */ + UsageFault_IRQn = -10, /*!< 6 Usage Fault, i.e. Undef Instruction, Illegal State Transition */ + SVCall_IRQn = -5, /*!< 11 System Service Call via SVC instruction */ + DebugMonitor_IRQn = -4, /*!< 12 Debug Monitor */ + PendSV_IRQn = -2, /*!< 14 Pendable request for system service */ + SysTick_IRQn = -1, /*!< 15 System Tick Timer */ +/* --------------------- XMC4800 Specific Interrupt Numbers --------------------- */ + SCU_0_IRQn = 0, /*!< 0 System Control */ + ERU0_0_IRQn = 1, /*!< 1 External Request Unit 0 */ + ERU0_1_IRQn = 2, /*!< 2 External Request Unit 0 */ + ERU0_2_IRQn = 3, /*!< 3 External Request Unit 0 */ + ERU0_3_IRQn = 4, /*!< 4 External Request Unit 0 */ + ERU1_0_IRQn = 5, /*!< 5 External Request Unit 1 */ + ERU1_1_IRQn = 6, /*!< 6 External Request Unit 1 */ + ERU1_2_IRQn = 7, /*!< 7 External Request Unit 1 */ + ERU1_3_IRQn = 8, /*!< 8 External Request Unit 1 */ + PMU0_0_IRQn = 12, /*!< 12 Program Management Unit */ + VADC0_C0_0_IRQn = 14, /*!< 14 Analog to Digital Converter Common Block 0 */ + VADC0_C0_1_IRQn = 15, /*!< 15 Analog to Digital Converter Common Block 0 */ + VADC0_C0_2_IRQn = 16, /*!< 16 Analog to Digital Converter Common Block 0 */ + VADC0_C0_3_IRQn = 17, /*!< 17 Analog to Digital Converter Common Block 0 */ + VADC0_G0_0_IRQn = 18, /*!< 18 Analog to Digital Converter Group 0 */ + VADC0_G0_1_IRQn = 19, /*!< 19 Analog to Digital Converter Group 0 */ + VADC0_G0_2_IRQn = 20, /*!< 20 Analog to Digital Converter Group 0 */ + VADC0_G0_3_IRQn = 21, /*!< 21 Analog to Digital Converter Group 0 */ + VADC0_G1_0_IRQn = 22, /*!< 22 Analog to Digital Converter Group 1 */ + VADC0_G1_1_IRQn = 23, /*!< 23 Analog to Digital Converter Group 1 */ + VADC0_G1_2_IRQn = 24, /*!< 24 Analog to Digital Converter Group 1 */ + VADC0_G1_3_IRQn = 25, /*!< 25 Analog to Digital Converter Group 1 */ + VADC0_G2_0_IRQn = 26, /*!< 26 Analog to Digital Converter Group 2 */ + VADC0_G2_1_IRQn = 27, /*!< 27 Analog to Digital Converter Group 2 */ + VADC0_G2_2_IRQn = 28, /*!< 28 Analog to Digital Converter Group 2 */ + VADC0_G2_3_IRQn = 29, /*!< 29 Analog to Digital Converter Group 2 */ + VADC0_G3_0_IRQn = 30, /*!< 30 Analog to Digital Converter Group 3 */ + VADC0_G3_1_IRQn = 31, /*!< 31 Analog to Digital Converter Group 3 */ + VADC0_G3_2_IRQn = 32, /*!< 32 Analog to Digital Converter Group 3 */ + VADC0_G3_3_IRQn = 33, /*!< 33 Analog to Digital Converter Group 3 */ + DSD0_M_0_IRQn = 34, /*!< 34 Delta Sigma Demodulator Main */ + DSD0_M_1_IRQn = 35, /*!< 35 Delta Sigma Demodulator Main */ + DSD0_M_2_IRQn = 36, /*!< 36 Delta Sigma Demodulator Main */ + DSD0_M_3_IRQn = 37, /*!< 37 Delta Sigma Demodulator Main */ + DSD0_A_4_IRQn = 38, /*!< 38 Delta Sigma Demodulator Auxiliary */ + DSD0_A_5_IRQn = 39, /*!< 39 Delta Sigma Demodulator Auxiliary */ + DSD0_A_6_IRQn = 40, /*!< 40 Delta Sigma Demodulator Auxiliary */ + DSD0_A_7_IRQn = 41, /*!< 41 Delta Sigma Demodulator Auxiliary */ + DAC0_0_IRQn = 42, /*!< 42 Digital to Analog Converter */ + DAC0_1_IRQn = 43, /*!< 43 Digital to Analog Converter */ + CCU40_0_IRQn = 44, /*!< 44 Capture Compare Unit 4 (Module 0) */ + CCU40_1_IRQn = 45, /*!< 45 Capture Compare Unit 4 (Module 0) */ + CCU40_2_IRQn = 46, /*!< 46 Capture Compare Unit 4 (Module 0) */ + CCU40_3_IRQn = 47, /*!< 47 Capture Compare Unit 4 (Module 0) */ + CCU41_0_IRQn = 48, /*!< 48 Capture Compare Unit 4 (Module 1) */ + CCU41_1_IRQn = 49, /*!< 49 Capture Compare Unit 4 (Module 1) */ + CCU41_2_IRQn = 50, /*!< 50 Capture Compare Unit 4 (Module 1) */ + CCU41_3_IRQn = 51, /*!< 51 Capture Compare Unit 4 (Module 1) */ + CCU42_0_IRQn = 52, /*!< 52 Capture Compare Unit 4 (Module 2) */ + CCU42_1_IRQn = 53, /*!< 53 Capture Compare Unit 4 (Module 2) */ + CCU42_2_IRQn = 54, /*!< 54 Capture Compare Unit 4 (Module 2) */ + CCU42_3_IRQn = 55, /*!< 55 Capture Compare Unit 4 (Module 2) */ + CCU43_0_IRQn = 56, /*!< 56 Capture Compare Unit 4 (Module 3) */ + CCU43_1_IRQn = 57, /*!< 57 Capture Compare Unit 4 (Module 3) */ + CCU43_2_IRQn = 58, /*!< 58 Capture Compare Unit 4 (Module 3) */ + CCU43_3_IRQn = 59, /*!< 59 Capture Compare Unit 4 (Module 3) */ + CCU80_0_IRQn = 60, /*!< 60 Capture Compare Unit 8 (Module 0) */ + CCU80_1_IRQn = 61, /*!< 61 Capture Compare Unit 8 (Module 0) */ + CCU80_2_IRQn = 62, /*!< 62 Capture Compare Unit 8 (Module 0) */ + CCU80_3_IRQn = 63, /*!< 63 Capture Compare Unit 8 (Module 0) */ + CCU81_0_IRQn = 64, /*!< 64 Capture Compare Unit 8 (Module 1) */ + CCU81_1_IRQn = 65, /*!< 65 Capture Compare Unit 8 (Module 1) */ + CCU81_2_IRQn = 66, /*!< 66 Capture Compare Unit 8 (Module 1) */ + CCU81_3_IRQn = 67, /*!< 67 Capture Compare Unit 8 (Module 1) */ + POSIF0_0_IRQn = 68, /*!< 68 Position Interface (Module 0) */ + POSIF0_1_IRQn = 69, /*!< 69 Position Interface (Module 0) */ + POSIF1_0_IRQn = 70, /*!< 70 Position Interface (Module 1) */ + POSIF1_1_IRQn = 71, /*!< 71 Position Interface (Module 1) */ + CAN0_0_IRQn = 76, /*!< 76 MultiCAN */ + CAN0_1_IRQn = 77, /*!< 77 MultiCAN */ + CAN0_2_IRQn = 78, /*!< 78 MultiCAN */ + CAN0_3_IRQn = 79, /*!< 79 MultiCAN */ + CAN0_4_IRQn = 80, /*!< 80 MultiCAN */ + CAN0_5_IRQn = 81, /*!< 81 MultiCAN */ + CAN0_6_IRQn = 82, /*!< 82 MultiCAN */ + CAN0_7_IRQn = 83, /*!< 83 MultiCAN */ + USIC0_0_IRQn = 84, /*!< 84 Universal Serial Interface Channel (Module 0) */ + USIC0_1_IRQn = 85, /*!< 85 Universal Serial Interface Channel (Module 0) */ + USIC0_2_IRQn = 86, /*!< 86 Universal Serial Interface Channel (Module 0) */ + USIC0_3_IRQn = 87, /*!< 87 Universal Serial Interface Channel (Module 0) */ + USIC0_4_IRQn = 88, /*!< 88 Universal Serial Interface Channel (Module 0) */ + USIC0_5_IRQn = 89, /*!< 89 Universal Serial Interface Channel (Module 0) */ + USIC1_0_IRQn = 90, /*!< 90 Universal Serial Interface Channel (Module 1) */ + USIC1_1_IRQn = 91, /*!< 91 Universal Serial Interface Channel (Module 1) */ + USIC1_2_IRQn = 92, /*!< 92 Universal Serial Interface Channel (Module 1) */ + USIC1_3_IRQn = 93, /*!< 93 Universal Serial Interface Channel (Module 1) */ + USIC1_4_IRQn = 94, /*!< 94 Universal Serial Interface Channel (Module 1) */ + USIC1_5_IRQn = 95, /*!< 95 Universal Serial Interface Channel (Module 1) */ + USIC2_0_IRQn = 96, /*!< 96 Universal Serial Interface Channel (Module 2) */ + USIC2_1_IRQn = 97, /*!< 97 Universal Serial Interface Channel (Module 2) */ + USIC2_2_IRQn = 98, /*!< 98 Universal Serial Interface Channel (Module 2) */ + USIC2_3_IRQn = 99, /*!< 99 Universal Serial Interface Channel (Module 2) */ + USIC2_4_IRQn = 100, /*!< 100 Universal Serial Interface Channel (Module 2) */ + USIC2_5_IRQn = 101, /*!< 101 Universal Serial Interface Channel (Module 2) */ + LEDTS0_0_IRQn = 102, /*!< 102 LED and Touch Sense Control Unit (Module 0) */ + FCE0_0_IRQn = 104, /*!< 104 Flexible CRC Engine */ + GPDMA0_0_IRQn = 105, /*!< 105 General Purpose DMA Unit 0 */ + SDMMC0_0_IRQn = 106, /*!< 106 Multi Media Card Interface */ + USB0_0_IRQn = 107, /*!< 107 Universal Serial Bus (Module 0) */ + ETH0_0_IRQn = 108, /*!< 108 Ethernet (Module 0) */ + ECAT0_0_IRQn = 109, /*!< 109 EtherCAT (Module 0) */ + GPDMA1_0_IRQn = 110 /*!< 110 General Purpose DMA Unit 1 */ +} IRQn_Type; + + +/** @addtogroup Configuration_of_CMSIS + * @{ + */ + + +/* ================================================================================ */ +/* ================ Processor and Core Peripheral Section ================ */ +/* ================================================================================ */ + +/* ----------------Configuration of the Cortex-M4 Processor and Core Peripherals---------------- */ +#define __CM4_REV 0x0200 /*!< Cortex-M4 Core Revision */ +#define __MPU_PRESENT 1 /*!< MPU present or not */ +#define __NVIC_PRIO_BITS 6 /*!< Number of Bits used for Priority Levels */ +#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */ +#define __FPU_PRESENT 1 /*!< FPU present or not */ +/** @} */ /* End of group Configuration_of_CMSIS */ + +#include "core_cm4.h" /*!< Cortex-M4 processor and core peripherals */ +#include "system_XMC4800.h" /*!< XMC4800 System */ + + +/* ================================================================================ */ +/* ================ Device Specific Peripheral Section ================ */ +/* ================================================================================ */ +/* Macro to modify desired bitfields of a register */ +#define WR_REG(reg, mask, pos, val) reg = (((uint32_t)val << pos) & \ + ((uint32_t)mask)) | \ + (reg & ((uint32_t)~((uint32_t)mask))) + +/* Macro to modify desired bitfields of a register */ +#define WR_REG_SIZE(reg, mask, pos, val, size) { \ +uint##size##_t VAL1 = (uint##size##_t)((uint##size##_t)val << pos); \ +uint##size##_t VAL2 = (uint##size##_t) (VAL1 & (uint##size##_t)mask); \ +uint##size##_t VAL3 = (uint##size##_t)~((uint##size##_t)mask); \ +uint##size##_t VAL4 = (uint##size##_t) ((uint##size##_t)reg & VAL3); \ +reg = (uint##size##_t) (VAL2 | VAL4);\ +} + +/** Macro to read bitfields from a register */ +#define RD_REG(reg, mask, pos) (((uint32_t)reg & (uint32_t)mask) >> pos) + +/** Macro to read bitfields from a register */ +#define RD_REG_SIZE(reg, mask, pos,size) ((uint##size##_t)(((uint32_t)reg & \ + (uint32_t)mask) >> pos) ) + +/** Macro to set a bit in register */ +#define SET_BIT(reg, pos) (reg |= ((uint32_t)1<= 6010050) + #pragma clang diagnostic push + #pragma clang diagnostic ignored "-Wc11-extensions" + #pragma clang diagnostic ignored "-Wreserved-id-macro" +#elif defined(__ICCARM__) + #pragma language=extended +#elif defined(__GNUC__) + /* anonymous unions are enabled by default */ +#elif defined(__TMS470__) +/* anonymous unions are enabled by default */ +#elif defined(__TASKING__) + #pragma warning 586 +#else + #warning Not supported compiler type +#endif + + +typedef struct { + __IO uint32_t MOFCR; /*!< (@ 0x48015000) Message Object Function Control Register */ + __IO uint32_t MOFGPR; /*!< (@ 0x48015004) Message Object FIFO/Gateway Pointer Register */ + __IO uint32_t MOIPR; /*!< (@ 0x48015008) Message Object Interrupt Pointer Register */ + __IO uint32_t MOAMR; /*!< (@ 0x4801500C) Message Object Acceptance Mask Register */ + __IO uint32_t MODATAL; /*!< (@ 0x48015010) Message Object Data Register Low */ + __IO uint32_t MODATAH; /*!< (@ 0x48015014) Message Object Data Register High */ + __IO uint32_t MOAR; /*!< (@ 0x48015018) Message Object Arbitration Register */ + + union { + __I uint32_t MOSTAT; /*!< (@ 0x4801501C) Message Object Status Register */ + __O uint32_t MOCTR; /*!< (@ 0x4801501C) Message Object Control Register */ + }; +} CAN_MO_TypeDef; /*!< (@ 0x48015020) Cluster End. Size = 32 (0x20) */ + + +/* ================================================================================ */ +/* ================ PPB ================ */ +/* ================================================================================ */ + + +/** + * @brief Cortex-M4 Private Peripheral Block (PPB) + */ + +typedef struct { /*!< (@ 0xE000E000) PPB Structure */ + __I uint32_t RESERVED[2]; + __IO uint32_t ACTLR; /*!< (@ 0xE000E008) Auxiliary Control Register */ + __I uint32_t RESERVED1; + __IO uint32_t SYST_CSR; /*!< (@ 0xE000E010) SysTick Control and Status Register */ + __IO uint32_t SYST_RVR; /*!< (@ 0xE000E014) SysTick Reload Value Register */ + __IO uint32_t SYST_CVR; /*!< (@ 0xE000E018) SysTick Current Value Register */ + __IO uint32_t SYST_CALIB; /*!< (@ 0xE000E01C) SysTick Calibration Value Register r */ + __I uint32_t RESERVED2[56]; + __IO uint32_t NVIC_ISER0; /*!< (@ 0xE000E100) Interrupt Set-enable Register 0 */ + __IO uint32_t NVIC_ISER1; /*!< (@ 0xE000E104) Interrupt Set-enable Register 1 */ + __IO uint32_t NVIC_ISER2; /*!< (@ 0xE000E108) Interrupt Set-enable Register 2 */ + __IO uint32_t NVIC_ISER3; /*!< (@ 0xE000E10C) Interrupt Set-enable Register 3 */ + __I uint32_t RESERVED3[28]; + __IO uint32_t NVIC_ICER0; /*!< (@ 0xE000E180) Interrupt Clear-enable Register 0 */ + __IO uint32_t NVIC_ICER1; /*!< (@ 0xE000E184) Interrupt Clear-enable Register 1 */ + __IO uint32_t NVIC_ICER2; /*!< (@ 0xE000E188) Interrupt Clear-enable Register 2 */ + __IO uint32_t NVIC_ICER3; /*!< (@ 0xE000E18C) Interrupt Clear-enable Register 3 */ + __I uint32_t RESERVED4[28]; + __IO uint32_t NVIC_ISPR0; /*!< (@ 0xE000E200) Interrupt Set-pending Register 0 */ + __IO uint32_t NVIC_ISPR1; /*!< (@ 0xE000E204) Interrupt Set-pending Register 1 */ + __IO uint32_t NVIC_ISPR2; /*!< (@ 0xE000E208) Interrupt Set-pending Register 2 */ + __IO uint32_t NVIC_ISPR3; /*!< (@ 0xE000E20C) Interrupt Set-pending Register 3 */ + __I uint32_t RESERVED5[28]; + __IO uint32_t NVIC_ICPR0; /*!< (@ 0xE000E280) Interrupt Clear-pending Register 0 */ + __IO uint32_t NVIC_ICPR1; /*!< (@ 0xE000E284) Interrupt Clear-pending Register 1 */ + __IO uint32_t NVIC_ICPR2; /*!< (@ 0xE000E288) Interrupt Clear-pending Register 2 */ + __IO uint32_t NVIC_ICPR3; /*!< (@ 0xE000E28C) Interrupt Clear-pending Register 3 */ + __I uint32_t RESERVED6[28]; + __IO uint32_t NVIC_IABR0; /*!< (@ 0xE000E300) Interrupt Active Bit Register 0 */ + __IO uint32_t NVIC_IABR1; /*!< (@ 0xE000E304) Interrupt Active Bit Register 1 */ + __IO uint32_t NVIC_IABR2; /*!< (@ 0xE000E308) Interrupt Active Bit Register 2 */ + __IO uint32_t NVIC_IABR3; /*!< (@ 0xE000E30C) Interrupt Active Bit Register 3 */ + __I uint32_t RESERVED7[60]; + __IO uint32_t NVIC_IPR0; /*!< (@ 0xE000E400) Interrupt Priority Register 0 */ + __IO uint32_t NVIC_IPR1; /*!< (@ 0xE000E404) Interrupt Priority Register 1 */ + __IO uint32_t NVIC_IPR2; /*!< (@ 0xE000E408) Interrupt Priority Register 2 */ + __IO uint32_t NVIC_IPR3; /*!< (@ 0xE000E40C) Interrupt Priority Register 3 */ + __IO uint32_t NVIC_IPR4; /*!< (@ 0xE000E410) Interrupt Priority Register 4 */ + __IO uint32_t NVIC_IPR5; /*!< (@ 0xE000E414) Interrupt Priority Register 5 */ + __IO uint32_t NVIC_IPR6; /*!< (@ 0xE000E418) Interrupt Priority Register 6 */ + __IO uint32_t NVIC_IPR7; /*!< (@ 0xE000E41C) Interrupt Priority Register 7 */ + __IO uint32_t NVIC_IPR8; /*!< (@ 0xE000E420) Interrupt Priority Register 8 */ + __IO uint32_t NVIC_IPR9; /*!< (@ 0xE000E424) Interrupt Priority Register 9 */ + __IO uint32_t NVIC_IPR10; /*!< (@ 0xE000E428) Interrupt Priority Register 10 */ + __IO uint32_t NVIC_IPR11; /*!< (@ 0xE000E42C) Interrupt Priority Register 11 */ + __IO uint32_t NVIC_IPR12; /*!< (@ 0xE000E430) Interrupt Priority Register 12 */ + __IO uint32_t NVIC_IPR13; /*!< (@ 0xE000E434) Interrupt Priority Register 13 */ + __IO uint32_t NVIC_IPR14; /*!< (@ 0xE000E438) Interrupt Priority Register 14 */ + __IO uint32_t NVIC_IPR15; /*!< (@ 0xE000E43C) Interrupt Priority Register 15 */ + __IO uint32_t NVIC_IPR16; /*!< (@ 0xE000E440) Interrupt Priority Register 16 */ + __IO uint32_t NVIC_IPR17; /*!< (@ 0xE000E444) Interrupt Priority Register 17 */ + __IO uint32_t NVIC_IPR18; /*!< (@ 0xE000E448) Interrupt Priority Register 18 */ + __IO uint32_t NVIC_IPR19; /*!< (@ 0xE000E44C) Interrupt Priority Register 19 */ + __IO uint32_t NVIC_IPR20; /*!< (@ 0xE000E450) Interrupt Priority Register 20 */ + __IO uint32_t NVIC_IPR21; /*!< (@ 0xE000E454) Interrupt Priority Register 21 */ + __IO uint32_t NVIC_IPR22; /*!< (@ 0xE000E458) Interrupt Priority Register 22 */ + __IO uint32_t NVIC_IPR23; /*!< (@ 0xE000E45C) Interrupt Priority Register 23 */ + __IO uint32_t NVIC_IPR24; /*!< (@ 0xE000E460) Interrupt Priority Register 24 */ + __IO uint32_t NVIC_IPR25; /*!< (@ 0xE000E464) Interrupt Priority Register 25 */ + __IO uint32_t NVIC_IPR26; /*!< (@ 0xE000E468) Interrupt Priority Register 26 */ + __IO uint32_t NVIC_IPR27; /*!< (@ 0xE000E46C) Interrupt Priority Register 27 */ + __I uint32_t RESERVED8[548]; + __I uint32_t CPUID; /*!< (@ 0xE000ED00) CPUID Base Register */ + __IO uint32_t ICSR; /*!< (@ 0xE000ED04) Interrupt Control and State Register */ + __IO uint32_t VTOR; /*!< (@ 0xE000ED08) Vector Table Offset Register */ + __IO uint32_t AIRCR; /*!< (@ 0xE000ED0C) Application Interrupt and Reset Control Register */ + __IO uint32_t SCR; /*!< (@ 0xE000ED10) System Control Register */ + __IO uint32_t CCR; /*!< (@ 0xE000ED14) Configuration and Control Register */ + __IO uint32_t SHPR1; /*!< (@ 0xE000ED18) System Handler Priority Register 1 */ + __IO uint32_t SHPR2; /*!< (@ 0xE000ED1C) System Handler Priority Register 2 */ + __IO uint32_t SHPR3; /*!< (@ 0xE000ED20) System Handler Priority Register 3 */ + __IO uint32_t SHCSR; /*!< (@ 0xE000ED24) System Handler Control and State Register */ + __IO uint32_t CFSR; /*!< (@ 0xE000ED28) Configurable Fault Status Register */ + __IO uint32_t HFSR; /*!< (@ 0xE000ED2C) HardFault Status Register */ + __I uint32_t RESERVED9; + __IO uint32_t MMFAR; /*!< (@ 0xE000ED34) MemManage Fault Address Register */ + __IO uint32_t BFAR; /*!< (@ 0xE000ED38) BusFault Address Register */ + __IO uint32_t AFSR; /*!< (@ 0xE000ED3C) Auxiliary Fault Status Register */ + __I uint32_t RESERVED10[18]; + __IO uint32_t CPACR; /*!< (@ 0xE000ED88) Coprocessor Access Control Register */ + __I uint32_t RESERVED11; + __I uint32_t MPU_TYPE; /*!< (@ 0xE000ED90) MPU Type Register */ + __IO uint32_t MPU_CTRL; /*!< (@ 0xE000ED94) MPU Control Register */ + __IO uint32_t MPU_RNR; /*!< (@ 0xE000ED98) MPU Region Number Register */ + __IO uint32_t MPU_RBAR; /*!< (@ 0xE000ED9C) MPU Region Base Address Register */ + __IO uint32_t MPU_RASR; /*!< (@ 0xE000EDA0) MPU Region Attribute and Size Register */ + __IO uint32_t MPU_RBAR_A1; /*!< (@ 0xE000EDA4) MPU Region Base Address Register A1 */ + __IO uint32_t MPU_RASR_A1; /*!< (@ 0xE000EDA8) MPU Region Attribute and Size Register A1 */ + __IO uint32_t MPU_RBAR_A2; /*!< (@ 0xE000EDAC) MPU Region Base Address Register A2 */ + __IO uint32_t MPU_RASR_A2; /*!< (@ 0xE000EDB0) MPU Region Attribute and Size Register A2 */ + __IO uint32_t MPU_RBAR_A3; /*!< (@ 0xE000EDB4) MPU Region Base Address Register A3 */ + __IO uint32_t MPU_RASR_A3; /*!< (@ 0xE000EDB8) MPU Region Attribute and Size Register A3 */ + __I uint32_t RESERVED12[81]; + __O uint32_t STIR; /*!< (@ 0xE000EF00) Software Trigger Interrupt Register */ + __I uint32_t RESERVED13[12]; + __IO uint32_t FPCCR; /*!< (@ 0xE000EF34) Floating-point Context Control Register */ + __IO uint32_t FPCAR; /*!< (@ 0xE000EF38) Floating-point Context Address Register */ + __IO uint32_t FPDSCR; /*!< (@ 0xE000EF3C) Floating-point Default Status Control Register */ +} PPB_Type; + + +/* ================================================================================ */ +/* ================ DLR ================ */ +/* ================================================================================ */ + + +/** + * @brief DMA Line Router (DLR) + */ + +typedef struct { /*!< (@ 0x50004900) DLR Structure */ + __I uint32_t OVRSTAT; /*!< (@ 0x50004900) Overrun Status */ + __O uint32_t OVRCLR; /*!< (@ 0x50004904) Overrun Clear */ + __IO uint32_t SRSEL0; /*!< (@ 0x50004908) Service Request Selection 0 */ + __IO uint32_t SRSEL1; /*!< (@ 0x5000490C) Service Request Selection 1 */ + __IO uint32_t LNEN; /*!< (@ 0x50004910) Line Enable */ +} DLR_GLOBAL_TypeDef; + + +/* ================================================================================ */ +/* ================ ERU [ERU0] ================ */ +/* ================================================================================ */ + + +/** + * @brief Event Request Unit 0 (ERU) + */ + +typedef struct { /*!< (@ 0x50004800) ERU Structure */ + __IO uint32_t EXISEL; /*!< (@ 0x50004800) Event Input Select */ + __I uint32_t RESERVED[3]; + __IO uint32_t EXICON[4]; /*!< (@ 0x50004810) Event Input Control */ + __IO uint32_t EXOCON[4]; /*!< (@ 0x50004820) Event Output Trigger Control */ +} ERU_GLOBAL_TypeDef; + + +/* ================================================================================ */ +/* ================ GPDMA0 ================ */ +/* ================================================================================ */ + + +/** + * @brief General Purpose DMA Unit 0 (GPDMA0) + */ + +typedef struct { /*!< (@ 0x500142C0) GPDMA0 Structure */ + __IO uint32_t RAWTFR; /*!< (@ 0x500142C0) Raw IntTfr Status */ + __I uint32_t RESERVED; + __IO uint32_t RAWBLOCK; /*!< (@ 0x500142C8) Raw IntBlock Status */ + __I uint32_t RESERVED1; + __IO uint32_t RAWSRCTRAN; /*!< (@ 0x500142D0) Raw IntSrcTran Status */ + __I uint32_t RESERVED2; + __IO uint32_t RAWDSTTRAN; /*!< (@ 0x500142D8) Raw IntBlock Status */ + __I uint32_t RESERVED3; + __IO uint32_t RAWERR; /*!< (@ 0x500142E0) Raw IntErr Status */ + __I uint32_t RESERVED4; + __I uint32_t STATUSTFR; /*!< (@ 0x500142E8) IntTfr Status */ + __I uint32_t RESERVED5; + __I uint32_t STATUSBLOCK; /*!< (@ 0x500142F0) IntBlock Status */ + __I uint32_t RESERVED6; + __I uint32_t STATUSSRCTRAN; /*!< (@ 0x500142F8) IntSrcTran Status */ + __I uint32_t RESERVED7; + __I uint32_t STATUSDSTTRAN; /*!< (@ 0x50014300) IntBlock Status */ + __I uint32_t RESERVED8; + __I uint32_t STATUSERR; /*!< (@ 0x50014308) IntErr Status */ + __I uint32_t RESERVED9; + __IO uint32_t MASKTFR; /*!< (@ 0x50014310) Mask for Raw IntTfr Status */ + __I uint32_t RESERVED10; + __IO uint32_t MASKBLOCK; /*!< (@ 0x50014318) Mask for Raw IntBlock Status */ + __I uint32_t RESERVED11; + __IO uint32_t MASKSRCTRAN; /*!< (@ 0x50014320) Mask for Raw IntSrcTran Status */ + __I uint32_t RESERVED12; + __IO uint32_t MASKDSTTRAN; /*!< (@ 0x50014328) Mask for Raw IntBlock Status */ + __I uint32_t RESERVED13; + __IO uint32_t MASKERR; /*!< (@ 0x50014330) Mask for Raw IntErr Status */ + __I uint32_t RESERVED14; + __O uint32_t CLEARTFR; /*!< (@ 0x50014338) IntTfr Status */ + __I uint32_t RESERVED15; + __O uint32_t CLEARBLOCK; /*!< (@ 0x50014340) IntBlock Status */ + __I uint32_t RESERVED16; + __O uint32_t CLEARSRCTRAN; /*!< (@ 0x50014348) IntSrcTran Status */ + __I uint32_t RESERVED17; + __O uint32_t CLEARDSTTRAN; /*!< (@ 0x50014350) IntBlock Status */ + __I uint32_t RESERVED18; + __O uint32_t CLEARERR; /*!< (@ 0x50014358) IntErr Status */ + __I uint32_t RESERVED19; + __I uint32_t STATUSINT; /*!< (@ 0x50014360) Combined Interrupt Status Register */ + __I uint32_t RESERVED20; + __IO uint32_t REQSRCREG; /*!< (@ 0x50014368) Source Software Transaction Request Register */ + __I uint32_t RESERVED21; + __IO uint32_t REQDSTREG; /*!< (@ 0x50014370) Destination Software Transaction Request Register */ + __I uint32_t RESERVED22; + __IO uint32_t SGLREQSRCREG; /*!< (@ 0x50014378) Single Source Transaction Request Register */ + __I uint32_t RESERVED23; + __IO uint32_t SGLREQDSTREG; /*!< (@ 0x50014380) Single Destination Transaction Request Register */ + __I uint32_t RESERVED24; + __IO uint32_t LSTSRCREG; /*!< (@ 0x50014388) Last Source Transaction Request Register */ + __I uint32_t RESERVED25; + __IO uint32_t LSTDSTREG; /*!< (@ 0x50014390) Last Destination Transaction Request Register */ + __I uint32_t RESERVED26; + __IO uint32_t DMACFGREG; /*!< (@ 0x50014398) GPDMA Configuration Register */ + __I uint32_t RESERVED27; + __IO uint32_t CHENREG; /*!< (@ 0x500143A0) GPDMA Channel Enable Register */ + __I uint32_t RESERVED28; + __I uint32_t ID; /*!< (@ 0x500143A8) GPDMA0 ID Register */ + __I uint32_t RESERVED29[19]; + __I uint32_t TYPE; /*!< (@ 0x500143F8) GPDMA Component Type */ + __I uint32_t VERSION; /*!< (@ 0x500143FC) DMA Component Version */ +} GPDMA0_GLOBAL_TypeDef; + + +/* ================================================================================ */ +/* ================ GPDMA0_CH0_1 [GPDMA0_CH0] ================ */ +/* ================================================================================ */ + + +/** + * @brief General Purpose DMA Unit 0 (GPDMA0_CH0_1) + */ + +typedef struct { /*!< (@ 0x50014000) GPDMA0_CH0_1 Structure */ + __IO uint32_t SAR; /*!< (@ 0x50014000) Source Address Register */ + __I uint32_t RESERVED; + __IO uint32_t DAR; /*!< (@ 0x50014008) Destination Address Register */ + __I uint32_t RESERVED1; + __IO uint32_t LLP; /*!< (@ 0x50014010) Linked List Pointer Register */ + __I uint32_t RESERVED2; + __IO uint32_t CTLL; /*!< (@ 0x50014018) Control Register Low */ + __IO uint32_t CTLH; /*!< (@ 0x5001401C) Control Register High */ + __IO uint32_t SSTAT; /*!< (@ 0x50014020) Source Status Register */ + __I uint32_t RESERVED3; + __IO uint32_t DSTAT; /*!< (@ 0x50014028) Destination Status Register */ + __I uint32_t RESERVED4; + __IO uint32_t SSTATAR; /*!< (@ 0x50014030) Source Status Address Register */ + __I uint32_t RESERVED5; + __IO uint32_t DSTATAR; /*!< (@ 0x50014038) Destination Status Address Register */ + __I uint32_t RESERVED6; + __IO uint32_t CFGL; /*!< (@ 0x50014040) Configuration Register Low */ + __IO uint32_t CFGH; /*!< (@ 0x50014044) Configuration Register High */ + __IO uint32_t SGR; /*!< (@ 0x50014048) Source Gather Register */ + __I uint32_t RESERVED7; + __IO uint32_t DSR; /*!< (@ 0x50014050) Destination Scatter Register */ +} GPDMA0_CH_TypeDef; + + +/* ================================================================================ */ +/* ================ GPDMA0_CH2_7 [GPDMA0_CH2] ================ */ +/* ================================================================================ */ + + +/** + * @brief General Purpose DMA Unit 0 (GPDMA0_CH2_7) + */ + +typedef struct { /*!< (@ 0x500140B0) GPDMA0_CH2_7 Structure */ + __IO uint32_t SAR; /*!< (@ 0x500140B0) Source Address Register */ + __I uint32_t RESERVED; + __IO uint32_t DAR; /*!< (@ 0x500140B8) Destination Address Register */ + __I uint32_t RESERVED1[3]; + __IO uint32_t CTLL; /*!< (@ 0x500140C8) Control Register Low */ + __IO uint32_t CTLH; /*!< (@ 0x500140CC) Control Register High */ + __I uint32_t RESERVED2[8]; + __IO uint32_t CFGL; /*!< (@ 0x500140F0) Configuration Register Low */ + __IO uint32_t CFGH; /*!< (@ 0x500140F4) Configuration Register High */ +} GPDMA0_CH2_7_Type; + + +/* ================================================================================ */ +/* ================ GPDMA1 ================ */ +/* ================================================================================ */ + + +/** + * @brief General Purpose DMA Unit 1 (GPDMA1) + */ + +typedef struct { /*!< (@ 0x500182C0) GPDMA1 Structure */ + __IO uint32_t RAWTFR; /*!< (@ 0x500182C0) Raw IntTfr Status */ + __I uint32_t RESERVED; + __IO uint32_t RAWBLOCK; /*!< (@ 0x500182C8) Raw IntBlock Status */ + __I uint32_t RESERVED1; + __IO uint32_t RAWSRCTRAN; /*!< (@ 0x500182D0) Raw IntSrcTran Status */ + __I uint32_t RESERVED2; + __IO uint32_t RAWDSTTRAN; /*!< (@ 0x500182D8) Raw IntBlock Status */ + __I uint32_t RESERVED3; + __IO uint32_t RAWERR; /*!< (@ 0x500182E0) Raw IntErr Status */ + __I uint32_t RESERVED4; + __I uint32_t STATUSTFR; /*!< (@ 0x500182E8) IntTfr Status */ + __I uint32_t RESERVED5; + __I uint32_t STATUSBLOCK; /*!< (@ 0x500182F0) IntBlock Status */ + __I uint32_t RESERVED6; + __I uint32_t STATUSSRCTRAN; /*!< (@ 0x500182F8) IntSrcTran Status */ + __I uint32_t RESERVED7; + __I uint32_t STATUSDSTTRAN; /*!< (@ 0x50018300) IntBlock Status */ + __I uint32_t RESERVED8; + __I uint32_t STATUSERR; /*!< (@ 0x50018308) IntErr Status */ + __I uint32_t RESERVED9; + __IO uint32_t MASKTFR; /*!< (@ 0x50018310) Mask for Raw IntTfr Status */ + __I uint32_t RESERVED10; + __IO uint32_t MASKBLOCK; /*!< (@ 0x50018318) Mask for Raw IntBlock Status */ + __I uint32_t RESERVED11; + __IO uint32_t MASKSRCTRAN; /*!< (@ 0x50018320) Mask for Raw IntSrcTran Status */ + __I uint32_t RESERVED12; + __IO uint32_t MASKDSTTRAN; /*!< (@ 0x50018328) Mask for Raw IntBlock Status */ + __I uint32_t RESERVED13; + __IO uint32_t MASKERR; /*!< (@ 0x50018330) Mask for Raw IntErr Status */ + __I uint32_t RESERVED14; + __O uint32_t CLEARTFR; /*!< (@ 0x50018338) IntTfr Status */ + __I uint32_t RESERVED15; + __O uint32_t CLEARBLOCK; /*!< (@ 0x50018340) IntBlock Status */ + __I uint32_t RESERVED16; + __O uint32_t CLEARSRCTRAN; /*!< (@ 0x50018348) IntSrcTran Status */ + __I uint32_t RESERVED17; + __O uint32_t CLEARDSTTRAN; /*!< (@ 0x50018350) IntBlock Status */ + __I uint32_t RESERVED18; + __O uint32_t CLEARERR; /*!< (@ 0x50018358) IntErr Status */ + __I uint32_t RESERVED19; + __I uint32_t STATUSINT; /*!< (@ 0x50018360) Combined Interrupt Status Register */ + __I uint32_t RESERVED20; + __IO uint32_t REQSRCREG; /*!< (@ 0x50018368) Source Software Transaction Request Register */ + __I uint32_t RESERVED21; + __IO uint32_t REQDSTREG; /*!< (@ 0x50018370) Destination Software Transaction Request Register */ + __I uint32_t RESERVED22; + __IO uint32_t SGLREQSRCREG; /*!< (@ 0x50018378) Single Source Transaction Request Register */ + __I uint32_t RESERVED23; + __IO uint32_t SGLREQDSTREG; /*!< (@ 0x50018380) Single Destination Transaction Request Register */ + __I uint32_t RESERVED24; + __IO uint32_t LSTSRCREG; /*!< (@ 0x50018388) Last Source Transaction Request Register */ + __I uint32_t RESERVED25; + __IO uint32_t LSTDSTREG; /*!< (@ 0x50018390) Last Destination Transaction Request Register */ + __I uint32_t RESERVED26; + __IO uint32_t DMACFGREG; /*!< (@ 0x50018398) GPDMA Configuration Register */ + __I uint32_t RESERVED27; + __IO uint32_t CHENREG; /*!< (@ 0x500183A0) GPDMA Channel Enable Register */ + __I uint32_t RESERVED28; + __I uint32_t ID; /*!< (@ 0x500183A8) GPDMA1 ID Register */ + __I uint32_t RESERVED29[19]; + __I uint32_t TYPE; /*!< (@ 0x500183F8) GPDMA Component Type */ + __I uint32_t VERSION; /*!< (@ 0x500183FC) DMA Component Version */ +} GPDMA1_GLOBAL_TypeDef; + + +/* ================================================================================ */ +/* ================ GPDMA1_CH [GPDMA1_CH0] ================ */ +/* ================================================================================ */ + + +/** + * @brief General Purpose DMA Unit 1 (GPDMA1_CH) + */ + +typedef struct { /*!< (@ 0x50018000) GPDMA1_CH Structure */ + __IO uint32_t SAR; /*!< (@ 0x50018000) Source Address Register */ + __I uint32_t RESERVED; + __IO uint32_t DAR; /*!< (@ 0x50018008) Destination Address Register */ + __I uint32_t RESERVED1[3]; + __IO uint32_t CTLL; /*!< (@ 0x50018018) Control Register Low */ + __IO uint32_t CTLH; /*!< (@ 0x5001801C) Control Register High */ + __I uint32_t RESERVED2[8]; + __IO uint32_t CFGL; /*!< (@ 0x50018040) Configuration Register Low */ + __IO uint32_t CFGH; /*!< (@ 0x50018044) Configuration Register High */ +} GPDMA1_CH_TypeDef; + + +/* ================================================================================ */ +/* ================ FCE ================ */ +/* ================================================================================ */ + + +/** + * @brief Flexible CRC Engine (FCE) + */ + +typedef struct { /*!< (@ 0x50020000) FCE Structure */ + __IO uint32_t CLC; /*!< (@ 0x50020000) Clock Control Register */ + __I uint32_t RESERVED; + __I uint32_t ID; /*!< (@ 0x50020008) Module Identification Register */ +} FCE_GLOBAL_TypeDef; + + +/* ================================================================================ */ +/* ================ FCE_KE [FCE_KE0] ================ */ +/* ================================================================================ */ + + +/** + * @brief Flexible CRC Engine (FCE_KE) + */ + +typedef struct { /*!< (@ 0x50020020) FCE_KE Structure */ + __IO uint32_t IR; /*!< (@ 0x50020020) Input Register */ + __I uint32_t RES; /*!< (@ 0x50020024) CRC Result Register */ + __IO uint32_t CFG; /*!< (@ 0x50020028) CRC Configuration Register */ + __IO uint32_t STS; /*!< (@ 0x5002002C) CRC Status Register */ + __IO uint32_t LENGTH; /*!< (@ 0x50020030) CRC Length Register */ + __IO uint32_t CHECK; /*!< (@ 0x50020034) CRC Check Register */ + __IO uint32_t CRC; /*!< (@ 0x50020038) CRC Register */ + __IO uint32_t CTR; /*!< (@ 0x5002003C) CRC Test Register */ +} FCE_KE_TypeDef; + + +/* ================================================================================ */ +/* ================ PBA [PBA0] ================ */ +/* ================================================================================ */ + + +/** + * @brief Peripheral Bridge AHB 0 (PBA) + */ + +typedef struct { /*!< (@ 0x40000000) PBA Structure */ + __IO uint32_t STS; /*!< (@ 0x40000000) Peripheral Bridge Status Register */ + __I uint32_t WADDR; /*!< (@ 0x40000004) PBA Write Error Address Register */ +} PBA_GLOBAL_TypeDef; + + +/* ================================================================================ */ +/* ================ FLASH [FLASH0] ================ */ +/* ================================================================================ */ + + +/** + * @brief Flash Memory Controller (FLASH) + */ + +typedef struct { /*!< (@ 0x58001000) FLASH Structure */ + __I uint32_t RESERVED[1026]; + __I uint32_t ID; /*!< (@ 0x58002008) Flash Module Identification Register */ + __I uint32_t RESERVED1; + __I uint32_t FSR; /*!< (@ 0x58002010) Flash Status Register */ + __IO uint32_t FCON; /*!< (@ 0x58002014) Flash Configuration Register */ + __IO uint32_t MARP; /*!< (@ 0x58002018) Margin Control Register PFLASH */ + __I uint32_t RESERVED2; + __I uint32_t PROCON0; /*!< (@ 0x58002020) Flash Protection Configuration Register User + 0 */ + __I uint32_t PROCON1; /*!< (@ 0x58002024) Flash Protection Configuration Register User + 1 */ + __I uint32_t PROCON2; /*!< (@ 0x58002028) Flash Protection Configuration Register User + 2 */ +} FLASH0_GLOBAL_TypeDef; + + +/* ================================================================================ */ +/* ================ PREF ================ */ +/* ================================================================================ */ + + +/** + * @brief Prefetch Unit (PREF) + */ + +typedef struct { /*!< (@ 0x58004000) PREF Structure */ + __IO uint32_t PCON; /*!< (@ 0x58004000) Prefetch Configuration Register */ +} PREF_GLOBAL_TypeDef; + + +/* ================================================================================ */ +/* ================ PMU [PMU0] ================ */ +/* ================================================================================ */ + + +/** + * @brief Program Management Unit (PMU) + */ + +typedef struct { /*!< (@ 0x58000508) PMU Structure */ + __I uint32_t ID; /*!< (@ 0x58000508) PMU0 Identification Register */ +} PMU0_GLOBAL_TypeDef; + + +/* ================================================================================ */ +/* ================ WDT ================ */ +/* ================================================================================ */ + + +/** + * @brief Watch Dog Timer (WDT) + */ + +typedef struct { /*!< (@ 0x50008000) WDT Structure */ + __I uint32_t ID; /*!< (@ 0x50008000) WDT ID Register */ + __IO uint32_t CTR; /*!< (@ 0x50008004) WDT Control Register */ + __O uint32_t SRV; /*!< (@ 0x50008008) WDT Service Register */ + __I uint32_t TIM; /*!< (@ 0x5000800C) WDT Timer Register */ + __IO uint32_t WLB; /*!< (@ 0x50008010) WDT Window Lower Bound Register */ + __IO uint32_t WUB; /*!< (@ 0x50008014) WDT Window Upper Bound Register */ + __I uint32_t WDTSTS; /*!< (@ 0x50008018) WDT Status Register */ + __O uint32_t WDTCLR; /*!< (@ 0x5000801C) WDT Clear Register */ +} WDT_GLOBAL_TypeDef; + + +/* ================================================================================ */ +/* ================ RTC ================ */ +/* ================================================================================ */ + + +/** + * @brief Real Time Clock (RTC) + */ + +typedef struct { /*!< (@ 0x50004A00) RTC Structure */ + __I uint32_t ID; /*!< (@ 0x50004A00) RTC ID Register */ + __IO uint32_t CTR; /*!< (@ 0x50004A04) RTC Control Register */ + __I uint32_t RAWSTAT; /*!< (@ 0x50004A08) RTC Raw Service Request Register */ + __I uint32_t STSSR; /*!< (@ 0x50004A0C) RTC Service Request Status Register */ + __IO uint32_t MSKSR; /*!< (@ 0x50004A10) RTC Service Request Mask Register */ + __O uint32_t CLRSR; /*!< (@ 0x50004A14) RTC Clear Service Request Register */ + __IO uint32_t ATIM0; /*!< (@ 0x50004A18) RTC Alarm Time Register 0 */ + __IO uint32_t ATIM1; /*!< (@ 0x50004A1C) RTC Alarm Time Register 1 */ + __IO uint32_t TIM0; /*!< (@ 0x50004A20) RTC Time Register 0 */ + __IO uint32_t TIM1; /*!< (@ 0x50004A24) RTC Time Register 1 */ +} RTC_GLOBAL_TypeDef; + + +/* ================================================================================ */ +/* ================ SCU_CLK ================ */ +/* ================================================================================ */ + + +/** + * @brief System Control Unit (SCU_CLK) + */ + +typedef struct { /*!< (@ 0x50004600) SCU_CLK Structure */ + __I uint32_t CLKSTAT; /*!< (@ 0x50004600) Clock Status Register */ + __O uint32_t CLKSET; /*!< (@ 0x50004604) CLK Set Register */ + __O uint32_t CLKCLR; /*!< (@ 0x50004608) CLK Clear Register */ + __IO uint32_t SYSCLKCR; /*!< (@ 0x5000460C) System Clock Control Register */ + __IO uint32_t CPUCLKCR; /*!< (@ 0x50004610) CPU Clock Control Register */ + __IO uint32_t PBCLKCR; /*!< (@ 0x50004614) Peripheral Bus Clock Control Register */ + __IO uint32_t USBCLKCR; /*!< (@ 0x50004618) USB Clock Control Register */ + __IO uint32_t EBUCLKCR; /*!< (@ 0x5000461C) EBU Clock Control Register */ + __IO uint32_t CCUCLKCR; /*!< (@ 0x50004620) CCU Clock Control Register */ + __IO uint32_t WDTCLKCR; /*!< (@ 0x50004624) WDT Clock Control Register */ + __IO uint32_t EXTCLKCR; /*!< (@ 0x50004628) External Clock Control */ + __IO uint32_t MLINKCLKCR; /*!< (@ 0x5000462C) Multi-Link Clock Control */ + __IO uint32_t SLEEPCR; /*!< (@ 0x50004630) Sleep Control Register */ + __IO uint32_t DSLEEPCR; /*!< (@ 0x50004634) Deep Sleep Control Register */ + __IO uint32_t ECATCLKCR; /*!< (@ 0x50004638) EtherCAT Clock Control Register */ + __I uint32_t RESERVED; + __I uint32_t CGATSTAT0; /*!< (@ 0x50004640) Peripheral 0 Clock Gating Status */ + __O uint32_t CGATSET0; /*!< (@ 0x50004644) Peripheral 0 Clock Gating Set */ + __O uint32_t CGATCLR0; /*!< (@ 0x50004648) Peripheral 0 Clock Gating Clear */ + __I uint32_t CGATSTAT1; /*!< (@ 0x5000464C) Peripheral 1 Clock Gating Status */ + __O uint32_t CGATSET1; /*!< (@ 0x50004650) Peripheral 1 Clock Gating Set */ + __O uint32_t CGATCLR1; /*!< (@ 0x50004654) Peripheral 1 Clock Gating Clear */ + __I uint32_t CGATSTAT2; /*!< (@ 0x50004658) Peripheral 2 Clock Gating Status */ + __O uint32_t CGATSET2; /*!< (@ 0x5000465C) Peripheral 2 Clock Gating Set */ + __O uint32_t CGATCLR2; /*!< (@ 0x50004660) Peripheral 2 Clock Gating Clear */ + __I uint32_t CGATSTAT3; /*!< (@ 0x50004664) Peripheral 3 Clock Gating Status */ + __O uint32_t CGATSET3; /*!< (@ 0x50004668) Peripheral 3 Clock Gating Set */ + __O uint32_t CGATCLR3; /*!< (@ 0x5000466C) Peripheral 3 Clock Gating Clear */ +} SCU_CLK_TypeDef; + + +/* ================================================================================ */ +/* ================ SCU_OSC ================ */ +/* ================================================================================ */ + + +/** + * @brief System Control Unit (SCU_OSC) + */ + +typedef struct { /*!< (@ 0x50004700) SCU_OSC Structure */ + __I uint32_t OSCHPSTAT; /*!< (@ 0x50004700) OSC_HP Status Register */ + __IO uint32_t OSCHPCTRL; /*!< (@ 0x50004704) OSC_HP Control Register */ + __I uint32_t RESERVED; + __IO uint32_t CLKCALCONST; /*!< (@ 0x5000470C) Clock Calibration Constant Register */ +} SCU_OSC_TypeDef; + + +/* ================================================================================ */ +/* ================ SCU_PLL ================ */ +/* ================================================================================ */ + + +/** + * @brief System Control Unit (SCU_PLL) + */ + +typedef struct { /*!< (@ 0x50004710) SCU_PLL Structure */ + __I uint32_t PLLSTAT; /*!< (@ 0x50004710) PLL Status Register */ + __IO uint32_t PLLCON0; /*!< (@ 0x50004714) PLL Configuration 0 Register */ + __IO uint32_t PLLCON1; /*!< (@ 0x50004718) PLL Configuration 1 Register */ + __IO uint32_t PLLCON2; /*!< (@ 0x5000471C) PLL Configuration 2 Register */ + __I uint32_t USBPLLSTAT; /*!< (@ 0x50004720) USB PLL Status Register */ + __IO uint32_t USBPLLCON; /*!< (@ 0x50004724) USB PLL Configuration Register */ + __I uint32_t RESERVED[4]; + __I uint32_t CLKMXSTAT; /*!< (@ 0x50004738) Clock Multiplexing Status Register */ +} SCU_PLL_TypeDef; + + +/* ================================================================================ */ +/* ================ SCU_GENERAL ================ */ +/* ================================================================================ */ + + +/** + * @brief System Control Unit (SCU_GENERAL) + */ + +typedef struct { /*!< (@ 0x50004000) SCU_GENERAL Structure */ + __I uint32_t ID; /*!< (@ 0x50004000) SCU Module ID Register */ + __I uint32_t IDCHIP; /*!< (@ 0x50004004) Chip ID Register */ + __I uint32_t IDMANUF; /*!< (@ 0x50004008) Manufactory ID Register */ + __I uint32_t RESERVED; + __IO uint32_t STCON; /*!< (@ 0x50004010) Startup Configuration Register */ + __I uint32_t RESERVED1[6]; + __IO uint32_t GPR[2]; /*!< (@ 0x5000402C) General Purpose Register 0 */ + __I uint32_t RESERVED2[6]; + __IO uint32_t CCUCON; /*!< (@ 0x5000404C) CCU Control Register */ + __I uint32_t RESERVED3[15]; + __IO uint32_t DTSCON; /*!< (@ 0x5000408C) Die Temperature Sensor Control Register */ + __I uint32_t DTSSTAT; /*!< (@ 0x50004090) Die Temperature Sensor Status Register */ + __I uint32_t RESERVED4[2]; + __IO uint32_t SDMMCDEL; /*!< (@ 0x5000409C) SD-MMC Delay Control Register */ + __IO uint32_t GORCEN[2]; /*!< (@ 0x500040A0) Out of Range Comparator Enable Register 0 */ + __I uint32_t RESERVED5[7]; + __I uint32_t MIRRSTS; /*!< (@ 0x500040C4) Mirror Write Status Register */ + __IO uint32_t RMACR; /*!< (@ 0x500040C8) Retention Memory Access Control Register */ + __IO uint32_t RMDATA; /*!< (@ 0x500040CC) Retention Memory Access Data Register */ +} SCU_GENERAL_TypeDef; + + +/* ================================================================================ */ +/* ================ SCU_INTERRUPT ================ */ +/* ================================================================================ */ + + +/** + * @brief System Control Unit (SCU_INTERRUPT) + */ + +typedef struct { /*!< (@ 0x50004074) SCU_INTERRUPT Structure */ + __I uint32_t SRSTAT; /*!< (@ 0x50004074) SCU Service Request Status */ + __I uint32_t SRRAW; /*!< (@ 0x50004078) SCU Raw Service Request Status */ + __IO uint32_t SRMSK; /*!< (@ 0x5000407C) SCU Service Request Mask */ + __O uint32_t SRCLR; /*!< (@ 0x50004080) SCU Service Request Clear */ + __O uint32_t SRSET; /*!< (@ 0x50004084) SCU Service Request Set */ + __IO uint32_t NMIREQEN; /*!< (@ 0x50004088) SCU Service Request Mask */ +} SCU_INTERRUPT_TypeDef; + + +/* ================================================================================ */ +/* ================ SCU_PARITY ================ */ +/* ================================================================================ */ + + +/** + * @brief System Control Unit (SCU_PARITY) + */ + +typedef struct { /*!< (@ 0x5000413C) SCU_PARITY Structure */ + __IO uint32_t PEEN; /*!< (@ 0x5000413C) Parity Error Enable Register */ + __IO uint32_t MCHKCON; /*!< (@ 0x50004140) Memory Checking Control Register */ + __IO uint32_t PETE; /*!< (@ 0x50004144) Parity Error Trap Enable Register */ + __IO uint32_t PERSTEN; /*!< (@ 0x50004148) Parity Error Reset Enable Register */ + __I uint32_t RESERVED; + __IO uint32_t PEFLAG; /*!< (@ 0x50004150) Parity Error Flag Register */ + __IO uint32_t PMTPR; /*!< (@ 0x50004154) Parity Memory Test Pattern Register */ + __IO uint32_t PMTSR; /*!< (@ 0x50004158) Parity Memory Test Select Register */ +} SCU_PARITY_TypeDef; + + +/* ================================================================================ */ +/* ================ SCU_TRAP ================ */ +/* ================================================================================ */ + + +/** + * @brief System Control Unit (SCU_TRAP) + */ + +typedef struct { /*!< (@ 0x50004160) SCU_TRAP Structure */ + __I uint32_t TRAPSTAT; /*!< (@ 0x50004160) Trap Status Register */ + __I uint32_t TRAPRAW; /*!< (@ 0x50004164) Trap Raw Status Register */ + __IO uint32_t TRAPDIS; /*!< (@ 0x50004168) Trap Disable Register */ + __O uint32_t TRAPCLR; /*!< (@ 0x5000416C) Trap Clear Register */ + __O uint32_t TRAPSET; /*!< (@ 0x50004170) Trap Set Register */ +} SCU_TRAP_TypeDef; + + +/* ================================================================================ */ +/* ================ SCU_HIBERNATE ================ */ +/* ================================================================================ */ + + +/** + * @brief System Control Unit (SCU_HIBERNATE) + */ + +typedef struct { /*!< (@ 0x50004300) SCU_HIBERNATE Structure */ + __I uint32_t HDSTAT; /*!< (@ 0x50004300) Hibernate Domain Status Register */ + __O uint32_t HDCLR; /*!< (@ 0x50004304) Hibernate Domain Status Clear Register */ + __O uint32_t HDSET; /*!< (@ 0x50004308) Hibernate Domain Status Set Register */ + __IO uint32_t HDCR; /*!< (@ 0x5000430C) Hibernate Domain Control Register */ + __I uint32_t RESERVED; + __IO uint32_t OSCSICTRL; /*!< (@ 0x50004314) fOSI Control Register */ + __I uint32_t OSCULSTAT; /*!< (@ 0x50004318) OSC_ULP Status Register */ + __IO uint32_t OSCULCTRL; /*!< (@ 0x5000431C) OSC_ULP Control Register */ +} SCU_HIBERNATE_TypeDef; + + +/* ================================================================================ */ +/* ================ SCU_POWER ================ */ +/* ================================================================================ */ + + +/** + * @brief System Control Unit (SCU_POWER) + */ + +typedef struct { /*!< (@ 0x50004200) SCU_POWER Structure */ + __I uint32_t PWRSTAT; /*!< (@ 0x50004200) PCU Status Register */ + __O uint32_t PWRSET; /*!< (@ 0x50004204) PCU Set Control Register */ + __O uint32_t PWRCLR; /*!< (@ 0x50004208) PCU Clear Control Register */ + __I uint32_t RESERVED; + __I uint32_t EVRSTAT; /*!< (@ 0x50004210) EVR Status Register */ + __I uint32_t EVRVADCSTAT; /*!< (@ 0x50004214) EVR VADC Status Register */ + __I uint32_t RESERVED1[5]; + __IO uint32_t PWRMON; /*!< (@ 0x5000422C) Power Monitor Control */ +} SCU_POWER_TypeDef; + + +/* ================================================================================ */ +/* ================ SCU_RESET ================ */ +/* ================================================================================ */ + + +/** + * @brief System Control Unit (SCU_RESET) + */ + +typedef struct { /*!< (@ 0x50004400) SCU_RESET Structure */ + __I uint32_t RSTSTAT; /*!< (@ 0x50004400) RCU Reset Status */ + __O uint32_t RSTSET; /*!< (@ 0x50004404) RCU Reset Set Register */ + __O uint32_t RSTCLR; /*!< (@ 0x50004408) RCU Reset Clear Register */ + __I uint32_t PRSTAT0; /*!< (@ 0x5000440C) RCU Peripheral 0 Reset Status */ + __O uint32_t PRSET0; /*!< (@ 0x50004410) RCU Peripheral 0 Reset Set */ + __O uint32_t PRCLR0; /*!< (@ 0x50004414) RCU Peripheral 0 Reset Clear */ + __I uint32_t PRSTAT1; /*!< (@ 0x50004418) RCU Peripheral 1 Reset Status */ + __O uint32_t PRSET1; /*!< (@ 0x5000441C) RCU Peripheral 1 Reset Set */ + __O uint32_t PRCLR1; /*!< (@ 0x50004420) RCU Peripheral 1 Reset Clear */ + __I uint32_t PRSTAT2; /*!< (@ 0x50004424) RCU Peripheral 2 Reset Status */ + __O uint32_t PRSET2; /*!< (@ 0x50004428) RCU Peripheral 2 Reset Set */ + __O uint32_t PRCLR2; /*!< (@ 0x5000442C) RCU Peripheral 2 Reset Clear */ + __I uint32_t PRSTAT3; /*!< (@ 0x50004430) RCU Peripheral 3 Reset Status */ + __O uint32_t PRSET3; /*!< (@ 0x50004434) RCU Peripheral 3 Reset Set */ + __O uint32_t PRCLR3; /*!< (@ 0x50004438) RCU Peripheral 3 Reset Clear */ +} SCU_RESET_TypeDef; + + +/* ================================================================================ */ +/* ================ LEDTS [LEDTS0] ================ */ +/* ================================================================================ */ + + +/** + * @brief LED and Touch Sense Unit 0 (LEDTS) + */ + +typedef struct { /*!< (@ 0x48010000) LEDTS Structure */ + __I uint32_t ID; /*!< (@ 0x48010000) Module Identification Register */ + __IO uint32_t GLOBCTL; /*!< (@ 0x48010004) Global Control Register */ + __IO uint32_t FNCTL; /*!< (@ 0x48010008) Function Control Register */ + __O uint32_t EVFR; /*!< (@ 0x4801000C) Event Flag Register */ + __IO uint32_t TSVAL; /*!< (@ 0x48010010) Touch-sense TS-Counter Value */ + __IO uint32_t LINE0; /*!< (@ 0x48010014) Line Pattern Register 0 */ + __IO uint32_t LINE1; /*!< (@ 0x48010018) Line Pattern Register 1 */ + __IO uint32_t LDCMP0; /*!< (@ 0x4801001C) LED Compare Register 0 */ + __IO uint32_t LDCMP1; /*!< (@ 0x48010020) LED Compare Register 1 */ + __IO uint32_t TSCMP0; /*!< (@ 0x48010024) Touch-sense Compare Register 0 */ + __IO uint32_t TSCMP1; /*!< (@ 0x48010028) Touch-sense Compare Register 1 */ +} LEDTS0_GLOBAL_TypeDef; + + +/* ================================================================================ */ +/* ================ SDMMC_CON ================ */ +/* ================================================================================ */ + + +/** + * @brief SD and Multimediacard Control Register (SDMMC_CON) + */ + +typedef struct { /*!< (@ 0x500040B4) SDMMC_CON Structure */ + __IO uint32_t SDMMC_CON; /*!< (@ 0x500040B4) SDMMC Configuration */ +} SDMMC_CON_Type; + + +/* ================================================================================ */ +/* ================ SDMMC ================ */ +/* ================================================================================ */ + + +/** + * @brief SD and Multimediacard Interface (SDMMC) + */ + +typedef struct { /*!< (@ 0x4801C000) SDMMC Structure */ + __I uint32_t RESERVED; + __IO uint16_t BLOCK_SIZE; /*!< (@ 0x4801C004) Block Size Register */ + __IO uint16_t BLOCK_COUNT; /*!< (@ 0x4801C006) Block Count Register */ + __IO uint32_t ARGUMENT1; /*!< (@ 0x4801C008) Argument1 Register */ + __IO uint16_t TRANSFER_MODE; /*!< (@ 0x4801C00C) Transfer Mode Register */ + __IO uint16_t COMMAND; /*!< (@ 0x4801C00E) Command Register */ + __I uint32_t RESPONSE0; /*!< (@ 0x4801C010) Response 0 Register */ + __I uint32_t RESPONSE2; /*!< (@ 0x4801C014) Response 2 Register */ + __I uint32_t RESPONSE4; /*!< (@ 0x4801C018) Response 4 Register */ + __I uint32_t RESPONSE6; /*!< (@ 0x4801C01C) Response 6 Register */ + __IO uint32_t DATA_BUFFER; /*!< (@ 0x4801C020) Data Buffer Register */ + __I uint32_t PRESENT_STATE; /*!< (@ 0x4801C024) Present State Register */ + __IO uint8_t HOST_CTRL; /*!< (@ 0x4801C028) Host Control Register */ + __IO uint8_t POWER_CTRL; /*!< (@ 0x4801C029) Power Control Register */ + __IO uint8_t BLOCK_GAP_CTRL; /*!< (@ 0x4801C02A) Block Gap Control Register */ + __IO uint8_t WAKEUP_CTRL; /*!< (@ 0x4801C02B) Wake-up Control Register */ + __IO uint16_t CLOCK_CTRL; /*!< (@ 0x4801C02C) Clock Control Register */ + __IO uint8_t TIMEOUT_CTRL; /*!< (@ 0x4801C02E) Timeout Control Register */ + __IO uint8_t SW_RESET; /*!< (@ 0x4801C02F) Software Reset Register */ + __IO uint16_t INT_STATUS_NORM; /*!< (@ 0x4801C030) Normal Interrupt Status Register */ + __IO uint16_t INT_STATUS_ERR; /*!< (@ 0x4801C032) Error Interrupt Status Register */ + __IO uint16_t EN_INT_STATUS_NORM; /*!< (@ 0x4801C034) Normal Interrupt Status Enable Register */ + __IO uint16_t EN_INT_STATUS_ERR; /*!< (@ 0x4801C036) Error Interrupt Status Enable Register */ + __IO uint16_t EN_INT_SIGNAL_NORM; /*!< (@ 0x4801C038) Normal Interrupt Signal Enable Register */ + __IO uint16_t EN_INT_SIGNAL_ERR; /*!< (@ 0x4801C03A) Error Interrupt Signal Enable Register */ + __I uint16_t ACMD_ERR_STATUS; /*!< (@ 0x4801C03C) Auto CMD Error Status Register */ + __I uint16_t RESERVED1; + __I uint32_t CAPABILITIES; /*!< (@ 0x4801C040) Capabilities Register */ + __I uint32_t CAPABILITIES_HI; /*!< (@ 0x4801C044) Capabilities Register High */ + __I uint32_t MAX_CURRENT_CAP; /*!< (@ 0x4801C048) Maximum Current Capabilities Register */ + __I uint32_t RESERVED2; + __O uint16_t FORCE_EVENT_ACMD_ERR_STATUS; /*!< (@ 0x4801C050) Force Event Register for Auto CMD Error Status */ + __O uint16_t FORCE_EVENT_ERR_STATUS; /*!< (@ 0x4801C052) Force Event Register for Error Interrupt Status */ + __I uint32_t RESERVED3[8]; + __O uint32_t DEBUG_SEL; /*!< (@ 0x4801C074) Debug Selection Register */ + __I uint32_t RESERVED4[33]; + __I uint16_t SLOT_INT_STATUS; /*!< (@ 0x4801C0FC) Slot Interrupt Status Register */ +} SDMMC_GLOBAL_TypeDef; + + +/* ================================================================================ */ +/* ================ EBU ================ */ +/* ================================================================================ */ + + +/** + * @brief External Bus Unit (EBU) + */ + +typedef struct { /*!< (@ 0x58008000) EBU Structure */ + __IO uint32_t CLC; /*!< (@ 0x58008000) EBU Clock Control Register */ + __IO uint32_t MODCON; /*!< (@ 0x58008004) EBU Configuration Register */ + __I uint32_t ID; /*!< (@ 0x58008008) EBU Module Identification Register */ + __IO uint32_t USERCON; /*!< (@ 0x5800800C) EBU Test/Control Configuration Register */ + __I uint32_t RESERVED[2]; + __IO uint32_t ADDRSEL0; /*!< (@ 0x58008018) EBU Address Select Register 0 */ + __IO uint32_t ADDRSEL1; /*!< (@ 0x5800801C) EBU Address Select Register 1 */ + __IO uint32_t ADDRSEL2; /*!< (@ 0x58008020) EBU Address Select Register 2 */ + __IO uint32_t ADDRSEL3; /*!< (@ 0x58008024) EBU Address Select Register 3 */ + __IO uint32_t BUSRCON0; /*!< (@ 0x58008028) EBU Bus Configuration Register */ + __IO uint32_t BUSRAP0; /*!< (@ 0x5800802C) EBU Bus Read Access Parameter Register */ + __IO uint32_t BUSWCON0; /*!< (@ 0x58008030) EBU Bus Write Configuration Register */ + __IO uint32_t BUSWAP0; /*!< (@ 0x58008034) EBU Bus Write Access Parameter Register */ + __IO uint32_t BUSRCON1; /*!< (@ 0x58008038) EBU Bus Configuration Register */ + __IO uint32_t BUSRAP1; /*!< (@ 0x5800803C) EBU Bus Read Access Parameter Register */ + __IO uint32_t BUSWCON1; /*!< (@ 0x58008040) EBU Bus Write Configuration Register */ + __IO uint32_t BUSWAP1; /*!< (@ 0x58008044) EBU Bus Write Access Parameter Register */ + __IO uint32_t BUSRCON2; /*!< (@ 0x58008048) EBU Bus Configuration Register */ + __IO uint32_t BUSRAP2; /*!< (@ 0x5800804C) EBU Bus Read Access Parameter Register */ + __IO uint32_t BUSWCON2; /*!< (@ 0x58008050) EBU Bus Write Configuration Register */ + __IO uint32_t BUSWAP2; /*!< (@ 0x58008054) EBU Bus Write Access Parameter Register */ + __IO uint32_t BUSRCON3; /*!< (@ 0x58008058) EBU Bus Configuration Register */ + __IO uint32_t BUSRAP3; /*!< (@ 0x5800805C) EBU Bus Read Access Parameter Register */ + __IO uint32_t BUSWCON3; /*!< (@ 0x58008060) EBU Bus Write Configuration Register */ + __IO uint32_t BUSWAP3; /*!< (@ 0x58008064) EBU Bus Write Access Parameter Register */ + __IO uint32_t SDRMCON; /*!< (@ 0x58008068) EBU SDRAM Control Register */ + __IO uint32_t SDRMOD; /*!< (@ 0x5800806C) EBU SDRAM Mode Register */ + __IO uint32_t SDRMREF; /*!< (@ 0x58008070) EBU SDRAM Refresh Control Register */ + __I uint32_t SDRSTAT; /*!< (@ 0x58008074) EBU SDRAM Status Register */ +} EBU_Type; + + +/* ================================================================================ */ +/* ================ ETH0_CON ================ */ +/* ================================================================================ */ + + +/** + * @brief Ethernet Control Register (ETH0_CON) + */ + +typedef struct { /*!< (@ 0x50004040) ETH0_CON Structure */ + __IO uint32_t CON; /*!< (@ 0x50004040) Ethernet 0 Port Control Register */ +} ETH0_CON_GLOBAL_TypeDef; + + +/* ================================================================================ */ +/* ================ ETH [ETH0] ================ */ +/* ================================================================================ */ + + +/** + * @brief Ethernet Unit 0 (ETH) + */ + +typedef struct { /*!< (@ 0x5000C000) ETH Structure */ + __IO uint32_t MAC_CONFIGURATION; /*!< (@ 0x5000C000) MAC Configuration Register */ + __IO uint32_t MAC_FRAME_FILTER; /*!< (@ 0x5000C004) MAC Frame Filter */ + __IO uint32_t HASH_TABLE_HIGH; /*!< (@ 0x5000C008) Hash Table High Register */ + __IO uint32_t HASH_TABLE_LOW; /*!< (@ 0x5000C00C) Hash Table Low Register */ + __IO uint32_t GMII_ADDRESS; /*!< (@ 0x5000C010) MII Address Register */ + __IO uint32_t GMII_DATA; /*!< (@ 0x5000C014) MII Data Register */ + __IO uint32_t FLOW_CONTROL; /*!< (@ 0x5000C018) Flow Control Register */ + __IO uint32_t VLAN_TAG; /*!< (@ 0x5000C01C) VLAN Tag Register */ + __I uint32_t VERSION; /*!< (@ 0x5000C020) Version Register */ + __I uint32_t DEBUG; /*!< (@ 0x5000C024) Debug Register */ + __IO uint32_t REMOTE_WAKE_UP_FRAME_FILTER; /*!< (@ 0x5000C028) Remote Wake Up Frame Filter Register */ + __IO uint32_t PMT_CONTROL_STATUS; /*!< (@ 0x5000C02C) PMT Control and Status Register */ + __I uint32_t RESERVED[2]; + __I uint32_t INTERRUPT_STATUS; /*!< (@ 0x5000C038) Interrupt Register */ + __IO uint32_t INTERRUPT_MASK; /*!< (@ 0x5000C03C) Interrupt Mask Register */ + __IO uint32_t MAC_ADDRESS0_HIGH; /*!< (@ 0x5000C040) MAC Address0 High Register */ + __IO uint32_t MAC_ADDRESS0_LOW; /*!< (@ 0x5000C044) MAC Address0 Low Register */ + __IO uint32_t MAC_ADDRESS1_HIGH; /*!< (@ 0x5000C048) MAC Address1 High Register */ + __IO uint32_t MAC_ADDRESS1_LOW; /*!< (@ 0x5000C04C) MAC Address1 Low Register */ + __IO uint32_t MAC_ADDRESS2_HIGH; /*!< (@ 0x5000C050) MAC Address2 High Register */ + __IO uint32_t MAC_ADDRESS2_LOW; /*!< (@ 0x5000C054) MAC Address2 Low Register */ + __IO uint32_t MAC_ADDRESS3_HIGH; /*!< (@ 0x5000C058) MAC Address3 High Register */ + __IO uint32_t MAC_ADDRESS3_LOW; /*!< (@ 0x5000C05C) MAC Address3 Low Register */ + __I uint32_t RESERVED1[40]; + __IO uint32_t MMC_CONTROL; /*!< (@ 0x5000C100) MMC Control Register */ + __I uint32_t MMC_RECEIVE_INTERRUPT; /*!< (@ 0x5000C104) MMC Receive Interrupt Register */ + __I uint32_t MMC_TRANSMIT_INTERRUPT; /*!< (@ 0x5000C108) MMC Transmit Interrupt Register */ + __IO uint32_t MMC_RECEIVE_INTERRUPT_MASK; /*!< (@ 0x5000C10C) MMC Reveive Interrupt Mask Register */ + __IO uint32_t MMC_TRANSMIT_INTERRUPT_MASK; /*!< (@ 0x5000C110) MMC Transmit Interrupt Mask Register */ + __I uint32_t TX_OCTET_COUNT_GOOD_BAD; /*!< (@ 0x5000C114) Transmit Octet Count for Good and Bad Frames + Register */ + __I uint32_t TX_FRAME_COUNT_GOOD_BAD; /*!< (@ 0x5000C118) Transmit Frame Count for Goodand Bad Frames Register */ + __I uint32_t TX_BROADCAST_FRAMES_GOOD; /*!< (@ 0x5000C11C) Transmit Frame Count for Good Broadcast Frames */ + __I uint32_t TX_MULTICAST_FRAMES_GOOD; /*!< (@ 0x5000C120) Transmit Frame Count for Good Multicast Frames */ + __I uint32_t TX_64OCTETS_FRAMES_GOOD_BAD; /*!< (@ 0x5000C124) Transmit Octet Count for Good and Bad 64 Byte + Frames */ + __I uint32_t TX_65TO127OCTETS_FRAMES_GOOD_BAD; /*!< (@ 0x5000C128) Transmit Octet Count for Good and Bad 65 to 127 + Bytes Frames */ + __I uint32_t TX_128TO255OCTETS_FRAMES_GOOD_BAD; /*!< (@ 0x5000C12C) Transmit Octet Count for Good and Bad 128 to + 255 Bytes Frames */ + __I uint32_t TX_256TO511OCTETS_FRAMES_GOOD_BAD; /*!< (@ 0x5000C130) Transmit Octet Count for Good and Bad 256 to + 511 Bytes Frames */ + __I uint32_t TX_512TO1023OCTETS_FRAMES_GOOD_BAD;/*!< (@ 0x5000C134) Transmit Octet Count for Good and Bad 512 to + 1023 Bytes Frames */ + __I uint32_t TX_1024TOMAXOCTETS_FRAMES_GOOD_BAD;/*!< (@ 0x5000C138) Transmit Octet Count for Good and Bad 1024 to + Maxsize Bytes Frames */ + __I uint32_t TX_UNICAST_FRAMES_GOOD_BAD; /*!< (@ 0x5000C13C) Transmit Frame Count for Good and Bad Unicast + Frames */ + __I uint32_t TX_MULTICAST_FRAMES_GOOD_BAD; /*!< (@ 0x5000C140) Transmit Frame Count for Good and Bad Multicast + Frames */ + __I uint32_t TX_BROADCAST_FRAMES_GOOD_BAD; /*!< (@ 0x5000C144) Transmit Frame Count for Good and Bad Broadcast + Frames */ + __I uint32_t TX_UNDERFLOW_ERROR_FRAMES; /*!< (@ 0x5000C148) Transmit Frame Count for Underflow Error Frames */ + __I uint32_t TX_SINGLE_COLLISION_GOOD_FRAMES; /*!< (@ 0x5000C14C) Transmit Frame Count for Frames Transmitted after + Single Collision */ + __I uint32_t TX_MULTIPLE_COLLISION_GOOD_FRAMES; /*!< (@ 0x5000C150) Transmit Frame Count for Frames Transmitted after + Multiple Collision */ + __I uint32_t TX_DEFERRED_FRAMES; /*!< (@ 0x5000C154) Tx Deferred Frames Register */ + __I uint32_t TX_LATE_COLLISION_FRAMES; /*!< (@ 0x5000C158) Transmit Frame Count for Late Collision Error + Frames */ + __I uint32_t TX_EXCESSIVE_COLLISION_FRAMES; /*!< (@ 0x5000C15C) Transmit Frame Count for Excessive Collision + Error Frames */ + __I uint32_t TX_CARRIER_ERROR_FRAMES; /*!< (@ 0x5000C160) Transmit Frame Count for Carrier Sense Error + Frames */ + __I uint32_t TX_OCTET_COUNT_GOOD; /*!< (@ 0x5000C164) Tx Octet Count Good Register */ + __I uint32_t TX_FRAME_COUNT_GOOD; /*!< (@ 0x5000C168) Tx Frame Count Good Register */ + __I uint32_t TX_EXCESSIVE_DEFERRAL_ERROR; /*!< (@ 0x5000C16C) Transmit Frame Count for Excessive Deferral Error + Frames */ + __I uint32_t TX_PAUSE_FRAMES; /*!< (@ 0x5000C170) Transmit Frame Count for Good PAUSE Frames */ + __I uint32_t TX_VLAN_FRAMES_GOOD; /*!< (@ 0x5000C174) Transmit Frame Count for Good VLAN Frames */ + __I uint32_t TX_OSIZE_FRAMES_GOOD; /*!< (@ 0x5000C178) Transmit Frame Count for Good Oversize Frames */ + __I uint32_t RESERVED2; + __I uint32_t RX_FRAMES_COUNT_GOOD_BAD; /*!< (@ 0x5000C180) Receive Frame Count for Good and Bad Frames */ + __I uint32_t RX_OCTET_COUNT_GOOD_BAD; /*!< (@ 0x5000C184) Receive Octet Count for Good and Bad Frames */ + __I uint32_t RX_OCTET_COUNT_GOOD; /*!< (@ 0x5000C188) Rx Octet Count Good Register */ + __I uint32_t RX_BROADCAST_FRAMES_GOOD; /*!< (@ 0x5000C18C) Receive Frame Count for Good Broadcast Frames */ + __I uint32_t RX_MULTICAST_FRAMES_GOOD; /*!< (@ 0x5000C190) Receive Frame Count for Good Multicast Frames */ + __I uint32_t RX_CRC_ERROR_FRAMES; /*!< (@ 0x5000C194) Receive Frame Count for CRC Error Frames */ + __I uint32_t RX_ALIGNMENT_ERROR_FRAMES; /*!< (@ 0x5000C198) Receive Frame Count for Alignment Error Frames */ + __I uint32_t RX_RUNT_ERROR_FRAMES; /*!< (@ 0x5000C19C) Receive Frame Count for Runt Error Frames */ + __I uint32_t RX_JABBER_ERROR_FRAMES; /*!< (@ 0x5000C1A0) Receive Frame Count for Jabber Error Frames */ + __I uint32_t RX_UNDERSIZE_FRAMES_GOOD; /*!< (@ 0x5000C1A4) Receive Frame Count for Undersize Frames */ + __I uint32_t RX_OVERSIZE_FRAMES_GOOD; /*!< (@ 0x5000C1A8) Rx Oversize Frames Good Register */ + __I uint32_t RX_64OCTETS_FRAMES_GOOD_BAD; /*!< (@ 0x5000C1AC) Receive Frame Count for Good and Bad 64 Byte + Frames */ + __I uint32_t RX_65TO127OCTETS_FRAMES_GOOD_BAD; /*!< (@ 0x5000C1B0) Receive Frame Count for Good and Bad 65 to 127 + Bytes Frames */ + __I uint32_t RX_128TO255OCTETS_FRAMES_GOOD_BAD; /*!< (@ 0x5000C1B4) Receive Frame Count for Good and Bad 128 to 255 + Bytes Frames */ + __I uint32_t RX_256TO511OCTETS_FRAMES_GOOD_BAD; /*!< (@ 0x5000C1B8) Receive Frame Count for Good and Bad 256 to 511 + Bytes Frames */ + __I uint32_t RX_512TO1023OCTETS_FRAMES_GOOD_BAD;/*!< (@ 0x5000C1BC) Receive Frame Count for Good and Bad 512 to 1,023 + Bytes Frames */ + __I uint32_t RX_1024TOMAXOCTETS_FRAMES_GOOD_BAD;/*!< (@ 0x5000C1C0) Receive Frame Count for Good and Bad 1,024 to + Maxsize Bytes Frames */ + __I uint32_t RX_UNICAST_FRAMES_GOOD; /*!< (@ 0x5000C1C4) Receive Frame Count for Good Unicast Frames */ + __I uint32_t RX_LENGTH_ERROR_FRAMES; /*!< (@ 0x5000C1C8) Receive Frame Count for Length Error Frames */ + __I uint32_t RX_OUT_OF_RANGE_TYPE_FRAMES; /*!< (@ 0x5000C1CC) Receive Frame Count for Out of Range Frames */ + __I uint32_t RX_PAUSE_FRAMES; /*!< (@ 0x5000C1D0) Receive Frame Count for PAUSE Frames */ + __I uint32_t RX_FIFO_OVERFLOW_FRAMES; /*!< (@ 0x5000C1D4) Receive Frame Count for FIFO Overflow Frames */ + __I uint32_t RX_VLAN_FRAMES_GOOD_BAD; /*!< (@ 0x5000C1D8) Receive Frame Count for Good and Bad VLAN Frames */ + __I uint32_t RX_WATCHDOG_ERROR_FRAMES; /*!< (@ 0x5000C1DC) Receive Frame Count for Watchdog Error Frames */ + __I uint32_t RX_RECEIVE_ERROR_FRAMES; /*!< (@ 0x5000C1E0) Receive Frame Count for Receive Error Frames */ + __I uint32_t RX_CONTROL_FRAMES_GOOD; /*!< (@ 0x5000C1E4) Receive Frame Count for Good Control Frames Frames */ + __I uint32_t RESERVED3[6]; + __IO uint32_t MMC_IPC_RECEIVE_INTERRUPT_MASK; /*!< (@ 0x5000C200) MMC Receive Checksum Offload Interrupt Mask Register */ + __I uint32_t RESERVED4; + __I uint32_t MMC_IPC_RECEIVE_INTERRUPT; /*!< (@ 0x5000C208) MMC Receive Checksum Offload Interrupt Register */ + __I uint32_t RESERVED5; + __I uint32_t RXIPV4_GOOD_FRAMES; /*!< (@ 0x5000C210) RxIPv4 Good Frames Register */ + __I uint32_t RXIPV4_HEADER_ERROR_FRAMES; /*!< (@ 0x5000C214) Receive IPV4 Header Error Frame Counter Register */ + __I uint32_t RXIPV4_NO_PAYLOAD_FRAMES; /*!< (@ 0x5000C218) Receive IPV4 No Payload Frame Counter Register */ + __I uint32_t RXIPV4_FRAGMENTED_FRAMES; /*!< (@ 0x5000C21C) Receive IPV4 Fragmented Frame Counter Register */ + __I uint32_t RXIPV4_UDP_CHECKSUM_DISABLED_FRAMES;/*!< (@ 0x5000C220) Receive IPV4 UDP Checksum Disabled Frame Counter + Register */ + __I uint32_t RXIPV6_GOOD_FRAMES; /*!< (@ 0x5000C224) RxIPv6 Good Frames Register */ + __I uint32_t RXIPV6_HEADER_ERROR_FRAMES; /*!< (@ 0x5000C228) Receive IPV6 Header Error Frame Counter Register */ + __I uint32_t RXIPV6_NO_PAYLOAD_FRAMES; /*!< (@ 0x5000C22C) Receive IPV6 No Payload Frame Counter Register */ + __I uint32_t RXUDP_GOOD_FRAMES; /*!< (@ 0x5000C230) RxUDP Good Frames Register */ + __I uint32_t RXUDP_ERROR_FRAMES; /*!< (@ 0x5000C234) RxUDP Error Frames Register */ + __I uint32_t RXTCP_GOOD_FRAMES; /*!< (@ 0x5000C238) RxTCP Good Frames Register */ + __I uint32_t RXTCP_ERROR_FRAMES; /*!< (@ 0x5000C23C) RxTCP Error Frames Register */ + __I uint32_t RXICMP_GOOD_FRAMES; /*!< (@ 0x5000C240) RxICMP Good Frames Register */ + __I uint32_t RXICMP_ERROR_FRAMES; /*!< (@ 0x5000C244) RxICMP Error Frames Register */ + __I uint32_t RESERVED6[2]; + __I uint32_t RXIPV4_GOOD_OCTETS; /*!< (@ 0x5000C250) RxIPv4 Good Octets Register */ + __I uint32_t RXIPV4_HEADER_ERROR_OCTETS; /*!< (@ 0x5000C254) Receive IPV4 Header Error Octet Counter Register */ + __I uint32_t RXIPV4_NO_PAYLOAD_OCTETS; /*!< (@ 0x5000C258) Receive IPV4 No Payload Octet Counter Register */ + __I uint32_t RXIPV4_FRAGMENTED_OCTETS; /*!< (@ 0x5000C25C) Receive IPV4 Fragmented Octet Counter Register */ + __I uint32_t RXIPV4_UDP_CHECKSUM_DISABLE_OCTETS;/*!< (@ 0x5000C260) Receive IPV4 Fragmented Octet Counter Register */ + __I uint32_t RXIPV6_GOOD_OCTETS; /*!< (@ 0x5000C264) RxIPv6 Good Octets Register */ + __I uint32_t RXIPV6_HEADER_ERROR_OCTETS; /*!< (@ 0x5000C268) Receive IPV6 Header Error Octet Counter Register */ + __I uint32_t RXIPV6_NO_PAYLOAD_OCTETS; /*!< (@ 0x5000C26C) Receive IPV6 No Payload Octet Counter Register */ + __I uint32_t RXUDP_GOOD_OCTETS; /*!< (@ 0x5000C270) Receive UDP Good Octets Register */ + __I uint32_t RXUDP_ERROR_OCTETS; /*!< (@ 0x5000C274) Receive UDP Error Octets Register */ + __I uint32_t RXTCP_GOOD_OCTETS; /*!< (@ 0x5000C278) Receive TCP Good Octets Register */ + __I uint32_t RXTCP_ERROR_OCTETS; /*!< (@ 0x5000C27C) Receive TCP Error Octets Register */ + __I uint32_t RXICMP_GOOD_OCTETS; /*!< (@ 0x5000C280) Receive ICMP Good Octets Register */ + __I uint32_t RXICMP_ERROR_OCTETS; /*!< (@ 0x5000C284) Receive ICMP Error Octets Register */ + __I uint32_t RESERVED7[286]; + __IO uint32_t TIMESTAMP_CONTROL; /*!< (@ 0x5000C700) Timestamp Control Register */ + __IO uint32_t SUB_SECOND_INCREMENT; /*!< (@ 0x5000C704) Sub-Second Increment Register */ + __I uint32_t SYSTEM_TIME_SECONDS; /*!< (@ 0x5000C708) System Time - Seconds Register */ + __I uint32_t SYSTEM_TIME_NANOSECONDS; /*!< (@ 0x5000C70C) System Time Nanoseconds Register */ + __IO uint32_t SYSTEM_TIME_SECONDS_UPDATE; /*!< (@ 0x5000C710) System Time - Seconds Update Register */ + __IO uint32_t SYSTEM_TIME_NANOSECONDS_UPDATE; /*!< (@ 0x5000C714) System Time Nanoseconds Update Register */ + __IO uint32_t TIMESTAMP_ADDEND; /*!< (@ 0x5000C718) Timestamp Addend Register */ + __IO uint32_t TARGET_TIME_SECONDS; /*!< (@ 0x5000C71C) Target Time Seconds Register */ + __IO uint32_t TARGET_TIME_NANOSECONDS; /*!< (@ 0x5000C720) Target Time Nanoseconds Register */ + __IO uint32_t SYSTEM_TIME_HIGHER_WORD_SECONDS; /*!< (@ 0x5000C724) System Time - Higher Word Seconds Register */ + __I uint32_t TIMESTAMP_STATUS; /*!< (@ 0x5000C728) Timestamp Status Register */ + __I uint32_t RESERVED8[565]; + __IO uint32_t BUS_MODE; /*!< (@ 0x5000D000) Bus Mode Register */ + __IO uint32_t TRANSMIT_POLL_DEMAND; /*!< (@ 0x5000D004) Transmit Poll Demand Register */ + __IO uint32_t RECEIVE_POLL_DEMAND; /*!< (@ 0x5000D008) Receive Poll Demand Register */ + __IO uint32_t RECEIVE_DESCRIPTOR_LIST_ADDRESS; /*!< (@ 0x5000D00C) Receive Descriptor Address Register */ + __IO uint32_t TRANSMIT_DESCRIPTOR_LIST_ADDRESS; /*!< (@ 0x5000D010) Transmit descripter Address Register */ + __IO uint32_t STATUS; /*!< (@ 0x5000D014) Status Register */ + __IO uint32_t OPERATION_MODE; /*!< (@ 0x5000D018) Operation Mode Register */ + __IO uint32_t INTERRUPT_ENABLE; /*!< (@ 0x5000D01C) Interrupt Enable Register */ + __I uint32_t MISSED_FRAME_AND_BUFFER_OVERFLOW_COUNTER;/*!< (@ 0x5000D020) Missed Frame and Buffer Overflow Counter Register */ + __IO uint32_t RECEIVE_INTERRUPT_WATCHDOG_TIMER; /*!< (@ 0x5000D024) Receive Interrupt Watchdog Timer Register */ + __I uint32_t RESERVED9; + __I uint32_t AHB_STATUS; /*!< (@ 0x5000D02C) AHB Status Register */ + __I uint32_t RESERVED10[6]; + __I uint32_t CURRENT_HOST_TRANSMIT_DESCRIPTOR; /*!< (@ 0x5000D048) Current Host Transmit Descriptor Register */ + __I uint32_t CURRENT_HOST_RECEIVE_DESCRIPTOR; /*!< (@ 0x5000D04C) Current Host Receive Descriptor Register */ + __I uint32_t CURRENT_HOST_TRANSMIT_BUFFER_ADDRESS;/*!< (@ 0x5000D050) Current Host Transmit Buffer Address Register */ + __I uint32_t CURRENT_HOST_RECEIVE_BUFFER_ADDRESS;/*!< (@ 0x5000D054) Current Host Receive Buffer Address Register */ + __IO uint32_t HW_FEATURE; /*!< (@ 0x5000D058) HW Feature Register */ +} ETH_GLOBAL_TypeDef; + + +/* ================================================================================ */ +/* ================ ECAT0_CON ================ */ +/* ================================================================================ */ + + +/** + * @brief EtherCAT 0 Control Register (ECAT0_CON) + */ + +typedef struct { /*!< (@ 0x500041B0) ECAT0_CON Structure */ + __IO uint32_t CON; /*!< (@ 0x500041B0) EtherCAT 0 Control */ + __IO uint32_t CONP0; /*!< (@ 0x500041B4) EtherCAT 0 Port 1 Control Register */ + __IO uint32_t CONP1; /*!< (@ 0x500041B8) EtherCAT 0 Port 1 Control Register */ +} ECAT0_CON_Type; + + +/* ================================================================================ */ +/* ================ ECAT [ECAT0] ================ */ +/* ================================================================================ */ + + +/** + * @brief EtherCAT 0 (ECAT) + */ + +typedef struct { /*!< (@ 0x54010000) ECAT Structure */ + __I uint8_t TYPE; /*!< (@ 0x54010000) Type of EtherCAT Controller */ + __I uint8_t REVISION; /*!< (@ 0x54010001) Revision of EtherCAT Controller */ + __I uint16_t BUILD; /*!< (@ 0x54010002) Build Version */ + __I uint8_t FMMU_NUM; /*!< (@ 0x54010004) FMMUs Supported */ + __I uint8_t SYNC_MANAGER; /*!< (@ 0x54010005) SyncManagers Supported */ + __I uint8_t RAM_SIZE; /*!< (@ 0x54010006) RAM Size */ + __I uint8_t PORT_DESC; /*!< (@ 0x54010007) Port Descriptor */ + __I uint16_t FEATURE; /*!< (@ 0x54010008) ESC Features Supported */ + __I uint16_t RESERVED[3]; + __I uint16_t STATION_ADR; /*!< (@ 0x54010010) Configured Station Address */ + __IO uint16_t STATION_ALIAS; /*!< (@ 0x54010012) Configured Station Alias */ + __I uint32_t RESERVED1[3]; + __I uint8_t WR_REG_ENABLE; /*!< (@ 0x54010020) Write Register Enable */ + __I uint8_t WR_REG_PROTECT; /*!< (@ 0x54010021) Write Register Protection */ + __I uint16_t RESERVED2[7]; + __I uint8_t ESC_WR_ENABLE; /*!< (@ 0x54010030) ESC Write Enable */ + __I uint8_t ESC_WR_PROTECT; /*!< (@ 0x54010031) ESC Write Protection */ + __I uint16_t RESERVED3[7]; + + union { + __I uint8_t ESC_RESET_ECAT_READMode; /*!< (@ 0x54010040) ESC Reset ECAT [READ Mode] */ + __I uint8_t ESC_RESET_ECAT_WRITEMode; /*!< (@ 0x54010040) ESC Reset ECAT [WRITE Mode] */ + }; + + union { + __I uint8_t ESC_RESET_PDI_READMode; /*!< (@ 0x54010041) ESC Reset PDI [READ Mode] */ + __I uint8_t ESC_RESET_PDI_WRITEMode; /*!< (@ 0x54010041) ESC Reset PDI [WRITE Mode] */ + }; + __I uint16_t RESERVED4[95]; + __I uint32_t ESC_DL_CONTROL; /*!< (@ 0x54010100) ESC DL Control */ + __I uint32_t RESERVED5; + __I uint16_t PHYSICAL_RW_OFFSET; /*!< (@ 0x54010108) Physical Read/Write Offset */ + __I uint16_t RESERVED6[3]; + __I uint16_t ESC_DL_STATUS; /*!< (@ 0x54010110) ESC DL Status */ + __I uint16_t RESERVED7[7]; + __I uint16_t AL_CONTROL; /*!< (@ 0x54010120) AL Control */ + __I uint16_t RESERVED8[7]; + __IO uint16_t AL_STATUS; /*!< (@ 0x54010130) AL Status */ + __I uint16_t RESERVED9; + __IO uint16_t AL_STATUS_CODE; /*!< (@ 0x54010134) AL Status Code */ + __I uint16_t RESERVED10; + __IO uint8_t RUN_LED; /*!< (@ 0x54010138) RUN LED Override */ + __IO uint8_t ERR_LED; /*!< (@ 0x54010139) RUN ERR Override */ + __I uint16_t RESERVED11[3]; + __I uint8_t PDI_CONTROL; /*!< (@ 0x54010140) PDI Control */ + __I uint8_t ESC_CONFIG; /*!< (@ 0x54010141) ESC Configuration */ + __I uint16_t RESERVED12[7]; + __I uint8_t PDI_CONFIG; /*!< (@ 0x54010150) PDI Control */ + __I uint8_t SYNC_LATCH_CONFIG; /*!< (@ 0x54010151) Sync/Latch[1:0] PDI Configuration */ + __I uint16_t PDI_EXT_CONFIG; /*!< (@ 0x54010152) PDI Synchronous Microcontroller extended Configuration */ + __I uint32_t RESERVED13[43]; + __I uint16_t EVENT_MASK; /*!< (@ 0x54010200) ECAT Event Mask */ + __I uint16_t RESERVED14; + __IO uint32_t AL_EVENT_MASK; /*!< (@ 0x54010204) PDI AL Event Mask */ + __I uint32_t RESERVED15[2]; + __I uint16_t EVENT_REQ; /*!< (@ 0x54010210) ECAT Event Request */ + __I uint16_t RESERVED16[7]; + __IO uint32_t AL_EVENT_REQ; /*!< (@ 0x54010220) AL Event Request */ + __I uint32_t RESERVED17[55]; + __I uint16_t RX_ERR_COUNT0; /*!< (@ 0x54010300) RX Error Counter Port 0 */ + __I uint16_t RX_ERR_COUNT1; /*!< (@ 0x54010302) RX Error Counter Port 1 */ + __I uint32_t RESERVED18; + __I uint8_t FWD_RX_ERR_COUNT0; /*!< (@ 0x54010308) Forwarded RX Error Counter Port 0 */ + __I uint8_t FWD_RX_ERR_COUNT1; /*!< (@ 0x54010309) Forwarded RX Error Counter Port 1 */ + __I uint16_t RESERVED19; + __I uint8_t PROC_ERR_COUNT; /*!< (@ 0x5401030C) ECAT Processing Unit Error Counter */ + __I uint8_t PDI_ERR_COUNT; /*!< (@ 0x5401030D) PDI Error Counter */ + __I uint16_t RESERVED20; + __I uint8_t LOST_LINK_COUNT0; /*!< (@ 0x54010310) Lost Link Counter Port 0 */ + __I uint8_t LOST_LINK_COUNT1; /*!< (@ 0x54010311) Lost Link Counter Port 1 */ + __I uint16_t RESERVED21[119]; + __IO uint16_t WD_DIVIDE; /*!< (@ 0x54010400) Watchdog Divider */ + __I uint16_t RESERVED22[7]; + __IO uint16_t WD_TIME_PDI; /*!< (@ 0x54010410) Watchdog Time PDI */ + __I uint16_t RESERVED23[7]; + __IO uint16_t WD_TIME_PDATA; /*!< (@ 0x54010420) Watchdog Time Process Data */ + __I uint16_t RESERVED24[15]; + __I uint16_t WD_STAT_PDATA; /*!< (@ 0x54010440) Watchdog Status Process Data */ + __I uint8_t WD_COUNT_PDATA; /*!< (@ 0x54010442) Watchdog Counter Process Data */ + __I uint8_t WD_COUNT_PDI; /*!< (@ 0x54010443) Watchdog Counter PDI */ + __I uint32_t RESERVED25[47]; + __I uint8_t EEP_CONF; /*!< (@ 0x54010500) EEPROM Configuration */ + __IO uint8_t EEP_STATE; /*!< (@ 0x54010501) EEPROM PDI Access State */ + __IO uint16_t EEP_CONT_STAT; /*!< (@ 0x54010502) EEPROM Control/Status */ + __IO uint32_t EEP_ADR; /*!< (@ 0x54010504) EEPROM Address */ + __IO uint32_t EEP_DATA[2]; /*!< (@ 0x54010508) EEPROM Read/Write data */ + __IO uint16_t MII_CONT_STAT; /*!< (@ 0x54010510) MII Management Control/Status */ + __IO uint8_t MII_PHY_ADR; /*!< (@ 0x54010512) PHY Address */ + __IO uint8_t MII_PHY_REG_ADR; /*!< (@ 0x54010513) PHY Register Address */ + __IO uint16_t MII_PHY_DATA; /*!< (@ 0x54010514) PHY Data */ + __I uint8_t MII_ECAT_ACS_STATE; /*!< (@ 0x54010516) MII ECAT ACS STATE */ + __IO uint8_t MII_PDI_ACS_STATE; /*!< (@ 0x54010517) MII PDI ACS STATE */ + __I uint32_t RESERVED26[250]; + __I uint32_t DC_RCV_TIME_PORT0; /*!< (@ 0x54010900) Receive Time Port 0 */ + __I uint32_t DC_RCV_TIME_PORT1; /*!< (@ 0x54010904) Receive Time Port 1 */ + __I uint32_t RESERVED27[2]; + + union { + __I uint32_t READMode_DC_SYS_TIME[2]; /*!< (@ 0x54010910) System Time read access */ + __O uint32_t DC_SYS_TIME_WRITEMode; /*!< (@ 0x54010910) System Time [WRITE Mode] */ + }; + __I uint32_t RECEIVE_TIME_PU[2]; /*!< (@ 0x54010918) Local time of the beginning of a frame */ + __IO uint32_t DC_SYS_TIME_OFFSET[2]; /*!< (@ 0x54010920) Difference between local time and System Time */ + __IO uint32_t DC_SYS_TIME_DELAY; /*!< (@ 0x54010928) System Time Delay */ + __I uint32_t DC_SYS_TIME_DIFF; /*!< (@ 0x5401092C) System Time Difference */ + __IO uint16_t DC_SPEED_COUNT_START; /*!< (@ 0x54010930) Speed Counter Start */ + __I uint16_t DC_SPEED_COUNT_DIFF; /*!< (@ 0x54010932) Speed Counter Diff */ + __IO uint8_t DC_SYS_TIME_FIL_DEPTH; /*!< (@ 0x54010934) System Time Difference Filter Depth */ + __IO uint8_t DC_SPEED_COUNT_FIL_DEPTH; /*!< (@ 0x54010935) Speed Counter Filter Depth */ + __I uint16_t RESERVED28[37]; + __I uint8_t DC_CYC_CONT; /*!< (@ 0x54010980) Cyclic Unit Control */ + __IO uint8_t DC_ACT; /*!< (@ 0x54010981) Activation register */ + __I uint16_t DC_PULSE_LEN; /*!< (@ 0x54010982) Pulse Length of SyncSignals */ + __I uint8_t DC_ACT_STAT; /*!< (@ 0x54010984) Activation Status */ + __I uint8_t RESERVED29[9]; + __I uint8_t DC_SYNC0_STAT; /*!< (@ 0x5401098E) SYNC0 Status */ + __I uint8_t DC_SYNC1_STAT; /*!< (@ 0x5401098F) SYNC1 Status */ + __IO uint32_t DC_CYC_START_TIME[2]; /*!< (@ 0x54010990) Start Time Cyclic Operation */ + __I uint32_t DC_NEXT_SYNC1_PULSE[2]; /*!< (@ 0x54010998) System time of next SYNC1 pulse in ns */ + __IO uint32_t DC_SYNC0_CYC_TIME; /*!< (@ 0x540109A0) SYNC0 Cycle Time */ + __IO uint32_t DC_SYNC1_CYC_TIME; /*!< (@ 0x540109A4) SYNC1 Cycle Time */ + __IO uint8_t DC_LATCH0_CONT; /*!< (@ 0x540109A8) Latch0 Control */ + __IO uint8_t DC_LATCH1_CONT; /*!< (@ 0x540109A9) Latch1 Control */ + __I uint32_t RESERVED30; + __I uint8_t DC_LATCH0_STAT; /*!< (@ 0x540109AE) Latch0 Status */ + __I uint8_t DC_LATCH1_STAT; /*!< (@ 0x540109AF) Latch1 Status */ + __I uint32_t DC_LATCH0_TIME_POS[2]; /*!< (@ 0x540109B0) Register captures System time at the positive + edge of the Latch0 signal */ + __I uint32_t DC_LATCH0_TIME_NEG[2]; /*!< (@ 0x540109B8) Register captures System time at the negative + edge of the Latch0 signal */ + __I uint32_t DC_LATCH1_TIME_POS[2]; /*!< (@ 0x540109C0) Register captures System time at the positive + edge of the Latch1 signal */ + __I uint32_t DC_LATCH1_TIME_NEG[2]; /*!< (@ 0x540109C8) Register captures System time at the negative + edge of the Latch1 signal */ + __I uint32_t RESERVED31[8]; + __I uint32_t DC_ECAT_CNG_EV_TIME; /*!< (@ 0x540109F0) EtherCAT Buffer Change Event Time */ + __I uint32_t RESERVED32; + __I uint32_t DC_PDI_START_EV_TIME; /*!< (@ 0x540109F8) PDI Buffer Start Event Time */ + __I uint32_t DC_PDI_CNG_EV_TIME; /*!< (@ 0x540109FC) PDI Buffer Change Event Time */ + __I uint32_t RESERVED33[256]; + __I uint32_t ID; /*!< (@ 0x54010E00) ECAT0 Module ID */ + __I uint32_t RESERVED34; + __I uint32_t STATUS; /*!< (@ 0x54010E08) ECAT0 Status */ +} ECAT_Type; + + +/* ================================================================================ */ +/* ================ ECAT0_FMMU [ECAT0_FMMU0] ================ */ +/* ================================================================================ */ + + +/** + * @brief EtherCAT 0 (ECAT0_FMMU) + */ + +typedef struct { /*!< (@ 0x54010600) ECAT0_FMMU Structure */ + __I uint32_t FMMU_L_START_ADR; /*!< (@ 0x54010600) Logical Start address FMMU */ + __I uint16_t FMMU_LEN; /*!< (@ 0x54010604) Length FMMU 0 */ + __I uint8_t FMMU_L_START_BIT; /*!< (@ 0x54010606) Start bit FMMU 0 in logical address space */ + __I uint8_t FMMU_L_STOP_BIT; /*!< (@ 0x54010607) Stop bit FMMU 0 in logical address space */ + __I uint16_t FMMU_P_START_ADR; /*!< (@ 0x54010608) Ph0sical Start address FMMU y */ + __I uint8_t FMMU_P_START_BIT; /*!< (@ 0x5401060A) Ph0sical Start bit FMMU y */ + __I uint8_t FMMU_TYPE; /*!< (@ 0x5401060B) T0pe FMMU y */ + __I uint8_t FMMU_ACT; /*!< (@ 0x5401060C) Activate FMMU 0 */ +} ECAT0_FMMU_Type; + + +/* ================================================================================ */ +/* ================ ECAT0_SM [ECAT0_SM0] ================ */ +/* ================================================================================ */ + + +/** + * @brief EtherCAT 0 (ECAT0_SM) + */ + +typedef struct { /*!< (@ 0x54010800) ECAT0_SM Structure */ + __I uint16_t SM_P_START_ADR; /*!< (@ 0x54010800) Physical Start Address SyncManager 0 */ + __I uint16_t SM_LEN; /*!< (@ 0x54010802) Length SyncManager 0 */ + __I uint8_t SM_CONTROL; /*!< (@ 0x54010804) Control Register SyncManager 0 */ + __I uint8_t SM_STATUS; /*!< (@ 0x54010805) Status Register SyncManager 0 */ + __I uint8_t SM_ACT; /*!< (@ 0x54010806) Activate SyncManager 0 */ + __IO uint8_t SM_PDI_CTR; /*!< (@ 0x54010807) PDI Control SyncManager 0 */ +} ECAT0_SM_Type; + + +/* ================================================================================ */ +/* ================ USB [USB0] ================ */ +/* ================================================================================ */ + + +/** + * @brief Universal Serial Bus (USB) + */ + +typedef struct { /*!< (@ 0x50040000) USB Structure */ + __IO uint32_t GOTGCTL; /*!< (@ 0x50040000) Control and Status Register */ + __IO uint32_t GOTGINT; /*!< (@ 0x50040004) OTG Interrupt Register */ + __IO uint32_t GAHBCFG; /*!< (@ 0x50040008) AHB Configuration Register */ + __IO uint32_t GUSBCFG; /*!< (@ 0x5004000C) USB Configuration Register */ + __IO uint32_t GRSTCTL; /*!< (@ 0x50040010) Reset Register */ + + union { + __IO uint32_t GINTSTS_DEVICEMODE; /*!< (@ 0x50040014) Interrupt Register [DEVICEMODE] */ + __IO uint32_t GINTSTS_HOSTMODE; /*!< (@ 0x50040014) Interrupt Register [HOSTMODE] */ + }; + + union { + __IO uint32_t GINTMSK_DEVICEMODE; /*!< (@ 0x50040018) Interrupt Mask Register [DEVICEMODE] */ + __IO uint32_t GINTMSK_HOSTMODE; /*!< (@ 0x50040018) Interrupt Mask Register [HOSTMODE] */ + }; + + union { + __I uint32_t GRXSTSR_DEVICEMODE; /*!< (@ 0x5004001C) Receive Status Debug Read Register [DEVICEMODE] */ + __I uint32_t GRXSTSR_HOSTMODE; /*!< (@ 0x5004001C) Receive Status Debug Read Register [HOSTMODE] */ + }; + + union { + __I uint32_t GRXSTSP_HOSTMODE; /*!< (@ 0x50040020) Receive Status Read and Pop Register [HOSTMODE] */ + __I uint32_t GRXSTSP_DEVICEMODE; /*!< (@ 0x50040020) Receive Status Read and Pop Register [DEVICEMODE] */ + }; + __IO uint32_t GRXFSIZ; /*!< (@ 0x50040024) Receive FIFO Size Register */ + + union { + __IO uint32_t GNPTXFSIZ_DEVICEMODE; /*!< (@ 0x50040028) Non-Periodic Transmit FIFO Size Register [DEVICEMODE] */ + __IO uint32_t GNPTXFSIZ_HOSTMODE; /*!< (@ 0x50040028) Non-Periodic Transmit FIFO Size Register [HOSTMODE] */ + }; + __I uint32_t GNPTXSTS; /*!< (@ 0x5004002C) Non-Periodic Transmit FIFO/Queue Status Register */ + __I uint32_t RESERVED[3]; + __IO uint32_t GUID; /*!< (@ 0x5004003C) USB Module Identification Register */ + __I uint32_t RESERVED1[7]; + __IO uint32_t GDFIFOCFG; /*!< (@ 0x5004005C) Global DFIFO Software Config Register */ + __I uint32_t RESERVED2[40]; + __IO uint32_t HPTXFSIZ; /*!< (@ 0x50040100) Host Periodic Transmit FIFO Size Register */ + __IO uint32_t DIEPTXF1; /*!< (@ 0x50040104) Device IN Endpoint Transmit FIFO Size Register */ + __IO uint32_t DIEPTXF2; /*!< (@ 0x50040108) Device IN Endpoint Transmit FIFO Size Register */ + __IO uint32_t DIEPTXF3; /*!< (@ 0x5004010C) Device IN Endpoint Transmit FIFO Size Register */ + __IO uint32_t DIEPTXF4; /*!< (@ 0x50040110) Device IN Endpoint Transmit FIFO Size Register */ + __IO uint32_t DIEPTXF5; /*!< (@ 0x50040114) Device IN Endpoint Transmit FIFO Size Register */ + __IO uint32_t DIEPTXF6; /*!< (@ 0x50040118) Device IN Endpoint Transmit FIFO Size Register */ + __I uint32_t RESERVED3[185]; + __IO uint32_t HCFG; /*!< (@ 0x50040400) Host Configuration Register */ + __IO uint32_t HFIR; /*!< (@ 0x50040404) Host Frame Interval Register */ + __IO uint32_t HFNUM; /*!< (@ 0x50040408) Host Frame Number/Frame Time Remaining Register */ + __I uint32_t RESERVED4; + __IO uint32_t HPTXSTS; /*!< (@ 0x50040410) Host Periodic Transmit FIFO/ Queue Status Register */ + __I uint32_t HAINT; /*!< (@ 0x50040414) Host All Channels Interrupt Register */ + __IO uint32_t HAINTMSK; /*!< (@ 0x50040418) Host All Channels Interrupt Mask Register */ + __IO uint32_t HFLBADDR; /*!< (@ 0x5004041C) Host Frame List Base Address Register */ + __I uint32_t RESERVED5[8]; + __IO uint32_t HPRT; /*!< (@ 0x50040440) Host Port Control and Status Register */ + __I uint32_t RESERVED6[239]; + __IO uint32_t DCFG; /*!< (@ 0x50040800) Device Configuration Register */ + __IO uint32_t DCTL; /*!< (@ 0x50040804) Device Control Register */ + __I uint32_t DSTS; /*!< (@ 0x50040808) Device Status Register */ + __I uint32_t RESERVED7; + __IO uint32_t DIEPMSK; /*!< (@ 0x50040810) Device IN Endpoint Common Interrupt Mask Register */ + __IO uint32_t DOEPMSK; /*!< (@ 0x50040814) Device OUT Endpoint Common Interrupt Mask Register */ + __I uint32_t DAINT; /*!< (@ 0x50040818) Device All Endpoints Interrupt Register */ + __IO uint32_t DAINTMSK; /*!< (@ 0x5004081C) Device All Endpoints Interrupt Mask Register */ + __I uint32_t RESERVED8[2]; + __IO uint32_t DVBUSDIS; /*!< (@ 0x50040828) Device VBUS Discharge Time Register */ + __IO uint32_t DVBUSPULSE; /*!< (@ 0x5004082C) Device VBUS Pulsing Time Register */ + __I uint32_t RESERVED9; + __IO uint32_t DIEPEMPMSK; /*!< (@ 0x50040834) Device IN Endpoint FIFO Empty Interrupt Mask + Register */ + __I uint32_t RESERVED10[370]; + __IO uint32_t PCGCCTL; /*!< (@ 0x50040E00) Power and Clock Gating Control Register */ +} USB0_GLOBAL_TypeDef; + + +/* ================================================================================ */ +/* ================ USB0_EP0 ================ */ +/* ================================================================================ */ + + +/** + * @brief Universal Serial Bus (USB0_EP0) + */ + +typedef struct { /*!< (@ 0x50040900) USB0_EP0 Structure */ + __IO uint32_t DIEPCTL0; /*!< (@ 0x50040900) Device Control IN Endpoint Control Register */ + __I uint32_t RESERVED; + __IO uint32_t DIEPINT0; /*!< (@ 0x50040908) Device Endpoint Interrupt Register */ + __I uint32_t RESERVED1; + __IO uint32_t DIEPTSIZ0; /*!< (@ 0x50040910) Device IN Endpoint Transfer Size Register */ + __IO uint32_t DIEPDMA0; /*!< (@ 0x50040914) Device Endpoint DMA Address Register */ + __I uint32_t DTXFSTS0; /*!< (@ 0x50040918) Device IN Endpoint Transmit FIFO Status Register */ + __I uint32_t DIEPDMAB0; /*!< (@ 0x5004091C) Device Endpoint DMA Buffer Address Register */ + __I uint32_t RESERVED2[120]; + __IO uint32_t DOEPCTL0; /*!< (@ 0x50040B00) Device Control OUT Endpoint Control Register */ + __I uint32_t RESERVED3; + __IO uint32_t DOEPINT0; /*!< (@ 0x50040B08) Device Endpoint Interrupt Register */ + __I uint32_t RESERVED4; + __IO uint32_t DOEPTSIZ0; /*!< (@ 0x50040B10) Device OUT Endpoint Transfer Size Register */ + __IO uint32_t DOEPDMA0; /*!< (@ 0x50040B14) Device Endpoint DMA Address Register */ + __I uint32_t RESERVED5; + __I uint32_t DOEPDMAB0; /*!< (@ 0x50040B1C) Device Endpoint DMA Buffer Address Register */ +} USB0_EP0_TypeDef; + + +/* ================================================================================ */ +/* ================ USB_EP [USB0_EP1] ================ */ +/* ================================================================================ */ + + +/** + * @brief Universal Serial Bus (USB_EP) + */ + +typedef struct { /*!< (@ 0x50040920) USB_EP Structure */ + + union { + __IO uint32_t DIEPCTL_INTBULK; /*!< (@ 0x50040920) Device Endpoint Control Register [INTBULK] */ + __IO uint32_t DIEPCTL_ISOCONT; /*!< (@ 0x50040920) Device Endpoint Control Register [ISOCONT] */ + }; + __I uint32_t RESERVED; + __IO uint32_t DIEPINT; /*!< (@ 0x50040928) Device Endpoint Interrupt Register */ + __I uint32_t RESERVED1; + __IO uint32_t DIEPTSIZ; /*!< (@ 0x50040930) Device Endpoint Transfer Size Register */ + __IO uint32_t DIEPDMA; /*!< (@ 0x50040934) Device Endpoint DMA Address Register */ + __I uint32_t DTXFSTS; /*!< (@ 0x50040938) Device IN Endpoint Transmit FIFO Status Register */ + __I uint32_t DIEPDMAB; /*!< (@ 0x5004093C) Device Endpoint DMA Buffer Address Register */ + __I uint32_t RESERVED2[120]; + + union { + __IO uint32_t DOEPCTL_INTBULK; /*!< (@ 0x50040B20) Device Endpoint Control Register [INTBULK] */ + __IO uint32_t DOEPCTL_ISOCONT; /*!< (@ 0x50040B20) Device Endpoint Control Register [ISOCONT] */ + }; + __I uint32_t RESERVED3; + __IO uint32_t DOEPINT; /*!< (@ 0x50040B28) Device Endpoint Interrupt Register */ + __I uint32_t RESERVED4; + + union { + __IO uint32_t DOEPTSIZ_CONTROL; /*!< (@ 0x50040B30) Device Endpoint Transfer Size Register [CONT] */ + __IO uint32_t DOEPTSIZ_ISO; /*!< (@ 0x50040B30) Device Endpoint Transfer Size Register [ISO] */ + }; + __IO uint32_t DOEPDMA; /*!< (@ 0x50040B34) Device Endpoint DMA Address Register */ + __I uint32_t RESERVED5; + __I uint32_t DOEPDMAB; /*!< (@ 0x50040B3C) Device Endpoint DMA Buffer Address Register */ +} USB0_EP_TypeDef; + + +/* ================================================================================ */ +/* ================ USB_CH [USB0_CH0] ================ */ +/* ================================================================================ */ + + +/** + * @brief Universal Serial Bus (USB_CH) + */ + +typedef struct { /*!< (@ 0x50040500) USB_CH Structure */ + __IO uint32_t HCCHAR; /*!< (@ 0x50040500) Host Channel Characteristics Register */ + __I uint32_t RESERVED; + __IO uint32_t HCINT; /*!< (@ 0x50040508) Host Channel Interrupt Register */ + __IO uint32_t HCINTMSK; /*!< (@ 0x5004050C) Host Channel Interrupt Mask Register */ + + union { + __IO uint32_t HCTSIZ_SCATGATHER; /*!< (@ 0x50040510) Host Channel Transfer Size Register [SCATGATHER] */ + __IO uint32_t HCTSIZ_BUFFERMODE; /*!< (@ 0x50040510) Host Channel Transfer Size Register [BUFFERMODE] */ + }; + + union { + __IO uint32_t HCDMA_SCATGATHER; /*!< (@ 0x50040514) Host Channel DMA Address Register [SCATGATHER] */ + __IO uint32_t HCDMA_BUFFERMODE; /*!< (@ 0x50040514) Host Channel DMA Address Register [BUFFERMODE] */ + }; + __I uint32_t RESERVED1; + __I uint32_t HCDMAB; /*!< (@ 0x5004051C) Host Channel DMA Buffer Address Register */ +} USB0_CH_TypeDef; + + +/* ================================================================================ */ +/* ================ USIC [USIC0] ================ */ +/* ================================================================================ */ + + +/** + * @brief Universal Serial Interface Controller 0 (USIC) + */ + +typedef struct { /*!< (@ 0x40030008) USIC Structure */ + __I uint32_t ID; /*!< (@ 0x40030008) Module Identification Register */ +} USIC_GLOBAL_TypeDef; + + +/* ================================================================================ */ +/* ================ USIC_CH [USIC0_CH0] ================ */ +/* ================================================================================ */ + + +/** + * @brief Universal Serial Interface Controller 0 (USIC_CH) + */ + +typedef struct { /*!< (@ 0x40030000) USIC_CH Structure */ + __I uint32_t RESERVED; + __I uint32_t CCFG; /*!< (@ 0x40030004) Channel Configuration Register */ + __I uint32_t RESERVED1; + __IO uint32_t KSCFG; /*!< (@ 0x4003000C) Kernel State Configuration Register */ + __IO uint32_t FDR; /*!< (@ 0x40030010) Fractional Divider Register */ + __IO uint32_t BRG; /*!< (@ 0x40030014) Baud Rate Generator Register */ + __IO uint32_t INPR; /*!< (@ 0x40030018) Interrupt Node Pointer Register */ + __IO uint32_t DX0CR; /*!< (@ 0x4003001C) Input Control Register 0 */ + __IO uint32_t DX1CR; /*!< (@ 0x40030020) Input Control Register 1 */ + __IO uint32_t DX2CR; /*!< (@ 0x40030024) Input Control Register 2 */ + __IO uint32_t DX3CR; /*!< (@ 0x40030028) Input Control Register 3 */ + __IO uint32_t DX4CR; /*!< (@ 0x4003002C) Input Control Register 4 */ + __IO uint32_t DX5CR; /*!< (@ 0x40030030) Input Control Register 5 */ + __IO uint32_t SCTR; /*!< (@ 0x40030034) Shift Control Register */ + __IO uint32_t TCSR; /*!< (@ 0x40030038) Transmit Control/Status Register */ + + union { + __IO uint32_t PCR_IICMode; /*!< (@ 0x4003003C) Protocol Control Register [IIC Mode] */ + __IO uint32_t PCR_IISMode; /*!< (@ 0x4003003C) Protocol Control Register [IIS Mode] */ + __IO uint32_t PCR_SSCMode; /*!< (@ 0x4003003C) Protocol Control Register [SSC Mode] */ + __IO uint32_t PCR; /*!< (@ 0x4003003C) Protocol Control Register */ + __IO uint32_t PCR_ASCMode; /*!< (@ 0x4003003C) Protocol Control Register [ASC Mode] */ + }; + __IO uint32_t CCR; /*!< (@ 0x40030040) Channel Control Register */ + __IO uint32_t CMTR; /*!< (@ 0x40030044) Capture Mode Timer Register */ + + union { + __IO uint32_t PSR_IICMode; /*!< (@ 0x40030048) Protocol Status Register [IIC Mode] */ + __IO uint32_t PSR_IISMode; /*!< (@ 0x40030048) Protocol Status Register [IIS Mode] */ + __IO uint32_t PSR_SSCMode; /*!< (@ 0x40030048) Protocol Status Register [SSC Mode] */ + __IO uint32_t PSR; /*!< (@ 0x40030048) Protocol Status Register */ + __IO uint32_t PSR_ASCMode; /*!< (@ 0x40030048) Protocol Status Register [ASC Mode] */ + }; + __O uint32_t PSCR; /*!< (@ 0x4003004C) Protocol Status Clear Register */ + __I uint32_t RBUFSR; /*!< (@ 0x40030050) Receiver Buffer Status Register */ + __I uint32_t RBUF; /*!< (@ 0x40030054) Receiver Buffer Register */ + __I uint32_t RBUFD; /*!< (@ 0x40030058) Receiver Buffer Register for Debugger */ + __I uint32_t RBUF0; /*!< (@ 0x4003005C) Receiver Buffer Register 0 */ + __I uint32_t RBUF1; /*!< (@ 0x40030060) Receiver Buffer Register 1 */ + __I uint32_t RBUF01SR; /*!< (@ 0x40030064) Receiver Buffer 01 Status Register */ + __O uint32_t FMR; /*!< (@ 0x40030068) Flag Modification Register */ + __I uint32_t RESERVED2[5]; + __IO uint32_t TBUF[32]; /*!< (@ 0x40030080) Transmit Buffer */ + __IO uint32_t BYP; /*!< (@ 0x40030100) Bypass Data Register */ + __IO uint32_t BYPCR; /*!< (@ 0x40030104) Bypass Control Register */ + __IO uint32_t TBCTR; /*!< (@ 0x40030108) Transmitter Buffer Control Register */ + __IO uint32_t RBCTR; /*!< (@ 0x4003010C) Receiver Buffer Control Register */ + __I uint32_t TRBPTR; /*!< (@ 0x40030110) Transmit/Receive Buffer Pointer Register */ + __IO uint32_t TRBSR; /*!< (@ 0x40030114) Transmit/Receive Buffer Status Register */ + __O uint32_t TRBSCR; /*!< (@ 0x40030118) Transmit/Receive Buffer Status Clear Register */ + __I uint32_t OUTR; /*!< (@ 0x4003011C) Receiver Buffer Output Register */ + __I uint32_t OUTDR; /*!< (@ 0x40030120) Receiver Buffer Output Register L for Debugger */ + __I uint32_t RESERVED3[23]; + __O uint32_t IN[32]; /*!< (@ 0x40030180) Transmit FIFO Buffer */ +} USIC_CH_TypeDef; + + +/* ================================================================================ */ +/* ================ CAN ================ */ +/* ================================================================================ */ + + +/** + * @brief Controller Area Networks (CAN) + */ + +typedef struct { /*!< (@ 0x48014000) CAN Structure */ + __IO uint32_t CLC; /*!< (@ 0x48014000) CAN Clock Control Register */ + __I uint32_t RESERVED; + __I uint32_t ID; /*!< (@ 0x48014008) Module Identification Register */ + __IO uint32_t FDR; /*!< (@ 0x4801400C) CAN Fractional Divider Register */ + __I uint32_t RESERVED1[60]; + __I uint32_t LIST[16]; /*!< (@ 0x48014100) List Register */ + __IO uint32_t MSPND[8]; /*!< (@ 0x48014140) Message Pending Register */ + __I uint32_t RESERVED2[8]; + __I uint32_t MSID[8]; /*!< (@ 0x48014180) Message Index Register */ + __I uint32_t RESERVED3[8]; + __IO uint32_t MSIMASK; /*!< (@ 0x480141C0) Message Index Mask Register */ + __IO uint32_t PANCTR; /*!< (@ 0x480141C4) Panel Control Register */ + __IO uint32_t MCR; /*!< (@ 0x480141C8) Module Control Register */ + __O uint32_t MITR; /*!< (@ 0x480141CC) Module Interrupt Trigger Register */ +} CAN_GLOBAL_TypeDef; + + +/* ================================================================================ */ +/* ================ CAN_NODE [CAN_NODE0] ================ */ +/* ================================================================================ */ + + +/** + * @brief Controller Area Networks (CAN_NODE) + */ + +typedef struct { /*!< (@ 0x48014200) CAN_NODE Structure */ + __IO uint32_t NCR; /*!< (@ 0x48014200) Node Control Register */ + __IO uint32_t NSR; /*!< (@ 0x48014204) Node Status Register */ + __IO uint32_t NIPR; /*!< (@ 0x48014208) Node Interrupt Pointer Register */ + __IO uint32_t NPCR; /*!< (@ 0x4801420C) Node Port Control Register */ + __IO uint32_t NBTR; /*!< (@ 0x48014210) Node Bit Timing Register */ + __IO uint32_t NECNT; /*!< (@ 0x48014214) Node Error Counter Register */ + __IO uint32_t NFCR; /*!< (@ 0x48014218) Node Frame Counter Register */ +} CAN_NODE_TypeDef; + + +/* ================================================================================ */ +/* ================ CAN_MO_CLUSTER [CAN_MO] ================ */ +/* ================================================================================ */ + + +/** + * @brief Controller Area Networks (CAN_MO_CLUSTER) + */ + +typedef struct { /*!< (@ 0x48015000) CAN_MO_CLUSTER Structure */ + CAN_MO_TypeDef MO[256]; /*!< (@ 0x48015000) Message Object Registers */ +} CAN_MO_CLUSTER_Type; + + +/* ================================================================================ */ +/* ================ VADC ================ */ +/* ================================================================================ */ + + +/** + * @brief Analog to Digital Converter (VADC) + */ + +typedef struct { /*!< (@ 0x40004000) VADC Structure */ + __IO uint32_t CLC; /*!< (@ 0x40004000) Clock Control Register */ + __I uint32_t RESERVED; + __I uint32_t ID; /*!< (@ 0x40004008) Module Identification Register */ + __I uint32_t RESERVED1[7]; + __IO uint32_t OCS; /*!< (@ 0x40004028) OCDS Control and Status Register */ + __I uint32_t RESERVED2[21]; + __IO uint32_t GLOBCFG; /*!< (@ 0x40004080) Global Configuration Register */ + __I uint32_t RESERVED3[7]; + __IO uint32_t GLOBICLASS[2]; /*!< (@ 0x400040A0) Input Class Register, Global */ + __I uint32_t RESERVED4[4]; + __IO uint32_t GLOBBOUND; /*!< (@ 0x400040B8) Global Boundary Select Register */ + __I uint32_t RESERVED5[9]; + __IO uint32_t GLOBEFLAG; /*!< (@ 0x400040E0) Global Event Flag Register */ + __I uint32_t RESERVED6[23]; + __IO uint32_t GLOBEVNP; /*!< (@ 0x40004140) Global Event Node Pointer Register */ + __I uint32_t RESERVED7[7]; + __IO uint32_t GLOBTF; /*!< (@ 0x40004160) Global Test Functions Register */ + __I uint32_t RESERVED8[7]; + __IO uint32_t BRSSEL[4]; /*!< (@ 0x40004180) Background Request Source Channel Select Register */ + __I uint32_t RESERVED9[12]; + __IO uint32_t BRSPND[4]; /*!< (@ 0x400041C0) Background Request Source Pending Register */ + __I uint32_t RESERVED10[12]; + __IO uint32_t BRSCTRL; /*!< (@ 0x40004200) Background Request Source Control Register */ + __IO uint32_t BRSMR; /*!< (@ 0x40004204) Background Request Source Mode Register */ + __I uint32_t RESERVED11[30]; + __IO uint32_t GLOBRCR; /*!< (@ 0x40004280) Global Result Control Register */ + __I uint32_t RESERVED12[31]; + __IO uint32_t GLOBRES; /*!< (@ 0x40004300) Global Result Register */ + __I uint32_t RESERVED13[31]; + __IO uint32_t GLOBRESD; /*!< (@ 0x40004380) Global Result Register, Debug */ + __I uint32_t RESERVED14[27]; + __IO uint32_t EMUXSEL; /*!< (@ 0x400043F0) External Multiplexer Select Register */ +} VADC_GLOBAL_TypeDef; + + +/* ================================================================================ */ +/* ================ VADC_G [VADC_G0] ================ */ +/* ================================================================================ */ + + +/** + * @brief Analog to Digital Converter (VADC_G) + */ + +typedef struct { /*!< (@ 0x40004400) VADC_G Structure */ + __I uint32_t RESERVED[32]; + __IO uint32_t ARBCFG; /*!< (@ 0x40004480) Arbitration Configuration Register */ + __IO uint32_t ARBPR; /*!< (@ 0x40004484) Arbitration Priority Register */ + __IO uint32_t CHASS; /*!< (@ 0x40004488) Channel Assignment Register */ + __I uint32_t RESERVED1[5]; + __IO uint32_t ICLASS[2]; /*!< (@ 0x400044A0) Input Class Register */ + __I uint32_t RESERVED2[2]; + __IO uint32_t ALIAS; /*!< (@ 0x400044B0) Alias Register */ + __I uint32_t RESERVED3; + __IO uint32_t BOUND; /*!< (@ 0x400044B8) Boundary Select Register */ + __I uint32_t RESERVED4; + __IO uint32_t SYNCTR; /*!< (@ 0x400044C0) Synchronization Control Register */ + __I uint32_t RESERVED5; + __IO uint32_t BFL; /*!< (@ 0x400044C8) Boundary Flag Register */ + __O uint32_t BFLS; /*!< (@ 0x400044CC) Boundary Flag Software Register */ + __IO uint32_t BFLC; /*!< (@ 0x400044D0) Boundary Flag Control Register */ + __IO uint32_t BFLNP; /*!< (@ 0x400044D4) Boundary Flag Node Pointer Register */ + __I uint32_t RESERVED6[10]; + __IO uint32_t QCTRL0; /*!< (@ 0x40004500) Queue 0 Source Control Register */ + __IO uint32_t QMR0; /*!< (@ 0x40004504) Queue 0 Mode Register */ + __I uint32_t QSR0; /*!< (@ 0x40004508) Queue 0 Status Register */ + __I uint32_t Q0R0; /*!< (@ 0x4000450C) Queue 0 Register 0 */ + + union { + __I uint32_t QBUR0; /*!< (@ 0x40004510) Queue 0 Backup Register */ + __O uint32_t QINR0; /*!< (@ 0x40004510) Queue 0 Input Register */ + }; + __I uint32_t RESERVED7[3]; + __IO uint32_t ASCTRL; /*!< (@ 0x40004520) Autoscan Source Control Register */ + __IO uint32_t ASMR; /*!< (@ 0x40004524) Autoscan Source Mode Register */ + __IO uint32_t ASSEL; /*!< (@ 0x40004528) Autoscan Source Channel Select Register */ + __IO uint32_t ASPND; /*!< (@ 0x4000452C) Autoscan Source Pending Register */ + __I uint32_t RESERVED8[20]; + __IO uint32_t CEFLAG; /*!< (@ 0x40004580) Channel Event Flag Register */ + __IO uint32_t REFLAG; /*!< (@ 0x40004584) Result Event Flag Register */ + __IO uint32_t SEFLAG; /*!< (@ 0x40004588) Source Event Flag Register */ + __I uint32_t RESERVED9; + __O uint32_t CEFCLR; /*!< (@ 0x40004590) Channel Event Flag Clear Register */ + __O uint32_t REFCLR; /*!< (@ 0x40004594) Result Event Flag Clear Register */ + __O uint32_t SEFCLR; /*!< (@ 0x40004598) Source Event Flag Clear Register */ + __I uint32_t RESERVED10; + __IO uint32_t CEVNP0; /*!< (@ 0x400045A0) Channel Event Node Pointer Register 0 */ + __I uint32_t RESERVED11[3]; + __IO uint32_t REVNP0; /*!< (@ 0x400045B0) Result Event Node Pointer Register 0 */ + __IO uint32_t REVNP1; /*!< (@ 0x400045B4) Result Event Node Pointer Register 1 */ + __I uint32_t RESERVED12[2]; + __IO uint32_t SEVNP; /*!< (@ 0x400045C0) Source Event Node Pointer Register */ + __I uint32_t RESERVED13; + __O uint32_t SRACT; /*!< (@ 0x400045C8) Service Request Software Activation Trigger */ + __I uint32_t RESERVED14[9]; + __IO uint32_t EMUXCTR; /*!< (@ 0x400045F0) E0ternal Multiplexer Control Register */ + __I uint32_t RESERVED15; + __IO uint32_t VFR; /*!< (@ 0x400045F8) Valid Flag Register */ + __I uint32_t RESERVED16; + __IO uint32_t CHCTR[8]; /*!< (@ 0x40004600) Channel Ctrl. Reg. */ + __I uint32_t RESERVED17[24]; + __IO uint32_t RCR[16]; /*!< (@ 0x40004680) Result Control Register */ + __I uint32_t RESERVED18[16]; + __IO uint32_t RES[16]; /*!< (@ 0x40004700) Result Register */ + __I uint32_t RESERVED19[16]; + __I uint32_t RESD[16]; /*!< (@ 0x40004780) Result Register, Debug */ +} VADC_G_TypeDef; + + +/* ================================================================================ */ +/* ================ DSD ================ */ +/* ================================================================================ */ + + +/** + * @brief Delta Sigma Demodulator (DSD) + */ + +typedef struct { /*!< (@ 0x40008000) DSD Structure */ + __IO uint32_t CLC; /*!< (@ 0x40008000) Clock Control Register */ + __I uint32_t RESERVED; + __I uint32_t ID; /*!< (@ 0x40008008) Module Identification Register */ + __I uint32_t RESERVED1[7]; + __IO uint32_t OCS; /*!< (@ 0x40008028) OCDS Control and Status Register */ + __I uint32_t RESERVED2[21]; + __IO uint32_t GLOBCFG; /*!< (@ 0x40008080) Global Configuration Register */ + __I uint32_t RESERVED3; + __IO uint32_t GLOBRC; /*!< (@ 0x40008088) Global Run Control Register */ + __I uint32_t RESERVED4[5]; + __IO uint32_t CGCFG; /*!< (@ 0x400080A0) Carrier Generator Configuration Register */ + __I uint32_t RESERVED5[15]; + __IO uint32_t EVFLAG; /*!< (@ 0x400080E0) Event Flag Register */ + __O uint32_t EVFLAGCLR; /*!< (@ 0x400080E4) Event Flag Clear Register */ +} DSD_GLOBAL_TypeDef; + + +/* ================================================================================ */ +/* ================ DSD_CH [DSD_CH0] ================ */ +/* ================================================================================ */ + + +/** + * @brief Delta Sigma Demodulator (DSD_CH) + */ + +typedef struct { /*!< (@ 0x40008100) DSD_CH Structure */ + __IO uint32_t MODCFG; /*!< (@ 0x40008100) Modulator Configuration Register */ + __I uint32_t RESERVED; + __IO uint32_t DICFG; /*!< (@ 0x40008108) Demodulator Input Configuration Register */ + __I uint32_t RESERVED1[2]; + __IO uint32_t FCFGC; /*!< (@ 0x40008114) Filter Configuration Register, Main CIC Filter */ + __IO uint32_t FCFGA; /*!< (@ 0x40008118) Filter Configuration Register, Auxiliary Filter */ + __I uint32_t RESERVED2; + __IO uint32_t IWCTR; /*!< (@ 0x40008120) Integration Window Control Register */ + __I uint32_t RESERVED3; + __IO uint32_t BOUNDSEL; /*!< (@ 0x40008128) Boundary Select Register */ + __I uint32_t RESERVED4; + __I uint32_t RESM; /*!< (@ 0x40008130) Result Register, Main Filter */ + __I uint32_t RESERVED5; + __IO uint32_t OFFM; /*!< (@ 0x40008138) Offset Register, Main Filter */ + __I uint32_t RESERVED6; + __I uint32_t RESA; /*!< (@ 0x40008140) Result Register, Auxiliary Filter */ + __I uint32_t RESERVED7[3]; + __I uint32_t TSTMP; /*!< (@ 0x40008150) Time-Stamp Register */ + __I uint32_t RESERVED8[19]; + __IO uint32_t CGSYNC; /*!< (@ 0x400081A0) Carrier Generator Synchronization Register */ + __I uint32_t RESERVED9; + __IO uint32_t RECTCFG; /*!< (@ 0x400081A8) Rectification Configuration Register */ +} DSD_CH_TypeDef; + + +/* ================================================================================ */ +/* ================ DAC ================ */ +/* ================================================================================ */ + + +/** + * @brief Digital to Analog Converter (DAC) + */ + +typedef struct { /*!< (@ 0x48018000) DAC Structure */ + __I uint32_t ID; /*!< (@ 0x48018000) Module Identification Register */ + __IO uint32_t DAC0CFG0; /*!< (@ 0x48018004) DAC0 Configuration Register 0 */ + __IO uint32_t DAC0CFG1; /*!< (@ 0x48018008) DAC0 Configuration Register 1 */ + __IO uint32_t DAC1CFG0; /*!< (@ 0x4801800C) DAC1 Configuration Register 0 */ + __IO uint32_t DAC1CFG1; /*!< (@ 0x48018010) DAC1 Configuration Register 1 */ + __IO uint32_t DAC0DATA; /*!< (@ 0x48018014) DAC0 Data Register */ + __IO uint32_t DAC1DATA; /*!< (@ 0x48018018) DAC1 Data Register */ + __IO uint32_t DAC01DATA; /*!< (@ 0x4801801C) DAC01 Data Register */ + __IO uint32_t DAC0PATL; /*!< (@ 0x48018020) DAC0 Lower Pattern Register */ + __IO uint32_t DAC0PATH; /*!< (@ 0x48018024) DAC0 Higher Pattern Register */ + __IO uint32_t DAC1PATL; /*!< (@ 0x48018028) DAC1 Lower Pattern Register */ + __IO uint32_t DAC1PATH; /*!< (@ 0x4801802C) DAC1 Higher Pattern Register */ +} DAC_GLOBAL_TypeDef; + + +/* ================================================================================ */ +/* ================ CCU4 [CCU40] ================ */ +/* ================================================================================ */ + + +/** + * @brief Capture Compare Unit 4 - Unit 0 (CCU4) + */ + +typedef struct { /*!< (@ 0x4000C000) CCU4 Structure */ + __IO uint32_t GCTRL; /*!< (@ 0x4000C000) Global Control Register */ + __I uint32_t GSTAT; /*!< (@ 0x4000C004) Global Status Register */ + __O uint32_t GIDLS; /*!< (@ 0x4000C008) Global Idle Set */ + __O uint32_t GIDLC; /*!< (@ 0x4000C00C) Global Idle Clear */ + __O uint32_t GCSS; /*!< (@ 0x4000C010) Global Channel Set */ + __O uint32_t GCSC; /*!< (@ 0x4000C014) Global Channel Clear */ + __I uint32_t GCST; /*!< (@ 0x4000C018) Global Channel Status */ + __I uint32_t RESERVED[25]; + __I uint32_t MIDR; /*!< (@ 0x4000C080) Module Identification */ +} CCU4_GLOBAL_TypeDef; + + +/* ================================================================================ */ +/* ================ CCU4_CC4 [CCU40_CC40] ================ */ +/* ================================================================================ */ + + +/** + * @brief Capture Compare Unit 4 - Unit 0 (CCU4_CC4) + */ + +typedef struct { /*!< (@ 0x4000C100) CCU4_CC4 Structure */ + __IO uint32_t INS; /*!< (@ 0x4000C100) Input Selector Configuration */ + __IO uint32_t CMC; /*!< (@ 0x4000C104) Connection Matrix Control */ + __I uint32_t TCST; /*!< (@ 0x4000C108) Slice Timer Status */ + __O uint32_t TCSET; /*!< (@ 0x4000C10C) Slice Timer Run Set */ + __O uint32_t TCCLR; /*!< (@ 0x4000C110) Slice Timer Clear */ + __IO uint32_t TC; /*!< (@ 0x4000C114) Slice Timer Control */ + __IO uint32_t PSL; /*!< (@ 0x4000C118) Passive Level Config */ + __I uint32_t DIT; /*!< (@ 0x4000C11C) Dither Config */ + __IO uint32_t DITS; /*!< (@ 0x4000C120) Dither Shadow Register */ + __IO uint32_t PSC; /*!< (@ 0x4000C124) Prescaler Control */ + __IO uint32_t FPC; /*!< (@ 0x4000C128) Floating Prescaler Control */ + __IO uint32_t FPCS; /*!< (@ 0x4000C12C) Floating Prescaler Shadow */ + __I uint32_t PR; /*!< (@ 0x4000C130) Timer Period Value */ + __IO uint32_t PRS; /*!< (@ 0x4000C134) Timer Shadow Period Value */ + __I uint32_t CR; /*!< (@ 0x4000C138) Timer Compare Value */ + __IO uint32_t CRS; /*!< (@ 0x4000C13C) Timer Shadow Compare Value */ + __I uint32_t RESERVED[12]; + __IO uint32_t TIMER; /*!< (@ 0x4000C170) Timer Value */ + __I uint32_t CV[4]; /*!< (@ 0x4000C174) Capture Register 0 */ + __I uint32_t RESERVED1[7]; + __I uint32_t INTS; /*!< (@ 0x4000C1A0) Interrupt Status */ + __IO uint32_t INTE; /*!< (@ 0x4000C1A4) Interrupt Enable Control */ + __IO uint32_t SRS; /*!< (@ 0x4000C1A8) Service Request Selector */ + __O uint32_t SWS; /*!< (@ 0x4000C1AC) Interrupt Status Set */ + __O uint32_t SWR; /*!< (@ 0x4000C1B0) Interrupt Status Clear */ + __I uint32_t RESERVED2; + __I uint32_t ECRD0; /*!< (@ 0x4000C1B8) Extended Read Back 0 */ + __I uint32_t ECRD1; /*!< (@ 0x4000C1BC) Extended Read Back 1 */ +} CCU4_CC4_TypeDef; + + +/* ================================================================================ */ +/* ================ CCU8 [CCU80] ================ */ +/* ================================================================================ */ + + +/** + * @brief Capture Compare Unit 8 - Unit 0 (CCU8) + */ + +typedef struct { /*!< (@ 0x40020000) CCU8 Structure */ + __IO uint32_t GCTRL; /*!< (@ 0x40020000) Global Control Register */ + __I uint32_t GSTAT; /*!< (@ 0x40020004) Global Status Register */ + __O uint32_t GIDLS; /*!< (@ 0x40020008) Global Idle Set */ + __O uint32_t GIDLC; /*!< (@ 0x4002000C) Global Idle Clear */ + __O uint32_t GCSS; /*!< (@ 0x40020010) Global Channel Set */ + __O uint32_t GCSC; /*!< (@ 0x40020014) Global Channel Clear */ + __I uint32_t GCST; /*!< (@ 0x40020018) Global Channel status */ + __IO uint32_t GPCHK; /*!< (@ 0x4002001C) Parity Checker Configuration */ + __I uint32_t RESERVED[24]; + __I uint32_t MIDR; /*!< (@ 0x40020080) Module Identification */ +} CCU8_GLOBAL_TypeDef; + + +/* ================================================================================ */ +/* ================ CCU8_CC8 [CCU80_CC80] ================ */ +/* ================================================================================ */ + + +/** + * @brief Capture Compare Unit 8 - Unit 0 (CCU8_CC8) + */ + +typedef struct { /*!< (@ 0x40020100) CCU8_CC8 Structure */ + __IO uint32_t INS; /*!< (@ 0x40020100) Input Selector Configuration */ + __IO uint32_t CMC; /*!< (@ 0x40020104) Connection Matrix Control */ + __I uint32_t TCST; /*!< (@ 0x40020108) Slice Timer Status */ + __O uint32_t TCSET; /*!< (@ 0x4002010C) Slice Timer Run Set */ + __O uint32_t TCCLR; /*!< (@ 0x40020110) Slice Timer Clear */ + __IO uint32_t TC; /*!< (@ 0x40020114) Slice Timer Control */ + __IO uint32_t PSL; /*!< (@ 0x40020118) Passive Level Config */ + __I uint32_t DIT; /*!< (@ 0x4002011C) Dither Config */ + __IO uint32_t DITS; /*!< (@ 0x40020120) Dither Shadow Register */ + __IO uint32_t PSC; /*!< (@ 0x40020124) Prescaler Control */ + __IO uint32_t FPC; /*!< (@ 0x40020128) Floating Prescaler Control */ + __IO uint32_t FPCS; /*!< (@ 0x4002012C) Floating Prescaler Shadow */ + __I uint32_t PR; /*!< (@ 0x40020130) Timer Period Value */ + __IO uint32_t PRS; /*!< (@ 0x40020134) Timer Shadow Period Value */ + __I uint32_t CR1; /*!< (@ 0x40020138) Channel 1 Compare Value */ + __IO uint32_t CR1S; /*!< (@ 0x4002013C) Channel 1 Compare Shadow Value */ + __I uint32_t CR2; /*!< (@ 0x40020140) Channel 2 Compare Value */ + __IO uint32_t CR2S; /*!< (@ 0x40020144) Channel 2 Compare Shadow Value */ + __IO uint32_t CHC; /*!< (@ 0x40020148) Channel Control */ + __IO uint32_t DTC; /*!< (@ 0x4002014C) Dead Time Control */ + __IO uint32_t DC1R; /*!< (@ 0x40020150) Channel 1 Dead Time Values */ + __IO uint32_t DC2R; /*!< (@ 0x40020154) Channel 2 Dead Time Values */ + __I uint32_t RESERVED[6]; + __IO uint32_t TIMER; /*!< (@ 0x40020170) Timer Value */ + __I uint32_t CV[4]; /*!< (@ 0x40020174) Capture Register 0 */ + __I uint32_t RESERVED1[7]; + __I uint32_t INTS; /*!< (@ 0x400201A0) Interrupt Status */ + __IO uint32_t INTE; /*!< (@ 0x400201A4) Interrupt Enable Control */ + __IO uint32_t SRS; /*!< (@ 0x400201A8) Service Request Selector */ + __O uint32_t SWS; /*!< (@ 0x400201AC) Interrupt Status Set */ + __O uint32_t SWR; /*!< (@ 0x400201B0) Interrupt Status Clear */ + __IO uint32_t STC; /*!< (@ 0x400201B4) Shadow transfer control */ + __I uint32_t ECRD0; /*!< (@ 0x400201B8) Extended Read Back 0 */ + __I uint32_t ECRD1; /*!< (@ 0x400201BC) Extended Read Back 1 */ +} CCU8_CC8_TypeDef; + + +/* ================================================================================ */ +/* ================ POSIF [POSIF0] ================ */ +/* ================================================================================ */ + + +/** + * @brief Position Interface 0 (POSIF) + */ + +typedef struct { /*!< (@ 0x40028000) POSIF Structure */ + __IO uint32_t PCONF; /*!< (@ 0x40028000) POSIF configuration */ + __IO uint32_t PSUS; /*!< (@ 0x40028004) POSIF Suspend Config */ + __O uint32_t PRUNS; /*!< (@ 0x40028008) POSIF Run Bit Set */ + __O uint32_t PRUNC; /*!< (@ 0x4002800C) POSIF Run Bit Clear */ + __I uint32_t PRUN; /*!< (@ 0x40028010) POSIF Run Bit Status */ + __I uint32_t RESERVED[3]; + __I uint32_t MIDR; /*!< (@ 0x40028020) Module Identification register */ + __I uint32_t RESERVED1[3]; + __I uint32_t HALP; /*!< (@ 0x40028030) Hall Sensor Patterns */ + __IO uint32_t HALPS; /*!< (@ 0x40028034) Hall Sensor Shadow Patterns */ + __I uint32_t RESERVED2[2]; + __I uint32_t MCM; /*!< (@ 0x40028040) Multi-Channel Pattern */ + __IO uint32_t MCSM; /*!< (@ 0x40028044) Multi-Channel Shadow Pattern */ + __O uint32_t MCMS; /*!< (@ 0x40028048) Multi-Channel Pattern Control set */ + __O uint32_t MCMC; /*!< (@ 0x4002804C) Multi-Channel Pattern Control clear */ + __I uint32_t MCMF; /*!< (@ 0x40028050) Multi-Channel Pattern Control flag */ + __I uint32_t RESERVED3[3]; + __IO uint32_t QDC; /*!< (@ 0x40028060) Quadrature Decoder Control */ + __I uint32_t RESERVED4[3]; + __I uint32_t PFLG; /*!< (@ 0x40028070) POSIF Interrupt Flags */ + __IO uint32_t PFLGE; /*!< (@ 0x40028074) POSIF Interrupt Enable */ + __O uint32_t SPFLG; /*!< (@ 0x40028078) POSIF Interrupt Set */ + __O uint32_t RPFLG; /*!< (@ 0x4002807C) POSIF Interrupt Clear */ + __I uint32_t RESERVED5[32]; + __I uint32_t PDBG; /*!< (@ 0x40028100) POSIF Debug register */ +} POSIF_GLOBAL_TypeDef; + + +/* ================================================================================ */ +/* ================ PORT0 ================ */ +/* ================================================================================ */ + + +/** + * @brief Port 0 (PORT0) + */ + +typedef struct { /*!< (@ 0x48028000) PORT0 Structure */ + __IO uint32_t OUT; /*!< (@ 0x48028000) Port 0 Output Register */ + __O uint32_t OMR; /*!< (@ 0x48028004) Port 0 Output Modification Register */ + __I uint32_t RESERVED[2]; + __IO uint32_t IOCR0; /*!< (@ 0x48028010) Port 0 Input/Output Control Register 0 */ + __IO uint32_t IOCR4; /*!< (@ 0x48028014) Port 0 Input/Output Control Register 4 */ + __IO uint32_t IOCR8; /*!< (@ 0x48028018) Port 0 Input/Output Control Register 8 */ + __IO uint32_t IOCR12; /*!< (@ 0x4802801C) Port 0 Input/Output Control Register 12 */ + __I uint32_t RESERVED1; + __I uint32_t IN; /*!< (@ 0x48028024) Port 0 Input Register */ + __I uint32_t RESERVED2[6]; + __IO uint32_t PDR0; /*!< (@ 0x48028040) Port 0 Pad Driver Mode 0 Register */ + __IO uint32_t PDR1; /*!< (@ 0x48028044) Port 0 Pad Driver Mode 1 Register */ + __I uint32_t RESERVED3[6]; + __I uint32_t PDISC; /*!< (@ 0x48028060) Port 0 Pin Function Decision Control Register */ + __I uint32_t RESERVED4[3]; + __IO uint32_t PPS; /*!< (@ 0x48028070) Port 0 Pin Power Save Register */ + __IO uint32_t HWSEL; /*!< (@ 0x48028074) Port 0 Pin Hardware Select Register */ +} PORT0_Type; + + +/* ================================================================================ */ +/* ================ PORT1 ================ */ +/* ================================================================================ */ + + +/** + * @brief Port 1 (PORT1) + */ + +typedef struct { /*!< (@ 0x48028100) PORT1 Structure */ + __IO uint32_t OUT; /*!< (@ 0x48028100) Port 1 Output Register */ + __O uint32_t OMR; /*!< (@ 0x48028104) Port 1 Output Modification Register */ + __I uint32_t RESERVED[2]; + __IO uint32_t IOCR0; /*!< (@ 0x48028110) Port 1 Input/Output Control Register 0 */ + __IO uint32_t IOCR4; /*!< (@ 0x48028114) Port 1 Input/Output Control Register 4 */ + __IO uint32_t IOCR8; /*!< (@ 0x48028118) Port 1 Input/Output Control Register 8 */ + __IO uint32_t IOCR12; /*!< (@ 0x4802811C) Port 1 Input/Output Control Register 12 */ + __I uint32_t RESERVED1; + __I uint32_t IN; /*!< (@ 0x48028124) Port 1 Input Register */ + __I uint32_t RESERVED2[6]; + __IO uint32_t PDR0; /*!< (@ 0x48028140) Port 1 Pad Driver Mode 0 Register */ + __IO uint32_t PDR1; /*!< (@ 0x48028144) Port 1 Pad Driver Mode 1 Register */ + __I uint32_t RESERVED3[6]; + __I uint32_t PDISC; /*!< (@ 0x48028160) Port 1 Pin Function Decision Control Register */ + __I uint32_t RESERVED4[3]; + __IO uint32_t PPS; /*!< (@ 0x48028170) Port 1 Pin Power Save Register */ + __IO uint32_t HWSEL; /*!< (@ 0x48028174) Port 1 Pin Hardware Select Register */ +} PORT1_Type; + + +/* ================================================================================ */ +/* ================ PORT2 ================ */ +/* ================================================================================ */ + + +/** + * @brief Port 2 (PORT2) + */ + +typedef struct { /*!< (@ 0x48028200) PORT2 Structure */ + __IO uint32_t OUT; /*!< (@ 0x48028200) Port 2 Output Register */ + __O uint32_t OMR; /*!< (@ 0x48028204) Port 2 Output Modification Register */ + __I uint32_t RESERVED[2]; + __IO uint32_t IOCR0; /*!< (@ 0x48028210) Port 2 Input/Output Control Register 0 */ + __IO uint32_t IOCR4; /*!< (@ 0x48028214) Port 2 Input/Output Control Register 4 */ + __IO uint32_t IOCR8; /*!< (@ 0x48028218) Port 2 Input/Output Control Register 8 */ + __IO uint32_t IOCR12; /*!< (@ 0x4802821C) Port 2 Input/Output Control Register 12 */ + __I uint32_t RESERVED1; + __I uint32_t IN; /*!< (@ 0x48028224) Port 2 Input Register */ + __I uint32_t RESERVED2[6]; + __IO uint32_t PDR0; /*!< (@ 0x48028240) Port 2 Pad Driver Mode 0 Register */ + __IO uint32_t PDR1; /*!< (@ 0x48028244) Port 2 Pad Driver Mode 1 Register */ + __I uint32_t RESERVED3[6]; + __I uint32_t PDISC; /*!< (@ 0x48028260) Port 2 Pin Function Decision Control Register */ + __I uint32_t RESERVED4[3]; + __IO uint32_t PPS; /*!< (@ 0x48028270) Port 2 Pin Power Save Register */ + __IO uint32_t HWSEL; /*!< (@ 0x48028274) Port 2 Pin Hardware Select Register */ +} PORT2_Type; + + +/* ================================================================================ */ +/* ================ PORT3 ================ */ +/* ================================================================================ */ + + +/** + * @brief Port 3 (PORT3) + */ + +typedef struct { /*!< (@ 0x48028300) PORT3 Structure */ + __IO uint32_t OUT; /*!< (@ 0x48028300) Port 3 Output Register */ + __O uint32_t OMR; /*!< (@ 0x48028304) Port 3 Output Modification Register */ + __I uint32_t RESERVED[2]; + __IO uint32_t IOCR0; /*!< (@ 0x48028310) Port 3 Input/Output Control Register 0 */ + __IO uint32_t IOCR4; /*!< (@ 0x48028314) Port 3 Input/Output Control Register 4 */ + __IO uint32_t IOCR8; /*!< (@ 0x48028318) Port 3 Input/Output Control Register 8 */ + __IO uint32_t IOCR12; /*!< (@ 0x4802831C) Port 3 Input/Output Control Register 12 */ + __I uint32_t RESERVED1; + __I uint32_t IN; /*!< (@ 0x48028324) Port 3 Input Register */ + __I uint32_t RESERVED2[6]; + __IO uint32_t PDR0; /*!< (@ 0x48028340) Port 3 Pad Driver Mode 0 Register */ + __IO uint32_t PDR1; /*!< (@ 0x48028344) Port 3 Pad Driver Mode 1 Register */ + __I uint32_t RESERVED3[6]; + __I uint32_t PDISC; /*!< (@ 0x48028360) Port 3 Pin Function Decision Control Register */ + __I uint32_t RESERVED4[3]; + __IO uint32_t PPS; /*!< (@ 0x48028370) Port 3 Pin Power Save Register */ + __IO uint32_t HWSEL; /*!< (@ 0x48028374) Port 3 Pin Hardware Select Register */ +} PORT3_Type; + + +/* ================================================================================ */ +/* ================ PORT4 ================ */ +/* ================================================================================ */ + + +/** + * @brief Port 4 (PORT4) + */ + +typedef struct { /*!< (@ 0x48028400) PORT4 Structure */ + __IO uint32_t OUT; /*!< (@ 0x48028400) Port 4 Output Register */ + __O uint32_t OMR; /*!< (@ 0x48028404) Port 4 Output Modification Register */ + __I uint32_t RESERVED[2]; + __IO uint32_t IOCR0; /*!< (@ 0x48028410) Port 4 Input/Output Control Register 0 */ + __IO uint32_t IOCR4; /*!< (@ 0x48028414) Port 4 Input/Output Control Register 4 */ + __I uint32_t RESERVED1[3]; + __I uint32_t IN; /*!< (@ 0x48028424) Port 4 Input Register */ + __I uint32_t RESERVED2[6]; + __IO uint32_t PDR0; /*!< (@ 0x48028440) Port 4 Pad Driver Mode 0 Register */ + __I uint32_t RESERVED3[7]; + __I uint32_t PDISC; /*!< (@ 0x48028460) Port 4 Pin Function Decision Control Register */ + __I uint32_t RESERVED4[3]; + __IO uint32_t PPS; /*!< (@ 0x48028470) Port 4 Pin Power Save Register */ + __IO uint32_t HWSEL; /*!< (@ 0x48028474) Port 4 Pin Hardware Select Register */ +} PORT4_Type; + + +/* ================================================================================ */ +/* ================ PORT5 ================ */ +/* ================================================================================ */ + + +/** + * @brief Port 5 (PORT5) + */ + +typedef struct { /*!< (@ 0x48028500) PORT5 Structure */ + __IO uint32_t OUT; /*!< (@ 0x48028500) Port 5 Output Register */ + __O uint32_t OMR; /*!< (@ 0x48028504) Port 5 Output Modification Register */ + __I uint32_t RESERVED[2]; + __IO uint32_t IOCR0; /*!< (@ 0x48028510) Port 5 Input/Output Control Register 0 */ + __IO uint32_t IOCR4; /*!< (@ 0x48028514) Port 5 Input/Output Control Register 4 */ + __IO uint32_t IOCR8; /*!< (@ 0x48028518) Port 5 Input/Output Control Register 8 */ + __I uint32_t RESERVED1[2]; + __I uint32_t IN; /*!< (@ 0x48028524) Port 5 Input Register */ + __I uint32_t RESERVED2[6]; + __IO uint32_t PDR0; /*!< (@ 0x48028540) Port 5 Pad Driver Mode 0 Register */ + __IO uint32_t PDR1; /*!< (@ 0x48028544) Port 5 Pad Driver Mode 1 Register */ + __I uint32_t RESERVED3[6]; + __I uint32_t PDISC; /*!< (@ 0x48028560) Port 5 Pin Function Decision Control Register */ + __I uint32_t RESERVED4[3]; + __IO uint32_t PPS; /*!< (@ 0x48028570) Port 5 Pin Power Save Register */ + __IO uint32_t HWSEL; /*!< (@ 0x48028574) Port 5 Pin Hardware Select Register */ +} PORT5_Type; + + +/* ================================================================================ */ +/* ================ PORT6 ================ */ +/* ================================================================================ */ + + +/** + * @brief Port 6 (PORT6) + */ + +typedef struct { /*!< (@ 0x48028600) PORT6 Structure */ + __IO uint32_t OUT; /*!< (@ 0x48028600) Port 6 Output Register */ + __O uint32_t OMR; /*!< (@ 0x48028604) Port 6 Output Modification Register */ + __I uint32_t RESERVED[2]; + __IO uint32_t IOCR0; /*!< (@ 0x48028610) Port 6 Input/Output Control Register 0 */ + __IO uint32_t IOCR4; /*!< (@ 0x48028614) Port 6 Input/Output Control Register 4 */ + __I uint32_t RESERVED1[3]; + __I uint32_t IN; /*!< (@ 0x48028624) Port 6 Input Register */ + __I uint32_t RESERVED2[6]; + __IO uint32_t PDR0; /*!< (@ 0x48028640) Port 6 Pad Driver Mode 0 Register */ + __I uint32_t RESERVED3[7]; + __I uint32_t PDISC; /*!< (@ 0x48028660) Port 6 Pin Function Decision Control Register */ + __I uint32_t RESERVED4[3]; + __IO uint32_t PPS; /*!< (@ 0x48028670) Port 6 Pin Power Save Register */ + __IO uint32_t HWSEL; /*!< (@ 0x48028674) Port 6 Pin Hardware Select Register */ +} PORT6_Type; + + +/* ================================================================================ */ +/* ================ PORT7 ================ */ +/* ================================================================================ */ + + +/** + * @brief Port 7 (PORT7) + */ + +typedef struct { /*!< (@ 0x48028700) PORT7 Structure */ + __IO uint32_t OUT; /*!< (@ 0x48028700) Port 7 Output Register */ + __O uint32_t OMR; /*!< (@ 0x48028704) Port 7 Output Modification Register */ + __I uint32_t RESERVED[2]; + __IO uint32_t IOCR0; /*!< (@ 0x48028710) Port 7 Input/Output Control Register 0 */ + __IO uint32_t IOCR4; /*!< (@ 0x48028714) Port 7 Input/Output Control Register 4 */ + __IO uint32_t IOCR8; /*!< (@ 0x48028718) Port 7 Input/Output Control Register 8 */ + __I uint32_t RESERVED1[2]; + __I uint32_t IN; /*!< (@ 0x48028724) Port 7 Input Register */ + __I uint32_t RESERVED2[6]; + __IO uint32_t PDR0; /*!< (@ 0x48028740) Port 7 Pad Driver Mode 0 Register */ + __IO uint32_t PDR1; /*!< (@ 0x48028744) Port 7 Pad Driver Mode 1 Register */ + __I uint32_t RESERVED3[6]; + __I uint32_t PDISC; /*!< (@ 0x48028760) Port 7 Pin Function Decision Control Register */ + __I uint32_t RESERVED4[3]; + __IO uint32_t PPS; /*!< (@ 0x48028770) Port 7 Pin Power Save Register */ + __IO uint32_t HWSEL; /*!< (@ 0x48028774) Port 7 Pin Hardware Select Register */ +} PORT7_Type; + + +/* ================================================================================ */ +/* ================ PORT8 ================ */ +/* ================================================================================ */ + + +/** + * @brief Port 8 (PORT8) + */ + +typedef struct { /*!< (@ 0x48028800) PORT8 Structure */ + __IO uint32_t OUT; /*!< (@ 0x48028800) Port 8 Output Register */ + __O uint32_t OMR; /*!< (@ 0x48028804) Port 8 Output Modification Register */ + __I uint32_t RESERVED[2]; + __IO uint32_t IOCR0; /*!< (@ 0x48028810) Port 8 Input/Output Control Register 0 */ + __IO uint32_t IOCR4; /*!< (@ 0x48028814) Port 8 Input/Output Control Register 4 */ + __IO uint32_t IOCR8; /*!< (@ 0x48028818) Port 8 Input/Output Control Register 8 */ + __I uint32_t RESERVED1[2]; + __I uint32_t IN; /*!< (@ 0x48028824) Port 8 Input Register */ + __I uint32_t RESERVED2[6]; + __IO uint32_t PDR0; /*!< (@ 0x48028840) Port 8 Pad Driver Mode 0 Register */ + __IO uint32_t PDR1; /*!< (@ 0x48028844) Port 8 Pad Driver Mode 1 Register */ + __I uint32_t RESERVED3[6]; + __I uint32_t PDISC; /*!< (@ 0x48028860) Port 8 Pin Function Decision Control Register */ + __I uint32_t RESERVED4[3]; + __IO uint32_t PPS; /*!< (@ 0x48028870) Port 8 Pin Power Save Register */ + __IO uint32_t HWSEL; /*!< (@ 0x48028874) Port 8 Pin Hardware Select Register */ +} PORT8_Type; + + +/* ================================================================================ */ +/* ================ PORT9 ================ */ +/* ================================================================================ */ + + +/** + * @brief Port 9 (PORT9) + */ + +typedef struct { /*!< (@ 0x48028900) PORT9 Structure */ + __IO uint32_t OUT; /*!< (@ 0x48028900) Port 9 Output Register */ + __O uint32_t OMR; /*!< (@ 0x48028904) Port 9 Output Modification Register */ + __I uint32_t RESERVED[2]; + __IO uint32_t IOCR0; /*!< (@ 0x48028910) Port 9 Input/Output Control Register 0 */ + __IO uint32_t IOCR4; /*!< (@ 0x48028914) Port 5 Input/Output Control Register 4 */ + __IO uint32_t IOCR8; /*!< (@ 0x48028918) Port 9 Input/Output Control Register 8 */ + __I uint32_t RESERVED1[2]; + __I uint32_t IN; /*!< (@ 0x48028924) Port 9 Input Register */ + __I uint32_t RESERVED2[6]; + __IO uint32_t PDR0; /*!< (@ 0x48028940) Port 9 Pad Driver Mode 0 Register */ + __IO uint32_t PDR1; /*!< (@ 0x48028944) Port 9 Pad Driver Mode 1 Register */ + __I uint32_t RESERVED3[6]; + __I uint32_t PDISC; /*!< (@ 0x48028960) Port 9 Pin Function Decision Control Register */ + __I uint32_t RESERVED4[3]; + __IO uint32_t PPS; /*!< (@ 0x48028970) Port 9 Pin Power Save Register */ + __IO uint32_t HWSEL; /*!< (@ 0x48028974) Port 9 Pin Hardware Select Register */ +} PORT9_Type; + + +/* ================================================================================ */ +/* ================ PORT14 ================ */ +/* ================================================================================ */ + + +/** + * @brief Port 14 (PORT14) + */ + +typedef struct { /*!< (@ 0x48028E00) PORT14 Structure */ + __IO uint32_t OUT; /*!< (@ 0x48028E00) Port 14 Output Register */ + __O uint32_t OMR; /*!< (@ 0x48028E04) Port 14 Output Modification Register */ + __I uint32_t RESERVED[2]; + __IO uint32_t IOCR0; /*!< (@ 0x48028E10) Port 14 Input/Output Control Register 0 */ + __IO uint32_t IOCR4; /*!< (@ 0x48028E14) Port 14 Input/Output Control Register 4 */ + __IO uint32_t IOCR8; /*!< (@ 0x48028E18) Port 14 Input/Output Control Register 8 */ + __IO uint32_t IOCR12; /*!< (@ 0x48028E1C) Port 14 Input/Output Control Register 12 */ + __I uint32_t RESERVED1; + __I uint32_t IN; /*!< (@ 0x48028E24) Port 14 Input Register */ + __I uint32_t RESERVED2[14]; + __IO uint32_t PDISC; /*!< (@ 0x48028E60) Port 14 Pin Function Decision Control Register */ + __I uint32_t RESERVED3[3]; + __IO uint32_t PPS; /*!< (@ 0x48028E70) Port 14 Pin Power Save Register */ + __IO uint32_t HWSEL; /*!< (@ 0x48028E74) Port 14 Pin Hardware Select Register */ +} PORT14_Type; + + +/* ================================================================================ */ +/* ================ PORT15 ================ */ +/* ================================================================================ */ + + +/** + * @brief Port 15 (PORT15) + */ + +typedef struct { /*!< (@ 0x48028F00) PORT15 Structure */ + __IO uint32_t OUT; /*!< (@ 0x48028F00) Port 15 Output Register */ + __O uint32_t OMR; /*!< (@ 0x48028F04) Port 15 Output Modification Register */ + __I uint32_t RESERVED[2]; + __IO uint32_t IOCR0; /*!< (@ 0x48028F10) Port 15 Input/Output Control Register 0 */ + __IO uint32_t IOCR4; /*!< (@ 0x48028F14) Port 15 Input/Output Control Register 4 */ + __IO uint32_t IOCR8; /*!< (@ 0x48028F18) Port 15 Input/Output Control Register 8 */ + __IO uint32_t IOCR12; /*!< (@ 0x48028F1C) Port 15 Input/Output Control Register 12 */ + __I uint32_t RESERVED1; + __I uint32_t IN; /*!< (@ 0x48028F24) Port 15 Input Register */ + __I uint32_t RESERVED2[14]; + __IO uint32_t PDISC; /*!< (@ 0x48028F60) Port 15 Pin Function Decision Control Register */ + __I uint32_t RESERVED3[3]; + __IO uint32_t PPS; /*!< (@ 0x48028F70) Port 15 Pin Power Save Register */ + __IO uint32_t HWSEL; /*!< (@ 0x48028F74) Port 15 Pin Hardware Select Register */ +} PORT15_Type; + + +/* -------------------- End of section using anonymous unions ------------------- */ +#if defined(__CC_ARM) + #pragma pop +#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #pragma clang diagnostic pop +#elif defined(__ICCARM__) + /* leave anonymous unions enabled */ +#elif defined(__GNUC__) + /* anonymous unions are enabled by default */ +#elif defined(__TMS470__) + /* anonymous unions are enabled by default */ +#elif defined(__TASKING__) + #pragma warning restore +#else + #warning Not supported compiler type +#endif + + + +/* ================================================================================ */ +/* ================ struct 'PPB' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ---------------------------------- PPB_ACTLR --------------------------------- */ +#define PPB_ACTLR_DISMCYCINT_Pos (0UL) /*!< PPB ACTLR: DISMCYCINT (Bit 0) */ +#define PPB_ACTLR_DISMCYCINT_Msk (0x1UL) /*!< PPB ACTLR: DISMCYCINT (Bitfield-Mask: 0x01) */ +#define PPB_ACTLR_DISDEFWBUF_Pos (1UL) /*!< PPB ACTLR: DISDEFWBUF (Bit 1) */ +#define PPB_ACTLR_DISDEFWBUF_Msk (0x2UL) /*!< PPB ACTLR: DISDEFWBUF (Bitfield-Mask: 0x01) */ +#define PPB_ACTLR_DISFOLD_Pos (2UL) /*!< PPB ACTLR: DISFOLD (Bit 2) */ +#define PPB_ACTLR_DISFOLD_Msk (0x4UL) /*!< PPB ACTLR: DISFOLD (Bitfield-Mask: 0x01) */ +#define PPB_ACTLR_DISFPCA_Pos (8UL) /*!< PPB ACTLR: DISFPCA (Bit 8) */ +#define PPB_ACTLR_DISFPCA_Msk (0x100UL) /*!< PPB ACTLR: DISFPCA (Bitfield-Mask: 0x01) */ +#define PPB_ACTLR_DISOOFP_Pos (9UL) /*!< PPB ACTLR: DISOOFP (Bit 9) */ +#define PPB_ACTLR_DISOOFP_Msk (0x200UL) /*!< PPB ACTLR: DISOOFP (Bitfield-Mask: 0x01) */ + +/* -------------------------------- PPB_SYST_CSR -------------------------------- */ +#define PPB_SYST_CSR_ENABLE_Pos (0UL) /*!< PPB SYST_CSR: ENABLE (Bit 0) */ +#define PPB_SYST_CSR_ENABLE_Msk (0x1UL) /*!< PPB SYST_CSR: ENABLE (Bitfield-Mask: 0x01) */ +#define PPB_SYST_CSR_TICKINT_Pos (1UL) /*!< PPB SYST_CSR: TICKINT (Bit 1) */ +#define PPB_SYST_CSR_TICKINT_Msk (0x2UL) /*!< PPB SYST_CSR: TICKINT (Bitfield-Mask: 0x01) */ +#define PPB_SYST_CSR_CLKSOURCE_Pos (2UL) /*!< PPB SYST_CSR: CLKSOURCE (Bit 2) */ +#define PPB_SYST_CSR_CLKSOURCE_Msk (0x4UL) /*!< PPB SYST_CSR: CLKSOURCE (Bitfield-Mask: 0x01) */ +#define PPB_SYST_CSR_COUNTFLAG_Pos (16UL) /*!< PPB SYST_CSR: COUNTFLAG (Bit 16) */ +#define PPB_SYST_CSR_COUNTFLAG_Msk (0x10000UL) /*!< PPB SYST_CSR: COUNTFLAG (Bitfield-Mask: 0x01) */ + +/* -------------------------------- PPB_SYST_RVR -------------------------------- */ +#define PPB_SYST_RVR_RELOAD_Pos (0UL) /*!< PPB SYST_RVR: RELOAD (Bit 0) */ +#define PPB_SYST_RVR_RELOAD_Msk (0xffffffUL) /*!< PPB SYST_RVR: RELOAD (Bitfield-Mask: 0xffffff) */ + +/* -------------------------------- PPB_SYST_CVR -------------------------------- */ +#define PPB_SYST_CVR_CURRENT_Pos (0UL) /*!< PPB SYST_CVR: CURRENT (Bit 0) */ +#define PPB_SYST_CVR_CURRENT_Msk (0xffffffUL) /*!< PPB SYST_CVR: CURRENT (Bitfield-Mask: 0xffffff) */ + +/* ------------------------------- PPB_SYST_CALIB ------------------------------- */ +#define PPB_SYST_CALIB_TENMS_Pos (0UL) /*!< PPB SYST_CALIB: TENMS (Bit 0) */ +#define PPB_SYST_CALIB_TENMS_Msk (0xffffffUL) /*!< PPB SYST_CALIB: TENMS (Bitfield-Mask: 0xffffff) */ +#define PPB_SYST_CALIB_SKEW_Pos (30UL) /*!< PPB SYST_CALIB: SKEW (Bit 30) */ +#define PPB_SYST_CALIB_SKEW_Msk (0x40000000UL) /*!< PPB SYST_CALIB: SKEW (Bitfield-Mask: 0x01) */ +#define PPB_SYST_CALIB_NOREF_Pos (31UL) /*!< PPB SYST_CALIB: NOREF (Bit 31) */ +#define PPB_SYST_CALIB_NOREF_Msk (0x80000000UL) /*!< PPB SYST_CALIB: NOREF (Bitfield-Mask: 0x01) */ + +/* ------------------------------- PPB_NVIC_ISER0 ------------------------------- */ +#define PPB_NVIC_ISER0_SETENA_Pos (0UL) /*!< PPB NVIC_ISER0: SETENA (Bit 0) */ +#define PPB_NVIC_ISER0_SETENA_Msk (0xffffffffUL) /*!< PPB NVIC_ISER0: SETENA (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------------- PPB_NVIC_ISER1 ------------------------------- */ +#define PPB_NVIC_ISER1_SETENA_Pos (0UL) /*!< PPB NVIC_ISER1: SETENA (Bit 0) */ +#define PPB_NVIC_ISER1_SETENA_Msk (0xffffffffUL) /*!< PPB NVIC_ISER1: SETENA (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------------- PPB_NVIC_ISER2 ------------------------------- */ +#define PPB_NVIC_ISER2_SETENA_Pos (0UL) /*!< PPB NVIC_ISER2: SETENA (Bit 0) */ +#define PPB_NVIC_ISER2_SETENA_Msk (0xffffffffUL) /*!< PPB NVIC_ISER2: SETENA (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------------- PPB_NVIC_ISER3 ------------------------------- */ +#define PPB_NVIC_ISER3_SETENA_Pos (0UL) /*!< PPB NVIC_ISER3: SETENA (Bit 0) */ +#define PPB_NVIC_ISER3_SETENA_Msk (0xffffffffUL) /*!< PPB NVIC_ISER3: SETENA (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------------- PPB_NVIC_ICER0 ------------------------------- */ +#define PPB_NVIC_ICER0_CLRENA_Pos (0UL) /*!< PPB NVIC_ICER0: CLRENA (Bit 0) */ +#define PPB_NVIC_ICER0_CLRENA_Msk (0xffffffffUL) /*!< PPB NVIC_ICER0: CLRENA (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------------- PPB_NVIC_ICER1 ------------------------------- */ +#define PPB_NVIC_ICER1_CLRENA_Pos (0UL) /*!< PPB NVIC_ICER1: CLRENA (Bit 0) */ +#define PPB_NVIC_ICER1_CLRENA_Msk (0xffffffffUL) /*!< PPB NVIC_ICER1: CLRENA (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------------- PPB_NVIC_ICER2 ------------------------------- */ +#define PPB_NVIC_ICER2_CLRENA_Pos (0UL) /*!< PPB NVIC_ICER2: CLRENA (Bit 0) */ +#define PPB_NVIC_ICER2_CLRENA_Msk (0xffffffffUL) /*!< PPB NVIC_ICER2: CLRENA (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------------- PPB_NVIC_ICER3 ------------------------------- */ +#define PPB_NVIC_ICER3_CLRENA_Pos (0UL) /*!< PPB NVIC_ICER3: CLRENA (Bit 0) */ +#define PPB_NVIC_ICER3_CLRENA_Msk (0xffffffffUL) /*!< PPB NVIC_ICER3: CLRENA (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------------- PPB_NVIC_ISPR0 ------------------------------- */ +#define PPB_NVIC_ISPR0_SETPEND_Pos (0UL) /*!< PPB NVIC_ISPR0: SETPEND (Bit 0) */ +#define PPB_NVIC_ISPR0_SETPEND_Msk (0xffffffffUL) /*!< PPB NVIC_ISPR0: SETPEND (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------------- PPB_NVIC_ISPR1 ------------------------------- */ +#define PPB_NVIC_ISPR1_SETPEND_Pos (0UL) /*!< PPB NVIC_ISPR1: SETPEND (Bit 0) */ +#define PPB_NVIC_ISPR1_SETPEND_Msk (0xffffffffUL) /*!< PPB NVIC_ISPR1: SETPEND (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------------- PPB_NVIC_ISPR2 ------------------------------- */ +#define PPB_NVIC_ISPR2_SETPEND_Pos (0UL) /*!< PPB NVIC_ISPR2: SETPEND (Bit 0) */ +#define PPB_NVIC_ISPR2_SETPEND_Msk (0xffffffffUL) /*!< PPB NVIC_ISPR2: SETPEND (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------------- PPB_NVIC_ISPR3 ------------------------------- */ +#define PPB_NVIC_ISPR3_SETPEND_Pos (0UL) /*!< PPB NVIC_ISPR3: SETPEND (Bit 0) */ +#define PPB_NVIC_ISPR3_SETPEND_Msk (0xffffffffUL) /*!< PPB NVIC_ISPR3: SETPEND (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------------- PPB_NVIC_ICPR0 ------------------------------- */ +#define PPB_NVIC_ICPR0_CLRPEND_Pos (0UL) /*!< PPB NVIC_ICPR0: CLRPEND (Bit 0) */ +#define PPB_NVIC_ICPR0_CLRPEND_Msk (0xffffffffUL) /*!< PPB NVIC_ICPR0: CLRPEND (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------------- PPB_NVIC_ICPR1 ------------------------------- */ +#define PPB_NVIC_ICPR1_CLRPEND_Pos (0UL) /*!< PPB NVIC_ICPR1: CLRPEND (Bit 0) */ +#define PPB_NVIC_ICPR1_CLRPEND_Msk (0xffffffffUL) /*!< PPB NVIC_ICPR1: CLRPEND (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------------- PPB_NVIC_ICPR2 ------------------------------- */ +#define PPB_NVIC_ICPR2_CLRPEND_Pos (0UL) /*!< PPB NVIC_ICPR2: CLRPEND (Bit 0) */ +#define PPB_NVIC_ICPR2_CLRPEND_Msk (0xffffffffUL) /*!< PPB NVIC_ICPR2: CLRPEND (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------------- PPB_NVIC_ICPR3 ------------------------------- */ +#define PPB_NVIC_ICPR3_CLRPEND_Pos (0UL) /*!< PPB NVIC_ICPR3: CLRPEND (Bit 0) */ +#define PPB_NVIC_ICPR3_CLRPEND_Msk (0xffffffffUL) /*!< PPB NVIC_ICPR3: CLRPEND (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------------- PPB_NVIC_IABR0 ------------------------------- */ +#define PPB_NVIC_IABR0_ACTIVE_Pos (0UL) /*!< PPB NVIC_IABR0: ACTIVE (Bit 0) */ +#define PPB_NVIC_IABR0_ACTIVE_Msk (0xffffffffUL) /*!< PPB NVIC_IABR0: ACTIVE (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------------- PPB_NVIC_IABR1 ------------------------------- */ +#define PPB_NVIC_IABR1_ACTIVE_Pos (0UL) /*!< PPB NVIC_IABR1: ACTIVE (Bit 0) */ +#define PPB_NVIC_IABR1_ACTIVE_Msk (0xffffffffUL) /*!< PPB NVIC_IABR1: ACTIVE (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------------- PPB_NVIC_IABR2 ------------------------------- */ +#define PPB_NVIC_IABR2_ACTIVE_Pos (0UL) /*!< PPB NVIC_IABR2: ACTIVE (Bit 0) */ +#define PPB_NVIC_IABR2_ACTIVE_Msk (0xffffffffUL) /*!< PPB NVIC_IABR2: ACTIVE (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------------- PPB_NVIC_IABR3 ------------------------------- */ +#define PPB_NVIC_IABR3_ACTIVE_Pos (0UL) /*!< PPB NVIC_IABR3: ACTIVE (Bit 0) */ +#define PPB_NVIC_IABR3_ACTIVE_Msk (0xffffffffUL) /*!< PPB NVIC_IABR3: ACTIVE (Bitfield-Mask: 0xffffffff) */ + +/* -------------------------------- PPB_NVIC_IPR0 ------------------------------- */ +#define PPB_NVIC_IPR0_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR0: PRI_0 (Bit 0) */ +#define PPB_NVIC_IPR0_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR0: PRI_0 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR0_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR0: PRI_1 (Bit 8) */ +#define PPB_NVIC_IPR0_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR0: PRI_1 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR0_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR0: PRI_2 (Bit 16) */ +#define PPB_NVIC_IPR0_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR0: PRI_2 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR0_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR0: PRI_3 (Bit 24) */ +#define PPB_NVIC_IPR0_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR0: PRI_3 (Bitfield-Mask: 0xff) */ + +/* -------------------------------- PPB_NVIC_IPR1 ------------------------------- */ +#define PPB_NVIC_IPR1_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR1: PRI_0 (Bit 0) */ +#define PPB_NVIC_IPR1_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR1: PRI_0 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR1_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR1: PRI_1 (Bit 8) */ +#define PPB_NVIC_IPR1_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR1: PRI_1 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR1_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR1: PRI_2 (Bit 16) */ +#define PPB_NVIC_IPR1_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR1: PRI_2 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR1_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR1: PRI_3 (Bit 24) */ +#define PPB_NVIC_IPR1_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR1: PRI_3 (Bitfield-Mask: 0xff) */ + +/* -------------------------------- PPB_NVIC_IPR2 ------------------------------- */ +#define PPB_NVIC_IPR2_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR2: PRI_0 (Bit 0) */ +#define PPB_NVIC_IPR2_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR2: PRI_0 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR2_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR2: PRI_1 (Bit 8) */ +#define PPB_NVIC_IPR2_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR2: PRI_1 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR2_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR2: PRI_2 (Bit 16) */ +#define PPB_NVIC_IPR2_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR2: PRI_2 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR2_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR2: PRI_3 (Bit 24) */ +#define PPB_NVIC_IPR2_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR2: PRI_3 (Bitfield-Mask: 0xff) */ + +/* -------------------------------- PPB_NVIC_IPR3 ------------------------------- */ +#define PPB_NVIC_IPR3_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR3: PRI_0 (Bit 0) */ +#define PPB_NVIC_IPR3_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR3: PRI_0 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR3_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR3: PRI_1 (Bit 8) */ +#define PPB_NVIC_IPR3_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR3: PRI_1 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR3_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR3: PRI_2 (Bit 16) */ +#define PPB_NVIC_IPR3_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR3: PRI_2 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR3_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR3: PRI_3 (Bit 24) */ +#define PPB_NVIC_IPR3_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR3: PRI_3 (Bitfield-Mask: 0xff) */ + +/* -------------------------------- PPB_NVIC_IPR4 ------------------------------- */ +#define PPB_NVIC_IPR4_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR4: PRI_0 (Bit 0) */ +#define PPB_NVIC_IPR4_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR4: PRI_0 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR4_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR4: PRI_1 (Bit 8) */ +#define PPB_NVIC_IPR4_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR4: PRI_1 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR4_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR4: PRI_2 (Bit 16) */ +#define PPB_NVIC_IPR4_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR4: PRI_2 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR4_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR4: PRI_3 (Bit 24) */ +#define PPB_NVIC_IPR4_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR4: PRI_3 (Bitfield-Mask: 0xff) */ + +/* -------------------------------- PPB_NVIC_IPR5 ------------------------------- */ +#define PPB_NVIC_IPR5_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR5: PRI_0 (Bit 0) */ +#define PPB_NVIC_IPR5_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR5: PRI_0 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR5_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR5: PRI_1 (Bit 8) */ +#define PPB_NVIC_IPR5_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR5: PRI_1 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR5_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR5: PRI_2 (Bit 16) */ +#define PPB_NVIC_IPR5_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR5: PRI_2 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR5_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR5: PRI_3 (Bit 24) */ +#define PPB_NVIC_IPR5_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR5: PRI_3 (Bitfield-Mask: 0xff) */ + +/* -------------------------------- PPB_NVIC_IPR6 ------------------------------- */ +#define PPB_NVIC_IPR6_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR6: PRI_0 (Bit 0) */ +#define PPB_NVIC_IPR6_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR6: PRI_0 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR6_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR6: PRI_1 (Bit 8) */ +#define PPB_NVIC_IPR6_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR6: PRI_1 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR6_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR6: PRI_2 (Bit 16) */ +#define PPB_NVIC_IPR6_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR6: PRI_2 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR6_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR6: PRI_3 (Bit 24) */ +#define PPB_NVIC_IPR6_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR6: PRI_3 (Bitfield-Mask: 0xff) */ + +/* -------------------------------- PPB_NVIC_IPR7 ------------------------------- */ +#define PPB_NVIC_IPR7_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR7: PRI_0 (Bit 0) */ +#define PPB_NVIC_IPR7_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR7: PRI_0 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR7_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR7: PRI_1 (Bit 8) */ +#define PPB_NVIC_IPR7_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR7: PRI_1 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR7_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR7: PRI_2 (Bit 16) */ +#define PPB_NVIC_IPR7_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR7: PRI_2 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR7_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR7: PRI_3 (Bit 24) */ +#define PPB_NVIC_IPR7_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR7: PRI_3 (Bitfield-Mask: 0xff) */ + +/* -------------------------------- PPB_NVIC_IPR8 ------------------------------- */ +#define PPB_NVIC_IPR8_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR8: PRI_0 (Bit 0) */ +#define PPB_NVIC_IPR8_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR8: PRI_0 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR8_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR8: PRI_1 (Bit 8) */ +#define PPB_NVIC_IPR8_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR8: PRI_1 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR8_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR8: PRI_2 (Bit 16) */ +#define PPB_NVIC_IPR8_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR8: PRI_2 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR8_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR8: PRI_3 (Bit 24) */ +#define PPB_NVIC_IPR8_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR8: PRI_3 (Bitfield-Mask: 0xff) */ + +/* -------------------------------- PPB_NVIC_IPR9 ------------------------------- */ +#define PPB_NVIC_IPR9_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR9: PRI_0 (Bit 0) */ +#define PPB_NVIC_IPR9_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR9: PRI_0 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR9_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR9: PRI_1 (Bit 8) */ +#define PPB_NVIC_IPR9_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR9: PRI_1 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR9_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR9: PRI_2 (Bit 16) */ +#define PPB_NVIC_IPR9_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR9: PRI_2 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR9_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR9: PRI_3 (Bit 24) */ +#define PPB_NVIC_IPR9_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR9: PRI_3 (Bitfield-Mask: 0xff) */ + +/* ------------------------------- PPB_NVIC_IPR10 ------------------------------- */ +#define PPB_NVIC_IPR10_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR10: PRI_0 (Bit 0) */ +#define PPB_NVIC_IPR10_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR10: PRI_0 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR10_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR10: PRI_1 (Bit 8) */ +#define PPB_NVIC_IPR10_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR10: PRI_1 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR10_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR10: PRI_2 (Bit 16) */ +#define PPB_NVIC_IPR10_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR10: PRI_2 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR10_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR10: PRI_3 (Bit 24) */ +#define PPB_NVIC_IPR10_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR10: PRI_3 (Bitfield-Mask: 0xff) */ + +/* ------------------------------- PPB_NVIC_IPR11 ------------------------------- */ +#define PPB_NVIC_IPR11_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR11: PRI_0 (Bit 0) */ +#define PPB_NVIC_IPR11_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR11: PRI_0 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR11_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR11: PRI_1 (Bit 8) */ +#define PPB_NVIC_IPR11_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR11: PRI_1 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR11_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR11: PRI_2 (Bit 16) */ +#define PPB_NVIC_IPR11_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR11: PRI_2 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR11_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR11: PRI_3 (Bit 24) */ +#define PPB_NVIC_IPR11_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR11: PRI_3 (Bitfield-Mask: 0xff) */ + +/* ------------------------------- PPB_NVIC_IPR12 ------------------------------- */ +#define PPB_NVIC_IPR12_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR12: PRI_0 (Bit 0) */ +#define PPB_NVIC_IPR12_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR12: PRI_0 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR12_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR12: PRI_1 (Bit 8) */ +#define PPB_NVIC_IPR12_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR12: PRI_1 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR12_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR12: PRI_2 (Bit 16) */ +#define PPB_NVIC_IPR12_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR12: PRI_2 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR12_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR12: PRI_3 (Bit 24) */ +#define PPB_NVIC_IPR12_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR12: PRI_3 (Bitfield-Mask: 0xff) */ + +/* ------------------------------- PPB_NVIC_IPR13 ------------------------------- */ +#define PPB_NVIC_IPR13_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR13: PRI_0 (Bit 0) */ +#define PPB_NVIC_IPR13_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR13: PRI_0 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR13_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR13: PRI_1 (Bit 8) */ +#define PPB_NVIC_IPR13_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR13: PRI_1 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR13_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR13: PRI_2 (Bit 16) */ +#define PPB_NVIC_IPR13_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR13: PRI_2 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR13_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR13: PRI_3 (Bit 24) */ +#define PPB_NVIC_IPR13_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR13: PRI_3 (Bitfield-Mask: 0xff) */ + +/* ------------------------------- PPB_NVIC_IPR14 ------------------------------- */ +#define PPB_NVIC_IPR14_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR14: PRI_0 (Bit 0) */ +#define PPB_NVIC_IPR14_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR14: PRI_0 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR14_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR14: PRI_1 (Bit 8) */ +#define PPB_NVIC_IPR14_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR14: PRI_1 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR14_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR14: PRI_2 (Bit 16) */ +#define PPB_NVIC_IPR14_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR14: PRI_2 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR14_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR14: PRI_3 (Bit 24) */ +#define PPB_NVIC_IPR14_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR14: PRI_3 (Bitfield-Mask: 0xff) */ + +/* ------------------------------- PPB_NVIC_IPR15 ------------------------------- */ +#define PPB_NVIC_IPR15_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR15: PRI_0 (Bit 0) */ +#define PPB_NVIC_IPR15_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR15: PRI_0 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR15_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR15: PRI_1 (Bit 8) */ +#define PPB_NVIC_IPR15_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR15: PRI_1 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR15_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR15: PRI_2 (Bit 16) */ +#define PPB_NVIC_IPR15_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR15: PRI_2 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR15_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR15: PRI_3 (Bit 24) */ +#define PPB_NVIC_IPR15_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR15: PRI_3 (Bitfield-Mask: 0xff) */ + +/* ------------------------------- PPB_NVIC_IPR16 ------------------------------- */ +#define PPB_NVIC_IPR16_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR16: PRI_0 (Bit 0) */ +#define PPB_NVIC_IPR16_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR16: PRI_0 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR16_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR16: PRI_1 (Bit 8) */ +#define PPB_NVIC_IPR16_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR16: PRI_1 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR16_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR16: PRI_2 (Bit 16) */ +#define PPB_NVIC_IPR16_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR16: PRI_2 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR16_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR16: PRI_3 (Bit 24) */ +#define PPB_NVIC_IPR16_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR16: PRI_3 (Bitfield-Mask: 0xff) */ + +/* ------------------------------- PPB_NVIC_IPR17 ------------------------------- */ +#define PPB_NVIC_IPR17_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR17: PRI_0 (Bit 0) */ +#define PPB_NVIC_IPR17_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR17: PRI_0 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR17_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR17: PRI_1 (Bit 8) */ +#define PPB_NVIC_IPR17_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR17: PRI_1 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR17_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR17: PRI_2 (Bit 16) */ +#define PPB_NVIC_IPR17_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR17: PRI_2 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR17_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR17: PRI_3 (Bit 24) */ +#define PPB_NVIC_IPR17_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR17: PRI_3 (Bitfield-Mask: 0xff) */ + +/* ------------------------------- PPB_NVIC_IPR18 ------------------------------- */ +#define PPB_NVIC_IPR18_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR18: PRI_0 (Bit 0) */ +#define PPB_NVIC_IPR18_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR18: PRI_0 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR18_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR18: PRI_1 (Bit 8) */ +#define PPB_NVIC_IPR18_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR18: PRI_1 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR18_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR18: PRI_2 (Bit 16) */ +#define PPB_NVIC_IPR18_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR18: PRI_2 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR18_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR18: PRI_3 (Bit 24) */ +#define PPB_NVIC_IPR18_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR18: PRI_3 (Bitfield-Mask: 0xff) */ + +/* ------------------------------- PPB_NVIC_IPR19 ------------------------------- */ +#define PPB_NVIC_IPR19_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR19: PRI_0 (Bit 0) */ +#define PPB_NVIC_IPR19_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR19: PRI_0 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR19_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR19: PRI_1 (Bit 8) */ +#define PPB_NVIC_IPR19_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR19: PRI_1 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR19_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR19: PRI_2 (Bit 16) */ +#define PPB_NVIC_IPR19_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR19: PRI_2 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR19_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR19: PRI_3 (Bit 24) */ +#define PPB_NVIC_IPR19_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR19: PRI_3 (Bitfield-Mask: 0xff) */ + +/* ------------------------------- PPB_NVIC_IPR20 ------------------------------- */ +#define PPB_NVIC_IPR20_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR20: PRI_0 (Bit 0) */ +#define PPB_NVIC_IPR20_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR20: PRI_0 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR20_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR20: PRI_1 (Bit 8) */ +#define PPB_NVIC_IPR20_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR20: PRI_1 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR20_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR20: PRI_2 (Bit 16) */ +#define PPB_NVIC_IPR20_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR20: PRI_2 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR20_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR20: PRI_3 (Bit 24) */ +#define PPB_NVIC_IPR20_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR20: PRI_3 (Bitfield-Mask: 0xff) */ + +/* ------------------------------- PPB_NVIC_IPR21 ------------------------------- */ +#define PPB_NVIC_IPR21_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR21: PRI_0 (Bit 0) */ +#define PPB_NVIC_IPR21_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR21: PRI_0 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR21_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR21: PRI_1 (Bit 8) */ +#define PPB_NVIC_IPR21_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR21: PRI_1 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR21_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR21: PRI_2 (Bit 16) */ +#define PPB_NVIC_IPR21_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR21: PRI_2 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR21_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR21: PRI_3 (Bit 24) */ +#define PPB_NVIC_IPR21_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR21: PRI_3 (Bitfield-Mask: 0xff) */ + +/* ------------------------------- PPB_NVIC_IPR22 ------------------------------- */ +#define PPB_NVIC_IPR22_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR22: PRI_0 (Bit 0) */ +#define PPB_NVIC_IPR22_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR22: PRI_0 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR22_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR22: PRI_1 (Bit 8) */ +#define PPB_NVIC_IPR22_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR22: PRI_1 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR22_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR22: PRI_2 (Bit 16) */ +#define PPB_NVIC_IPR22_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR22: PRI_2 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR22_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR22: PRI_3 (Bit 24) */ +#define PPB_NVIC_IPR22_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR22: PRI_3 (Bitfield-Mask: 0xff) */ + +/* ------------------------------- PPB_NVIC_IPR23 ------------------------------- */ +#define PPB_NVIC_IPR23_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR23: PRI_0 (Bit 0) */ +#define PPB_NVIC_IPR23_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR23: PRI_0 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR23_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR23: PRI_1 (Bit 8) */ +#define PPB_NVIC_IPR23_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR23: PRI_1 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR23_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR23: PRI_2 (Bit 16) */ +#define PPB_NVIC_IPR23_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR23: PRI_2 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR23_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR23: PRI_3 (Bit 24) */ +#define PPB_NVIC_IPR23_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR23: PRI_3 (Bitfield-Mask: 0xff) */ + +/* ------------------------------- PPB_NVIC_IPR24 ------------------------------- */ +#define PPB_NVIC_IPR24_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR24: PRI_0 (Bit 0) */ +#define PPB_NVIC_IPR24_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR24: PRI_0 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR24_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR24: PRI_1 (Bit 8) */ +#define PPB_NVIC_IPR24_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR24: PRI_1 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR24_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR24: PRI_2 (Bit 16) */ +#define PPB_NVIC_IPR24_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR24: PRI_2 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR24_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR24: PRI_3 (Bit 24) */ +#define PPB_NVIC_IPR24_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR24: PRI_3 (Bitfield-Mask: 0xff) */ + +/* ------------------------------- PPB_NVIC_IPR25 ------------------------------- */ +#define PPB_NVIC_IPR25_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR25: PRI_0 (Bit 0) */ +#define PPB_NVIC_IPR25_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR25: PRI_0 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR25_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR25: PRI_1 (Bit 8) */ +#define PPB_NVIC_IPR25_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR25: PRI_1 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR25_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR25: PRI_2 (Bit 16) */ +#define PPB_NVIC_IPR25_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR25: PRI_2 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR25_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR25: PRI_3 (Bit 24) */ +#define PPB_NVIC_IPR25_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR25: PRI_3 (Bitfield-Mask: 0xff) */ + +/* ------------------------------- PPB_NVIC_IPR26 ------------------------------- */ +#define PPB_NVIC_IPR26_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR26: PRI_0 (Bit 0) */ +#define PPB_NVIC_IPR26_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR26: PRI_0 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR26_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR26: PRI_1 (Bit 8) */ +#define PPB_NVIC_IPR26_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR26: PRI_1 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR26_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR26: PRI_2 (Bit 16) */ +#define PPB_NVIC_IPR26_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR26: PRI_2 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR26_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR26: PRI_3 (Bit 24) */ +#define PPB_NVIC_IPR26_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR26: PRI_3 (Bitfield-Mask: 0xff) */ + +/* ------------------------------- PPB_NVIC_IPR27 ------------------------------- */ +#define PPB_NVIC_IPR27_PRI_0_Pos (0UL) /*!< PPB NVIC_IPR27: PRI_0 (Bit 0) */ +#define PPB_NVIC_IPR27_PRI_0_Msk (0xffUL) /*!< PPB NVIC_IPR27: PRI_0 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR27_PRI_1_Pos (8UL) /*!< PPB NVIC_IPR27: PRI_1 (Bit 8) */ +#define PPB_NVIC_IPR27_PRI_1_Msk (0xff00UL) /*!< PPB NVIC_IPR27: PRI_1 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR27_PRI_2_Pos (16UL) /*!< PPB NVIC_IPR27: PRI_2 (Bit 16) */ +#define PPB_NVIC_IPR27_PRI_2_Msk (0xff0000UL) /*!< PPB NVIC_IPR27: PRI_2 (Bitfield-Mask: 0xff) */ +#define PPB_NVIC_IPR27_PRI_3_Pos (24UL) /*!< PPB NVIC_IPR27: PRI_3 (Bit 24) */ +#define PPB_NVIC_IPR27_PRI_3_Msk (0xff000000UL) /*!< PPB NVIC_IPR27: PRI_3 (Bitfield-Mask: 0xff) */ + +/* ---------------------------------- PPB_CPUID --------------------------------- */ +#define PPB_CPUID_Revision_Pos (0UL) /*!< PPB CPUID: Revision (Bit 0) */ +#define PPB_CPUID_Revision_Msk (0xfUL) /*!< PPB CPUID: Revision (Bitfield-Mask: 0x0f) */ +#define PPB_CPUID_PartNo_Pos (4UL) /*!< PPB CPUID: PartNo (Bit 4) */ +#define PPB_CPUID_PartNo_Msk (0xfff0UL) /*!< PPB CPUID: PartNo (Bitfield-Mask: 0xfff) */ +#define PPB_CPUID_Constant_Pos (16UL) /*!< PPB CPUID: Constant (Bit 16) */ +#define PPB_CPUID_Constant_Msk (0xf0000UL) /*!< PPB CPUID: Constant (Bitfield-Mask: 0x0f) */ +#define PPB_CPUID_Variant_Pos (20UL) /*!< PPB CPUID: Variant (Bit 20) */ +#define PPB_CPUID_Variant_Msk (0xf00000UL) /*!< PPB CPUID: Variant (Bitfield-Mask: 0x0f) */ +#define PPB_CPUID_Implementer_Pos (24UL) /*!< PPB CPUID: Implementer (Bit 24) */ +#define PPB_CPUID_Implementer_Msk (0xff000000UL) /*!< PPB CPUID: Implementer (Bitfield-Mask: 0xff) */ + +/* ---------------------------------- PPB_ICSR ---------------------------------- */ +#define PPB_ICSR_VECTACTIVE_Pos (0UL) /*!< PPB ICSR: VECTACTIVE (Bit 0) */ +#define PPB_ICSR_VECTACTIVE_Msk (0x1ffUL) /*!< PPB ICSR: VECTACTIVE (Bitfield-Mask: 0x1ff) */ +#define PPB_ICSR_RETTOBASE_Pos (11UL) /*!< PPB ICSR: RETTOBASE (Bit 11) */ +#define PPB_ICSR_RETTOBASE_Msk (0x800UL) /*!< PPB ICSR: RETTOBASE (Bitfield-Mask: 0x01) */ +#define PPB_ICSR_VECTPENDING_Pos (12UL) /*!< PPB ICSR: VECTPENDING (Bit 12) */ +#define PPB_ICSR_VECTPENDING_Msk (0x3f000UL) /*!< PPB ICSR: VECTPENDING (Bitfield-Mask: 0x3f) */ +#define PPB_ICSR_ISRPENDING_Pos (22UL) /*!< PPB ICSR: ISRPENDING (Bit 22) */ +#define PPB_ICSR_ISRPENDING_Msk (0x400000UL) /*!< PPB ICSR: ISRPENDING (Bitfield-Mask: 0x01) */ +#define PPB_ICSR_PENDSTCLR_Pos (25UL) /*!< PPB ICSR: PENDSTCLR (Bit 25) */ +#define PPB_ICSR_PENDSTCLR_Msk (0x2000000UL) /*!< PPB ICSR: PENDSTCLR (Bitfield-Mask: 0x01) */ +#define PPB_ICSR_PENDSTSET_Pos (26UL) /*!< PPB ICSR: PENDSTSET (Bit 26) */ +#define PPB_ICSR_PENDSTSET_Msk (0x4000000UL) /*!< PPB ICSR: PENDSTSET (Bitfield-Mask: 0x01) */ +#define PPB_ICSR_PENDSVCLR_Pos (27UL) /*!< PPB ICSR: PENDSVCLR (Bit 27) */ +#define PPB_ICSR_PENDSVCLR_Msk (0x8000000UL) /*!< PPB ICSR: PENDSVCLR (Bitfield-Mask: 0x01) */ +#define PPB_ICSR_PENDSVSET_Pos (28UL) /*!< PPB ICSR: PENDSVSET (Bit 28) */ +#define PPB_ICSR_PENDSVSET_Msk (0x10000000UL) /*!< PPB ICSR: PENDSVSET (Bitfield-Mask: 0x01) */ +#define PPB_ICSR_NMIPENDSET_Pos (31UL) /*!< PPB ICSR: NMIPENDSET (Bit 31) */ +#define PPB_ICSR_NMIPENDSET_Msk (0x80000000UL) /*!< PPB ICSR: NMIPENDSET (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- PPB_VTOR ---------------------------------- */ +#define PPB_VTOR_TBLOFF_Pos (10UL) /*!< PPB VTOR: TBLOFF (Bit 10) */ +#define PPB_VTOR_TBLOFF_Msk (0xfffffc00UL) /*!< PPB VTOR: TBLOFF (Bitfield-Mask: 0x3fffff) */ + +/* ---------------------------------- PPB_AIRCR --------------------------------- */ +#define PPB_AIRCR_VECTRESET_Pos (0UL) /*!< PPB AIRCR: VECTRESET (Bit 0) */ +#define PPB_AIRCR_VECTRESET_Msk (0x1UL) /*!< PPB AIRCR: VECTRESET (Bitfield-Mask: 0x01) */ +#define PPB_AIRCR_VECTCLRACTIVE_Pos (1UL) /*!< PPB AIRCR: VECTCLRACTIVE (Bit 1) */ +#define PPB_AIRCR_VECTCLRACTIVE_Msk (0x2UL) /*!< PPB AIRCR: VECTCLRACTIVE (Bitfield-Mask: 0x01) */ +#define PPB_AIRCR_SYSRESETREQ_Pos (2UL) /*!< PPB AIRCR: SYSRESETREQ (Bit 2) */ +#define PPB_AIRCR_SYSRESETREQ_Msk (0x4UL) /*!< PPB AIRCR: SYSRESETREQ (Bitfield-Mask: 0x01) */ +#define PPB_AIRCR_PRIGROUP_Pos (8UL) /*!< PPB AIRCR: PRIGROUP (Bit 8) */ +#define PPB_AIRCR_PRIGROUP_Msk (0x700UL) /*!< PPB AIRCR: PRIGROUP (Bitfield-Mask: 0x07) */ +#define PPB_AIRCR_ENDIANNESS_Pos (15UL) /*!< PPB AIRCR: ENDIANNESS (Bit 15) */ +#define PPB_AIRCR_ENDIANNESS_Msk (0x8000UL) /*!< PPB AIRCR: ENDIANNESS (Bitfield-Mask: 0x01) */ +#define PPB_AIRCR_VECTKEY_Pos (16UL) /*!< PPB AIRCR: VECTKEY (Bit 16) */ +#define PPB_AIRCR_VECTKEY_Msk (0xffff0000UL) /*!< PPB AIRCR: VECTKEY (Bitfield-Mask: 0xffff) */ + +/* ----------------------------------- PPB_SCR ---------------------------------- */ +#define PPB_SCR_SLEEPONEXIT_Pos (1UL) /*!< PPB SCR: SLEEPONEXIT (Bit 1) */ +#define PPB_SCR_SLEEPONEXIT_Msk (0x2UL) /*!< PPB SCR: SLEEPONEXIT (Bitfield-Mask: 0x01) */ +#define PPB_SCR_SLEEPDEEP_Pos (2UL) /*!< PPB SCR: SLEEPDEEP (Bit 2) */ +#define PPB_SCR_SLEEPDEEP_Msk (0x4UL) /*!< PPB SCR: SLEEPDEEP (Bitfield-Mask: 0x01) */ +#define PPB_SCR_SEVONPEND_Pos (4UL) /*!< PPB SCR: SEVONPEND (Bit 4) */ +#define PPB_SCR_SEVONPEND_Msk (0x10UL) /*!< PPB SCR: SEVONPEND (Bitfield-Mask: 0x01) */ + +/* ----------------------------------- PPB_CCR ---------------------------------- */ +#define PPB_CCR_NONBASETHRDENA_Pos (0UL) /*!< PPB CCR: NONBASETHRDENA (Bit 0) */ +#define PPB_CCR_NONBASETHRDENA_Msk (0x1UL) /*!< PPB CCR: NONBASETHRDENA (Bitfield-Mask: 0x01) */ +#define PPB_CCR_USERSETMPEND_Pos (1UL) /*!< PPB CCR: USERSETMPEND (Bit 1) */ +#define PPB_CCR_USERSETMPEND_Msk (0x2UL) /*!< PPB CCR: USERSETMPEND (Bitfield-Mask: 0x01) */ +#define PPB_CCR_UNALIGN_TRP_Pos (3UL) /*!< PPB CCR: UNALIGN_TRP (Bit 3) */ +#define PPB_CCR_UNALIGN_TRP_Msk (0x8UL) /*!< PPB CCR: UNALIGN_TRP (Bitfield-Mask: 0x01) */ +#define PPB_CCR_DIV_0_TRP_Pos (4UL) /*!< PPB CCR: DIV_0_TRP (Bit 4) */ +#define PPB_CCR_DIV_0_TRP_Msk (0x10UL) /*!< PPB CCR: DIV_0_TRP (Bitfield-Mask: 0x01) */ +#define PPB_CCR_BFHFNMIGN_Pos (8UL) /*!< PPB CCR: BFHFNMIGN (Bit 8) */ +#define PPB_CCR_BFHFNMIGN_Msk (0x100UL) /*!< PPB CCR: BFHFNMIGN (Bitfield-Mask: 0x01) */ +#define PPB_CCR_STKALIGN_Pos (9UL) /*!< PPB CCR: STKALIGN (Bit 9) */ +#define PPB_CCR_STKALIGN_Msk (0x200UL) /*!< PPB CCR: STKALIGN (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- PPB_SHPR1 --------------------------------- */ +#define PPB_SHPR1_PRI_4_Pos (0UL) /*!< PPB SHPR1: PRI_4 (Bit 0) */ +#define PPB_SHPR1_PRI_4_Msk (0xffUL) /*!< PPB SHPR1: PRI_4 (Bitfield-Mask: 0xff) */ +#define PPB_SHPR1_PRI_5_Pos (8UL) /*!< PPB SHPR1: PRI_5 (Bit 8) */ +#define PPB_SHPR1_PRI_5_Msk (0xff00UL) /*!< PPB SHPR1: PRI_5 (Bitfield-Mask: 0xff) */ +#define PPB_SHPR1_PRI_6_Pos (16UL) /*!< PPB SHPR1: PRI_6 (Bit 16) */ +#define PPB_SHPR1_PRI_6_Msk (0xff0000UL) /*!< PPB SHPR1: PRI_6 (Bitfield-Mask: 0xff) */ + +/* ---------------------------------- PPB_SHPR2 --------------------------------- */ +#define PPB_SHPR2_PRI_11_Pos (24UL) /*!< PPB SHPR2: PRI_11 (Bit 24) */ +#define PPB_SHPR2_PRI_11_Msk (0xff000000UL) /*!< PPB SHPR2: PRI_11 (Bitfield-Mask: 0xff) */ + +/* ---------------------------------- PPB_SHPR3 --------------------------------- */ +#define PPB_SHPR3_PRI_14_Pos (16UL) /*!< PPB SHPR3: PRI_14 (Bit 16) */ +#define PPB_SHPR3_PRI_14_Msk (0xff0000UL) /*!< PPB SHPR3: PRI_14 (Bitfield-Mask: 0xff) */ +#define PPB_SHPR3_PRI_15_Pos (24UL) /*!< PPB SHPR3: PRI_15 (Bit 24) */ +#define PPB_SHPR3_PRI_15_Msk (0xff000000UL) /*!< PPB SHPR3: PRI_15 (Bitfield-Mask: 0xff) */ + +/* ---------------------------------- PPB_SHCSR --------------------------------- */ +#define PPB_SHCSR_MEMFAULTACT_Pos (0UL) /*!< PPB SHCSR: MEMFAULTACT (Bit 0) */ +#define PPB_SHCSR_MEMFAULTACT_Msk (0x1UL) /*!< PPB SHCSR: MEMFAULTACT (Bitfield-Mask: 0x01) */ +#define PPB_SHCSR_BUSFAULTACT_Pos (1UL) /*!< PPB SHCSR: BUSFAULTACT (Bit 1) */ +#define PPB_SHCSR_BUSFAULTACT_Msk (0x2UL) /*!< PPB SHCSR: BUSFAULTACT (Bitfield-Mask: 0x01) */ +#define PPB_SHCSR_USGFAULTACT_Pos (3UL) /*!< PPB SHCSR: USGFAULTACT (Bit 3) */ +#define PPB_SHCSR_USGFAULTACT_Msk (0x8UL) /*!< PPB SHCSR: USGFAULTACT (Bitfield-Mask: 0x01) */ +#define PPB_SHCSR_SVCALLACT_Pos (7UL) /*!< PPB SHCSR: SVCALLACT (Bit 7) */ +#define PPB_SHCSR_SVCALLACT_Msk (0x80UL) /*!< PPB SHCSR: SVCALLACT (Bitfield-Mask: 0x01) */ +#define PPB_SHCSR_MONITORACT_Pos (8UL) /*!< PPB SHCSR: MONITORACT (Bit 8) */ +#define PPB_SHCSR_MONITORACT_Msk (0x100UL) /*!< PPB SHCSR: MONITORACT (Bitfield-Mask: 0x01) */ +#define PPB_SHCSR_PENDSVACT_Pos (10UL) /*!< PPB SHCSR: PENDSVACT (Bit 10) */ +#define PPB_SHCSR_PENDSVACT_Msk (0x400UL) /*!< PPB SHCSR: PENDSVACT (Bitfield-Mask: 0x01) */ +#define PPB_SHCSR_SYSTICKACT_Pos (11UL) /*!< PPB SHCSR: SYSTICKACT (Bit 11) */ +#define PPB_SHCSR_SYSTICKACT_Msk (0x800UL) /*!< PPB SHCSR: SYSTICKACT (Bitfield-Mask: 0x01) */ +#define PPB_SHCSR_USGFAULTPENDED_Pos (12UL) /*!< PPB SHCSR: USGFAULTPENDED (Bit 12) */ +#define PPB_SHCSR_USGFAULTPENDED_Msk (0x1000UL) /*!< PPB SHCSR: USGFAULTPENDED (Bitfield-Mask: 0x01) */ +#define PPB_SHCSR_MEMFAULTPENDED_Pos (13UL) /*!< PPB SHCSR: MEMFAULTPENDED (Bit 13) */ +#define PPB_SHCSR_MEMFAULTPENDED_Msk (0x2000UL) /*!< PPB SHCSR: MEMFAULTPENDED (Bitfield-Mask: 0x01) */ +#define PPB_SHCSR_BUSFAULTPENDED_Pos (14UL) /*!< PPB SHCSR: BUSFAULTPENDED (Bit 14) */ +#define PPB_SHCSR_BUSFAULTPENDED_Msk (0x4000UL) /*!< PPB SHCSR: BUSFAULTPENDED (Bitfield-Mask: 0x01) */ +#define PPB_SHCSR_SVCALLPENDED_Pos (15UL) /*!< PPB SHCSR: SVCALLPENDED (Bit 15) */ +#define PPB_SHCSR_SVCALLPENDED_Msk (0x8000UL) /*!< PPB SHCSR: SVCALLPENDED (Bitfield-Mask: 0x01) */ +#define PPB_SHCSR_MEMFAULTENA_Pos (16UL) /*!< PPB SHCSR: MEMFAULTENA (Bit 16) */ +#define PPB_SHCSR_MEMFAULTENA_Msk (0x10000UL) /*!< PPB SHCSR: MEMFAULTENA (Bitfield-Mask: 0x01) */ +#define PPB_SHCSR_BUSFAULTENA_Pos (17UL) /*!< PPB SHCSR: BUSFAULTENA (Bit 17) */ +#define PPB_SHCSR_BUSFAULTENA_Msk (0x20000UL) /*!< PPB SHCSR: BUSFAULTENA (Bitfield-Mask: 0x01) */ +#define PPB_SHCSR_USGFAULTENA_Pos (18UL) /*!< PPB SHCSR: USGFAULTENA (Bit 18) */ +#define PPB_SHCSR_USGFAULTENA_Msk (0x40000UL) /*!< PPB SHCSR: USGFAULTENA (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- PPB_CFSR ---------------------------------- */ +#define PPB_CFSR_IACCVIOL_Pos (0UL) /*!< PPB CFSR: IACCVIOL (Bit 0) */ +#define PPB_CFSR_IACCVIOL_Msk (0x1UL) /*!< PPB CFSR: IACCVIOL (Bitfield-Mask: 0x01) */ +#define PPB_CFSR_DACCVIOL_Pos (1UL) /*!< PPB CFSR: DACCVIOL (Bit 1) */ +#define PPB_CFSR_DACCVIOL_Msk (0x2UL) /*!< PPB CFSR: DACCVIOL (Bitfield-Mask: 0x01) */ +#define PPB_CFSR_MUNSTKERR_Pos (3UL) /*!< PPB CFSR: MUNSTKERR (Bit 3) */ +#define PPB_CFSR_MUNSTKERR_Msk (0x8UL) /*!< PPB CFSR: MUNSTKERR (Bitfield-Mask: 0x01) */ +#define PPB_CFSR_MSTKERR_Pos (4UL) /*!< PPB CFSR: MSTKERR (Bit 4) */ +#define PPB_CFSR_MSTKERR_Msk (0x10UL) /*!< PPB CFSR: MSTKERR (Bitfield-Mask: 0x01) */ +#define PPB_CFSR_MLSPERR_Pos (5UL) /*!< PPB CFSR: MLSPERR (Bit 5) */ +#define PPB_CFSR_MLSPERR_Msk (0x20UL) /*!< PPB CFSR: MLSPERR (Bitfield-Mask: 0x01) */ +#define PPB_CFSR_MMARVALID_Pos (7UL) /*!< PPB CFSR: MMARVALID (Bit 7) */ +#define PPB_CFSR_MMARVALID_Msk (0x80UL) /*!< PPB CFSR: MMARVALID (Bitfield-Mask: 0x01) */ +#define PPB_CFSR_IBUSERR_Pos (8UL) /*!< PPB CFSR: IBUSERR (Bit 8) */ +#define PPB_CFSR_IBUSERR_Msk (0x100UL) /*!< PPB CFSR: IBUSERR (Bitfield-Mask: 0x01) */ +#define PPB_CFSR_PRECISERR_Pos (9UL) /*!< PPB CFSR: PRECISERR (Bit 9) */ +#define PPB_CFSR_PRECISERR_Msk (0x200UL) /*!< PPB CFSR: PRECISERR (Bitfield-Mask: 0x01) */ +#define PPB_CFSR_IMPRECISERR_Pos (10UL) /*!< PPB CFSR: IMPRECISERR (Bit 10) */ +#define PPB_CFSR_IMPRECISERR_Msk (0x400UL) /*!< PPB CFSR: IMPRECISERR (Bitfield-Mask: 0x01) */ +#define PPB_CFSR_UNSTKERR_Pos (11UL) /*!< PPB CFSR: UNSTKERR (Bit 11) */ +#define PPB_CFSR_UNSTKERR_Msk (0x800UL) /*!< PPB CFSR: UNSTKERR (Bitfield-Mask: 0x01) */ +#define PPB_CFSR_STKERR_Pos (12UL) /*!< PPB CFSR: STKERR (Bit 12) */ +#define PPB_CFSR_STKERR_Msk (0x1000UL) /*!< PPB CFSR: STKERR (Bitfield-Mask: 0x01) */ +#define PPB_CFSR_LSPERR_Pos (13UL) /*!< PPB CFSR: LSPERR (Bit 13) */ +#define PPB_CFSR_LSPERR_Msk (0x2000UL) /*!< PPB CFSR: LSPERR (Bitfield-Mask: 0x01) */ +#define PPB_CFSR_BFARVALID_Pos (15UL) /*!< PPB CFSR: BFARVALID (Bit 15) */ +#define PPB_CFSR_BFARVALID_Msk (0x8000UL) /*!< PPB CFSR: BFARVALID (Bitfield-Mask: 0x01) */ +#define PPB_CFSR_UNDEFINSTR_Pos (16UL) /*!< PPB CFSR: UNDEFINSTR (Bit 16) */ +#define PPB_CFSR_UNDEFINSTR_Msk (0x10000UL) /*!< PPB CFSR: UNDEFINSTR (Bitfield-Mask: 0x01) */ +#define PPB_CFSR_INVSTATE_Pos (17UL) /*!< PPB CFSR: INVSTATE (Bit 17) */ +#define PPB_CFSR_INVSTATE_Msk (0x20000UL) /*!< PPB CFSR: INVSTATE (Bitfield-Mask: 0x01) */ +#define PPB_CFSR_INVPC_Pos (18UL) /*!< PPB CFSR: INVPC (Bit 18) */ +#define PPB_CFSR_INVPC_Msk (0x40000UL) /*!< PPB CFSR: INVPC (Bitfield-Mask: 0x01) */ +#define PPB_CFSR_NOCP_Pos (19UL) /*!< PPB CFSR: NOCP (Bit 19) */ +#define PPB_CFSR_NOCP_Msk (0x80000UL) /*!< PPB CFSR: NOCP (Bitfield-Mask: 0x01) */ +#define PPB_CFSR_UNALIGNED_Pos (24UL) /*!< PPB CFSR: UNALIGNED (Bit 24) */ +#define PPB_CFSR_UNALIGNED_Msk (0x1000000UL) /*!< PPB CFSR: UNALIGNED (Bitfield-Mask: 0x01) */ +#define PPB_CFSR_DIVBYZERO_Pos (25UL) /*!< PPB CFSR: DIVBYZERO (Bit 25) */ +#define PPB_CFSR_DIVBYZERO_Msk (0x2000000UL) /*!< PPB CFSR: DIVBYZERO (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- PPB_HFSR ---------------------------------- */ +#define PPB_HFSR_VECTTBL_Pos (1UL) /*!< PPB HFSR: VECTTBL (Bit 1) */ +#define PPB_HFSR_VECTTBL_Msk (0x2UL) /*!< PPB HFSR: VECTTBL (Bitfield-Mask: 0x01) */ +#define PPB_HFSR_FORCED_Pos (30UL) /*!< PPB HFSR: FORCED (Bit 30) */ +#define PPB_HFSR_FORCED_Msk (0x40000000UL) /*!< PPB HFSR: FORCED (Bitfield-Mask: 0x01) */ +#define PPB_HFSR_DEBUGEVT_Pos (31UL) /*!< PPB HFSR: DEBUGEVT (Bit 31) */ +#define PPB_HFSR_DEBUGEVT_Msk (0x80000000UL) /*!< PPB HFSR: DEBUGEVT (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- PPB_MMFAR --------------------------------- */ +#define PPB_MMFAR_ADDRESS_Pos (0UL) /*!< PPB MMFAR: ADDRESS (Bit 0) */ +#define PPB_MMFAR_ADDRESS_Msk (0xffffffffUL) /*!< PPB MMFAR: ADDRESS (Bitfield-Mask: 0xffffffff) */ + +/* ---------------------------------- PPB_BFAR ---------------------------------- */ +#define PPB_BFAR_ADDRESS_Pos (0UL) /*!< PPB BFAR: ADDRESS (Bit 0) */ +#define PPB_BFAR_ADDRESS_Msk (0xffffffffUL) /*!< PPB BFAR: ADDRESS (Bitfield-Mask: 0xffffffff) */ + +/* ---------------------------------- PPB_AFSR ---------------------------------- */ +#define PPB_AFSR_VALUE_Pos (0UL) /*!< PPB AFSR: VALUE (Bit 0) */ +#define PPB_AFSR_VALUE_Msk (0xffffffffUL) /*!< PPB AFSR: VALUE (Bitfield-Mask: 0xffffffff) */ + +/* ---------------------------------- PPB_CPACR --------------------------------- */ +#define PPB_CPACR_CP10_Pos (20UL) /*!< PPB CPACR: CP10 (Bit 20) */ +#define PPB_CPACR_CP10_Msk (0x300000UL) /*!< PPB CPACR: CP10 (Bitfield-Mask: 0x03) */ +#define PPB_CPACR_CP11_Pos (22UL) /*!< PPB CPACR: CP11 (Bit 22) */ +#define PPB_CPACR_CP11_Msk (0xc00000UL) /*!< PPB CPACR: CP11 (Bitfield-Mask: 0x03) */ + +/* -------------------------------- PPB_MPU_TYPE -------------------------------- */ +#define PPB_MPU_TYPE_SEPARATE_Pos (0UL) /*!< PPB MPU_TYPE: SEPARATE (Bit 0) */ +#define PPB_MPU_TYPE_SEPARATE_Msk (0x1UL) /*!< PPB MPU_TYPE: SEPARATE (Bitfield-Mask: 0x01) */ +#define PPB_MPU_TYPE_DREGION_Pos (8UL) /*!< PPB MPU_TYPE: DREGION (Bit 8) */ +#define PPB_MPU_TYPE_DREGION_Msk (0xff00UL) /*!< PPB MPU_TYPE: DREGION (Bitfield-Mask: 0xff) */ +#define PPB_MPU_TYPE_IREGION_Pos (16UL) /*!< PPB MPU_TYPE: IREGION (Bit 16) */ +#define PPB_MPU_TYPE_IREGION_Msk (0xff0000UL) /*!< PPB MPU_TYPE: IREGION (Bitfield-Mask: 0xff) */ + +/* -------------------------------- PPB_MPU_CTRL -------------------------------- */ +#define PPB_MPU_CTRL_ENABLE_Pos (0UL) /*!< PPB MPU_CTRL: ENABLE (Bit 0) */ +#define PPB_MPU_CTRL_ENABLE_Msk (0x1UL) /*!< PPB MPU_CTRL: ENABLE (Bitfield-Mask: 0x01) */ +#define PPB_MPU_CTRL_HFNMIENA_Pos (1UL) /*!< PPB MPU_CTRL: HFNMIENA (Bit 1) */ +#define PPB_MPU_CTRL_HFNMIENA_Msk (0x2UL) /*!< PPB MPU_CTRL: HFNMIENA (Bitfield-Mask: 0x01) */ +#define PPB_MPU_CTRL_PRIVDEFENA_Pos (2UL) /*!< PPB MPU_CTRL: PRIVDEFENA (Bit 2) */ +#define PPB_MPU_CTRL_PRIVDEFENA_Msk (0x4UL) /*!< PPB MPU_CTRL: PRIVDEFENA (Bitfield-Mask: 0x01) */ + +/* --------------------------------- PPB_MPU_RNR -------------------------------- */ +#define PPB_MPU_RNR_REGION_Pos (0UL) /*!< PPB MPU_RNR: REGION (Bit 0) */ +#define PPB_MPU_RNR_REGION_Msk (0xffUL) /*!< PPB MPU_RNR: REGION (Bitfield-Mask: 0xff) */ + +/* -------------------------------- PPB_MPU_RBAR -------------------------------- */ +#define PPB_MPU_RBAR_REGION_Pos (0UL) /*!< PPB MPU_RBAR: REGION (Bit 0) */ +#define PPB_MPU_RBAR_REGION_Msk (0xfUL) /*!< PPB MPU_RBAR: REGION (Bitfield-Mask: 0x0f) */ +#define PPB_MPU_RBAR_VALID_Pos (4UL) /*!< PPB MPU_RBAR: VALID (Bit 4) */ +#define PPB_MPU_RBAR_VALID_Msk (0x10UL) /*!< PPB MPU_RBAR: VALID (Bitfield-Mask: 0x01) */ +#define PPB_MPU_RBAR_ADDR_Pos (9UL) /*!< PPB MPU_RBAR: ADDR (Bit 9) */ +#define PPB_MPU_RBAR_ADDR_Msk (0xfffffe00UL) /*!< PPB MPU_RBAR: ADDR (Bitfield-Mask: 0x7fffff) */ + +/* -------------------------------- PPB_MPU_RASR -------------------------------- */ +#define PPB_MPU_RASR_ENABLE_Pos (0UL) /*!< PPB MPU_RASR: ENABLE (Bit 0) */ +#define PPB_MPU_RASR_ENABLE_Msk (0x1UL) /*!< PPB MPU_RASR: ENABLE (Bitfield-Mask: 0x01) */ +#define PPB_MPU_RASR_SIZE_Pos (1UL) /*!< PPB MPU_RASR: SIZE (Bit 1) */ +#define PPB_MPU_RASR_SIZE_Msk (0x3eUL) /*!< PPB MPU_RASR: SIZE (Bitfield-Mask: 0x1f) */ +#define PPB_MPU_RASR_SRD_Pos (8UL) /*!< PPB MPU_RASR: SRD (Bit 8) */ +#define PPB_MPU_RASR_SRD_Msk (0xff00UL) /*!< PPB MPU_RASR: SRD (Bitfield-Mask: 0xff) */ +#define PPB_MPU_RASR_B_Pos (16UL) /*!< PPB MPU_RASR: B (Bit 16) */ +#define PPB_MPU_RASR_B_Msk (0x10000UL) /*!< PPB MPU_RASR: B (Bitfield-Mask: 0x01) */ +#define PPB_MPU_RASR_C_Pos (17UL) /*!< PPB MPU_RASR: C (Bit 17) */ +#define PPB_MPU_RASR_C_Msk (0x20000UL) /*!< PPB MPU_RASR: C (Bitfield-Mask: 0x01) */ +#define PPB_MPU_RASR_S_Pos (18UL) /*!< PPB MPU_RASR: S (Bit 18) */ +#define PPB_MPU_RASR_S_Msk (0x40000UL) /*!< PPB MPU_RASR: S (Bitfield-Mask: 0x01) */ +#define PPB_MPU_RASR_TEX_Pos (19UL) /*!< PPB MPU_RASR: TEX (Bit 19) */ +#define PPB_MPU_RASR_TEX_Msk (0x380000UL) /*!< PPB MPU_RASR: TEX (Bitfield-Mask: 0x07) */ +#define PPB_MPU_RASR_AP_Pos (24UL) /*!< PPB MPU_RASR: AP (Bit 24) */ +#define PPB_MPU_RASR_AP_Msk (0x7000000UL) /*!< PPB MPU_RASR: AP (Bitfield-Mask: 0x07) */ +#define PPB_MPU_RASR_XN_Pos (28UL) /*!< PPB MPU_RASR: XN (Bit 28) */ +#define PPB_MPU_RASR_XN_Msk (0x10000000UL) /*!< PPB MPU_RASR: XN (Bitfield-Mask: 0x01) */ + +/* ------------------------------- PPB_MPU_RBAR_A1 ------------------------------ */ +#define PPB_MPU_RBAR_A1_REGION_Pos (0UL) /*!< PPB MPU_RBAR_A1: REGION (Bit 0) */ +#define PPB_MPU_RBAR_A1_REGION_Msk (0xfUL) /*!< PPB MPU_RBAR_A1: REGION (Bitfield-Mask: 0x0f) */ +#define PPB_MPU_RBAR_A1_VALID_Pos (4UL) /*!< PPB MPU_RBAR_A1: VALID (Bit 4) */ +#define PPB_MPU_RBAR_A1_VALID_Msk (0x10UL) /*!< PPB MPU_RBAR_A1: VALID (Bitfield-Mask: 0x01) */ +#define PPB_MPU_RBAR_A1_ADDR_Pos (9UL) /*!< PPB MPU_RBAR_A1: ADDR (Bit 9) */ +#define PPB_MPU_RBAR_A1_ADDR_Msk (0xfffffe00UL) /*!< PPB MPU_RBAR_A1: ADDR (Bitfield-Mask: 0x7fffff) */ + +/* ------------------------------- PPB_MPU_RASR_A1 ------------------------------ */ +#define PPB_MPU_RASR_A1_ENABLE_Pos (0UL) /*!< PPB MPU_RASR_A1: ENABLE (Bit 0) */ +#define PPB_MPU_RASR_A1_ENABLE_Msk (0x1UL) /*!< PPB MPU_RASR_A1: ENABLE (Bitfield-Mask: 0x01) */ +#define PPB_MPU_RASR_A1_SIZE_Pos (1UL) /*!< PPB MPU_RASR_A1: SIZE (Bit 1) */ +#define PPB_MPU_RASR_A1_SIZE_Msk (0x3eUL) /*!< PPB MPU_RASR_A1: SIZE (Bitfield-Mask: 0x1f) */ +#define PPB_MPU_RASR_A1_SRD_Pos (8UL) /*!< PPB MPU_RASR_A1: SRD (Bit 8) */ +#define PPB_MPU_RASR_A1_SRD_Msk (0xff00UL) /*!< PPB MPU_RASR_A1: SRD (Bitfield-Mask: 0xff) */ +#define PPB_MPU_RASR_A1_B_Pos (16UL) /*!< PPB MPU_RASR_A1: B (Bit 16) */ +#define PPB_MPU_RASR_A1_B_Msk (0x10000UL) /*!< PPB MPU_RASR_A1: B (Bitfield-Mask: 0x01) */ +#define PPB_MPU_RASR_A1_C_Pos (17UL) /*!< PPB MPU_RASR_A1: C (Bit 17) */ +#define PPB_MPU_RASR_A1_C_Msk (0x20000UL) /*!< PPB MPU_RASR_A1: C (Bitfield-Mask: 0x01) */ +#define PPB_MPU_RASR_A1_S_Pos (18UL) /*!< PPB MPU_RASR_A1: S (Bit 18) */ +#define PPB_MPU_RASR_A1_S_Msk (0x40000UL) /*!< PPB MPU_RASR_A1: S (Bitfield-Mask: 0x01) */ +#define PPB_MPU_RASR_A1_TEX_Pos (19UL) /*!< PPB MPU_RASR_A1: TEX (Bit 19) */ +#define PPB_MPU_RASR_A1_TEX_Msk (0x380000UL) /*!< PPB MPU_RASR_A1: TEX (Bitfield-Mask: 0x07) */ +#define PPB_MPU_RASR_A1_AP_Pos (24UL) /*!< PPB MPU_RASR_A1: AP (Bit 24) */ +#define PPB_MPU_RASR_A1_AP_Msk (0x7000000UL) /*!< PPB MPU_RASR_A1: AP (Bitfield-Mask: 0x07) */ +#define PPB_MPU_RASR_A1_XN_Pos (28UL) /*!< PPB MPU_RASR_A1: XN (Bit 28) */ +#define PPB_MPU_RASR_A1_XN_Msk (0x10000000UL) /*!< PPB MPU_RASR_A1: XN (Bitfield-Mask: 0x01) */ + +/* ------------------------------- PPB_MPU_RBAR_A2 ------------------------------ */ +#define PPB_MPU_RBAR_A2_REGION_Pos (0UL) /*!< PPB MPU_RBAR_A2: REGION (Bit 0) */ +#define PPB_MPU_RBAR_A2_REGION_Msk (0xfUL) /*!< PPB MPU_RBAR_A2: REGION (Bitfield-Mask: 0x0f) */ +#define PPB_MPU_RBAR_A2_VALID_Pos (4UL) /*!< PPB MPU_RBAR_A2: VALID (Bit 4) */ +#define PPB_MPU_RBAR_A2_VALID_Msk (0x10UL) /*!< PPB MPU_RBAR_A2: VALID (Bitfield-Mask: 0x01) */ +#define PPB_MPU_RBAR_A2_ADDR_Pos (9UL) /*!< PPB MPU_RBAR_A2: ADDR (Bit 9) */ +#define PPB_MPU_RBAR_A2_ADDR_Msk (0xfffffe00UL) /*!< PPB MPU_RBAR_A2: ADDR (Bitfield-Mask: 0x7fffff) */ + +/* ------------------------------- PPB_MPU_RASR_A2 ------------------------------ */ +#define PPB_MPU_RASR_A2_ENABLE_Pos (0UL) /*!< PPB MPU_RASR_A2: ENABLE (Bit 0) */ +#define PPB_MPU_RASR_A2_ENABLE_Msk (0x1UL) /*!< PPB MPU_RASR_A2: ENABLE (Bitfield-Mask: 0x01) */ +#define PPB_MPU_RASR_A2_SIZE_Pos (1UL) /*!< PPB MPU_RASR_A2: SIZE (Bit 1) */ +#define PPB_MPU_RASR_A2_SIZE_Msk (0x3eUL) /*!< PPB MPU_RASR_A2: SIZE (Bitfield-Mask: 0x1f) */ +#define PPB_MPU_RASR_A2_SRD_Pos (8UL) /*!< PPB MPU_RASR_A2: SRD (Bit 8) */ +#define PPB_MPU_RASR_A2_SRD_Msk (0xff00UL) /*!< PPB MPU_RASR_A2: SRD (Bitfield-Mask: 0xff) */ +#define PPB_MPU_RASR_A2_B_Pos (16UL) /*!< PPB MPU_RASR_A2: B (Bit 16) */ +#define PPB_MPU_RASR_A2_B_Msk (0x10000UL) /*!< PPB MPU_RASR_A2: B (Bitfield-Mask: 0x01) */ +#define PPB_MPU_RASR_A2_C_Pos (17UL) /*!< PPB MPU_RASR_A2: C (Bit 17) */ +#define PPB_MPU_RASR_A2_C_Msk (0x20000UL) /*!< PPB MPU_RASR_A2: C (Bitfield-Mask: 0x01) */ +#define PPB_MPU_RASR_A2_S_Pos (18UL) /*!< PPB MPU_RASR_A2: S (Bit 18) */ +#define PPB_MPU_RASR_A2_S_Msk (0x40000UL) /*!< PPB MPU_RASR_A2: S (Bitfield-Mask: 0x01) */ +#define PPB_MPU_RASR_A2_TEX_Pos (19UL) /*!< PPB MPU_RASR_A2: TEX (Bit 19) */ +#define PPB_MPU_RASR_A2_TEX_Msk (0x380000UL) /*!< PPB MPU_RASR_A2: TEX (Bitfield-Mask: 0x07) */ +#define PPB_MPU_RASR_A2_AP_Pos (24UL) /*!< PPB MPU_RASR_A2: AP (Bit 24) */ +#define PPB_MPU_RASR_A2_AP_Msk (0x7000000UL) /*!< PPB MPU_RASR_A2: AP (Bitfield-Mask: 0x07) */ +#define PPB_MPU_RASR_A2_XN_Pos (28UL) /*!< PPB MPU_RASR_A2: XN (Bit 28) */ +#define PPB_MPU_RASR_A2_XN_Msk (0x10000000UL) /*!< PPB MPU_RASR_A2: XN (Bitfield-Mask: 0x01) */ + +/* ------------------------------- PPB_MPU_RBAR_A3 ------------------------------ */ +#define PPB_MPU_RBAR_A3_REGION_Pos (0UL) /*!< PPB MPU_RBAR_A3: REGION (Bit 0) */ +#define PPB_MPU_RBAR_A3_REGION_Msk (0xfUL) /*!< PPB MPU_RBAR_A3: REGION (Bitfield-Mask: 0x0f) */ +#define PPB_MPU_RBAR_A3_VALID_Pos (4UL) /*!< PPB MPU_RBAR_A3: VALID (Bit 4) */ +#define PPB_MPU_RBAR_A3_VALID_Msk (0x10UL) /*!< PPB MPU_RBAR_A3: VALID (Bitfield-Mask: 0x01) */ +#define PPB_MPU_RBAR_A3_ADDR_Pos (9UL) /*!< PPB MPU_RBAR_A3: ADDR (Bit 9) */ +#define PPB_MPU_RBAR_A3_ADDR_Msk (0xfffffe00UL) /*!< PPB MPU_RBAR_A3: ADDR (Bitfield-Mask: 0x7fffff) */ + +/* ------------------------------- PPB_MPU_RASR_A3 ------------------------------ */ +#define PPB_MPU_RASR_A3_ENABLE_Pos (0UL) /*!< PPB MPU_RASR_A3: ENABLE (Bit 0) */ +#define PPB_MPU_RASR_A3_ENABLE_Msk (0x1UL) /*!< PPB MPU_RASR_A3: ENABLE (Bitfield-Mask: 0x01) */ +#define PPB_MPU_RASR_A3_SIZE_Pos (1UL) /*!< PPB MPU_RASR_A3: SIZE (Bit 1) */ +#define PPB_MPU_RASR_A3_SIZE_Msk (0x3eUL) /*!< PPB MPU_RASR_A3: SIZE (Bitfield-Mask: 0x1f) */ +#define PPB_MPU_RASR_A3_SRD_Pos (8UL) /*!< PPB MPU_RASR_A3: SRD (Bit 8) */ +#define PPB_MPU_RASR_A3_SRD_Msk (0xff00UL) /*!< PPB MPU_RASR_A3: SRD (Bitfield-Mask: 0xff) */ +#define PPB_MPU_RASR_A3_B_Pos (16UL) /*!< PPB MPU_RASR_A3: B (Bit 16) */ +#define PPB_MPU_RASR_A3_B_Msk (0x10000UL) /*!< PPB MPU_RASR_A3: B (Bitfield-Mask: 0x01) */ +#define PPB_MPU_RASR_A3_C_Pos (17UL) /*!< PPB MPU_RASR_A3: C (Bit 17) */ +#define PPB_MPU_RASR_A3_C_Msk (0x20000UL) /*!< PPB MPU_RASR_A3: C (Bitfield-Mask: 0x01) */ +#define PPB_MPU_RASR_A3_S_Pos (18UL) /*!< PPB MPU_RASR_A3: S (Bit 18) */ +#define PPB_MPU_RASR_A3_S_Msk (0x40000UL) /*!< PPB MPU_RASR_A3: S (Bitfield-Mask: 0x01) */ +#define PPB_MPU_RASR_A3_TEX_Pos (19UL) /*!< PPB MPU_RASR_A3: TEX (Bit 19) */ +#define PPB_MPU_RASR_A3_TEX_Msk (0x380000UL) /*!< PPB MPU_RASR_A3: TEX (Bitfield-Mask: 0x07) */ +#define PPB_MPU_RASR_A3_AP_Pos (24UL) /*!< PPB MPU_RASR_A3: AP (Bit 24) */ +#define PPB_MPU_RASR_A3_AP_Msk (0x7000000UL) /*!< PPB MPU_RASR_A3: AP (Bitfield-Mask: 0x07) */ +#define PPB_MPU_RASR_A3_XN_Pos (28UL) /*!< PPB MPU_RASR_A3: XN (Bit 28) */ +#define PPB_MPU_RASR_A3_XN_Msk (0x10000000UL) /*!< PPB MPU_RASR_A3: XN (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- PPB_STIR ---------------------------------- */ +#define PPB_STIR_INTID_Pos (0UL) /*!< PPB STIR: INTID (Bit 0) */ +#define PPB_STIR_INTID_Msk (0x1ffUL) /*!< PPB STIR: INTID (Bitfield-Mask: 0x1ff) */ + +/* ---------------------------------- PPB_FPCCR --------------------------------- */ +#define PPB_FPCCR_LSPACT_Pos (0UL) /*!< PPB FPCCR: LSPACT (Bit 0) */ +#define PPB_FPCCR_LSPACT_Msk (0x1UL) /*!< PPB FPCCR: LSPACT (Bitfield-Mask: 0x01) */ +#define PPB_FPCCR_USER_Pos (1UL) /*!< PPB FPCCR: USER (Bit 1) */ +#define PPB_FPCCR_USER_Msk (0x2UL) /*!< PPB FPCCR: USER (Bitfield-Mask: 0x01) */ +#define PPB_FPCCR_THREAD_Pos (3UL) /*!< PPB FPCCR: THREAD (Bit 3) */ +#define PPB_FPCCR_THREAD_Msk (0x8UL) /*!< PPB FPCCR: THREAD (Bitfield-Mask: 0x01) */ +#define PPB_FPCCR_HFRDY_Pos (4UL) /*!< PPB FPCCR: HFRDY (Bit 4) */ +#define PPB_FPCCR_HFRDY_Msk (0x10UL) /*!< PPB FPCCR: HFRDY (Bitfield-Mask: 0x01) */ +#define PPB_FPCCR_MMRDY_Pos (5UL) /*!< PPB FPCCR: MMRDY (Bit 5) */ +#define PPB_FPCCR_MMRDY_Msk (0x20UL) /*!< PPB FPCCR: MMRDY (Bitfield-Mask: 0x01) */ +#define PPB_FPCCR_BFRDY_Pos (6UL) /*!< PPB FPCCR: BFRDY (Bit 6) */ +#define PPB_FPCCR_BFRDY_Msk (0x40UL) /*!< PPB FPCCR: BFRDY (Bitfield-Mask: 0x01) */ +#define PPB_FPCCR_MONRDY_Pos (8UL) /*!< PPB FPCCR: MONRDY (Bit 8) */ +#define PPB_FPCCR_MONRDY_Msk (0x100UL) /*!< PPB FPCCR: MONRDY (Bitfield-Mask: 0x01) */ +#define PPB_FPCCR_LSPEN_Pos (30UL) /*!< PPB FPCCR: LSPEN (Bit 30) */ +#define PPB_FPCCR_LSPEN_Msk (0x40000000UL) /*!< PPB FPCCR: LSPEN (Bitfield-Mask: 0x01) */ +#define PPB_FPCCR_ASPEN_Pos (31UL) /*!< PPB FPCCR: ASPEN (Bit 31) */ +#define PPB_FPCCR_ASPEN_Msk (0x80000000UL) /*!< PPB FPCCR: ASPEN (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- PPB_FPCAR --------------------------------- */ +#define PPB_FPCAR_ADDRESS_Pos (3UL) /*!< PPB FPCAR: ADDRESS (Bit 3) */ +#define PPB_FPCAR_ADDRESS_Msk (0xfffffff8UL) /*!< PPB FPCAR: ADDRESS (Bitfield-Mask: 0x1fffffff) */ + +/* --------------------------------- PPB_FPDSCR --------------------------------- */ +#define PPB_FPDSCR_RMode_Pos (22UL) /*!< PPB FPDSCR: RMode (Bit 22) */ +#define PPB_FPDSCR_RMode_Msk (0xc00000UL) /*!< PPB FPDSCR: RMode (Bitfield-Mask: 0x03) */ +#define PPB_FPDSCR_FZ_Pos (24UL) /*!< PPB FPDSCR: FZ (Bit 24) */ +#define PPB_FPDSCR_FZ_Msk (0x1000000UL) /*!< PPB FPDSCR: FZ (Bitfield-Mask: 0x01) */ +#define PPB_FPDSCR_DN_Pos (25UL) /*!< PPB FPDSCR: DN (Bit 25) */ +#define PPB_FPDSCR_DN_Msk (0x2000000UL) /*!< PPB FPDSCR: DN (Bitfield-Mask: 0x01) */ +#define PPB_FPDSCR_AHP_Pos (26UL) /*!< PPB FPDSCR: AHP (Bit 26) */ +#define PPB_FPDSCR_AHP_Msk (0x4000000UL) /*!< PPB FPDSCR: AHP (Bitfield-Mask: 0x01) */ + + +/* ================================================================================ */ +/* ================ struct 'DLR' Position & Mask ================ */ +/* ================================================================================ */ + + +/* --------------------------------- DLR_OVRSTAT -------------------------------- */ +#define DLR_OVRSTAT_LN0_Pos (0UL) /*!< DLR OVRSTAT: LN0 (Bit 0) */ +#define DLR_OVRSTAT_LN0_Msk (0x1UL) /*!< DLR OVRSTAT: LN0 (Bitfield-Mask: 0x01) */ +#define DLR_OVRSTAT_LN1_Pos (1UL) /*!< DLR OVRSTAT: LN1 (Bit 1) */ +#define DLR_OVRSTAT_LN1_Msk (0x2UL) /*!< DLR OVRSTAT: LN1 (Bitfield-Mask: 0x01) */ +#define DLR_OVRSTAT_LN2_Pos (2UL) /*!< DLR OVRSTAT: LN2 (Bit 2) */ +#define DLR_OVRSTAT_LN2_Msk (0x4UL) /*!< DLR OVRSTAT: LN2 (Bitfield-Mask: 0x01) */ +#define DLR_OVRSTAT_LN3_Pos (3UL) /*!< DLR OVRSTAT: LN3 (Bit 3) */ +#define DLR_OVRSTAT_LN3_Msk (0x8UL) /*!< DLR OVRSTAT: LN3 (Bitfield-Mask: 0x01) */ +#define DLR_OVRSTAT_LN4_Pos (4UL) /*!< DLR OVRSTAT: LN4 (Bit 4) */ +#define DLR_OVRSTAT_LN4_Msk (0x10UL) /*!< DLR OVRSTAT: LN4 (Bitfield-Mask: 0x01) */ +#define DLR_OVRSTAT_LN5_Pos (5UL) /*!< DLR OVRSTAT: LN5 (Bit 5) */ +#define DLR_OVRSTAT_LN5_Msk (0x20UL) /*!< DLR OVRSTAT: LN5 (Bitfield-Mask: 0x01) */ +#define DLR_OVRSTAT_LN6_Pos (6UL) /*!< DLR OVRSTAT: LN6 (Bit 6) */ +#define DLR_OVRSTAT_LN6_Msk (0x40UL) /*!< DLR OVRSTAT: LN6 (Bitfield-Mask: 0x01) */ +#define DLR_OVRSTAT_LN7_Pos (7UL) /*!< DLR OVRSTAT: LN7 (Bit 7) */ +#define DLR_OVRSTAT_LN7_Msk (0x80UL) /*!< DLR OVRSTAT: LN7 (Bitfield-Mask: 0x01) */ +#define DLR_OVRSTAT_LN8_Pos (8UL) /*!< DLR OVRSTAT: LN8 (Bit 8) */ +#define DLR_OVRSTAT_LN8_Msk (0x100UL) /*!< DLR OVRSTAT: LN8 (Bitfield-Mask: 0x01) */ +#define DLR_OVRSTAT_LN9_Pos (9UL) /*!< DLR OVRSTAT: LN9 (Bit 9) */ +#define DLR_OVRSTAT_LN9_Msk (0x200UL) /*!< DLR OVRSTAT: LN9 (Bitfield-Mask: 0x01) */ +#define DLR_OVRSTAT_LN10_Pos (10UL) /*!< DLR OVRSTAT: LN10 (Bit 10) */ +#define DLR_OVRSTAT_LN10_Msk (0x400UL) /*!< DLR OVRSTAT: LN10 (Bitfield-Mask: 0x01) */ +#define DLR_OVRSTAT_LN11_Pos (11UL) /*!< DLR OVRSTAT: LN11 (Bit 11) */ +#define DLR_OVRSTAT_LN11_Msk (0x800UL) /*!< DLR OVRSTAT: LN11 (Bitfield-Mask: 0x01) */ + +/* --------------------------------- DLR_OVRCLR --------------------------------- */ +#define DLR_OVRCLR_LN0_Pos (0UL) /*!< DLR OVRCLR: LN0 (Bit 0) */ +#define DLR_OVRCLR_LN0_Msk (0x1UL) /*!< DLR OVRCLR: LN0 (Bitfield-Mask: 0x01) */ +#define DLR_OVRCLR_LN1_Pos (1UL) /*!< DLR OVRCLR: LN1 (Bit 1) */ +#define DLR_OVRCLR_LN1_Msk (0x2UL) /*!< DLR OVRCLR: LN1 (Bitfield-Mask: 0x01) */ +#define DLR_OVRCLR_LN2_Pos (2UL) /*!< DLR OVRCLR: LN2 (Bit 2) */ +#define DLR_OVRCLR_LN2_Msk (0x4UL) /*!< DLR OVRCLR: LN2 (Bitfield-Mask: 0x01) */ +#define DLR_OVRCLR_LN3_Pos (3UL) /*!< DLR OVRCLR: LN3 (Bit 3) */ +#define DLR_OVRCLR_LN3_Msk (0x8UL) /*!< DLR OVRCLR: LN3 (Bitfield-Mask: 0x01) */ +#define DLR_OVRCLR_LN4_Pos (4UL) /*!< DLR OVRCLR: LN4 (Bit 4) */ +#define DLR_OVRCLR_LN4_Msk (0x10UL) /*!< DLR OVRCLR: LN4 (Bitfield-Mask: 0x01) */ +#define DLR_OVRCLR_LN5_Pos (5UL) /*!< DLR OVRCLR: LN5 (Bit 5) */ +#define DLR_OVRCLR_LN5_Msk (0x20UL) /*!< DLR OVRCLR: LN5 (Bitfield-Mask: 0x01) */ +#define DLR_OVRCLR_LN6_Pos (6UL) /*!< DLR OVRCLR: LN6 (Bit 6) */ +#define DLR_OVRCLR_LN6_Msk (0x40UL) /*!< DLR OVRCLR: LN6 (Bitfield-Mask: 0x01) */ +#define DLR_OVRCLR_LN7_Pos (7UL) /*!< DLR OVRCLR: LN7 (Bit 7) */ +#define DLR_OVRCLR_LN7_Msk (0x80UL) /*!< DLR OVRCLR: LN7 (Bitfield-Mask: 0x01) */ +#define DLR_OVRCLR_LN8_Pos (8UL) /*!< DLR OVRCLR: LN8 (Bit 8) */ +#define DLR_OVRCLR_LN8_Msk (0x100UL) /*!< DLR OVRCLR: LN8 (Bitfield-Mask: 0x01) */ +#define DLR_OVRCLR_LN9_Pos (9UL) /*!< DLR OVRCLR: LN9 (Bit 9) */ +#define DLR_OVRCLR_LN9_Msk (0x200UL) /*!< DLR OVRCLR: LN9 (Bitfield-Mask: 0x01) */ +#define DLR_OVRCLR_LN10_Pos (10UL) /*!< DLR OVRCLR: LN10 (Bit 10) */ +#define DLR_OVRCLR_LN10_Msk (0x400UL) /*!< DLR OVRCLR: LN10 (Bitfield-Mask: 0x01) */ +#define DLR_OVRCLR_LN11_Pos (11UL) /*!< DLR OVRCLR: LN11 (Bit 11) */ +#define DLR_OVRCLR_LN11_Msk (0x800UL) /*!< DLR OVRCLR: LN11 (Bitfield-Mask: 0x01) */ + +/* --------------------------------- DLR_SRSEL0 --------------------------------- */ +#define DLR_SRSEL0_RS0_Pos (0UL) /*!< DLR SRSEL0: RS0 (Bit 0) */ +#define DLR_SRSEL0_RS0_Msk (0xfUL) /*!< DLR SRSEL0: RS0 (Bitfield-Mask: 0x0f) */ +#define DLR_SRSEL0_RS1_Pos (4UL) /*!< DLR SRSEL0: RS1 (Bit 4) */ +#define DLR_SRSEL0_RS1_Msk (0xf0UL) /*!< DLR SRSEL0: RS1 (Bitfield-Mask: 0x0f) */ +#define DLR_SRSEL0_RS2_Pos (8UL) /*!< DLR SRSEL0: RS2 (Bit 8) */ +#define DLR_SRSEL0_RS2_Msk (0xf00UL) /*!< DLR SRSEL0: RS2 (Bitfield-Mask: 0x0f) */ +#define DLR_SRSEL0_RS3_Pos (12UL) /*!< DLR SRSEL0: RS3 (Bit 12) */ +#define DLR_SRSEL0_RS3_Msk (0xf000UL) /*!< DLR SRSEL0: RS3 (Bitfield-Mask: 0x0f) */ +#define DLR_SRSEL0_RS4_Pos (16UL) /*!< DLR SRSEL0: RS4 (Bit 16) */ +#define DLR_SRSEL0_RS4_Msk (0xf0000UL) /*!< DLR SRSEL0: RS4 (Bitfield-Mask: 0x0f) */ +#define DLR_SRSEL0_RS5_Pos (20UL) /*!< DLR SRSEL0: RS5 (Bit 20) */ +#define DLR_SRSEL0_RS5_Msk (0xf00000UL) /*!< DLR SRSEL0: RS5 (Bitfield-Mask: 0x0f) */ +#define DLR_SRSEL0_RS6_Pos (24UL) /*!< DLR SRSEL0: RS6 (Bit 24) */ +#define DLR_SRSEL0_RS6_Msk (0xf000000UL) /*!< DLR SRSEL0: RS6 (Bitfield-Mask: 0x0f) */ +#define DLR_SRSEL0_RS7_Pos (28UL) /*!< DLR SRSEL0: RS7 (Bit 28) */ +#define DLR_SRSEL0_RS7_Msk (0xf0000000UL) /*!< DLR SRSEL0: RS7 (Bitfield-Mask: 0x0f) */ + +/* --------------------------------- DLR_SRSEL1 --------------------------------- */ +#define DLR_SRSEL1_RS8_Pos (0UL) /*!< DLR SRSEL1: RS8 (Bit 0) */ +#define DLR_SRSEL1_RS8_Msk (0xfUL) /*!< DLR SRSEL1: RS8 (Bitfield-Mask: 0x0f) */ +#define DLR_SRSEL1_RS9_Pos (4UL) /*!< DLR SRSEL1: RS9 (Bit 4) */ +#define DLR_SRSEL1_RS9_Msk (0xf0UL) /*!< DLR SRSEL1: RS9 (Bitfield-Mask: 0x0f) */ +#define DLR_SRSEL1_RS10_Pos (8UL) /*!< DLR SRSEL1: RS10 (Bit 8) */ +#define DLR_SRSEL1_RS10_Msk (0xf00UL) /*!< DLR SRSEL1: RS10 (Bitfield-Mask: 0x0f) */ +#define DLR_SRSEL1_RS11_Pos (12UL) /*!< DLR SRSEL1: RS11 (Bit 12) */ +#define DLR_SRSEL1_RS11_Msk (0xf000UL) /*!< DLR SRSEL1: RS11 (Bitfield-Mask: 0x0f) */ + +/* ---------------------------------- DLR_LNEN ---------------------------------- */ +#define DLR_LNEN_LN0_Pos (0UL) /*!< DLR LNEN: LN0 (Bit 0) */ +#define DLR_LNEN_LN0_Msk (0x1UL) /*!< DLR LNEN: LN0 (Bitfield-Mask: 0x01) */ +#define DLR_LNEN_LN1_Pos (1UL) /*!< DLR LNEN: LN1 (Bit 1) */ +#define DLR_LNEN_LN1_Msk (0x2UL) /*!< DLR LNEN: LN1 (Bitfield-Mask: 0x01) */ +#define DLR_LNEN_LN2_Pos (2UL) /*!< DLR LNEN: LN2 (Bit 2) */ +#define DLR_LNEN_LN2_Msk (0x4UL) /*!< DLR LNEN: LN2 (Bitfield-Mask: 0x01) */ +#define DLR_LNEN_LN3_Pos (3UL) /*!< DLR LNEN: LN3 (Bit 3) */ +#define DLR_LNEN_LN3_Msk (0x8UL) /*!< DLR LNEN: LN3 (Bitfield-Mask: 0x01) */ +#define DLR_LNEN_LN4_Pos (4UL) /*!< DLR LNEN: LN4 (Bit 4) */ +#define DLR_LNEN_LN4_Msk (0x10UL) /*!< DLR LNEN: LN4 (Bitfield-Mask: 0x01) */ +#define DLR_LNEN_LN5_Pos (5UL) /*!< DLR LNEN: LN5 (Bit 5) */ +#define DLR_LNEN_LN5_Msk (0x20UL) /*!< DLR LNEN: LN5 (Bitfield-Mask: 0x01) */ +#define DLR_LNEN_LN6_Pos (6UL) /*!< DLR LNEN: LN6 (Bit 6) */ +#define DLR_LNEN_LN6_Msk (0x40UL) /*!< DLR LNEN: LN6 (Bitfield-Mask: 0x01) */ +#define DLR_LNEN_LN7_Pos (7UL) /*!< DLR LNEN: LN7 (Bit 7) */ +#define DLR_LNEN_LN7_Msk (0x80UL) /*!< DLR LNEN: LN7 (Bitfield-Mask: 0x01) */ +#define DLR_LNEN_LN8_Pos (8UL) /*!< DLR LNEN: LN8 (Bit 8) */ +#define DLR_LNEN_LN8_Msk (0x100UL) /*!< DLR LNEN: LN8 (Bitfield-Mask: 0x01) */ +#define DLR_LNEN_LN9_Pos (9UL) /*!< DLR LNEN: LN9 (Bit 9) */ +#define DLR_LNEN_LN9_Msk (0x200UL) /*!< DLR LNEN: LN9 (Bitfield-Mask: 0x01) */ +#define DLR_LNEN_LN10_Pos (10UL) /*!< DLR LNEN: LN10 (Bit 10) */ +#define DLR_LNEN_LN10_Msk (0x400UL) /*!< DLR LNEN: LN10 (Bitfield-Mask: 0x01) */ +#define DLR_LNEN_LN11_Pos (11UL) /*!< DLR LNEN: LN11 (Bit 11) */ +#define DLR_LNEN_LN11_Msk (0x800UL) /*!< DLR LNEN: LN11 (Bitfield-Mask: 0x01) */ + + +/* ================================================================================ */ +/* ================ Group 'ERU' Position & Mask ================ */ +/* ================================================================================ */ + + +/* --------------------------------- ERU_EXISEL --------------------------------- */ +#define ERU_EXISEL_EXS0A_Pos (0UL) /*!< ERU EXISEL: EXS0A (Bit 0) */ +#define ERU_EXISEL_EXS0A_Msk (0x3UL) /*!< ERU EXISEL: EXS0A (Bitfield-Mask: 0x03) */ +#define ERU_EXISEL_EXS0B_Pos (2UL) /*!< ERU EXISEL: EXS0B (Bit 2) */ +#define ERU_EXISEL_EXS0B_Msk (0xcUL) /*!< ERU EXISEL: EXS0B (Bitfield-Mask: 0x03) */ +#define ERU_EXISEL_EXS1A_Pos (4UL) /*!< ERU EXISEL: EXS1A (Bit 4) */ +#define ERU_EXISEL_EXS1A_Msk (0x30UL) /*!< ERU EXISEL: EXS1A (Bitfield-Mask: 0x03) */ +#define ERU_EXISEL_EXS1B_Pos (6UL) /*!< ERU EXISEL: EXS1B (Bit 6) */ +#define ERU_EXISEL_EXS1B_Msk (0xc0UL) /*!< ERU EXISEL: EXS1B (Bitfield-Mask: 0x03) */ +#define ERU_EXISEL_EXS2A_Pos (8UL) /*!< ERU EXISEL: EXS2A (Bit 8) */ +#define ERU_EXISEL_EXS2A_Msk (0x300UL) /*!< ERU EXISEL: EXS2A (Bitfield-Mask: 0x03) */ +#define ERU_EXISEL_EXS2B_Pos (10UL) /*!< ERU EXISEL: EXS2B (Bit 10) */ +#define ERU_EXISEL_EXS2B_Msk (0xc00UL) /*!< ERU EXISEL: EXS2B (Bitfield-Mask: 0x03) */ +#define ERU_EXISEL_EXS3A_Pos (12UL) /*!< ERU EXISEL: EXS3A (Bit 12) */ +#define ERU_EXISEL_EXS3A_Msk (0x3000UL) /*!< ERU EXISEL: EXS3A (Bitfield-Mask: 0x03) */ +#define ERU_EXISEL_EXS3B_Pos (14UL) /*!< ERU EXISEL: EXS3B (Bit 14) */ +#define ERU_EXISEL_EXS3B_Msk (0xc000UL) /*!< ERU EXISEL: EXS3B (Bitfield-Mask: 0x03) */ + +/* --------------------------------- ERU_EXICON --------------------------------- */ +#define ERU_EXICON_PE_Pos (0UL) /*!< ERU EXICON: PE (Bit 0) */ +#define ERU_EXICON_PE_Msk (0x1UL) /*!< ERU EXICON: PE (Bitfield-Mask: 0x01) */ +#define ERU_EXICON_LD_Pos (1UL) /*!< ERU EXICON: LD (Bit 1) */ +#define ERU_EXICON_LD_Msk (0x2UL) /*!< ERU EXICON: LD (Bitfield-Mask: 0x01) */ +#define ERU_EXICON_RE_Pos (2UL) /*!< ERU EXICON: RE (Bit 2) */ +#define ERU_EXICON_RE_Msk (0x4UL) /*!< ERU EXICON: RE (Bitfield-Mask: 0x01) */ +#define ERU_EXICON_FE_Pos (3UL) /*!< ERU EXICON: FE (Bit 3) */ +#define ERU_EXICON_FE_Msk (0x8UL) /*!< ERU EXICON: FE (Bitfield-Mask: 0x01) */ +#define ERU_EXICON_OCS_Pos (4UL) /*!< ERU EXICON: OCS (Bit 4) */ +#define ERU_EXICON_OCS_Msk (0x70UL) /*!< ERU EXICON: OCS (Bitfield-Mask: 0x07) */ +#define ERU_EXICON_FL_Pos (7UL) /*!< ERU EXICON: FL (Bit 7) */ +#define ERU_EXICON_FL_Msk (0x80UL) /*!< ERU EXICON: FL (Bitfield-Mask: 0x01) */ +#define ERU_EXICON_SS_Pos (8UL) /*!< ERU EXICON: SS (Bit 8) */ +#define ERU_EXICON_SS_Msk (0x300UL) /*!< ERU EXICON: SS (Bitfield-Mask: 0x03) */ +#define ERU_EXICON_NA_Pos (10UL) /*!< ERU EXICON: NA (Bit 10) */ +#define ERU_EXICON_NA_Msk (0x400UL) /*!< ERU EXICON: NA (Bitfield-Mask: 0x01) */ +#define ERU_EXICON_NB_Pos (11UL) /*!< ERU EXICON: NB (Bit 11) */ +#define ERU_EXICON_NB_Msk (0x800UL) /*!< ERU EXICON: NB (Bitfield-Mask: 0x01) */ + +/* --------------------------------- ERU_EXOCON --------------------------------- */ +#define ERU_EXOCON_ISS_Pos (0UL) /*!< ERU EXOCON: ISS (Bit 0) */ +#define ERU_EXOCON_ISS_Msk (0x3UL) /*!< ERU EXOCON: ISS (Bitfield-Mask: 0x03) */ +#define ERU_EXOCON_GEEN_Pos (2UL) /*!< ERU EXOCON: GEEN (Bit 2) */ +#define ERU_EXOCON_GEEN_Msk (0x4UL) /*!< ERU EXOCON: GEEN (Bitfield-Mask: 0x01) */ +#define ERU_EXOCON_PDR_Pos (3UL) /*!< ERU EXOCON: PDR (Bit 3) */ +#define ERU_EXOCON_PDR_Msk (0x8UL) /*!< ERU EXOCON: PDR (Bitfield-Mask: 0x01) */ +#define ERU_EXOCON_GP_Pos (4UL) /*!< ERU EXOCON: GP (Bit 4) */ +#define ERU_EXOCON_GP_Msk (0x30UL) /*!< ERU EXOCON: GP (Bitfield-Mask: 0x03) */ +#define ERU_EXOCON_IPEN0_Pos (12UL) /*!< ERU EXOCON: IPEN0 (Bit 12) */ +#define ERU_EXOCON_IPEN0_Msk (0x1000UL) /*!< ERU EXOCON: IPEN0 (Bitfield-Mask: 0x01) */ +#define ERU_EXOCON_IPEN1_Pos (13UL) /*!< ERU EXOCON: IPEN1 (Bit 13) */ +#define ERU_EXOCON_IPEN1_Msk (0x2000UL) /*!< ERU EXOCON: IPEN1 (Bitfield-Mask: 0x01) */ +#define ERU_EXOCON_IPEN2_Pos (14UL) /*!< ERU EXOCON: IPEN2 (Bit 14) */ +#define ERU_EXOCON_IPEN2_Msk (0x4000UL) /*!< ERU EXOCON: IPEN2 (Bitfield-Mask: 0x01) */ +#define ERU_EXOCON_IPEN3_Pos (15UL) /*!< ERU EXOCON: IPEN3 (Bit 15) */ +#define ERU_EXOCON_IPEN3_Msk (0x8000UL) /*!< ERU EXOCON: IPEN3 (Bitfield-Mask: 0x01) */ + + +/* ================================================================================ */ +/* ================ struct 'GPDMA0' Position & Mask ================ */ +/* ================================================================================ */ + + +/* -------------------------------- GPDMA0_RAWTFR ------------------------------- */ +#define GPDMA0_RAWTFR_CH0_Pos (0UL) /*!< GPDMA0 RAWTFR: CH0 (Bit 0) */ +#define GPDMA0_RAWTFR_CH0_Msk (0x1UL) /*!< GPDMA0 RAWTFR: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_RAWTFR_CH1_Pos (1UL) /*!< GPDMA0 RAWTFR: CH1 (Bit 1) */ +#define GPDMA0_RAWTFR_CH1_Msk (0x2UL) /*!< GPDMA0 RAWTFR: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_RAWTFR_CH2_Pos (2UL) /*!< GPDMA0 RAWTFR: CH2 (Bit 2) */ +#define GPDMA0_RAWTFR_CH2_Msk (0x4UL) /*!< GPDMA0 RAWTFR: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_RAWTFR_CH3_Pos (3UL) /*!< GPDMA0 RAWTFR: CH3 (Bit 3) */ +#define GPDMA0_RAWTFR_CH3_Msk (0x8UL) /*!< GPDMA0 RAWTFR: CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_RAWTFR_CH4_Pos (4UL) /*!< GPDMA0 RAWTFR: CH4 (Bit 4) */ +#define GPDMA0_RAWTFR_CH4_Msk (0x10UL) /*!< GPDMA0 RAWTFR: CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_RAWTFR_CH5_Pos (5UL) /*!< GPDMA0 RAWTFR: CH5 (Bit 5) */ +#define GPDMA0_RAWTFR_CH5_Msk (0x20UL) /*!< GPDMA0 RAWTFR: CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_RAWTFR_CH6_Pos (6UL) /*!< GPDMA0 RAWTFR: CH6 (Bit 6) */ +#define GPDMA0_RAWTFR_CH6_Msk (0x40UL) /*!< GPDMA0 RAWTFR: CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_RAWTFR_CH7_Pos (7UL) /*!< GPDMA0 RAWTFR: CH7 (Bit 7) */ +#define GPDMA0_RAWTFR_CH7_Msk (0x80UL) /*!< GPDMA0 RAWTFR: CH7 (Bitfield-Mask: 0x01) */ + +/* ------------------------------- GPDMA0_RAWBLOCK ------------------------------ */ +#define GPDMA0_RAWBLOCK_CH0_Pos (0UL) /*!< GPDMA0 RAWBLOCK: CH0 (Bit 0) */ +#define GPDMA0_RAWBLOCK_CH0_Msk (0x1UL) /*!< GPDMA0 RAWBLOCK: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_RAWBLOCK_CH1_Pos (1UL) /*!< GPDMA0 RAWBLOCK: CH1 (Bit 1) */ +#define GPDMA0_RAWBLOCK_CH1_Msk (0x2UL) /*!< GPDMA0 RAWBLOCK: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_RAWBLOCK_CH2_Pos (2UL) /*!< GPDMA0 RAWBLOCK: CH2 (Bit 2) */ +#define GPDMA0_RAWBLOCK_CH2_Msk (0x4UL) /*!< GPDMA0 RAWBLOCK: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_RAWBLOCK_CH3_Pos (3UL) /*!< GPDMA0 RAWBLOCK: CH3 (Bit 3) */ +#define GPDMA0_RAWBLOCK_CH3_Msk (0x8UL) /*!< GPDMA0 RAWBLOCK: CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_RAWBLOCK_CH4_Pos (4UL) /*!< GPDMA0 RAWBLOCK: CH4 (Bit 4) */ +#define GPDMA0_RAWBLOCK_CH4_Msk (0x10UL) /*!< GPDMA0 RAWBLOCK: CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_RAWBLOCK_CH5_Pos (5UL) /*!< GPDMA0 RAWBLOCK: CH5 (Bit 5) */ +#define GPDMA0_RAWBLOCK_CH5_Msk (0x20UL) /*!< GPDMA0 RAWBLOCK: CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_RAWBLOCK_CH6_Pos (6UL) /*!< GPDMA0 RAWBLOCK: CH6 (Bit 6) */ +#define GPDMA0_RAWBLOCK_CH6_Msk (0x40UL) /*!< GPDMA0 RAWBLOCK: CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_RAWBLOCK_CH7_Pos (7UL) /*!< GPDMA0 RAWBLOCK: CH7 (Bit 7) */ +#define GPDMA0_RAWBLOCK_CH7_Msk (0x80UL) /*!< GPDMA0 RAWBLOCK: CH7 (Bitfield-Mask: 0x01) */ + +/* ------------------------------ GPDMA0_RAWSRCTRAN ----------------------------- */ +#define GPDMA0_RAWSRCTRAN_CH0_Pos (0UL) /*!< GPDMA0 RAWSRCTRAN: CH0 (Bit 0) */ +#define GPDMA0_RAWSRCTRAN_CH0_Msk (0x1UL) /*!< GPDMA0 RAWSRCTRAN: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_RAWSRCTRAN_CH1_Pos (1UL) /*!< GPDMA0 RAWSRCTRAN: CH1 (Bit 1) */ +#define GPDMA0_RAWSRCTRAN_CH1_Msk (0x2UL) /*!< GPDMA0 RAWSRCTRAN: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_RAWSRCTRAN_CH2_Pos (2UL) /*!< GPDMA0 RAWSRCTRAN: CH2 (Bit 2) */ +#define GPDMA0_RAWSRCTRAN_CH2_Msk (0x4UL) /*!< GPDMA0 RAWSRCTRAN: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_RAWSRCTRAN_CH3_Pos (3UL) /*!< GPDMA0 RAWSRCTRAN: CH3 (Bit 3) */ +#define GPDMA0_RAWSRCTRAN_CH3_Msk (0x8UL) /*!< GPDMA0 RAWSRCTRAN: CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_RAWSRCTRAN_CH4_Pos (4UL) /*!< GPDMA0 RAWSRCTRAN: CH4 (Bit 4) */ +#define GPDMA0_RAWSRCTRAN_CH4_Msk (0x10UL) /*!< GPDMA0 RAWSRCTRAN: CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_RAWSRCTRAN_CH5_Pos (5UL) /*!< GPDMA0 RAWSRCTRAN: CH5 (Bit 5) */ +#define GPDMA0_RAWSRCTRAN_CH5_Msk (0x20UL) /*!< GPDMA0 RAWSRCTRAN: CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_RAWSRCTRAN_CH6_Pos (6UL) /*!< GPDMA0 RAWSRCTRAN: CH6 (Bit 6) */ +#define GPDMA0_RAWSRCTRAN_CH6_Msk (0x40UL) /*!< GPDMA0 RAWSRCTRAN: CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_RAWSRCTRAN_CH7_Pos (7UL) /*!< GPDMA0 RAWSRCTRAN: CH7 (Bit 7) */ +#define GPDMA0_RAWSRCTRAN_CH7_Msk (0x80UL) /*!< GPDMA0 RAWSRCTRAN: CH7 (Bitfield-Mask: 0x01) */ + +/* ------------------------------ GPDMA0_RAWDSTTRAN ----------------------------- */ +#define GPDMA0_RAWDSTTRAN_CH0_Pos (0UL) /*!< GPDMA0 RAWDSTTRAN: CH0 (Bit 0) */ +#define GPDMA0_RAWDSTTRAN_CH0_Msk (0x1UL) /*!< GPDMA0 RAWDSTTRAN: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_RAWDSTTRAN_CH1_Pos (1UL) /*!< GPDMA0 RAWDSTTRAN: CH1 (Bit 1) */ +#define GPDMA0_RAWDSTTRAN_CH1_Msk (0x2UL) /*!< GPDMA0 RAWDSTTRAN: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_RAWDSTTRAN_CH2_Pos (2UL) /*!< GPDMA0 RAWDSTTRAN: CH2 (Bit 2) */ +#define GPDMA0_RAWDSTTRAN_CH2_Msk (0x4UL) /*!< GPDMA0 RAWDSTTRAN: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_RAWDSTTRAN_CH3_Pos (3UL) /*!< GPDMA0 RAWDSTTRAN: CH3 (Bit 3) */ +#define GPDMA0_RAWDSTTRAN_CH3_Msk (0x8UL) /*!< GPDMA0 RAWDSTTRAN: CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_RAWDSTTRAN_CH4_Pos (4UL) /*!< GPDMA0 RAWDSTTRAN: CH4 (Bit 4) */ +#define GPDMA0_RAWDSTTRAN_CH4_Msk (0x10UL) /*!< GPDMA0 RAWDSTTRAN: CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_RAWDSTTRAN_CH5_Pos (5UL) /*!< GPDMA0 RAWDSTTRAN: CH5 (Bit 5) */ +#define GPDMA0_RAWDSTTRAN_CH5_Msk (0x20UL) /*!< GPDMA0 RAWDSTTRAN: CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_RAWDSTTRAN_CH6_Pos (6UL) /*!< GPDMA0 RAWDSTTRAN: CH6 (Bit 6) */ +#define GPDMA0_RAWDSTTRAN_CH6_Msk (0x40UL) /*!< GPDMA0 RAWDSTTRAN: CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_RAWDSTTRAN_CH7_Pos (7UL) /*!< GPDMA0 RAWDSTTRAN: CH7 (Bit 7) */ +#define GPDMA0_RAWDSTTRAN_CH7_Msk (0x80UL) /*!< GPDMA0 RAWDSTTRAN: CH7 (Bitfield-Mask: 0x01) */ + +/* -------------------------------- GPDMA0_RAWERR ------------------------------- */ +#define GPDMA0_RAWERR_CH0_Pos (0UL) /*!< GPDMA0 RAWERR: CH0 (Bit 0) */ +#define GPDMA0_RAWERR_CH0_Msk (0x1UL) /*!< GPDMA0 RAWERR: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_RAWERR_CH1_Pos (1UL) /*!< GPDMA0 RAWERR: CH1 (Bit 1) */ +#define GPDMA0_RAWERR_CH1_Msk (0x2UL) /*!< GPDMA0 RAWERR: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_RAWERR_CH2_Pos (2UL) /*!< GPDMA0 RAWERR: CH2 (Bit 2) */ +#define GPDMA0_RAWERR_CH2_Msk (0x4UL) /*!< GPDMA0 RAWERR: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_RAWERR_CH3_Pos (3UL) /*!< GPDMA0 RAWERR: CH3 (Bit 3) */ +#define GPDMA0_RAWERR_CH3_Msk (0x8UL) /*!< GPDMA0 RAWERR: CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_RAWERR_CH4_Pos (4UL) /*!< GPDMA0 RAWERR: CH4 (Bit 4) */ +#define GPDMA0_RAWERR_CH4_Msk (0x10UL) /*!< GPDMA0 RAWERR: CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_RAWERR_CH5_Pos (5UL) /*!< GPDMA0 RAWERR: CH5 (Bit 5) */ +#define GPDMA0_RAWERR_CH5_Msk (0x20UL) /*!< GPDMA0 RAWERR: CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_RAWERR_CH6_Pos (6UL) /*!< GPDMA0 RAWERR: CH6 (Bit 6) */ +#define GPDMA0_RAWERR_CH6_Msk (0x40UL) /*!< GPDMA0 RAWERR: CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_RAWERR_CH7_Pos (7UL) /*!< GPDMA0 RAWERR: CH7 (Bit 7) */ +#define GPDMA0_RAWERR_CH7_Msk (0x80UL) /*!< GPDMA0 RAWERR: CH7 (Bitfield-Mask: 0x01) */ + +/* ------------------------------ GPDMA0_STATUSTFR ------------------------------ */ +#define GPDMA0_STATUSTFR_CH0_Pos (0UL) /*!< GPDMA0 STATUSTFR: CH0 (Bit 0) */ +#define GPDMA0_STATUSTFR_CH0_Msk (0x1UL) /*!< GPDMA0 STATUSTFR: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSTFR_CH1_Pos (1UL) /*!< GPDMA0 STATUSTFR: CH1 (Bit 1) */ +#define GPDMA0_STATUSTFR_CH1_Msk (0x2UL) /*!< GPDMA0 STATUSTFR: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSTFR_CH2_Pos (2UL) /*!< GPDMA0 STATUSTFR: CH2 (Bit 2) */ +#define GPDMA0_STATUSTFR_CH2_Msk (0x4UL) /*!< GPDMA0 STATUSTFR: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSTFR_CH3_Pos (3UL) /*!< GPDMA0 STATUSTFR: CH3 (Bit 3) */ +#define GPDMA0_STATUSTFR_CH3_Msk (0x8UL) /*!< GPDMA0 STATUSTFR: CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSTFR_CH4_Pos (4UL) /*!< GPDMA0 STATUSTFR: CH4 (Bit 4) */ +#define GPDMA0_STATUSTFR_CH4_Msk (0x10UL) /*!< GPDMA0 STATUSTFR: CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSTFR_CH5_Pos (5UL) /*!< GPDMA0 STATUSTFR: CH5 (Bit 5) */ +#define GPDMA0_STATUSTFR_CH5_Msk (0x20UL) /*!< GPDMA0 STATUSTFR: CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSTFR_CH6_Pos (6UL) /*!< GPDMA0 STATUSTFR: CH6 (Bit 6) */ +#define GPDMA0_STATUSTFR_CH6_Msk (0x40UL) /*!< GPDMA0 STATUSTFR: CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSTFR_CH7_Pos (7UL) /*!< GPDMA0 STATUSTFR: CH7 (Bit 7) */ +#define GPDMA0_STATUSTFR_CH7_Msk (0x80UL) /*!< GPDMA0 STATUSTFR: CH7 (Bitfield-Mask: 0x01) */ + +/* ----------------------------- GPDMA0_STATUSBLOCK ----------------------------- */ +#define GPDMA0_STATUSBLOCK_CH0_Pos (0UL) /*!< GPDMA0 STATUSBLOCK: CH0 (Bit 0) */ +#define GPDMA0_STATUSBLOCK_CH0_Msk (0x1UL) /*!< GPDMA0 STATUSBLOCK: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSBLOCK_CH1_Pos (1UL) /*!< GPDMA0 STATUSBLOCK: CH1 (Bit 1) */ +#define GPDMA0_STATUSBLOCK_CH1_Msk (0x2UL) /*!< GPDMA0 STATUSBLOCK: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSBLOCK_CH2_Pos (2UL) /*!< GPDMA0 STATUSBLOCK: CH2 (Bit 2) */ +#define GPDMA0_STATUSBLOCK_CH2_Msk (0x4UL) /*!< GPDMA0 STATUSBLOCK: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSBLOCK_CH3_Pos (3UL) /*!< GPDMA0 STATUSBLOCK: CH3 (Bit 3) */ +#define GPDMA0_STATUSBLOCK_CH3_Msk (0x8UL) /*!< GPDMA0 STATUSBLOCK: CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSBLOCK_CH4_Pos (4UL) /*!< GPDMA0 STATUSBLOCK: CH4 (Bit 4) */ +#define GPDMA0_STATUSBLOCK_CH4_Msk (0x10UL) /*!< GPDMA0 STATUSBLOCK: CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSBLOCK_CH5_Pos (5UL) /*!< GPDMA0 STATUSBLOCK: CH5 (Bit 5) */ +#define GPDMA0_STATUSBLOCK_CH5_Msk (0x20UL) /*!< GPDMA0 STATUSBLOCK: CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSBLOCK_CH6_Pos (6UL) /*!< GPDMA0 STATUSBLOCK: CH6 (Bit 6) */ +#define GPDMA0_STATUSBLOCK_CH6_Msk (0x40UL) /*!< GPDMA0 STATUSBLOCK: CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSBLOCK_CH7_Pos (7UL) /*!< GPDMA0 STATUSBLOCK: CH7 (Bit 7) */ +#define GPDMA0_STATUSBLOCK_CH7_Msk (0x80UL) /*!< GPDMA0 STATUSBLOCK: CH7 (Bitfield-Mask: 0x01) */ + +/* ---------------------------- GPDMA0_STATUSSRCTRAN ---------------------------- */ +#define GPDMA0_STATUSSRCTRAN_CH0_Pos (0UL) /*!< GPDMA0 STATUSSRCTRAN: CH0 (Bit 0) */ +#define GPDMA0_STATUSSRCTRAN_CH0_Msk (0x1UL) /*!< GPDMA0 STATUSSRCTRAN: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSSRCTRAN_CH1_Pos (1UL) /*!< GPDMA0 STATUSSRCTRAN: CH1 (Bit 1) */ +#define GPDMA0_STATUSSRCTRAN_CH1_Msk (0x2UL) /*!< GPDMA0 STATUSSRCTRAN: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSSRCTRAN_CH2_Pos (2UL) /*!< GPDMA0 STATUSSRCTRAN: CH2 (Bit 2) */ +#define GPDMA0_STATUSSRCTRAN_CH2_Msk (0x4UL) /*!< GPDMA0 STATUSSRCTRAN: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSSRCTRAN_CH3_Pos (3UL) /*!< GPDMA0 STATUSSRCTRAN: CH3 (Bit 3) */ +#define GPDMA0_STATUSSRCTRAN_CH3_Msk (0x8UL) /*!< GPDMA0 STATUSSRCTRAN: CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSSRCTRAN_CH4_Pos (4UL) /*!< GPDMA0 STATUSSRCTRAN: CH4 (Bit 4) */ +#define GPDMA0_STATUSSRCTRAN_CH4_Msk (0x10UL) /*!< GPDMA0 STATUSSRCTRAN: CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSSRCTRAN_CH5_Pos (5UL) /*!< GPDMA0 STATUSSRCTRAN: CH5 (Bit 5) */ +#define GPDMA0_STATUSSRCTRAN_CH5_Msk (0x20UL) /*!< GPDMA0 STATUSSRCTRAN: CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSSRCTRAN_CH6_Pos (6UL) /*!< GPDMA0 STATUSSRCTRAN: CH6 (Bit 6) */ +#define GPDMA0_STATUSSRCTRAN_CH6_Msk (0x40UL) /*!< GPDMA0 STATUSSRCTRAN: CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSSRCTRAN_CH7_Pos (7UL) /*!< GPDMA0 STATUSSRCTRAN: CH7 (Bit 7) */ +#define GPDMA0_STATUSSRCTRAN_CH7_Msk (0x80UL) /*!< GPDMA0 STATUSSRCTRAN: CH7 (Bitfield-Mask: 0x01) */ + +/* ---------------------------- GPDMA0_STATUSDSTTRAN ---------------------------- */ +#define GPDMA0_STATUSDSTTRAN_CH0_Pos (0UL) /*!< GPDMA0 STATUSDSTTRAN: CH0 (Bit 0) */ +#define GPDMA0_STATUSDSTTRAN_CH0_Msk (0x1UL) /*!< GPDMA0 STATUSDSTTRAN: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSDSTTRAN_CH1_Pos (1UL) /*!< GPDMA0 STATUSDSTTRAN: CH1 (Bit 1) */ +#define GPDMA0_STATUSDSTTRAN_CH1_Msk (0x2UL) /*!< GPDMA0 STATUSDSTTRAN: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSDSTTRAN_CH2_Pos (2UL) /*!< GPDMA0 STATUSDSTTRAN: CH2 (Bit 2) */ +#define GPDMA0_STATUSDSTTRAN_CH2_Msk (0x4UL) /*!< GPDMA0 STATUSDSTTRAN: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSDSTTRAN_CH3_Pos (3UL) /*!< GPDMA0 STATUSDSTTRAN: CH3 (Bit 3) */ +#define GPDMA0_STATUSDSTTRAN_CH3_Msk (0x8UL) /*!< GPDMA0 STATUSDSTTRAN: CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSDSTTRAN_CH4_Pos (4UL) /*!< GPDMA0 STATUSDSTTRAN: CH4 (Bit 4) */ +#define GPDMA0_STATUSDSTTRAN_CH4_Msk (0x10UL) /*!< GPDMA0 STATUSDSTTRAN: CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSDSTTRAN_CH5_Pos (5UL) /*!< GPDMA0 STATUSDSTTRAN: CH5 (Bit 5) */ +#define GPDMA0_STATUSDSTTRAN_CH5_Msk (0x20UL) /*!< GPDMA0 STATUSDSTTRAN: CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSDSTTRAN_CH6_Pos (6UL) /*!< GPDMA0 STATUSDSTTRAN: CH6 (Bit 6) */ +#define GPDMA0_STATUSDSTTRAN_CH6_Msk (0x40UL) /*!< GPDMA0 STATUSDSTTRAN: CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSDSTTRAN_CH7_Pos (7UL) /*!< GPDMA0 STATUSDSTTRAN: CH7 (Bit 7) */ +#define GPDMA0_STATUSDSTTRAN_CH7_Msk (0x80UL) /*!< GPDMA0 STATUSDSTTRAN: CH7 (Bitfield-Mask: 0x01) */ + +/* ------------------------------ GPDMA0_STATUSERR ------------------------------ */ +#define GPDMA0_STATUSERR_CH0_Pos (0UL) /*!< GPDMA0 STATUSERR: CH0 (Bit 0) */ +#define GPDMA0_STATUSERR_CH0_Msk (0x1UL) /*!< GPDMA0 STATUSERR: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSERR_CH1_Pos (1UL) /*!< GPDMA0 STATUSERR: CH1 (Bit 1) */ +#define GPDMA0_STATUSERR_CH1_Msk (0x2UL) /*!< GPDMA0 STATUSERR: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSERR_CH2_Pos (2UL) /*!< GPDMA0 STATUSERR: CH2 (Bit 2) */ +#define GPDMA0_STATUSERR_CH2_Msk (0x4UL) /*!< GPDMA0 STATUSERR: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSERR_CH3_Pos (3UL) /*!< GPDMA0 STATUSERR: CH3 (Bit 3) */ +#define GPDMA0_STATUSERR_CH3_Msk (0x8UL) /*!< GPDMA0 STATUSERR: CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSERR_CH4_Pos (4UL) /*!< GPDMA0 STATUSERR: CH4 (Bit 4) */ +#define GPDMA0_STATUSERR_CH4_Msk (0x10UL) /*!< GPDMA0 STATUSERR: CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSERR_CH5_Pos (5UL) /*!< GPDMA0 STATUSERR: CH5 (Bit 5) */ +#define GPDMA0_STATUSERR_CH5_Msk (0x20UL) /*!< GPDMA0 STATUSERR: CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSERR_CH6_Pos (6UL) /*!< GPDMA0 STATUSERR: CH6 (Bit 6) */ +#define GPDMA0_STATUSERR_CH6_Msk (0x40UL) /*!< GPDMA0 STATUSERR: CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSERR_CH7_Pos (7UL) /*!< GPDMA0 STATUSERR: CH7 (Bit 7) */ +#define GPDMA0_STATUSERR_CH7_Msk (0x80UL) /*!< GPDMA0 STATUSERR: CH7 (Bitfield-Mask: 0x01) */ + +/* ------------------------------- GPDMA0_MASKTFR ------------------------------- */ +#define GPDMA0_MASKTFR_CH0_Pos (0UL) /*!< GPDMA0 MASKTFR: CH0 (Bit 0) */ +#define GPDMA0_MASKTFR_CH0_Msk (0x1UL) /*!< GPDMA0 MASKTFR: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKTFR_CH1_Pos (1UL) /*!< GPDMA0 MASKTFR: CH1 (Bit 1) */ +#define GPDMA0_MASKTFR_CH1_Msk (0x2UL) /*!< GPDMA0 MASKTFR: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKTFR_CH2_Pos (2UL) /*!< GPDMA0 MASKTFR: CH2 (Bit 2) */ +#define GPDMA0_MASKTFR_CH2_Msk (0x4UL) /*!< GPDMA0 MASKTFR: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKTFR_CH3_Pos (3UL) /*!< GPDMA0 MASKTFR: CH3 (Bit 3) */ +#define GPDMA0_MASKTFR_CH3_Msk (0x8UL) /*!< GPDMA0 MASKTFR: CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKTFR_CH4_Pos (4UL) /*!< GPDMA0 MASKTFR: CH4 (Bit 4) */ +#define GPDMA0_MASKTFR_CH4_Msk (0x10UL) /*!< GPDMA0 MASKTFR: CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKTFR_CH5_Pos (5UL) /*!< GPDMA0 MASKTFR: CH5 (Bit 5) */ +#define GPDMA0_MASKTFR_CH5_Msk (0x20UL) /*!< GPDMA0 MASKTFR: CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKTFR_CH6_Pos (6UL) /*!< GPDMA0 MASKTFR: CH6 (Bit 6) */ +#define GPDMA0_MASKTFR_CH6_Msk (0x40UL) /*!< GPDMA0 MASKTFR: CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKTFR_CH7_Pos (7UL) /*!< GPDMA0 MASKTFR: CH7 (Bit 7) */ +#define GPDMA0_MASKTFR_CH7_Msk (0x80UL) /*!< GPDMA0 MASKTFR: CH7 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKTFR_WE_CH0_Pos (8UL) /*!< GPDMA0 MASKTFR: WE_CH0 (Bit 8) */ +#define GPDMA0_MASKTFR_WE_CH0_Msk (0x100UL) /*!< GPDMA0 MASKTFR: WE_CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKTFR_WE_CH1_Pos (9UL) /*!< GPDMA0 MASKTFR: WE_CH1 (Bit 9) */ +#define GPDMA0_MASKTFR_WE_CH1_Msk (0x200UL) /*!< GPDMA0 MASKTFR: WE_CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKTFR_WE_CH2_Pos (10UL) /*!< GPDMA0 MASKTFR: WE_CH2 (Bit 10) */ +#define GPDMA0_MASKTFR_WE_CH2_Msk (0x400UL) /*!< GPDMA0 MASKTFR: WE_CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKTFR_WE_CH3_Pos (11UL) /*!< GPDMA0 MASKTFR: WE_CH3 (Bit 11) */ +#define GPDMA0_MASKTFR_WE_CH3_Msk (0x800UL) /*!< GPDMA0 MASKTFR: WE_CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKTFR_WE_CH4_Pos (12UL) /*!< GPDMA0 MASKTFR: WE_CH4 (Bit 12) */ +#define GPDMA0_MASKTFR_WE_CH4_Msk (0x1000UL) /*!< GPDMA0 MASKTFR: WE_CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKTFR_WE_CH5_Pos (13UL) /*!< GPDMA0 MASKTFR: WE_CH5 (Bit 13) */ +#define GPDMA0_MASKTFR_WE_CH5_Msk (0x2000UL) /*!< GPDMA0 MASKTFR: WE_CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKTFR_WE_CH6_Pos (14UL) /*!< GPDMA0 MASKTFR: WE_CH6 (Bit 14) */ +#define GPDMA0_MASKTFR_WE_CH6_Msk (0x4000UL) /*!< GPDMA0 MASKTFR: WE_CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKTFR_WE_CH7_Pos (15UL) /*!< GPDMA0 MASKTFR: WE_CH7 (Bit 15) */ +#define GPDMA0_MASKTFR_WE_CH7_Msk (0x8000UL) /*!< GPDMA0 MASKTFR: WE_CH7 (Bitfield-Mask: 0x01) */ + +/* ------------------------------ GPDMA0_MASKBLOCK ------------------------------ */ +#define GPDMA0_MASKBLOCK_CH0_Pos (0UL) /*!< GPDMA0 MASKBLOCK: CH0 (Bit 0) */ +#define GPDMA0_MASKBLOCK_CH0_Msk (0x1UL) /*!< GPDMA0 MASKBLOCK: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKBLOCK_CH1_Pos (1UL) /*!< GPDMA0 MASKBLOCK: CH1 (Bit 1) */ +#define GPDMA0_MASKBLOCK_CH1_Msk (0x2UL) /*!< GPDMA0 MASKBLOCK: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKBLOCK_CH2_Pos (2UL) /*!< GPDMA0 MASKBLOCK: CH2 (Bit 2) */ +#define GPDMA0_MASKBLOCK_CH2_Msk (0x4UL) /*!< GPDMA0 MASKBLOCK: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKBLOCK_CH3_Pos (3UL) /*!< GPDMA0 MASKBLOCK: CH3 (Bit 3) */ +#define GPDMA0_MASKBLOCK_CH3_Msk (0x8UL) /*!< GPDMA0 MASKBLOCK: CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKBLOCK_CH4_Pos (4UL) /*!< GPDMA0 MASKBLOCK: CH4 (Bit 4) */ +#define GPDMA0_MASKBLOCK_CH4_Msk (0x10UL) /*!< GPDMA0 MASKBLOCK: CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKBLOCK_CH5_Pos (5UL) /*!< GPDMA0 MASKBLOCK: CH5 (Bit 5) */ +#define GPDMA0_MASKBLOCK_CH5_Msk (0x20UL) /*!< GPDMA0 MASKBLOCK: CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKBLOCK_CH6_Pos (6UL) /*!< GPDMA0 MASKBLOCK: CH6 (Bit 6) */ +#define GPDMA0_MASKBLOCK_CH6_Msk (0x40UL) /*!< GPDMA0 MASKBLOCK: CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKBLOCK_CH7_Pos (7UL) /*!< GPDMA0 MASKBLOCK: CH7 (Bit 7) */ +#define GPDMA0_MASKBLOCK_CH7_Msk (0x80UL) /*!< GPDMA0 MASKBLOCK: CH7 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKBLOCK_WE_CH0_Pos (8UL) /*!< GPDMA0 MASKBLOCK: WE_CH0 (Bit 8) */ +#define GPDMA0_MASKBLOCK_WE_CH0_Msk (0x100UL) /*!< GPDMA0 MASKBLOCK: WE_CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKBLOCK_WE_CH1_Pos (9UL) /*!< GPDMA0 MASKBLOCK: WE_CH1 (Bit 9) */ +#define GPDMA0_MASKBLOCK_WE_CH1_Msk (0x200UL) /*!< GPDMA0 MASKBLOCK: WE_CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKBLOCK_WE_CH2_Pos (10UL) /*!< GPDMA0 MASKBLOCK: WE_CH2 (Bit 10) */ +#define GPDMA0_MASKBLOCK_WE_CH2_Msk (0x400UL) /*!< GPDMA0 MASKBLOCK: WE_CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKBLOCK_WE_CH3_Pos (11UL) /*!< GPDMA0 MASKBLOCK: WE_CH3 (Bit 11) */ +#define GPDMA0_MASKBLOCK_WE_CH3_Msk (0x800UL) /*!< GPDMA0 MASKBLOCK: WE_CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKBLOCK_WE_CH4_Pos (12UL) /*!< GPDMA0 MASKBLOCK: WE_CH4 (Bit 12) */ +#define GPDMA0_MASKBLOCK_WE_CH4_Msk (0x1000UL) /*!< GPDMA0 MASKBLOCK: WE_CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKBLOCK_WE_CH5_Pos (13UL) /*!< GPDMA0 MASKBLOCK: WE_CH5 (Bit 13) */ +#define GPDMA0_MASKBLOCK_WE_CH5_Msk (0x2000UL) /*!< GPDMA0 MASKBLOCK: WE_CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKBLOCK_WE_CH6_Pos (14UL) /*!< GPDMA0 MASKBLOCK: WE_CH6 (Bit 14) */ +#define GPDMA0_MASKBLOCK_WE_CH6_Msk (0x4000UL) /*!< GPDMA0 MASKBLOCK: WE_CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKBLOCK_WE_CH7_Pos (15UL) /*!< GPDMA0 MASKBLOCK: WE_CH7 (Bit 15) */ +#define GPDMA0_MASKBLOCK_WE_CH7_Msk (0x8000UL) /*!< GPDMA0 MASKBLOCK: WE_CH7 (Bitfield-Mask: 0x01) */ + +/* ----------------------------- GPDMA0_MASKSRCTRAN ----------------------------- */ +#define GPDMA0_MASKSRCTRAN_CH0_Pos (0UL) /*!< GPDMA0 MASKSRCTRAN: CH0 (Bit 0) */ +#define GPDMA0_MASKSRCTRAN_CH0_Msk (0x1UL) /*!< GPDMA0 MASKSRCTRAN: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKSRCTRAN_CH1_Pos (1UL) /*!< GPDMA0 MASKSRCTRAN: CH1 (Bit 1) */ +#define GPDMA0_MASKSRCTRAN_CH1_Msk (0x2UL) /*!< GPDMA0 MASKSRCTRAN: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKSRCTRAN_CH2_Pos (2UL) /*!< GPDMA0 MASKSRCTRAN: CH2 (Bit 2) */ +#define GPDMA0_MASKSRCTRAN_CH2_Msk (0x4UL) /*!< GPDMA0 MASKSRCTRAN: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKSRCTRAN_CH3_Pos (3UL) /*!< GPDMA0 MASKSRCTRAN: CH3 (Bit 3) */ +#define GPDMA0_MASKSRCTRAN_CH3_Msk (0x8UL) /*!< GPDMA0 MASKSRCTRAN: CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKSRCTRAN_CH4_Pos (4UL) /*!< GPDMA0 MASKSRCTRAN: CH4 (Bit 4) */ +#define GPDMA0_MASKSRCTRAN_CH4_Msk (0x10UL) /*!< GPDMA0 MASKSRCTRAN: CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKSRCTRAN_CH5_Pos (5UL) /*!< GPDMA0 MASKSRCTRAN: CH5 (Bit 5) */ +#define GPDMA0_MASKSRCTRAN_CH5_Msk (0x20UL) /*!< GPDMA0 MASKSRCTRAN: CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKSRCTRAN_CH6_Pos (6UL) /*!< GPDMA0 MASKSRCTRAN: CH6 (Bit 6) */ +#define GPDMA0_MASKSRCTRAN_CH6_Msk (0x40UL) /*!< GPDMA0 MASKSRCTRAN: CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKSRCTRAN_CH7_Pos (7UL) /*!< GPDMA0 MASKSRCTRAN: CH7 (Bit 7) */ +#define GPDMA0_MASKSRCTRAN_CH7_Msk (0x80UL) /*!< GPDMA0 MASKSRCTRAN: CH7 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKSRCTRAN_WE_CH0_Pos (8UL) /*!< GPDMA0 MASKSRCTRAN: WE_CH0 (Bit 8) */ +#define GPDMA0_MASKSRCTRAN_WE_CH0_Msk (0x100UL) /*!< GPDMA0 MASKSRCTRAN: WE_CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKSRCTRAN_WE_CH1_Pos (9UL) /*!< GPDMA0 MASKSRCTRAN: WE_CH1 (Bit 9) */ +#define GPDMA0_MASKSRCTRAN_WE_CH1_Msk (0x200UL) /*!< GPDMA0 MASKSRCTRAN: WE_CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKSRCTRAN_WE_CH2_Pos (10UL) /*!< GPDMA0 MASKSRCTRAN: WE_CH2 (Bit 10) */ +#define GPDMA0_MASKSRCTRAN_WE_CH2_Msk (0x400UL) /*!< GPDMA0 MASKSRCTRAN: WE_CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKSRCTRAN_WE_CH3_Pos (11UL) /*!< GPDMA0 MASKSRCTRAN: WE_CH3 (Bit 11) */ +#define GPDMA0_MASKSRCTRAN_WE_CH3_Msk (0x800UL) /*!< GPDMA0 MASKSRCTRAN: WE_CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKSRCTRAN_WE_CH4_Pos (12UL) /*!< GPDMA0 MASKSRCTRAN: WE_CH4 (Bit 12) */ +#define GPDMA0_MASKSRCTRAN_WE_CH4_Msk (0x1000UL) /*!< GPDMA0 MASKSRCTRAN: WE_CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKSRCTRAN_WE_CH5_Pos (13UL) /*!< GPDMA0 MASKSRCTRAN: WE_CH5 (Bit 13) */ +#define GPDMA0_MASKSRCTRAN_WE_CH5_Msk (0x2000UL) /*!< GPDMA0 MASKSRCTRAN: WE_CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKSRCTRAN_WE_CH6_Pos (14UL) /*!< GPDMA0 MASKSRCTRAN: WE_CH6 (Bit 14) */ +#define GPDMA0_MASKSRCTRAN_WE_CH6_Msk (0x4000UL) /*!< GPDMA0 MASKSRCTRAN: WE_CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKSRCTRAN_WE_CH7_Pos (15UL) /*!< GPDMA0 MASKSRCTRAN: WE_CH7 (Bit 15) */ +#define GPDMA0_MASKSRCTRAN_WE_CH7_Msk (0x8000UL) /*!< GPDMA0 MASKSRCTRAN: WE_CH7 (Bitfield-Mask: 0x01) */ + +/* ----------------------------- GPDMA0_MASKDSTTRAN ----------------------------- */ +#define GPDMA0_MASKDSTTRAN_CH0_Pos (0UL) /*!< GPDMA0 MASKDSTTRAN: CH0 (Bit 0) */ +#define GPDMA0_MASKDSTTRAN_CH0_Msk (0x1UL) /*!< GPDMA0 MASKDSTTRAN: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKDSTTRAN_CH1_Pos (1UL) /*!< GPDMA0 MASKDSTTRAN: CH1 (Bit 1) */ +#define GPDMA0_MASKDSTTRAN_CH1_Msk (0x2UL) /*!< GPDMA0 MASKDSTTRAN: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKDSTTRAN_CH2_Pos (2UL) /*!< GPDMA0 MASKDSTTRAN: CH2 (Bit 2) */ +#define GPDMA0_MASKDSTTRAN_CH2_Msk (0x4UL) /*!< GPDMA0 MASKDSTTRAN: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKDSTTRAN_CH3_Pos (3UL) /*!< GPDMA0 MASKDSTTRAN: CH3 (Bit 3) */ +#define GPDMA0_MASKDSTTRAN_CH3_Msk (0x8UL) /*!< GPDMA0 MASKDSTTRAN: CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKDSTTRAN_CH4_Pos (4UL) /*!< GPDMA0 MASKDSTTRAN: CH4 (Bit 4) */ +#define GPDMA0_MASKDSTTRAN_CH4_Msk (0x10UL) /*!< GPDMA0 MASKDSTTRAN: CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKDSTTRAN_CH5_Pos (5UL) /*!< GPDMA0 MASKDSTTRAN: CH5 (Bit 5) */ +#define GPDMA0_MASKDSTTRAN_CH5_Msk (0x20UL) /*!< GPDMA0 MASKDSTTRAN: CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKDSTTRAN_CH6_Pos (6UL) /*!< GPDMA0 MASKDSTTRAN: CH6 (Bit 6) */ +#define GPDMA0_MASKDSTTRAN_CH6_Msk (0x40UL) /*!< GPDMA0 MASKDSTTRAN: CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKDSTTRAN_CH7_Pos (7UL) /*!< GPDMA0 MASKDSTTRAN: CH7 (Bit 7) */ +#define GPDMA0_MASKDSTTRAN_CH7_Msk (0x80UL) /*!< GPDMA0 MASKDSTTRAN: CH7 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKDSTTRAN_WE_CH0_Pos (8UL) /*!< GPDMA0 MASKDSTTRAN: WE_CH0 (Bit 8) */ +#define GPDMA0_MASKDSTTRAN_WE_CH0_Msk (0x100UL) /*!< GPDMA0 MASKDSTTRAN: WE_CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKDSTTRAN_WE_CH1_Pos (9UL) /*!< GPDMA0 MASKDSTTRAN: WE_CH1 (Bit 9) */ +#define GPDMA0_MASKDSTTRAN_WE_CH1_Msk (0x200UL) /*!< GPDMA0 MASKDSTTRAN: WE_CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKDSTTRAN_WE_CH2_Pos (10UL) /*!< GPDMA0 MASKDSTTRAN: WE_CH2 (Bit 10) */ +#define GPDMA0_MASKDSTTRAN_WE_CH2_Msk (0x400UL) /*!< GPDMA0 MASKDSTTRAN: WE_CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKDSTTRAN_WE_CH3_Pos (11UL) /*!< GPDMA0 MASKDSTTRAN: WE_CH3 (Bit 11) */ +#define GPDMA0_MASKDSTTRAN_WE_CH3_Msk (0x800UL) /*!< GPDMA0 MASKDSTTRAN: WE_CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKDSTTRAN_WE_CH4_Pos (12UL) /*!< GPDMA0 MASKDSTTRAN: WE_CH4 (Bit 12) */ +#define GPDMA0_MASKDSTTRAN_WE_CH4_Msk (0x1000UL) /*!< GPDMA0 MASKDSTTRAN: WE_CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKDSTTRAN_WE_CH5_Pos (13UL) /*!< GPDMA0 MASKDSTTRAN: WE_CH5 (Bit 13) */ +#define GPDMA0_MASKDSTTRAN_WE_CH5_Msk (0x2000UL) /*!< GPDMA0 MASKDSTTRAN: WE_CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKDSTTRAN_WE_CH6_Pos (14UL) /*!< GPDMA0 MASKDSTTRAN: WE_CH6 (Bit 14) */ +#define GPDMA0_MASKDSTTRAN_WE_CH6_Msk (0x4000UL) /*!< GPDMA0 MASKDSTTRAN: WE_CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKDSTTRAN_WE_CH7_Pos (15UL) /*!< GPDMA0 MASKDSTTRAN: WE_CH7 (Bit 15) */ +#define GPDMA0_MASKDSTTRAN_WE_CH7_Msk (0x8000UL) /*!< GPDMA0 MASKDSTTRAN: WE_CH7 (Bitfield-Mask: 0x01) */ + +/* ------------------------------- GPDMA0_MASKERR ------------------------------- */ +#define GPDMA0_MASKERR_CH0_Pos (0UL) /*!< GPDMA0 MASKERR: CH0 (Bit 0) */ +#define GPDMA0_MASKERR_CH0_Msk (0x1UL) /*!< GPDMA0 MASKERR: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKERR_CH1_Pos (1UL) /*!< GPDMA0 MASKERR: CH1 (Bit 1) */ +#define GPDMA0_MASKERR_CH1_Msk (0x2UL) /*!< GPDMA0 MASKERR: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKERR_CH2_Pos (2UL) /*!< GPDMA0 MASKERR: CH2 (Bit 2) */ +#define GPDMA0_MASKERR_CH2_Msk (0x4UL) /*!< GPDMA0 MASKERR: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKERR_CH3_Pos (3UL) /*!< GPDMA0 MASKERR: CH3 (Bit 3) */ +#define GPDMA0_MASKERR_CH3_Msk (0x8UL) /*!< GPDMA0 MASKERR: CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKERR_CH4_Pos (4UL) /*!< GPDMA0 MASKERR: CH4 (Bit 4) */ +#define GPDMA0_MASKERR_CH4_Msk (0x10UL) /*!< GPDMA0 MASKERR: CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKERR_CH5_Pos (5UL) /*!< GPDMA0 MASKERR: CH5 (Bit 5) */ +#define GPDMA0_MASKERR_CH5_Msk (0x20UL) /*!< GPDMA0 MASKERR: CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKERR_CH6_Pos (6UL) /*!< GPDMA0 MASKERR: CH6 (Bit 6) */ +#define GPDMA0_MASKERR_CH6_Msk (0x40UL) /*!< GPDMA0 MASKERR: CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKERR_CH7_Pos (7UL) /*!< GPDMA0 MASKERR: CH7 (Bit 7) */ +#define GPDMA0_MASKERR_CH7_Msk (0x80UL) /*!< GPDMA0 MASKERR: CH7 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKERR_WE_CH0_Pos (8UL) /*!< GPDMA0 MASKERR: WE_CH0 (Bit 8) */ +#define GPDMA0_MASKERR_WE_CH0_Msk (0x100UL) /*!< GPDMA0 MASKERR: WE_CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKERR_WE_CH1_Pos (9UL) /*!< GPDMA0 MASKERR: WE_CH1 (Bit 9) */ +#define GPDMA0_MASKERR_WE_CH1_Msk (0x200UL) /*!< GPDMA0 MASKERR: WE_CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKERR_WE_CH2_Pos (10UL) /*!< GPDMA0 MASKERR: WE_CH2 (Bit 10) */ +#define GPDMA0_MASKERR_WE_CH2_Msk (0x400UL) /*!< GPDMA0 MASKERR: WE_CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKERR_WE_CH3_Pos (11UL) /*!< GPDMA0 MASKERR: WE_CH3 (Bit 11) */ +#define GPDMA0_MASKERR_WE_CH3_Msk (0x800UL) /*!< GPDMA0 MASKERR: WE_CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKERR_WE_CH4_Pos (12UL) /*!< GPDMA0 MASKERR: WE_CH4 (Bit 12) */ +#define GPDMA0_MASKERR_WE_CH4_Msk (0x1000UL) /*!< GPDMA0 MASKERR: WE_CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKERR_WE_CH5_Pos (13UL) /*!< GPDMA0 MASKERR: WE_CH5 (Bit 13) */ +#define GPDMA0_MASKERR_WE_CH5_Msk (0x2000UL) /*!< GPDMA0 MASKERR: WE_CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKERR_WE_CH6_Pos (14UL) /*!< GPDMA0 MASKERR: WE_CH6 (Bit 14) */ +#define GPDMA0_MASKERR_WE_CH6_Msk (0x4000UL) /*!< GPDMA0 MASKERR: WE_CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_MASKERR_WE_CH7_Pos (15UL) /*!< GPDMA0 MASKERR: WE_CH7 (Bit 15) */ +#define GPDMA0_MASKERR_WE_CH7_Msk (0x8000UL) /*!< GPDMA0 MASKERR: WE_CH7 (Bitfield-Mask: 0x01) */ + +/* ------------------------------- GPDMA0_CLEARTFR ------------------------------ */ +#define GPDMA0_CLEARTFR_CH0_Pos (0UL) /*!< GPDMA0 CLEARTFR: CH0 (Bit 0) */ +#define GPDMA0_CLEARTFR_CH0_Msk (0x1UL) /*!< GPDMA0 CLEARTFR: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_CLEARTFR_CH1_Pos (1UL) /*!< GPDMA0 CLEARTFR: CH1 (Bit 1) */ +#define GPDMA0_CLEARTFR_CH1_Msk (0x2UL) /*!< GPDMA0 CLEARTFR: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_CLEARTFR_CH2_Pos (2UL) /*!< GPDMA0 CLEARTFR: CH2 (Bit 2) */ +#define GPDMA0_CLEARTFR_CH2_Msk (0x4UL) /*!< GPDMA0 CLEARTFR: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_CLEARTFR_CH3_Pos (3UL) /*!< GPDMA0 CLEARTFR: CH3 (Bit 3) */ +#define GPDMA0_CLEARTFR_CH3_Msk (0x8UL) /*!< GPDMA0 CLEARTFR: CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_CLEARTFR_CH4_Pos (4UL) /*!< GPDMA0 CLEARTFR: CH4 (Bit 4) */ +#define GPDMA0_CLEARTFR_CH4_Msk (0x10UL) /*!< GPDMA0 CLEARTFR: CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_CLEARTFR_CH5_Pos (5UL) /*!< GPDMA0 CLEARTFR: CH5 (Bit 5) */ +#define GPDMA0_CLEARTFR_CH5_Msk (0x20UL) /*!< GPDMA0 CLEARTFR: CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_CLEARTFR_CH6_Pos (6UL) /*!< GPDMA0 CLEARTFR: CH6 (Bit 6) */ +#define GPDMA0_CLEARTFR_CH6_Msk (0x40UL) /*!< GPDMA0 CLEARTFR: CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_CLEARTFR_CH7_Pos (7UL) /*!< GPDMA0 CLEARTFR: CH7 (Bit 7) */ +#define GPDMA0_CLEARTFR_CH7_Msk (0x80UL) /*!< GPDMA0 CLEARTFR: CH7 (Bitfield-Mask: 0x01) */ + +/* ------------------------------ GPDMA0_CLEARBLOCK ----------------------------- */ +#define GPDMA0_CLEARBLOCK_CH0_Pos (0UL) /*!< GPDMA0 CLEARBLOCK: CH0 (Bit 0) */ +#define GPDMA0_CLEARBLOCK_CH0_Msk (0x1UL) /*!< GPDMA0 CLEARBLOCK: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_CLEARBLOCK_CH1_Pos (1UL) /*!< GPDMA0 CLEARBLOCK: CH1 (Bit 1) */ +#define GPDMA0_CLEARBLOCK_CH1_Msk (0x2UL) /*!< GPDMA0 CLEARBLOCK: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_CLEARBLOCK_CH2_Pos (2UL) /*!< GPDMA0 CLEARBLOCK: CH2 (Bit 2) */ +#define GPDMA0_CLEARBLOCK_CH2_Msk (0x4UL) /*!< GPDMA0 CLEARBLOCK: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_CLEARBLOCK_CH3_Pos (3UL) /*!< GPDMA0 CLEARBLOCK: CH3 (Bit 3) */ +#define GPDMA0_CLEARBLOCK_CH3_Msk (0x8UL) /*!< GPDMA0 CLEARBLOCK: CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_CLEARBLOCK_CH4_Pos (4UL) /*!< GPDMA0 CLEARBLOCK: CH4 (Bit 4) */ +#define GPDMA0_CLEARBLOCK_CH4_Msk (0x10UL) /*!< GPDMA0 CLEARBLOCK: CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_CLEARBLOCK_CH5_Pos (5UL) /*!< GPDMA0 CLEARBLOCK: CH5 (Bit 5) */ +#define GPDMA0_CLEARBLOCK_CH5_Msk (0x20UL) /*!< GPDMA0 CLEARBLOCK: CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_CLEARBLOCK_CH6_Pos (6UL) /*!< GPDMA0 CLEARBLOCK: CH6 (Bit 6) */ +#define GPDMA0_CLEARBLOCK_CH6_Msk (0x40UL) /*!< GPDMA0 CLEARBLOCK: CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_CLEARBLOCK_CH7_Pos (7UL) /*!< GPDMA0 CLEARBLOCK: CH7 (Bit 7) */ +#define GPDMA0_CLEARBLOCK_CH7_Msk (0x80UL) /*!< GPDMA0 CLEARBLOCK: CH7 (Bitfield-Mask: 0x01) */ + +/* ----------------------------- GPDMA0_CLEARSRCTRAN ---------------------------- */ +#define GPDMA0_CLEARSRCTRAN_CH0_Pos (0UL) /*!< GPDMA0 CLEARSRCTRAN: CH0 (Bit 0) */ +#define GPDMA0_CLEARSRCTRAN_CH0_Msk (0x1UL) /*!< GPDMA0 CLEARSRCTRAN: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_CLEARSRCTRAN_CH1_Pos (1UL) /*!< GPDMA0 CLEARSRCTRAN: CH1 (Bit 1) */ +#define GPDMA0_CLEARSRCTRAN_CH1_Msk (0x2UL) /*!< GPDMA0 CLEARSRCTRAN: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_CLEARSRCTRAN_CH2_Pos (2UL) /*!< GPDMA0 CLEARSRCTRAN: CH2 (Bit 2) */ +#define GPDMA0_CLEARSRCTRAN_CH2_Msk (0x4UL) /*!< GPDMA0 CLEARSRCTRAN: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_CLEARSRCTRAN_CH3_Pos (3UL) /*!< GPDMA0 CLEARSRCTRAN: CH3 (Bit 3) */ +#define GPDMA0_CLEARSRCTRAN_CH3_Msk (0x8UL) /*!< GPDMA0 CLEARSRCTRAN: CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_CLEARSRCTRAN_CH4_Pos (4UL) /*!< GPDMA0 CLEARSRCTRAN: CH4 (Bit 4) */ +#define GPDMA0_CLEARSRCTRAN_CH4_Msk (0x10UL) /*!< GPDMA0 CLEARSRCTRAN: CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_CLEARSRCTRAN_CH5_Pos (5UL) /*!< GPDMA0 CLEARSRCTRAN: CH5 (Bit 5) */ +#define GPDMA0_CLEARSRCTRAN_CH5_Msk (0x20UL) /*!< GPDMA0 CLEARSRCTRAN: CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_CLEARSRCTRAN_CH6_Pos (6UL) /*!< GPDMA0 CLEARSRCTRAN: CH6 (Bit 6) */ +#define GPDMA0_CLEARSRCTRAN_CH6_Msk (0x40UL) /*!< GPDMA0 CLEARSRCTRAN: CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_CLEARSRCTRAN_CH7_Pos (7UL) /*!< GPDMA0 CLEARSRCTRAN: CH7 (Bit 7) */ +#define GPDMA0_CLEARSRCTRAN_CH7_Msk (0x80UL) /*!< GPDMA0 CLEARSRCTRAN: CH7 (Bitfield-Mask: 0x01) */ + +/* ----------------------------- GPDMA0_CLEARDSTTRAN ---------------------------- */ +#define GPDMA0_CLEARDSTTRAN_CH0_Pos (0UL) /*!< GPDMA0 CLEARDSTTRAN: CH0 (Bit 0) */ +#define GPDMA0_CLEARDSTTRAN_CH0_Msk (0x1UL) /*!< GPDMA0 CLEARDSTTRAN: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_CLEARDSTTRAN_CH1_Pos (1UL) /*!< GPDMA0 CLEARDSTTRAN: CH1 (Bit 1) */ +#define GPDMA0_CLEARDSTTRAN_CH1_Msk (0x2UL) /*!< GPDMA0 CLEARDSTTRAN: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_CLEARDSTTRAN_CH2_Pos (2UL) /*!< GPDMA0 CLEARDSTTRAN: CH2 (Bit 2) */ +#define GPDMA0_CLEARDSTTRAN_CH2_Msk (0x4UL) /*!< GPDMA0 CLEARDSTTRAN: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_CLEARDSTTRAN_CH3_Pos (3UL) /*!< GPDMA0 CLEARDSTTRAN: CH3 (Bit 3) */ +#define GPDMA0_CLEARDSTTRAN_CH3_Msk (0x8UL) /*!< GPDMA0 CLEARDSTTRAN: CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_CLEARDSTTRAN_CH4_Pos (4UL) /*!< GPDMA0 CLEARDSTTRAN: CH4 (Bit 4) */ +#define GPDMA0_CLEARDSTTRAN_CH4_Msk (0x10UL) /*!< GPDMA0 CLEARDSTTRAN: CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_CLEARDSTTRAN_CH5_Pos (5UL) /*!< GPDMA0 CLEARDSTTRAN: CH5 (Bit 5) */ +#define GPDMA0_CLEARDSTTRAN_CH5_Msk (0x20UL) /*!< GPDMA0 CLEARDSTTRAN: CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_CLEARDSTTRAN_CH6_Pos (6UL) /*!< GPDMA0 CLEARDSTTRAN: CH6 (Bit 6) */ +#define GPDMA0_CLEARDSTTRAN_CH6_Msk (0x40UL) /*!< GPDMA0 CLEARDSTTRAN: CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_CLEARDSTTRAN_CH7_Pos (7UL) /*!< GPDMA0 CLEARDSTTRAN: CH7 (Bit 7) */ +#define GPDMA0_CLEARDSTTRAN_CH7_Msk (0x80UL) /*!< GPDMA0 CLEARDSTTRAN: CH7 (Bitfield-Mask: 0x01) */ + +/* ------------------------------- GPDMA0_CLEARERR ------------------------------ */ +#define GPDMA0_CLEARERR_CH0_Pos (0UL) /*!< GPDMA0 CLEARERR: CH0 (Bit 0) */ +#define GPDMA0_CLEARERR_CH0_Msk (0x1UL) /*!< GPDMA0 CLEARERR: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_CLEARERR_CH1_Pos (1UL) /*!< GPDMA0 CLEARERR: CH1 (Bit 1) */ +#define GPDMA0_CLEARERR_CH1_Msk (0x2UL) /*!< GPDMA0 CLEARERR: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_CLEARERR_CH2_Pos (2UL) /*!< GPDMA0 CLEARERR: CH2 (Bit 2) */ +#define GPDMA0_CLEARERR_CH2_Msk (0x4UL) /*!< GPDMA0 CLEARERR: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_CLEARERR_CH3_Pos (3UL) /*!< GPDMA0 CLEARERR: CH3 (Bit 3) */ +#define GPDMA0_CLEARERR_CH3_Msk (0x8UL) /*!< GPDMA0 CLEARERR: CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_CLEARERR_CH4_Pos (4UL) /*!< GPDMA0 CLEARERR: CH4 (Bit 4) */ +#define GPDMA0_CLEARERR_CH4_Msk (0x10UL) /*!< GPDMA0 CLEARERR: CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_CLEARERR_CH5_Pos (5UL) /*!< GPDMA0 CLEARERR: CH5 (Bit 5) */ +#define GPDMA0_CLEARERR_CH5_Msk (0x20UL) /*!< GPDMA0 CLEARERR: CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_CLEARERR_CH6_Pos (6UL) /*!< GPDMA0 CLEARERR: CH6 (Bit 6) */ +#define GPDMA0_CLEARERR_CH6_Msk (0x40UL) /*!< GPDMA0 CLEARERR: CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_CLEARERR_CH7_Pos (7UL) /*!< GPDMA0 CLEARERR: CH7 (Bit 7) */ +#define GPDMA0_CLEARERR_CH7_Msk (0x80UL) /*!< GPDMA0 CLEARERR: CH7 (Bitfield-Mask: 0x01) */ + +/* ------------------------------ GPDMA0_STATUSINT ------------------------------ */ +#define GPDMA0_STATUSINT_TFR_Pos (0UL) /*!< GPDMA0 STATUSINT: TFR (Bit 0) */ +#define GPDMA0_STATUSINT_TFR_Msk (0x1UL) /*!< GPDMA0 STATUSINT: TFR (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSINT_BLOCK_Pos (1UL) /*!< GPDMA0 STATUSINT: BLOCK (Bit 1) */ +#define GPDMA0_STATUSINT_BLOCK_Msk (0x2UL) /*!< GPDMA0 STATUSINT: BLOCK (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSINT_SRCT_Pos (2UL) /*!< GPDMA0 STATUSINT: SRCT (Bit 2) */ +#define GPDMA0_STATUSINT_SRCT_Msk (0x4UL) /*!< GPDMA0 STATUSINT: SRCT (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSINT_DSTT_Pos (3UL) /*!< GPDMA0 STATUSINT: DSTT (Bit 3) */ +#define GPDMA0_STATUSINT_DSTT_Msk (0x8UL) /*!< GPDMA0 STATUSINT: DSTT (Bitfield-Mask: 0x01) */ +#define GPDMA0_STATUSINT_ERR_Pos (4UL) /*!< GPDMA0 STATUSINT: ERR (Bit 4) */ +#define GPDMA0_STATUSINT_ERR_Msk (0x10UL) /*!< GPDMA0 STATUSINT: ERR (Bitfield-Mask: 0x01) */ + +/* ------------------------------ GPDMA0_REQSRCREG ------------------------------ */ +#define GPDMA0_REQSRCREG_CH0_Pos (0UL) /*!< GPDMA0 REQSRCREG: CH0 (Bit 0) */ +#define GPDMA0_REQSRCREG_CH0_Msk (0x1UL) /*!< GPDMA0 REQSRCREG: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_REQSRCREG_CH1_Pos (1UL) /*!< GPDMA0 REQSRCREG: CH1 (Bit 1) */ +#define GPDMA0_REQSRCREG_CH1_Msk (0x2UL) /*!< GPDMA0 REQSRCREG: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_REQSRCREG_CH2_Pos (2UL) /*!< GPDMA0 REQSRCREG: CH2 (Bit 2) */ +#define GPDMA0_REQSRCREG_CH2_Msk (0x4UL) /*!< GPDMA0 REQSRCREG: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_REQSRCREG_CH3_Pos (3UL) /*!< GPDMA0 REQSRCREG: CH3 (Bit 3) */ +#define GPDMA0_REQSRCREG_CH3_Msk (0x8UL) /*!< GPDMA0 REQSRCREG: CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_REQSRCREG_CH4_Pos (4UL) /*!< GPDMA0 REQSRCREG: CH4 (Bit 4) */ +#define GPDMA0_REQSRCREG_CH4_Msk (0x10UL) /*!< GPDMA0 REQSRCREG: CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_REQSRCREG_CH5_Pos (5UL) /*!< GPDMA0 REQSRCREG: CH5 (Bit 5) */ +#define GPDMA0_REQSRCREG_CH5_Msk (0x20UL) /*!< GPDMA0 REQSRCREG: CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_REQSRCREG_CH6_Pos (6UL) /*!< GPDMA0 REQSRCREG: CH6 (Bit 6) */ +#define GPDMA0_REQSRCREG_CH6_Msk (0x40UL) /*!< GPDMA0 REQSRCREG: CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_REQSRCREG_CH7_Pos (7UL) /*!< GPDMA0 REQSRCREG: CH7 (Bit 7) */ +#define GPDMA0_REQSRCREG_CH7_Msk (0x80UL) /*!< GPDMA0 REQSRCREG: CH7 (Bitfield-Mask: 0x01) */ +#define GPDMA0_REQSRCREG_WE_CH0_Pos (8UL) /*!< GPDMA0 REQSRCREG: WE_CH0 (Bit 8) */ +#define GPDMA0_REQSRCREG_WE_CH0_Msk (0x100UL) /*!< GPDMA0 REQSRCREG: WE_CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_REQSRCREG_WE_CH1_Pos (9UL) /*!< GPDMA0 REQSRCREG: WE_CH1 (Bit 9) */ +#define GPDMA0_REQSRCREG_WE_CH1_Msk (0x200UL) /*!< GPDMA0 REQSRCREG: WE_CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_REQSRCREG_WE_CH2_Pos (10UL) /*!< GPDMA0 REQSRCREG: WE_CH2 (Bit 10) */ +#define GPDMA0_REQSRCREG_WE_CH2_Msk (0x400UL) /*!< GPDMA0 REQSRCREG: WE_CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_REQSRCREG_WE_CH3_Pos (11UL) /*!< GPDMA0 REQSRCREG: WE_CH3 (Bit 11) */ +#define GPDMA0_REQSRCREG_WE_CH3_Msk (0x800UL) /*!< GPDMA0 REQSRCREG: WE_CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_REQSRCREG_WE_CH4_Pos (12UL) /*!< GPDMA0 REQSRCREG: WE_CH4 (Bit 12) */ +#define GPDMA0_REQSRCREG_WE_CH4_Msk (0x1000UL) /*!< GPDMA0 REQSRCREG: WE_CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_REQSRCREG_WE_CH5_Pos (13UL) /*!< GPDMA0 REQSRCREG: WE_CH5 (Bit 13) */ +#define GPDMA0_REQSRCREG_WE_CH5_Msk (0x2000UL) /*!< GPDMA0 REQSRCREG: WE_CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_REQSRCREG_WE_CH6_Pos (14UL) /*!< GPDMA0 REQSRCREG: WE_CH6 (Bit 14) */ +#define GPDMA0_REQSRCREG_WE_CH6_Msk (0x4000UL) /*!< GPDMA0 REQSRCREG: WE_CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_REQSRCREG_WE_CH7_Pos (15UL) /*!< GPDMA0 REQSRCREG: WE_CH7 (Bit 15) */ +#define GPDMA0_REQSRCREG_WE_CH7_Msk (0x8000UL) /*!< GPDMA0 REQSRCREG: WE_CH7 (Bitfield-Mask: 0x01) */ + +/* ------------------------------ GPDMA0_REQDSTREG ------------------------------ */ +#define GPDMA0_REQDSTREG_CH0_Pos (0UL) /*!< GPDMA0 REQDSTREG: CH0 (Bit 0) */ +#define GPDMA0_REQDSTREG_CH0_Msk (0x1UL) /*!< GPDMA0 REQDSTREG: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_REQDSTREG_CH1_Pos (1UL) /*!< GPDMA0 REQDSTREG: CH1 (Bit 1) */ +#define GPDMA0_REQDSTREG_CH1_Msk (0x2UL) /*!< GPDMA0 REQDSTREG: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_REQDSTREG_CH2_Pos (2UL) /*!< GPDMA0 REQDSTREG: CH2 (Bit 2) */ +#define GPDMA0_REQDSTREG_CH2_Msk (0x4UL) /*!< GPDMA0 REQDSTREG: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_REQDSTREG_CH3_Pos (3UL) /*!< GPDMA0 REQDSTREG: CH3 (Bit 3) */ +#define GPDMA0_REQDSTREG_CH3_Msk (0x8UL) /*!< GPDMA0 REQDSTREG: CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_REQDSTREG_CH4_Pos (4UL) /*!< GPDMA0 REQDSTREG: CH4 (Bit 4) */ +#define GPDMA0_REQDSTREG_CH4_Msk (0x10UL) /*!< GPDMA0 REQDSTREG: CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_REQDSTREG_CH5_Pos (5UL) /*!< GPDMA0 REQDSTREG: CH5 (Bit 5) */ +#define GPDMA0_REQDSTREG_CH5_Msk (0x20UL) /*!< GPDMA0 REQDSTREG: CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_REQDSTREG_CH6_Pos (6UL) /*!< GPDMA0 REQDSTREG: CH6 (Bit 6) */ +#define GPDMA0_REQDSTREG_CH6_Msk (0x40UL) /*!< GPDMA0 REQDSTREG: CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_REQDSTREG_CH7_Pos (7UL) /*!< GPDMA0 REQDSTREG: CH7 (Bit 7) */ +#define GPDMA0_REQDSTREG_CH7_Msk (0x80UL) /*!< GPDMA0 REQDSTREG: CH7 (Bitfield-Mask: 0x01) */ +#define GPDMA0_REQDSTREG_WE_CH0_Pos (8UL) /*!< GPDMA0 REQDSTREG: WE_CH0 (Bit 8) */ +#define GPDMA0_REQDSTREG_WE_CH0_Msk (0x100UL) /*!< GPDMA0 REQDSTREG: WE_CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_REQDSTREG_WE_CH1_Pos (9UL) /*!< GPDMA0 REQDSTREG: WE_CH1 (Bit 9) */ +#define GPDMA0_REQDSTREG_WE_CH1_Msk (0x200UL) /*!< GPDMA0 REQDSTREG: WE_CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_REQDSTREG_WE_CH2_Pos (10UL) /*!< GPDMA0 REQDSTREG: WE_CH2 (Bit 10) */ +#define GPDMA0_REQDSTREG_WE_CH2_Msk (0x400UL) /*!< GPDMA0 REQDSTREG: WE_CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_REQDSTREG_WE_CH3_Pos (11UL) /*!< GPDMA0 REQDSTREG: WE_CH3 (Bit 11) */ +#define GPDMA0_REQDSTREG_WE_CH3_Msk (0x800UL) /*!< GPDMA0 REQDSTREG: WE_CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_REQDSTREG_WE_CH4_Pos (12UL) /*!< GPDMA0 REQDSTREG: WE_CH4 (Bit 12) */ +#define GPDMA0_REQDSTREG_WE_CH4_Msk (0x1000UL) /*!< GPDMA0 REQDSTREG: WE_CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_REQDSTREG_WE_CH5_Pos (13UL) /*!< GPDMA0 REQDSTREG: WE_CH5 (Bit 13) */ +#define GPDMA0_REQDSTREG_WE_CH5_Msk (0x2000UL) /*!< GPDMA0 REQDSTREG: WE_CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_REQDSTREG_WE_CH6_Pos (14UL) /*!< GPDMA0 REQDSTREG: WE_CH6 (Bit 14) */ +#define GPDMA0_REQDSTREG_WE_CH6_Msk (0x4000UL) /*!< GPDMA0 REQDSTREG: WE_CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_REQDSTREG_WE_CH7_Pos (15UL) /*!< GPDMA0 REQDSTREG: WE_CH7 (Bit 15) */ +#define GPDMA0_REQDSTREG_WE_CH7_Msk (0x8000UL) /*!< GPDMA0 REQDSTREG: WE_CH7 (Bitfield-Mask: 0x01) */ + +/* ----------------------------- GPDMA0_SGLREQSRCREG ---------------------------- */ +#define GPDMA0_SGLREQSRCREG_CH0_Pos (0UL) /*!< GPDMA0 SGLREQSRCREG: CH0 (Bit 0) */ +#define GPDMA0_SGLREQSRCREG_CH0_Msk (0x1UL) /*!< GPDMA0 SGLREQSRCREG: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_SGLREQSRCREG_CH1_Pos (1UL) /*!< GPDMA0 SGLREQSRCREG: CH1 (Bit 1) */ +#define GPDMA0_SGLREQSRCREG_CH1_Msk (0x2UL) /*!< GPDMA0 SGLREQSRCREG: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_SGLREQSRCREG_CH2_Pos (2UL) /*!< GPDMA0 SGLREQSRCREG: CH2 (Bit 2) */ +#define GPDMA0_SGLREQSRCREG_CH2_Msk (0x4UL) /*!< GPDMA0 SGLREQSRCREG: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_SGLREQSRCREG_CH3_Pos (3UL) /*!< GPDMA0 SGLREQSRCREG: CH3 (Bit 3) */ +#define GPDMA0_SGLREQSRCREG_CH3_Msk (0x8UL) /*!< GPDMA0 SGLREQSRCREG: CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_SGLREQSRCREG_CH4_Pos (4UL) /*!< GPDMA0 SGLREQSRCREG: CH4 (Bit 4) */ +#define GPDMA0_SGLREQSRCREG_CH4_Msk (0x10UL) /*!< GPDMA0 SGLREQSRCREG: CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_SGLREQSRCREG_CH5_Pos (5UL) /*!< GPDMA0 SGLREQSRCREG: CH5 (Bit 5) */ +#define GPDMA0_SGLREQSRCREG_CH5_Msk (0x20UL) /*!< GPDMA0 SGLREQSRCREG: CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_SGLREQSRCREG_CH6_Pos (6UL) /*!< GPDMA0 SGLREQSRCREG: CH6 (Bit 6) */ +#define GPDMA0_SGLREQSRCREG_CH6_Msk (0x40UL) /*!< GPDMA0 SGLREQSRCREG: CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_SGLREQSRCREG_CH7_Pos (7UL) /*!< GPDMA0 SGLREQSRCREG: CH7 (Bit 7) */ +#define GPDMA0_SGLREQSRCREG_CH7_Msk (0x80UL) /*!< GPDMA0 SGLREQSRCREG: CH7 (Bitfield-Mask: 0x01) */ +#define GPDMA0_SGLREQSRCREG_WE_CH0_Pos (8UL) /*!< GPDMA0 SGLREQSRCREG: WE_CH0 (Bit 8) */ +#define GPDMA0_SGLREQSRCREG_WE_CH0_Msk (0x100UL) /*!< GPDMA0 SGLREQSRCREG: WE_CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_SGLREQSRCREG_WE_CH1_Pos (9UL) /*!< GPDMA0 SGLREQSRCREG: WE_CH1 (Bit 9) */ +#define GPDMA0_SGLREQSRCREG_WE_CH1_Msk (0x200UL) /*!< GPDMA0 SGLREQSRCREG: WE_CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_SGLREQSRCREG_WE_CH2_Pos (10UL) /*!< GPDMA0 SGLREQSRCREG: WE_CH2 (Bit 10) */ +#define GPDMA0_SGLREQSRCREG_WE_CH2_Msk (0x400UL) /*!< GPDMA0 SGLREQSRCREG: WE_CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_SGLREQSRCREG_WE_CH3_Pos (11UL) /*!< GPDMA0 SGLREQSRCREG: WE_CH3 (Bit 11) */ +#define GPDMA0_SGLREQSRCREG_WE_CH3_Msk (0x800UL) /*!< GPDMA0 SGLREQSRCREG: WE_CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_SGLREQSRCREG_WE_CH4_Pos (12UL) /*!< GPDMA0 SGLREQSRCREG: WE_CH4 (Bit 12) */ +#define GPDMA0_SGLREQSRCREG_WE_CH4_Msk (0x1000UL) /*!< GPDMA0 SGLREQSRCREG: WE_CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_SGLREQSRCREG_WE_CH5_Pos (13UL) /*!< GPDMA0 SGLREQSRCREG: WE_CH5 (Bit 13) */ +#define GPDMA0_SGLREQSRCREG_WE_CH5_Msk (0x2000UL) /*!< GPDMA0 SGLREQSRCREG: WE_CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_SGLREQSRCREG_WE_CH6_Pos (14UL) /*!< GPDMA0 SGLREQSRCREG: WE_CH6 (Bit 14) */ +#define GPDMA0_SGLREQSRCREG_WE_CH6_Msk (0x4000UL) /*!< GPDMA0 SGLREQSRCREG: WE_CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_SGLREQSRCREG_WE_CH7_Pos (15UL) /*!< GPDMA0 SGLREQSRCREG: WE_CH7 (Bit 15) */ +#define GPDMA0_SGLREQSRCREG_WE_CH7_Msk (0x8000UL) /*!< GPDMA0 SGLREQSRCREG: WE_CH7 (Bitfield-Mask: 0x01) */ + +/* ----------------------------- GPDMA0_SGLREQDSTREG ---------------------------- */ +#define GPDMA0_SGLREQDSTREG_CH0_Pos (0UL) /*!< GPDMA0 SGLREQDSTREG: CH0 (Bit 0) */ +#define GPDMA0_SGLREQDSTREG_CH0_Msk (0x1UL) /*!< GPDMA0 SGLREQDSTREG: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_SGLREQDSTREG_CH1_Pos (1UL) /*!< GPDMA0 SGLREQDSTREG: CH1 (Bit 1) */ +#define GPDMA0_SGLREQDSTREG_CH1_Msk (0x2UL) /*!< GPDMA0 SGLREQDSTREG: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_SGLREQDSTREG_CH2_Pos (2UL) /*!< GPDMA0 SGLREQDSTREG: CH2 (Bit 2) */ +#define GPDMA0_SGLREQDSTREG_CH2_Msk (0x4UL) /*!< GPDMA0 SGLREQDSTREG: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_SGLREQDSTREG_CH3_Pos (3UL) /*!< GPDMA0 SGLREQDSTREG: CH3 (Bit 3) */ +#define GPDMA0_SGLREQDSTREG_CH3_Msk (0x8UL) /*!< GPDMA0 SGLREQDSTREG: CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_SGLREQDSTREG_CH4_Pos (4UL) /*!< GPDMA0 SGLREQDSTREG: CH4 (Bit 4) */ +#define GPDMA0_SGLREQDSTREG_CH4_Msk (0x10UL) /*!< GPDMA0 SGLREQDSTREG: CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_SGLREQDSTREG_CH5_Pos (5UL) /*!< GPDMA0 SGLREQDSTREG: CH5 (Bit 5) */ +#define GPDMA0_SGLREQDSTREG_CH5_Msk (0x20UL) /*!< GPDMA0 SGLREQDSTREG: CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_SGLREQDSTREG_CH6_Pos (6UL) /*!< GPDMA0 SGLREQDSTREG: CH6 (Bit 6) */ +#define GPDMA0_SGLREQDSTREG_CH6_Msk (0x40UL) /*!< GPDMA0 SGLREQDSTREG: CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_SGLREQDSTREG_CH7_Pos (7UL) /*!< GPDMA0 SGLREQDSTREG: CH7 (Bit 7) */ +#define GPDMA0_SGLREQDSTREG_CH7_Msk (0x80UL) /*!< GPDMA0 SGLREQDSTREG: CH7 (Bitfield-Mask: 0x01) */ +#define GPDMA0_SGLREQDSTREG_WE_CH0_Pos (8UL) /*!< GPDMA0 SGLREQDSTREG: WE_CH0 (Bit 8) */ +#define GPDMA0_SGLREQDSTREG_WE_CH0_Msk (0x100UL) /*!< GPDMA0 SGLREQDSTREG: WE_CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_SGLREQDSTREG_WE_CH1_Pos (9UL) /*!< GPDMA0 SGLREQDSTREG: WE_CH1 (Bit 9) */ +#define GPDMA0_SGLREQDSTREG_WE_CH1_Msk (0x200UL) /*!< GPDMA0 SGLREQDSTREG: WE_CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_SGLREQDSTREG_WE_CH2_Pos (10UL) /*!< GPDMA0 SGLREQDSTREG: WE_CH2 (Bit 10) */ +#define GPDMA0_SGLREQDSTREG_WE_CH2_Msk (0x400UL) /*!< GPDMA0 SGLREQDSTREG: WE_CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_SGLREQDSTREG_WE_CH3_Pos (11UL) /*!< GPDMA0 SGLREQDSTREG: WE_CH3 (Bit 11) */ +#define GPDMA0_SGLREQDSTREG_WE_CH3_Msk (0x800UL) /*!< GPDMA0 SGLREQDSTREG: WE_CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_SGLREQDSTREG_WE_CH4_Pos (12UL) /*!< GPDMA0 SGLREQDSTREG: WE_CH4 (Bit 12) */ +#define GPDMA0_SGLREQDSTREG_WE_CH4_Msk (0x1000UL) /*!< GPDMA0 SGLREQDSTREG: WE_CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_SGLREQDSTREG_WE_CH5_Pos (13UL) /*!< GPDMA0 SGLREQDSTREG: WE_CH5 (Bit 13) */ +#define GPDMA0_SGLREQDSTREG_WE_CH5_Msk (0x2000UL) /*!< GPDMA0 SGLREQDSTREG: WE_CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_SGLREQDSTREG_WE_CH6_Pos (14UL) /*!< GPDMA0 SGLREQDSTREG: WE_CH6 (Bit 14) */ +#define GPDMA0_SGLREQDSTREG_WE_CH6_Msk (0x4000UL) /*!< GPDMA0 SGLREQDSTREG: WE_CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_SGLREQDSTREG_WE_CH7_Pos (15UL) /*!< GPDMA0 SGLREQDSTREG: WE_CH7 (Bit 15) */ +#define GPDMA0_SGLREQDSTREG_WE_CH7_Msk (0x8000UL) /*!< GPDMA0 SGLREQDSTREG: WE_CH7 (Bitfield-Mask: 0x01) */ + +/* ------------------------------ GPDMA0_LSTSRCREG ------------------------------ */ +#define GPDMA0_LSTSRCREG_CH0_Pos (0UL) /*!< GPDMA0 LSTSRCREG: CH0 (Bit 0) */ +#define GPDMA0_LSTSRCREG_CH0_Msk (0x1UL) /*!< GPDMA0 LSTSRCREG: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_LSTSRCREG_CH1_Pos (1UL) /*!< GPDMA0 LSTSRCREG: CH1 (Bit 1) */ +#define GPDMA0_LSTSRCREG_CH1_Msk (0x2UL) /*!< GPDMA0 LSTSRCREG: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_LSTSRCREG_CH2_Pos (2UL) /*!< GPDMA0 LSTSRCREG: CH2 (Bit 2) */ +#define GPDMA0_LSTSRCREG_CH2_Msk (0x4UL) /*!< GPDMA0 LSTSRCREG: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_LSTSRCREG_CH3_Pos (3UL) /*!< GPDMA0 LSTSRCREG: CH3 (Bit 3) */ +#define GPDMA0_LSTSRCREG_CH3_Msk (0x8UL) /*!< GPDMA0 LSTSRCREG: CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_LSTSRCREG_CH4_Pos (4UL) /*!< GPDMA0 LSTSRCREG: CH4 (Bit 4) */ +#define GPDMA0_LSTSRCREG_CH4_Msk (0x10UL) /*!< GPDMA0 LSTSRCREG: CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_LSTSRCREG_CH5_Pos (5UL) /*!< GPDMA0 LSTSRCREG: CH5 (Bit 5) */ +#define GPDMA0_LSTSRCREG_CH5_Msk (0x20UL) /*!< GPDMA0 LSTSRCREG: CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_LSTSRCREG_CH6_Pos (6UL) /*!< GPDMA0 LSTSRCREG: CH6 (Bit 6) */ +#define GPDMA0_LSTSRCREG_CH6_Msk (0x40UL) /*!< GPDMA0 LSTSRCREG: CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_LSTSRCREG_CH7_Pos (7UL) /*!< GPDMA0 LSTSRCREG: CH7 (Bit 7) */ +#define GPDMA0_LSTSRCREG_CH7_Msk (0x80UL) /*!< GPDMA0 LSTSRCREG: CH7 (Bitfield-Mask: 0x01) */ +#define GPDMA0_LSTSRCREG_WE_CH0_Pos (8UL) /*!< GPDMA0 LSTSRCREG: WE_CH0 (Bit 8) */ +#define GPDMA0_LSTSRCREG_WE_CH0_Msk (0x100UL) /*!< GPDMA0 LSTSRCREG: WE_CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_LSTSRCREG_WE_CH1_Pos (9UL) /*!< GPDMA0 LSTSRCREG: WE_CH1 (Bit 9) */ +#define GPDMA0_LSTSRCREG_WE_CH1_Msk (0x200UL) /*!< GPDMA0 LSTSRCREG: WE_CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_LSTSRCREG_WE_CH2_Pos (10UL) /*!< GPDMA0 LSTSRCREG: WE_CH2 (Bit 10) */ +#define GPDMA0_LSTSRCREG_WE_CH2_Msk (0x400UL) /*!< GPDMA0 LSTSRCREG: WE_CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_LSTSRCREG_WE_CH3_Pos (11UL) /*!< GPDMA0 LSTSRCREG: WE_CH3 (Bit 11) */ +#define GPDMA0_LSTSRCREG_WE_CH3_Msk (0x800UL) /*!< GPDMA0 LSTSRCREG: WE_CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_LSTSRCREG_WE_CH4_Pos (12UL) /*!< GPDMA0 LSTSRCREG: WE_CH4 (Bit 12) */ +#define GPDMA0_LSTSRCREG_WE_CH4_Msk (0x1000UL) /*!< GPDMA0 LSTSRCREG: WE_CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_LSTSRCREG_WE_CH5_Pos (13UL) /*!< GPDMA0 LSTSRCREG: WE_CH5 (Bit 13) */ +#define GPDMA0_LSTSRCREG_WE_CH5_Msk (0x2000UL) /*!< GPDMA0 LSTSRCREG: WE_CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_LSTSRCREG_WE_CH6_Pos (14UL) /*!< GPDMA0 LSTSRCREG: WE_CH6 (Bit 14) */ +#define GPDMA0_LSTSRCREG_WE_CH6_Msk (0x4000UL) /*!< GPDMA0 LSTSRCREG: WE_CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_LSTSRCREG_WE_CH7_Pos (15UL) /*!< GPDMA0 LSTSRCREG: WE_CH7 (Bit 15) */ +#define GPDMA0_LSTSRCREG_WE_CH7_Msk (0x8000UL) /*!< GPDMA0 LSTSRCREG: WE_CH7 (Bitfield-Mask: 0x01) */ + +/* ------------------------------ GPDMA0_LSTDSTREG ------------------------------ */ +#define GPDMA0_LSTDSTREG_CH0_Pos (0UL) /*!< GPDMA0 LSTDSTREG: CH0 (Bit 0) */ +#define GPDMA0_LSTDSTREG_CH0_Msk (0x1UL) /*!< GPDMA0 LSTDSTREG: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_LSTDSTREG_CH1_Pos (1UL) /*!< GPDMA0 LSTDSTREG: CH1 (Bit 1) */ +#define GPDMA0_LSTDSTREG_CH1_Msk (0x2UL) /*!< GPDMA0 LSTDSTREG: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_LSTDSTREG_CH2_Pos (2UL) /*!< GPDMA0 LSTDSTREG: CH2 (Bit 2) */ +#define GPDMA0_LSTDSTREG_CH2_Msk (0x4UL) /*!< GPDMA0 LSTDSTREG: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_LSTDSTREG_CH3_Pos (3UL) /*!< GPDMA0 LSTDSTREG: CH3 (Bit 3) */ +#define GPDMA0_LSTDSTREG_CH3_Msk (0x8UL) /*!< GPDMA0 LSTDSTREG: CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_LSTDSTREG_CH4_Pos (4UL) /*!< GPDMA0 LSTDSTREG: CH4 (Bit 4) */ +#define GPDMA0_LSTDSTREG_CH4_Msk (0x10UL) /*!< GPDMA0 LSTDSTREG: CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_LSTDSTREG_CH5_Pos (5UL) /*!< GPDMA0 LSTDSTREG: CH5 (Bit 5) */ +#define GPDMA0_LSTDSTREG_CH5_Msk (0x20UL) /*!< GPDMA0 LSTDSTREG: CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_LSTDSTREG_CH6_Pos (6UL) /*!< GPDMA0 LSTDSTREG: CH6 (Bit 6) */ +#define GPDMA0_LSTDSTREG_CH6_Msk (0x40UL) /*!< GPDMA0 LSTDSTREG: CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_LSTDSTREG_CH7_Pos (7UL) /*!< GPDMA0 LSTDSTREG: CH7 (Bit 7) */ +#define GPDMA0_LSTDSTREG_CH7_Msk (0x80UL) /*!< GPDMA0 LSTDSTREG: CH7 (Bitfield-Mask: 0x01) */ +#define GPDMA0_LSTDSTREG_WE_CH0_Pos (8UL) /*!< GPDMA0 LSTDSTREG: WE_CH0 (Bit 8) */ +#define GPDMA0_LSTDSTREG_WE_CH0_Msk (0x100UL) /*!< GPDMA0 LSTDSTREG: WE_CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA0_LSTDSTREG_WE_CH1_Pos (9UL) /*!< GPDMA0 LSTDSTREG: WE_CH1 (Bit 9) */ +#define GPDMA0_LSTDSTREG_WE_CH1_Msk (0x200UL) /*!< GPDMA0 LSTDSTREG: WE_CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA0_LSTDSTREG_WE_CH2_Pos (10UL) /*!< GPDMA0 LSTDSTREG: WE_CH2 (Bit 10) */ +#define GPDMA0_LSTDSTREG_WE_CH2_Msk (0x400UL) /*!< GPDMA0 LSTDSTREG: WE_CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA0_LSTDSTREG_WE_CH3_Pos (11UL) /*!< GPDMA0 LSTDSTREG: WE_CH3 (Bit 11) */ +#define GPDMA0_LSTDSTREG_WE_CH3_Msk (0x800UL) /*!< GPDMA0 LSTDSTREG: WE_CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA0_LSTDSTREG_WE_CH4_Pos (12UL) /*!< GPDMA0 LSTDSTREG: WE_CH4 (Bit 12) */ +#define GPDMA0_LSTDSTREG_WE_CH4_Msk (0x1000UL) /*!< GPDMA0 LSTDSTREG: WE_CH4 (Bitfield-Mask: 0x01) */ +#define GPDMA0_LSTDSTREG_WE_CH5_Pos (13UL) /*!< GPDMA0 LSTDSTREG: WE_CH5 (Bit 13) */ +#define GPDMA0_LSTDSTREG_WE_CH5_Msk (0x2000UL) /*!< GPDMA0 LSTDSTREG: WE_CH5 (Bitfield-Mask: 0x01) */ +#define GPDMA0_LSTDSTREG_WE_CH6_Pos (14UL) /*!< GPDMA0 LSTDSTREG: WE_CH6 (Bit 14) */ +#define GPDMA0_LSTDSTREG_WE_CH6_Msk (0x4000UL) /*!< GPDMA0 LSTDSTREG: WE_CH6 (Bitfield-Mask: 0x01) */ +#define GPDMA0_LSTDSTREG_WE_CH7_Pos (15UL) /*!< GPDMA0 LSTDSTREG: WE_CH7 (Bit 15) */ +#define GPDMA0_LSTDSTREG_WE_CH7_Msk (0x8000UL) /*!< GPDMA0 LSTDSTREG: WE_CH7 (Bitfield-Mask: 0x01) */ + +/* ------------------------------ GPDMA0_DMACFGREG ------------------------------ */ +#define GPDMA0_DMACFGREG_DMA_EN_Pos (0UL) /*!< GPDMA0 DMACFGREG: DMA_EN (Bit 0) */ +#define GPDMA0_DMACFGREG_DMA_EN_Msk (0x1UL) /*!< GPDMA0 DMACFGREG: DMA_EN (Bitfield-Mask: 0x01) */ + +/* ------------------------------- GPDMA0_CHENREG ------------------------------- */ +#define GPDMA0_CHENREG_CH_Pos (0UL) /*!< GPDMA0 CHENREG: CH (Bit 0) */ +#define GPDMA0_CHENREG_CH_Msk (0xffUL) /*!< GPDMA0 CHENREG: CH (Bitfield-Mask: 0xff) */ +#define GPDMA0_CHENREG_WE_CH_Pos (8UL) /*!< GPDMA0 CHENREG: WE_CH (Bit 8) */ +#define GPDMA0_CHENREG_WE_CH_Msk (0xff00UL) /*!< GPDMA0 CHENREG: WE_CH (Bitfield-Mask: 0xff) */ + +/* ---------------------------------- GPDMA0_ID --------------------------------- */ +#define GPDMA0_ID_VALUE_Pos (0UL) /*!< GPDMA0 ID: VALUE (Bit 0) */ +#define GPDMA0_ID_VALUE_Msk (0xffffffffUL) /*!< GPDMA0 ID: VALUE (Bitfield-Mask: 0xffffffff) */ + +/* --------------------------------- GPDMA0_TYPE -------------------------------- */ +#define GPDMA0_TYPE_VALUE_Pos (0UL) /*!< GPDMA0 TYPE: VALUE (Bit 0) */ +#define GPDMA0_TYPE_VALUE_Msk (0xffffffffUL) /*!< GPDMA0 TYPE: VALUE (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------------- GPDMA0_VERSION ------------------------------- */ +#define GPDMA0_VERSION_VALUE_Pos (0UL) /*!< GPDMA0 VERSION: VALUE (Bit 0) */ +#define GPDMA0_VERSION_VALUE_Msk (0xffffffffUL) /*!< GPDMA0 VERSION: VALUE (Bitfield-Mask: 0xffffffff) */ + + +/* ================================================================================ */ +/* ================ Group 'GPDMA0_CH0_1' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ------------------------------ GPDMA0_CH_SAR ------------------------------ */ +#define GPDMA0_CH_SAR_SAR_Pos (0UL) /*!< GPDMA0_CH0_1 SAR: SAR (Bit 0) */ +#define GPDMA0_CH_SAR_SAR_Msk (0xffffffffUL) /*!< GPDMA0_CH0_1 SAR: SAR (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------------ GPDMA0_CH_DAR ------------------------------ */ +#define GPDMA0_CH_DAR_DAR_Pos (0UL) /*!< GPDMA0_CH0_1 DAR: DAR (Bit 0) */ +#define GPDMA0_CH_DAR_DAR_Msk (0xffffffffUL) /*!< GPDMA0_CH0_1 DAR: DAR (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------------ GPDMA0_CH_LLP ------------------------------ */ +#define GPDMA0_CH_LLP_LOC_Pos (2UL) /*!< GPDMA0_CH0_1 LLP: LOC (Bit 2) */ +#define GPDMA0_CH_LLP_LOC_Msk (0xfffffffcUL) /*!< GPDMA0_CH0_1 LLP: LOC (Bitfield-Mask: 0x3fffffff) */ + +/* ------------------------------ GPDMA0_CH_CTLL ----------------------------- */ +#define GPDMA0_CH_CTLL_INT_EN_Pos (0UL) /*!< GPDMA0_CH0_1 CTLL: INT_EN (Bit 0) */ +#define GPDMA0_CH_CTLL_INT_EN_Msk (0x1UL) /*!< GPDMA0_CH0_1 CTLL: INT_EN (Bitfield-Mask: 0x01) */ +#define GPDMA0_CH_CTLL_DST_TR_WIDTH_Pos (1UL) /*!< GPDMA0_CH0_1 CTLL: DST_TR_WIDTH (Bit 1) */ +#define GPDMA0_CH_CTLL_DST_TR_WIDTH_Msk (0xeUL) /*!< GPDMA0_CH0_1 CTLL: DST_TR_WIDTH (Bitfield-Mask: 0x07) */ +#define GPDMA0_CH_CTLL_SRC_TR_WIDTH_Pos (4UL) /*!< GPDMA0_CH0_1 CTLL: SRC_TR_WIDTH (Bit 4) */ +#define GPDMA0_CH_CTLL_SRC_TR_WIDTH_Msk (0x70UL) /*!< GPDMA0_CH0_1 CTLL: SRC_TR_WIDTH (Bitfield-Mask: 0x07) */ +#define GPDMA0_CH_CTLL_DINC_Pos (7UL) /*!< GPDMA0_CH0_1 CTLL: DINC (Bit 7) */ +#define GPDMA0_CH_CTLL_DINC_Msk (0x180UL) /*!< GPDMA0_CH0_1 CTLL: DINC (Bitfield-Mask: 0x03) */ +#define GPDMA0_CH_CTLL_SINC_Pos (9UL) /*!< GPDMA0_CH0_1 CTLL: SINC (Bit 9) */ +#define GPDMA0_CH_CTLL_SINC_Msk (0x600UL) /*!< GPDMA0_CH0_1 CTLL: SINC (Bitfield-Mask: 0x03) */ +#define GPDMA0_CH_CTLL_DEST_MSIZE_Pos (11UL) /*!< GPDMA0_CH0_1 CTLL: DEST_MSIZE (Bit 11) */ +#define GPDMA0_CH_CTLL_DEST_MSIZE_Msk (0x3800UL) /*!< GPDMA0_CH0_1 CTLL: DEST_MSIZE (Bitfield-Mask: 0x07) */ +#define GPDMA0_CH_CTLL_SRC_MSIZE_Pos (14UL) /*!< GPDMA0_CH0_1 CTLL: SRC_MSIZE (Bit 14) */ +#define GPDMA0_CH_CTLL_SRC_MSIZE_Msk (0x1c000UL) /*!< GPDMA0_CH0_1 CTLL: SRC_MSIZE (Bitfield-Mask: 0x07) */ +#define GPDMA0_CH_CTLL_SRC_GATHER_EN_Pos (17UL) /*!< GPDMA0_CH0_1 CTLL: SRC_GATHER_EN (Bit 17) */ +#define GPDMA0_CH_CTLL_SRC_GATHER_EN_Msk (0x20000UL) /*!< GPDMA0_CH0_1 CTLL: SRC_GATHER_EN (Bitfield-Mask: 0x01) */ +#define GPDMA0_CH_CTLL_DST_SCATTER_EN_Pos (18UL) /*!< GPDMA0_CH0_1 CTLL: DST_SCATTER_EN (Bit 18) */ +#define GPDMA0_CH_CTLL_DST_SCATTER_EN_Msk (0x40000UL) /*!< GPDMA0_CH0_1 CTLL: DST_SCATTER_EN (Bitfield-Mask: 0x01) */ +#define GPDMA0_CH_CTLL_TT_FC_Pos (20UL) /*!< GPDMA0_CH0_1 CTLL: TT_FC (Bit 20) */ +#define GPDMA0_CH_CTLL_TT_FC_Msk (0x700000UL) /*!< GPDMA0_CH0_1 CTLL: TT_FC (Bitfield-Mask: 0x07) */ +#define GPDMA0_CH_CTLL_LLP_DST_EN_Pos (27UL) /*!< GPDMA0_CH0_1 CTLL: LLP_DST_EN (Bit 27) */ +#define GPDMA0_CH_CTLL_LLP_DST_EN_Msk (0x8000000UL) /*!< GPDMA0_CH0_1 CTLL: LLP_DST_EN (Bitfield-Mask: 0x01) */ +#define GPDMA0_CH_CTLL_LLP_SRC_EN_Pos (28UL) /*!< GPDMA0_CH0_1 CTLL: LLP_SRC_EN (Bit 28) */ +#define GPDMA0_CH_CTLL_LLP_SRC_EN_Msk (0x10000000UL) /*!< GPDMA0_CH0_1 CTLL: LLP_SRC_EN (Bitfield-Mask: 0x01) */ + +/* ------------------------------ GPDMA0_CH_CTLH ----------------------------- */ +#define GPDMA0_CH_CTLH_BLOCK_TS_Pos (0UL) /*!< GPDMA0_CH0_1 CTLH: BLOCK_TS (Bit 0) */ +#define GPDMA0_CH_CTLH_BLOCK_TS_Msk (0xfffUL) /*!< GPDMA0_CH0_1 CTLH: BLOCK_TS (Bitfield-Mask: 0xfff) */ +#define GPDMA0_CH_CTLH_DONE_Pos (12UL) /*!< GPDMA0_CH0_1 CTLH: DONE (Bit 12) */ +#define GPDMA0_CH_CTLH_DONE_Msk (0x1000UL) /*!< GPDMA0_CH0_1 CTLH: DONE (Bitfield-Mask: 0x01) */ + +/* ----------------------------- GPDMA0_CH_SSTAT ----------------------------- */ +#define GPDMA0_CH_SSTAT_SSTAT_Pos (0UL) /*!< GPDMA0_CH0_1 SSTAT: SSTAT (Bit 0) */ +#define GPDMA0_CH_SSTAT_SSTAT_Msk (0xffffffffUL) /*!< GPDMA0_CH0_1 SSTAT: SSTAT (Bitfield-Mask: 0xffffffff) */ + +/* ----------------------------- GPDMA0_CH_DSTAT ----------------------------- */ +#define GPDMA0_CH_DSTAT_DSTAT_Pos (0UL) /*!< GPDMA0_CH0_1 DSTAT: DSTAT (Bit 0) */ +#define GPDMA0_CH_DSTAT_DSTAT_Msk (0xffffffffUL) /*!< GPDMA0_CH0_1 DSTAT: DSTAT (Bitfield-Mask: 0xffffffff) */ + +/* ---------------------------- GPDMA0_CH_SSTATAR ---------------------------- */ +#define GPDMA0_CH_SSTATAR_SSTATAR_Pos (0UL) /*!< GPDMA0_CH0_1 SSTATAR: SSTATAR (Bit 0) */ +#define GPDMA0_CH_SSTATAR_SSTATAR_Msk (0xffffffffUL) /*!< GPDMA0_CH0_1 SSTATAR: SSTATAR (Bitfield-Mask: 0xffffffff) */ + +/* ---------------------------- GPDMA0_CH_DSTATAR ---------------------------- */ +#define GPDMA0_CH_DSTATAR_DSTATAR_Pos (0UL) /*!< GPDMA0_CH0_1 DSTATAR: DSTATAR (Bit 0) */ +#define GPDMA0_CH_DSTATAR_DSTATAR_Msk (0xffffffffUL) /*!< GPDMA0_CH0_1 DSTATAR: DSTATAR (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------------ GPDMA0_CH_CFGL ----------------------------- */ +#define GPDMA0_CH_CFGL_CH_PRIOR_Pos (5UL) /*!< GPDMA0_CH0_1 CFGL: CH_PRIOR (Bit 5) */ +#define GPDMA0_CH_CFGL_CH_PRIOR_Msk (0xe0UL) /*!< GPDMA0_CH0_1 CFGL: CH_PRIOR (Bitfield-Mask: 0x07) */ +#define GPDMA0_CH_CFGL_CH_SUSP_Pos (8UL) /*!< GPDMA0_CH0_1 CFGL: CH_SUSP (Bit 8) */ +#define GPDMA0_CH_CFGL_CH_SUSP_Msk (0x100UL) /*!< GPDMA0_CH0_1 CFGL: CH_SUSP (Bitfield-Mask: 0x01) */ +#define GPDMA0_CH_CFGL_FIFO_EMPTY_Pos (9UL) /*!< GPDMA0_CH0_1 CFGL: FIFO_EMPTY (Bit 9) */ +#define GPDMA0_CH_CFGL_FIFO_EMPTY_Msk (0x200UL) /*!< GPDMA0_CH0_1 CFGL: FIFO_EMPTY (Bitfield-Mask: 0x01) */ +#define GPDMA0_CH_CFGL_HS_SEL_DST_Pos (10UL) /*!< GPDMA0_CH0_1 CFGL: HS_SEL_DST (Bit 10) */ +#define GPDMA0_CH_CFGL_HS_SEL_DST_Msk (0x400UL) /*!< GPDMA0_CH0_1 CFGL: HS_SEL_DST (Bitfield-Mask: 0x01) */ +#define GPDMA0_CH_CFGL_HS_SEL_SRC_Pos (11UL) /*!< GPDMA0_CH0_1 CFGL: HS_SEL_SRC (Bit 11) */ +#define GPDMA0_CH_CFGL_HS_SEL_SRC_Msk (0x800UL) /*!< GPDMA0_CH0_1 CFGL: HS_SEL_SRC (Bitfield-Mask: 0x01) */ +#define GPDMA0_CH_CFGL_LOCK_CH_L_Pos (12UL) /*!< GPDMA0_CH0_1 CFGL: LOCK_CH_L (Bit 12) */ +#define GPDMA0_CH_CFGL_LOCK_CH_L_Msk (0x3000UL) /*!< GPDMA0_CH0_1 CFGL: LOCK_CH_L (Bitfield-Mask: 0x03) */ +#define GPDMA0_CH_CFGL_LOCK_B_L_Pos (14UL) /*!< GPDMA0_CH0_1 CFGL: LOCK_B_L (Bit 14) */ +#define GPDMA0_CH_CFGL_LOCK_B_L_Msk (0xc000UL) /*!< GPDMA0_CH0_1 CFGL: LOCK_B_L (Bitfield-Mask: 0x03) */ +#define GPDMA0_CH_CFGL_LOCK_CH_Pos (16UL) /*!< GPDMA0_CH0_1 CFGL: LOCK_CH (Bit 16) */ +#define GPDMA0_CH_CFGL_LOCK_CH_Msk (0x10000UL) /*!< GPDMA0_CH0_1 CFGL: LOCK_CH (Bitfield-Mask: 0x01) */ +#define GPDMA0_CH_CFGL_LOCK_B_Pos (17UL) /*!< GPDMA0_CH0_1 CFGL: LOCK_B (Bit 17) */ +#define GPDMA0_CH_CFGL_LOCK_B_Msk (0x20000UL) /*!< GPDMA0_CH0_1 CFGL: LOCK_B (Bitfield-Mask: 0x01) */ +#define GPDMA0_CH_CFGL_DST_HS_POL_Pos (18UL) /*!< GPDMA0_CH0_1 CFGL: DST_HS_POL (Bit 18) */ +#define GPDMA0_CH_CFGL_DST_HS_POL_Msk (0x40000UL) /*!< GPDMA0_CH0_1 CFGL: DST_HS_POL (Bitfield-Mask: 0x01) */ +#define GPDMA0_CH_CFGL_SRC_HS_POL_Pos (19UL) /*!< GPDMA0_CH0_1 CFGL: SRC_HS_POL (Bit 19) */ +#define GPDMA0_CH_CFGL_SRC_HS_POL_Msk (0x80000UL) /*!< GPDMA0_CH0_1 CFGL: SRC_HS_POL (Bitfield-Mask: 0x01) */ +#define GPDMA0_CH_CFGL_MAX_ABRST_Pos (20UL) /*!< GPDMA0_CH0_1 CFGL: MAX_ABRST (Bit 20) */ +#define GPDMA0_CH_CFGL_MAX_ABRST_Msk (0x3ff00000UL) /*!< GPDMA0_CH0_1 CFGL: MAX_ABRST (Bitfield-Mask: 0x3ff) */ +#define GPDMA0_CH_CFGL_RELOAD_SRC_Pos (30UL) /*!< GPDMA0_CH0_1 CFGL: RELOAD_SRC (Bit 30) */ +#define GPDMA0_CH_CFGL_RELOAD_SRC_Msk (0x40000000UL) /*!< GPDMA0_CH0_1 CFGL: RELOAD_SRC (Bitfield-Mask: 0x01) */ +#define GPDMA0_CH_CFGL_RELOAD_DST_Pos (31UL) /*!< GPDMA0_CH0_1 CFGL: RELOAD_DST (Bit 31) */ +#define GPDMA0_CH_CFGL_RELOAD_DST_Msk (0x80000000UL) /*!< GPDMA0_CH0_1 CFGL: RELOAD_DST (Bitfield-Mask: 0x01) */ + +/* ------------------------------ GPDMA0_CH_CFGH ----------------------------- */ +#define GPDMA0_CH_CFGH_FCMODE_Pos (0UL) /*!< GPDMA0_CH0_1 CFGH: FCMODE (Bit 0) */ +#define GPDMA0_CH_CFGH_FCMODE_Msk (0x1UL) /*!< GPDMA0_CH0_1 CFGH: FCMODE (Bitfield-Mask: 0x01) */ +#define GPDMA0_CH_CFGH_FIFO_MODE_Pos (1UL) /*!< GPDMA0_CH0_1 CFGH: FIFO_MODE (Bit 1) */ +#define GPDMA0_CH_CFGH_FIFO_MODE_Msk (0x2UL) /*!< GPDMA0_CH0_1 CFGH: FIFO_MODE (Bitfield-Mask: 0x01) */ +#define GPDMA0_CH_CFGH_PROTCTL_Pos (2UL) /*!< GPDMA0_CH0_1 CFGH: PROTCTL (Bit 2) */ +#define GPDMA0_CH_CFGH_PROTCTL_Msk (0x1cUL) /*!< GPDMA0_CH0_1 CFGH: PROTCTL (Bitfield-Mask: 0x07) */ +#define GPDMA0_CH_CFGH_DS_UPD_EN_Pos (5UL) /*!< GPDMA0_CH0_1 CFGH: DS_UPD_EN (Bit 5) */ +#define GPDMA0_CH_CFGH_DS_UPD_EN_Msk (0x20UL) /*!< GPDMA0_CH0_1 CFGH: DS_UPD_EN (Bitfield-Mask: 0x01) */ +#define GPDMA0_CH_CFGH_SS_UPD_EN_Pos (6UL) /*!< GPDMA0_CH0_1 CFGH: SS_UPD_EN (Bit 6) */ +#define GPDMA0_CH_CFGH_SS_UPD_EN_Msk (0x40UL) /*!< GPDMA0_CH0_1 CFGH: SS_UPD_EN (Bitfield-Mask: 0x01) */ +#define GPDMA0_CH_CFGH_SRC_PER_Pos (7UL) /*!< GPDMA0_CH0_1 CFGH: SRC_PER (Bit 7) */ +#define GPDMA0_CH_CFGH_SRC_PER_Msk (0x780UL) /*!< GPDMA0_CH0_1 CFGH: SRC_PER (Bitfield-Mask: 0x0f) */ +#define GPDMA0_CH_CFGH_DEST_PER_Pos (11UL) /*!< GPDMA0_CH0_1 CFGH: DEST_PER (Bit 11) */ +#define GPDMA0_CH_CFGH_DEST_PER_Msk (0x7800UL) /*!< GPDMA0_CH0_1 CFGH: DEST_PER (Bitfield-Mask: 0x0f) */ + +/* ------------------------------ GPDMA0_CH_SGR ------------------------------ */ +#define GPDMA0_CH_SGR_SGI_Pos (0UL) /*!< GPDMA0_CH0_1 SGR: SGI (Bit 0) */ +#define GPDMA0_CH_SGR_SGI_Msk (0xfffffUL) /*!< GPDMA0_CH0_1 SGR: SGI (Bitfield-Mask: 0xfffff) */ +#define GPDMA0_CH_SGR_SGC_Pos (20UL) /*!< GPDMA0_CH0_1 SGR: SGC (Bit 20) */ +#define GPDMA0_CH_SGR_SGC_Msk (0xfff00000UL) /*!< GPDMA0_CH0_1 SGR: SGC (Bitfield-Mask: 0xfff) */ + +/* ------------------------------ GPDMA0_CH_DSR ------------------------------ */ +#define GPDMA0_CH_DSR_DSI_Pos (0UL) /*!< GPDMA0_CH0_1 DSR: DSI (Bit 0) */ +#define GPDMA0_CH_DSR_DSI_Msk (0xfffffUL) /*!< GPDMA0_CH0_1 DSR: DSI (Bitfield-Mask: 0xfffff) */ +#define GPDMA0_CH_DSR_DSC_Pos (20UL) /*!< GPDMA0_CH0_1 DSR: DSC (Bit 20) */ +#define GPDMA0_CH_DSR_DSC_Msk (0xfff00000UL) /*!< GPDMA0_CH0_1 DSR: DSC (Bitfield-Mask: 0xfff) */ + + +/* ================================================================================ */ +/* ================ struct 'GPDMA1' Position & Mask ================ */ +/* ================================================================================ */ + + +/* -------------------------------- GPDMA1_RAWTFR ------------------------------- */ +#define GPDMA1_RAWTFR_CH0_Pos (0UL) /*!< GPDMA1 RAWTFR: CH0 (Bit 0) */ +#define GPDMA1_RAWTFR_CH0_Msk (0x1UL) /*!< GPDMA1 RAWTFR: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA1_RAWTFR_CH1_Pos (1UL) /*!< GPDMA1 RAWTFR: CH1 (Bit 1) */ +#define GPDMA1_RAWTFR_CH1_Msk (0x2UL) /*!< GPDMA1 RAWTFR: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA1_RAWTFR_CH2_Pos (2UL) /*!< GPDMA1 RAWTFR: CH2 (Bit 2) */ +#define GPDMA1_RAWTFR_CH2_Msk (0x4UL) /*!< GPDMA1 RAWTFR: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA1_RAWTFR_CH3_Pos (3UL) /*!< GPDMA1 RAWTFR: CH3 (Bit 3) */ +#define GPDMA1_RAWTFR_CH3_Msk (0x8UL) /*!< GPDMA1 RAWTFR: CH3 (Bitfield-Mask: 0x01) */ + +/* ------------------------------- GPDMA1_RAWBLOCK ------------------------------ */ +#define GPDMA1_RAWBLOCK_CH0_Pos (0UL) /*!< GPDMA1 RAWBLOCK: CH0 (Bit 0) */ +#define GPDMA1_RAWBLOCK_CH0_Msk (0x1UL) /*!< GPDMA1 RAWBLOCK: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA1_RAWBLOCK_CH1_Pos (1UL) /*!< GPDMA1 RAWBLOCK: CH1 (Bit 1) */ +#define GPDMA1_RAWBLOCK_CH1_Msk (0x2UL) /*!< GPDMA1 RAWBLOCK: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA1_RAWBLOCK_CH2_Pos (2UL) /*!< GPDMA1 RAWBLOCK: CH2 (Bit 2) */ +#define GPDMA1_RAWBLOCK_CH2_Msk (0x4UL) /*!< GPDMA1 RAWBLOCK: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA1_RAWBLOCK_CH3_Pos (3UL) /*!< GPDMA1 RAWBLOCK: CH3 (Bit 3) */ +#define GPDMA1_RAWBLOCK_CH3_Msk (0x8UL) /*!< GPDMA1 RAWBLOCK: CH3 (Bitfield-Mask: 0x01) */ + +/* ------------------------------ GPDMA1_RAWSRCTRAN ----------------------------- */ +#define GPDMA1_RAWSRCTRAN_CH0_Pos (0UL) /*!< GPDMA1 RAWSRCTRAN: CH0 (Bit 0) */ +#define GPDMA1_RAWSRCTRAN_CH0_Msk (0x1UL) /*!< GPDMA1 RAWSRCTRAN: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA1_RAWSRCTRAN_CH1_Pos (1UL) /*!< GPDMA1 RAWSRCTRAN: CH1 (Bit 1) */ +#define GPDMA1_RAWSRCTRAN_CH1_Msk (0x2UL) /*!< GPDMA1 RAWSRCTRAN: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA1_RAWSRCTRAN_CH2_Pos (2UL) /*!< GPDMA1 RAWSRCTRAN: CH2 (Bit 2) */ +#define GPDMA1_RAWSRCTRAN_CH2_Msk (0x4UL) /*!< GPDMA1 RAWSRCTRAN: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA1_RAWSRCTRAN_CH3_Pos (3UL) /*!< GPDMA1 RAWSRCTRAN: CH3 (Bit 3) */ +#define GPDMA1_RAWSRCTRAN_CH3_Msk (0x8UL) /*!< GPDMA1 RAWSRCTRAN: CH3 (Bitfield-Mask: 0x01) */ + +/* ------------------------------ GPDMA1_RAWDSTTRAN ----------------------------- */ +#define GPDMA1_RAWDSTTRAN_CH0_Pos (0UL) /*!< GPDMA1 RAWDSTTRAN: CH0 (Bit 0) */ +#define GPDMA1_RAWDSTTRAN_CH0_Msk (0x1UL) /*!< GPDMA1 RAWDSTTRAN: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA1_RAWDSTTRAN_CH1_Pos (1UL) /*!< GPDMA1 RAWDSTTRAN: CH1 (Bit 1) */ +#define GPDMA1_RAWDSTTRAN_CH1_Msk (0x2UL) /*!< GPDMA1 RAWDSTTRAN: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA1_RAWDSTTRAN_CH2_Pos (2UL) /*!< GPDMA1 RAWDSTTRAN: CH2 (Bit 2) */ +#define GPDMA1_RAWDSTTRAN_CH2_Msk (0x4UL) /*!< GPDMA1 RAWDSTTRAN: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA1_RAWDSTTRAN_CH3_Pos (3UL) /*!< GPDMA1 RAWDSTTRAN: CH3 (Bit 3) */ +#define GPDMA1_RAWDSTTRAN_CH3_Msk (0x8UL) /*!< GPDMA1 RAWDSTTRAN: CH3 (Bitfield-Mask: 0x01) */ + +/* -------------------------------- GPDMA1_RAWERR ------------------------------- */ +#define GPDMA1_RAWERR_CH0_Pos (0UL) /*!< GPDMA1 RAWERR: CH0 (Bit 0) */ +#define GPDMA1_RAWERR_CH0_Msk (0x1UL) /*!< GPDMA1 RAWERR: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA1_RAWERR_CH1_Pos (1UL) /*!< GPDMA1 RAWERR: CH1 (Bit 1) */ +#define GPDMA1_RAWERR_CH1_Msk (0x2UL) /*!< GPDMA1 RAWERR: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA1_RAWERR_CH2_Pos (2UL) /*!< GPDMA1 RAWERR: CH2 (Bit 2) */ +#define GPDMA1_RAWERR_CH2_Msk (0x4UL) /*!< GPDMA1 RAWERR: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA1_RAWERR_CH3_Pos (3UL) /*!< GPDMA1 RAWERR: CH3 (Bit 3) */ +#define GPDMA1_RAWERR_CH3_Msk (0x8UL) /*!< GPDMA1 RAWERR: CH3 (Bitfield-Mask: 0x01) */ + +/* ------------------------------ GPDMA1_STATUSTFR ------------------------------ */ +#define GPDMA1_STATUSTFR_CH0_Pos (0UL) /*!< GPDMA1 STATUSTFR: CH0 (Bit 0) */ +#define GPDMA1_STATUSTFR_CH0_Msk (0x1UL) /*!< GPDMA1 STATUSTFR: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA1_STATUSTFR_CH1_Pos (1UL) /*!< GPDMA1 STATUSTFR: CH1 (Bit 1) */ +#define GPDMA1_STATUSTFR_CH1_Msk (0x2UL) /*!< GPDMA1 STATUSTFR: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA1_STATUSTFR_CH2_Pos (2UL) /*!< GPDMA1 STATUSTFR: CH2 (Bit 2) */ +#define GPDMA1_STATUSTFR_CH2_Msk (0x4UL) /*!< GPDMA1 STATUSTFR: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA1_STATUSTFR_CH3_Pos (3UL) /*!< GPDMA1 STATUSTFR: CH3 (Bit 3) */ +#define GPDMA1_STATUSTFR_CH3_Msk (0x8UL) /*!< GPDMA1 STATUSTFR: CH3 (Bitfield-Mask: 0x01) */ + +/* ----------------------------- GPDMA1_STATUSBLOCK ----------------------------- */ +#define GPDMA1_STATUSBLOCK_CH0_Pos (0UL) /*!< GPDMA1 STATUSBLOCK: CH0 (Bit 0) */ +#define GPDMA1_STATUSBLOCK_CH0_Msk (0x1UL) /*!< GPDMA1 STATUSBLOCK: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA1_STATUSBLOCK_CH1_Pos (1UL) /*!< GPDMA1 STATUSBLOCK: CH1 (Bit 1) */ +#define GPDMA1_STATUSBLOCK_CH1_Msk (0x2UL) /*!< GPDMA1 STATUSBLOCK: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA1_STATUSBLOCK_CH2_Pos (2UL) /*!< GPDMA1 STATUSBLOCK: CH2 (Bit 2) */ +#define GPDMA1_STATUSBLOCK_CH2_Msk (0x4UL) /*!< GPDMA1 STATUSBLOCK: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA1_STATUSBLOCK_CH3_Pos (3UL) /*!< GPDMA1 STATUSBLOCK: CH3 (Bit 3) */ +#define GPDMA1_STATUSBLOCK_CH3_Msk (0x8UL) /*!< GPDMA1 STATUSBLOCK: CH3 (Bitfield-Mask: 0x01) */ + +/* ---------------------------- GPDMA1_STATUSSRCTRAN ---------------------------- */ +#define GPDMA1_STATUSSRCTRAN_CH0_Pos (0UL) /*!< GPDMA1 STATUSSRCTRAN: CH0 (Bit 0) */ +#define GPDMA1_STATUSSRCTRAN_CH0_Msk (0x1UL) /*!< GPDMA1 STATUSSRCTRAN: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA1_STATUSSRCTRAN_CH1_Pos (1UL) /*!< GPDMA1 STATUSSRCTRAN: CH1 (Bit 1) */ +#define GPDMA1_STATUSSRCTRAN_CH1_Msk (0x2UL) /*!< GPDMA1 STATUSSRCTRAN: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA1_STATUSSRCTRAN_CH2_Pos (2UL) /*!< GPDMA1 STATUSSRCTRAN: CH2 (Bit 2) */ +#define GPDMA1_STATUSSRCTRAN_CH2_Msk (0x4UL) /*!< GPDMA1 STATUSSRCTRAN: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA1_STATUSSRCTRAN_CH3_Pos (3UL) /*!< GPDMA1 STATUSSRCTRAN: CH3 (Bit 3) */ +#define GPDMA1_STATUSSRCTRAN_CH3_Msk (0x8UL) /*!< GPDMA1 STATUSSRCTRAN: CH3 (Bitfield-Mask: 0x01) */ + +/* ---------------------------- GPDMA1_STATUSDSTTRAN ---------------------------- */ +#define GPDMA1_STATUSDSTTRAN_CH0_Pos (0UL) /*!< GPDMA1 STATUSDSTTRAN: CH0 (Bit 0) */ +#define GPDMA1_STATUSDSTTRAN_CH0_Msk (0x1UL) /*!< GPDMA1 STATUSDSTTRAN: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA1_STATUSDSTTRAN_CH1_Pos (1UL) /*!< GPDMA1 STATUSDSTTRAN: CH1 (Bit 1) */ +#define GPDMA1_STATUSDSTTRAN_CH1_Msk (0x2UL) /*!< GPDMA1 STATUSDSTTRAN: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA1_STATUSDSTTRAN_CH2_Pos (2UL) /*!< GPDMA1 STATUSDSTTRAN: CH2 (Bit 2) */ +#define GPDMA1_STATUSDSTTRAN_CH2_Msk (0x4UL) /*!< GPDMA1 STATUSDSTTRAN: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA1_STATUSDSTTRAN_CH3_Pos (3UL) /*!< GPDMA1 STATUSDSTTRAN: CH3 (Bit 3) */ +#define GPDMA1_STATUSDSTTRAN_CH3_Msk (0x8UL) /*!< GPDMA1 STATUSDSTTRAN: CH3 (Bitfield-Mask: 0x01) */ + +/* ------------------------------ GPDMA1_STATUSERR ------------------------------ */ +#define GPDMA1_STATUSERR_CH0_Pos (0UL) /*!< GPDMA1 STATUSERR: CH0 (Bit 0) */ +#define GPDMA1_STATUSERR_CH0_Msk (0x1UL) /*!< GPDMA1 STATUSERR: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA1_STATUSERR_CH1_Pos (1UL) /*!< GPDMA1 STATUSERR: CH1 (Bit 1) */ +#define GPDMA1_STATUSERR_CH1_Msk (0x2UL) /*!< GPDMA1 STATUSERR: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA1_STATUSERR_CH2_Pos (2UL) /*!< GPDMA1 STATUSERR: CH2 (Bit 2) */ +#define GPDMA1_STATUSERR_CH2_Msk (0x4UL) /*!< GPDMA1 STATUSERR: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA1_STATUSERR_CH3_Pos (3UL) /*!< GPDMA1 STATUSERR: CH3 (Bit 3) */ +#define GPDMA1_STATUSERR_CH3_Msk (0x8UL) /*!< GPDMA1 STATUSERR: CH3 (Bitfield-Mask: 0x01) */ + +/* ------------------------------- GPDMA1_MASKTFR ------------------------------- */ +#define GPDMA1_MASKTFR_CH0_Pos (0UL) /*!< GPDMA1 MASKTFR: CH0 (Bit 0) */ +#define GPDMA1_MASKTFR_CH0_Msk (0x1UL) /*!< GPDMA1 MASKTFR: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA1_MASKTFR_CH1_Pos (1UL) /*!< GPDMA1 MASKTFR: CH1 (Bit 1) */ +#define GPDMA1_MASKTFR_CH1_Msk (0x2UL) /*!< GPDMA1 MASKTFR: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA1_MASKTFR_CH2_Pos (2UL) /*!< GPDMA1 MASKTFR: CH2 (Bit 2) */ +#define GPDMA1_MASKTFR_CH2_Msk (0x4UL) /*!< GPDMA1 MASKTFR: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA1_MASKTFR_CH3_Pos (3UL) /*!< GPDMA1 MASKTFR: CH3 (Bit 3) */ +#define GPDMA1_MASKTFR_CH3_Msk (0x8UL) /*!< GPDMA1 MASKTFR: CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA1_MASKTFR_WE_CH0_Pos (8UL) /*!< GPDMA1 MASKTFR: WE_CH0 (Bit 8) */ +#define GPDMA1_MASKTFR_WE_CH0_Msk (0x100UL) /*!< GPDMA1 MASKTFR: WE_CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA1_MASKTFR_WE_CH1_Pos (9UL) /*!< GPDMA1 MASKTFR: WE_CH1 (Bit 9) */ +#define GPDMA1_MASKTFR_WE_CH1_Msk (0x200UL) /*!< GPDMA1 MASKTFR: WE_CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA1_MASKTFR_WE_CH2_Pos (10UL) /*!< GPDMA1 MASKTFR: WE_CH2 (Bit 10) */ +#define GPDMA1_MASKTFR_WE_CH2_Msk (0x400UL) /*!< GPDMA1 MASKTFR: WE_CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA1_MASKTFR_WE_CH3_Pos (11UL) /*!< GPDMA1 MASKTFR: WE_CH3 (Bit 11) */ +#define GPDMA1_MASKTFR_WE_CH3_Msk (0x800UL) /*!< GPDMA1 MASKTFR: WE_CH3 (Bitfield-Mask: 0x01) */ + +/* ------------------------------ GPDMA1_MASKBLOCK ------------------------------ */ +#define GPDMA1_MASKBLOCK_CH0_Pos (0UL) /*!< GPDMA1 MASKBLOCK: CH0 (Bit 0) */ +#define GPDMA1_MASKBLOCK_CH0_Msk (0x1UL) /*!< GPDMA1 MASKBLOCK: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA1_MASKBLOCK_CH1_Pos (1UL) /*!< GPDMA1 MASKBLOCK: CH1 (Bit 1) */ +#define GPDMA1_MASKBLOCK_CH1_Msk (0x2UL) /*!< GPDMA1 MASKBLOCK: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA1_MASKBLOCK_CH2_Pos (2UL) /*!< GPDMA1 MASKBLOCK: CH2 (Bit 2) */ +#define GPDMA1_MASKBLOCK_CH2_Msk (0x4UL) /*!< GPDMA1 MASKBLOCK: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA1_MASKBLOCK_CH3_Pos (3UL) /*!< GPDMA1 MASKBLOCK: CH3 (Bit 3) */ +#define GPDMA1_MASKBLOCK_CH3_Msk (0x8UL) /*!< GPDMA1 MASKBLOCK: CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA1_MASKBLOCK_WE_CH0_Pos (8UL) /*!< GPDMA1 MASKBLOCK: WE_CH0 (Bit 8) */ +#define GPDMA1_MASKBLOCK_WE_CH0_Msk (0x100UL) /*!< GPDMA1 MASKBLOCK: WE_CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA1_MASKBLOCK_WE_CH1_Pos (9UL) /*!< GPDMA1 MASKBLOCK: WE_CH1 (Bit 9) */ +#define GPDMA1_MASKBLOCK_WE_CH1_Msk (0x200UL) /*!< GPDMA1 MASKBLOCK: WE_CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA1_MASKBLOCK_WE_CH2_Pos (10UL) /*!< GPDMA1 MASKBLOCK: WE_CH2 (Bit 10) */ +#define GPDMA1_MASKBLOCK_WE_CH2_Msk (0x400UL) /*!< GPDMA1 MASKBLOCK: WE_CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA1_MASKBLOCK_WE_CH3_Pos (11UL) /*!< GPDMA1 MASKBLOCK: WE_CH3 (Bit 11) */ +#define GPDMA1_MASKBLOCK_WE_CH3_Msk (0x800UL) /*!< GPDMA1 MASKBLOCK: WE_CH3 (Bitfield-Mask: 0x01) */ + +/* ----------------------------- GPDMA1_MASKSRCTRAN ----------------------------- */ +#define GPDMA1_MASKSRCTRAN_CH0_Pos (0UL) /*!< GPDMA1 MASKSRCTRAN: CH0 (Bit 0) */ +#define GPDMA1_MASKSRCTRAN_CH0_Msk (0x1UL) /*!< GPDMA1 MASKSRCTRAN: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA1_MASKSRCTRAN_CH1_Pos (1UL) /*!< GPDMA1 MASKSRCTRAN: CH1 (Bit 1) */ +#define GPDMA1_MASKSRCTRAN_CH1_Msk (0x2UL) /*!< GPDMA1 MASKSRCTRAN: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA1_MASKSRCTRAN_CH2_Pos (2UL) /*!< GPDMA1 MASKSRCTRAN: CH2 (Bit 2) */ +#define GPDMA1_MASKSRCTRAN_CH2_Msk (0x4UL) /*!< GPDMA1 MASKSRCTRAN: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA1_MASKSRCTRAN_CH3_Pos (3UL) /*!< GPDMA1 MASKSRCTRAN: CH3 (Bit 3) */ +#define GPDMA1_MASKSRCTRAN_CH3_Msk (0x8UL) /*!< GPDMA1 MASKSRCTRAN: CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA1_MASKSRCTRAN_WE_CH0_Pos (8UL) /*!< GPDMA1 MASKSRCTRAN: WE_CH0 (Bit 8) */ +#define GPDMA1_MASKSRCTRAN_WE_CH0_Msk (0x100UL) /*!< GPDMA1 MASKSRCTRAN: WE_CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA1_MASKSRCTRAN_WE_CH1_Pos (9UL) /*!< GPDMA1 MASKSRCTRAN: WE_CH1 (Bit 9) */ +#define GPDMA1_MASKSRCTRAN_WE_CH1_Msk (0x200UL) /*!< GPDMA1 MASKSRCTRAN: WE_CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA1_MASKSRCTRAN_WE_CH2_Pos (10UL) /*!< GPDMA1 MASKSRCTRAN: WE_CH2 (Bit 10) */ +#define GPDMA1_MASKSRCTRAN_WE_CH2_Msk (0x400UL) /*!< GPDMA1 MASKSRCTRAN: WE_CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA1_MASKSRCTRAN_WE_CH3_Pos (11UL) /*!< GPDMA1 MASKSRCTRAN: WE_CH3 (Bit 11) */ +#define GPDMA1_MASKSRCTRAN_WE_CH3_Msk (0x800UL) /*!< GPDMA1 MASKSRCTRAN: WE_CH3 (Bitfield-Mask: 0x01) */ + +/* ----------------------------- GPDMA1_MASKDSTTRAN ----------------------------- */ +#define GPDMA1_MASKDSTTRAN_CH0_Pos (0UL) /*!< GPDMA1 MASKDSTTRAN: CH0 (Bit 0) */ +#define GPDMA1_MASKDSTTRAN_CH0_Msk (0x1UL) /*!< GPDMA1 MASKDSTTRAN: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA1_MASKDSTTRAN_CH1_Pos (1UL) /*!< GPDMA1 MASKDSTTRAN: CH1 (Bit 1) */ +#define GPDMA1_MASKDSTTRAN_CH1_Msk (0x2UL) /*!< GPDMA1 MASKDSTTRAN: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA1_MASKDSTTRAN_CH2_Pos (2UL) /*!< GPDMA1 MASKDSTTRAN: CH2 (Bit 2) */ +#define GPDMA1_MASKDSTTRAN_CH2_Msk (0x4UL) /*!< GPDMA1 MASKDSTTRAN: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA1_MASKDSTTRAN_CH3_Pos (3UL) /*!< GPDMA1 MASKDSTTRAN: CH3 (Bit 3) */ +#define GPDMA1_MASKDSTTRAN_CH3_Msk (0x8UL) /*!< GPDMA1 MASKDSTTRAN: CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA1_MASKDSTTRAN_WE_CH0_Pos (8UL) /*!< GPDMA1 MASKDSTTRAN: WE_CH0 (Bit 8) */ +#define GPDMA1_MASKDSTTRAN_WE_CH0_Msk (0x100UL) /*!< GPDMA1 MASKDSTTRAN: WE_CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA1_MASKDSTTRAN_WE_CH1_Pos (9UL) /*!< GPDMA1 MASKDSTTRAN: WE_CH1 (Bit 9) */ +#define GPDMA1_MASKDSTTRAN_WE_CH1_Msk (0x200UL) /*!< GPDMA1 MASKDSTTRAN: WE_CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA1_MASKDSTTRAN_WE_CH2_Pos (10UL) /*!< GPDMA1 MASKDSTTRAN: WE_CH2 (Bit 10) */ +#define GPDMA1_MASKDSTTRAN_WE_CH2_Msk (0x400UL) /*!< GPDMA1 MASKDSTTRAN: WE_CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA1_MASKDSTTRAN_WE_CH3_Pos (11UL) /*!< GPDMA1 MASKDSTTRAN: WE_CH3 (Bit 11) */ +#define GPDMA1_MASKDSTTRAN_WE_CH3_Msk (0x800UL) /*!< GPDMA1 MASKDSTTRAN: WE_CH3 (Bitfield-Mask: 0x01) */ + +/* ------------------------------- GPDMA1_MASKERR ------------------------------- */ +#define GPDMA1_MASKERR_CH0_Pos (0UL) /*!< GPDMA1 MASKERR: CH0 (Bit 0) */ +#define GPDMA1_MASKERR_CH0_Msk (0x1UL) /*!< GPDMA1 MASKERR: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA1_MASKERR_CH1_Pos (1UL) /*!< GPDMA1 MASKERR: CH1 (Bit 1) */ +#define GPDMA1_MASKERR_CH1_Msk (0x2UL) /*!< GPDMA1 MASKERR: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA1_MASKERR_CH2_Pos (2UL) /*!< GPDMA1 MASKERR: CH2 (Bit 2) */ +#define GPDMA1_MASKERR_CH2_Msk (0x4UL) /*!< GPDMA1 MASKERR: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA1_MASKERR_CH3_Pos (3UL) /*!< GPDMA1 MASKERR: CH3 (Bit 3) */ +#define GPDMA1_MASKERR_CH3_Msk (0x8UL) /*!< GPDMA1 MASKERR: CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA1_MASKERR_WE_CH0_Pos (8UL) /*!< GPDMA1 MASKERR: WE_CH0 (Bit 8) */ +#define GPDMA1_MASKERR_WE_CH0_Msk (0x100UL) /*!< GPDMA1 MASKERR: WE_CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA1_MASKERR_WE_CH1_Pos (9UL) /*!< GPDMA1 MASKERR: WE_CH1 (Bit 9) */ +#define GPDMA1_MASKERR_WE_CH1_Msk (0x200UL) /*!< GPDMA1 MASKERR: WE_CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA1_MASKERR_WE_CH2_Pos (10UL) /*!< GPDMA1 MASKERR: WE_CH2 (Bit 10) */ +#define GPDMA1_MASKERR_WE_CH2_Msk (0x400UL) /*!< GPDMA1 MASKERR: WE_CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA1_MASKERR_WE_CH3_Pos (11UL) /*!< GPDMA1 MASKERR: WE_CH3 (Bit 11) */ +#define GPDMA1_MASKERR_WE_CH3_Msk (0x800UL) /*!< GPDMA1 MASKERR: WE_CH3 (Bitfield-Mask: 0x01) */ + +/* ------------------------------- GPDMA1_CLEARTFR ------------------------------ */ +#define GPDMA1_CLEARTFR_CH0_Pos (0UL) /*!< GPDMA1 CLEARTFR: CH0 (Bit 0) */ +#define GPDMA1_CLEARTFR_CH0_Msk (0x1UL) /*!< GPDMA1 CLEARTFR: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA1_CLEARTFR_CH1_Pos (1UL) /*!< GPDMA1 CLEARTFR: CH1 (Bit 1) */ +#define GPDMA1_CLEARTFR_CH1_Msk (0x2UL) /*!< GPDMA1 CLEARTFR: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA1_CLEARTFR_CH2_Pos (2UL) /*!< GPDMA1 CLEARTFR: CH2 (Bit 2) */ +#define GPDMA1_CLEARTFR_CH2_Msk (0x4UL) /*!< GPDMA1 CLEARTFR: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA1_CLEARTFR_CH3_Pos (3UL) /*!< GPDMA1 CLEARTFR: CH3 (Bit 3) */ +#define GPDMA1_CLEARTFR_CH3_Msk (0x8UL) /*!< GPDMA1 CLEARTFR: CH3 (Bitfield-Mask: 0x01) */ + +/* ------------------------------ GPDMA1_CLEARBLOCK ----------------------------- */ +#define GPDMA1_CLEARBLOCK_CH0_Pos (0UL) /*!< GPDMA1 CLEARBLOCK: CH0 (Bit 0) */ +#define GPDMA1_CLEARBLOCK_CH0_Msk (0x1UL) /*!< GPDMA1 CLEARBLOCK: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA1_CLEARBLOCK_CH1_Pos (1UL) /*!< GPDMA1 CLEARBLOCK: CH1 (Bit 1) */ +#define GPDMA1_CLEARBLOCK_CH1_Msk (0x2UL) /*!< GPDMA1 CLEARBLOCK: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA1_CLEARBLOCK_CH2_Pos (2UL) /*!< GPDMA1 CLEARBLOCK: CH2 (Bit 2) */ +#define GPDMA1_CLEARBLOCK_CH2_Msk (0x4UL) /*!< GPDMA1 CLEARBLOCK: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA1_CLEARBLOCK_CH3_Pos (3UL) /*!< GPDMA1 CLEARBLOCK: CH3 (Bit 3) */ +#define GPDMA1_CLEARBLOCK_CH3_Msk (0x8UL) /*!< GPDMA1 CLEARBLOCK: CH3 (Bitfield-Mask: 0x01) */ + +/* ----------------------------- GPDMA1_CLEARSRCTRAN ---------------------------- */ +#define GPDMA1_CLEARSRCTRAN_CH0_Pos (0UL) /*!< GPDMA1 CLEARSRCTRAN: CH0 (Bit 0) */ +#define GPDMA1_CLEARSRCTRAN_CH0_Msk (0x1UL) /*!< GPDMA1 CLEARSRCTRAN: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA1_CLEARSRCTRAN_CH1_Pos (1UL) /*!< GPDMA1 CLEARSRCTRAN: CH1 (Bit 1) */ +#define GPDMA1_CLEARSRCTRAN_CH1_Msk (0x2UL) /*!< GPDMA1 CLEARSRCTRAN: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA1_CLEARSRCTRAN_CH2_Pos (2UL) /*!< GPDMA1 CLEARSRCTRAN: CH2 (Bit 2) */ +#define GPDMA1_CLEARSRCTRAN_CH2_Msk (0x4UL) /*!< GPDMA1 CLEARSRCTRAN: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA1_CLEARSRCTRAN_CH3_Pos (3UL) /*!< GPDMA1 CLEARSRCTRAN: CH3 (Bit 3) */ +#define GPDMA1_CLEARSRCTRAN_CH3_Msk (0x8UL) /*!< GPDMA1 CLEARSRCTRAN: CH3 (Bitfield-Mask: 0x01) */ + +/* ----------------------------- GPDMA1_CLEARDSTTRAN ---------------------------- */ +#define GPDMA1_CLEARDSTTRAN_CH0_Pos (0UL) /*!< GPDMA1 CLEARDSTTRAN: CH0 (Bit 0) */ +#define GPDMA1_CLEARDSTTRAN_CH0_Msk (0x1UL) /*!< GPDMA1 CLEARDSTTRAN: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA1_CLEARDSTTRAN_CH1_Pos (1UL) /*!< GPDMA1 CLEARDSTTRAN: CH1 (Bit 1) */ +#define GPDMA1_CLEARDSTTRAN_CH1_Msk (0x2UL) /*!< GPDMA1 CLEARDSTTRAN: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA1_CLEARDSTTRAN_CH2_Pos (2UL) /*!< GPDMA1 CLEARDSTTRAN: CH2 (Bit 2) */ +#define GPDMA1_CLEARDSTTRAN_CH2_Msk (0x4UL) /*!< GPDMA1 CLEARDSTTRAN: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA1_CLEARDSTTRAN_CH3_Pos (3UL) /*!< GPDMA1 CLEARDSTTRAN: CH3 (Bit 3) */ +#define GPDMA1_CLEARDSTTRAN_CH3_Msk (0x8UL) /*!< GPDMA1 CLEARDSTTRAN: CH3 (Bitfield-Mask: 0x01) */ + +/* ------------------------------- GPDMA1_CLEARERR ------------------------------ */ +#define GPDMA1_CLEARERR_CH0_Pos (0UL) /*!< GPDMA1 CLEARERR: CH0 (Bit 0) */ +#define GPDMA1_CLEARERR_CH0_Msk (0x1UL) /*!< GPDMA1 CLEARERR: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA1_CLEARERR_CH1_Pos (1UL) /*!< GPDMA1 CLEARERR: CH1 (Bit 1) */ +#define GPDMA1_CLEARERR_CH1_Msk (0x2UL) /*!< GPDMA1 CLEARERR: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA1_CLEARERR_CH2_Pos (2UL) /*!< GPDMA1 CLEARERR: CH2 (Bit 2) */ +#define GPDMA1_CLEARERR_CH2_Msk (0x4UL) /*!< GPDMA1 CLEARERR: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA1_CLEARERR_CH3_Pos (3UL) /*!< GPDMA1 CLEARERR: CH3 (Bit 3) */ +#define GPDMA1_CLEARERR_CH3_Msk (0x8UL) /*!< GPDMA1 CLEARERR: CH3 (Bitfield-Mask: 0x01) */ + +/* ------------------------------ GPDMA1_STATUSINT ------------------------------ */ +#define GPDMA1_STATUSINT_TFR_Pos (0UL) /*!< GPDMA1 STATUSINT: TFR (Bit 0) */ +#define GPDMA1_STATUSINT_TFR_Msk (0x1UL) /*!< GPDMA1 STATUSINT: TFR (Bitfield-Mask: 0x01) */ +#define GPDMA1_STATUSINT_BLOCK_Pos (1UL) /*!< GPDMA1 STATUSINT: BLOCK (Bit 1) */ +#define GPDMA1_STATUSINT_BLOCK_Msk (0x2UL) /*!< GPDMA1 STATUSINT: BLOCK (Bitfield-Mask: 0x01) */ +#define GPDMA1_STATUSINT_SRCT_Pos (2UL) /*!< GPDMA1 STATUSINT: SRCT (Bit 2) */ +#define GPDMA1_STATUSINT_SRCT_Msk (0x4UL) /*!< GPDMA1 STATUSINT: SRCT (Bitfield-Mask: 0x01) */ +#define GPDMA1_STATUSINT_DSTT_Pos (3UL) /*!< GPDMA1 STATUSINT: DSTT (Bit 3) */ +#define GPDMA1_STATUSINT_DSTT_Msk (0x8UL) /*!< GPDMA1 STATUSINT: DSTT (Bitfield-Mask: 0x01) */ +#define GPDMA1_STATUSINT_ERR_Pos (4UL) /*!< GPDMA1 STATUSINT: ERR (Bit 4) */ +#define GPDMA1_STATUSINT_ERR_Msk (0x10UL) /*!< GPDMA1 STATUSINT: ERR (Bitfield-Mask: 0x01) */ + +/* ------------------------------ GPDMA1_REQSRCREG ------------------------------ */ +#define GPDMA1_REQSRCREG_CH0_Pos (0UL) /*!< GPDMA1 REQSRCREG: CH0 (Bit 0) */ +#define GPDMA1_REQSRCREG_CH0_Msk (0x1UL) /*!< GPDMA1 REQSRCREG: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA1_REQSRCREG_CH1_Pos (1UL) /*!< GPDMA1 REQSRCREG: CH1 (Bit 1) */ +#define GPDMA1_REQSRCREG_CH1_Msk (0x2UL) /*!< GPDMA1 REQSRCREG: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA1_REQSRCREG_CH2_Pos (2UL) /*!< GPDMA1 REQSRCREG: CH2 (Bit 2) */ +#define GPDMA1_REQSRCREG_CH2_Msk (0x4UL) /*!< GPDMA1 REQSRCREG: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA1_REQSRCREG_CH3_Pos (3UL) /*!< GPDMA1 REQSRCREG: CH3 (Bit 3) */ +#define GPDMA1_REQSRCREG_CH3_Msk (0x8UL) /*!< GPDMA1 REQSRCREG: CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA1_REQSRCREG_WE_CH0_Pos (8UL) /*!< GPDMA1 REQSRCREG: WE_CH0 (Bit 8) */ +#define GPDMA1_REQSRCREG_WE_CH0_Msk (0x100UL) /*!< GPDMA1 REQSRCREG: WE_CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA1_REQSRCREG_WE_CH1_Pos (9UL) /*!< GPDMA1 REQSRCREG: WE_CH1 (Bit 9) */ +#define GPDMA1_REQSRCREG_WE_CH1_Msk (0x200UL) /*!< GPDMA1 REQSRCREG: WE_CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA1_REQSRCREG_WE_CH2_Pos (10UL) /*!< GPDMA1 REQSRCREG: WE_CH2 (Bit 10) */ +#define GPDMA1_REQSRCREG_WE_CH2_Msk (0x400UL) /*!< GPDMA1 REQSRCREG: WE_CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA1_REQSRCREG_WE_CH3_Pos (11UL) /*!< GPDMA1 REQSRCREG: WE_CH3 (Bit 11) */ +#define GPDMA1_REQSRCREG_WE_CH3_Msk (0x800UL) /*!< GPDMA1 REQSRCREG: WE_CH3 (Bitfield-Mask: 0x01) */ + +/* ------------------------------ GPDMA1_REQDSTREG ------------------------------ */ +#define GPDMA1_REQDSTREG_CH0_Pos (0UL) /*!< GPDMA1 REQDSTREG: CH0 (Bit 0) */ +#define GPDMA1_REQDSTREG_CH0_Msk (0x1UL) /*!< GPDMA1 REQDSTREG: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA1_REQDSTREG_CH1_Pos (1UL) /*!< GPDMA1 REQDSTREG: CH1 (Bit 1) */ +#define GPDMA1_REQDSTREG_CH1_Msk (0x2UL) /*!< GPDMA1 REQDSTREG: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA1_REQDSTREG_CH2_Pos (2UL) /*!< GPDMA1 REQDSTREG: CH2 (Bit 2) */ +#define GPDMA1_REQDSTREG_CH2_Msk (0x4UL) /*!< GPDMA1 REQDSTREG: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA1_REQDSTREG_CH3_Pos (3UL) /*!< GPDMA1 REQDSTREG: CH3 (Bit 3) */ +#define GPDMA1_REQDSTREG_CH3_Msk (0x8UL) /*!< GPDMA1 REQDSTREG: CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA1_REQDSTREG_WE_CH0_Pos (8UL) /*!< GPDMA1 REQDSTREG: WE_CH0 (Bit 8) */ +#define GPDMA1_REQDSTREG_WE_CH0_Msk (0x100UL) /*!< GPDMA1 REQDSTREG: WE_CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA1_REQDSTREG_WE_CH1_Pos (9UL) /*!< GPDMA1 REQDSTREG: WE_CH1 (Bit 9) */ +#define GPDMA1_REQDSTREG_WE_CH1_Msk (0x200UL) /*!< GPDMA1 REQDSTREG: WE_CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA1_REQDSTREG_WE_CH2_Pos (10UL) /*!< GPDMA1 REQDSTREG: WE_CH2 (Bit 10) */ +#define GPDMA1_REQDSTREG_WE_CH2_Msk (0x400UL) /*!< GPDMA1 REQDSTREG: WE_CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA1_REQDSTREG_WE_CH3_Pos (11UL) /*!< GPDMA1 REQDSTREG: WE_CH3 (Bit 11) */ +#define GPDMA1_REQDSTREG_WE_CH3_Msk (0x800UL) /*!< GPDMA1 REQDSTREG: WE_CH3 (Bitfield-Mask: 0x01) */ + +/* ----------------------------- GPDMA1_SGLREQSRCREG ---------------------------- */ +#define GPDMA1_SGLREQSRCREG_CH0_Pos (0UL) /*!< GPDMA1 SGLREQSRCREG: CH0 (Bit 0) */ +#define GPDMA1_SGLREQSRCREG_CH0_Msk (0x1UL) /*!< GPDMA1 SGLREQSRCREG: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA1_SGLREQSRCREG_CH1_Pos (1UL) /*!< GPDMA1 SGLREQSRCREG: CH1 (Bit 1) */ +#define GPDMA1_SGLREQSRCREG_CH1_Msk (0x2UL) /*!< GPDMA1 SGLREQSRCREG: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA1_SGLREQSRCREG_CH2_Pos (2UL) /*!< GPDMA1 SGLREQSRCREG: CH2 (Bit 2) */ +#define GPDMA1_SGLREQSRCREG_CH2_Msk (0x4UL) /*!< GPDMA1 SGLREQSRCREG: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA1_SGLREQSRCREG_CH3_Pos (3UL) /*!< GPDMA1 SGLREQSRCREG: CH3 (Bit 3) */ +#define GPDMA1_SGLREQSRCREG_CH3_Msk (0x8UL) /*!< GPDMA1 SGLREQSRCREG: CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA1_SGLREQSRCREG_WE_CH0_Pos (8UL) /*!< GPDMA1 SGLREQSRCREG: WE_CH0 (Bit 8) */ +#define GPDMA1_SGLREQSRCREG_WE_CH0_Msk (0x100UL) /*!< GPDMA1 SGLREQSRCREG: WE_CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA1_SGLREQSRCREG_WE_CH1_Pos (9UL) /*!< GPDMA1 SGLREQSRCREG: WE_CH1 (Bit 9) */ +#define GPDMA1_SGLREQSRCREG_WE_CH1_Msk (0x200UL) /*!< GPDMA1 SGLREQSRCREG: WE_CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA1_SGLREQSRCREG_WE_CH2_Pos (10UL) /*!< GPDMA1 SGLREQSRCREG: WE_CH2 (Bit 10) */ +#define GPDMA1_SGLREQSRCREG_WE_CH2_Msk (0x400UL) /*!< GPDMA1 SGLREQSRCREG: WE_CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA1_SGLREQSRCREG_WE_CH3_Pos (11UL) /*!< GPDMA1 SGLREQSRCREG: WE_CH3 (Bit 11) */ +#define GPDMA1_SGLREQSRCREG_WE_CH3_Msk (0x800UL) /*!< GPDMA1 SGLREQSRCREG: WE_CH3 (Bitfield-Mask: 0x01) */ + +/* ----------------------------- GPDMA1_SGLREQDSTREG ---------------------------- */ +#define GPDMA1_SGLREQDSTREG_CH0_Pos (0UL) /*!< GPDMA1 SGLREQDSTREG: CH0 (Bit 0) */ +#define GPDMA1_SGLREQDSTREG_CH0_Msk (0x1UL) /*!< GPDMA1 SGLREQDSTREG: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA1_SGLREQDSTREG_CH1_Pos (1UL) /*!< GPDMA1 SGLREQDSTREG: CH1 (Bit 1) */ +#define GPDMA1_SGLREQDSTREG_CH1_Msk (0x2UL) /*!< GPDMA1 SGLREQDSTREG: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA1_SGLREQDSTREG_CH2_Pos (2UL) /*!< GPDMA1 SGLREQDSTREG: CH2 (Bit 2) */ +#define GPDMA1_SGLREQDSTREG_CH2_Msk (0x4UL) /*!< GPDMA1 SGLREQDSTREG: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA1_SGLREQDSTREG_CH3_Pos (3UL) /*!< GPDMA1 SGLREQDSTREG: CH3 (Bit 3) */ +#define GPDMA1_SGLREQDSTREG_CH3_Msk (0x8UL) /*!< GPDMA1 SGLREQDSTREG: CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA1_SGLREQDSTREG_WE_CH0_Pos (8UL) /*!< GPDMA1 SGLREQDSTREG: WE_CH0 (Bit 8) */ +#define GPDMA1_SGLREQDSTREG_WE_CH0_Msk (0x100UL) /*!< GPDMA1 SGLREQDSTREG: WE_CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA1_SGLREQDSTREG_WE_CH1_Pos (9UL) /*!< GPDMA1 SGLREQDSTREG: WE_CH1 (Bit 9) */ +#define GPDMA1_SGLREQDSTREG_WE_CH1_Msk (0x200UL) /*!< GPDMA1 SGLREQDSTREG: WE_CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA1_SGLREQDSTREG_WE_CH2_Pos (10UL) /*!< GPDMA1 SGLREQDSTREG: WE_CH2 (Bit 10) */ +#define GPDMA1_SGLREQDSTREG_WE_CH2_Msk (0x400UL) /*!< GPDMA1 SGLREQDSTREG: WE_CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA1_SGLREQDSTREG_WE_CH3_Pos (11UL) /*!< GPDMA1 SGLREQDSTREG: WE_CH3 (Bit 11) */ +#define GPDMA1_SGLREQDSTREG_WE_CH3_Msk (0x800UL) /*!< GPDMA1 SGLREQDSTREG: WE_CH3 (Bitfield-Mask: 0x01) */ + +/* ------------------------------ GPDMA1_LSTSRCREG ------------------------------ */ +#define GPDMA1_LSTSRCREG_CH0_Pos (0UL) /*!< GPDMA1 LSTSRCREG: CH0 (Bit 0) */ +#define GPDMA1_LSTSRCREG_CH0_Msk (0x1UL) /*!< GPDMA1 LSTSRCREG: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA1_LSTSRCREG_CH1_Pos (1UL) /*!< GPDMA1 LSTSRCREG: CH1 (Bit 1) */ +#define GPDMA1_LSTSRCREG_CH1_Msk (0x2UL) /*!< GPDMA1 LSTSRCREG: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA1_LSTSRCREG_CH2_Pos (2UL) /*!< GPDMA1 LSTSRCREG: CH2 (Bit 2) */ +#define GPDMA1_LSTSRCREG_CH2_Msk (0x4UL) /*!< GPDMA1 LSTSRCREG: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA1_LSTSRCREG_CH3_Pos (3UL) /*!< GPDMA1 LSTSRCREG: CH3 (Bit 3) */ +#define GPDMA1_LSTSRCREG_CH3_Msk (0x8UL) /*!< GPDMA1 LSTSRCREG: CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA1_LSTSRCREG_WE_CH0_Pos (8UL) /*!< GPDMA1 LSTSRCREG: WE_CH0 (Bit 8) */ +#define GPDMA1_LSTSRCREG_WE_CH0_Msk (0x100UL) /*!< GPDMA1 LSTSRCREG: WE_CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA1_LSTSRCREG_WE_CH1_Pos (9UL) /*!< GPDMA1 LSTSRCREG: WE_CH1 (Bit 9) */ +#define GPDMA1_LSTSRCREG_WE_CH1_Msk (0x200UL) /*!< GPDMA1 LSTSRCREG: WE_CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA1_LSTSRCREG_WE_CH2_Pos (10UL) /*!< GPDMA1 LSTSRCREG: WE_CH2 (Bit 10) */ +#define GPDMA1_LSTSRCREG_WE_CH2_Msk (0x400UL) /*!< GPDMA1 LSTSRCREG: WE_CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA1_LSTSRCREG_WE_CH3_Pos (11UL) /*!< GPDMA1 LSTSRCREG: WE_CH3 (Bit 11) */ +#define GPDMA1_LSTSRCREG_WE_CH3_Msk (0x800UL) /*!< GPDMA1 LSTSRCREG: WE_CH3 (Bitfield-Mask: 0x01) */ + +/* ------------------------------ GPDMA1_LSTDSTREG ------------------------------ */ +#define GPDMA1_LSTDSTREG_CH0_Pos (0UL) /*!< GPDMA1 LSTDSTREG: CH0 (Bit 0) */ +#define GPDMA1_LSTDSTREG_CH0_Msk (0x1UL) /*!< GPDMA1 LSTDSTREG: CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA1_LSTDSTREG_CH1_Pos (1UL) /*!< GPDMA1 LSTDSTREG: CH1 (Bit 1) */ +#define GPDMA1_LSTDSTREG_CH1_Msk (0x2UL) /*!< GPDMA1 LSTDSTREG: CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA1_LSTDSTREG_CH2_Pos (2UL) /*!< GPDMA1 LSTDSTREG: CH2 (Bit 2) */ +#define GPDMA1_LSTDSTREG_CH2_Msk (0x4UL) /*!< GPDMA1 LSTDSTREG: CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA1_LSTDSTREG_CH3_Pos (3UL) /*!< GPDMA1 LSTDSTREG: CH3 (Bit 3) */ +#define GPDMA1_LSTDSTREG_CH3_Msk (0x8UL) /*!< GPDMA1 LSTDSTREG: CH3 (Bitfield-Mask: 0x01) */ +#define GPDMA1_LSTDSTREG_WE_CH0_Pos (8UL) /*!< GPDMA1 LSTDSTREG: WE_CH0 (Bit 8) */ +#define GPDMA1_LSTDSTREG_WE_CH0_Msk (0x100UL) /*!< GPDMA1 LSTDSTREG: WE_CH0 (Bitfield-Mask: 0x01) */ +#define GPDMA1_LSTDSTREG_WE_CH1_Pos (9UL) /*!< GPDMA1 LSTDSTREG: WE_CH1 (Bit 9) */ +#define GPDMA1_LSTDSTREG_WE_CH1_Msk (0x200UL) /*!< GPDMA1 LSTDSTREG: WE_CH1 (Bitfield-Mask: 0x01) */ +#define GPDMA1_LSTDSTREG_WE_CH2_Pos (10UL) /*!< GPDMA1 LSTDSTREG: WE_CH2 (Bit 10) */ +#define GPDMA1_LSTDSTREG_WE_CH2_Msk (0x400UL) /*!< GPDMA1 LSTDSTREG: WE_CH2 (Bitfield-Mask: 0x01) */ +#define GPDMA1_LSTDSTREG_WE_CH3_Pos (11UL) /*!< GPDMA1 LSTDSTREG: WE_CH3 (Bit 11) */ +#define GPDMA1_LSTDSTREG_WE_CH3_Msk (0x800UL) /*!< GPDMA1 LSTDSTREG: WE_CH3 (Bitfield-Mask: 0x01) */ + +/* ------------------------------ GPDMA1_DMACFGREG ------------------------------ */ +#define GPDMA1_DMACFGREG_DMA_EN_Pos (0UL) /*!< GPDMA1 DMACFGREG: DMA_EN (Bit 0) */ +#define GPDMA1_DMACFGREG_DMA_EN_Msk (0x1UL) /*!< GPDMA1 DMACFGREG: DMA_EN (Bitfield-Mask: 0x01) */ + +/* ------------------------------- GPDMA1_CHENREG ------------------------------- */ +#define GPDMA1_CHENREG_CH_Pos (0UL) /*!< GPDMA1 CHENREG: CH (Bit 0) */ +#define GPDMA1_CHENREG_CH_Msk (0xfUL) /*!< GPDMA1 CHENREG: CH (Bitfield-Mask: 0x0f) */ +#define GPDMA1_CHENREG_WE_CH_Pos (8UL) /*!< GPDMA1 CHENREG: WE_CH (Bit 8) */ +#define GPDMA1_CHENREG_WE_CH_Msk (0xf00UL) /*!< GPDMA1 CHENREG: WE_CH (Bitfield-Mask: 0x0f) */ + +/* ---------------------------------- GPDMA1_ID --------------------------------- */ +#define GPDMA1_ID_VALUE_Pos (0UL) /*!< GPDMA1 ID: VALUE (Bit 0) */ +#define GPDMA1_ID_VALUE_Msk (0xffffffffUL) /*!< GPDMA1 ID: VALUE (Bitfield-Mask: 0xffffffff) */ + +/* --------------------------------- GPDMA1_TYPE -------------------------------- */ +#define GPDMA1_TYPE_VALUE_Pos (0UL) /*!< GPDMA1 TYPE: VALUE (Bit 0) */ +#define GPDMA1_TYPE_VALUE_Msk (0xffffffffUL) /*!< GPDMA1 TYPE: VALUE (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------------- GPDMA1_VERSION ------------------------------- */ +#define GPDMA1_VERSION_VALUE_Pos (0UL) /*!< GPDMA1 VERSION: VALUE (Bit 0) */ +#define GPDMA1_VERSION_VALUE_Msk (0xffffffffUL) /*!< GPDMA1 VERSION: VALUE (Bitfield-Mask: 0xffffffff) */ + + +/* ================================================================================ */ +/* ================ Group 'GPDMA1_CH' Position & Mask ================ */ +/* ================================================================================ */ + + +/* -------------------------------- GPDMA1_CH_SAR ------------------------------- */ +#define GPDMA1_CH_SAR_SAR_Pos (0UL) /*!< GPDMA1_CH SAR: SAR (Bit 0) */ +#define GPDMA1_CH_SAR_SAR_Msk (0xffffffffUL) /*!< GPDMA1_CH SAR: SAR (Bitfield-Mask: 0xffffffff) */ + +/* -------------------------------- GPDMA1_CH_DAR ------------------------------- */ +#define GPDMA1_CH_DAR_DAR_Pos (0UL) /*!< GPDMA1_CH DAR: DAR (Bit 0) */ +#define GPDMA1_CH_DAR_DAR_Msk (0xffffffffUL) /*!< GPDMA1_CH DAR: DAR (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------------- GPDMA1_CH_CTLL ------------------------------- */ +#define GPDMA1_CH_CTLL_INT_EN_Pos (0UL) /*!< GPDMA1_CH CTLL: INT_EN (Bit 0) */ +#define GPDMA1_CH_CTLL_INT_EN_Msk (0x1UL) /*!< GPDMA1_CH CTLL: INT_EN (Bitfield-Mask: 0x01) */ +#define GPDMA1_CH_CTLL_DST_TR_WIDTH_Pos (1UL) /*!< GPDMA1_CH CTLL: DST_TR_WIDTH (Bit 1) */ +#define GPDMA1_CH_CTLL_DST_TR_WIDTH_Msk (0xeUL) /*!< GPDMA1_CH CTLL: DST_TR_WIDTH (Bitfield-Mask: 0x07) */ +#define GPDMA1_CH_CTLL_SRC_TR_WIDTH_Pos (4UL) /*!< GPDMA1_CH CTLL: SRC_TR_WIDTH (Bit 4) */ +#define GPDMA1_CH_CTLL_SRC_TR_WIDTH_Msk (0x70UL) /*!< GPDMA1_CH CTLL: SRC_TR_WIDTH (Bitfield-Mask: 0x07) */ +#define GPDMA1_CH_CTLL_DINC_Pos (7UL) /*!< GPDMA1_CH CTLL: DINC (Bit 7) */ +#define GPDMA1_CH_CTLL_DINC_Msk (0x180UL) /*!< GPDMA1_CH CTLL: DINC (Bitfield-Mask: 0x03) */ +#define GPDMA1_CH_CTLL_SINC_Pos (9UL) /*!< GPDMA1_CH CTLL: SINC (Bit 9) */ +#define GPDMA1_CH_CTLL_SINC_Msk (0x600UL) /*!< GPDMA1_CH CTLL: SINC (Bitfield-Mask: 0x03) */ +#define GPDMA1_CH_CTLL_DEST_MSIZE_Pos (11UL) /*!< GPDMA1_CH CTLL: DEST_MSIZE (Bit 11) */ +#define GPDMA1_CH_CTLL_DEST_MSIZE_Msk (0x3800UL) /*!< GPDMA1_CH CTLL: DEST_MSIZE (Bitfield-Mask: 0x07) */ +#define GPDMA1_CH_CTLL_SRC_MSIZE_Pos (14UL) /*!< GPDMA1_CH CTLL: SRC_MSIZE (Bit 14) */ +#define GPDMA1_CH_CTLL_SRC_MSIZE_Msk (0x1c000UL) /*!< GPDMA1_CH CTLL: SRC_MSIZE (Bitfield-Mask: 0x07) */ +#define GPDMA1_CH_CTLL_TT_FC_Pos (20UL) /*!< GPDMA1_CH CTLL: TT_FC (Bit 20) */ +#define GPDMA1_CH_CTLL_TT_FC_Msk (0x700000UL) /*!< GPDMA1_CH CTLL: TT_FC (Bitfield-Mask: 0x07) */ + +/* ------------------------------- GPDMA1_CH_CTLH ------------------------------- */ +#define GPDMA1_CH_CTLH_BLOCK_TS_Pos (0UL) /*!< GPDMA1_CH CTLH: BLOCK_TS (Bit 0) */ +#define GPDMA1_CH_CTLH_BLOCK_TS_Msk (0xfffUL) /*!< GPDMA1_CH CTLH: BLOCK_TS (Bitfield-Mask: 0xfff) */ +#define GPDMA1_CH_CTLH_DONE_Pos (12UL) /*!< GPDMA1_CH CTLH: DONE (Bit 12) */ +#define GPDMA1_CH_CTLH_DONE_Msk (0x1000UL) /*!< GPDMA1_CH CTLH: DONE (Bitfield-Mask: 0x01) */ + +/* ------------------------------- GPDMA1_CH_CFGL ------------------------------- */ +#define GPDMA1_CH_CFGL_CH_PRIOR_Pos (5UL) /*!< GPDMA1_CH CFGL: CH_PRIOR (Bit 5) */ +#define GPDMA1_CH_CFGL_CH_PRIOR_Msk (0xe0UL) /*!< GPDMA1_CH CFGL: CH_PRIOR (Bitfield-Mask: 0x07) */ +#define GPDMA1_CH_CFGL_CH_SUSP_Pos (8UL) /*!< GPDMA1_CH CFGL: CH_SUSP (Bit 8) */ +#define GPDMA1_CH_CFGL_CH_SUSP_Msk (0x100UL) /*!< GPDMA1_CH CFGL: CH_SUSP (Bitfield-Mask: 0x01) */ +#define GPDMA1_CH_CFGL_FIFO_EMPTY_Pos (9UL) /*!< GPDMA1_CH CFGL: FIFO_EMPTY (Bit 9) */ +#define GPDMA1_CH_CFGL_FIFO_EMPTY_Msk (0x200UL) /*!< GPDMA1_CH CFGL: FIFO_EMPTY (Bitfield-Mask: 0x01) */ +#define GPDMA1_CH_CFGL_HS_SEL_DST_Pos (10UL) /*!< GPDMA1_CH CFGL: HS_SEL_DST (Bit 10) */ +#define GPDMA1_CH_CFGL_HS_SEL_DST_Msk (0x400UL) /*!< GPDMA1_CH CFGL: HS_SEL_DST (Bitfield-Mask: 0x01) */ +#define GPDMA1_CH_CFGL_HS_SEL_SRC_Pos (11UL) /*!< GPDMA1_CH CFGL: HS_SEL_SRC (Bit 11) */ +#define GPDMA1_CH_CFGL_HS_SEL_SRC_Msk (0x800UL) /*!< GPDMA1_CH CFGL: HS_SEL_SRC (Bitfield-Mask: 0x01) */ +#define GPDMA1_CH_CFGL_LOCK_CH_L_Pos (12UL) /*!< GPDMA1_CH CFGL: LOCK_CH_L (Bit 12) */ +#define GPDMA1_CH_CFGL_LOCK_CH_L_Msk (0x3000UL) /*!< GPDMA1_CH CFGL: LOCK_CH_L (Bitfield-Mask: 0x03) */ +#define GPDMA1_CH_CFGL_LOCK_B_L_Pos (14UL) /*!< GPDMA1_CH CFGL: LOCK_B_L (Bit 14) */ +#define GPDMA1_CH_CFGL_LOCK_B_L_Msk (0xc000UL) /*!< GPDMA1_CH CFGL: LOCK_B_L (Bitfield-Mask: 0x03) */ +#define GPDMA1_CH_CFGL_LOCK_CH_Pos (16UL) /*!< GPDMA1_CH CFGL: LOCK_CH (Bit 16) */ +#define GPDMA1_CH_CFGL_LOCK_CH_Msk (0x10000UL) /*!< GPDMA1_CH CFGL: LOCK_CH (Bitfield-Mask: 0x01) */ +#define GPDMA1_CH_CFGL_LOCK_B_Pos (17UL) /*!< GPDMA1_CH CFGL: LOCK_B (Bit 17) */ +#define GPDMA1_CH_CFGL_LOCK_B_Msk (0x20000UL) /*!< GPDMA1_CH CFGL: LOCK_B (Bitfield-Mask: 0x01) */ +#define GPDMA1_CH_CFGL_DST_HS_POL_Pos (18UL) /*!< GPDMA1_CH CFGL: DST_HS_POL (Bit 18) */ +#define GPDMA1_CH_CFGL_DST_HS_POL_Msk (0x40000UL) /*!< GPDMA1_CH CFGL: DST_HS_POL (Bitfield-Mask: 0x01) */ +#define GPDMA1_CH_CFGL_SRC_HS_POL_Pos (19UL) /*!< GPDMA1_CH CFGL: SRC_HS_POL (Bit 19) */ +#define GPDMA1_CH_CFGL_SRC_HS_POL_Msk (0x80000UL) /*!< GPDMA1_CH CFGL: SRC_HS_POL (Bitfield-Mask: 0x01) */ +#define GPDMA1_CH_CFGL_MAX_ABRST_Pos (20UL) /*!< GPDMA1_CH CFGL: MAX_ABRST (Bit 20) */ +#define GPDMA1_CH_CFGL_MAX_ABRST_Msk (0x3ff00000UL) /*!< GPDMA1_CH CFGL: MAX_ABRST (Bitfield-Mask: 0x3ff) */ + +/* ------------------------------- GPDMA1_CH_CFGH ------------------------------- */ +#define GPDMA1_CH_CFGH_FCMODE_Pos (0UL) /*!< GPDMA1_CH CFGH: FCMODE (Bit 0) */ +#define GPDMA1_CH_CFGH_FCMODE_Msk (0x1UL) /*!< GPDMA1_CH CFGH: FCMODE (Bitfield-Mask: 0x01) */ +#define GPDMA1_CH_CFGH_FIFO_MODE_Pos (1UL) /*!< GPDMA1_CH CFGH: FIFO_MODE (Bit 1) */ +#define GPDMA1_CH_CFGH_FIFO_MODE_Msk (0x2UL) /*!< GPDMA1_CH CFGH: FIFO_MODE (Bitfield-Mask: 0x01) */ +#define GPDMA1_CH_CFGH_PROTCTL_Pos (2UL) /*!< GPDMA1_CH CFGH: PROTCTL (Bit 2) */ +#define GPDMA1_CH_CFGH_PROTCTL_Msk (0x1cUL) /*!< GPDMA1_CH CFGH: PROTCTL (Bitfield-Mask: 0x07) */ +#define GPDMA1_CH_CFGH_SRC_PER_Pos (7UL) /*!< GPDMA1_CH CFGH: SRC_PER (Bit 7) */ +#define GPDMA1_CH_CFGH_SRC_PER_Msk (0x780UL) /*!< GPDMA1_CH CFGH: SRC_PER (Bitfield-Mask: 0x0f) */ +#define GPDMA1_CH_CFGH_DEST_PER_Pos (11UL) /*!< GPDMA1_CH CFGH: DEST_PER (Bit 11) */ +#define GPDMA1_CH_CFGH_DEST_PER_Msk (0x7800UL) /*!< GPDMA1_CH CFGH: DEST_PER (Bitfield-Mask: 0x0f) */ + + +/* ================================================================================ */ +/* ================ struct 'FCE' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ----------------------------------- FCE_CLC ---------------------------------- */ +#define FCE_CLC_DISR_Pos (0UL) /*!< FCE CLC: DISR (Bit 0) */ +#define FCE_CLC_DISR_Msk (0x1UL) /*!< FCE CLC: DISR (Bitfield-Mask: 0x01) */ +#define FCE_CLC_DISS_Pos (1UL) /*!< FCE CLC: DISS (Bit 1) */ +#define FCE_CLC_DISS_Msk (0x2UL) /*!< FCE CLC: DISS (Bitfield-Mask: 0x01) */ + +/* ----------------------------------- FCE_ID ----------------------------------- */ +#define FCE_ID_MOD_REV_Pos (0UL) /*!< FCE ID: MOD_REV (Bit 0) */ +#define FCE_ID_MOD_REV_Msk (0xffUL) /*!< FCE ID: MOD_REV (Bitfield-Mask: 0xff) */ +#define FCE_ID_MOD_TYPE_Pos (8UL) /*!< FCE ID: MOD_TYPE (Bit 8) */ +#define FCE_ID_MOD_TYPE_Msk (0xff00UL) /*!< FCE ID: MOD_TYPE (Bitfield-Mask: 0xff) */ +#define FCE_ID_MOD_NUMBER_Pos (16UL) /*!< FCE ID: MOD_NUMBER (Bit 16) */ +#define FCE_ID_MOD_NUMBER_Msk (0xffff0000UL) /*!< FCE ID: MOD_NUMBER (Bitfield-Mask: 0xffff) */ + + +/* ================================================================================ */ +/* ================ Group 'FCE_KE' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ---------------------------------- FCE_KE_IR --------------------------------- */ +#define FCE_KE_IR_IR_Pos (0UL) /*!< FCE_KE IR: IR (Bit 0) */ +#define FCE_KE_IR_IR_Msk (0xffffffffUL) /*!< FCE_KE IR: IR (Bitfield-Mask: 0xffffffff) */ + +/* --------------------------------- FCE_KE_RES --------------------------------- */ +#define FCE_KE_RES_RES_Pos (0UL) /*!< FCE_KE RES: RES (Bit 0) */ +#define FCE_KE_RES_RES_Msk (0xffffffffUL) /*!< FCE_KE RES: RES (Bitfield-Mask: 0xffffffff) */ + +/* --------------------------------- FCE_KE_CFG --------------------------------- */ +#define FCE_KE_CFG_CMI_Pos (0UL) /*!< FCE_KE CFG: CMI (Bit 0) */ +#define FCE_KE_CFG_CMI_Msk (0x1UL) /*!< FCE_KE CFG: CMI (Bitfield-Mask: 0x01) */ +#define FCE_KE_CFG_CEI_Pos (1UL) /*!< FCE_KE CFG: CEI (Bit 1) */ +#define FCE_KE_CFG_CEI_Msk (0x2UL) /*!< FCE_KE CFG: CEI (Bitfield-Mask: 0x01) */ +#define FCE_KE_CFG_LEI_Pos (2UL) /*!< FCE_KE CFG: LEI (Bit 2) */ +#define FCE_KE_CFG_LEI_Msk (0x4UL) /*!< FCE_KE CFG: LEI (Bitfield-Mask: 0x01) */ +#define FCE_KE_CFG_BEI_Pos (3UL) /*!< FCE_KE CFG: BEI (Bit 3) */ +#define FCE_KE_CFG_BEI_Msk (0x8UL) /*!< FCE_KE CFG: BEI (Bitfield-Mask: 0x01) */ +#define FCE_KE_CFG_CCE_Pos (4UL) /*!< FCE_KE CFG: CCE (Bit 4) */ +#define FCE_KE_CFG_CCE_Msk (0x10UL) /*!< FCE_KE CFG: CCE (Bitfield-Mask: 0x01) */ +#define FCE_KE_CFG_ALR_Pos (5UL) /*!< FCE_KE CFG: ALR (Bit 5) */ +#define FCE_KE_CFG_ALR_Msk (0x20UL) /*!< FCE_KE CFG: ALR (Bitfield-Mask: 0x01) */ +#define FCE_KE_CFG_REFIN_Pos (8UL) /*!< FCE_KE CFG: REFIN (Bit 8) */ +#define FCE_KE_CFG_REFIN_Msk (0x100UL) /*!< FCE_KE CFG: REFIN (Bitfield-Mask: 0x01) */ +#define FCE_KE_CFG_REFOUT_Pos (9UL) /*!< FCE_KE CFG: REFOUT (Bit 9) */ +#define FCE_KE_CFG_REFOUT_Msk (0x200UL) /*!< FCE_KE CFG: REFOUT (Bitfield-Mask: 0x01) */ +#define FCE_KE_CFG_XSEL_Pos (10UL) /*!< FCE_KE CFG: XSEL (Bit 10) */ +#define FCE_KE_CFG_XSEL_Msk (0x400UL) /*!< FCE_KE CFG: XSEL (Bitfield-Mask: 0x01) */ + +/* --------------------------------- FCE_KE_STS --------------------------------- */ +#define FCE_KE_STS_CMF_Pos (0UL) /*!< FCE_KE STS: CMF (Bit 0) */ +#define FCE_KE_STS_CMF_Msk (0x1UL) /*!< FCE_KE STS: CMF (Bitfield-Mask: 0x01) */ +#define FCE_KE_STS_CEF_Pos (1UL) /*!< FCE_KE STS: CEF (Bit 1) */ +#define FCE_KE_STS_CEF_Msk (0x2UL) /*!< FCE_KE STS: CEF (Bitfield-Mask: 0x01) */ +#define FCE_KE_STS_LEF_Pos (2UL) /*!< FCE_KE STS: LEF (Bit 2) */ +#define FCE_KE_STS_LEF_Msk (0x4UL) /*!< FCE_KE STS: LEF (Bitfield-Mask: 0x01) */ +#define FCE_KE_STS_BEF_Pos (3UL) /*!< FCE_KE STS: BEF (Bit 3) */ +#define FCE_KE_STS_BEF_Msk (0x8UL) /*!< FCE_KE STS: BEF (Bitfield-Mask: 0x01) */ + +/* -------------------------------- FCE_KE_LENGTH ------------------------------- */ +#define FCE_KE_LENGTH_LENGTH_Pos (0UL) /*!< FCE_KE LENGTH: LENGTH (Bit 0) */ +#define FCE_KE_LENGTH_LENGTH_Msk (0xffffUL) /*!< FCE_KE LENGTH: LENGTH (Bitfield-Mask: 0xffff) */ + +/* -------------------------------- FCE_KE_CHECK -------------------------------- */ +#define FCE_KE_CHECK_CHECK_Pos (0UL) /*!< FCE_KE CHECK: CHECK (Bit 0) */ +#define FCE_KE_CHECK_CHECK_Msk (0xffffffffUL) /*!< FCE_KE CHECK: CHECK (Bitfield-Mask: 0xffffffff) */ + +/* --------------------------------- FCE_KE_CRC --------------------------------- */ +#define FCE_KE_CRC_CRC_Pos (0UL) /*!< FCE_KE CRC: CRC (Bit 0) */ +#define FCE_KE_CRC_CRC_Msk (0xffffffffUL) /*!< FCE_KE CRC: CRC (Bitfield-Mask: 0xffffffff) */ + +/* --------------------------------- FCE_KE_CTR --------------------------------- */ +#define FCE_KE_CTR_FCM_Pos (0UL) /*!< FCE_KE CTR: FCM (Bit 0) */ +#define FCE_KE_CTR_FCM_Msk (0x1UL) /*!< FCE_KE CTR: FCM (Bitfield-Mask: 0x01) */ +#define FCE_KE_CTR_FRM_CFG_Pos (1UL) /*!< FCE_KE CTR: FRM_CFG (Bit 1) */ +#define FCE_KE_CTR_FRM_CFG_Msk (0x2UL) /*!< FCE_KE CTR: FRM_CFG (Bitfield-Mask: 0x01) */ +#define FCE_KE_CTR_FRM_CHECK_Pos (2UL) /*!< FCE_KE CTR: FRM_CHECK (Bit 2) */ +#define FCE_KE_CTR_FRM_CHECK_Msk (0x4UL) /*!< FCE_KE CTR: FRM_CHECK (Bitfield-Mask: 0x01) */ + + +/* ================================================================================ */ +/* ================ Group 'PBA' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ----------------------------------- PBA_STS ---------------------------------- */ +#define PBA_STS_WERR_Pos (0UL) /*!< PBA STS: WERR (Bit 0) */ +#define PBA_STS_WERR_Msk (0x1UL) /*!< PBA STS: WERR (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- PBA_WADDR --------------------------------- */ +#define PBA_WADDR_WADDR_Pos (0UL) /*!< PBA WADDR: WADDR (Bit 0) */ +#define PBA_WADDR_WADDR_Msk (0xffffffffUL) /*!< PBA WADDR: WADDR (Bitfield-Mask: 0xffffffff) */ + + +/* ================================================================================ */ +/* ================ Group 'FLASH' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ---------------------------------- FLASH_ID ---------------------------------- */ +#define FLASH_ID_MOD_REV_Pos (0UL) /*!< FLASH ID: MOD_REV (Bit 0) */ +#define FLASH_ID_MOD_REV_Msk (0xffUL) /*!< FLASH ID: MOD_REV (Bitfield-Mask: 0xff) */ +#define FLASH_ID_MOD_TYPE_Pos (8UL) /*!< FLASH ID: MOD_TYPE (Bit 8) */ +#define FLASH_ID_MOD_TYPE_Msk (0xff00UL) /*!< FLASH ID: MOD_TYPE (Bitfield-Mask: 0xff) */ +#define FLASH_ID_MOD_NUMBER_Pos (16UL) /*!< FLASH ID: MOD_NUMBER (Bit 16) */ +#define FLASH_ID_MOD_NUMBER_Msk (0xffff0000UL) /*!< FLASH ID: MOD_NUMBER (Bitfield-Mask: 0xffff) */ + +/* ---------------------------------- FLASH_FSR --------------------------------- */ +#define FLASH_FSR_PBUSY_Pos (0UL) /*!< FLASH FSR: PBUSY (Bit 0) */ +#define FLASH_FSR_PBUSY_Msk (0x1UL) /*!< FLASH FSR: PBUSY (Bitfield-Mask: 0x01) */ +#define FLASH_FSR_FABUSY_Pos (1UL) /*!< FLASH FSR: FABUSY (Bit 1) */ +#define FLASH_FSR_FABUSY_Msk (0x2UL) /*!< FLASH FSR: FABUSY (Bitfield-Mask: 0x01) */ +#define FLASH_FSR_PROG_Pos (4UL) /*!< FLASH FSR: PROG (Bit 4) */ +#define FLASH_FSR_PROG_Msk (0x10UL) /*!< FLASH FSR: PROG (Bitfield-Mask: 0x01) */ +#define FLASH_FSR_ERASE_Pos (5UL) /*!< FLASH FSR: ERASE (Bit 5) */ +#define FLASH_FSR_ERASE_Msk (0x20UL) /*!< FLASH FSR: ERASE (Bitfield-Mask: 0x01) */ +#define FLASH_FSR_PFPAGE_Pos (6UL) /*!< FLASH FSR: PFPAGE (Bit 6) */ +#define FLASH_FSR_PFPAGE_Msk (0x40UL) /*!< FLASH FSR: PFPAGE (Bitfield-Mask: 0x01) */ +#define FLASH_FSR_PFOPER_Pos (8UL) /*!< FLASH FSR: PFOPER (Bit 8) */ +#define FLASH_FSR_PFOPER_Msk (0x100UL) /*!< FLASH FSR: PFOPER (Bitfield-Mask: 0x01) */ +#define FLASH_FSR_SQER_Pos (10UL) /*!< FLASH FSR: SQER (Bit 10) */ +#define FLASH_FSR_SQER_Msk (0x400UL) /*!< FLASH FSR: SQER (Bitfield-Mask: 0x01) */ +#define FLASH_FSR_PROER_Pos (11UL) /*!< FLASH FSR: PROER (Bit 11) */ +#define FLASH_FSR_PROER_Msk (0x800UL) /*!< FLASH FSR: PROER (Bitfield-Mask: 0x01) */ +#define FLASH_FSR_PFSBER_Pos (12UL) /*!< FLASH FSR: PFSBER (Bit 12) */ +#define FLASH_FSR_PFSBER_Msk (0x1000UL) /*!< FLASH FSR: PFSBER (Bitfield-Mask: 0x01) */ +#define FLASH_FSR_PFDBER_Pos (14UL) /*!< FLASH FSR: PFDBER (Bit 14) */ +#define FLASH_FSR_PFDBER_Msk (0x4000UL) /*!< FLASH FSR: PFDBER (Bitfield-Mask: 0x01) */ +#define FLASH_FSR_PROIN_Pos (16UL) /*!< FLASH FSR: PROIN (Bit 16) */ +#define FLASH_FSR_PROIN_Msk (0x10000UL) /*!< FLASH FSR: PROIN (Bitfield-Mask: 0x01) */ +#define FLASH_FSR_RPROIN_Pos (18UL) /*!< FLASH FSR: RPROIN (Bit 18) */ +#define FLASH_FSR_RPROIN_Msk (0x40000UL) /*!< FLASH FSR: RPROIN (Bitfield-Mask: 0x01) */ +#define FLASH_FSR_RPRODIS_Pos (19UL) /*!< FLASH FSR: RPRODIS (Bit 19) */ +#define FLASH_FSR_RPRODIS_Msk (0x80000UL) /*!< FLASH FSR: RPRODIS (Bitfield-Mask: 0x01) */ +#define FLASH_FSR_WPROIN0_Pos (21UL) /*!< FLASH FSR: WPROIN0 (Bit 21) */ +#define FLASH_FSR_WPROIN0_Msk (0x200000UL) /*!< FLASH FSR: WPROIN0 (Bitfield-Mask: 0x01) */ +#define FLASH_FSR_WPROIN1_Pos (22UL) /*!< FLASH FSR: WPROIN1 (Bit 22) */ +#define FLASH_FSR_WPROIN1_Msk (0x400000UL) /*!< FLASH FSR: WPROIN1 (Bitfield-Mask: 0x01) */ +#define FLASH_FSR_WPROIN2_Pos (23UL) /*!< FLASH FSR: WPROIN2 (Bit 23) */ +#define FLASH_FSR_WPROIN2_Msk (0x800000UL) /*!< FLASH FSR: WPROIN2 (Bitfield-Mask: 0x01) */ +#define FLASH_FSR_WPRODIS0_Pos (25UL) /*!< FLASH FSR: WPRODIS0 (Bit 25) */ +#define FLASH_FSR_WPRODIS0_Msk (0x2000000UL) /*!< FLASH FSR: WPRODIS0 (Bitfield-Mask: 0x01) */ +#define FLASH_FSR_WPRODIS1_Pos (26UL) /*!< FLASH FSR: WPRODIS1 (Bit 26) */ +#define FLASH_FSR_WPRODIS1_Msk (0x4000000UL) /*!< FLASH FSR: WPRODIS1 (Bitfield-Mask: 0x01) */ +#define FLASH_FSR_SLM_Pos (28UL) /*!< FLASH FSR: SLM (Bit 28) */ +#define FLASH_FSR_SLM_Msk (0x10000000UL) /*!< FLASH FSR: SLM (Bitfield-Mask: 0x01) */ +#define FLASH_FSR_VER_Pos (31UL) /*!< FLASH FSR: VER (Bit 31) */ +#define FLASH_FSR_VER_Msk (0x80000000UL) /*!< FLASH FSR: VER (Bitfield-Mask: 0x01) */ + +/* --------------------------------- FLASH_FCON --------------------------------- */ +#define FLASH_FCON_WSPFLASH_Pos (0UL) /*!< FLASH FCON: WSPFLASH (Bit 0) */ +#define FLASH_FCON_WSPFLASH_Msk (0xfUL) /*!< FLASH FCON: WSPFLASH (Bitfield-Mask: 0x0f) */ +#define FLASH_FCON_WSECPF_Pos (4UL) /*!< FLASH FCON: WSECPF (Bit 4) */ +#define FLASH_FCON_WSECPF_Msk (0x10UL) /*!< FLASH FCON: WSECPF (Bitfield-Mask: 0x01) */ +#define FLASH_FCON_IDLE_Pos (13UL) /*!< FLASH FCON: IDLE (Bit 13) */ +#define FLASH_FCON_IDLE_Msk (0x2000UL) /*!< FLASH FCON: IDLE (Bitfield-Mask: 0x01) */ +#define FLASH_FCON_ESLDIS_Pos (14UL) /*!< FLASH FCON: ESLDIS (Bit 14) */ +#define FLASH_FCON_ESLDIS_Msk (0x4000UL) /*!< FLASH FCON: ESLDIS (Bitfield-Mask: 0x01) */ +#define FLASH_FCON_SLEEP_Pos (15UL) /*!< FLASH FCON: SLEEP (Bit 15) */ +#define FLASH_FCON_SLEEP_Msk (0x8000UL) /*!< FLASH FCON: SLEEP (Bitfield-Mask: 0x01) */ +#define FLASH_FCON_RPA_Pos (16UL) /*!< FLASH FCON: RPA (Bit 16) */ +#define FLASH_FCON_RPA_Msk (0x10000UL) /*!< FLASH FCON: RPA (Bitfield-Mask: 0x01) */ +#define FLASH_FCON_DCF_Pos (17UL) /*!< FLASH FCON: DCF (Bit 17) */ +#define FLASH_FCON_DCF_Msk (0x20000UL) /*!< FLASH FCON: DCF (Bitfield-Mask: 0x01) */ +#define FLASH_FCON_DDF_Pos (18UL) /*!< FLASH FCON: DDF (Bit 18) */ +#define FLASH_FCON_DDF_Msk (0x40000UL) /*!< FLASH FCON: DDF (Bitfield-Mask: 0x01) */ +#define FLASH_FCON_VOPERM_Pos (24UL) /*!< FLASH FCON: VOPERM (Bit 24) */ +#define FLASH_FCON_VOPERM_Msk (0x1000000UL) /*!< FLASH FCON: VOPERM (Bitfield-Mask: 0x01) */ +#define FLASH_FCON_SQERM_Pos (25UL) /*!< FLASH FCON: SQERM (Bit 25) */ +#define FLASH_FCON_SQERM_Msk (0x2000000UL) /*!< FLASH FCON: SQERM (Bitfield-Mask: 0x01) */ +#define FLASH_FCON_PROERM_Pos (26UL) /*!< FLASH FCON: PROERM (Bit 26) */ +#define FLASH_FCON_PROERM_Msk (0x4000000UL) /*!< FLASH FCON: PROERM (Bitfield-Mask: 0x01) */ +#define FLASH_FCON_PFSBERM_Pos (27UL) /*!< FLASH FCON: PFSBERM (Bit 27) */ +#define FLASH_FCON_PFSBERM_Msk (0x8000000UL) /*!< FLASH FCON: PFSBERM (Bitfield-Mask: 0x01) */ +#define FLASH_FCON_PFDBERM_Pos (29UL) /*!< FLASH FCON: PFDBERM (Bit 29) */ +#define FLASH_FCON_PFDBERM_Msk (0x20000000UL) /*!< FLASH FCON: PFDBERM (Bitfield-Mask: 0x01) */ +#define FLASH_FCON_EOBM_Pos (31UL) /*!< FLASH FCON: EOBM (Bit 31) */ +#define FLASH_FCON_EOBM_Msk (0x80000000UL) /*!< FLASH FCON: EOBM (Bitfield-Mask: 0x01) */ + +/* --------------------------------- FLASH_MARP --------------------------------- */ +#define FLASH_MARP_MARGIN_Pos (0UL) /*!< FLASH MARP: MARGIN (Bit 0) */ +#define FLASH_MARP_MARGIN_Msk (0xfUL) /*!< FLASH MARP: MARGIN (Bitfield-Mask: 0x0f) */ +#define FLASH_MARP_TRAPDIS_Pos (15UL) /*!< FLASH MARP: TRAPDIS (Bit 15) */ +#define FLASH_MARP_TRAPDIS_Msk (0x8000UL) /*!< FLASH MARP: TRAPDIS (Bitfield-Mask: 0x01) */ + +/* -------------------------------- FLASH_PROCON0 ------------------------------- */ +#define FLASH_PROCON0_S0L_Pos (0UL) /*!< FLASH PROCON0: S0L (Bit 0) */ +#define FLASH_PROCON0_S0L_Msk (0x1UL) /*!< FLASH PROCON0: S0L (Bitfield-Mask: 0x01) */ +#define FLASH_PROCON0_S1L_Pos (1UL) /*!< FLASH PROCON0: S1L (Bit 1) */ +#define FLASH_PROCON0_S1L_Msk (0x2UL) /*!< FLASH PROCON0: S1L (Bitfield-Mask: 0x01) */ +#define FLASH_PROCON0_S2L_Pos (2UL) /*!< FLASH PROCON0: S2L (Bit 2) */ +#define FLASH_PROCON0_S2L_Msk (0x4UL) /*!< FLASH PROCON0: S2L (Bitfield-Mask: 0x01) */ +#define FLASH_PROCON0_S3L_Pos (3UL) /*!< FLASH PROCON0: S3L (Bit 3) */ +#define FLASH_PROCON0_S3L_Msk (0x8UL) /*!< FLASH PROCON0: S3L (Bitfield-Mask: 0x01) */ +#define FLASH_PROCON0_S4L_Pos (4UL) /*!< FLASH PROCON0: S4L (Bit 4) */ +#define FLASH_PROCON0_S4L_Msk (0x10UL) /*!< FLASH PROCON0: S4L (Bitfield-Mask: 0x01) */ +#define FLASH_PROCON0_S5L_Pos (5UL) /*!< FLASH PROCON0: S5L (Bit 5) */ +#define FLASH_PROCON0_S5L_Msk (0x20UL) /*!< FLASH PROCON0: S5L (Bitfield-Mask: 0x01) */ +#define FLASH_PROCON0_S6L_Pos (6UL) /*!< FLASH PROCON0: S6L (Bit 6) */ +#define FLASH_PROCON0_S6L_Msk (0x40UL) /*!< FLASH PROCON0: S6L (Bitfield-Mask: 0x01) */ +#define FLASH_PROCON0_S7L_Pos (7UL) /*!< FLASH PROCON0: S7L (Bit 7) */ +#define FLASH_PROCON0_S7L_Msk (0x80UL) /*!< FLASH PROCON0: S7L (Bitfield-Mask: 0x01) */ +#define FLASH_PROCON0_S8L_Pos (8UL) /*!< FLASH PROCON0: S8L (Bit 8) */ +#define FLASH_PROCON0_S8L_Msk (0x100UL) /*!< FLASH PROCON0: S8L (Bitfield-Mask: 0x01) */ +#define FLASH_PROCON0_S9L_Pos (9UL) /*!< FLASH PROCON0: S9L (Bit 9) */ +#define FLASH_PROCON0_S9L_Msk (0x200UL) /*!< FLASH PROCON0: S9L (Bitfield-Mask: 0x01) */ +#define FLASH_PROCON0_S10_S11L_Pos (10UL) /*!< FLASH PROCON0: S10_S11L (Bit 10) */ +#define FLASH_PROCON0_S10_S11L_Msk (0x400UL) /*!< FLASH PROCON0: S10_S11L (Bitfield-Mask: 0x01) */ +#define FLASH_PROCON0_S12_S13L_Pos (11UL) /*!< FLASH PROCON0: S12_S13L (Bit 11) */ +#define FLASH_PROCON0_S12_S13L_Msk (0x800UL) /*!< FLASH PROCON0: S12_S13L (Bitfield-Mask: 0x01) */ +#define FLASH_PROCON0_S14_S15L_Pos (12UL) /*!< FLASH PROCON0: S14_S15L (Bit 12) */ +#define FLASH_PROCON0_S14_S15L_Msk (0x1000UL) /*!< FLASH PROCON0: S14_S15L (Bitfield-Mask: 0x01) */ +#define FLASH_PROCON0_RPRO_Pos (15UL) /*!< FLASH PROCON0: RPRO (Bit 15) */ +#define FLASH_PROCON0_RPRO_Msk (0x8000UL) /*!< FLASH PROCON0: RPRO (Bitfield-Mask: 0x01) */ + +/* -------------------------------- FLASH_PROCON1 ------------------------------- */ +#define FLASH_PROCON1_S0L_Pos (0UL) /*!< FLASH PROCON1: S0L (Bit 0) */ +#define FLASH_PROCON1_S0L_Msk (0x1UL) /*!< FLASH PROCON1: S0L (Bitfield-Mask: 0x01) */ +#define FLASH_PROCON1_S1L_Pos (1UL) /*!< FLASH PROCON1: S1L (Bit 1) */ +#define FLASH_PROCON1_S1L_Msk (0x2UL) /*!< FLASH PROCON1: S1L (Bitfield-Mask: 0x01) */ +#define FLASH_PROCON1_S2L_Pos (2UL) /*!< FLASH PROCON1: S2L (Bit 2) */ +#define FLASH_PROCON1_S2L_Msk (0x4UL) /*!< FLASH PROCON1: S2L (Bitfield-Mask: 0x01) */ +#define FLASH_PROCON1_S3L_Pos (3UL) /*!< FLASH PROCON1: S3L (Bit 3) */ +#define FLASH_PROCON1_S3L_Msk (0x8UL) /*!< FLASH PROCON1: S3L (Bitfield-Mask: 0x01) */ +#define FLASH_PROCON1_S4L_Pos (4UL) /*!< FLASH PROCON1: S4L (Bit 4) */ +#define FLASH_PROCON1_S4L_Msk (0x10UL) /*!< FLASH PROCON1: S4L (Bitfield-Mask: 0x01) */ +#define FLASH_PROCON1_S5L_Pos (5UL) /*!< FLASH PROCON1: S5L (Bit 5) */ +#define FLASH_PROCON1_S5L_Msk (0x20UL) /*!< FLASH PROCON1: S5L (Bitfield-Mask: 0x01) */ +#define FLASH_PROCON1_S6L_Pos (6UL) /*!< FLASH PROCON1: S6L (Bit 6) */ +#define FLASH_PROCON1_S6L_Msk (0x40UL) /*!< FLASH PROCON1: S6L (Bitfield-Mask: 0x01) */ +#define FLASH_PROCON1_S7L_Pos (7UL) /*!< FLASH PROCON1: S7L (Bit 7) */ +#define FLASH_PROCON1_S7L_Msk (0x80UL) /*!< FLASH PROCON1: S7L (Bitfield-Mask: 0x01) */ +#define FLASH_PROCON1_S8L_Pos (8UL) /*!< FLASH PROCON1: S8L (Bit 8) */ +#define FLASH_PROCON1_S8L_Msk (0x100UL) /*!< FLASH PROCON1: S8L (Bitfield-Mask: 0x01) */ +#define FLASH_PROCON1_S9L_Pos (9UL) /*!< FLASH PROCON1: S9L (Bit 9) */ +#define FLASH_PROCON1_S9L_Msk (0x200UL) /*!< FLASH PROCON1: S9L (Bitfield-Mask: 0x01) */ +#define FLASH_PROCON1_S10_S11L_Pos (10UL) /*!< FLASH PROCON1: S10_S11L (Bit 10) */ +#define FLASH_PROCON1_S10_S11L_Msk (0x400UL) /*!< FLASH PROCON1: S10_S11L (Bitfield-Mask: 0x01) */ +#define FLASH_PROCON1_S12_S13L_Pos (11UL) /*!< FLASH PROCON1: S12_S13L (Bit 11) */ +#define FLASH_PROCON1_S12_S13L_Msk (0x800UL) /*!< FLASH PROCON1: S12_S13L (Bitfield-Mask: 0x01) */ +#define FLASH_PROCON1_S14_S15L_Pos (12UL) /*!< FLASH PROCON1: S14_S15L (Bit 12) */ +#define FLASH_PROCON1_S14_S15L_Msk (0x1000UL) /*!< FLASH PROCON1: S14_S15L (Bitfield-Mask: 0x01) */ +#define FLASH_PROCON1_PSR_Pos (16UL) /*!< FLASH PROCON1: PSR (Bit 16) */ +#define FLASH_PROCON1_PSR_Msk (0x10000UL) /*!< FLASH PROCON1: PSR (Bitfield-Mask: 0x01) */ + +/* -------------------------------- FLASH_PROCON2 ------------------------------- */ +#define FLASH_PROCON2_S0ROM_Pos (0UL) /*!< FLASH PROCON2: S0ROM (Bit 0) */ +#define FLASH_PROCON2_S0ROM_Msk (0x1UL) /*!< FLASH PROCON2: S0ROM (Bitfield-Mask: 0x01) */ +#define FLASH_PROCON2_S1ROM_Pos (1UL) /*!< FLASH PROCON2: S1ROM (Bit 1) */ +#define FLASH_PROCON2_S1ROM_Msk (0x2UL) /*!< FLASH PROCON2: S1ROM (Bitfield-Mask: 0x01) */ +#define FLASH_PROCON2_S2ROM_Pos (2UL) /*!< FLASH PROCON2: S2ROM (Bit 2) */ +#define FLASH_PROCON2_S2ROM_Msk (0x4UL) /*!< FLASH PROCON2: S2ROM (Bitfield-Mask: 0x01) */ +#define FLASH_PROCON2_S3ROM_Pos (3UL) /*!< FLASH PROCON2: S3ROM (Bit 3) */ +#define FLASH_PROCON2_S3ROM_Msk (0x8UL) /*!< FLASH PROCON2: S3ROM (Bitfield-Mask: 0x01) */ +#define FLASH_PROCON2_S4ROM_Pos (4UL) /*!< FLASH PROCON2: S4ROM (Bit 4) */ +#define FLASH_PROCON2_S4ROM_Msk (0x10UL) /*!< FLASH PROCON2: S4ROM (Bitfield-Mask: 0x01) */ +#define FLASH_PROCON2_S5ROM_Pos (5UL) /*!< FLASH PROCON2: S5ROM (Bit 5) */ +#define FLASH_PROCON2_S5ROM_Msk (0x20UL) /*!< FLASH PROCON2: S5ROM (Bitfield-Mask: 0x01) */ +#define FLASH_PROCON2_S6ROM_Pos (6UL) /*!< FLASH PROCON2: S6ROM (Bit 6) */ +#define FLASH_PROCON2_S6ROM_Msk (0x40UL) /*!< FLASH PROCON2: S6ROM (Bitfield-Mask: 0x01) */ +#define FLASH_PROCON2_S7ROM_Pos (7UL) /*!< FLASH PROCON2: S7ROM (Bit 7) */ +#define FLASH_PROCON2_S7ROM_Msk (0x80UL) /*!< FLASH PROCON2: S7ROM (Bitfield-Mask: 0x01) */ +#define FLASH_PROCON2_S8ROM_Pos (8UL) /*!< FLASH PROCON2: S8ROM (Bit 8) */ +#define FLASH_PROCON2_S8ROM_Msk (0x100UL) /*!< FLASH PROCON2: S8ROM (Bitfield-Mask: 0x01) */ +#define FLASH_PROCON2_S9ROM_Pos (9UL) /*!< FLASH PROCON2: S9ROM (Bit 9) */ +#define FLASH_PROCON2_S9ROM_Msk (0x200UL) /*!< FLASH PROCON2: S9ROM (Bitfield-Mask: 0x01) */ +#define FLASH_PROCON2_S10_S11ROM_Pos (10UL) /*!< FLASH PROCON2: S10_S11ROM (Bit 10) */ +#define FLASH_PROCON2_S10_S11ROM_Msk (0x400UL) /*!< FLASH PROCON2: S10_S11ROM (Bitfield-Mask: 0x01) */ +#define FLASH_PROCON2_S12_S13ROM_Pos (11UL) /*!< FLASH PROCON2: S12_S13ROM (Bit 11) */ +#define FLASH_PROCON2_S12_S13ROM_Msk (0x800UL) /*!< FLASH PROCON2: S12_S13ROM (Bitfield-Mask: 0x01) */ +#define FLASH_PROCON2_S14_S15ROM_Pos (12UL) /*!< FLASH PROCON2: S14_S15ROM (Bit 12) */ +#define FLASH_PROCON2_S14_S15ROM_Msk (0x1000UL) /*!< FLASH PROCON2: S14_S15ROM (Bitfield-Mask: 0x01) */ + + +/* ================================================================================ */ +/* ================ struct 'PREF' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ---------------------------------- PREF_PCON --------------------------------- */ +#define PREF_PCON_IBYP_Pos (0UL) /*!< PREF PCON: IBYP (Bit 0) */ +#define PREF_PCON_IBYP_Msk (0x1UL) /*!< PREF PCON: IBYP (Bitfield-Mask: 0x01) */ +#define PREF_PCON_IINV_Pos (1UL) /*!< PREF PCON: IINV (Bit 1) */ +#define PREF_PCON_IINV_Msk (0x2UL) /*!< PREF PCON: IINV (Bitfield-Mask: 0x01) */ +#define PREF_PCON_DBYP_Pos (4UL) /*!< PREF PCON: DBYP (Bit 4) */ +#define PREF_PCON_DBYP_Msk (0x10UL) /*!< PREF PCON: DBYP (Bitfield-Mask: 0x01) */ + + +/* ================================================================================ */ +/* ================ Group 'PMU' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ----------------------------------- PMU_ID ----------------------------------- */ +#define PMU_ID_MOD_REV_Pos (0UL) /*!< PMU ID: MOD_REV (Bit 0) */ +#define PMU_ID_MOD_REV_Msk (0xffUL) /*!< PMU ID: MOD_REV (Bitfield-Mask: 0xff) */ +#define PMU_ID_MOD_TYPE_Pos (8UL) /*!< PMU ID: MOD_TYPE (Bit 8) */ +#define PMU_ID_MOD_TYPE_Msk (0xff00UL) /*!< PMU ID: MOD_TYPE (Bitfield-Mask: 0xff) */ +#define PMU_ID_MOD_NUMBER_Pos (16UL) /*!< PMU ID: MOD_NUMBER (Bit 16) */ +#define PMU_ID_MOD_NUMBER_Msk (0xffff0000UL) /*!< PMU ID: MOD_NUMBER (Bitfield-Mask: 0xffff) */ + + +/* ================================================================================ */ +/* ================ struct 'WDT' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ----------------------------------- WDT_ID ----------------------------------- */ +#define WDT_ID_MOD_REV_Pos (0UL) /*!< WDT ID: MOD_REV (Bit 0) */ +#define WDT_ID_MOD_REV_Msk (0xffUL) /*!< WDT ID: MOD_REV (Bitfield-Mask: 0xff) */ +#define WDT_ID_MOD_TYPE_Pos (8UL) /*!< WDT ID: MOD_TYPE (Bit 8) */ +#define WDT_ID_MOD_TYPE_Msk (0xff00UL) /*!< WDT ID: MOD_TYPE (Bitfield-Mask: 0xff) */ +#define WDT_ID_MOD_NUMBER_Pos (16UL) /*!< WDT ID: MOD_NUMBER (Bit 16) */ +#define WDT_ID_MOD_NUMBER_Msk (0xffff0000UL) /*!< WDT ID: MOD_NUMBER (Bitfield-Mask: 0xffff) */ + +/* ----------------------------------- WDT_CTR ---------------------------------- */ +#define WDT_CTR_ENB_Pos (0UL) /*!< WDT CTR: ENB (Bit 0) */ +#define WDT_CTR_ENB_Msk (0x1UL) /*!< WDT CTR: ENB (Bitfield-Mask: 0x01) */ +#define WDT_CTR_PRE_Pos (1UL) /*!< WDT CTR: PRE (Bit 1) */ +#define WDT_CTR_PRE_Msk (0x2UL) /*!< WDT CTR: PRE (Bitfield-Mask: 0x01) */ +#define WDT_CTR_DSP_Pos (4UL) /*!< WDT CTR: DSP (Bit 4) */ +#define WDT_CTR_DSP_Msk (0x10UL) /*!< WDT CTR: DSP (Bitfield-Mask: 0x01) */ +#define WDT_CTR_SPW_Pos (8UL) /*!< WDT CTR: SPW (Bit 8) */ +#define WDT_CTR_SPW_Msk (0xff00UL) /*!< WDT CTR: SPW (Bitfield-Mask: 0xff) */ + +/* ----------------------------------- WDT_SRV ---------------------------------- */ +#define WDT_SRV_SRV_Pos (0UL) /*!< WDT SRV: SRV (Bit 0) */ +#define WDT_SRV_SRV_Msk (0xffffffffUL) /*!< WDT SRV: SRV (Bitfield-Mask: 0xffffffff) */ + +/* ----------------------------------- WDT_TIM ---------------------------------- */ +#define WDT_TIM_TIM_Pos (0UL) /*!< WDT TIM: TIM (Bit 0) */ +#define WDT_TIM_TIM_Msk (0xffffffffUL) /*!< WDT TIM: TIM (Bitfield-Mask: 0xffffffff) */ + +/* ----------------------------------- WDT_WLB ---------------------------------- */ +#define WDT_WLB_WLB_Pos (0UL) /*!< WDT WLB: WLB (Bit 0) */ +#define WDT_WLB_WLB_Msk (0xffffffffUL) /*!< WDT WLB: WLB (Bitfield-Mask: 0xffffffff) */ + +/* ----------------------------------- WDT_WUB ---------------------------------- */ +#define WDT_WUB_WUB_Pos (0UL) /*!< WDT WUB: WUB (Bit 0) */ +#define WDT_WUB_WUB_Msk (0xffffffffUL) /*!< WDT WUB: WUB (Bitfield-Mask: 0xffffffff) */ + +/* --------------------------------- WDT_WDTSTS --------------------------------- */ +#define WDT_WDTSTS_ALMS_Pos (0UL) /*!< WDT WDTSTS: ALMS (Bit 0) */ +#define WDT_WDTSTS_ALMS_Msk (0x1UL) /*!< WDT WDTSTS: ALMS (Bitfield-Mask: 0x01) */ + +/* --------------------------------- WDT_WDTCLR --------------------------------- */ +#define WDT_WDTCLR_ALMC_Pos (0UL) /*!< WDT WDTCLR: ALMC (Bit 0) */ +#define WDT_WDTCLR_ALMC_Msk (0x1UL) /*!< WDT WDTCLR: ALMC (Bitfield-Mask: 0x01) */ + + +/* ================================================================================ */ +/* ================ struct 'RTC' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ----------------------------------- RTC_ID ----------------------------------- */ +#define RTC_ID_MOD_REV_Pos (0UL) /*!< RTC ID: MOD_REV (Bit 0) */ +#define RTC_ID_MOD_REV_Msk (0xffUL) /*!< RTC ID: MOD_REV (Bitfield-Mask: 0xff) */ +#define RTC_ID_MOD_TYPE_Pos (8UL) /*!< RTC ID: MOD_TYPE (Bit 8) */ +#define RTC_ID_MOD_TYPE_Msk (0xff00UL) /*!< RTC ID: MOD_TYPE (Bitfield-Mask: 0xff) */ +#define RTC_ID_MOD_NUMBER_Pos (16UL) /*!< RTC ID: MOD_NUMBER (Bit 16) */ +#define RTC_ID_MOD_NUMBER_Msk (0xffff0000UL) /*!< RTC ID: MOD_NUMBER (Bitfield-Mask: 0xffff) */ + +/* ----------------------------------- RTC_CTR ---------------------------------- */ +#define RTC_CTR_ENB_Pos (0UL) /*!< RTC CTR: ENB (Bit 0) */ +#define RTC_CTR_ENB_Msk (0x1UL) /*!< RTC CTR: ENB (Bitfield-Mask: 0x01) */ +#define RTC_CTR_TAE_Pos (2UL) /*!< RTC CTR: TAE (Bit 2) */ +#define RTC_CTR_TAE_Msk (0x4UL) /*!< RTC CTR: TAE (Bitfield-Mask: 0x01) */ +#define RTC_CTR_ESEC_Pos (8UL) /*!< RTC CTR: ESEC (Bit 8) */ +#define RTC_CTR_ESEC_Msk (0x100UL) /*!< RTC CTR: ESEC (Bitfield-Mask: 0x01) */ +#define RTC_CTR_EMIC_Pos (9UL) /*!< RTC CTR: EMIC (Bit 9) */ +#define RTC_CTR_EMIC_Msk (0x200UL) /*!< RTC CTR: EMIC (Bitfield-Mask: 0x01) */ +#define RTC_CTR_EHOC_Pos (10UL) /*!< RTC CTR: EHOC (Bit 10) */ +#define RTC_CTR_EHOC_Msk (0x400UL) /*!< RTC CTR: EHOC (Bitfield-Mask: 0x01) */ +#define RTC_CTR_EDAC_Pos (11UL) /*!< RTC CTR: EDAC (Bit 11) */ +#define RTC_CTR_EDAC_Msk (0x800UL) /*!< RTC CTR: EDAC (Bitfield-Mask: 0x01) */ +#define RTC_CTR_EMOC_Pos (13UL) /*!< RTC CTR: EMOC (Bit 13) */ +#define RTC_CTR_EMOC_Msk (0x2000UL) /*!< RTC CTR: EMOC (Bitfield-Mask: 0x01) */ +#define RTC_CTR_EYEC_Pos (14UL) /*!< RTC CTR: EYEC (Bit 14) */ +#define RTC_CTR_EYEC_Msk (0x4000UL) /*!< RTC CTR: EYEC (Bitfield-Mask: 0x01) */ +#define RTC_CTR_DIV_Pos (16UL) /*!< RTC CTR: DIV (Bit 16) */ +#define RTC_CTR_DIV_Msk (0xffff0000UL) /*!< RTC CTR: DIV (Bitfield-Mask: 0xffff) */ + +/* --------------------------------- RTC_RAWSTAT -------------------------------- */ +#define RTC_RAWSTAT_RPSE_Pos (0UL) /*!< RTC RAWSTAT: RPSE (Bit 0) */ +#define RTC_RAWSTAT_RPSE_Msk (0x1UL) /*!< RTC RAWSTAT: RPSE (Bitfield-Mask: 0x01) */ +#define RTC_RAWSTAT_RPMI_Pos (1UL) /*!< RTC RAWSTAT: RPMI (Bit 1) */ +#define RTC_RAWSTAT_RPMI_Msk (0x2UL) /*!< RTC RAWSTAT: RPMI (Bitfield-Mask: 0x01) */ +#define RTC_RAWSTAT_RPHO_Pos (2UL) /*!< RTC RAWSTAT: RPHO (Bit 2) */ +#define RTC_RAWSTAT_RPHO_Msk (0x4UL) /*!< RTC RAWSTAT: RPHO (Bitfield-Mask: 0x01) */ +#define RTC_RAWSTAT_RPDA_Pos (3UL) /*!< RTC RAWSTAT: RPDA (Bit 3) */ +#define RTC_RAWSTAT_RPDA_Msk (0x8UL) /*!< RTC RAWSTAT: RPDA (Bitfield-Mask: 0x01) */ +#define RTC_RAWSTAT_RPMO_Pos (5UL) /*!< RTC RAWSTAT: RPMO (Bit 5) */ +#define RTC_RAWSTAT_RPMO_Msk (0x20UL) /*!< RTC RAWSTAT: RPMO (Bitfield-Mask: 0x01) */ +#define RTC_RAWSTAT_RPYE_Pos (6UL) /*!< RTC RAWSTAT: RPYE (Bit 6) */ +#define RTC_RAWSTAT_RPYE_Msk (0x40UL) /*!< RTC RAWSTAT: RPYE (Bitfield-Mask: 0x01) */ +#define RTC_RAWSTAT_RAI_Pos (8UL) /*!< RTC RAWSTAT: RAI (Bit 8) */ +#define RTC_RAWSTAT_RAI_Msk (0x100UL) /*!< RTC RAWSTAT: RAI (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- RTC_STSSR --------------------------------- */ +#define RTC_STSSR_SPSE_Pos (0UL) /*!< RTC STSSR: SPSE (Bit 0) */ +#define RTC_STSSR_SPSE_Msk (0x1UL) /*!< RTC STSSR: SPSE (Bitfield-Mask: 0x01) */ +#define RTC_STSSR_SPMI_Pos (1UL) /*!< RTC STSSR: SPMI (Bit 1) */ +#define RTC_STSSR_SPMI_Msk (0x2UL) /*!< RTC STSSR: SPMI (Bitfield-Mask: 0x01) */ +#define RTC_STSSR_SPHO_Pos (2UL) /*!< RTC STSSR: SPHO (Bit 2) */ +#define RTC_STSSR_SPHO_Msk (0x4UL) /*!< RTC STSSR: SPHO (Bitfield-Mask: 0x01) */ +#define RTC_STSSR_SPDA_Pos (3UL) /*!< RTC STSSR: SPDA (Bit 3) */ +#define RTC_STSSR_SPDA_Msk (0x8UL) /*!< RTC STSSR: SPDA (Bitfield-Mask: 0x01) */ +#define RTC_STSSR_SPMO_Pos (5UL) /*!< RTC STSSR: SPMO (Bit 5) */ +#define RTC_STSSR_SPMO_Msk (0x20UL) /*!< RTC STSSR: SPMO (Bitfield-Mask: 0x01) */ +#define RTC_STSSR_SPYE_Pos (6UL) /*!< RTC STSSR: SPYE (Bit 6) */ +#define RTC_STSSR_SPYE_Msk (0x40UL) /*!< RTC STSSR: SPYE (Bitfield-Mask: 0x01) */ +#define RTC_STSSR_SAI_Pos (8UL) /*!< RTC STSSR: SAI (Bit 8) */ +#define RTC_STSSR_SAI_Msk (0x100UL) /*!< RTC STSSR: SAI (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- RTC_MSKSR --------------------------------- */ +#define RTC_MSKSR_MPSE_Pos (0UL) /*!< RTC MSKSR: MPSE (Bit 0) */ +#define RTC_MSKSR_MPSE_Msk (0x1UL) /*!< RTC MSKSR: MPSE (Bitfield-Mask: 0x01) */ +#define RTC_MSKSR_MPMI_Pos (1UL) /*!< RTC MSKSR: MPMI (Bit 1) */ +#define RTC_MSKSR_MPMI_Msk (0x2UL) /*!< RTC MSKSR: MPMI (Bitfield-Mask: 0x01) */ +#define RTC_MSKSR_MPHO_Pos (2UL) /*!< RTC MSKSR: MPHO (Bit 2) */ +#define RTC_MSKSR_MPHO_Msk (0x4UL) /*!< RTC MSKSR: MPHO (Bitfield-Mask: 0x01) */ +#define RTC_MSKSR_MPDA_Pos (3UL) /*!< RTC MSKSR: MPDA (Bit 3) */ +#define RTC_MSKSR_MPDA_Msk (0x8UL) /*!< RTC MSKSR: MPDA (Bitfield-Mask: 0x01) */ +#define RTC_MSKSR_MPMO_Pos (5UL) /*!< RTC MSKSR: MPMO (Bit 5) */ +#define RTC_MSKSR_MPMO_Msk (0x20UL) /*!< RTC MSKSR: MPMO (Bitfield-Mask: 0x01) */ +#define RTC_MSKSR_MPYE_Pos (6UL) /*!< RTC MSKSR: MPYE (Bit 6) */ +#define RTC_MSKSR_MPYE_Msk (0x40UL) /*!< RTC MSKSR: MPYE (Bitfield-Mask: 0x01) */ +#define RTC_MSKSR_MAI_Pos (8UL) /*!< RTC MSKSR: MAI (Bit 8) */ +#define RTC_MSKSR_MAI_Msk (0x100UL) /*!< RTC MSKSR: MAI (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- RTC_CLRSR --------------------------------- */ +#define RTC_CLRSR_RPSE_Pos (0UL) /*!< RTC CLRSR: RPSE (Bit 0) */ +#define RTC_CLRSR_RPSE_Msk (0x1UL) /*!< RTC CLRSR: RPSE (Bitfield-Mask: 0x01) */ +#define RTC_CLRSR_RPMI_Pos (1UL) /*!< RTC CLRSR: RPMI (Bit 1) */ +#define RTC_CLRSR_RPMI_Msk (0x2UL) /*!< RTC CLRSR: RPMI (Bitfield-Mask: 0x01) */ +#define RTC_CLRSR_RPHO_Pos (2UL) /*!< RTC CLRSR: RPHO (Bit 2) */ +#define RTC_CLRSR_RPHO_Msk (0x4UL) /*!< RTC CLRSR: RPHO (Bitfield-Mask: 0x01) */ +#define RTC_CLRSR_RPDA_Pos (3UL) /*!< RTC CLRSR: RPDA (Bit 3) */ +#define RTC_CLRSR_RPDA_Msk (0x8UL) /*!< RTC CLRSR: RPDA (Bitfield-Mask: 0x01) */ +#define RTC_CLRSR_RPMO_Pos (5UL) /*!< RTC CLRSR: RPMO (Bit 5) */ +#define RTC_CLRSR_RPMO_Msk (0x20UL) /*!< RTC CLRSR: RPMO (Bitfield-Mask: 0x01) */ +#define RTC_CLRSR_RPYE_Pos (6UL) /*!< RTC CLRSR: RPYE (Bit 6) */ +#define RTC_CLRSR_RPYE_Msk (0x40UL) /*!< RTC CLRSR: RPYE (Bitfield-Mask: 0x01) */ +#define RTC_CLRSR_RAI_Pos (8UL) /*!< RTC CLRSR: RAI (Bit 8) */ +#define RTC_CLRSR_RAI_Msk (0x100UL) /*!< RTC CLRSR: RAI (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- RTC_ATIM0 --------------------------------- */ +#define RTC_ATIM0_ASE_Pos (0UL) /*!< RTC ATIM0: ASE (Bit 0) */ +#define RTC_ATIM0_ASE_Msk (0x3fUL) /*!< RTC ATIM0: ASE (Bitfield-Mask: 0x3f) */ +#define RTC_ATIM0_AMI_Pos (8UL) /*!< RTC ATIM0: AMI (Bit 8) */ +#define RTC_ATIM0_AMI_Msk (0x3f00UL) /*!< RTC ATIM0: AMI (Bitfield-Mask: 0x3f) */ +#define RTC_ATIM0_AHO_Pos (16UL) /*!< RTC ATIM0: AHO (Bit 16) */ +#define RTC_ATIM0_AHO_Msk (0x1f0000UL) /*!< RTC ATIM0: AHO (Bitfield-Mask: 0x1f) */ +#define RTC_ATIM0_ADA_Pos (24UL) /*!< RTC ATIM0: ADA (Bit 24) */ +#define RTC_ATIM0_ADA_Msk (0x1f000000UL) /*!< RTC ATIM0: ADA (Bitfield-Mask: 0x1f) */ + +/* ---------------------------------- RTC_ATIM1 --------------------------------- */ +#define RTC_ATIM1_AMO_Pos (8UL) /*!< RTC ATIM1: AMO (Bit 8) */ +#define RTC_ATIM1_AMO_Msk (0xf00UL) /*!< RTC ATIM1: AMO (Bitfield-Mask: 0x0f) */ +#define RTC_ATIM1_AYE_Pos (16UL) /*!< RTC ATIM1: AYE (Bit 16) */ +#define RTC_ATIM1_AYE_Msk (0xffff0000UL) /*!< RTC ATIM1: AYE (Bitfield-Mask: 0xffff) */ + +/* ---------------------------------- RTC_TIM0 ---------------------------------- */ +#define RTC_TIM0_SE_Pos (0UL) /*!< RTC TIM0: SE (Bit 0) */ +#define RTC_TIM0_SE_Msk (0x3fUL) /*!< RTC TIM0: SE (Bitfield-Mask: 0x3f) */ +#define RTC_TIM0_MI_Pos (8UL) /*!< RTC TIM0: MI (Bit 8) */ +#define RTC_TIM0_MI_Msk (0x3f00UL) /*!< RTC TIM0: MI (Bitfield-Mask: 0x3f) */ +#define RTC_TIM0_HO_Pos (16UL) /*!< RTC TIM0: HO (Bit 16) */ +#define RTC_TIM0_HO_Msk (0x1f0000UL) /*!< RTC TIM0: HO (Bitfield-Mask: 0x1f) */ +#define RTC_TIM0_DA_Pos (24UL) /*!< RTC TIM0: DA (Bit 24) */ +#define RTC_TIM0_DA_Msk (0x1f000000UL) /*!< RTC TIM0: DA (Bitfield-Mask: 0x1f) */ + +/* ---------------------------------- RTC_TIM1 ---------------------------------- */ +#define RTC_TIM1_DAWE_Pos (0UL) /*!< RTC TIM1: DAWE (Bit 0) */ +#define RTC_TIM1_DAWE_Msk (0x7UL) /*!< RTC TIM1: DAWE (Bitfield-Mask: 0x07) */ +#define RTC_TIM1_MO_Pos (8UL) /*!< RTC TIM1: MO (Bit 8) */ +#define RTC_TIM1_MO_Msk (0xf00UL) /*!< RTC TIM1: MO (Bitfield-Mask: 0x0f) */ +#define RTC_TIM1_YE_Pos (16UL) /*!< RTC TIM1: YE (Bit 16) */ +#define RTC_TIM1_YE_Msk (0xffff0000UL) /*!< RTC TIM1: YE (Bitfield-Mask: 0xffff) */ + + +/* ================================================================================ */ +/* ================ struct 'SCU_CLK' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ------------------------------- SCU_CLK_CLKSTAT ------------------------------ */ +#define SCU_CLK_CLKSTAT_USBCST_Pos (0UL) /*!< SCU_CLK CLKSTAT: USBCST (Bit 0) */ +#define SCU_CLK_CLKSTAT_USBCST_Msk (0x1UL) /*!< SCU_CLK CLKSTAT: USBCST (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CLKSTAT_MMCCST_Pos (1UL) /*!< SCU_CLK CLKSTAT: MMCCST (Bit 1) */ +#define SCU_CLK_CLKSTAT_MMCCST_Msk (0x2UL) /*!< SCU_CLK CLKSTAT: MMCCST (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CLKSTAT_ETH0CST_Pos (2UL) /*!< SCU_CLK CLKSTAT: ETH0CST (Bit 2) */ +#define SCU_CLK_CLKSTAT_ETH0CST_Msk (0x4UL) /*!< SCU_CLK CLKSTAT: ETH0CST (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CLKSTAT_EBUCST_Pos (3UL) /*!< SCU_CLK CLKSTAT: EBUCST (Bit 3) */ +#define SCU_CLK_CLKSTAT_EBUCST_Msk (0x8UL) /*!< SCU_CLK CLKSTAT: EBUCST (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CLKSTAT_CCUCST_Pos (4UL) /*!< SCU_CLK CLKSTAT: CCUCST (Bit 4) */ +#define SCU_CLK_CLKSTAT_CCUCST_Msk (0x10UL) /*!< SCU_CLK CLKSTAT: CCUCST (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CLKSTAT_WDTCST_Pos (5UL) /*!< SCU_CLK CLKSTAT: WDTCST (Bit 5) */ +#define SCU_CLK_CLKSTAT_WDTCST_Msk (0x20UL) /*!< SCU_CLK CLKSTAT: WDTCST (Bitfield-Mask: 0x01) */ + +/* ------------------------------- SCU_CLK_CLKSET ------------------------------- */ +#define SCU_CLK_CLKSET_USBCEN_Pos (0UL) /*!< SCU_CLK CLKSET: USBCEN (Bit 0) */ +#define SCU_CLK_CLKSET_USBCEN_Msk (0x1UL) /*!< SCU_CLK CLKSET: USBCEN (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CLKSET_MMCCEN_Pos (1UL) /*!< SCU_CLK CLKSET: MMCCEN (Bit 1) */ +#define SCU_CLK_CLKSET_MMCCEN_Msk (0x2UL) /*!< SCU_CLK CLKSET: MMCCEN (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CLKSET_ETH0CEN_Pos (2UL) /*!< SCU_CLK CLKSET: ETH0CEN (Bit 2) */ +#define SCU_CLK_CLKSET_ETH0CEN_Msk (0x4UL) /*!< SCU_CLK CLKSET: ETH0CEN (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CLKSET_EBUCEN_Pos (3UL) /*!< SCU_CLK CLKSET: EBUCEN (Bit 3) */ +#define SCU_CLK_CLKSET_EBUCEN_Msk (0x8UL) /*!< SCU_CLK CLKSET: EBUCEN (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CLKSET_CCUCEN_Pos (4UL) /*!< SCU_CLK CLKSET: CCUCEN (Bit 4) */ +#define SCU_CLK_CLKSET_CCUCEN_Msk (0x10UL) /*!< SCU_CLK CLKSET: CCUCEN (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CLKSET_WDTCEN_Pos (5UL) /*!< SCU_CLK CLKSET: WDTCEN (Bit 5) */ +#define SCU_CLK_CLKSET_WDTCEN_Msk (0x20UL) /*!< SCU_CLK CLKSET: WDTCEN (Bitfield-Mask: 0x01) */ + +/* ------------------------------- SCU_CLK_CLKCLR ------------------------------- */ +#define SCU_CLK_CLKCLR_USBCDI_Pos (0UL) /*!< SCU_CLK CLKCLR: USBCDI (Bit 0) */ +#define SCU_CLK_CLKCLR_USBCDI_Msk (0x1UL) /*!< SCU_CLK CLKCLR: USBCDI (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CLKCLR_MMCCDI_Pos (1UL) /*!< SCU_CLK CLKCLR: MMCCDI (Bit 1) */ +#define SCU_CLK_CLKCLR_MMCCDI_Msk (0x2UL) /*!< SCU_CLK CLKCLR: MMCCDI (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CLKCLR_ETH0CDI_Pos (2UL) /*!< SCU_CLK CLKCLR: ETH0CDI (Bit 2) */ +#define SCU_CLK_CLKCLR_ETH0CDI_Msk (0x4UL) /*!< SCU_CLK CLKCLR: ETH0CDI (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CLKCLR_EBUCDI_Pos (3UL) /*!< SCU_CLK CLKCLR: EBUCDI (Bit 3) */ +#define SCU_CLK_CLKCLR_EBUCDI_Msk (0x8UL) /*!< SCU_CLK CLKCLR: EBUCDI (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CLKCLR_CCUCDI_Pos (4UL) /*!< SCU_CLK CLKCLR: CCUCDI (Bit 4) */ +#define SCU_CLK_CLKCLR_CCUCDI_Msk (0x10UL) /*!< SCU_CLK CLKCLR: CCUCDI (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CLKCLR_WDTCDI_Pos (5UL) /*!< SCU_CLK CLKCLR: WDTCDI (Bit 5) */ +#define SCU_CLK_CLKCLR_WDTCDI_Msk (0x20UL) /*!< SCU_CLK CLKCLR: WDTCDI (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_CLK_SYSCLKCR ------------------------------ */ +#define SCU_CLK_SYSCLKCR_SYSDIV_Pos (0UL) /*!< SCU_CLK SYSCLKCR: SYSDIV (Bit 0) */ +#define SCU_CLK_SYSCLKCR_SYSDIV_Msk (0xffUL) /*!< SCU_CLK SYSCLKCR: SYSDIV (Bitfield-Mask: 0xff) */ +#define SCU_CLK_SYSCLKCR_SYSSEL_Pos (16UL) /*!< SCU_CLK SYSCLKCR: SYSSEL (Bit 16) */ +#define SCU_CLK_SYSCLKCR_SYSSEL_Msk (0x10000UL) /*!< SCU_CLK SYSCLKCR: SYSSEL (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_CLK_CPUCLKCR ------------------------------ */ +#define SCU_CLK_CPUCLKCR_CPUDIV_Pos (0UL) /*!< SCU_CLK CPUCLKCR: CPUDIV (Bit 0) */ +#define SCU_CLK_CPUCLKCR_CPUDIV_Msk (0x1UL) /*!< SCU_CLK CPUCLKCR: CPUDIV (Bitfield-Mask: 0x01) */ + +/* ------------------------------- SCU_CLK_PBCLKCR ------------------------------ */ +#define SCU_CLK_PBCLKCR_PBDIV_Pos (0UL) /*!< SCU_CLK PBCLKCR: PBDIV (Bit 0) */ +#define SCU_CLK_PBCLKCR_PBDIV_Msk (0x1UL) /*!< SCU_CLK PBCLKCR: PBDIV (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_CLK_USBCLKCR ------------------------------ */ +#define SCU_CLK_USBCLKCR_USBDIV_Pos (0UL) /*!< SCU_CLK USBCLKCR: USBDIV (Bit 0) */ +#define SCU_CLK_USBCLKCR_USBDIV_Msk (0x7UL) /*!< SCU_CLK USBCLKCR: USBDIV (Bitfield-Mask: 0x07) */ +#define SCU_CLK_USBCLKCR_USBSEL_Pos (16UL) /*!< SCU_CLK USBCLKCR: USBSEL (Bit 16) */ +#define SCU_CLK_USBCLKCR_USBSEL_Msk (0x10000UL) /*!< SCU_CLK USBCLKCR: USBSEL (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_CLK_EBUCLKCR ------------------------------ */ +#define SCU_CLK_EBUCLKCR_EBUDIV_Pos (0UL) /*!< SCU_CLK EBUCLKCR: EBUDIV (Bit 0) */ +#define SCU_CLK_EBUCLKCR_EBUDIV_Msk (0x3fUL) /*!< SCU_CLK EBUCLKCR: EBUDIV (Bitfield-Mask: 0x3f) */ + +/* ------------------------------ SCU_CLK_CCUCLKCR ------------------------------ */ +#define SCU_CLK_CCUCLKCR_CCUDIV_Pos (0UL) /*!< SCU_CLK CCUCLKCR: CCUDIV (Bit 0) */ +#define SCU_CLK_CCUCLKCR_CCUDIV_Msk (0x1UL) /*!< SCU_CLK CCUCLKCR: CCUDIV (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_CLK_WDTCLKCR ------------------------------ */ +#define SCU_CLK_WDTCLKCR_WDTDIV_Pos (0UL) /*!< SCU_CLK WDTCLKCR: WDTDIV (Bit 0) */ +#define SCU_CLK_WDTCLKCR_WDTDIV_Msk (0xffUL) /*!< SCU_CLK WDTCLKCR: WDTDIV (Bitfield-Mask: 0xff) */ +#define SCU_CLK_WDTCLKCR_WDTSEL_Pos (16UL) /*!< SCU_CLK WDTCLKCR: WDTSEL (Bit 16) */ +#define SCU_CLK_WDTCLKCR_WDTSEL_Msk (0x30000UL) /*!< SCU_CLK WDTCLKCR: WDTSEL (Bitfield-Mask: 0x03) */ + +/* ------------------------------ SCU_CLK_EXTCLKCR ------------------------------ */ +#define SCU_CLK_EXTCLKCR_ECKSEL_Pos (0UL) /*!< SCU_CLK EXTCLKCR: ECKSEL (Bit 0) */ +#define SCU_CLK_EXTCLKCR_ECKSEL_Msk (0x3UL) /*!< SCU_CLK EXTCLKCR: ECKSEL (Bitfield-Mask: 0x03) */ +#define SCU_CLK_EXTCLKCR_ECKDIV_Pos (16UL) /*!< SCU_CLK EXTCLKCR: ECKDIV (Bit 16) */ +#define SCU_CLK_EXTCLKCR_ECKDIV_Msk (0x1ff0000UL) /*!< SCU_CLK EXTCLKCR: ECKDIV (Bitfield-Mask: 0x1ff) */ + +/* ----------------------------- SCU_CLK_MLINKCLKCR ----------------------------- */ +#define SCU_CLK_MLINKCLKCR_SYSDIV_Pos (0UL) /*!< SCU_CLK MLINKCLKCR: SYSDIV (Bit 0) */ +#define SCU_CLK_MLINKCLKCR_SYSDIV_Msk (0xffUL) /*!< SCU_CLK MLINKCLKCR: SYSDIV (Bitfield-Mask: 0xff) */ +#define SCU_CLK_MLINKCLKCR_SYSSEL_Pos (8UL) /*!< SCU_CLK MLINKCLKCR: SYSSEL (Bit 8) */ +#define SCU_CLK_MLINKCLKCR_SYSSEL_Msk (0x100UL) /*!< SCU_CLK MLINKCLKCR: SYSSEL (Bitfield-Mask: 0x01) */ +#define SCU_CLK_MLINKCLKCR_CPUDIV_Pos (10UL) /*!< SCU_CLK MLINKCLKCR: CPUDIV (Bit 10) */ +#define SCU_CLK_MLINKCLKCR_CPUDIV_Msk (0x400UL) /*!< SCU_CLK MLINKCLKCR: CPUDIV (Bitfield-Mask: 0x01) */ +#define SCU_CLK_MLINKCLKCR_PBDIV_Pos (12UL) /*!< SCU_CLK MLINKCLKCR: PBDIV (Bit 12) */ +#define SCU_CLK_MLINKCLKCR_PBDIV_Msk (0x1000UL) /*!< SCU_CLK MLINKCLKCR: PBDIV (Bitfield-Mask: 0x01) */ +#define SCU_CLK_MLINKCLKCR_CCUDIV_Pos (14UL) /*!< SCU_CLK MLINKCLKCR: CCUDIV (Bit 14) */ +#define SCU_CLK_MLINKCLKCR_CCUDIV_Msk (0x4000UL) /*!< SCU_CLK MLINKCLKCR: CCUDIV (Bitfield-Mask: 0x01) */ +#define SCU_CLK_MLINKCLKCR_WDTDIV_Pos (16UL) /*!< SCU_CLK MLINKCLKCR: WDTDIV (Bit 16) */ +#define SCU_CLK_MLINKCLKCR_WDTDIV_Msk (0xff0000UL) /*!< SCU_CLK MLINKCLKCR: WDTDIV (Bitfield-Mask: 0xff) */ +#define SCU_CLK_MLINKCLKCR_WDTSEL_Pos (24UL) /*!< SCU_CLK MLINKCLKCR: WDTSEL (Bit 24) */ +#define SCU_CLK_MLINKCLKCR_WDTSEL_Msk (0x3000000UL) /*!< SCU_CLK MLINKCLKCR: WDTSEL (Bitfield-Mask: 0x03) */ +#define SCU_CLK_MLINKCLKCR_EBUDIV_Pos (26UL) /*!< SCU_CLK MLINKCLKCR: EBUDIV (Bit 26) */ +#define SCU_CLK_MLINKCLKCR_EBUDIV_Msk (0xfc000000UL) /*!< SCU_CLK MLINKCLKCR: EBUDIV (Bitfield-Mask: 0x3f) */ + +/* ------------------------------- SCU_CLK_SLEEPCR ------------------------------ */ +#define SCU_CLK_SLEEPCR_SYSSEL_Pos (0UL) /*!< SCU_CLK SLEEPCR: SYSSEL (Bit 0) */ +#define SCU_CLK_SLEEPCR_SYSSEL_Msk (0x1UL) /*!< SCU_CLK SLEEPCR: SYSSEL (Bitfield-Mask: 0x01) */ +#define SCU_CLK_SLEEPCR_USBCR_Pos (16UL) /*!< SCU_CLK SLEEPCR: USBCR (Bit 16) */ +#define SCU_CLK_SLEEPCR_USBCR_Msk (0x10000UL) /*!< SCU_CLK SLEEPCR: USBCR (Bitfield-Mask: 0x01) */ +#define SCU_CLK_SLEEPCR_MMCCR_Pos (17UL) /*!< SCU_CLK SLEEPCR: MMCCR (Bit 17) */ +#define SCU_CLK_SLEEPCR_MMCCR_Msk (0x20000UL) /*!< SCU_CLK SLEEPCR: MMCCR (Bitfield-Mask: 0x01) */ +#define SCU_CLK_SLEEPCR_ETH0CR_Pos (18UL) /*!< SCU_CLK SLEEPCR: ETH0CR (Bit 18) */ +#define SCU_CLK_SLEEPCR_ETH0CR_Msk (0x40000UL) /*!< SCU_CLK SLEEPCR: ETH0CR (Bitfield-Mask: 0x01) */ +#define SCU_CLK_SLEEPCR_EBUCR_Pos (19UL) /*!< SCU_CLK SLEEPCR: EBUCR (Bit 19) */ +#define SCU_CLK_SLEEPCR_EBUCR_Msk (0x80000UL) /*!< SCU_CLK SLEEPCR: EBUCR (Bitfield-Mask: 0x01) */ +#define SCU_CLK_SLEEPCR_CCUCR_Pos (20UL) /*!< SCU_CLK SLEEPCR: CCUCR (Bit 20) */ +#define SCU_CLK_SLEEPCR_CCUCR_Msk (0x100000UL) /*!< SCU_CLK SLEEPCR: CCUCR (Bitfield-Mask: 0x01) */ +#define SCU_CLK_SLEEPCR_WDTCR_Pos (21UL) /*!< SCU_CLK SLEEPCR: WDTCR (Bit 21) */ +#define SCU_CLK_SLEEPCR_WDTCR_Msk (0x200000UL) /*!< SCU_CLK SLEEPCR: WDTCR (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_CLK_DSLEEPCR ------------------------------ */ +#define SCU_CLK_DSLEEPCR_SYSSEL_Pos (0UL) /*!< SCU_CLK DSLEEPCR: SYSSEL (Bit 0) */ +#define SCU_CLK_DSLEEPCR_SYSSEL_Msk (0x3UL) /*!< SCU_CLK DSLEEPCR: SYSSEL (Bitfield-Mask: 0x03) */ +#define SCU_CLK_DSLEEPCR_FPDN_Pos (11UL) /*!< SCU_CLK DSLEEPCR: FPDN (Bit 11) */ +#define SCU_CLK_DSLEEPCR_FPDN_Msk (0x800UL) /*!< SCU_CLK DSLEEPCR: FPDN (Bitfield-Mask: 0x01) */ +#define SCU_CLK_DSLEEPCR_PLLPDN_Pos (12UL) /*!< SCU_CLK DSLEEPCR: PLLPDN (Bit 12) */ +#define SCU_CLK_DSLEEPCR_PLLPDN_Msk (0x1000UL) /*!< SCU_CLK DSLEEPCR: PLLPDN (Bitfield-Mask: 0x01) */ +#define SCU_CLK_DSLEEPCR_VCOPDN_Pos (13UL) /*!< SCU_CLK DSLEEPCR: VCOPDN (Bit 13) */ +#define SCU_CLK_DSLEEPCR_VCOPDN_Msk (0x2000UL) /*!< SCU_CLK DSLEEPCR: VCOPDN (Bitfield-Mask: 0x01) */ +#define SCU_CLK_DSLEEPCR_USBCR_Pos (16UL) /*!< SCU_CLK DSLEEPCR: USBCR (Bit 16) */ +#define SCU_CLK_DSLEEPCR_USBCR_Msk (0x10000UL) /*!< SCU_CLK DSLEEPCR: USBCR (Bitfield-Mask: 0x01) */ +#define SCU_CLK_DSLEEPCR_MMCCR_Pos (17UL) /*!< SCU_CLK DSLEEPCR: MMCCR (Bit 17) */ +#define SCU_CLK_DSLEEPCR_MMCCR_Msk (0x20000UL) /*!< SCU_CLK DSLEEPCR: MMCCR (Bitfield-Mask: 0x01) */ +#define SCU_CLK_DSLEEPCR_ETH0CR_Pos (18UL) /*!< SCU_CLK DSLEEPCR: ETH0CR (Bit 18) */ +#define SCU_CLK_DSLEEPCR_ETH0CR_Msk (0x40000UL) /*!< SCU_CLK DSLEEPCR: ETH0CR (Bitfield-Mask: 0x01) */ +#define SCU_CLK_DSLEEPCR_EBUCR_Pos (19UL) /*!< SCU_CLK DSLEEPCR: EBUCR (Bit 19) */ +#define SCU_CLK_DSLEEPCR_EBUCR_Msk (0x80000UL) /*!< SCU_CLK DSLEEPCR: EBUCR (Bitfield-Mask: 0x01) */ +#define SCU_CLK_DSLEEPCR_CCUCR_Pos (20UL) /*!< SCU_CLK DSLEEPCR: CCUCR (Bit 20) */ +#define SCU_CLK_DSLEEPCR_CCUCR_Msk (0x100000UL) /*!< SCU_CLK DSLEEPCR: CCUCR (Bitfield-Mask: 0x01) */ +#define SCU_CLK_DSLEEPCR_WDTCR_Pos (21UL) /*!< SCU_CLK DSLEEPCR: WDTCR (Bit 21) */ +#define SCU_CLK_DSLEEPCR_WDTCR_Msk (0x200000UL) /*!< SCU_CLK DSLEEPCR: WDTCR (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_CLK_ECATCLKCR ----------------------------- */ +#define SCU_CLK_ECATCLKCR_ECADIV_Pos (0UL) /*!< SCU_CLK ECATCLKCR: ECADIV (Bit 0) */ +#define SCU_CLK_ECATCLKCR_ECADIV_Msk (0x3UL) /*!< SCU_CLK ECATCLKCR: ECADIV (Bitfield-Mask: 0x03) */ +#define SCU_CLK_ECATCLKCR_ECATSEL_Pos (16UL) /*!< SCU_CLK ECATCLKCR: ECATSEL (Bit 16) */ +#define SCU_CLK_ECATCLKCR_ECATSEL_Msk (0x10000UL) /*!< SCU_CLK ECATCLKCR: ECATSEL (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_CLK_CGATSTAT0 ----------------------------- */ +#define SCU_CLK_CGATSTAT0_VADC_Pos (0UL) /*!< SCU_CLK CGATSTAT0: VADC (Bit 0) */ +#define SCU_CLK_CGATSTAT0_VADC_Msk (0x1UL) /*!< SCU_CLK CGATSTAT0: VADC (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSTAT0_DSD_Pos (1UL) /*!< SCU_CLK CGATSTAT0: DSD (Bit 1) */ +#define SCU_CLK_CGATSTAT0_DSD_Msk (0x2UL) /*!< SCU_CLK CGATSTAT0: DSD (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSTAT0_CCU40_Pos (2UL) /*!< SCU_CLK CGATSTAT0: CCU40 (Bit 2) */ +#define SCU_CLK_CGATSTAT0_CCU40_Msk (0x4UL) /*!< SCU_CLK CGATSTAT0: CCU40 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSTAT0_CCU41_Pos (3UL) /*!< SCU_CLK CGATSTAT0: CCU41 (Bit 3) */ +#define SCU_CLK_CGATSTAT0_CCU41_Msk (0x8UL) /*!< SCU_CLK CGATSTAT0: CCU41 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSTAT0_CCU42_Pos (4UL) /*!< SCU_CLK CGATSTAT0: CCU42 (Bit 4) */ +#define SCU_CLK_CGATSTAT0_CCU42_Msk (0x10UL) /*!< SCU_CLK CGATSTAT0: CCU42 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSTAT0_CCU80_Pos (7UL) /*!< SCU_CLK CGATSTAT0: CCU80 (Bit 7) */ +#define SCU_CLK_CGATSTAT0_CCU80_Msk (0x80UL) /*!< SCU_CLK CGATSTAT0: CCU80 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSTAT0_CCU81_Pos (8UL) /*!< SCU_CLK CGATSTAT0: CCU81 (Bit 8) */ +#define SCU_CLK_CGATSTAT0_CCU81_Msk (0x100UL) /*!< SCU_CLK CGATSTAT0: CCU81 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSTAT0_POSIF0_Pos (9UL) /*!< SCU_CLK CGATSTAT0: POSIF0 (Bit 9) */ +#define SCU_CLK_CGATSTAT0_POSIF0_Msk (0x200UL) /*!< SCU_CLK CGATSTAT0: POSIF0 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSTAT0_POSIF1_Pos (10UL) /*!< SCU_CLK CGATSTAT0: POSIF1 (Bit 10) */ +#define SCU_CLK_CGATSTAT0_POSIF1_Msk (0x400UL) /*!< SCU_CLK CGATSTAT0: POSIF1 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSTAT0_USIC0_Pos (11UL) /*!< SCU_CLK CGATSTAT0: USIC0 (Bit 11) */ +#define SCU_CLK_CGATSTAT0_USIC0_Msk (0x800UL) /*!< SCU_CLK CGATSTAT0: USIC0 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSTAT0_ERU1_Pos (16UL) /*!< SCU_CLK CGATSTAT0: ERU1 (Bit 16) */ +#define SCU_CLK_CGATSTAT0_ERU1_Msk (0x10000UL) /*!< SCU_CLK CGATSTAT0: ERU1 (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_CLK_CGATSET0 ------------------------------ */ +#define SCU_CLK_CGATSET0_VADC_Pos (0UL) /*!< SCU_CLK CGATSET0: VADC (Bit 0) */ +#define SCU_CLK_CGATSET0_VADC_Msk (0x1UL) /*!< SCU_CLK CGATSET0: VADC (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSET0_DSD_Pos (1UL) /*!< SCU_CLK CGATSET0: DSD (Bit 1) */ +#define SCU_CLK_CGATSET0_DSD_Msk (0x2UL) /*!< SCU_CLK CGATSET0: DSD (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSET0_CCU40_Pos (2UL) /*!< SCU_CLK CGATSET0: CCU40 (Bit 2) */ +#define SCU_CLK_CGATSET0_CCU40_Msk (0x4UL) /*!< SCU_CLK CGATSET0: CCU40 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSET0_CCU41_Pos (3UL) /*!< SCU_CLK CGATSET0: CCU41 (Bit 3) */ +#define SCU_CLK_CGATSET0_CCU41_Msk (0x8UL) /*!< SCU_CLK CGATSET0: CCU41 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSET0_CCU42_Pos (4UL) /*!< SCU_CLK CGATSET0: CCU42 (Bit 4) */ +#define SCU_CLK_CGATSET0_CCU42_Msk (0x10UL) /*!< SCU_CLK CGATSET0: CCU42 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSET0_CCU80_Pos (7UL) /*!< SCU_CLK CGATSET0: CCU80 (Bit 7) */ +#define SCU_CLK_CGATSET0_CCU80_Msk (0x80UL) /*!< SCU_CLK CGATSET0: CCU80 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSET0_CCU81_Pos (8UL) /*!< SCU_CLK CGATSET0: CCU81 (Bit 8) */ +#define SCU_CLK_CGATSET0_CCU81_Msk (0x100UL) /*!< SCU_CLK CGATSET0: CCU81 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSET0_POSIF0_Pos (9UL) /*!< SCU_CLK CGATSET0: POSIF0 (Bit 9) */ +#define SCU_CLK_CGATSET0_POSIF0_Msk (0x200UL) /*!< SCU_CLK CGATSET0: POSIF0 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSET0_POSIF1_Pos (10UL) /*!< SCU_CLK CGATSET0: POSIF1 (Bit 10) */ +#define SCU_CLK_CGATSET0_POSIF1_Msk (0x400UL) /*!< SCU_CLK CGATSET0: POSIF1 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSET0_USIC0_Pos (11UL) /*!< SCU_CLK CGATSET0: USIC0 (Bit 11) */ +#define SCU_CLK_CGATSET0_USIC0_Msk (0x800UL) /*!< SCU_CLK CGATSET0: USIC0 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSET0_ERU1_Pos (16UL) /*!< SCU_CLK CGATSET0: ERU1 (Bit 16) */ +#define SCU_CLK_CGATSET0_ERU1_Msk (0x10000UL) /*!< SCU_CLK CGATSET0: ERU1 (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_CLK_CGATCLR0 ------------------------------ */ +#define SCU_CLK_CGATCLR0_VADC_Pos (0UL) /*!< SCU_CLK CGATCLR0: VADC (Bit 0) */ +#define SCU_CLK_CGATCLR0_VADC_Msk (0x1UL) /*!< SCU_CLK CGATCLR0: VADC (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATCLR0_DSD_Pos (1UL) /*!< SCU_CLK CGATCLR0: DSD (Bit 1) */ +#define SCU_CLK_CGATCLR0_DSD_Msk (0x2UL) /*!< SCU_CLK CGATCLR0: DSD (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATCLR0_CCU40_Pos (2UL) /*!< SCU_CLK CGATCLR0: CCU40 (Bit 2) */ +#define SCU_CLK_CGATCLR0_CCU40_Msk (0x4UL) /*!< SCU_CLK CGATCLR0: CCU40 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATCLR0_CCU41_Pos (3UL) /*!< SCU_CLK CGATCLR0: CCU41 (Bit 3) */ +#define SCU_CLK_CGATCLR0_CCU41_Msk (0x8UL) /*!< SCU_CLK CGATCLR0: CCU41 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATCLR0_CCU42_Pos (4UL) /*!< SCU_CLK CGATCLR0: CCU42 (Bit 4) */ +#define SCU_CLK_CGATCLR0_CCU42_Msk (0x10UL) /*!< SCU_CLK CGATCLR0: CCU42 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATCLR0_CCU80_Pos (7UL) /*!< SCU_CLK CGATCLR0: CCU80 (Bit 7) */ +#define SCU_CLK_CGATCLR0_CCU80_Msk (0x80UL) /*!< SCU_CLK CGATCLR0: CCU80 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATCLR0_CCU81_Pos (8UL) /*!< SCU_CLK CGATCLR0: CCU81 (Bit 8) */ +#define SCU_CLK_CGATCLR0_CCU81_Msk (0x100UL) /*!< SCU_CLK CGATCLR0: CCU81 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATCLR0_POSIF0_Pos (9UL) /*!< SCU_CLK CGATCLR0: POSIF0 (Bit 9) */ +#define SCU_CLK_CGATCLR0_POSIF0_Msk (0x200UL) /*!< SCU_CLK CGATCLR0: POSIF0 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATCLR0_POSIF1_Pos (10UL) /*!< SCU_CLK CGATCLR0: POSIF1 (Bit 10) */ +#define SCU_CLK_CGATCLR0_POSIF1_Msk (0x400UL) /*!< SCU_CLK CGATCLR0: POSIF1 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATCLR0_USIC0_Pos (11UL) /*!< SCU_CLK CGATCLR0: USIC0 (Bit 11) */ +#define SCU_CLK_CGATCLR0_USIC0_Msk (0x800UL) /*!< SCU_CLK CGATCLR0: USIC0 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATCLR0_ERU1_Pos (16UL) /*!< SCU_CLK CGATCLR0: ERU1 (Bit 16) */ +#define SCU_CLK_CGATCLR0_ERU1_Msk (0x10000UL) /*!< SCU_CLK CGATCLR0: ERU1 (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_CLK_CGATSTAT1 ----------------------------- */ +#define SCU_CLK_CGATSTAT1_CCU43_Pos (0UL) /*!< SCU_CLK CGATSTAT1: CCU43 (Bit 0) */ +#define SCU_CLK_CGATSTAT1_CCU43_Msk (0x1UL) /*!< SCU_CLK CGATSTAT1: CCU43 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSTAT1_LEDTSCU0_Pos (3UL) /*!< SCU_CLK CGATSTAT1: LEDTSCU0 (Bit 3) */ +#define SCU_CLK_CGATSTAT1_LEDTSCU0_Msk (0x8UL) /*!< SCU_CLK CGATSTAT1: LEDTSCU0 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSTAT1_MCAN0_Pos (4UL) /*!< SCU_CLK CGATSTAT1: MCAN0 (Bit 4) */ +#define SCU_CLK_CGATSTAT1_MCAN0_Msk (0x10UL) /*!< SCU_CLK CGATSTAT1: MCAN0 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSTAT1_DAC_Pos (5UL) /*!< SCU_CLK CGATSTAT1: DAC (Bit 5) */ +#define SCU_CLK_CGATSTAT1_DAC_Msk (0x20UL) /*!< SCU_CLK CGATSTAT1: DAC (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSTAT1_MMCI_Pos (6UL) /*!< SCU_CLK CGATSTAT1: MMCI (Bit 6) */ +#define SCU_CLK_CGATSTAT1_MMCI_Msk (0x40UL) /*!< SCU_CLK CGATSTAT1: MMCI (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSTAT1_USIC1_Pos (7UL) /*!< SCU_CLK CGATSTAT1: USIC1 (Bit 7) */ +#define SCU_CLK_CGATSTAT1_USIC1_Msk (0x80UL) /*!< SCU_CLK CGATSTAT1: USIC1 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSTAT1_USIC2_Pos (8UL) /*!< SCU_CLK CGATSTAT1: USIC2 (Bit 8) */ +#define SCU_CLK_CGATSTAT1_USIC2_Msk (0x100UL) /*!< SCU_CLK CGATSTAT1: USIC2 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSTAT1_PPORTS_Pos (9UL) /*!< SCU_CLK CGATSTAT1: PPORTS (Bit 9) */ +#define SCU_CLK_CGATSTAT1_PPORTS_Msk (0x200UL) /*!< SCU_CLK CGATSTAT1: PPORTS (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_CLK_CGATSET1 ------------------------------ */ +#define SCU_CLK_CGATSET1_CCU43_Pos (0UL) /*!< SCU_CLK CGATSET1: CCU43 (Bit 0) */ +#define SCU_CLK_CGATSET1_CCU43_Msk (0x1UL) /*!< SCU_CLK CGATSET1: CCU43 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSET1_LEDTSCU0_Pos (3UL) /*!< SCU_CLK CGATSET1: LEDTSCU0 (Bit 3) */ +#define SCU_CLK_CGATSET1_LEDTSCU0_Msk (0x8UL) /*!< SCU_CLK CGATSET1: LEDTSCU0 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSET1_MCAN0_Pos (4UL) /*!< SCU_CLK CGATSET1: MCAN0 (Bit 4) */ +#define SCU_CLK_CGATSET1_MCAN0_Msk (0x10UL) /*!< SCU_CLK CGATSET1: MCAN0 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSET1_DAC_Pos (5UL) /*!< SCU_CLK CGATSET1: DAC (Bit 5) */ +#define SCU_CLK_CGATSET1_DAC_Msk (0x20UL) /*!< SCU_CLK CGATSET1: DAC (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSET1_MMCI_Pos (6UL) /*!< SCU_CLK CGATSET1: MMCI (Bit 6) */ +#define SCU_CLK_CGATSET1_MMCI_Msk (0x40UL) /*!< SCU_CLK CGATSET1: MMCI (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSET1_USIC1_Pos (7UL) /*!< SCU_CLK CGATSET1: USIC1 (Bit 7) */ +#define SCU_CLK_CGATSET1_USIC1_Msk (0x80UL) /*!< SCU_CLK CGATSET1: USIC1 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSET1_USIC2_Pos (8UL) /*!< SCU_CLK CGATSET1: USIC2 (Bit 8) */ +#define SCU_CLK_CGATSET1_USIC2_Msk (0x100UL) /*!< SCU_CLK CGATSET1: USIC2 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSET1_PPORTS_Pos (9UL) /*!< SCU_CLK CGATSET1: PPORTS (Bit 9) */ +#define SCU_CLK_CGATSET1_PPORTS_Msk (0x200UL) /*!< SCU_CLK CGATSET1: PPORTS (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_CLK_CGATCLR1 ------------------------------ */ +#define SCU_CLK_CGATCLR1_CCU43_Pos (0UL) /*!< SCU_CLK CGATCLR1: CCU43 (Bit 0) */ +#define SCU_CLK_CGATCLR1_CCU43_Msk (0x1UL) /*!< SCU_CLK CGATCLR1: CCU43 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATCLR1_LEDTSCU0_Pos (3UL) /*!< SCU_CLK CGATCLR1: LEDTSCU0 (Bit 3) */ +#define SCU_CLK_CGATCLR1_LEDTSCU0_Msk (0x8UL) /*!< SCU_CLK CGATCLR1: LEDTSCU0 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATCLR1_MCAN0_Pos (4UL) /*!< SCU_CLK CGATCLR1: MCAN0 (Bit 4) */ +#define SCU_CLK_CGATCLR1_MCAN0_Msk (0x10UL) /*!< SCU_CLK CGATCLR1: MCAN0 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATCLR1_DAC_Pos (5UL) /*!< SCU_CLK CGATCLR1: DAC (Bit 5) */ +#define SCU_CLK_CGATCLR1_DAC_Msk (0x20UL) /*!< SCU_CLK CGATCLR1: DAC (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATCLR1_MMCI_Pos (6UL) /*!< SCU_CLK CGATCLR1: MMCI (Bit 6) */ +#define SCU_CLK_CGATCLR1_MMCI_Msk (0x40UL) /*!< SCU_CLK CGATCLR1: MMCI (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATCLR1_USIC1_Pos (7UL) /*!< SCU_CLK CGATCLR1: USIC1 (Bit 7) */ +#define SCU_CLK_CGATCLR1_USIC1_Msk (0x80UL) /*!< SCU_CLK CGATCLR1: USIC1 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATCLR1_USIC2_Pos (8UL) /*!< SCU_CLK CGATCLR1: USIC2 (Bit 8) */ +#define SCU_CLK_CGATCLR1_USIC2_Msk (0x100UL) /*!< SCU_CLK CGATCLR1: USIC2 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATCLR1_PPORTS_Pos (9UL) /*!< SCU_CLK CGATCLR1: PPORTS (Bit 9) */ +#define SCU_CLK_CGATCLR1_PPORTS_Msk (0x200UL) /*!< SCU_CLK CGATCLR1: PPORTS (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_CLK_CGATSTAT2 ----------------------------- */ +#define SCU_CLK_CGATSTAT2_WDT_Pos (1UL) /*!< SCU_CLK CGATSTAT2: WDT (Bit 1) */ +#define SCU_CLK_CGATSTAT2_WDT_Msk (0x2UL) /*!< SCU_CLK CGATSTAT2: WDT (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSTAT2_ETH0_Pos (2UL) /*!< SCU_CLK CGATSTAT2: ETH0 (Bit 2) */ +#define SCU_CLK_CGATSTAT2_ETH0_Msk (0x4UL) /*!< SCU_CLK CGATSTAT2: ETH0 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSTAT2_DMA0_Pos (4UL) /*!< SCU_CLK CGATSTAT2: DMA0 (Bit 4) */ +#define SCU_CLK_CGATSTAT2_DMA0_Msk (0x10UL) /*!< SCU_CLK CGATSTAT2: DMA0 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSTAT2_DMA1_Pos (5UL) /*!< SCU_CLK CGATSTAT2: DMA1 (Bit 5) */ +#define SCU_CLK_CGATSTAT2_DMA1_Msk (0x20UL) /*!< SCU_CLK CGATSTAT2: DMA1 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSTAT2_FCE_Pos (6UL) /*!< SCU_CLK CGATSTAT2: FCE (Bit 6) */ +#define SCU_CLK_CGATSTAT2_FCE_Msk (0x40UL) /*!< SCU_CLK CGATSTAT2: FCE (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSTAT2_USB_Pos (7UL) /*!< SCU_CLK CGATSTAT2: USB (Bit 7) */ +#define SCU_CLK_CGATSTAT2_USB_Msk (0x80UL) /*!< SCU_CLK CGATSTAT2: USB (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSTAT2_ECAT0_Pos (10UL) /*!< SCU_CLK CGATSTAT2: ECAT0 (Bit 10) */ +#define SCU_CLK_CGATSTAT2_ECAT0_Msk (0x400UL) /*!< SCU_CLK CGATSTAT2: ECAT0 (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_CLK_CGATSET2 ------------------------------ */ +#define SCU_CLK_CGATSET2_WDT_Pos (1UL) /*!< SCU_CLK CGATSET2: WDT (Bit 1) */ +#define SCU_CLK_CGATSET2_WDT_Msk (0x2UL) /*!< SCU_CLK CGATSET2: WDT (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSET2_ETH0_Pos (2UL) /*!< SCU_CLK CGATSET2: ETH0 (Bit 2) */ +#define SCU_CLK_CGATSET2_ETH0_Msk (0x4UL) /*!< SCU_CLK CGATSET2: ETH0 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSET2_DMA0_Pos (4UL) /*!< SCU_CLK CGATSET2: DMA0 (Bit 4) */ +#define SCU_CLK_CGATSET2_DMA0_Msk (0x10UL) /*!< SCU_CLK CGATSET2: DMA0 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSET2_DMA1_Pos (5UL) /*!< SCU_CLK CGATSET2: DMA1 (Bit 5) */ +#define SCU_CLK_CGATSET2_DMA1_Msk (0x20UL) /*!< SCU_CLK CGATSET2: DMA1 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSET2_FCE_Pos (6UL) /*!< SCU_CLK CGATSET2: FCE (Bit 6) */ +#define SCU_CLK_CGATSET2_FCE_Msk (0x40UL) /*!< SCU_CLK CGATSET2: FCE (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSET2_USB_Pos (7UL) /*!< SCU_CLK CGATSET2: USB (Bit 7) */ +#define SCU_CLK_CGATSET2_USB_Msk (0x80UL) /*!< SCU_CLK CGATSET2: USB (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATSET2_ECAT0_Pos (10UL) /*!< SCU_CLK CGATSET2: ECAT0 (Bit 10) */ +#define SCU_CLK_CGATSET2_ECAT0_Msk (0x400UL) /*!< SCU_CLK CGATSET2: ECAT0 (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_CLK_CGATCLR2 ------------------------------ */ +#define SCU_CLK_CGATCLR2_WDT_Pos (1UL) /*!< SCU_CLK CGATCLR2: WDT (Bit 1) */ +#define SCU_CLK_CGATCLR2_WDT_Msk (0x2UL) /*!< SCU_CLK CGATCLR2: WDT (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATCLR2_ETH0_Pos (2UL) /*!< SCU_CLK CGATCLR2: ETH0 (Bit 2) */ +#define SCU_CLK_CGATCLR2_ETH0_Msk (0x4UL) /*!< SCU_CLK CGATCLR2: ETH0 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATCLR2_DMA0_Pos (4UL) /*!< SCU_CLK CGATCLR2: DMA0 (Bit 4) */ +#define SCU_CLK_CGATCLR2_DMA0_Msk (0x10UL) /*!< SCU_CLK CGATCLR2: DMA0 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATCLR2_DMA1_Pos (5UL) /*!< SCU_CLK CGATCLR2: DMA1 (Bit 5) */ +#define SCU_CLK_CGATCLR2_DMA1_Msk (0x20UL) /*!< SCU_CLK CGATCLR2: DMA1 (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATCLR2_FCE_Pos (6UL) /*!< SCU_CLK CGATCLR2: FCE (Bit 6) */ +#define SCU_CLK_CGATCLR2_FCE_Msk (0x40UL) /*!< SCU_CLK CGATCLR2: FCE (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATCLR2_USB_Pos (7UL) /*!< SCU_CLK CGATCLR2: USB (Bit 7) */ +#define SCU_CLK_CGATCLR2_USB_Msk (0x80UL) /*!< SCU_CLK CGATCLR2: USB (Bitfield-Mask: 0x01) */ +#define SCU_CLK_CGATCLR2_ECAT0_Pos (10UL) /*!< SCU_CLK CGATCLR2: ECAT0 (Bit 10) */ +#define SCU_CLK_CGATCLR2_ECAT0_Msk (0x400UL) /*!< SCU_CLK CGATCLR2: ECAT0 (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_CLK_CGATSTAT3 ----------------------------- */ +#define SCU_CLK_CGATSTAT3_EBU_Pos (2UL) /*!< SCU_CLK CGATSTAT3: EBU (Bit 2) */ +#define SCU_CLK_CGATSTAT3_EBU_Msk (0x4UL) /*!< SCU_CLK CGATSTAT3: EBU (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_CLK_CGATSET3 ------------------------------ */ +#define SCU_CLK_CGATSET3_EBU_Pos (2UL) /*!< SCU_CLK CGATSET3: EBU (Bit 2) */ +#define SCU_CLK_CGATSET3_EBU_Msk (0x4UL) /*!< SCU_CLK CGATSET3: EBU (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_CLK_CGATCLR3 ------------------------------ */ +#define SCU_CLK_CGATCLR3_EBU_Pos (2UL) /*!< SCU_CLK CGATCLR3: EBU (Bit 2) */ +#define SCU_CLK_CGATCLR3_EBU_Msk (0x4UL) /*!< SCU_CLK CGATCLR3: EBU (Bitfield-Mask: 0x01) */ + + +/* ================================================================================ */ +/* ================ struct 'SCU_OSC' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ------------------------------ SCU_OSC_OSCHPSTAT ----------------------------- */ +#define SCU_OSC_OSCHPSTAT_X1D_Pos (0UL) /*!< SCU_OSC OSCHPSTAT: X1D (Bit 0) */ +#define SCU_OSC_OSCHPSTAT_X1D_Msk (0x1UL) /*!< SCU_OSC OSCHPSTAT: X1D (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_OSC_OSCHPCTRL ----------------------------- */ +#define SCU_OSC_OSCHPCTRL_X1DEN_Pos (0UL) /*!< SCU_OSC OSCHPCTRL: X1DEN (Bit 0) */ +#define SCU_OSC_OSCHPCTRL_X1DEN_Msk (0x1UL) /*!< SCU_OSC OSCHPCTRL: X1DEN (Bitfield-Mask: 0x01) */ +#define SCU_OSC_OSCHPCTRL_SHBY_Pos (1UL) /*!< SCU_OSC OSCHPCTRL: SHBY (Bit 1) */ +#define SCU_OSC_OSCHPCTRL_SHBY_Msk (0x2UL) /*!< SCU_OSC OSCHPCTRL: SHBY (Bitfield-Mask: 0x01) */ +#define SCU_OSC_OSCHPCTRL_GAINSEL_Pos (2UL) /*!< SCU_OSC OSCHPCTRL: GAINSEL (Bit 2) */ +#define SCU_OSC_OSCHPCTRL_GAINSEL_Msk (0xcUL) /*!< SCU_OSC OSCHPCTRL: GAINSEL (Bitfield-Mask: 0x03) */ +#define SCU_OSC_OSCHPCTRL_MODE_Pos (4UL) /*!< SCU_OSC OSCHPCTRL: MODE (Bit 4) */ +#define SCU_OSC_OSCHPCTRL_MODE_Msk (0x30UL) /*!< SCU_OSC OSCHPCTRL: MODE (Bitfield-Mask: 0x03) */ +#define SCU_OSC_OSCHPCTRL_OSCVAL_Pos (16UL) /*!< SCU_OSC OSCHPCTRL: OSCVAL (Bit 16) */ +#define SCU_OSC_OSCHPCTRL_OSCVAL_Msk (0xf0000UL) /*!< SCU_OSC OSCHPCTRL: OSCVAL (Bitfield-Mask: 0x0f) */ + +/* ----------------------------- SCU_OSC_CLKCALCONST ---------------------------- */ +#define SCU_OSC_CLKCALCONST_CALIBCONST_Pos (0UL) /*!< SCU_OSC CLKCALCONST: CALIBCONST (Bit 0) */ +#define SCU_OSC_CLKCALCONST_CALIBCONST_Msk (0xfUL) /*!< SCU_OSC CLKCALCONST: CALIBCONST (Bitfield-Mask: 0x0f) */ + + +/* ================================================================================ */ +/* ================ struct 'SCU_PLL' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ------------------------------- SCU_PLL_PLLSTAT ------------------------------ */ +#define SCU_PLL_PLLSTAT_VCOBYST_Pos (0UL) /*!< SCU_PLL PLLSTAT: VCOBYST (Bit 0) */ +#define SCU_PLL_PLLSTAT_VCOBYST_Msk (0x1UL) /*!< SCU_PLL PLLSTAT: VCOBYST (Bitfield-Mask: 0x01) */ +#define SCU_PLL_PLLSTAT_PWDSTAT_Pos (1UL) /*!< SCU_PLL PLLSTAT: PWDSTAT (Bit 1) */ +#define SCU_PLL_PLLSTAT_PWDSTAT_Msk (0x2UL) /*!< SCU_PLL PLLSTAT: PWDSTAT (Bitfield-Mask: 0x01) */ +#define SCU_PLL_PLLSTAT_VCOLOCK_Pos (2UL) /*!< SCU_PLL PLLSTAT: VCOLOCK (Bit 2) */ +#define SCU_PLL_PLLSTAT_VCOLOCK_Msk (0x4UL) /*!< SCU_PLL PLLSTAT: VCOLOCK (Bitfield-Mask: 0x01) */ +#define SCU_PLL_PLLSTAT_K1RDY_Pos (4UL) /*!< SCU_PLL PLLSTAT: K1RDY (Bit 4) */ +#define SCU_PLL_PLLSTAT_K1RDY_Msk (0x10UL) /*!< SCU_PLL PLLSTAT: K1RDY (Bitfield-Mask: 0x01) */ +#define SCU_PLL_PLLSTAT_K2RDY_Pos (5UL) /*!< SCU_PLL PLLSTAT: K2RDY (Bit 5) */ +#define SCU_PLL_PLLSTAT_K2RDY_Msk (0x20UL) /*!< SCU_PLL PLLSTAT: K2RDY (Bitfield-Mask: 0x01) */ +#define SCU_PLL_PLLSTAT_BY_Pos (6UL) /*!< SCU_PLL PLLSTAT: BY (Bit 6) */ +#define SCU_PLL_PLLSTAT_BY_Msk (0x40UL) /*!< SCU_PLL PLLSTAT: BY (Bitfield-Mask: 0x01) */ +#define SCU_PLL_PLLSTAT_PLLLV_Pos (7UL) /*!< SCU_PLL PLLSTAT: PLLLV (Bit 7) */ +#define SCU_PLL_PLLSTAT_PLLLV_Msk (0x80UL) /*!< SCU_PLL PLLSTAT: PLLLV (Bitfield-Mask: 0x01) */ +#define SCU_PLL_PLLSTAT_PLLHV_Pos (8UL) /*!< SCU_PLL PLLSTAT: PLLHV (Bit 8) */ +#define SCU_PLL_PLLSTAT_PLLHV_Msk (0x100UL) /*!< SCU_PLL PLLSTAT: PLLHV (Bitfield-Mask: 0x01) */ +#define SCU_PLL_PLLSTAT_PLLSP_Pos (9UL) /*!< SCU_PLL PLLSTAT: PLLSP (Bit 9) */ +#define SCU_PLL_PLLSTAT_PLLSP_Msk (0x200UL) /*!< SCU_PLL PLLSTAT: PLLSP (Bitfield-Mask: 0x01) */ + +/* ------------------------------- SCU_PLL_PLLCON0 ------------------------------ */ +#define SCU_PLL_PLLCON0_VCOBYP_Pos (0UL) /*!< SCU_PLL PLLCON0: VCOBYP (Bit 0) */ +#define SCU_PLL_PLLCON0_VCOBYP_Msk (0x1UL) /*!< SCU_PLL PLLCON0: VCOBYP (Bitfield-Mask: 0x01) */ +#define SCU_PLL_PLLCON0_VCOPWD_Pos (1UL) /*!< SCU_PLL PLLCON0: VCOPWD (Bit 1) */ +#define SCU_PLL_PLLCON0_VCOPWD_Msk (0x2UL) /*!< SCU_PLL PLLCON0: VCOPWD (Bitfield-Mask: 0x01) */ +#define SCU_PLL_PLLCON0_VCOTR_Pos (2UL) /*!< SCU_PLL PLLCON0: VCOTR (Bit 2) */ +#define SCU_PLL_PLLCON0_VCOTR_Msk (0x4UL) /*!< SCU_PLL PLLCON0: VCOTR (Bitfield-Mask: 0x01) */ +#define SCU_PLL_PLLCON0_FINDIS_Pos (4UL) /*!< SCU_PLL PLLCON0: FINDIS (Bit 4) */ +#define SCU_PLL_PLLCON0_FINDIS_Msk (0x10UL) /*!< SCU_PLL PLLCON0: FINDIS (Bitfield-Mask: 0x01) */ +#define SCU_PLL_PLLCON0_OSCDISCDIS_Pos (6UL) /*!< SCU_PLL PLLCON0: OSCDISCDIS (Bit 6) */ +#define SCU_PLL_PLLCON0_OSCDISCDIS_Msk (0x40UL) /*!< SCU_PLL PLLCON0: OSCDISCDIS (Bitfield-Mask: 0x01) */ +#define SCU_PLL_PLLCON0_PLLPWD_Pos (16UL) /*!< SCU_PLL PLLCON0: PLLPWD (Bit 16) */ +#define SCU_PLL_PLLCON0_PLLPWD_Msk (0x10000UL) /*!< SCU_PLL PLLCON0: PLLPWD (Bitfield-Mask: 0x01) */ +#define SCU_PLL_PLLCON0_OSCRES_Pos (17UL) /*!< SCU_PLL PLLCON0: OSCRES (Bit 17) */ +#define SCU_PLL_PLLCON0_OSCRES_Msk (0x20000UL) /*!< SCU_PLL PLLCON0: OSCRES (Bitfield-Mask: 0x01) */ +#define SCU_PLL_PLLCON0_RESLD_Pos (18UL) /*!< SCU_PLL PLLCON0: RESLD (Bit 18) */ +#define SCU_PLL_PLLCON0_RESLD_Msk (0x40000UL) /*!< SCU_PLL PLLCON0: RESLD (Bitfield-Mask: 0x01) */ +#define SCU_PLL_PLLCON0_AOTREN_Pos (19UL) /*!< SCU_PLL PLLCON0: AOTREN (Bit 19) */ +#define SCU_PLL_PLLCON0_AOTREN_Msk (0x80000UL) /*!< SCU_PLL PLLCON0: AOTREN (Bitfield-Mask: 0x01) */ +#define SCU_PLL_PLLCON0_FOTR_Pos (20UL) /*!< SCU_PLL PLLCON0: FOTR (Bit 20) */ +#define SCU_PLL_PLLCON0_FOTR_Msk (0x100000UL) /*!< SCU_PLL PLLCON0: FOTR (Bitfield-Mask: 0x01) */ + +/* ------------------------------- SCU_PLL_PLLCON1 ------------------------------ */ +#define SCU_PLL_PLLCON1_K1DIV_Pos (0UL) /*!< SCU_PLL PLLCON1: K1DIV (Bit 0) */ +#define SCU_PLL_PLLCON1_K1DIV_Msk (0x7fUL) /*!< SCU_PLL PLLCON1: K1DIV (Bitfield-Mask: 0x7f) */ +#define SCU_PLL_PLLCON1_NDIV_Pos (8UL) /*!< SCU_PLL PLLCON1: NDIV (Bit 8) */ +#define SCU_PLL_PLLCON1_NDIV_Msk (0x7f00UL) /*!< SCU_PLL PLLCON1: NDIV (Bitfield-Mask: 0x7f) */ +#define SCU_PLL_PLLCON1_K2DIV_Pos (16UL) /*!< SCU_PLL PLLCON1: K2DIV (Bit 16) */ +#define SCU_PLL_PLLCON1_K2DIV_Msk (0x7f0000UL) /*!< SCU_PLL PLLCON1: K2DIV (Bitfield-Mask: 0x7f) */ +#define SCU_PLL_PLLCON1_PDIV_Pos (24UL) /*!< SCU_PLL PLLCON1: PDIV (Bit 24) */ +#define SCU_PLL_PLLCON1_PDIV_Msk (0xf000000UL) /*!< SCU_PLL PLLCON1: PDIV (Bitfield-Mask: 0x0f) */ + +/* ------------------------------- SCU_PLL_PLLCON2 ------------------------------ */ +#define SCU_PLL_PLLCON2_PINSEL_Pos (0UL) /*!< SCU_PLL PLLCON2: PINSEL (Bit 0) */ +#define SCU_PLL_PLLCON2_PINSEL_Msk (0x1UL) /*!< SCU_PLL PLLCON2: PINSEL (Bitfield-Mask: 0x01) */ +#define SCU_PLL_PLLCON2_K1INSEL_Pos (8UL) /*!< SCU_PLL PLLCON2: K1INSEL (Bit 8) */ +#define SCU_PLL_PLLCON2_K1INSEL_Msk (0x100UL) /*!< SCU_PLL PLLCON2: K1INSEL (Bitfield-Mask: 0x01) */ + +/* ----------------------------- SCU_PLL_USBPLLSTAT ----------------------------- */ +#define SCU_PLL_USBPLLSTAT_VCOBYST_Pos (0UL) /*!< SCU_PLL USBPLLSTAT: VCOBYST (Bit 0) */ +#define SCU_PLL_USBPLLSTAT_VCOBYST_Msk (0x1UL) /*!< SCU_PLL USBPLLSTAT: VCOBYST (Bitfield-Mask: 0x01) */ +#define SCU_PLL_USBPLLSTAT_PWDSTAT_Pos (1UL) /*!< SCU_PLL USBPLLSTAT: PWDSTAT (Bit 1) */ +#define SCU_PLL_USBPLLSTAT_PWDSTAT_Msk (0x2UL) /*!< SCU_PLL USBPLLSTAT: PWDSTAT (Bitfield-Mask: 0x01) */ +#define SCU_PLL_USBPLLSTAT_VCOLOCK_Pos (2UL) /*!< SCU_PLL USBPLLSTAT: VCOLOCK (Bit 2) */ +#define SCU_PLL_USBPLLSTAT_VCOLOCK_Msk (0x4UL) /*!< SCU_PLL USBPLLSTAT: VCOLOCK (Bitfield-Mask: 0x01) */ +#define SCU_PLL_USBPLLSTAT_BY_Pos (6UL) /*!< SCU_PLL USBPLLSTAT: BY (Bit 6) */ +#define SCU_PLL_USBPLLSTAT_BY_Msk (0x40UL) /*!< SCU_PLL USBPLLSTAT: BY (Bitfield-Mask: 0x01) */ +#define SCU_PLL_USBPLLSTAT_VCOLOCKED_Pos (7UL) /*!< SCU_PLL USBPLLSTAT: VCOLOCKED (Bit 7) */ +#define SCU_PLL_USBPLLSTAT_VCOLOCKED_Msk (0x80UL) /*!< SCU_PLL USBPLLSTAT: VCOLOCKED (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_PLL_USBPLLCON ----------------------------- */ +#define SCU_PLL_USBPLLCON_VCOBYP_Pos (0UL) /*!< SCU_PLL USBPLLCON: VCOBYP (Bit 0) */ +#define SCU_PLL_USBPLLCON_VCOBYP_Msk (0x1UL) /*!< SCU_PLL USBPLLCON: VCOBYP (Bitfield-Mask: 0x01) */ +#define SCU_PLL_USBPLLCON_VCOPWD_Pos (1UL) /*!< SCU_PLL USBPLLCON: VCOPWD (Bit 1) */ +#define SCU_PLL_USBPLLCON_VCOPWD_Msk (0x2UL) /*!< SCU_PLL USBPLLCON: VCOPWD (Bitfield-Mask: 0x01) */ +#define SCU_PLL_USBPLLCON_VCOTR_Pos (2UL) /*!< SCU_PLL USBPLLCON: VCOTR (Bit 2) */ +#define SCU_PLL_USBPLLCON_VCOTR_Msk (0x4UL) /*!< SCU_PLL USBPLLCON: VCOTR (Bitfield-Mask: 0x01) */ +#define SCU_PLL_USBPLLCON_FINDIS_Pos (4UL) /*!< SCU_PLL USBPLLCON: FINDIS (Bit 4) */ +#define SCU_PLL_USBPLLCON_FINDIS_Msk (0x10UL) /*!< SCU_PLL USBPLLCON: FINDIS (Bitfield-Mask: 0x01) */ +#define SCU_PLL_USBPLLCON_OSCDISCDIS_Pos (6UL) /*!< SCU_PLL USBPLLCON: OSCDISCDIS (Bit 6) */ +#define SCU_PLL_USBPLLCON_OSCDISCDIS_Msk (0x40UL) /*!< SCU_PLL USBPLLCON: OSCDISCDIS (Bitfield-Mask: 0x01) */ +#define SCU_PLL_USBPLLCON_NDIV_Pos (8UL) /*!< SCU_PLL USBPLLCON: NDIV (Bit 8) */ +#define SCU_PLL_USBPLLCON_NDIV_Msk (0x7f00UL) /*!< SCU_PLL USBPLLCON: NDIV (Bitfield-Mask: 0x7f) */ +#define SCU_PLL_USBPLLCON_PLLPWD_Pos (16UL) /*!< SCU_PLL USBPLLCON: PLLPWD (Bit 16) */ +#define SCU_PLL_USBPLLCON_PLLPWD_Msk (0x10000UL) /*!< SCU_PLL USBPLLCON: PLLPWD (Bitfield-Mask: 0x01) */ +#define SCU_PLL_USBPLLCON_RESLD_Pos (18UL) /*!< SCU_PLL USBPLLCON: RESLD (Bit 18) */ +#define SCU_PLL_USBPLLCON_RESLD_Msk (0x40000UL) /*!< SCU_PLL USBPLLCON: RESLD (Bitfield-Mask: 0x01) */ +#define SCU_PLL_USBPLLCON_PDIV_Pos (24UL) /*!< SCU_PLL USBPLLCON: PDIV (Bit 24) */ +#define SCU_PLL_USBPLLCON_PDIV_Msk (0xf000000UL) /*!< SCU_PLL USBPLLCON: PDIV (Bitfield-Mask: 0x0f) */ + +/* ------------------------------ SCU_PLL_CLKMXSTAT ----------------------------- */ +#define SCU_PLL_CLKMXSTAT_SYSCLKMUX_Pos (0UL) /*!< SCU_PLL CLKMXSTAT: SYSCLKMUX (Bit 0) */ +#define SCU_PLL_CLKMXSTAT_SYSCLKMUX_Msk (0x3UL) /*!< SCU_PLL CLKMXSTAT: SYSCLKMUX (Bitfield-Mask: 0x03) */ + + +/* ================================================================================ */ +/* ================ struct 'SCU_GENERAL' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ------------------------------- SCU_GENERAL_ID ------------------------------- */ +#define SCU_GENERAL_ID_MOD_REV_Pos (0UL) /*!< SCU_GENERAL ID: MOD_REV (Bit 0) */ +#define SCU_GENERAL_ID_MOD_REV_Msk (0xffUL) /*!< SCU_GENERAL ID: MOD_REV (Bitfield-Mask: 0xff) */ +#define SCU_GENERAL_ID_MOD_TYPE_Pos (8UL) /*!< SCU_GENERAL ID: MOD_TYPE (Bit 8) */ +#define SCU_GENERAL_ID_MOD_TYPE_Msk (0xff00UL) /*!< SCU_GENERAL ID: MOD_TYPE (Bitfield-Mask: 0xff) */ +#define SCU_GENERAL_ID_MOD_NUMBER_Pos (16UL) /*!< SCU_GENERAL ID: MOD_NUMBER (Bit 16) */ +#define SCU_GENERAL_ID_MOD_NUMBER_Msk (0xffff0000UL) /*!< SCU_GENERAL ID: MOD_NUMBER (Bitfield-Mask: 0xffff) */ + +/* ----------------------------- SCU_GENERAL_IDCHIP ----------------------------- */ +#define SCU_GENERAL_IDCHIP_IDCHIP_Pos (0UL) /*!< SCU_GENERAL IDCHIP: IDCHIP (Bit 0) */ +#define SCU_GENERAL_IDCHIP_IDCHIP_Msk (0xffffffffUL) /*!< SCU_GENERAL IDCHIP: IDCHIP (Bitfield-Mask: 0xffffffff) */ + +/* ----------------------------- SCU_GENERAL_IDMANUF ---------------------------- */ +#define SCU_GENERAL_IDMANUF_DEPT_Pos (0UL) /*!< SCU_GENERAL IDMANUF: DEPT (Bit 0) */ +#define SCU_GENERAL_IDMANUF_DEPT_Msk (0x1fUL) /*!< SCU_GENERAL IDMANUF: DEPT (Bitfield-Mask: 0x1f) */ +#define SCU_GENERAL_IDMANUF_MANUF_Pos (5UL) /*!< SCU_GENERAL IDMANUF: MANUF (Bit 5) */ +#define SCU_GENERAL_IDMANUF_MANUF_Msk (0xffe0UL) /*!< SCU_GENERAL IDMANUF: MANUF (Bitfield-Mask: 0x7ff) */ + +/* ------------------------------ SCU_GENERAL_STCON ----------------------------- */ +#define SCU_GENERAL_STCON_HWCON_Pos (0UL) /*!< SCU_GENERAL STCON: HWCON (Bit 0) */ +#define SCU_GENERAL_STCON_HWCON_Msk (0x3UL) /*!< SCU_GENERAL STCON: HWCON (Bitfield-Mask: 0x03) */ +#define SCU_GENERAL_STCON_SWCON_Pos (8UL) /*!< SCU_GENERAL STCON: SWCON (Bit 8) */ +#define SCU_GENERAL_STCON_SWCON_Msk (0xf00UL) /*!< SCU_GENERAL STCON: SWCON (Bitfield-Mask: 0x0f) */ + +/* ------------------------------- SCU_GENERAL_GPR ------------------------------ */ +#define SCU_GENERAL_GPR_DAT_Pos (0UL) /*!< SCU_GENERAL GPR: DAT (Bit 0) */ +#define SCU_GENERAL_GPR_DAT_Msk (0xffffffffUL) /*!< SCU_GENERAL GPR: DAT (Bitfield-Mask: 0xffffffff) */ + +/* ----------------------------- SCU_GENERAL_CCUCON ----------------------------- */ +#define SCU_GENERAL_CCUCON_GSC40_Pos (0UL) /*!< SCU_GENERAL CCUCON: GSC40 (Bit 0) */ +#define SCU_GENERAL_CCUCON_GSC40_Msk (0x1UL) /*!< SCU_GENERAL CCUCON: GSC40 (Bitfield-Mask: 0x01) */ +#define SCU_GENERAL_CCUCON_GSC41_Pos (1UL) /*!< SCU_GENERAL CCUCON: GSC41 (Bit 1) */ +#define SCU_GENERAL_CCUCON_GSC41_Msk (0x2UL) /*!< SCU_GENERAL CCUCON: GSC41 (Bitfield-Mask: 0x01) */ +#define SCU_GENERAL_CCUCON_GSC42_Pos (2UL) /*!< SCU_GENERAL CCUCON: GSC42 (Bit 2) */ +#define SCU_GENERAL_CCUCON_GSC42_Msk (0x4UL) /*!< SCU_GENERAL CCUCON: GSC42 (Bitfield-Mask: 0x01) */ +#define SCU_GENERAL_CCUCON_GSC43_Pos (3UL) /*!< SCU_GENERAL CCUCON: GSC43 (Bit 3) */ +#define SCU_GENERAL_CCUCON_GSC43_Msk (0x8UL) /*!< SCU_GENERAL CCUCON: GSC43 (Bitfield-Mask: 0x01) */ +#define SCU_GENERAL_CCUCON_GSC80_Pos (8UL) /*!< SCU_GENERAL CCUCON: GSC80 (Bit 8) */ +#define SCU_GENERAL_CCUCON_GSC80_Msk (0x100UL) /*!< SCU_GENERAL CCUCON: GSC80 (Bitfield-Mask: 0x01) */ +#define SCU_GENERAL_CCUCON_GSC81_Pos (9UL) /*!< SCU_GENERAL CCUCON: GSC81 (Bit 9) */ +#define SCU_GENERAL_CCUCON_GSC81_Msk (0x200UL) /*!< SCU_GENERAL CCUCON: GSC81 (Bitfield-Mask: 0x01) */ + +/* ----------------------------- SCU_GENERAL_DTSCON ----------------------------- */ +#define SCU_GENERAL_DTSCON_PWD_Pos (0UL) /*!< SCU_GENERAL DTSCON: PWD (Bit 0) */ +#define SCU_GENERAL_DTSCON_PWD_Msk (0x1UL) /*!< SCU_GENERAL DTSCON: PWD (Bitfield-Mask: 0x01) */ +#define SCU_GENERAL_DTSCON_START_Pos (1UL) /*!< SCU_GENERAL DTSCON: START (Bit 1) */ +#define SCU_GENERAL_DTSCON_START_Msk (0x2UL) /*!< SCU_GENERAL DTSCON: START (Bitfield-Mask: 0x01) */ +#define SCU_GENERAL_DTSCON_OFFSET_Pos (4UL) /*!< SCU_GENERAL DTSCON: OFFSET (Bit 4) */ +#define SCU_GENERAL_DTSCON_OFFSET_Msk (0x7f0UL) /*!< SCU_GENERAL DTSCON: OFFSET (Bitfield-Mask: 0x7f) */ +#define SCU_GENERAL_DTSCON_GAIN_Pos (11UL) /*!< SCU_GENERAL DTSCON: GAIN (Bit 11) */ +#define SCU_GENERAL_DTSCON_GAIN_Msk (0x1f800UL) /*!< SCU_GENERAL DTSCON: GAIN (Bitfield-Mask: 0x3f) */ +#define SCU_GENERAL_DTSCON_REFTRIM_Pos (17UL) /*!< SCU_GENERAL DTSCON: REFTRIM (Bit 17) */ +#define SCU_GENERAL_DTSCON_REFTRIM_Msk (0xe0000UL) /*!< SCU_GENERAL DTSCON: REFTRIM (Bitfield-Mask: 0x07) */ +#define SCU_GENERAL_DTSCON_BGTRIM_Pos (20UL) /*!< SCU_GENERAL DTSCON: BGTRIM (Bit 20) */ +#define SCU_GENERAL_DTSCON_BGTRIM_Msk (0xf00000UL) /*!< SCU_GENERAL DTSCON: BGTRIM (Bitfield-Mask: 0x0f) */ + +/* ----------------------------- SCU_GENERAL_DTSSTAT ---------------------------- */ +#define SCU_GENERAL_DTSSTAT_RESULT_Pos (0UL) /*!< SCU_GENERAL DTSSTAT: RESULT (Bit 0) */ +#define SCU_GENERAL_DTSSTAT_RESULT_Msk (0x3ffUL) /*!< SCU_GENERAL DTSSTAT: RESULT (Bitfield-Mask: 0x3ff) */ +#define SCU_GENERAL_DTSSTAT_RDY_Pos (14UL) /*!< SCU_GENERAL DTSSTAT: RDY (Bit 14) */ +#define SCU_GENERAL_DTSSTAT_RDY_Msk (0x4000UL) /*!< SCU_GENERAL DTSSTAT: RDY (Bitfield-Mask: 0x01) */ +#define SCU_GENERAL_DTSSTAT_BUSY_Pos (15UL) /*!< SCU_GENERAL DTSSTAT: BUSY (Bit 15) */ +#define SCU_GENERAL_DTSSTAT_BUSY_Msk (0x8000UL) /*!< SCU_GENERAL DTSSTAT: BUSY (Bitfield-Mask: 0x01) */ + +/* ---------------------------- SCU_GENERAL_SDMMCDEL ---------------------------- */ +#define SCU_GENERAL_SDMMCDEL_TAPEN_Pos (0UL) /*!< SCU_GENERAL SDMMCDEL: TAPEN (Bit 0) */ +#define SCU_GENERAL_SDMMCDEL_TAPEN_Msk (0x1UL) /*!< SCU_GENERAL SDMMCDEL: TAPEN (Bitfield-Mask: 0x01) */ +#define SCU_GENERAL_SDMMCDEL_TAPDEL_Pos (4UL) /*!< SCU_GENERAL SDMMCDEL: TAPDEL (Bit 4) */ +#define SCU_GENERAL_SDMMCDEL_TAPDEL_Msk (0xf0UL) /*!< SCU_GENERAL SDMMCDEL: TAPDEL (Bitfield-Mask: 0x0f) */ + +/* ----------------------------- SCU_GENERAL_GORCEN ----------------------------- */ +#define SCU_GENERAL_GORCEN_ENORC6_Pos (6UL) /*!< SCU_GENERAL GORCEN: ENORC6 (Bit 6) */ +#define SCU_GENERAL_GORCEN_ENORC6_Msk (0x40UL) /*!< SCU_GENERAL GORCEN: ENORC6 (Bitfield-Mask: 0x01) */ +#define SCU_GENERAL_GORCEN_ENORC7_Pos (7UL) /*!< SCU_GENERAL GORCEN: ENORC7 (Bit 7) */ +#define SCU_GENERAL_GORCEN_ENORC7_Msk (0x80UL) /*!< SCU_GENERAL GORCEN: ENORC7 (Bitfield-Mask: 0x01) */ + +/* ----------------------------- SCU_GENERAL_MIRRSTS ---------------------------- */ +#define SCU_GENERAL_MIRRSTS_HDCLR_Pos (1UL) /*!< SCU_GENERAL MIRRSTS: HDCLR (Bit 1) */ +#define SCU_GENERAL_MIRRSTS_HDCLR_Msk (0x2UL) /*!< SCU_GENERAL MIRRSTS: HDCLR (Bitfield-Mask: 0x01) */ +#define SCU_GENERAL_MIRRSTS_HDSET_Pos (2UL) /*!< SCU_GENERAL MIRRSTS: HDSET (Bit 2) */ +#define SCU_GENERAL_MIRRSTS_HDSET_Msk (0x4UL) /*!< SCU_GENERAL MIRRSTS: HDSET (Bitfield-Mask: 0x01) */ +#define SCU_GENERAL_MIRRSTS_HDCR_Pos (3UL) /*!< SCU_GENERAL MIRRSTS: HDCR (Bit 3) */ +#define SCU_GENERAL_MIRRSTS_HDCR_Msk (0x8UL) /*!< SCU_GENERAL MIRRSTS: HDCR (Bitfield-Mask: 0x01) */ +#define SCU_GENERAL_MIRRSTS_OSCSICTRL_Pos (5UL) /*!< SCU_GENERAL MIRRSTS: OSCSICTRL (Bit 5) */ +#define SCU_GENERAL_MIRRSTS_OSCSICTRL_Msk (0x20UL) /*!< SCU_GENERAL MIRRSTS: OSCSICTRL (Bitfield-Mask: 0x01) */ +#define SCU_GENERAL_MIRRSTS_OSCULCTRL_Pos (7UL) /*!< SCU_GENERAL MIRRSTS: OSCULCTRL (Bit 7) */ +#define SCU_GENERAL_MIRRSTS_OSCULCTRL_Msk (0x80UL) /*!< SCU_GENERAL MIRRSTS: OSCULCTRL (Bitfield-Mask: 0x01) */ +#define SCU_GENERAL_MIRRSTS_RTC_CTR_Pos (8UL) /*!< SCU_GENERAL MIRRSTS: RTC_CTR (Bit 8) */ +#define SCU_GENERAL_MIRRSTS_RTC_CTR_Msk (0x100UL) /*!< SCU_GENERAL MIRRSTS: RTC_CTR (Bitfield-Mask: 0x01) */ +#define SCU_GENERAL_MIRRSTS_RTC_ATIM0_Pos (9UL) /*!< SCU_GENERAL MIRRSTS: RTC_ATIM0 (Bit 9) */ +#define SCU_GENERAL_MIRRSTS_RTC_ATIM0_Msk (0x200UL) /*!< SCU_GENERAL MIRRSTS: RTC_ATIM0 (Bitfield-Mask: 0x01) */ +#define SCU_GENERAL_MIRRSTS_RTC_ATIM1_Pos (10UL) /*!< SCU_GENERAL MIRRSTS: RTC_ATIM1 (Bit 10) */ +#define SCU_GENERAL_MIRRSTS_RTC_ATIM1_Msk (0x400UL) /*!< SCU_GENERAL MIRRSTS: RTC_ATIM1 (Bitfield-Mask: 0x01) */ +#define SCU_GENERAL_MIRRSTS_RTC_TIM0_Pos (11UL) /*!< SCU_GENERAL MIRRSTS: RTC_TIM0 (Bit 11) */ +#define SCU_GENERAL_MIRRSTS_RTC_TIM0_Msk (0x800UL) /*!< SCU_GENERAL MIRRSTS: RTC_TIM0 (Bitfield-Mask: 0x01) */ +#define SCU_GENERAL_MIRRSTS_RTC_TIM1_Pos (12UL) /*!< SCU_GENERAL MIRRSTS: RTC_TIM1 (Bit 12) */ +#define SCU_GENERAL_MIRRSTS_RTC_TIM1_Msk (0x1000UL) /*!< SCU_GENERAL MIRRSTS: RTC_TIM1 (Bitfield-Mask: 0x01) */ +#define SCU_GENERAL_MIRRSTS_RMX_Pos (13UL) /*!< SCU_GENERAL MIRRSTS: RMX (Bit 13) */ +#define SCU_GENERAL_MIRRSTS_RMX_Msk (0x2000UL) /*!< SCU_GENERAL MIRRSTS: RMX (Bitfield-Mask: 0x01) */ +#define SCU_GENERAL_MIRRSTS_RTC_MSKSR_Pos (14UL) /*!< SCU_GENERAL MIRRSTS: RTC_MSKSR (Bit 14) */ +#define SCU_GENERAL_MIRRSTS_RTC_MSKSR_Msk (0x4000UL) /*!< SCU_GENERAL MIRRSTS: RTC_MSKSR (Bitfield-Mask: 0x01) */ +#define SCU_GENERAL_MIRRSTS_RTC_CLRSR_Pos (15UL) /*!< SCU_GENERAL MIRRSTS: RTC_CLRSR (Bit 15) */ +#define SCU_GENERAL_MIRRSTS_RTC_CLRSR_Msk (0x8000UL) /*!< SCU_GENERAL MIRRSTS: RTC_CLRSR (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_GENERAL_RMACR ----------------------------- */ +#define SCU_GENERAL_RMACR_RDWR_Pos (0UL) /*!< SCU_GENERAL RMACR: RDWR (Bit 0) */ +#define SCU_GENERAL_RMACR_RDWR_Msk (0x1UL) /*!< SCU_GENERAL RMACR: RDWR (Bitfield-Mask: 0x01) */ +#define SCU_GENERAL_RMACR_ADDR_Pos (16UL) /*!< SCU_GENERAL RMACR: ADDR (Bit 16) */ +#define SCU_GENERAL_RMACR_ADDR_Msk (0xf0000UL) /*!< SCU_GENERAL RMACR: ADDR (Bitfield-Mask: 0x0f) */ + +/* ----------------------------- SCU_GENERAL_RMDATA ----------------------------- */ +#define SCU_GENERAL_RMDATA_DATA_Pos (0UL) /*!< SCU_GENERAL RMDATA: DATA (Bit 0) */ +#define SCU_GENERAL_RMDATA_DATA_Msk (0xffffffffUL) /*!< SCU_GENERAL RMDATA: DATA (Bitfield-Mask: 0xffffffff) */ + + +/* ================================================================================ */ +/* ================ struct 'SCU_INTERRUPT' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ---------------------------- SCU_INTERRUPT_SRSTAT ---------------------------- */ +#define SCU_INTERRUPT_SRSTAT_PRWARN_Pos (0UL) /*!< SCU_INTERRUPT SRSTAT: PRWARN (Bit 0) */ +#define SCU_INTERRUPT_SRSTAT_PRWARN_Msk (0x1UL) /*!< SCU_INTERRUPT SRSTAT: PRWARN (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSTAT_PI_Pos (1UL) /*!< SCU_INTERRUPT SRSTAT: PI (Bit 1) */ +#define SCU_INTERRUPT_SRSTAT_PI_Msk (0x2UL) /*!< SCU_INTERRUPT SRSTAT: PI (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSTAT_AI_Pos (2UL) /*!< SCU_INTERRUPT SRSTAT: AI (Bit 2) */ +#define SCU_INTERRUPT_SRSTAT_AI_Msk (0x4UL) /*!< SCU_INTERRUPT SRSTAT: AI (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSTAT_DLROVR_Pos (3UL) /*!< SCU_INTERRUPT SRSTAT: DLROVR (Bit 3) */ +#define SCU_INTERRUPT_SRSTAT_DLROVR_Msk (0x8UL) /*!< SCU_INTERRUPT SRSTAT: DLROVR (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSTAT_HDCLR_Pos (17UL) /*!< SCU_INTERRUPT SRSTAT: HDCLR (Bit 17) */ +#define SCU_INTERRUPT_SRSTAT_HDCLR_Msk (0x20000UL) /*!< SCU_INTERRUPT SRSTAT: HDCLR (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSTAT_HDSET_Pos (18UL) /*!< SCU_INTERRUPT SRSTAT: HDSET (Bit 18) */ +#define SCU_INTERRUPT_SRSTAT_HDSET_Msk (0x40000UL) /*!< SCU_INTERRUPT SRSTAT: HDSET (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSTAT_HDCR_Pos (19UL) /*!< SCU_INTERRUPT SRSTAT: HDCR (Bit 19) */ +#define SCU_INTERRUPT_SRSTAT_HDCR_Msk (0x80000UL) /*!< SCU_INTERRUPT SRSTAT: HDCR (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSTAT_OSCSICTRL_Pos (21UL) /*!< SCU_INTERRUPT SRSTAT: OSCSICTRL (Bit 21) */ +#define SCU_INTERRUPT_SRSTAT_OSCSICTRL_Msk (0x200000UL) /*!< SCU_INTERRUPT SRSTAT: OSCSICTRL (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSTAT_OSCULCTRL_Pos (23UL) /*!< SCU_INTERRUPT SRSTAT: OSCULCTRL (Bit 23) */ +#define SCU_INTERRUPT_SRSTAT_OSCULCTRL_Msk (0x800000UL) /*!< SCU_INTERRUPT SRSTAT: OSCULCTRL (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSTAT_RTC_CTR_Pos (24UL) /*!< SCU_INTERRUPT SRSTAT: RTC_CTR (Bit 24) */ +#define SCU_INTERRUPT_SRSTAT_RTC_CTR_Msk (0x1000000UL) /*!< SCU_INTERRUPT SRSTAT: RTC_CTR (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSTAT_RTC_ATIM0_Pos (25UL) /*!< SCU_INTERRUPT SRSTAT: RTC_ATIM0 (Bit 25) */ +#define SCU_INTERRUPT_SRSTAT_RTC_ATIM0_Msk (0x2000000UL) /*!< SCU_INTERRUPT SRSTAT: RTC_ATIM0 (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSTAT_RTC_ATIM1_Pos (26UL) /*!< SCU_INTERRUPT SRSTAT: RTC_ATIM1 (Bit 26) */ +#define SCU_INTERRUPT_SRSTAT_RTC_ATIM1_Msk (0x4000000UL) /*!< SCU_INTERRUPT SRSTAT: RTC_ATIM1 (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSTAT_RTC_TIM0_Pos (27UL) /*!< SCU_INTERRUPT SRSTAT: RTC_TIM0 (Bit 27) */ +#define SCU_INTERRUPT_SRSTAT_RTC_TIM0_Msk (0x8000000UL) /*!< SCU_INTERRUPT SRSTAT: RTC_TIM0 (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSTAT_RTC_TIM1_Pos (28UL) /*!< SCU_INTERRUPT SRSTAT: RTC_TIM1 (Bit 28) */ +#define SCU_INTERRUPT_SRSTAT_RTC_TIM1_Msk (0x10000000UL) /*!< SCU_INTERRUPT SRSTAT: RTC_TIM1 (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSTAT_RMX_Pos (29UL) /*!< SCU_INTERRUPT SRSTAT: RMX (Bit 29) */ +#define SCU_INTERRUPT_SRSTAT_RMX_Msk (0x20000000UL) /*!< SCU_INTERRUPT SRSTAT: RMX (Bitfield-Mask: 0x01) */ + +/* ----------------------------- SCU_INTERRUPT_SRRAW ---------------------------- */ +#define SCU_INTERRUPT_SRRAW_PRWARN_Pos (0UL) /*!< SCU_INTERRUPT SRRAW: PRWARN (Bit 0) */ +#define SCU_INTERRUPT_SRRAW_PRWARN_Msk (0x1UL) /*!< SCU_INTERRUPT SRRAW: PRWARN (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRRAW_PI_Pos (1UL) /*!< SCU_INTERRUPT SRRAW: PI (Bit 1) */ +#define SCU_INTERRUPT_SRRAW_PI_Msk (0x2UL) /*!< SCU_INTERRUPT SRRAW: PI (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRRAW_AI_Pos (2UL) /*!< SCU_INTERRUPT SRRAW: AI (Bit 2) */ +#define SCU_INTERRUPT_SRRAW_AI_Msk (0x4UL) /*!< SCU_INTERRUPT SRRAW: AI (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRRAW_DLROVR_Pos (3UL) /*!< SCU_INTERRUPT SRRAW: DLROVR (Bit 3) */ +#define SCU_INTERRUPT_SRRAW_DLROVR_Msk (0x8UL) /*!< SCU_INTERRUPT SRRAW: DLROVR (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRRAW_HDCLR_Pos (17UL) /*!< SCU_INTERRUPT SRRAW: HDCLR (Bit 17) */ +#define SCU_INTERRUPT_SRRAW_HDCLR_Msk (0x20000UL) /*!< SCU_INTERRUPT SRRAW: HDCLR (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRRAW_HDSET_Pos (18UL) /*!< SCU_INTERRUPT SRRAW: HDSET (Bit 18) */ +#define SCU_INTERRUPT_SRRAW_HDSET_Msk (0x40000UL) /*!< SCU_INTERRUPT SRRAW: HDSET (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRRAW_HDCR_Pos (19UL) /*!< SCU_INTERRUPT SRRAW: HDCR (Bit 19) */ +#define SCU_INTERRUPT_SRRAW_HDCR_Msk (0x80000UL) /*!< SCU_INTERRUPT SRRAW: HDCR (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRRAW_OSCSICTRL_Pos (21UL) /*!< SCU_INTERRUPT SRRAW: OSCSICTRL (Bit 21) */ +#define SCU_INTERRUPT_SRRAW_OSCSICTRL_Msk (0x200000UL) /*!< SCU_INTERRUPT SRRAW: OSCSICTRL (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRRAW_OSCULCTRL_Pos (23UL) /*!< SCU_INTERRUPT SRRAW: OSCULCTRL (Bit 23) */ +#define SCU_INTERRUPT_SRRAW_OSCULCTRL_Msk (0x800000UL) /*!< SCU_INTERRUPT SRRAW: OSCULCTRL (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRRAW_RTC_CTR_Pos (24UL) /*!< SCU_INTERRUPT SRRAW: RTC_CTR (Bit 24) */ +#define SCU_INTERRUPT_SRRAW_RTC_CTR_Msk (0x1000000UL) /*!< SCU_INTERRUPT SRRAW: RTC_CTR (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRRAW_RTC_ATIM0_Pos (25UL) /*!< SCU_INTERRUPT SRRAW: RTC_ATIM0 (Bit 25) */ +#define SCU_INTERRUPT_SRRAW_RTC_ATIM0_Msk (0x2000000UL) /*!< SCU_INTERRUPT SRRAW: RTC_ATIM0 (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRRAW_RTC_ATIM1_Pos (26UL) /*!< SCU_INTERRUPT SRRAW: RTC_ATIM1 (Bit 26) */ +#define SCU_INTERRUPT_SRRAW_RTC_ATIM1_Msk (0x4000000UL) /*!< SCU_INTERRUPT SRRAW: RTC_ATIM1 (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRRAW_RTC_TIM0_Pos (27UL) /*!< SCU_INTERRUPT SRRAW: RTC_TIM0 (Bit 27) */ +#define SCU_INTERRUPT_SRRAW_RTC_TIM0_Msk (0x8000000UL) /*!< SCU_INTERRUPT SRRAW: RTC_TIM0 (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRRAW_RTC_TIM1_Pos (28UL) /*!< SCU_INTERRUPT SRRAW: RTC_TIM1 (Bit 28) */ +#define SCU_INTERRUPT_SRRAW_RTC_TIM1_Msk (0x10000000UL) /*!< SCU_INTERRUPT SRRAW: RTC_TIM1 (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRRAW_RMX_Pos (29UL) /*!< SCU_INTERRUPT SRRAW: RMX (Bit 29) */ +#define SCU_INTERRUPT_SRRAW_RMX_Msk (0x20000000UL) /*!< SCU_INTERRUPT SRRAW: RMX (Bitfield-Mask: 0x01) */ + +/* ----------------------------- SCU_INTERRUPT_SRMSK ---------------------------- */ +#define SCU_INTERRUPT_SRMSK_PRWARN_Pos (0UL) /*!< SCU_INTERRUPT SRMSK: PRWARN (Bit 0) */ +#define SCU_INTERRUPT_SRMSK_PRWARN_Msk (0x1UL) /*!< SCU_INTERRUPT SRMSK: PRWARN (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRMSK_PI_Pos (1UL) /*!< SCU_INTERRUPT SRMSK: PI (Bit 1) */ +#define SCU_INTERRUPT_SRMSK_PI_Msk (0x2UL) /*!< SCU_INTERRUPT SRMSK: PI (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRMSK_AI_Pos (2UL) /*!< SCU_INTERRUPT SRMSK: AI (Bit 2) */ +#define SCU_INTERRUPT_SRMSK_AI_Msk (0x4UL) /*!< SCU_INTERRUPT SRMSK: AI (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRMSK_DLROVR_Pos (3UL) /*!< SCU_INTERRUPT SRMSK: DLROVR (Bit 3) */ +#define SCU_INTERRUPT_SRMSK_DLROVR_Msk (0x8UL) /*!< SCU_INTERRUPT SRMSK: DLROVR (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRMSK_HDCLR_Pos (17UL) /*!< SCU_INTERRUPT SRMSK: HDCLR (Bit 17) */ +#define SCU_INTERRUPT_SRMSK_HDCLR_Msk (0x20000UL) /*!< SCU_INTERRUPT SRMSK: HDCLR (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRMSK_HDSET_Pos (18UL) /*!< SCU_INTERRUPT SRMSK: HDSET (Bit 18) */ +#define SCU_INTERRUPT_SRMSK_HDSET_Msk (0x40000UL) /*!< SCU_INTERRUPT SRMSK: HDSET (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRMSK_HDCR_Pos (19UL) /*!< SCU_INTERRUPT SRMSK: HDCR (Bit 19) */ +#define SCU_INTERRUPT_SRMSK_HDCR_Msk (0x80000UL) /*!< SCU_INTERRUPT SRMSK: HDCR (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRMSK_OSCSICTRL_Pos (21UL) /*!< SCU_INTERRUPT SRMSK: OSCSICTRL (Bit 21) */ +#define SCU_INTERRUPT_SRMSK_OSCSICTRL_Msk (0x200000UL) /*!< SCU_INTERRUPT SRMSK: OSCSICTRL (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRMSK_OSCULCTRL_Pos (23UL) /*!< SCU_INTERRUPT SRMSK: OSCULCTRL (Bit 23) */ +#define SCU_INTERRUPT_SRMSK_OSCULCTRL_Msk (0x800000UL) /*!< SCU_INTERRUPT SRMSK: OSCULCTRL (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRMSK_RTC_CTR_Pos (24UL) /*!< SCU_INTERRUPT SRMSK: RTC_CTR (Bit 24) */ +#define SCU_INTERRUPT_SRMSK_RTC_CTR_Msk (0x1000000UL) /*!< SCU_INTERRUPT SRMSK: RTC_CTR (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRMSK_RTC_ATIM0_Pos (25UL) /*!< SCU_INTERRUPT SRMSK: RTC_ATIM0 (Bit 25) */ +#define SCU_INTERRUPT_SRMSK_RTC_ATIM0_Msk (0x2000000UL) /*!< SCU_INTERRUPT SRMSK: RTC_ATIM0 (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRMSK_RTC_ATIM1_Pos (26UL) /*!< SCU_INTERRUPT SRMSK: RTC_ATIM1 (Bit 26) */ +#define SCU_INTERRUPT_SRMSK_RTC_ATIM1_Msk (0x4000000UL) /*!< SCU_INTERRUPT SRMSK: RTC_ATIM1 (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRMSK_RTC_TIM0_Pos (27UL) /*!< SCU_INTERRUPT SRMSK: RTC_TIM0 (Bit 27) */ +#define SCU_INTERRUPT_SRMSK_RTC_TIM0_Msk (0x8000000UL) /*!< SCU_INTERRUPT SRMSK: RTC_TIM0 (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRMSK_RTC_TIM1_Pos (28UL) /*!< SCU_INTERRUPT SRMSK: RTC_TIM1 (Bit 28) */ +#define SCU_INTERRUPT_SRMSK_RTC_TIM1_Msk (0x10000000UL) /*!< SCU_INTERRUPT SRMSK: RTC_TIM1 (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRMSK_RMX_Pos (29UL) /*!< SCU_INTERRUPT SRMSK: RMX (Bit 29) */ +#define SCU_INTERRUPT_SRMSK_RMX_Msk (0x20000000UL) /*!< SCU_INTERRUPT SRMSK: RMX (Bitfield-Mask: 0x01) */ + +/* ----------------------------- SCU_INTERRUPT_SRCLR ---------------------------- */ +#define SCU_INTERRUPT_SRCLR_PRWARN_Pos (0UL) /*!< SCU_INTERRUPT SRCLR: PRWARN (Bit 0) */ +#define SCU_INTERRUPT_SRCLR_PRWARN_Msk (0x1UL) /*!< SCU_INTERRUPT SRCLR: PRWARN (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRCLR_PI_Pos (1UL) /*!< SCU_INTERRUPT SRCLR: PI (Bit 1) */ +#define SCU_INTERRUPT_SRCLR_PI_Msk (0x2UL) /*!< SCU_INTERRUPT SRCLR: PI (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRCLR_AI_Pos (2UL) /*!< SCU_INTERRUPT SRCLR: AI (Bit 2) */ +#define SCU_INTERRUPT_SRCLR_AI_Msk (0x4UL) /*!< SCU_INTERRUPT SRCLR: AI (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRCLR_DLROVR_Pos (3UL) /*!< SCU_INTERRUPT SRCLR: DLROVR (Bit 3) */ +#define SCU_INTERRUPT_SRCLR_DLROVR_Msk (0x8UL) /*!< SCU_INTERRUPT SRCLR: DLROVR (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRCLR_HDCLR_Pos (17UL) /*!< SCU_INTERRUPT SRCLR: HDCLR (Bit 17) */ +#define SCU_INTERRUPT_SRCLR_HDCLR_Msk (0x20000UL) /*!< SCU_INTERRUPT SRCLR: HDCLR (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRCLR_HDSET_Pos (18UL) /*!< SCU_INTERRUPT SRCLR: HDSET (Bit 18) */ +#define SCU_INTERRUPT_SRCLR_HDSET_Msk (0x40000UL) /*!< SCU_INTERRUPT SRCLR: HDSET (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRCLR_HDCR_Pos (19UL) /*!< SCU_INTERRUPT SRCLR: HDCR (Bit 19) */ +#define SCU_INTERRUPT_SRCLR_HDCR_Msk (0x80000UL) /*!< SCU_INTERRUPT SRCLR: HDCR (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRCLR_OSCSICTRL_Pos (21UL) /*!< SCU_INTERRUPT SRCLR: OSCSICTRL (Bit 21) */ +#define SCU_INTERRUPT_SRCLR_OSCSICTRL_Msk (0x200000UL) /*!< SCU_INTERRUPT SRCLR: OSCSICTRL (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRCLR_OSCULCTRL_Pos (23UL) /*!< SCU_INTERRUPT SRCLR: OSCULCTRL (Bit 23) */ +#define SCU_INTERRUPT_SRCLR_OSCULCTRL_Msk (0x800000UL) /*!< SCU_INTERRUPT SRCLR: OSCULCTRL (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRCLR_RTC_CTR_Pos (24UL) /*!< SCU_INTERRUPT SRCLR: RTC_CTR (Bit 24) */ +#define SCU_INTERRUPT_SRCLR_RTC_CTR_Msk (0x1000000UL) /*!< SCU_INTERRUPT SRCLR: RTC_CTR (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRCLR_RTC_ATIM0_Pos (25UL) /*!< SCU_INTERRUPT SRCLR: RTC_ATIM0 (Bit 25) */ +#define SCU_INTERRUPT_SRCLR_RTC_ATIM0_Msk (0x2000000UL) /*!< SCU_INTERRUPT SRCLR: RTC_ATIM0 (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRCLR_RTC_ATIM1_Pos (26UL) /*!< SCU_INTERRUPT SRCLR: RTC_ATIM1 (Bit 26) */ +#define SCU_INTERRUPT_SRCLR_RTC_ATIM1_Msk (0x4000000UL) /*!< SCU_INTERRUPT SRCLR: RTC_ATIM1 (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRCLR_RTC_TIM0_Pos (27UL) /*!< SCU_INTERRUPT SRCLR: RTC_TIM0 (Bit 27) */ +#define SCU_INTERRUPT_SRCLR_RTC_TIM0_Msk (0x8000000UL) /*!< SCU_INTERRUPT SRCLR: RTC_TIM0 (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRCLR_RTC_TIM1_Pos (28UL) /*!< SCU_INTERRUPT SRCLR: RTC_TIM1 (Bit 28) */ +#define SCU_INTERRUPT_SRCLR_RTC_TIM1_Msk (0x10000000UL) /*!< SCU_INTERRUPT SRCLR: RTC_TIM1 (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRCLR_RMX_Pos (29UL) /*!< SCU_INTERRUPT SRCLR: RMX (Bit 29) */ +#define SCU_INTERRUPT_SRCLR_RMX_Msk (0x20000000UL) /*!< SCU_INTERRUPT SRCLR: RMX (Bitfield-Mask: 0x01) */ + +/* ----------------------------- SCU_INTERRUPT_SRSET ---------------------------- */ +#define SCU_INTERRUPT_SRSET_PRWARN_Pos (0UL) /*!< SCU_INTERRUPT SRSET: PRWARN (Bit 0) */ +#define SCU_INTERRUPT_SRSET_PRWARN_Msk (0x1UL) /*!< SCU_INTERRUPT SRSET: PRWARN (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSET_PI_Pos (1UL) /*!< SCU_INTERRUPT SRSET: PI (Bit 1) */ +#define SCU_INTERRUPT_SRSET_PI_Msk (0x2UL) /*!< SCU_INTERRUPT SRSET: PI (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSET_AI_Pos (2UL) /*!< SCU_INTERRUPT SRSET: AI (Bit 2) */ +#define SCU_INTERRUPT_SRSET_AI_Msk (0x4UL) /*!< SCU_INTERRUPT SRSET: AI (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSET_DLROVR_Pos (3UL) /*!< SCU_INTERRUPT SRSET: DLROVR (Bit 3) */ +#define SCU_INTERRUPT_SRSET_DLROVR_Msk (0x8UL) /*!< SCU_INTERRUPT SRSET: DLROVR (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSET_HDCRCLR_Pos (17UL) /*!< SCU_INTERRUPT SRSET: HDCRCLR (Bit 17) */ +#define SCU_INTERRUPT_SRSET_HDCRCLR_Msk (0x20000UL) /*!< SCU_INTERRUPT SRSET: HDCRCLR (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSET_HDCRSET_Pos (18UL) /*!< SCU_INTERRUPT SRSET: HDCRSET (Bit 18) */ +#define SCU_INTERRUPT_SRSET_HDCRSET_Msk (0x40000UL) /*!< SCU_INTERRUPT SRSET: HDCRSET (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSET_HDCR_Pos (19UL) /*!< SCU_INTERRUPT SRSET: HDCR (Bit 19) */ +#define SCU_INTERRUPT_SRSET_HDCR_Msk (0x80000UL) /*!< SCU_INTERRUPT SRSET: HDCR (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSET_OSCSICTRL_Pos (21UL) /*!< SCU_INTERRUPT SRSET: OSCSICTRL (Bit 21) */ +#define SCU_INTERRUPT_SRSET_OSCSICTRL_Msk (0x200000UL) /*!< SCU_INTERRUPT SRSET: OSCSICTRL (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSET_OSCULCTRL_Pos (23UL) /*!< SCU_INTERRUPT SRSET: OSCULCTRL (Bit 23) */ +#define SCU_INTERRUPT_SRSET_OSCULCTRL_Msk (0x800000UL) /*!< SCU_INTERRUPT SRSET: OSCULCTRL (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSET_RTC_CTR_Pos (24UL) /*!< SCU_INTERRUPT SRSET: RTC_CTR (Bit 24) */ +#define SCU_INTERRUPT_SRSET_RTC_CTR_Msk (0x1000000UL) /*!< SCU_INTERRUPT SRSET: RTC_CTR (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSET_RTC_ATIM0_Pos (25UL) /*!< SCU_INTERRUPT SRSET: RTC_ATIM0 (Bit 25) */ +#define SCU_INTERRUPT_SRSET_RTC_ATIM0_Msk (0x2000000UL) /*!< SCU_INTERRUPT SRSET: RTC_ATIM0 (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSET_RTC_ATIM1_Pos (26UL) /*!< SCU_INTERRUPT SRSET: RTC_ATIM1 (Bit 26) */ +#define SCU_INTERRUPT_SRSET_RTC_ATIM1_Msk (0x4000000UL) /*!< SCU_INTERRUPT SRSET: RTC_ATIM1 (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSET_RTC_TIM0_Pos (27UL) /*!< SCU_INTERRUPT SRSET: RTC_TIM0 (Bit 27) */ +#define SCU_INTERRUPT_SRSET_RTC_TIM0_Msk (0x8000000UL) /*!< SCU_INTERRUPT SRSET: RTC_TIM0 (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSET_RTC_TIM1_Pos (28UL) /*!< SCU_INTERRUPT SRSET: RTC_TIM1 (Bit 28) */ +#define SCU_INTERRUPT_SRSET_RTC_TIM1_Msk (0x10000000UL) /*!< SCU_INTERRUPT SRSET: RTC_TIM1 (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_SRSET_RMX_Pos (29UL) /*!< SCU_INTERRUPT SRSET: RMX (Bit 29) */ +#define SCU_INTERRUPT_SRSET_RMX_Msk (0x20000000UL) /*!< SCU_INTERRUPT SRSET: RMX (Bitfield-Mask: 0x01) */ + +/* --------------------------- SCU_INTERRUPT_NMIREQEN --------------------------- */ +#define SCU_INTERRUPT_NMIREQEN_PRWARN_Pos (0UL) /*!< SCU_INTERRUPT NMIREQEN: PRWARN (Bit 0) */ +#define SCU_INTERRUPT_NMIREQEN_PRWARN_Msk (0x1UL) /*!< SCU_INTERRUPT NMIREQEN: PRWARN (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_NMIREQEN_PI_Pos (1UL) /*!< SCU_INTERRUPT NMIREQEN: PI (Bit 1) */ +#define SCU_INTERRUPT_NMIREQEN_PI_Msk (0x2UL) /*!< SCU_INTERRUPT NMIREQEN: PI (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_NMIREQEN_AI_Pos (2UL) /*!< SCU_INTERRUPT NMIREQEN: AI (Bit 2) */ +#define SCU_INTERRUPT_NMIREQEN_AI_Msk (0x4UL) /*!< SCU_INTERRUPT NMIREQEN: AI (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_NMIREQEN_ERU00_Pos (16UL) /*!< SCU_INTERRUPT NMIREQEN: ERU00 (Bit 16) */ +#define SCU_INTERRUPT_NMIREQEN_ERU00_Msk (0x10000UL) /*!< SCU_INTERRUPT NMIREQEN: ERU00 (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_NMIREQEN_ERU01_Pos (17UL) /*!< SCU_INTERRUPT NMIREQEN: ERU01 (Bit 17) */ +#define SCU_INTERRUPT_NMIREQEN_ERU01_Msk (0x20000UL) /*!< SCU_INTERRUPT NMIREQEN: ERU01 (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_NMIREQEN_ERU02_Pos (18UL) /*!< SCU_INTERRUPT NMIREQEN: ERU02 (Bit 18) */ +#define SCU_INTERRUPT_NMIREQEN_ERU02_Msk (0x40000UL) /*!< SCU_INTERRUPT NMIREQEN: ERU02 (Bitfield-Mask: 0x01) */ +#define SCU_INTERRUPT_NMIREQEN_ERU03_Pos (19UL) /*!< SCU_INTERRUPT NMIREQEN: ERU03 (Bit 19) */ +#define SCU_INTERRUPT_NMIREQEN_ERU03_Msk (0x80000UL) /*!< SCU_INTERRUPT NMIREQEN: ERU03 (Bitfield-Mask: 0x01) */ + + +/* ================================================================================ */ +/* ================ struct 'SCU_PARITY' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ------------------------------- SCU_PARITY_PEEN ------------------------------ */ +#define SCU_PARITY_PEEN_PEENPS_Pos (0UL) /*!< SCU_PARITY PEEN: PEENPS (Bit 0) */ +#define SCU_PARITY_PEEN_PEENPS_Msk (0x1UL) /*!< SCU_PARITY PEEN: PEENPS (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PEEN_PEENDS1_Pos (1UL) /*!< SCU_PARITY PEEN: PEENDS1 (Bit 1) */ +#define SCU_PARITY_PEEN_PEENDS1_Msk (0x2UL) /*!< SCU_PARITY PEEN: PEENDS1 (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PEEN_PEENDS2_Pos (2UL) /*!< SCU_PARITY PEEN: PEENDS2 (Bit 2) */ +#define SCU_PARITY_PEEN_PEENDS2_Msk (0x4UL) /*!< SCU_PARITY PEEN: PEENDS2 (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PEEN_PEENU0_Pos (8UL) /*!< SCU_PARITY PEEN: PEENU0 (Bit 8) */ +#define SCU_PARITY_PEEN_PEENU0_Msk (0x100UL) /*!< SCU_PARITY PEEN: PEENU0 (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PEEN_PEENU1_Pos (9UL) /*!< SCU_PARITY PEEN: PEENU1 (Bit 9) */ +#define SCU_PARITY_PEEN_PEENU1_Msk (0x200UL) /*!< SCU_PARITY PEEN: PEENU1 (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PEEN_PEENU2_Pos (10UL) /*!< SCU_PARITY PEEN: PEENU2 (Bit 10) */ +#define SCU_PARITY_PEEN_PEENU2_Msk (0x400UL) /*!< SCU_PARITY PEEN: PEENU2 (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PEEN_PEENMC_Pos (12UL) /*!< SCU_PARITY PEEN: PEENMC (Bit 12) */ +#define SCU_PARITY_PEEN_PEENMC_Msk (0x1000UL) /*!< SCU_PARITY PEEN: PEENMC (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PEEN_PEENPPRF_Pos (13UL) /*!< SCU_PARITY PEEN: PEENPPRF (Bit 13) */ +#define SCU_PARITY_PEEN_PEENPPRF_Msk (0x2000UL) /*!< SCU_PARITY PEEN: PEENPPRF (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PEEN_PEENUSB_Pos (16UL) /*!< SCU_PARITY PEEN: PEENUSB (Bit 16) */ +#define SCU_PARITY_PEEN_PEENUSB_Msk (0x10000UL) /*!< SCU_PARITY PEEN: PEENUSB (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PEEN_PEENETH0TX_Pos (17UL) /*!< SCU_PARITY PEEN: PEENETH0TX (Bit 17) */ +#define SCU_PARITY_PEEN_PEENETH0TX_Msk (0x20000UL) /*!< SCU_PARITY PEEN: PEENETH0TX (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PEEN_PEENETH0RX_Pos (18UL) /*!< SCU_PARITY PEEN: PEENETH0RX (Bit 18) */ +#define SCU_PARITY_PEEN_PEENETH0RX_Msk (0x40000UL) /*!< SCU_PARITY PEEN: PEENETH0RX (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PEEN_PEENSD0_Pos (19UL) /*!< SCU_PARITY PEEN: PEENSD0 (Bit 19) */ +#define SCU_PARITY_PEEN_PEENSD0_Msk (0x80000UL) /*!< SCU_PARITY PEEN: PEENSD0 (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PEEN_PEENSD1_Pos (20UL) /*!< SCU_PARITY PEEN: PEENSD1 (Bit 20) */ +#define SCU_PARITY_PEEN_PEENSD1_Msk (0x100000UL) /*!< SCU_PARITY PEEN: PEENSD1 (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PEEN_PEENECAT0_Pos (24UL) /*!< SCU_PARITY PEEN: PEENECAT0 (Bit 24) */ +#define SCU_PARITY_PEEN_PEENECAT0_Msk (0x1000000UL) /*!< SCU_PARITY PEEN: PEENECAT0 (Bitfield-Mask: 0x01) */ + +/* ----------------------------- SCU_PARITY_MCHKCON ----------------------------- */ +#define SCU_PARITY_MCHKCON_SELPS_Pos (0UL) /*!< SCU_PARITY MCHKCON: SELPS (Bit 0) */ +#define SCU_PARITY_MCHKCON_SELPS_Msk (0x1UL) /*!< SCU_PARITY MCHKCON: SELPS (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_MCHKCON_SELDS1_Pos (1UL) /*!< SCU_PARITY MCHKCON: SELDS1 (Bit 1) */ +#define SCU_PARITY_MCHKCON_SELDS1_Msk (0x2UL) /*!< SCU_PARITY MCHKCON: SELDS1 (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_MCHKCON_SELDS2_Pos (2UL) /*!< SCU_PARITY MCHKCON: SELDS2 (Bit 2) */ +#define SCU_PARITY_MCHKCON_SELDS2_Msk (0x4UL) /*!< SCU_PARITY MCHKCON: SELDS2 (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_MCHKCON_USIC0DRA_Pos (8UL) /*!< SCU_PARITY MCHKCON: USIC0DRA (Bit 8) */ +#define SCU_PARITY_MCHKCON_USIC0DRA_Msk (0x100UL) /*!< SCU_PARITY MCHKCON: USIC0DRA (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_MCHKCON_USIC1DRA_Pos (9UL) /*!< SCU_PARITY MCHKCON: USIC1DRA (Bit 9) */ +#define SCU_PARITY_MCHKCON_USIC1DRA_Msk (0x200UL) /*!< SCU_PARITY MCHKCON: USIC1DRA (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_MCHKCON_USIC2DRA_Pos (10UL) /*!< SCU_PARITY MCHKCON: USIC2DRA (Bit 10) */ +#define SCU_PARITY_MCHKCON_USIC2DRA_Msk (0x400UL) /*!< SCU_PARITY MCHKCON: USIC2DRA (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_MCHKCON_MCANDRA_Pos (12UL) /*!< SCU_PARITY MCHKCON: MCANDRA (Bit 12) */ +#define SCU_PARITY_MCHKCON_MCANDRA_Msk (0x1000UL) /*!< SCU_PARITY MCHKCON: MCANDRA (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_MCHKCON_PPRFDRA_Pos (13UL) /*!< SCU_PARITY MCHKCON: PPRFDRA (Bit 13) */ +#define SCU_PARITY_MCHKCON_PPRFDRA_Msk (0x2000UL) /*!< SCU_PARITY MCHKCON: PPRFDRA (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_MCHKCON_SELUSB_Pos (16UL) /*!< SCU_PARITY MCHKCON: SELUSB (Bit 16) */ +#define SCU_PARITY_MCHKCON_SELUSB_Msk (0x10000UL) /*!< SCU_PARITY MCHKCON: SELUSB (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_MCHKCON_SELETH0TX_Pos (17UL) /*!< SCU_PARITY MCHKCON: SELETH0TX (Bit 17) */ +#define SCU_PARITY_MCHKCON_SELETH0TX_Msk (0x20000UL) /*!< SCU_PARITY MCHKCON: SELETH0TX (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_MCHKCON_SELETH0RX_Pos (18UL) /*!< SCU_PARITY MCHKCON: SELETH0RX (Bit 18) */ +#define SCU_PARITY_MCHKCON_SELETH0RX_Msk (0x40000UL) /*!< SCU_PARITY MCHKCON: SELETH0RX (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_MCHKCON_SELSD0_Pos (19UL) /*!< SCU_PARITY MCHKCON: SELSD0 (Bit 19) */ +#define SCU_PARITY_MCHKCON_SELSD0_Msk (0x80000UL) /*!< SCU_PARITY MCHKCON: SELSD0 (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_MCHKCON_SELSD1_Pos (20UL) /*!< SCU_PARITY MCHKCON: SELSD1 (Bit 20) */ +#define SCU_PARITY_MCHKCON_SELSD1_Msk (0x100000UL) /*!< SCU_PARITY MCHKCON: SELSD1 (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_MCHKCON_SELECAT0_Pos (24UL) /*!< SCU_PARITY MCHKCON: SELECAT0 (Bit 24) */ +#define SCU_PARITY_MCHKCON_SELECAT0_Msk (0x1000000UL) /*!< SCU_PARITY MCHKCON: SELECAT0 (Bitfield-Mask: 0x01) */ + +/* ------------------------------- SCU_PARITY_PETE ------------------------------ */ +#define SCU_PARITY_PETE_PETEPS_Pos (0UL) /*!< SCU_PARITY PETE: PETEPS (Bit 0) */ +#define SCU_PARITY_PETE_PETEPS_Msk (0x1UL) /*!< SCU_PARITY PETE: PETEPS (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PETE_PETEDS1_Pos (1UL) /*!< SCU_PARITY PETE: PETEDS1 (Bit 1) */ +#define SCU_PARITY_PETE_PETEDS1_Msk (0x2UL) /*!< SCU_PARITY PETE: PETEDS1 (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PETE_PETEDS2_Pos (2UL) /*!< SCU_PARITY PETE: PETEDS2 (Bit 2) */ +#define SCU_PARITY_PETE_PETEDS2_Msk (0x4UL) /*!< SCU_PARITY PETE: PETEDS2 (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PETE_PETEU0_Pos (8UL) /*!< SCU_PARITY PETE: PETEU0 (Bit 8) */ +#define SCU_PARITY_PETE_PETEU0_Msk (0x100UL) /*!< SCU_PARITY PETE: PETEU0 (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PETE_PETEU1_Pos (9UL) /*!< SCU_PARITY PETE: PETEU1 (Bit 9) */ +#define SCU_PARITY_PETE_PETEU1_Msk (0x200UL) /*!< SCU_PARITY PETE: PETEU1 (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PETE_PETEU2_Pos (10UL) /*!< SCU_PARITY PETE: PETEU2 (Bit 10) */ +#define SCU_PARITY_PETE_PETEU2_Msk (0x400UL) /*!< SCU_PARITY PETE: PETEU2 (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PETE_PETEMC_Pos (12UL) /*!< SCU_PARITY PETE: PETEMC (Bit 12) */ +#define SCU_PARITY_PETE_PETEMC_Msk (0x1000UL) /*!< SCU_PARITY PETE: PETEMC (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PETE_PETEPPRF_Pos (13UL) /*!< SCU_PARITY PETE: PETEPPRF (Bit 13) */ +#define SCU_PARITY_PETE_PETEPPRF_Msk (0x2000UL) /*!< SCU_PARITY PETE: PETEPPRF (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PETE_PETEUSB_Pos (16UL) /*!< SCU_PARITY PETE: PETEUSB (Bit 16) */ +#define SCU_PARITY_PETE_PETEUSB_Msk (0x10000UL) /*!< SCU_PARITY PETE: PETEUSB (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PETE_PETEETH0TX_Pos (17UL) /*!< SCU_PARITY PETE: PETEETH0TX (Bit 17) */ +#define SCU_PARITY_PETE_PETEETH0TX_Msk (0x20000UL) /*!< SCU_PARITY PETE: PETEETH0TX (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PETE_PETEETH0RX_Pos (18UL) /*!< SCU_PARITY PETE: PETEETH0RX (Bit 18) */ +#define SCU_PARITY_PETE_PETEETH0RX_Msk (0x40000UL) /*!< SCU_PARITY PETE: PETEETH0RX (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PETE_PETESD0_Pos (19UL) /*!< SCU_PARITY PETE: PETESD0 (Bit 19) */ +#define SCU_PARITY_PETE_PETESD0_Msk (0x80000UL) /*!< SCU_PARITY PETE: PETESD0 (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PETE_PETESD1_Pos (20UL) /*!< SCU_PARITY PETE: PETESD1 (Bit 20) */ +#define SCU_PARITY_PETE_PETESD1_Msk (0x100000UL) /*!< SCU_PARITY PETE: PETESD1 (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PETE_PETEECAT0_Pos (24UL) /*!< SCU_PARITY PETE: PETEECAT0 (Bit 24) */ +#define SCU_PARITY_PETE_PETEECAT0_Msk (0x1000000UL) /*!< SCU_PARITY PETE: PETEECAT0 (Bitfield-Mask: 0x01) */ + +/* ----------------------------- SCU_PARITY_PERSTEN ----------------------------- */ +#define SCU_PARITY_PERSTEN_RSEN_Pos (0UL) /*!< SCU_PARITY PERSTEN: RSEN (Bit 0) */ +#define SCU_PARITY_PERSTEN_RSEN_Msk (0x1UL) /*!< SCU_PARITY PERSTEN: RSEN (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_PARITY_PEFLAG ----------------------------- */ +#define SCU_PARITY_PEFLAG_PEFPS_Pos (0UL) /*!< SCU_PARITY PEFLAG: PEFPS (Bit 0) */ +#define SCU_PARITY_PEFLAG_PEFPS_Msk (0x1UL) /*!< SCU_PARITY PEFLAG: PEFPS (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PEFLAG_PEFDS1_Pos (1UL) /*!< SCU_PARITY PEFLAG: PEFDS1 (Bit 1) */ +#define SCU_PARITY_PEFLAG_PEFDS1_Msk (0x2UL) /*!< SCU_PARITY PEFLAG: PEFDS1 (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PEFLAG_PEFDS2_Pos (2UL) /*!< SCU_PARITY PEFLAG: PEFDS2 (Bit 2) */ +#define SCU_PARITY_PEFLAG_PEFDS2_Msk (0x4UL) /*!< SCU_PARITY PEFLAG: PEFDS2 (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PEFLAG_PEFU0_Pos (8UL) /*!< SCU_PARITY PEFLAG: PEFU0 (Bit 8) */ +#define SCU_PARITY_PEFLAG_PEFU0_Msk (0x100UL) /*!< SCU_PARITY PEFLAG: PEFU0 (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PEFLAG_PEFU1_Pos (9UL) /*!< SCU_PARITY PEFLAG: PEFU1 (Bit 9) */ +#define SCU_PARITY_PEFLAG_PEFU1_Msk (0x200UL) /*!< SCU_PARITY PEFLAG: PEFU1 (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PEFLAG_PEFU2_Pos (10UL) /*!< SCU_PARITY PEFLAG: PEFU2 (Bit 10) */ +#define SCU_PARITY_PEFLAG_PEFU2_Msk (0x400UL) /*!< SCU_PARITY PEFLAG: PEFU2 (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PEFLAG_PEFMC_Pos (12UL) /*!< SCU_PARITY PEFLAG: PEFMC (Bit 12) */ +#define SCU_PARITY_PEFLAG_PEFMC_Msk (0x1000UL) /*!< SCU_PARITY PEFLAG: PEFMC (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PEFLAG_PEFPPRF_Pos (13UL) /*!< SCU_PARITY PEFLAG: PEFPPRF (Bit 13) */ +#define SCU_PARITY_PEFLAG_PEFPPRF_Msk (0x2000UL) /*!< SCU_PARITY PEFLAG: PEFPPRF (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PEFLAG_PEUSB_Pos (16UL) /*!< SCU_PARITY PEFLAG: PEUSB (Bit 16) */ +#define SCU_PARITY_PEFLAG_PEUSB_Msk (0x10000UL) /*!< SCU_PARITY PEFLAG: PEUSB (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PEFLAG_PEETH0TX_Pos (17UL) /*!< SCU_PARITY PEFLAG: PEETH0TX (Bit 17) */ +#define SCU_PARITY_PEFLAG_PEETH0TX_Msk (0x20000UL) /*!< SCU_PARITY PEFLAG: PEETH0TX (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PEFLAG_PEETH0RX_Pos (18UL) /*!< SCU_PARITY PEFLAG: PEETH0RX (Bit 18) */ +#define SCU_PARITY_PEFLAG_PEETH0RX_Msk (0x40000UL) /*!< SCU_PARITY PEFLAG: PEETH0RX (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PEFLAG_PESD0_Pos (19UL) /*!< SCU_PARITY PEFLAG: PESD0 (Bit 19) */ +#define SCU_PARITY_PEFLAG_PESD0_Msk (0x80000UL) /*!< SCU_PARITY PEFLAG: PESD0 (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PEFLAG_PESD1_Pos (20UL) /*!< SCU_PARITY PEFLAG: PESD1 (Bit 20) */ +#define SCU_PARITY_PEFLAG_PESD1_Msk (0x100000UL) /*!< SCU_PARITY PEFLAG: PESD1 (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PEFLAG_PEECAT0_Pos (24UL) /*!< SCU_PARITY PEFLAG: PEECAT0 (Bit 24) */ +#define SCU_PARITY_PEFLAG_PEECAT0_Msk (0x1000000UL) /*!< SCU_PARITY PEFLAG: PEECAT0 (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_PARITY_PMTPR ------------------------------ */ +#define SCU_PARITY_PMTPR_PWR_Pos (0UL) /*!< SCU_PARITY PMTPR: PWR (Bit 0) */ +#define SCU_PARITY_PMTPR_PWR_Msk (0xffUL) /*!< SCU_PARITY PMTPR: PWR (Bitfield-Mask: 0xff) */ +#define SCU_PARITY_PMTPR_PRD_Pos (8UL) /*!< SCU_PARITY PMTPR: PRD (Bit 8) */ +#define SCU_PARITY_PMTPR_PRD_Msk (0xff00UL) /*!< SCU_PARITY PMTPR: PRD (Bitfield-Mask: 0xff) */ + +/* ------------------------------ SCU_PARITY_PMTSR ------------------------------ */ +#define SCU_PARITY_PMTSR_MTENPS_Pos (0UL) /*!< SCU_PARITY PMTSR: MTENPS (Bit 0) */ +#define SCU_PARITY_PMTSR_MTENPS_Msk (0x1UL) /*!< SCU_PARITY PMTSR: MTENPS (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PMTSR_MTENDS1_Pos (1UL) /*!< SCU_PARITY PMTSR: MTENDS1 (Bit 1) */ +#define SCU_PARITY_PMTSR_MTENDS1_Msk (0x2UL) /*!< SCU_PARITY PMTSR: MTENDS1 (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PMTSR_MTENDS2_Pos (2UL) /*!< SCU_PARITY PMTSR: MTENDS2 (Bit 2) */ +#define SCU_PARITY_PMTSR_MTENDS2_Msk (0x4UL) /*!< SCU_PARITY PMTSR: MTENDS2 (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PMTSR_MTEU0_Pos (8UL) /*!< SCU_PARITY PMTSR: MTEU0 (Bit 8) */ +#define SCU_PARITY_PMTSR_MTEU0_Msk (0x100UL) /*!< SCU_PARITY PMTSR: MTEU0 (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PMTSR_MTEU1_Pos (9UL) /*!< SCU_PARITY PMTSR: MTEU1 (Bit 9) */ +#define SCU_PARITY_PMTSR_MTEU1_Msk (0x200UL) /*!< SCU_PARITY PMTSR: MTEU1 (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PMTSR_MTEU2_Pos (10UL) /*!< SCU_PARITY PMTSR: MTEU2 (Bit 10) */ +#define SCU_PARITY_PMTSR_MTEU2_Msk (0x400UL) /*!< SCU_PARITY PMTSR: MTEU2 (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PMTSR_MTEMC_Pos (12UL) /*!< SCU_PARITY PMTSR: MTEMC (Bit 12) */ +#define SCU_PARITY_PMTSR_MTEMC_Msk (0x1000UL) /*!< SCU_PARITY PMTSR: MTEMC (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PMTSR_MTEPPRF_Pos (13UL) /*!< SCU_PARITY PMTSR: MTEPPRF (Bit 13) */ +#define SCU_PARITY_PMTSR_MTEPPRF_Msk (0x2000UL) /*!< SCU_PARITY PMTSR: MTEPPRF (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PMTSR_MTUSB_Pos (16UL) /*!< SCU_PARITY PMTSR: MTUSB (Bit 16) */ +#define SCU_PARITY_PMTSR_MTUSB_Msk (0x10000UL) /*!< SCU_PARITY PMTSR: MTUSB (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PMTSR_MTETH0TX_Pos (17UL) /*!< SCU_PARITY PMTSR: MTETH0TX (Bit 17) */ +#define SCU_PARITY_PMTSR_MTETH0TX_Msk (0x20000UL) /*!< SCU_PARITY PMTSR: MTETH0TX (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PMTSR_MTETH0RX_Pos (18UL) /*!< SCU_PARITY PMTSR: MTETH0RX (Bit 18) */ +#define SCU_PARITY_PMTSR_MTETH0RX_Msk (0x40000UL) /*!< SCU_PARITY PMTSR: MTETH0RX (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PMTSR_MTSD0_Pos (19UL) /*!< SCU_PARITY PMTSR: MTSD0 (Bit 19) */ +#define SCU_PARITY_PMTSR_MTSD0_Msk (0x80000UL) /*!< SCU_PARITY PMTSR: MTSD0 (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PMTSR_MTSD1_Pos (20UL) /*!< SCU_PARITY PMTSR: MTSD1 (Bit 20) */ +#define SCU_PARITY_PMTSR_MTSD1_Msk (0x100000UL) /*!< SCU_PARITY PMTSR: MTSD1 (Bitfield-Mask: 0x01) */ +#define SCU_PARITY_PMTSR_MTECAT0_Pos (24UL) /*!< SCU_PARITY PMTSR: MTECAT0 (Bit 24) */ +#define SCU_PARITY_PMTSR_MTECAT0_Msk (0x1000000UL) /*!< SCU_PARITY PMTSR: MTECAT0 (Bitfield-Mask: 0x01) */ + + +/* ================================================================================ */ +/* ================ struct 'SCU_TRAP' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ------------------------------ SCU_TRAP_TRAPSTAT ----------------------------- */ +#define SCU_TRAP_TRAPSTAT_SOSCWDGT_Pos (0UL) /*!< SCU_TRAP TRAPSTAT: SOSCWDGT (Bit 0) */ +#define SCU_TRAP_TRAPSTAT_SOSCWDGT_Msk (0x1UL) /*!< SCU_TRAP TRAPSTAT: SOSCWDGT (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPSTAT_SVCOLCKT_Pos (2UL) /*!< SCU_TRAP TRAPSTAT: SVCOLCKT (Bit 2) */ +#define SCU_TRAP_TRAPSTAT_SVCOLCKT_Msk (0x4UL) /*!< SCU_TRAP TRAPSTAT: SVCOLCKT (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPSTAT_UVCOLCKT_Pos (3UL) /*!< SCU_TRAP TRAPSTAT: UVCOLCKT (Bit 3) */ +#define SCU_TRAP_TRAPSTAT_UVCOLCKT_Msk (0x8UL) /*!< SCU_TRAP TRAPSTAT: UVCOLCKT (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPSTAT_PET_Pos (4UL) /*!< SCU_TRAP TRAPSTAT: PET (Bit 4) */ +#define SCU_TRAP_TRAPSTAT_PET_Msk (0x10UL) /*!< SCU_TRAP TRAPSTAT: PET (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPSTAT_BRWNT_Pos (5UL) /*!< SCU_TRAP TRAPSTAT: BRWNT (Bit 5) */ +#define SCU_TRAP_TRAPSTAT_BRWNT_Msk (0x20UL) /*!< SCU_TRAP TRAPSTAT: BRWNT (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPSTAT_ULPWDGT_Pos (6UL) /*!< SCU_TRAP TRAPSTAT: ULPWDGT (Bit 6) */ +#define SCU_TRAP_TRAPSTAT_ULPWDGT_Msk (0x40UL) /*!< SCU_TRAP TRAPSTAT: ULPWDGT (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPSTAT_BWERR0T_Pos (7UL) /*!< SCU_TRAP TRAPSTAT: BWERR0T (Bit 7) */ +#define SCU_TRAP_TRAPSTAT_BWERR0T_Msk (0x80UL) /*!< SCU_TRAP TRAPSTAT: BWERR0T (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPSTAT_BWERR1T_Pos (8UL) /*!< SCU_TRAP TRAPSTAT: BWERR1T (Bit 8) */ +#define SCU_TRAP_TRAPSTAT_BWERR1T_Msk (0x100UL) /*!< SCU_TRAP TRAPSTAT: BWERR1T (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPSTAT_ECAT0RST_Pos (16UL) /*!< SCU_TRAP TRAPSTAT: ECAT0RST (Bit 16) */ +#define SCU_TRAP_TRAPSTAT_ECAT0RST_Msk (0x10000UL) /*!< SCU_TRAP TRAPSTAT: ECAT0RST (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_TRAP_TRAPRAW ------------------------------ */ +#define SCU_TRAP_TRAPRAW_SOSCWDGT_Pos (0UL) /*!< SCU_TRAP TRAPRAW: SOSCWDGT (Bit 0) */ +#define SCU_TRAP_TRAPRAW_SOSCWDGT_Msk (0x1UL) /*!< SCU_TRAP TRAPRAW: SOSCWDGT (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPRAW_SVCOLCKT_Pos (2UL) /*!< SCU_TRAP TRAPRAW: SVCOLCKT (Bit 2) */ +#define SCU_TRAP_TRAPRAW_SVCOLCKT_Msk (0x4UL) /*!< SCU_TRAP TRAPRAW: SVCOLCKT (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPRAW_UVCOLCKT_Pos (3UL) /*!< SCU_TRAP TRAPRAW: UVCOLCKT (Bit 3) */ +#define SCU_TRAP_TRAPRAW_UVCOLCKT_Msk (0x8UL) /*!< SCU_TRAP TRAPRAW: UVCOLCKT (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPRAW_PET_Pos (4UL) /*!< SCU_TRAP TRAPRAW: PET (Bit 4) */ +#define SCU_TRAP_TRAPRAW_PET_Msk (0x10UL) /*!< SCU_TRAP TRAPRAW: PET (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPRAW_BRWNT_Pos (5UL) /*!< SCU_TRAP TRAPRAW: BRWNT (Bit 5) */ +#define SCU_TRAP_TRAPRAW_BRWNT_Msk (0x20UL) /*!< SCU_TRAP TRAPRAW: BRWNT (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPRAW_ULPWDGT_Pos (6UL) /*!< SCU_TRAP TRAPRAW: ULPWDGT (Bit 6) */ +#define SCU_TRAP_TRAPRAW_ULPWDGT_Msk (0x40UL) /*!< SCU_TRAP TRAPRAW: ULPWDGT (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPRAW_BWERR0T_Pos (7UL) /*!< SCU_TRAP TRAPRAW: BWERR0T (Bit 7) */ +#define SCU_TRAP_TRAPRAW_BWERR0T_Msk (0x80UL) /*!< SCU_TRAP TRAPRAW: BWERR0T (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPRAW_BWERR1T_Pos (8UL) /*!< SCU_TRAP TRAPRAW: BWERR1T (Bit 8) */ +#define SCU_TRAP_TRAPRAW_BWERR1T_Msk (0x100UL) /*!< SCU_TRAP TRAPRAW: BWERR1T (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPRAW_ECAT0RST_Pos (16UL) /*!< SCU_TRAP TRAPRAW: ECAT0RST (Bit 16) */ +#define SCU_TRAP_TRAPRAW_ECAT0RST_Msk (0x10000UL) /*!< SCU_TRAP TRAPRAW: ECAT0RST (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_TRAP_TRAPDIS ------------------------------ */ +#define SCU_TRAP_TRAPDIS_SOSCWDGT_Pos (0UL) /*!< SCU_TRAP TRAPDIS: SOSCWDGT (Bit 0) */ +#define SCU_TRAP_TRAPDIS_SOSCWDGT_Msk (0x1UL) /*!< SCU_TRAP TRAPDIS: SOSCWDGT (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPDIS_SVCOLCKT_Pos (2UL) /*!< SCU_TRAP TRAPDIS: SVCOLCKT (Bit 2) */ +#define SCU_TRAP_TRAPDIS_SVCOLCKT_Msk (0x4UL) /*!< SCU_TRAP TRAPDIS: SVCOLCKT (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPDIS_UVCOLCKT_Pos (3UL) /*!< SCU_TRAP TRAPDIS: UVCOLCKT (Bit 3) */ +#define SCU_TRAP_TRAPDIS_UVCOLCKT_Msk (0x8UL) /*!< SCU_TRAP TRAPDIS: UVCOLCKT (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPDIS_PET_Pos (4UL) /*!< SCU_TRAP TRAPDIS: PET (Bit 4) */ +#define SCU_TRAP_TRAPDIS_PET_Msk (0x10UL) /*!< SCU_TRAP TRAPDIS: PET (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPDIS_BRWNT_Pos (5UL) /*!< SCU_TRAP TRAPDIS: BRWNT (Bit 5) */ +#define SCU_TRAP_TRAPDIS_BRWNT_Msk (0x20UL) /*!< SCU_TRAP TRAPDIS: BRWNT (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPDIS_ULPWDGT_Pos (6UL) /*!< SCU_TRAP TRAPDIS: ULPWDGT (Bit 6) */ +#define SCU_TRAP_TRAPDIS_ULPWDGT_Msk (0x40UL) /*!< SCU_TRAP TRAPDIS: ULPWDGT (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPDIS_BWERR0T_Pos (7UL) /*!< SCU_TRAP TRAPDIS: BWERR0T (Bit 7) */ +#define SCU_TRAP_TRAPDIS_BWERR0T_Msk (0x80UL) /*!< SCU_TRAP TRAPDIS: BWERR0T (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPDIS_BWERR1T_Pos (8UL) /*!< SCU_TRAP TRAPDIS: BWERR1T (Bit 8) */ +#define SCU_TRAP_TRAPDIS_BWERR1T_Msk (0x100UL) /*!< SCU_TRAP TRAPDIS: BWERR1T (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPDIS_ECAT0RST_Pos (16UL) /*!< SCU_TRAP TRAPDIS: ECAT0RST (Bit 16) */ +#define SCU_TRAP_TRAPDIS_ECAT0RST_Msk (0x10000UL) /*!< SCU_TRAP TRAPDIS: ECAT0RST (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_TRAP_TRAPCLR ------------------------------ */ +#define SCU_TRAP_TRAPCLR_SOSCWDGT_Pos (0UL) /*!< SCU_TRAP TRAPCLR: SOSCWDGT (Bit 0) */ +#define SCU_TRAP_TRAPCLR_SOSCWDGT_Msk (0x1UL) /*!< SCU_TRAP TRAPCLR: SOSCWDGT (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPCLR_SVCOLCKT_Pos (2UL) /*!< SCU_TRAP TRAPCLR: SVCOLCKT (Bit 2) */ +#define SCU_TRAP_TRAPCLR_SVCOLCKT_Msk (0x4UL) /*!< SCU_TRAP TRAPCLR: SVCOLCKT (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPCLR_UVCOLCKT_Pos (3UL) /*!< SCU_TRAP TRAPCLR: UVCOLCKT (Bit 3) */ +#define SCU_TRAP_TRAPCLR_UVCOLCKT_Msk (0x8UL) /*!< SCU_TRAP TRAPCLR: UVCOLCKT (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPCLR_PET_Pos (4UL) /*!< SCU_TRAP TRAPCLR: PET (Bit 4) */ +#define SCU_TRAP_TRAPCLR_PET_Msk (0x10UL) /*!< SCU_TRAP TRAPCLR: PET (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPCLR_BRWNT_Pos (5UL) /*!< SCU_TRAP TRAPCLR: BRWNT (Bit 5) */ +#define SCU_TRAP_TRAPCLR_BRWNT_Msk (0x20UL) /*!< SCU_TRAP TRAPCLR: BRWNT (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPCLR_ULPWDGT_Pos (6UL) /*!< SCU_TRAP TRAPCLR: ULPWDGT (Bit 6) */ +#define SCU_TRAP_TRAPCLR_ULPWDGT_Msk (0x40UL) /*!< SCU_TRAP TRAPCLR: ULPWDGT (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPCLR_BWERR0T_Pos (7UL) /*!< SCU_TRAP TRAPCLR: BWERR0T (Bit 7) */ +#define SCU_TRAP_TRAPCLR_BWERR0T_Msk (0x80UL) /*!< SCU_TRAP TRAPCLR: BWERR0T (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPCLR_BWERR1T_Pos (8UL) /*!< SCU_TRAP TRAPCLR: BWERR1T (Bit 8) */ +#define SCU_TRAP_TRAPCLR_BWERR1T_Msk (0x100UL) /*!< SCU_TRAP TRAPCLR: BWERR1T (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPCLR_ECAT0RST_Pos (16UL) /*!< SCU_TRAP TRAPCLR: ECAT0RST (Bit 16) */ +#define SCU_TRAP_TRAPCLR_ECAT0RST_Msk (0x10000UL) /*!< SCU_TRAP TRAPCLR: ECAT0RST (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_TRAP_TRAPSET ------------------------------ */ +#define SCU_TRAP_TRAPSET_SOSCWDGT_Pos (0UL) /*!< SCU_TRAP TRAPSET: SOSCWDGT (Bit 0) */ +#define SCU_TRAP_TRAPSET_SOSCWDGT_Msk (0x1UL) /*!< SCU_TRAP TRAPSET: SOSCWDGT (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPSET_SVCOLCKT_Pos (2UL) /*!< SCU_TRAP TRAPSET: SVCOLCKT (Bit 2) */ +#define SCU_TRAP_TRAPSET_SVCOLCKT_Msk (0x4UL) /*!< SCU_TRAP TRAPSET: SVCOLCKT (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPSET_UVCOLCKT_Pos (3UL) /*!< SCU_TRAP TRAPSET: UVCOLCKT (Bit 3) */ +#define SCU_TRAP_TRAPSET_UVCOLCKT_Msk (0x8UL) /*!< SCU_TRAP TRAPSET: UVCOLCKT (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPSET_PET_Pos (4UL) /*!< SCU_TRAP TRAPSET: PET (Bit 4) */ +#define SCU_TRAP_TRAPSET_PET_Msk (0x10UL) /*!< SCU_TRAP TRAPSET: PET (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPSET_BRWNT_Pos (5UL) /*!< SCU_TRAP TRAPSET: BRWNT (Bit 5) */ +#define SCU_TRAP_TRAPSET_BRWNT_Msk (0x20UL) /*!< SCU_TRAP TRAPSET: BRWNT (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPSET_ULPWDT_Pos (6UL) /*!< SCU_TRAP TRAPSET: ULPWDT (Bit 6) */ +#define SCU_TRAP_TRAPSET_ULPWDT_Msk (0x40UL) /*!< SCU_TRAP TRAPSET: ULPWDT (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPSET_BWERR0T_Pos (7UL) /*!< SCU_TRAP TRAPSET: BWERR0T (Bit 7) */ +#define SCU_TRAP_TRAPSET_BWERR0T_Msk (0x80UL) /*!< SCU_TRAP TRAPSET: BWERR0T (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPSET_BWERR1T_Pos (8UL) /*!< SCU_TRAP TRAPSET: BWERR1T (Bit 8) */ +#define SCU_TRAP_TRAPSET_BWERR1T_Msk (0x100UL) /*!< SCU_TRAP TRAPSET: BWERR1T (Bitfield-Mask: 0x01) */ +#define SCU_TRAP_TRAPSET_ECAT0RST_Pos (16UL) /*!< SCU_TRAP TRAPSET: ECAT0RST (Bit 16) */ +#define SCU_TRAP_TRAPSET_ECAT0RST_Msk (0x10000UL) /*!< SCU_TRAP TRAPSET: ECAT0RST (Bitfield-Mask: 0x01) */ + + +/* ================================================================================ */ +/* ================ struct 'SCU_HIBERNATE' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ---------------------------- SCU_HIBERNATE_HDSTAT ---------------------------- */ +#define SCU_HIBERNATE_HDSTAT_EPEV_Pos (0UL) /*!< SCU_HIBERNATE HDSTAT: EPEV (Bit 0) */ +#define SCU_HIBERNATE_HDSTAT_EPEV_Msk (0x1UL) /*!< SCU_HIBERNATE HDSTAT: EPEV (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HDSTAT_ENEV_Pos (1UL) /*!< SCU_HIBERNATE HDSTAT: ENEV (Bit 1) */ +#define SCU_HIBERNATE_HDSTAT_ENEV_Msk (0x2UL) /*!< SCU_HIBERNATE HDSTAT: ENEV (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HDSTAT_RTCEV_Pos (2UL) /*!< SCU_HIBERNATE HDSTAT: RTCEV (Bit 2) */ +#define SCU_HIBERNATE_HDSTAT_RTCEV_Msk (0x4UL) /*!< SCU_HIBERNATE HDSTAT: RTCEV (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HDSTAT_ULPWDG_Pos (3UL) /*!< SCU_HIBERNATE HDSTAT: ULPWDG (Bit 3) */ +#define SCU_HIBERNATE_HDSTAT_ULPWDG_Msk (0x8UL) /*!< SCU_HIBERNATE HDSTAT: ULPWDG (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HDSTAT_HIBNOUT_Pos (4UL) /*!< SCU_HIBERNATE HDSTAT: HIBNOUT (Bit 4) */ +#define SCU_HIBERNATE_HDSTAT_HIBNOUT_Msk (0x10UL) /*!< SCU_HIBERNATE HDSTAT: HIBNOUT (Bitfield-Mask: 0x01) */ + +/* ----------------------------- SCU_HIBERNATE_HDCLR ---------------------------- */ +#define SCU_HIBERNATE_HDCLR_EPEV_Pos (0UL) /*!< SCU_HIBERNATE HDCLR: EPEV (Bit 0) */ +#define SCU_HIBERNATE_HDCLR_EPEV_Msk (0x1UL) /*!< SCU_HIBERNATE HDCLR: EPEV (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HDCLR_ENEV_Pos (1UL) /*!< SCU_HIBERNATE HDCLR: ENEV (Bit 1) */ +#define SCU_HIBERNATE_HDCLR_ENEV_Msk (0x2UL) /*!< SCU_HIBERNATE HDCLR: ENEV (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HDCLR_RTCEV_Pos (2UL) /*!< SCU_HIBERNATE HDCLR: RTCEV (Bit 2) */ +#define SCU_HIBERNATE_HDCLR_RTCEV_Msk (0x4UL) /*!< SCU_HIBERNATE HDCLR: RTCEV (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HDCLR_ULPWDG_Pos (3UL) /*!< SCU_HIBERNATE HDCLR: ULPWDG (Bit 3) */ +#define SCU_HIBERNATE_HDCLR_ULPWDG_Msk (0x8UL) /*!< SCU_HIBERNATE HDCLR: ULPWDG (Bitfield-Mask: 0x01) */ + +/* ----------------------------- SCU_HIBERNATE_HDSET ---------------------------- */ +#define SCU_HIBERNATE_HDSET_EPEV_Pos (0UL) /*!< SCU_HIBERNATE HDSET: EPEV (Bit 0) */ +#define SCU_HIBERNATE_HDSET_EPEV_Msk (0x1UL) /*!< SCU_HIBERNATE HDSET: EPEV (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HDSET_ENEV_Pos (1UL) /*!< SCU_HIBERNATE HDSET: ENEV (Bit 1) */ +#define SCU_HIBERNATE_HDSET_ENEV_Msk (0x2UL) /*!< SCU_HIBERNATE HDSET: ENEV (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HDSET_RTCEV_Pos (2UL) /*!< SCU_HIBERNATE HDSET: RTCEV (Bit 2) */ +#define SCU_HIBERNATE_HDSET_RTCEV_Msk (0x4UL) /*!< SCU_HIBERNATE HDSET: RTCEV (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HDSET_ULPWDG_Pos (3UL) /*!< SCU_HIBERNATE HDSET: ULPWDG (Bit 3) */ +#define SCU_HIBERNATE_HDSET_ULPWDG_Msk (0x8UL) /*!< SCU_HIBERNATE HDSET: ULPWDG (Bitfield-Mask: 0x01) */ + +/* ----------------------------- SCU_HIBERNATE_HDCR ----------------------------- */ +#define SCU_HIBERNATE_HDCR_WKPEP_Pos (0UL) /*!< SCU_HIBERNATE HDCR: WKPEP (Bit 0) */ +#define SCU_HIBERNATE_HDCR_WKPEP_Msk (0x1UL) /*!< SCU_HIBERNATE HDCR: WKPEP (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HDCR_WKPEN_Pos (1UL) /*!< SCU_HIBERNATE HDCR: WKPEN (Bit 1) */ +#define SCU_HIBERNATE_HDCR_WKPEN_Msk (0x2UL) /*!< SCU_HIBERNATE HDCR: WKPEN (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HDCR_RTCE_Pos (2UL) /*!< SCU_HIBERNATE HDCR: RTCE (Bit 2) */ +#define SCU_HIBERNATE_HDCR_RTCE_Msk (0x4UL) /*!< SCU_HIBERNATE HDCR: RTCE (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HDCR_ULPWDGEN_Pos (3UL) /*!< SCU_HIBERNATE HDCR: ULPWDGEN (Bit 3) */ +#define SCU_HIBERNATE_HDCR_ULPWDGEN_Msk (0x8UL) /*!< SCU_HIBERNATE HDCR: ULPWDGEN (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HDCR_HIB_Pos (4UL) /*!< SCU_HIBERNATE HDCR: HIB (Bit 4) */ +#define SCU_HIBERNATE_HDCR_HIB_Msk (0x10UL) /*!< SCU_HIBERNATE HDCR: HIB (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HDCR_RCS_Pos (6UL) /*!< SCU_HIBERNATE HDCR: RCS (Bit 6) */ +#define SCU_HIBERNATE_HDCR_RCS_Msk (0x40UL) /*!< SCU_HIBERNATE HDCR: RCS (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HDCR_STDBYSEL_Pos (7UL) /*!< SCU_HIBERNATE HDCR: STDBYSEL (Bit 7) */ +#define SCU_HIBERNATE_HDCR_STDBYSEL_Msk (0x80UL) /*!< SCU_HIBERNATE HDCR: STDBYSEL (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HDCR_WKUPSEL_Pos (8UL) /*!< SCU_HIBERNATE HDCR: WKUPSEL (Bit 8) */ +#define SCU_HIBERNATE_HDCR_WKUPSEL_Msk (0x100UL) /*!< SCU_HIBERNATE HDCR: WKUPSEL (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HDCR_GPI0SEL_Pos (10UL) /*!< SCU_HIBERNATE HDCR: GPI0SEL (Bit 10) */ +#define SCU_HIBERNATE_HDCR_GPI0SEL_Msk (0x400UL) /*!< SCU_HIBERNATE HDCR: GPI0SEL (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HDCR_HIBIO0POL_Pos (12UL) /*!< SCU_HIBERNATE HDCR: HIBIO0POL (Bit 12) */ +#define SCU_HIBERNATE_HDCR_HIBIO0POL_Msk (0x1000UL) /*!< SCU_HIBERNATE HDCR: HIBIO0POL (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HDCR_HIBIO1POL_Pos (13UL) /*!< SCU_HIBERNATE HDCR: HIBIO1POL (Bit 13) */ +#define SCU_HIBERNATE_HDCR_HIBIO1POL_Msk (0x2000UL) /*!< SCU_HIBERNATE HDCR: HIBIO1POL (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_HDCR_HIBIO0SEL_Pos (16UL) /*!< SCU_HIBERNATE HDCR: HIBIO0SEL (Bit 16) */ +#define SCU_HIBERNATE_HDCR_HIBIO0SEL_Msk (0xf0000UL) /*!< SCU_HIBERNATE HDCR: HIBIO0SEL (Bitfield-Mask: 0x0f) */ +#define SCU_HIBERNATE_HDCR_HIBIO1SEL_Pos (20UL) /*!< SCU_HIBERNATE HDCR: HIBIO1SEL (Bit 20) */ +#define SCU_HIBERNATE_HDCR_HIBIO1SEL_Msk (0xf00000UL) /*!< SCU_HIBERNATE HDCR: HIBIO1SEL (Bitfield-Mask: 0x0f) */ + +/* --------------------------- SCU_HIBERNATE_OSCSICTRL -------------------------- */ +#define SCU_HIBERNATE_OSCSICTRL_PWD_Pos (0UL) /*!< SCU_HIBERNATE OSCSICTRL: PWD (Bit 0) */ +#define SCU_HIBERNATE_OSCSICTRL_PWD_Msk (0x1UL) /*!< SCU_HIBERNATE OSCSICTRL: PWD (Bitfield-Mask: 0x01) */ + +/* --------------------------- SCU_HIBERNATE_OSCULSTAT -------------------------- */ +#define SCU_HIBERNATE_OSCULSTAT_X1D_Pos (0UL) /*!< SCU_HIBERNATE OSCULSTAT: X1D (Bit 0) */ +#define SCU_HIBERNATE_OSCULSTAT_X1D_Msk (0x1UL) /*!< SCU_HIBERNATE OSCULSTAT: X1D (Bitfield-Mask: 0x01) */ + +/* --------------------------- SCU_HIBERNATE_OSCULCTRL -------------------------- */ +#define SCU_HIBERNATE_OSCULCTRL_X1DEN_Pos (0UL) /*!< SCU_HIBERNATE OSCULCTRL: X1DEN (Bit 0) */ +#define SCU_HIBERNATE_OSCULCTRL_X1DEN_Msk (0x1UL) /*!< SCU_HIBERNATE OSCULCTRL: X1DEN (Bitfield-Mask: 0x01) */ +#define SCU_HIBERNATE_OSCULCTRL_MODE_Pos (4UL) /*!< SCU_HIBERNATE OSCULCTRL: MODE (Bit 4) */ +#define SCU_HIBERNATE_OSCULCTRL_MODE_Msk (0x30UL) /*!< SCU_HIBERNATE OSCULCTRL: MODE (Bitfield-Mask: 0x03) */ + + +/* ================================================================================ */ +/* ================ struct 'SCU_POWER' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ------------------------------ SCU_POWER_PWRSTAT ----------------------------- */ +#define SCU_POWER_PWRSTAT_HIBEN_Pos (0UL) /*!< SCU_POWER PWRSTAT: HIBEN (Bit 0) */ +#define SCU_POWER_PWRSTAT_HIBEN_Msk (0x1UL) /*!< SCU_POWER PWRSTAT: HIBEN (Bitfield-Mask: 0x01) */ +#define SCU_POWER_PWRSTAT_USBPHYPDQ_Pos (16UL) /*!< SCU_POWER PWRSTAT: USBPHYPDQ (Bit 16) */ +#define SCU_POWER_PWRSTAT_USBPHYPDQ_Msk (0x10000UL) /*!< SCU_POWER PWRSTAT: USBPHYPDQ (Bitfield-Mask: 0x01) */ +#define SCU_POWER_PWRSTAT_USBOTGEN_Pos (17UL) /*!< SCU_POWER PWRSTAT: USBOTGEN (Bit 17) */ +#define SCU_POWER_PWRSTAT_USBOTGEN_Msk (0x20000UL) /*!< SCU_POWER PWRSTAT: USBOTGEN (Bitfield-Mask: 0x01) */ +#define SCU_POWER_PWRSTAT_USBPUWQ_Pos (18UL) /*!< SCU_POWER PWRSTAT: USBPUWQ (Bit 18) */ +#define SCU_POWER_PWRSTAT_USBPUWQ_Msk (0x40000UL) /*!< SCU_POWER PWRSTAT: USBPUWQ (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_POWER_PWRSET ------------------------------ */ +#define SCU_POWER_PWRSET_HIB_Pos (0UL) /*!< SCU_POWER PWRSET: HIB (Bit 0) */ +#define SCU_POWER_PWRSET_HIB_Msk (0x1UL) /*!< SCU_POWER PWRSET: HIB (Bitfield-Mask: 0x01) */ +#define SCU_POWER_PWRSET_USBPHYPDQ_Pos (16UL) /*!< SCU_POWER PWRSET: USBPHYPDQ (Bit 16) */ +#define SCU_POWER_PWRSET_USBPHYPDQ_Msk (0x10000UL) /*!< SCU_POWER PWRSET: USBPHYPDQ (Bitfield-Mask: 0x01) */ +#define SCU_POWER_PWRSET_USBOTGEN_Pos (17UL) /*!< SCU_POWER PWRSET: USBOTGEN (Bit 17) */ +#define SCU_POWER_PWRSET_USBOTGEN_Msk (0x20000UL) /*!< SCU_POWER PWRSET: USBOTGEN (Bitfield-Mask: 0x01) */ +#define SCU_POWER_PWRSET_USBPUWQ_Pos (18UL) /*!< SCU_POWER PWRSET: USBPUWQ (Bit 18) */ +#define SCU_POWER_PWRSET_USBPUWQ_Msk (0x40000UL) /*!< SCU_POWER PWRSET: USBPUWQ (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_POWER_PWRCLR ------------------------------ */ +#define SCU_POWER_PWRCLR_HIB_Pos (0UL) /*!< SCU_POWER PWRCLR: HIB (Bit 0) */ +#define SCU_POWER_PWRCLR_HIB_Msk (0x1UL) /*!< SCU_POWER PWRCLR: HIB (Bitfield-Mask: 0x01) */ +#define SCU_POWER_PWRCLR_USBPHYPDQ_Pos (16UL) /*!< SCU_POWER PWRCLR: USBPHYPDQ (Bit 16) */ +#define SCU_POWER_PWRCLR_USBPHYPDQ_Msk (0x10000UL) /*!< SCU_POWER PWRCLR: USBPHYPDQ (Bitfield-Mask: 0x01) */ +#define SCU_POWER_PWRCLR_USBOTGEN_Pos (17UL) /*!< SCU_POWER PWRCLR: USBOTGEN (Bit 17) */ +#define SCU_POWER_PWRCLR_USBOTGEN_Msk (0x20000UL) /*!< SCU_POWER PWRCLR: USBOTGEN (Bitfield-Mask: 0x01) */ +#define SCU_POWER_PWRCLR_USBPUWQ_Pos (18UL) /*!< SCU_POWER PWRCLR: USBPUWQ (Bit 18) */ +#define SCU_POWER_PWRCLR_USBPUWQ_Msk (0x40000UL) /*!< SCU_POWER PWRCLR: USBPUWQ (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_POWER_EVRSTAT ----------------------------- */ +#define SCU_POWER_EVRSTAT_OV13_Pos (1UL) /*!< SCU_POWER EVRSTAT: OV13 (Bit 1) */ +#define SCU_POWER_EVRSTAT_OV13_Msk (0x2UL) /*!< SCU_POWER EVRSTAT: OV13 (Bitfield-Mask: 0x01) */ + +/* ---------------------------- SCU_POWER_EVRVADCSTAT --------------------------- */ +#define SCU_POWER_EVRVADCSTAT_VADC13V_Pos (0UL) /*!< SCU_POWER EVRVADCSTAT: VADC13V (Bit 0) */ +#define SCU_POWER_EVRVADCSTAT_VADC13V_Msk (0xffUL) /*!< SCU_POWER EVRVADCSTAT: VADC13V (Bitfield-Mask: 0xff) */ +#define SCU_POWER_EVRVADCSTAT_VADC33V_Pos (8UL) /*!< SCU_POWER EVRVADCSTAT: VADC33V (Bit 8) */ +#define SCU_POWER_EVRVADCSTAT_VADC33V_Msk (0xff00UL) /*!< SCU_POWER EVRVADCSTAT: VADC33V (Bitfield-Mask: 0xff) */ + +/* ------------------------------ SCU_POWER_PWRMON ------------------------------ */ +#define SCU_POWER_PWRMON_THRS_Pos (0UL) /*!< SCU_POWER PWRMON: THRS (Bit 0) */ +#define SCU_POWER_PWRMON_THRS_Msk (0xffUL) /*!< SCU_POWER PWRMON: THRS (Bitfield-Mask: 0xff) */ +#define SCU_POWER_PWRMON_INTV_Pos (8UL) /*!< SCU_POWER PWRMON: INTV (Bit 8) */ +#define SCU_POWER_PWRMON_INTV_Msk (0xff00UL) /*!< SCU_POWER PWRMON: INTV (Bitfield-Mask: 0xff) */ +#define SCU_POWER_PWRMON_ENB_Pos (16UL) /*!< SCU_POWER PWRMON: ENB (Bit 16) */ +#define SCU_POWER_PWRMON_ENB_Msk (0x10000UL) /*!< SCU_POWER PWRMON: ENB (Bitfield-Mask: 0x01) */ + + +/* ================================================================================ */ +/* ================ struct 'SCU_RESET' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ------------------------------ SCU_RESET_RSTSTAT ----------------------------- */ +#define SCU_RESET_RSTSTAT_RSTSTAT_Pos (0UL) /*!< SCU_RESET RSTSTAT: RSTSTAT (Bit 0) */ +#define SCU_RESET_RSTSTAT_RSTSTAT_Msk (0xffUL) /*!< SCU_RESET RSTSTAT: RSTSTAT (Bitfield-Mask: 0xff) */ +#define SCU_RESET_RSTSTAT_HIBWK_Pos (8UL) /*!< SCU_RESET RSTSTAT: HIBWK (Bit 8) */ +#define SCU_RESET_RSTSTAT_HIBWK_Msk (0x100UL) /*!< SCU_RESET RSTSTAT: HIBWK (Bitfield-Mask: 0x01) */ +#define SCU_RESET_RSTSTAT_HIBRS_Pos (9UL) /*!< SCU_RESET RSTSTAT: HIBRS (Bit 9) */ +#define SCU_RESET_RSTSTAT_HIBRS_Msk (0x200UL) /*!< SCU_RESET RSTSTAT: HIBRS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_RSTSTAT_LCKEN_Pos (10UL) /*!< SCU_RESET RSTSTAT: LCKEN (Bit 10) */ +#define SCU_RESET_RSTSTAT_LCKEN_Msk (0x400UL) /*!< SCU_RESET RSTSTAT: LCKEN (Bitfield-Mask: 0x01) */ +#define SCU_RESET_RSTSTAT_ECAT0RS_Pos (12UL) /*!< SCU_RESET RSTSTAT: ECAT0RS (Bit 12) */ +#define SCU_RESET_RSTSTAT_ECAT0RS_Msk (0x1000UL) /*!< SCU_RESET RSTSTAT: ECAT0RS (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_RESET_RSTSET ------------------------------ */ +#define SCU_RESET_RSTSET_HIBWK_Pos (8UL) /*!< SCU_RESET RSTSET: HIBWK (Bit 8) */ +#define SCU_RESET_RSTSET_HIBWK_Msk (0x100UL) /*!< SCU_RESET RSTSET: HIBWK (Bitfield-Mask: 0x01) */ +#define SCU_RESET_RSTSET_HIBRS_Pos (9UL) /*!< SCU_RESET RSTSET: HIBRS (Bit 9) */ +#define SCU_RESET_RSTSET_HIBRS_Msk (0x200UL) /*!< SCU_RESET RSTSET: HIBRS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_RSTSET_LCKEN_Pos (10UL) /*!< SCU_RESET RSTSET: LCKEN (Bit 10) */ +#define SCU_RESET_RSTSET_LCKEN_Msk (0x400UL) /*!< SCU_RESET RSTSET: LCKEN (Bitfield-Mask: 0x01) */ +#define SCU_RESET_RSTSET_ECAT0RS_Pos (12UL) /*!< SCU_RESET RSTSET: ECAT0RS (Bit 12) */ +#define SCU_RESET_RSTSET_ECAT0RS_Msk (0x1000UL) /*!< SCU_RESET RSTSET: ECAT0RS (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_RESET_RSTCLR ------------------------------ */ +#define SCU_RESET_RSTCLR_RSCLR_Pos (0UL) /*!< SCU_RESET RSTCLR: RSCLR (Bit 0) */ +#define SCU_RESET_RSTCLR_RSCLR_Msk (0x1UL) /*!< SCU_RESET RSTCLR: RSCLR (Bitfield-Mask: 0x01) */ +#define SCU_RESET_RSTCLR_HIBWK_Pos (8UL) /*!< SCU_RESET RSTCLR: HIBWK (Bit 8) */ +#define SCU_RESET_RSTCLR_HIBWK_Msk (0x100UL) /*!< SCU_RESET RSTCLR: HIBWK (Bitfield-Mask: 0x01) */ +#define SCU_RESET_RSTCLR_HIBRS_Pos (9UL) /*!< SCU_RESET RSTCLR: HIBRS (Bit 9) */ +#define SCU_RESET_RSTCLR_HIBRS_Msk (0x200UL) /*!< SCU_RESET RSTCLR: HIBRS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_RSTCLR_LCKEN_Pos (10UL) /*!< SCU_RESET RSTCLR: LCKEN (Bit 10) */ +#define SCU_RESET_RSTCLR_LCKEN_Msk (0x400UL) /*!< SCU_RESET RSTCLR: LCKEN (Bitfield-Mask: 0x01) */ +#define SCU_RESET_RSTCLR_ECAT0RS_Pos (12UL) /*!< SCU_RESET RSTCLR: ECAT0RS (Bit 12) */ +#define SCU_RESET_RSTCLR_ECAT0RS_Msk (0x1000UL) /*!< SCU_RESET RSTCLR: ECAT0RS (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_RESET_PRSTAT0 ----------------------------- */ +#define SCU_RESET_PRSTAT0_VADCRS_Pos (0UL) /*!< SCU_RESET PRSTAT0: VADCRS (Bit 0) */ +#define SCU_RESET_PRSTAT0_VADCRS_Msk (0x1UL) /*!< SCU_RESET PRSTAT0: VADCRS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSTAT0_DSDRS_Pos (1UL) /*!< SCU_RESET PRSTAT0: DSDRS (Bit 1) */ +#define SCU_RESET_PRSTAT0_DSDRS_Msk (0x2UL) /*!< SCU_RESET PRSTAT0: DSDRS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSTAT0_CCU40RS_Pos (2UL) /*!< SCU_RESET PRSTAT0: CCU40RS (Bit 2) */ +#define SCU_RESET_PRSTAT0_CCU40RS_Msk (0x4UL) /*!< SCU_RESET PRSTAT0: CCU40RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSTAT0_CCU41RS_Pos (3UL) /*!< SCU_RESET PRSTAT0: CCU41RS (Bit 3) */ +#define SCU_RESET_PRSTAT0_CCU41RS_Msk (0x8UL) /*!< SCU_RESET PRSTAT0: CCU41RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSTAT0_CCU42RS_Pos (4UL) /*!< SCU_RESET PRSTAT0: CCU42RS (Bit 4) */ +#define SCU_RESET_PRSTAT0_CCU42RS_Msk (0x10UL) /*!< SCU_RESET PRSTAT0: CCU42RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSTAT0_CCU80RS_Pos (7UL) /*!< SCU_RESET PRSTAT0: CCU80RS (Bit 7) */ +#define SCU_RESET_PRSTAT0_CCU80RS_Msk (0x80UL) /*!< SCU_RESET PRSTAT0: CCU80RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSTAT0_CCU81RS_Pos (8UL) /*!< SCU_RESET PRSTAT0: CCU81RS (Bit 8) */ +#define SCU_RESET_PRSTAT0_CCU81RS_Msk (0x100UL) /*!< SCU_RESET PRSTAT0: CCU81RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSTAT0_POSIF0RS_Pos (9UL) /*!< SCU_RESET PRSTAT0: POSIF0RS (Bit 9) */ +#define SCU_RESET_PRSTAT0_POSIF0RS_Msk (0x200UL) /*!< SCU_RESET PRSTAT0: POSIF0RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSTAT0_POSIF1RS_Pos (10UL) /*!< SCU_RESET PRSTAT0: POSIF1RS (Bit 10) */ +#define SCU_RESET_PRSTAT0_POSIF1RS_Msk (0x400UL) /*!< SCU_RESET PRSTAT0: POSIF1RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSTAT0_USIC0RS_Pos (11UL) /*!< SCU_RESET PRSTAT0: USIC0RS (Bit 11) */ +#define SCU_RESET_PRSTAT0_USIC0RS_Msk (0x800UL) /*!< SCU_RESET PRSTAT0: USIC0RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSTAT0_ERU1RS_Pos (16UL) /*!< SCU_RESET PRSTAT0: ERU1RS (Bit 16) */ +#define SCU_RESET_PRSTAT0_ERU1RS_Msk (0x10000UL) /*!< SCU_RESET PRSTAT0: ERU1RS (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_RESET_PRSET0 ------------------------------ */ +#define SCU_RESET_PRSET0_VADCRS_Pos (0UL) /*!< SCU_RESET PRSET0: VADCRS (Bit 0) */ +#define SCU_RESET_PRSET0_VADCRS_Msk (0x1UL) /*!< SCU_RESET PRSET0: VADCRS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSET0_DSDRS_Pos (1UL) /*!< SCU_RESET PRSET0: DSDRS (Bit 1) */ +#define SCU_RESET_PRSET0_DSDRS_Msk (0x2UL) /*!< SCU_RESET PRSET0: DSDRS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSET0_CCU40RS_Pos (2UL) /*!< SCU_RESET PRSET0: CCU40RS (Bit 2) */ +#define SCU_RESET_PRSET0_CCU40RS_Msk (0x4UL) /*!< SCU_RESET PRSET0: CCU40RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSET0_CCU41RS_Pos (3UL) /*!< SCU_RESET PRSET0: CCU41RS (Bit 3) */ +#define SCU_RESET_PRSET0_CCU41RS_Msk (0x8UL) /*!< SCU_RESET PRSET0: CCU41RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSET0_CCU42RS_Pos (4UL) /*!< SCU_RESET PRSET0: CCU42RS (Bit 4) */ +#define SCU_RESET_PRSET0_CCU42RS_Msk (0x10UL) /*!< SCU_RESET PRSET0: CCU42RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSET0_CCU80RS_Pos (7UL) /*!< SCU_RESET PRSET0: CCU80RS (Bit 7) */ +#define SCU_RESET_PRSET0_CCU80RS_Msk (0x80UL) /*!< SCU_RESET PRSET0: CCU80RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSET0_CCU81RS_Pos (8UL) /*!< SCU_RESET PRSET0: CCU81RS (Bit 8) */ +#define SCU_RESET_PRSET0_CCU81RS_Msk (0x100UL) /*!< SCU_RESET PRSET0: CCU81RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSET0_POSIF0RS_Pos (9UL) /*!< SCU_RESET PRSET0: POSIF0RS (Bit 9) */ +#define SCU_RESET_PRSET0_POSIF0RS_Msk (0x200UL) /*!< SCU_RESET PRSET0: POSIF0RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSET0_POSIF1RS_Pos (10UL) /*!< SCU_RESET PRSET0: POSIF1RS (Bit 10) */ +#define SCU_RESET_PRSET0_POSIF1RS_Msk (0x400UL) /*!< SCU_RESET PRSET0: POSIF1RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSET0_USIC0RS_Pos (11UL) /*!< SCU_RESET PRSET0: USIC0RS (Bit 11) */ +#define SCU_RESET_PRSET0_USIC0RS_Msk (0x800UL) /*!< SCU_RESET PRSET0: USIC0RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSET0_ERU1RS_Pos (16UL) /*!< SCU_RESET PRSET0: ERU1RS (Bit 16) */ +#define SCU_RESET_PRSET0_ERU1RS_Msk (0x10000UL) /*!< SCU_RESET PRSET0: ERU1RS (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_RESET_PRCLR0 ------------------------------ */ +#define SCU_RESET_PRCLR0_VADCRS_Pos (0UL) /*!< SCU_RESET PRCLR0: VADCRS (Bit 0) */ +#define SCU_RESET_PRCLR0_VADCRS_Msk (0x1UL) /*!< SCU_RESET PRCLR0: VADCRS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRCLR0_DSDRS_Pos (1UL) /*!< SCU_RESET PRCLR0: DSDRS (Bit 1) */ +#define SCU_RESET_PRCLR0_DSDRS_Msk (0x2UL) /*!< SCU_RESET PRCLR0: DSDRS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRCLR0_CCU40RS_Pos (2UL) /*!< SCU_RESET PRCLR0: CCU40RS (Bit 2) */ +#define SCU_RESET_PRCLR0_CCU40RS_Msk (0x4UL) /*!< SCU_RESET PRCLR0: CCU40RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRCLR0_CCU41RS_Pos (3UL) /*!< SCU_RESET PRCLR0: CCU41RS (Bit 3) */ +#define SCU_RESET_PRCLR0_CCU41RS_Msk (0x8UL) /*!< SCU_RESET PRCLR0: CCU41RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRCLR0_CCU42RS_Pos (4UL) /*!< SCU_RESET PRCLR0: CCU42RS (Bit 4) */ +#define SCU_RESET_PRCLR0_CCU42RS_Msk (0x10UL) /*!< SCU_RESET PRCLR0: CCU42RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRCLR0_CCU80RS_Pos (7UL) /*!< SCU_RESET PRCLR0: CCU80RS (Bit 7) */ +#define SCU_RESET_PRCLR0_CCU80RS_Msk (0x80UL) /*!< SCU_RESET PRCLR0: CCU80RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRCLR0_CCU81RS_Pos (8UL) /*!< SCU_RESET PRCLR0: CCU81RS (Bit 8) */ +#define SCU_RESET_PRCLR0_CCU81RS_Msk (0x100UL) /*!< SCU_RESET PRCLR0: CCU81RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRCLR0_POSIF0RS_Pos (9UL) /*!< SCU_RESET PRCLR0: POSIF0RS (Bit 9) */ +#define SCU_RESET_PRCLR0_POSIF0RS_Msk (0x200UL) /*!< SCU_RESET PRCLR0: POSIF0RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRCLR0_POSIF1RS_Pos (10UL) /*!< SCU_RESET PRCLR0: POSIF1RS (Bit 10) */ +#define SCU_RESET_PRCLR0_POSIF1RS_Msk (0x400UL) /*!< SCU_RESET PRCLR0: POSIF1RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRCLR0_USIC0RS_Pos (11UL) /*!< SCU_RESET PRCLR0: USIC0RS (Bit 11) */ +#define SCU_RESET_PRCLR0_USIC0RS_Msk (0x800UL) /*!< SCU_RESET PRCLR0: USIC0RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRCLR0_ERU1RS_Pos (16UL) /*!< SCU_RESET PRCLR0: ERU1RS (Bit 16) */ +#define SCU_RESET_PRCLR0_ERU1RS_Msk (0x10000UL) /*!< SCU_RESET PRCLR0: ERU1RS (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_RESET_PRSTAT1 ----------------------------- */ +#define SCU_RESET_PRSTAT1_CCU43RS_Pos (0UL) /*!< SCU_RESET PRSTAT1: CCU43RS (Bit 0) */ +#define SCU_RESET_PRSTAT1_CCU43RS_Msk (0x1UL) /*!< SCU_RESET PRSTAT1: CCU43RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSTAT1_LEDTSCU0RS_Pos (3UL) /*!< SCU_RESET PRSTAT1: LEDTSCU0RS (Bit 3) */ +#define SCU_RESET_PRSTAT1_LEDTSCU0RS_Msk (0x8UL) /*!< SCU_RESET PRSTAT1: LEDTSCU0RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSTAT1_MCAN0RS_Pos (4UL) /*!< SCU_RESET PRSTAT1: MCAN0RS (Bit 4) */ +#define SCU_RESET_PRSTAT1_MCAN0RS_Msk (0x10UL) /*!< SCU_RESET PRSTAT1: MCAN0RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSTAT1_DACRS_Pos (5UL) /*!< SCU_RESET PRSTAT1: DACRS (Bit 5) */ +#define SCU_RESET_PRSTAT1_DACRS_Msk (0x20UL) /*!< SCU_RESET PRSTAT1: DACRS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSTAT1_MMCIRS_Pos (6UL) /*!< SCU_RESET PRSTAT1: MMCIRS (Bit 6) */ +#define SCU_RESET_PRSTAT1_MMCIRS_Msk (0x40UL) /*!< SCU_RESET PRSTAT1: MMCIRS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSTAT1_USIC1RS_Pos (7UL) /*!< SCU_RESET PRSTAT1: USIC1RS (Bit 7) */ +#define SCU_RESET_PRSTAT1_USIC1RS_Msk (0x80UL) /*!< SCU_RESET PRSTAT1: USIC1RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSTAT1_USIC2RS_Pos (8UL) /*!< SCU_RESET PRSTAT1: USIC2RS (Bit 8) */ +#define SCU_RESET_PRSTAT1_USIC2RS_Msk (0x100UL) /*!< SCU_RESET PRSTAT1: USIC2RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSTAT1_PPORTSRS_Pos (9UL) /*!< SCU_RESET PRSTAT1: PPORTSRS (Bit 9) */ +#define SCU_RESET_PRSTAT1_PPORTSRS_Msk (0x200UL) /*!< SCU_RESET PRSTAT1: PPORTSRS (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_RESET_PRSET1 ------------------------------ */ +#define SCU_RESET_PRSET1_CCU43RS_Pos (0UL) /*!< SCU_RESET PRSET1: CCU43RS (Bit 0) */ +#define SCU_RESET_PRSET1_CCU43RS_Msk (0x1UL) /*!< SCU_RESET PRSET1: CCU43RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSET1_LEDTSCU0RS_Pos (3UL) /*!< SCU_RESET PRSET1: LEDTSCU0RS (Bit 3) */ +#define SCU_RESET_PRSET1_LEDTSCU0RS_Msk (0x8UL) /*!< SCU_RESET PRSET1: LEDTSCU0RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSET1_MCAN0RS_Pos (4UL) /*!< SCU_RESET PRSET1: MCAN0RS (Bit 4) */ +#define SCU_RESET_PRSET1_MCAN0RS_Msk (0x10UL) /*!< SCU_RESET PRSET1: MCAN0RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSET1_DACRS_Pos (5UL) /*!< SCU_RESET PRSET1: DACRS (Bit 5) */ +#define SCU_RESET_PRSET1_DACRS_Msk (0x20UL) /*!< SCU_RESET PRSET1: DACRS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSET1_MMCIRS_Pos (6UL) /*!< SCU_RESET PRSET1: MMCIRS (Bit 6) */ +#define SCU_RESET_PRSET1_MMCIRS_Msk (0x40UL) /*!< SCU_RESET PRSET1: MMCIRS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSET1_USIC1RS_Pos (7UL) /*!< SCU_RESET PRSET1: USIC1RS (Bit 7) */ +#define SCU_RESET_PRSET1_USIC1RS_Msk (0x80UL) /*!< SCU_RESET PRSET1: USIC1RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSET1_USIC2RS_Pos (8UL) /*!< SCU_RESET PRSET1: USIC2RS (Bit 8) */ +#define SCU_RESET_PRSET1_USIC2RS_Msk (0x100UL) /*!< SCU_RESET PRSET1: USIC2RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSET1_PPORTSRS_Pos (9UL) /*!< SCU_RESET PRSET1: PPORTSRS (Bit 9) */ +#define SCU_RESET_PRSET1_PPORTSRS_Msk (0x200UL) /*!< SCU_RESET PRSET1: PPORTSRS (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_RESET_PRCLR1 ------------------------------ */ +#define SCU_RESET_PRCLR1_CCU43RS_Pos (0UL) /*!< SCU_RESET PRCLR1: CCU43RS (Bit 0) */ +#define SCU_RESET_PRCLR1_CCU43RS_Msk (0x1UL) /*!< SCU_RESET PRCLR1: CCU43RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRCLR1_LEDTSCU0RS_Pos (3UL) /*!< SCU_RESET PRCLR1: LEDTSCU0RS (Bit 3) */ +#define SCU_RESET_PRCLR1_LEDTSCU0RS_Msk (0x8UL) /*!< SCU_RESET PRCLR1: LEDTSCU0RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRCLR1_MCAN0RS_Pos (4UL) /*!< SCU_RESET PRCLR1: MCAN0RS (Bit 4) */ +#define SCU_RESET_PRCLR1_MCAN0RS_Msk (0x10UL) /*!< SCU_RESET PRCLR1: MCAN0RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRCLR1_DACRS_Pos (5UL) /*!< SCU_RESET PRCLR1: DACRS (Bit 5) */ +#define SCU_RESET_PRCLR1_DACRS_Msk (0x20UL) /*!< SCU_RESET PRCLR1: DACRS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRCLR1_MMCIRS_Pos (6UL) /*!< SCU_RESET PRCLR1: MMCIRS (Bit 6) */ +#define SCU_RESET_PRCLR1_MMCIRS_Msk (0x40UL) /*!< SCU_RESET PRCLR1: MMCIRS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRCLR1_USIC1RS_Pos (7UL) /*!< SCU_RESET PRCLR1: USIC1RS (Bit 7) */ +#define SCU_RESET_PRCLR1_USIC1RS_Msk (0x80UL) /*!< SCU_RESET PRCLR1: USIC1RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRCLR1_USIC2RS_Pos (8UL) /*!< SCU_RESET PRCLR1: USIC2RS (Bit 8) */ +#define SCU_RESET_PRCLR1_USIC2RS_Msk (0x100UL) /*!< SCU_RESET PRCLR1: USIC2RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRCLR1_PPORTSRS_Pos (9UL) /*!< SCU_RESET PRCLR1: PPORTSRS (Bit 9) */ +#define SCU_RESET_PRCLR1_PPORTSRS_Msk (0x200UL) /*!< SCU_RESET PRCLR1: PPORTSRS (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_RESET_PRSTAT2 ----------------------------- */ +#define SCU_RESET_PRSTAT2_WDTRS_Pos (1UL) /*!< SCU_RESET PRSTAT2: WDTRS (Bit 1) */ +#define SCU_RESET_PRSTAT2_WDTRS_Msk (0x2UL) /*!< SCU_RESET PRSTAT2: WDTRS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSTAT2_ETH0RS_Pos (2UL) /*!< SCU_RESET PRSTAT2: ETH0RS (Bit 2) */ +#define SCU_RESET_PRSTAT2_ETH0RS_Msk (0x4UL) /*!< SCU_RESET PRSTAT2: ETH0RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSTAT2_DMA0RS_Pos (4UL) /*!< SCU_RESET PRSTAT2: DMA0RS (Bit 4) */ +#define SCU_RESET_PRSTAT2_DMA0RS_Msk (0x10UL) /*!< SCU_RESET PRSTAT2: DMA0RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSTAT2_DMA1RS_Pos (5UL) /*!< SCU_RESET PRSTAT2: DMA1RS (Bit 5) */ +#define SCU_RESET_PRSTAT2_DMA1RS_Msk (0x20UL) /*!< SCU_RESET PRSTAT2: DMA1RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSTAT2_FCERS_Pos (6UL) /*!< SCU_RESET PRSTAT2: FCERS (Bit 6) */ +#define SCU_RESET_PRSTAT2_FCERS_Msk (0x40UL) /*!< SCU_RESET PRSTAT2: FCERS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSTAT2_USBRS_Pos (7UL) /*!< SCU_RESET PRSTAT2: USBRS (Bit 7) */ +#define SCU_RESET_PRSTAT2_USBRS_Msk (0x80UL) /*!< SCU_RESET PRSTAT2: USBRS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSTAT2_ECAT0RS_Pos (10UL) /*!< SCU_RESET PRSTAT2: ECAT0RS (Bit 10) */ +#define SCU_RESET_PRSTAT2_ECAT0RS_Msk (0x400UL) /*!< SCU_RESET PRSTAT2: ECAT0RS (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_RESET_PRSET2 ------------------------------ */ +#define SCU_RESET_PRSET2_WDTRS_Pos (1UL) /*!< SCU_RESET PRSET2: WDTRS (Bit 1) */ +#define SCU_RESET_PRSET2_WDTRS_Msk (0x2UL) /*!< SCU_RESET PRSET2: WDTRS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSET2_ETH0RS_Pos (2UL) /*!< SCU_RESET PRSET2: ETH0RS (Bit 2) */ +#define SCU_RESET_PRSET2_ETH0RS_Msk (0x4UL) /*!< SCU_RESET PRSET2: ETH0RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSET2_DMA0RS_Pos (4UL) /*!< SCU_RESET PRSET2: DMA0RS (Bit 4) */ +#define SCU_RESET_PRSET2_DMA0RS_Msk (0x10UL) /*!< SCU_RESET PRSET2: DMA0RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSET2_DMA1RS_Pos (5UL) /*!< SCU_RESET PRSET2: DMA1RS (Bit 5) */ +#define SCU_RESET_PRSET2_DMA1RS_Msk (0x20UL) /*!< SCU_RESET PRSET2: DMA1RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSET2_FCERS_Pos (6UL) /*!< SCU_RESET PRSET2: FCERS (Bit 6) */ +#define SCU_RESET_PRSET2_FCERS_Msk (0x40UL) /*!< SCU_RESET PRSET2: FCERS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSET2_USBRS_Pos (7UL) /*!< SCU_RESET PRSET2: USBRS (Bit 7) */ +#define SCU_RESET_PRSET2_USBRS_Msk (0x80UL) /*!< SCU_RESET PRSET2: USBRS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRSET2_ECAT0RS_Pos (10UL) /*!< SCU_RESET PRSET2: ECAT0RS (Bit 10) */ +#define SCU_RESET_PRSET2_ECAT0RS_Msk (0x400UL) /*!< SCU_RESET PRSET2: ECAT0RS (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_RESET_PRCLR2 ------------------------------ */ +#define SCU_RESET_PRCLR2_WDTRS_Pos (1UL) /*!< SCU_RESET PRCLR2: WDTRS (Bit 1) */ +#define SCU_RESET_PRCLR2_WDTRS_Msk (0x2UL) /*!< SCU_RESET PRCLR2: WDTRS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRCLR2_ETH0RS_Pos (2UL) /*!< SCU_RESET PRCLR2: ETH0RS (Bit 2) */ +#define SCU_RESET_PRCLR2_ETH0RS_Msk (0x4UL) /*!< SCU_RESET PRCLR2: ETH0RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRCLR2_DMA0RS_Pos (4UL) /*!< SCU_RESET PRCLR2: DMA0RS (Bit 4) */ +#define SCU_RESET_PRCLR2_DMA0RS_Msk (0x10UL) /*!< SCU_RESET PRCLR2: DMA0RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRCLR2_DMA1RS_Pos (5UL) /*!< SCU_RESET PRCLR2: DMA1RS (Bit 5) */ +#define SCU_RESET_PRCLR2_DMA1RS_Msk (0x20UL) /*!< SCU_RESET PRCLR2: DMA1RS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRCLR2_FCERS_Pos (6UL) /*!< SCU_RESET PRCLR2: FCERS (Bit 6) */ +#define SCU_RESET_PRCLR2_FCERS_Msk (0x40UL) /*!< SCU_RESET PRCLR2: FCERS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRCLR2_USBRS_Pos (7UL) /*!< SCU_RESET PRCLR2: USBRS (Bit 7) */ +#define SCU_RESET_PRCLR2_USBRS_Msk (0x80UL) /*!< SCU_RESET PRCLR2: USBRS (Bitfield-Mask: 0x01) */ +#define SCU_RESET_PRCLR2_ECAT0RS_Pos (10UL) /*!< SCU_RESET PRCLR2: ECAT0RS (Bit 10) */ +#define SCU_RESET_PRCLR2_ECAT0RS_Msk (0x400UL) /*!< SCU_RESET PRCLR2: ECAT0RS (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_RESET_PRSTAT3 ----------------------------- */ +#define SCU_RESET_PRSTAT3_EBURS_Pos (2UL) /*!< SCU_RESET PRSTAT3: EBURS (Bit 2) */ +#define SCU_RESET_PRSTAT3_EBURS_Msk (0x4UL) /*!< SCU_RESET PRSTAT3: EBURS (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_RESET_PRSET3 ------------------------------ */ +#define SCU_RESET_PRSET3_EBURS_Pos (2UL) /*!< SCU_RESET PRSET3: EBURS (Bit 2) */ +#define SCU_RESET_PRSET3_EBURS_Msk (0x4UL) /*!< SCU_RESET PRSET3: EBURS (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SCU_RESET_PRCLR3 ------------------------------ */ +#define SCU_RESET_PRCLR3_EBURS_Pos (2UL) /*!< SCU_RESET PRCLR3: EBURS (Bit 2) */ +#define SCU_RESET_PRCLR3_EBURS_Msk (0x4UL) /*!< SCU_RESET PRCLR3: EBURS (Bitfield-Mask: 0x01) */ + + +/* ================================================================================ */ +/* ================ Group 'LEDTS' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ---------------------------------- LEDTS_ID ---------------------------------- */ +#define LEDTS_ID_MOD_REV_Pos (0UL) /*!< LEDTS ID: MOD_REV (Bit 0) */ +#define LEDTS_ID_MOD_REV_Msk (0xffUL) /*!< LEDTS ID: MOD_REV (Bitfield-Mask: 0xff) */ +#define LEDTS_ID_MOD_TYPE_Pos (8UL) /*!< LEDTS ID: MOD_TYPE (Bit 8) */ +#define LEDTS_ID_MOD_TYPE_Msk (0xff00UL) /*!< LEDTS ID: MOD_TYPE (Bitfield-Mask: 0xff) */ +#define LEDTS_ID_MOD_NUMBER_Pos (16UL) /*!< LEDTS ID: MOD_NUMBER (Bit 16) */ +#define LEDTS_ID_MOD_NUMBER_Msk (0xffff0000UL) /*!< LEDTS ID: MOD_NUMBER (Bitfield-Mask: 0xffff) */ + +/* -------------------------------- LEDTS_GLOBCTL ------------------------------- */ +#define LEDTS_GLOBCTL_TS_EN_Pos (0UL) /*!< LEDTS GLOBCTL: TS_EN (Bit 0) */ +#define LEDTS_GLOBCTL_TS_EN_Msk (0x1UL) /*!< LEDTS GLOBCTL: TS_EN (Bitfield-Mask: 0x01) */ +#define LEDTS_GLOBCTL_LD_EN_Pos (1UL) /*!< LEDTS GLOBCTL: LD_EN (Bit 1) */ +#define LEDTS_GLOBCTL_LD_EN_Msk (0x2UL) /*!< LEDTS GLOBCTL: LD_EN (Bitfield-Mask: 0x01) */ +#define LEDTS_GLOBCTL_CMTR_Pos (2UL) /*!< LEDTS GLOBCTL: CMTR (Bit 2) */ +#define LEDTS_GLOBCTL_CMTR_Msk (0x4UL) /*!< LEDTS GLOBCTL: CMTR (Bitfield-Mask: 0x01) */ +#define LEDTS_GLOBCTL_ENSYNC_Pos (3UL) /*!< LEDTS GLOBCTL: ENSYNC (Bit 3) */ +#define LEDTS_GLOBCTL_ENSYNC_Msk (0x8UL) /*!< LEDTS GLOBCTL: ENSYNC (Bitfield-Mask: 0x01) */ +#define LEDTS_GLOBCTL_SUSCFG_Pos (8UL) /*!< LEDTS GLOBCTL: SUSCFG (Bit 8) */ +#define LEDTS_GLOBCTL_SUSCFG_Msk (0x100UL) /*!< LEDTS GLOBCTL: SUSCFG (Bitfield-Mask: 0x01) */ +#define LEDTS_GLOBCTL_MASKVAL_Pos (9UL) /*!< LEDTS GLOBCTL: MASKVAL (Bit 9) */ +#define LEDTS_GLOBCTL_MASKVAL_Msk (0xe00UL) /*!< LEDTS GLOBCTL: MASKVAL (Bitfield-Mask: 0x07) */ +#define LEDTS_GLOBCTL_FENVAL_Pos (12UL) /*!< LEDTS GLOBCTL: FENVAL (Bit 12) */ +#define LEDTS_GLOBCTL_FENVAL_Msk (0x1000UL) /*!< LEDTS GLOBCTL: FENVAL (Bitfield-Mask: 0x01) */ +#define LEDTS_GLOBCTL_ITS_EN_Pos (13UL) /*!< LEDTS GLOBCTL: ITS_EN (Bit 13) */ +#define LEDTS_GLOBCTL_ITS_EN_Msk (0x2000UL) /*!< LEDTS GLOBCTL: ITS_EN (Bitfield-Mask: 0x01) */ +#define LEDTS_GLOBCTL_ITF_EN_Pos (14UL) /*!< LEDTS GLOBCTL: ITF_EN (Bit 14) */ +#define LEDTS_GLOBCTL_ITF_EN_Msk (0x4000UL) /*!< LEDTS GLOBCTL: ITF_EN (Bitfield-Mask: 0x01) */ +#define LEDTS_GLOBCTL_ITP_EN_Pos (15UL) /*!< LEDTS GLOBCTL: ITP_EN (Bit 15) */ +#define LEDTS_GLOBCTL_ITP_EN_Msk (0x8000UL) /*!< LEDTS GLOBCTL: ITP_EN (Bitfield-Mask: 0x01) */ +#define LEDTS_GLOBCTL_CLK_PS_Pos (16UL) /*!< LEDTS GLOBCTL: CLK_PS (Bit 16) */ +#define LEDTS_GLOBCTL_CLK_PS_Msk (0xffff0000UL) /*!< LEDTS GLOBCTL: CLK_PS (Bitfield-Mask: 0xffff) */ + +/* --------------------------------- LEDTS_FNCTL -------------------------------- */ +#define LEDTS_FNCTL_PADT_Pos (0UL) /*!< LEDTS FNCTL: PADT (Bit 0) */ +#define LEDTS_FNCTL_PADT_Msk (0x7UL) /*!< LEDTS FNCTL: PADT (Bitfield-Mask: 0x07) */ +#define LEDTS_FNCTL_PADTSW_Pos (3UL) /*!< LEDTS FNCTL: PADTSW (Bit 3) */ +#define LEDTS_FNCTL_PADTSW_Msk (0x8UL) /*!< LEDTS FNCTL: PADTSW (Bitfield-Mask: 0x01) */ +#define LEDTS_FNCTL_EPULL_Pos (4UL) /*!< LEDTS FNCTL: EPULL (Bit 4) */ +#define LEDTS_FNCTL_EPULL_Msk (0x10UL) /*!< LEDTS FNCTL: EPULL (Bitfield-Mask: 0x01) */ +#define LEDTS_FNCTL_FNCOL_Pos (5UL) /*!< LEDTS FNCTL: FNCOL (Bit 5) */ +#define LEDTS_FNCTL_FNCOL_Msk (0xe0UL) /*!< LEDTS FNCTL: FNCOL (Bitfield-Mask: 0x07) */ +#define LEDTS_FNCTL_ACCCNT_Pos (16UL) /*!< LEDTS FNCTL: ACCCNT (Bit 16) */ +#define LEDTS_FNCTL_ACCCNT_Msk (0xf0000UL) /*!< LEDTS FNCTL: ACCCNT (Bitfield-Mask: 0x0f) */ +#define LEDTS_FNCTL_TSCCMP_Pos (20UL) /*!< LEDTS FNCTL: TSCCMP (Bit 20) */ +#define LEDTS_FNCTL_TSCCMP_Msk (0x100000UL) /*!< LEDTS FNCTL: TSCCMP (Bitfield-Mask: 0x01) */ +#define LEDTS_FNCTL_TSOEXT_Pos (21UL) /*!< LEDTS FNCTL: TSOEXT (Bit 21) */ +#define LEDTS_FNCTL_TSOEXT_Msk (0x600000UL) /*!< LEDTS FNCTL: TSOEXT (Bitfield-Mask: 0x03) */ +#define LEDTS_FNCTL_TSCTRR_Pos (23UL) /*!< LEDTS FNCTL: TSCTRR (Bit 23) */ +#define LEDTS_FNCTL_TSCTRR_Msk (0x800000UL) /*!< LEDTS FNCTL: TSCTRR (Bitfield-Mask: 0x01) */ +#define LEDTS_FNCTL_TSCTRSAT_Pos (24UL) /*!< LEDTS FNCTL: TSCTRSAT (Bit 24) */ +#define LEDTS_FNCTL_TSCTRSAT_Msk (0x1000000UL) /*!< LEDTS FNCTL: TSCTRSAT (Bitfield-Mask: 0x01) */ +#define LEDTS_FNCTL_NR_TSIN_Pos (25UL) /*!< LEDTS FNCTL: NR_TSIN (Bit 25) */ +#define LEDTS_FNCTL_NR_TSIN_Msk (0xe000000UL) /*!< LEDTS FNCTL: NR_TSIN (Bitfield-Mask: 0x07) */ +#define LEDTS_FNCTL_COLLEV_Pos (28UL) /*!< LEDTS FNCTL: COLLEV (Bit 28) */ +#define LEDTS_FNCTL_COLLEV_Msk (0x10000000UL) /*!< LEDTS FNCTL: COLLEV (Bitfield-Mask: 0x01) */ +#define LEDTS_FNCTL_NR_LEDCOL_Pos (29UL) /*!< LEDTS FNCTL: NR_LEDCOL (Bit 29) */ +#define LEDTS_FNCTL_NR_LEDCOL_Msk (0xe0000000UL) /*!< LEDTS FNCTL: NR_LEDCOL (Bitfield-Mask: 0x07) */ + +/* --------------------------------- LEDTS_EVFR --------------------------------- */ +#define LEDTS_EVFR_TSF_Pos (0UL) /*!< LEDTS EVFR: TSF (Bit 0) */ +#define LEDTS_EVFR_TSF_Msk (0x1UL) /*!< LEDTS EVFR: TSF (Bitfield-Mask: 0x01) */ +#define LEDTS_EVFR_TFF_Pos (1UL) /*!< LEDTS EVFR: TFF (Bit 1) */ +#define LEDTS_EVFR_TFF_Msk (0x2UL) /*!< LEDTS EVFR: TFF (Bitfield-Mask: 0x01) */ +#define LEDTS_EVFR_TPF_Pos (2UL) /*!< LEDTS EVFR: TPF (Bit 2) */ +#define LEDTS_EVFR_TPF_Msk (0x4UL) /*!< LEDTS EVFR: TPF (Bitfield-Mask: 0x01) */ +#define LEDTS_EVFR_TSCTROVF_Pos (3UL) /*!< LEDTS EVFR: TSCTROVF (Bit 3) */ +#define LEDTS_EVFR_TSCTROVF_Msk (0x8UL) /*!< LEDTS EVFR: TSCTROVF (Bitfield-Mask: 0x01) */ +#define LEDTS_EVFR_CTSF_Pos (16UL) /*!< LEDTS EVFR: CTSF (Bit 16) */ +#define LEDTS_EVFR_CTSF_Msk (0x10000UL) /*!< LEDTS EVFR: CTSF (Bitfield-Mask: 0x01) */ +#define LEDTS_EVFR_CTFF_Pos (17UL) /*!< LEDTS EVFR: CTFF (Bit 17) */ +#define LEDTS_EVFR_CTFF_Msk (0x20000UL) /*!< LEDTS EVFR: CTFF (Bitfield-Mask: 0x01) */ +#define LEDTS_EVFR_CTPF_Pos (18UL) /*!< LEDTS EVFR: CTPF (Bit 18) */ +#define LEDTS_EVFR_CTPF_Msk (0x40000UL) /*!< LEDTS EVFR: CTPF (Bitfield-Mask: 0x01) */ + +/* --------------------------------- LEDTS_TSVAL -------------------------------- */ +#define LEDTS_TSVAL_TSCTRVALR_Pos (0UL) /*!< LEDTS TSVAL: TSCTRVALR (Bit 0) */ +#define LEDTS_TSVAL_TSCTRVALR_Msk (0xffffUL) /*!< LEDTS TSVAL: TSCTRVALR (Bitfield-Mask: 0xffff) */ +#define LEDTS_TSVAL_TSCTRVAL_Pos (16UL) /*!< LEDTS TSVAL: TSCTRVAL (Bit 16) */ +#define LEDTS_TSVAL_TSCTRVAL_Msk (0xffff0000UL) /*!< LEDTS TSVAL: TSCTRVAL (Bitfield-Mask: 0xffff) */ + +/* --------------------------------- LEDTS_LINE0 -------------------------------- */ +#define LEDTS_LINE0_LINE_0_Pos (0UL) /*!< LEDTS LINE0: LINE_0 (Bit 0) */ +#define LEDTS_LINE0_LINE_0_Msk (0xffUL) /*!< LEDTS LINE0: LINE_0 (Bitfield-Mask: 0xff) */ +#define LEDTS_LINE0_LINE_1_Pos (8UL) /*!< LEDTS LINE0: LINE_1 (Bit 8) */ +#define LEDTS_LINE0_LINE_1_Msk (0xff00UL) /*!< LEDTS LINE0: LINE_1 (Bitfield-Mask: 0xff) */ +#define LEDTS_LINE0_LINE_2_Pos (16UL) /*!< LEDTS LINE0: LINE_2 (Bit 16) */ +#define LEDTS_LINE0_LINE_2_Msk (0xff0000UL) /*!< LEDTS LINE0: LINE_2 (Bitfield-Mask: 0xff) */ +#define LEDTS_LINE0_LINE_3_Pos (24UL) /*!< LEDTS LINE0: LINE_3 (Bit 24) */ +#define LEDTS_LINE0_LINE_3_Msk (0xff000000UL) /*!< LEDTS LINE0: LINE_3 (Bitfield-Mask: 0xff) */ + +/* --------------------------------- LEDTS_LINE1 -------------------------------- */ +#define LEDTS_LINE1_LINE_4_Pos (0UL) /*!< LEDTS LINE1: LINE_4 (Bit 0) */ +#define LEDTS_LINE1_LINE_4_Msk (0xffUL) /*!< LEDTS LINE1: LINE_4 (Bitfield-Mask: 0xff) */ +#define LEDTS_LINE1_LINE_5_Pos (8UL) /*!< LEDTS LINE1: LINE_5 (Bit 8) */ +#define LEDTS_LINE1_LINE_5_Msk (0xff00UL) /*!< LEDTS LINE1: LINE_5 (Bitfield-Mask: 0xff) */ +#define LEDTS_LINE1_LINE_6_Pos (16UL) /*!< LEDTS LINE1: LINE_6 (Bit 16) */ +#define LEDTS_LINE1_LINE_6_Msk (0xff0000UL) /*!< LEDTS LINE1: LINE_6 (Bitfield-Mask: 0xff) */ +#define LEDTS_LINE1_LINE_A_Pos (24UL) /*!< LEDTS LINE1: LINE_A (Bit 24) */ +#define LEDTS_LINE1_LINE_A_Msk (0xff000000UL) /*!< LEDTS LINE1: LINE_A (Bitfield-Mask: 0xff) */ + +/* -------------------------------- LEDTS_LDCMP0 -------------------------------- */ +#define LEDTS_LDCMP0_CMP_LD0_Pos (0UL) /*!< LEDTS LDCMP0: CMP_LD0 (Bit 0) */ +#define LEDTS_LDCMP0_CMP_LD0_Msk (0xffUL) /*!< LEDTS LDCMP0: CMP_LD0 (Bitfield-Mask: 0xff) */ +#define LEDTS_LDCMP0_CMP_LD1_Pos (8UL) /*!< LEDTS LDCMP0: CMP_LD1 (Bit 8) */ +#define LEDTS_LDCMP0_CMP_LD1_Msk (0xff00UL) /*!< LEDTS LDCMP0: CMP_LD1 (Bitfield-Mask: 0xff) */ +#define LEDTS_LDCMP0_CMP_LD2_Pos (16UL) /*!< LEDTS LDCMP0: CMP_LD2 (Bit 16) */ +#define LEDTS_LDCMP0_CMP_LD2_Msk (0xff0000UL) /*!< LEDTS LDCMP0: CMP_LD2 (Bitfield-Mask: 0xff) */ +#define LEDTS_LDCMP0_CMP_LD3_Pos (24UL) /*!< LEDTS LDCMP0: CMP_LD3 (Bit 24) */ +#define LEDTS_LDCMP0_CMP_LD3_Msk (0xff000000UL) /*!< LEDTS LDCMP0: CMP_LD3 (Bitfield-Mask: 0xff) */ + +/* -------------------------------- LEDTS_LDCMP1 -------------------------------- */ +#define LEDTS_LDCMP1_CMP_LD4_Pos (0UL) /*!< LEDTS LDCMP1: CMP_LD4 (Bit 0) */ +#define LEDTS_LDCMP1_CMP_LD4_Msk (0xffUL) /*!< LEDTS LDCMP1: CMP_LD4 (Bitfield-Mask: 0xff) */ +#define LEDTS_LDCMP1_CMP_LD5_Pos (8UL) /*!< LEDTS LDCMP1: CMP_LD5 (Bit 8) */ +#define LEDTS_LDCMP1_CMP_LD5_Msk (0xff00UL) /*!< LEDTS LDCMP1: CMP_LD5 (Bitfield-Mask: 0xff) */ +#define LEDTS_LDCMP1_CMP_LD6_Pos (16UL) /*!< LEDTS LDCMP1: CMP_LD6 (Bit 16) */ +#define LEDTS_LDCMP1_CMP_LD6_Msk (0xff0000UL) /*!< LEDTS LDCMP1: CMP_LD6 (Bitfield-Mask: 0xff) */ +#define LEDTS_LDCMP1_CMP_LDA_TSCOM_Pos (24UL) /*!< LEDTS LDCMP1: CMP_LDA_TSCOM (Bit 24) */ +#define LEDTS_LDCMP1_CMP_LDA_TSCOM_Msk (0xff000000UL) /*!< LEDTS LDCMP1: CMP_LDA_TSCOM (Bitfield-Mask: 0xff) */ + +/* -------------------------------- LEDTS_TSCMP0 -------------------------------- */ +#define LEDTS_TSCMP0_CMP_TS0_Pos (0UL) /*!< LEDTS TSCMP0: CMP_TS0 (Bit 0) */ +#define LEDTS_TSCMP0_CMP_TS0_Msk (0xffUL) /*!< LEDTS TSCMP0: CMP_TS0 (Bitfield-Mask: 0xff) */ +#define LEDTS_TSCMP0_CMP_TS1_Pos (8UL) /*!< LEDTS TSCMP0: CMP_TS1 (Bit 8) */ +#define LEDTS_TSCMP0_CMP_TS1_Msk (0xff00UL) /*!< LEDTS TSCMP0: CMP_TS1 (Bitfield-Mask: 0xff) */ +#define LEDTS_TSCMP0_CMP_TS2_Pos (16UL) /*!< LEDTS TSCMP0: CMP_TS2 (Bit 16) */ +#define LEDTS_TSCMP0_CMP_TS2_Msk (0xff0000UL) /*!< LEDTS TSCMP0: CMP_TS2 (Bitfield-Mask: 0xff) */ +#define LEDTS_TSCMP0_CMP_TS3_Pos (24UL) /*!< LEDTS TSCMP0: CMP_TS3 (Bit 24) */ +#define LEDTS_TSCMP0_CMP_TS3_Msk (0xff000000UL) /*!< LEDTS TSCMP0: CMP_TS3 (Bitfield-Mask: 0xff) */ + +/* -------------------------------- LEDTS_TSCMP1 -------------------------------- */ +#define LEDTS_TSCMP1_CMP_TS4_Pos (0UL) /*!< LEDTS TSCMP1: CMP_TS4 (Bit 0) */ +#define LEDTS_TSCMP1_CMP_TS4_Msk (0xffUL) /*!< LEDTS TSCMP1: CMP_TS4 (Bitfield-Mask: 0xff) */ +#define LEDTS_TSCMP1_CMP_TS5_Pos (8UL) /*!< LEDTS TSCMP1: CMP_TS5 (Bit 8) */ +#define LEDTS_TSCMP1_CMP_TS5_Msk (0xff00UL) /*!< LEDTS TSCMP1: CMP_TS5 (Bitfield-Mask: 0xff) */ +#define LEDTS_TSCMP1_CMP_TS6_Pos (16UL) /*!< LEDTS TSCMP1: CMP_TS6 (Bit 16) */ +#define LEDTS_TSCMP1_CMP_TS6_Msk (0xff0000UL) /*!< LEDTS TSCMP1: CMP_TS6 (Bitfield-Mask: 0xff) */ +#define LEDTS_TSCMP1_CMP_TS7_Pos (24UL) /*!< LEDTS TSCMP1: CMP_TS7 (Bit 24) */ +#define LEDTS_TSCMP1_CMP_TS7_Msk (0xff000000UL) /*!< LEDTS TSCMP1: CMP_TS7 (Bitfield-Mask: 0xff) */ + + +/* ================================================================================ */ +/* ================ struct 'SDMMC' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ------------------------------ SDMMC_BLOCK_SIZE ------------------------------ */ +#define SDMMC_BLOCK_SIZE_TX_BLOCK_SIZE_Pos (0UL) /*!< SDMMC BLOCK_SIZE: TX_BLOCK_SIZE (Bit 0) */ +#define SDMMC_BLOCK_SIZE_TX_BLOCK_SIZE_Msk (0xfffUL) /*!< SDMMC BLOCK_SIZE: TX_BLOCK_SIZE (Bitfield-Mask: 0xfff) */ +#define SDMMC_BLOCK_SIZE_TX_BLOCK_SIZE_12_Pos (15UL) /*!< SDMMC BLOCK_SIZE: TX_BLOCK_SIZE_12 (Bit 15) */ +#define SDMMC_BLOCK_SIZE_TX_BLOCK_SIZE_12_Msk (0x8000UL) /*!< SDMMC BLOCK_SIZE: TX_BLOCK_SIZE_12 (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SDMMC_BLOCK_COUNT ----------------------------- */ +#define SDMMC_BLOCK_COUNT_BLOCK_COUNT_Pos (0UL) /*!< SDMMC BLOCK_COUNT: BLOCK_COUNT (Bit 0) */ +#define SDMMC_BLOCK_COUNT_BLOCK_COUNT_Msk (0xffffUL) /*!< SDMMC BLOCK_COUNT: BLOCK_COUNT (Bitfield-Mask: 0xffff) */ + +/* ------------------------------- SDMMC_ARGUMENT1 ------------------------------ */ +#define SDMMC_ARGUMENT1_ARGUMENT1_Pos (0UL) /*!< SDMMC ARGUMENT1: ARGUMENT1 (Bit 0) */ +#define SDMMC_ARGUMENT1_ARGUMENT1_Msk (0xffffffffUL) /*!< SDMMC ARGUMENT1: ARGUMENT1 (Bitfield-Mask: 0xffffffff) */ + +/* ----------------------------- SDMMC_TRANSFER_MODE ---------------------------- */ +#define SDMMC_TRANSFER_MODE_BLOCK_COUNT_EN_Pos (1UL) /*!< SDMMC TRANSFER_MODE: BLOCK_COUNT_EN (Bit 1) */ +#define SDMMC_TRANSFER_MODE_BLOCK_COUNT_EN_Msk (0x2UL) /*!< SDMMC TRANSFER_MODE: BLOCK_COUNT_EN (Bitfield-Mask: 0x01) */ +#define SDMMC_TRANSFER_MODE_ACMD_EN_Pos (2UL) /*!< SDMMC TRANSFER_MODE: ACMD_EN (Bit 2) */ +#define SDMMC_TRANSFER_MODE_ACMD_EN_Msk (0xcUL) /*!< SDMMC TRANSFER_MODE: ACMD_EN (Bitfield-Mask: 0x03) */ +#define SDMMC_TRANSFER_MODE_TX_DIR_SELECT_Pos (4UL) /*!< SDMMC TRANSFER_MODE: TX_DIR_SELECT (Bit 4) */ +#define SDMMC_TRANSFER_MODE_TX_DIR_SELECT_Msk (0x10UL) /*!< SDMMC TRANSFER_MODE: TX_DIR_SELECT (Bitfield-Mask: 0x01) */ +#define SDMMC_TRANSFER_MODE_MULTI_BLOCK_SELECT_Pos (5UL) /*!< SDMMC TRANSFER_MODE: MULTI_BLOCK_SELECT (Bit 5) */ +#define SDMMC_TRANSFER_MODE_MULTI_BLOCK_SELECT_Msk (0x20UL) /*!< SDMMC TRANSFER_MODE: MULTI_BLOCK_SELECT (Bitfield-Mask: 0x01) */ +#define SDMMC_TRANSFER_MODE_CMD_COMP_ATA_Pos (6UL) /*!< SDMMC TRANSFER_MODE: CMD_COMP_ATA (Bit 6) */ +#define SDMMC_TRANSFER_MODE_CMD_COMP_ATA_Msk (0x40UL) /*!< SDMMC TRANSFER_MODE: CMD_COMP_ATA (Bitfield-Mask: 0x01) */ + +/* -------------------------------- SDMMC_COMMAND ------------------------------- */ +#define SDMMC_COMMAND_RESP_TYPE_SELECT_Pos (0UL) /*!< SDMMC COMMAND: RESP_TYPE_SELECT (Bit 0) */ +#define SDMMC_COMMAND_RESP_TYPE_SELECT_Msk (0x3UL) /*!< SDMMC COMMAND: RESP_TYPE_SELECT (Bitfield-Mask: 0x03) */ +#define SDMMC_COMMAND_CMD_CRC_CHECK_EN_Pos (3UL) /*!< SDMMC COMMAND: CMD_CRC_CHECK_EN (Bit 3) */ +#define SDMMC_COMMAND_CMD_CRC_CHECK_EN_Msk (0x8UL) /*!< SDMMC COMMAND: CMD_CRC_CHECK_EN (Bitfield-Mask: 0x01) */ +#define SDMMC_COMMAND_CMD_IND_CHECK_EN_Pos (4UL) /*!< SDMMC COMMAND: CMD_IND_CHECK_EN (Bit 4) */ +#define SDMMC_COMMAND_CMD_IND_CHECK_EN_Msk (0x10UL) /*!< SDMMC COMMAND: CMD_IND_CHECK_EN (Bitfield-Mask: 0x01) */ +#define SDMMC_COMMAND_DATA_PRESENT_SELECT_Pos (5UL) /*!< SDMMC COMMAND: DATA_PRESENT_SELECT (Bit 5) */ +#define SDMMC_COMMAND_DATA_PRESENT_SELECT_Msk (0x20UL) /*!< SDMMC COMMAND: DATA_PRESENT_SELECT (Bitfield-Mask: 0x01) */ +#define SDMMC_COMMAND_CMD_TYPE_Pos (6UL) /*!< SDMMC COMMAND: CMD_TYPE (Bit 6) */ +#define SDMMC_COMMAND_CMD_TYPE_Msk (0xc0UL) /*!< SDMMC COMMAND: CMD_TYPE (Bitfield-Mask: 0x03) */ +#define SDMMC_COMMAND_CMD_IND_Pos (8UL) /*!< SDMMC COMMAND: CMD_IND (Bit 8) */ +#define SDMMC_COMMAND_CMD_IND_Msk (0x3f00UL) /*!< SDMMC COMMAND: CMD_IND (Bitfield-Mask: 0x3f) */ + +/* ------------------------------- SDMMC_RESPONSE0 ------------------------------ */ +#define SDMMC_RESPONSE0_RESPONSE0_Pos (0UL) /*!< SDMMC RESPONSE0: RESPONSE0 (Bit 0) */ +#define SDMMC_RESPONSE0_RESPONSE0_Msk (0xffffUL) /*!< SDMMC RESPONSE0: RESPONSE0 (Bitfield-Mask: 0xffff) */ +#define SDMMC_RESPONSE0_RESPONSE1_Pos (16UL) /*!< SDMMC RESPONSE0: RESPONSE1 (Bit 16) */ +#define SDMMC_RESPONSE0_RESPONSE1_Msk (0xffff0000UL) /*!< SDMMC RESPONSE0: RESPONSE1 (Bitfield-Mask: 0xffff) */ + +/* ------------------------------- SDMMC_RESPONSE2 ------------------------------ */ +#define SDMMC_RESPONSE2_RESPONSE2_Pos (0UL) /*!< SDMMC RESPONSE2: RESPONSE2 (Bit 0) */ +#define SDMMC_RESPONSE2_RESPONSE2_Msk (0xffffUL) /*!< SDMMC RESPONSE2: RESPONSE2 (Bitfield-Mask: 0xffff) */ +#define SDMMC_RESPONSE2_RESPONSE3_Pos (16UL) /*!< SDMMC RESPONSE2: RESPONSE3 (Bit 16) */ +#define SDMMC_RESPONSE2_RESPONSE3_Msk (0xffff0000UL) /*!< SDMMC RESPONSE2: RESPONSE3 (Bitfield-Mask: 0xffff) */ + +/* ------------------------------- SDMMC_RESPONSE4 ------------------------------ */ +#define SDMMC_RESPONSE4_RESPONSE4_Pos (0UL) /*!< SDMMC RESPONSE4: RESPONSE4 (Bit 0) */ +#define SDMMC_RESPONSE4_RESPONSE4_Msk (0xffffUL) /*!< SDMMC RESPONSE4: RESPONSE4 (Bitfield-Mask: 0xffff) */ +#define SDMMC_RESPONSE4_RESPONSE5_Pos (16UL) /*!< SDMMC RESPONSE4: RESPONSE5 (Bit 16) */ +#define SDMMC_RESPONSE4_RESPONSE5_Msk (0xffff0000UL) /*!< SDMMC RESPONSE4: RESPONSE5 (Bitfield-Mask: 0xffff) */ + +/* ------------------------------- SDMMC_RESPONSE6 ------------------------------ */ +#define SDMMC_RESPONSE6_RESPONSE6_Pos (0UL) /*!< SDMMC RESPONSE6: RESPONSE6 (Bit 0) */ +#define SDMMC_RESPONSE6_RESPONSE6_Msk (0xffffUL) /*!< SDMMC RESPONSE6: RESPONSE6 (Bitfield-Mask: 0xffff) */ +#define SDMMC_RESPONSE6_RESPONSE7_Pos (16UL) /*!< SDMMC RESPONSE6: RESPONSE7 (Bit 16) */ +#define SDMMC_RESPONSE6_RESPONSE7_Msk (0xffff0000UL) /*!< SDMMC RESPONSE6: RESPONSE7 (Bitfield-Mask: 0xffff) */ + +/* ------------------------------ SDMMC_DATA_BUFFER ----------------------------- */ +#define SDMMC_DATA_BUFFER_DATA_BUFFER_Pos (0UL) /*!< SDMMC DATA_BUFFER: DATA_BUFFER (Bit 0) */ +#define SDMMC_DATA_BUFFER_DATA_BUFFER_Msk (0xffffffffUL) /*!< SDMMC DATA_BUFFER: DATA_BUFFER (Bitfield-Mask: 0xffffffff) */ + +/* ----------------------------- SDMMC_PRESENT_STATE ---------------------------- */ +#define SDMMC_PRESENT_STATE_COMMAND_INHIBIT_CMD_Pos (0UL) /*!< SDMMC PRESENT_STATE: COMMAND_INHIBIT_CMD (Bit 0) */ +#define SDMMC_PRESENT_STATE_COMMAND_INHIBIT_CMD_Msk (0x1UL) /*!< SDMMC PRESENT_STATE: COMMAND_INHIBIT_CMD (Bitfield-Mask: 0x01) */ +#define SDMMC_PRESENT_STATE_COMMAND_INHIBIT_DAT_Pos (1UL) /*!< SDMMC PRESENT_STATE: COMMAND_INHIBIT_DAT (Bit 1) */ +#define SDMMC_PRESENT_STATE_COMMAND_INHIBIT_DAT_Msk (0x2UL) /*!< SDMMC PRESENT_STATE: COMMAND_INHIBIT_DAT (Bitfield-Mask: 0x01) */ +#define SDMMC_PRESENT_STATE_DAT_LINE_ACTIVE_Pos (2UL) /*!< SDMMC PRESENT_STATE: DAT_LINE_ACTIVE (Bit 2) */ +#define SDMMC_PRESENT_STATE_DAT_LINE_ACTIVE_Msk (0x4UL) /*!< SDMMC PRESENT_STATE: DAT_LINE_ACTIVE (Bitfield-Mask: 0x01) */ +#define SDMMC_PRESENT_STATE_WRITE_TRANSFER_ACTIVE_Pos (8UL) /*!< SDMMC PRESENT_STATE: WRITE_TRANSFER_ACTIVE (Bit 8) */ +#define SDMMC_PRESENT_STATE_WRITE_TRANSFER_ACTIVE_Msk (0x100UL) /*!< SDMMC PRESENT_STATE: WRITE_TRANSFER_ACTIVE (Bitfield-Mask: 0x01) */ +#define SDMMC_PRESENT_STATE_READ_TRANSFER_ACTIVE_Pos (9UL) /*!< SDMMC PRESENT_STATE: READ_TRANSFER_ACTIVE (Bit 9) */ +#define SDMMC_PRESENT_STATE_READ_TRANSFER_ACTIVE_Msk (0x200UL) /*!< SDMMC PRESENT_STATE: READ_TRANSFER_ACTIVE (Bitfield-Mask: 0x01) */ +#define SDMMC_PRESENT_STATE_BUFFER_WRITE_ENABLE_Pos (10UL) /*!< SDMMC PRESENT_STATE: BUFFER_WRITE_ENABLE (Bit 10) */ +#define SDMMC_PRESENT_STATE_BUFFER_WRITE_ENABLE_Msk (0x400UL) /*!< SDMMC PRESENT_STATE: BUFFER_WRITE_ENABLE (Bitfield-Mask: 0x01) */ +#define SDMMC_PRESENT_STATE_BUFFER_READ_ENABLE_Pos (11UL) /*!< SDMMC PRESENT_STATE: BUFFER_READ_ENABLE (Bit 11) */ +#define SDMMC_PRESENT_STATE_BUFFER_READ_ENABLE_Msk (0x800UL) /*!< SDMMC PRESENT_STATE: BUFFER_READ_ENABLE (Bitfield-Mask: 0x01) */ +#define SDMMC_PRESENT_STATE_CARD_INSERTED_Pos (16UL) /*!< SDMMC PRESENT_STATE: CARD_INSERTED (Bit 16) */ +#define SDMMC_PRESENT_STATE_CARD_INSERTED_Msk (0x10000UL) /*!< SDMMC PRESENT_STATE: CARD_INSERTED (Bitfield-Mask: 0x01) */ +#define SDMMC_PRESENT_STATE_CARD_STATE_STABLE_Pos (17UL) /*!< SDMMC PRESENT_STATE: CARD_STATE_STABLE (Bit 17) */ +#define SDMMC_PRESENT_STATE_CARD_STATE_STABLE_Msk (0x20000UL) /*!< SDMMC PRESENT_STATE: CARD_STATE_STABLE (Bitfield-Mask: 0x01) */ +#define SDMMC_PRESENT_STATE_CARD_DETECT_PIN_LEVEL_Pos (18UL) /*!< SDMMC PRESENT_STATE: CARD_DETECT_PIN_LEVEL (Bit 18) */ +#define SDMMC_PRESENT_STATE_CARD_DETECT_PIN_LEVEL_Msk (0x40000UL) /*!< SDMMC PRESENT_STATE: CARD_DETECT_PIN_LEVEL (Bitfield-Mask: 0x01) */ +#define SDMMC_PRESENT_STATE_WRITE_PROTECT_PIN_LEVEL_Pos (19UL) /*!< SDMMC PRESENT_STATE: WRITE_PROTECT_PIN_LEVEL (Bit 19) */ +#define SDMMC_PRESENT_STATE_WRITE_PROTECT_PIN_LEVEL_Msk (0x80000UL) /*!< SDMMC PRESENT_STATE: WRITE_PROTECT_PIN_LEVEL (Bitfield-Mask: 0x01) */ +#define SDMMC_PRESENT_STATE_DAT_3_0_PIN_LEVEL_Pos (20UL) /*!< SDMMC PRESENT_STATE: DAT_3_0_PIN_LEVEL (Bit 20) */ +#define SDMMC_PRESENT_STATE_DAT_3_0_PIN_LEVEL_Msk (0xf00000UL) /*!< SDMMC PRESENT_STATE: DAT_3_0_PIN_LEVEL (Bitfield-Mask: 0x0f) */ +#define SDMMC_PRESENT_STATE_CMD_LINE_LEVEL_Pos (24UL) /*!< SDMMC PRESENT_STATE: CMD_LINE_LEVEL (Bit 24) */ +#define SDMMC_PRESENT_STATE_CMD_LINE_LEVEL_Msk (0x1000000UL) /*!< SDMMC PRESENT_STATE: CMD_LINE_LEVEL (Bitfield-Mask: 0x01) */ +#define SDMMC_PRESENT_STATE_DAT_7_4_PIN_LEVEL_Pos (25UL) /*!< SDMMC PRESENT_STATE: DAT_7_4_PIN_LEVEL (Bit 25) */ +#define SDMMC_PRESENT_STATE_DAT_7_4_PIN_LEVEL_Msk (0x1e000000UL) /*!< SDMMC PRESENT_STATE: DAT_7_4_PIN_LEVEL (Bitfield-Mask: 0x0f) */ + +/* ------------------------------- SDMMC_HOST_CTRL ------------------------------ */ +#define SDMMC_HOST_CTRL_LED_CTRL_Pos (0UL) /*!< SDMMC HOST_CTRL: LED_CTRL (Bit 0) */ +#define SDMMC_HOST_CTRL_LED_CTRL_Msk (0x1UL) /*!< SDMMC HOST_CTRL: LED_CTRL (Bitfield-Mask: 0x01) */ +#define SDMMC_HOST_CTRL_DATA_TX_WIDTH_Pos (1UL) /*!< SDMMC HOST_CTRL: DATA_TX_WIDTH (Bit 1) */ +#define SDMMC_HOST_CTRL_DATA_TX_WIDTH_Msk (0x2UL) /*!< SDMMC HOST_CTRL: DATA_TX_WIDTH (Bitfield-Mask: 0x01) */ +#define SDMMC_HOST_CTRL_HIGH_SPEED_EN_Pos (2UL) /*!< SDMMC HOST_CTRL: HIGH_SPEED_EN (Bit 2) */ +#define SDMMC_HOST_CTRL_HIGH_SPEED_EN_Msk (0x4UL) /*!< SDMMC HOST_CTRL: HIGH_SPEED_EN (Bitfield-Mask: 0x01) */ +#define SDMMC_HOST_CTRL_SD_8BIT_MODE_Pos (5UL) /*!< SDMMC HOST_CTRL: SD_8BIT_MODE (Bit 5) */ +#define SDMMC_HOST_CTRL_SD_8BIT_MODE_Msk (0x20UL) /*!< SDMMC HOST_CTRL: SD_8BIT_MODE (Bitfield-Mask: 0x01) */ +#define SDMMC_HOST_CTRL_CARD_DETECT_TEST_LEVEL_Pos (6UL) /*!< SDMMC HOST_CTRL: CARD_DETECT_TEST_LEVEL (Bit 6) */ +#define SDMMC_HOST_CTRL_CARD_DETECT_TEST_LEVEL_Msk (0x40UL) /*!< SDMMC HOST_CTRL: CARD_DETECT_TEST_LEVEL (Bitfield-Mask: 0x01) */ +#define SDMMC_HOST_CTRL_CARD_DET_SIGNAL_DETECT_Pos (7UL) /*!< SDMMC HOST_CTRL: CARD_DET_SIGNAL_DETECT (Bit 7) */ +#define SDMMC_HOST_CTRL_CARD_DET_SIGNAL_DETECT_Msk (0x80UL) /*!< SDMMC HOST_CTRL: CARD_DET_SIGNAL_DETECT (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SDMMC_POWER_CTRL ------------------------------ */ +#define SDMMC_POWER_CTRL_SD_BUS_POWER_Pos (0UL) /*!< SDMMC POWER_CTRL: SD_BUS_POWER (Bit 0) */ +#define SDMMC_POWER_CTRL_SD_BUS_POWER_Msk (0x1UL) /*!< SDMMC POWER_CTRL: SD_BUS_POWER (Bitfield-Mask: 0x01) */ +#define SDMMC_POWER_CTRL_SD_BUS_VOLTAGE_SEL_Pos (1UL) /*!< SDMMC POWER_CTRL: SD_BUS_VOLTAGE_SEL (Bit 1) */ +#define SDMMC_POWER_CTRL_SD_BUS_VOLTAGE_SEL_Msk (0xeUL) /*!< SDMMC POWER_CTRL: SD_BUS_VOLTAGE_SEL (Bitfield-Mask: 0x07) */ +#define SDMMC_POWER_CTRL_HARDWARE_RESET_Pos (4UL) /*!< SDMMC POWER_CTRL: HARDWARE_RESET (Bit 4) */ +#define SDMMC_POWER_CTRL_HARDWARE_RESET_Msk (0x10UL) /*!< SDMMC POWER_CTRL: HARDWARE_RESET (Bitfield-Mask: 0x01) */ + +/* ---------------------------- SDMMC_BLOCK_GAP_CTRL ---------------------------- */ +#define SDMMC_BLOCK_GAP_CTRL_STOP_AT_BLOCK_GAP_Pos (0UL) /*!< SDMMC BLOCK_GAP_CTRL: STOP_AT_BLOCK_GAP (Bit 0) */ +#define SDMMC_BLOCK_GAP_CTRL_STOP_AT_BLOCK_GAP_Msk (0x1UL) /*!< SDMMC BLOCK_GAP_CTRL: STOP_AT_BLOCK_GAP (Bitfield-Mask: 0x01) */ +#define SDMMC_BLOCK_GAP_CTRL_CONTINUE_REQ_Pos (1UL) /*!< SDMMC BLOCK_GAP_CTRL: CONTINUE_REQ (Bit 1) */ +#define SDMMC_BLOCK_GAP_CTRL_CONTINUE_REQ_Msk (0x2UL) /*!< SDMMC BLOCK_GAP_CTRL: CONTINUE_REQ (Bitfield-Mask: 0x01) */ +#define SDMMC_BLOCK_GAP_CTRL_READ_WAIT_CTRL_Pos (2UL) /*!< SDMMC BLOCK_GAP_CTRL: READ_WAIT_CTRL (Bit 2) */ +#define SDMMC_BLOCK_GAP_CTRL_READ_WAIT_CTRL_Msk (0x4UL) /*!< SDMMC BLOCK_GAP_CTRL: READ_WAIT_CTRL (Bitfield-Mask: 0x01) */ +#define SDMMC_BLOCK_GAP_CTRL_INT_AT_BLOCK_GAP_Pos (3UL) /*!< SDMMC BLOCK_GAP_CTRL: INT_AT_BLOCK_GAP (Bit 3) */ +#define SDMMC_BLOCK_GAP_CTRL_INT_AT_BLOCK_GAP_Msk (0x8UL) /*!< SDMMC BLOCK_GAP_CTRL: INT_AT_BLOCK_GAP (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SDMMC_WAKEUP_CTRL ----------------------------- */ +#define SDMMC_WAKEUP_CTRL_WAKEUP_EVENT_EN_INT_Pos (0UL) /*!< SDMMC WAKEUP_CTRL: WAKEUP_EVENT_EN_INT (Bit 0) */ +#define SDMMC_WAKEUP_CTRL_WAKEUP_EVENT_EN_INT_Msk (0x1UL) /*!< SDMMC WAKEUP_CTRL: WAKEUP_EVENT_EN_INT (Bitfield-Mask: 0x01) */ +#define SDMMC_WAKEUP_CTRL_WAKEUP_EVENT_EN_INS_Pos (1UL) /*!< SDMMC WAKEUP_CTRL: WAKEUP_EVENT_EN_INS (Bit 1) */ +#define SDMMC_WAKEUP_CTRL_WAKEUP_EVENT_EN_INS_Msk (0x2UL) /*!< SDMMC WAKEUP_CTRL: WAKEUP_EVENT_EN_INS (Bitfield-Mask: 0x01) */ +#define SDMMC_WAKEUP_CTRL_WAKEUP_EVENT_EN_REM_Pos (2UL) /*!< SDMMC WAKEUP_CTRL: WAKEUP_EVENT_EN_REM (Bit 2) */ +#define SDMMC_WAKEUP_CTRL_WAKEUP_EVENT_EN_REM_Msk (0x4UL) /*!< SDMMC WAKEUP_CTRL: WAKEUP_EVENT_EN_REM (Bitfield-Mask: 0x01) */ + +/* ------------------------------ SDMMC_CLOCK_CTRL ------------------------------ */ +#define SDMMC_CLOCK_CTRL_INTERNAL_CLOCK_EN_Pos (0UL) /*!< SDMMC CLOCK_CTRL: INTERNAL_CLOCK_EN (Bit 0) */ +#define SDMMC_CLOCK_CTRL_INTERNAL_CLOCK_EN_Msk (0x1UL) /*!< SDMMC CLOCK_CTRL: INTERNAL_CLOCK_EN (Bitfield-Mask: 0x01) */ +#define SDMMC_CLOCK_CTRL_INTERNAL_CLOCK_STABLE_Pos (1UL) /*!< SDMMC CLOCK_CTRL: INTERNAL_CLOCK_STABLE (Bit 1) */ +#define SDMMC_CLOCK_CTRL_INTERNAL_CLOCK_STABLE_Msk (0x2UL) /*!< SDMMC CLOCK_CTRL: INTERNAL_CLOCK_STABLE (Bitfield-Mask: 0x01) */ +#define SDMMC_CLOCK_CTRL_SDCLOCK_EN_Pos (2UL) /*!< SDMMC CLOCK_CTRL: SDCLOCK_EN (Bit 2) */ +#define SDMMC_CLOCK_CTRL_SDCLOCK_EN_Msk (0x4UL) /*!< SDMMC CLOCK_CTRL: SDCLOCK_EN (Bitfield-Mask: 0x01) */ +#define SDMMC_CLOCK_CTRL_SDCLK_FREQ_SEL_Pos (8UL) /*!< SDMMC CLOCK_CTRL: SDCLK_FREQ_SEL (Bit 8) */ +#define SDMMC_CLOCK_CTRL_SDCLK_FREQ_SEL_Msk (0xff00UL) /*!< SDMMC CLOCK_CTRL: SDCLK_FREQ_SEL (Bitfield-Mask: 0xff) */ + +/* ----------------------------- SDMMC_TIMEOUT_CTRL ----------------------------- */ +#define SDMMC_TIMEOUT_CTRL_DAT_TIMEOUT_CNT_VAL_Pos (0UL) /*!< SDMMC TIMEOUT_CTRL: DAT_TIMEOUT_CNT_VAL (Bit 0) */ +#define SDMMC_TIMEOUT_CTRL_DAT_TIMEOUT_CNT_VAL_Msk (0xfUL) /*!< SDMMC TIMEOUT_CTRL: DAT_TIMEOUT_CNT_VAL (Bitfield-Mask: 0x0f) */ + +/* ------------------------------- SDMMC_SW_RESET ------------------------------- */ +#define SDMMC_SW_RESET_SW_RST_ALL_Pos (0UL) /*!< SDMMC SW_RESET: SW_RST_ALL (Bit 0) */ +#define SDMMC_SW_RESET_SW_RST_ALL_Msk (0x1UL) /*!< SDMMC SW_RESET: SW_RST_ALL (Bitfield-Mask: 0x01) */ +#define SDMMC_SW_RESET_SW_RST_CMD_LINE_Pos (1UL) /*!< SDMMC SW_RESET: SW_RST_CMD_LINE (Bit 1) */ +#define SDMMC_SW_RESET_SW_RST_CMD_LINE_Msk (0x2UL) /*!< SDMMC SW_RESET: SW_RST_CMD_LINE (Bitfield-Mask: 0x01) */ +#define SDMMC_SW_RESET_SW_RST_DAT_LINE_Pos (2UL) /*!< SDMMC SW_RESET: SW_RST_DAT_LINE (Bit 2) */ +#define SDMMC_SW_RESET_SW_RST_DAT_LINE_Msk (0x4UL) /*!< SDMMC SW_RESET: SW_RST_DAT_LINE (Bitfield-Mask: 0x01) */ + +/* ---------------------------- SDMMC_INT_STATUS_NORM --------------------------- */ +#define SDMMC_INT_STATUS_NORM_CMD_COMPLETE_Pos (0UL) /*!< SDMMC INT_STATUS_NORM: CMD_COMPLETE (Bit 0) */ +#define SDMMC_INT_STATUS_NORM_CMD_COMPLETE_Msk (0x1UL) /*!< SDMMC INT_STATUS_NORM: CMD_COMPLETE (Bitfield-Mask: 0x01) */ +#define SDMMC_INT_STATUS_NORM_TX_COMPLETE_Pos (1UL) /*!< SDMMC INT_STATUS_NORM: TX_COMPLETE (Bit 1) */ +#define SDMMC_INT_STATUS_NORM_TX_COMPLETE_Msk (0x2UL) /*!< SDMMC INT_STATUS_NORM: TX_COMPLETE (Bitfield-Mask: 0x01) */ +#define SDMMC_INT_STATUS_NORM_BLOCK_GAP_EVENT_Pos (2UL) /*!< SDMMC INT_STATUS_NORM: BLOCK_GAP_EVENT (Bit 2) */ +#define SDMMC_INT_STATUS_NORM_BLOCK_GAP_EVENT_Msk (0x4UL) /*!< SDMMC INT_STATUS_NORM: BLOCK_GAP_EVENT (Bitfield-Mask: 0x01) */ +#define SDMMC_INT_STATUS_NORM_BUFF_WRITE_READY_Pos (4UL) /*!< SDMMC INT_STATUS_NORM: BUFF_WRITE_READY (Bit 4) */ +#define SDMMC_INT_STATUS_NORM_BUFF_WRITE_READY_Msk (0x10UL) /*!< SDMMC INT_STATUS_NORM: BUFF_WRITE_READY (Bitfield-Mask: 0x01) */ +#define SDMMC_INT_STATUS_NORM_BUFF_READ_READY_Pos (5UL) /*!< SDMMC INT_STATUS_NORM: BUFF_READ_READY (Bit 5) */ +#define SDMMC_INT_STATUS_NORM_BUFF_READ_READY_Msk (0x20UL) /*!< SDMMC INT_STATUS_NORM: BUFF_READ_READY (Bitfield-Mask: 0x01) */ +#define SDMMC_INT_STATUS_NORM_CARD_INS_Pos (6UL) /*!< SDMMC INT_STATUS_NORM: CARD_INS (Bit 6) */ +#define SDMMC_INT_STATUS_NORM_CARD_INS_Msk (0x40UL) /*!< SDMMC INT_STATUS_NORM: CARD_INS (Bitfield-Mask: 0x01) */ +#define SDMMC_INT_STATUS_NORM_CARD_REMOVAL_Pos (7UL) /*!< SDMMC INT_STATUS_NORM: CARD_REMOVAL (Bit 7) */ +#define SDMMC_INT_STATUS_NORM_CARD_REMOVAL_Msk (0x80UL) /*!< SDMMC INT_STATUS_NORM: CARD_REMOVAL (Bitfield-Mask: 0x01) */ +#define SDMMC_INT_STATUS_NORM_CARD_INT_Pos (8UL) /*!< SDMMC INT_STATUS_NORM: CARD_INT (Bit 8) */ +#define SDMMC_INT_STATUS_NORM_CARD_INT_Msk (0x100UL) /*!< SDMMC INT_STATUS_NORM: CARD_INT (Bitfield-Mask: 0x01) */ +#define SDMMC_INT_STATUS_NORM_ERR_INT_Pos (15UL) /*!< SDMMC INT_STATUS_NORM: ERR_INT (Bit 15) */ +#define SDMMC_INT_STATUS_NORM_ERR_INT_Msk (0x8000UL) /*!< SDMMC INT_STATUS_NORM: ERR_INT (Bitfield-Mask: 0x01) */ + +/* ---------------------------- SDMMC_INT_STATUS_ERR ---------------------------- */ +#define SDMMC_INT_STATUS_ERR_CMD_TIMEOUT_ERR_Pos (0UL) /*!< SDMMC INT_STATUS_ERR: CMD_TIMEOUT_ERR (Bit 0) */ +#define SDMMC_INT_STATUS_ERR_CMD_TIMEOUT_ERR_Msk (0x1UL) /*!< SDMMC INT_STATUS_ERR: CMD_TIMEOUT_ERR (Bitfield-Mask: 0x01) */ +#define SDMMC_INT_STATUS_ERR_CMD_CRC_ERR_Pos (1UL) /*!< SDMMC INT_STATUS_ERR: CMD_CRC_ERR (Bit 1) */ +#define SDMMC_INT_STATUS_ERR_CMD_CRC_ERR_Msk (0x2UL) /*!< SDMMC INT_STATUS_ERR: CMD_CRC_ERR (Bitfield-Mask: 0x01) */ +#define SDMMC_INT_STATUS_ERR_CMD_END_BIT_ERR_Pos (2UL) /*!< SDMMC INT_STATUS_ERR: CMD_END_BIT_ERR (Bit 2) */ +#define SDMMC_INT_STATUS_ERR_CMD_END_BIT_ERR_Msk (0x4UL) /*!< SDMMC INT_STATUS_ERR: CMD_END_BIT_ERR (Bitfield-Mask: 0x01) */ +#define SDMMC_INT_STATUS_ERR_CMD_IND_ERR_Pos (3UL) /*!< SDMMC INT_STATUS_ERR: CMD_IND_ERR (Bit 3) */ +#define SDMMC_INT_STATUS_ERR_CMD_IND_ERR_Msk (0x8UL) /*!< SDMMC INT_STATUS_ERR: CMD_IND_ERR (Bitfield-Mask: 0x01) */ +#define SDMMC_INT_STATUS_ERR_DATA_TIMEOUT_ERR_Pos (4UL) /*!< SDMMC INT_STATUS_ERR: DATA_TIMEOUT_ERR (Bit 4) */ +#define SDMMC_INT_STATUS_ERR_DATA_TIMEOUT_ERR_Msk (0x10UL) /*!< SDMMC INT_STATUS_ERR: DATA_TIMEOUT_ERR (Bitfield-Mask: 0x01) */ +#define SDMMC_INT_STATUS_ERR_DATA_CRC_ERR_Pos (5UL) /*!< SDMMC INT_STATUS_ERR: DATA_CRC_ERR (Bit 5) */ +#define SDMMC_INT_STATUS_ERR_DATA_CRC_ERR_Msk (0x20UL) /*!< SDMMC INT_STATUS_ERR: DATA_CRC_ERR (Bitfield-Mask: 0x01) */ +#define SDMMC_INT_STATUS_ERR_DATA_END_BIT_ERR_Pos (6UL) /*!< SDMMC INT_STATUS_ERR: DATA_END_BIT_ERR (Bit 6) */ +#define SDMMC_INT_STATUS_ERR_DATA_END_BIT_ERR_Msk (0x40UL) /*!< SDMMC INT_STATUS_ERR: DATA_END_BIT_ERR (Bitfield-Mask: 0x01) */ +#define SDMMC_INT_STATUS_ERR_CURRENT_LIMIT_ERR_Pos (7UL) /*!< SDMMC INT_STATUS_ERR: CURRENT_LIMIT_ERR (Bit 7) */ +#define SDMMC_INT_STATUS_ERR_CURRENT_LIMIT_ERR_Msk (0x80UL) /*!< SDMMC INT_STATUS_ERR: CURRENT_LIMIT_ERR (Bitfield-Mask: 0x01) */ +#define SDMMC_INT_STATUS_ERR_ACMD_ERR_Pos (8UL) /*!< SDMMC INT_STATUS_ERR: ACMD_ERR (Bit 8) */ +#define SDMMC_INT_STATUS_ERR_ACMD_ERR_Msk (0x100UL) /*!< SDMMC INT_STATUS_ERR: ACMD_ERR (Bitfield-Mask: 0x01) */ +#define SDMMC_INT_STATUS_ERR_CEATA_ERR_Pos (13UL) /*!< SDMMC INT_STATUS_ERR: CEATA_ERR (Bit 13) */ +#define SDMMC_INT_STATUS_ERR_CEATA_ERR_Msk (0x2000UL) /*!< SDMMC INT_STATUS_ERR: CEATA_ERR (Bitfield-Mask: 0x01) */ + +/* -------------------------- SDMMC_EN_INT_STATUS_NORM -------------------------- */ +#define SDMMC_EN_INT_STATUS_NORM_CMD_COMPLETE_EN_Pos (0UL) /*!< SDMMC EN_INT_STATUS_NORM: CMD_COMPLETE_EN (Bit 0) */ +#define SDMMC_EN_INT_STATUS_NORM_CMD_COMPLETE_EN_Msk (0x1UL) /*!< SDMMC EN_INT_STATUS_NORM: CMD_COMPLETE_EN (Bitfield-Mask: 0x01) */ +#define SDMMC_EN_INT_STATUS_NORM_TX_COMPLETE_EN_Pos (1UL) /*!< SDMMC EN_INT_STATUS_NORM: TX_COMPLETE_EN (Bit 1) */ +#define SDMMC_EN_INT_STATUS_NORM_TX_COMPLETE_EN_Msk (0x2UL) /*!< SDMMC EN_INT_STATUS_NORM: TX_COMPLETE_EN (Bitfield-Mask: 0x01) */ +#define SDMMC_EN_INT_STATUS_NORM_BLOCK_GAP_EVENT_EN_Pos (2UL) /*!< SDMMC EN_INT_STATUS_NORM: BLOCK_GAP_EVENT_EN (Bit 2) */ +#define SDMMC_EN_INT_STATUS_NORM_BLOCK_GAP_EVENT_EN_Msk (0x4UL) /*!< SDMMC EN_INT_STATUS_NORM: BLOCK_GAP_EVENT_EN (Bitfield-Mask: 0x01) */ +#define SDMMC_EN_INT_STATUS_NORM_BUFF_WRITE_READY_EN_Pos (4UL) /*!< SDMMC EN_INT_STATUS_NORM: BUFF_WRITE_READY_EN (Bit 4) */ +#define SDMMC_EN_INT_STATUS_NORM_BUFF_WRITE_READY_EN_Msk (0x10UL) /*!< SDMMC EN_INT_STATUS_NORM: BUFF_WRITE_READY_EN (Bitfield-Mask: 0x01) */ +#define SDMMC_EN_INT_STATUS_NORM_BUFF_READ_READY_EN_Pos (5UL) /*!< SDMMC EN_INT_STATUS_NORM: BUFF_READ_READY_EN (Bit 5) */ +#define SDMMC_EN_INT_STATUS_NORM_BUFF_READ_READY_EN_Msk (0x20UL) /*!< SDMMC EN_INT_STATUS_NORM: BUFF_READ_READY_EN (Bitfield-Mask: 0x01) */ +#define SDMMC_EN_INT_STATUS_NORM_CARD_INS_EN_Pos (6UL) /*!< SDMMC EN_INT_STATUS_NORM: CARD_INS_EN (Bit 6) */ +#define SDMMC_EN_INT_STATUS_NORM_CARD_INS_EN_Msk (0x40UL) /*!< SDMMC EN_INT_STATUS_NORM: CARD_INS_EN (Bitfield-Mask: 0x01) */ +#define SDMMC_EN_INT_STATUS_NORM_CARD_REMOVAL_EN_Pos (7UL) /*!< SDMMC EN_INT_STATUS_NORM: CARD_REMOVAL_EN (Bit 7) */ +#define SDMMC_EN_INT_STATUS_NORM_CARD_REMOVAL_EN_Msk (0x80UL) /*!< SDMMC EN_INT_STATUS_NORM: CARD_REMOVAL_EN (Bitfield-Mask: 0x01) */ +#define SDMMC_EN_INT_STATUS_NORM_CARD_INT_EN_Pos (8UL) /*!< SDMMC EN_INT_STATUS_NORM: CARD_INT_EN (Bit 8) */ +#define SDMMC_EN_INT_STATUS_NORM_CARD_INT_EN_Msk (0x100UL) /*!< SDMMC EN_INT_STATUS_NORM: CARD_INT_EN (Bitfield-Mask: 0x01) */ +#define SDMMC_EN_INT_STATUS_NORM_FIXED_TO_0_Pos (15UL) /*!< SDMMC EN_INT_STATUS_NORM: FIXED_TO_0 (Bit 15) */ +#define SDMMC_EN_INT_STATUS_NORM_FIXED_TO_0_Msk (0x8000UL) /*!< SDMMC EN_INT_STATUS_NORM: FIXED_TO_0 (Bitfield-Mask: 0x01) */ + +/* --------------------------- SDMMC_EN_INT_STATUS_ERR -------------------------- */ +#define SDMMC_EN_INT_STATUS_ERR_CMD_TIMEOUT_ERR_EN_Pos (0UL) /*!< SDMMC EN_INT_STATUS_ERR: CMD_TIMEOUT_ERR_EN (Bit 0) */ +#define SDMMC_EN_INT_STATUS_ERR_CMD_TIMEOUT_ERR_EN_Msk (0x1UL) /*!< SDMMC EN_INT_STATUS_ERR: CMD_TIMEOUT_ERR_EN (Bitfield-Mask: 0x01) */ +#define SDMMC_EN_INT_STATUS_ERR_CMD_CRC_ERR_EN_Pos (1UL) /*!< SDMMC EN_INT_STATUS_ERR: CMD_CRC_ERR_EN (Bit 1) */ +#define SDMMC_EN_INT_STATUS_ERR_CMD_CRC_ERR_EN_Msk (0x2UL) /*!< SDMMC EN_INT_STATUS_ERR: CMD_CRC_ERR_EN (Bitfield-Mask: 0x01) */ +#define SDMMC_EN_INT_STATUS_ERR_CMD_END_BIT_ERR_EN_Pos (2UL) /*!< SDMMC EN_INT_STATUS_ERR: CMD_END_BIT_ERR_EN (Bit 2) */ +#define SDMMC_EN_INT_STATUS_ERR_CMD_END_BIT_ERR_EN_Msk (0x4UL) /*!< SDMMC EN_INT_STATUS_ERR: CMD_END_BIT_ERR_EN (Bitfield-Mask: 0x01) */ +#define SDMMC_EN_INT_STATUS_ERR_CMD_IND_ERR_EN_Pos (3UL) /*!< SDMMC EN_INT_STATUS_ERR: CMD_IND_ERR_EN (Bit 3) */ +#define SDMMC_EN_INT_STATUS_ERR_CMD_IND_ERR_EN_Msk (0x8UL) /*!< SDMMC EN_INT_STATUS_ERR: CMD_IND_ERR_EN (Bitfield-Mask: 0x01) */ +#define SDMMC_EN_INT_STATUS_ERR_DATA_TIMEOUT_ERR_EN_Pos (4UL) /*!< SDMMC EN_INT_STATUS_ERR: DATA_TIMEOUT_ERR_EN (Bit 4) */ +#define SDMMC_EN_INT_STATUS_ERR_DATA_TIMEOUT_ERR_EN_Msk (0x10UL) /*!< SDMMC EN_INT_STATUS_ERR: DATA_TIMEOUT_ERR_EN (Bitfield-Mask: 0x01) */ +#define SDMMC_EN_INT_STATUS_ERR_DATA_CRC_ERR_EN_Pos (5UL) /*!< SDMMC EN_INT_STATUS_ERR: DATA_CRC_ERR_EN (Bit 5) */ +#define SDMMC_EN_INT_STATUS_ERR_DATA_CRC_ERR_EN_Msk (0x20UL) /*!< SDMMC EN_INT_STATUS_ERR: DATA_CRC_ERR_EN (Bitfield-Mask: 0x01) */ +#define SDMMC_EN_INT_STATUS_ERR_DATA_END_BIT_ERR_EN_Pos (6UL) /*!< SDMMC EN_INT_STATUS_ERR: DATA_END_BIT_ERR_EN (Bit 6) */ +#define SDMMC_EN_INT_STATUS_ERR_DATA_END_BIT_ERR_EN_Msk (0x40UL) /*!< SDMMC EN_INT_STATUS_ERR: DATA_END_BIT_ERR_EN (Bitfield-Mask: 0x01) */ +#define SDMMC_EN_INT_STATUS_ERR_CURRENT_LIMIT_ERR_EN_Pos (7UL) /*!< SDMMC EN_INT_STATUS_ERR: CURRENT_LIMIT_ERR_EN (Bit 7) */ +#define SDMMC_EN_INT_STATUS_ERR_CURRENT_LIMIT_ERR_EN_Msk (0x80UL) /*!< SDMMC EN_INT_STATUS_ERR: CURRENT_LIMIT_ERR_EN (Bitfield-Mask: 0x01) */ +#define SDMMC_EN_INT_STATUS_ERR_ACMD_ERR_EN_Pos (8UL) /*!< SDMMC EN_INT_STATUS_ERR: ACMD_ERR_EN (Bit 8) */ +#define SDMMC_EN_INT_STATUS_ERR_ACMD_ERR_EN_Msk (0x100UL) /*!< SDMMC EN_INT_STATUS_ERR: ACMD_ERR_EN (Bitfield-Mask: 0x01) */ +#define SDMMC_EN_INT_STATUS_ERR_TARGET_RESP_ERR_EN_Pos (12UL) /*!< SDMMC EN_INT_STATUS_ERR: TARGET_RESP_ERR_EN (Bit 12) */ +#define SDMMC_EN_INT_STATUS_ERR_TARGET_RESP_ERR_EN_Msk (0x1000UL) /*!< SDMMC EN_INT_STATUS_ERR: TARGET_RESP_ERR_EN (Bitfield-Mask: 0x01) */ +#define SDMMC_EN_INT_STATUS_ERR_CEATA_ERR_EN_Pos (13UL) /*!< SDMMC EN_INT_STATUS_ERR: CEATA_ERR_EN (Bit 13) */ +#define SDMMC_EN_INT_STATUS_ERR_CEATA_ERR_EN_Msk (0x2000UL) /*!< SDMMC EN_INT_STATUS_ERR: CEATA_ERR_EN (Bitfield-Mask: 0x01) */ + +/* -------------------------- SDMMC_EN_INT_SIGNAL_NORM -------------------------- */ +#define SDMMC_EN_INT_SIGNAL_NORM_CMD_COMPLETE_EN_Pos (0UL) /*!< SDMMC EN_INT_SIGNAL_NORM: CMD_COMPLETE_EN (Bit 0) */ +#define SDMMC_EN_INT_SIGNAL_NORM_CMD_COMPLETE_EN_Msk (0x1UL) /*!< SDMMC EN_INT_SIGNAL_NORM: CMD_COMPLETE_EN (Bitfield-Mask: 0x01) */ +#define SDMMC_EN_INT_SIGNAL_NORM_TX_COMPLETE_EN_Pos (1UL) /*!< SDMMC EN_INT_SIGNAL_NORM: TX_COMPLETE_EN (Bit 1) */ +#define SDMMC_EN_INT_SIGNAL_NORM_TX_COMPLETE_EN_Msk (0x2UL) /*!< SDMMC EN_INT_SIGNAL_NORM: TX_COMPLETE_EN (Bitfield-Mask: 0x01) */ +#define SDMMC_EN_INT_SIGNAL_NORM_BLOCK_GAP_EVENT_EN_Pos (2UL) /*!< SDMMC EN_INT_SIGNAL_NORM: BLOCK_GAP_EVENT_EN (Bit 2) */ +#define SDMMC_EN_INT_SIGNAL_NORM_BLOCK_GAP_EVENT_EN_Msk (0x4UL) /*!< SDMMC EN_INT_SIGNAL_NORM: BLOCK_GAP_EVENT_EN (Bitfield-Mask: 0x01) */ +#define SDMMC_EN_INT_SIGNAL_NORM_BUFF_WRITE_READY_EN_Pos (4UL) /*!< SDMMC EN_INT_SIGNAL_NORM: BUFF_WRITE_READY_EN (Bit 4) */ +#define SDMMC_EN_INT_SIGNAL_NORM_BUFF_WRITE_READY_EN_Msk (0x10UL) /*!< SDMMC EN_INT_SIGNAL_NORM: BUFF_WRITE_READY_EN (Bitfield-Mask: 0x01) */ +#define SDMMC_EN_INT_SIGNAL_NORM_BUFF_READ_READY_EN_Pos (5UL) /*!< SDMMC EN_INT_SIGNAL_NORM: BUFF_READ_READY_EN (Bit 5) */ +#define SDMMC_EN_INT_SIGNAL_NORM_BUFF_READ_READY_EN_Msk (0x20UL) /*!< SDMMC EN_INT_SIGNAL_NORM: BUFF_READ_READY_EN (Bitfield-Mask: 0x01) */ +#define SDMMC_EN_INT_SIGNAL_NORM_CARD_INS_EN_Pos (6UL) /*!< SDMMC EN_INT_SIGNAL_NORM: CARD_INS_EN (Bit 6) */ +#define SDMMC_EN_INT_SIGNAL_NORM_CARD_INS_EN_Msk (0x40UL) /*!< SDMMC EN_INT_SIGNAL_NORM: CARD_INS_EN (Bitfield-Mask: 0x01) */ +#define SDMMC_EN_INT_SIGNAL_NORM_CARD_REMOVAL_EN_Pos (7UL) /*!< SDMMC EN_INT_SIGNAL_NORM: CARD_REMOVAL_EN (Bit 7) */ +#define SDMMC_EN_INT_SIGNAL_NORM_CARD_REMOVAL_EN_Msk (0x80UL) /*!< SDMMC EN_INT_SIGNAL_NORM: CARD_REMOVAL_EN (Bitfield-Mask: 0x01) */ +#define SDMMC_EN_INT_SIGNAL_NORM_CARD_INT_EN_Pos (8UL) /*!< SDMMC EN_INT_SIGNAL_NORM: CARD_INT_EN (Bit 8) */ +#define SDMMC_EN_INT_SIGNAL_NORM_CARD_INT_EN_Msk (0x100UL) /*!< SDMMC EN_INT_SIGNAL_NORM: CARD_INT_EN (Bitfield-Mask: 0x01) */ +#define SDMMC_EN_INT_SIGNAL_NORM_FIXED_TO_0_Pos (15UL) /*!< SDMMC EN_INT_SIGNAL_NORM: FIXED_TO_0 (Bit 15) */ +#define SDMMC_EN_INT_SIGNAL_NORM_FIXED_TO_0_Msk (0x8000UL) /*!< SDMMC EN_INT_SIGNAL_NORM: FIXED_TO_0 (Bitfield-Mask: 0x01) */ + +/* --------------------------- SDMMC_EN_INT_SIGNAL_ERR -------------------------- */ +#define SDMMC_EN_INT_SIGNAL_ERR_CMD_TIMEOUT_ERR_EN_Pos (0UL) /*!< SDMMC EN_INT_SIGNAL_ERR: CMD_TIMEOUT_ERR_EN (Bit 0) */ +#define SDMMC_EN_INT_SIGNAL_ERR_CMD_TIMEOUT_ERR_EN_Msk (0x1UL) /*!< SDMMC EN_INT_SIGNAL_ERR: CMD_TIMEOUT_ERR_EN (Bitfield-Mask: 0x01) */ +#define SDMMC_EN_INT_SIGNAL_ERR_CMD_CRC_ERR_EN_Pos (1UL) /*!< SDMMC EN_INT_SIGNAL_ERR: CMD_CRC_ERR_EN (Bit 1) */ +#define SDMMC_EN_INT_SIGNAL_ERR_CMD_CRC_ERR_EN_Msk (0x2UL) /*!< SDMMC EN_INT_SIGNAL_ERR: CMD_CRC_ERR_EN (Bitfield-Mask: 0x01) */ +#define SDMMC_EN_INT_SIGNAL_ERR_CMD_END_BIT_ERR_EN_Pos (2UL) /*!< SDMMC EN_INT_SIGNAL_ERR: CMD_END_BIT_ERR_EN (Bit 2) */ +#define SDMMC_EN_INT_SIGNAL_ERR_CMD_END_BIT_ERR_EN_Msk (0x4UL) /*!< SDMMC EN_INT_SIGNAL_ERR: CMD_END_BIT_ERR_EN (Bitfield-Mask: 0x01) */ +#define SDMMC_EN_INT_SIGNAL_ERR_CMD_IND_ERR_EN_Pos (3UL) /*!< SDMMC EN_INT_SIGNAL_ERR: CMD_IND_ERR_EN (Bit 3) */ +#define SDMMC_EN_INT_SIGNAL_ERR_CMD_IND_ERR_EN_Msk (0x8UL) /*!< SDMMC EN_INT_SIGNAL_ERR: CMD_IND_ERR_EN (Bitfield-Mask: 0x01) */ +#define SDMMC_EN_INT_SIGNAL_ERR_DATA_TIMEOUT_ERR_EN_Pos (4UL) /*!< SDMMC EN_INT_SIGNAL_ERR: DATA_TIMEOUT_ERR_EN (Bit 4) */ +#define SDMMC_EN_INT_SIGNAL_ERR_DATA_TIMEOUT_ERR_EN_Msk (0x10UL) /*!< SDMMC EN_INT_SIGNAL_ERR: DATA_TIMEOUT_ERR_EN (Bitfield-Mask: 0x01) */ +#define SDMMC_EN_INT_SIGNAL_ERR_DATA_CRC_ERR_EN_Pos (5UL) /*!< SDMMC EN_INT_SIGNAL_ERR: DATA_CRC_ERR_EN (Bit 5) */ +#define SDMMC_EN_INT_SIGNAL_ERR_DATA_CRC_ERR_EN_Msk (0x20UL) /*!< SDMMC EN_INT_SIGNAL_ERR: DATA_CRC_ERR_EN (Bitfield-Mask: 0x01) */ +#define SDMMC_EN_INT_SIGNAL_ERR_DATA_END_BIT_ERR_EN_Pos (6UL) /*!< SDMMC EN_INT_SIGNAL_ERR: DATA_END_BIT_ERR_EN (Bit 6) */ +#define SDMMC_EN_INT_SIGNAL_ERR_DATA_END_BIT_ERR_EN_Msk (0x40UL) /*!< SDMMC EN_INT_SIGNAL_ERR: DATA_END_BIT_ERR_EN (Bitfield-Mask: 0x01) */ +#define SDMMC_EN_INT_SIGNAL_ERR_CURRENT_LIMIT_ERR_EN_Pos (7UL) /*!< SDMMC EN_INT_SIGNAL_ERR: CURRENT_LIMIT_ERR_EN (Bit 7) */ +#define SDMMC_EN_INT_SIGNAL_ERR_CURRENT_LIMIT_ERR_EN_Msk (0x80UL) /*!< SDMMC EN_INT_SIGNAL_ERR: CURRENT_LIMIT_ERR_EN (Bitfield-Mask: 0x01) */ +#define SDMMC_EN_INT_SIGNAL_ERR_ACMD_ERR_EN_Pos (8UL) /*!< SDMMC EN_INT_SIGNAL_ERR: ACMD_ERR_EN (Bit 8) */ +#define SDMMC_EN_INT_SIGNAL_ERR_ACMD_ERR_EN_Msk (0x100UL) /*!< SDMMC EN_INT_SIGNAL_ERR: ACMD_ERR_EN (Bitfield-Mask: 0x01) */ +#define SDMMC_EN_INT_SIGNAL_ERR_TARGET_RESP_ERR_EN_Pos (12UL) /*!< SDMMC EN_INT_SIGNAL_ERR: TARGET_RESP_ERR_EN (Bit 12) */ +#define SDMMC_EN_INT_SIGNAL_ERR_TARGET_RESP_ERR_EN_Msk (0x1000UL) /*!< SDMMC EN_INT_SIGNAL_ERR: TARGET_RESP_ERR_EN (Bitfield-Mask: 0x01) */ +#define SDMMC_EN_INT_SIGNAL_ERR_CEATA_ERR_EN_Pos (13UL) /*!< SDMMC EN_INT_SIGNAL_ERR: CEATA_ERR_EN (Bit 13) */ +#define SDMMC_EN_INT_SIGNAL_ERR_CEATA_ERR_EN_Msk (0x2000UL) /*!< SDMMC EN_INT_SIGNAL_ERR: CEATA_ERR_EN (Bitfield-Mask: 0x01) */ + +/* ---------------------------- SDMMC_ACMD_ERR_STATUS --------------------------- */ +#define SDMMC_ACMD_ERR_STATUS_ACMD12_NOT_EXEC_ERR_Pos (0UL) /*!< SDMMC ACMD_ERR_STATUS: ACMD12_NOT_EXEC_ERR (Bit 0) */ +#define SDMMC_ACMD_ERR_STATUS_ACMD12_NOT_EXEC_ERR_Msk (0x1UL) /*!< SDMMC ACMD_ERR_STATUS: ACMD12_NOT_EXEC_ERR (Bitfield-Mask: 0x01) */ +#define SDMMC_ACMD_ERR_STATUS_ACMD_TIMEOUT_ERR_Pos (1UL) /*!< SDMMC ACMD_ERR_STATUS: ACMD_TIMEOUT_ERR (Bit 1) */ +#define SDMMC_ACMD_ERR_STATUS_ACMD_TIMEOUT_ERR_Msk (0x2UL) /*!< SDMMC ACMD_ERR_STATUS: ACMD_TIMEOUT_ERR (Bitfield-Mask: 0x01) */ +#define SDMMC_ACMD_ERR_STATUS_ACMD_CRC_ERR_Pos (2UL) /*!< SDMMC ACMD_ERR_STATUS: ACMD_CRC_ERR (Bit 2) */ +#define SDMMC_ACMD_ERR_STATUS_ACMD_CRC_ERR_Msk (0x4UL) /*!< SDMMC ACMD_ERR_STATUS: ACMD_CRC_ERR (Bitfield-Mask: 0x01) */ +#define SDMMC_ACMD_ERR_STATUS_ACMD_END_BIT_ERR_Pos (3UL) /*!< SDMMC ACMD_ERR_STATUS: ACMD_END_BIT_ERR (Bit 3) */ +#define SDMMC_ACMD_ERR_STATUS_ACMD_END_BIT_ERR_Msk (0x8UL) /*!< SDMMC ACMD_ERR_STATUS: ACMD_END_BIT_ERR (Bitfield-Mask: 0x01) */ +#define SDMMC_ACMD_ERR_STATUS_ACMD_IND_ERR_Pos (4UL) /*!< SDMMC ACMD_ERR_STATUS: ACMD_IND_ERR (Bit 4) */ +#define SDMMC_ACMD_ERR_STATUS_ACMD_IND_ERR_Msk (0x10UL) /*!< SDMMC ACMD_ERR_STATUS: ACMD_IND_ERR (Bitfield-Mask: 0x01) */ +#define SDMMC_ACMD_ERR_STATUS_CMD_NOT_ISSUED_BY_ACMD12_ERR_Pos (7UL) /*!< SDMMC ACMD_ERR_STATUS: CMD_NOT_ISSUED_BY_ACMD12_ERR (Bit 7) */ +#define SDMMC_ACMD_ERR_STATUS_CMD_NOT_ISSUED_BY_ACMD12_ERR_Msk (0x80UL) /*!< SDMMC ACMD_ERR_STATUS: CMD_NOT_ISSUED_BY_ACMD12_ERR (Bitfield-Mask: 0x01) */ + +/* ----------------------------- SDMMC_CAPABILITIES ----------------------------- */ +#define SDMMC_CAPABILITIES_TIMEOUT_CLOCK_FREQ_Pos (0UL) /*!< SDMMC CAPABILITIES: TIMEOUT_CLOCK_FREQ (Bit 0) */ +#define SDMMC_CAPABILITIES_TIMEOUT_CLOCK_FREQ_Msk (0x3fUL) /*!< SDMMC CAPABILITIES: TIMEOUT_CLOCK_FREQ (Bitfield-Mask: 0x3f) */ +#define SDMMC_CAPABILITIES_TIMEOUT_CLOCK_UNIT_Pos (7UL) /*!< SDMMC CAPABILITIES: TIMEOUT_CLOCK_UNIT (Bit 7) */ +#define SDMMC_CAPABILITIES_TIMEOUT_CLOCK_UNIT_Msk (0x80UL) /*!< SDMMC CAPABILITIES: TIMEOUT_CLOCK_UNIT (Bitfield-Mask: 0x01) */ +#define SDMMC_CAPABILITIES_BASE_SD_CLOCK_FREQ_Pos (8UL) /*!< SDMMC CAPABILITIES: BASE_SD_CLOCK_FREQ (Bit 8) */ +#define SDMMC_CAPABILITIES_BASE_SD_CLOCK_FREQ_Msk (0xff00UL) /*!< SDMMC CAPABILITIES: BASE_SD_CLOCK_FREQ (Bitfield-Mask: 0xff) */ +#define SDMMC_CAPABILITIES_MAX_BLOCK_LENGTH_Pos (16UL) /*!< SDMMC CAPABILITIES: MAX_BLOCK_LENGTH (Bit 16) */ +#define SDMMC_CAPABILITIES_MAX_BLOCK_LENGTH_Msk (0x30000UL) /*!< SDMMC CAPABILITIES: MAX_BLOCK_LENGTH (Bitfield-Mask: 0x03) */ +#define SDMMC_CAPABILITIES_EXT_MEDIA_BUS_SUPPORT_Pos (18UL) /*!< SDMMC CAPABILITIES: EXT_MEDIA_BUS_SUPPORT (Bit 18) */ +#define SDMMC_CAPABILITIES_EXT_MEDIA_BUS_SUPPORT_Msk (0x40000UL) /*!< SDMMC CAPABILITIES: EXT_MEDIA_BUS_SUPPORT (Bitfield-Mask: 0x01) */ +#define SDMMC_CAPABILITIES_ADMA2_SUPPORT_Pos (19UL) /*!< SDMMC CAPABILITIES: ADMA2_SUPPORT (Bit 19) */ +#define SDMMC_CAPABILITIES_ADMA2_SUPPORT_Msk (0x80000UL) /*!< SDMMC CAPABILITIES: ADMA2_SUPPORT (Bitfield-Mask: 0x01) */ +#define SDMMC_CAPABILITIES_HIGH_SPEED_SUPPORT_Pos (21UL) /*!< SDMMC CAPABILITIES: HIGH_SPEED_SUPPORT (Bit 21) */ +#define SDMMC_CAPABILITIES_HIGH_SPEED_SUPPORT_Msk (0x200000UL) /*!< SDMMC CAPABILITIES: HIGH_SPEED_SUPPORT (Bitfield-Mask: 0x01) */ +#define SDMMC_CAPABILITIES_SDMA_SUPPORT_Pos (22UL) /*!< SDMMC CAPABILITIES: SDMA_SUPPORT (Bit 22) */ +#define SDMMC_CAPABILITIES_SDMA_SUPPORT_Msk (0x400000UL) /*!< SDMMC CAPABILITIES: SDMA_SUPPORT (Bitfield-Mask: 0x01) */ +#define SDMMC_CAPABILITIES_SUSPEND_RESUME_SUPPORT_Pos (23UL) /*!< SDMMC CAPABILITIES: SUSPEND_RESUME_SUPPORT (Bit 23) */ +#define SDMMC_CAPABILITIES_SUSPEND_RESUME_SUPPORT_Msk (0x800000UL) /*!< SDMMC CAPABILITIES: SUSPEND_RESUME_SUPPORT (Bitfield-Mask: 0x01) */ +#define SDMMC_CAPABILITIES_VOLTAGE_SUPPORT_3_3V_Pos (24UL) /*!< SDMMC CAPABILITIES: VOLTAGE_SUPPORT_3_3V (Bit 24) */ +#define SDMMC_CAPABILITIES_VOLTAGE_SUPPORT_3_3V_Msk (0x1000000UL) /*!< SDMMC CAPABILITIES: VOLTAGE_SUPPORT_3_3V (Bitfield-Mask: 0x01) */ +#define SDMMC_CAPABILITIES_VOLTAGE_SUPPORT_3V_Pos (25UL) /*!< SDMMC CAPABILITIES: VOLTAGE_SUPPORT_3V (Bit 25) */ +#define SDMMC_CAPABILITIES_VOLTAGE_SUPPORT_3V_Msk (0x2000000UL) /*!< SDMMC CAPABILITIES: VOLTAGE_SUPPORT_3V (Bitfield-Mask: 0x01) */ +#define SDMMC_CAPABILITIES_VOLTAGE_SUPPORT_1_8V_Pos (26UL) /*!< SDMMC CAPABILITIES: VOLTAGE_SUPPORT_1_8V (Bit 26) */ +#define SDMMC_CAPABILITIES_VOLTAGE_SUPPORT_1_8V_Msk (0x4000000UL) /*!< SDMMC CAPABILITIES: VOLTAGE_SUPPORT_1_8V (Bitfield-Mask: 0x01) */ +#define SDMMC_CAPABILITIES_SYSBUS_64_SUPPORT_Pos (28UL) /*!< SDMMC CAPABILITIES: SYSBUS_64_SUPPORT (Bit 28) */ +#define SDMMC_CAPABILITIES_SYSBUS_64_SUPPORT_Msk (0x10000000UL) /*!< SDMMC CAPABILITIES: SYSBUS_64_SUPPORT (Bitfield-Mask: 0x01) */ +#define SDMMC_CAPABILITIES_ASYNC_INT_SUPPORT_Pos (29UL) /*!< SDMMC CAPABILITIES: ASYNC_INT_SUPPORT (Bit 29) */ +#define SDMMC_CAPABILITIES_ASYNC_INT_SUPPORT_Msk (0x20000000UL) /*!< SDMMC CAPABILITIES: ASYNC_INT_SUPPORT (Bitfield-Mask: 0x01) */ +#define SDMMC_CAPABILITIES_SLOT_TYPE_Pos (30UL) /*!< SDMMC CAPABILITIES: SLOT_TYPE (Bit 30) */ +#define SDMMC_CAPABILITIES_SLOT_TYPE_Msk (0xc0000000UL) /*!< SDMMC CAPABILITIES: SLOT_TYPE (Bitfield-Mask: 0x03) */ + +/* ---------------------------- SDMMC_CAPABILITIES_HI --------------------------- */ +#define SDMMC_CAPABILITIES_HI_SDR50_SUPPORT_Pos (0UL) /*!< SDMMC CAPABILITIES_HI: SDR50_SUPPORT (Bit 0) */ +#define SDMMC_CAPABILITIES_HI_SDR50_SUPPORT_Msk (0x1UL) /*!< SDMMC CAPABILITIES_HI: SDR50_SUPPORT (Bitfield-Mask: 0x01) */ +#define SDMMC_CAPABILITIES_HI_SDR104_SUPPORT_Pos (1UL) /*!< SDMMC CAPABILITIES_HI: SDR104_SUPPORT (Bit 1) */ +#define SDMMC_CAPABILITIES_HI_SDR104_SUPPORT_Msk (0x2UL) /*!< SDMMC CAPABILITIES_HI: SDR104_SUPPORT (Bitfield-Mask: 0x01) */ +#define SDMMC_CAPABILITIES_HI_DDR50_SUPPORT_Pos (2UL) /*!< SDMMC CAPABILITIES_HI: DDR50_SUPPORT (Bit 2) */ +#define SDMMC_CAPABILITIES_HI_DDR50_SUPPORT_Msk (0x4UL) /*!< SDMMC CAPABILITIES_HI: DDR50_SUPPORT (Bitfield-Mask: 0x01) */ +#define SDMMC_CAPABILITIES_HI_DRV_A_SUPPORT_Pos (4UL) /*!< SDMMC CAPABILITIES_HI: DRV_A_SUPPORT (Bit 4) */ +#define SDMMC_CAPABILITIES_HI_DRV_A_SUPPORT_Msk (0x10UL) /*!< SDMMC CAPABILITIES_HI: DRV_A_SUPPORT (Bitfield-Mask: 0x01) */ +#define SDMMC_CAPABILITIES_HI_DRV_C_SUPPORT_Pos (5UL) /*!< SDMMC CAPABILITIES_HI: DRV_C_SUPPORT (Bit 5) */ +#define SDMMC_CAPABILITIES_HI_DRV_C_SUPPORT_Msk (0x20UL) /*!< SDMMC CAPABILITIES_HI: DRV_C_SUPPORT (Bitfield-Mask: 0x01) */ +#define SDMMC_CAPABILITIES_HI_DRV_D_SUPPORT_Pos (6UL) /*!< SDMMC CAPABILITIES_HI: DRV_D_SUPPORT (Bit 6) */ +#define SDMMC_CAPABILITIES_HI_DRV_D_SUPPORT_Msk (0x40UL) /*!< SDMMC CAPABILITIES_HI: DRV_D_SUPPORT (Bitfield-Mask: 0x01) */ +#define SDMMC_CAPABILITIES_HI_TIM_CNT_RETUNE_Pos (8UL) /*!< SDMMC CAPABILITIES_HI: TIM_CNT_RETUNE (Bit 8) */ +#define SDMMC_CAPABILITIES_HI_TIM_CNT_RETUNE_Msk (0xf00UL) /*!< SDMMC CAPABILITIES_HI: TIM_CNT_RETUNE (Bitfield-Mask: 0x0f) */ +#define SDMMC_CAPABILITIES_HI_USE_TUNING_SDR50_Pos (13UL) /*!< SDMMC CAPABILITIES_HI: USE_TUNING_SDR50 (Bit 13) */ +#define SDMMC_CAPABILITIES_HI_USE_TUNING_SDR50_Msk (0x2000UL) /*!< SDMMC CAPABILITIES_HI: USE_TUNING_SDR50 (Bitfield-Mask: 0x01) */ +#define SDMMC_CAPABILITIES_HI_RE_TUNING_MODES_Pos (14UL) /*!< SDMMC CAPABILITIES_HI: RE_TUNING_MODES (Bit 14) */ +#define SDMMC_CAPABILITIES_HI_RE_TUNING_MODES_Msk (0xc000UL) /*!< SDMMC CAPABILITIES_HI: RE_TUNING_MODES (Bitfield-Mask: 0x03) */ +#define SDMMC_CAPABILITIES_HI_CLK_MULT_Pos (16UL) /*!< SDMMC CAPABILITIES_HI: CLK_MULT (Bit 16) */ +#define SDMMC_CAPABILITIES_HI_CLK_MULT_Msk (0xff0000UL) /*!< SDMMC CAPABILITIES_HI: CLK_MULT (Bitfield-Mask: 0xff) */ + +/* ---------------------------- SDMMC_MAX_CURRENT_CAP --------------------------- */ +#define SDMMC_MAX_CURRENT_CAP_MAX_CURRENT_FOR_3_3V_Pos (0UL) /*!< SDMMC MAX_CURRENT_CAP: MAX_CURRENT_FOR_3_3V (Bit 0) */ +#define SDMMC_MAX_CURRENT_CAP_MAX_CURRENT_FOR_3_3V_Msk (0xffUL) /*!< SDMMC MAX_CURRENT_CAP: MAX_CURRENT_FOR_3_3V (Bitfield-Mask: 0xff) */ + +/* ---------------------- SDMMC_FORCE_EVENT_ACMD_ERR_STATUS --------------------- */ +#define SDMMC_FORCE_EVENT_ACMD_ERR_STATUS_FE_ACMD_NOT_EXEC_Pos (0UL) /*!< SDMMC FORCE_EVENT_ACMD_ERR_STATUS: FE_ACMD_NOT_EXEC (Bit 0) */ +#define SDMMC_FORCE_EVENT_ACMD_ERR_STATUS_FE_ACMD_NOT_EXEC_Msk (0x1UL) /*!< SDMMC FORCE_EVENT_ACMD_ERR_STATUS: FE_ACMD_NOT_EXEC (Bitfield-Mask: 0x01) */ +#define SDMMC_FORCE_EVENT_ACMD_ERR_STATUS_FE_ACMD_TIMEOUT_ERR_Pos (1UL) /*!< SDMMC FORCE_EVENT_ACMD_ERR_STATUS: FE_ACMD_TIMEOUT_ERR (Bit 1) */ +#define SDMMC_FORCE_EVENT_ACMD_ERR_STATUS_FE_ACMD_TIMEOUT_ERR_Msk (0x2UL) /*!< SDMMC FORCE_EVENT_ACMD_ERR_STATUS: FE_ACMD_TIMEOUT_ERR (Bitfield-Mask: 0x01) */ +#define SDMMC_FORCE_EVENT_ACMD_ERR_STATUS_FE_ACMD_CRC_ERR_Pos (2UL) /*!< SDMMC FORCE_EVENT_ACMD_ERR_STATUS: FE_ACMD_CRC_ERR (Bit 2) */ +#define SDMMC_FORCE_EVENT_ACMD_ERR_STATUS_FE_ACMD_CRC_ERR_Msk (0x4UL) /*!< SDMMC FORCE_EVENT_ACMD_ERR_STATUS: FE_ACMD_CRC_ERR (Bitfield-Mask: 0x01) */ +#define SDMMC_FORCE_EVENT_ACMD_ERR_STATUS_FE_ACMD_END_BIT_ERR_Pos (3UL) /*!< SDMMC FORCE_EVENT_ACMD_ERR_STATUS: FE_ACMD_END_BIT_ERR (Bit 3) */ +#define SDMMC_FORCE_EVENT_ACMD_ERR_STATUS_FE_ACMD_END_BIT_ERR_Msk (0x8UL) /*!< SDMMC FORCE_EVENT_ACMD_ERR_STATUS: FE_ACMD_END_BIT_ERR (Bitfield-Mask: 0x01) */ +#define SDMMC_FORCE_EVENT_ACMD_ERR_STATUS_FE_ACMD_IND_ERR_Pos (4UL) /*!< SDMMC FORCE_EVENT_ACMD_ERR_STATUS: FE_ACMD_IND_ERR (Bit 4) */ +#define SDMMC_FORCE_EVENT_ACMD_ERR_STATUS_FE_ACMD_IND_ERR_Msk (0x10UL) /*!< SDMMC FORCE_EVENT_ACMD_ERR_STATUS: FE_ACMD_IND_ERR (Bitfield-Mask: 0x01) */ +#define SDMMC_FORCE_EVENT_ACMD_ERR_STATUS_FE_CMD_NOT_ISSUED_ACMD12_ERR_Pos (7UL) /*!< SDMMC FORCE_EVENT_ACMD_ERR_STATUS: FE_CMD_NOT_ISSUED_ACMD12_ERR (Bit 7) */ +#define SDMMC_FORCE_EVENT_ACMD_ERR_STATUS_FE_CMD_NOT_ISSUED_ACMD12_ERR_Msk (0x80UL) /*!< SDMMC FORCE_EVENT_ACMD_ERR_STATUS: FE_CMD_NOT_ISSUED_ACMD12_ERR (Bitfield-Mask: 0x01) */ + +/* ------------------------ SDMMC_FORCE_EVENT_ERR_STATUS ------------------------ */ +#define SDMMC_FORCE_EVENT_ERR_STATUS_FE_CMD_TIMEOUT_ERR_Pos (0UL) /*!< SDMMC FORCE_EVENT_ERR_STATUS: FE_CMD_TIMEOUT_ERR (Bit 0) */ +#define SDMMC_FORCE_EVENT_ERR_STATUS_FE_CMD_TIMEOUT_ERR_Msk (0x1UL) /*!< SDMMC FORCE_EVENT_ERR_STATUS: FE_CMD_TIMEOUT_ERR (Bitfield-Mask: 0x01) */ +#define SDMMC_FORCE_EVENT_ERR_STATUS_FE_CMD_CRC_ERR_Pos (1UL) /*!< SDMMC FORCE_EVENT_ERR_STATUS: FE_CMD_CRC_ERR (Bit 1) */ +#define SDMMC_FORCE_EVENT_ERR_STATUS_FE_CMD_CRC_ERR_Msk (0x2UL) /*!< SDMMC FORCE_EVENT_ERR_STATUS: FE_CMD_CRC_ERR (Bitfield-Mask: 0x01) */ +#define SDMMC_FORCE_EVENT_ERR_STATUS_FE_CMD_END_BIT_ERR_Pos (2UL) /*!< SDMMC FORCE_EVENT_ERR_STATUS: FE_CMD_END_BIT_ERR (Bit 2) */ +#define SDMMC_FORCE_EVENT_ERR_STATUS_FE_CMD_END_BIT_ERR_Msk (0x4UL) /*!< SDMMC FORCE_EVENT_ERR_STATUS: FE_CMD_END_BIT_ERR (Bitfield-Mask: 0x01) */ +#define SDMMC_FORCE_EVENT_ERR_STATUS_FE_CMD_IND_ERR_Pos (3UL) /*!< SDMMC FORCE_EVENT_ERR_STATUS: FE_CMD_IND_ERR (Bit 3) */ +#define SDMMC_FORCE_EVENT_ERR_STATUS_FE_CMD_IND_ERR_Msk (0x8UL) /*!< SDMMC FORCE_EVENT_ERR_STATUS: FE_CMD_IND_ERR (Bitfield-Mask: 0x01) */ +#define SDMMC_FORCE_EVENT_ERR_STATUS_FE_DATA_TIMEOUT_ERR_Pos (4UL) /*!< SDMMC FORCE_EVENT_ERR_STATUS: FE_DATA_TIMEOUT_ERR (Bit 4) */ +#define SDMMC_FORCE_EVENT_ERR_STATUS_FE_DATA_TIMEOUT_ERR_Msk (0x10UL) /*!< SDMMC FORCE_EVENT_ERR_STATUS: FE_DATA_TIMEOUT_ERR (Bitfield-Mask: 0x01) */ +#define SDMMC_FORCE_EVENT_ERR_STATUS_FE_DATA_CRC_ERR_Pos (5UL) /*!< SDMMC FORCE_EVENT_ERR_STATUS: FE_DATA_CRC_ERR (Bit 5) */ +#define SDMMC_FORCE_EVENT_ERR_STATUS_FE_DATA_CRC_ERR_Msk (0x20UL) /*!< SDMMC FORCE_EVENT_ERR_STATUS: FE_DATA_CRC_ERR (Bitfield-Mask: 0x01) */ +#define SDMMC_FORCE_EVENT_ERR_STATUS_FE_DATA_END_BIT_ERR_Pos (6UL) /*!< SDMMC FORCE_EVENT_ERR_STATUS: FE_DATA_END_BIT_ERR (Bit 6) */ +#define SDMMC_FORCE_EVENT_ERR_STATUS_FE_DATA_END_BIT_ERR_Msk (0x40UL) /*!< SDMMC FORCE_EVENT_ERR_STATUS: FE_DATA_END_BIT_ERR (Bitfield-Mask: 0x01) */ +#define SDMMC_FORCE_EVENT_ERR_STATUS_FE_CURRENT_LIMIT_ERR_Pos (7UL) /*!< SDMMC FORCE_EVENT_ERR_STATUS: FE_CURRENT_LIMIT_ERR (Bit 7) */ +#define SDMMC_FORCE_EVENT_ERR_STATUS_FE_CURRENT_LIMIT_ERR_Msk (0x80UL) /*!< SDMMC FORCE_EVENT_ERR_STATUS: FE_CURRENT_LIMIT_ERR (Bitfield-Mask: 0x01) */ +#define SDMMC_FORCE_EVENT_ERR_STATUS_FE_ACMD12_ERR_Pos (8UL) /*!< SDMMC FORCE_EVENT_ERR_STATUS: FE_ACMD12_ERR (Bit 8) */ +#define SDMMC_FORCE_EVENT_ERR_STATUS_FE_ACMD12_ERR_Msk (0x100UL) /*!< SDMMC FORCE_EVENT_ERR_STATUS: FE_ACMD12_ERR (Bitfield-Mask: 0x01) */ +#define SDMMC_FORCE_EVENT_ERR_STATUS_FE_TARGET_RESPONSE_ERR_Pos (12UL) /*!< SDMMC FORCE_EVENT_ERR_STATUS: FE_TARGET_RESPONSE_ERR (Bit 12) */ +#define SDMMC_FORCE_EVENT_ERR_STATUS_FE_TARGET_RESPONSE_ERR_Msk (0x1000UL) /*!< SDMMC FORCE_EVENT_ERR_STATUS: FE_TARGET_RESPONSE_ERR (Bitfield-Mask: 0x01) */ +#define SDMMC_FORCE_EVENT_ERR_STATUS_FE_CEATA_ERR_Pos (13UL) /*!< SDMMC FORCE_EVENT_ERR_STATUS: FE_CEATA_ERR (Bit 13) */ +#define SDMMC_FORCE_EVENT_ERR_STATUS_FE_CEATA_ERR_Msk (0x2000UL) /*!< SDMMC FORCE_EVENT_ERR_STATUS: FE_CEATA_ERR (Bitfield-Mask: 0x01) */ + +/* ------------------------------- SDMMC_DEBUG_SEL ------------------------------ */ +#define SDMMC_DEBUG_SEL_DEBUG_SEL_Pos (0UL) /*!< SDMMC DEBUG_SEL: DEBUG_SEL (Bit 0) */ +#define SDMMC_DEBUG_SEL_DEBUG_SEL_Msk (0x1UL) /*!< SDMMC DEBUG_SEL: DEBUG_SEL (Bitfield-Mask: 0x01) */ + +/* ---------------------------- SDMMC_SLOT_INT_STATUS --------------------------- */ +#define SDMMC_SLOT_INT_STATUS_SLOT_INT_STATUS_Pos (0UL) /*!< SDMMC SLOT_INT_STATUS: SLOT_INT_STATUS (Bit 0) */ +#define SDMMC_SLOT_INT_STATUS_SLOT_INT_STATUS_Msk (0xffUL) /*!< SDMMC SLOT_INT_STATUS: SLOT_INT_STATUS (Bitfield-Mask: 0xff) */ + + +/* ================================================================================ */ +/* ================ struct 'EBU' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ----------------------------------- EBU_CLC ---------------------------------- */ +#define EBU_CLC_DISR_Pos (0UL) /*!< EBU CLC: DISR (Bit 0) */ +#define EBU_CLC_DISR_Msk (0x1UL) /*!< EBU CLC: DISR (Bitfield-Mask: 0x01) */ +#define EBU_CLC_DISS_Pos (1UL) /*!< EBU CLC: DISS (Bit 1) */ +#define EBU_CLC_DISS_Msk (0x2UL) /*!< EBU CLC: DISS (Bitfield-Mask: 0x01) */ +#define EBU_CLC_SYNC_Pos (16UL) /*!< EBU CLC: SYNC (Bit 16) */ +#define EBU_CLC_SYNC_Msk (0x10000UL) /*!< EBU CLC: SYNC (Bitfield-Mask: 0x01) */ +#define EBU_CLC_DIV2_Pos (17UL) /*!< EBU CLC: DIV2 (Bit 17) */ +#define EBU_CLC_DIV2_Msk (0x20000UL) /*!< EBU CLC: DIV2 (Bitfield-Mask: 0x01) */ +#define EBU_CLC_EBUDIV_Pos (18UL) /*!< EBU CLC: EBUDIV (Bit 18) */ +#define EBU_CLC_EBUDIV_Msk (0xc0000UL) /*!< EBU CLC: EBUDIV (Bitfield-Mask: 0x03) */ +#define EBU_CLC_SYNCACK_Pos (20UL) /*!< EBU CLC: SYNCACK (Bit 20) */ +#define EBU_CLC_SYNCACK_Msk (0x100000UL) /*!< EBU CLC: SYNCACK (Bitfield-Mask: 0x01) */ +#define EBU_CLC_DIV2ACK_Pos (21UL) /*!< EBU CLC: DIV2ACK (Bit 21) */ +#define EBU_CLC_DIV2ACK_Msk (0x200000UL) /*!< EBU CLC: DIV2ACK (Bitfield-Mask: 0x01) */ +#define EBU_CLC_EBUDIVACK_Pos (22UL) /*!< EBU CLC: EBUDIVACK (Bit 22) */ +#define EBU_CLC_EBUDIVACK_Msk (0xc00000UL) /*!< EBU CLC: EBUDIVACK (Bitfield-Mask: 0x03) */ + +/* --------------------------------- EBU_MODCON --------------------------------- */ +#define EBU_MODCON_STS_Pos (0UL) /*!< EBU MODCON: STS (Bit 0) */ +#define EBU_MODCON_STS_Msk (0x1UL) /*!< EBU MODCON: STS (Bitfield-Mask: 0x01) */ +#define EBU_MODCON_LCKABRT_Pos (1UL) /*!< EBU MODCON: LCKABRT (Bit 1) */ +#define EBU_MODCON_LCKABRT_Msk (0x2UL) /*!< EBU MODCON: LCKABRT (Bitfield-Mask: 0x01) */ +#define EBU_MODCON_SDTRI_Pos (2UL) /*!< EBU MODCON: SDTRI (Bit 2) */ +#define EBU_MODCON_SDTRI_Msk (0x4UL) /*!< EBU MODCON: SDTRI (Bitfield-Mask: 0x01) */ +#define EBU_MODCON_EXTLOCK_Pos (4UL) /*!< EBU MODCON: EXTLOCK (Bit 4) */ +#define EBU_MODCON_EXTLOCK_Msk (0x10UL) /*!< EBU MODCON: EXTLOCK (Bitfield-Mask: 0x01) */ +#define EBU_MODCON_ARBSYNC_Pos (5UL) /*!< EBU MODCON: ARBSYNC (Bit 5) */ +#define EBU_MODCON_ARBSYNC_Msk (0x20UL) /*!< EBU MODCON: ARBSYNC (Bitfield-Mask: 0x01) */ +#define EBU_MODCON_ARBMODE_Pos (6UL) /*!< EBU MODCON: ARBMODE (Bit 6) */ +#define EBU_MODCON_ARBMODE_Msk (0xc0UL) /*!< EBU MODCON: ARBMODE (Bitfield-Mask: 0x03) */ +#define EBU_MODCON_TIMEOUTC_Pos (8UL) /*!< EBU MODCON: TIMEOUTC (Bit 8) */ +#define EBU_MODCON_TIMEOUTC_Msk (0xff00UL) /*!< EBU MODCON: TIMEOUTC (Bitfield-Mask: 0xff) */ +#define EBU_MODCON_LOCKTIMEOUT_Pos (16UL) /*!< EBU MODCON: LOCKTIMEOUT (Bit 16) */ +#define EBU_MODCON_LOCKTIMEOUT_Msk (0xff0000UL) /*!< EBU MODCON: LOCKTIMEOUT (Bitfield-Mask: 0xff) */ +#define EBU_MODCON_GLOBALCS_Pos (24UL) /*!< EBU MODCON: GLOBALCS (Bit 24) */ +#define EBU_MODCON_GLOBALCS_Msk (0xf000000UL) /*!< EBU MODCON: GLOBALCS (Bitfield-Mask: 0x0f) */ +#define EBU_MODCON_ACCSINH_Pos (28UL) /*!< EBU MODCON: ACCSINH (Bit 28) */ +#define EBU_MODCON_ACCSINH_Msk (0x10000000UL) /*!< EBU MODCON: ACCSINH (Bitfield-Mask: 0x01) */ +#define EBU_MODCON_ACCSINHACK_Pos (29UL) /*!< EBU MODCON: ACCSINHACK (Bit 29) */ +#define EBU_MODCON_ACCSINHACK_Msk (0x20000000UL) /*!< EBU MODCON: ACCSINHACK (Bitfield-Mask: 0x01) */ +#define EBU_MODCON_ALE_Pos (31UL) /*!< EBU MODCON: ALE (Bit 31) */ +#define EBU_MODCON_ALE_Msk (0x80000000UL) /*!< EBU MODCON: ALE (Bitfield-Mask: 0x01) */ + +/* ----------------------------------- EBU_ID ----------------------------------- */ +#define EBU_ID_MOD_REV_Pos (0UL) /*!< EBU ID: MOD_REV (Bit 0) */ +#define EBU_ID_MOD_REV_Msk (0xffUL) /*!< EBU ID: MOD_REV (Bitfield-Mask: 0xff) */ +#define EBU_ID_MOD_TYPE_Pos (8UL) /*!< EBU ID: MOD_TYPE (Bit 8) */ +#define EBU_ID_MOD_TYPE_Msk (0xff00UL) /*!< EBU ID: MOD_TYPE (Bitfield-Mask: 0xff) */ +#define EBU_ID_MOD_NUMBER_Pos (16UL) /*!< EBU ID: MOD_NUMBER (Bit 16) */ +#define EBU_ID_MOD_NUMBER_Msk (0xffff0000UL) /*!< EBU ID: MOD_NUMBER (Bitfield-Mask: 0xffff) */ + +/* --------------------------------- EBU_USERCON -------------------------------- */ +#define EBU_USERCON_DIP_Pos (0UL) /*!< EBU USERCON: DIP (Bit 0) */ +#define EBU_USERCON_DIP_Msk (0x1UL) /*!< EBU USERCON: DIP (Bitfield-Mask: 0x01) */ +#define EBU_USERCON_ADDIO_Pos (16UL) /*!< EBU USERCON: ADDIO (Bit 16) */ +#define EBU_USERCON_ADDIO_Msk (0x1ff0000UL) /*!< EBU USERCON: ADDIO (Bitfield-Mask: 0x1ff) */ +#define EBU_USERCON_ADVIO_Pos (25UL) /*!< EBU USERCON: ADVIO (Bit 25) */ +#define EBU_USERCON_ADVIO_Msk (0x2000000UL) /*!< EBU USERCON: ADVIO (Bitfield-Mask: 0x01) */ + +/* -------------------------------- EBU_ADDRSEL0 -------------------------------- */ +#define EBU_ADDRSEL0_REGENAB_Pos (0UL) /*!< EBU ADDRSEL0: REGENAB (Bit 0) */ +#define EBU_ADDRSEL0_REGENAB_Msk (0x1UL) /*!< EBU ADDRSEL0: REGENAB (Bitfield-Mask: 0x01) */ +#define EBU_ADDRSEL0_ALTENAB_Pos (1UL) /*!< EBU ADDRSEL0: ALTENAB (Bit 1) */ +#define EBU_ADDRSEL0_ALTENAB_Msk (0x2UL) /*!< EBU ADDRSEL0: ALTENAB (Bitfield-Mask: 0x01) */ +#define EBU_ADDRSEL0_WPROT_Pos (2UL) /*!< EBU ADDRSEL0: WPROT (Bit 2) */ +#define EBU_ADDRSEL0_WPROT_Msk (0x4UL) /*!< EBU ADDRSEL0: WPROT (Bitfield-Mask: 0x01) */ + +/* -------------------------------- EBU_ADDRSEL1 -------------------------------- */ +#define EBU_ADDRSEL1_REGENAB_Pos (0UL) /*!< EBU ADDRSEL1: REGENAB (Bit 0) */ +#define EBU_ADDRSEL1_REGENAB_Msk (0x1UL) /*!< EBU ADDRSEL1: REGENAB (Bitfield-Mask: 0x01) */ +#define EBU_ADDRSEL1_ALTENAB_Pos (1UL) /*!< EBU ADDRSEL1: ALTENAB (Bit 1) */ +#define EBU_ADDRSEL1_ALTENAB_Msk (0x2UL) /*!< EBU ADDRSEL1: ALTENAB (Bitfield-Mask: 0x01) */ +#define EBU_ADDRSEL1_WPROT_Pos (2UL) /*!< EBU ADDRSEL1: WPROT (Bit 2) */ +#define EBU_ADDRSEL1_WPROT_Msk (0x4UL) /*!< EBU ADDRSEL1: WPROT (Bitfield-Mask: 0x01) */ + +/* -------------------------------- EBU_ADDRSEL2 -------------------------------- */ +#define EBU_ADDRSEL2_REGENAB_Pos (0UL) /*!< EBU ADDRSEL2: REGENAB (Bit 0) */ +#define EBU_ADDRSEL2_REGENAB_Msk (0x1UL) /*!< EBU ADDRSEL2: REGENAB (Bitfield-Mask: 0x01) */ +#define EBU_ADDRSEL2_ALTENAB_Pos (1UL) /*!< EBU ADDRSEL2: ALTENAB (Bit 1) */ +#define EBU_ADDRSEL2_ALTENAB_Msk (0x2UL) /*!< EBU ADDRSEL2: ALTENAB (Bitfield-Mask: 0x01) */ +#define EBU_ADDRSEL2_WPROT_Pos (2UL) /*!< EBU ADDRSEL2: WPROT (Bit 2) */ +#define EBU_ADDRSEL2_WPROT_Msk (0x4UL) /*!< EBU ADDRSEL2: WPROT (Bitfield-Mask: 0x01) */ + +/* -------------------------------- EBU_ADDRSEL3 -------------------------------- */ +#define EBU_ADDRSEL3_REGENAB_Pos (0UL) /*!< EBU ADDRSEL3: REGENAB (Bit 0) */ +#define EBU_ADDRSEL3_REGENAB_Msk (0x1UL) /*!< EBU ADDRSEL3: REGENAB (Bitfield-Mask: 0x01) */ +#define EBU_ADDRSEL3_ALTENAB_Pos (1UL) /*!< EBU ADDRSEL3: ALTENAB (Bit 1) */ +#define EBU_ADDRSEL3_ALTENAB_Msk (0x2UL) /*!< EBU ADDRSEL3: ALTENAB (Bitfield-Mask: 0x01) */ +#define EBU_ADDRSEL3_WPROT_Pos (2UL) /*!< EBU ADDRSEL3: WPROT (Bit 2) */ +#define EBU_ADDRSEL3_WPROT_Msk (0x4UL) /*!< EBU ADDRSEL3: WPROT (Bitfield-Mask: 0x01) */ + +/* -------------------------------- EBU_BUSRCON0 -------------------------------- */ +#define EBU_BUSRCON0_FETBLEN_Pos (0UL) /*!< EBU BUSRCON0: FETBLEN (Bit 0) */ +#define EBU_BUSRCON0_FETBLEN_Msk (0x7UL) /*!< EBU BUSRCON0: FETBLEN (Bitfield-Mask: 0x07) */ +#define EBU_BUSRCON0_FBBMSEL_Pos (3UL) /*!< EBU BUSRCON0: FBBMSEL (Bit 3) */ +#define EBU_BUSRCON0_FBBMSEL_Msk (0x8UL) /*!< EBU BUSRCON0: FBBMSEL (Bitfield-Mask: 0x01) */ +#define EBU_BUSRCON0_BFSSS_Pos (4UL) /*!< EBU BUSRCON0: BFSSS (Bit 4) */ +#define EBU_BUSRCON0_BFSSS_Msk (0x10UL) /*!< EBU BUSRCON0: BFSSS (Bitfield-Mask: 0x01) */ +#define EBU_BUSRCON0_FDBKEN_Pos (5UL) /*!< EBU BUSRCON0: FDBKEN (Bit 5) */ +#define EBU_BUSRCON0_FDBKEN_Msk (0x20UL) /*!< EBU BUSRCON0: FDBKEN (Bitfield-Mask: 0x01) */ +#define EBU_BUSRCON0_BFCMSEL_Pos (6UL) /*!< EBU BUSRCON0: BFCMSEL (Bit 6) */ +#define EBU_BUSRCON0_BFCMSEL_Msk (0x40UL) /*!< EBU BUSRCON0: BFCMSEL (Bitfield-Mask: 0x01) */ +#define EBU_BUSRCON0_NAA_Pos (7UL) /*!< EBU BUSRCON0: NAA (Bit 7) */ +#define EBU_BUSRCON0_NAA_Msk (0x80UL) /*!< EBU BUSRCON0: NAA (Bitfield-Mask: 0x01) */ +#define EBU_BUSRCON0_ECSE_Pos (16UL) /*!< EBU BUSRCON0: ECSE (Bit 16) */ +#define EBU_BUSRCON0_ECSE_Msk (0x10000UL) /*!< EBU BUSRCON0: ECSE (Bitfield-Mask: 0x01) */ +#define EBU_BUSRCON0_EBSE_Pos (17UL) /*!< EBU BUSRCON0: EBSE (Bit 17) */ +#define EBU_BUSRCON0_EBSE_Msk (0x20000UL) /*!< EBU BUSRCON0: EBSE (Bitfield-Mask: 0x01) */ +#define EBU_BUSRCON0_DBA_Pos (18UL) /*!< EBU BUSRCON0: DBA (Bit 18) */ +#define EBU_BUSRCON0_DBA_Msk (0x40000UL) /*!< EBU BUSRCON0: DBA (Bitfield-Mask: 0x01) */ +#define EBU_BUSRCON0_WAITINV_Pos (19UL) /*!< EBU BUSRCON0: WAITINV (Bit 19) */ +#define EBU_BUSRCON0_WAITINV_Msk (0x80000UL) /*!< EBU BUSRCON0: WAITINV (Bitfield-Mask: 0x01) */ +#define EBU_BUSRCON0_BCGEN_Pos (20UL) /*!< EBU BUSRCON0: BCGEN (Bit 20) */ +#define EBU_BUSRCON0_BCGEN_Msk (0x300000UL) /*!< EBU BUSRCON0: BCGEN (Bitfield-Mask: 0x03) */ +#define EBU_BUSRCON0_PORTW_Pos (22UL) /*!< EBU BUSRCON0: PORTW (Bit 22) */ +#define EBU_BUSRCON0_PORTW_Msk (0xc00000UL) /*!< EBU BUSRCON0: PORTW (Bitfield-Mask: 0x03) */ +#define EBU_BUSRCON0_WAIT_Pos (24UL) /*!< EBU BUSRCON0: WAIT (Bit 24) */ +#define EBU_BUSRCON0_WAIT_Msk (0x3000000UL) /*!< EBU BUSRCON0: WAIT (Bitfield-Mask: 0x03) */ +#define EBU_BUSRCON0_AAP_Pos (26UL) /*!< EBU BUSRCON0: AAP (Bit 26) */ +#define EBU_BUSRCON0_AAP_Msk (0x4000000UL) /*!< EBU BUSRCON0: AAP (Bitfield-Mask: 0x01) */ +#define EBU_BUSRCON0_AGEN_Pos (28UL) /*!< EBU BUSRCON0: AGEN (Bit 28) */ +#define EBU_BUSRCON0_AGEN_Msk (0xf0000000UL) /*!< EBU BUSRCON0: AGEN (Bitfield-Mask: 0x0f) */ + +/* --------------------------------- EBU_BUSRAP0 -------------------------------- */ +#define EBU_BUSRAP0_RDDTACS_Pos (0UL) /*!< EBU BUSRAP0: RDDTACS (Bit 0) */ +#define EBU_BUSRAP0_RDDTACS_Msk (0xfUL) /*!< EBU BUSRAP0: RDDTACS (Bitfield-Mask: 0x0f) */ +#define EBU_BUSRAP0_RDRECOVC_Pos (4UL) /*!< EBU BUSRAP0: RDRECOVC (Bit 4) */ +#define EBU_BUSRAP0_RDRECOVC_Msk (0x70UL) /*!< EBU BUSRAP0: RDRECOVC (Bitfield-Mask: 0x07) */ +#define EBU_BUSRAP0_WAITRDC_Pos (7UL) /*!< EBU BUSRAP0: WAITRDC (Bit 7) */ +#define EBU_BUSRAP0_WAITRDC_Msk (0xf80UL) /*!< EBU BUSRAP0: WAITRDC (Bitfield-Mask: 0x1f) */ +#define EBU_BUSRAP0_DATAC_Pos (12UL) /*!< EBU BUSRAP0: DATAC (Bit 12) */ +#define EBU_BUSRAP0_DATAC_Msk (0xf000UL) /*!< EBU BUSRAP0: DATAC (Bitfield-Mask: 0x0f) */ +#define EBU_BUSRAP0_EXTCLOCK_Pos (16UL) /*!< EBU BUSRAP0: EXTCLOCK (Bit 16) */ +#define EBU_BUSRAP0_EXTCLOCK_Msk (0x30000UL) /*!< EBU BUSRAP0: EXTCLOCK (Bitfield-Mask: 0x03) */ +#define EBU_BUSRAP0_EXTDATA_Pos (18UL) /*!< EBU BUSRAP0: EXTDATA (Bit 18) */ +#define EBU_BUSRAP0_EXTDATA_Msk (0xc0000UL) /*!< EBU BUSRAP0: EXTDATA (Bitfield-Mask: 0x03) */ +#define EBU_BUSRAP0_CMDDELAY_Pos (20UL) /*!< EBU BUSRAP0: CMDDELAY (Bit 20) */ +#define EBU_BUSRAP0_CMDDELAY_Msk (0xf00000UL) /*!< EBU BUSRAP0: CMDDELAY (Bitfield-Mask: 0x0f) */ +#define EBU_BUSRAP0_AHOLDC_Pos (24UL) /*!< EBU BUSRAP0: AHOLDC (Bit 24) */ +#define EBU_BUSRAP0_AHOLDC_Msk (0xf000000UL) /*!< EBU BUSRAP0: AHOLDC (Bitfield-Mask: 0x0f) */ +#define EBU_BUSRAP0_ADDRC_Pos (28UL) /*!< EBU BUSRAP0: ADDRC (Bit 28) */ +#define EBU_BUSRAP0_ADDRC_Msk (0xf0000000UL) /*!< EBU BUSRAP0: ADDRC (Bitfield-Mask: 0x0f) */ + +/* -------------------------------- EBU_BUSWCON0 -------------------------------- */ +#define EBU_BUSWCON0_FETBLEN_Pos (0UL) /*!< EBU BUSWCON0: FETBLEN (Bit 0) */ +#define EBU_BUSWCON0_FETBLEN_Msk (0x7UL) /*!< EBU BUSWCON0: FETBLEN (Bitfield-Mask: 0x07) */ +#define EBU_BUSWCON0_FBBMSEL_Pos (3UL) /*!< EBU BUSWCON0: FBBMSEL (Bit 3) */ +#define EBU_BUSWCON0_FBBMSEL_Msk (0x8UL) /*!< EBU BUSWCON0: FBBMSEL (Bitfield-Mask: 0x01) */ +#define EBU_BUSWCON0_NAA_Pos (7UL) /*!< EBU BUSWCON0: NAA (Bit 7) */ +#define EBU_BUSWCON0_NAA_Msk (0x80UL) /*!< EBU BUSWCON0: NAA (Bitfield-Mask: 0x01) */ +#define EBU_BUSWCON0_ECSE_Pos (16UL) /*!< EBU BUSWCON0: ECSE (Bit 16) */ +#define EBU_BUSWCON0_ECSE_Msk (0x10000UL) /*!< EBU BUSWCON0: ECSE (Bitfield-Mask: 0x01) */ +#define EBU_BUSWCON0_EBSE_Pos (17UL) /*!< EBU BUSWCON0: EBSE (Bit 17) */ +#define EBU_BUSWCON0_EBSE_Msk (0x20000UL) /*!< EBU BUSWCON0: EBSE (Bitfield-Mask: 0x01) */ +#define EBU_BUSWCON0_WAITINV_Pos (19UL) /*!< EBU BUSWCON0: WAITINV (Bit 19) */ +#define EBU_BUSWCON0_WAITINV_Msk (0x80000UL) /*!< EBU BUSWCON0: WAITINV (Bitfield-Mask: 0x01) */ +#define EBU_BUSWCON0_BCGEN_Pos (20UL) /*!< EBU BUSWCON0: BCGEN (Bit 20) */ +#define EBU_BUSWCON0_BCGEN_Msk (0x300000UL) /*!< EBU BUSWCON0: BCGEN (Bitfield-Mask: 0x03) */ +#define EBU_BUSWCON0_PORTW_Pos (22UL) /*!< EBU BUSWCON0: PORTW (Bit 22) */ +#define EBU_BUSWCON0_PORTW_Msk (0xc00000UL) /*!< EBU BUSWCON0: PORTW (Bitfield-Mask: 0x03) */ +#define EBU_BUSWCON0_WAIT_Pos (24UL) /*!< EBU BUSWCON0: WAIT (Bit 24) */ +#define EBU_BUSWCON0_WAIT_Msk (0x3000000UL) /*!< EBU BUSWCON0: WAIT (Bitfield-Mask: 0x03) */ +#define EBU_BUSWCON0_AAP_Pos (26UL) /*!< EBU BUSWCON0: AAP (Bit 26) */ +#define EBU_BUSWCON0_AAP_Msk (0x4000000UL) /*!< EBU BUSWCON0: AAP (Bitfield-Mask: 0x01) */ +#define EBU_BUSWCON0_LOCKCS_Pos (27UL) /*!< EBU BUSWCON0: LOCKCS (Bit 27) */ +#define EBU_BUSWCON0_LOCKCS_Msk (0x8000000UL) /*!< EBU BUSWCON0: LOCKCS (Bitfield-Mask: 0x01) */ +#define EBU_BUSWCON0_AGEN_Pos (28UL) /*!< EBU BUSWCON0: AGEN (Bit 28) */ +#define EBU_BUSWCON0_AGEN_Msk (0xf0000000UL) /*!< EBU BUSWCON0: AGEN (Bitfield-Mask: 0x0f) */ + +/* --------------------------------- EBU_BUSWAP0 -------------------------------- */ +#define EBU_BUSWAP0_WRDTACS_Pos (0UL) /*!< EBU BUSWAP0: WRDTACS (Bit 0) */ +#define EBU_BUSWAP0_WRDTACS_Msk (0xfUL) /*!< EBU BUSWAP0: WRDTACS (Bitfield-Mask: 0x0f) */ +#define EBU_BUSWAP0_WRRECOVC_Pos (4UL) /*!< EBU BUSWAP0: WRRECOVC (Bit 4) */ +#define EBU_BUSWAP0_WRRECOVC_Msk (0x70UL) /*!< EBU BUSWAP0: WRRECOVC (Bitfield-Mask: 0x07) */ +#define EBU_BUSWAP0_WAITWRC_Pos (7UL) /*!< EBU BUSWAP0: WAITWRC (Bit 7) */ +#define EBU_BUSWAP0_WAITWRC_Msk (0xf80UL) /*!< EBU BUSWAP0: WAITWRC (Bitfield-Mask: 0x1f) */ +#define EBU_BUSWAP0_DATAC_Pos (12UL) /*!< EBU BUSWAP0: DATAC (Bit 12) */ +#define EBU_BUSWAP0_DATAC_Msk (0xf000UL) /*!< EBU BUSWAP0: DATAC (Bitfield-Mask: 0x0f) */ +#define EBU_BUSWAP0_EXTCLOCK_Pos (16UL) /*!< EBU BUSWAP0: EXTCLOCK (Bit 16) */ +#define EBU_BUSWAP0_EXTCLOCK_Msk (0x30000UL) /*!< EBU BUSWAP0: EXTCLOCK (Bitfield-Mask: 0x03) */ +#define EBU_BUSWAP0_EXTDATA_Pos (18UL) /*!< EBU BUSWAP0: EXTDATA (Bit 18) */ +#define EBU_BUSWAP0_EXTDATA_Msk (0xc0000UL) /*!< EBU BUSWAP0: EXTDATA (Bitfield-Mask: 0x03) */ +#define EBU_BUSWAP0_CMDDELAY_Pos (20UL) /*!< EBU BUSWAP0: CMDDELAY (Bit 20) */ +#define EBU_BUSWAP0_CMDDELAY_Msk (0xf00000UL) /*!< EBU BUSWAP0: CMDDELAY (Bitfield-Mask: 0x0f) */ +#define EBU_BUSWAP0_AHOLDC_Pos (24UL) /*!< EBU BUSWAP0: AHOLDC (Bit 24) */ +#define EBU_BUSWAP0_AHOLDC_Msk (0xf000000UL) /*!< EBU BUSWAP0: AHOLDC (Bitfield-Mask: 0x0f) */ +#define EBU_BUSWAP0_ADDRC_Pos (28UL) /*!< EBU BUSWAP0: ADDRC (Bit 28) */ +#define EBU_BUSWAP0_ADDRC_Msk (0xf0000000UL) /*!< EBU BUSWAP0: ADDRC (Bitfield-Mask: 0x0f) */ + +/* -------------------------------- EBU_BUSRCON1 -------------------------------- */ +#define EBU_BUSRCON1_FETBLEN_Pos (0UL) /*!< EBU BUSRCON1: FETBLEN (Bit 0) */ +#define EBU_BUSRCON1_FETBLEN_Msk (0x7UL) /*!< EBU BUSRCON1: FETBLEN (Bitfield-Mask: 0x07) */ +#define EBU_BUSRCON1_FBBMSEL_Pos (3UL) /*!< EBU BUSRCON1: FBBMSEL (Bit 3) */ +#define EBU_BUSRCON1_FBBMSEL_Msk (0x8UL) /*!< EBU BUSRCON1: FBBMSEL (Bitfield-Mask: 0x01) */ +#define EBU_BUSRCON1_BFSSS_Pos (4UL) /*!< EBU BUSRCON1: BFSSS (Bit 4) */ +#define EBU_BUSRCON1_BFSSS_Msk (0x10UL) /*!< EBU BUSRCON1: BFSSS (Bitfield-Mask: 0x01) */ +#define EBU_BUSRCON1_FDBKEN_Pos (5UL) /*!< EBU BUSRCON1: FDBKEN (Bit 5) */ +#define EBU_BUSRCON1_FDBKEN_Msk (0x20UL) /*!< EBU BUSRCON1: FDBKEN (Bitfield-Mask: 0x01) */ +#define EBU_BUSRCON1_BFCMSEL_Pos (6UL) /*!< EBU BUSRCON1: BFCMSEL (Bit 6) */ +#define EBU_BUSRCON1_BFCMSEL_Msk (0x40UL) /*!< EBU BUSRCON1: BFCMSEL (Bitfield-Mask: 0x01) */ +#define EBU_BUSRCON1_NAA_Pos (7UL) /*!< EBU BUSRCON1: NAA (Bit 7) */ +#define EBU_BUSRCON1_NAA_Msk (0x80UL) /*!< EBU BUSRCON1: NAA (Bitfield-Mask: 0x01) */ +#define EBU_BUSRCON1_ECSE_Pos (16UL) /*!< EBU BUSRCON1: ECSE (Bit 16) */ +#define EBU_BUSRCON1_ECSE_Msk (0x10000UL) /*!< EBU BUSRCON1: ECSE (Bitfield-Mask: 0x01) */ +#define EBU_BUSRCON1_EBSE_Pos (17UL) /*!< EBU BUSRCON1: EBSE (Bit 17) */ +#define EBU_BUSRCON1_EBSE_Msk (0x20000UL) /*!< EBU BUSRCON1: EBSE (Bitfield-Mask: 0x01) */ +#define EBU_BUSRCON1_DBA_Pos (18UL) /*!< EBU BUSRCON1: DBA (Bit 18) */ +#define EBU_BUSRCON1_DBA_Msk (0x40000UL) /*!< EBU BUSRCON1: DBA (Bitfield-Mask: 0x01) */ +#define EBU_BUSRCON1_WAITINV_Pos (19UL) /*!< EBU BUSRCON1: WAITINV (Bit 19) */ +#define EBU_BUSRCON1_WAITINV_Msk (0x80000UL) /*!< EBU BUSRCON1: WAITINV (Bitfield-Mask: 0x01) */ +#define EBU_BUSRCON1_BCGEN_Pos (20UL) /*!< EBU BUSRCON1: BCGEN (Bit 20) */ +#define EBU_BUSRCON1_BCGEN_Msk (0x300000UL) /*!< EBU BUSRCON1: BCGEN (Bitfield-Mask: 0x03) */ +#define EBU_BUSRCON1_PORTW_Pos (22UL) /*!< EBU BUSRCON1: PORTW (Bit 22) */ +#define EBU_BUSRCON1_PORTW_Msk (0xc00000UL) /*!< EBU BUSRCON1: PORTW (Bitfield-Mask: 0x03) */ +#define EBU_BUSRCON1_WAIT_Pos (24UL) /*!< EBU BUSRCON1: WAIT (Bit 24) */ +#define EBU_BUSRCON1_WAIT_Msk (0x3000000UL) /*!< EBU BUSRCON1: WAIT (Bitfield-Mask: 0x03) */ +#define EBU_BUSRCON1_AAP_Pos (26UL) /*!< EBU BUSRCON1: AAP (Bit 26) */ +#define EBU_BUSRCON1_AAP_Msk (0x4000000UL) /*!< EBU BUSRCON1: AAP (Bitfield-Mask: 0x01) */ +#define EBU_BUSRCON1_AGEN_Pos (28UL) /*!< EBU BUSRCON1: AGEN (Bit 28) */ +#define EBU_BUSRCON1_AGEN_Msk (0xf0000000UL) /*!< EBU BUSRCON1: AGEN (Bitfield-Mask: 0x0f) */ + +/* --------------------------------- EBU_BUSRAP1 -------------------------------- */ +#define EBU_BUSRAP1_RDDTACS_Pos (0UL) /*!< EBU BUSRAP1: RDDTACS (Bit 0) */ +#define EBU_BUSRAP1_RDDTACS_Msk (0xfUL) /*!< EBU BUSRAP1: RDDTACS (Bitfield-Mask: 0x0f) */ +#define EBU_BUSRAP1_RDRECOVC_Pos (4UL) /*!< EBU BUSRAP1: RDRECOVC (Bit 4) */ +#define EBU_BUSRAP1_RDRECOVC_Msk (0x70UL) /*!< EBU BUSRAP1: RDRECOVC (Bitfield-Mask: 0x07) */ +#define EBU_BUSRAP1_WAITRDC_Pos (7UL) /*!< EBU BUSRAP1: WAITRDC (Bit 7) */ +#define EBU_BUSRAP1_WAITRDC_Msk (0xf80UL) /*!< EBU BUSRAP1: WAITRDC (Bitfield-Mask: 0x1f) */ +#define EBU_BUSRAP1_DATAC_Pos (12UL) /*!< EBU BUSRAP1: DATAC (Bit 12) */ +#define EBU_BUSRAP1_DATAC_Msk (0xf000UL) /*!< EBU BUSRAP1: DATAC (Bitfield-Mask: 0x0f) */ +#define EBU_BUSRAP1_EXTCLOCK_Pos (16UL) /*!< EBU BUSRAP1: EXTCLOCK (Bit 16) */ +#define EBU_BUSRAP1_EXTCLOCK_Msk (0x30000UL) /*!< EBU BUSRAP1: EXTCLOCK (Bitfield-Mask: 0x03) */ +#define EBU_BUSRAP1_EXTDATA_Pos (18UL) /*!< EBU BUSRAP1: EXTDATA (Bit 18) */ +#define EBU_BUSRAP1_EXTDATA_Msk (0xc0000UL) /*!< EBU BUSRAP1: EXTDATA (Bitfield-Mask: 0x03) */ +#define EBU_BUSRAP1_CMDDELAY_Pos (20UL) /*!< EBU BUSRAP1: CMDDELAY (Bit 20) */ +#define EBU_BUSRAP1_CMDDELAY_Msk (0xf00000UL) /*!< EBU BUSRAP1: CMDDELAY (Bitfield-Mask: 0x0f) */ +#define EBU_BUSRAP1_AHOLDC_Pos (24UL) /*!< EBU BUSRAP1: AHOLDC (Bit 24) */ +#define EBU_BUSRAP1_AHOLDC_Msk (0xf000000UL) /*!< EBU BUSRAP1: AHOLDC (Bitfield-Mask: 0x0f) */ +#define EBU_BUSRAP1_ADDRC_Pos (28UL) /*!< EBU BUSRAP1: ADDRC (Bit 28) */ +#define EBU_BUSRAP1_ADDRC_Msk (0xf0000000UL) /*!< EBU BUSRAP1: ADDRC (Bitfield-Mask: 0x0f) */ + +/* -------------------------------- EBU_BUSWCON1 -------------------------------- */ +#define EBU_BUSWCON1_FETBLEN_Pos (0UL) /*!< EBU BUSWCON1: FETBLEN (Bit 0) */ +#define EBU_BUSWCON1_FETBLEN_Msk (0x7UL) /*!< EBU BUSWCON1: FETBLEN (Bitfield-Mask: 0x07) */ +#define EBU_BUSWCON1_FBBMSEL_Pos (3UL) /*!< EBU BUSWCON1: FBBMSEL (Bit 3) */ +#define EBU_BUSWCON1_FBBMSEL_Msk (0x8UL) /*!< EBU BUSWCON1: FBBMSEL (Bitfield-Mask: 0x01) */ +#define EBU_BUSWCON1_NAA_Pos (7UL) /*!< EBU BUSWCON1: NAA (Bit 7) */ +#define EBU_BUSWCON1_NAA_Msk (0x80UL) /*!< EBU BUSWCON1: NAA (Bitfield-Mask: 0x01) */ +#define EBU_BUSWCON1_ECSE_Pos (16UL) /*!< EBU BUSWCON1: ECSE (Bit 16) */ +#define EBU_BUSWCON1_ECSE_Msk (0x10000UL) /*!< EBU BUSWCON1: ECSE (Bitfield-Mask: 0x01) */ +#define EBU_BUSWCON1_EBSE_Pos (17UL) /*!< EBU BUSWCON1: EBSE (Bit 17) */ +#define EBU_BUSWCON1_EBSE_Msk (0x20000UL) /*!< EBU BUSWCON1: EBSE (Bitfield-Mask: 0x01) */ +#define EBU_BUSWCON1_WAITINV_Pos (19UL) /*!< EBU BUSWCON1: WAITINV (Bit 19) */ +#define EBU_BUSWCON1_WAITINV_Msk (0x80000UL) /*!< EBU BUSWCON1: WAITINV (Bitfield-Mask: 0x01) */ +#define EBU_BUSWCON1_BCGEN_Pos (20UL) /*!< EBU BUSWCON1: BCGEN (Bit 20) */ +#define EBU_BUSWCON1_BCGEN_Msk (0x300000UL) /*!< EBU BUSWCON1: BCGEN (Bitfield-Mask: 0x03) */ +#define EBU_BUSWCON1_PORTW_Pos (22UL) /*!< EBU BUSWCON1: PORTW (Bit 22) */ +#define EBU_BUSWCON1_PORTW_Msk (0xc00000UL) /*!< EBU BUSWCON1: PORTW (Bitfield-Mask: 0x03) */ +#define EBU_BUSWCON1_WAIT_Pos (24UL) /*!< EBU BUSWCON1: WAIT (Bit 24) */ +#define EBU_BUSWCON1_WAIT_Msk (0x3000000UL) /*!< EBU BUSWCON1: WAIT (Bitfield-Mask: 0x03) */ +#define EBU_BUSWCON1_AAP_Pos (26UL) /*!< EBU BUSWCON1: AAP (Bit 26) */ +#define EBU_BUSWCON1_AAP_Msk (0x4000000UL) /*!< EBU BUSWCON1: AAP (Bitfield-Mask: 0x01) */ +#define EBU_BUSWCON1_LOCKCS_Pos (27UL) /*!< EBU BUSWCON1: LOCKCS (Bit 27) */ +#define EBU_BUSWCON1_LOCKCS_Msk (0x8000000UL) /*!< EBU BUSWCON1: LOCKCS (Bitfield-Mask: 0x01) */ +#define EBU_BUSWCON1_AGEN_Pos (28UL) /*!< EBU BUSWCON1: AGEN (Bit 28) */ +#define EBU_BUSWCON1_AGEN_Msk (0xf0000000UL) /*!< EBU BUSWCON1: AGEN (Bitfield-Mask: 0x0f) */ + +/* --------------------------------- EBU_BUSWAP1 -------------------------------- */ +#define EBU_BUSWAP1_WRDTACS_Pos (0UL) /*!< EBU BUSWAP1: WRDTACS (Bit 0) */ +#define EBU_BUSWAP1_WRDTACS_Msk (0xfUL) /*!< EBU BUSWAP1: WRDTACS (Bitfield-Mask: 0x0f) */ +#define EBU_BUSWAP1_WRRECOVC_Pos (4UL) /*!< EBU BUSWAP1: WRRECOVC (Bit 4) */ +#define EBU_BUSWAP1_WRRECOVC_Msk (0x70UL) /*!< EBU BUSWAP1: WRRECOVC (Bitfield-Mask: 0x07) */ +#define EBU_BUSWAP1_WAITWRC_Pos (7UL) /*!< EBU BUSWAP1: WAITWRC (Bit 7) */ +#define EBU_BUSWAP1_WAITWRC_Msk (0xf80UL) /*!< EBU BUSWAP1: WAITWRC (Bitfield-Mask: 0x1f) */ +#define EBU_BUSWAP1_DATAC_Pos (12UL) /*!< EBU BUSWAP1: DATAC (Bit 12) */ +#define EBU_BUSWAP1_DATAC_Msk (0xf000UL) /*!< EBU BUSWAP1: DATAC (Bitfield-Mask: 0x0f) */ +#define EBU_BUSWAP1_EXTCLOCK_Pos (16UL) /*!< EBU BUSWAP1: EXTCLOCK (Bit 16) */ +#define EBU_BUSWAP1_EXTCLOCK_Msk (0x30000UL) /*!< EBU BUSWAP1: EXTCLOCK (Bitfield-Mask: 0x03) */ +#define EBU_BUSWAP1_EXTDATA_Pos (18UL) /*!< EBU BUSWAP1: EXTDATA (Bit 18) */ +#define EBU_BUSWAP1_EXTDATA_Msk (0xc0000UL) /*!< EBU BUSWAP1: EXTDATA (Bitfield-Mask: 0x03) */ +#define EBU_BUSWAP1_CMDDELAY_Pos (20UL) /*!< EBU BUSWAP1: CMDDELAY (Bit 20) */ +#define EBU_BUSWAP1_CMDDELAY_Msk (0xf00000UL) /*!< EBU BUSWAP1: CMDDELAY (Bitfield-Mask: 0x0f) */ +#define EBU_BUSWAP1_AHOLDC_Pos (24UL) /*!< EBU BUSWAP1: AHOLDC (Bit 24) */ +#define EBU_BUSWAP1_AHOLDC_Msk (0xf000000UL) /*!< EBU BUSWAP1: AHOLDC (Bitfield-Mask: 0x0f) */ +#define EBU_BUSWAP1_ADDRC_Pos (28UL) /*!< EBU BUSWAP1: ADDRC (Bit 28) */ +#define EBU_BUSWAP1_ADDRC_Msk (0xf0000000UL) /*!< EBU BUSWAP1: ADDRC (Bitfield-Mask: 0x0f) */ + +/* -------------------------------- EBU_BUSRCON2 -------------------------------- */ +#define EBU_BUSRCON2_FETBLEN_Pos (0UL) /*!< EBU BUSRCON2: FETBLEN (Bit 0) */ +#define EBU_BUSRCON2_FETBLEN_Msk (0x7UL) /*!< EBU BUSRCON2: FETBLEN (Bitfield-Mask: 0x07) */ +#define EBU_BUSRCON2_FBBMSEL_Pos (3UL) /*!< EBU BUSRCON2: FBBMSEL (Bit 3) */ +#define EBU_BUSRCON2_FBBMSEL_Msk (0x8UL) /*!< EBU BUSRCON2: FBBMSEL (Bitfield-Mask: 0x01) */ +#define EBU_BUSRCON2_BFSSS_Pos (4UL) /*!< EBU BUSRCON2: BFSSS (Bit 4) */ +#define EBU_BUSRCON2_BFSSS_Msk (0x10UL) /*!< EBU BUSRCON2: BFSSS (Bitfield-Mask: 0x01) */ +#define EBU_BUSRCON2_FDBKEN_Pos (5UL) /*!< EBU BUSRCON2: FDBKEN (Bit 5) */ +#define EBU_BUSRCON2_FDBKEN_Msk (0x20UL) /*!< EBU BUSRCON2: FDBKEN (Bitfield-Mask: 0x01) */ +#define EBU_BUSRCON2_BFCMSEL_Pos (6UL) /*!< EBU BUSRCON2: BFCMSEL (Bit 6) */ +#define EBU_BUSRCON2_BFCMSEL_Msk (0x40UL) /*!< EBU BUSRCON2: BFCMSEL (Bitfield-Mask: 0x01) */ +#define EBU_BUSRCON2_NAA_Pos (7UL) /*!< EBU BUSRCON2: NAA (Bit 7) */ +#define EBU_BUSRCON2_NAA_Msk (0x80UL) /*!< EBU BUSRCON2: NAA (Bitfield-Mask: 0x01) */ +#define EBU_BUSRCON2_ECSE_Pos (16UL) /*!< EBU BUSRCON2: ECSE (Bit 16) */ +#define EBU_BUSRCON2_ECSE_Msk (0x10000UL) /*!< EBU BUSRCON2: ECSE (Bitfield-Mask: 0x01) */ +#define EBU_BUSRCON2_EBSE_Pos (17UL) /*!< EBU BUSRCON2: EBSE (Bit 17) */ +#define EBU_BUSRCON2_EBSE_Msk (0x20000UL) /*!< EBU BUSRCON2: EBSE (Bitfield-Mask: 0x01) */ +#define EBU_BUSRCON2_DBA_Pos (18UL) /*!< EBU BUSRCON2: DBA (Bit 18) */ +#define EBU_BUSRCON2_DBA_Msk (0x40000UL) /*!< EBU BUSRCON2: DBA (Bitfield-Mask: 0x01) */ +#define EBU_BUSRCON2_WAITINV_Pos (19UL) /*!< EBU BUSRCON2: WAITINV (Bit 19) */ +#define EBU_BUSRCON2_WAITINV_Msk (0x80000UL) /*!< EBU BUSRCON2: WAITINV (Bitfield-Mask: 0x01) */ +#define EBU_BUSRCON2_BCGEN_Pos (20UL) /*!< EBU BUSRCON2: BCGEN (Bit 20) */ +#define EBU_BUSRCON2_BCGEN_Msk (0x300000UL) /*!< EBU BUSRCON2: BCGEN (Bitfield-Mask: 0x03) */ +#define EBU_BUSRCON2_PORTW_Pos (22UL) /*!< EBU BUSRCON2: PORTW (Bit 22) */ +#define EBU_BUSRCON2_PORTW_Msk (0xc00000UL) /*!< EBU BUSRCON2: PORTW (Bitfield-Mask: 0x03) */ +#define EBU_BUSRCON2_WAIT_Pos (24UL) /*!< EBU BUSRCON2: WAIT (Bit 24) */ +#define EBU_BUSRCON2_WAIT_Msk (0x3000000UL) /*!< EBU BUSRCON2: WAIT (Bitfield-Mask: 0x03) */ +#define EBU_BUSRCON2_AAP_Pos (26UL) /*!< EBU BUSRCON2: AAP (Bit 26) */ +#define EBU_BUSRCON2_AAP_Msk (0x4000000UL) /*!< EBU BUSRCON2: AAP (Bitfield-Mask: 0x01) */ +#define EBU_BUSRCON2_AGEN_Pos (28UL) /*!< EBU BUSRCON2: AGEN (Bit 28) */ +#define EBU_BUSRCON2_AGEN_Msk (0xf0000000UL) /*!< EBU BUSRCON2: AGEN (Bitfield-Mask: 0x0f) */ + +/* --------------------------------- EBU_BUSRAP2 -------------------------------- */ +#define EBU_BUSRAP2_RDDTACS_Pos (0UL) /*!< EBU BUSRAP2: RDDTACS (Bit 0) */ +#define EBU_BUSRAP2_RDDTACS_Msk (0xfUL) /*!< EBU BUSRAP2: RDDTACS (Bitfield-Mask: 0x0f) */ +#define EBU_BUSRAP2_RDRECOVC_Pos (4UL) /*!< EBU BUSRAP2: RDRECOVC (Bit 4) */ +#define EBU_BUSRAP2_RDRECOVC_Msk (0x70UL) /*!< EBU BUSRAP2: RDRECOVC (Bitfield-Mask: 0x07) */ +#define EBU_BUSRAP2_WAITRDC_Pos (7UL) /*!< EBU BUSRAP2: WAITRDC (Bit 7) */ +#define EBU_BUSRAP2_WAITRDC_Msk (0xf80UL) /*!< EBU BUSRAP2: WAITRDC (Bitfield-Mask: 0x1f) */ +#define EBU_BUSRAP2_DATAC_Pos (12UL) /*!< EBU BUSRAP2: DATAC (Bit 12) */ +#define EBU_BUSRAP2_DATAC_Msk (0xf000UL) /*!< EBU BUSRAP2: DATAC (Bitfield-Mask: 0x0f) */ +#define EBU_BUSRAP2_EXTCLOCK_Pos (16UL) /*!< EBU BUSRAP2: EXTCLOCK (Bit 16) */ +#define EBU_BUSRAP2_EXTCLOCK_Msk (0x30000UL) /*!< EBU BUSRAP2: EXTCLOCK (Bitfield-Mask: 0x03) */ +#define EBU_BUSRAP2_EXTDATA_Pos (18UL) /*!< EBU BUSRAP2: EXTDATA (Bit 18) */ +#define EBU_BUSRAP2_EXTDATA_Msk (0xc0000UL) /*!< EBU BUSRAP2: EXTDATA (Bitfield-Mask: 0x03) */ +#define EBU_BUSRAP2_CMDDELAY_Pos (20UL) /*!< EBU BUSRAP2: CMDDELAY (Bit 20) */ +#define EBU_BUSRAP2_CMDDELAY_Msk (0xf00000UL) /*!< EBU BUSRAP2: CMDDELAY (Bitfield-Mask: 0x0f) */ +#define EBU_BUSRAP2_AHOLDC_Pos (24UL) /*!< EBU BUSRAP2: AHOLDC (Bit 24) */ +#define EBU_BUSRAP2_AHOLDC_Msk (0xf000000UL) /*!< EBU BUSRAP2: AHOLDC (Bitfield-Mask: 0x0f) */ +#define EBU_BUSRAP2_ADDRC_Pos (28UL) /*!< EBU BUSRAP2: ADDRC (Bit 28) */ +#define EBU_BUSRAP2_ADDRC_Msk (0xf0000000UL) /*!< EBU BUSRAP2: ADDRC (Bitfield-Mask: 0x0f) */ + +/* -------------------------------- EBU_BUSWCON2 -------------------------------- */ +#define EBU_BUSWCON2_FETBLEN_Pos (0UL) /*!< EBU BUSWCON2: FETBLEN (Bit 0) */ +#define EBU_BUSWCON2_FETBLEN_Msk (0x7UL) /*!< EBU BUSWCON2: FETBLEN (Bitfield-Mask: 0x07) */ +#define EBU_BUSWCON2_FBBMSEL_Pos (3UL) /*!< EBU BUSWCON2: FBBMSEL (Bit 3) */ +#define EBU_BUSWCON2_FBBMSEL_Msk (0x8UL) /*!< EBU BUSWCON2: FBBMSEL (Bitfield-Mask: 0x01) */ +#define EBU_BUSWCON2_NAA_Pos (7UL) /*!< EBU BUSWCON2: NAA (Bit 7) */ +#define EBU_BUSWCON2_NAA_Msk (0x80UL) /*!< EBU BUSWCON2: NAA (Bitfield-Mask: 0x01) */ +#define EBU_BUSWCON2_ECSE_Pos (16UL) /*!< EBU BUSWCON2: ECSE (Bit 16) */ +#define EBU_BUSWCON2_ECSE_Msk (0x10000UL) /*!< EBU BUSWCON2: ECSE (Bitfield-Mask: 0x01) */ +#define EBU_BUSWCON2_EBSE_Pos (17UL) /*!< EBU BUSWCON2: EBSE (Bit 17) */ +#define EBU_BUSWCON2_EBSE_Msk (0x20000UL) /*!< EBU BUSWCON2: EBSE (Bitfield-Mask: 0x01) */ +#define EBU_BUSWCON2_WAITINV_Pos (19UL) /*!< EBU BUSWCON2: WAITINV (Bit 19) */ +#define EBU_BUSWCON2_WAITINV_Msk (0x80000UL) /*!< EBU BUSWCON2: WAITINV (Bitfield-Mask: 0x01) */ +#define EBU_BUSWCON2_BCGEN_Pos (20UL) /*!< EBU BUSWCON2: BCGEN (Bit 20) */ +#define EBU_BUSWCON2_BCGEN_Msk (0x300000UL) /*!< EBU BUSWCON2: BCGEN (Bitfield-Mask: 0x03) */ +#define EBU_BUSWCON2_PORTW_Pos (22UL) /*!< EBU BUSWCON2: PORTW (Bit 22) */ +#define EBU_BUSWCON2_PORTW_Msk (0xc00000UL) /*!< EBU BUSWCON2: PORTW (Bitfield-Mask: 0x03) */ +#define EBU_BUSWCON2_WAIT_Pos (24UL) /*!< EBU BUSWCON2: WAIT (Bit 24) */ +#define EBU_BUSWCON2_WAIT_Msk (0x3000000UL) /*!< EBU BUSWCON2: WAIT (Bitfield-Mask: 0x03) */ +#define EBU_BUSWCON2_AAP_Pos (26UL) /*!< EBU BUSWCON2: AAP (Bit 26) */ +#define EBU_BUSWCON2_AAP_Msk (0x4000000UL) /*!< EBU BUSWCON2: AAP (Bitfield-Mask: 0x01) */ +#define EBU_BUSWCON2_LOCKCS_Pos (27UL) /*!< EBU BUSWCON2: LOCKCS (Bit 27) */ +#define EBU_BUSWCON2_LOCKCS_Msk (0x8000000UL) /*!< EBU BUSWCON2: LOCKCS (Bitfield-Mask: 0x01) */ +#define EBU_BUSWCON2_AGEN_Pos (28UL) /*!< EBU BUSWCON2: AGEN (Bit 28) */ +#define EBU_BUSWCON2_AGEN_Msk (0xf0000000UL) /*!< EBU BUSWCON2: AGEN (Bitfield-Mask: 0x0f) */ + +/* --------------------------------- EBU_BUSWAP2 -------------------------------- */ +#define EBU_BUSWAP2_WRDTACS_Pos (0UL) /*!< EBU BUSWAP2: WRDTACS (Bit 0) */ +#define EBU_BUSWAP2_WRDTACS_Msk (0xfUL) /*!< EBU BUSWAP2: WRDTACS (Bitfield-Mask: 0x0f) */ +#define EBU_BUSWAP2_WRRECOVC_Pos (4UL) /*!< EBU BUSWAP2: WRRECOVC (Bit 4) */ +#define EBU_BUSWAP2_WRRECOVC_Msk (0x70UL) /*!< EBU BUSWAP2: WRRECOVC (Bitfield-Mask: 0x07) */ +#define EBU_BUSWAP2_WAITWRC_Pos (7UL) /*!< EBU BUSWAP2: WAITWRC (Bit 7) */ +#define EBU_BUSWAP2_WAITWRC_Msk (0xf80UL) /*!< EBU BUSWAP2: WAITWRC (Bitfield-Mask: 0x1f) */ +#define EBU_BUSWAP2_DATAC_Pos (12UL) /*!< EBU BUSWAP2: DATAC (Bit 12) */ +#define EBU_BUSWAP2_DATAC_Msk (0xf000UL) /*!< EBU BUSWAP2: DATAC (Bitfield-Mask: 0x0f) */ +#define EBU_BUSWAP2_EXTCLOCK_Pos (16UL) /*!< EBU BUSWAP2: EXTCLOCK (Bit 16) */ +#define EBU_BUSWAP2_EXTCLOCK_Msk (0x30000UL) /*!< EBU BUSWAP2: EXTCLOCK (Bitfield-Mask: 0x03) */ +#define EBU_BUSWAP2_EXTDATA_Pos (18UL) /*!< EBU BUSWAP2: EXTDATA (Bit 18) */ +#define EBU_BUSWAP2_EXTDATA_Msk (0xc0000UL) /*!< EBU BUSWAP2: EXTDATA (Bitfield-Mask: 0x03) */ +#define EBU_BUSWAP2_CMDDELAY_Pos (20UL) /*!< EBU BUSWAP2: CMDDELAY (Bit 20) */ +#define EBU_BUSWAP2_CMDDELAY_Msk (0xf00000UL) /*!< EBU BUSWAP2: CMDDELAY (Bitfield-Mask: 0x0f) */ +#define EBU_BUSWAP2_AHOLDC_Pos (24UL) /*!< EBU BUSWAP2: AHOLDC (Bit 24) */ +#define EBU_BUSWAP2_AHOLDC_Msk (0xf000000UL) /*!< EBU BUSWAP2: AHOLDC (Bitfield-Mask: 0x0f) */ +#define EBU_BUSWAP2_ADDRC_Pos (28UL) /*!< EBU BUSWAP2: ADDRC (Bit 28) */ +#define EBU_BUSWAP2_ADDRC_Msk (0xf0000000UL) /*!< EBU BUSWAP2: ADDRC (Bitfield-Mask: 0x0f) */ + +/* -------------------------------- EBU_BUSRCON3 -------------------------------- */ +#define EBU_BUSRCON3_FETBLEN_Pos (0UL) /*!< EBU BUSRCON3: FETBLEN (Bit 0) */ +#define EBU_BUSRCON3_FETBLEN_Msk (0x7UL) /*!< EBU BUSRCON3: FETBLEN (Bitfield-Mask: 0x07) */ +#define EBU_BUSRCON3_FBBMSEL_Pos (3UL) /*!< EBU BUSRCON3: FBBMSEL (Bit 3) */ +#define EBU_BUSRCON3_FBBMSEL_Msk (0x8UL) /*!< EBU BUSRCON3: FBBMSEL (Bitfield-Mask: 0x01) */ +#define EBU_BUSRCON3_BFSSS_Pos (4UL) /*!< EBU BUSRCON3: BFSSS (Bit 4) */ +#define EBU_BUSRCON3_BFSSS_Msk (0x10UL) /*!< EBU BUSRCON3: BFSSS (Bitfield-Mask: 0x01) */ +#define EBU_BUSRCON3_FDBKEN_Pos (5UL) /*!< EBU BUSRCON3: FDBKEN (Bit 5) */ +#define EBU_BUSRCON3_FDBKEN_Msk (0x20UL) /*!< EBU BUSRCON3: FDBKEN (Bitfield-Mask: 0x01) */ +#define EBU_BUSRCON3_BFCMSEL_Pos (6UL) /*!< EBU BUSRCON3: BFCMSEL (Bit 6) */ +#define EBU_BUSRCON3_BFCMSEL_Msk (0x40UL) /*!< EBU BUSRCON3: BFCMSEL (Bitfield-Mask: 0x01) */ +#define EBU_BUSRCON3_NAA_Pos (7UL) /*!< EBU BUSRCON3: NAA (Bit 7) */ +#define EBU_BUSRCON3_NAA_Msk (0x80UL) /*!< EBU BUSRCON3: NAA (Bitfield-Mask: 0x01) */ +#define EBU_BUSRCON3_ECSE_Pos (16UL) /*!< EBU BUSRCON3: ECSE (Bit 16) */ +#define EBU_BUSRCON3_ECSE_Msk (0x10000UL) /*!< EBU BUSRCON3: ECSE (Bitfield-Mask: 0x01) */ +#define EBU_BUSRCON3_EBSE_Pos (17UL) /*!< EBU BUSRCON3: EBSE (Bit 17) */ +#define EBU_BUSRCON3_EBSE_Msk (0x20000UL) /*!< EBU BUSRCON3: EBSE (Bitfield-Mask: 0x01) */ +#define EBU_BUSRCON3_DBA_Pos (18UL) /*!< EBU BUSRCON3: DBA (Bit 18) */ +#define EBU_BUSRCON3_DBA_Msk (0x40000UL) /*!< EBU BUSRCON3: DBA (Bitfield-Mask: 0x01) */ +#define EBU_BUSRCON3_WAITINV_Pos (19UL) /*!< EBU BUSRCON3: WAITINV (Bit 19) */ +#define EBU_BUSRCON3_WAITINV_Msk (0x80000UL) /*!< EBU BUSRCON3: WAITINV (Bitfield-Mask: 0x01) */ +#define EBU_BUSRCON3_BCGEN_Pos (20UL) /*!< EBU BUSRCON3: BCGEN (Bit 20) */ +#define EBU_BUSRCON3_BCGEN_Msk (0x300000UL) /*!< EBU BUSRCON3: BCGEN (Bitfield-Mask: 0x03) */ +#define EBU_BUSRCON3_PORTW_Pos (22UL) /*!< EBU BUSRCON3: PORTW (Bit 22) */ +#define EBU_BUSRCON3_PORTW_Msk (0xc00000UL) /*!< EBU BUSRCON3: PORTW (Bitfield-Mask: 0x03) */ +#define EBU_BUSRCON3_WAIT_Pos (24UL) /*!< EBU BUSRCON3: WAIT (Bit 24) */ +#define EBU_BUSRCON3_WAIT_Msk (0x3000000UL) /*!< EBU BUSRCON3: WAIT (Bitfield-Mask: 0x03) */ +#define EBU_BUSRCON3_AAP_Pos (26UL) /*!< EBU BUSRCON3: AAP (Bit 26) */ +#define EBU_BUSRCON3_AAP_Msk (0x4000000UL) /*!< EBU BUSRCON3: AAP (Bitfield-Mask: 0x01) */ +#define EBU_BUSRCON3_AGEN_Pos (28UL) /*!< EBU BUSRCON3: AGEN (Bit 28) */ +#define EBU_BUSRCON3_AGEN_Msk (0xf0000000UL) /*!< EBU BUSRCON3: AGEN (Bitfield-Mask: 0x0f) */ + +/* --------------------------------- EBU_BUSRAP3 -------------------------------- */ +#define EBU_BUSRAP3_RDDTACS_Pos (0UL) /*!< EBU BUSRAP3: RDDTACS (Bit 0) */ +#define EBU_BUSRAP3_RDDTACS_Msk (0xfUL) /*!< EBU BUSRAP3: RDDTACS (Bitfield-Mask: 0x0f) */ +#define EBU_BUSRAP3_RDRECOVC_Pos (4UL) /*!< EBU BUSRAP3: RDRECOVC (Bit 4) */ +#define EBU_BUSRAP3_RDRECOVC_Msk (0x70UL) /*!< EBU BUSRAP3: RDRECOVC (Bitfield-Mask: 0x07) */ +#define EBU_BUSRAP3_WAITRDC_Pos (7UL) /*!< EBU BUSRAP3: WAITRDC (Bit 7) */ +#define EBU_BUSRAP3_WAITRDC_Msk (0xf80UL) /*!< EBU BUSRAP3: WAITRDC (Bitfield-Mask: 0x1f) */ +#define EBU_BUSRAP3_DATAC_Pos (12UL) /*!< EBU BUSRAP3: DATAC (Bit 12) */ +#define EBU_BUSRAP3_DATAC_Msk (0xf000UL) /*!< EBU BUSRAP3: DATAC (Bitfield-Mask: 0x0f) */ +#define EBU_BUSRAP3_EXTCLOCK_Pos (16UL) /*!< EBU BUSRAP3: EXTCLOCK (Bit 16) */ +#define EBU_BUSRAP3_EXTCLOCK_Msk (0x30000UL) /*!< EBU BUSRAP3: EXTCLOCK (Bitfield-Mask: 0x03) */ +#define EBU_BUSRAP3_EXTDATA_Pos (18UL) /*!< EBU BUSRAP3: EXTDATA (Bit 18) */ +#define EBU_BUSRAP3_EXTDATA_Msk (0xc0000UL) /*!< EBU BUSRAP3: EXTDATA (Bitfield-Mask: 0x03) */ +#define EBU_BUSRAP3_CMDDELAY_Pos (20UL) /*!< EBU BUSRAP3: CMDDELAY (Bit 20) */ +#define EBU_BUSRAP3_CMDDELAY_Msk (0xf00000UL) /*!< EBU BUSRAP3: CMDDELAY (Bitfield-Mask: 0x0f) */ +#define EBU_BUSRAP3_AHOLDC_Pos (24UL) /*!< EBU BUSRAP3: AHOLDC (Bit 24) */ +#define EBU_BUSRAP3_AHOLDC_Msk (0xf000000UL) /*!< EBU BUSRAP3: AHOLDC (Bitfield-Mask: 0x0f) */ +#define EBU_BUSRAP3_ADDRC_Pos (28UL) /*!< EBU BUSRAP3: ADDRC (Bit 28) */ +#define EBU_BUSRAP3_ADDRC_Msk (0xf0000000UL) /*!< EBU BUSRAP3: ADDRC (Bitfield-Mask: 0x0f) */ + +/* -------------------------------- EBU_BUSWCON3 -------------------------------- */ +#define EBU_BUSWCON3_FETBLEN_Pos (0UL) /*!< EBU BUSWCON3: FETBLEN (Bit 0) */ +#define EBU_BUSWCON3_FETBLEN_Msk (0x7UL) /*!< EBU BUSWCON3: FETBLEN (Bitfield-Mask: 0x07) */ +#define EBU_BUSWCON3_FBBMSEL_Pos (3UL) /*!< EBU BUSWCON3: FBBMSEL (Bit 3) */ +#define EBU_BUSWCON3_FBBMSEL_Msk (0x8UL) /*!< EBU BUSWCON3: FBBMSEL (Bitfield-Mask: 0x01) */ +#define EBU_BUSWCON3_NAA_Pos (7UL) /*!< EBU BUSWCON3: NAA (Bit 7) */ +#define EBU_BUSWCON3_NAA_Msk (0x80UL) /*!< EBU BUSWCON3: NAA (Bitfield-Mask: 0x01) */ +#define EBU_BUSWCON3_ECSE_Pos (16UL) /*!< EBU BUSWCON3: ECSE (Bit 16) */ +#define EBU_BUSWCON3_ECSE_Msk (0x10000UL) /*!< EBU BUSWCON3: ECSE (Bitfield-Mask: 0x01) */ +#define EBU_BUSWCON3_EBSE_Pos (17UL) /*!< EBU BUSWCON3: EBSE (Bit 17) */ +#define EBU_BUSWCON3_EBSE_Msk (0x20000UL) /*!< EBU BUSWCON3: EBSE (Bitfield-Mask: 0x01) */ +#define EBU_BUSWCON3_WAITINV_Pos (19UL) /*!< EBU BUSWCON3: WAITINV (Bit 19) */ +#define EBU_BUSWCON3_WAITINV_Msk (0x80000UL) /*!< EBU BUSWCON3: WAITINV (Bitfield-Mask: 0x01) */ +#define EBU_BUSWCON3_BCGEN_Pos (20UL) /*!< EBU BUSWCON3: BCGEN (Bit 20) */ +#define EBU_BUSWCON3_BCGEN_Msk (0x300000UL) /*!< EBU BUSWCON3: BCGEN (Bitfield-Mask: 0x03) */ +#define EBU_BUSWCON3_PORTW_Pos (22UL) /*!< EBU BUSWCON3: PORTW (Bit 22) */ +#define EBU_BUSWCON3_PORTW_Msk (0xc00000UL) /*!< EBU BUSWCON3: PORTW (Bitfield-Mask: 0x03) */ +#define EBU_BUSWCON3_WAIT_Pos (24UL) /*!< EBU BUSWCON3: WAIT (Bit 24) */ +#define EBU_BUSWCON3_WAIT_Msk (0x3000000UL) /*!< EBU BUSWCON3: WAIT (Bitfield-Mask: 0x03) */ +#define EBU_BUSWCON3_AAP_Pos (26UL) /*!< EBU BUSWCON3: AAP (Bit 26) */ +#define EBU_BUSWCON3_AAP_Msk (0x4000000UL) /*!< EBU BUSWCON3: AAP (Bitfield-Mask: 0x01) */ +#define EBU_BUSWCON3_LOCKCS_Pos (27UL) /*!< EBU BUSWCON3: LOCKCS (Bit 27) */ +#define EBU_BUSWCON3_LOCKCS_Msk (0x8000000UL) /*!< EBU BUSWCON3: LOCKCS (Bitfield-Mask: 0x01) */ +#define EBU_BUSWCON3_AGEN_Pos (28UL) /*!< EBU BUSWCON3: AGEN (Bit 28) */ +#define EBU_BUSWCON3_AGEN_Msk (0xf0000000UL) /*!< EBU BUSWCON3: AGEN (Bitfield-Mask: 0x0f) */ + +/* --------------------------------- EBU_BUSWAP3 -------------------------------- */ +#define EBU_BUSWAP3_WRDTACS_Pos (0UL) /*!< EBU BUSWAP3: WRDTACS (Bit 0) */ +#define EBU_BUSWAP3_WRDTACS_Msk (0xfUL) /*!< EBU BUSWAP3: WRDTACS (Bitfield-Mask: 0x0f) */ +#define EBU_BUSWAP3_WRRECOVC_Pos (4UL) /*!< EBU BUSWAP3: WRRECOVC (Bit 4) */ +#define EBU_BUSWAP3_WRRECOVC_Msk (0x70UL) /*!< EBU BUSWAP3: WRRECOVC (Bitfield-Mask: 0x07) */ +#define EBU_BUSWAP3_WAITWRC_Pos (7UL) /*!< EBU BUSWAP3: WAITWRC (Bit 7) */ +#define EBU_BUSWAP3_WAITWRC_Msk (0xf80UL) /*!< EBU BUSWAP3: WAITWRC (Bitfield-Mask: 0x1f) */ +#define EBU_BUSWAP3_DATAC_Pos (12UL) /*!< EBU BUSWAP3: DATAC (Bit 12) */ +#define EBU_BUSWAP3_DATAC_Msk (0xf000UL) /*!< EBU BUSWAP3: DATAC (Bitfield-Mask: 0x0f) */ +#define EBU_BUSWAP3_EXTCLOCK_Pos (16UL) /*!< EBU BUSWAP3: EXTCLOCK (Bit 16) */ +#define EBU_BUSWAP3_EXTCLOCK_Msk (0x30000UL) /*!< EBU BUSWAP3: EXTCLOCK (Bitfield-Mask: 0x03) */ +#define EBU_BUSWAP3_EXTDATA_Pos (18UL) /*!< EBU BUSWAP3: EXTDATA (Bit 18) */ +#define EBU_BUSWAP3_EXTDATA_Msk (0xc0000UL) /*!< EBU BUSWAP3: EXTDATA (Bitfield-Mask: 0x03) */ +#define EBU_BUSWAP3_CMDDELAY_Pos (20UL) /*!< EBU BUSWAP3: CMDDELAY (Bit 20) */ +#define EBU_BUSWAP3_CMDDELAY_Msk (0xf00000UL) /*!< EBU BUSWAP3: CMDDELAY (Bitfield-Mask: 0x0f) */ +#define EBU_BUSWAP3_AHOLDC_Pos (24UL) /*!< EBU BUSWAP3: AHOLDC (Bit 24) */ +#define EBU_BUSWAP3_AHOLDC_Msk (0xf000000UL) /*!< EBU BUSWAP3: AHOLDC (Bitfield-Mask: 0x0f) */ +#define EBU_BUSWAP3_ADDRC_Pos (28UL) /*!< EBU BUSWAP3: ADDRC (Bit 28) */ +#define EBU_BUSWAP3_ADDRC_Msk (0xf0000000UL) /*!< EBU BUSWAP3: ADDRC (Bitfield-Mask: 0x0f) */ + +/* --------------------------------- EBU_SDRMCON -------------------------------- */ +#define EBU_SDRMCON_CRAS_Pos (0UL) /*!< EBU SDRMCON: CRAS (Bit 0) */ +#define EBU_SDRMCON_CRAS_Msk (0xfUL) /*!< EBU SDRMCON: CRAS (Bitfield-Mask: 0x0f) */ +#define EBU_SDRMCON_CRFSH_Pos (4UL) /*!< EBU SDRMCON: CRFSH (Bit 4) */ +#define EBU_SDRMCON_CRFSH_Msk (0xf0UL) /*!< EBU SDRMCON: CRFSH (Bitfield-Mask: 0x0f) */ +#define EBU_SDRMCON_CRSC_Pos (8UL) /*!< EBU SDRMCON: CRSC (Bit 8) */ +#define EBU_SDRMCON_CRSC_Msk (0x300UL) /*!< EBU SDRMCON: CRSC (Bitfield-Mask: 0x03) */ +#define EBU_SDRMCON_CRP_Pos (10UL) /*!< EBU SDRMCON: CRP (Bit 10) */ +#define EBU_SDRMCON_CRP_Msk (0xc00UL) /*!< EBU SDRMCON: CRP (Bitfield-Mask: 0x03) */ +#define EBU_SDRMCON_AWIDTH_Pos (12UL) /*!< EBU SDRMCON: AWIDTH (Bit 12) */ +#define EBU_SDRMCON_AWIDTH_Msk (0x3000UL) /*!< EBU SDRMCON: AWIDTH (Bitfield-Mask: 0x03) */ +#define EBU_SDRMCON_CRCD_Pos (14UL) /*!< EBU SDRMCON: CRCD (Bit 14) */ +#define EBU_SDRMCON_CRCD_Msk (0xc000UL) /*!< EBU SDRMCON: CRCD (Bitfield-Mask: 0x03) */ +#define EBU_SDRMCON_CRC_Pos (16UL) /*!< EBU SDRMCON: CRC (Bit 16) */ +#define EBU_SDRMCON_CRC_Msk (0x70000UL) /*!< EBU SDRMCON: CRC (Bitfield-Mask: 0x07) */ +#define EBU_SDRMCON_ROWM_Pos (19UL) /*!< EBU SDRMCON: ROWM (Bit 19) */ +#define EBU_SDRMCON_ROWM_Msk (0x380000UL) /*!< EBU SDRMCON: ROWM (Bitfield-Mask: 0x07) */ +#define EBU_SDRMCON_BANKM_Pos (22UL) /*!< EBU SDRMCON: BANKM (Bit 22) */ +#define EBU_SDRMCON_BANKM_Msk (0x1c00000UL) /*!< EBU SDRMCON: BANKM (Bitfield-Mask: 0x07) */ +#define EBU_SDRMCON_CRCE_Pos (25UL) /*!< EBU SDRMCON: CRCE (Bit 25) */ +#define EBU_SDRMCON_CRCE_Msk (0xe000000UL) /*!< EBU SDRMCON: CRCE (Bitfield-Mask: 0x07) */ +#define EBU_SDRMCON_CLKDIS_Pos (28UL) /*!< EBU SDRMCON: CLKDIS (Bit 28) */ +#define EBU_SDRMCON_CLKDIS_Msk (0x10000000UL) /*!< EBU SDRMCON: CLKDIS (Bitfield-Mask: 0x01) */ +#define EBU_SDRMCON_PWR_MODE_Pos (29UL) /*!< EBU SDRMCON: PWR_MODE (Bit 29) */ +#define EBU_SDRMCON_PWR_MODE_Msk (0x60000000UL) /*!< EBU SDRMCON: PWR_MODE (Bitfield-Mask: 0x03) */ +#define EBU_SDRMCON_SDCMSEL_Pos (31UL) /*!< EBU SDRMCON: SDCMSEL (Bit 31) */ +#define EBU_SDRMCON_SDCMSEL_Msk (0x80000000UL) /*!< EBU SDRMCON: SDCMSEL (Bitfield-Mask: 0x01) */ + +/* --------------------------------- EBU_SDRMOD --------------------------------- */ +#define EBU_SDRMOD_BURSTL_Pos (0UL) /*!< EBU SDRMOD: BURSTL (Bit 0) */ +#define EBU_SDRMOD_BURSTL_Msk (0x7UL) /*!< EBU SDRMOD: BURSTL (Bitfield-Mask: 0x07) */ +#define EBU_SDRMOD_BTYP_Pos (3UL) /*!< EBU SDRMOD: BTYP (Bit 3) */ +#define EBU_SDRMOD_BTYP_Msk (0x8UL) /*!< EBU SDRMOD: BTYP (Bitfield-Mask: 0x01) */ +#define EBU_SDRMOD_CASLAT_Pos (4UL) /*!< EBU SDRMOD: CASLAT (Bit 4) */ +#define EBU_SDRMOD_CASLAT_Msk (0x70UL) /*!< EBU SDRMOD: CASLAT (Bitfield-Mask: 0x07) */ +#define EBU_SDRMOD_OPMODE_Pos (7UL) /*!< EBU SDRMOD: OPMODE (Bit 7) */ +#define EBU_SDRMOD_OPMODE_Msk (0x3f80UL) /*!< EBU SDRMOD: OPMODE (Bitfield-Mask: 0x7f) */ +#define EBU_SDRMOD_COLDSTART_Pos (15UL) /*!< EBU SDRMOD: COLDSTART (Bit 15) */ +#define EBU_SDRMOD_COLDSTART_Msk (0x8000UL) /*!< EBU SDRMOD: COLDSTART (Bitfield-Mask: 0x01) */ +#define EBU_SDRMOD_XOPM_Pos (16UL) /*!< EBU SDRMOD: XOPM (Bit 16) */ +#define EBU_SDRMOD_XOPM_Msk (0xfff0000UL) /*!< EBU SDRMOD: XOPM (Bitfield-Mask: 0xfff) */ +#define EBU_SDRMOD_XBA_Pos (28UL) /*!< EBU SDRMOD: XBA (Bit 28) */ +#define EBU_SDRMOD_XBA_Msk (0xf0000000UL) /*!< EBU SDRMOD: XBA (Bitfield-Mask: 0x0f) */ + +/* --------------------------------- EBU_SDRMREF -------------------------------- */ +#define EBU_SDRMREF_REFRESHC_Pos (0UL) /*!< EBU SDRMREF: REFRESHC (Bit 0) */ +#define EBU_SDRMREF_REFRESHC_Msk (0x3fUL) /*!< EBU SDRMREF: REFRESHC (Bitfield-Mask: 0x3f) */ +#define EBU_SDRMREF_REFRESHR_Pos (6UL) /*!< EBU SDRMREF: REFRESHR (Bit 6) */ +#define EBU_SDRMREF_REFRESHR_Msk (0x1c0UL) /*!< EBU SDRMREF: REFRESHR (Bitfield-Mask: 0x07) */ +#define EBU_SDRMREF_SELFREXST_Pos (9UL) /*!< EBU SDRMREF: SELFREXST (Bit 9) */ +#define EBU_SDRMREF_SELFREXST_Msk (0x200UL) /*!< EBU SDRMREF: SELFREXST (Bitfield-Mask: 0x01) */ +#define EBU_SDRMREF_SELFREX_Pos (10UL) /*!< EBU SDRMREF: SELFREX (Bit 10) */ +#define EBU_SDRMREF_SELFREX_Msk (0x400UL) /*!< EBU SDRMREF: SELFREX (Bitfield-Mask: 0x01) */ +#define EBU_SDRMREF_SELFRENST_Pos (11UL) /*!< EBU SDRMREF: SELFRENST (Bit 11) */ +#define EBU_SDRMREF_SELFRENST_Msk (0x800UL) /*!< EBU SDRMREF: SELFRENST (Bitfield-Mask: 0x01) */ +#define EBU_SDRMREF_SELFREN_Pos (12UL) /*!< EBU SDRMREF: SELFREN (Bit 12) */ +#define EBU_SDRMREF_SELFREN_Msk (0x1000UL) /*!< EBU SDRMREF: SELFREN (Bitfield-Mask: 0x01) */ +#define EBU_SDRMREF_AUTOSELFR_Pos (13UL) /*!< EBU SDRMREF: AUTOSELFR (Bit 13) */ +#define EBU_SDRMREF_AUTOSELFR_Msk (0x2000UL) /*!< EBU SDRMREF: AUTOSELFR (Bitfield-Mask: 0x01) */ +#define EBU_SDRMREF_ERFSHC_Pos (14UL) /*!< EBU SDRMREF: ERFSHC (Bit 14) */ +#define EBU_SDRMREF_ERFSHC_Msk (0xc000UL) /*!< EBU SDRMREF: ERFSHC (Bitfield-Mask: 0x03) */ +#define EBU_SDRMREF_SELFREX_DLY_Pos (16UL) /*!< EBU SDRMREF: SELFREX_DLY (Bit 16) */ +#define EBU_SDRMREF_SELFREX_DLY_Msk (0xff0000UL) /*!< EBU SDRMREF: SELFREX_DLY (Bitfield-Mask: 0xff) */ +#define EBU_SDRMREF_ARFSH_Pos (24UL) /*!< EBU SDRMREF: ARFSH (Bit 24) */ +#define EBU_SDRMREF_ARFSH_Msk (0x1000000UL) /*!< EBU SDRMREF: ARFSH (Bitfield-Mask: 0x01) */ +#define EBU_SDRMREF_RES_DLY_Pos (25UL) /*!< EBU SDRMREF: RES_DLY (Bit 25) */ +#define EBU_SDRMREF_RES_DLY_Msk (0xe000000UL) /*!< EBU SDRMREF: RES_DLY (Bitfield-Mask: 0x07) */ + +/* --------------------------------- EBU_SDRSTAT -------------------------------- */ +#define EBU_SDRSTAT_REFERR_Pos (0UL) /*!< EBU SDRSTAT: REFERR (Bit 0) */ +#define EBU_SDRSTAT_REFERR_Msk (0x1UL) /*!< EBU SDRSTAT: REFERR (Bitfield-Mask: 0x01) */ +#define EBU_SDRSTAT_SDRMBUSY_Pos (1UL) /*!< EBU SDRSTAT: SDRMBUSY (Bit 1) */ +#define EBU_SDRSTAT_SDRMBUSY_Msk (0x2UL) /*!< EBU SDRSTAT: SDRMBUSY (Bitfield-Mask: 0x01) */ +#define EBU_SDRSTAT_SDERR_Pos (2UL) /*!< EBU SDRSTAT: SDERR (Bit 2) */ +#define EBU_SDRSTAT_SDERR_Msk (0x4UL) /*!< EBU SDRSTAT: SDERR (Bitfield-Mask: 0x01) */ + + +/* ================================================================================ */ +/* ================ struct 'ETH0_CON' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ------------------------------ ETH0_CON_ETH0_CON ----------------------------- */ +#define ETH_CON_RXD0_Pos (0UL) /*!< ETH0_CON ETH0_CON: RXD0 (Bit 0) */ +#define ETH_CON_RXD0_Msk (0x3UL) /*!< ETH0_CON ETH0_CON: RXD0 (Bitfield-Mask: 0x03) */ +#define ETH_CON_RXD1_Pos (2UL) /*!< ETH0_CON ETH0_CON: RXD1 (Bit 2) */ +#define ETH_CON_RXD1_Msk (0xcUL) /*!< ETH0_CON ETH0_CON: RXD1 (Bitfield-Mask: 0x03) */ +#define ETH_CON_RXD2_Pos (4UL) /*!< ETH0_CON ETH0_CON: RXD2 (Bit 4) */ +#define ETH_CON_RXD2_Msk (0x30UL) /*!< ETH0_CON ETH0_CON: RXD2 (Bitfield-Mask: 0x03) */ +#define ETH_CON_RXD3_Pos (6UL) /*!< ETH0_CON ETH0_CON: RXD3 (Bit 6) */ +#define ETH_CON_RXD3_Msk (0xc0UL) /*!< ETH0_CON ETH0_CON: RXD3 (Bitfield-Mask: 0x03) */ +#define ETH_CON_CLK_RMII_Pos (8UL) /*!< ETH0_CON ETH0_CON: CLK_RMII (Bit 8) */ +#define ETH_CON_CLK_RMII_Msk (0x300UL) /*!< ETH0_CON ETH0_CON: CLK_RMII (Bitfield-Mask: 0x03) */ +#define ETH_CON_CRS_DV_Pos (10UL) /*!< ETH0_CON ETH0_CON: CRS_DV (Bit 10) */ +#define ETH_CON_CRS_DV_Msk (0xc00UL) /*!< ETH0_CON ETH0_CON: CRS_DV (Bitfield-Mask: 0x03) */ +#define ETH_CON_CRS_Pos (12UL) /*!< ETH0_CON ETH0_CON: CRS (Bit 12) */ +#define ETH_CON_CRS_Msk (0x3000UL) /*!< ETH0_CON ETH0_CON: CRS (Bitfield-Mask: 0x03) */ +#define ETH_CON_RXER_Pos (14UL) /*!< ETH0_CON ETH0_CON: RXER (Bit 14) */ +#define ETH_CON_RXER_Msk (0xc000UL) /*!< ETH0_CON ETH0_CON: RXER (Bitfield-Mask: 0x03) */ +#define ETH_CON_COL_Pos (16UL) /*!< ETH0_CON ETH0_CON: COL (Bit 16) */ +#define ETH_CON_COL_Msk (0x30000UL) /*!< ETH0_CON ETH0_CON: COL (Bitfield-Mask: 0x03) */ +#define ETH_CON_CLK_TX_Pos (18UL) /*!< ETH0_CON ETH0_CON: CLK_TX (Bit 18) */ +#define ETH_CON_CLK_TX_Msk (0xc0000UL) /*!< ETH0_CON ETH0_CON: CLK_TX (Bitfield-Mask: 0x03) */ +#define ETH_CON_MDIO_Pos (22UL) /*!< ETH0_CON ETH0_CON: MDIO (Bit 22) */ +#define ETH_CON_MDIO_Msk (0xc00000UL) /*!< ETH0_CON ETH0_CON: MDIO (Bitfield-Mask: 0x03) */ +#define ETH_CON_INFSEL_Pos (26UL) /*!< ETH0_CON ETH0_CON: INFSEL (Bit 26) */ +#define ETH_CON_INFSEL_Msk (0x4000000UL) /*!< ETH0_CON ETH0_CON: INFSEL (Bitfield-Mask: 0x01) */ + + +/* ================================================================================ */ +/* ================ Group 'ETH' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ---------------------------- ETH_MAC_CONFIGURATION --------------------------- */ +#define ETH_MAC_CONFIGURATION_PRELEN_Pos (0UL) /*!< ETH MAC_CONFIGURATION: PRELEN (Bit 0) */ +#define ETH_MAC_CONFIGURATION_PRELEN_Msk (0x3UL) /*!< ETH MAC_CONFIGURATION: PRELEN (Bitfield-Mask: 0x03) */ +#define ETH_MAC_CONFIGURATION_RE_Pos (2UL) /*!< ETH MAC_CONFIGURATION: RE (Bit 2) */ +#define ETH_MAC_CONFIGURATION_RE_Msk (0x4UL) /*!< ETH MAC_CONFIGURATION: RE (Bitfield-Mask: 0x01) */ +#define ETH_MAC_CONFIGURATION_TE_Pos (3UL) /*!< ETH MAC_CONFIGURATION: TE (Bit 3) */ +#define ETH_MAC_CONFIGURATION_TE_Msk (0x8UL) /*!< ETH MAC_CONFIGURATION: TE (Bitfield-Mask: 0x01) */ +#define ETH_MAC_CONFIGURATION_DC_Pos (4UL) /*!< ETH MAC_CONFIGURATION: DC (Bit 4) */ +#define ETH_MAC_CONFIGURATION_DC_Msk (0x10UL) /*!< ETH MAC_CONFIGURATION: DC (Bitfield-Mask: 0x01) */ +#define ETH_MAC_CONFIGURATION_BL_Pos (5UL) /*!< ETH MAC_CONFIGURATION: BL (Bit 5) */ +#define ETH_MAC_CONFIGURATION_BL_Msk (0x60UL) /*!< ETH MAC_CONFIGURATION: BL (Bitfield-Mask: 0x03) */ +#define ETH_MAC_CONFIGURATION_ACS_Pos (7UL) /*!< ETH MAC_CONFIGURATION: ACS (Bit 7) */ +#define ETH_MAC_CONFIGURATION_ACS_Msk (0x80UL) /*!< ETH MAC_CONFIGURATION: ACS (Bitfield-Mask: 0x01) */ +#define ETH_MAC_CONFIGURATION_DR_Pos (9UL) /*!< ETH MAC_CONFIGURATION: DR (Bit 9) */ +#define ETH_MAC_CONFIGURATION_DR_Msk (0x200UL) /*!< ETH MAC_CONFIGURATION: DR (Bitfield-Mask: 0x01) */ +#define ETH_MAC_CONFIGURATION_IPC_Pos (10UL) /*!< ETH MAC_CONFIGURATION: IPC (Bit 10) */ +#define ETH_MAC_CONFIGURATION_IPC_Msk (0x400UL) /*!< ETH MAC_CONFIGURATION: IPC (Bitfield-Mask: 0x01) */ +#define ETH_MAC_CONFIGURATION_DM_Pos (11UL) /*!< ETH MAC_CONFIGURATION: DM (Bit 11) */ +#define ETH_MAC_CONFIGURATION_DM_Msk (0x800UL) /*!< ETH MAC_CONFIGURATION: DM (Bitfield-Mask: 0x01) */ +#define ETH_MAC_CONFIGURATION_LM_Pos (12UL) /*!< ETH MAC_CONFIGURATION: LM (Bit 12) */ +#define ETH_MAC_CONFIGURATION_LM_Msk (0x1000UL) /*!< ETH MAC_CONFIGURATION: LM (Bitfield-Mask: 0x01) */ +#define ETH_MAC_CONFIGURATION_DO_Pos (13UL) /*!< ETH MAC_CONFIGURATION: DO (Bit 13) */ +#define ETH_MAC_CONFIGURATION_DO_Msk (0x2000UL) /*!< ETH MAC_CONFIGURATION: DO (Bitfield-Mask: 0x01) */ +#define ETH_MAC_CONFIGURATION_FES_Pos (14UL) /*!< ETH MAC_CONFIGURATION: FES (Bit 14) */ +#define ETH_MAC_CONFIGURATION_FES_Msk (0x4000UL) /*!< ETH MAC_CONFIGURATION: FES (Bitfield-Mask: 0x01) */ +#define ETH_MAC_CONFIGURATION_DCRS_Pos (16UL) /*!< ETH MAC_CONFIGURATION: DCRS (Bit 16) */ +#define ETH_MAC_CONFIGURATION_DCRS_Msk (0x10000UL) /*!< ETH MAC_CONFIGURATION: DCRS (Bitfield-Mask: 0x01) */ +#define ETH_MAC_CONFIGURATION_IFG_Pos (17UL) /*!< ETH MAC_CONFIGURATION: IFG (Bit 17) */ +#define ETH_MAC_CONFIGURATION_IFG_Msk (0xe0000UL) /*!< ETH MAC_CONFIGURATION: IFG (Bitfield-Mask: 0x07) */ +#define ETH_MAC_CONFIGURATION_JE_Pos (20UL) /*!< ETH MAC_CONFIGURATION: JE (Bit 20) */ +#define ETH_MAC_CONFIGURATION_JE_Msk (0x100000UL) /*!< ETH MAC_CONFIGURATION: JE (Bitfield-Mask: 0x01) */ +#define ETH_MAC_CONFIGURATION_BE_Pos (21UL) /*!< ETH MAC_CONFIGURATION: BE (Bit 21) */ +#define ETH_MAC_CONFIGURATION_BE_Msk (0x200000UL) /*!< ETH MAC_CONFIGURATION: BE (Bitfield-Mask: 0x01) */ +#define ETH_MAC_CONFIGURATION_JD_Pos (22UL) /*!< ETH MAC_CONFIGURATION: JD (Bit 22) */ +#define ETH_MAC_CONFIGURATION_JD_Msk (0x400000UL) /*!< ETH MAC_CONFIGURATION: JD (Bitfield-Mask: 0x01) */ +#define ETH_MAC_CONFIGURATION_WD_Pos (23UL) /*!< ETH MAC_CONFIGURATION: WD (Bit 23) */ +#define ETH_MAC_CONFIGURATION_WD_Msk (0x800000UL) /*!< ETH MAC_CONFIGURATION: WD (Bitfield-Mask: 0x01) */ +#define ETH_MAC_CONFIGURATION_TC_Pos (24UL) /*!< ETH MAC_CONFIGURATION: TC (Bit 24) */ +#define ETH_MAC_CONFIGURATION_TC_Msk (0x1000000UL) /*!< ETH MAC_CONFIGURATION: TC (Bitfield-Mask: 0x01) */ +#define ETH_MAC_CONFIGURATION_CST_Pos (25UL) /*!< ETH MAC_CONFIGURATION: CST (Bit 25) */ +#define ETH_MAC_CONFIGURATION_CST_Msk (0x2000000UL) /*!< ETH MAC_CONFIGURATION: CST (Bitfield-Mask: 0x01) */ +#define ETH_MAC_CONFIGURATION_TWOKPE_Pos (27UL) /*!< ETH MAC_CONFIGURATION: TWOKPE (Bit 27) */ +#define ETH_MAC_CONFIGURATION_TWOKPE_Msk (0x8000000UL) /*!< ETH MAC_CONFIGURATION: TWOKPE (Bitfield-Mask: 0x01) */ +#define ETH_MAC_CONFIGURATION_SARC_Pos (28UL) /*!< ETH MAC_CONFIGURATION: SARC (Bit 28) */ +#define ETH_MAC_CONFIGURATION_SARC_Msk (0x70000000UL) /*!< ETH MAC_CONFIGURATION: SARC (Bitfield-Mask: 0x07) */ + +/* ---------------------------- ETH_MAC_FRAME_FILTER ---------------------------- */ +#define ETH_MAC_FRAME_FILTER_PR_Pos (0UL) /*!< ETH MAC_FRAME_FILTER: PR (Bit 0) */ +#define ETH_MAC_FRAME_FILTER_PR_Msk (0x1UL) /*!< ETH MAC_FRAME_FILTER: PR (Bitfield-Mask: 0x01) */ +#define ETH_MAC_FRAME_FILTER_HUC_Pos (1UL) /*!< ETH MAC_FRAME_FILTER: HUC (Bit 1) */ +#define ETH_MAC_FRAME_FILTER_HUC_Msk (0x2UL) /*!< ETH MAC_FRAME_FILTER: HUC (Bitfield-Mask: 0x01) */ +#define ETH_MAC_FRAME_FILTER_HMC_Pos (2UL) /*!< ETH MAC_FRAME_FILTER: HMC (Bit 2) */ +#define ETH_MAC_FRAME_FILTER_HMC_Msk (0x4UL) /*!< ETH MAC_FRAME_FILTER: HMC (Bitfield-Mask: 0x01) */ +#define ETH_MAC_FRAME_FILTER_DAIF_Pos (3UL) /*!< ETH MAC_FRAME_FILTER: DAIF (Bit 3) */ +#define ETH_MAC_FRAME_FILTER_DAIF_Msk (0x8UL) /*!< ETH MAC_FRAME_FILTER: DAIF (Bitfield-Mask: 0x01) */ +#define ETH_MAC_FRAME_FILTER_PM_Pos (4UL) /*!< ETH MAC_FRAME_FILTER: PM (Bit 4) */ +#define ETH_MAC_FRAME_FILTER_PM_Msk (0x10UL) /*!< ETH MAC_FRAME_FILTER: PM (Bitfield-Mask: 0x01) */ +#define ETH_MAC_FRAME_FILTER_DBF_Pos (5UL) /*!< ETH MAC_FRAME_FILTER: DBF (Bit 5) */ +#define ETH_MAC_FRAME_FILTER_DBF_Msk (0x20UL) /*!< ETH MAC_FRAME_FILTER: DBF (Bitfield-Mask: 0x01) */ +#define ETH_MAC_FRAME_FILTER_PCF_Pos (6UL) /*!< ETH MAC_FRAME_FILTER: PCF (Bit 6) */ +#define ETH_MAC_FRAME_FILTER_PCF_Msk (0xc0UL) /*!< ETH MAC_FRAME_FILTER: PCF (Bitfield-Mask: 0x03) */ +#define ETH_MAC_FRAME_FILTER_SAIF_Pos (8UL) /*!< ETH MAC_FRAME_FILTER: SAIF (Bit 8) */ +#define ETH_MAC_FRAME_FILTER_SAIF_Msk (0x100UL) /*!< ETH MAC_FRAME_FILTER: SAIF (Bitfield-Mask: 0x01) */ +#define ETH_MAC_FRAME_FILTER_SAF_Pos (9UL) /*!< ETH MAC_FRAME_FILTER: SAF (Bit 9) */ +#define ETH_MAC_FRAME_FILTER_SAF_Msk (0x200UL) /*!< ETH MAC_FRAME_FILTER: SAF (Bitfield-Mask: 0x01) */ +#define ETH_MAC_FRAME_FILTER_HPF_Pos (10UL) /*!< ETH MAC_FRAME_FILTER: HPF (Bit 10) */ +#define ETH_MAC_FRAME_FILTER_HPF_Msk (0x400UL) /*!< ETH MAC_FRAME_FILTER: HPF (Bitfield-Mask: 0x01) */ +#define ETH_MAC_FRAME_FILTER_VTFE_Pos (16UL) /*!< ETH MAC_FRAME_FILTER: VTFE (Bit 16) */ +#define ETH_MAC_FRAME_FILTER_VTFE_Msk (0x10000UL) /*!< ETH MAC_FRAME_FILTER: VTFE (Bitfield-Mask: 0x01) */ +#define ETH_MAC_FRAME_FILTER_IPFE_Pos (20UL) /*!< ETH MAC_FRAME_FILTER: IPFE (Bit 20) */ +#define ETH_MAC_FRAME_FILTER_IPFE_Msk (0x100000UL) /*!< ETH MAC_FRAME_FILTER: IPFE (Bitfield-Mask: 0x01) */ +#define ETH_MAC_FRAME_FILTER_DNTU_Pos (21UL) /*!< ETH MAC_FRAME_FILTER: DNTU (Bit 21) */ +#define ETH_MAC_FRAME_FILTER_DNTU_Msk (0x200000UL) /*!< ETH MAC_FRAME_FILTER: DNTU (Bitfield-Mask: 0x01) */ +#define ETH_MAC_FRAME_FILTER_RA_Pos (31UL) /*!< ETH MAC_FRAME_FILTER: RA (Bit 31) */ +#define ETH_MAC_FRAME_FILTER_RA_Msk (0x80000000UL) /*!< ETH MAC_FRAME_FILTER: RA (Bitfield-Mask: 0x01) */ + +/* ----------------------------- ETH_HASH_TABLE_HIGH ---------------------------- */ +#define ETH_HASH_TABLE_HIGH_HTH_Pos (0UL) /*!< ETH HASH_TABLE_HIGH: HTH (Bit 0) */ +#define ETH_HASH_TABLE_HIGH_HTH_Msk (0xffffffffUL) /*!< ETH HASH_TABLE_HIGH: HTH (Bitfield-Mask: 0xffffffff) */ + +/* ----------------------------- ETH_HASH_TABLE_LOW ----------------------------- */ +#define ETH_HASH_TABLE_LOW_HTL_Pos (0UL) /*!< ETH HASH_TABLE_LOW: HTL (Bit 0) */ +#define ETH_HASH_TABLE_LOW_HTL_Msk (0xffffffffUL) /*!< ETH HASH_TABLE_LOW: HTL (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------------ ETH_GMII_ADDRESS ------------------------------ */ +#define ETH_GMII_ADDRESS_MB_Pos (0UL) /*!< ETH GMII_ADDRESS: MB (Bit 0) */ +#define ETH_GMII_ADDRESS_MB_Msk (0x1UL) /*!< ETH GMII_ADDRESS: MB (Bitfield-Mask: 0x01) */ +#define ETH_GMII_ADDRESS_MW_Pos (1UL) /*!< ETH GMII_ADDRESS: MW (Bit 1) */ +#define ETH_GMII_ADDRESS_MW_Msk (0x2UL) /*!< ETH GMII_ADDRESS: MW (Bitfield-Mask: 0x01) */ +#define ETH_GMII_ADDRESS_CR_Pos (2UL) /*!< ETH GMII_ADDRESS: CR (Bit 2) */ +#define ETH_GMII_ADDRESS_CR_Msk (0x3cUL) /*!< ETH GMII_ADDRESS: CR (Bitfield-Mask: 0x0f) */ +#define ETH_GMII_ADDRESS_MR_Pos (6UL) /*!< ETH GMII_ADDRESS: MR (Bit 6) */ +#define ETH_GMII_ADDRESS_MR_Msk (0x7c0UL) /*!< ETH GMII_ADDRESS: MR (Bitfield-Mask: 0x1f) */ +#define ETH_GMII_ADDRESS_PA_Pos (11UL) /*!< ETH GMII_ADDRESS: PA (Bit 11) */ +#define ETH_GMII_ADDRESS_PA_Msk (0xf800UL) /*!< ETH GMII_ADDRESS: PA (Bitfield-Mask: 0x1f) */ + +/* -------------------------------- ETH_GMII_DATA ------------------------------- */ +#define ETH_GMII_DATA_MD_Pos (0UL) /*!< ETH GMII_DATA: MD (Bit 0) */ +#define ETH_GMII_DATA_MD_Msk (0xffffUL) /*!< ETH GMII_DATA: MD (Bitfield-Mask: 0xffff) */ + +/* ------------------------------ ETH_FLOW_CONTROL ------------------------------ */ +#define ETH_FLOW_CONTROL_FCA_BPA_Pos (0UL) /*!< ETH FLOW_CONTROL: FCA_BPA (Bit 0) */ +#define ETH_FLOW_CONTROL_FCA_BPA_Msk (0x1UL) /*!< ETH FLOW_CONTROL: FCA_BPA (Bitfield-Mask: 0x01) */ +#define ETH_FLOW_CONTROL_TFE_Pos (1UL) /*!< ETH FLOW_CONTROL: TFE (Bit 1) */ +#define ETH_FLOW_CONTROL_TFE_Msk (0x2UL) /*!< ETH FLOW_CONTROL: TFE (Bitfield-Mask: 0x01) */ +#define ETH_FLOW_CONTROL_RFE_Pos (2UL) /*!< ETH FLOW_CONTROL: RFE (Bit 2) */ +#define ETH_FLOW_CONTROL_RFE_Msk (0x4UL) /*!< ETH FLOW_CONTROL: RFE (Bitfield-Mask: 0x01) */ +#define ETH_FLOW_CONTROL_UP_Pos (3UL) /*!< ETH FLOW_CONTROL: UP (Bit 3) */ +#define ETH_FLOW_CONTROL_UP_Msk (0x8UL) /*!< ETH FLOW_CONTROL: UP (Bitfield-Mask: 0x01) */ +#define ETH_FLOW_CONTROL_PLT_Pos (4UL) /*!< ETH FLOW_CONTROL: PLT (Bit 4) */ +#define ETH_FLOW_CONTROL_PLT_Msk (0x30UL) /*!< ETH FLOW_CONTROL: PLT (Bitfield-Mask: 0x03) */ +#define ETH_FLOW_CONTROL_DZPQ_Pos (7UL) /*!< ETH FLOW_CONTROL: DZPQ (Bit 7) */ +#define ETH_FLOW_CONTROL_DZPQ_Msk (0x80UL) /*!< ETH FLOW_CONTROL: DZPQ (Bitfield-Mask: 0x01) */ +#define ETH_FLOW_CONTROL_PT_Pos (16UL) /*!< ETH FLOW_CONTROL: PT (Bit 16) */ +#define ETH_FLOW_CONTROL_PT_Msk (0xffff0000UL) /*!< ETH FLOW_CONTROL: PT (Bitfield-Mask: 0xffff) */ + +/* -------------------------------- ETH_VLAN_TAG -------------------------------- */ +#define ETH_VLAN_TAG_VL_Pos (0UL) /*!< ETH VLAN_TAG: VL (Bit 0) */ +#define ETH_VLAN_TAG_VL_Msk (0xffffUL) /*!< ETH VLAN_TAG: VL (Bitfield-Mask: 0xffff) */ +#define ETH_VLAN_TAG_ETV_Pos (16UL) /*!< ETH VLAN_TAG: ETV (Bit 16) */ +#define ETH_VLAN_TAG_ETV_Msk (0x10000UL) /*!< ETH VLAN_TAG: ETV (Bitfield-Mask: 0x01) */ +#define ETH_VLAN_TAG_VTIM_Pos (17UL) /*!< ETH VLAN_TAG: VTIM (Bit 17) */ +#define ETH_VLAN_TAG_VTIM_Msk (0x20000UL) /*!< ETH VLAN_TAG: VTIM (Bitfield-Mask: 0x01) */ +#define ETH_VLAN_TAG_ESVL_Pos (18UL) /*!< ETH VLAN_TAG: ESVL (Bit 18) */ +#define ETH_VLAN_TAG_ESVL_Msk (0x40000UL) /*!< ETH VLAN_TAG: ESVL (Bitfield-Mask: 0x01) */ +#define ETH_VLAN_TAG_VTHM_Pos (19UL) /*!< ETH VLAN_TAG: VTHM (Bit 19) */ +#define ETH_VLAN_TAG_VTHM_Msk (0x80000UL) /*!< ETH VLAN_TAG: VTHM (Bitfield-Mask: 0x01) */ + +/* --------------------------------- ETH_VERSION -------------------------------- */ +#define ETH_VERSION_SNPSVER_Pos (0UL) /*!< ETH VERSION: SNPSVER (Bit 0) */ +#define ETH_VERSION_SNPSVER_Msk (0xffUL) /*!< ETH VERSION: SNPSVER (Bitfield-Mask: 0xff) */ +#define ETH_VERSION_USERVER_Pos (8UL) /*!< ETH VERSION: USERVER (Bit 8) */ +#define ETH_VERSION_USERVER_Msk (0xff00UL) /*!< ETH VERSION: USERVER (Bitfield-Mask: 0xff) */ + +/* ---------------------------------- ETH_DEBUG --------------------------------- */ +#define ETH_DEBUG_RPESTS_Pos (0UL) /*!< ETH DEBUG: RPESTS (Bit 0) */ +#define ETH_DEBUG_RPESTS_Msk (0x1UL) /*!< ETH DEBUG: RPESTS (Bitfield-Mask: 0x01) */ +#define ETH_DEBUG_RFCFCSTS_Pos (1UL) /*!< ETH DEBUG: RFCFCSTS (Bit 1) */ +#define ETH_DEBUG_RFCFCSTS_Msk (0x6UL) /*!< ETH DEBUG: RFCFCSTS (Bitfield-Mask: 0x03) */ +#define ETH_DEBUG_RWCSTS_Pos (4UL) /*!< ETH DEBUG: RWCSTS (Bit 4) */ +#define ETH_DEBUG_RWCSTS_Msk (0x10UL) /*!< ETH DEBUG: RWCSTS (Bitfield-Mask: 0x01) */ +#define ETH_DEBUG_RRCSTS_Pos (5UL) /*!< ETH DEBUG: RRCSTS (Bit 5) */ +#define ETH_DEBUG_RRCSTS_Msk (0x60UL) /*!< ETH DEBUG: RRCSTS (Bitfield-Mask: 0x03) */ +#define ETH_DEBUG_RXFSTS_Pos (8UL) /*!< ETH DEBUG: RXFSTS (Bit 8) */ +#define ETH_DEBUG_RXFSTS_Msk (0x300UL) /*!< ETH DEBUG: RXFSTS (Bitfield-Mask: 0x03) */ +#define ETH_DEBUG_TPESTS_Pos (16UL) /*!< ETH DEBUG: TPESTS (Bit 16) */ +#define ETH_DEBUG_TPESTS_Msk (0x10000UL) /*!< ETH DEBUG: TPESTS (Bitfield-Mask: 0x01) */ +#define ETH_DEBUG_TFCSTS_Pos (17UL) /*!< ETH DEBUG: TFCSTS (Bit 17) */ +#define ETH_DEBUG_TFCSTS_Msk (0x60000UL) /*!< ETH DEBUG: TFCSTS (Bitfield-Mask: 0x03) */ +#define ETH_DEBUG_TXPAUSED_Pos (19UL) /*!< ETH DEBUG: TXPAUSED (Bit 19) */ +#define ETH_DEBUG_TXPAUSED_Msk (0x80000UL) /*!< ETH DEBUG: TXPAUSED (Bitfield-Mask: 0x01) */ +#define ETH_DEBUG_TRCSTS_Pos (20UL) /*!< ETH DEBUG: TRCSTS (Bit 20) */ +#define ETH_DEBUG_TRCSTS_Msk (0x300000UL) /*!< ETH DEBUG: TRCSTS (Bitfield-Mask: 0x03) */ +#define ETH_DEBUG_TWCSTS_Pos (22UL) /*!< ETH DEBUG: TWCSTS (Bit 22) */ +#define ETH_DEBUG_TWCSTS_Msk (0x400000UL) /*!< ETH DEBUG: TWCSTS (Bitfield-Mask: 0x01) */ +#define ETH_DEBUG_TXFSTS_Pos (24UL) /*!< ETH DEBUG: TXFSTS (Bit 24) */ +#define ETH_DEBUG_TXFSTS_Msk (0x1000000UL) /*!< ETH DEBUG: TXFSTS (Bitfield-Mask: 0x01) */ +#define ETH_DEBUG_TXSTSFSTS_Pos (25UL) /*!< ETH DEBUG: TXSTSFSTS (Bit 25) */ +#define ETH_DEBUG_TXSTSFSTS_Msk (0x2000000UL) /*!< ETH DEBUG: TXSTSFSTS (Bitfield-Mask: 0x01) */ + +/* ----------------------- ETH_REMOTE_WAKE_UP_FRAME_FILTER ---------------------- */ +#define ETH_REMOTE_WAKE_UP_FRAME_FILTER_WKUPFRMFTR_Pos (0UL) /*!< ETH REMOTE_WAKE_UP_FRAME_FILTER: WKUPFRMFTR (Bit 0) */ +#define ETH_REMOTE_WAKE_UP_FRAME_FILTER_WKUPFRMFTR_Msk (0xffffffffUL) /*!< ETH REMOTE_WAKE_UP_FRAME_FILTER: WKUPFRMFTR (Bitfield-Mask: 0xffffffff) */ + +/* --------------------------- ETH_PMT_CONTROL_STATUS --------------------------- */ +#define ETH_PMT_CONTROL_STATUS_PWRDWN_Pos (0UL) /*!< ETH PMT_CONTROL_STATUS: PWRDWN (Bit 0) */ +#define ETH_PMT_CONTROL_STATUS_PWRDWN_Msk (0x1UL) /*!< ETH PMT_CONTROL_STATUS: PWRDWN (Bitfield-Mask: 0x01) */ +#define ETH_PMT_CONTROL_STATUS_MGKPKTEN_Pos (1UL) /*!< ETH PMT_CONTROL_STATUS: MGKPKTEN (Bit 1) */ +#define ETH_PMT_CONTROL_STATUS_MGKPKTEN_Msk (0x2UL) /*!< ETH PMT_CONTROL_STATUS: MGKPKTEN (Bitfield-Mask: 0x01) */ +#define ETH_PMT_CONTROL_STATUS_RWKPKTEN_Pos (2UL) /*!< ETH PMT_CONTROL_STATUS: RWKPKTEN (Bit 2) */ +#define ETH_PMT_CONTROL_STATUS_RWKPKTEN_Msk (0x4UL) /*!< ETH PMT_CONTROL_STATUS: RWKPKTEN (Bitfield-Mask: 0x01) */ +#define ETH_PMT_CONTROL_STATUS_MGKPRCVD_Pos (5UL) /*!< ETH PMT_CONTROL_STATUS: MGKPRCVD (Bit 5) */ +#define ETH_PMT_CONTROL_STATUS_MGKPRCVD_Msk (0x20UL) /*!< ETH PMT_CONTROL_STATUS: MGKPRCVD (Bitfield-Mask: 0x01) */ +#define ETH_PMT_CONTROL_STATUS_RWKPRCVD_Pos (6UL) /*!< ETH PMT_CONTROL_STATUS: RWKPRCVD (Bit 6) */ +#define ETH_PMT_CONTROL_STATUS_RWKPRCVD_Msk (0x40UL) /*!< ETH PMT_CONTROL_STATUS: RWKPRCVD (Bitfield-Mask: 0x01) */ +#define ETH_PMT_CONTROL_STATUS_GLBLUCAST_Pos (9UL) /*!< ETH PMT_CONTROL_STATUS: GLBLUCAST (Bit 9) */ +#define ETH_PMT_CONTROL_STATUS_GLBLUCAST_Msk (0x200UL) /*!< ETH PMT_CONTROL_STATUS: GLBLUCAST (Bitfield-Mask: 0x01) */ +#define ETH_PMT_CONTROL_STATUS_RWKFILTRST_Pos (31UL) /*!< ETH PMT_CONTROL_STATUS: RWKFILTRST (Bit 31) */ +#define ETH_PMT_CONTROL_STATUS_RWKFILTRST_Msk (0x80000000UL) /*!< ETH PMT_CONTROL_STATUS: RWKFILTRST (Bitfield-Mask: 0x01) */ + +/* ---------------------------- ETH_INTERRUPT_STATUS ---------------------------- */ +#define ETH_INTERRUPT_STATUS_PMTIS_Pos (3UL) /*!< ETH INTERRUPT_STATUS: PMTIS (Bit 3) */ +#define ETH_INTERRUPT_STATUS_PMTIS_Msk (0x8UL) /*!< ETH INTERRUPT_STATUS: PMTIS (Bitfield-Mask: 0x01) */ +#define ETH_INTERRUPT_STATUS_MMCIS_Pos (4UL) /*!< ETH INTERRUPT_STATUS: MMCIS (Bit 4) */ +#define ETH_INTERRUPT_STATUS_MMCIS_Msk (0x10UL) /*!< ETH INTERRUPT_STATUS: MMCIS (Bitfield-Mask: 0x01) */ +#define ETH_INTERRUPT_STATUS_MMCRXIS_Pos (5UL) /*!< ETH INTERRUPT_STATUS: MMCRXIS (Bit 5) */ +#define ETH_INTERRUPT_STATUS_MMCRXIS_Msk (0x20UL) /*!< ETH INTERRUPT_STATUS: MMCRXIS (Bitfield-Mask: 0x01) */ +#define ETH_INTERRUPT_STATUS_MMCTXIS_Pos (6UL) /*!< ETH INTERRUPT_STATUS: MMCTXIS (Bit 6) */ +#define ETH_INTERRUPT_STATUS_MMCTXIS_Msk (0x40UL) /*!< ETH INTERRUPT_STATUS: MMCTXIS (Bitfield-Mask: 0x01) */ +#define ETH_INTERRUPT_STATUS_MMCRXIPIS_Pos (7UL) /*!< ETH INTERRUPT_STATUS: MMCRXIPIS (Bit 7) */ +#define ETH_INTERRUPT_STATUS_MMCRXIPIS_Msk (0x80UL) /*!< ETH INTERRUPT_STATUS: MMCRXIPIS (Bitfield-Mask: 0x01) */ +#define ETH_INTERRUPT_STATUS_TSIS_Pos (9UL) /*!< ETH INTERRUPT_STATUS: TSIS (Bit 9) */ +#define ETH_INTERRUPT_STATUS_TSIS_Msk (0x200UL) /*!< ETH INTERRUPT_STATUS: TSIS (Bitfield-Mask: 0x01) */ + +/* ----------------------------- ETH_INTERRUPT_MASK ----------------------------- */ +#define ETH_INTERRUPT_MASK_PMTIM_Pos (3UL) /*!< ETH INTERRUPT_MASK: PMTIM (Bit 3) */ +#define ETH_INTERRUPT_MASK_PMTIM_Msk (0x8UL) /*!< ETH INTERRUPT_MASK: PMTIM (Bitfield-Mask: 0x01) */ +#define ETH_INTERRUPT_MASK_TSIM_Pos (9UL) /*!< ETH INTERRUPT_MASK: TSIM (Bit 9) */ +#define ETH_INTERRUPT_MASK_TSIM_Msk (0x200UL) /*!< ETH INTERRUPT_MASK: TSIM (Bitfield-Mask: 0x01) */ + +/* ---------------------------- ETH_MAC_ADDRESS0_HIGH --------------------------- */ +#define ETH_MAC_ADDRESS0_HIGH_ADDRHI_Pos (0UL) /*!< ETH MAC_ADDRESS0_HIGH: ADDRHI (Bit 0) */ +#define ETH_MAC_ADDRESS0_HIGH_ADDRHI_Msk (0xffffUL) /*!< ETH MAC_ADDRESS0_HIGH: ADDRHI (Bitfield-Mask: 0xffff) */ +#define ETH_MAC_ADDRESS0_HIGH_AE_Pos (31UL) /*!< ETH MAC_ADDRESS0_HIGH: AE (Bit 31) */ +#define ETH_MAC_ADDRESS0_HIGH_AE_Msk (0x80000000UL) /*!< ETH MAC_ADDRESS0_HIGH: AE (Bitfield-Mask: 0x01) */ + +/* ---------------------------- ETH_MAC_ADDRESS0_LOW ---------------------------- */ +#define ETH_MAC_ADDRESS0_LOW_ADDRLO_Pos (0UL) /*!< ETH MAC_ADDRESS0_LOW: ADDRLO (Bit 0) */ +#define ETH_MAC_ADDRESS0_LOW_ADDRLO_Msk (0xffffffffUL) /*!< ETH MAC_ADDRESS0_LOW: ADDRLO (Bitfield-Mask: 0xffffffff) */ + +/* ---------------------------- ETH_MAC_ADDRESS1_HIGH --------------------------- */ +#define ETH_MAC_ADDRESS1_HIGH_ADDRHI_Pos (0UL) /*!< ETH MAC_ADDRESS1_HIGH: ADDRHI (Bit 0) */ +#define ETH_MAC_ADDRESS1_HIGH_ADDRHI_Msk (0xffffUL) /*!< ETH MAC_ADDRESS1_HIGH: ADDRHI (Bitfield-Mask: 0xffff) */ +#define ETH_MAC_ADDRESS1_HIGH_MBC_Pos (24UL) /*!< ETH MAC_ADDRESS1_HIGH: MBC (Bit 24) */ +#define ETH_MAC_ADDRESS1_HIGH_MBC_Msk (0x3f000000UL) /*!< ETH MAC_ADDRESS1_HIGH: MBC (Bitfield-Mask: 0x3f) */ +#define ETH_MAC_ADDRESS1_HIGH_SA_Pos (30UL) /*!< ETH MAC_ADDRESS1_HIGH: SA (Bit 30) */ +#define ETH_MAC_ADDRESS1_HIGH_SA_Msk (0x40000000UL) /*!< ETH MAC_ADDRESS1_HIGH: SA (Bitfield-Mask: 0x01) */ +#define ETH_MAC_ADDRESS1_HIGH_AE_Pos (31UL) /*!< ETH MAC_ADDRESS1_HIGH: AE (Bit 31) */ +#define ETH_MAC_ADDRESS1_HIGH_AE_Msk (0x80000000UL) /*!< ETH MAC_ADDRESS1_HIGH: AE (Bitfield-Mask: 0x01) */ + +/* ---------------------------- ETH_MAC_ADDRESS1_LOW ---------------------------- */ +#define ETH_MAC_ADDRESS1_LOW_ADDRLO_Pos (0UL) /*!< ETH MAC_ADDRESS1_LOW: ADDRLO (Bit 0) */ +#define ETH_MAC_ADDRESS1_LOW_ADDRLO_Msk (0xffffffffUL) /*!< ETH MAC_ADDRESS1_LOW: ADDRLO (Bitfield-Mask: 0xffffffff) */ + +/* ---------------------------- ETH_MAC_ADDRESS2_HIGH --------------------------- */ +#define ETH_MAC_ADDRESS2_HIGH_ADDRHI_Pos (0UL) /*!< ETH MAC_ADDRESS2_HIGH: ADDRHI (Bit 0) */ +#define ETH_MAC_ADDRESS2_HIGH_ADDRHI_Msk (0xffffUL) /*!< ETH MAC_ADDRESS2_HIGH: ADDRHI (Bitfield-Mask: 0xffff) */ +#define ETH_MAC_ADDRESS2_HIGH_MBC_Pos (24UL) /*!< ETH MAC_ADDRESS2_HIGH: MBC (Bit 24) */ +#define ETH_MAC_ADDRESS2_HIGH_MBC_Msk (0x3f000000UL) /*!< ETH MAC_ADDRESS2_HIGH: MBC (Bitfield-Mask: 0x3f) */ +#define ETH_MAC_ADDRESS2_HIGH_SA_Pos (30UL) /*!< ETH MAC_ADDRESS2_HIGH: SA (Bit 30) */ +#define ETH_MAC_ADDRESS2_HIGH_SA_Msk (0x40000000UL) /*!< ETH MAC_ADDRESS2_HIGH: SA (Bitfield-Mask: 0x01) */ +#define ETH_MAC_ADDRESS2_HIGH_AE_Pos (31UL) /*!< ETH MAC_ADDRESS2_HIGH: AE (Bit 31) */ +#define ETH_MAC_ADDRESS2_HIGH_AE_Msk (0x80000000UL) /*!< ETH MAC_ADDRESS2_HIGH: AE (Bitfield-Mask: 0x01) */ + +/* ---------------------------- ETH_MAC_ADDRESS2_LOW ---------------------------- */ +#define ETH_MAC_ADDRESS2_LOW_ADDRLO_Pos (0UL) /*!< ETH MAC_ADDRESS2_LOW: ADDRLO (Bit 0) */ +#define ETH_MAC_ADDRESS2_LOW_ADDRLO_Msk (0xffffffffUL) /*!< ETH MAC_ADDRESS2_LOW: ADDRLO (Bitfield-Mask: 0xffffffff) */ + +/* ---------------------------- ETH_MAC_ADDRESS3_HIGH --------------------------- */ +#define ETH_MAC_ADDRESS3_HIGH_ADDRHI_Pos (0UL) /*!< ETH MAC_ADDRESS3_HIGH: ADDRHI (Bit 0) */ +#define ETH_MAC_ADDRESS3_HIGH_ADDRHI_Msk (0xffffUL) /*!< ETH MAC_ADDRESS3_HIGH: ADDRHI (Bitfield-Mask: 0xffff) */ +#define ETH_MAC_ADDRESS3_HIGH_MBC_Pos (24UL) /*!< ETH MAC_ADDRESS3_HIGH: MBC (Bit 24) */ +#define ETH_MAC_ADDRESS3_HIGH_MBC_Msk (0x3f000000UL) /*!< ETH MAC_ADDRESS3_HIGH: MBC (Bitfield-Mask: 0x3f) */ +#define ETH_MAC_ADDRESS3_HIGH_SA_Pos (30UL) /*!< ETH MAC_ADDRESS3_HIGH: SA (Bit 30) */ +#define ETH_MAC_ADDRESS3_HIGH_SA_Msk (0x40000000UL) /*!< ETH MAC_ADDRESS3_HIGH: SA (Bitfield-Mask: 0x01) */ +#define ETH_MAC_ADDRESS3_HIGH_AE_Pos (31UL) /*!< ETH MAC_ADDRESS3_HIGH: AE (Bit 31) */ +#define ETH_MAC_ADDRESS3_HIGH_AE_Msk (0x80000000UL) /*!< ETH MAC_ADDRESS3_HIGH: AE (Bitfield-Mask: 0x01) */ + +/* ---------------------------- ETH_MAC_ADDRESS3_LOW ---------------------------- */ +#define ETH_MAC_ADDRESS3_LOW_ADDRLO_Pos (0UL) /*!< ETH MAC_ADDRESS3_LOW: ADDRLO (Bit 0) */ +#define ETH_MAC_ADDRESS3_LOW_ADDRLO_Msk (0xffffffffUL) /*!< ETH MAC_ADDRESS3_LOW: ADDRLO (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------------- ETH_MMC_CONTROL ------------------------------ */ +#define ETH_MMC_CONTROL_CNTRST_Pos (0UL) /*!< ETH MMC_CONTROL: CNTRST (Bit 0) */ +#define ETH_MMC_CONTROL_CNTRST_Msk (0x1UL) /*!< ETH MMC_CONTROL: CNTRST (Bitfield-Mask: 0x01) */ +#define ETH_MMC_CONTROL_CNTSTOPRO_Pos (1UL) /*!< ETH MMC_CONTROL: CNTSTOPRO (Bit 1) */ +#define ETH_MMC_CONTROL_CNTSTOPRO_Msk (0x2UL) /*!< ETH MMC_CONTROL: CNTSTOPRO (Bitfield-Mask: 0x01) */ +#define ETH_MMC_CONTROL_RSTONRD_Pos (2UL) /*!< ETH MMC_CONTROL: RSTONRD (Bit 2) */ +#define ETH_MMC_CONTROL_RSTONRD_Msk (0x4UL) /*!< ETH MMC_CONTROL: RSTONRD (Bitfield-Mask: 0x01) */ +#define ETH_MMC_CONTROL_CNTFREEZ_Pos (3UL) /*!< ETH MMC_CONTROL: CNTFREEZ (Bit 3) */ +#define ETH_MMC_CONTROL_CNTFREEZ_Msk (0x8UL) /*!< ETH MMC_CONTROL: CNTFREEZ (Bitfield-Mask: 0x01) */ +#define ETH_MMC_CONTROL_CNTPRST_Pos (4UL) /*!< ETH MMC_CONTROL: CNTPRST (Bit 4) */ +#define ETH_MMC_CONTROL_CNTPRST_Msk (0x10UL) /*!< ETH MMC_CONTROL: CNTPRST (Bitfield-Mask: 0x01) */ +#define ETH_MMC_CONTROL_CNTPRSTLVL_Pos (5UL) /*!< ETH MMC_CONTROL: CNTPRSTLVL (Bit 5) */ +#define ETH_MMC_CONTROL_CNTPRSTLVL_Msk (0x20UL) /*!< ETH MMC_CONTROL: CNTPRSTLVL (Bitfield-Mask: 0x01) */ +#define ETH_MMC_CONTROL_UCDBC_Pos (8UL) /*!< ETH MMC_CONTROL: UCDBC (Bit 8) */ +#define ETH_MMC_CONTROL_UCDBC_Msk (0x100UL) /*!< ETH MMC_CONTROL: UCDBC (Bitfield-Mask: 0x01) */ + +/* -------------------------- ETH_MMC_RECEIVE_INTERRUPT ------------------------- */ +#define ETH_MMC_RECEIVE_INTERRUPT_RXGBFRMIS_Pos (0UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXGBFRMIS (Bit 0) */ +#define ETH_MMC_RECEIVE_INTERRUPT_RXGBFRMIS_Msk (0x1UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXGBFRMIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_RECEIVE_INTERRUPT_RXGBOCTIS_Pos (1UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXGBOCTIS (Bit 1) */ +#define ETH_MMC_RECEIVE_INTERRUPT_RXGBOCTIS_Msk (0x2UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXGBOCTIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_RECEIVE_INTERRUPT_RXGOCTIS_Pos (2UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXGOCTIS (Bit 2) */ +#define ETH_MMC_RECEIVE_INTERRUPT_RXGOCTIS_Msk (0x4UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXGOCTIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_RECEIVE_INTERRUPT_RXBCGFIS_Pos (3UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXBCGFIS (Bit 3) */ +#define ETH_MMC_RECEIVE_INTERRUPT_RXBCGFIS_Msk (0x8UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXBCGFIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_RECEIVE_INTERRUPT_RXMCGFIS_Pos (4UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXMCGFIS (Bit 4) */ +#define ETH_MMC_RECEIVE_INTERRUPT_RXMCGFIS_Msk (0x10UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXMCGFIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_RECEIVE_INTERRUPT_RXCRCERFIS_Pos (5UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXCRCERFIS (Bit 5) */ +#define ETH_MMC_RECEIVE_INTERRUPT_RXCRCERFIS_Msk (0x20UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXCRCERFIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_RECEIVE_INTERRUPT_RXALGNERFIS_Pos (6UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXALGNERFIS (Bit 6) */ +#define ETH_MMC_RECEIVE_INTERRUPT_RXALGNERFIS_Msk (0x40UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXALGNERFIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_RECEIVE_INTERRUPT_RXRUNTFIS_Pos (7UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXRUNTFIS (Bit 7) */ +#define ETH_MMC_RECEIVE_INTERRUPT_RXRUNTFIS_Msk (0x80UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXRUNTFIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_RECEIVE_INTERRUPT_RXJABERFIS_Pos (8UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXJABERFIS (Bit 8) */ +#define ETH_MMC_RECEIVE_INTERRUPT_RXJABERFIS_Msk (0x100UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXJABERFIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_RECEIVE_INTERRUPT_RXUSIZEGFIS_Pos (9UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXUSIZEGFIS (Bit 9) */ +#define ETH_MMC_RECEIVE_INTERRUPT_RXUSIZEGFIS_Msk (0x200UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXUSIZEGFIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_RECEIVE_INTERRUPT_RXOSIZEGFIS_Pos (10UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXOSIZEGFIS (Bit 10) */ +#define ETH_MMC_RECEIVE_INTERRUPT_RXOSIZEGFIS_Msk (0x400UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXOSIZEGFIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_RECEIVE_INTERRUPT_RX64OCTGBFIS_Pos (11UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RX64OCTGBFIS (Bit 11) */ +#define ETH_MMC_RECEIVE_INTERRUPT_RX64OCTGBFIS_Msk (0x800UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RX64OCTGBFIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_RECEIVE_INTERRUPT_RX65T127OCTGBFIS_Pos (12UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RX65T127OCTGBFIS (Bit 12) */ +#define ETH_MMC_RECEIVE_INTERRUPT_RX65T127OCTGBFIS_Msk (0x1000UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RX65T127OCTGBFIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_RECEIVE_INTERRUPT_RX128T255OCTGBFIS_Pos (13UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RX128T255OCTGBFIS (Bit 13) */ +#define ETH_MMC_RECEIVE_INTERRUPT_RX128T255OCTGBFIS_Msk (0x2000UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RX128T255OCTGBFIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_RECEIVE_INTERRUPT_RX256T511OCTGBFIS_Pos (14UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RX256T511OCTGBFIS (Bit 14) */ +#define ETH_MMC_RECEIVE_INTERRUPT_RX256T511OCTGBFIS_Msk (0x4000UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RX256T511OCTGBFIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_RECEIVE_INTERRUPT_RX512T1023OCTGBFIS_Pos (15UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RX512T1023OCTGBFIS (Bit 15) */ +#define ETH_MMC_RECEIVE_INTERRUPT_RX512T1023OCTGBFIS_Msk (0x8000UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RX512T1023OCTGBFIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_RECEIVE_INTERRUPT_RX1024TMAXOCTGBFIS_Pos (16UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RX1024TMAXOCTGBFIS (Bit 16) */ +#define ETH_MMC_RECEIVE_INTERRUPT_RX1024TMAXOCTGBFIS_Msk (0x10000UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RX1024TMAXOCTGBFIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_RECEIVE_INTERRUPT_RXUCGFIS_Pos (17UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXUCGFIS (Bit 17) */ +#define ETH_MMC_RECEIVE_INTERRUPT_RXUCGFIS_Msk (0x20000UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXUCGFIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_RECEIVE_INTERRUPT_RXLENERFIS_Pos (18UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXLENERFIS (Bit 18) */ +#define ETH_MMC_RECEIVE_INTERRUPT_RXLENERFIS_Msk (0x40000UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXLENERFIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_RECEIVE_INTERRUPT_RXORANGEFIS_Pos (19UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXORANGEFIS (Bit 19) */ +#define ETH_MMC_RECEIVE_INTERRUPT_RXORANGEFIS_Msk (0x80000UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXORANGEFIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_RECEIVE_INTERRUPT_RXPAUSFIS_Pos (20UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXPAUSFIS (Bit 20) */ +#define ETH_MMC_RECEIVE_INTERRUPT_RXPAUSFIS_Msk (0x100000UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXPAUSFIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_RECEIVE_INTERRUPT_RXFOVFIS_Pos (21UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXFOVFIS (Bit 21) */ +#define ETH_MMC_RECEIVE_INTERRUPT_RXFOVFIS_Msk (0x200000UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXFOVFIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_RECEIVE_INTERRUPT_RXVLANGBFIS_Pos (22UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXVLANGBFIS (Bit 22) */ +#define ETH_MMC_RECEIVE_INTERRUPT_RXVLANGBFIS_Msk (0x400000UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXVLANGBFIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_RECEIVE_INTERRUPT_RXWDOGFIS_Pos (23UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXWDOGFIS (Bit 23) */ +#define ETH_MMC_RECEIVE_INTERRUPT_RXWDOGFIS_Msk (0x800000UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXWDOGFIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_RECEIVE_INTERRUPT_RXRCVERRFIS_Pos (24UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXRCVERRFIS (Bit 24) */ +#define ETH_MMC_RECEIVE_INTERRUPT_RXRCVERRFIS_Msk (0x1000000UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXRCVERRFIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_RECEIVE_INTERRUPT_RXCTRLFIS_Pos (25UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXCTRLFIS (Bit 25) */ +#define ETH_MMC_RECEIVE_INTERRUPT_RXCTRLFIS_Msk (0x2000000UL) /*!< ETH MMC_RECEIVE_INTERRUPT: RXCTRLFIS (Bitfield-Mask: 0x01) */ + +/* ------------------------- ETH_MMC_TRANSMIT_INTERRUPT ------------------------- */ +#define ETH_MMC_TRANSMIT_INTERRUPT_TXGBOCTIS_Pos (0UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXGBOCTIS (Bit 0) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_TXGBOCTIS_Msk (0x1UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXGBOCTIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_TXGBFRMIS_Pos (1UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXGBFRMIS (Bit 1) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_TXGBFRMIS_Msk (0x2UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXGBFRMIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_TXBCGFIS_Pos (2UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXBCGFIS (Bit 2) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_TXBCGFIS_Msk (0x4UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXBCGFIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_TXMCGFIS_Pos (3UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXMCGFIS (Bit 3) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_TXMCGFIS_Msk (0x8UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXMCGFIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_TX64OCTGBFIS_Pos (4UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TX64OCTGBFIS (Bit 4) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_TX64OCTGBFIS_Msk (0x10UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TX64OCTGBFIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_TX65T127OCTGBFIS_Pos (5UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TX65T127OCTGBFIS (Bit 5) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_TX65T127OCTGBFIS_Msk (0x20UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TX65T127OCTGBFIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_TX128T255OCTGBFIS_Pos (6UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TX128T255OCTGBFIS (Bit 6) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_TX128T255OCTGBFIS_Msk (0x40UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TX128T255OCTGBFIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_TX256T511OCTGBFIS_Pos (7UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TX256T511OCTGBFIS (Bit 7) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_TX256T511OCTGBFIS_Msk (0x80UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TX256T511OCTGBFIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_TX512T1023OCTGBFIS_Pos (8UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TX512T1023OCTGBFIS (Bit 8) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_TX512T1023OCTGBFIS_Msk (0x100UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TX512T1023OCTGBFIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_TX1024TMAXOCTGBFIS_Pos (9UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TX1024TMAXOCTGBFIS (Bit 9) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_TX1024TMAXOCTGBFIS_Msk (0x200UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TX1024TMAXOCTGBFIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_TXUCGBFIS_Pos (10UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXUCGBFIS (Bit 10) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_TXUCGBFIS_Msk (0x400UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXUCGBFIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_TXMCGBFIS_Pos (11UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXMCGBFIS (Bit 11) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_TXMCGBFIS_Msk (0x800UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXMCGBFIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_TXBCGBFIS_Pos (12UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXBCGBFIS (Bit 12) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_TXBCGBFIS_Msk (0x1000UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXBCGBFIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_TXUFLOWERFIS_Pos (13UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXUFLOWERFIS (Bit 13) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_TXUFLOWERFIS_Msk (0x2000UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXUFLOWERFIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_TXSCOLGFIS_Pos (14UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXSCOLGFIS (Bit 14) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_TXSCOLGFIS_Msk (0x4000UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXSCOLGFIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_TXMCOLGFIS_Pos (15UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXMCOLGFIS (Bit 15) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_TXMCOLGFIS_Msk (0x8000UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXMCOLGFIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_TXDEFFIS_Pos (16UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXDEFFIS (Bit 16) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_TXDEFFIS_Msk (0x10000UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXDEFFIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_TXLATCOLFIS_Pos (17UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXLATCOLFIS (Bit 17) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_TXLATCOLFIS_Msk (0x20000UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXLATCOLFIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_TXEXCOLFIS_Pos (18UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXEXCOLFIS (Bit 18) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_TXEXCOLFIS_Msk (0x40000UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXEXCOLFIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_TXCARERFIS_Pos (19UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXCARERFIS (Bit 19) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_TXCARERFIS_Msk (0x80000UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXCARERFIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_TXGOCTIS_Pos (20UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXGOCTIS (Bit 20) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_TXGOCTIS_Msk (0x100000UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXGOCTIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_TXGFRMIS_Pos (21UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXGFRMIS (Bit 21) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_TXGFRMIS_Msk (0x200000UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXGFRMIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_TXEXDEFFIS_Pos (22UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXEXDEFFIS (Bit 22) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_TXEXDEFFIS_Msk (0x400000UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXEXDEFFIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_TXPAUSFIS_Pos (23UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXPAUSFIS (Bit 23) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_TXPAUSFIS_Msk (0x800000UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXPAUSFIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_TXVLANGFIS_Pos (24UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXVLANGFIS (Bit 24) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_TXVLANGFIS_Msk (0x1000000UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXVLANGFIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_TXOSIZEGFIS_Pos (25UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXOSIZEGFIS (Bit 25) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_TXOSIZEGFIS_Msk (0x2000000UL) /*!< ETH MMC_TRANSMIT_INTERRUPT: TXOSIZEGFIS (Bitfield-Mask: 0x01) */ + +/* ----------------------- ETH_MMC_RECEIVE_INTERRUPT_MASK ----------------------- */ +#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXGBFRMIM_Pos (0UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXGBFRMIM (Bit 0) */ +#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXGBFRMIM_Msk (0x1UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXGBFRMIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXGBOCTIM_Pos (1UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXGBOCTIM (Bit 1) */ +#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXGBOCTIM_Msk (0x2UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXGBOCTIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXGOCTIM_Pos (2UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXGOCTIM (Bit 2) */ +#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXGOCTIM_Msk (0x4UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXGOCTIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXBCGFIM_Pos (3UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXBCGFIM (Bit 3) */ +#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXBCGFIM_Msk (0x8UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXBCGFIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXMCGFIM_Pos (4UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXMCGFIM (Bit 4) */ +#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXMCGFIM_Msk (0x10UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXMCGFIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXCRCERFIM_Pos (5UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXCRCERFIM (Bit 5) */ +#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXCRCERFIM_Msk (0x20UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXCRCERFIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXALGNERFIM_Pos (6UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXALGNERFIM (Bit 6) */ +#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXALGNERFIM_Msk (0x40UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXALGNERFIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXRUNTFIM_Pos (7UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXRUNTFIM (Bit 7) */ +#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXRUNTFIM_Msk (0x80UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXRUNTFIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXJABERFIM_Pos (8UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXJABERFIM (Bit 8) */ +#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXJABERFIM_Msk (0x100UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXJABERFIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXUSIZEGFIM_Pos (9UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXUSIZEGFIM (Bit 9) */ +#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXUSIZEGFIM_Msk (0x200UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXUSIZEGFIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXOSIZEGFIM_Pos (10UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXOSIZEGFIM (Bit 10) */ +#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXOSIZEGFIM_Msk (0x400UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXOSIZEGFIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RX64OCTGBFIM_Pos (11UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RX64OCTGBFIM (Bit 11) */ +#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RX64OCTGBFIM_Msk (0x800UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RX64OCTGBFIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RX65T127OCTGBFIM_Pos (12UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RX65T127OCTGBFIM (Bit 12) */ +#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RX65T127OCTGBFIM_Msk (0x1000UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RX65T127OCTGBFIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RX128T255OCTGBFIM_Pos (13UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RX128T255OCTGBFIM (Bit 13) */ +#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RX128T255OCTGBFIM_Msk (0x2000UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RX128T255OCTGBFIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RX256T511OCTGBFIM_Pos (14UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RX256T511OCTGBFIM (Bit 14) */ +#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RX256T511OCTGBFIM_Msk (0x4000UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RX256T511OCTGBFIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RX512T1023OCTGBFIM_Pos (15UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RX512T1023OCTGBFIM (Bit 15) */ +#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RX512T1023OCTGBFIM_Msk (0x8000UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RX512T1023OCTGBFIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RX1024TMAXOCTGBFIM_Pos (16UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RX1024TMAXOCTGBFIM (Bit 16) */ +#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RX1024TMAXOCTGBFIM_Msk (0x10000UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RX1024TMAXOCTGBFIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXUCGFIM_Pos (17UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXUCGFIM (Bit 17) */ +#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXUCGFIM_Msk (0x20000UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXUCGFIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXLENERFIM_Pos (18UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXLENERFIM (Bit 18) */ +#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXLENERFIM_Msk (0x40000UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXLENERFIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXORANGEFIM_Pos (19UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXORANGEFIM (Bit 19) */ +#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXORANGEFIM_Msk (0x80000UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXORANGEFIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXPAUSFIM_Pos (20UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXPAUSFIM (Bit 20) */ +#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXPAUSFIM_Msk (0x100000UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXPAUSFIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXFOVFIM_Pos (21UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXFOVFIM (Bit 21) */ +#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXFOVFIM_Msk (0x200000UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXFOVFIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXVLANGBFIM_Pos (22UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXVLANGBFIM (Bit 22) */ +#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXVLANGBFIM_Msk (0x400000UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXVLANGBFIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXWDOGFIM_Pos (23UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXWDOGFIM (Bit 23) */ +#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXWDOGFIM_Msk (0x800000UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXWDOGFIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXRCVERRFIM_Pos (24UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXRCVERRFIM (Bit 24) */ +#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXRCVERRFIM_Msk (0x1000000UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXRCVERRFIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXCTRLFIM_Pos (25UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXCTRLFIM (Bit 25) */ +#define ETH_MMC_RECEIVE_INTERRUPT_MASK_RXCTRLFIM_Msk (0x2000000UL) /*!< ETH MMC_RECEIVE_INTERRUPT_MASK: RXCTRLFIM (Bitfield-Mask: 0x01) */ + +/* ----------------------- ETH_MMC_TRANSMIT_INTERRUPT_MASK ---------------------- */ +#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXGBOCTIM_Pos (0UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXGBOCTIM (Bit 0) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXGBOCTIM_Msk (0x1UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXGBOCTIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXGBFRMIM_Pos (1UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXGBFRMIM (Bit 1) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXGBFRMIM_Msk (0x2UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXGBFRMIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXBCGFIM_Pos (2UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXBCGFIM (Bit 2) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXBCGFIM_Msk (0x4UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXBCGFIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXMCGFIM_Pos (3UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXMCGFIM (Bit 3) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXMCGFIM_Msk (0x8UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXMCGFIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TX64OCTGBFIM_Pos (4UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TX64OCTGBFIM (Bit 4) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TX64OCTGBFIM_Msk (0x10UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TX64OCTGBFIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TX65T127OCTGBFIM_Pos (5UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TX65T127OCTGBFIM (Bit 5) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TX65T127OCTGBFIM_Msk (0x20UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TX65T127OCTGBFIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TX128T255OCTGBFIM_Pos (6UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TX128T255OCTGBFIM (Bit 6) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TX128T255OCTGBFIM_Msk (0x40UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TX128T255OCTGBFIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TX256T511OCTGBFIM_Pos (7UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TX256T511OCTGBFIM (Bit 7) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TX256T511OCTGBFIM_Msk (0x80UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TX256T511OCTGBFIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TX512T1023OCTGBFIM_Pos (8UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TX512T1023OCTGBFIM (Bit 8) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TX512T1023OCTGBFIM_Msk (0x100UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TX512T1023OCTGBFIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TX1024TMAXOCTGBFIM_Pos (9UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TX1024TMAXOCTGBFIM (Bit 9) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TX1024TMAXOCTGBFIM_Msk (0x200UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TX1024TMAXOCTGBFIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXUCGBFIM_Pos (10UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXUCGBFIM (Bit 10) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXUCGBFIM_Msk (0x400UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXUCGBFIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXMCGBFIM_Pos (11UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXMCGBFIM (Bit 11) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXMCGBFIM_Msk (0x800UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXMCGBFIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXBCGBFIM_Pos (12UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXBCGBFIM (Bit 12) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXBCGBFIM_Msk (0x1000UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXBCGBFIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXUFLOWERFIM_Pos (13UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXUFLOWERFIM (Bit 13) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXUFLOWERFIM_Msk (0x2000UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXUFLOWERFIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXSCOLGFIM_Pos (14UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXSCOLGFIM (Bit 14) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXSCOLGFIM_Msk (0x4000UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXSCOLGFIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXMCOLGFIM_Pos (15UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXMCOLGFIM (Bit 15) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXMCOLGFIM_Msk (0x8000UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXMCOLGFIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXDEFFIM_Pos (16UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXDEFFIM (Bit 16) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXDEFFIM_Msk (0x10000UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXDEFFIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXLATCOLFIM_Pos (17UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXLATCOLFIM (Bit 17) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXLATCOLFIM_Msk (0x20000UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXLATCOLFIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXEXCOLFIM_Pos (18UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXEXCOLFIM (Bit 18) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXEXCOLFIM_Msk (0x40000UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXEXCOLFIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXCARERFIM_Pos (19UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXCARERFIM (Bit 19) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXCARERFIM_Msk (0x80000UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXCARERFIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXGOCTIM_Pos (20UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXGOCTIM (Bit 20) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXGOCTIM_Msk (0x100000UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXGOCTIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXGFRMIM_Pos (21UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXGFRMIM (Bit 21) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXGFRMIM_Msk (0x200000UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXGFRMIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXEXDEFFIM_Pos (22UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXEXDEFFIM (Bit 22) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXEXDEFFIM_Msk (0x400000UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXEXDEFFIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXPAUSFIM_Pos (23UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXPAUSFIM (Bit 23) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXPAUSFIM_Msk (0x800000UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXPAUSFIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXVLANGFIM_Pos (24UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXVLANGFIM (Bit 24) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXVLANGFIM_Msk (0x1000000UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXVLANGFIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXOSIZEGFIM_Pos (25UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXOSIZEGFIM (Bit 25) */ +#define ETH_MMC_TRANSMIT_INTERRUPT_MASK_TXOSIZEGFIM_Msk (0x2000000UL) /*!< ETH MMC_TRANSMIT_INTERRUPT_MASK: TXOSIZEGFIM (Bitfield-Mask: 0x01) */ + +/* ------------------------- ETH_TX_OCTET_COUNT_GOOD_BAD ------------------------ */ +#define ETH_TX_OCTET_COUNT_GOOD_BAD_TXOCTGB_Pos (0UL) /*!< ETH TX_OCTET_COUNT_GOOD_BAD: TXOCTGB (Bit 0) */ +#define ETH_TX_OCTET_COUNT_GOOD_BAD_TXOCTGB_Msk (0xffffffffUL) /*!< ETH TX_OCTET_COUNT_GOOD_BAD: TXOCTGB (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------- ETH_TX_FRAME_COUNT_GOOD_BAD ------------------------ */ +#define ETH_TX_FRAME_COUNT_GOOD_BAD_TXFRMGB_Pos (0UL) /*!< ETH TX_FRAME_COUNT_GOOD_BAD: TXFRMGB (Bit 0) */ +#define ETH_TX_FRAME_COUNT_GOOD_BAD_TXFRMGB_Msk (0xffffffffUL) /*!< ETH TX_FRAME_COUNT_GOOD_BAD: TXFRMGB (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------ ETH_TX_BROADCAST_FRAMES_GOOD ------------------------ */ +#define ETH_TX_BROADCAST_FRAMES_GOOD_TXBCASTG_Pos (0UL) /*!< ETH TX_BROADCAST_FRAMES_GOOD: TXBCASTG (Bit 0) */ +#define ETH_TX_BROADCAST_FRAMES_GOOD_TXBCASTG_Msk (0xffffffffUL) /*!< ETH TX_BROADCAST_FRAMES_GOOD: TXBCASTG (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------ ETH_TX_MULTICAST_FRAMES_GOOD ------------------------ */ +#define ETH_TX_MULTICAST_FRAMES_GOOD_TXMCASTG_Pos (0UL) /*!< ETH TX_MULTICAST_FRAMES_GOOD: TXMCASTG (Bit 0) */ +#define ETH_TX_MULTICAST_FRAMES_GOOD_TXMCASTG_Msk (0xffffffffUL) /*!< ETH TX_MULTICAST_FRAMES_GOOD: TXMCASTG (Bitfield-Mask: 0xffffffff) */ + +/* ----------------------- ETH_TX_64OCTETS_FRAMES_GOOD_BAD ---------------------- */ +#define ETH_TX_64OCTETS_FRAMES_GOOD_BAD_TX64OCTGB_Pos (0UL) /*!< ETH TX_64OCTETS_FRAMES_GOOD_BAD: TX64OCTGB (Bit 0) */ +#define ETH_TX_64OCTETS_FRAMES_GOOD_BAD_TX64OCTGB_Msk (0xffffffffUL) /*!< ETH TX_64OCTETS_FRAMES_GOOD_BAD: TX64OCTGB (Bitfield-Mask: 0xffffffff) */ + +/* -------------------- ETH_TX_65TO127OCTETS_FRAMES_GOOD_BAD -------------------- */ +#define ETH_TX_65TO127OCTETS_FRAMES_GOOD_BAD_TX65_127OCTGB_Pos (0UL) /*!< ETH TX_65TO127OCTETS_FRAMES_GOOD_BAD: TX65_127OCTGB (Bit 0) */ +#define ETH_TX_65TO127OCTETS_FRAMES_GOOD_BAD_TX65_127OCTGB_Msk (0xffffffffUL) /*!< ETH TX_65TO127OCTETS_FRAMES_GOOD_BAD: TX65_127OCTGB (Bitfield-Mask: 0xffffffff) */ + +/* -------------------- ETH_TX_128TO255OCTETS_FRAMES_GOOD_BAD ------------------- */ +#define ETH_TX_128TO255OCTETS_FRAMES_GOOD_BAD_TX128_255OCTGB_Pos (0UL) /*!< ETH TX_128TO255OCTETS_FRAMES_GOOD_BAD: TX128_255OCTGB (Bit 0) */ +#define ETH_TX_128TO255OCTETS_FRAMES_GOOD_BAD_TX128_255OCTGB_Msk (0xffffffffUL) /*!< ETH TX_128TO255OCTETS_FRAMES_GOOD_BAD: TX128_255OCTGB (Bitfield-Mask: 0xffffffff) */ + +/* -------------------- ETH_TX_256TO511OCTETS_FRAMES_GOOD_BAD ------------------- */ +#define ETH_TX_256TO511OCTETS_FRAMES_GOOD_BAD_TX256_511OCTGB_Pos (0UL) /*!< ETH TX_256TO511OCTETS_FRAMES_GOOD_BAD: TX256_511OCTGB (Bit 0) */ +#define ETH_TX_256TO511OCTETS_FRAMES_GOOD_BAD_TX256_511OCTGB_Msk (0xffffffffUL) /*!< ETH TX_256TO511OCTETS_FRAMES_GOOD_BAD: TX256_511OCTGB (Bitfield-Mask: 0xffffffff) */ + +/* ------------------- ETH_TX_512TO1023OCTETS_FRAMES_GOOD_BAD ------------------- */ +#define ETH_TX_512TO1023OCTETS_FRAMES_GOOD_BAD_TX512_1023OCTGB_Pos (0UL) /*!< ETH TX_512TO1023OCTETS_FRAMES_GOOD_BAD: TX512_1023OCTGB (Bit 0) */ +#define ETH_TX_512TO1023OCTETS_FRAMES_GOOD_BAD_TX512_1023OCTGB_Msk (0xffffffffUL) /*!< ETH TX_512TO1023OCTETS_FRAMES_GOOD_BAD: TX512_1023OCTGB (Bitfield-Mask: 0xffffffff) */ + +/* ------------------- ETH_TX_1024TOMAXOCTETS_FRAMES_GOOD_BAD ------------------- */ +#define ETH_TX_1024TOMAXOCTETS_FRAMES_GOOD_BAD_TX1024_MAXOCTGB_Pos (0UL) /*!< ETH TX_1024TOMAXOCTETS_FRAMES_GOOD_BAD: TX1024_MAXOCTGB (Bit 0) */ +#define ETH_TX_1024TOMAXOCTETS_FRAMES_GOOD_BAD_TX1024_MAXOCTGB_Msk (0xffffffffUL) /*!< ETH TX_1024TOMAXOCTETS_FRAMES_GOOD_BAD: TX1024_MAXOCTGB (Bitfield-Mask: 0xffffffff) */ + +/* ----------------------- ETH_TX_UNICAST_FRAMES_GOOD_BAD ----------------------- */ +#define ETH_TX_UNICAST_FRAMES_GOOD_BAD_TXUCASTGB_Pos (0UL) /*!< ETH TX_UNICAST_FRAMES_GOOD_BAD: TXUCASTGB (Bit 0) */ +#define ETH_TX_UNICAST_FRAMES_GOOD_BAD_TXUCASTGB_Msk (0xffffffffUL) /*!< ETH TX_UNICAST_FRAMES_GOOD_BAD: TXUCASTGB (Bitfield-Mask: 0xffffffff) */ + +/* ---------------------- ETH_TX_MULTICAST_FRAMES_GOOD_BAD ---------------------- */ +#define ETH_TX_MULTICAST_FRAMES_GOOD_BAD_TXMCASTGB_Pos (0UL) /*!< ETH TX_MULTICAST_FRAMES_GOOD_BAD: TXMCASTGB (Bit 0) */ +#define ETH_TX_MULTICAST_FRAMES_GOOD_BAD_TXMCASTGB_Msk (0xffffffffUL) /*!< ETH TX_MULTICAST_FRAMES_GOOD_BAD: TXMCASTGB (Bitfield-Mask: 0xffffffff) */ + +/* ---------------------- ETH_TX_BROADCAST_FRAMES_GOOD_BAD ---------------------- */ +#define ETH_TX_BROADCAST_FRAMES_GOOD_BAD_TXBCASTGB_Pos (0UL) /*!< ETH TX_BROADCAST_FRAMES_GOOD_BAD: TXBCASTGB (Bit 0) */ +#define ETH_TX_BROADCAST_FRAMES_GOOD_BAD_TXBCASTGB_Msk (0xffffffffUL) /*!< ETH TX_BROADCAST_FRAMES_GOOD_BAD: TXBCASTGB (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------ ETH_TX_UNDERFLOW_ERROR_FRAMES ----------------------- */ +#define ETH_TX_UNDERFLOW_ERROR_FRAMES_TXUNDRFLW_Pos (0UL) /*!< ETH TX_UNDERFLOW_ERROR_FRAMES: TXUNDRFLW (Bit 0) */ +#define ETH_TX_UNDERFLOW_ERROR_FRAMES_TXUNDRFLW_Msk (0xffffffffUL) /*!< ETH TX_UNDERFLOW_ERROR_FRAMES: TXUNDRFLW (Bitfield-Mask: 0xffffffff) */ + +/* --------------------- ETH_TX_SINGLE_COLLISION_GOOD_FRAMES -------------------- */ +#define ETH_TX_SINGLE_COLLISION_GOOD_FRAMES_TXSNGLCOLG_Pos (0UL) /*!< ETH TX_SINGLE_COLLISION_GOOD_FRAMES: TXSNGLCOLG (Bit 0) */ +#define ETH_TX_SINGLE_COLLISION_GOOD_FRAMES_TXSNGLCOLG_Msk (0xffffffffUL) /*!< ETH TX_SINGLE_COLLISION_GOOD_FRAMES: TXSNGLCOLG (Bitfield-Mask: 0xffffffff) */ + +/* -------------------- ETH_TX_MULTIPLE_COLLISION_GOOD_FRAMES ------------------- */ +#define ETH_TX_MULTIPLE_COLLISION_GOOD_FRAMES_TXMULTCOLG_Pos (0UL) /*!< ETH TX_MULTIPLE_COLLISION_GOOD_FRAMES: TXMULTCOLG (Bit 0) */ +#define ETH_TX_MULTIPLE_COLLISION_GOOD_FRAMES_TXMULTCOLG_Msk (0xffffffffUL) /*!< ETH TX_MULTIPLE_COLLISION_GOOD_FRAMES: TXMULTCOLG (Bitfield-Mask: 0xffffffff) */ + +/* --------------------------- ETH_TX_DEFERRED_FRAMES --------------------------- */ +#define ETH_TX_DEFERRED_FRAMES_TXDEFRD_Pos (0UL) /*!< ETH TX_DEFERRED_FRAMES: TXDEFRD (Bit 0) */ +#define ETH_TX_DEFERRED_FRAMES_TXDEFRD_Msk (0xffffffffUL) /*!< ETH TX_DEFERRED_FRAMES: TXDEFRD (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------ ETH_TX_LATE_COLLISION_FRAMES ------------------------ */ +#define ETH_TX_LATE_COLLISION_FRAMES_TXLATECOL_Pos (0UL) /*!< ETH TX_LATE_COLLISION_FRAMES: TXLATECOL (Bit 0) */ +#define ETH_TX_LATE_COLLISION_FRAMES_TXLATECOL_Msk (0xffffffffUL) /*!< ETH TX_LATE_COLLISION_FRAMES: TXLATECOL (Bitfield-Mask: 0xffffffff) */ + +/* ---------------------- ETH_TX_EXCESSIVE_COLLISION_FRAMES --------------------- */ +#define ETH_TX_EXCESSIVE_COLLISION_FRAMES_TXEXSCOL_Pos (0UL) /*!< ETH TX_EXCESSIVE_COLLISION_FRAMES: TXEXSCOL (Bit 0) */ +#define ETH_TX_EXCESSIVE_COLLISION_FRAMES_TXEXSCOL_Msk (0xffffffffUL) /*!< ETH TX_EXCESSIVE_COLLISION_FRAMES: TXEXSCOL (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------- ETH_TX_CARRIER_ERROR_FRAMES ------------------------ */ +#define ETH_TX_CARRIER_ERROR_FRAMES_TXCARR_Pos (0UL) /*!< ETH TX_CARRIER_ERROR_FRAMES: TXCARR (Bit 0) */ +#define ETH_TX_CARRIER_ERROR_FRAMES_TXCARR_Msk (0xffffffffUL) /*!< ETH TX_CARRIER_ERROR_FRAMES: TXCARR (Bitfield-Mask: 0xffffffff) */ + +/* --------------------------- ETH_TX_OCTET_COUNT_GOOD -------------------------- */ +#define ETH_TX_OCTET_COUNT_GOOD_TXOCTG_Pos (0UL) /*!< ETH TX_OCTET_COUNT_GOOD: TXOCTG (Bit 0) */ +#define ETH_TX_OCTET_COUNT_GOOD_TXOCTG_Msk (0xffffffffUL) /*!< ETH TX_OCTET_COUNT_GOOD: TXOCTG (Bitfield-Mask: 0xffffffff) */ + +/* --------------------------- ETH_TX_FRAME_COUNT_GOOD -------------------------- */ +#define ETH_TX_FRAME_COUNT_GOOD_TXFRMG_Pos (0UL) /*!< ETH TX_FRAME_COUNT_GOOD: TXFRMG (Bit 0) */ +#define ETH_TX_FRAME_COUNT_GOOD_TXFRMG_Msk (0xffffffffUL) /*!< ETH TX_FRAME_COUNT_GOOD: TXFRMG (Bitfield-Mask: 0xffffffff) */ + +/* ----------------------- ETH_TX_EXCESSIVE_DEFERRAL_ERROR ---------------------- */ +#define ETH_TX_EXCESSIVE_DEFERRAL_ERROR_TXEXSDEF_Pos (0UL) /*!< ETH TX_EXCESSIVE_DEFERRAL_ERROR: TXEXSDEF (Bit 0) */ +#define ETH_TX_EXCESSIVE_DEFERRAL_ERROR_TXEXSDEF_Msk (0xffffffffUL) /*!< ETH TX_EXCESSIVE_DEFERRAL_ERROR: TXEXSDEF (Bitfield-Mask: 0xffffffff) */ + +/* ----------------------------- ETH_TX_PAUSE_FRAMES ---------------------------- */ +#define ETH_TX_PAUSE_FRAMES_TXPAUSE_Pos (0UL) /*!< ETH TX_PAUSE_FRAMES: TXPAUSE (Bit 0) */ +#define ETH_TX_PAUSE_FRAMES_TXPAUSE_Msk (0xffffffffUL) /*!< ETH TX_PAUSE_FRAMES: TXPAUSE (Bitfield-Mask: 0xffffffff) */ + +/* --------------------------- ETH_TX_VLAN_FRAMES_GOOD -------------------------- */ +#define ETH_TX_VLAN_FRAMES_GOOD_TXVLANG_Pos (0UL) /*!< ETH TX_VLAN_FRAMES_GOOD: TXVLANG (Bit 0) */ +#define ETH_TX_VLAN_FRAMES_GOOD_TXVLANG_Msk (0xffffffffUL) /*!< ETH TX_VLAN_FRAMES_GOOD: TXVLANG (Bitfield-Mask: 0xffffffff) */ + +/* -------------------------- ETH_TX_OSIZE_FRAMES_GOOD -------------------------- */ +#define ETH_TX_OSIZE_FRAMES_GOOD_TXOSIZG_Pos (0UL) /*!< ETH TX_OSIZE_FRAMES_GOOD: TXOSIZG (Bit 0) */ +#define ETH_TX_OSIZE_FRAMES_GOOD_TXOSIZG_Msk (0xffffffffUL) /*!< ETH TX_OSIZE_FRAMES_GOOD: TXOSIZG (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------ ETH_RX_FRAMES_COUNT_GOOD_BAD ------------------------ */ +#define ETH_RX_FRAMES_COUNT_GOOD_BAD_RXFRMGB_Pos (0UL) /*!< ETH RX_FRAMES_COUNT_GOOD_BAD: RXFRMGB (Bit 0) */ +#define ETH_RX_FRAMES_COUNT_GOOD_BAD_RXFRMGB_Msk (0xffffffffUL) /*!< ETH RX_FRAMES_COUNT_GOOD_BAD: RXFRMGB (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------- ETH_RX_OCTET_COUNT_GOOD_BAD ------------------------ */ +#define ETH_RX_OCTET_COUNT_GOOD_BAD_RXOCTGB_Pos (0UL) /*!< ETH RX_OCTET_COUNT_GOOD_BAD: RXOCTGB (Bit 0) */ +#define ETH_RX_OCTET_COUNT_GOOD_BAD_RXOCTGB_Msk (0xffffffffUL) /*!< ETH RX_OCTET_COUNT_GOOD_BAD: RXOCTGB (Bitfield-Mask: 0xffffffff) */ + +/* --------------------------- ETH_RX_OCTET_COUNT_GOOD -------------------------- */ +#define ETH_RX_OCTET_COUNT_GOOD_RXOCTG_Pos (0UL) /*!< ETH RX_OCTET_COUNT_GOOD: RXOCTG (Bit 0) */ +#define ETH_RX_OCTET_COUNT_GOOD_RXOCTG_Msk (0xffffffffUL) /*!< ETH RX_OCTET_COUNT_GOOD: RXOCTG (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------ ETH_RX_BROADCAST_FRAMES_GOOD ------------------------ */ +#define ETH_RX_BROADCAST_FRAMES_GOOD_RXBCASTG_Pos (0UL) /*!< ETH RX_BROADCAST_FRAMES_GOOD: RXBCASTG (Bit 0) */ +#define ETH_RX_BROADCAST_FRAMES_GOOD_RXBCASTG_Msk (0xffffffffUL) /*!< ETH RX_BROADCAST_FRAMES_GOOD: RXBCASTG (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------ ETH_RX_MULTICAST_FRAMES_GOOD ------------------------ */ +#define ETH_RX_MULTICAST_FRAMES_GOOD_RXMCASTG_Pos (0UL) /*!< ETH RX_MULTICAST_FRAMES_GOOD: RXMCASTG (Bit 0) */ +#define ETH_RX_MULTICAST_FRAMES_GOOD_RXMCASTG_Msk (0xffffffffUL) /*!< ETH RX_MULTICAST_FRAMES_GOOD: RXMCASTG (Bitfield-Mask: 0xffffffff) */ + +/* --------------------------- ETH_RX_CRC_ERROR_FRAMES -------------------------- */ +#define ETH_RX_CRC_ERROR_FRAMES_RXCRCERR_Pos (0UL) /*!< ETH RX_CRC_ERROR_FRAMES: RXCRCERR (Bit 0) */ +#define ETH_RX_CRC_ERROR_FRAMES_RXCRCERR_Msk (0xffffffffUL) /*!< ETH RX_CRC_ERROR_FRAMES: RXCRCERR (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------ ETH_RX_ALIGNMENT_ERROR_FRAMES ----------------------- */ +#define ETH_RX_ALIGNMENT_ERROR_FRAMES_RXALGNERR_Pos (0UL) /*!< ETH RX_ALIGNMENT_ERROR_FRAMES: RXALGNERR (Bit 0) */ +#define ETH_RX_ALIGNMENT_ERROR_FRAMES_RXALGNERR_Msk (0xffffffffUL) /*!< ETH RX_ALIGNMENT_ERROR_FRAMES: RXALGNERR (Bitfield-Mask: 0xffffffff) */ + +/* -------------------------- ETH_RX_RUNT_ERROR_FRAMES -------------------------- */ +#define ETH_RX_RUNT_ERROR_FRAMES_RXRUNTERR_Pos (0UL) /*!< ETH RX_RUNT_ERROR_FRAMES: RXRUNTERR (Bit 0) */ +#define ETH_RX_RUNT_ERROR_FRAMES_RXRUNTERR_Msk (0xffffffffUL) /*!< ETH RX_RUNT_ERROR_FRAMES: RXRUNTERR (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------- ETH_RX_JABBER_ERROR_FRAMES ------------------------- */ +#define ETH_RX_JABBER_ERROR_FRAMES_RXJABERR_Pos (0UL) /*!< ETH RX_JABBER_ERROR_FRAMES: RXJABERR (Bit 0) */ +#define ETH_RX_JABBER_ERROR_FRAMES_RXJABERR_Msk (0xffffffffUL) /*!< ETH RX_JABBER_ERROR_FRAMES: RXJABERR (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------ ETH_RX_UNDERSIZE_FRAMES_GOOD ------------------------ */ +#define ETH_RX_UNDERSIZE_FRAMES_GOOD_RXUNDERSZG_Pos (0UL) /*!< ETH RX_UNDERSIZE_FRAMES_GOOD: RXUNDERSZG (Bit 0) */ +#define ETH_RX_UNDERSIZE_FRAMES_GOOD_RXUNDERSZG_Msk (0xffffffffUL) /*!< ETH RX_UNDERSIZE_FRAMES_GOOD: RXUNDERSZG (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------- ETH_RX_OVERSIZE_FRAMES_GOOD ------------------------ */ +#define ETH_RX_OVERSIZE_FRAMES_GOOD_RXOVERSZG_Pos (0UL) /*!< ETH RX_OVERSIZE_FRAMES_GOOD: RXOVERSZG (Bit 0) */ +#define ETH_RX_OVERSIZE_FRAMES_GOOD_RXOVERSZG_Msk (0xffffffffUL) /*!< ETH RX_OVERSIZE_FRAMES_GOOD: RXOVERSZG (Bitfield-Mask: 0xffffffff) */ + +/* ----------------------- ETH_RX_64OCTETS_FRAMES_GOOD_BAD ---------------------- */ +#define ETH_RX_64OCTETS_FRAMES_GOOD_BAD_RX64OCTGB_Pos (0UL) /*!< ETH RX_64OCTETS_FRAMES_GOOD_BAD: RX64OCTGB (Bit 0) */ +#define ETH_RX_64OCTETS_FRAMES_GOOD_BAD_RX64OCTGB_Msk (0xffffffffUL) /*!< ETH RX_64OCTETS_FRAMES_GOOD_BAD: RX64OCTGB (Bitfield-Mask: 0xffffffff) */ + +/* -------------------- ETH_RX_65TO127OCTETS_FRAMES_GOOD_BAD -------------------- */ +#define ETH_RX_65TO127OCTETS_FRAMES_GOOD_BAD_RX65_127OCTGB_Pos (0UL) /*!< ETH RX_65TO127OCTETS_FRAMES_GOOD_BAD: RX65_127OCTGB (Bit 0) */ +#define ETH_RX_65TO127OCTETS_FRAMES_GOOD_BAD_RX65_127OCTGB_Msk (0xffffffffUL) /*!< ETH RX_65TO127OCTETS_FRAMES_GOOD_BAD: RX65_127OCTGB (Bitfield-Mask: 0xffffffff) */ + +/* -------------------- ETH_RX_128TO255OCTETS_FRAMES_GOOD_BAD ------------------- */ +#define ETH_RX_128TO255OCTETS_FRAMES_GOOD_BAD_RX128_255OCTGB_Pos (0UL) /*!< ETH RX_128TO255OCTETS_FRAMES_GOOD_BAD: RX128_255OCTGB (Bit 0) */ +#define ETH_RX_128TO255OCTETS_FRAMES_GOOD_BAD_RX128_255OCTGB_Msk (0xffffffffUL) /*!< ETH RX_128TO255OCTETS_FRAMES_GOOD_BAD: RX128_255OCTGB (Bitfield-Mask: 0xffffffff) */ + +/* -------------------- ETH_RX_256TO511OCTETS_FRAMES_GOOD_BAD ------------------- */ +#define ETH_RX_256TO511OCTETS_FRAMES_GOOD_BAD_RX256_511OCTGB_Pos (0UL) /*!< ETH RX_256TO511OCTETS_FRAMES_GOOD_BAD: RX256_511OCTGB (Bit 0) */ +#define ETH_RX_256TO511OCTETS_FRAMES_GOOD_BAD_RX256_511OCTGB_Msk (0xffffffffUL) /*!< ETH RX_256TO511OCTETS_FRAMES_GOOD_BAD: RX256_511OCTGB (Bitfield-Mask: 0xffffffff) */ + +/* ------------------- ETH_RX_512TO1023OCTETS_FRAMES_GOOD_BAD ------------------- */ +#define ETH_RX_512TO1023OCTETS_FRAMES_GOOD_BAD_RX512_1023OCTGB_Pos (0UL) /*!< ETH RX_512TO1023OCTETS_FRAMES_GOOD_BAD: RX512_1023OCTGB (Bit 0) */ +#define ETH_RX_512TO1023OCTETS_FRAMES_GOOD_BAD_RX512_1023OCTGB_Msk (0xffffffffUL) /*!< ETH RX_512TO1023OCTETS_FRAMES_GOOD_BAD: RX512_1023OCTGB (Bitfield-Mask: 0xffffffff) */ + +/* ------------------- ETH_RX_1024TOMAXOCTETS_FRAMES_GOOD_BAD ------------------- */ +#define ETH_RX_1024TOMAXOCTETS_FRAMES_GOOD_BAD_RX1024_MAXOCTGB_Pos (0UL) /*!< ETH RX_1024TOMAXOCTETS_FRAMES_GOOD_BAD: RX1024_MAXOCTGB (Bit 0) */ +#define ETH_RX_1024TOMAXOCTETS_FRAMES_GOOD_BAD_RX1024_MAXOCTGB_Msk (0xffffffffUL) /*!< ETH RX_1024TOMAXOCTETS_FRAMES_GOOD_BAD: RX1024_MAXOCTGB (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------- ETH_RX_UNICAST_FRAMES_GOOD ------------------------- */ +#define ETH_RX_UNICAST_FRAMES_GOOD_RXUCASTG_Pos (0UL) /*!< ETH RX_UNICAST_FRAMES_GOOD: RXUCASTG (Bit 0) */ +#define ETH_RX_UNICAST_FRAMES_GOOD_RXUCASTG_Msk (0xffffffffUL) /*!< ETH RX_UNICAST_FRAMES_GOOD: RXUCASTG (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------- ETH_RX_LENGTH_ERROR_FRAMES ------------------------- */ +#define ETH_RX_LENGTH_ERROR_FRAMES_RXLENERR_Pos (0UL) /*!< ETH RX_LENGTH_ERROR_FRAMES: RXLENERR (Bit 0) */ +#define ETH_RX_LENGTH_ERROR_FRAMES_RXLENERR_Msk (0xffffffffUL) /*!< ETH RX_LENGTH_ERROR_FRAMES: RXLENERR (Bitfield-Mask: 0xffffffff) */ + +/* ----------------------- ETH_RX_OUT_OF_RANGE_TYPE_FRAMES ---------------------- */ +#define ETH_RX_OUT_OF_RANGE_TYPE_FRAMES_RXOUTOFRNG_Pos (0UL) /*!< ETH RX_OUT_OF_RANGE_TYPE_FRAMES: RXOUTOFRNG (Bit 0) */ +#define ETH_RX_OUT_OF_RANGE_TYPE_FRAMES_RXOUTOFRNG_Msk (0xffffffffUL) /*!< ETH RX_OUT_OF_RANGE_TYPE_FRAMES: RXOUTOFRNG (Bitfield-Mask: 0xffffffff) */ + +/* ----------------------------- ETH_RX_PAUSE_FRAMES ---------------------------- */ +#define ETH_RX_PAUSE_FRAMES_RXPAUSEFRM_Pos (0UL) /*!< ETH RX_PAUSE_FRAMES: RXPAUSEFRM (Bit 0) */ +#define ETH_RX_PAUSE_FRAMES_RXPAUSEFRM_Msk (0xffffffffUL) /*!< ETH RX_PAUSE_FRAMES: RXPAUSEFRM (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------- ETH_RX_FIFO_OVERFLOW_FRAMES ------------------------ */ +#define ETH_RX_FIFO_OVERFLOW_FRAMES_RXFIFOOVFL_Pos (0UL) /*!< ETH RX_FIFO_OVERFLOW_FRAMES: RXFIFOOVFL (Bit 0) */ +#define ETH_RX_FIFO_OVERFLOW_FRAMES_RXFIFOOVFL_Msk (0xffffffffUL) /*!< ETH RX_FIFO_OVERFLOW_FRAMES: RXFIFOOVFL (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------- ETH_RX_VLAN_FRAMES_GOOD_BAD ------------------------ */ +#define ETH_RX_VLAN_FRAMES_GOOD_BAD_RXVLANFRGB_Pos (0UL) /*!< ETH RX_VLAN_FRAMES_GOOD_BAD: RXVLANFRGB (Bit 0) */ +#define ETH_RX_VLAN_FRAMES_GOOD_BAD_RXVLANFRGB_Msk (0xffffffffUL) /*!< ETH RX_VLAN_FRAMES_GOOD_BAD: RXVLANFRGB (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------ ETH_RX_WATCHDOG_ERROR_FRAMES ------------------------ */ +#define ETH_RX_WATCHDOG_ERROR_FRAMES_RXWDGERR_Pos (0UL) /*!< ETH RX_WATCHDOG_ERROR_FRAMES: RXWDGERR (Bit 0) */ +#define ETH_RX_WATCHDOG_ERROR_FRAMES_RXWDGERR_Msk (0xffffffffUL) /*!< ETH RX_WATCHDOG_ERROR_FRAMES: RXWDGERR (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------- ETH_RX_RECEIVE_ERROR_FRAMES ------------------------ */ +#define ETH_RX_RECEIVE_ERROR_FRAMES_RXRCVERR_Pos (0UL) /*!< ETH RX_RECEIVE_ERROR_FRAMES: RXRCVERR (Bit 0) */ +#define ETH_RX_RECEIVE_ERROR_FRAMES_RXRCVERR_Msk (0xffffffffUL) /*!< ETH RX_RECEIVE_ERROR_FRAMES: RXRCVERR (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------- ETH_RX_CONTROL_FRAMES_GOOD ------------------------- */ +#define ETH_RX_CONTROL_FRAMES_GOOD_RXCTRLG_Pos (0UL) /*!< ETH RX_CONTROL_FRAMES_GOOD: RXCTRLG (Bit 0) */ +#define ETH_RX_CONTROL_FRAMES_GOOD_RXCTRLG_Msk (0xffffffffUL) /*!< ETH RX_CONTROL_FRAMES_GOOD: RXCTRLG (Bitfield-Mask: 0xffffffff) */ + +/* --------------------- ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK --------------------- */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXIPV4GFIM_Pos (0UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXIPV4GFIM (Bit 0) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXIPV4GFIM_Msk (0x1UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXIPV4GFIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXIPV4HERFIM_Pos (1UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXIPV4HERFIM (Bit 1) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXIPV4HERFIM_Msk (0x2UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXIPV4HERFIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXIPV4NOPAYFIM_Pos (2UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXIPV4NOPAYFIM (Bit 2) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXIPV4NOPAYFIM_Msk (0x4UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXIPV4NOPAYFIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXIPV4FRAGFIM_Pos (3UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXIPV4FRAGFIM (Bit 3) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXIPV4FRAGFIM_Msk (0x8UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXIPV4FRAGFIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXIPV4UDSBLFIM_Pos (4UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXIPV4UDSBLFIM (Bit 4) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXIPV4UDSBLFIM_Msk (0x10UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXIPV4UDSBLFIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXIPV6GFIM_Pos (5UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXIPV6GFIM (Bit 5) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXIPV6GFIM_Msk (0x20UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXIPV6GFIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXIPV6HERFIM_Pos (6UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXIPV6HERFIM (Bit 6) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXIPV6HERFIM_Msk (0x40UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXIPV6HERFIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXIPV6NOPAYFIM_Pos (7UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXIPV6NOPAYFIM (Bit 7) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXIPV6NOPAYFIM_Msk (0x80UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXIPV6NOPAYFIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXUDPGFIM_Pos (8UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXUDPGFIM (Bit 8) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXUDPGFIM_Msk (0x100UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXUDPGFIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXUDPERFIM_Pos (9UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXUDPERFIM (Bit 9) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXUDPERFIM_Msk (0x200UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXUDPERFIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXTCPGFIM_Pos (10UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXTCPGFIM (Bit 10) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXTCPGFIM_Msk (0x400UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXTCPGFIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXTCPERFIM_Pos (11UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXTCPERFIM (Bit 11) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXTCPERFIM_Msk (0x800UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXTCPERFIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXICMPGFIM_Pos (12UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXICMPGFIM (Bit 12) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXICMPGFIM_Msk (0x1000UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXICMPGFIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXICMPERFIM_Pos (13UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXICMPERFIM (Bit 13) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXICMPERFIM_Msk (0x2000UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXICMPERFIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXIPV4GOIM_Pos (16UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXIPV4GOIM (Bit 16) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXIPV4GOIM_Msk (0x10000UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXIPV4GOIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXIPV4HEROIM_Pos (17UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXIPV4HEROIM (Bit 17) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXIPV4HEROIM_Msk (0x20000UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXIPV4HEROIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXIPV4NOPAYOIM_Pos (18UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXIPV4NOPAYOIM (Bit 18) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXIPV4NOPAYOIM_Msk (0x40000UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXIPV4NOPAYOIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXIPV4FRAGOIM_Pos (19UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXIPV4FRAGOIM (Bit 19) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXIPV4FRAGOIM_Msk (0x80000UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXIPV4FRAGOIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXIPV4UDSBLOIM_Pos (20UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXIPV4UDSBLOIM (Bit 20) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXIPV4UDSBLOIM_Msk (0x100000UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXIPV4UDSBLOIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXIPV6GOIM_Pos (21UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXIPV6GOIM (Bit 21) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXIPV6GOIM_Msk (0x200000UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXIPV6GOIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXIPV6HEROIM_Pos (22UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXIPV6HEROIM (Bit 22) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXIPV6HEROIM_Msk (0x400000UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXIPV6HEROIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXIPV6NOPAYOIM_Pos (23UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXIPV6NOPAYOIM (Bit 23) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXIPV6NOPAYOIM_Msk (0x800000UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXIPV6NOPAYOIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXUDPGOIM_Pos (24UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXUDPGOIM (Bit 24) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXUDPGOIM_Msk (0x1000000UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXUDPGOIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXUDPEROIM_Pos (25UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXUDPEROIM (Bit 25) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXUDPEROIM_Msk (0x2000000UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXUDPEROIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXTCPGOIM_Pos (26UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXTCPGOIM (Bit 26) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXTCPGOIM_Msk (0x4000000UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXTCPGOIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXTCPEROIM_Pos (27UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXTCPEROIM (Bit 27) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXTCPEROIM_Msk (0x8000000UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXTCPEROIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXICMPGOIM_Pos (28UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXICMPGOIM (Bit 28) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXICMPGOIM_Msk (0x10000000UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXICMPGOIM (Bitfield-Mask: 0x01) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXICMPEROIM_Pos (29UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXICMPEROIM (Bit 29) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_MASK_RXICMPEROIM_Msk (0x20000000UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT_MASK: RXICMPEROIM (Bitfield-Mask: 0x01) */ + +/* ------------------------ ETH_MMC_IPC_RECEIVE_INTERRUPT ----------------------- */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXIPV4GFIS_Pos (0UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXIPV4GFIS (Bit 0) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXIPV4GFIS_Msk (0x1UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXIPV4GFIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXIPV4HERFIS_Pos (1UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXIPV4HERFIS (Bit 1) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXIPV4HERFIS_Msk (0x2UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXIPV4HERFIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXIPV4NOPAYFIS_Pos (2UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXIPV4NOPAYFIS (Bit 2) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXIPV4NOPAYFIS_Msk (0x4UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXIPV4NOPAYFIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXIPV4FRAGFIS_Pos (3UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXIPV4FRAGFIS (Bit 3) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXIPV4FRAGFIS_Msk (0x8UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXIPV4FRAGFIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXIPV4UDSBLFIS_Pos (4UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXIPV4UDSBLFIS (Bit 4) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXIPV4UDSBLFIS_Msk (0x10UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXIPV4UDSBLFIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXIPV6GFIS_Pos (5UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXIPV6GFIS (Bit 5) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXIPV6GFIS_Msk (0x20UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXIPV6GFIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXIPV6HERFIS_Pos (6UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXIPV6HERFIS (Bit 6) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXIPV6HERFIS_Msk (0x40UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXIPV6HERFIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXIPV6NOPAYFIS_Pos (7UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXIPV6NOPAYFIS (Bit 7) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXIPV6NOPAYFIS_Msk (0x80UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXIPV6NOPAYFIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXUDPGFIS_Pos (8UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXUDPGFIS (Bit 8) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXUDPGFIS_Msk (0x100UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXUDPGFIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXUDPERFIS_Pos (9UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXUDPERFIS (Bit 9) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXUDPERFIS_Msk (0x200UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXUDPERFIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXTCPGFIS_Pos (10UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXTCPGFIS (Bit 10) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXTCPGFIS_Msk (0x400UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXTCPGFIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXTCPERFIS_Pos (11UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXTCPERFIS (Bit 11) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXTCPERFIS_Msk (0x800UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXTCPERFIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXICMPGFIS_Pos (12UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXICMPGFIS (Bit 12) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXICMPGFIS_Msk (0x1000UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXICMPGFIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXICMPERFIS_Pos (13UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXICMPERFIS (Bit 13) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXICMPERFIS_Msk (0x2000UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXICMPERFIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXIPV4GOIS_Pos (16UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXIPV4GOIS (Bit 16) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXIPV4GOIS_Msk (0x10000UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXIPV4GOIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXIPV4HEROIS_Pos (17UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXIPV4HEROIS (Bit 17) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXIPV4HEROIS_Msk (0x20000UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXIPV4HEROIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXIPV4NOPAYOIS_Pos (18UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXIPV4NOPAYOIS (Bit 18) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXIPV4NOPAYOIS_Msk (0x40000UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXIPV4NOPAYOIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXIPV4FRAGOIS_Pos (19UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXIPV4FRAGOIS (Bit 19) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXIPV4FRAGOIS_Msk (0x80000UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXIPV4FRAGOIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXIPV4UDSBLOIS_Pos (20UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXIPV4UDSBLOIS (Bit 20) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXIPV4UDSBLOIS_Msk (0x100000UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXIPV4UDSBLOIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXIPV6GOIS_Pos (21UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXIPV6GOIS (Bit 21) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXIPV6GOIS_Msk (0x200000UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXIPV6GOIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXIPV6HEROIS_Pos (22UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXIPV6HEROIS (Bit 22) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXIPV6HEROIS_Msk (0x400000UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXIPV6HEROIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXIPV6NOPAYOIS_Pos (23UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXIPV6NOPAYOIS (Bit 23) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXIPV6NOPAYOIS_Msk (0x800000UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXIPV6NOPAYOIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXUDPGOIS_Pos (24UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXUDPGOIS (Bit 24) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXUDPGOIS_Msk (0x1000000UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXUDPGOIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXUDPEROIS_Pos (25UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXUDPEROIS (Bit 25) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXUDPEROIS_Msk (0x2000000UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXUDPEROIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXTCPGOIS_Pos (26UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXTCPGOIS (Bit 26) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXTCPGOIS_Msk (0x4000000UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXTCPGOIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXTCPEROIS_Pos (27UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXTCPEROIS (Bit 27) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXTCPEROIS_Msk (0x8000000UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXTCPEROIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXICMPGOIS_Pos (28UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXICMPGOIS (Bit 28) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXICMPGOIS_Msk (0x10000000UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXICMPGOIS (Bitfield-Mask: 0x01) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXICMPEROIS_Pos (29UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXICMPEROIS (Bit 29) */ +#define ETH_MMC_IPC_RECEIVE_INTERRUPT_RXICMPEROIS_Msk (0x20000000UL) /*!< ETH MMC_IPC_RECEIVE_INTERRUPT: RXICMPEROIS (Bitfield-Mask: 0x01) */ + +/* --------------------------- ETH_RXIPV4_GOOD_FRAMES --------------------------- */ +#define ETH_RXIPV4_GOOD_FRAMES_RXIPV4GDFRM_Pos (0UL) /*!< ETH RXIPV4_GOOD_FRAMES: RXIPV4GDFRM (Bit 0) */ +#define ETH_RXIPV4_GOOD_FRAMES_RXIPV4GDFRM_Msk (0xffffffffUL) /*!< ETH RXIPV4_GOOD_FRAMES: RXIPV4GDFRM (Bitfield-Mask: 0xffffffff) */ + +/* ----------------------- ETH_RXIPV4_HEADER_ERROR_FRAMES ----------------------- */ +#define ETH_RXIPV4_HEADER_ERROR_FRAMES_RXIPV4HDRERRFRM_Pos (0UL) /*!< ETH RXIPV4_HEADER_ERROR_FRAMES: RXIPV4HDRERRFRM (Bit 0) */ +#define ETH_RXIPV4_HEADER_ERROR_FRAMES_RXIPV4HDRERRFRM_Msk (0xffffffffUL) /*!< ETH RXIPV4_HEADER_ERROR_FRAMES: RXIPV4HDRERRFRM (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------ ETH_RXIPV4_NO_PAYLOAD_FRAMES ------------------------ */ +#define ETH_RXIPV4_NO_PAYLOAD_FRAMES_RXIPV4NOPAYFRM_Pos (0UL) /*!< ETH RXIPV4_NO_PAYLOAD_FRAMES: RXIPV4NOPAYFRM (Bit 0) */ +#define ETH_RXIPV4_NO_PAYLOAD_FRAMES_RXIPV4NOPAYFRM_Msk (0xffffffffUL) /*!< ETH RXIPV4_NO_PAYLOAD_FRAMES: RXIPV4NOPAYFRM (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------ ETH_RXIPV4_FRAGMENTED_FRAMES ------------------------ */ +#define ETH_RXIPV4_FRAGMENTED_FRAMES_RXIPV4FRAGFRM_Pos (0UL) /*!< ETH RXIPV4_FRAGMENTED_FRAMES: RXIPV4FRAGFRM (Bit 0) */ +#define ETH_RXIPV4_FRAGMENTED_FRAMES_RXIPV4FRAGFRM_Msk (0xffffffffUL) /*!< ETH RXIPV4_FRAGMENTED_FRAMES: RXIPV4FRAGFRM (Bitfield-Mask: 0xffffffff) */ + +/* ------------------- ETH_RXIPV4_UDP_CHECKSUM_DISABLED_FRAMES ------------------ */ +#define ETH_RXIPV4_UDP_CHECKSUM_DISABLED_FRAMES_RXIPV4UDSBLFRM_Pos (0UL) /*!< ETH RXIPV4_UDP_CHECKSUM_DISABLED_FRAMES: RXIPV4UDSBLFRM (Bit 0) */ +#define ETH_RXIPV4_UDP_CHECKSUM_DISABLED_FRAMES_RXIPV4UDSBLFRM_Msk (0xffffffffUL) /*!< ETH RXIPV4_UDP_CHECKSUM_DISABLED_FRAMES: RXIPV4UDSBLFRM (Bitfield-Mask: 0xffffffff) */ + +/* --------------------------- ETH_RXIPV6_GOOD_FRAMES --------------------------- */ +#define ETH_RXIPV6_GOOD_FRAMES_RXIPV6GDFRM_Pos (0UL) /*!< ETH RXIPV6_GOOD_FRAMES: RXIPV6GDFRM (Bit 0) */ +#define ETH_RXIPV6_GOOD_FRAMES_RXIPV6GDFRM_Msk (0xffffffffUL) /*!< ETH RXIPV6_GOOD_FRAMES: RXIPV6GDFRM (Bitfield-Mask: 0xffffffff) */ + +/* ----------------------- ETH_RXIPV6_HEADER_ERROR_FRAMES ----------------------- */ +#define ETH_RXIPV6_HEADER_ERROR_FRAMES_RXIPV6HDRERRFRM_Pos (0UL) /*!< ETH RXIPV6_HEADER_ERROR_FRAMES: RXIPV6HDRERRFRM (Bit 0) */ +#define ETH_RXIPV6_HEADER_ERROR_FRAMES_RXIPV6HDRERRFRM_Msk (0xffffffffUL) /*!< ETH RXIPV6_HEADER_ERROR_FRAMES: RXIPV6HDRERRFRM (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------ ETH_RXIPV6_NO_PAYLOAD_FRAMES ------------------------ */ +#define ETH_RXIPV6_NO_PAYLOAD_FRAMES_RXIPV6NOPAYFRM_Pos (0UL) /*!< ETH RXIPV6_NO_PAYLOAD_FRAMES: RXIPV6NOPAYFRM (Bit 0) */ +#define ETH_RXIPV6_NO_PAYLOAD_FRAMES_RXIPV6NOPAYFRM_Msk (0xffffffffUL) /*!< ETH RXIPV6_NO_PAYLOAD_FRAMES: RXIPV6NOPAYFRM (Bitfield-Mask: 0xffffffff) */ + +/* ---------------------------- ETH_RXUDP_GOOD_FRAMES --------------------------- */ +#define ETH_RXUDP_GOOD_FRAMES_RXUDPGDFRM_Pos (0UL) /*!< ETH RXUDP_GOOD_FRAMES: RXUDPGDFRM (Bit 0) */ +#define ETH_RXUDP_GOOD_FRAMES_RXUDPGDFRM_Msk (0xffffffffUL) /*!< ETH RXUDP_GOOD_FRAMES: RXUDPGDFRM (Bitfield-Mask: 0xffffffff) */ + +/* --------------------------- ETH_RXUDP_ERROR_FRAMES --------------------------- */ +#define ETH_RXUDP_ERROR_FRAMES_RXUDPERRFRM_Pos (0UL) /*!< ETH RXUDP_ERROR_FRAMES: RXUDPERRFRM (Bit 0) */ +#define ETH_RXUDP_ERROR_FRAMES_RXUDPERRFRM_Msk (0xffffffffUL) /*!< ETH RXUDP_ERROR_FRAMES: RXUDPERRFRM (Bitfield-Mask: 0xffffffff) */ + +/* ---------------------------- ETH_RXTCP_GOOD_FRAMES --------------------------- */ +#define ETH_RXTCP_GOOD_FRAMES_RXTCPGDFRM_Pos (0UL) /*!< ETH RXTCP_GOOD_FRAMES: RXTCPGDFRM (Bit 0) */ +#define ETH_RXTCP_GOOD_FRAMES_RXTCPGDFRM_Msk (0xffffffffUL) /*!< ETH RXTCP_GOOD_FRAMES: RXTCPGDFRM (Bitfield-Mask: 0xffffffff) */ + +/* --------------------------- ETH_RXTCP_ERROR_FRAMES --------------------------- */ +#define ETH_RXTCP_ERROR_FRAMES_RXTCPERRFRM_Pos (0UL) /*!< ETH RXTCP_ERROR_FRAMES: RXTCPERRFRM (Bit 0) */ +#define ETH_RXTCP_ERROR_FRAMES_RXTCPERRFRM_Msk (0xffffffffUL) /*!< ETH RXTCP_ERROR_FRAMES: RXTCPERRFRM (Bitfield-Mask: 0xffffffff) */ + +/* --------------------------- ETH_RXICMP_GOOD_FRAMES --------------------------- */ +#define ETH_RXICMP_GOOD_FRAMES_RXICMPGDFRM_Pos (0UL) /*!< ETH RXICMP_GOOD_FRAMES: RXICMPGDFRM (Bit 0) */ +#define ETH_RXICMP_GOOD_FRAMES_RXICMPGDFRM_Msk (0xffffffffUL) /*!< ETH RXICMP_GOOD_FRAMES: RXICMPGDFRM (Bitfield-Mask: 0xffffffff) */ + +/* --------------------------- ETH_RXICMP_ERROR_FRAMES -------------------------- */ +#define ETH_RXICMP_ERROR_FRAMES_RXICMPERRFRM_Pos (0UL) /*!< ETH RXICMP_ERROR_FRAMES: RXICMPERRFRM (Bit 0) */ +#define ETH_RXICMP_ERROR_FRAMES_RXICMPERRFRM_Msk (0xffffffffUL) /*!< ETH RXICMP_ERROR_FRAMES: RXICMPERRFRM (Bitfield-Mask: 0xffffffff) */ + +/* --------------------------- ETH_RXIPV4_GOOD_OCTETS --------------------------- */ +#define ETH_RXIPV4_GOOD_OCTETS_RXIPV4GDOCT_Pos (0UL) /*!< ETH RXIPV4_GOOD_OCTETS: RXIPV4GDOCT (Bit 0) */ +#define ETH_RXIPV4_GOOD_OCTETS_RXIPV4GDOCT_Msk (0xffffffffUL) /*!< ETH RXIPV4_GOOD_OCTETS: RXIPV4GDOCT (Bitfield-Mask: 0xffffffff) */ + +/* ----------------------- ETH_RXIPV4_HEADER_ERROR_OCTETS ----------------------- */ +#define ETH_RXIPV4_HEADER_ERROR_OCTETS_RXIPV4HDRERROCT_Pos (0UL) /*!< ETH RXIPV4_HEADER_ERROR_OCTETS: RXIPV4HDRERROCT (Bit 0) */ +#define ETH_RXIPV4_HEADER_ERROR_OCTETS_RXIPV4HDRERROCT_Msk (0xffffffffUL) /*!< ETH RXIPV4_HEADER_ERROR_OCTETS: RXIPV4HDRERROCT (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------ ETH_RXIPV4_NO_PAYLOAD_OCTETS ------------------------ */ +#define ETH_RXIPV4_NO_PAYLOAD_OCTETS_RXIPV4NOPAYOCT_Pos (0UL) /*!< ETH RXIPV4_NO_PAYLOAD_OCTETS: RXIPV4NOPAYOCT (Bit 0) */ +#define ETH_RXIPV4_NO_PAYLOAD_OCTETS_RXIPV4NOPAYOCT_Msk (0xffffffffUL) /*!< ETH RXIPV4_NO_PAYLOAD_OCTETS: RXIPV4NOPAYOCT (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------ ETH_RXIPV4_FRAGMENTED_OCTETS ------------------------ */ +#define ETH_RXIPV4_FRAGMENTED_OCTETS_RXIPV4FRAGOCT_Pos (0UL) /*!< ETH RXIPV4_FRAGMENTED_OCTETS: RXIPV4FRAGOCT (Bit 0) */ +#define ETH_RXIPV4_FRAGMENTED_OCTETS_RXIPV4FRAGOCT_Msk (0xffffffffUL) /*!< ETH RXIPV4_FRAGMENTED_OCTETS: RXIPV4FRAGOCT (Bitfield-Mask: 0xffffffff) */ + +/* ------------------- ETH_RXIPV4_UDP_CHECKSUM_DISABLE_OCTETS ------------------- */ +#define ETH_RXIPV4_UDP_CHECKSUM_DISABLE_OCTETS_RXIPV4UDSBLOCT_Pos (0UL) /*!< ETH RXIPV4_UDP_CHECKSUM_DISABLE_OCTETS: RXIPV4UDSBLOCT (Bit 0) */ +#define ETH_RXIPV4_UDP_CHECKSUM_DISABLE_OCTETS_RXIPV4UDSBLOCT_Msk (0xffffffffUL) /*!< ETH RXIPV4_UDP_CHECKSUM_DISABLE_OCTETS: RXIPV4UDSBLOCT (Bitfield-Mask: 0xffffffff) */ + +/* --------------------------- ETH_RXIPV6_GOOD_OCTETS --------------------------- */ +#define ETH_RXIPV6_GOOD_OCTETS_RXIPV6GDOCT_Pos (0UL) /*!< ETH RXIPV6_GOOD_OCTETS: RXIPV6GDOCT (Bit 0) */ +#define ETH_RXIPV6_GOOD_OCTETS_RXIPV6GDOCT_Msk (0xffffffffUL) /*!< ETH RXIPV6_GOOD_OCTETS: RXIPV6GDOCT (Bitfield-Mask: 0xffffffff) */ + +/* ----------------------- ETH_RXIPV6_HEADER_ERROR_OCTETS ----------------------- */ +#define ETH_RXIPV6_HEADER_ERROR_OCTETS_RXIPV6HDRERROCT_Pos (0UL) /*!< ETH RXIPV6_HEADER_ERROR_OCTETS: RXIPV6HDRERROCT (Bit 0) */ +#define ETH_RXIPV6_HEADER_ERROR_OCTETS_RXIPV6HDRERROCT_Msk (0xffffffffUL) /*!< ETH RXIPV6_HEADER_ERROR_OCTETS: RXIPV6HDRERROCT (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------ ETH_RXIPV6_NO_PAYLOAD_OCTETS ------------------------ */ +#define ETH_RXIPV6_NO_PAYLOAD_OCTETS_RXIPV6NOPAYOCT_Pos (0UL) /*!< ETH RXIPV6_NO_PAYLOAD_OCTETS: RXIPV6NOPAYOCT (Bit 0) */ +#define ETH_RXIPV6_NO_PAYLOAD_OCTETS_RXIPV6NOPAYOCT_Msk (0xffffffffUL) /*!< ETH RXIPV6_NO_PAYLOAD_OCTETS: RXIPV6NOPAYOCT (Bitfield-Mask: 0xffffffff) */ + +/* ---------------------------- ETH_RXUDP_GOOD_OCTETS --------------------------- */ +#define ETH_RXUDP_GOOD_OCTETS_RXUDPGDOCT_Pos (0UL) /*!< ETH RXUDP_GOOD_OCTETS: RXUDPGDOCT (Bit 0) */ +#define ETH_RXUDP_GOOD_OCTETS_RXUDPGDOCT_Msk (0xffffffffUL) /*!< ETH RXUDP_GOOD_OCTETS: RXUDPGDOCT (Bitfield-Mask: 0xffffffff) */ + +/* --------------------------- ETH_RXUDP_ERROR_OCTETS --------------------------- */ +#define ETH_RXUDP_ERROR_OCTETS_RXUDPERROCT_Pos (0UL) /*!< ETH RXUDP_ERROR_OCTETS: RXUDPERROCT (Bit 0) */ +#define ETH_RXUDP_ERROR_OCTETS_RXUDPERROCT_Msk (0xffffffffUL) /*!< ETH RXUDP_ERROR_OCTETS: RXUDPERROCT (Bitfield-Mask: 0xffffffff) */ + +/* ---------------------------- ETH_RXTCP_GOOD_OCTETS --------------------------- */ +#define ETH_RXTCP_GOOD_OCTETS_RXTCPGDOCT_Pos (0UL) /*!< ETH RXTCP_GOOD_OCTETS: RXTCPGDOCT (Bit 0) */ +#define ETH_RXTCP_GOOD_OCTETS_RXTCPGDOCT_Msk (0xffffffffUL) /*!< ETH RXTCP_GOOD_OCTETS: RXTCPGDOCT (Bitfield-Mask: 0xffffffff) */ + +/* --------------------------- ETH_RXTCP_ERROR_OCTETS --------------------------- */ +#define ETH_RXTCP_ERROR_OCTETS_RXTCPERROCT_Pos (0UL) /*!< ETH RXTCP_ERROR_OCTETS: RXTCPERROCT (Bit 0) */ +#define ETH_RXTCP_ERROR_OCTETS_RXTCPERROCT_Msk (0xffffffffUL) /*!< ETH RXTCP_ERROR_OCTETS: RXTCPERROCT (Bitfield-Mask: 0xffffffff) */ + +/* --------------------------- ETH_RXICMP_GOOD_OCTETS --------------------------- */ +#define ETH_RXICMP_GOOD_OCTETS_RXICMPGDOCT_Pos (0UL) /*!< ETH RXICMP_GOOD_OCTETS: RXICMPGDOCT (Bit 0) */ +#define ETH_RXICMP_GOOD_OCTETS_RXICMPGDOCT_Msk (0xffffffffUL) /*!< ETH RXICMP_GOOD_OCTETS: RXICMPGDOCT (Bitfield-Mask: 0xffffffff) */ + +/* --------------------------- ETH_RXICMP_ERROR_OCTETS -------------------------- */ +#define ETH_RXICMP_ERROR_OCTETS_RXICMPERROCT_Pos (0UL) /*!< ETH RXICMP_ERROR_OCTETS: RXICMPERROCT (Bit 0) */ +#define ETH_RXICMP_ERROR_OCTETS_RXICMPERROCT_Msk (0xffffffffUL) /*!< ETH RXICMP_ERROR_OCTETS: RXICMPERROCT (Bitfield-Mask: 0xffffffff) */ + +/* ---------------------------- ETH_TIMESTAMP_CONTROL --------------------------- */ +#define ETH_TIMESTAMP_CONTROL_TSENA_Pos (0UL) /*!< ETH TIMESTAMP_CONTROL: TSENA (Bit 0) */ +#define ETH_TIMESTAMP_CONTROL_TSENA_Msk (0x1UL) /*!< ETH TIMESTAMP_CONTROL: TSENA (Bitfield-Mask: 0x01) */ +#define ETH_TIMESTAMP_CONTROL_TSCFUPDT_Pos (1UL) /*!< ETH TIMESTAMP_CONTROL: TSCFUPDT (Bit 1) */ +#define ETH_TIMESTAMP_CONTROL_TSCFUPDT_Msk (0x2UL) /*!< ETH TIMESTAMP_CONTROL: TSCFUPDT (Bitfield-Mask: 0x01) */ +#define ETH_TIMESTAMP_CONTROL_TSINIT_Pos (2UL) /*!< ETH TIMESTAMP_CONTROL: TSINIT (Bit 2) */ +#define ETH_TIMESTAMP_CONTROL_TSINIT_Msk (0x4UL) /*!< ETH TIMESTAMP_CONTROL: TSINIT (Bitfield-Mask: 0x01) */ +#define ETH_TIMESTAMP_CONTROL_TSUPDT_Pos (3UL) /*!< ETH TIMESTAMP_CONTROL: TSUPDT (Bit 3) */ +#define ETH_TIMESTAMP_CONTROL_TSUPDT_Msk (0x8UL) /*!< ETH TIMESTAMP_CONTROL: TSUPDT (Bitfield-Mask: 0x01) */ +#define ETH_TIMESTAMP_CONTROL_TSTRIG_Pos (4UL) /*!< ETH TIMESTAMP_CONTROL: TSTRIG (Bit 4) */ +#define ETH_TIMESTAMP_CONTROL_TSTRIG_Msk (0x10UL) /*!< ETH TIMESTAMP_CONTROL: TSTRIG (Bitfield-Mask: 0x01) */ +#define ETH_TIMESTAMP_CONTROL_TSADDREG_Pos (5UL) /*!< ETH TIMESTAMP_CONTROL: TSADDREG (Bit 5) */ +#define ETH_TIMESTAMP_CONTROL_TSADDREG_Msk (0x20UL) /*!< ETH TIMESTAMP_CONTROL: TSADDREG (Bitfield-Mask: 0x01) */ +#define ETH_TIMESTAMP_CONTROL_TSENALL_Pos (8UL) /*!< ETH TIMESTAMP_CONTROL: TSENALL (Bit 8) */ +#define ETH_TIMESTAMP_CONTROL_TSENALL_Msk (0x100UL) /*!< ETH TIMESTAMP_CONTROL: TSENALL (Bitfield-Mask: 0x01) */ +#define ETH_TIMESTAMP_CONTROL_TSCTRLSSR_Pos (9UL) /*!< ETH TIMESTAMP_CONTROL: TSCTRLSSR (Bit 9) */ +#define ETH_TIMESTAMP_CONTROL_TSCTRLSSR_Msk (0x200UL) /*!< ETH TIMESTAMP_CONTROL: TSCTRLSSR (Bitfield-Mask: 0x01) */ +#define ETH_TIMESTAMP_CONTROL_TSVER2ENA_Pos (10UL) /*!< ETH TIMESTAMP_CONTROL: TSVER2ENA (Bit 10) */ +#define ETH_TIMESTAMP_CONTROL_TSVER2ENA_Msk (0x400UL) /*!< ETH TIMESTAMP_CONTROL: TSVER2ENA (Bitfield-Mask: 0x01) */ +#define ETH_TIMESTAMP_CONTROL_TSIPENA_Pos (11UL) /*!< ETH TIMESTAMP_CONTROL: TSIPENA (Bit 11) */ +#define ETH_TIMESTAMP_CONTROL_TSIPENA_Msk (0x800UL) /*!< ETH TIMESTAMP_CONTROL: TSIPENA (Bitfield-Mask: 0x01) */ +#define ETH_TIMESTAMP_CONTROL_TSIPV6ENA_Pos (12UL) /*!< ETH TIMESTAMP_CONTROL: TSIPV6ENA (Bit 12) */ +#define ETH_TIMESTAMP_CONTROL_TSIPV6ENA_Msk (0x1000UL) /*!< ETH TIMESTAMP_CONTROL: TSIPV6ENA (Bitfield-Mask: 0x01) */ +#define ETH_TIMESTAMP_CONTROL_TSIPV4ENA_Pos (13UL) /*!< ETH TIMESTAMP_CONTROL: TSIPV4ENA (Bit 13) */ +#define ETH_TIMESTAMP_CONTROL_TSIPV4ENA_Msk (0x2000UL) /*!< ETH TIMESTAMP_CONTROL: TSIPV4ENA (Bitfield-Mask: 0x01) */ +#define ETH_TIMESTAMP_CONTROL_TSEVNTENA_Pos (14UL) /*!< ETH TIMESTAMP_CONTROL: TSEVNTENA (Bit 14) */ +#define ETH_TIMESTAMP_CONTROL_TSEVNTENA_Msk (0x4000UL) /*!< ETH TIMESTAMP_CONTROL: TSEVNTENA (Bitfield-Mask: 0x01) */ +#define ETH_TIMESTAMP_CONTROL_TSMSTRENA_Pos (15UL) /*!< ETH TIMESTAMP_CONTROL: TSMSTRENA (Bit 15) */ +#define ETH_TIMESTAMP_CONTROL_TSMSTRENA_Msk (0x8000UL) /*!< ETH TIMESTAMP_CONTROL: TSMSTRENA (Bitfield-Mask: 0x01) */ +#define ETH_TIMESTAMP_CONTROL_SNAPTYPSEL_Pos (16UL) /*!< ETH TIMESTAMP_CONTROL: SNAPTYPSEL (Bit 16) */ +#define ETH_TIMESTAMP_CONTROL_SNAPTYPSEL_Msk (0x30000UL) /*!< ETH TIMESTAMP_CONTROL: SNAPTYPSEL (Bitfield-Mask: 0x03) */ +#define ETH_TIMESTAMP_CONTROL_TSENMACADDR_Pos (18UL) /*!< ETH TIMESTAMP_CONTROL: TSENMACADDR (Bit 18) */ +#define ETH_TIMESTAMP_CONTROL_TSENMACADDR_Msk (0x40000UL) /*!< ETH TIMESTAMP_CONTROL: TSENMACADDR (Bitfield-Mask: 0x01) */ + +/* -------------------------- ETH_SUB_SECOND_INCREMENT -------------------------- */ +#define ETH_SUB_SECOND_INCREMENT_SSINC_Pos (0UL) /*!< ETH SUB_SECOND_INCREMENT: SSINC (Bit 0) */ +#define ETH_SUB_SECOND_INCREMENT_SSINC_Msk (0xffUL) /*!< ETH SUB_SECOND_INCREMENT: SSINC (Bitfield-Mask: 0xff) */ + +/* --------------------------- ETH_SYSTEM_TIME_SECONDS -------------------------- */ +#define ETH_SYSTEM_TIME_SECONDS_TSS_Pos (0UL) /*!< ETH SYSTEM_TIME_SECONDS: TSS (Bit 0) */ +#define ETH_SYSTEM_TIME_SECONDS_TSS_Msk (0xffffffffUL) /*!< ETH SYSTEM_TIME_SECONDS: TSS (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------- ETH_SYSTEM_TIME_NANOSECONDS ------------------------ */ +#define ETH_SYSTEM_TIME_NANOSECONDS_TSSS_Pos (0UL) /*!< ETH SYSTEM_TIME_NANOSECONDS: TSSS (Bit 0) */ +#define ETH_SYSTEM_TIME_NANOSECONDS_TSSS_Msk (0x7fffffffUL) /*!< ETH SYSTEM_TIME_NANOSECONDS: TSSS (Bitfield-Mask: 0x7fffffff) */ + +/* ----------------------- ETH_SYSTEM_TIME_SECONDS_UPDATE ----------------------- */ +#define ETH_SYSTEM_TIME_SECONDS_UPDATE_TSS_Pos (0UL) /*!< ETH SYSTEM_TIME_SECONDS_UPDATE: TSS (Bit 0) */ +#define ETH_SYSTEM_TIME_SECONDS_UPDATE_TSS_Msk (0xffffffffUL) /*!< ETH SYSTEM_TIME_SECONDS_UPDATE: TSS (Bitfield-Mask: 0xffffffff) */ + +/* --------------------- ETH_SYSTEM_TIME_NANOSECONDS_UPDATE --------------------- */ +#define ETH_SYSTEM_TIME_NANOSECONDS_UPDATE_TSSS_Pos (0UL) /*!< ETH SYSTEM_TIME_NANOSECONDS_UPDATE: TSSS (Bit 0) */ +#define ETH_SYSTEM_TIME_NANOSECONDS_UPDATE_TSSS_Msk (0x7fffffffUL) /*!< ETH SYSTEM_TIME_NANOSECONDS_UPDATE: TSSS (Bitfield-Mask: 0x7fffffff) */ +#define ETH_SYSTEM_TIME_NANOSECONDS_UPDATE_ADDSUB_Pos (31UL) /*!< ETH SYSTEM_TIME_NANOSECONDS_UPDATE: ADDSUB (Bit 31) */ +#define ETH_SYSTEM_TIME_NANOSECONDS_UPDATE_ADDSUB_Msk (0x80000000UL) /*!< ETH SYSTEM_TIME_NANOSECONDS_UPDATE: ADDSUB (Bitfield-Mask: 0x01) */ + +/* ---------------------------- ETH_TIMESTAMP_ADDEND ---------------------------- */ +#define ETH_TIMESTAMP_ADDEND_TSAR_Pos (0UL) /*!< ETH TIMESTAMP_ADDEND: TSAR (Bit 0) */ +#define ETH_TIMESTAMP_ADDEND_TSAR_Msk (0xffffffffUL) /*!< ETH TIMESTAMP_ADDEND: TSAR (Bitfield-Mask: 0xffffffff) */ + +/* --------------------------- ETH_TARGET_TIME_SECONDS -------------------------- */ +#define ETH_TARGET_TIME_SECONDS_TSTR_Pos (0UL) /*!< ETH TARGET_TIME_SECONDS: TSTR (Bit 0) */ +#define ETH_TARGET_TIME_SECONDS_TSTR_Msk (0xffffffffUL) /*!< ETH TARGET_TIME_SECONDS: TSTR (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------- ETH_TARGET_TIME_NANOSECONDS ------------------------ */ +#define ETH_TARGET_TIME_NANOSECONDS_TTSLO_Pos (0UL) /*!< ETH TARGET_TIME_NANOSECONDS: TTSLO (Bit 0) */ +#define ETH_TARGET_TIME_NANOSECONDS_TTSLO_Msk (0x7fffffffUL) /*!< ETH TARGET_TIME_NANOSECONDS: TTSLO (Bitfield-Mask: 0x7fffffff) */ +#define ETH_TARGET_TIME_NANOSECONDS_TRGTBUSY_Pos (31UL) /*!< ETH TARGET_TIME_NANOSECONDS: TRGTBUSY (Bit 31) */ +#define ETH_TARGET_TIME_NANOSECONDS_TRGTBUSY_Msk (0x80000000UL) /*!< ETH TARGET_TIME_NANOSECONDS: TRGTBUSY (Bitfield-Mask: 0x01) */ + +/* --------------------- ETH_SYSTEM_TIME_HIGHER_WORD_SECONDS -------------------- */ +#define ETH_SYSTEM_TIME_HIGHER_WORD_SECONDS_TSHWR_Pos (0UL) /*!< ETH SYSTEM_TIME_HIGHER_WORD_SECONDS: TSHWR (Bit 0) */ +#define ETH_SYSTEM_TIME_HIGHER_WORD_SECONDS_TSHWR_Msk (0xffffUL) /*!< ETH SYSTEM_TIME_HIGHER_WORD_SECONDS: TSHWR (Bitfield-Mask: 0xffff) */ + +/* ---------------------------- ETH_TIMESTAMP_STATUS ---------------------------- */ +#define ETH_TIMESTAMP_STATUS_TSSOVF_Pos (0UL) /*!< ETH TIMESTAMP_STATUS: TSSOVF (Bit 0) */ +#define ETH_TIMESTAMP_STATUS_TSSOVF_Msk (0x1UL) /*!< ETH TIMESTAMP_STATUS: TSSOVF (Bitfield-Mask: 0x01) */ +#define ETH_TIMESTAMP_STATUS_TSTARGT_Pos (1UL) /*!< ETH TIMESTAMP_STATUS: TSTARGT (Bit 1) */ +#define ETH_TIMESTAMP_STATUS_TSTARGT_Msk (0x2UL) /*!< ETH TIMESTAMP_STATUS: TSTARGT (Bitfield-Mask: 0x01) */ +#define ETH_TIMESTAMP_STATUS_TSTRGTERR_Pos (3UL) /*!< ETH TIMESTAMP_STATUS: TSTRGTERR (Bit 3) */ +#define ETH_TIMESTAMP_STATUS_TSTRGTERR_Msk (0x8UL) /*!< ETH TIMESTAMP_STATUS: TSTRGTERR (Bitfield-Mask: 0x01) */ +#define ETH_TIMESTAMP_STATUS_TSTARGT1_Pos (4UL) /*!< ETH TIMESTAMP_STATUS: TSTARGT1 (Bit 4) */ +#define ETH_TIMESTAMP_STATUS_TSTARGT1_Msk (0x10UL) /*!< ETH TIMESTAMP_STATUS: TSTARGT1 (Bitfield-Mask: 0x01) */ +#define ETH_TIMESTAMP_STATUS_TSTRGTERR1_Pos (5UL) /*!< ETH TIMESTAMP_STATUS: TSTRGTERR1 (Bit 5) */ +#define ETH_TIMESTAMP_STATUS_TSTRGTERR1_Msk (0x20UL) /*!< ETH TIMESTAMP_STATUS: TSTRGTERR1 (Bitfield-Mask: 0x01) */ +#define ETH_TIMESTAMP_STATUS_TSTARGT2_Pos (6UL) /*!< ETH TIMESTAMP_STATUS: TSTARGT2 (Bit 6) */ +#define ETH_TIMESTAMP_STATUS_TSTARGT2_Msk (0x40UL) /*!< ETH TIMESTAMP_STATUS: TSTARGT2 (Bitfield-Mask: 0x01) */ +#define ETH_TIMESTAMP_STATUS_TSTRGTERR2_Pos (7UL) /*!< ETH TIMESTAMP_STATUS: TSTRGTERR2 (Bit 7) */ +#define ETH_TIMESTAMP_STATUS_TSTRGTERR2_Msk (0x80UL) /*!< ETH TIMESTAMP_STATUS: TSTRGTERR2 (Bitfield-Mask: 0x01) */ +#define ETH_TIMESTAMP_STATUS_TSTARGT3_Pos (8UL) /*!< ETH TIMESTAMP_STATUS: TSTARGT3 (Bit 8) */ +#define ETH_TIMESTAMP_STATUS_TSTARGT3_Msk (0x100UL) /*!< ETH TIMESTAMP_STATUS: TSTARGT3 (Bitfield-Mask: 0x01) */ +#define ETH_TIMESTAMP_STATUS_TSTRGTERR3_Pos (9UL) /*!< ETH TIMESTAMP_STATUS: TSTRGTERR3 (Bit 9) */ +#define ETH_TIMESTAMP_STATUS_TSTRGTERR3_Msk (0x200UL) /*!< ETH TIMESTAMP_STATUS: TSTRGTERR3 (Bitfield-Mask: 0x01) */ + +/* -------------------------------- ETH_BUS_MODE -------------------------------- */ +#define ETH_BUS_MODE_SWR_Pos (0UL) /*!< ETH BUS_MODE: SWR (Bit 0) */ +#define ETH_BUS_MODE_SWR_Msk (0x1UL) /*!< ETH BUS_MODE: SWR (Bitfield-Mask: 0x01) */ +#define ETH_BUS_MODE_DA_Pos (1UL) /*!< ETH BUS_MODE: DA (Bit 1) */ +#define ETH_BUS_MODE_DA_Msk (0x2UL) /*!< ETH BUS_MODE: DA (Bitfield-Mask: 0x01) */ +#define ETH_BUS_MODE_DSL_Pos (2UL) /*!< ETH BUS_MODE: DSL (Bit 2) */ +#define ETH_BUS_MODE_DSL_Msk (0x7cUL) /*!< ETH BUS_MODE: DSL (Bitfield-Mask: 0x1f) */ +#define ETH_BUS_MODE_ATDS_Pos (7UL) /*!< ETH BUS_MODE: ATDS (Bit 7) */ +#define ETH_BUS_MODE_ATDS_Msk (0x80UL) /*!< ETH BUS_MODE: ATDS (Bitfield-Mask: 0x01) */ +#define ETH_BUS_MODE_PBL_Pos (8UL) /*!< ETH BUS_MODE: PBL (Bit 8) */ +#define ETH_BUS_MODE_PBL_Msk (0x3f00UL) /*!< ETH BUS_MODE: PBL (Bitfield-Mask: 0x3f) */ +#define ETH_BUS_MODE_PR_Pos (14UL) /*!< ETH BUS_MODE: PR (Bit 14) */ +#define ETH_BUS_MODE_PR_Msk (0xc000UL) /*!< ETH BUS_MODE: PR (Bitfield-Mask: 0x03) */ +#define ETH_BUS_MODE_FB_Pos (16UL) /*!< ETH BUS_MODE: FB (Bit 16) */ +#define ETH_BUS_MODE_FB_Msk (0x10000UL) /*!< ETH BUS_MODE: FB (Bitfield-Mask: 0x01) */ +#define ETH_BUS_MODE_RPBL_Pos (17UL) /*!< ETH BUS_MODE: RPBL (Bit 17) */ +#define ETH_BUS_MODE_RPBL_Msk (0x7e0000UL) /*!< ETH BUS_MODE: RPBL (Bitfield-Mask: 0x3f) */ +#define ETH_BUS_MODE_USP_Pos (23UL) /*!< ETH BUS_MODE: USP (Bit 23) */ +#define ETH_BUS_MODE_USP_Msk (0x800000UL) /*!< ETH BUS_MODE: USP (Bitfield-Mask: 0x01) */ +#define ETH_BUS_MODE_PBLX8_Pos (24UL) /*!< ETH BUS_MODE: PBLX8 (Bit 24) */ +#define ETH_BUS_MODE_PBLX8_Msk (0x1000000UL) /*!< ETH BUS_MODE: PBLX8 (Bitfield-Mask: 0x01) */ +#define ETH_BUS_MODE_AAL_Pos (25UL) /*!< ETH BUS_MODE: AAL (Bit 25) */ +#define ETH_BUS_MODE_AAL_Msk (0x2000000UL) /*!< ETH BUS_MODE: AAL (Bitfield-Mask: 0x01) */ +#define ETH_BUS_MODE_MB_Pos (26UL) /*!< ETH BUS_MODE: MB (Bit 26) */ +#define ETH_BUS_MODE_MB_Msk (0x4000000UL) /*!< ETH BUS_MODE: MB (Bitfield-Mask: 0x01) */ +#define ETH_BUS_MODE_TXPR_Pos (27UL) /*!< ETH BUS_MODE: TXPR (Bit 27) */ +#define ETH_BUS_MODE_TXPR_Msk (0x8000000UL) /*!< ETH BUS_MODE: TXPR (Bitfield-Mask: 0x01) */ +#define ETH_BUS_MODE_PRWG_Pos (28UL) /*!< ETH BUS_MODE: PRWG (Bit 28) */ +#define ETH_BUS_MODE_PRWG_Msk (0x30000000UL) /*!< ETH BUS_MODE: PRWG (Bitfield-Mask: 0x03) */ + +/* -------------------------- ETH_TRANSMIT_POLL_DEMAND -------------------------- */ +#define ETH_TRANSMIT_POLL_DEMAND_TPD_Pos (0UL) /*!< ETH TRANSMIT_POLL_DEMAND: TPD (Bit 0) */ +#define ETH_TRANSMIT_POLL_DEMAND_TPD_Msk (0xffffffffUL) /*!< ETH TRANSMIT_POLL_DEMAND: TPD (Bitfield-Mask: 0xffffffff) */ + +/* --------------------------- ETH_RECEIVE_POLL_DEMAND -------------------------- */ +#define ETH_RECEIVE_POLL_DEMAND_RPD_Pos (0UL) /*!< ETH RECEIVE_POLL_DEMAND: RPD (Bit 0) */ +#define ETH_RECEIVE_POLL_DEMAND_RPD_Msk (0xffffffffUL) /*!< ETH RECEIVE_POLL_DEMAND: RPD (Bitfield-Mask: 0xffffffff) */ + +/* --------------------- ETH_RECEIVE_DESCRIPTOR_LIST_ADDRESS -------------------- */ +#define ETH_RECEIVE_DESCRIPTOR_LIST_ADDRESS_RDESLA_32bit_Pos (2UL) /*!< ETH RECEIVE_DESCRIPTOR_LIST_ADDRESS: RDESLA_32bit (Bit 2) */ +#define ETH_RECEIVE_DESCRIPTOR_LIST_ADDRESS_RDESLA_32bit_Msk (0xfffffffcUL) /*!< ETH RECEIVE_DESCRIPTOR_LIST_ADDRESS: RDESLA_32bit (Bitfield-Mask: 0x3fffffff) */ + +/* -------------------- ETH_TRANSMIT_DESCRIPTOR_LIST_ADDRESS -------------------- */ +#define ETH_TRANSMIT_DESCRIPTOR_LIST_ADDRESS_TDESLA_32bit_Pos (2UL) /*!< ETH TRANSMIT_DESCRIPTOR_LIST_ADDRESS: TDESLA_32bit (Bit 2) */ +#define ETH_TRANSMIT_DESCRIPTOR_LIST_ADDRESS_TDESLA_32bit_Msk (0xfffffffcUL) /*!< ETH TRANSMIT_DESCRIPTOR_LIST_ADDRESS: TDESLA_32bit (Bitfield-Mask: 0x3fffffff) */ + +/* --------------------------------- ETH_STATUS --------------------------------- */ +#define ETH_STATUS_TI_Pos (0UL) /*!< ETH STATUS: TI (Bit 0) */ +#define ETH_STATUS_TI_Msk (0x1UL) /*!< ETH STATUS: TI (Bitfield-Mask: 0x01) */ +#define ETH_STATUS_TPS_Pos (1UL) /*!< ETH STATUS: TPS (Bit 1) */ +#define ETH_STATUS_TPS_Msk (0x2UL) /*!< ETH STATUS: TPS (Bitfield-Mask: 0x01) */ +#define ETH_STATUS_TU_Pos (2UL) /*!< ETH STATUS: TU (Bit 2) */ +#define ETH_STATUS_TU_Msk (0x4UL) /*!< ETH STATUS: TU (Bitfield-Mask: 0x01) */ +#define ETH_STATUS_TJT_Pos (3UL) /*!< ETH STATUS: TJT (Bit 3) */ +#define ETH_STATUS_TJT_Msk (0x8UL) /*!< ETH STATUS: TJT (Bitfield-Mask: 0x01) */ +#define ETH_STATUS_OVF_Pos (4UL) /*!< ETH STATUS: OVF (Bit 4) */ +#define ETH_STATUS_OVF_Msk (0x10UL) /*!< ETH STATUS: OVF (Bitfield-Mask: 0x01) */ +#define ETH_STATUS_UNF_Pos (5UL) /*!< ETH STATUS: UNF (Bit 5) */ +#define ETH_STATUS_UNF_Msk (0x20UL) /*!< ETH STATUS: UNF (Bitfield-Mask: 0x01) */ +#define ETH_STATUS_RI_Pos (6UL) /*!< ETH STATUS: RI (Bit 6) */ +#define ETH_STATUS_RI_Msk (0x40UL) /*!< ETH STATUS: RI (Bitfield-Mask: 0x01) */ +#define ETH_STATUS_RU_Pos (7UL) /*!< ETH STATUS: RU (Bit 7) */ +#define ETH_STATUS_RU_Msk (0x80UL) /*!< ETH STATUS: RU (Bitfield-Mask: 0x01) */ +#define ETH_STATUS_RPS_Pos (8UL) /*!< ETH STATUS: RPS (Bit 8) */ +#define ETH_STATUS_RPS_Msk (0x100UL) /*!< ETH STATUS: RPS (Bitfield-Mask: 0x01) */ +#define ETH_STATUS_RWT_Pos (9UL) /*!< ETH STATUS: RWT (Bit 9) */ +#define ETH_STATUS_RWT_Msk (0x200UL) /*!< ETH STATUS: RWT (Bitfield-Mask: 0x01) */ +#define ETH_STATUS_ETI_Pos (10UL) /*!< ETH STATUS: ETI (Bit 10) */ +#define ETH_STATUS_ETI_Msk (0x400UL) /*!< ETH STATUS: ETI (Bitfield-Mask: 0x01) */ +#define ETH_STATUS_FBI_Pos (13UL) /*!< ETH STATUS: FBI (Bit 13) */ +#define ETH_STATUS_FBI_Msk (0x2000UL) /*!< ETH STATUS: FBI (Bitfield-Mask: 0x01) */ +#define ETH_STATUS_ERI_Pos (14UL) /*!< ETH STATUS: ERI (Bit 14) */ +#define ETH_STATUS_ERI_Msk (0x4000UL) /*!< ETH STATUS: ERI (Bitfield-Mask: 0x01) */ +#define ETH_STATUS_AIS_Pos (15UL) /*!< ETH STATUS: AIS (Bit 15) */ +#define ETH_STATUS_AIS_Msk (0x8000UL) /*!< ETH STATUS: AIS (Bitfield-Mask: 0x01) */ +#define ETH_STATUS_NIS_Pos (16UL) /*!< ETH STATUS: NIS (Bit 16) */ +#define ETH_STATUS_NIS_Msk (0x10000UL) /*!< ETH STATUS: NIS (Bitfield-Mask: 0x01) */ +#define ETH_STATUS_RS_Pos (17UL) /*!< ETH STATUS: RS (Bit 17) */ +#define ETH_STATUS_RS_Msk (0xe0000UL) /*!< ETH STATUS: RS (Bitfield-Mask: 0x07) */ +#define ETH_STATUS_TS_Pos (20UL) /*!< ETH STATUS: TS (Bit 20) */ +#define ETH_STATUS_TS_Msk (0x700000UL) /*!< ETH STATUS: TS (Bitfield-Mask: 0x07) */ +#define ETH_STATUS_EB_Pos (23UL) /*!< ETH STATUS: EB (Bit 23) */ +#define ETH_STATUS_EB_Msk (0x3800000UL) /*!< ETH STATUS: EB (Bitfield-Mask: 0x07) */ +#define ETH_STATUS_EMI_Pos (27UL) /*!< ETH STATUS: EMI (Bit 27) */ +#define ETH_STATUS_EMI_Msk (0x8000000UL) /*!< ETH STATUS: EMI (Bitfield-Mask: 0x01) */ +#define ETH_STATUS_EPI_Pos (28UL) /*!< ETH STATUS: EPI (Bit 28) */ +#define ETH_STATUS_EPI_Msk (0x10000000UL) /*!< ETH STATUS: EPI (Bitfield-Mask: 0x01) */ +#define ETH_STATUS_TTI_Pos (29UL) /*!< ETH STATUS: TTI (Bit 29) */ +#define ETH_STATUS_TTI_Msk (0x20000000UL) /*!< ETH STATUS: TTI (Bitfield-Mask: 0x01) */ + +/* ----------------------------- ETH_OPERATION_MODE ----------------------------- */ +#define ETH_OPERATION_MODE_SR_Pos (1UL) /*!< ETH OPERATION_MODE: SR (Bit 1) */ +#define ETH_OPERATION_MODE_SR_Msk (0x2UL) /*!< ETH OPERATION_MODE: SR (Bitfield-Mask: 0x01) */ +#define ETH_OPERATION_MODE_OSF_Pos (2UL) /*!< ETH OPERATION_MODE: OSF (Bit 2) */ +#define ETH_OPERATION_MODE_OSF_Msk (0x4UL) /*!< ETH OPERATION_MODE: OSF (Bitfield-Mask: 0x01) */ +#define ETH_OPERATION_MODE_RTC_Pos (3UL) /*!< ETH OPERATION_MODE: RTC (Bit 3) */ +#define ETH_OPERATION_MODE_RTC_Msk (0x18UL) /*!< ETH OPERATION_MODE: RTC (Bitfield-Mask: 0x03) */ +#define ETH_OPERATION_MODE_FUF_Pos (6UL) /*!< ETH OPERATION_MODE: FUF (Bit 6) */ +#define ETH_OPERATION_MODE_FUF_Msk (0x40UL) /*!< ETH OPERATION_MODE: FUF (Bitfield-Mask: 0x01) */ +#define ETH_OPERATION_MODE_FEF_Pos (7UL) /*!< ETH OPERATION_MODE: FEF (Bit 7) */ +#define ETH_OPERATION_MODE_FEF_Msk (0x80UL) /*!< ETH OPERATION_MODE: FEF (Bitfield-Mask: 0x01) */ +#define ETH_OPERATION_MODE_ST_Pos (13UL) /*!< ETH OPERATION_MODE: ST (Bit 13) */ +#define ETH_OPERATION_MODE_ST_Msk (0x2000UL) /*!< ETH OPERATION_MODE: ST (Bitfield-Mask: 0x01) */ +#define ETH_OPERATION_MODE_TTC_Pos (14UL) /*!< ETH OPERATION_MODE: TTC (Bit 14) */ +#define ETH_OPERATION_MODE_TTC_Msk (0x1c000UL) /*!< ETH OPERATION_MODE: TTC (Bitfield-Mask: 0x07) */ +#define ETH_OPERATION_MODE_FTF_Pos (20UL) /*!< ETH OPERATION_MODE: FTF (Bit 20) */ +#define ETH_OPERATION_MODE_FTF_Msk (0x100000UL) /*!< ETH OPERATION_MODE: FTF (Bitfield-Mask: 0x01) */ +#define ETH_OPERATION_MODE_TSF_Pos (21UL) /*!< ETH OPERATION_MODE: TSF (Bit 21) */ +#define ETH_OPERATION_MODE_TSF_Msk (0x200000UL) /*!< ETH OPERATION_MODE: TSF (Bitfield-Mask: 0x01) */ +#define ETH_OPERATION_MODE_DFF_Pos (24UL) /*!< ETH OPERATION_MODE: DFF (Bit 24) */ +#define ETH_OPERATION_MODE_DFF_Msk (0x1000000UL) /*!< ETH OPERATION_MODE: DFF (Bitfield-Mask: 0x01) */ +#define ETH_OPERATION_MODE_RSF_Pos (25UL) /*!< ETH OPERATION_MODE: RSF (Bit 25) */ +#define ETH_OPERATION_MODE_RSF_Msk (0x2000000UL) /*!< ETH OPERATION_MODE: RSF (Bitfield-Mask: 0x01) */ +#define ETH_OPERATION_MODE_DT_Pos (26UL) /*!< ETH OPERATION_MODE: DT (Bit 26) */ +#define ETH_OPERATION_MODE_DT_Msk (0x4000000UL) /*!< ETH OPERATION_MODE: DT (Bitfield-Mask: 0x01) */ + +/* ---------------------------- ETH_INTERRUPT_ENABLE ---------------------------- */ +#define ETH_INTERRUPT_ENABLE_TIE_Pos (0UL) /*!< ETH INTERRUPT_ENABLE: TIE (Bit 0) */ +#define ETH_INTERRUPT_ENABLE_TIE_Msk (0x1UL) /*!< ETH INTERRUPT_ENABLE: TIE (Bitfield-Mask: 0x01) */ +#define ETH_INTERRUPT_ENABLE_TSE_Pos (1UL) /*!< ETH INTERRUPT_ENABLE: TSE (Bit 1) */ +#define ETH_INTERRUPT_ENABLE_TSE_Msk (0x2UL) /*!< ETH INTERRUPT_ENABLE: TSE (Bitfield-Mask: 0x01) */ +#define ETH_INTERRUPT_ENABLE_TUE_Pos (2UL) /*!< ETH INTERRUPT_ENABLE: TUE (Bit 2) */ +#define ETH_INTERRUPT_ENABLE_TUE_Msk (0x4UL) /*!< ETH INTERRUPT_ENABLE: TUE (Bitfield-Mask: 0x01) */ +#define ETH_INTERRUPT_ENABLE_TJE_Pos (3UL) /*!< ETH INTERRUPT_ENABLE: TJE (Bit 3) */ +#define ETH_INTERRUPT_ENABLE_TJE_Msk (0x8UL) /*!< ETH INTERRUPT_ENABLE: TJE (Bitfield-Mask: 0x01) */ +#define ETH_INTERRUPT_ENABLE_OVE_Pos (4UL) /*!< ETH INTERRUPT_ENABLE: OVE (Bit 4) */ +#define ETH_INTERRUPT_ENABLE_OVE_Msk (0x10UL) /*!< ETH INTERRUPT_ENABLE: OVE (Bitfield-Mask: 0x01) */ +#define ETH_INTERRUPT_ENABLE_UNE_Pos (5UL) /*!< ETH INTERRUPT_ENABLE: UNE (Bit 5) */ +#define ETH_INTERRUPT_ENABLE_UNE_Msk (0x20UL) /*!< ETH INTERRUPT_ENABLE: UNE (Bitfield-Mask: 0x01) */ +#define ETH_INTERRUPT_ENABLE_RIE_Pos (6UL) /*!< ETH INTERRUPT_ENABLE: RIE (Bit 6) */ +#define ETH_INTERRUPT_ENABLE_RIE_Msk (0x40UL) /*!< ETH INTERRUPT_ENABLE: RIE (Bitfield-Mask: 0x01) */ +#define ETH_INTERRUPT_ENABLE_RUE_Pos (7UL) /*!< ETH INTERRUPT_ENABLE: RUE (Bit 7) */ +#define ETH_INTERRUPT_ENABLE_RUE_Msk (0x80UL) /*!< ETH INTERRUPT_ENABLE: RUE (Bitfield-Mask: 0x01) */ +#define ETH_INTERRUPT_ENABLE_RSE_Pos (8UL) /*!< ETH INTERRUPT_ENABLE: RSE (Bit 8) */ +#define ETH_INTERRUPT_ENABLE_RSE_Msk (0x100UL) /*!< ETH INTERRUPT_ENABLE: RSE (Bitfield-Mask: 0x01) */ +#define ETH_INTERRUPT_ENABLE_RWE_Pos (9UL) /*!< ETH INTERRUPT_ENABLE: RWE (Bit 9) */ +#define ETH_INTERRUPT_ENABLE_RWE_Msk (0x200UL) /*!< ETH INTERRUPT_ENABLE: RWE (Bitfield-Mask: 0x01) */ +#define ETH_INTERRUPT_ENABLE_ETE_Pos (10UL) /*!< ETH INTERRUPT_ENABLE: ETE (Bit 10) */ +#define ETH_INTERRUPT_ENABLE_ETE_Msk (0x400UL) /*!< ETH INTERRUPT_ENABLE: ETE (Bitfield-Mask: 0x01) */ +#define ETH_INTERRUPT_ENABLE_FBE_Pos (13UL) /*!< ETH INTERRUPT_ENABLE: FBE (Bit 13) */ +#define ETH_INTERRUPT_ENABLE_FBE_Msk (0x2000UL) /*!< ETH INTERRUPT_ENABLE: FBE (Bitfield-Mask: 0x01) */ +#define ETH_INTERRUPT_ENABLE_ERE_Pos (14UL) /*!< ETH INTERRUPT_ENABLE: ERE (Bit 14) */ +#define ETH_INTERRUPT_ENABLE_ERE_Msk (0x4000UL) /*!< ETH INTERRUPT_ENABLE: ERE (Bitfield-Mask: 0x01) */ +#define ETH_INTERRUPT_ENABLE_AIE_Pos (15UL) /*!< ETH INTERRUPT_ENABLE: AIE (Bit 15) */ +#define ETH_INTERRUPT_ENABLE_AIE_Msk (0x8000UL) /*!< ETH INTERRUPT_ENABLE: AIE (Bitfield-Mask: 0x01) */ +#define ETH_INTERRUPT_ENABLE_NIE_Pos (16UL) /*!< ETH INTERRUPT_ENABLE: NIE (Bit 16) */ +#define ETH_INTERRUPT_ENABLE_NIE_Msk (0x10000UL) /*!< ETH INTERRUPT_ENABLE: NIE (Bitfield-Mask: 0x01) */ + +/* ---------------- ETH_MISSED_FRAME_AND_BUFFER_OVERFLOW_COUNTER ---------------- */ +#define ETH_MISSED_FRAME_AND_BUFFER_OVERFLOW_COUNTER_MISFRMCNT_Pos (0UL) /*!< ETH MISSED_FRAME_AND_BUFFER_OVERFLOW_COUNTER: MISFRMCNT (Bit 0) */ +#define ETH_MISSED_FRAME_AND_BUFFER_OVERFLOW_COUNTER_MISFRMCNT_Msk (0xffffUL) /*!< ETH MISSED_FRAME_AND_BUFFER_OVERFLOW_COUNTER: MISFRMCNT (Bitfield-Mask: 0xffff) */ +#define ETH_MISSED_FRAME_AND_BUFFER_OVERFLOW_COUNTER_MISCNTOVF_Pos (16UL) /*!< ETH MISSED_FRAME_AND_BUFFER_OVERFLOW_COUNTER: MISCNTOVF (Bit 16) */ +#define ETH_MISSED_FRAME_AND_BUFFER_OVERFLOW_COUNTER_MISCNTOVF_Msk (0x10000UL) /*!< ETH MISSED_FRAME_AND_BUFFER_OVERFLOW_COUNTER: MISCNTOVF (Bitfield-Mask: 0x01) */ +#define ETH_MISSED_FRAME_AND_BUFFER_OVERFLOW_COUNTER_OVFFRMCNT_Pos (17UL) /*!< ETH MISSED_FRAME_AND_BUFFER_OVERFLOW_COUNTER: OVFFRMCNT (Bit 17) */ +#define ETH_MISSED_FRAME_AND_BUFFER_OVERFLOW_COUNTER_OVFFRMCNT_Msk (0xffe0000UL) /*!< ETH MISSED_FRAME_AND_BUFFER_OVERFLOW_COUNTER: OVFFRMCNT (Bitfield-Mask: 0x7ff) */ +#define ETH_MISSED_FRAME_AND_BUFFER_OVERFLOW_COUNTER_OVFCNTOVF_Pos (28UL) /*!< ETH MISSED_FRAME_AND_BUFFER_OVERFLOW_COUNTER: OVFCNTOVF (Bit 28) */ +#define ETH_MISSED_FRAME_AND_BUFFER_OVERFLOW_COUNTER_OVFCNTOVF_Msk (0x10000000UL) /*!< ETH MISSED_FRAME_AND_BUFFER_OVERFLOW_COUNTER: OVFCNTOVF (Bitfield-Mask: 0x01) */ + +/* -------------------- ETH_RECEIVE_INTERRUPT_WATCHDOG_TIMER -------------------- */ +#define ETH_RECEIVE_INTERRUPT_WATCHDOG_TIMER_RIWT_Pos (0UL) /*!< ETH RECEIVE_INTERRUPT_WATCHDOG_TIMER: RIWT (Bit 0) */ +#define ETH_RECEIVE_INTERRUPT_WATCHDOG_TIMER_RIWT_Msk (0xffUL) /*!< ETH RECEIVE_INTERRUPT_WATCHDOG_TIMER: RIWT (Bitfield-Mask: 0xff) */ + +/* ------------------------------- ETH_AHB_STATUS ------------------------------- */ +#define ETH_AHB_STATUS_AHBMS_Pos (0UL) /*!< ETH AHB_STATUS: AHBMS (Bit 0) */ +#define ETH_AHB_STATUS_AHBMS_Msk (0x1UL) /*!< ETH AHB_STATUS: AHBMS (Bitfield-Mask: 0x01) */ + +/* -------------------- ETH_CURRENT_HOST_TRANSMIT_DESCRIPTOR -------------------- */ +#define ETH_CURRENT_HOST_TRANSMIT_DESCRIPTOR_CURTDESAPTR_Pos (0UL) /*!< ETH CURRENT_HOST_TRANSMIT_DESCRIPTOR: CURTDESAPTR (Bit 0) */ +#define ETH_CURRENT_HOST_TRANSMIT_DESCRIPTOR_CURTDESAPTR_Msk (0xffffffffUL) /*!< ETH CURRENT_HOST_TRANSMIT_DESCRIPTOR: CURTDESAPTR (Bitfield-Mask: 0xffffffff) */ + +/* --------------------- ETH_CURRENT_HOST_RECEIVE_DESCRIPTOR -------------------- */ +#define ETH_CURRENT_HOST_RECEIVE_DESCRIPTOR_CURRDESAPTR_Pos (0UL) /*!< ETH CURRENT_HOST_RECEIVE_DESCRIPTOR: CURRDESAPTR (Bit 0) */ +#define ETH_CURRENT_HOST_RECEIVE_DESCRIPTOR_CURRDESAPTR_Msk (0xffffffffUL) /*!< ETH CURRENT_HOST_RECEIVE_DESCRIPTOR: CURRDESAPTR (Bitfield-Mask: 0xffffffff) */ + +/* ------------------ ETH_CURRENT_HOST_TRANSMIT_BUFFER_ADDRESS ------------------ */ +#define ETH_CURRENT_HOST_TRANSMIT_BUFFER_ADDRESS_CURTBUFAPTR_Pos (0UL) /*!< ETH CURRENT_HOST_TRANSMIT_BUFFER_ADDRESS: CURTBUFAPTR (Bit 0) */ +#define ETH_CURRENT_HOST_TRANSMIT_BUFFER_ADDRESS_CURTBUFAPTR_Msk (0xffffffffUL) /*!< ETH CURRENT_HOST_TRANSMIT_BUFFER_ADDRESS: CURTBUFAPTR (Bitfield-Mask: 0xffffffff) */ + +/* ------------------- ETH_CURRENT_HOST_RECEIVE_BUFFER_ADDRESS ------------------ */ +#define ETH_CURRENT_HOST_RECEIVE_BUFFER_ADDRESS_CURRBUFAPTR_Pos (0UL) /*!< ETH CURRENT_HOST_RECEIVE_BUFFER_ADDRESS: CURRBUFAPTR (Bit 0) */ +#define ETH_CURRENT_HOST_RECEIVE_BUFFER_ADDRESS_CURRBUFAPTR_Msk (0xffffffffUL) /*!< ETH CURRENT_HOST_RECEIVE_BUFFER_ADDRESS: CURRBUFAPTR (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------------- ETH_HW_FEATURE ------------------------------- */ +#define ETH_HW_FEATURE_MIISEL_Pos (0UL) /*!< ETH HW_FEATURE: MIISEL (Bit 0) */ +#define ETH_HW_FEATURE_MIISEL_Msk (0x1UL) /*!< ETH HW_FEATURE: MIISEL (Bitfield-Mask: 0x01) */ +#define ETH_HW_FEATURE_GMIISEL_Pos (1UL) /*!< ETH HW_FEATURE: GMIISEL (Bit 1) */ +#define ETH_HW_FEATURE_GMIISEL_Msk (0x2UL) /*!< ETH HW_FEATURE: GMIISEL (Bitfield-Mask: 0x01) */ +#define ETH_HW_FEATURE_HDSEL_Pos (2UL) /*!< ETH HW_FEATURE: HDSEL (Bit 2) */ +#define ETH_HW_FEATURE_HDSEL_Msk (0x4UL) /*!< ETH HW_FEATURE: HDSEL (Bitfield-Mask: 0x01) */ +#define ETH_HW_FEATURE_EXTHASHEN_Pos (3UL) /*!< ETH HW_FEATURE: EXTHASHEN (Bit 3) */ +#define ETH_HW_FEATURE_EXTHASHEN_Msk (0x8UL) /*!< ETH HW_FEATURE: EXTHASHEN (Bitfield-Mask: 0x01) */ +#define ETH_HW_FEATURE_HASHSEL_Pos (4UL) /*!< ETH HW_FEATURE: HASHSEL (Bit 4) */ +#define ETH_HW_FEATURE_HASHSEL_Msk (0x10UL) /*!< ETH HW_FEATURE: HASHSEL (Bitfield-Mask: 0x01) */ +#define ETH_HW_FEATURE_ADDMACADRSEL_Pos (5UL) /*!< ETH HW_FEATURE: ADDMACADRSEL (Bit 5) */ +#define ETH_HW_FEATURE_ADDMACADRSEL_Msk (0x20UL) /*!< ETH HW_FEATURE: ADDMACADRSEL (Bitfield-Mask: 0x01) */ +#define ETH_HW_FEATURE_PCSSEL_Pos (6UL) /*!< ETH HW_FEATURE: PCSSEL (Bit 6) */ +#define ETH_HW_FEATURE_PCSSEL_Msk (0x40UL) /*!< ETH HW_FEATURE: PCSSEL (Bitfield-Mask: 0x01) */ +#define ETH_HW_FEATURE_L3L4FLTREN_Pos (7UL) /*!< ETH HW_FEATURE: L3L4FLTREN (Bit 7) */ +#define ETH_HW_FEATURE_L3L4FLTREN_Msk (0x80UL) /*!< ETH HW_FEATURE: L3L4FLTREN (Bitfield-Mask: 0x01) */ +#define ETH_HW_FEATURE_SMASEL_Pos (8UL) /*!< ETH HW_FEATURE: SMASEL (Bit 8) */ +#define ETH_HW_FEATURE_SMASEL_Msk (0x100UL) /*!< ETH HW_FEATURE: SMASEL (Bitfield-Mask: 0x01) */ +#define ETH_HW_FEATURE_RWKSEL_Pos (9UL) /*!< ETH HW_FEATURE: RWKSEL (Bit 9) */ +#define ETH_HW_FEATURE_RWKSEL_Msk (0x200UL) /*!< ETH HW_FEATURE: RWKSEL (Bitfield-Mask: 0x01) */ +#define ETH_HW_FEATURE_MGKSEL_Pos (10UL) /*!< ETH HW_FEATURE: MGKSEL (Bit 10) */ +#define ETH_HW_FEATURE_MGKSEL_Msk (0x400UL) /*!< ETH HW_FEATURE: MGKSEL (Bitfield-Mask: 0x01) */ +#define ETH_HW_FEATURE_MMCSEL_Pos (11UL) /*!< ETH HW_FEATURE: MMCSEL (Bit 11) */ +#define ETH_HW_FEATURE_MMCSEL_Msk (0x800UL) /*!< ETH HW_FEATURE: MMCSEL (Bitfield-Mask: 0x01) */ +#define ETH_HW_FEATURE_TSVER1SEL_Pos (12UL) /*!< ETH HW_FEATURE: TSVER1SEL (Bit 12) */ +#define ETH_HW_FEATURE_TSVER1SEL_Msk (0x1000UL) /*!< ETH HW_FEATURE: TSVER1SEL (Bitfield-Mask: 0x01) */ +#define ETH_HW_FEATURE_TSVER2SEL_Pos (13UL) /*!< ETH HW_FEATURE: TSVER2SEL (Bit 13) */ +#define ETH_HW_FEATURE_TSVER2SEL_Msk (0x2000UL) /*!< ETH HW_FEATURE: TSVER2SEL (Bitfield-Mask: 0x01) */ +#define ETH_HW_FEATURE_EEESEL_Pos (14UL) /*!< ETH HW_FEATURE: EEESEL (Bit 14) */ +#define ETH_HW_FEATURE_EEESEL_Msk (0x4000UL) /*!< ETH HW_FEATURE: EEESEL (Bitfield-Mask: 0x01) */ +#define ETH_HW_FEATURE_AVSEL_Pos (15UL) /*!< ETH HW_FEATURE: AVSEL (Bit 15) */ +#define ETH_HW_FEATURE_AVSEL_Msk (0x8000UL) /*!< ETH HW_FEATURE: AVSEL (Bitfield-Mask: 0x01) */ +#define ETH_HW_FEATURE_TXCOESEL_Pos (16UL) /*!< ETH HW_FEATURE: TXCOESEL (Bit 16) */ +#define ETH_HW_FEATURE_TXCOESEL_Msk (0x10000UL) /*!< ETH HW_FEATURE: TXCOESEL (Bitfield-Mask: 0x01) */ +#define ETH_HW_FEATURE_RXTYP1COE_Pos (17UL) /*!< ETH HW_FEATURE: RXTYP1COE (Bit 17) */ +#define ETH_HW_FEATURE_RXTYP1COE_Msk (0x20000UL) /*!< ETH HW_FEATURE: RXTYP1COE (Bitfield-Mask: 0x01) */ +#define ETH_HW_FEATURE_RXTYP2COE_Pos (18UL) /*!< ETH HW_FEATURE: RXTYP2COE (Bit 18) */ +#define ETH_HW_FEATURE_RXTYP2COE_Msk (0x40000UL) /*!< ETH HW_FEATURE: RXTYP2COE (Bitfield-Mask: 0x01) */ +#define ETH_HW_FEATURE_RXFIFOSIZE_Pos (19UL) /*!< ETH HW_FEATURE: RXFIFOSIZE (Bit 19) */ +#define ETH_HW_FEATURE_RXFIFOSIZE_Msk (0x80000UL) /*!< ETH HW_FEATURE: RXFIFOSIZE (Bitfield-Mask: 0x01) */ +#define ETH_HW_FEATURE_RXCHCNT_Pos (20UL) /*!< ETH HW_FEATURE: RXCHCNT (Bit 20) */ +#define ETH_HW_FEATURE_RXCHCNT_Msk (0x300000UL) /*!< ETH HW_FEATURE: RXCHCNT (Bitfield-Mask: 0x03) */ +#define ETH_HW_FEATURE_TXCHCNT_Pos (22UL) /*!< ETH HW_FEATURE: TXCHCNT (Bit 22) */ +#define ETH_HW_FEATURE_TXCHCNT_Msk (0xc00000UL) /*!< ETH HW_FEATURE: TXCHCNT (Bitfield-Mask: 0x03) */ +#define ETH_HW_FEATURE_ENHDESSEL_Pos (24UL) /*!< ETH HW_FEATURE: ENHDESSEL (Bit 24) */ +#define ETH_HW_FEATURE_ENHDESSEL_Msk (0x1000000UL) /*!< ETH HW_FEATURE: ENHDESSEL (Bitfield-Mask: 0x01) */ +#define ETH_HW_FEATURE_INTTSEN_Pos (25UL) /*!< ETH HW_FEATURE: INTTSEN (Bit 25) */ +#define ETH_HW_FEATURE_INTTSEN_Msk (0x2000000UL) /*!< ETH HW_FEATURE: INTTSEN (Bitfield-Mask: 0x01) */ +#define ETH_HW_FEATURE_FLEXIPPSEN_Pos (26UL) /*!< ETH HW_FEATURE: FLEXIPPSEN (Bit 26) */ +#define ETH_HW_FEATURE_FLEXIPPSEN_Msk (0x4000000UL) /*!< ETH HW_FEATURE: FLEXIPPSEN (Bitfield-Mask: 0x01) */ +#define ETH_HW_FEATURE_SAVLANINS_Pos (27UL) /*!< ETH HW_FEATURE: SAVLANINS (Bit 27) */ +#define ETH_HW_FEATURE_SAVLANINS_Msk (0x8000000UL) /*!< ETH HW_FEATURE: SAVLANINS (Bitfield-Mask: 0x01) */ +#define ETH_HW_FEATURE_ACTPHYIF_Pos (28UL) /*!< ETH HW_FEATURE: ACTPHYIF (Bit 28) */ +#define ETH_HW_FEATURE_ACTPHYIF_Msk (0x70000000UL) /*!< ETH HW_FEATURE: ACTPHYIF (Bitfield-Mask: 0x07) */ + + +/* ================================================================================ */ +/* ================ struct 'ECAT0_CON' Position & Mask ================ */ +/* ================================================================================ */ + + +/* -------------------------------- ECAT0_CON_CON ------------------------------- */ +#define ECAT0_CON_CON_ECATRSTEN_Pos (0UL) /*!< ECAT0_CON CON: ECATRSTEN (Bit 0) */ +#define ECAT0_CON_CON_ECATRSTEN_Msk (0x1UL) /*!< ECAT0_CON CON: ECATRSTEN (Bitfield-Mask: 0x01) */ +#define ECAT0_CON_CON_LATCHIN0SEL_Pos (8UL) /*!< ECAT0_CON CON: LATCHIN0SEL (Bit 8) */ +#define ECAT0_CON_CON_LATCHIN0SEL_Msk (0x300UL) /*!< ECAT0_CON CON: LATCHIN0SEL (Bitfield-Mask: 0x03) */ +#define ECAT0_CON_CON_LATCHIN0_Pos (11UL) /*!< ECAT0_CON CON: LATCHIN0 (Bit 11) */ +#define ECAT0_CON_CON_LATCHIN0_Msk (0x800UL) /*!< ECAT0_CON CON: LATCHIN0 (Bitfield-Mask: 0x01) */ +#define ECAT0_CON_CON_LATCHIN1SEL_Pos (12UL) /*!< ECAT0_CON CON: LATCHIN1SEL (Bit 12) */ +#define ECAT0_CON_CON_LATCHIN1SEL_Msk (0x3000UL) /*!< ECAT0_CON CON: LATCHIN1SEL (Bitfield-Mask: 0x03) */ +#define ECAT0_CON_CON_LATCHIN1_Pos (15UL) /*!< ECAT0_CON CON: LATCHIN1 (Bit 15) */ +#define ECAT0_CON_CON_LATCHIN1_Msk (0x8000UL) /*!< ECAT0_CON CON: LATCHIN1 (Bitfield-Mask: 0x01) */ +#define ECAT0_CON_CON_PHYOFFSET_Pos (16UL) /*!< ECAT0_CON CON: PHYOFFSET (Bit 16) */ +#define ECAT0_CON_CON_PHYOFFSET_Msk (0x1f0000UL) /*!< ECAT0_CON CON: PHYOFFSET (Bitfield-Mask: 0x1f) */ +#define ECAT0_CON_CON_MDIO_Pos (22UL) /*!< ECAT0_CON CON: MDIO (Bit 22) */ +#define ECAT0_CON_CON_MDIO_Msk (0xc00000UL) /*!< ECAT0_CON CON: MDIO (Bitfield-Mask: 0x03) */ + +/* ------------------------------- ECAT0_CON_CONP0 ------------------------------ */ +#define ECAT0_CON_CONP0_RXD0_Pos (0UL) /*!< ECAT0_CON CONP0: RXD0 (Bit 0) */ +#define ECAT0_CON_CONP0_RXD0_Msk (0x3UL) /*!< ECAT0_CON CONP0: RXD0 (Bitfield-Mask: 0x03) */ +#define ECAT0_CON_CONP0_RXD1_Pos (2UL) /*!< ECAT0_CON CONP0: RXD1 (Bit 2) */ +#define ECAT0_CON_CONP0_RXD1_Msk (0xcUL) /*!< ECAT0_CON CONP0: RXD1 (Bitfield-Mask: 0x03) */ +#define ECAT0_CON_CONP0_RXD2_Pos (4UL) /*!< ECAT0_CON CONP0: RXD2 (Bit 4) */ +#define ECAT0_CON_CONP0_RXD2_Msk (0x30UL) /*!< ECAT0_CON CONP0: RXD2 (Bitfield-Mask: 0x03) */ +#define ECAT0_CON_CONP0_RXD3_Pos (6UL) /*!< ECAT0_CON CONP0: RXD3 (Bit 6) */ +#define ECAT0_CON_CONP0_RXD3_Msk (0xc0UL) /*!< ECAT0_CON CONP0: RXD3 (Bitfield-Mask: 0x03) */ +#define ECAT0_CON_CONP0_RX_ERR_Pos (8UL) /*!< ECAT0_CON CONP0: RX_ERR (Bit 8) */ +#define ECAT0_CON_CONP0_RX_ERR_Msk (0x300UL) /*!< ECAT0_CON CONP0: RX_ERR (Bitfield-Mask: 0x03) */ +#define ECAT0_CON_CONP0_RX_DV_Pos (10UL) /*!< ECAT0_CON CONP0: RX_DV (Bit 10) */ +#define ECAT0_CON_CONP0_RX_DV_Msk (0xc00UL) /*!< ECAT0_CON CONP0: RX_DV (Bitfield-Mask: 0x03) */ +#define ECAT0_CON_CONP0_RX_CLK_Pos (12UL) /*!< ECAT0_CON CONP0: RX_CLK (Bit 12) */ +#define ECAT0_CON_CONP0_RX_CLK_Msk (0x3000UL) /*!< ECAT0_CON CONP0: RX_CLK (Bitfield-Mask: 0x03) */ +#define ECAT0_CON_CONP0_LINK_Pos (16UL) /*!< ECAT0_CON CONP0: LINK (Bit 16) */ +#define ECAT0_CON_CONP0_LINK_Msk (0x30000UL) /*!< ECAT0_CON CONP0: LINK (Bitfield-Mask: 0x03) */ +#define ECAT0_CON_CONP0_TX_CLK_Pos (28UL) /*!< ECAT0_CON CONP0: TX_CLK (Bit 28) */ +#define ECAT0_CON_CONP0_TX_CLK_Msk (0x30000000UL) /*!< ECAT0_CON CONP0: TX_CLK (Bitfield-Mask: 0x03) */ +#define ECAT0_CON_CONP0_TX_SHIFT_Pos (30UL) /*!< ECAT0_CON CONP0: TX_SHIFT (Bit 30) */ +#define ECAT0_CON_CONP0_TX_SHIFT_Msk (0xc0000000UL) /*!< ECAT0_CON CONP0: TX_SHIFT (Bitfield-Mask: 0x03) */ + +/* ------------------------------- ECAT0_CON_CONP1 ------------------------------ */ +#define ECAT0_CON_CONP1_RXD0_Pos (0UL) /*!< ECAT0_CON CONP1: RXD0 (Bit 0) */ +#define ECAT0_CON_CONP1_RXD0_Msk (0x3UL) /*!< ECAT0_CON CONP1: RXD0 (Bitfield-Mask: 0x03) */ +#define ECAT0_CON_CONP1_RXD1_Pos (2UL) /*!< ECAT0_CON CONP1: RXD1 (Bit 2) */ +#define ECAT0_CON_CONP1_RXD1_Msk (0xcUL) /*!< ECAT0_CON CONP1: RXD1 (Bitfield-Mask: 0x03) */ +#define ECAT0_CON_CONP1_RXD2_Pos (4UL) /*!< ECAT0_CON CONP1: RXD2 (Bit 4) */ +#define ECAT0_CON_CONP1_RXD2_Msk (0x30UL) /*!< ECAT0_CON CONP1: RXD2 (Bitfield-Mask: 0x03) */ +#define ECAT0_CON_CONP1_RXD3_Pos (6UL) /*!< ECAT0_CON CONP1: RXD3 (Bit 6) */ +#define ECAT0_CON_CONP1_RXD3_Msk (0xc0UL) /*!< ECAT0_CON CONP1: RXD3 (Bitfield-Mask: 0x03) */ +#define ECAT0_CON_CONP1_RX_ERR_Pos (8UL) /*!< ECAT0_CON CONP1: RX_ERR (Bit 8) */ +#define ECAT0_CON_CONP1_RX_ERR_Msk (0x300UL) /*!< ECAT0_CON CONP1: RX_ERR (Bitfield-Mask: 0x03) */ +#define ECAT0_CON_CONP1_RX_DV_Pos (10UL) /*!< ECAT0_CON CONP1: RX_DV (Bit 10) */ +#define ECAT0_CON_CONP1_RX_DV_Msk (0xc00UL) /*!< ECAT0_CON CONP1: RX_DV (Bitfield-Mask: 0x03) */ +#define ECAT0_CON_CONP1_RX_CLK_Pos (12UL) /*!< ECAT0_CON CONP1: RX_CLK (Bit 12) */ +#define ECAT0_CON_CONP1_RX_CLK_Msk (0x3000UL) /*!< ECAT0_CON CONP1: RX_CLK (Bitfield-Mask: 0x03) */ +#define ECAT0_CON_CONP1_LINK_Pos (16UL) /*!< ECAT0_CON CONP1: LINK (Bit 16) */ +#define ECAT0_CON_CONP1_LINK_Msk (0x30000UL) /*!< ECAT0_CON CONP1: LINK (Bitfield-Mask: 0x03) */ +#define ECAT0_CON_CONP1_TX_CLK_Pos (28UL) /*!< ECAT0_CON CONP1: TX_CLK (Bit 28) */ +#define ECAT0_CON_CONP1_TX_CLK_Msk (0x30000000UL) /*!< ECAT0_CON CONP1: TX_CLK (Bitfield-Mask: 0x03) */ +#define ECAT0_CON_CONP1_TX_SHIFT_Pos (30UL) /*!< ECAT0_CON CONP1: TX_SHIFT (Bit 30) */ +#define ECAT0_CON_CONP1_TX_SHIFT_Msk (0xc0000000UL) /*!< ECAT0_CON CONP1: TX_SHIFT (Bitfield-Mask: 0x03) */ + + +/* ================================================================================ */ +/* ================ Group 'ECAT' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ---------------------------------- ECAT_TYPE --------------------------------- */ +#define ECAT_TYPE_Type_Pos (0UL) /*!< ECAT TYPE: Type (Bit 0) */ +#define ECAT_TYPE_Type_Msk (0xffUL) /*!< ECAT TYPE: Type (Bitfield-Mask: 0xff) */ + +/* -------------------------------- ECAT_REVISION ------------------------------- */ +#define ECAT_REVISION_Revision_Pos (0UL) /*!< ECAT REVISION: Revision (Bit 0) */ +#define ECAT_REVISION_Revision_Msk (0xffUL) /*!< ECAT REVISION: Revision (Bitfield-Mask: 0xff) */ + +/* --------------------------------- ECAT_BUILD --------------------------------- */ +#define ECAT_BUILD_BUILD_Pos (0UL) /*!< ECAT BUILD: BUILD (Bit 0) */ +#define ECAT_BUILD_BUILD_Msk (0xffffUL) /*!< ECAT BUILD: BUILD (Bitfield-Mask: 0xffff) */ + +/* -------------------------------- ECAT_FMMU_NUM ------------------------------- */ +#define ECAT_FMMU_NUM_NUM_FMMU_Pos (0UL) /*!< ECAT FMMU_NUM: NUM_FMMU (Bit 0) */ +#define ECAT_FMMU_NUM_NUM_FMMU_Msk (0xffUL) /*!< ECAT FMMU_NUM: NUM_FMMU (Bitfield-Mask: 0xff) */ + +/* ------------------------------ ECAT_SYNC_MANAGER ----------------------------- */ +#define ECAT_SYNC_MANAGER_NUM_SM_Pos (0UL) /*!< ECAT SYNC_MANAGER: NUM_SM (Bit 0) */ +#define ECAT_SYNC_MANAGER_NUM_SM_Msk (0xffUL) /*!< ECAT SYNC_MANAGER: NUM_SM (Bitfield-Mask: 0xff) */ + +/* -------------------------------- ECAT_RAM_SIZE ------------------------------- */ +#define ECAT_RAM_SIZE_RAM_Size_Pos (0UL) /*!< ECAT RAM_SIZE: RAM_Size (Bit 0) */ +#define ECAT_RAM_SIZE_RAM_Size_Msk (0xffUL) /*!< ECAT RAM_SIZE: RAM_Size (Bitfield-Mask: 0xff) */ + +/* ------------------------------- ECAT_PORT_DESC ------------------------------- */ +#define ECAT_PORT_DESC_Port0_Pos (0UL) /*!< ECAT PORT_DESC: Port0 (Bit 0) */ +#define ECAT_PORT_DESC_Port0_Msk (0x3UL) /*!< ECAT PORT_DESC: Port0 (Bitfield-Mask: 0x03) */ +#define ECAT_PORT_DESC_Port1_Pos (2UL) /*!< ECAT PORT_DESC: Port1 (Bit 2) */ +#define ECAT_PORT_DESC_Port1_Msk (0xcUL) /*!< ECAT PORT_DESC: Port1 (Bitfield-Mask: 0x03) */ +#define ECAT_PORT_DESC_Port2_Pos (4UL) /*!< ECAT PORT_DESC: Port2 (Bit 4) */ +#define ECAT_PORT_DESC_Port2_Msk (0x30UL) /*!< ECAT PORT_DESC: Port2 (Bitfield-Mask: 0x03) */ +#define ECAT_PORT_DESC_Port3_Pos (6UL) /*!< ECAT PORT_DESC: Port3 (Bit 6) */ +#define ECAT_PORT_DESC_Port3_Msk (0xc0UL) /*!< ECAT PORT_DESC: Port3 (Bitfield-Mask: 0x03) */ + +/* -------------------------------- ECAT_FEATURE -------------------------------- */ +#define ECAT_FEATURE_FMMU_Pos (0UL) /*!< ECAT FEATURE: FMMU (Bit 0) */ +#define ECAT_FEATURE_FMMU_Msk (0x1UL) /*!< ECAT FEATURE: FMMU (Bitfield-Mask: 0x01) */ +#define ECAT_FEATURE_CLKS_Pos (2UL) /*!< ECAT FEATURE: CLKS (Bit 2) */ +#define ECAT_FEATURE_CLKS_Msk (0x4UL) /*!< ECAT FEATURE: CLKS (Bitfield-Mask: 0x01) */ +#define ECAT_FEATURE_CLKS_W_Pos (3UL) /*!< ECAT FEATURE: CLKS_W (Bit 3) */ +#define ECAT_FEATURE_CLKS_W_Msk (0x8UL) /*!< ECAT FEATURE: CLKS_W (Bitfield-Mask: 0x01) */ +#define ECAT_FEATURE_LJ_EBUS_Pos (4UL) /*!< ECAT FEATURE: LJ_EBUS (Bit 4) */ +#define ECAT_FEATURE_LJ_EBUS_Msk (0x10UL) /*!< ECAT FEATURE: LJ_EBUS (Bitfield-Mask: 0x01) */ +#define ECAT_FEATURE_ELD_EBUS_Pos (5UL) /*!< ECAT FEATURE: ELD_EBUS (Bit 5) */ +#define ECAT_FEATURE_ELD_EBUS_Msk (0x20UL) /*!< ECAT FEATURE: ELD_EBUS (Bitfield-Mask: 0x01) */ +#define ECAT_FEATURE_ELD_MII_Pos (6UL) /*!< ECAT FEATURE: ELD_MII (Bit 6) */ +#define ECAT_FEATURE_ELD_MII_Msk (0x40UL) /*!< ECAT FEATURE: ELD_MII (Bitfield-Mask: 0x01) */ +#define ECAT_FEATURE_SH_FCSE_Pos (7UL) /*!< ECAT FEATURE: SH_FCSE (Bit 7) */ +#define ECAT_FEATURE_SH_FCSE_Msk (0x80UL) /*!< ECAT FEATURE: SH_FCSE (Bitfield-Mask: 0x01) */ +#define ECAT_FEATURE_EDC_SYNCA_Pos (8UL) /*!< ECAT FEATURE: EDC_SYNCA (Bit 8) */ +#define ECAT_FEATURE_EDC_SYNCA_Msk (0x100UL) /*!< ECAT FEATURE: EDC_SYNCA (Bitfield-Mask: 0x01) */ +#define ECAT_FEATURE_LRW_CS_Pos (9UL) /*!< ECAT FEATURE: LRW_CS (Bit 9) */ +#define ECAT_FEATURE_LRW_CS_Msk (0x200UL) /*!< ECAT FEATURE: LRW_CS (Bitfield-Mask: 0x01) */ +#define ECAT_FEATURE_RW_CS_Pos (10UL) /*!< ECAT FEATURE: RW_CS (Bit 10) */ +#define ECAT_FEATURE_RW_CS_Msk (0x400UL) /*!< ECAT FEATURE: RW_CS (Bitfield-Mask: 0x01) */ +#define ECAT_FEATURE_FX_CONF_Pos (11UL) /*!< ECAT FEATURE: FX_CONF (Bit 11) */ +#define ECAT_FEATURE_FX_CONF_Msk (0x800UL) /*!< ECAT FEATURE: FX_CONF (Bitfield-Mask: 0x01) */ + +/* ------------------------------ ECAT_STATION_ADR ------------------------------ */ +#define ECAT_STATION_ADR_NODE_ADDR_Pos (0UL) /*!< ECAT STATION_ADR: NODE_ADDR (Bit 0) */ +#define ECAT_STATION_ADR_NODE_ADDR_Msk (0xffffUL) /*!< ECAT STATION_ADR: NODE_ADDR (Bitfield-Mask: 0xffff) */ + +/* ----------------------------- ECAT_STATION_ALIAS ----------------------------- */ +#define ECAT_STATION_ALIAS_ALIAS_ADDR_Pos (0UL) /*!< ECAT STATION_ALIAS: ALIAS_ADDR (Bit 0) */ +#define ECAT_STATION_ALIAS_ALIAS_ADDR_Msk (0xffffUL) /*!< ECAT STATION_ALIAS: ALIAS_ADDR (Bitfield-Mask: 0xffff) */ + +/* ----------------------------- ECAT_WR_REG_ENABLE ----------------------------- */ +#define ECAT_WR_REG_ENABLE_WR_REG_EN_Pos (0UL) /*!< ECAT WR_REG_ENABLE: WR_REG_EN (Bit 0) */ +#define ECAT_WR_REG_ENABLE_WR_REG_EN_Msk (0x1UL) /*!< ECAT WR_REG_ENABLE: WR_REG_EN (Bitfield-Mask: 0x01) */ + +/* ----------------------------- ECAT_WR_REG_PROTECT ---------------------------- */ +#define ECAT_WR_REG_PROTECT_WR_REG_P_Pos (0UL) /*!< ECAT WR_REG_PROTECT: WR_REG_P (Bit 0) */ +#define ECAT_WR_REG_PROTECT_WR_REG_P_Msk (0x1UL) /*!< ECAT WR_REG_PROTECT: WR_REG_P (Bitfield-Mask: 0x01) */ + +/* ----------------------------- ECAT_ESC_WR_ENABLE ----------------------------- */ +#define ECAT_ESC_WR_ENABLE_ESC_WR_PROT_Pos (0UL) /*!< ECAT ESC_WR_ENABLE: ESC_WR_PROT (Bit 0) */ +#define ECAT_ESC_WR_ENABLE_ESC_WR_PROT_Msk (0x1UL) /*!< ECAT ESC_WR_ENABLE: ESC_WR_PROT (Bitfield-Mask: 0x01) */ + +/* ----------------------------- ECAT_ESC_WR_PROTECT ---------------------------- */ +#define ECAT_ESC_WR_PROTECT_ESC_WR_PROT_Pos (0UL) /*!< ECAT ESC_WR_PROTECT: ESC_WR_PROT (Bit 0) */ +#define ECAT_ESC_WR_PROTECT_ESC_WR_PROT_Msk (0x1UL) /*!< ECAT ESC_WR_PROTECT: ESC_WR_PROT (Bitfield-Mask: 0x01) */ + +/* ----------------------------- ECAT_ESC_RESET_ECAT ---------------------------- */ +#define ECAT_ESC_RESET_ECAT_RESET_CMD_WRITEMode_Pos (0UL) /*!< ECAT ESC_RESET_ECAT: RESET_CMD_WRITEMode (Bit 0) */ +#define ECAT_ESC_RESET_ECAT_RESET_CMD_WRITEMode_Msk (0xffUL) /*!< ECAT ESC_RESET_ECAT: RESET_CMD_WRITEMode (Bitfield-Mask: 0xff) */ + +/* ----------------------------- ECAT_ESC_RESET_ECAT ---------------------------- */ +#define ECAT_ESC_RESET_ECAT_RESET_CMD_STATE_READMode_Pos (0UL) /*!< ECAT ESC_RESET_ECAT: RESET_CMD_STATE_READMode (Bit 0) */ +#define ECAT_ESC_RESET_ECAT_RESET_CMD_STATE_READMode_Msk (0x3UL) /*!< ECAT ESC_RESET_ECAT: RESET_CMD_STATE_READMode (Bitfield-Mask: 0x03) */ + +/* ----------------------------- ECAT_ESC_RESET_PDI ----------------------------- */ +#define ECAT_ESC_RESET_PDI_RESET_CMD_WRITEMode_Pos (0UL) /*!< ECAT ESC_RESET_PDI: RESET_CMD_WRITEMode (Bit 0) */ +#define ECAT_ESC_RESET_PDI_RESET_CMD_WRITEMode_Msk (0xffUL) /*!< ECAT ESC_RESET_PDI: RESET_CMD_WRITEMode (Bitfield-Mask: 0xff) */ + +/* ----------------------------- ECAT_ESC_RESET_PDI ----------------------------- */ +#define ECAT_ESC_RESET_PDI_RESET_CMD_STATE_READMode_Pos (0UL) /*!< ECAT ESC_RESET_PDI: RESET_CMD_STATE_READMode (Bit 0) */ +#define ECAT_ESC_RESET_PDI_RESET_CMD_STATE_READMode_Msk (0x3UL) /*!< ECAT ESC_RESET_PDI: RESET_CMD_STATE_READMode (Bitfield-Mask: 0x03) */ + +/* ----------------------------- ECAT_ESC_DL_CONTROL ---------------------------- */ +#define ECAT_ESC_DL_CONTROL_FR_Pos (0UL) /*!< ECAT ESC_DL_CONTROL: FR (Bit 0) */ +#define ECAT_ESC_DL_CONTROL_FR_Msk (0x1UL) /*!< ECAT ESC_DL_CONTROL: FR (Bitfield-Mask: 0x01) */ +#define ECAT_ESC_DL_CONTROL_TEMP_Pos (1UL) /*!< ECAT ESC_DL_CONTROL: TEMP (Bit 1) */ +#define ECAT_ESC_DL_CONTROL_TEMP_Msk (0x2UL) /*!< ECAT ESC_DL_CONTROL: TEMP (Bitfield-Mask: 0x01) */ +#define ECAT_ESC_DL_CONTROL_LP0_Pos (8UL) /*!< ECAT ESC_DL_CONTROL: LP0 (Bit 8) */ +#define ECAT_ESC_DL_CONTROL_LP0_Msk (0x300UL) /*!< ECAT ESC_DL_CONTROL: LP0 (Bitfield-Mask: 0x03) */ +#define ECAT_ESC_DL_CONTROL_LP1_Pos (10UL) /*!< ECAT ESC_DL_CONTROL: LP1 (Bit 10) */ +#define ECAT_ESC_DL_CONTROL_LP1_Msk (0xc00UL) /*!< ECAT ESC_DL_CONTROL: LP1 (Bitfield-Mask: 0x03) */ +#define ECAT_ESC_DL_CONTROL_LP2_Pos (12UL) /*!< ECAT ESC_DL_CONTROL: LP2 (Bit 12) */ +#define ECAT_ESC_DL_CONTROL_LP2_Msk (0x3000UL) /*!< ECAT ESC_DL_CONTROL: LP2 (Bitfield-Mask: 0x03) */ +#define ECAT_ESC_DL_CONTROL_LP3_Pos (14UL) /*!< ECAT ESC_DL_CONTROL: LP3 (Bit 14) */ +#define ECAT_ESC_DL_CONTROL_LP3_Msk (0xc000UL) /*!< ECAT ESC_DL_CONTROL: LP3 (Bitfield-Mask: 0x03) */ +#define ECAT_ESC_DL_CONTROL_RX_FIFO_SIZE_Pos (16UL) /*!< ECAT ESC_DL_CONTROL: RX_FIFO_SIZE (Bit 16) */ +#define ECAT_ESC_DL_CONTROL_RX_FIFO_SIZE_Msk (0x70000UL) /*!< ECAT ESC_DL_CONTROL: RX_FIFO_SIZE (Bitfield-Mask: 0x07) */ +#define ECAT_ESC_DL_CONTROL_LJ_Pos (19UL) /*!< ECAT ESC_DL_CONTROL: LJ (Bit 19) */ +#define ECAT_ESC_DL_CONTROL_LJ_Msk (0x80000UL) /*!< ECAT ESC_DL_CONTROL: LJ (Bitfield-Mask: 0x01) */ +#define ECAT_ESC_DL_CONTROL_RLD_ST_Pos (22UL) /*!< ECAT ESC_DL_CONTROL: RLD_ST (Bit 22) */ +#define ECAT_ESC_DL_CONTROL_RLD_ST_Msk (0x400000UL) /*!< ECAT ESC_DL_CONTROL: RLD_ST (Bitfield-Mask: 0x01) */ +#define ECAT_ESC_DL_CONTROL_S_ALIAS_Pos (24UL) /*!< ECAT ESC_DL_CONTROL: S_ALIAS (Bit 24) */ +#define ECAT_ESC_DL_CONTROL_S_ALIAS_Msk (0x1000000UL) /*!< ECAT ESC_DL_CONTROL: S_ALIAS (Bitfield-Mask: 0x01) */ + +/* --------------------------- ECAT_PHYSICAL_RW_OFFSET -------------------------- */ +#define ECAT_PHYSICAL_RW_OFFSET_OFFSET_Pos (0UL) /*!< ECAT PHYSICAL_RW_OFFSET: OFFSET (Bit 0) */ +#define ECAT_PHYSICAL_RW_OFFSET_OFFSET_Msk (0xffffUL) /*!< ECAT PHYSICAL_RW_OFFSET: OFFSET (Bitfield-Mask: 0xffff) */ + +/* ----------------------------- ECAT_ESC_DL_STATUS ----------------------------- */ +#define ECAT_ESC_DL_STATUS_PDI_EEPROM_Pos (0UL) /*!< ECAT ESC_DL_STATUS: PDI_EEPROM (Bit 0) */ +#define ECAT_ESC_DL_STATUS_PDI_EEPROM_Msk (0x1UL) /*!< ECAT ESC_DL_STATUS: PDI_EEPROM (Bitfield-Mask: 0x01) */ +#define ECAT_ESC_DL_STATUS_PDI_WDT_S_Pos (1UL) /*!< ECAT ESC_DL_STATUS: PDI_WDT_S (Bit 1) */ +#define ECAT_ESC_DL_STATUS_PDI_WDT_S_Msk (0x2UL) /*!< ECAT ESC_DL_STATUS: PDI_WDT_S (Bitfield-Mask: 0x01) */ +#define ECAT_ESC_DL_STATUS_ELD_Pos (2UL) /*!< ECAT ESC_DL_STATUS: ELD (Bit 2) */ +#define ECAT_ESC_DL_STATUS_ELD_Msk (0x4UL) /*!< ECAT ESC_DL_STATUS: ELD (Bitfield-Mask: 0x01) */ +#define ECAT_ESC_DL_STATUS_LINK_P0_Pos (4UL) /*!< ECAT ESC_DL_STATUS: LINK_P0 (Bit 4) */ +#define ECAT_ESC_DL_STATUS_LINK_P0_Msk (0x10UL) /*!< ECAT ESC_DL_STATUS: LINK_P0 (Bitfield-Mask: 0x01) */ +#define ECAT_ESC_DL_STATUS_LINK_P1_Pos (5UL) /*!< ECAT ESC_DL_STATUS: LINK_P1 (Bit 5) */ +#define ECAT_ESC_DL_STATUS_LINK_P1_Msk (0x20UL) /*!< ECAT ESC_DL_STATUS: LINK_P1 (Bitfield-Mask: 0x01) */ +#define ECAT_ESC_DL_STATUS_LINK_P2_Pos (6UL) /*!< ECAT ESC_DL_STATUS: LINK_P2 (Bit 6) */ +#define ECAT_ESC_DL_STATUS_LINK_P2_Msk (0x40UL) /*!< ECAT ESC_DL_STATUS: LINK_P2 (Bitfield-Mask: 0x01) */ +#define ECAT_ESC_DL_STATUS_LINK_P3_Pos (7UL) /*!< ECAT ESC_DL_STATUS: LINK_P3 (Bit 7) */ +#define ECAT_ESC_DL_STATUS_LINK_P3_Msk (0x80UL) /*!< ECAT ESC_DL_STATUS: LINK_P3 (Bitfield-Mask: 0x01) */ +#define ECAT_ESC_DL_STATUS_LP0_Pos (8UL) /*!< ECAT ESC_DL_STATUS: LP0 (Bit 8) */ +#define ECAT_ESC_DL_STATUS_LP0_Msk (0x100UL) /*!< ECAT ESC_DL_STATUS: LP0 (Bitfield-Mask: 0x01) */ +#define ECAT_ESC_DL_STATUS_COM_P0_Pos (9UL) /*!< ECAT ESC_DL_STATUS: COM_P0 (Bit 9) */ +#define ECAT_ESC_DL_STATUS_COM_P0_Msk (0x200UL) /*!< ECAT ESC_DL_STATUS: COM_P0 (Bitfield-Mask: 0x01) */ +#define ECAT_ESC_DL_STATUS_LP1_Pos (10UL) /*!< ECAT ESC_DL_STATUS: LP1 (Bit 10) */ +#define ECAT_ESC_DL_STATUS_LP1_Msk (0x400UL) /*!< ECAT ESC_DL_STATUS: LP1 (Bitfield-Mask: 0x01) */ +#define ECAT_ESC_DL_STATUS_COM_P1_Pos (11UL) /*!< ECAT ESC_DL_STATUS: COM_P1 (Bit 11) */ +#define ECAT_ESC_DL_STATUS_COM_P1_Msk (0x800UL) /*!< ECAT ESC_DL_STATUS: COM_P1 (Bitfield-Mask: 0x01) */ +#define ECAT_ESC_DL_STATUS_LP2_Pos (12UL) /*!< ECAT ESC_DL_STATUS: LP2 (Bit 12) */ +#define ECAT_ESC_DL_STATUS_LP2_Msk (0x1000UL) /*!< ECAT ESC_DL_STATUS: LP2 (Bitfield-Mask: 0x01) */ +#define ECAT_ESC_DL_STATUS_COM_P2_Pos (13UL) /*!< ECAT ESC_DL_STATUS: COM_P2 (Bit 13) */ +#define ECAT_ESC_DL_STATUS_COM_P2_Msk (0x2000UL) /*!< ECAT ESC_DL_STATUS: COM_P2 (Bitfield-Mask: 0x01) */ +#define ECAT_ESC_DL_STATUS_LP3_Pos (14UL) /*!< ECAT ESC_DL_STATUS: LP3 (Bit 14) */ +#define ECAT_ESC_DL_STATUS_LP3_Msk (0x4000UL) /*!< ECAT ESC_DL_STATUS: LP3 (Bitfield-Mask: 0x01) */ +#define ECAT_ESC_DL_STATUS_COM_P3_Pos (15UL) /*!< ECAT ESC_DL_STATUS: COM_P3 (Bit 15) */ +#define ECAT_ESC_DL_STATUS_COM_P3_Msk (0x8000UL) /*!< ECAT ESC_DL_STATUS: COM_P3 (Bitfield-Mask: 0x01) */ + +/* ------------------------------- ECAT_AL_CONTROL ------------------------------ */ +#define ECAT_AL_CONTROL_IST_Pos (0UL) /*!< ECAT AL_CONTROL: IST (Bit 0) */ +#define ECAT_AL_CONTROL_IST_Msk (0xfUL) /*!< ECAT AL_CONTROL: IST (Bitfield-Mask: 0x0f) */ +#define ECAT_AL_CONTROL_EIA_Pos (4UL) /*!< ECAT AL_CONTROL: EIA (Bit 4) */ +#define ECAT_AL_CONTROL_EIA_Msk (0x10UL) /*!< ECAT AL_CONTROL: EIA (Bitfield-Mask: 0x01) */ +#define ECAT_AL_CONTROL_DID_Pos (5UL) /*!< ECAT AL_CONTROL: DID (Bit 5) */ +#define ECAT_AL_CONTROL_DID_Msk (0x20UL) /*!< ECAT AL_CONTROL: DID (Bitfield-Mask: 0x01) */ + +/* ------------------------------- ECAT_AL_STATUS ------------------------------- */ +#define ECAT_AL_STATUS_STATE_Pos (0UL) /*!< ECAT AL_STATUS: STATE (Bit 0) */ +#define ECAT_AL_STATUS_STATE_Msk (0xfUL) /*!< ECAT AL_STATUS: STATE (Bitfield-Mask: 0x0f) */ +#define ECAT_AL_STATUS_ERRI_Pos (4UL) /*!< ECAT AL_STATUS: ERRI (Bit 4) */ +#define ECAT_AL_STATUS_ERRI_Msk (0x10UL) /*!< ECAT AL_STATUS: ERRI (Bitfield-Mask: 0x01) */ +#define ECAT_AL_STATUS_DID_Pos (5UL) /*!< ECAT AL_STATUS: DID (Bit 5) */ +#define ECAT_AL_STATUS_DID_Msk (0x20UL) /*!< ECAT AL_STATUS: DID (Bitfield-Mask: 0x01) */ + +/* ----------------------------- ECAT_AL_STATUS_CODE ---------------------------- */ +#define ECAT_AL_STATUS_CODE_AL_S_CODE_Pos (0UL) /*!< ECAT AL_STATUS_CODE: AL_S_CODE (Bit 0) */ +#define ECAT_AL_STATUS_CODE_AL_S_CODE_Msk (0xffffUL) /*!< ECAT AL_STATUS_CODE: AL_S_CODE (Bitfield-Mask: 0xffff) */ + +/* -------------------------------- ECAT_RUN_LED -------------------------------- */ +#define ECAT_RUN_LED_LED_CODE_Pos (0UL) /*!< ECAT RUN_LED: LED_CODE (Bit 0) */ +#define ECAT_RUN_LED_LED_CODE_Msk (0xfUL) /*!< ECAT RUN_LED: LED_CODE (Bitfield-Mask: 0x0f) */ +#define ECAT_RUN_LED_EN_OVERR_Pos (4UL) /*!< ECAT RUN_LED: EN_OVERR (Bit 4) */ +#define ECAT_RUN_LED_EN_OVERR_Msk (0x10UL) /*!< ECAT RUN_LED: EN_OVERR (Bitfield-Mask: 0x01) */ + +/* -------------------------------- ECAT_ERR_LED -------------------------------- */ +#define ECAT_ERR_LED_LED_CODE_Pos (0UL) /*!< ECAT ERR_LED: LED_CODE (Bit 0) */ +#define ECAT_ERR_LED_LED_CODE_Msk (0xfUL) /*!< ECAT ERR_LED: LED_CODE (Bitfield-Mask: 0x0f) */ +#define ECAT_ERR_LED_EN_OVERR_Pos (4UL) /*!< ECAT ERR_LED: EN_OVERR (Bit 4) */ +#define ECAT_ERR_LED_EN_OVERR_Msk (0x10UL) /*!< ECAT ERR_LED: EN_OVERR (Bitfield-Mask: 0x01) */ + +/* ------------------------------ ECAT_PDI_CONTROL ------------------------------ */ +#define ECAT_PDI_CONTROL_PDI_Pos (0UL) /*!< ECAT PDI_CONTROL: PDI (Bit 0) */ +#define ECAT_PDI_CONTROL_PDI_Msk (0xffUL) /*!< ECAT PDI_CONTROL: PDI (Bitfield-Mask: 0xff) */ + +/* ------------------------------- ECAT_ESC_CONFIG ------------------------------ */ +#define ECAT_ESC_CONFIG_EMUL_Pos (0UL) /*!< ECAT ESC_CONFIG: EMUL (Bit 0) */ +#define ECAT_ESC_CONFIG_EMUL_Msk (0x1UL) /*!< ECAT ESC_CONFIG: EMUL (Bitfield-Mask: 0x01) */ +#define ECAT_ESC_CONFIG_EHLD_Pos (1UL) /*!< ECAT ESC_CONFIG: EHLD (Bit 1) */ +#define ECAT_ESC_CONFIG_EHLD_Msk (0x2UL) /*!< ECAT ESC_CONFIG: EHLD (Bitfield-Mask: 0x01) */ +#define ECAT_ESC_CONFIG_CLKS_OUT_Pos (2UL) /*!< ECAT ESC_CONFIG: CLKS_OUT (Bit 2) */ +#define ECAT_ESC_CONFIG_CLKS_OUT_Msk (0x4UL) /*!< ECAT ESC_CONFIG: CLKS_OUT (Bitfield-Mask: 0x01) */ +#define ECAT_ESC_CONFIG_CLKS_IN_Pos (3UL) /*!< ECAT ESC_CONFIG: CLKS_IN (Bit 3) */ +#define ECAT_ESC_CONFIG_CLKS_IN_Msk (0x8UL) /*!< ECAT ESC_CONFIG: CLKS_IN (Bitfield-Mask: 0x01) */ +#define ECAT_ESC_CONFIG_EHLD_P0_Pos (4UL) /*!< ECAT ESC_CONFIG: EHLD_P0 (Bit 4) */ +#define ECAT_ESC_CONFIG_EHLD_P0_Msk (0x10UL) /*!< ECAT ESC_CONFIG: EHLD_P0 (Bitfield-Mask: 0x01) */ +#define ECAT_ESC_CONFIG_EHLD_P1_Pos (5UL) /*!< ECAT ESC_CONFIG: EHLD_P1 (Bit 5) */ +#define ECAT_ESC_CONFIG_EHLD_P1_Msk (0x20UL) /*!< ECAT ESC_CONFIG: EHLD_P1 (Bitfield-Mask: 0x01) */ +#define ECAT_ESC_CONFIG_EHLD_P2_Pos (6UL) /*!< ECAT ESC_CONFIG: EHLD_P2 (Bit 6) */ +#define ECAT_ESC_CONFIG_EHLD_P2_Msk (0x40UL) /*!< ECAT ESC_CONFIG: EHLD_P2 (Bitfield-Mask: 0x01) */ +#define ECAT_ESC_CONFIG_EHLD_P3_Pos (7UL) /*!< ECAT ESC_CONFIG: EHLD_P3 (Bit 7) */ +#define ECAT_ESC_CONFIG_EHLD_P3_Msk (0x80UL) /*!< ECAT ESC_CONFIG: EHLD_P3 (Bitfield-Mask: 0x01) */ + +/* ------------------------------- ECAT_PDI_CONFIG ------------------------------ */ +#define ECAT_PDI_CONFIG_BUS_CLK_Pos (0UL) /*!< ECAT PDI_CONFIG: BUS_CLK (Bit 0) */ +#define ECAT_PDI_CONFIG_BUS_CLK_Msk (0x1fUL) /*!< ECAT PDI_CONFIG: BUS_CLK (Bitfield-Mask: 0x1f) */ +#define ECAT_PDI_CONFIG_OC_BUS_Pos (5UL) /*!< ECAT PDI_CONFIG: OC_BUS (Bit 5) */ +#define ECAT_PDI_CONFIG_OC_BUS_Msk (0xe0UL) /*!< ECAT PDI_CONFIG: OC_BUS (Bitfield-Mask: 0x07) */ + +/* --------------------------- ECAT_SYNC_LATCH_CONFIG --------------------------- */ +#define ECAT_SYNC_LATCH_CONFIG_SYNC0_POL_Pos (0UL) /*!< ECAT SYNC_LATCH_CONFIG: SYNC0_POL (Bit 0) */ +#define ECAT_SYNC_LATCH_CONFIG_SYNC0_POL_Msk (0x3UL) /*!< ECAT SYNC_LATCH_CONFIG: SYNC0_POL (Bitfield-Mask: 0x03) */ +#define ECAT_SYNC_LATCH_CONFIG_SL0_CNF_Pos (2UL) /*!< ECAT SYNC_LATCH_CONFIG: SL0_CNF (Bit 2) */ +#define ECAT_SYNC_LATCH_CONFIG_SL0_CNF_Msk (0x4UL) /*!< ECAT SYNC_LATCH_CONFIG: SL0_CNF (Bitfield-Mask: 0x01) */ +#define ECAT_SYNC_LATCH_CONFIG_S0_MAP_Pos (3UL) /*!< ECAT SYNC_LATCH_CONFIG: S0_MAP (Bit 3) */ +#define ECAT_SYNC_LATCH_CONFIG_S0_MAP_Msk (0x8UL) /*!< ECAT SYNC_LATCH_CONFIG: S0_MAP (Bitfield-Mask: 0x01) */ +#define ECAT_SYNC_LATCH_CONFIG_SYNC1_POL_Pos (4UL) /*!< ECAT SYNC_LATCH_CONFIG: SYNC1_POL (Bit 4) */ +#define ECAT_SYNC_LATCH_CONFIG_SYNC1_POL_Msk (0x30UL) /*!< ECAT SYNC_LATCH_CONFIG: SYNC1_POL (Bitfield-Mask: 0x03) */ +#define ECAT_SYNC_LATCH_CONFIG_SL1_CNF_Pos (6UL) /*!< ECAT SYNC_LATCH_CONFIG: SL1_CNF (Bit 6) */ +#define ECAT_SYNC_LATCH_CONFIG_SL1_CNF_Msk (0x40UL) /*!< ECAT SYNC_LATCH_CONFIG: SL1_CNF (Bitfield-Mask: 0x01) */ +#define ECAT_SYNC_LATCH_CONFIG_S1_MAP_Pos (7UL) /*!< ECAT SYNC_LATCH_CONFIG: S1_MAP (Bit 7) */ +#define ECAT_SYNC_LATCH_CONFIG_S1_MAP_Msk (0x80UL) /*!< ECAT SYNC_LATCH_CONFIG: S1_MAP (Bitfield-Mask: 0x01) */ + +/* ----------------------------- ECAT_PDI_EXT_CONFIG ---------------------------- */ +#define ECAT_PDI_EXT_CONFIG_R_Pref_Pos (0UL) /*!< ECAT PDI_EXT_CONFIG: R_Pref (Bit 0) */ +#define ECAT_PDI_EXT_CONFIG_R_Pref_Msk (0x3UL) /*!< ECAT PDI_EXT_CONFIG: R_Pref (Bitfield-Mask: 0x03) */ +#define ECAT_PDI_EXT_CONFIG_SUB_TYPE_Pos (8UL) /*!< ECAT PDI_EXT_CONFIG: SUB_TYPE (Bit 8) */ +#define ECAT_PDI_EXT_CONFIG_SUB_TYPE_Msk (0x700UL) /*!< ECAT PDI_EXT_CONFIG: SUB_TYPE (Bitfield-Mask: 0x07) */ + +/* ------------------------------- ECAT_EVENT_MASK ------------------------------ */ +#define ECAT_EVENT_MASK_DC_LE_MASK_Pos (0UL) /*!< ECAT EVENT_MASK: DC_LE_MASK (Bit 0) */ +#define ECAT_EVENT_MASK_DC_LE_MASK_Msk (0x1UL) /*!< ECAT EVENT_MASK: DC_LE_MASK (Bitfield-Mask: 0x01) */ +#define ECAT_EVENT_MASK_DL_SE_MASK_Pos (2UL) /*!< ECAT EVENT_MASK: DL_SE_MASK (Bit 2) */ +#define ECAT_EVENT_MASK_DL_SE_MASK_Msk (0x4UL) /*!< ECAT EVENT_MASK: DL_SE_MASK (Bitfield-Mask: 0x01) */ +#define ECAT_EVENT_MASK_AL_SE_MASK_Pos (3UL) /*!< ECAT EVENT_MASK: AL_SE_MASK (Bit 3) */ +#define ECAT_EVENT_MASK_AL_SE_MASK_Msk (0x8UL) /*!< ECAT EVENT_MASK: AL_SE_MASK (Bitfield-Mask: 0x01) */ +#define ECAT_EVENT_MASK_MIR_0_MASK_Pos (4UL) /*!< ECAT EVENT_MASK: MIR_0_MASK (Bit 4) */ +#define ECAT_EVENT_MASK_MIR_0_MASK_Msk (0x10UL) /*!< ECAT EVENT_MASK: MIR_0_MASK (Bitfield-Mask: 0x01) */ +#define ECAT_EVENT_MASK_MIR_1_MASK_Pos (5UL) /*!< ECAT EVENT_MASK: MIR_1_MASK (Bit 5) */ +#define ECAT_EVENT_MASK_MIR_1_MASK_Msk (0x20UL) /*!< ECAT EVENT_MASK: MIR_1_MASK (Bitfield-Mask: 0x01) */ +#define ECAT_EVENT_MASK_MIR_2_MASK_Pos (6UL) /*!< ECAT EVENT_MASK: MIR_2_MASK (Bit 6) */ +#define ECAT_EVENT_MASK_MIR_2_MASK_Msk (0x40UL) /*!< ECAT EVENT_MASK: MIR_2_MASK (Bitfield-Mask: 0x01) */ +#define ECAT_EVENT_MASK_MIR_3_MASK_Pos (7UL) /*!< ECAT EVENT_MASK: MIR_3_MASK (Bit 7) */ +#define ECAT_EVENT_MASK_MIR_3_MASK_Msk (0x80UL) /*!< ECAT EVENT_MASK: MIR_3_MASK (Bitfield-Mask: 0x01) */ +#define ECAT_EVENT_MASK_MIR_4_MASK_Pos (8UL) /*!< ECAT EVENT_MASK: MIR_4_MASK (Bit 8) */ +#define ECAT_EVENT_MASK_MIR_4_MASK_Msk (0x100UL) /*!< ECAT EVENT_MASK: MIR_4_MASK (Bitfield-Mask: 0x01) */ +#define ECAT_EVENT_MASK_MIR_5_MASK_Pos (9UL) /*!< ECAT EVENT_MASK: MIR_5_MASK (Bit 9) */ +#define ECAT_EVENT_MASK_MIR_5_MASK_Msk (0x200UL) /*!< ECAT EVENT_MASK: MIR_5_MASK (Bitfield-Mask: 0x01) */ +#define ECAT_EVENT_MASK_MIR_6_MASK_Pos (10UL) /*!< ECAT EVENT_MASK: MIR_6_MASK (Bit 10) */ +#define ECAT_EVENT_MASK_MIR_6_MASK_Msk (0x400UL) /*!< ECAT EVENT_MASK: MIR_6_MASK (Bitfield-Mask: 0x01) */ +#define ECAT_EVENT_MASK_MIR_7_MASK_Pos (11UL) /*!< ECAT EVENT_MASK: MIR_7_MASK (Bit 11) */ +#define ECAT_EVENT_MASK_MIR_7_MASK_Msk (0x800UL) /*!< ECAT EVENT_MASK: MIR_7_MASK (Bitfield-Mask: 0x01) */ + +/* ----------------------------- ECAT_AL_EVENT_MASK ----------------------------- */ +#define ECAT_AL_EVENT_MASK_AL_CE_MASK_Pos (0UL) /*!< ECAT AL_EVENT_MASK: AL_CE_MASK (Bit 0) */ +#define ECAT_AL_EVENT_MASK_AL_CE_MASK_Msk (0x1UL) /*!< ECAT AL_EVENT_MASK: AL_CE_MASK (Bitfield-Mask: 0x01) */ +#define ECAT_AL_EVENT_MASK_DC_LE_MASK_Pos (1UL) /*!< ECAT AL_EVENT_MASK: DC_LE_MASK (Bit 1) */ +#define ECAT_AL_EVENT_MASK_DC_LE_MASK_Msk (0x2UL) /*!< ECAT AL_EVENT_MASK: DC_LE_MASK (Bitfield-Mask: 0x01) */ +#define ECAT_AL_EVENT_MASK_ST_S0_MASK_Pos (2UL) /*!< ECAT AL_EVENT_MASK: ST_S0_MASK (Bit 2) */ +#define ECAT_AL_EVENT_MASK_ST_S0_MASK_Msk (0x4UL) /*!< ECAT AL_EVENT_MASK: ST_S0_MASK (Bitfield-Mask: 0x01) */ +#define ECAT_AL_EVENT_MASK_ST_S1_MASK_Pos (3UL) /*!< ECAT AL_EVENT_MASK: ST_S1_MASK (Bit 3) */ +#define ECAT_AL_EVENT_MASK_ST_S1_MASK_Msk (0x8UL) /*!< ECAT AL_EVENT_MASK: ST_S1_MASK (Bitfield-Mask: 0x01) */ +#define ECAT_AL_EVENT_MASK_SM_A_MASK_Pos (4UL) /*!< ECAT AL_EVENT_MASK: SM_A_MASK (Bit 4) */ +#define ECAT_AL_EVENT_MASK_SM_A_MASK_Msk (0x10UL) /*!< ECAT AL_EVENT_MASK: SM_A_MASK (Bitfield-Mask: 0x01) */ +#define ECAT_AL_EVENT_MASK_EEP_E_MASK_Pos (5UL) /*!< ECAT AL_EVENT_MASK: EEP_E_MASK (Bit 5) */ +#define ECAT_AL_EVENT_MASK_EEP_E_MASK_Msk (0x20UL) /*!< ECAT AL_EVENT_MASK: EEP_E_MASK (Bitfield-Mask: 0x01) */ +#define ECAT_AL_EVENT_MASK_WP_D_MASK_Pos (6UL) /*!< ECAT AL_EVENT_MASK: WP_D_MASK (Bit 6) */ +#define ECAT_AL_EVENT_MASK_WP_D_MASK_Msk (0x40UL) /*!< ECAT AL_EVENT_MASK: WP_D_MASK (Bitfield-Mask: 0x01) */ +#define ECAT_AL_EVENT_MASK_SMI_0_MASK_Pos (8UL) /*!< ECAT AL_EVENT_MASK: SMI_0_MASK (Bit 8) */ +#define ECAT_AL_EVENT_MASK_SMI_0_MASK_Msk (0x100UL) /*!< ECAT AL_EVENT_MASK: SMI_0_MASK (Bitfield-Mask: 0x01) */ +#define ECAT_AL_EVENT_MASK_SMI_1_MASK_Pos (9UL) /*!< ECAT AL_EVENT_MASK: SMI_1_MASK (Bit 9) */ +#define ECAT_AL_EVENT_MASK_SMI_1_MASK_Msk (0x200UL) /*!< ECAT AL_EVENT_MASK: SMI_1_MASK (Bitfield-Mask: 0x01) */ +#define ECAT_AL_EVENT_MASK_SMI_2_MASK_Pos (10UL) /*!< ECAT AL_EVENT_MASK: SMI_2_MASK (Bit 10) */ +#define ECAT_AL_EVENT_MASK_SMI_2_MASK_Msk (0x400UL) /*!< ECAT AL_EVENT_MASK: SMI_2_MASK (Bitfield-Mask: 0x01) */ +#define ECAT_AL_EVENT_MASK_SMI_3_MASK_Pos (11UL) /*!< ECAT AL_EVENT_MASK: SMI_3_MASK (Bit 11) */ +#define ECAT_AL_EVENT_MASK_SMI_3_MASK_Msk (0x800UL) /*!< ECAT AL_EVENT_MASK: SMI_3_MASK (Bitfield-Mask: 0x01) */ +#define ECAT_AL_EVENT_MASK_SMI_4_MASK_Pos (12UL) /*!< ECAT AL_EVENT_MASK: SMI_4_MASK (Bit 12) */ +#define ECAT_AL_EVENT_MASK_SMI_4_MASK_Msk (0x1000UL) /*!< ECAT AL_EVENT_MASK: SMI_4_MASK (Bitfield-Mask: 0x01) */ +#define ECAT_AL_EVENT_MASK_SMI_5_MASK_Pos (13UL) /*!< ECAT AL_EVENT_MASK: SMI_5_MASK (Bit 13) */ +#define ECAT_AL_EVENT_MASK_SMI_5_MASK_Msk (0x2000UL) /*!< ECAT AL_EVENT_MASK: SMI_5_MASK (Bitfield-Mask: 0x01) */ +#define ECAT_AL_EVENT_MASK_SMI_6_MASK_Pos (14UL) /*!< ECAT AL_EVENT_MASK: SMI_6_MASK (Bit 14) */ +#define ECAT_AL_EVENT_MASK_SMI_6_MASK_Msk (0x4000UL) /*!< ECAT AL_EVENT_MASK: SMI_6_MASK (Bitfield-Mask: 0x01) */ +#define ECAT_AL_EVENT_MASK_SMI_7_MASK_Pos (15UL) /*!< ECAT AL_EVENT_MASK: SMI_7_MASK (Bit 15) */ +#define ECAT_AL_EVENT_MASK_SMI_7_MASK_Msk (0x8000UL) /*!< ECAT AL_EVENT_MASK: SMI_7_MASK (Bitfield-Mask: 0x01) */ +#define ECAT_AL_EVENT_MASK_SMI_8_MASK_Pos (16UL) /*!< ECAT AL_EVENT_MASK: SMI_8_MASK (Bit 16) */ +#define ECAT_AL_EVENT_MASK_SMI_8_MASK_Msk (0x10000UL) /*!< ECAT AL_EVENT_MASK: SMI_8_MASK (Bitfield-Mask: 0x01) */ +#define ECAT_AL_EVENT_MASK_SMI_9_MASK_Pos (17UL) /*!< ECAT AL_EVENT_MASK: SMI_9_MASK (Bit 17) */ +#define ECAT_AL_EVENT_MASK_SMI_9_MASK_Msk (0x20000UL) /*!< ECAT AL_EVENT_MASK: SMI_9_MASK (Bitfield-Mask: 0x01) */ +#define ECAT_AL_EVENT_MASK_SMI_10_MASK_Pos (18UL) /*!< ECAT AL_EVENT_MASK: SMI_10_MASK (Bit 18) */ +#define ECAT_AL_EVENT_MASK_SMI_10_MASK_Msk (0x40000UL) /*!< ECAT AL_EVENT_MASK: SMI_10_MASK (Bitfield-Mask: 0x01) */ +#define ECAT_AL_EVENT_MASK_SMI_11_MASK_Pos (19UL) /*!< ECAT AL_EVENT_MASK: SMI_11_MASK (Bit 19) */ +#define ECAT_AL_EVENT_MASK_SMI_11_MASK_Msk (0x80000UL) /*!< ECAT AL_EVENT_MASK: SMI_11_MASK (Bitfield-Mask: 0x01) */ +#define ECAT_AL_EVENT_MASK_SMI_12_MASK_Pos (20UL) /*!< ECAT AL_EVENT_MASK: SMI_12_MASK (Bit 20) */ +#define ECAT_AL_EVENT_MASK_SMI_12_MASK_Msk (0x100000UL) /*!< ECAT AL_EVENT_MASK: SMI_12_MASK (Bitfield-Mask: 0x01) */ +#define ECAT_AL_EVENT_MASK_SMI_13_MASK_Pos (21UL) /*!< ECAT AL_EVENT_MASK: SMI_13_MASK (Bit 21) */ +#define ECAT_AL_EVENT_MASK_SMI_13_MASK_Msk (0x200000UL) /*!< ECAT AL_EVENT_MASK: SMI_13_MASK (Bitfield-Mask: 0x01) */ +#define ECAT_AL_EVENT_MASK_SMI_14_MASK_Pos (22UL) /*!< ECAT AL_EVENT_MASK: SMI_14_MASK (Bit 22) */ +#define ECAT_AL_EVENT_MASK_SMI_14_MASK_Msk (0x400000UL) /*!< ECAT AL_EVENT_MASK: SMI_14_MASK (Bitfield-Mask: 0x01) */ +#define ECAT_AL_EVENT_MASK_SMI_15_MASK_Pos (23UL) /*!< ECAT AL_EVENT_MASK: SMI_15_MASK (Bit 23) */ +#define ECAT_AL_EVENT_MASK_SMI_15_MASK_Msk (0x800000UL) /*!< ECAT AL_EVENT_MASK: SMI_15_MASK (Bitfield-Mask: 0x01) */ + +/* ------------------------------- ECAT_EVENT_REQ ------------------------------- */ +#define ECAT_EVENT_REQ_DC_LE_Pos (0UL) /*!< ECAT EVENT_REQ: DC_LE (Bit 0) */ +#define ECAT_EVENT_REQ_DC_LE_Msk (0x1UL) /*!< ECAT EVENT_REQ: DC_LE (Bitfield-Mask: 0x01) */ +#define ECAT_EVENT_REQ_DL_SE_Pos (2UL) /*!< ECAT EVENT_REQ: DL_SE (Bit 2) */ +#define ECAT_EVENT_REQ_DL_SE_Msk (0x4UL) /*!< ECAT EVENT_REQ: DL_SE (Bitfield-Mask: 0x01) */ +#define ECAT_EVENT_REQ_AL_SE_Pos (3UL) /*!< ECAT EVENT_REQ: AL_SE (Bit 3) */ +#define ECAT_EVENT_REQ_AL_SE_Msk (0x8UL) /*!< ECAT EVENT_REQ: AL_SE (Bitfield-Mask: 0x01) */ +#define ECAT_EVENT_REQ_MIR_0_Pos (4UL) /*!< ECAT EVENT_REQ: MIR_0 (Bit 4) */ +#define ECAT_EVENT_REQ_MIR_0_Msk (0x10UL) /*!< ECAT EVENT_REQ: MIR_0 (Bitfield-Mask: 0x01) */ +#define ECAT_EVENT_REQ_MIR_1_Pos (5UL) /*!< ECAT EVENT_REQ: MIR_1 (Bit 5) */ +#define ECAT_EVENT_REQ_MIR_1_Msk (0x20UL) /*!< ECAT EVENT_REQ: MIR_1 (Bitfield-Mask: 0x01) */ +#define ECAT_EVENT_REQ_MIR_2_Pos (6UL) /*!< ECAT EVENT_REQ: MIR_2 (Bit 6) */ +#define ECAT_EVENT_REQ_MIR_2_Msk (0x40UL) /*!< ECAT EVENT_REQ: MIR_2 (Bitfield-Mask: 0x01) */ +#define ECAT_EVENT_REQ_MIR_3_Pos (7UL) /*!< ECAT EVENT_REQ: MIR_3 (Bit 7) */ +#define ECAT_EVENT_REQ_MIR_3_Msk (0x80UL) /*!< ECAT EVENT_REQ: MIR_3 (Bitfield-Mask: 0x01) */ +#define ECAT_EVENT_REQ_MIR_4_Pos (8UL) /*!< ECAT EVENT_REQ: MIR_4 (Bit 8) */ +#define ECAT_EVENT_REQ_MIR_4_Msk (0x100UL) /*!< ECAT EVENT_REQ: MIR_4 (Bitfield-Mask: 0x01) */ +#define ECAT_EVENT_REQ_MIR_5_Pos (9UL) /*!< ECAT EVENT_REQ: MIR_5 (Bit 9) */ +#define ECAT_EVENT_REQ_MIR_5_Msk (0x200UL) /*!< ECAT EVENT_REQ: MIR_5 (Bitfield-Mask: 0x01) */ +#define ECAT_EVENT_REQ_MIR_6_Pos (10UL) /*!< ECAT EVENT_REQ: MIR_6 (Bit 10) */ +#define ECAT_EVENT_REQ_MIR_6_Msk (0x400UL) /*!< ECAT EVENT_REQ: MIR_6 (Bitfield-Mask: 0x01) */ +#define ECAT_EVENT_REQ_MIR_7_Pos (11UL) /*!< ECAT EVENT_REQ: MIR_7 (Bit 11) */ +#define ECAT_EVENT_REQ_MIR_7_Msk (0x800UL) /*!< ECAT EVENT_REQ: MIR_7 (Bitfield-Mask: 0x01) */ + +/* ------------------------------ ECAT_AL_EVENT_REQ ----------------------------- */ +#define ECAT_AL_EVENT_REQ_AL_CE_Pos (0UL) /*!< ECAT AL_EVENT_REQ: AL_CE (Bit 0) */ +#define ECAT_AL_EVENT_REQ_AL_CE_Msk (0x1UL) /*!< ECAT AL_EVENT_REQ: AL_CE (Bitfield-Mask: 0x01) */ +#define ECAT_AL_EVENT_REQ_DC_LE_Pos (1UL) /*!< ECAT AL_EVENT_REQ: DC_LE (Bit 1) */ +#define ECAT_AL_EVENT_REQ_DC_LE_Msk (0x2UL) /*!< ECAT AL_EVENT_REQ: DC_LE (Bitfield-Mask: 0x01) */ +#define ECAT_AL_EVENT_REQ_ST_S0_Pos (2UL) /*!< ECAT AL_EVENT_REQ: ST_S0 (Bit 2) */ +#define ECAT_AL_EVENT_REQ_ST_S0_Msk (0x4UL) /*!< ECAT AL_EVENT_REQ: ST_S0 (Bitfield-Mask: 0x01) */ +#define ECAT_AL_EVENT_REQ_ST_S1_Pos (3UL) /*!< ECAT AL_EVENT_REQ: ST_S1 (Bit 3) */ +#define ECAT_AL_EVENT_REQ_ST_S1_Msk (0x8UL) /*!< ECAT AL_EVENT_REQ: ST_S1 (Bitfield-Mask: 0x01) */ +#define ECAT_AL_EVENT_REQ_SM_A_Pos (4UL) /*!< ECAT AL_EVENT_REQ: SM_A (Bit 4) */ +#define ECAT_AL_EVENT_REQ_SM_A_Msk (0x10UL) /*!< ECAT AL_EVENT_REQ: SM_A (Bitfield-Mask: 0x01) */ +#define ECAT_AL_EVENT_REQ_EEP_E_Pos (5UL) /*!< ECAT AL_EVENT_REQ: EEP_E (Bit 5) */ +#define ECAT_AL_EVENT_REQ_EEP_E_Msk (0x20UL) /*!< ECAT AL_EVENT_REQ: EEP_E (Bitfield-Mask: 0x01) */ +#define ECAT_AL_EVENT_REQ_WP_D_Pos (6UL) /*!< ECAT AL_EVENT_REQ: WP_D (Bit 6) */ +#define ECAT_AL_EVENT_REQ_WP_D_Msk (0x40UL) /*!< ECAT AL_EVENT_REQ: WP_D (Bitfield-Mask: 0x01) */ +#define ECAT_AL_EVENT_REQ_SMI_0_Pos (8UL) /*!< ECAT AL_EVENT_REQ: SMI_0 (Bit 8) */ +#define ECAT_AL_EVENT_REQ_SMI_0_Msk (0x100UL) /*!< ECAT AL_EVENT_REQ: SMI_0 (Bitfield-Mask: 0x01) */ +#define ECAT_AL_EVENT_REQ_SMI_1_Pos (9UL) /*!< ECAT AL_EVENT_REQ: SMI_1 (Bit 9) */ +#define ECAT_AL_EVENT_REQ_SMI_1_Msk (0x200UL) /*!< ECAT AL_EVENT_REQ: SMI_1 (Bitfield-Mask: 0x01) */ +#define ECAT_AL_EVENT_REQ_SMI_2_Pos (10UL) /*!< ECAT AL_EVENT_REQ: SMI_2 (Bit 10) */ +#define ECAT_AL_EVENT_REQ_SMI_2_Msk (0x400UL) /*!< ECAT AL_EVENT_REQ: SMI_2 (Bitfield-Mask: 0x01) */ +#define ECAT_AL_EVENT_REQ_SMI_3_Pos (11UL) /*!< ECAT AL_EVENT_REQ: SMI_3 (Bit 11) */ +#define ECAT_AL_EVENT_REQ_SMI_3_Msk (0x800UL) /*!< ECAT AL_EVENT_REQ: SMI_3 (Bitfield-Mask: 0x01) */ +#define ECAT_AL_EVENT_REQ_SMI_4_Pos (12UL) /*!< ECAT AL_EVENT_REQ: SMI_4 (Bit 12) */ +#define ECAT_AL_EVENT_REQ_SMI_4_Msk (0x1000UL) /*!< ECAT AL_EVENT_REQ: SMI_4 (Bitfield-Mask: 0x01) */ +#define ECAT_AL_EVENT_REQ_SMI_5_Pos (13UL) /*!< ECAT AL_EVENT_REQ: SMI_5 (Bit 13) */ +#define ECAT_AL_EVENT_REQ_SMI_5_Msk (0x2000UL) /*!< ECAT AL_EVENT_REQ: SMI_5 (Bitfield-Mask: 0x01) */ +#define ECAT_AL_EVENT_REQ_SMI_6_Pos (14UL) /*!< ECAT AL_EVENT_REQ: SMI_6 (Bit 14) */ +#define ECAT_AL_EVENT_REQ_SMI_6_Msk (0x4000UL) /*!< ECAT AL_EVENT_REQ: SMI_6 (Bitfield-Mask: 0x01) */ +#define ECAT_AL_EVENT_REQ_SMI_7_Pos (15UL) /*!< ECAT AL_EVENT_REQ: SMI_7 (Bit 15) */ +#define ECAT_AL_EVENT_REQ_SMI_7_Msk (0x8000UL) /*!< ECAT AL_EVENT_REQ: SMI_7 (Bitfield-Mask: 0x01) */ +#define ECAT_AL_EVENT_REQ_SMI_8_Pos (16UL) /*!< ECAT AL_EVENT_REQ: SMI_8 (Bit 16) */ +#define ECAT_AL_EVENT_REQ_SMI_8_Msk (0x10000UL) /*!< ECAT AL_EVENT_REQ: SMI_8 (Bitfield-Mask: 0x01) */ +#define ECAT_AL_EVENT_REQ_SMI_9_Pos (17UL) /*!< ECAT AL_EVENT_REQ: SMI_9 (Bit 17) */ +#define ECAT_AL_EVENT_REQ_SMI_9_Msk (0x20000UL) /*!< ECAT AL_EVENT_REQ: SMI_9 (Bitfield-Mask: 0x01) */ +#define ECAT_AL_EVENT_REQ_SMI_10_Pos (18UL) /*!< ECAT AL_EVENT_REQ: SMI_10 (Bit 18) */ +#define ECAT_AL_EVENT_REQ_SMI_10_Msk (0x40000UL) /*!< ECAT AL_EVENT_REQ: SMI_10 (Bitfield-Mask: 0x01) */ +#define ECAT_AL_EVENT_REQ_SMI_11_Pos (19UL) /*!< ECAT AL_EVENT_REQ: SMI_11 (Bit 19) */ +#define ECAT_AL_EVENT_REQ_SMI_11_Msk (0x80000UL) /*!< ECAT AL_EVENT_REQ: SMI_11 (Bitfield-Mask: 0x01) */ +#define ECAT_AL_EVENT_REQ_SMI_12_Pos (20UL) /*!< ECAT AL_EVENT_REQ: SMI_12 (Bit 20) */ +#define ECAT_AL_EVENT_REQ_SMI_12_Msk (0x100000UL) /*!< ECAT AL_EVENT_REQ: SMI_12 (Bitfield-Mask: 0x01) */ +#define ECAT_AL_EVENT_REQ_SMI_13_Pos (21UL) /*!< ECAT AL_EVENT_REQ: SMI_13 (Bit 21) */ +#define ECAT_AL_EVENT_REQ_SMI_13_Msk (0x200000UL) /*!< ECAT AL_EVENT_REQ: SMI_13 (Bitfield-Mask: 0x01) */ +#define ECAT_AL_EVENT_REQ_SMI_14_Pos (22UL) /*!< ECAT AL_EVENT_REQ: SMI_14 (Bit 22) */ +#define ECAT_AL_EVENT_REQ_SMI_14_Msk (0x400000UL) /*!< ECAT AL_EVENT_REQ: SMI_14 (Bitfield-Mask: 0x01) */ +#define ECAT_AL_EVENT_REQ_SMI_15_Pos (23UL) /*!< ECAT AL_EVENT_REQ: SMI_15 (Bit 23) */ +#define ECAT_AL_EVENT_REQ_SMI_15_Msk (0x800000UL) /*!< ECAT AL_EVENT_REQ: SMI_15 (Bitfield-Mask: 0x01) */ + +/* ----------------------------- ECAT_RX_ERR_COUNT0 ----------------------------- */ +#define ECAT_RX_ERR_COUNT0_INVALID_FRAME_Pos (0UL) /*!< ECAT RX_ERR_COUNT0: INVALID_FRAME (Bit 0) */ +#define ECAT_RX_ERR_COUNT0_INVALID_FRAME_Msk (0xffUL) /*!< ECAT RX_ERR_COUNT0: INVALID_FRAME (Bitfield-Mask: 0xff) */ +#define ECAT_RX_ERR_COUNT0_RX_ERROR_Pos (8UL) /*!< ECAT RX_ERR_COUNT0: RX_ERROR (Bit 8) */ +#define ECAT_RX_ERR_COUNT0_RX_ERROR_Msk (0xff00UL) /*!< ECAT RX_ERR_COUNT0: RX_ERROR (Bitfield-Mask: 0xff) */ + +/* ----------------------------- ECAT_RX_ERR_COUNT1 ----------------------------- */ +#define ECAT_RX_ERR_COUNT1_INVALID_FRAME_Pos (0UL) /*!< ECAT RX_ERR_COUNT1: INVALID_FRAME (Bit 0) */ +#define ECAT_RX_ERR_COUNT1_INVALID_FRAME_Msk (0xffUL) /*!< ECAT RX_ERR_COUNT1: INVALID_FRAME (Bitfield-Mask: 0xff) */ +#define ECAT_RX_ERR_COUNT1_RX_ERROR_Pos (8UL) /*!< ECAT RX_ERR_COUNT1: RX_ERROR (Bit 8) */ +#define ECAT_RX_ERR_COUNT1_RX_ERROR_Msk (0xff00UL) /*!< ECAT RX_ERR_COUNT1: RX_ERROR (Bitfield-Mask: 0xff) */ + +/* --------------------------- ECAT_FWD_RX_ERR_COUNT0 --------------------------- */ +#define ECAT_FWD_RX_ERR_COUNT0_FORW_ERROR_Pos (0UL) /*!< ECAT FWD_RX_ERR_COUNT0: FORW_ERROR (Bit 0) */ +#define ECAT_FWD_RX_ERR_COUNT0_FORW_ERROR_Msk (0xffUL) /*!< ECAT FWD_RX_ERR_COUNT0: FORW_ERROR (Bitfield-Mask: 0xff) */ + +/* --------------------------- ECAT_FWD_RX_ERR_COUNT1 --------------------------- */ +#define ECAT_FWD_RX_ERR_COUNT1_FORW_ERROR_Pos (0UL) /*!< ECAT FWD_RX_ERR_COUNT1: FORW_ERROR (Bit 0) */ +#define ECAT_FWD_RX_ERR_COUNT1_FORW_ERROR_Msk (0xffUL) /*!< ECAT FWD_RX_ERR_COUNT1: FORW_ERROR (Bitfield-Mask: 0xff) */ + +/* ----------------------------- ECAT_PROC_ERR_COUNT ---------------------------- */ +#define ECAT_PROC_ERR_COUNT_UNIT_ERROR_Pos (0UL) /*!< ECAT PROC_ERR_COUNT: UNIT_ERROR (Bit 0) */ +#define ECAT_PROC_ERR_COUNT_UNIT_ERROR_Msk (0xffUL) /*!< ECAT PROC_ERR_COUNT: UNIT_ERROR (Bitfield-Mask: 0xff) */ + +/* ----------------------------- ECAT_PDI_ERR_COUNT ----------------------------- */ +#define ECAT_PDI_ERR_COUNT_PDI_ERROR_COUNTER_Pos (0UL) /*!< ECAT PDI_ERR_COUNT: PDI_ERROR_COUNTER (Bit 0) */ +#define ECAT_PDI_ERR_COUNT_PDI_ERROR_COUNTER_Msk (0xffUL) /*!< ECAT PDI_ERR_COUNT: PDI_ERROR_COUNTER (Bitfield-Mask: 0xff) */ + +/* ---------------------------- ECAT_LOST_LINK_COUNT0 --------------------------- */ +#define ECAT_LOST_LINK_COUNT0_LL_COUNTER_Pos (0UL) /*!< ECAT LOST_LINK_COUNT0: LL_COUNTER (Bit 0) */ +#define ECAT_LOST_LINK_COUNT0_LL_COUNTER_Msk (0xffUL) /*!< ECAT LOST_LINK_COUNT0: LL_COUNTER (Bitfield-Mask: 0xff) */ + +/* ---------------------------- ECAT_LOST_LINK_COUNT1 --------------------------- */ +#define ECAT_LOST_LINK_COUNT1_LL_COUNTER_Pos (0UL) /*!< ECAT LOST_LINK_COUNT1: LL_COUNTER (Bit 0) */ +#define ECAT_LOST_LINK_COUNT1_LL_COUNTER_Msk (0xffUL) /*!< ECAT LOST_LINK_COUNT1: LL_COUNTER (Bitfield-Mask: 0xff) */ + +/* ------------------------------- ECAT_WD_DIVIDE ------------------------------- */ +#define ECAT_WD_DIVIDE_WD_DIV_Pos (0UL) /*!< ECAT WD_DIVIDE: WD_DIV (Bit 0) */ +#define ECAT_WD_DIVIDE_WD_DIV_Msk (0xffffUL) /*!< ECAT WD_DIVIDE: WD_DIV (Bitfield-Mask: 0xffff) */ + +/* ------------------------------ ECAT_WD_TIME_PDI ------------------------------ */ +#define ECAT_WD_TIME_PDI_WD_TIME_PDI_Pos (0UL) /*!< ECAT WD_TIME_PDI: WD_TIME_PDI (Bit 0) */ +#define ECAT_WD_TIME_PDI_WD_TIME_PDI_Msk (0xffffUL) /*!< ECAT WD_TIME_PDI: WD_TIME_PDI (Bitfield-Mask: 0xffff) */ + +/* ----------------------------- ECAT_WD_TIME_PDATA ----------------------------- */ +#define ECAT_WD_TIME_PDATA_WD_TIME_PD_Pos (0UL) /*!< ECAT WD_TIME_PDATA: WD_TIME_PD (Bit 0) */ +#define ECAT_WD_TIME_PDATA_WD_TIME_PD_Msk (0xffffUL) /*!< ECAT WD_TIME_PDATA: WD_TIME_PD (Bitfield-Mask: 0xffff) */ + +/* ----------------------------- ECAT_WD_STAT_PDATA ----------------------------- */ +#define ECAT_WD_STAT_PDATA_WD_STAT_PD_Pos (0UL) /*!< ECAT WD_STAT_PDATA: WD_STAT_PD (Bit 0) */ +#define ECAT_WD_STAT_PDATA_WD_STAT_PD_Msk (0x1UL) /*!< ECAT WD_STAT_PDATA: WD_STAT_PD (Bitfield-Mask: 0x01) */ + +/* ----------------------------- ECAT_WD_COUNT_PDATA ---------------------------- */ +#define ECAT_WD_COUNT_PDATA_WD_COUNTER_PD_Pos (0UL) /*!< ECAT WD_COUNT_PDATA: WD_COUNTER_PD (Bit 0) */ +#define ECAT_WD_COUNT_PDATA_WD_COUNTER_PD_Msk (0xffUL) /*!< ECAT WD_COUNT_PDATA: WD_COUNTER_PD (Bitfield-Mask: 0xff) */ + +/* ------------------------------ ECAT_WD_COUNT_PDI ----------------------------- */ +#define ECAT_WD_COUNT_PDI_WD_COUNTER_PDI_Pos (0UL) /*!< ECAT WD_COUNT_PDI: WD_COUNTER_PDI (Bit 0) */ +#define ECAT_WD_COUNT_PDI_WD_COUNTER_PDI_Msk (0xffUL) /*!< ECAT WD_COUNT_PDI: WD_COUNTER_PDI (Bitfield-Mask: 0xff) */ + +/* -------------------------------- ECAT_EEP_CONF ------------------------------- */ +#define ECAT_EEP_CONF_TO_PDI_Pos (0UL) /*!< ECAT EEP_CONF: TO_PDI (Bit 0) */ +#define ECAT_EEP_CONF_TO_PDI_Msk (0x1UL) /*!< ECAT EEP_CONF: TO_PDI (Bitfield-Mask: 0x01) */ +#define ECAT_EEP_CONF_FORCE_Pos (1UL) /*!< ECAT EEP_CONF: FORCE (Bit 1) */ +#define ECAT_EEP_CONF_FORCE_Msk (0x2UL) /*!< ECAT EEP_CONF: FORCE (Bitfield-Mask: 0x01) */ + +/* ------------------------------- ECAT_EEP_STATE ------------------------------- */ +#define ECAT_EEP_STATE_ACCESS_Pos (0UL) /*!< ECAT EEP_STATE: ACCESS (Bit 0) */ +#define ECAT_EEP_STATE_ACCESS_Msk (0x1UL) /*!< ECAT EEP_STATE: ACCESS (Bitfield-Mask: 0x01) */ + +/* ----------------------------- ECAT_EEP_CONT_STAT ----------------------------- */ +#define ECAT_EEP_CONT_STAT_W_EN_Pos (0UL) /*!< ECAT EEP_CONT_STAT: W_EN (Bit 0) */ +#define ECAT_EEP_CONT_STAT_W_EN_Msk (0x1UL) /*!< ECAT EEP_CONT_STAT: W_EN (Bitfield-Mask: 0x01) */ +#define ECAT_EEP_CONT_STAT_EMUL_Pos (5UL) /*!< ECAT EEP_CONT_STAT: EMUL (Bit 5) */ +#define ECAT_EEP_CONT_STAT_EMUL_Msk (0x20UL) /*!< ECAT EEP_CONT_STAT: EMUL (Bitfield-Mask: 0x01) */ +#define ECAT_EEP_CONT_STAT_BYTES_Pos (6UL) /*!< ECAT EEP_CONT_STAT: BYTES (Bit 6) */ +#define ECAT_EEP_CONT_STAT_BYTES_Msk (0x40UL) /*!< ECAT EEP_CONT_STAT: BYTES (Bitfield-Mask: 0x01) */ +#define ECAT_EEP_CONT_STAT_ALG_Pos (7UL) /*!< ECAT EEP_CONT_STAT: ALG (Bit 7) */ +#define ECAT_EEP_CONT_STAT_ALG_Msk (0x80UL) /*!< ECAT EEP_CONT_STAT: ALG (Bitfield-Mask: 0x01) */ +#define ECAT_EEP_CONT_STAT_CMD_REG_Pos (8UL) /*!< ECAT EEP_CONT_STAT: CMD_REG (Bit 8) */ +#define ECAT_EEP_CONT_STAT_CMD_REG_Msk (0x700UL) /*!< ECAT EEP_CONT_STAT: CMD_REG (Bitfield-Mask: 0x07) */ +#define ECAT_EEP_CONT_STAT_ERROR_Pos (11UL) /*!< ECAT EEP_CONT_STAT: ERROR (Bit 11) */ +#define ECAT_EEP_CONT_STAT_ERROR_Msk (0x800UL) /*!< ECAT EEP_CONT_STAT: ERROR (Bitfield-Mask: 0x01) */ +#define ECAT_EEP_CONT_STAT_L_STAT_Pos (12UL) /*!< ECAT EEP_CONT_STAT: L_STAT (Bit 12) */ +#define ECAT_EEP_CONT_STAT_L_STAT_Msk (0x1000UL) /*!< ECAT EEP_CONT_STAT: L_STAT (Bitfield-Mask: 0x01) */ +#define ECAT_EEP_CONT_STAT_ERROR_AC_Pos (13UL) /*!< ECAT EEP_CONT_STAT: ERROR_AC (Bit 13) */ +#define ECAT_EEP_CONT_STAT_ERROR_AC_Msk (0x2000UL) /*!< ECAT EEP_CONT_STAT: ERROR_AC (Bitfield-Mask: 0x01) */ +#define ECAT_EEP_CONT_STAT_ERROR_WE_Pos (14UL) /*!< ECAT EEP_CONT_STAT: ERROR_WE (Bit 14) */ +#define ECAT_EEP_CONT_STAT_ERROR_WE_Msk (0x4000UL) /*!< ECAT EEP_CONT_STAT: ERROR_WE (Bitfield-Mask: 0x01) */ +#define ECAT_EEP_CONT_STAT_BUSY_Pos (15UL) /*!< ECAT EEP_CONT_STAT: BUSY (Bit 15) */ +#define ECAT_EEP_CONT_STAT_BUSY_Msk (0x8000UL) /*!< ECAT EEP_CONT_STAT: BUSY (Bitfield-Mask: 0x01) */ + +/* -------------------------------- ECAT_EEP_ADR -------------------------------- */ +#define ECAT_EEP_ADR_EEPROM_ADDR_Pos (0UL) /*!< ECAT EEP_ADR: EEPROM_ADDR (Bit 0) */ +#define ECAT_EEP_ADR_EEPROM_ADDR_Msk (0xffffffffUL) /*!< ECAT EEP_ADR: EEPROM_ADDR (Bitfield-Mask: 0xffffffff) */ + +/* -------------------------------- ECAT_EEP_DATA ------------------------------- */ +#define ECAT_EEP_DATA_EEP_DATA_Pos (0UL) /*!< ECAT EEP_DATA: EEP_DATA (Bit 0) */ +#define ECAT_EEP_DATA_EEP_DATA_Msk (0xffffffffUL) /*!< ECAT EEP_DATA: EEP_DATA (Bitfield-Mask: 0xffffffff) */ + +/* ----------------------------- ECAT_MII_CONT_STAT ----------------------------- */ +#define ECAT_MII_CONT_STAT_W_EN_Pos (0UL) /*!< ECAT MII_CONT_STAT: W_EN (Bit 0) */ +#define ECAT_MII_CONT_STAT_W_EN_Msk (0x1UL) /*!< ECAT MII_CONT_STAT: W_EN (Bitfield-Mask: 0x01) */ +#define ECAT_MII_CONT_STAT_MIC_PDI_Pos (1UL) /*!< ECAT MII_CONT_STAT: MIC_PDI (Bit 1) */ +#define ECAT_MII_CONT_STAT_MIC_PDI_Msk (0x2UL) /*!< ECAT MII_CONT_STAT: MIC_PDI (Bitfield-Mask: 0x01) */ +#define ECAT_MII_CONT_STAT_MI_LD_Pos (2UL) /*!< ECAT MII_CONT_STAT: MI_LD (Bit 2) */ +#define ECAT_MII_CONT_STAT_MI_LD_Msk (0x4UL) /*!< ECAT MII_CONT_STAT: MI_LD (Bitfield-Mask: 0x01) */ +#define ECAT_MII_CONT_STAT_PHY_ADDR_Pos (3UL) /*!< ECAT MII_CONT_STAT: PHY_ADDR (Bit 3) */ +#define ECAT_MII_CONT_STAT_PHY_ADDR_Msk (0xf8UL) /*!< ECAT MII_CONT_STAT: PHY_ADDR (Bitfield-Mask: 0x1f) */ +#define ECAT_MII_CONT_STAT_CMD_REG_Pos (8UL) /*!< ECAT MII_CONT_STAT: CMD_REG (Bit 8) */ +#define ECAT_MII_CONT_STAT_CMD_REG_Msk (0x300UL) /*!< ECAT MII_CONT_STAT: CMD_REG (Bitfield-Mask: 0x03) */ +#define ECAT_MII_CONT_STAT_ERROR_Pos (14UL) /*!< ECAT MII_CONT_STAT: ERROR (Bit 14) */ +#define ECAT_MII_CONT_STAT_ERROR_Msk (0x4000UL) /*!< ECAT MII_CONT_STAT: ERROR (Bitfield-Mask: 0x01) */ +#define ECAT_MII_CONT_STAT_BUSY_Pos (15UL) /*!< ECAT MII_CONT_STAT: BUSY (Bit 15) */ +#define ECAT_MII_CONT_STAT_BUSY_Msk (0x8000UL) /*!< ECAT MII_CONT_STAT: BUSY (Bitfield-Mask: 0x01) */ + +/* ------------------------------ ECAT_MII_PHY_ADR ------------------------------ */ +#define ECAT_MII_PHY_ADR_PHY_ADDR_Pos (0UL) /*!< ECAT MII_PHY_ADR: PHY_ADDR (Bit 0) */ +#define ECAT_MII_PHY_ADR_PHY_ADDR_Msk (0x1fUL) /*!< ECAT MII_PHY_ADR: PHY_ADDR (Bitfield-Mask: 0x1f) */ +#define ECAT_MII_PHY_ADR_PHY_CADDR_Pos (7UL) /*!< ECAT MII_PHY_ADR: PHY_CADDR (Bit 7) */ +#define ECAT_MII_PHY_ADR_PHY_CADDR_Msk (0x80UL) /*!< ECAT MII_PHY_ADR: PHY_CADDR (Bitfield-Mask: 0x01) */ + +/* ---------------------------- ECAT_MII_PHY_REG_ADR ---------------------------- */ +#define ECAT_MII_PHY_REG_ADR_PHY_REG_ADDR_Pos (0UL) /*!< ECAT MII_PHY_REG_ADR: PHY_REG_ADDR (Bit 0) */ +#define ECAT_MII_PHY_REG_ADR_PHY_REG_ADDR_Msk (0x1fUL) /*!< ECAT MII_PHY_REG_ADR: PHY_REG_ADDR (Bitfield-Mask: 0x1f) */ + +/* ------------------------------ ECAT_MII_PHY_DATA ----------------------------- */ +#define ECAT_MII_PHY_DATA_PHY_RW_DATA_Pos (0UL) /*!< ECAT MII_PHY_DATA: PHY_RW_DATA (Bit 0) */ +#define ECAT_MII_PHY_DATA_PHY_RW_DATA_Msk (0xffffUL) /*!< ECAT MII_PHY_DATA: PHY_RW_DATA (Bitfield-Mask: 0xffff) */ + +/* --------------------------- ECAT_MII_ECAT_ACS_STATE -------------------------- */ +#define ECAT_MII_ECAT_ACS_STATE_EN_ACS_MII_BY_PDI_Pos (0UL) /*!< ECAT MII_ECAT_ACS_STATE: EN_ACS_MII_BY_PDI (Bit 0) */ +#define ECAT_MII_ECAT_ACS_STATE_EN_ACS_MII_BY_PDI_Msk (0x1UL) /*!< ECAT MII_ECAT_ACS_STATE: EN_ACS_MII_BY_PDI (Bitfield-Mask: 0x01) */ + +/* --------------------------- ECAT_MII_PDI_ACS_STATE --------------------------- */ +#define ECAT_MII_PDI_ACS_STATE_ACS_MII_BY_PDI_Pos (0UL) /*!< ECAT MII_PDI_ACS_STATE: ACS_MII_BY_PDI (Bit 0) */ +#define ECAT_MII_PDI_ACS_STATE_ACS_MII_BY_PDI_Msk (0x1UL) /*!< ECAT MII_PDI_ACS_STATE: ACS_MII_BY_PDI (Bitfield-Mask: 0x01) */ +#define ECAT_MII_PDI_ACS_STATE_FORCE_PDI_ACS_S_Pos (1UL) /*!< ECAT MII_PDI_ACS_STATE: FORCE_PDI_ACS_S (Bit 1) */ +#define ECAT_MII_PDI_ACS_STATE_FORCE_PDI_ACS_S_Msk (0x2UL) /*!< ECAT MII_PDI_ACS_STATE: FORCE_PDI_ACS_S (Bitfield-Mask: 0x01) */ + +/* --------------------------- ECAT_DC_RCV_TIME_PORT0 --------------------------- */ +#define ECAT_DC_RCV_TIME_PORT0_LOCAL_TIME_P0_Pos (0UL) /*!< ECAT DC_RCV_TIME_PORT0: LOCAL_TIME_P0 (Bit 0) */ +#define ECAT_DC_RCV_TIME_PORT0_LOCAL_TIME_P0_Msk (0xffffffffUL) /*!< ECAT DC_RCV_TIME_PORT0: LOCAL_TIME_P0 (Bitfield-Mask: 0xffffffff) */ + +/* --------------------------- ECAT_DC_RCV_TIME_PORT1 --------------------------- */ +#define ECAT_DC_RCV_TIME_PORT1_LOCAL_TIME_P1_Pos (0UL) /*!< ECAT DC_RCV_TIME_PORT1: LOCAL_TIME_P1 (Bit 0) */ +#define ECAT_DC_RCV_TIME_PORT1_LOCAL_TIME_P1_Msk (0xffffffffUL) /*!< ECAT DC_RCV_TIME_PORT1: LOCAL_TIME_P1 (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------------ ECAT_DC_SYS_TIME ------------------------------ */ +#define ECAT_DC_SYS_TIME_WRITE_ACCESS_WRITEMode_Pos (0UL) /*!< ECAT DC_SYS_TIME: WRITE_ACCESS_WRITEMode (Bit 0) */ +#define ECAT_DC_SYS_TIME_WRITE_ACCESS_WRITEMode_Msk (0xffffffffUL) /*!< ECAT DC_SYS_TIME: WRITE_ACCESS_WRITEMode (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------------ ECAT_DC_SYS_TIME ------------------------------ */ +#define ECAT_DC_SYS_TIME_READ_ACCESS_READMode_Pos (0UL) /*!< ECAT DC_SYS_TIME: READ_ACCESS_READMode (Bit 0) */ +#define ECAT_DC_SYS_TIME_READ_ACCESS_READMode_Msk (0xffffffffUL) /*!< ECAT DC_SYS_TIME: READ_ACCESS_READMode (Bitfield-Mask: 0xffffffff) */ + +/* ---------------------------- ECAT_RECEIVE_TIME_PU ---------------------------- */ +#define ECAT_RECEIVE_TIME_PU_RECEIVE_TIME_PU_Pos (0UL) /*!< ECAT RECEIVE_TIME_PU: RECEIVE_TIME_PU (Bit 0) */ +#define ECAT_RECEIVE_TIME_PU_RECEIVE_TIME_PU_Msk (0xffffffffUL) /*!< ECAT RECEIVE_TIME_PU: RECEIVE_TIME_PU (Bitfield-Mask: 0xffffffff) */ + +/* --------------------------- ECAT_DC_SYS_TIME_OFFSET -------------------------- */ +#define ECAT_DC_SYS_TIME_OFFSET_DC_SYS_TIME_OFFSET_Pos (0UL) /*!< ECAT DC_SYS_TIME_OFFSET: DC_SYS_TIME_OFFSET (Bit 0) */ +#define ECAT_DC_SYS_TIME_OFFSET_DC_SYS_TIME_OFFSET_Msk (0xffffffffUL) /*!< ECAT DC_SYS_TIME_OFFSET: DC_SYS_TIME_OFFSET (Bitfield-Mask: 0xffffffff) */ + +/* --------------------------- ECAT_DC_SYS_TIME_DELAY --------------------------- */ +#define ECAT_DC_SYS_TIME_DELAY_CLK_DELAY_Pos (0UL) /*!< ECAT DC_SYS_TIME_DELAY: CLK_DELAY (Bit 0) */ +#define ECAT_DC_SYS_TIME_DELAY_CLK_DELAY_Msk (0xffffffffUL) /*!< ECAT DC_SYS_TIME_DELAY: CLK_DELAY (Bitfield-Mask: 0xffffffff) */ + +/* ---------------------------- ECAT_DC_SYS_TIME_DIFF --------------------------- */ +#define ECAT_DC_SYS_TIME_DIFF_TIME_DIF_Pos (0UL) /*!< ECAT DC_SYS_TIME_DIFF: TIME_DIF (Bit 0) */ +#define ECAT_DC_SYS_TIME_DIFF_TIME_DIF_Msk (0x7fffffffUL) /*!< ECAT DC_SYS_TIME_DIFF: TIME_DIF (Bitfield-Mask: 0x7fffffff) */ +#define ECAT_DC_SYS_TIME_DIFF_CPY_Pos (31UL) /*!< ECAT DC_SYS_TIME_DIFF: CPY (Bit 31) */ +#define ECAT_DC_SYS_TIME_DIFF_CPY_Msk (0x80000000UL) /*!< ECAT DC_SYS_TIME_DIFF: CPY (Bitfield-Mask: 0x01) */ + +/* -------------------------- ECAT_DC_SPEED_COUNT_START ------------------------- */ +#define ECAT_DC_SPEED_COUNT_START_COUNT_START_Pos (0UL) /*!< ECAT DC_SPEED_COUNT_START: COUNT_START (Bit 0) */ +#define ECAT_DC_SPEED_COUNT_START_COUNT_START_Msk (0x7fffUL) /*!< ECAT DC_SPEED_COUNT_START: COUNT_START (Bitfield-Mask: 0x7fff) */ + +/* -------------------------- ECAT_DC_SPEED_COUNT_DIFF -------------------------- */ +#define ECAT_DC_SPEED_COUNT_DIFF_DEVIATION_Pos (0UL) /*!< ECAT DC_SPEED_COUNT_DIFF: DEVIATION (Bit 0) */ +#define ECAT_DC_SPEED_COUNT_DIFF_DEVIATION_Msk (0xffffUL) /*!< ECAT DC_SPEED_COUNT_DIFF: DEVIATION (Bitfield-Mask: 0xffff) */ + +/* ------------------------- ECAT_DC_SYS_TIME_FIL_DEPTH ------------------------- */ +#define ECAT_DC_SYS_TIME_FIL_DEPTH_FILTER_DEPTH_Pos (0UL) /*!< ECAT DC_SYS_TIME_FIL_DEPTH: FILTER_DEPTH (Bit 0) */ +#define ECAT_DC_SYS_TIME_FIL_DEPTH_FILTER_DEPTH_Msk (0xfUL) /*!< ECAT DC_SYS_TIME_FIL_DEPTH: FILTER_DEPTH (Bitfield-Mask: 0x0f) */ + +/* ------------------------ ECAT_DC_SPEED_COUNT_FIL_DEPTH ----------------------- */ +#define ECAT_DC_SPEED_COUNT_FIL_DEPTH_FILTER_DEPTH_Pos (0UL) /*!< ECAT DC_SPEED_COUNT_FIL_DEPTH: FILTER_DEPTH (Bit 0) */ +#define ECAT_DC_SPEED_COUNT_FIL_DEPTH_FILTER_DEPTH_Msk (0xfUL) /*!< ECAT DC_SPEED_COUNT_FIL_DEPTH: FILTER_DEPTH (Bitfield-Mask: 0x0f) */ + +/* ------------------------------ ECAT_DC_CYC_CONT ------------------------------ */ +#define ECAT_DC_CYC_CONT_SYNC_Pos (0UL) /*!< ECAT DC_CYC_CONT: SYNC (Bit 0) */ +#define ECAT_DC_CYC_CONT_SYNC_Msk (0x1UL) /*!< ECAT DC_CYC_CONT: SYNC (Bitfield-Mask: 0x01) */ +#define ECAT_DC_CYC_CONT_LATCH_U0_Pos (4UL) /*!< ECAT DC_CYC_CONT: LATCH_U0 (Bit 4) */ +#define ECAT_DC_CYC_CONT_LATCH_U0_Msk (0x10UL) /*!< ECAT DC_CYC_CONT: LATCH_U0 (Bitfield-Mask: 0x01) */ +#define ECAT_DC_CYC_CONT_LATCH_U1_Pos (5UL) /*!< ECAT DC_CYC_CONT: LATCH_U1 (Bit 5) */ +#define ECAT_DC_CYC_CONT_LATCH_U1_Msk (0x20UL) /*!< ECAT DC_CYC_CONT: LATCH_U1 (Bitfield-Mask: 0x01) */ + +/* --------------------------------- ECAT_DC_ACT -------------------------------- */ +#define ECAT_DC_ACT_SYNC_OUT_Pos (0UL) /*!< ECAT DC_ACT: SYNC_OUT (Bit 0) */ +#define ECAT_DC_ACT_SYNC_OUT_Msk (0x1UL) /*!< ECAT DC_ACT: SYNC_OUT (Bitfield-Mask: 0x01) */ +#define ECAT_DC_ACT_SYNC_0_Pos (1UL) /*!< ECAT DC_ACT: SYNC_0 (Bit 1) */ +#define ECAT_DC_ACT_SYNC_0_Msk (0x2UL) /*!< ECAT DC_ACT: SYNC_0 (Bitfield-Mask: 0x01) */ +#define ECAT_DC_ACT_SYNC_1_Pos (2UL) /*!< ECAT DC_ACT: SYNC_1 (Bit 2) */ +#define ECAT_DC_ACT_SYNC_1_Msk (0x4UL) /*!< ECAT DC_ACT: SYNC_1 (Bitfield-Mask: 0x01) */ + +/* ------------------------------ ECAT_DC_PULSE_LEN ----------------------------- */ +#define ECAT_DC_PULSE_LEN_PULS_LENGTH_Pos (0UL) /*!< ECAT DC_PULSE_LEN: PULS_LENGTH (Bit 0) */ +#define ECAT_DC_PULSE_LEN_PULS_LENGTH_Msk (0xffffUL) /*!< ECAT DC_PULSE_LEN: PULS_LENGTH (Bitfield-Mask: 0xffff) */ + +/* ------------------------------ ECAT_DC_ACT_STAT ------------------------------ */ +#define ECAT_DC_ACT_STAT_S0_ACK_STATE_Pos (0UL) /*!< ECAT DC_ACT_STAT: S0_ACK_STATE (Bit 0) */ +#define ECAT_DC_ACT_STAT_S0_ACK_STATE_Msk (0x1UL) /*!< ECAT DC_ACT_STAT: S0_ACK_STATE (Bitfield-Mask: 0x01) */ +#define ECAT_DC_ACT_STAT_S1_ACK_STATE_Pos (1UL) /*!< ECAT DC_ACT_STAT: S1_ACK_STATE (Bit 1) */ +#define ECAT_DC_ACT_STAT_S1_ACK_STATE_Msk (0x2UL) /*!< ECAT DC_ACT_STAT: S1_ACK_STATE (Bitfield-Mask: 0x01) */ +#define ECAT_DC_ACT_STAT_S_TIME_Pos (2UL) /*!< ECAT DC_ACT_STAT: S_TIME (Bit 2) */ +#define ECAT_DC_ACT_STAT_S_TIME_Msk (0x4UL) /*!< ECAT DC_ACT_STAT: S_TIME (Bitfield-Mask: 0x01) */ + +/* ----------------------------- ECAT_DC_SYNC0_STAT ----------------------------- */ +#define ECAT_DC_SYNC0_STAT_S0_STATE_Pos (0UL) /*!< ECAT DC_SYNC0_STAT: S0_STATE (Bit 0) */ +#define ECAT_DC_SYNC0_STAT_S0_STATE_Msk (0x1UL) /*!< ECAT DC_SYNC0_STAT: S0_STATE (Bitfield-Mask: 0x01) */ + +/* ----------------------------- ECAT_DC_SYNC1_STAT ----------------------------- */ +#define ECAT_DC_SYNC1_STAT_S1_STATE_Pos (0UL) /*!< ECAT DC_SYNC1_STAT: S1_STATE (Bit 0) */ +#define ECAT_DC_SYNC1_STAT_S1_STATE_Msk (0x1UL) /*!< ECAT DC_SYNC1_STAT: S1_STATE (Bitfield-Mask: 0x01) */ + +/* --------------------------- ECAT_DC_CYC_START_TIME --------------------------- */ +#define ECAT_DC_CYC_START_TIME_DC_CYC_START_TIME_Pos (0UL) /*!< ECAT DC_CYC_START_TIME: DC_CYC_START_TIME (Bit 0) */ +#define ECAT_DC_CYC_START_TIME_DC_CYC_START_TIME_Msk (0xffffffffUL) /*!< ECAT DC_CYC_START_TIME: DC_CYC_START_TIME (Bitfield-Mask: 0xffffffff) */ + +/* -------------------------- ECAT_DC_NEXT_SYNC1_PULSE -------------------------- */ +#define ECAT_DC_NEXT_SYNC1_PULSE_DC_NEXT_SYNC1_PULSE_Pos (0UL) /*!< ECAT DC_NEXT_SYNC1_PULSE: DC_NEXT_SYNC1_PULSE (Bit 0) */ +#define ECAT_DC_NEXT_SYNC1_PULSE_DC_NEXT_SYNC1_PULSE_Msk (0xffffffffUL) /*!< ECAT DC_NEXT_SYNC1_PULSE: DC_NEXT_SYNC1_PULSE (Bitfield-Mask: 0xffffffff) */ + +/* --------------------------- ECAT_DC_SYNC0_CYC_TIME --------------------------- */ +#define ECAT_DC_SYNC0_CYC_TIME_TIME_BETWEEN_SYNC0_Pos (0UL) /*!< ECAT DC_SYNC0_CYC_TIME: TIME_BETWEEN_SYNC0 (Bit 0) */ +#define ECAT_DC_SYNC0_CYC_TIME_TIME_BETWEEN_SYNC0_Msk (0xffffffffUL) /*!< ECAT DC_SYNC0_CYC_TIME: TIME_BETWEEN_SYNC0 (Bitfield-Mask: 0xffffffff) */ + +/* --------------------------- ECAT_DC_SYNC1_CYC_TIME --------------------------- */ +#define ECAT_DC_SYNC1_CYC_TIME_TIME_SYNC1_SYNC0_Pos (0UL) /*!< ECAT DC_SYNC1_CYC_TIME: TIME_SYNC1_SYNC0 (Bit 0) */ +#define ECAT_DC_SYNC1_CYC_TIME_TIME_SYNC1_SYNC0_Msk (0xffffffffUL) /*!< ECAT DC_SYNC1_CYC_TIME: TIME_SYNC1_SYNC0 (Bitfield-Mask: 0xffffffff) */ + +/* ----------------------------- ECAT_DC_LATCH0_CONT ---------------------------- */ +#define ECAT_DC_LATCH0_CONT_L0_POS_Pos (0UL) /*!< ECAT DC_LATCH0_CONT: L0_POS (Bit 0) */ +#define ECAT_DC_LATCH0_CONT_L0_POS_Msk (0x1UL) /*!< ECAT DC_LATCH0_CONT: L0_POS (Bitfield-Mask: 0x01) */ +#define ECAT_DC_LATCH0_CONT_L0_NEG_Pos (1UL) /*!< ECAT DC_LATCH0_CONT: L0_NEG (Bit 1) */ +#define ECAT_DC_LATCH0_CONT_L0_NEG_Msk (0x2UL) /*!< ECAT DC_LATCH0_CONT: L0_NEG (Bitfield-Mask: 0x01) */ + +/* ----------------------------- ECAT_DC_LATCH1_CONT ---------------------------- */ +#define ECAT_DC_LATCH1_CONT_L1_POS_Pos (0UL) /*!< ECAT DC_LATCH1_CONT: L1_POS (Bit 0) */ +#define ECAT_DC_LATCH1_CONT_L1_POS_Msk (0x1UL) /*!< ECAT DC_LATCH1_CONT: L1_POS (Bitfield-Mask: 0x01) */ +#define ECAT_DC_LATCH1_CONT_L1_NEG_Pos (1UL) /*!< ECAT DC_LATCH1_CONT: L1_NEG (Bit 1) */ +#define ECAT_DC_LATCH1_CONT_L1_NEG_Msk (0x2UL) /*!< ECAT DC_LATCH1_CONT: L1_NEG (Bitfield-Mask: 0x01) */ + +/* ----------------------------- ECAT_DC_LATCH0_STAT ---------------------------- */ +#define ECAT_DC_LATCH0_STAT_EV_L0_POS_Pos (0UL) /*!< ECAT DC_LATCH0_STAT: EV_L0_POS (Bit 0) */ +#define ECAT_DC_LATCH0_STAT_EV_L0_POS_Msk (0x1UL) /*!< ECAT DC_LATCH0_STAT: EV_L0_POS (Bitfield-Mask: 0x01) */ +#define ECAT_DC_LATCH0_STAT_EV_L0_NEG_Pos (1UL) /*!< ECAT DC_LATCH0_STAT: EV_L0_NEG (Bit 1) */ +#define ECAT_DC_LATCH0_STAT_EV_L0_NEG_Msk (0x2UL) /*!< ECAT DC_LATCH0_STAT: EV_L0_NEG (Bitfield-Mask: 0x01) */ +#define ECAT_DC_LATCH0_STAT_L0_PIN_Pos (2UL) /*!< ECAT DC_LATCH0_STAT: L0_PIN (Bit 2) */ +#define ECAT_DC_LATCH0_STAT_L0_PIN_Msk (0x4UL) /*!< ECAT DC_LATCH0_STAT: L0_PIN (Bitfield-Mask: 0x01) */ + +/* ----------------------------- ECAT_DC_LATCH1_STAT ---------------------------- */ +#define ECAT_DC_LATCH1_STAT_EV_L1_POS_Pos (0UL) /*!< ECAT DC_LATCH1_STAT: EV_L1_POS (Bit 0) */ +#define ECAT_DC_LATCH1_STAT_EV_L1_POS_Msk (0x1UL) /*!< ECAT DC_LATCH1_STAT: EV_L1_POS (Bitfield-Mask: 0x01) */ +#define ECAT_DC_LATCH1_STAT_EV_L1_NEG_Pos (1UL) /*!< ECAT DC_LATCH1_STAT: EV_L1_NEG (Bit 1) */ +#define ECAT_DC_LATCH1_STAT_EV_L1_NEG_Msk (0x2UL) /*!< ECAT DC_LATCH1_STAT: EV_L1_NEG (Bitfield-Mask: 0x01) */ +#define ECAT_DC_LATCH1_STAT_L1_PIN_Pos (2UL) /*!< ECAT DC_LATCH1_STAT: L1_PIN (Bit 2) */ +#define ECAT_DC_LATCH1_STAT_L1_PIN_Msk (0x4UL) /*!< ECAT DC_LATCH1_STAT: L1_PIN (Bitfield-Mask: 0x01) */ + +/* --------------------------- ECAT_DC_LATCH0_TIME_POS -------------------------- */ +#define ECAT_DC_LATCH0_TIME_POS_DC_LATCH0_TIME_POS_Pos (0UL) /*!< ECAT DC_LATCH0_TIME_POS: DC_LATCH0_TIME_POS (Bit 0) */ +#define ECAT_DC_LATCH0_TIME_POS_DC_LATCH0_TIME_POS_Msk (0xffffffffUL) /*!< ECAT DC_LATCH0_TIME_POS: DC_LATCH0_TIME_POS (Bitfield-Mask: 0xffffffff) */ + +/* --------------------------- ECAT_DC_LATCH0_TIME_NEG -------------------------- */ +#define ECAT_DC_LATCH0_TIME_NEG_DC_LATCH0_TIME_NEG_Pos (0UL) /*!< ECAT DC_LATCH0_TIME_NEG: DC_LATCH0_TIME_NEG (Bit 0) */ +#define ECAT_DC_LATCH0_TIME_NEG_DC_LATCH0_TIME_NEG_Msk (0xffffffffUL) /*!< ECAT DC_LATCH0_TIME_NEG: DC_LATCH0_TIME_NEG (Bitfield-Mask: 0xffffffff) */ + +/* --------------------------- ECAT_DC_LATCH1_TIME_POS -------------------------- */ +#define ECAT_DC_LATCH1_TIME_POS_DC_LATCH1_TIME_POS_Pos (0UL) /*!< ECAT DC_LATCH1_TIME_POS: DC_LATCH1_TIME_POS (Bit 0) */ +#define ECAT_DC_LATCH1_TIME_POS_DC_LATCH1_TIME_POS_Msk (0xffffffffUL) /*!< ECAT DC_LATCH1_TIME_POS: DC_LATCH1_TIME_POS (Bitfield-Mask: 0xffffffff) */ + +/* --------------------------- ECAT_DC_LATCH1_TIME_NEG -------------------------- */ +#define ECAT_DC_LATCH1_TIME_NEG_DC_LATCH1_TIME_NEG_Pos (0UL) /*!< ECAT DC_LATCH1_TIME_NEG: DC_LATCH1_TIME_NEG (Bit 0) */ +#define ECAT_DC_LATCH1_TIME_NEG_DC_LATCH1_TIME_NEG_Msk (0xffffffffUL) /*!< ECAT DC_LATCH1_TIME_NEG: DC_LATCH1_TIME_NEG (Bitfield-Mask: 0xffffffff) */ + +/* -------------------------- ECAT_DC_ECAT_CNG_EV_TIME -------------------------- */ +#define ECAT_DC_ECAT_CNG_EV_TIME_ECAT_CNG_EV_TIME_Pos (0UL) /*!< ECAT DC_ECAT_CNG_EV_TIME: ECAT_CNG_EV_TIME (Bit 0) */ +#define ECAT_DC_ECAT_CNG_EV_TIME_ECAT_CNG_EV_TIME_Msk (0xffffffffUL) /*!< ECAT DC_ECAT_CNG_EV_TIME: ECAT_CNG_EV_TIME (Bitfield-Mask: 0xffffffff) */ + +/* -------------------------- ECAT_DC_PDI_START_EV_TIME ------------------------- */ +#define ECAT_DC_PDI_START_EV_TIME_PDI_START_EV_TIME_Pos (0UL) /*!< ECAT DC_PDI_START_EV_TIME: PDI_START_EV_TIME (Bit 0) */ +#define ECAT_DC_PDI_START_EV_TIME_PDI_START_EV_TIME_Msk (0xffffffffUL) /*!< ECAT DC_PDI_START_EV_TIME: PDI_START_EV_TIME (Bitfield-Mask: 0xffffffff) */ + +/* --------------------------- ECAT_DC_PDI_CNG_EV_TIME -------------------------- */ +#define ECAT_DC_PDI_CNG_EV_TIME_PDI_CNG_EV_TIME_Pos (0UL) /*!< ECAT DC_PDI_CNG_EV_TIME: PDI_CNG_EV_TIME (Bit 0) */ +#define ECAT_DC_PDI_CNG_EV_TIME_PDI_CNG_EV_TIME_Msk (0xffffffffUL) /*!< ECAT DC_PDI_CNG_EV_TIME: PDI_CNG_EV_TIME (Bitfield-Mask: 0xffffffff) */ + +/* ----------------------------------- ECAT_ID ---------------------------------- */ +#define ECAT_ID_MOD_REV_Pos (0UL) /*!< ECAT ID: MOD_REV (Bit 0) */ +#define ECAT_ID_MOD_REV_Msk (0xffUL) /*!< ECAT ID: MOD_REV (Bitfield-Mask: 0xff) */ +#define ECAT_ID_MOD_TYPE_Pos (8UL) /*!< ECAT ID: MOD_TYPE (Bit 8) */ +#define ECAT_ID_MOD_TYPE_Msk (0xff00UL) /*!< ECAT ID: MOD_TYPE (Bitfield-Mask: 0xff) */ +#define ECAT_ID_MOD_NUMBER_Pos (16UL) /*!< ECAT ID: MOD_NUMBER (Bit 16) */ +#define ECAT_ID_MOD_NUMBER_Msk (0xffff0000UL) /*!< ECAT ID: MOD_NUMBER (Bitfield-Mask: 0xffff) */ + +/* --------------------------------- ECAT_STATUS -------------------------------- */ +#define ECAT_STATUS_PARERR_Pos (0UL) /*!< ECAT STATUS: PARERR (Bit 0) */ +#define ECAT_STATUS_PARERR_Msk (0x1UL) /*!< ECAT STATUS: PARERR (Bitfield-Mask: 0x01) */ + + +/* ================================================================================ */ +/* ================ Group 'USB' Position & Mask ================ */ +/* ================================================================================ */ + + +/* --------------------------------- USB_GOTGCTL -------------------------------- */ +#define USB_GOTGCTL_SesReqScs_Pos (0UL) /*!< USB GOTGCTL: SesReqScs (Bit 0) */ +#define USB_GOTGCTL_SesReqScs_Msk (0x1UL) /*!< USB GOTGCTL: SesReqScs (Bitfield-Mask: 0x01) */ +#define USB_GOTGCTL_SesReq_Pos (1UL) /*!< USB GOTGCTL: SesReq (Bit 1) */ +#define USB_GOTGCTL_SesReq_Msk (0x2UL) /*!< USB GOTGCTL: SesReq (Bitfield-Mask: 0x01) */ +#define USB_GOTGCTL_VbvalidOvEn_Pos (2UL) /*!< USB GOTGCTL: VbvalidOvEn (Bit 2) */ +#define USB_GOTGCTL_VbvalidOvEn_Msk (0x4UL) /*!< USB GOTGCTL: VbvalidOvEn (Bitfield-Mask: 0x01) */ +#define USB_GOTGCTL_VbvalidOvVal_Pos (3UL) /*!< USB GOTGCTL: VbvalidOvVal (Bit 3) */ +#define USB_GOTGCTL_VbvalidOvVal_Msk (0x8UL) /*!< USB GOTGCTL: VbvalidOvVal (Bitfield-Mask: 0x01) */ +#define USB_GOTGCTL_AvalidOvEn_Pos (4UL) /*!< USB GOTGCTL: AvalidOvEn (Bit 4) */ +#define USB_GOTGCTL_AvalidOvEn_Msk (0x10UL) /*!< USB GOTGCTL: AvalidOvEn (Bitfield-Mask: 0x01) */ +#define USB_GOTGCTL_AvalidOvVal_Pos (5UL) /*!< USB GOTGCTL: AvalidOvVal (Bit 5) */ +#define USB_GOTGCTL_AvalidOvVal_Msk (0x20UL) /*!< USB GOTGCTL: AvalidOvVal (Bitfield-Mask: 0x01) */ +#define USB_GOTGCTL_BvalidOvEn_Pos (6UL) /*!< USB GOTGCTL: BvalidOvEn (Bit 6) */ +#define USB_GOTGCTL_BvalidOvEn_Msk (0x40UL) /*!< USB GOTGCTL: BvalidOvEn (Bitfield-Mask: 0x01) */ +#define USB_GOTGCTL_BvalidOvVal_Pos (7UL) /*!< USB GOTGCTL: BvalidOvVal (Bit 7) */ +#define USB_GOTGCTL_BvalidOvVal_Msk (0x80UL) /*!< USB GOTGCTL: BvalidOvVal (Bitfield-Mask: 0x01) */ +#define USB_GOTGCTL_HstNegScs_Pos (8UL) /*!< USB GOTGCTL: HstNegScs (Bit 8) */ +#define USB_GOTGCTL_HstNegScs_Msk (0x100UL) /*!< USB GOTGCTL: HstNegScs (Bitfield-Mask: 0x01) */ +#define USB_GOTGCTL_HNPReq_Pos (9UL) /*!< USB GOTGCTL: HNPReq (Bit 9) */ +#define USB_GOTGCTL_HNPReq_Msk (0x200UL) /*!< USB GOTGCTL: HNPReq (Bitfield-Mask: 0x01) */ +#define USB_GOTGCTL_HstSetHNPEn_Pos (10UL) /*!< USB GOTGCTL: HstSetHNPEn (Bit 10) */ +#define USB_GOTGCTL_HstSetHNPEn_Msk (0x400UL) /*!< USB GOTGCTL: HstSetHNPEn (Bitfield-Mask: 0x01) */ +#define USB_GOTGCTL_DevHNPEn_Pos (11UL) /*!< USB GOTGCTL: DevHNPEn (Bit 11) */ +#define USB_GOTGCTL_DevHNPEn_Msk (0x800UL) /*!< USB GOTGCTL: DevHNPEn (Bitfield-Mask: 0x01) */ +#define USB_GOTGCTL_ConlDSts_Pos (16UL) /*!< USB GOTGCTL: ConlDSts (Bit 16) */ +#define USB_GOTGCTL_ConlDSts_Msk (0x10000UL) /*!< USB GOTGCTL: ConlDSts (Bitfield-Mask: 0x01) */ +#define USB_GOTGCTL_DbncTime_Pos (17UL) /*!< USB GOTGCTL: DbncTime (Bit 17) */ +#define USB_GOTGCTL_DbncTime_Msk (0x20000UL) /*!< USB GOTGCTL: DbncTime (Bitfield-Mask: 0x01) */ +#define USB_GOTGCTL_ASesVId_Pos (18UL) /*!< USB GOTGCTL: ASesVId (Bit 18) */ +#define USB_GOTGCTL_ASesVId_Msk (0x40000UL) /*!< USB GOTGCTL: ASesVId (Bitfield-Mask: 0x01) */ +#define USB_GOTGCTL_BSesVld_Pos (19UL) /*!< USB GOTGCTL: BSesVld (Bit 19) */ +#define USB_GOTGCTL_BSesVld_Msk (0x80000UL) /*!< USB GOTGCTL: BSesVld (Bitfield-Mask: 0x01) */ +#define USB_GOTGCTL_OTGVer_Pos (20UL) /*!< USB GOTGCTL: OTGVer (Bit 20) */ +#define USB_GOTGCTL_OTGVer_Msk (0x100000UL) /*!< USB GOTGCTL: OTGVer (Bitfield-Mask: 0x01) */ + +/* --------------------------------- USB_GOTGINT -------------------------------- */ +#define USB_GOTGINT_SesEndDet_Pos (2UL) /*!< USB GOTGINT: SesEndDet (Bit 2) */ +#define USB_GOTGINT_SesEndDet_Msk (0x4UL) /*!< USB GOTGINT: SesEndDet (Bitfield-Mask: 0x01) */ +#define USB_GOTGINT_SesReqSucStsChng_Pos (8UL) /*!< USB GOTGINT: SesReqSucStsChng (Bit 8) */ +#define USB_GOTGINT_SesReqSucStsChng_Msk (0x100UL) /*!< USB GOTGINT: SesReqSucStsChng (Bitfield-Mask: 0x01) */ +#define USB_GOTGINT_HstNegSucStsChng_Pos (9UL) /*!< USB GOTGINT: HstNegSucStsChng (Bit 9) */ +#define USB_GOTGINT_HstNegSucStsChng_Msk (0x200UL) /*!< USB GOTGINT: HstNegSucStsChng (Bitfield-Mask: 0x01) */ +#define USB_GOTGINT_HstNegDet_Pos (17UL) /*!< USB GOTGINT: HstNegDet (Bit 17) */ +#define USB_GOTGINT_HstNegDet_Msk (0x20000UL) /*!< USB GOTGINT: HstNegDet (Bitfield-Mask: 0x01) */ +#define USB_GOTGINT_ADevTOUTChg_Pos (18UL) /*!< USB GOTGINT: ADevTOUTChg (Bit 18) */ +#define USB_GOTGINT_ADevTOUTChg_Msk (0x40000UL) /*!< USB GOTGINT: ADevTOUTChg (Bitfield-Mask: 0x01) */ +#define USB_GOTGINT_DbnceDone_Pos (19UL) /*!< USB GOTGINT: DbnceDone (Bit 19) */ +#define USB_GOTGINT_DbnceDone_Msk (0x80000UL) /*!< USB GOTGINT: DbnceDone (Bitfield-Mask: 0x01) */ + +/* --------------------------------- USB_GAHBCFG -------------------------------- */ +#define USB_GAHBCFG_GlblIntrMsk_Pos (0UL) /*!< USB GAHBCFG: GlblIntrMsk (Bit 0) */ +#define USB_GAHBCFG_GlblIntrMsk_Msk (0x1UL) /*!< USB GAHBCFG: GlblIntrMsk (Bitfield-Mask: 0x01) */ +#define USB_GAHBCFG_HBstLen_Pos (1UL) /*!< USB GAHBCFG: HBstLen (Bit 1) */ +#define USB_GAHBCFG_HBstLen_Msk (0x1eUL) /*!< USB GAHBCFG: HBstLen (Bitfield-Mask: 0x0f) */ +#define USB_GAHBCFG_DMAEn_Pos (5UL) /*!< USB GAHBCFG: DMAEn (Bit 5) */ +#define USB_GAHBCFG_DMAEn_Msk (0x20UL) /*!< USB GAHBCFG: DMAEn (Bitfield-Mask: 0x01) */ +#define USB_GAHBCFG_NPTxFEmpLvl_Pos (7UL) /*!< USB GAHBCFG: NPTxFEmpLvl (Bit 7) */ +#define USB_GAHBCFG_NPTxFEmpLvl_Msk (0x80UL) /*!< USB GAHBCFG: NPTxFEmpLvl (Bitfield-Mask: 0x01) */ +#define USB_GAHBCFG_PTxFEmpLvl_Pos (8UL) /*!< USB GAHBCFG: PTxFEmpLvl (Bit 8) */ +#define USB_GAHBCFG_PTxFEmpLvl_Msk (0x100UL) /*!< USB GAHBCFG: PTxFEmpLvl (Bitfield-Mask: 0x01) */ +#define USB_GAHBCFG_AHBSingle_Pos (23UL) /*!< USB GAHBCFG: AHBSingle (Bit 23) */ +#define USB_GAHBCFG_AHBSingle_Msk (0x800000UL) /*!< USB GAHBCFG: AHBSingle (Bitfield-Mask: 0x01) */ + +/* --------------------------------- USB_GUSBCFG -------------------------------- */ +#define USB_GUSBCFG_TOutCal_Pos (0UL) /*!< USB GUSBCFG: TOutCal (Bit 0) */ +#define USB_GUSBCFG_TOutCal_Msk (0x7UL) /*!< USB GUSBCFG: TOutCal (Bitfield-Mask: 0x07) */ +#define USB_GUSBCFG_PHYSel_Pos (6UL) /*!< USB GUSBCFG: PHYSel (Bit 6) */ +#define USB_GUSBCFG_PHYSel_Msk (0x40UL) /*!< USB GUSBCFG: PHYSel (Bitfield-Mask: 0x01) */ +#define USB_GUSBCFG_SRPCap_Pos (8UL) /*!< USB GUSBCFG: SRPCap (Bit 8) */ +#define USB_GUSBCFG_SRPCap_Msk (0x100UL) /*!< USB GUSBCFG: SRPCap (Bitfield-Mask: 0x01) */ +#define USB_GUSBCFG_HNPCap_Pos (9UL) /*!< USB GUSBCFG: HNPCap (Bit 9) */ +#define USB_GUSBCFG_HNPCap_Msk (0x200UL) /*!< USB GUSBCFG: HNPCap (Bitfield-Mask: 0x01) */ +#define USB_GUSBCFG_USBTrdTim_Pos (10UL) /*!< USB GUSBCFG: USBTrdTim (Bit 10) */ +#define USB_GUSBCFG_USBTrdTim_Msk (0x3c00UL) /*!< USB GUSBCFG: USBTrdTim (Bitfield-Mask: 0x0f) */ +#define USB_GUSBCFG_OtgI2CSel_Pos (16UL) /*!< USB GUSBCFG: OtgI2CSel (Bit 16) */ +#define USB_GUSBCFG_OtgI2CSel_Msk (0x10000UL) /*!< USB GUSBCFG: OtgI2CSel (Bitfield-Mask: 0x01) */ +#define USB_GUSBCFG_TxEndDelay_Pos (28UL) /*!< USB GUSBCFG: TxEndDelay (Bit 28) */ +#define USB_GUSBCFG_TxEndDelay_Msk (0x10000000UL) /*!< USB GUSBCFG: TxEndDelay (Bitfield-Mask: 0x01) */ +#define USB_GUSBCFG_ForceHstMode_Pos (29UL) /*!< USB GUSBCFG: ForceHstMode (Bit 29) */ +#define USB_GUSBCFG_ForceHstMode_Msk (0x20000000UL) /*!< USB GUSBCFG: ForceHstMode (Bitfield-Mask: 0x01) */ +#define USB_GUSBCFG_ForceDevMode_Pos (30UL) /*!< USB GUSBCFG: ForceDevMode (Bit 30) */ +#define USB_GUSBCFG_ForceDevMode_Msk (0x40000000UL) /*!< USB GUSBCFG: ForceDevMode (Bitfield-Mask: 0x01) */ +#define USB_GUSBCFG_CTP_Pos (31UL) /*!< USB GUSBCFG: CTP (Bit 31) */ +#define USB_GUSBCFG_CTP_Msk (0x80000000UL) /*!< USB GUSBCFG: CTP (Bitfield-Mask: 0x01) */ + +/* --------------------------------- USB_GRSTCTL -------------------------------- */ +#define USB_GRSTCTL_CSftRst_Pos (0UL) /*!< USB GRSTCTL: CSftRst (Bit 0) */ +#define USB_GRSTCTL_CSftRst_Msk (0x1UL) /*!< USB GRSTCTL: CSftRst (Bitfield-Mask: 0x01) */ +#define USB_GRSTCTL_FrmCntrRst_Pos (2UL) /*!< USB GRSTCTL: FrmCntrRst (Bit 2) */ +#define USB_GRSTCTL_FrmCntrRst_Msk (0x4UL) /*!< USB GRSTCTL: FrmCntrRst (Bitfield-Mask: 0x01) */ +#define USB_GRSTCTL_RxFFlsh_Pos (4UL) /*!< USB GRSTCTL: RxFFlsh (Bit 4) */ +#define USB_GRSTCTL_RxFFlsh_Msk (0x10UL) /*!< USB GRSTCTL: RxFFlsh (Bitfield-Mask: 0x01) */ +#define USB_GRSTCTL_TxFFlsh_Pos (5UL) /*!< USB GRSTCTL: TxFFlsh (Bit 5) */ +#define USB_GRSTCTL_TxFFlsh_Msk (0x20UL) /*!< USB GRSTCTL: TxFFlsh (Bitfield-Mask: 0x01) */ +#define USB_GRSTCTL_TxFNum_Pos (6UL) /*!< USB GRSTCTL: TxFNum (Bit 6) */ +#define USB_GRSTCTL_TxFNum_Msk (0x7c0UL) /*!< USB GRSTCTL: TxFNum (Bitfield-Mask: 0x1f) */ +#define USB_GRSTCTL_DMAReq_Pos (30UL) /*!< USB GRSTCTL: DMAReq (Bit 30) */ +#define USB_GRSTCTL_DMAReq_Msk (0x40000000UL) /*!< USB GRSTCTL: DMAReq (Bitfield-Mask: 0x01) */ +#define USB_GRSTCTL_AHBIdle_Pos (31UL) /*!< USB GRSTCTL: AHBIdle (Bit 31) */ +#define USB_GRSTCTL_AHBIdle_Msk (0x80000000UL) /*!< USB GRSTCTL: AHBIdle (Bitfield-Mask: 0x01) */ + +/* ---------------------------- USB_GINTSTS_HOSTMODE ---------------------------- */ +#define USB_GINTSTS_HOSTMODE_CurMod_Pos (0UL) /*!< USB GINTSTS_HOSTMODE: CurMod (Bit 0) */ +#define USB_GINTSTS_HOSTMODE_CurMod_Msk (0x1UL) /*!< USB GINTSTS_HOSTMODE: CurMod (Bitfield-Mask: 0x01) */ +#define USB_GINTSTS_HOSTMODE_ModeMis_Pos (1UL) /*!< USB GINTSTS_HOSTMODE: ModeMis (Bit 1) */ +#define USB_GINTSTS_HOSTMODE_ModeMis_Msk (0x2UL) /*!< USB GINTSTS_HOSTMODE: ModeMis (Bitfield-Mask: 0x01) */ +#define USB_GINTSTS_HOSTMODE_OTGInt_Pos (2UL) /*!< USB GINTSTS_HOSTMODE: OTGInt (Bit 2) */ +#define USB_GINTSTS_HOSTMODE_OTGInt_Msk (0x4UL) /*!< USB GINTSTS_HOSTMODE: OTGInt (Bitfield-Mask: 0x01) */ +#define USB_GINTSTS_HOSTMODE_Sof_Pos (3UL) /*!< USB GINTSTS_HOSTMODE: Sof (Bit 3) */ +#define USB_GINTSTS_HOSTMODE_Sof_Msk (0x8UL) /*!< USB GINTSTS_HOSTMODE: Sof (Bitfield-Mask: 0x01) */ +#define USB_GINTSTS_HOSTMODE_RxFLvl_Pos (4UL) /*!< USB GINTSTS_HOSTMODE: RxFLvl (Bit 4) */ +#define USB_GINTSTS_HOSTMODE_RxFLvl_Msk (0x10UL) /*!< USB GINTSTS_HOSTMODE: RxFLvl (Bitfield-Mask: 0x01) */ +#define USB_GINTSTS_HOSTMODE_incomplP_Pos (21UL) /*!< USB GINTSTS_HOSTMODE: incomplP (Bit 21) */ +#define USB_GINTSTS_HOSTMODE_incomplP_Msk (0x200000UL) /*!< USB GINTSTS_HOSTMODE: incomplP (Bitfield-Mask: 0x01) */ +#define USB_GINTSTS_HOSTMODE_PrtInt_Pos (24UL) /*!< USB GINTSTS_HOSTMODE: PrtInt (Bit 24) */ +#define USB_GINTSTS_HOSTMODE_PrtInt_Msk (0x1000000UL) /*!< USB GINTSTS_HOSTMODE: PrtInt (Bitfield-Mask: 0x01) */ +#define USB_GINTSTS_HOSTMODE_HChInt_Pos (25UL) /*!< USB GINTSTS_HOSTMODE: HChInt (Bit 25) */ +#define USB_GINTSTS_HOSTMODE_HChInt_Msk (0x2000000UL) /*!< USB GINTSTS_HOSTMODE: HChInt (Bitfield-Mask: 0x01) */ +#define USB_GINTSTS_HOSTMODE_PTxFEmp_Pos (26UL) /*!< USB GINTSTS_HOSTMODE: PTxFEmp (Bit 26) */ +#define USB_GINTSTS_HOSTMODE_PTxFEmp_Msk (0x4000000UL) /*!< USB GINTSTS_HOSTMODE: PTxFEmp (Bitfield-Mask: 0x01) */ +#define USB_GINTSTS_HOSTMODE_ConIDStsChng_Pos (28UL) /*!< USB GINTSTS_HOSTMODE: ConIDStsChng (Bit 28) */ +#define USB_GINTSTS_HOSTMODE_ConIDStsChng_Msk (0x10000000UL) /*!< USB GINTSTS_HOSTMODE: ConIDStsChng (Bitfield-Mask: 0x01) */ +#define USB_GINTSTS_HOSTMODE_DisconnInt_Pos (29UL) /*!< USB GINTSTS_HOSTMODE: DisconnInt (Bit 29) */ +#define USB_GINTSTS_HOSTMODE_DisconnInt_Msk (0x20000000UL) /*!< USB GINTSTS_HOSTMODE: DisconnInt (Bitfield-Mask: 0x01) */ +#define USB_GINTSTS_HOSTMODE_SessReqInt_Pos (30UL) /*!< USB GINTSTS_HOSTMODE: SessReqInt (Bit 30) */ +#define USB_GINTSTS_HOSTMODE_SessReqInt_Msk (0x40000000UL) /*!< USB GINTSTS_HOSTMODE: SessReqInt (Bitfield-Mask: 0x01) */ +#define USB_GINTSTS_HOSTMODE_WkUpInt_Pos (31UL) /*!< USB GINTSTS_HOSTMODE: WkUpInt (Bit 31) */ +#define USB_GINTSTS_HOSTMODE_WkUpInt_Msk (0x80000000UL) /*!< USB GINTSTS_HOSTMODE: WkUpInt (Bitfield-Mask: 0x01) */ + +/* --------------------------- USB_GINTSTS_DEVICEMODE --------------------------- */ +#define USB_GINTSTS_DEVICEMODE_CurMod_Pos (0UL) /*!< USB GINTSTS_DEVICEMODE: CurMod (Bit 0) */ +#define USB_GINTSTS_DEVICEMODE_CurMod_Msk (0x1UL) /*!< USB GINTSTS_DEVICEMODE: CurMod (Bitfield-Mask: 0x01) */ +#define USB_GINTSTS_DEVICEMODE_ModeMis_Pos (1UL) /*!< USB GINTSTS_DEVICEMODE: ModeMis (Bit 1) */ +#define USB_GINTSTS_DEVICEMODE_ModeMis_Msk (0x2UL) /*!< USB GINTSTS_DEVICEMODE: ModeMis (Bitfield-Mask: 0x01) */ +#define USB_GINTSTS_DEVICEMODE_OTGInt_Pos (2UL) /*!< USB GINTSTS_DEVICEMODE: OTGInt (Bit 2) */ +#define USB_GINTSTS_DEVICEMODE_OTGInt_Msk (0x4UL) /*!< USB GINTSTS_DEVICEMODE: OTGInt (Bitfield-Mask: 0x01) */ +#define USB_GINTSTS_DEVICEMODE_Sof_Pos (3UL) /*!< USB GINTSTS_DEVICEMODE: Sof (Bit 3) */ +#define USB_GINTSTS_DEVICEMODE_Sof_Msk (0x8UL) /*!< USB GINTSTS_DEVICEMODE: Sof (Bitfield-Mask: 0x01) */ +#define USB_GINTSTS_DEVICEMODE_RxFLvl_Pos (4UL) /*!< USB GINTSTS_DEVICEMODE: RxFLvl (Bit 4) */ +#define USB_GINTSTS_DEVICEMODE_RxFLvl_Msk (0x10UL) /*!< USB GINTSTS_DEVICEMODE: RxFLvl (Bitfield-Mask: 0x01) */ +#define USB_GINTSTS_DEVICEMODE_GINNakEff_Pos (6UL) /*!< USB GINTSTS_DEVICEMODE: GINNakEff (Bit 6) */ +#define USB_GINTSTS_DEVICEMODE_GINNakEff_Msk (0x40UL) /*!< USB GINTSTS_DEVICEMODE: GINNakEff (Bitfield-Mask: 0x01) */ +#define USB_GINTSTS_DEVICEMODE_GOUTNakEff_Pos (7UL) /*!< USB GINTSTS_DEVICEMODE: GOUTNakEff (Bit 7) */ +#define USB_GINTSTS_DEVICEMODE_GOUTNakEff_Msk (0x80UL) /*!< USB GINTSTS_DEVICEMODE: GOUTNakEff (Bitfield-Mask: 0x01) */ +#define USB_GINTSTS_DEVICEMODE_ErlySusp_Pos (10UL) /*!< USB GINTSTS_DEVICEMODE: ErlySusp (Bit 10) */ +#define USB_GINTSTS_DEVICEMODE_ErlySusp_Msk (0x400UL) /*!< USB GINTSTS_DEVICEMODE: ErlySusp (Bitfield-Mask: 0x01) */ +#define USB_GINTSTS_DEVICEMODE_USBSusp_Pos (11UL) /*!< USB GINTSTS_DEVICEMODE: USBSusp (Bit 11) */ +#define USB_GINTSTS_DEVICEMODE_USBSusp_Msk (0x800UL) /*!< USB GINTSTS_DEVICEMODE: USBSusp (Bitfield-Mask: 0x01) */ +#define USB_GINTSTS_DEVICEMODE_USBRst_Pos (12UL) /*!< USB GINTSTS_DEVICEMODE: USBRst (Bit 12) */ +#define USB_GINTSTS_DEVICEMODE_USBRst_Msk (0x1000UL) /*!< USB GINTSTS_DEVICEMODE: USBRst (Bitfield-Mask: 0x01) */ +#define USB_GINTSTS_DEVICEMODE_EnumDone_Pos (13UL) /*!< USB GINTSTS_DEVICEMODE: EnumDone (Bit 13) */ +#define USB_GINTSTS_DEVICEMODE_EnumDone_Msk (0x2000UL) /*!< USB GINTSTS_DEVICEMODE: EnumDone (Bitfield-Mask: 0x01) */ +#define USB_GINTSTS_DEVICEMODE_ISOOutDrop_Pos (14UL) /*!< USB GINTSTS_DEVICEMODE: ISOOutDrop (Bit 14) */ +#define USB_GINTSTS_DEVICEMODE_ISOOutDrop_Msk (0x4000UL) /*!< USB GINTSTS_DEVICEMODE: ISOOutDrop (Bitfield-Mask: 0x01) */ +#define USB_GINTSTS_DEVICEMODE_EOPF_Pos (15UL) /*!< USB GINTSTS_DEVICEMODE: EOPF (Bit 15) */ +#define USB_GINTSTS_DEVICEMODE_EOPF_Msk (0x8000UL) /*!< USB GINTSTS_DEVICEMODE: EOPF (Bitfield-Mask: 0x01) */ +#define USB_GINTSTS_DEVICEMODE_IEPInt_Pos (18UL) /*!< USB GINTSTS_DEVICEMODE: IEPInt (Bit 18) */ +#define USB_GINTSTS_DEVICEMODE_IEPInt_Msk (0x40000UL) /*!< USB GINTSTS_DEVICEMODE: IEPInt (Bitfield-Mask: 0x01) */ +#define USB_GINTSTS_DEVICEMODE_OEPInt_Pos (19UL) /*!< USB GINTSTS_DEVICEMODE: OEPInt (Bit 19) */ +#define USB_GINTSTS_DEVICEMODE_OEPInt_Msk (0x80000UL) /*!< USB GINTSTS_DEVICEMODE: OEPInt (Bitfield-Mask: 0x01) */ +#define USB_GINTSTS_DEVICEMODE_incompISOIN_Pos (20UL) /*!< USB GINTSTS_DEVICEMODE: incompISOIN (Bit 20) */ +#define USB_GINTSTS_DEVICEMODE_incompISOIN_Msk (0x100000UL) /*!< USB GINTSTS_DEVICEMODE: incompISOIN (Bitfield-Mask: 0x01) */ +#define USB_GINTSTS_DEVICEMODE_incomplSOOUT_Pos (21UL) /*!< USB GINTSTS_DEVICEMODE: incomplSOOUT (Bit 21) */ +#define USB_GINTSTS_DEVICEMODE_incomplSOOUT_Msk (0x200000UL) /*!< USB GINTSTS_DEVICEMODE: incomplSOOUT (Bitfield-Mask: 0x01) */ +#define USB_GINTSTS_DEVICEMODE_ConIDStsChng_Pos (28UL) /*!< USB GINTSTS_DEVICEMODE: ConIDStsChng (Bit 28) */ +#define USB_GINTSTS_DEVICEMODE_ConIDStsChng_Msk (0x10000000UL) /*!< USB GINTSTS_DEVICEMODE: ConIDStsChng (Bitfield-Mask: 0x01) */ +#define USB_GINTSTS_DEVICEMODE_SessReqInt_Pos (30UL) /*!< USB GINTSTS_DEVICEMODE: SessReqInt (Bit 30) */ +#define USB_GINTSTS_DEVICEMODE_SessReqInt_Msk (0x40000000UL) /*!< USB GINTSTS_DEVICEMODE: SessReqInt (Bitfield-Mask: 0x01) */ +#define USB_GINTSTS_DEVICEMODE_WkUpInt_Pos (31UL) /*!< USB GINTSTS_DEVICEMODE: WkUpInt (Bit 31) */ +#define USB_GINTSTS_DEVICEMODE_WkUpInt_Msk (0x80000000UL) /*!< USB GINTSTS_DEVICEMODE: WkUpInt (Bitfield-Mask: 0x01) */ + +/* ---------------------------- USB_GINTMSK_HOSTMODE ---------------------------- */ +#define USB_GINTMSK_HOSTMODE_ModeMisMsk_Pos (1UL) /*!< USB GINTMSK_HOSTMODE: ModeMisMsk (Bit 1) */ +#define USB_GINTMSK_HOSTMODE_ModeMisMsk_Msk (0x2UL) /*!< USB GINTMSK_HOSTMODE: ModeMisMsk (Bitfield-Mask: 0x01) */ +#define USB_GINTMSK_HOSTMODE_OTGIntMsk_Pos (2UL) /*!< USB GINTMSK_HOSTMODE: OTGIntMsk (Bit 2) */ +#define USB_GINTMSK_HOSTMODE_OTGIntMsk_Msk (0x4UL) /*!< USB GINTMSK_HOSTMODE: OTGIntMsk (Bitfield-Mask: 0x01) */ +#define USB_GINTMSK_HOSTMODE_SofMsk_Pos (3UL) /*!< USB GINTMSK_HOSTMODE: SofMsk (Bit 3) */ +#define USB_GINTMSK_HOSTMODE_SofMsk_Msk (0x8UL) /*!< USB GINTMSK_HOSTMODE: SofMsk (Bitfield-Mask: 0x01) */ +#define USB_GINTMSK_HOSTMODE_RxFLvlMsk_Pos (4UL) /*!< USB GINTMSK_HOSTMODE: RxFLvlMsk (Bit 4) */ +#define USB_GINTMSK_HOSTMODE_RxFLvlMsk_Msk (0x10UL) /*!< USB GINTMSK_HOSTMODE: RxFLvlMsk (Bitfield-Mask: 0x01) */ +#define USB_GINTMSK_HOSTMODE_incomplPMsk_Pos (21UL) /*!< USB GINTMSK_HOSTMODE: incomplPMsk (Bit 21) */ +#define USB_GINTMSK_HOSTMODE_incomplPMsk_Msk (0x200000UL) /*!< USB GINTMSK_HOSTMODE: incomplPMsk (Bitfield-Mask: 0x01) */ +#define USB_GINTMSK_HOSTMODE_PrtIntMsk_Pos (24UL) /*!< USB GINTMSK_HOSTMODE: PrtIntMsk (Bit 24) */ +#define USB_GINTMSK_HOSTMODE_PrtIntMsk_Msk (0x1000000UL) /*!< USB GINTMSK_HOSTMODE: PrtIntMsk (Bitfield-Mask: 0x01) */ +#define USB_GINTMSK_HOSTMODE_HChIntMsk_Pos (25UL) /*!< USB GINTMSK_HOSTMODE: HChIntMsk (Bit 25) */ +#define USB_GINTMSK_HOSTMODE_HChIntMsk_Msk (0x2000000UL) /*!< USB GINTMSK_HOSTMODE: HChIntMsk (Bitfield-Mask: 0x01) */ +#define USB_GINTMSK_HOSTMODE_PTxFEmpMsk_Pos (26UL) /*!< USB GINTMSK_HOSTMODE: PTxFEmpMsk (Bit 26) */ +#define USB_GINTMSK_HOSTMODE_PTxFEmpMsk_Msk (0x4000000UL) /*!< USB GINTMSK_HOSTMODE: PTxFEmpMsk (Bitfield-Mask: 0x01) */ +#define USB_GINTMSK_HOSTMODE_ConIDStsChngMsk_Pos (28UL) /*!< USB GINTMSK_HOSTMODE: ConIDStsChngMsk (Bit 28) */ +#define USB_GINTMSK_HOSTMODE_ConIDStsChngMsk_Msk (0x10000000UL) /*!< USB GINTMSK_HOSTMODE: ConIDStsChngMsk (Bitfield-Mask: 0x01) */ +#define USB_GINTMSK_HOSTMODE_DisconnIntMsk_Pos (29UL) /*!< USB GINTMSK_HOSTMODE: DisconnIntMsk (Bit 29) */ +#define USB_GINTMSK_HOSTMODE_DisconnIntMsk_Msk (0x20000000UL) /*!< USB GINTMSK_HOSTMODE: DisconnIntMsk (Bitfield-Mask: 0x01) */ +#define USB_GINTMSK_HOSTMODE_SessReqIntMsk_Pos (30UL) /*!< USB GINTMSK_HOSTMODE: SessReqIntMsk (Bit 30) */ +#define USB_GINTMSK_HOSTMODE_SessReqIntMsk_Msk (0x40000000UL) /*!< USB GINTMSK_HOSTMODE: SessReqIntMsk (Bitfield-Mask: 0x01) */ +#define USB_GINTMSK_HOSTMODE_WkUpIntMsk_Pos (31UL) /*!< USB GINTMSK_HOSTMODE: WkUpIntMsk (Bit 31) */ +#define USB_GINTMSK_HOSTMODE_WkUpIntMsk_Msk (0x80000000UL) /*!< USB GINTMSK_HOSTMODE: WkUpIntMsk (Bitfield-Mask: 0x01) */ + +/* --------------------------- USB_GINTMSK_DEVICEMODE --------------------------- */ +#define USB_GINTMSK_DEVICEMODE_ModeMisMsk_Pos (1UL) /*!< USB GINTMSK_DEVICEMODE: ModeMisMsk (Bit 1) */ +#define USB_GINTMSK_DEVICEMODE_ModeMisMsk_Msk (0x2UL) /*!< USB GINTMSK_DEVICEMODE: ModeMisMsk (Bitfield-Mask: 0x01) */ +#define USB_GINTMSK_DEVICEMODE_OTGIntMsk_Pos (2UL) /*!< USB GINTMSK_DEVICEMODE: OTGIntMsk (Bit 2) */ +#define USB_GINTMSK_DEVICEMODE_OTGIntMsk_Msk (0x4UL) /*!< USB GINTMSK_DEVICEMODE: OTGIntMsk (Bitfield-Mask: 0x01) */ +#define USB_GINTMSK_DEVICEMODE_SofMsk_Pos (3UL) /*!< USB GINTMSK_DEVICEMODE: SofMsk (Bit 3) */ +#define USB_GINTMSK_DEVICEMODE_SofMsk_Msk (0x8UL) /*!< USB GINTMSK_DEVICEMODE: SofMsk (Bitfield-Mask: 0x01) */ +#define USB_GINTMSK_DEVICEMODE_RxFLvlMsk_Pos (4UL) /*!< USB GINTMSK_DEVICEMODE: RxFLvlMsk (Bit 4) */ +#define USB_GINTMSK_DEVICEMODE_RxFLvlMsk_Msk (0x10UL) /*!< USB GINTMSK_DEVICEMODE: RxFLvlMsk (Bitfield-Mask: 0x01) */ +#define USB_GINTMSK_DEVICEMODE_GINNakEffMsk_Pos (6UL) /*!< USB GINTMSK_DEVICEMODE: GINNakEffMsk (Bit 6) */ +#define USB_GINTMSK_DEVICEMODE_GINNakEffMsk_Msk (0x40UL) /*!< USB GINTMSK_DEVICEMODE: GINNakEffMsk (Bitfield-Mask: 0x01) */ +#define USB_GINTMSK_DEVICEMODE_GOUTNakEffMsk_Pos (7UL) /*!< USB GINTMSK_DEVICEMODE: GOUTNakEffMsk (Bit 7) */ +#define USB_GINTMSK_DEVICEMODE_GOUTNakEffMsk_Msk (0x80UL) /*!< USB GINTMSK_DEVICEMODE: GOUTNakEffMsk (Bitfield-Mask: 0x01) */ +#define USB_GINTMSK_DEVICEMODE_ErlySuspMsk_Pos (10UL) /*!< USB GINTMSK_DEVICEMODE: ErlySuspMsk (Bit 10) */ +#define USB_GINTMSK_DEVICEMODE_ErlySuspMsk_Msk (0x400UL) /*!< USB GINTMSK_DEVICEMODE: ErlySuspMsk (Bitfield-Mask: 0x01) */ +#define USB_GINTMSK_DEVICEMODE_USBSuspMsk_Pos (11UL) /*!< USB GINTMSK_DEVICEMODE: USBSuspMsk (Bit 11) */ +#define USB_GINTMSK_DEVICEMODE_USBSuspMsk_Msk (0x800UL) /*!< USB GINTMSK_DEVICEMODE: USBSuspMsk (Bitfield-Mask: 0x01) */ +#define USB_GINTMSK_DEVICEMODE_USBRstMsk_Pos (12UL) /*!< USB GINTMSK_DEVICEMODE: USBRstMsk (Bit 12) */ +#define USB_GINTMSK_DEVICEMODE_USBRstMsk_Msk (0x1000UL) /*!< USB GINTMSK_DEVICEMODE: USBRstMsk (Bitfield-Mask: 0x01) */ +#define USB_GINTMSK_DEVICEMODE_EnumDoneMsk_Pos (13UL) /*!< USB GINTMSK_DEVICEMODE: EnumDoneMsk (Bit 13) */ +#define USB_GINTMSK_DEVICEMODE_EnumDoneMsk_Msk (0x2000UL) /*!< USB GINTMSK_DEVICEMODE: EnumDoneMsk (Bitfield-Mask: 0x01) */ +#define USB_GINTMSK_DEVICEMODE_ISOOutDropMsk_Pos (14UL) /*!< USB GINTMSK_DEVICEMODE: ISOOutDropMsk (Bit 14) */ +#define USB_GINTMSK_DEVICEMODE_ISOOutDropMsk_Msk (0x4000UL) /*!< USB GINTMSK_DEVICEMODE: ISOOutDropMsk (Bitfield-Mask: 0x01) */ +#define USB_GINTMSK_DEVICEMODE_EOPFMsk_Pos (15UL) /*!< USB GINTMSK_DEVICEMODE: EOPFMsk (Bit 15) */ +#define USB_GINTMSK_DEVICEMODE_EOPFMsk_Msk (0x8000UL) /*!< USB GINTMSK_DEVICEMODE: EOPFMsk (Bitfield-Mask: 0x01) */ +#define USB_GINTMSK_DEVICEMODE_IEPIntMsk_Pos (18UL) /*!< USB GINTMSK_DEVICEMODE: IEPIntMsk (Bit 18) */ +#define USB_GINTMSK_DEVICEMODE_IEPIntMsk_Msk (0x40000UL) /*!< USB GINTMSK_DEVICEMODE: IEPIntMsk (Bitfield-Mask: 0x01) */ +#define USB_GINTMSK_DEVICEMODE_OEPIntMsk_Pos (19UL) /*!< USB GINTMSK_DEVICEMODE: OEPIntMsk (Bit 19) */ +#define USB_GINTMSK_DEVICEMODE_OEPIntMsk_Msk (0x80000UL) /*!< USB GINTMSK_DEVICEMODE: OEPIntMsk (Bitfield-Mask: 0x01) */ +#define USB_GINTMSK_DEVICEMODE_incompISOINMsk_Pos (20UL) /*!< USB GINTMSK_DEVICEMODE: incompISOINMsk (Bit 20) */ +#define USB_GINTMSK_DEVICEMODE_incompISOINMsk_Msk (0x100000UL) /*!< USB GINTMSK_DEVICEMODE: incompISOINMsk (Bitfield-Mask: 0x01) */ +#define USB_GINTMSK_DEVICEMODE_incomplSOOUTMsk_Pos (21UL) /*!< USB GINTMSK_DEVICEMODE: incomplSOOUTMsk (Bit 21) */ +#define USB_GINTMSK_DEVICEMODE_incomplSOOUTMsk_Msk (0x200000UL) /*!< USB GINTMSK_DEVICEMODE: incomplSOOUTMsk (Bitfield-Mask: 0x01) */ +#define USB_GINTMSK_DEVICEMODE_ConIDStsChngMsk_Pos (28UL) /*!< USB GINTMSK_DEVICEMODE: ConIDStsChngMsk (Bit 28) */ +#define USB_GINTMSK_DEVICEMODE_ConIDStsChngMsk_Msk (0x10000000UL) /*!< USB GINTMSK_DEVICEMODE: ConIDStsChngMsk (Bitfield-Mask: 0x01) */ +#define USB_GINTMSK_DEVICEMODE_DisconnIntMsk_Pos (29UL) /*!< USB GINTMSK_DEVICEMODE: DisconnIntMsk (Bit 29) */ +#define USB_GINTMSK_DEVICEMODE_DisconnIntMsk_Msk (0x20000000UL) /*!< USB GINTMSK_DEVICEMODE: DisconnIntMsk (Bitfield-Mask: 0x01) */ +#define USB_GINTMSK_DEVICEMODE_SessReqIntMsk_Pos (30UL) /*!< USB GINTMSK_DEVICEMODE: SessReqIntMsk (Bit 30) */ +#define USB_GINTMSK_DEVICEMODE_SessReqIntMsk_Msk (0x40000000UL) /*!< USB GINTMSK_DEVICEMODE: SessReqIntMsk (Bitfield-Mask: 0x01) */ +#define USB_GINTMSK_DEVICEMODE_WkUpIntMsk_Pos (31UL) /*!< USB GINTMSK_DEVICEMODE: WkUpIntMsk (Bit 31) */ +#define USB_GINTMSK_DEVICEMODE_WkUpIntMsk_Msk (0x80000000UL) /*!< USB GINTMSK_DEVICEMODE: WkUpIntMsk (Bitfield-Mask: 0x01) */ + +/* ---------------------------- USB_GRXSTSR_HOSTMODE ---------------------------- */ +#define USB_GRXSTSR_HOSTMODE_ChNum_Pos (0UL) /*!< USB GRXSTSR_HOSTMODE: ChNum (Bit 0) */ +#define USB_GRXSTSR_HOSTMODE_ChNum_Msk (0xfUL) /*!< USB GRXSTSR_HOSTMODE: ChNum (Bitfield-Mask: 0x0f) */ +#define USB_GRXSTSR_HOSTMODE_BCnt_Pos (4UL) /*!< USB GRXSTSR_HOSTMODE: BCnt (Bit 4) */ +#define USB_GRXSTSR_HOSTMODE_BCnt_Msk (0x7ff0UL) /*!< USB GRXSTSR_HOSTMODE: BCnt (Bitfield-Mask: 0x7ff) */ +#define USB_GRXSTSR_HOSTMODE_DPID_Pos (15UL) /*!< USB GRXSTSR_HOSTMODE: DPID (Bit 15) */ +#define USB_GRXSTSR_HOSTMODE_DPID_Msk (0x18000UL) /*!< USB GRXSTSR_HOSTMODE: DPID (Bitfield-Mask: 0x03) */ +#define USB_GRXSTSR_HOSTMODE_PktSts_Pos (17UL) /*!< USB GRXSTSR_HOSTMODE: PktSts (Bit 17) */ +#define USB_GRXSTSR_HOSTMODE_PktSts_Msk (0x1e0000UL) /*!< USB GRXSTSR_HOSTMODE: PktSts (Bitfield-Mask: 0x0f) */ + +/* --------------------------- USB_GRXSTSR_DEVICEMODE --------------------------- */ +#define USB_GRXSTSR_DEVICEMODE_EPNum_Pos (0UL) /*!< USB GRXSTSR_DEVICEMODE: EPNum (Bit 0) */ +#define USB_GRXSTSR_DEVICEMODE_EPNum_Msk (0xfUL) /*!< USB GRXSTSR_DEVICEMODE: EPNum (Bitfield-Mask: 0x0f) */ +#define USB_GRXSTSR_DEVICEMODE_BCnt_Pos (4UL) /*!< USB GRXSTSR_DEVICEMODE: BCnt (Bit 4) */ +#define USB_GRXSTSR_DEVICEMODE_BCnt_Msk (0x7ff0UL) /*!< USB GRXSTSR_DEVICEMODE: BCnt (Bitfield-Mask: 0x7ff) */ +#define USB_GRXSTSR_DEVICEMODE_DPID_Pos (15UL) /*!< USB GRXSTSR_DEVICEMODE: DPID (Bit 15) */ +#define USB_GRXSTSR_DEVICEMODE_DPID_Msk (0x18000UL) /*!< USB GRXSTSR_DEVICEMODE: DPID (Bitfield-Mask: 0x03) */ +#define USB_GRXSTSR_DEVICEMODE_PktSts_Pos (17UL) /*!< USB GRXSTSR_DEVICEMODE: PktSts (Bit 17) */ +#define USB_GRXSTSR_DEVICEMODE_PktSts_Msk (0x1e0000UL) /*!< USB GRXSTSR_DEVICEMODE: PktSts (Bitfield-Mask: 0x0f) */ +#define USB_GRXSTSR_DEVICEMODE_FN_Pos (21UL) /*!< USB GRXSTSR_DEVICEMODE: FN (Bit 21) */ +#define USB_GRXSTSR_DEVICEMODE_FN_Msk (0x1e00000UL) /*!< USB GRXSTSR_DEVICEMODE: FN (Bitfield-Mask: 0x0f) */ + +/* --------------------------- USB_GRXSTSP_DEVICEMODE --------------------------- */ +#define USB_GRXSTSP_DEVICEMODE_EPNum_Pos (0UL) /*!< USB GRXSTSP_DEVICEMODE: EPNum (Bit 0) */ +#define USB_GRXSTSP_DEVICEMODE_EPNum_Msk (0xfUL) /*!< USB GRXSTSP_DEVICEMODE: EPNum (Bitfield-Mask: 0x0f) */ +#define USB_GRXSTSP_DEVICEMODE_BCnt_Pos (4UL) /*!< USB GRXSTSP_DEVICEMODE: BCnt (Bit 4) */ +#define USB_GRXSTSP_DEVICEMODE_BCnt_Msk (0x7ff0UL) /*!< USB GRXSTSP_DEVICEMODE: BCnt (Bitfield-Mask: 0x7ff) */ +#define USB_GRXSTSP_DEVICEMODE_DPID_Pos (15UL) /*!< USB GRXSTSP_DEVICEMODE: DPID (Bit 15) */ +#define USB_GRXSTSP_DEVICEMODE_DPID_Msk (0x18000UL) /*!< USB GRXSTSP_DEVICEMODE: DPID (Bitfield-Mask: 0x03) */ +#define USB_GRXSTSP_DEVICEMODE_PktSts_Pos (17UL) /*!< USB GRXSTSP_DEVICEMODE: PktSts (Bit 17) */ +#define USB_GRXSTSP_DEVICEMODE_PktSts_Msk (0x1e0000UL) /*!< USB GRXSTSP_DEVICEMODE: PktSts (Bitfield-Mask: 0x0f) */ +#define USB_GRXSTSP_DEVICEMODE_FN_Pos (21UL) /*!< USB GRXSTSP_DEVICEMODE: FN (Bit 21) */ +#define USB_GRXSTSP_DEVICEMODE_FN_Msk (0x1e00000UL) /*!< USB GRXSTSP_DEVICEMODE: FN (Bitfield-Mask: 0x0f) */ + +/* ---------------------------- USB_GRXSTSP_HOSTMODE ---------------------------- */ +#define USB_GRXSTSP_HOSTMODE_ChNum_Pos (0UL) /*!< USB GRXSTSP_HOSTMODE: ChNum (Bit 0) */ +#define USB_GRXSTSP_HOSTMODE_ChNum_Msk (0xfUL) /*!< USB GRXSTSP_HOSTMODE: ChNum (Bitfield-Mask: 0x0f) */ +#define USB_GRXSTSP_HOSTMODE_BCnt_Pos (4UL) /*!< USB GRXSTSP_HOSTMODE: BCnt (Bit 4) */ +#define USB_GRXSTSP_HOSTMODE_BCnt_Msk (0x7ff0UL) /*!< USB GRXSTSP_HOSTMODE: BCnt (Bitfield-Mask: 0x7ff) */ +#define USB_GRXSTSP_HOSTMODE_DPID_Pos (15UL) /*!< USB GRXSTSP_HOSTMODE: DPID (Bit 15) */ +#define USB_GRXSTSP_HOSTMODE_DPID_Msk (0x18000UL) /*!< USB GRXSTSP_HOSTMODE: DPID (Bitfield-Mask: 0x03) */ +#define USB_GRXSTSP_HOSTMODE_PktSts_Pos (17UL) /*!< USB GRXSTSP_HOSTMODE: PktSts (Bit 17) */ +#define USB_GRXSTSP_HOSTMODE_PktSts_Msk (0x1e0000UL) /*!< USB GRXSTSP_HOSTMODE: PktSts (Bitfield-Mask: 0x0f) */ + +/* --------------------------------- USB_GRXFSIZ -------------------------------- */ +#define USB_GRXFSIZ_RxFDep_Pos (0UL) /*!< USB GRXFSIZ: RxFDep (Bit 0) */ +#define USB_GRXFSIZ_RxFDep_Msk (0xffffUL) /*!< USB GRXFSIZ: RxFDep (Bitfield-Mask: 0xffff) */ + +/* --------------------------- USB_GNPTXFSIZ_HOSTMODE --------------------------- */ +#define USB_GNPTXFSIZ_HOSTMODE_NPTxFStAddr_Pos (0UL) /*!< USB GNPTXFSIZ_HOSTMODE: NPTxFStAddr (Bit 0) */ +#define USB_GNPTXFSIZ_HOSTMODE_NPTxFStAddr_Msk (0xffffUL) /*!< USB GNPTXFSIZ_HOSTMODE: NPTxFStAddr (Bitfield-Mask: 0xffff) */ +#define USB_GNPTXFSIZ_HOSTMODE_NPTxFDep_Pos (16UL) /*!< USB GNPTXFSIZ_HOSTMODE: NPTxFDep (Bit 16) */ +#define USB_GNPTXFSIZ_HOSTMODE_NPTxFDep_Msk (0xffff0000UL) /*!< USB GNPTXFSIZ_HOSTMODE: NPTxFDep (Bitfield-Mask: 0xffff) */ + +/* -------------------------- USB_GNPTXFSIZ_DEVICEMODE -------------------------- */ +#define USB_GNPTXFSIZ_DEVICEMODE_INEPTxF0StAddr_Pos (0UL) /*!< USB GNPTXFSIZ_DEVICEMODE: INEPTxF0StAddr (Bit 0) */ +#define USB_GNPTXFSIZ_DEVICEMODE_INEPTxF0StAddr_Msk (0xffffUL) /*!< USB GNPTXFSIZ_DEVICEMODE: INEPTxF0StAddr (Bitfield-Mask: 0xffff) */ +#define USB_GNPTXFSIZ_DEVICEMODE_INEPTxF0Dep_Pos (16UL) /*!< USB GNPTXFSIZ_DEVICEMODE: INEPTxF0Dep (Bit 16) */ +#define USB_GNPTXFSIZ_DEVICEMODE_INEPTxF0Dep_Msk (0xffff0000UL) /*!< USB GNPTXFSIZ_DEVICEMODE: INEPTxF0Dep (Bitfield-Mask: 0xffff) */ + +/* -------------------------------- USB_GNPTXSTS -------------------------------- */ +#define USB_GNPTXSTS_NPTxFSpcAvail_Pos (0UL) /*!< USB GNPTXSTS: NPTxFSpcAvail (Bit 0) */ +#define USB_GNPTXSTS_NPTxFSpcAvail_Msk (0xffffUL) /*!< USB GNPTXSTS: NPTxFSpcAvail (Bitfield-Mask: 0xffff) */ +#define USB_GNPTXSTS_NPTxQSpcAvail_Pos (16UL) /*!< USB GNPTXSTS: NPTxQSpcAvail (Bit 16) */ +#define USB_GNPTXSTS_NPTxQSpcAvail_Msk (0xff0000UL) /*!< USB GNPTXSTS: NPTxQSpcAvail (Bitfield-Mask: 0xff) */ +#define USB_GNPTXSTS_NPTxQTop_Pos (24UL) /*!< USB GNPTXSTS: NPTxQTop (Bit 24) */ +#define USB_GNPTXSTS_NPTxQTop_Msk (0x7f000000UL) /*!< USB GNPTXSTS: NPTxQTop (Bitfield-Mask: 0x7f) */ + +/* ---------------------------------- USB_GUID ---------------------------------- */ +#define USB_GUID_MOD_REV_Pos (0UL) /*!< USB GUID: MOD_REV (Bit 0) */ +#define USB_GUID_MOD_REV_Msk (0xffUL) /*!< USB GUID: MOD_REV (Bitfield-Mask: 0xff) */ +#define USB_GUID_MOD_TYPE_Pos (8UL) /*!< USB GUID: MOD_TYPE (Bit 8) */ +#define USB_GUID_MOD_TYPE_Msk (0xff00UL) /*!< USB GUID: MOD_TYPE (Bitfield-Mask: 0xff) */ +#define USB_GUID_MOD_NUMBER_Pos (16UL) /*!< USB GUID: MOD_NUMBER (Bit 16) */ +#define USB_GUID_MOD_NUMBER_Msk (0xffff0000UL) /*!< USB GUID: MOD_NUMBER (Bitfield-Mask: 0xffff) */ + +/* -------------------------------- USB_GDFIFOCFG ------------------------------- */ +#define USB_GDFIFOCFG_GDFIFOCfg_Pos (0UL) /*!< USB GDFIFOCFG: GDFIFOCfg (Bit 0) */ +#define USB_GDFIFOCFG_GDFIFOCfg_Msk (0xffffUL) /*!< USB GDFIFOCFG: GDFIFOCfg (Bitfield-Mask: 0xffff) */ +#define USB_GDFIFOCFG_EPInfoBaseAddr_Pos (16UL) /*!< USB GDFIFOCFG: EPInfoBaseAddr (Bit 16) */ +#define USB_GDFIFOCFG_EPInfoBaseAddr_Msk (0xffff0000UL) /*!< USB GDFIFOCFG: EPInfoBaseAddr (Bitfield-Mask: 0xffff) */ + +/* -------------------------------- USB_HPTXFSIZ -------------------------------- */ +#define USB_HPTXFSIZ_PTxFStAddr_Pos (0UL) /*!< USB HPTXFSIZ: PTxFStAddr (Bit 0) */ +#define USB_HPTXFSIZ_PTxFStAddr_Msk (0xffffUL) /*!< USB HPTXFSIZ: PTxFStAddr (Bitfield-Mask: 0xffff) */ +#define USB_HPTXFSIZ_PTxFSize_Pos (16UL) /*!< USB HPTXFSIZ: PTxFSize (Bit 16) */ +#define USB_HPTXFSIZ_PTxFSize_Msk (0xffff0000UL) /*!< USB HPTXFSIZ: PTxFSize (Bitfield-Mask: 0xffff) */ + +/* -------------------------------- USB_DIEPTXF1 -------------------------------- */ +#define USB_DIEPTXF1_INEPnTxFStAddr_Pos (0UL) /*!< USB DIEPTXF1: INEPnTxFStAddr (Bit 0) */ +#define USB_DIEPTXF1_INEPnTxFStAddr_Msk (0xffffUL) /*!< USB DIEPTXF1: INEPnTxFStAddr (Bitfield-Mask: 0xffff) */ +#define USB_DIEPTXF1_INEPnTxFDep_Pos (16UL) /*!< USB DIEPTXF1: INEPnTxFDep (Bit 16) */ +#define USB_DIEPTXF1_INEPnTxFDep_Msk (0xffff0000UL) /*!< USB DIEPTXF1: INEPnTxFDep (Bitfield-Mask: 0xffff) */ + +/* -------------------------------- USB_DIEPTXF2 -------------------------------- */ +#define USB_DIEPTXF2_INEPnTxFStAddr_Pos (0UL) /*!< USB DIEPTXF2: INEPnTxFStAddr (Bit 0) */ +#define USB_DIEPTXF2_INEPnTxFStAddr_Msk (0xffffUL) /*!< USB DIEPTXF2: INEPnTxFStAddr (Bitfield-Mask: 0xffff) */ +#define USB_DIEPTXF2_INEPnTxFDep_Pos (16UL) /*!< USB DIEPTXF2: INEPnTxFDep (Bit 16) */ +#define USB_DIEPTXF2_INEPnTxFDep_Msk (0xffff0000UL) /*!< USB DIEPTXF2: INEPnTxFDep (Bitfield-Mask: 0xffff) */ + +/* -------------------------------- USB_DIEPTXF3 -------------------------------- */ +#define USB_DIEPTXF3_INEPnTxFStAddr_Pos (0UL) /*!< USB DIEPTXF3: INEPnTxFStAddr (Bit 0) */ +#define USB_DIEPTXF3_INEPnTxFStAddr_Msk (0xffffUL) /*!< USB DIEPTXF3: INEPnTxFStAddr (Bitfield-Mask: 0xffff) */ +#define USB_DIEPTXF3_INEPnTxFDep_Pos (16UL) /*!< USB DIEPTXF3: INEPnTxFDep (Bit 16) */ +#define USB_DIEPTXF3_INEPnTxFDep_Msk (0xffff0000UL) /*!< USB DIEPTXF3: INEPnTxFDep (Bitfield-Mask: 0xffff) */ + +/* -------------------------------- USB_DIEPTXF4 -------------------------------- */ +#define USB_DIEPTXF4_INEPnTxFStAddr_Pos (0UL) /*!< USB DIEPTXF4: INEPnTxFStAddr (Bit 0) */ +#define USB_DIEPTXF4_INEPnTxFStAddr_Msk (0xffffUL) /*!< USB DIEPTXF4: INEPnTxFStAddr (Bitfield-Mask: 0xffff) */ +#define USB_DIEPTXF4_INEPnTxFDep_Pos (16UL) /*!< USB DIEPTXF4: INEPnTxFDep (Bit 16) */ +#define USB_DIEPTXF4_INEPnTxFDep_Msk (0xffff0000UL) /*!< USB DIEPTXF4: INEPnTxFDep (Bitfield-Mask: 0xffff) */ + +/* -------------------------------- USB_DIEPTXF5 -------------------------------- */ +#define USB_DIEPTXF5_INEPnTxFStAddr_Pos (0UL) /*!< USB DIEPTXF5: INEPnTxFStAddr (Bit 0) */ +#define USB_DIEPTXF5_INEPnTxFStAddr_Msk (0xffffUL) /*!< USB DIEPTXF5: INEPnTxFStAddr (Bitfield-Mask: 0xffff) */ +#define USB_DIEPTXF5_INEPnTxFDep_Pos (16UL) /*!< USB DIEPTXF5: INEPnTxFDep (Bit 16) */ +#define USB_DIEPTXF5_INEPnTxFDep_Msk (0xffff0000UL) /*!< USB DIEPTXF5: INEPnTxFDep (Bitfield-Mask: 0xffff) */ + +/* -------------------------------- USB_DIEPTXF6 -------------------------------- */ +#define USB_DIEPTXF6_INEPnTxFStAddr_Pos (0UL) /*!< USB DIEPTXF6: INEPnTxFStAddr (Bit 0) */ +#define USB_DIEPTXF6_INEPnTxFStAddr_Msk (0xffffUL) /*!< USB DIEPTXF6: INEPnTxFStAddr (Bitfield-Mask: 0xffff) */ +#define USB_DIEPTXF6_INEPnTxFDep_Pos (16UL) /*!< USB DIEPTXF6: INEPnTxFDep (Bit 16) */ +#define USB_DIEPTXF6_INEPnTxFDep_Msk (0xffff0000UL) /*!< USB DIEPTXF6: INEPnTxFDep (Bitfield-Mask: 0xffff) */ + +/* ---------------------------------- USB_HCFG ---------------------------------- */ +#define USB_HCFG_FSLSPclkSel_Pos (0UL) /*!< USB HCFG: FSLSPclkSel (Bit 0) */ +#define USB_HCFG_FSLSPclkSel_Msk (0x3UL) /*!< USB HCFG: FSLSPclkSel (Bitfield-Mask: 0x03) */ +#define USB_HCFG_FSLSSupp_Pos (2UL) /*!< USB HCFG: FSLSSupp (Bit 2) */ +#define USB_HCFG_FSLSSupp_Msk (0x4UL) /*!< USB HCFG: FSLSSupp (Bitfield-Mask: 0x01) */ +#define USB_HCFG_DescDMA_Pos (23UL) /*!< USB HCFG: DescDMA (Bit 23) */ +#define USB_HCFG_DescDMA_Msk (0x800000UL) /*!< USB HCFG: DescDMA (Bitfield-Mask: 0x01) */ +#define USB_HCFG_FrListEn_Pos (24UL) /*!< USB HCFG: FrListEn (Bit 24) */ +#define USB_HCFG_FrListEn_Msk (0x3000000UL) /*!< USB HCFG: FrListEn (Bitfield-Mask: 0x03) */ +#define USB_HCFG_PerSchedEna_Pos (26UL) /*!< USB HCFG: PerSchedEna (Bit 26) */ +#define USB_HCFG_PerSchedEna_Msk (0x4000000UL) /*!< USB HCFG: PerSchedEna (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- USB_HFIR ---------------------------------- */ +#define USB_HFIR_FrInt_Pos (0UL) /*!< USB HFIR: FrInt (Bit 0) */ +#define USB_HFIR_FrInt_Msk (0xffffUL) /*!< USB HFIR: FrInt (Bitfield-Mask: 0xffff) */ +#define USB_HFIR_HFIRRldCtrl_Pos (16UL) /*!< USB HFIR: HFIRRldCtrl (Bit 16) */ +#define USB_HFIR_HFIRRldCtrl_Msk (0x10000UL) /*!< USB HFIR: HFIRRldCtrl (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- USB_HFNUM --------------------------------- */ +#define USB_HFNUM_FrNum_Pos (0UL) /*!< USB HFNUM: FrNum (Bit 0) */ +#define USB_HFNUM_FrNum_Msk (0xffffUL) /*!< USB HFNUM: FrNum (Bitfield-Mask: 0xffff) */ +#define USB_HFNUM_FrRem_Pos (16UL) /*!< USB HFNUM: FrRem (Bit 16) */ +#define USB_HFNUM_FrRem_Msk (0xffff0000UL) /*!< USB HFNUM: FrRem (Bitfield-Mask: 0xffff) */ + +/* --------------------------------- USB_HPTXSTS -------------------------------- */ +#define USB_HPTXSTS_PTxFSpcAvail_Pos (0UL) /*!< USB HPTXSTS: PTxFSpcAvail (Bit 0) */ +#define USB_HPTXSTS_PTxFSpcAvail_Msk (0xffffUL) /*!< USB HPTXSTS: PTxFSpcAvail (Bitfield-Mask: 0xffff) */ +#define USB_HPTXSTS_PTxQSpcAvail_Pos (16UL) /*!< USB HPTXSTS: PTxQSpcAvail (Bit 16) */ +#define USB_HPTXSTS_PTxQSpcAvail_Msk (0xff0000UL) /*!< USB HPTXSTS: PTxQSpcAvail (Bitfield-Mask: 0xff) */ +#define USB_HPTXSTS_PTxQTop_Pos (24UL) /*!< USB HPTXSTS: PTxQTop (Bit 24) */ +#define USB_HPTXSTS_PTxQTop_Msk (0xff000000UL) /*!< USB HPTXSTS: PTxQTop (Bitfield-Mask: 0xff) */ + +/* ---------------------------------- USB_HAINT --------------------------------- */ +#define USB_HAINT_HAINT_Pos (0UL) /*!< USB HAINT: HAINT (Bit 0) */ +#define USB_HAINT_HAINT_Msk (0x3fffUL) /*!< USB HAINT: HAINT (Bitfield-Mask: 0x3fff) */ + +/* -------------------------------- USB_HAINTMSK -------------------------------- */ +#define USB_HAINTMSK_HAINTMsk_Pos (0UL) /*!< USB HAINTMSK: HAINTMsk (Bit 0) */ +#define USB_HAINTMSK_HAINTMsk_Msk (0x3fffUL) /*!< USB HAINTMSK: HAINTMsk (Bitfield-Mask: 0x3fff) */ + +/* -------------------------------- USB_HFLBADDR -------------------------------- */ +#define USB_HFLBADDR_Starting_Address_Pos (0UL) /*!< USB HFLBADDR: Starting_Address (Bit 0) */ +#define USB_HFLBADDR_Starting_Address_Msk (0xffffffffUL) /*!< USB HFLBADDR: Starting_Address (Bitfield-Mask: 0xffffffff) */ + +/* ---------------------------------- USB_HPRT ---------------------------------- */ +#define USB_HPRT_PrtConnSts_Pos (0UL) /*!< USB HPRT: PrtConnSts (Bit 0) */ +#define USB_HPRT_PrtConnSts_Msk (0x1UL) /*!< USB HPRT: PrtConnSts (Bitfield-Mask: 0x01) */ +#define USB_HPRT_PrtConnDet_Pos (1UL) /*!< USB HPRT: PrtConnDet (Bit 1) */ +#define USB_HPRT_PrtConnDet_Msk (0x2UL) /*!< USB HPRT: PrtConnDet (Bitfield-Mask: 0x01) */ +#define USB_HPRT_PrtEna_Pos (2UL) /*!< USB HPRT: PrtEna (Bit 2) */ +#define USB_HPRT_PrtEna_Msk (0x4UL) /*!< USB HPRT: PrtEna (Bitfield-Mask: 0x01) */ +#define USB_HPRT_PrtEnChng_Pos (3UL) /*!< USB HPRT: PrtEnChng (Bit 3) */ +#define USB_HPRT_PrtEnChng_Msk (0x8UL) /*!< USB HPRT: PrtEnChng (Bitfield-Mask: 0x01) */ +#define USB_HPRT_PrtOvrCurrAct_Pos (4UL) /*!< USB HPRT: PrtOvrCurrAct (Bit 4) */ +#define USB_HPRT_PrtOvrCurrAct_Msk (0x10UL) /*!< USB HPRT: PrtOvrCurrAct (Bitfield-Mask: 0x01) */ +#define USB_HPRT_PrtOvrCurrChng_Pos (5UL) /*!< USB HPRT: PrtOvrCurrChng (Bit 5) */ +#define USB_HPRT_PrtOvrCurrChng_Msk (0x20UL) /*!< USB HPRT: PrtOvrCurrChng (Bitfield-Mask: 0x01) */ +#define USB_HPRT_PrtRes_Pos (6UL) /*!< USB HPRT: PrtRes (Bit 6) */ +#define USB_HPRT_PrtRes_Msk (0x40UL) /*!< USB HPRT: PrtRes (Bitfield-Mask: 0x01) */ +#define USB_HPRT_PrtSusp_Pos (7UL) /*!< USB HPRT: PrtSusp (Bit 7) */ +#define USB_HPRT_PrtSusp_Msk (0x80UL) /*!< USB HPRT: PrtSusp (Bitfield-Mask: 0x01) */ +#define USB_HPRT_PrtRst_Pos (8UL) /*!< USB HPRT: PrtRst (Bit 8) */ +#define USB_HPRT_PrtRst_Msk (0x100UL) /*!< USB HPRT: PrtRst (Bitfield-Mask: 0x01) */ +#define USB_HPRT_PrtLnSts_Pos (10UL) /*!< USB HPRT: PrtLnSts (Bit 10) */ +#define USB_HPRT_PrtLnSts_Msk (0xc00UL) /*!< USB HPRT: PrtLnSts (Bitfield-Mask: 0x03) */ +#define USB_HPRT_PrtPwr_Pos (12UL) /*!< USB HPRT: PrtPwr (Bit 12) */ +#define USB_HPRT_PrtPwr_Msk (0x1000UL) /*!< USB HPRT: PrtPwr (Bitfield-Mask: 0x01) */ +#define USB_HPRT_PrtSpd_Pos (17UL) /*!< USB HPRT: PrtSpd (Bit 17) */ +#define USB_HPRT_PrtSpd_Msk (0x60000UL) /*!< USB HPRT: PrtSpd (Bitfield-Mask: 0x03) */ + +/* ---------------------------------- USB_DCFG ---------------------------------- */ +#define USB_DCFG_DevSpd_Pos (0UL) /*!< USB DCFG: DevSpd (Bit 0) */ +#define USB_DCFG_DevSpd_Msk (0x3UL) /*!< USB DCFG: DevSpd (Bitfield-Mask: 0x03) */ +#define USB_DCFG_NZStsOUTHShk_Pos (2UL) /*!< USB DCFG: NZStsOUTHShk (Bit 2) */ +#define USB_DCFG_NZStsOUTHShk_Msk (0x4UL) /*!< USB DCFG: NZStsOUTHShk (Bitfield-Mask: 0x01) */ +#define USB_DCFG_DevAddr_Pos (4UL) /*!< USB DCFG: DevAddr (Bit 4) */ +#define USB_DCFG_DevAddr_Msk (0x7f0UL) /*!< USB DCFG: DevAddr (Bitfield-Mask: 0x7f) */ +#define USB_DCFG_PerFrInt_Pos (11UL) /*!< USB DCFG: PerFrInt (Bit 11) */ +#define USB_DCFG_PerFrInt_Msk (0x1800UL) /*!< USB DCFG: PerFrInt (Bitfield-Mask: 0x03) */ +#define USB_DCFG_DescDMA_Pos (23UL) /*!< USB DCFG: DescDMA (Bit 23) */ +#define USB_DCFG_DescDMA_Msk (0x800000UL) /*!< USB DCFG: DescDMA (Bitfield-Mask: 0x01) */ +#define USB_DCFG_PerSchIntvl_Pos (24UL) /*!< USB DCFG: PerSchIntvl (Bit 24) */ +#define USB_DCFG_PerSchIntvl_Msk (0x3000000UL) /*!< USB DCFG: PerSchIntvl (Bitfield-Mask: 0x03) */ + +/* ---------------------------------- USB_DCTL ---------------------------------- */ +#define USB_DCTL_RmtWkUpSig_Pos (0UL) /*!< USB DCTL: RmtWkUpSig (Bit 0) */ +#define USB_DCTL_RmtWkUpSig_Msk (0x1UL) /*!< USB DCTL: RmtWkUpSig (Bitfield-Mask: 0x01) */ +#define USB_DCTL_SftDiscon_Pos (1UL) /*!< USB DCTL: SftDiscon (Bit 1) */ +#define USB_DCTL_SftDiscon_Msk (0x2UL) /*!< USB DCTL: SftDiscon (Bitfield-Mask: 0x01) */ +#define USB_DCTL_GNPINNakSts_Pos (2UL) /*!< USB DCTL: GNPINNakSts (Bit 2) */ +#define USB_DCTL_GNPINNakSts_Msk (0x4UL) /*!< USB DCTL: GNPINNakSts (Bitfield-Mask: 0x01) */ +#define USB_DCTL_GOUTNakSts_Pos (3UL) /*!< USB DCTL: GOUTNakSts (Bit 3) */ +#define USB_DCTL_GOUTNakSts_Msk (0x8UL) /*!< USB DCTL: GOUTNakSts (Bitfield-Mask: 0x01) */ +#define USB_DCTL_SGNPInNak_Pos (7UL) /*!< USB DCTL: SGNPInNak (Bit 7) */ +#define USB_DCTL_SGNPInNak_Msk (0x80UL) /*!< USB DCTL: SGNPInNak (Bitfield-Mask: 0x01) */ +#define USB_DCTL_CGNPInNak_Pos (8UL) /*!< USB DCTL: CGNPInNak (Bit 8) */ +#define USB_DCTL_CGNPInNak_Msk (0x100UL) /*!< USB DCTL: CGNPInNak (Bitfield-Mask: 0x01) */ +#define USB_DCTL_SGOUTNak_Pos (9UL) /*!< USB DCTL: SGOUTNak (Bit 9) */ +#define USB_DCTL_SGOUTNak_Msk (0x200UL) /*!< USB DCTL: SGOUTNak (Bitfield-Mask: 0x01) */ +#define USB_DCTL_CGOUTNak_Pos (10UL) /*!< USB DCTL: CGOUTNak (Bit 10) */ +#define USB_DCTL_CGOUTNak_Msk (0x400UL) /*!< USB DCTL: CGOUTNak (Bitfield-Mask: 0x01) */ +#define USB_DCTL_GMC_Pos (13UL) /*!< USB DCTL: GMC (Bit 13) */ +#define USB_DCTL_GMC_Msk (0x6000UL) /*!< USB DCTL: GMC (Bitfield-Mask: 0x03) */ +#define USB_DCTL_IgnrFrmNum_Pos (15UL) /*!< USB DCTL: IgnrFrmNum (Bit 15) */ +#define USB_DCTL_IgnrFrmNum_Msk (0x8000UL) /*!< USB DCTL: IgnrFrmNum (Bitfield-Mask: 0x01) */ +#define USB_DCTL_NakOnBble_Pos (16UL) /*!< USB DCTL: NakOnBble (Bit 16) */ +#define USB_DCTL_NakOnBble_Msk (0x10000UL) /*!< USB DCTL: NakOnBble (Bitfield-Mask: 0x01) */ +#define USB_DCTL_EnContOnBNA_Pos (17UL) /*!< USB DCTL: EnContOnBNA (Bit 17) */ +#define USB_DCTL_EnContOnBNA_Msk (0x20000UL) /*!< USB DCTL: EnContOnBNA (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- USB_DSTS ---------------------------------- */ +#define USB_DSTS_SuspSts_Pos (0UL) /*!< USB DSTS: SuspSts (Bit 0) */ +#define USB_DSTS_SuspSts_Msk (0x1UL) /*!< USB DSTS: SuspSts (Bitfield-Mask: 0x01) */ +#define USB_DSTS_EnumSpd_Pos (1UL) /*!< USB DSTS: EnumSpd (Bit 1) */ +#define USB_DSTS_EnumSpd_Msk (0x6UL) /*!< USB DSTS: EnumSpd (Bitfield-Mask: 0x03) */ +#define USB_DSTS_ErrticErr_Pos (3UL) /*!< USB DSTS: ErrticErr (Bit 3) */ +#define USB_DSTS_ErrticErr_Msk (0x8UL) /*!< USB DSTS: ErrticErr (Bitfield-Mask: 0x01) */ +#define USB_DSTS_SOFFN_Pos (8UL) /*!< USB DSTS: SOFFN (Bit 8) */ +#define USB_DSTS_SOFFN_Msk (0x3fff00UL) /*!< USB DSTS: SOFFN (Bitfield-Mask: 0x3fff) */ + +/* --------------------------------- USB_DIEPMSK -------------------------------- */ +#define USB_DIEPMSK_XferComplMsk_Pos (0UL) /*!< USB DIEPMSK: XferComplMsk (Bit 0) */ +#define USB_DIEPMSK_XferComplMsk_Msk (0x1UL) /*!< USB DIEPMSK: XferComplMsk (Bitfield-Mask: 0x01) */ +#define USB_DIEPMSK_EPDisbldMsk_Pos (1UL) /*!< USB DIEPMSK: EPDisbldMsk (Bit 1) */ +#define USB_DIEPMSK_EPDisbldMsk_Msk (0x2UL) /*!< USB DIEPMSK: EPDisbldMsk (Bitfield-Mask: 0x01) */ +#define USB_DIEPMSK_AHBErrMsk_Pos (2UL) /*!< USB DIEPMSK: AHBErrMsk (Bit 2) */ +#define USB_DIEPMSK_AHBErrMsk_Msk (0x4UL) /*!< USB DIEPMSK: AHBErrMsk (Bitfield-Mask: 0x01) */ +#define USB_DIEPMSK_TimeOUTMsk_Pos (3UL) /*!< USB DIEPMSK: TimeOUTMsk (Bit 3) */ +#define USB_DIEPMSK_TimeOUTMsk_Msk (0x8UL) /*!< USB DIEPMSK: TimeOUTMsk (Bitfield-Mask: 0x01) */ +#define USB_DIEPMSK_INTknTXFEmpMsk_Pos (4UL) /*!< USB DIEPMSK: INTknTXFEmpMsk (Bit 4) */ +#define USB_DIEPMSK_INTknTXFEmpMsk_Msk (0x10UL) /*!< USB DIEPMSK: INTknTXFEmpMsk (Bitfield-Mask: 0x01) */ +#define USB_DIEPMSK_INEPNakEffMsk_Pos (6UL) /*!< USB DIEPMSK: INEPNakEffMsk (Bit 6) */ +#define USB_DIEPMSK_INEPNakEffMsk_Msk (0x40UL) /*!< USB DIEPMSK: INEPNakEffMsk (Bitfield-Mask: 0x01) */ +#define USB_DIEPMSK_TxfifoUndrnMsk_Pos (8UL) /*!< USB DIEPMSK: TxfifoUndrnMsk (Bit 8) */ +#define USB_DIEPMSK_TxfifoUndrnMsk_Msk (0x100UL) /*!< USB DIEPMSK: TxfifoUndrnMsk (Bitfield-Mask: 0x01) */ +#define USB_DIEPMSK_BNAInIntrMsk_Pos (9UL) /*!< USB DIEPMSK: BNAInIntrMsk (Bit 9) */ +#define USB_DIEPMSK_BNAInIntrMsk_Msk (0x200UL) /*!< USB DIEPMSK: BNAInIntrMsk (Bitfield-Mask: 0x01) */ +#define USB_DIEPMSK_NAKMsk_Pos (13UL) /*!< USB DIEPMSK: NAKMsk (Bit 13) */ +#define USB_DIEPMSK_NAKMsk_Msk (0x2000UL) /*!< USB DIEPMSK: NAKMsk (Bitfield-Mask: 0x01) */ + +/* --------------------------------- USB_DOEPMSK -------------------------------- */ +#define USB_DOEPMSK_XferComplMsk_Pos (0UL) /*!< USB DOEPMSK: XferComplMsk (Bit 0) */ +#define USB_DOEPMSK_XferComplMsk_Msk (0x1UL) /*!< USB DOEPMSK: XferComplMsk (Bitfield-Mask: 0x01) */ +#define USB_DOEPMSK_EPDisbldMsk_Pos (1UL) /*!< USB DOEPMSK: EPDisbldMsk (Bit 1) */ +#define USB_DOEPMSK_EPDisbldMsk_Msk (0x2UL) /*!< USB DOEPMSK: EPDisbldMsk (Bitfield-Mask: 0x01) */ +#define USB_DOEPMSK_AHBErrMsk_Pos (2UL) /*!< USB DOEPMSK: AHBErrMsk (Bit 2) */ +#define USB_DOEPMSK_AHBErrMsk_Msk (0x4UL) /*!< USB DOEPMSK: AHBErrMsk (Bitfield-Mask: 0x01) */ +#define USB_DOEPMSK_SetUPMsk_Pos (3UL) /*!< USB DOEPMSK: SetUPMsk (Bit 3) */ +#define USB_DOEPMSK_SetUPMsk_Msk (0x8UL) /*!< USB DOEPMSK: SetUPMsk (Bitfield-Mask: 0x01) */ +#define USB_DOEPMSK_OUTTknEPdisMsk_Pos (4UL) /*!< USB DOEPMSK: OUTTknEPdisMsk (Bit 4) */ +#define USB_DOEPMSK_OUTTknEPdisMsk_Msk (0x10UL) /*!< USB DOEPMSK: OUTTknEPdisMsk (Bitfield-Mask: 0x01) */ +#define USB_DOEPMSK_Back2BackSETup_Pos (6UL) /*!< USB DOEPMSK: Back2BackSETup (Bit 6) */ +#define USB_DOEPMSK_Back2BackSETup_Msk (0x40UL) /*!< USB DOEPMSK: Back2BackSETup (Bitfield-Mask: 0x01) */ +#define USB_DOEPMSK_OutPktErrMsk_Pos (8UL) /*!< USB DOEPMSK: OutPktErrMsk (Bit 8) */ +#define USB_DOEPMSK_OutPktErrMsk_Msk (0x100UL) /*!< USB DOEPMSK: OutPktErrMsk (Bitfield-Mask: 0x01) */ +#define USB_DOEPMSK_BnaOutIntrMsk_Pos (9UL) /*!< USB DOEPMSK: BnaOutIntrMsk (Bit 9) */ +#define USB_DOEPMSK_BnaOutIntrMsk_Msk (0x200UL) /*!< USB DOEPMSK: BnaOutIntrMsk (Bitfield-Mask: 0x01) */ +#define USB_DOEPMSK_BbleErrMsk_Pos (12UL) /*!< USB DOEPMSK: BbleErrMsk (Bit 12) */ +#define USB_DOEPMSK_BbleErrMsk_Msk (0x1000UL) /*!< USB DOEPMSK: BbleErrMsk (Bitfield-Mask: 0x01) */ +#define USB_DOEPMSK_NAKMsk_Pos (13UL) /*!< USB DOEPMSK: NAKMsk (Bit 13) */ +#define USB_DOEPMSK_NAKMsk_Msk (0x2000UL) /*!< USB DOEPMSK: NAKMsk (Bitfield-Mask: 0x01) */ +#define USB_DOEPMSK_NYETMsk_Pos (14UL) /*!< USB DOEPMSK: NYETMsk (Bit 14) */ +#define USB_DOEPMSK_NYETMsk_Msk (0x4000UL) /*!< USB DOEPMSK: NYETMsk (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- USB_DAINT --------------------------------- */ +#define USB_DAINT_InEpInt_Pos (0UL) /*!< USB DAINT: InEpInt (Bit 0) */ +#define USB_DAINT_InEpInt_Msk (0xffffUL) /*!< USB DAINT: InEpInt (Bitfield-Mask: 0xffff) */ +#define USB_DAINT_OutEPInt_Pos (16UL) /*!< USB DAINT: OutEPInt (Bit 16) */ +#define USB_DAINT_OutEPInt_Msk (0xffff0000UL) /*!< USB DAINT: OutEPInt (Bitfield-Mask: 0xffff) */ + +/* -------------------------------- USB_DAINTMSK -------------------------------- */ +#define USB_DAINTMSK_InEpMsk_Pos (0UL) /*!< USB DAINTMSK: InEpMsk (Bit 0) */ +#define USB_DAINTMSK_InEpMsk_Msk (0xffffUL) /*!< USB DAINTMSK: InEpMsk (Bitfield-Mask: 0xffff) */ +#define USB_DAINTMSK_OutEpMsk_Pos (16UL) /*!< USB DAINTMSK: OutEpMsk (Bit 16) */ +#define USB_DAINTMSK_OutEpMsk_Msk (0xffff0000UL) /*!< USB DAINTMSK: OutEpMsk (Bitfield-Mask: 0xffff) */ + +/* -------------------------------- USB_DVBUSDIS -------------------------------- */ +#define USB_DVBUSDIS_DVBUSDis_Pos (0UL) /*!< USB DVBUSDIS: DVBUSDis (Bit 0) */ +#define USB_DVBUSDIS_DVBUSDis_Msk (0xffffUL) /*!< USB DVBUSDIS: DVBUSDis (Bitfield-Mask: 0xffff) */ + +/* ------------------------------- USB_DVBUSPULSE ------------------------------- */ +#define USB_DVBUSPULSE_DVBUSPulse_Pos (0UL) /*!< USB DVBUSPULSE: DVBUSPulse (Bit 0) */ +#define USB_DVBUSPULSE_DVBUSPulse_Msk (0xfffUL) /*!< USB DVBUSPULSE: DVBUSPulse (Bitfield-Mask: 0xfff) */ + +/* ------------------------------- USB_DIEPEMPMSK ------------------------------- */ +#define USB_DIEPEMPMSK_InEpTxfEmpMsk_Pos (0UL) /*!< USB DIEPEMPMSK: InEpTxfEmpMsk (Bit 0) */ +#define USB_DIEPEMPMSK_InEpTxfEmpMsk_Msk (0xffffUL) /*!< USB DIEPEMPMSK: InEpTxfEmpMsk (Bitfield-Mask: 0xffff) */ + +/* --------------------------------- USB_PCGCCTL -------------------------------- */ +#define USB_PCGCCTL_StopPclk_Pos (0UL) /*!< USB PCGCCTL: StopPclk (Bit 0) */ +#define USB_PCGCCTL_StopPclk_Msk (0x1UL) /*!< USB PCGCCTL: StopPclk (Bitfield-Mask: 0x01) */ +#define USB_PCGCCTL_GateHclk_Pos (1UL) /*!< USB PCGCCTL: GateHclk (Bit 1) */ +#define USB_PCGCCTL_GateHclk_Msk (0x2UL) /*!< USB PCGCCTL: GateHclk (Bitfield-Mask: 0x01) */ + + +/* ================================================================================ */ +/* ================ struct 'USB0_EP0' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ------------------------------ USB_EP_DIEPCTL0 ----------------------------- */ +#define USB_EP_DIEPCTL0_MPS_Pos (0UL) /*!< USB0_EP0 DIEPCTL0: MPS (Bit 0) */ +#define USB_EP_DIEPCTL0_MPS_Msk (0x3UL) /*!< USB0_EP0 DIEPCTL0: MPS (Bitfield-Mask: 0x03) */ +#define USB_EP_DIEPCTL0_USBActEP_Pos (15UL) /*!< USB0_EP0 DIEPCTL0: USBActEP (Bit 15) */ +#define USB_EP_DIEPCTL0_USBActEP_Msk (0x8000UL) /*!< USB0_EP0 DIEPCTL0: USBActEP (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPCTL0_NAKSts_Pos (17UL) /*!< USB0_EP0 DIEPCTL0: NAKSts (Bit 17) */ +#define USB_EP_DIEPCTL0_NAKSts_Msk (0x20000UL) /*!< USB0_EP0 DIEPCTL0: NAKSts (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPCTL0_EPType_Pos (18UL) /*!< USB0_EP0 DIEPCTL0: EPType (Bit 18) */ +#define USB_EP_DIEPCTL0_EPType_Msk (0xc0000UL) /*!< USB0_EP0 DIEPCTL0: EPType (Bitfield-Mask: 0x03) */ +#define USB_EP_DIEPCTL0_Stall_Pos (21UL) /*!< USB0_EP0 DIEPCTL0: Stall (Bit 21) */ +#define USB_EP_DIEPCTL0_Stall_Msk (0x200000UL) /*!< USB0_EP0 DIEPCTL0: Stall (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPCTL0_TxFNum_Pos (22UL) /*!< USB0_EP0 DIEPCTL0: TxFNum (Bit 22) */ +#define USB_EP_DIEPCTL0_TxFNum_Msk (0x3c00000UL) /*!< USB0_EP0 DIEPCTL0: TxFNum (Bitfield-Mask: 0x0f) */ +#define USB_EP_DIEPCTL0_CNAK_Pos (26UL) /*!< USB0_EP0 DIEPCTL0: CNAK (Bit 26) */ +#define USB_EP_DIEPCTL0_CNAK_Msk (0x4000000UL) /*!< USB0_EP0 DIEPCTL0: CNAK (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPCTL0_SNAK_Pos (27UL) /*!< USB0_EP0 DIEPCTL0: SNAK (Bit 27) */ +#define USB_EP_DIEPCTL0_SNAK_Msk (0x8000000UL) /*!< USB0_EP0 DIEPCTL0: SNAK (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPCTL0_EPDis_Pos (30UL) /*!< USB0_EP0 DIEPCTL0: EPDis (Bit 30) */ +#define USB_EP_DIEPCTL0_EPDis_Msk (0x40000000UL) /*!< USB0_EP0 DIEPCTL0: EPDis (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPCTL0_EPEna_Pos (31UL) /*!< USB0_EP0 DIEPCTL0: EPEna (Bit 31) */ +#define USB_EP_DIEPCTL0_EPEna_Msk (0x80000000UL) /*!< USB0_EP0 DIEPCTL0: EPEna (Bitfield-Mask: 0x01) */ + +/* ------------------------------ USB_EP_DIEPINT0 ----------------------------- */ +#define USB_EP_DIEPINT0_XferCompl_Pos (0UL) /*!< USB0_EP0 DIEPINT0: XferCompl (Bit 0) */ +#define USB_EP_DIEPINT0_XferCompl_Msk (0x1UL) /*!< USB0_EP0 DIEPINT0: XferCompl (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPINT0_EPDisbld_Pos (1UL) /*!< USB0_EP0 DIEPINT0: EPDisbld (Bit 1) */ +#define USB_EP_DIEPINT0_EPDisbld_Msk (0x2UL) /*!< USB0_EP0 DIEPINT0: EPDisbld (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPINT0_AHBErr_Pos (2UL) /*!< USB0_EP0 DIEPINT0: AHBErr (Bit 2) */ +#define USB_EP_DIEPINT0_AHBErr_Msk (0x4UL) /*!< USB0_EP0 DIEPINT0: AHBErr (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPINT0_TimeOUT_Pos (3UL) /*!< USB0_EP0 DIEPINT0: TimeOUT (Bit 3) */ +#define USB_EP_DIEPINT0_TimeOUT_Msk (0x8UL) /*!< USB0_EP0 DIEPINT0: TimeOUT (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPINT0_INTknTXFEmp_Pos (4UL) /*!< USB0_EP0 DIEPINT0: INTknTXFEmp (Bit 4) */ +#define USB_EP_DIEPINT0_INTknTXFEmp_Msk (0x10UL) /*!< USB0_EP0 DIEPINT0: INTknTXFEmp (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPINT0_INEPNakEff_Pos (6UL) /*!< USB0_EP0 DIEPINT0: INEPNakEff (Bit 6) */ +#define USB_EP_DIEPINT0_INEPNakEff_Msk (0x40UL) /*!< USB0_EP0 DIEPINT0: INEPNakEff (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPINT0_TxFEmp_Pos (7UL) /*!< USB0_EP0 DIEPINT0: TxFEmp (Bit 7) */ +#define USB_EP_DIEPINT0_TxFEmp_Msk (0x80UL) /*!< USB0_EP0 DIEPINT0: TxFEmp (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPINT0_BNAIntr_Pos (9UL) /*!< USB0_EP0 DIEPINT0: BNAIntr (Bit 9) */ +#define USB_EP_DIEPINT0_BNAIntr_Msk (0x200UL) /*!< USB0_EP0 DIEPINT0: BNAIntr (Bitfield-Mask: 0x01) */ + +/* ----------------------------- USB_EP_DIEPTSIZ0 ----------------------------- */ +#define USB_EP_DIEPTSIZ0_XferSize_Pos (0UL) /*!< USB0_EP0 DIEPTSIZ0: XferSize (Bit 0) */ +#define USB_EP_DIEPTSIZ0_XferSize_Msk (0x7fUL) /*!< USB0_EP0 DIEPTSIZ0: XferSize (Bitfield-Mask: 0x7f) */ +#define USB_EP_DIEPTSIZ0_PktCnt_Pos (19UL) /*!< USB0_EP0 DIEPTSIZ0: PktCnt (Bit 19) */ +#define USB_EP_DIEPTSIZ0_PktCnt_Msk (0x180000UL) /*!< USB0_EP0 DIEPTSIZ0: PktCnt (Bitfield-Mask: 0x03) */ + +/* ------------------------------ USB_EP_DIEPDMA0 ----------------------------- */ +#define USB_EP_DIEPDMA0_DMAAddr_Pos (0UL) /*!< USB0_EP0 DIEPDMA0: DMAAddr (Bit 0) */ +#define USB_EP_DIEPDMA0_DMAAddr_Msk (0xffffffffUL) /*!< USB0_EP0 DIEPDMA0: DMAAddr (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------------ USB_EP_DTXFSTS0 ----------------------------- */ +#define USB_EP_DTXFSTS0_INEPTxFSpcAvail_Pos (0UL) /*!< USB0_EP0 DTXFSTS0: INEPTxFSpcAvail (Bit 0) */ +#define USB_EP_DTXFSTS0_INEPTxFSpcAvail_Msk (0xffffUL) /*!< USB0_EP0 DTXFSTS0: INEPTxFSpcAvail (Bitfield-Mask: 0xffff) */ + +/* ----------------------------- USB_EP_DIEPDMAB0 ----------------------------- */ +#define USB_EP_DIEPDMAB0_DMABufferAddr_Pos (0UL) /*!< USB0_EP0 DIEPDMAB0: DMABufferAddr (Bit 0) */ +#define USB_EP_DIEPDMAB0_DMABufferAddr_Msk (0xffffffffUL) /*!< USB0_EP0 DIEPDMAB0: DMABufferAddr (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------------ USB_EP_DOEPCTL0 ----------------------------- */ +#define USB_EP_DOEPCTL0_MPS_Pos (0UL) /*!< USB0_EP0 DOEPCTL0: MPS (Bit 0) */ +#define USB_EP_DOEPCTL0_MPS_Msk (0x3UL) /*!< USB0_EP0 DOEPCTL0: MPS (Bitfield-Mask: 0x03) */ +#define USB_EP_DOEPCTL0_USBActEP_Pos (15UL) /*!< USB0_EP0 DOEPCTL0: USBActEP (Bit 15) */ +#define USB_EP_DOEPCTL0_USBActEP_Msk (0x8000UL) /*!< USB0_EP0 DOEPCTL0: USBActEP (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPCTL0_NAKSts_Pos (17UL) /*!< USB0_EP0 DOEPCTL0: NAKSts (Bit 17) */ +#define USB_EP_DOEPCTL0_NAKSts_Msk (0x20000UL) /*!< USB0_EP0 DOEPCTL0: NAKSts (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPCTL0_EPType_Pos (18UL) /*!< USB0_EP0 DOEPCTL0: EPType (Bit 18) */ +#define USB_EP_DOEPCTL0_EPType_Msk (0xc0000UL) /*!< USB0_EP0 DOEPCTL0: EPType (Bitfield-Mask: 0x03) */ +#define USB_EP_DOEPCTL0_Snp_Pos (20UL) /*!< USB0_EP0 DOEPCTL0: Snp (Bit 20) */ +#define USB_EP_DOEPCTL0_Snp_Msk (0x100000UL) /*!< USB0_EP0 DOEPCTL0: Snp (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPCTL0_Stall_Pos (21UL) /*!< USB0_EP0 DOEPCTL0: Stall (Bit 21) */ +#define USB_EP_DOEPCTL0_Stall_Msk (0x200000UL) /*!< USB0_EP0 DOEPCTL0: Stall (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPCTL0_CNAK_Pos (26UL) /*!< USB0_EP0 DOEPCTL0: CNAK (Bit 26) */ +#define USB_EP_DOEPCTL0_CNAK_Msk (0x4000000UL) /*!< USB0_EP0 DOEPCTL0: CNAK (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPCTL0_SNAK_Pos (27UL) /*!< USB0_EP0 DOEPCTL0: SNAK (Bit 27) */ +#define USB_EP_DOEPCTL0_SNAK_Msk (0x8000000UL) /*!< USB0_EP0 DOEPCTL0: SNAK (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPCTL0_EPDis_Pos (30UL) /*!< USB0_EP0 DOEPCTL0: EPDis (Bit 30) */ +#define USB_EP_DOEPCTL0_EPDis_Msk (0x40000000UL) /*!< USB0_EP0 DOEPCTL0: EPDis (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPCTL0_EPEna_Pos (31UL) /*!< USB0_EP0 DOEPCTL0: EPEna (Bit 31) */ +#define USB_EP_DOEPCTL0_EPEna_Msk (0x80000000UL) /*!< USB0_EP0 DOEPCTL0: EPEna (Bitfield-Mask: 0x01) */ + +/* ------------------------------ USB_EP_DOEPINT0 ----------------------------- */ +#define USB_EP_DOEPINT0_XferCompl_Pos (0UL) /*!< USB0_EP0 DOEPINT0: XferCompl (Bit 0) */ +#define USB_EP_DOEPINT0_XferCompl_Msk (0x1UL) /*!< USB0_EP0 DOEPINT0: XferCompl (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPINT0_EPDisbld_Pos (1UL) /*!< USB0_EP0 DOEPINT0: EPDisbld (Bit 1) */ +#define USB_EP_DOEPINT0_EPDisbld_Msk (0x2UL) /*!< USB0_EP0 DOEPINT0: EPDisbld (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPINT0_AHBErr_Pos (2UL) /*!< USB0_EP0 DOEPINT0: AHBErr (Bit 2) */ +#define USB_EP_DOEPINT0_AHBErr_Msk (0x4UL) /*!< USB0_EP0 DOEPINT0: AHBErr (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPINT0_SetUp_Pos (3UL) /*!< USB0_EP0 DOEPINT0: SetUp (Bit 3) */ +#define USB_EP_DOEPINT0_SetUp_Msk (0x8UL) /*!< USB0_EP0 DOEPINT0: SetUp (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPINT0_OUTTknEPdis_Pos (4UL) /*!< USB0_EP0 DOEPINT0: OUTTknEPdis (Bit 4) */ +#define USB_EP_DOEPINT0_OUTTknEPdis_Msk (0x10UL) /*!< USB0_EP0 DOEPINT0: OUTTknEPdis (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPINT0_StsPhseRcvd_Pos (5UL) /*!< USB0_EP0 DOEPINT0: StsPhseRcvd (Bit 5) */ +#define USB_EP_DOEPINT0_StsPhseRcvd_Msk (0x20UL) /*!< USB0_EP0 DOEPINT0: StsPhseRcvd (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPINT0_Back2BackSETup_Pos (6UL) /*!< USB0_EP0 DOEPINT0: Back2BackSETup (Bit 6) */ +#define USB_EP_DOEPINT0_Back2BackSETup_Msk (0x40UL) /*!< USB0_EP0 DOEPINT0: Back2BackSETup (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPINT0_BNAIntr_Pos (9UL) /*!< USB0_EP0 DOEPINT0: BNAIntr (Bit 9) */ +#define USB_EP_DOEPINT0_BNAIntr_Msk (0x200UL) /*!< USB0_EP0 DOEPINT0: BNAIntr (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPINT0_PktDrpSts_Pos (11UL) /*!< USB0_EP0 DOEPINT0: PktDrpSts (Bit 11) */ +#define USB_EP_DOEPINT0_PktDrpSts_Msk (0x800UL) /*!< USB0_EP0 DOEPINT0: PktDrpSts (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPINT0_BbleErrIntrpt_Pos (12UL) /*!< USB0_EP0 DOEPINT0: BbleErrIntrpt (Bit 12) */ +#define USB_EP_DOEPINT0_BbleErrIntrpt_Msk (0x1000UL) /*!< USB0_EP0 DOEPINT0: BbleErrIntrpt (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPINT0_NAKIntrpt_Pos (13UL) /*!< USB0_EP0 DOEPINT0: NAKIntrpt (Bit 13) */ +#define USB_EP_DOEPINT0_NAKIntrpt_Msk (0x2000UL) /*!< USB0_EP0 DOEPINT0: NAKIntrpt (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPINT0_NYETIntrpt_Pos (14UL) /*!< USB0_EP0 DOEPINT0: NYETIntrpt (Bit 14) */ +#define USB_EP_DOEPINT0_NYETIntrpt_Msk (0x4000UL) /*!< USB0_EP0 DOEPINT0: NYETIntrpt (Bitfield-Mask: 0x01) */ + +/* ----------------------------- USB_EP_DOEPTSIZ0 ----------------------------- */ +#define USB_EP_DOEPTSIZ0_XferSize_Pos (0UL) /*!< USB0_EP0 DOEPTSIZ0: XferSize (Bit 0) */ +#define USB_EP_DOEPTSIZ0_XferSize_Msk (0x7fUL) /*!< USB0_EP0 DOEPTSIZ0: XferSize (Bitfield-Mask: 0x7f) */ +#define USB_EP_DOEPTSIZ0_PktCnt_Pos (19UL) /*!< USB0_EP0 DOEPTSIZ0: PktCnt (Bit 19) */ +#define USB_EP_DOEPTSIZ0_PktCnt_Msk (0x180000UL) /*!< USB0_EP0 DOEPTSIZ0: PktCnt (Bitfield-Mask: 0x03) */ +#define USB_EP_DOEPTSIZ0_SUPCnt_Pos (29UL) /*!< USB0_EP0 DOEPTSIZ0: SUPCnt (Bit 29) */ +#define USB_EP_DOEPTSIZ0_SUPCnt_Msk (0x60000000UL) /*!< USB0_EP0 DOEPTSIZ0: SUPCnt (Bitfield-Mask: 0x03) */ + +/* ------------------------------ USB_EP_DOEPDMA0 ----------------------------- */ +#define USB_EP_DOEPDMA0_DMAAddr_Pos (0UL) /*!< USB0_EP0 DOEPDMA0: DMAAddr (Bit 0) */ +#define USB_EP_DOEPDMA0_DMAAddr_Msk (0xffffffffUL) /*!< USB0_EP0 DOEPDMA0: DMAAddr (Bitfield-Mask: 0xffffffff) */ + +/* ----------------------------- USB_EP_DOEPDMAB0 ----------------------------- */ +#define USB_EP_DOEPDMAB0_DMABufferAddr_Pos (0UL) /*!< USB0_EP0 DOEPDMAB0: DMABufferAddr (Bit 0) */ +#define USB_EP_DOEPDMAB0_DMABufferAddr_Msk (0xffffffffUL) /*!< USB0_EP0 DOEPDMAB0: DMABufferAddr (Bitfield-Mask: 0xffffffff) */ + + +/* ================================================================================ */ +/* ================ Group 'USB_EP' Position & Mask ================ */ +/* ================================================================================ */ + + +/* --------------------------- USB_EP_DIEPCTL_ISOCONT --------------------------- */ +#define USB_EP_DIEPCTL_ISOCONT_MPS_Pos (0UL) /*!< USB_EP DIEPCTL_ISOCONT: MPS (Bit 0) */ +#define USB_EP_DIEPCTL_ISOCONT_MPS_Msk (0x7ffUL) /*!< USB_EP DIEPCTL_ISOCONT: MPS (Bitfield-Mask: 0x7ff) */ +#define USB_EP_DIEPCTL_ISOCONT_USBActEP_Pos (15UL) /*!< USB_EP DIEPCTL_ISOCONT: USBActEP (Bit 15) */ +#define USB_EP_DIEPCTL_ISOCONT_USBActEP_Msk (0x8000UL) /*!< USB_EP DIEPCTL_ISOCONT: USBActEP (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPCTL_ISOCONT_EO_FrNum_Pos (16UL) /*!< USB_EP DIEPCTL_ISOCONT: EO_FrNum (Bit 16) */ +#define USB_EP_DIEPCTL_ISOCONT_EO_FrNum_Msk (0x10000UL) /*!< USB_EP DIEPCTL_ISOCONT: EO_FrNum (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPCTL_ISOCONT_NAKSts_Pos (17UL) /*!< USB_EP DIEPCTL_ISOCONT: NAKSts (Bit 17) */ +#define USB_EP_DIEPCTL_ISOCONT_NAKSts_Msk (0x20000UL) /*!< USB_EP DIEPCTL_ISOCONT: NAKSts (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPCTL_ISOCONT_EPType_Pos (18UL) /*!< USB_EP DIEPCTL_ISOCONT: EPType (Bit 18) */ +#define USB_EP_DIEPCTL_ISOCONT_EPType_Msk (0xc0000UL) /*!< USB_EP DIEPCTL_ISOCONT: EPType (Bitfield-Mask: 0x03) */ +#define USB_EP_DIEPCTL_ISOCONT_Snp_Pos (20UL) /*!< USB_EP DIEPCTL_ISOCONT: Snp (Bit 20) */ +#define USB_EP_DIEPCTL_ISOCONT_Snp_Msk (0x100000UL) /*!< USB_EP DIEPCTL_ISOCONT: Snp (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPCTL_ISOCONT_Stall_Pos (21UL) /*!< USB_EP DIEPCTL_ISOCONT: Stall (Bit 21) */ +#define USB_EP_DIEPCTL_ISOCONT_Stall_Msk (0x200000UL) /*!< USB_EP DIEPCTL_ISOCONT: Stall (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPCTL_ISOCONT_TxFNum_Pos (22UL) /*!< USB_EP DIEPCTL_ISOCONT: TxFNum (Bit 22) */ +#define USB_EP_DIEPCTL_ISOCONT_TxFNum_Msk (0x3c00000UL) /*!< USB_EP DIEPCTL_ISOCONT: TxFNum (Bitfield-Mask: 0x0f) */ +#define USB_EP_DIEPCTL_ISOCONT_CNAK_Pos (26UL) /*!< USB_EP DIEPCTL_ISOCONT: CNAK (Bit 26) */ +#define USB_EP_DIEPCTL_ISOCONT_CNAK_Msk (0x4000000UL) /*!< USB_EP DIEPCTL_ISOCONT: CNAK (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPCTL_ISOCONT_SNAK_Pos (27UL) /*!< USB_EP DIEPCTL_ISOCONT: SNAK (Bit 27) */ +#define USB_EP_DIEPCTL_ISOCONT_SNAK_Msk (0x8000000UL) /*!< USB_EP DIEPCTL_ISOCONT: SNAK (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPCTL_ISOCONT_SetEvenFr_Pos (28UL) /*!< USB_EP DIEPCTL_ISOCONT: SetEvenFr (Bit 28) */ +#define USB_EP_DIEPCTL_ISOCONT_SetEvenFr_Msk (0x10000000UL) /*!< USB_EP DIEPCTL_ISOCONT: SetEvenFr (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPCTL_ISOCONT_SetOddFr_Pos (29UL) /*!< USB_EP DIEPCTL_ISOCONT: SetOddFr (Bit 29) */ +#define USB_EP_DIEPCTL_ISOCONT_SetOddFr_Msk (0x20000000UL) /*!< USB_EP DIEPCTL_ISOCONT: SetOddFr (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPCTL_ISOCONT_EPDis_Pos (30UL) /*!< USB_EP DIEPCTL_ISOCONT: EPDis (Bit 30) */ +#define USB_EP_DIEPCTL_ISOCONT_EPDis_Msk (0x40000000UL) /*!< USB_EP DIEPCTL_ISOCONT: EPDis (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPCTL_ISOCONT_EPEna_Pos (31UL) /*!< USB_EP DIEPCTL_ISOCONT: EPEna (Bit 31) */ +#define USB_EP_DIEPCTL_ISOCONT_EPEna_Msk (0x80000000UL) /*!< USB_EP DIEPCTL_ISOCONT: EPEna (Bitfield-Mask: 0x01) */ + +/* --------------------------- USB_EP_DIEPCTL_INTBULK --------------------------- */ +#define USB_EP_DIEPCTL_INTBULK_MPS_Pos (0UL) /*!< USB_EP DIEPCTL_INTBULK: MPS (Bit 0) */ +#define USB_EP_DIEPCTL_INTBULK_MPS_Msk (0x7ffUL) /*!< USB_EP DIEPCTL_INTBULK: MPS (Bitfield-Mask: 0x7ff) */ +#define USB_EP_DIEPCTL_INTBULK_USBActEP_Pos (15UL) /*!< USB_EP DIEPCTL_INTBULK: USBActEP (Bit 15) */ +#define USB_EP_DIEPCTL_INTBULK_USBActEP_Msk (0x8000UL) /*!< USB_EP DIEPCTL_INTBULK: USBActEP (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPCTL_INTBULK_DPID_Pos (16UL) /*!< USB_EP DIEPCTL_INTBULK: DPID (Bit 16) */ +#define USB_EP_DIEPCTL_INTBULK_DPID_Msk (0x10000UL) /*!< USB_EP DIEPCTL_INTBULK: DPID (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPCTL_INTBULK_NAKSts_Pos (17UL) /*!< USB_EP DIEPCTL_INTBULK: NAKSts (Bit 17) */ +#define USB_EP_DIEPCTL_INTBULK_NAKSts_Msk (0x20000UL) /*!< USB_EP DIEPCTL_INTBULK: NAKSts (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPCTL_INTBULK_EPType_Pos (18UL) /*!< USB_EP DIEPCTL_INTBULK: EPType (Bit 18) */ +#define USB_EP_DIEPCTL_INTBULK_EPType_Msk (0xc0000UL) /*!< USB_EP DIEPCTL_INTBULK: EPType (Bitfield-Mask: 0x03) */ +#define USB_EP_DIEPCTL_INTBULK_Snp_Pos (20UL) /*!< USB_EP DIEPCTL_INTBULK: Snp (Bit 20) */ +#define USB_EP_DIEPCTL_INTBULK_Snp_Msk (0x100000UL) /*!< USB_EP DIEPCTL_INTBULK: Snp (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPCTL_INTBULK_Stall_Pos (21UL) /*!< USB_EP DIEPCTL_INTBULK: Stall (Bit 21) */ +#define USB_EP_DIEPCTL_INTBULK_Stall_Msk (0x200000UL) /*!< USB_EP DIEPCTL_INTBULK: Stall (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPCTL_INTBULK_TxFNum_Pos (22UL) /*!< USB_EP DIEPCTL_INTBULK: TxFNum (Bit 22) */ +#define USB_EP_DIEPCTL_INTBULK_TxFNum_Msk (0x3c00000UL) /*!< USB_EP DIEPCTL_INTBULK: TxFNum (Bitfield-Mask: 0x0f) */ +#define USB_EP_DIEPCTL_INTBULK_CNAK_Pos (26UL) /*!< USB_EP DIEPCTL_INTBULK: CNAK (Bit 26) */ +#define USB_EP_DIEPCTL_INTBULK_CNAK_Msk (0x4000000UL) /*!< USB_EP DIEPCTL_INTBULK: CNAK (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPCTL_INTBULK_SNAK_Pos (27UL) /*!< USB_EP DIEPCTL_INTBULK: SNAK (Bit 27) */ +#define USB_EP_DIEPCTL_INTBULK_SNAK_Msk (0x8000000UL) /*!< USB_EP DIEPCTL_INTBULK: SNAK (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPCTL_INTBULK_SetD0PID_Pos (28UL) /*!< USB_EP DIEPCTL_INTBULK: SetD0PID (Bit 28) */ +#define USB_EP_DIEPCTL_INTBULK_SetD0PID_Msk (0x10000000UL) /*!< USB_EP DIEPCTL_INTBULK: SetD0PID (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPCTL_INTBULK_SetD1PID_Pos (29UL) /*!< USB_EP DIEPCTL_INTBULK: SetD1PID (Bit 29) */ +#define USB_EP_DIEPCTL_INTBULK_SetD1PID_Msk (0x20000000UL) /*!< USB_EP DIEPCTL_INTBULK: SetD1PID (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPCTL_INTBULK_EPDis_Pos (30UL) /*!< USB_EP DIEPCTL_INTBULK: EPDis (Bit 30) */ +#define USB_EP_DIEPCTL_INTBULK_EPDis_Msk (0x40000000UL) /*!< USB_EP DIEPCTL_INTBULK: EPDis (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPCTL_INTBULK_EPEna_Pos (31UL) /*!< USB_EP DIEPCTL_INTBULK: EPEna (Bit 31) */ +#define USB_EP_DIEPCTL_INTBULK_EPEna_Msk (0x80000000UL) /*!< USB_EP DIEPCTL_INTBULK: EPEna (Bitfield-Mask: 0x01) */ + +/* ------------------------------- USB_EP_DIEPINT ------------------------------- */ +#define USB_EP_DIEPINT_XferCompl_Pos (0UL) /*!< USB_EP DIEPINT: XferCompl (Bit 0) */ +#define USB_EP_DIEPINT_XferCompl_Msk (0x1UL) /*!< USB_EP DIEPINT: XferCompl (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPINT_EPDisbld_Pos (1UL) /*!< USB_EP DIEPINT: EPDisbld (Bit 1) */ +#define USB_EP_DIEPINT_EPDisbld_Msk (0x2UL) /*!< USB_EP DIEPINT: EPDisbld (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPINT_AHBErr_Pos (2UL) /*!< USB_EP DIEPINT: AHBErr (Bit 2) */ +#define USB_EP_DIEPINT_AHBErr_Msk (0x4UL) /*!< USB_EP DIEPINT: AHBErr (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPINT_TimeOUT_Pos (3UL) /*!< USB_EP DIEPINT: TimeOUT (Bit 3) */ +#define USB_EP_DIEPINT_TimeOUT_Msk (0x8UL) /*!< USB_EP DIEPINT: TimeOUT (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPINT_INTknTXFEmp_Pos (4UL) /*!< USB_EP DIEPINT: INTknTXFEmp (Bit 4) */ +#define USB_EP_DIEPINT_INTknTXFEmp_Msk (0x10UL) /*!< USB_EP DIEPINT: INTknTXFEmp (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPINT_INEPNakEff_Pos (6UL) /*!< USB_EP DIEPINT: INEPNakEff (Bit 6) */ +#define USB_EP_DIEPINT_INEPNakEff_Msk (0x40UL) /*!< USB_EP DIEPINT: INEPNakEff (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPINT_TxFEmp_Pos (7UL) /*!< USB_EP DIEPINT: TxFEmp (Bit 7) */ +#define USB_EP_DIEPINT_TxFEmp_Msk (0x80UL) /*!< USB_EP DIEPINT: TxFEmp (Bitfield-Mask: 0x01) */ +#define USB_EP_DIEPINT_BNAIntr_Pos (9UL) /*!< USB_EP DIEPINT: BNAIntr (Bit 9) */ +#define USB_EP_DIEPINT_BNAIntr_Msk (0x200UL) /*!< USB_EP DIEPINT: BNAIntr (Bitfield-Mask: 0x01) */ + +/* ------------------------------- USB_EP_DIEPTSIZ ------------------------------ */ +#define USB_EP_DIEPTSIZ_XferSize_Pos (0UL) /*!< USB_EP DIEPTSIZ: XferSize (Bit 0) */ +#define USB_EP_DIEPTSIZ_XferSize_Msk (0x7ffffUL) /*!< USB_EP DIEPTSIZ: XferSize (Bitfield-Mask: 0x7ffff) */ +#define USB_EP_DIEPTSIZ_PktCnt_Pos (19UL) /*!< USB_EP DIEPTSIZ: PktCnt (Bit 19) */ +#define USB_EP_DIEPTSIZ_PktCnt_Msk (0x1ff80000UL) /*!< USB_EP DIEPTSIZ: PktCnt (Bitfield-Mask: 0x3ff) */ + +/* ------------------------------- USB_EP_DIEPDMA ------------------------------- */ +#define USB_EP_DIEPDMA_DMAAddr_Pos (0UL) /*!< USB_EP DIEPDMA: DMAAddr (Bit 0) */ +#define USB_EP_DIEPDMA_DMAAddr_Msk (0xffffffffUL) /*!< USB_EP DIEPDMA: DMAAddr (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------------- USB_EP_DTXFSTS ------------------------------- */ +#define USB_EP_DTXFSTS_INEPTxFSpcAvail_Pos (0UL) /*!< USB_EP DTXFSTS: INEPTxFSpcAvail (Bit 0) */ +#define USB_EP_DTXFSTS_INEPTxFSpcAvail_Msk (0xffffUL) /*!< USB_EP DTXFSTS: INEPTxFSpcAvail (Bitfield-Mask: 0xffff) */ + +/* ------------------------------- USB_EP_DIEPDMAB ------------------------------ */ +#define USB_EP_DIEPDMAB_DMABufferAddr_Pos (0UL) /*!< USB_EP DIEPDMAB: DMABufferAddr (Bit 0) */ +#define USB_EP_DIEPDMAB_DMABufferAddr_Msk (0xffffffffUL) /*!< USB_EP DIEPDMAB: DMABufferAddr (Bitfield-Mask: 0xffffffff) */ + +/* --------------------------- USB_EP_DOEPCTL_ISOCONT --------------------------- */ +#define USB_EP_DOEPCTL_ISOCONT_MPS_Pos (0UL) /*!< USB_EP DOEPCTL_ISOCONT: MPS (Bit 0) */ +#define USB_EP_DOEPCTL_ISOCONT_MPS_Msk (0x7ffUL) /*!< USB_EP DOEPCTL_ISOCONT: MPS (Bitfield-Mask: 0x7ff) */ +#define USB_EP_DOEPCTL_ISOCONT_USBActEP_Pos (15UL) /*!< USB_EP DOEPCTL_ISOCONT: USBActEP (Bit 15) */ +#define USB_EP_DOEPCTL_ISOCONT_USBActEP_Msk (0x8000UL) /*!< USB_EP DOEPCTL_ISOCONT: USBActEP (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPCTL_ISOCONT_EO_FrNum_Pos (16UL) /*!< USB_EP DOEPCTL_ISOCONT: EO_FrNum (Bit 16) */ +#define USB_EP_DOEPCTL_ISOCONT_EO_FrNum_Msk (0x10000UL) /*!< USB_EP DOEPCTL_ISOCONT: EO_FrNum (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPCTL_ISOCONT_NAKSts_Pos (17UL) /*!< USB_EP DOEPCTL_ISOCONT: NAKSts (Bit 17) */ +#define USB_EP_DOEPCTL_ISOCONT_NAKSts_Msk (0x20000UL) /*!< USB_EP DOEPCTL_ISOCONT: NAKSts (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPCTL_ISOCONT_EPType_Pos (18UL) /*!< USB_EP DOEPCTL_ISOCONT: EPType (Bit 18) */ +#define USB_EP_DOEPCTL_ISOCONT_EPType_Msk (0xc0000UL) /*!< USB_EP DOEPCTL_ISOCONT: EPType (Bitfield-Mask: 0x03) */ +#define USB_EP_DOEPCTL_ISOCONT_Snp_Pos (20UL) /*!< USB_EP DOEPCTL_ISOCONT: Snp (Bit 20) */ +#define USB_EP_DOEPCTL_ISOCONT_Snp_Msk (0x100000UL) /*!< USB_EP DOEPCTL_ISOCONT: Snp (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPCTL_ISOCONT_Stall_Pos (21UL) /*!< USB_EP DOEPCTL_ISOCONT: Stall (Bit 21) */ +#define USB_EP_DOEPCTL_ISOCONT_Stall_Msk (0x200000UL) /*!< USB_EP DOEPCTL_ISOCONT: Stall (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPCTL_ISOCONT_TxFNum_Pos (22UL) /*!< USB_EP DOEPCTL_ISOCONT: TxFNum (Bit 22) */ +#define USB_EP_DOEPCTL_ISOCONT_TxFNum_Msk (0x3c00000UL) /*!< USB_EP DOEPCTL_ISOCONT: TxFNum (Bitfield-Mask: 0x0f) */ +#define USB_EP_DOEPCTL_ISOCONT_CNAK_Pos (26UL) /*!< USB_EP DOEPCTL_ISOCONT: CNAK (Bit 26) */ +#define USB_EP_DOEPCTL_ISOCONT_CNAK_Msk (0x4000000UL) /*!< USB_EP DOEPCTL_ISOCONT: CNAK (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPCTL_ISOCONT_SNAK_Pos (27UL) /*!< USB_EP DOEPCTL_ISOCONT: SNAK (Bit 27) */ +#define USB_EP_DOEPCTL_ISOCONT_SNAK_Msk (0x8000000UL) /*!< USB_EP DOEPCTL_ISOCONT: SNAK (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPCTL_ISOCONT_SetEvenFr_Pos (28UL) /*!< USB_EP DOEPCTL_ISOCONT: SetEvenFr (Bit 28) */ +#define USB_EP_DOEPCTL_ISOCONT_SetEvenFr_Msk (0x10000000UL) /*!< USB_EP DOEPCTL_ISOCONT: SetEvenFr (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPCTL_ISOCONT_SetOddFr_Pos (29UL) /*!< USB_EP DOEPCTL_ISOCONT: SetOddFr (Bit 29) */ +#define USB_EP_DOEPCTL_ISOCONT_SetOddFr_Msk (0x20000000UL) /*!< USB_EP DOEPCTL_ISOCONT: SetOddFr (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPCTL_ISOCONT_EPDis_Pos (30UL) /*!< USB_EP DOEPCTL_ISOCONT: EPDis (Bit 30) */ +#define USB_EP_DOEPCTL_ISOCONT_EPDis_Msk (0x40000000UL) /*!< USB_EP DOEPCTL_ISOCONT: EPDis (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPCTL_ISOCONT_EPEna_Pos (31UL) /*!< USB_EP DOEPCTL_ISOCONT: EPEna (Bit 31) */ +#define USB_EP_DOEPCTL_ISOCONT_EPEna_Msk (0x80000000UL) /*!< USB_EP DOEPCTL_ISOCONT: EPEna (Bitfield-Mask: 0x01) */ + +/* --------------------------- USB_EP_DOEPCTL_INTBULK --------------------------- */ +#define USB_EP_DOEPCTL_INTBULK_MPS_Pos (0UL) /*!< USB_EP DOEPCTL_INTBULK: MPS (Bit 0) */ +#define USB_EP_DOEPCTL_INTBULK_MPS_Msk (0x7ffUL) /*!< USB_EP DOEPCTL_INTBULK: MPS (Bitfield-Mask: 0x7ff) */ +#define USB_EP_DOEPCTL_INTBULK_USBActEP_Pos (15UL) /*!< USB_EP DOEPCTL_INTBULK: USBActEP (Bit 15) */ +#define USB_EP_DOEPCTL_INTBULK_USBActEP_Msk (0x8000UL) /*!< USB_EP DOEPCTL_INTBULK: USBActEP (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPCTL_INTBULK_DPID_Pos (16UL) /*!< USB_EP DOEPCTL_INTBULK: DPID (Bit 16) */ +#define USB_EP_DOEPCTL_INTBULK_DPID_Msk (0x10000UL) /*!< USB_EP DOEPCTL_INTBULK: DPID (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPCTL_INTBULK_NAKSts_Pos (17UL) /*!< USB_EP DOEPCTL_INTBULK: NAKSts (Bit 17) */ +#define USB_EP_DOEPCTL_INTBULK_NAKSts_Msk (0x20000UL) /*!< USB_EP DOEPCTL_INTBULK: NAKSts (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPCTL_INTBULK_EPType_Pos (18UL) /*!< USB_EP DOEPCTL_INTBULK: EPType (Bit 18) */ +#define USB_EP_DOEPCTL_INTBULK_EPType_Msk (0xc0000UL) /*!< USB_EP DOEPCTL_INTBULK: EPType (Bitfield-Mask: 0x03) */ +#define USB_EP_DOEPCTL_INTBULK_Snp_Pos (20UL) /*!< USB_EP DOEPCTL_INTBULK: Snp (Bit 20) */ +#define USB_EP_DOEPCTL_INTBULK_Snp_Msk (0x100000UL) /*!< USB_EP DOEPCTL_INTBULK: Snp (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPCTL_INTBULK_Stall_Pos (21UL) /*!< USB_EP DOEPCTL_INTBULK: Stall (Bit 21) */ +#define USB_EP_DOEPCTL_INTBULK_Stall_Msk (0x200000UL) /*!< USB_EP DOEPCTL_INTBULK: Stall (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPCTL_INTBULK_TxFNum_Pos (22UL) /*!< USB_EP DOEPCTL_INTBULK: TxFNum (Bit 22) */ +#define USB_EP_DOEPCTL_INTBULK_TxFNum_Msk (0x3c00000UL) /*!< USB_EP DOEPCTL_INTBULK: TxFNum (Bitfield-Mask: 0x0f) */ +#define USB_EP_DOEPCTL_INTBULK_CNAK_Pos (26UL) /*!< USB_EP DOEPCTL_INTBULK: CNAK (Bit 26) */ +#define USB_EP_DOEPCTL_INTBULK_CNAK_Msk (0x4000000UL) /*!< USB_EP DOEPCTL_INTBULK: CNAK (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPCTL_INTBULK_SNAK_Pos (27UL) /*!< USB_EP DOEPCTL_INTBULK: SNAK (Bit 27) */ +#define USB_EP_DOEPCTL_INTBULK_SNAK_Msk (0x8000000UL) /*!< USB_EP DOEPCTL_INTBULK: SNAK (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPCTL_INTBULK_SetD0PID_Pos (28UL) /*!< USB_EP DOEPCTL_INTBULK: SetD0PID (Bit 28) */ +#define USB_EP_DOEPCTL_INTBULK_SetD0PID_Msk (0x10000000UL) /*!< USB_EP DOEPCTL_INTBULK: SetD0PID (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPCTL_INTBULK_SetD1PID_Pos (29UL) /*!< USB_EP DOEPCTL_INTBULK: SetD1PID (Bit 29) */ +#define USB_EP_DOEPCTL_INTBULK_SetD1PID_Msk (0x20000000UL) /*!< USB_EP DOEPCTL_INTBULK: SetD1PID (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPCTL_INTBULK_EPDis_Pos (30UL) /*!< USB_EP DOEPCTL_INTBULK: EPDis (Bit 30) */ +#define USB_EP_DOEPCTL_INTBULK_EPDis_Msk (0x40000000UL) /*!< USB_EP DOEPCTL_INTBULK: EPDis (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPCTL_INTBULK_EPEna_Pos (31UL) /*!< USB_EP DOEPCTL_INTBULK: EPEna (Bit 31) */ +#define USB_EP_DOEPCTL_INTBULK_EPEna_Msk (0x80000000UL) /*!< USB_EP DOEPCTL_INTBULK: EPEna (Bitfield-Mask: 0x01) */ + +/* ------------------------------- USB_EP_DOEPINT ------------------------------- */ +#define USB_EP_DOEPINT_XferCompl_Pos (0UL) /*!< USB_EP DOEPINT: XferCompl (Bit 0) */ +#define USB_EP_DOEPINT_XferCompl_Msk (0x1UL) /*!< USB_EP DOEPINT: XferCompl (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPINT_EPDisbld_Pos (1UL) /*!< USB_EP DOEPINT: EPDisbld (Bit 1) */ +#define USB_EP_DOEPINT_EPDisbld_Msk (0x2UL) /*!< USB_EP DOEPINT: EPDisbld (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPINT_AHBErr_Pos (2UL) /*!< USB_EP DOEPINT: AHBErr (Bit 2) */ +#define USB_EP_DOEPINT_AHBErr_Msk (0x4UL) /*!< USB_EP DOEPINT: AHBErr (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPINT_SetUp_Pos (3UL) /*!< USB_EP DOEPINT: SetUp (Bit 3) */ +#define USB_EP_DOEPINT_SetUp_Msk (0x8UL) /*!< USB_EP DOEPINT: SetUp (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPINT_OUTTknEPdis_Pos (4UL) /*!< USB_EP DOEPINT: OUTTknEPdis (Bit 4) */ +#define USB_EP_DOEPINT_OUTTknEPdis_Msk (0x10UL) /*!< USB_EP DOEPINT: OUTTknEPdis (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPINT_StsPhseRcvd_Pos (5UL) /*!< USB_EP DOEPINT: StsPhseRcvd (Bit 5) */ +#define USB_EP_DOEPINT_StsPhseRcvd_Msk (0x20UL) /*!< USB_EP DOEPINT: StsPhseRcvd (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPINT_Back2BackSETup_Pos (6UL) /*!< USB_EP DOEPINT: Back2BackSETup (Bit 6) */ +#define USB_EP_DOEPINT_Back2BackSETup_Msk (0x40UL) /*!< USB_EP DOEPINT: Back2BackSETup (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPINT_BNAIntr_Pos (9UL) /*!< USB_EP DOEPINT: BNAIntr (Bit 9) */ +#define USB_EP_DOEPINT_BNAIntr_Msk (0x200UL) /*!< USB_EP DOEPINT: BNAIntr (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPINT_PktDrpSts_Pos (11UL) /*!< USB_EP DOEPINT: PktDrpSts (Bit 11) */ +#define USB_EP_DOEPINT_PktDrpSts_Msk (0x800UL) /*!< USB_EP DOEPINT: PktDrpSts (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPINT_BbleErrIntrpt_Pos (12UL) /*!< USB_EP DOEPINT: BbleErrIntrpt (Bit 12) */ +#define USB_EP_DOEPINT_BbleErrIntrpt_Msk (0x1000UL) /*!< USB_EP DOEPINT: BbleErrIntrpt (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPINT_NAKIntrpt_Pos (13UL) /*!< USB_EP DOEPINT: NAKIntrpt (Bit 13) */ +#define USB_EP_DOEPINT_NAKIntrpt_Msk (0x2000UL) /*!< USB_EP DOEPINT: NAKIntrpt (Bitfield-Mask: 0x01) */ +#define USB_EP_DOEPINT_NYETIntrpt_Pos (14UL) /*!< USB_EP DOEPINT: NYETIntrpt (Bit 14) */ +#define USB_EP_DOEPINT_NYETIntrpt_Msk (0x4000UL) /*!< USB_EP DOEPINT: NYETIntrpt (Bitfield-Mask: 0x01) */ + +/* ----------------------------- USB_EP_DOEPTSIZ_ISO ---------------------------- */ +#define USB_EP_DOEPTSIZ_ISO_XferSize_Pos (0UL) /*!< USB_EP DOEPTSIZ_ISO: XferSize (Bit 0) */ +#define USB_EP_DOEPTSIZ_ISO_XferSize_Msk (0x7ffffUL) /*!< USB_EP DOEPTSIZ_ISO: XferSize (Bitfield-Mask: 0x7ffff) */ +#define USB_EP_DOEPTSIZ_ISO_PktCnt_Pos (19UL) /*!< USB_EP DOEPTSIZ_ISO: PktCnt (Bit 19) */ +#define USB_EP_DOEPTSIZ_ISO_PktCnt_Msk (0x1ff80000UL) /*!< USB_EP DOEPTSIZ_ISO: PktCnt (Bitfield-Mask: 0x3ff) */ +#define USB_EP_DOEPTSIZ_ISO_RxDPID_Pos (29UL) /*!< USB_EP DOEPTSIZ_ISO: RxDPID (Bit 29) */ +#define USB_EP_DOEPTSIZ_ISO_RxDPID_Msk (0x60000000UL) /*!< USB_EP DOEPTSIZ_ISO: RxDPID (Bitfield-Mask: 0x03) */ + +/* --------------------------- USB_EP_DOEPTSIZ_CONTROL -------------------------- */ +#define USB_EP_DOEPTSIZ_CONTROL_XferSize_Pos (0UL) /*!< USB_EP DOEPTSIZ_CONTROL: XferSize (Bit 0) */ +#define USB_EP_DOEPTSIZ_CONTROL_XferSize_Msk (0x7ffffUL) /*!< USB_EP DOEPTSIZ_CONTROL: XferSize (Bitfield-Mask: 0x7ffff) */ +#define USB_EP_DOEPTSIZ_CONTROL_PktCnt_Pos (19UL) /*!< USB_EP DOEPTSIZ_CONTROL: PktCnt (Bit 19) */ +#define USB_EP_DOEPTSIZ_CONTROL_PktCnt_Msk (0x1ff80000UL) /*!< USB_EP DOEPTSIZ_CONTROL: PktCnt (Bitfield-Mask: 0x3ff) */ +#define USB_EP_DOEPTSIZ_CONTROL_SUPCnt_Pos (29UL) /*!< USB_EP DOEPTSIZ_CONTROL: SUPCnt (Bit 29) */ +#define USB_EP_DOEPTSIZ_CONTROL_SUPCnt_Msk (0x60000000UL) /*!< USB_EP DOEPTSIZ_CONTROL: SUPCnt (Bitfield-Mask: 0x03) */ + +/* ------------------------------- USB_EP_DOEPDMA ------------------------------- */ +#define USB_EP_DOEPDMA_DMAAddr_Pos (0UL) /*!< USB_EP DOEPDMA: DMAAddr (Bit 0) */ +#define USB_EP_DOEPDMA_DMAAddr_Msk (0xffffffffUL) /*!< USB_EP DOEPDMA: DMAAddr (Bitfield-Mask: 0xffffffff) */ + +/* ------------------------------- USB_EP_DOEPDMAB ------------------------------ */ +#define USB_EP_DOEPDMAB_DMABufferAddr_Pos (0UL) /*!< USB_EP DOEPDMAB: DMABufferAddr (Bit 0) */ +#define USB_EP_DOEPDMAB_DMABufferAddr_Msk (0xffffffffUL) /*!< USB_EP DOEPDMAB: DMABufferAddr (Bitfield-Mask: 0xffffffff) */ + + +/* ================================================================================ */ +/* ================ Group 'USB_CH' Position & Mask ================ */ +/* ================================================================================ */ + + +/* -------------------------------- USB_CH_HCCHAR ------------------------------- */ +#define USB_CH_HCCHAR_MPS_Pos (0UL) /*!< USB_CH HCCHAR: MPS (Bit 0) */ +#define USB_CH_HCCHAR_MPS_Msk (0x7ffUL) /*!< USB_CH HCCHAR: MPS (Bitfield-Mask: 0x7ff) */ +#define USB_CH_HCCHAR_EPNum_Pos (11UL) /*!< USB_CH HCCHAR: EPNum (Bit 11) */ +#define USB_CH_HCCHAR_EPNum_Msk (0x7800UL) /*!< USB_CH HCCHAR: EPNum (Bitfield-Mask: 0x0f) */ +#define USB_CH_HCCHAR_EPDir_Pos (15UL) /*!< USB_CH HCCHAR: EPDir (Bit 15) */ +#define USB_CH_HCCHAR_EPDir_Msk (0x8000UL) /*!< USB_CH HCCHAR: EPDir (Bitfield-Mask: 0x01) */ +#define USB_CH_HCCHAR_EPType_Pos (18UL) /*!< USB_CH HCCHAR: EPType (Bit 18) */ +#define USB_CH_HCCHAR_EPType_Msk (0xc0000UL) /*!< USB_CH HCCHAR: EPType (Bitfield-Mask: 0x03) */ +#define USB_CH_HCCHAR_MC_EC_Pos (20UL) /*!< USB_CH HCCHAR: MC_EC (Bit 20) */ +#define USB_CH_HCCHAR_MC_EC_Msk (0x300000UL) /*!< USB_CH HCCHAR: MC_EC (Bitfield-Mask: 0x03) */ +#define USB_CH_HCCHAR_DevAddr_Pos (22UL) /*!< USB_CH HCCHAR: DevAddr (Bit 22) */ +#define USB_CH_HCCHAR_DevAddr_Msk (0x1fc00000UL) /*!< USB_CH HCCHAR: DevAddr (Bitfield-Mask: 0x7f) */ +#define USB_CH_HCCHAR_OddFrm_Pos (29UL) /*!< USB_CH HCCHAR: OddFrm (Bit 29) */ +#define USB_CH_HCCHAR_OddFrm_Msk (0x20000000UL) /*!< USB_CH HCCHAR: OddFrm (Bitfield-Mask: 0x01) */ +#define USB_CH_HCCHAR_ChDis_Pos (30UL) /*!< USB_CH HCCHAR: ChDis (Bit 30) */ +#define USB_CH_HCCHAR_ChDis_Msk (0x40000000UL) /*!< USB_CH HCCHAR: ChDis (Bitfield-Mask: 0x01) */ +#define USB_CH_HCCHAR_ChEna_Pos (31UL) /*!< USB_CH HCCHAR: ChEna (Bit 31) */ +#define USB_CH_HCCHAR_ChEna_Msk (0x80000000UL) /*!< USB_CH HCCHAR: ChEna (Bitfield-Mask: 0x01) */ + +/* -------------------------------- USB_CH_HCINT -------------------------------- */ +#define USB_CH_HCINT_XferCompl_Pos (0UL) /*!< USB_CH HCINT: XferCompl (Bit 0) */ +#define USB_CH_HCINT_XferCompl_Msk (0x1UL) /*!< USB_CH HCINT: XferCompl (Bitfield-Mask: 0x01) */ +#define USB_CH_HCINT_ChHltd_Pos (1UL) /*!< USB_CH HCINT: ChHltd (Bit 1) */ +#define USB_CH_HCINT_ChHltd_Msk (0x2UL) /*!< USB_CH HCINT: ChHltd (Bitfield-Mask: 0x01) */ +#define USB_CH_HCINT_AHBErr_Pos (2UL) /*!< USB_CH HCINT: AHBErr (Bit 2) */ +#define USB_CH_HCINT_AHBErr_Msk (0x4UL) /*!< USB_CH HCINT: AHBErr (Bitfield-Mask: 0x01) */ +#define USB_CH_HCINT_STALL_Pos (3UL) /*!< USB_CH HCINT: STALL (Bit 3) */ +#define USB_CH_HCINT_STALL_Msk (0x8UL) /*!< USB_CH HCINT: STALL (Bitfield-Mask: 0x01) */ +#define USB_CH_HCINT_NAK_Pos (4UL) /*!< USB_CH HCINT: NAK (Bit 4) */ +#define USB_CH_HCINT_NAK_Msk (0x10UL) /*!< USB_CH HCINT: NAK (Bitfield-Mask: 0x01) */ +#define USB_CH_HCINT_ACK_Pos (5UL) /*!< USB_CH HCINT: ACK (Bit 5) */ +#define USB_CH_HCINT_ACK_Msk (0x20UL) /*!< USB_CH HCINT: ACK (Bitfield-Mask: 0x01) */ +#define USB_CH_HCINT_NYET_Pos (6UL) /*!< USB_CH HCINT: NYET (Bit 6) */ +#define USB_CH_HCINT_NYET_Msk (0x40UL) /*!< USB_CH HCINT: NYET (Bitfield-Mask: 0x01) */ +#define USB_CH_HCINT_XactErr_Pos (7UL) /*!< USB_CH HCINT: XactErr (Bit 7) */ +#define USB_CH_HCINT_XactErr_Msk (0x80UL) /*!< USB_CH HCINT: XactErr (Bitfield-Mask: 0x01) */ +#define USB_CH_HCINT_BblErr_Pos (8UL) /*!< USB_CH HCINT: BblErr (Bit 8) */ +#define USB_CH_HCINT_BblErr_Msk (0x100UL) /*!< USB_CH HCINT: BblErr (Bitfield-Mask: 0x01) */ +#define USB_CH_HCINT_FrmOvrun_Pos (9UL) /*!< USB_CH HCINT: FrmOvrun (Bit 9) */ +#define USB_CH_HCINT_FrmOvrun_Msk (0x200UL) /*!< USB_CH HCINT: FrmOvrun (Bitfield-Mask: 0x01) */ +#define USB_CH_HCINT_DataTglErr_Pos (10UL) /*!< USB_CH HCINT: DataTglErr (Bit 10) */ +#define USB_CH_HCINT_DataTglErr_Msk (0x400UL) /*!< USB_CH HCINT: DataTglErr (Bitfield-Mask: 0x01) */ +#define USB_CH_HCINT_BNAIntr_Pos (11UL) /*!< USB_CH HCINT: BNAIntr (Bit 11) */ +#define USB_CH_HCINT_BNAIntr_Msk (0x800UL) /*!< USB_CH HCINT: BNAIntr (Bitfield-Mask: 0x01) */ +#define USB_CH_HCINT_XCS_XACT_ERR_Pos (12UL) /*!< USB_CH HCINT: XCS_XACT_ERR (Bit 12) */ +#define USB_CH_HCINT_XCS_XACT_ERR_Msk (0x1000UL) /*!< USB_CH HCINT: XCS_XACT_ERR (Bitfield-Mask: 0x01) */ +#define USB_CH_HCINT_DESC_LST_ROLLIntr_Pos (13UL) /*!< USB_CH HCINT: DESC_LST_ROLLIntr (Bit 13) */ +#define USB_CH_HCINT_DESC_LST_ROLLIntr_Msk (0x2000UL) /*!< USB_CH HCINT: DESC_LST_ROLLIntr (Bitfield-Mask: 0x01) */ + +/* ------------------------------- USB_CH_HCINTMSK ------------------------------ */ +#define USB_CH_HCINTMSK_XferComplMsk_Pos (0UL) /*!< USB_CH HCINTMSK: XferComplMsk (Bit 0) */ +#define USB_CH_HCINTMSK_XferComplMsk_Msk (0x1UL) /*!< USB_CH HCINTMSK: XferComplMsk (Bitfield-Mask: 0x01) */ +#define USB_CH_HCINTMSK_ChHltdMsk_Pos (1UL) /*!< USB_CH HCINTMSK: ChHltdMsk (Bit 1) */ +#define USB_CH_HCINTMSK_ChHltdMsk_Msk (0x2UL) /*!< USB_CH HCINTMSK: ChHltdMsk (Bitfield-Mask: 0x01) */ +#define USB_CH_HCINTMSK_AHBErrMsk_Pos (2UL) /*!< USB_CH HCINTMSK: AHBErrMsk (Bit 2) */ +#define USB_CH_HCINTMSK_AHBErrMsk_Msk (0x4UL) /*!< USB_CH HCINTMSK: AHBErrMsk (Bitfield-Mask: 0x01) */ +#define USB_CH_HCINTMSK_StallMsk_Pos (3UL) /*!< USB_CH HCINTMSK: StallMsk (Bit 3) */ +#define USB_CH_HCINTMSK_StallMsk_Msk (0x8UL) /*!< USB_CH HCINTMSK: StallMsk (Bitfield-Mask: 0x01) */ +#define USB_CH_HCINTMSK_NakMsk_Pos (4UL) /*!< USB_CH HCINTMSK: NakMsk (Bit 4) */ +#define USB_CH_HCINTMSK_NakMsk_Msk (0x10UL) /*!< USB_CH HCINTMSK: NakMsk (Bitfield-Mask: 0x01) */ +#define USB_CH_HCINTMSK_AckMsk_Pos (5UL) /*!< USB_CH HCINTMSK: AckMsk (Bit 5) */ +#define USB_CH_HCINTMSK_AckMsk_Msk (0x20UL) /*!< USB_CH HCINTMSK: AckMsk (Bitfield-Mask: 0x01) */ +#define USB_CH_HCINTMSK_NyetMsk_Pos (6UL) /*!< USB_CH HCINTMSK: NyetMsk (Bit 6) */ +#define USB_CH_HCINTMSK_NyetMsk_Msk (0x40UL) /*!< USB_CH HCINTMSK: NyetMsk (Bitfield-Mask: 0x01) */ +#define USB_CH_HCINTMSK_XactErrMsk_Pos (7UL) /*!< USB_CH HCINTMSK: XactErrMsk (Bit 7) */ +#define USB_CH_HCINTMSK_XactErrMsk_Msk (0x80UL) /*!< USB_CH HCINTMSK: XactErrMsk (Bitfield-Mask: 0x01) */ +#define USB_CH_HCINTMSK_BblErrMsk_Pos (8UL) /*!< USB_CH HCINTMSK: BblErrMsk (Bit 8) */ +#define USB_CH_HCINTMSK_BblErrMsk_Msk (0x100UL) /*!< USB_CH HCINTMSK: BblErrMsk (Bitfield-Mask: 0x01) */ +#define USB_CH_HCINTMSK_FrmOvrunMsk_Pos (9UL) /*!< USB_CH HCINTMSK: FrmOvrunMsk (Bit 9) */ +#define USB_CH_HCINTMSK_FrmOvrunMsk_Msk (0x200UL) /*!< USB_CH HCINTMSK: FrmOvrunMsk (Bitfield-Mask: 0x01) */ +#define USB_CH_HCINTMSK_DataTglErrMsk_Pos (10UL) /*!< USB_CH HCINTMSK: DataTglErrMsk (Bit 10) */ +#define USB_CH_HCINTMSK_DataTglErrMsk_Msk (0x400UL) /*!< USB_CH HCINTMSK: DataTglErrMsk (Bitfield-Mask: 0x01) */ +#define USB_CH_HCINTMSK_BNAIntrMsk_Pos (11UL) /*!< USB_CH HCINTMSK: BNAIntrMsk (Bit 11) */ +#define USB_CH_HCINTMSK_BNAIntrMsk_Msk (0x800UL) /*!< USB_CH HCINTMSK: BNAIntrMsk (Bitfield-Mask: 0x01) */ +#define USB_CH_HCINTMSK_DESC_LST_ROLLIntrMsk_Pos (13UL) /*!< USB_CH HCINTMSK: DESC_LST_ROLLIntrMsk (Bit 13) */ +#define USB_CH_HCINTMSK_DESC_LST_ROLLIntrMsk_Msk (0x2000UL) /*!< USB_CH HCINTMSK: DESC_LST_ROLLIntrMsk (Bitfield-Mask: 0x01) */ + +/* -------------------------- USB_CH_HCTSIZ_BUFFERMODE -------------------------- */ +#define USB_CH_HCTSIZ_BUFFERMODE_XferSize_Pos (0UL) /*!< USB_CH HCTSIZ_BUFFERMODE: XferSize (Bit 0) */ +#define USB_CH_HCTSIZ_BUFFERMODE_XferSize_Msk (0x7ffffUL) /*!< USB_CH HCTSIZ_BUFFERMODE: XferSize (Bitfield-Mask: 0x7ffff) */ +#define USB_CH_HCTSIZ_BUFFERMODE_PktCnt_Pos (19UL) /*!< USB_CH HCTSIZ_BUFFERMODE: PktCnt (Bit 19) */ +#define USB_CH_HCTSIZ_BUFFERMODE_PktCnt_Msk (0x1ff80000UL) /*!< USB_CH HCTSIZ_BUFFERMODE: PktCnt (Bitfield-Mask: 0x3ff) */ +#define USB_CH_HCTSIZ_BUFFERMODE_Pid_Pos (29UL) /*!< USB_CH HCTSIZ_BUFFERMODE: Pid (Bit 29) */ +#define USB_CH_HCTSIZ_BUFFERMODE_Pid_Msk (0x60000000UL) /*!< USB_CH HCTSIZ_BUFFERMODE: Pid (Bitfield-Mask: 0x03) */ + +/* -------------------------- USB_CH_HCTSIZ_SCATGATHER -------------------------- */ +#define USB_CH_HCTSIZ_SCATGATHER_SCHED_INFO_Pos (0UL) /*!< USB_CH HCTSIZ_SCATGATHER: SCHED_INFO (Bit 0) */ +#define USB_CH_HCTSIZ_SCATGATHER_SCHED_INFO_Msk (0xffUL) /*!< USB_CH HCTSIZ_SCATGATHER: SCHED_INFO (Bitfield-Mask: 0xff) */ +#define USB_CH_HCTSIZ_SCATGATHER_NTD_Pos (8UL) /*!< USB_CH HCTSIZ_SCATGATHER: NTD (Bit 8) */ +#define USB_CH_HCTSIZ_SCATGATHER_NTD_Msk (0xff00UL) /*!< USB_CH HCTSIZ_SCATGATHER: NTD (Bitfield-Mask: 0xff) */ +#define USB_CH_HCTSIZ_SCATGATHER_Pid_Pos (29UL) /*!< USB_CH HCTSIZ_SCATGATHER: Pid (Bit 29) */ +#define USB_CH_HCTSIZ_SCATGATHER_Pid_Msk (0x60000000UL) /*!< USB_CH HCTSIZ_SCATGATHER: Pid (Bitfield-Mask: 0x03) */ + +/* --------------------------- USB_CH_HCDMA_BUFFERMODE -------------------------- */ +#define USB_CH_HCDMA_BUFFERMODE_DMAAddr_Pos (0UL) /*!< USB_CH HCDMA_BUFFERMODE: DMAAddr (Bit 0) */ +#define USB_CH_HCDMA_BUFFERMODE_DMAAddr_Msk (0xffffffffUL) /*!< USB_CH HCDMA_BUFFERMODE: DMAAddr (Bitfield-Mask: 0xffffffff) */ + +/* --------------------------- USB_CH_HCDMA_SCATGATHER -------------------------- */ +#define USB_CH_HCDMA_SCATGATHER_CTD_Pos (3UL) /*!< USB_CH HCDMA_SCATGATHER: CTD (Bit 3) */ +#define USB_CH_HCDMA_SCATGATHER_CTD_Msk (0x1f8UL) /*!< USB_CH HCDMA_SCATGATHER: CTD (Bitfield-Mask: 0x3f) */ +#define USB_CH_HCDMA_SCATGATHER_DMAAddr_Pos (9UL) /*!< USB_CH HCDMA_SCATGATHER: DMAAddr (Bit 9) */ +#define USB_CH_HCDMA_SCATGATHER_DMAAddr_Msk (0xfffffe00UL) /*!< USB_CH HCDMA_SCATGATHER: DMAAddr (Bitfield-Mask: 0x7fffff) */ + +/* -------------------------------- USB_CH_HCDMAB ------------------------------- */ +#define USB_CH_HCDMAB_Buffer_Address_Pos (0UL) /*!< USB_CH HCDMAB: Buffer_Address (Bit 0) */ +#define USB_CH_HCDMAB_Buffer_Address_Msk (0xffffffffUL) /*!< USB_CH HCDMAB: Buffer_Address (Bitfield-Mask: 0xffffffff) */ + + +/* ================================================================================ */ +/* ================ Group 'USIC' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ----------------------------------- USIC_ID ---------------------------------- */ +#define USIC_ID_MOD_REV_Pos (0UL) /*!< USIC ID: MOD_REV (Bit 0) */ +#define USIC_ID_MOD_REV_Msk (0xffUL) /*!< USIC ID: MOD_REV (Bitfield-Mask: 0xff) */ +#define USIC_ID_MOD_TYPE_Pos (8UL) /*!< USIC ID: MOD_TYPE (Bit 8) */ +#define USIC_ID_MOD_TYPE_Msk (0xff00UL) /*!< USIC ID: MOD_TYPE (Bitfield-Mask: 0xff) */ +#define USIC_ID_MOD_NUMBER_Pos (16UL) /*!< USIC ID: MOD_NUMBER (Bit 16) */ +#define USIC_ID_MOD_NUMBER_Msk (0xffff0000UL) /*!< USIC ID: MOD_NUMBER (Bitfield-Mask: 0xffff) */ + + +/* ================================================================================ */ +/* ================ Group 'USIC_CH' Position & Mask ================ */ +/* ================================================================================ */ + + +/* -------------------------------- USIC_CH_CCFG -------------------------------- */ +#define USIC_CH_CCFG_SSC_Pos (0UL) /*!< USIC_CH CCFG: SSC (Bit 0) */ +#define USIC_CH_CCFG_SSC_Msk (0x1UL) /*!< USIC_CH CCFG: SSC (Bitfield-Mask: 0x01) */ +#define USIC_CH_CCFG_ASC_Pos (1UL) /*!< USIC_CH CCFG: ASC (Bit 1) */ +#define USIC_CH_CCFG_ASC_Msk (0x2UL) /*!< USIC_CH CCFG: ASC (Bitfield-Mask: 0x01) */ +#define USIC_CH_CCFG_IIC_Pos (2UL) /*!< USIC_CH CCFG: IIC (Bit 2) */ +#define USIC_CH_CCFG_IIC_Msk (0x4UL) /*!< USIC_CH CCFG: IIC (Bitfield-Mask: 0x01) */ +#define USIC_CH_CCFG_IIS_Pos (3UL) /*!< USIC_CH CCFG: IIS (Bit 3) */ +#define USIC_CH_CCFG_IIS_Msk (0x8UL) /*!< USIC_CH CCFG: IIS (Bitfield-Mask: 0x01) */ +#define USIC_CH_CCFG_RB_Pos (6UL) /*!< USIC_CH CCFG: RB (Bit 6) */ +#define USIC_CH_CCFG_RB_Msk (0x40UL) /*!< USIC_CH CCFG: RB (Bitfield-Mask: 0x01) */ +#define USIC_CH_CCFG_TB_Pos (7UL) /*!< USIC_CH CCFG: TB (Bit 7) */ +#define USIC_CH_CCFG_TB_Msk (0x80UL) /*!< USIC_CH CCFG: TB (Bitfield-Mask: 0x01) */ + +/* -------------------------------- USIC_CH_KSCFG ------------------------------- */ +#define USIC_CH_KSCFG_MODEN_Pos (0UL) /*!< USIC_CH KSCFG: MODEN (Bit 0) */ +#define USIC_CH_KSCFG_MODEN_Msk (0x1UL) /*!< USIC_CH KSCFG: MODEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_KSCFG_BPMODEN_Pos (1UL) /*!< USIC_CH KSCFG: BPMODEN (Bit 1) */ +#define USIC_CH_KSCFG_BPMODEN_Msk (0x2UL) /*!< USIC_CH KSCFG: BPMODEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_KSCFG_NOMCFG_Pos (4UL) /*!< USIC_CH KSCFG: NOMCFG (Bit 4) */ +#define USIC_CH_KSCFG_NOMCFG_Msk (0x30UL) /*!< USIC_CH KSCFG: NOMCFG (Bitfield-Mask: 0x03) */ +#define USIC_CH_KSCFG_BPNOM_Pos (7UL) /*!< USIC_CH KSCFG: BPNOM (Bit 7) */ +#define USIC_CH_KSCFG_BPNOM_Msk (0x80UL) /*!< USIC_CH KSCFG: BPNOM (Bitfield-Mask: 0x01) */ +#define USIC_CH_KSCFG_SUMCFG_Pos (8UL) /*!< USIC_CH KSCFG: SUMCFG (Bit 8) */ +#define USIC_CH_KSCFG_SUMCFG_Msk (0x300UL) /*!< USIC_CH KSCFG: SUMCFG (Bitfield-Mask: 0x03) */ +#define USIC_CH_KSCFG_BPSUM_Pos (11UL) /*!< USIC_CH KSCFG: BPSUM (Bit 11) */ +#define USIC_CH_KSCFG_BPSUM_Msk (0x800UL) /*!< USIC_CH KSCFG: BPSUM (Bitfield-Mask: 0x01) */ + +/* --------------------------------- USIC_CH_FDR -------------------------------- */ +#define USIC_CH_FDR_STEP_Pos (0UL) /*!< USIC_CH FDR: STEP (Bit 0) */ +#define USIC_CH_FDR_STEP_Msk (0x3ffUL) /*!< USIC_CH FDR: STEP (Bitfield-Mask: 0x3ff) */ +#define USIC_CH_FDR_DM_Pos (14UL) /*!< USIC_CH FDR: DM (Bit 14) */ +#define USIC_CH_FDR_DM_Msk (0xc000UL) /*!< USIC_CH FDR: DM (Bitfield-Mask: 0x03) */ +#define USIC_CH_FDR_RESULT_Pos (16UL) /*!< USIC_CH FDR: RESULT (Bit 16) */ +#define USIC_CH_FDR_RESULT_Msk (0x3ff0000UL) /*!< USIC_CH FDR: RESULT (Bitfield-Mask: 0x3ff) */ + +/* --------------------------------- USIC_CH_BRG -------------------------------- */ +#define USIC_CH_BRG_CLKSEL_Pos (0UL) /*!< USIC_CH BRG: CLKSEL (Bit 0) */ +#define USIC_CH_BRG_CLKSEL_Msk (0x3UL) /*!< USIC_CH BRG: CLKSEL (Bitfield-Mask: 0x03) */ +#define USIC_CH_BRG_TMEN_Pos (3UL) /*!< USIC_CH BRG: TMEN (Bit 3) */ +#define USIC_CH_BRG_TMEN_Msk (0x8UL) /*!< USIC_CH BRG: TMEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_BRG_PPPEN_Pos (4UL) /*!< USIC_CH BRG: PPPEN (Bit 4) */ +#define USIC_CH_BRG_PPPEN_Msk (0x10UL) /*!< USIC_CH BRG: PPPEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_BRG_CTQSEL_Pos (6UL) /*!< USIC_CH BRG: CTQSEL (Bit 6) */ +#define USIC_CH_BRG_CTQSEL_Msk (0xc0UL) /*!< USIC_CH BRG: CTQSEL (Bitfield-Mask: 0x03) */ +#define USIC_CH_BRG_PCTQ_Pos (8UL) /*!< USIC_CH BRG: PCTQ (Bit 8) */ +#define USIC_CH_BRG_PCTQ_Msk (0x300UL) /*!< USIC_CH BRG: PCTQ (Bitfield-Mask: 0x03) */ +#define USIC_CH_BRG_DCTQ_Pos (10UL) /*!< USIC_CH BRG: DCTQ (Bit 10) */ +#define USIC_CH_BRG_DCTQ_Msk (0x7c00UL) /*!< USIC_CH BRG: DCTQ (Bitfield-Mask: 0x1f) */ +#define USIC_CH_BRG_PDIV_Pos (16UL) /*!< USIC_CH BRG: PDIV (Bit 16) */ +#define USIC_CH_BRG_PDIV_Msk (0x3ff0000UL) /*!< USIC_CH BRG: PDIV (Bitfield-Mask: 0x3ff) */ +#define USIC_CH_BRG_SCLKOSEL_Pos (28UL) /*!< USIC_CH BRG: SCLKOSEL (Bit 28) */ +#define USIC_CH_BRG_SCLKOSEL_Msk (0x10000000UL) /*!< USIC_CH BRG: SCLKOSEL (Bitfield-Mask: 0x01) */ +#define USIC_CH_BRG_MCLKCFG_Pos (29UL) /*!< USIC_CH BRG: MCLKCFG (Bit 29) */ +#define USIC_CH_BRG_MCLKCFG_Msk (0x20000000UL) /*!< USIC_CH BRG: MCLKCFG (Bitfield-Mask: 0x01) */ +#define USIC_CH_BRG_SCLKCFG_Pos (30UL) /*!< USIC_CH BRG: SCLKCFG (Bit 30) */ +#define USIC_CH_BRG_SCLKCFG_Msk (0xc0000000UL) /*!< USIC_CH BRG: SCLKCFG (Bitfield-Mask: 0x03) */ + +/* -------------------------------- USIC_CH_INPR -------------------------------- */ +#define USIC_CH_INPR_TSINP_Pos (0UL) /*!< USIC_CH INPR: TSINP (Bit 0) */ +#define USIC_CH_INPR_TSINP_Msk (0x7UL) /*!< USIC_CH INPR: TSINP (Bitfield-Mask: 0x07) */ +#define USIC_CH_INPR_TBINP_Pos (4UL) /*!< USIC_CH INPR: TBINP (Bit 4) */ +#define USIC_CH_INPR_TBINP_Msk (0x70UL) /*!< USIC_CH INPR: TBINP (Bitfield-Mask: 0x07) */ +#define USIC_CH_INPR_RINP_Pos (8UL) /*!< USIC_CH INPR: RINP (Bit 8) */ +#define USIC_CH_INPR_RINP_Msk (0x700UL) /*!< USIC_CH INPR: RINP (Bitfield-Mask: 0x07) */ +#define USIC_CH_INPR_AINP_Pos (12UL) /*!< USIC_CH INPR: AINP (Bit 12) */ +#define USIC_CH_INPR_AINP_Msk (0x7000UL) /*!< USIC_CH INPR: AINP (Bitfield-Mask: 0x07) */ +#define USIC_CH_INPR_PINP_Pos (16UL) /*!< USIC_CH INPR: PINP (Bit 16) */ +#define USIC_CH_INPR_PINP_Msk (0x70000UL) /*!< USIC_CH INPR: PINP (Bitfield-Mask: 0x07) */ + +/* -------------------------------- USIC_CH_DX0CR ------------------------------- */ +#define USIC_CH_DX0CR_DSEL_Pos (0UL) /*!< USIC_CH DX0CR: DSEL (Bit 0) */ +#define USIC_CH_DX0CR_DSEL_Msk (0x7UL) /*!< USIC_CH DX0CR: DSEL (Bitfield-Mask: 0x07) */ +#define USIC_CH_DX0CR_INSW_Pos (4UL) /*!< USIC_CH DX0CR: INSW (Bit 4) */ +#define USIC_CH_DX0CR_INSW_Msk (0x10UL) /*!< USIC_CH DX0CR: INSW (Bitfield-Mask: 0x01) */ +#define USIC_CH_DX0CR_DFEN_Pos (5UL) /*!< USIC_CH DX0CR: DFEN (Bit 5) */ +#define USIC_CH_DX0CR_DFEN_Msk (0x20UL) /*!< USIC_CH DX0CR: DFEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_DX0CR_DSEN_Pos (6UL) /*!< USIC_CH DX0CR: DSEN (Bit 6) */ +#define USIC_CH_DX0CR_DSEN_Msk (0x40UL) /*!< USIC_CH DX0CR: DSEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_DX0CR_DPOL_Pos (8UL) /*!< USIC_CH DX0CR: DPOL (Bit 8) */ +#define USIC_CH_DX0CR_DPOL_Msk (0x100UL) /*!< USIC_CH DX0CR: DPOL (Bitfield-Mask: 0x01) */ +#define USIC_CH_DX0CR_SFSEL_Pos (9UL) /*!< USIC_CH DX0CR: SFSEL (Bit 9) */ +#define USIC_CH_DX0CR_SFSEL_Msk (0x200UL) /*!< USIC_CH DX0CR: SFSEL (Bitfield-Mask: 0x01) */ +#define USIC_CH_DX0CR_CM_Pos (10UL) /*!< USIC_CH DX0CR: CM (Bit 10) */ +#define USIC_CH_DX0CR_CM_Msk (0xc00UL) /*!< USIC_CH DX0CR: CM (Bitfield-Mask: 0x03) */ +#define USIC_CH_DX0CR_DXS_Pos (15UL) /*!< USIC_CH DX0CR: DXS (Bit 15) */ +#define USIC_CH_DX0CR_DXS_Msk (0x8000UL) /*!< USIC_CH DX0CR: DXS (Bitfield-Mask: 0x01) */ + +/* -------------------------------- USIC_CH_DX1CR ------------------------------- */ +#define USIC_CH_DX1CR_DSEL_Pos (0UL) /*!< USIC_CH DX1CR: DSEL (Bit 0) */ +#define USIC_CH_DX1CR_DSEL_Msk (0x7UL) /*!< USIC_CH DX1CR: DSEL (Bitfield-Mask: 0x07) */ +#define USIC_CH_DX1CR_DCEN_Pos (3UL) /*!< USIC_CH DX1CR: DCEN (Bit 3) */ +#define USIC_CH_DX1CR_DCEN_Msk (0x8UL) /*!< USIC_CH DX1CR: DCEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_DX1CR_INSW_Pos (4UL) /*!< USIC_CH DX1CR: INSW (Bit 4) */ +#define USIC_CH_DX1CR_INSW_Msk (0x10UL) /*!< USIC_CH DX1CR: INSW (Bitfield-Mask: 0x01) */ +#define USIC_CH_DX1CR_DFEN_Pos (5UL) /*!< USIC_CH DX1CR: DFEN (Bit 5) */ +#define USIC_CH_DX1CR_DFEN_Msk (0x20UL) /*!< USIC_CH DX1CR: DFEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_DX1CR_DSEN_Pos (6UL) /*!< USIC_CH DX1CR: DSEN (Bit 6) */ +#define USIC_CH_DX1CR_DSEN_Msk (0x40UL) /*!< USIC_CH DX1CR: DSEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_DX1CR_DPOL_Pos (8UL) /*!< USIC_CH DX1CR: DPOL (Bit 8) */ +#define USIC_CH_DX1CR_DPOL_Msk (0x100UL) /*!< USIC_CH DX1CR: DPOL (Bitfield-Mask: 0x01) */ +#define USIC_CH_DX1CR_SFSEL_Pos (9UL) /*!< USIC_CH DX1CR: SFSEL (Bit 9) */ +#define USIC_CH_DX1CR_SFSEL_Msk (0x200UL) /*!< USIC_CH DX1CR: SFSEL (Bitfield-Mask: 0x01) */ +#define USIC_CH_DX1CR_CM_Pos (10UL) /*!< USIC_CH DX1CR: CM (Bit 10) */ +#define USIC_CH_DX1CR_CM_Msk (0xc00UL) /*!< USIC_CH DX1CR: CM (Bitfield-Mask: 0x03) */ +#define USIC_CH_DX1CR_DXS_Pos (15UL) /*!< USIC_CH DX1CR: DXS (Bit 15) */ +#define USIC_CH_DX1CR_DXS_Msk (0x8000UL) /*!< USIC_CH DX1CR: DXS (Bitfield-Mask: 0x01) */ + +/* -------------------------------- USIC_CH_DX2CR ------------------------------- */ +#define USIC_CH_DX2CR_DSEL_Pos (0UL) /*!< USIC_CH DX2CR: DSEL (Bit 0) */ +#define USIC_CH_DX2CR_DSEL_Msk (0x7UL) /*!< USIC_CH DX2CR: DSEL (Bitfield-Mask: 0x07) */ +#define USIC_CH_DX2CR_INSW_Pos (4UL) /*!< USIC_CH DX2CR: INSW (Bit 4) */ +#define USIC_CH_DX2CR_INSW_Msk (0x10UL) /*!< USIC_CH DX2CR: INSW (Bitfield-Mask: 0x01) */ +#define USIC_CH_DX2CR_DFEN_Pos (5UL) /*!< USIC_CH DX2CR: DFEN (Bit 5) */ +#define USIC_CH_DX2CR_DFEN_Msk (0x20UL) /*!< USIC_CH DX2CR: DFEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_DX2CR_DSEN_Pos (6UL) /*!< USIC_CH DX2CR: DSEN (Bit 6) */ +#define USIC_CH_DX2CR_DSEN_Msk (0x40UL) /*!< USIC_CH DX2CR: DSEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_DX2CR_DPOL_Pos (8UL) /*!< USIC_CH DX2CR: DPOL (Bit 8) */ +#define USIC_CH_DX2CR_DPOL_Msk (0x100UL) /*!< USIC_CH DX2CR: DPOL (Bitfield-Mask: 0x01) */ +#define USIC_CH_DX2CR_SFSEL_Pos (9UL) /*!< USIC_CH DX2CR: SFSEL (Bit 9) */ +#define USIC_CH_DX2CR_SFSEL_Msk (0x200UL) /*!< USIC_CH DX2CR: SFSEL (Bitfield-Mask: 0x01) */ +#define USIC_CH_DX2CR_CM_Pos (10UL) /*!< USIC_CH DX2CR: CM (Bit 10) */ +#define USIC_CH_DX2CR_CM_Msk (0xc00UL) /*!< USIC_CH DX2CR: CM (Bitfield-Mask: 0x03) */ +#define USIC_CH_DX2CR_DXS_Pos (15UL) /*!< USIC_CH DX2CR: DXS (Bit 15) */ +#define USIC_CH_DX2CR_DXS_Msk (0x8000UL) /*!< USIC_CH DX2CR: DXS (Bitfield-Mask: 0x01) */ + +/* -------------------------------- USIC_CH_DX3CR ------------------------------- */ +#define USIC_CH_DX3CR_DSEL_Pos (0UL) /*!< USIC_CH DX3CR: DSEL (Bit 0) */ +#define USIC_CH_DX3CR_DSEL_Msk (0x7UL) /*!< USIC_CH DX3CR: DSEL (Bitfield-Mask: 0x07) */ +#define USIC_CH_DX3CR_INSW_Pos (4UL) /*!< USIC_CH DX3CR: INSW (Bit 4) */ +#define USIC_CH_DX3CR_INSW_Msk (0x10UL) /*!< USIC_CH DX3CR: INSW (Bitfield-Mask: 0x01) */ +#define USIC_CH_DX3CR_DFEN_Pos (5UL) /*!< USIC_CH DX3CR: DFEN (Bit 5) */ +#define USIC_CH_DX3CR_DFEN_Msk (0x20UL) /*!< USIC_CH DX3CR: DFEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_DX3CR_DSEN_Pos (6UL) /*!< USIC_CH DX3CR: DSEN (Bit 6) */ +#define USIC_CH_DX3CR_DSEN_Msk (0x40UL) /*!< USIC_CH DX3CR: DSEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_DX3CR_DPOL_Pos (8UL) /*!< USIC_CH DX3CR: DPOL (Bit 8) */ +#define USIC_CH_DX3CR_DPOL_Msk (0x100UL) /*!< USIC_CH DX3CR: DPOL (Bitfield-Mask: 0x01) */ +#define USIC_CH_DX3CR_SFSEL_Pos (9UL) /*!< USIC_CH DX3CR: SFSEL (Bit 9) */ +#define USIC_CH_DX3CR_SFSEL_Msk (0x200UL) /*!< USIC_CH DX3CR: SFSEL (Bitfield-Mask: 0x01) */ +#define USIC_CH_DX3CR_CM_Pos (10UL) /*!< USIC_CH DX3CR: CM (Bit 10) */ +#define USIC_CH_DX3CR_CM_Msk (0xc00UL) /*!< USIC_CH DX3CR: CM (Bitfield-Mask: 0x03) */ +#define USIC_CH_DX3CR_DXS_Pos (15UL) /*!< USIC_CH DX3CR: DXS (Bit 15) */ +#define USIC_CH_DX3CR_DXS_Msk (0x8000UL) /*!< USIC_CH DX3CR: DXS (Bitfield-Mask: 0x01) */ + +/* -------------------------------- USIC_CH_DX4CR ------------------------------- */ +#define USIC_CH_DX4CR_DSEL_Pos (0UL) /*!< USIC_CH DX4CR: DSEL (Bit 0) */ +#define USIC_CH_DX4CR_DSEL_Msk (0x7UL) /*!< USIC_CH DX4CR: DSEL (Bitfield-Mask: 0x07) */ +#define USIC_CH_DX4CR_INSW_Pos (4UL) /*!< USIC_CH DX4CR: INSW (Bit 4) */ +#define USIC_CH_DX4CR_INSW_Msk (0x10UL) /*!< USIC_CH DX4CR: INSW (Bitfield-Mask: 0x01) */ +#define USIC_CH_DX4CR_DFEN_Pos (5UL) /*!< USIC_CH DX4CR: DFEN (Bit 5) */ +#define USIC_CH_DX4CR_DFEN_Msk (0x20UL) /*!< USIC_CH DX4CR: DFEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_DX4CR_DSEN_Pos (6UL) /*!< USIC_CH DX4CR: DSEN (Bit 6) */ +#define USIC_CH_DX4CR_DSEN_Msk (0x40UL) /*!< USIC_CH DX4CR: DSEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_DX4CR_DPOL_Pos (8UL) /*!< USIC_CH DX4CR: DPOL (Bit 8) */ +#define USIC_CH_DX4CR_DPOL_Msk (0x100UL) /*!< USIC_CH DX4CR: DPOL (Bitfield-Mask: 0x01) */ +#define USIC_CH_DX4CR_SFSEL_Pos (9UL) /*!< USIC_CH DX4CR: SFSEL (Bit 9) */ +#define USIC_CH_DX4CR_SFSEL_Msk (0x200UL) /*!< USIC_CH DX4CR: SFSEL (Bitfield-Mask: 0x01) */ +#define USIC_CH_DX4CR_CM_Pos (10UL) /*!< USIC_CH DX4CR: CM (Bit 10) */ +#define USIC_CH_DX4CR_CM_Msk (0xc00UL) /*!< USIC_CH DX4CR: CM (Bitfield-Mask: 0x03) */ +#define USIC_CH_DX4CR_DXS_Pos (15UL) /*!< USIC_CH DX4CR: DXS (Bit 15) */ +#define USIC_CH_DX4CR_DXS_Msk (0x8000UL) /*!< USIC_CH DX4CR: DXS (Bitfield-Mask: 0x01) */ + +/* -------------------------------- USIC_CH_DX5CR ------------------------------- */ +#define USIC_CH_DX5CR_DSEL_Pos (0UL) /*!< USIC_CH DX5CR: DSEL (Bit 0) */ +#define USIC_CH_DX5CR_DSEL_Msk (0x7UL) /*!< USIC_CH DX5CR: DSEL (Bitfield-Mask: 0x07) */ +#define USIC_CH_DX5CR_INSW_Pos (4UL) /*!< USIC_CH DX5CR: INSW (Bit 4) */ +#define USIC_CH_DX5CR_INSW_Msk (0x10UL) /*!< USIC_CH DX5CR: INSW (Bitfield-Mask: 0x01) */ +#define USIC_CH_DX5CR_DFEN_Pos (5UL) /*!< USIC_CH DX5CR: DFEN (Bit 5) */ +#define USIC_CH_DX5CR_DFEN_Msk (0x20UL) /*!< USIC_CH DX5CR: DFEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_DX5CR_DSEN_Pos (6UL) /*!< USIC_CH DX5CR: DSEN (Bit 6) */ +#define USIC_CH_DX5CR_DSEN_Msk (0x40UL) /*!< USIC_CH DX5CR: DSEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_DX5CR_DPOL_Pos (8UL) /*!< USIC_CH DX5CR: DPOL (Bit 8) */ +#define USIC_CH_DX5CR_DPOL_Msk (0x100UL) /*!< USIC_CH DX5CR: DPOL (Bitfield-Mask: 0x01) */ +#define USIC_CH_DX5CR_SFSEL_Pos (9UL) /*!< USIC_CH DX5CR: SFSEL (Bit 9) */ +#define USIC_CH_DX5CR_SFSEL_Msk (0x200UL) /*!< USIC_CH DX5CR: SFSEL (Bitfield-Mask: 0x01) */ +#define USIC_CH_DX5CR_CM_Pos (10UL) /*!< USIC_CH DX5CR: CM (Bit 10) */ +#define USIC_CH_DX5CR_CM_Msk (0xc00UL) /*!< USIC_CH DX5CR: CM (Bitfield-Mask: 0x03) */ +#define USIC_CH_DX5CR_DXS_Pos (15UL) /*!< USIC_CH DX5CR: DXS (Bit 15) */ +#define USIC_CH_DX5CR_DXS_Msk (0x8000UL) /*!< USIC_CH DX5CR: DXS (Bitfield-Mask: 0x01) */ + +/* -------------------------------- USIC_CH_SCTR -------------------------------- */ +#define USIC_CH_SCTR_SDIR_Pos (0UL) /*!< USIC_CH SCTR: SDIR (Bit 0) */ +#define USIC_CH_SCTR_SDIR_Msk (0x1UL) /*!< USIC_CH SCTR: SDIR (Bitfield-Mask: 0x01) */ +#define USIC_CH_SCTR_PDL_Pos (1UL) /*!< USIC_CH SCTR: PDL (Bit 1) */ +#define USIC_CH_SCTR_PDL_Msk (0x2UL) /*!< USIC_CH SCTR: PDL (Bitfield-Mask: 0x01) */ +#define USIC_CH_SCTR_DSM_Pos (2UL) /*!< USIC_CH SCTR: DSM (Bit 2) */ +#define USIC_CH_SCTR_DSM_Msk (0xcUL) /*!< USIC_CH SCTR: DSM (Bitfield-Mask: 0x03) */ +#define USIC_CH_SCTR_HPCDIR_Pos (4UL) /*!< USIC_CH SCTR: HPCDIR (Bit 4) */ +#define USIC_CH_SCTR_HPCDIR_Msk (0x10UL) /*!< USIC_CH SCTR: HPCDIR (Bitfield-Mask: 0x01) */ +#define USIC_CH_SCTR_DOCFG_Pos (6UL) /*!< USIC_CH SCTR: DOCFG (Bit 6) */ +#define USIC_CH_SCTR_DOCFG_Msk (0xc0UL) /*!< USIC_CH SCTR: DOCFG (Bitfield-Mask: 0x03) */ +#define USIC_CH_SCTR_TRM_Pos (8UL) /*!< USIC_CH SCTR: TRM (Bit 8) */ +#define USIC_CH_SCTR_TRM_Msk (0x300UL) /*!< USIC_CH SCTR: TRM (Bitfield-Mask: 0x03) */ +#define USIC_CH_SCTR_FLE_Pos (16UL) /*!< USIC_CH SCTR: FLE (Bit 16) */ +#define USIC_CH_SCTR_FLE_Msk (0x3f0000UL) /*!< USIC_CH SCTR: FLE (Bitfield-Mask: 0x3f) */ +#define USIC_CH_SCTR_WLE_Pos (24UL) /*!< USIC_CH SCTR: WLE (Bit 24) */ +#define USIC_CH_SCTR_WLE_Msk (0xf000000UL) /*!< USIC_CH SCTR: WLE (Bitfield-Mask: 0x0f) */ + +/* -------------------------------- USIC_CH_TCSR -------------------------------- */ +#define USIC_CH_TCSR_WLEMD_Pos (0UL) /*!< USIC_CH TCSR: WLEMD (Bit 0) */ +#define USIC_CH_TCSR_WLEMD_Msk (0x1UL) /*!< USIC_CH TCSR: WLEMD (Bitfield-Mask: 0x01) */ +#define USIC_CH_TCSR_SELMD_Pos (1UL) /*!< USIC_CH TCSR: SELMD (Bit 1) */ +#define USIC_CH_TCSR_SELMD_Msk (0x2UL) /*!< USIC_CH TCSR: SELMD (Bitfield-Mask: 0x01) */ +#define USIC_CH_TCSR_FLEMD_Pos (2UL) /*!< USIC_CH TCSR: FLEMD (Bit 2) */ +#define USIC_CH_TCSR_FLEMD_Msk (0x4UL) /*!< USIC_CH TCSR: FLEMD (Bitfield-Mask: 0x01) */ +#define USIC_CH_TCSR_WAMD_Pos (3UL) /*!< USIC_CH TCSR: WAMD (Bit 3) */ +#define USIC_CH_TCSR_WAMD_Msk (0x8UL) /*!< USIC_CH TCSR: WAMD (Bitfield-Mask: 0x01) */ +#define USIC_CH_TCSR_HPCMD_Pos (4UL) /*!< USIC_CH TCSR: HPCMD (Bit 4) */ +#define USIC_CH_TCSR_HPCMD_Msk (0x10UL) /*!< USIC_CH TCSR: HPCMD (Bitfield-Mask: 0x01) */ +#define USIC_CH_TCSR_SOF_Pos (5UL) /*!< USIC_CH TCSR: SOF (Bit 5) */ +#define USIC_CH_TCSR_SOF_Msk (0x20UL) /*!< USIC_CH TCSR: SOF (Bitfield-Mask: 0x01) */ +#define USIC_CH_TCSR_EOF_Pos (6UL) /*!< USIC_CH TCSR: EOF (Bit 6) */ +#define USIC_CH_TCSR_EOF_Msk (0x40UL) /*!< USIC_CH TCSR: EOF (Bitfield-Mask: 0x01) */ +#define USIC_CH_TCSR_TDV_Pos (7UL) /*!< USIC_CH TCSR: TDV (Bit 7) */ +#define USIC_CH_TCSR_TDV_Msk (0x80UL) /*!< USIC_CH TCSR: TDV (Bitfield-Mask: 0x01) */ +#define USIC_CH_TCSR_TDSSM_Pos (8UL) /*!< USIC_CH TCSR: TDSSM (Bit 8) */ +#define USIC_CH_TCSR_TDSSM_Msk (0x100UL) /*!< USIC_CH TCSR: TDSSM (Bitfield-Mask: 0x01) */ +#define USIC_CH_TCSR_TDEN_Pos (10UL) /*!< USIC_CH TCSR: TDEN (Bit 10) */ +#define USIC_CH_TCSR_TDEN_Msk (0xc00UL) /*!< USIC_CH TCSR: TDEN (Bitfield-Mask: 0x03) */ +#define USIC_CH_TCSR_TDVTR_Pos (12UL) /*!< USIC_CH TCSR: TDVTR (Bit 12) */ +#define USIC_CH_TCSR_TDVTR_Msk (0x1000UL) /*!< USIC_CH TCSR: TDVTR (Bitfield-Mask: 0x01) */ +#define USIC_CH_TCSR_WA_Pos (13UL) /*!< USIC_CH TCSR: WA (Bit 13) */ +#define USIC_CH_TCSR_WA_Msk (0x2000UL) /*!< USIC_CH TCSR: WA (Bitfield-Mask: 0x01) */ +#define USIC_CH_TCSR_TSOF_Pos (24UL) /*!< USIC_CH TCSR: TSOF (Bit 24) */ +#define USIC_CH_TCSR_TSOF_Msk (0x1000000UL) /*!< USIC_CH TCSR: TSOF (Bitfield-Mask: 0x01) */ +#define USIC_CH_TCSR_TV_Pos (26UL) /*!< USIC_CH TCSR: TV (Bit 26) */ +#define USIC_CH_TCSR_TV_Msk (0x4000000UL) /*!< USIC_CH TCSR: TV (Bitfield-Mask: 0x01) */ +#define USIC_CH_TCSR_TVC_Pos (27UL) /*!< USIC_CH TCSR: TVC (Bit 27) */ +#define USIC_CH_TCSR_TVC_Msk (0x8000000UL) /*!< USIC_CH TCSR: TVC (Bitfield-Mask: 0x01) */ +#define USIC_CH_TCSR_TE_Pos (28UL) /*!< USIC_CH TCSR: TE (Bit 28) */ +#define USIC_CH_TCSR_TE_Msk (0x10000000UL) /*!< USIC_CH TCSR: TE (Bitfield-Mask: 0x01) */ + +/* --------------------------------- USIC_CH_PCR -------------------------------- */ +#define USIC_CH_PCR_CTR0_Pos (0UL) /*!< USIC_CH PCR: CTR0 (Bit 0) */ +#define USIC_CH_PCR_CTR0_Msk (0x1UL) /*!< USIC_CH PCR: CTR0 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_CTR1_Pos (1UL) /*!< USIC_CH PCR: CTR1 (Bit 1) */ +#define USIC_CH_PCR_CTR1_Msk (0x2UL) /*!< USIC_CH PCR: CTR1 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_CTR2_Pos (2UL) /*!< USIC_CH PCR: CTR2 (Bit 2) */ +#define USIC_CH_PCR_CTR2_Msk (0x4UL) /*!< USIC_CH PCR: CTR2 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_CTR3_Pos (3UL) /*!< USIC_CH PCR: CTR3 (Bit 3) */ +#define USIC_CH_PCR_CTR3_Msk (0x8UL) /*!< USIC_CH PCR: CTR3 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_CTR4_Pos (4UL) /*!< USIC_CH PCR: CTR4 (Bit 4) */ +#define USIC_CH_PCR_CTR4_Msk (0x10UL) /*!< USIC_CH PCR: CTR4 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_CTR5_Pos (5UL) /*!< USIC_CH PCR: CTR5 (Bit 5) */ +#define USIC_CH_PCR_CTR5_Msk (0x20UL) /*!< USIC_CH PCR: CTR5 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_CTR6_Pos (6UL) /*!< USIC_CH PCR: CTR6 (Bit 6) */ +#define USIC_CH_PCR_CTR6_Msk (0x40UL) /*!< USIC_CH PCR: CTR6 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_CTR7_Pos (7UL) /*!< USIC_CH PCR: CTR7 (Bit 7) */ +#define USIC_CH_PCR_CTR7_Msk (0x80UL) /*!< USIC_CH PCR: CTR7 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_CTR8_Pos (8UL) /*!< USIC_CH PCR: CTR8 (Bit 8) */ +#define USIC_CH_PCR_CTR8_Msk (0x100UL) /*!< USIC_CH PCR: CTR8 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_CTR9_Pos (9UL) /*!< USIC_CH PCR: CTR9 (Bit 9) */ +#define USIC_CH_PCR_CTR9_Msk (0x200UL) /*!< USIC_CH PCR: CTR9 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_CTR10_Pos (10UL) /*!< USIC_CH PCR: CTR10 (Bit 10) */ +#define USIC_CH_PCR_CTR10_Msk (0x400UL) /*!< USIC_CH PCR: CTR10 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_CTR11_Pos (11UL) /*!< USIC_CH PCR: CTR11 (Bit 11) */ +#define USIC_CH_PCR_CTR11_Msk (0x800UL) /*!< USIC_CH PCR: CTR11 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_CTR12_Pos (12UL) /*!< USIC_CH PCR: CTR12 (Bit 12) */ +#define USIC_CH_PCR_CTR12_Msk (0x1000UL) /*!< USIC_CH PCR: CTR12 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_CTR13_Pos (13UL) /*!< USIC_CH PCR: CTR13 (Bit 13) */ +#define USIC_CH_PCR_CTR13_Msk (0x2000UL) /*!< USIC_CH PCR: CTR13 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_CTR14_Pos (14UL) /*!< USIC_CH PCR: CTR14 (Bit 14) */ +#define USIC_CH_PCR_CTR14_Msk (0x4000UL) /*!< USIC_CH PCR: CTR14 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_CTR15_Pos (15UL) /*!< USIC_CH PCR: CTR15 (Bit 15) */ +#define USIC_CH_PCR_CTR15_Msk (0x8000UL) /*!< USIC_CH PCR: CTR15 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_CTR16_Pos (16UL) /*!< USIC_CH PCR: CTR16 (Bit 16) */ +#define USIC_CH_PCR_CTR16_Msk (0x10000UL) /*!< USIC_CH PCR: CTR16 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_CTR17_Pos (17UL) /*!< USIC_CH PCR: CTR17 (Bit 17) */ +#define USIC_CH_PCR_CTR17_Msk (0x20000UL) /*!< USIC_CH PCR: CTR17 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_CTR18_Pos (18UL) /*!< USIC_CH PCR: CTR18 (Bit 18) */ +#define USIC_CH_PCR_CTR18_Msk (0x40000UL) /*!< USIC_CH PCR: CTR18 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_CTR19_Pos (19UL) /*!< USIC_CH PCR: CTR19 (Bit 19) */ +#define USIC_CH_PCR_CTR19_Msk (0x80000UL) /*!< USIC_CH PCR: CTR19 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_CTR20_Pos (20UL) /*!< USIC_CH PCR: CTR20 (Bit 20) */ +#define USIC_CH_PCR_CTR20_Msk (0x100000UL) /*!< USIC_CH PCR: CTR20 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_CTR21_Pos (21UL) /*!< USIC_CH PCR: CTR21 (Bit 21) */ +#define USIC_CH_PCR_CTR21_Msk (0x200000UL) /*!< USIC_CH PCR: CTR21 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_CTR22_Pos (22UL) /*!< USIC_CH PCR: CTR22 (Bit 22) */ +#define USIC_CH_PCR_CTR22_Msk (0x400000UL) /*!< USIC_CH PCR: CTR22 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_CTR23_Pos (23UL) /*!< USIC_CH PCR: CTR23 (Bit 23) */ +#define USIC_CH_PCR_CTR23_Msk (0x800000UL) /*!< USIC_CH PCR: CTR23 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_CTR24_Pos (24UL) /*!< USIC_CH PCR: CTR24 (Bit 24) */ +#define USIC_CH_PCR_CTR24_Msk (0x1000000UL) /*!< USIC_CH PCR: CTR24 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_CTR25_Pos (25UL) /*!< USIC_CH PCR: CTR25 (Bit 25) */ +#define USIC_CH_PCR_CTR25_Msk (0x2000000UL) /*!< USIC_CH PCR: CTR25 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_CTR26_Pos (26UL) /*!< USIC_CH PCR: CTR26 (Bit 26) */ +#define USIC_CH_PCR_CTR26_Msk (0x4000000UL) /*!< USIC_CH PCR: CTR26 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_CTR27_Pos (27UL) /*!< USIC_CH PCR: CTR27 (Bit 27) */ +#define USIC_CH_PCR_CTR27_Msk (0x8000000UL) /*!< USIC_CH PCR: CTR27 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_CTR28_Pos (28UL) /*!< USIC_CH PCR: CTR28 (Bit 28) */ +#define USIC_CH_PCR_CTR28_Msk (0x10000000UL) /*!< USIC_CH PCR: CTR28 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_CTR29_Pos (29UL) /*!< USIC_CH PCR: CTR29 (Bit 29) */ +#define USIC_CH_PCR_CTR29_Msk (0x20000000UL) /*!< USIC_CH PCR: CTR29 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_CTR30_Pos (30UL) /*!< USIC_CH PCR: CTR30 (Bit 30) */ +#define USIC_CH_PCR_CTR30_Msk (0x40000000UL) /*!< USIC_CH PCR: CTR30 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_CTR31_Pos (31UL) /*!< USIC_CH PCR: CTR31 (Bit 31) */ +#define USIC_CH_PCR_CTR31_Msk (0x80000000UL) /*!< USIC_CH PCR: CTR31 (Bitfield-Mask: 0x01) */ + +/* ----------------------------- USIC_CH_PCR_ASCMode ---------------------------- */ +#define USIC_CH_PCR_ASCMode_SMD_Pos (0UL) /*!< USIC_CH PCR_ASCMode: SMD (Bit 0) */ +#define USIC_CH_PCR_ASCMode_SMD_Msk (0x1UL) /*!< USIC_CH PCR_ASCMode: SMD (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_ASCMode_STPB_Pos (1UL) /*!< USIC_CH PCR_ASCMode: STPB (Bit 1) */ +#define USIC_CH_PCR_ASCMode_STPB_Msk (0x2UL) /*!< USIC_CH PCR_ASCMode: STPB (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_ASCMode_IDM_Pos (2UL) /*!< USIC_CH PCR_ASCMode: IDM (Bit 2) */ +#define USIC_CH_PCR_ASCMode_IDM_Msk (0x4UL) /*!< USIC_CH PCR_ASCMode: IDM (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_ASCMode_SBIEN_Pos (3UL) /*!< USIC_CH PCR_ASCMode: SBIEN (Bit 3) */ +#define USIC_CH_PCR_ASCMode_SBIEN_Msk (0x8UL) /*!< USIC_CH PCR_ASCMode: SBIEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_ASCMode_CDEN_Pos (4UL) /*!< USIC_CH PCR_ASCMode: CDEN (Bit 4) */ +#define USIC_CH_PCR_ASCMode_CDEN_Msk (0x10UL) /*!< USIC_CH PCR_ASCMode: CDEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_ASCMode_RNIEN_Pos (5UL) /*!< USIC_CH PCR_ASCMode: RNIEN (Bit 5) */ +#define USIC_CH_PCR_ASCMode_RNIEN_Msk (0x20UL) /*!< USIC_CH PCR_ASCMode: RNIEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_ASCMode_FEIEN_Pos (6UL) /*!< USIC_CH PCR_ASCMode: FEIEN (Bit 6) */ +#define USIC_CH_PCR_ASCMode_FEIEN_Msk (0x40UL) /*!< USIC_CH PCR_ASCMode: FEIEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_ASCMode_FFIEN_Pos (7UL) /*!< USIC_CH PCR_ASCMode: FFIEN (Bit 7) */ +#define USIC_CH_PCR_ASCMode_FFIEN_Msk (0x80UL) /*!< USIC_CH PCR_ASCMode: FFIEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_ASCMode_SP_Pos (8UL) /*!< USIC_CH PCR_ASCMode: SP (Bit 8) */ +#define USIC_CH_PCR_ASCMode_SP_Msk (0x1f00UL) /*!< USIC_CH PCR_ASCMode: SP (Bitfield-Mask: 0x1f) */ +#define USIC_CH_PCR_ASCMode_PL_Pos (13UL) /*!< USIC_CH PCR_ASCMode: PL (Bit 13) */ +#define USIC_CH_PCR_ASCMode_PL_Msk (0xe000UL) /*!< USIC_CH PCR_ASCMode: PL (Bitfield-Mask: 0x07) */ +#define USIC_CH_PCR_ASCMode_RSTEN_Pos (16UL) /*!< USIC_CH PCR_ASCMode: RSTEN (Bit 16) */ +#define USIC_CH_PCR_ASCMode_RSTEN_Msk (0x10000UL) /*!< USIC_CH PCR_ASCMode: RSTEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_ASCMode_TSTEN_Pos (17UL) /*!< USIC_CH PCR_ASCMode: TSTEN (Bit 17) */ +#define USIC_CH_PCR_ASCMode_TSTEN_Msk (0x20000UL) /*!< USIC_CH PCR_ASCMode: TSTEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_ASCMode_MCLK_Pos (31UL) /*!< USIC_CH PCR_ASCMode: MCLK (Bit 31) */ +#define USIC_CH_PCR_ASCMode_MCLK_Msk (0x80000000UL) /*!< USIC_CH PCR_ASCMode: MCLK (Bitfield-Mask: 0x01) */ + +/* ----------------------------- USIC_CH_PCR_SSCMode ---------------------------- */ +#define USIC_CH_PCR_SSCMode_MSLSEN_Pos (0UL) /*!< USIC_CH PCR_SSCMode: MSLSEN (Bit 0) */ +#define USIC_CH_PCR_SSCMode_MSLSEN_Msk (0x1UL) /*!< USIC_CH PCR_SSCMode: MSLSEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_SSCMode_SELCTR_Pos (1UL) /*!< USIC_CH PCR_SSCMode: SELCTR (Bit 1) */ +#define USIC_CH_PCR_SSCMode_SELCTR_Msk (0x2UL) /*!< USIC_CH PCR_SSCMode: SELCTR (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_SSCMode_SELINV_Pos (2UL) /*!< USIC_CH PCR_SSCMode: SELINV (Bit 2) */ +#define USIC_CH_PCR_SSCMode_SELINV_Msk (0x4UL) /*!< USIC_CH PCR_SSCMode: SELINV (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_SSCMode_FEM_Pos (3UL) /*!< USIC_CH PCR_SSCMode: FEM (Bit 3) */ +#define USIC_CH_PCR_SSCMode_FEM_Msk (0x8UL) /*!< USIC_CH PCR_SSCMode: FEM (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_SSCMode_CTQSEL1_Pos (4UL) /*!< USIC_CH PCR_SSCMode: CTQSEL1 (Bit 4) */ +#define USIC_CH_PCR_SSCMode_CTQSEL1_Msk (0x30UL) /*!< USIC_CH PCR_SSCMode: CTQSEL1 (Bitfield-Mask: 0x03) */ +#define USIC_CH_PCR_SSCMode_PCTQ1_Pos (6UL) /*!< USIC_CH PCR_SSCMode: PCTQ1 (Bit 6) */ +#define USIC_CH_PCR_SSCMode_PCTQ1_Msk (0xc0UL) /*!< USIC_CH PCR_SSCMode: PCTQ1 (Bitfield-Mask: 0x03) */ +#define USIC_CH_PCR_SSCMode_DCTQ1_Pos (8UL) /*!< USIC_CH PCR_SSCMode: DCTQ1 (Bit 8) */ +#define USIC_CH_PCR_SSCMode_DCTQ1_Msk (0x1f00UL) /*!< USIC_CH PCR_SSCMode: DCTQ1 (Bitfield-Mask: 0x1f) */ +#define USIC_CH_PCR_SSCMode_PARIEN_Pos (13UL) /*!< USIC_CH PCR_SSCMode: PARIEN (Bit 13) */ +#define USIC_CH_PCR_SSCMode_PARIEN_Msk (0x2000UL) /*!< USIC_CH PCR_SSCMode: PARIEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_SSCMode_MSLSIEN_Pos (14UL) /*!< USIC_CH PCR_SSCMode: MSLSIEN (Bit 14) */ +#define USIC_CH_PCR_SSCMode_MSLSIEN_Msk (0x4000UL) /*!< USIC_CH PCR_SSCMode: MSLSIEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_SSCMode_DX2TIEN_Pos (15UL) /*!< USIC_CH PCR_SSCMode: DX2TIEN (Bit 15) */ +#define USIC_CH_PCR_SSCMode_DX2TIEN_Msk (0x8000UL) /*!< USIC_CH PCR_SSCMode: DX2TIEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_SSCMode_SELO_Pos (16UL) /*!< USIC_CH PCR_SSCMode: SELO (Bit 16) */ +#define USIC_CH_PCR_SSCMode_SELO_Msk (0xff0000UL) /*!< USIC_CH PCR_SSCMode: SELO (Bitfield-Mask: 0xff) */ +#define USIC_CH_PCR_SSCMode_TIWEN_Pos (24UL) /*!< USIC_CH PCR_SSCMode: TIWEN (Bit 24) */ +#define USIC_CH_PCR_SSCMode_TIWEN_Msk (0x1000000UL) /*!< USIC_CH PCR_SSCMode: TIWEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_SSCMode_SLPHSEL_Pos (25UL) /*!< USIC_CH PCR_SSCMode: SLPHSEL (Bit 25) */ +#define USIC_CH_PCR_SSCMode_SLPHSEL_Msk (0x2000000UL) /*!< USIC_CH PCR_SSCMode: SLPHSEL (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_SSCMode_MCLK_Pos (31UL) /*!< USIC_CH PCR_SSCMode: MCLK (Bit 31) */ +#define USIC_CH_PCR_SSCMode_MCLK_Msk (0x80000000UL) /*!< USIC_CH PCR_SSCMode: MCLK (Bitfield-Mask: 0x01) */ + +/* ----------------------------- USIC_CH_PCR_IICMode ---------------------------- */ +#define USIC_CH_PCR_IICMode_SLAD_Pos (0UL) /*!< USIC_CH PCR_IICMode: SLAD (Bit 0) */ +#define USIC_CH_PCR_IICMode_SLAD_Msk (0xffffUL) /*!< USIC_CH PCR_IICMode: SLAD (Bitfield-Mask: 0xffff) */ +#define USIC_CH_PCR_IICMode_ACK00_Pos (16UL) /*!< USIC_CH PCR_IICMode: ACK00 (Bit 16) */ +#define USIC_CH_PCR_IICMode_ACK00_Msk (0x10000UL) /*!< USIC_CH PCR_IICMode: ACK00 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_IICMode_STIM_Pos (17UL) /*!< USIC_CH PCR_IICMode: STIM (Bit 17) */ +#define USIC_CH_PCR_IICMode_STIM_Msk (0x20000UL) /*!< USIC_CH PCR_IICMode: STIM (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_IICMode_SCRIEN_Pos (18UL) /*!< USIC_CH PCR_IICMode: SCRIEN (Bit 18) */ +#define USIC_CH_PCR_IICMode_SCRIEN_Msk (0x40000UL) /*!< USIC_CH PCR_IICMode: SCRIEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_IICMode_RSCRIEN_Pos (19UL) /*!< USIC_CH PCR_IICMode: RSCRIEN (Bit 19) */ +#define USIC_CH_PCR_IICMode_RSCRIEN_Msk (0x80000UL) /*!< USIC_CH PCR_IICMode: RSCRIEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_IICMode_PCRIEN_Pos (20UL) /*!< USIC_CH PCR_IICMode: PCRIEN (Bit 20) */ +#define USIC_CH_PCR_IICMode_PCRIEN_Msk (0x100000UL) /*!< USIC_CH PCR_IICMode: PCRIEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_IICMode_NACKIEN_Pos (21UL) /*!< USIC_CH PCR_IICMode: NACKIEN (Bit 21) */ +#define USIC_CH_PCR_IICMode_NACKIEN_Msk (0x200000UL) /*!< USIC_CH PCR_IICMode: NACKIEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_IICMode_ARLIEN_Pos (22UL) /*!< USIC_CH PCR_IICMode: ARLIEN (Bit 22) */ +#define USIC_CH_PCR_IICMode_ARLIEN_Msk (0x400000UL) /*!< USIC_CH PCR_IICMode: ARLIEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_IICMode_SRRIEN_Pos (23UL) /*!< USIC_CH PCR_IICMode: SRRIEN (Bit 23) */ +#define USIC_CH_PCR_IICMode_SRRIEN_Msk (0x800000UL) /*!< USIC_CH PCR_IICMode: SRRIEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_IICMode_ERRIEN_Pos (24UL) /*!< USIC_CH PCR_IICMode: ERRIEN (Bit 24) */ +#define USIC_CH_PCR_IICMode_ERRIEN_Msk (0x1000000UL) /*!< USIC_CH PCR_IICMode: ERRIEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_IICMode_SACKDIS_Pos (25UL) /*!< USIC_CH PCR_IICMode: SACKDIS (Bit 25) */ +#define USIC_CH_PCR_IICMode_SACKDIS_Msk (0x2000000UL) /*!< USIC_CH PCR_IICMode: SACKDIS (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_IICMode_HDEL_Pos (26UL) /*!< USIC_CH PCR_IICMode: HDEL (Bit 26) */ +#define USIC_CH_PCR_IICMode_HDEL_Msk (0x3c000000UL) /*!< USIC_CH PCR_IICMode: HDEL (Bitfield-Mask: 0x0f) */ +#define USIC_CH_PCR_IICMode_ACKIEN_Pos (30UL) /*!< USIC_CH PCR_IICMode: ACKIEN (Bit 30) */ +#define USIC_CH_PCR_IICMode_ACKIEN_Msk (0x40000000UL) /*!< USIC_CH PCR_IICMode: ACKIEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_IICMode_MCLK_Pos (31UL) /*!< USIC_CH PCR_IICMode: MCLK (Bit 31) */ +#define USIC_CH_PCR_IICMode_MCLK_Msk (0x80000000UL) /*!< USIC_CH PCR_IICMode: MCLK (Bitfield-Mask: 0x01) */ + +/* ----------------------------- USIC_CH_PCR_IISMode ---------------------------- */ +#define USIC_CH_PCR_IISMode_WAGEN_Pos (0UL) /*!< USIC_CH PCR_IISMode: WAGEN (Bit 0) */ +#define USIC_CH_PCR_IISMode_WAGEN_Msk (0x1UL) /*!< USIC_CH PCR_IISMode: WAGEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_IISMode_DTEN_Pos (1UL) /*!< USIC_CH PCR_IISMode: DTEN (Bit 1) */ +#define USIC_CH_PCR_IISMode_DTEN_Msk (0x2UL) /*!< USIC_CH PCR_IISMode: DTEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_IISMode_SELINV_Pos (2UL) /*!< USIC_CH PCR_IISMode: SELINV (Bit 2) */ +#define USIC_CH_PCR_IISMode_SELINV_Msk (0x4UL) /*!< USIC_CH PCR_IISMode: SELINV (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_IISMode_WAFEIEN_Pos (4UL) /*!< USIC_CH PCR_IISMode: WAFEIEN (Bit 4) */ +#define USIC_CH_PCR_IISMode_WAFEIEN_Msk (0x10UL) /*!< USIC_CH PCR_IISMode: WAFEIEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_IISMode_WAREIEN_Pos (5UL) /*!< USIC_CH PCR_IISMode: WAREIEN (Bit 5) */ +#define USIC_CH_PCR_IISMode_WAREIEN_Msk (0x20UL) /*!< USIC_CH PCR_IISMode: WAREIEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_IISMode_ENDIEN_Pos (6UL) /*!< USIC_CH PCR_IISMode: ENDIEN (Bit 6) */ +#define USIC_CH_PCR_IISMode_ENDIEN_Msk (0x40UL) /*!< USIC_CH PCR_IISMode: ENDIEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_IISMode_DX2TIEN_Pos (15UL) /*!< USIC_CH PCR_IISMode: DX2TIEN (Bit 15) */ +#define USIC_CH_PCR_IISMode_DX2TIEN_Msk (0x8000UL) /*!< USIC_CH PCR_IISMode: DX2TIEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_PCR_IISMode_TDEL_Pos (16UL) /*!< USIC_CH PCR_IISMode: TDEL (Bit 16) */ +#define USIC_CH_PCR_IISMode_TDEL_Msk (0x3f0000UL) /*!< USIC_CH PCR_IISMode: TDEL (Bitfield-Mask: 0x3f) */ +#define USIC_CH_PCR_IISMode_MCLK_Pos (31UL) /*!< USIC_CH PCR_IISMode: MCLK (Bit 31) */ +#define USIC_CH_PCR_IISMode_MCLK_Msk (0x80000000UL) /*!< USIC_CH PCR_IISMode: MCLK (Bitfield-Mask: 0x01) */ + +/* --------------------------------- USIC_CH_CCR -------------------------------- */ +#define USIC_CH_CCR_MODE_Pos (0UL) /*!< USIC_CH CCR: MODE (Bit 0) */ +#define USIC_CH_CCR_MODE_Msk (0xfUL) /*!< USIC_CH CCR: MODE (Bitfield-Mask: 0x0f) */ +#define USIC_CH_CCR_HPCEN_Pos (6UL) /*!< USIC_CH CCR: HPCEN (Bit 6) */ +#define USIC_CH_CCR_HPCEN_Msk (0xc0UL) /*!< USIC_CH CCR: HPCEN (Bitfield-Mask: 0x03) */ +#define USIC_CH_CCR_PM_Pos (8UL) /*!< USIC_CH CCR: PM (Bit 8) */ +#define USIC_CH_CCR_PM_Msk (0x300UL) /*!< USIC_CH CCR: PM (Bitfield-Mask: 0x03) */ +#define USIC_CH_CCR_RSIEN_Pos (10UL) /*!< USIC_CH CCR: RSIEN (Bit 10) */ +#define USIC_CH_CCR_RSIEN_Msk (0x400UL) /*!< USIC_CH CCR: RSIEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_CCR_DLIEN_Pos (11UL) /*!< USIC_CH CCR: DLIEN (Bit 11) */ +#define USIC_CH_CCR_DLIEN_Msk (0x800UL) /*!< USIC_CH CCR: DLIEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_CCR_TSIEN_Pos (12UL) /*!< USIC_CH CCR: TSIEN (Bit 12) */ +#define USIC_CH_CCR_TSIEN_Msk (0x1000UL) /*!< USIC_CH CCR: TSIEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_CCR_TBIEN_Pos (13UL) /*!< USIC_CH CCR: TBIEN (Bit 13) */ +#define USIC_CH_CCR_TBIEN_Msk (0x2000UL) /*!< USIC_CH CCR: TBIEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_CCR_RIEN_Pos (14UL) /*!< USIC_CH CCR: RIEN (Bit 14) */ +#define USIC_CH_CCR_RIEN_Msk (0x4000UL) /*!< USIC_CH CCR: RIEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_CCR_AIEN_Pos (15UL) /*!< USIC_CH CCR: AIEN (Bit 15) */ +#define USIC_CH_CCR_AIEN_Msk (0x8000UL) /*!< USIC_CH CCR: AIEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_CCR_BRGIEN_Pos (16UL) /*!< USIC_CH CCR: BRGIEN (Bit 16) */ +#define USIC_CH_CCR_BRGIEN_Msk (0x10000UL) /*!< USIC_CH CCR: BRGIEN (Bitfield-Mask: 0x01) */ + +/* -------------------------------- USIC_CH_CMTR -------------------------------- */ +#define USIC_CH_CMTR_CTV_Pos (0UL) /*!< USIC_CH CMTR: CTV (Bit 0) */ +#define USIC_CH_CMTR_CTV_Msk (0x3ffUL) /*!< USIC_CH CMTR: CTV (Bitfield-Mask: 0x3ff) */ + +/* --------------------------------- USIC_CH_PSR -------------------------------- */ +#define USIC_CH_PSR_ST0_Pos (0UL) /*!< USIC_CH PSR: ST0 (Bit 0) */ +#define USIC_CH_PSR_ST0_Msk (0x1UL) /*!< USIC_CH PSR: ST0 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_ST1_Pos (1UL) /*!< USIC_CH PSR: ST1 (Bit 1) */ +#define USIC_CH_PSR_ST1_Msk (0x2UL) /*!< USIC_CH PSR: ST1 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_ST2_Pos (2UL) /*!< USIC_CH PSR: ST2 (Bit 2) */ +#define USIC_CH_PSR_ST2_Msk (0x4UL) /*!< USIC_CH PSR: ST2 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_ST3_Pos (3UL) /*!< USIC_CH PSR: ST3 (Bit 3) */ +#define USIC_CH_PSR_ST3_Msk (0x8UL) /*!< USIC_CH PSR: ST3 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_ST4_Pos (4UL) /*!< USIC_CH PSR: ST4 (Bit 4) */ +#define USIC_CH_PSR_ST4_Msk (0x10UL) /*!< USIC_CH PSR: ST4 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_ST5_Pos (5UL) /*!< USIC_CH PSR: ST5 (Bit 5) */ +#define USIC_CH_PSR_ST5_Msk (0x20UL) /*!< USIC_CH PSR: ST5 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_ST6_Pos (6UL) /*!< USIC_CH PSR: ST6 (Bit 6) */ +#define USIC_CH_PSR_ST6_Msk (0x40UL) /*!< USIC_CH PSR: ST6 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_ST7_Pos (7UL) /*!< USIC_CH PSR: ST7 (Bit 7) */ +#define USIC_CH_PSR_ST7_Msk (0x80UL) /*!< USIC_CH PSR: ST7 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_ST8_Pos (8UL) /*!< USIC_CH PSR: ST8 (Bit 8) */ +#define USIC_CH_PSR_ST8_Msk (0x100UL) /*!< USIC_CH PSR: ST8 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_ST9_Pos (9UL) /*!< USIC_CH PSR: ST9 (Bit 9) */ +#define USIC_CH_PSR_ST9_Msk (0x200UL) /*!< USIC_CH PSR: ST9 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_RSIF_Pos (10UL) /*!< USIC_CH PSR: RSIF (Bit 10) */ +#define USIC_CH_PSR_RSIF_Msk (0x400UL) /*!< USIC_CH PSR: RSIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_DLIF_Pos (11UL) /*!< USIC_CH PSR: DLIF (Bit 11) */ +#define USIC_CH_PSR_DLIF_Msk (0x800UL) /*!< USIC_CH PSR: DLIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_TSIF_Pos (12UL) /*!< USIC_CH PSR: TSIF (Bit 12) */ +#define USIC_CH_PSR_TSIF_Msk (0x1000UL) /*!< USIC_CH PSR: TSIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_TBIF_Pos (13UL) /*!< USIC_CH PSR: TBIF (Bit 13) */ +#define USIC_CH_PSR_TBIF_Msk (0x2000UL) /*!< USIC_CH PSR: TBIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_RIF_Pos (14UL) /*!< USIC_CH PSR: RIF (Bit 14) */ +#define USIC_CH_PSR_RIF_Msk (0x4000UL) /*!< USIC_CH PSR: RIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_AIF_Pos (15UL) /*!< USIC_CH PSR: AIF (Bit 15) */ +#define USIC_CH_PSR_AIF_Msk (0x8000UL) /*!< USIC_CH PSR: AIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_BRGIF_Pos (16UL) /*!< USIC_CH PSR: BRGIF (Bit 16) */ +#define USIC_CH_PSR_BRGIF_Msk (0x10000UL) /*!< USIC_CH PSR: BRGIF (Bitfield-Mask: 0x01) */ + +/* ----------------------------- USIC_CH_PSR_ASCMode ---------------------------- */ +#define USIC_CH_PSR_ASCMode_TXIDLE_Pos (0UL) /*!< USIC_CH PSR_ASCMode: TXIDLE (Bit 0) */ +#define USIC_CH_PSR_ASCMode_TXIDLE_Msk (0x1UL) /*!< USIC_CH PSR_ASCMode: TXIDLE (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_ASCMode_RXIDLE_Pos (1UL) /*!< USIC_CH PSR_ASCMode: RXIDLE (Bit 1) */ +#define USIC_CH_PSR_ASCMode_RXIDLE_Msk (0x2UL) /*!< USIC_CH PSR_ASCMode: RXIDLE (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_ASCMode_SBD_Pos (2UL) /*!< USIC_CH PSR_ASCMode: SBD (Bit 2) */ +#define USIC_CH_PSR_ASCMode_SBD_Msk (0x4UL) /*!< USIC_CH PSR_ASCMode: SBD (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_ASCMode_COL_Pos (3UL) /*!< USIC_CH PSR_ASCMode: COL (Bit 3) */ +#define USIC_CH_PSR_ASCMode_COL_Msk (0x8UL) /*!< USIC_CH PSR_ASCMode: COL (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_ASCMode_RNS_Pos (4UL) /*!< USIC_CH PSR_ASCMode: RNS (Bit 4) */ +#define USIC_CH_PSR_ASCMode_RNS_Msk (0x10UL) /*!< USIC_CH PSR_ASCMode: RNS (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_ASCMode_FER0_Pos (5UL) /*!< USIC_CH PSR_ASCMode: FER0 (Bit 5) */ +#define USIC_CH_PSR_ASCMode_FER0_Msk (0x20UL) /*!< USIC_CH PSR_ASCMode: FER0 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_ASCMode_FER1_Pos (6UL) /*!< USIC_CH PSR_ASCMode: FER1 (Bit 6) */ +#define USIC_CH_PSR_ASCMode_FER1_Msk (0x40UL) /*!< USIC_CH PSR_ASCMode: FER1 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_ASCMode_RFF_Pos (7UL) /*!< USIC_CH PSR_ASCMode: RFF (Bit 7) */ +#define USIC_CH_PSR_ASCMode_RFF_Msk (0x80UL) /*!< USIC_CH PSR_ASCMode: RFF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_ASCMode_TFF_Pos (8UL) /*!< USIC_CH PSR_ASCMode: TFF (Bit 8) */ +#define USIC_CH_PSR_ASCMode_TFF_Msk (0x100UL) /*!< USIC_CH PSR_ASCMode: TFF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_ASCMode_BUSY_Pos (9UL) /*!< USIC_CH PSR_ASCMode: BUSY (Bit 9) */ +#define USIC_CH_PSR_ASCMode_BUSY_Msk (0x200UL) /*!< USIC_CH PSR_ASCMode: BUSY (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_ASCMode_RSIF_Pos (10UL) /*!< USIC_CH PSR_ASCMode: RSIF (Bit 10) */ +#define USIC_CH_PSR_ASCMode_RSIF_Msk (0x400UL) /*!< USIC_CH PSR_ASCMode: RSIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_ASCMode_DLIF_Pos (11UL) /*!< USIC_CH PSR_ASCMode: DLIF (Bit 11) */ +#define USIC_CH_PSR_ASCMode_DLIF_Msk (0x800UL) /*!< USIC_CH PSR_ASCMode: DLIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_ASCMode_TSIF_Pos (12UL) /*!< USIC_CH PSR_ASCMode: TSIF (Bit 12) */ +#define USIC_CH_PSR_ASCMode_TSIF_Msk (0x1000UL) /*!< USIC_CH PSR_ASCMode: TSIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_ASCMode_TBIF_Pos (13UL) /*!< USIC_CH PSR_ASCMode: TBIF (Bit 13) */ +#define USIC_CH_PSR_ASCMode_TBIF_Msk (0x2000UL) /*!< USIC_CH PSR_ASCMode: TBIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_ASCMode_RIF_Pos (14UL) /*!< USIC_CH PSR_ASCMode: RIF (Bit 14) */ +#define USIC_CH_PSR_ASCMode_RIF_Msk (0x4000UL) /*!< USIC_CH PSR_ASCMode: RIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_ASCMode_AIF_Pos (15UL) /*!< USIC_CH PSR_ASCMode: AIF (Bit 15) */ +#define USIC_CH_PSR_ASCMode_AIF_Msk (0x8000UL) /*!< USIC_CH PSR_ASCMode: AIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_ASCMode_BRGIF_Pos (16UL) /*!< USIC_CH PSR_ASCMode: BRGIF (Bit 16) */ +#define USIC_CH_PSR_ASCMode_BRGIF_Msk (0x10000UL) /*!< USIC_CH PSR_ASCMode: BRGIF (Bitfield-Mask: 0x01) */ + +/* ----------------------------- USIC_CH_PSR_SSCMode ---------------------------- */ +#define USIC_CH_PSR_SSCMode_MSLS_Pos (0UL) /*!< USIC_CH PSR_SSCMode: MSLS (Bit 0) */ +#define USIC_CH_PSR_SSCMode_MSLS_Msk (0x1UL) /*!< USIC_CH PSR_SSCMode: MSLS (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_SSCMode_DX2S_Pos (1UL) /*!< USIC_CH PSR_SSCMode: DX2S (Bit 1) */ +#define USIC_CH_PSR_SSCMode_DX2S_Msk (0x2UL) /*!< USIC_CH PSR_SSCMode: DX2S (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_SSCMode_MSLSEV_Pos (2UL) /*!< USIC_CH PSR_SSCMode: MSLSEV (Bit 2) */ +#define USIC_CH_PSR_SSCMode_MSLSEV_Msk (0x4UL) /*!< USIC_CH PSR_SSCMode: MSLSEV (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_SSCMode_DX2TEV_Pos (3UL) /*!< USIC_CH PSR_SSCMode: DX2TEV (Bit 3) */ +#define USIC_CH_PSR_SSCMode_DX2TEV_Msk (0x8UL) /*!< USIC_CH PSR_SSCMode: DX2TEV (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_SSCMode_PARERR_Pos (4UL) /*!< USIC_CH PSR_SSCMode: PARERR (Bit 4) */ +#define USIC_CH_PSR_SSCMode_PARERR_Msk (0x10UL) /*!< USIC_CH PSR_SSCMode: PARERR (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_SSCMode_RSIF_Pos (10UL) /*!< USIC_CH PSR_SSCMode: RSIF (Bit 10) */ +#define USIC_CH_PSR_SSCMode_RSIF_Msk (0x400UL) /*!< USIC_CH PSR_SSCMode: RSIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_SSCMode_DLIF_Pos (11UL) /*!< USIC_CH PSR_SSCMode: DLIF (Bit 11) */ +#define USIC_CH_PSR_SSCMode_DLIF_Msk (0x800UL) /*!< USIC_CH PSR_SSCMode: DLIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_SSCMode_TSIF_Pos (12UL) /*!< USIC_CH PSR_SSCMode: TSIF (Bit 12) */ +#define USIC_CH_PSR_SSCMode_TSIF_Msk (0x1000UL) /*!< USIC_CH PSR_SSCMode: TSIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_SSCMode_TBIF_Pos (13UL) /*!< USIC_CH PSR_SSCMode: TBIF (Bit 13) */ +#define USIC_CH_PSR_SSCMode_TBIF_Msk (0x2000UL) /*!< USIC_CH PSR_SSCMode: TBIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_SSCMode_RIF_Pos (14UL) /*!< USIC_CH PSR_SSCMode: RIF (Bit 14) */ +#define USIC_CH_PSR_SSCMode_RIF_Msk (0x4000UL) /*!< USIC_CH PSR_SSCMode: RIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_SSCMode_AIF_Pos (15UL) /*!< USIC_CH PSR_SSCMode: AIF (Bit 15) */ +#define USIC_CH_PSR_SSCMode_AIF_Msk (0x8000UL) /*!< USIC_CH PSR_SSCMode: AIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_SSCMode_BRGIF_Pos (16UL) /*!< USIC_CH PSR_SSCMode: BRGIF (Bit 16) */ +#define USIC_CH_PSR_SSCMode_BRGIF_Msk (0x10000UL) /*!< USIC_CH PSR_SSCMode: BRGIF (Bitfield-Mask: 0x01) */ + +/* ----------------------------- USIC_CH_PSR_IICMode ---------------------------- */ +#define USIC_CH_PSR_IICMode_SLSEL_Pos (0UL) /*!< USIC_CH PSR_IICMode: SLSEL (Bit 0) */ +#define USIC_CH_PSR_IICMode_SLSEL_Msk (0x1UL) /*!< USIC_CH PSR_IICMode: SLSEL (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_IICMode_WTDF_Pos (1UL) /*!< USIC_CH PSR_IICMode: WTDF (Bit 1) */ +#define USIC_CH_PSR_IICMode_WTDF_Msk (0x2UL) /*!< USIC_CH PSR_IICMode: WTDF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_IICMode_SCR_Pos (2UL) /*!< USIC_CH PSR_IICMode: SCR (Bit 2) */ +#define USIC_CH_PSR_IICMode_SCR_Msk (0x4UL) /*!< USIC_CH PSR_IICMode: SCR (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_IICMode_RSCR_Pos (3UL) /*!< USIC_CH PSR_IICMode: RSCR (Bit 3) */ +#define USIC_CH_PSR_IICMode_RSCR_Msk (0x8UL) /*!< USIC_CH PSR_IICMode: RSCR (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_IICMode_PCR_Pos (4UL) /*!< USIC_CH PSR_IICMode: PCR (Bit 4) */ +#define USIC_CH_PSR_IICMode_PCR_Msk (0x10UL) /*!< USIC_CH PSR_IICMode: PCR (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_IICMode_NACK_Pos (5UL) /*!< USIC_CH PSR_IICMode: NACK (Bit 5) */ +#define USIC_CH_PSR_IICMode_NACK_Msk (0x20UL) /*!< USIC_CH PSR_IICMode: NACK (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_IICMode_ARL_Pos (6UL) /*!< USIC_CH PSR_IICMode: ARL (Bit 6) */ +#define USIC_CH_PSR_IICMode_ARL_Msk (0x40UL) /*!< USIC_CH PSR_IICMode: ARL (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_IICMode_SRR_Pos (7UL) /*!< USIC_CH PSR_IICMode: SRR (Bit 7) */ +#define USIC_CH_PSR_IICMode_SRR_Msk (0x80UL) /*!< USIC_CH PSR_IICMode: SRR (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_IICMode_ERR_Pos (8UL) /*!< USIC_CH PSR_IICMode: ERR (Bit 8) */ +#define USIC_CH_PSR_IICMode_ERR_Msk (0x100UL) /*!< USIC_CH PSR_IICMode: ERR (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_IICMode_ACK_Pos (9UL) /*!< USIC_CH PSR_IICMode: ACK (Bit 9) */ +#define USIC_CH_PSR_IICMode_ACK_Msk (0x200UL) /*!< USIC_CH PSR_IICMode: ACK (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_IICMode_RSIF_Pos (10UL) /*!< USIC_CH PSR_IICMode: RSIF (Bit 10) */ +#define USIC_CH_PSR_IICMode_RSIF_Msk (0x400UL) /*!< USIC_CH PSR_IICMode: RSIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_IICMode_DLIF_Pos (11UL) /*!< USIC_CH PSR_IICMode: DLIF (Bit 11) */ +#define USIC_CH_PSR_IICMode_DLIF_Msk (0x800UL) /*!< USIC_CH PSR_IICMode: DLIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_IICMode_TSIF_Pos (12UL) /*!< USIC_CH PSR_IICMode: TSIF (Bit 12) */ +#define USIC_CH_PSR_IICMode_TSIF_Msk (0x1000UL) /*!< USIC_CH PSR_IICMode: TSIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_IICMode_TBIF_Pos (13UL) /*!< USIC_CH PSR_IICMode: TBIF (Bit 13) */ +#define USIC_CH_PSR_IICMode_TBIF_Msk (0x2000UL) /*!< USIC_CH PSR_IICMode: TBIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_IICMode_RIF_Pos (14UL) /*!< USIC_CH PSR_IICMode: RIF (Bit 14) */ +#define USIC_CH_PSR_IICMode_RIF_Msk (0x4000UL) /*!< USIC_CH PSR_IICMode: RIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_IICMode_AIF_Pos (15UL) /*!< USIC_CH PSR_IICMode: AIF (Bit 15) */ +#define USIC_CH_PSR_IICMode_AIF_Msk (0x8000UL) /*!< USIC_CH PSR_IICMode: AIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_IICMode_BRGIF_Pos (16UL) /*!< USIC_CH PSR_IICMode: BRGIF (Bit 16) */ +#define USIC_CH_PSR_IICMode_BRGIF_Msk (0x10000UL) /*!< USIC_CH PSR_IICMode: BRGIF (Bitfield-Mask: 0x01) */ + +/* ----------------------------- USIC_CH_PSR_IISMode ---------------------------- */ +#define USIC_CH_PSR_IISMode_WA_Pos (0UL) /*!< USIC_CH PSR_IISMode: WA (Bit 0) */ +#define USIC_CH_PSR_IISMode_WA_Msk (0x1UL) /*!< USIC_CH PSR_IISMode: WA (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_IISMode_DX2S_Pos (1UL) /*!< USIC_CH PSR_IISMode: DX2S (Bit 1) */ +#define USIC_CH_PSR_IISMode_DX2S_Msk (0x2UL) /*!< USIC_CH PSR_IISMode: DX2S (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_IISMode_DX2TEV_Pos (3UL) /*!< USIC_CH PSR_IISMode: DX2TEV (Bit 3) */ +#define USIC_CH_PSR_IISMode_DX2TEV_Msk (0x8UL) /*!< USIC_CH PSR_IISMode: DX2TEV (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_IISMode_WAFE_Pos (4UL) /*!< USIC_CH PSR_IISMode: WAFE (Bit 4) */ +#define USIC_CH_PSR_IISMode_WAFE_Msk (0x10UL) /*!< USIC_CH PSR_IISMode: WAFE (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_IISMode_WARE_Pos (5UL) /*!< USIC_CH PSR_IISMode: WARE (Bit 5) */ +#define USIC_CH_PSR_IISMode_WARE_Msk (0x20UL) /*!< USIC_CH PSR_IISMode: WARE (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_IISMode_END_Pos (6UL) /*!< USIC_CH PSR_IISMode: END (Bit 6) */ +#define USIC_CH_PSR_IISMode_END_Msk (0x40UL) /*!< USIC_CH PSR_IISMode: END (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_IISMode_RSIF_Pos (10UL) /*!< USIC_CH PSR_IISMode: RSIF (Bit 10) */ +#define USIC_CH_PSR_IISMode_RSIF_Msk (0x400UL) /*!< USIC_CH PSR_IISMode: RSIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_IISMode_DLIF_Pos (11UL) /*!< USIC_CH PSR_IISMode: DLIF (Bit 11) */ +#define USIC_CH_PSR_IISMode_DLIF_Msk (0x800UL) /*!< USIC_CH PSR_IISMode: DLIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_IISMode_TSIF_Pos (12UL) /*!< USIC_CH PSR_IISMode: TSIF (Bit 12) */ +#define USIC_CH_PSR_IISMode_TSIF_Msk (0x1000UL) /*!< USIC_CH PSR_IISMode: TSIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_IISMode_TBIF_Pos (13UL) /*!< USIC_CH PSR_IISMode: TBIF (Bit 13) */ +#define USIC_CH_PSR_IISMode_TBIF_Msk (0x2000UL) /*!< USIC_CH PSR_IISMode: TBIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_IISMode_RIF_Pos (14UL) /*!< USIC_CH PSR_IISMode: RIF (Bit 14) */ +#define USIC_CH_PSR_IISMode_RIF_Msk (0x4000UL) /*!< USIC_CH PSR_IISMode: RIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_IISMode_AIF_Pos (15UL) /*!< USIC_CH PSR_IISMode: AIF (Bit 15) */ +#define USIC_CH_PSR_IISMode_AIF_Msk (0x8000UL) /*!< USIC_CH PSR_IISMode: AIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSR_IISMode_BRGIF_Pos (16UL) /*!< USIC_CH PSR_IISMode: BRGIF (Bit 16) */ +#define USIC_CH_PSR_IISMode_BRGIF_Msk (0x10000UL) /*!< USIC_CH PSR_IISMode: BRGIF (Bitfield-Mask: 0x01) */ + +/* -------------------------------- USIC_CH_PSCR -------------------------------- */ +#define USIC_CH_PSCR_CST0_Pos (0UL) /*!< USIC_CH PSCR: CST0 (Bit 0) */ +#define USIC_CH_PSCR_CST0_Msk (0x1UL) /*!< USIC_CH PSCR: CST0 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSCR_CST1_Pos (1UL) /*!< USIC_CH PSCR: CST1 (Bit 1) */ +#define USIC_CH_PSCR_CST1_Msk (0x2UL) /*!< USIC_CH PSCR: CST1 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSCR_CST2_Pos (2UL) /*!< USIC_CH PSCR: CST2 (Bit 2) */ +#define USIC_CH_PSCR_CST2_Msk (0x4UL) /*!< USIC_CH PSCR: CST2 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSCR_CST3_Pos (3UL) /*!< USIC_CH PSCR: CST3 (Bit 3) */ +#define USIC_CH_PSCR_CST3_Msk (0x8UL) /*!< USIC_CH PSCR: CST3 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSCR_CST4_Pos (4UL) /*!< USIC_CH PSCR: CST4 (Bit 4) */ +#define USIC_CH_PSCR_CST4_Msk (0x10UL) /*!< USIC_CH PSCR: CST4 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSCR_CST5_Pos (5UL) /*!< USIC_CH PSCR: CST5 (Bit 5) */ +#define USIC_CH_PSCR_CST5_Msk (0x20UL) /*!< USIC_CH PSCR: CST5 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSCR_CST6_Pos (6UL) /*!< USIC_CH PSCR: CST6 (Bit 6) */ +#define USIC_CH_PSCR_CST6_Msk (0x40UL) /*!< USIC_CH PSCR: CST6 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSCR_CST7_Pos (7UL) /*!< USIC_CH PSCR: CST7 (Bit 7) */ +#define USIC_CH_PSCR_CST7_Msk (0x80UL) /*!< USIC_CH PSCR: CST7 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSCR_CST8_Pos (8UL) /*!< USIC_CH PSCR: CST8 (Bit 8) */ +#define USIC_CH_PSCR_CST8_Msk (0x100UL) /*!< USIC_CH PSCR: CST8 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSCR_CST9_Pos (9UL) /*!< USIC_CH PSCR: CST9 (Bit 9) */ +#define USIC_CH_PSCR_CST9_Msk (0x200UL) /*!< USIC_CH PSCR: CST9 (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSCR_CRSIF_Pos (10UL) /*!< USIC_CH PSCR: CRSIF (Bit 10) */ +#define USIC_CH_PSCR_CRSIF_Msk (0x400UL) /*!< USIC_CH PSCR: CRSIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSCR_CDLIF_Pos (11UL) /*!< USIC_CH PSCR: CDLIF (Bit 11) */ +#define USIC_CH_PSCR_CDLIF_Msk (0x800UL) /*!< USIC_CH PSCR: CDLIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSCR_CTSIF_Pos (12UL) /*!< USIC_CH PSCR: CTSIF (Bit 12) */ +#define USIC_CH_PSCR_CTSIF_Msk (0x1000UL) /*!< USIC_CH PSCR: CTSIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSCR_CTBIF_Pos (13UL) /*!< USIC_CH PSCR: CTBIF (Bit 13) */ +#define USIC_CH_PSCR_CTBIF_Msk (0x2000UL) /*!< USIC_CH PSCR: CTBIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSCR_CRIF_Pos (14UL) /*!< USIC_CH PSCR: CRIF (Bit 14) */ +#define USIC_CH_PSCR_CRIF_Msk (0x4000UL) /*!< USIC_CH PSCR: CRIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSCR_CAIF_Pos (15UL) /*!< USIC_CH PSCR: CAIF (Bit 15) */ +#define USIC_CH_PSCR_CAIF_Msk (0x8000UL) /*!< USIC_CH PSCR: CAIF (Bitfield-Mask: 0x01) */ +#define USIC_CH_PSCR_CBRGIF_Pos (16UL) /*!< USIC_CH PSCR: CBRGIF (Bit 16) */ +#define USIC_CH_PSCR_CBRGIF_Msk (0x10000UL) /*!< USIC_CH PSCR: CBRGIF (Bitfield-Mask: 0x01) */ + +/* ------------------------------- USIC_CH_RBUFSR ------------------------------- */ +#define USIC_CH_RBUFSR_WLEN_Pos (0UL) /*!< USIC_CH RBUFSR: WLEN (Bit 0) */ +#define USIC_CH_RBUFSR_WLEN_Msk (0xfUL) /*!< USIC_CH RBUFSR: WLEN (Bitfield-Mask: 0x0f) */ +#define USIC_CH_RBUFSR_SOF_Pos (6UL) /*!< USIC_CH RBUFSR: SOF (Bit 6) */ +#define USIC_CH_RBUFSR_SOF_Msk (0x40UL) /*!< USIC_CH RBUFSR: SOF (Bitfield-Mask: 0x01) */ +#define USIC_CH_RBUFSR_PAR_Pos (8UL) /*!< USIC_CH RBUFSR: PAR (Bit 8) */ +#define USIC_CH_RBUFSR_PAR_Msk (0x100UL) /*!< USIC_CH RBUFSR: PAR (Bitfield-Mask: 0x01) */ +#define USIC_CH_RBUFSR_PERR_Pos (9UL) /*!< USIC_CH RBUFSR: PERR (Bit 9) */ +#define USIC_CH_RBUFSR_PERR_Msk (0x200UL) /*!< USIC_CH RBUFSR: PERR (Bitfield-Mask: 0x01) */ +#define USIC_CH_RBUFSR_RDV0_Pos (13UL) /*!< USIC_CH RBUFSR: RDV0 (Bit 13) */ +#define USIC_CH_RBUFSR_RDV0_Msk (0x2000UL) /*!< USIC_CH RBUFSR: RDV0 (Bitfield-Mask: 0x01) */ +#define USIC_CH_RBUFSR_RDV1_Pos (14UL) /*!< USIC_CH RBUFSR: RDV1 (Bit 14) */ +#define USIC_CH_RBUFSR_RDV1_Msk (0x4000UL) /*!< USIC_CH RBUFSR: RDV1 (Bitfield-Mask: 0x01) */ +#define USIC_CH_RBUFSR_DS_Pos (15UL) /*!< USIC_CH RBUFSR: DS (Bit 15) */ +#define USIC_CH_RBUFSR_DS_Msk (0x8000UL) /*!< USIC_CH RBUFSR: DS (Bitfield-Mask: 0x01) */ + +/* -------------------------------- USIC_CH_RBUF -------------------------------- */ +#define USIC_CH_RBUF_DSR_Pos (0UL) /*!< USIC_CH RBUF: DSR (Bit 0) */ +#define USIC_CH_RBUF_DSR_Msk (0xffffUL) /*!< USIC_CH RBUF: DSR (Bitfield-Mask: 0xffff) */ + +/* -------------------------------- USIC_CH_RBUFD ------------------------------- */ +#define USIC_CH_RBUFD_DSR_Pos (0UL) /*!< USIC_CH RBUFD: DSR (Bit 0) */ +#define USIC_CH_RBUFD_DSR_Msk (0xffffUL) /*!< USIC_CH RBUFD: DSR (Bitfield-Mask: 0xffff) */ + +/* -------------------------------- USIC_CH_RBUF0 ------------------------------- */ +#define USIC_CH_RBUF0_DSR0_Pos (0UL) /*!< USIC_CH RBUF0: DSR0 (Bit 0) */ +#define USIC_CH_RBUF0_DSR0_Msk (0xffffUL) /*!< USIC_CH RBUF0: DSR0 (Bitfield-Mask: 0xffff) */ + +/* -------------------------------- USIC_CH_RBUF1 ------------------------------- */ +#define USIC_CH_RBUF1_DSR1_Pos (0UL) /*!< USIC_CH RBUF1: DSR1 (Bit 0) */ +#define USIC_CH_RBUF1_DSR1_Msk (0xffffUL) /*!< USIC_CH RBUF1: DSR1 (Bitfield-Mask: 0xffff) */ + +/* ------------------------------ USIC_CH_RBUF01SR ------------------------------ */ +#define USIC_CH_RBUF01SR_WLEN0_Pos (0UL) /*!< USIC_CH RBUF01SR: WLEN0 (Bit 0) */ +#define USIC_CH_RBUF01SR_WLEN0_Msk (0xfUL) /*!< USIC_CH RBUF01SR: WLEN0 (Bitfield-Mask: 0x0f) */ +#define USIC_CH_RBUF01SR_SOF0_Pos (6UL) /*!< USIC_CH RBUF01SR: SOF0 (Bit 6) */ +#define USIC_CH_RBUF01SR_SOF0_Msk (0x40UL) /*!< USIC_CH RBUF01SR: SOF0 (Bitfield-Mask: 0x01) */ +#define USIC_CH_RBUF01SR_PAR0_Pos (8UL) /*!< USIC_CH RBUF01SR: PAR0 (Bit 8) */ +#define USIC_CH_RBUF01SR_PAR0_Msk (0x100UL) /*!< USIC_CH RBUF01SR: PAR0 (Bitfield-Mask: 0x01) */ +#define USIC_CH_RBUF01SR_PERR0_Pos (9UL) /*!< USIC_CH RBUF01SR: PERR0 (Bit 9) */ +#define USIC_CH_RBUF01SR_PERR0_Msk (0x200UL) /*!< USIC_CH RBUF01SR: PERR0 (Bitfield-Mask: 0x01) */ +#define USIC_CH_RBUF01SR_RDV00_Pos (13UL) /*!< USIC_CH RBUF01SR: RDV00 (Bit 13) */ +#define USIC_CH_RBUF01SR_RDV00_Msk (0x2000UL) /*!< USIC_CH RBUF01SR: RDV00 (Bitfield-Mask: 0x01) */ +#define USIC_CH_RBUF01SR_RDV01_Pos (14UL) /*!< USIC_CH RBUF01SR: RDV01 (Bit 14) */ +#define USIC_CH_RBUF01SR_RDV01_Msk (0x4000UL) /*!< USIC_CH RBUF01SR: RDV01 (Bitfield-Mask: 0x01) */ +#define USIC_CH_RBUF01SR_DS0_Pos (15UL) /*!< USIC_CH RBUF01SR: DS0 (Bit 15) */ +#define USIC_CH_RBUF01SR_DS0_Msk (0x8000UL) /*!< USIC_CH RBUF01SR: DS0 (Bitfield-Mask: 0x01) */ +#define USIC_CH_RBUF01SR_WLEN1_Pos (16UL) /*!< USIC_CH RBUF01SR: WLEN1 (Bit 16) */ +#define USIC_CH_RBUF01SR_WLEN1_Msk (0xf0000UL) /*!< USIC_CH RBUF01SR: WLEN1 (Bitfield-Mask: 0x0f) */ +#define USIC_CH_RBUF01SR_SOF1_Pos (22UL) /*!< USIC_CH RBUF01SR: SOF1 (Bit 22) */ +#define USIC_CH_RBUF01SR_SOF1_Msk (0x400000UL) /*!< USIC_CH RBUF01SR: SOF1 (Bitfield-Mask: 0x01) */ +#define USIC_CH_RBUF01SR_PAR1_Pos (24UL) /*!< USIC_CH RBUF01SR: PAR1 (Bit 24) */ +#define USIC_CH_RBUF01SR_PAR1_Msk (0x1000000UL) /*!< USIC_CH RBUF01SR: PAR1 (Bitfield-Mask: 0x01) */ +#define USIC_CH_RBUF01SR_PERR1_Pos (25UL) /*!< USIC_CH RBUF01SR: PERR1 (Bit 25) */ +#define USIC_CH_RBUF01SR_PERR1_Msk (0x2000000UL) /*!< USIC_CH RBUF01SR: PERR1 (Bitfield-Mask: 0x01) */ +#define USIC_CH_RBUF01SR_RDV10_Pos (29UL) /*!< USIC_CH RBUF01SR: RDV10 (Bit 29) */ +#define USIC_CH_RBUF01SR_RDV10_Msk (0x20000000UL) /*!< USIC_CH RBUF01SR: RDV10 (Bitfield-Mask: 0x01) */ +#define USIC_CH_RBUF01SR_RDV11_Pos (30UL) /*!< USIC_CH RBUF01SR: RDV11 (Bit 30) */ +#define USIC_CH_RBUF01SR_RDV11_Msk (0x40000000UL) /*!< USIC_CH RBUF01SR: RDV11 (Bitfield-Mask: 0x01) */ +#define USIC_CH_RBUF01SR_DS1_Pos (31UL) /*!< USIC_CH RBUF01SR: DS1 (Bit 31) */ +#define USIC_CH_RBUF01SR_DS1_Msk (0x80000000UL) /*!< USIC_CH RBUF01SR: DS1 (Bitfield-Mask: 0x01) */ + +/* --------------------------------- USIC_CH_FMR -------------------------------- */ +#define USIC_CH_FMR_MTDV_Pos (0UL) /*!< USIC_CH FMR: MTDV (Bit 0) */ +#define USIC_CH_FMR_MTDV_Msk (0x3UL) /*!< USIC_CH FMR: MTDV (Bitfield-Mask: 0x03) */ +#define USIC_CH_FMR_ATVC_Pos (4UL) /*!< USIC_CH FMR: ATVC (Bit 4) */ +#define USIC_CH_FMR_ATVC_Msk (0x10UL) /*!< USIC_CH FMR: ATVC (Bitfield-Mask: 0x01) */ +#define USIC_CH_FMR_CRDV0_Pos (14UL) /*!< USIC_CH FMR: CRDV0 (Bit 14) */ +#define USIC_CH_FMR_CRDV0_Msk (0x4000UL) /*!< USIC_CH FMR: CRDV0 (Bitfield-Mask: 0x01) */ +#define USIC_CH_FMR_CRDV1_Pos (15UL) /*!< USIC_CH FMR: CRDV1 (Bit 15) */ +#define USIC_CH_FMR_CRDV1_Msk (0x8000UL) /*!< USIC_CH FMR: CRDV1 (Bitfield-Mask: 0x01) */ +#define USIC_CH_FMR_SIO0_Pos (16UL) /*!< USIC_CH FMR: SIO0 (Bit 16) */ +#define USIC_CH_FMR_SIO0_Msk (0x10000UL) /*!< USIC_CH FMR: SIO0 (Bitfield-Mask: 0x01) */ +#define USIC_CH_FMR_SIO1_Pos (17UL) /*!< USIC_CH FMR: SIO1 (Bit 17) */ +#define USIC_CH_FMR_SIO1_Msk (0x20000UL) /*!< USIC_CH FMR: SIO1 (Bitfield-Mask: 0x01) */ +#define USIC_CH_FMR_SIO2_Pos (18UL) /*!< USIC_CH FMR: SIO2 (Bit 18) */ +#define USIC_CH_FMR_SIO2_Msk (0x40000UL) /*!< USIC_CH FMR: SIO2 (Bitfield-Mask: 0x01) */ +#define USIC_CH_FMR_SIO3_Pos (19UL) /*!< USIC_CH FMR: SIO3 (Bit 19) */ +#define USIC_CH_FMR_SIO3_Msk (0x80000UL) /*!< USIC_CH FMR: SIO3 (Bitfield-Mask: 0x01) */ +#define USIC_CH_FMR_SIO4_Pos (20UL) /*!< USIC_CH FMR: SIO4 (Bit 20) */ +#define USIC_CH_FMR_SIO4_Msk (0x100000UL) /*!< USIC_CH FMR: SIO4 (Bitfield-Mask: 0x01) */ +#define USIC_CH_FMR_SIO5_Pos (21UL) /*!< USIC_CH FMR: SIO5 (Bit 21) */ +#define USIC_CH_FMR_SIO5_Msk (0x200000UL) /*!< USIC_CH FMR: SIO5 (Bitfield-Mask: 0x01) */ + +/* -------------------------------- USIC_CH_TBUF -------------------------------- */ +#define USIC_CH_TBUF_TDATA_Pos (0UL) /*!< USIC_CH TBUF: TDATA (Bit 0) */ +#define USIC_CH_TBUF_TDATA_Msk (0xffffUL) /*!< USIC_CH TBUF: TDATA (Bitfield-Mask: 0xffff) */ + +/* --------------------------------- USIC_CH_BYP -------------------------------- */ +#define USIC_CH_BYP_BDATA_Pos (0UL) /*!< USIC_CH BYP: BDATA (Bit 0) */ +#define USIC_CH_BYP_BDATA_Msk (0xffffUL) /*!< USIC_CH BYP: BDATA (Bitfield-Mask: 0xffff) */ + +/* -------------------------------- USIC_CH_BYPCR ------------------------------- */ +#define USIC_CH_BYPCR_BWLE_Pos (0UL) /*!< USIC_CH BYPCR: BWLE (Bit 0) */ +#define USIC_CH_BYPCR_BWLE_Msk (0xfUL) /*!< USIC_CH BYPCR: BWLE (Bitfield-Mask: 0x0f) */ +#define USIC_CH_BYPCR_BDSSM_Pos (8UL) /*!< USIC_CH BYPCR: BDSSM (Bit 8) */ +#define USIC_CH_BYPCR_BDSSM_Msk (0x100UL) /*!< USIC_CH BYPCR: BDSSM (Bitfield-Mask: 0x01) */ +#define USIC_CH_BYPCR_BDEN_Pos (10UL) /*!< USIC_CH BYPCR: BDEN (Bit 10) */ +#define USIC_CH_BYPCR_BDEN_Msk (0xc00UL) /*!< USIC_CH BYPCR: BDEN (Bitfield-Mask: 0x03) */ +#define USIC_CH_BYPCR_BDVTR_Pos (12UL) /*!< USIC_CH BYPCR: BDVTR (Bit 12) */ +#define USIC_CH_BYPCR_BDVTR_Msk (0x1000UL) /*!< USIC_CH BYPCR: BDVTR (Bitfield-Mask: 0x01) */ +#define USIC_CH_BYPCR_BPRIO_Pos (13UL) /*!< USIC_CH BYPCR: BPRIO (Bit 13) */ +#define USIC_CH_BYPCR_BPRIO_Msk (0x2000UL) /*!< USIC_CH BYPCR: BPRIO (Bitfield-Mask: 0x01) */ +#define USIC_CH_BYPCR_BDV_Pos (15UL) /*!< USIC_CH BYPCR: BDV (Bit 15) */ +#define USIC_CH_BYPCR_BDV_Msk (0x8000UL) /*!< USIC_CH BYPCR: BDV (Bitfield-Mask: 0x01) */ +#define USIC_CH_BYPCR_BSELO_Pos (16UL) /*!< USIC_CH BYPCR: BSELO (Bit 16) */ +#define USIC_CH_BYPCR_BSELO_Msk (0x1f0000UL) /*!< USIC_CH BYPCR: BSELO (Bitfield-Mask: 0x1f) */ +#define USIC_CH_BYPCR_BHPC_Pos (21UL) /*!< USIC_CH BYPCR: BHPC (Bit 21) */ +#define USIC_CH_BYPCR_BHPC_Msk (0xe00000UL) /*!< USIC_CH BYPCR: BHPC (Bitfield-Mask: 0x07) */ + +/* -------------------------------- USIC_CH_TBCTR ------------------------------- */ +#define USIC_CH_TBCTR_DPTR_Pos (0UL) /*!< USIC_CH TBCTR: DPTR (Bit 0) */ +#define USIC_CH_TBCTR_DPTR_Msk (0x3fUL) /*!< USIC_CH TBCTR: DPTR (Bitfield-Mask: 0x3f) */ +#define USIC_CH_TBCTR_LIMIT_Pos (8UL) /*!< USIC_CH TBCTR: LIMIT (Bit 8) */ +#define USIC_CH_TBCTR_LIMIT_Msk (0x3f00UL) /*!< USIC_CH TBCTR: LIMIT (Bitfield-Mask: 0x3f) */ +#define USIC_CH_TBCTR_STBTM_Pos (14UL) /*!< USIC_CH TBCTR: STBTM (Bit 14) */ +#define USIC_CH_TBCTR_STBTM_Msk (0x4000UL) /*!< USIC_CH TBCTR: STBTM (Bitfield-Mask: 0x01) */ +#define USIC_CH_TBCTR_STBTEN_Pos (15UL) /*!< USIC_CH TBCTR: STBTEN (Bit 15) */ +#define USIC_CH_TBCTR_STBTEN_Msk (0x8000UL) /*!< USIC_CH TBCTR: STBTEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_TBCTR_STBINP_Pos (16UL) /*!< USIC_CH TBCTR: STBINP (Bit 16) */ +#define USIC_CH_TBCTR_STBINP_Msk (0x70000UL) /*!< USIC_CH TBCTR: STBINP (Bitfield-Mask: 0x07) */ +#define USIC_CH_TBCTR_ATBINP_Pos (19UL) /*!< USIC_CH TBCTR: ATBINP (Bit 19) */ +#define USIC_CH_TBCTR_ATBINP_Msk (0x380000UL) /*!< USIC_CH TBCTR: ATBINP (Bitfield-Mask: 0x07) */ +#define USIC_CH_TBCTR_SIZE_Pos (24UL) /*!< USIC_CH TBCTR: SIZE (Bit 24) */ +#define USIC_CH_TBCTR_SIZE_Msk (0x7000000UL) /*!< USIC_CH TBCTR: SIZE (Bitfield-Mask: 0x07) */ +#define USIC_CH_TBCTR_LOF_Pos (28UL) /*!< USIC_CH TBCTR: LOF (Bit 28) */ +#define USIC_CH_TBCTR_LOF_Msk (0x10000000UL) /*!< USIC_CH TBCTR: LOF (Bitfield-Mask: 0x01) */ +#define USIC_CH_TBCTR_STBIEN_Pos (30UL) /*!< USIC_CH TBCTR: STBIEN (Bit 30) */ +#define USIC_CH_TBCTR_STBIEN_Msk (0x40000000UL) /*!< USIC_CH TBCTR: STBIEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_TBCTR_TBERIEN_Pos (31UL) /*!< USIC_CH TBCTR: TBERIEN (Bit 31) */ +#define USIC_CH_TBCTR_TBERIEN_Msk (0x80000000UL) /*!< USIC_CH TBCTR: TBERIEN (Bitfield-Mask: 0x01) */ + +/* -------------------------------- USIC_CH_RBCTR ------------------------------- */ +#define USIC_CH_RBCTR_DPTR_Pos (0UL) /*!< USIC_CH RBCTR: DPTR (Bit 0) */ +#define USIC_CH_RBCTR_DPTR_Msk (0x3fUL) /*!< USIC_CH RBCTR: DPTR (Bitfield-Mask: 0x3f) */ +#define USIC_CH_RBCTR_LIMIT_Pos (8UL) /*!< USIC_CH RBCTR: LIMIT (Bit 8) */ +#define USIC_CH_RBCTR_LIMIT_Msk (0x3f00UL) /*!< USIC_CH RBCTR: LIMIT (Bitfield-Mask: 0x3f) */ +#define USIC_CH_RBCTR_SRBTM_Pos (14UL) /*!< USIC_CH RBCTR: SRBTM (Bit 14) */ +#define USIC_CH_RBCTR_SRBTM_Msk (0x4000UL) /*!< USIC_CH RBCTR: SRBTM (Bitfield-Mask: 0x01) */ +#define USIC_CH_RBCTR_SRBTEN_Pos (15UL) /*!< USIC_CH RBCTR: SRBTEN (Bit 15) */ +#define USIC_CH_RBCTR_SRBTEN_Msk (0x8000UL) /*!< USIC_CH RBCTR: SRBTEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_RBCTR_SRBINP_Pos (16UL) /*!< USIC_CH RBCTR: SRBINP (Bit 16) */ +#define USIC_CH_RBCTR_SRBINP_Msk (0x70000UL) /*!< USIC_CH RBCTR: SRBINP (Bitfield-Mask: 0x07) */ +#define USIC_CH_RBCTR_ARBINP_Pos (19UL) /*!< USIC_CH RBCTR: ARBINP (Bit 19) */ +#define USIC_CH_RBCTR_ARBINP_Msk (0x380000UL) /*!< USIC_CH RBCTR: ARBINP (Bitfield-Mask: 0x07) */ +#define USIC_CH_RBCTR_RCIM_Pos (22UL) /*!< USIC_CH RBCTR: RCIM (Bit 22) */ +#define USIC_CH_RBCTR_RCIM_Msk (0xc00000UL) /*!< USIC_CH RBCTR: RCIM (Bitfield-Mask: 0x03) */ +#define USIC_CH_RBCTR_SIZE_Pos (24UL) /*!< USIC_CH RBCTR: SIZE (Bit 24) */ +#define USIC_CH_RBCTR_SIZE_Msk (0x7000000UL) /*!< USIC_CH RBCTR: SIZE (Bitfield-Mask: 0x07) */ +#define USIC_CH_RBCTR_RNM_Pos (27UL) /*!< USIC_CH RBCTR: RNM (Bit 27) */ +#define USIC_CH_RBCTR_RNM_Msk (0x8000000UL) /*!< USIC_CH RBCTR: RNM (Bitfield-Mask: 0x01) */ +#define USIC_CH_RBCTR_LOF_Pos (28UL) /*!< USIC_CH RBCTR: LOF (Bit 28) */ +#define USIC_CH_RBCTR_LOF_Msk (0x10000000UL) /*!< USIC_CH RBCTR: LOF (Bitfield-Mask: 0x01) */ +#define USIC_CH_RBCTR_ARBIEN_Pos (29UL) /*!< USIC_CH RBCTR: ARBIEN (Bit 29) */ +#define USIC_CH_RBCTR_ARBIEN_Msk (0x20000000UL) /*!< USIC_CH RBCTR: ARBIEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_RBCTR_SRBIEN_Pos (30UL) /*!< USIC_CH RBCTR: SRBIEN (Bit 30) */ +#define USIC_CH_RBCTR_SRBIEN_Msk (0x40000000UL) /*!< USIC_CH RBCTR: SRBIEN (Bitfield-Mask: 0x01) */ +#define USIC_CH_RBCTR_RBERIEN_Pos (31UL) /*!< USIC_CH RBCTR: RBERIEN (Bit 31) */ +#define USIC_CH_RBCTR_RBERIEN_Msk (0x80000000UL) /*!< USIC_CH RBCTR: RBERIEN (Bitfield-Mask: 0x01) */ + +/* ------------------------------- USIC_CH_TRBPTR ------------------------------- */ +#define USIC_CH_TRBPTR_TDIPTR_Pos (0UL) /*!< USIC_CH TRBPTR: TDIPTR (Bit 0) */ +#define USIC_CH_TRBPTR_TDIPTR_Msk (0x3fUL) /*!< USIC_CH TRBPTR: TDIPTR (Bitfield-Mask: 0x3f) */ +#define USIC_CH_TRBPTR_TDOPTR_Pos (8UL) /*!< USIC_CH TRBPTR: TDOPTR (Bit 8) */ +#define USIC_CH_TRBPTR_TDOPTR_Msk (0x3f00UL) /*!< USIC_CH TRBPTR: TDOPTR (Bitfield-Mask: 0x3f) */ +#define USIC_CH_TRBPTR_RDIPTR_Pos (16UL) /*!< USIC_CH TRBPTR: RDIPTR (Bit 16) */ +#define USIC_CH_TRBPTR_RDIPTR_Msk (0x3f0000UL) /*!< USIC_CH TRBPTR: RDIPTR (Bitfield-Mask: 0x3f) */ +#define USIC_CH_TRBPTR_RDOPTR_Pos (24UL) /*!< USIC_CH TRBPTR: RDOPTR (Bit 24) */ +#define USIC_CH_TRBPTR_RDOPTR_Msk (0x3f000000UL) /*!< USIC_CH TRBPTR: RDOPTR (Bitfield-Mask: 0x3f) */ + +/* -------------------------------- USIC_CH_TRBSR ------------------------------- */ +#define USIC_CH_TRBSR_SRBI_Pos (0UL) /*!< USIC_CH TRBSR: SRBI (Bit 0) */ +#define USIC_CH_TRBSR_SRBI_Msk (0x1UL) /*!< USIC_CH TRBSR: SRBI (Bitfield-Mask: 0x01) */ +#define USIC_CH_TRBSR_RBERI_Pos (1UL) /*!< USIC_CH TRBSR: RBERI (Bit 1) */ +#define USIC_CH_TRBSR_RBERI_Msk (0x2UL) /*!< USIC_CH TRBSR: RBERI (Bitfield-Mask: 0x01) */ +#define USIC_CH_TRBSR_ARBI_Pos (2UL) /*!< USIC_CH TRBSR: ARBI (Bit 2) */ +#define USIC_CH_TRBSR_ARBI_Msk (0x4UL) /*!< USIC_CH TRBSR: ARBI (Bitfield-Mask: 0x01) */ +#define USIC_CH_TRBSR_REMPTY_Pos (3UL) /*!< USIC_CH TRBSR: REMPTY (Bit 3) */ +#define USIC_CH_TRBSR_REMPTY_Msk (0x8UL) /*!< USIC_CH TRBSR: REMPTY (Bitfield-Mask: 0x01) */ +#define USIC_CH_TRBSR_RFULL_Pos (4UL) /*!< USIC_CH TRBSR: RFULL (Bit 4) */ +#define USIC_CH_TRBSR_RFULL_Msk (0x10UL) /*!< USIC_CH TRBSR: RFULL (Bitfield-Mask: 0x01) */ +#define USIC_CH_TRBSR_RBUS_Pos (5UL) /*!< USIC_CH TRBSR: RBUS (Bit 5) */ +#define USIC_CH_TRBSR_RBUS_Msk (0x20UL) /*!< USIC_CH TRBSR: RBUS (Bitfield-Mask: 0x01) */ +#define USIC_CH_TRBSR_SRBT_Pos (6UL) /*!< USIC_CH TRBSR: SRBT (Bit 6) */ +#define USIC_CH_TRBSR_SRBT_Msk (0x40UL) /*!< USIC_CH TRBSR: SRBT (Bitfield-Mask: 0x01) */ +#define USIC_CH_TRBSR_STBI_Pos (8UL) /*!< USIC_CH TRBSR: STBI (Bit 8) */ +#define USIC_CH_TRBSR_STBI_Msk (0x100UL) /*!< USIC_CH TRBSR: STBI (Bitfield-Mask: 0x01) */ +#define USIC_CH_TRBSR_TBERI_Pos (9UL) /*!< USIC_CH TRBSR: TBERI (Bit 9) */ +#define USIC_CH_TRBSR_TBERI_Msk (0x200UL) /*!< USIC_CH TRBSR: TBERI (Bitfield-Mask: 0x01) */ +#define USIC_CH_TRBSR_TEMPTY_Pos (11UL) /*!< USIC_CH TRBSR: TEMPTY (Bit 11) */ +#define USIC_CH_TRBSR_TEMPTY_Msk (0x800UL) /*!< USIC_CH TRBSR: TEMPTY (Bitfield-Mask: 0x01) */ +#define USIC_CH_TRBSR_TFULL_Pos (12UL) /*!< USIC_CH TRBSR: TFULL (Bit 12) */ +#define USIC_CH_TRBSR_TFULL_Msk (0x1000UL) /*!< USIC_CH TRBSR: TFULL (Bitfield-Mask: 0x01) */ +#define USIC_CH_TRBSR_TBUS_Pos (13UL) /*!< USIC_CH TRBSR: TBUS (Bit 13) */ +#define USIC_CH_TRBSR_TBUS_Msk (0x2000UL) /*!< USIC_CH TRBSR: TBUS (Bitfield-Mask: 0x01) */ +#define USIC_CH_TRBSR_STBT_Pos (14UL) /*!< USIC_CH TRBSR: STBT (Bit 14) */ +#define USIC_CH_TRBSR_STBT_Msk (0x4000UL) /*!< USIC_CH TRBSR: STBT (Bitfield-Mask: 0x01) */ +#define USIC_CH_TRBSR_RBFLVL_Pos (16UL) /*!< USIC_CH TRBSR: RBFLVL (Bit 16) */ +#define USIC_CH_TRBSR_RBFLVL_Msk (0x7f0000UL) /*!< USIC_CH TRBSR: RBFLVL (Bitfield-Mask: 0x7f) */ +#define USIC_CH_TRBSR_TBFLVL_Pos (24UL) /*!< USIC_CH TRBSR: TBFLVL (Bit 24) */ +#define USIC_CH_TRBSR_TBFLVL_Msk (0x7f000000UL) /*!< USIC_CH TRBSR: TBFLVL (Bitfield-Mask: 0x7f) */ + +/* ------------------------------- USIC_CH_TRBSCR ------------------------------- */ +#define USIC_CH_TRBSCR_CSRBI_Pos (0UL) /*!< USIC_CH TRBSCR: CSRBI (Bit 0) */ +#define USIC_CH_TRBSCR_CSRBI_Msk (0x1UL) /*!< USIC_CH TRBSCR: CSRBI (Bitfield-Mask: 0x01) */ +#define USIC_CH_TRBSCR_CRBERI_Pos (1UL) /*!< USIC_CH TRBSCR: CRBERI (Bit 1) */ +#define USIC_CH_TRBSCR_CRBERI_Msk (0x2UL) /*!< USIC_CH TRBSCR: CRBERI (Bitfield-Mask: 0x01) */ +#define USIC_CH_TRBSCR_CARBI_Pos (2UL) /*!< USIC_CH TRBSCR: CARBI (Bit 2) */ +#define USIC_CH_TRBSCR_CARBI_Msk (0x4UL) /*!< USIC_CH TRBSCR: CARBI (Bitfield-Mask: 0x01) */ +#define USIC_CH_TRBSCR_CSTBI_Pos (8UL) /*!< USIC_CH TRBSCR: CSTBI (Bit 8) */ +#define USIC_CH_TRBSCR_CSTBI_Msk (0x100UL) /*!< USIC_CH TRBSCR: CSTBI (Bitfield-Mask: 0x01) */ +#define USIC_CH_TRBSCR_CTBERI_Pos (9UL) /*!< USIC_CH TRBSCR: CTBERI (Bit 9) */ +#define USIC_CH_TRBSCR_CTBERI_Msk (0x200UL) /*!< USIC_CH TRBSCR: CTBERI (Bitfield-Mask: 0x01) */ +#define USIC_CH_TRBSCR_CBDV_Pos (10UL) /*!< USIC_CH TRBSCR: CBDV (Bit 10) */ +#define USIC_CH_TRBSCR_CBDV_Msk (0x400UL) /*!< USIC_CH TRBSCR: CBDV (Bitfield-Mask: 0x01) */ +#define USIC_CH_TRBSCR_FLUSHRB_Pos (14UL) /*!< USIC_CH TRBSCR: FLUSHRB (Bit 14) */ +#define USIC_CH_TRBSCR_FLUSHRB_Msk (0x4000UL) /*!< USIC_CH TRBSCR: FLUSHRB (Bitfield-Mask: 0x01) */ +#define USIC_CH_TRBSCR_FLUSHTB_Pos (15UL) /*!< USIC_CH TRBSCR: FLUSHTB (Bit 15) */ +#define USIC_CH_TRBSCR_FLUSHTB_Msk (0x8000UL) /*!< USIC_CH TRBSCR: FLUSHTB (Bitfield-Mask: 0x01) */ + +/* -------------------------------- USIC_CH_OUTR -------------------------------- */ +#define USIC_CH_OUTR_DSR_Pos (0UL) /*!< USIC_CH OUTR: DSR (Bit 0) */ +#define USIC_CH_OUTR_DSR_Msk (0xffffUL) /*!< USIC_CH OUTR: DSR (Bitfield-Mask: 0xffff) */ +#define USIC_CH_OUTR_RCI_Pos (16UL) /*!< USIC_CH OUTR: RCI (Bit 16) */ +#define USIC_CH_OUTR_RCI_Msk (0x1f0000UL) /*!< USIC_CH OUTR: RCI (Bitfield-Mask: 0x1f) */ + +/* -------------------------------- USIC_CH_OUTDR ------------------------------- */ +#define USIC_CH_OUTDR_DSR_Pos (0UL) /*!< USIC_CH OUTDR: DSR (Bit 0) */ +#define USIC_CH_OUTDR_DSR_Msk (0xffffUL) /*!< USIC_CH OUTDR: DSR (Bitfield-Mask: 0xffff) */ +#define USIC_CH_OUTDR_RCI_Pos (16UL) /*!< USIC_CH OUTDR: RCI (Bit 16) */ +#define USIC_CH_OUTDR_RCI_Msk (0x1f0000UL) /*!< USIC_CH OUTDR: RCI (Bitfield-Mask: 0x1f) */ + +/* --------------------------------- USIC_CH_IN --------------------------------- */ +#define USIC_CH_IN_TDATA_Pos (0UL) /*!< USIC_CH IN: TDATA (Bit 0) */ +#define USIC_CH_IN_TDATA_Msk (0xffffUL) /*!< USIC_CH IN: TDATA (Bitfield-Mask: 0xffff) */ + + +/* ================================================================================ */ +/* ================ struct 'CAN' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ----------------------------------- CAN_CLC ---------------------------------- */ +#define CAN_CLC_DISR_Pos (0UL) /*!< CAN CLC: DISR (Bit 0) */ +#define CAN_CLC_DISR_Msk (0x1UL) /*!< CAN CLC: DISR (Bitfield-Mask: 0x01) */ +#define CAN_CLC_DISS_Pos (1UL) /*!< CAN CLC: DISS (Bit 1) */ +#define CAN_CLC_DISS_Msk (0x2UL) /*!< CAN CLC: DISS (Bitfield-Mask: 0x01) */ +#define CAN_CLC_EDIS_Pos (3UL) /*!< CAN CLC: EDIS (Bit 3) */ +#define CAN_CLC_EDIS_Msk (0x8UL) /*!< CAN CLC: EDIS (Bitfield-Mask: 0x01) */ + +/* ----------------------------------- CAN_ID ----------------------------------- */ +#define CAN_ID_MOD_REV_Pos (0UL) /*!< CAN ID: MOD_REV (Bit 0) */ +#define CAN_ID_MOD_REV_Msk (0xffUL) /*!< CAN ID: MOD_REV (Bitfield-Mask: 0xff) */ +#define CAN_ID_MOD_TYPE_Pos (8UL) /*!< CAN ID: MOD_TYPE (Bit 8) */ +#define CAN_ID_MOD_TYPE_Msk (0xff00UL) /*!< CAN ID: MOD_TYPE (Bitfield-Mask: 0xff) */ +#define CAN_ID_MOD_NUMBER_Pos (16UL) /*!< CAN ID: MOD_NUMBER (Bit 16) */ +#define CAN_ID_MOD_NUMBER_Msk (0xffff0000UL) /*!< CAN ID: MOD_NUMBER (Bitfield-Mask: 0xffff) */ + +/* ----------------------------------- CAN_FDR ---------------------------------- */ +#define CAN_FDR_STEP_Pos (0UL) /*!< CAN FDR: STEP (Bit 0) */ +#define CAN_FDR_STEP_Msk (0x3ffUL) /*!< CAN FDR: STEP (Bitfield-Mask: 0x3ff) */ +#define CAN_FDR_DM_Pos (14UL) /*!< CAN FDR: DM (Bit 14) */ +#define CAN_FDR_DM_Msk (0xc000UL) /*!< CAN FDR: DM (Bitfield-Mask: 0x03) */ + +/* ---------------------------------- CAN_LIST ---------------------------------- */ +#define CAN_LIST_BEGIN_Pos (0UL) /*!< CAN LIST: BEGIN (Bit 0) */ +#define CAN_LIST_BEGIN_Msk (0xffUL) /*!< CAN LIST: BEGIN (Bitfield-Mask: 0xff) */ +#define CAN_LIST_END_Pos (8UL) /*!< CAN LIST: END (Bit 8) */ +#define CAN_LIST_END_Msk (0xff00UL) /*!< CAN LIST: END (Bitfield-Mask: 0xff) */ +#define CAN_LIST_SIZE_Pos (16UL) /*!< CAN LIST: SIZE (Bit 16) */ +#define CAN_LIST_SIZE_Msk (0xff0000UL) /*!< CAN LIST: SIZE (Bitfield-Mask: 0xff) */ +#define CAN_LIST_EMPTY_Pos (24UL) /*!< CAN LIST: EMPTY (Bit 24) */ +#define CAN_LIST_EMPTY_Msk (0x1000000UL) /*!< CAN LIST: EMPTY (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- CAN_MSPND --------------------------------- */ +#define CAN_MSPND_PND_Pos (0UL) /*!< CAN MSPND: PND (Bit 0) */ +#define CAN_MSPND_PND_Msk (0xffffffffUL) /*!< CAN MSPND: PND (Bitfield-Mask: 0xffffffff) */ + +/* ---------------------------------- CAN_MSID ---------------------------------- */ +#define CAN_MSID_INDEX_Pos (0UL) /*!< CAN MSID: INDEX (Bit 0) */ +#define CAN_MSID_INDEX_Msk (0x3fUL) /*!< CAN MSID: INDEX (Bitfield-Mask: 0x3f) */ + +/* --------------------------------- CAN_MSIMASK -------------------------------- */ +#define CAN_MSIMASK_IM_Pos (0UL) /*!< CAN MSIMASK: IM (Bit 0) */ +#define CAN_MSIMASK_IM_Msk (0xffffffffUL) /*!< CAN MSIMASK: IM (Bitfield-Mask: 0xffffffff) */ + +/* --------------------------------- CAN_PANCTR --------------------------------- */ +#define CAN_PANCTR_PANCMD_Pos (0UL) /*!< CAN PANCTR: PANCMD (Bit 0) */ +#define CAN_PANCTR_PANCMD_Msk (0xffUL) /*!< CAN PANCTR: PANCMD (Bitfield-Mask: 0xff) */ +#define CAN_PANCTR_BUSY_Pos (8UL) /*!< CAN PANCTR: BUSY (Bit 8) */ +#define CAN_PANCTR_BUSY_Msk (0x100UL) /*!< CAN PANCTR: BUSY (Bitfield-Mask: 0x01) */ +#define CAN_PANCTR_RBUSY_Pos (9UL) /*!< CAN PANCTR: RBUSY (Bit 9) */ +#define CAN_PANCTR_RBUSY_Msk (0x200UL) /*!< CAN PANCTR: RBUSY (Bitfield-Mask: 0x01) */ +#define CAN_PANCTR_PANAR1_Pos (16UL) /*!< CAN PANCTR: PANAR1 (Bit 16) */ +#define CAN_PANCTR_PANAR1_Msk (0xff0000UL) /*!< CAN PANCTR: PANAR1 (Bitfield-Mask: 0xff) */ +#define CAN_PANCTR_PANAR2_Pos (24UL) /*!< CAN PANCTR: PANAR2 (Bit 24) */ +#define CAN_PANCTR_PANAR2_Msk (0xff000000UL) /*!< CAN PANCTR: PANAR2 (Bitfield-Mask: 0xff) */ + +/* ----------------------------------- CAN_MCR ---------------------------------- */ +#define CAN_MCR_CLKSEL_Pos (0UL) /*!< CAN MCR: CLKSEL (Bit 0) */ +#define CAN_MCR_CLKSEL_Msk (0xfUL) /*!< CAN MCR: CLKSEL (Bitfield-Mask: 0x0f) */ +#define CAN_MCR_MPSEL_Pos (12UL) /*!< CAN MCR: MPSEL (Bit 12) */ +#define CAN_MCR_MPSEL_Msk (0xf000UL) /*!< CAN MCR: MPSEL (Bitfield-Mask: 0x0f) */ + +/* ---------------------------------- CAN_MITR ---------------------------------- */ +#define CAN_MITR_IT_Pos (0UL) /*!< CAN MITR: IT (Bit 0) */ +#define CAN_MITR_IT_Msk (0xffUL) /*!< CAN MITR: IT (Bitfield-Mask: 0xff) */ + + +/* ================================================================================ */ +/* ================ Group 'CAN_NODE' Position & Mask ================ */ +/* ================================================================================ */ + + +/* -------------------------------- CAN_NODE_NCR -------------------------------- */ +#define CAN_NODE_NCR_INIT_Pos (0UL) /*!< CAN_NODE NCR: INIT (Bit 0) */ +#define CAN_NODE_NCR_INIT_Msk (0x1UL) /*!< CAN_NODE NCR: INIT (Bitfield-Mask: 0x01) */ +#define CAN_NODE_NCR_TRIE_Pos (1UL) /*!< CAN_NODE NCR: TRIE (Bit 1) */ +#define CAN_NODE_NCR_TRIE_Msk (0x2UL) /*!< CAN_NODE NCR: TRIE (Bitfield-Mask: 0x01) */ +#define CAN_NODE_NCR_LECIE_Pos (2UL) /*!< CAN_NODE NCR: LECIE (Bit 2) */ +#define CAN_NODE_NCR_LECIE_Msk (0x4UL) /*!< CAN_NODE NCR: LECIE (Bitfield-Mask: 0x01) */ +#define CAN_NODE_NCR_ALIE_Pos (3UL) /*!< CAN_NODE NCR: ALIE (Bit 3) */ +#define CAN_NODE_NCR_ALIE_Msk (0x8UL) /*!< CAN_NODE NCR: ALIE (Bitfield-Mask: 0x01) */ +#define CAN_NODE_NCR_CANDIS_Pos (4UL) /*!< CAN_NODE NCR: CANDIS (Bit 4) */ +#define CAN_NODE_NCR_CANDIS_Msk (0x10UL) /*!< CAN_NODE NCR: CANDIS (Bitfield-Mask: 0x01) */ +#define CAN_NODE_NCR_TXDIS_Pos (5UL) /*!< CAN_NODE NCR: TXDIS (Bit 5) */ +#define CAN_NODE_NCR_TXDIS_Msk (0x20UL) /*!< CAN_NODE NCR: TXDIS (Bitfield-Mask: 0x01) */ +#define CAN_NODE_NCR_CCE_Pos (6UL) /*!< CAN_NODE NCR: CCE (Bit 6) */ +#define CAN_NODE_NCR_CCE_Msk (0x40UL) /*!< CAN_NODE NCR: CCE (Bitfield-Mask: 0x01) */ +#define CAN_NODE_NCR_CALM_Pos (7UL) /*!< CAN_NODE NCR: CALM (Bit 7) */ +#define CAN_NODE_NCR_CALM_Msk (0x80UL) /*!< CAN_NODE NCR: CALM (Bitfield-Mask: 0x01) */ + +/* -------------------------------- CAN_NODE_NSR -------------------------------- */ +#define CAN_NODE_NSR_LEC_Pos (0UL) /*!< CAN_NODE NSR: LEC (Bit 0) */ +#define CAN_NODE_NSR_LEC_Msk (0x7UL) /*!< CAN_NODE NSR: LEC (Bitfield-Mask: 0x07) */ +#define CAN_NODE_NSR_TXOK_Pos (3UL) /*!< CAN_NODE NSR: TXOK (Bit 3) */ +#define CAN_NODE_NSR_TXOK_Msk (0x8UL) /*!< CAN_NODE NSR: TXOK (Bitfield-Mask: 0x01) */ +#define CAN_NODE_NSR_RXOK_Pos (4UL) /*!< CAN_NODE NSR: RXOK (Bit 4) */ +#define CAN_NODE_NSR_RXOK_Msk (0x10UL) /*!< CAN_NODE NSR: RXOK (Bitfield-Mask: 0x01) */ +#define CAN_NODE_NSR_ALERT_Pos (5UL) /*!< CAN_NODE NSR: ALERT (Bit 5) */ +#define CAN_NODE_NSR_ALERT_Msk (0x20UL) /*!< CAN_NODE NSR: ALERT (Bitfield-Mask: 0x01) */ +#define CAN_NODE_NSR_EWRN_Pos (6UL) /*!< CAN_NODE NSR: EWRN (Bit 6) */ +#define CAN_NODE_NSR_EWRN_Msk (0x40UL) /*!< CAN_NODE NSR: EWRN (Bitfield-Mask: 0x01) */ +#define CAN_NODE_NSR_BOFF_Pos (7UL) /*!< CAN_NODE NSR: BOFF (Bit 7) */ +#define CAN_NODE_NSR_BOFF_Msk (0x80UL) /*!< CAN_NODE NSR: BOFF (Bitfield-Mask: 0x01) */ +#define CAN_NODE_NSR_LLE_Pos (8UL) /*!< CAN_NODE NSR: LLE (Bit 8) */ +#define CAN_NODE_NSR_LLE_Msk (0x100UL) /*!< CAN_NODE NSR: LLE (Bitfield-Mask: 0x01) */ +#define CAN_NODE_NSR_LOE_Pos (9UL) /*!< CAN_NODE NSR: LOE (Bit 9) */ +#define CAN_NODE_NSR_LOE_Msk (0x200UL) /*!< CAN_NODE NSR: LOE (Bitfield-Mask: 0x01) */ + +/* -------------------------------- CAN_NODE_NIPR ------------------------------- */ +#define CAN_NODE_NIPR_ALINP_Pos (0UL) /*!< CAN_NODE NIPR: ALINP (Bit 0) */ +#define CAN_NODE_NIPR_ALINP_Msk (0xfUL) /*!< CAN_NODE NIPR: ALINP (Bitfield-Mask: 0x0f) */ +#define CAN_NODE_NIPR_LECINP_Pos (4UL) /*!< CAN_NODE NIPR: LECINP (Bit 4) */ +#define CAN_NODE_NIPR_LECINP_Msk (0xf0UL) /*!< CAN_NODE NIPR: LECINP (Bitfield-Mask: 0x0f) */ +#define CAN_NODE_NIPR_TRINP_Pos (8UL) /*!< CAN_NODE NIPR: TRINP (Bit 8) */ +#define CAN_NODE_NIPR_TRINP_Msk (0xf00UL) /*!< CAN_NODE NIPR: TRINP (Bitfield-Mask: 0x0f) */ +#define CAN_NODE_NIPR_CFCINP_Pos (12UL) /*!< CAN_NODE NIPR: CFCINP (Bit 12) */ +#define CAN_NODE_NIPR_CFCINP_Msk (0xf000UL) /*!< CAN_NODE NIPR: CFCINP (Bitfield-Mask: 0x0f) */ + +/* -------------------------------- CAN_NODE_NPCR ------------------------------- */ +#define CAN_NODE_NPCR_RXSEL_Pos (0UL) /*!< CAN_NODE NPCR: RXSEL (Bit 0) */ +#define CAN_NODE_NPCR_RXSEL_Msk (0x7UL) /*!< CAN_NODE NPCR: RXSEL (Bitfield-Mask: 0x07) */ +#define CAN_NODE_NPCR_LBM_Pos (8UL) /*!< CAN_NODE NPCR: LBM (Bit 8) */ +#define CAN_NODE_NPCR_LBM_Msk (0x100UL) /*!< CAN_NODE NPCR: LBM (Bitfield-Mask: 0x01) */ + +/* -------------------------------- CAN_NODE_NBTR ------------------------------- */ +#define CAN_NODE_NBTR_BRP_Pos (0UL) /*!< CAN_NODE NBTR: BRP (Bit 0) */ +#define CAN_NODE_NBTR_BRP_Msk (0x3fUL) /*!< CAN_NODE NBTR: BRP (Bitfield-Mask: 0x3f) */ +#define CAN_NODE_NBTR_SJW_Pos (6UL) /*!< CAN_NODE NBTR: SJW (Bit 6) */ +#define CAN_NODE_NBTR_SJW_Msk (0xc0UL) /*!< CAN_NODE NBTR: SJW (Bitfield-Mask: 0x03) */ +#define CAN_NODE_NBTR_TSEG1_Pos (8UL) /*!< CAN_NODE NBTR: TSEG1 (Bit 8) */ +#define CAN_NODE_NBTR_TSEG1_Msk (0xf00UL) /*!< CAN_NODE NBTR: TSEG1 (Bitfield-Mask: 0x0f) */ +#define CAN_NODE_NBTR_TSEG2_Pos (12UL) /*!< CAN_NODE NBTR: TSEG2 (Bit 12) */ +#define CAN_NODE_NBTR_TSEG2_Msk (0x7000UL) /*!< CAN_NODE NBTR: TSEG2 (Bitfield-Mask: 0x07) */ +#define CAN_NODE_NBTR_DIV8_Pos (15UL) /*!< CAN_NODE NBTR: DIV8 (Bit 15) */ +#define CAN_NODE_NBTR_DIV8_Msk (0x8000UL) /*!< CAN_NODE NBTR: DIV8 (Bitfield-Mask: 0x01) */ + +/* ------------------------------- CAN_NODE_NECNT ------------------------------- */ +#define CAN_NODE_NECNT_REC_Pos (0UL) /*!< CAN_NODE NECNT: REC (Bit 0) */ +#define CAN_NODE_NECNT_REC_Msk (0xffUL) /*!< CAN_NODE NECNT: REC (Bitfield-Mask: 0xff) */ +#define CAN_NODE_NECNT_TEC_Pos (8UL) /*!< CAN_NODE NECNT: TEC (Bit 8) */ +#define CAN_NODE_NECNT_TEC_Msk (0xff00UL) /*!< CAN_NODE NECNT: TEC (Bitfield-Mask: 0xff) */ +#define CAN_NODE_NECNT_EWRNLVL_Pos (16UL) /*!< CAN_NODE NECNT: EWRNLVL (Bit 16) */ +#define CAN_NODE_NECNT_EWRNLVL_Msk (0xff0000UL) /*!< CAN_NODE NECNT: EWRNLVL (Bitfield-Mask: 0xff) */ +#define CAN_NODE_NECNT_LETD_Pos (24UL) /*!< CAN_NODE NECNT: LETD (Bit 24) */ +#define CAN_NODE_NECNT_LETD_Msk (0x1000000UL) /*!< CAN_NODE NECNT: LETD (Bitfield-Mask: 0x01) */ +#define CAN_NODE_NECNT_LEINC_Pos (25UL) /*!< CAN_NODE NECNT: LEINC (Bit 25) */ +#define CAN_NODE_NECNT_LEINC_Msk (0x2000000UL) /*!< CAN_NODE NECNT: LEINC (Bitfield-Mask: 0x01) */ + +/* -------------------------------- CAN_NODE_NFCR ------------------------------- */ +#define CAN_NODE_NFCR_CFC_Pos (0UL) /*!< CAN_NODE NFCR: CFC (Bit 0) */ +#define CAN_NODE_NFCR_CFC_Msk (0xffffUL) /*!< CAN_NODE NFCR: CFC (Bitfield-Mask: 0xffff) */ +#define CAN_NODE_NFCR_CFSEL_Pos (16UL) /*!< CAN_NODE NFCR: CFSEL (Bit 16) */ +#define CAN_NODE_NFCR_CFSEL_Msk (0x70000UL) /*!< CAN_NODE NFCR: CFSEL (Bitfield-Mask: 0x07) */ +#define CAN_NODE_NFCR_CFMOD_Pos (19UL) /*!< CAN_NODE NFCR: CFMOD (Bit 19) */ +#define CAN_NODE_NFCR_CFMOD_Msk (0x180000UL) /*!< CAN_NODE NFCR: CFMOD (Bitfield-Mask: 0x03) */ +#define CAN_NODE_NFCR_CFCIE_Pos (22UL) /*!< CAN_NODE NFCR: CFCIE (Bit 22) */ +#define CAN_NODE_NFCR_CFCIE_Msk (0x400000UL) /*!< CAN_NODE NFCR: CFCIE (Bitfield-Mask: 0x01) */ +#define CAN_NODE_NFCR_CFCOV_Pos (23UL) /*!< CAN_NODE NFCR: CFCOV (Bit 23) */ +#define CAN_NODE_NFCR_CFCOV_Msk (0x800000UL) /*!< CAN_NODE NFCR: CFCOV (Bitfield-Mask: 0x01) */ + + +/* ================================================================================ */ +/* ================ Cluster Group 'CAN_MO' Position & Mask ================ */ +/* ================================================================================ */ + + +/* -------------------------------- CAN_MO_MOFCR -------------------------------- */ +#define CAN_MO_MOFCR_MMC_Pos (0UL) /*!< CAN_MO MOFCR: MMC (Bit 0) */ +#define CAN_MO_MOFCR_MMC_Msk (0xfUL) /*!< CAN_MO MOFCR: MMC (Bitfield-Mask: 0x0f) */ +#define CAN_MO_MOFCR_RXTOE_Pos (4UL) /*!< CAN_MO MOFCR: RXTOE (Bit 4) */ +#define CAN_MO_MOFCR_RXTOE_Msk (0x10UL) /*!< CAN_MO MOFCR: RXTOE (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOFCR_GDFS_Pos (8UL) /*!< CAN_MO MOFCR: GDFS (Bit 8) */ +#define CAN_MO_MOFCR_GDFS_Msk (0x100UL) /*!< CAN_MO MOFCR: GDFS (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOFCR_IDC_Pos (9UL) /*!< CAN_MO MOFCR: IDC (Bit 9) */ +#define CAN_MO_MOFCR_IDC_Msk (0x200UL) /*!< CAN_MO MOFCR: IDC (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOFCR_DLCC_Pos (10UL) /*!< CAN_MO MOFCR: DLCC (Bit 10) */ +#define CAN_MO_MOFCR_DLCC_Msk (0x400UL) /*!< CAN_MO MOFCR: DLCC (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOFCR_DATC_Pos (11UL) /*!< CAN_MO MOFCR: DATC (Bit 11) */ +#define CAN_MO_MOFCR_DATC_Msk (0x800UL) /*!< CAN_MO MOFCR: DATC (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOFCR_RXIE_Pos (16UL) /*!< CAN_MO MOFCR: RXIE (Bit 16) */ +#define CAN_MO_MOFCR_RXIE_Msk (0x10000UL) /*!< CAN_MO MOFCR: RXIE (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOFCR_TXIE_Pos (17UL) /*!< CAN_MO MOFCR: TXIE (Bit 17) */ +#define CAN_MO_MOFCR_TXIE_Msk (0x20000UL) /*!< CAN_MO MOFCR: TXIE (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOFCR_OVIE_Pos (18UL) /*!< CAN_MO MOFCR: OVIE (Bit 18) */ +#define CAN_MO_MOFCR_OVIE_Msk (0x40000UL) /*!< CAN_MO MOFCR: OVIE (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOFCR_FRREN_Pos (20UL) /*!< CAN_MO MOFCR: FRREN (Bit 20) */ +#define CAN_MO_MOFCR_FRREN_Msk (0x100000UL) /*!< CAN_MO MOFCR: FRREN (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOFCR_RMM_Pos (21UL) /*!< CAN_MO MOFCR: RMM (Bit 21) */ +#define CAN_MO_MOFCR_RMM_Msk (0x200000UL) /*!< CAN_MO MOFCR: RMM (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOFCR_SDT_Pos (22UL) /*!< CAN_MO MOFCR: SDT (Bit 22) */ +#define CAN_MO_MOFCR_SDT_Msk (0x400000UL) /*!< CAN_MO MOFCR: SDT (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOFCR_STT_Pos (23UL) /*!< CAN_MO MOFCR: STT (Bit 23) */ +#define CAN_MO_MOFCR_STT_Msk (0x800000UL) /*!< CAN_MO MOFCR: STT (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOFCR_DLC_Pos (24UL) /*!< CAN_MO MOFCR: DLC (Bit 24) */ +#define CAN_MO_MOFCR_DLC_Msk (0xf000000UL) /*!< CAN_MO MOFCR: DLC (Bitfield-Mask: 0x0f) */ + +/* -------------------------------- CAN_MO_MOFGPR ------------------------------- */ +#define CAN_MO_MOFGPR_BOT_Pos (0UL) /*!< CAN_MO MOFGPR: BOT (Bit 0) */ +#define CAN_MO_MOFGPR_BOT_Msk (0xffUL) /*!< CAN_MO MOFGPR: BOT (Bitfield-Mask: 0xff) */ +#define CAN_MO_MOFGPR_TOP_Pos (8UL) /*!< CAN_MO MOFGPR: TOP (Bit 8) */ +#define CAN_MO_MOFGPR_TOP_Msk (0xff00UL) /*!< CAN_MO MOFGPR: TOP (Bitfield-Mask: 0xff) */ +#define CAN_MO_MOFGPR_CUR_Pos (16UL) /*!< CAN_MO MOFGPR: CUR (Bit 16) */ +#define CAN_MO_MOFGPR_CUR_Msk (0xff0000UL) /*!< CAN_MO MOFGPR: CUR (Bitfield-Mask: 0xff) */ +#define CAN_MO_MOFGPR_SEL_Pos (24UL) /*!< CAN_MO MOFGPR: SEL (Bit 24) */ +#define CAN_MO_MOFGPR_SEL_Msk (0xff000000UL) /*!< CAN_MO MOFGPR: SEL (Bitfield-Mask: 0xff) */ + +/* -------------------------------- CAN_MO_MOIPR -------------------------------- */ +#define CAN_MO_MOIPR_RXINP_Pos (0UL) /*!< CAN_MO MOIPR: RXINP (Bit 0) */ +#define CAN_MO_MOIPR_RXINP_Msk (0xfUL) /*!< CAN_MO MOIPR: RXINP (Bitfield-Mask: 0x0f) */ +#define CAN_MO_MOIPR_TXINP_Pos (4UL) /*!< CAN_MO MOIPR: TXINP (Bit 4) */ +#define CAN_MO_MOIPR_TXINP_Msk (0xf0UL) /*!< CAN_MO MOIPR: TXINP (Bitfield-Mask: 0x0f) */ +#define CAN_MO_MOIPR_MPN_Pos (8UL) /*!< CAN_MO MOIPR: MPN (Bit 8) */ +#define CAN_MO_MOIPR_MPN_Msk (0xff00UL) /*!< CAN_MO MOIPR: MPN (Bitfield-Mask: 0xff) */ +#define CAN_MO_MOIPR_CFCVAL_Pos (16UL) /*!< CAN_MO MOIPR: CFCVAL (Bit 16) */ +#define CAN_MO_MOIPR_CFCVAL_Msk (0xffff0000UL) /*!< CAN_MO MOIPR: CFCVAL (Bitfield-Mask: 0xffff) */ + +/* -------------------------------- CAN_MO_MOAMR -------------------------------- */ +#define CAN_MO_MOAMR_AM_Pos (0UL) /*!< CAN_MO MOAMR: AM (Bit 0) */ +#define CAN_MO_MOAMR_AM_Msk (0x1fffffffUL) /*!< CAN_MO MOAMR: AM (Bitfield-Mask: 0x1fffffff) */ +#define CAN_MO_MOAMR_MIDE_Pos (29UL) /*!< CAN_MO MOAMR: MIDE (Bit 29) */ +#define CAN_MO_MOAMR_MIDE_Msk (0x20000000UL) /*!< CAN_MO MOAMR: MIDE (Bitfield-Mask: 0x01) */ + +/* ------------------------------- CAN_MO_MODATAL ------------------------------- */ +#define CAN_MO_MODATAL_DB0_Pos (0UL) /*!< CAN_MO MODATAL: DB0 (Bit 0) */ +#define CAN_MO_MODATAL_DB0_Msk (0xffUL) /*!< CAN_MO MODATAL: DB0 (Bitfield-Mask: 0xff) */ +#define CAN_MO_MODATAL_DB1_Pos (8UL) /*!< CAN_MO MODATAL: DB1 (Bit 8) */ +#define CAN_MO_MODATAL_DB1_Msk (0xff00UL) /*!< CAN_MO MODATAL: DB1 (Bitfield-Mask: 0xff) */ +#define CAN_MO_MODATAL_DB2_Pos (16UL) /*!< CAN_MO MODATAL: DB2 (Bit 16) */ +#define CAN_MO_MODATAL_DB2_Msk (0xff0000UL) /*!< CAN_MO MODATAL: DB2 (Bitfield-Mask: 0xff) */ +#define CAN_MO_MODATAL_DB3_Pos (24UL) /*!< CAN_MO MODATAL: DB3 (Bit 24) */ +#define CAN_MO_MODATAL_DB3_Msk (0xff000000UL) /*!< CAN_MO MODATAL: DB3 (Bitfield-Mask: 0xff) */ + +/* ------------------------------- CAN_MO_MODATAH ------------------------------- */ +#define CAN_MO_MODATAH_DB4_Pos (0UL) /*!< CAN_MO MODATAH: DB4 (Bit 0) */ +#define CAN_MO_MODATAH_DB4_Msk (0xffUL) /*!< CAN_MO MODATAH: DB4 (Bitfield-Mask: 0xff) */ +#define CAN_MO_MODATAH_DB5_Pos (8UL) /*!< CAN_MO MODATAH: DB5 (Bit 8) */ +#define CAN_MO_MODATAH_DB5_Msk (0xff00UL) /*!< CAN_MO MODATAH: DB5 (Bitfield-Mask: 0xff) */ +#define CAN_MO_MODATAH_DB6_Pos (16UL) /*!< CAN_MO MODATAH: DB6 (Bit 16) */ +#define CAN_MO_MODATAH_DB6_Msk (0xff0000UL) /*!< CAN_MO MODATAH: DB6 (Bitfield-Mask: 0xff) */ +#define CAN_MO_MODATAH_DB7_Pos (24UL) /*!< CAN_MO MODATAH: DB7 (Bit 24) */ +#define CAN_MO_MODATAH_DB7_Msk (0xff000000UL) /*!< CAN_MO MODATAH: DB7 (Bitfield-Mask: 0xff) */ + +/* --------------------------------- CAN_MO_MOAR -------------------------------- */ +#define CAN_MO_MOAR_ID_Pos (0UL) /*!< CAN_MO MOAR: ID (Bit 0) */ +#define CAN_MO_MOAR_ID_Msk (0x1fffffffUL) /*!< CAN_MO MOAR: ID (Bitfield-Mask: 0x1fffffff) */ +#define CAN_MO_MOAR_IDE_Pos (29UL) /*!< CAN_MO MOAR: IDE (Bit 29) */ +#define CAN_MO_MOAR_IDE_Msk (0x20000000UL) /*!< CAN_MO MOAR: IDE (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOAR_PRI_Pos (30UL) /*!< CAN_MO MOAR: PRI (Bit 30) */ +#define CAN_MO_MOAR_PRI_Msk (0xc0000000UL) /*!< CAN_MO MOAR: PRI (Bitfield-Mask: 0x03) */ + +/* -------------------------------- CAN_MO_MOCTR -------------------------------- */ +#define CAN_MO_MOCTR_RESRXPND_Pos (0UL) /*!< CAN_MO MOCTR: RESRXPND (Bit 0) */ +#define CAN_MO_MOCTR_RESRXPND_Msk (0x1UL) /*!< CAN_MO MOCTR: RESRXPND (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOCTR_RESTXPND_Pos (1UL) /*!< CAN_MO MOCTR: RESTXPND (Bit 1) */ +#define CAN_MO_MOCTR_RESTXPND_Msk (0x2UL) /*!< CAN_MO MOCTR: RESTXPND (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOCTR_RESRXUPD_Pos (2UL) /*!< CAN_MO MOCTR: RESRXUPD (Bit 2) */ +#define CAN_MO_MOCTR_RESRXUPD_Msk (0x4UL) /*!< CAN_MO MOCTR: RESRXUPD (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOCTR_RESNEWDAT_Pos (3UL) /*!< CAN_MO MOCTR: RESNEWDAT (Bit 3) */ +#define CAN_MO_MOCTR_RESNEWDAT_Msk (0x8UL) /*!< CAN_MO MOCTR: RESNEWDAT (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOCTR_RESMSGLST_Pos (4UL) /*!< CAN_MO MOCTR: RESMSGLST (Bit 4) */ +#define CAN_MO_MOCTR_RESMSGLST_Msk (0x10UL) /*!< CAN_MO MOCTR: RESMSGLST (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOCTR_RESMSGVAL_Pos (5UL) /*!< CAN_MO MOCTR: RESMSGVAL (Bit 5) */ +#define CAN_MO_MOCTR_RESMSGVAL_Msk (0x20UL) /*!< CAN_MO MOCTR: RESMSGVAL (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOCTR_RESRTSEL_Pos (6UL) /*!< CAN_MO MOCTR: RESRTSEL (Bit 6) */ +#define CAN_MO_MOCTR_RESRTSEL_Msk (0x40UL) /*!< CAN_MO MOCTR: RESRTSEL (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOCTR_RESRXEN_Pos (7UL) /*!< CAN_MO MOCTR: RESRXEN (Bit 7) */ +#define CAN_MO_MOCTR_RESRXEN_Msk (0x80UL) /*!< CAN_MO MOCTR: RESRXEN (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOCTR_RESTXRQ_Pos (8UL) /*!< CAN_MO MOCTR: RESTXRQ (Bit 8) */ +#define CAN_MO_MOCTR_RESTXRQ_Msk (0x100UL) /*!< CAN_MO MOCTR: RESTXRQ (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOCTR_RESTXEN0_Pos (9UL) /*!< CAN_MO MOCTR: RESTXEN0 (Bit 9) */ +#define CAN_MO_MOCTR_RESTXEN0_Msk (0x200UL) /*!< CAN_MO MOCTR: RESTXEN0 (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOCTR_RESTXEN1_Pos (10UL) /*!< CAN_MO MOCTR: RESTXEN1 (Bit 10) */ +#define CAN_MO_MOCTR_RESTXEN1_Msk (0x400UL) /*!< CAN_MO MOCTR: RESTXEN1 (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOCTR_RESDIR_Pos (11UL) /*!< CAN_MO MOCTR: RESDIR (Bit 11) */ +#define CAN_MO_MOCTR_RESDIR_Msk (0x800UL) /*!< CAN_MO MOCTR: RESDIR (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOCTR_SETRXPND_Pos (16UL) /*!< CAN_MO MOCTR: SETRXPND (Bit 16) */ +#define CAN_MO_MOCTR_SETRXPND_Msk (0x10000UL) /*!< CAN_MO MOCTR: SETRXPND (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOCTR_SETTXPND_Pos (17UL) /*!< CAN_MO MOCTR: SETTXPND (Bit 17) */ +#define CAN_MO_MOCTR_SETTXPND_Msk (0x20000UL) /*!< CAN_MO MOCTR: SETTXPND (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOCTR_SETRXUPD_Pos (18UL) /*!< CAN_MO MOCTR: SETRXUPD (Bit 18) */ +#define CAN_MO_MOCTR_SETRXUPD_Msk (0x40000UL) /*!< CAN_MO MOCTR: SETRXUPD (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOCTR_SETNEWDAT_Pos (19UL) /*!< CAN_MO MOCTR: SETNEWDAT (Bit 19) */ +#define CAN_MO_MOCTR_SETNEWDAT_Msk (0x80000UL) /*!< CAN_MO MOCTR: SETNEWDAT (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOCTR_SETMSGLST_Pos (20UL) /*!< CAN_MO MOCTR: SETMSGLST (Bit 20) */ +#define CAN_MO_MOCTR_SETMSGLST_Msk (0x100000UL) /*!< CAN_MO MOCTR: SETMSGLST (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOCTR_SETMSGVAL_Pos (21UL) /*!< CAN_MO MOCTR: SETMSGVAL (Bit 21) */ +#define CAN_MO_MOCTR_SETMSGVAL_Msk (0x200000UL) /*!< CAN_MO MOCTR: SETMSGVAL (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOCTR_SETRTSEL_Pos (22UL) /*!< CAN_MO MOCTR: SETRTSEL (Bit 22) */ +#define CAN_MO_MOCTR_SETRTSEL_Msk (0x400000UL) /*!< CAN_MO MOCTR: SETRTSEL (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOCTR_SETRXEN_Pos (23UL) /*!< CAN_MO MOCTR: SETRXEN (Bit 23) */ +#define CAN_MO_MOCTR_SETRXEN_Msk (0x800000UL) /*!< CAN_MO MOCTR: SETRXEN (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOCTR_SETTXRQ_Pos (24UL) /*!< CAN_MO MOCTR: SETTXRQ (Bit 24) */ +#define CAN_MO_MOCTR_SETTXRQ_Msk (0x1000000UL) /*!< CAN_MO MOCTR: SETTXRQ (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOCTR_SETTXEN0_Pos (25UL) /*!< CAN_MO MOCTR: SETTXEN0 (Bit 25) */ +#define CAN_MO_MOCTR_SETTXEN0_Msk (0x2000000UL) /*!< CAN_MO MOCTR: SETTXEN0 (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOCTR_SETTXEN1_Pos (26UL) /*!< CAN_MO MOCTR: SETTXEN1 (Bit 26) */ +#define CAN_MO_MOCTR_SETTXEN1_Msk (0x4000000UL) /*!< CAN_MO MOCTR: SETTXEN1 (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOCTR_SETDIR_Pos (27UL) /*!< CAN_MO MOCTR: SETDIR (Bit 27) */ +#define CAN_MO_MOCTR_SETDIR_Msk (0x8000000UL) /*!< CAN_MO MOCTR: SETDIR (Bitfield-Mask: 0x01) */ + +/* -------------------------------- CAN_MO_MOSTAT ------------------------------- */ +#define CAN_MO_MOSTAT_RXPND_Pos (0UL) /*!< CAN_MO MOSTAT: RXPND (Bit 0) */ +#define CAN_MO_MOSTAT_RXPND_Msk (0x1UL) /*!< CAN_MO MOSTAT: RXPND (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOSTAT_TXPND_Pos (1UL) /*!< CAN_MO MOSTAT: TXPND (Bit 1) */ +#define CAN_MO_MOSTAT_TXPND_Msk (0x2UL) /*!< CAN_MO MOSTAT: TXPND (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOSTAT_RXUPD_Pos (2UL) /*!< CAN_MO MOSTAT: RXUPD (Bit 2) */ +#define CAN_MO_MOSTAT_RXUPD_Msk (0x4UL) /*!< CAN_MO MOSTAT: RXUPD (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOSTAT_NEWDAT_Pos (3UL) /*!< CAN_MO MOSTAT: NEWDAT (Bit 3) */ +#define CAN_MO_MOSTAT_NEWDAT_Msk (0x8UL) /*!< CAN_MO MOSTAT: NEWDAT (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOSTAT_MSGLST_Pos (4UL) /*!< CAN_MO MOSTAT: MSGLST (Bit 4) */ +#define CAN_MO_MOSTAT_MSGLST_Msk (0x10UL) /*!< CAN_MO MOSTAT: MSGLST (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOSTAT_MSGVAL_Pos (5UL) /*!< CAN_MO MOSTAT: MSGVAL (Bit 5) */ +#define CAN_MO_MOSTAT_MSGVAL_Msk (0x20UL) /*!< CAN_MO MOSTAT: MSGVAL (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOSTAT_RTSEL_Pos (6UL) /*!< CAN_MO MOSTAT: RTSEL (Bit 6) */ +#define CAN_MO_MOSTAT_RTSEL_Msk (0x40UL) /*!< CAN_MO MOSTAT: RTSEL (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOSTAT_RXEN_Pos (7UL) /*!< CAN_MO MOSTAT: RXEN (Bit 7) */ +#define CAN_MO_MOSTAT_RXEN_Msk (0x80UL) /*!< CAN_MO MOSTAT: RXEN (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOSTAT_TXRQ_Pos (8UL) /*!< CAN_MO MOSTAT: TXRQ (Bit 8) */ +#define CAN_MO_MOSTAT_TXRQ_Msk (0x100UL) /*!< CAN_MO MOSTAT: TXRQ (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOSTAT_TXEN0_Pos (9UL) /*!< CAN_MO MOSTAT: TXEN0 (Bit 9) */ +#define CAN_MO_MOSTAT_TXEN0_Msk (0x200UL) /*!< CAN_MO MOSTAT: TXEN0 (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOSTAT_TXEN1_Pos (10UL) /*!< CAN_MO MOSTAT: TXEN1 (Bit 10) */ +#define CAN_MO_MOSTAT_TXEN1_Msk (0x400UL) /*!< CAN_MO MOSTAT: TXEN1 (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOSTAT_DIR_Pos (11UL) /*!< CAN_MO MOSTAT: DIR (Bit 11) */ +#define CAN_MO_MOSTAT_DIR_Msk (0x800UL) /*!< CAN_MO MOSTAT: DIR (Bitfield-Mask: 0x01) */ +#define CAN_MO_MOSTAT_LIST_Pos (12UL) /*!< CAN_MO MOSTAT: LIST (Bit 12) */ +#define CAN_MO_MOSTAT_LIST_Msk (0xf000UL) /*!< CAN_MO MOSTAT: LIST (Bitfield-Mask: 0x0f) */ +#define CAN_MO_MOSTAT_PPREV_Pos (16UL) /*!< CAN_MO MOSTAT: PPREV (Bit 16) */ +#define CAN_MO_MOSTAT_PPREV_Msk (0xff0000UL) /*!< CAN_MO MOSTAT: PPREV (Bitfield-Mask: 0xff) */ +#define CAN_MO_MOSTAT_PNEXT_Pos (24UL) /*!< CAN_MO MOSTAT: PNEXT (Bit 24) */ +#define CAN_MO_MOSTAT_PNEXT_Msk (0xff000000UL) /*!< CAN_MO MOSTAT: PNEXT (Bitfield-Mask: 0xff) */ + + +/* ================================================================================ */ +/* ================ struct 'VADC' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ---------------------------------- VADC_CLC ---------------------------------- */ +#define VADC_CLC_DISR_Pos (0UL) /*!< VADC CLC: DISR (Bit 0) */ +#define VADC_CLC_DISR_Msk (0x1UL) /*!< VADC CLC: DISR (Bitfield-Mask: 0x01) */ +#define VADC_CLC_DISS_Pos (1UL) /*!< VADC CLC: DISS (Bit 1) */ +#define VADC_CLC_DISS_Msk (0x2UL) /*!< VADC CLC: DISS (Bitfield-Mask: 0x01) */ +#define VADC_CLC_EDIS_Pos (3UL) /*!< VADC CLC: EDIS (Bit 3) */ +#define VADC_CLC_EDIS_Msk (0x8UL) /*!< VADC CLC: EDIS (Bitfield-Mask: 0x01) */ + +/* ----------------------------------- VADC_ID ---------------------------------- */ +#define VADC_ID_MOD_REV_Pos (0UL) /*!< VADC ID: MOD_REV (Bit 0) */ +#define VADC_ID_MOD_REV_Msk (0xffUL) /*!< VADC ID: MOD_REV (Bitfield-Mask: 0xff) */ +#define VADC_ID_MOD_TYPE_Pos (8UL) /*!< VADC ID: MOD_TYPE (Bit 8) */ +#define VADC_ID_MOD_TYPE_Msk (0xff00UL) /*!< VADC ID: MOD_TYPE (Bitfield-Mask: 0xff) */ +#define VADC_ID_MOD_NUMBER_Pos (16UL) /*!< VADC ID: MOD_NUMBER (Bit 16) */ +#define VADC_ID_MOD_NUMBER_Msk (0xffff0000UL) /*!< VADC ID: MOD_NUMBER (Bitfield-Mask: 0xffff) */ + +/* ---------------------------------- VADC_OCS ---------------------------------- */ +#define VADC_OCS_TGS_Pos (0UL) /*!< VADC OCS: TGS (Bit 0) */ +#define VADC_OCS_TGS_Msk (0x3UL) /*!< VADC OCS: TGS (Bitfield-Mask: 0x03) */ +#define VADC_OCS_TGB_Pos (2UL) /*!< VADC OCS: TGB (Bit 2) */ +#define VADC_OCS_TGB_Msk (0x4UL) /*!< VADC OCS: TGB (Bitfield-Mask: 0x01) */ +#define VADC_OCS_TG_P_Pos (3UL) /*!< VADC OCS: TG_P (Bit 3) */ +#define VADC_OCS_TG_P_Msk (0x8UL) /*!< VADC OCS: TG_P (Bitfield-Mask: 0x01) */ +#define VADC_OCS_SUS_Pos (24UL) /*!< VADC OCS: SUS (Bit 24) */ +#define VADC_OCS_SUS_Msk (0xf000000UL) /*!< VADC OCS: SUS (Bitfield-Mask: 0x0f) */ +#define VADC_OCS_SUS_P_Pos (28UL) /*!< VADC OCS: SUS_P (Bit 28) */ +#define VADC_OCS_SUS_P_Msk (0x10000000UL) /*!< VADC OCS: SUS_P (Bitfield-Mask: 0x01) */ +#define VADC_OCS_SUSSTA_Pos (29UL) /*!< VADC OCS: SUSSTA (Bit 29) */ +#define VADC_OCS_SUSSTA_Msk (0x20000000UL) /*!< VADC OCS: SUSSTA (Bitfield-Mask: 0x01) */ + +/* -------------------------------- VADC_GLOBCFG -------------------------------- */ +#define VADC_GLOBCFG_DIVA_Pos (0UL) /*!< VADC GLOBCFG: DIVA (Bit 0) */ +#define VADC_GLOBCFG_DIVA_Msk (0x1fUL) /*!< VADC GLOBCFG: DIVA (Bitfield-Mask: 0x1f) */ +#define VADC_GLOBCFG_DCMSB_Pos (7UL) /*!< VADC GLOBCFG: DCMSB (Bit 7) */ +#define VADC_GLOBCFG_DCMSB_Msk (0x80UL) /*!< VADC GLOBCFG: DCMSB (Bitfield-Mask: 0x01) */ +#define VADC_GLOBCFG_DIVD_Pos (8UL) /*!< VADC GLOBCFG: DIVD (Bit 8) */ +#define VADC_GLOBCFG_DIVD_Msk (0x300UL) /*!< VADC GLOBCFG: DIVD (Bitfield-Mask: 0x03) */ +#define VADC_GLOBCFG_DIVWC_Pos (15UL) /*!< VADC GLOBCFG: DIVWC (Bit 15) */ +#define VADC_GLOBCFG_DIVWC_Msk (0x8000UL) /*!< VADC GLOBCFG: DIVWC (Bitfield-Mask: 0x01) */ +#define VADC_GLOBCFG_DPCAL0_Pos (16UL) /*!< VADC GLOBCFG: DPCAL0 (Bit 16) */ +#define VADC_GLOBCFG_DPCAL0_Msk (0x10000UL) /*!< VADC GLOBCFG: DPCAL0 (Bitfield-Mask: 0x01) */ +#define VADC_GLOBCFG_DPCAL1_Pos (17UL) /*!< VADC GLOBCFG: DPCAL1 (Bit 17) */ +#define VADC_GLOBCFG_DPCAL1_Msk (0x20000UL) /*!< VADC GLOBCFG: DPCAL1 (Bitfield-Mask: 0x01) */ +#define VADC_GLOBCFG_DPCAL2_Pos (18UL) /*!< VADC GLOBCFG: DPCAL2 (Bit 18) */ +#define VADC_GLOBCFG_DPCAL2_Msk (0x40000UL) /*!< VADC GLOBCFG: DPCAL2 (Bitfield-Mask: 0x01) */ +#define VADC_GLOBCFG_DPCAL3_Pos (19UL) /*!< VADC GLOBCFG: DPCAL3 (Bit 19) */ +#define VADC_GLOBCFG_DPCAL3_Msk (0x80000UL) /*!< VADC GLOBCFG: DPCAL3 (Bitfield-Mask: 0x01) */ +#define VADC_GLOBCFG_SUCAL_Pos (31UL) /*!< VADC GLOBCFG: SUCAL (Bit 31) */ +#define VADC_GLOBCFG_SUCAL_Msk (0x80000000UL) /*!< VADC GLOBCFG: SUCAL (Bitfield-Mask: 0x01) */ + +/* ------------------------------- VADC_GLOBICLASS ------------------------------ */ +#define VADC_GLOBICLASS_STCS_Pos (0UL) /*!< VADC GLOBICLASS: STCS (Bit 0) */ +#define VADC_GLOBICLASS_STCS_Msk (0x1fUL) /*!< VADC GLOBICLASS: STCS (Bitfield-Mask: 0x1f) */ +#define VADC_GLOBICLASS_CMS_Pos (8UL) /*!< VADC GLOBICLASS: CMS (Bit 8) */ +#define VADC_GLOBICLASS_CMS_Msk (0x700UL) /*!< VADC GLOBICLASS: CMS (Bitfield-Mask: 0x07) */ +#define VADC_GLOBICLASS_STCE_Pos (16UL) /*!< VADC GLOBICLASS: STCE (Bit 16) */ +#define VADC_GLOBICLASS_STCE_Msk (0x1f0000UL) /*!< VADC GLOBICLASS: STCE (Bitfield-Mask: 0x1f) */ +#define VADC_GLOBICLASS_CME_Pos (24UL) /*!< VADC GLOBICLASS: CME (Bit 24) */ +#define VADC_GLOBICLASS_CME_Msk (0x7000000UL) /*!< VADC GLOBICLASS: CME (Bitfield-Mask: 0x07) */ + +/* ------------------------------- VADC_GLOBBOUND ------------------------------- */ +#define VADC_GLOBBOUND_BOUNDARY0_Pos (0UL) /*!< VADC GLOBBOUND: BOUNDARY0 (Bit 0) */ +#define VADC_GLOBBOUND_BOUNDARY0_Msk (0xfffUL) /*!< VADC GLOBBOUND: BOUNDARY0 (Bitfield-Mask: 0xfff) */ +#define VADC_GLOBBOUND_BOUNDARY1_Pos (16UL) /*!< VADC GLOBBOUND: BOUNDARY1 (Bit 16) */ +#define VADC_GLOBBOUND_BOUNDARY1_Msk (0xfff0000UL) /*!< VADC GLOBBOUND: BOUNDARY1 (Bitfield-Mask: 0xfff) */ + +/* ------------------------------- VADC_GLOBEFLAG ------------------------------- */ +#define VADC_GLOBEFLAG_SEVGLB_Pos (0UL) /*!< VADC GLOBEFLAG: SEVGLB (Bit 0) */ +#define VADC_GLOBEFLAG_SEVGLB_Msk (0x1UL) /*!< VADC GLOBEFLAG: SEVGLB (Bitfield-Mask: 0x01) */ +#define VADC_GLOBEFLAG_REVGLB_Pos (8UL) /*!< VADC GLOBEFLAG: REVGLB (Bit 8) */ +#define VADC_GLOBEFLAG_REVGLB_Msk (0x100UL) /*!< VADC GLOBEFLAG: REVGLB (Bitfield-Mask: 0x01) */ +#define VADC_GLOBEFLAG_SEVGLBCLR_Pos (16UL) /*!< VADC GLOBEFLAG: SEVGLBCLR (Bit 16) */ +#define VADC_GLOBEFLAG_SEVGLBCLR_Msk (0x10000UL) /*!< VADC GLOBEFLAG: SEVGLBCLR (Bitfield-Mask: 0x01) */ +#define VADC_GLOBEFLAG_REVGLBCLR_Pos (24UL) /*!< VADC GLOBEFLAG: REVGLBCLR (Bit 24) */ +#define VADC_GLOBEFLAG_REVGLBCLR_Msk (0x1000000UL) /*!< VADC GLOBEFLAG: REVGLBCLR (Bitfield-Mask: 0x01) */ + +/* -------------------------------- VADC_GLOBEVNP ------------------------------- */ +#define VADC_GLOBEVNP_SEV0NP_Pos (0UL) /*!< VADC GLOBEVNP: SEV0NP (Bit 0) */ +#define VADC_GLOBEVNP_SEV0NP_Msk (0xfUL) /*!< VADC GLOBEVNP: SEV0NP (Bitfield-Mask: 0x0f) */ +#define VADC_GLOBEVNP_REV0NP_Pos (16UL) /*!< VADC GLOBEVNP: REV0NP (Bit 16) */ +#define VADC_GLOBEVNP_REV0NP_Msk (0xf0000UL) /*!< VADC GLOBEVNP: REV0NP (Bitfield-Mask: 0x0f) */ + +/* --------------------------------- VADC_GLOBTF -------------------------------- */ +#define VADC_GLOBTF_CDGR_Pos (4UL) /*!< VADC GLOBTF: CDGR (Bit 4) */ +#define VADC_GLOBTF_CDGR_Msk (0xf0UL) /*!< VADC GLOBTF: CDGR (Bitfield-Mask: 0x0f) */ +#define VADC_GLOBTF_CDEN_Pos (8UL) /*!< VADC GLOBTF: CDEN (Bit 8) */ +#define VADC_GLOBTF_CDEN_Msk (0x100UL) /*!< VADC GLOBTF: CDEN (Bitfield-Mask: 0x01) */ +#define VADC_GLOBTF_CDSEL_Pos (9UL) /*!< VADC GLOBTF: CDSEL (Bit 9) */ +#define VADC_GLOBTF_CDSEL_Msk (0x600UL) /*!< VADC GLOBTF: CDSEL (Bitfield-Mask: 0x03) */ +#define VADC_GLOBTF_CDWC_Pos (15UL) /*!< VADC GLOBTF: CDWC (Bit 15) */ +#define VADC_GLOBTF_CDWC_Msk (0x8000UL) /*!< VADC GLOBTF: CDWC (Bitfield-Mask: 0x01) */ +#define VADC_GLOBTF_PDD_Pos (16UL) /*!< VADC GLOBTF: PDD (Bit 16) */ +#define VADC_GLOBTF_PDD_Msk (0x10000UL) /*!< VADC GLOBTF: PDD (Bitfield-Mask: 0x01) */ +#define VADC_GLOBTF_MDWC_Pos (23UL) /*!< VADC GLOBTF: MDWC (Bit 23) */ +#define VADC_GLOBTF_MDWC_Msk (0x800000UL) /*!< VADC GLOBTF: MDWC (Bitfield-Mask: 0x01) */ + +/* --------------------------------- VADC_BRSSEL -------------------------------- */ +#define VADC_BRSSEL_CHSELG0_Pos (0UL) /*!< VADC BRSSEL: CHSELG0 (Bit 0) */ +#define VADC_BRSSEL_CHSELG0_Msk (0x1UL) /*!< VADC BRSSEL: CHSELG0 (Bitfield-Mask: 0x01) */ +#define VADC_BRSSEL_CHSELG1_Pos (1UL) /*!< VADC BRSSEL: CHSELG1 (Bit 1) */ +#define VADC_BRSSEL_CHSELG1_Msk (0x2UL) /*!< VADC BRSSEL: CHSELG1 (Bitfield-Mask: 0x01) */ +#define VADC_BRSSEL_CHSELG2_Pos (2UL) /*!< VADC BRSSEL: CHSELG2 (Bit 2) */ +#define VADC_BRSSEL_CHSELG2_Msk (0x4UL) /*!< VADC BRSSEL: CHSELG2 (Bitfield-Mask: 0x01) */ +#define VADC_BRSSEL_CHSELG3_Pos (3UL) /*!< VADC BRSSEL: CHSELG3 (Bit 3) */ +#define VADC_BRSSEL_CHSELG3_Msk (0x8UL) /*!< VADC BRSSEL: CHSELG3 (Bitfield-Mask: 0x01) */ +#define VADC_BRSSEL_CHSELG4_Pos (4UL) /*!< VADC BRSSEL: CHSELG4 (Bit 4) */ +#define VADC_BRSSEL_CHSELG4_Msk (0x10UL) /*!< VADC BRSSEL: CHSELG4 (Bitfield-Mask: 0x01) */ +#define VADC_BRSSEL_CHSELG5_Pos (5UL) /*!< VADC BRSSEL: CHSELG5 (Bit 5) */ +#define VADC_BRSSEL_CHSELG5_Msk (0x20UL) /*!< VADC BRSSEL: CHSELG5 (Bitfield-Mask: 0x01) */ +#define VADC_BRSSEL_CHSELG6_Pos (6UL) /*!< VADC BRSSEL: CHSELG6 (Bit 6) */ +#define VADC_BRSSEL_CHSELG6_Msk (0x40UL) /*!< VADC BRSSEL: CHSELG6 (Bitfield-Mask: 0x01) */ +#define VADC_BRSSEL_CHSELG7_Pos (7UL) /*!< VADC BRSSEL: CHSELG7 (Bit 7) */ +#define VADC_BRSSEL_CHSELG7_Msk (0x80UL) /*!< VADC BRSSEL: CHSELG7 (Bitfield-Mask: 0x01) */ + +/* --------------------------------- VADC_BRSPND -------------------------------- */ +#define VADC_BRSPND_CHPNDG0_Pos (0UL) /*!< VADC BRSPND: CHPNDG0 (Bit 0) */ +#define VADC_BRSPND_CHPNDG0_Msk (0x1UL) /*!< VADC BRSPND: CHPNDG0 (Bitfield-Mask: 0x01) */ +#define VADC_BRSPND_CHPNDG1_Pos (1UL) /*!< VADC BRSPND: CHPNDG1 (Bit 1) */ +#define VADC_BRSPND_CHPNDG1_Msk (0x2UL) /*!< VADC BRSPND: CHPNDG1 (Bitfield-Mask: 0x01) */ +#define VADC_BRSPND_CHPNDG2_Pos (2UL) /*!< VADC BRSPND: CHPNDG2 (Bit 2) */ +#define VADC_BRSPND_CHPNDG2_Msk (0x4UL) /*!< VADC BRSPND: CHPNDG2 (Bitfield-Mask: 0x01) */ +#define VADC_BRSPND_CHPNDG3_Pos (3UL) /*!< VADC BRSPND: CHPNDG3 (Bit 3) */ +#define VADC_BRSPND_CHPNDG3_Msk (0x8UL) /*!< VADC BRSPND: CHPNDG3 (Bitfield-Mask: 0x01) */ +#define VADC_BRSPND_CHPNDG4_Pos (4UL) /*!< VADC BRSPND: CHPNDG4 (Bit 4) */ +#define VADC_BRSPND_CHPNDG4_Msk (0x10UL) /*!< VADC BRSPND: CHPNDG4 (Bitfield-Mask: 0x01) */ +#define VADC_BRSPND_CHPNDG5_Pos (5UL) /*!< VADC BRSPND: CHPNDG5 (Bit 5) */ +#define VADC_BRSPND_CHPNDG5_Msk (0x20UL) /*!< VADC BRSPND: CHPNDG5 (Bitfield-Mask: 0x01) */ +#define VADC_BRSPND_CHPNDG6_Pos (6UL) /*!< VADC BRSPND: CHPNDG6 (Bit 6) */ +#define VADC_BRSPND_CHPNDG6_Msk (0x40UL) /*!< VADC BRSPND: CHPNDG6 (Bitfield-Mask: 0x01) */ +#define VADC_BRSPND_CHPNDG7_Pos (7UL) /*!< VADC BRSPND: CHPNDG7 (Bit 7) */ +#define VADC_BRSPND_CHPNDG7_Msk (0x80UL) /*!< VADC BRSPND: CHPNDG7 (Bitfield-Mask: 0x01) */ + +/* -------------------------------- VADC_BRSCTRL -------------------------------- */ +#define VADC_BRSCTRL_SRCRESREG_Pos (0UL) /*!< VADC BRSCTRL: SRCRESREG (Bit 0) */ +#define VADC_BRSCTRL_SRCRESREG_Msk (0xfUL) /*!< VADC BRSCTRL: SRCRESREG (Bitfield-Mask: 0x0f) */ +#define VADC_BRSCTRL_XTSEL_Pos (8UL) /*!< VADC BRSCTRL: XTSEL (Bit 8) */ +#define VADC_BRSCTRL_XTSEL_Msk (0xf00UL) /*!< VADC BRSCTRL: XTSEL (Bitfield-Mask: 0x0f) */ +#define VADC_BRSCTRL_XTLVL_Pos (12UL) /*!< VADC BRSCTRL: XTLVL (Bit 12) */ +#define VADC_BRSCTRL_XTLVL_Msk (0x1000UL) /*!< VADC BRSCTRL: XTLVL (Bitfield-Mask: 0x01) */ +#define VADC_BRSCTRL_XTMODE_Pos (13UL) /*!< VADC BRSCTRL: XTMODE (Bit 13) */ +#define VADC_BRSCTRL_XTMODE_Msk (0x6000UL) /*!< VADC BRSCTRL: XTMODE (Bitfield-Mask: 0x03) */ +#define VADC_BRSCTRL_XTWC_Pos (15UL) /*!< VADC BRSCTRL: XTWC (Bit 15) */ +#define VADC_BRSCTRL_XTWC_Msk (0x8000UL) /*!< VADC BRSCTRL: XTWC (Bitfield-Mask: 0x01) */ +#define VADC_BRSCTRL_GTSEL_Pos (16UL) /*!< VADC BRSCTRL: GTSEL (Bit 16) */ +#define VADC_BRSCTRL_GTSEL_Msk (0xf0000UL) /*!< VADC BRSCTRL: GTSEL (Bitfield-Mask: 0x0f) */ +#define VADC_BRSCTRL_GTLVL_Pos (20UL) /*!< VADC BRSCTRL: GTLVL (Bit 20) */ +#define VADC_BRSCTRL_GTLVL_Msk (0x100000UL) /*!< VADC BRSCTRL: GTLVL (Bitfield-Mask: 0x01) */ +#define VADC_BRSCTRL_GTWC_Pos (23UL) /*!< VADC BRSCTRL: GTWC (Bit 23) */ +#define VADC_BRSCTRL_GTWC_Msk (0x800000UL) /*!< VADC BRSCTRL: GTWC (Bitfield-Mask: 0x01) */ + +/* --------------------------------- VADC_BRSMR --------------------------------- */ +#define VADC_BRSMR_ENGT_Pos (0UL) /*!< VADC BRSMR: ENGT (Bit 0) */ +#define VADC_BRSMR_ENGT_Msk (0x3UL) /*!< VADC BRSMR: ENGT (Bitfield-Mask: 0x03) */ +#define VADC_BRSMR_ENTR_Pos (2UL) /*!< VADC BRSMR: ENTR (Bit 2) */ +#define VADC_BRSMR_ENTR_Msk (0x4UL) /*!< VADC BRSMR: ENTR (Bitfield-Mask: 0x01) */ +#define VADC_BRSMR_ENSI_Pos (3UL) /*!< VADC BRSMR: ENSI (Bit 3) */ +#define VADC_BRSMR_ENSI_Msk (0x8UL) /*!< VADC BRSMR: ENSI (Bitfield-Mask: 0x01) */ +#define VADC_BRSMR_SCAN_Pos (4UL) /*!< VADC BRSMR: SCAN (Bit 4) */ +#define VADC_BRSMR_SCAN_Msk (0x10UL) /*!< VADC BRSMR: SCAN (Bitfield-Mask: 0x01) */ +#define VADC_BRSMR_LDM_Pos (5UL) /*!< VADC BRSMR: LDM (Bit 5) */ +#define VADC_BRSMR_LDM_Msk (0x20UL) /*!< VADC BRSMR: LDM (Bitfield-Mask: 0x01) */ +#define VADC_BRSMR_REQGT_Pos (7UL) /*!< VADC BRSMR: REQGT (Bit 7) */ +#define VADC_BRSMR_REQGT_Msk (0x80UL) /*!< VADC BRSMR: REQGT (Bitfield-Mask: 0x01) */ +#define VADC_BRSMR_CLRPND_Pos (8UL) /*!< VADC BRSMR: CLRPND (Bit 8) */ +#define VADC_BRSMR_CLRPND_Msk (0x100UL) /*!< VADC BRSMR: CLRPND (Bitfield-Mask: 0x01) */ +#define VADC_BRSMR_LDEV_Pos (9UL) /*!< VADC BRSMR: LDEV (Bit 9) */ +#define VADC_BRSMR_LDEV_Msk (0x200UL) /*!< VADC BRSMR: LDEV (Bitfield-Mask: 0x01) */ +#define VADC_BRSMR_RPTDIS_Pos (16UL) /*!< VADC BRSMR: RPTDIS (Bit 16) */ +#define VADC_BRSMR_RPTDIS_Msk (0x10000UL) /*!< VADC BRSMR: RPTDIS (Bitfield-Mask: 0x01) */ + +/* -------------------------------- VADC_GLOBRCR -------------------------------- */ +#define VADC_GLOBRCR_DRCTR_Pos (16UL) /*!< VADC GLOBRCR: DRCTR (Bit 16) */ +#define VADC_GLOBRCR_DRCTR_Msk (0xf0000UL) /*!< VADC GLOBRCR: DRCTR (Bitfield-Mask: 0x0f) */ +#define VADC_GLOBRCR_WFR_Pos (24UL) /*!< VADC GLOBRCR: WFR (Bit 24) */ +#define VADC_GLOBRCR_WFR_Msk (0x1000000UL) /*!< VADC GLOBRCR: WFR (Bitfield-Mask: 0x01) */ +#define VADC_GLOBRCR_SRGEN_Pos (31UL) /*!< VADC GLOBRCR: SRGEN (Bit 31) */ +#define VADC_GLOBRCR_SRGEN_Msk (0x80000000UL) /*!< VADC GLOBRCR: SRGEN (Bitfield-Mask: 0x01) */ + +/* -------------------------------- VADC_GLOBRES -------------------------------- */ +#define VADC_GLOBRES_RESULT_Pos (0UL) /*!< VADC GLOBRES: RESULT (Bit 0) */ +#define VADC_GLOBRES_RESULT_Msk (0xffffUL) /*!< VADC GLOBRES: RESULT (Bitfield-Mask: 0xffff) */ +#define VADC_GLOBRES_GNR_Pos (16UL) /*!< VADC GLOBRES: GNR (Bit 16) */ +#define VADC_GLOBRES_GNR_Msk (0xf0000UL) /*!< VADC GLOBRES: GNR (Bitfield-Mask: 0x0f) */ +#define VADC_GLOBRES_CHNR_Pos (20UL) /*!< VADC GLOBRES: CHNR (Bit 20) */ +#define VADC_GLOBRES_CHNR_Msk (0x1f00000UL) /*!< VADC GLOBRES: CHNR (Bitfield-Mask: 0x1f) */ +#define VADC_GLOBRES_EMUX_Pos (25UL) /*!< VADC GLOBRES: EMUX (Bit 25) */ +#define VADC_GLOBRES_EMUX_Msk (0xe000000UL) /*!< VADC GLOBRES: EMUX (Bitfield-Mask: 0x07) */ +#define VADC_GLOBRES_CRS_Pos (28UL) /*!< VADC GLOBRES: CRS (Bit 28) */ +#define VADC_GLOBRES_CRS_Msk (0x30000000UL) /*!< VADC GLOBRES: CRS (Bitfield-Mask: 0x03) */ +#define VADC_GLOBRES_FCR_Pos (30UL) /*!< VADC GLOBRES: FCR (Bit 30) */ +#define VADC_GLOBRES_FCR_Msk (0x40000000UL) /*!< VADC GLOBRES: FCR (Bitfield-Mask: 0x01) */ +#define VADC_GLOBRES_VF_Pos (31UL) /*!< VADC GLOBRES: VF (Bit 31) */ +#define VADC_GLOBRES_VF_Msk (0x80000000UL) /*!< VADC GLOBRES: VF (Bitfield-Mask: 0x01) */ + +/* -------------------------------- VADC_GLOBRESD ------------------------------- */ +#define VADC_GLOBRESD_RESULT_Pos (0UL) /*!< VADC GLOBRESD: RESULT (Bit 0) */ +#define VADC_GLOBRESD_RESULT_Msk (0xffffUL) /*!< VADC GLOBRESD: RESULT (Bitfield-Mask: 0xffff) */ +#define VADC_GLOBRESD_GNR_Pos (16UL) /*!< VADC GLOBRESD: GNR (Bit 16) */ +#define VADC_GLOBRESD_GNR_Msk (0xf0000UL) /*!< VADC GLOBRESD: GNR (Bitfield-Mask: 0x0f) */ +#define VADC_GLOBRESD_CHNR_Pos (20UL) /*!< VADC GLOBRESD: CHNR (Bit 20) */ +#define VADC_GLOBRESD_CHNR_Msk (0x1f00000UL) /*!< VADC GLOBRESD: CHNR (Bitfield-Mask: 0x1f) */ +#define VADC_GLOBRESD_EMUX_Pos (25UL) /*!< VADC GLOBRESD: EMUX (Bit 25) */ +#define VADC_GLOBRESD_EMUX_Msk (0xe000000UL) /*!< VADC GLOBRESD: EMUX (Bitfield-Mask: 0x07) */ +#define VADC_GLOBRESD_CRS_Pos (28UL) /*!< VADC GLOBRESD: CRS (Bit 28) */ +#define VADC_GLOBRESD_CRS_Msk (0x30000000UL) /*!< VADC GLOBRESD: CRS (Bitfield-Mask: 0x03) */ +#define VADC_GLOBRESD_FCR_Pos (30UL) /*!< VADC GLOBRESD: FCR (Bit 30) */ +#define VADC_GLOBRESD_FCR_Msk (0x40000000UL) /*!< VADC GLOBRESD: FCR (Bitfield-Mask: 0x01) */ +#define VADC_GLOBRESD_VF_Pos (31UL) /*!< VADC GLOBRESD: VF (Bit 31) */ +#define VADC_GLOBRESD_VF_Msk (0x80000000UL) /*!< VADC GLOBRESD: VF (Bitfield-Mask: 0x01) */ + +/* -------------------------------- VADC_EMUXSEL -------------------------------- */ +#define VADC_EMUXSEL_EMUXGRP0_Pos (0UL) /*!< VADC EMUXSEL: EMUXGRP0 (Bit 0) */ +#define VADC_EMUXSEL_EMUXGRP0_Msk (0xfUL) /*!< VADC EMUXSEL: EMUXGRP0 (Bitfield-Mask: 0x0f) */ +#define VADC_EMUXSEL_EMUXGRP1_Pos (4UL) /*!< VADC EMUXSEL: EMUXGRP1 (Bit 4) */ +#define VADC_EMUXSEL_EMUXGRP1_Msk (0xf0UL) /*!< VADC EMUXSEL: EMUXGRP1 (Bitfield-Mask: 0x0f) */ + + +/* ================================================================================ */ +/* ================ Group 'VADC_G' Position & Mask ================ */ +/* ================================================================================ */ + + +/* -------------------------------- VADC_G_ARBCFG ------------------------------- */ +#define VADC_G_ARBCFG_ANONC_Pos (0UL) /*!< VADC_G ARBCFG: ANONC (Bit 0) */ +#define VADC_G_ARBCFG_ANONC_Msk (0x3UL) /*!< VADC_G ARBCFG: ANONC (Bitfield-Mask: 0x03) */ +#define VADC_G_ARBCFG_ARBRND_Pos (4UL) /*!< VADC_G ARBCFG: ARBRND (Bit 4) */ +#define VADC_G_ARBCFG_ARBRND_Msk (0x30UL) /*!< VADC_G ARBCFG: ARBRND (Bitfield-Mask: 0x03) */ +#define VADC_G_ARBCFG_ARBM_Pos (7UL) /*!< VADC_G ARBCFG: ARBM (Bit 7) */ +#define VADC_G_ARBCFG_ARBM_Msk (0x80UL) /*!< VADC_G ARBCFG: ARBM (Bitfield-Mask: 0x01) */ +#define VADC_G_ARBCFG_ANONS_Pos (16UL) /*!< VADC_G ARBCFG: ANONS (Bit 16) */ +#define VADC_G_ARBCFG_ANONS_Msk (0x30000UL) /*!< VADC_G ARBCFG: ANONS (Bitfield-Mask: 0x03) */ +#define VADC_G_ARBCFG_CAL_Pos (28UL) /*!< VADC_G ARBCFG: CAL (Bit 28) */ +#define VADC_G_ARBCFG_CAL_Msk (0x10000000UL) /*!< VADC_G ARBCFG: CAL (Bitfield-Mask: 0x01) */ +#define VADC_G_ARBCFG_BUSY_Pos (30UL) /*!< VADC_G ARBCFG: BUSY (Bit 30) */ +#define VADC_G_ARBCFG_BUSY_Msk (0x40000000UL) /*!< VADC_G ARBCFG: BUSY (Bitfield-Mask: 0x01) */ +#define VADC_G_ARBCFG_SAMPLE_Pos (31UL) /*!< VADC_G ARBCFG: SAMPLE (Bit 31) */ +#define VADC_G_ARBCFG_SAMPLE_Msk (0x80000000UL) /*!< VADC_G ARBCFG: SAMPLE (Bitfield-Mask: 0x01) */ + +/* -------------------------------- VADC_G_ARBPR -------------------------------- */ +#define VADC_G_ARBPR_PRIO0_Pos (0UL) /*!< VADC_G ARBPR: PRIO0 (Bit 0) */ +#define VADC_G_ARBPR_PRIO0_Msk (0x3UL) /*!< VADC_G ARBPR: PRIO0 (Bitfield-Mask: 0x03) */ +#define VADC_G_ARBPR_CSM0_Pos (3UL) /*!< VADC_G ARBPR: CSM0 (Bit 3) */ +#define VADC_G_ARBPR_CSM0_Msk (0x8UL) /*!< VADC_G ARBPR: CSM0 (Bitfield-Mask: 0x01) */ +#define VADC_G_ARBPR_PRIO1_Pos (4UL) /*!< VADC_G ARBPR: PRIO1 (Bit 4) */ +#define VADC_G_ARBPR_PRIO1_Msk (0x30UL) /*!< VADC_G ARBPR: PRIO1 (Bitfield-Mask: 0x03) */ +#define VADC_G_ARBPR_CSM1_Pos (7UL) /*!< VADC_G ARBPR: CSM1 (Bit 7) */ +#define VADC_G_ARBPR_CSM1_Msk (0x80UL) /*!< VADC_G ARBPR: CSM1 (Bitfield-Mask: 0x01) */ +#define VADC_G_ARBPR_PRIO2_Pos (8UL) /*!< VADC_G ARBPR: PRIO2 (Bit 8) */ +#define VADC_G_ARBPR_PRIO2_Msk (0x300UL) /*!< VADC_G ARBPR: PRIO2 (Bitfield-Mask: 0x03) */ +#define VADC_G_ARBPR_CSM2_Pos (11UL) /*!< VADC_G ARBPR: CSM2 (Bit 11) */ +#define VADC_G_ARBPR_CSM2_Msk (0x800UL) /*!< VADC_G ARBPR: CSM2 (Bitfield-Mask: 0x01) */ +#define VADC_G_ARBPR_ASEN0_Pos (24UL) /*!< VADC_G ARBPR: ASEN0 (Bit 24) */ +#define VADC_G_ARBPR_ASEN0_Msk (0x1000000UL) /*!< VADC_G ARBPR: ASEN0 (Bitfield-Mask: 0x01) */ +#define VADC_G_ARBPR_ASEN1_Pos (25UL) /*!< VADC_G ARBPR: ASEN1 (Bit 25) */ +#define VADC_G_ARBPR_ASEN1_Msk (0x2000000UL) /*!< VADC_G ARBPR: ASEN1 (Bitfield-Mask: 0x01) */ +#define VADC_G_ARBPR_ASEN2_Pos (26UL) /*!< VADC_G ARBPR: ASEN2 (Bit 26) */ +#define VADC_G_ARBPR_ASEN2_Msk (0x4000000UL) /*!< VADC_G ARBPR: ASEN2 (Bitfield-Mask: 0x01) */ + +/* -------------------------------- VADC_G_CHASS -------------------------------- */ +#define VADC_G_CHASS_ASSCH0_Pos (0UL) /*!< VADC_G CHASS: ASSCH0 (Bit 0) */ +#define VADC_G_CHASS_ASSCH0_Msk (0x1UL) /*!< VADC_G CHASS: ASSCH0 (Bitfield-Mask: 0x01) */ +#define VADC_G_CHASS_ASSCH1_Pos (1UL) /*!< VADC_G CHASS: ASSCH1 (Bit 1) */ +#define VADC_G_CHASS_ASSCH1_Msk (0x2UL) /*!< VADC_G CHASS: ASSCH1 (Bitfield-Mask: 0x01) */ +#define VADC_G_CHASS_ASSCH2_Pos (2UL) /*!< VADC_G CHASS: ASSCH2 (Bit 2) */ +#define VADC_G_CHASS_ASSCH2_Msk (0x4UL) /*!< VADC_G CHASS: ASSCH2 (Bitfield-Mask: 0x01) */ +#define VADC_G_CHASS_ASSCH3_Pos (3UL) /*!< VADC_G CHASS: ASSCH3 (Bit 3) */ +#define VADC_G_CHASS_ASSCH3_Msk (0x8UL) /*!< VADC_G CHASS: ASSCH3 (Bitfield-Mask: 0x01) */ +#define VADC_G_CHASS_ASSCH4_Pos (4UL) /*!< VADC_G CHASS: ASSCH4 (Bit 4) */ +#define VADC_G_CHASS_ASSCH4_Msk (0x10UL) /*!< VADC_G CHASS: ASSCH4 (Bitfield-Mask: 0x01) */ +#define VADC_G_CHASS_ASSCH5_Pos (5UL) /*!< VADC_G CHASS: ASSCH5 (Bit 5) */ +#define VADC_G_CHASS_ASSCH5_Msk (0x20UL) /*!< VADC_G CHASS: ASSCH5 (Bitfield-Mask: 0x01) */ +#define VADC_G_CHASS_ASSCH6_Pos (6UL) /*!< VADC_G CHASS: ASSCH6 (Bit 6) */ +#define VADC_G_CHASS_ASSCH6_Msk (0x40UL) /*!< VADC_G CHASS: ASSCH6 (Bitfield-Mask: 0x01) */ +#define VADC_G_CHASS_ASSCH7_Pos (7UL) /*!< VADC_G CHASS: ASSCH7 (Bit 7) */ +#define VADC_G_CHASS_ASSCH7_Msk (0x80UL) /*!< VADC_G CHASS: ASSCH7 (Bitfield-Mask: 0x01) */ + +/* -------------------------------- VADC_G_ICLASS ------------------------------- */ +#define VADC_G_ICLASS_STCS_Pos (0UL) /*!< VADC_G ICLASS: STCS (Bit 0) */ +#define VADC_G_ICLASS_STCS_Msk (0x1fUL) /*!< VADC_G ICLASS: STCS (Bitfield-Mask: 0x1f) */ +#define VADC_G_ICLASS_CMS_Pos (8UL) /*!< VADC_G ICLASS: CMS (Bit 8) */ +#define VADC_G_ICLASS_CMS_Msk (0x700UL) /*!< VADC_G ICLASS: CMS (Bitfield-Mask: 0x07) */ +#define VADC_G_ICLASS_STCE_Pos (16UL) /*!< VADC_G ICLASS: STCE (Bit 16) */ +#define VADC_G_ICLASS_STCE_Msk (0x1f0000UL) /*!< VADC_G ICLASS: STCE (Bitfield-Mask: 0x1f) */ +#define VADC_G_ICLASS_CME_Pos (24UL) /*!< VADC_G ICLASS: CME (Bit 24) */ +#define VADC_G_ICLASS_CME_Msk (0x7000000UL) /*!< VADC_G ICLASS: CME (Bitfield-Mask: 0x07) */ + +/* -------------------------------- VADC_G_ALIAS -------------------------------- */ +#define VADC_G_ALIAS_ALIAS0_Pos (0UL) /*!< VADC_G ALIAS: ALIAS0 (Bit 0) */ +#define VADC_G_ALIAS_ALIAS0_Msk (0x1fUL) /*!< VADC_G ALIAS: ALIAS0 (Bitfield-Mask: 0x1f) */ +#define VADC_G_ALIAS_ALIAS1_Pos (8UL) /*!< VADC_G ALIAS: ALIAS1 (Bit 8) */ +#define VADC_G_ALIAS_ALIAS1_Msk (0x1f00UL) /*!< VADC_G ALIAS: ALIAS1 (Bitfield-Mask: 0x1f) */ + +/* -------------------------------- VADC_G_BOUND -------------------------------- */ +#define VADC_G_BOUND_BOUNDARY0_Pos (0UL) /*!< VADC_G BOUND: BOUNDARY0 (Bit 0) */ +#define VADC_G_BOUND_BOUNDARY0_Msk (0xfffUL) /*!< VADC_G BOUND: BOUNDARY0 (Bitfield-Mask: 0xfff) */ +#define VADC_G_BOUND_BOUNDARY1_Pos (16UL) /*!< VADC_G BOUND: BOUNDARY1 (Bit 16) */ +#define VADC_G_BOUND_BOUNDARY1_Msk (0xfff0000UL) /*!< VADC_G BOUND: BOUNDARY1 (Bitfield-Mask: 0xfff) */ + +/* -------------------------------- VADC_G_SYNCTR ------------------------------- */ +#define VADC_G_SYNCTR_STSEL_Pos (0UL) /*!< VADC_G SYNCTR: STSEL (Bit 0) */ +#define VADC_G_SYNCTR_STSEL_Msk (0x3UL) /*!< VADC_G SYNCTR: STSEL (Bitfield-Mask: 0x03) */ +#define VADC_G_SYNCTR_EVALR1_Pos (4UL) /*!< VADC_G SYNCTR: EVALR1 (Bit 4) */ +#define VADC_G_SYNCTR_EVALR1_Msk (0x10UL) /*!< VADC_G SYNCTR: EVALR1 (Bitfield-Mask: 0x01) */ +#define VADC_G_SYNCTR_EVALR2_Pos (5UL) /*!< VADC_G SYNCTR: EVALR2 (Bit 5) */ +#define VADC_G_SYNCTR_EVALR2_Msk (0x20UL) /*!< VADC_G SYNCTR: EVALR2 (Bitfield-Mask: 0x01) */ +#define VADC_G_SYNCTR_EVALR3_Pos (6UL) /*!< VADC_G SYNCTR: EVALR3 (Bit 6) */ +#define VADC_G_SYNCTR_EVALR3_Msk (0x40UL) /*!< VADC_G SYNCTR: EVALR3 (Bitfield-Mask: 0x01) */ + +/* --------------------------------- VADC_G_BFL --------------------------------- */ +#define VADC_G_BFL_BFL0_Pos (0UL) /*!< VADC_G BFL: BFL0 (Bit 0) */ +#define VADC_G_BFL_BFL0_Msk (0x1UL) /*!< VADC_G BFL: BFL0 (Bitfield-Mask: 0x01) */ +#define VADC_G_BFL_BFL1_Pos (1UL) /*!< VADC_G BFL: BFL1 (Bit 1) */ +#define VADC_G_BFL_BFL1_Msk (0x2UL) /*!< VADC_G BFL: BFL1 (Bitfield-Mask: 0x01) */ +#define VADC_G_BFL_BFL2_Pos (2UL) /*!< VADC_G BFL: BFL2 (Bit 2) */ +#define VADC_G_BFL_BFL2_Msk (0x4UL) /*!< VADC_G BFL: BFL2 (Bitfield-Mask: 0x01) */ +#define VADC_G_BFL_BFL3_Pos (3UL) /*!< VADC_G BFL: BFL3 (Bit 3) */ +#define VADC_G_BFL_BFL3_Msk (0x8UL) /*!< VADC_G BFL: BFL3 (Bitfield-Mask: 0x01) */ +#define VADC_G_BFL_BFA0_Pos (8UL) /*!< VADC_G BFL: BFA0 (Bit 8) */ +#define VADC_G_BFL_BFA0_Msk (0x100UL) /*!< VADC_G BFL: BFA0 (Bitfield-Mask: 0x01) */ +#define VADC_G_BFL_BFA1_Pos (9UL) /*!< VADC_G BFL: BFA1 (Bit 9) */ +#define VADC_G_BFL_BFA1_Msk (0x200UL) /*!< VADC_G BFL: BFA1 (Bitfield-Mask: 0x01) */ +#define VADC_G_BFL_BFA2_Pos (10UL) /*!< VADC_G BFL: BFA2 (Bit 10) */ +#define VADC_G_BFL_BFA2_Msk (0x400UL) /*!< VADC_G BFL: BFA2 (Bitfield-Mask: 0x01) */ +#define VADC_G_BFL_BFA3_Pos (11UL) /*!< VADC_G BFL: BFA3 (Bit 11) */ +#define VADC_G_BFL_BFA3_Msk (0x800UL) /*!< VADC_G BFL: BFA3 (Bitfield-Mask: 0x01) */ +#define VADC_G_BFL_BFI0_Pos (16UL) /*!< VADC_G BFL: BFI0 (Bit 16) */ +#define VADC_G_BFL_BFI0_Msk (0x10000UL) /*!< VADC_G BFL: BFI0 (Bitfield-Mask: 0x01) */ +#define VADC_G_BFL_BFI1_Pos (17UL) /*!< VADC_G BFL: BFI1 (Bit 17) */ +#define VADC_G_BFL_BFI1_Msk (0x20000UL) /*!< VADC_G BFL: BFI1 (Bitfield-Mask: 0x01) */ +#define VADC_G_BFL_BFI2_Pos (18UL) /*!< VADC_G BFL: BFI2 (Bit 18) */ +#define VADC_G_BFL_BFI2_Msk (0x40000UL) /*!< VADC_G BFL: BFI2 (Bitfield-Mask: 0x01) */ +#define VADC_G_BFL_BFI3_Pos (19UL) /*!< VADC_G BFL: BFI3 (Bit 19) */ +#define VADC_G_BFL_BFI3_Msk (0x80000UL) /*!< VADC_G BFL: BFI3 (Bitfield-Mask: 0x01) */ + +/* --------------------------------- VADC_G_BFLS -------------------------------- */ +#define VADC_G_BFLS_BFC0_Pos (0UL) /*!< VADC_G BFLS: BFC0 (Bit 0) */ +#define VADC_G_BFLS_BFC0_Msk (0x1UL) /*!< VADC_G BFLS: BFC0 (Bitfield-Mask: 0x01) */ +#define VADC_G_BFLS_BFC1_Pos (1UL) /*!< VADC_G BFLS: BFC1 (Bit 1) */ +#define VADC_G_BFLS_BFC1_Msk (0x2UL) /*!< VADC_G BFLS: BFC1 (Bitfield-Mask: 0x01) */ +#define VADC_G_BFLS_BFC2_Pos (2UL) /*!< VADC_G BFLS: BFC2 (Bit 2) */ +#define VADC_G_BFLS_BFC2_Msk (0x4UL) /*!< VADC_G BFLS: BFC2 (Bitfield-Mask: 0x01) */ +#define VADC_G_BFLS_BFC3_Pos (3UL) /*!< VADC_G BFLS: BFC3 (Bit 3) */ +#define VADC_G_BFLS_BFC3_Msk (0x8UL) /*!< VADC_G BFLS: BFC3 (Bitfield-Mask: 0x01) */ +#define VADC_G_BFLS_BFS0_Pos (16UL) /*!< VADC_G BFLS: BFS0 (Bit 16) */ +#define VADC_G_BFLS_BFS0_Msk (0x10000UL) /*!< VADC_G BFLS: BFS0 (Bitfield-Mask: 0x01) */ +#define VADC_G_BFLS_BFS1_Pos (17UL) /*!< VADC_G BFLS: BFS1 (Bit 17) */ +#define VADC_G_BFLS_BFS1_Msk (0x20000UL) /*!< VADC_G BFLS: BFS1 (Bitfield-Mask: 0x01) */ +#define VADC_G_BFLS_BFS2_Pos (18UL) /*!< VADC_G BFLS: BFS2 (Bit 18) */ +#define VADC_G_BFLS_BFS2_Msk (0x40000UL) /*!< VADC_G BFLS: BFS2 (Bitfield-Mask: 0x01) */ +#define VADC_G_BFLS_BFS3_Pos (19UL) /*!< VADC_G BFLS: BFS3 (Bit 19) */ +#define VADC_G_BFLS_BFS3_Msk (0x80000UL) /*!< VADC_G BFLS: BFS3 (Bitfield-Mask: 0x01) */ + +/* --------------------------------- VADC_G_BFLC -------------------------------- */ +#define VADC_G_BFLC_BFM0_Pos (0UL) /*!< VADC_G BFLC: BFM0 (Bit 0) */ +#define VADC_G_BFLC_BFM0_Msk (0xfUL) /*!< VADC_G BFLC: BFM0 (Bitfield-Mask: 0x0f) */ +#define VADC_G_BFLC_BFM1_Pos (4UL) /*!< VADC_G BFLC: BFM1 (Bit 4) */ +#define VADC_G_BFLC_BFM1_Msk (0xf0UL) /*!< VADC_G BFLC: BFM1 (Bitfield-Mask: 0x0f) */ +#define VADC_G_BFLC_BFM2_Pos (8UL) /*!< VADC_G BFLC: BFM2 (Bit 8) */ +#define VADC_G_BFLC_BFM2_Msk (0xf00UL) /*!< VADC_G BFLC: BFM2 (Bitfield-Mask: 0x0f) */ +#define VADC_G_BFLC_BFM3_Pos (12UL) /*!< VADC_G BFLC: BFM3 (Bit 12) */ +#define VADC_G_BFLC_BFM3_Msk (0xf000UL) /*!< VADC_G BFLC: BFM3 (Bitfield-Mask: 0x0f) */ + +/* -------------------------------- VADC_G_BFLNP -------------------------------- */ +#define VADC_G_BFLNP_BFL0NP_Pos (0UL) /*!< VADC_G BFLNP: BFL0NP (Bit 0) */ +#define VADC_G_BFLNP_BFL0NP_Msk (0xfUL) /*!< VADC_G BFLNP: BFL0NP (Bitfield-Mask: 0x0f) */ +#define VADC_G_BFLNP_BFL1NP_Pos (4UL) /*!< VADC_G BFLNP: BFL1NP (Bit 4) */ +#define VADC_G_BFLNP_BFL1NP_Msk (0xf0UL) /*!< VADC_G BFLNP: BFL1NP (Bitfield-Mask: 0x0f) */ +#define VADC_G_BFLNP_BFL2NP_Pos (8UL) /*!< VADC_G BFLNP: BFL2NP (Bit 8) */ +#define VADC_G_BFLNP_BFL2NP_Msk (0xf00UL) /*!< VADC_G BFLNP: BFL2NP (Bitfield-Mask: 0x0f) */ +#define VADC_G_BFLNP_BFL3NP_Pos (12UL) /*!< VADC_G BFLNP: BFL3NP (Bit 12) */ +#define VADC_G_BFLNP_BFL3NP_Msk (0xf000UL) /*!< VADC_G BFLNP: BFL3NP (Bitfield-Mask: 0x0f) */ + +/* -------------------------------- VADC_G_QCTRL0 ------------------------------- */ +#define VADC_G_QCTRL0_SRCRESREG_Pos (0UL) /*!< VADC_G QCTRL0: SRCRESREG (Bit 0) */ +#define VADC_G_QCTRL0_SRCRESREG_Msk (0xfUL) /*!< VADC_G QCTRL0: SRCRESREG (Bitfield-Mask: 0x0f) */ +#define VADC_G_QCTRL0_XTSEL_Pos (8UL) /*!< VADC_G QCTRL0: XTSEL (Bit 8) */ +#define VADC_G_QCTRL0_XTSEL_Msk (0xf00UL) /*!< VADC_G QCTRL0: XTSEL (Bitfield-Mask: 0x0f) */ +#define VADC_G_QCTRL0_XTLVL_Pos (12UL) /*!< VADC_G QCTRL0: XTLVL (Bit 12) */ +#define VADC_G_QCTRL0_XTLVL_Msk (0x1000UL) /*!< VADC_G QCTRL0: XTLVL (Bitfield-Mask: 0x01) */ +#define VADC_G_QCTRL0_XTMODE_Pos (13UL) /*!< VADC_G QCTRL0: XTMODE (Bit 13) */ +#define VADC_G_QCTRL0_XTMODE_Msk (0x6000UL) /*!< VADC_G QCTRL0: XTMODE (Bitfield-Mask: 0x03) */ +#define VADC_G_QCTRL0_XTWC_Pos (15UL) /*!< VADC_G QCTRL0: XTWC (Bit 15) */ +#define VADC_G_QCTRL0_XTWC_Msk (0x8000UL) /*!< VADC_G QCTRL0: XTWC (Bitfield-Mask: 0x01) */ +#define VADC_G_QCTRL0_GTSEL_Pos (16UL) /*!< VADC_G QCTRL0: GTSEL (Bit 16) */ +#define VADC_G_QCTRL0_GTSEL_Msk (0xf0000UL) /*!< VADC_G QCTRL0: GTSEL (Bitfield-Mask: 0x0f) */ +#define VADC_G_QCTRL0_GTLVL_Pos (20UL) /*!< VADC_G QCTRL0: GTLVL (Bit 20) */ +#define VADC_G_QCTRL0_GTLVL_Msk (0x100000UL) /*!< VADC_G QCTRL0: GTLVL (Bitfield-Mask: 0x01) */ +#define VADC_G_QCTRL0_GTWC_Pos (23UL) /*!< VADC_G QCTRL0: GTWC (Bit 23) */ +#define VADC_G_QCTRL0_GTWC_Msk (0x800000UL) /*!< VADC_G QCTRL0: GTWC (Bitfield-Mask: 0x01) */ +#define VADC_G_QCTRL0_TMEN_Pos (28UL) /*!< VADC_G QCTRL0: TMEN (Bit 28) */ +#define VADC_G_QCTRL0_TMEN_Msk (0x10000000UL) /*!< VADC_G QCTRL0: TMEN (Bitfield-Mask: 0x01) */ +#define VADC_G_QCTRL0_TMWC_Pos (31UL) /*!< VADC_G QCTRL0: TMWC (Bit 31) */ +#define VADC_G_QCTRL0_TMWC_Msk (0x80000000UL) /*!< VADC_G QCTRL0: TMWC (Bitfield-Mask: 0x01) */ + +/* --------------------------------- VADC_G_QMR0 -------------------------------- */ +#define VADC_G_QMR0_ENGT_Pos (0UL) /*!< VADC_G QMR0: ENGT (Bit 0) */ +#define VADC_G_QMR0_ENGT_Msk (0x3UL) /*!< VADC_G QMR0: ENGT (Bitfield-Mask: 0x03) */ +#define VADC_G_QMR0_ENTR_Pos (2UL) /*!< VADC_G QMR0: ENTR (Bit 2) */ +#define VADC_G_QMR0_ENTR_Msk (0x4UL) /*!< VADC_G QMR0: ENTR (Bitfield-Mask: 0x01) */ +#define VADC_G_QMR0_CLRV_Pos (8UL) /*!< VADC_G QMR0: CLRV (Bit 8) */ +#define VADC_G_QMR0_CLRV_Msk (0x100UL) /*!< VADC_G QMR0: CLRV (Bitfield-Mask: 0x01) */ +#define VADC_G_QMR0_TREV_Pos (9UL) /*!< VADC_G QMR0: TREV (Bit 9) */ +#define VADC_G_QMR0_TREV_Msk (0x200UL) /*!< VADC_G QMR0: TREV (Bitfield-Mask: 0x01) */ +#define VADC_G_QMR0_FLUSH_Pos (10UL) /*!< VADC_G QMR0: FLUSH (Bit 10) */ +#define VADC_G_QMR0_FLUSH_Msk (0x400UL) /*!< VADC_G QMR0: FLUSH (Bitfield-Mask: 0x01) */ +#define VADC_G_QMR0_CEV_Pos (11UL) /*!< VADC_G QMR0: CEV (Bit 11) */ +#define VADC_G_QMR0_CEV_Msk (0x800UL) /*!< VADC_G QMR0: CEV (Bitfield-Mask: 0x01) */ +#define VADC_G_QMR0_RPTDIS_Pos (16UL) /*!< VADC_G QMR0: RPTDIS (Bit 16) */ +#define VADC_G_QMR0_RPTDIS_Msk (0x10000UL) /*!< VADC_G QMR0: RPTDIS (Bitfield-Mask: 0x01) */ + +/* --------------------------------- VADC_G_QSR0 -------------------------------- */ +#define VADC_G_QSR0_FILL_Pos (0UL) /*!< VADC_G QSR0: FILL (Bit 0) */ +#define VADC_G_QSR0_FILL_Msk (0xfUL) /*!< VADC_G QSR0: FILL (Bitfield-Mask: 0x0f) */ +#define VADC_G_QSR0_EMPTY_Pos (5UL) /*!< VADC_G QSR0: EMPTY (Bit 5) */ +#define VADC_G_QSR0_EMPTY_Msk (0x20UL) /*!< VADC_G QSR0: EMPTY (Bitfield-Mask: 0x01) */ +#define VADC_G_QSR0_REQGT_Pos (7UL) /*!< VADC_G QSR0: REQGT (Bit 7) */ +#define VADC_G_QSR0_REQGT_Msk (0x80UL) /*!< VADC_G QSR0: REQGT (Bitfield-Mask: 0x01) */ +#define VADC_G_QSR0_EV_Pos (8UL) /*!< VADC_G QSR0: EV (Bit 8) */ +#define VADC_G_QSR0_EV_Msk (0x100UL) /*!< VADC_G QSR0: EV (Bitfield-Mask: 0x01) */ + +/* --------------------------------- VADC_G_Q0R0 -------------------------------- */ +#define VADC_G_Q0R0_REQCHNR_Pos (0UL) /*!< VADC_G Q0R0: REQCHNR (Bit 0) */ +#define VADC_G_Q0R0_REQCHNR_Msk (0x1fUL) /*!< VADC_G Q0R0: REQCHNR (Bitfield-Mask: 0x1f) */ +#define VADC_G_Q0R0_RF_Pos (5UL) /*!< VADC_G Q0R0: RF (Bit 5) */ +#define VADC_G_Q0R0_RF_Msk (0x20UL) /*!< VADC_G Q0R0: RF (Bitfield-Mask: 0x01) */ +#define VADC_G_Q0R0_ENSI_Pos (6UL) /*!< VADC_G Q0R0: ENSI (Bit 6) */ +#define VADC_G_Q0R0_ENSI_Msk (0x40UL) /*!< VADC_G Q0R0: ENSI (Bitfield-Mask: 0x01) */ +#define VADC_G_Q0R0_EXTR_Pos (7UL) /*!< VADC_G Q0R0: EXTR (Bit 7) */ +#define VADC_G_Q0R0_EXTR_Msk (0x80UL) /*!< VADC_G Q0R0: EXTR (Bitfield-Mask: 0x01) */ +#define VADC_G_Q0R0_V_Pos (8UL) /*!< VADC_G Q0R0: V (Bit 8) */ +#define VADC_G_Q0R0_V_Msk (0x100UL) /*!< VADC_G Q0R0: V (Bitfield-Mask: 0x01) */ + +/* -------------------------------- VADC_G_QINR0 -------------------------------- */ +#define VADC_G_QINR0_REQCHNR_Pos (0UL) /*!< VADC_G QINR0: REQCHNR (Bit 0) */ +#define VADC_G_QINR0_REQCHNR_Msk (0x1fUL) /*!< VADC_G QINR0: REQCHNR (Bitfield-Mask: 0x1f) */ +#define VADC_G_QINR0_RF_Pos (5UL) /*!< VADC_G QINR0: RF (Bit 5) */ +#define VADC_G_QINR0_RF_Msk (0x20UL) /*!< VADC_G QINR0: RF (Bitfield-Mask: 0x01) */ +#define VADC_G_QINR0_ENSI_Pos (6UL) /*!< VADC_G QINR0: ENSI (Bit 6) */ +#define VADC_G_QINR0_ENSI_Msk (0x40UL) /*!< VADC_G QINR0: ENSI (Bitfield-Mask: 0x01) */ +#define VADC_G_QINR0_EXTR_Pos (7UL) /*!< VADC_G QINR0: EXTR (Bit 7) */ +#define VADC_G_QINR0_EXTR_Msk (0x80UL) /*!< VADC_G QINR0: EXTR (Bitfield-Mask: 0x01) */ + +/* -------------------------------- VADC_G_QBUR0 -------------------------------- */ +#define VADC_G_QBUR0_REQCHNR_Pos (0UL) /*!< VADC_G QBUR0: REQCHNR (Bit 0) */ +#define VADC_G_QBUR0_REQCHNR_Msk (0x1fUL) /*!< VADC_G QBUR0: REQCHNR (Bitfield-Mask: 0x1f) */ +#define VADC_G_QBUR0_RF_Pos (5UL) /*!< VADC_G QBUR0: RF (Bit 5) */ +#define VADC_G_QBUR0_RF_Msk (0x20UL) /*!< VADC_G QBUR0: RF (Bitfield-Mask: 0x01) */ +#define VADC_G_QBUR0_ENSI_Pos (6UL) /*!< VADC_G QBUR0: ENSI (Bit 6) */ +#define VADC_G_QBUR0_ENSI_Msk (0x40UL) /*!< VADC_G QBUR0: ENSI (Bitfield-Mask: 0x01) */ +#define VADC_G_QBUR0_EXTR_Pos (7UL) /*!< VADC_G QBUR0: EXTR (Bit 7) */ +#define VADC_G_QBUR0_EXTR_Msk (0x80UL) /*!< VADC_G QBUR0: EXTR (Bitfield-Mask: 0x01) */ +#define VADC_G_QBUR0_V_Pos (8UL) /*!< VADC_G QBUR0: V (Bit 8) */ +#define VADC_G_QBUR0_V_Msk (0x100UL) /*!< VADC_G QBUR0: V (Bitfield-Mask: 0x01) */ + +/* -------------------------------- VADC_G_ASCTRL ------------------------------- */ +#define VADC_G_ASCTRL_SRCRESREG_Pos (0UL) /*!< VADC_G ASCTRL: SRCRESREG (Bit 0) */ +#define VADC_G_ASCTRL_SRCRESREG_Msk (0xfUL) /*!< VADC_G ASCTRL: SRCRESREG (Bitfield-Mask: 0x0f) */ +#define VADC_G_ASCTRL_XTSEL_Pos (8UL) /*!< VADC_G ASCTRL: XTSEL (Bit 8) */ +#define VADC_G_ASCTRL_XTSEL_Msk (0xf00UL) /*!< VADC_G ASCTRL: XTSEL (Bitfield-Mask: 0x0f) */ +#define VADC_G_ASCTRL_XTLVL_Pos (12UL) /*!< VADC_G ASCTRL: XTLVL (Bit 12) */ +#define VADC_G_ASCTRL_XTLVL_Msk (0x1000UL) /*!< VADC_G ASCTRL: XTLVL (Bitfield-Mask: 0x01) */ +#define VADC_G_ASCTRL_XTMODE_Pos (13UL) /*!< VADC_G ASCTRL: XTMODE (Bit 13) */ +#define VADC_G_ASCTRL_XTMODE_Msk (0x6000UL) /*!< VADC_G ASCTRL: XTMODE (Bitfield-Mask: 0x03) */ +#define VADC_G_ASCTRL_XTWC_Pos (15UL) /*!< VADC_G ASCTRL: XTWC (Bit 15) */ +#define VADC_G_ASCTRL_XTWC_Msk (0x8000UL) /*!< VADC_G ASCTRL: XTWC (Bitfield-Mask: 0x01) */ +#define VADC_G_ASCTRL_GTSEL_Pos (16UL) /*!< VADC_G ASCTRL: GTSEL (Bit 16) */ +#define VADC_G_ASCTRL_GTSEL_Msk (0xf0000UL) /*!< VADC_G ASCTRL: GTSEL (Bitfield-Mask: 0x0f) */ +#define VADC_G_ASCTRL_GTLVL_Pos (20UL) /*!< VADC_G ASCTRL: GTLVL (Bit 20) */ +#define VADC_G_ASCTRL_GTLVL_Msk (0x100000UL) /*!< VADC_G ASCTRL: GTLVL (Bitfield-Mask: 0x01) */ +#define VADC_G_ASCTRL_GTWC_Pos (23UL) /*!< VADC_G ASCTRL: GTWC (Bit 23) */ +#define VADC_G_ASCTRL_GTWC_Msk (0x800000UL) /*!< VADC_G ASCTRL: GTWC (Bitfield-Mask: 0x01) */ +#define VADC_G_ASCTRL_TMEN_Pos (28UL) /*!< VADC_G ASCTRL: TMEN (Bit 28) */ +#define VADC_G_ASCTRL_TMEN_Msk (0x10000000UL) /*!< VADC_G ASCTRL: TMEN (Bitfield-Mask: 0x01) */ +#define VADC_G_ASCTRL_TMWC_Pos (31UL) /*!< VADC_G ASCTRL: TMWC (Bit 31) */ +#define VADC_G_ASCTRL_TMWC_Msk (0x80000000UL) /*!< VADC_G ASCTRL: TMWC (Bitfield-Mask: 0x01) */ + +/* --------------------------------- VADC_G_ASMR -------------------------------- */ +#define VADC_G_ASMR_ENGT_Pos (0UL) /*!< VADC_G ASMR: ENGT (Bit 0) */ +#define VADC_G_ASMR_ENGT_Msk (0x3UL) /*!< VADC_G ASMR: ENGT (Bitfield-Mask: 0x03) */ +#define VADC_G_ASMR_ENTR_Pos (2UL) /*!< VADC_G ASMR: ENTR (Bit 2) */ +#define VADC_G_ASMR_ENTR_Msk (0x4UL) /*!< VADC_G ASMR: ENTR (Bitfield-Mask: 0x01) */ +#define VADC_G_ASMR_ENSI_Pos (3UL) /*!< VADC_G ASMR: ENSI (Bit 3) */ +#define VADC_G_ASMR_ENSI_Msk (0x8UL) /*!< VADC_G ASMR: ENSI (Bitfield-Mask: 0x01) */ +#define VADC_G_ASMR_SCAN_Pos (4UL) /*!< VADC_G ASMR: SCAN (Bit 4) */ +#define VADC_G_ASMR_SCAN_Msk (0x10UL) /*!< VADC_G ASMR: SCAN (Bitfield-Mask: 0x01) */ +#define VADC_G_ASMR_LDM_Pos (5UL) /*!< VADC_G ASMR: LDM (Bit 5) */ +#define VADC_G_ASMR_LDM_Msk (0x20UL) /*!< VADC_G ASMR: LDM (Bitfield-Mask: 0x01) */ +#define VADC_G_ASMR_REQGT_Pos (7UL) /*!< VADC_G ASMR: REQGT (Bit 7) */ +#define VADC_G_ASMR_REQGT_Msk (0x80UL) /*!< VADC_G ASMR: REQGT (Bitfield-Mask: 0x01) */ +#define VADC_G_ASMR_CLRPND_Pos (8UL) /*!< VADC_G ASMR: CLRPND (Bit 8) */ +#define VADC_G_ASMR_CLRPND_Msk (0x100UL) /*!< VADC_G ASMR: CLRPND (Bitfield-Mask: 0x01) */ +#define VADC_G_ASMR_LDEV_Pos (9UL) /*!< VADC_G ASMR: LDEV (Bit 9) */ +#define VADC_G_ASMR_LDEV_Msk (0x200UL) /*!< VADC_G ASMR: LDEV (Bitfield-Mask: 0x01) */ +#define VADC_G_ASMR_RPTDIS_Pos (16UL) /*!< VADC_G ASMR: RPTDIS (Bit 16) */ +#define VADC_G_ASMR_RPTDIS_Msk (0x10000UL) /*!< VADC_G ASMR: RPTDIS (Bitfield-Mask: 0x01) */ + +/* -------------------------------- VADC_G_ASSEL -------------------------------- */ +#define VADC_G_ASSEL_CHSEL0_Pos (0UL) /*!< VADC_G ASSEL: CHSEL0 (Bit 0) */ +#define VADC_G_ASSEL_CHSEL0_Msk (0x1UL) /*!< VADC_G ASSEL: CHSEL0 (Bitfield-Mask: 0x01) */ +#define VADC_G_ASSEL_CHSEL1_Pos (1UL) /*!< VADC_G ASSEL: CHSEL1 (Bit 1) */ +#define VADC_G_ASSEL_CHSEL1_Msk (0x2UL) /*!< VADC_G ASSEL: CHSEL1 (Bitfield-Mask: 0x01) */ +#define VADC_G_ASSEL_CHSEL2_Pos (2UL) /*!< VADC_G ASSEL: CHSEL2 (Bit 2) */ +#define VADC_G_ASSEL_CHSEL2_Msk (0x4UL) /*!< VADC_G ASSEL: CHSEL2 (Bitfield-Mask: 0x01) */ +#define VADC_G_ASSEL_CHSEL3_Pos (3UL) /*!< VADC_G ASSEL: CHSEL3 (Bit 3) */ +#define VADC_G_ASSEL_CHSEL3_Msk (0x8UL) /*!< VADC_G ASSEL: CHSEL3 (Bitfield-Mask: 0x01) */ +#define VADC_G_ASSEL_CHSEL4_Pos (4UL) /*!< VADC_G ASSEL: CHSEL4 (Bit 4) */ +#define VADC_G_ASSEL_CHSEL4_Msk (0x10UL) /*!< VADC_G ASSEL: CHSEL4 (Bitfield-Mask: 0x01) */ +#define VADC_G_ASSEL_CHSEL5_Pos (5UL) /*!< VADC_G ASSEL: CHSEL5 (Bit 5) */ +#define VADC_G_ASSEL_CHSEL5_Msk (0x20UL) /*!< VADC_G ASSEL: CHSEL5 (Bitfield-Mask: 0x01) */ +#define VADC_G_ASSEL_CHSEL6_Pos (6UL) /*!< VADC_G ASSEL: CHSEL6 (Bit 6) */ +#define VADC_G_ASSEL_CHSEL6_Msk (0x40UL) /*!< VADC_G ASSEL: CHSEL6 (Bitfield-Mask: 0x01) */ +#define VADC_G_ASSEL_CHSEL7_Pos (7UL) /*!< VADC_G ASSEL: CHSEL7 (Bit 7) */ +#define VADC_G_ASSEL_CHSEL7_Msk (0x80UL) /*!< VADC_G ASSEL: CHSEL7 (Bitfield-Mask: 0x01) */ + +/* -------------------------------- VADC_G_ASPND -------------------------------- */ +#define VADC_G_ASPND_CHPND0_Pos (0UL) /*!< VADC_G ASPND: CHPND0 (Bit 0) */ +#define VADC_G_ASPND_CHPND0_Msk (0x1UL) /*!< VADC_G ASPND: CHPND0 (Bitfield-Mask: 0x01) */ +#define VADC_G_ASPND_CHPND1_Pos (1UL) /*!< VADC_G ASPND: CHPND1 (Bit 1) */ +#define VADC_G_ASPND_CHPND1_Msk (0x2UL) /*!< VADC_G ASPND: CHPND1 (Bitfield-Mask: 0x01) */ +#define VADC_G_ASPND_CHPND2_Pos (2UL) /*!< VADC_G ASPND: CHPND2 (Bit 2) */ +#define VADC_G_ASPND_CHPND2_Msk (0x4UL) /*!< VADC_G ASPND: CHPND2 (Bitfield-Mask: 0x01) */ +#define VADC_G_ASPND_CHPND3_Pos (3UL) /*!< VADC_G ASPND: CHPND3 (Bit 3) */ +#define VADC_G_ASPND_CHPND3_Msk (0x8UL) /*!< VADC_G ASPND: CHPND3 (Bitfield-Mask: 0x01) */ +#define VADC_G_ASPND_CHPND4_Pos (4UL) /*!< VADC_G ASPND: CHPND4 (Bit 4) */ +#define VADC_G_ASPND_CHPND4_Msk (0x10UL) /*!< VADC_G ASPND: CHPND4 (Bitfield-Mask: 0x01) */ +#define VADC_G_ASPND_CHPND5_Pos (5UL) /*!< VADC_G ASPND: CHPND5 (Bit 5) */ +#define VADC_G_ASPND_CHPND5_Msk (0x20UL) /*!< VADC_G ASPND: CHPND5 (Bitfield-Mask: 0x01) */ +#define VADC_G_ASPND_CHPND6_Pos (6UL) /*!< VADC_G ASPND: CHPND6 (Bit 6) */ +#define VADC_G_ASPND_CHPND6_Msk (0x40UL) /*!< VADC_G ASPND: CHPND6 (Bitfield-Mask: 0x01) */ +#define VADC_G_ASPND_CHPND7_Pos (7UL) /*!< VADC_G ASPND: CHPND7 (Bit 7) */ +#define VADC_G_ASPND_CHPND7_Msk (0x80UL) /*!< VADC_G ASPND: CHPND7 (Bitfield-Mask: 0x01) */ + +/* -------------------------------- VADC_G_CEFLAG ------------------------------- */ +#define VADC_G_CEFLAG_CEV0_Pos (0UL) /*!< VADC_G CEFLAG: CEV0 (Bit 0) */ +#define VADC_G_CEFLAG_CEV0_Msk (0x1UL) /*!< VADC_G CEFLAG: CEV0 (Bitfield-Mask: 0x01) */ +#define VADC_G_CEFLAG_CEV1_Pos (1UL) /*!< VADC_G CEFLAG: CEV1 (Bit 1) */ +#define VADC_G_CEFLAG_CEV1_Msk (0x2UL) /*!< VADC_G CEFLAG: CEV1 (Bitfield-Mask: 0x01) */ +#define VADC_G_CEFLAG_CEV2_Pos (2UL) /*!< VADC_G CEFLAG: CEV2 (Bit 2) */ +#define VADC_G_CEFLAG_CEV2_Msk (0x4UL) /*!< VADC_G CEFLAG: CEV2 (Bitfield-Mask: 0x01) */ +#define VADC_G_CEFLAG_CEV3_Pos (3UL) /*!< VADC_G CEFLAG: CEV3 (Bit 3) */ +#define VADC_G_CEFLAG_CEV3_Msk (0x8UL) /*!< VADC_G CEFLAG: CEV3 (Bitfield-Mask: 0x01) */ +#define VADC_G_CEFLAG_CEV4_Pos (4UL) /*!< VADC_G CEFLAG: CEV4 (Bit 4) */ +#define VADC_G_CEFLAG_CEV4_Msk (0x10UL) /*!< VADC_G CEFLAG: CEV4 (Bitfield-Mask: 0x01) */ +#define VADC_G_CEFLAG_CEV5_Pos (5UL) /*!< VADC_G CEFLAG: CEV5 (Bit 5) */ +#define VADC_G_CEFLAG_CEV5_Msk (0x20UL) /*!< VADC_G CEFLAG: CEV5 (Bitfield-Mask: 0x01) */ +#define VADC_G_CEFLAG_CEV6_Pos (6UL) /*!< VADC_G CEFLAG: CEV6 (Bit 6) */ +#define VADC_G_CEFLAG_CEV6_Msk (0x40UL) /*!< VADC_G CEFLAG: CEV6 (Bitfield-Mask: 0x01) */ +#define VADC_G_CEFLAG_CEV7_Pos (7UL) /*!< VADC_G CEFLAG: CEV7 (Bit 7) */ +#define VADC_G_CEFLAG_CEV7_Msk (0x80UL) /*!< VADC_G CEFLAG: CEV7 (Bitfield-Mask: 0x01) */ + +/* -------------------------------- VADC_G_REFLAG ------------------------------- */ +#define VADC_G_REFLAG_REV0_Pos (0UL) /*!< VADC_G REFLAG: REV0 (Bit 0) */ +#define VADC_G_REFLAG_REV0_Msk (0x1UL) /*!< VADC_G REFLAG: REV0 (Bitfield-Mask: 0x01) */ +#define VADC_G_REFLAG_REV1_Pos (1UL) /*!< VADC_G REFLAG: REV1 (Bit 1) */ +#define VADC_G_REFLAG_REV1_Msk (0x2UL) /*!< VADC_G REFLAG: REV1 (Bitfield-Mask: 0x01) */ +#define VADC_G_REFLAG_REV2_Pos (2UL) /*!< VADC_G REFLAG: REV2 (Bit 2) */ +#define VADC_G_REFLAG_REV2_Msk (0x4UL) /*!< VADC_G REFLAG: REV2 (Bitfield-Mask: 0x01) */ +#define VADC_G_REFLAG_REV3_Pos (3UL) /*!< VADC_G REFLAG: REV3 (Bit 3) */ +#define VADC_G_REFLAG_REV3_Msk (0x8UL) /*!< VADC_G REFLAG: REV3 (Bitfield-Mask: 0x01) */ +#define VADC_G_REFLAG_REV4_Pos (4UL) /*!< VADC_G REFLAG: REV4 (Bit 4) */ +#define VADC_G_REFLAG_REV4_Msk (0x10UL) /*!< VADC_G REFLAG: REV4 (Bitfield-Mask: 0x01) */ +#define VADC_G_REFLAG_REV5_Pos (5UL) /*!< VADC_G REFLAG: REV5 (Bit 5) */ +#define VADC_G_REFLAG_REV5_Msk (0x20UL) /*!< VADC_G REFLAG: REV5 (Bitfield-Mask: 0x01) */ +#define VADC_G_REFLAG_REV6_Pos (6UL) /*!< VADC_G REFLAG: REV6 (Bit 6) */ +#define VADC_G_REFLAG_REV6_Msk (0x40UL) /*!< VADC_G REFLAG: REV6 (Bitfield-Mask: 0x01) */ +#define VADC_G_REFLAG_REV7_Pos (7UL) /*!< VADC_G REFLAG: REV7 (Bit 7) */ +#define VADC_G_REFLAG_REV7_Msk (0x80UL) /*!< VADC_G REFLAG: REV7 (Bitfield-Mask: 0x01) */ +#define VADC_G_REFLAG_REV8_Pos (8UL) /*!< VADC_G REFLAG: REV8 (Bit 8) */ +#define VADC_G_REFLAG_REV8_Msk (0x100UL) /*!< VADC_G REFLAG: REV8 (Bitfield-Mask: 0x01) */ +#define VADC_G_REFLAG_REV9_Pos (9UL) /*!< VADC_G REFLAG: REV9 (Bit 9) */ +#define VADC_G_REFLAG_REV9_Msk (0x200UL) /*!< VADC_G REFLAG: REV9 (Bitfield-Mask: 0x01) */ +#define VADC_G_REFLAG_REV10_Pos (10UL) /*!< VADC_G REFLAG: REV10 (Bit 10) */ +#define VADC_G_REFLAG_REV10_Msk (0x400UL) /*!< VADC_G REFLAG: REV10 (Bitfield-Mask: 0x01) */ +#define VADC_G_REFLAG_REV11_Pos (11UL) /*!< VADC_G REFLAG: REV11 (Bit 11) */ +#define VADC_G_REFLAG_REV11_Msk (0x800UL) /*!< VADC_G REFLAG: REV11 (Bitfield-Mask: 0x01) */ +#define VADC_G_REFLAG_REV12_Pos (12UL) /*!< VADC_G REFLAG: REV12 (Bit 12) */ +#define VADC_G_REFLAG_REV12_Msk (0x1000UL) /*!< VADC_G REFLAG: REV12 (Bitfield-Mask: 0x01) */ +#define VADC_G_REFLAG_REV13_Pos (13UL) /*!< VADC_G REFLAG: REV13 (Bit 13) */ +#define VADC_G_REFLAG_REV13_Msk (0x2000UL) /*!< VADC_G REFLAG: REV13 (Bitfield-Mask: 0x01) */ +#define VADC_G_REFLAG_REV14_Pos (14UL) /*!< VADC_G REFLAG: REV14 (Bit 14) */ +#define VADC_G_REFLAG_REV14_Msk (0x4000UL) /*!< VADC_G REFLAG: REV14 (Bitfield-Mask: 0x01) */ +#define VADC_G_REFLAG_REV15_Pos (15UL) /*!< VADC_G REFLAG: REV15 (Bit 15) */ +#define VADC_G_REFLAG_REV15_Msk (0x8000UL) /*!< VADC_G REFLAG: REV15 (Bitfield-Mask: 0x01) */ + +/* -------------------------------- VADC_G_SEFLAG ------------------------------- */ +#define VADC_G_SEFLAG_SEV0_Pos (0UL) /*!< VADC_G SEFLAG: SEV0 (Bit 0) */ +#define VADC_G_SEFLAG_SEV0_Msk (0x1UL) /*!< VADC_G SEFLAG: SEV0 (Bitfield-Mask: 0x01) */ +#define VADC_G_SEFLAG_SEV1_Pos (1UL) /*!< VADC_G SEFLAG: SEV1 (Bit 1) */ +#define VADC_G_SEFLAG_SEV1_Msk (0x2UL) /*!< VADC_G SEFLAG: SEV1 (Bitfield-Mask: 0x01) */ + +/* -------------------------------- VADC_G_CEFCLR ------------------------------- */ +#define VADC_G_CEFCLR_CEV0_Pos (0UL) /*!< VADC_G CEFCLR: CEV0 (Bit 0) */ +#define VADC_G_CEFCLR_CEV0_Msk (0x1UL) /*!< VADC_G CEFCLR: CEV0 (Bitfield-Mask: 0x01) */ +#define VADC_G_CEFCLR_CEV1_Pos (1UL) /*!< VADC_G CEFCLR: CEV1 (Bit 1) */ +#define VADC_G_CEFCLR_CEV1_Msk (0x2UL) /*!< VADC_G CEFCLR: CEV1 (Bitfield-Mask: 0x01) */ +#define VADC_G_CEFCLR_CEV2_Pos (2UL) /*!< VADC_G CEFCLR: CEV2 (Bit 2) */ +#define VADC_G_CEFCLR_CEV2_Msk (0x4UL) /*!< VADC_G CEFCLR: CEV2 (Bitfield-Mask: 0x01) */ +#define VADC_G_CEFCLR_CEV3_Pos (3UL) /*!< VADC_G CEFCLR: CEV3 (Bit 3) */ +#define VADC_G_CEFCLR_CEV3_Msk (0x8UL) /*!< VADC_G CEFCLR: CEV3 (Bitfield-Mask: 0x01) */ +#define VADC_G_CEFCLR_CEV4_Pos (4UL) /*!< VADC_G CEFCLR: CEV4 (Bit 4) */ +#define VADC_G_CEFCLR_CEV4_Msk (0x10UL) /*!< VADC_G CEFCLR: CEV4 (Bitfield-Mask: 0x01) */ +#define VADC_G_CEFCLR_CEV5_Pos (5UL) /*!< VADC_G CEFCLR: CEV5 (Bit 5) */ +#define VADC_G_CEFCLR_CEV5_Msk (0x20UL) /*!< VADC_G CEFCLR: CEV5 (Bitfield-Mask: 0x01) */ +#define VADC_G_CEFCLR_CEV6_Pos (6UL) /*!< VADC_G CEFCLR: CEV6 (Bit 6) */ +#define VADC_G_CEFCLR_CEV6_Msk (0x40UL) /*!< VADC_G CEFCLR: CEV6 (Bitfield-Mask: 0x01) */ +#define VADC_G_CEFCLR_CEV7_Pos (7UL) /*!< VADC_G CEFCLR: CEV7 (Bit 7) */ +#define VADC_G_CEFCLR_CEV7_Msk (0x80UL) /*!< VADC_G CEFCLR: CEV7 (Bitfield-Mask: 0x01) */ + +/* -------------------------------- VADC_G_REFCLR ------------------------------- */ +#define VADC_G_REFCLR_REV0_Pos (0UL) /*!< VADC_G REFCLR: REV0 (Bit 0) */ +#define VADC_G_REFCLR_REV0_Msk (0x1UL) /*!< VADC_G REFCLR: REV0 (Bitfield-Mask: 0x01) */ +#define VADC_G_REFCLR_REV1_Pos (1UL) /*!< VADC_G REFCLR: REV1 (Bit 1) */ +#define VADC_G_REFCLR_REV1_Msk (0x2UL) /*!< VADC_G REFCLR: REV1 (Bitfield-Mask: 0x01) */ +#define VADC_G_REFCLR_REV2_Pos (2UL) /*!< VADC_G REFCLR: REV2 (Bit 2) */ +#define VADC_G_REFCLR_REV2_Msk (0x4UL) /*!< VADC_G REFCLR: REV2 (Bitfield-Mask: 0x01) */ +#define VADC_G_REFCLR_REV3_Pos (3UL) /*!< VADC_G REFCLR: REV3 (Bit 3) */ +#define VADC_G_REFCLR_REV3_Msk (0x8UL) /*!< VADC_G REFCLR: REV3 (Bitfield-Mask: 0x01) */ +#define VADC_G_REFCLR_REV4_Pos (4UL) /*!< VADC_G REFCLR: REV4 (Bit 4) */ +#define VADC_G_REFCLR_REV4_Msk (0x10UL) /*!< VADC_G REFCLR: REV4 (Bitfield-Mask: 0x01) */ +#define VADC_G_REFCLR_REV5_Pos (5UL) /*!< VADC_G REFCLR: REV5 (Bit 5) */ +#define VADC_G_REFCLR_REV5_Msk (0x20UL) /*!< VADC_G REFCLR: REV5 (Bitfield-Mask: 0x01) */ +#define VADC_G_REFCLR_REV6_Pos (6UL) /*!< VADC_G REFCLR: REV6 (Bit 6) */ +#define VADC_G_REFCLR_REV6_Msk (0x40UL) /*!< VADC_G REFCLR: REV6 (Bitfield-Mask: 0x01) */ +#define VADC_G_REFCLR_REV7_Pos (7UL) /*!< VADC_G REFCLR: REV7 (Bit 7) */ +#define VADC_G_REFCLR_REV7_Msk (0x80UL) /*!< VADC_G REFCLR: REV7 (Bitfield-Mask: 0x01) */ +#define VADC_G_REFCLR_REV8_Pos (8UL) /*!< VADC_G REFCLR: REV8 (Bit 8) */ +#define VADC_G_REFCLR_REV8_Msk (0x100UL) /*!< VADC_G REFCLR: REV8 (Bitfield-Mask: 0x01) */ +#define VADC_G_REFCLR_REV9_Pos (9UL) /*!< VADC_G REFCLR: REV9 (Bit 9) */ +#define VADC_G_REFCLR_REV9_Msk (0x200UL) /*!< VADC_G REFCLR: REV9 (Bitfield-Mask: 0x01) */ +#define VADC_G_REFCLR_REV10_Pos (10UL) /*!< VADC_G REFCLR: REV10 (Bit 10) */ +#define VADC_G_REFCLR_REV10_Msk (0x400UL) /*!< VADC_G REFCLR: REV10 (Bitfield-Mask: 0x01) */ +#define VADC_G_REFCLR_REV11_Pos (11UL) /*!< VADC_G REFCLR: REV11 (Bit 11) */ +#define VADC_G_REFCLR_REV11_Msk (0x800UL) /*!< VADC_G REFCLR: REV11 (Bitfield-Mask: 0x01) */ +#define VADC_G_REFCLR_REV12_Pos (12UL) /*!< VADC_G REFCLR: REV12 (Bit 12) */ +#define VADC_G_REFCLR_REV12_Msk (0x1000UL) /*!< VADC_G REFCLR: REV12 (Bitfield-Mask: 0x01) */ +#define VADC_G_REFCLR_REV13_Pos (13UL) /*!< VADC_G REFCLR: REV13 (Bit 13) */ +#define VADC_G_REFCLR_REV13_Msk (0x2000UL) /*!< VADC_G REFCLR: REV13 (Bitfield-Mask: 0x01) */ +#define VADC_G_REFCLR_REV14_Pos (14UL) /*!< VADC_G REFCLR: REV14 (Bit 14) */ +#define VADC_G_REFCLR_REV14_Msk (0x4000UL) /*!< VADC_G REFCLR: REV14 (Bitfield-Mask: 0x01) */ +#define VADC_G_REFCLR_REV15_Pos (15UL) /*!< VADC_G REFCLR: REV15 (Bit 15) */ +#define VADC_G_REFCLR_REV15_Msk (0x8000UL) /*!< VADC_G REFCLR: REV15 (Bitfield-Mask: 0x01) */ + +/* -------------------------------- VADC_G_SEFCLR ------------------------------- */ +#define VADC_G_SEFCLR_SEV0_Pos (0UL) /*!< VADC_G SEFCLR: SEV0 (Bit 0) */ +#define VADC_G_SEFCLR_SEV0_Msk (0x1UL) /*!< VADC_G SEFCLR: SEV0 (Bitfield-Mask: 0x01) */ +#define VADC_G_SEFCLR_SEV1_Pos (1UL) /*!< VADC_G SEFCLR: SEV1 (Bit 1) */ +#define VADC_G_SEFCLR_SEV1_Msk (0x2UL) /*!< VADC_G SEFCLR: SEV1 (Bitfield-Mask: 0x01) */ + +/* -------------------------------- VADC_G_CEVNP0 ------------------------------- */ +#define VADC_G_CEVNP0_CEV0NP_Pos (0UL) /*!< VADC_G CEVNP0: CEV0NP (Bit 0) */ +#define VADC_G_CEVNP0_CEV0NP_Msk (0xfUL) /*!< VADC_G CEVNP0: CEV0NP (Bitfield-Mask: 0x0f) */ +#define VADC_G_CEVNP0_CEV1NP_Pos (4UL) /*!< VADC_G CEVNP0: CEV1NP (Bit 4) */ +#define VADC_G_CEVNP0_CEV1NP_Msk (0xf0UL) /*!< VADC_G CEVNP0: CEV1NP (Bitfield-Mask: 0x0f) */ +#define VADC_G_CEVNP0_CEV2NP_Pos (8UL) /*!< VADC_G CEVNP0: CEV2NP (Bit 8) */ +#define VADC_G_CEVNP0_CEV2NP_Msk (0xf00UL) /*!< VADC_G CEVNP0: CEV2NP (Bitfield-Mask: 0x0f) */ +#define VADC_G_CEVNP0_CEV3NP_Pos (12UL) /*!< VADC_G CEVNP0: CEV3NP (Bit 12) */ +#define VADC_G_CEVNP0_CEV3NP_Msk (0xf000UL) /*!< VADC_G CEVNP0: CEV3NP (Bitfield-Mask: 0x0f) */ +#define VADC_G_CEVNP0_CEV4NP_Pos (16UL) /*!< VADC_G CEVNP0: CEV4NP (Bit 16) */ +#define VADC_G_CEVNP0_CEV4NP_Msk (0xf0000UL) /*!< VADC_G CEVNP0: CEV4NP (Bitfield-Mask: 0x0f) */ +#define VADC_G_CEVNP0_CEV5NP_Pos (20UL) /*!< VADC_G CEVNP0: CEV5NP (Bit 20) */ +#define VADC_G_CEVNP0_CEV5NP_Msk (0xf00000UL) /*!< VADC_G CEVNP0: CEV5NP (Bitfield-Mask: 0x0f) */ +#define VADC_G_CEVNP0_CEV6NP_Pos (24UL) /*!< VADC_G CEVNP0: CEV6NP (Bit 24) */ +#define VADC_G_CEVNP0_CEV6NP_Msk (0xf000000UL) /*!< VADC_G CEVNP0: CEV6NP (Bitfield-Mask: 0x0f) */ +#define VADC_G_CEVNP0_CEV7NP_Pos (28UL) /*!< VADC_G CEVNP0: CEV7NP (Bit 28) */ +#define VADC_G_CEVNP0_CEV7NP_Msk (0xf0000000UL) /*!< VADC_G CEVNP0: CEV7NP (Bitfield-Mask: 0x0f) */ + +/* -------------------------------- VADC_G_REVNP0 ------------------------------- */ +#define VADC_G_REVNP0_REV0NP_Pos (0UL) /*!< VADC_G REVNP0: REV0NP (Bit 0) */ +#define VADC_G_REVNP0_REV0NP_Msk (0xfUL) /*!< VADC_G REVNP0: REV0NP (Bitfield-Mask: 0x0f) */ +#define VADC_G_REVNP0_REV1NP_Pos (4UL) /*!< VADC_G REVNP0: REV1NP (Bit 4) */ +#define VADC_G_REVNP0_REV1NP_Msk (0xf0UL) /*!< VADC_G REVNP0: REV1NP (Bitfield-Mask: 0x0f) */ +#define VADC_G_REVNP0_REV2NP_Pos (8UL) /*!< VADC_G REVNP0: REV2NP (Bit 8) */ +#define VADC_G_REVNP0_REV2NP_Msk (0xf00UL) /*!< VADC_G REVNP0: REV2NP (Bitfield-Mask: 0x0f) */ +#define VADC_G_REVNP0_REV3NP_Pos (12UL) /*!< VADC_G REVNP0: REV3NP (Bit 12) */ +#define VADC_G_REVNP0_REV3NP_Msk (0xf000UL) /*!< VADC_G REVNP0: REV3NP (Bitfield-Mask: 0x0f) */ +#define VADC_G_REVNP0_REV4NP_Pos (16UL) /*!< VADC_G REVNP0: REV4NP (Bit 16) */ +#define VADC_G_REVNP0_REV4NP_Msk (0xf0000UL) /*!< VADC_G REVNP0: REV4NP (Bitfield-Mask: 0x0f) */ +#define VADC_G_REVNP0_REV5NP_Pos (20UL) /*!< VADC_G REVNP0: REV5NP (Bit 20) */ +#define VADC_G_REVNP0_REV5NP_Msk (0xf00000UL) /*!< VADC_G REVNP0: REV5NP (Bitfield-Mask: 0x0f) */ +#define VADC_G_REVNP0_REV6NP_Pos (24UL) /*!< VADC_G REVNP0: REV6NP (Bit 24) */ +#define VADC_G_REVNP0_REV6NP_Msk (0xf000000UL) /*!< VADC_G REVNP0: REV6NP (Bitfield-Mask: 0x0f) */ +#define VADC_G_REVNP0_REV7NP_Pos (28UL) /*!< VADC_G REVNP0: REV7NP (Bit 28) */ +#define VADC_G_REVNP0_REV7NP_Msk (0xf0000000UL) /*!< VADC_G REVNP0: REV7NP (Bitfield-Mask: 0x0f) */ + +/* -------------------------------- VADC_G_REVNP1 ------------------------------- */ +#define VADC_G_REVNP1_REV8NP_Pos (0UL) /*!< VADC_G REVNP1: REV8NP (Bit 0) */ +#define VADC_G_REVNP1_REV8NP_Msk (0xfUL) /*!< VADC_G REVNP1: REV8NP (Bitfield-Mask: 0x0f) */ +#define VADC_G_REVNP1_REV9NP_Pos (4UL) /*!< VADC_G REVNP1: REV9NP (Bit 4) */ +#define VADC_G_REVNP1_REV9NP_Msk (0xf0UL) /*!< VADC_G REVNP1: REV9NP (Bitfield-Mask: 0x0f) */ +#define VADC_G_REVNP1_REV10NP_Pos (8UL) /*!< VADC_G REVNP1: REV10NP (Bit 8) */ +#define VADC_G_REVNP1_REV10NP_Msk (0xf00UL) /*!< VADC_G REVNP1: REV10NP (Bitfield-Mask: 0x0f) */ +#define VADC_G_REVNP1_REV11NP_Pos (12UL) /*!< VADC_G REVNP1: REV11NP (Bit 12) */ +#define VADC_G_REVNP1_REV11NP_Msk (0xf000UL) /*!< VADC_G REVNP1: REV11NP (Bitfield-Mask: 0x0f) */ +#define VADC_G_REVNP1_REV12NP_Pos (16UL) /*!< VADC_G REVNP1: REV12NP (Bit 16) */ +#define VADC_G_REVNP1_REV12NP_Msk (0xf0000UL) /*!< VADC_G REVNP1: REV12NP (Bitfield-Mask: 0x0f) */ +#define VADC_G_REVNP1_REV13NP_Pos (20UL) /*!< VADC_G REVNP1: REV13NP (Bit 20) */ +#define VADC_G_REVNP1_REV13NP_Msk (0xf00000UL) /*!< VADC_G REVNP1: REV13NP (Bitfield-Mask: 0x0f) */ +#define VADC_G_REVNP1_REV14NP_Pos (24UL) /*!< VADC_G REVNP1: REV14NP (Bit 24) */ +#define VADC_G_REVNP1_REV14NP_Msk (0xf000000UL) /*!< VADC_G REVNP1: REV14NP (Bitfield-Mask: 0x0f) */ +#define VADC_G_REVNP1_REV15NP_Pos (28UL) /*!< VADC_G REVNP1: REV15NP (Bit 28) */ +#define VADC_G_REVNP1_REV15NP_Msk (0xf0000000UL) /*!< VADC_G REVNP1: REV15NP (Bitfield-Mask: 0x0f) */ + +/* -------------------------------- VADC_G_SEVNP -------------------------------- */ +#define VADC_G_SEVNP_SEV0NP_Pos (0UL) /*!< VADC_G SEVNP: SEV0NP (Bit 0) */ +#define VADC_G_SEVNP_SEV0NP_Msk (0xfUL) /*!< VADC_G SEVNP: SEV0NP (Bitfield-Mask: 0x0f) */ +#define VADC_G_SEVNP_SEV1NP_Pos (4UL) /*!< VADC_G SEVNP: SEV1NP (Bit 4) */ +#define VADC_G_SEVNP_SEV1NP_Msk (0xf0UL) /*!< VADC_G SEVNP: SEV1NP (Bitfield-Mask: 0x0f) */ + +/* -------------------------------- VADC_G_SRACT -------------------------------- */ +#define VADC_G_SRACT_AGSR0_Pos (0UL) /*!< VADC_G SRACT: AGSR0 (Bit 0) */ +#define VADC_G_SRACT_AGSR0_Msk (0x1UL) /*!< VADC_G SRACT: AGSR0 (Bitfield-Mask: 0x01) */ +#define VADC_G_SRACT_AGSR1_Pos (1UL) /*!< VADC_G SRACT: AGSR1 (Bit 1) */ +#define VADC_G_SRACT_AGSR1_Msk (0x2UL) /*!< VADC_G SRACT: AGSR1 (Bitfield-Mask: 0x01) */ +#define VADC_G_SRACT_AGSR2_Pos (2UL) /*!< VADC_G SRACT: AGSR2 (Bit 2) */ +#define VADC_G_SRACT_AGSR2_Msk (0x4UL) /*!< VADC_G SRACT: AGSR2 (Bitfield-Mask: 0x01) */ +#define VADC_G_SRACT_AGSR3_Pos (3UL) /*!< VADC_G SRACT: AGSR3 (Bit 3) */ +#define VADC_G_SRACT_AGSR3_Msk (0x8UL) /*!< VADC_G SRACT: AGSR3 (Bitfield-Mask: 0x01) */ +#define VADC_G_SRACT_ASSR0_Pos (8UL) /*!< VADC_G SRACT: ASSR0 (Bit 8) */ +#define VADC_G_SRACT_ASSR0_Msk (0x100UL) /*!< VADC_G SRACT: ASSR0 (Bitfield-Mask: 0x01) */ +#define VADC_G_SRACT_ASSR1_Pos (9UL) /*!< VADC_G SRACT: ASSR1 (Bit 9) */ +#define VADC_G_SRACT_ASSR1_Msk (0x200UL) /*!< VADC_G SRACT: ASSR1 (Bitfield-Mask: 0x01) */ +#define VADC_G_SRACT_ASSR2_Pos (10UL) /*!< VADC_G SRACT: ASSR2 (Bit 10) */ +#define VADC_G_SRACT_ASSR2_Msk (0x400UL) /*!< VADC_G SRACT: ASSR2 (Bitfield-Mask: 0x01) */ +#define VADC_G_SRACT_ASSR3_Pos (11UL) /*!< VADC_G SRACT: ASSR3 (Bit 11) */ +#define VADC_G_SRACT_ASSR3_Msk (0x800UL) /*!< VADC_G SRACT: ASSR3 (Bitfield-Mask: 0x01) */ + +/* ------------------------------- VADC_G_EMUXCTR ------------------------------- */ +#define VADC_G_EMUXCTR_EMUXSET_Pos (0UL) /*!< VADC_G EMUXCTR: EMUXSET (Bit 0) */ +#define VADC_G_EMUXCTR_EMUXSET_Msk (0x7UL) /*!< VADC_G EMUXCTR: EMUXSET (Bitfield-Mask: 0x07) */ +#define VADC_G_EMUXCTR_EMUXACT_Pos (8UL) /*!< VADC_G EMUXCTR: EMUXACT (Bit 8) */ +#define VADC_G_EMUXCTR_EMUXACT_Msk (0x700UL) /*!< VADC_G EMUXCTR: EMUXACT (Bitfield-Mask: 0x07) */ +#define VADC_G_EMUXCTR_EMUXCH_Pos (16UL) /*!< VADC_G EMUXCTR: EMUXCH (Bit 16) */ +#define VADC_G_EMUXCTR_EMUXCH_Msk (0x3ff0000UL) /*!< VADC_G EMUXCTR: EMUXCH (Bitfield-Mask: 0x3ff) */ +#define VADC_G_EMUXCTR_EMUXMODE_Pos (26UL) /*!< VADC_G EMUXCTR: EMUXMODE (Bit 26) */ +#define VADC_G_EMUXCTR_EMUXMODE_Msk (0xc000000UL) /*!< VADC_G EMUXCTR: EMUXMODE (Bitfield-Mask: 0x03) */ +#define VADC_G_EMUXCTR_EMXCOD_Pos (28UL) /*!< VADC_G EMUXCTR: EMXCOD (Bit 28) */ +#define VADC_G_EMUXCTR_EMXCOD_Msk (0x10000000UL) /*!< VADC_G EMUXCTR: EMXCOD (Bitfield-Mask: 0x01) */ +#define VADC_G_EMUXCTR_EMXST_Pos (29UL) /*!< VADC_G EMUXCTR: EMXST (Bit 29) */ +#define VADC_G_EMUXCTR_EMXST_Msk (0x20000000UL) /*!< VADC_G EMUXCTR: EMXST (Bitfield-Mask: 0x01) */ +#define VADC_G_EMUXCTR_EMXCSS_Pos (30UL) /*!< VADC_G EMUXCTR: EMXCSS (Bit 30) */ +#define VADC_G_EMUXCTR_EMXCSS_Msk (0x40000000UL) /*!< VADC_G EMUXCTR: EMXCSS (Bitfield-Mask: 0x01) */ +#define VADC_G_EMUXCTR_EMXWC_Pos (31UL) /*!< VADC_G EMUXCTR: EMXWC (Bit 31) */ +#define VADC_G_EMUXCTR_EMXWC_Msk (0x80000000UL) /*!< VADC_G EMUXCTR: EMXWC (Bitfield-Mask: 0x01) */ + +/* --------------------------------- VADC_G_VFR --------------------------------- */ +#define VADC_G_VFR_VF0_Pos (0UL) /*!< VADC_G VFR: VF0 (Bit 0) */ +#define VADC_G_VFR_VF0_Msk (0x1UL) /*!< VADC_G VFR: VF0 (Bitfield-Mask: 0x01) */ +#define VADC_G_VFR_VF1_Pos (1UL) /*!< VADC_G VFR: VF1 (Bit 1) */ +#define VADC_G_VFR_VF1_Msk (0x2UL) /*!< VADC_G VFR: VF1 (Bitfield-Mask: 0x01) */ +#define VADC_G_VFR_VF2_Pos (2UL) /*!< VADC_G VFR: VF2 (Bit 2) */ +#define VADC_G_VFR_VF2_Msk (0x4UL) /*!< VADC_G VFR: VF2 (Bitfield-Mask: 0x01) */ +#define VADC_G_VFR_VF3_Pos (3UL) /*!< VADC_G VFR: VF3 (Bit 3) */ +#define VADC_G_VFR_VF3_Msk (0x8UL) /*!< VADC_G VFR: VF3 (Bitfield-Mask: 0x01) */ +#define VADC_G_VFR_VF4_Pos (4UL) /*!< VADC_G VFR: VF4 (Bit 4) */ +#define VADC_G_VFR_VF4_Msk (0x10UL) /*!< VADC_G VFR: VF4 (Bitfield-Mask: 0x01) */ +#define VADC_G_VFR_VF5_Pos (5UL) /*!< VADC_G VFR: VF5 (Bit 5) */ +#define VADC_G_VFR_VF5_Msk (0x20UL) /*!< VADC_G VFR: VF5 (Bitfield-Mask: 0x01) */ +#define VADC_G_VFR_VF6_Pos (6UL) /*!< VADC_G VFR: VF6 (Bit 6) */ +#define VADC_G_VFR_VF6_Msk (0x40UL) /*!< VADC_G VFR: VF6 (Bitfield-Mask: 0x01) */ +#define VADC_G_VFR_VF7_Pos (7UL) /*!< VADC_G VFR: VF7 (Bit 7) */ +#define VADC_G_VFR_VF7_Msk (0x80UL) /*!< VADC_G VFR: VF7 (Bitfield-Mask: 0x01) */ +#define VADC_G_VFR_VF8_Pos (8UL) /*!< VADC_G VFR: VF8 (Bit 8) */ +#define VADC_G_VFR_VF8_Msk (0x100UL) /*!< VADC_G VFR: VF8 (Bitfield-Mask: 0x01) */ +#define VADC_G_VFR_VF9_Pos (9UL) /*!< VADC_G VFR: VF9 (Bit 9) */ +#define VADC_G_VFR_VF9_Msk (0x200UL) /*!< VADC_G VFR: VF9 (Bitfield-Mask: 0x01) */ +#define VADC_G_VFR_VF10_Pos (10UL) /*!< VADC_G VFR: VF10 (Bit 10) */ +#define VADC_G_VFR_VF10_Msk (0x400UL) /*!< VADC_G VFR: VF10 (Bitfield-Mask: 0x01) */ +#define VADC_G_VFR_VF11_Pos (11UL) /*!< VADC_G VFR: VF11 (Bit 11) */ +#define VADC_G_VFR_VF11_Msk (0x800UL) /*!< VADC_G VFR: VF11 (Bitfield-Mask: 0x01) */ +#define VADC_G_VFR_VF12_Pos (12UL) /*!< VADC_G VFR: VF12 (Bit 12) */ +#define VADC_G_VFR_VF12_Msk (0x1000UL) /*!< VADC_G VFR: VF12 (Bitfield-Mask: 0x01) */ +#define VADC_G_VFR_VF13_Pos (13UL) /*!< VADC_G VFR: VF13 (Bit 13) */ +#define VADC_G_VFR_VF13_Msk (0x2000UL) /*!< VADC_G VFR: VF13 (Bitfield-Mask: 0x01) */ +#define VADC_G_VFR_VF14_Pos (14UL) /*!< VADC_G VFR: VF14 (Bit 14) */ +#define VADC_G_VFR_VF14_Msk (0x4000UL) /*!< VADC_G VFR: VF14 (Bitfield-Mask: 0x01) */ +#define VADC_G_VFR_VF15_Pos (15UL) /*!< VADC_G VFR: VF15 (Bit 15) */ +#define VADC_G_VFR_VF15_Msk (0x8000UL) /*!< VADC_G VFR: VF15 (Bitfield-Mask: 0x01) */ + +/* -------------------------------- VADC_G_CHCTR -------------------------------- */ +#define VADC_G_CHCTR_ICLSEL_Pos (0UL) /*!< VADC_G CHCTR: ICLSEL (Bit 0) */ +#define VADC_G_CHCTR_ICLSEL_Msk (0x3UL) /*!< VADC_G CHCTR: ICLSEL (Bitfield-Mask: 0x03) */ +#define VADC_G_CHCTR_BNDSELL_Pos (4UL) /*!< VADC_G CHCTR: BNDSELL (Bit 4) */ +#define VADC_G_CHCTR_BNDSELL_Msk (0x30UL) /*!< VADC_G CHCTR: BNDSELL (Bitfield-Mask: 0x03) */ +#define VADC_G_CHCTR_BNDSELU_Pos (6UL) /*!< VADC_G CHCTR: BNDSELU (Bit 6) */ +#define VADC_G_CHCTR_BNDSELU_Msk (0xc0UL) /*!< VADC_G CHCTR: BNDSELU (Bitfield-Mask: 0x03) */ +#define VADC_G_CHCTR_CHEVMODE_Pos (8UL) /*!< VADC_G CHCTR: CHEVMODE (Bit 8) */ +#define VADC_G_CHCTR_CHEVMODE_Msk (0x300UL) /*!< VADC_G CHCTR: CHEVMODE (Bitfield-Mask: 0x03) */ +#define VADC_G_CHCTR_SYNC_Pos (10UL) /*!< VADC_G CHCTR: SYNC (Bit 10) */ +#define VADC_G_CHCTR_SYNC_Msk (0x400UL) /*!< VADC_G CHCTR: SYNC (Bitfield-Mask: 0x01) */ +#define VADC_G_CHCTR_REFSEL_Pos (11UL) /*!< VADC_G CHCTR: REFSEL (Bit 11) */ +#define VADC_G_CHCTR_REFSEL_Msk (0x800UL) /*!< VADC_G CHCTR: REFSEL (Bitfield-Mask: 0x01) */ +#define VADC_G_CHCTR_RESREG_Pos (16UL) /*!< VADC_G CHCTR: RESREG (Bit 16) */ +#define VADC_G_CHCTR_RESREG_Msk (0xf0000UL) /*!< VADC_G CHCTR: RESREG (Bitfield-Mask: 0x0f) */ +#define VADC_G_CHCTR_RESTBS_Pos (20UL) /*!< VADC_G CHCTR: RESTBS (Bit 20) */ +#define VADC_G_CHCTR_RESTBS_Msk (0x100000UL) /*!< VADC_G CHCTR: RESTBS (Bitfield-Mask: 0x01) */ +#define VADC_G_CHCTR_RESPOS_Pos (21UL) /*!< VADC_G CHCTR: RESPOS (Bit 21) */ +#define VADC_G_CHCTR_RESPOS_Msk (0x200000UL) /*!< VADC_G CHCTR: RESPOS (Bitfield-Mask: 0x01) */ +#define VADC_G_CHCTR_BWDCH_Pos (28UL) /*!< VADC_G CHCTR: BWDCH (Bit 28) */ +#define VADC_G_CHCTR_BWDCH_Msk (0x30000000UL) /*!< VADC_G CHCTR: BWDCH (Bitfield-Mask: 0x03) */ +#define VADC_G_CHCTR_BWDEN_Pos (30UL) /*!< VADC_G CHCTR: BWDEN (Bit 30) */ +#define VADC_G_CHCTR_BWDEN_Msk (0x40000000UL) /*!< VADC_G CHCTR: BWDEN (Bitfield-Mask: 0x01) */ + +/* --------------------------------- VADC_G_RCR --------------------------------- */ +#define VADC_G_RCR_DRCTR_Pos (16UL) /*!< VADC_G RCR: DRCTR (Bit 16) */ +#define VADC_G_RCR_DRCTR_Msk (0xf0000UL) /*!< VADC_G RCR: DRCTR (Bitfield-Mask: 0x0f) */ +#define VADC_G_RCR_DMM_Pos (20UL) /*!< VADC_G RCR: DMM (Bit 20) */ +#define VADC_G_RCR_DMM_Msk (0x300000UL) /*!< VADC_G RCR: DMM (Bitfield-Mask: 0x03) */ +#define VADC_G_RCR_WFR_Pos (24UL) /*!< VADC_G RCR: WFR (Bit 24) */ +#define VADC_G_RCR_WFR_Msk (0x1000000UL) /*!< VADC_G RCR: WFR (Bitfield-Mask: 0x01) */ +#define VADC_G_RCR_FEN_Pos (25UL) /*!< VADC_G RCR: FEN (Bit 25) */ +#define VADC_G_RCR_FEN_Msk (0x6000000UL) /*!< VADC_G RCR: FEN (Bitfield-Mask: 0x03) */ +#define VADC_G_RCR_SRGEN_Pos (31UL) /*!< VADC_G RCR: SRGEN (Bit 31) */ +#define VADC_G_RCR_SRGEN_Msk (0x80000000UL) /*!< VADC_G RCR: SRGEN (Bitfield-Mask: 0x01) */ + +/* --------------------------------- VADC_G_RES --------------------------------- */ +#define VADC_G_RES_RESULT_Pos (0UL) /*!< VADC_G RES: RESULT (Bit 0) */ +#define VADC_G_RES_RESULT_Msk (0xffffUL) /*!< VADC_G RES: RESULT (Bitfield-Mask: 0xffff) */ +#define VADC_G_RES_DRC_Pos (16UL) /*!< VADC_G RES: DRC (Bit 16) */ +#define VADC_G_RES_DRC_Msk (0xf0000UL) /*!< VADC_G RES: DRC (Bitfield-Mask: 0x0f) */ +#define VADC_G_RES_CHNR_Pos (20UL) /*!< VADC_G RES: CHNR (Bit 20) */ +#define VADC_G_RES_CHNR_Msk (0x1f00000UL) /*!< VADC_G RES: CHNR (Bitfield-Mask: 0x1f) */ +#define VADC_G_RES_EMUX_Pos (25UL) /*!< VADC_G RES: EMUX (Bit 25) */ +#define VADC_G_RES_EMUX_Msk (0xe000000UL) /*!< VADC_G RES: EMUX (Bitfield-Mask: 0x07) */ +#define VADC_G_RES_CRS_Pos (28UL) /*!< VADC_G RES: CRS (Bit 28) */ +#define VADC_G_RES_CRS_Msk (0x30000000UL) /*!< VADC_G RES: CRS (Bitfield-Mask: 0x03) */ +#define VADC_G_RES_FCR_Pos (30UL) /*!< VADC_G RES: FCR (Bit 30) */ +#define VADC_G_RES_FCR_Msk (0x40000000UL) /*!< VADC_G RES: FCR (Bitfield-Mask: 0x01) */ +#define VADC_G_RES_VF_Pos (31UL) /*!< VADC_G RES: VF (Bit 31) */ +#define VADC_G_RES_VF_Msk (0x80000000UL) /*!< VADC_G RES: VF (Bitfield-Mask: 0x01) */ + +/* --------------------------------- VADC_G_RESD -------------------------------- */ +#define VADC_G_RESD_RESULT_Pos (0UL) /*!< VADC_G RESD: RESULT (Bit 0) */ +#define VADC_G_RESD_RESULT_Msk (0xffffUL) /*!< VADC_G RESD: RESULT (Bitfield-Mask: 0xffff) */ +#define VADC_G_RESD_DRC_Pos (16UL) /*!< VADC_G RESD: DRC (Bit 16) */ +#define VADC_G_RESD_DRC_Msk (0xf0000UL) /*!< VADC_G RESD: DRC (Bitfield-Mask: 0x0f) */ +#define VADC_G_RESD_CHNR_Pos (20UL) /*!< VADC_G RESD: CHNR (Bit 20) */ +#define VADC_G_RESD_CHNR_Msk (0x1f00000UL) /*!< VADC_G RESD: CHNR (Bitfield-Mask: 0x1f) */ +#define VADC_G_RESD_EMUX_Pos (25UL) /*!< VADC_G RESD: EMUX (Bit 25) */ +#define VADC_G_RESD_EMUX_Msk (0xe000000UL) /*!< VADC_G RESD: EMUX (Bitfield-Mask: 0x07) */ +#define VADC_G_RESD_CRS_Pos (28UL) /*!< VADC_G RESD: CRS (Bit 28) */ +#define VADC_G_RESD_CRS_Msk (0x30000000UL) /*!< VADC_G RESD: CRS (Bitfield-Mask: 0x03) */ +#define VADC_G_RESD_FCR_Pos (30UL) /*!< VADC_G RESD: FCR (Bit 30) */ +#define VADC_G_RESD_FCR_Msk (0x40000000UL) /*!< VADC_G RESD: FCR (Bitfield-Mask: 0x01) */ +#define VADC_G_RESD_VF_Pos (31UL) /*!< VADC_G RESD: VF (Bit 31) */ +#define VADC_G_RESD_VF_Msk (0x80000000UL) /*!< VADC_G RESD: VF (Bitfield-Mask: 0x01) */ + + +/* ================================================================================ */ +/* ================ struct 'DSD' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ----------------------------------- DSD_CLC ---------------------------------- */ +#define DSD_CLC_DISR_Pos (0UL) /*!< DSD CLC: DISR (Bit 0) */ +#define DSD_CLC_DISR_Msk (0x1UL) /*!< DSD CLC: DISR (Bitfield-Mask: 0x01) */ +#define DSD_CLC_DISS_Pos (1UL) /*!< DSD CLC: DISS (Bit 1) */ +#define DSD_CLC_DISS_Msk (0x2UL) /*!< DSD CLC: DISS (Bitfield-Mask: 0x01) */ +#define DSD_CLC_EDIS_Pos (3UL) /*!< DSD CLC: EDIS (Bit 3) */ +#define DSD_CLC_EDIS_Msk (0x8UL) /*!< DSD CLC: EDIS (Bitfield-Mask: 0x01) */ + +/* ----------------------------------- DSD_ID ----------------------------------- */ +#define DSD_ID_MOD_REV_Pos (0UL) /*!< DSD ID: MOD_REV (Bit 0) */ +#define DSD_ID_MOD_REV_Msk (0xffUL) /*!< DSD ID: MOD_REV (Bitfield-Mask: 0xff) */ +#define DSD_ID_MOD_TYPE_Pos (8UL) /*!< DSD ID: MOD_TYPE (Bit 8) */ +#define DSD_ID_MOD_TYPE_Msk (0xff00UL) /*!< DSD ID: MOD_TYPE (Bitfield-Mask: 0xff) */ +#define DSD_ID_MOD_NUMBER_Pos (16UL) /*!< DSD ID: MOD_NUMBER (Bit 16) */ +#define DSD_ID_MOD_NUMBER_Msk (0xffff0000UL) /*!< DSD ID: MOD_NUMBER (Bitfield-Mask: 0xffff) */ + +/* ----------------------------------- DSD_OCS ---------------------------------- */ +#define DSD_OCS_SUS_Pos (24UL) /*!< DSD OCS: SUS (Bit 24) */ +#define DSD_OCS_SUS_Msk (0xf000000UL) /*!< DSD OCS: SUS (Bitfield-Mask: 0x0f) */ +#define DSD_OCS_SUS_P_Pos (28UL) /*!< DSD OCS: SUS_P (Bit 28) */ +#define DSD_OCS_SUS_P_Msk (0x10000000UL) /*!< DSD OCS: SUS_P (Bitfield-Mask: 0x01) */ +#define DSD_OCS_SUSSTA_Pos (29UL) /*!< DSD OCS: SUSSTA (Bit 29) */ +#define DSD_OCS_SUSSTA_Msk (0x20000000UL) /*!< DSD OCS: SUSSTA (Bitfield-Mask: 0x01) */ + +/* --------------------------------- DSD_GLOBCFG -------------------------------- */ +#define DSD_GLOBCFG_MCSEL_Pos (0UL) /*!< DSD GLOBCFG: MCSEL (Bit 0) */ +#define DSD_GLOBCFG_MCSEL_Msk (0x7UL) /*!< DSD GLOBCFG: MCSEL (Bitfield-Mask: 0x07) */ + +/* --------------------------------- DSD_GLOBRC --------------------------------- */ +#define DSD_GLOBRC_CH0RUN_Pos (0UL) /*!< DSD GLOBRC: CH0RUN (Bit 0) */ +#define DSD_GLOBRC_CH0RUN_Msk (0x1UL) /*!< DSD GLOBRC: CH0RUN (Bitfield-Mask: 0x01) */ +#define DSD_GLOBRC_CH1RUN_Pos (1UL) /*!< DSD GLOBRC: CH1RUN (Bit 1) */ +#define DSD_GLOBRC_CH1RUN_Msk (0x2UL) /*!< DSD GLOBRC: CH1RUN (Bitfield-Mask: 0x01) */ +#define DSD_GLOBRC_CH2RUN_Pos (2UL) /*!< DSD GLOBRC: CH2RUN (Bit 2) */ +#define DSD_GLOBRC_CH2RUN_Msk (0x4UL) /*!< DSD GLOBRC: CH2RUN (Bitfield-Mask: 0x01) */ +#define DSD_GLOBRC_CH3RUN_Pos (3UL) /*!< DSD GLOBRC: CH3RUN (Bit 3) */ +#define DSD_GLOBRC_CH3RUN_Msk (0x8UL) /*!< DSD GLOBRC: CH3RUN (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- DSD_CGCFG --------------------------------- */ +#define DSD_CGCFG_CGMOD_Pos (0UL) /*!< DSD CGCFG: CGMOD (Bit 0) */ +#define DSD_CGCFG_CGMOD_Msk (0x3UL) /*!< DSD CGCFG: CGMOD (Bitfield-Mask: 0x03) */ +#define DSD_CGCFG_BREV_Pos (2UL) /*!< DSD CGCFG: BREV (Bit 2) */ +#define DSD_CGCFG_BREV_Msk (0x4UL) /*!< DSD CGCFG: BREV (Bitfield-Mask: 0x01) */ +#define DSD_CGCFG_SIGPOL_Pos (3UL) /*!< DSD CGCFG: SIGPOL (Bit 3) */ +#define DSD_CGCFG_SIGPOL_Msk (0x8UL) /*!< DSD CGCFG: SIGPOL (Bitfield-Mask: 0x01) */ +#define DSD_CGCFG_DIVCG_Pos (4UL) /*!< DSD CGCFG: DIVCG (Bit 4) */ +#define DSD_CGCFG_DIVCG_Msk (0xf0UL) /*!< DSD CGCFG: DIVCG (Bitfield-Mask: 0x0f) */ +#define DSD_CGCFG_RUN_Pos (15UL) /*!< DSD CGCFG: RUN (Bit 15) */ +#define DSD_CGCFG_RUN_Msk (0x8000UL) /*!< DSD CGCFG: RUN (Bitfield-Mask: 0x01) */ +#define DSD_CGCFG_BITCOUNT_Pos (16UL) /*!< DSD CGCFG: BITCOUNT (Bit 16) */ +#define DSD_CGCFG_BITCOUNT_Msk (0x1f0000UL) /*!< DSD CGCFG: BITCOUNT (Bitfield-Mask: 0x1f) */ +#define DSD_CGCFG_STEPCOUNT_Pos (24UL) /*!< DSD CGCFG: STEPCOUNT (Bit 24) */ +#define DSD_CGCFG_STEPCOUNT_Msk (0xf000000UL) /*!< DSD CGCFG: STEPCOUNT (Bitfield-Mask: 0x0f) */ +#define DSD_CGCFG_STEPS_Pos (28UL) /*!< DSD CGCFG: STEPS (Bit 28) */ +#define DSD_CGCFG_STEPS_Msk (0x10000000UL) /*!< DSD CGCFG: STEPS (Bitfield-Mask: 0x01) */ +#define DSD_CGCFG_STEPD_Pos (29UL) /*!< DSD CGCFG: STEPD (Bit 29) */ +#define DSD_CGCFG_STEPD_Msk (0x20000000UL) /*!< DSD CGCFG: STEPD (Bitfield-Mask: 0x01) */ +#define DSD_CGCFG_SGNCG_Pos (30UL) /*!< DSD CGCFG: SGNCG (Bit 30) */ +#define DSD_CGCFG_SGNCG_Msk (0x40000000UL) /*!< DSD CGCFG: SGNCG (Bitfield-Mask: 0x01) */ + +/* --------------------------------- DSD_EVFLAG --------------------------------- */ +#define DSD_EVFLAG_RESEV0_Pos (0UL) /*!< DSD EVFLAG: RESEV0 (Bit 0) */ +#define DSD_EVFLAG_RESEV0_Msk (0x1UL) /*!< DSD EVFLAG: RESEV0 (Bitfield-Mask: 0x01) */ +#define DSD_EVFLAG_RESEV1_Pos (1UL) /*!< DSD EVFLAG: RESEV1 (Bit 1) */ +#define DSD_EVFLAG_RESEV1_Msk (0x2UL) /*!< DSD EVFLAG: RESEV1 (Bitfield-Mask: 0x01) */ +#define DSD_EVFLAG_RESEV2_Pos (2UL) /*!< DSD EVFLAG: RESEV2 (Bit 2) */ +#define DSD_EVFLAG_RESEV2_Msk (0x4UL) /*!< DSD EVFLAG: RESEV2 (Bitfield-Mask: 0x01) */ +#define DSD_EVFLAG_RESEV3_Pos (3UL) /*!< DSD EVFLAG: RESEV3 (Bit 3) */ +#define DSD_EVFLAG_RESEV3_Msk (0x8UL) /*!< DSD EVFLAG: RESEV3 (Bitfield-Mask: 0x01) */ +#define DSD_EVFLAG_ALEV0_Pos (16UL) /*!< DSD EVFLAG: ALEV0 (Bit 16) */ +#define DSD_EVFLAG_ALEV0_Msk (0x10000UL) /*!< DSD EVFLAG: ALEV0 (Bitfield-Mask: 0x01) */ +#define DSD_EVFLAG_ALEV1_Pos (17UL) /*!< DSD EVFLAG: ALEV1 (Bit 17) */ +#define DSD_EVFLAG_ALEV1_Msk (0x20000UL) /*!< DSD EVFLAG: ALEV1 (Bitfield-Mask: 0x01) */ +#define DSD_EVFLAG_ALEV2_Pos (18UL) /*!< DSD EVFLAG: ALEV2 (Bit 18) */ +#define DSD_EVFLAG_ALEV2_Msk (0x40000UL) /*!< DSD EVFLAG: ALEV2 (Bitfield-Mask: 0x01) */ +#define DSD_EVFLAG_ALEV3_Pos (19UL) /*!< DSD EVFLAG: ALEV3 (Bit 19) */ +#define DSD_EVFLAG_ALEV3_Msk (0x80000UL) /*!< DSD EVFLAG: ALEV3 (Bitfield-Mask: 0x01) */ + +/* -------------------------------- DSD_EVFLAGCLR ------------------------------- */ +#define DSD_EVFLAGCLR_RESEC0_Pos (0UL) /*!< DSD EVFLAGCLR: RESEC0 (Bit 0) */ +#define DSD_EVFLAGCLR_RESEC0_Msk (0x1UL) /*!< DSD EVFLAGCLR: RESEC0 (Bitfield-Mask: 0x01) */ +#define DSD_EVFLAGCLR_RESEC1_Pos (1UL) /*!< DSD EVFLAGCLR: RESEC1 (Bit 1) */ +#define DSD_EVFLAGCLR_RESEC1_Msk (0x2UL) /*!< DSD EVFLAGCLR: RESEC1 (Bitfield-Mask: 0x01) */ +#define DSD_EVFLAGCLR_RESEC2_Pos (2UL) /*!< DSD EVFLAGCLR: RESEC2 (Bit 2) */ +#define DSD_EVFLAGCLR_RESEC2_Msk (0x4UL) /*!< DSD EVFLAGCLR: RESEC2 (Bitfield-Mask: 0x01) */ +#define DSD_EVFLAGCLR_RESEC3_Pos (3UL) /*!< DSD EVFLAGCLR: RESEC3 (Bit 3) */ +#define DSD_EVFLAGCLR_RESEC3_Msk (0x8UL) /*!< DSD EVFLAGCLR: RESEC3 (Bitfield-Mask: 0x01) */ +#define DSD_EVFLAGCLR_ALEC0_Pos (16UL) /*!< DSD EVFLAGCLR: ALEC0 (Bit 16) */ +#define DSD_EVFLAGCLR_ALEC0_Msk (0x10000UL) /*!< DSD EVFLAGCLR: ALEC0 (Bitfield-Mask: 0x01) */ +#define DSD_EVFLAGCLR_ALEC1_Pos (17UL) /*!< DSD EVFLAGCLR: ALEC1 (Bit 17) */ +#define DSD_EVFLAGCLR_ALEC1_Msk (0x20000UL) /*!< DSD EVFLAGCLR: ALEC1 (Bitfield-Mask: 0x01) */ +#define DSD_EVFLAGCLR_ALEC2_Pos (18UL) /*!< DSD EVFLAGCLR: ALEC2 (Bit 18) */ +#define DSD_EVFLAGCLR_ALEC2_Msk (0x40000UL) /*!< DSD EVFLAGCLR: ALEC2 (Bitfield-Mask: 0x01) */ +#define DSD_EVFLAGCLR_ALEC3_Pos (19UL) /*!< DSD EVFLAGCLR: ALEC3 (Bit 19) */ +#define DSD_EVFLAGCLR_ALEC3_Msk (0x80000UL) /*!< DSD EVFLAGCLR: ALEC3 (Bitfield-Mask: 0x01) */ + + +/* ================================================================================ */ +/* ================ Group 'DSD_CH' Position & Mask ================ */ +/* ================================================================================ */ + + +/* -------------------------------- DSD_CH_MODCFG ------------------------------- */ +#define DSD_CH_MODCFG_DIVM_Pos (16UL) /*!< DSD_CH MODCFG: DIVM (Bit 16) */ +#define DSD_CH_MODCFG_DIVM_Msk (0xf0000UL) /*!< DSD_CH MODCFG: DIVM (Bitfield-Mask: 0x0f) */ +#define DSD_CH_MODCFG_DWC_Pos (23UL) /*!< DSD_CH MODCFG: DWC (Bit 23) */ +#define DSD_CH_MODCFG_DWC_Msk (0x800000UL) /*!< DSD_CH MODCFG: DWC (Bitfield-Mask: 0x01) */ + +/* -------------------------------- DSD_CH_DICFG -------------------------------- */ +#define DSD_CH_DICFG_DSRC_Pos (0UL) /*!< DSD_CH DICFG: DSRC (Bit 0) */ +#define DSD_CH_DICFG_DSRC_Msk (0xfUL) /*!< DSD_CH DICFG: DSRC (Bitfield-Mask: 0x0f) */ +#define DSD_CH_DICFG_DSWC_Pos (7UL) /*!< DSD_CH DICFG: DSWC (Bit 7) */ +#define DSD_CH_DICFG_DSWC_Msk (0x80UL) /*!< DSD_CH DICFG: DSWC (Bitfield-Mask: 0x01) */ +#define DSD_CH_DICFG_ITRMODE_Pos (8UL) /*!< DSD_CH DICFG: ITRMODE (Bit 8) */ +#define DSD_CH_DICFG_ITRMODE_Msk (0x300UL) /*!< DSD_CH DICFG: ITRMODE (Bitfield-Mask: 0x03) */ +#define DSD_CH_DICFG_TSTRMODE_Pos (10UL) /*!< DSD_CH DICFG: TSTRMODE (Bit 10) */ +#define DSD_CH_DICFG_TSTRMODE_Msk (0xc00UL) /*!< DSD_CH DICFG: TSTRMODE (Bitfield-Mask: 0x03) */ +#define DSD_CH_DICFG_TRSEL_Pos (12UL) /*!< DSD_CH DICFG: TRSEL (Bit 12) */ +#define DSD_CH_DICFG_TRSEL_Msk (0x7000UL) /*!< DSD_CH DICFG: TRSEL (Bitfield-Mask: 0x07) */ +#define DSD_CH_DICFG_TRWC_Pos (15UL) /*!< DSD_CH DICFG: TRWC (Bit 15) */ +#define DSD_CH_DICFG_TRWC_Msk (0x8000UL) /*!< DSD_CH DICFG: TRWC (Bitfield-Mask: 0x01) */ +#define DSD_CH_DICFG_CSRC_Pos (16UL) /*!< DSD_CH DICFG: CSRC (Bit 16) */ +#define DSD_CH_DICFG_CSRC_Msk (0xf0000UL) /*!< DSD_CH DICFG: CSRC (Bitfield-Mask: 0x0f) */ +#define DSD_CH_DICFG_STROBE_Pos (20UL) /*!< DSD_CH DICFG: STROBE (Bit 20) */ +#define DSD_CH_DICFG_STROBE_Msk (0xf00000UL) /*!< DSD_CH DICFG: STROBE (Bitfield-Mask: 0x0f) */ +#define DSD_CH_DICFG_SCWC_Pos (31UL) /*!< DSD_CH DICFG: SCWC (Bit 31) */ +#define DSD_CH_DICFG_SCWC_Msk (0x80000000UL) /*!< DSD_CH DICFG: SCWC (Bitfield-Mask: 0x01) */ + +/* -------------------------------- DSD_CH_FCFGC -------------------------------- */ +#define DSD_CH_FCFGC_CFMDF_Pos (0UL) /*!< DSD_CH FCFGC: CFMDF (Bit 0) */ +#define DSD_CH_FCFGC_CFMDF_Msk (0xffUL) /*!< DSD_CH FCFGC: CFMDF (Bitfield-Mask: 0xff) */ +#define DSD_CH_FCFGC_CFMC_Pos (8UL) /*!< DSD_CH FCFGC: CFMC (Bit 8) */ +#define DSD_CH_FCFGC_CFMC_Msk (0x300UL) /*!< DSD_CH FCFGC: CFMC (Bitfield-Mask: 0x03) */ +#define DSD_CH_FCFGC_CFEN_Pos (10UL) /*!< DSD_CH FCFGC: CFEN (Bit 10) */ +#define DSD_CH_FCFGC_CFEN_Msk (0x400UL) /*!< DSD_CH FCFGC: CFEN (Bitfield-Mask: 0x01) */ +#define DSD_CH_FCFGC_SRGM_Pos (14UL) /*!< DSD_CH FCFGC: SRGM (Bit 14) */ +#define DSD_CH_FCFGC_SRGM_Msk (0xc000UL) /*!< DSD_CH FCFGC: SRGM (Bitfield-Mask: 0x03) */ +#define DSD_CH_FCFGC_CFMSV_Pos (16UL) /*!< DSD_CH FCFGC: CFMSV (Bit 16) */ +#define DSD_CH_FCFGC_CFMSV_Msk (0xff0000UL) /*!< DSD_CH FCFGC: CFMSV (Bitfield-Mask: 0xff) */ +#define DSD_CH_FCFGC_CFMDCNT_Pos (24UL) /*!< DSD_CH FCFGC: CFMDCNT (Bit 24) */ +#define DSD_CH_FCFGC_CFMDCNT_Msk (0xff000000UL) /*!< DSD_CH FCFGC: CFMDCNT (Bitfield-Mask: 0xff) */ + +/* -------------------------------- DSD_CH_FCFGA -------------------------------- */ +#define DSD_CH_FCFGA_CFADF_Pos (0UL) /*!< DSD_CH FCFGA: CFADF (Bit 0) */ +#define DSD_CH_FCFGA_CFADF_Msk (0xffUL) /*!< DSD_CH FCFGA: CFADF (Bitfield-Mask: 0xff) */ +#define DSD_CH_FCFGA_CFAC_Pos (8UL) /*!< DSD_CH FCFGA: CFAC (Bit 8) */ +#define DSD_CH_FCFGA_CFAC_Msk (0x300UL) /*!< DSD_CH FCFGA: CFAC (Bitfield-Mask: 0x03) */ +#define DSD_CH_FCFGA_SRGA_Pos (10UL) /*!< DSD_CH FCFGA: SRGA (Bit 10) */ +#define DSD_CH_FCFGA_SRGA_Msk (0xc00UL) /*!< DSD_CH FCFGA: SRGA (Bitfield-Mask: 0x03) */ +#define DSD_CH_FCFGA_ESEL_Pos (12UL) /*!< DSD_CH FCFGA: ESEL (Bit 12) */ +#define DSD_CH_FCFGA_ESEL_Msk (0x3000UL) /*!< DSD_CH FCFGA: ESEL (Bitfield-Mask: 0x03) */ +#define DSD_CH_FCFGA_EGT_Pos (14UL) /*!< DSD_CH FCFGA: EGT (Bit 14) */ +#define DSD_CH_FCFGA_EGT_Msk (0x4000UL) /*!< DSD_CH FCFGA: EGT (Bitfield-Mask: 0x01) */ +#define DSD_CH_FCFGA_CFADCNT_Pos (24UL) /*!< DSD_CH FCFGA: CFADCNT (Bit 24) */ +#define DSD_CH_FCFGA_CFADCNT_Msk (0xff000000UL) /*!< DSD_CH FCFGA: CFADCNT (Bitfield-Mask: 0xff) */ + +/* -------------------------------- DSD_CH_IWCTR -------------------------------- */ +#define DSD_CH_IWCTR_NVALCNT_Pos (0UL) /*!< DSD_CH IWCTR: NVALCNT (Bit 0) */ +#define DSD_CH_IWCTR_NVALCNT_Msk (0x3fUL) /*!< DSD_CH IWCTR: NVALCNT (Bitfield-Mask: 0x3f) */ +#define DSD_CH_IWCTR_INTEN_Pos (7UL) /*!< DSD_CH IWCTR: INTEN (Bit 7) */ +#define DSD_CH_IWCTR_INTEN_Msk (0x80UL) /*!< DSD_CH IWCTR: INTEN (Bitfield-Mask: 0x01) */ +#define DSD_CH_IWCTR_REPCNT_Pos (8UL) /*!< DSD_CH IWCTR: REPCNT (Bit 8) */ +#define DSD_CH_IWCTR_REPCNT_Msk (0xf00UL) /*!< DSD_CH IWCTR: REPCNT (Bitfield-Mask: 0x0f) */ +#define DSD_CH_IWCTR_REPVAL_Pos (12UL) /*!< DSD_CH IWCTR: REPVAL (Bit 12) */ +#define DSD_CH_IWCTR_REPVAL_Msk (0xf000UL) /*!< DSD_CH IWCTR: REPVAL (Bitfield-Mask: 0x0f) */ +#define DSD_CH_IWCTR_NVALDIS_Pos (16UL) /*!< DSD_CH IWCTR: NVALDIS (Bit 16) */ +#define DSD_CH_IWCTR_NVALDIS_Msk (0x3f0000UL) /*!< DSD_CH IWCTR: NVALDIS (Bitfield-Mask: 0x3f) */ +#define DSD_CH_IWCTR_IWS_Pos (23UL) /*!< DSD_CH IWCTR: IWS (Bit 23) */ +#define DSD_CH_IWCTR_IWS_Msk (0x800000UL) /*!< DSD_CH IWCTR: IWS (Bitfield-Mask: 0x01) */ +#define DSD_CH_IWCTR_NVALINT_Pos (24UL) /*!< DSD_CH IWCTR: NVALINT (Bit 24) */ +#define DSD_CH_IWCTR_NVALINT_Msk (0x3f000000UL) /*!< DSD_CH IWCTR: NVALINT (Bitfield-Mask: 0x3f) */ + +/* ------------------------------- DSD_CH_BOUNDSEL ------------------------------ */ +#define DSD_CH_BOUNDSEL_BOUNDARYL_Pos (0UL) /*!< DSD_CH BOUNDSEL: BOUNDARYL (Bit 0) */ +#define DSD_CH_BOUNDSEL_BOUNDARYL_Msk (0xffffUL) /*!< DSD_CH BOUNDSEL: BOUNDARYL (Bitfield-Mask: 0xffff) */ +#define DSD_CH_BOUNDSEL_BOUNDARYU_Pos (16UL) /*!< DSD_CH BOUNDSEL: BOUNDARYU (Bit 16) */ +#define DSD_CH_BOUNDSEL_BOUNDARYU_Msk (0xffff0000UL) /*!< DSD_CH BOUNDSEL: BOUNDARYU (Bitfield-Mask: 0xffff) */ + +/* --------------------------------- DSD_CH_RESM -------------------------------- */ +#define DSD_CH_RESM_RESULT_Pos (0UL) /*!< DSD_CH RESM: RESULT (Bit 0) */ +#define DSD_CH_RESM_RESULT_Msk (0xffffUL) /*!< DSD_CH RESM: RESULT (Bitfield-Mask: 0xffff) */ + +/* --------------------------------- DSD_CH_OFFM -------------------------------- */ +#define DSD_CH_OFFM_OFFSET_Pos (0UL) /*!< DSD_CH OFFM: OFFSET (Bit 0) */ +#define DSD_CH_OFFM_OFFSET_Msk (0xffffUL) /*!< DSD_CH OFFM: OFFSET (Bitfield-Mask: 0xffff) */ + +/* --------------------------------- DSD_CH_RESA -------------------------------- */ +#define DSD_CH_RESA_RESULT_Pos (0UL) /*!< DSD_CH RESA: RESULT (Bit 0) */ +#define DSD_CH_RESA_RESULT_Msk (0xffffUL) /*!< DSD_CH RESA: RESULT (Bitfield-Mask: 0xffff) */ + +/* -------------------------------- DSD_CH_TSTMP -------------------------------- */ +#define DSD_CH_TSTMP_RESULT_Pos (0UL) /*!< DSD_CH TSTMP: RESULT (Bit 0) */ +#define DSD_CH_TSTMP_RESULT_Msk (0xffffUL) /*!< DSD_CH TSTMP: RESULT (Bitfield-Mask: 0xffff) */ +#define DSD_CH_TSTMP_CFMDCNT_Pos (16UL) /*!< DSD_CH TSTMP: CFMDCNT (Bit 16) */ +#define DSD_CH_TSTMP_CFMDCNT_Msk (0xff0000UL) /*!< DSD_CH TSTMP: CFMDCNT (Bitfield-Mask: 0xff) */ +#define DSD_CH_TSTMP_NVALCNT_Pos (24UL) /*!< DSD_CH TSTMP: NVALCNT (Bit 24) */ +#define DSD_CH_TSTMP_NVALCNT_Msk (0x3f000000UL) /*!< DSD_CH TSTMP: NVALCNT (Bitfield-Mask: 0x3f) */ + +/* -------------------------------- DSD_CH_CGSYNC ------------------------------- */ +#define DSD_CH_CGSYNC_SDCOUNT_Pos (0UL) /*!< DSD_CH CGSYNC: SDCOUNT (Bit 0) */ +#define DSD_CH_CGSYNC_SDCOUNT_Msk (0xffUL) /*!< DSD_CH CGSYNC: SDCOUNT (Bitfield-Mask: 0xff) */ +#define DSD_CH_CGSYNC_SDCAP_Pos (8UL) /*!< DSD_CH CGSYNC: SDCAP (Bit 8) */ +#define DSD_CH_CGSYNC_SDCAP_Msk (0xff00UL) /*!< DSD_CH CGSYNC: SDCAP (Bitfield-Mask: 0xff) */ +#define DSD_CH_CGSYNC_SDPOS_Pos (16UL) /*!< DSD_CH CGSYNC: SDPOS (Bit 16) */ +#define DSD_CH_CGSYNC_SDPOS_Msk (0xff0000UL) /*!< DSD_CH CGSYNC: SDPOS (Bitfield-Mask: 0xff) */ +#define DSD_CH_CGSYNC_SDNEG_Pos (24UL) /*!< DSD_CH CGSYNC: SDNEG (Bit 24) */ +#define DSD_CH_CGSYNC_SDNEG_Msk (0xff000000UL) /*!< DSD_CH CGSYNC: SDNEG (Bitfield-Mask: 0xff) */ + +/* ------------------------------- DSD_CH_RECTCFG ------------------------------- */ +#define DSD_CH_RECTCFG_RFEN_Pos (0UL) /*!< DSD_CH RECTCFG: RFEN (Bit 0) */ +#define DSD_CH_RECTCFG_RFEN_Msk (0x1UL) /*!< DSD_CH RECTCFG: RFEN (Bitfield-Mask: 0x01) */ +#define DSD_CH_RECTCFG_SSRC_Pos (4UL) /*!< DSD_CH RECTCFG: SSRC (Bit 4) */ +#define DSD_CH_RECTCFG_SSRC_Msk (0x30UL) /*!< DSD_CH RECTCFG: SSRC (Bitfield-Mask: 0x03) */ +#define DSD_CH_RECTCFG_SDVAL_Pos (15UL) /*!< DSD_CH RECTCFG: SDVAL (Bit 15) */ +#define DSD_CH_RECTCFG_SDVAL_Msk (0x8000UL) /*!< DSD_CH RECTCFG: SDVAL (Bitfield-Mask: 0x01) */ +#define DSD_CH_RECTCFG_SGNCS_Pos (30UL) /*!< DSD_CH RECTCFG: SGNCS (Bit 30) */ +#define DSD_CH_RECTCFG_SGNCS_Msk (0x40000000UL) /*!< DSD_CH RECTCFG: SGNCS (Bitfield-Mask: 0x01) */ +#define DSD_CH_RECTCFG_SGND_Pos (31UL) /*!< DSD_CH RECTCFG: SGND (Bit 31) */ +#define DSD_CH_RECTCFG_SGND_Msk (0x80000000UL) /*!< DSD_CH RECTCFG: SGND (Bitfield-Mask: 0x01) */ + + +/* ================================================================================ */ +/* ================ struct 'DAC' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ----------------------------------- DAC_ID ----------------------------------- */ +#define DAC_ID_MODR_Pos (0UL) /*!< DAC ID: MODR (Bit 0) */ +#define DAC_ID_MODR_Msk (0xffUL) /*!< DAC ID: MODR (Bitfield-Mask: 0xff) */ +#define DAC_ID_MODT_Pos (8UL) /*!< DAC ID: MODT (Bit 8) */ +#define DAC_ID_MODT_Msk (0xff00UL) /*!< DAC ID: MODT (Bitfield-Mask: 0xff) */ +#define DAC_ID_MODN_Pos (16UL) /*!< DAC ID: MODN (Bit 16) */ +#define DAC_ID_MODN_Msk (0xffff0000UL) /*!< DAC ID: MODN (Bitfield-Mask: 0xffff) */ + +/* -------------------------------- DAC_DAC0CFG0 -------------------------------- */ +#define DAC_DAC0CFG0_FREQ_Pos (0UL) /*!< DAC DAC0CFG0: FREQ (Bit 0) */ +#define DAC_DAC0CFG0_FREQ_Msk (0xfffffUL) /*!< DAC DAC0CFG0: FREQ (Bitfield-Mask: 0xfffff) */ +#define DAC_DAC0CFG0_MODE_Pos (20UL) /*!< DAC DAC0CFG0: MODE (Bit 20) */ +#define DAC_DAC0CFG0_MODE_Msk (0x700000UL) /*!< DAC DAC0CFG0: MODE (Bitfield-Mask: 0x07) */ +#define DAC_DAC0CFG0_SIGN_Pos (23UL) /*!< DAC DAC0CFG0: SIGN (Bit 23) */ +#define DAC_DAC0CFG0_SIGN_Msk (0x800000UL) /*!< DAC DAC0CFG0: SIGN (Bitfield-Mask: 0x01) */ +#define DAC_DAC0CFG0_FIFOIND_Pos (24UL) /*!< DAC DAC0CFG0: FIFOIND (Bit 24) */ +#define DAC_DAC0CFG0_FIFOIND_Msk (0x3000000UL) /*!< DAC DAC0CFG0: FIFOIND (Bitfield-Mask: 0x03) */ +#define DAC_DAC0CFG0_FIFOEMP_Pos (26UL) /*!< DAC DAC0CFG0: FIFOEMP (Bit 26) */ +#define DAC_DAC0CFG0_FIFOEMP_Msk (0x4000000UL) /*!< DAC DAC0CFG0: FIFOEMP (Bitfield-Mask: 0x01) */ +#define DAC_DAC0CFG0_FIFOFUL_Pos (27UL) /*!< DAC DAC0CFG0: FIFOFUL (Bit 27) */ +#define DAC_DAC0CFG0_FIFOFUL_Msk (0x8000000UL) /*!< DAC DAC0CFG0: FIFOFUL (Bitfield-Mask: 0x01) */ +#define DAC_DAC0CFG0_NEGATE_Pos (28UL) /*!< DAC DAC0CFG0: NEGATE (Bit 28) */ +#define DAC_DAC0CFG0_NEGATE_Msk (0x10000000UL) /*!< DAC DAC0CFG0: NEGATE (Bitfield-Mask: 0x01) */ +#define DAC_DAC0CFG0_SIGNEN_Pos (29UL) /*!< DAC DAC0CFG0: SIGNEN (Bit 29) */ +#define DAC_DAC0CFG0_SIGNEN_Msk (0x20000000UL) /*!< DAC DAC0CFG0: SIGNEN (Bitfield-Mask: 0x01) */ +#define DAC_DAC0CFG0_SREN_Pos (30UL) /*!< DAC DAC0CFG0: SREN (Bit 30) */ +#define DAC_DAC0CFG0_SREN_Msk (0x40000000UL) /*!< DAC DAC0CFG0: SREN (Bitfield-Mask: 0x01) */ +#define DAC_DAC0CFG0_RUN_Pos (31UL) /*!< DAC DAC0CFG0: RUN (Bit 31) */ +#define DAC_DAC0CFG0_RUN_Msk (0x80000000UL) /*!< DAC DAC0CFG0: RUN (Bitfield-Mask: 0x01) */ + +/* -------------------------------- DAC_DAC0CFG1 -------------------------------- */ +#define DAC_DAC0CFG1_SCALE_Pos (0UL) /*!< DAC DAC0CFG1: SCALE (Bit 0) */ +#define DAC_DAC0CFG1_SCALE_Msk (0x7UL) /*!< DAC DAC0CFG1: SCALE (Bitfield-Mask: 0x07) */ +#define DAC_DAC0CFG1_MULDIV_Pos (3UL) /*!< DAC DAC0CFG1: MULDIV (Bit 3) */ +#define DAC_DAC0CFG1_MULDIV_Msk (0x8UL) /*!< DAC DAC0CFG1: MULDIV (Bitfield-Mask: 0x01) */ +#define DAC_DAC0CFG1_OFFS_Pos (4UL) /*!< DAC DAC0CFG1: OFFS (Bit 4) */ +#define DAC_DAC0CFG1_OFFS_Msk (0xff0UL) /*!< DAC DAC0CFG1: OFFS (Bitfield-Mask: 0xff) */ +#define DAC_DAC0CFG1_TRIGSEL_Pos (12UL) /*!< DAC DAC0CFG1: TRIGSEL (Bit 12) */ +#define DAC_DAC0CFG1_TRIGSEL_Msk (0x7000UL) /*!< DAC DAC0CFG1: TRIGSEL (Bitfield-Mask: 0x07) */ +#define DAC_DAC0CFG1_DATMOD_Pos (15UL) /*!< DAC DAC0CFG1: DATMOD (Bit 15) */ +#define DAC_DAC0CFG1_DATMOD_Msk (0x8000UL) /*!< DAC DAC0CFG1: DATMOD (Bitfield-Mask: 0x01) */ +#define DAC_DAC0CFG1_SWTRIG_Pos (16UL) /*!< DAC DAC0CFG1: SWTRIG (Bit 16) */ +#define DAC_DAC0CFG1_SWTRIG_Msk (0x10000UL) /*!< DAC DAC0CFG1: SWTRIG (Bitfield-Mask: 0x01) */ +#define DAC_DAC0CFG1_TRIGMOD_Pos (17UL) /*!< DAC DAC0CFG1: TRIGMOD (Bit 17) */ +#define DAC_DAC0CFG1_TRIGMOD_Msk (0x60000UL) /*!< DAC DAC0CFG1: TRIGMOD (Bitfield-Mask: 0x03) */ +#define DAC_DAC0CFG1_ANACFG_Pos (19UL) /*!< DAC DAC0CFG1: ANACFG (Bit 19) */ +#define DAC_DAC0CFG1_ANACFG_Msk (0xf80000UL) /*!< DAC DAC0CFG1: ANACFG (Bitfield-Mask: 0x1f) */ +#define DAC_DAC0CFG1_ANAEN_Pos (24UL) /*!< DAC DAC0CFG1: ANAEN (Bit 24) */ +#define DAC_DAC0CFG1_ANAEN_Msk (0x1000000UL) /*!< DAC DAC0CFG1: ANAEN (Bitfield-Mask: 0x01) */ +#define DAC_DAC0CFG1_REFCFGL_Pos (28UL) /*!< DAC DAC0CFG1: REFCFGL (Bit 28) */ +#define DAC_DAC0CFG1_REFCFGL_Msk (0xf0000000UL) /*!< DAC DAC0CFG1: REFCFGL (Bitfield-Mask: 0x0f) */ + +/* -------------------------------- DAC_DAC1CFG0 -------------------------------- */ +#define DAC_DAC1CFG0_FREQ_Pos (0UL) /*!< DAC DAC1CFG0: FREQ (Bit 0) */ +#define DAC_DAC1CFG0_FREQ_Msk (0xfffffUL) /*!< DAC DAC1CFG0: FREQ (Bitfield-Mask: 0xfffff) */ +#define DAC_DAC1CFG0_MODE_Pos (20UL) /*!< DAC DAC1CFG0: MODE (Bit 20) */ +#define DAC_DAC1CFG0_MODE_Msk (0x700000UL) /*!< DAC DAC1CFG0: MODE (Bitfield-Mask: 0x07) */ +#define DAC_DAC1CFG0_SIGN_Pos (23UL) /*!< DAC DAC1CFG0: SIGN (Bit 23) */ +#define DAC_DAC1CFG0_SIGN_Msk (0x800000UL) /*!< DAC DAC1CFG0: SIGN (Bitfield-Mask: 0x01) */ +#define DAC_DAC1CFG0_FIFOIND_Pos (24UL) /*!< DAC DAC1CFG0: FIFOIND (Bit 24) */ +#define DAC_DAC1CFG0_FIFOIND_Msk (0x3000000UL) /*!< DAC DAC1CFG0: FIFOIND (Bitfield-Mask: 0x03) */ +#define DAC_DAC1CFG0_FIFOEMP_Pos (26UL) /*!< DAC DAC1CFG0: FIFOEMP (Bit 26) */ +#define DAC_DAC1CFG0_FIFOEMP_Msk (0x4000000UL) /*!< DAC DAC1CFG0: FIFOEMP (Bitfield-Mask: 0x01) */ +#define DAC_DAC1CFG0_FIFOFUL_Pos (27UL) /*!< DAC DAC1CFG0: FIFOFUL (Bit 27) */ +#define DAC_DAC1CFG0_FIFOFUL_Msk (0x8000000UL) /*!< DAC DAC1CFG0: FIFOFUL (Bitfield-Mask: 0x01) */ +#define DAC_DAC1CFG0_NEGATE_Pos (28UL) /*!< DAC DAC1CFG0: NEGATE (Bit 28) */ +#define DAC_DAC1CFG0_NEGATE_Msk (0x10000000UL) /*!< DAC DAC1CFG0: NEGATE (Bitfield-Mask: 0x01) */ +#define DAC_DAC1CFG0_SIGNEN_Pos (29UL) /*!< DAC DAC1CFG0: SIGNEN (Bit 29) */ +#define DAC_DAC1CFG0_SIGNEN_Msk (0x20000000UL) /*!< DAC DAC1CFG0: SIGNEN (Bitfield-Mask: 0x01) */ +#define DAC_DAC1CFG0_SREN_Pos (30UL) /*!< DAC DAC1CFG0: SREN (Bit 30) */ +#define DAC_DAC1CFG0_SREN_Msk (0x40000000UL) /*!< DAC DAC1CFG0: SREN (Bitfield-Mask: 0x01) */ +#define DAC_DAC1CFG0_RUN_Pos (31UL) /*!< DAC DAC1CFG0: RUN (Bit 31) */ +#define DAC_DAC1CFG0_RUN_Msk (0x80000000UL) /*!< DAC DAC1CFG0: RUN (Bitfield-Mask: 0x01) */ + +/* -------------------------------- DAC_DAC1CFG1 -------------------------------- */ +#define DAC_DAC1CFG1_SCALE_Pos (0UL) /*!< DAC DAC1CFG1: SCALE (Bit 0) */ +#define DAC_DAC1CFG1_SCALE_Msk (0x7UL) /*!< DAC DAC1CFG1: SCALE (Bitfield-Mask: 0x07) */ +#define DAC_DAC1CFG1_MULDIV_Pos (3UL) /*!< DAC DAC1CFG1: MULDIV (Bit 3) */ +#define DAC_DAC1CFG1_MULDIV_Msk (0x8UL) /*!< DAC DAC1CFG1: MULDIV (Bitfield-Mask: 0x01) */ +#define DAC_DAC1CFG1_OFFS_Pos (4UL) /*!< DAC DAC1CFG1: OFFS (Bit 4) */ +#define DAC_DAC1CFG1_OFFS_Msk (0xff0UL) /*!< DAC DAC1CFG1: OFFS (Bitfield-Mask: 0xff) */ +#define DAC_DAC1CFG1_TRIGSEL_Pos (12UL) /*!< DAC DAC1CFG1: TRIGSEL (Bit 12) */ +#define DAC_DAC1CFG1_TRIGSEL_Msk (0x7000UL) /*!< DAC DAC1CFG1: TRIGSEL (Bitfield-Mask: 0x07) */ +#define DAC_DAC1CFG1_SWTRIG_Pos (16UL) /*!< DAC DAC1CFG1: SWTRIG (Bit 16) */ +#define DAC_DAC1CFG1_SWTRIG_Msk (0x10000UL) /*!< DAC DAC1CFG1: SWTRIG (Bitfield-Mask: 0x01) */ +#define DAC_DAC1CFG1_TRIGMOD_Pos (17UL) /*!< DAC DAC1CFG1: TRIGMOD (Bit 17) */ +#define DAC_DAC1CFG1_TRIGMOD_Msk (0x60000UL) /*!< DAC DAC1CFG1: TRIGMOD (Bitfield-Mask: 0x03) */ +#define DAC_DAC1CFG1_ANACFG_Pos (19UL) /*!< DAC DAC1CFG1: ANACFG (Bit 19) */ +#define DAC_DAC1CFG1_ANACFG_Msk (0xf80000UL) /*!< DAC DAC1CFG1: ANACFG (Bitfield-Mask: 0x1f) */ +#define DAC_DAC1CFG1_ANAEN_Pos (24UL) /*!< DAC DAC1CFG1: ANAEN (Bit 24) */ +#define DAC_DAC1CFG1_ANAEN_Msk (0x1000000UL) /*!< DAC DAC1CFG1: ANAEN (Bitfield-Mask: 0x01) */ +#define DAC_DAC1CFG1_REFCFGH_Pos (28UL) /*!< DAC DAC1CFG1: REFCFGH (Bit 28) */ +#define DAC_DAC1CFG1_REFCFGH_Msk (0xf0000000UL) /*!< DAC DAC1CFG1: REFCFGH (Bitfield-Mask: 0x0f) */ + +/* -------------------------------- DAC_DAC0DATA -------------------------------- */ +#define DAC_DAC0DATA_DATA0_Pos (0UL) /*!< DAC DAC0DATA: DATA0 (Bit 0) */ +#define DAC_DAC0DATA_DATA0_Msk (0xfffUL) /*!< DAC DAC0DATA: DATA0 (Bitfield-Mask: 0xfff) */ + +/* -------------------------------- DAC_DAC1DATA -------------------------------- */ +#define DAC_DAC1DATA_DATA1_Pos (0UL) /*!< DAC DAC1DATA: DATA1 (Bit 0) */ +#define DAC_DAC1DATA_DATA1_Msk (0xfffUL) /*!< DAC DAC1DATA: DATA1 (Bitfield-Mask: 0xfff) */ + +/* -------------------------------- DAC_DAC01DATA ------------------------------- */ +#define DAC_DAC01DATA_DATA0_Pos (0UL) /*!< DAC DAC01DATA: DATA0 (Bit 0) */ +#define DAC_DAC01DATA_DATA0_Msk (0xfffUL) /*!< DAC DAC01DATA: DATA0 (Bitfield-Mask: 0xfff) */ +#define DAC_DAC01DATA_DATA1_Pos (16UL) /*!< DAC DAC01DATA: DATA1 (Bit 16) */ +#define DAC_DAC01DATA_DATA1_Msk (0xfff0000UL) /*!< DAC DAC01DATA: DATA1 (Bitfield-Mask: 0xfff) */ + +/* -------------------------------- DAC_DAC0PATL -------------------------------- */ +#define DAC_DAC0PATL_PAT0_Pos (0UL) /*!< DAC DAC0PATL: PAT0 (Bit 0) */ +#define DAC_DAC0PATL_PAT0_Msk (0x1fUL) /*!< DAC DAC0PATL: PAT0 (Bitfield-Mask: 0x1f) */ +#define DAC_DAC0PATL_PAT1_Pos (5UL) /*!< DAC DAC0PATL: PAT1 (Bit 5) */ +#define DAC_DAC0PATL_PAT1_Msk (0x3e0UL) /*!< DAC DAC0PATL: PAT1 (Bitfield-Mask: 0x1f) */ +#define DAC_DAC0PATL_PAT2_Pos (10UL) /*!< DAC DAC0PATL: PAT2 (Bit 10) */ +#define DAC_DAC0PATL_PAT2_Msk (0x7c00UL) /*!< DAC DAC0PATL: PAT2 (Bitfield-Mask: 0x1f) */ +#define DAC_DAC0PATL_PAT3_Pos (15UL) /*!< DAC DAC0PATL: PAT3 (Bit 15) */ +#define DAC_DAC0PATL_PAT3_Msk (0xf8000UL) /*!< DAC DAC0PATL: PAT3 (Bitfield-Mask: 0x1f) */ +#define DAC_DAC0PATL_PAT4_Pos (20UL) /*!< DAC DAC0PATL: PAT4 (Bit 20) */ +#define DAC_DAC0PATL_PAT4_Msk (0x1f00000UL) /*!< DAC DAC0PATL: PAT4 (Bitfield-Mask: 0x1f) */ +#define DAC_DAC0PATL_PAT5_Pos (25UL) /*!< DAC DAC0PATL: PAT5 (Bit 25) */ +#define DAC_DAC0PATL_PAT5_Msk (0x3e000000UL) /*!< DAC DAC0PATL: PAT5 (Bitfield-Mask: 0x1f) */ + +/* -------------------------------- DAC_DAC0PATH -------------------------------- */ +#define DAC_DAC0PATH_PAT6_Pos (0UL) /*!< DAC DAC0PATH: PAT6 (Bit 0) */ +#define DAC_DAC0PATH_PAT6_Msk (0x1fUL) /*!< DAC DAC0PATH: PAT6 (Bitfield-Mask: 0x1f) */ +#define DAC_DAC0PATH_PAT7_Pos (5UL) /*!< DAC DAC0PATH: PAT7 (Bit 5) */ +#define DAC_DAC0PATH_PAT7_Msk (0x3e0UL) /*!< DAC DAC0PATH: PAT7 (Bitfield-Mask: 0x1f) */ +#define DAC_DAC0PATH_PAT8_Pos (10UL) /*!< DAC DAC0PATH: PAT8 (Bit 10) */ +#define DAC_DAC0PATH_PAT8_Msk (0x7c00UL) /*!< DAC DAC0PATH: PAT8 (Bitfield-Mask: 0x1f) */ + +/* -------------------------------- DAC_DAC1PATL -------------------------------- */ +#define DAC_DAC1PATL_PAT0_Pos (0UL) /*!< DAC DAC1PATL: PAT0 (Bit 0) */ +#define DAC_DAC1PATL_PAT0_Msk (0x1fUL) /*!< DAC DAC1PATL: PAT0 (Bitfield-Mask: 0x1f) */ +#define DAC_DAC1PATL_PAT1_Pos (5UL) /*!< DAC DAC1PATL: PAT1 (Bit 5) */ +#define DAC_DAC1PATL_PAT1_Msk (0x3e0UL) /*!< DAC DAC1PATL: PAT1 (Bitfield-Mask: 0x1f) */ +#define DAC_DAC1PATL_PAT2_Pos (10UL) /*!< DAC DAC1PATL: PAT2 (Bit 10) */ +#define DAC_DAC1PATL_PAT2_Msk (0x7c00UL) /*!< DAC DAC1PATL: PAT2 (Bitfield-Mask: 0x1f) */ +#define DAC_DAC1PATL_PAT3_Pos (15UL) /*!< DAC DAC1PATL: PAT3 (Bit 15) */ +#define DAC_DAC1PATL_PAT3_Msk (0xf8000UL) /*!< DAC DAC1PATL: PAT3 (Bitfield-Mask: 0x1f) */ +#define DAC_DAC1PATL_PAT4_Pos (20UL) /*!< DAC DAC1PATL: PAT4 (Bit 20) */ +#define DAC_DAC1PATL_PAT4_Msk (0x1f00000UL) /*!< DAC DAC1PATL: PAT4 (Bitfield-Mask: 0x1f) */ +#define DAC_DAC1PATL_PAT5_Pos (25UL) /*!< DAC DAC1PATL: PAT5 (Bit 25) */ +#define DAC_DAC1PATL_PAT5_Msk (0x3e000000UL) /*!< DAC DAC1PATL: PAT5 (Bitfield-Mask: 0x1f) */ + +/* -------------------------------- DAC_DAC1PATH -------------------------------- */ +#define DAC_DAC1PATH_PAT6_Pos (0UL) /*!< DAC DAC1PATH: PAT6 (Bit 0) */ +#define DAC_DAC1PATH_PAT6_Msk (0x1fUL) /*!< DAC DAC1PATH: PAT6 (Bitfield-Mask: 0x1f) */ +#define DAC_DAC1PATH_PAT7_Pos (5UL) /*!< DAC DAC1PATH: PAT7 (Bit 5) */ +#define DAC_DAC1PATH_PAT7_Msk (0x3e0UL) /*!< DAC DAC1PATH: PAT7 (Bitfield-Mask: 0x1f) */ +#define DAC_DAC1PATH_PAT8_Pos (10UL) /*!< DAC DAC1PATH: PAT8 (Bit 10) */ +#define DAC_DAC1PATH_PAT8_Msk (0x7c00UL) /*!< DAC DAC1PATH: PAT8 (Bitfield-Mask: 0x1f) */ + + +/* ================================================================================ */ +/* ================ Group 'CCU4' Position & Mask ================ */ +/* ================================================================================ */ + + +/* --------------------------------- CCU4_GCTRL --------------------------------- */ +#define CCU4_GCTRL_PRBC_Pos (0UL) /*!< CCU4 GCTRL: PRBC (Bit 0) */ +#define CCU4_GCTRL_PRBC_Msk (0x7UL) /*!< CCU4 GCTRL: PRBC (Bitfield-Mask: 0x07) */ +#define CCU4_GCTRL_PCIS_Pos (4UL) /*!< CCU4 GCTRL: PCIS (Bit 4) */ +#define CCU4_GCTRL_PCIS_Msk (0x30UL) /*!< CCU4 GCTRL: PCIS (Bitfield-Mask: 0x03) */ +#define CCU4_GCTRL_SUSCFG_Pos (8UL) /*!< CCU4 GCTRL: SUSCFG (Bit 8) */ +#define CCU4_GCTRL_SUSCFG_Msk (0x300UL) /*!< CCU4 GCTRL: SUSCFG (Bitfield-Mask: 0x03) */ +#define CCU4_GCTRL_MSE0_Pos (10UL) /*!< CCU4 GCTRL: MSE0 (Bit 10) */ +#define CCU4_GCTRL_MSE0_Msk (0x400UL) /*!< CCU4 GCTRL: MSE0 (Bitfield-Mask: 0x01) */ +#define CCU4_GCTRL_MSE1_Pos (11UL) /*!< CCU4 GCTRL: MSE1 (Bit 11) */ +#define CCU4_GCTRL_MSE1_Msk (0x800UL) /*!< CCU4 GCTRL: MSE1 (Bitfield-Mask: 0x01) */ +#define CCU4_GCTRL_MSE2_Pos (12UL) /*!< CCU4 GCTRL: MSE2 (Bit 12) */ +#define CCU4_GCTRL_MSE2_Msk (0x1000UL) /*!< CCU4 GCTRL: MSE2 (Bitfield-Mask: 0x01) */ +#define CCU4_GCTRL_MSE3_Pos (13UL) /*!< CCU4 GCTRL: MSE3 (Bit 13) */ +#define CCU4_GCTRL_MSE3_Msk (0x2000UL) /*!< CCU4 GCTRL: MSE3 (Bitfield-Mask: 0x01) */ +#define CCU4_GCTRL_MSDE_Pos (14UL) /*!< CCU4 GCTRL: MSDE (Bit 14) */ +#define CCU4_GCTRL_MSDE_Msk (0xc000UL) /*!< CCU4 GCTRL: MSDE (Bitfield-Mask: 0x03) */ + +/* --------------------------------- CCU4_GSTAT --------------------------------- */ +#define CCU4_GSTAT_S0I_Pos (0UL) /*!< CCU4 GSTAT: S0I (Bit 0) */ +#define CCU4_GSTAT_S0I_Msk (0x1UL) /*!< CCU4 GSTAT: S0I (Bitfield-Mask: 0x01) */ +#define CCU4_GSTAT_S1I_Pos (1UL) /*!< CCU4 GSTAT: S1I (Bit 1) */ +#define CCU4_GSTAT_S1I_Msk (0x2UL) /*!< CCU4 GSTAT: S1I (Bitfield-Mask: 0x01) */ +#define CCU4_GSTAT_S2I_Pos (2UL) /*!< CCU4 GSTAT: S2I (Bit 2) */ +#define CCU4_GSTAT_S2I_Msk (0x4UL) /*!< CCU4 GSTAT: S2I (Bitfield-Mask: 0x01) */ +#define CCU4_GSTAT_S3I_Pos (3UL) /*!< CCU4 GSTAT: S3I (Bit 3) */ +#define CCU4_GSTAT_S3I_Msk (0x8UL) /*!< CCU4 GSTAT: S3I (Bitfield-Mask: 0x01) */ +#define CCU4_GSTAT_PRB_Pos (8UL) /*!< CCU4 GSTAT: PRB (Bit 8) */ +#define CCU4_GSTAT_PRB_Msk (0x100UL) /*!< CCU4 GSTAT: PRB (Bitfield-Mask: 0x01) */ + +/* --------------------------------- CCU4_GIDLS --------------------------------- */ +#define CCU4_GIDLS_SS0I_Pos (0UL) /*!< CCU4 GIDLS: SS0I (Bit 0) */ +#define CCU4_GIDLS_SS0I_Msk (0x1UL) /*!< CCU4 GIDLS: SS0I (Bitfield-Mask: 0x01) */ +#define CCU4_GIDLS_SS1I_Pos (1UL) /*!< CCU4 GIDLS: SS1I (Bit 1) */ +#define CCU4_GIDLS_SS1I_Msk (0x2UL) /*!< CCU4 GIDLS: SS1I (Bitfield-Mask: 0x01) */ +#define CCU4_GIDLS_SS2I_Pos (2UL) /*!< CCU4 GIDLS: SS2I (Bit 2) */ +#define CCU4_GIDLS_SS2I_Msk (0x4UL) /*!< CCU4 GIDLS: SS2I (Bitfield-Mask: 0x01) */ +#define CCU4_GIDLS_SS3I_Pos (3UL) /*!< CCU4 GIDLS: SS3I (Bit 3) */ +#define CCU4_GIDLS_SS3I_Msk (0x8UL) /*!< CCU4 GIDLS: SS3I (Bitfield-Mask: 0x01) */ +#define CCU4_GIDLS_CPRB_Pos (8UL) /*!< CCU4 GIDLS: CPRB (Bit 8) */ +#define CCU4_GIDLS_CPRB_Msk (0x100UL) /*!< CCU4 GIDLS: CPRB (Bitfield-Mask: 0x01) */ +#define CCU4_GIDLS_PSIC_Pos (9UL) /*!< CCU4 GIDLS: PSIC (Bit 9) */ +#define CCU4_GIDLS_PSIC_Msk (0x200UL) /*!< CCU4 GIDLS: PSIC (Bitfield-Mask: 0x01) */ + +/* --------------------------------- CCU4_GIDLC --------------------------------- */ +#define CCU4_GIDLC_CS0I_Pos (0UL) /*!< CCU4 GIDLC: CS0I (Bit 0) */ +#define CCU4_GIDLC_CS0I_Msk (0x1UL) /*!< CCU4 GIDLC: CS0I (Bitfield-Mask: 0x01) */ +#define CCU4_GIDLC_CS1I_Pos (1UL) /*!< CCU4 GIDLC: CS1I (Bit 1) */ +#define CCU4_GIDLC_CS1I_Msk (0x2UL) /*!< CCU4 GIDLC: CS1I (Bitfield-Mask: 0x01) */ +#define CCU4_GIDLC_CS2I_Pos (2UL) /*!< CCU4 GIDLC: CS2I (Bit 2) */ +#define CCU4_GIDLC_CS2I_Msk (0x4UL) /*!< CCU4 GIDLC: CS2I (Bitfield-Mask: 0x01) */ +#define CCU4_GIDLC_CS3I_Pos (3UL) /*!< CCU4 GIDLC: CS3I (Bit 3) */ +#define CCU4_GIDLC_CS3I_Msk (0x8UL) /*!< CCU4 GIDLC: CS3I (Bitfield-Mask: 0x01) */ +#define CCU4_GIDLC_SPRB_Pos (8UL) /*!< CCU4 GIDLC: SPRB (Bit 8) */ +#define CCU4_GIDLC_SPRB_Msk (0x100UL) /*!< CCU4 GIDLC: SPRB (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- CCU4_GCSS --------------------------------- */ +#define CCU4_GCSS_S0SE_Pos (0UL) /*!< CCU4 GCSS: S0SE (Bit 0) */ +#define CCU4_GCSS_S0SE_Msk (0x1UL) /*!< CCU4 GCSS: S0SE (Bitfield-Mask: 0x01) */ +#define CCU4_GCSS_S0DSE_Pos (1UL) /*!< CCU4 GCSS: S0DSE (Bit 1) */ +#define CCU4_GCSS_S0DSE_Msk (0x2UL) /*!< CCU4 GCSS: S0DSE (Bitfield-Mask: 0x01) */ +#define CCU4_GCSS_S0PSE_Pos (2UL) /*!< CCU4 GCSS: S0PSE (Bit 2) */ +#define CCU4_GCSS_S0PSE_Msk (0x4UL) /*!< CCU4 GCSS: S0PSE (Bitfield-Mask: 0x01) */ +#define CCU4_GCSS_S1SE_Pos (4UL) /*!< CCU4 GCSS: S1SE (Bit 4) */ +#define CCU4_GCSS_S1SE_Msk (0x10UL) /*!< CCU4 GCSS: S1SE (Bitfield-Mask: 0x01) */ +#define CCU4_GCSS_S1DSE_Pos (5UL) /*!< CCU4 GCSS: S1DSE (Bit 5) */ +#define CCU4_GCSS_S1DSE_Msk (0x20UL) /*!< CCU4 GCSS: S1DSE (Bitfield-Mask: 0x01) */ +#define CCU4_GCSS_S1PSE_Pos (6UL) /*!< CCU4 GCSS: S1PSE (Bit 6) */ +#define CCU4_GCSS_S1PSE_Msk (0x40UL) /*!< CCU4 GCSS: S1PSE (Bitfield-Mask: 0x01) */ +#define CCU4_GCSS_S2SE_Pos (8UL) /*!< CCU4 GCSS: S2SE (Bit 8) */ +#define CCU4_GCSS_S2SE_Msk (0x100UL) /*!< CCU4 GCSS: S2SE (Bitfield-Mask: 0x01) */ +#define CCU4_GCSS_S2DSE_Pos (9UL) /*!< CCU4 GCSS: S2DSE (Bit 9) */ +#define CCU4_GCSS_S2DSE_Msk (0x200UL) /*!< CCU4 GCSS: S2DSE (Bitfield-Mask: 0x01) */ +#define CCU4_GCSS_S2PSE_Pos (10UL) /*!< CCU4 GCSS: S2PSE (Bit 10) */ +#define CCU4_GCSS_S2PSE_Msk (0x400UL) /*!< CCU4 GCSS: S2PSE (Bitfield-Mask: 0x01) */ +#define CCU4_GCSS_S3SE_Pos (12UL) /*!< CCU4 GCSS: S3SE (Bit 12) */ +#define CCU4_GCSS_S3SE_Msk (0x1000UL) /*!< CCU4 GCSS: S3SE (Bitfield-Mask: 0x01) */ +#define CCU4_GCSS_S3DSE_Pos (13UL) /*!< CCU4 GCSS: S3DSE (Bit 13) */ +#define CCU4_GCSS_S3DSE_Msk (0x2000UL) /*!< CCU4 GCSS: S3DSE (Bitfield-Mask: 0x01) */ +#define CCU4_GCSS_S3PSE_Pos (14UL) /*!< CCU4 GCSS: S3PSE (Bit 14) */ +#define CCU4_GCSS_S3PSE_Msk (0x4000UL) /*!< CCU4 GCSS: S3PSE (Bitfield-Mask: 0x01) */ +#define CCU4_GCSS_S0STS_Pos (16UL) /*!< CCU4 GCSS: S0STS (Bit 16) */ +#define CCU4_GCSS_S0STS_Msk (0x10000UL) /*!< CCU4 GCSS: S0STS (Bitfield-Mask: 0x01) */ +#define CCU4_GCSS_S1STS_Pos (17UL) /*!< CCU4 GCSS: S1STS (Bit 17) */ +#define CCU4_GCSS_S1STS_Msk (0x20000UL) /*!< CCU4 GCSS: S1STS (Bitfield-Mask: 0x01) */ +#define CCU4_GCSS_S2STS_Pos (18UL) /*!< CCU4 GCSS: S2STS (Bit 18) */ +#define CCU4_GCSS_S2STS_Msk (0x40000UL) /*!< CCU4 GCSS: S2STS (Bitfield-Mask: 0x01) */ +#define CCU4_GCSS_S3STS_Pos (19UL) /*!< CCU4 GCSS: S3STS (Bit 19) */ +#define CCU4_GCSS_S3STS_Msk (0x80000UL) /*!< CCU4 GCSS: S3STS (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- CCU4_GCSC --------------------------------- */ +#define CCU4_GCSC_S0SC_Pos (0UL) /*!< CCU4 GCSC: S0SC (Bit 0) */ +#define CCU4_GCSC_S0SC_Msk (0x1UL) /*!< CCU4 GCSC: S0SC (Bitfield-Mask: 0x01) */ +#define CCU4_GCSC_S0DSC_Pos (1UL) /*!< CCU4 GCSC: S0DSC (Bit 1) */ +#define CCU4_GCSC_S0DSC_Msk (0x2UL) /*!< CCU4 GCSC: S0DSC (Bitfield-Mask: 0x01) */ +#define CCU4_GCSC_S0PSC_Pos (2UL) /*!< CCU4 GCSC: S0PSC (Bit 2) */ +#define CCU4_GCSC_S0PSC_Msk (0x4UL) /*!< CCU4 GCSC: S0PSC (Bitfield-Mask: 0x01) */ +#define CCU4_GCSC_S1SC_Pos (4UL) /*!< CCU4 GCSC: S1SC (Bit 4) */ +#define CCU4_GCSC_S1SC_Msk (0x10UL) /*!< CCU4 GCSC: S1SC (Bitfield-Mask: 0x01) */ +#define CCU4_GCSC_S1DSC_Pos (5UL) /*!< CCU4 GCSC: S1DSC (Bit 5) */ +#define CCU4_GCSC_S1DSC_Msk (0x20UL) /*!< CCU4 GCSC: S1DSC (Bitfield-Mask: 0x01) */ +#define CCU4_GCSC_S1PSC_Pos (6UL) /*!< CCU4 GCSC: S1PSC (Bit 6) */ +#define CCU4_GCSC_S1PSC_Msk (0x40UL) /*!< CCU4 GCSC: S1PSC (Bitfield-Mask: 0x01) */ +#define CCU4_GCSC_S2SC_Pos (8UL) /*!< CCU4 GCSC: S2SC (Bit 8) */ +#define CCU4_GCSC_S2SC_Msk (0x100UL) /*!< CCU4 GCSC: S2SC (Bitfield-Mask: 0x01) */ +#define CCU4_GCSC_S2DSC_Pos (9UL) /*!< CCU4 GCSC: S2DSC (Bit 9) */ +#define CCU4_GCSC_S2DSC_Msk (0x200UL) /*!< CCU4 GCSC: S2DSC (Bitfield-Mask: 0x01) */ +#define CCU4_GCSC_S2PSC_Pos (10UL) /*!< CCU4 GCSC: S2PSC (Bit 10) */ +#define CCU4_GCSC_S2PSC_Msk (0x400UL) /*!< CCU4 GCSC: S2PSC (Bitfield-Mask: 0x01) */ +#define CCU4_GCSC_S3SC_Pos (12UL) /*!< CCU4 GCSC: S3SC (Bit 12) */ +#define CCU4_GCSC_S3SC_Msk (0x1000UL) /*!< CCU4 GCSC: S3SC (Bitfield-Mask: 0x01) */ +#define CCU4_GCSC_S3DSC_Pos (13UL) /*!< CCU4 GCSC: S3DSC (Bit 13) */ +#define CCU4_GCSC_S3DSC_Msk (0x2000UL) /*!< CCU4 GCSC: S3DSC (Bitfield-Mask: 0x01) */ +#define CCU4_GCSC_S3PSC_Pos (14UL) /*!< CCU4 GCSC: S3PSC (Bit 14) */ +#define CCU4_GCSC_S3PSC_Msk (0x4000UL) /*!< CCU4 GCSC: S3PSC (Bitfield-Mask: 0x01) */ +#define CCU4_GCSC_S0STC_Pos (16UL) /*!< CCU4 GCSC: S0STC (Bit 16) */ +#define CCU4_GCSC_S0STC_Msk (0x10000UL) /*!< CCU4 GCSC: S0STC (Bitfield-Mask: 0x01) */ +#define CCU4_GCSC_S1STC_Pos (17UL) /*!< CCU4 GCSC: S1STC (Bit 17) */ +#define CCU4_GCSC_S1STC_Msk (0x20000UL) /*!< CCU4 GCSC: S1STC (Bitfield-Mask: 0x01) */ +#define CCU4_GCSC_S2STC_Pos (18UL) /*!< CCU4 GCSC: S2STC (Bit 18) */ +#define CCU4_GCSC_S2STC_Msk (0x40000UL) /*!< CCU4 GCSC: S2STC (Bitfield-Mask: 0x01) */ +#define CCU4_GCSC_S3STC_Pos (19UL) /*!< CCU4 GCSC: S3STC (Bit 19) */ +#define CCU4_GCSC_S3STC_Msk (0x80000UL) /*!< CCU4 GCSC: S3STC (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- CCU4_GCST --------------------------------- */ +#define CCU4_GCST_S0SS_Pos (0UL) /*!< CCU4 GCST: S0SS (Bit 0) */ +#define CCU4_GCST_S0SS_Msk (0x1UL) /*!< CCU4 GCST: S0SS (Bitfield-Mask: 0x01) */ +#define CCU4_GCST_S0DSS_Pos (1UL) /*!< CCU4 GCST: S0DSS (Bit 1) */ +#define CCU4_GCST_S0DSS_Msk (0x2UL) /*!< CCU4 GCST: S0DSS (Bitfield-Mask: 0x01) */ +#define CCU4_GCST_S0PSS_Pos (2UL) /*!< CCU4 GCST: S0PSS (Bit 2) */ +#define CCU4_GCST_S0PSS_Msk (0x4UL) /*!< CCU4 GCST: S0PSS (Bitfield-Mask: 0x01) */ +#define CCU4_GCST_S1SS_Pos (4UL) /*!< CCU4 GCST: S1SS (Bit 4) */ +#define CCU4_GCST_S1SS_Msk (0x10UL) /*!< CCU4 GCST: S1SS (Bitfield-Mask: 0x01) */ +#define CCU4_GCST_S1DSS_Pos (5UL) /*!< CCU4 GCST: S1DSS (Bit 5) */ +#define CCU4_GCST_S1DSS_Msk (0x20UL) /*!< CCU4 GCST: S1DSS (Bitfield-Mask: 0x01) */ +#define CCU4_GCST_S1PSS_Pos (6UL) /*!< CCU4 GCST: S1PSS (Bit 6) */ +#define CCU4_GCST_S1PSS_Msk (0x40UL) /*!< CCU4 GCST: S1PSS (Bitfield-Mask: 0x01) */ +#define CCU4_GCST_S2SS_Pos (8UL) /*!< CCU4 GCST: S2SS (Bit 8) */ +#define CCU4_GCST_S2SS_Msk (0x100UL) /*!< CCU4 GCST: S2SS (Bitfield-Mask: 0x01) */ +#define CCU4_GCST_S2DSS_Pos (9UL) /*!< CCU4 GCST: S2DSS (Bit 9) */ +#define CCU4_GCST_S2DSS_Msk (0x200UL) /*!< CCU4 GCST: S2DSS (Bitfield-Mask: 0x01) */ +#define CCU4_GCST_S2PSS_Pos (10UL) /*!< CCU4 GCST: S2PSS (Bit 10) */ +#define CCU4_GCST_S2PSS_Msk (0x400UL) /*!< CCU4 GCST: S2PSS (Bitfield-Mask: 0x01) */ +#define CCU4_GCST_S3SS_Pos (12UL) /*!< CCU4 GCST: S3SS (Bit 12) */ +#define CCU4_GCST_S3SS_Msk (0x1000UL) /*!< CCU4 GCST: S3SS (Bitfield-Mask: 0x01) */ +#define CCU4_GCST_S3DSS_Pos (13UL) /*!< CCU4 GCST: S3DSS (Bit 13) */ +#define CCU4_GCST_S3DSS_Msk (0x2000UL) /*!< CCU4 GCST: S3DSS (Bitfield-Mask: 0x01) */ +#define CCU4_GCST_S3PSS_Pos (14UL) /*!< CCU4 GCST: S3PSS (Bit 14) */ +#define CCU4_GCST_S3PSS_Msk (0x4000UL) /*!< CCU4 GCST: S3PSS (Bitfield-Mask: 0x01) */ +#define CCU4_GCST_CC40ST_Pos (16UL) /*!< CCU4 GCST: CC40ST (Bit 16) */ +#define CCU4_GCST_CC40ST_Msk (0x10000UL) /*!< CCU4 GCST: CC40ST (Bitfield-Mask: 0x01) */ +#define CCU4_GCST_CC41ST_Pos (17UL) /*!< CCU4 GCST: CC41ST (Bit 17) */ +#define CCU4_GCST_CC41ST_Msk (0x20000UL) /*!< CCU4 GCST: CC41ST (Bitfield-Mask: 0x01) */ +#define CCU4_GCST_CC42ST_Pos (18UL) /*!< CCU4 GCST: CC42ST (Bit 18) */ +#define CCU4_GCST_CC42ST_Msk (0x40000UL) /*!< CCU4 GCST: CC42ST (Bitfield-Mask: 0x01) */ +#define CCU4_GCST_CC43ST_Pos (19UL) /*!< CCU4 GCST: CC43ST (Bit 19) */ +#define CCU4_GCST_CC43ST_Msk (0x80000UL) /*!< CCU4 GCST: CC43ST (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- CCU4_MIDR --------------------------------- */ +#define CCU4_MIDR_MODR_Pos (0UL) /*!< CCU4 MIDR: MODR (Bit 0) */ +#define CCU4_MIDR_MODR_Msk (0xffUL) /*!< CCU4 MIDR: MODR (Bitfield-Mask: 0xff) */ +#define CCU4_MIDR_MODT_Pos (8UL) /*!< CCU4 MIDR: MODT (Bit 8) */ +#define CCU4_MIDR_MODT_Msk (0xff00UL) /*!< CCU4 MIDR: MODT (Bitfield-Mask: 0xff) */ +#define CCU4_MIDR_MODN_Pos (16UL) /*!< CCU4 MIDR: MODN (Bit 16) */ +#define CCU4_MIDR_MODN_Msk (0xffff0000UL) /*!< CCU4 MIDR: MODN (Bitfield-Mask: 0xffff) */ + + +/* ================================================================================ */ +/* ================ Group 'CCU4_CC4' Position & Mask ================ */ +/* ================================================================================ */ + + +/* -------------------------------- CCU4_CC4_INS -------------------------------- */ +#define CCU4_CC4_INS_EV0IS_Pos (0UL) /*!< CCU4_CC4 INS: EV0IS (Bit 0) */ +#define CCU4_CC4_INS_EV0IS_Msk (0xfUL) /*!< CCU4_CC4 INS: EV0IS (Bitfield-Mask: 0x0f) */ +#define CCU4_CC4_INS_EV1IS_Pos (4UL) /*!< CCU4_CC4 INS: EV1IS (Bit 4) */ +#define CCU4_CC4_INS_EV1IS_Msk (0xf0UL) /*!< CCU4_CC4 INS: EV1IS (Bitfield-Mask: 0x0f) */ +#define CCU4_CC4_INS_EV2IS_Pos (8UL) /*!< CCU4_CC4 INS: EV2IS (Bit 8) */ +#define CCU4_CC4_INS_EV2IS_Msk (0xf00UL) /*!< CCU4_CC4 INS: EV2IS (Bitfield-Mask: 0x0f) */ +#define CCU4_CC4_INS_EV0EM_Pos (16UL) /*!< CCU4_CC4 INS: EV0EM (Bit 16) */ +#define CCU4_CC4_INS_EV0EM_Msk (0x30000UL) /*!< CCU4_CC4 INS: EV0EM (Bitfield-Mask: 0x03) */ +#define CCU4_CC4_INS_EV1EM_Pos (18UL) /*!< CCU4_CC4 INS: EV1EM (Bit 18) */ +#define CCU4_CC4_INS_EV1EM_Msk (0xc0000UL) /*!< CCU4_CC4 INS: EV1EM (Bitfield-Mask: 0x03) */ +#define CCU4_CC4_INS_EV2EM_Pos (20UL) /*!< CCU4_CC4 INS: EV2EM (Bit 20) */ +#define CCU4_CC4_INS_EV2EM_Msk (0x300000UL) /*!< CCU4_CC4 INS: EV2EM (Bitfield-Mask: 0x03) */ +#define CCU4_CC4_INS_EV0LM_Pos (22UL) /*!< CCU4_CC4 INS: EV0LM (Bit 22) */ +#define CCU4_CC4_INS_EV0LM_Msk (0x400000UL) /*!< CCU4_CC4 INS: EV0LM (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_INS_EV1LM_Pos (23UL) /*!< CCU4_CC4 INS: EV1LM (Bit 23) */ +#define CCU4_CC4_INS_EV1LM_Msk (0x800000UL) /*!< CCU4_CC4 INS: EV1LM (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_INS_EV2LM_Pos (24UL) /*!< CCU4_CC4 INS: EV2LM (Bit 24) */ +#define CCU4_CC4_INS_EV2LM_Msk (0x1000000UL) /*!< CCU4_CC4 INS: EV2LM (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_INS_LPF0M_Pos (25UL) /*!< CCU4_CC4 INS: LPF0M (Bit 25) */ +#define CCU4_CC4_INS_LPF0M_Msk (0x6000000UL) /*!< CCU4_CC4 INS: LPF0M (Bitfield-Mask: 0x03) */ +#define CCU4_CC4_INS_LPF1M_Pos (27UL) /*!< CCU4_CC4 INS: LPF1M (Bit 27) */ +#define CCU4_CC4_INS_LPF1M_Msk (0x18000000UL) /*!< CCU4_CC4 INS: LPF1M (Bitfield-Mask: 0x03) */ +#define CCU4_CC4_INS_LPF2M_Pos (29UL) /*!< CCU4_CC4 INS: LPF2M (Bit 29) */ +#define CCU4_CC4_INS_LPF2M_Msk (0x60000000UL) /*!< CCU4_CC4 INS: LPF2M (Bitfield-Mask: 0x03) */ + +/* -------------------------------- CCU4_CC4_CMC -------------------------------- */ +#define CCU4_CC4_CMC_STRTS_Pos (0UL) /*!< CCU4_CC4 CMC: STRTS (Bit 0) */ +#define CCU4_CC4_CMC_STRTS_Msk (0x3UL) /*!< CCU4_CC4 CMC: STRTS (Bitfield-Mask: 0x03) */ +#define CCU4_CC4_CMC_ENDS_Pos (2UL) /*!< CCU4_CC4 CMC: ENDS (Bit 2) */ +#define CCU4_CC4_CMC_ENDS_Msk (0xcUL) /*!< CCU4_CC4 CMC: ENDS (Bitfield-Mask: 0x03) */ +#define CCU4_CC4_CMC_CAP0S_Pos (4UL) /*!< CCU4_CC4 CMC: CAP0S (Bit 4) */ +#define CCU4_CC4_CMC_CAP0S_Msk (0x30UL) /*!< CCU4_CC4 CMC: CAP0S (Bitfield-Mask: 0x03) */ +#define CCU4_CC4_CMC_CAP1S_Pos (6UL) /*!< CCU4_CC4 CMC: CAP1S (Bit 6) */ +#define CCU4_CC4_CMC_CAP1S_Msk (0xc0UL) /*!< CCU4_CC4 CMC: CAP1S (Bitfield-Mask: 0x03) */ +#define CCU4_CC4_CMC_GATES_Pos (8UL) /*!< CCU4_CC4 CMC: GATES (Bit 8) */ +#define CCU4_CC4_CMC_GATES_Msk (0x300UL) /*!< CCU4_CC4 CMC: GATES (Bitfield-Mask: 0x03) */ +#define CCU4_CC4_CMC_UDS_Pos (10UL) /*!< CCU4_CC4 CMC: UDS (Bit 10) */ +#define CCU4_CC4_CMC_UDS_Msk (0xc00UL) /*!< CCU4_CC4 CMC: UDS (Bitfield-Mask: 0x03) */ +#define CCU4_CC4_CMC_LDS_Pos (12UL) /*!< CCU4_CC4 CMC: LDS (Bit 12) */ +#define CCU4_CC4_CMC_LDS_Msk (0x3000UL) /*!< CCU4_CC4 CMC: LDS (Bitfield-Mask: 0x03) */ +#define CCU4_CC4_CMC_CNTS_Pos (14UL) /*!< CCU4_CC4 CMC: CNTS (Bit 14) */ +#define CCU4_CC4_CMC_CNTS_Msk (0xc000UL) /*!< CCU4_CC4 CMC: CNTS (Bitfield-Mask: 0x03) */ +#define CCU4_CC4_CMC_OFS_Pos (16UL) /*!< CCU4_CC4 CMC: OFS (Bit 16) */ +#define CCU4_CC4_CMC_OFS_Msk (0x10000UL) /*!< CCU4_CC4 CMC: OFS (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_CMC_TS_Pos (17UL) /*!< CCU4_CC4 CMC: TS (Bit 17) */ +#define CCU4_CC4_CMC_TS_Msk (0x20000UL) /*!< CCU4_CC4 CMC: TS (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_CMC_MOS_Pos (18UL) /*!< CCU4_CC4 CMC: MOS (Bit 18) */ +#define CCU4_CC4_CMC_MOS_Msk (0xc0000UL) /*!< CCU4_CC4 CMC: MOS (Bitfield-Mask: 0x03) */ +#define CCU4_CC4_CMC_TCE_Pos (20UL) /*!< CCU4_CC4 CMC: TCE (Bit 20) */ +#define CCU4_CC4_CMC_TCE_Msk (0x100000UL) /*!< CCU4_CC4 CMC: TCE (Bitfield-Mask: 0x01) */ + +/* -------------------------------- CCU4_CC4_TCST ------------------------------- */ +#define CCU4_CC4_TCST_TRB_Pos (0UL) /*!< CCU4_CC4 TCST: TRB (Bit 0) */ +#define CCU4_CC4_TCST_TRB_Msk (0x1UL) /*!< CCU4_CC4 TCST: TRB (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_TCST_CDIR_Pos (1UL) /*!< CCU4_CC4 TCST: CDIR (Bit 1) */ +#define CCU4_CC4_TCST_CDIR_Msk (0x2UL) /*!< CCU4_CC4 TCST: CDIR (Bitfield-Mask: 0x01) */ + +/* ------------------------------- CCU4_CC4_TCSET ------------------------------- */ +#define CCU4_CC4_TCSET_TRBS_Pos (0UL) /*!< CCU4_CC4 TCSET: TRBS (Bit 0) */ +#define CCU4_CC4_TCSET_TRBS_Msk (0x1UL) /*!< CCU4_CC4 TCSET: TRBS (Bitfield-Mask: 0x01) */ + +/* ------------------------------- CCU4_CC4_TCCLR ------------------------------- */ +#define CCU4_CC4_TCCLR_TRBC_Pos (0UL) /*!< CCU4_CC4 TCCLR: TRBC (Bit 0) */ +#define CCU4_CC4_TCCLR_TRBC_Msk (0x1UL) /*!< CCU4_CC4 TCCLR: TRBC (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_TCCLR_TCC_Pos (1UL) /*!< CCU4_CC4 TCCLR: TCC (Bit 1) */ +#define CCU4_CC4_TCCLR_TCC_Msk (0x2UL) /*!< CCU4_CC4 TCCLR: TCC (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_TCCLR_DITC_Pos (2UL) /*!< CCU4_CC4 TCCLR: DITC (Bit 2) */ +#define CCU4_CC4_TCCLR_DITC_Msk (0x4UL) /*!< CCU4_CC4 TCCLR: DITC (Bitfield-Mask: 0x01) */ + +/* --------------------------------- CCU4_CC4_TC -------------------------------- */ +#define CCU4_CC4_TC_TCM_Pos (0UL) /*!< CCU4_CC4 TC: TCM (Bit 0) */ +#define CCU4_CC4_TC_TCM_Msk (0x1UL) /*!< CCU4_CC4 TC: TCM (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_TC_TSSM_Pos (1UL) /*!< CCU4_CC4 TC: TSSM (Bit 1) */ +#define CCU4_CC4_TC_TSSM_Msk (0x2UL) /*!< CCU4_CC4 TC: TSSM (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_TC_CLST_Pos (2UL) /*!< CCU4_CC4 TC: CLST (Bit 2) */ +#define CCU4_CC4_TC_CLST_Msk (0x4UL) /*!< CCU4_CC4 TC: CLST (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_TC_CMOD_Pos (3UL) /*!< CCU4_CC4 TC: CMOD (Bit 3) */ +#define CCU4_CC4_TC_CMOD_Msk (0x8UL) /*!< CCU4_CC4 TC: CMOD (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_TC_ECM_Pos (4UL) /*!< CCU4_CC4 TC: ECM (Bit 4) */ +#define CCU4_CC4_TC_ECM_Msk (0x10UL) /*!< CCU4_CC4 TC: ECM (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_TC_CAPC_Pos (5UL) /*!< CCU4_CC4 TC: CAPC (Bit 5) */ +#define CCU4_CC4_TC_CAPC_Msk (0x60UL) /*!< CCU4_CC4 TC: CAPC (Bitfield-Mask: 0x03) */ +#define CCU4_CC4_TC_ENDM_Pos (8UL) /*!< CCU4_CC4 TC: ENDM (Bit 8) */ +#define CCU4_CC4_TC_ENDM_Msk (0x300UL) /*!< CCU4_CC4 TC: ENDM (Bitfield-Mask: 0x03) */ +#define CCU4_CC4_TC_STRM_Pos (10UL) /*!< CCU4_CC4 TC: STRM (Bit 10) */ +#define CCU4_CC4_TC_STRM_Msk (0x400UL) /*!< CCU4_CC4 TC: STRM (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_TC_SCE_Pos (11UL) /*!< CCU4_CC4 TC: SCE (Bit 11) */ +#define CCU4_CC4_TC_SCE_Msk (0x800UL) /*!< CCU4_CC4 TC: SCE (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_TC_CCS_Pos (12UL) /*!< CCU4_CC4 TC: CCS (Bit 12) */ +#define CCU4_CC4_TC_CCS_Msk (0x1000UL) /*!< CCU4_CC4 TC: CCS (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_TC_DITHE_Pos (13UL) /*!< CCU4_CC4 TC: DITHE (Bit 13) */ +#define CCU4_CC4_TC_DITHE_Msk (0x6000UL) /*!< CCU4_CC4 TC: DITHE (Bitfield-Mask: 0x03) */ +#define CCU4_CC4_TC_DIM_Pos (15UL) /*!< CCU4_CC4 TC: DIM (Bit 15) */ +#define CCU4_CC4_TC_DIM_Msk (0x8000UL) /*!< CCU4_CC4 TC: DIM (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_TC_FPE_Pos (16UL) /*!< CCU4_CC4 TC: FPE (Bit 16) */ +#define CCU4_CC4_TC_FPE_Msk (0x10000UL) /*!< CCU4_CC4 TC: FPE (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_TC_TRAPE_Pos (17UL) /*!< CCU4_CC4 TC: TRAPE (Bit 17) */ +#define CCU4_CC4_TC_TRAPE_Msk (0x20000UL) /*!< CCU4_CC4 TC: TRAPE (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_TC_TRPSE_Pos (21UL) /*!< CCU4_CC4 TC: TRPSE (Bit 21) */ +#define CCU4_CC4_TC_TRPSE_Msk (0x200000UL) /*!< CCU4_CC4 TC: TRPSE (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_TC_TRPSW_Pos (22UL) /*!< CCU4_CC4 TC: TRPSW (Bit 22) */ +#define CCU4_CC4_TC_TRPSW_Msk (0x400000UL) /*!< CCU4_CC4 TC: TRPSW (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_TC_EMS_Pos (23UL) /*!< CCU4_CC4 TC: EMS (Bit 23) */ +#define CCU4_CC4_TC_EMS_Msk (0x800000UL) /*!< CCU4_CC4 TC: EMS (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_TC_EMT_Pos (24UL) /*!< CCU4_CC4 TC: EMT (Bit 24) */ +#define CCU4_CC4_TC_EMT_Msk (0x1000000UL) /*!< CCU4_CC4 TC: EMT (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_TC_MCME_Pos (25UL) /*!< CCU4_CC4 TC: MCME (Bit 25) */ +#define CCU4_CC4_TC_MCME_Msk (0x2000000UL) /*!< CCU4_CC4 TC: MCME (Bitfield-Mask: 0x01) */ + +/* -------------------------------- CCU4_CC4_PSL -------------------------------- */ +#define CCU4_CC4_PSL_PSL_Pos (0UL) /*!< CCU4_CC4 PSL: PSL (Bit 0) */ +#define CCU4_CC4_PSL_PSL_Msk (0x1UL) /*!< CCU4_CC4 PSL: PSL (Bitfield-Mask: 0x01) */ + +/* -------------------------------- CCU4_CC4_DIT -------------------------------- */ +#define CCU4_CC4_DIT_DCV_Pos (0UL) /*!< CCU4_CC4 DIT: DCV (Bit 0) */ +#define CCU4_CC4_DIT_DCV_Msk (0xfUL) /*!< CCU4_CC4 DIT: DCV (Bitfield-Mask: 0x0f) */ +#define CCU4_CC4_DIT_DCNT_Pos (8UL) /*!< CCU4_CC4 DIT: DCNT (Bit 8) */ +#define CCU4_CC4_DIT_DCNT_Msk (0xf00UL) /*!< CCU4_CC4 DIT: DCNT (Bitfield-Mask: 0x0f) */ + +/* -------------------------------- CCU4_CC4_DITS ------------------------------- */ +#define CCU4_CC4_DITS_DCVS_Pos (0UL) /*!< CCU4_CC4 DITS: DCVS (Bit 0) */ +#define CCU4_CC4_DITS_DCVS_Msk (0xfUL) /*!< CCU4_CC4 DITS: DCVS (Bitfield-Mask: 0x0f) */ + +/* -------------------------------- CCU4_CC4_PSC -------------------------------- */ +#define CCU4_CC4_PSC_PSIV_Pos (0UL) /*!< CCU4_CC4 PSC: PSIV (Bit 0) */ +#define CCU4_CC4_PSC_PSIV_Msk (0xfUL) /*!< CCU4_CC4 PSC: PSIV (Bitfield-Mask: 0x0f) */ + +/* -------------------------------- CCU4_CC4_FPC -------------------------------- */ +#define CCU4_CC4_FPC_PCMP_Pos (0UL) /*!< CCU4_CC4 FPC: PCMP (Bit 0) */ +#define CCU4_CC4_FPC_PCMP_Msk (0xfUL) /*!< CCU4_CC4 FPC: PCMP (Bitfield-Mask: 0x0f) */ +#define CCU4_CC4_FPC_PVAL_Pos (8UL) /*!< CCU4_CC4 FPC: PVAL (Bit 8) */ +#define CCU4_CC4_FPC_PVAL_Msk (0xf00UL) /*!< CCU4_CC4 FPC: PVAL (Bitfield-Mask: 0x0f) */ + +/* -------------------------------- CCU4_CC4_FPCS ------------------------------- */ +#define CCU4_CC4_FPCS_PCMP_Pos (0UL) /*!< CCU4_CC4 FPCS: PCMP (Bit 0) */ +#define CCU4_CC4_FPCS_PCMP_Msk (0xfUL) /*!< CCU4_CC4 FPCS: PCMP (Bitfield-Mask: 0x0f) */ + +/* --------------------------------- CCU4_CC4_PR -------------------------------- */ +#define CCU4_CC4_PR_PR_Pos (0UL) /*!< CCU4_CC4 PR: PR (Bit 0) */ +#define CCU4_CC4_PR_PR_Msk (0xffffUL) /*!< CCU4_CC4 PR: PR (Bitfield-Mask: 0xffff) */ + +/* -------------------------------- CCU4_CC4_PRS -------------------------------- */ +#define CCU4_CC4_PRS_PRS_Pos (0UL) /*!< CCU4_CC4 PRS: PRS (Bit 0) */ +#define CCU4_CC4_PRS_PRS_Msk (0xffffUL) /*!< CCU4_CC4 PRS: PRS (Bitfield-Mask: 0xffff) */ + +/* --------------------------------- CCU4_CC4_CR -------------------------------- */ +#define CCU4_CC4_CR_CR_Pos (0UL) /*!< CCU4_CC4 CR: CR (Bit 0) */ +#define CCU4_CC4_CR_CR_Msk (0xffffUL) /*!< CCU4_CC4 CR: CR (Bitfield-Mask: 0xffff) */ + +/* -------------------------------- CCU4_CC4_CRS -------------------------------- */ +#define CCU4_CC4_CRS_CRS_Pos (0UL) /*!< CCU4_CC4 CRS: CRS (Bit 0) */ +#define CCU4_CC4_CRS_CRS_Msk (0xffffUL) /*!< CCU4_CC4 CRS: CRS (Bitfield-Mask: 0xffff) */ + +/* ------------------------------- CCU4_CC4_TIMER ------------------------------- */ +#define CCU4_CC4_TIMER_TVAL_Pos (0UL) /*!< CCU4_CC4 TIMER: TVAL (Bit 0) */ +#define CCU4_CC4_TIMER_TVAL_Msk (0xffffUL) /*!< CCU4_CC4 TIMER: TVAL (Bitfield-Mask: 0xffff) */ + +/* --------------------------------- CCU4_CC4_CV -------------------------------- */ +#define CCU4_CC4_CV_CAPTV_Pos (0UL) /*!< CCU4_CC4 CV: CAPTV (Bit 0) */ +#define CCU4_CC4_CV_CAPTV_Msk (0xffffUL) /*!< CCU4_CC4 CV: CAPTV (Bitfield-Mask: 0xffff) */ +#define CCU4_CC4_CV_FPCV_Pos (16UL) /*!< CCU4_CC4 CV: FPCV (Bit 16) */ +#define CCU4_CC4_CV_FPCV_Msk (0xf0000UL) /*!< CCU4_CC4 CV: FPCV (Bitfield-Mask: 0x0f) */ +#define CCU4_CC4_CV_FFL_Pos (20UL) /*!< CCU4_CC4 CV: FFL (Bit 20) */ +#define CCU4_CC4_CV_FFL_Msk (0x100000UL) /*!< CCU4_CC4 CV: FFL (Bitfield-Mask: 0x01) */ + +/* -------------------------------- CCU4_CC4_INTS ------------------------------- */ +#define CCU4_CC4_INTS_PMUS_Pos (0UL) /*!< CCU4_CC4 INTS: PMUS (Bit 0) */ +#define CCU4_CC4_INTS_PMUS_Msk (0x1UL) /*!< CCU4_CC4 INTS: PMUS (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_INTS_OMDS_Pos (1UL) /*!< CCU4_CC4 INTS: OMDS (Bit 1) */ +#define CCU4_CC4_INTS_OMDS_Msk (0x2UL) /*!< CCU4_CC4 INTS: OMDS (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_INTS_CMUS_Pos (2UL) /*!< CCU4_CC4 INTS: CMUS (Bit 2) */ +#define CCU4_CC4_INTS_CMUS_Msk (0x4UL) /*!< CCU4_CC4 INTS: CMUS (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_INTS_CMDS_Pos (3UL) /*!< CCU4_CC4 INTS: CMDS (Bit 3) */ +#define CCU4_CC4_INTS_CMDS_Msk (0x8UL) /*!< CCU4_CC4 INTS: CMDS (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_INTS_E0AS_Pos (8UL) /*!< CCU4_CC4 INTS: E0AS (Bit 8) */ +#define CCU4_CC4_INTS_E0AS_Msk (0x100UL) /*!< CCU4_CC4 INTS: E0AS (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_INTS_E1AS_Pos (9UL) /*!< CCU4_CC4 INTS: E1AS (Bit 9) */ +#define CCU4_CC4_INTS_E1AS_Msk (0x200UL) /*!< CCU4_CC4 INTS: E1AS (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_INTS_E2AS_Pos (10UL) /*!< CCU4_CC4 INTS: E2AS (Bit 10) */ +#define CCU4_CC4_INTS_E2AS_Msk (0x400UL) /*!< CCU4_CC4 INTS: E2AS (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_INTS_TRPF_Pos (11UL) /*!< CCU4_CC4 INTS: TRPF (Bit 11) */ +#define CCU4_CC4_INTS_TRPF_Msk (0x800UL) /*!< CCU4_CC4 INTS: TRPF (Bitfield-Mask: 0x01) */ + +/* -------------------------------- CCU4_CC4_INTE ------------------------------- */ +#define CCU4_CC4_INTE_PME_Pos (0UL) /*!< CCU4_CC4 INTE: PME (Bit 0) */ +#define CCU4_CC4_INTE_PME_Msk (0x1UL) /*!< CCU4_CC4 INTE: PME (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_INTE_OME_Pos (1UL) /*!< CCU4_CC4 INTE: OME (Bit 1) */ +#define CCU4_CC4_INTE_OME_Msk (0x2UL) /*!< CCU4_CC4 INTE: OME (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_INTE_CMUE_Pos (2UL) /*!< CCU4_CC4 INTE: CMUE (Bit 2) */ +#define CCU4_CC4_INTE_CMUE_Msk (0x4UL) /*!< CCU4_CC4 INTE: CMUE (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_INTE_CMDE_Pos (3UL) /*!< CCU4_CC4 INTE: CMDE (Bit 3) */ +#define CCU4_CC4_INTE_CMDE_Msk (0x8UL) /*!< CCU4_CC4 INTE: CMDE (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_INTE_E0AE_Pos (8UL) /*!< CCU4_CC4 INTE: E0AE (Bit 8) */ +#define CCU4_CC4_INTE_E0AE_Msk (0x100UL) /*!< CCU4_CC4 INTE: E0AE (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_INTE_E1AE_Pos (9UL) /*!< CCU4_CC4 INTE: E1AE (Bit 9) */ +#define CCU4_CC4_INTE_E1AE_Msk (0x200UL) /*!< CCU4_CC4 INTE: E1AE (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_INTE_E2AE_Pos (10UL) /*!< CCU4_CC4 INTE: E2AE (Bit 10) */ +#define CCU4_CC4_INTE_E2AE_Msk (0x400UL) /*!< CCU4_CC4 INTE: E2AE (Bitfield-Mask: 0x01) */ + +/* -------------------------------- CCU4_CC4_SRS -------------------------------- */ +#define CCU4_CC4_SRS_POSR_Pos (0UL) /*!< CCU4_CC4 SRS: POSR (Bit 0) */ +#define CCU4_CC4_SRS_POSR_Msk (0x3UL) /*!< CCU4_CC4 SRS: POSR (Bitfield-Mask: 0x03) */ +#define CCU4_CC4_SRS_CMSR_Pos (2UL) /*!< CCU4_CC4 SRS: CMSR (Bit 2) */ +#define CCU4_CC4_SRS_CMSR_Msk (0xcUL) /*!< CCU4_CC4 SRS: CMSR (Bitfield-Mask: 0x03) */ +#define CCU4_CC4_SRS_E0SR_Pos (8UL) /*!< CCU4_CC4 SRS: E0SR (Bit 8) */ +#define CCU4_CC4_SRS_E0SR_Msk (0x300UL) /*!< CCU4_CC4 SRS: E0SR (Bitfield-Mask: 0x03) */ +#define CCU4_CC4_SRS_E1SR_Pos (10UL) /*!< CCU4_CC4 SRS: E1SR (Bit 10) */ +#define CCU4_CC4_SRS_E1SR_Msk (0xc00UL) /*!< CCU4_CC4 SRS: E1SR (Bitfield-Mask: 0x03) */ +#define CCU4_CC4_SRS_E2SR_Pos (12UL) /*!< CCU4_CC4 SRS: E2SR (Bit 12) */ +#define CCU4_CC4_SRS_E2SR_Msk (0x3000UL) /*!< CCU4_CC4 SRS: E2SR (Bitfield-Mask: 0x03) */ + +/* -------------------------------- CCU4_CC4_SWS -------------------------------- */ +#define CCU4_CC4_SWS_SPM_Pos (0UL) /*!< CCU4_CC4 SWS: SPM (Bit 0) */ +#define CCU4_CC4_SWS_SPM_Msk (0x1UL) /*!< CCU4_CC4 SWS: SPM (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_SWS_SOM_Pos (1UL) /*!< CCU4_CC4 SWS: SOM (Bit 1) */ +#define CCU4_CC4_SWS_SOM_Msk (0x2UL) /*!< CCU4_CC4 SWS: SOM (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_SWS_SCMU_Pos (2UL) /*!< CCU4_CC4 SWS: SCMU (Bit 2) */ +#define CCU4_CC4_SWS_SCMU_Msk (0x4UL) /*!< CCU4_CC4 SWS: SCMU (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_SWS_SCMD_Pos (3UL) /*!< CCU4_CC4 SWS: SCMD (Bit 3) */ +#define CCU4_CC4_SWS_SCMD_Msk (0x8UL) /*!< CCU4_CC4 SWS: SCMD (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_SWS_SE0A_Pos (8UL) /*!< CCU4_CC4 SWS: SE0A (Bit 8) */ +#define CCU4_CC4_SWS_SE0A_Msk (0x100UL) /*!< CCU4_CC4 SWS: SE0A (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_SWS_SE1A_Pos (9UL) /*!< CCU4_CC4 SWS: SE1A (Bit 9) */ +#define CCU4_CC4_SWS_SE1A_Msk (0x200UL) /*!< CCU4_CC4 SWS: SE1A (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_SWS_SE2A_Pos (10UL) /*!< CCU4_CC4 SWS: SE2A (Bit 10) */ +#define CCU4_CC4_SWS_SE2A_Msk (0x400UL) /*!< CCU4_CC4 SWS: SE2A (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_SWS_STRPF_Pos (11UL) /*!< CCU4_CC4 SWS: STRPF (Bit 11) */ +#define CCU4_CC4_SWS_STRPF_Msk (0x800UL) /*!< CCU4_CC4 SWS: STRPF (Bitfield-Mask: 0x01) */ + +/* -------------------------------- CCU4_CC4_SWR -------------------------------- */ +#define CCU4_CC4_SWR_RPM_Pos (0UL) /*!< CCU4_CC4 SWR: RPM (Bit 0) */ +#define CCU4_CC4_SWR_RPM_Msk (0x1UL) /*!< CCU4_CC4 SWR: RPM (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_SWR_ROM_Pos (1UL) /*!< CCU4_CC4 SWR: ROM (Bit 1) */ +#define CCU4_CC4_SWR_ROM_Msk (0x2UL) /*!< CCU4_CC4 SWR: ROM (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_SWR_RCMU_Pos (2UL) /*!< CCU4_CC4 SWR: RCMU (Bit 2) */ +#define CCU4_CC4_SWR_RCMU_Msk (0x4UL) /*!< CCU4_CC4 SWR: RCMU (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_SWR_RCMD_Pos (3UL) /*!< CCU4_CC4 SWR: RCMD (Bit 3) */ +#define CCU4_CC4_SWR_RCMD_Msk (0x8UL) /*!< CCU4_CC4 SWR: RCMD (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_SWR_RE0A_Pos (8UL) /*!< CCU4_CC4 SWR: RE0A (Bit 8) */ +#define CCU4_CC4_SWR_RE0A_Msk (0x100UL) /*!< CCU4_CC4 SWR: RE0A (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_SWR_RE1A_Pos (9UL) /*!< CCU4_CC4 SWR: RE1A (Bit 9) */ +#define CCU4_CC4_SWR_RE1A_Msk (0x200UL) /*!< CCU4_CC4 SWR: RE1A (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_SWR_RE2A_Pos (10UL) /*!< CCU4_CC4 SWR: RE2A (Bit 10) */ +#define CCU4_CC4_SWR_RE2A_Msk (0x400UL) /*!< CCU4_CC4 SWR: RE2A (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_SWR_RTRPF_Pos (11UL) /*!< CCU4_CC4 SWR: RTRPF (Bit 11) */ +#define CCU4_CC4_SWR_RTRPF_Msk (0x800UL) /*!< CCU4_CC4 SWR: RTRPF (Bitfield-Mask: 0x01) */ + +/* ------------------------------- CCU4_CC4_ECRD0 ------------------------------- */ +#define CCU4_CC4_ECRD0_CAPV_Pos (0UL) /*!< CCU4_CC4 ECRD0: CAPV (Bit 0) */ +#define CCU4_CC4_ECRD0_CAPV_Msk (0xffffUL) /*!< CCU4_CC4 ECRD0: CAPV (Bitfield-Mask: 0xffff) */ +#define CCU4_CC4_ECRD0_FPCV_Pos (16UL) /*!< CCU4_CC4 ECRD0: FPCV (Bit 16) */ +#define CCU4_CC4_ECRD0_FPCV_Msk (0xf0000UL) /*!< CCU4_CC4 ECRD0: FPCV (Bitfield-Mask: 0x0f) */ +#define CCU4_CC4_ECRD0_SPTR_Pos (20UL) /*!< CCU4_CC4 ECRD0: SPTR (Bit 20) */ +#define CCU4_CC4_ECRD0_SPTR_Msk (0x300000UL) /*!< CCU4_CC4 ECRD0: SPTR (Bitfield-Mask: 0x03) */ +#define CCU4_CC4_ECRD0_VPTR_Pos (22UL) /*!< CCU4_CC4 ECRD0: VPTR (Bit 22) */ +#define CCU4_CC4_ECRD0_VPTR_Msk (0xc00000UL) /*!< CCU4_CC4 ECRD0: VPTR (Bitfield-Mask: 0x03) */ +#define CCU4_CC4_ECRD0_FFL_Pos (24UL) /*!< CCU4_CC4 ECRD0: FFL (Bit 24) */ +#define CCU4_CC4_ECRD0_FFL_Msk (0x1000000UL) /*!< CCU4_CC4 ECRD0: FFL (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_ECRD0_LCV_Pos (25UL) /*!< CCU4_CC4 ECRD0: LCV (Bit 25) */ +#define CCU4_CC4_ECRD0_LCV_Msk (0x2000000UL) /*!< CCU4_CC4 ECRD0: LCV (Bitfield-Mask: 0x01) */ + +/* ------------------------------- CCU4_CC4_ECRD1 ------------------------------- */ +#define CCU4_CC4_ECRD1_CAPV_Pos (0UL) /*!< CCU4_CC4 ECRD1: CAPV (Bit 0) */ +#define CCU4_CC4_ECRD1_CAPV_Msk (0xffffUL) /*!< CCU4_CC4 ECRD1: CAPV (Bitfield-Mask: 0xffff) */ +#define CCU4_CC4_ECRD1_FPCV_Pos (16UL) /*!< CCU4_CC4 ECRD1: FPCV (Bit 16) */ +#define CCU4_CC4_ECRD1_FPCV_Msk (0xf0000UL) /*!< CCU4_CC4 ECRD1: FPCV (Bitfield-Mask: 0x0f) */ +#define CCU4_CC4_ECRD1_SPTR_Pos (20UL) /*!< CCU4_CC4 ECRD1: SPTR (Bit 20) */ +#define CCU4_CC4_ECRD1_SPTR_Msk (0x300000UL) /*!< CCU4_CC4 ECRD1: SPTR (Bitfield-Mask: 0x03) */ +#define CCU4_CC4_ECRD1_VPTR_Pos (22UL) /*!< CCU4_CC4 ECRD1: VPTR (Bit 22) */ +#define CCU4_CC4_ECRD1_VPTR_Msk (0xc00000UL) /*!< CCU4_CC4 ECRD1: VPTR (Bitfield-Mask: 0x03) */ +#define CCU4_CC4_ECRD1_FFL_Pos (24UL) /*!< CCU4_CC4 ECRD1: FFL (Bit 24) */ +#define CCU4_CC4_ECRD1_FFL_Msk (0x1000000UL) /*!< CCU4_CC4 ECRD1: FFL (Bitfield-Mask: 0x01) */ +#define CCU4_CC4_ECRD1_LCV_Pos (25UL) /*!< CCU4_CC4 ECRD1: LCV (Bit 25) */ +#define CCU4_CC4_ECRD1_LCV_Msk (0x2000000UL) /*!< CCU4_CC4 ECRD1: LCV (Bitfield-Mask: 0x01) */ + + +/* ================================================================================ */ +/* ================ Group 'CCU8' Position & Mask ================ */ +/* ================================================================================ */ + + +/* --------------------------------- CCU8_GCTRL --------------------------------- */ +#define CCU8_GCTRL_PRBC_Pos (0UL) /*!< CCU8 GCTRL: PRBC (Bit 0) */ +#define CCU8_GCTRL_PRBC_Msk (0x7UL) /*!< CCU8 GCTRL: PRBC (Bitfield-Mask: 0x07) */ +#define CCU8_GCTRL_PCIS_Pos (4UL) /*!< CCU8 GCTRL: PCIS (Bit 4) */ +#define CCU8_GCTRL_PCIS_Msk (0x30UL) /*!< CCU8 GCTRL: PCIS (Bitfield-Mask: 0x03) */ +#define CCU8_GCTRL_SUSCFG_Pos (8UL) /*!< CCU8 GCTRL: SUSCFG (Bit 8) */ +#define CCU8_GCTRL_SUSCFG_Msk (0x300UL) /*!< CCU8 GCTRL: SUSCFG (Bitfield-Mask: 0x03) */ +#define CCU8_GCTRL_MSE0_Pos (10UL) /*!< CCU8 GCTRL: MSE0 (Bit 10) */ +#define CCU8_GCTRL_MSE0_Msk (0x400UL) /*!< CCU8 GCTRL: MSE0 (Bitfield-Mask: 0x01) */ +#define CCU8_GCTRL_MSE1_Pos (11UL) /*!< CCU8 GCTRL: MSE1 (Bit 11) */ +#define CCU8_GCTRL_MSE1_Msk (0x800UL) /*!< CCU8 GCTRL: MSE1 (Bitfield-Mask: 0x01) */ +#define CCU8_GCTRL_MSE2_Pos (12UL) /*!< CCU8 GCTRL: MSE2 (Bit 12) */ +#define CCU8_GCTRL_MSE2_Msk (0x1000UL) /*!< CCU8 GCTRL: MSE2 (Bitfield-Mask: 0x01) */ +#define CCU8_GCTRL_MSE3_Pos (13UL) /*!< CCU8 GCTRL: MSE3 (Bit 13) */ +#define CCU8_GCTRL_MSE3_Msk (0x2000UL) /*!< CCU8 GCTRL: MSE3 (Bitfield-Mask: 0x01) */ +#define CCU8_GCTRL_MSDE_Pos (14UL) /*!< CCU8 GCTRL: MSDE (Bit 14) */ +#define CCU8_GCTRL_MSDE_Msk (0xc000UL) /*!< CCU8 GCTRL: MSDE (Bitfield-Mask: 0x03) */ + +/* --------------------------------- CCU8_GSTAT --------------------------------- */ +#define CCU8_GSTAT_S0I_Pos (0UL) /*!< CCU8 GSTAT: S0I (Bit 0) */ +#define CCU8_GSTAT_S0I_Msk (0x1UL) /*!< CCU8 GSTAT: S0I (Bitfield-Mask: 0x01) */ +#define CCU8_GSTAT_S1I_Pos (1UL) /*!< CCU8 GSTAT: S1I (Bit 1) */ +#define CCU8_GSTAT_S1I_Msk (0x2UL) /*!< CCU8 GSTAT: S1I (Bitfield-Mask: 0x01) */ +#define CCU8_GSTAT_S2I_Pos (2UL) /*!< CCU8 GSTAT: S2I (Bit 2) */ +#define CCU8_GSTAT_S2I_Msk (0x4UL) /*!< CCU8 GSTAT: S2I (Bitfield-Mask: 0x01) */ +#define CCU8_GSTAT_S3I_Pos (3UL) /*!< CCU8 GSTAT: S3I (Bit 3) */ +#define CCU8_GSTAT_S3I_Msk (0x8UL) /*!< CCU8 GSTAT: S3I (Bitfield-Mask: 0x01) */ +#define CCU8_GSTAT_PRB_Pos (8UL) /*!< CCU8 GSTAT: PRB (Bit 8) */ +#define CCU8_GSTAT_PRB_Msk (0x100UL) /*!< CCU8 GSTAT: PRB (Bitfield-Mask: 0x01) */ +#define CCU8_GSTAT_PCRB_Pos (10UL) /*!< CCU8 GSTAT: PCRB (Bit 10) */ +#define CCU8_GSTAT_PCRB_Msk (0x400UL) /*!< CCU8 GSTAT: PCRB (Bitfield-Mask: 0x01) */ + +/* --------------------------------- CCU8_GIDLS --------------------------------- */ +#define CCU8_GIDLS_SS0I_Pos (0UL) /*!< CCU8 GIDLS: SS0I (Bit 0) */ +#define CCU8_GIDLS_SS0I_Msk (0x1UL) /*!< CCU8 GIDLS: SS0I (Bitfield-Mask: 0x01) */ +#define CCU8_GIDLS_SS1I_Pos (1UL) /*!< CCU8 GIDLS: SS1I (Bit 1) */ +#define CCU8_GIDLS_SS1I_Msk (0x2UL) /*!< CCU8 GIDLS: SS1I (Bitfield-Mask: 0x01) */ +#define CCU8_GIDLS_SS2I_Pos (2UL) /*!< CCU8 GIDLS: SS2I (Bit 2) */ +#define CCU8_GIDLS_SS2I_Msk (0x4UL) /*!< CCU8 GIDLS: SS2I (Bitfield-Mask: 0x01) */ +#define CCU8_GIDLS_SS3I_Pos (3UL) /*!< CCU8 GIDLS: SS3I (Bit 3) */ +#define CCU8_GIDLS_SS3I_Msk (0x8UL) /*!< CCU8 GIDLS: SS3I (Bitfield-Mask: 0x01) */ +#define CCU8_GIDLS_CPRB_Pos (8UL) /*!< CCU8 GIDLS: CPRB (Bit 8) */ +#define CCU8_GIDLS_CPRB_Msk (0x100UL) /*!< CCU8 GIDLS: CPRB (Bitfield-Mask: 0x01) */ +#define CCU8_GIDLS_PSIC_Pos (9UL) /*!< CCU8 GIDLS: PSIC (Bit 9) */ +#define CCU8_GIDLS_PSIC_Msk (0x200UL) /*!< CCU8 GIDLS: PSIC (Bitfield-Mask: 0x01) */ +#define CCU8_GIDLS_CPCH_Pos (10UL) /*!< CCU8 GIDLS: CPCH (Bit 10) */ +#define CCU8_GIDLS_CPCH_Msk (0x400UL) /*!< CCU8 GIDLS: CPCH (Bitfield-Mask: 0x01) */ + +/* --------------------------------- CCU8_GIDLC --------------------------------- */ +#define CCU8_GIDLC_CS0I_Pos (0UL) /*!< CCU8 GIDLC: CS0I (Bit 0) */ +#define CCU8_GIDLC_CS0I_Msk (0x1UL) /*!< CCU8 GIDLC: CS0I (Bitfield-Mask: 0x01) */ +#define CCU8_GIDLC_CS1I_Pos (1UL) /*!< CCU8 GIDLC: CS1I (Bit 1) */ +#define CCU8_GIDLC_CS1I_Msk (0x2UL) /*!< CCU8 GIDLC: CS1I (Bitfield-Mask: 0x01) */ +#define CCU8_GIDLC_CS2I_Pos (2UL) /*!< CCU8 GIDLC: CS2I (Bit 2) */ +#define CCU8_GIDLC_CS2I_Msk (0x4UL) /*!< CCU8 GIDLC: CS2I (Bitfield-Mask: 0x01) */ +#define CCU8_GIDLC_CS3I_Pos (3UL) /*!< CCU8 GIDLC: CS3I (Bit 3) */ +#define CCU8_GIDLC_CS3I_Msk (0x8UL) /*!< CCU8 GIDLC: CS3I (Bitfield-Mask: 0x01) */ +#define CCU8_GIDLC_SPRB_Pos (8UL) /*!< CCU8 GIDLC: SPRB (Bit 8) */ +#define CCU8_GIDLC_SPRB_Msk (0x100UL) /*!< CCU8 GIDLC: SPRB (Bitfield-Mask: 0x01) */ +#define CCU8_GIDLC_SPCH_Pos (10UL) /*!< CCU8 GIDLC: SPCH (Bit 10) */ +#define CCU8_GIDLC_SPCH_Msk (0x400UL) /*!< CCU8 GIDLC: SPCH (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- CCU8_GCSS --------------------------------- */ +#define CCU8_GCSS_S0SE_Pos (0UL) /*!< CCU8 GCSS: S0SE (Bit 0) */ +#define CCU8_GCSS_S0SE_Msk (0x1UL) /*!< CCU8 GCSS: S0SE (Bitfield-Mask: 0x01) */ +#define CCU8_GCSS_S0DSE_Pos (1UL) /*!< CCU8 GCSS: S0DSE (Bit 1) */ +#define CCU8_GCSS_S0DSE_Msk (0x2UL) /*!< CCU8 GCSS: S0DSE (Bitfield-Mask: 0x01) */ +#define CCU8_GCSS_S0PSE_Pos (2UL) /*!< CCU8 GCSS: S0PSE (Bit 2) */ +#define CCU8_GCSS_S0PSE_Msk (0x4UL) /*!< CCU8 GCSS: S0PSE (Bitfield-Mask: 0x01) */ +#define CCU8_GCSS_S1SE_Pos (4UL) /*!< CCU8 GCSS: S1SE (Bit 4) */ +#define CCU8_GCSS_S1SE_Msk (0x10UL) /*!< CCU8 GCSS: S1SE (Bitfield-Mask: 0x01) */ +#define CCU8_GCSS_S1DSE_Pos (5UL) /*!< CCU8 GCSS: S1DSE (Bit 5) */ +#define CCU8_GCSS_S1DSE_Msk (0x20UL) /*!< CCU8 GCSS: S1DSE (Bitfield-Mask: 0x01) */ +#define CCU8_GCSS_S1PSE_Pos (6UL) /*!< CCU8 GCSS: S1PSE (Bit 6) */ +#define CCU8_GCSS_S1PSE_Msk (0x40UL) /*!< CCU8 GCSS: S1PSE (Bitfield-Mask: 0x01) */ +#define CCU8_GCSS_S2SE_Pos (8UL) /*!< CCU8 GCSS: S2SE (Bit 8) */ +#define CCU8_GCSS_S2SE_Msk (0x100UL) /*!< CCU8 GCSS: S2SE (Bitfield-Mask: 0x01) */ +#define CCU8_GCSS_S2DSE_Pos (9UL) /*!< CCU8 GCSS: S2DSE (Bit 9) */ +#define CCU8_GCSS_S2DSE_Msk (0x200UL) /*!< CCU8 GCSS: S2DSE (Bitfield-Mask: 0x01) */ +#define CCU8_GCSS_S2PSE_Pos (10UL) /*!< CCU8 GCSS: S2PSE (Bit 10) */ +#define CCU8_GCSS_S2PSE_Msk (0x400UL) /*!< CCU8 GCSS: S2PSE (Bitfield-Mask: 0x01) */ +#define CCU8_GCSS_S3SE_Pos (12UL) /*!< CCU8 GCSS: S3SE (Bit 12) */ +#define CCU8_GCSS_S3SE_Msk (0x1000UL) /*!< CCU8 GCSS: S3SE (Bitfield-Mask: 0x01) */ +#define CCU8_GCSS_S3DSE_Pos (13UL) /*!< CCU8 GCSS: S3DSE (Bit 13) */ +#define CCU8_GCSS_S3DSE_Msk (0x2000UL) /*!< CCU8 GCSS: S3DSE (Bitfield-Mask: 0x01) */ +#define CCU8_GCSS_S3PSE_Pos (14UL) /*!< CCU8 GCSS: S3PSE (Bit 14) */ +#define CCU8_GCSS_S3PSE_Msk (0x4000UL) /*!< CCU8 GCSS: S3PSE (Bitfield-Mask: 0x01) */ +#define CCU8_GCSS_S0ST1S_Pos (16UL) /*!< CCU8 GCSS: S0ST1S (Bit 16) */ +#define CCU8_GCSS_S0ST1S_Msk (0x10000UL) /*!< CCU8 GCSS: S0ST1S (Bitfield-Mask: 0x01) */ +#define CCU8_GCSS_S1ST1S_Pos (17UL) /*!< CCU8 GCSS: S1ST1S (Bit 17) */ +#define CCU8_GCSS_S1ST1S_Msk (0x20000UL) /*!< CCU8 GCSS: S1ST1S (Bitfield-Mask: 0x01) */ +#define CCU8_GCSS_S2ST1S_Pos (18UL) /*!< CCU8 GCSS: S2ST1S (Bit 18) */ +#define CCU8_GCSS_S2ST1S_Msk (0x40000UL) /*!< CCU8 GCSS: S2ST1S (Bitfield-Mask: 0x01) */ +#define CCU8_GCSS_S3ST1S_Pos (19UL) /*!< CCU8 GCSS: S3ST1S (Bit 19) */ +#define CCU8_GCSS_S3ST1S_Msk (0x80000UL) /*!< CCU8 GCSS: S3ST1S (Bitfield-Mask: 0x01) */ +#define CCU8_GCSS_S0ST2S_Pos (20UL) /*!< CCU8 GCSS: S0ST2S (Bit 20) */ +#define CCU8_GCSS_S0ST2S_Msk (0x100000UL) /*!< CCU8 GCSS: S0ST2S (Bitfield-Mask: 0x01) */ +#define CCU8_GCSS_S1ST2S_Pos (21UL) /*!< CCU8 GCSS: S1ST2S (Bit 21) */ +#define CCU8_GCSS_S1ST2S_Msk (0x200000UL) /*!< CCU8 GCSS: S1ST2S (Bitfield-Mask: 0x01) */ +#define CCU8_GCSS_S2ST2S_Pos (22UL) /*!< CCU8 GCSS: S2ST2S (Bit 22) */ +#define CCU8_GCSS_S2ST2S_Msk (0x400000UL) /*!< CCU8 GCSS: S2ST2S (Bitfield-Mask: 0x01) */ +#define CCU8_GCSS_S3ST2S_Pos (23UL) /*!< CCU8 GCSS: S3ST2S (Bit 23) */ +#define CCU8_GCSS_S3ST2S_Msk (0x800000UL) /*!< CCU8 GCSS: S3ST2S (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- CCU8_GCSC --------------------------------- */ +#define CCU8_GCSC_S0SC_Pos (0UL) /*!< CCU8 GCSC: S0SC (Bit 0) */ +#define CCU8_GCSC_S0SC_Msk (0x1UL) /*!< CCU8 GCSC: S0SC (Bitfield-Mask: 0x01) */ +#define CCU8_GCSC_S0DSC_Pos (1UL) /*!< CCU8 GCSC: S0DSC (Bit 1) */ +#define CCU8_GCSC_S0DSC_Msk (0x2UL) /*!< CCU8 GCSC: S0DSC (Bitfield-Mask: 0x01) */ +#define CCU8_GCSC_S0PSC_Pos (2UL) /*!< CCU8 GCSC: S0PSC (Bit 2) */ +#define CCU8_GCSC_S0PSC_Msk (0x4UL) /*!< CCU8 GCSC: S0PSC (Bitfield-Mask: 0x01) */ +#define CCU8_GCSC_S1SC_Pos (4UL) /*!< CCU8 GCSC: S1SC (Bit 4) */ +#define CCU8_GCSC_S1SC_Msk (0x10UL) /*!< CCU8 GCSC: S1SC (Bitfield-Mask: 0x01) */ +#define CCU8_GCSC_S1DSC_Pos (5UL) /*!< CCU8 GCSC: S1DSC (Bit 5) */ +#define CCU8_GCSC_S1DSC_Msk (0x20UL) /*!< CCU8 GCSC: S1DSC (Bitfield-Mask: 0x01) */ +#define CCU8_GCSC_S1PSC_Pos (6UL) /*!< CCU8 GCSC: S1PSC (Bit 6) */ +#define CCU8_GCSC_S1PSC_Msk (0x40UL) /*!< CCU8 GCSC: S1PSC (Bitfield-Mask: 0x01) */ +#define CCU8_GCSC_S2SC_Pos (8UL) /*!< CCU8 GCSC: S2SC (Bit 8) */ +#define CCU8_GCSC_S2SC_Msk (0x100UL) /*!< CCU8 GCSC: S2SC (Bitfield-Mask: 0x01) */ +#define CCU8_GCSC_S2DSC_Pos (9UL) /*!< CCU8 GCSC: S2DSC (Bit 9) */ +#define CCU8_GCSC_S2DSC_Msk (0x200UL) /*!< CCU8 GCSC: S2DSC (Bitfield-Mask: 0x01) */ +#define CCU8_GCSC_S2PSC_Pos (10UL) /*!< CCU8 GCSC: S2PSC (Bit 10) */ +#define CCU8_GCSC_S2PSC_Msk (0x400UL) /*!< CCU8 GCSC: S2PSC (Bitfield-Mask: 0x01) */ +#define CCU8_GCSC_S3SC_Pos (12UL) /*!< CCU8 GCSC: S3SC (Bit 12) */ +#define CCU8_GCSC_S3SC_Msk (0x1000UL) /*!< CCU8 GCSC: S3SC (Bitfield-Mask: 0x01) */ +#define CCU8_GCSC_S3DSC_Pos (13UL) /*!< CCU8 GCSC: S3DSC (Bit 13) */ +#define CCU8_GCSC_S3DSC_Msk (0x2000UL) /*!< CCU8 GCSC: S3DSC (Bitfield-Mask: 0x01) */ +#define CCU8_GCSC_S3PSC_Pos (14UL) /*!< CCU8 GCSC: S3PSC (Bit 14) */ +#define CCU8_GCSC_S3PSC_Msk (0x4000UL) /*!< CCU8 GCSC: S3PSC (Bitfield-Mask: 0x01) */ +#define CCU8_GCSC_S0ST1C_Pos (16UL) /*!< CCU8 GCSC: S0ST1C (Bit 16) */ +#define CCU8_GCSC_S0ST1C_Msk (0x10000UL) /*!< CCU8 GCSC: S0ST1C (Bitfield-Mask: 0x01) */ +#define CCU8_GCSC_S1ST1C_Pos (17UL) /*!< CCU8 GCSC: S1ST1C (Bit 17) */ +#define CCU8_GCSC_S1ST1C_Msk (0x20000UL) /*!< CCU8 GCSC: S1ST1C (Bitfield-Mask: 0x01) */ +#define CCU8_GCSC_S2ST1C_Pos (18UL) /*!< CCU8 GCSC: S2ST1C (Bit 18) */ +#define CCU8_GCSC_S2ST1C_Msk (0x40000UL) /*!< CCU8 GCSC: S2ST1C (Bitfield-Mask: 0x01) */ +#define CCU8_GCSC_S3ST1C_Pos (19UL) /*!< CCU8 GCSC: S3ST1C (Bit 19) */ +#define CCU8_GCSC_S3ST1C_Msk (0x80000UL) /*!< CCU8 GCSC: S3ST1C (Bitfield-Mask: 0x01) */ +#define CCU8_GCSC_S0ST2C_Pos (20UL) /*!< CCU8 GCSC: S0ST2C (Bit 20) */ +#define CCU8_GCSC_S0ST2C_Msk (0x100000UL) /*!< CCU8 GCSC: S0ST2C (Bitfield-Mask: 0x01) */ +#define CCU8_GCSC_S1ST2C_Pos (21UL) /*!< CCU8 GCSC: S1ST2C (Bit 21) */ +#define CCU8_GCSC_S1ST2C_Msk (0x200000UL) /*!< CCU8 GCSC: S1ST2C (Bitfield-Mask: 0x01) */ +#define CCU8_GCSC_S2ST2C_Pos (22UL) /*!< CCU8 GCSC: S2ST2C (Bit 22) */ +#define CCU8_GCSC_S2ST2C_Msk (0x400000UL) /*!< CCU8 GCSC: S2ST2C (Bitfield-Mask: 0x01) */ +#define CCU8_GCSC_S3ST2C_Pos (23UL) /*!< CCU8 GCSC: S3ST2C (Bit 23) */ +#define CCU8_GCSC_S3ST2C_Msk (0x800000UL) /*!< CCU8 GCSC: S3ST2C (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- CCU8_GCST --------------------------------- */ +#define CCU8_GCST_S0SS_Pos (0UL) /*!< CCU8 GCST: S0SS (Bit 0) */ +#define CCU8_GCST_S0SS_Msk (0x1UL) /*!< CCU8 GCST: S0SS (Bitfield-Mask: 0x01) */ +#define CCU8_GCST_S0DSS_Pos (1UL) /*!< CCU8 GCST: S0DSS (Bit 1) */ +#define CCU8_GCST_S0DSS_Msk (0x2UL) /*!< CCU8 GCST: S0DSS (Bitfield-Mask: 0x01) */ +#define CCU8_GCST_S0PSS_Pos (2UL) /*!< CCU8 GCST: S0PSS (Bit 2) */ +#define CCU8_GCST_S0PSS_Msk (0x4UL) /*!< CCU8 GCST: S0PSS (Bitfield-Mask: 0x01) */ +#define CCU8_GCST_S1SS_Pos (4UL) /*!< CCU8 GCST: S1SS (Bit 4) */ +#define CCU8_GCST_S1SS_Msk (0x10UL) /*!< CCU8 GCST: S1SS (Bitfield-Mask: 0x01) */ +#define CCU8_GCST_S1DSS_Pos (5UL) /*!< CCU8 GCST: S1DSS (Bit 5) */ +#define CCU8_GCST_S1DSS_Msk (0x20UL) /*!< CCU8 GCST: S1DSS (Bitfield-Mask: 0x01) */ +#define CCU8_GCST_S1PSS_Pos (6UL) /*!< CCU8 GCST: S1PSS (Bit 6) */ +#define CCU8_GCST_S1PSS_Msk (0x40UL) /*!< CCU8 GCST: S1PSS (Bitfield-Mask: 0x01) */ +#define CCU8_GCST_S2SS_Pos (8UL) /*!< CCU8 GCST: S2SS (Bit 8) */ +#define CCU8_GCST_S2SS_Msk (0x100UL) /*!< CCU8 GCST: S2SS (Bitfield-Mask: 0x01) */ +#define CCU8_GCST_S2DSS_Pos (9UL) /*!< CCU8 GCST: S2DSS (Bit 9) */ +#define CCU8_GCST_S2DSS_Msk (0x200UL) /*!< CCU8 GCST: S2DSS (Bitfield-Mask: 0x01) */ +#define CCU8_GCST_S2PSS_Pos (10UL) /*!< CCU8 GCST: S2PSS (Bit 10) */ +#define CCU8_GCST_S2PSS_Msk (0x400UL) /*!< CCU8 GCST: S2PSS (Bitfield-Mask: 0x01) */ +#define CCU8_GCST_S3SS_Pos (12UL) /*!< CCU8 GCST: S3SS (Bit 12) */ +#define CCU8_GCST_S3SS_Msk (0x1000UL) /*!< CCU8 GCST: S3SS (Bitfield-Mask: 0x01) */ +#define CCU8_GCST_S3DSS_Pos (13UL) /*!< CCU8 GCST: S3DSS (Bit 13) */ +#define CCU8_GCST_S3DSS_Msk (0x2000UL) /*!< CCU8 GCST: S3DSS (Bitfield-Mask: 0x01) */ +#define CCU8_GCST_S3PSS_Pos (14UL) /*!< CCU8 GCST: S3PSS (Bit 14) */ +#define CCU8_GCST_S3PSS_Msk (0x4000UL) /*!< CCU8 GCST: S3PSS (Bitfield-Mask: 0x01) */ +#define CCU8_GCST_CC80ST1_Pos (16UL) /*!< CCU8 GCST: CC80ST1 (Bit 16) */ +#define CCU8_GCST_CC80ST1_Msk (0x10000UL) /*!< CCU8 GCST: CC80ST1 (Bitfield-Mask: 0x01) */ +#define CCU8_GCST_CC81ST1_Pos (17UL) /*!< CCU8 GCST: CC81ST1 (Bit 17) */ +#define CCU8_GCST_CC81ST1_Msk (0x20000UL) /*!< CCU8 GCST: CC81ST1 (Bitfield-Mask: 0x01) */ +#define CCU8_GCST_CC82ST1_Pos (18UL) /*!< CCU8 GCST: CC82ST1 (Bit 18) */ +#define CCU8_GCST_CC82ST1_Msk (0x40000UL) /*!< CCU8 GCST: CC82ST1 (Bitfield-Mask: 0x01) */ +#define CCU8_GCST_CC83ST1_Pos (19UL) /*!< CCU8 GCST: CC83ST1 (Bit 19) */ +#define CCU8_GCST_CC83ST1_Msk (0x80000UL) /*!< CCU8 GCST: CC83ST1 (Bitfield-Mask: 0x01) */ +#define CCU8_GCST_CC80ST2_Pos (20UL) /*!< CCU8 GCST: CC80ST2 (Bit 20) */ +#define CCU8_GCST_CC80ST2_Msk (0x100000UL) /*!< CCU8 GCST: CC80ST2 (Bitfield-Mask: 0x01) */ +#define CCU8_GCST_CC81ST2_Pos (21UL) /*!< CCU8 GCST: CC81ST2 (Bit 21) */ +#define CCU8_GCST_CC81ST2_Msk (0x200000UL) /*!< CCU8 GCST: CC81ST2 (Bitfield-Mask: 0x01) */ +#define CCU8_GCST_CC82ST2_Pos (22UL) /*!< CCU8 GCST: CC82ST2 (Bit 22) */ +#define CCU8_GCST_CC82ST2_Msk (0x400000UL) /*!< CCU8 GCST: CC82ST2 (Bitfield-Mask: 0x01) */ +#define CCU8_GCST_CC83ST2_Pos (23UL) /*!< CCU8 GCST: CC83ST2 (Bit 23) */ +#define CCU8_GCST_CC83ST2_Msk (0x800000UL) /*!< CCU8 GCST: CC83ST2 (Bitfield-Mask: 0x01) */ + +/* --------------------------------- CCU8_GPCHK --------------------------------- */ +#define CCU8_GPCHK_PASE_Pos (0UL) /*!< CCU8 GPCHK: PASE (Bit 0) */ +#define CCU8_GPCHK_PASE_Msk (0x1UL) /*!< CCU8 GPCHK: PASE (Bitfield-Mask: 0x01) */ +#define CCU8_GPCHK_PACS_Pos (1UL) /*!< CCU8 GPCHK: PACS (Bit 1) */ +#define CCU8_GPCHK_PACS_Msk (0x6UL) /*!< CCU8 GPCHK: PACS (Bitfield-Mask: 0x03) */ +#define CCU8_GPCHK_PISEL_Pos (3UL) /*!< CCU8 GPCHK: PISEL (Bit 3) */ +#define CCU8_GPCHK_PISEL_Msk (0x18UL) /*!< CCU8 GPCHK: PISEL (Bitfield-Mask: 0x03) */ +#define CCU8_GPCHK_PCDS_Pos (5UL) /*!< CCU8 GPCHK: PCDS (Bit 5) */ +#define CCU8_GPCHK_PCDS_Msk (0x60UL) /*!< CCU8 GPCHK: PCDS (Bitfield-Mask: 0x03) */ +#define CCU8_GPCHK_PCTS_Pos (7UL) /*!< CCU8 GPCHK: PCTS (Bit 7) */ +#define CCU8_GPCHK_PCTS_Msk (0x80UL) /*!< CCU8 GPCHK: PCTS (Bitfield-Mask: 0x01) */ +#define CCU8_GPCHK_PCST_Pos (15UL) /*!< CCU8 GPCHK: PCST (Bit 15) */ +#define CCU8_GPCHK_PCST_Msk (0x8000UL) /*!< CCU8 GPCHK: PCST (Bitfield-Mask: 0x01) */ +#define CCU8_GPCHK_PCSEL0_Pos (16UL) /*!< CCU8 GPCHK: PCSEL0 (Bit 16) */ +#define CCU8_GPCHK_PCSEL0_Msk (0xf0000UL) /*!< CCU8 GPCHK: PCSEL0 (Bitfield-Mask: 0x0f) */ +#define CCU8_GPCHK_PCSEL1_Pos (20UL) /*!< CCU8 GPCHK: PCSEL1 (Bit 20) */ +#define CCU8_GPCHK_PCSEL1_Msk (0xf00000UL) /*!< CCU8 GPCHK: PCSEL1 (Bitfield-Mask: 0x0f) */ +#define CCU8_GPCHK_PCSEL2_Pos (24UL) /*!< CCU8 GPCHK: PCSEL2 (Bit 24) */ +#define CCU8_GPCHK_PCSEL2_Msk (0xf000000UL) /*!< CCU8 GPCHK: PCSEL2 (Bitfield-Mask: 0x0f) */ +#define CCU8_GPCHK_PCSEL3_Pos (28UL) /*!< CCU8 GPCHK: PCSEL3 (Bit 28) */ +#define CCU8_GPCHK_PCSEL3_Msk (0xf0000000UL) /*!< CCU8 GPCHK: PCSEL3 (Bitfield-Mask: 0x0f) */ + +/* ---------------------------------- CCU8_MIDR --------------------------------- */ +#define CCU8_MIDR_MODR_Pos (0UL) /*!< CCU8 MIDR: MODR (Bit 0) */ +#define CCU8_MIDR_MODR_Msk (0xffUL) /*!< CCU8 MIDR: MODR (Bitfield-Mask: 0xff) */ +#define CCU8_MIDR_MODT_Pos (8UL) /*!< CCU8 MIDR: MODT (Bit 8) */ +#define CCU8_MIDR_MODT_Msk (0xff00UL) /*!< CCU8 MIDR: MODT (Bitfield-Mask: 0xff) */ +#define CCU8_MIDR_MODN_Pos (16UL) /*!< CCU8 MIDR: MODN (Bit 16) */ +#define CCU8_MIDR_MODN_Msk (0xffff0000UL) /*!< CCU8 MIDR: MODN (Bitfield-Mask: 0xffff) */ + + +/* ================================================================================ */ +/* ================ Group 'CCU8_CC8' Position & Mask ================ */ +/* ================================================================================ */ + + +/* -------------------------------- CCU8_CC8_INS -------------------------------- */ +#define CCU8_CC8_INS_EV0IS_Pos (0UL) /*!< CCU8_CC8 INS: EV0IS (Bit 0) */ +#define CCU8_CC8_INS_EV0IS_Msk (0xfUL) /*!< CCU8_CC8 INS: EV0IS (Bitfield-Mask: 0x0f) */ +#define CCU8_CC8_INS_EV1IS_Pos (4UL) /*!< CCU8_CC8 INS: EV1IS (Bit 4) */ +#define CCU8_CC8_INS_EV1IS_Msk (0xf0UL) /*!< CCU8_CC8 INS: EV1IS (Bitfield-Mask: 0x0f) */ +#define CCU8_CC8_INS_EV2IS_Pos (8UL) /*!< CCU8_CC8 INS: EV2IS (Bit 8) */ +#define CCU8_CC8_INS_EV2IS_Msk (0xf00UL) /*!< CCU8_CC8 INS: EV2IS (Bitfield-Mask: 0x0f) */ +#define CCU8_CC8_INS_EV0EM_Pos (16UL) /*!< CCU8_CC8 INS: EV0EM (Bit 16) */ +#define CCU8_CC8_INS_EV0EM_Msk (0x30000UL) /*!< CCU8_CC8 INS: EV0EM (Bitfield-Mask: 0x03) */ +#define CCU8_CC8_INS_EV1EM_Pos (18UL) /*!< CCU8_CC8 INS: EV1EM (Bit 18) */ +#define CCU8_CC8_INS_EV1EM_Msk (0xc0000UL) /*!< CCU8_CC8 INS: EV1EM (Bitfield-Mask: 0x03) */ +#define CCU8_CC8_INS_EV2EM_Pos (20UL) /*!< CCU8_CC8 INS: EV2EM (Bit 20) */ +#define CCU8_CC8_INS_EV2EM_Msk (0x300000UL) /*!< CCU8_CC8 INS: EV2EM (Bitfield-Mask: 0x03) */ +#define CCU8_CC8_INS_EV0LM_Pos (22UL) /*!< CCU8_CC8 INS: EV0LM (Bit 22) */ +#define CCU8_CC8_INS_EV0LM_Msk (0x400000UL) /*!< CCU8_CC8 INS: EV0LM (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_INS_EV1LM_Pos (23UL) /*!< CCU8_CC8 INS: EV1LM (Bit 23) */ +#define CCU8_CC8_INS_EV1LM_Msk (0x800000UL) /*!< CCU8_CC8 INS: EV1LM (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_INS_EV2LM_Pos (24UL) /*!< CCU8_CC8 INS: EV2LM (Bit 24) */ +#define CCU8_CC8_INS_EV2LM_Msk (0x1000000UL) /*!< CCU8_CC8 INS: EV2LM (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_INS_LPF0M_Pos (25UL) /*!< CCU8_CC8 INS: LPF0M (Bit 25) */ +#define CCU8_CC8_INS_LPF0M_Msk (0x6000000UL) /*!< CCU8_CC8 INS: LPF0M (Bitfield-Mask: 0x03) */ +#define CCU8_CC8_INS_LPF1M_Pos (27UL) /*!< CCU8_CC8 INS: LPF1M (Bit 27) */ +#define CCU8_CC8_INS_LPF1M_Msk (0x18000000UL) /*!< CCU8_CC8 INS: LPF1M (Bitfield-Mask: 0x03) */ +#define CCU8_CC8_INS_LPF2M_Pos (29UL) /*!< CCU8_CC8 INS: LPF2M (Bit 29) */ +#define CCU8_CC8_INS_LPF2M_Msk (0x60000000UL) /*!< CCU8_CC8 INS: LPF2M (Bitfield-Mask: 0x03) */ + +/* -------------------------------- CCU8_CC8_CMC -------------------------------- */ +#define CCU8_CC8_CMC_STRTS_Pos (0UL) /*!< CCU8_CC8 CMC: STRTS (Bit 0) */ +#define CCU8_CC8_CMC_STRTS_Msk (0x3UL) /*!< CCU8_CC8 CMC: STRTS (Bitfield-Mask: 0x03) */ +#define CCU8_CC8_CMC_ENDS_Pos (2UL) /*!< CCU8_CC8 CMC: ENDS (Bit 2) */ +#define CCU8_CC8_CMC_ENDS_Msk (0xcUL) /*!< CCU8_CC8 CMC: ENDS (Bitfield-Mask: 0x03) */ +#define CCU8_CC8_CMC_CAP0S_Pos (4UL) /*!< CCU8_CC8 CMC: CAP0S (Bit 4) */ +#define CCU8_CC8_CMC_CAP0S_Msk (0x30UL) /*!< CCU8_CC8 CMC: CAP0S (Bitfield-Mask: 0x03) */ +#define CCU8_CC8_CMC_CAP1S_Pos (6UL) /*!< CCU8_CC8 CMC: CAP1S (Bit 6) */ +#define CCU8_CC8_CMC_CAP1S_Msk (0xc0UL) /*!< CCU8_CC8 CMC: CAP1S (Bitfield-Mask: 0x03) */ +#define CCU8_CC8_CMC_GATES_Pos (8UL) /*!< CCU8_CC8 CMC: GATES (Bit 8) */ +#define CCU8_CC8_CMC_GATES_Msk (0x300UL) /*!< CCU8_CC8 CMC: GATES (Bitfield-Mask: 0x03) */ +#define CCU8_CC8_CMC_UDS_Pos (10UL) /*!< CCU8_CC8 CMC: UDS (Bit 10) */ +#define CCU8_CC8_CMC_UDS_Msk (0xc00UL) /*!< CCU8_CC8 CMC: UDS (Bitfield-Mask: 0x03) */ +#define CCU8_CC8_CMC_LDS_Pos (12UL) /*!< CCU8_CC8 CMC: LDS (Bit 12) */ +#define CCU8_CC8_CMC_LDS_Msk (0x3000UL) /*!< CCU8_CC8 CMC: LDS (Bitfield-Mask: 0x03) */ +#define CCU8_CC8_CMC_CNTS_Pos (14UL) /*!< CCU8_CC8 CMC: CNTS (Bit 14) */ +#define CCU8_CC8_CMC_CNTS_Msk (0xc000UL) /*!< CCU8_CC8 CMC: CNTS (Bitfield-Mask: 0x03) */ +#define CCU8_CC8_CMC_OFS_Pos (16UL) /*!< CCU8_CC8 CMC: OFS (Bit 16) */ +#define CCU8_CC8_CMC_OFS_Msk (0x10000UL) /*!< CCU8_CC8 CMC: OFS (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_CMC_TS_Pos (17UL) /*!< CCU8_CC8 CMC: TS (Bit 17) */ +#define CCU8_CC8_CMC_TS_Msk (0x20000UL) /*!< CCU8_CC8 CMC: TS (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_CMC_MOS_Pos (18UL) /*!< CCU8_CC8 CMC: MOS (Bit 18) */ +#define CCU8_CC8_CMC_MOS_Msk (0xc0000UL) /*!< CCU8_CC8 CMC: MOS (Bitfield-Mask: 0x03) */ +#define CCU8_CC8_CMC_TCE_Pos (20UL) /*!< CCU8_CC8 CMC: TCE (Bit 20) */ +#define CCU8_CC8_CMC_TCE_Msk (0x100000UL) /*!< CCU8_CC8 CMC: TCE (Bitfield-Mask: 0x01) */ + +/* -------------------------------- CCU8_CC8_TCST ------------------------------- */ +#define CCU8_CC8_TCST_TRB_Pos (0UL) /*!< CCU8_CC8 TCST: TRB (Bit 0) */ +#define CCU8_CC8_TCST_TRB_Msk (0x1UL) /*!< CCU8_CC8 TCST: TRB (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_TCST_CDIR_Pos (1UL) /*!< CCU8_CC8 TCST: CDIR (Bit 1) */ +#define CCU8_CC8_TCST_CDIR_Msk (0x2UL) /*!< CCU8_CC8 TCST: CDIR (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_TCST_DTR1_Pos (3UL) /*!< CCU8_CC8 TCST: DTR1 (Bit 3) */ +#define CCU8_CC8_TCST_DTR1_Msk (0x8UL) /*!< CCU8_CC8 TCST: DTR1 (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_TCST_DTR2_Pos (4UL) /*!< CCU8_CC8 TCST: DTR2 (Bit 4) */ +#define CCU8_CC8_TCST_DTR2_Msk (0x10UL) /*!< CCU8_CC8 TCST: DTR2 (Bitfield-Mask: 0x01) */ + +/* ------------------------------- CCU8_CC8_TCSET ------------------------------- */ +#define CCU8_CC8_TCSET_TRBS_Pos (0UL) /*!< CCU8_CC8 TCSET: TRBS (Bit 0) */ +#define CCU8_CC8_TCSET_TRBS_Msk (0x1UL) /*!< CCU8_CC8 TCSET: TRBS (Bitfield-Mask: 0x01) */ + +/* ------------------------------- CCU8_CC8_TCCLR ------------------------------- */ +#define CCU8_CC8_TCCLR_TRBC_Pos (0UL) /*!< CCU8_CC8 TCCLR: TRBC (Bit 0) */ +#define CCU8_CC8_TCCLR_TRBC_Msk (0x1UL) /*!< CCU8_CC8 TCCLR: TRBC (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_TCCLR_TCC_Pos (1UL) /*!< CCU8_CC8 TCCLR: TCC (Bit 1) */ +#define CCU8_CC8_TCCLR_TCC_Msk (0x2UL) /*!< CCU8_CC8 TCCLR: TCC (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_TCCLR_DITC_Pos (2UL) /*!< CCU8_CC8 TCCLR: DITC (Bit 2) */ +#define CCU8_CC8_TCCLR_DITC_Msk (0x4UL) /*!< CCU8_CC8 TCCLR: DITC (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_TCCLR_DTC1C_Pos (3UL) /*!< CCU8_CC8 TCCLR: DTC1C (Bit 3) */ +#define CCU8_CC8_TCCLR_DTC1C_Msk (0x8UL) /*!< CCU8_CC8 TCCLR: DTC1C (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_TCCLR_DTC2C_Pos (4UL) /*!< CCU8_CC8 TCCLR: DTC2C (Bit 4) */ +#define CCU8_CC8_TCCLR_DTC2C_Msk (0x10UL) /*!< CCU8_CC8 TCCLR: DTC2C (Bitfield-Mask: 0x01) */ + +/* --------------------------------- CCU8_CC8_TC -------------------------------- */ +#define CCU8_CC8_TC_TCM_Pos (0UL) /*!< CCU8_CC8 TC: TCM (Bit 0) */ +#define CCU8_CC8_TC_TCM_Msk (0x1UL) /*!< CCU8_CC8 TC: TCM (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_TC_TSSM_Pos (1UL) /*!< CCU8_CC8 TC: TSSM (Bit 1) */ +#define CCU8_CC8_TC_TSSM_Msk (0x2UL) /*!< CCU8_CC8 TC: TSSM (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_TC_CLST_Pos (2UL) /*!< CCU8_CC8 TC: CLST (Bit 2) */ +#define CCU8_CC8_TC_CLST_Msk (0x4UL) /*!< CCU8_CC8 TC: CLST (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_TC_CMOD_Pos (3UL) /*!< CCU8_CC8 TC: CMOD (Bit 3) */ +#define CCU8_CC8_TC_CMOD_Msk (0x8UL) /*!< CCU8_CC8 TC: CMOD (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_TC_ECM_Pos (4UL) /*!< CCU8_CC8 TC: ECM (Bit 4) */ +#define CCU8_CC8_TC_ECM_Msk (0x10UL) /*!< CCU8_CC8 TC: ECM (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_TC_CAPC_Pos (5UL) /*!< CCU8_CC8 TC: CAPC (Bit 5) */ +#define CCU8_CC8_TC_CAPC_Msk (0x60UL) /*!< CCU8_CC8 TC: CAPC (Bitfield-Mask: 0x03) */ +#define CCU8_CC8_TC_TLS_Pos (7UL) /*!< CCU8_CC8 TC: TLS (Bit 7) */ +#define CCU8_CC8_TC_TLS_Msk (0x80UL) /*!< CCU8_CC8 TC: TLS (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_TC_ENDM_Pos (8UL) /*!< CCU8_CC8 TC: ENDM (Bit 8) */ +#define CCU8_CC8_TC_ENDM_Msk (0x300UL) /*!< CCU8_CC8 TC: ENDM (Bitfield-Mask: 0x03) */ +#define CCU8_CC8_TC_STRM_Pos (10UL) /*!< CCU8_CC8 TC: STRM (Bit 10) */ +#define CCU8_CC8_TC_STRM_Msk (0x400UL) /*!< CCU8_CC8 TC: STRM (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_TC_SCE_Pos (11UL) /*!< CCU8_CC8 TC: SCE (Bit 11) */ +#define CCU8_CC8_TC_SCE_Msk (0x800UL) /*!< CCU8_CC8 TC: SCE (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_TC_CCS_Pos (12UL) /*!< CCU8_CC8 TC: CCS (Bit 12) */ +#define CCU8_CC8_TC_CCS_Msk (0x1000UL) /*!< CCU8_CC8 TC: CCS (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_TC_DITHE_Pos (13UL) /*!< CCU8_CC8 TC: DITHE (Bit 13) */ +#define CCU8_CC8_TC_DITHE_Msk (0x6000UL) /*!< CCU8_CC8 TC: DITHE (Bitfield-Mask: 0x03) */ +#define CCU8_CC8_TC_DIM_Pos (15UL) /*!< CCU8_CC8 TC: DIM (Bit 15) */ +#define CCU8_CC8_TC_DIM_Msk (0x8000UL) /*!< CCU8_CC8 TC: DIM (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_TC_FPE_Pos (16UL) /*!< CCU8_CC8 TC: FPE (Bit 16) */ +#define CCU8_CC8_TC_FPE_Msk (0x10000UL) /*!< CCU8_CC8 TC: FPE (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_TC_TRAPE0_Pos (17UL) /*!< CCU8_CC8 TC: TRAPE0 (Bit 17) */ +#define CCU8_CC8_TC_TRAPE0_Msk (0x20000UL) /*!< CCU8_CC8 TC: TRAPE0 (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_TC_TRAPE1_Pos (18UL) /*!< CCU8_CC8 TC: TRAPE1 (Bit 18) */ +#define CCU8_CC8_TC_TRAPE1_Msk (0x40000UL) /*!< CCU8_CC8 TC: TRAPE1 (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_TC_TRAPE2_Pos (19UL) /*!< CCU8_CC8 TC: TRAPE2 (Bit 19) */ +#define CCU8_CC8_TC_TRAPE2_Msk (0x80000UL) /*!< CCU8_CC8 TC: TRAPE2 (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_TC_TRAPE3_Pos (20UL) /*!< CCU8_CC8 TC: TRAPE3 (Bit 20) */ +#define CCU8_CC8_TC_TRAPE3_Msk (0x100000UL) /*!< CCU8_CC8 TC: TRAPE3 (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_TC_TRPSE_Pos (21UL) /*!< CCU8_CC8 TC: TRPSE (Bit 21) */ +#define CCU8_CC8_TC_TRPSE_Msk (0x200000UL) /*!< CCU8_CC8 TC: TRPSE (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_TC_TRPSW_Pos (22UL) /*!< CCU8_CC8 TC: TRPSW (Bit 22) */ +#define CCU8_CC8_TC_TRPSW_Msk (0x400000UL) /*!< CCU8_CC8 TC: TRPSW (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_TC_EMS_Pos (23UL) /*!< CCU8_CC8 TC: EMS (Bit 23) */ +#define CCU8_CC8_TC_EMS_Msk (0x800000UL) /*!< CCU8_CC8 TC: EMS (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_TC_EMT_Pos (24UL) /*!< CCU8_CC8 TC: EMT (Bit 24) */ +#define CCU8_CC8_TC_EMT_Msk (0x1000000UL) /*!< CCU8_CC8 TC: EMT (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_TC_MCME1_Pos (25UL) /*!< CCU8_CC8 TC: MCME1 (Bit 25) */ +#define CCU8_CC8_TC_MCME1_Msk (0x2000000UL) /*!< CCU8_CC8 TC: MCME1 (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_TC_MCME2_Pos (26UL) /*!< CCU8_CC8 TC: MCME2 (Bit 26) */ +#define CCU8_CC8_TC_MCME2_Msk (0x4000000UL) /*!< CCU8_CC8 TC: MCME2 (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_TC_EME_Pos (27UL) /*!< CCU8_CC8 TC: EME (Bit 27) */ +#define CCU8_CC8_TC_EME_Msk (0x18000000UL) /*!< CCU8_CC8 TC: EME (Bitfield-Mask: 0x03) */ +#define CCU8_CC8_TC_STOS_Pos (29UL) /*!< CCU8_CC8 TC: STOS (Bit 29) */ +#define CCU8_CC8_TC_STOS_Msk (0x60000000UL) /*!< CCU8_CC8 TC: STOS (Bitfield-Mask: 0x03) */ + +/* -------------------------------- CCU8_CC8_PSL -------------------------------- */ +#define CCU8_CC8_PSL_PSL11_Pos (0UL) /*!< CCU8_CC8 PSL: PSL11 (Bit 0) */ +#define CCU8_CC8_PSL_PSL11_Msk (0x1UL) /*!< CCU8_CC8 PSL: PSL11 (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_PSL_PSL12_Pos (1UL) /*!< CCU8_CC8 PSL: PSL12 (Bit 1) */ +#define CCU8_CC8_PSL_PSL12_Msk (0x2UL) /*!< CCU8_CC8 PSL: PSL12 (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_PSL_PSL21_Pos (2UL) /*!< CCU8_CC8 PSL: PSL21 (Bit 2) */ +#define CCU8_CC8_PSL_PSL21_Msk (0x4UL) /*!< CCU8_CC8 PSL: PSL21 (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_PSL_PSL22_Pos (3UL) /*!< CCU8_CC8 PSL: PSL22 (Bit 3) */ +#define CCU8_CC8_PSL_PSL22_Msk (0x8UL) /*!< CCU8_CC8 PSL: PSL22 (Bitfield-Mask: 0x01) */ + +/* -------------------------------- CCU8_CC8_DIT -------------------------------- */ +#define CCU8_CC8_DIT_DCV_Pos (0UL) /*!< CCU8_CC8 DIT: DCV (Bit 0) */ +#define CCU8_CC8_DIT_DCV_Msk (0xfUL) /*!< CCU8_CC8 DIT: DCV (Bitfield-Mask: 0x0f) */ +#define CCU8_CC8_DIT_DCNT_Pos (8UL) /*!< CCU8_CC8 DIT: DCNT (Bit 8) */ +#define CCU8_CC8_DIT_DCNT_Msk (0xf00UL) /*!< CCU8_CC8 DIT: DCNT (Bitfield-Mask: 0x0f) */ + +/* -------------------------------- CCU8_CC8_DITS ------------------------------- */ +#define CCU8_CC8_DITS_DCVS_Pos (0UL) /*!< CCU8_CC8 DITS: DCVS (Bit 0) */ +#define CCU8_CC8_DITS_DCVS_Msk (0xfUL) /*!< CCU8_CC8 DITS: DCVS (Bitfield-Mask: 0x0f) */ + +/* -------------------------------- CCU8_CC8_PSC -------------------------------- */ +#define CCU8_CC8_PSC_PSIV_Pos (0UL) /*!< CCU8_CC8 PSC: PSIV (Bit 0) */ +#define CCU8_CC8_PSC_PSIV_Msk (0xfUL) /*!< CCU8_CC8 PSC: PSIV (Bitfield-Mask: 0x0f) */ + +/* -------------------------------- CCU8_CC8_FPC -------------------------------- */ +#define CCU8_CC8_FPC_PCMP_Pos (0UL) /*!< CCU8_CC8 FPC: PCMP (Bit 0) */ +#define CCU8_CC8_FPC_PCMP_Msk (0xfUL) /*!< CCU8_CC8 FPC: PCMP (Bitfield-Mask: 0x0f) */ +#define CCU8_CC8_FPC_PVAL_Pos (8UL) /*!< CCU8_CC8 FPC: PVAL (Bit 8) */ +#define CCU8_CC8_FPC_PVAL_Msk (0xf00UL) /*!< CCU8_CC8 FPC: PVAL (Bitfield-Mask: 0x0f) */ + +/* -------------------------------- CCU8_CC8_FPCS ------------------------------- */ +#define CCU8_CC8_FPCS_PCMP_Pos (0UL) /*!< CCU8_CC8 FPCS: PCMP (Bit 0) */ +#define CCU8_CC8_FPCS_PCMP_Msk (0xfUL) /*!< CCU8_CC8 FPCS: PCMP (Bitfield-Mask: 0x0f) */ + +/* --------------------------------- CCU8_CC8_PR -------------------------------- */ +#define CCU8_CC8_PR_PR_Pos (0UL) /*!< CCU8_CC8 PR: PR (Bit 0) */ +#define CCU8_CC8_PR_PR_Msk (0xffffUL) /*!< CCU8_CC8 PR: PR (Bitfield-Mask: 0xffff) */ + +/* -------------------------------- CCU8_CC8_PRS -------------------------------- */ +#define CCU8_CC8_PRS_PRS_Pos (0UL) /*!< CCU8_CC8 PRS: PRS (Bit 0) */ +#define CCU8_CC8_PRS_PRS_Msk (0xffffUL) /*!< CCU8_CC8 PRS: PRS (Bitfield-Mask: 0xffff) */ + +/* -------------------------------- CCU8_CC8_CR1 -------------------------------- */ +#define CCU8_CC8_CR1_CR1_Pos (0UL) /*!< CCU8_CC8 CR1: CR1 (Bit 0) */ +#define CCU8_CC8_CR1_CR1_Msk (0xffffUL) /*!< CCU8_CC8 CR1: CR1 (Bitfield-Mask: 0xffff) */ + +/* -------------------------------- CCU8_CC8_CR1S ------------------------------- */ +#define CCU8_CC8_CR1S_CR1S_Pos (0UL) /*!< CCU8_CC8 CR1S: CR1S (Bit 0) */ +#define CCU8_CC8_CR1S_CR1S_Msk (0xffffUL) /*!< CCU8_CC8 CR1S: CR1S (Bitfield-Mask: 0xffff) */ + +/* -------------------------------- CCU8_CC8_CR2 -------------------------------- */ +#define CCU8_CC8_CR2_CR2_Pos (0UL) /*!< CCU8_CC8 CR2: CR2 (Bit 0) */ +#define CCU8_CC8_CR2_CR2_Msk (0xffffUL) /*!< CCU8_CC8 CR2: CR2 (Bitfield-Mask: 0xffff) */ + +/* -------------------------------- CCU8_CC8_CR2S ------------------------------- */ +#define CCU8_CC8_CR2S_CR2S_Pos (0UL) /*!< CCU8_CC8 CR2S: CR2S (Bit 0) */ +#define CCU8_CC8_CR2S_CR2S_Msk (0xffffUL) /*!< CCU8_CC8 CR2S: CR2S (Bitfield-Mask: 0xffff) */ + +/* -------------------------------- CCU8_CC8_CHC -------------------------------- */ +#define CCU8_CC8_CHC_ASE_Pos (0UL) /*!< CCU8_CC8 CHC: ASE (Bit 0) */ +#define CCU8_CC8_CHC_ASE_Msk (0x1UL) /*!< CCU8_CC8 CHC: ASE (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_CHC_OCS1_Pos (1UL) /*!< CCU8_CC8 CHC: OCS1 (Bit 1) */ +#define CCU8_CC8_CHC_OCS1_Msk (0x2UL) /*!< CCU8_CC8 CHC: OCS1 (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_CHC_OCS2_Pos (2UL) /*!< CCU8_CC8 CHC: OCS2 (Bit 2) */ +#define CCU8_CC8_CHC_OCS2_Msk (0x4UL) /*!< CCU8_CC8 CHC: OCS2 (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_CHC_OCS3_Pos (3UL) /*!< CCU8_CC8 CHC: OCS3 (Bit 3) */ +#define CCU8_CC8_CHC_OCS3_Msk (0x8UL) /*!< CCU8_CC8 CHC: OCS3 (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_CHC_OCS4_Pos (4UL) /*!< CCU8_CC8 CHC: OCS4 (Bit 4) */ +#define CCU8_CC8_CHC_OCS4_Msk (0x10UL) /*!< CCU8_CC8 CHC: OCS4 (Bitfield-Mask: 0x01) */ + +/* -------------------------------- CCU8_CC8_DTC -------------------------------- */ +#define CCU8_CC8_DTC_DTE1_Pos (0UL) /*!< CCU8_CC8 DTC: DTE1 (Bit 0) */ +#define CCU8_CC8_DTC_DTE1_Msk (0x1UL) /*!< CCU8_CC8 DTC: DTE1 (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_DTC_DTE2_Pos (1UL) /*!< CCU8_CC8 DTC: DTE2 (Bit 1) */ +#define CCU8_CC8_DTC_DTE2_Msk (0x2UL) /*!< CCU8_CC8 DTC: DTE2 (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_DTC_DCEN1_Pos (2UL) /*!< CCU8_CC8 DTC: DCEN1 (Bit 2) */ +#define CCU8_CC8_DTC_DCEN1_Msk (0x4UL) /*!< CCU8_CC8 DTC: DCEN1 (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_DTC_DCEN2_Pos (3UL) /*!< CCU8_CC8 DTC: DCEN2 (Bit 3) */ +#define CCU8_CC8_DTC_DCEN2_Msk (0x8UL) /*!< CCU8_CC8 DTC: DCEN2 (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_DTC_DCEN3_Pos (4UL) /*!< CCU8_CC8 DTC: DCEN3 (Bit 4) */ +#define CCU8_CC8_DTC_DCEN3_Msk (0x10UL) /*!< CCU8_CC8 DTC: DCEN3 (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_DTC_DCEN4_Pos (5UL) /*!< CCU8_CC8 DTC: DCEN4 (Bit 5) */ +#define CCU8_CC8_DTC_DCEN4_Msk (0x20UL) /*!< CCU8_CC8 DTC: DCEN4 (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_DTC_DTCC_Pos (6UL) /*!< CCU8_CC8 DTC: DTCC (Bit 6) */ +#define CCU8_CC8_DTC_DTCC_Msk (0xc0UL) /*!< CCU8_CC8 DTC: DTCC (Bitfield-Mask: 0x03) */ + +/* -------------------------------- CCU8_CC8_DC1R ------------------------------- */ +#define CCU8_CC8_DC1R_DT1R_Pos (0UL) /*!< CCU8_CC8 DC1R: DT1R (Bit 0) */ +#define CCU8_CC8_DC1R_DT1R_Msk (0xffUL) /*!< CCU8_CC8 DC1R: DT1R (Bitfield-Mask: 0xff) */ +#define CCU8_CC8_DC1R_DT1F_Pos (8UL) /*!< CCU8_CC8 DC1R: DT1F (Bit 8) */ +#define CCU8_CC8_DC1R_DT1F_Msk (0xff00UL) /*!< CCU8_CC8 DC1R: DT1F (Bitfield-Mask: 0xff) */ + +/* -------------------------------- CCU8_CC8_DC2R ------------------------------- */ +#define CCU8_CC8_DC2R_DT2R_Pos (0UL) /*!< CCU8_CC8 DC2R: DT2R (Bit 0) */ +#define CCU8_CC8_DC2R_DT2R_Msk (0xffUL) /*!< CCU8_CC8 DC2R: DT2R (Bitfield-Mask: 0xff) */ +#define CCU8_CC8_DC2R_DT2F_Pos (8UL) /*!< CCU8_CC8 DC2R: DT2F (Bit 8) */ +#define CCU8_CC8_DC2R_DT2F_Msk (0xff00UL) /*!< CCU8_CC8 DC2R: DT2F (Bitfield-Mask: 0xff) */ + +/* ------------------------------- CCU8_CC8_TIMER ------------------------------- */ +#define CCU8_CC8_TIMER_TVAL_Pos (0UL) /*!< CCU8_CC8 TIMER: TVAL (Bit 0) */ +#define CCU8_CC8_TIMER_TVAL_Msk (0xffffUL) /*!< CCU8_CC8 TIMER: TVAL (Bitfield-Mask: 0xffff) */ + +/* --------------------------------- CCU8_CC8_CV -------------------------------- */ +#define CCU8_CC8_CV_CAPTV_Pos (0UL) /*!< CCU8_CC8 CV: CAPTV (Bit 0) */ +#define CCU8_CC8_CV_CAPTV_Msk (0xffffUL) /*!< CCU8_CC8 CV: CAPTV (Bitfield-Mask: 0xffff) */ +#define CCU8_CC8_CV_FPCV_Pos (16UL) /*!< CCU8_CC8 CV: FPCV (Bit 16) */ +#define CCU8_CC8_CV_FPCV_Msk (0xf0000UL) /*!< CCU8_CC8 CV: FPCV (Bitfield-Mask: 0x0f) */ +#define CCU8_CC8_CV_FFL_Pos (20UL) /*!< CCU8_CC8 CV: FFL (Bit 20) */ +#define CCU8_CC8_CV_FFL_Msk (0x100000UL) /*!< CCU8_CC8 CV: FFL (Bitfield-Mask: 0x01) */ + +/* -------------------------------- CCU8_CC8_INTS ------------------------------- */ +#define CCU8_CC8_INTS_PMUS_Pos (0UL) /*!< CCU8_CC8 INTS: PMUS (Bit 0) */ +#define CCU8_CC8_INTS_PMUS_Msk (0x1UL) /*!< CCU8_CC8 INTS: PMUS (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_INTS_OMDS_Pos (1UL) /*!< CCU8_CC8 INTS: OMDS (Bit 1) */ +#define CCU8_CC8_INTS_OMDS_Msk (0x2UL) /*!< CCU8_CC8 INTS: OMDS (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_INTS_CMU1S_Pos (2UL) /*!< CCU8_CC8 INTS: CMU1S (Bit 2) */ +#define CCU8_CC8_INTS_CMU1S_Msk (0x4UL) /*!< CCU8_CC8 INTS: CMU1S (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_INTS_CMD1S_Pos (3UL) /*!< CCU8_CC8 INTS: CMD1S (Bit 3) */ +#define CCU8_CC8_INTS_CMD1S_Msk (0x8UL) /*!< CCU8_CC8 INTS: CMD1S (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_INTS_CMU2S_Pos (4UL) /*!< CCU8_CC8 INTS: CMU2S (Bit 4) */ +#define CCU8_CC8_INTS_CMU2S_Msk (0x10UL) /*!< CCU8_CC8 INTS: CMU2S (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_INTS_CMD2S_Pos (5UL) /*!< CCU8_CC8 INTS: CMD2S (Bit 5) */ +#define CCU8_CC8_INTS_CMD2S_Msk (0x20UL) /*!< CCU8_CC8 INTS: CMD2S (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_INTS_E0AS_Pos (8UL) /*!< CCU8_CC8 INTS: E0AS (Bit 8) */ +#define CCU8_CC8_INTS_E0AS_Msk (0x100UL) /*!< CCU8_CC8 INTS: E0AS (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_INTS_E1AS_Pos (9UL) /*!< CCU8_CC8 INTS: E1AS (Bit 9) */ +#define CCU8_CC8_INTS_E1AS_Msk (0x200UL) /*!< CCU8_CC8 INTS: E1AS (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_INTS_E2AS_Pos (10UL) /*!< CCU8_CC8 INTS: E2AS (Bit 10) */ +#define CCU8_CC8_INTS_E2AS_Msk (0x400UL) /*!< CCU8_CC8 INTS: E2AS (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_INTS_TRPF_Pos (11UL) /*!< CCU8_CC8 INTS: TRPF (Bit 11) */ +#define CCU8_CC8_INTS_TRPF_Msk (0x800UL) /*!< CCU8_CC8 INTS: TRPF (Bitfield-Mask: 0x01) */ + +/* -------------------------------- CCU8_CC8_INTE ------------------------------- */ +#define CCU8_CC8_INTE_PME_Pos (0UL) /*!< CCU8_CC8 INTE: PME (Bit 0) */ +#define CCU8_CC8_INTE_PME_Msk (0x1UL) /*!< CCU8_CC8 INTE: PME (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_INTE_OME_Pos (1UL) /*!< CCU8_CC8 INTE: OME (Bit 1) */ +#define CCU8_CC8_INTE_OME_Msk (0x2UL) /*!< CCU8_CC8 INTE: OME (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_INTE_CMU1E_Pos (2UL) /*!< CCU8_CC8 INTE: CMU1E (Bit 2) */ +#define CCU8_CC8_INTE_CMU1E_Msk (0x4UL) /*!< CCU8_CC8 INTE: CMU1E (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_INTE_CMD1E_Pos (3UL) /*!< CCU8_CC8 INTE: CMD1E (Bit 3) */ +#define CCU8_CC8_INTE_CMD1E_Msk (0x8UL) /*!< CCU8_CC8 INTE: CMD1E (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_INTE_CMU2E_Pos (4UL) /*!< CCU8_CC8 INTE: CMU2E (Bit 4) */ +#define CCU8_CC8_INTE_CMU2E_Msk (0x10UL) /*!< CCU8_CC8 INTE: CMU2E (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_INTE_CMD2E_Pos (5UL) /*!< CCU8_CC8 INTE: CMD2E (Bit 5) */ +#define CCU8_CC8_INTE_CMD2E_Msk (0x20UL) /*!< CCU8_CC8 INTE: CMD2E (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_INTE_E0AE_Pos (8UL) /*!< CCU8_CC8 INTE: E0AE (Bit 8) */ +#define CCU8_CC8_INTE_E0AE_Msk (0x100UL) /*!< CCU8_CC8 INTE: E0AE (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_INTE_E1AE_Pos (9UL) /*!< CCU8_CC8 INTE: E1AE (Bit 9) */ +#define CCU8_CC8_INTE_E1AE_Msk (0x200UL) /*!< CCU8_CC8 INTE: E1AE (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_INTE_E2AE_Pos (10UL) /*!< CCU8_CC8 INTE: E2AE (Bit 10) */ +#define CCU8_CC8_INTE_E2AE_Msk (0x400UL) /*!< CCU8_CC8 INTE: E2AE (Bitfield-Mask: 0x01) */ + +/* -------------------------------- CCU8_CC8_SRS -------------------------------- */ +#define CCU8_CC8_SRS_POSR_Pos (0UL) /*!< CCU8_CC8 SRS: POSR (Bit 0) */ +#define CCU8_CC8_SRS_POSR_Msk (0x3UL) /*!< CCU8_CC8 SRS: POSR (Bitfield-Mask: 0x03) */ +#define CCU8_CC8_SRS_CM1SR_Pos (2UL) /*!< CCU8_CC8 SRS: CM1SR (Bit 2) */ +#define CCU8_CC8_SRS_CM1SR_Msk (0xcUL) /*!< CCU8_CC8 SRS: CM1SR (Bitfield-Mask: 0x03) */ +#define CCU8_CC8_SRS_CM2SR_Pos (4UL) /*!< CCU8_CC8 SRS: CM2SR (Bit 4) */ +#define CCU8_CC8_SRS_CM2SR_Msk (0x30UL) /*!< CCU8_CC8 SRS: CM2SR (Bitfield-Mask: 0x03) */ +#define CCU8_CC8_SRS_E0SR_Pos (8UL) /*!< CCU8_CC8 SRS: E0SR (Bit 8) */ +#define CCU8_CC8_SRS_E0SR_Msk (0x300UL) /*!< CCU8_CC8 SRS: E0SR (Bitfield-Mask: 0x03) */ +#define CCU8_CC8_SRS_E1SR_Pos (10UL) /*!< CCU8_CC8 SRS: E1SR (Bit 10) */ +#define CCU8_CC8_SRS_E1SR_Msk (0xc00UL) /*!< CCU8_CC8 SRS: E1SR (Bitfield-Mask: 0x03) */ +#define CCU8_CC8_SRS_E2SR_Pos (12UL) /*!< CCU8_CC8 SRS: E2SR (Bit 12) */ +#define CCU8_CC8_SRS_E2SR_Msk (0x3000UL) /*!< CCU8_CC8 SRS: E2SR (Bitfield-Mask: 0x03) */ + +/* -------------------------------- CCU8_CC8_SWS -------------------------------- */ +#define CCU8_CC8_SWS_SPM_Pos (0UL) /*!< CCU8_CC8 SWS: SPM (Bit 0) */ +#define CCU8_CC8_SWS_SPM_Msk (0x1UL) /*!< CCU8_CC8 SWS: SPM (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_SWS_SOM_Pos (1UL) /*!< CCU8_CC8 SWS: SOM (Bit 1) */ +#define CCU8_CC8_SWS_SOM_Msk (0x2UL) /*!< CCU8_CC8 SWS: SOM (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_SWS_SCM1U_Pos (2UL) /*!< CCU8_CC8 SWS: SCM1U (Bit 2) */ +#define CCU8_CC8_SWS_SCM1U_Msk (0x4UL) /*!< CCU8_CC8 SWS: SCM1U (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_SWS_SCM1D_Pos (3UL) /*!< CCU8_CC8 SWS: SCM1D (Bit 3) */ +#define CCU8_CC8_SWS_SCM1D_Msk (0x8UL) /*!< CCU8_CC8 SWS: SCM1D (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_SWS_SCM2U_Pos (4UL) /*!< CCU8_CC8 SWS: SCM2U (Bit 4) */ +#define CCU8_CC8_SWS_SCM2U_Msk (0x10UL) /*!< CCU8_CC8 SWS: SCM2U (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_SWS_SCM2D_Pos (5UL) /*!< CCU8_CC8 SWS: SCM2D (Bit 5) */ +#define CCU8_CC8_SWS_SCM2D_Msk (0x20UL) /*!< CCU8_CC8 SWS: SCM2D (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_SWS_SE0A_Pos (8UL) /*!< CCU8_CC8 SWS: SE0A (Bit 8) */ +#define CCU8_CC8_SWS_SE0A_Msk (0x100UL) /*!< CCU8_CC8 SWS: SE0A (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_SWS_SE1A_Pos (9UL) /*!< CCU8_CC8 SWS: SE1A (Bit 9) */ +#define CCU8_CC8_SWS_SE1A_Msk (0x200UL) /*!< CCU8_CC8 SWS: SE1A (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_SWS_SE2A_Pos (10UL) /*!< CCU8_CC8 SWS: SE2A (Bit 10) */ +#define CCU8_CC8_SWS_SE2A_Msk (0x400UL) /*!< CCU8_CC8 SWS: SE2A (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_SWS_STRPF_Pos (11UL) /*!< CCU8_CC8 SWS: STRPF (Bit 11) */ +#define CCU8_CC8_SWS_STRPF_Msk (0x800UL) /*!< CCU8_CC8 SWS: STRPF (Bitfield-Mask: 0x01) */ + +/* -------------------------------- CCU8_CC8_SWR -------------------------------- */ +#define CCU8_CC8_SWR_RPM_Pos (0UL) /*!< CCU8_CC8 SWR: RPM (Bit 0) */ +#define CCU8_CC8_SWR_RPM_Msk (0x1UL) /*!< CCU8_CC8 SWR: RPM (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_SWR_ROM_Pos (1UL) /*!< CCU8_CC8 SWR: ROM (Bit 1) */ +#define CCU8_CC8_SWR_ROM_Msk (0x2UL) /*!< CCU8_CC8 SWR: ROM (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_SWR_RCM1U_Pos (2UL) /*!< CCU8_CC8 SWR: RCM1U (Bit 2) */ +#define CCU8_CC8_SWR_RCM1U_Msk (0x4UL) /*!< CCU8_CC8 SWR: RCM1U (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_SWR_RCM1D_Pos (3UL) /*!< CCU8_CC8 SWR: RCM1D (Bit 3) */ +#define CCU8_CC8_SWR_RCM1D_Msk (0x8UL) /*!< CCU8_CC8 SWR: RCM1D (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_SWR_RCM2U_Pos (4UL) /*!< CCU8_CC8 SWR: RCM2U (Bit 4) */ +#define CCU8_CC8_SWR_RCM2U_Msk (0x10UL) /*!< CCU8_CC8 SWR: RCM2U (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_SWR_RCM2D_Pos (5UL) /*!< CCU8_CC8 SWR: RCM2D (Bit 5) */ +#define CCU8_CC8_SWR_RCM2D_Msk (0x20UL) /*!< CCU8_CC8 SWR: RCM2D (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_SWR_RE0A_Pos (8UL) /*!< CCU8_CC8 SWR: RE0A (Bit 8) */ +#define CCU8_CC8_SWR_RE0A_Msk (0x100UL) /*!< CCU8_CC8 SWR: RE0A (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_SWR_RE1A_Pos (9UL) /*!< CCU8_CC8 SWR: RE1A (Bit 9) */ +#define CCU8_CC8_SWR_RE1A_Msk (0x200UL) /*!< CCU8_CC8 SWR: RE1A (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_SWR_RE2A_Pos (10UL) /*!< CCU8_CC8 SWR: RE2A (Bit 10) */ +#define CCU8_CC8_SWR_RE2A_Msk (0x400UL) /*!< CCU8_CC8 SWR: RE2A (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_SWR_RTRPF_Pos (11UL) /*!< CCU8_CC8 SWR: RTRPF (Bit 11) */ +#define CCU8_CC8_SWR_RTRPF_Msk (0x800UL) /*!< CCU8_CC8 SWR: RTRPF (Bitfield-Mask: 0x01) */ + +/* -------------------------------- CCU8_CC8_STC -------------------------------- */ +#define CCU8_CC8_STC_CSE_Pos (0UL) /*!< CCU8_CC8 STC: CSE (Bit 0) */ +#define CCU8_CC8_STC_CSE_Msk (0x1UL) /*!< CCU8_CC8 STC: CSE (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_STC_STM_Pos (1UL) /*!< CCU8_CC8 STC: STM (Bit 1) */ +#define CCU8_CC8_STC_STM_Msk (0x6UL) /*!< CCU8_CC8 STC: STM (Bitfield-Mask: 0x03) */ + +/* ------------------------------- CCU8_CC8_ECRD0 ------------------------------- */ +#define CCU8_CC8_ECRD0_CAPV_Pos (0UL) /*!< CCU8_CC8 ECRD0: CAPV (Bit 0) */ +#define CCU8_CC8_ECRD0_CAPV_Msk (0xffffUL) /*!< CCU8_CC8 ECRD0: CAPV (Bitfield-Mask: 0xffff) */ +#define CCU8_CC8_ECRD0_FPCV_Pos (16UL) /*!< CCU8_CC8 ECRD0: FPCV (Bit 16) */ +#define CCU8_CC8_ECRD0_FPCV_Msk (0xf0000UL) /*!< CCU8_CC8 ECRD0: FPCV (Bitfield-Mask: 0x0f) */ +#define CCU8_CC8_ECRD0_SPTR_Pos (20UL) /*!< CCU8_CC8 ECRD0: SPTR (Bit 20) */ +#define CCU8_CC8_ECRD0_SPTR_Msk (0x300000UL) /*!< CCU8_CC8 ECRD0: SPTR (Bitfield-Mask: 0x03) */ +#define CCU8_CC8_ECRD0_VPTR_Pos (22UL) /*!< CCU8_CC8 ECRD0: VPTR (Bit 22) */ +#define CCU8_CC8_ECRD0_VPTR_Msk (0xc00000UL) /*!< CCU8_CC8 ECRD0: VPTR (Bitfield-Mask: 0x03) */ +#define CCU8_CC8_ECRD0_FFL_Pos (24UL) /*!< CCU8_CC8 ECRD0: FFL (Bit 24) */ +#define CCU8_CC8_ECRD0_FFL_Msk (0x1000000UL) /*!< CCU8_CC8 ECRD0: FFL (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_ECRD0_LCV_Pos (25UL) /*!< CCU8_CC8 ECRD0: LCV (Bit 25) */ +#define CCU8_CC8_ECRD0_LCV_Msk (0x2000000UL) /*!< CCU8_CC8 ECRD0: LCV (Bitfield-Mask: 0x01) */ + +/* ------------------------------- CCU8_CC8_ECRD1 ------------------------------- */ +#define CCU8_CC8_ECRD1_CAPV_Pos (0UL) /*!< CCU8_CC8 ECRD1: CAPV (Bit 0) */ +#define CCU8_CC8_ECRD1_CAPV_Msk (0xffffUL) /*!< CCU8_CC8 ECRD1: CAPV (Bitfield-Mask: 0xffff) */ +#define CCU8_CC8_ECRD1_FPCV_Pos (16UL) /*!< CCU8_CC8 ECRD1: FPCV (Bit 16) */ +#define CCU8_CC8_ECRD1_FPCV_Msk (0xf0000UL) /*!< CCU8_CC8 ECRD1: FPCV (Bitfield-Mask: 0x0f) */ +#define CCU8_CC8_ECRD1_SPTR_Pos (20UL) /*!< CCU8_CC8 ECRD1: SPTR (Bit 20) */ +#define CCU8_CC8_ECRD1_SPTR_Msk (0x300000UL) /*!< CCU8_CC8 ECRD1: SPTR (Bitfield-Mask: 0x03) */ +#define CCU8_CC8_ECRD1_VPTR_Pos (22UL) /*!< CCU8_CC8 ECRD1: VPTR (Bit 22) */ +#define CCU8_CC8_ECRD1_VPTR_Msk (0xc00000UL) /*!< CCU8_CC8 ECRD1: VPTR (Bitfield-Mask: 0x03) */ +#define CCU8_CC8_ECRD1_FFL_Pos (24UL) /*!< CCU8_CC8 ECRD1: FFL (Bit 24) */ +#define CCU8_CC8_ECRD1_FFL_Msk (0x1000000UL) /*!< CCU8_CC8 ECRD1: FFL (Bitfield-Mask: 0x01) */ +#define CCU8_CC8_ECRD1_LCV_Pos (25UL) /*!< CCU8_CC8 ECRD1: LCV (Bit 25) */ +#define CCU8_CC8_ECRD1_LCV_Msk (0x2000000UL) /*!< CCU8_CC8 ECRD1: LCV (Bitfield-Mask: 0x01) */ + + +/* ================================================================================ */ +/* ================ Group 'POSIF' Position & Mask ================ */ +/* ================================================================================ */ + + +/* --------------------------------- POSIF_PCONF -------------------------------- */ +#define POSIF_PCONF_FSEL_Pos (0UL) /*!< POSIF PCONF: FSEL (Bit 0) */ +#define POSIF_PCONF_FSEL_Msk (0x3UL) /*!< POSIF PCONF: FSEL (Bitfield-Mask: 0x03) */ +#define POSIF_PCONF_QDCM_Pos (2UL) /*!< POSIF PCONF: QDCM (Bit 2) */ +#define POSIF_PCONF_QDCM_Msk (0x4UL) /*!< POSIF PCONF: QDCM (Bitfield-Mask: 0x01) */ +#define POSIF_PCONF_HIDG_Pos (4UL) /*!< POSIF PCONF: HIDG (Bit 4) */ +#define POSIF_PCONF_HIDG_Msk (0x10UL) /*!< POSIF PCONF: HIDG (Bitfield-Mask: 0x01) */ +#define POSIF_PCONF_MCUE_Pos (5UL) /*!< POSIF PCONF: MCUE (Bit 5) */ +#define POSIF_PCONF_MCUE_Msk (0x20UL) /*!< POSIF PCONF: MCUE (Bitfield-Mask: 0x01) */ +#define POSIF_PCONF_INSEL0_Pos (8UL) /*!< POSIF PCONF: INSEL0 (Bit 8) */ +#define POSIF_PCONF_INSEL0_Msk (0x300UL) /*!< POSIF PCONF: INSEL0 (Bitfield-Mask: 0x03) */ +#define POSIF_PCONF_INSEL1_Pos (10UL) /*!< POSIF PCONF: INSEL1 (Bit 10) */ +#define POSIF_PCONF_INSEL1_Msk (0xc00UL) /*!< POSIF PCONF: INSEL1 (Bitfield-Mask: 0x03) */ +#define POSIF_PCONF_INSEL2_Pos (12UL) /*!< POSIF PCONF: INSEL2 (Bit 12) */ +#define POSIF_PCONF_INSEL2_Msk (0x3000UL) /*!< POSIF PCONF: INSEL2 (Bitfield-Mask: 0x03) */ +#define POSIF_PCONF_DSEL_Pos (16UL) /*!< POSIF PCONF: DSEL (Bit 16) */ +#define POSIF_PCONF_DSEL_Msk (0x10000UL) /*!< POSIF PCONF: DSEL (Bitfield-Mask: 0x01) */ +#define POSIF_PCONF_SPES_Pos (17UL) /*!< POSIF PCONF: SPES (Bit 17) */ +#define POSIF_PCONF_SPES_Msk (0x20000UL) /*!< POSIF PCONF: SPES (Bitfield-Mask: 0x01) */ +#define POSIF_PCONF_MSETS_Pos (18UL) /*!< POSIF PCONF: MSETS (Bit 18) */ +#define POSIF_PCONF_MSETS_Msk (0x1c0000UL) /*!< POSIF PCONF: MSETS (Bitfield-Mask: 0x07) */ +#define POSIF_PCONF_MSES_Pos (21UL) /*!< POSIF PCONF: MSES (Bit 21) */ +#define POSIF_PCONF_MSES_Msk (0x200000UL) /*!< POSIF PCONF: MSES (Bitfield-Mask: 0x01) */ +#define POSIF_PCONF_MSYNS_Pos (22UL) /*!< POSIF PCONF: MSYNS (Bit 22) */ +#define POSIF_PCONF_MSYNS_Msk (0xc00000UL) /*!< POSIF PCONF: MSYNS (Bitfield-Mask: 0x03) */ +#define POSIF_PCONF_EWIS_Pos (24UL) /*!< POSIF PCONF: EWIS (Bit 24) */ +#define POSIF_PCONF_EWIS_Msk (0x3000000UL) /*!< POSIF PCONF: EWIS (Bitfield-Mask: 0x03) */ +#define POSIF_PCONF_EWIE_Pos (26UL) /*!< POSIF PCONF: EWIE (Bit 26) */ +#define POSIF_PCONF_EWIE_Msk (0x4000000UL) /*!< POSIF PCONF: EWIE (Bitfield-Mask: 0x01) */ +#define POSIF_PCONF_EWIL_Pos (27UL) /*!< POSIF PCONF: EWIL (Bit 27) */ +#define POSIF_PCONF_EWIL_Msk (0x8000000UL) /*!< POSIF PCONF: EWIL (Bitfield-Mask: 0x01) */ +#define POSIF_PCONF_LPC_Pos (28UL) /*!< POSIF PCONF: LPC (Bit 28) */ +#define POSIF_PCONF_LPC_Msk (0x70000000UL) /*!< POSIF PCONF: LPC (Bitfield-Mask: 0x07) */ + +/* --------------------------------- POSIF_PSUS --------------------------------- */ +#define POSIF_PSUS_QSUS_Pos (0UL) /*!< POSIF PSUS: QSUS (Bit 0) */ +#define POSIF_PSUS_QSUS_Msk (0x3UL) /*!< POSIF PSUS: QSUS (Bitfield-Mask: 0x03) */ +#define POSIF_PSUS_MSUS_Pos (2UL) /*!< POSIF PSUS: MSUS (Bit 2) */ +#define POSIF_PSUS_MSUS_Msk (0xcUL) /*!< POSIF PSUS: MSUS (Bitfield-Mask: 0x03) */ + +/* --------------------------------- POSIF_PRUNS -------------------------------- */ +#define POSIF_PRUNS_SRB_Pos (0UL) /*!< POSIF PRUNS: SRB (Bit 0) */ +#define POSIF_PRUNS_SRB_Msk (0x1UL) /*!< POSIF PRUNS: SRB (Bitfield-Mask: 0x01) */ + +/* --------------------------------- POSIF_PRUNC -------------------------------- */ +#define POSIF_PRUNC_CRB_Pos (0UL) /*!< POSIF PRUNC: CRB (Bit 0) */ +#define POSIF_PRUNC_CRB_Msk (0x1UL) /*!< POSIF PRUNC: CRB (Bitfield-Mask: 0x01) */ +#define POSIF_PRUNC_CSM_Pos (1UL) /*!< POSIF PRUNC: CSM (Bit 1) */ +#define POSIF_PRUNC_CSM_Msk (0x2UL) /*!< POSIF PRUNC: CSM (Bitfield-Mask: 0x01) */ + +/* --------------------------------- POSIF_PRUN --------------------------------- */ +#define POSIF_PRUN_RB_Pos (0UL) /*!< POSIF PRUN: RB (Bit 0) */ +#define POSIF_PRUN_RB_Msk (0x1UL) /*!< POSIF PRUN: RB (Bitfield-Mask: 0x01) */ + +/* --------------------------------- POSIF_MIDR --------------------------------- */ +#define POSIF_MIDR_MODR_Pos (0UL) /*!< POSIF MIDR: MODR (Bit 0) */ +#define POSIF_MIDR_MODR_Msk (0xffUL) /*!< POSIF MIDR: MODR (Bitfield-Mask: 0xff) */ +#define POSIF_MIDR_MODT_Pos (8UL) /*!< POSIF MIDR: MODT (Bit 8) */ +#define POSIF_MIDR_MODT_Msk (0xff00UL) /*!< POSIF MIDR: MODT (Bitfield-Mask: 0xff) */ +#define POSIF_MIDR_MODN_Pos (16UL) /*!< POSIF MIDR: MODN (Bit 16) */ +#define POSIF_MIDR_MODN_Msk (0xffff0000UL) /*!< POSIF MIDR: MODN (Bitfield-Mask: 0xffff) */ + +/* --------------------------------- POSIF_HALP --------------------------------- */ +#define POSIF_HALP_HCP_Pos (0UL) /*!< POSIF HALP: HCP (Bit 0) */ +#define POSIF_HALP_HCP_Msk (0x7UL) /*!< POSIF HALP: HCP (Bitfield-Mask: 0x07) */ +#define POSIF_HALP_HEP_Pos (3UL) /*!< POSIF HALP: HEP (Bit 3) */ +#define POSIF_HALP_HEP_Msk (0x38UL) /*!< POSIF HALP: HEP (Bitfield-Mask: 0x07) */ + +/* --------------------------------- POSIF_HALPS -------------------------------- */ +#define POSIF_HALPS_HCPS_Pos (0UL) /*!< POSIF HALPS: HCPS (Bit 0) */ +#define POSIF_HALPS_HCPS_Msk (0x7UL) /*!< POSIF HALPS: HCPS (Bitfield-Mask: 0x07) */ +#define POSIF_HALPS_HEPS_Pos (3UL) /*!< POSIF HALPS: HEPS (Bit 3) */ +#define POSIF_HALPS_HEPS_Msk (0x38UL) /*!< POSIF HALPS: HEPS (Bitfield-Mask: 0x07) */ + +/* ---------------------------------- POSIF_MCM --------------------------------- */ +#define POSIF_MCM_MCMP_Pos (0UL) /*!< POSIF MCM: MCMP (Bit 0) */ +#define POSIF_MCM_MCMP_Msk (0xffffUL) /*!< POSIF MCM: MCMP (Bitfield-Mask: 0xffff) */ + +/* --------------------------------- POSIF_MCSM --------------------------------- */ +#define POSIF_MCSM_MCMPS_Pos (0UL) /*!< POSIF MCSM: MCMPS (Bit 0) */ +#define POSIF_MCSM_MCMPS_Msk (0xffffUL) /*!< POSIF MCSM: MCMPS (Bitfield-Mask: 0xffff) */ + +/* --------------------------------- POSIF_MCMS --------------------------------- */ +#define POSIF_MCMS_MNPS_Pos (0UL) /*!< POSIF MCMS: MNPS (Bit 0) */ +#define POSIF_MCMS_MNPS_Msk (0x1UL) /*!< POSIF MCMS: MNPS (Bitfield-Mask: 0x01) */ +#define POSIF_MCMS_STHR_Pos (1UL) /*!< POSIF MCMS: STHR (Bit 1) */ +#define POSIF_MCMS_STHR_Msk (0x2UL) /*!< POSIF MCMS: STHR (Bitfield-Mask: 0x01) */ +#define POSIF_MCMS_STMR_Pos (2UL) /*!< POSIF MCMS: STMR (Bit 2) */ +#define POSIF_MCMS_STMR_Msk (0x4UL) /*!< POSIF MCMS: STMR (Bitfield-Mask: 0x01) */ + +/* --------------------------------- POSIF_MCMC --------------------------------- */ +#define POSIF_MCMC_MNPC_Pos (0UL) /*!< POSIF MCMC: MNPC (Bit 0) */ +#define POSIF_MCMC_MNPC_Msk (0x1UL) /*!< POSIF MCMC: MNPC (Bitfield-Mask: 0x01) */ +#define POSIF_MCMC_MPC_Pos (1UL) /*!< POSIF MCMC: MPC (Bit 1) */ +#define POSIF_MCMC_MPC_Msk (0x2UL) /*!< POSIF MCMC: MPC (Bitfield-Mask: 0x01) */ + +/* --------------------------------- POSIF_MCMF --------------------------------- */ +#define POSIF_MCMF_MSS_Pos (0UL) /*!< POSIF MCMF: MSS (Bit 0) */ +#define POSIF_MCMF_MSS_Msk (0x1UL) /*!< POSIF MCMF: MSS (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- POSIF_QDC --------------------------------- */ +#define POSIF_QDC_PALS_Pos (0UL) /*!< POSIF QDC: PALS (Bit 0) */ +#define POSIF_QDC_PALS_Msk (0x1UL) /*!< POSIF QDC: PALS (Bitfield-Mask: 0x01) */ +#define POSIF_QDC_PBLS_Pos (1UL) /*!< POSIF QDC: PBLS (Bit 1) */ +#define POSIF_QDC_PBLS_Msk (0x2UL) /*!< POSIF QDC: PBLS (Bitfield-Mask: 0x01) */ +#define POSIF_QDC_PHS_Pos (2UL) /*!< POSIF QDC: PHS (Bit 2) */ +#define POSIF_QDC_PHS_Msk (0x4UL) /*!< POSIF QDC: PHS (Bitfield-Mask: 0x01) */ +#define POSIF_QDC_ICM_Pos (4UL) /*!< POSIF QDC: ICM (Bit 4) */ +#define POSIF_QDC_ICM_Msk (0x30UL) /*!< POSIF QDC: ICM (Bitfield-Mask: 0x03) */ +#define POSIF_QDC_DVAL_Pos (8UL) /*!< POSIF QDC: DVAL (Bit 8) */ +#define POSIF_QDC_DVAL_Msk (0x100UL) /*!< POSIF QDC: DVAL (Bitfield-Mask: 0x01) */ + +/* --------------------------------- POSIF_PFLG --------------------------------- */ +#define POSIF_PFLG_CHES_Pos (0UL) /*!< POSIF PFLG: CHES (Bit 0) */ +#define POSIF_PFLG_CHES_Msk (0x1UL) /*!< POSIF PFLG: CHES (Bitfield-Mask: 0x01) */ +#define POSIF_PFLG_WHES_Pos (1UL) /*!< POSIF PFLG: WHES (Bit 1) */ +#define POSIF_PFLG_WHES_Msk (0x2UL) /*!< POSIF PFLG: WHES (Bitfield-Mask: 0x01) */ +#define POSIF_PFLG_HIES_Pos (2UL) /*!< POSIF PFLG: HIES (Bit 2) */ +#define POSIF_PFLG_HIES_Msk (0x4UL) /*!< POSIF PFLG: HIES (Bitfield-Mask: 0x01) */ +#define POSIF_PFLG_MSTS_Pos (4UL) /*!< POSIF PFLG: MSTS (Bit 4) */ +#define POSIF_PFLG_MSTS_Msk (0x10UL) /*!< POSIF PFLG: MSTS (Bitfield-Mask: 0x01) */ +#define POSIF_PFLG_INDXS_Pos (8UL) /*!< POSIF PFLG: INDXS (Bit 8) */ +#define POSIF_PFLG_INDXS_Msk (0x100UL) /*!< POSIF PFLG: INDXS (Bitfield-Mask: 0x01) */ +#define POSIF_PFLG_ERRS_Pos (9UL) /*!< POSIF PFLG: ERRS (Bit 9) */ +#define POSIF_PFLG_ERRS_Msk (0x200UL) /*!< POSIF PFLG: ERRS (Bitfield-Mask: 0x01) */ +#define POSIF_PFLG_CNTS_Pos (10UL) /*!< POSIF PFLG: CNTS (Bit 10) */ +#define POSIF_PFLG_CNTS_Msk (0x400UL) /*!< POSIF PFLG: CNTS (Bitfield-Mask: 0x01) */ +#define POSIF_PFLG_DIRS_Pos (11UL) /*!< POSIF PFLG: DIRS (Bit 11) */ +#define POSIF_PFLG_DIRS_Msk (0x800UL) /*!< POSIF PFLG: DIRS (Bitfield-Mask: 0x01) */ +#define POSIF_PFLG_PCLKS_Pos (12UL) /*!< POSIF PFLG: PCLKS (Bit 12) */ +#define POSIF_PFLG_PCLKS_Msk (0x1000UL) /*!< POSIF PFLG: PCLKS (Bitfield-Mask: 0x01) */ + +/* --------------------------------- POSIF_PFLGE -------------------------------- */ +#define POSIF_PFLGE_ECHE_Pos (0UL) /*!< POSIF PFLGE: ECHE (Bit 0) */ +#define POSIF_PFLGE_ECHE_Msk (0x1UL) /*!< POSIF PFLGE: ECHE (Bitfield-Mask: 0x01) */ +#define POSIF_PFLGE_EWHE_Pos (1UL) /*!< POSIF PFLGE: EWHE (Bit 1) */ +#define POSIF_PFLGE_EWHE_Msk (0x2UL) /*!< POSIF PFLGE: EWHE (Bitfield-Mask: 0x01) */ +#define POSIF_PFLGE_EHIE_Pos (2UL) /*!< POSIF PFLGE: EHIE (Bit 2) */ +#define POSIF_PFLGE_EHIE_Msk (0x4UL) /*!< POSIF PFLGE: EHIE (Bitfield-Mask: 0x01) */ +#define POSIF_PFLGE_EMST_Pos (4UL) /*!< POSIF PFLGE: EMST (Bit 4) */ +#define POSIF_PFLGE_EMST_Msk (0x10UL) /*!< POSIF PFLGE: EMST (Bitfield-Mask: 0x01) */ +#define POSIF_PFLGE_EINDX_Pos (8UL) /*!< POSIF PFLGE: EINDX (Bit 8) */ +#define POSIF_PFLGE_EINDX_Msk (0x100UL) /*!< POSIF PFLGE: EINDX (Bitfield-Mask: 0x01) */ +#define POSIF_PFLGE_EERR_Pos (9UL) /*!< POSIF PFLGE: EERR (Bit 9) */ +#define POSIF_PFLGE_EERR_Msk (0x200UL) /*!< POSIF PFLGE: EERR (Bitfield-Mask: 0x01) */ +#define POSIF_PFLGE_ECNT_Pos (10UL) /*!< POSIF PFLGE: ECNT (Bit 10) */ +#define POSIF_PFLGE_ECNT_Msk (0x400UL) /*!< POSIF PFLGE: ECNT (Bitfield-Mask: 0x01) */ +#define POSIF_PFLGE_EDIR_Pos (11UL) /*!< POSIF PFLGE: EDIR (Bit 11) */ +#define POSIF_PFLGE_EDIR_Msk (0x800UL) /*!< POSIF PFLGE: EDIR (Bitfield-Mask: 0x01) */ +#define POSIF_PFLGE_EPCLK_Pos (12UL) /*!< POSIF PFLGE: EPCLK (Bit 12) */ +#define POSIF_PFLGE_EPCLK_Msk (0x1000UL) /*!< POSIF PFLGE: EPCLK (Bitfield-Mask: 0x01) */ +#define POSIF_PFLGE_CHESEL_Pos (16UL) /*!< POSIF PFLGE: CHESEL (Bit 16) */ +#define POSIF_PFLGE_CHESEL_Msk (0x10000UL) /*!< POSIF PFLGE: CHESEL (Bitfield-Mask: 0x01) */ +#define POSIF_PFLGE_WHESEL_Pos (17UL) /*!< POSIF PFLGE: WHESEL (Bit 17) */ +#define POSIF_PFLGE_WHESEL_Msk (0x20000UL) /*!< POSIF PFLGE: WHESEL (Bitfield-Mask: 0x01) */ +#define POSIF_PFLGE_HIESEL_Pos (18UL) /*!< POSIF PFLGE: HIESEL (Bit 18) */ +#define POSIF_PFLGE_HIESEL_Msk (0x40000UL) /*!< POSIF PFLGE: HIESEL (Bitfield-Mask: 0x01) */ +#define POSIF_PFLGE_MSTSEL_Pos (20UL) /*!< POSIF PFLGE: MSTSEL (Bit 20) */ +#define POSIF_PFLGE_MSTSEL_Msk (0x100000UL) /*!< POSIF PFLGE: MSTSEL (Bitfield-Mask: 0x01) */ +#define POSIF_PFLGE_INDSEL_Pos (24UL) /*!< POSIF PFLGE: INDSEL (Bit 24) */ +#define POSIF_PFLGE_INDSEL_Msk (0x1000000UL) /*!< POSIF PFLGE: INDSEL (Bitfield-Mask: 0x01) */ +#define POSIF_PFLGE_ERRSEL_Pos (25UL) /*!< POSIF PFLGE: ERRSEL (Bit 25) */ +#define POSIF_PFLGE_ERRSEL_Msk (0x2000000UL) /*!< POSIF PFLGE: ERRSEL (Bitfield-Mask: 0x01) */ +#define POSIF_PFLGE_CNTSEL_Pos (26UL) /*!< POSIF PFLGE: CNTSEL (Bit 26) */ +#define POSIF_PFLGE_CNTSEL_Msk (0x4000000UL) /*!< POSIF PFLGE: CNTSEL (Bitfield-Mask: 0x01) */ +#define POSIF_PFLGE_DIRSEL_Pos (27UL) /*!< POSIF PFLGE: DIRSEL (Bit 27) */ +#define POSIF_PFLGE_DIRSEL_Msk (0x8000000UL) /*!< POSIF PFLGE: DIRSEL (Bitfield-Mask: 0x01) */ +#define POSIF_PFLGE_PCLSEL_Pos (28UL) /*!< POSIF PFLGE: PCLSEL (Bit 28) */ +#define POSIF_PFLGE_PCLSEL_Msk (0x10000000UL) /*!< POSIF PFLGE: PCLSEL (Bitfield-Mask: 0x01) */ + +/* --------------------------------- POSIF_SPFLG -------------------------------- */ +#define POSIF_SPFLG_SCHE_Pos (0UL) /*!< POSIF SPFLG: SCHE (Bit 0) */ +#define POSIF_SPFLG_SCHE_Msk (0x1UL) /*!< POSIF SPFLG: SCHE (Bitfield-Mask: 0x01) */ +#define POSIF_SPFLG_SWHE_Pos (1UL) /*!< POSIF SPFLG: SWHE (Bit 1) */ +#define POSIF_SPFLG_SWHE_Msk (0x2UL) /*!< POSIF SPFLG: SWHE (Bitfield-Mask: 0x01) */ +#define POSIF_SPFLG_SHIE_Pos (2UL) /*!< POSIF SPFLG: SHIE (Bit 2) */ +#define POSIF_SPFLG_SHIE_Msk (0x4UL) /*!< POSIF SPFLG: SHIE (Bitfield-Mask: 0x01) */ +#define POSIF_SPFLG_SMST_Pos (4UL) /*!< POSIF SPFLG: SMST (Bit 4) */ +#define POSIF_SPFLG_SMST_Msk (0x10UL) /*!< POSIF SPFLG: SMST (Bitfield-Mask: 0x01) */ +#define POSIF_SPFLG_SINDX_Pos (8UL) /*!< POSIF SPFLG: SINDX (Bit 8) */ +#define POSIF_SPFLG_SINDX_Msk (0x100UL) /*!< POSIF SPFLG: SINDX (Bitfield-Mask: 0x01) */ +#define POSIF_SPFLG_SERR_Pos (9UL) /*!< POSIF SPFLG: SERR (Bit 9) */ +#define POSIF_SPFLG_SERR_Msk (0x200UL) /*!< POSIF SPFLG: SERR (Bitfield-Mask: 0x01) */ +#define POSIF_SPFLG_SCNT_Pos (10UL) /*!< POSIF SPFLG: SCNT (Bit 10) */ +#define POSIF_SPFLG_SCNT_Msk (0x400UL) /*!< POSIF SPFLG: SCNT (Bitfield-Mask: 0x01) */ +#define POSIF_SPFLG_SDIR_Pos (11UL) /*!< POSIF SPFLG: SDIR (Bit 11) */ +#define POSIF_SPFLG_SDIR_Msk (0x800UL) /*!< POSIF SPFLG: SDIR (Bitfield-Mask: 0x01) */ +#define POSIF_SPFLG_SPCLK_Pos (12UL) /*!< POSIF SPFLG: SPCLK (Bit 12) */ +#define POSIF_SPFLG_SPCLK_Msk (0x1000UL) /*!< POSIF SPFLG: SPCLK (Bitfield-Mask: 0x01) */ + +/* --------------------------------- POSIF_RPFLG -------------------------------- */ +#define POSIF_RPFLG_RCHE_Pos (0UL) /*!< POSIF RPFLG: RCHE (Bit 0) */ +#define POSIF_RPFLG_RCHE_Msk (0x1UL) /*!< POSIF RPFLG: RCHE (Bitfield-Mask: 0x01) */ +#define POSIF_RPFLG_RWHE_Pos (1UL) /*!< POSIF RPFLG: RWHE (Bit 1) */ +#define POSIF_RPFLG_RWHE_Msk (0x2UL) /*!< POSIF RPFLG: RWHE (Bitfield-Mask: 0x01) */ +#define POSIF_RPFLG_RHIE_Pos (2UL) /*!< POSIF RPFLG: RHIE (Bit 2) */ +#define POSIF_RPFLG_RHIE_Msk (0x4UL) /*!< POSIF RPFLG: RHIE (Bitfield-Mask: 0x01) */ +#define POSIF_RPFLG_RMST_Pos (4UL) /*!< POSIF RPFLG: RMST (Bit 4) */ +#define POSIF_RPFLG_RMST_Msk (0x10UL) /*!< POSIF RPFLG: RMST (Bitfield-Mask: 0x01) */ +#define POSIF_RPFLG_RINDX_Pos (8UL) /*!< POSIF RPFLG: RINDX (Bit 8) */ +#define POSIF_RPFLG_RINDX_Msk (0x100UL) /*!< POSIF RPFLG: RINDX (Bitfield-Mask: 0x01) */ +#define POSIF_RPFLG_RERR_Pos (9UL) /*!< POSIF RPFLG: RERR (Bit 9) */ +#define POSIF_RPFLG_RERR_Msk (0x200UL) /*!< POSIF RPFLG: RERR (Bitfield-Mask: 0x01) */ +#define POSIF_RPFLG_RCNT_Pos (10UL) /*!< POSIF RPFLG: RCNT (Bit 10) */ +#define POSIF_RPFLG_RCNT_Msk (0x400UL) /*!< POSIF RPFLG: RCNT (Bitfield-Mask: 0x01) */ +#define POSIF_RPFLG_RDIR_Pos (11UL) /*!< POSIF RPFLG: RDIR (Bit 11) */ +#define POSIF_RPFLG_RDIR_Msk (0x800UL) /*!< POSIF RPFLG: RDIR (Bitfield-Mask: 0x01) */ +#define POSIF_RPFLG_RPCLK_Pos (12UL) /*!< POSIF RPFLG: RPCLK (Bit 12) */ +#define POSIF_RPFLG_RPCLK_Msk (0x1000UL) /*!< POSIF RPFLG: RPCLK (Bitfield-Mask: 0x01) */ + +/* --------------------------------- POSIF_PDBG --------------------------------- */ +#define POSIF_PDBG_QCSV_Pos (0UL) /*!< POSIF PDBG: QCSV (Bit 0) */ +#define POSIF_PDBG_QCSV_Msk (0x3UL) /*!< POSIF PDBG: QCSV (Bitfield-Mask: 0x03) */ +#define POSIF_PDBG_QPSV_Pos (2UL) /*!< POSIF PDBG: QPSV (Bit 2) */ +#define POSIF_PDBG_QPSV_Msk (0xcUL) /*!< POSIF PDBG: QPSV (Bitfield-Mask: 0x03) */ +#define POSIF_PDBG_IVAL_Pos (4UL) /*!< POSIF PDBG: IVAL (Bit 4) */ +#define POSIF_PDBG_IVAL_Msk (0x10UL) /*!< POSIF PDBG: IVAL (Bitfield-Mask: 0x01) */ +#define POSIF_PDBG_HSP_Pos (5UL) /*!< POSIF PDBG: HSP (Bit 5) */ +#define POSIF_PDBG_HSP_Msk (0xe0UL) /*!< POSIF PDBG: HSP (Bitfield-Mask: 0x07) */ +#define POSIF_PDBG_LPP0_Pos (8UL) /*!< POSIF PDBG: LPP0 (Bit 8) */ +#define POSIF_PDBG_LPP0_Msk (0x3f00UL) /*!< POSIF PDBG: LPP0 (Bitfield-Mask: 0x3f) */ +#define POSIF_PDBG_LPP1_Pos (16UL) /*!< POSIF PDBG: LPP1 (Bit 16) */ +#define POSIF_PDBG_LPP1_Msk (0x3f0000UL) /*!< POSIF PDBG: LPP1 (Bitfield-Mask: 0x3f) */ +#define POSIF_PDBG_LPP2_Pos (22UL) /*!< POSIF PDBG: LPP2 (Bit 22) */ +#define POSIF_PDBG_LPP2_Msk (0xfc00000UL) /*!< POSIF PDBG: LPP2 (Bitfield-Mask: 0x3f) */ + + +/* ================================================================================ */ +/* ================ struct 'PORT0' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ---------------------------------- PORT0_OUT --------------------------------- */ +#define PORT0_OUT_P0_Pos (0UL) /*!< PORT0 OUT: P0 (Bit 0) */ +#define PORT0_OUT_P0_Msk (0x1UL) /*!< PORT0 OUT: P0 (Bitfield-Mask: 0x01) */ +#define PORT0_OUT_P1_Pos (1UL) /*!< PORT0 OUT: P1 (Bit 1) */ +#define PORT0_OUT_P1_Msk (0x2UL) /*!< PORT0 OUT: P1 (Bitfield-Mask: 0x01) */ +#define PORT0_OUT_P2_Pos (2UL) /*!< PORT0 OUT: P2 (Bit 2) */ +#define PORT0_OUT_P2_Msk (0x4UL) /*!< PORT0 OUT: P2 (Bitfield-Mask: 0x01) */ +#define PORT0_OUT_P3_Pos (3UL) /*!< PORT0 OUT: P3 (Bit 3) */ +#define PORT0_OUT_P3_Msk (0x8UL) /*!< PORT0 OUT: P3 (Bitfield-Mask: 0x01) */ +#define PORT0_OUT_P4_Pos (4UL) /*!< PORT0 OUT: P4 (Bit 4) */ +#define PORT0_OUT_P4_Msk (0x10UL) /*!< PORT0 OUT: P4 (Bitfield-Mask: 0x01) */ +#define PORT0_OUT_P5_Pos (5UL) /*!< PORT0 OUT: P5 (Bit 5) */ +#define PORT0_OUT_P5_Msk (0x20UL) /*!< PORT0 OUT: P5 (Bitfield-Mask: 0x01) */ +#define PORT0_OUT_P6_Pos (6UL) /*!< PORT0 OUT: P6 (Bit 6) */ +#define PORT0_OUT_P6_Msk (0x40UL) /*!< PORT0 OUT: P6 (Bitfield-Mask: 0x01) */ +#define PORT0_OUT_P7_Pos (7UL) /*!< PORT0 OUT: P7 (Bit 7) */ +#define PORT0_OUT_P7_Msk (0x80UL) /*!< PORT0 OUT: P7 (Bitfield-Mask: 0x01) */ +#define PORT0_OUT_P8_Pos (8UL) /*!< PORT0 OUT: P8 (Bit 8) */ +#define PORT0_OUT_P8_Msk (0x100UL) /*!< PORT0 OUT: P8 (Bitfield-Mask: 0x01) */ +#define PORT0_OUT_P9_Pos (9UL) /*!< PORT0 OUT: P9 (Bit 9) */ +#define PORT0_OUT_P9_Msk (0x200UL) /*!< PORT0 OUT: P9 (Bitfield-Mask: 0x01) */ +#define PORT0_OUT_P10_Pos (10UL) /*!< PORT0 OUT: P10 (Bit 10) */ +#define PORT0_OUT_P10_Msk (0x400UL) /*!< PORT0 OUT: P10 (Bitfield-Mask: 0x01) */ +#define PORT0_OUT_P11_Pos (11UL) /*!< PORT0 OUT: P11 (Bit 11) */ +#define PORT0_OUT_P11_Msk (0x800UL) /*!< PORT0 OUT: P11 (Bitfield-Mask: 0x01) */ +#define PORT0_OUT_P12_Pos (12UL) /*!< PORT0 OUT: P12 (Bit 12) */ +#define PORT0_OUT_P12_Msk (0x1000UL) /*!< PORT0 OUT: P12 (Bitfield-Mask: 0x01) */ +#define PORT0_OUT_P13_Pos (13UL) /*!< PORT0 OUT: P13 (Bit 13) */ +#define PORT0_OUT_P13_Msk (0x2000UL) /*!< PORT0 OUT: P13 (Bitfield-Mask: 0x01) */ +#define PORT0_OUT_P14_Pos (14UL) /*!< PORT0 OUT: P14 (Bit 14) */ +#define PORT0_OUT_P14_Msk (0x4000UL) /*!< PORT0 OUT: P14 (Bitfield-Mask: 0x01) */ +#define PORT0_OUT_P15_Pos (15UL) /*!< PORT0 OUT: P15 (Bit 15) */ +#define PORT0_OUT_P15_Msk (0x8000UL) /*!< PORT0 OUT: P15 (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- PORT0_OMR --------------------------------- */ +#define PORT0_OMR_PS0_Pos (0UL) /*!< PORT0 OMR: PS0 (Bit 0) */ +#define PORT0_OMR_PS0_Msk (0x1UL) /*!< PORT0 OMR: PS0 (Bitfield-Mask: 0x01) */ +#define PORT0_OMR_PS1_Pos (1UL) /*!< PORT0 OMR: PS1 (Bit 1) */ +#define PORT0_OMR_PS1_Msk (0x2UL) /*!< PORT0 OMR: PS1 (Bitfield-Mask: 0x01) */ +#define PORT0_OMR_PS2_Pos (2UL) /*!< PORT0 OMR: PS2 (Bit 2) */ +#define PORT0_OMR_PS2_Msk (0x4UL) /*!< PORT0 OMR: PS2 (Bitfield-Mask: 0x01) */ +#define PORT0_OMR_PS3_Pos (3UL) /*!< PORT0 OMR: PS3 (Bit 3) */ +#define PORT0_OMR_PS3_Msk (0x8UL) /*!< PORT0 OMR: PS3 (Bitfield-Mask: 0x01) */ +#define PORT0_OMR_PS4_Pos (4UL) /*!< PORT0 OMR: PS4 (Bit 4) */ +#define PORT0_OMR_PS4_Msk (0x10UL) /*!< PORT0 OMR: PS4 (Bitfield-Mask: 0x01) */ +#define PORT0_OMR_PS5_Pos (5UL) /*!< PORT0 OMR: PS5 (Bit 5) */ +#define PORT0_OMR_PS5_Msk (0x20UL) /*!< PORT0 OMR: PS5 (Bitfield-Mask: 0x01) */ +#define PORT0_OMR_PS6_Pos (6UL) /*!< PORT0 OMR: PS6 (Bit 6) */ +#define PORT0_OMR_PS6_Msk (0x40UL) /*!< PORT0 OMR: PS6 (Bitfield-Mask: 0x01) */ +#define PORT0_OMR_PS7_Pos (7UL) /*!< PORT0 OMR: PS7 (Bit 7) */ +#define PORT0_OMR_PS7_Msk (0x80UL) /*!< PORT0 OMR: PS7 (Bitfield-Mask: 0x01) */ +#define PORT0_OMR_PS8_Pos (8UL) /*!< PORT0 OMR: PS8 (Bit 8) */ +#define PORT0_OMR_PS8_Msk (0x100UL) /*!< PORT0 OMR: PS8 (Bitfield-Mask: 0x01) */ +#define PORT0_OMR_PS9_Pos (9UL) /*!< PORT0 OMR: PS9 (Bit 9) */ +#define PORT0_OMR_PS9_Msk (0x200UL) /*!< PORT0 OMR: PS9 (Bitfield-Mask: 0x01) */ +#define PORT0_OMR_PS10_Pos (10UL) /*!< PORT0 OMR: PS10 (Bit 10) */ +#define PORT0_OMR_PS10_Msk (0x400UL) /*!< PORT0 OMR: PS10 (Bitfield-Mask: 0x01) */ +#define PORT0_OMR_PS11_Pos (11UL) /*!< PORT0 OMR: PS11 (Bit 11) */ +#define PORT0_OMR_PS11_Msk (0x800UL) /*!< PORT0 OMR: PS11 (Bitfield-Mask: 0x01) */ +#define PORT0_OMR_PS12_Pos (12UL) /*!< PORT0 OMR: PS12 (Bit 12) */ +#define PORT0_OMR_PS12_Msk (0x1000UL) /*!< PORT0 OMR: PS12 (Bitfield-Mask: 0x01) */ +#define PORT0_OMR_PS13_Pos (13UL) /*!< PORT0 OMR: PS13 (Bit 13) */ +#define PORT0_OMR_PS13_Msk (0x2000UL) /*!< PORT0 OMR: PS13 (Bitfield-Mask: 0x01) */ +#define PORT0_OMR_PS14_Pos (14UL) /*!< PORT0 OMR: PS14 (Bit 14) */ +#define PORT0_OMR_PS14_Msk (0x4000UL) /*!< PORT0 OMR: PS14 (Bitfield-Mask: 0x01) */ +#define PORT0_OMR_PS15_Pos (15UL) /*!< PORT0 OMR: PS15 (Bit 15) */ +#define PORT0_OMR_PS15_Msk (0x8000UL) /*!< PORT0 OMR: PS15 (Bitfield-Mask: 0x01) */ +#define PORT0_OMR_PR0_Pos (16UL) /*!< PORT0 OMR: PR0 (Bit 16) */ +#define PORT0_OMR_PR0_Msk (0x10000UL) /*!< PORT0 OMR: PR0 (Bitfield-Mask: 0x01) */ +#define PORT0_OMR_PR1_Pos (17UL) /*!< PORT0 OMR: PR1 (Bit 17) */ +#define PORT0_OMR_PR1_Msk (0x20000UL) /*!< PORT0 OMR: PR1 (Bitfield-Mask: 0x01) */ +#define PORT0_OMR_PR2_Pos (18UL) /*!< PORT0 OMR: PR2 (Bit 18) */ +#define PORT0_OMR_PR2_Msk (0x40000UL) /*!< PORT0 OMR: PR2 (Bitfield-Mask: 0x01) */ +#define PORT0_OMR_PR3_Pos (19UL) /*!< PORT0 OMR: PR3 (Bit 19) */ +#define PORT0_OMR_PR3_Msk (0x80000UL) /*!< PORT0 OMR: PR3 (Bitfield-Mask: 0x01) */ +#define PORT0_OMR_PR4_Pos (20UL) /*!< PORT0 OMR: PR4 (Bit 20) */ +#define PORT0_OMR_PR4_Msk (0x100000UL) /*!< PORT0 OMR: PR4 (Bitfield-Mask: 0x01) */ +#define PORT0_OMR_PR5_Pos (21UL) /*!< PORT0 OMR: PR5 (Bit 21) */ +#define PORT0_OMR_PR5_Msk (0x200000UL) /*!< PORT0 OMR: PR5 (Bitfield-Mask: 0x01) */ +#define PORT0_OMR_PR6_Pos (22UL) /*!< PORT0 OMR: PR6 (Bit 22) */ +#define PORT0_OMR_PR6_Msk (0x400000UL) /*!< PORT0 OMR: PR6 (Bitfield-Mask: 0x01) */ +#define PORT0_OMR_PR7_Pos (23UL) /*!< PORT0 OMR: PR7 (Bit 23) */ +#define PORT0_OMR_PR7_Msk (0x800000UL) /*!< PORT0 OMR: PR7 (Bitfield-Mask: 0x01) */ +#define PORT0_OMR_PR8_Pos (24UL) /*!< PORT0 OMR: PR8 (Bit 24) */ +#define PORT0_OMR_PR8_Msk (0x1000000UL) /*!< PORT0 OMR: PR8 (Bitfield-Mask: 0x01) */ +#define PORT0_OMR_PR9_Pos (25UL) /*!< PORT0 OMR: PR9 (Bit 25) */ +#define PORT0_OMR_PR9_Msk (0x2000000UL) /*!< PORT0 OMR: PR9 (Bitfield-Mask: 0x01) */ +#define PORT0_OMR_PR10_Pos (26UL) /*!< PORT0 OMR: PR10 (Bit 26) */ +#define PORT0_OMR_PR10_Msk (0x4000000UL) /*!< PORT0 OMR: PR10 (Bitfield-Mask: 0x01) */ +#define PORT0_OMR_PR11_Pos (27UL) /*!< PORT0 OMR: PR11 (Bit 27) */ +#define PORT0_OMR_PR11_Msk (0x8000000UL) /*!< PORT0 OMR: PR11 (Bitfield-Mask: 0x01) */ +#define PORT0_OMR_PR12_Pos (28UL) /*!< PORT0 OMR: PR12 (Bit 28) */ +#define PORT0_OMR_PR12_Msk (0x10000000UL) /*!< PORT0 OMR: PR12 (Bitfield-Mask: 0x01) */ +#define PORT0_OMR_PR13_Pos (29UL) /*!< PORT0 OMR: PR13 (Bit 29) */ +#define PORT0_OMR_PR13_Msk (0x20000000UL) /*!< PORT0 OMR: PR13 (Bitfield-Mask: 0x01) */ +#define PORT0_OMR_PR14_Pos (30UL) /*!< PORT0 OMR: PR14 (Bit 30) */ +#define PORT0_OMR_PR14_Msk (0x40000000UL) /*!< PORT0 OMR: PR14 (Bitfield-Mask: 0x01) */ +#define PORT0_OMR_PR15_Pos (31UL) /*!< PORT0 OMR: PR15 (Bit 31) */ +#define PORT0_OMR_PR15_Msk (0x80000000UL) /*!< PORT0 OMR: PR15 (Bitfield-Mask: 0x01) */ + +/* --------------------------------- PORT0_IOCR0 -------------------------------- */ +#define PORT0_IOCR0_PC0_Pos (3UL) /*!< PORT0 IOCR0: PC0 (Bit 3) */ +#define PORT0_IOCR0_PC0_Msk (0xf8UL) /*!< PORT0 IOCR0: PC0 (Bitfield-Mask: 0x1f) */ +#define PORT0_IOCR0_PC1_Pos (11UL) /*!< PORT0 IOCR0: PC1 (Bit 11) */ +#define PORT0_IOCR0_PC1_Msk (0xf800UL) /*!< PORT0 IOCR0: PC1 (Bitfield-Mask: 0x1f) */ +#define PORT0_IOCR0_PC2_Pos (19UL) /*!< PORT0 IOCR0: PC2 (Bit 19) */ +#define PORT0_IOCR0_PC2_Msk (0xf80000UL) /*!< PORT0 IOCR0: PC2 (Bitfield-Mask: 0x1f) */ +#define PORT0_IOCR0_PC3_Pos (27UL) /*!< PORT0 IOCR0: PC3 (Bit 27) */ +#define PORT0_IOCR0_PC3_Msk (0xf8000000UL) /*!< PORT0 IOCR0: PC3 (Bitfield-Mask: 0x1f) */ + +/* --------------------------------- PORT0_IOCR4 -------------------------------- */ +#define PORT0_IOCR4_PC4_Pos (3UL) /*!< PORT0 IOCR4: PC4 (Bit 3) */ +#define PORT0_IOCR4_PC4_Msk (0xf8UL) /*!< PORT0 IOCR4: PC4 (Bitfield-Mask: 0x1f) */ +#define PORT0_IOCR4_PC5_Pos (11UL) /*!< PORT0 IOCR4: PC5 (Bit 11) */ +#define PORT0_IOCR4_PC5_Msk (0xf800UL) /*!< PORT0 IOCR4: PC5 (Bitfield-Mask: 0x1f) */ +#define PORT0_IOCR4_PC6_Pos (19UL) /*!< PORT0 IOCR4: PC6 (Bit 19) */ +#define PORT0_IOCR4_PC6_Msk (0xf80000UL) /*!< PORT0 IOCR4: PC6 (Bitfield-Mask: 0x1f) */ +#define PORT0_IOCR4_PC7_Pos (27UL) /*!< PORT0 IOCR4: PC7 (Bit 27) */ +#define PORT0_IOCR4_PC7_Msk (0xf8000000UL) /*!< PORT0 IOCR4: PC7 (Bitfield-Mask: 0x1f) */ + +/* --------------------------------- PORT0_IOCR8 -------------------------------- */ +#define PORT0_IOCR8_PC8_Pos (3UL) /*!< PORT0 IOCR8: PC8 (Bit 3) */ +#define PORT0_IOCR8_PC8_Msk (0xf8UL) /*!< PORT0 IOCR8: PC8 (Bitfield-Mask: 0x1f) */ +#define PORT0_IOCR8_PC9_Pos (11UL) /*!< PORT0 IOCR8: PC9 (Bit 11) */ +#define PORT0_IOCR8_PC9_Msk (0xf800UL) /*!< PORT0 IOCR8: PC9 (Bitfield-Mask: 0x1f) */ +#define PORT0_IOCR8_PC10_Pos (19UL) /*!< PORT0 IOCR8: PC10 (Bit 19) */ +#define PORT0_IOCR8_PC10_Msk (0xf80000UL) /*!< PORT0 IOCR8: PC10 (Bitfield-Mask: 0x1f) */ +#define PORT0_IOCR8_PC11_Pos (27UL) /*!< PORT0 IOCR8: PC11 (Bit 27) */ +#define PORT0_IOCR8_PC11_Msk (0xf8000000UL) /*!< PORT0 IOCR8: PC11 (Bitfield-Mask: 0x1f) */ + +/* -------------------------------- PORT0_IOCR12 -------------------------------- */ +#define PORT0_IOCR12_PC12_Pos (3UL) /*!< PORT0 IOCR12: PC12 (Bit 3) */ +#define PORT0_IOCR12_PC12_Msk (0xf8UL) /*!< PORT0 IOCR12: PC12 (Bitfield-Mask: 0x1f) */ +#define PORT0_IOCR12_PC13_Pos (11UL) /*!< PORT0 IOCR12: PC13 (Bit 11) */ +#define PORT0_IOCR12_PC13_Msk (0xf800UL) /*!< PORT0 IOCR12: PC13 (Bitfield-Mask: 0x1f) */ +#define PORT0_IOCR12_PC14_Pos (19UL) /*!< PORT0 IOCR12: PC14 (Bit 19) */ +#define PORT0_IOCR12_PC14_Msk (0xf80000UL) /*!< PORT0 IOCR12: PC14 (Bitfield-Mask: 0x1f) */ +#define PORT0_IOCR12_PC15_Pos (27UL) /*!< PORT0 IOCR12: PC15 (Bit 27) */ +#define PORT0_IOCR12_PC15_Msk (0xf8000000UL) /*!< PORT0 IOCR12: PC15 (Bitfield-Mask: 0x1f) */ + +/* ---------------------------------- PORT0_IN ---------------------------------- */ +#define PORT0_IN_P0_Pos (0UL) /*!< PORT0 IN: P0 (Bit 0) */ +#define PORT0_IN_P0_Msk (0x1UL) /*!< PORT0 IN: P0 (Bitfield-Mask: 0x01) */ +#define PORT0_IN_P1_Pos (1UL) /*!< PORT0 IN: P1 (Bit 1) */ +#define PORT0_IN_P1_Msk (0x2UL) /*!< PORT0 IN: P1 (Bitfield-Mask: 0x01) */ +#define PORT0_IN_P2_Pos (2UL) /*!< PORT0 IN: P2 (Bit 2) */ +#define PORT0_IN_P2_Msk (0x4UL) /*!< PORT0 IN: P2 (Bitfield-Mask: 0x01) */ +#define PORT0_IN_P3_Pos (3UL) /*!< PORT0 IN: P3 (Bit 3) */ +#define PORT0_IN_P3_Msk (0x8UL) /*!< PORT0 IN: P3 (Bitfield-Mask: 0x01) */ +#define PORT0_IN_P4_Pos (4UL) /*!< PORT0 IN: P4 (Bit 4) */ +#define PORT0_IN_P4_Msk (0x10UL) /*!< PORT0 IN: P4 (Bitfield-Mask: 0x01) */ +#define PORT0_IN_P5_Pos (5UL) /*!< PORT0 IN: P5 (Bit 5) */ +#define PORT0_IN_P5_Msk (0x20UL) /*!< PORT0 IN: P5 (Bitfield-Mask: 0x01) */ +#define PORT0_IN_P6_Pos (6UL) /*!< PORT0 IN: P6 (Bit 6) */ +#define PORT0_IN_P6_Msk (0x40UL) /*!< PORT0 IN: P6 (Bitfield-Mask: 0x01) */ +#define PORT0_IN_P7_Pos (7UL) /*!< PORT0 IN: P7 (Bit 7) */ +#define PORT0_IN_P7_Msk (0x80UL) /*!< PORT0 IN: P7 (Bitfield-Mask: 0x01) */ +#define PORT0_IN_P8_Pos (8UL) /*!< PORT0 IN: P8 (Bit 8) */ +#define PORT0_IN_P8_Msk (0x100UL) /*!< PORT0 IN: P8 (Bitfield-Mask: 0x01) */ +#define PORT0_IN_P9_Pos (9UL) /*!< PORT0 IN: P9 (Bit 9) */ +#define PORT0_IN_P9_Msk (0x200UL) /*!< PORT0 IN: P9 (Bitfield-Mask: 0x01) */ +#define PORT0_IN_P10_Pos (10UL) /*!< PORT0 IN: P10 (Bit 10) */ +#define PORT0_IN_P10_Msk (0x400UL) /*!< PORT0 IN: P10 (Bitfield-Mask: 0x01) */ +#define PORT0_IN_P11_Pos (11UL) /*!< PORT0 IN: P11 (Bit 11) */ +#define PORT0_IN_P11_Msk (0x800UL) /*!< PORT0 IN: P11 (Bitfield-Mask: 0x01) */ +#define PORT0_IN_P12_Pos (12UL) /*!< PORT0 IN: P12 (Bit 12) */ +#define PORT0_IN_P12_Msk (0x1000UL) /*!< PORT0 IN: P12 (Bitfield-Mask: 0x01) */ +#define PORT0_IN_P13_Pos (13UL) /*!< PORT0 IN: P13 (Bit 13) */ +#define PORT0_IN_P13_Msk (0x2000UL) /*!< PORT0 IN: P13 (Bitfield-Mask: 0x01) */ +#define PORT0_IN_P14_Pos (14UL) /*!< PORT0 IN: P14 (Bit 14) */ +#define PORT0_IN_P14_Msk (0x4000UL) /*!< PORT0 IN: P14 (Bitfield-Mask: 0x01) */ +#define PORT0_IN_P15_Pos (15UL) /*!< PORT0 IN: P15 (Bit 15) */ +#define PORT0_IN_P15_Msk (0x8000UL) /*!< PORT0 IN: P15 (Bitfield-Mask: 0x01) */ + +/* --------------------------------- PORT0_PDR0 --------------------------------- */ +#define PORT0_PDR0_PD0_Pos (0UL) /*!< PORT0 PDR0: PD0 (Bit 0) */ +#define PORT0_PDR0_PD0_Msk (0x7UL) /*!< PORT0 PDR0: PD0 (Bitfield-Mask: 0x07) */ +#define PORT0_PDR0_PD1_Pos (4UL) /*!< PORT0 PDR0: PD1 (Bit 4) */ +#define PORT0_PDR0_PD1_Msk (0x70UL) /*!< PORT0 PDR0: PD1 (Bitfield-Mask: 0x07) */ +#define PORT0_PDR0_PD2_Pos (8UL) /*!< PORT0 PDR0: PD2 (Bit 8) */ +#define PORT0_PDR0_PD2_Msk (0x700UL) /*!< PORT0 PDR0: PD2 (Bitfield-Mask: 0x07) */ +#define PORT0_PDR0_PD3_Pos (12UL) /*!< PORT0 PDR0: PD3 (Bit 12) */ +#define PORT0_PDR0_PD3_Msk (0x7000UL) /*!< PORT0 PDR0: PD3 (Bitfield-Mask: 0x07) */ +#define PORT0_PDR0_PD4_Pos (16UL) /*!< PORT0 PDR0: PD4 (Bit 16) */ +#define PORT0_PDR0_PD4_Msk (0x70000UL) /*!< PORT0 PDR0: PD4 (Bitfield-Mask: 0x07) */ +#define PORT0_PDR0_PD5_Pos (20UL) /*!< PORT0 PDR0: PD5 (Bit 20) */ +#define PORT0_PDR0_PD5_Msk (0x700000UL) /*!< PORT0 PDR0: PD5 (Bitfield-Mask: 0x07) */ +#define PORT0_PDR0_PD6_Pos (24UL) /*!< PORT0 PDR0: PD6 (Bit 24) */ +#define PORT0_PDR0_PD6_Msk (0x7000000UL) /*!< PORT0 PDR0: PD6 (Bitfield-Mask: 0x07) */ +#define PORT0_PDR0_PD7_Pos (28UL) /*!< PORT0 PDR0: PD7 (Bit 28) */ +#define PORT0_PDR0_PD7_Msk (0x70000000UL) /*!< PORT0 PDR0: PD7 (Bitfield-Mask: 0x07) */ + +/* --------------------------------- PORT0_PDR1 --------------------------------- */ +#define PORT0_PDR1_PD8_Pos (0UL) /*!< PORT0 PDR1: PD8 (Bit 0) */ +#define PORT0_PDR1_PD8_Msk (0x7UL) /*!< PORT0 PDR1: PD8 (Bitfield-Mask: 0x07) */ +#define PORT0_PDR1_PD9_Pos (4UL) /*!< PORT0 PDR1: PD9 (Bit 4) */ +#define PORT0_PDR1_PD9_Msk (0x70UL) /*!< PORT0 PDR1: PD9 (Bitfield-Mask: 0x07) */ +#define PORT0_PDR1_PD10_Pos (8UL) /*!< PORT0 PDR1: PD10 (Bit 8) */ +#define PORT0_PDR1_PD10_Msk (0x700UL) /*!< PORT0 PDR1: PD10 (Bitfield-Mask: 0x07) */ +#define PORT0_PDR1_PD11_Pos (12UL) /*!< PORT0 PDR1: PD11 (Bit 12) */ +#define PORT0_PDR1_PD11_Msk (0x7000UL) /*!< PORT0 PDR1: PD11 (Bitfield-Mask: 0x07) */ +#define PORT0_PDR1_PD12_Pos (16UL) /*!< PORT0 PDR1: PD12 (Bit 16) */ +#define PORT0_PDR1_PD12_Msk (0x70000UL) /*!< PORT0 PDR1: PD12 (Bitfield-Mask: 0x07) */ +#define PORT0_PDR1_PD13_Pos (20UL) /*!< PORT0 PDR1: PD13 (Bit 20) */ +#define PORT0_PDR1_PD13_Msk (0x700000UL) /*!< PORT0 PDR1: PD13 (Bitfield-Mask: 0x07) */ +#define PORT0_PDR1_PD14_Pos (24UL) /*!< PORT0 PDR1: PD14 (Bit 24) */ +#define PORT0_PDR1_PD14_Msk (0x7000000UL) /*!< PORT0 PDR1: PD14 (Bitfield-Mask: 0x07) */ +#define PORT0_PDR1_PD15_Pos (28UL) /*!< PORT0 PDR1: PD15 (Bit 28) */ +#define PORT0_PDR1_PD15_Msk (0x70000000UL) /*!< PORT0 PDR1: PD15 (Bitfield-Mask: 0x07) */ + +/* --------------------------------- PORT0_PDISC -------------------------------- */ +#define PORT0_PDISC_PDIS0_Pos (0UL) /*!< PORT0 PDISC: PDIS0 (Bit 0) */ +#define PORT0_PDISC_PDIS0_Msk (0x1UL) /*!< PORT0 PDISC: PDIS0 (Bitfield-Mask: 0x01) */ +#define PORT0_PDISC_PDIS1_Pos (1UL) /*!< PORT0 PDISC: PDIS1 (Bit 1) */ +#define PORT0_PDISC_PDIS1_Msk (0x2UL) /*!< PORT0 PDISC: PDIS1 (Bitfield-Mask: 0x01) */ +#define PORT0_PDISC_PDIS2_Pos (2UL) /*!< PORT0 PDISC: PDIS2 (Bit 2) */ +#define PORT0_PDISC_PDIS2_Msk (0x4UL) /*!< PORT0 PDISC: PDIS2 (Bitfield-Mask: 0x01) */ +#define PORT0_PDISC_PDIS3_Pos (3UL) /*!< PORT0 PDISC: PDIS3 (Bit 3) */ +#define PORT0_PDISC_PDIS3_Msk (0x8UL) /*!< PORT0 PDISC: PDIS3 (Bitfield-Mask: 0x01) */ +#define PORT0_PDISC_PDIS4_Pos (4UL) /*!< PORT0 PDISC: PDIS4 (Bit 4) */ +#define PORT0_PDISC_PDIS4_Msk (0x10UL) /*!< PORT0 PDISC: PDIS4 (Bitfield-Mask: 0x01) */ +#define PORT0_PDISC_PDIS5_Pos (5UL) /*!< PORT0 PDISC: PDIS5 (Bit 5) */ +#define PORT0_PDISC_PDIS5_Msk (0x20UL) /*!< PORT0 PDISC: PDIS5 (Bitfield-Mask: 0x01) */ +#define PORT0_PDISC_PDIS6_Pos (6UL) /*!< PORT0 PDISC: PDIS6 (Bit 6) */ +#define PORT0_PDISC_PDIS6_Msk (0x40UL) /*!< PORT0 PDISC: PDIS6 (Bitfield-Mask: 0x01) */ +#define PORT0_PDISC_PDIS7_Pos (7UL) /*!< PORT0 PDISC: PDIS7 (Bit 7) */ +#define PORT0_PDISC_PDIS7_Msk (0x80UL) /*!< PORT0 PDISC: PDIS7 (Bitfield-Mask: 0x01) */ +#define PORT0_PDISC_PDIS8_Pos (8UL) /*!< PORT0 PDISC: PDIS8 (Bit 8) */ +#define PORT0_PDISC_PDIS8_Msk (0x100UL) /*!< PORT0 PDISC: PDIS8 (Bitfield-Mask: 0x01) */ +#define PORT0_PDISC_PDIS9_Pos (9UL) /*!< PORT0 PDISC: PDIS9 (Bit 9) */ +#define PORT0_PDISC_PDIS9_Msk (0x200UL) /*!< PORT0 PDISC: PDIS9 (Bitfield-Mask: 0x01) */ +#define PORT0_PDISC_PDIS10_Pos (10UL) /*!< PORT0 PDISC: PDIS10 (Bit 10) */ +#define PORT0_PDISC_PDIS10_Msk (0x400UL) /*!< PORT0 PDISC: PDIS10 (Bitfield-Mask: 0x01) */ +#define PORT0_PDISC_PDIS11_Pos (11UL) /*!< PORT0 PDISC: PDIS11 (Bit 11) */ +#define PORT0_PDISC_PDIS11_Msk (0x800UL) /*!< PORT0 PDISC: PDIS11 (Bitfield-Mask: 0x01) */ +#define PORT0_PDISC_PDIS12_Pos (12UL) /*!< PORT0 PDISC: PDIS12 (Bit 12) */ +#define PORT0_PDISC_PDIS12_Msk (0x1000UL) /*!< PORT0 PDISC: PDIS12 (Bitfield-Mask: 0x01) */ +#define PORT0_PDISC_PDIS13_Pos (13UL) /*!< PORT0 PDISC: PDIS13 (Bit 13) */ +#define PORT0_PDISC_PDIS13_Msk (0x2000UL) /*!< PORT0 PDISC: PDIS13 (Bitfield-Mask: 0x01) */ +#define PORT0_PDISC_PDIS14_Pos (14UL) /*!< PORT0 PDISC: PDIS14 (Bit 14) */ +#define PORT0_PDISC_PDIS14_Msk (0x4000UL) /*!< PORT0 PDISC: PDIS14 (Bitfield-Mask: 0x01) */ +#define PORT0_PDISC_PDIS15_Pos (15UL) /*!< PORT0 PDISC: PDIS15 (Bit 15) */ +#define PORT0_PDISC_PDIS15_Msk (0x8000UL) /*!< PORT0 PDISC: PDIS15 (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- PORT0_PPS --------------------------------- */ +#define PORT0_PPS_PPS0_Pos (0UL) /*!< PORT0 PPS: PPS0 (Bit 0) */ +#define PORT0_PPS_PPS0_Msk (0x1UL) /*!< PORT0 PPS: PPS0 (Bitfield-Mask: 0x01) */ +#define PORT0_PPS_PPS1_Pos (1UL) /*!< PORT0 PPS: PPS1 (Bit 1) */ +#define PORT0_PPS_PPS1_Msk (0x2UL) /*!< PORT0 PPS: PPS1 (Bitfield-Mask: 0x01) */ +#define PORT0_PPS_PPS2_Pos (2UL) /*!< PORT0 PPS: PPS2 (Bit 2) */ +#define PORT0_PPS_PPS2_Msk (0x4UL) /*!< PORT0 PPS: PPS2 (Bitfield-Mask: 0x01) */ +#define PORT0_PPS_PPS3_Pos (3UL) /*!< PORT0 PPS: PPS3 (Bit 3) */ +#define PORT0_PPS_PPS3_Msk (0x8UL) /*!< PORT0 PPS: PPS3 (Bitfield-Mask: 0x01) */ +#define PORT0_PPS_PPS4_Pos (4UL) /*!< PORT0 PPS: PPS4 (Bit 4) */ +#define PORT0_PPS_PPS4_Msk (0x10UL) /*!< PORT0 PPS: PPS4 (Bitfield-Mask: 0x01) */ +#define PORT0_PPS_PPS5_Pos (5UL) /*!< PORT0 PPS: PPS5 (Bit 5) */ +#define PORT0_PPS_PPS5_Msk (0x20UL) /*!< PORT0 PPS: PPS5 (Bitfield-Mask: 0x01) */ +#define PORT0_PPS_PPS6_Pos (6UL) /*!< PORT0 PPS: PPS6 (Bit 6) */ +#define PORT0_PPS_PPS6_Msk (0x40UL) /*!< PORT0 PPS: PPS6 (Bitfield-Mask: 0x01) */ +#define PORT0_PPS_PPS7_Pos (7UL) /*!< PORT0 PPS: PPS7 (Bit 7) */ +#define PORT0_PPS_PPS7_Msk (0x80UL) /*!< PORT0 PPS: PPS7 (Bitfield-Mask: 0x01) */ +#define PORT0_PPS_PPS8_Pos (8UL) /*!< PORT0 PPS: PPS8 (Bit 8) */ +#define PORT0_PPS_PPS8_Msk (0x100UL) /*!< PORT0 PPS: PPS8 (Bitfield-Mask: 0x01) */ +#define PORT0_PPS_PPS9_Pos (9UL) /*!< PORT0 PPS: PPS9 (Bit 9) */ +#define PORT0_PPS_PPS9_Msk (0x200UL) /*!< PORT0 PPS: PPS9 (Bitfield-Mask: 0x01) */ +#define PORT0_PPS_PPS10_Pos (10UL) /*!< PORT0 PPS: PPS10 (Bit 10) */ +#define PORT0_PPS_PPS10_Msk (0x400UL) /*!< PORT0 PPS: PPS10 (Bitfield-Mask: 0x01) */ +#define PORT0_PPS_PPS11_Pos (11UL) /*!< PORT0 PPS: PPS11 (Bit 11) */ +#define PORT0_PPS_PPS11_Msk (0x800UL) /*!< PORT0 PPS: PPS11 (Bitfield-Mask: 0x01) */ +#define PORT0_PPS_PPS12_Pos (12UL) /*!< PORT0 PPS: PPS12 (Bit 12) */ +#define PORT0_PPS_PPS12_Msk (0x1000UL) /*!< PORT0 PPS: PPS12 (Bitfield-Mask: 0x01) */ +#define PORT0_PPS_PPS13_Pos (13UL) /*!< PORT0 PPS: PPS13 (Bit 13) */ +#define PORT0_PPS_PPS13_Msk (0x2000UL) /*!< PORT0 PPS: PPS13 (Bitfield-Mask: 0x01) */ +#define PORT0_PPS_PPS14_Pos (14UL) /*!< PORT0 PPS: PPS14 (Bit 14) */ +#define PORT0_PPS_PPS14_Msk (0x4000UL) /*!< PORT0 PPS: PPS14 (Bitfield-Mask: 0x01) */ +#define PORT0_PPS_PPS15_Pos (15UL) /*!< PORT0 PPS: PPS15 (Bit 15) */ +#define PORT0_PPS_PPS15_Msk (0x8000UL) /*!< PORT0 PPS: PPS15 (Bitfield-Mask: 0x01) */ + +/* --------------------------------- PORT0_HWSEL -------------------------------- */ +#define PORT0_HWSEL_HW0_Pos (0UL) /*!< PORT0 HWSEL: HW0 (Bit 0) */ +#define PORT0_HWSEL_HW0_Msk (0x3UL) /*!< PORT0 HWSEL: HW0 (Bitfield-Mask: 0x03) */ +#define PORT0_HWSEL_HW1_Pos (2UL) /*!< PORT0 HWSEL: HW1 (Bit 2) */ +#define PORT0_HWSEL_HW1_Msk (0xcUL) /*!< PORT0 HWSEL: HW1 (Bitfield-Mask: 0x03) */ +#define PORT0_HWSEL_HW2_Pos (4UL) /*!< PORT0 HWSEL: HW2 (Bit 4) */ +#define PORT0_HWSEL_HW2_Msk (0x30UL) /*!< PORT0 HWSEL: HW2 (Bitfield-Mask: 0x03) */ +#define PORT0_HWSEL_HW3_Pos (6UL) /*!< PORT0 HWSEL: HW3 (Bit 6) */ +#define PORT0_HWSEL_HW3_Msk (0xc0UL) /*!< PORT0 HWSEL: HW3 (Bitfield-Mask: 0x03) */ +#define PORT0_HWSEL_HW4_Pos (8UL) /*!< PORT0 HWSEL: HW4 (Bit 8) */ +#define PORT0_HWSEL_HW4_Msk (0x300UL) /*!< PORT0 HWSEL: HW4 (Bitfield-Mask: 0x03) */ +#define PORT0_HWSEL_HW5_Pos (10UL) /*!< PORT0 HWSEL: HW5 (Bit 10) */ +#define PORT0_HWSEL_HW5_Msk (0xc00UL) /*!< PORT0 HWSEL: HW5 (Bitfield-Mask: 0x03) */ +#define PORT0_HWSEL_HW6_Pos (12UL) /*!< PORT0 HWSEL: HW6 (Bit 12) */ +#define PORT0_HWSEL_HW6_Msk (0x3000UL) /*!< PORT0 HWSEL: HW6 (Bitfield-Mask: 0x03) */ +#define PORT0_HWSEL_HW7_Pos (14UL) /*!< PORT0 HWSEL: HW7 (Bit 14) */ +#define PORT0_HWSEL_HW7_Msk (0xc000UL) /*!< PORT0 HWSEL: HW7 (Bitfield-Mask: 0x03) */ +#define PORT0_HWSEL_HW8_Pos (16UL) /*!< PORT0 HWSEL: HW8 (Bit 16) */ +#define PORT0_HWSEL_HW8_Msk (0x30000UL) /*!< PORT0 HWSEL: HW8 (Bitfield-Mask: 0x03) */ +#define PORT0_HWSEL_HW9_Pos (18UL) /*!< PORT0 HWSEL: HW9 (Bit 18) */ +#define PORT0_HWSEL_HW9_Msk (0xc0000UL) /*!< PORT0 HWSEL: HW9 (Bitfield-Mask: 0x03) */ +#define PORT0_HWSEL_HW10_Pos (20UL) /*!< PORT0 HWSEL: HW10 (Bit 20) */ +#define PORT0_HWSEL_HW10_Msk (0x300000UL) /*!< PORT0 HWSEL: HW10 (Bitfield-Mask: 0x03) */ +#define PORT0_HWSEL_HW11_Pos (22UL) /*!< PORT0 HWSEL: HW11 (Bit 22) */ +#define PORT0_HWSEL_HW11_Msk (0xc00000UL) /*!< PORT0 HWSEL: HW11 (Bitfield-Mask: 0x03) */ +#define PORT0_HWSEL_HW12_Pos (24UL) /*!< PORT0 HWSEL: HW12 (Bit 24) */ +#define PORT0_HWSEL_HW12_Msk (0x3000000UL) /*!< PORT0 HWSEL: HW12 (Bitfield-Mask: 0x03) */ +#define PORT0_HWSEL_HW13_Pos (26UL) /*!< PORT0 HWSEL: HW13 (Bit 26) */ +#define PORT0_HWSEL_HW13_Msk (0xc000000UL) /*!< PORT0 HWSEL: HW13 (Bitfield-Mask: 0x03) */ +#define PORT0_HWSEL_HW14_Pos (28UL) /*!< PORT0 HWSEL: HW14 (Bit 28) */ +#define PORT0_HWSEL_HW14_Msk (0x30000000UL) /*!< PORT0 HWSEL: HW14 (Bitfield-Mask: 0x03) */ +#define PORT0_HWSEL_HW15_Pos (30UL) /*!< PORT0 HWSEL: HW15 (Bit 30) */ +#define PORT0_HWSEL_HW15_Msk (0xc0000000UL) /*!< PORT0 HWSEL: HW15 (Bitfield-Mask: 0x03) */ + + +/* ================================================================================ */ +/* ================ struct 'PORT1' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ---------------------------------- PORT1_OUT --------------------------------- */ +#define PORT1_OUT_P0_Pos (0UL) /*!< PORT1 OUT: P0 (Bit 0) */ +#define PORT1_OUT_P0_Msk (0x1UL) /*!< PORT1 OUT: P0 (Bitfield-Mask: 0x01) */ +#define PORT1_OUT_P1_Pos (1UL) /*!< PORT1 OUT: P1 (Bit 1) */ +#define PORT1_OUT_P1_Msk (0x2UL) /*!< PORT1 OUT: P1 (Bitfield-Mask: 0x01) */ +#define PORT1_OUT_P2_Pos (2UL) /*!< PORT1 OUT: P2 (Bit 2) */ +#define PORT1_OUT_P2_Msk (0x4UL) /*!< PORT1 OUT: P2 (Bitfield-Mask: 0x01) */ +#define PORT1_OUT_P3_Pos (3UL) /*!< PORT1 OUT: P3 (Bit 3) */ +#define PORT1_OUT_P3_Msk (0x8UL) /*!< PORT1 OUT: P3 (Bitfield-Mask: 0x01) */ +#define PORT1_OUT_P4_Pos (4UL) /*!< PORT1 OUT: P4 (Bit 4) */ +#define PORT1_OUT_P4_Msk (0x10UL) /*!< PORT1 OUT: P4 (Bitfield-Mask: 0x01) */ +#define PORT1_OUT_P5_Pos (5UL) /*!< PORT1 OUT: P5 (Bit 5) */ +#define PORT1_OUT_P5_Msk (0x20UL) /*!< PORT1 OUT: P5 (Bitfield-Mask: 0x01) */ +#define PORT1_OUT_P6_Pos (6UL) /*!< PORT1 OUT: P6 (Bit 6) */ +#define PORT1_OUT_P6_Msk (0x40UL) /*!< PORT1 OUT: P6 (Bitfield-Mask: 0x01) */ +#define PORT1_OUT_P7_Pos (7UL) /*!< PORT1 OUT: P7 (Bit 7) */ +#define PORT1_OUT_P7_Msk (0x80UL) /*!< PORT1 OUT: P7 (Bitfield-Mask: 0x01) */ +#define PORT1_OUT_P8_Pos (8UL) /*!< PORT1 OUT: P8 (Bit 8) */ +#define PORT1_OUT_P8_Msk (0x100UL) /*!< PORT1 OUT: P8 (Bitfield-Mask: 0x01) */ +#define PORT1_OUT_P9_Pos (9UL) /*!< PORT1 OUT: P9 (Bit 9) */ +#define PORT1_OUT_P9_Msk (0x200UL) /*!< PORT1 OUT: P9 (Bitfield-Mask: 0x01) */ +#define PORT1_OUT_P10_Pos (10UL) /*!< PORT1 OUT: P10 (Bit 10) */ +#define PORT1_OUT_P10_Msk (0x400UL) /*!< PORT1 OUT: P10 (Bitfield-Mask: 0x01) */ +#define PORT1_OUT_P11_Pos (11UL) /*!< PORT1 OUT: P11 (Bit 11) */ +#define PORT1_OUT_P11_Msk (0x800UL) /*!< PORT1 OUT: P11 (Bitfield-Mask: 0x01) */ +#define PORT1_OUT_P12_Pos (12UL) /*!< PORT1 OUT: P12 (Bit 12) */ +#define PORT1_OUT_P12_Msk (0x1000UL) /*!< PORT1 OUT: P12 (Bitfield-Mask: 0x01) */ +#define PORT1_OUT_P13_Pos (13UL) /*!< PORT1 OUT: P13 (Bit 13) */ +#define PORT1_OUT_P13_Msk (0x2000UL) /*!< PORT1 OUT: P13 (Bitfield-Mask: 0x01) */ +#define PORT1_OUT_P14_Pos (14UL) /*!< PORT1 OUT: P14 (Bit 14) */ +#define PORT1_OUT_P14_Msk (0x4000UL) /*!< PORT1 OUT: P14 (Bitfield-Mask: 0x01) */ +#define PORT1_OUT_P15_Pos (15UL) /*!< PORT1 OUT: P15 (Bit 15) */ +#define PORT1_OUT_P15_Msk (0x8000UL) /*!< PORT1 OUT: P15 (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- PORT1_OMR --------------------------------- */ +#define PORT1_OMR_PS0_Pos (0UL) /*!< PORT1 OMR: PS0 (Bit 0) */ +#define PORT1_OMR_PS0_Msk (0x1UL) /*!< PORT1 OMR: PS0 (Bitfield-Mask: 0x01) */ +#define PORT1_OMR_PS1_Pos (1UL) /*!< PORT1 OMR: PS1 (Bit 1) */ +#define PORT1_OMR_PS1_Msk (0x2UL) /*!< PORT1 OMR: PS1 (Bitfield-Mask: 0x01) */ +#define PORT1_OMR_PS2_Pos (2UL) /*!< PORT1 OMR: PS2 (Bit 2) */ +#define PORT1_OMR_PS2_Msk (0x4UL) /*!< PORT1 OMR: PS2 (Bitfield-Mask: 0x01) */ +#define PORT1_OMR_PS3_Pos (3UL) /*!< PORT1 OMR: PS3 (Bit 3) */ +#define PORT1_OMR_PS3_Msk (0x8UL) /*!< PORT1 OMR: PS3 (Bitfield-Mask: 0x01) */ +#define PORT1_OMR_PS4_Pos (4UL) /*!< PORT1 OMR: PS4 (Bit 4) */ +#define PORT1_OMR_PS4_Msk (0x10UL) /*!< PORT1 OMR: PS4 (Bitfield-Mask: 0x01) */ +#define PORT1_OMR_PS5_Pos (5UL) /*!< PORT1 OMR: PS5 (Bit 5) */ +#define PORT1_OMR_PS5_Msk (0x20UL) /*!< PORT1 OMR: PS5 (Bitfield-Mask: 0x01) */ +#define PORT1_OMR_PS6_Pos (6UL) /*!< PORT1 OMR: PS6 (Bit 6) */ +#define PORT1_OMR_PS6_Msk (0x40UL) /*!< PORT1 OMR: PS6 (Bitfield-Mask: 0x01) */ +#define PORT1_OMR_PS7_Pos (7UL) /*!< PORT1 OMR: PS7 (Bit 7) */ +#define PORT1_OMR_PS7_Msk (0x80UL) /*!< PORT1 OMR: PS7 (Bitfield-Mask: 0x01) */ +#define PORT1_OMR_PS8_Pos (8UL) /*!< PORT1 OMR: PS8 (Bit 8) */ +#define PORT1_OMR_PS8_Msk (0x100UL) /*!< PORT1 OMR: PS8 (Bitfield-Mask: 0x01) */ +#define PORT1_OMR_PS9_Pos (9UL) /*!< PORT1 OMR: PS9 (Bit 9) */ +#define PORT1_OMR_PS9_Msk (0x200UL) /*!< PORT1 OMR: PS9 (Bitfield-Mask: 0x01) */ +#define PORT1_OMR_PS10_Pos (10UL) /*!< PORT1 OMR: PS10 (Bit 10) */ +#define PORT1_OMR_PS10_Msk (0x400UL) /*!< PORT1 OMR: PS10 (Bitfield-Mask: 0x01) */ +#define PORT1_OMR_PS11_Pos (11UL) /*!< PORT1 OMR: PS11 (Bit 11) */ +#define PORT1_OMR_PS11_Msk (0x800UL) /*!< PORT1 OMR: PS11 (Bitfield-Mask: 0x01) */ +#define PORT1_OMR_PS12_Pos (12UL) /*!< PORT1 OMR: PS12 (Bit 12) */ +#define PORT1_OMR_PS12_Msk (0x1000UL) /*!< PORT1 OMR: PS12 (Bitfield-Mask: 0x01) */ +#define PORT1_OMR_PS13_Pos (13UL) /*!< PORT1 OMR: PS13 (Bit 13) */ +#define PORT1_OMR_PS13_Msk (0x2000UL) /*!< PORT1 OMR: PS13 (Bitfield-Mask: 0x01) */ +#define PORT1_OMR_PS14_Pos (14UL) /*!< PORT1 OMR: PS14 (Bit 14) */ +#define PORT1_OMR_PS14_Msk (0x4000UL) /*!< PORT1 OMR: PS14 (Bitfield-Mask: 0x01) */ +#define PORT1_OMR_PS15_Pos (15UL) /*!< PORT1 OMR: PS15 (Bit 15) */ +#define PORT1_OMR_PS15_Msk (0x8000UL) /*!< PORT1 OMR: PS15 (Bitfield-Mask: 0x01) */ +#define PORT1_OMR_PR0_Pos (16UL) /*!< PORT1 OMR: PR0 (Bit 16) */ +#define PORT1_OMR_PR0_Msk (0x10000UL) /*!< PORT1 OMR: PR0 (Bitfield-Mask: 0x01) */ +#define PORT1_OMR_PR1_Pos (17UL) /*!< PORT1 OMR: PR1 (Bit 17) */ +#define PORT1_OMR_PR1_Msk (0x20000UL) /*!< PORT1 OMR: PR1 (Bitfield-Mask: 0x01) */ +#define PORT1_OMR_PR2_Pos (18UL) /*!< PORT1 OMR: PR2 (Bit 18) */ +#define PORT1_OMR_PR2_Msk (0x40000UL) /*!< PORT1 OMR: PR2 (Bitfield-Mask: 0x01) */ +#define PORT1_OMR_PR3_Pos (19UL) /*!< PORT1 OMR: PR3 (Bit 19) */ +#define PORT1_OMR_PR3_Msk (0x80000UL) /*!< PORT1 OMR: PR3 (Bitfield-Mask: 0x01) */ +#define PORT1_OMR_PR4_Pos (20UL) /*!< PORT1 OMR: PR4 (Bit 20) */ +#define PORT1_OMR_PR4_Msk (0x100000UL) /*!< PORT1 OMR: PR4 (Bitfield-Mask: 0x01) */ +#define PORT1_OMR_PR5_Pos (21UL) /*!< PORT1 OMR: PR5 (Bit 21) */ +#define PORT1_OMR_PR5_Msk (0x200000UL) /*!< PORT1 OMR: PR5 (Bitfield-Mask: 0x01) */ +#define PORT1_OMR_PR6_Pos (22UL) /*!< PORT1 OMR: PR6 (Bit 22) */ +#define PORT1_OMR_PR6_Msk (0x400000UL) /*!< PORT1 OMR: PR6 (Bitfield-Mask: 0x01) */ +#define PORT1_OMR_PR7_Pos (23UL) /*!< PORT1 OMR: PR7 (Bit 23) */ +#define PORT1_OMR_PR7_Msk (0x800000UL) /*!< PORT1 OMR: PR7 (Bitfield-Mask: 0x01) */ +#define PORT1_OMR_PR8_Pos (24UL) /*!< PORT1 OMR: PR8 (Bit 24) */ +#define PORT1_OMR_PR8_Msk (0x1000000UL) /*!< PORT1 OMR: PR8 (Bitfield-Mask: 0x01) */ +#define PORT1_OMR_PR9_Pos (25UL) /*!< PORT1 OMR: PR9 (Bit 25) */ +#define PORT1_OMR_PR9_Msk (0x2000000UL) /*!< PORT1 OMR: PR9 (Bitfield-Mask: 0x01) */ +#define PORT1_OMR_PR10_Pos (26UL) /*!< PORT1 OMR: PR10 (Bit 26) */ +#define PORT1_OMR_PR10_Msk (0x4000000UL) /*!< PORT1 OMR: PR10 (Bitfield-Mask: 0x01) */ +#define PORT1_OMR_PR11_Pos (27UL) /*!< PORT1 OMR: PR11 (Bit 27) */ +#define PORT1_OMR_PR11_Msk (0x8000000UL) /*!< PORT1 OMR: PR11 (Bitfield-Mask: 0x01) */ +#define PORT1_OMR_PR12_Pos (28UL) /*!< PORT1 OMR: PR12 (Bit 28) */ +#define PORT1_OMR_PR12_Msk (0x10000000UL) /*!< PORT1 OMR: PR12 (Bitfield-Mask: 0x01) */ +#define PORT1_OMR_PR13_Pos (29UL) /*!< PORT1 OMR: PR13 (Bit 29) */ +#define PORT1_OMR_PR13_Msk (0x20000000UL) /*!< PORT1 OMR: PR13 (Bitfield-Mask: 0x01) */ +#define PORT1_OMR_PR14_Pos (30UL) /*!< PORT1 OMR: PR14 (Bit 30) */ +#define PORT1_OMR_PR14_Msk (0x40000000UL) /*!< PORT1 OMR: PR14 (Bitfield-Mask: 0x01) */ +#define PORT1_OMR_PR15_Pos (31UL) /*!< PORT1 OMR: PR15 (Bit 31) */ +#define PORT1_OMR_PR15_Msk (0x80000000UL) /*!< PORT1 OMR: PR15 (Bitfield-Mask: 0x01) */ + +/* --------------------------------- PORT1_IOCR0 -------------------------------- */ +#define PORT1_IOCR0_PC0_Pos (3UL) /*!< PORT1 IOCR0: PC0 (Bit 3) */ +#define PORT1_IOCR0_PC0_Msk (0xf8UL) /*!< PORT1 IOCR0: PC0 (Bitfield-Mask: 0x1f) */ +#define PORT1_IOCR0_PC1_Pos (11UL) /*!< PORT1 IOCR0: PC1 (Bit 11) */ +#define PORT1_IOCR0_PC1_Msk (0xf800UL) /*!< PORT1 IOCR0: PC1 (Bitfield-Mask: 0x1f) */ +#define PORT1_IOCR0_PC2_Pos (19UL) /*!< PORT1 IOCR0: PC2 (Bit 19) */ +#define PORT1_IOCR0_PC2_Msk (0xf80000UL) /*!< PORT1 IOCR0: PC2 (Bitfield-Mask: 0x1f) */ +#define PORT1_IOCR0_PC3_Pos (27UL) /*!< PORT1 IOCR0: PC3 (Bit 27) */ +#define PORT1_IOCR0_PC3_Msk (0xf8000000UL) /*!< PORT1 IOCR0: PC3 (Bitfield-Mask: 0x1f) */ + +/* --------------------------------- PORT1_IOCR4 -------------------------------- */ +#define PORT1_IOCR4_PC4_Pos (3UL) /*!< PORT1 IOCR4: PC4 (Bit 3) */ +#define PORT1_IOCR4_PC4_Msk (0xf8UL) /*!< PORT1 IOCR4: PC4 (Bitfield-Mask: 0x1f) */ +#define PORT1_IOCR4_PC5_Pos (11UL) /*!< PORT1 IOCR4: PC5 (Bit 11) */ +#define PORT1_IOCR4_PC5_Msk (0xf800UL) /*!< PORT1 IOCR4: PC5 (Bitfield-Mask: 0x1f) */ +#define PORT1_IOCR4_PC6_Pos (19UL) /*!< PORT1 IOCR4: PC6 (Bit 19) */ +#define PORT1_IOCR4_PC6_Msk (0xf80000UL) /*!< PORT1 IOCR4: PC6 (Bitfield-Mask: 0x1f) */ +#define PORT1_IOCR4_PC7_Pos (27UL) /*!< PORT1 IOCR4: PC7 (Bit 27) */ +#define PORT1_IOCR4_PC7_Msk (0xf8000000UL) /*!< PORT1 IOCR4: PC7 (Bitfield-Mask: 0x1f) */ + +/* --------------------------------- PORT1_IOCR8 -------------------------------- */ +#define PORT1_IOCR8_PC8_Pos (3UL) /*!< PORT1 IOCR8: PC8 (Bit 3) */ +#define PORT1_IOCR8_PC8_Msk (0xf8UL) /*!< PORT1 IOCR8: PC8 (Bitfield-Mask: 0x1f) */ +#define PORT1_IOCR8_PC9_Pos (11UL) /*!< PORT1 IOCR8: PC9 (Bit 11) */ +#define PORT1_IOCR8_PC9_Msk (0xf800UL) /*!< PORT1 IOCR8: PC9 (Bitfield-Mask: 0x1f) */ +#define PORT1_IOCR8_PC10_Pos (19UL) /*!< PORT1 IOCR8: PC10 (Bit 19) */ +#define PORT1_IOCR8_PC10_Msk (0xf80000UL) /*!< PORT1 IOCR8: PC10 (Bitfield-Mask: 0x1f) */ +#define PORT1_IOCR8_PC11_Pos (27UL) /*!< PORT1 IOCR8: PC11 (Bit 27) */ +#define PORT1_IOCR8_PC11_Msk (0xf8000000UL) /*!< PORT1 IOCR8: PC11 (Bitfield-Mask: 0x1f) */ + +/* -------------------------------- PORT1_IOCR12 -------------------------------- */ +#define PORT1_IOCR12_PC12_Pos (3UL) /*!< PORT1 IOCR12: PC12 (Bit 3) */ +#define PORT1_IOCR12_PC12_Msk (0xf8UL) /*!< PORT1 IOCR12: PC12 (Bitfield-Mask: 0x1f) */ +#define PORT1_IOCR12_PC13_Pos (11UL) /*!< PORT1 IOCR12: PC13 (Bit 11) */ +#define PORT1_IOCR12_PC13_Msk (0xf800UL) /*!< PORT1 IOCR12: PC13 (Bitfield-Mask: 0x1f) */ +#define PORT1_IOCR12_PC14_Pos (19UL) /*!< PORT1 IOCR12: PC14 (Bit 19) */ +#define PORT1_IOCR12_PC14_Msk (0xf80000UL) /*!< PORT1 IOCR12: PC14 (Bitfield-Mask: 0x1f) */ +#define PORT1_IOCR12_PC15_Pos (27UL) /*!< PORT1 IOCR12: PC15 (Bit 27) */ +#define PORT1_IOCR12_PC15_Msk (0xf8000000UL) /*!< PORT1 IOCR12: PC15 (Bitfield-Mask: 0x1f) */ + +/* ---------------------------------- PORT1_IN ---------------------------------- */ +#define PORT1_IN_P0_Pos (0UL) /*!< PORT1 IN: P0 (Bit 0) */ +#define PORT1_IN_P0_Msk (0x1UL) /*!< PORT1 IN: P0 (Bitfield-Mask: 0x01) */ +#define PORT1_IN_P1_Pos (1UL) /*!< PORT1 IN: P1 (Bit 1) */ +#define PORT1_IN_P1_Msk (0x2UL) /*!< PORT1 IN: P1 (Bitfield-Mask: 0x01) */ +#define PORT1_IN_P2_Pos (2UL) /*!< PORT1 IN: P2 (Bit 2) */ +#define PORT1_IN_P2_Msk (0x4UL) /*!< PORT1 IN: P2 (Bitfield-Mask: 0x01) */ +#define PORT1_IN_P3_Pos (3UL) /*!< PORT1 IN: P3 (Bit 3) */ +#define PORT1_IN_P3_Msk (0x8UL) /*!< PORT1 IN: P3 (Bitfield-Mask: 0x01) */ +#define PORT1_IN_P4_Pos (4UL) /*!< PORT1 IN: P4 (Bit 4) */ +#define PORT1_IN_P4_Msk (0x10UL) /*!< PORT1 IN: P4 (Bitfield-Mask: 0x01) */ +#define PORT1_IN_P5_Pos (5UL) /*!< PORT1 IN: P5 (Bit 5) */ +#define PORT1_IN_P5_Msk (0x20UL) /*!< PORT1 IN: P5 (Bitfield-Mask: 0x01) */ +#define PORT1_IN_P6_Pos (6UL) /*!< PORT1 IN: P6 (Bit 6) */ +#define PORT1_IN_P6_Msk (0x40UL) /*!< PORT1 IN: P6 (Bitfield-Mask: 0x01) */ +#define PORT1_IN_P7_Pos (7UL) /*!< PORT1 IN: P7 (Bit 7) */ +#define PORT1_IN_P7_Msk (0x80UL) /*!< PORT1 IN: P7 (Bitfield-Mask: 0x01) */ +#define PORT1_IN_P8_Pos (8UL) /*!< PORT1 IN: P8 (Bit 8) */ +#define PORT1_IN_P8_Msk (0x100UL) /*!< PORT1 IN: P8 (Bitfield-Mask: 0x01) */ +#define PORT1_IN_P9_Pos (9UL) /*!< PORT1 IN: P9 (Bit 9) */ +#define PORT1_IN_P9_Msk (0x200UL) /*!< PORT1 IN: P9 (Bitfield-Mask: 0x01) */ +#define PORT1_IN_P10_Pos (10UL) /*!< PORT1 IN: P10 (Bit 10) */ +#define PORT1_IN_P10_Msk (0x400UL) /*!< PORT1 IN: P10 (Bitfield-Mask: 0x01) */ +#define PORT1_IN_P11_Pos (11UL) /*!< PORT1 IN: P11 (Bit 11) */ +#define PORT1_IN_P11_Msk (0x800UL) /*!< PORT1 IN: P11 (Bitfield-Mask: 0x01) */ +#define PORT1_IN_P12_Pos (12UL) /*!< PORT1 IN: P12 (Bit 12) */ +#define PORT1_IN_P12_Msk (0x1000UL) /*!< PORT1 IN: P12 (Bitfield-Mask: 0x01) */ +#define PORT1_IN_P13_Pos (13UL) /*!< PORT1 IN: P13 (Bit 13) */ +#define PORT1_IN_P13_Msk (0x2000UL) /*!< PORT1 IN: P13 (Bitfield-Mask: 0x01) */ +#define PORT1_IN_P14_Pos (14UL) /*!< PORT1 IN: P14 (Bit 14) */ +#define PORT1_IN_P14_Msk (0x4000UL) /*!< PORT1 IN: P14 (Bitfield-Mask: 0x01) */ +#define PORT1_IN_P15_Pos (15UL) /*!< PORT1 IN: P15 (Bit 15) */ +#define PORT1_IN_P15_Msk (0x8000UL) /*!< PORT1 IN: P15 (Bitfield-Mask: 0x01) */ + +/* --------------------------------- PORT1_PDR0 --------------------------------- */ +#define PORT1_PDR0_PD0_Pos (0UL) /*!< PORT1 PDR0: PD0 (Bit 0) */ +#define PORT1_PDR0_PD0_Msk (0x7UL) /*!< PORT1 PDR0: PD0 (Bitfield-Mask: 0x07) */ +#define PORT1_PDR0_PD1_Pos (4UL) /*!< PORT1 PDR0: PD1 (Bit 4) */ +#define PORT1_PDR0_PD1_Msk (0x70UL) /*!< PORT1 PDR0: PD1 (Bitfield-Mask: 0x07) */ +#define PORT1_PDR0_PD2_Pos (8UL) /*!< PORT1 PDR0: PD2 (Bit 8) */ +#define PORT1_PDR0_PD2_Msk (0x700UL) /*!< PORT1 PDR0: PD2 (Bitfield-Mask: 0x07) */ +#define PORT1_PDR0_PD3_Pos (12UL) /*!< PORT1 PDR0: PD3 (Bit 12) */ +#define PORT1_PDR0_PD3_Msk (0x7000UL) /*!< PORT1 PDR0: PD3 (Bitfield-Mask: 0x07) */ +#define PORT1_PDR0_PD4_Pos (16UL) /*!< PORT1 PDR0: PD4 (Bit 16) */ +#define PORT1_PDR0_PD4_Msk (0x70000UL) /*!< PORT1 PDR0: PD4 (Bitfield-Mask: 0x07) */ +#define PORT1_PDR0_PD5_Pos (20UL) /*!< PORT1 PDR0: PD5 (Bit 20) */ +#define PORT1_PDR0_PD5_Msk (0x700000UL) /*!< PORT1 PDR0: PD5 (Bitfield-Mask: 0x07) */ +#define PORT1_PDR0_PD6_Pos (24UL) /*!< PORT1 PDR0: PD6 (Bit 24) */ +#define PORT1_PDR0_PD6_Msk (0x7000000UL) /*!< PORT1 PDR0: PD6 (Bitfield-Mask: 0x07) */ +#define PORT1_PDR0_PD7_Pos (28UL) /*!< PORT1 PDR0: PD7 (Bit 28) */ +#define PORT1_PDR0_PD7_Msk (0x70000000UL) /*!< PORT1 PDR0: PD7 (Bitfield-Mask: 0x07) */ + +/* --------------------------------- PORT1_PDR1 --------------------------------- */ +#define PORT1_PDR1_PD8_Pos (0UL) /*!< PORT1 PDR1: PD8 (Bit 0) */ +#define PORT1_PDR1_PD8_Msk (0x7UL) /*!< PORT1 PDR1: PD8 (Bitfield-Mask: 0x07) */ +#define PORT1_PDR1_PD9_Pos (4UL) /*!< PORT1 PDR1: PD9 (Bit 4) */ +#define PORT1_PDR1_PD9_Msk (0x70UL) /*!< PORT1 PDR1: PD9 (Bitfield-Mask: 0x07) */ +#define PORT1_PDR1_PD10_Pos (8UL) /*!< PORT1 PDR1: PD10 (Bit 8) */ +#define PORT1_PDR1_PD10_Msk (0x700UL) /*!< PORT1 PDR1: PD10 (Bitfield-Mask: 0x07) */ +#define PORT1_PDR1_PD11_Pos (12UL) /*!< PORT1 PDR1: PD11 (Bit 12) */ +#define PORT1_PDR1_PD11_Msk (0x7000UL) /*!< PORT1 PDR1: PD11 (Bitfield-Mask: 0x07) */ +#define PORT1_PDR1_PD12_Pos (16UL) /*!< PORT1 PDR1: PD12 (Bit 16) */ +#define PORT1_PDR1_PD12_Msk (0x70000UL) /*!< PORT1 PDR1: PD12 (Bitfield-Mask: 0x07) */ +#define PORT1_PDR1_PD13_Pos (20UL) /*!< PORT1 PDR1: PD13 (Bit 20) */ +#define PORT1_PDR1_PD13_Msk (0x700000UL) /*!< PORT1 PDR1: PD13 (Bitfield-Mask: 0x07) */ +#define PORT1_PDR1_PD14_Pos (24UL) /*!< PORT1 PDR1: PD14 (Bit 24) */ +#define PORT1_PDR1_PD14_Msk (0x7000000UL) /*!< PORT1 PDR1: PD14 (Bitfield-Mask: 0x07) */ +#define PORT1_PDR1_PD15_Pos (28UL) /*!< PORT1 PDR1: PD15 (Bit 28) */ +#define PORT1_PDR1_PD15_Msk (0x70000000UL) /*!< PORT1 PDR1: PD15 (Bitfield-Mask: 0x07) */ + +/* --------------------------------- PORT1_PDISC -------------------------------- */ +#define PORT1_PDISC_PDIS0_Pos (0UL) /*!< PORT1 PDISC: PDIS0 (Bit 0) */ +#define PORT1_PDISC_PDIS0_Msk (0x1UL) /*!< PORT1 PDISC: PDIS0 (Bitfield-Mask: 0x01) */ +#define PORT1_PDISC_PDIS1_Pos (1UL) /*!< PORT1 PDISC: PDIS1 (Bit 1) */ +#define PORT1_PDISC_PDIS1_Msk (0x2UL) /*!< PORT1 PDISC: PDIS1 (Bitfield-Mask: 0x01) */ +#define PORT1_PDISC_PDIS2_Pos (2UL) /*!< PORT1 PDISC: PDIS2 (Bit 2) */ +#define PORT1_PDISC_PDIS2_Msk (0x4UL) /*!< PORT1 PDISC: PDIS2 (Bitfield-Mask: 0x01) */ +#define PORT1_PDISC_PDIS3_Pos (3UL) /*!< PORT1 PDISC: PDIS3 (Bit 3) */ +#define PORT1_PDISC_PDIS3_Msk (0x8UL) /*!< PORT1 PDISC: PDIS3 (Bitfield-Mask: 0x01) */ +#define PORT1_PDISC_PDIS4_Pos (4UL) /*!< PORT1 PDISC: PDIS4 (Bit 4) */ +#define PORT1_PDISC_PDIS4_Msk (0x10UL) /*!< PORT1 PDISC: PDIS4 (Bitfield-Mask: 0x01) */ +#define PORT1_PDISC_PDIS5_Pos (5UL) /*!< PORT1 PDISC: PDIS5 (Bit 5) */ +#define PORT1_PDISC_PDIS5_Msk (0x20UL) /*!< PORT1 PDISC: PDIS5 (Bitfield-Mask: 0x01) */ +#define PORT1_PDISC_PDIS6_Pos (6UL) /*!< PORT1 PDISC: PDIS6 (Bit 6) */ +#define PORT1_PDISC_PDIS6_Msk (0x40UL) /*!< PORT1 PDISC: PDIS6 (Bitfield-Mask: 0x01) */ +#define PORT1_PDISC_PDIS7_Pos (7UL) /*!< PORT1 PDISC: PDIS7 (Bit 7) */ +#define PORT1_PDISC_PDIS7_Msk (0x80UL) /*!< PORT1 PDISC: PDIS7 (Bitfield-Mask: 0x01) */ +#define PORT1_PDISC_PDIS8_Pos (8UL) /*!< PORT1 PDISC: PDIS8 (Bit 8) */ +#define PORT1_PDISC_PDIS8_Msk (0x100UL) /*!< PORT1 PDISC: PDIS8 (Bitfield-Mask: 0x01) */ +#define PORT1_PDISC_PDIS9_Pos (9UL) /*!< PORT1 PDISC: PDIS9 (Bit 9) */ +#define PORT1_PDISC_PDIS9_Msk (0x200UL) /*!< PORT1 PDISC: PDIS9 (Bitfield-Mask: 0x01) */ +#define PORT1_PDISC_PDIS10_Pos (10UL) /*!< PORT1 PDISC: PDIS10 (Bit 10) */ +#define PORT1_PDISC_PDIS10_Msk (0x400UL) /*!< PORT1 PDISC: PDIS10 (Bitfield-Mask: 0x01) */ +#define PORT1_PDISC_PDIS11_Pos (11UL) /*!< PORT1 PDISC: PDIS11 (Bit 11) */ +#define PORT1_PDISC_PDIS11_Msk (0x800UL) /*!< PORT1 PDISC: PDIS11 (Bitfield-Mask: 0x01) */ +#define PORT1_PDISC_PDIS12_Pos (12UL) /*!< PORT1 PDISC: PDIS12 (Bit 12) */ +#define PORT1_PDISC_PDIS12_Msk (0x1000UL) /*!< PORT1 PDISC: PDIS12 (Bitfield-Mask: 0x01) */ +#define PORT1_PDISC_PDIS13_Pos (13UL) /*!< PORT1 PDISC: PDIS13 (Bit 13) */ +#define PORT1_PDISC_PDIS13_Msk (0x2000UL) /*!< PORT1 PDISC: PDIS13 (Bitfield-Mask: 0x01) */ +#define PORT1_PDISC_PDIS14_Pos (14UL) /*!< PORT1 PDISC: PDIS14 (Bit 14) */ +#define PORT1_PDISC_PDIS14_Msk (0x4000UL) /*!< PORT1 PDISC: PDIS14 (Bitfield-Mask: 0x01) */ +#define PORT1_PDISC_PDIS15_Pos (15UL) /*!< PORT1 PDISC: PDIS15 (Bit 15) */ +#define PORT1_PDISC_PDIS15_Msk (0x8000UL) /*!< PORT1 PDISC: PDIS15 (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- PORT1_PPS --------------------------------- */ +#define PORT1_PPS_PPS0_Pos (0UL) /*!< PORT1 PPS: PPS0 (Bit 0) */ +#define PORT1_PPS_PPS0_Msk (0x1UL) /*!< PORT1 PPS: PPS0 (Bitfield-Mask: 0x01) */ +#define PORT1_PPS_PPS1_Pos (1UL) /*!< PORT1 PPS: PPS1 (Bit 1) */ +#define PORT1_PPS_PPS1_Msk (0x2UL) /*!< PORT1 PPS: PPS1 (Bitfield-Mask: 0x01) */ +#define PORT1_PPS_PPS2_Pos (2UL) /*!< PORT1 PPS: PPS2 (Bit 2) */ +#define PORT1_PPS_PPS2_Msk (0x4UL) /*!< PORT1 PPS: PPS2 (Bitfield-Mask: 0x01) */ +#define PORT1_PPS_PPS3_Pos (3UL) /*!< PORT1 PPS: PPS3 (Bit 3) */ +#define PORT1_PPS_PPS3_Msk (0x8UL) /*!< PORT1 PPS: PPS3 (Bitfield-Mask: 0x01) */ +#define PORT1_PPS_PPS4_Pos (4UL) /*!< PORT1 PPS: PPS4 (Bit 4) */ +#define PORT1_PPS_PPS4_Msk (0x10UL) /*!< PORT1 PPS: PPS4 (Bitfield-Mask: 0x01) */ +#define PORT1_PPS_PPS5_Pos (5UL) /*!< PORT1 PPS: PPS5 (Bit 5) */ +#define PORT1_PPS_PPS5_Msk (0x20UL) /*!< PORT1 PPS: PPS5 (Bitfield-Mask: 0x01) */ +#define PORT1_PPS_PPS6_Pos (6UL) /*!< PORT1 PPS: PPS6 (Bit 6) */ +#define PORT1_PPS_PPS6_Msk (0x40UL) /*!< PORT1 PPS: PPS6 (Bitfield-Mask: 0x01) */ +#define PORT1_PPS_PPS7_Pos (7UL) /*!< PORT1 PPS: PPS7 (Bit 7) */ +#define PORT1_PPS_PPS7_Msk (0x80UL) /*!< PORT1 PPS: PPS7 (Bitfield-Mask: 0x01) */ +#define PORT1_PPS_PPS8_Pos (8UL) /*!< PORT1 PPS: PPS8 (Bit 8) */ +#define PORT1_PPS_PPS8_Msk (0x100UL) /*!< PORT1 PPS: PPS8 (Bitfield-Mask: 0x01) */ +#define PORT1_PPS_PPS9_Pos (9UL) /*!< PORT1 PPS: PPS9 (Bit 9) */ +#define PORT1_PPS_PPS9_Msk (0x200UL) /*!< PORT1 PPS: PPS9 (Bitfield-Mask: 0x01) */ +#define PORT1_PPS_PPS10_Pos (10UL) /*!< PORT1 PPS: PPS10 (Bit 10) */ +#define PORT1_PPS_PPS10_Msk (0x400UL) /*!< PORT1 PPS: PPS10 (Bitfield-Mask: 0x01) */ +#define PORT1_PPS_PPS11_Pos (11UL) /*!< PORT1 PPS: PPS11 (Bit 11) */ +#define PORT1_PPS_PPS11_Msk (0x800UL) /*!< PORT1 PPS: PPS11 (Bitfield-Mask: 0x01) */ +#define PORT1_PPS_PPS12_Pos (12UL) /*!< PORT1 PPS: PPS12 (Bit 12) */ +#define PORT1_PPS_PPS12_Msk (0x1000UL) /*!< PORT1 PPS: PPS12 (Bitfield-Mask: 0x01) */ +#define PORT1_PPS_PPS13_Pos (13UL) /*!< PORT1 PPS: PPS13 (Bit 13) */ +#define PORT1_PPS_PPS13_Msk (0x2000UL) /*!< PORT1 PPS: PPS13 (Bitfield-Mask: 0x01) */ +#define PORT1_PPS_PPS14_Pos (14UL) /*!< PORT1 PPS: PPS14 (Bit 14) */ +#define PORT1_PPS_PPS14_Msk (0x4000UL) /*!< PORT1 PPS: PPS14 (Bitfield-Mask: 0x01) */ +#define PORT1_PPS_PPS15_Pos (15UL) /*!< PORT1 PPS: PPS15 (Bit 15) */ +#define PORT1_PPS_PPS15_Msk (0x8000UL) /*!< PORT1 PPS: PPS15 (Bitfield-Mask: 0x01) */ + +/* --------------------------------- PORT1_HWSEL -------------------------------- */ +#define PORT1_HWSEL_HW0_Pos (0UL) /*!< PORT1 HWSEL: HW0 (Bit 0) */ +#define PORT1_HWSEL_HW0_Msk (0x3UL) /*!< PORT1 HWSEL: HW0 (Bitfield-Mask: 0x03) */ +#define PORT1_HWSEL_HW1_Pos (2UL) /*!< PORT1 HWSEL: HW1 (Bit 2) */ +#define PORT1_HWSEL_HW1_Msk (0xcUL) /*!< PORT1 HWSEL: HW1 (Bitfield-Mask: 0x03) */ +#define PORT1_HWSEL_HW2_Pos (4UL) /*!< PORT1 HWSEL: HW2 (Bit 4) */ +#define PORT1_HWSEL_HW2_Msk (0x30UL) /*!< PORT1 HWSEL: HW2 (Bitfield-Mask: 0x03) */ +#define PORT1_HWSEL_HW3_Pos (6UL) /*!< PORT1 HWSEL: HW3 (Bit 6) */ +#define PORT1_HWSEL_HW3_Msk (0xc0UL) /*!< PORT1 HWSEL: HW3 (Bitfield-Mask: 0x03) */ +#define PORT1_HWSEL_HW4_Pos (8UL) /*!< PORT1 HWSEL: HW4 (Bit 8) */ +#define PORT1_HWSEL_HW4_Msk (0x300UL) /*!< PORT1 HWSEL: HW4 (Bitfield-Mask: 0x03) */ +#define PORT1_HWSEL_HW5_Pos (10UL) /*!< PORT1 HWSEL: HW5 (Bit 10) */ +#define PORT1_HWSEL_HW5_Msk (0xc00UL) /*!< PORT1 HWSEL: HW5 (Bitfield-Mask: 0x03) */ +#define PORT1_HWSEL_HW6_Pos (12UL) /*!< PORT1 HWSEL: HW6 (Bit 12) */ +#define PORT1_HWSEL_HW6_Msk (0x3000UL) /*!< PORT1 HWSEL: HW6 (Bitfield-Mask: 0x03) */ +#define PORT1_HWSEL_HW7_Pos (14UL) /*!< PORT1 HWSEL: HW7 (Bit 14) */ +#define PORT1_HWSEL_HW7_Msk (0xc000UL) /*!< PORT1 HWSEL: HW7 (Bitfield-Mask: 0x03) */ +#define PORT1_HWSEL_HW8_Pos (16UL) /*!< PORT1 HWSEL: HW8 (Bit 16) */ +#define PORT1_HWSEL_HW8_Msk (0x30000UL) /*!< PORT1 HWSEL: HW8 (Bitfield-Mask: 0x03) */ +#define PORT1_HWSEL_HW9_Pos (18UL) /*!< PORT1 HWSEL: HW9 (Bit 18) */ +#define PORT1_HWSEL_HW9_Msk (0xc0000UL) /*!< PORT1 HWSEL: HW9 (Bitfield-Mask: 0x03) */ +#define PORT1_HWSEL_HW10_Pos (20UL) /*!< PORT1 HWSEL: HW10 (Bit 20) */ +#define PORT1_HWSEL_HW10_Msk (0x300000UL) /*!< PORT1 HWSEL: HW10 (Bitfield-Mask: 0x03) */ +#define PORT1_HWSEL_HW11_Pos (22UL) /*!< PORT1 HWSEL: HW11 (Bit 22) */ +#define PORT1_HWSEL_HW11_Msk (0xc00000UL) /*!< PORT1 HWSEL: HW11 (Bitfield-Mask: 0x03) */ +#define PORT1_HWSEL_HW12_Pos (24UL) /*!< PORT1 HWSEL: HW12 (Bit 24) */ +#define PORT1_HWSEL_HW12_Msk (0x3000000UL) /*!< PORT1 HWSEL: HW12 (Bitfield-Mask: 0x03) */ +#define PORT1_HWSEL_HW13_Pos (26UL) /*!< PORT1 HWSEL: HW13 (Bit 26) */ +#define PORT1_HWSEL_HW13_Msk (0xc000000UL) /*!< PORT1 HWSEL: HW13 (Bitfield-Mask: 0x03) */ +#define PORT1_HWSEL_HW14_Pos (28UL) /*!< PORT1 HWSEL: HW14 (Bit 28) */ +#define PORT1_HWSEL_HW14_Msk (0x30000000UL) /*!< PORT1 HWSEL: HW14 (Bitfield-Mask: 0x03) */ +#define PORT1_HWSEL_HW15_Pos (30UL) /*!< PORT1 HWSEL: HW15 (Bit 30) */ +#define PORT1_HWSEL_HW15_Msk (0xc0000000UL) /*!< PORT1 HWSEL: HW15 (Bitfield-Mask: 0x03) */ + + +/* ================================================================================ */ +/* ================ struct 'PORT2' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ---------------------------------- PORT2_OUT --------------------------------- */ +#define PORT2_OUT_P0_Pos (0UL) /*!< PORT2 OUT: P0 (Bit 0) */ +#define PORT2_OUT_P0_Msk (0x1UL) /*!< PORT2 OUT: P0 (Bitfield-Mask: 0x01) */ +#define PORT2_OUT_P1_Pos (1UL) /*!< PORT2 OUT: P1 (Bit 1) */ +#define PORT2_OUT_P1_Msk (0x2UL) /*!< PORT2 OUT: P1 (Bitfield-Mask: 0x01) */ +#define PORT2_OUT_P2_Pos (2UL) /*!< PORT2 OUT: P2 (Bit 2) */ +#define PORT2_OUT_P2_Msk (0x4UL) /*!< PORT2 OUT: P2 (Bitfield-Mask: 0x01) */ +#define PORT2_OUT_P3_Pos (3UL) /*!< PORT2 OUT: P3 (Bit 3) */ +#define PORT2_OUT_P3_Msk (0x8UL) /*!< PORT2 OUT: P3 (Bitfield-Mask: 0x01) */ +#define PORT2_OUT_P4_Pos (4UL) /*!< PORT2 OUT: P4 (Bit 4) */ +#define PORT2_OUT_P4_Msk (0x10UL) /*!< PORT2 OUT: P4 (Bitfield-Mask: 0x01) */ +#define PORT2_OUT_P5_Pos (5UL) /*!< PORT2 OUT: P5 (Bit 5) */ +#define PORT2_OUT_P5_Msk (0x20UL) /*!< PORT2 OUT: P5 (Bitfield-Mask: 0x01) */ +#define PORT2_OUT_P6_Pos (6UL) /*!< PORT2 OUT: P6 (Bit 6) */ +#define PORT2_OUT_P6_Msk (0x40UL) /*!< PORT2 OUT: P6 (Bitfield-Mask: 0x01) */ +#define PORT2_OUT_P7_Pos (7UL) /*!< PORT2 OUT: P7 (Bit 7) */ +#define PORT2_OUT_P7_Msk (0x80UL) /*!< PORT2 OUT: P7 (Bitfield-Mask: 0x01) */ +#define PORT2_OUT_P8_Pos (8UL) /*!< PORT2 OUT: P8 (Bit 8) */ +#define PORT2_OUT_P8_Msk (0x100UL) /*!< PORT2 OUT: P8 (Bitfield-Mask: 0x01) */ +#define PORT2_OUT_P9_Pos (9UL) /*!< PORT2 OUT: P9 (Bit 9) */ +#define PORT2_OUT_P9_Msk (0x200UL) /*!< PORT2 OUT: P9 (Bitfield-Mask: 0x01) */ +#define PORT2_OUT_P10_Pos (10UL) /*!< PORT2 OUT: P10 (Bit 10) */ +#define PORT2_OUT_P10_Msk (0x400UL) /*!< PORT2 OUT: P10 (Bitfield-Mask: 0x01) */ +#define PORT2_OUT_P11_Pos (11UL) /*!< PORT2 OUT: P11 (Bit 11) */ +#define PORT2_OUT_P11_Msk (0x800UL) /*!< PORT2 OUT: P11 (Bitfield-Mask: 0x01) */ +#define PORT2_OUT_P12_Pos (12UL) /*!< PORT2 OUT: P12 (Bit 12) */ +#define PORT2_OUT_P12_Msk (0x1000UL) /*!< PORT2 OUT: P12 (Bitfield-Mask: 0x01) */ +#define PORT2_OUT_P13_Pos (13UL) /*!< PORT2 OUT: P13 (Bit 13) */ +#define PORT2_OUT_P13_Msk (0x2000UL) /*!< PORT2 OUT: P13 (Bitfield-Mask: 0x01) */ +#define PORT2_OUT_P14_Pos (14UL) /*!< PORT2 OUT: P14 (Bit 14) */ +#define PORT2_OUT_P14_Msk (0x4000UL) /*!< PORT2 OUT: P14 (Bitfield-Mask: 0x01) */ +#define PORT2_OUT_P15_Pos (15UL) /*!< PORT2 OUT: P15 (Bit 15) */ +#define PORT2_OUT_P15_Msk (0x8000UL) /*!< PORT2 OUT: P15 (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- PORT2_OMR --------------------------------- */ +#define PORT2_OMR_PS0_Pos (0UL) /*!< PORT2 OMR: PS0 (Bit 0) */ +#define PORT2_OMR_PS0_Msk (0x1UL) /*!< PORT2 OMR: PS0 (Bitfield-Mask: 0x01) */ +#define PORT2_OMR_PS1_Pos (1UL) /*!< PORT2 OMR: PS1 (Bit 1) */ +#define PORT2_OMR_PS1_Msk (0x2UL) /*!< PORT2 OMR: PS1 (Bitfield-Mask: 0x01) */ +#define PORT2_OMR_PS2_Pos (2UL) /*!< PORT2 OMR: PS2 (Bit 2) */ +#define PORT2_OMR_PS2_Msk (0x4UL) /*!< PORT2 OMR: PS2 (Bitfield-Mask: 0x01) */ +#define PORT2_OMR_PS3_Pos (3UL) /*!< PORT2 OMR: PS3 (Bit 3) */ +#define PORT2_OMR_PS3_Msk (0x8UL) /*!< PORT2 OMR: PS3 (Bitfield-Mask: 0x01) */ +#define PORT2_OMR_PS4_Pos (4UL) /*!< PORT2 OMR: PS4 (Bit 4) */ +#define PORT2_OMR_PS4_Msk (0x10UL) /*!< PORT2 OMR: PS4 (Bitfield-Mask: 0x01) */ +#define PORT2_OMR_PS5_Pos (5UL) /*!< PORT2 OMR: PS5 (Bit 5) */ +#define PORT2_OMR_PS5_Msk (0x20UL) /*!< PORT2 OMR: PS5 (Bitfield-Mask: 0x01) */ +#define PORT2_OMR_PS6_Pos (6UL) /*!< PORT2 OMR: PS6 (Bit 6) */ +#define PORT2_OMR_PS6_Msk (0x40UL) /*!< PORT2 OMR: PS6 (Bitfield-Mask: 0x01) */ +#define PORT2_OMR_PS7_Pos (7UL) /*!< PORT2 OMR: PS7 (Bit 7) */ +#define PORT2_OMR_PS7_Msk (0x80UL) /*!< PORT2 OMR: PS7 (Bitfield-Mask: 0x01) */ +#define PORT2_OMR_PS8_Pos (8UL) /*!< PORT2 OMR: PS8 (Bit 8) */ +#define PORT2_OMR_PS8_Msk (0x100UL) /*!< PORT2 OMR: PS8 (Bitfield-Mask: 0x01) */ +#define PORT2_OMR_PS9_Pos (9UL) /*!< PORT2 OMR: PS9 (Bit 9) */ +#define PORT2_OMR_PS9_Msk (0x200UL) /*!< PORT2 OMR: PS9 (Bitfield-Mask: 0x01) */ +#define PORT2_OMR_PS10_Pos (10UL) /*!< PORT2 OMR: PS10 (Bit 10) */ +#define PORT2_OMR_PS10_Msk (0x400UL) /*!< PORT2 OMR: PS10 (Bitfield-Mask: 0x01) */ +#define PORT2_OMR_PS11_Pos (11UL) /*!< PORT2 OMR: PS11 (Bit 11) */ +#define PORT2_OMR_PS11_Msk (0x800UL) /*!< PORT2 OMR: PS11 (Bitfield-Mask: 0x01) */ +#define PORT2_OMR_PS12_Pos (12UL) /*!< PORT2 OMR: PS12 (Bit 12) */ +#define PORT2_OMR_PS12_Msk (0x1000UL) /*!< PORT2 OMR: PS12 (Bitfield-Mask: 0x01) */ +#define PORT2_OMR_PS13_Pos (13UL) /*!< PORT2 OMR: PS13 (Bit 13) */ +#define PORT2_OMR_PS13_Msk (0x2000UL) /*!< PORT2 OMR: PS13 (Bitfield-Mask: 0x01) */ +#define PORT2_OMR_PS14_Pos (14UL) /*!< PORT2 OMR: PS14 (Bit 14) */ +#define PORT2_OMR_PS14_Msk (0x4000UL) /*!< PORT2 OMR: PS14 (Bitfield-Mask: 0x01) */ +#define PORT2_OMR_PS15_Pos (15UL) /*!< PORT2 OMR: PS15 (Bit 15) */ +#define PORT2_OMR_PS15_Msk (0x8000UL) /*!< PORT2 OMR: PS15 (Bitfield-Mask: 0x01) */ +#define PORT2_OMR_PR0_Pos (16UL) /*!< PORT2 OMR: PR0 (Bit 16) */ +#define PORT2_OMR_PR0_Msk (0x10000UL) /*!< PORT2 OMR: PR0 (Bitfield-Mask: 0x01) */ +#define PORT2_OMR_PR1_Pos (17UL) /*!< PORT2 OMR: PR1 (Bit 17) */ +#define PORT2_OMR_PR1_Msk (0x20000UL) /*!< PORT2 OMR: PR1 (Bitfield-Mask: 0x01) */ +#define PORT2_OMR_PR2_Pos (18UL) /*!< PORT2 OMR: PR2 (Bit 18) */ +#define PORT2_OMR_PR2_Msk (0x40000UL) /*!< PORT2 OMR: PR2 (Bitfield-Mask: 0x01) */ +#define PORT2_OMR_PR3_Pos (19UL) /*!< PORT2 OMR: PR3 (Bit 19) */ +#define PORT2_OMR_PR3_Msk (0x80000UL) /*!< PORT2 OMR: PR3 (Bitfield-Mask: 0x01) */ +#define PORT2_OMR_PR4_Pos (20UL) /*!< PORT2 OMR: PR4 (Bit 20) */ +#define PORT2_OMR_PR4_Msk (0x100000UL) /*!< PORT2 OMR: PR4 (Bitfield-Mask: 0x01) */ +#define PORT2_OMR_PR5_Pos (21UL) /*!< PORT2 OMR: PR5 (Bit 21) */ +#define PORT2_OMR_PR5_Msk (0x200000UL) /*!< PORT2 OMR: PR5 (Bitfield-Mask: 0x01) */ +#define PORT2_OMR_PR6_Pos (22UL) /*!< PORT2 OMR: PR6 (Bit 22) */ +#define PORT2_OMR_PR6_Msk (0x400000UL) /*!< PORT2 OMR: PR6 (Bitfield-Mask: 0x01) */ +#define PORT2_OMR_PR7_Pos (23UL) /*!< PORT2 OMR: PR7 (Bit 23) */ +#define PORT2_OMR_PR7_Msk (0x800000UL) /*!< PORT2 OMR: PR7 (Bitfield-Mask: 0x01) */ +#define PORT2_OMR_PR8_Pos (24UL) /*!< PORT2 OMR: PR8 (Bit 24) */ +#define PORT2_OMR_PR8_Msk (0x1000000UL) /*!< PORT2 OMR: PR8 (Bitfield-Mask: 0x01) */ +#define PORT2_OMR_PR9_Pos (25UL) /*!< PORT2 OMR: PR9 (Bit 25) */ +#define PORT2_OMR_PR9_Msk (0x2000000UL) /*!< PORT2 OMR: PR9 (Bitfield-Mask: 0x01) */ +#define PORT2_OMR_PR10_Pos (26UL) /*!< PORT2 OMR: PR10 (Bit 26) */ +#define PORT2_OMR_PR10_Msk (0x4000000UL) /*!< PORT2 OMR: PR10 (Bitfield-Mask: 0x01) */ +#define PORT2_OMR_PR11_Pos (27UL) /*!< PORT2 OMR: PR11 (Bit 27) */ +#define PORT2_OMR_PR11_Msk (0x8000000UL) /*!< PORT2 OMR: PR11 (Bitfield-Mask: 0x01) */ +#define PORT2_OMR_PR12_Pos (28UL) /*!< PORT2 OMR: PR12 (Bit 28) */ +#define PORT2_OMR_PR12_Msk (0x10000000UL) /*!< PORT2 OMR: PR12 (Bitfield-Mask: 0x01) */ +#define PORT2_OMR_PR13_Pos (29UL) /*!< PORT2 OMR: PR13 (Bit 29) */ +#define PORT2_OMR_PR13_Msk (0x20000000UL) /*!< PORT2 OMR: PR13 (Bitfield-Mask: 0x01) */ +#define PORT2_OMR_PR14_Pos (30UL) /*!< PORT2 OMR: PR14 (Bit 30) */ +#define PORT2_OMR_PR14_Msk (0x40000000UL) /*!< PORT2 OMR: PR14 (Bitfield-Mask: 0x01) */ +#define PORT2_OMR_PR15_Pos (31UL) /*!< PORT2 OMR: PR15 (Bit 31) */ +#define PORT2_OMR_PR15_Msk (0x80000000UL) /*!< PORT2 OMR: PR15 (Bitfield-Mask: 0x01) */ + +/* --------------------------------- PORT2_IOCR0 -------------------------------- */ +#define PORT2_IOCR0_PC0_Pos (3UL) /*!< PORT2 IOCR0: PC0 (Bit 3) */ +#define PORT2_IOCR0_PC0_Msk (0xf8UL) /*!< PORT2 IOCR0: PC0 (Bitfield-Mask: 0x1f) */ +#define PORT2_IOCR0_PC1_Pos (11UL) /*!< PORT2 IOCR0: PC1 (Bit 11) */ +#define PORT2_IOCR0_PC1_Msk (0xf800UL) /*!< PORT2 IOCR0: PC1 (Bitfield-Mask: 0x1f) */ +#define PORT2_IOCR0_PC2_Pos (19UL) /*!< PORT2 IOCR0: PC2 (Bit 19) */ +#define PORT2_IOCR0_PC2_Msk (0xf80000UL) /*!< PORT2 IOCR0: PC2 (Bitfield-Mask: 0x1f) */ +#define PORT2_IOCR0_PC3_Pos (27UL) /*!< PORT2 IOCR0: PC3 (Bit 27) */ +#define PORT2_IOCR0_PC3_Msk (0xf8000000UL) /*!< PORT2 IOCR0: PC3 (Bitfield-Mask: 0x1f) */ + +/* --------------------------------- PORT2_IOCR4 -------------------------------- */ +#define PORT2_IOCR4_PC4_Pos (3UL) /*!< PORT2 IOCR4: PC4 (Bit 3) */ +#define PORT2_IOCR4_PC4_Msk (0xf8UL) /*!< PORT2 IOCR4: PC4 (Bitfield-Mask: 0x1f) */ +#define PORT2_IOCR4_PC5_Pos (11UL) /*!< PORT2 IOCR4: PC5 (Bit 11) */ +#define PORT2_IOCR4_PC5_Msk (0xf800UL) /*!< PORT2 IOCR4: PC5 (Bitfield-Mask: 0x1f) */ +#define PORT2_IOCR4_PC6_Pos (19UL) /*!< PORT2 IOCR4: PC6 (Bit 19) */ +#define PORT2_IOCR4_PC6_Msk (0xf80000UL) /*!< PORT2 IOCR4: PC6 (Bitfield-Mask: 0x1f) */ +#define PORT2_IOCR4_PC7_Pos (27UL) /*!< PORT2 IOCR4: PC7 (Bit 27) */ +#define PORT2_IOCR4_PC7_Msk (0xf8000000UL) /*!< PORT2 IOCR4: PC7 (Bitfield-Mask: 0x1f) */ + +/* --------------------------------- PORT2_IOCR8 -------------------------------- */ +#define PORT2_IOCR8_PC8_Pos (3UL) /*!< PORT2 IOCR8: PC8 (Bit 3) */ +#define PORT2_IOCR8_PC8_Msk (0xf8UL) /*!< PORT2 IOCR8: PC8 (Bitfield-Mask: 0x1f) */ +#define PORT2_IOCR8_PC9_Pos (11UL) /*!< PORT2 IOCR8: PC9 (Bit 11) */ +#define PORT2_IOCR8_PC9_Msk (0xf800UL) /*!< PORT2 IOCR8: PC9 (Bitfield-Mask: 0x1f) */ +#define PORT2_IOCR8_PC10_Pos (19UL) /*!< PORT2 IOCR8: PC10 (Bit 19) */ +#define PORT2_IOCR8_PC10_Msk (0xf80000UL) /*!< PORT2 IOCR8: PC10 (Bitfield-Mask: 0x1f) */ +#define PORT2_IOCR8_PC11_Pos (27UL) /*!< PORT2 IOCR8: PC11 (Bit 27) */ +#define PORT2_IOCR8_PC11_Msk (0xf8000000UL) /*!< PORT2 IOCR8: PC11 (Bitfield-Mask: 0x1f) */ + +/* -------------------------------- PORT2_IOCR12 -------------------------------- */ +#define PORT2_IOCR12_PC12_Pos (3UL) /*!< PORT2 IOCR12: PC12 (Bit 3) */ +#define PORT2_IOCR12_PC12_Msk (0xf8UL) /*!< PORT2 IOCR12: PC12 (Bitfield-Mask: 0x1f) */ +#define PORT2_IOCR12_PC13_Pos (11UL) /*!< PORT2 IOCR12: PC13 (Bit 11) */ +#define PORT2_IOCR12_PC13_Msk (0xf800UL) /*!< PORT2 IOCR12: PC13 (Bitfield-Mask: 0x1f) */ +#define PORT2_IOCR12_PC14_Pos (19UL) /*!< PORT2 IOCR12: PC14 (Bit 19) */ +#define PORT2_IOCR12_PC14_Msk (0xf80000UL) /*!< PORT2 IOCR12: PC14 (Bitfield-Mask: 0x1f) */ +#define PORT2_IOCR12_PC15_Pos (27UL) /*!< PORT2 IOCR12: PC15 (Bit 27) */ +#define PORT2_IOCR12_PC15_Msk (0xf8000000UL) /*!< PORT2 IOCR12: PC15 (Bitfield-Mask: 0x1f) */ + +/* ---------------------------------- PORT2_IN ---------------------------------- */ +#define PORT2_IN_P0_Pos (0UL) /*!< PORT2 IN: P0 (Bit 0) */ +#define PORT2_IN_P0_Msk (0x1UL) /*!< PORT2 IN: P0 (Bitfield-Mask: 0x01) */ +#define PORT2_IN_P1_Pos (1UL) /*!< PORT2 IN: P1 (Bit 1) */ +#define PORT2_IN_P1_Msk (0x2UL) /*!< PORT2 IN: P1 (Bitfield-Mask: 0x01) */ +#define PORT2_IN_P2_Pos (2UL) /*!< PORT2 IN: P2 (Bit 2) */ +#define PORT2_IN_P2_Msk (0x4UL) /*!< PORT2 IN: P2 (Bitfield-Mask: 0x01) */ +#define PORT2_IN_P3_Pos (3UL) /*!< PORT2 IN: P3 (Bit 3) */ +#define PORT2_IN_P3_Msk (0x8UL) /*!< PORT2 IN: P3 (Bitfield-Mask: 0x01) */ +#define PORT2_IN_P4_Pos (4UL) /*!< PORT2 IN: P4 (Bit 4) */ +#define PORT2_IN_P4_Msk (0x10UL) /*!< PORT2 IN: P4 (Bitfield-Mask: 0x01) */ +#define PORT2_IN_P5_Pos (5UL) /*!< PORT2 IN: P5 (Bit 5) */ +#define PORT2_IN_P5_Msk (0x20UL) /*!< PORT2 IN: P5 (Bitfield-Mask: 0x01) */ +#define PORT2_IN_P6_Pos (6UL) /*!< PORT2 IN: P6 (Bit 6) */ +#define PORT2_IN_P6_Msk (0x40UL) /*!< PORT2 IN: P6 (Bitfield-Mask: 0x01) */ +#define PORT2_IN_P7_Pos (7UL) /*!< PORT2 IN: P7 (Bit 7) */ +#define PORT2_IN_P7_Msk (0x80UL) /*!< PORT2 IN: P7 (Bitfield-Mask: 0x01) */ +#define PORT2_IN_P8_Pos (8UL) /*!< PORT2 IN: P8 (Bit 8) */ +#define PORT2_IN_P8_Msk (0x100UL) /*!< PORT2 IN: P8 (Bitfield-Mask: 0x01) */ +#define PORT2_IN_P9_Pos (9UL) /*!< PORT2 IN: P9 (Bit 9) */ +#define PORT2_IN_P9_Msk (0x200UL) /*!< PORT2 IN: P9 (Bitfield-Mask: 0x01) */ +#define PORT2_IN_P10_Pos (10UL) /*!< PORT2 IN: P10 (Bit 10) */ +#define PORT2_IN_P10_Msk (0x400UL) /*!< PORT2 IN: P10 (Bitfield-Mask: 0x01) */ +#define PORT2_IN_P11_Pos (11UL) /*!< PORT2 IN: P11 (Bit 11) */ +#define PORT2_IN_P11_Msk (0x800UL) /*!< PORT2 IN: P11 (Bitfield-Mask: 0x01) */ +#define PORT2_IN_P12_Pos (12UL) /*!< PORT2 IN: P12 (Bit 12) */ +#define PORT2_IN_P12_Msk (0x1000UL) /*!< PORT2 IN: P12 (Bitfield-Mask: 0x01) */ +#define PORT2_IN_P13_Pos (13UL) /*!< PORT2 IN: P13 (Bit 13) */ +#define PORT2_IN_P13_Msk (0x2000UL) /*!< PORT2 IN: P13 (Bitfield-Mask: 0x01) */ +#define PORT2_IN_P14_Pos (14UL) /*!< PORT2 IN: P14 (Bit 14) */ +#define PORT2_IN_P14_Msk (0x4000UL) /*!< PORT2 IN: P14 (Bitfield-Mask: 0x01) */ +#define PORT2_IN_P15_Pos (15UL) /*!< PORT2 IN: P15 (Bit 15) */ +#define PORT2_IN_P15_Msk (0x8000UL) /*!< PORT2 IN: P15 (Bitfield-Mask: 0x01) */ + +/* --------------------------------- PORT2_PDR0 --------------------------------- */ +#define PORT2_PDR0_PD0_Pos (0UL) /*!< PORT2 PDR0: PD0 (Bit 0) */ +#define PORT2_PDR0_PD0_Msk (0x7UL) /*!< PORT2 PDR0: PD0 (Bitfield-Mask: 0x07) */ +#define PORT2_PDR0_PD1_Pos (4UL) /*!< PORT2 PDR0: PD1 (Bit 4) */ +#define PORT2_PDR0_PD1_Msk (0x70UL) /*!< PORT2 PDR0: PD1 (Bitfield-Mask: 0x07) */ +#define PORT2_PDR0_PD2_Pos (8UL) /*!< PORT2 PDR0: PD2 (Bit 8) */ +#define PORT2_PDR0_PD2_Msk (0x700UL) /*!< PORT2 PDR0: PD2 (Bitfield-Mask: 0x07) */ +#define PORT2_PDR0_PD3_Pos (12UL) /*!< PORT2 PDR0: PD3 (Bit 12) */ +#define PORT2_PDR0_PD3_Msk (0x7000UL) /*!< PORT2 PDR0: PD3 (Bitfield-Mask: 0x07) */ +#define PORT2_PDR0_PD4_Pos (16UL) /*!< PORT2 PDR0: PD4 (Bit 16) */ +#define PORT2_PDR0_PD4_Msk (0x70000UL) /*!< PORT2 PDR0: PD4 (Bitfield-Mask: 0x07) */ +#define PORT2_PDR0_PD5_Pos (20UL) /*!< PORT2 PDR0: PD5 (Bit 20) */ +#define PORT2_PDR0_PD5_Msk (0x700000UL) /*!< PORT2 PDR0: PD5 (Bitfield-Mask: 0x07) */ +#define PORT2_PDR0_PD6_Pos (24UL) /*!< PORT2 PDR0: PD6 (Bit 24) */ +#define PORT2_PDR0_PD6_Msk (0x7000000UL) /*!< PORT2 PDR0: PD6 (Bitfield-Mask: 0x07) */ +#define PORT2_PDR0_PD7_Pos (28UL) /*!< PORT2 PDR0: PD7 (Bit 28) */ +#define PORT2_PDR0_PD7_Msk (0x70000000UL) /*!< PORT2 PDR0: PD7 (Bitfield-Mask: 0x07) */ + +/* --------------------------------- PORT2_PDR1 --------------------------------- */ +#define PORT2_PDR1_PD8_Pos (0UL) /*!< PORT2 PDR1: PD8 (Bit 0) */ +#define PORT2_PDR1_PD8_Msk (0x7UL) /*!< PORT2 PDR1: PD8 (Bitfield-Mask: 0x07) */ +#define PORT2_PDR1_PD9_Pos (4UL) /*!< PORT2 PDR1: PD9 (Bit 4) */ +#define PORT2_PDR1_PD9_Msk (0x70UL) /*!< PORT2 PDR1: PD9 (Bitfield-Mask: 0x07) */ +#define PORT2_PDR1_PD10_Pos (8UL) /*!< PORT2 PDR1: PD10 (Bit 8) */ +#define PORT2_PDR1_PD10_Msk (0x700UL) /*!< PORT2 PDR1: PD10 (Bitfield-Mask: 0x07) */ +#define PORT2_PDR1_PD11_Pos (12UL) /*!< PORT2 PDR1: PD11 (Bit 12) */ +#define PORT2_PDR1_PD11_Msk (0x7000UL) /*!< PORT2 PDR1: PD11 (Bitfield-Mask: 0x07) */ +#define PORT2_PDR1_PD12_Pos (16UL) /*!< PORT2 PDR1: PD12 (Bit 16) */ +#define PORT2_PDR1_PD12_Msk (0x70000UL) /*!< PORT2 PDR1: PD12 (Bitfield-Mask: 0x07) */ +#define PORT2_PDR1_PD13_Pos (20UL) /*!< PORT2 PDR1: PD13 (Bit 20) */ +#define PORT2_PDR1_PD13_Msk (0x700000UL) /*!< PORT2 PDR1: PD13 (Bitfield-Mask: 0x07) */ +#define PORT2_PDR1_PD14_Pos (24UL) /*!< PORT2 PDR1: PD14 (Bit 24) */ +#define PORT2_PDR1_PD14_Msk (0x7000000UL) /*!< PORT2 PDR1: PD14 (Bitfield-Mask: 0x07) */ +#define PORT2_PDR1_PD15_Pos (28UL) /*!< PORT2 PDR1: PD15 (Bit 28) */ +#define PORT2_PDR1_PD15_Msk (0x70000000UL) /*!< PORT2 PDR1: PD15 (Bitfield-Mask: 0x07) */ + +/* --------------------------------- PORT2_PDISC -------------------------------- */ +#define PORT2_PDISC_PDIS0_Pos (0UL) /*!< PORT2 PDISC: PDIS0 (Bit 0) */ +#define PORT2_PDISC_PDIS0_Msk (0x1UL) /*!< PORT2 PDISC: PDIS0 (Bitfield-Mask: 0x01) */ +#define PORT2_PDISC_PDIS1_Pos (1UL) /*!< PORT2 PDISC: PDIS1 (Bit 1) */ +#define PORT2_PDISC_PDIS1_Msk (0x2UL) /*!< PORT2 PDISC: PDIS1 (Bitfield-Mask: 0x01) */ +#define PORT2_PDISC_PDIS2_Pos (2UL) /*!< PORT2 PDISC: PDIS2 (Bit 2) */ +#define PORT2_PDISC_PDIS2_Msk (0x4UL) /*!< PORT2 PDISC: PDIS2 (Bitfield-Mask: 0x01) */ +#define PORT2_PDISC_PDIS3_Pos (3UL) /*!< PORT2 PDISC: PDIS3 (Bit 3) */ +#define PORT2_PDISC_PDIS3_Msk (0x8UL) /*!< PORT2 PDISC: PDIS3 (Bitfield-Mask: 0x01) */ +#define PORT2_PDISC_PDIS4_Pos (4UL) /*!< PORT2 PDISC: PDIS4 (Bit 4) */ +#define PORT2_PDISC_PDIS4_Msk (0x10UL) /*!< PORT2 PDISC: PDIS4 (Bitfield-Mask: 0x01) */ +#define PORT2_PDISC_PDIS5_Pos (5UL) /*!< PORT2 PDISC: PDIS5 (Bit 5) */ +#define PORT2_PDISC_PDIS5_Msk (0x20UL) /*!< PORT2 PDISC: PDIS5 (Bitfield-Mask: 0x01) */ +#define PORT2_PDISC_PDIS6_Pos (6UL) /*!< PORT2 PDISC: PDIS6 (Bit 6) */ +#define PORT2_PDISC_PDIS6_Msk (0x40UL) /*!< PORT2 PDISC: PDIS6 (Bitfield-Mask: 0x01) */ +#define PORT2_PDISC_PDIS7_Pos (7UL) /*!< PORT2 PDISC: PDIS7 (Bit 7) */ +#define PORT2_PDISC_PDIS7_Msk (0x80UL) /*!< PORT2 PDISC: PDIS7 (Bitfield-Mask: 0x01) */ +#define PORT2_PDISC_PDIS8_Pos (8UL) /*!< PORT2 PDISC: PDIS8 (Bit 8) */ +#define PORT2_PDISC_PDIS8_Msk (0x100UL) /*!< PORT2 PDISC: PDIS8 (Bitfield-Mask: 0x01) */ +#define PORT2_PDISC_PDIS9_Pos (9UL) /*!< PORT2 PDISC: PDIS9 (Bit 9) */ +#define PORT2_PDISC_PDIS9_Msk (0x200UL) /*!< PORT2 PDISC: PDIS9 (Bitfield-Mask: 0x01) */ +#define PORT2_PDISC_PDIS10_Pos (10UL) /*!< PORT2 PDISC: PDIS10 (Bit 10) */ +#define PORT2_PDISC_PDIS10_Msk (0x400UL) /*!< PORT2 PDISC: PDIS10 (Bitfield-Mask: 0x01) */ +#define PORT2_PDISC_PDIS11_Pos (11UL) /*!< PORT2 PDISC: PDIS11 (Bit 11) */ +#define PORT2_PDISC_PDIS11_Msk (0x800UL) /*!< PORT2 PDISC: PDIS11 (Bitfield-Mask: 0x01) */ +#define PORT2_PDISC_PDIS12_Pos (12UL) /*!< PORT2 PDISC: PDIS12 (Bit 12) */ +#define PORT2_PDISC_PDIS12_Msk (0x1000UL) /*!< PORT2 PDISC: PDIS12 (Bitfield-Mask: 0x01) */ +#define PORT2_PDISC_PDIS13_Pos (13UL) /*!< PORT2 PDISC: PDIS13 (Bit 13) */ +#define PORT2_PDISC_PDIS13_Msk (0x2000UL) /*!< PORT2 PDISC: PDIS13 (Bitfield-Mask: 0x01) */ +#define PORT2_PDISC_PDIS14_Pos (14UL) /*!< PORT2 PDISC: PDIS14 (Bit 14) */ +#define PORT2_PDISC_PDIS14_Msk (0x4000UL) /*!< PORT2 PDISC: PDIS14 (Bitfield-Mask: 0x01) */ +#define PORT2_PDISC_PDIS15_Pos (15UL) /*!< PORT2 PDISC: PDIS15 (Bit 15) */ +#define PORT2_PDISC_PDIS15_Msk (0x8000UL) /*!< PORT2 PDISC: PDIS15 (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- PORT2_PPS --------------------------------- */ +#define PORT2_PPS_PPS0_Pos (0UL) /*!< PORT2 PPS: PPS0 (Bit 0) */ +#define PORT2_PPS_PPS0_Msk (0x1UL) /*!< PORT2 PPS: PPS0 (Bitfield-Mask: 0x01) */ +#define PORT2_PPS_PPS1_Pos (1UL) /*!< PORT2 PPS: PPS1 (Bit 1) */ +#define PORT2_PPS_PPS1_Msk (0x2UL) /*!< PORT2 PPS: PPS1 (Bitfield-Mask: 0x01) */ +#define PORT2_PPS_PPS2_Pos (2UL) /*!< PORT2 PPS: PPS2 (Bit 2) */ +#define PORT2_PPS_PPS2_Msk (0x4UL) /*!< PORT2 PPS: PPS2 (Bitfield-Mask: 0x01) */ +#define PORT2_PPS_PPS3_Pos (3UL) /*!< PORT2 PPS: PPS3 (Bit 3) */ +#define PORT2_PPS_PPS3_Msk (0x8UL) /*!< PORT2 PPS: PPS3 (Bitfield-Mask: 0x01) */ +#define PORT2_PPS_PPS4_Pos (4UL) /*!< PORT2 PPS: PPS4 (Bit 4) */ +#define PORT2_PPS_PPS4_Msk (0x10UL) /*!< PORT2 PPS: PPS4 (Bitfield-Mask: 0x01) */ +#define PORT2_PPS_PPS5_Pos (5UL) /*!< PORT2 PPS: PPS5 (Bit 5) */ +#define PORT2_PPS_PPS5_Msk (0x20UL) /*!< PORT2 PPS: PPS5 (Bitfield-Mask: 0x01) */ +#define PORT2_PPS_PPS6_Pos (6UL) /*!< PORT2 PPS: PPS6 (Bit 6) */ +#define PORT2_PPS_PPS6_Msk (0x40UL) /*!< PORT2 PPS: PPS6 (Bitfield-Mask: 0x01) */ +#define PORT2_PPS_PPS7_Pos (7UL) /*!< PORT2 PPS: PPS7 (Bit 7) */ +#define PORT2_PPS_PPS7_Msk (0x80UL) /*!< PORT2 PPS: PPS7 (Bitfield-Mask: 0x01) */ +#define PORT2_PPS_PPS8_Pos (8UL) /*!< PORT2 PPS: PPS8 (Bit 8) */ +#define PORT2_PPS_PPS8_Msk (0x100UL) /*!< PORT2 PPS: PPS8 (Bitfield-Mask: 0x01) */ +#define PORT2_PPS_PPS9_Pos (9UL) /*!< PORT2 PPS: PPS9 (Bit 9) */ +#define PORT2_PPS_PPS9_Msk (0x200UL) /*!< PORT2 PPS: PPS9 (Bitfield-Mask: 0x01) */ +#define PORT2_PPS_PPS10_Pos (10UL) /*!< PORT2 PPS: PPS10 (Bit 10) */ +#define PORT2_PPS_PPS10_Msk (0x400UL) /*!< PORT2 PPS: PPS10 (Bitfield-Mask: 0x01) */ +#define PORT2_PPS_PPS11_Pos (11UL) /*!< PORT2 PPS: PPS11 (Bit 11) */ +#define PORT2_PPS_PPS11_Msk (0x800UL) /*!< PORT2 PPS: PPS11 (Bitfield-Mask: 0x01) */ +#define PORT2_PPS_PPS12_Pos (12UL) /*!< PORT2 PPS: PPS12 (Bit 12) */ +#define PORT2_PPS_PPS12_Msk (0x1000UL) /*!< PORT2 PPS: PPS12 (Bitfield-Mask: 0x01) */ +#define PORT2_PPS_PPS13_Pos (13UL) /*!< PORT2 PPS: PPS13 (Bit 13) */ +#define PORT2_PPS_PPS13_Msk (0x2000UL) /*!< PORT2 PPS: PPS13 (Bitfield-Mask: 0x01) */ +#define PORT2_PPS_PPS14_Pos (14UL) /*!< PORT2 PPS: PPS14 (Bit 14) */ +#define PORT2_PPS_PPS14_Msk (0x4000UL) /*!< PORT2 PPS: PPS14 (Bitfield-Mask: 0x01) */ +#define PORT2_PPS_PPS15_Pos (15UL) /*!< PORT2 PPS: PPS15 (Bit 15) */ +#define PORT2_PPS_PPS15_Msk (0x8000UL) /*!< PORT2 PPS: PPS15 (Bitfield-Mask: 0x01) */ + +/* --------------------------------- PORT2_HWSEL -------------------------------- */ +#define PORT2_HWSEL_HW0_Pos (0UL) /*!< PORT2 HWSEL: HW0 (Bit 0) */ +#define PORT2_HWSEL_HW0_Msk (0x3UL) /*!< PORT2 HWSEL: HW0 (Bitfield-Mask: 0x03) */ +#define PORT2_HWSEL_HW1_Pos (2UL) /*!< PORT2 HWSEL: HW1 (Bit 2) */ +#define PORT2_HWSEL_HW1_Msk (0xcUL) /*!< PORT2 HWSEL: HW1 (Bitfield-Mask: 0x03) */ +#define PORT2_HWSEL_HW2_Pos (4UL) /*!< PORT2 HWSEL: HW2 (Bit 4) */ +#define PORT2_HWSEL_HW2_Msk (0x30UL) /*!< PORT2 HWSEL: HW2 (Bitfield-Mask: 0x03) */ +#define PORT2_HWSEL_HW3_Pos (6UL) /*!< PORT2 HWSEL: HW3 (Bit 6) */ +#define PORT2_HWSEL_HW3_Msk (0xc0UL) /*!< PORT2 HWSEL: HW3 (Bitfield-Mask: 0x03) */ +#define PORT2_HWSEL_HW4_Pos (8UL) /*!< PORT2 HWSEL: HW4 (Bit 8) */ +#define PORT2_HWSEL_HW4_Msk (0x300UL) /*!< PORT2 HWSEL: HW4 (Bitfield-Mask: 0x03) */ +#define PORT2_HWSEL_HW5_Pos (10UL) /*!< PORT2 HWSEL: HW5 (Bit 10) */ +#define PORT2_HWSEL_HW5_Msk (0xc00UL) /*!< PORT2 HWSEL: HW5 (Bitfield-Mask: 0x03) */ +#define PORT2_HWSEL_HW6_Pos (12UL) /*!< PORT2 HWSEL: HW6 (Bit 12) */ +#define PORT2_HWSEL_HW6_Msk (0x3000UL) /*!< PORT2 HWSEL: HW6 (Bitfield-Mask: 0x03) */ +#define PORT2_HWSEL_HW7_Pos (14UL) /*!< PORT2 HWSEL: HW7 (Bit 14) */ +#define PORT2_HWSEL_HW7_Msk (0xc000UL) /*!< PORT2 HWSEL: HW7 (Bitfield-Mask: 0x03) */ +#define PORT2_HWSEL_HW8_Pos (16UL) /*!< PORT2 HWSEL: HW8 (Bit 16) */ +#define PORT2_HWSEL_HW8_Msk (0x30000UL) /*!< PORT2 HWSEL: HW8 (Bitfield-Mask: 0x03) */ +#define PORT2_HWSEL_HW9_Pos (18UL) /*!< PORT2 HWSEL: HW9 (Bit 18) */ +#define PORT2_HWSEL_HW9_Msk (0xc0000UL) /*!< PORT2 HWSEL: HW9 (Bitfield-Mask: 0x03) */ +#define PORT2_HWSEL_HW10_Pos (20UL) /*!< PORT2 HWSEL: HW10 (Bit 20) */ +#define PORT2_HWSEL_HW10_Msk (0x300000UL) /*!< PORT2 HWSEL: HW10 (Bitfield-Mask: 0x03) */ +#define PORT2_HWSEL_HW11_Pos (22UL) /*!< PORT2 HWSEL: HW11 (Bit 22) */ +#define PORT2_HWSEL_HW11_Msk (0xc00000UL) /*!< PORT2 HWSEL: HW11 (Bitfield-Mask: 0x03) */ +#define PORT2_HWSEL_HW12_Pos (24UL) /*!< PORT2 HWSEL: HW12 (Bit 24) */ +#define PORT2_HWSEL_HW12_Msk (0x3000000UL) /*!< PORT2 HWSEL: HW12 (Bitfield-Mask: 0x03) */ +#define PORT2_HWSEL_HW13_Pos (26UL) /*!< PORT2 HWSEL: HW13 (Bit 26) */ +#define PORT2_HWSEL_HW13_Msk (0xc000000UL) /*!< PORT2 HWSEL: HW13 (Bitfield-Mask: 0x03) */ +#define PORT2_HWSEL_HW14_Pos (28UL) /*!< PORT2 HWSEL: HW14 (Bit 28) */ +#define PORT2_HWSEL_HW14_Msk (0x30000000UL) /*!< PORT2 HWSEL: HW14 (Bitfield-Mask: 0x03) */ +#define PORT2_HWSEL_HW15_Pos (30UL) /*!< PORT2 HWSEL: HW15 (Bit 30) */ +#define PORT2_HWSEL_HW15_Msk (0xc0000000UL) /*!< PORT2 HWSEL: HW15 (Bitfield-Mask: 0x03) */ + + +/* ================================================================================ */ +/* ================ struct 'PORT3' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ---------------------------------- PORT3_OUT --------------------------------- */ +#define PORT3_OUT_P0_Pos (0UL) /*!< PORT3 OUT: P0 (Bit 0) */ +#define PORT3_OUT_P0_Msk (0x1UL) /*!< PORT3 OUT: P0 (Bitfield-Mask: 0x01) */ +#define PORT3_OUT_P1_Pos (1UL) /*!< PORT3 OUT: P1 (Bit 1) */ +#define PORT3_OUT_P1_Msk (0x2UL) /*!< PORT3 OUT: P1 (Bitfield-Mask: 0x01) */ +#define PORT3_OUT_P2_Pos (2UL) /*!< PORT3 OUT: P2 (Bit 2) */ +#define PORT3_OUT_P2_Msk (0x4UL) /*!< PORT3 OUT: P2 (Bitfield-Mask: 0x01) */ +#define PORT3_OUT_P3_Pos (3UL) /*!< PORT3 OUT: P3 (Bit 3) */ +#define PORT3_OUT_P3_Msk (0x8UL) /*!< PORT3 OUT: P3 (Bitfield-Mask: 0x01) */ +#define PORT3_OUT_P4_Pos (4UL) /*!< PORT3 OUT: P4 (Bit 4) */ +#define PORT3_OUT_P4_Msk (0x10UL) /*!< PORT3 OUT: P4 (Bitfield-Mask: 0x01) */ +#define PORT3_OUT_P5_Pos (5UL) /*!< PORT3 OUT: P5 (Bit 5) */ +#define PORT3_OUT_P5_Msk (0x20UL) /*!< PORT3 OUT: P5 (Bitfield-Mask: 0x01) */ +#define PORT3_OUT_P6_Pos (6UL) /*!< PORT3 OUT: P6 (Bit 6) */ +#define PORT3_OUT_P6_Msk (0x40UL) /*!< PORT3 OUT: P6 (Bitfield-Mask: 0x01) */ +#define PORT3_OUT_P7_Pos (7UL) /*!< PORT3 OUT: P7 (Bit 7) */ +#define PORT3_OUT_P7_Msk (0x80UL) /*!< PORT3 OUT: P7 (Bitfield-Mask: 0x01) */ +#define PORT3_OUT_P8_Pos (8UL) /*!< PORT3 OUT: P8 (Bit 8) */ +#define PORT3_OUT_P8_Msk (0x100UL) /*!< PORT3 OUT: P8 (Bitfield-Mask: 0x01) */ +#define PORT3_OUT_P9_Pos (9UL) /*!< PORT3 OUT: P9 (Bit 9) */ +#define PORT3_OUT_P9_Msk (0x200UL) /*!< PORT3 OUT: P9 (Bitfield-Mask: 0x01) */ +#define PORT3_OUT_P10_Pos (10UL) /*!< PORT3 OUT: P10 (Bit 10) */ +#define PORT3_OUT_P10_Msk (0x400UL) /*!< PORT3 OUT: P10 (Bitfield-Mask: 0x01) */ +#define PORT3_OUT_P11_Pos (11UL) /*!< PORT3 OUT: P11 (Bit 11) */ +#define PORT3_OUT_P11_Msk (0x800UL) /*!< PORT3 OUT: P11 (Bitfield-Mask: 0x01) */ +#define PORT3_OUT_P12_Pos (12UL) /*!< PORT3 OUT: P12 (Bit 12) */ +#define PORT3_OUT_P12_Msk (0x1000UL) /*!< PORT3 OUT: P12 (Bitfield-Mask: 0x01) */ +#define PORT3_OUT_P13_Pos (13UL) /*!< PORT3 OUT: P13 (Bit 13) */ +#define PORT3_OUT_P13_Msk (0x2000UL) /*!< PORT3 OUT: P13 (Bitfield-Mask: 0x01) */ +#define PORT3_OUT_P14_Pos (14UL) /*!< PORT3 OUT: P14 (Bit 14) */ +#define PORT3_OUT_P14_Msk (0x4000UL) /*!< PORT3 OUT: P14 (Bitfield-Mask: 0x01) */ +#define PORT3_OUT_P15_Pos (15UL) /*!< PORT3 OUT: P15 (Bit 15) */ +#define PORT3_OUT_P15_Msk (0x8000UL) /*!< PORT3 OUT: P15 (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- PORT3_OMR --------------------------------- */ +#define PORT3_OMR_PS0_Pos (0UL) /*!< PORT3 OMR: PS0 (Bit 0) */ +#define PORT3_OMR_PS0_Msk (0x1UL) /*!< PORT3 OMR: PS0 (Bitfield-Mask: 0x01) */ +#define PORT3_OMR_PS1_Pos (1UL) /*!< PORT3 OMR: PS1 (Bit 1) */ +#define PORT3_OMR_PS1_Msk (0x2UL) /*!< PORT3 OMR: PS1 (Bitfield-Mask: 0x01) */ +#define PORT3_OMR_PS2_Pos (2UL) /*!< PORT3 OMR: PS2 (Bit 2) */ +#define PORT3_OMR_PS2_Msk (0x4UL) /*!< PORT3 OMR: PS2 (Bitfield-Mask: 0x01) */ +#define PORT3_OMR_PS3_Pos (3UL) /*!< PORT3 OMR: PS3 (Bit 3) */ +#define PORT3_OMR_PS3_Msk (0x8UL) /*!< PORT3 OMR: PS3 (Bitfield-Mask: 0x01) */ +#define PORT3_OMR_PS4_Pos (4UL) /*!< PORT3 OMR: PS4 (Bit 4) */ +#define PORT3_OMR_PS4_Msk (0x10UL) /*!< PORT3 OMR: PS4 (Bitfield-Mask: 0x01) */ +#define PORT3_OMR_PS5_Pos (5UL) /*!< PORT3 OMR: PS5 (Bit 5) */ +#define PORT3_OMR_PS5_Msk (0x20UL) /*!< PORT3 OMR: PS5 (Bitfield-Mask: 0x01) */ +#define PORT3_OMR_PS6_Pos (6UL) /*!< PORT3 OMR: PS6 (Bit 6) */ +#define PORT3_OMR_PS6_Msk (0x40UL) /*!< PORT3 OMR: PS6 (Bitfield-Mask: 0x01) */ +#define PORT3_OMR_PS7_Pos (7UL) /*!< PORT3 OMR: PS7 (Bit 7) */ +#define PORT3_OMR_PS7_Msk (0x80UL) /*!< PORT3 OMR: PS7 (Bitfield-Mask: 0x01) */ +#define PORT3_OMR_PS8_Pos (8UL) /*!< PORT3 OMR: PS8 (Bit 8) */ +#define PORT3_OMR_PS8_Msk (0x100UL) /*!< PORT3 OMR: PS8 (Bitfield-Mask: 0x01) */ +#define PORT3_OMR_PS9_Pos (9UL) /*!< PORT3 OMR: PS9 (Bit 9) */ +#define PORT3_OMR_PS9_Msk (0x200UL) /*!< PORT3 OMR: PS9 (Bitfield-Mask: 0x01) */ +#define PORT3_OMR_PS10_Pos (10UL) /*!< PORT3 OMR: PS10 (Bit 10) */ +#define PORT3_OMR_PS10_Msk (0x400UL) /*!< PORT3 OMR: PS10 (Bitfield-Mask: 0x01) */ +#define PORT3_OMR_PS11_Pos (11UL) /*!< PORT3 OMR: PS11 (Bit 11) */ +#define PORT3_OMR_PS11_Msk (0x800UL) /*!< PORT3 OMR: PS11 (Bitfield-Mask: 0x01) */ +#define PORT3_OMR_PS12_Pos (12UL) /*!< PORT3 OMR: PS12 (Bit 12) */ +#define PORT3_OMR_PS12_Msk (0x1000UL) /*!< PORT3 OMR: PS12 (Bitfield-Mask: 0x01) */ +#define PORT3_OMR_PS13_Pos (13UL) /*!< PORT3 OMR: PS13 (Bit 13) */ +#define PORT3_OMR_PS13_Msk (0x2000UL) /*!< PORT3 OMR: PS13 (Bitfield-Mask: 0x01) */ +#define PORT3_OMR_PS14_Pos (14UL) /*!< PORT3 OMR: PS14 (Bit 14) */ +#define PORT3_OMR_PS14_Msk (0x4000UL) /*!< PORT3 OMR: PS14 (Bitfield-Mask: 0x01) */ +#define PORT3_OMR_PS15_Pos (15UL) /*!< PORT3 OMR: PS15 (Bit 15) */ +#define PORT3_OMR_PS15_Msk (0x8000UL) /*!< PORT3 OMR: PS15 (Bitfield-Mask: 0x01) */ +#define PORT3_OMR_PR0_Pos (16UL) /*!< PORT3 OMR: PR0 (Bit 16) */ +#define PORT3_OMR_PR0_Msk (0x10000UL) /*!< PORT3 OMR: PR0 (Bitfield-Mask: 0x01) */ +#define PORT3_OMR_PR1_Pos (17UL) /*!< PORT3 OMR: PR1 (Bit 17) */ +#define PORT3_OMR_PR1_Msk (0x20000UL) /*!< PORT3 OMR: PR1 (Bitfield-Mask: 0x01) */ +#define PORT3_OMR_PR2_Pos (18UL) /*!< PORT3 OMR: PR2 (Bit 18) */ +#define PORT3_OMR_PR2_Msk (0x40000UL) /*!< PORT3 OMR: PR2 (Bitfield-Mask: 0x01) */ +#define PORT3_OMR_PR3_Pos (19UL) /*!< PORT3 OMR: PR3 (Bit 19) */ +#define PORT3_OMR_PR3_Msk (0x80000UL) /*!< PORT3 OMR: PR3 (Bitfield-Mask: 0x01) */ +#define PORT3_OMR_PR4_Pos (20UL) /*!< PORT3 OMR: PR4 (Bit 20) */ +#define PORT3_OMR_PR4_Msk (0x100000UL) /*!< PORT3 OMR: PR4 (Bitfield-Mask: 0x01) */ +#define PORT3_OMR_PR5_Pos (21UL) /*!< PORT3 OMR: PR5 (Bit 21) */ +#define PORT3_OMR_PR5_Msk (0x200000UL) /*!< PORT3 OMR: PR5 (Bitfield-Mask: 0x01) */ +#define PORT3_OMR_PR6_Pos (22UL) /*!< PORT3 OMR: PR6 (Bit 22) */ +#define PORT3_OMR_PR6_Msk (0x400000UL) /*!< PORT3 OMR: PR6 (Bitfield-Mask: 0x01) */ +#define PORT3_OMR_PR7_Pos (23UL) /*!< PORT3 OMR: PR7 (Bit 23) */ +#define PORT3_OMR_PR7_Msk (0x800000UL) /*!< PORT3 OMR: PR7 (Bitfield-Mask: 0x01) */ +#define PORT3_OMR_PR8_Pos (24UL) /*!< PORT3 OMR: PR8 (Bit 24) */ +#define PORT3_OMR_PR8_Msk (0x1000000UL) /*!< PORT3 OMR: PR8 (Bitfield-Mask: 0x01) */ +#define PORT3_OMR_PR9_Pos (25UL) /*!< PORT3 OMR: PR9 (Bit 25) */ +#define PORT3_OMR_PR9_Msk (0x2000000UL) /*!< PORT3 OMR: PR9 (Bitfield-Mask: 0x01) */ +#define PORT3_OMR_PR10_Pos (26UL) /*!< PORT3 OMR: PR10 (Bit 26) */ +#define PORT3_OMR_PR10_Msk (0x4000000UL) /*!< PORT3 OMR: PR10 (Bitfield-Mask: 0x01) */ +#define PORT3_OMR_PR11_Pos (27UL) /*!< PORT3 OMR: PR11 (Bit 27) */ +#define PORT3_OMR_PR11_Msk (0x8000000UL) /*!< PORT3 OMR: PR11 (Bitfield-Mask: 0x01) */ +#define PORT3_OMR_PR12_Pos (28UL) /*!< PORT3 OMR: PR12 (Bit 28) */ +#define PORT3_OMR_PR12_Msk (0x10000000UL) /*!< PORT3 OMR: PR12 (Bitfield-Mask: 0x01) */ +#define PORT3_OMR_PR13_Pos (29UL) /*!< PORT3 OMR: PR13 (Bit 29) */ +#define PORT3_OMR_PR13_Msk (0x20000000UL) /*!< PORT3 OMR: PR13 (Bitfield-Mask: 0x01) */ +#define PORT3_OMR_PR14_Pos (30UL) /*!< PORT3 OMR: PR14 (Bit 30) */ +#define PORT3_OMR_PR14_Msk (0x40000000UL) /*!< PORT3 OMR: PR14 (Bitfield-Mask: 0x01) */ +#define PORT3_OMR_PR15_Pos (31UL) /*!< PORT3 OMR: PR15 (Bit 31) */ +#define PORT3_OMR_PR15_Msk (0x80000000UL) /*!< PORT3 OMR: PR15 (Bitfield-Mask: 0x01) */ + +/* --------------------------------- PORT3_IOCR0 -------------------------------- */ +#define PORT3_IOCR0_PC0_Pos (3UL) /*!< PORT3 IOCR0: PC0 (Bit 3) */ +#define PORT3_IOCR0_PC0_Msk (0xf8UL) /*!< PORT3 IOCR0: PC0 (Bitfield-Mask: 0x1f) */ +#define PORT3_IOCR0_PC1_Pos (11UL) /*!< PORT3 IOCR0: PC1 (Bit 11) */ +#define PORT3_IOCR0_PC1_Msk (0xf800UL) /*!< PORT3 IOCR0: PC1 (Bitfield-Mask: 0x1f) */ +#define PORT3_IOCR0_PC2_Pos (19UL) /*!< PORT3 IOCR0: PC2 (Bit 19) */ +#define PORT3_IOCR0_PC2_Msk (0xf80000UL) /*!< PORT3 IOCR0: PC2 (Bitfield-Mask: 0x1f) */ +#define PORT3_IOCR0_PC3_Pos (27UL) /*!< PORT3 IOCR0: PC3 (Bit 27) */ +#define PORT3_IOCR0_PC3_Msk (0xf8000000UL) /*!< PORT3 IOCR0: PC3 (Bitfield-Mask: 0x1f) */ + +/* --------------------------------- PORT3_IOCR4 -------------------------------- */ +#define PORT3_IOCR4_PC4_Pos (3UL) /*!< PORT3 IOCR4: PC4 (Bit 3) */ +#define PORT3_IOCR4_PC4_Msk (0xf8UL) /*!< PORT3 IOCR4: PC4 (Bitfield-Mask: 0x1f) */ +#define PORT3_IOCR4_PC5_Pos (11UL) /*!< PORT3 IOCR4: PC5 (Bit 11) */ +#define PORT3_IOCR4_PC5_Msk (0xf800UL) /*!< PORT3 IOCR4: PC5 (Bitfield-Mask: 0x1f) */ +#define PORT3_IOCR4_PC6_Pos (19UL) /*!< PORT3 IOCR4: PC6 (Bit 19) */ +#define PORT3_IOCR4_PC6_Msk (0xf80000UL) /*!< PORT3 IOCR4: PC6 (Bitfield-Mask: 0x1f) */ +#define PORT3_IOCR4_PC7_Pos (27UL) /*!< PORT3 IOCR4: PC7 (Bit 27) */ +#define PORT3_IOCR4_PC7_Msk (0xf8000000UL) /*!< PORT3 IOCR4: PC7 (Bitfield-Mask: 0x1f) */ + +/* --------------------------------- PORT3_IOCR8 -------------------------------- */ +#define PORT3_IOCR8_PC8_Pos (3UL) /*!< PORT3 IOCR8: PC8 (Bit 3) */ +#define PORT3_IOCR8_PC8_Msk (0xf8UL) /*!< PORT3 IOCR8: PC8 (Bitfield-Mask: 0x1f) */ +#define PORT3_IOCR8_PC9_Pos (11UL) /*!< PORT3 IOCR8: PC9 (Bit 11) */ +#define PORT3_IOCR8_PC9_Msk (0xf800UL) /*!< PORT3 IOCR8: PC9 (Bitfield-Mask: 0x1f) */ +#define PORT3_IOCR8_PC10_Pos (19UL) /*!< PORT3 IOCR8: PC10 (Bit 19) */ +#define PORT3_IOCR8_PC10_Msk (0xf80000UL) /*!< PORT3 IOCR8: PC10 (Bitfield-Mask: 0x1f) */ +#define PORT3_IOCR8_PC11_Pos (27UL) /*!< PORT3 IOCR8: PC11 (Bit 27) */ +#define PORT3_IOCR8_PC11_Msk (0xf8000000UL) /*!< PORT3 IOCR8: PC11 (Bitfield-Mask: 0x1f) */ + +/* -------------------------------- PORT3_IOCR12 -------------------------------- */ +#define PORT3_IOCR12_PC12_Pos (3UL) /*!< PORT3 IOCR12: PC12 (Bit 3) */ +#define PORT3_IOCR12_PC12_Msk (0xf8UL) /*!< PORT3 IOCR12: PC12 (Bitfield-Mask: 0x1f) */ +#define PORT3_IOCR12_PC13_Pos (11UL) /*!< PORT3 IOCR12: PC13 (Bit 11) */ +#define PORT3_IOCR12_PC13_Msk (0xf800UL) /*!< PORT3 IOCR12: PC13 (Bitfield-Mask: 0x1f) */ +#define PORT3_IOCR12_PC14_Pos (19UL) /*!< PORT3 IOCR12: PC14 (Bit 19) */ +#define PORT3_IOCR12_PC14_Msk (0xf80000UL) /*!< PORT3 IOCR12: PC14 (Bitfield-Mask: 0x1f) */ +#define PORT3_IOCR12_PC15_Pos (27UL) /*!< PORT3 IOCR12: PC15 (Bit 27) */ +#define PORT3_IOCR12_PC15_Msk (0xf8000000UL) /*!< PORT3 IOCR12: PC15 (Bitfield-Mask: 0x1f) */ + +/* ---------------------------------- PORT3_IN ---------------------------------- */ +#define PORT3_IN_P0_Pos (0UL) /*!< PORT3 IN: P0 (Bit 0) */ +#define PORT3_IN_P0_Msk (0x1UL) /*!< PORT3 IN: P0 (Bitfield-Mask: 0x01) */ +#define PORT3_IN_P1_Pos (1UL) /*!< PORT3 IN: P1 (Bit 1) */ +#define PORT3_IN_P1_Msk (0x2UL) /*!< PORT3 IN: P1 (Bitfield-Mask: 0x01) */ +#define PORT3_IN_P2_Pos (2UL) /*!< PORT3 IN: P2 (Bit 2) */ +#define PORT3_IN_P2_Msk (0x4UL) /*!< PORT3 IN: P2 (Bitfield-Mask: 0x01) */ +#define PORT3_IN_P3_Pos (3UL) /*!< PORT3 IN: P3 (Bit 3) */ +#define PORT3_IN_P3_Msk (0x8UL) /*!< PORT3 IN: P3 (Bitfield-Mask: 0x01) */ +#define PORT3_IN_P4_Pos (4UL) /*!< PORT3 IN: P4 (Bit 4) */ +#define PORT3_IN_P4_Msk (0x10UL) /*!< PORT3 IN: P4 (Bitfield-Mask: 0x01) */ +#define PORT3_IN_P5_Pos (5UL) /*!< PORT3 IN: P5 (Bit 5) */ +#define PORT3_IN_P5_Msk (0x20UL) /*!< PORT3 IN: P5 (Bitfield-Mask: 0x01) */ +#define PORT3_IN_P6_Pos (6UL) /*!< PORT3 IN: P6 (Bit 6) */ +#define PORT3_IN_P6_Msk (0x40UL) /*!< PORT3 IN: P6 (Bitfield-Mask: 0x01) */ +#define PORT3_IN_P7_Pos (7UL) /*!< PORT3 IN: P7 (Bit 7) */ +#define PORT3_IN_P7_Msk (0x80UL) /*!< PORT3 IN: P7 (Bitfield-Mask: 0x01) */ +#define PORT3_IN_P8_Pos (8UL) /*!< PORT3 IN: P8 (Bit 8) */ +#define PORT3_IN_P8_Msk (0x100UL) /*!< PORT3 IN: P8 (Bitfield-Mask: 0x01) */ +#define PORT3_IN_P9_Pos (9UL) /*!< PORT3 IN: P9 (Bit 9) */ +#define PORT3_IN_P9_Msk (0x200UL) /*!< PORT3 IN: P9 (Bitfield-Mask: 0x01) */ +#define PORT3_IN_P10_Pos (10UL) /*!< PORT3 IN: P10 (Bit 10) */ +#define PORT3_IN_P10_Msk (0x400UL) /*!< PORT3 IN: P10 (Bitfield-Mask: 0x01) */ +#define PORT3_IN_P11_Pos (11UL) /*!< PORT3 IN: P11 (Bit 11) */ +#define PORT3_IN_P11_Msk (0x800UL) /*!< PORT3 IN: P11 (Bitfield-Mask: 0x01) */ +#define PORT3_IN_P12_Pos (12UL) /*!< PORT3 IN: P12 (Bit 12) */ +#define PORT3_IN_P12_Msk (0x1000UL) /*!< PORT3 IN: P12 (Bitfield-Mask: 0x01) */ +#define PORT3_IN_P13_Pos (13UL) /*!< PORT3 IN: P13 (Bit 13) */ +#define PORT3_IN_P13_Msk (0x2000UL) /*!< PORT3 IN: P13 (Bitfield-Mask: 0x01) */ +#define PORT3_IN_P14_Pos (14UL) /*!< PORT3 IN: P14 (Bit 14) */ +#define PORT3_IN_P14_Msk (0x4000UL) /*!< PORT3 IN: P14 (Bitfield-Mask: 0x01) */ +#define PORT3_IN_P15_Pos (15UL) /*!< PORT3 IN: P15 (Bit 15) */ +#define PORT3_IN_P15_Msk (0x8000UL) /*!< PORT3 IN: P15 (Bitfield-Mask: 0x01) */ + +/* --------------------------------- PORT3_PDR0 --------------------------------- */ +#define PORT3_PDR0_PD0_Pos (0UL) /*!< PORT3 PDR0: PD0 (Bit 0) */ +#define PORT3_PDR0_PD0_Msk (0x7UL) /*!< PORT3 PDR0: PD0 (Bitfield-Mask: 0x07) */ +#define PORT3_PDR0_PD1_Pos (4UL) /*!< PORT3 PDR0: PD1 (Bit 4) */ +#define PORT3_PDR0_PD1_Msk (0x70UL) /*!< PORT3 PDR0: PD1 (Bitfield-Mask: 0x07) */ +#define PORT3_PDR0_PD2_Pos (8UL) /*!< PORT3 PDR0: PD2 (Bit 8) */ +#define PORT3_PDR0_PD2_Msk (0x700UL) /*!< PORT3 PDR0: PD2 (Bitfield-Mask: 0x07) */ +#define PORT3_PDR0_PD3_Pos (12UL) /*!< PORT3 PDR0: PD3 (Bit 12) */ +#define PORT3_PDR0_PD3_Msk (0x7000UL) /*!< PORT3 PDR0: PD3 (Bitfield-Mask: 0x07) */ +#define PORT3_PDR0_PD4_Pos (16UL) /*!< PORT3 PDR0: PD4 (Bit 16) */ +#define PORT3_PDR0_PD4_Msk (0x70000UL) /*!< PORT3 PDR0: PD4 (Bitfield-Mask: 0x07) */ +#define PORT3_PDR0_PD5_Pos (20UL) /*!< PORT3 PDR0: PD5 (Bit 20) */ +#define PORT3_PDR0_PD5_Msk (0x700000UL) /*!< PORT3 PDR0: PD5 (Bitfield-Mask: 0x07) */ +#define PORT3_PDR0_PD6_Pos (24UL) /*!< PORT3 PDR0: PD6 (Bit 24) */ +#define PORT3_PDR0_PD6_Msk (0x7000000UL) /*!< PORT3 PDR0: PD6 (Bitfield-Mask: 0x07) */ +#define PORT3_PDR0_PD7_Pos (28UL) /*!< PORT3 PDR0: PD7 (Bit 28) */ +#define PORT3_PDR0_PD7_Msk (0x70000000UL) /*!< PORT3 PDR0: PD7 (Bitfield-Mask: 0x07) */ + +/* --------------------------------- PORT3_PDR1 --------------------------------- */ +#define PORT3_PDR1_PD8_Pos (0UL) /*!< PORT3 PDR1: PD8 (Bit 0) */ +#define PORT3_PDR1_PD8_Msk (0x7UL) /*!< PORT3 PDR1: PD8 (Bitfield-Mask: 0x07) */ +#define PORT3_PDR1_PD9_Pos (4UL) /*!< PORT3 PDR1: PD9 (Bit 4) */ +#define PORT3_PDR1_PD9_Msk (0x70UL) /*!< PORT3 PDR1: PD9 (Bitfield-Mask: 0x07) */ +#define PORT3_PDR1_PD10_Pos (8UL) /*!< PORT3 PDR1: PD10 (Bit 8) */ +#define PORT3_PDR1_PD10_Msk (0x700UL) /*!< PORT3 PDR1: PD10 (Bitfield-Mask: 0x07) */ +#define PORT3_PDR1_PD11_Pos (12UL) /*!< PORT3 PDR1: PD11 (Bit 12) */ +#define PORT3_PDR1_PD11_Msk (0x7000UL) /*!< PORT3 PDR1: PD11 (Bitfield-Mask: 0x07) */ +#define PORT3_PDR1_PD12_Pos (16UL) /*!< PORT3 PDR1: PD12 (Bit 16) */ +#define PORT3_PDR1_PD12_Msk (0x70000UL) /*!< PORT3 PDR1: PD12 (Bitfield-Mask: 0x07) */ +#define PORT3_PDR1_PD13_Pos (20UL) /*!< PORT3 PDR1: PD13 (Bit 20) */ +#define PORT3_PDR1_PD13_Msk (0x700000UL) /*!< PORT3 PDR1: PD13 (Bitfield-Mask: 0x07) */ +#define PORT3_PDR1_PD14_Pos (24UL) /*!< PORT3 PDR1: PD14 (Bit 24) */ +#define PORT3_PDR1_PD14_Msk (0x7000000UL) /*!< PORT3 PDR1: PD14 (Bitfield-Mask: 0x07) */ +#define PORT3_PDR1_PD15_Pos (28UL) /*!< PORT3 PDR1: PD15 (Bit 28) */ +#define PORT3_PDR1_PD15_Msk (0x70000000UL) /*!< PORT3 PDR1: PD15 (Bitfield-Mask: 0x07) */ + +/* --------------------------------- PORT3_PDISC -------------------------------- */ +#define PORT3_PDISC_PDIS0_Pos (0UL) /*!< PORT3 PDISC: PDIS0 (Bit 0) */ +#define PORT3_PDISC_PDIS0_Msk (0x1UL) /*!< PORT3 PDISC: PDIS0 (Bitfield-Mask: 0x01) */ +#define PORT3_PDISC_PDIS1_Pos (1UL) /*!< PORT3 PDISC: PDIS1 (Bit 1) */ +#define PORT3_PDISC_PDIS1_Msk (0x2UL) /*!< PORT3 PDISC: PDIS1 (Bitfield-Mask: 0x01) */ +#define PORT3_PDISC_PDIS2_Pos (2UL) /*!< PORT3 PDISC: PDIS2 (Bit 2) */ +#define PORT3_PDISC_PDIS2_Msk (0x4UL) /*!< PORT3 PDISC: PDIS2 (Bitfield-Mask: 0x01) */ +#define PORT3_PDISC_PDIS3_Pos (3UL) /*!< PORT3 PDISC: PDIS3 (Bit 3) */ +#define PORT3_PDISC_PDIS3_Msk (0x8UL) /*!< PORT3 PDISC: PDIS3 (Bitfield-Mask: 0x01) */ +#define PORT3_PDISC_PDIS4_Pos (4UL) /*!< PORT3 PDISC: PDIS4 (Bit 4) */ +#define PORT3_PDISC_PDIS4_Msk (0x10UL) /*!< PORT3 PDISC: PDIS4 (Bitfield-Mask: 0x01) */ +#define PORT3_PDISC_PDIS5_Pos (5UL) /*!< PORT3 PDISC: PDIS5 (Bit 5) */ +#define PORT3_PDISC_PDIS5_Msk (0x20UL) /*!< PORT3 PDISC: PDIS5 (Bitfield-Mask: 0x01) */ +#define PORT3_PDISC_PDIS6_Pos (6UL) /*!< PORT3 PDISC: PDIS6 (Bit 6) */ +#define PORT3_PDISC_PDIS6_Msk (0x40UL) /*!< PORT3 PDISC: PDIS6 (Bitfield-Mask: 0x01) */ +#define PORT3_PDISC_PDIS7_Pos (7UL) /*!< PORT3 PDISC: PDIS7 (Bit 7) */ +#define PORT3_PDISC_PDIS7_Msk (0x80UL) /*!< PORT3 PDISC: PDIS7 (Bitfield-Mask: 0x01) */ +#define PORT3_PDISC_PDIS8_Pos (8UL) /*!< PORT3 PDISC: PDIS8 (Bit 8) */ +#define PORT3_PDISC_PDIS8_Msk (0x100UL) /*!< PORT3 PDISC: PDIS8 (Bitfield-Mask: 0x01) */ +#define PORT3_PDISC_PDIS9_Pos (9UL) /*!< PORT3 PDISC: PDIS9 (Bit 9) */ +#define PORT3_PDISC_PDIS9_Msk (0x200UL) /*!< PORT3 PDISC: PDIS9 (Bitfield-Mask: 0x01) */ +#define PORT3_PDISC_PDIS10_Pos (10UL) /*!< PORT3 PDISC: PDIS10 (Bit 10) */ +#define PORT3_PDISC_PDIS10_Msk (0x400UL) /*!< PORT3 PDISC: PDIS10 (Bitfield-Mask: 0x01) */ +#define PORT3_PDISC_PDIS11_Pos (11UL) /*!< PORT3 PDISC: PDIS11 (Bit 11) */ +#define PORT3_PDISC_PDIS11_Msk (0x800UL) /*!< PORT3 PDISC: PDIS11 (Bitfield-Mask: 0x01) */ +#define PORT3_PDISC_PDIS12_Pos (12UL) /*!< PORT3 PDISC: PDIS12 (Bit 12) */ +#define PORT3_PDISC_PDIS12_Msk (0x1000UL) /*!< PORT3 PDISC: PDIS12 (Bitfield-Mask: 0x01) */ +#define PORT3_PDISC_PDIS13_Pos (13UL) /*!< PORT3 PDISC: PDIS13 (Bit 13) */ +#define PORT3_PDISC_PDIS13_Msk (0x2000UL) /*!< PORT3 PDISC: PDIS13 (Bitfield-Mask: 0x01) */ +#define PORT3_PDISC_PDIS14_Pos (14UL) /*!< PORT3 PDISC: PDIS14 (Bit 14) */ +#define PORT3_PDISC_PDIS14_Msk (0x4000UL) /*!< PORT3 PDISC: PDIS14 (Bitfield-Mask: 0x01) */ +#define PORT3_PDISC_PDIS15_Pos (15UL) /*!< PORT3 PDISC: PDIS15 (Bit 15) */ +#define PORT3_PDISC_PDIS15_Msk (0x8000UL) /*!< PORT3 PDISC: PDIS15 (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- PORT3_PPS --------------------------------- */ +#define PORT3_PPS_PPS0_Pos (0UL) /*!< PORT3 PPS: PPS0 (Bit 0) */ +#define PORT3_PPS_PPS0_Msk (0x1UL) /*!< PORT3 PPS: PPS0 (Bitfield-Mask: 0x01) */ +#define PORT3_PPS_PPS1_Pos (1UL) /*!< PORT3 PPS: PPS1 (Bit 1) */ +#define PORT3_PPS_PPS1_Msk (0x2UL) /*!< PORT3 PPS: PPS1 (Bitfield-Mask: 0x01) */ +#define PORT3_PPS_PPS2_Pos (2UL) /*!< PORT3 PPS: PPS2 (Bit 2) */ +#define PORT3_PPS_PPS2_Msk (0x4UL) /*!< PORT3 PPS: PPS2 (Bitfield-Mask: 0x01) */ +#define PORT3_PPS_PPS3_Pos (3UL) /*!< PORT3 PPS: PPS3 (Bit 3) */ +#define PORT3_PPS_PPS3_Msk (0x8UL) /*!< PORT3 PPS: PPS3 (Bitfield-Mask: 0x01) */ +#define PORT3_PPS_PPS4_Pos (4UL) /*!< PORT3 PPS: PPS4 (Bit 4) */ +#define PORT3_PPS_PPS4_Msk (0x10UL) /*!< PORT3 PPS: PPS4 (Bitfield-Mask: 0x01) */ +#define PORT3_PPS_PPS5_Pos (5UL) /*!< PORT3 PPS: PPS5 (Bit 5) */ +#define PORT3_PPS_PPS5_Msk (0x20UL) /*!< PORT3 PPS: PPS5 (Bitfield-Mask: 0x01) */ +#define PORT3_PPS_PPS6_Pos (6UL) /*!< PORT3 PPS: PPS6 (Bit 6) */ +#define PORT3_PPS_PPS6_Msk (0x40UL) /*!< PORT3 PPS: PPS6 (Bitfield-Mask: 0x01) */ +#define PORT3_PPS_PPS7_Pos (7UL) /*!< PORT3 PPS: PPS7 (Bit 7) */ +#define PORT3_PPS_PPS7_Msk (0x80UL) /*!< PORT3 PPS: PPS7 (Bitfield-Mask: 0x01) */ +#define PORT3_PPS_PPS8_Pos (8UL) /*!< PORT3 PPS: PPS8 (Bit 8) */ +#define PORT3_PPS_PPS8_Msk (0x100UL) /*!< PORT3 PPS: PPS8 (Bitfield-Mask: 0x01) */ +#define PORT3_PPS_PPS9_Pos (9UL) /*!< PORT3 PPS: PPS9 (Bit 9) */ +#define PORT3_PPS_PPS9_Msk (0x200UL) /*!< PORT3 PPS: PPS9 (Bitfield-Mask: 0x01) */ +#define PORT3_PPS_PPS10_Pos (10UL) /*!< PORT3 PPS: PPS10 (Bit 10) */ +#define PORT3_PPS_PPS10_Msk (0x400UL) /*!< PORT3 PPS: PPS10 (Bitfield-Mask: 0x01) */ +#define PORT3_PPS_PPS11_Pos (11UL) /*!< PORT3 PPS: PPS11 (Bit 11) */ +#define PORT3_PPS_PPS11_Msk (0x800UL) /*!< PORT3 PPS: PPS11 (Bitfield-Mask: 0x01) */ +#define PORT3_PPS_PPS12_Pos (12UL) /*!< PORT3 PPS: PPS12 (Bit 12) */ +#define PORT3_PPS_PPS12_Msk (0x1000UL) /*!< PORT3 PPS: PPS12 (Bitfield-Mask: 0x01) */ +#define PORT3_PPS_PPS13_Pos (13UL) /*!< PORT3 PPS: PPS13 (Bit 13) */ +#define PORT3_PPS_PPS13_Msk (0x2000UL) /*!< PORT3 PPS: PPS13 (Bitfield-Mask: 0x01) */ +#define PORT3_PPS_PPS14_Pos (14UL) /*!< PORT3 PPS: PPS14 (Bit 14) */ +#define PORT3_PPS_PPS14_Msk (0x4000UL) /*!< PORT3 PPS: PPS14 (Bitfield-Mask: 0x01) */ +#define PORT3_PPS_PPS15_Pos (15UL) /*!< PORT3 PPS: PPS15 (Bit 15) */ +#define PORT3_PPS_PPS15_Msk (0x8000UL) /*!< PORT3 PPS: PPS15 (Bitfield-Mask: 0x01) */ + +/* --------------------------------- PORT3_HWSEL -------------------------------- */ +#define PORT3_HWSEL_HW0_Pos (0UL) /*!< PORT3 HWSEL: HW0 (Bit 0) */ +#define PORT3_HWSEL_HW0_Msk (0x3UL) /*!< PORT3 HWSEL: HW0 (Bitfield-Mask: 0x03) */ +#define PORT3_HWSEL_HW1_Pos (2UL) /*!< PORT3 HWSEL: HW1 (Bit 2) */ +#define PORT3_HWSEL_HW1_Msk (0xcUL) /*!< PORT3 HWSEL: HW1 (Bitfield-Mask: 0x03) */ +#define PORT3_HWSEL_HW2_Pos (4UL) /*!< PORT3 HWSEL: HW2 (Bit 4) */ +#define PORT3_HWSEL_HW2_Msk (0x30UL) /*!< PORT3 HWSEL: HW2 (Bitfield-Mask: 0x03) */ +#define PORT3_HWSEL_HW3_Pos (6UL) /*!< PORT3 HWSEL: HW3 (Bit 6) */ +#define PORT3_HWSEL_HW3_Msk (0xc0UL) /*!< PORT3 HWSEL: HW3 (Bitfield-Mask: 0x03) */ +#define PORT3_HWSEL_HW4_Pos (8UL) /*!< PORT3 HWSEL: HW4 (Bit 8) */ +#define PORT3_HWSEL_HW4_Msk (0x300UL) /*!< PORT3 HWSEL: HW4 (Bitfield-Mask: 0x03) */ +#define PORT3_HWSEL_HW5_Pos (10UL) /*!< PORT3 HWSEL: HW5 (Bit 10) */ +#define PORT3_HWSEL_HW5_Msk (0xc00UL) /*!< PORT3 HWSEL: HW5 (Bitfield-Mask: 0x03) */ +#define PORT3_HWSEL_HW6_Pos (12UL) /*!< PORT3 HWSEL: HW6 (Bit 12) */ +#define PORT3_HWSEL_HW6_Msk (0x3000UL) /*!< PORT3 HWSEL: HW6 (Bitfield-Mask: 0x03) */ +#define PORT3_HWSEL_HW7_Pos (14UL) /*!< PORT3 HWSEL: HW7 (Bit 14) */ +#define PORT3_HWSEL_HW7_Msk (0xc000UL) /*!< PORT3 HWSEL: HW7 (Bitfield-Mask: 0x03) */ +#define PORT3_HWSEL_HW8_Pos (16UL) /*!< PORT3 HWSEL: HW8 (Bit 16) */ +#define PORT3_HWSEL_HW8_Msk (0x30000UL) /*!< PORT3 HWSEL: HW8 (Bitfield-Mask: 0x03) */ +#define PORT3_HWSEL_HW9_Pos (18UL) /*!< PORT3 HWSEL: HW9 (Bit 18) */ +#define PORT3_HWSEL_HW9_Msk (0xc0000UL) /*!< PORT3 HWSEL: HW9 (Bitfield-Mask: 0x03) */ +#define PORT3_HWSEL_HW10_Pos (20UL) /*!< PORT3 HWSEL: HW10 (Bit 20) */ +#define PORT3_HWSEL_HW10_Msk (0x300000UL) /*!< PORT3 HWSEL: HW10 (Bitfield-Mask: 0x03) */ +#define PORT3_HWSEL_HW11_Pos (22UL) /*!< PORT3 HWSEL: HW11 (Bit 22) */ +#define PORT3_HWSEL_HW11_Msk (0xc00000UL) /*!< PORT3 HWSEL: HW11 (Bitfield-Mask: 0x03) */ +#define PORT3_HWSEL_HW12_Pos (24UL) /*!< PORT3 HWSEL: HW12 (Bit 24) */ +#define PORT3_HWSEL_HW12_Msk (0x3000000UL) /*!< PORT3 HWSEL: HW12 (Bitfield-Mask: 0x03) */ +#define PORT3_HWSEL_HW13_Pos (26UL) /*!< PORT3 HWSEL: HW13 (Bit 26) */ +#define PORT3_HWSEL_HW13_Msk (0xc000000UL) /*!< PORT3 HWSEL: HW13 (Bitfield-Mask: 0x03) */ +#define PORT3_HWSEL_HW14_Pos (28UL) /*!< PORT3 HWSEL: HW14 (Bit 28) */ +#define PORT3_HWSEL_HW14_Msk (0x30000000UL) /*!< PORT3 HWSEL: HW14 (Bitfield-Mask: 0x03) */ +#define PORT3_HWSEL_HW15_Pos (30UL) /*!< PORT3 HWSEL: HW15 (Bit 30) */ +#define PORT3_HWSEL_HW15_Msk (0xc0000000UL) /*!< PORT3 HWSEL: HW15 (Bitfield-Mask: 0x03) */ + + +/* ================================================================================ */ +/* ================ struct 'PORT4' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ---------------------------------- PORT4_OUT --------------------------------- */ +#define PORT4_OUT_P0_Pos (0UL) /*!< PORT4 OUT: P0 (Bit 0) */ +#define PORT4_OUT_P0_Msk (0x1UL) /*!< PORT4 OUT: P0 (Bitfield-Mask: 0x01) */ +#define PORT4_OUT_P1_Pos (1UL) /*!< PORT4 OUT: P1 (Bit 1) */ +#define PORT4_OUT_P1_Msk (0x2UL) /*!< PORT4 OUT: P1 (Bitfield-Mask: 0x01) */ +#define PORT4_OUT_P2_Pos (2UL) /*!< PORT4 OUT: P2 (Bit 2) */ +#define PORT4_OUT_P2_Msk (0x4UL) /*!< PORT4 OUT: P2 (Bitfield-Mask: 0x01) */ +#define PORT4_OUT_P3_Pos (3UL) /*!< PORT4 OUT: P3 (Bit 3) */ +#define PORT4_OUT_P3_Msk (0x8UL) /*!< PORT4 OUT: P3 (Bitfield-Mask: 0x01) */ +#define PORT4_OUT_P4_Pos (4UL) /*!< PORT4 OUT: P4 (Bit 4) */ +#define PORT4_OUT_P4_Msk (0x10UL) /*!< PORT4 OUT: P4 (Bitfield-Mask: 0x01) */ +#define PORT4_OUT_P5_Pos (5UL) /*!< PORT4 OUT: P5 (Bit 5) */ +#define PORT4_OUT_P5_Msk (0x20UL) /*!< PORT4 OUT: P5 (Bitfield-Mask: 0x01) */ +#define PORT4_OUT_P6_Pos (6UL) /*!< PORT4 OUT: P6 (Bit 6) */ +#define PORT4_OUT_P6_Msk (0x40UL) /*!< PORT4 OUT: P6 (Bitfield-Mask: 0x01) */ +#define PORT4_OUT_P7_Pos (7UL) /*!< PORT4 OUT: P7 (Bit 7) */ +#define PORT4_OUT_P7_Msk (0x80UL) /*!< PORT4 OUT: P7 (Bitfield-Mask: 0x01) */ +#define PORT4_OUT_P8_Pos (8UL) /*!< PORT4 OUT: P8 (Bit 8) */ +#define PORT4_OUT_P8_Msk (0x100UL) /*!< PORT4 OUT: P8 (Bitfield-Mask: 0x01) */ +#define PORT4_OUT_P9_Pos (9UL) /*!< PORT4 OUT: P9 (Bit 9) */ +#define PORT4_OUT_P9_Msk (0x200UL) /*!< PORT4 OUT: P9 (Bitfield-Mask: 0x01) */ +#define PORT4_OUT_P10_Pos (10UL) /*!< PORT4 OUT: P10 (Bit 10) */ +#define PORT4_OUT_P10_Msk (0x400UL) /*!< PORT4 OUT: P10 (Bitfield-Mask: 0x01) */ +#define PORT4_OUT_P11_Pos (11UL) /*!< PORT4 OUT: P11 (Bit 11) */ +#define PORT4_OUT_P11_Msk (0x800UL) /*!< PORT4 OUT: P11 (Bitfield-Mask: 0x01) */ +#define PORT4_OUT_P12_Pos (12UL) /*!< PORT4 OUT: P12 (Bit 12) */ +#define PORT4_OUT_P12_Msk (0x1000UL) /*!< PORT4 OUT: P12 (Bitfield-Mask: 0x01) */ +#define PORT4_OUT_P13_Pos (13UL) /*!< PORT4 OUT: P13 (Bit 13) */ +#define PORT4_OUT_P13_Msk (0x2000UL) /*!< PORT4 OUT: P13 (Bitfield-Mask: 0x01) */ +#define PORT4_OUT_P14_Pos (14UL) /*!< PORT4 OUT: P14 (Bit 14) */ +#define PORT4_OUT_P14_Msk (0x4000UL) /*!< PORT4 OUT: P14 (Bitfield-Mask: 0x01) */ +#define PORT4_OUT_P15_Pos (15UL) /*!< PORT4 OUT: P15 (Bit 15) */ +#define PORT4_OUT_P15_Msk (0x8000UL) /*!< PORT4 OUT: P15 (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- PORT4_OMR --------------------------------- */ +#define PORT4_OMR_PS0_Pos (0UL) /*!< PORT4 OMR: PS0 (Bit 0) */ +#define PORT4_OMR_PS0_Msk (0x1UL) /*!< PORT4 OMR: PS0 (Bitfield-Mask: 0x01) */ +#define PORT4_OMR_PS1_Pos (1UL) /*!< PORT4 OMR: PS1 (Bit 1) */ +#define PORT4_OMR_PS1_Msk (0x2UL) /*!< PORT4 OMR: PS1 (Bitfield-Mask: 0x01) */ +#define PORT4_OMR_PS2_Pos (2UL) /*!< PORT4 OMR: PS2 (Bit 2) */ +#define PORT4_OMR_PS2_Msk (0x4UL) /*!< PORT4 OMR: PS2 (Bitfield-Mask: 0x01) */ +#define PORT4_OMR_PS3_Pos (3UL) /*!< PORT4 OMR: PS3 (Bit 3) */ +#define PORT4_OMR_PS3_Msk (0x8UL) /*!< PORT4 OMR: PS3 (Bitfield-Mask: 0x01) */ +#define PORT4_OMR_PS4_Pos (4UL) /*!< PORT4 OMR: PS4 (Bit 4) */ +#define PORT4_OMR_PS4_Msk (0x10UL) /*!< PORT4 OMR: PS4 (Bitfield-Mask: 0x01) */ +#define PORT4_OMR_PS5_Pos (5UL) /*!< PORT4 OMR: PS5 (Bit 5) */ +#define PORT4_OMR_PS5_Msk (0x20UL) /*!< PORT4 OMR: PS5 (Bitfield-Mask: 0x01) */ +#define PORT4_OMR_PS6_Pos (6UL) /*!< PORT4 OMR: PS6 (Bit 6) */ +#define PORT4_OMR_PS6_Msk (0x40UL) /*!< PORT4 OMR: PS6 (Bitfield-Mask: 0x01) */ +#define PORT4_OMR_PS7_Pos (7UL) /*!< PORT4 OMR: PS7 (Bit 7) */ +#define PORT4_OMR_PS7_Msk (0x80UL) /*!< PORT4 OMR: PS7 (Bitfield-Mask: 0x01) */ +#define PORT4_OMR_PS8_Pos (8UL) /*!< PORT4 OMR: PS8 (Bit 8) */ +#define PORT4_OMR_PS8_Msk (0x100UL) /*!< PORT4 OMR: PS8 (Bitfield-Mask: 0x01) */ +#define PORT4_OMR_PS9_Pos (9UL) /*!< PORT4 OMR: PS9 (Bit 9) */ +#define PORT4_OMR_PS9_Msk (0x200UL) /*!< PORT4 OMR: PS9 (Bitfield-Mask: 0x01) */ +#define PORT4_OMR_PS10_Pos (10UL) /*!< PORT4 OMR: PS10 (Bit 10) */ +#define PORT4_OMR_PS10_Msk (0x400UL) /*!< PORT4 OMR: PS10 (Bitfield-Mask: 0x01) */ +#define PORT4_OMR_PS11_Pos (11UL) /*!< PORT4 OMR: PS11 (Bit 11) */ +#define PORT4_OMR_PS11_Msk (0x800UL) /*!< PORT4 OMR: PS11 (Bitfield-Mask: 0x01) */ +#define PORT4_OMR_PS12_Pos (12UL) /*!< PORT4 OMR: PS12 (Bit 12) */ +#define PORT4_OMR_PS12_Msk (0x1000UL) /*!< PORT4 OMR: PS12 (Bitfield-Mask: 0x01) */ +#define PORT4_OMR_PS13_Pos (13UL) /*!< PORT4 OMR: PS13 (Bit 13) */ +#define PORT4_OMR_PS13_Msk (0x2000UL) /*!< PORT4 OMR: PS13 (Bitfield-Mask: 0x01) */ +#define PORT4_OMR_PS14_Pos (14UL) /*!< PORT4 OMR: PS14 (Bit 14) */ +#define PORT4_OMR_PS14_Msk (0x4000UL) /*!< PORT4 OMR: PS14 (Bitfield-Mask: 0x01) */ +#define PORT4_OMR_PS15_Pos (15UL) /*!< PORT4 OMR: PS15 (Bit 15) */ +#define PORT4_OMR_PS15_Msk (0x8000UL) /*!< PORT4 OMR: PS15 (Bitfield-Mask: 0x01) */ +#define PORT4_OMR_PR0_Pos (16UL) /*!< PORT4 OMR: PR0 (Bit 16) */ +#define PORT4_OMR_PR0_Msk (0x10000UL) /*!< PORT4 OMR: PR0 (Bitfield-Mask: 0x01) */ +#define PORT4_OMR_PR1_Pos (17UL) /*!< PORT4 OMR: PR1 (Bit 17) */ +#define PORT4_OMR_PR1_Msk (0x20000UL) /*!< PORT4 OMR: PR1 (Bitfield-Mask: 0x01) */ +#define PORT4_OMR_PR2_Pos (18UL) /*!< PORT4 OMR: PR2 (Bit 18) */ +#define PORT4_OMR_PR2_Msk (0x40000UL) /*!< PORT4 OMR: PR2 (Bitfield-Mask: 0x01) */ +#define PORT4_OMR_PR3_Pos (19UL) /*!< PORT4 OMR: PR3 (Bit 19) */ +#define PORT4_OMR_PR3_Msk (0x80000UL) /*!< PORT4 OMR: PR3 (Bitfield-Mask: 0x01) */ +#define PORT4_OMR_PR4_Pos (20UL) /*!< PORT4 OMR: PR4 (Bit 20) */ +#define PORT4_OMR_PR4_Msk (0x100000UL) /*!< PORT4 OMR: PR4 (Bitfield-Mask: 0x01) */ +#define PORT4_OMR_PR5_Pos (21UL) /*!< PORT4 OMR: PR5 (Bit 21) */ +#define PORT4_OMR_PR5_Msk (0x200000UL) /*!< PORT4 OMR: PR5 (Bitfield-Mask: 0x01) */ +#define PORT4_OMR_PR6_Pos (22UL) /*!< PORT4 OMR: PR6 (Bit 22) */ +#define PORT4_OMR_PR6_Msk (0x400000UL) /*!< PORT4 OMR: PR6 (Bitfield-Mask: 0x01) */ +#define PORT4_OMR_PR7_Pos (23UL) /*!< PORT4 OMR: PR7 (Bit 23) */ +#define PORT4_OMR_PR7_Msk (0x800000UL) /*!< PORT4 OMR: PR7 (Bitfield-Mask: 0x01) */ +#define PORT4_OMR_PR8_Pos (24UL) /*!< PORT4 OMR: PR8 (Bit 24) */ +#define PORT4_OMR_PR8_Msk (0x1000000UL) /*!< PORT4 OMR: PR8 (Bitfield-Mask: 0x01) */ +#define PORT4_OMR_PR9_Pos (25UL) /*!< PORT4 OMR: PR9 (Bit 25) */ +#define PORT4_OMR_PR9_Msk (0x2000000UL) /*!< PORT4 OMR: PR9 (Bitfield-Mask: 0x01) */ +#define PORT4_OMR_PR10_Pos (26UL) /*!< PORT4 OMR: PR10 (Bit 26) */ +#define PORT4_OMR_PR10_Msk (0x4000000UL) /*!< PORT4 OMR: PR10 (Bitfield-Mask: 0x01) */ +#define PORT4_OMR_PR11_Pos (27UL) /*!< PORT4 OMR: PR11 (Bit 27) */ +#define PORT4_OMR_PR11_Msk (0x8000000UL) /*!< PORT4 OMR: PR11 (Bitfield-Mask: 0x01) */ +#define PORT4_OMR_PR12_Pos (28UL) /*!< PORT4 OMR: PR12 (Bit 28) */ +#define PORT4_OMR_PR12_Msk (0x10000000UL) /*!< PORT4 OMR: PR12 (Bitfield-Mask: 0x01) */ +#define PORT4_OMR_PR13_Pos (29UL) /*!< PORT4 OMR: PR13 (Bit 29) */ +#define PORT4_OMR_PR13_Msk (0x20000000UL) /*!< PORT4 OMR: PR13 (Bitfield-Mask: 0x01) */ +#define PORT4_OMR_PR14_Pos (30UL) /*!< PORT4 OMR: PR14 (Bit 30) */ +#define PORT4_OMR_PR14_Msk (0x40000000UL) /*!< PORT4 OMR: PR14 (Bitfield-Mask: 0x01) */ +#define PORT4_OMR_PR15_Pos (31UL) /*!< PORT4 OMR: PR15 (Bit 31) */ +#define PORT4_OMR_PR15_Msk (0x80000000UL) /*!< PORT4 OMR: PR15 (Bitfield-Mask: 0x01) */ + +/* --------------------------------- PORT4_IOCR0 -------------------------------- */ +#define PORT4_IOCR0_PC0_Pos (3UL) /*!< PORT4 IOCR0: PC0 (Bit 3) */ +#define PORT4_IOCR0_PC0_Msk (0xf8UL) /*!< PORT4 IOCR0: PC0 (Bitfield-Mask: 0x1f) */ +#define PORT4_IOCR0_PC1_Pos (11UL) /*!< PORT4 IOCR0: PC1 (Bit 11) */ +#define PORT4_IOCR0_PC1_Msk (0xf800UL) /*!< PORT4 IOCR0: PC1 (Bitfield-Mask: 0x1f) */ +#define PORT4_IOCR0_PC2_Pos (19UL) /*!< PORT4 IOCR0: PC2 (Bit 19) */ +#define PORT4_IOCR0_PC2_Msk (0xf80000UL) /*!< PORT4 IOCR0: PC2 (Bitfield-Mask: 0x1f) */ +#define PORT4_IOCR0_PC3_Pos (27UL) /*!< PORT4 IOCR0: PC3 (Bit 27) */ +#define PORT4_IOCR0_PC3_Msk (0xf8000000UL) /*!< PORT4 IOCR0: PC3 (Bitfield-Mask: 0x1f) */ + +/* --------------------------------- PORT4_IOCR4 -------------------------------- */ +#define PORT4_IOCR4_PC4_Pos (3UL) /*!< PORT4 IOCR4: PC4 (Bit 3) */ +#define PORT4_IOCR4_PC4_Msk (0xf8UL) /*!< PORT4 IOCR4: PC4 (Bitfield-Mask: 0x1f) */ +#define PORT4_IOCR4_PC5_Pos (11UL) /*!< PORT4 IOCR4: PC5 (Bit 11) */ +#define PORT4_IOCR4_PC5_Msk (0xf800UL) /*!< PORT4 IOCR4: PC5 (Bitfield-Mask: 0x1f) */ +#define PORT4_IOCR4_PC6_Pos (19UL) /*!< PORT4 IOCR4: PC6 (Bit 19) */ +#define PORT4_IOCR4_PC6_Msk (0xf80000UL) /*!< PORT4 IOCR4: PC6 (Bitfield-Mask: 0x1f) */ +#define PORT4_IOCR4_PC7_Pos (27UL) /*!< PORT4 IOCR4: PC7 (Bit 27) */ +#define PORT4_IOCR4_PC7_Msk (0xf8000000UL) /*!< PORT4 IOCR4: PC7 (Bitfield-Mask: 0x1f) */ + +/* ---------------------------------- PORT4_IN ---------------------------------- */ +#define PORT4_IN_P0_Pos (0UL) /*!< PORT4 IN: P0 (Bit 0) */ +#define PORT4_IN_P0_Msk (0x1UL) /*!< PORT4 IN: P0 (Bitfield-Mask: 0x01) */ +#define PORT4_IN_P1_Pos (1UL) /*!< PORT4 IN: P1 (Bit 1) */ +#define PORT4_IN_P1_Msk (0x2UL) /*!< PORT4 IN: P1 (Bitfield-Mask: 0x01) */ +#define PORT4_IN_P2_Pos (2UL) /*!< PORT4 IN: P2 (Bit 2) */ +#define PORT4_IN_P2_Msk (0x4UL) /*!< PORT4 IN: P2 (Bitfield-Mask: 0x01) */ +#define PORT4_IN_P3_Pos (3UL) /*!< PORT4 IN: P3 (Bit 3) */ +#define PORT4_IN_P3_Msk (0x8UL) /*!< PORT4 IN: P3 (Bitfield-Mask: 0x01) */ +#define PORT4_IN_P4_Pos (4UL) /*!< PORT4 IN: P4 (Bit 4) */ +#define PORT4_IN_P4_Msk (0x10UL) /*!< PORT4 IN: P4 (Bitfield-Mask: 0x01) */ +#define PORT4_IN_P5_Pos (5UL) /*!< PORT4 IN: P5 (Bit 5) */ +#define PORT4_IN_P5_Msk (0x20UL) /*!< PORT4 IN: P5 (Bitfield-Mask: 0x01) */ +#define PORT4_IN_P6_Pos (6UL) /*!< PORT4 IN: P6 (Bit 6) */ +#define PORT4_IN_P6_Msk (0x40UL) /*!< PORT4 IN: P6 (Bitfield-Mask: 0x01) */ +#define PORT4_IN_P7_Pos (7UL) /*!< PORT4 IN: P7 (Bit 7) */ +#define PORT4_IN_P7_Msk (0x80UL) /*!< PORT4 IN: P7 (Bitfield-Mask: 0x01) */ +#define PORT4_IN_P8_Pos (8UL) /*!< PORT4 IN: P8 (Bit 8) */ +#define PORT4_IN_P8_Msk (0x100UL) /*!< PORT4 IN: P8 (Bitfield-Mask: 0x01) */ +#define PORT4_IN_P9_Pos (9UL) /*!< PORT4 IN: P9 (Bit 9) */ +#define PORT4_IN_P9_Msk (0x200UL) /*!< PORT4 IN: P9 (Bitfield-Mask: 0x01) */ +#define PORT4_IN_P10_Pos (10UL) /*!< PORT4 IN: P10 (Bit 10) */ +#define PORT4_IN_P10_Msk (0x400UL) /*!< PORT4 IN: P10 (Bitfield-Mask: 0x01) */ +#define PORT4_IN_P11_Pos (11UL) /*!< PORT4 IN: P11 (Bit 11) */ +#define PORT4_IN_P11_Msk (0x800UL) /*!< PORT4 IN: P11 (Bitfield-Mask: 0x01) */ +#define PORT4_IN_P12_Pos (12UL) /*!< PORT4 IN: P12 (Bit 12) */ +#define PORT4_IN_P12_Msk (0x1000UL) /*!< PORT4 IN: P12 (Bitfield-Mask: 0x01) */ +#define PORT4_IN_P13_Pos (13UL) /*!< PORT4 IN: P13 (Bit 13) */ +#define PORT4_IN_P13_Msk (0x2000UL) /*!< PORT4 IN: P13 (Bitfield-Mask: 0x01) */ +#define PORT4_IN_P14_Pos (14UL) /*!< PORT4 IN: P14 (Bit 14) */ +#define PORT4_IN_P14_Msk (0x4000UL) /*!< PORT4 IN: P14 (Bitfield-Mask: 0x01) */ +#define PORT4_IN_P15_Pos (15UL) /*!< PORT4 IN: P15 (Bit 15) */ +#define PORT4_IN_P15_Msk (0x8000UL) /*!< PORT4 IN: P15 (Bitfield-Mask: 0x01) */ + +/* --------------------------------- PORT4_PDR0 --------------------------------- */ +#define PORT4_PDR0_PD0_Pos (0UL) /*!< PORT4 PDR0: PD0 (Bit 0) */ +#define PORT4_PDR0_PD0_Msk (0x7UL) /*!< PORT4 PDR0: PD0 (Bitfield-Mask: 0x07) */ +#define PORT4_PDR0_PD1_Pos (4UL) /*!< PORT4 PDR0: PD1 (Bit 4) */ +#define PORT4_PDR0_PD1_Msk (0x70UL) /*!< PORT4 PDR0: PD1 (Bitfield-Mask: 0x07) */ +#define PORT4_PDR0_PD2_Pos (8UL) /*!< PORT4 PDR0: PD2 (Bit 8) */ +#define PORT4_PDR0_PD2_Msk (0x700UL) /*!< PORT4 PDR0: PD2 (Bitfield-Mask: 0x07) */ +#define PORT4_PDR0_PD3_Pos (12UL) /*!< PORT4 PDR0: PD3 (Bit 12) */ +#define PORT4_PDR0_PD3_Msk (0x7000UL) /*!< PORT4 PDR0: PD3 (Bitfield-Mask: 0x07) */ +#define PORT4_PDR0_PD4_Pos (16UL) /*!< PORT4 PDR0: PD4 (Bit 16) */ +#define PORT4_PDR0_PD4_Msk (0x70000UL) /*!< PORT4 PDR0: PD4 (Bitfield-Mask: 0x07) */ +#define PORT4_PDR0_PD5_Pos (20UL) /*!< PORT4 PDR0: PD5 (Bit 20) */ +#define PORT4_PDR0_PD5_Msk (0x700000UL) /*!< PORT4 PDR0: PD5 (Bitfield-Mask: 0x07) */ +#define PORT4_PDR0_PD6_Pos (24UL) /*!< PORT4 PDR0: PD6 (Bit 24) */ +#define PORT4_PDR0_PD6_Msk (0x7000000UL) /*!< PORT4 PDR0: PD6 (Bitfield-Mask: 0x07) */ +#define PORT4_PDR0_PD7_Pos (28UL) /*!< PORT4 PDR0: PD7 (Bit 28) */ +#define PORT4_PDR0_PD7_Msk (0x70000000UL) /*!< PORT4 PDR0: PD7 (Bitfield-Mask: 0x07) */ + +/* --------------------------------- PORT4_PDISC -------------------------------- */ +#define PORT4_PDISC_PDIS0_Pos (0UL) /*!< PORT4 PDISC: PDIS0 (Bit 0) */ +#define PORT4_PDISC_PDIS0_Msk (0x1UL) /*!< PORT4 PDISC: PDIS0 (Bitfield-Mask: 0x01) */ +#define PORT4_PDISC_PDIS1_Pos (1UL) /*!< PORT4 PDISC: PDIS1 (Bit 1) */ +#define PORT4_PDISC_PDIS1_Msk (0x2UL) /*!< PORT4 PDISC: PDIS1 (Bitfield-Mask: 0x01) */ +#define PORT4_PDISC_PDIS2_Pos (2UL) /*!< PORT4 PDISC: PDIS2 (Bit 2) */ +#define PORT4_PDISC_PDIS2_Msk (0x4UL) /*!< PORT4 PDISC: PDIS2 (Bitfield-Mask: 0x01) */ +#define PORT4_PDISC_PDIS3_Pos (3UL) /*!< PORT4 PDISC: PDIS3 (Bit 3) */ +#define PORT4_PDISC_PDIS3_Msk (0x8UL) /*!< PORT4 PDISC: PDIS3 (Bitfield-Mask: 0x01) */ +#define PORT4_PDISC_PDIS4_Pos (4UL) /*!< PORT4 PDISC: PDIS4 (Bit 4) */ +#define PORT4_PDISC_PDIS4_Msk (0x10UL) /*!< PORT4 PDISC: PDIS4 (Bitfield-Mask: 0x01) */ +#define PORT4_PDISC_PDIS5_Pos (5UL) /*!< PORT4 PDISC: PDIS5 (Bit 5) */ +#define PORT4_PDISC_PDIS5_Msk (0x20UL) /*!< PORT4 PDISC: PDIS5 (Bitfield-Mask: 0x01) */ +#define PORT4_PDISC_PDIS6_Pos (6UL) /*!< PORT4 PDISC: PDIS6 (Bit 6) */ +#define PORT4_PDISC_PDIS6_Msk (0x40UL) /*!< PORT4 PDISC: PDIS6 (Bitfield-Mask: 0x01) */ +#define PORT4_PDISC_PDIS7_Pos (7UL) /*!< PORT4 PDISC: PDIS7 (Bit 7) */ +#define PORT4_PDISC_PDIS7_Msk (0x80UL) /*!< PORT4 PDISC: PDIS7 (Bitfield-Mask: 0x01) */ +#define PORT4_PDISC_PDIS8_Pos (8UL) /*!< PORT4 PDISC: PDIS8 (Bit 8) */ +#define PORT4_PDISC_PDIS8_Msk (0x100UL) /*!< PORT4 PDISC: PDIS8 (Bitfield-Mask: 0x01) */ +#define PORT4_PDISC_PDIS9_Pos (9UL) /*!< PORT4 PDISC: PDIS9 (Bit 9) */ +#define PORT4_PDISC_PDIS9_Msk (0x200UL) /*!< PORT4 PDISC: PDIS9 (Bitfield-Mask: 0x01) */ +#define PORT4_PDISC_PDIS10_Pos (10UL) /*!< PORT4 PDISC: PDIS10 (Bit 10) */ +#define PORT4_PDISC_PDIS10_Msk (0x400UL) /*!< PORT4 PDISC: PDIS10 (Bitfield-Mask: 0x01) */ +#define PORT4_PDISC_PDIS11_Pos (11UL) /*!< PORT4 PDISC: PDIS11 (Bit 11) */ +#define PORT4_PDISC_PDIS11_Msk (0x800UL) /*!< PORT4 PDISC: PDIS11 (Bitfield-Mask: 0x01) */ +#define PORT4_PDISC_PDIS12_Pos (12UL) /*!< PORT4 PDISC: PDIS12 (Bit 12) */ +#define PORT4_PDISC_PDIS12_Msk (0x1000UL) /*!< PORT4 PDISC: PDIS12 (Bitfield-Mask: 0x01) */ +#define PORT4_PDISC_PDIS13_Pos (13UL) /*!< PORT4 PDISC: PDIS13 (Bit 13) */ +#define PORT4_PDISC_PDIS13_Msk (0x2000UL) /*!< PORT4 PDISC: PDIS13 (Bitfield-Mask: 0x01) */ +#define PORT4_PDISC_PDIS14_Pos (14UL) /*!< PORT4 PDISC: PDIS14 (Bit 14) */ +#define PORT4_PDISC_PDIS14_Msk (0x4000UL) /*!< PORT4 PDISC: PDIS14 (Bitfield-Mask: 0x01) */ +#define PORT4_PDISC_PDIS15_Pos (15UL) /*!< PORT4 PDISC: PDIS15 (Bit 15) */ +#define PORT4_PDISC_PDIS15_Msk (0x8000UL) /*!< PORT4 PDISC: PDIS15 (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- PORT4_PPS --------------------------------- */ +#define PORT4_PPS_PPS0_Pos (0UL) /*!< PORT4 PPS: PPS0 (Bit 0) */ +#define PORT4_PPS_PPS0_Msk (0x1UL) /*!< PORT4 PPS: PPS0 (Bitfield-Mask: 0x01) */ +#define PORT4_PPS_PPS1_Pos (1UL) /*!< PORT4 PPS: PPS1 (Bit 1) */ +#define PORT4_PPS_PPS1_Msk (0x2UL) /*!< PORT4 PPS: PPS1 (Bitfield-Mask: 0x01) */ +#define PORT4_PPS_PPS2_Pos (2UL) /*!< PORT4 PPS: PPS2 (Bit 2) */ +#define PORT4_PPS_PPS2_Msk (0x4UL) /*!< PORT4 PPS: PPS2 (Bitfield-Mask: 0x01) */ +#define PORT4_PPS_PPS3_Pos (3UL) /*!< PORT4 PPS: PPS3 (Bit 3) */ +#define PORT4_PPS_PPS3_Msk (0x8UL) /*!< PORT4 PPS: PPS3 (Bitfield-Mask: 0x01) */ +#define PORT4_PPS_PPS4_Pos (4UL) /*!< PORT4 PPS: PPS4 (Bit 4) */ +#define PORT4_PPS_PPS4_Msk (0x10UL) /*!< PORT4 PPS: PPS4 (Bitfield-Mask: 0x01) */ +#define PORT4_PPS_PPS5_Pos (5UL) /*!< PORT4 PPS: PPS5 (Bit 5) */ +#define PORT4_PPS_PPS5_Msk (0x20UL) /*!< PORT4 PPS: PPS5 (Bitfield-Mask: 0x01) */ +#define PORT4_PPS_PPS6_Pos (6UL) /*!< PORT4 PPS: PPS6 (Bit 6) */ +#define PORT4_PPS_PPS6_Msk (0x40UL) /*!< PORT4 PPS: PPS6 (Bitfield-Mask: 0x01) */ +#define PORT4_PPS_PPS7_Pos (7UL) /*!< PORT4 PPS: PPS7 (Bit 7) */ +#define PORT4_PPS_PPS7_Msk (0x80UL) /*!< PORT4 PPS: PPS7 (Bitfield-Mask: 0x01) */ +#define PORT4_PPS_PPS8_Pos (8UL) /*!< PORT4 PPS: PPS8 (Bit 8) */ +#define PORT4_PPS_PPS8_Msk (0x100UL) /*!< PORT4 PPS: PPS8 (Bitfield-Mask: 0x01) */ +#define PORT4_PPS_PPS9_Pos (9UL) /*!< PORT4 PPS: PPS9 (Bit 9) */ +#define PORT4_PPS_PPS9_Msk (0x200UL) /*!< PORT4 PPS: PPS9 (Bitfield-Mask: 0x01) */ +#define PORT4_PPS_PPS10_Pos (10UL) /*!< PORT4 PPS: PPS10 (Bit 10) */ +#define PORT4_PPS_PPS10_Msk (0x400UL) /*!< PORT4 PPS: PPS10 (Bitfield-Mask: 0x01) */ +#define PORT4_PPS_PPS11_Pos (11UL) /*!< PORT4 PPS: PPS11 (Bit 11) */ +#define PORT4_PPS_PPS11_Msk (0x800UL) /*!< PORT4 PPS: PPS11 (Bitfield-Mask: 0x01) */ +#define PORT4_PPS_PPS12_Pos (12UL) /*!< PORT4 PPS: PPS12 (Bit 12) */ +#define PORT4_PPS_PPS12_Msk (0x1000UL) /*!< PORT4 PPS: PPS12 (Bitfield-Mask: 0x01) */ +#define PORT4_PPS_PPS13_Pos (13UL) /*!< PORT4 PPS: PPS13 (Bit 13) */ +#define PORT4_PPS_PPS13_Msk (0x2000UL) /*!< PORT4 PPS: PPS13 (Bitfield-Mask: 0x01) */ +#define PORT4_PPS_PPS14_Pos (14UL) /*!< PORT4 PPS: PPS14 (Bit 14) */ +#define PORT4_PPS_PPS14_Msk (0x4000UL) /*!< PORT4 PPS: PPS14 (Bitfield-Mask: 0x01) */ +#define PORT4_PPS_PPS15_Pos (15UL) /*!< PORT4 PPS: PPS15 (Bit 15) */ +#define PORT4_PPS_PPS15_Msk (0x8000UL) /*!< PORT4 PPS: PPS15 (Bitfield-Mask: 0x01) */ + +/* --------------------------------- PORT4_HWSEL -------------------------------- */ +#define PORT4_HWSEL_HW0_Pos (0UL) /*!< PORT4 HWSEL: HW0 (Bit 0) */ +#define PORT4_HWSEL_HW0_Msk (0x3UL) /*!< PORT4 HWSEL: HW0 (Bitfield-Mask: 0x03) */ +#define PORT4_HWSEL_HW1_Pos (2UL) /*!< PORT4 HWSEL: HW1 (Bit 2) */ +#define PORT4_HWSEL_HW1_Msk (0xcUL) /*!< PORT4 HWSEL: HW1 (Bitfield-Mask: 0x03) */ +#define PORT4_HWSEL_HW2_Pos (4UL) /*!< PORT4 HWSEL: HW2 (Bit 4) */ +#define PORT4_HWSEL_HW2_Msk (0x30UL) /*!< PORT4 HWSEL: HW2 (Bitfield-Mask: 0x03) */ +#define PORT4_HWSEL_HW3_Pos (6UL) /*!< PORT4 HWSEL: HW3 (Bit 6) */ +#define PORT4_HWSEL_HW3_Msk (0xc0UL) /*!< PORT4 HWSEL: HW3 (Bitfield-Mask: 0x03) */ +#define PORT4_HWSEL_HW4_Pos (8UL) /*!< PORT4 HWSEL: HW4 (Bit 8) */ +#define PORT4_HWSEL_HW4_Msk (0x300UL) /*!< PORT4 HWSEL: HW4 (Bitfield-Mask: 0x03) */ +#define PORT4_HWSEL_HW5_Pos (10UL) /*!< PORT4 HWSEL: HW5 (Bit 10) */ +#define PORT4_HWSEL_HW5_Msk (0xc00UL) /*!< PORT4 HWSEL: HW5 (Bitfield-Mask: 0x03) */ +#define PORT4_HWSEL_HW6_Pos (12UL) /*!< PORT4 HWSEL: HW6 (Bit 12) */ +#define PORT4_HWSEL_HW6_Msk (0x3000UL) /*!< PORT4 HWSEL: HW6 (Bitfield-Mask: 0x03) */ +#define PORT4_HWSEL_HW7_Pos (14UL) /*!< PORT4 HWSEL: HW7 (Bit 14) */ +#define PORT4_HWSEL_HW7_Msk (0xc000UL) /*!< PORT4 HWSEL: HW7 (Bitfield-Mask: 0x03) */ +#define PORT4_HWSEL_HW8_Pos (16UL) /*!< PORT4 HWSEL: HW8 (Bit 16) */ +#define PORT4_HWSEL_HW8_Msk (0x30000UL) /*!< PORT4 HWSEL: HW8 (Bitfield-Mask: 0x03) */ +#define PORT4_HWSEL_HW9_Pos (18UL) /*!< PORT4 HWSEL: HW9 (Bit 18) */ +#define PORT4_HWSEL_HW9_Msk (0xc0000UL) /*!< PORT4 HWSEL: HW9 (Bitfield-Mask: 0x03) */ +#define PORT4_HWSEL_HW10_Pos (20UL) /*!< PORT4 HWSEL: HW10 (Bit 20) */ +#define PORT4_HWSEL_HW10_Msk (0x300000UL) /*!< PORT4 HWSEL: HW10 (Bitfield-Mask: 0x03) */ +#define PORT4_HWSEL_HW11_Pos (22UL) /*!< PORT4 HWSEL: HW11 (Bit 22) */ +#define PORT4_HWSEL_HW11_Msk (0xc00000UL) /*!< PORT4 HWSEL: HW11 (Bitfield-Mask: 0x03) */ +#define PORT4_HWSEL_HW12_Pos (24UL) /*!< PORT4 HWSEL: HW12 (Bit 24) */ +#define PORT4_HWSEL_HW12_Msk (0x3000000UL) /*!< PORT4 HWSEL: HW12 (Bitfield-Mask: 0x03) */ +#define PORT4_HWSEL_HW13_Pos (26UL) /*!< PORT4 HWSEL: HW13 (Bit 26) */ +#define PORT4_HWSEL_HW13_Msk (0xc000000UL) /*!< PORT4 HWSEL: HW13 (Bitfield-Mask: 0x03) */ +#define PORT4_HWSEL_HW14_Pos (28UL) /*!< PORT4 HWSEL: HW14 (Bit 28) */ +#define PORT4_HWSEL_HW14_Msk (0x30000000UL) /*!< PORT4 HWSEL: HW14 (Bitfield-Mask: 0x03) */ +#define PORT4_HWSEL_HW15_Pos (30UL) /*!< PORT4 HWSEL: HW15 (Bit 30) */ +#define PORT4_HWSEL_HW15_Msk (0xc0000000UL) /*!< PORT4 HWSEL: HW15 (Bitfield-Mask: 0x03) */ + + +/* ================================================================================ */ +/* ================ struct 'PORT5' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ---------------------------------- PORT5_OUT --------------------------------- */ +#define PORT5_OUT_P0_Pos (0UL) /*!< PORT5 OUT: P0 (Bit 0) */ +#define PORT5_OUT_P0_Msk (0x1UL) /*!< PORT5 OUT: P0 (Bitfield-Mask: 0x01) */ +#define PORT5_OUT_P1_Pos (1UL) /*!< PORT5 OUT: P1 (Bit 1) */ +#define PORT5_OUT_P1_Msk (0x2UL) /*!< PORT5 OUT: P1 (Bitfield-Mask: 0x01) */ +#define PORT5_OUT_P2_Pos (2UL) /*!< PORT5 OUT: P2 (Bit 2) */ +#define PORT5_OUT_P2_Msk (0x4UL) /*!< PORT5 OUT: P2 (Bitfield-Mask: 0x01) */ +#define PORT5_OUT_P3_Pos (3UL) /*!< PORT5 OUT: P3 (Bit 3) */ +#define PORT5_OUT_P3_Msk (0x8UL) /*!< PORT5 OUT: P3 (Bitfield-Mask: 0x01) */ +#define PORT5_OUT_P4_Pos (4UL) /*!< PORT5 OUT: P4 (Bit 4) */ +#define PORT5_OUT_P4_Msk (0x10UL) /*!< PORT5 OUT: P4 (Bitfield-Mask: 0x01) */ +#define PORT5_OUT_P5_Pos (5UL) /*!< PORT5 OUT: P5 (Bit 5) */ +#define PORT5_OUT_P5_Msk (0x20UL) /*!< PORT5 OUT: P5 (Bitfield-Mask: 0x01) */ +#define PORT5_OUT_P6_Pos (6UL) /*!< PORT5 OUT: P6 (Bit 6) */ +#define PORT5_OUT_P6_Msk (0x40UL) /*!< PORT5 OUT: P6 (Bitfield-Mask: 0x01) */ +#define PORT5_OUT_P7_Pos (7UL) /*!< PORT5 OUT: P7 (Bit 7) */ +#define PORT5_OUT_P7_Msk (0x80UL) /*!< PORT5 OUT: P7 (Bitfield-Mask: 0x01) */ +#define PORT5_OUT_P8_Pos (8UL) /*!< PORT5 OUT: P8 (Bit 8) */ +#define PORT5_OUT_P8_Msk (0x100UL) /*!< PORT5 OUT: P8 (Bitfield-Mask: 0x01) */ +#define PORT5_OUT_P9_Pos (9UL) /*!< PORT5 OUT: P9 (Bit 9) */ +#define PORT5_OUT_P9_Msk (0x200UL) /*!< PORT5 OUT: P9 (Bitfield-Mask: 0x01) */ +#define PORT5_OUT_P10_Pos (10UL) /*!< PORT5 OUT: P10 (Bit 10) */ +#define PORT5_OUT_P10_Msk (0x400UL) /*!< PORT5 OUT: P10 (Bitfield-Mask: 0x01) */ +#define PORT5_OUT_P11_Pos (11UL) /*!< PORT5 OUT: P11 (Bit 11) */ +#define PORT5_OUT_P11_Msk (0x800UL) /*!< PORT5 OUT: P11 (Bitfield-Mask: 0x01) */ +#define PORT5_OUT_P12_Pos (12UL) /*!< PORT5 OUT: P12 (Bit 12) */ +#define PORT5_OUT_P12_Msk (0x1000UL) /*!< PORT5 OUT: P12 (Bitfield-Mask: 0x01) */ +#define PORT5_OUT_P13_Pos (13UL) /*!< PORT5 OUT: P13 (Bit 13) */ +#define PORT5_OUT_P13_Msk (0x2000UL) /*!< PORT5 OUT: P13 (Bitfield-Mask: 0x01) */ +#define PORT5_OUT_P14_Pos (14UL) /*!< PORT5 OUT: P14 (Bit 14) */ +#define PORT5_OUT_P14_Msk (0x4000UL) /*!< PORT5 OUT: P14 (Bitfield-Mask: 0x01) */ +#define PORT5_OUT_P15_Pos (15UL) /*!< PORT5 OUT: P15 (Bit 15) */ +#define PORT5_OUT_P15_Msk (0x8000UL) /*!< PORT5 OUT: P15 (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- PORT5_OMR --------------------------------- */ +#define PORT5_OMR_PS0_Pos (0UL) /*!< PORT5 OMR: PS0 (Bit 0) */ +#define PORT5_OMR_PS0_Msk (0x1UL) /*!< PORT5 OMR: PS0 (Bitfield-Mask: 0x01) */ +#define PORT5_OMR_PS1_Pos (1UL) /*!< PORT5 OMR: PS1 (Bit 1) */ +#define PORT5_OMR_PS1_Msk (0x2UL) /*!< PORT5 OMR: PS1 (Bitfield-Mask: 0x01) */ +#define PORT5_OMR_PS2_Pos (2UL) /*!< PORT5 OMR: PS2 (Bit 2) */ +#define PORT5_OMR_PS2_Msk (0x4UL) /*!< PORT5 OMR: PS2 (Bitfield-Mask: 0x01) */ +#define PORT5_OMR_PS3_Pos (3UL) /*!< PORT5 OMR: PS3 (Bit 3) */ +#define PORT5_OMR_PS3_Msk (0x8UL) /*!< PORT5 OMR: PS3 (Bitfield-Mask: 0x01) */ +#define PORT5_OMR_PS4_Pos (4UL) /*!< PORT5 OMR: PS4 (Bit 4) */ +#define PORT5_OMR_PS4_Msk (0x10UL) /*!< PORT5 OMR: PS4 (Bitfield-Mask: 0x01) */ +#define PORT5_OMR_PS5_Pos (5UL) /*!< PORT5 OMR: PS5 (Bit 5) */ +#define PORT5_OMR_PS5_Msk (0x20UL) /*!< PORT5 OMR: PS5 (Bitfield-Mask: 0x01) */ +#define PORT5_OMR_PS6_Pos (6UL) /*!< PORT5 OMR: PS6 (Bit 6) */ +#define PORT5_OMR_PS6_Msk (0x40UL) /*!< PORT5 OMR: PS6 (Bitfield-Mask: 0x01) */ +#define PORT5_OMR_PS7_Pos (7UL) /*!< PORT5 OMR: PS7 (Bit 7) */ +#define PORT5_OMR_PS7_Msk (0x80UL) /*!< PORT5 OMR: PS7 (Bitfield-Mask: 0x01) */ +#define PORT5_OMR_PS8_Pos (8UL) /*!< PORT5 OMR: PS8 (Bit 8) */ +#define PORT5_OMR_PS8_Msk (0x100UL) /*!< PORT5 OMR: PS8 (Bitfield-Mask: 0x01) */ +#define PORT5_OMR_PS9_Pos (9UL) /*!< PORT5 OMR: PS9 (Bit 9) */ +#define PORT5_OMR_PS9_Msk (0x200UL) /*!< PORT5 OMR: PS9 (Bitfield-Mask: 0x01) */ +#define PORT5_OMR_PS10_Pos (10UL) /*!< PORT5 OMR: PS10 (Bit 10) */ +#define PORT5_OMR_PS10_Msk (0x400UL) /*!< PORT5 OMR: PS10 (Bitfield-Mask: 0x01) */ +#define PORT5_OMR_PS11_Pos (11UL) /*!< PORT5 OMR: PS11 (Bit 11) */ +#define PORT5_OMR_PS11_Msk (0x800UL) /*!< PORT5 OMR: PS11 (Bitfield-Mask: 0x01) */ +#define PORT5_OMR_PS12_Pos (12UL) /*!< PORT5 OMR: PS12 (Bit 12) */ +#define PORT5_OMR_PS12_Msk (0x1000UL) /*!< PORT5 OMR: PS12 (Bitfield-Mask: 0x01) */ +#define PORT5_OMR_PS13_Pos (13UL) /*!< PORT5 OMR: PS13 (Bit 13) */ +#define PORT5_OMR_PS13_Msk (0x2000UL) /*!< PORT5 OMR: PS13 (Bitfield-Mask: 0x01) */ +#define PORT5_OMR_PS14_Pos (14UL) /*!< PORT5 OMR: PS14 (Bit 14) */ +#define PORT5_OMR_PS14_Msk (0x4000UL) /*!< PORT5 OMR: PS14 (Bitfield-Mask: 0x01) */ +#define PORT5_OMR_PS15_Pos (15UL) /*!< PORT5 OMR: PS15 (Bit 15) */ +#define PORT5_OMR_PS15_Msk (0x8000UL) /*!< PORT5 OMR: PS15 (Bitfield-Mask: 0x01) */ +#define PORT5_OMR_PR0_Pos (16UL) /*!< PORT5 OMR: PR0 (Bit 16) */ +#define PORT5_OMR_PR0_Msk (0x10000UL) /*!< PORT5 OMR: PR0 (Bitfield-Mask: 0x01) */ +#define PORT5_OMR_PR1_Pos (17UL) /*!< PORT5 OMR: PR1 (Bit 17) */ +#define PORT5_OMR_PR1_Msk (0x20000UL) /*!< PORT5 OMR: PR1 (Bitfield-Mask: 0x01) */ +#define PORT5_OMR_PR2_Pos (18UL) /*!< PORT5 OMR: PR2 (Bit 18) */ +#define PORT5_OMR_PR2_Msk (0x40000UL) /*!< PORT5 OMR: PR2 (Bitfield-Mask: 0x01) */ +#define PORT5_OMR_PR3_Pos (19UL) /*!< PORT5 OMR: PR3 (Bit 19) */ +#define PORT5_OMR_PR3_Msk (0x80000UL) /*!< PORT5 OMR: PR3 (Bitfield-Mask: 0x01) */ +#define PORT5_OMR_PR4_Pos (20UL) /*!< PORT5 OMR: PR4 (Bit 20) */ +#define PORT5_OMR_PR4_Msk (0x100000UL) /*!< PORT5 OMR: PR4 (Bitfield-Mask: 0x01) */ +#define PORT5_OMR_PR5_Pos (21UL) /*!< PORT5 OMR: PR5 (Bit 21) */ +#define PORT5_OMR_PR5_Msk (0x200000UL) /*!< PORT5 OMR: PR5 (Bitfield-Mask: 0x01) */ +#define PORT5_OMR_PR6_Pos (22UL) /*!< PORT5 OMR: PR6 (Bit 22) */ +#define PORT5_OMR_PR6_Msk (0x400000UL) /*!< PORT5 OMR: PR6 (Bitfield-Mask: 0x01) */ +#define PORT5_OMR_PR7_Pos (23UL) /*!< PORT5 OMR: PR7 (Bit 23) */ +#define PORT5_OMR_PR7_Msk (0x800000UL) /*!< PORT5 OMR: PR7 (Bitfield-Mask: 0x01) */ +#define PORT5_OMR_PR8_Pos (24UL) /*!< PORT5 OMR: PR8 (Bit 24) */ +#define PORT5_OMR_PR8_Msk (0x1000000UL) /*!< PORT5 OMR: PR8 (Bitfield-Mask: 0x01) */ +#define PORT5_OMR_PR9_Pos (25UL) /*!< PORT5 OMR: PR9 (Bit 25) */ +#define PORT5_OMR_PR9_Msk (0x2000000UL) /*!< PORT5 OMR: PR9 (Bitfield-Mask: 0x01) */ +#define PORT5_OMR_PR10_Pos (26UL) /*!< PORT5 OMR: PR10 (Bit 26) */ +#define PORT5_OMR_PR10_Msk (0x4000000UL) /*!< PORT5 OMR: PR10 (Bitfield-Mask: 0x01) */ +#define PORT5_OMR_PR11_Pos (27UL) /*!< PORT5 OMR: PR11 (Bit 27) */ +#define PORT5_OMR_PR11_Msk (0x8000000UL) /*!< PORT5 OMR: PR11 (Bitfield-Mask: 0x01) */ +#define PORT5_OMR_PR12_Pos (28UL) /*!< PORT5 OMR: PR12 (Bit 28) */ +#define PORT5_OMR_PR12_Msk (0x10000000UL) /*!< PORT5 OMR: PR12 (Bitfield-Mask: 0x01) */ +#define PORT5_OMR_PR13_Pos (29UL) /*!< PORT5 OMR: PR13 (Bit 29) */ +#define PORT5_OMR_PR13_Msk (0x20000000UL) /*!< PORT5 OMR: PR13 (Bitfield-Mask: 0x01) */ +#define PORT5_OMR_PR14_Pos (30UL) /*!< PORT5 OMR: PR14 (Bit 30) */ +#define PORT5_OMR_PR14_Msk (0x40000000UL) /*!< PORT5 OMR: PR14 (Bitfield-Mask: 0x01) */ +#define PORT5_OMR_PR15_Pos (31UL) /*!< PORT5 OMR: PR15 (Bit 31) */ +#define PORT5_OMR_PR15_Msk (0x80000000UL) /*!< PORT5 OMR: PR15 (Bitfield-Mask: 0x01) */ + +/* --------------------------------- PORT5_IOCR0 -------------------------------- */ +#define PORT5_IOCR0_PC0_Pos (3UL) /*!< PORT5 IOCR0: PC0 (Bit 3) */ +#define PORT5_IOCR0_PC0_Msk (0xf8UL) /*!< PORT5 IOCR0: PC0 (Bitfield-Mask: 0x1f) */ +#define PORT5_IOCR0_PC1_Pos (11UL) /*!< PORT5 IOCR0: PC1 (Bit 11) */ +#define PORT5_IOCR0_PC1_Msk (0xf800UL) /*!< PORT5 IOCR0: PC1 (Bitfield-Mask: 0x1f) */ +#define PORT5_IOCR0_PC2_Pos (19UL) /*!< PORT5 IOCR0: PC2 (Bit 19) */ +#define PORT5_IOCR0_PC2_Msk (0xf80000UL) /*!< PORT5 IOCR0: PC2 (Bitfield-Mask: 0x1f) */ +#define PORT5_IOCR0_PC3_Pos (27UL) /*!< PORT5 IOCR0: PC3 (Bit 27) */ +#define PORT5_IOCR0_PC3_Msk (0xf8000000UL) /*!< PORT5 IOCR0: PC3 (Bitfield-Mask: 0x1f) */ + +/* --------------------------------- PORT5_IOCR4 -------------------------------- */ +#define PORT5_IOCR4_PC4_Pos (3UL) /*!< PORT5 IOCR4: PC4 (Bit 3) */ +#define PORT5_IOCR4_PC4_Msk (0xf8UL) /*!< PORT5 IOCR4: PC4 (Bitfield-Mask: 0x1f) */ +#define PORT5_IOCR4_PC5_Pos (11UL) /*!< PORT5 IOCR4: PC5 (Bit 11) */ +#define PORT5_IOCR4_PC5_Msk (0xf800UL) /*!< PORT5 IOCR4: PC5 (Bitfield-Mask: 0x1f) */ +#define PORT5_IOCR4_PC6_Pos (19UL) /*!< PORT5 IOCR4: PC6 (Bit 19) */ +#define PORT5_IOCR4_PC6_Msk (0xf80000UL) /*!< PORT5 IOCR4: PC6 (Bitfield-Mask: 0x1f) */ +#define PORT5_IOCR4_PC7_Pos (27UL) /*!< PORT5 IOCR4: PC7 (Bit 27) */ +#define PORT5_IOCR4_PC7_Msk (0xf8000000UL) /*!< PORT5 IOCR4: PC7 (Bitfield-Mask: 0x1f) */ + +/* --------------------------------- PORT5_IOCR8 -------------------------------- */ +#define PORT5_IOCR8_PC8_Pos (3UL) /*!< PORT5 IOCR8: PC8 (Bit 3) */ +#define PORT5_IOCR8_PC8_Msk (0xf8UL) /*!< PORT5 IOCR8: PC8 (Bitfield-Mask: 0x1f) */ +#define PORT5_IOCR8_PC9_Pos (11UL) /*!< PORT5 IOCR8: PC9 (Bit 11) */ +#define PORT5_IOCR8_PC9_Msk (0xf800UL) /*!< PORT5 IOCR8: PC9 (Bitfield-Mask: 0x1f) */ +#define PORT5_IOCR8_PC10_Pos (19UL) /*!< PORT5 IOCR8: PC10 (Bit 19) */ +#define PORT5_IOCR8_PC10_Msk (0xf80000UL) /*!< PORT5 IOCR8: PC10 (Bitfield-Mask: 0x1f) */ +#define PORT5_IOCR8_PC11_Pos (27UL) /*!< PORT5 IOCR8: PC11 (Bit 27) */ +#define PORT5_IOCR8_PC11_Msk (0xf8000000UL) /*!< PORT5 IOCR8: PC11 (Bitfield-Mask: 0x1f) */ + +/* ---------------------------------- PORT5_IN ---------------------------------- */ +#define PORT5_IN_P0_Pos (0UL) /*!< PORT5 IN: P0 (Bit 0) */ +#define PORT5_IN_P0_Msk (0x1UL) /*!< PORT5 IN: P0 (Bitfield-Mask: 0x01) */ +#define PORT5_IN_P1_Pos (1UL) /*!< PORT5 IN: P1 (Bit 1) */ +#define PORT5_IN_P1_Msk (0x2UL) /*!< PORT5 IN: P1 (Bitfield-Mask: 0x01) */ +#define PORT5_IN_P2_Pos (2UL) /*!< PORT5 IN: P2 (Bit 2) */ +#define PORT5_IN_P2_Msk (0x4UL) /*!< PORT5 IN: P2 (Bitfield-Mask: 0x01) */ +#define PORT5_IN_P3_Pos (3UL) /*!< PORT5 IN: P3 (Bit 3) */ +#define PORT5_IN_P3_Msk (0x8UL) /*!< PORT5 IN: P3 (Bitfield-Mask: 0x01) */ +#define PORT5_IN_P4_Pos (4UL) /*!< PORT5 IN: P4 (Bit 4) */ +#define PORT5_IN_P4_Msk (0x10UL) /*!< PORT5 IN: P4 (Bitfield-Mask: 0x01) */ +#define PORT5_IN_P5_Pos (5UL) /*!< PORT5 IN: P5 (Bit 5) */ +#define PORT5_IN_P5_Msk (0x20UL) /*!< PORT5 IN: P5 (Bitfield-Mask: 0x01) */ +#define PORT5_IN_P6_Pos (6UL) /*!< PORT5 IN: P6 (Bit 6) */ +#define PORT5_IN_P6_Msk (0x40UL) /*!< PORT5 IN: P6 (Bitfield-Mask: 0x01) */ +#define PORT5_IN_P7_Pos (7UL) /*!< PORT5 IN: P7 (Bit 7) */ +#define PORT5_IN_P7_Msk (0x80UL) /*!< PORT5 IN: P7 (Bitfield-Mask: 0x01) */ +#define PORT5_IN_P8_Pos (8UL) /*!< PORT5 IN: P8 (Bit 8) */ +#define PORT5_IN_P8_Msk (0x100UL) /*!< PORT5 IN: P8 (Bitfield-Mask: 0x01) */ +#define PORT5_IN_P9_Pos (9UL) /*!< PORT5 IN: P9 (Bit 9) */ +#define PORT5_IN_P9_Msk (0x200UL) /*!< PORT5 IN: P9 (Bitfield-Mask: 0x01) */ +#define PORT5_IN_P10_Pos (10UL) /*!< PORT5 IN: P10 (Bit 10) */ +#define PORT5_IN_P10_Msk (0x400UL) /*!< PORT5 IN: P10 (Bitfield-Mask: 0x01) */ +#define PORT5_IN_P11_Pos (11UL) /*!< PORT5 IN: P11 (Bit 11) */ +#define PORT5_IN_P11_Msk (0x800UL) /*!< PORT5 IN: P11 (Bitfield-Mask: 0x01) */ +#define PORT5_IN_P12_Pos (12UL) /*!< PORT5 IN: P12 (Bit 12) */ +#define PORT5_IN_P12_Msk (0x1000UL) /*!< PORT5 IN: P12 (Bitfield-Mask: 0x01) */ +#define PORT5_IN_P13_Pos (13UL) /*!< PORT5 IN: P13 (Bit 13) */ +#define PORT5_IN_P13_Msk (0x2000UL) /*!< PORT5 IN: P13 (Bitfield-Mask: 0x01) */ +#define PORT5_IN_P14_Pos (14UL) /*!< PORT5 IN: P14 (Bit 14) */ +#define PORT5_IN_P14_Msk (0x4000UL) /*!< PORT5 IN: P14 (Bitfield-Mask: 0x01) */ +#define PORT5_IN_P15_Pos (15UL) /*!< PORT5 IN: P15 (Bit 15) */ +#define PORT5_IN_P15_Msk (0x8000UL) /*!< PORT5 IN: P15 (Bitfield-Mask: 0x01) */ + +/* --------------------------------- PORT5_PDR0 --------------------------------- */ +#define PORT5_PDR0_PD0_Pos (0UL) /*!< PORT5 PDR0: PD0 (Bit 0) */ +#define PORT5_PDR0_PD0_Msk (0x7UL) /*!< PORT5 PDR0: PD0 (Bitfield-Mask: 0x07) */ +#define PORT5_PDR0_PD1_Pos (4UL) /*!< PORT5 PDR0: PD1 (Bit 4) */ +#define PORT5_PDR0_PD1_Msk (0x70UL) /*!< PORT5 PDR0: PD1 (Bitfield-Mask: 0x07) */ +#define PORT5_PDR0_PD2_Pos (8UL) /*!< PORT5 PDR0: PD2 (Bit 8) */ +#define PORT5_PDR0_PD2_Msk (0x700UL) /*!< PORT5 PDR0: PD2 (Bitfield-Mask: 0x07) */ +#define PORT5_PDR0_PD3_Pos (12UL) /*!< PORT5 PDR0: PD3 (Bit 12) */ +#define PORT5_PDR0_PD3_Msk (0x7000UL) /*!< PORT5 PDR0: PD3 (Bitfield-Mask: 0x07) */ +#define PORT5_PDR0_PD4_Pos (16UL) /*!< PORT5 PDR0: PD4 (Bit 16) */ +#define PORT5_PDR0_PD4_Msk (0x70000UL) /*!< PORT5 PDR0: PD4 (Bitfield-Mask: 0x07) */ +#define PORT5_PDR0_PD5_Pos (20UL) /*!< PORT5 PDR0: PD5 (Bit 20) */ +#define PORT5_PDR0_PD5_Msk (0x700000UL) /*!< PORT5 PDR0: PD5 (Bitfield-Mask: 0x07) */ +#define PORT5_PDR0_PD6_Pos (24UL) /*!< PORT5 PDR0: PD6 (Bit 24) */ +#define PORT5_PDR0_PD6_Msk (0x7000000UL) /*!< PORT5 PDR0: PD6 (Bitfield-Mask: 0x07) */ +#define PORT5_PDR0_PD7_Pos (28UL) /*!< PORT5 PDR0: PD7 (Bit 28) */ +#define PORT5_PDR0_PD7_Msk (0x70000000UL) /*!< PORT5 PDR0: PD7 (Bitfield-Mask: 0x07) */ + +/* --------------------------------- PORT5_PDR1 --------------------------------- */ +#define PORT5_PDR1_PD8_Pos (0UL) /*!< PORT5 PDR1: PD8 (Bit 0) */ +#define PORT5_PDR1_PD8_Msk (0x7UL) /*!< PORT5 PDR1: PD8 (Bitfield-Mask: 0x07) */ +#define PORT5_PDR1_PD9_Pos (4UL) /*!< PORT5 PDR1: PD9 (Bit 4) */ +#define PORT5_PDR1_PD9_Msk (0x70UL) /*!< PORT5 PDR1: PD9 (Bitfield-Mask: 0x07) */ +#define PORT5_PDR1_PD10_Pos (8UL) /*!< PORT5 PDR1: PD10 (Bit 8) */ +#define PORT5_PDR1_PD10_Msk (0x700UL) /*!< PORT5 PDR1: PD10 (Bitfield-Mask: 0x07) */ +#define PORT5_PDR1_PD11_Pos (12UL) /*!< PORT5 PDR1: PD11 (Bit 12) */ +#define PORT5_PDR1_PD11_Msk (0x7000UL) /*!< PORT5 PDR1: PD11 (Bitfield-Mask: 0x07) */ +#define PORT5_PDR1_PD12_Pos (16UL) /*!< PORT5 PDR1: PD12 (Bit 16) */ +#define PORT5_PDR1_PD12_Msk (0x70000UL) /*!< PORT5 PDR1: PD12 (Bitfield-Mask: 0x07) */ +#define PORT5_PDR1_PD13_Pos (20UL) /*!< PORT5 PDR1: PD13 (Bit 20) */ +#define PORT5_PDR1_PD13_Msk (0x700000UL) /*!< PORT5 PDR1: PD13 (Bitfield-Mask: 0x07) */ +#define PORT5_PDR1_PD14_Pos (24UL) /*!< PORT5 PDR1: PD14 (Bit 24) */ +#define PORT5_PDR1_PD14_Msk (0x7000000UL) /*!< PORT5 PDR1: PD14 (Bitfield-Mask: 0x07) */ +#define PORT5_PDR1_PD15_Pos (28UL) /*!< PORT5 PDR1: PD15 (Bit 28) */ +#define PORT5_PDR1_PD15_Msk (0x70000000UL) /*!< PORT5 PDR1: PD15 (Bitfield-Mask: 0x07) */ + +/* --------------------------------- PORT5_PDISC -------------------------------- */ +#define PORT5_PDISC_PDIS0_Pos (0UL) /*!< PORT5 PDISC: PDIS0 (Bit 0) */ +#define PORT5_PDISC_PDIS0_Msk (0x1UL) /*!< PORT5 PDISC: PDIS0 (Bitfield-Mask: 0x01) */ +#define PORT5_PDISC_PDIS1_Pos (1UL) /*!< PORT5 PDISC: PDIS1 (Bit 1) */ +#define PORT5_PDISC_PDIS1_Msk (0x2UL) /*!< PORT5 PDISC: PDIS1 (Bitfield-Mask: 0x01) */ +#define PORT5_PDISC_PDIS2_Pos (2UL) /*!< PORT5 PDISC: PDIS2 (Bit 2) */ +#define PORT5_PDISC_PDIS2_Msk (0x4UL) /*!< PORT5 PDISC: PDIS2 (Bitfield-Mask: 0x01) */ +#define PORT5_PDISC_PDIS3_Pos (3UL) /*!< PORT5 PDISC: PDIS3 (Bit 3) */ +#define PORT5_PDISC_PDIS3_Msk (0x8UL) /*!< PORT5 PDISC: PDIS3 (Bitfield-Mask: 0x01) */ +#define PORT5_PDISC_PDIS4_Pos (4UL) /*!< PORT5 PDISC: PDIS4 (Bit 4) */ +#define PORT5_PDISC_PDIS4_Msk (0x10UL) /*!< PORT5 PDISC: PDIS4 (Bitfield-Mask: 0x01) */ +#define PORT5_PDISC_PDIS5_Pos (5UL) /*!< PORT5 PDISC: PDIS5 (Bit 5) */ +#define PORT5_PDISC_PDIS5_Msk (0x20UL) /*!< PORT5 PDISC: PDIS5 (Bitfield-Mask: 0x01) */ +#define PORT5_PDISC_PDIS6_Pos (6UL) /*!< PORT5 PDISC: PDIS6 (Bit 6) */ +#define PORT5_PDISC_PDIS6_Msk (0x40UL) /*!< PORT5 PDISC: PDIS6 (Bitfield-Mask: 0x01) */ +#define PORT5_PDISC_PDIS7_Pos (7UL) /*!< PORT5 PDISC: PDIS7 (Bit 7) */ +#define PORT5_PDISC_PDIS7_Msk (0x80UL) /*!< PORT5 PDISC: PDIS7 (Bitfield-Mask: 0x01) */ +#define PORT5_PDISC_PDIS8_Pos (8UL) /*!< PORT5 PDISC: PDIS8 (Bit 8) */ +#define PORT5_PDISC_PDIS8_Msk (0x100UL) /*!< PORT5 PDISC: PDIS8 (Bitfield-Mask: 0x01) */ +#define PORT5_PDISC_PDIS9_Pos (9UL) /*!< PORT5 PDISC: PDIS9 (Bit 9) */ +#define PORT5_PDISC_PDIS9_Msk (0x200UL) /*!< PORT5 PDISC: PDIS9 (Bitfield-Mask: 0x01) */ +#define PORT5_PDISC_PDIS10_Pos (10UL) /*!< PORT5 PDISC: PDIS10 (Bit 10) */ +#define PORT5_PDISC_PDIS10_Msk (0x400UL) /*!< PORT5 PDISC: PDIS10 (Bitfield-Mask: 0x01) */ +#define PORT5_PDISC_PDIS11_Pos (11UL) /*!< PORT5 PDISC: PDIS11 (Bit 11) */ +#define PORT5_PDISC_PDIS11_Msk (0x800UL) /*!< PORT5 PDISC: PDIS11 (Bitfield-Mask: 0x01) */ +#define PORT5_PDISC_PDIS12_Pos (12UL) /*!< PORT5 PDISC: PDIS12 (Bit 12) */ +#define PORT5_PDISC_PDIS12_Msk (0x1000UL) /*!< PORT5 PDISC: PDIS12 (Bitfield-Mask: 0x01) */ +#define PORT5_PDISC_PDIS13_Pos (13UL) /*!< PORT5 PDISC: PDIS13 (Bit 13) */ +#define PORT5_PDISC_PDIS13_Msk (0x2000UL) /*!< PORT5 PDISC: PDIS13 (Bitfield-Mask: 0x01) */ +#define PORT5_PDISC_PDIS14_Pos (14UL) /*!< PORT5 PDISC: PDIS14 (Bit 14) */ +#define PORT5_PDISC_PDIS14_Msk (0x4000UL) /*!< PORT5 PDISC: PDIS14 (Bitfield-Mask: 0x01) */ +#define PORT5_PDISC_PDIS15_Pos (15UL) /*!< PORT5 PDISC: PDIS15 (Bit 15) */ +#define PORT5_PDISC_PDIS15_Msk (0x8000UL) /*!< PORT5 PDISC: PDIS15 (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- PORT5_PPS --------------------------------- */ +#define PORT5_PPS_PPS0_Pos (0UL) /*!< PORT5 PPS: PPS0 (Bit 0) */ +#define PORT5_PPS_PPS0_Msk (0x1UL) /*!< PORT5 PPS: PPS0 (Bitfield-Mask: 0x01) */ +#define PORT5_PPS_PPS1_Pos (1UL) /*!< PORT5 PPS: PPS1 (Bit 1) */ +#define PORT5_PPS_PPS1_Msk (0x2UL) /*!< PORT5 PPS: PPS1 (Bitfield-Mask: 0x01) */ +#define PORT5_PPS_PPS2_Pos (2UL) /*!< PORT5 PPS: PPS2 (Bit 2) */ +#define PORT5_PPS_PPS2_Msk (0x4UL) /*!< PORT5 PPS: PPS2 (Bitfield-Mask: 0x01) */ +#define PORT5_PPS_PPS3_Pos (3UL) /*!< PORT5 PPS: PPS3 (Bit 3) */ +#define PORT5_PPS_PPS3_Msk (0x8UL) /*!< PORT5 PPS: PPS3 (Bitfield-Mask: 0x01) */ +#define PORT5_PPS_PPS4_Pos (4UL) /*!< PORT5 PPS: PPS4 (Bit 4) */ +#define PORT5_PPS_PPS4_Msk (0x10UL) /*!< PORT5 PPS: PPS4 (Bitfield-Mask: 0x01) */ +#define PORT5_PPS_PPS5_Pos (5UL) /*!< PORT5 PPS: PPS5 (Bit 5) */ +#define PORT5_PPS_PPS5_Msk (0x20UL) /*!< PORT5 PPS: PPS5 (Bitfield-Mask: 0x01) */ +#define PORT5_PPS_PPS6_Pos (6UL) /*!< PORT5 PPS: PPS6 (Bit 6) */ +#define PORT5_PPS_PPS6_Msk (0x40UL) /*!< PORT5 PPS: PPS6 (Bitfield-Mask: 0x01) */ +#define PORT5_PPS_PPS7_Pos (7UL) /*!< PORT5 PPS: PPS7 (Bit 7) */ +#define PORT5_PPS_PPS7_Msk (0x80UL) /*!< PORT5 PPS: PPS7 (Bitfield-Mask: 0x01) */ +#define PORT5_PPS_PPS8_Pos (8UL) /*!< PORT5 PPS: PPS8 (Bit 8) */ +#define PORT5_PPS_PPS8_Msk (0x100UL) /*!< PORT5 PPS: PPS8 (Bitfield-Mask: 0x01) */ +#define PORT5_PPS_PPS9_Pos (9UL) /*!< PORT5 PPS: PPS9 (Bit 9) */ +#define PORT5_PPS_PPS9_Msk (0x200UL) /*!< PORT5 PPS: PPS9 (Bitfield-Mask: 0x01) */ +#define PORT5_PPS_PPS10_Pos (10UL) /*!< PORT5 PPS: PPS10 (Bit 10) */ +#define PORT5_PPS_PPS10_Msk (0x400UL) /*!< PORT5 PPS: PPS10 (Bitfield-Mask: 0x01) */ +#define PORT5_PPS_PPS11_Pos (11UL) /*!< PORT5 PPS: PPS11 (Bit 11) */ +#define PORT5_PPS_PPS11_Msk (0x800UL) /*!< PORT5 PPS: PPS11 (Bitfield-Mask: 0x01) */ +#define PORT5_PPS_PPS12_Pos (12UL) /*!< PORT5 PPS: PPS12 (Bit 12) */ +#define PORT5_PPS_PPS12_Msk (0x1000UL) /*!< PORT5 PPS: PPS12 (Bitfield-Mask: 0x01) */ +#define PORT5_PPS_PPS13_Pos (13UL) /*!< PORT5 PPS: PPS13 (Bit 13) */ +#define PORT5_PPS_PPS13_Msk (0x2000UL) /*!< PORT5 PPS: PPS13 (Bitfield-Mask: 0x01) */ +#define PORT5_PPS_PPS14_Pos (14UL) /*!< PORT5 PPS: PPS14 (Bit 14) */ +#define PORT5_PPS_PPS14_Msk (0x4000UL) /*!< PORT5 PPS: PPS14 (Bitfield-Mask: 0x01) */ +#define PORT5_PPS_PPS15_Pos (15UL) /*!< PORT5 PPS: PPS15 (Bit 15) */ +#define PORT5_PPS_PPS15_Msk (0x8000UL) /*!< PORT5 PPS: PPS15 (Bitfield-Mask: 0x01) */ + +/* --------------------------------- PORT5_HWSEL -------------------------------- */ +#define PORT5_HWSEL_HW0_Pos (0UL) /*!< PORT5 HWSEL: HW0 (Bit 0) */ +#define PORT5_HWSEL_HW0_Msk (0x3UL) /*!< PORT5 HWSEL: HW0 (Bitfield-Mask: 0x03) */ +#define PORT5_HWSEL_HW1_Pos (2UL) /*!< PORT5 HWSEL: HW1 (Bit 2) */ +#define PORT5_HWSEL_HW1_Msk (0xcUL) /*!< PORT5 HWSEL: HW1 (Bitfield-Mask: 0x03) */ +#define PORT5_HWSEL_HW2_Pos (4UL) /*!< PORT5 HWSEL: HW2 (Bit 4) */ +#define PORT5_HWSEL_HW2_Msk (0x30UL) /*!< PORT5 HWSEL: HW2 (Bitfield-Mask: 0x03) */ +#define PORT5_HWSEL_HW3_Pos (6UL) /*!< PORT5 HWSEL: HW3 (Bit 6) */ +#define PORT5_HWSEL_HW3_Msk (0xc0UL) /*!< PORT5 HWSEL: HW3 (Bitfield-Mask: 0x03) */ +#define PORT5_HWSEL_HW4_Pos (8UL) /*!< PORT5 HWSEL: HW4 (Bit 8) */ +#define PORT5_HWSEL_HW4_Msk (0x300UL) /*!< PORT5 HWSEL: HW4 (Bitfield-Mask: 0x03) */ +#define PORT5_HWSEL_HW5_Pos (10UL) /*!< PORT5 HWSEL: HW5 (Bit 10) */ +#define PORT5_HWSEL_HW5_Msk (0xc00UL) /*!< PORT5 HWSEL: HW5 (Bitfield-Mask: 0x03) */ +#define PORT5_HWSEL_HW6_Pos (12UL) /*!< PORT5 HWSEL: HW6 (Bit 12) */ +#define PORT5_HWSEL_HW6_Msk (0x3000UL) /*!< PORT5 HWSEL: HW6 (Bitfield-Mask: 0x03) */ +#define PORT5_HWSEL_HW7_Pos (14UL) /*!< PORT5 HWSEL: HW7 (Bit 14) */ +#define PORT5_HWSEL_HW7_Msk (0xc000UL) /*!< PORT5 HWSEL: HW7 (Bitfield-Mask: 0x03) */ +#define PORT5_HWSEL_HW8_Pos (16UL) /*!< PORT5 HWSEL: HW8 (Bit 16) */ +#define PORT5_HWSEL_HW8_Msk (0x30000UL) /*!< PORT5 HWSEL: HW8 (Bitfield-Mask: 0x03) */ +#define PORT5_HWSEL_HW9_Pos (18UL) /*!< PORT5 HWSEL: HW9 (Bit 18) */ +#define PORT5_HWSEL_HW9_Msk (0xc0000UL) /*!< PORT5 HWSEL: HW9 (Bitfield-Mask: 0x03) */ +#define PORT5_HWSEL_HW10_Pos (20UL) /*!< PORT5 HWSEL: HW10 (Bit 20) */ +#define PORT5_HWSEL_HW10_Msk (0x300000UL) /*!< PORT5 HWSEL: HW10 (Bitfield-Mask: 0x03) */ +#define PORT5_HWSEL_HW11_Pos (22UL) /*!< PORT5 HWSEL: HW11 (Bit 22) */ +#define PORT5_HWSEL_HW11_Msk (0xc00000UL) /*!< PORT5 HWSEL: HW11 (Bitfield-Mask: 0x03) */ +#define PORT5_HWSEL_HW12_Pos (24UL) /*!< PORT5 HWSEL: HW12 (Bit 24) */ +#define PORT5_HWSEL_HW12_Msk (0x3000000UL) /*!< PORT5 HWSEL: HW12 (Bitfield-Mask: 0x03) */ +#define PORT5_HWSEL_HW13_Pos (26UL) /*!< PORT5 HWSEL: HW13 (Bit 26) */ +#define PORT5_HWSEL_HW13_Msk (0xc000000UL) /*!< PORT5 HWSEL: HW13 (Bitfield-Mask: 0x03) */ +#define PORT5_HWSEL_HW14_Pos (28UL) /*!< PORT5 HWSEL: HW14 (Bit 28) */ +#define PORT5_HWSEL_HW14_Msk (0x30000000UL) /*!< PORT5 HWSEL: HW14 (Bitfield-Mask: 0x03) */ +#define PORT5_HWSEL_HW15_Pos (30UL) /*!< PORT5 HWSEL: HW15 (Bit 30) */ +#define PORT5_HWSEL_HW15_Msk (0xc0000000UL) /*!< PORT5 HWSEL: HW15 (Bitfield-Mask: 0x03) */ + + +/* ================================================================================ */ +/* ================ struct 'PORT6' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ---------------------------------- PORT6_OUT --------------------------------- */ +#define PORT6_OUT_P0_Pos (0UL) /*!< PORT6 OUT: P0 (Bit 0) */ +#define PORT6_OUT_P0_Msk (0x1UL) /*!< PORT6 OUT: P0 (Bitfield-Mask: 0x01) */ +#define PORT6_OUT_P1_Pos (1UL) /*!< PORT6 OUT: P1 (Bit 1) */ +#define PORT6_OUT_P1_Msk (0x2UL) /*!< PORT6 OUT: P1 (Bitfield-Mask: 0x01) */ +#define PORT6_OUT_P2_Pos (2UL) /*!< PORT6 OUT: P2 (Bit 2) */ +#define PORT6_OUT_P2_Msk (0x4UL) /*!< PORT6 OUT: P2 (Bitfield-Mask: 0x01) */ +#define PORT6_OUT_P3_Pos (3UL) /*!< PORT6 OUT: P3 (Bit 3) */ +#define PORT6_OUT_P3_Msk (0x8UL) /*!< PORT6 OUT: P3 (Bitfield-Mask: 0x01) */ +#define PORT6_OUT_P4_Pos (4UL) /*!< PORT6 OUT: P4 (Bit 4) */ +#define PORT6_OUT_P4_Msk (0x10UL) /*!< PORT6 OUT: P4 (Bitfield-Mask: 0x01) */ +#define PORT6_OUT_P5_Pos (5UL) /*!< PORT6 OUT: P5 (Bit 5) */ +#define PORT6_OUT_P5_Msk (0x20UL) /*!< PORT6 OUT: P5 (Bitfield-Mask: 0x01) */ +#define PORT6_OUT_P6_Pos (6UL) /*!< PORT6 OUT: P6 (Bit 6) */ +#define PORT6_OUT_P6_Msk (0x40UL) /*!< PORT6 OUT: P6 (Bitfield-Mask: 0x01) */ +#define PORT6_OUT_P7_Pos (7UL) /*!< PORT6 OUT: P7 (Bit 7) */ +#define PORT6_OUT_P7_Msk (0x80UL) /*!< PORT6 OUT: P7 (Bitfield-Mask: 0x01) */ +#define PORT6_OUT_P8_Pos (8UL) /*!< PORT6 OUT: P8 (Bit 8) */ +#define PORT6_OUT_P8_Msk (0x100UL) /*!< PORT6 OUT: P8 (Bitfield-Mask: 0x01) */ +#define PORT6_OUT_P9_Pos (9UL) /*!< PORT6 OUT: P9 (Bit 9) */ +#define PORT6_OUT_P9_Msk (0x200UL) /*!< PORT6 OUT: P9 (Bitfield-Mask: 0x01) */ +#define PORT6_OUT_P10_Pos (10UL) /*!< PORT6 OUT: P10 (Bit 10) */ +#define PORT6_OUT_P10_Msk (0x400UL) /*!< PORT6 OUT: P10 (Bitfield-Mask: 0x01) */ +#define PORT6_OUT_P11_Pos (11UL) /*!< PORT6 OUT: P11 (Bit 11) */ +#define PORT6_OUT_P11_Msk (0x800UL) /*!< PORT6 OUT: P11 (Bitfield-Mask: 0x01) */ +#define PORT6_OUT_P12_Pos (12UL) /*!< PORT6 OUT: P12 (Bit 12) */ +#define PORT6_OUT_P12_Msk (0x1000UL) /*!< PORT6 OUT: P12 (Bitfield-Mask: 0x01) */ +#define PORT6_OUT_P13_Pos (13UL) /*!< PORT6 OUT: P13 (Bit 13) */ +#define PORT6_OUT_P13_Msk (0x2000UL) /*!< PORT6 OUT: P13 (Bitfield-Mask: 0x01) */ +#define PORT6_OUT_P14_Pos (14UL) /*!< PORT6 OUT: P14 (Bit 14) */ +#define PORT6_OUT_P14_Msk (0x4000UL) /*!< PORT6 OUT: P14 (Bitfield-Mask: 0x01) */ +#define PORT6_OUT_P15_Pos (15UL) /*!< PORT6 OUT: P15 (Bit 15) */ +#define PORT6_OUT_P15_Msk (0x8000UL) /*!< PORT6 OUT: P15 (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- PORT6_OMR --------------------------------- */ +#define PORT6_OMR_PS0_Pos (0UL) /*!< PORT6 OMR: PS0 (Bit 0) */ +#define PORT6_OMR_PS0_Msk (0x1UL) /*!< PORT6 OMR: PS0 (Bitfield-Mask: 0x01) */ +#define PORT6_OMR_PS1_Pos (1UL) /*!< PORT6 OMR: PS1 (Bit 1) */ +#define PORT6_OMR_PS1_Msk (0x2UL) /*!< PORT6 OMR: PS1 (Bitfield-Mask: 0x01) */ +#define PORT6_OMR_PS2_Pos (2UL) /*!< PORT6 OMR: PS2 (Bit 2) */ +#define PORT6_OMR_PS2_Msk (0x4UL) /*!< PORT6 OMR: PS2 (Bitfield-Mask: 0x01) */ +#define PORT6_OMR_PS3_Pos (3UL) /*!< PORT6 OMR: PS3 (Bit 3) */ +#define PORT6_OMR_PS3_Msk (0x8UL) /*!< PORT6 OMR: PS3 (Bitfield-Mask: 0x01) */ +#define PORT6_OMR_PS4_Pos (4UL) /*!< PORT6 OMR: PS4 (Bit 4) */ +#define PORT6_OMR_PS4_Msk (0x10UL) /*!< PORT6 OMR: PS4 (Bitfield-Mask: 0x01) */ +#define PORT6_OMR_PS5_Pos (5UL) /*!< PORT6 OMR: PS5 (Bit 5) */ +#define PORT6_OMR_PS5_Msk (0x20UL) /*!< PORT6 OMR: PS5 (Bitfield-Mask: 0x01) */ +#define PORT6_OMR_PS6_Pos (6UL) /*!< PORT6 OMR: PS6 (Bit 6) */ +#define PORT6_OMR_PS6_Msk (0x40UL) /*!< PORT6 OMR: PS6 (Bitfield-Mask: 0x01) */ +#define PORT6_OMR_PS7_Pos (7UL) /*!< PORT6 OMR: PS7 (Bit 7) */ +#define PORT6_OMR_PS7_Msk (0x80UL) /*!< PORT6 OMR: PS7 (Bitfield-Mask: 0x01) */ +#define PORT6_OMR_PS8_Pos (8UL) /*!< PORT6 OMR: PS8 (Bit 8) */ +#define PORT6_OMR_PS8_Msk (0x100UL) /*!< PORT6 OMR: PS8 (Bitfield-Mask: 0x01) */ +#define PORT6_OMR_PS9_Pos (9UL) /*!< PORT6 OMR: PS9 (Bit 9) */ +#define PORT6_OMR_PS9_Msk (0x200UL) /*!< PORT6 OMR: PS9 (Bitfield-Mask: 0x01) */ +#define PORT6_OMR_PS10_Pos (10UL) /*!< PORT6 OMR: PS10 (Bit 10) */ +#define PORT6_OMR_PS10_Msk (0x400UL) /*!< PORT6 OMR: PS10 (Bitfield-Mask: 0x01) */ +#define PORT6_OMR_PS11_Pos (11UL) /*!< PORT6 OMR: PS11 (Bit 11) */ +#define PORT6_OMR_PS11_Msk (0x800UL) /*!< PORT6 OMR: PS11 (Bitfield-Mask: 0x01) */ +#define PORT6_OMR_PS12_Pos (12UL) /*!< PORT6 OMR: PS12 (Bit 12) */ +#define PORT6_OMR_PS12_Msk (0x1000UL) /*!< PORT6 OMR: PS12 (Bitfield-Mask: 0x01) */ +#define PORT6_OMR_PS13_Pos (13UL) /*!< PORT6 OMR: PS13 (Bit 13) */ +#define PORT6_OMR_PS13_Msk (0x2000UL) /*!< PORT6 OMR: PS13 (Bitfield-Mask: 0x01) */ +#define PORT6_OMR_PS14_Pos (14UL) /*!< PORT6 OMR: PS14 (Bit 14) */ +#define PORT6_OMR_PS14_Msk (0x4000UL) /*!< PORT6 OMR: PS14 (Bitfield-Mask: 0x01) */ +#define PORT6_OMR_PS15_Pos (15UL) /*!< PORT6 OMR: PS15 (Bit 15) */ +#define PORT6_OMR_PS15_Msk (0x8000UL) /*!< PORT6 OMR: PS15 (Bitfield-Mask: 0x01) */ +#define PORT6_OMR_PR0_Pos (16UL) /*!< PORT6 OMR: PR0 (Bit 16) */ +#define PORT6_OMR_PR0_Msk (0x10000UL) /*!< PORT6 OMR: PR0 (Bitfield-Mask: 0x01) */ +#define PORT6_OMR_PR1_Pos (17UL) /*!< PORT6 OMR: PR1 (Bit 17) */ +#define PORT6_OMR_PR1_Msk (0x20000UL) /*!< PORT6 OMR: PR1 (Bitfield-Mask: 0x01) */ +#define PORT6_OMR_PR2_Pos (18UL) /*!< PORT6 OMR: PR2 (Bit 18) */ +#define PORT6_OMR_PR2_Msk (0x40000UL) /*!< PORT6 OMR: PR2 (Bitfield-Mask: 0x01) */ +#define PORT6_OMR_PR3_Pos (19UL) /*!< PORT6 OMR: PR3 (Bit 19) */ +#define PORT6_OMR_PR3_Msk (0x80000UL) /*!< PORT6 OMR: PR3 (Bitfield-Mask: 0x01) */ +#define PORT6_OMR_PR4_Pos (20UL) /*!< PORT6 OMR: PR4 (Bit 20) */ +#define PORT6_OMR_PR4_Msk (0x100000UL) /*!< PORT6 OMR: PR4 (Bitfield-Mask: 0x01) */ +#define PORT6_OMR_PR5_Pos (21UL) /*!< PORT6 OMR: PR5 (Bit 21) */ +#define PORT6_OMR_PR5_Msk (0x200000UL) /*!< PORT6 OMR: PR5 (Bitfield-Mask: 0x01) */ +#define PORT6_OMR_PR6_Pos (22UL) /*!< PORT6 OMR: PR6 (Bit 22) */ +#define PORT6_OMR_PR6_Msk (0x400000UL) /*!< PORT6 OMR: PR6 (Bitfield-Mask: 0x01) */ +#define PORT6_OMR_PR7_Pos (23UL) /*!< PORT6 OMR: PR7 (Bit 23) */ +#define PORT6_OMR_PR7_Msk (0x800000UL) /*!< PORT6 OMR: PR7 (Bitfield-Mask: 0x01) */ +#define PORT6_OMR_PR8_Pos (24UL) /*!< PORT6 OMR: PR8 (Bit 24) */ +#define PORT6_OMR_PR8_Msk (0x1000000UL) /*!< PORT6 OMR: PR8 (Bitfield-Mask: 0x01) */ +#define PORT6_OMR_PR9_Pos (25UL) /*!< PORT6 OMR: PR9 (Bit 25) */ +#define PORT6_OMR_PR9_Msk (0x2000000UL) /*!< PORT6 OMR: PR9 (Bitfield-Mask: 0x01) */ +#define PORT6_OMR_PR10_Pos (26UL) /*!< PORT6 OMR: PR10 (Bit 26) */ +#define PORT6_OMR_PR10_Msk (0x4000000UL) /*!< PORT6 OMR: PR10 (Bitfield-Mask: 0x01) */ +#define PORT6_OMR_PR11_Pos (27UL) /*!< PORT6 OMR: PR11 (Bit 27) */ +#define PORT6_OMR_PR11_Msk (0x8000000UL) /*!< PORT6 OMR: PR11 (Bitfield-Mask: 0x01) */ +#define PORT6_OMR_PR12_Pos (28UL) /*!< PORT6 OMR: PR12 (Bit 28) */ +#define PORT6_OMR_PR12_Msk (0x10000000UL) /*!< PORT6 OMR: PR12 (Bitfield-Mask: 0x01) */ +#define PORT6_OMR_PR13_Pos (29UL) /*!< PORT6 OMR: PR13 (Bit 29) */ +#define PORT6_OMR_PR13_Msk (0x20000000UL) /*!< PORT6 OMR: PR13 (Bitfield-Mask: 0x01) */ +#define PORT6_OMR_PR14_Pos (30UL) /*!< PORT6 OMR: PR14 (Bit 30) */ +#define PORT6_OMR_PR14_Msk (0x40000000UL) /*!< PORT6 OMR: PR14 (Bitfield-Mask: 0x01) */ +#define PORT6_OMR_PR15_Pos (31UL) /*!< PORT6 OMR: PR15 (Bit 31) */ +#define PORT6_OMR_PR15_Msk (0x80000000UL) /*!< PORT6 OMR: PR15 (Bitfield-Mask: 0x01) */ + +/* --------------------------------- PORT6_IOCR0 -------------------------------- */ +#define PORT6_IOCR0_PC0_Pos (3UL) /*!< PORT6 IOCR0: PC0 (Bit 3) */ +#define PORT6_IOCR0_PC0_Msk (0xf8UL) /*!< PORT6 IOCR0: PC0 (Bitfield-Mask: 0x1f) */ +#define PORT6_IOCR0_PC1_Pos (11UL) /*!< PORT6 IOCR0: PC1 (Bit 11) */ +#define PORT6_IOCR0_PC1_Msk (0xf800UL) /*!< PORT6 IOCR0: PC1 (Bitfield-Mask: 0x1f) */ +#define PORT6_IOCR0_PC2_Pos (19UL) /*!< PORT6 IOCR0: PC2 (Bit 19) */ +#define PORT6_IOCR0_PC2_Msk (0xf80000UL) /*!< PORT6 IOCR0: PC2 (Bitfield-Mask: 0x1f) */ +#define PORT6_IOCR0_PC3_Pos (27UL) /*!< PORT6 IOCR0: PC3 (Bit 27) */ +#define PORT6_IOCR0_PC3_Msk (0xf8000000UL) /*!< PORT6 IOCR0: PC3 (Bitfield-Mask: 0x1f) */ + +/* --------------------------------- PORT6_IOCR4 -------------------------------- */ +#define PORT6_IOCR4_PC4_Pos (3UL) /*!< PORT6 IOCR4: PC4 (Bit 3) */ +#define PORT6_IOCR4_PC4_Msk (0xf8UL) /*!< PORT6 IOCR4: PC4 (Bitfield-Mask: 0x1f) */ +#define PORT6_IOCR4_PC5_Pos (11UL) /*!< PORT6 IOCR4: PC5 (Bit 11) */ +#define PORT6_IOCR4_PC5_Msk (0xf800UL) /*!< PORT6 IOCR4: PC5 (Bitfield-Mask: 0x1f) */ +#define PORT6_IOCR4_PC6_Pos (19UL) /*!< PORT6 IOCR4: PC6 (Bit 19) */ +#define PORT6_IOCR4_PC6_Msk (0xf80000UL) /*!< PORT6 IOCR4: PC6 (Bitfield-Mask: 0x1f) */ +#define PORT6_IOCR4_PC7_Pos (27UL) /*!< PORT6 IOCR4: PC7 (Bit 27) */ +#define PORT6_IOCR4_PC7_Msk (0xf8000000UL) /*!< PORT6 IOCR4: PC7 (Bitfield-Mask: 0x1f) */ + +/* ---------------------------------- PORT6_IN ---------------------------------- */ +#define PORT6_IN_P0_Pos (0UL) /*!< PORT6 IN: P0 (Bit 0) */ +#define PORT6_IN_P0_Msk (0x1UL) /*!< PORT6 IN: P0 (Bitfield-Mask: 0x01) */ +#define PORT6_IN_P1_Pos (1UL) /*!< PORT6 IN: P1 (Bit 1) */ +#define PORT6_IN_P1_Msk (0x2UL) /*!< PORT6 IN: P1 (Bitfield-Mask: 0x01) */ +#define PORT6_IN_P2_Pos (2UL) /*!< PORT6 IN: P2 (Bit 2) */ +#define PORT6_IN_P2_Msk (0x4UL) /*!< PORT6 IN: P2 (Bitfield-Mask: 0x01) */ +#define PORT6_IN_P3_Pos (3UL) /*!< PORT6 IN: P3 (Bit 3) */ +#define PORT6_IN_P3_Msk (0x8UL) /*!< PORT6 IN: P3 (Bitfield-Mask: 0x01) */ +#define PORT6_IN_P4_Pos (4UL) /*!< PORT6 IN: P4 (Bit 4) */ +#define PORT6_IN_P4_Msk (0x10UL) /*!< PORT6 IN: P4 (Bitfield-Mask: 0x01) */ +#define PORT6_IN_P5_Pos (5UL) /*!< PORT6 IN: P5 (Bit 5) */ +#define PORT6_IN_P5_Msk (0x20UL) /*!< PORT6 IN: P5 (Bitfield-Mask: 0x01) */ +#define PORT6_IN_P6_Pos (6UL) /*!< PORT6 IN: P6 (Bit 6) */ +#define PORT6_IN_P6_Msk (0x40UL) /*!< PORT6 IN: P6 (Bitfield-Mask: 0x01) */ +#define PORT6_IN_P7_Pos (7UL) /*!< PORT6 IN: P7 (Bit 7) */ +#define PORT6_IN_P7_Msk (0x80UL) /*!< PORT6 IN: P7 (Bitfield-Mask: 0x01) */ +#define PORT6_IN_P8_Pos (8UL) /*!< PORT6 IN: P8 (Bit 8) */ +#define PORT6_IN_P8_Msk (0x100UL) /*!< PORT6 IN: P8 (Bitfield-Mask: 0x01) */ +#define PORT6_IN_P9_Pos (9UL) /*!< PORT6 IN: P9 (Bit 9) */ +#define PORT6_IN_P9_Msk (0x200UL) /*!< PORT6 IN: P9 (Bitfield-Mask: 0x01) */ +#define PORT6_IN_P10_Pos (10UL) /*!< PORT6 IN: P10 (Bit 10) */ +#define PORT6_IN_P10_Msk (0x400UL) /*!< PORT6 IN: P10 (Bitfield-Mask: 0x01) */ +#define PORT6_IN_P11_Pos (11UL) /*!< PORT6 IN: P11 (Bit 11) */ +#define PORT6_IN_P11_Msk (0x800UL) /*!< PORT6 IN: P11 (Bitfield-Mask: 0x01) */ +#define PORT6_IN_P12_Pos (12UL) /*!< PORT6 IN: P12 (Bit 12) */ +#define PORT6_IN_P12_Msk (0x1000UL) /*!< PORT6 IN: P12 (Bitfield-Mask: 0x01) */ +#define PORT6_IN_P13_Pos (13UL) /*!< PORT6 IN: P13 (Bit 13) */ +#define PORT6_IN_P13_Msk (0x2000UL) /*!< PORT6 IN: P13 (Bitfield-Mask: 0x01) */ +#define PORT6_IN_P14_Pos (14UL) /*!< PORT6 IN: P14 (Bit 14) */ +#define PORT6_IN_P14_Msk (0x4000UL) /*!< PORT6 IN: P14 (Bitfield-Mask: 0x01) */ +#define PORT6_IN_P15_Pos (15UL) /*!< PORT6 IN: P15 (Bit 15) */ +#define PORT6_IN_P15_Msk (0x8000UL) /*!< PORT6 IN: P15 (Bitfield-Mask: 0x01) */ + +/* --------------------------------- PORT6_PDR0 --------------------------------- */ +#define PORT6_PDR0_PD0_Pos (0UL) /*!< PORT6 PDR0: PD0 (Bit 0) */ +#define PORT6_PDR0_PD0_Msk (0x7UL) /*!< PORT6 PDR0: PD0 (Bitfield-Mask: 0x07) */ +#define PORT6_PDR0_PD1_Pos (4UL) /*!< PORT6 PDR0: PD1 (Bit 4) */ +#define PORT6_PDR0_PD1_Msk (0x70UL) /*!< PORT6 PDR0: PD1 (Bitfield-Mask: 0x07) */ +#define PORT6_PDR0_PD2_Pos (8UL) /*!< PORT6 PDR0: PD2 (Bit 8) */ +#define PORT6_PDR0_PD2_Msk (0x700UL) /*!< PORT6 PDR0: PD2 (Bitfield-Mask: 0x07) */ +#define PORT6_PDR0_PD3_Pos (12UL) /*!< PORT6 PDR0: PD3 (Bit 12) */ +#define PORT6_PDR0_PD3_Msk (0x7000UL) /*!< PORT6 PDR0: PD3 (Bitfield-Mask: 0x07) */ +#define PORT6_PDR0_PD4_Pos (16UL) /*!< PORT6 PDR0: PD4 (Bit 16) */ +#define PORT6_PDR0_PD4_Msk (0x70000UL) /*!< PORT6 PDR0: PD4 (Bitfield-Mask: 0x07) */ +#define PORT6_PDR0_PD5_Pos (20UL) /*!< PORT6 PDR0: PD5 (Bit 20) */ +#define PORT6_PDR0_PD5_Msk (0x700000UL) /*!< PORT6 PDR0: PD5 (Bitfield-Mask: 0x07) */ +#define PORT6_PDR0_PD6_Pos (24UL) /*!< PORT6 PDR0: PD6 (Bit 24) */ +#define PORT6_PDR0_PD6_Msk (0x7000000UL) /*!< PORT6 PDR0: PD6 (Bitfield-Mask: 0x07) */ +#define PORT6_PDR0_PD7_Pos (28UL) /*!< PORT6 PDR0: PD7 (Bit 28) */ +#define PORT6_PDR0_PD7_Msk (0x70000000UL) /*!< PORT6 PDR0: PD7 (Bitfield-Mask: 0x07) */ + +/* --------------------------------- PORT6_PDISC -------------------------------- */ +#define PORT6_PDISC_PDIS0_Pos (0UL) /*!< PORT6 PDISC: PDIS0 (Bit 0) */ +#define PORT6_PDISC_PDIS0_Msk (0x1UL) /*!< PORT6 PDISC: PDIS0 (Bitfield-Mask: 0x01) */ +#define PORT6_PDISC_PDIS1_Pos (1UL) /*!< PORT6 PDISC: PDIS1 (Bit 1) */ +#define PORT6_PDISC_PDIS1_Msk (0x2UL) /*!< PORT6 PDISC: PDIS1 (Bitfield-Mask: 0x01) */ +#define PORT6_PDISC_PDIS2_Pos (2UL) /*!< PORT6 PDISC: PDIS2 (Bit 2) */ +#define PORT6_PDISC_PDIS2_Msk (0x4UL) /*!< PORT6 PDISC: PDIS2 (Bitfield-Mask: 0x01) */ +#define PORT6_PDISC_PDIS3_Pos (3UL) /*!< PORT6 PDISC: PDIS3 (Bit 3) */ +#define PORT6_PDISC_PDIS3_Msk (0x8UL) /*!< PORT6 PDISC: PDIS3 (Bitfield-Mask: 0x01) */ +#define PORT6_PDISC_PDIS4_Pos (4UL) /*!< PORT6 PDISC: PDIS4 (Bit 4) */ +#define PORT6_PDISC_PDIS4_Msk (0x10UL) /*!< PORT6 PDISC: PDIS4 (Bitfield-Mask: 0x01) */ +#define PORT6_PDISC_PDIS5_Pos (5UL) /*!< PORT6 PDISC: PDIS5 (Bit 5) */ +#define PORT6_PDISC_PDIS5_Msk (0x20UL) /*!< PORT6 PDISC: PDIS5 (Bitfield-Mask: 0x01) */ +#define PORT6_PDISC_PDIS6_Pos (6UL) /*!< PORT6 PDISC: PDIS6 (Bit 6) */ +#define PORT6_PDISC_PDIS6_Msk (0x40UL) /*!< PORT6 PDISC: PDIS6 (Bitfield-Mask: 0x01) */ +#define PORT6_PDISC_PDIS7_Pos (7UL) /*!< PORT6 PDISC: PDIS7 (Bit 7) */ +#define PORT6_PDISC_PDIS7_Msk (0x80UL) /*!< PORT6 PDISC: PDIS7 (Bitfield-Mask: 0x01) */ +#define PORT6_PDISC_PDIS8_Pos (8UL) /*!< PORT6 PDISC: PDIS8 (Bit 8) */ +#define PORT6_PDISC_PDIS8_Msk (0x100UL) /*!< PORT6 PDISC: PDIS8 (Bitfield-Mask: 0x01) */ +#define PORT6_PDISC_PDIS9_Pos (9UL) /*!< PORT6 PDISC: PDIS9 (Bit 9) */ +#define PORT6_PDISC_PDIS9_Msk (0x200UL) /*!< PORT6 PDISC: PDIS9 (Bitfield-Mask: 0x01) */ +#define PORT6_PDISC_PDIS10_Pos (10UL) /*!< PORT6 PDISC: PDIS10 (Bit 10) */ +#define PORT6_PDISC_PDIS10_Msk (0x400UL) /*!< PORT6 PDISC: PDIS10 (Bitfield-Mask: 0x01) */ +#define PORT6_PDISC_PDIS11_Pos (11UL) /*!< PORT6 PDISC: PDIS11 (Bit 11) */ +#define PORT6_PDISC_PDIS11_Msk (0x800UL) /*!< PORT6 PDISC: PDIS11 (Bitfield-Mask: 0x01) */ +#define PORT6_PDISC_PDIS12_Pos (12UL) /*!< PORT6 PDISC: PDIS12 (Bit 12) */ +#define PORT6_PDISC_PDIS12_Msk (0x1000UL) /*!< PORT6 PDISC: PDIS12 (Bitfield-Mask: 0x01) */ +#define PORT6_PDISC_PDIS13_Pos (13UL) /*!< PORT6 PDISC: PDIS13 (Bit 13) */ +#define PORT6_PDISC_PDIS13_Msk (0x2000UL) /*!< PORT6 PDISC: PDIS13 (Bitfield-Mask: 0x01) */ +#define PORT6_PDISC_PDIS14_Pos (14UL) /*!< PORT6 PDISC: PDIS14 (Bit 14) */ +#define PORT6_PDISC_PDIS14_Msk (0x4000UL) /*!< PORT6 PDISC: PDIS14 (Bitfield-Mask: 0x01) */ +#define PORT6_PDISC_PDIS15_Pos (15UL) /*!< PORT6 PDISC: PDIS15 (Bit 15) */ +#define PORT6_PDISC_PDIS15_Msk (0x8000UL) /*!< PORT6 PDISC: PDIS15 (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- PORT6_PPS --------------------------------- */ +#define PORT6_PPS_PPS0_Pos (0UL) /*!< PORT6 PPS: PPS0 (Bit 0) */ +#define PORT6_PPS_PPS0_Msk (0x1UL) /*!< PORT6 PPS: PPS0 (Bitfield-Mask: 0x01) */ +#define PORT6_PPS_PPS1_Pos (1UL) /*!< PORT6 PPS: PPS1 (Bit 1) */ +#define PORT6_PPS_PPS1_Msk (0x2UL) /*!< PORT6 PPS: PPS1 (Bitfield-Mask: 0x01) */ +#define PORT6_PPS_PPS2_Pos (2UL) /*!< PORT6 PPS: PPS2 (Bit 2) */ +#define PORT6_PPS_PPS2_Msk (0x4UL) /*!< PORT6 PPS: PPS2 (Bitfield-Mask: 0x01) */ +#define PORT6_PPS_PPS3_Pos (3UL) /*!< PORT6 PPS: PPS3 (Bit 3) */ +#define PORT6_PPS_PPS3_Msk (0x8UL) /*!< PORT6 PPS: PPS3 (Bitfield-Mask: 0x01) */ +#define PORT6_PPS_PPS4_Pos (4UL) /*!< PORT6 PPS: PPS4 (Bit 4) */ +#define PORT6_PPS_PPS4_Msk (0x10UL) /*!< PORT6 PPS: PPS4 (Bitfield-Mask: 0x01) */ +#define PORT6_PPS_PPS5_Pos (5UL) /*!< PORT6 PPS: PPS5 (Bit 5) */ +#define PORT6_PPS_PPS5_Msk (0x20UL) /*!< PORT6 PPS: PPS5 (Bitfield-Mask: 0x01) */ +#define PORT6_PPS_PPS6_Pos (6UL) /*!< PORT6 PPS: PPS6 (Bit 6) */ +#define PORT6_PPS_PPS6_Msk (0x40UL) /*!< PORT6 PPS: PPS6 (Bitfield-Mask: 0x01) */ +#define PORT6_PPS_PPS7_Pos (7UL) /*!< PORT6 PPS: PPS7 (Bit 7) */ +#define PORT6_PPS_PPS7_Msk (0x80UL) /*!< PORT6 PPS: PPS7 (Bitfield-Mask: 0x01) */ +#define PORT6_PPS_PPS8_Pos (8UL) /*!< PORT6 PPS: PPS8 (Bit 8) */ +#define PORT6_PPS_PPS8_Msk (0x100UL) /*!< PORT6 PPS: PPS8 (Bitfield-Mask: 0x01) */ +#define PORT6_PPS_PPS9_Pos (9UL) /*!< PORT6 PPS: PPS9 (Bit 9) */ +#define PORT6_PPS_PPS9_Msk (0x200UL) /*!< PORT6 PPS: PPS9 (Bitfield-Mask: 0x01) */ +#define PORT6_PPS_PPS10_Pos (10UL) /*!< PORT6 PPS: PPS10 (Bit 10) */ +#define PORT6_PPS_PPS10_Msk (0x400UL) /*!< PORT6 PPS: PPS10 (Bitfield-Mask: 0x01) */ +#define PORT6_PPS_PPS11_Pos (11UL) /*!< PORT6 PPS: PPS11 (Bit 11) */ +#define PORT6_PPS_PPS11_Msk (0x800UL) /*!< PORT6 PPS: PPS11 (Bitfield-Mask: 0x01) */ +#define PORT6_PPS_PPS12_Pos (12UL) /*!< PORT6 PPS: PPS12 (Bit 12) */ +#define PORT6_PPS_PPS12_Msk (0x1000UL) /*!< PORT6 PPS: PPS12 (Bitfield-Mask: 0x01) */ +#define PORT6_PPS_PPS13_Pos (13UL) /*!< PORT6 PPS: PPS13 (Bit 13) */ +#define PORT6_PPS_PPS13_Msk (0x2000UL) /*!< PORT6 PPS: PPS13 (Bitfield-Mask: 0x01) */ +#define PORT6_PPS_PPS14_Pos (14UL) /*!< PORT6 PPS: PPS14 (Bit 14) */ +#define PORT6_PPS_PPS14_Msk (0x4000UL) /*!< PORT6 PPS: PPS14 (Bitfield-Mask: 0x01) */ +#define PORT6_PPS_PPS15_Pos (15UL) /*!< PORT6 PPS: PPS15 (Bit 15) */ +#define PORT6_PPS_PPS15_Msk (0x8000UL) /*!< PORT6 PPS: PPS15 (Bitfield-Mask: 0x01) */ + +/* --------------------------------- PORT6_HWSEL -------------------------------- */ +#define PORT6_HWSEL_HW0_Pos (0UL) /*!< PORT6 HWSEL: HW0 (Bit 0) */ +#define PORT6_HWSEL_HW0_Msk (0x3UL) /*!< PORT6 HWSEL: HW0 (Bitfield-Mask: 0x03) */ +#define PORT6_HWSEL_HW1_Pos (2UL) /*!< PORT6 HWSEL: HW1 (Bit 2) */ +#define PORT6_HWSEL_HW1_Msk (0xcUL) /*!< PORT6 HWSEL: HW1 (Bitfield-Mask: 0x03) */ +#define PORT6_HWSEL_HW2_Pos (4UL) /*!< PORT6 HWSEL: HW2 (Bit 4) */ +#define PORT6_HWSEL_HW2_Msk (0x30UL) /*!< PORT6 HWSEL: HW2 (Bitfield-Mask: 0x03) */ +#define PORT6_HWSEL_HW3_Pos (6UL) /*!< PORT6 HWSEL: HW3 (Bit 6) */ +#define PORT6_HWSEL_HW3_Msk (0xc0UL) /*!< PORT6 HWSEL: HW3 (Bitfield-Mask: 0x03) */ +#define PORT6_HWSEL_HW4_Pos (8UL) /*!< PORT6 HWSEL: HW4 (Bit 8) */ +#define PORT6_HWSEL_HW4_Msk (0x300UL) /*!< PORT6 HWSEL: HW4 (Bitfield-Mask: 0x03) */ +#define PORT6_HWSEL_HW5_Pos (10UL) /*!< PORT6 HWSEL: HW5 (Bit 10) */ +#define PORT6_HWSEL_HW5_Msk (0xc00UL) /*!< PORT6 HWSEL: HW5 (Bitfield-Mask: 0x03) */ +#define PORT6_HWSEL_HW6_Pos (12UL) /*!< PORT6 HWSEL: HW6 (Bit 12) */ +#define PORT6_HWSEL_HW6_Msk (0x3000UL) /*!< PORT6 HWSEL: HW6 (Bitfield-Mask: 0x03) */ +#define PORT6_HWSEL_HW7_Pos (14UL) /*!< PORT6 HWSEL: HW7 (Bit 14) */ +#define PORT6_HWSEL_HW7_Msk (0xc000UL) /*!< PORT6 HWSEL: HW7 (Bitfield-Mask: 0x03) */ +#define PORT6_HWSEL_HW8_Pos (16UL) /*!< PORT6 HWSEL: HW8 (Bit 16) */ +#define PORT6_HWSEL_HW8_Msk (0x30000UL) /*!< PORT6 HWSEL: HW8 (Bitfield-Mask: 0x03) */ +#define PORT6_HWSEL_HW9_Pos (18UL) /*!< PORT6 HWSEL: HW9 (Bit 18) */ +#define PORT6_HWSEL_HW9_Msk (0xc0000UL) /*!< PORT6 HWSEL: HW9 (Bitfield-Mask: 0x03) */ +#define PORT6_HWSEL_HW10_Pos (20UL) /*!< PORT6 HWSEL: HW10 (Bit 20) */ +#define PORT6_HWSEL_HW10_Msk (0x300000UL) /*!< PORT6 HWSEL: HW10 (Bitfield-Mask: 0x03) */ +#define PORT6_HWSEL_HW11_Pos (22UL) /*!< PORT6 HWSEL: HW11 (Bit 22) */ +#define PORT6_HWSEL_HW11_Msk (0xc00000UL) /*!< PORT6 HWSEL: HW11 (Bitfield-Mask: 0x03) */ +#define PORT6_HWSEL_HW12_Pos (24UL) /*!< PORT6 HWSEL: HW12 (Bit 24) */ +#define PORT6_HWSEL_HW12_Msk (0x3000000UL) /*!< PORT6 HWSEL: HW12 (Bitfield-Mask: 0x03) */ +#define PORT6_HWSEL_HW13_Pos (26UL) /*!< PORT6 HWSEL: HW13 (Bit 26) */ +#define PORT6_HWSEL_HW13_Msk (0xc000000UL) /*!< PORT6 HWSEL: HW13 (Bitfield-Mask: 0x03) */ +#define PORT6_HWSEL_HW14_Pos (28UL) /*!< PORT6 HWSEL: HW14 (Bit 28) */ +#define PORT6_HWSEL_HW14_Msk (0x30000000UL) /*!< PORT6 HWSEL: HW14 (Bitfield-Mask: 0x03) */ +#define PORT6_HWSEL_HW15_Pos (30UL) /*!< PORT6 HWSEL: HW15 (Bit 30) */ +#define PORT6_HWSEL_HW15_Msk (0xc0000000UL) /*!< PORT6 HWSEL: HW15 (Bitfield-Mask: 0x03) */ + + +/* ================================================================================ */ +/* ================ struct 'PORT7' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ---------------------------------- PORT7_OUT --------------------------------- */ +#define PORT7_OUT_P0_Pos (0UL) /*!< PORT7 OUT: P0 (Bit 0) */ +#define PORT7_OUT_P0_Msk (0x1UL) /*!< PORT7 OUT: P0 (Bitfield-Mask: 0x01) */ +#define PORT7_OUT_P1_Pos (1UL) /*!< PORT7 OUT: P1 (Bit 1) */ +#define PORT7_OUT_P1_Msk (0x2UL) /*!< PORT7 OUT: P1 (Bitfield-Mask: 0x01) */ +#define PORT7_OUT_P2_Pos (2UL) /*!< PORT7 OUT: P2 (Bit 2) */ +#define PORT7_OUT_P2_Msk (0x4UL) /*!< PORT7 OUT: P2 (Bitfield-Mask: 0x01) */ +#define PORT7_OUT_P3_Pos (3UL) /*!< PORT7 OUT: P3 (Bit 3) */ +#define PORT7_OUT_P3_Msk (0x8UL) /*!< PORT7 OUT: P3 (Bitfield-Mask: 0x01) */ +#define PORT7_OUT_P4_Pos (4UL) /*!< PORT7 OUT: P4 (Bit 4) */ +#define PORT7_OUT_P4_Msk (0x10UL) /*!< PORT7 OUT: P4 (Bitfield-Mask: 0x01) */ +#define PORT7_OUT_P5_Pos (5UL) /*!< PORT7 OUT: P5 (Bit 5) */ +#define PORT7_OUT_P5_Msk (0x20UL) /*!< PORT7 OUT: P5 (Bitfield-Mask: 0x01) */ +#define PORT7_OUT_P6_Pos (6UL) /*!< PORT7 OUT: P6 (Bit 6) */ +#define PORT7_OUT_P6_Msk (0x40UL) /*!< PORT7 OUT: P6 (Bitfield-Mask: 0x01) */ +#define PORT7_OUT_P7_Pos (7UL) /*!< PORT7 OUT: P7 (Bit 7) */ +#define PORT7_OUT_P7_Msk (0x80UL) /*!< PORT7 OUT: P7 (Bitfield-Mask: 0x01) */ +#define PORT7_OUT_P8_Pos (8UL) /*!< PORT7 OUT: P8 (Bit 8) */ +#define PORT7_OUT_P8_Msk (0x100UL) /*!< PORT7 OUT: P8 (Bitfield-Mask: 0x01) */ +#define PORT7_OUT_P9_Pos (9UL) /*!< PORT7 OUT: P9 (Bit 9) */ +#define PORT7_OUT_P9_Msk (0x200UL) /*!< PORT7 OUT: P9 (Bitfield-Mask: 0x01) */ +#define PORT7_OUT_P10_Pos (10UL) /*!< PORT7 OUT: P10 (Bit 10) */ +#define PORT7_OUT_P10_Msk (0x400UL) /*!< PORT7 OUT: P10 (Bitfield-Mask: 0x01) */ +#define PORT7_OUT_P11_Pos (11UL) /*!< PORT7 OUT: P11 (Bit 11) */ +#define PORT7_OUT_P11_Msk (0x800UL) /*!< PORT7 OUT: P11 (Bitfield-Mask: 0x01) */ +#define PORT7_OUT_P12_Pos (12UL) /*!< PORT7 OUT: P12 (Bit 12) */ +#define PORT7_OUT_P12_Msk (0x1000UL) /*!< PORT7 OUT: P12 (Bitfield-Mask: 0x01) */ +#define PORT7_OUT_P13_Pos (13UL) /*!< PORT7 OUT: P13 (Bit 13) */ +#define PORT7_OUT_P13_Msk (0x2000UL) /*!< PORT7 OUT: P13 (Bitfield-Mask: 0x01) */ +#define PORT7_OUT_P14_Pos (14UL) /*!< PORT7 OUT: P14 (Bit 14) */ +#define PORT7_OUT_P14_Msk (0x4000UL) /*!< PORT7 OUT: P14 (Bitfield-Mask: 0x01) */ +#define PORT7_OUT_P15_Pos (15UL) /*!< PORT7 OUT: P15 (Bit 15) */ +#define PORT7_OUT_P15_Msk (0x8000UL) /*!< PORT7 OUT: P15 (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- PORT7_OMR --------------------------------- */ +#define PORT7_OMR_PS0_Pos (0UL) /*!< PORT7 OMR: PS0 (Bit 0) */ +#define PORT7_OMR_PS0_Msk (0x1UL) /*!< PORT7 OMR: PS0 (Bitfield-Mask: 0x01) */ +#define PORT7_OMR_PS1_Pos (1UL) /*!< PORT7 OMR: PS1 (Bit 1) */ +#define PORT7_OMR_PS1_Msk (0x2UL) /*!< PORT7 OMR: PS1 (Bitfield-Mask: 0x01) */ +#define PORT7_OMR_PS2_Pos (2UL) /*!< PORT7 OMR: PS2 (Bit 2) */ +#define PORT7_OMR_PS2_Msk (0x4UL) /*!< PORT7 OMR: PS2 (Bitfield-Mask: 0x01) */ +#define PORT7_OMR_PS3_Pos (3UL) /*!< PORT7 OMR: PS3 (Bit 3) */ +#define PORT7_OMR_PS3_Msk (0x8UL) /*!< PORT7 OMR: PS3 (Bitfield-Mask: 0x01) */ +#define PORT7_OMR_PS4_Pos (4UL) /*!< PORT7 OMR: PS4 (Bit 4) */ +#define PORT7_OMR_PS4_Msk (0x10UL) /*!< PORT7 OMR: PS4 (Bitfield-Mask: 0x01) */ +#define PORT7_OMR_PS5_Pos (5UL) /*!< PORT7 OMR: PS5 (Bit 5) */ +#define PORT7_OMR_PS5_Msk (0x20UL) /*!< PORT7 OMR: PS5 (Bitfield-Mask: 0x01) */ +#define PORT7_OMR_PS6_Pos (6UL) /*!< PORT7 OMR: PS6 (Bit 6) */ +#define PORT7_OMR_PS6_Msk (0x40UL) /*!< PORT7 OMR: PS6 (Bitfield-Mask: 0x01) */ +#define PORT7_OMR_PS7_Pos (7UL) /*!< PORT7 OMR: PS7 (Bit 7) */ +#define PORT7_OMR_PS7_Msk (0x80UL) /*!< PORT7 OMR: PS7 (Bitfield-Mask: 0x01) */ +#define PORT7_OMR_PS8_Pos (8UL) /*!< PORT7 OMR: PS8 (Bit 8) */ +#define PORT7_OMR_PS8_Msk (0x100UL) /*!< PORT7 OMR: PS8 (Bitfield-Mask: 0x01) */ +#define PORT7_OMR_PS9_Pos (9UL) /*!< PORT7 OMR: PS9 (Bit 9) */ +#define PORT7_OMR_PS9_Msk (0x200UL) /*!< PORT7 OMR: PS9 (Bitfield-Mask: 0x01) */ +#define PORT7_OMR_PS10_Pos (10UL) /*!< PORT7 OMR: PS10 (Bit 10) */ +#define PORT7_OMR_PS10_Msk (0x400UL) /*!< PORT7 OMR: PS10 (Bitfield-Mask: 0x01) */ +#define PORT7_OMR_PS11_Pos (11UL) /*!< PORT7 OMR: PS11 (Bit 11) */ +#define PORT7_OMR_PS11_Msk (0x800UL) /*!< PORT7 OMR: PS11 (Bitfield-Mask: 0x01) */ +#define PORT7_OMR_PS12_Pos (12UL) /*!< PORT7 OMR: PS12 (Bit 12) */ +#define PORT7_OMR_PS12_Msk (0x1000UL) /*!< PORT7 OMR: PS12 (Bitfield-Mask: 0x01) */ +#define PORT7_OMR_PS13_Pos (13UL) /*!< PORT7 OMR: PS13 (Bit 13) */ +#define PORT7_OMR_PS13_Msk (0x2000UL) /*!< PORT7 OMR: PS13 (Bitfield-Mask: 0x01) */ +#define PORT7_OMR_PS14_Pos (14UL) /*!< PORT7 OMR: PS14 (Bit 14) */ +#define PORT7_OMR_PS14_Msk (0x4000UL) /*!< PORT7 OMR: PS14 (Bitfield-Mask: 0x01) */ +#define PORT7_OMR_PS15_Pos (15UL) /*!< PORT7 OMR: PS15 (Bit 15) */ +#define PORT7_OMR_PS15_Msk (0x8000UL) /*!< PORT7 OMR: PS15 (Bitfield-Mask: 0x01) */ +#define PORT7_OMR_PR0_Pos (16UL) /*!< PORT7 OMR: PR0 (Bit 16) */ +#define PORT7_OMR_PR0_Msk (0x10000UL) /*!< PORT7 OMR: PR0 (Bitfield-Mask: 0x01) */ +#define PORT7_OMR_PR1_Pos (17UL) /*!< PORT7 OMR: PR1 (Bit 17) */ +#define PORT7_OMR_PR1_Msk (0x20000UL) /*!< PORT7 OMR: PR1 (Bitfield-Mask: 0x01) */ +#define PORT7_OMR_PR2_Pos (18UL) /*!< PORT7 OMR: PR2 (Bit 18) */ +#define PORT7_OMR_PR2_Msk (0x40000UL) /*!< PORT7 OMR: PR2 (Bitfield-Mask: 0x01) */ +#define PORT7_OMR_PR3_Pos (19UL) /*!< PORT7 OMR: PR3 (Bit 19) */ +#define PORT7_OMR_PR3_Msk (0x80000UL) /*!< PORT7 OMR: PR3 (Bitfield-Mask: 0x01) */ +#define PORT7_OMR_PR4_Pos (20UL) /*!< PORT7 OMR: PR4 (Bit 20) */ +#define PORT7_OMR_PR4_Msk (0x100000UL) /*!< PORT7 OMR: PR4 (Bitfield-Mask: 0x01) */ +#define PORT7_OMR_PR5_Pos (21UL) /*!< PORT7 OMR: PR5 (Bit 21) */ +#define PORT7_OMR_PR5_Msk (0x200000UL) /*!< PORT7 OMR: PR5 (Bitfield-Mask: 0x01) */ +#define PORT7_OMR_PR6_Pos (22UL) /*!< PORT7 OMR: PR6 (Bit 22) */ +#define PORT7_OMR_PR6_Msk (0x400000UL) /*!< PORT7 OMR: PR6 (Bitfield-Mask: 0x01) */ +#define PORT7_OMR_PR7_Pos (23UL) /*!< PORT7 OMR: PR7 (Bit 23) */ +#define PORT7_OMR_PR7_Msk (0x800000UL) /*!< PORT7 OMR: PR7 (Bitfield-Mask: 0x01) */ +#define PORT7_OMR_PR8_Pos (24UL) /*!< PORT7 OMR: PR8 (Bit 24) */ +#define PORT7_OMR_PR8_Msk (0x1000000UL) /*!< PORT7 OMR: PR8 (Bitfield-Mask: 0x01) */ +#define PORT7_OMR_PR9_Pos (25UL) /*!< PORT7 OMR: PR9 (Bit 25) */ +#define PORT7_OMR_PR9_Msk (0x2000000UL) /*!< PORT7 OMR: PR9 (Bitfield-Mask: 0x01) */ +#define PORT7_OMR_PR10_Pos (26UL) /*!< PORT7 OMR: PR10 (Bit 26) */ +#define PORT7_OMR_PR10_Msk (0x4000000UL) /*!< PORT7 OMR: PR10 (Bitfield-Mask: 0x01) */ +#define PORT7_OMR_PR11_Pos (27UL) /*!< PORT7 OMR: PR11 (Bit 27) */ +#define PORT7_OMR_PR11_Msk (0x8000000UL) /*!< PORT7 OMR: PR11 (Bitfield-Mask: 0x01) */ +#define PORT7_OMR_PR12_Pos (28UL) /*!< PORT7 OMR: PR12 (Bit 28) */ +#define PORT7_OMR_PR12_Msk (0x10000000UL) /*!< PORT7 OMR: PR12 (Bitfield-Mask: 0x01) */ +#define PORT7_OMR_PR13_Pos (29UL) /*!< PORT7 OMR: PR13 (Bit 29) */ +#define PORT7_OMR_PR13_Msk (0x20000000UL) /*!< PORT7 OMR: PR13 (Bitfield-Mask: 0x01) */ +#define PORT7_OMR_PR14_Pos (30UL) /*!< PORT7 OMR: PR14 (Bit 30) */ +#define PORT7_OMR_PR14_Msk (0x40000000UL) /*!< PORT7 OMR: PR14 (Bitfield-Mask: 0x01) */ +#define PORT7_OMR_PR15_Pos (31UL) /*!< PORT7 OMR: PR15 (Bit 31) */ +#define PORT7_OMR_PR15_Msk (0x80000000UL) /*!< PORT7 OMR: PR15 (Bitfield-Mask: 0x01) */ + +/* --------------------------------- PORT7_IOCR0 -------------------------------- */ +#define PORT7_IOCR0_PC0_Pos (3UL) /*!< PORT7 IOCR0: PC0 (Bit 3) */ +#define PORT7_IOCR0_PC0_Msk (0xf8UL) /*!< PORT7 IOCR0: PC0 (Bitfield-Mask: 0x1f) */ +#define PORT7_IOCR0_PC1_Pos (11UL) /*!< PORT7 IOCR0: PC1 (Bit 11) */ +#define PORT7_IOCR0_PC1_Msk (0xf800UL) /*!< PORT7 IOCR0: PC1 (Bitfield-Mask: 0x1f) */ +#define PORT7_IOCR0_PC2_Pos (19UL) /*!< PORT7 IOCR0: PC2 (Bit 19) */ +#define PORT7_IOCR0_PC2_Msk (0xf80000UL) /*!< PORT7 IOCR0: PC2 (Bitfield-Mask: 0x1f) */ +#define PORT7_IOCR0_PC3_Pos (27UL) /*!< PORT7 IOCR0: PC3 (Bit 27) */ +#define PORT7_IOCR0_PC3_Msk (0xf8000000UL) /*!< PORT7 IOCR0: PC3 (Bitfield-Mask: 0x1f) */ + +/* --------------------------------- PORT7_IOCR4 -------------------------------- */ +#define PORT7_IOCR4_PC4_Pos (3UL) /*!< PORT7 IOCR4: PC4 (Bit 3) */ +#define PORT7_IOCR4_PC4_Msk (0xf8UL) /*!< PORT7 IOCR4: PC4 (Bitfield-Mask: 0x1f) */ +#define PORT7_IOCR4_PC5_Pos (11UL) /*!< PORT7 IOCR4: PC5 (Bit 11) */ +#define PORT7_IOCR4_PC5_Msk (0xf800UL) /*!< PORT7 IOCR4: PC5 (Bitfield-Mask: 0x1f) */ +#define PORT7_IOCR4_PC6_Pos (19UL) /*!< PORT7 IOCR4: PC6 (Bit 19) */ +#define PORT7_IOCR4_PC6_Msk (0xf80000UL) /*!< PORT7 IOCR4: PC6 (Bitfield-Mask: 0x1f) */ +#define PORT7_IOCR4_PC7_Pos (27UL) /*!< PORT7 IOCR4: PC7 (Bit 27) */ +#define PORT7_IOCR4_PC7_Msk (0xf8000000UL) /*!< PORT7 IOCR4: PC7 (Bitfield-Mask: 0x1f) */ + +/* --------------------------------- PORT7_IOCR8 -------------------------------- */ +#define PORT7_IOCR8_PC8_Pos (3UL) /*!< PORT7 IOCR8: PC8 (Bit 3) */ +#define PORT7_IOCR8_PC8_Msk (0xf8UL) /*!< PORT7 IOCR8: PC8 (Bitfield-Mask: 0x1f) */ +#define PORT7_IOCR8_PC9_Pos (11UL) /*!< PORT7 IOCR8: PC9 (Bit 11) */ +#define PORT7_IOCR8_PC9_Msk (0xf800UL) /*!< PORT7 IOCR8: PC9 (Bitfield-Mask: 0x1f) */ +#define PORT7_IOCR8_PC10_Pos (19UL) /*!< PORT7 IOCR8: PC10 (Bit 19) */ +#define PORT7_IOCR8_PC10_Msk (0xf80000UL) /*!< PORT7 IOCR8: PC10 (Bitfield-Mask: 0x1f) */ +#define PORT7_IOCR8_PC11_Pos (27UL) /*!< PORT7 IOCR8: PC11 (Bit 27) */ +#define PORT7_IOCR8_PC11_Msk (0xf8000000UL) /*!< PORT7 IOCR8: PC11 (Bitfield-Mask: 0x1f) */ + +/* ---------------------------------- PORT7_IN ---------------------------------- */ +#define PORT7_IN_P0_Pos (0UL) /*!< PORT7 IN: P0 (Bit 0) */ +#define PORT7_IN_P0_Msk (0x1UL) /*!< PORT7 IN: P0 (Bitfield-Mask: 0x01) */ +#define PORT7_IN_P1_Pos (1UL) /*!< PORT7 IN: P1 (Bit 1) */ +#define PORT7_IN_P1_Msk (0x2UL) /*!< PORT7 IN: P1 (Bitfield-Mask: 0x01) */ +#define PORT7_IN_P2_Pos (2UL) /*!< PORT7 IN: P2 (Bit 2) */ +#define PORT7_IN_P2_Msk (0x4UL) /*!< PORT7 IN: P2 (Bitfield-Mask: 0x01) */ +#define PORT7_IN_P3_Pos (3UL) /*!< PORT7 IN: P3 (Bit 3) */ +#define PORT7_IN_P3_Msk (0x8UL) /*!< PORT7 IN: P3 (Bitfield-Mask: 0x01) */ +#define PORT7_IN_P4_Pos (4UL) /*!< PORT7 IN: P4 (Bit 4) */ +#define PORT7_IN_P4_Msk (0x10UL) /*!< PORT7 IN: P4 (Bitfield-Mask: 0x01) */ +#define PORT7_IN_P5_Pos (5UL) /*!< PORT7 IN: P5 (Bit 5) */ +#define PORT7_IN_P5_Msk (0x20UL) /*!< PORT7 IN: P5 (Bitfield-Mask: 0x01) */ +#define PORT7_IN_P6_Pos (6UL) /*!< PORT7 IN: P6 (Bit 6) */ +#define PORT7_IN_P6_Msk (0x40UL) /*!< PORT7 IN: P6 (Bitfield-Mask: 0x01) */ +#define PORT7_IN_P7_Pos (7UL) /*!< PORT7 IN: P7 (Bit 7) */ +#define PORT7_IN_P7_Msk (0x80UL) /*!< PORT7 IN: P7 (Bitfield-Mask: 0x01) */ +#define PORT7_IN_P8_Pos (8UL) /*!< PORT7 IN: P8 (Bit 8) */ +#define PORT7_IN_P8_Msk (0x100UL) /*!< PORT7 IN: P8 (Bitfield-Mask: 0x01) */ +#define PORT7_IN_P9_Pos (9UL) /*!< PORT7 IN: P9 (Bit 9) */ +#define PORT7_IN_P9_Msk (0x200UL) /*!< PORT7 IN: P9 (Bitfield-Mask: 0x01) */ +#define PORT7_IN_P10_Pos (10UL) /*!< PORT7 IN: P10 (Bit 10) */ +#define PORT7_IN_P10_Msk (0x400UL) /*!< PORT7 IN: P10 (Bitfield-Mask: 0x01) */ +#define PORT7_IN_P11_Pos (11UL) /*!< PORT7 IN: P11 (Bit 11) */ +#define PORT7_IN_P11_Msk (0x800UL) /*!< PORT7 IN: P11 (Bitfield-Mask: 0x01) */ +#define PORT7_IN_P12_Pos (12UL) /*!< PORT7 IN: P12 (Bit 12) */ +#define PORT7_IN_P12_Msk (0x1000UL) /*!< PORT7 IN: P12 (Bitfield-Mask: 0x01) */ +#define PORT7_IN_P13_Pos (13UL) /*!< PORT7 IN: P13 (Bit 13) */ +#define PORT7_IN_P13_Msk (0x2000UL) /*!< PORT7 IN: P13 (Bitfield-Mask: 0x01) */ +#define PORT7_IN_P14_Pos (14UL) /*!< PORT7 IN: P14 (Bit 14) */ +#define PORT7_IN_P14_Msk (0x4000UL) /*!< PORT7 IN: P14 (Bitfield-Mask: 0x01) */ +#define PORT7_IN_P15_Pos (15UL) /*!< PORT7 IN: P15 (Bit 15) */ +#define PORT7_IN_P15_Msk (0x8000UL) /*!< PORT7 IN: P15 (Bitfield-Mask: 0x01) */ + +/* --------------------------------- PORT7_PDR0 --------------------------------- */ +#define PORT7_PDR0_PD0_Pos (0UL) /*!< PORT7 PDR0: PD0 (Bit 0) */ +#define PORT7_PDR0_PD0_Msk (0x7UL) /*!< PORT7 PDR0: PD0 (Bitfield-Mask: 0x07) */ +#define PORT7_PDR0_PD1_Pos (4UL) /*!< PORT7 PDR0: PD1 (Bit 4) */ +#define PORT7_PDR0_PD1_Msk (0x70UL) /*!< PORT7 PDR0: PD1 (Bitfield-Mask: 0x07) */ +#define PORT7_PDR0_PD2_Pos (8UL) /*!< PORT7 PDR0: PD2 (Bit 8) */ +#define PORT7_PDR0_PD2_Msk (0x700UL) /*!< PORT7 PDR0: PD2 (Bitfield-Mask: 0x07) */ +#define PORT7_PDR0_PD3_Pos (12UL) /*!< PORT7 PDR0: PD3 (Bit 12) */ +#define PORT7_PDR0_PD3_Msk (0x7000UL) /*!< PORT7 PDR0: PD3 (Bitfield-Mask: 0x07) */ +#define PORT7_PDR0_PD4_Pos (16UL) /*!< PORT7 PDR0: PD4 (Bit 16) */ +#define PORT7_PDR0_PD4_Msk (0x70000UL) /*!< PORT7 PDR0: PD4 (Bitfield-Mask: 0x07) */ +#define PORT7_PDR0_PD5_Pos (20UL) /*!< PORT7 PDR0: PD5 (Bit 20) */ +#define PORT7_PDR0_PD5_Msk (0x700000UL) /*!< PORT7 PDR0: PD5 (Bitfield-Mask: 0x07) */ +#define PORT7_PDR0_PD6_Pos (24UL) /*!< PORT7 PDR0: PD6 (Bit 24) */ +#define PORT7_PDR0_PD6_Msk (0x7000000UL) /*!< PORT7 PDR0: PD6 (Bitfield-Mask: 0x07) */ +#define PORT7_PDR0_PD7_Pos (28UL) /*!< PORT7 PDR0: PD7 (Bit 28) */ +#define PORT7_PDR0_PD7_Msk (0x70000000UL) /*!< PORT7 PDR0: PD7 (Bitfield-Mask: 0x07) */ + +/* --------------------------------- PORT7_PDR1 --------------------------------- */ +#define PORT7_PDR1_PD8_Pos (0UL) /*!< PORT7 PDR1: PD8 (Bit 0) */ +#define PORT7_PDR1_PD8_Msk (0x7UL) /*!< PORT7 PDR1: PD8 (Bitfield-Mask: 0x07) */ +#define PORT7_PDR1_PD9_Pos (4UL) /*!< PORT7 PDR1: PD9 (Bit 4) */ +#define PORT7_PDR1_PD9_Msk (0x70UL) /*!< PORT7 PDR1: PD9 (Bitfield-Mask: 0x07) */ +#define PORT7_PDR1_PD10_Pos (8UL) /*!< PORT7 PDR1: PD10 (Bit 8) */ +#define PORT7_PDR1_PD10_Msk (0x700UL) /*!< PORT7 PDR1: PD10 (Bitfield-Mask: 0x07) */ +#define PORT7_PDR1_PD11_Pos (12UL) /*!< PORT7 PDR1: PD11 (Bit 12) */ +#define PORT7_PDR1_PD11_Msk (0x7000UL) /*!< PORT7 PDR1: PD11 (Bitfield-Mask: 0x07) */ +#define PORT7_PDR1_PD12_Pos (16UL) /*!< PORT7 PDR1: PD12 (Bit 16) */ +#define PORT7_PDR1_PD12_Msk (0x70000UL) /*!< PORT7 PDR1: PD12 (Bitfield-Mask: 0x07) */ +#define PORT7_PDR1_PD13_Pos (20UL) /*!< PORT7 PDR1: PD13 (Bit 20) */ +#define PORT7_PDR1_PD13_Msk (0x700000UL) /*!< PORT7 PDR1: PD13 (Bitfield-Mask: 0x07) */ +#define PORT7_PDR1_PD14_Pos (24UL) /*!< PORT7 PDR1: PD14 (Bit 24) */ +#define PORT7_PDR1_PD14_Msk (0x7000000UL) /*!< PORT7 PDR1: PD14 (Bitfield-Mask: 0x07) */ +#define PORT7_PDR1_PD15_Pos (28UL) /*!< PORT7 PDR1: PD15 (Bit 28) */ +#define PORT7_PDR1_PD15_Msk (0x70000000UL) /*!< PORT7 PDR1: PD15 (Bitfield-Mask: 0x07) */ + +/* --------------------------------- PORT7_PDISC -------------------------------- */ +#define PORT7_PDISC_PDIS0_Pos (0UL) /*!< PORT7 PDISC: PDIS0 (Bit 0) */ +#define PORT7_PDISC_PDIS0_Msk (0x1UL) /*!< PORT7 PDISC: PDIS0 (Bitfield-Mask: 0x01) */ +#define PORT7_PDISC_PDIS1_Pos (1UL) /*!< PORT7 PDISC: PDIS1 (Bit 1) */ +#define PORT7_PDISC_PDIS1_Msk (0x2UL) /*!< PORT7 PDISC: PDIS1 (Bitfield-Mask: 0x01) */ +#define PORT7_PDISC_PDIS2_Pos (2UL) /*!< PORT7 PDISC: PDIS2 (Bit 2) */ +#define PORT7_PDISC_PDIS2_Msk (0x4UL) /*!< PORT7 PDISC: PDIS2 (Bitfield-Mask: 0x01) */ +#define PORT7_PDISC_PDIS3_Pos (3UL) /*!< PORT7 PDISC: PDIS3 (Bit 3) */ +#define PORT7_PDISC_PDIS3_Msk (0x8UL) /*!< PORT7 PDISC: PDIS3 (Bitfield-Mask: 0x01) */ +#define PORT7_PDISC_PDIS4_Pos (4UL) /*!< PORT7 PDISC: PDIS4 (Bit 4) */ +#define PORT7_PDISC_PDIS4_Msk (0x10UL) /*!< PORT7 PDISC: PDIS4 (Bitfield-Mask: 0x01) */ +#define PORT7_PDISC_PDIS5_Pos (5UL) /*!< PORT7 PDISC: PDIS5 (Bit 5) */ +#define PORT7_PDISC_PDIS5_Msk (0x20UL) /*!< PORT7 PDISC: PDIS5 (Bitfield-Mask: 0x01) */ +#define PORT7_PDISC_PDIS6_Pos (6UL) /*!< PORT7 PDISC: PDIS6 (Bit 6) */ +#define PORT7_PDISC_PDIS6_Msk (0x40UL) /*!< PORT7 PDISC: PDIS6 (Bitfield-Mask: 0x01) */ +#define PORT7_PDISC_PDIS7_Pos (7UL) /*!< PORT7 PDISC: PDIS7 (Bit 7) */ +#define PORT7_PDISC_PDIS7_Msk (0x80UL) /*!< PORT7 PDISC: PDIS7 (Bitfield-Mask: 0x01) */ +#define PORT7_PDISC_PDIS8_Pos (8UL) /*!< PORT7 PDISC: PDIS8 (Bit 8) */ +#define PORT7_PDISC_PDIS8_Msk (0x100UL) /*!< PORT7 PDISC: PDIS8 (Bitfield-Mask: 0x01) */ +#define PORT7_PDISC_PDIS9_Pos (9UL) /*!< PORT7 PDISC: PDIS9 (Bit 9) */ +#define PORT7_PDISC_PDIS9_Msk (0x200UL) /*!< PORT7 PDISC: PDIS9 (Bitfield-Mask: 0x01) */ +#define PORT7_PDISC_PDIS10_Pos (10UL) /*!< PORT7 PDISC: PDIS10 (Bit 10) */ +#define PORT7_PDISC_PDIS10_Msk (0x400UL) /*!< PORT7 PDISC: PDIS10 (Bitfield-Mask: 0x01) */ +#define PORT7_PDISC_PDIS11_Pos (11UL) /*!< PORT7 PDISC: PDIS11 (Bit 11) */ +#define PORT7_PDISC_PDIS11_Msk (0x800UL) /*!< PORT7 PDISC: PDIS11 (Bitfield-Mask: 0x01) */ +#define PORT7_PDISC_PDIS12_Pos (12UL) /*!< PORT7 PDISC: PDIS12 (Bit 12) */ +#define PORT7_PDISC_PDIS12_Msk (0x1000UL) /*!< PORT7 PDISC: PDIS12 (Bitfield-Mask: 0x01) */ +#define PORT7_PDISC_PDIS13_Pos (13UL) /*!< PORT7 PDISC: PDIS13 (Bit 13) */ +#define PORT7_PDISC_PDIS13_Msk (0x2000UL) /*!< PORT7 PDISC: PDIS13 (Bitfield-Mask: 0x01) */ +#define PORT7_PDISC_PDIS14_Pos (14UL) /*!< PORT7 PDISC: PDIS14 (Bit 14) */ +#define PORT7_PDISC_PDIS14_Msk (0x4000UL) /*!< PORT7 PDISC: PDIS14 (Bitfield-Mask: 0x01) */ +#define PORT7_PDISC_PDIS15_Pos (15UL) /*!< PORT7 PDISC: PDIS15 (Bit 15) */ +#define PORT7_PDISC_PDIS15_Msk (0x8000UL) /*!< PORT7 PDISC: PDIS15 (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- PORT7_PPS --------------------------------- */ +#define PORT7_PPS_PPS0_Pos (0UL) /*!< PORT7 PPS: PPS0 (Bit 0) */ +#define PORT7_PPS_PPS0_Msk (0x1UL) /*!< PORT7 PPS: PPS0 (Bitfield-Mask: 0x01) */ +#define PORT7_PPS_PPS1_Pos (1UL) /*!< PORT7 PPS: PPS1 (Bit 1) */ +#define PORT7_PPS_PPS1_Msk (0x2UL) /*!< PORT7 PPS: PPS1 (Bitfield-Mask: 0x01) */ +#define PORT7_PPS_PPS2_Pos (2UL) /*!< PORT7 PPS: PPS2 (Bit 2) */ +#define PORT7_PPS_PPS2_Msk (0x4UL) /*!< PORT7 PPS: PPS2 (Bitfield-Mask: 0x01) */ +#define PORT7_PPS_PPS3_Pos (3UL) /*!< PORT7 PPS: PPS3 (Bit 3) */ +#define PORT7_PPS_PPS3_Msk (0x8UL) /*!< PORT7 PPS: PPS3 (Bitfield-Mask: 0x01) */ +#define PORT7_PPS_PPS4_Pos (4UL) /*!< PORT7 PPS: PPS4 (Bit 4) */ +#define PORT7_PPS_PPS4_Msk (0x10UL) /*!< PORT7 PPS: PPS4 (Bitfield-Mask: 0x01) */ +#define PORT7_PPS_PPS5_Pos (5UL) /*!< PORT7 PPS: PPS5 (Bit 5) */ +#define PORT7_PPS_PPS5_Msk (0x20UL) /*!< PORT7 PPS: PPS5 (Bitfield-Mask: 0x01) */ +#define PORT7_PPS_PPS6_Pos (6UL) /*!< PORT7 PPS: PPS6 (Bit 6) */ +#define PORT7_PPS_PPS6_Msk (0x40UL) /*!< PORT7 PPS: PPS6 (Bitfield-Mask: 0x01) */ +#define PORT7_PPS_PPS7_Pos (7UL) /*!< PORT7 PPS: PPS7 (Bit 7) */ +#define PORT7_PPS_PPS7_Msk (0x80UL) /*!< PORT7 PPS: PPS7 (Bitfield-Mask: 0x01) */ +#define PORT7_PPS_PPS8_Pos (8UL) /*!< PORT7 PPS: PPS8 (Bit 8) */ +#define PORT7_PPS_PPS8_Msk (0x100UL) /*!< PORT7 PPS: PPS8 (Bitfield-Mask: 0x01) */ +#define PORT7_PPS_PPS9_Pos (9UL) /*!< PORT7 PPS: PPS9 (Bit 9) */ +#define PORT7_PPS_PPS9_Msk (0x200UL) /*!< PORT7 PPS: PPS9 (Bitfield-Mask: 0x01) */ +#define PORT7_PPS_PPS10_Pos (10UL) /*!< PORT7 PPS: PPS10 (Bit 10) */ +#define PORT7_PPS_PPS10_Msk (0x400UL) /*!< PORT7 PPS: PPS10 (Bitfield-Mask: 0x01) */ +#define PORT7_PPS_PPS11_Pos (11UL) /*!< PORT7 PPS: PPS11 (Bit 11) */ +#define PORT7_PPS_PPS11_Msk (0x800UL) /*!< PORT7 PPS: PPS11 (Bitfield-Mask: 0x01) */ +#define PORT7_PPS_PPS12_Pos (12UL) /*!< PORT7 PPS: PPS12 (Bit 12) */ +#define PORT7_PPS_PPS12_Msk (0x1000UL) /*!< PORT7 PPS: PPS12 (Bitfield-Mask: 0x01) */ +#define PORT7_PPS_PPS13_Pos (13UL) /*!< PORT7 PPS: PPS13 (Bit 13) */ +#define PORT7_PPS_PPS13_Msk (0x2000UL) /*!< PORT7 PPS: PPS13 (Bitfield-Mask: 0x01) */ +#define PORT7_PPS_PPS14_Pos (14UL) /*!< PORT7 PPS: PPS14 (Bit 14) */ +#define PORT7_PPS_PPS14_Msk (0x4000UL) /*!< PORT7 PPS: PPS14 (Bitfield-Mask: 0x01) */ +#define PORT7_PPS_PPS15_Pos (15UL) /*!< PORT7 PPS: PPS15 (Bit 15) */ +#define PORT7_PPS_PPS15_Msk (0x8000UL) /*!< PORT7 PPS: PPS15 (Bitfield-Mask: 0x01) */ + +/* --------------------------------- PORT7_HWSEL -------------------------------- */ +#define PORT7_HWSEL_HW0_Pos (0UL) /*!< PORT7 HWSEL: HW0 (Bit 0) */ +#define PORT7_HWSEL_HW0_Msk (0x3UL) /*!< PORT7 HWSEL: HW0 (Bitfield-Mask: 0x03) */ +#define PORT7_HWSEL_HW1_Pos (2UL) /*!< PORT7 HWSEL: HW1 (Bit 2) */ +#define PORT7_HWSEL_HW1_Msk (0xcUL) /*!< PORT7 HWSEL: HW1 (Bitfield-Mask: 0x03) */ +#define PORT7_HWSEL_HW2_Pos (4UL) /*!< PORT7 HWSEL: HW2 (Bit 4) */ +#define PORT7_HWSEL_HW2_Msk (0x30UL) /*!< PORT7 HWSEL: HW2 (Bitfield-Mask: 0x03) */ +#define PORT7_HWSEL_HW3_Pos (6UL) /*!< PORT7 HWSEL: HW3 (Bit 6) */ +#define PORT7_HWSEL_HW3_Msk (0xc0UL) /*!< PORT7 HWSEL: HW3 (Bitfield-Mask: 0x03) */ +#define PORT7_HWSEL_HW4_Pos (8UL) /*!< PORT7 HWSEL: HW4 (Bit 8) */ +#define PORT7_HWSEL_HW4_Msk (0x300UL) /*!< PORT7 HWSEL: HW4 (Bitfield-Mask: 0x03) */ +#define PORT7_HWSEL_HW5_Pos (10UL) /*!< PORT7 HWSEL: HW5 (Bit 10) */ +#define PORT7_HWSEL_HW5_Msk (0xc00UL) /*!< PORT7 HWSEL: HW5 (Bitfield-Mask: 0x03) */ +#define PORT7_HWSEL_HW6_Pos (12UL) /*!< PORT7 HWSEL: HW6 (Bit 12) */ +#define PORT7_HWSEL_HW6_Msk (0x3000UL) /*!< PORT7 HWSEL: HW6 (Bitfield-Mask: 0x03) */ +#define PORT7_HWSEL_HW7_Pos (14UL) /*!< PORT7 HWSEL: HW7 (Bit 14) */ +#define PORT7_HWSEL_HW7_Msk (0xc000UL) /*!< PORT7 HWSEL: HW7 (Bitfield-Mask: 0x03) */ +#define PORT7_HWSEL_HW8_Pos (16UL) /*!< PORT7 HWSEL: HW8 (Bit 16) */ +#define PORT7_HWSEL_HW8_Msk (0x30000UL) /*!< PORT7 HWSEL: HW8 (Bitfield-Mask: 0x03) */ +#define PORT7_HWSEL_HW9_Pos (18UL) /*!< PORT7 HWSEL: HW9 (Bit 18) */ +#define PORT7_HWSEL_HW9_Msk (0xc0000UL) /*!< PORT7 HWSEL: HW9 (Bitfield-Mask: 0x03) */ +#define PORT7_HWSEL_HW10_Pos (20UL) /*!< PORT7 HWSEL: HW10 (Bit 20) */ +#define PORT7_HWSEL_HW10_Msk (0x300000UL) /*!< PORT7 HWSEL: HW10 (Bitfield-Mask: 0x03) */ +#define PORT7_HWSEL_HW11_Pos (22UL) /*!< PORT7 HWSEL: HW11 (Bit 22) */ +#define PORT7_HWSEL_HW11_Msk (0xc00000UL) /*!< PORT7 HWSEL: HW11 (Bitfield-Mask: 0x03) */ +#define PORT7_HWSEL_HW12_Pos (24UL) /*!< PORT7 HWSEL: HW12 (Bit 24) */ +#define PORT7_HWSEL_HW12_Msk (0x3000000UL) /*!< PORT7 HWSEL: HW12 (Bitfield-Mask: 0x03) */ +#define PORT7_HWSEL_HW13_Pos (26UL) /*!< PORT7 HWSEL: HW13 (Bit 26) */ +#define PORT7_HWSEL_HW13_Msk (0xc000000UL) /*!< PORT7 HWSEL: HW13 (Bitfield-Mask: 0x03) */ +#define PORT7_HWSEL_HW14_Pos (28UL) /*!< PORT7 HWSEL: HW14 (Bit 28) */ +#define PORT7_HWSEL_HW14_Msk (0x30000000UL) /*!< PORT7 HWSEL: HW14 (Bitfield-Mask: 0x03) */ +#define PORT7_HWSEL_HW15_Pos (30UL) /*!< PORT7 HWSEL: HW15 (Bit 30) */ +#define PORT7_HWSEL_HW15_Msk (0xc0000000UL) /*!< PORT7 HWSEL: HW15 (Bitfield-Mask: 0x03) */ + + +/* ================================================================================ */ +/* ================ struct 'PORT8' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ---------------------------------- PORT8_OUT --------------------------------- */ +#define PORT8_OUT_P0_Pos (0UL) /*!< PORT8 OUT: P0 (Bit 0) */ +#define PORT8_OUT_P0_Msk (0x1UL) /*!< PORT8 OUT: P0 (Bitfield-Mask: 0x01) */ +#define PORT8_OUT_P1_Pos (1UL) /*!< PORT8 OUT: P1 (Bit 1) */ +#define PORT8_OUT_P1_Msk (0x2UL) /*!< PORT8 OUT: P1 (Bitfield-Mask: 0x01) */ +#define PORT8_OUT_P2_Pos (2UL) /*!< PORT8 OUT: P2 (Bit 2) */ +#define PORT8_OUT_P2_Msk (0x4UL) /*!< PORT8 OUT: P2 (Bitfield-Mask: 0x01) */ +#define PORT8_OUT_P3_Pos (3UL) /*!< PORT8 OUT: P3 (Bit 3) */ +#define PORT8_OUT_P3_Msk (0x8UL) /*!< PORT8 OUT: P3 (Bitfield-Mask: 0x01) */ +#define PORT8_OUT_P4_Pos (4UL) /*!< PORT8 OUT: P4 (Bit 4) */ +#define PORT8_OUT_P4_Msk (0x10UL) /*!< PORT8 OUT: P4 (Bitfield-Mask: 0x01) */ +#define PORT8_OUT_P5_Pos (5UL) /*!< PORT8 OUT: P5 (Bit 5) */ +#define PORT8_OUT_P5_Msk (0x20UL) /*!< PORT8 OUT: P5 (Bitfield-Mask: 0x01) */ +#define PORT8_OUT_P6_Pos (6UL) /*!< PORT8 OUT: P6 (Bit 6) */ +#define PORT8_OUT_P6_Msk (0x40UL) /*!< PORT8 OUT: P6 (Bitfield-Mask: 0x01) */ +#define PORT8_OUT_P7_Pos (7UL) /*!< PORT8 OUT: P7 (Bit 7) */ +#define PORT8_OUT_P7_Msk (0x80UL) /*!< PORT8 OUT: P7 (Bitfield-Mask: 0x01) */ +#define PORT8_OUT_P8_Pos (8UL) /*!< PORT8 OUT: P8 (Bit 8) */ +#define PORT8_OUT_P8_Msk (0x100UL) /*!< PORT8 OUT: P8 (Bitfield-Mask: 0x01) */ +#define PORT8_OUT_P9_Pos (9UL) /*!< PORT8 OUT: P9 (Bit 9) */ +#define PORT8_OUT_P9_Msk (0x200UL) /*!< PORT8 OUT: P9 (Bitfield-Mask: 0x01) */ +#define PORT8_OUT_P10_Pos (10UL) /*!< PORT8 OUT: P10 (Bit 10) */ +#define PORT8_OUT_P10_Msk (0x400UL) /*!< PORT8 OUT: P10 (Bitfield-Mask: 0x01) */ +#define PORT8_OUT_P11_Pos (11UL) /*!< PORT8 OUT: P11 (Bit 11) */ +#define PORT8_OUT_P11_Msk (0x800UL) /*!< PORT8 OUT: P11 (Bitfield-Mask: 0x01) */ +#define PORT8_OUT_P12_Pos (12UL) /*!< PORT8 OUT: P12 (Bit 12) */ +#define PORT8_OUT_P12_Msk (0x1000UL) /*!< PORT8 OUT: P12 (Bitfield-Mask: 0x01) */ +#define PORT8_OUT_P13_Pos (13UL) /*!< PORT8 OUT: P13 (Bit 13) */ +#define PORT8_OUT_P13_Msk (0x2000UL) /*!< PORT8 OUT: P13 (Bitfield-Mask: 0x01) */ +#define PORT8_OUT_P14_Pos (14UL) /*!< PORT8 OUT: P14 (Bit 14) */ +#define PORT8_OUT_P14_Msk (0x4000UL) /*!< PORT8 OUT: P14 (Bitfield-Mask: 0x01) */ +#define PORT8_OUT_P15_Pos (15UL) /*!< PORT8 OUT: P15 (Bit 15) */ +#define PORT8_OUT_P15_Msk (0x8000UL) /*!< PORT8 OUT: P15 (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- PORT8_OMR --------------------------------- */ +#define PORT8_OMR_PS0_Pos (0UL) /*!< PORT8 OMR: PS0 (Bit 0) */ +#define PORT8_OMR_PS0_Msk (0x1UL) /*!< PORT8 OMR: PS0 (Bitfield-Mask: 0x01) */ +#define PORT8_OMR_PS1_Pos (1UL) /*!< PORT8 OMR: PS1 (Bit 1) */ +#define PORT8_OMR_PS1_Msk (0x2UL) /*!< PORT8 OMR: PS1 (Bitfield-Mask: 0x01) */ +#define PORT8_OMR_PS2_Pos (2UL) /*!< PORT8 OMR: PS2 (Bit 2) */ +#define PORT8_OMR_PS2_Msk (0x4UL) /*!< PORT8 OMR: PS2 (Bitfield-Mask: 0x01) */ +#define PORT8_OMR_PS3_Pos (3UL) /*!< PORT8 OMR: PS3 (Bit 3) */ +#define PORT8_OMR_PS3_Msk (0x8UL) /*!< PORT8 OMR: PS3 (Bitfield-Mask: 0x01) */ +#define PORT8_OMR_PS4_Pos (4UL) /*!< PORT8 OMR: PS4 (Bit 4) */ +#define PORT8_OMR_PS4_Msk (0x10UL) /*!< PORT8 OMR: PS4 (Bitfield-Mask: 0x01) */ +#define PORT8_OMR_PS5_Pos (5UL) /*!< PORT8 OMR: PS5 (Bit 5) */ +#define PORT8_OMR_PS5_Msk (0x20UL) /*!< PORT8 OMR: PS5 (Bitfield-Mask: 0x01) */ +#define PORT8_OMR_PS6_Pos (6UL) /*!< PORT8 OMR: PS6 (Bit 6) */ +#define PORT8_OMR_PS6_Msk (0x40UL) /*!< PORT8 OMR: PS6 (Bitfield-Mask: 0x01) */ +#define PORT8_OMR_PS7_Pos (7UL) /*!< PORT8 OMR: PS7 (Bit 7) */ +#define PORT8_OMR_PS7_Msk (0x80UL) /*!< PORT8 OMR: PS7 (Bitfield-Mask: 0x01) */ +#define PORT8_OMR_PS8_Pos (8UL) /*!< PORT8 OMR: PS8 (Bit 8) */ +#define PORT8_OMR_PS8_Msk (0x100UL) /*!< PORT8 OMR: PS8 (Bitfield-Mask: 0x01) */ +#define PORT8_OMR_PS9_Pos (9UL) /*!< PORT8 OMR: PS9 (Bit 9) */ +#define PORT8_OMR_PS9_Msk (0x200UL) /*!< PORT8 OMR: PS9 (Bitfield-Mask: 0x01) */ +#define PORT8_OMR_PS10_Pos (10UL) /*!< PORT8 OMR: PS10 (Bit 10) */ +#define PORT8_OMR_PS10_Msk (0x400UL) /*!< PORT8 OMR: PS10 (Bitfield-Mask: 0x01) */ +#define PORT8_OMR_PS11_Pos (11UL) /*!< PORT8 OMR: PS11 (Bit 11) */ +#define PORT8_OMR_PS11_Msk (0x800UL) /*!< PORT8 OMR: PS11 (Bitfield-Mask: 0x01) */ +#define PORT8_OMR_PS12_Pos (12UL) /*!< PORT8 OMR: PS12 (Bit 12) */ +#define PORT8_OMR_PS12_Msk (0x1000UL) /*!< PORT8 OMR: PS12 (Bitfield-Mask: 0x01) */ +#define PORT8_OMR_PS13_Pos (13UL) /*!< PORT8 OMR: PS13 (Bit 13) */ +#define PORT8_OMR_PS13_Msk (0x2000UL) /*!< PORT8 OMR: PS13 (Bitfield-Mask: 0x01) */ +#define PORT8_OMR_PS14_Pos (14UL) /*!< PORT8 OMR: PS14 (Bit 14) */ +#define PORT8_OMR_PS14_Msk (0x4000UL) /*!< PORT8 OMR: PS14 (Bitfield-Mask: 0x01) */ +#define PORT8_OMR_PS15_Pos (15UL) /*!< PORT8 OMR: PS15 (Bit 15) */ +#define PORT8_OMR_PS15_Msk (0x8000UL) /*!< PORT8 OMR: PS15 (Bitfield-Mask: 0x01) */ +#define PORT8_OMR_PR0_Pos (16UL) /*!< PORT8 OMR: PR0 (Bit 16) */ +#define PORT8_OMR_PR0_Msk (0x10000UL) /*!< PORT8 OMR: PR0 (Bitfield-Mask: 0x01) */ +#define PORT8_OMR_PR1_Pos (17UL) /*!< PORT8 OMR: PR1 (Bit 17) */ +#define PORT8_OMR_PR1_Msk (0x20000UL) /*!< PORT8 OMR: PR1 (Bitfield-Mask: 0x01) */ +#define PORT8_OMR_PR2_Pos (18UL) /*!< PORT8 OMR: PR2 (Bit 18) */ +#define PORT8_OMR_PR2_Msk (0x40000UL) /*!< PORT8 OMR: PR2 (Bitfield-Mask: 0x01) */ +#define PORT8_OMR_PR3_Pos (19UL) /*!< PORT8 OMR: PR3 (Bit 19) */ +#define PORT8_OMR_PR3_Msk (0x80000UL) /*!< PORT8 OMR: PR3 (Bitfield-Mask: 0x01) */ +#define PORT8_OMR_PR4_Pos (20UL) /*!< PORT8 OMR: PR4 (Bit 20) */ +#define PORT8_OMR_PR4_Msk (0x100000UL) /*!< PORT8 OMR: PR4 (Bitfield-Mask: 0x01) */ +#define PORT8_OMR_PR5_Pos (21UL) /*!< PORT8 OMR: PR5 (Bit 21) */ +#define PORT8_OMR_PR5_Msk (0x200000UL) /*!< PORT8 OMR: PR5 (Bitfield-Mask: 0x01) */ +#define PORT8_OMR_PR6_Pos (22UL) /*!< PORT8 OMR: PR6 (Bit 22) */ +#define PORT8_OMR_PR6_Msk (0x400000UL) /*!< PORT8 OMR: PR6 (Bitfield-Mask: 0x01) */ +#define PORT8_OMR_PR7_Pos (23UL) /*!< PORT8 OMR: PR7 (Bit 23) */ +#define PORT8_OMR_PR7_Msk (0x800000UL) /*!< PORT8 OMR: PR7 (Bitfield-Mask: 0x01) */ +#define PORT8_OMR_PR8_Pos (24UL) /*!< PORT8 OMR: PR8 (Bit 24) */ +#define PORT8_OMR_PR8_Msk (0x1000000UL) /*!< PORT8 OMR: PR8 (Bitfield-Mask: 0x01) */ +#define PORT8_OMR_PR9_Pos (25UL) /*!< PORT8 OMR: PR9 (Bit 25) */ +#define PORT8_OMR_PR9_Msk (0x2000000UL) /*!< PORT8 OMR: PR9 (Bitfield-Mask: 0x01) */ +#define PORT8_OMR_PR10_Pos (26UL) /*!< PORT8 OMR: PR10 (Bit 26) */ +#define PORT8_OMR_PR10_Msk (0x4000000UL) /*!< PORT8 OMR: PR10 (Bitfield-Mask: 0x01) */ +#define PORT8_OMR_PR11_Pos (27UL) /*!< PORT8 OMR: PR11 (Bit 27) */ +#define PORT8_OMR_PR11_Msk (0x8000000UL) /*!< PORT8 OMR: PR11 (Bitfield-Mask: 0x01) */ +#define PORT8_OMR_PR12_Pos (28UL) /*!< PORT8 OMR: PR12 (Bit 28) */ +#define PORT8_OMR_PR12_Msk (0x10000000UL) /*!< PORT8 OMR: PR12 (Bitfield-Mask: 0x01) */ +#define PORT8_OMR_PR13_Pos (29UL) /*!< PORT8 OMR: PR13 (Bit 29) */ +#define PORT8_OMR_PR13_Msk (0x20000000UL) /*!< PORT8 OMR: PR13 (Bitfield-Mask: 0x01) */ +#define PORT8_OMR_PR14_Pos (30UL) /*!< PORT8 OMR: PR14 (Bit 30) */ +#define PORT8_OMR_PR14_Msk (0x40000000UL) /*!< PORT8 OMR: PR14 (Bitfield-Mask: 0x01) */ +#define PORT8_OMR_PR15_Pos (31UL) /*!< PORT8 OMR: PR15 (Bit 31) */ +#define PORT8_OMR_PR15_Msk (0x80000000UL) /*!< PORT8 OMR: PR15 (Bitfield-Mask: 0x01) */ + +/* --------------------------------- PORT8_IOCR0 -------------------------------- */ +#define PORT8_IOCR0_PC0_Pos (3UL) /*!< PORT8 IOCR0: PC0 (Bit 3) */ +#define PORT8_IOCR0_PC0_Msk (0xf8UL) /*!< PORT8 IOCR0: PC0 (Bitfield-Mask: 0x1f) */ +#define PORT8_IOCR0_PC1_Pos (11UL) /*!< PORT8 IOCR0: PC1 (Bit 11) */ +#define PORT8_IOCR0_PC1_Msk (0xf800UL) /*!< PORT8 IOCR0: PC1 (Bitfield-Mask: 0x1f) */ +#define PORT8_IOCR0_PC2_Pos (19UL) /*!< PORT8 IOCR0: PC2 (Bit 19) */ +#define PORT8_IOCR0_PC2_Msk (0xf80000UL) /*!< PORT8 IOCR0: PC2 (Bitfield-Mask: 0x1f) */ +#define PORT8_IOCR0_PC3_Pos (27UL) /*!< PORT8 IOCR0: PC3 (Bit 27) */ +#define PORT8_IOCR0_PC3_Msk (0xf8000000UL) /*!< PORT8 IOCR0: PC3 (Bitfield-Mask: 0x1f) */ + +/* --------------------------------- PORT8_IOCR4 -------------------------------- */ +#define PORT8_IOCR4_PC4_Pos (3UL) /*!< PORT8 IOCR4: PC4 (Bit 3) */ +#define PORT8_IOCR4_PC4_Msk (0xf8UL) /*!< PORT8 IOCR4: PC4 (Bitfield-Mask: 0x1f) */ +#define PORT8_IOCR4_PC5_Pos (11UL) /*!< PORT8 IOCR4: PC5 (Bit 11) */ +#define PORT8_IOCR4_PC5_Msk (0xf800UL) /*!< PORT8 IOCR4: PC5 (Bitfield-Mask: 0x1f) */ +#define PORT8_IOCR4_PC6_Pos (19UL) /*!< PORT8 IOCR4: PC6 (Bit 19) */ +#define PORT8_IOCR4_PC6_Msk (0xf80000UL) /*!< PORT8 IOCR4: PC6 (Bitfield-Mask: 0x1f) */ +#define PORT8_IOCR4_PC7_Pos (27UL) /*!< PORT8 IOCR4: PC7 (Bit 27) */ +#define PORT8_IOCR4_PC7_Msk (0xf8000000UL) /*!< PORT8 IOCR4: PC7 (Bitfield-Mask: 0x1f) */ + +/* --------------------------------- PORT8_IOCR8 -------------------------------- */ +#define PORT8_IOCR8_PC8_Pos (3UL) /*!< PORT8 IOCR8: PC8 (Bit 3) */ +#define PORT8_IOCR8_PC8_Msk (0xf8UL) /*!< PORT8 IOCR8: PC8 (Bitfield-Mask: 0x1f) */ +#define PORT8_IOCR8_PC9_Pos (11UL) /*!< PORT8 IOCR8: PC9 (Bit 11) */ +#define PORT8_IOCR8_PC9_Msk (0xf800UL) /*!< PORT8 IOCR8: PC9 (Bitfield-Mask: 0x1f) */ +#define PORT8_IOCR8_PC10_Pos (19UL) /*!< PORT8 IOCR8: PC10 (Bit 19) */ +#define PORT8_IOCR8_PC10_Msk (0xf80000UL) /*!< PORT8 IOCR8: PC10 (Bitfield-Mask: 0x1f) */ +#define PORT8_IOCR8_PC11_Pos (27UL) /*!< PORT8 IOCR8: PC11 (Bit 27) */ +#define PORT8_IOCR8_PC11_Msk (0xf8000000UL) /*!< PORT8 IOCR8: PC11 (Bitfield-Mask: 0x1f) */ + +/* ---------------------------------- PORT8_IN ---------------------------------- */ +#define PORT8_IN_P0_Pos (0UL) /*!< PORT8 IN: P0 (Bit 0) */ +#define PORT8_IN_P0_Msk (0x1UL) /*!< PORT8 IN: P0 (Bitfield-Mask: 0x01) */ +#define PORT8_IN_P1_Pos (1UL) /*!< PORT8 IN: P1 (Bit 1) */ +#define PORT8_IN_P1_Msk (0x2UL) /*!< PORT8 IN: P1 (Bitfield-Mask: 0x01) */ +#define PORT8_IN_P2_Pos (2UL) /*!< PORT8 IN: P2 (Bit 2) */ +#define PORT8_IN_P2_Msk (0x4UL) /*!< PORT8 IN: P2 (Bitfield-Mask: 0x01) */ +#define PORT8_IN_P3_Pos (3UL) /*!< PORT8 IN: P3 (Bit 3) */ +#define PORT8_IN_P3_Msk (0x8UL) /*!< PORT8 IN: P3 (Bitfield-Mask: 0x01) */ +#define PORT8_IN_P4_Pos (4UL) /*!< PORT8 IN: P4 (Bit 4) */ +#define PORT8_IN_P4_Msk (0x10UL) /*!< PORT8 IN: P4 (Bitfield-Mask: 0x01) */ +#define PORT8_IN_P5_Pos (5UL) /*!< PORT8 IN: P5 (Bit 5) */ +#define PORT8_IN_P5_Msk (0x20UL) /*!< PORT8 IN: P5 (Bitfield-Mask: 0x01) */ +#define PORT8_IN_P6_Pos (6UL) /*!< PORT8 IN: P6 (Bit 6) */ +#define PORT8_IN_P6_Msk (0x40UL) /*!< PORT8 IN: P6 (Bitfield-Mask: 0x01) */ +#define PORT8_IN_P7_Pos (7UL) /*!< PORT8 IN: P7 (Bit 7) */ +#define PORT8_IN_P7_Msk (0x80UL) /*!< PORT8 IN: P7 (Bitfield-Mask: 0x01) */ +#define PORT8_IN_P8_Pos (8UL) /*!< PORT8 IN: P8 (Bit 8) */ +#define PORT8_IN_P8_Msk (0x100UL) /*!< PORT8 IN: P8 (Bitfield-Mask: 0x01) */ +#define PORT8_IN_P9_Pos (9UL) /*!< PORT8 IN: P9 (Bit 9) */ +#define PORT8_IN_P9_Msk (0x200UL) /*!< PORT8 IN: P9 (Bitfield-Mask: 0x01) */ +#define PORT8_IN_P10_Pos (10UL) /*!< PORT8 IN: P10 (Bit 10) */ +#define PORT8_IN_P10_Msk (0x400UL) /*!< PORT8 IN: P10 (Bitfield-Mask: 0x01) */ +#define PORT8_IN_P11_Pos (11UL) /*!< PORT8 IN: P11 (Bit 11) */ +#define PORT8_IN_P11_Msk (0x800UL) /*!< PORT8 IN: P11 (Bitfield-Mask: 0x01) */ +#define PORT8_IN_P12_Pos (12UL) /*!< PORT8 IN: P12 (Bit 12) */ +#define PORT8_IN_P12_Msk (0x1000UL) /*!< PORT8 IN: P12 (Bitfield-Mask: 0x01) */ +#define PORT8_IN_P13_Pos (13UL) /*!< PORT8 IN: P13 (Bit 13) */ +#define PORT8_IN_P13_Msk (0x2000UL) /*!< PORT8 IN: P13 (Bitfield-Mask: 0x01) */ +#define PORT8_IN_P14_Pos (14UL) /*!< PORT8 IN: P14 (Bit 14) */ +#define PORT8_IN_P14_Msk (0x4000UL) /*!< PORT8 IN: P14 (Bitfield-Mask: 0x01) */ +#define PORT8_IN_P15_Pos (15UL) /*!< PORT8 IN: P15 (Bit 15) */ +#define PORT8_IN_P15_Msk (0x8000UL) /*!< PORT8 IN: P15 (Bitfield-Mask: 0x01) */ + +/* --------------------------------- PORT8_PDR0 --------------------------------- */ +#define PORT8_PDR0_PD0_Pos (0UL) /*!< PORT8 PDR0: PD0 (Bit 0) */ +#define PORT8_PDR0_PD0_Msk (0x7UL) /*!< PORT8 PDR0: PD0 (Bitfield-Mask: 0x07) */ +#define PORT8_PDR0_PD1_Pos (4UL) /*!< PORT8 PDR0: PD1 (Bit 4) */ +#define PORT8_PDR0_PD1_Msk (0x70UL) /*!< PORT8 PDR0: PD1 (Bitfield-Mask: 0x07) */ +#define PORT8_PDR0_PD2_Pos (8UL) /*!< PORT8 PDR0: PD2 (Bit 8) */ +#define PORT8_PDR0_PD2_Msk (0x700UL) /*!< PORT8 PDR0: PD2 (Bitfield-Mask: 0x07) */ +#define PORT8_PDR0_PD3_Pos (12UL) /*!< PORT8 PDR0: PD3 (Bit 12) */ +#define PORT8_PDR0_PD3_Msk (0x7000UL) /*!< PORT8 PDR0: PD3 (Bitfield-Mask: 0x07) */ +#define PORT8_PDR0_PD4_Pos (16UL) /*!< PORT8 PDR0: PD4 (Bit 16) */ +#define PORT8_PDR0_PD4_Msk (0x70000UL) /*!< PORT8 PDR0: PD4 (Bitfield-Mask: 0x07) */ +#define PORT8_PDR0_PD5_Pos (20UL) /*!< PORT8 PDR0: PD5 (Bit 20) */ +#define PORT8_PDR0_PD5_Msk (0x700000UL) /*!< PORT8 PDR0: PD5 (Bitfield-Mask: 0x07) */ +#define PORT8_PDR0_PD6_Pos (24UL) /*!< PORT8 PDR0: PD6 (Bit 24) */ +#define PORT8_PDR0_PD6_Msk (0x7000000UL) /*!< PORT8 PDR0: PD6 (Bitfield-Mask: 0x07) */ +#define PORT8_PDR0_PD7_Pos (28UL) /*!< PORT8 PDR0: PD7 (Bit 28) */ +#define PORT8_PDR0_PD7_Msk (0x70000000UL) /*!< PORT8 PDR0: PD7 (Bitfield-Mask: 0x07) */ + +/* --------------------------------- PORT8_PDR1 --------------------------------- */ +#define PORT8_PDR1_PD8_Pos (0UL) /*!< PORT8 PDR1: PD8 (Bit 0) */ +#define PORT8_PDR1_PD8_Msk (0x7UL) /*!< PORT8 PDR1: PD8 (Bitfield-Mask: 0x07) */ +#define PORT8_PDR1_PD9_Pos (4UL) /*!< PORT8 PDR1: PD9 (Bit 4) */ +#define PORT8_PDR1_PD9_Msk (0x70UL) /*!< PORT8 PDR1: PD9 (Bitfield-Mask: 0x07) */ +#define PORT8_PDR1_PD10_Pos (8UL) /*!< PORT8 PDR1: PD10 (Bit 8) */ +#define PORT8_PDR1_PD10_Msk (0x700UL) /*!< PORT8 PDR1: PD10 (Bitfield-Mask: 0x07) */ +#define PORT8_PDR1_PD11_Pos (12UL) /*!< PORT8 PDR1: PD11 (Bit 12) */ +#define PORT8_PDR1_PD11_Msk (0x7000UL) /*!< PORT8 PDR1: PD11 (Bitfield-Mask: 0x07) */ +#define PORT8_PDR1_PD12_Pos (16UL) /*!< PORT8 PDR1: PD12 (Bit 16) */ +#define PORT8_PDR1_PD12_Msk (0x70000UL) /*!< PORT8 PDR1: PD12 (Bitfield-Mask: 0x07) */ +#define PORT8_PDR1_PD13_Pos (20UL) /*!< PORT8 PDR1: PD13 (Bit 20) */ +#define PORT8_PDR1_PD13_Msk (0x700000UL) /*!< PORT8 PDR1: PD13 (Bitfield-Mask: 0x07) */ +#define PORT8_PDR1_PD14_Pos (24UL) /*!< PORT8 PDR1: PD14 (Bit 24) */ +#define PORT8_PDR1_PD14_Msk (0x7000000UL) /*!< PORT8 PDR1: PD14 (Bitfield-Mask: 0x07) */ +#define PORT8_PDR1_PD15_Pos (28UL) /*!< PORT8 PDR1: PD15 (Bit 28) */ +#define PORT8_PDR1_PD15_Msk (0x70000000UL) /*!< PORT8 PDR1: PD15 (Bitfield-Mask: 0x07) */ + +/* --------------------------------- PORT8_PDISC -------------------------------- */ +#define PORT8_PDISC_PDIS0_Pos (0UL) /*!< PORT8 PDISC: PDIS0 (Bit 0) */ +#define PORT8_PDISC_PDIS0_Msk (0x1UL) /*!< PORT8 PDISC: PDIS0 (Bitfield-Mask: 0x01) */ +#define PORT8_PDISC_PDIS1_Pos (1UL) /*!< PORT8 PDISC: PDIS1 (Bit 1) */ +#define PORT8_PDISC_PDIS1_Msk (0x2UL) /*!< PORT8 PDISC: PDIS1 (Bitfield-Mask: 0x01) */ +#define PORT8_PDISC_PDIS2_Pos (2UL) /*!< PORT8 PDISC: PDIS2 (Bit 2) */ +#define PORT8_PDISC_PDIS2_Msk (0x4UL) /*!< PORT8 PDISC: PDIS2 (Bitfield-Mask: 0x01) */ +#define PORT8_PDISC_PDIS3_Pos (3UL) /*!< PORT8 PDISC: PDIS3 (Bit 3) */ +#define PORT8_PDISC_PDIS3_Msk (0x8UL) /*!< PORT8 PDISC: PDIS3 (Bitfield-Mask: 0x01) */ +#define PORT8_PDISC_PDIS4_Pos (4UL) /*!< PORT8 PDISC: PDIS4 (Bit 4) */ +#define PORT8_PDISC_PDIS4_Msk (0x10UL) /*!< PORT8 PDISC: PDIS4 (Bitfield-Mask: 0x01) */ +#define PORT8_PDISC_PDIS5_Pos (5UL) /*!< PORT8 PDISC: PDIS5 (Bit 5) */ +#define PORT8_PDISC_PDIS5_Msk (0x20UL) /*!< PORT8 PDISC: PDIS5 (Bitfield-Mask: 0x01) */ +#define PORT8_PDISC_PDIS6_Pos (6UL) /*!< PORT8 PDISC: PDIS6 (Bit 6) */ +#define PORT8_PDISC_PDIS6_Msk (0x40UL) /*!< PORT8 PDISC: PDIS6 (Bitfield-Mask: 0x01) */ +#define PORT8_PDISC_PDIS7_Pos (7UL) /*!< PORT8 PDISC: PDIS7 (Bit 7) */ +#define PORT8_PDISC_PDIS7_Msk (0x80UL) /*!< PORT8 PDISC: PDIS7 (Bitfield-Mask: 0x01) */ +#define PORT8_PDISC_PDIS8_Pos (8UL) /*!< PORT8 PDISC: PDIS8 (Bit 8) */ +#define PORT8_PDISC_PDIS8_Msk (0x100UL) /*!< PORT8 PDISC: PDIS8 (Bitfield-Mask: 0x01) */ +#define PORT8_PDISC_PDIS9_Pos (9UL) /*!< PORT8 PDISC: PDIS9 (Bit 9) */ +#define PORT8_PDISC_PDIS9_Msk (0x200UL) /*!< PORT8 PDISC: PDIS9 (Bitfield-Mask: 0x01) */ +#define PORT8_PDISC_PDIS10_Pos (10UL) /*!< PORT8 PDISC: PDIS10 (Bit 10) */ +#define PORT8_PDISC_PDIS10_Msk (0x400UL) /*!< PORT8 PDISC: PDIS10 (Bitfield-Mask: 0x01) */ +#define PORT8_PDISC_PDIS11_Pos (11UL) /*!< PORT8 PDISC: PDIS11 (Bit 11) */ +#define PORT8_PDISC_PDIS11_Msk (0x800UL) /*!< PORT8 PDISC: PDIS11 (Bitfield-Mask: 0x01) */ +#define PORT8_PDISC_PDIS12_Pos (12UL) /*!< PORT8 PDISC: PDIS12 (Bit 12) */ +#define PORT8_PDISC_PDIS12_Msk (0x1000UL) /*!< PORT8 PDISC: PDIS12 (Bitfield-Mask: 0x01) */ +#define PORT8_PDISC_PDIS13_Pos (13UL) /*!< PORT8 PDISC: PDIS13 (Bit 13) */ +#define PORT8_PDISC_PDIS13_Msk (0x2000UL) /*!< PORT8 PDISC: PDIS13 (Bitfield-Mask: 0x01) */ +#define PORT8_PDISC_PDIS14_Pos (14UL) /*!< PORT8 PDISC: PDIS14 (Bit 14) */ +#define PORT8_PDISC_PDIS14_Msk (0x4000UL) /*!< PORT8 PDISC: PDIS14 (Bitfield-Mask: 0x01) */ +#define PORT8_PDISC_PDIS15_Pos (15UL) /*!< PORT8 PDISC: PDIS15 (Bit 15) */ +#define PORT8_PDISC_PDIS15_Msk (0x8000UL) /*!< PORT8 PDISC: PDIS15 (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- PORT8_PPS --------------------------------- */ +#define PORT8_PPS_PPS0_Pos (0UL) /*!< PORT8 PPS: PPS0 (Bit 0) */ +#define PORT8_PPS_PPS0_Msk (0x1UL) /*!< PORT8 PPS: PPS0 (Bitfield-Mask: 0x01) */ +#define PORT8_PPS_PPS1_Pos (1UL) /*!< PORT8 PPS: PPS1 (Bit 1) */ +#define PORT8_PPS_PPS1_Msk (0x2UL) /*!< PORT8 PPS: PPS1 (Bitfield-Mask: 0x01) */ +#define PORT8_PPS_PPS2_Pos (2UL) /*!< PORT8 PPS: PPS2 (Bit 2) */ +#define PORT8_PPS_PPS2_Msk (0x4UL) /*!< PORT8 PPS: PPS2 (Bitfield-Mask: 0x01) */ +#define PORT8_PPS_PPS3_Pos (3UL) /*!< PORT8 PPS: PPS3 (Bit 3) */ +#define PORT8_PPS_PPS3_Msk (0x8UL) /*!< PORT8 PPS: PPS3 (Bitfield-Mask: 0x01) */ +#define PORT8_PPS_PPS4_Pos (4UL) /*!< PORT8 PPS: PPS4 (Bit 4) */ +#define PORT8_PPS_PPS4_Msk (0x10UL) /*!< PORT8 PPS: PPS4 (Bitfield-Mask: 0x01) */ +#define PORT8_PPS_PPS5_Pos (5UL) /*!< PORT8 PPS: PPS5 (Bit 5) */ +#define PORT8_PPS_PPS5_Msk (0x20UL) /*!< PORT8 PPS: PPS5 (Bitfield-Mask: 0x01) */ +#define PORT8_PPS_PPS6_Pos (6UL) /*!< PORT8 PPS: PPS6 (Bit 6) */ +#define PORT8_PPS_PPS6_Msk (0x40UL) /*!< PORT8 PPS: PPS6 (Bitfield-Mask: 0x01) */ +#define PORT8_PPS_PPS7_Pos (7UL) /*!< PORT8 PPS: PPS7 (Bit 7) */ +#define PORT8_PPS_PPS7_Msk (0x80UL) /*!< PORT8 PPS: PPS7 (Bitfield-Mask: 0x01) */ +#define PORT8_PPS_PPS8_Pos (8UL) /*!< PORT8 PPS: PPS8 (Bit 8) */ +#define PORT8_PPS_PPS8_Msk (0x100UL) /*!< PORT8 PPS: PPS8 (Bitfield-Mask: 0x01) */ +#define PORT8_PPS_PPS9_Pos (9UL) /*!< PORT8 PPS: PPS9 (Bit 9) */ +#define PORT8_PPS_PPS9_Msk (0x200UL) /*!< PORT8 PPS: PPS9 (Bitfield-Mask: 0x01) */ +#define PORT8_PPS_PPS10_Pos (10UL) /*!< PORT8 PPS: PPS10 (Bit 10) */ +#define PORT8_PPS_PPS10_Msk (0x400UL) /*!< PORT8 PPS: PPS10 (Bitfield-Mask: 0x01) */ +#define PORT8_PPS_PPS11_Pos (11UL) /*!< PORT8 PPS: PPS11 (Bit 11) */ +#define PORT8_PPS_PPS11_Msk (0x800UL) /*!< PORT8 PPS: PPS11 (Bitfield-Mask: 0x01) */ +#define PORT8_PPS_PPS12_Pos (12UL) /*!< PORT8 PPS: PPS12 (Bit 12) */ +#define PORT8_PPS_PPS12_Msk (0x1000UL) /*!< PORT8 PPS: PPS12 (Bitfield-Mask: 0x01) */ +#define PORT8_PPS_PPS13_Pos (13UL) /*!< PORT8 PPS: PPS13 (Bit 13) */ +#define PORT8_PPS_PPS13_Msk (0x2000UL) /*!< PORT8 PPS: PPS13 (Bitfield-Mask: 0x01) */ +#define PORT8_PPS_PPS14_Pos (14UL) /*!< PORT8 PPS: PPS14 (Bit 14) */ +#define PORT8_PPS_PPS14_Msk (0x4000UL) /*!< PORT8 PPS: PPS14 (Bitfield-Mask: 0x01) */ +#define PORT8_PPS_PPS15_Pos (15UL) /*!< PORT8 PPS: PPS15 (Bit 15) */ +#define PORT8_PPS_PPS15_Msk (0x8000UL) /*!< PORT8 PPS: PPS15 (Bitfield-Mask: 0x01) */ + +/* --------------------------------- PORT8_HWSEL -------------------------------- */ +#define PORT8_HWSEL_HW0_Pos (0UL) /*!< PORT8 HWSEL: HW0 (Bit 0) */ +#define PORT8_HWSEL_HW0_Msk (0x3UL) /*!< PORT8 HWSEL: HW0 (Bitfield-Mask: 0x03) */ +#define PORT8_HWSEL_HW1_Pos (2UL) /*!< PORT8 HWSEL: HW1 (Bit 2) */ +#define PORT8_HWSEL_HW1_Msk (0xcUL) /*!< PORT8 HWSEL: HW1 (Bitfield-Mask: 0x03) */ +#define PORT8_HWSEL_HW2_Pos (4UL) /*!< PORT8 HWSEL: HW2 (Bit 4) */ +#define PORT8_HWSEL_HW2_Msk (0x30UL) /*!< PORT8 HWSEL: HW2 (Bitfield-Mask: 0x03) */ +#define PORT8_HWSEL_HW3_Pos (6UL) /*!< PORT8 HWSEL: HW3 (Bit 6) */ +#define PORT8_HWSEL_HW3_Msk (0xc0UL) /*!< PORT8 HWSEL: HW3 (Bitfield-Mask: 0x03) */ +#define PORT8_HWSEL_HW4_Pos (8UL) /*!< PORT8 HWSEL: HW4 (Bit 8) */ +#define PORT8_HWSEL_HW4_Msk (0x300UL) /*!< PORT8 HWSEL: HW4 (Bitfield-Mask: 0x03) */ +#define PORT8_HWSEL_HW5_Pos (10UL) /*!< PORT8 HWSEL: HW5 (Bit 10) */ +#define PORT8_HWSEL_HW5_Msk (0xc00UL) /*!< PORT8 HWSEL: HW5 (Bitfield-Mask: 0x03) */ +#define PORT8_HWSEL_HW6_Pos (12UL) /*!< PORT8 HWSEL: HW6 (Bit 12) */ +#define PORT8_HWSEL_HW6_Msk (0x3000UL) /*!< PORT8 HWSEL: HW6 (Bitfield-Mask: 0x03) */ +#define PORT8_HWSEL_HW7_Pos (14UL) /*!< PORT8 HWSEL: HW7 (Bit 14) */ +#define PORT8_HWSEL_HW7_Msk (0xc000UL) /*!< PORT8 HWSEL: HW7 (Bitfield-Mask: 0x03) */ +#define PORT8_HWSEL_HW8_Pos (16UL) /*!< PORT8 HWSEL: HW8 (Bit 16) */ +#define PORT8_HWSEL_HW8_Msk (0x30000UL) /*!< PORT8 HWSEL: HW8 (Bitfield-Mask: 0x03) */ +#define PORT8_HWSEL_HW9_Pos (18UL) /*!< PORT8 HWSEL: HW9 (Bit 18) */ +#define PORT8_HWSEL_HW9_Msk (0xc0000UL) /*!< PORT8 HWSEL: HW9 (Bitfield-Mask: 0x03) */ +#define PORT8_HWSEL_HW10_Pos (20UL) /*!< PORT8 HWSEL: HW10 (Bit 20) */ +#define PORT8_HWSEL_HW10_Msk (0x300000UL) /*!< PORT8 HWSEL: HW10 (Bitfield-Mask: 0x03) */ +#define PORT8_HWSEL_HW11_Pos (22UL) /*!< PORT8 HWSEL: HW11 (Bit 22) */ +#define PORT8_HWSEL_HW11_Msk (0xc00000UL) /*!< PORT8 HWSEL: HW11 (Bitfield-Mask: 0x03) */ +#define PORT8_HWSEL_HW12_Pos (24UL) /*!< PORT8 HWSEL: HW12 (Bit 24) */ +#define PORT8_HWSEL_HW12_Msk (0x3000000UL) /*!< PORT8 HWSEL: HW12 (Bitfield-Mask: 0x03) */ +#define PORT8_HWSEL_HW13_Pos (26UL) /*!< PORT8 HWSEL: HW13 (Bit 26) */ +#define PORT8_HWSEL_HW13_Msk (0xc000000UL) /*!< PORT8 HWSEL: HW13 (Bitfield-Mask: 0x03) */ +#define PORT8_HWSEL_HW14_Pos (28UL) /*!< PORT8 HWSEL: HW14 (Bit 28) */ +#define PORT8_HWSEL_HW14_Msk (0x30000000UL) /*!< PORT8 HWSEL: HW14 (Bitfield-Mask: 0x03) */ +#define PORT8_HWSEL_HW15_Pos (30UL) /*!< PORT8 HWSEL: HW15 (Bit 30) */ +#define PORT8_HWSEL_HW15_Msk (0xc0000000UL) /*!< PORT8 HWSEL: HW15 (Bitfield-Mask: 0x03) */ + + +/* ================================================================================ */ +/* ================ struct 'PORT9' Position & Mask ================ */ +/* ================================================================================ */ + + +/* ---------------------------------- PORT9_OUT --------------------------------- */ +#define PORT9_OUT_P0_Pos (0UL) /*!< PORT9 OUT: P0 (Bit 0) */ +#define PORT9_OUT_P0_Msk (0x1UL) /*!< PORT9 OUT: P0 (Bitfield-Mask: 0x01) */ +#define PORT9_OUT_P1_Pos (1UL) /*!< PORT9 OUT: P1 (Bit 1) */ +#define PORT9_OUT_P1_Msk (0x2UL) /*!< PORT9 OUT: P1 (Bitfield-Mask: 0x01) */ +#define PORT9_OUT_P2_Pos (2UL) /*!< PORT9 OUT: P2 (Bit 2) */ +#define PORT9_OUT_P2_Msk (0x4UL) /*!< PORT9 OUT: P2 (Bitfield-Mask: 0x01) */ +#define PORT9_OUT_P3_Pos (3UL) /*!< PORT9 OUT: P3 (Bit 3) */ +#define PORT9_OUT_P3_Msk (0x8UL) /*!< PORT9 OUT: P3 (Bitfield-Mask: 0x01) */ +#define PORT9_OUT_P4_Pos (4UL) /*!< PORT9 OUT: P4 (Bit 4) */ +#define PORT9_OUT_P4_Msk (0x10UL) /*!< PORT9 OUT: P4 (Bitfield-Mask: 0x01) */ +#define PORT9_OUT_P5_Pos (5UL) /*!< PORT9 OUT: P5 (Bit 5) */ +#define PORT9_OUT_P5_Msk (0x20UL) /*!< PORT9 OUT: P5 (Bitfield-Mask: 0x01) */ +#define PORT9_OUT_P6_Pos (6UL) /*!< PORT9 OUT: P6 (Bit 6) */ +#define PORT9_OUT_P6_Msk (0x40UL) /*!< PORT9 OUT: P6 (Bitfield-Mask: 0x01) */ +#define PORT9_OUT_P7_Pos (7UL) /*!< PORT9 OUT: P7 (Bit 7) */ +#define PORT9_OUT_P7_Msk (0x80UL) /*!< PORT9 OUT: P7 (Bitfield-Mask: 0x01) */ +#define PORT9_OUT_P8_Pos (8UL) /*!< PORT9 OUT: P8 (Bit 8) */ +#define PORT9_OUT_P8_Msk (0x100UL) /*!< PORT9 OUT: P8 (Bitfield-Mask: 0x01) */ +#define PORT9_OUT_P9_Pos (9UL) /*!< PORT9 OUT: P9 (Bit 9) */ +#define PORT9_OUT_P9_Msk (0x200UL) /*!< PORT9 OUT: P9 (Bitfield-Mask: 0x01) */ +#define PORT9_OUT_P10_Pos (10UL) /*!< PORT9 OUT: P10 (Bit 10) */ +#define PORT9_OUT_P10_Msk (0x400UL) /*!< PORT9 OUT: P10 (Bitfield-Mask: 0x01) */ +#define PORT9_OUT_P11_Pos (11UL) /*!< PORT9 OUT: P11 (Bit 11) */ +#define PORT9_OUT_P11_Msk (0x800UL) /*!< PORT9 OUT: P11 (Bitfield-Mask: 0x01) */ +#define PORT9_OUT_P12_Pos (12UL) /*!< PORT9 OUT: P12 (Bit 12) */ +#define PORT9_OUT_P12_Msk (0x1000UL) /*!< PORT9 OUT: P12 (Bitfield-Mask: 0x01) */ +#define PORT9_OUT_P13_Pos (13UL) /*!< PORT9 OUT: P13 (Bit 13) */ +#define PORT9_OUT_P13_Msk (0x2000UL) /*!< PORT9 OUT: P13 (Bitfield-Mask: 0x01) */ +#define PORT9_OUT_P14_Pos (14UL) /*!< PORT9 OUT: P14 (Bit 14) */ +#define PORT9_OUT_P14_Msk (0x4000UL) /*!< PORT9 OUT: P14 (Bitfield-Mask: 0x01) */ +#define PORT9_OUT_P15_Pos (15UL) /*!< PORT9 OUT: P15 (Bit 15) */ +#define PORT9_OUT_P15_Msk (0x8000UL) /*!< PORT9 OUT: P15 (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- PORT9_OMR --------------------------------- */ +#define PORT9_OMR_PS0_Pos (0UL) /*!< PORT9 OMR: PS0 (Bit 0) */ +#define PORT9_OMR_PS0_Msk (0x1UL) /*!< PORT9 OMR: PS0 (Bitfield-Mask: 0x01) */ +#define PORT9_OMR_PS1_Pos (1UL) /*!< PORT9 OMR: PS1 (Bit 1) */ +#define PORT9_OMR_PS1_Msk (0x2UL) /*!< PORT9 OMR: PS1 (Bitfield-Mask: 0x01) */ +#define PORT9_OMR_PS2_Pos (2UL) /*!< PORT9 OMR: PS2 (Bit 2) */ +#define PORT9_OMR_PS2_Msk (0x4UL) /*!< PORT9 OMR: PS2 (Bitfield-Mask: 0x01) */ +#define PORT9_OMR_PS3_Pos (3UL) /*!< PORT9 OMR: PS3 (Bit 3) */ +#define PORT9_OMR_PS3_Msk (0x8UL) /*!< PORT9 OMR: PS3 (Bitfield-Mask: 0x01) */ +#define PORT9_OMR_PS4_Pos (4UL) /*!< PORT9 OMR: PS4 (Bit 4) */ +#define PORT9_OMR_PS4_Msk (0x10UL) /*!< PORT9 OMR: PS4 (Bitfield-Mask: 0x01) */ +#define PORT9_OMR_PS5_Pos (5UL) /*!< PORT9 OMR: PS5 (Bit 5) */ +#define PORT9_OMR_PS5_Msk (0x20UL) /*!< PORT9 OMR: PS5 (Bitfield-Mask: 0x01) */ +#define PORT9_OMR_PS6_Pos (6UL) /*!< PORT9 OMR: PS6 (Bit 6) */ +#define PORT9_OMR_PS6_Msk (0x40UL) /*!< PORT9 OMR: PS6 (Bitfield-Mask: 0x01) */ +#define PORT9_OMR_PS7_Pos (7UL) /*!< PORT9 OMR: PS7 (Bit 7) */ +#define PORT9_OMR_PS7_Msk (0x80UL) /*!< PORT9 OMR: PS7 (Bitfield-Mask: 0x01) */ +#define PORT9_OMR_PS8_Pos (8UL) /*!< PORT9 OMR: PS8 (Bit 8) */ +#define PORT9_OMR_PS8_Msk (0x100UL) /*!< PORT9 OMR: PS8 (Bitfield-Mask: 0x01) */ +#define PORT9_OMR_PS9_Pos (9UL) /*!< PORT9 OMR: PS9 (Bit 9) */ +#define PORT9_OMR_PS9_Msk (0x200UL) /*!< PORT9 OMR: PS9 (Bitfield-Mask: 0x01) */ +#define PORT9_OMR_PS10_Pos (10UL) /*!< PORT9 OMR: PS10 (Bit 10) */ +#define PORT9_OMR_PS10_Msk (0x400UL) /*!< PORT9 OMR: PS10 (Bitfield-Mask: 0x01) */ +#define PORT9_OMR_PS11_Pos (11UL) /*!< PORT9 OMR: PS11 (Bit 11) */ +#define PORT9_OMR_PS11_Msk (0x800UL) /*!< PORT9 OMR: PS11 (Bitfield-Mask: 0x01) */ +#define PORT9_OMR_PS12_Pos (12UL) /*!< PORT9 OMR: PS12 (Bit 12) */ +#define PORT9_OMR_PS12_Msk (0x1000UL) /*!< PORT9 OMR: PS12 (Bitfield-Mask: 0x01) */ +#define PORT9_OMR_PS13_Pos (13UL) /*!< PORT9 OMR: PS13 (Bit 13) */ +#define PORT9_OMR_PS13_Msk (0x2000UL) /*!< PORT9 OMR: PS13 (Bitfield-Mask: 0x01) */ +#define PORT9_OMR_PS14_Pos (14UL) /*!< PORT9 OMR: PS14 (Bit 14) */ +#define PORT9_OMR_PS14_Msk (0x4000UL) /*!< PORT9 OMR: PS14 (Bitfield-Mask: 0x01) */ +#define PORT9_OMR_PS15_Pos (15UL) /*!< PORT9 OMR: PS15 (Bit 15) */ +#define PORT9_OMR_PS15_Msk (0x8000UL) /*!< PORT9 OMR: PS15 (Bitfield-Mask: 0x01) */ +#define PORT9_OMR_PR0_Pos (16UL) /*!< PORT9 OMR: PR0 (Bit 16) */ +#define PORT9_OMR_PR0_Msk (0x10000UL) /*!< PORT9 OMR: PR0 (Bitfield-Mask: 0x01) */ +#define PORT9_OMR_PR1_Pos (17UL) /*!< PORT9 OMR: PR1 (Bit 17) */ +#define PORT9_OMR_PR1_Msk (0x20000UL) /*!< PORT9 OMR: PR1 (Bitfield-Mask: 0x01) */ +#define PORT9_OMR_PR2_Pos (18UL) /*!< PORT9 OMR: PR2 (Bit 18) */ +#define PORT9_OMR_PR2_Msk (0x40000UL) /*!< PORT9 OMR: PR2 (Bitfield-Mask: 0x01) */ +#define PORT9_OMR_PR3_Pos (19UL) /*!< PORT9 OMR: PR3 (Bit 19) */ +#define PORT9_OMR_PR3_Msk (0x80000UL) /*!< PORT9 OMR: PR3 (Bitfield-Mask: 0x01) */ +#define PORT9_OMR_PR4_Pos (20UL) /*!< PORT9 OMR: PR4 (Bit 20) */ +#define PORT9_OMR_PR4_Msk (0x100000UL) /*!< PORT9 OMR: PR4 (Bitfield-Mask: 0x01) */ +#define PORT9_OMR_PR5_Pos (21UL) /*!< PORT9 OMR: PR5 (Bit 21) */ +#define PORT9_OMR_PR5_Msk (0x200000UL) /*!< PORT9 OMR: PR5 (Bitfield-Mask: 0x01) */ +#define PORT9_OMR_PR6_Pos (22UL) /*!< PORT9 OMR: PR6 (Bit 22) */ +#define PORT9_OMR_PR6_Msk (0x400000UL) /*!< PORT9 OMR: PR6 (Bitfield-Mask: 0x01) */ +#define PORT9_OMR_PR7_Pos (23UL) /*!< PORT9 OMR: PR7 (Bit 23) */ +#define PORT9_OMR_PR7_Msk (0x800000UL) /*!< PORT9 OMR: PR7 (Bitfield-Mask: 0x01) */ +#define PORT9_OMR_PR8_Pos (24UL) /*!< PORT9 OMR: PR8 (Bit 24) */ +#define PORT9_OMR_PR8_Msk (0x1000000UL) /*!< PORT9 OMR: PR8 (Bitfield-Mask: 0x01) */ +#define PORT9_OMR_PR9_Pos (25UL) /*!< PORT9 OMR: PR9 (Bit 25) */ +#define PORT9_OMR_PR9_Msk (0x2000000UL) /*!< PORT9 OMR: PR9 (Bitfield-Mask: 0x01) */ +#define PORT9_OMR_PR10_Pos (26UL) /*!< PORT9 OMR: PR10 (Bit 26) */ +#define PORT9_OMR_PR10_Msk (0x4000000UL) /*!< PORT9 OMR: PR10 (Bitfield-Mask: 0x01) */ +#define PORT9_OMR_PR11_Pos (27UL) /*!< PORT9 OMR: PR11 (Bit 27) */ +#define PORT9_OMR_PR11_Msk (0x8000000UL) /*!< PORT9 OMR: PR11 (Bitfield-Mask: 0x01) */ +#define PORT9_OMR_PR12_Pos (28UL) /*!< PORT9 OMR: PR12 (Bit 28) */ +#define PORT9_OMR_PR12_Msk (0x10000000UL) /*!< PORT9 OMR: PR12 (Bitfield-Mask: 0x01) */ +#define PORT9_OMR_PR13_Pos (29UL) /*!< PORT9 OMR: PR13 (Bit 29) */ +#define PORT9_OMR_PR13_Msk (0x20000000UL) /*!< PORT9 OMR: PR13 (Bitfield-Mask: 0x01) */ +#define PORT9_OMR_PR14_Pos (30UL) /*!< PORT9 OMR: PR14 (Bit 30) */ +#define PORT9_OMR_PR14_Msk (0x40000000UL) /*!< PORT9 OMR: PR14 (Bitfield-Mask: 0x01) */ +#define PORT9_OMR_PR15_Pos (31UL) /*!< PORT9 OMR: PR15 (Bit 31) */ +#define PORT9_OMR_PR15_Msk (0x80000000UL) /*!< PORT9 OMR: PR15 (Bitfield-Mask: 0x01) */ + +/* --------------------------------- PORT9_IOCR0 -------------------------------- */ +#define PORT9_IOCR0_PC0_Pos (3UL) /*!< PORT9 IOCR0: PC0 (Bit 3) */ +#define PORT9_IOCR0_PC0_Msk (0xf8UL) /*!< PORT9 IOCR0: PC0 (Bitfield-Mask: 0x1f) */ +#define PORT9_IOCR0_PC1_Pos (11UL) /*!< PORT9 IOCR0: PC1 (Bit 11) */ +#define PORT9_IOCR0_PC1_Msk (0xf800UL) /*!< PORT9 IOCR0: PC1 (Bitfield-Mask: 0x1f) */ +#define PORT9_IOCR0_PC2_Pos (19UL) /*!< PORT9 IOCR0: PC2 (Bit 19) */ +#define PORT9_IOCR0_PC2_Msk (0xf80000UL) /*!< PORT9 IOCR0: PC2 (Bitfield-Mask: 0x1f) */ +#define PORT9_IOCR0_PC3_Pos (27UL) /*!< PORT9 IOCR0: PC3 (Bit 27) */ +#define PORT9_IOCR0_PC3_Msk (0xf8000000UL) /*!< PORT9 IOCR0: PC3 (Bitfield-Mask: 0x1f) */ + +/* --------------------------------- PORT9_IOCR4 -------------------------------- */ +#define PORT9_IOCR4_PC4_Pos (3UL) /*!< PORT9 IOCR4: PC4 (Bit 3) */ +#define PORT9_IOCR4_PC4_Msk (0xf8UL) /*!< PORT9 IOCR4: PC4 (Bitfield-Mask: 0x1f) */ +#define PORT9_IOCR4_PC5_Pos (11UL) /*!< PORT9 IOCR4: PC5 (Bit 11) */ +#define PORT9_IOCR4_PC5_Msk (0xf800UL) /*!< PORT9 IOCR4: PC5 (Bitfield-Mask: 0x1f) */ +#define PORT9_IOCR4_PC6_Pos (19UL) /*!< PORT9 IOCR4: PC6 (Bit 19) */ +#define PORT9_IOCR4_PC6_Msk (0xf80000UL) /*!< PORT9 IOCR4: PC6 (Bitfield-Mask: 0x1f) */ +#define PORT9_IOCR4_PC7_Pos (27UL) /*!< PORT9 IOCR4: PC7 (Bit 27) */ +#define PORT9_IOCR4_PC7_Msk (0xf8000000UL) /*!< PORT9 IOCR4: PC7 (Bitfield-Mask: 0x1f) */ + +/* --------------------------------- PORT9_IOCR8 -------------------------------- */ +#define PORT9_IOCR8_PC8_Pos (3UL) /*!< PORT9 IOCR8: PC8 (Bit 3) */ +#define PORT9_IOCR8_PC8_Msk (0xf8UL) /*!< PORT9 IOCR8: PC8 (Bitfield-Mask: 0x1f) */ +#define PORT9_IOCR8_PC9_Pos (11UL) /*!< PORT9 IOCR8: PC9 (Bit 11) */ +#define PORT9_IOCR8_PC9_Msk (0xf800UL) /*!< PORT9 IOCR8: PC9 (Bitfield-Mask: 0x1f) */ +#define PORT9_IOCR8_PC10_Pos (19UL) /*!< PORT9 IOCR8: PC10 (Bit 19) */ +#define PORT9_IOCR8_PC10_Msk (0xf80000UL) /*!< PORT9 IOCR8: PC10 (Bitfield-Mask: 0x1f) */ +#define PORT9_IOCR8_PC11_Pos (27UL) /*!< PORT9 IOCR8: PC11 (Bit 27) */ +#define PORT9_IOCR8_PC11_Msk (0xf8000000UL) /*!< PORT9 IOCR8: PC11 (Bitfield-Mask: 0x1f) */ + +/* ---------------------------------- PORT9_IN ---------------------------------- */ +#define PORT9_IN_P0_Pos (0UL) /*!< PORT9 IN: P0 (Bit 0) */ +#define PORT9_IN_P0_Msk (0x1UL) /*!< PORT9 IN: P0 (Bitfield-Mask: 0x01) */ +#define PORT9_IN_P1_Pos (1UL) /*!< PORT9 IN: P1 (Bit 1) */ +#define PORT9_IN_P1_Msk (0x2UL) /*!< PORT9 IN: P1 (Bitfield-Mask: 0x01) */ +#define PORT9_IN_P2_Pos (2UL) /*!< PORT9 IN: P2 (Bit 2) */ +#define PORT9_IN_P2_Msk (0x4UL) /*!< PORT9 IN: P2 (Bitfield-Mask: 0x01) */ +#define PORT9_IN_P3_Pos (3UL) /*!< PORT9 IN: P3 (Bit 3) */ +#define PORT9_IN_P3_Msk (0x8UL) /*!< PORT9 IN: P3 (Bitfield-Mask: 0x01) */ +#define PORT9_IN_P4_Pos (4UL) /*!< PORT9 IN: P4 (Bit 4) */ +#define PORT9_IN_P4_Msk (0x10UL) /*!< PORT9 IN: P4 (Bitfield-Mask: 0x01) */ +#define PORT9_IN_P5_Pos (5UL) /*!< PORT9 IN: P5 (Bit 5) */ +#define PORT9_IN_P5_Msk (0x20UL) /*!< PORT9 IN: P5 (Bitfield-Mask: 0x01) */ +#define PORT9_IN_P6_Pos (6UL) /*!< PORT9 IN: P6 (Bit 6) */ +#define PORT9_IN_P6_Msk (0x40UL) /*!< PORT9 IN: P6 (Bitfield-Mask: 0x01) */ +#define PORT9_IN_P7_Pos (7UL) /*!< PORT9 IN: P7 (Bit 7) */ +#define PORT9_IN_P7_Msk (0x80UL) /*!< PORT9 IN: P7 (Bitfield-Mask: 0x01) */ +#define PORT9_IN_P8_Pos (8UL) /*!< PORT9 IN: P8 (Bit 8) */ +#define PORT9_IN_P8_Msk (0x100UL) /*!< PORT9 IN: P8 (Bitfield-Mask: 0x01) */ +#define PORT9_IN_P9_Pos (9UL) /*!< PORT9 IN: P9 (Bit 9) */ +#define PORT9_IN_P9_Msk (0x200UL) /*!< PORT9 IN: P9 (Bitfield-Mask: 0x01) */ +#define PORT9_IN_P10_Pos (10UL) /*!< PORT9 IN: P10 (Bit 10) */ +#define PORT9_IN_P10_Msk (0x400UL) /*!< PORT9 IN: P10 (Bitfield-Mask: 0x01) */ +#define PORT9_IN_P11_Pos (11UL) /*!< PORT9 IN: P11 (Bit 11) */ +#define PORT9_IN_P11_Msk (0x800UL) /*!< PORT9 IN: P11 (Bitfield-Mask: 0x01) */ +#define PORT9_IN_P12_Pos (12UL) /*!< PORT9 IN: P12 (Bit 12) */ +#define PORT9_IN_P12_Msk (0x1000UL) /*!< PORT9 IN: P12 (Bitfield-Mask: 0x01) */ +#define PORT9_IN_P13_Pos (13UL) /*!< PORT9 IN: P13 (Bit 13) */ +#define PORT9_IN_P13_Msk (0x2000UL) /*!< PORT9 IN: P13 (Bitfield-Mask: 0x01) */ +#define PORT9_IN_P14_Pos (14UL) /*!< PORT9 IN: P14 (Bit 14) */ +#define PORT9_IN_P14_Msk (0x4000UL) /*!< PORT9 IN: P14 (Bitfield-Mask: 0x01) */ +#define PORT9_IN_P15_Pos (15UL) /*!< PORT9 IN: P15 (Bit 15) */ +#define PORT9_IN_P15_Msk (0x8000UL) /*!< PORT9 IN: P15 (Bitfield-Mask: 0x01) */ + +/* --------------------------------- PORT9_PDR0 --------------------------------- */ +#define PORT9_PDR0_PD0_Pos (0UL) /*!< PORT9 PDR0: PD0 (Bit 0) */ +#define PORT9_PDR0_PD0_Msk (0x7UL) /*!< PORT9 PDR0: PD0 (Bitfield-Mask: 0x07) */ +#define PORT9_PDR0_PD1_Pos (4UL) /*!< PORT9 PDR0: PD1 (Bit 4) */ +#define PORT9_PDR0_PD1_Msk (0x70UL) /*!< PORT9 PDR0: PD1 (Bitfield-Mask: 0x07) */ +#define PORT9_PDR0_PD2_Pos (8UL) /*!< PORT9 PDR0: PD2 (Bit 8) */ +#define PORT9_PDR0_PD2_Msk (0x700UL) /*!< PORT9 PDR0: PD2 (Bitfield-Mask: 0x07) */ +#define PORT9_PDR0_PD3_Pos (12UL) /*!< PORT9 PDR0: PD3 (Bit 12) */ +#define PORT9_PDR0_PD3_Msk (0x7000UL) /*!< PORT9 PDR0: PD3 (Bitfield-Mask: 0x07) */ +#define PORT9_PDR0_PD4_Pos (16UL) /*!< PORT9 PDR0: PD4 (Bit 16) */ +#define PORT9_PDR0_PD4_Msk (0x70000UL) /*!< PORT9 PDR0: PD4 (Bitfield-Mask: 0x07) */ +#define PORT9_PDR0_PD5_Pos (20UL) /*!< PORT9 PDR0: PD5 (Bit 20) */ +#define PORT9_PDR0_PD5_Msk (0x700000UL) /*!< PORT9 PDR0: PD5 (Bitfield-Mask: 0x07) */ +#define PORT9_PDR0_PD6_Pos (24UL) /*!< PORT9 PDR0: PD6 (Bit 24) */ +#define PORT9_PDR0_PD6_Msk (0x7000000UL) /*!< PORT9 PDR0: PD6 (Bitfield-Mask: 0x07) */ +#define PORT9_PDR0_PD7_Pos (28UL) /*!< PORT9 PDR0: PD7 (Bit 28) */ +#define PORT9_PDR0_PD7_Msk (0x70000000UL) /*!< PORT9 PDR0: PD7 (Bitfield-Mask: 0x07) */ + +/* --------------------------------- PORT9_PDR1 --------------------------------- */ +#define PORT9_PDR1_PD8_Pos (0UL) /*!< PORT9 PDR1: PD8 (Bit 0) */ +#define PORT9_PDR1_PD8_Msk (0x7UL) /*!< PORT9 PDR1: PD8 (Bitfield-Mask: 0x07) */ +#define PORT9_PDR1_PD9_Pos (4UL) /*!< PORT9 PDR1: PD9 (Bit 4) */ +#define PORT9_PDR1_PD9_Msk (0x70UL) /*!< PORT9 PDR1: PD9 (Bitfield-Mask: 0x07) */ +#define PORT9_PDR1_PD10_Pos (8UL) /*!< PORT9 PDR1: PD10 (Bit 8) */ +#define PORT9_PDR1_PD10_Msk (0x700UL) /*!< PORT9 PDR1: PD10 (Bitfield-Mask: 0x07) */ +#define PORT9_PDR1_PD11_Pos (12UL) /*!< PORT9 PDR1: PD11 (Bit 12) */ +#define PORT9_PDR1_PD11_Msk (0x7000UL) /*!< PORT9 PDR1: PD11 (Bitfield-Mask: 0x07) */ +#define PORT9_PDR1_PD12_Pos (16UL) /*!< PORT9 PDR1: PD12 (Bit 16) */ +#define PORT9_PDR1_PD12_Msk (0x70000UL) /*!< PORT9 PDR1: PD12 (Bitfield-Mask: 0x07) */ +#define PORT9_PDR1_PD13_Pos (20UL) /*!< PORT9 PDR1: PD13 (Bit 20) */ +#define PORT9_PDR1_PD13_Msk (0x700000UL) /*!< PORT9 PDR1: PD13 (Bitfield-Mask: 0x07) */ +#define PORT9_PDR1_PD14_Pos (24UL) /*!< PORT9 PDR1: PD14 (Bit 24) */ +#define PORT9_PDR1_PD14_Msk (0x7000000UL) /*!< PORT9 PDR1: PD14 (Bitfield-Mask: 0x07) */ +#define PORT9_PDR1_PD15_Pos (28UL) /*!< PORT9 PDR1: PD15 (Bit 28) */ +#define PORT9_PDR1_PD15_Msk (0x70000000UL) /*!< PORT9 PDR1: PD15 (Bitfield-Mask: 0x07) */ + +/* --------------------------------- PORT9_PDISC -------------------------------- */ +#define PORT9_PDISC_PDIS0_Pos (0UL) /*!< PORT9 PDISC: PDIS0 (Bit 0) */ +#define PORT9_PDISC_PDIS0_Msk (0x1UL) /*!< PORT9 PDISC: PDIS0 (Bitfield-Mask: 0x01) */ +#define PORT9_PDISC_PDIS1_Pos (1UL) /*!< PORT9 PDISC: PDIS1 (Bit 1) */ +#define PORT9_PDISC_PDIS1_Msk (0x2UL) /*!< PORT9 PDISC: PDIS1 (Bitfield-Mask: 0x01) */ +#define PORT9_PDISC_PDIS2_Pos (2UL) /*!< PORT9 PDISC: PDIS2 (Bit 2) */ +#define PORT9_PDISC_PDIS2_Msk (0x4UL) /*!< PORT9 PDISC: PDIS2 (Bitfield-Mask: 0x01) */ +#define PORT9_PDISC_PDIS3_Pos (3UL) /*!< PORT9 PDISC: PDIS3 (Bit 3) */ +#define PORT9_PDISC_PDIS3_Msk (0x8UL) /*!< PORT9 PDISC: PDIS3 (Bitfield-Mask: 0x01) */ +#define PORT9_PDISC_PDIS4_Pos (4UL) /*!< PORT9 PDISC: PDIS4 (Bit 4) */ +#define PORT9_PDISC_PDIS4_Msk (0x10UL) /*!< PORT9 PDISC: PDIS4 (Bitfield-Mask: 0x01) */ +#define PORT9_PDISC_PDIS5_Pos (5UL) /*!< PORT9 PDISC: PDIS5 (Bit 5) */ +#define PORT9_PDISC_PDIS5_Msk (0x20UL) /*!< PORT9 PDISC: PDIS5 (Bitfield-Mask: 0x01) */ +#define PORT9_PDISC_PDIS6_Pos (6UL) /*!< PORT9 PDISC: PDIS6 (Bit 6) */ +#define PORT9_PDISC_PDIS6_Msk (0x40UL) /*!< PORT9 PDISC: PDIS6 (Bitfield-Mask: 0x01) */ +#define PORT9_PDISC_PDIS7_Pos (7UL) /*!< PORT9 PDISC: PDIS7 (Bit 7) */ +#define PORT9_PDISC_PDIS7_Msk (0x80UL) /*!< PORT9 PDISC: PDIS7 (Bitfield-Mask: 0x01) */ +#define PORT9_PDISC_PDIS8_Pos (8UL) /*!< PORT9 PDISC: PDIS8 (Bit 8) */ +#define PORT9_PDISC_PDIS8_Msk (0x100UL) /*!< PORT9 PDISC: PDIS8 (Bitfield-Mask: 0x01) */ +#define PORT9_PDISC_PDIS9_Pos (9UL) /*!< PORT9 PDISC: PDIS9 (Bit 9) */ +#define PORT9_PDISC_PDIS9_Msk (0x200UL) /*!< PORT9 PDISC: PDIS9 (Bitfield-Mask: 0x01) */ +#define PORT9_PDISC_PDIS10_Pos (10UL) /*!< PORT9 PDISC: PDIS10 (Bit 10) */ +#define PORT9_PDISC_PDIS10_Msk (0x400UL) /*!< PORT9 PDISC: PDIS10 (Bitfield-Mask: 0x01) */ +#define PORT9_PDISC_PDIS11_Pos (11UL) /*!< PORT9 PDISC: PDIS11 (Bit 11) */ +#define PORT9_PDISC_PDIS11_Msk (0x800UL) /*!< PORT9 PDISC: PDIS11 (Bitfield-Mask: 0x01) */ +#define PORT9_PDISC_PDIS12_Pos (12UL) /*!< PORT9 PDISC: PDIS12 (Bit 12) */ +#define PORT9_PDISC_PDIS12_Msk (0x1000UL) /*!< PORT9 PDISC: PDIS12 (Bitfield-Mask: 0x01) */ +#define PORT9_PDISC_PDIS13_Pos (13UL) /*!< PORT9 PDISC: PDIS13 (Bit 13) */ +#define PORT9_PDISC_PDIS13_Msk (0x2000UL) /*!< PORT9 PDISC: PDIS13 (Bitfield-Mask: 0x01) */ +#define PORT9_PDISC_PDIS14_Pos (14UL) /*!< PORT9 PDISC: PDIS14 (Bit 14) */ +#define PORT9_PDISC_PDIS14_Msk (0x4000UL) /*!< PORT9 PDISC: PDIS14 (Bitfield-Mask: 0x01) */ +#define PORT9_PDISC_PDIS15_Pos (15UL) /*!< PORT9 PDISC: PDIS15 (Bit 15) */ +#define PORT9_PDISC_PDIS15_Msk (0x8000UL) /*!< PORT9 PDISC: PDIS15 (Bitfield-Mask: 0x01) */ + +/* ---------------------------------- PORT9_PPS --------------------------------- */ +#define PORT9_PPS_PPS0_Pos (0UL) /*!< PORT9 PPS: PPS0 (Bit 0) */ +#define PORT9_PPS_PPS0_Msk (0x1UL) /*!< PORT9 PPS: PPS0 (Bitfield-Mask: 0x01) */ +#define PORT9_PPS_PPS1_Pos (1UL) /*!< PORT9 PPS: PPS1 (Bit 1) */ +#define PORT9_PPS_PPS1_Msk (0x2UL) /*!< PORT9 PPS: PPS1 (Bitfield-Mask: 0x01) */ +#define PORT9_PPS_PPS2_Pos (2UL) /*!< PORT9 PPS: PPS2 (Bit 2) */ +#define PORT9_PPS_PPS2_Msk (0x4UL) /*!< PORT9 PPS: PPS2 (Bitfield-Mask: 0x01) */ +#define PORT9_PPS_PPS3_Pos (3UL) /*!< PORT9 PPS: PPS3 (Bit 3) */ +#define PORT9_PPS_PPS3_Msk (0x8UL) /*!< PORT9 PPS: PPS3 (Bitfield-Mask: 0x01) */ +#define PORT9_PPS_PPS4_Pos (4UL) /*!< PORT9 PPS: PPS4 (Bit 4) */ +#define PORT9_PPS_PPS4_Msk (0x10UL) /*!< PORT9 PPS: PPS4 (Bitfield-Mask: 0x01) */ +#define PORT9_PPS_PPS5_Pos (5UL) /*!< PORT9 PPS: PPS5 (Bit 5) */ +#define PORT9_PPS_PPS5_Msk (0x20UL) /*!< PORT9 PPS: PPS5 (Bitfield-Mask: 0x01) */ +#define PORT9_PPS_PPS6_Pos (6UL) /*!< PORT9 PPS: PPS6 (Bit 6) */ +#define PORT9_PPS_PPS6_Msk (0x40UL) /*!< PORT9 PPS: PPS6 (Bitfield-Mask: 0x01) */ +#define PORT9_PPS_PPS7_Pos (7UL) /*!< PORT9 PPS: PPS7 (Bit 7) */ +#define PORT9_PPS_PPS7_Msk (0x80UL) /*!< PORT9 PPS: PPS7 (Bitfield-Mask: 0x01) */ +#define PORT9_PPS_PPS8_Pos (8UL) /*!< PORT9 PPS: PPS8 (Bit 8) */ +#define PORT9_PPS_PPS8_Msk (0x100UL) /*!< PORT9 PPS: PPS8 (Bitfield-Mask: 0x01) */ +#define PORT9_PPS_PPS9_Pos (9UL) /*!< PORT9 PPS: PPS9 (Bit 9) */ +#define PORT9_PPS_PPS9_Msk (0x200UL) /*!< PORT9 PPS: PPS9 (Bitfield-Mask: 0x01) */ +#define PORT9_PPS_PPS10_Pos (10UL) /*!< PORT9 PPS: PPS10 (Bit 10) */ +#define PORT9_PPS_PPS10_Msk (0x400UL) /*!< PORT9 PPS: PPS10 (Bitfield-Mask: 0x01) */ +#define PORT9_PPS_PPS11_Pos (11UL) /*!< PORT9 PPS: PPS11 (Bit 11) */ +#define PORT9_PPS_PPS11_Msk (0x800UL) /*!< PORT9 PPS: PPS11 (Bitfield-Mask: 0x01) */ +#define PORT9_PPS_PPS12_Pos (12UL) /*!< PORT9 PPS: PPS12 (Bit 12) */ +#define PORT9_PPS_PPS12_Msk (0x1000UL) /*!< PORT9 PPS: PPS12 (Bitfield-Mask: 0x01) */ +#define PORT9_PPS_PPS13_Pos (13UL) /*!< PORT9 PPS: PPS13 (Bit 13) */ +#define PORT9_PPS_PPS13_Msk (0x2000UL) /*!< PORT9 PPS: PPS13 (Bitfield-Mask: 0x01) */ +#define PORT9_PPS_PPS14_Pos (14UL) /*!< PORT9 PPS: PPS14 (Bit 14) */ +#define PORT9_PPS_PPS14_Msk (0x4000UL) /*!< PORT9 PPS: PPS14 (Bitfield-Mask: 0x01) */ +#define PORT9_PPS_PPS15_Pos (15UL) /*!< PORT9 PPS: PPS15 (Bit 15) */ +#define PORT9_PPS_PPS15_Msk (0x8000UL) /*!< PORT9 PPS: PPS15 (Bitfield-Mask: 0x01) */ + +/* --------------------------------- PORT9_HWSEL -------------------------------- */ +#define PORT9_HWSEL_HW0_Pos (0UL) /*!< PORT9 HWSEL: HW0 (Bit 0) */ +#define PORT9_HWSEL_HW0_Msk (0x3UL) /*!< PORT9 HWSEL: HW0 (Bitfield-Mask: 0x03) */ +#define PORT9_HWSEL_HW1_Pos (2UL) /*!< PORT9 HWSEL: HW1 (Bit 2) */ +#define PORT9_HWSEL_HW1_Msk (0xcUL) /*!< PORT9 HWSEL: HW1 (Bitfield-Mask: 0x03) */ +#define PORT9_HWSEL_HW2_Pos (4UL) /*!< PORT9 HWSEL: HW2 (Bit 4) */ +#define PORT9_HWSEL_HW2_Msk (0x30UL) /*!< PORT9 HWSEL: HW2 (Bitfield-Mask: 0x03) */ +#define PORT9_HWSEL_HW3_Pos (6UL) /*!< PORT9 HWSEL: HW3 (Bit 6) */ +#define PORT9_HWSEL_HW3_Msk (0xc0UL) /*!< PORT9 HWSEL: HW3 (Bitfield-Mask: 0x03) */ +#define PORT9_HWSEL_HW4_Pos (8UL) /*!< PORT9 HWSEL: HW4 (Bit 8) */ +#define PORT9_HWSEL_HW4_Msk (0x300UL) /*!< PORT9 HWSEL: HW4 (Bitfield-Mask: 0x03) */ +#define PORT9_HWSEL_HW5_Pos (10UL) /*!< PORT9 HWSEL: HW5 (Bit 10) */ +#define PORT9_HWSEL_HW5_Msk (0xc00UL) /*!< PORT9 HWSEL: HW5 (Bitfield-Mask: 0x03) */ +#define PORT9_HWSEL_HW6_Pos (12UL) /*!< PORT9 HWSEL: HW6 (Bit 12) */ +#define PORT9_HWSEL_HW6_Msk (0x3000UL) /*!< PORT9 HWSEL: HW6 (Bitfield-Mask: 0x03) */ +#define PORT9_HWSEL_HW7_Pos (14UL) /*!< PORT9 HWSEL: HW7 (Bit 14) */ +#define PORT9_HWSEL_HW7_Msk (0xc000UL) /*!< PORT9 HWSEL: HW7 (Bitfield-Mask: 0x03) */ +#define PORT9_HWSEL_HW8_Pos (16UL) /*!< PORT9 HWSEL: HW8 (Bit 16) */ +#define PORT9_HWSEL_HW8_Msk (0x30000UL) /*!< PORT9 HWSEL: HW8 (Bitfield-Mask: 0x03) */ +#define PORT9_HWSEL_HW9_Pos (18UL) /*!< PORT9 HWSEL: HW9 (Bit 18) */ +#define PORT9_HWSEL_HW9_Msk (0xc0000UL) /*!< PORT9 HWSEL: HW9 (Bitfield-Mask: 0x03) */ +#define PORT9_HWSEL_HW10_Pos (20UL) /*!< PORT9 HWSEL: HW10 (Bit 20) */ +#define PORT9_HWSEL_HW10_Msk (0x300000UL) /*!< PORT9 HWSEL: HW10 (Bitfield-Mask: 0x03) */ +#define PORT9_HWSEL_HW11_Pos (22UL) /*!< PORT9 HWSEL: HW11 (Bit 22) */ +#define PORT9_HWSEL_HW11_Msk (0xc00000UL) /*!< PORT9 HWSEL: HW11 (Bitfield-Mask: 0x03) */ +#define PORT9_HWSEL_HW12_Pos (24UL) /*!< PORT9 HWSEL: HW12 (Bit 24) */ +#define PORT9_HWSEL_HW12_Msk (0x3000000UL) /*!< PORT9 HWSEL: HW12 (Bitfield-Mask: 0x03) */ +#define PORT9_HWSEL_HW13_Pos (26UL) /*!< PORT9 HWSEL: HW13 (Bit 26) */ +#define PORT9_HWSEL_HW13_Msk (0xc000000UL) /*!< PORT9 HWSEL: HW13 (Bitfield-Mask: 0x03) */ +#define PORT9_HWSEL_HW14_Pos (28UL) /*!< PORT9 HWSEL: HW14 (Bit 28) */ +#define PORT9_HWSEL_HW14_Msk (0x30000000UL) /*!< PORT9 HWSEL: HW14 (Bitfield-Mask: 0x03) */ +#define PORT9_HWSEL_HW15_Pos (30UL) /*!< PORT9 HWSEL: HW15 (Bit 30) */ +#define PORT9_HWSEL_HW15_Msk (0xc0000000UL) /*!< PORT9 HWSEL: HW15 (Bitfield-Mask: 0x03) */ + + +/* ================================================================================ */ +/* ================ struct 'PORT14' Position & Mask ================ */ +/* ================================================================================ */ + + +/* --------------------------------- PORT14_OUT --------------------------------- */ +#define PORT14_OUT_P0_Pos (0UL) /*!< PORT14 OUT: P0 (Bit 0) */ +#define PORT14_OUT_P0_Msk (0x1UL) /*!< PORT14 OUT: P0 (Bitfield-Mask: 0x01) */ +#define PORT14_OUT_P1_Pos (1UL) /*!< PORT14 OUT: P1 (Bit 1) */ +#define PORT14_OUT_P1_Msk (0x2UL) /*!< PORT14 OUT: P1 (Bitfield-Mask: 0x01) */ +#define PORT14_OUT_P2_Pos (2UL) /*!< PORT14 OUT: P2 (Bit 2) */ +#define PORT14_OUT_P2_Msk (0x4UL) /*!< PORT14 OUT: P2 (Bitfield-Mask: 0x01) */ +#define PORT14_OUT_P3_Pos (3UL) /*!< PORT14 OUT: P3 (Bit 3) */ +#define PORT14_OUT_P3_Msk (0x8UL) /*!< PORT14 OUT: P3 (Bitfield-Mask: 0x01) */ +#define PORT14_OUT_P4_Pos (4UL) /*!< PORT14 OUT: P4 (Bit 4) */ +#define PORT14_OUT_P4_Msk (0x10UL) /*!< PORT14 OUT: P4 (Bitfield-Mask: 0x01) */ +#define PORT14_OUT_P5_Pos (5UL) /*!< PORT14 OUT: P5 (Bit 5) */ +#define PORT14_OUT_P5_Msk (0x20UL) /*!< PORT14 OUT: P5 (Bitfield-Mask: 0x01) */ +#define PORT14_OUT_P6_Pos (6UL) /*!< PORT14 OUT: P6 (Bit 6) */ +#define PORT14_OUT_P6_Msk (0x40UL) /*!< PORT14 OUT: P6 (Bitfield-Mask: 0x01) */ +#define PORT14_OUT_P7_Pos (7UL) /*!< PORT14 OUT: P7 (Bit 7) */ +#define PORT14_OUT_P7_Msk (0x80UL) /*!< PORT14 OUT: P7 (Bitfield-Mask: 0x01) */ +#define PORT14_OUT_P8_Pos (8UL) /*!< PORT14 OUT: P8 (Bit 8) */ +#define PORT14_OUT_P8_Msk (0x100UL) /*!< PORT14 OUT: P8 (Bitfield-Mask: 0x01) */ +#define PORT14_OUT_P9_Pos (9UL) /*!< PORT14 OUT: P9 (Bit 9) */ +#define PORT14_OUT_P9_Msk (0x200UL) /*!< PORT14 OUT: P9 (Bitfield-Mask: 0x01) */ +#define PORT14_OUT_P10_Pos (10UL) /*!< PORT14 OUT: P10 (Bit 10) */ +#define PORT14_OUT_P10_Msk (0x400UL) /*!< PORT14 OUT: P10 (Bitfield-Mask: 0x01) */ +#define PORT14_OUT_P11_Pos (11UL) /*!< PORT14 OUT: P11 (Bit 11) */ +#define PORT14_OUT_P11_Msk (0x800UL) /*!< PORT14 OUT: P11 (Bitfield-Mask: 0x01) */ +#define PORT14_OUT_P12_Pos (12UL) /*!< PORT14 OUT: P12 (Bit 12) */ +#define PORT14_OUT_P12_Msk (0x1000UL) /*!< PORT14 OUT: P12 (Bitfield-Mask: 0x01) */ +#define PORT14_OUT_P13_Pos (13UL) /*!< PORT14 OUT: P13 (Bit 13) */ +#define PORT14_OUT_P13_Msk (0x2000UL) /*!< PORT14 OUT: P13 (Bitfield-Mask: 0x01) */ +#define PORT14_OUT_P14_Pos (14UL) /*!< PORT14 OUT: P14 (Bit 14) */ +#define PORT14_OUT_P14_Msk (0x4000UL) /*!< PORT14 OUT: P14 (Bitfield-Mask: 0x01) */ +#define PORT14_OUT_P15_Pos (15UL) /*!< PORT14 OUT: P15 (Bit 15) */ +#define PORT14_OUT_P15_Msk (0x8000UL) /*!< PORT14 OUT: P15 (Bitfield-Mask: 0x01) */ + +/* --------------------------------- PORT14_OMR --------------------------------- */ +#define PORT14_OMR_PS0_Pos (0UL) /*!< PORT14 OMR: PS0 (Bit 0) */ +#define PORT14_OMR_PS0_Msk (0x1UL) /*!< PORT14 OMR: PS0 (Bitfield-Mask: 0x01) */ +#define PORT14_OMR_PS1_Pos (1UL) /*!< PORT14 OMR: PS1 (Bit 1) */ +#define PORT14_OMR_PS1_Msk (0x2UL) /*!< PORT14 OMR: PS1 (Bitfield-Mask: 0x01) */ +#define PORT14_OMR_PS2_Pos (2UL) /*!< PORT14 OMR: PS2 (Bit 2) */ +#define PORT14_OMR_PS2_Msk (0x4UL) /*!< PORT14 OMR: PS2 (Bitfield-Mask: 0x01) */ +#define PORT14_OMR_PS3_Pos (3UL) /*!< PORT14 OMR: PS3 (Bit 3) */ +#define PORT14_OMR_PS3_Msk (0x8UL) /*!< PORT14 OMR: PS3 (Bitfield-Mask: 0x01) */ +#define PORT14_OMR_PS4_Pos (4UL) /*!< PORT14 OMR: PS4 (Bit 4) */ +#define PORT14_OMR_PS4_Msk (0x10UL) /*!< PORT14 OMR: PS4 (Bitfield-Mask: 0x01) */ +#define PORT14_OMR_PS5_Pos (5UL) /*!< PORT14 OMR: PS5 (Bit 5) */ +#define PORT14_OMR_PS5_Msk (0x20UL) /*!< PORT14 OMR: PS5 (Bitfield-Mask: 0x01) */ +#define PORT14_OMR_PS6_Pos (6UL) /*!< PORT14 OMR: PS6 (Bit 6) */ +#define PORT14_OMR_PS6_Msk (0x40UL) /*!< PORT14 OMR: PS6 (Bitfield-Mask: 0x01) */ +#define PORT14_OMR_PS7_Pos (7UL) /*!< PORT14 OMR: PS7 (Bit 7) */ +#define PORT14_OMR_PS7_Msk (0x80UL) /*!< PORT14 OMR: PS7 (Bitfield-Mask: 0x01) */ +#define PORT14_OMR_PS8_Pos (8UL) /*!< PORT14 OMR: PS8 (Bit 8) */ +#define PORT14_OMR_PS8_Msk (0x100UL) /*!< PORT14 OMR: PS8 (Bitfield-Mask: 0x01) */ +#define PORT14_OMR_PS9_Pos (9UL) /*!< PORT14 OMR: PS9 (Bit 9) */ +#define PORT14_OMR_PS9_Msk (0x200UL) /*!< PORT14 OMR: PS9 (Bitfield-Mask: 0x01) */ +#define PORT14_OMR_PS10_Pos (10UL) /*!< PORT14 OMR: PS10 (Bit 10) */ +#define PORT14_OMR_PS10_Msk (0x400UL) /*!< PORT14 OMR: PS10 (Bitfield-Mask: 0x01) */ +#define PORT14_OMR_PS11_Pos (11UL) /*!< PORT14 OMR: PS11 (Bit 11) */ +#define PORT14_OMR_PS11_Msk (0x800UL) /*!< PORT14 OMR: PS11 (Bitfield-Mask: 0x01) */ +#define PORT14_OMR_PS12_Pos (12UL) /*!< PORT14 OMR: PS12 (Bit 12) */ +#define PORT14_OMR_PS12_Msk (0x1000UL) /*!< PORT14 OMR: PS12 (Bitfield-Mask: 0x01) */ +#define PORT14_OMR_PS13_Pos (13UL) /*!< PORT14 OMR: PS13 (Bit 13) */ +#define PORT14_OMR_PS13_Msk (0x2000UL) /*!< PORT14 OMR: PS13 (Bitfield-Mask: 0x01) */ +#define PORT14_OMR_PS14_Pos (14UL) /*!< PORT14 OMR: PS14 (Bit 14) */ +#define PORT14_OMR_PS14_Msk (0x4000UL) /*!< PORT14 OMR: PS14 (Bitfield-Mask: 0x01) */ +#define PORT14_OMR_PS15_Pos (15UL) /*!< PORT14 OMR: PS15 (Bit 15) */ +#define PORT14_OMR_PS15_Msk (0x8000UL) /*!< PORT14 OMR: PS15 (Bitfield-Mask: 0x01) */ +#define PORT14_OMR_PR0_Pos (16UL) /*!< PORT14 OMR: PR0 (Bit 16) */ +#define PORT14_OMR_PR0_Msk (0x10000UL) /*!< PORT14 OMR: PR0 (Bitfield-Mask: 0x01) */ +#define PORT14_OMR_PR1_Pos (17UL) /*!< PORT14 OMR: PR1 (Bit 17) */ +#define PORT14_OMR_PR1_Msk (0x20000UL) /*!< PORT14 OMR: PR1 (Bitfield-Mask: 0x01) */ +#define PORT14_OMR_PR2_Pos (18UL) /*!< PORT14 OMR: PR2 (Bit 18) */ +#define PORT14_OMR_PR2_Msk (0x40000UL) /*!< PORT14 OMR: PR2 (Bitfield-Mask: 0x01) */ +#define PORT14_OMR_PR3_Pos (19UL) /*!< PORT14 OMR: PR3 (Bit 19) */ +#define PORT14_OMR_PR3_Msk (0x80000UL) /*!< PORT14 OMR: PR3 (Bitfield-Mask: 0x01) */ +#define PORT14_OMR_PR4_Pos (20UL) /*!< PORT14 OMR: PR4 (Bit 20) */ +#define PORT14_OMR_PR4_Msk (0x100000UL) /*!< PORT14 OMR: PR4 (Bitfield-Mask: 0x01) */ +#define PORT14_OMR_PR5_Pos (21UL) /*!< PORT14 OMR: PR5 (Bit 21) */ +#define PORT14_OMR_PR5_Msk (0x200000UL) /*!< PORT14 OMR: PR5 (Bitfield-Mask: 0x01) */ +#define PORT14_OMR_PR6_Pos (22UL) /*!< PORT14 OMR: PR6 (Bit 22) */ +#define PORT14_OMR_PR6_Msk (0x400000UL) /*!< PORT14 OMR: PR6 (Bitfield-Mask: 0x01) */ +#define PORT14_OMR_PR7_Pos (23UL) /*!< PORT14 OMR: PR7 (Bit 23) */ +#define PORT14_OMR_PR7_Msk (0x800000UL) /*!< PORT14 OMR: PR7 (Bitfield-Mask: 0x01) */ +#define PORT14_OMR_PR8_Pos (24UL) /*!< PORT14 OMR: PR8 (Bit 24) */ +#define PORT14_OMR_PR8_Msk (0x1000000UL) /*!< PORT14 OMR: PR8 (Bitfield-Mask: 0x01) */ +#define PORT14_OMR_PR9_Pos (25UL) /*!< PORT14 OMR: PR9 (Bit 25) */ +#define PORT14_OMR_PR9_Msk (0x2000000UL) /*!< PORT14 OMR: PR9 (Bitfield-Mask: 0x01) */ +#define PORT14_OMR_PR10_Pos (26UL) /*!< PORT14 OMR: PR10 (Bit 26) */ +#define PORT14_OMR_PR10_Msk (0x4000000UL) /*!< PORT14 OMR: PR10 (Bitfield-Mask: 0x01) */ +#define PORT14_OMR_PR11_Pos (27UL) /*!< PORT14 OMR: PR11 (Bit 27) */ +#define PORT14_OMR_PR11_Msk (0x8000000UL) /*!< PORT14 OMR: PR11 (Bitfield-Mask: 0x01) */ +#define PORT14_OMR_PR12_Pos (28UL) /*!< PORT14 OMR: PR12 (Bit 28) */ +#define PORT14_OMR_PR12_Msk (0x10000000UL) /*!< PORT14 OMR: PR12 (Bitfield-Mask: 0x01) */ +#define PORT14_OMR_PR13_Pos (29UL) /*!< PORT14 OMR: PR13 (Bit 29) */ +#define PORT14_OMR_PR13_Msk (0x20000000UL) /*!< PORT14 OMR: PR13 (Bitfield-Mask: 0x01) */ +#define PORT14_OMR_PR14_Pos (30UL) /*!< PORT14 OMR: PR14 (Bit 30) */ +#define PORT14_OMR_PR14_Msk (0x40000000UL) /*!< PORT14 OMR: PR14 (Bitfield-Mask: 0x01) */ +#define PORT14_OMR_PR15_Pos (31UL) /*!< PORT14 OMR: PR15 (Bit 31) */ +#define PORT14_OMR_PR15_Msk (0x80000000UL) /*!< PORT14 OMR: PR15 (Bitfield-Mask: 0x01) */ + +/* -------------------------------- PORT14_IOCR0 -------------------------------- */ +#define PORT14_IOCR0_PC0_Pos (3UL) /*!< PORT14 IOCR0: PC0 (Bit 3) */ +#define PORT14_IOCR0_PC0_Msk (0xf8UL) /*!< PORT14 IOCR0: PC0 (Bitfield-Mask: 0x1f) */ +#define PORT14_IOCR0_PC1_Pos (11UL) /*!< PORT14 IOCR0: PC1 (Bit 11) */ +#define PORT14_IOCR0_PC1_Msk (0xf800UL) /*!< PORT14 IOCR0: PC1 (Bitfield-Mask: 0x1f) */ +#define PORT14_IOCR0_PC2_Pos (19UL) /*!< PORT14 IOCR0: PC2 (Bit 19) */ +#define PORT14_IOCR0_PC2_Msk (0xf80000UL) /*!< PORT14 IOCR0: PC2 (Bitfield-Mask: 0x1f) */ +#define PORT14_IOCR0_PC3_Pos (27UL) /*!< PORT14 IOCR0: PC3 (Bit 27) */ +#define PORT14_IOCR0_PC3_Msk (0xf8000000UL) /*!< PORT14 IOCR0: PC3 (Bitfield-Mask: 0x1f) */ + +/* -------------------------------- PORT14_IOCR4 -------------------------------- */ +#define PORT14_IOCR4_PC4_Pos (3UL) /*!< PORT14 IOCR4: PC4 (Bit 3) */ +#define PORT14_IOCR4_PC4_Msk (0xf8UL) /*!< PORT14 IOCR4: PC4 (Bitfield-Mask: 0x1f) */ +#define PORT14_IOCR4_PC5_Pos (11UL) /*!< PORT14 IOCR4: PC5 (Bit 11) */ +#define PORT14_IOCR4_PC5_Msk (0xf800UL) /*!< PORT14 IOCR4: PC5 (Bitfield-Mask: 0x1f) */ +#define PORT14_IOCR4_PC6_Pos (19UL) /*!< PORT14 IOCR4: PC6 (Bit 19) */ +#define PORT14_IOCR4_PC6_Msk (0xf80000UL) /*!< PORT14 IOCR4: PC6 (Bitfield-Mask: 0x1f) */ +#define PORT14_IOCR4_PC7_Pos (27UL) /*!< PORT14 IOCR4: PC7 (Bit 27) */ +#define PORT14_IOCR4_PC7_Msk (0xf8000000UL) /*!< PORT14 IOCR4: PC7 (Bitfield-Mask: 0x1f) */ + +/* -------------------------------- PORT14_IOCR8 -------------------------------- */ +#define PORT14_IOCR8_PC8_Pos (3UL) /*!< PORT14 IOCR8: PC8 (Bit 3) */ +#define PORT14_IOCR8_PC8_Msk (0xf8UL) /*!< PORT14 IOCR8: PC8 (Bitfield-Mask: 0x1f) */ +#define PORT14_IOCR8_PC9_Pos (11UL) /*!< PORT14 IOCR8: PC9 (Bit 11) */ +#define PORT14_IOCR8_PC9_Msk (0xf800UL) /*!< PORT14 IOCR8: PC9 (Bitfield-Mask: 0x1f) */ +#define PORT14_IOCR8_PC10_Pos (19UL) /*!< PORT14 IOCR8: PC10 (Bit 19) */ +#define PORT14_IOCR8_PC10_Msk (0xf80000UL) /*!< PORT14 IOCR8: PC10 (Bitfield-Mask: 0x1f) */ +#define PORT14_IOCR8_PC11_Pos (27UL) /*!< PORT14 IOCR8: PC11 (Bit 27) */ +#define PORT14_IOCR8_PC11_Msk (0xf8000000UL) /*!< PORT14 IOCR8: PC11 (Bitfield-Mask: 0x1f) */ + +/* -------------------------------- PORT14_IOCR12 ------------------------------- */ +#define PORT14_IOCR12_PC12_Pos (3UL) /*!< PORT14 IOCR12: PC12 (Bit 3) */ +#define PORT14_IOCR12_PC12_Msk (0xf8UL) /*!< PORT14 IOCR12: PC12 (Bitfield-Mask: 0x1f) */ +#define PORT14_IOCR12_PC13_Pos (11UL) /*!< PORT14 IOCR12: PC13 (Bit 11) */ +#define PORT14_IOCR12_PC13_Msk (0xf800UL) /*!< PORT14 IOCR12: PC13 (Bitfield-Mask: 0x1f) */ +#define PORT14_IOCR12_PC14_Pos (19UL) /*!< PORT14 IOCR12: PC14 (Bit 19) */ +#define PORT14_IOCR12_PC14_Msk (0xf80000UL) /*!< PORT14 IOCR12: PC14 (Bitfield-Mask: 0x1f) */ +#define PORT14_IOCR12_PC15_Pos (27UL) /*!< PORT14 IOCR12: PC15 (Bit 27) */ +#define PORT14_IOCR12_PC15_Msk (0xf8000000UL) /*!< PORT14 IOCR12: PC15 (Bitfield-Mask: 0x1f) */ + +/* ---------------------------------- PORT14_IN --------------------------------- */ +#define PORT14_IN_P0_Pos (0UL) /*!< PORT14 IN: P0 (Bit 0) */ +#define PORT14_IN_P0_Msk (0x1UL) /*!< PORT14 IN: P0 (Bitfield-Mask: 0x01) */ +#define PORT14_IN_P1_Pos (1UL) /*!< PORT14 IN: P1 (Bit 1) */ +#define PORT14_IN_P1_Msk (0x2UL) /*!< PORT14 IN: P1 (Bitfield-Mask: 0x01) */ +#define PORT14_IN_P2_Pos (2UL) /*!< PORT14 IN: P2 (Bit 2) */ +#define PORT14_IN_P2_Msk (0x4UL) /*!< PORT14 IN: P2 (Bitfield-Mask: 0x01) */ +#define PORT14_IN_P3_Pos (3UL) /*!< PORT14 IN: P3 (Bit 3) */ +#define PORT14_IN_P3_Msk (0x8UL) /*!< PORT14 IN: P3 (Bitfield-Mask: 0x01) */ +#define PORT14_IN_P4_Pos (4UL) /*!< PORT14 IN: P4 (Bit 4) */ +#define PORT14_IN_P4_Msk (0x10UL) /*!< PORT14 IN: P4 (Bitfield-Mask: 0x01) */ +#define PORT14_IN_P5_Pos (5UL) /*!< PORT14 IN: P5 (Bit 5) */ +#define PORT14_IN_P5_Msk (0x20UL) /*!< PORT14 IN: P5 (Bitfield-Mask: 0x01) */ +#define PORT14_IN_P6_Pos (6UL) /*!< PORT14 IN: P6 (Bit 6) */ +#define PORT14_IN_P6_Msk (0x40UL) /*!< PORT14 IN: P6 (Bitfield-Mask: 0x01) */ +#define PORT14_IN_P7_Pos (7UL) /*!< PORT14 IN: P7 (Bit 7) */ +#define PORT14_IN_P7_Msk (0x80UL) /*!< PORT14 IN: P7 (Bitfield-Mask: 0x01) */ +#define PORT14_IN_P8_Pos (8UL) /*!< PORT14 IN: P8 (Bit 8) */ +#define PORT14_IN_P8_Msk (0x100UL) /*!< PORT14 IN: P8 (Bitfield-Mask: 0x01) */ +#define PORT14_IN_P9_Pos (9UL) /*!< PORT14 IN: P9 (Bit 9) */ +#define PORT14_IN_P9_Msk (0x200UL) /*!< PORT14 IN: P9 (Bitfield-Mask: 0x01) */ +#define PORT14_IN_P10_Pos (10UL) /*!< PORT14 IN: P10 (Bit 10) */ +#define PORT14_IN_P10_Msk (0x400UL) /*!< PORT14 IN: P10 (Bitfield-Mask: 0x01) */ +#define PORT14_IN_P11_Pos (11UL) /*!< PORT14 IN: P11 (Bit 11) */ +#define PORT14_IN_P11_Msk (0x800UL) /*!< PORT14 IN: P11 (Bitfield-Mask: 0x01) */ +#define PORT14_IN_P12_Pos (12UL) /*!< PORT14 IN: P12 (Bit 12) */ +#define PORT14_IN_P12_Msk (0x1000UL) /*!< PORT14 IN: P12 (Bitfield-Mask: 0x01) */ +#define PORT14_IN_P13_Pos (13UL) /*!< PORT14 IN: P13 (Bit 13) */ +#define PORT14_IN_P13_Msk (0x2000UL) /*!< PORT14 IN: P13 (Bitfield-Mask: 0x01) */ +#define PORT14_IN_P14_Pos (14UL) /*!< PORT14 IN: P14 (Bit 14) */ +#define PORT14_IN_P14_Msk (0x4000UL) /*!< PORT14 IN: P14 (Bitfield-Mask: 0x01) */ +#define PORT14_IN_P15_Pos (15UL) /*!< PORT14 IN: P15 (Bit 15) */ +#define PORT14_IN_P15_Msk (0x8000UL) /*!< PORT14 IN: P15 (Bitfield-Mask: 0x01) */ + +/* -------------------------------- PORT14_PDISC -------------------------------- */ +#define PORT14_PDISC_PDIS0_Pos (0UL) /*!< PORT14 PDISC: PDIS0 (Bit 0) */ +#define PORT14_PDISC_PDIS0_Msk (0x1UL) /*!< PORT14 PDISC: PDIS0 (Bitfield-Mask: 0x01) */ +#define PORT14_PDISC_PDIS1_Pos (1UL) /*!< PORT14 PDISC: PDIS1 (Bit 1) */ +#define PORT14_PDISC_PDIS1_Msk (0x2UL) /*!< PORT14 PDISC: PDIS1 (Bitfield-Mask: 0x01) */ +#define PORT14_PDISC_PDIS2_Pos (2UL) /*!< PORT14 PDISC: PDIS2 (Bit 2) */ +#define PORT14_PDISC_PDIS2_Msk (0x4UL) /*!< PORT14 PDISC: PDIS2 (Bitfield-Mask: 0x01) */ +#define PORT14_PDISC_PDIS3_Pos (3UL) /*!< PORT14 PDISC: PDIS3 (Bit 3) */ +#define PORT14_PDISC_PDIS3_Msk (0x8UL) /*!< PORT14 PDISC: PDIS3 (Bitfield-Mask: 0x01) */ +#define PORT14_PDISC_PDIS4_Pos (4UL) /*!< PORT14 PDISC: PDIS4 (Bit 4) */ +#define PORT14_PDISC_PDIS4_Msk (0x10UL) /*!< PORT14 PDISC: PDIS4 (Bitfield-Mask: 0x01) */ +#define PORT14_PDISC_PDIS5_Pos (5UL) /*!< PORT14 PDISC: PDIS5 (Bit 5) */ +#define PORT14_PDISC_PDIS5_Msk (0x20UL) /*!< PORT14 PDISC: PDIS5 (Bitfield-Mask: 0x01) */ +#define PORT14_PDISC_PDIS6_Pos (6UL) /*!< PORT14 PDISC: PDIS6 (Bit 6) */ +#define PORT14_PDISC_PDIS6_Msk (0x40UL) /*!< PORT14 PDISC: PDIS6 (Bitfield-Mask: 0x01) */ +#define PORT14_PDISC_PDIS7_Pos (7UL) /*!< PORT14 PDISC: PDIS7 (Bit 7) */ +#define PORT14_PDISC_PDIS7_Msk (0x80UL) /*!< PORT14 PDISC: PDIS7 (Bitfield-Mask: 0x01) */ +#define PORT14_PDISC_PDIS8_Pos (8UL) /*!< PORT14 PDISC: PDIS8 (Bit 8) */ +#define PORT14_PDISC_PDIS8_Msk (0x100UL) /*!< PORT14 PDISC: PDIS8 (Bitfield-Mask: 0x01) */ +#define PORT14_PDISC_PDIS9_Pos (9UL) /*!< PORT14 PDISC: PDIS9 (Bit 9) */ +#define PORT14_PDISC_PDIS9_Msk (0x200UL) /*!< PORT14 PDISC: PDIS9 (Bitfield-Mask: 0x01) */ +#define PORT14_PDISC_PDIS12_Pos (12UL) /*!< PORT14 PDISC: PDIS12 (Bit 12) */ +#define PORT14_PDISC_PDIS12_Msk (0x1000UL) /*!< PORT14 PDISC: PDIS12 (Bitfield-Mask: 0x01) */ +#define PORT14_PDISC_PDIS13_Pos (13UL) /*!< PORT14 PDISC: PDIS13 (Bit 13) */ +#define PORT14_PDISC_PDIS13_Msk (0x2000UL) /*!< PORT14 PDISC: PDIS13 (Bitfield-Mask: 0x01) */ +#define PORT14_PDISC_PDIS14_Pos (14UL) /*!< PORT14 PDISC: PDIS14 (Bit 14) */ +#define PORT14_PDISC_PDIS14_Msk (0x4000UL) /*!< PORT14 PDISC: PDIS14 (Bitfield-Mask: 0x01) */ +#define PORT14_PDISC_PDIS15_Pos (15UL) /*!< PORT14 PDISC: PDIS15 (Bit 15) */ +#define PORT14_PDISC_PDIS15_Msk (0x8000UL) /*!< PORT14 PDISC: PDIS15 (Bitfield-Mask: 0x01) */ + +/* --------------------------------- PORT14_PPS --------------------------------- */ +#define PORT14_PPS_PPS0_Pos (0UL) /*!< PORT14 PPS: PPS0 (Bit 0) */ +#define PORT14_PPS_PPS0_Msk (0x1UL) /*!< PORT14 PPS: PPS0 (Bitfield-Mask: 0x01) */ +#define PORT14_PPS_PPS1_Pos (1UL) /*!< PORT14 PPS: PPS1 (Bit 1) */ +#define PORT14_PPS_PPS1_Msk (0x2UL) /*!< PORT14 PPS: PPS1 (Bitfield-Mask: 0x01) */ +#define PORT14_PPS_PPS2_Pos (2UL) /*!< PORT14 PPS: PPS2 (Bit 2) */ +#define PORT14_PPS_PPS2_Msk (0x4UL) /*!< PORT14 PPS: PPS2 (Bitfield-Mask: 0x01) */ +#define PORT14_PPS_PPS3_Pos (3UL) /*!< PORT14 PPS: PPS3 (Bit 3) */ +#define PORT14_PPS_PPS3_Msk (0x8UL) /*!< PORT14 PPS: PPS3 (Bitfield-Mask: 0x01) */ +#define PORT14_PPS_PPS4_Pos (4UL) /*!< PORT14 PPS: PPS4 (Bit 4) */ +#define PORT14_PPS_PPS4_Msk (0x10UL) /*!< PORT14 PPS: PPS4 (Bitfield-Mask: 0x01) */ +#define PORT14_PPS_PPS5_Pos (5UL) /*!< PORT14 PPS: PPS5 (Bit 5) */ +#define PORT14_PPS_PPS5_Msk (0x20UL) /*!< PORT14 PPS: PPS5 (Bitfield-Mask: 0x01) */ +#define PORT14_PPS_PPS6_Pos (6UL) /*!< PORT14 PPS: PPS6 (Bit 6) */ +#define PORT14_PPS_PPS6_Msk (0x40UL) /*!< PORT14 PPS: PPS6 (Bitfield-Mask: 0x01) */ +#define PORT14_PPS_PPS7_Pos (7UL) /*!< PORT14 PPS: PPS7 (Bit 7) */ +#define PORT14_PPS_PPS7_Msk (0x80UL) /*!< PORT14 PPS: PPS7 (Bitfield-Mask: 0x01) */ +#define PORT14_PPS_PPS8_Pos (8UL) /*!< PORT14 PPS: PPS8 (Bit 8) */ +#define PORT14_PPS_PPS8_Msk (0x100UL) /*!< PORT14 PPS: PPS8 (Bitfield-Mask: 0x01) */ +#define PORT14_PPS_PPS9_Pos (9UL) /*!< PORT14 PPS: PPS9 (Bit 9) */ +#define PORT14_PPS_PPS9_Msk (0x200UL) /*!< PORT14 PPS: PPS9 (Bitfield-Mask: 0x01) */ +#define PORT14_PPS_PPS10_Pos (10UL) /*!< PORT14 PPS: PPS10 (Bit 10) */ +#define PORT14_PPS_PPS10_Msk (0x400UL) /*!< PORT14 PPS: PPS10 (Bitfield-Mask: 0x01) */ +#define PORT14_PPS_PPS11_Pos (11UL) /*!< PORT14 PPS: PPS11 (Bit 11) */ +#define PORT14_PPS_PPS11_Msk (0x800UL) /*!< PORT14 PPS: PPS11 (Bitfield-Mask: 0x01) */ +#define PORT14_PPS_PPS12_Pos (12UL) /*!< PORT14 PPS: PPS12 (Bit 12) */ +#define PORT14_PPS_PPS12_Msk (0x1000UL) /*!< PORT14 PPS: PPS12 (Bitfield-Mask: 0x01) */ +#define PORT14_PPS_PPS13_Pos (13UL) /*!< PORT14 PPS: PPS13 (Bit 13) */ +#define PORT14_PPS_PPS13_Msk (0x2000UL) /*!< PORT14 PPS: PPS13 (Bitfield-Mask: 0x01) */ +#define PORT14_PPS_PPS14_Pos (14UL) /*!< PORT14 PPS: PPS14 (Bit 14) */ +#define PORT14_PPS_PPS14_Msk (0x4000UL) /*!< PORT14 PPS: PPS14 (Bitfield-Mask: 0x01) */ +#define PORT14_PPS_PPS15_Pos (15UL) /*!< PORT14 PPS: PPS15 (Bit 15) */ +#define PORT14_PPS_PPS15_Msk (0x8000UL) /*!< PORT14 PPS: PPS15 (Bitfield-Mask: 0x01) */ + +/* -------------------------------- PORT14_HWSEL -------------------------------- */ +#define PORT14_HWSEL_HW0_Pos (0UL) /*!< PORT14 HWSEL: HW0 (Bit 0) */ +#define PORT14_HWSEL_HW0_Msk (0x3UL) /*!< PORT14 HWSEL: HW0 (Bitfield-Mask: 0x03) */ +#define PORT14_HWSEL_HW1_Pos (2UL) /*!< PORT14 HWSEL: HW1 (Bit 2) */ +#define PORT14_HWSEL_HW1_Msk (0xcUL) /*!< PORT14 HWSEL: HW1 (Bitfield-Mask: 0x03) */ +#define PORT14_HWSEL_HW2_Pos (4UL) /*!< PORT14 HWSEL: HW2 (Bit 4) */ +#define PORT14_HWSEL_HW2_Msk (0x30UL) /*!< PORT14 HWSEL: HW2 (Bitfield-Mask: 0x03) */ +#define PORT14_HWSEL_HW3_Pos (6UL) /*!< PORT14 HWSEL: HW3 (Bit 6) */ +#define PORT14_HWSEL_HW3_Msk (0xc0UL) /*!< PORT14 HWSEL: HW3 (Bitfield-Mask: 0x03) */ +#define PORT14_HWSEL_HW4_Pos (8UL) /*!< PORT14 HWSEL: HW4 (Bit 8) */ +#define PORT14_HWSEL_HW4_Msk (0x300UL) /*!< PORT14 HWSEL: HW4 (Bitfield-Mask: 0x03) */ +#define PORT14_HWSEL_HW5_Pos (10UL) /*!< PORT14 HWSEL: HW5 (Bit 10) */ +#define PORT14_HWSEL_HW5_Msk (0xc00UL) /*!< PORT14 HWSEL: HW5 (Bitfield-Mask: 0x03) */ +#define PORT14_HWSEL_HW6_Pos (12UL) /*!< PORT14 HWSEL: HW6 (Bit 12) */ +#define PORT14_HWSEL_HW6_Msk (0x3000UL) /*!< PORT14 HWSEL: HW6 (Bitfield-Mask: 0x03) */ +#define PORT14_HWSEL_HW7_Pos (14UL) /*!< PORT14 HWSEL: HW7 (Bit 14) */ +#define PORT14_HWSEL_HW7_Msk (0xc000UL) /*!< PORT14 HWSEL: HW7 (Bitfield-Mask: 0x03) */ +#define PORT14_HWSEL_HW8_Pos (16UL) /*!< PORT14 HWSEL: HW8 (Bit 16) */ +#define PORT14_HWSEL_HW8_Msk (0x30000UL) /*!< PORT14 HWSEL: HW8 (Bitfield-Mask: 0x03) */ +#define PORT14_HWSEL_HW9_Pos (18UL) /*!< PORT14 HWSEL: HW9 (Bit 18) */ +#define PORT14_HWSEL_HW9_Msk (0xc0000UL) /*!< PORT14 HWSEL: HW9 (Bitfield-Mask: 0x03) */ +#define PORT14_HWSEL_HW10_Pos (20UL) /*!< PORT14 HWSEL: HW10 (Bit 20) */ +#define PORT14_HWSEL_HW10_Msk (0x300000UL) /*!< PORT14 HWSEL: HW10 (Bitfield-Mask: 0x03) */ +#define PORT14_HWSEL_HW11_Pos (22UL) /*!< PORT14 HWSEL: HW11 (Bit 22) */ +#define PORT14_HWSEL_HW11_Msk (0xc00000UL) /*!< PORT14 HWSEL: HW11 (Bitfield-Mask: 0x03) */ +#define PORT14_HWSEL_HW12_Pos (24UL) /*!< PORT14 HWSEL: HW12 (Bit 24) */ +#define PORT14_HWSEL_HW12_Msk (0x3000000UL) /*!< PORT14 HWSEL: HW12 (Bitfield-Mask: 0x03) */ +#define PORT14_HWSEL_HW13_Pos (26UL) /*!< PORT14 HWSEL: HW13 (Bit 26) */ +#define PORT14_HWSEL_HW13_Msk (0xc000000UL) /*!< PORT14 HWSEL: HW13 (Bitfield-Mask: 0x03) */ +#define PORT14_HWSEL_HW14_Pos (28UL) /*!< PORT14 HWSEL: HW14 (Bit 28) */ +#define PORT14_HWSEL_HW14_Msk (0x30000000UL) /*!< PORT14 HWSEL: HW14 (Bitfield-Mask: 0x03) */ +#define PORT14_HWSEL_HW15_Pos (30UL) /*!< PORT14 HWSEL: HW15 (Bit 30) */ +#define PORT14_HWSEL_HW15_Msk (0xc0000000UL) /*!< PORT14 HWSEL: HW15 (Bitfield-Mask: 0x03) */ + + +/* ================================================================================ */ +/* ================ struct 'PORT15' Position & Mask ================ */ +/* ================================================================================ */ + + +/* --------------------------------- PORT15_OUT --------------------------------- */ +#define PORT15_OUT_P0_Pos (0UL) /*!< PORT15 OUT: P0 (Bit 0) */ +#define PORT15_OUT_P0_Msk (0x1UL) /*!< PORT15 OUT: P0 (Bitfield-Mask: 0x01) */ +#define PORT15_OUT_P1_Pos (1UL) /*!< PORT15 OUT: P1 (Bit 1) */ +#define PORT15_OUT_P1_Msk (0x2UL) /*!< PORT15 OUT: P1 (Bitfield-Mask: 0x01) */ +#define PORT15_OUT_P2_Pos (2UL) /*!< PORT15 OUT: P2 (Bit 2) */ +#define PORT15_OUT_P2_Msk (0x4UL) /*!< PORT15 OUT: P2 (Bitfield-Mask: 0x01) */ +#define PORT15_OUT_P3_Pos (3UL) /*!< PORT15 OUT: P3 (Bit 3) */ +#define PORT15_OUT_P3_Msk (0x8UL) /*!< PORT15 OUT: P3 (Bitfield-Mask: 0x01) */ +#define PORT15_OUT_P4_Pos (4UL) /*!< PORT15 OUT: P4 (Bit 4) */ +#define PORT15_OUT_P4_Msk (0x10UL) /*!< PORT15 OUT: P4 (Bitfield-Mask: 0x01) */ +#define PORT15_OUT_P5_Pos (5UL) /*!< PORT15 OUT: P5 (Bit 5) */ +#define PORT15_OUT_P5_Msk (0x20UL) /*!< PORT15 OUT: P5 (Bitfield-Mask: 0x01) */ +#define PORT15_OUT_P6_Pos (6UL) /*!< PORT15 OUT: P6 (Bit 6) */ +#define PORT15_OUT_P6_Msk (0x40UL) /*!< PORT15 OUT: P6 (Bitfield-Mask: 0x01) */ +#define PORT15_OUT_P7_Pos (7UL) /*!< PORT15 OUT: P7 (Bit 7) */ +#define PORT15_OUT_P7_Msk (0x80UL) /*!< PORT15 OUT: P7 (Bitfield-Mask: 0x01) */ +#define PORT15_OUT_P8_Pos (8UL) /*!< PORT15 OUT: P8 (Bit 8) */ +#define PORT15_OUT_P8_Msk (0x100UL) /*!< PORT15 OUT: P8 (Bitfield-Mask: 0x01) */ +#define PORT15_OUT_P9_Pos (9UL) /*!< PORT15 OUT: P9 (Bit 9) */ +#define PORT15_OUT_P9_Msk (0x200UL) /*!< PORT15 OUT: P9 (Bitfield-Mask: 0x01) */ +#define PORT15_OUT_P10_Pos (10UL) /*!< PORT15 OUT: P10 (Bit 10) */ +#define PORT15_OUT_P10_Msk (0x400UL) /*!< PORT15 OUT: P10 (Bitfield-Mask: 0x01) */ +#define PORT15_OUT_P11_Pos (11UL) /*!< PORT15 OUT: P11 (Bit 11) */ +#define PORT15_OUT_P11_Msk (0x800UL) /*!< PORT15 OUT: P11 (Bitfield-Mask: 0x01) */ +#define PORT15_OUT_P12_Pos (12UL) /*!< PORT15 OUT: P12 (Bit 12) */ +#define PORT15_OUT_P12_Msk (0x1000UL) /*!< PORT15 OUT: P12 (Bitfield-Mask: 0x01) */ +#define PORT15_OUT_P13_Pos (13UL) /*!< PORT15 OUT: P13 (Bit 13) */ +#define PORT15_OUT_P13_Msk (0x2000UL) /*!< PORT15 OUT: P13 (Bitfield-Mask: 0x01) */ +#define PORT15_OUT_P14_Pos (14UL) /*!< PORT15 OUT: P14 (Bit 14) */ +#define PORT15_OUT_P14_Msk (0x4000UL) /*!< PORT15 OUT: P14 (Bitfield-Mask: 0x01) */ +#define PORT15_OUT_P15_Pos (15UL) /*!< PORT15 OUT: P15 (Bit 15) */ +#define PORT15_OUT_P15_Msk (0x8000UL) /*!< PORT15 OUT: P15 (Bitfield-Mask: 0x01) */ + +/* --------------------------------- PORT15_OMR --------------------------------- */ +#define PORT15_OMR_PS0_Pos (0UL) /*!< PORT15 OMR: PS0 (Bit 0) */ +#define PORT15_OMR_PS0_Msk (0x1UL) /*!< PORT15 OMR: PS0 (Bitfield-Mask: 0x01) */ +#define PORT15_OMR_PS1_Pos (1UL) /*!< PORT15 OMR: PS1 (Bit 1) */ +#define PORT15_OMR_PS1_Msk (0x2UL) /*!< PORT15 OMR: PS1 (Bitfield-Mask: 0x01) */ +#define PORT15_OMR_PS2_Pos (2UL) /*!< PORT15 OMR: PS2 (Bit 2) */ +#define PORT15_OMR_PS2_Msk (0x4UL) /*!< PORT15 OMR: PS2 (Bitfield-Mask: 0x01) */ +#define PORT15_OMR_PS3_Pos (3UL) /*!< PORT15 OMR: PS3 (Bit 3) */ +#define PORT15_OMR_PS3_Msk (0x8UL) /*!< PORT15 OMR: PS3 (Bitfield-Mask: 0x01) */ +#define PORT15_OMR_PS4_Pos (4UL) /*!< PORT15 OMR: PS4 (Bit 4) */ +#define PORT15_OMR_PS4_Msk (0x10UL) /*!< PORT15 OMR: PS4 (Bitfield-Mask: 0x01) */ +#define PORT15_OMR_PS5_Pos (5UL) /*!< PORT15 OMR: PS5 (Bit 5) */ +#define PORT15_OMR_PS5_Msk (0x20UL) /*!< PORT15 OMR: PS5 (Bitfield-Mask: 0x01) */ +#define PORT15_OMR_PS6_Pos (6UL) /*!< PORT15 OMR: PS6 (Bit 6) */ +#define PORT15_OMR_PS6_Msk (0x40UL) /*!< PORT15 OMR: PS6 (Bitfield-Mask: 0x01) */ +#define PORT15_OMR_PS7_Pos (7UL) /*!< PORT15 OMR: PS7 (Bit 7) */ +#define PORT15_OMR_PS7_Msk (0x80UL) /*!< PORT15 OMR: PS7 (Bitfield-Mask: 0x01) */ +#define PORT15_OMR_PS8_Pos (8UL) /*!< PORT15 OMR: PS8 (Bit 8) */ +#define PORT15_OMR_PS8_Msk (0x100UL) /*!< PORT15 OMR: PS8 (Bitfield-Mask: 0x01) */ +#define PORT15_OMR_PS9_Pos (9UL) /*!< PORT15 OMR: PS9 (Bit 9) */ +#define PORT15_OMR_PS9_Msk (0x200UL) /*!< PORT15 OMR: PS9 (Bitfield-Mask: 0x01) */ +#define PORT15_OMR_PS10_Pos (10UL) /*!< PORT15 OMR: PS10 (Bit 10) */ +#define PORT15_OMR_PS10_Msk (0x400UL) /*!< PORT15 OMR: PS10 (Bitfield-Mask: 0x01) */ +#define PORT15_OMR_PS11_Pos (11UL) /*!< PORT15 OMR: PS11 (Bit 11) */ +#define PORT15_OMR_PS11_Msk (0x800UL) /*!< PORT15 OMR: PS11 (Bitfield-Mask: 0x01) */ +#define PORT15_OMR_PS12_Pos (12UL) /*!< PORT15 OMR: PS12 (Bit 12) */ +#define PORT15_OMR_PS12_Msk (0x1000UL) /*!< PORT15 OMR: PS12 (Bitfield-Mask: 0x01) */ +#define PORT15_OMR_PS13_Pos (13UL) /*!< PORT15 OMR: PS13 (Bit 13) */ +#define PORT15_OMR_PS13_Msk (0x2000UL) /*!< PORT15 OMR: PS13 (Bitfield-Mask: 0x01) */ +#define PORT15_OMR_PS14_Pos (14UL) /*!< PORT15 OMR: PS14 (Bit 14) */ +#define PORT15_OMR_PS14_Msk (0x4000UL) /*!< PORT15 OMR: PS14 (Bitfield-Mask: 0x01) */ +#define PORT15_OMR_PS15_Pos (15UL) /*!< PORT15 OMR: PS15 (Bit 15) */ +#define PORT15_OMR_PS15_Msk (0x8000UL) /*!< PORT15 OMR: PS15 (Bitfield-Mask: 0x01) */ +#define PORT15_OMR_PR0_Pos (16UL) /*!< PORT15 OMR: PR0 (Bit 16) */ +#define PORT15_OMR_PR0_Msk (0x10000UL) /*!< PORT15 OMR: PR0 (Bitfield-Mask: 0x01) */ +#define PORT15_OMR_PR1_Pos (17UL) /*!< PORT15 OMR: PR1 (Bit 17) */ +#define PORT15_OMR_PR1_Msk (0x20000UL) /*!< PORT15 OMR: PR1 (Bitfield-Mask: 0x01) */ +#define PORT15_OMR_PR2_Pos (18UL) /*!< PORT15 OMR: PR2 (Bit 18) */ +#define PORT15_OMR_PR2_Msk (0x40000UL) /*!< PORT15 OMR: PR2 (Bitfield-Mask: 0x01) */ +#define PORT15_OMR_PR3_Pos (19UL) /*!< PORT15 OMR: PR3 (Bit 19) */ +#define PORT15_OMR_PR3_Msk (0x80000UL) /*!< PORT15 OMR: PR3 (Bitfield-Mask: 0x01) */ +#define PORT15_OMR_PR4_Pos (20UL) /*!< PORT15 OMR: PR4 (Bit 20) */ +#define PORT15_OMR_PR4_Msk (0x100000UL) /*!< PORT15 OMR: PR4 (Bitfield-Mask: 0x01) */ +#define PORT15_OMR_PR5_Pos (21UL) /*!< PORT15 OMR: PR5 (Bit 21) */ +#define PORT15_OMR_PR5_Msk (0x200000UL) /*!< PORT15 OMR: PR5 (Bitfield-Mask: 0x01) */ +#define PORT15_OMR_PR6_Pos (22UL) /*!< PORT15 OMR: PR6 (Bit 22) */ +#define PORT15_OMR_PR6_Msk (0x400000UL) /*!< PORT15 OMR: PR6 (Bitfield-Mask: 0x01) */ +#define PORT15_OMR_PR7_Pos (23UL) /*!< PORT15 OMR: PR7 (Bit 23) */ +#define PORT15_OMR_PR7_Msk (0x800000UL) /*!< PORT15 OMR: PR7 (Bitfield-Mask: 0x01) */ +#define PORT15_OMR_PR8_Pos (24UL) /*!< PORT15 OMR: PR8 (Bit 24) */ +#define PORT15_OMR_PR8_Msk (0x1000000UL) /*!< PORT15 OMR: PR8 (Bitfield-Mask: 0x01) */ +#define PORT15_OMR_PR9_Pos (25UL) /*!< PORT15 OMR: PR9 (Bit 25) */ +#define PORT15_OMR_PR9_Msk (0x2000000UL) /*!< PORT15 OMR: PR9 (Bitfield-Mask: 0x01) */ +#define PORT15_OMR_PR10_Pos (26UL) /*!< PORT15 OMR: PR10 (Bit 26) */ +#define PORT15_OMR_PR10_Msk (0x4000000UL) /*!< PORT15 OMR: PR10 (Bitfield-Mask: 0x01) */ +#define PORT15_OMR_PR11_Pos (27UL) /*!< PORT15 OMR: PR11 (Bit 27) */ +#define PORT15_OMR_PR11_Msk (0x8000000UL) /*!< PORT15 OMR: PR11 (Bitfield-Mask: 0x01) */ +#define PORT15_OMR_PR12_Pos (28UL) /*!< PORT15 OMR: PR12 (Bit 28) */ +#define PORT15_OMR_PR12_Msk (0x10000000UL) /*!< PORT15 OMR: PR12 (Bitfield-Mask: 0x01) */ +#define PORT15_OMR_PR13_Pos (29UL) /*!< PORT15 OMR: PR13 (Bit 29) */ +#define PORT15_OMR_PR13_Msk (0x20000000UL) /*!< PORT15 OMR: PR13 (Bitfield-Mask: 0x01) */ +#define PORT15_OMR_PR14_Pos (30UL) /*!< PORT15 OMR: PR14 (Bit 30) */ +#define PORT15_OMR_PR14_Msk (0x40000000UL) /*!< PORT15 OMR: PR14 (Bitfield-Mask: 0x01) */ +#define PORT15_OMR_PR15_Pos (31UL) /*!< PORT15 OMR: PR15 (Bit 31) */ +#define PORT15_OMR_PR15_Msk (0x80000000UL) /*!< PORT15 OMR: PR15 (Bitfield-Mask: 0x01) */ + +/* -------------------------------- PORT15_IOCR0 -------------------------------- */ +#define PORT15_IOCR0_PC0_Pos (3UL) /*!< PORT15 IOCR0: PC0 (Bit 3) */ +#define PORT15_IOCR0_PC0_Msk (0xf8UL) /*!< PORT15 IOCR0: PC0 (Bitfield-Mask: 0x1f) */ +#define PORT15_IOCR0_PC1_Pos (11UL) /*!< PORT15 IOCR0: PC1 (Bit 11) */ +#define PORT15_IOCR0_PC1_Msk (0xf800UL) /*!< PORT15 IOCR0: PC1 (Bitfield-Mask: 0x1f) */ +#define PORT15_IOCR0_PC2_Pos (19UL) /*!< PORT15 IOCR0: PC2 (Bit 19) */ +#define PORT15_IOCR0_PC2_Msk (0xf80000UL) /*!< PORT15 IOCR0: PC2 (Bitfield-Mask: 0x1f) */ +#define PORT15_IOCR0_PC3_Pos (27UL) /*!< PORT15 IOCR0: PC3 (Bit 27) */ +#define PORT15_IOCR0_PC3_Msk (0xf8000000UL) /*!< PORT15 IOCR0: PC3 (Bitfield-Mask: 0x1f) */ + +/* -------------------------------- PORT15_IOCR4 -------------------------------- */ +#define PORT15_IOCR4_PC4_Pos (3UL) /*!< PORT15 IOCR4: PC4 (Bit 3) */ +#define PORT15_IOCR4_PC4_Msk (0xf8UL) /*!< PORT15 IOCR4: PC4 (Bitfield-Mask: 0x1f) */ +#define PORT15_IOCR4_PC5_Pos (11UL) /*!< PORT15 IOCR4: PC5 (Bit 11) */ +#define PORT15_IOCR4_PC5_Msk (0xf800UL) /*!< PORT15 IOCR4: PC5 (Bitfield-Mask: 0x1f) */ +#define PORT15_IOCR4_PC6_Pos (19UL) /*!< PORT15 IOCR4: PC6 (Bit 19) */ +#define PORT15_IOCR4_PC6_Msk (0xf80000UL) /*!< PORT15 IOCR4: PC6 (Bitfield-Mask: 0x1f) */ +#define PORT15_IOCR4_PC7_Pos (27UL) /*!< PORT15 IOCR4: PC7 (Bit 27) */ +#define PORT15_IOCR4_PC7_Msk (0xf8000000UL) /*!< PORT15 IOCR4: PC7 (Bitfield-Mask: 0x1f) */ + +/* -------------------------------- PORT15_IOCR8 -------------------------------- */ +#define PORT15_IOCR8_PC8_Pos (3UL) /*!< PORT15 IOCR8: PC8 (Bit 3) */ +#define PORT15_IOCR8_PC8_Msk (0xf8UL) /*!< PORT15 IOCR8: PC8 (Bitfield-Mask: 0x1f) */ +#define PORT15_IOCR8_PC9_Pos (11UL) /*!< PORT15 IOCR8: PC9 (Bit 11) */ +#define PORT15_IOCR8_PC9_Msk (0xf800UL) /*!< PORT15 IOCR8: PC9 (Bitfield-Mask: 0x1f) */ +#define PORT15_IOCR8_PC10_Pos (19UL) /*!< PORT15 IOCR8: PC10 (Bit 19) */ +#define PORT15_IOCR8_PC10_Msk (0xf80000UL) /*!< PORT15 IOCR8: PC10 (Bitfield-Mask: 0x1f) */ +#define PORT15_IOCR8_PC11_Pos (27UL) /*!< PORT15 IOCR8: PC11 (Bit 27) */ +#define PORT15_IOCR8_PC11_Msk (0xf8000000UL) /*!< PORT15 IOCR8: PC11 (Bitfield-Mask: 0x1f) */ + +/* -------------------------------- PORT15_IOCR12 ------------------------------- */ +#define PORT15_IOCR12_PC12_Pos (3UL) /*!< PORT15 IOCR12: PC12 (Bit 3) */ +#define PORT15_IOCR12_PC12_Msk (0xf8UL) /*!< PORT15 IOCR12: PC12 (Bitfield-Mask: 0x1f) */ +#define PORT15_IOCR12_PC13_Pos (11UL) /*!< PORT15 IOCR12: PC13 (Bit 11) */ +#define PORT15_IOCR12_PC13_Msk (0xf800UL) /*!< PORT15 IOCR12: PC13 (Bitfield-Mask: 0x1f) */ +#define PORT15_IOCR12_PC14_Pos (19UL) /*!< PORT15 IOCR12: PC14 (Bit 19) */ +#define PORT15_IOCR12_PC14_Msk (0xf80000UL) /*!< PORT15 IOCR12: PC14 (Bitfield-Mask: 0x1f) */ +#define PORT15_IOCR12_PC15_Pos (27UL) /*!< PORT15 IOCR12: PC15 (Bit 27) */ +#define PORT15_IOCR12_PC15_Msk (0xf8000000UL) /*!< PORT15 IOCR12: PC15 (Bitfield-Mask: 0x1f) */ + +/* ---------------------------------- PORT15_IN --------------------------------- */ +#define PORT15_IN_P0_Pos (0UL) /*!< PORT15 IN: P0 (Bit 0) */ +#define PORT15_IN_P0_Msk (0x1UL) /*!< PORT15 IN: P0 (Bitfield-Mask: 0x01) */ +#define PORT15_IN_P1_Pos (1UL) /*!< PORT15 IN: P1 (Bit 1) */ +#define PORT15_IN_P1_Msk (0x2UL) /*!< PORT15 IN: P1 (Bitfield-Mask: 0x01) */ +#define PORT15_IN_P2_Pos (2UL) /*!< PORT15 IN: P2 (Bit 2) */ +#define PORT15_IN_P2_Msk (0x4UL) /*!< PORT15 IN: P2 (Bitfield-Mask: 0x01) */ +#define PORT15_IN_P3_Pos (3UL) /*!< PORT15 IN: P3 (Bit 3) */ +#define PORT15_IN_P3_Msk (0x8UL) /*!< PORT15 IN: P3 (Bitfield-Mask: 0x01) */ +#define PORT15_IN_P4_Pos (4UL) /*!< PORT15 IN: P4 (Bit 4) */ +#define PORT15_IN_P4_Msk (0x10UL) /*!< PORT15 IN: P4 (Bitfield-Mask: 0x01) */ +#define PORT15_IN_P5_Pos (5UL) /*!< PORT15 IN: P5 (Bit 5) */ +#define PORT15_IN_P5_Msk (0x20UL) /*!< PORT15 IN: P5 (Bitfield-Mask: 0x01) */ +#define PORT15_IN_P6_Pos (6UL) /*!< PORT15 IN: P6 (Bit 6) */ +#define PORT15_IN_P6_Msk (0x40UL) /*!< PORT15 IN: P6 (Bitfield-Mask: 0x01) */ +#define PORT15_IN_P7_Pos (7UL) /*!< PORT15 IN: P7 (Bit 7) */ +#define PORT15_IN_P7_Msk (0x80UL) /*!< PORT15 IN: P7 (Bitfield-Mask: 0x01) */ +#define PORT15_IN_P8_Pos (8UL) /*!< PORT15 IN: P8 (Bit 8) */ +#define PORT15_IN_P8_Msk (0x100UL) /*!< PORT15 IN: P8 (Bitfield-Mask: 0x01) */ +#define PORT15_IN_P9_Pos (9UL) /*!< PORT15 IN: P9 (Bit 9) */ +#define PORT15_IN_P9_Msk (0x200UL) /*!< PORT15 IN: P9 (Bitfield-Mask: 0x01) */ +#define PORT15_IN_P10_Pos (10UL) /*!< PORT15 IN: P10 (Bit 10) */ +#define PORT15_IN_P10_Msk (0x400UL) /*!< PORT15 IN: P10 (Bitfield-Mask: 0x01) */ +#define PORT15_IN_P11_Pos (11UL) /*!< PORT15 IN: P11 (Bit 11) */ +#define PORT15_IN_P11_Msk (0x800UL) /*!< PORT15 IN: P11 (Bitfield-Mask: 0x01) */ +#define PORT15_IN_P12_Pos (12UL) /*!< PORT15 IN: P12 (Bit 12) */ +#define PORT15_IN_P12_Msk (0x1000UL) /*!< PORT15 IN: P12 (Bitfield-Mask: 0x01) */ +#define PORT15_IN_P13_Pos (13UL) /*!< PORT15 IN: P13 (Bit 13) */ +#define PORT15_IN_P13_Msk (0x2000UL) /*!< PORT15 IN: P13 (Bitfield-Mask: 0x01) */ +#define PORT15_IN_P14_Pos (14UL) /*!< PORT15 IN: P14 (Bit 14) */ +#define PORT15_IN_P14_Msk (0x4000UL) /*!< PORT15 IN: P14 (Bitfield-Mask: 0x01) */ +#define PORT15_IN_P15_Pos (15UL) /*!< PORT15 IN: P15 (Bit 15) */ +#define PORT15_IN_P15_Msk (0x8000UL) /*!< PORT15 IN: P15 (Bitfield-Mask: 0x01) */ + +/* -------------------------------- PORT15_PDISC -------------------------------- */ +#define PORT15_PDISC_PDIS2_Pos (2UL) /*!< PORT15 PDISC: PDIS2 (Bit 2) */ +#define PORT15_PDISC_PDIS2_Msk (0x4UL) /*!< PORT15 PDISC: PDIS2 (Bitfield-Mask: 0x01) */ +#define PORT15_PDISC_PDIS3_Pos (3UL) /*!< PORT15 PDISC: PDIS3 (Bit 3) */ +#define PORT15_PDISC_PDIS3_Msk (0x8UL) /*!< PORT15 PDISC: PDIS3 (Bitfield-Mask: 0x01) */ +#define PORT15_PDISC_PDIS4_Pos (4UL) /*!< PORT15 PDISC: PDIS4 (Bit 4) */ +#define PORT15_PDISC_PDIS4_Msk (0x10UL) /*!< PORT15 PDISC: PDIS4 (Bitfield-Mask: 0x01) */ +#define PORT15_PDISC_PDIS5_Pos (5UL) /*!< PORT15 PDISC: PDIS5 (Bit 5) */ +#define PORT15_PDISC_PDIS5_Msk (0x20UL) /*!< PORT15 PDISC: PDIS5 (Bitfield-Mask: 0x01) */ +#define PORT15_PDISC_PDIS6_Pos (6UL) /*!< PORT15 PDISC: PDIS6 (Bit 6) */ +#define PORT15_PDISC_PDIS6_Msk (0x40UL) /*!< PORT15 PDISC: PDIS6 (Bitfield-Mask: 0x01) */ +#define PORT15_PDISC_PDIS7_Pos (7UL) /*!< PORT15 PDISC: PDIS7 (Bit 7) */ +#define PORT15_PDISC_PDIS7_Msk (0x80UL) /*!< PORT15 PDISC: PDIS7 (Bitfield-Mask: 0x01) */ +#define PORT15_PDISC_PDIS8_Pos (8UL) /*!< PORT15 PDISC: PDIS8 (Bit 8) */ +#define PORT15_PDISC_PDIS8_Msk (0x100UL) /*!< PORT15 PDISC: PDIS8 (Bitfield-Mask: 0x01) */ +#define PORT15_PDISC_PDIS9_Pos (9UL) /*!< PORT15 PDISC: PDIS9 (Bit 9) */ +#define PORT15_PDISC_PDIS9_Msk (0x200UL) /*!< PORT15 PDISC: PDIS9 (Bitfield-Mask: 0x01) */ +#define PORT15_PDISC_PDIS12_Pos (12UL) /*!< PORT15 PDISC: PDIS12 (Bit 12) */ +#define PORT15_PDISC_PDIS12_Msk (0x1000UL) /*!< PORT15 PDISC: PDIS12 (Bitfield-Mask: 0x01) */ +#define PORT15_PDISC_PDIS13_Pos (13UL) /*!< PORT15 PDISC: PDIS13 (Bit 13) */ +#define PORT15_PDISC_PDIS13_Msk (0x2000UL) /*!< PORT15 PDISC: PDIS13 (Bitfield-Mask: 0x01) */ +#define PORT15_PDISC_PDIS14_Pos (14UL) /*!< PORT15 PDISC: PDIS14 (Bit 14) */ +#define PORT15_PDISC_PDIS14_Msk (0x4000UL) /*!< PORT15 PDISC: PDIS14 (Bitfield-Mask: 0x01) */ +#define PORT15_PDISC_PDIS15_Pos (15UL) /*!< PORT15 PDISC: PDIS15 (Bit 15) */ +#define PORT15_PDISC_PDIS15_Msk (0x8000UL) /*!< PORT15 PDISC: PDIS15 (Bitfield-Mask: 0x01) */ + +/* --------------------------------- PORT15_PPS --------------------------------- */ +#define PORT15_PPS_PPS0_Pos (0UL) /*!< PORT15 PPS: PPS0 (Bit 0) */ +#define PORT15_PPS_PPS0_Msk (0x1UL) /*!< PORT15 PPS: PPS0 (Bitfield-Mask: 0x01) */ +#define PORT15_PPS_PPS1_Pos (1UL) /*!< PORT15 PPS: PPS1 (Bit 1) */ +#define PORT15_PPS_PPS1_Msk (0x2UL) /*!< PORT15 PPS: PPS1 (Bitfield-Mask: 0x01) */ +#define PORT15_PPS_PPS2_Pos (2UL) /*!< PORT15 PPS: PPS2 (Bit 2) */ +#define PORT15_PPS_PPS2_Msk (0x4UL) /*!< PORT15 PPS: PPS2 (Bitfield-Mask: 0x01) */ +#define PORT15_PPS_PPS3_Pos (3UL) /*!< PORT15 PPS: PPS3 (Bit 3) */ +#define PORT15_PPS_PPS3_Msk (0x8UL) /*!< PORT15 PPS: PPS3 (Bitfield-Mask: 0x01) */ +#define PORT15_PPS_PPS4_Pos (4UL) /*!< PORT15 PPS: PPS4 (Bit 4) */ +#define PORT15_PPS_PPS4_Msk (0x10UL) /*!< PORT15 PPS: PPS4 (Bitfield-Mask: 0x01) */ +#define PORT15_PPS_PPS5_Pos (5UL) /*!< PORT15 PPS: PPS5 (Bit 5) */ +#define PORT15_PPS_PPS5_Msk (0x20UL) /*!< PORT15 PPS: PPS5 (Bitfield-Mask: 0x01) */ +#define PORT15_PPS_PPS6_Pos (6UL) /*!< PORT15 PPS: PPS6 (Bit 6) */ +#define PORT15_PPS_PPS6_Msk (0x40UL) /*!< PORT15 PPS: PPS6 (Bitfield-Mask: 0x01) */ +#define PORT15_PPS_PPS7_Pos (7UL) /*!< PORT15 PPS: PPS7 (Bit 7) */ +#define PORT15_PPS_PPS7_Msk (0x80UL) /*!< PORT15 PPS: PPS7 (Bitfield-Mask: 0x01) */ +#define PORT15_PPS_PPS8_Pos (8UL) /*!< PORT15 PPS: PPS8 (Bit 8) */ +#define PORT15_PPS_PPS8_Msk (0x100UL) /*!< PORT15 PPS: PPS8 (Bitfield-Mask: 0x01) */ +#define PORT15_PPS_PPS9_Pos (9UL) /*!< PORT15 PPS: PPS9 (Bit 9) */ +#define PORT15_PPS_PPS9_Msk (0x200UL) /*!< PORT15 PPS: PPS9 (Bitfield-Mask: 0x01) */ +#define PORT15_PPS_PPS10_Pos (10UL) /*!< PORT15 PPS: PPS10 (Bit 10) */ +#define PORT15_PPS_PPS10_Msk (0x400UL) /*!< PORT15 PPS: PPS10 (Bitfield-Mask: 0x01) */ +#define PORT15_PPS_PPS11_Pos (11UL) /*!< PORT15 PPS: PPS11 (Bit 11) */ +#define PORT15_PPS_PPS11_Msk (0x800UL) /*!< PORT15 PPS: PPS11 (Bitfield-Mask: 0x01) */ +#define PORT15_PPS_PPS12_Pos (12UL) /*!< PORT15 PPS: PPS12 (Bit 12) */ +#define PORT15_PPS_PPS12_Msk (0x1000UL) /*!< PORT15 PPS: PPS12 (Bitfield-Mask: 0x01) */ +#define PORT15_PPS_PPS13_Pos (13UL) /*!< PORT15 PPS: PPS13 (Bit 13) */ +#define PORT15_PPS_PPS13_Msk (0x2000UL) /*!< PORT15 PPS: PPS13 (Bitfield-Mask: 0x01) */ +#define PORT15_PPS_PPS14_Pos (14UL) /*!< PORT15 PPS: PPS14 (Bit 14) */ +#define PORT15_PPS_PPS14_Msk (0x4000UL) /*!< PORT15 PPS: PPS14 (Bitfield-Mask: 0x01) */ +#define PORT15_PPS_PPS15_Pos (15UL) /*!< PORT15 PPS: PPS15 (Bit 15) */ +#define PORT15_PPS_PPS15_Msk (0x8000UL) /*!< PORT15 PPS: PPS15 (Bitfield-Mask: 0x01) */ + +/* -------------------------------- PORT15_HWSEL -------------------------------- */ +#define PORT15_HWSEL_HW0_Pos (0UL) /*!< PORT15 HWSEL: HW0 (Bit 0) */ +#define PORT15_HWSEL_HW0_Msk (0x3UL) /*!< PORT15 HWSEL: HW0 (Bitfield-Mask: 0x03) */ +#define PORT15_HWSEL_HW1_Pos (2UL) /*!< PORT15 HWSEL: HW1 (Bit 2) */ +#define PORT15_HWSEL_HW1_Msk (0xcUL) /*!< PORT15 HWSEL: HW1 (Bitfield-Mask: 0x03) */ +#define PORT15_HWSEL_HW2_Pos (4UL) /*!< PORT15 HWSEL: HW2 (Bit 4) */ +#define PORT15_HWSEL_HW2_Msk (0x30UL) /*!< PORT15 HWSEL: HW2 (Bitfield-Mask: 0x03) */ +#define PORT15_HWSEL_HW3_Pos (6UL) /*!< PORT15 HWSEL: HW3 (Bit 6) */ +#define PORT15_HWSEL_HW3_Msk (0xc0UL) /*!< PORT15 HWSEL: HW3 (Bitfield-Mask: 0x03) */ +#define PORT15_HWSEL_HW4_Pos (8UL) /*!< PORT15 HWSEL: HW4 (Bit 8) */ +#define PORT15_HWSEL_HW4_Msk (0x300UL) /*!< PORT15 HWSEL: HW4 (Bitfield-Mask: 0x03) */ +#define PORT15_HWSEL_HW5_Pos (10UL) /*!< PORT15 HWSEL: HW5 (Bit 10) */ +#define PORT15_HWSEL_HW5_Msk (0xc00UL) /*!< PORT15 HWSEL: HW5 (Bitfield-Mask: 0x03) */ +#define PORT15_HWSEL_HW6_Pos (12UL) /*!< PORT15 HWSEL: HW6 (Bit 12) */ +#define PORT15_HWSEL_HW6_Msk (0x3000UL) /*!< PORT15 HWSEL: HW6 (Bitfield-Mask: 0x03) */ +#define PORT15_HWSEL_HW7_Pos (14UL) /*!< PORT15 HWSEL: HW7 (Bit 14) */ +#define PORT15_HWSEL_HW7_Msk (0xc000UL) /*!< PORT15 HWSEL: HW7 (Bitfield-Mask: 0x03) */ +#define PORT15_HWSEL_HW8_Pos (16UL) /*!< PORT15 HWSEL: HW8 (Bit 16) */ +#define PORT15_HWSEL_HW8_Msk (0x30000UL) /*!< PORT15 HWSEL: HW8 (Bitfield-Mask: 0x03) */ +#define PORT15_HWSEL_HW9_Pos (18UL) /*!< PORT15 HWSEL: HW9 (Bit 18) */ +#define PORT15_HWSEL_HW9_Msk (0xc0000UL) /*!< PORT15 HWSEL: HW9 (Bitfield-Mask: 0x03) */ +#define PORT15_HWSEL_HW10_Pos (20UL) /*!< PORT15 HWSEL: HW10 (Bit 20) */ +#define PORT15_HWSEL_HW10_Msk (0x300000UL) /*!< PORT15 HWSEL: HW10 (Bitfield-Mask: 0x03) */ +#define PORT15_HWSEL_HW11_Pos (22UL) /*!< PORT15 HWSEL: HW11 (Bit 22) */ +#define PORT15_HWSEL_HW11_Msk (0xc00000UL) /*!< PORT15 HWSEL: HW11 (Bitfield-Mask: 0x03) */ +#define PORT15_HWSEL_HW12_Pos (24UL) /*!< PORT15 HWSEL: HW12 (Bit 24) */ +#define PORT15_HWSEL_HW12_Msk (0x3000000UL) /*!< PORT15 HWSEL: HW12 (Bitfield-Mask: 0x03) */ +#define PORT15_HWSEL_HW13_Pos (26UL) /*!< PORT15 HWSEL: HW13 (Bit 26) */ +#define PORT15_HWSEL_HW13_Msk (0xc000000UL) /*!< PORT15 HWSEL: HW13 (Bitfield-Mask: 0x03) */ +#define PORT15_HWSEL_HW14_Pos (28UL) /*!< PORT15 HWSEL: HW14 (Bit 28) */ +#define PORT15_HWSEL_HW14_Msk (0x30000000UL) /*!< PORT15 HWSEL: HW14 (Bitfield-Mask: 0x03) */ +#define PORT15_HWSEL_HW15_Pos (30UL) /*!< PORT15 HWSEL: HW15 (Bit 30) */ +#define PORT15_HWSEL_HW15_Msk (0xc0000000UL) /*!< PORT15 HWSEL: HW15 (Bitfield-Mask: 0x03) */ + + + +/* ================================================================================ */ +/* ================ Peripheral memory map ================ */ +/* ================================================================================ */ + +#define PPB_BASE 0xE000E000UL +#define DLR_BASE 0x50004900UL +#define ERU0_BASE 0x50004800UL +#define ERU1_BASE 0x40044000UL +#define GPDMA0_BASE 0x500142C0UL +#define GPDMA0_CH0_BASE 0x50014000UL +#define GPDMA0_CH1_BASE 0x50014058UL +#define GPDMA0_CH2_BASE 0x500140B0UL +#define GPDMA0_CH3_BASE 0x50014108UL +#define GPDMA0_CH4_BASE 0x50014160UL +#define GPDMA0_CH5_BASE 0x500141B8UL +#define GPDMA0_CH6_BASE 0x50014210UL +#define GPDMA0_CH7_BASE 0x50014268UL +#define GPDMA1_BASE 0x500182C0UL +#define GPDMA1_CH0_BASE 0x50018000UL +#define GPDMA1_CH1_BASE 0x50018058UL +#define GPDMA1_CH2_BASE 0x500180B0UL +#define GPDMA1_CH3_BASE 0x50018108UL +#define FCE_BASE 0x50020000UL +#define FCE_KE0_BASE 0x50020020UL +#define FCE_KE1_BASE 0x50020040UL +#define FCE_KE2_BASE 0x50020060UL +#define FCE_KE3_BASE 0x50020080UL +#define PBA0_BASE 0x40000000UL +#define PBA1_BASE 0x48000000UL +#define FLASH0_BASE 0x58001000UL +#define PREF_BASE 0x58004000UL +#define PMU0_BASE 0x58000508UL +#define WDT_BASE 0x50008000UL +#define RTC_BASE 0x50004A00UL +#define SCU_CLK_BASE 0x50004600UL +#define SCU_OSC_BASE 0x50004700UL +#define SCU_PLL_BASE 0x50004710UL +#define SCU_GENERAL_BASE 0x50004000UL +#define SCU_INTERRUPT_BASE 0x50004074UL +#define SCU_PARITY_BASE 0x5000413CUL +#define SCU_TRAP_BASE 0x50004160UL +#define SCU_HIBERNATE_BASE 0x50004300UL +#define SCU_POWER_BASE 0x50004200UL +#define SCU_RESET_BASE 0x50004400UL +#define LEDTS0_BASE 0x48010000UL +#define SDMMC_CON_BASE 0x500040B4UL +#define SDMMC_BASE 0x4801C000UL +#define EBU_BASE 0x58008000UL +#define ETH0_CON_BASE 0x50004040UL +#define ETH0_BASE 0x5000C000UL +#define ECAT0_CON_BASE 0x500041B0UL +#define ECAT0_BASE 0x54010000UL +#define ECAT0_FMMU0_BASE 0x54010600UL +#define ECAT0_FMMU1_BASE 0x54010610UL +#define ECAT0_FMMU2_BASE 0x54010620UL +#define ECAT0_FMMU3_BASE 0x54010630UL +#define ECAT0_FMMU4_BASE 0x54010640UL +#define ECAT0_FMMU5_BASE 0x54010650UL +#define ECAT0_FMMU6_BASE 0x54010660UL +#define ECAT0_FMMU7_BASE 0x54010670UL +#define ECAT0_SM0_BASE 0x54010800UL +#define ECAT0_SM1_BASE 0x54010808UL +#define ECAT0_SM2_BASE 0x54010810UL +#define ECAT0_SM3_BASE 0x54010818UL +#define ECAT0_SM4_BASE 0x54010820UL +#define ECAT0_SM5_BASE 0x54010828UL +#define ECAT0_SM6_BASE 0x54010830UL +#define ECAT0_SM7_BASE 0x54010838UL +#define USB0_BASE 0x50040000UL +#define USB_EP_BASE 0x50040900UL +#define USB0_EP1_BASE 0x50040920UL +#define USB0_EP2_BASE 0x50040940UL +#define USB0_EP3_BASE 0x50040960UL +#define USB0_EP4_BASE 0x50040980UL +#define USB0_EP5_BASE 0x500409A0UL +#define USB0_EP6_BASE 0x500409C0UL +#define USB0_CH0_BASE 0x50040500UL +#define USB0_CH1_BASE 0x50040520UL +#define USB0_CH2_BASE 0x50040540UL +#define USB0_CH3_BASE 0x50040560UL +#define USB0_CH4_BASE 0x50040580UL +#define USB0_CH5_BASE 0x500405A0UL +#define USB0_CH6_BASE 0x500405C0UL +#define USB0_CH7_BASE 0x500405E0UL +#define USB0_CH8_BASE 0x50040600UL +#define USB0_CH9_BASE 0x50040620UL +#define USB0_CH10_BASE 0x50040640UL +#define USB0_CH11_BASE 0x50040660UL +#define USB0_CH12_BASE 0x50040680UL +#define USB0_CH13_BASE 0x500406A0UL +#define USIC0_BASE 0x40030008UL +#define USIC1_BASE 0x48020008UL +#define USIC2_BASE 0x48024008UL +#define USIC0_CH0_BASE 0x40030000UL +#define USIC0_CH1_BASE 0x40030200UL +#define USIC1_CH0_BASE 0x48020000UL +#define USIC1_CH1_BASE 0x48020200UL +#define USIC2_CH0_BASE 0x48024000UL +#define USIC2_CH1_BASE 0x48024200UL +#define CAN_BASE 0x48014000UL +#define CAN_NODE0_BASE 0x48014200UL +#define CAN_NODE1_BASE 0x48014300UL +#define CAN_NODE2_BASE 0x48014400UL +#define CAN_NODE3_BASE 0x48014500UL +#define CAN_NODE4_BASE 0x48014600UL +#define CAN_NODE5_BASE 0x48014700UL +#define CAN_MO_BASE 0x48015000UL +#define VADC_BASE 0x40004000UL +#define VADC_G0_BASE 0x40004400UL +#define VADC_G1_BASE 0x40004800UL +#define VADC_G2_BASE 0x40004C00UL +#define VADC_G3_BASE 0x40005000UL +#define DSD_BASE 0x40008000UL +#define DSD_CH0_BASE 0x40008100UL +#define DSD_CH1_BASE 0x40008200UL +#define DSD_CH2_BASE 0x40008300UL +#define DSD_CH3_BASE 0x40008400UL +#define DAC_BASE 0x48018000UL +#define CCU40_BASE 0x4000C000UL +#define CCU41_BASE 0x40010000UL +#define CCU42_BASE 0x40014000UL +#define CCU43_BASE 0x48004000UL +#define CCU40_CC40_BASE 0x4000C100UL +#define CCU40_CC41_BASE 0x4000C200UL +#define CCU40_CC42_BASE 0x4000C300UL +#define CCU40_CC43_BASE 0x4000C400UL +#define CCU41_CC40_BASE 0x40010100UL +#define CCU41_CC41_BASE 0x40010200UL +#define CCU41_CC42_BASE 0x40010300UL +#define CCU41_CC43_BASE 0x40010400UL +#define CCU42_CC40_BASE 0x40014100UL +#define CCU42_CC41_BASE 0x40014200UL +#define CCU42_CC42_BASE 0x40014300UL +#define CCU42_CC43_BASE 0x40014400UL +#define CCU43_CC40_BASE 0x48004100UL +#define CCU43_CC41_BASE 0x48004200UL +#define CCU43_CC42_BASE 0x48004300UL +#define CCU43_CC43_BASE 0x48004400UL +#define CCU80_BASE 0x40020000UL +#define CCU81_BASE 0x40024000UL +#define CCU80_CC80_BASE 0x40020100UL +#define CCU80_CC81_BASE 0x40020200UL +#define CCU80_CC82_BASE 0x40020300UL +#define CCU80_CC83_BASE 0x40020400UL +#define CCU81_CC80_BASE 0x40024100UL +#define CCU81_CC81_BASE 0x40024200UL +#define CCU81_CC82_BASE 0x40024300UL +#define CCU81_CC83_BASE 0x40024400UL +#define POSIF0_BASE 0x40028000UL +#define POSIF1_BASE 0x4002C000UL +#define PORT0_BASE 0x48028000UL +#define PORT1_BASE 0x48028100UL +#define PORT2_BASE 0x48028200UL +#define PORT3_BASE 0x48028300UL +#define PORT4_BASE 0x48028400UL +#define PORT5_BASE 0x48028500UL +#define PORT6_BASE 0x48028600UL +#define PORT7_BASE 0x48028700UL +#define PORT8_BASE 0x48028800UL +#define PORT9_BASE 0x48028900UL +#define PORT14_BASE 0x48028E00UL +#define PORT15_BASE 0x48028F00UL + + +/* ================================================================================ */ +/* ================ Peripheral declaration ================ */ +/* ================================================================================ */ + +#define PPB ((PPB_Type *) PPB_BASE) +#define DLR ((DLR_GLOBAL_TypeDef *) DLR_BASE) +#define ERU0 ((ERU_GLOBAL_TypeDef *) ERU0_BASE) +#define ERU1 ((ERU_GLOBAL_TypeDef *) ERU1_BASE) +#define GPDMA0 ((GPDMA0_GLOBAL_TypeDef *) GPDMA0_BASE) +#define GPDMA0_CH0 ((GPDMA0_CH_TypeDef *) GPDMA0_CH0_BASE) +#define GPDMA0_CH1 ((GPDMA0_CH_TypeDef *) GPDMA0_CH1_BASE) +#define GPDMA0_CH2 ((GPDMA0_CH_TypeDef *) GPDMA0_CH2_BASE) +#define GPDMA0_CH3 ((GPDMA0_CH_TypeDef *) GPDMA0_CH3_BASE) +#define GPDMA0_CH4 ((GPDMA0_CH_TypeDef *) GPDMA0_CH4_BASE) +#define GPDMA0_CH5 ((GPDMA0_CH_TypeDef *) GPDMA0_CH5_BASE) +#define GPDMA0_CH6 ((GPDMA0_CH_TypeDef *) GPDMA0_CH6_BASE) +#define GPDMA0_CH7 ((GPDMA0_CH_TypeDef *) GPDMA0_CH7_BASE) +#define GPDMA1 ((GPDMA1_GLOBAL_TypeDef *) GPDMA1_BASE) +#define GPDMA1_CH0 ((GPDMA1_CH_TypeDef *) GPDMA1_CH0_BASE) +#define GPDMA1_CH1 ((GPDMA1_CH_TypeDef *) GPDMA1_CH1_BASE) +#define GPDMA1_CH2 ((GPDMA1_CH_TypeDef *) GPDMA1_CH2_BASE) +#define GPDMA1_CH3 ((GPDMA1_CH_TypeDef *) GPDMA1_CH3_BASE) +#define FCE ((FCE_GLOBAL_TypeDef *) FCE_BASE) +#define FCE_KE0 ((FCE_KE_TypeDef *) FCE_KE0_BASE) +#define FCE_KE1 ((FCE_KE_TypeDef *) FCE_KE1_BASE) +#define FCE_KE2 ((FCE_KE_TypeDef *) FCE_KE2_BASE) +#define FCE_KE3 ((FCE_KE_TypeDef *) FCE_KE3_BASE) +#define PBA0 ((PBA_GLOBAL_TypeDef *) PBA0_BASE) +#define PBA1 ((PBA_GLOBAL_TypeDef *) PBA1_BASE) +#define FLASH0 ((FLASH0_GLOBAL_TypeDef *) FLASH0_BASE) +#define PREF ((PREF_GLOBAL_TypeDef *) PREF_BASE) +#define PMU0 ((PMU0_GLOBAL_TypeDef *) PMU0_BASE) +#define WDT ((WDT_GLOBAL_TypeDef *) WDT_BASE) +#define RTC ((RTC_GLOBAL_TypeDef *) RTC_BASE) +#define SCU_CLK ((SCU_CLK_TypeDef *) SCU_CLK_BASE) +#define SCU_OSC ((SCU_OSC_TypeDef *) SCU_OSC_BASE) +#define SCU_PLL ((SCU_PLL_TypeDef *) SCU_PLL_BASE) +#define SCU_GENERAL ((SCU_GENERAL_TypeDef *) SCU_GENERAL_BASE) +#define SCU_INTERRUPT ((SCU_INTERRUPT_TypeDef *) SCU_INTERRUPT_BASE) +#define SCU_PARITY ((SCU_PARITY_TypeDef *) SCU_PARITY_BASE) +#define SCU_TRAP ((SCU_TRAP_TypeDef *) SCU_TRAP_BASE) +#define SCU_HIBERNATE ((SCU_HIBERNATE_TypeDef *) SCU_HIBERNATE_BASE) +#define SCU_POWER ((SCU_POWER_TypeDef *) SCU_POWER_BASE) +#define SCU_RESET ((SCU_RESET_TypeDef *) SCU_RESET_BASE) +#define LEDTS0 ((LEDTS0_GLOBAL_TypeDef *) LEDTS0_BASE) +#define SDMMC_CON ((SDMMC_CON_Type *) SDMMC_CON_BASE) +#define SDMMC ((SDMMC_GLOBAL_TypeDef *) SDMMC_BASE) +#define EBU ((EBU_Type *) EBU_BASE) +#define ETH0_CON ((ETH0_CON_GLOBAL_TypeDef *) ETH0_CON_BASE) +#define ETH0 ((ETH_GLOBAL_TypeDef *) ETH0_BASE) +#define ECAT0_CON ((ECAT0_CON_Type *) ECAT0_CON_BASE) +#define ECAT0 ((ECAT_Type *) ECAT0_BASE) +#define ECAT0_FMMU0 ((ECAT0_FMMU_Type *) ECAT0_FMMU0_BASE) +#define ECAT0_FMMU1 ((ECAT0_FMMU_Type *) ECAT0_FMMU1_BASE) +#define ECAT0_FMMU2 ((ECAT0_FMMU_Type *) ECAT0_FMMU2_BASE) +#define ECAT0_FMMU3 ((ECAT0_FMMU_Type *) ECAT0_FMMU3_BASE) +#define ECAT0_FMMU4 ((ECAT0_FMMU_Type *) ECAT0_FMMU4_BASE) +#define ECAT0_FMMU5 ((ECAT0_FMMU_Type *) ECAT0_FMMU5_BASE) +#define ECAT0_FMMU6 ((ECAT0_FMMU_Type *) ECAT0_FMMU6_BASE) +#define ECAT0_FMMU7 ((ECAT0_FMMU_Type *) ECAT0_FMMU7_BASE) +#define ECAT0_SM0 ((ECAT0_SM_Type *) ECAT0_SM0_BASE) +#define ECAT0_SM1 ((ECAT0_SM_Type *) ECAT0_SM1_BASE) +#define ECAT0_SM2 ((ECAT0_SM_Type *) ECAT0_SM2_BASE) +#define ECAT0_SM3 ((ECAT0_SM_Type *) ECAT0_SM3_BASE) +#define ECAT0_SM4 ((ECAT0_SM_Type *) ECAT0_SM4_BASE) +#define ECAT0_SM5 ((ECAT0_SM_Type *) ECAT0_SM5_BASE) +#define ECAT0_SM6 ((ECAT0_SM_Type *) ECAT0_SM6_BASE) +#define ECAT0_SM7 ((ECAT0_SM_Type *) ECAT0_SM7_BASE) +#define USB0 ((USB0_GLOBAL_TypeDef *) USB0_BASE) +#define USB0_EP0 ((USB0_EP0_TypeDef *) USB_EP_BASE) +#define USB0_EP1 ((USB0_EP_TypeDef *) USB0_EP1_BASE) +#define USB0_EP2 ((USB0_EP_TypeDef *) USB0_EP2_BASE) +#define USB0_EP3 ((USB0_EP_TypeDef *) USB0_EP3_BASE) +#define USB0_EP4 ((USB0_EP_TypeDef *) USB0_EP4_BASE) +#define USB0_EP5 ((USB0_EP_TypeDef *) USB0_EP5_BASE) +#define USB0_EP6 ((USB0_EP_TypeDef *) USB0_EP6_BASE) +#define USB0_CH0 ((USB0_CH_TypeDef *) USB0_CH0_BASE) +#define USB0_CH1 ((USB0_CH_TypeDef *) USB0_CH1_BASE) +#define USB0_CH2 ((USB0_CH_TypeDef *) USB0_CH2_BASE) +#define USB0_CH3 ((USB0_CH_TypeDef *) USB0_CH3_BASE) +#define USB0_CH4 ((USB0_CH_TypeDef *) USB0_CH4_BASE) +#define USB0_CH5 ((USB0_CH_TypeDef *) USB0_CH5_BASE) +#define USB0_CH6 ((USB0_CH_TypeDef *) USB0_CH6_BASE) +#define USB0_CH7 ((USB0_CH_TypeDef *) USB0_CH7_BASE) +#define USB0_CH8 ((USB0_CH_TypeDef *) USB0_CH8_BASE) +#define USB0_CH9 ((USB0_CH_TypeDef *) USB0_CH9_BASE) +#define USB0_CH10 ((USB0_CH_TypeDef *) USB0_CH10_BASE) +#define USB0_CH11 ((USB0_CH_TypeDef *) USB0_CH11_BASE) +#define USB0_CH12 ((USB0_CH_TypeDef *) USB0_CH12_BASE) +#define USB0_CH13 ((USB0_CH_TypeDef *) USB0_CH13_BASE) +#define USIC0 ((USIC_GLOBAL_TypeDef *) USIC0_BASE) +#define USIC1 ((USIC_GLOBAL_TypeDef *) USIC1_BASE) +#define USIC2 ((USIC_GLOBAL_TypeDef *) USIC2_BASE) +#define USIC0_CH0 ((USIC_CH_TypeDef *) USIC0_CH0_BASE) +#define USIC0_CH1 ((USIC_CH_TypeDef *) USIC0_CH1_BASE) +#define USIC1_CH0 ((USIC_CH_TypeDef *) USIC1_CH0_BASE) +#define USIC1_CH1 ((USIC_CH_TypeDef *) USIC1_CH1_BASE) +#define USIC2_CH0 ((USIC_CH_TypeDef *) USIC2_CH0_BASE) +#define USIC2_CH1 ((USIC_CH_TypeDef *) USIC2_CH1_BASE) +#define CAN ((CAN_GLOBAL_TypeDef *) CAN_BASE) +#define CAN_NODE0 ((CAN_NODE_TypeDef *) CAN_NODE0_BASE) +#define CAN_NODE1 ((CAN_NODE_TypeDef *) CAN_NODE1_BASE) +#define CAN_NODE2 ((CAN_NODE_TypeDef *) CAN_NODE2_BASE) +#define CAN_NODE3 ((CAN_NODE_TypeDef *) CAN_NODE3_BASE) +#define CAN_NODE4 ((CAN_NODE_TypeDef *) CAN_NODE4_BASE) +#define CAN_NODE5 ((CAN_NODE_TypeDef *) CAN_NODE5_BASE) +#define CAN_MO ((CAN_MO_CLUSTER_Type *) CAN_MO_BASE) +#define VADC ((VADC_GLOBAL_TypeDef *) VADC_BASE) +#define VADC_G0 ((VADC_G_TypeDef *) VADC_G0_BASE) +#define VADC_G1 ((VADC_G_TypeDef *) VADC_G1_BASE) +#define VADC_G2 ((VADC_G_TypeDef *) VADC_G2_BASE) +#define VADC_G3 ((VADC_G_TypeDef *) VADC_G3_BASE) +#define DSD ((DSD_GLOBAL_TypeDef *) DSD_BASE) +#define DSD_CH0 ((DSD_CH_TypeDef *) DSD_CH0_BASE) +#define DSD_CH1 ((DSD_CH_TypeDef *) DSD_CH1_BASE) +#define DSD_CH2 ((DSD_CH_TypeDef *) DSD_CH2_BASE) +#define DSD_CH3 ((DSD_CH_TypeDef *) DSD_CH3_BASE) +#define DAC ((DAC_GLOBAL_TypeDef *) DAC_BASE) +#define CCU40 ((CCU4_GLOBAL_TypeDef *) CCU40_BASE) +#define CCU41 ((CCU4_GLOBAL_TypeDef *) CCU41_BASE) +#define CCU42 ((CCU4_GLOBAL_TypeDef *) CCU42_BASE) +#define CCU43 ((CCU4_GLOBAL_TypeDef *) CCU43_BASE) +#define CCU40_CC40 ((CCU4_CC4_TypeDef *) CCU40_CC40_BASE) +#define CCU40_CC41 ((CCU4_CC4_TypeDef *) CCU40_CC41_BASE) +#define CCU40_CC42 ((CCU4_CC4_TypeDef *) CCU40_CC42_BASE) +#define CCU40_CC43 ((CCU4_CC4_TypeDef *) CCU40_CC43_BASE) +#define CCU41_CC40 ((CCU4_CC4_TypeDef *) CCU41_CC40_BASE) +#define CCU41_CC41 ((CCU4_CC4_TypeDef *) CCU41_CC41_BASE) +#define CCU41_CC42 ((CCU4_CC4_TypeDef *) CCU41_CC42_BASE) +#define CCU41_CC43 ((CCU4_CC4_TypeDef *) CCU41_CC43_BASE) +#define CCU42_CC40 ((CCU4_CC4_TypeDef *) CCU42_CC40_BASE) +#define CCU42_CC41 ((CCU4_CC4_TypeDef *) CCU42_CC41_BASE) +#define CCU42_CC42 ((CCU4_CC4_TypeDef *) CCU42_CC42_BASE) +#define CCU42_CC43 ((CCU4_CC4_TypeDef *) CCU42_CC43_BASE) +#define CCU43_CC40 ((CCU4_CC4_TypeDef *) CCU43_CC40_BASE) +#define CCU43_CC41 ((CCU4_CC4_TypeDef *) CCU43_CC41_BASE) +#define CCU43_CC42 ((CCU4_CC4_TypeDef *) CCU43_CC42_BASE) +#define CCU43_CC43 ((CCU4_CC4_TypeDef *) CCU43_CC43_BASE) +#define CCU80 ((CCU8_GLOBAL_TypeDef *) CCU80_BASE) +#define CCU81 ((CCU8_GLOBAL_TypeDef *) CCU81_BASE) +#define CCU80_CC80 ((CCU8_CC8_TypeDef *) CCU80_CC80_BASE) +#define CCU80_CC81 ((CCU8_CC8_TypeDef *) CCU80_CC81_BASE) +#define CCU80_CC82 ((CCU8_CC8_TypeDef *) CCU80_CC82_BASE) +#define CCU80_CC83 ((CCU8_CC8_TypeDef *) CCU80_CC83_BASE) +#define CCU81_CC80 ((CCU8_CC8_TypeDef *) CCU81_CC80_BASE) +#define CCU81_CC81 ((CCU8_CC8_TypeDef *) CCU81_CC81_BASE) +#define CCU81_CC82 ((CCU8_CC8_TypeDef *) CCU81_CC82_BASE) +#define CCU81_CC83 ((CCU8_CC8_TypeDef *) CCU81_CC83_BASE) +#define POSIF0 ((POSIF_GLOBAL_TypeDef *) POSIF0_BASE) +#define POSIF1 ((POSIF_GLOBAL_TypeDef *) POSIF1_BASE) +#define PORT0 ((PORT0_Type *) PORT0_BASE) +#define PORT1 ((PORT1_Type *) PORT1_BASE) +#define PORT2 ((PORT2_Type *) PORT2_BASE) +#define PORT3 ((PORT3_Type *) PORT3_BASE) +#define PORT4 ((PORT4_Type *) PORT4_BASE) +#define PORT5 ((PORT5_Type *) PORT5_BASE) +#define PORT6 ((PORT6_Type *) PORT6_BASE) +#define PORT7 ((PORT7_Type *) PORT7_BASE) +#define PORT8 ((PORT8_Type *) PORT8_BASE) +#define PORT9 ((PORT9_Type *) PORT9_BASE) +#define PORT14 ((PORT14_Type *) PORT14_BASE) +#define PORT15 ((PORT15_Type *) PORT15_BASE) + + +/** @} */ /* End of group Device_Peripheral_Registers */ +/** @} */ /* End of group XMC4800 */ +/** @} */ /* End of group Infineon */ + +#ifdef __cplusplus +} +#endif + + +#endif /* XMC4800_H */ + diff --git a/variants/XMC4800/config/XMC4800_Relax_Kit/pins_arduino.h b/variants/XMC4800/config/XMC4800_Relax_Kit/pins_arduino.h new file mode 100644 index 00000000..cbb884d1 --- /dev/null +++ b/variants/XMC4800/config/XMC4800_Relax_Kit/pins_arduino.h @@ -0,0 +1,312 @@ +/* +pins_arduino.h - Pin definition functions for Arduino +Part of Arduino - http://www.arduino.cc/ + +Copyright (c) 2007 David A. Mellis + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General +Public License along with this library; if not, write to the +Free Software Foundation, Inc., 59 Temple Place, Suite 330, +Boston, MA 02111-1307 USA +*/ +#ifndef PINS_ARDUINO_H_ +#define PINS_ARDUINO_H_ + +//**************************************************************************** +// @Project Includes +//**************************************************************************** +#include + +//**************************************************************************** +// @Defines +//**************************************************************************** +// XMC_BOARD for stringifying into serial or other text outputs/logs +// Note the actual name XMC and number MUST have a character between +// to avoid issues with other defined macros e.g. XMC1100 +#define XMC_BOARD XMC 4800 Relax Kit + +/* On board LED is ON when digital output is 0, LOW, False, OFF */ +#define XMC_LED_ON 0 + +// Following were defines now evaluated by compilation as const variables +// After definitions of associated mapping arrays +extern const uint8_t NUM_DIGITAL; +extern const uint8_t GND; +extern const uint8_t NUM_PWM4; +extern const uint8_t NUM_PWM8; +extern const uint8_t NUM_PWM; +extern const uint8_t NUM_INTERRUPT; +extern const uint8_t NUM_ANALOG_INPUTS; +#ifdef DAC +extern const uint8_t NUM_ANALOG_OUTPUTS; +#endif +#define NUM_LEDS 2 +#define NUM_BUTTONS 2 +#define NUM_SERIAL 2 +#define NUM_TONE_PINS 16 +#define NUM_TASKS_VARIANT 32 + +// Indicate unit has RTC/Alarm +#define HAS_RTC 1 + +// Board has two serial ports pre-assigned to debug and on-board + +#define PWM4_TIMER_PERIOD (0x11EF) // Generate 490Hz @fCCU=144MHz +#define PWM8_TIMER_PERIOD (0x11EF) // Generate 490Hz @fCCU=144MHz + +#define PCLK 144000000u + +#define PIN_SPI_SS 10 +#define PIN_SPI_MOSI 11 +#define PIN_SPI_MISO 12 +#define PIN_SPI_SCK 13 + +extern uint8_t SS; +extern uint8_t MOSI; +extern uint8_t MISO; +extern uint8_t SCK; + +#define PIN_SPI_SS_SD 28 +#define PIN_SPI_MOSI_SD 29 +#define PIN_SPI_MISO_SD 30 +#define PIN_SPI_SCK_SD 31 + +static const uint8_t SS_SD = PIN_SPI_SS_SD; +static const uint8_t MOSI_SD = PIN_SPI_MOSI_SD; +static const uint8_t MISO_SD = PIN_SPI_MISO_SD; +static const uint8_t SCK_SD = PIN_SPI_SCK_SD; + +#define A0 0 +#define A1 1 +#define A2 2 +#define A3 3 +#define A4 4 +#define A5 5 + +#define LED_BUILTIN 13 // Standard Arduino LED +#define LED1 24 // Additional LED1 +#define LED2 25 // Additional LED2 +#define BUTTON1 26 // Additional BUTTON1 +#define BUTTON2 27 // Additional BUTTON2 +#define GND 50 // GND + + +#define digitalPinToPCICR(p) (((p) >= 0 && (p) <= 21) ? (&PCICR) : ((uint8_t *)0)) +#define digitalPinToPCICRbit(p) (((p) <= 7) ? 2 : (((p) <= 13) ? 0 : 1)) +#define digitalPinToPCMSK(p) (((p) <= 7) ? (&PCMSK2) : (((p) <= 13) ? (&PCMSK0) : (((p) <= 21) ? (&PCMSK1) : ((uint8_t *)0)))) +#define digitalPinToPCMSKbit(p) (((p) <= 7) ? (p) : ((p) <= 13) ? ((p) - 8) : ((p) - 14)) +#define digitalPinToInterrupt(p) ((p) == 2 ? 0 : ((p) == 3 ? 1 : NOT_AN_INTERRUPT)) + +#ifdef ARDUINO_MAIN +// Mapping of digital pins and comments +const XMC_PORT_PIN_t mapping_port_pin[] = +{ + /* 0 */ {XMC_GPIO_PORT2, 15}, // RX P2.15 + /* 1 */ {XMC_GPIO_PORT2 ,14}, // TX P2.14 + /* 2 */ {XMC_GPIO_PORT1 ,0}, // GPIO / External INT 0 P1.0 + /* 3 */ {XMC_GPIO_PORT1 ,1}, // PWM40-0 / External INT 1 P1.1 + /* 4 */ {XMC_GPIO_PORT1 ,8}, // GPIO P1.8 + /* 5 */ {XMC_GPIO_PORT2 ,12}, // PWM8-0 P2.12 + /* 6 */ {XMC_GPIO_PORT2 ,11}, // PWM8-1 P2.11 + /* 7 */ {XMC_GPIO_PORT1 ,9}, // GPIO P1.9 + /* 8 */ {XMC_GPIO_PORT1 ,10}, // GPIO P1.10 + /* 9 */ {XMC_GPIO_PORT1 ,11}, // PWM8-2 output P1.11 + /* 10 */ {XMC_GPIO_PORT3 ,10}, // SPI-SS / PWM4-1 // TODO: SPI_SS_1 P3.10 + /* 11 */ {XMC_GPIO_PORT3 ,8}, // SPI-MOSI / PWM4-2 P3.8 + /* 12 */ {XMC_GPIO_PORT3 ,7}, // SPI-MISO P3.7 + /* 13 */ {XMC_GPIO_PORT3 ,9}, // SPI-SCK / LED BUILTIN P3.9 + /* 14 */ {XMC_GPIO_PORT2 ,3}, // AREF TODO: P2.3 + /* 15 */ {XMC_GPIO_PORT3 ,15}, // I2C Data / Address SDA / A4 P3.15 (Hardwired to A4) + /* 16 */ {XMC_GPIO_PORT0 ,13}, // I2C Clock SCL / A5 P0.13 (Hardwired to A5) + /* 17 */ {XMC_GPIO_PORT14 ,0}, // A0 / ADC Input P14.0 (INPUT ONLY) + /* 18 */ {XMC_GPIO_PORT14 ,1}, // A1 / ADC Input P14.1 (INPUT ONLY) + /* 19 */ {XMC_GPIO_PORT14 ,2}, // A2 / ADC Input P14.2 (INPUT ONLY) + /* 20 */ {XMC_GPIO_PORT14 ,3}, // A3 / ADC Input P14.3 (INPUT ONLY) + /* 21 */ {XMC_GPIO_PORT14 ,4}, // A4 / ADC Input / SDA P14.4 (Hardwired to SDA) + /* 22 */ {XMC_GPIO_PORT14 ,5}, // A5 / ADC Input / SCL P14.5 (Hardwired to SCL) + /* 23 */ {XMC_GPIO_PORT3 ,10}, // SPI_SS_2 P3.10 + /* 24 */ {XMC_GPIO_PORT5 ,9}, // Additional LED1 P5.9 + /* 25 */ {XMC_GPIO_PORT5 ,8}, // Additional LED2 P5.8 + /* 26 */ {XMC_GPIO_PORT15 ,13}, // Additional BUTTON1 P15.13 (INPUT ONLY) + /* 27 */ {XMC_GPIO_PORT15 ,12}, // Additional BUTTON2 P15.12 (INPUT ONLY) + /* 28 */ {XMC_GPIO_PORT4 ,1}, // SPI_SS_3 (SD CARD) P4.1 + /* 29 */ {XMC_GPIO_PORT3 ,5}, // SPI-MOSI (SD CARD) P3.5 + /* 30 */ {XMC_GPIO_PORT4 ,0}, // SPI-MISO (SD CARD) P4.0 + /* 31 */ {XMC_GPIO_PORT3 ,6}, // SPI-SCK (SD CARD) P3.6 + /* 32 */ {XMC_GPIO_PORT1 ,6}, // P1.6 + /* 33 */ {XMC_GPIO_PORT1 ,7} // P1.7 +}; +const uint8_t GND = ( sizeof( mapping_port_pin ) / sizeof( XMC_PORT_PIN_t ) ); +const uint8_t NUM_DIGITAL = ( sizeof( mapping_port_pin ) / sizeof( XMC_PORT_PIN_t ) );; + +const XMC_PIN_INTERRUPT_t mapping_interrupt[] = { + /* 0 */ {CCU40, CCU40_CC43, 3, 0, CCU40_IN3_P1_0}, + /* 1 */ {CCU40, CCU40_CC42, 2, 1, CCU40_IN2_P1_1} +}; +const uint8_t NUM_INTERRUPT = ( sizeof( mapping_interrupt ) / sizeof( XMC_PIN_INTERRUPT_t ) ); + +/* Mapping of Arduino Pins to PWM4 channels as pin and index in PWM4 channel + mapping array XMC_PWM4_t mapping_pwm4[] + last entry 255 for both parts. + Putting both parts in array means if a PWM4 channel gets reassigned for + another function later a gap in channel numbers will not mess things up */ +const uint8_t mapping_pin_PWM4[][ 2 ] = { + { 3, 0 }, + { 10, 1 }, + { 11, 2 }, + { 255, 255 } }; + +/* Configurations of PWM channels for CCU4 type */ +XMC_PWM4_t mapping_pwm4[] = + { + {CCU40, CCU40_CC42, 2, mapping_port_pin[3], P1_1_AF_CCU40_OUT2, DISABLED}, // PWM disabled 3 P1.1 + {CCU41, CCU41_CC40, 0, mapping_port_pin[10], P3_10_AF_CCU41_OUT0, DISABLED}, // PWM disabled 10 P3.10 + {CCU41, CCU41_CC42, 2, mapping_port_pin[11], P3_8_AF_CCU41_OUT2, DISABLED} // PWM disabled 11 P3.8 + }; +const uint8_t NUM_PWM4 = ( sizeof( mapping_pwm4 ) / sizeof( XMC_PWM4_t ) ); + +/* Mapping in same manner as PWM4 for PWM8 channels */ +const uint8_t mapping_pin_PWM8[][ 2 ] = { + { 5, 0 }, + { 6, 1 }, + { 9, 2 }, + { 255, 255 } }; + +/* Configurations of PWM channels for CCU8 type */ +XMC_PWM8_t mapping_pwm8[] = + { + {CCU81, CCU81_CC83, 3, XMC_CCU8_SLICE_COMPARE_CHANNEL_2, mapping_port_pin[5], P2_12_AF_CCU81_OUT33, DISABLED}, // PWM disabled 5 P2.12 + {CCU80, CCU80_CC82, 2, XMC_CCU8_SLICE_COMPARE_CHANNEL_2, mapping_port_pin[6], P2_11_AF_CCU80_OUT22, DISABLED}, // PWM disabled 6 P2.11 + {CCU81, CCU81_CC81, 1, XMC_CCU8_SLICE_COMPARE_CHANNEL_1, mapping_port_pin[9], P1_11_AF_CCU81_OUT11, DISABLED} // PWM disabled 9 P1.11 + }; +const uint8_t NUM_PWM8 = ( sizeof( mapping_pwm8 ) / sizeof( XMC_PWM8_t ) ); +const uint8_t NUM_PWM = ( sizeof( mapping_pwm4 ) / sizeof( XMC_PWM4_t ) ) + + ( sizeof( mapping_pwm8 ) / sizeof( XMC_PWM8_t ) ); + +/* Analog Pin mappings and configurations */ +XMC_ADC_t mapping_adc[] = + { + {VADC, 0, VADC_G0, 0, 4 , DISABLED}, + {VADC, 1, VADC_G0, 0, 15, DISABLED}, + {VADC, 2, VADC_G1, 1, 15, DISABLED}, + {VADC, 3, VADC_G1, 1, 3 , DISABLED}, + {VADC, 0, VADC_G2, 2, 1 , DISABLED}, + {VADC, 1, VADC_G2, 2, 0 , DISABLED} + }; +const uint8_t NUM_ANALOG_INPUTS = ( sizeof( mapping_adc ) / sizeof( XMC_ADC_t ) ); + +/* + * UART objects + * + * Serial 0 is Debug port + * Serial 1 is on-board port + */ +RingBuffer rx_buffer_debug; +RingBuffer tx_buffer_debug; +RingBuffer rx_buffer_on_board; +RingBuffer tx_buffer_on_board; + +XMC_UART_t XMC_UART_debug = +{ + .channel = XMC_UART0_CH0, + .rx = { .port = (XMC_GPIO_PORT_t *)PORT1_BASE, + .pin = (uint8_t)4 + }, + .rx_config = { .mode = XMC_GPIO_MODE_INPUT_TRISTATE, + .output_level = XMC_GPIO_OUTPUT_LEVEL_HIGH, + .output_strength = XMC_GPIO_OUTPUT_STRENGTH_STRONG_SOFT_EDGE + }, + .tx = { .port = (XMC_GPIO_PORT_t *)PORT1_BASE, + .pin = (uint8_t)5 + }, + .tx_config = { .mode = (XMC_GPIO_MODE_t) XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT2, + .output_level = XMC_GPIO_OUTPUT_LEVEL_HIGH, + .output_strength = XMC_GPIO_OUTPUT_STRENGTH_STRONG_SOFT_EDGE + }, + .input_source = (XMC_USIC_CH_INPUT_t)USIC0_C0_DX0_P1_4, + .irq_num = USIC0_0_IRQn, + .irq_service_request = 0 +}; + +XMC_UART_t XMC_UART_1 = +{ + .channel = XMC_UART1_CH0, + .rx = { .port = (XMC_GPIO_PORT_t *)PORT2_BASE, + .pin = (uint8_t)15 + }, + .rx_config = { .mode = XMC_GPIO_MODE_INPUT_TRISTATE, + .output_level = XMC_GPIO_OUTPUT_LEVEL_HIGH, + .output_strength = XMC_GPIO_OUTPUT_STRENGTH_STRONG_SOFT_EDGE + }, + .tx = { .port = (XMC_GPIO_PORT_t *)PORT2_BASE, + .pin = (uint8_t)14 + }, + .tx_config = { .mode = (XMC_GPIO_MODE_t) XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT2, + .output_level = XMC_GPIO_OUTPUT_LEVEL_HIGH, + .output_strength = XMC_GPIO_OUTPUT_STRENGTH_STRONG_SOFT_EDGE + }, + .input_source = (XMC_USIC_CH_INPUT_t)USIC1_C0_DX0_P2_15, + .irq_num = USIC1_0_IRQn, + .irq_service_request = 0 +}; + +// Debug port +HardWwareSerial Serial( &XMC_UART_0, &rx_buffer_0, &tx_buffer_0 ); +// On-board port +HardwareSerial Serial1( &XMC_UART_1, &rx_buffer_1, &tx_buffer_1 ); + +// Serial Interrupt and event handling +#ifdef __cplusplus +extern "C" { +#endif +void serialEventRun( ); +void serialEvent( ) __attribute__((weak)); +void serialEvent1( ) __attribute__((weak)); + + +void serialEventRun( ) +{ +if( serialEvent ) + { + if( Serial.available( ) ) + serialEvent( ); + } +if( serialEvent1 ) + { + if( Serial1.available( ) ) + serialEvent1( ); + } +} + + +void USIC0_0_IRQHandler( ) +{ +Serial.IrqHandler( ); +} + + +void USIC1_0_IRQHandler( ) +{ +Serial1.IrqHandler( ); +} +#ifdef __cplusplus +} +#endif +#endif /* ARDUINO_MAIN */ + +#ifdef __cplusplus +extern HardwareSerial Serial; +extern HardwareSerial Serial1; +#endif /* cplusplus */ + +#endif /* PINS_ARDUINO_H_ */ diff --git a/variants/XMC4800/linker_script.ld b/variants/XMC4800/linker_script.ld new file mode 100644 index 00000000..f78f953f --- /dev/null +++ b/variants/XMC4800/linker_script.ld @@ -0,0 +1,287 @@ +/** + * @file XMC4800x2048.ld + * @date 2016-03-08 + * + * @cond + ********************************************************************************************************************* + * Linker file for the GNU C Compiler v1.2 + * Supported devices: XMC4800-E196x2048 + * XMC4800-F144x2048 + * XMC4800-F100x2048 + * + * Copyright (c) 2015-2016, Infineon Technologies AG + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the + * following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * + * Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following + * disclaimer in the documentation and/or other materials provided with the distribution. + * + * Neither the name of the copyright holders nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY,OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * To improve the quality of the software, users are encouraged to share modifications, enhancements or bug fixes with + * Infineon Technologies AG dave@infineon.com). + ********************************************************************************************************************* + * + * Change History + * -------------- + * + * 2015-05-22: + * - Initial version + * + * 2015-07-13: + * - Updates from ARM template for C++ and fixes for GCC 4.9q2 + * + * 2016-03-08: + * - Fix size of BSS and DATA sections to be multiple of 4 + * - Add assertion to check that region SRAM_combined does not overflowed no_init section + * + * @endcond + * + */ + +OUTPUT_FORMAT("elf32-littlearm") +OUTPUT_ARCH(arm) +ENTRY(Reset_Handler) + +stack_size = DEFINED(stack_size) ? stack_size : 2048; +no_init_size = 64; + +MEMORY +{ + FLASH_1_cached(RX) : ORIGIN = 0x08000000, LENGTH = 0x00200000 + FLASH_1_uncached(RX) : ORIGIN = 0x0C000000, LENGTH = 0x00200000 + PSRAM_1(!RX) : ORIGIN = 0x1FFE8000, LENGTH = 0x18000 + DSRAM_1_system(!RX) : ORIGIN = 0x20000000, LENGTH = 0x20000 + DSRAM_2_comm(!RX) : ORIGIN = 0x20020000, LENGTH = 0x20000 + SRAM_combined(!RX) : ORIGIN = 0x1FFE8000, LENGTH = 0x00058000 +} + +SECTIONS +{ + /* TEXT section */ + + .text : + { + sText = .; + KEEP(*(.reset)); + *(.text .text.* .gnu.linkonce.t.*); + + /* C++ Support */ + KEEP(*(.init)) + KEEP(*(.fini)) + + /* .ctors */ + *crtbegin.o(.ctors) + *crtbegin?.o(.ctors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors) + *(SORT(.ctors.*)) + *(.ctors) + + /* .dtors */ + *crtbegin.o(.dtors) + *crtbegin?.o(.dtors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) + *(SORT(.dtors.*)) + *(.dtors) + + *(.rodata .rodata.*) + *(.gnu.linkonce.r*) + + . = ALIGN(4); + } > FLASH_1_cached AT > FLASH_1_uncached + + .eh_frame_hdr : ALIGN (4) + { + KEEP (*(.eh_frame_hdr)) + } > FLASH_1_cached AT > FLASH_1_uncached + + .eh_frame : ALIGN (4) + { + KEEP (*(.eh_frame)) + } > FLASH_1_cached AT > FLASH_1_uncached + + /* Exception handling, exidx needs a dedicated section */ + .ARM.extab : ALIGN(4) + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > FLASH_1_cached AT > FLASH_1_uncached + + . = ALIGN(4); + __exidx_start = .; + .ARM.exidx : ALIGN(4) + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } > FLASH_1_cached AT > FLASH_1_uncached + __exidx_end = .; + . = ALIGN(4); + + /* DSRAM layout (Lowest to highest)*/ + Stack (NOLOAD) : + { + __stack_start = .; + . = . + stack_size; + __stack_end = .; + __initial_sp = .; + } > SRAM_combined + + /* functions with __attribute__((section(".ram_code"))) */ + .ram_code : + { + . = ALIGN(4); /* section size must be multiple of 4 */ + __ram_code_start = .; + *(.ram_code) + . = ALIGN(4); /* section size must be multiple of 4 */ + __ram_code_end = .; + } > SRAM_combined AT > FLASH_1_uncached + __ram_code_load = LOADADDR (.ram_code); + __ram_code_size = __ram_code_end - __ram_code_start; + + /* Standard DATA and user defined DATA/BSS/CONST sections */ + .data : + { + . = ALIGN(4); /* section size must be multiple of 4 */ + __data_start = .; + *(vtable) + * (.data); + * (.data*); + *(*.data); + *(.gnu.linkonce.d*) + + . = ALIGN(4); + /* preinit data */ + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP(*(.preinit_array)) + PROVIDE_HIDDEN (__preinit_array_end = .); + + . = ALIGN(4); + /* init data */ + PROVIDE_HIDDEN (__init_array_start = .); + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + PROVIDE_HIDDEN (__init_array_end = .); + + . = ALIGN(4); + /* finit data */ + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP(*(SORT(.fini_array.*))) + KEEP(*(.fini_array)) + PROVIDE_HIDDEN (__fini_array_end = .); + + . = ALIGN(4); /* section size must be multiple of 4 */ + __data_end = .; + } > SRAM_combined AT > FLASH_1_uncached + __data_load = LOADADDR (.data); + __data_size = __data_end - __data_start; + + /* BSS section */ + .bss (NOLOAD) : + { + . = ALIGN(4); /* section size must be multiple of 4 */ + __bss_start = .; + * (.bss); + * (.bss*); + * (COMMON); + *(.gnu.linkonce.b*) + . = ALIGN(4); /* section size must be multiple of 4 */ + __bss_end = .; + } > SRAM_combined + __bss_size = __bss_end - __bss_start; + + /* Shift location counter, so that ETH_RAM and USB_RAM are located above DSRAM_1_system */ + __shift_loc = (__bss_end >= ORIGIN(DSRAM_1_system)) ? 0 : (ORIGIN(DSRAM_1_system) - __bss_end); + + USB_RAM (__bss_end + __shift_loc) (NOLOAD) : + { + . = ALIGN(4); /* section size must be multiple of 4 */ + USB_RAM_start = .; + *(USB_RAM) + . = ALIGN(4); /* section size must be multiple of 4 */ + USB_RAM_end = .; + } > SRAM_combined + USB_RAM_size = USB_RAM_end - USB_RAM_start; + + ETH_RAM (USB_RAM_end) (NOLOAD) : + { + . = ALIGN(4); /* section size must be multiple of 4 */ + ETH_RAM_start = .; + *(ETH_RAM) + . = ALIGN(4); /* section size must be multiple of 4 */ + ETH_RAM_end = .; + . = ALIGN(8); + Heap_Bank1_Start = .; + } > SRAM_combined + ETH_RAM_size = ETH_RAM_end - ETH_RAM_start; + + __malloc_heap_start = Heap_Bank1_Start; + __malloc_heap_end = __malloc_heap_start + 0x2000; + end = __malloc_heap_end; + __malloc_heap_size = __malloc_heap_end - __malloc_heap_start; + + /* .no_init section contains chipid, SystemCoreClock and trimming data. See system.c file*/ + .no_init ORIGIN(SRAM_combined) + LENGTH(SRAM_combined) - no_init_size (NOLOAD) : + { + Heap_Bank1_End = .; + * (.no_init); + } > SRAM_combined + + /* Heap - Bank1*/ + Heap_Bank1_Size = Heap_Bank1_End - Heap_Bank1_Start; + + ASSERT(Heap_Bank1_Start <= Heap_Bank1_End, "region SRAM_combined overflowed no_init section") + + /DISCARD/ : + { + *(.comment) + } + + .stab 0 (NOLOAD) : { *(.stab) } + .stabstr 0 (NOLOAD) : { *(.stabstr) } + + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_pubtypes 0 : { *(.debug_pubtypes) } + + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + + /* DWARF 2.1 */ + .debug_ranges 0 : { *(.debug_ranges) } + + /* SGI/MIPS DWARF 2 extensions */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } + + /* Build attributes */ + .build_attributes 0 : { *(.ARM.attributes) } +} diff --git a/variants/XMC4800/startup_XMC4800.S b/variants/XMC4800/startup_XMC4800.S new file mode 100644 index 00000000..15c036a4 --- /dev/null +++ b/variants/XMC4800/startup_XMC4800.S @@ -0,0 +1,440 @@ +/********************************************************************************************************************* + * @file startup_XMC4800.S + * @brief CMSIS Core Device Startup File for Infineon XMC4800 Device Series + * @version V1.2 + * @date 24 Jan 2020 + * + * @cond + ********************************************************************************************************************* + * Copyright (c) 2015-2016, Infineon Technologies AG + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the + * following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * + * Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following + * disclaimer in the documentation and/or other materials provided with the distribution. + * + * Neither the name of the copyright holders nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY,OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * To improve the quality of the software, users are encouraged to share modifications, enhancements or bug fixes with + * Infineon Technologies AG dave@infineon.com). + ********************************************************************************************************************* + * + **************************** Change history ******************************** + * V1.0,Sep, 03, 2015 JFT:Initial version + * V1.1,Jan, 05, 2016 JFT:Fix .reset section attributes + * V1.2,Jan, 24, 2020, Silence compiler warning + * + * @endcond + */ + +/* Silence "IT blocks containing more than one conditional instruction + * are deprecated in ARMv8" warning. + * + * XMC4800 is a Cortex-M4, which has an ARMv7E-M architecture. + */ +.arch armv7e-m + +/* ===========START : MACRO DEFINITION MACRO DEFINITION ================== */ + +.macro Entry Handler + .long \Handler +.endm + +.macro Insert_ExceptionHandler Handler_Func + .weak \Handler_Func + .thumb_set \Handler_Func, Default_Handler +.endm + +/* =============END : MACRO DEFINITION MACRO DEFINITION ================== */ + +/* ================== START OF VECTOR TABLE DEFINITION ====================== */ +/* Vector Table - This gets programed into VTOR register by onchip BootROM */ + .syntax unified + + .section .reset, "a", %progbits + + .align 2 + .globl __Vectors + .type __Vectors, %object +__Vectors: + .long __initial_sp /* Top of Stack */ + .long Reset_Handler /* Reset Handler */ + + Entry NMI_Handler /* NMI Handler */ + Entry HardFault_Handler /* Hard Fault Handler */ + Entry MemManage_Handler /* MPU Fault Handler */ + Entry BusFault_Handler /* Bus Fault Handler */ + Entry UsageFault_Handler /* Usage Fault Handler */ + .long 0 /* Reserved */ + .long 0 /* Reserved */ + .long 0 /* Reserved */ + .long 0 /* Reserved */ + Entry SVC_Handler /* SVCall Handler */ + Entry DebugMon_Handler /* Debug Monitor Handler */ + .long 0 /* Reserved */ + Entry PendSV_Handler /* PendSV Handler */ + Entry SysTick_Handler /* SysTick Handler */ + + /* Interrupt Handlers for Service Requests (SR) from XMC4800 Peripherals */ + Entry SCU_0_IRQHandler /* Handler name for SR SCU_0 */ + Entry ERU0_0_IRQHandler /* Handler name for SR ERU0_0 */ + Entry ERU0_1_IRQHandler /* Handler name for SR ERU0_1 */ + Entry ERU0_2_IRQHandler /* Handler name for SR ERU0_2 */ + Entry ERU0_3_IRQHandler /* Handler name for SR ERU0_3 */ + Entry ERU1_0_IRQHandler /* Handler name for SR ERU1_0 */ + Entry ERU1_1_IRQHandler /* Handler name for SR ERU1_1 */ + Entry ERU1_2_IRQHandler /* Handler name for SR ERU1_2 */ + Entry ERU1_3_IRQHandler /* Handler name for SR ERU1_3 */ + .long 0 /* Not Available */ + .long 0 /* Not Available */ + .long 0 /* Not Available */ + Entry PMU0_0_IRQHandler /* Handler name for SR PMU0_0 */ + .long 0 /* Not Available */ + Entry VADC0_C0_0_IRQHandler /* Handler name for SR VADC0_C0_0 */ + Entry VADC0_C0_1_IRQHandler /* Handler name for SR VADC0_C0_1 */ + Entry VADC0_C0_2_IRQHandler /* Handler name for SR VADC0_C0_1 */ + Entry VADC0_C0_3_IRQHandler /* Handler name for SR VADC0_C0_3 */ + Entry VADC0_G0_0_IRQHandler /* Handler name for SR VADC0_G0_0 */ + Entry VADC0_G0_1_IRQHandler /* Handler name for SR VADC0_G0_1 */ + Entry VADC0_G0_2_IRQHandler /* Handler name for SR VADC0_G0_2 */ + Entry VADC0_G0_3_IRQHandler /* Handler name for SR VADC0_G0_3 */ + Entry VADC0_G1_0_IRQHandler /* Handler name for SR VADC0_G1_0 */ + Entry VADC0_G1_1_IRQHandler /* Handler name for SR VADC0_G1_1 */ + Entry VADC0_G1_2_IRQHandler /* Handler name for SR VADC0_G1_2 */ + Entry VADC0_G1_3_IRQHandler /* Handler name for SR VADC0_G1_3 */ + Entry VADC0_G2_0_IRQHandler /* Handler name for SR VADC0_G2_0 */ + Entry VADC0_G2_1_IRQHandler /* Handler name for SR VADC0_G2_1 */ + Entry VADC0_G2_2_IRQHandler /* Handler name for SR VADC0_G2_2 */ + Entry VADC0_G2_3_IRQHandler /* Handler name for SR VADC0_G2_3 */ + Entry VADC0_G3_0_IRQHandler /* Handler name for SR VADC0_G3_0 */ + Entry VADC0_G3_1_IRQHandler /* Handler name for SR VADC0_G3_1 */ + Entry VADC0_G3_2_IRQHandler /* Handler name for SR VADC0_G3_2 */ + Entry VADC0_G3_3_IRQHandler /* Handler name for SR VADC0_G3_3 */ + Entry DSD0_0_IRQHandler /* Handler name for SR DSD0_0 */ + Entry DSD0_1_IRQHandler /* Handler name for SR DSD0_1 */ + Entry DSD0_2_IRQHandler /* Handler name for SR DSD0_2 */ + Entry DSD0_3_IRQHandler /* Handler name for SR DSD0_3 */ + Entry DSD0_4_IRQHandler /* Handler name for SR DSD0_4 */ + Entry DSD0_5_IRQHandler /* Handler name for SR DSD0_5 */ + Entry DSD0_6_IRQHandler /* Handler name for SR DSD0_6 */ + Entry DSD0_7_IRQHandler /* Handler name for SR DSD0_7 */ + Entry DAC0_0_IRQHandler /* Handler name for SR DAC0_0 */ + Entry DAC0_1_IRQHandler /* Handler name for SR DAC0_0 */ + Entry CCU40_0_IRQHandler /* Handler name for SR CCU40_0 */ + Entry CCU40_1_IRQHandler /* Handler name for SR CCU40_1 */ + Entry CCU40_2_IRQHandler /* Handler name for SR CCU40_2 */ + Entry CCU40_3_IRQHandler /* Handler name for SR CCU40_3 */ + Entry CCU41_0_IRQHandler /* Handler name for SR CCU41_0 */ + Entry CCU41_1_IRQHandler /* Handler name for SR CCU41_1 */ + Entry CCU41_2_IRQHandler /* Handler name for SR CCU41_2 */ + Entry CCU41_3_IRQHandler /* Handler name for SR CCU41_3 */ + Entry CCU42_0_IRQHandler /* Handler name for SR CCU42_0 */ + Entry CCU42_1_IRQHandler /* Handler name for SR CCU42_1 */ + Entry CCU42_2_IRQHandler /* Handler name for SR CCU42_2 */ + Entry CCU42_3_IRQHandler /* Handler name for SR CCU42_3 */ + Entry CCU43_0_IRQHandler /* Handler name for SR CCU43_0 */ + Entry CCU43_1_IRQHandler /* Handler name for SR CCU43_1 */ + Entry CCU43_2_IRQHandler /* Handler name for SR CCU43_2 */ + Entry CCU43_3_IRQHandler /* Handler name for SR CCU43_3 */ + Entry CCU80_0_IRQHandler /* Handler name for SR CCU80_0 */ + Entry CCU80_1_IRQHandler /* Handler name for SR CCU80_1 */ + Entry CCU80_2_IRQHandler /* Handler name for SR CCU80_2 */ + Entry CCU80_3_IRQHandler /* Handler name for SR CCU80_3 */ + Entry CCU81_0_IRQHandler /* Handler name for SR CCU81_0 */ + Entry CCU81_1_IRQHandler /* Handler name for SR CCU81_1 */ + Entry CCU81_2_IRQHandler /* Handler name for SR CCU81_2 */ + Entry CCU81_3_IRQHandler /* Handler name for SR CCU81_3 */ + Entry POSIF0_0_IRQHandler /* Handler name for SR POSIF0_0 */ + Entry POSIF0_1_IRQHandler /* Handler name for SR POSIF0_1 */ + Entry POSIF1_0_IRQHandler /* Handler name for SR POSIF1_0 */ + Entry POSIF1_1_IRQHandler /* Handler name for SR POSIF1_1 */ + .long 0 /* Not Available */ + .long 0 /* Not Available */ + .long 0 /* Not Available */ + .long 0 /* Not Available */ + Entry CAN0_0_IRQHandler /* Handler name for SR CAN0_0 */ + Entry CAN0_1_IRQHandler /* Handler name for SR CAN0_1 */ + Entry CAN0_2_IRQHandler /* Handler name for SR CAN0_2 */ + Entry CAN0_3_IRQHandler /* Handler name for SR CAN0_3 */ + Entry CAN0_4_IRQHandler /* Handler name for SR CAN0_4 */ + Entry CAN0_5_IRQHandler /* Handler name for SR CAN0_5 */ + Entry CAN0_6_IRQHandler /* Handler name for SR CAN0_6 */ + Entry CAN0_7_IRQHandler /* Handler name for SR CAN0_7 */ + Entry USIC0_0_IRQHandler /* Handler name for SR USIC0_0 */ + Entry USIC0_1_IRQHandler /* Handler name for SR USIC0_1 */ + Entry USIC0_2_IRQHandler /* Handler name for SR USIC0_2 */ + Entry USIC0_3_IRQHandler /* Handler name for SR USIC0_3 */ + Entry USIC0_4_IRQHandler /* Handler name for SR USIC0_4 */ + Entry USIC0_5_IRQHandler /* Handler name for SR USIC0_5 */ + Entry USIC1_0_IRQHandler /* Handler name for SR USIC1_0 */ + Entry USIC1_1_IRQHandler /* Handler name for SR USIC1_1 */ + Entry USIC1_2_IRQHandler /* Handler name for SR USIC1_2 */ + Entry USIC1_3_IRQHandler /* Handler name for SR USIC1_3 */ + Entry USIC1_4_IRQHandler /* Handler name for SR USIC1_4 */ + Entry USIC1_5_IRQHandler /* Handler name for SR USIC1_5 */ + Entry USIC2_0_IRQHandler /* Handler name for SR USIC2_0 */ + Entry USIC2_1_IRQHandler /* Handler name for SR USIC2_1 */ + Entry USIC2_2_IRQHandler /* Handler name for SR USIC2_2 */ + Entry USIC2_3_IRQHandler /* Handler name for SR USIC2_3 */ + Entry USIC2_4_IRQHandler /* Handler name for SR USIC2_4 */ + Entry USIC2_5_IRQHandler /* Handler name for SR USIC2_5 */ + Entry LEDTS0_0_IRQHandler /* Handler name for SR LEDTS0_0 */ + .long 0 /* Not Available */ + Entry FCE0_0_IRQHandler /* Handler name for SR FCE0_0 */ + Entry GPDMA0_0_IRQHandler /* Handler name for SR GPDMA0_0 */ + Entry SDMMC0_0_IRQHandler /* Handler name for SR SDMMC0_0 */ + Entry USB0_0_IRQHandler /* Handler name for SR USB0_0 */ + Entry ETH0_0_IRQHandler /* Handler name for SR ETH0_0 */ + Entry ECAT0_0_IRQHandler /* Handler name for SR ECAT0_0 */ + Entry GPDMA1_0_IRQHandler /* Handler name for SR GPDMA1_0 */ + .long 0 /* Not Available */ + + .size __Vectors, . - __Vectors +/* ================== END OF VECTOR TABLE DEFINITION ======================= */ + +/* ================== START OF VECTOR ROUTINES ============================= */ + + .align 1 + .thumb + +/* Reset Handler */ + .thumb_func + .globl Reset_Handler + .type Reset_Handler, %function +Reset_Handler: + ldr sp,=__initial_sp + +#ifndef __SKIP_SYSTEM_INIT + ldr r0, =SystemInit + blx r0 +#endif + +/* Initialize data + * + * Between symbol address __copy_table_start__ and __copy_table_end__, + * there are array of triplets, each of which specify: + * offset 0: LMA of start of a section to copy from + * offset 4: VMA of start of a section to copy to + * offset 8: size of the section to copy. Must be multiply of 4 + * + * All addresses must be aligned to 4 bytes boundary. + */ + ldr r4, =__copy_table_start__ + ldr r5, =__copy_table_end__ + +.L_loop0: + cmp r4, r5 + bge .L_loop0_done + ldr r1, [r4] + ldr r2, [r4, #4] + ldr r3, [r4, #8] + +.L_loop0_0: + subs r3, #4 + ittt ge + ldrge r0, [r1, r3] + strge r0, [r2, r3] + bge .L_loop0_0 + + adds r4, #12 + b .L_loop0 + +.L_loop0_done: + +/* Zero initialized data + * Between symbol address __zero_table_start__ and __zero_table_end__, + * there are array of tuples specifying: + * offset 0: Start of a BSS section + * offset 4: Size of this BSS section. Must be multiply of 4 + * + * Define __SKIP_BSS_CLEAR to disable zeroing uninitialzed data in startup. + */ +#ifndef __SKIP_BSS_CLEAR + ldr r3, =__zero_table_start__ + ldr r4, =__zero_table_end__ + +.L_loop2: + cmp r3, r4 + bge .L_loop2_done + ldr r1, [r3] + ldr r2, [r3, #4] + movs r0, 0 + +.L_loop2_0: + subs r2, #4 + itt ge + strge r0, [r1, r2] + bge .L_loop2_0 + + adds r3, #8 + b .L_loop2 +.L_loop2_done: +#endif /* __SKIP_BSS_CLEAR */ + +#ifndef __SKIP_LIBC_INIT_ARRAY + ldr r0, =__libc_init_array + blx r0 +#endif + + ldr r0, =main + blx r0 + +.align 2 +__copy_table_start__: + .long __data_load, __data_start, __data_size + .long __ram_code_load, __ram_code_start, __ram_code_size +__copy_table_end__: + +__zero_table_start__: + .long __bss_start, __bss_size + .long USB_RAM_start, USB_RAM_size + .long ETH_RAM_start, ETH_RAM_size +__zero_table_end__: + + .pool + .size Reset_Handler,.-Reset_Handler + +/* ======================================================================== */ +/* ========== START OF EXCEPTION HANDLER DEFINITION ======================== */ + +/* Default exception Handlers - Users may override this default functionality by + defining handlers of the same name in their C code */ + + .align 1 + .thumb_func + .weak Default_Handler + .type Default_Handler, %function +Default_Handler: + b . + .size Default_Handler, . - Default_Handler + + Insert_ExceptionHandler NMI_Handler + Insert_ExceptionHandler HardFault_Handler + Insert_ExceptionHandler MemManage_Handler + Insert_ExceptionHandler BusFault_Handler + Insert_ExceptionHandler UsageFault_Handler + Insert_ExceptionHandler SVC_Handler + Insert_ExceptionHandler DebugMon_Handler + Insert_ExceptionHandler PendSV_Handler + Insert_ExceptionHandler SysTick_Handler + + Insert_ExceptionHandler SCU_0_IRQHandler + Insert_ExceptionHandler ERU0_0_IRQHandler + Insert_ExceptionHandler ERU0_1_IRQHandler + Insert_ExceptionHandler ERU0_2_IRQHandler + Insert_ExceptionHandler ERU0_3_IRQHandler + Insert_ExceptionHandler ERU1_0_IRQHandler + Insert_ExceptionHandler ERU1_1_IRQHandler + Insert_ExceptionHandler ERU1_2_IRQHandler + Insert_ExceptionHandler ERU1_3_IRQHandler + Insert_ExceptionHandler PMU0_0_IRQHandler + Insert_ExceptionHandler VADC0_C0_0_IRQHandler + Insert_ExceptionHandler VADC0_C0_1_IRQHandler + Insert_ExceptionHandler VADC0_C0_2_IRQHandler + Insert_ExceptionHandler VADC0_C0_3_IRQHandler + Insert_ExceptionHandler VADC0_G0_0_IRQHandler + Insert_ExceptionHandler VADC0_G0_1_IRQHandler + Insert_ExceptionHandler VADC0_G0_2_IRQHandler + Insert_ExceptionHandler VADC0_G0_3_IRQHandler + Insert_ExceptionHandler VADC0_G1_0_IRQHandler + Insert_ExceptionHandler VADC0_G1_1_IRQHandler + Insert_ExceptionHandler VADC0_G1_2_IRQHandler + Insert_ExceptionHandler VADC0_G1_3_IRQHandler + Insert_ExceptionHandler VADC0_G2_0_IRQHandler + Insert_ExceptionHandler VADC0_G2_1_IRQHandler + Insert_ExceptionHandler VADC0_G2_2_IRQHandler + Insert_ExceptionHandler VADC0_G2_3_IRQHandler + Insert_ExceptionHandler VADC0_G3_0_IRQHandler + Insert_ExceptionHandler VADC0_G3_1_IRQHandler + Insert_ExceptionHandler VADC0_G3_2_IRQHandler + Insert_ExceptionHandler VADC0_G3_3_IRQHandler + Insert_ExceptionHandler DSD0_0_IRQHandler + Insert_ExceptionHandler DSD0_1_IRQHandler + Insert_ExceptionHandler DSD0_2_IRQHandler + Insert_ExceptionHandler DSD0_3_IRQHandler + Insert_ExceptionHandler DSD0_4_IRQHandler + Insert_ExceptionHandler DSD0_5_IRQHandler + Insert_ExceptionHandler DSD0_6_IRQHandler + Insert_ExceptionHandler DSD0_7_IRQHandler + Insert_ExceptionHandler DAC0_0_IRQHandler + Insert_ExceptionHandler DAC0_1_IRQHandler + Insert_ExceptionHandler CCU40_0_IRQHandler + Insert_ExceptionHandler CCU40_1_IRQHandler + Insert_ExceptionHandler CCU40_2_IRQHandler + Insert_ExceptionHandler CCU40_3_IRQHandler + Insert_ExceptionHandler CCU41_0_IRQHandler + Insert_ExceptionHandler CCU41_1_IRQHandler + Insert_ExceptionHandler CCU41_2_IRQHandler + Insert_ExceptionHandler CCU41_3_IRQHandler + Insert_ExceptionHandler CCU42_0_IRQHandler + Insert_ExceptionHandler CCU42_1_IRQHandler + Insert_ExceptionHandler CCU42_2_IRQHandler + Insert_ExceptionHandler CCU42_3_IRQHandler + Insert_ExceptionHandler CCU43_0_IRQHandler + Insert_ExceptionHandler CCU43_1_IRQHandler + Insert_ExceptionHandler CCU43_2_IRQHandler + Insert_ExceptionHandler CCU43_3_IRQHandler + Insert_ExceptionHandler CCU80_0_IRQHandler + Insert_ExceptionHandler CCU80_1_IRQHandler + Insert_ExceptionHandler CCU80_2_IRQHandler + Insert_ExceptionHandler CCU80_3_IRQHandler + Insert_ExceptionHandler CCU81_0_IRQHandler + Insert_ExceptionHandler CCU81_1_IRQHandler + Insert_ExceptionHandler CCU81_2_IRQHandler + Insert_ExceptionHandler CCU81_3_IRQHandler + Insert_ExceptionHandler POSIF0_0_IRQHandler + Insert_ExceptionHandler POSIF0_1_IRQHandler + Insert_ExceptionHandler POSIF1_0_IRQHandler + Insert_ExceptionHandler POSIF1_1_IRQHandler + Insert_ExceptionHandler CAN0_0_IRQHandler + Insert_ExceptionHandler CAN0_1_IRQHandler + Insert_ExceptionHandler CAN0_2_IRQHandler + Insert_ExceptionHandler CAN0_3_IRQHandler + Insert_ExceptionHandler CAN0_4_IRQHandler + Insert_ExceptionHandler CAN0_5_IRQHandler + Insert_ExceptionHandler CAN0_6_IRQHandler + Insert_ExceptionHandler CAN0_7_IRQHandler + Insert_ExceptionHandler USIC0_0_IRQHandler + Insert_ExceptionHandler USIC0_1_IRQHandler + Insert_ExceptionHandler USIC0_2_IRQHandler + Insert_ExceptionHandler USIC0_3_IRQHandler + Insert_ExceptionHandler USIC0_4_IRQHandler + Insert_ExceptionHandler USIC0_5_IRQHandler + Insert_ExceptionHandler USIC1_0_IRQHandler + Insert_ExceptionHandler USIC1_1_IRQHandler + Insert_ExceptionHandler USIC1_2_IRQHandler + Insert_ExceptionHandler USIC1_3_IRQHandler + Insert_ExceptionHandler USIC1_4_IRQHandler + Insert_ExceptionHandler USIC1_5_IRQHandler + Insert_ExceptionHandler USIC2_0_IRQHandler + Insert_ExceptionHandler USIC2_1_IRQHandler + Insert_ExceptionHandler USIC2_2_IRQHandler + Insert_ExceptionHandler USIC2_3_IRQHandler + Insert_ExceptionHandler USIC2_4_IRQHandler + Insert_ExceptionHandler USIC2_5_IRQHandler + Insert_ExceptionHandler LEDTS0_0_IRQHandler + Insert_ExceptionHandler FCE0_0_IRQHandler + Insert_ExceptionHandler GPDMA0_0_IRQHandler + Insert_ExceptionHandler SDMMC0_0_IRQHandler + Insert_ExceptionHandler USB0_0_IRQHandler + Insert_ExceptionHandler ETH0_0_IRQHandler + Insert_ExceptionHandler ECAT0_0_IRQHandler + Insert_ExceptionHandler GPDMA1_0_IRQHandler + +/* ============= END OF INTERRUPT HANDLER DEFINITION ====================== */ + + .end diff --git a/variants/XMC4800/system_XMC4800.c b/variants/XMC4800/system_XMC4800.c new file mode 100644 index 00000000..9f177755 --- /dev/null +++ b/variants/XMC4800/system_XMC4800.c @@ -0,0 +1,748 @@ +/********************************************************************************************************************* + * @file system_XMC4800.c + * @brief CMSIS Cortex-M4 Device Peripheral Access Layer Header File for the Infineon XMC4800 Device Series + * @version V1.0.4 + * @date 19. Jun 2017 + * + * @cond + ********************************************************************************************************************* + * Copyright (c) 2015-2017, Infineon Technologies AG + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the + * following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * + * Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following + * disclaimer in the documentation and/or other materials provided with the distribution. + * + * Neither the name of the copyright holders nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY,OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * To improve the quality of the software, users are encouraged to share modifications, enhancements or bug fixes with + * Infineon Technologies AG dave@infineon.com). + ********************************************************************************************************************* + * + ********************** Version History *************************************** + * V1.0.0, 22. May 2015, Initial version + * V1.0.1, 26. Jan 2016, Disable trap generation from clock unit + * V1.0.2, 01. Jun 2016, Fix masking of OSCHPCTRL value + * V1.0.3, 09. Feb 2017, Fix activation of USBPLL when SDMMC clock is enabled + * V1.0.4, 19. Jun 2017, Rely on cmsis_compiler.h instead of defining __WEAK + ****************************************************************************** +* @endcond +*/ + +/******************************************************************************* + * Default clock initialization + * fPLL = 288MHz => fSYS = 144MHz => fCPU = 144MHz + * => fPB = 144MHz + * => fCCU = 144MHz + * => fETH = 72MHz + * => fUSB = 48MHz + * => fEBU = 72MHz + * + * fUSBPLL = 200MHz => fECAT = 100MHz + * + * fOFI = 24MHz => fWDT = 24MHz + *******************************************************************************/ + +/******************************************************************************* + * HEADER FILES + *******************************************************************************/ +#include + +#include +#include "system_XMC4800.h" + +/******************************************************************************* + * MACROS + *******************************************************************************/ +#define CHIPID_LOC ((uint8_t *)0x20000000UL) + +#define PMU_FLASH_WS (0x4U) + +#define FOSCREF (2500000U) + +#define DELAY_CNT_50US_50MHZ (2500UL) +#define DELAY_CNT_150US_50MHZ (7500UL) +#define DELAY_CNT_50US_48MHZ (2400UL) +#define DELAY_CNT_50US_72MHZ (3600UL) +#define DELAY_CNT_50US_96MHZ (4800UL) +#define DELAY_CNT_50US_120MHZ (6000UL) +#define DELAY_CNT_50US_144MHZ (7200UL) + +#define SCU_PLL_PLLSTAT_OSC_USABLE (SCU_PLL_PLLSTAT_PLLHV_Msk | \ + SCU_PLL_PLLSTAT_PLLLV_Msk | \ + SCU_PLL_PLLSTAT_PLLSP_Msk) + +/* +//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------ +*/ + +/* +// Clock configuration +*/ + +/* +// External crystal frequency [Hz] +// <8000000=> 8MHz +// <12000000=> 12MHz +// <16000000=> 16MHz +// Defines external crystal frequency +// Default: 8MHz +*/ +#define OSCHP_FREQUENCY (12000000U) + +/* USB PLL settings, fUSBPLL = 200MHz */ +/* Note: Implicit divider of 2, fUSBPLLVCO = 400MHz */ +#if OSCHP_FREQUENCY == 8000000U +#define USB_PDIV (1U) +#define USB_NDIV (99U) + +#elif OSCHP_FREQUENCY == 12000000U +#define USB_PDIV (2U) +#define USB_NDIV (99U) + +#elif OSCHP_FREQUENCY == 16000000U +#define USB_PDIV (3U) +#define USB_NDIV (99U) + +#else +#error "External crystal frequency not supported" + +#endif + +/* +// Backup clock calibration mode +// <0=> Factory calibration +// <1=> Automatic calibration +// Default: Automatic calibration +*/ +#define FOFI_CALIBRATION_MODE 1 +#define FOFI_CALIBRATION_MODE_FACTORY 0 +#define FOFI_CALIBRATION_MODE_AUTOMATIC 1 + +/* +// Standby clock (fSTDBY) source selection +// <0=> Internal slow oscillator (32768Hz) +// <1=> External crystal (32768Hz) +// Default: Internal slow oscillator (32768Hz) +*/ +#define STDBY_CLOCK_SRC 0 +#define STDBY_CLOCK_SRC_OSI 0 +#define STDBY_CLOCK_SRC_OSCULP 1 + +/* +// PLL clock source selection +// <0=> External crystal +// <1=> Internal fast oscillator +// Default: External crystal +*/ +#define PLL_CLOCK_SRC 0 +#define PLL_CLOCK_SRC_EXT_XTAL 0 +#define PLL_CLOCK_SRC_OFI 1 + +/* PLL settings, fPLL = 288MHz */ +#if PLL_CLOCK_SRC == PLL_CLOCK_SRC_EXT_XTAL +#if OSCHP_FREQUENCY == 8000000U +#define PLL_PDIV (1U) +#define PLL_NDIV (71U) +#define PLL_K2DIV (0U) + +#elif OSCHP_FREQUENCY == 12000000U +#define PLL_PDIV (1U) +#define PLL_NDIV (47U) +#define PLL_K2DIV (0U) + +#elif OSCHP_FREQUENCY == 16000000U +#define PLL_PDIV (1U) +#define PLL_NDIV (35U) +#define PLL_K2DIV (0U) + +#else +#error "External crystal frequency not supported" + +#endif + +#define VCO ((OSCHP_FREQUENCY / (PLL_PDIV + 1UL)) * (PLL_NDIV + 1UL)) + +#else /* PLL_CLOCK_SRC == PLL_CLOCK_SRC_EXT_XTAL */ +#define PLL_PDIV (1U) +#define PLL_NDIV (23U) +#define PLL_K2DIV (0U) + +#define VCO ((OFI_FREQUENCY / (PLL_PDIV + 1UL)) * (PLL_NDIV + 1UL)) + +#endif /* PLL_CLOCK_SRC == PLL_CLOCK_SRC_OFI */ + +#define PLL_K2DIV_24MHZ ((VCO / OFI_FREQUENCY) - 1UL) +#define PLL_K2DIV_48MHZ ((VCO / 48000000U) - 1UL) +#define PLL_K2DIV_72MHZ ((VCO / 72000000U) - 1UL) +#define PLL_K2DIV_96MHZ ((VCO / 96000000U) - 1UL) +#define PLL_K2DIV_120MHZ ((VCO / 120000000U) - 1UL) + +#define SCU_CLK_CLKCLR_ENABLE_USBCLK SCU_CLK_CLKCLR_USBCDI_Msk +#define SCU_CLK_CLKCLR_ENABLE_MMCCLK SCU_CLK_CLKCLR_MMCCDI_Msk +#define SCU_CLK_CLKCLR_ENABLE_ETHCLK SCU_CLK_CLKCLR_ETH0CDI_Msk +#define SCU_CLK_CLKCLR_ENABLE_EBUCLK SCU_CLK_CLKCLR_EBUCDI_Msk +#define SCU_CLK_CLKCLR_ENABLE_CCUCLK SCU_CLK_CLKCLR_CCUCDI_Msk + +#define SCU_CLK_SYSCLKCR_SYSSEL_OFI (0U << SCU_CLK_SYSCLKCR_SYSSEL_Pos) +#define SCU_CLK_SYSCLKCR_SYSSEL_PLL (1U << SCU_CLK_SYSCLKCR_SYSSEL_Pos) + +#define SCU_CLK_USBCLKCR_USBSEL_USBPLL (0U << SCU_CLK_USBCLKCR_USBSEL_Pos) +#define SCU_CLK_USBCLKCR_USBSEL_PLL (1U << SCU_CLK_USBCLKCR_USBSEL_Pos) + +#define SCU_CLK_ECATCLKCR_ECATSEL_USBPLL (0U << SCU_CLK_ECATCLKCR_ECATSEL_Pos) +#define SCU_CLK_ECATCLKCR_ECATSEL_PLL (1U << SCU_CLK_ECATCLKCR_ECATSEL_Pos) + +#define SCU_CLK_WDTCLKCR_WDTSEL_OFI (0U << SCU_CLK_WDTCLKCR_WDTSEL_Pos) +#define SCU_CLK_WDTCLKCR_WDTSEL_STANDBY (1U << SCU_CLK_WDTCLKCR_WDTSEL_Pos) +#define SCU_CLK_WDTCLKCR_WDTSEL_PLL (2U << SCU_CLK_WDTCLKCR_WDTSEL_Pos) + +#define SCU_CLK_EXTCLKCR_ECKSEL_SYS (0U << SCU_CLK_EXTCLKCR_ECKSEL_Pos) +#define SCU_CLK_EXTCLKCR_ECKSEL_USBPLL (2U << SCU_CLK_EXTCLKCR_ECKSEL_Pos) +#define SCU_CLK_EXTCLKCR_ECKSEL_PLL (3U << SCU_CLK_EXTCLKCR_ECKSEL_Pos) + +#define EXTCLK_PIN_P0_8 (1) +#define EXTCLK_PIN_P1_15 (2) + +/* +// Clock tree +// System clock source selection +// <0=> fOFI +// <1=> fPLL +// Default: fPLL +// System clock divider <1-256><#-1> +// Default: 2 +// CPU clock divider +// <0=> fCPU = fSYS +// <1=> fCPU = fSYS / 2 +// Default: fCPU = fSYS +// Peripheral clock divider +// <0=> fPB = fCPU +// <1=> fPB = fCPU / 2 +// Default: fPB = fCPU +// CCU clock divider +// <0=> fCCU = fCPU +// <1=> fCCU = fCPU / 2 +// Default: fCCU = fCPU +// Enable WDT clock +// WDT clock source <0=> fOFI +// <1=> fSTDBY +// <2=> fPLL +// Default: fOFI +// WDT clock divider <1-256><#-1> +// Default: 1 +// +// Enable EBU clock +// EBU clock divider <1-64><#-1> +// Default: 4 +// +// Enable ETH clock +// +// Enable MMC clock +// +// Enable USB clock +// USB clock source <0=> fUSBPLL +// <1=> fPLL +// Default: fPLL +// USB clock source divider <1-8><#-1> +// Default: 6 +// +// ECAT clock source <0=> fUSBPLL +// <1=> fPLL +// Default: fUSBPLL +// ECAT clock divider <1-4><#-1> +// Default: 2 +// Enable external clock +// External Clock Source Selection +// <0=> fSYS +// <2=> fUSB +// <3=> fPLL +// Default: fPLL +// External Clock divider <1-512><#-1> +// Default: 288 +// Only valid for USB PLL and PLL clocks +// External Clock Pin Selection +// <0=> Disabled +// <1=> P0.8 +// <2=> P1.15 +// Default: Disabled +// +// +*/ +#define __CLKSET (0x00000000UL) +#define __SYSCLKCR (0x00010001UL) +#define __CPUCLKCR (0x00000000UL) +#define __PBCLKCR (0x00000000UL) +#define __CCUCLKCR (0x00000000UL) +#define __WDTCLKCR (0x00000000UL) +#define __EBUCLKCR (0x00000003UL) +#define __USBCLKCR (0x00010005UL) +#define __ECATCLKCR (0x00000001UL) + +#define __EXTCLKCR (0x01200003UL) +#define __EXTCLKPIN (0U) + +/* +// +*/ + +/* +//-------- <<< end of configuration section >>> ------------------ +*/ + +#define ENABLE_PLL \ + (((__SYSCLKCR & SCU_CLK_SYSCLKCR_SYSSEL_Msk) == SCU_CLK_SYSCLKCR_SYSSEL_PLL) || \ + ((__ECATCLKCR & SCU_CLK_ECATCLKCR_ECATSEL_Msk) == SCU_CLK_ECATCLKCR_ECATSEL_PLL) || \ + ((__CLKSET & SCU_CLK_CLKSET_EBUCEN_Msk) != 0) || \ + (((__CLKSET & SCU_CLK_CLKSET_USBCEN_Msk) != 0) && ((__USBCLKCR & SCU_CLK_USBCLKCR_USBSEL_Msk) == SCU_CLK_USBCLKCR_USBSEL_PLL)) || \ + (((__CLKSET & SCU_CLK_CLKSET_WDTCEN_Msk) != 0) && ((__WDTCLKCR & SCU_CLK_WDTCLKCR_WDTSEL_Msk) == SCU_CLK_WDTCLKCR_WDTSEL_PLL))) + +#define ENABLE_USBPLL \ + (((__ECATCLKCR & SCU_CLK_ECATCLKCR_ECATSEL_Msk) == SCU_CLK_ECATCLKCR_ECATSEL_USBPLL) || \ + (((__CLKSET & SCU_CLK_CLKSET_USBCEN_Msk) != 0) && ((__USBCLKCR & SCU_CLK_USBCLKCR_USBSEL_Msk) == SCU_CLK_USBCLKCR_USBSEL_USBPLL)) || \ + (((__CLKSET & SCU_CLK_CLKSET_MMCCEN_Msk) != 0) && ((__USBCLKCR & SCU_CLK_USBCLKCR_USBSEL_Msk) == SCU_CLK_USBCLKCR_USBSEL_USBPLL))) + +/******************************************************************************* + * GLOBAL VARIABLES + *******************************************************************************/ +#if defined ( __CC_ARM ) +#if defined(XMC4800_E196x2048) || defined(XMC4800_F144x2048) || defined(XMC4800_F100x2048) +uint32_t SystemCoreClock __attribute__((at(0x2003FFC0))); +uint8_t g_chipid[16] __attribute__((at(0x2003FFC4))); +#elif defined(XMC4800_E196x1536) || defined(XMC4800_F144x1536) || defined(XMC4800_F100x1536) +uint32_t SystemCoreClock __attribute__((at(0x2002CFC0))); +uint8_t g_chipid[16] __attribute__((at(0x2002CFC4))); +#elif defined(XMC4800_E196x1024) || defined(XMC4800_F144x1024) || defined(XMC4800_F100x1024) +uint32_t SystemCoreClock __attribute__((at(0x2001FFC0))); +uint8_t g_chipid[16] __attribute__((at(0x2001FFC4))); +#else +#error "system_XMC4800.c: device not supported" +#endif +#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) +#if defined(XMC4800_E196x2048) || defined(XMC4800_F144x2048) || defined(XMC4800_F100x2048) +uint32_t SystemCoreClock __attribute__((section(".ARM.__at_0x2003FFC0"))); +uint8_t g_chipid[16] __attribute__((section(".ARM.__at_0x2003FFC0"))); +#elif defined(XMC4800_E196x1536) || defined(XMC4800_F144x1536) || defined(XMC4800_F100x1536) +uint32_t SystemCoreClock __attribute__((section(".ARM.__at_0x2002CFC0"))); +uint8_t g_chipid[16] __attribute__((section(".ARM.__at_0x2002CFC4"))); +#elif defined(XMC4800_E196x1024) || defined(XMC4800_F144x1024) || defined(XMC4800_F100x1024) +uint32_t SystemCoreClock __attribute__((section(".ARM.__at_0x2001FFC0"))); +uint8_t g_chipid[16] __attribute__((section(".ARM.__at_0x2001FFC4"))); +#else +#error "system_XMC4800.c: device not supported" +#endif +#elif defined ( __ICCARM__ ) +#if defined(XMC4800_E196x2048) || defined(XMC4800_F144x2048) || defined(XMC4800_F100x2048) || \ + defined(XMC4800_E196x1536) || defined(XMC4800_F144x1536) || defined(XMC4800_F100x1536) || \ + defined(XMC4800_E196x1024) || defined(XMC4800_F144x1024) || defined(XMC4800_F100x1024) +__no_init uint32_t SystemCoreClock; +__no_init uint8_t g_chipid[16]; +#else +#error "system_XMC4800.c: device not supported" +#endif +#elif defined ( __GNUC__ ) +#if defined(XMC4800_E196x2048) || defined(XMC4800_F144x2048) || defined(XMC4800_F100x2048) || \ + defined(XMC4800_E196x1536) || defined(XMC4800_F144x1536) || defined(XMC4800_F100x1536) || \ + defined(XMC4800_E196x1024) || defined(XMC4800_F144x1024) || defined(XMC4800_F100x1024) +uint32_t SystemCoreClock __attribute__((section(".no_init"))); +uint8_t g_chipid[16] __attribute__((section(".no_init"))); +#else +#error "system_XMC4800.c: device not supported" +#endif +#elif defined ( __TASKING__ ) +#if defined(XMC4800_E196x2048) || defined(XMC4800_F144x2048) || defined(XMC4800_F100x2048) +uint32_t SystemCoreClock __at( 0x2003FFC0 ); +uint8_t g_chipid[16] __at( 0x2003FFC4 ); +#elif defined(XMC4800_E196x1536) || defined(XMC4800_F144x1536) || defined(XMC4800_F100x1536) +uint32_t SystemCoreClock __at( 0x2002CFC0 ); +uint8_t g_chipid[16] __at( 0x2002CFC4 ); +#elif defined(XMC4800_E196x1024) || defined(XMC4800_F144x1024) || defined(XMC4800_F100x1024) +uint32_t SystemCoreClock __at( 0x2001FFC0 ); +uint8_t g_chipid[16] __at( 0x2001FFC4 ); +#else +#error "system_XMC4800.c: device not supported" +#endif +#else +#error "system_XMC4800.c: compiler not supported" +#endif + +extern uint32_t __Vectors; + +/******************************************************************************* + * LOCAL FUNCTIONS + *******************************************************************************/ +static void delay(uint32_t cycles) +{ + volatile uint32_t i; + + for(i = 0UL; i < cycles ;++i) + { + __NOP(); + } +} + +/******************************************************************************* + * API IMPLEMENTATION + *******************************************************************************/ + +__WEAK void SystemInit(void) +{ + memcpy(g_chipid, CHIPID_LOC, 16); + + SystemCoreSetup(); + SystemCoreClockSetup(); +} + +__WEAK void SystemCoreSetup(void) +{ + uint32_t temp; + + /* relocate vector table */ + __disable_irq(); + SCB->VTOR = (uint32_t)(&__Vectors); + __DSB(); + __enable_irq(); + +#if ((__FPU_PRESENT == 1) && (__FPU_USED == 1)) + SCB->CPACR |= ((3UL << 10*2) | /* set CP10 Full Access */ + (3UL << 11*2) ); /* set CP11 Full Access */ +#endif + + /* Enable unaligned memory access - SCB_CCR.UNALIGN_TRP = 0 */ + SCB->CCR &= ~(SCB_CCR_UNALIGN_TRP_Msk); + + temp = FLASH0->FCON; + temp &= ~FLASH_FCON_WSPFLASH_Msk; + temp |= PMU_FLASH_WS; + FLASH0->FCON = temp; +} + +__WEAK void SystemCoreClockSetup(void) +{ +#if FOFI_CALIBRATION_MODE == FOFI_CALIBRATION_MODE_FACTORY + /* Enable factory calibration */ + SCU_PLL->PLLCON0 |= SCU_PLL_PLLCON0_FOTR_Msk; +#else + /* Automatic calibration uses the fSTDBY */ + + /* Enable HIB domain */ + /* Power up HIB domain if and only if it is currently powered down */ + if((SCU_POWER->PWRSTAT & SCU_POWER_PWRSTAT_HIBEN_Msk) == 0) + { + SCU_POWER->PWRSET |= SCU_POWER_PWRSET_HIB_Msk; + + while((SCU_POWER->PWRSTAT & SCU_POWER_PWRSTAT_HIBEN_Msk) == 0) + { + /* wait until HIB domain is enabled */ + } + } + + /* Remove the reset only if HIB domain were in a state of reset */ + if((SCU_RESET->RSTSTAT) & SCU_RESET_RSTSTAT_HIBRS_Msk) + { + SCU_RESET->RSTCLR |= SCU_RESET_RSTCLR_HIBRS_Msk; + delay(DELAY_CNT_150US_50MHZ); + } + +#if STDBY_CLOCK_SRC == STDBY_CLOCK_SRC_OSCULP + /* Enable OSC_ULP */ + if ((SCU_HIBERNATE->OSCULCTRL & SCU_HIBERNATE_OSCULCTRL_MODE_Msk) != 0UL) + { + /*enable OSC_ULP*/ + while (SCU_GENERAL->MIRRSTS & SCU_GENERAL_MIRRSTS_OSCULCTRL_Msk) + { + /* check SCU_MIRRSTS to ensure that no transfer over serial interface is pending */ + } + SCU_HIBERNATE->OSCULCTRL &= ~SCU_HIBERNATE_OSCULCTRL_MODE_Msk; + + /* Check if the clock is OK using OSCULP Oscillator Watchdog*/ + while (SCU_GENERAL->MIRRSTS & SCU_GENERAL_MIRRSTS_HDCR_Msk) + { + /* check SCU_MIRRSTS to ensure that no transfer over serial interface is pending */ + } + SCU_HIBERNATE->HDCR |= SCU_HIBERNATE_HDCR_ULPWDGEN_Msk; + + /* wait till clock is stable */ + do + { + while (SCU_GENERAL->MIRRSTS & SCU_GENERAL_MIRRSTS_HDCLR_Msk) + { + /* check SCU_MIRRSTS to ensure that no transfer over serial interface is pending */ + } + SCU_HIBERNATE->HDCLR |= SCU_HIBERNATE_HDCLR_ULPWDG_Msk; + + delay(DELAY_CNT_50US_50MHZ); + + } while ((SCU_HIBERNATE->HDSTAT & SCU_HIBERNATE_HDSTAT_ULPWDG_Msk) != 0UL); + + } + + /* now OSC_ULP is running and can be used*/ + /* Select OSC_ULP as the clock source for RTC and STDBY*/ + while (SCU_GENERAL->MIRRSTS & SCU_GENERAL_MIRRSTS_HDCR_Msk) + { + /* check SCU_MIRRSTS to ensure that no transfer over serial interface is pending */ + } + SCU_HIBERNATE->HDCR |= SCU_HIBERNATE_HDCR_RCS_Msk | SCU_HIBERNATE_HDCR_STDBYSEL_Msk; +#endif /* STDBY_CLOCK_SRC == STDBY_CLOCK_SRC_OSCULP */ + + /* Enable automatic calibration of internal fast oscillator */ + SCU_PLL->PLLCON0 |= SCU_PLL_PLLCON0_AOTREN_Msk; +#endif /* FOFI_CALIBRATION_MODE == FOFI_CALIBRATION_MODE_AUTOMATIC */ + + delay(DELAY_CNT_50US_50MHZ); + +#if ENABLE_PLL + + /* enable PLL */ + SCU_PLL->PLLCON0 &= ~(SCU_PLL_PLLCON0_VCOPWD_Msk | SCU_PLL_PLLCON0_PLLPWD_Msk); + +#if PLL_CLOCK_SRC != PLL_CLOCK_SRC_OFI + /* enable OSC_HP */ + if ((SCU_OSC->OSCHPCTRL & SCU_OSC_OSCHPCTRL_MODE_Msk) != 0U) + { + SCU_OSC->OSCHPCTRL &= ~(SCU_OSC_OSCHPCTRL_MODE_Msk | SCU_OSC_OSCHPCTRL_OSCVAL_Msk); + SCU_OSC->OSCHPCTRL |= ((OSCHP_GetFrequency() / FOSCREF) - 1UL) << SCU_OSC_OSCHPCTRL_OSCVAL_Pos; + + /* select OSC_HP clock as PLL input */ + SCU_PLL->PLLCON2 &= ~SCU_PLL_PLLCON2_PINSEL_Msk; + + /* restart OSC Watchdog */ + SCU_PLL->PLLCON0 &= ~SCU_PLL_PLLCON0_OSCRES_Msk; + + while ((SCU_PLL->PLLSTAT & SCU_PLL_PLLSTAT_OSC_USABLE) != SCU_PLL_PLLSTAT_OSC_USABLE) + { + /* wait till OSC_HP output frequency is usable */ + } + } +#else /* PLL_CLOCK_SRC != PLL_CLOCK_SRC_OFI */ + + /* select backup clock as PLL input */ + SCU_PLL->PLLCON2 |= SCU_PLL_PLLCON2_PINSEL_Msk; +#endif + + /* Go to bypass the Main PLL */ + SCU_PLL->PLLCON0 |= SCU_PLL_PLLCON0_VCOBYP_Msk; + + /* disconnect Oscillator from PLL */ + SCU_PLL->PLLCON0 |= SCU_PLL_PLLCON0_FINDIS_Msk; + + /* Setup divider settings for main PLL */ + SCU_PLL->PLLCON1 = ((PLL_NDIV << SCU_PLL_PLLCON1_NDIV_Pos) | + (PLL_K2DIV_24MHZ << SCU_PLL_PLLCON1_K2DIV_Pos) | + (PLL_PDIV << SCU_PLL_PLLCON1_PDIV_Pos)); + + /* Set OSCDISCDIS */ + SCU_PLL->PLLCON0 |= SCU_PLL_PLLCON0_OSCDISCDIS_Msk; + + /* connect Oscillator to PLL */ + SCU_PLL->PLLCON0 &= ~SCU_PLL_PLLCON0_FINDIS_Msk; + + /* restart PLL Lock detection */ + SCU_PLL->PLLCON0 |= SCU_PLL_PLLCON0_RESLD_Msk; + + while ((SCU_PLL->PLLSTAT & SCU_PLL_PLLSTAT_VCOLOCK_Msk) == 0U) + { + /* wait for PLL Lock at 24MHz*/ + } + + /* Disable bypass- put PLL clock back */ + SCU_PLL->PLLCON0 &= ~SCU_PLL_PLLCON0_VCOBYP_Msk; + while ((SCU_PLL->PLLSTAT & SCU_PLL_PLLSTAT_VCOBYST_Msk) != 0U) + { + /* wait for normal mode */ + } + +#endif /* ENABLE_PLL */ + + /* Before scaling to final frequency we need to setup the clock dividers */ + SCU_CLK->SYSCLKCR = __SYSCLKCR; + SCU_CLK->PBCLKCR = __PBCLKCR; + SCU_CLK->CPUCLKCR = __CPUCLKCR; + SCU_CLK->CCUCLKCR = __CCUCLKCR; + SCU_CLK->WDTCLKCR = __WDTCLKCR; + SCU_CLK->EBUCLKCR = __EBUCLKCR; + SCU_CLK->USBCLKCR = __USBCLKCR; + SCU_CLK->ECATCLKCR = __ECATCLKCR; + SCU_CLK->EXTCLKCR = __EXTCLKCR; + +#if ENABLE_PLL + /* PLL frequency stepping...*/ + /* Reset OSCDISCDIS */ + SCU_PLL->PLLCON0 &= ~SCU_PLL_PLLCON0_OSCDISCDIS_Msk; + + SCU_PLL->PLLCON1 = ((PLL_NDIV << SCU_PLL_PLLCON1_NDIV_Pos) | + (PLL_K2DIV_48MHZ << SCU_PLL_PLLCON1_K2DIV_Pos) | + (PLL_PDIV << SCU_PLL_PLLCON1_PDIV_Pos)); + + delay(DELAY_CNT_50US_48MHZ); + + SCU_PLL->PLLCON1 = ((PLL_NDIV << SCU_PLL_PLLCON1_NDIV_Pos) | + (PLL_K2DIV_72MHZ << SCU_PLL_PLLCON1_K2DIV_Pos) | + (PLL_PDIV << SCU_PLL_PLLCON1_PDIV_Pos)); + + delay(DELAY_CNT_50US_72MHZ); + + SCU_PLL->PLLCON1 = ((PLL_NDIV << SCU_PLL_PLLCON1_NDIV_Pos) | + (PLL_K2DIV_96MHZ << SCU_PLL_PLLCON1_K2DIV_Pos) | + (PLL_PDIV << SCU_PLL_PLLCON1_PDIV_Pos)); + + delay(DELAY_CNT_50US_96MHZ); + + SCU_PLL->PLLCON1 = ((PLL_NDIV << SCU_PLL_PLLCON1_NDIV_Pos) | + (PLL_K2DIV_120MHZ << SCU_PLL_PLLCON1_K2DIV_Pos) | + (PLL_PDIV << SCU_PLL_PLLCON1_PDIV_Pos)); + + delay(DELAY_CNT_50US_120MHZ); + + SCU_PLL->PLLCON1 = ((PLL_NDIV << SCU_PLL_PLLCON1_NDIV_Pos) | + (PLL_K2DIV << SCU_PLL_PLLCON1_K2DIV_Pos) | + (PLL_PDIV << SCU_PLL_PLLCON1_PDIV_Pos)); + + delay(DELAY_CNT_50US_144MHZ); + +#endif /* ENABLE_PLL */ + +#if ENABLE_USBPLL + /* enable USB PLL first */ + SCU_PLL->USBPLLCON &= ~(SCU_PLL_USBPLLCON_VCOPWD_Msk | SCU_PLL_USBPLLCON_PLLPWD_Msk); + + /* USB PLL uses as clock input the OSC_HP */ + /* check and if not already running enable OSC_HP */ + if ((SCU_OSC->OSCHPCTRL & SCU_OSC_OSCHPCTRL_MODE_Msk) != 0U) + { + /* check if Main PLL is switched on for OSC WDG*/ + if ((SCU_PLL->PLLCON0 &(SCU_PLL_PLLCON0_VCOPWD_Msk | SCU_PLL_PLLCON0_PLLPWD_Msk)) != 0UL) + { + /* enable PLL first */ + SCU_PLL->PLLCON0 &= ~(SCU_PLL_PLLCON0_VCOPWD_Msk | SCU_PLL_PLLCON0_PLLPWD_Msk); + } + + SCU_OSC->OSCHPCTRL &= ~(SCU_OSC_OSCHPCTRL_MODE_Msk | SCU_OSC_OSCHPCTRL_OSCVAL_Msk); + SCU_OSC->OSCHPCTRL |= ((OSCHP_GetFrequency() / FOSCREF) - 1UL) << SCU_OSC_OSCHPCTRL_OSCVAL_Pos; + + /* restart OSC Watchdog */ + SCU_PLL->PLLCON0 &= ~SCU_PLL_PLLCON0_OSCRES_Msk; + + while ((SCU_PLL->PLLSTAT & SCU_PLL_PLLSTAT_OSC_USABLE) != SCU_PLL_PLLSTAT_OSC_USABLE) + { + /* wait till OSC_HP output frequency is usable */ + } + } + + /* Setup USB PLL */ + /* Go to bypass the USB PLL */ + SCU_PLL->USBPLLCON |= SCU_PLL_USBPLLCON_VCOBYP_Msk; + + /* disconnect Oscillator from USB PLL */ + SCU_PLL->USBPLLCON |= SCU_PLL_USBPLLCON_FINDIS_Msk; + + /* Setup Divider settings for USB PLL */ + SCU_PLL->USBPLLCON = ((USB_NDIV << SCU_PLL_USBPLLCON_NDIV_Pos) | + (USB_PDIV << SCU_PLL_USBPLLCON_PDIV_Pos)); + + /* Set OSCDISCDIS */ + SCU_PLL->USBPLLCON |= SCU_PLL_USBPLLCON_OSCDISCDIS_Msk; + + /* connect Oscillator to USB PLL */ + SCU_PLL->USBPLLCON &= ~SCU_PLL_USBPLLCON_FINDIS_Msk; + + /* restart PLL Lock detection */ + SCU_PLL->USBPLLCON |= SCU_PLL_USBPLLCON_RESLD_Msk; + + while ((SCU_PLL->USBPLLSTAT & SCU_PLL_USBPLLSTAT_VCOLOCK_Msk) == 0U) + { + /* wait for PLL Lock */ + } +#endif + + /* Enable selected clocks */ + SCU_CLK->CLKSET = __CLKSET; + +#if __EXTCLKPIN != 0 +#if __EXTCLKPIN == EXTCLK_PIN_P1_15 + /* P1.15 */ + PORT1->PDR1 &= ~PORT1_PDR1_PD15_Msk; + PORT1->IOCR12 = (PORT1->IOCR12 & ~PORT0_IOCR12_PC15_Msk) | (0x11U << PORT0_IOCR12_PC15_Pos); +#else + /* P0.8 */ + PORT0->HWSEL &= ~PORT0_HWSEL_HW8_Msk; + PORT0->PDR1 &= ~PORT0_PDR1_PD8_Msk; + PORT0->IOCR8 = (PORT0->IOCR8 & ~PORT0_IOCR8_PC8_Msk) | (0x11U << PORT0_IOCR8_PC8_Pos); +#endif +#endif /* ENABLE_EXTCLK == 1 */ + + SystemCoreClockUpdate(); +} + +__WEAK void SystemCoreClockUpdate(void) +{ + uint32_t pdiv; + uint32_t ndiv; + uint32_t kdiv; + uint32_t temp; + + if (SCU_CLK->SYSCLKCR & SCU_CLK_SYSCLKCR_SYSSEL_Msk) + { + /* fPLL is clock source for fSYS */ + if(SCU_PLL->PLLCON2 & SCU_PLL_PLLCON2_PINSEL_Msk) + { + /* PLL input clock is the backup clock (fOFI) */ + temp = OFI_FREQUENCY; + } + else + { + /* PLL input clock is the high performance osicllator (fOSCHP) */ + temp = OSCHP_GetFrequency(); + } + + /* check if PLL is locked */ + if (SCU_PLL->PLLSTAT & SCU_PLL_PLLSTAT_VCOLOCK_Msk) + { + /* PLL normal mode */ + /* read back divider settings */ + pdiv = ((SCU_PLL->PLLCON1 & SCU_PLL_PLLCON1_PDIV_Msk) >> SCU_PLL_PLLCON1_PDIV_Pos) + 1; + ndiv = ((SCU_PLL->PLLCON1 & SCU_PLL_PLLCON1_NDIV_Msk) >> SCU_PLL_PLLCON1_NDIV_Pos) + 1; + kdiv = ((SCU_PLL->PLLCON1 & SCU_PLL_PLLCON1_K2DIV_Msk) >> SCU_PLL_PLLCON1_K2DIV_Pos) + 1; + + temp = (temp / (pdiv * kdiv)) * ndiv; + } + else + { + /* PLL prescalar mode */ + /* read back divider settings */ + kdiv = ((SCU_PLL->PLLCON1 & SCU_PLL_PLLCON1_K1DIV_Msk) >> SCU_PLL_PLLCON1_K1DIV_Pos) + 1; + + temp = (temp / kdiv); + } + } + else + { + /* fOFI is clock source for fSYS */ + temp = OFI_FREQUENCY; + } + + temp = temp / ((SCU_CLK->SYSCLKCR & SCU_CLK_SYSCLKCR_SYSDIV_Msk) + 1); + temp = temp / ((SCU_CLK->CPUCLKCR & SCU_CLK_CPUCLKCR_CPUDIV_Msk) + 1); + + SystemCoreClock = temp; +} + +__WEAK uint32_t OSCHP_GetFrequency(void) +{ + return OSCHP_FREQUENCY; +} diff --git a/variants/XMC4800/system_XMC4800.h b/variants/XMC4800/system_XMC4800.h new file mode 100644 index 00000000..9b8de3da --- /dev/null +++ b/variants/XMC4800/system_XMC4800.h @@ -0,0 +1,107 @@ +/********************************************************************************************************************* + * @file system_XMC4800.h + * @brief Device specific initialization for the XMC4800-Series according to CMSIS + * @version V1.0 + * @date 22 May 2015 + * + * @cond + ********************************************************************************************************************* + * Copyright (c) 2015-2016, Infineon Technologies AG + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the + * following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this list of conditions and the following + * disclaimer. + * + * Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following + * disclaimer in the documentation and/or other materials provided with the distribution. + * + * Neither the name of the copyright holders nor the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY,OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * To improve the quality of the software, users are encouraged to share modifications, enhancements or bug fixes with + * Infineon Technologies AG dave@infineon.com). + ********************************************************************************************************************* + * + **************************** Change history ********************************* + * V1.0, 22 May 2015, JFT, Initial version + ***************************************************************************** + * @endcond + */ + +#ifndef SYSTEM_XMC4800_H +#define SYSTEM_XMC4800_H + +/******************************************************************************* + * HEADER FILES + *******************************************************************************/ + +#include + +/******************************************************************************* + * MACROS + *******************************************************************************/ + +#define OFI_FREQUENCY (24000000UL) /**< 24MHz Backup Clock (fOFI) frequency. */ +#define OSI_FREQUENCY (32768UL) /**< 32KHz Internal Slow Clock source (fOSI) frequency. */ + +/******************************************************************************* + * GLOBAL VARIABLES + *******************************************************************************/ + +extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ +extern uint8_t g_chipid[16]; + +/******************************************************************************* + * API PROTOTYPES + *******************************************************************************/ + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @brief Initialize the system + * + */ +void SystemInit(void); + +/** + * @brief Initialize CPU settings + * + */ +void SystemCoreSetup(void); + +/** + * @brief Initialize clock + * + */ +void SystemCoreClockSetup(void); + +/** + * @brief Update SystemCoreClock variable + * + */ +void SystemCoreClockUpdate(void); + +/** + * @brief Returns frequency of the high performace oscillator + * User needs to overload this function to return the correct oscillator frequency + */ +uint32_t OSCHP_GetFrequency(void); + +#ifdef __cplusplus +} +#endif + +#endif From 71ab51b8c3737242f00f78e2c248efd6d2b2a63b Mon Sep 17 00:00:00 2001 From: boramonideep Date: Mon, 1 Aug 2022 17:29:51 +0200 Subject: [PATCH 47/78] fixed ADC mappings --- .../config/XMC4200_Platform2GO/pins_arduino.h | 49 +++++-------------- 1 file changed, 13 insertions(+), 36 deletions(-) diff --git a/variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h b/variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h index 967f4e5f..281697fb 100644 --- a/variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h +++ b/variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h @@ -75,24 +75,14 @@ extern uint8_t MISO; extern uint8_t SCK; #define A0 0 // ADC G0CH0 P14.0 -#define A1 1 // ADC G0CH1 P14.1 -#define A2 2 // ADC G0CH2 P14.2 -#define A3 3 // ADC G0CH3 P14.3 +#define A1 1 // ADC G0CH6 P14.6 +#define A2 2 // ADC G0CH7 P14.7 +#define A3 3 // ADC G1CH0 P14.8 #define A4 4 // ADC G0CH4 P14.4 #define A5 5 // ADC G0CH5 P14.5 //Additional ADC ports starting here -#define A6 6 // ADC G0CH6 on P14.6 -#define A7 7 // ADC G0CH7 on P14.7 -#define A8 8 // ADC G1CH4 on P14.12 -#define A9 9 // ADC G1CH5 on P14.13 -#define A10 10 // ADC G1CH6 on P14.14 -#define A11 11 // ADC G1CH7 on P14.15 -#define A12 12 // ADC G2CH2 on P15.2 -#define A13 13 // ADC G2CH3 on P15.3 -#define A14 14 // ADC G1CH0 on P14.8 -#define A15 15 // ADC G1CH1 on P14.9 -#define A16 16 // ADC G3CH0 on P15.8 -#define A17 17 // ADC G3CH1 on P15.9 +#define A6 6 // ADC G1CH6 on P14.14 +#define A7 7 // ADC G1CH1 on P14.9 #define LED1 36 // Additional LED1 #define LED_BUILTIN LED1 // Standard Arduino LED: Uses LED1 @@ -125,8 +115,8 @@ const XMC_PORT_PIN_t mapping_port_pin[]= /* 17 */ {XMC_GPIO_PORT14, 6}, // A1 / ADC Input P14.6 (INPUT ONLY) X2-25 /* 18 */ {XMC_GPIO_PORT14, 7}, // A2 / ADC Input P14.7 (INPUT ONLY) X2-28 /* 19 */ {XMC_GPIO_PORT14, 8}, // A3 / ADC Input / AN_MikroBus / DAC0 P14.8 (INPUT ONLY) X2-33 - /* 20 */ {XMC_GPIO_PORT14, 4}, // A6 / ADC Input / SDA / AN1_2GO_1 P14.4 (Hardwired to SDA) X2-24 - /* 21 */ {XMC_GPIO_PORT14, 5}, // A7 / ADC Input / SCL / AN2_2GO_2 P14.5 (Hardwired to SCL) X2-30 + /* 20 */ {XMC_GPIO_PORT14, 4}, // A4 / ADC Input / SDA / AN1_2GO_1 P14.4 (Hardwired to SDA) X2-24 + /* 21 */ {XMC_GPIO_PORT14, 5}, // A5 / ADC Input / SCL / AN2_2GO_2 P14.5 (Hardwired to SCL) X2-30 //Additional pins for port X1 starting here /* 22 */ {XMC_GPIO_PORT1, 1}, // PWM_MikroBus P1.1 X1-12 @@ -150,9 +140,9 @@ const XMC_PORT_PIN_t mapping_port_pin[]= /* 38 */ {XMC_GPIO_PORT0, 10}, // INT_MikroBus P0.10 X2-15 /* 39 */ {XMC_GPIO_PORT0, 2}, // SPI-CS_2GO_1 P0.2 X2-16 /* 40 */ {XMC_GPIO_PORT0, 9}, // SPI-CS_2GO_2 P0.9 X2-20 - /* 41 */ {XMC_GPIO_PORT14, 14}, // AN2_2GO_1 P14.14 X2-21 + /* 41 */ {XMC_GPIO_PORT14, 14}, // AN2_2GO_1 / A6 / ADC Input P14.14 (INPUT ONLY) X2-21 /* 42 */ {XMC_GPIO_PORT14, 3}, // CAN_RX P14.3 X2-32 - /* 43 */ {XMC_GPIO_PORT14, 9}, // AN1_2GO_2 / DAC1 P14.9 X2-36 + /* 43 */ {XMC_GPIO_PORT14, 9}, // AN1_2GO_2 / A7 / ADC Input / DAC1 P14.9 (INPUT ONLY) X2-36 }; const uint8_t GND = ( sizeof( mapping_port_pin ) / sizeof( XMC_PORT_PIN_t ) ); @@ -229,24 +219,11 @@ XMC_ADC_t mapping_adc[] = {VADC, 6, VADC_G0, 0, 1, DISABLED}, //A1 {VADC, 7, VADC_G0, 0, 2, DISABLED}, //A2 {VADC, 0, VADC_G1, 1, 0, DISABLED}, //A3 - {VADC, 0, VADC_G1, 1, 0, DISABLED}, //A4 - {VADC, 0, VADC_G1, 1, 0, DISABLED}, //A5 + {VADC, 4, VADC_G0, 0, 3, DISABLED}, //A4 + {VADC, 5, VADC_G0, 0, 4, DISABLED}, //A5 //Additional ADC channels starting here - {VADC, 4, VADC_G0, 0, 3, DISABLED}, //A6 - {VADC, 5, VADC_G0, 0, 4, DISABLED}, //A7 - - {VADC, 6, VADC_G2, 2, 6, DISABLED}, - {VADC, 5, VADC_G2, 2, 5, DISABLED}, - {VADC, 3, VADC_G2, 2, 3, DISABLED}, - {VADC, 7, VADC_G1, 1, 7, DISABLED}, - {VADC, 5, VADC_G1, 1, 5, DISABLED}, - {VADC, 7, VADC_G0, 0, 7, DISABLED}, - {VADC, 7, VADC_G3, 3, 7, DISABLED}, - {VADC, 1, VADC_G1, 1, 1, DISABLED}, - {VADC, 0, VADC_G1, 1, 0, DISABLED}, - {VADC, 6, VADC_G3, 3, 6, DISABLED}, - {VADC, 6, VADC_G0, 0, 6, DISABLED}, - {VADC, 4, VADC_G1, 1, 4, DISABLED}, + {VADC, 6, VADC_G1, 1, 1, DISABLED}, //A6 + {VADC, 1, VADC_G1, 1, 2, DISABLED}, //A7 }; const uint8_t NUM_ANALOG_INPUTS = ( sizeof( mapping_adc ) / sizeof( XMC_ADC_t ) ); From b9895a469780d7f1d8bfff2b2529b739ed73e29a Mon Sep 17 00:00:00 2001 From: boramonideep Date: Mon, 1 Aug 2022 18:06:03 +0200 Subject: [PATCH 48/78] fixed UART channels to PC and Onboard --- .../config/XMC4200_Platform2GO/pins_arduino.h | 48 +++++++------------ 1 file changed, 16 insertions(+), 32 deletions(-) diff --git a/variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h b/variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h index 281697fb..59563809 100644 --- a/variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h +++ b/variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h @@ -230,21 +230,15 @@ const uint8_t NUM_ANALOG_INPUTS = ( sizeof( mapping_adc ) / sizeof( XMC_ADC_t ) /* * UART objects * - * See many XMC1x00 pins_arduino.h for proper way to handle HOSTPC - * NUM_SERIAL defines number of PHYSICAL ports NOT configurations */ RingBuffer rx_buffer_0; RingBuffer tx_buffer_0; -#if (NUM_SERIAL > 1) -RingBuffer rx_buffer_1; -RingBuffer tx_buffer_1; -#endif #ifdef SERIAL_HOSTPC XMC_UART_t XMC_UART_0 = { - .channel = XMC_UART1_CH0, - .rx = { .port = (XMC_GPIO_PORT_t*)PORT0_BASE, + .channel = XMC_UART0_CH0, + .rx = { .port = (XMC_GPIO_PORT_t*)PORT1_BASE, .pin = (uint8_t)5 }, .rx_config = { .mode = XMC_GPIO_MODE_INPUT_TRISTATE, @@ -252,17 +246,17 @@ XMC_UART_t XMC_UART_0 = .output_strength = XMC_GPIO_OUTPUT_STRENGTH_STRONG_SOFT_EDGE }, .tx = { .port = (XMC_GPIO_PORT_t*)PORT1_BASE, - .pin = (uint8_t)15 + .pin = (uint8_t)4 }, - .tx_config = { .mode = (XMC_GPIO_MODE_t) XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT4, + .tx_config = { .mode = (XMC_GPIO_MODE_t) XMC_GPIO_MODE_OUTPUT_PUSH_PULL, //HW controlled function (HWO) .output_level = XMC_GPIO_OUTPUT_LEVEL_HIGH, .output_strength = XMC_GPIO_OUTPUT_STRENGTH_STRONG_SOFT_EDGE }, - .input_source_dx0 = (XMC_USIC_INPUT_t)USIC1_C0_DX0_P0_5, + .input_source_dx0 = (XMC_USIC_INPUT_t)USIC0_C0_DX0_P1_5, .input_source_dx1 = XMC_INPUT_INVALID, .input_source_dx2 = XMC_INPUT_INVALID, .input_source_dx3 = XMC_INPUT_INVALID, - .irq_num = USIC1_0_IRQn, + .irq_num = USIC0_0_IRQn, .irq_service_request = 0 }; @@ -291,21 +285,23 @@ XMC_UART_t XMC_UART_0 = .input_source_dx1 = XMC_INPUT_INVALID, .input_source_dx2 = XMC_INPUT_INVALID, .input_source_dx3 = XMC_INPUT_INVALID, - .irq_num = USIC0_5_IRQn, + .irq_num = USIC1_0_IRQn, .irq_service_request = 0 }; // Debug port -HardwareSerial Serial( &XMC_UART_0, &rx_buffer_0, &tx_buffer_0 ); + #endif +// Single Object instantiated of the HardwareSerial class for single serial interface +HardwareSerial Serial( &XMC_UART_0, &rx_buffer_0, &tx_buffer_0 ); + // Serial Interrupt and event handling #ifdef __cplusplus extern "C" { #endif void serialEventRun( ); void serialEvent( ) __attribute__((weak)); -void serialEvent1( ) __attribute__((weak)); void serialEventRun( ) @@ -315,27 +311,19 @@ if( serialEvent ) if( Serial.available( ) ) serialEvent( ); } -#if (NUM_SERIAL > 1) -if( serialEvent1 ) - { - if( Serial1.available( ) ) - serialEvent1( ); - } -#endif } - +// IRQ Handler of Serial Onboard (USIC1) void USIC1_0_IRQHandler( ) { -Serial.IrqHandler( ); + Serial.IrqHandler( ); } -#if (NUM_SERIAL > 1) -void USIC0_5_IRQHandler( void ) +// IRQ Handler of Serial to PC USB (USIC0) +void USIC0_0_IRQHandler( ) { -Serial1.IrqHandler(); + Serial.IrqHandler( ); } -#endif #ifdef __cplusplus } @@ -344,9 +332,5 @@ Serial1.IrqHandler(); #ifdef __cplusplus extern HardwareSerial Serial; -#if (NUM_SERIAL > 1) -extern HardwareSerial Serial1; -#endif #endif /* cplusplus */ - #endif From 6d5e652453ddabe9a853b24d17ec5987040a713c Mon Sep 17 00:00:00 2001 From: boramonideep Date: Mon, 1 Aug 2022 18:10:08 +0200 Subject: [PATCH 49/78] fixed some defines --- .../XMC4200/config/XMC4200_Platform2GO/pins_arduino.h | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h b/variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h index 59563809..28537a1b 100644 --- a/variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h +++ b/variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h @@ -53,14 +53,16 @@ extern const uint8_t NUM_ANALOG_OUTPUTS; #define NUM_LEDS 1 #define NUM_BUTTONS 1 #define NUM_SERIAL 1 -#define NUM_TONE_PINS 16 -#define NUM_TASKS_VARIANT 32 +#define NUM_TONE_PINS 7 +#define NUM_TASKS_VARIANT 7 // Indicate unit has RTC/Alarm #define HAS_RTC 1 -#define PWM4_TIMER_PERIOD (0x11EF) //Generate 490Hz @fCCU=144MHz -#define PWM8_TIMER_PERIOD (0x11EF) // Generate 490Hz @fCCU=144MHz +//Generate 490Hz @fCCU=144MHz +#define PWM4_TIMER_PERIOD (0x11EF) +// Generate 490Hz @fCCU=144MHz +#define PWM8_TIMER_PERIOD (0x11EF) #define PCLK 64000000u From 5f9b4cb705714531c9c75d0ba46e101ceab29c46 Mon Sep 17 00:00:00 2001 From: boramonideep Date: Mon, 1 Aug 2022 18:13:10 +0200 Subject: [PATCH 50/78] fixed some PWM comments --- variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h b/variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h index 28537a1b..6290a53f 100644 --- a/variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h +++ b/variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h @@ -121,9 +121,9 @@ const XMC_PORT_PIN_t mapping_port_pin[]= /* 21 */ {XMC_GPIO_PORT14, 5}, // A5 / ADC Input / SCL / AN2_2GO_2 P14.5 (Hardwired to SCL) X2-30 //Additional pins for port X1 starting here - /* 22 */ {XMC_GPIO_PORT1, 1}, // PWM_MikroBus P1.1 X1-12 - /* 23 */ {XMC_GPIO_PORT1, 2}, // PWM / GPIO4_S2GO_1 P1.2 X1-13 - /* 24 */ {XMC_GPIO_PORT1, 3}, // PWM / GPIO4_2GO_2 P1.3 X1-14 + /* 22 */ {XMC_GPIO_PORT1, 1}, // PWM_MikroBus / PWM40-2 P1.1 X1-12 + /* 23 */ {XMC_GPIO_PORT1, 2}, // PWM / PWM40-1 / GPIO4_S2GO_1 P1.2 X1-13 + /* 24 */ {XMC_GPIO_PORT1, 3}, // PWM / PWM40-0 / GPIO4_2GO_2 P1.3 X1-14 /* 25 */ {XMC_GPIO_PORT1, 4}, // PC_TXD P1.4 X1-15 /* 26 */ {XMC_GPIO_PORT1, 5}, // PC_RXD P1.5 X1-16 /* 27 */ {XMC_GPIO_PORT1, 15}, // BUTTON1 P1.15 X1-22 From deffab0c1530928a0c88600cd825035128272215 Mon Sep 17 00:00:00 2001 From: boramonideep Date: Mon, 1 Aug 2022 18:17:11 +0200 Subject: [PATCH 51/78] removed redefinition of object, corrected compilation error --- variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h | 6 ------ 1 file changed, 6 deletions(-) diff --git a/variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h b/variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h index 6290a53f..c7c88bc4 100644 --- a/variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h +++ b/variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h @@ -262,9 +262,6 @@ XMC_UART_t XMC_UART_0 = .irq_service_request = 0 }; -// Debug port -HardwareSerial Serial( &XMC_UART_0, &rx_buffer_0, &tx_buffer_0 ); - #elif SERIAL_ONBOARD XMC_UART_t XMC_UART_0 = { @@ -291,8 +288,6 @@ XMC_UART_t XMC_UART_0 = .irq_service_request = 0 }; -// Debug port - #endif // Single Object instantiated of the HardwareSerial class for single serial interface @@ -305,7 +300,6 @@ extern "C" { void serialEventRun( ); void serialEvent( ) __attribute__((weak)); - void serialEventRun( ) { if( serialEvent ) From 7666b7c71adfdb38cd763a7bab75712613693946 Mon Sep 17 00:00:00 2001 From: Paul Carpenter Date: Tue, 2 Aug 2022 08:22:58 +0100 Subject: [PATCH 52/78] Paultech Wiki Docs Add Eagle library and description to Resources for wiki --- resources/readme.md | 16 +- resources/wiki/Eagle/INF-XMC.lbr | 3561 ++++++++++++++++++++++++++++++ 2 files changed, 3572 insertions(+), 5 deletions(-) create mode 100644 resources/wiki/Eagle/INF-XMC.lbr diff --git a/resources/readme.md b/resources/readme.md index 1f3bfe57..c36c46e0 100644 --- a/resources/readme.md +++ b/resources/readme.md @@ -7,12 +7,18 @@ and images for wiki. xmc4700-X1-X2.csv XMC4700 Relax Kit (and Lite) CSV of X1 and X2 connector pinout -to follow soon - xmc4400-X1-X2.csv XMC4400 Platform 2 Go CSV of X1 and X2 connector pinout ### Folder wiki/Pictures - .jpg JPEG updates of Pinout image for wiki - SVG folder of source version(s) in SVG format - PNG folder of intermediate version(s) in PNG format \ No newline at end of file +File/Folder | Description +| :--: | ----- | +| board_PO.jpg | JPEG updates of Pinout image for wiki | +| SVG | folder of source version(s) in SVG format | +| PNG | folder of intermediate version(s) in PNG format | + +### Folder wiki/Eagle + +File/Folder | Description +| :--: | ----- | +| INF-XMC.lbr | - Eagle library for symbol and footprints of Infineon XMC processors | diff --git a/resources/wiki/Eagle/INF-XMC.lbr b/resources/wiki/Eagle/INF-XMC.lbr new file mode 100644 index 00000000..cca901c9 --- /dev/null +++ b/resources/wiki/Eagle/INF-XMC.lbr @@ -0,0 +1,3561 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +Infineon XMC1000 and XMC4000 series micros + + +TSSOP-16 pitch 0.65 mm pads 0.35 x 1.25 mm + + + + + + + + + + + + + + + + + + + + + + +>NAME +>VALUE + + +TSSOP-16 pitch 0.65 mm, pads 0.35 x 1.55 mm + + + + + + + + + + + + + + + + + + + + + + +>NAME +>VALUE + + +TSSOP-38 pitch 0.5 mm, pads 0.25 x 1.35 mm + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +>NAME +>VALUE + + +TSSOP-38 pitch 0.5 mm, pads 0.3 x 1.6 mm + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +>NAME +>VALUE + + +TSSOP-28 pitch 0.65mm, pads 0.35 x 1.25 mm + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +>NAME +>VALUE + + +TSSOP-28 pitch 0.65mm, pads .35 x 1.55 mm + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +>NAME +>VALUE + + +<b>QFN48P-7X7</b> + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +>NAME +>VALUE + + + +<b>P/PG-LQFP-100</b> 0.5mm pitch Tie exposed pad with approx. 0.2mm thermal vias to GND<br> +PG-LQFP-100-11, leadframe no: C66065-A6837-C024-01-004 EPad: 7.0 x 7.0 mm <br> +LQFP-100 package with 7.0 x 7.0mm Exposed Pad + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +>NAME +>VALUE + + + + + + + + + + + + + + + + + + + + + + + + + + + +<b>QFN-48</b> (7x7) + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +>NAME +>VALUE + + + + + + + + +<b>QFP-144</b><p>0.5mm pitch Tie exposed pad with approx. 0.2mm thermal vias to GND +<p>PG-LQFP-144-18, leadframe no: C66065-A7014-C009-01-004 EPad: 6.5 x 6.5 mm +<p>LQFP-144 package with 6.5 x 6.5mm Exposed Pad<br> + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +>NAME +>VALUE + + +<b>QFN 4x4 mm</b> + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +>NAME +>VALUE + + + + +TSSOP38 Package pin pitch 0.5 mm pad 0.3 x 1.4 mm + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +>NAME +>VALUE + + + +TQFP64 12x12mm 0.5mm pitch 0.25mm pad width + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +>NAME +>VALUE + + + +QFN-40 pin 5x5 mm body 0.4 picth exposed pad 0.8 x 0.2 pad + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +>NAME +>VALUE + + +QFN 64 pin 8 x 8 body - 0.4 pitch 0.8 x 0.2 pad + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +>NAME +>VALUE + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +XMC140X 48 PIN POWER + + + + + + + +Power Supply +>NAME +>VALUE + + + + + + + + + +XMC140X 48PIN PORTS + + + + + +>NAME +>VALUE +PORT 0,1,2,3 & 4 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +XMC4400 100 pins + + + + + + + + + + + + + + + + + +>NAME +>VALUE +USB +Supply +Analog +Digital +Hibernate/RTC + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +XMC4200 48 pin + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +>NAME +>VALUE +USB +Supply +Analog +Digital +Hibernate/RTC + + +XMC4700 144 pins + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +>NAME +>VALUE +USB +Supply +Analog +Digital +Hibernate/RTC + + +XMC1100 series 24 pin + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +>Name +>Value +Supply + + +XMC1100 series Digital Port 0 and supply + + + + + + + + + + + + + + + + + + + + + + +Port 0 - standard port +>NAME +>VALUE + + +XMC1100 series 38 pin Port 1 + + + + + + + + + + + + +Port 1 - high current port +>NAME +>VALUE + + +XMC1100 series 38 pin Port 2 (Analog) + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +G1.CH7 +G1.CH6 +G1.CH5 +G0.CH7 +G0.CH6 +G0.CH5 +G0.CH0 +G1.CH1 +G1.CH0 +G0.CH2 +G0.CH3 +G0.CH4 +G0.CH1 +G1.CH4 +G1.CH2 +G1.CH3 +CMP0 +CMP1 +CMP2 +S&H0 +S&H0 +S&H1 +S&H1 +ACMP +ORC +ORC +Port 2 - analogue features +>NAME +>VALUE + + +XMC1000 series 38 pin single symbol + + + + + + + + + + + + + + + + + + + + + + + + + + +Digital +>NAME +>VALUE + + + + + + + + + + + + + + + + + + + + + + +Analog +Power + + +XMC1400 48 pin Single Symbol + + + + +>NAME +PORT 0,1,2,3 & 4 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +Power Supply +>VALUE + + + + + + + + + +XMC1000 series 28 pin single symbol + + + + + + + + + + + + + + + + + + + + +Digital +>NAME +>VALUE + + + + + + + + + + + + + + + + + + +Analog +Power + + +XMC1000 series 16 pin single symbol + + + + + + + + + + + + + + +Digital +>NAME +>VALUE + + + + + + + + + + +Analog +Power + + + + +XMC 1000 Series 40 pin Single symbol + + + + +>NAME +PORT 0,1,2 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +Power Supply +>VALUE + + + + + + + + +XMC1000 Series 64 pin Single Symbol<br> +39 digital (+4 crystals)<br> +14 analog + + + + + +>NAME +PORT 0,1,3 & 4 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +Power Supply +>VALUE + + + + + + + + + + + + + + + + + + + + + + +Analog + + + + + + + +<b>XMC1401-QFN48 7x7 mm</b> Split Symbol + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +<b>XMC4400</b> QFP100 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +<b>XMC4200-QFN48</b> + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +Infineon XMC4500 144Pin LQFP ARM Cortex M4 <p> + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +XMC1100 series 24 pin + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +XMC1100 series 38 pin + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +XMC1000 38 pin Single symbol + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +XMC1401 48 pin QFN Single Symbol + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +XMC1000 Series 16 Pin + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +XMC1000 series 28 pin + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +XMC1000 series 64 pin QFP/QFN<br> +39 digital (+4 crystals)<br> +14 analog + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +XMC1000 series 40 pin + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + From c741aeff91bfa7e452eeedd84139a05578271ea3 Mon Sep 17 00:00:00 2001 From: boramonideep Date: Tue, 2 Aug 2022 21:50:58 +0200 Subject: [PATCH 53/78] fixed clk freq, pwm period, some defines --- boards.txt | 2 +- cores/wiring_time.h | 31 +++++++++++++++++++ .../config/XMC4200_Platform2GO/pins_arduino.h | 12 +++---- 3 files changed, 38 insertions(+), 7 deletions(-) diff --git a/boards.txt b/boards.txt index 559a400a..480e5e6e 100644 --- a/boards.txt +++ b/boards.txt @@ -323,7 +323,7 @@ XMC4200_Platform2GO.serial.disableDTR=true XMC4200_Platform2GO.serial.disableRTS=true XMC4200_Platform2GO.build.mcu=cortex-m4 -XMC4200_Platform2GO.build.f_cpu=144000000L +XMC4200_Platform2GO.build.f_cpu=80000000L XMC4200_Platform2GO.build.board=ARM_XMC XMC4200_Platform2GO.build.board.version=4200 XMC4200_Platform2GO.build.board.type=F64x256 diff --git a/cores/wiring_time.h b/cores/wiring_time.h index 14fd4ddd..e0effddd 100644 --- a/cores/wiring_time.h +++ b/cores/wiring_time.h @@ -86,6 +86,37 @@ extern "C" { asm volatile("nop"); asm volatile("nop"); asm volatile("nop");\ asm volatile("nop"); asm volatile("nop"); asm volatile("nop");\ asm volatile("nop");} + +#elif ((UC_FAMILY == XMC4) && (F_CPU == 80000000U)) +// 80 NOPS +#define NOPS_FOR_USEC() { asm volatile("nop"); asm volatile("nop"); asm volatile("nop");\ + asm volatile("nop"); asm volatile("nop"); asm volatile("nop");\ + asm volatile("nop"); asm volatile("nop"); asm volatile("nop");\ + asm volatile("nop"); asm volatile("nop"); asm volatile("nop");\ + asm volatile("nop"); asm volatile("nop"); asm volatile("nop");\ + asm volatile("nop"); asm volatile("nop"); asm volatile("nop");\ + asm volatile("nop"); asm volatile("nop"); asm volatile("nop");\ + asm volatile("nop"); asm volatile("nop"); asm volatile("nop");\ + asm volatile("nop"); asm volatile("nop"); asm volatile("nop");\ + asm volatile("nop"); asm volatile("nop"); asm volatile("nop");\ + asm volatile("nop"); asm volatile("nop"); asm volatile("nop");\ + asm volatile("nop"); asm volatile("nop"); asm volatile("nop");\ + asm volatile("nop"); asm volatile("nop"); asm volatile("nop");\ + asm volatile("nop"); asm volatile("nop"); asm volatile("nop");\ + asm volatile("nop"); asm volatile("nop"); asm volatile("nop");\ + asm volatile("nop"); asm volatile("nop"); asm volatile("nop");\ + asm volatile("nop"); asm volatile("nop"); asm volatile("nop");\ + asm volatile("nop"); asm volatile("nop"); asm volatile("nop");\ + asm volatile("nop"); asm volatile("nop"); asm volatile("nop");\ + asm volatile("nop"); asm volatile("nop"); asm volatile("nop");\ + asm volatile("nop"); asm volatile("nop"); asm volatile("nop");\ + asm volatile("nop"); asm volatile("nop"); asm volatile("nop");\ + asm volatile("nop"); asm volatile("nop"); asm volatile("nop");\ + asm volatile("nop"); asm volatile("nop"); asm volatile("nop");\ + asm volatile("nop"); asm volatile("nop"); asm volatile("nop");\ + asm volatile("nop"); asm volatile("nop"); asm volatile("nop");\ + asm volatile("nop"); asm volatile("nop");} + #elif ((UC_FAMILY == XMC1) && (F_CPU == 32000000U)) // 16 NOPS #define NOPS_FOR_USEC() { asm volatile("nop"); asm volatile("nop"); asm volatile("nop");\ diff --git a/variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h b/variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h index c7c88bc4..4789b918 100644 --- a/variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h +++ b/variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h @@ -54,17 +54,17 @@ extern const uint8_t NUM_ANALOG_OUTPUTS; #define NUM_BUTTONS 1 #define NUM_SERIAL 1 #define NUM_TONE_PINS 7 -#define NUM_TASKS_VARIANT 7 +#define NUM_TASKS_VARIANT 12 // Indicate unit has RTC/Alarm #define HAS_RTC 1 -//Generate 490Hz @fCCU=144MHz -#define PWM4_TIMER_PERIOD (0x11EF) -// Generate 490Hz @fCCU=144MHz -#define PWM8_TIMER_PERIOD (0x11EF) +//Generate 2198Hz @fCCU=80MHz +#define PWM4_TIMER_PERIOD (0xFFFF) +// Generate 2198Hz @fCCU=80MHz +#define PWM8_TIMER_PERIOD (0xFFFF) -#define PCLK 64000000u +#define PCLK 80000000u #define PIN_SPI_SS 10 #define PIN_SPI_MOSI 11 From 0fc9b570320a0302f37d31e93ec9205407637d8d Mon Sep 17 00:00:00 2001 From: boramonideep Date: Wed, 3 Aug 2022 06:28:50 +0200 Subject: [PATCH 54/78] fixed UART to PC config --- .../XMC4200/config/XMC4200_Platform2GO/pins_arduino.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h b/variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h index 4789b918..bb55c7e1 100644 --- a/variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h +++ b/variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h @@ -241,20 +241,20 @@ XMC_UART_t XMC_UART_0 = { .channel = XMC_UART0_CH0, .rx = { .port = (XMC_GPIO_PORT_t*)PORT1_BASE, - .pin = (uint8_t)5 + .pin = (uint8_t)4 }, .rx_config = { .mode = XMC_GPIO_MODE_INPUT_TRISTATE, .output_level = XMC_GPIO_OUTPUT_LEVEL_HIGH, .output_strength = XMC_GPIO_OUTPUT_STRENGTH_STRONG_SOFT_EDGE }, .tx = { .port = (XMC_GPIO_PORT_t*)PORT1_BASE, - .pin = (uint8_t)4 + .pin = (uint8_t)5 }, - .tx_config = { .mode = (XMC_GPIO_MODE_t) XMC_GPIO_MODE_OUTPUT_PUSH_PULL, //HW controlled function (HWO) + .tx_config = { .mode = (XMC_GPIO_MODE_t) XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT2, //HW controlled function (HWO) .output_level = XMC_GPIO_OUTPUT_LEVEL_HIGH, .output_strength = XMC_GPIO_OUTPUT_STRENGTH_STRONG_SOFT_EDGE }, - .input_source_dx0 = (XMC_USIC_INPUT_t)USIC0_C0_DX0_P1_5, + .input_source_dx0 = (XMC_USIC_INPUT_t)USIC0_C0_DX0_P1_4, .input_source_dx1 = XMC_INPUT_INVALID, .input_source_dx2 = XMC_INPUT_INVALID, .input_source_dx3 = XMC_INPUT_INVALID, From 3c767da70b65286da28aa8d010f9b7d6d9273a84 Mon Sep 17 00:00:00 2001 From: boramonideep Date: Wed, 3 Aug 2022 09:33:31 +0200 Subject: [PATCH 55/78] rerouted INTx thru ERU instead of CCU, made related changes to core and BSP --- boards.txt | 2 +- cores/WInterrupts.c | 27 ++++++++++++++++--- .../config/XMC4200_Platform2GO/pins_arduino.h | 4 +-- 3 files changed, 27 insertions(+), 6 deletions(-) diff --git a/boards.txt b/boards.txt index 480e5e6e..b7519bdb 100644 --- a/boards.txt +++ b/boards.txt @@ -333,7 +333,7 @@ XMC4200_Platform2GO.build.variant=XMC4200 XMC4200_Platform2GO.build.board_variant=XMC4200_Platform2GO XMC4200_Platform2GO.build.flash_size=256K XMC4200_Platform2GO.build.flash_ld=linker_script.ld -XMC4200_Platform2GO.build.extra_flags=-DARM_MATH_CM4 -DARM_MATH_DSP +XMC4200_Platform2GO.build.extra_flags=-DARM_MATH_CM4 -DARM_MATH_DSP -DINTERRUPT_USE_ERU #-DUSB0 XMC4200_Platform2GO.menu.UART.debug=PC diff --git a/cores/WInterrupts.c b/cores/WInterrupts.c index 07ffaebf..c18e1b49 100644 --- a/cores/WInterrupts.c +++ b/cores/WInterrupts.c @@ -42,6 +42,15 @@ void ERU0_3_IRQHandler(void) } } +#if defined(XMC4200_Platform2GO) +void ERU0_0_IRQHandler(void) +{ + if (interrupt_1_cb) + { + interrupt_1_cb(); + } +} +#else void ERU1_0_IRQHandler(void) { if (interrupt_1_cb) @@ -49,6 +58,8 @@ void ERU1_0_IRQHandler(void) interrupt_1_cb(); } } +#endif + #else void CCU40_0_IRQHandler(void) { @@ -109,10 +120,16 @@ void attachInterrupt(uint32_t interrupt_num, interrupt_cb_t callback, uint32_t m } else if (pin_irq.irq_num == 1) { - NVIC_SetPriority(ERU1_0_IRQn, 3); +#if defined(XMC4200_Platform2GO) + NVIC_SetPriority(ERU0_0_IRQn, 3); + interrupt_1_cb = callback; + NVIC_EnableIRQ(ERU0_0_IRQn); +#else + NVIC_SetPriority(ERU1_0_IRQn, 3); interrupt_1_cb = callback; NVIC_EnableIRQ(ERU1_0_IRQn); - } +#endif + } #else XMC_CCU4_SLICE_EVENT_CONFIG_t event_config = {0}; @@ -195,7 +212,11 @@ void detachInterrupt(uint32_t interrupt_num) break; case 1: - NVIC_DisableIRQ(ERU1_0_IRQn); +#if defined(XMC4200_Platform2GO) + NVIC_DisableIRQ(ERU0_0_IRQn); +#else + NVIC_DisableIRQ(ERU1_0_IRQn); +#endif break; #else switch (interrupt_num) diff --git a/variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h b/variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h index bb55c7e1..f8b41b34 100644 --- a/variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h +++ b/variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h @@ -152,8 +152,8 @@ const uint8_t NUM_DIGITAL = ( sizeof( mapping_port_pin ) / sizeof( XMC_PORT_PIN_ const XMC_PIN_INTERRUPT_t mapping_interrupt[] = { - /* 0 */ {CCU40, CCU40_CC43, 3, 0, CCU40_IN3_P1_0}, - /* 1 */ {CCU41, CCU41_CC43, 3, 1, CCU41_IN3_P2_2} + /* 0 */ {XMC_ERU0, XMC_ERU_ETL_INPUT_A0, XMC_ERU_ETL_INPUT_B0, 3, 3, 0}, + /* 1 */ {XMC_ERU0, XMC_ERU_ETL_INPUT_A0, XMC_ERU_ETL_INPUT_B2, 1, 0, 1}, }; const uint8_t NUM_INTERRUPT = ( sizeof( mapping_interrupt ) / sizeof( XMC_PIN_INTERRUPT_t ) ); From 5937d2c7b704c2a39f021927ba6a47d9037ab69d Mon Sep 17 00:00:00 2001 From: boramonideep Date: Wed, 3 Aug 2022 09:54:19 +0200 Subject: [PATCH 56/78] fixed PWM4/8 frequency as per f_CCU --- .../XMC4200/config/XMC4200_Platform2GO/pins_arduino.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h b/variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h index f8b41b34..752227c4 100644 --- a/variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h +++ b/variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h @@ -59,10 +59,10 @@ extern const uint8_t NUM_ANALOG_OUTPUTS; // Indicate unit has RTC/Alarm #define HAS_RTC 1 -//Generate 2198Hz @fCCU=80MHz -#define PWM4_TIMER_PERIOD (0xFFFF) -// Generate 2198Hz @fCCU=80MHz -#define PWM8_TIMER_PERIOD (0xFFFF) +//Generate 490Hz @fCCU=80MHz +#define PWM4_TIMER_PERIOD (0x09F7) +// Generate 490Hz @fCCU=80MHz +#define PWM8_TIMER_PERIOD (0x09F7) #define PCLK 80000000u From df00c7c96ee8700ee3aa9c7c017e2108740c52b9 Mon Sep 17 00:00:00 2001 From: boramonideep Date: Wed, 3 Aug 2022 14:14:51 +0200 Subject: [PATCH 57/78] made changes to i2c and spi core --- libraries/SPI/src/utility/xmc_spi_conf.c | 38 +++++++++++++++++++++++ libraries/SPI/src/utility/xmc_spi_conf.h | 4 +++ libraries/Wire/src/utility/xmc_i2c_conf.c | 32 +++++++++++++++++++ libraries/Wire/src/utility/xmc_i2c_conf.h | 3 ++ 4 files changed, 77 insertions(+) diff --git a/libraries/SPI/src/utility/xmc_spi_conf.c b/libraries/SPI/src/utility/xmc_spi_conf.c index 6e95be16..f1f9ea37 100644 --- a/libraries/SPI/src/utility/xmc_spi_conf.c +++ b/libraries/SPI/src/utility/xmc_spi_conf.c @@ -185,6 +185,44 @@ XMC_SPI_t XMC_SPI_0 = }, }; +#elif defined(XMC4200_Platform2GO) +XMC_SPI_t XMC_SPI_0 = +{ + .channel = XMC_SPI1_CH1, + .channel_config = { + .baudrate = 20003906U, + .bus_mode = (XMC_SPI_CH_BUS_MODE_t)XMC_SPI_CH_BUS_MODE_MASTER, + .selo_inversion = XMC_SPI_CH_SLAVE_SEL_INV_TO_MSLS, + .parity_mode = XMC_USIC_CH_PARITY_MODE_NONE + }, + .mosi = { + .port = (XMC_GPIO_PORT_t*)PORT1_BASE, + .pin = (uint8_t)9 + }, + .mosi_config = { + .mode = XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT4, + .output_level = XMC_GPIO_OUTPUT_LEVEL_HIGH, + .output_strength = XMC_GPIO_OUTPUT_STRENGTH_MEDIUM + }, + .miso = { + .port = (XMC_GPIO_PORT_t*)PORT0_BASE, + .pin = (uint8_t)0 + }, + .miso_config = { + .mode = XMC_GPIO_MODE_INPUT_TRISTATE, + }, + .input_source = XMC_INPUT_D, + .sclkout = { + .port = (XMC_GPIO_PORT_t*)PORT1_BASE, + .pin = (uint8_t)8 + }, + .sclkout_config = { + .mode = XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT4, + .output_level = XMC_GPIO_OUTPUT_LEVEL_HIGH, + .output_strength = XMC_GPIO_OUTPUT_STRENGTH_MEDIUM + }, +}; + #elif defined(XMC4700_Relax_Kit) XMC_SPI_t XMC_SPI_0 = { diff --git a/libraries/SPI/src/utility/xmc_spi_conf.h b/libraries/SPI/src/utility/xmc_spi_conf.h index 2595a681..2a1a8c9b 100644 --- a/libraries/SPI/src/utility/xmc_spi_conf.h +++ b/libraries/SPI/src/utility/xmc_spi_conf.h @@ -68,6 +68,10 @@ extern XMC_SPI_t XMC_SPI_0; #define NUM_SPI 1 extern XMC_SPI_t XMC_SPI_0; +#elif defined(XMC4200_Platform2GO) +#define NUM_SPI 1 +extern XMC_SPI_t XMC_SPI_0; + #elif defined(XMC4700_Relax_Kit) #define NUM_SPI 3 #define XMC_SPI_for_xmc_SD XMC_SPI_1 diff --git a/libraries/Wire/src/utility/xmc_i2c_conf.c b/libraries/Wire/src/utility/xmc_i2c_conf.c index cb9ff3fe..8e94726e 100644 --- a/libraries/Wire/src/utility/xmc_i2c_conf.c +++ b/libraries/Wire/src/utility/xmc_i2c_conf.c @@ -264,6 +264,38 @@ XMC_I2C_t XMC_I2C_0 = .protocol_irq_service_request = 2 }; +#elif defined (XMC4200_Platform2GO) +XMC_I2C_t XMC_I2C_0 = +{ + .channel = XMC_I2C0_CH1, + .channel_config = { + .baudrate = (uint32_t)(100000U), + .address = 0U + }, + .sda = { + .port = (XMC_GPIO_PORT_t*)PORT2_BASE, + .pin = (uint8_t)5 + }, + .sda_config = { + .mode = XMC_GPIO_MODE_OUTPUT_OPEN_DRAIN_ALT2, + .output_level = XMC_GPIO_OUTPUT_LEVEL_HIGH + }, + .scl = { + .port = (XMC_GPIO_PORT_t*)PORT3_BASE, + .pin = (uint8_t)0 + }, + .scl_config = { + .mode = XMC_GPIO_MODE_OUTPUT_OPEN_DRAIN_ALT2, + .output_level = XMC_GPIO_OUTPUT_LEVEL_HIGH + }, + .input_source_dx0 = XMC_INPUT_B, + .input_source_dx1 = XMC_INPUT_B, + .slave_receive_irq_num = (IRQn_Type) 84, + .slave_receive_irq_service_request = 1 , + .protocol_irq_num = (IRQn_Type) 85, + .protocol_irq_service_request = 2 +}; + #elif defined(XMC4700_Relax_Kit) XMC_I2C_t XMC_I2C_0 = diff --git a/libraries/Wire/src/utility/xmc_i2c_conf.h b/libraries/Wire/src/utility/xmc_i2c_conf.h index 8edfe33d..f8045089 100644 --- a/libraries/Wire/src/utility/xmc_i2c_conf.h +++ b/libraries/Wire/src/utility/xmc_i2c_conf.h @@ -72,6 +72,9 @@ extern XMC_I2C_t XMC_I2C_0; #define NUM_I2C 1 extern XMC_I2C_t XMC_I2C_0; +#elif defined(XMC4200_Platform2GO) +#define NUM_I2C 1 +extern XMC_I2C_t XMC_I2C_0; #elif defined(XMC4700_Relax_Kit) #define NUM_I2C 2 From c2305afbb0e1085339f7ea831a72917ff4713490 Mon Sep 17 00:00:00 2001 From: boramonideep Date: Wed, 3 Aug 2022 15:38:36 +0200 Subject: [PATCH 58/78] corrected typo --- variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h b/variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h index 752227c4..67a04e5a 100644 --- a/variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h +++ b/variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h @@ -153,7 +153,7 @@ const uint8_t NUM_DIGITAL = ( sizeof( mapping_port_pin ) / sizeof( XMC_PORT_PIN_ const XMC_PIN_INTERRUPT_t mapping_interrupt[] = { /* 0 */ {XMC_ERU0, XMC_ERU_ETL_INPUT_A0, XMC_ERU_ETL_INPUT_B0, 3, 3, 0}, - /* 1 */ {XMC_ERU0, XMC_ERU_ETL_INPUT_A0, XMC_ERU_ETL_INPUT_B2, 1, 0, 1}, + /* 1 */ {XMC_ERU0, XMC_ERU_ETL_INPUT_A0, XMC_ERU_ETL_INPUT_B2, 1, 0, 1} }; const uint8_t NUM_INTERRUPT = ( sizeof( mapping_interrupt ) / sizeof( XMC_PIN_INTERRUPT_t ) ); From 1210c5b0626f31e41845cf761747fa5f147fc273 Mon Sep 17 00:00:00 2001 From: boramonideep Date: Wed, 3 Aug 2022 19:51:06 +0200 Subject: [PATCH 59/78] edited comments --- variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h b/variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h index 67a04e5a..d3a28c9d 100644 --- a/variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h +++ b/variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h @@ -116,7 +116,7 @@ const XMC_PORT_PIN_t mapping_port_pin[]= /* 16 */ {XMC_GPIO_PORT14, 0}, // A0 / ADC Input P14.0 (INPUT ONLY) X2-34 /* 17 */ {XMC_GPIO_PORT14, 6}, // A1 / ADC Input P14.6 (INPUT ONLY) X2-25 /* 18 */ {XMC_GPIO_PORT14, 7}, // A2 / ADC Input P14.7 (INPUT ONLY) X2-28 - /* 19 */ {XMC_GPIO_PORT14, 8}, // A3 / ADC Input / AN_MikroBus / DAC0 P14.8 (INPUT ONLY) X2-33 + /* 19 */ {XMC_GPIO_PORT14, 8}, // A3 / ADC Input / AN_MikroBus / DAC0 P14.8 X2-33 /* 20 */ {XMC_GPIO_PORT14, 4}, // A4 / ADC Input / SDA / AN1_2GO_1 P14.4 (Hardwired to SDA) X2-24 /* 21 */ {XMC_GPIO_PORT14, 5}, // A5 / ADC Input / SCL / AN2_2GO_2 P14.5 (Hardwired to SCL) X2-30 @@ -144,7 +144,7 @@ const XMC_PORT_PIN_t mapping_port_pin[]= /* 40 */ {XMC_GPIO_PORT0, 9}, // SPI-CS_2GO_2 P0.9 X2-20 /* 41 */ {XMC_GPIO_PORT14, 14}, // AN2_2GO_1 / A6 / ADC Input P14.14 (INPUT ONLY) X2-21 /* 42 */ {XMC_GPIO_PORT14, 3}, // CAN_RX P14.3 X2-32 - /* 43 */ {XMC_GPIO_PORT14, 9}, // AN1_2GO_2 / A7 / ADC Input / DAC1 P14.9 (INPUT ONLY) X2-36 + /* 43 */ {XMC_GPIO_PORT14, 9}, // AN1_2GO_2 / A7 / ADC Input / DAC1 P14.9 X2-36 }; const uint8_t GND = ( sizeof( mapping_port_pin ) / sizeof( XMC_PORT_PIN_t ) ); From b092b61e06e84f248509d42e7c61195c8c73c621 Mon Sep 17 00:00:00 2001 From: boramonideep Date: Thu, 4 Aug 2022 10:22:21 +0200 Subject: [PATCH 60/78] enabled CI/CD for the XMC4200_P2GO --- .github/workflows/compile-platform-examples.yml | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/.github/workflows/compile-platform-examples.yml b/.github/workflows/compile-platform-examples.yml index 8b3fe6e1..cf716f50 100644 --- a/.github/workflows/compile-platform-examples.yml +++ b/.github/workflows/compile-platform-examples.yml @@ -107,6 +107,16 @@ jobs: multiSerial: false dma: false alarmRtc: false + - fqbn: Infineon:arm:XMC4200_Platform2GO + i2s: false + dieTemp: false + heapMem: false + sleep1100: false + sleep4700 : false + stackMem: true + multiSerial: false + dma: false + alarmRtc: true # Make board type-specific customizations to the matrix jobs include: From 89947e5e2c59a958887fcbaa7c07f7ce7d5af7cd Mon Sep 17 00:00:00 2001 From: boramonideep Date: Thu, 4 Aug 2022 12:13:48 +0200 Subject: [PATCH 61/78] added dummy define for LED2 to comply with CI/CD workflow --- variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h b/variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h index d3a28c9d..a0c51c56 100644 --- a/variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h +++ b/variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h @@ -88,6 +88,7 @@ extern uint8_t SCK; #define LED1 36 // Additional LED1 #define LED_BUILTIN LED1 // Standard Arduino LED: Uses LED1 +#define LED2 LED1 // Dummy LED define macro; added to comply with LED Library examples in CI/CD workflow #define BUTTON1 27 // Additional BUTTON1 #define digitalPinToInterrupt(p) ((p) == 2 ? 0 : ((p) == 3 ? 1 : NOT_AN_INTERRUPT)) @@ -250,7 +251,7 @@ XMC_UART_t XMC_UART_0 = .tx = { .port = (XMC_GPIO_PORT_t*)PORT1_BASE, .pin = (uint8_t)5 }, - .tx_config = { .mode = (XMC_GPIO_MODE_t) XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT2, //HW controlled function (HWO) + .tx_config = { .mode = (XMC_GPIO_MODE_t) XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT2, .output_level = XMC_GPIO_OUTPUT_LEVEL_HIGH, .output_strength = XMC_GPIO_OUTPUT_STRENGTH_STRONG_SOFT_EDGE }, From 4ead4d0bc7f1ef93274a710b3d242ea5b2db28d4 Mon Sep 17 00:00:00 2001 From: boramonideep Date: Thu, 4 Aug 2022 13:16:58 +0200 Subject: [PATCH 62/78] made UART interfaces independent since both occur on different USIC instances --- boards.txt | 5 ---- .../config/XMC4200_Platform2GO/pins_arduino.h | 28 +++++++++++++++---- 2 files changed, 22 insertions(+), 11 deletions(-) diff --git a/boards.txt b/boards.txt index b7519bdb..55a889c1 100644 --- a/boards.txt +++ b/boards.txt @@ -336,11 +336,6 @@ XMC4200_Platform2GO.build.flash_ld=linker_script.ld XMC4200_Platform2GO.build.extra_flags=-DARM_MATH_CM4 -DARM_MATH_DSP -DINTERRUPT_USE_ERU #-DUSB0 -XMC4200_Platform2GO.menu.UART.debug=PC -XMC4200_Platform2GO.menu.UART.debug.uart.selected=-DSERIAL_HOSTPC -XMC4200_Platform2GO.menu.UART.onBoard=On Board -XMC4200_Platform2GO.menu.UART.onBoard.uart.selected=-DSERIAL_ONBOARD - XMC4200_Platform2GO.menu.LIB.NONE=None XMC4200_Platform2GO.menu.LIB.NONE.library.selected= XMC4200_Platform2GO.menu.LIB.DSPNN=ARM DSP / ARM NN Framework diff --git a/variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h b/variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h index a0c51c56..edc90ce4 100644 --- a/variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h +++ b/variants/XMC4200/config/XMC4200_Platform2GO/pins_arduino.h @@ -234,10 +234,19 @@ const uint8_t NUM_ANALOG_INPUTS = ( sizeof( mapping_adc ) / sizeof( XMC_ADC_t ) * UART objects * */ + +// Since both the UART interfaces are present on different USIC instances, +// both can be enabled independently. + +// Serial is PC-DEBUG interface +// Serial1 is ONBOARD interface + RingBuffer rx_buffer_0; RingBuffer tx_buffer_0; -#ifdef SERIAL_HOSTPC +RingBuffer rx_buffer_1; +RingBuffer tx_buffer_1; + XMC_UART_t XMC_UART_0 = { .channel = XMC_UART0_CH0, @@ -263,8 +272,7 @@ XMC_UART_t XMC_UART_0 = .irq_service_request = 0 }; -#elif SERIAL_ONBOARD -XMC_UART_t XMC_UART_0 = +XMC_UART_t XMC_UART_1 = { .channel = XMC_UART1_CH0, .rx = { .port = (XMC_GPIO_PORT_t*)PORT2_BASE, @@ -289,10 +297,11 @@ XMC_UART_t XMC_UART_0 = .irq_service_request = 0 }; -#endif -// Single Object instantiated of the HardwareSerial class for single serial interface +// Object instantiated of the HardwareSerial class for UART PC (debug) interface HardwareSerial Serial( &XMC_UART_0, &rx_buffer_0, &tx_buffer_0 ); +// Object instantiated of the HardwareSerial class for UART ONBOARD interface +HardwareSerial Serial1( &XMC_UART_1, &rx_buffer_1, &tx_buffer_1 ); // Serial Interrupt and event handling #ifdef __cplusplus @@ -300,6 +309,7 @@ extern "C" { #endif void serialEventRun( ); void serialEvent( ) __attribute__((weak)); +void serialEvent1( ) __attribute__((weak)); void serialEventRun( ) { @@ -308,12 +318,17 @@ if( serialEvent ) if( Serial.available( ) ) serialEvent( ); } +if( serialEvent1 ) + { + if( Serial1.available( ) ) + serialEvent1( ); + } } // IRQ Handler of Serial Onboard (USIC1) void USIC1_0_IRQHandler( ) { - Serial.IrqHandler( ); + Serial1.IrqHandler( ); } // IRQ Handler of Serial to PC USB (USIC0) @@ -329,5 +344,6 @@ void USIC0_0_IRQHandler( ) #ifdef __cplusplus extern HardwareSerial Serial; +extern HardwareSerial Serial1; #endif /* cplusplus */ #endif From 4e9e1a0dc6b7264f1c5547c08bb6260f6ead4e95 Mon Sep 17 00:00:00 2001 From: Paul Carpenter Date: Fri, 5 Aug 2022 11:12:56 +0100 Subject: [PATCH 63/78] LED Library XMC4200 Platform 2Go support As first board with only one LED update examples and library support for boards with at least ONE on board LED support --- libraries/LED/Readme.md | 43 ++++++++++--------- .../LED/examples/SimpleLED/SimpleLED.ino | 16 ++++--- libraries/LED/library.properties | 2 +- libraries/LED/src/LED.h | 4 ++ 4 files changed, 39 insertions(+), 26 deletions(-) diff --git a/libraries/LED/Readme.md b/libraries/LED/Readme.md index 29f734c7..e8ba79f5 100644 --- a/libraries/LED/Readme.md +++ b/libraries/LED/Readme.md @@ -5,19 +5,19 @@ **Author** | : | Paul Carpenter | | | PC Services | | | www.pcserviceselectronics.co.uk -**Version** | : | V1.01 -**Updated** | : | July 2022 +**Version** | : | V1.0.3 +**Updated** | : | August 2022 Date | : | July 2018 -Infineon XMC-for-Arduino RTC Library, to assist in making board agnostic examples that +Infineon XMC-for-Arduino LED Library, to assist in making board agnostic examples that will work the same across all boards. This file will be available in the library folder. Often it is useful to have an example and have LED change state when things happen or -errors occur, so to make this easier it is better to use on board LEDs that will always +errors occur, so to make this easier it is better to use on board LEDs that will always be there. Unfortunately if you are writing an example to use across many boards the -XMC boards do not all work the same way. This library enables examples or applications to -use the on board LEDs in the same way across all boards that any example supports. This -is encapsulating the LED drive primarily for easier use of on board LEDs in examples that +XMC boards do not all work the same way. This library enables examples or applications to +use the on board LEDs in the same way across all boards that any example supports. This +is encapsulating the LED drive primarily for easier use of on board LEDs in examples that work on all or many of the boards. ## Table of Contents @@ -44,6 +44,7 @@ models of board so we end up with XMC1300 Boot Kit | Low | No | Low XMC1300 Sense2GOL | Low| No | Low XMC1400 Arduino Kit | Low | Yes | High + XMC4200 Platform2Go | High| No | High XMC4400 Platform2Go | High| No | High XMC4700 Relax Kit | High| No | High XMC4700 Relax Kit Lite | High| No | High @@ -52,15 +53,15 @@ models of board so we end up with ### LEDs on Different Boards Matrix of available on board LED names or LED they map to, known currently. -| LED Macro | XMC1100
    Boot Kit | XMC1100
    XMC2GO | XMC1100
    HBRIDGE2GO | XMC1300
    Boot Kit | XMC1300
    Sense2GOL | XMC1400
    Arduino Kit | XMC4400
    Platform2Go | XMC4700
    Relax Kit | XMC4700
    Relax Kit Lite | -| --- | :--: | :--: | :--: | :--: | :--: | :--: | :--: | :--: | :--: | - LED_BUILTIN | Y | LED1 | LED1 | LED1 | LED1 | Y | LED1 | LED1 | LED1 - LED1 | Y | Y | Y | Y | Y | Y | Y | Y | Y - LED2 | Y | Y | Y | Y | Y | Y | Y | Y | Y - LED3 | Y | - | - | Y | Y | - | - | - | - - LED4 | Y | - | - | Y | - | - | - | - | - - LED5 | Y | - | - | Y | - | - | - | - | - - LED6 | Y | - | - | Y | - | - | - | - | - +| LED Macro | XMC1100
    Boot Kit | XMC1100
    XMC2GO | XMC1100
    HBRIDGE2GO | XMC1300
    Boot Kit | XMC1300
    Sense2GOL | XMC1400
    Arduino Kit | XMC4200
    Platform2Go | XMC4400
    Platform2Go | XMC4700
    Relax Kit | XMC4700
    Relax Kit Lite | +| --- | :--: | :--: | :--: | :--: | :--: | :--: | :--: | :--: | :--: | :--: | + LED_BUILTIN | Y | LED1 | LED1 | LED1 | LED1 | Y | LED1 | LED1 | LED1 | LED1 + LED1 | Y | Y | Y | Y | Y | Y | Y | Y | Y | Y + LED2 | Y | Y | Y | Y | Y | Y | - | Y | Y | Y + LED3 | Y | - | - | Y | Y | - | - | - | - | - + LED4 | Y | - | - | Y | - | - | - | - | - | - + LED5 | Y | - | - | Y | - | - | - | - | - | - + LED6 | Y | - | - | Y | - | - | - | - | - | - [Back to top](#table-of-contents) ## Requirements for Adding New Boards @@ -88,7 +89,7 @@ See [LEDs on Different Boards](#leds-on-different-boards "Number of LEDs on boar All functions have a Arduino Pin reference passed in or a macro that defines it e.g. LED1 or LED2. -Note at present all boards have **2** LEDs as a minimum some have 3 or 6 LEDs. Obviously only reference +Note at present all boards have **2** LEDs as a minimum some have 3 or 6 LEDs. Obviously only reference LEDs that actually exist for the boards are supported. This library uses NO RAM storage it is mainly software encapsulation/wrappers to other functions. @@ -125,11 +126,13 @@ Led.Add( LED1 ); // Add LED (configure for output) ## Examples This is here for completeness of Arduino IDE library structure. ### Simple LED -This example simply +This example works on all currently known boards simply - In setup() sets up two LEDs - In loop() - - Waits one second - - Toggles LED1 + - Waits one second + - Toggles LED1 - Turns Off LED2 +If a board like **XMC4200 Platform2Go** with only **ONE** LED is in use **only LED1 function is used** + [Back to top](#table-of-contents) diff --git a/libraries/LED/examples/SimpleLED/SimpleLED.ino b/libraries/LED/examples/SimpleLED/SimpleLED.ino index 66c5f22b..5829d2c1 100644 --- a/libraries/LED/examples/SimpleLED/SimpleLED.ino +++ b/libraries/LED/examples/SimpleLED/SimpleLED.ino @@ -2,7 +2,8 @@ Demonstrates the use of the on board LED library - Works with any XMC board that has TWO LEDs on board + Works with any XMC board that has at least ONE LED on board + Better with two */ #include @@ -12,16 +13,21 @@ LED Led; void setup( ) { Led.Add( LED1 ); // Configure the LEDs -Led.Add( LED2 ); +Led.Off( LED1 ); // Set default state of LEDs -Led.On( LED2 ); // Set default state of LEDs -Led.Off( LED1 ); +#if NUM_LEDS > 1 +Led.Add( LED2 ); +Led.On( LED2 ); +#endif } void loop( ) { delay( 1000 ); -Led.Off( LED2 ); Led.Toggle( LED1 ); + +#if NUM_LEDS > 1 +Led.Off( LED2 ); +#endif } diff --git a/libraries/LED/library.properties b/libraries/LED/library.properties index 42cb3bc9..8638598d 100644 --- a/libraries/LED/library.properties +++ b/libraries/LED/library.properties @@ -1,5 +1,5 @@ name=LED -version=1.0.2 +version=1.0.3 author=Infineon Technologies AG maintainer=Infineon Technologies AG sentence=This library allows you to enable as well as control the on board LEDs of the XMC microcontrollers. diff --git a/libraries/LED/src/LED.h b/libraries/LED/src/LED.h index 7d946fe4..52a56c8e 100644 --- a/libraries/LED/src/LED.h +++ b/libraries/LED/src/LED.h @@ -44,6 +44,10 @@ #error This board NOT supported by this library (Check pins_arduino.h) #endif +#if not defined( NUM_LEDS ) || ( NUM_LEDS < 1 ) +#error Current selected board does NOT support on board LEDs +#endif + //**************************************************************************** // @Project Includes //**************************************************************************** From 74a50f064672c24084f410517a838b76e0de367b Mon Sep 17 00:00:00 2001 From: boramonideep Date: Sun, 7 Aug 2022 10:04:41 +0530 Subject: [PATCH 64/78] added board name to platform json template --- package/package_infineon_index.template.json | 3 +++ 1 file changed, 3 insertions(+) diff --git a/package/package_infineon_index.template.json b/package/package_infineon_index.template.json index 8b8a84fb..84074bae 100644 --- a/package/package_infineon_index.template.json +++ b/package/package_infineon_index.template.json @@ -48,6 +48,9 @@ }, { "name":"XMC1400 Kit for Arduino" + }, + { + "name":"XMC4200 Platform 2Go" } ], "toolsDependencies":[ From 85cffc8079ae717c87f8e335fdfdc9439d49f4c8 Mon Sep 17 00:00:00 2001 From: Paul Carpenter Date: Thu, 11 Aug 2022 18:18:12 +0100 Subject: [PATCH 65/78] Revert "Wiki extra docs update" This reverts commit 7014bf58a9099196f18d17a99d54b90abf3108d4. --- .../Pictures/PNG/XMC 1100_BootKit_V1_2_0.png | Bin 660992 -> 0 bytes .../Pictures/SVG/XMC1100_BootKit_V1_2_0.svg | 6496 ----------------- .../wiki/Pictures/XMC 1100_BootKit_PO.jpg | Bin 251809 -> 0 bytes 3 files changed, 6496 deletions(-) delete mode 100644 resources/wiki/Pictures/PNG/XMC 1100_BootKit_V1_2_0.png delete mode 100644 resources/wiki/Pictures/SVG/XMC1100_BootKit_V1_2_0.svg delete mode 100644 resources/wiki/Pictures/XMC 1100_BootKit_PO.jpg diff --git a/resources/wiki/Pictures/PNG/XMC 1100_BootKit_V1_2_0.png b/resources/wiki/Pictures/PNG/XMC 1100_BootKit_V1_2_0.png deleted file mode 100644 index d084e7b0550c85f79bee702a0feafd9be27935e8..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 660992 zcmXtf1yo#H(=5&)fx+F~-3E7;0Kp}=1b26L3+@_{0KqjtaF+nV-2=g0-{Jo6V-2ui zWS!HycXw5F?PxU>*>}i<$WTyF@8spA)S;l@ETEuZu|WvHe{i_68-QPMt`hQ^AmGan zWF7_ljpQV!>k0*hQv3D|JrsD64*ZkAO5|6y+?;E38&4B8*pxKx7eZ*9Sq?+AYFr*a zZ67Z`+WGmgvO`MFoq-wMM11Pq4sDYw+Kju9iScq@5F9=`?qwXD#N|SYp0JkZyn(OL ze*X!pe9+WvP{g%&zRy>m)5cq))xTOFo^7jMG3jH9|Nnz7clu`ZcN+okW9M42O`R@i zky&CI6FECPX`FKwlh6d2qD~!CmMT6?7s>hEZ_H%qIDeH&Xk|xddGs$z!mJATP$Mw! zF{TnfW~!xw>*xzH3+KR^rEIYh2p@!_=JaR-KltSY5XZPEVV-&*VoSgOzek!RRqNPL za~4UDlW*y4TR6y<+70OdX9`E6M$8R{B}hP0n*^Q%d50zrgpZY!5ye4)j|4Vr!}jK` z`L3(i+WK1CGiIRuUd3-vnVzbQ*uVL)kbcA{f8QjVRvcV-1WDKi$M&!NbI4;41CyM3 zkgZ7|SQq$oJg*){z1?`OHFX9-N!|c4Nnr479}LAV3>Za>6$%$>oXf9YO{@#sv>mkT z!O-Usyu!-Ou>(Kwad2qI;n(Qen32Z&G@F56ImBE`=xb8%(>!Cq@5{g05JI(8cjc_U zM^l07a!uR!g29ItL0Ulw3wnsu2JSeGid-C9kS%Y&hy_O?7hzK!ToK=kNg@hQUb?dU za3IjFm6QWEtxs~{q99V9S;$?zJh)Rb5PP52>nRk@8BXQ5*EvmW1BkWxVZK(l?t!X2u-&R|- zi}#aLtIvd1+IASS1-7(+-AswOk*KMRKsmhFI`mB*^!F^EC-)8GwPaET;8RDCK7QX1 zjgjV zVRQAlwExm-x0Idt=t4t^UKH-a1$;^cf|Lkzy+D6vp<(+JVpWzjDaYnlE&RGOrDXiJ zav8v-?c(D`Q2c1lbg0sz%2I++tC^Rl#*A;8F`l>OF|A$5iJ-1NGS$^G`#SCRg))pB z6f(f0?D{%~RiUkyy~bA7ck9nQYU<~gOQV>6%x5bjaG2SBEfpTN94)geg!V+l?gSb% z=5#;S6(gjFVuN0X#J~cIU$3-B7+)FaEBo`YJ z>>G63>G0?qBnndvlP}a=Th*-^#I$CVIs~H8cs5LlI zi6d(HbV-h~n?kAzM&KWqeP-@60hTx2_1Ddt5FlH7HR(&}2ZIkQB_c4Mhtbf`IISjf z2juVyF`|?rX&!&O=cT9P2FZ|Xe49&B$4nd~5}&*RWwWDlpu#d(n8C%_FUNnR2f?8B zc3%p4954Lp2}hZ`Doag;IzdpOK~~L&-I59(!wW_|ll+LW(Rs1}cSb*bkO?^>*$^+L z?6vP!?j8*4%3FFJZ@$%k%M2CE-n_14&Tvm0bylLtZ{caezOp@ID^d7J-q1`_E%WH# zW!q#(t0xwQaij%U|BE;5BLZo{_SqQMGWF<4QlBUyhn6CY8?Ss>X53Fo%Gqe4<-IvJGyg)#3w4-z6FyK`s6b%& z-?e}iS|)FNgRZ;Lg9N%iYb@Vf^AwAfBm058ZrmTqU|ulpM1#9>AoB-f9>&1c3uOH} z`AMIQx}_b#*`cywz=AQ{Z01d!)LuG!lAhgC;s52@hKEM}eVYIO5=F65k0whgWpcmu zelN%SZ)F8=y{dr^Gu>-8Dl;bX`uaqTdhx3Me>MEhV~x!h>nuPNcMF3e17#UTBjbGQ zV=Jw$Ha0dzKY!*i)pTGk2rgN!FR?!&a6LNQ`WG~Qnok)vzY)|DIP{BuhRw1OMR>`w z_L+HH5KS9~DJbxHn(W|6%DTbX;F6lj4ZypbCpf49YOYIh>n?755z2&ggf_T}J5!t; zwIhZ*aM+$~v4;P|Y2VQeKl_sHZc8s(sfz^VgW^IFMF1;}XLEwkO^Diz6Rp{ie#esQ~bR9#CVsry>kyM1L6 z1iNt9Dyv<(!c9&EgO0L4o3eOFMx-<%B}_R|!%^_gW;ImRzI}lDVV|SPIQNCk44+VZ zV`g(;kRwn%N`>2h-LQV1yg7=k16k{5rzF)6F^Dg1PJ%z6}hG3ySD zbsfuVI~D1uek;;+9Ym*(W}sJ`KK-8+96>oqJCXNK!d=5vU5%uL?q4qUw+#<(L-}v% zeWw$XJmG_HW+tXT*O2bE0x66Hq^7{HFz%3ydAwn~nMZ2!oAtoB>K$U1XcA=;mleol z*BPqlA9?wkFsWxLRA1|BY{SII6 zC>1C9<5zt>IQY4{%g2c_MFT|wpZNm&uM0YZFDFIGM(fy>Q+-x{v7?@}9nooi`=F<< zKfHelC*J)*+c3P`hA~ONTfP{B0}+$-qwlClqNr=seD<^|7Y3 zD@A`w*pk63qBoFcfo;>5aLcNymua44uNDZ=Ytkmzk=naj6nLn1H+9(`|ltV!Dsx**qG{B{nkImK*S_=Pmt{ua{N^fzQ{} zskm5J-kmSkHTC|F9x21rpB2KdkLE9f71>IRT)nU7wC^ecA7rz$T~@sJZxsV>k(E7%B~!+a|D3Fp z($RGD;pO`EnU8t2SgSsI&`juQ3hU~sY3ots(2bA*-UR>mN=g~KuIXqx3$vjQ1YA|z z;JUA(Rc#>8nz0>0XiJQXDS_nLC(n*IcAI}8VH~I{cm_@sZPi>tLUBbz*4Z+({EJ^WH0ZH) z+C5m>s#Ae$QcgY59dD_QwaLbg#c?yF`#hrdZEnai6%`HbBDLTNzc*++hwt+DDBIaw zjemGWen3d{uu!W(I{Dd|P^9tGmIHD)j09+JvOtwGxx2~UwsEQbX+}MPO7-96oti8F z%8KccSI%OIx9AH5!#V;UifBU+*Gv09b>j*5c-!|f)i{!Q`?VsQV@rFte*rd_Jjr7) zsu*Q5IS9tI7GGV#V7{!fG8(9R8dZN5JI#o|zh~1-fU+rg(h(~9df5e4Y*BY~4T&&O zW5zxAFCYhjB;{z;OVt@d$P0~XxHvf_8ucvxeAjKM9z9uYcP5Vf@J&lOJ_LyYH}-h3 zKGKd?5t3JKkYJfA#}GZZO`SUId5Ty@?5L%>3e~C9u+#X4w22MIeAtN3>9cGyR79-_ z{7j*~gnUP0a7>lRUFUsT$g=NE^l$gQ8?G(sNC1kd_*OmXq?&byzrQ{?(uo-RhSgex)~f%g^Y{N%)#I|D{0uzXS~$5fA|AAy z%!j@?CV-MS_WAi9Pe);~<=54SY_fHj{KCSmhl^nbJ1PMI!6woA9YT{vZyhSIrEDA~ zewg&ign_TFuT8Qc)t^!)sIvq;dBqR5eb5p^&-Ej^$Ul~#?QV!A`S2h}FE-)_6CR(Et_+|$TI+AK7;C_5AF;i~thXwboa zQk0XQY9Bzi0!n|St6d~OA%z&ZaKC21#8+l>%mj;XJlZWc#b+4#L<1NC3gBmi;X!3- z8YPOw@3PA``O)5xtdE&RQ5Go928$^>*}9%MQ&VR&A_{?9 zBL@xfmQA~pELT#5^>MrVtyicsnCL;Y#>h$M&xH~NTzwCZa#T49=s++&zJl@<@NLi% zVST0u(P7d;Cew?H@;^yAIXJ{sRoU|KHd>)QR_(EI*X9K=bQm0SpfYpY79*$D7Av0h zD^(gRi9fzh2Dw(89Ch1m#8fWBOZ6WVAiQ9D?Sdc5fE3Rqr?oWXpj&spzm>-Ch@wsB z@c?mPZOSJHcAbb#Dg!Y)rN2IJa#_hnd#^M@4T1qmg@R7pAp*GtH?sLiwc&GIVj@N? z4Jb5-9hJRdL1a*N-<=q-m%Vr@g8nL){!7;3dx{7XaD)jJYIf)ApXSc~Shk-^U<9BG zI&MVA5?0qThjK)S)ILk#90d_(lOv9q@D zoLSh1ZbY1MAw&cb*fCh~g!I|v7!lCfxXS0wh8a?n!Ta6-z;4v*=N^|?mZF?)Iq8I+ zPy$kI`js7ZnmgXG-Q)bo_?6Hwvi+nj)~diCmjcer%#0e-IU+Jro;DRfLL8Dui(3!Q zF4e1N_^i-UEy?(qJb7%>o3u7Fx;m$!v007v149N%pDC`rJKjfhk8{PA9-gMZ>WYir}! z!W{N4->^s&6y^LC&!k1U6Pa))q5kr8;PaI}hSL?GO2o}Kc>wRGn6v#{wam-K*%7(6 zrkm?+Nn~m}@*dm*tV)%Z~R*Bv{3@PWdscM%Cx9{CCq5J>~d*oZ&hN#T;9#-b*2v^`6__$|VjY zw^g7oLnlopZu7H_kB`T9s;qwlXzCkLq)I;RbVE}2Bhv8*q8-1VIF=>Y6oCr6J0-6v zaR~{$FcCV;P3u>b zGu%K!;vy6SIGcqoKz*55s*Jnxr6|SA^Z=yq(n>rWrplYs&yGrqvW<$0nj}YEoXjXS zYJo_h$%tdOT<)L^s0t0u%~){nTQphm&V?d@#(@7YYl~wrNsAL}){kn+fu+p##h6I)6ork?@4Lz)s&?LzU%S%)|8zT$ZFCG zHEgdfJgGd|h2Xc#&ZbL=O}1|}4==lRWY)c}#Vnq&E)$_a@y9J#>gM^v6RO3gpLWOp zwfo<^pK3T)jEkK*05g?P&MFr_aGq0}98j!+g>exXrnq6{uR2OTvA3APnpDX_95!Z| z?o^O^e~8UIoUi+nl!2!6G<3ELCJ zsP+m9j1tvAPiMb@-+4dk@nZj(8W3-3MuPZ=tQlYAe)asaiUJ9G;R(niH*3oVjE|2G zJ(PgqM`l>UzMg_gRv+;3KVYqR>^5Z`H5Ai3N{4ffaIhr((yUztPgd7E|AQuF$CeKkOZ?Xl*pEpo-^YRs#Jf%^^!H*xHaCkA`tIg*a2#GK`Y22~rg_Uc*O!{%2V2W_n77D|RQ zvI@~QnenG|*J(#&C&X0oOgJiB`qhJkAQ%!|mscj*K=#)48u7zU$P63`fH}Kf`K{@TgZ}V{Oxv zIuR*GwO1>*8uU2-E&Yx3*8@lN$FMn8sX7ufQ}9uk5^m)EuH>!DjV_)#b9{=NZJ!w= zAFnV60+|*KH-UL?Zvloe%wg>ymWdv53%N-zm;CJX_xwtHDd3Uk27zk{T7vyQ6*)mT zWi;+wr4#0&hX3i7GEnrlcR%bKvz}mS4(qmRwYjhFUWYMsbec_h`p8qaR-O_*p%R zYXXvLr-6W!nLal}f;vu(`aA$4P)1b7f)j6ey1v3@nv9LPfH=gHtzN_0Rm3=ea9Oft z@sSa3j>$zkBX4dzCWQBexpyIp9o{Gso;o+b6c-x2NdS7yeZ*I739K0E2|>@TBm~kX zM^mq38N-g6CE695JPi#;n9nqn_*tGd8`PV`j=IRj9(E)%Y6!q8%yaJACb;cwGvI#w z?UowCd1^XkXlLTUtm!se@T^8qZ6+8nGuwd;d??0nK?v$Oge;d2?>T3<2`S=o^^_H5 zsGM$u#R^0!7Wj(aIt2Ev4$q&m3_>HDdCmV@@ z4_F;{pRKo$3(@5f@MSI-)z>CT=0*54)_dFcTyH%nd&yj=gHeOh)_qqIpqT>T{GOEc zK9P$i>Sm3zG#hZ?1Tn;1@V@bJC9ZHJxVui-GJ^q662>x#2Ge9fG=+zf5c_EauT0Jj zI~c!q6{#*+Oof3R^MQK?YP`?+==<`IFHXwJb218Q|`ew)*uS7L`M<*4=K#BwOP#ydMHlicOad1 zhj*$X_xOiyDXZe(cAIkiVT z^m3;hWQXs|V%ikL%(qmnxoNfKX`6hFIcZVRiAHk&S>)`Q zs;wH}=u&T$(EjubR_N~?xN?(?*-v-*u{L^g#Zt6sDao}$T0-KBXwelpU)l(tpL>s& zxVpPfOui(JB`s2$P6`Iqm+&Q<*$*o#7j{w^c%fiqkpdL|=(e82OoqQxWL zs}70e-BgLLqC_DQ3*p%X?My~_K;N-(mWpKYKYPZTpXenyD}j)iwVHLWcmI{gwg1Ya z!@V-YeGQk}2+nVG2U|E!y3ia_8<@ujDiNcz5H)ZK%IY#OQyHmMR>7gd z2r;eY|3HriGx-ZMYXCov9K?{$)S!dZAx3WC^>Cj7D8?v~RJ{xCiF)G$=RyX2?`H3T0<@h)&7Bt$bfqgeHU4KDM)d`qR=Ld@9=KY72MXZ)2YI2 zsa_?ZW7)u&YJ$(r$G82++N80cW%VcdlM0~7(5EBwClod|W_k6P_C{QP*K3Sfznhw4 zHfTxe?3A9h7O>65=nYNFr4>|vug;Ay#6D)?vt10uyzWSn{fwDnEy;48+Ip{p8&ZB479yil z%<QTNOyqA0RUd8LQS90R zqfjYMMM#O6F2`3760SHIL;Q$okQs9?d7g@CHm%BPxdB71`;k^$GI@QL@aPy4s*$u1x;alEE`(CUGi#eZK*K`i)j@J9J5u=(Fs+fhJ< z7iFJZUokXGFf}SorsIWi{FOLd5Z>zOVIh1NH>mH5P$`AJBl_f)<$T%eJFX!_GZ3A6 z{h!L)ibd|yY($=V(4oyQd>>WC;M7SlpMGDUbQZ-LH`$2#VmpuO_K%-h)N6`X;t6rJ zlBjjpCGao)uYGN1$qVRC-`#~AV&^ZTA!O^LkxV1bV*l+mg(;|kry4*UZcxi!IJnNTcS{ z#nM7AciT^Y8s|;%rI^IR3z1+!L#5eCa2>$xWW{~na3MiiLjwySr3z(XCI>Cm%A8r$ z$#O}P8Rx|D(dU%)zK;MG-f5tzsIL!1%(i3~;TU-G_K%ClotDaNYT^aNO+Zi8S?Rm< zyV&mSIFktHn&8g?m~H8dF7xOHqUas8>;6PJLq<_m)#q@3MUHs`~K|kvbMR(rxT^k$}xsQyO=w_ur`1o-{F**rX;$X-+ znl7wdx#kq^n1%a0aS}A~qMzFvLRocL5&jwP>9;{iFtSU0?V8{w{-k>}WwwsdAuZ5` zwJwdgXgqlS;^s&WOHSQz@%}sHIUCQ$o z=}M!blY9JNsd@M!hv_al)h}i2m@IZ{ZLrI+`OR3vs98D4pP)KOs`O zJb6rh_ZX~HrG(b^7)As^r@v=&X|n8!+Urq9>p&J_Kho{zzj)Oqm8wt6 zWk#RN0|1^%6353ESB=%1SgkkVAV!A4J;sFZ>Epo| zOQ9APx5W%t>D>?LQna2RHFTuf^D{5lYpCwwvwKSrj_U6>kriUXFPuR6 zbrds#f-(sZoX91`8x0CG$)LsNCCm?gFHWm4elBio#32#Ke^_Yb1nRdh+MGg`6r(&P zF5REBeonVzy?CFWDki1?TH^RR#|V%TOFx&8&Q1|acXx`0Am5YL4B!u72LjKKr^cJ~ zGn>|0x7xLz0K#gucJK9H^ZId3#t%aCWXfDq-0?chGWZcdP63%PJv}X5rryhrsv>-?neTf-aMJZE9&mk7BS)Ju`O)rAGm&<$h#Vct=ld67An4{tJ7D-F4fYXWSsxDCD;qj9=*|H*S)cFO~&`k>EPe85zv*IAznf%%(!M+R(O?~$nrr+ z8{Q)MN1KojxjuQBl~j^s^VLO1kg9RzsB~g+@Q>wL2Ha8X(GRq-7Dj&FJo?SIT%I22 zWfIWJfG+`ydW)fMkv42ERZeQ&BNqZFVj4Ww-Q4ba*{*g4__Uvg*a5w}aVh!;0tkwL zmi6}oj3}cLaRebuXeJIFs){_W1p z2gVE!%ZsUh!voZ{yI?>#?Pf>K4|L!;nz!GZmJJ*)@H?cP5ZeEFywdd9rJttSh8h!T zWS29-0V9mnec7a#e_-kW?CwZB*|_+_Quxw$-{~6X)XK{VtE5D~QVZeWgngRb=^L~? z3vF=HtaNvG(>uS-`uX$e^_J{UH4pZjtFGkSVlyRTGEx-T)zUMint8@=Sl8Qgr=9iH zENOl3VDu!g#9hZv_bfB;tXu=;pA1|euD^50xXVT3vAC#X3M%PztMBguiyv)7I|X%t zNVi;OpZW+>D zqV)~fZ~bROD#XjuSP*gY^A2k`B?!r2l)&uKhp-?`#(vHxd{nh=V#=wip@AG^ zS{su_+Q}wQU2I>DAvwQwyu{OE{IvTz{;%0TR@%SfqK8Yh-s{Cqs6By#yY7&B+2cgQ zHssF@uaM|Yh3JdO=L_mk!N?(6btSa#C63~PKkHN68XD>xo@pU^rVYH~6?%&!C&JsB z#3bWNoSZ+>$^1M4I{ZLYeK*B9!GB5YQnkw6>~2<;&HkMi>M5v_kQablK#5MhSS7pT zR(~Oq#T$~N*ePg46MkXinybMIv82AyniK@vkWIIi5ON#u#iBn^RR;=K=Y?%L{Jt@J z8g;*>f>Z#wO*x$Nw86jk5mv4Gl@7mIQ=^rjrx@4%#MG1YE7{ z?aO#FeqoZTD};~(b610Q6|fgvz6{t)r#!kk7*%q`=N*@cDIqR|FyLStf>x;+qsb^= zq}IpIy*E}6YSTBge|eWMdDaci-%tK@0*qaq|19FwnGND%R`Q#f^~NQt79YWk*2z(0 zn&+tB6`7k`ho%2vHK-XOu*!WGro$0$z#3~QCX`H#>NW)z>MH|`1X)q`EC~omXh1Lz zxXdO1SFmM`_IQVo2o4Ys5p9oro7{@4-#6_S4spWj z#5c9(p7`^E-)Xl!Rxcv$s!tYyyS(rCAA3#n?9tgrtQLyP%vt=Za z)Q?@CUVe?W-*<8Y(>Gx~3R%$fosY4)1innT&#go3k}66sSR$t=cooFm(OrmXZLVj9 zrP{!`*hMhzDX)v`%+<#(&IKo-GyB)w%_Lclu%W3TNr7gu<%Y+N!e*ira7&puuRk3; zh)3-s4v{}JMwFC(j%~+ zE2*f60usk>8T)H1t6**KU}kEX!lKVxk|Q5h&f)m0Qb`Go!YxmSIpUwDQ!jGcZV3^^ zq9#!=mLvkiXag9*OsyrGIa!C@B(M%B!b`j>b@*7G+5k_2ik^_9Z22P&KmY3Bubq`2 zv#OO9-DejJNvu9hj;&g3{bu{U%8G*BIt#L5J;r*=al(N?lmk6Y!g3?ep;FHH%8$-7 zrFsl0a-~s+NKKB5<5-pZtrsO3Tml?1u@eV<)Wcy3+l#YbY1-NZ>2bbV%ftb6&kdj3 z>S4&^*yP_QeS(0I0kl6ZOTVQXns<{Pz}ZIoPh88HGp>Xvs`eFIaoe-sO0$2@5*JjT z=HD8w$v~*^4RbXO>I&ZZVay z;>8A>g-ki>F-GJV&V|sIn+V93#aq?;&ixcV;Lx}0_^2D zIw!*ng;oVcSEgN;tRi7wa9cteYuJVWX->0)IG_8{^763dj98Rm^Er$ta%@<*gY8%r zA0n4!-KTk0TDn0DJuyXBx@f78y*(|3U1vu9(OFw}KhaXP?-SYfLo%iUGVTQufNHD87wh1Gb8!as7#F>!&BYBYZJ4{{&u0w zUC>b2(C?{D^@rObfzWv$*73@8;=kD>^^<2$SCTmVQcT)wJ%E(OM$us5NA%yktlkBO zo-U*A(;c3SP?VAG~*)%6aV{D}Btxje60Tpt2Oae97SB zX^cqw{1oA1317T#4#6>r{AJsW$|@O(c$-c3qrb4Qo~5}t+)Ui`(ozg~+M0kt(zN!A zKNt=ey>EMy=I_6+(qc%X)$Q`83(rw4BrmDzXfBI8nJj(Ppfd-nF&Uf?IY>SFf0 zE?r+PYBJt4dz*7AJ3d)p6B7kuzf}eon8muY5)Q`ec8n|HdtGy7%Id#Bjx5BvA4`>@ zWQhIDe4mB|Sa8ZSfih2_ z&V2@F5si8Y-k)T!T7Q9xwv7RhwngR%`Sq z=p7Jhe3Q57!z9?dWhvKdCLkN-N-qG+V|se~$@Yi8l0Pu^b9$`yyZX8LnYQ&s^`DQp z=jxG2kQqvNyQEAkvf!78+b`#~edL(4#aUjJWK5Of@$=0??s;2 znOoFzzQD`C!4ix6Y#hUuW{*$hm6h^u z3xDBZ%Q}B5=CqkyAl@eToPCpQEXr$^=OgI%RDsJn$%!6w;7Tvsd7Y6hIrW~-JUvZb(zwe2$^z$Yd z8jU70&i|@^DMR*JDa{&y`vaQ-B8Dq|T<9P?jxJ&#eBroLCHHGT-8c%YO`*e&!%B;U z1a{$y!V8XU{g>TqZ2RQ2(jXMQK`3!AGNmFNHa>ldRwDO@$~&Ruti>fx7zU2pAMyQ|N`(^}r;6^z}z;HK}d}6ye)qXc=U7+H^nC2ZhTsdpLerEpQ z+;Hb={`D*B=IqO1bB4>;GP?%IO-SY;1KUhuI5?h=t4tkf(3w7C6mWk6W8p{(T`}$+ zAhl%N^~)0`cb2kv+7pLe^0J8vvuKrBST^A0Mti2ZZ-oKLpt2k{JExADhlhg~BB$+% zXvJ&@*i48#eny-^`mk_0MuC@IY?s{S%R=(ZO*=qRB|hBBRF>IcCJiwffFEVo6lwkT zZA1Vt(2m#Nii9TWfK~JP`PsT0NO{*UnhHS1n`%&bwzWZ`23fLQ>zxcEZ5!h(XgR9j zjKGxPD*B%gN&eMak0#bTY?pu0QvQU6Rfds^8<}ac*$#bQE1an}w5ZoD_Nw*Z`JJkq zfErVt8_=-L`b@d`_Ro5Q0K<0=J5+HX;>;{VM#<}Zdz)plN(JDjvzY9bw9X!&6FEl$ z1Z84N_v;@vmk58af&N)%y~zMPwXs3&i-1@;AEShgqJ&M$fWuUpA`f^e1s^?u#-T96 z31WFSf6mU6I{iegB@|Jv&%Iw4R+KO$0fE$`Chic7XB-?l&}FHVpyZ`%$pb{~($L7@ zXROY51$+r@ygQ>5-;)6Bak=y8qiU;%n%*XV%=2C(Q%&nP%M^Vi(|@8x;H&inMfjci z<5^9hu!es&2atR!tO2aqO{feR(5JEy)9TX_V+c3s7R4KziQp#+=-A?T4IZ*GD3&C^ z%qvj(3Jp^8i z><1K`b>f-<2;6~6tVe%&7^zPEteCXP2{#JbSp>O(KRzbHdY;a|xH6>|hQGe+8w}p_ zhY+vQtUwBkYl(Lg&9$z;C>u>j*T{L%JULR+F``#WuiY(G1aXiXk z);Uu!L&J%aGq!-G*nDcDkpJH9jYvB^7HLaI5fy$3DozUOE2Ib$hD!n0S*2tRAL~zE z85w@qzm-*$knl-2$CNth@ZRlLny++Knb*{wzn{JIBQ4eQzPhGz<+9KDtlAj_Uf+7z z4HPXCh<75UDjxG4!bpZcs889=93mj1NGs`ygULKydhIKvDJ$r_t6=1j9rFS7g}-dD z48bzp2{uM)qbLM@5}HHBFD?0-@~ zAdsPvvHqriC6yXL?(^qOXqqcgOL(d#0Twxo*nWB@CMs;?O%yml-}4fhIH)y??k{n3 zbK7vTrcObaw#FW2;V(HbJo?f7dw|G7q&MOW$0JbQD&&oOHn2le)l8B zvbFr-dK(a<$k=-Jgu+owLF^#vkTD=wkZlH+ahqc+&;z21WA6dI7B}GL>c1N{R(|Xug0?NGebzHivkP=aFy344 zKA=Xuq7UVWp_+sL$&7ppQfxgRo^*Ys=_39^T=VKm+jhgAf}(0#)4$L$HbVD`7t_Vr z?Mw_|nm2+Qj{Mktxu?@X{))xZ8uIy*gZcGESMIDA-}j%{fZQ!b}B zsWV&FT7n2>@>E7x?C0mi5UFb#dEN5>rymmf%m=O*_&1+x=A&Y1S>2NCn z%s0Dy!(CAR;mO>}iYlzIvhwiY4oJJTH6y?SC$Fsh?s8Hf^3NZwt#f{r<{TZ$gcMDu zR)a5XG7(Ivxhn>7=DC0f&P~|Qt=#jIqSypJaa0@_>|7&G5u+KjVM%M)*a}K<6H?*w zsgXcRWVH(gazUegRg2tY4rR5qpRLEbc~`8_K9|~WOfZ`sN^83we1wfe=SyzDarv2b zEb5i?Q5(^y1}}q6j2^dFrhglSJgoclcKh<7vZkh@s3WXha%?3H0C3vfcWI2d?h|Nh79x` z@+ZVA5}AZy$lwD%B0?C)$b!#MOJXxz>n=MbE^Tst+w`44Cku#$x`^DnDNs+(i=d5( zw!ZWaS|daIJz>*%*@9FY(_|kwn8i*#+sz?R1-k7}TZvH8bkprv3|g+e+5Do$FJ}zn zr(CMoh4g`lv}j8=QrO_vU^|A7b6*qRDf+cI|5GS^BB*Fm8$~3w+Fg1zz3%r!^=6Zn zNrFSL=E(p2Nr>LuWV8#4OT|_zWD<~aVG0B*pJn(HFy8M8OUXH1F)+wbM&P2?o2){B zGhyx)@FnFcu#vE+ST>6-9hC~4zqxsGr zPHLLqOO-fh=jb0EoKQ5g2QTl^Fqi=mRMSZsyx$+A!96LfV=f52{^#cD0UY$mVC_P! zP_%em^T$7jGb+f53rftdu1@p+*>Lvw44m#t@y96!%G;(>X06#ECUW?cd*1WoZ9U+O zwY9Yc!NCAWaZIVsy@VFz+zbJqFt#)WX7q*|M7_LMV&mG!xqUUWT>cAPCZ>xf;sUVm zoVj@vK72sFsOK0nXS7#DrbdwO71N>h;8zIHLSP-2r*<$U{Yqt$1u8OSC=?_%-&xd& zA*Sjw(R+)5BrLrv|3;@a9^Qe$-CpQ}m*B6$}v zoU}^ci`soLkMea@>9Mzfvq^NsX!To5iLN(`R$TT=ZcPsB^4eBx_Ep04F%ljgX!TZ; zw0v}-2~C!!GQ@!q=pT~lb*}nMy@VV}m5|)G>Eb9cqo)C)Ji1%j-kcMLAwCT!4KHv7 z*A5D|qf9pH40x3F3g{L6Qnjk;t3Nso%9WA=f||GTxc! ztx59Z@vE-@B7{WtEmz+XR@|CR$BoD7oW1SfeYi`!*CWTa+xTHaF~c$<&+Odyd(a8O zK>iZ>mf1?n9@2^N%b>>cEB23n<5qsC4C@l8U}2gsdjoVY?-&X;X1}^KfKGNbRP8pj zGkEi6^9y`uBP*ZcHL%Rr#D_jv=dQu7xG6lYx7=KqfH-9}Y+srF=LN8WzR>?}koxiZ z;uOsu{gP!TNHGBC7o}YQLh%#!zB?9QweINisO;A-d6aMPL+LlW(*YXx^434T^^I#h z-jtlpibfBfQ_lK&khx_LWfTEY$~oLuNxEb?Fc&6(d!DigbkgOiNqhgz zCO#Zk$Hai(e%L2P#5driM1-ed_BTzt!Ouarm2XVtEvTDj4r_kRU`%d`9xW=guu5Vu zkYbKiV^+}kgz|N-^h;^T%8E-|Sa@|S2Np}5d|dgrl2o;p$bb6l)ag-XC0pp`E=Ss3 zGOn&nY+YxRP4A?or2$VJR_smPeIs1_yE08}Z4D#cUmwVxK|tH6J|Vq1UY)!RID<_; zT^&7mZ+70&fxWYvlt)llRTZz+5{ra2Pa?lm7Kq;>f>6g1)}Op)?E6i6Ao9E z-`70Dr;~if^Y*H^RNKD5+6~SmA(p4BhvT0SG_FxG5p3tIS#<9()(-Pqs^P*p;H=Qu zm&dM@UPDJ`O!0)g>1v|robLZx{39WPmdNK7An8{@DGvzUjVAvv(LNENwz7V|#G!Wh zpFwT9G(}jcHK=85L`C_nm?AKLe#=(QsiTKJ-_YSSz@@&&CSO%SW~|l z;jHBn!jk^=QYGS$WEfoU{4(R7+tI<_VZeL?g97p*3~KW__=R$FbG_fV#w(-tpz6X5bMaEIl@OAdl zMs?ZE%^tVJi({=>ANMEq6WEk*AGEuCdBPI=51rLC5Uw9+q?%;0i-FA+L`8y3{Z3K`#lCdn<)(AfAXeXPXI-97Wd>&b9y)_0JWfx!)+Z0%)b zmR9R<)Ikf!8o+co|NHmvV)NMfNW!i0I`6A}%B)htGGXx|71#9+?`N%z`*%f&|2{-) z8@tsrwRrdKl-Y|~#_1zcj3Rn&Wtot1@qbFoGi5Nkt3@bcLy-pb-2@O#K@cM& zuc}M;X9-BD4bQsrP9F34o>lZFR?3$RM$lXlk<}$ypku;GBX@OTH8zHRjs0@L=iV?X zYrTwC?6G3Im=(S4jG-(*G^m&pGIlVerUx$yAt3^b1-0i#J5D1j3n{4T4aaR$Xe-xv z{wb)5QVPnnXNH4ht_dgyVqy@PIyOJ>wg-op7@wE{A-p8=!l~u)emb5;lG4tWPfUi0 ziVPlc*S1Yo_6qEs+s-t}=8Z8fbZ2L0KN;(&tQ_b>u03F^1y@(KlK8L+lBGi~zI1i~ z?_@^v1b8wq;6wi$$x8g&Y`x3m6* zEmIs8t9Bzi!Dt0rb&MxQ7Mwibux?zGH`ooGafVe8D;{_;Y%CTH(f= zo;*G-zlux^gYp{96`QS z26|2R3kD`u>ZbE!!lKmoFC{!`Q>)>d5dBa%dI_#8_ALt1EvJtguP-&!dA<#%b%JS( zx@mror!8ej_%9dn0UZbRLqxXtqh9a8`5KX9?z~PVCp#C$#Kz`*`5P`YF6g2lI~0XQ zZ(wU>C5^bOLu{Grp5{3ag;j!p%|MgEVl4V??|IYTJ$~gKcX&n@s>_H}K=f4ah~r2oi4ThdQ)B9G*A||1(TpUdUkg9FWa$e>2fz& ziSucfTBw3})Z3ZO%-q~s3D8cfJ<9_-&h&}W+RgT3`}_NVO}GCCgkm;dz^_c{&?|0Q zNJ;4Vnjmk=v-e=92Zp%nd5<|@iF>+B==o4-DvQHfRkO_=ys@)Z@Wwm{@BKzoXrVy8 zxD$yKCp({N%4U~$yeQP`OQXigb>f%7eA#JI_%qJdarsMZ&;T~aTSc-i_EG68&#BSV z{u3aie9Arv9<)w`PPEVAq2@{R-5-42 zrP;fjPqCyYiA2X>gXcXv%*a?4F$P2lmbHRbpih^u!_izwRQBES6PhO96AAR~_>$nE znXj8-O1vjMtXKVx4pSuIt81$Xyn5Cp)S#`by-t}ad*r;-vAdtyeC(PZg*DXq&YF?n(oivyiFL^+81 zni!&@qiJi)NfM=<>YA~``$R}k^E->MjOD-um{qv_CpwrFgNj6X-t^T5zL~b({(bX1 z(z;~$%ISot*nPOagUy6ASs0EaIGCwU+%bI>g|xv=p43}ssF8Id<=?}f6(%ScFamzc zfk_m~a;kst67?uH5i6mosW~|@F^EjHP({ZZPKG^#j=^LGk_J9VIB>OttW;j{wB30} z^7dp&j>91-f*Q{26Ii&2 zW@A(k8H}Zu)X;EC$4MWH4^{k`E~esv9sOz#_sP_j+vKn9XY43tTq_m9-k(*vEj3q@ zeCKZRxx6=!YF#r$QkIUZtrrzRg`~cMd2K#7N8X@)p97$a~`;(gbw&T93#*d8Sh z7US(Os5Ra0kG#jARvhmJj!;{m*8a9Ah9b~(CG@f*5mA=W;NLT!e6L0RQ(Sd2es^8rjNE|484i|dbTDjW@ zc>U5e{pI`~bQ|0+h0#ovK6l5S>)r>yVTimocRPr~em>n_$<5_Xz12LW1tQfugLq&y zjEVQ%CI58Te7^dl@wBG>Y*{GB`+0}>HN#L-)1x=}Z;4#`OJ`S?|8Vd5V`A~dfe7LO z?JKiu_BTFCk$VBD(bD&wDzmPrUI@hy{o#S6;+P{UVt?*P6Z}yfpyO{B-(B`M%&2-> z!|voTWpVSUNCvNdC`2|Ria121%#u`*x{3WHeXgKIE`IZl(JrJl>5*BGGx*qjletRI zm7XQRaxC`gpy+$+LFFPzGV1Vu8@O&YqWpnk_hdp{bvV)*Q7%?O?*u;$e|w!gAbx$x zSK$-=Hu|3zvFeGqG#3jV4XztXL5yIiv!s!D3La6zdEN)jjd(h$?bb_UA4B$_1Ws6l z<Di|6ZXIzll)bq7T~T1A_<*l)|p;xzJ-6AYsiK@mv_BKAV-tUql(n^n7s zWiUo3JXBNC<;=~AlBt!p)4T7H^w$Xg_{jco;wF&hSmx#R_MO1s;36t5W(k+Upx$&k z1hXPKa=7!+M@k6^$gd*HpH)@d!Ao&6wB8w-m6p@|rsAC0Sr_3VYFts3lr9Nno97a1 zI>9`gIgURkR@Cz=Vw#$ql$4a?IXuZXF=Dt-J+$R^Q9#=`JUmW@9XtICkMtwl%+h=a zn$q^nS~)UO-jr0+f1yU@;YL@+gX-xj>KRfTA4|%pLsl}`s3%7zcL#8|wh;cYC_rqX za<4MwI3VRQ3wvlnCpslOv_aS{J)vKC<*erTqHn=w1`$l^@NO+b%J1Lx0V43!GCMmXNMl3Rt-&t$$V*XC>(Mzydu#Sd& zuU2XKVE3B6-;L5YVb;t&npZXf@ZdRrd0mNSLRTeh`hiXTf z%&$cB3wrMu&MeOnd(Xy#g1(EawR*rMjX)?R3%R~ZiO9|O8R0i>BaRrYl!*kR*aMuo09OZ zFi-(KA`sE|w)ty_)4V9Wa29HOgZtXY!tgtEYoQR6P-SvowzD;H zKTM3{7Z)nR(D3jGb$2VGk|JmCvE&@3H&kY8<0=i4h}0L1EhpyEM0q&8C=3aeNXqRe z)13|N*Z6L9nGj`ntUTtxvAv!{w<0(wiNOmV#!`8jfs*U(Up_kgEny6K6YNR?vVPA7 zn1zr8=-Y%%M5{gHjiVVt_Ly1*9!!Ri@Ee>wfn`s%#4bvx?m zdu^AGZ=3zys_RsCZP$a%dBwOTNExD>D^)n&s6+lYZYijim6s=ElwI)mZy$=%=!=eHjG(F>dShF|~kz51+Ja@MsT* zhtIFTDpL@^?$UbLvW#`9}$a`kd`dG4kK?}GhplFfgId7k(1%K zR`&cy0%(Ji7`+_P1bM3AyY`XsQ4tkPkM3Kt6$AgEj6{l>AH(!aMK0sG@UpTQ-0sM& z{4}zLkg?`pKeUyWMO73SCoh}bNmS9$STn^;aOQrZGJE?$H;(x9v=U@ebp{) z)_UQi_jF&YWGrstYc)&J5f$DnrqJ>7n}}Z#1zhKUveK>id-h{r^B=10Y_eMt>=cud zbEQg!@|0OZYWP$%a;3FUdeb0R@d9&Y!&R_Q={^J{Y+gY-@d#w31tkP~jSEX7q>D+x zV&UT}v#3cC6-cLa?cgg6Du;$0Dc6^XyV{huef{blOCxG|ol#$28THPk@rnh4O0f)M zE~(;3VuXSyZ*q}U;~KhsWFq_L?g)m;ClMWIyt%T8;xcM+TR9A5g|fy@r0%Jn#hFjy zh16xs=H7wlR;;BW1j$`}wqf!QhL1_Y3E{o12>+ z;1z8z`u?51z&a}_HFd8FT+2-K^kdR@>o7%~odN{#p)p5CN5%}nv!=LV-kU#z&cJ0W zpFZ}fs=@57F7&&(awyFC?K?O!Qndt)h6>0c>`P(yu`kLdjw)*V=t`dO3n2_vL42h|Eu$-^Jo9=e21Xb%KMhtVTovb zK}TG+_^P7GsK~s(=IM=3zhD>k-cNj8tM|g%Bte~sVtC5=_3{zMiZ$d&;C6FpQj-~9 zT*xcbP|wBbr=Z@bD@7ITbD27$`7gRXZk03b8eerNrjJgDv@iWr%qOp3jBgq&G;6%y z;nEygGSKH`^&dsAAGL%gT!`#q25u;K>^=BzOffU@43B=|!z*uUO(E{TdJr%MLjrOI zIxnmpfmDZHF|;T-?I(@`vXFko5EZu(*QpvQ=PyhC`Ed;C$wxVM{89MnXGKN-A?eat zF;Q2J1+AQt@d?4SY)H)&VEcS21nfu=Eqsp=b7f6(da~Fmiwv$zn~4f9{_U(vH%b9d z`O1$x=T8{rA2ni=vQgULMP)QxW(oZQ?$sfC(AtqmAAecTu}gQ&)pN}^+Y`se@pM5v z>?dS}*pC!dD3)5ARKk;4qp_o3OZL)KN*b%cy~r~c(M6Tl&=hvn=V}4>+hbe{2m|Zp zy4mEUZ_lV(mUI2W+BOtf zkV%nhU_okD$0qZJd3$?POh8&Hd=oWrAjRkE3=}VDZjLPs7OkWkUA(vzv_Uy5t)l^= zpnZ0SC&){9QTZ&k%(vi{1VMVk?T;bZ+aTf8LJoj5+KT-QmS?De&wN{#P><`x#;{x;dazC7oG z{^e1Zo1pm}03m`(K@-y940;uuj+F%Wi|v8btAnY4<4_y}Zu=Lu^Zl2{^Np*kyw@jg z(`@LEuO>`lJ=I| z?6q(lwro6th8>XslfjOFqDNCzvf4@-D@3k@i)myUgQl(Ds-~=@Ak%fS9kyj1G}Uo zKHkm~dUIM&Ss(x8Zzpr29!eI}l)5u&w(uWES$}46DmrBnRp%C}Hx$(F?q1OmFBYY@ zdWv4e(4Nupt-cX2+^ysVRL4Iy-;g3wO#LBsg{-gokWWN~9>EYW9&cJa`l+E8EgKne z46il8q>Ph_H3er8R>fbTHQX0`E-VVsUK~LyTavAi&AI4_kmz$suo_|-pXAv;L`B)J z(1?m)(W#1x^j+6?a zc3Pw|$95z|WnuoYVlgIgp3UtPbhL$(AndbR*nJw1fYP27S5ptxUu)vv1VMu{SV468 zEoIr_{PJRAgg~=#6@f^(-HJ8P5sZwpOV&cAPt_}&w)aKgLIMZ zN0Mg`UceFlY}B93oiizzSBN%=>F(}+0TfTCzrLJzdTzD1=sWd56@i>soo+A$3}Vr1 zVjB1ymRJu&@SS&D-OQ;Z4uWjcuImzJ4Zo}G4gM{QKVyb3m#tgy&Tmj*%1ewVm;JK( z+v`ql<@;k0>-}#um44&%e>T6qfo_7_9)6+cE6fhiqX?QJqyZM={*-;@T!Cv%{TtIP zP*wTm4#Be}pzn778({AG0jkib=c~g0WUlUKRn=`PJ3Icie;Syfa!fxc?9KW-yC2t1 z&ke+dKzGvvGJT0VHiHoqS#UZIOS2_AK}xS<&h836_J2UxNt$1{T*txj0 zy1~CZio>@!ymRB@uAz}?#%3Mbx3wEb$hVy5ce}Lzc-CGEWJ1MQjDolI@mK&f zsX{e6ny>IaT-I|Qz)DpsmFMX(-2*s}>rURwby>69V-B(&Q+k8{^8;|ROff69fH~aI zUa!sV@anm)v?|684tov@kFXH?gR;0M1 z_RkIHA;R{%lO=X-vmPNVwa;3SYEGR3!RlU;e-{IX?)`=mS9Ez1oIMM&=E%SfSIPK7JvNOrTuPVBfqElObfslYs{%|PfjK{49GOw67C z;MWLqcX6-)D>PKK=b_p4|4W^Os|ea!+4NowJBT=zJiMfYKIXJdTno0}R46o4jS zt=+S6r@93W`s=um<$JX83R{PtTP{f{ zo9;hklKQ2^rI(W?jkpZD!;e(%@GN)nxeNfj_-<)=9?(9mnqKTT?kryZe9p6iru*>yd{C!XMMY9Y6-$F*OmvQ- z87eCa-D#N*)DdjO7UD5kldJ~j&s1=;gMeYi8Wx`8h>C*G;Pw6(jXgz;77YX#ie;0! zE6uYr>rlmrA$|tbAF|WZEO_~rt!$%b=MLos+)%OG#3)h!7Ffd*#lz%nd^M+>Aqd{T zWy)IN%jmYEMVM;O+1{@2cv=2_Eh$>AIy>)$8?Rf`)R814bb*6NK63KoDudUYYOZXY zOsE#vXB9aGUeUQWeA(0WJ@9UjU}zX852#6$4&(;d%Wn?0EIshY7 zgDwyLdic=I=CF`?_6;Bfe7t4ZCu7jo9Cv|O7Q>Iy2|Q_~rBpj};5;@LG(Bq>-(T*T z9~uOJxnx!oce&nFsu)nT?S+Ngtx#>H)<;92iU)l2T3cI#c#uy?Pv;8&8Oid74Q4XSbcP1C3yI0e zI~9QO0qpSi!3_{UyY`0kHuFFI?PL5pF}CFt@m8E?KP~8~T{+C1k(*gqw8_cILA+tU zH#fk~00zeAlj>T4EmNnQ>Ni=btOMj3+V?XrSP(G_dexkSw%^OkANkY@V}Kgutw=!~ z4nlc>+~<#JAjZU+#{5XDN}E+sU*^PAB6EzXy~<^_SO!9q;s-#PX5r^iKm{teYo{Sc zl?(qBG|^aQP4^l+9B>$=`)cNc8%NXVVvomCSC&&fk5tXRB(NDQ71e~I{|=SmWAPQ0 zCNr_#uJ(V6W_wwkKZOnKAflDa5JLN31*$JP-{vJ~TF(?g);`VmNELy!KT~8re2y8c z#=oEIQ%c(Uo^Nvm?|;+(lJc%-g+aF?_?~?T^|)&9P)IP4OD~>zlT>YPdiu{{Tr#i` z;!+`(^{(P2Ka$bNgL}uy#-X&S7*=DspIn3hId*%MpF^Rnh%wCkE3IlhME#kji9Tn* z>(2YaFp*ko6&@c%*Zs+zsuAMg6L?kn&wKs0@u<=lli7kU)UIsD8$Gk>aj=}tsT2fp zbBl|^-_{;=S{w*PVS(U@$NLA!jZNiRUj%M;d2U-W%RGT_a2x?2hs)=|Q1ZiH&|}Y} zIIy(F;M-DN&~h8F`sx0KVp9q2Z>G425RnjpVxzLIv6q7M6A$M6!iTcsX0v;MS$G>s z4i0fonjZ+Kb6blf-!Bwc%|e%Ga2XyRCH=+{Ikb|fnj}pz{MRxm7f*ON1=q#Q&&IgO zDF&}0A!LFjs&MnBcs2>dA}``wESw2Q7nppe5>*kI`P-WNkKZ8VgZY4jp8FowuEjxq zWkm}03QI)T7Z6ceTHP5cO#>d3q2n9$=>EiJ2~RDU+U_>EGCmP&8RTJHB=?&X?1hA6 zHCYB56AGkl$;uCD<~r9QVogtHtiJ`H2`20b<)5YzN5{U?;Atpm>Ed_lQ$dxaij(DP zi}uLFuht-bJpSzU{2z?fc}M#8EWD&f{6R3nq~$TbBWi3IkL|WNn=3>NzFHsX6e?(# zN`BNsDR?^Hrs(MT+<(H{#X*ad6ybhH-PT9-@zXR1Oj`{JCCvv+4I??}yL<}@zr$-6 z0A+M`nGVJEuCA``TvjzUG^_&pb6bKa{vd=VYJGkE-`fG!QgR=E(^9-VKYj%b)%pyu zz+GOBzX>${zO@!JP={LG55H!R!*^QGo59u#uk)J)L!o@G@p|8XeZ*%iCNrL0SGlLp z-pWsg#%}@*P%!|6q4YPLrx%P`im2xAN|o}yArWAi1G`vy^LbcU*!m0hEKsPZE|=Bb z-`{s_Z<`E#$qj4py}xX#aIM#7_yMFR(gBaT020yZ22&c&!T!Ea7_TOvu7AIA%Wi;t z*X{lr%6yHFrvZARe=8d=%~ri3aQ9-Td;kr4)5T1Et}_zp0jl8FZRL=d04k<*IX_Uz zuqQKE$xjdN0K{AM)-oC5R^~qh5b|8eN?BU21aHmn&DSg4XT82RLM_@rgU;VL-c3Lq zg@i`%LT5V_3jygn5RU2A+xw}(9JKk@8!|Hrz2@+y8IhXym~-n zB^%B8AXOv~M}w)lH=M3{Iqb^F9x;vd&3{{oVw+A4n|aUkbuoIFiQ;<|<_f3w)ull* zq0R1WK=y!nURNsh`7>3b5xse)VwG7iLwxjVVEFH5X!)|Qm%r;aCS>g;IOX_H{SxseC zLKH-rv*Qh&N%>HIH@Hr{H`r)^s9lLhi)8iR)*)DL$Jv_tX^jx`jq}N$xjI}|#Vs`I z2)$G>Pu4-@eYL$khi7-(UK8sHZYh}x(kG22S+tOC<4UR6BK{)8K9)al&?+-^_86q3 zi5zI6#c|n%#lGo}+f^Z`lV_u!8IZMUzAt;DNvMvHEiY;{PI_ z$Z*1sg3T;_oPH2wSR{cITRlY~AZQ2{@6GRQOg=kvpraFLMS`e+HCTTltE8$+qQZvG z5|j8PKrz9hn67B;jkRTza#jPY_)E;8Is0^_rT%7uaDHI{Ba))LvN9il4C4&U1?#YF z`^Alo*^LKGMwi!kyXjhiX>6CjK2dKehgda5*VJ^m=gH^l;^Aci4s`44hcf2Fc=1N$ zATKAKt#}TP0Qjt^{x>~5fs=8&>PbB37L54QzGdz92-K7Cy%Ogsfx8ny&6M~5Ru2TZ z&LU`vj@w#6Typ&P2Cy}00z|Wafl-u9$>ef0Se9_-Cg6NqX@GbkdG=Mt+xrJQH8pj$ z)%5)Q{P{);KwVFpv$C>wI<#g>+J$9Pj%&}w!jVhXs6vdkdPDzrfOQ{NJh_1exjnx6 zgQl|bX2@|Xm42`_i2uK$ zBJ!7N(C$O_Nw=(2KY{CB--|7Hyq-b3E`R%Ch?tAHbu%~}#_@UTf87g3*<9vrmj^&_ z-QP+Y!ZYD3nqqNdktv-hq7I3?7=O`!`Tl<`h?PSUzIx5YObhk#In90)D$lUW5UYOS z&Y(%|g1jDD@b1BFJ-JT^C4I*OSwB$qezNLqAzYj?pXe))9rp>pQ-rF6%s?mjFbAy> zxie?ai+^WIMX6@VRG4oAzl22^JWE0lzlpSqHvD&bb!9wP=pN!=f^h04?-}0l#T2Pl z=nnB$s5h>~2XecFM})NgI8DJvVPOs*xJygKr& zVQE?IBN>HNRBaji()vx&Tsp*RIlollvZFTJ1OGQrCY!N&Uw;~t707UKbOd{T-1IG1 zTb*e{cecWb2M?WG7xX=iby=6QP}n^5C^Nk&^M7P2e~OyXC{ngt?DiyfE=pgOk8Np3 z-bP>A-G?QR<;tyg?>AAQtE5}%v_+sY9#q6tnwK`Qtw`EZEpKh;5dTbuI|5mn+i(8` zHH(6p3!`>HiT`6!b90)LBdo&v^vXLzi0|i}(iGU7ejn03irrj~s*Vm1NipFQr72(~ z$<;N|O2{;mSeZKhkx6Q3Zcb}ly0~1lLe7+nXj#Glu^&Jo(W1jxW9B~&G{`d)5C~Y5 znxi7$ZC|wgeaP`zHR$am{F4<{SON6j!%;?=!D2Tz*SEKYRv(L`;!6r$IMNuM?w>+1 z(2nqL)zp=xXJeAIQpUC(J_B=~a%iZ%ju-!Xg0_A(C^oc$hK>|v$CQT$F}u~)plV$Z zYX-H#2J6wHnvg#A)Og^$zNhu>BMqG@{O8ZQaN&LZCXwnoH{>RH^7klEUqul6NO0W} z((}HK?QvJQI)te0fNNKOY%krg>oJPHrW~*8^i7Yo{MP<1QmW*6?`PHk(DA=`VxgDv z@By$k~W&N}-F*`fE`4vRXI&SnBO*h%=(nY!S=9=i}EIDDPLV%qO zl{`TB^-*<2;LEMss@t5xb7}qakydwBs$xQ->S!!J*Y9eb#?peavY{M-FCMp2LJu>} zLBgAmjzModc_R@x*QK6i{crJ)pPow=L3(xLX?(zwDfq1H&7S^U1ig{B^1vLi-@fvu zv6znq&7{-o^BpntA{afUN)@t?-buz21L(@CdyH6+S^OTZ3*D@Z0VRB7+{dCAQN!2#dF>I6^aRdDJDOSN zmHB|0y%z?O)nb||u7Ol?C*tqVkBR?Ym-w#!m5;Wc22622%HIl*qTWiNib$YBK~*69 zu6`(wZ*IoY{ccaJoA>*+`oCXYjyH)gwiR+{3pTpC)w&Yz5u!-QBySlLAcwz=QzS1< z=G;7+CgCQ*$%)9V=;clMQt=!B(uc>@Vt;kP@41HlRP=*GQ80NUPPG&l^iS+ysU8hN z#sAnNk_o;Rk2?$3+1rUpE7a&$Oyv$8K_YV2>P&2;)$Udv2lRjY`geQz^T}$x*8s&* z7kbt*FRbS>cM55YKuONs@2;^`6)~O0f~@T%XI!H9`t#ORwd7+i#y+kzbd$n$jLUt- z+cU6&dGWnZda|;zeSIcK3#vLm{!dxJtdfgTo*e69u}L5Eb3j2DTP^EB-U87&pf99q6J3s3=Un5e-SC88Tm&8YfL> zt&`Er6VZyo*o!+NY?-rSon|sms@M7-+{bt<(_*$^)mWQC?$bBq{Y(+6?Q>)DI6^H0 zUO#?ce@v+K2F(Sgay~ViLpl~RUbP|F)#|4GEe zu^=DQ|1HSb#2H@xWJMpT9pl9h%y|)oAv7aq7M3^VuJS7%W+WGqhmjW>9dVdi#BFsU z1}J}Erl*1o{3YE+obZ#fVlSEl07S+uY#3dp(CR1dI&?X0mGl?FA*vOz&-9F@jzvm- z2KGBQk1(2A+~CZZB7C@TiNv*xj}$Q;kZ=?;P~5QY6jrvjA{rWOjci`mEpj8{ zBQh0+h>_y_Bj2(<%dZ@f9#F`LreQ(ONG27li?@=1wFu6i6v^<&(d|L4Pa)}TP(9Fc z9QaM5$k28BU#&gwaaAMG-$u_R;l2ZBv>s^PFN!d3a^B?CHGo{XO<)7&LLi$&k$NLS z^T1`ii5fiIY!9@pJ*IK%$dDf<-B$2FevDI6eP#|kIXQW+mMvN^9k{E-O`yp4{>GqYGc$7t>)EdZMACpAD;_HW&kF(ea_N}R6%8eB^;_@m z*1w#GzlpT(JYKs2t@9uejeV-y;;j+jB<>4qAo8OahMlA{d^88>doac0t!_%;6LnH2Y(h|l&$b2wq<9A=y# z;dC=!{A!-xzv42HoOxUd^Eim+cW`0@dmcgWEZE{GC@LPxlRnY^CWrNIS{d-Ivqb3X znBn##(N#35r_c#P6kj7DLR9_YM2s^f7_DXC`<^kAB3pNQWdC99Nd5xRk4>w1i) z5JM)Vo&s&gga^3Ao>b0mf#z=!{rIHLZ73Z{9T`k|{ZXxL?ZIL87q#{t}a?dh(tEvyQ&-VCs7?dzk3yv!4pA!nElVz^JNVSosSnUiH zpeQnTe*XbBBW*oIo(p*6@dEx7gmZ4VP6<30Moj^3g;W@Y)^z|&3$s}57eJ(+AHXCb zl?JRK$7#9_IUr~gEpDV7G;eg8ySME zte&7yR_XFW`P!3|E@bqtN$&o#B|vnJR zt1q`hcy`;f`^j2kxEBXVX91ezq&Db6VNFeFLO@ElaSzXqHnqo2$0SxjJn}J-zw@Ktsy^rnJP|-?f(Ynako)w4P4w2 zlG|qH2T9pl!W7tjhb~)x>0yzxjilI{jS|w+qp{;nj-i_!0?l{azbrOdqTmay|HM!d z9O#wk-V1oSbN&|a;_iR9`rU4$EzgQNBMYOOJ|0ntbLJLzh0Ag0>#y_rb{p#43zi7% zU^7-TZCd1X`CnZEz8#0AM;~u75L?hA-3yPL=go4w_}7a*%yJ<0u^{tMrKOUoP{{P2 z-fmv`WV(%VGeFp3FkswjE!4RVX=Z)IhYek3kw+S110#K%a*iUVglLikh0GC8&6+    P;%9Q3+TFl%dha5w@fjozm;`o z>0!hIz>@~G%q7D!$r+__6bP+)@JV(irh)lePElr%zJO!RLC&0;${EEnY)fL^xWmX%~D_!wsvhOc8~PuE&aJ4fcF{8*}bL5mV3@RPulQ z_vj5}j`L<>ZEJp5j5k@&L95Ra(5q|w2gofU!lc&St9ybs#}SX;iXaF_AF4_MCc59k z$=vByJNxoX*7NrawSHMO3%z2!sUIoxCnCF8pd`il;hDxxk~f+(l1Mj}Jqa2XI<_ zOOWsId2S!DYs8$^f6V$)wG4P3fJT|u^sndUc~Gw3E@!y+b>gfeG;72ZeDJgPw=ais zKA}OwSq61HVY4=mG}4*ml|InU=%#-LeMkF$xv!0X zC4Sop{LFOS-(jXPR+fY}Oh*@)5*g+)AznygqA$856KAomJ<&2Zuh6NvEOsMf;IcVJ=Rx z$ht`0)y3t37Wrij6%iUnZ)t2~1n;jNh_8U4HA4PDLs%{k7W5L{^1HULS>K_kbGnl` z0Sv4vkIj6PeywE;tbjZve%gewy*pdOmtF9G0HObYZu1nn=@GV;`}FA(MB3OV4h}1b zig3vo+?hE;5fPE)uH)ll6y2zW#l;Md0Bh?*%l(-vovk-v@XaWFZ4Qt0I01W{tqDD1 znkwQpG1U9>MEqP9#LY%3qEPEcIIYo~I;c7k-xpj4!y{2T1ZsEYp0Y}=6@Vw{$Uf5s zSs+yGl8T6m3!m9RmC5&g`ChSR*w>F|iLUj*EkmTk0)Hj~B0y1)uuXwsRYb*uN&yDh z<=2n0t*F!e+UV|~MK+ZIx;Citn$LD@M+LTK<5lkPKtA} zqt!XJ6Vf2ViLiqWjDaF?Q=uQv`_1Ll&AhD^8-gm4Y?YCcJA%m^x=uN1m>}fd%k+pt z_Rq66iJ+_A1v8RCG*A=`U}%>jtJd~Y3Vv!$6_0E!Mf=53SQ@tJ3_@J$B(jUY^=~;D zlcUED;i{&ElN3{Jx78Tq@dBT|8CjHZ<#1`libsCMhcpHw1SZJvXl?!=<4SeSv+Yx? zV_H1U;4~xDxyiB)vY*8jJOp-jTf+JgZDG)CZ2FKLY|ZxQv27|y2t8Y3msyyW+S)S7 z#Z;!cY$&hY5-EryZO^-V*zC5q-c@=p*f(4HATxqrmZ;!2?2jey4Bp}35HSzc ztn>bZD=}3i3Db6Q%=Cz~6SJ`z1uuRkyA{a=1^GTYmTKgM~xQi+)V0OVijO$7)HgC*e}{7Zi%Y~b}mRqQRkApAftnO`IE9nf=aOw zdwPNfIkU1C>YTPjJg4fNWHsYWTSpoC=opvaICwr>_PUey|h$P zABb9B0AGVlBlH5~bls2VjJm*V8*6E1c1>Ux-^eyFlxd6t%)0dSTs$AFT2}$EliKLqjpuQ1D1xn4t%1N5aEhK; zwt3AdaK)bLCV|^@)(4l6-|KJP9&v#(&Dn+5gM#nX)zz1WvEkuATC-5otE;|?UAnru zb7xZ^7KHD2@_V2Sj7_Fepi7{rAbw;EczH?$fKa8=l6krxxAvr46Dl~Wwqg|%m=c>i z0gnw+BEFM#@uDRz+br+yO^ChGq&9I=a(dC&y56q{?q7F_}7f`(}8 zZ<3Xq&`4MCOn)`tILYwBF^+W5I~Gv=F;R05j_JMN&T+tOfl(OgS7XUS;?wN{ ztwlJ9sAuu|J~T8mjtq~BFQ`$351op~N+v4A>UD<)%L|>x!gwG4C^_*tV62jsstkcg zSeZ_cMq_(d_)fG|nY4Y3eqgZw>;bvKzFldg%qzk$!di!Lcgb_5B$G%|IVbz@m&)`afu^m5wIL#F;yMsZ9(NIrDjv}lzgYPSEQ z=`4e??7}Vl5lZ(f-QC^Y4N6K$w{#;V-Q7q?3rHi~ozl|XEg)TIbIzPU&d4~!_`>t- zd#`(~YZ?EOwc*rRES3Agl=N;-m8~FZdDI4(D@1KZwqFPR3LZ~6K7bJC{I|5EK)?T! zfMXLxoam%3Xfd7jj#D~{C{%<;RNClmw5?LzTV2*;h}HK}Yn&!iLp=WGT(WRz{RS+J zXe@W{qgM2+JyrYAJx)kVl7wWrY2fy;OYl6Z`H>Q(YZ*ydpIe#xyz|9kDzq z2U<@O9-k95g-rAtF|rwAv+Y4OS|);ceqxG&YOitOdYhH5MYKP)4b5-IW=hJ-a;?vl zAE9WP?iOSt!bZ0Gw?@9VQAkTjgmrh5ji&L19=EEx5FInKR}>aTmzL6ZZ@}k~ZaFnN z@@9sS59S4tPDu13y9Bn|7Wgi~Ic~C<4MSdt+?O47ntcEp)#`~Fn^B9^5o|pV)DWLh z0ovcPbE*J%u3ittr#$~yY!bgm$3^&^ygc$3fVX>~ntl{80`}QzaBXu-NCw(&%70(| z+bpk7SG;7?M}dGm_2s|2r)Q`KW_o&jhc&R*O{+)Vs|~WsxK?{FG&_#;_WRGDjQPOp z5f^#YPNla3P*I_uc#n<-ra@=NpJ@a3bj78Hfh|6pHT_DS6JHIDSmR&UB!RPKALrJ5 zA5K0a_s9x(Hf<*;NVh)UA5Bjs$Dxoj#Y|&KI|Lze#AXI?071mVJKI+p27NZ*%XTQ@ zz`CcKy6u+C+8U`cH*x}d8!7U?*rx+-71^Okh-f{dV1ne*^V84Ab&Bo^MYmu4O=llj zFe1LBvt5e+Dfh%GUg-i?<9L34wr+%e6ebJHm`;-HW;ltmVuxGSYgnc0vOaZ9n!o0; z-+we_1_U5OCOgUGL7UyaQ=CD-jY`fxt8X`BIfL{Y!A`~`be0q)7h zTg)MJEqYB=8Uc#P<59hkB$VRjqL>vg>q!@ap$%~*{N6-4NhvW$e!#W>eeRl?*fo?G zv6A630_UDWgg?u7ZpMX1kYYuC$Nc)-#Tu`K)in`!456Fw8AKN4awQ*v-H=3PgzCcX zIy7!%?3DK`3gd<^3bsKCD~gWW<^Q!L0INzFU1TLx02>f&hF9XX^j}vmwT3W-JT}n= zYkb=9s*fvYLr@qE7qoUdEPJh}%ht_K!Z+=p!Vz8!KHEp!VZ^7~ZCG2l1`PX(zIYp& z0jSA!;Y?#V=B6yIf(Qcp#;*q!8l-eYNhm{wP38WxXBD}n&DqUGloZlRxz)MR_xE4) zm}&GYzd1B!g@o|)lZ)}^8(|LdHfKwoU6^A8K_-n4-=-LmPZa*Hky4yKRf%?axPlj- z6R$QTQpHXoua$He1G^IPEJsETDXm}u%sM!Y8uo~$-NQD{T;YQJE4yxZCPvDgy0nMXF5Kp^+ea3Ay6?3g+-!AOJM z6SG14`H@HKDlrMJTmmpi7UbrJTXM$qZ0w(ROkU08dAcvHBBr;$kf0cGgkhn{B?JL! z@%pFBc`XVGN)|X1zSP#&*SDPsYp3*qsJ60u%L>i5y9Geac7at(VRYi7mvNPs3GhQj z!<@7LZ{xsA+tV{cC#O+qqmK#TY@0rPVN8~xfsPfv-|t$o?|5qS4@(CiONUnwhG$A1ZJ-FI zOpwpxfm{IBH7vk52J&i3#^fnIAhceE+LG{}&*O@L=I3q8v}4xN_4MwxH;Z!jx@)#D;L9-Wb6uNafhFMz_(JWOUT(1i&saEjrxISS%ld9mHf*G zN*)P?;e)V#TBefk6qtF}qA})PMumkEVSUDu6poxqQb`bRVYE`auZ+3y z>(%1|6GR3GmdJ_LU&~2c~mNGwTqU#~nQwB06V7AVKtK3T8`n)(! zx{1ypJV02N6MV9ct+=3FI!sS;PedtcG%aKJ^y)1nOqh`RZK)Ly&15~F7hnXFBKuhv zmy52dxEXtBYaq7~JwA+j^GB(FF4DF+FCGv5x6ASDk*>v)p9a5Rq%;SAk5klshxAdY zs3(PHyL|YxG}y|=fyYjnSZ|1>Bo=?@^9z=JWI{21cx(xe%be4oabKKXWU=$l`+6(~ zxDS+YV4g*6Ff!hpZ36~fLj5;tb5-hC#S;DO2NiG5wHu? zRr+3)9i^}sJO{T^Q33UQngiF?UW_^=oxN%WK-Ib#cVM_>@6CKWm;4*jD zS<$`(JW$*56f#9jPhU=c&1HOf>9AR-;nvW&YNtof8Q)9e`mDKoI9v8WX8;%)tx#h& zaP$U`KiM2Nd!bNpw$5+K7*GMM%8rGB;i$Ni|Dot>s-BZv#{fwMWPI;Z4%i`-%B&yu^JDMh&E3ve&h*ix&Pgt$9_LMBXBX<9RyX@1 zEs7XEw*c!l{i^q+l5pUU<2s+An#b|GKvN_cj4m$^Eo_djsmg;MK%L1C7Ttz#PsQ%Y z^3#+4Bf}O#fkheMfPCp7#+R2~ObQOqmtI`;VHdGZ@ov$>3zZt#5|k})@E`0!FFsCu$xAwaJuj*P1@Pi0 zJK@iOYSm#tp*!Oc=F8l49a<-E;uxC~^}vM7g;BT=HP#2Cpr!Y+u; z!lM3hS5;dIC*7;=Xb)_I!~XYq zAL_X=l73G$r!==kS$08GR;CMRPwx|v_P#{4m-OqvxC6$WqG&-vhH;p1WMz~DHMbWay+ zv$>jfQ#c&)E!B9(Uq%6UTPU`!pO-~{cfK+2{aLEqVla3hM}1G@s+8RN>q5@d0;bs! zJSd{*uKWS~CNkN5FfTW9z7K;6nXbEnj7!m01*t>&E zk(bA7;C3!Y0q9kYlUSka`4pEEyT*+W1W^1oiEwTX%5r_3Ng;?td9w30W(w08T%Tjg zOrhZDO*e>0=y=H_ zb^r%d^g(-02r5y=)oU2kN+{R&Up@)S`@N0)($Z%TMY~oj26{jpl@efPyj1E z{?WDfsjMXP;MpBbS33uP8{>_SNC#v7HE$FF&uI=vux#D5FKXj0RV&qI;te|hb z_~pr`BGdh?7WNjkQhpPk_{lTsC>d2RR@U~eSG*!YENrg%;I&1bJF)5NziPqezr`~r zT0O@c@1<~t(_H=(3ceijuj)2{1a7^<=G6w14m?m z`4pi|cVc|tz!rH)|G7XGIJ`nieI9-+bR?G~QU^+qW5!|t6soD|`c<GKn6%b`a%)Kv0I`$!}O7d5QvdsOpBwU6|01TddRk%nwkfB zT0S3>gPeQiTqLC&aCm@lNk$PFJa--~awBovZ-t`IXq$$2Qx-pZAv*zV!y}p17K+O;lPh3{-{@7TKWgLpVoel zkDoPZ0V>ZLLJ5^Yqr=8CLq((UJfOH}Pr2vNMsx!UAm7#E=Srd`aM~{dW7L~(85!!} zJ7Ys2ystZ%W02c?r<}%`D~b*a+LPc2r(adB;TrG3zKz@St?5z-uoYq70^8w=ea)-q z;OQH;?cv8F=OL=p?a^;Ml~rfg{-Xx=EhqIDuechrLQW7>KL?qxRIauL+tpUSW&pnn z^oh24ClwFA*f9#c$z6-!Eyu9!z#9Zc4d?k+6LsCQ#H+aixF&Fz^%_5)E;qgNNhSqW zg!3@)>p%Dw>`T}b+{?wIUp2J2k4t8pC@>S9u z&@8K4TbJFzS2S;*p6i5RysnQCu9?bpTRqO7U%#u9o7*+njx0dxX;&Nfd4hNCNd^i5 zwTXSFU)XBkpmS835mta2e8N`0S$5gK%&>xjX{-DsrD5TP?xPlgRhXn zSkl0F)HXoub)4xEkq)vd_WKt*Bf((*+*WC|=*V#d6p(Pot^TVe;EUuqh| zEVsQ~AIOgy_cfu3u-x4-Sbr7xE2!)>jeL&|izs-AdP$YhZCVm3KEeITKKd`F`)21X zi1g&eg_@5vMylL-yN}U7gQ6a~EmE@G z@yqcHRO?6H$T;%tjEVhN?c77}c3f6GLt{Ko??~a#(jz8ADJw{pxN)`N!jBFKj?W*6 zOT;PwyH6n1IMr}CHt7Ku6D>21HeR}Ah%$H@6;i5QQ2NNoBUDR&j?}4a8D;w(tMuo5 zp`W(MdB0E~2Omz^i}k&9UY|!i)xXg;kV^LJS0=YYZX=UO@!`>Hctkj{DlbJ}+iywT z;_(=Y{_12I^GEu<6Sgywm`qlN+R&a&!JG{|n6XyJYjdJ@^`eY*k(-a07d7k)s!c>c ziMGv<;HAkX8%4YS8b-1=z3G`O2g~nh%C}Z$VPx{uCNenHEk*t@mJEGVJ@8!I-`yzp zSvM64brosnyO8`mvH?}wXo(x{5RKJX3&8u)8te>16@iEyPMtScBU{gdR7^`jrwse4 zCyvQSjg$&4BV%t3BY^w^Is~Xzf`pbC$f?*m$hu>6rqMMo#&HAkgZ2^f5_vF>_p z)Aq`gAWpS6p7Y{sX10SPub?n}pPmFVY|Gx4V~KX{ce@=Ap6y@?QkE|!mkR}R@lTLr zEhjOm1<%U|e%0LoBxc&illmoUk`t|prriwR!^l_f=rxtuf9=oUeWtFhtv&M*;J`Ff zs=>=KGGVBIY@{ZQ83FD)h^}w=!x8^bYOvoKPCj|HiMZ>#uegSeI)JNXSHPS9{r=&l zrT8#?hCpicyJ=bbAC zH6q|6VF3T@x|-w_^MT4q?G?82Ro`*&Rwa_(mjyHk{;4?>rC*z`e#bVW3z z)H;snKbn}=n#*t?(7~jRj|}FT;aUR>zJnKxWr&gmue^~R_L8u7jt~LQrnuPoF6kc5 z#X#zFuT`RqGk|B#E5SKXZf<+|;96sjePAm`H~*Plwx?uvM?zwxD#e_TEZHNWNN3&` z;^W~o694Eai&w}SL0z4zxn)oAEuC#ohq?I>dw4*R%#NULV2O>2XaR<}0|qKki&v6- z*+2K-wOT+$Ma<2O8@!5-SK9=3p5mjhqTLb{spHHrI_3g<=Vqw3A}TlLhAiRDK|}OwGW>V79Pzs z!Ql_*(6SO{44B@1#(;cbrp-%;Xw9xHNW8c14?}58&s>Z%jUFb$2_gGs+0;-PA!`Ar ztliJ8R2LL7p6pM2GdXEK{ei$}u3kFgVj!2=+vd3--1Vq*p`Air!Rsy2Bs6~_RbBmF zo=1ONyggN53~UCHp*BYt>%+ zJU1UJi4&0tud2)K?8@sbX0X}9^i0J=;w8zYWhfODqcLLK(8HxBqA4dWLA4@u&%~FQ z;EE#;J!VN2uvB*$J0|B8))@I=Z7oKMAHC^x5C5iz)~U32|KHGb;|amq?u?o;6-IP! zf1aYimU;wItwRfAO>O3naPELEd{n}pdF}1tcQ^)pXwMIJ<~crO=Rx7NBS5`2ng=^r zDGYQetVqfY2Z3fg@)7nL#(Y{3XAKo4{W_ki>K2(ND;<(UCLvEpODhVI0xL;$SVGhR zvZCKUZBF+YP&fU1Qp=fxs&+Y-?*H!v_>ovnXbteZ+6E7cbINiJ_6Jjix*sd_(%t&p zL8>AiC_0)&OYUP_b5TtI`uT8|kf{ikezO+i*=Qe=7L6RS*lyrV2P9G$} zk(&b7Ie#U12ceYPMbB;p@d}Y7?1`L^cOru3$=Uc&gV!JB$xd zNs`ZzgEq+|QHWxp^~ppXzvJ@vz}tRqvNp$V&=>X>I%A<>;rL3^kjc<-j^umSBEQ)l z{-Zv%^n`@NBq-8Z`e6ur@x#p9OlgYzNSlfbp-d6MN0Z<9x{@-^6h&!ca~&_Ve%=ij zT&y9RY-)dTP{=;-O9pLnd>A&bb@Cw)dEUvn8{@F&*a~>*yxy5MAD$UNz7EdAB^F89 zq>j@SRaRz>mrVmwzj!V;bq;s9^KT)L=IZ}Wi@DTbZ!uT#={2#0T%RD@ucD{?=(&)l zj7LbW+z=&E?`Rmehe>zM|M#<_zQMh2_Pt-n`gq6PyRzq7FM1~q+>iR=6?0HJgi@U7 ztRH4!^I*fE10;$l@F{TR@X#Xj<~h>OvV#~R0>DMWVURZq6jxi93J07 zQScpyv9UBGc^7QC(uvkvN=*7mOJqOk{}k#bkduYDye8S2&WkEPsIWo$wnS^yGXyeZ zbr2HVGMjhRb=0cbf(^Y0va*OMvDhGTqA6yaN)mI5iqpq(=IqEsN(!nVq>--~KA@q; zjFxMNOmRSgcf(=4pYDCROLDm+^D@ZdcaB>qwPl5Nc)T(#sU{Irx)N>rX1MX7|LpHf z!d#Q}Gt>54Y2yrL(;*4L6iIa0gdx}nwcZ`K@7f59JzWqZ^1-lxC`$Sg-BdW_uapR2 z-EWoQAxMmfbcrX#zr$w&+^%ei^edQC^ybYd-yag#19^oTSM1KiX|mH+8+zZWW|O|g zP8x_#&qY8^>snn?^IA6=6ISf@RddnQ)chk?KEK@JZf^{z4rkz)zfH8{ymzM>2frCF z3V%FB?zR(A8kU_#THIB z_z{h^?**W{wS7jI8h%Ddk`GYM*;`vjc!Ru}_XDuES@Y?&0M7Bq=fJLYIf8-vf79=I zUdN|0E+qwp(M*s7mjIxStn`6I)Q@Uv`OoWcB3eA?cbDTK$Jfb51b=eARw&yu@LRA3 zTcPKW*mzB2EWv9o1{Yxopl-3H!^r^e;D#a=xZEcqBR5eG(2aRA!t zQh($0u*c;>aPQLR@4R0(8Mc=rD~gNyx|6j-wnsZTH3XqV0)E6rEofP8@0d;3+oLt; z`EenPedqd#F-U8C-BkOdw8HG>n%+rhq0TKNTn8Tsj&q(31ieJI3M;M~G2{@~Jx42%xdQAzgz2Zerid@Qda?>Qiwu*@N5e`Z5Nc-mQm z!p{Df`Q=bDBq=#=2Q4l&F&1BeR2H#@_In9`!lamEZmOsA`{HX+DEpsUfkk4P%4Bcl zG6GyZvWVGRp@2A9Z@cN{Rc(`AU(Z`l*yq&v;Z5Y96#N>bOs!^V)|t)$lDUnfCA#4o zkeRO@B}7&-9*D_;Kz3QTmYshr-y;Y&pcVH-m%Mf@G139%Ay_S)bfJRbG-BzX=x1Y) znlfLo7UOV=lCEXtStnW3UtXA!fguFF8l=>oXmUBAQ6u+=R_!D~my8HDh1Q|lX6WLB z^$R5k*?gc4GQ;x_@?Bh_fQ3f1Yam(r!-fJS2WkA5SH?HN8hkTXvAH#j)^v+B$L@9A zDDdFW6@RLy_ff5~6=KM>Wr5p+@R`GP8)lqMr+-5ap#Qs^ax!j6sPOIG;#bFj& zE;nsC44##jp2-sZFET}Fo44nkFlbT0f^*exTrJ_v3hoqk%?CxUGV~bLjFCr`9llRM zIc;BeYeBmkI|rCc1CZ>(vTHr>&qktEn*P~7{s!h-I5E@ac_RREKa?Odj__}W=N&b_ z=B({Iz&_M{4aB-AUin-#ubA$l%aVO*T1bT7-!3?m*R{#gZqH-4mGK1G?`@<i{w5P)N(-YDfB3RM7n zAfT5E)t!KxsfY(Bo!YBn0rD<$1`l`Re!};_^oY;(p@3Ty;D7%CP}s^9U~jb^TDInZ zYU4FN&x`Gj)z=RPU?{Zp^!16+r&+fLyo8}a?TFB)wSz~yFIzyWvZ}N70{5|}BfJB3 zy;qacE106_lhY6t$$qn)OukCF{m^uL{|oqVNam}IBnECeUY=9{0sA)#Ev@Y53xPPg zze8`kuv5t9ElAvD>TlONl?Fue#E>^>|MouWV7FpyJM4(%dGP=JXTgu!r4KjCs~Cyd zekY9`tMBCDS5n!2xHnju;U4Sg639FB_r1v=>xb=41fQ6S2X*Ay_(fy)C%eP9Y0x|? zf6bJ?2_{b~f0JJba`v>&j|d1E*y*P7w6v}NK$-4g!N6RWeDwR~vi~yDs&rAgNFZ?G z^sm@$b3%MM8c?{F*7>YBJ z;Iq9~eB^5qZ23n=&g2U5c$X<1)M~>5CgVvLCDX-Q42(s) zqCy*%(CS1rdsM8gufc_TKvF;ecw4pRfxFcxZF_guIDe`XlCMcSidZNi z9E&C{>z!zH5NQ4w{9V#{G$ab?D$!~z)ZDDrygpfqvFZv@nmt~cQ5*m~bD?2-#BBMntZG156J&pD+W!xH;AYNJe`5tUnCbDz~< zY5$)6^Yun)0h~)Kt9N%eekLZDS{bOO!uTmEfyCfmcdpt6B_y< zZ{>(kC?QWvA`A;0^;UKg3j1jY{`D!Oc+ZNNH88Owk#jrd`xCj_JKN;pcAQEy>FR9A z6ota_KECr!&NNumQ6?Zu1w`l~)rb!cUNsX5{2AGj5GG1((F92w%-ctObuM|`s$ioX z3G^z25Pko+$WCBD|uA9~HY_$!D%E&#ul1$UzmgTyjm#8^7zD^$;lYJp=gHvj#*){F6 zfY3br_jf_w?L`S49<~5j6nD4x_5{FFN)(Y7HfgDD4~kGK3_9AkWaZ=hq+}B)N3#TY z%JTBMbwNOVhI0&*-^tr8H?p+?C2~u@i-6rU%o#Ya7C=OmId*^|RGjPtR9Tz@AgRF2 z-1NQyR74&;P!xvoMSNRD7#I{VV8uYqq%^?pH~}Mxtq)3I>^or1zk2_Tn+e$R6;vQn ziqwhbUS2KjAYHruJ4@ib&g@7BohJ0S_v-saRqx-XlbF*f--!uql;VOm_^!$xJc+Yd z89koF*1cfR{CTw5UpDji_xRWEdg|r}?Dt}MjYS$-&pB)!PJ8NZ89K7oL@I@e+RvSY zQ=B{kZI;^OsZxdA)t|2V1LpkRczbm|L6cnGK9<0oiqut#{5OZ(xK{5smY@LVTk-y3 z0alS;F>>kl^H_uB7~ECkwheU22pJvGvK^k4hkaUJ%AoJaCDnf=p# zR{g(&ny};x5xGNBct)=$CG%`A;nYvhRKkl@@jPoD$2h$aoOFI6Twv`zZGrR4)_V^7{sTS7 z1)P$V>TmA)zL|kbe;j@%<-#r<(uued^Yy&9SXdO2tg}(n?%jbdo{P2}m`KD&g?h9@ zFo++;D@NJd5fPDj>UxUGa%Hyo-I@kRq8%Z?5lZrWv(nmfY{p%2&j6(&lfYkv5;*!b z$C5Ijv|p|C-3U24{JKjEF0gWdp~+UjeLei{+>?u)g9+M~B#+$RZ0iH0&JkqL58hg!+?> zb$=yTcJ@Y_XGXWOx+$hjh9gduxCAgEqT)RM zajBxKJO~JssI3U$i9FFk)}4mPP%v+o8b_Rx%f6gVS$kz=eYwB68L&)Ejx-g03>fpS z_*}tP>-^ifeKCvTr0GiVW^A#Tr`Dbkt&y^pyXYsTG;tQkqRP8)8-9uX<9xqH5~Gx= zY5EiAX%}vH_68HE8kTB{B~9#{siB16GCV@MgyB(Y=5+NPhzhr~yE{)d&UXfWM*%VZ z`2Nr5tgex}Db&&f(hl^f!QxO<2`Z3iRFc`O%b;Y+2MVGiM{KsG#4#o>>& z66Bi#N_9rFo5CI?iRCc2*@@Igpd{I6BLYe8_EW?QRr&a>skc0#3KIf#-zag!QQqO6 zrIs)-mX_mL>+@1jP{4|b(kGK)$L7<1FFl+T3FPgUFz5d@HxR?}#Er!4s{aB(4E`%g zLDca%$cXk8^2ug+%%jrL(z5h)4OZ3>!W{OJ-fK8$Ks2520e=$Q`MyHC`Vv>P)%T*M z)Yh;FLUozv$;q;=k2DfoFy#IE&+VR%X820N;6(YeX{SM1(Wg!p8q=o@AqIrP1saIz zf2Id`;wleRHySq^PV2D0df(9qexxN9*bsL0ExTL6G=u#GOJ(S!c<`1MRc>kyW3O4)9bk&u;160 zZ>>AGOeAqq6^2jlnk_%v(yH7OW+2B7BB|)8Muq=ZXhv2eoOt%UE|*eozgyH$ZvHU- z5~yb0s2FuZw!|H{`-b86_xqe)c_z}t&l0$pxo@+Pv9`=?l&F%w8a}dGjFnuB=R67F zvupG7FQz*l7J47rcf8NLQg4>=UcG47wH&v8d`9u>z8m3hIx5RCDY!vbi7RINMw+Y~ zh`udzxqV5cu0#_*F=X~l+fx%-Lt~-kfmER3EbmuS{BFNAqG}MM1U*qtl}k4~;aWKY zeTbqskID*t5jto3TYXB8`}Q0T&7a>F*;2ARQSIBe#kp;k#S4damTNU9c-VV4PVMSX z=YJ2*)7pOG&~Dx5R4sv=l#ewkzrz6Slbm^mNfQitKi(j7Nvox zXr4DLhQGAOI#V0GTco*qb$T>ZMnt&SkUGX9_^joSN6k9e4sS;XvR>` zS&j3w8|tyV<20PGvf#1d_l{8K)V5%xN*xs6^sZc$3004Tx6S?K?!Jk5Cy}h<7?6IM z`RdOCSk(xOBmH!69?D^bH2XrFowv8V&gQOcf}9a{xM8%L8=-UT-0aeY`w0rWRpq?m zvJfPx`^zW5`<$EDB|Z6c7CJSLJs>RCC9zk?ss`_1iCrGcEc&Ci2P-CBvy^^fA{BAj(uZRZD!k#X;w!Ck%apJY^N*~}IVZgst zt85PWc4{U1_czv08=3}v-Pj)Atjm7aUP$F%QvTmtIH4K=(7@YGh0EWawf01uT)JLL zAUv3X0^`Em6p^sMeaD0~uLQOf5oL`p=UxlH{DdwAKKG! zn)%C%KIs^HJA@FWR##3NpRY&S-8AEbIv`I*g1^tzzA1rdiF=D5L*#ye;^#_z&XWn1 z4kjW=>$TplMH%eY(g)Wt2s~w65^PBFcfBmbyG`alJ})DTHj_itl)v>{h1Z&1JU5*` zs#fEln~W9crfk)GwfDBC$Z6UcSiYTn8A-?Kz~U21T&+eB>_nn4)u6HELD!^u`$c9b z_T2=hSP5r;N#t&|@xlS&!I9Brj4g6>^p+Gfk1A~wMhrS_NH~t9hd)|G6iuiHx#+YR z@~7??!VKH=y3Nb({F`_Z!9gjU%%KGfmi{`4Wh@o5to$I0 zYlNmuj*n-Tx$norAKgmP)A#s7ln>`cixQ*Cq=a7Uiaq*mqy$NsifH5m6YoC~V#=a{ zLCRWng;!6Y6bMQnf?Tt-RW6lqVvG%r?Ls;LbV;KA*iQ?IuK1QzhWf4;Ti~RbtLKx3 z2Et=lXDn@Msb#6uug&}t>n-mD2$|&9pVI0p^!n?Vi16Z|9xTo*(Ri|~F!lhSU6>r;IoOT110h62C8g1fa=*02 zhIiPr_j0Y?CPz5CNS37Fa;38tS}l$=f2AHsEqa($ZG6l5%91Y)^ z9c@)w5hd`d$S4J{-iK~MZWTx!mk~EpkFQHEb%zK(CV6rdo%ZBejsLR6qkTt&JllO^ zoxgaqcH``JCe+DS#@rK*>7j$SClJ8G!d{32@hbuiwIS^Sv7?Dhcwca-h5@w?N#&xsWw+MG8mg@6c(1)#=F+OU6QLpi< zLSBz#udyPgD;ns5k1DvQzS^4pNm8`V-&rypK4`rEmd^ufmIs&u_It|1|) z=kr@Ps*GsyEK$`a51L=#Wa1!M;l}YmrsaDtc+a}v5pdomc43l_jD|KnH8YG?%wp14 z0}eR{HVTQYDAb)HN&>Aq2R6_y*~!XyaYv5-){#Skc~)GZB1>H`(6-lVlq+7&>~oF| z8Aa|ozi??Ouo0_3RG3pIIkUi`#^HKlugZG%O^{I#Iw@>pg$#MNxEd3;-SY7BQ>Y3A zM*B}JK7+zQ1a6R8tn5WNJVJgLYs7>)j1pHEc^YzdoT=kK6#?@L9V~J|bL0}8@}~+O zI$#R{v>jvd)soLHx{DFva zYhoQ@W^vQOYU%@u&vB@uUGq);eqp&xU;IJ;kzd!tseDdVYo%{0Rz${>(z45$Mbq7` z$=QgA(+!-M_a>}`!^HN-n}m|f<_-7H-Uyx*j!y> z_rkp`l?di8wAPZ81HcJ z^5vedhGU7BmwoU-FAUsKHCwI#A8hW zmuP>t*!`L3R1%F&K#o6~6z4s=@cIY*iuE9>sK)4uBS4J#3Ra1#%&802wgPQ3G3X5@ z;1d3=+arjcp}>R=S$p78P_I}VB9&GeLd{U1Y87(1Rd@JS`906)cK5FlN7c8>3fgs# zimFWz-J4^>_wQN46%pmQ|566hesBo*8e#9;Xz->|d{};hiz9mBJ9#&K3Sub)T?@N} zFLFo$Uy9_>I74yT#&}3Gk2JjWicj!Xsku3x zcd| zBV2c2k=c`M>1ObAOiQKO-p9?OIl*qFo7Vp_Jp+Vr{2NohogTb(BP*a!*e5j<4*RJ1 z0j37`FbB%db9s2J**fjpX%our{&^~?u*}+p$U4Q1a8RdI7!O$t$2F%bZUfN?V(BIS zp1VR){CDd98E~evUraVg(2!!+9;~^?0f%nR$l5cUV24FeE?co_6yAR`&d5(UBx1HPSNSnCP*Nz{3v-!OqC?wk}3lFzxTKBYWb}C z((VIkv$U6qm43wKi#?<1+U=eXKAbKt2{u+#vlF9RN7-Frq*?L~&u>Nsxy|k###eh= zR-c5K_1lx4j^?WO7K+n&ZwWs!DP?-zp){JqvDo;<_s7)I=ArXTEnC7)YYuJ2$(pgE zB*Q$Q{XK|n`?kj;+;bvwYybST_8k6e-0nNuw{;W0=Qr(leSQTNFLuKfGM||vL8qBp zru;gFY=CjKEF(7HY~~eDjb`&j8W)c4Pq4z>5EYpGQAA$(p2k8>lR#S&Wjp_i8F@_t zmP`l^b#h`RX!{FqA*P&w^m5JoznSUd#pYzH5oL?JCJRg{D4!lrP5~)gIoX6L>)!Aq zB1#3MAG?>3i1jbnj=A5#vmRl^ z6-s1@{{H@j4nLA5cU!V71?SS$BAL5l_eF71KX zxg?{xKSYHw>72;FBZ0$rBXW*=+3s;K45*)o6Evif{x)cR~3Yg!4vpm+RX&AeV$nvyWioQGq z9-scdyZ3Z z{prHE>dx1<2xK`&3*861276hLVe6^XXi*a7sV1oKiUp-50;92_E@$nZa7M=YBCnS2 zfkR7%4(C$OZ)G;q{Z4?d)q=yTp>?pL$7j^arkhiVkz#0l@UJ?LWVKchYaU>u8drxE z9v&|=q{k%l44p$h?8UYKx2kOu=>ammZ(D%OZ22POs7i2)iMpA7P$zQ ze+9ey9HUv;GXCxECz91cjKfF>uqv>!GmxdyFW^-btHuuxfXBE+m!(aJi43o#wmM6b zQ!^2$mc%Y*40}XGpb$06?Dk;U>Ult*_jI#cmSDv0L4oKHENL}55QDnRpKHrwA-1vA z&U?ztO}9>r9R6W0$U?zI1G0tR(5LMBX(FQDQU49kO+1lE& z43Vqm74vPC6-+l?ZEcF$lc7tEw9E*$wbTl6o$>xi_75hHmONP=;OuLDgtLLxLU6qX z3+qrtTS`j+t7ru}kb2oH9oYb<5`b!_33+k*{gdHQ`b1E1WP)3HhT}etMhFZu|&EOkha>l>#J1KUofmV^M)b{LEe>I-_ z^8dX=yDFoS|Fe%*zd{o|6hzozCb89ivOpHRj-|=f%;K;7T|W17kK*Q;LHzM-P1H49 z_7FCPW!QVCTw>W}9Oo-b=5noq-&jKhzHkZG(PQlSTWqr!c@~)#lXaYc(SJ+4R`<^T z{eU|9^BDKM`YE$%6O;P{mm*#_0ILL2W|m-u)Ig7}O8ALOmVi5Nc|3H@k1w^ zFWbuzDcFf{L=)j1)&lI%e?2i|ABRm7@pm3+<&!LCwJ&cs{d_~z^X2w3wU-;rv80{Y zG=?9KCwpAR1hUL|V??+yuKIH_qoT4bz9-O&^4+$K*laiWdR zc#7rwu`}au+RSb1(wJ=Dv>3Y{-$de(knEMX9yzqeZR83DZ+>Cc^WpP_Ts$HX&?zR# z7Ecc%j;6PL1xSZKA|3I6iZnUpWHb~(`KBstsg43MrjaD2xT%yxiuxuS3>j>-R=}S> znmRfHqgC-Pw*}h6%4dordtM72g!WG_6-T94vtb86%R4@B&4`u&B#k@KE zi~)%qlN2G2GORmp!u* zRI7gH-kFn#FBjou=?i(2Y%eYqUzSK5m$JsIJa4GIpIH0kN%lTfrDbFMzw2e}>=ead+f32eQU$GTkS+sedse|JMOBzSDe4(W< z_A{ib)x|U*=B~f6%o5?}%&IWaJ*b#@U7_HN$pmh03~{5i4yff(w`s&7baLv)xeO<@ z>rtB5XWn5k^@JpkgEV*NpN>df@%zvh-{%ZW?6a(YrKJL zm~7eN8{WzvTtEh_VH^IQUSRH?#9&V+OqLH;r|$tIR2g*1B$%85ZrcJ*mChPQ7Y!5L zGbG&707idm22Qi7fDc0N^!ZzfKqJ@P!*x_ zIBuxOW87=C=b)Gcs?$*rSq%!}EmELb!phGdVU@wjGxr$R&6;`mCH-G;IzF4K^^oi@ zRNBaumK#hdjGCXycvs3KRAAvr8}VUw(SYxla$4Brq>5>iTg4Ct^+-)oP!cJ8(W4pl zoT@;qcT}31ZhnvvuG&$y9rmMqo|4aK$^YE}JWsao=Y)BuoHnvZSA8*u<;24((YPvB zmpLEj+Y>)jDrbG%-9>`&ed#)4ZS#uP^1-CPCf(+_yei{qyXIOZJRi7eL*dawVtlw# zW+CoWXbqhcw9weQ>LgH4+DOxGO+{okf{!QpPLG*Eo<9i9iMLF?_Oy%Bb>8%(ySDkr zur{)szE@jZjFb3Qk3>-}_mHmuIat0uH3`w(_pC#Uz3d%jYBJ6X@r{t**JvNqFGqSa zgMISc7n?`~`&MG)s|OsTM>NLioGxRqtc2 zKgK@_uI10(QLnwo$A)m`v?4Lsi~-SYdCK^aUT$YtT?3nMhndS>KYD(hf?_^IN`;0q z=Nx6pkml6K-8vTUMG9T-5u(fQ7*V}~$xhqTCr&8K*hN$zBn%)iLcm$Q|F={yJ0q^D zWwIxV{M9YpFnHIN-UhYsum~P!@*MeP*XM5lh0&7U$_Fwd&1rND?R4bg z6^s_v5uv-^p?}xf!yBf$lccW*)rVEL+E|7C*Bd8oq+86x5@dhq|B&HHy5%Opy1lj}W5$qdxE@r;&SjWT-@0WP=qCpEGsSfx2IVJuD2 zO61ZNtU@?S{W430>DH6Tz6Oc%+|i#uW>&IDQ0OIK^V8sSW%Z>!@f#F!p&J4O(r9V# z4=2+CdAj_DK-911IT&A$hx!W(E!BFCVBdzA)5;gY9koJf_o}42?p`px2ZCh|7-Ov#-9$#h}b0myfMHBj@M?3v6P(QRZ<<2>BPOv4h395VX2zs z<0HGG`5e}^Uag$>cP#k`UknmhCWJzRiYmn5gLOJs@=yY<;{zEyE_LB}n!h1cxD87pS9Zts`xx|Iy8aCz%nO|$)`2P0nKesih(iiUTq zl!H+AHCml-NwU?u?^15Kz7V7hB0a2#zEXWXD)(QM;Q78evPO64HYx2)voIUp;6s!G zj)KkXsRsFFQmdVJA{!&p!1h+~z=BXnj5*IGqZMEX7`8S9yZh!6YjIwKV)4FO&nw?!s z_`94I6ucc&0q^^HY24gWuS^Sq(_(%U5mRIj>~p}(dt=(rWU-Ijh=W&r^$`vv_p*YN z610dhVMPW~reP<(_v%q62#ont?eS!Cy7VI+A-d!A3rT}<%i#B9>tPaY{lcQHp|@G? zZ3huvGhCc<^C!hjIHejm+7;jAh9&3;6*X=sLcT>E@>$IBXek@khE;|gl_{7Tp#5tj zCmY06gJ|h_d?A8bP8icSsaYm`5YJFkid?7Zj{(_Wxs156L$C!sCB(OE*o3h z?RiZiwc*VBW!1ACfF6=IW~pRkZ6(W4Ryw!3I#wtdd0*B2$lTs;wbL%rUIT(>jEMvP zIy&OR!^6`wVo0r&O`QOzQZS^F?=s;@1FHkuKYR&yF;72n=cKbnEJ{aq=?fUbi8k-b zh3x4O@-qF~XnnM^t3Z}q(H%P%@tt3$o?bM%YXXCZkMe#UM_a4wFzcz$HR_7QU@J7x7}nj z1eUt1UY2^LwLTnp&2~Qrzy~5Vb`8>cfkp~;>~-FtyP>Q@FX+*|_E3=g!tSd>nAR)Z zlJ+5EEm;G?h2pv?gljy*JPW3@0gTh}ycB#5t27Kv{1#<&|&&Se+U4PsL2mLbgd?{294USzcpLNMq zTWw06LNtO)2+SQA6Ac99G(kIwqW73xw{3|ju_xCz*Y$T|yi~8(-E%x=++k()zDxAC zPJThlMijqC(Cw*wahcNr_ZN^I?>JPSEKr?}VCce?f@()SsqqRU-a%jyf?=h?UD2f_=D4}F>9e9thu#B?cwsu~y8&?> z{6mo<=hEo0b)I~)Jt9(~2iLry94JFv!!cK^xLb`bBd*w`Z&K)t6pKi#_nc*zMh2tS{p-KP=?(_@wl7h2 z&x{R+`4VN8VUofIOga(*R@TSI>xq_nx*47xT0`FqSvB8lk5~bKQfyfTAjNv{m^l3& z4X&3GNVV`Q;rR#{x())wN@Ykgpydb!f|?^Esr<0@GDa*o_uTjghayObiK#QkfLK8t z7l6u*8v!d_SxT#n%D!NizP)W)#F$Nr#i@+9+AI$?lfwB6MBLeV*nYA2Fh85=wk*Rk zX5!};^6Qs441TGV-1n0~j$+kzdbsZMIC(Jc-jxp`B4Sxs=Ex)96jY+YM2|`^I5bo) zlm7`aszhXBSF8~dVTdXJ<%aR^(%gND&~m+pTU+?jE1KBSpWE9N8_G^RnghgSC_R zufq%3fZi787uiWsUlA)a4riakH>;`xkMxHhF%oe{B&mf+@%ZxtZxOC75&-J6 z>4dE05l%wXBKtDPQoaKJj~eIqv>SK1&M(DPqo_fr1mR;j`24YPz=21J0YeO|6P2 zzQ-lF#AwCh0U8#T(8?2~H0I$LnL7P}QSLgQRaQ)j<6_f6rDq4S8ltUx$^fuS2+Zc4 zx&;aoYO+5O6FLy-7#&6Z9Tq1B1}^+7y4x15G-kf$$>k3``IKeywm}~J2~ZS#omR|U z;4_|7`>#p=Na9>Z+GQqS;R+?kiM2hNVT9{MI@;*Y;*+&;o|;`=7UL}2`3Pmqp2&Fb zOPqIp-iWEcsw&yCDn5#v1i~dvu60{oI+MN000GH^DnOsPgc4W3KP+ z^qI5tk}thpm400eAZ^P0x)SmmDmP>*I)UVI3AEm)#Qt!kkPm`LjyLOee)-U5I8l69 zF8Ydsgh}3W=g-nt($qvS*&7qyj>AdPYMn{$LA zC!Wx9`FF66{_ogYde`k)6t`vN)3|@}CL;gJnX2ve4U+lcT4=@h(r&Tx>WjFX-}Rv_ zv}>#RcP>v(fTtHZ?fP*Ip3HdmM6V^|xS zjFQ?3S)9GT2RmTYYJsW-_z$o7$tgF-yqw=)(b}!9QdhgjZQZTazmIh!aa|2~lm_jb~)Z4FgA`pV=-#_ ztrD956R+!QJ%R_%fQ?c*K;^jHHRmpEXtm6;Yl?x6>dHE|cFHBmmH+A|bUP-T<#s8dovGE*Dk2L*lJpy$eF8lftKYde>f3G(vyTDwYDD z5=H#?pQ(vSRD=g@wi&LHR_i}z<9+2!<3R)><6f7#{_OI6y3~Y)pN6@RKLEFfs3Mr8#28}S z{6k>D3>+6+WT&;sSdIV66-x) zVY74US@ir#jt4)V2ABy?7@<{q<8aJL!Q;vs6gzu=ec-aL4;=ak0C(syp}wt8-OlEp zHA9R}WNmHE%r<>Q_PiDU(H|)j4rxoWj~&OSlRSV$ zjtC^36G(|Q)Px(;VPz;A-uhUvhqm{f+$h%Savtxb5|fC}d;nJ^uO(_i@OEbYD>WDG zq|3knJ9kWiq)sm6VN-?@n> zJk5v$=F*LtcB;Ry|LTk3v{j zxV0wqq}`%{A4pgLwOdVqC|gKKNM%yM2NTE80YhHyA6656fc`!__%(o()Gm+b*dhi% zX=G$&^_uJm{>zfB`-;IStL$s3rETWz{WUroB))|c(PTlp>E%jZn-Nr+qiMvRI&~h) z_~*EH+(Xmo_-H|^`eXS|YkKoqQe@LYJl&Z!;FFy}C*ta<&ut-KO!5)McRvO(V2 zZd@PK&i+4~|If44k-+uW)H9*8_rc{t2(y(8m48|Ek_#y9I*%NcUlK)JQ-CtoJjCdg zJ3;7XllEgoZ9LhKL)-?iPDFY-V%wFfN&_x=85=^-dGd$UJHI_mp{IV@zxsE?P-7Z5 z@J>Vw#Qr`%lBsIgDgCoD&CFuh=6sN)E^*B0WvO+&)f_9Z8??1I81-JD*Ah$q@Dr7> z)K$ni2tRb(>1@kb^vTw$WssQURNVQWVC#U&%~yunW8%?8h86BSiI@_b5hJ!2 z;zrO|>TU6}9s?Gm1DwG57*wGTB2-mlx@U}#p>e}bNyOz!il^6-XF&H?*oPf(V{@I5 z*t0B=8>9n^a`$hgs=9r9LN0iH-mG(Y(12J*#v3#j{Sl~>3Q=I{SIJlLz2pXVJd%BI z!^j!c0#svh+ejf$2AWDz4($P4ROlZy;*-84>teIyv6V(oD>>eNWO6v|I^+<}2!iQ~ z{iO74hVhQKt@X8l)t2QJFE)z2>hFeKAqs(j!sS2r6hdvhrH$pC( zp}-ziQ4uZ61GA6)cbz-0IQIF7s(;AjBuUfog&TsPQ}MBYgjl7arG*Fi6j~7SSPYKL zH#@|bA_@u;+$ct9mV)d%sNK6J%%M zDGIi1hjj_luF2F@8G5+zR8GuDh9wEWs0#_AMrK!TIN-&9JknQ=wdS{zowLJfxq$={7FAGR>7kz8+6lf#&)$;*mF>){G=7m(-jE>&G^$?C zPO^f-X0|t?Ue72ph^>*d2x%V+4$cUwDZaX=FlxforG?e0P&MNB8M=Newo<`pz2#3^ zl((n9rPgNEETe%1QuEoSB;zmLwjed|ir~um8YH94ZDp;k0=cBZ3Wl5uFKq}FKXUM5 z&=9eig2t)eH8)7E=j(1!zZvl{JOEwt`kkkae+5FV3I~LzPRrX$^LnahTb%K#tWg%% z?}V3LsbK#wg7irwl|N8Nj3l z#P7Aw!>PY7!e>!etfzI4;(-lx~Y`>O`Y{0Q4O%8_@ zNw{kY7TWLd1K0~r3qcRf`Cw8>l*E8IhmzR^{wFXp$M7K<_lFku8||gbgR0uy^KGXu zzK_Y46mvhA($Tb-Suec(?EF7a;bj4kwvtueC2`rJ)L!#do&gn2dhUSWrY|9u@Q;jt z28J6~k!UujF6#3zMyk7QI1(sK>8Sl?91eZoqp`aZK_lZ?3j?|Q4Qk-~8LTriV96R6 zA5YVpbbEVSd30P?$1%ybi#{p(=I7RipMZxQMtRYSA!hvc-@NJ8CPe3=lt9pqUITO+VB-Y**W=Suc|s03Z8p9T=Q4c=wTX!dFm-UCn?swy3vpQtQ_S+X*$}*l zCXRBz)2q$U%El&&9X;8S1c2$gT7dKpc-hW~vf8JG{)|m4s)J}XE=+_ z4LC0o8{q6k*_2<;{*p!Ux|EMs;YrVE?ZmQ-HOZN2!>UeqT|3nLbV_5O^!XaR(MKE) z5SOHNf*8T)RRDBVI)v_mO-vFogQN0gkQox-i zC%+>xqj9o^!r+*am~QpA5@!yrF-x+I&B1p~qB@rmGsG|LB&2_(moS8;Xfwuk+O%T^ zKnn^a#!^u|bm?-*^%$t)1go6G`=n7JFeL2Ud0`~x_ru6!ybjV=;FX&%Ps-)b^O^OlJNttRepWgf^z`FVeahs3IkQ&BEiS^c~g=tfx)_3CX>&fq2V-Z zF|kl+Ybk0*4W7@t0DKw?gx;i|npSt)v?T_sBYUKbzV9+D@zTbKBV>q2E1*JjQ49In z9(_HYFWF+WkYTC*1@2~wp*#2(h>b%WhqZV_GYLt4pcQSsocRFfaEeT+AqbxUUs8rk z+e4BT^%ssv3Rn{oKR3T7)s%9$So?}pjiHy3+y1pgI91u;jzdHQAU4paDzo$P#nohK z+DgZ0kTsz8VQ=2a(~(_3NdYa85}jIF6#I3hfV71)J!K+JgXd_vkoFWq6g(`}Dm#Z( ze6(LaKtB`6+5rNkhvu~hhfp0hT9f}vghY>1j`a|b2KZzEh5i7*C;hh3jK5V^qrgnX zvMUpS(-}j8gWpBS4wgxw0uvp&xx$urrJ9Cs5O^$zZ&34~v~DhSHPtKuSP}J3DGsFQ ztmGTcmAJYPM`((^9TzL64))D$3g%ODjaa;FE+(Yu;3d2wEp{Bdo#FkjKzT*tX;p6% zr}SUSrndvO{-)~aJ?fTeb-H}_S%_c$#n7DpvmGcw2qhbWCI3<9DpVxCYje%w$H(V&{DM={A54ho!Pu8cNqat@QqHjzP}$_ElVI3v!QgjrgGtjgLGO6m zcIgc|YZ_CUmnyAQIyXfpCr@oUGb~v2nzN=nA66QyC)=j{%f5RC9zH$2lFuH~3$cl5 zbN8~B=vRXzgVSJ3Bq_ln;eqT&u54 z;?T1#kMBJ5O+y5hi=Oxh*OQ1(i-XxY2%4gaZBNFSDp`maq}(>sTj?rSzn;qIiJbkE z)%I7VCdX3;plXa*@y*5;zSVtq8?LxRj?>?MDW+W{RDB#vc_F~IJU$_6>I}IwKiFN; zNP9Q!>2GyW356gNn7O);t7*4SwFU9A8HgKin#v$zssC`CjrjJyTA9ro4j(6J*3++i zI9r;Zu&Mlh_-Uh8Fz_uj*JlIKjkm`7=Nt8A`|hUhhTV*pi|B-XpX$c49&mD8j>f&q% zhb{Ew=~9TZqbXx?6w67D$;tvf(k2ghAPI^PLRr~g?C-PN@sv~uD)wYi!X!D%&!e$A z6F0w{`SRb5Blw+lcMZnSRWqu*>)?|&luwnnp4P^YzEh*~{v=jEB0-AS7fO4bsCwCM z;Iy3^yQq1tt;8I0f&k!2bucO*;%@D>F@m)lV{IH(-L>(t#wQ%%0x{nGiQf*0Iyf7;8<{YWnmW)fd zNmVNU?eVrt&Nn?2v#+!Jz@w?DNgNSTs29}lJ_?_&%$a2Yh=Q*@*m|ynx}FP+EiG(- zsSX9b?^|aR#?;l3sN2_zXq1iXGTu7VK16^pV`m|gjbm|pc4qFziE76SL|Ekd2cFym-i>d8kVkt2(F#yMVNuFGQF6{ZyW@x|m4(08K`%&;rD&J?|k3WHi zKRELY4#~dB?Ytpq`0)s?J#zeN37HeF)tpeAI}ycV;L)~$X!pacaY;((^h-K}6Y zO9eOv`*KbX>Yh$z-lOBp^=N@z*TJG9(n}#KYdw}WW^p04oEkrl$+C;+0OhUV&p*%Z z-j5@Z9Oj65RmS02wnH`TCHer7oQ!sLaq`5uD|&H}rK4H6cTGqgur^BXuvxiQij7%ps;`wR>`4W!+wfX;Tqc9Om59$EH#OWoX5Frk5 z4i#C5Q66oa_M|Y-WQu$zh)G%E<&xI&dP4E?9-xQrn>##@x`%sw1kDGc3*v|c9M|_z?Am1lw)oS+B(Vhk%Fi9^tJk4!n~Vq zD8;*-6;Opr>XDKh8%Ndpit<~m)kv=|BEBH(nF>J)|xa~N|)0wSU>z8+;~1U zCC4sy$IR5ZvM^^?)nv&rEd%QMxC&&mvWcc5CfW2$;s}n^D-E{6`AcJJDea=40M}L= zkm_9t$;iks62@{BCD_U=HL=73a1&>`*=ASh?`Gjt26Mf|xM>adp7AJAPBG+Y+iYOp z0{GAO%+KSGShyW{Yik2;B>+JTlCA*eoS1uUUu?4NN>FCg&Oe#b=}h`CWzP0OWMH*dAT>~6!~q4gFqEUQS@Q~g7zL|s%7S!>sj zk=Odb`<9>4$;mj6kC>_QLrgm4=*;rOy#S?i>PSv>pb{r#gxj%=<)IfGL1}(*N#N1k zQf$C9nhuc}FWT|p6BiRoH9O8uU-LLI@P7UkxqNf|aWrA5XAhZTLeFq&ptiN*Bkt-Q zqqYz`!qe^F@?v2?@EF}YEN%u3A-iXsV~w=nj6UNFdxzcdHJj1(M?hTrVl)xcvD!eYcN9?HctO6AjTzTsu$OtIdb5+#wM!^p-3%|ijuat0<0)% zXmuK#MTP5f1asTpOLuG=VAC&w{0H2LG}Lxg?(eWH5aqba*99jYWvb`x?VTSA&#hU$ z*S_^c3=I}5Y@?GNU_HMP>{5WF?_^gQOIB)`0^Zq5ahWjU*k6#PXBRU{JIeFcJ1{wT zF1foOYI4MtE+3bSB_SKXj)qOcNKJI0EXK_-4m@L{1hI^J4EL{h-D8EJ{=lawvn|1M z&CbaIQs0Db?lCu>4|waH)&;&x<(d_SncCRsr}^W@W}%~_1GK=#2B|9d!Kh+#`kRET zm8Y&(YmdJUdKwd@JA9K$cU3DFF-7BsTz?wz)7chAi|puvn>egQbmo>8KVU3X7o9vd zOx_4#DaW?ENIO9*Jnz;x{sb;&nl30b+3~BhNvo8Q%}0}O{$E{^{v^kyCTYLhH8&z_ z!FD5?_P~vFPLFz{wBNiJmR{J{yLZ+j}kfHayLC%LirIrlp9r)#_s}5+n zM5)G#>IZGeDA8Gj;daR-3t{PTrbWTmzpnUqcNAM)-ab(V-is>?2rc|n23dk;&Lt2C z^1OwDlW5TNIpgBurZ+oc3u!~SKOCM<;D1J5pccEJi1Tj5ZgM0;_BjfET5hr@dXRW$ zq*EzCS#zcdSw%<3aG#Mr0k9w>fbbZi#VI3@*KecB?qU(73yr56n*>|ww~7Z9RoY~T z54fUe|3b(#Rx;2*qF6T~-{>y*mnb4rs$bUGmgU`BWYeKLf*$eD-Nr=}8kCVisJ~i& zG+UuMGb&4`26n|kwDdAZX|;itQIT?30H~jFAn|~U5Hwe ztt~AfDuCTib-f@Ju?j(D%9x@}0m?KmJ@spWX(fyK7GSHZtCqXHqN-Ov|8PJ2oWJ46 zap9dy?Sb+Pd*MMzla2D?B2&KVkZbLe$6h-TJ>113CAF`qgfLd9xef z(hMkeX3I_>QN^KN_D0bMmxgE$ct%@Gu^-$ALcW+D>h4lhNzSgpY<;hS?a5ZIdyey$j<+luV)(Q66|WLhqwx4_pfbpe zLA!#w+0nac4;wArlA55&_$5QMGL+Bh1sfM1KCgG9Pz9SEeUsa1@4=?&y#f%A+JL(u zL%(%pzrEDJDXN!$)^+22`9$dhbhsQ6??7qPpq7wB>FPrBjQ^66vvE`GRZRbcxG|~H zQCIyb??h@lF{~vh?KqXFIdbV?;`tl zPqQB_^u#OLhnGXSlQmS(Q~g_u0!~p;?S|R#^Zu8Wc7x=Yp;P}3o5|AuGO6Sk@UHJD z%q+eYw3?cb&__$9u)QpK>HRdrATkQz|58t~sWh{(EKMzrNc{q1v~cbhsg{g9KrOZZ z8c9i;M!)R9Ecn^M93uKF{IJIAqE{t>d_y(BEv}}9FbVP?UvRZ#)LSlkBky3H>t{-A zbXCMEjS}Bv&9)nIQ_Z)5|EWnq(H$=}l}A}wuVngnM@wQd3KBOO+q_F>l2|;AITODW9by=#voDYJ>o}HiPp2PG7 z8u>wkI&*xAMv6+gEpRzVLj?>pWR`BSI4iR?OS}AR%j{E=xRwBxI}rCgL2itfi{1w? zG$tBBUPeSlO8{}>O2FmdRsJiPlF;3~=EMkLxR$p6^0U9w|4#3O0kI|fT^ZeHA{D1e zCE*T<{(?q~^`}%#?f~FySHU$$tNEMp>HZzfp09Yn*mIRjHI^kqfIi>4yPy$wE+-eG z4U_<(bO&z~Mstoali}gg@oj{S$|p=hL{-R^;{(UY0FhC@eZZkGIu(i8X1>u;Ykz#j zm`YTLnlg{`=CAq&wmtv1yU>2Y4&o`*nKgV%IU5i}7AHnZQ%g(x8#M=dC?KlChVA$> zohuJWjrQFr*^r4T3wm!snFH-;Y=w6{0nmL^YgWS%{3?P>d+} z%TVd)V>ET!rPny?vUj+ftoZM=iKf%!-CfQC9`EAja-9k*=|*BK$6R|MND1h!d*|#~ z37GTV5#Fo-6i8m9mX%A~cOi6px~vS!F<;<6OmRFhD^Zi-Lik1vmh+>A#|Z(Ugh^mW zAWPFFVXK0fGDi1e=@1_yf9I&l4``Rs50a4lE${4%_6AAoLv11w)M)bKw(k*Ra5W%A zjB)Zi{xpHlg*k0o&(d-UTbez07#21li#Q;Y>mph;kYqr$5LjNxQYN`pM zd+uO8Dyc1lu+^j0n*KWwNs=bs@nU207 z5o&a}>|-$G_D7DS$o7v??8VBB-Jy*>m_@rvo16i6*zW3w<5Pu0?w1S8F0rlu^-*B- zj;#r%(hk}rJ^8s4Ied;ry`pkS_YpEo1z2+jh!#F>{~Z>_D%kt4k)Fe5{r%m_7bH4> zwfP>N{s#m8=$oA{LQA`dI%&~3H|#l-CZe?Ho0*OR;0GFT-gkBx+Y!*a(dm19d<+0^ zkFfi0Ssn&ld9j3ZosZK+I~?)+834?y1}V9}i( z;BrHo#Y3jsQacM6b;{ZvaV^2;-WRA)i2v6a37l@Fz5|fP;J!EvbYM~XiM8|37XiX+ zHE27sHe6+o$8idX2AhU`y-jur#V;CPAUI5{_oyEnOqHTg%7~8|mzcP##atnw!9rM9 zMH#J&RHqx~L9dK02PTn`d77E$i#cCz^N+#uKgVMcY>3X_$=RMkSuvPxO#oYQn-Y_h zkZma<6;=>uCpZ#azy{;fWFOFm!WeOJD8m^M!FPet{guXgDl>wUoC6PYgf8~XpZ^*A zCm1%zC(qCTdEp~g4c9EXGS;$0=EbyY-JV#0x$U9co48x`dmxN-XXPDWnJ5Hgym)wc zoaf*Dj0EI^oZJ8#&{j7i+%|h|k_=ly#j7eN#P5T0U-OkZv#qx8XMXGun@m5-knsis z<)v888_@9g4y)#?S@nWKpRjLV>_Su~NVr;P)6#H=Em>Mhu>cYLF64jdC+zw%|8#(X7ZJdtHa)nQE4%oHV z`U{FB^qN^*9^L*$6T-e{Ao_|KoxvgwQf@Af4EwG|LKt^_dN`~VT;6h*a%|XNv^O77e1QAZM zxL+xLvIZfJ+%=1otduT~x{P-&eXQ;!s~pJepsH=Z)^PF}5(Gv_234V3aJpaeb~4WV zaY~g$Wt4ICmJT_$vRZZpryi?Y>l-`VKJF543zr`B^0%ge-t^o=`_6zOLp~M)9bSV_>5NgO06Tw(Np6zHUDijK+G=?{yCpOOy zcstVp=!lDtuP3A?93b&OJ~6bO)O0M@c~Sv;BL_vU>Sg@Gvry#aW=AwK-cN&cnT8Vd zsfB+8D%wM!Os!p#%d8V=_w()O@=Vt4c-mD9*3s`_2};BmlZV|vddx#BI`+{CP9*8P*L4pEsTA%{7JohE^BphQ0Ei?9$??xiPMT0rZ1Hm$ zF$59?npax%c~N_+Hs7y>bHaU@m~1(@+XddQ|lN$*o9Erg|00x z%eVcRo|_9bs)i-44g6>D<4Tj|pI%QX(I>gHTVcP`hJvA((ua9#k+GB}dukYN?^VH# z2m(bs#gZQ^u@bI;aqL70f)TK9uGA`O>I}^=BooKJ94=OM>9enq^yWzvxx`k?WR=y{ z9!&?r8GgJLp#d<9mVzbX6IMgOOVznyrr_B#ho)v^GN*-ySsJY@CWp%&_HMB`_?oyX zv)amb41{i6>SfKAN}F1dF99N8&;objMJ}(jM52ECdVVqWjNyxQ4J4v;TdeaR&TeG% z-AU9h^JE+7GwO`RB_zyx-D5{SB6|0cIhPjuzw2T^k#KJJkna0z2uqi6D2sODd$t~y z6rxesGu?x8d$u_iezN%E%R-jcs82hQ$7S|OZTX!E)!nlh9+uEGHqrNvr2Kp*zfJ3_ zg9#-iCE#$3D0E+3X7=8RF88*&qI~YLd~l1kujvSC`T5UoF?T)w5c8WIbyx`UhtFrk zdmFx#R&#x-+mL_5KMpR{F8Yp&xB1k4ojP`C@Z-IOC=q5>M1t`E`)DbliH?njPtDHD zeZPN$fi2TWa|ro*?j!*xM6T36jT4m;C?uk= z@XwqNXFIT0ig|C)yv>IRC2ewC@+_|T*BGK^CCIeU(p3}9&YCL?F8iB(=Adm6&>5!JkEun&7EIt6BDcAm`87EW@81 zcv}0LFx^NJ{HG}0Al%b5i3f{fr6TcA%`v%?!IEk3j-=;zE*~Ac#WtuIFJBzt?wm#9 z=X^(IT}H>TaYtdakrU9#cMe6nQ_Bl{QV`bBmYanEQ^hf!_Y?dq6TL&$AY+rWE+g=F zFrH=3O#M`qu{+ngb#8naDT`hkd5ht%sG(v^fi7^m0*>6s-X7nfu?s61kKyR7Wo(^e z&eU6e0}2Dj zROBW_xrZh`Fk1184%uDFDCD&U?;J)9Ow$#MJBJB3|Gcdu3m+@2ZN5e9>{Z=|m66*Af3*M#` zdbk$;{%KWSGc~b>>AovbC!L#tD5(IN#IDJgkWg0fTN_ClUbhaOu0sNnUZh{0qBMBX z7bM{dE3Iy$+Oz`^*){jUy!*HJ>xl}68#fwW7%c-(*S)|+9{*b(dJ1^!%mpIYv>*ht z$9pqp?d*GP>P4Stpd7SG^M+jPtEi-QtZC-)o_+_-`T2^SSC&q^rMnz=Yb#xCL*!@o z*%5%qG>DuR%>9WL3}aK(6&vR_}Y*}puNUD<~se9zjLgnRlF zX3qnsSl$vD^h&gyjiC~B5PGNlE|7iE^}&()jiA3>)0N`g5(>#D-o-jsu5&EuSZ7v# zZ{r&+!z%GmV_5+G(WNQzqe|J7nAN(Q4hVjB`9BDAb?*}*w^WwEe^PG$*T-5~ar4z% z>uJyQg9EED>@d?POTGIp(Nr%EK0Y~vW{M?G;MFOD3HKOFFa&M#Q^<#Xgob`l2)k1hUWpm!RqOb>Uqp zV5$RH^^+pLAAmk<38XzZtTxA|Gk=_0@(QXpXs)xlfMsnz0*!`)9J9!?r0_)F2J`R- zFB==1lH_^RS$?Cd#+e{d68L=)Aga4~tYXqq#J}W`eMH1Q(zQx)8<9ap7;+^!5*-hQ z^S$sRTJl8s2}9FlYa}DC&K=T2D+TALB)R3on(l@o9jtAyGqbUxP^wYJpL!5IL|N8h z{qExHl5ea)PRK8zQzY*c~J#OR~`-C5J5!xJb?^E zQ05tWE@*R^R=_MfWGIwMczFqih8BB#Zm$3QPru7`NQdd*i9c{%n%fe0&3Du2yMQ?d z5DU$^U`A5=7Z_$RKeFlv?*fK~RMeD;+j3Y~nK0PdGP1tB_8luse01D5*b@`)feSCU za^Dp!>}ILmsuuIUO)^DTvJEwN(#rLtE)DuK;~f#gX0=HceHH?R;pc}^mcM$Ot1@~z zZGU)ciup4w?d(E~*Zhfq&nm|Rbo(OxcvxcsX_|t9-ezXNjTB$hWyE6kc`LH`K3KB( zLxR&||94D<0m#D$>_UvJjsffx^K7~hlkk^oN^v4dN zsGd}N;rt~?qA``@z0YlRRsR|TvQ{u_6 z=SeT6f1XfJ87Pr{LgtAE8#jWu%lz3*aQDpv_m$^IXtY4n*6xw0=L!w&`3unjq20NC zUwF?tgUcGS3&Z(c&!VP4v1TITGv@g_lVy$sLGH}ulIL|vG)}3xZ#Q+5*B#+$R7fkTGyD2De%$CU zi3y$#ej2D3(yCzRf>YcD0E<7QwsSWAf;Y?yw?xfxNM3J1{U#*nG2jJHW&hmw3~w6+ zz(^IST6w6V_rI`yclk3^E#;0B14y>JJ6?pT8sJlQQz1p4ZU-WaHP1x-yHc0Bz^tRr zLg?BT6dH-iDIhTU3itHe%O$Y!+Xs(&BR%q=V*P3jS7wKeTW-PI(>)VsDu8uh*uD*6 zVV2QsC#h{u+~|Db;7-+o{7MC);vHMo2irYQbb-V3qBYvFqh!t%Fhl5N5PgsbxCwwZ zDGoq}T;5bNSo6$Y22NVNUo0)M&4r$~UclqT!ba@5|%2U*K;vSP=?6u|>8ZmOd*T@s}0%v_I9Vvf(n0$x({Vc0kT@WnbV$Ref! z`s^j(RbTIQ_UV803V>b*P`mO}-0xkefE205mcxoi&EHND&tDa>Lre#$@zJrU`fp;< z9B;6$};2aP0(fprPYw)kQ^8LV>M24mVu{`ZrEXc7CT&x+cUekS?X>Ei0)3V|UY0ejT$^WC>Uf5|>~WuDH$|bb8vma4dun$1T5Ei@ zh``e7`CL;7Rs*E~#gNMtKm+4fd{r~)77j;Y!nVJYm3=w~p3Gd45_k~)mjlU?dzJ&~ zuQrST>6IWaTu-!n_;aFiFM)1O;hx0Gs(&Jrbp`J>kPNZ@3Wr~1C$2{2$`(say^ZV{ zjiYit1$F1W>Sb@-DLgbkLlOurU^XzGH|N+h5i#<4Ll}e+AIt)NIs2{Ntz*gWo#CaE zW z_Hn>zf<(%8%mO>=>a?dvhIT@QysJF-=w++>BYB8f3?tHSzgU zoqp(&T)+eHJ7F>_3pc1vQTd!Sw*Q|+tkzp!-A6%@}yObKVVnJq#SSYQT?` zetdic9;<{V#wbBf@{Bw;MRo&|6R=WP^O`bp0Ay$_Z@12z`~m>B8;~Z6gvIrSUHYS;nZ*f87;hsp-oOLqa-LZGbVFkUxJ260PnQ-5KUW9Rm3n(}W$biFw(Sck2w8m7x=~T1& zs=PHb_aRwx+{S?l}H{^BQ0RIl~j-&HFASkZrw^U}~FQff(HuvkzCXGf3HOCIavo*3rXLIn7L z92^4C$aE29T>LyDyNm#|3C2YcnlcA&$ABU74j*P}YAV2V)>IV+QsG$i>ciO4vvMIb zDPv}OuJjDDS=kT(0_FEwM@U1HK7CnU|1RW?z}vM=uTY9QCG?_rd%8K)uNCYd%N4!@ z*6xleV(ec4BU5$go0+-6i+WV7SZcvXutqVUhb8gVAlXn$l*GNRmow4ePGbZYl7W@c zXb5tliFRL+xgwI@$s!K^x8PlEb~w}~%2lkX225|6+@jGl4cq@KwR0eo{vx&D86Gex zN+)2R{08ibyoE*pdcshDKfKqbJJzQpkTC>AAP%W4w6*;I(R7wUadl1C4g?MEgS!*l zT?Tgx4#C~s-Q696TX1&>?hqh^;O_4Jo%{Lfoxf107;4X+?p~{}1-T@qT7=FP8qik3 z%Bu^sxb;5DkTX1@I^M8jCU{FIj@_tha+ib2I+-~%j$>i;T5S$2M{;awxYRWx%k9QY z06W)gv65re>!eyUO#&ne3bL%o_?86NrK3vtS?EPT5`>{HdP3uGEL<-oM6{HpxRIzNka-U&uaZ6XIOrB;1dk$ctj@%^ z>%Kd0u5?tsF|YYQJks{q1;doZ2G%SMBSkHtUq7=**sD>rA6WchKwG8UZ2TIW?MEfd z`f4UG}JK!8`TdM ziX-qCPg&icuPD;7h$t$em>YO7(ogFL?!Y1ntV?*)WTRv1gYISfBwqgl6k$v$3S1$DWx2 zF<3yr)3Iw0o#4`+(&&A*b-OqN4pK_mKGk?CWU3KFU>quT2#bqAU&TJDl;apBzQ2m`nuqd&Y1RzPLc88ZA0agtpzvz1+!>SHHx3Apx-a0*uZ| zEhTIlkbh-5G-Lq7688euckFs=;=dRAkCK_wzgz2mJ=;8tO7^#shnoJRx5l5>~6+gV^(Dr*5Ecz`t-nsh+yO_0}bWUe)@phK40U$aO$ku z_m#d|e@QUohJ_x9-4P>{W=m zybBq!4gm3oV`9ANY~#z6`_-84o@;m+2jHZJ(Wr)>Jb^lf0gc`LbwJ23uZ#--_6r08 z-(b;OX=x032St{6XSTVg>z(1iMFQOFaFF~XnPa=aF}J9UqX6>~6`TbC6xXEw!~u%m z@)jzlV}&J9J%bf(QU(Be$*n!2^4H)a^VC$jkrsA|N+fXBQ2_?=1Q60Qw&w&)LYRSY zVO3E|%+Lm%p<4zS)9k1-Ru1)&#wz#;cBN*_qkUvX&EACRX@y~lVbATzPR*|3XwVk~ z94+7>fU%ARF}=PXZFmG3T~;$AEy%Ef1j>sct^jwpqr;IffBkd#a=o>X#N;nW0vFo9 z9XFQKy7ibN*E(J`=wX3(k73E;-sn^MxKBEv)WlmrAeq45Eq>abFA1Iu6oS6Sj zg-@al_D~@M%)ZT|I8^mXUzUINC+z{ex7++fK8J*do`Z{{Gl9_(e9i{HH)|eaXn#K1E=R8ymO_VRV@LAF>V)1eY*gk*kI6@8+TXtu zJkEO#gFf}R<(w=yf39=$>ZBS!you=!9>wCo$sP4{B2RSXQ@GW>$QOK0!os(mHSv_+d5?y~yoTH^d>CSM>wrhUxpmg!3HKD&#AS@)BF}VP4CpjUu$3 z%Pxz|E_xIniH55i48mI&)z+~L*r+)G^r zBB%{Bn0Zx7tN7R&9gu?ptT^aS0GrUBljm^1(n{QjQJWi<7+NBJsTH6T0|i=)M--Sf z5)VTyHy}uZB+pKCkmFPaOWr~X5)(R$Ox+orsb7QB-a1f8{AvfE{W3a?7vfVs%JueRy^!L}ds85}A;9 zFsWn>CHhik}JzM;#*O@~6ekciS21743)}OH!pof0ZNs}P6G#oO< zjK-t+>f%;SG2az&hhuAEV-p0hw9%u7fN)FJqo%NWs(E*rVzEyJXPNdx$+NHX zjec>8Bs2uE{p3HEQrzlBE5qSCi2la@o;l-E%fb`hNbnbNw7)HE z%*{vc;kpxeI(ozGUeM}i&B}v2fk8@ps8oc}^ItDzv-7`^p7$cRuL8u%`%~a;Nr7R0 zWB*)prUou_0hEaY+y_=N2ovf#XXl?wC$$kho~P7S?Qbk(bF#V4s|a65xWmgA5Xm6y zUT*Ktz+@>36qP>v+&fJyFR!mC$|IFbsHVt^Y)iJqXr_$a@ke>lu3c&6NOu?LkvStf z0^qo>0rn0y%2eODHY77Y-s)SPC!XOO^TV=9FYL#wm9vVj|9UuOIe<_=CY zU$K>8TigBlKGl4BC*Bk+d^n<~w0Ra6amb%R{Xlws&>Tsv4Z8FN*Giv?xAPkjCb<^u zlJA_!#YWQmkruzU$Ga)MT@c%V9BA~C2P!RtG8ZP(v(yzGN0A$!85|Vr-B}NUJ^a=Ko?8p%S zI~!*Q`nyO6z70kNuhruFrcyVJ(a$05vwT*-nXG2v!NG+2*e@rjYNd> zVOfKqc2HIm8DdOUC>SPbw)7ZFDPUo!dx6)*e>$v zn#-dk#f`=g2;OOiTG&};fRsg!&Bg81mJZ9gCfjb4Y-=elg`x-jE5L|_ZiwY;bg2u1 z%AuUxH=0yBpBo*a;$ETWYx+zp5oN@LFMBGXTY-i-QNcAQi3uw3mjelX4{*?J1&S5N zvnBLDq+a{_QEZGHq1Ep$eegG2OK-qxm{@A+2~vZ=(@3CH(0L?Z1FT9SFcjwg<(WEo z5J%&D-F*8v_^5L|L4H4<&!={wEKQ?IoO7^6P@O8I*E+2Xw##JDZvn|`pjwS4mFP(w zT`kNjI-a?vJ1wSa{Qj3E4u=np(Ucpxq1f5+1eVteg^kHO+|`wpLxO}!t#qnM25mGM zCwVoGJHIYo;D}B}`~jAS{(1kn*IW>g7POARFcd74v-N*t;ZSbq0bBGWtUry!x9BYm zxvph0l(hfnq60ASzR00{uD(>%)aK)PR(d&Bg_Em3__T@!2i?Z-VzK9nOy0-Al<}>f z_^^5BTDQ|NzFOo{Sc$BOHjOStVh;+DI;C_av~^XTwD?Qy{`L@T10zRnWWT@B?c+!* zz}(?79iT^I2_`mLFwV4+kN0=f&ro^AiRBUAdwrk2s3rBPwgPrw%445DDTi0mM+{b~ z&%fA{XloM3f22$01RUP2iMjMz^Gq+LPz!gq7Xt?F6GD>wy~x>o%H}+K+&;~p>!nDDRmn1n*y=(=fv6P`zM%; z{dk_|Cn9REUd%|D&rFo)b)1kW5cm=6jYxUa?FHUMpNX=yACHBQ`OoxJuD!v?6*#aW zFuU0$n^SaxMTGb$ByHhJ>x43AdH0E(_>uTX3Owk89!tYmAwO}F?g|ocVAcPS6nkxV zGw+fHKBCJ!mYnvzg)8p);7|TWH9b~JJ(R6VoI@k>-AxCo?ztRGBO4pU4U|iM=Bc92 zIbf#gqE`kiF(`aqDmr~GX9de7sAsFR%T3N&%A3Ny^4l#-l=_CCgqfmp3)+FcE2O{e zQd3{%(1rfOR1|#TP6u)ZpCV9$fDH*y7_bJh;{+GYI{(WTp? zv#lm%IM$M5%>=8_;PC?}167{(O!gwJnMJjiWYpjOlTOAO|7|{Pg*jsCH)_z-znT%3+Idsu2 zRtE31dlUd2W!Efu3S-{I_lyMF$Y6(Ac4&DPK%a3c5&dQjBrh@Zvr5q|hu}N{ohFF& ztnW&yj8!h~K)TE+Wr7njo-#Vk`DV)AXo79!@Z_WjXi}uzlN316WRT+Nu1sR?Yuo@% zQdkKaKQH*={q3iYJCVKbiH>rqf!D^vY!fI{G!#&T0DwUx7*aaGc4hGAV2mbe7`l8_ zyU0EhDQ~H&*|WpU4Vkh{hcmEL#a1YB)~$T&EAIoVlP53F^e)9jC(3 zmoqTJ{WI!edlNd3$vs*s>|*-Qu37tgB(ot1doMcVynYo8&%T1=ok7e&0X6c&7$p?3%neO|_nsuFS3k}&c9IYfutu)geB>Z3jkg-j$ z?LM*tZd#^i8%}nh;lBQTCc;1fai0T(GYcnY+E<8{I>)?`|MLP+$Tl>$rv3S?!gSnS zS=B)IFsV87wqs%8UweH6cV z=2JCa#7(YV#%wwtxhn9`kCR_8$TYseknVEyWshG{k=?B`Ku4%szx@`AT45*saPinL z<@@b@lS++cir%!sXb1uniuj~4lgCj>!SVE-TXCC}VP+0sEEs3Z#>)C@VF8cRcJ-HN ziA;gg5AA9;jl2;~IjS(pIrh)BYeo-ZooyfM-lPAp)AoLtvzmN?X6(KF64MoIYM!C< z^ZN?6a#`$#-Db@6|~@rRe1^1SX(K5Qy7RqC=XqbD!Prc^W=o(jEE*|$BqIZvfZc(Oi{4k>AMdHG+_VRj)2flVbkZRShaFZQr!Rhr5s|V! zMrBf`;7FKtL5-8N$XwR?%jDOUAJ$Y+g*7x5j3>ofcBdI6a9(?^)!(WfasaMCyKc?W zxwqLqRI_$9HSdt9TtkRVYOEG0Ebam}k|Aqea4jVTXM(9v#>43Sj$t?oI+Ivuzy3fe z`M8bkcf7-XVNCEiawN}u+8;&AH0Sc0OYO%NF3%}qaH<&Mzn1u-Rq}_T!Hnj;7J_5|qcj zeY~0w#VXvmT)b!nWJ{^YWZhx!wSS3@M(BF8ZEdLIo>}jnnJZt!rNg4ZcG9F;z{hHs z2HjuM6cr^OuXxXw{y9ou`5IzacUDR7dA}(VM<^KbmDCu{40*u%QY+l>? zMbBtH5OznGJV0xRhlhZmehw^oww?Zp*6Q{98hEkeuFEh_ib(#8q|Z$by9&v!^Xz2R z^FS{piifesfzQw4H$OKJ86prj%TYN+^_zVxuC_qmnRa;q3?UqW(>MAE)!Ma#t*uWu zkhmLe!`SOY4I~NwFr6JGB}WQT=-l~j<;GlJSA_U2MeHPFHLsZFw_3o@h%5G^sMW zJvXd^H<^l8Kr(r@B#~zb&OLFlTBUOB(sG+4dH(yDBIKqgT3QKOm{OijF@VslU1DL7 zZT}Q1y!7>zM08#>q$aqu054FM9nIArWsW1325LgZQ^=4ca?-EUe8XM+2nQ`Q=8Mj> z7IGfWtX*e7SPG;bmv@O^)*l?PTejB-G$@EPb>QB+mnjHA?M^#$GQ@ zHqyWmZm#SRKJPSF<%Q>EE5hhdyVDeDNIYMG^(w!C6)fXUnY zlQmfMk5h>;?Ew@a$K1PRiWu3x&QC^^9koXq*vSeHILc`o$LQq4LMN;f>Rw_g`x=%M0`W<#_t4J<9wRWw^lp&KN;0_?YL*RVV)c3@*zQoo(TLT~Asy{{rqK}L)v2Bo5;6`a z71thvz=Ckwq+gTbVL^(;ri!%!6t!$PrBN&7V_2eK4U*+ZREsvRPms2M4udv*TnvD7m?w z;WJ;d$UI_Lco;4%lH=nnM9-tU|3LPJ3lh#nTY^o2aM|+k*nR@UsizmQ|GkF)@Q$LO z1gFmTwddH?m+o*Dm)J9$GZV*m8b4GeJiGxcyt{A0HQZ4|%OFTph{`Ay(Rtwr)B)7) zI>QN>06&_c_XoZP^1S%Yxzd^>!haHNTO$iyGLvTl2+zfJcg=Y07IH=|4glZBEl1=D*ST_SE~S z6tIb}%TE(2BsF=pgfNICOp|^N`lZl(mdW73P^RL#e97!!hH1qocz8*aJxt#tFnSXH zOR)h?<%lg@WySg7q@ggB{>|f5PD{2IK?PSGhD+-80p$k)F7bEQ>a~+T!ZNLcuaSF9 zjSakv$_JZ^jN>^9n9}+?9Ki77*P&f=oR8} zn`mNweJBcA+W5ueILly|ENlbm2eyLDO?axnH%H?qrHGd$%}=mU-0_}?o!NLWa{i^F zZ#t>4%3onQ7aC#FNj2mKk3;rXIn4&fvOGR+d$Kvbgr73OA17?vo_ha${Us?T<2va& z3)^&itiTY&9rw9BCZjCRD+;LJ{kCxYB43Ex(uLl4KE@75xtHbgIOdZ9<96d#z1fs@ z@dAsy>RynGtPQ)oF+e|XYM&HO*PV3DZ-W_NzQjYqi#F}KU#w;Je&i;8zYNdJ%rv}k zo&mDTG<4g6sID7)cAR6Ie+`)|RRPpu$BTH)61nuX>(WJYCU0RJk0OHwVv->I-mHQG zL*Be&8g_nunI5Gd%xZnC>}~?jaA#(@nZ_fJ2L9KQAkm#dS*ES2C0*eDUzMynLk~-e zoI|&7zn|LuBA&P2nBG1F{YOqg$(9Q~G_JsUfetAvH=-Knf&z}B)XsG%4vvasv zR>p}{&vCQ?2~cP6jz{Z4iT4g4VWRJNy*S0(Xhu4wR6}wRTVMNJEy#r9*+a}R!URce z$&N6rNb^p%o{0`O!_YcxN#$|oe{(DI1ft?~q$%5>%S)n@B|;enP{rt1%>McXsS<{W z67TeOXWf2BC^Xy2ijhwv*)|}jHdyOn} z)0Oj@I6BtThhTM-XlvWQm^`U41XUh%v9CVr@|vn_?RAOon3zkWLxss@G3TA$bTdD0KMsDC9X^H+seD(H8tyEe^v=5<#(OEIwW%Xv4s zzEHvyn7D#Y0ev3VYQ$6Cw^Ya{cd;~jDo~GU&vKpSDD$qKE}V{@zOJp^*TvD%nR*4B{2w3k-G(4=;uq4jHb((AHZ}r& zj|8sntEvBZjzWMuWpc6J9RkEQU;k0R%-7KEn}CjZo;k+`c4di{~@RkCV@Z26Ve?`8y4OY+W- zmxch1S{>m$Zl)yt^v5^*ZC75Km5w4ESQ|iHa1IXK`iM>a57tRAqe@hFMyWtwkYNK5_%+k;qvvc^eQ0@MxKGVKhsY<_G<#awOU?Zw)`p>cH=SrA9-JJu>ON8#&uMtOd!=$6btuhIwQRZi~^wG>bBqy2UtqQ}=Q*CmsjKF=zuJ#UIG{QiH=zCIIm3U3kF zXlqPQzY?6D!0bY;{5#nJzM@~0YD#repr^}DO$f4v+y?3gwxk*iSq z)k3fr$CB2818k%i83j?h3k3|AE(`W26j60O-3kj67xZ(DWr!-I@=o1lghh?zZvS-yux)mwsxRJSwDq7o}1{e%~b{c?Y1?B|y!M-`m%c7Wbm z>{kJm`R>Wn{#i9=3jG4-`Gf&WERFbPD8Z&W7gIjzW7t%UIvg$k{ev;9^iG%i>Tx`g z-1~sd?uzhWih+8VLOfG7RX11GkP1tGT4z5{G5;jkBNARIE~X99irV1?H^y1q=n1MS z`$zr-cckeA0lbNfMxvDn#*IydnM<4$6+4k9@53b(oxJ5~IYKg5=pxKM0w)M!M;nnGr{rPNv zwNl(~?wjD)Nli75C4YYI7dN}F2B$^$gVbn?*CH&}f;Xqdx*S4NeW zZziMmas=Hc_37T>v`oank)?V%^Xb$ZX+Q-0q;QbH;muVD4~9iiWx#%V91$8zRul|9 z@YHoXN+l5V$*|#E$)=E*bBECcV)irvyunD(O2V z3@*gwMtfrW&UdPs&U4-#*QHzney0%p+TOs?*$ivWN1( z)-RIi(=u{&C$u|UJ$jpW0SmI+e(Mke(lWaZ`_UxKp28^i6a)8 z21*QI@Kn2`KEj|k;>b#!x|1^{z}3e8cb&I~seoymVj>NOkUF@8pDD~kXzVnr|81~P zj{Wa; z=JtcQ5M$h1m^yB@*d#gXb#?bR$L{ox&}&WlYU7TfnzRMO##wlD9u&UTcV(%x|JFLU zPjJrt+(2ONL`*p|VO^kh*(DsX``6vAU>wt5$Em2E`|CPQ(P1^ZBSz)j({f9be<*NR zC1m~tC~bRl^@0n%t}S?>@TWZ7D|BCts3ZN zz3kZJt``L-D7gTOVt3tQTARdI-WaIT#5CB=e-|(cs(-*?!|IO)*uHzzRCy{sB#?#b>nUPOY70^j$`b3oIgw(*2?T)P9DbR(ZG@3ev z(7W4gU3PD5H{fr`G?{+(u0p_!PA1@Ui%CpO)CW27dur@)F4B z?bqPXQHh^7C4qeI)_I$z#oaZfz~1^z>;t$VMx-KqL7Ob9P*I4Pn~uPqH~th8OL>C( zPBoCS{one>gvmJRC?4tbaBUod5v}b{w3uIH?*TPa1T|si!23l*FIg_+FwM+!J*htV z;lZi8dgpCuWUu2K9gWhj#<4W!z|%wjLw5GjhvK2^br=Lxe8{X zuGmW%m6EywhqPhrw!*)4&IcS^80gOzPC5;W)Ln(lJosKe@u!)h!6ZFBc>>fs< zj-@*(TS9+^SS}z_yzq^aX;fHwXfwKjR8(N#U@}i@q&RdB5$; zo(y$*Go_y71dp-8-Y;ANa}K=%6%~EsS8|yUt#~K&SD10!dTl}3-jKo=D{4L|6(~*r ztSiLLO7&B&n#87W_2(1)pKotG)&sui=>cTo(hccRN!Pz#C68#&g!Si!6^)jZeh`mm z=hq`V-pc!=o79~XT#nD5wz9vm>~D5AdxyGi)J0wCTlS=D`n}LD9Xn&ZdB5YTludey zaj9`(TPFA@@Ub{Pn08Rr!q%L>>yB2<&!t`;8)18(_J0QR|M1)wBai;j765MB4IE(B z_X*HoYL~p1aRKC!JdCUuwDuXy%^n6K5)umwOaH%S>nmg;@RF-`H8wdpd6PD<>iA8h zLBFq5J{yFKTcF9{k!9=+ zS`PK(v|sOE{Y3_p)<9U~Bh1h*=0rqG&MGO0Z^OdJM1hy6X@f0fL>{}0`rHlSnMETJ z7G$A;#4sjc>V48cRd0kBr>bfHMV1oDKz=0r|Tr%$R zZ%vu!O}5?k+r^9FpBP&a7^d1pX3LSqOJ=I@7#x(6wMP0>IrjgX$Frc=i z3mT+xWE%KX7*G*wk|(33iNyHLR2(AwgT7lL9I5WzA;x8!P!^a{a>+O7(qq#ZJDO4^ zt)QfRMGG0C`c`Zf9eNb@=;&sy26xh6LyMFWobQGV0k&Hsbua)yDa2JzZ% z(_i-WU5A0#rz5;4z>)HJ>Q-$lk+_i9r~{oNMYb#=tGMU49vEB6w$5HSQY9bey%y`w zht_j)wLgsh*!LlmzKe~nh_fEJ*9{u_!x!a(Ci7$*7yR*W_MZUpm%PjlLSXDz=I1>{ zTCGGVCQ~@f>+Lb}4c4CEbHO-HK}e>*zTw-4K>cfK`c<2Xz8O@0GJ-g%?hADxPvV;0XilM`gTB?Tj4- z6`bo{QXtoI_IPqInDgMfxjZt#`qYl%TKvWHE}OX16CxE}wHp?Y&Cc|vLW7?DM7^f# z^-JjpAvVwnz0qCxZ}4&ZJu>eVh0}6#LVHJv&75yNZu2j#UvuVpdNFw);8cW>8oV8A zJS~(74!w3c!9j}%cdo%KK>fSp1=5aDlcc=h#Db_Iz_H9ZraPwoS-O5rceX!x#APl9Y z=TB3~3%RQ?{axI~8?z0;gI>ntnX8XDcc`8K`W=F@3oB4a1fD7Q zAp`!EwhBS|jg#&IW^<$Pyy_{?6-vgVYd&xf98=VcybnU6=W~pAez7lj#p3w=-*f7gwjgkz14|Vt_ct(b+T=(`1Sxb* z?Vtz+VP4k9`=$8QkJ^8{UsRq;Wy;kSi%XyvWmgB9DbZk-|FKTN!7f(^PK3OQ^#U#- zQHfSnqwhEPGI25@Y}O7jmVH06{^(0qJl%fqyHS-x z&NM;F@BG-Sr8SF|Q=S%Hw11B)*k)ep**UXmKXej&Xs%6Wic_jt!p#F2JJwH5 z=W5U&$TtR~as>5V?B&sjOi*DGA~W(2_YZ`ZFJ`yZ%`$SIe){poIwr zB>>q7LP0A|mW%Y7Eh41pC6N@DdX)(3>(~3)kNxhxa7*EC>Pa)ZxY>B(^N58~%~U9# zMKG;KrOJhMp$>h^Vp2#U)yFa1K{5)rwkxG-cw~qJdHAEQYx-0%H7A;Bi`fw<9n#zU zi4J`{$v%_JYGZ0SdKj&~cFhav^ApYC=NqlZ)Ub7!hBb9 z{=QT+y*N|UAS|4E`g1qLqe8mF#O`3ImHq>NK>#h@m9r4BuUAs9m2?wUxp4dgo`25Q zhq^N4e2RwD{=jm$6NfUS8=3M^0P2%(f zA0bmI8cZW-{FLNw)|V-m|1gw60s<`V?mN1~n&VaZYAMpFisjos=G;2h5R_u6$NV;b zTZJBWWZA^U#i>-NFZcQj747W!Tm}>G#_^p4Np3*h3otY!s)2n3_J6kQE}}~V=)4-| zt7CyU`hBQ)10|%uJefBL!2ee$?XCfL{C_^Pc!7In;NubRw`;8HvE>H1l)mtQ4#Q%CBZ$!_A%414o zn1xB9Sa7bGoFP6XqA^TtE*}s9FmF_}>pb@l)FLtKPZ&a;CRbp^+)=NNFch}KTY6!Xq6DVzqHkjU{T2m6r$~EZDT(ta_@Pk7S(J}$*4EU;LcOE!DQVW&(2f}t%6waoMfdfqc}X6G z^&_C1%~42sQr(nPCX~0?9DyP74@fsiflxoc!%{=FLw?kKFz4xsbAsEcWf)LZ`58fiCq^gj1kvB-a}nPtc)o zYD_SSp8d;Evbu`2Bk!q|NF+*-lH?27ZUASSkLlElE%Cyi^QI>W*hO#?qgW@tgCuHW zz%G0{w;g3J)Wyn}hPYHETcivlKvi0*%h+f);N^Es?Vq$_-7W&=LF)xy%i2r@z0YpehbpU6E zlW*>K1!~+Q-wk&;Jw=5>VRCZB(e)v7S(E&WK8YN7;pkKFOVlqX8Q%_; z$m0^NbmT^@ilcPNK)9ztiiK-1i^F=k^8wVl=7|CuH>pa1d!XTe*J#uEoo^?UpvCkW zAlBr$bxvPi0^u~FaVOi*f|)U~sgV{P&iwA1G?I#^CFd8E>8-d#M5X$+b><(8e`<9G zcJU<>{lLY`A?P8Nq^Ot($fAer$F>TSQw{DLA~jvtGXJrMcQm12rQij_@<{Vr9oOKH z7RP7UIdnCO*6g-A2pg6WQ4vVT#;(T<8|%4$xOcL;@)G_phH(!wQKredbtS}57z7h= zm@0^5HvTiLgfWf#!0gWGms2M5#F_EY#><}Y*ho6UtvVA#?Culq;#Gc^?E-?V0xRft zMdy#2+>lJkx8MUap87-GgeaB+Xxs1p?oT$oseTZP&So@(nOE6Q=1CChfFY*j}TI+us|fL28QKN39oe#og`G2?rG^LQds zp1-0|^BHEX?R)@=At>Ix@}($K^FZy1hZ_ClXX(@_M2hp)=$DhOPhCWhlqn8ef|qSz zc(vZ)Yr<(2l>ob?GM+rxJcIMAf48y5`V?H`O?Tj*7@{?j5zUDyC(u7X^B`^OLYL>` zNM+zS==PBobB85JCK4oCz`CHF5ocv`Gd#YeuAiu?OlRDf?UNX6@d6n>mYk`ZxQdYK zma@IFMW{hPlf~df8rOiOD9aA?@UsSkq|a3yCfxEMf-Jga<=3QIf_ALZpNiH49?ni;dh0oxKW&?ZmiyT8SF1Oj z@S@W5&G4@gKpFBRnih(|)^>)ROBDgf`plmF=Yk?#EBLDftpx|9J=&6WVJ2F;Xd0kH z6!7u)K7fGr`qn_0+RkSg!H>{h)1?}{N#cBCzjvtUR8}DX@L6X$j~zFYvw7})PMtpS z-ISfk=M?|c^Ids7S~8-XjlI%vg|jrbzk$HS0?q3(tg6QN1v;Hoe>J8w^RE}o1`3?+ z7%)YCxhMRgqP1!6w{Nb=)(j(bImeDsj1C_%JJ;dvT(u?w2T<9z4(E0zXJ*JtPE)rA zJz48tfCW<)79MHTzW!j?ibboxE#1X2H0R@3A77K};Rh1T8l_8Aj#|81ytUX#ye7g7 zT|O4kL>X~q;Y13Qgy(;Jvv$}XgfA^E9o=j2$eTHxl)Gp{8aO1>z!cwgvO1r)>jY#h z;BVUt9Z%Ycizj6qXtdpHiodZ2220B^(w%1w{vZ0nYbWix$h4{4Y@D1T6>8rvZkRSb zdydOXm$MC$Oz}keBik85*aQz8tLuseKR{7Gn0j#@_Y8;7h5RW3FN3tO`$((s zHSK5EUsskzLT8j(1=xX12bM}G%IK`k3u8-=?YK(IkLk=XiE@dnmfG0b zPPzA~kEmFxakWTpI^JG zG#Z^HW;}v7zEffhPbpDpuHyp|3kr*tCkS6v$q4@Z5o9f`0oMIv=F>%|1TK*|t zpHlMY=l4AqNQ0uqThiZS|B&^|*+RpUw? z@+wn&$}S48(lkqR?|t!Ib$sdF1T4AN^!a-LfAZ+=WOkAlN53hN!+PXz^NaHN^K`G% z<*461@n5m(8%Q&%zB-=}xcVuEu!1dU#zbsGJkGNg#ZGLcaYZuTqM!Mz!_OQ#Xaz$` z6@zz627ubG4`3E7eo2`uW<;{)M+}A1`E9DuU^2^7$^e*)2$_=K*|QJgxQ^cnV^Gm2 zIGK?so!Ie^0I?-j;xnm>-28FsK8>TunGoQdaoj;9AD9IS9RX!3>?>>>Y_Fgg%dGC5 zBo((%QtAI`qkwU@LhXb;iq-L6{?)rcsjuD@5Ex-mh=k!>^Xa(~oDgGU)|ln!@r3OiJ32YBbY89}0F= zDISJ|H1KXfPC~=MXrd^amR{R~w3JD)v{tGpSQv|xtoWylNyu!aHU)XePqHQ{3AJJg z%BWlMkp=o8@+CE>d>vYpuatZ0;@Uk;kXOaLPhVTJ5~B5S#X(^JUJezCJ5CIEvn{s3 zf~bBi;BfpelmfUjNm@<7$27jFq@d!J_;FP z`oKs&X>u|N|IeJzgYXcvrWJ^h_(hsj0=fBqRP4o29>g`0d|I?;yc=q>Ii&tkDR^q* z#2KtQXL)wga&?ph!k!>&`;M?^oYwzJ*aB;8Ws|w`rTQ}=f2-@;=$7h&4jW+ zp~)h>6ZJXPM=oT`-);WfP|M(9w?uZ0FG102*j9ZKMj4E!6L=>Tx7KDdexHD4(k0geX z(IVnFI?T)-HcW604LgwpiVHOTe^h;Ac%0uBZ|V@Ptf{h2HR=6Av)j z%Ed+`Uz>-%I+&hLhNK1wc&6~njsH73DtHd2)8vD0-~Gg|(|D_O^F(^@l|&Vhcq%NV zqn_l|xN56KKTpUD2T3>H$5xTeD!Shp)EWLR9d3wCoS!YR#U;mRUp#FwZPVm63iY)k0CYm0f95hYtS=<1^d#B94@7El~O#yv8F zHAFbEgJwjCWeHVATZ-$SUOv>Y`ExVvcZ*ZZxmU^%@>tb-mu`sEuaw}lU2i!~CZ}d@ zLMk#|c{L1Hv^?AVz}}tJT(F~KQ5Fa@#VdmnI|?EoU?We4$`)@w-+mzkD~<+3P9~aU zk-~xq_5nnX+yYlsF-*)&IIC1(a1&U6j_AJ@HZo04%b&!ltZz*%_K z*fw*e|6a-e@J`4mN3Ts3Ou?%{(xsa=K_gxo%`cKDW&Gdrr(RyT{#uno#xeXtV6Z}{ z?^P)Hu*CSfpHpzEKxKASz~PMebJ_0*$80PV)$F_Fn307put`u}Tnr2f{0p8z<@?JW z)qjlmq7bAS&$a=%l7kmfMpk~9nd@X{*)sFRo7z|f$T0MAMk`~pjO?-Nxc@p+2rr$% zNRkRv5(pH)H;RFQ%3{%fS`;*->P{|q+vsUr+!$DklE;uBJ+3|8nZ)ORU~A9r$T5G| zknhhjpS=4TT#BoDN%fVPFHO<(hi`_kBgU-T)f(8Y5Ie^K`$3#~ieZbLtpBOe#R@g& zX|H=%7OXINy#vED`Dqm_7J>{ILu+TX;q9L;5VvI0>ioWMVkX7s8IwhD?uIvY>%~pZ zNDkH*JEb}OA+?NH0|e!CFn$7O&j@kK<{Y_X6zc1I#;fIZq*S3489JW(EEXv?Pv*Pv z$mdmxU<~TrLsG9(vUXwmMPXh^J~fOV(ska2iD2<=Lkkxkz3K|;r#7Y22kG>H@4<#S zrP2p7RUf4fNpzZ0<0=1rY)XGZ{?(=_jxSb046IAr3X@SV$NQyIAB zZQ#eE%owcsR5>Z(i@k}Qn#MoyJidUs&$gC4_4tUJ7746Eb(%p>&>BrCq4W@yd>mxrwfP(TnfB{lu+EI1vvB zvuxuwcuE*)HHwy@ff2SC>BouG>E4+@F8&Fe4W6Fr5F9TE%{%m*(1gucj} zP_%3OVIeU^#!sAGjJx3X2Uptw@c8!gIt%f-&JLF(0#Bf)gd-(|Y#_M$$M^x(rQ78K zYnXyCWN{>|uEM8fqxPkaC(8YLYCYq=VR> z3-XE_)?iTJ94!q>tf%(GMcU$D*O08G_-64x4_l4&o2i=6%zf-@liy$ZuYjN$7C|i&9ea@@Wm=DtA zWXda9C<>(@Y?z}q2q>^M2p?zuy4`M@-K7@UxG@ZLSm9M19lBSML~=Fq2GJ;fav?Sb zqOW5~^{i>h07Ht$lT3^V2WoT3&mA(g0U5Uo)^Tx(_i;27N&BQ7;x693Fe&zp~rlD8?+paTz^^QpF4U!qx^ z&!`OdSb5a;(yciH7xI<(Ma%2`nIY1YVAkijIGSNa+#M$Pf*nJv*RI=%*};@lv5g`< z?%usNW-a>to!@j#)UdYsUs*IWMn@HeQ4MfvY;V2NZNDh9j+jy`IUdV)yq8%oH#ovJ zafp@}ZU2BAW@eWCWr+9aD^WgMtd&uscO5P~&3hSb4Ep1^d5nt4h8mK0Pcf5y2w|l} z6gt+0mRekTs_V3lLg2$f_Y{kriILlRRw*;y(KDH&PW+Lo4)S^(<=FYd>2ir_eB_x-o`;|InWn_y9b1YyfC zH4X7dQmtR&qW+ee*u`Syiv6RhbPRMmkDA`<1w5OgBYeKH@kDNL!WufM=GO{YHF7;XFYZ7lf0MT{=DuTsst^qGKHZa{mC7CB@^uoAS znZi@&+DRuMY0|9Lw!PU`=OnSi*9TT{$(pyD&H5mTULP0V{4YOSDrJJ3zSRFb0Q!GD z0Q`i#J@;0nnBH)$v#$!|*d%Ecz(dalEo7E7{N(+=HXPJbMCRwuz}KUnf?$M}FrVQ*=l;;pU(qfHvkdU*3Eiaw zCB)7sougGaTdET5Sm;HPTogBjRcnhbcx0f-6Ky+f340XfbR3Pi?AH5DCdM9MWo`k5 zT2N%k1{I0O3f7wZD-w&Vgze%Tqt*Fi7+Av=E6m{7KM+mEuDF=2Q&1$-=%cR8a=X7@ zOtkdV%N&-jGloqTp4gGgPH9QQE<q4dCN`5m5$ zhI3e;^p)n13X80As}0*U;(*>CXpG&L_xQ!t(lKcHd;Ek<$;INwHA)Llf6Ar-7aRXAK`$y5;@7s~)7 zAn%&XJ=ov@JfM6?@ePpGUQn{eCre>>q(h&bgD2I8{%FcbHA|kJ#s_-g$(q2u@l5gi zB%W3+3H`O2DQi2@8fhCfd`%9u;b`@^#auv^B?Y8R$04<0I$hScr@0>1;^*Asaqc|1 z@=g5+i@m;f)Zv86+kGOLERL+oc+8^c+B9?WMi^$k_Q47tzLJ1%2Eg+=EJvTVTD-8! z0QJKvzmVWrq3KmO2tk?Hh6xj`H!vedO02l>5SSDe9CHU9MQVLYHg%aQY1+ddHj-6J z{N+n^VFewZ0;zi$i8Ib^3NskIx2Hem8zNPQaiP-poqxqbG;FB7np7EE=I+j|kH*HdO*M!=v_$o&p}^L~;?Y-;x@ z?K-uU$rQ&6fB4wvddm3kBpEADFF6uDq%;~{x)*wpPNLGp#6<2rmG%9%uD3@`G4XQm z9rdokqG09ML%~uwBgP-MWR}#;O6@=s}KPViRawMVc_X z4od0j@A`1+lD?@@@>BiPD;6Q211$M)KZp;^_y}7eJf%gQG)PM-Lgc&4Hja{s`ASK@ z(`HDMYGhq7IXJ$Ez1sZc*oq?_#&px%xc-OntP;vlDa@|S$WPC$ZBA!{O=dnb3wCxO zEy3D#i!@iEWir7x15q&=E+}8*ivF8E((L$0sco+zG6(yRV zWMamy=|8AWUzm^_b(`J!VUUjvAxv4niMve@FBhbByw>~&3lJ1o14&I5KSxi;xwup^#%z&=#xrS#x5;Q&+2hP#=-^bvkNH>P7!0dx zLtqGI52!)kO~EHt{c0f87~$3~(!Neu1|EfT zwXfSR3wZ9Fia~z<0?-H@j2cUz52PtxUmLHx-HX{Af4lZ_W%&0}_}7}~(I>(voRBqI z^)W7S^Z+P~owMRLM%Qw%zk3TB7i&LWDm7`{PBpg4X?r1pQyF@nGP0MXXe}+x{9qn*4C(RYU|IT}{(*>tW-ydh)HrQ+J;ox5k#K}!KBZ%1)Ysbv zL2i!mBTb8Gc>4`>T@@-QJc?IRpOmXJDA6i~M$v$){Yd`h>-RGM-e>>sTaYL`wGvPo zkzdno!Y&TFSY7mN+K2Z>lNQl%xZ{AR#xg55&ys<@B`OeiIh~Zi3!t7Cbi~k9>|3qCi6g0JSf`lq$F&6&4TJ#iL7G1Kq z8o1h)lam9Bs@{7M(27tTh&^4$e6S(XntNXC?RxCv?ytZ_$2P2JlS%ep*@;&>f} zSagNL{BPCOnDWS{VU8s^R;5QiaV(;vOv=w{%*#Z@+zh>J_VT-ThD$MxN|;70vD#EM z#r2U^d_KxE5nXU2Iil8qsb4|5;6?I;7Qr;(Bx>GkR3QTQY}kkVG5A5*r_|gb&`$(N z0~yepjmbK>8@_w0I5>{+^5@z5gnV`m+&LtYlJn}-eAh`}V}zeU()gfuG23!q(W!eH zXJn-Q8u2lt)11>dy8h<}vqY9aY)nqGt4H;~SZayv|K3CBE1#_@6O)4*MQf-U41j3eVRWNk>zDFay(?V zKd?E{vfR_a7VS^h9FDZ4`9c7#5*}4kW1plHhOUX}&*CkYzjo(nR9)h83sO0|?zu9i zY0NpMX8xwDu^PEJL3U#}c%IXN4MtpCpg8^iZtfY_M*WHCpLf>gyX)cgJk8h~%=_%F zcugT8ENN>Mb+ZIF#n>%cj-!MEsWUaavh66$qEtM4eAk2wAg?;40n1CpCMVn$a zSN`OY!D<;^vh|JH@&4DTH(FdVLAcUTl2wqN)Ek z_RqfyjjfTfK=)L(G487}g9(#3(NA*&Qqx`~?};yh&!8t>qPNfv zk0%`8{l#~jyp5h2VNYZ+iq)t|4gAHe#WI(4f}Lnn>vOd6du(2c)`qUZ$W2Y7e8@>> z1)AR8x7pW)!*_IaRum^4rIpJ9oyqy&aeo6RD~K*a^$U;|>VNyZ1Qy)6uUEOFHBZF#%7UpkLk6%ECfeB8 z+>PW_5Vps$1a>cKyYn|r=v6s9y-%UnR5#s}5qtk9>cQdv`2NowhJry}P>(m`wx=>T z1>^iGWCQznqD8Pn)`@#wz&{TB5ksb)=_bUuE-c{zf&CM)ydVfmN839s&^@}gZi7Nb zE7982>_L4xJZ6B>ip-{xjLa6u#E@|>i&@Q(M=wg)um&Uf?KKV87}lDO9IG@6wxv(0 zJX)c)}$cVfZU2cluC6gl4Q_n*Ri)yz-FbO*1it45WAD;g0|(5Cgh*gO~W#JmPwZ>9Y)5S zNeTe>`{XIakw$A=$~cj?=mX9 zqp7d27qy;X%*VM{uAcmTd^chL&iH>ylz-3)S6nd zW5b0K@;~&X%Inc6rZ8)DI%h#lIhEMHK^J_k2Xj_atN9=FTRI-t;DQg6!ggcL%)?uZ zE!d5jP`U)ic5cwJ5mHk#j7%QBo{MEv4#Aw8WsLHcr=}N@tXe?VzdR`F>jO>(60>NK zD^VSL)?qgXj?fB%q7p$?9(jN-`S7i!=l44C>kknMQ}P zTH^%pik<#yfmlp@7-QY#$9#joQc=G|Jx8UE&Z#dy^BFd0w2{dVAc2?nZHwVA%h17u z(G*r2&)CFK`zg3$w!e;;{X?Yt7lq>3AwF*|{Gh_q%JwvDw*EhH_EQEq-%MowC#^u+ zQ6eZEz{KI?rlFp4p+xW2G&atgE117rJeal?315u@ zMk%8ZSj9!sev6a)ZiPEafzF!HpoPle7_OE6U^Sq!|B1+JGv=xn^p0#Mb|FfMV!Y3? zfKWsI6!42nYB!XNfebz>DtUQH=SSE%+k|Iu*h0EfYt(76$h50&6f@W&>Cp3RpP1vw zEk-3)6Qz`8wXGFs_(LyC3Ktd@z~mN}7XxiWmrmwPR3T4DTD$~D zd=R9fd94G>o~of`PO08mYKIa<rd1Ry#0T9{$CL<_RpSrLj#jL)iTv|=x2|a_AA5G zv`#I7j0Aao2vimYT)-y4$(u!Kb$Wn2OcBYVBt{S2M$v%UJd-`pi;Y?<)Xits{# zlrbrbR)G2~{0eEIYFC}VDSmw7Vlz}pb>TF_ra>((I)6va@r(_zq*=i$;PdS8BTY0l`VW8&XAF)5WY!b&y7#e26qSuqon z@&~6P9FBcS%wIhk;9be0@@HZ1)^(uiCIZYn_LEn!W}{LaB_N>cFq%zcxI=q(D|KwG zzK+8x1AzMQ+nGbHD3Sk$JbE`igTD>CZU`Wbprf^>6*Ua|in-`|?4pIu8j%ROc}tx%W@F2K_2%oI-!TLA z{q)>MGO$+l=C*&$iN&Hae7EKD(XiIfZt&jbYdb*>nPd!;qLgjB67rlMXMmZ*y1~x` zvg5(AI3=S2VC(VTYNmSA-e~3P(=10ou0A#EQCA|R8NPXj!8j;kWS%+NIGzlrOmsOi zv6WCLq4CfQA#Hsm3C|JK7RStb_N*I&)S+u)_`mzYyA}A5r$ z_-uK1mBYv^u%LqfCN#Hb%kQgb&1z3w11R*8?b_qJgskD0MZtgj5dW zUG~DiTnL4KHISsh8c9%_wDqmHHyfcFlbg?RAKAvY_Mg1t2L|J|S|Ao6WMl%0S~qeD z+$C7`k|b9F+=!ozl3PTK&~(BBeWYQ;=QOrKZMO(`RGTNW=SS}>8^LD(u|aB*cO z`BW#YkFYN;8v2_Ns2v%QV8r8i{(hTX&Wp-M<|fbqM{KUJd$mvm6Wg5^X8gj@@WHD7 z3}*A5uljHyQ60Yq@?(!j)#OL z*Ny8u7^J{L>!^IyQH^bj;+nj-Fg`iYfbpUF$TAabY6BUmF{DW5ct$|CcY7=&Ex@!8 zgP${ReTAtas_Wb><7i|h@m@J3N}-jInN{W*tj7-KVVcC+trxwf9TC}A~M=({O*?VV=M?~2W_a0-vDO}H|yr671S8nA}%3BH)`C=cs@ zB|6;owtWur!0-oM&6O(eY}*`$ZVxP5A8&C(;D_$wAKvu^aJeCEVShTr!h#n66um{q zSn@*TKRDl(3Tx2i{=V;}`)T6fq@k^m{8RC-Mllhlq^caKg^cr!t#u3AshH0hSqeSa zp9Dee-7g_n)w(YYUt69Y7RKVu1vrN-ToueXnRxf~*Sa4Yk>B6!Io(?91VB%o6hma# z@NjgH6-(Ki>!umDpA}y9ySoO>yH|uH;iX7^Jjovo_6N`aD}q$U)g!opI|JQRE@BJTL>MtRxwGP3kK;okifhAm=@JZ!INv66jRLF$|rpaHzlJP<9Kl z=X<_&33@Ct$vx(K+Ouy7l?va~TLs&d=HUX(i|Ujb3nbVE=gaW4S)I1BVOT4N2Aj~k z$lWjQUc2|`a#B$+7Z_TVM-$^Wq6*XPXkl%QAuGk-tOm|{6~aIlTz*(6ho-QxhHziD)2|XG$Q`YBNle zr>p&0*K##nZl1w?ieIz*UTl+;iC=g#j9 zPsa8BotijRQqATs#S!srYU5A0hiTc_W-bkVjn?B8RaIzE5H8_Sy>+ZNRyEm5QcPQI zXp!eI5**+Y5iSr$iW&@-7p{+6SjCRSdh{7Cxm|TMxPgco9u_|iBEU~8`+0JY%#$Uz zxK4v?!q3ky+lp_1WQm_Ku;WF8^_P>}!fh8legKSq4$uEn6*SI-Rov?ng39`IzIIq*w(6eimLH;1RPj?Gv>`=cQmCOC1=5GX+#u2<01F zHhxkf&nS2vE~;09wz9F$f)+U6Cl+1JZWJ?!#ZzRPj!1xq3cLFP35TDGuO7R;s#bWL zt|vol4N+g&CoPF9gr?n4TwVq>T_o1_r<%D)qbY4v5gr_?MeJ=n873OVzKA!g|Jp6+ zEProhJr)%W&-mLvn`9?=rrZ?<$2zs$tCY;eQOR&f5yGz19^(?s+LpGy3#|(;KA214weKVuMCZE-V?O^mjd4ViOQN;ae|R{2~qSLYeoy#sB03 zw*fY)v742h6*OD@+HL($9p~*=pfJ`U42BJss+{0vE9&QNfB_cOj|(Rk_0y!Lmm)+9 z2>Db}#>q=i;xv$(gRWLl(TOcy=lGRo6LS+#_WbW69UeQLgfByfSK|x`%CH(OT9lSC zH(UHMS9xDvWe+GX2en`;>Cu86$XtLE^Ut{ByDRl4~5`^K(@i9oTM1za!;rnI?UM&T1UPbav5aZG1p7m4w5oswqn+%Q3s zKnTk?1iEy$lF=g#Xh8=@9m#w^qN{SCu-mHPj0P>*ubS2Fr_uYFyPYvqjSQLs4o=P& z3@y!KvSG&um(aR}J4k9+p-(Qmn@cX;T9sm7p@IyTTt7#`_jBw!{UvuHiv}o4eX<&E z_1E*mO@Prs>1P5rUBglgMJH+=nF51k1hi-MPErjS%mT?21R@vgKwC`lW)5$_G94KB zk_lJ)W*-D^`&!>^&~OG8r=QF5UL%+;w?O3a+APrBt!&?ZttP%il}suX)F>t@N!qld z(2%b%;3!i8{BG@%AIy%K!Gb8P;SlsyKmk?CL|tD4uJS+zEkg5{i9AFw-S#7=(+#`M z_b`AQKrNawfUQ^eDY3Cdt#Bwk9&WgZ3?myl@JB+lZnd-%_V)z4@v+P!xqhoOKO-~u z1Z)L_F}fjDceGE!cPrDzo^3^8YrYYQ>$oRoTuh9eEOJY|TEKAhpxvG!9^}nDasY#F zOAmYJpZ3BhiHF}Gx*NuB^}Vt=twX1$Wuv3y>oB<3x)7vjvbN<|_Yy5mLWq;mUTdmnag%GqYI;zNi z8;G<%j1pbqgbT6Z)!jsx}w5GB?*w_i$Nt z?BIC*O39#UeW4r{@ok}gD8j9#xAiicYoQ}ufdLu{jNpTF@P^%&Oe~MB66S_1#h8hs zB2l{WzxafJ+*I#lyWi4-qne8$7PwrqWHxrPw84%68HAP_3(0;;{P`EM5TnIk-fx-( z^~r&=Fw|hzCxhC)2e+Da_tDUt^)qU1)&3+RW6f7+;yv(wmP}3l$P6HKYvH5UzZ8^a_6#Wn!a8^bc_bVxucjk z^h3%1>j>E53ZCcKe(&D?`GQ}qg^LCdesp>eUd^l{_n91TtF_C`cP^XPTmcaL_AsN60@gz z-TG=v0v}FsDvnqSQgZ#`L+7(Gm`O2`+&6zz%~|!fZ!gg1Vs%X9eY)v=ZHyR`<8n4b zBb2!n!G@U-kewHgies8AdVtwV?bP-qfs}ts+PApQmx`O2ue^|EB@J zgzENa^gmgvTUTCCX2DE04zAWoW@w5&i>L<|t@S^Bw-LFZ@X<)!eIb}_2|p&Q9rzwB zsY8n!4Uj|T$|rbO2nsOqspFzWG-+tY@&d`5lH*ml;DqT=lgm_oXOGcz5(N>f-Xqi~ z-5n^4G3atYYGDUqB(@XjMfoSQAB$JY=&r5{Vn70#hg~l{|8h!JU|7oV$F<(htTK36 zC7m1B8)nC|P+uly3l~~pk~`{za$SWHG=mf+5Pk`h;`heE7IQsZaFQm8HXz#s#G)M| z&IJkMLX;OTdXqrslf@RWoEOLjA~(a60EH3^RAky~B~AyOB_O_;XU=TDP)!Q>BT%%z z{<|CE!494nHAAE^XS8aX=FW_Cw^xAw_kXT%nv0bZgf z?3k_>fT(0b1S{m6MQDJWxS=Fmn`RQYK36i8DG&ho zCJXO%B%8PTW{jj>r6WwuDZ9U>S_wWiv4h({C8F5H#7i8BvrlA_OdRA9pTJpbHn*+g znGuB-E*hdScmcPPzUvYc_B(@`F@uxBc^aaKOk4YWgE?&s5P8p1IPR7SP&VJ&efX_I zQ7mJ)=c!lyDpwM?kS06jPdd)qAZ*?`8hl1 z?F`CP43w9(++k(a!v2aI4IPWGb{w^{{gN-gQES_3QeBo>YDAZ8 zcGN>=g{RdrCK0VCBtxegOjV+K+X!D8q|Ga%qmAbnrivGgBF9rOTZc2Ch_A-*%Pjt| zsZHNg44vc+-y7t$>X_G+aCvW`yM8CsJT}5(fO8V3!bYU9~mH`$f2P z&Q=Tb0c7`(ru|Jtwjl^>*L)zH-xq6O`puGlbdIc8=K_`Ig(LmUx`A3VHan(LjoX6U z?rW|zM4zhz4MP{?{IS2>cl+As5tfZSWf_8(Pj=@^8;c$P8bGhHfF}eT#P*rzrq~-* z&iiqL$fNCUg_e2j(P&XoQM} zRGZDH$MNVXNTkEhbceeGCii#;at&DEZfF(T1kiHH@yQv<8gws_a$31+E#No#z$4JD z|7(%xkKgvRpUyTjg^LeL%z)vHRk4KP}nUXf9uOb;lh|^M&)!t_*5|OF*0leteUs ze;_ZAOYg&@cEM@?$$1WIp=I_u)s0WZu4aOlaQfJ_itlGYzr7FonB&V(d}FfoCimdM zAp6GIeC#@~E0)Wy#~aOYdkpt91uIR!%|l#2UBh{&_E6Dq!h`zlh~(>Ik>Wu@nDsb8 z{v?H)o%^@n(MBhXx~3b~j<(M_96YLb#f4)Vi&K|!IFQ!Y_(aDZ&EDtIA`7OBy$f3L z4=}mRA$T zVKj^}yn6uScNLyaFejUb=I*i5e2Kq%yoAQ<{cC8lmGn=e8oC24#E?6krk-R1Q`d;O zD9dQO6b>JNP|q5wq1hQyPScPPZ$;e`2eDI6+qUQkeAQEADM@z}K~ zosyY#DHdKrCVBOCSH$299L1ZFDstMG_`NAT8e2J)$WqEvSguqTB3I%}tLr5_g7@5? z$g=D@B9VqifFAf#^k(yu(L|HSatVdTr~W#!X`c2t<_q^oc>Y3F#1J{@vfs%1_bYL9xO=3GyZ2BA-ji9~|u&^6u;S@9qTI+x1 zy)-=;LE4bO*|*0#S1K9qBWBE0m-%@Kl|_YRr&lq2rZ^NPNU! z+L+opU*P;y=g8hRpry!A1-3$8xA=X}vsm}bvFkkFf{{xU23p>;z91lBD{O9*@pwql zG5F-=qkIjIjMpB*aPB~>{?EZ2*Dr4fpf00j8Rz4F}u`JO_$ol-W2%rfuczddp~?Y-|yl znaN&LgRLe4t{A!(T6Jf0-zY0)HELdhtPwSnVN|`EQEB$pLf6nz7SRu`pAGH*-dNH8 z*;q;K3pb^5H#4~92|bhKnsiIquEmzZCD5cRdEg}y6PQ@pr3;pOjyM49SR`AeCE3DK zzfRjk6-5iCdmQn>^c-awBpSM^(7D`;Hp?$mY<2p^HdAk=)i>_mldLfEo?K%jaz=ej z9ot@=DQdU+FpxmL`e3(l*V?l*MIF6V$IU~7NdqAF2`mI4~ercdVH*bjjh zYyHB9U~{hLz%O4DKV!;e?$2?`u@E3$C|>fm%}aZCnziX<;H2`3y&Zo^ zXW(TvpyJ7y=syrlv&Hk8nP1z_zS#xm5{l`jl;Z`S6cYK95vyrmVKEF>Rl8hfC} z5Jx<+{IfqhXe)vXXn4;?q4#~yzgKIgi0_qU)CRnrPR$$xlA#)*mQ4U_rlA5gf+8)% z9^pn7F??%1?`u;`OiV|gFUCr$At%1Qb(lL`$E~!cU8~fiq|Z_N=R8F?ku0jfg>({#?`pDY&QVC*JKN~x{2cv$IllWeY{?%DGqLwP@d~}`RqIJ6xpPESIqSFCEM z9%KbLnVS>Z%Zf$=Bpv$-4Matx-trO*k4A$iGiDS^1MH_>PKPP^&Xj9oR_v_5mJJg5 zu?H&%^}`p(1n5l}4b2?bSy`u*x6x|c@AB^y^YUlAeTUtn%Qb@#&7!d{n=k2x){%QN zs?p~e!|+mke%E|cuMa8VmAyY|^xN=VKOc1X8-!h3^-)yu_Tdq7%WV;EJzZuV%KPre zNW`b&#)qo(pfVaP;P`gV&(Ku4c%JHlSn8SvN-uQ|*3@&v#Ze&wUW&$j<{gLH??N5C zE9NaTzxGg&B-}cCU%eY=YIXHR>iZ;LdY^y=%46$-VYARcp5MlzQv^Us6FA!eii_ro zaDUzp)R(zD(@NdfM3~qkB#}u4+BtkAP!#XsZbYQe?my7G!PLAOF`=w4Bm!G<4RM7&=d)%AK<&t=-&X2{6 zIsDMEIZ=;?{aK^aR`d=2f)|I^bzw$rnK`jG@~G(9r`#ZAJVRyNWSJiK4Cw(~Xv_G> z9Eu{*1q{r4LFbF+58tcuDepY6rb!p28>EpT^YUXoCOOoMV{BLd#F`L_&();gh8}ZF z_tjI$hhquBSon#Av5{|A)8=jPF4bPY{XsVBD6eIX*G0Q}c1OA1$5IL5hugdg2!X`s z7Oo%4(hewr+Ov0pnes7CAsw1?(8GKA+5E0)q57W$(zOW=t?JKf70-J^V-1#%p9^}e zzQSV)#dA?_=gy>(>`VC*ai#Lh<+Q=umYW)YJP1p#J7oFxkgZ5q$mM2AeuKd=@>t;E z!;-!K=7oTFQ44_;PzVVPvR{S%Z?y)F+K`>=I&yod_5+PEc6i<5!}_1bMS=brJd*kh z+8JV@CM?Y+tmS$vgrtd6tjmr=5ogMeyLLe${&zlhWO7EJw&4!b+ooq=&5!{)(80a9 zc(ax<`LC8s{8ljTuzPK^)F_s5`&iK0t|nYi_j!mB`Z{}}{-*IL)T;C&%@m}9b<>DM-LQQa5bfE;yeOsa59ZU zVT>9m89I;Sw|q}?+-U0C*yAp6jdH@d&;`*Vw8sixXz*Wp`di8dS}C)8JJrl9(sF@@ zojcb(p@gQ-B^Q2}i@wT|jcAnf@$G)Evf5hSkIVAD=}yMT)mq!YkKLHIL}{>}}!$DnXP9qXl+&mA+(1US!`@o!jM6g=s7 zPa03cyrJlSm4={>V{1gi1#J`gD9^Id)sg;IS^Et)c`?`|(4 zh6?o1m5pbu_`I+gSGc>&KvN@fGD~a@WbJ zQ!lVNAX7$M9eHhwD~U&NOnr<;v}`Z}Pw&thml~bx|c6G?jz}E^ZT=NZmiE-WnQymF1j1K+)qGT>b zxKZjVxL(mOO{`o0>=M4to9Nd_GjYv;aS>GCpX~b+wzp_avi}i$e;_=P7mC?4&4EtV>hamuR#Y)mS)+EFT$Olzco`F_)Y^G0Ie~Um7B`M*C+t@rt2i zBCxUFu15p!pT5|_voDk-DOAS3;3|8BQVb4B({`suvH8}{FPWUrQH(~2plK7nUlUPi z>Fn;HPu-q{C*b1=PAqvNyRQH=7d_nDhwqGUqD0cQe8f3}WeazERgl?v5R*PtB1>Wb ztRd!O@cUyhF81j$gLC(}z&Pl?*fwyOxBJIGKSC>$l)G6AC}oeJ{#-^Xc(?dGoV-6G z%HMSg!5i$aCrB*1X4MS5Hv^T{)n5+wR{h>v$Gbs9**ZE}uS-Kin84&nRA#BRhbsNo z!K*oK}6DpzvEP{1aKs&R6wVjv~r!-g~gWJ(2XFKKz`MKt#i9? z(A2jyhOtpNWM(kN`fGL)$9qQU*u)SRLu9&vT&i7QQZG%CR7xUFw2(U5)GB|Ek(C3e zJp(*rTUafWDM7#2v5Yblf8H~MaSUj$PSk z`@Zh2m$;$fzZo;gk0GInapvpbtTo~Ns>gC<)iHE^Yhmd>Vego7Qy)G%2yyAOZ3hk; zp2D88+dSQ~sdejL&sV?yADYf8s?COL+J)lo?gV#tcQ5Yl?(XjH#R>!{?rz21-Q5cm zclh(X-};YolC^S@J9}r(%rz+sJzWpTyk)gf&MU-ty{0&v@yD{8#>bb)$+?1&20EsH zce%TczD*c3yEU^1XH~Fr zT>j!R?Ri;T@H^V{E`6N2q%Jl`h#yj*9a|*s{nyXry<*VzI+vcAF(dfuxqTzVaDMz% z#?|s@+Szy4&;xZZD&K_L=x3jIX4(j2jQmZSp^I65i+sRB+SNAx=4_XWN&l6r*Zmxs zNr9sCx3nRws3t01o`oTJRl-~zl%h9ASjY4n4gW}SSNm{#t-jH5d>O8Q(|gNu{r`58 zg8z0CGAP)rKKsxM#~ra%k$rNrIErDN1qut5?*cJo{GNQ|^OKW;85t{mSGOv*GQIR` z5HyJ3;VN)P_r0f&*Qu!N z+Is0Lp@lj68{7#CMuYj877FVnHooP|YAeNHARNn9D z_pb|BK40~|e8=kNyh}(_LzCkgPHL{Yz!@iEOC+*<{Pb2-RDXWG4*b5Lb293S%-S44 zoZ0(4B_M-A>ga%=oikihj}_L~3Pwrbu1lTGQ5hX)u|Ef$9r)Dkrh`vCGD4X#VJI-g zC3pwu;p|d};l&d^e?J8~w^? z;J3)Cno+1$wL(uw3?a?uFN4s)DKMm=F&FEcp%*ChZ|g*jijc-@e^vKc)F|jnAWEjP zYv2-PO^J4fTXW4}nZW8u$2Duw_v4trCv$}H7FMTTakjOs8DFH%fV~siGMxYA$*q** z&X;-{MU>@mefZ(KkWc*^cz>$O$k(dI#O|DV%>vFXz%lJs^8TiF0V|S5b#n` zw&(F3R?uZ<;LFQnCpog1{3b^-q<&|;uG;$|i_5(qD!#7I?8n7*eTzktciOrDX+Kz% z-`nfU*Yol5$`p%`^z}gH440O!SHvLCOUA3ueRc2qGW>{1^}-YT*W*yqId@1x*}wHO z4($0pn#5A^^+(L%XQY0uFixYtL9bFjFp(Zg6qaY0*gEK3_5Sa-9jkVRE3S8VRYAn{ zEm`MI6bA*1RD~-ejy~w}Ii+Ox73}C%(jp^x1YKKrH(-Dt-Y$phwRssJBTDn{#=k(L zG8`oYAmbyO{oW2W!_yQlYi#!#k_=gpuF`)2@U@o|r*=0rEM!HXHDfiiCy@L`UE)Ll zE%0y1JW{0fVc^YfS+Xq=OPNebfrm+?{WIK{`N; z9i2ii8+MHThN_2WVTJ+o5-n24do#NYK2S@TO0lD`t6Gr>E7Bk=?rsr98);iULnU3- zA**)QCzirH*JNUO>Vx+B@=8}t%mcXahN&yeV9Z0g0AiXs<8=>y7arI{H~7-d{lchC zw=8SPNUw{}t#TPj6bwNCy0pS^n;}jZ3Mq8W zntT$DaQ~~5>TaJd$z+^k#>>NjU_SO*Ogj6T-YCpvfx@TQr5;rHB>u|(131;l+v@qY z`dh(_fzv^mHa>XnbQ(+eXNwMu{OaZ%1}_Zrfhl*s90`R6+`N)thA@7LIJyL>Lvf!) z_jGpKP*FmAC%Ou}-@3EBxpjQ~Eez;(^FkMEr=) z=kA`(E{|^@^@Qn%w%*}1wTYcSx^hJlHn8|QB88jxdp~0_QVx57 zI0h>Rnv*y%|4b{?@KT^@gSXUqkJVDCcXUJO{WP$7nZ544Zup~$K3p|bHC3;>t-Yf5tj=j{^4y|3)T8yb30V%ySSb__#TbpWrEVZweeO;w4 z-!qS9dzD^K3`eanuEzhq!XCdsw{?oY5?c)d#eVA3sNw=-=BGT;%F!E45z4=LUGts+g)C&& zk5`~0%GC^D8F#E-;yt-hX_`iwL)WT<#s*yHuzkRZNkcMUgo53HWe=_ zr-fdDpSLm~L(Gsh`7un^MA6kUc&4QPXRE?>hbbWJ>2voxyC$cW&m%z(3QeI2Le^Cq zDj9_)FY4p}QriHztG6B{i=N`E9$%jh--J9<&&Oc{ZY*dCG%^u%euP*cb!t-;OsrcJ zC8mg>aX5tzl5Qkn%I`YNln@Ms;3gRqtzd9iMkKUvPv7cdyIJ_2<`xzfJUzD_Y9{ZA zYb!u3-VRF-PicCbhxpUe3Lnj$Do?e5ou{`C9=PO(pvP|U3$-a@2I=U3dM3uOO~Zq* z+V(dtHe3@M-zyP0WB!CV5msS9uyz}I)l1@rj&4^0WH&55!;y4N%ZEsFD2+e+#L^O! zR5$c2ZO>@w4BIE=40)$$_+47F&B2mTQ?zZZ^9(I6Zh4tL0%!hdTXUm{6L2~8PSz1X z+fkr4w#m0M_IG~w##SM_J*#uCZPBr{))t$>6W>77NmG0!3>c|4j`8-gZ^HNUY z9gp0NEvxJjq!GD>%g|>48-`0(b`Hn)wEuE3B>G$Zv@87MDBu~6d`u`CEet23V*AhX z!ZxnP{`Qpo$@#B;@gT>*5!Z^g7D9Q(?P#+P2+6jA&P!>np6m=yN*H!wT7;!KKEM%^ zd;45hV9Cb3=Z+5U7BI89_2D^WV`;{jP*abm>O+;cXvESXLQ`> z!vhp$+4VwMBB)oVC<-*kE<9vo;90ZvI^$Y}ZRLu{3EDelGe`)XtnHnEiR4>uMBj0O z6Q=S9WqOBxV}FcieEgOExHxZRdqDFE9nJroc_i2Jsg?;HO%LExaa6Al$kFSqE)Nwc zK(vu_4BSj1!QW>hSPqcQdx@uu{LNMGI9HdNj#iE+SMWjmC>d&G96bs`9KlOy@DTj- zTfeE+zwIApG1aJ3MqK?ov<2Yj3|3- z-V4rYr6y#77h6Y=GJtF>t6KZa(zWT!D$RHl5O?)P>#_tpaR?8_#4GAoe1%t|A%3;>a*`9t09k_m^3)i!&YR(I9y1y9CpYOVn z+?MkUVrAz=c*wSDG97mS>nkT<8D#;hI^k`~N(@Swfbkj9ZURmu7UTHKUy4AE_9Jit zq4B??IOymSpX*9ryN($vMId3!81u*%zFosXSw+Ls`f>o+%@& z6YK+F+WaJvlz7*ZJd%mis=T|VKkK}C_u6CCt2j4JG4tJgA6vH!a-i0SjRh!DS+(OZ z=+BZ~N)VAaAY_1AkGE zI}oRf1DuqMV8j~vb)&)F*k?H}g&tg@aSfm->bFCcI_7pM`z`;(trfqO{Ux{0T~AVK z81$G<#oNb0(Li7YbAV&OV2EyatjDW>6b#r9qaD`Sz~obee|#Ui9gH;>+i6E_#3EE- z-;ynah4CUbTQbY|IDIo}D&_^wHm}ScC(P z`XVb%Jr1`_?$;@`@t9;2!Pw*&`sftiQTl}%^JMP{Q4AFl8l$>(w_C)~@9-3&a3a3+ zB((P}%+My3s-z#c{KLdN;G#ctw-1-fW|++(4qPI$KsKrrGTS+=22oG~W62YSjj{Lz z!GJ=TOJ}RlW7zp+J5g}By!S=<7Frgjth+|b_56WC@QF!qV5stff0z5vk?oJ0(&>FL z*!L=X_u_WcW}}MH??NwNppQaI0K~D=?X-!-==LZcR%GQH!I=oR`I1 ziS4rwO3{)kRIlJnwkI1>PI)2{93OB^g&>nO7dS-BTpn`&tCQ_zpPFqkn3&gA@OsXB z!Ii;nBG94`OHhKQP+eZF$ z7>PJCq2~1}HfWb*o~nrMLXFM#u>be?IY+Vp%(o?0XKvlfW-Ikh&3a%+sncaaL&>I@ zSGH6ZZNwQQYIny$(yb51eOsp}ml=zsj_J6#_pj}&Rvh}}a2&nNonWWww63rGyEi_x ziaZoWLOHWZ`t35ob3<2hWO<1+CQSw4Z`}HE=lOZ<1Gkmmn)=GN{C!tl-TiAboGOc&~7$F}`r zd4C|XK5sRK9r0RzU0Sa3HvWlVj>Fxc>5;-z7_yQi$~yYD^MZpN zaH6Yc&@)L+?3+RrcoT_|FRs(KW;o&ccsIiwLPk8iTd}y#w!5Bdq}{?oMZ_=eV1hw7 zMBm*pdcK56lum@-|KkQCxH8H=Q;%`t^bkjt&2(~lTKQ)lkXgToSx0=o;o()?;I(-t zf*Opzq!Y>M+|eI-Xl+h^Lp^`skUY}++4TD4EbtD4O-6co>MBRu72ojwj~A9b!-R8` zuUicCXBjc65SL7)h6okvTJDH{fmc@h8BNdUOkm~|iP`W3a8M_Wq(K0fv5|?r2-nHU zf=`7)W&gIgu>~ERpmX-i7v(h{Lz*cEY1AFz5^cpxo8Sm_k;@uqDoQ2F!`F=fXxyU` ztcF7sD*THTQb!~Ye+n+4#miaLBvhF&i~s>4ejV{V0BpxOx}VY$KCyaE885lSzyaka z)(S0$1$M@b+q$GC%r?~>f3Nypvn6NSSG4mX#3Yx%vY~+)OU7@z=wx}8YKWzt)-`S; z8rbqfKUt-Gv-h!1ZJ$?)6gv1pk)Q>Gs_&3__dx2$J-4dn$q^M&5)@T(;03EI&KuCc92x60TLd z><e^(Aq?FPP>&f4*h$dq=&SMgJ8?6)NZ(>yTa%X#+R2d4j{|0M=6bpwm;wbC81f zJ$=pkA0o#gf2sf`h5WMqBv(b>s)-)f+b^Rm@8U#6t6Gr1iY!YgrT4j zwmQhI{nB01zecy!s&d$s83L-X$Cdt4dx|VxVu>b~0g|S`Cfi0;m#7<-VK#Nh*4b5$ z$!j?6`krVryvTPuVTKP;qDFJr$;Yws@D03O=ai~Z-@ae0Xd#GEj>MeCvsU;khG`RD z{E4kp*Dwre_b$*#`GL<+m=nQJ>Fkcqlni6~2Qaui8$%ABZLGWW16rST!Mg@lZo3qs z5(SM)cW}@^_k}zPUzb}82~(;ZcPjmy_h8(ZR!Ff3owl0RTS#h|>F-(rXS6Vk*@gu} z^Cj)E4=GAqB>`91pvbQ}X_8<*(QzDG=`?9|r6Q?xirjpd!h0=bu9`wg{r9nfT^<3r z@@c!v%?{(z$^YB>hW@wpv8`S;+ijjb;G1^5&=STaBs8?QhhtRePQR1}m!|9Erz+B` z{M0WAiDv=9MM2F`Dzf}copP6Rl{Tl%Pgd2Qm)F0*UJOFFnGqHmHuR%kJUyH?aeqD0 zniGtGd8D$oHZj$Ud5J4G+3NJFK&^99aw!;}QsIiPd?uwBcY9E8++ny2saVv)$$kJQ z18B2FE&?k3H+&s7YZ^*gg&rFz9#ZLA`TT$Iy>0LhcEYc7_ms2GqmJvgnQ7U=)>jRa zy5|9@(omjdS@xdeq|IFthIWrV0>&XRmV>kS6UJ-jv=ETx0hM#Y1g{CaO4kd^LeUfgLY_%lvhGhnSm}MURp_BysXS2- z^}~~Ey8EVg>HNZFzxb))c50>EQhykwQ#M=IR(k=pcznpw@~_s)8Bxr2lTVr(t2C1s zkKMd9*)R(CvRh*m?^FCojY4*^^)Vb#^Chb`c{ZG_G`z;D8Y&yF$mb}52_TXBXkOM> zG-z3T2@2nmsm|R#`4=wp=e>7Uwuvlw03M?qn5SLb<{XV80lv9Kk95=FZG9wB5jUG? zwe~TnWDjiY91E)L;y~!naKE~VZML)Q7%|H2UZz1R0`nST)C-h|c^7&{mEZK=DpNhE`#b zYo+YpEetN2#PBTtT#6yZhfz$=_$k{>%Nek$$XVupIrUKjdrI=}Mxl%di@YGYvWKDn z5mcS>35wgyH4MmSlm2(b;EN%pxnmT)-o2c$C0W50_Za`-nMUhemHiXX)U;T<5)%dD zC%1#UJqurP2BA8roP0}VWqhq#^0!7MDBcW0Mu9dr>r&Z`V~i2On#v>))r;@X({n&Kmd!tc!Y=C~KH1ZK579ad; zX?RX$>yS>f@a6O4EyC-mKVo==(>Z7Z>6Jr^(|yo_ps>2I3c{FiDyUw$-(}TIm6lS! z0Ci`mMbxf49qQP^Z=BbH0d78BCR&wtcAQsUORQ;$B-*5gW}wP#jDoVcu1(R09yYnh zp;uG5Mc{W;20nMs%;+EtGEq)H(~8_Hx2tMTT~Rs==eieRQ$9Ie8g1G10X0Dd6RJOR3tO5c(I^2}{g3`-UD`*#SiZ}^ z+cHeWvj#6eOMhr}yyyVII-_Q3p06?#dwKjp%_!Sqf0n-B=j?gb7LxN8Qp=P@g;sYfB@=8zXhq9tO(EcvJ73{LvrD z`sc!qU2B?(Qs2}RYlV^xzC;d9jmdwzMqpr?GHK;gTUE7Eo_29cGS#}~0Zo-xM9)ab|3?D7AZ>7O`~F126b zpka@;=*$XvI!2=6@bk!|#KFYDeiLj^2a~ohe(`{_1dqDUo}uZ(NQ(__cuW6xQ$P{h#6^(F<_nwtcAvM3^QfwLue3As=t2kd zW+^xSy<}rtJv8x*W6K@z&S>C$1OlIu!xZ&xSY@gxuIKNw!>qc&hH@u3=eq6I)z^zO zu9?}{#hKJcp~P6Q8JPhRS(3&M>#R|e9(T2y$D$V1X2(>{B93%o)4*5UJJq9GT3czb zVgX}UkB?85QbTjK!sn|MP0RK!A|9~GTi@@t#Dh?*IjDA?q7Sn47{zdgI~#mdnh`)Q zdi|YWEr?{hRn4H}aplq}8gbsZa{19DMNCo7Uqe27g|}u^)C!$yk223!vgV3QN);c& zCv>J(Tf_Clv@^}=zwQLrWx}}P`EIjsc@L>fAL4S34<#ScKSl2Tt~>^G;e-Ej>s6yj=5 zTkY*l7%nC;U)1bwa0+UPNoZy~9)GcQ1@$PNJ#!?)K@-RJ98khijMY*vVXod7a@>|< zE+$PGJ`k7LH-@EbkYNXEAgpii3>Mw@@s`Y($YtR<#}?&u<>=}XZ4dcf3i}h)7(?Zo zO}`6yK}sbD~S1d5iumJiQv&rPJXh6aowU+DOuuryk4(7`c^y_}Z&6-jzCW(z3q z2*QIB7Z~lw$HE*HZX)m^IlaFJB{Z!{3WJ5Gops#Wx{pfCMmgm7LOU-@BqT65M8tGBlBq6+7`W_bO=<~SLRtQ^YFg>h(u!VHSW$p?C@nH5pLI`gaI!tMRF^H7Fnghfl9}`mKcF!kNSN+Rq>)&iS9EN6;SkxjnKhRVNMxz z^9~@~&sc}auGx>rX^#M<)P!j&;#xNL{i4L6LJM?H@)NQO3)BMuz!a=x4(-{q@pX*XPNR)- zH%gt_wsVUAdC=NPb>T1;ZN~zTAb;Ff$7Ii1+&izfGOZn z+u;4(c9VjzLDtwbJ{{_e*Gx(>dqd}7asnPB@OlPENDbJqxO>EuU!q;x_oI_G8fypt`ASRloy+?4g)rW<}VcOnxCwt1Uh7@FS>LAPRa zdVMAu?tTj~+1Xuh`N>{eZBpGQMi$m58w`8kkuiA*Qf(kB$@kMQ07r<+{aDSvhQhAN z(n75@e&<%tyAf7NKZuXL+_iZZq-2(8;S{>LUH@u0yFkE(iV!!Yz1XrxRW(?k#+4Hm56Gs`ck|P$OWx&y<%ld#Q2?2IL z;ZfuqY;)ao3T(TgXgMPeDs3|cY%m6RE#;V&2x??effN$SH{De4Qo(o|AwU}7Dzkmgz;RTU(`0_ z#c8p|iZ;QfX)M+W?jFr@d&yhr{vuUh1c7Wo2a2J6>iiR9ghA&JmXWnsW`}~Q@T*qfqXQP?sfzFH9Ch`7m>oTS& z2y{mT%AeecKunQz&Xbf(>XMo}tn@Syi!>CNTP0On^#*N=EI?IPdcJ+w&PbVNL+=oNsrWL`<=mqpER({9f(wZW(EFHe;GL`XR1oY34J6; zbJ0rFSv-J9ol)^~OX$yybh(~Z8w4>F0ZatOi$3VDJ!)W(53t{+Z0lCHs)9d zY$sed(gmB_M_Y@NW107RSug~pTjUnwf8mz&?d}b!V=-16SDTB!Ji~+)*NH^A6OPNR z;Ibt-4!^IdGNJM!A)4Z_K*8#D`@~mj){<6Hl=; zIQSi~*7{$W<4u@fspHCejC27u`JPlqOh$8gr?=u^^IvXl&AO_-`jq?*uLb<>pChZ% z?l|YK+dtPidTw7wLI8?+S8cuC>1OU-V5a%{jS64JiBXOS-oFc; za@w&{V*Fg~-D{iXP zr~9YZO=4IjFnu4G@u*qj@4c5~4ME^003him=)b9>lo{{{uGa|-eIoKX{~-3izSiUZ zcrDBO^5UueRwV)xeXcwfR!z&bnKhr9_-}Sp>sRsV5df~nhA>h^R|<}WA>0qBTq9p= z*fX45H|^zN=Gm(oIxYQPj6T;t{QCD*uJXK_*!S?uL(W8?!{k$0wWhN=p7lU?WHcfE zM@OgE9(khBP49F!>&^R#q0htJlt^}fBXnLFyR3=m_a5o*&3U0odKdOAMl8cc8~zb! z0Dr7MSB?T~lQQ`KQ?pZXQdoB&aex4?vP1c69~Jx*WT22DTsZ%O&v#RLXS-zmvCh-C z-eScwDl*&v&dtobK%R%soa6#yBiE6wXaJ?IehVZzd#6Bew3g45&UaDmA{ z`C69}&H8ym$O4R5HTs@k6J{!EhKUzC$ z#r#f42nyv>+-UZ63(XPNpPYzuAT?P90-r3A1U@H(z?}B_d+!@7;{)rPTmHd+y5&cp zS<%(8sz+e}#TcSt8wJ@S8@vKI^K%7Wm5zx&I=|S0x<7T%Ctl{)(&a2E;azdD?E2%} z7SbZAx6Q3l6GYpPDChKQ?Nk_TEz+TJ3#|BO#0^ko<}Yc(^^tMcey4IIS%s5C!sCFcdpkPD|J>92RO|G`yT&Y~Fnkm*R%|9jMN@UanP| zN)dOwjhK^)nOmn$oG|X%rFqYeu^zo%UNkCw*3& zxk||Z{Fo@Lp}4B>U+v;$D&Oz*(7|%S-g-$87*c;UmUqbD#!}61X3MUI&}EJ?F*a2E zp^g@1HYMx_0I_J6H8m47rmLNgN-)F1-UZqZ+VRQ1J}xw|xor@OO;gRvNL7dKVSRzm&CHUuyIJ$>$A9pWuqO`oj0PDmmb`& z=8->6hr_3y0uL5uj*z)@q-Uf~acmJNVe2VHUc6iOu}X>?b6@wK2&V2i{=XLh_sQwF z*WvsYn=_+!}0@6ZDu5ZaCp5`{T0T+S78 z0}=d!!DCT(1=UuKe|f>^+0KY=xyhp_6Y0DX@cs)C?(Y_zs)bO=q(SYI&2>`P%Tt&AhA4ga`9gX#$T4 zgDIO-4OSUtKxOCE%a@7k$9pedrQWreaf!@U=}B@!Q2Ps>-9AJiAX!?BODbXJ-yoBJ z?%!a9VM&rd&VKwo}>-|=<9Q9!mxTY2|z1gP)fc#}Fj3H*#&98fo$)MSz(O^)a#nk1Dn zh$p1mpZ$oc5)4_)p)63^qFvI^qTt>wYu_lU2VWl_HZK{gT|BRcK7aT3*FS2wA#=id zjT#nS_5LO8b6s=Ea1)i%6)}9O^6^7LTJw$z7eYPKAMsE(Tn3;HsjI$dvW)56lPUa4 z2w7!Wv}0ugr#k{Cf64Szyu3B^8ONQtlqRe^t5?HLK8i?pE z>wwsAD`0Er&+;4Nv=IGD_U7)DbHhok;8HMlI3j2}O~lE|;^4Onsvx|brK@ppou2XJ z18#v($h0@TVaK3PqlgIuUsz>_gV>+`s0UIk*<+b@|rP_*wZtyA^-9ozi-6`(9)v(=lU!f%#rmgpE2@J zYD_Y>+1Y%$O34~^dp4PkyfVTlLX5y^6Soma~;U;Jm86KS*=0{Cb(+zV0zX|G)s^&N2J!gkAT*KP`&9u+n9<8RSz{#fWx;_PK8h%bY5X!2DgAHMq>mS# z%N=al(l9h2#D37j+P#sFls(@69#9i5kS6B|b_IdkxZ=YXdWl3+9B<*`k^-V%L$t`z zc46MP)N;K6*@Rn`J-++#kv4aKUl);0nRYWpI8_t^0_6n@q-Z1vuGP$5V)Qbz zOWB@6MaLd#bgg2uf14+N%{02LN4u7SwFz3+n*eIfDfnUmA)yF6M9o`^Wz!0N@>pLJMd>u{)~5O96BXB26= zB^_Nu$NgAbjE;2;O$sGC`gW(ABWT z1fMQ?rIe}t%IAa4bAgwg=#M4h-@!**vz+}_HwXPLAr<2?xYO_td{zO9XarOfzyp@j zO^1YO2dyIR{rK8Ifo_cvR9%>3R-UFDMKtPN7D%tB-$dJ;@)VwHPrA zIPy)`Tka(vQ08Rj;2WzV3N2YoYn#Uvfr|9vFnel1M&i*3H57|tqhwQ4MBqJ%jUSrp z2d#`Lel`sWVWO8E_zu41Vmb`u!LkY$tb+Y0RZLZLmR-i_Dt~bODYMC-*3S*~+$HIF zE;h%J(ex^|DFVORC)p>WL}!mIU#%z1``zva!Z~E$rpR?_Z?IuN3`gRNM8OR z?}#lTLAERlo+y@=?=P)AEwXVic6CiJ4>^(mrNmAPydU2wG%7h#9vvIj#IFB60IwrhW1xMEuAJ7t*a8svZQZ=3<#+C$L?o;T~2j!82o zEW=3vi6F&jI%@4U1 z+i&5`Kh=gD>or=JSghNx{7B{Ktc>hLi&TqbdEiXZfznTM($Ps+rtG|P+zCpc!fB9( zVmw@vlcD**p9pH5M1j!X2V#F@6zOUwJdztg(b&J9TxxzpGs$zOBuftj8L(`MOhVgPq9EIH0O4S%bP36L5m*_vgmwoL3%KH3es``FM!%ee8AFq+LhtL@ zVyZw%o~xNt0HxL9YES)Wx)9GuNi(Y_9dY=dRv=LHr0em6U5~pJ{o8uVZk(A_mFCN> zYOU(_W>FL{VK1g}d~bqo^RAGlKbORAjWL=m4N#u}Ax8k9Z`H}=3q;+pabMAA(0nm^ z7U}mvCk|eriQUq$i%PIzk`|Lmzb@=YLB&7Mac5n#!!xpFu&JCJKFL3syk06l$BCCn z$@s_<*@cfp2%%4@l3yZvlVFA?on20PXq?<~iX%WkX_hiz>>>m0rQr zmBUyZ6-UGXms9G+G4c(~2oi=9HNFW4R4!aJv&-O3IWlk*Ye$2d*mCo-imgSgN}`iu z;+B6CnV_WCXmySgYw1qBNLT2hV?=j_=JCEYsL}5M!AXrZG;u2-H>vz$5+($~Wn#$5 ze-H2+9^q%ba&|OGcuf^r7qioAjGPX0QtF22CC~YR5MO&v!y*~CpwqUSfD=I#IjU?B z22S!PmNXr#j*jskk4BM$TaLvS$SARf1Tn=XSW(hG_hjkZ8|zJz3>8X?{l4$Huczdv zOx=ACO#ZPp;6qi3KQ7@cd2Keb*e^hu@f{aqeUHAF|34h##$efyV(EZo9q{tplr-xz zn{H*12(aaw1>f8`Yin!xQsXS2nWo`e^CoXxYetwMiZAI$Aq;G(k=P-qTK%r!Rwe_J z%B7SG(V(=$Mo=}Gl*+^gUl>YC#EFq<9ua##r0uIEIDL)FshcT1{qTBINA`tqS_(%- zOY;q3tKEP5u}KsXX#N_qcIi{ZvqXSqWT^j&`xtfuPAX9FtHq9o;+Gq3@a38X^cHb% z%ZJ&5EN>!rH6)#*#{1ur-_k=IY1hYw+(Tm}JX2K?b9yy!etU zH6c!+_ExE~1FHi?%gHREyIxvE`a~@M`zpZ{u~(GsPM7Rz95pwiXW$_zr4qqmc;FWl zw6jXO_(?}8;w+`N+uKh%NZfKKNIN|pi~Sy&v=lri4v!!>~~?gdbNo)cs-Crj1Y)r~O&6 z{l)~w(5i`ouYkq@MgxJ1rB&6Y5qY%r&oF6Q1Sh?hL6skJDeR3>L8gU9{uxC4SJjEU~?#)X}vLDr-`=gLsd(M@wHSv*g_VpndQ76q|24JaudzHLY>t0jNOfWW90wu+!Zee1`mCa6l%vYiznM29v)WU1>`HkYyb8IbQN z=o#+ip4zXb;U%H|qlX>_qJj~IiSjqs^gg7!+4d0GoN}r?Iyy}}+cn8!ea?G>&Gzm63yC`Qe_pdsRuk#*cZ$IcTxJg!X;5YBI=i%o zn_Jq{)Km)|DFq~Nx*snmP-Nr0nfP+4G=O4=1YhAb!1CquGTd02^P;$U=;@rrz&HZ}hRo(*5S= zYIv20$YzzjL2C8*O7wJ593Tn|-1?Y6Ak%ovY1w%XUGCoD4_)tEX(H|EG-~?M55yQU zkg9IxRF~4y($?F3PW(XOytr#-`l3<#SPwkB@>Ozja>#ANE1F^4%c$I>&;z1i#2fLW zTK&qfnihJH+I&M78c!5_6#V@6V)^{nQ3E$yAgT<|yo7k@^AlvIjR8+V-4bkZ^ZmCt z<|!@DH!);c!9A>Fo>$4l;PMq%vH&g|!3xGM{Gv^=OX_RS|F1_5f$k z_w1YA*j2kO3L5d)ezq;a+o;TYoKnd;*#={*Ki|xUedjgDuX-zb23u-fFT))%tc{IZ`fsN4I_fgt zV4T!nlloWP2=ha~oo6z+3c$i{JSH3HDS-2@lvpgthK@gsN{9E)H_!P2 z$cqOVhqnm@nSv}9_t%%?2yPp`(Nm$C;zD2VL;kFmZ2gF4G0ROG)pb-G(+bX{VLdVb zO_{qw1}?H-A>^7=!Z%jW@Q9W%$U#1HKzS^o?Kn#ebNbUhC**< zHvWzr%|T{E&k@iY(0uc?I(Rtke@iS>H7ARiTfg2M|E8dCUU7sc0q{O6qz7;UV8lYG zMPCFfK7Rep6Q+(v4beye0uiu$q^t7sIlZzGRQ_sh^NJe?P4fBSu>GGt=>T#O^opMn zr}e4>)wBNK#9mY|(ky7Vs=&?Mb#P{Ivvk^#b)Qn;KjOPR=@ju^^PN@$n{P^@CwL|s z`J&S2c_65q-lvLpe?eE<3iVsm2CO@-lgyhYEm_s}epD&6HojjrS-gxgX2%wKlCV%BIQckWqqldM{jCQDmI@-^9n>l9_{o0I2wU?)Z+X3Cd7!^&5}NT4{=)i89~(^MBtxe0x66>=`6} zzb-hgiM%T1=81742(gepdd1W1b;oPe>r)kkTv4d()9MuSqlT>cGYs3Wd{|OM0)V%~ zauUeQZns|6U}CY)s~JB&c4!H+-!ECB#MRLfwe3^>9j6rF_y3rBtEe{EE?T!xpg@5J zcXxNU;;zM^xVsd0x8Ux@onpaVf){ry?ocQYoRe?=dyjGMbD3nVcg;DU3A|oKil0{E z;1K;idd?S~g-&BBUFn#r+uJpywsYA?wZ)FuF%s;Yr%_g^q(?pG{>?7ZCK5&vqha}V z6atX<_`)~a68@uZ+fGf^IHfLx?h2ZJK!pRCBJCnF!d({XDtBGE6#1lt{}PU*5&kW0 zP;g=py|FV`v(Td3?&Iw&Xpq4sCz~2-4S6l1<;RI(v4N$hcVo6Uttq8uGQl9%$99FK zm>x`F!3bVtN0hVYaxbnt$s8g8Dvf2`=TQ;g>(@KDPwpt97vX4<^EvOcSX$A@)ftS~ zJ9rd~hJh35q-^|<-G3ku+T5l|DMFt?1jeWg-};W>2wVFIN*M9+2`!i_ikGty|8&Ib zHb;~}Nv@(%p6=YB4y0A)oK3Nx+;V`T6slScg#EaKE%E#sfNW{Uwh7j7SZ&bI#7<^v zD*CvI&^Ob6Cul`oT%@*c5hf6f>i2hhK$%))C2T?b(Pa+to2K ze;e1#6b@L{7d3n)L&u{>90b@Sio@_?2L5z$c3H=9hU0rp1s*4swX(qeXTgC=ix+19 zO{0FplF^GIOq_LlgvvFz%*@Q61}xvU>P&&dE<{4p&+n_g^JHU<&mC8uSN;l@AZ_jC zx#u5{+w;&Yau{(kL=07=2=_P>u4>Vl|@emhW=Z^JX|@Xx+aIP3U+Q?VRMt>lf0uGg(Em4&Jd3V`V5O(ribo5(UYu8(&&&Zy~X|dRzP}Ens=h|f=pP8pE z_wLm+1Ph}MV*2?&;04c;U@hUU;OC@xthIB2pzqY7XKdtsTzUrnhx~AC^q;mxnzT3^ z%$J39K2S3Pq+N5O>X|c zywmUVP!^MCa zFB(8v;D5(dO=GD+N5SNPqGVTDSgEfdfd>Sb6Gf_54&5&B$$Vk1clHZzc)n-j5RKqX zHp!U;i*KN;8tCsXiuy+%uOY*qBz^lWEX-O9LPAg3(gG^YX^x0-u(whm*~pU%$`@%N z%2RL}iko9MZtjske&0>AbdZTQwolIQn9tbSU^4YVZr3H(wgD{K!nw%a_L*3c_-9s{ zK``N9aGhAxh5WNz$mwOrTsx(qs&`=uNoOmu)(1Dv)JCaOT$XwvUb#B-`j(}>Cz88L zbf{p$Sx2-sER+>Tkd&PHu_-fl*+x&o(LT2{O-idcF>4imjQc0T=sb%fJ+!ONC zU)WOVul3C+n8k|1USZeWO_@2^>4t$RJ|KBF)3C!^p|@d$g&&joeH8lS$~IxvW}M_c zvgfDi#XO~^Xv^|I3^oCnBrqJRVyYJz|0+fU_X=N7+wkN7>?+?MKX2mZ9i6fuL1Aej z&S5VwWqy8{PP|J_b{nYOe^Lop0~*cui(P7TU9G@ z#joVn(eIHYiWJAE+|{6#+)YW*j6oV1mf|?IqCZ2Fa%GMh0BAA%?)9PCw4C6iAxAV=-jtWvBF9r#A(fr_u2KqgA)0 zr6@O&#soE|stNY#59uM}py^3z>aFSQ{ucc`M`PnFQ$uD2 z&-Kv*r2;vnc@hr2WtPGb#4a|PiRH(~``ZUAQ8Na=Hz*CGT7o2lA6#pmkRhi5vqW=J zV;0xr8hT3l${&Bl_De`QY(PiB9z_d@Lwr|POiY%Bh!iL{&<-_Al>EYA#oyrzl0xcF zy@?vc(N;G6v+_l#Z`7!(uQCT489qV0@N19GPd-C)$0A9a#-Za|ykgEhtg;yM5m!EV z(jE5>Wx^kLvsGF)+Svuy1AQ~WLxdPjT0 zT}1xw1?H%{gGn1t1pID$ANZ`^rV4g{Ij}u0gyI@?J6m4n8B_jiBK3`7v{GrfRnMa> z2*CK}cysiA)q6m@9T*Z`uKagSp**wq{R1TMid^LG*L$j&oA1g$;e@7h8|kg@!CGIR zZ@p`xTkwUf!p-#rB(Dr<3~!w|C}k^Ei}z$bVg23kF+ue@B^eTgadlelH(WI&l?og3O6E2HJk*r zf*~46-h0p9hg}9oZ`SO3W_vs|_C*|0C3~2ym=uwGvf@{O%y>h3BRaotk&eifR9dp> z+S=^1RO&8_^k$UxCi11L!J zDL%z*`4lllj)w&S$<~PkmgN@o2uTE;i~J~qzpWGsRom(fpJBVi+Q*LZ| z?|$bkxkX)(AX;cbvKOBdeq92-=m!4DwEFN#Za9g~&IV7S8}p5fY5yWfG@({ZC$3y5 z3@~|W4x9f1CX-T;&fEOWOy9!6E+zw-?Sm~=SG#qS{hE!3!i4vUxsMyiWSAKnvnRB& zhSIOVraJQ&?|#<@k@XtfPzyNVL!__QqHxW+99k%=>@5`^4J%Y#QvX3@DG@o(ntM1j zLb7-CwkS$bXD75hIL6RF|K-{vf}g`3lJI z^hbf)*n4}9sdw7V(uo}6+I&+Uth&JLU{Pg}%bG1=U!lcHa?Dh)c z^m}L(T!kYEfxQdgFWJPwq6xl!_KHl5u#1Aois{=JJxY$UUieod=P-jM1E? zl?mSuo?@$O3>f~6PSLC})NGOTr263Fe?@TkpiD3|l=W{v^g|%DjABpKIi>mNL{+~0 zXank!g4e+`i$fqbs}*ZAYy>6ZVVb#PBx~`YH-PY%7OBE1+kMS%83nVNm3#gommW+g zGGk>Gh<>H{Rx#WE{{OrHlJTY*#ZuJDO;+uXA!lMPWIu-;5tCr^Q!yzB0BL=$whVn0ePrGAF)s}9=|n{ zz4hbwE4hMAHv&4<(tWj3%L}YJN3o%kI^DiCH|*izp^m=pMdksGeEwEqHCJ&`YBC$j z*n#Wjo5JgNgm7+Z_jTkfxmP2o;~e@^96ufUOv7J0_gcCm<6=*Tg$y;>m823&0gvy` z(ldbbl`0qn=@HVX>XY`14vd=KtPOL7Jqx6bsR7FCn=0U2MhhQJfmX`GmV`oLJoN>A z$mRmeE4iG_`)wp`>BtCKav5(|WgyU#!qGz@GGc$y^HXz!GJ!y&gJkK7{F(Go7b0cY z8AZv@Iy2~9&MPQ;*ws!srItHd4T`mnz%WObgf0jGSijFw4x_pN*C5(xKol^ef?1u9 zq0+7fUH)fte|EgJ|(}UIcmEsUI-V;5KJ>QPCy{2{S`iGOXn3LKFPXrgt%@lr7r|Y^&u*K!D z1Xp1Y@iJv+P^lfAw!0m0`j5+Xp37BN`Fqbe>8n;K9Y>ef4J)+p>7I|@;#_zQHj`F>;&TxPIGj&K=?e)rl zdU{vurjI}9k16uyGOwHcUvMNV?!R^qtl=v4x_#cID&IB6vwuk-3JwHJZgv;K6H9iN z99yjVGD>sygd;1uM{kaJnG%V_WDD^s6GXF9W7*SM00R2?T9l?PHB(U z;Ucc#Zs`%~CkXK0Khb}oL~DVf+}*(STY3_#WA4yOJ;|0-qM`_5)Yc)i>E!>VIsD9^ zBkfA5shKgIy$+`FHNkoOoM(^R7k)@2OGU3qws&kM2V5XRH-bRRWBX=T&CG{P) zwD;{5^G#!Fmk-$tV;Zki144{(qu@@mQY?!JCszKwHT&Xz$pw(q_$^9Z6rXeSo2Bad zCwg;_(~LaCS}`ictCrU{c4s@C`8)y$8ilzd^@?Nd5#Wkh$BxLZWguQ1k-k-(#K{5W z>y$Ol9vKpAeL6Scd~<}$j%q40qp_~;y{&V}nmPy(9(Ij^+%g+4dy|;9kVy$fQ--aG z`P(gkO4z-=))?BMePoY6&JewbP|aPE6+(vOetKPqo*xFx2xC1__OYt%r>S%br9%5i zEEUBkjjsUKi!u$naXc9eNS1~=W-yHUf)(>Ud3hdgt^%`Gk631`!<%_e7YLNH?`Xt| zl{Sz84spobbs+OZ^KfIdRd%8~dPF%bf&K8I42)0FlyLC?IlT*~YyRAl#yJ+TNU7^?ogdx-}YJKO-Kvy!(WE8w(>>AjvVuM+wl>prSZs;Vi=&xDiQ;j6eYh zIDF0z0Bs5-LnvNgMEASi?!~`l-Id+~wwSiAhW`C?6m9+Vl=n+2W%g_Q$H~Vgppwe< z@iE+yilK8&>i%bMk>_)LL^45+fupT1#Q4Fj)ouejWJe~g)xdo~tioB>+patKUeQee zE4Tfxqw9u_!XL0u;m1n}a=}v!a%^QsIKs&2t5|MhQx0*r{Ta1$Jydj?M1ArIt&tVw z`>G<1eNOnHA*`)Ytltr20o3N?oYH4ACigW85sOfejrY8bUS(r9n)myV|l>?YM#sc{Dc*b!n0{) zb^OksNuq?w>4uiZ$@O2*GC8a1Mn^Jr5+0y)xBhgi6IR_(BjgXvrJ#SXtNX|A)g~K> zlM-g;FVA9+(WXumV8ZLZ0_6eBV*No-G7oH-sPFv$r1)(V=!4A{C3GO_DJg7bg+(rL z%Cb_+j@Y#SBx1893|dd_l^=QJohn~iH==kdnsP}SQ$)PL=ArN3lJaRijeH$ijgC9Q z?n1QZjh3Yd4Wzeb?cJ9p_h8;)eCd8o6VX}E4;1xnJ%I$CIM_KAltL#dPg&Sk`3Yqd z;QYd#_=da|>S?Fg(6}R&QlQU;7~C`&tTpW|i9)DsLf$}}aXr72Xj0QW&uhuV&%4gW z;$GCy^e@+&NG3pnid2&zd6qp)-3iyu@D`r2pG{WDV;?z34G_NB4TRg(8Ra znQp@0WPQ+mL4u2YZ9!A zBCx}YA|f;Qw-k%gF&=`e;CHuJUDI{T((|EUsN7Ogwo#TtwnX(0qF*7#oRoYcG3=pM z%51NQjvc0^dJQ^1DI=U_vF<#KQclEbAE8+IC|j$I55G*-k$ZBR?GvhBO49&H>{O)#D4L9M6~@_BH;hpa%HC5t|fVYj}>W3e@{ZNFY7Q;Vvf1{7o$be0A(d^&UvI_W%L zUfq*%y09a+KFy4XZWB=#U$9lw&KTnpQEmxy7Sad+`si43+t2Cri2c}O@QuZM`0U2V zJnAH1P{YKrXE9nz6&D_ZHd@C*&dXqZ5(L0P$Exi=e!vk2n|6wD;W+>E2Cq}v=XUUu z3f4Y`Y$2cXmPhBz+kI62NFI`2!!{8E1Z^Rd9_d;9G- z2(cg$4q?-xeW`H3>7?Ks=bj>|NZP;cQZs>fAOJTu7h$cj)F(}11NZlDm1o_3imSs6sD9u}U zp?s)#VasU`=qfc8TIFQGvV4~%Pen{WJ9x zfcgQ}j4a;0wZMZy*Mri+FNBLDHqXrZ4msJ~@z&~uOpA@`GDdyY}En~3~l+|BjCsMZqGEhzM7Cmxc zf5s}0CLy!H)F!JIYE0V-neI%{{8-7& znx#M=C2PgLTcd&59PPy?EAj*%V zZ2bhwTpDova7)aEQQ8V62q0H`I}qZ7^DOET5K)vF+GXBPk9&fPQq9wgAbFHM`pPoq zV?KI?$RL=5P+32bzXoAP>PXqgi_~kFpC111W0CTCCC=TF{3w?H`@*<#;0~*Oy$|Uw zh!lC-&xzC8d(;+vzY(>SW)ByG@NS#kuc+Bh@HQN9d}wHusJe9eh**2Ad|v+WHX)Dv>;{d<)$0D!mhpS2P#NB6Kg{bK7w^j8|k2{DYXaIw$IT z-uu3oVf0v9;Cs~Glo4q2eM4WJ#)n^G@Y1W31tqdMdNQqm2OU3r(JCyY5lB>?v=Tx#crow!A zH4&*K#ZH&!1W#1tLJfx%Sz%y*AZ3|HDyDASVMgog#>@SUHnjo zNa)2o_oy}~yWSpA!Eqal^!0?)`1}pOD~U**&K`iVRnu_$;@$JK%9>&aHg6_dUeMWA z68C=kUC_J{<`B=G#z9R_XWkfn1pRy7e+ia6X{D6(n3yl7XVRXX6m`iQ6n*wLcsiIa z3?5UDj|@EgnEO(!ZNtox6u9RnLrt0dxhuSuvL>ZkhGs}788j~Oq#Lp(a4^MjXb={# zkN27L8p)^HMcC|h-I)LIN92l*j;6UQ$CHStfVTKCS%1)JuYcE-*CxnYH?yIBd@OgBD5$1(T-lXpM;1e zP3F&2BB7X9yZ&cPD*A^1-;L~w9fgAa2^&3Hon`>4ZlOm#Etmxpn#Po)S2C7mIhtS0|jx_o30S9%V`)Yx(Rgqxj(KwA)vJb1|7A+(I z8d};)4TfgDS_c!Y&c|^b!4(Ayx`$EuuU^-B42t!nqP91Jdc`r=ec#9tC9RJz5` zPRi(_inG>~vPoqjzm_Kp0R8;cm-%X+lc`CrsMHfkYCER5B`u2jC<-#;>Fb6<$1MiS zYd**8`nlv93WIN=`l0e7hv)hy2|p__^3;0ctG@+XEwef!{ek9a!YtQaHTYTiz71^b zpq0AC%W5Vg-+Fw_)GS6*Mr^nc3yTVh3irlwV1O4)`?L(56pyGYWe)3W#LdQH1@Vh@ zcgKB$bSExJtR>fUk_1iMO=Sf~(wo6ykS`ei(R8Y49lI zcQTz%$wQVpB2w!N>TkwSVf$>49Li$uy^s55CVf@Vw}N-TUt`$bH@2(|WzPqjz5nsm zP0GoA>psFyiK$78Qf^Ci#}==2BzC~^eEhWI@OUFj-Y{VND(QkhOkgI+Kuv!wK%OUy zWcvJQT}#~(@$;Xf(viR-zi1l#a){Me`QR0DyQPc7bb6mUTpq-Johtbm9`@~toJn8)n+~KX<<=&=8g@PL?l-mHyKByp%M}jh(A_4&@rnQ5U2aZE?YVB z_l@sAN%y+84;t8}Ns4&dh_f2Y+tugiKQ9Q=%fZ0Ku_KQOiNBIVsAa}Xq10fI8b5IN z6J4h!EWskC?gHZltHRP_tJ5UVK8ojyv*+Ng3KZp_(xXV!aMPX4LI;Y8l00=;6!?e6 zy|B5wd>9q_Uz_Y>Dj_-)%3VAnTD2l9ZO)O2rjWb{=#ZU4rE)7isz;gRDfvVGSrC!Ueq^Eo7u43Uk7+^9q& z@22SYpbo8>0%;+v{kj!v)||=!iu&4Z3TOAoDp`mn?LbjM(8;D{B1b7CE!ko$vpP5? zQ*1|}Gl}h_B{V8S%>8uur)q5{cO(f^nAIcvloJ1ZK`W93N}TQs3x!g3AjFTj;r91N zxwXx_XmPk#o?U~1Ufz3)pKN=?^cqW77{#zH%jnKYcN7YIQ>wL{ZYV|X;S6a;pd2oq z>VseZSl=N9rl)_ojGEEW@lklPHtbR|;bZxbtT6H{dOn-vW+M5b@yrbkG&(|E3`jN7 z`mtDYTGY|f!|c8ka>}x*$VqaF%C(?{!9)vU*Fnh|Jta(~Tnqt1UIwspkw@(=Iq(YASAqOdY;8t*W|L_(%-Mnk`F z9^vRZfSa|JD(sgYrna9Z8eUoRp27RB>JOHM(SX^L2Ho_GtnD3yYdY0*W2}TcZC%$w=A9-eI-qqO(v_3qYhyXb&6iY z?Z!(rmbq!OCKeu)LSm}Q%G#5c&-3lt5$LkfKZu#q%jCp=p35ec_d;Gl?PK9hRdkyt z-L8J8Lj#Hq#k=V=G}r#5GW;tua{^FcbF~xMGOwB*CQ`p%b$AooRPde(ho^bWOGIeB z9~L>08I#YTNin+fO&q~)^RSK4!(%=E>;6fOMY`P`)$O=}$<+g1qs~wOCj+hBYO7u$ zw(o;-S<~pxPz3SEsQh^;8D_;9Njh9!(GG|d^YXHS}8P>bqqWw`j+sNXi`i}O^LQ4ZO%IsY4W9ZC`2RIJOx?$11Z41n0|&N zlB1#DPqo}xie(B0C56(SOK%sLuUlNJ>rD@%!6i~p!c*g^RhmU~Yv~MvF%$!AR53-t zI})!{{bbk^KUK@}3yy`TCtaBC`48L1>Rb`I6A1D)& z3z*y`!$MB7K6X_rQwG&Hp^S)mje+Q39l5H)E)qSOrmTAZ66o}cK7_v~2HvOy05b{# zIj{3|?I;E5yRR|kNAL}su)O4J)#(Z~1m0mn%qvjv5>LBTp^ z&B~|~GfS%JI7-QS1YcQLo0=QNb?GU{E1*kvX4bU{6otGD+);i9>n2V-I-kPcL#>+v9Tj>WQm z|C7+`nmy75n;`U;?HP?&yoXW8$f%f_Nv2UZ{z~+BJ7IN~pBwi{j38Mxa0%`XA%HyL z1!1(-32Ok4Bx`-*S>&E?nN!>Q;&Jg|8bvjr&mCjgsUef;_z?T0)kh zVf0B0x-BUFw8FAh&hIjJ7Cl#;gg9piux?#*@c_=G3hx5pmQ%av1ZvV2T*q!k#=n3iP(m}PKN_zlm^o$rkRy0tnxFcPl99{-B$Vb z*PaNL-+%FtK1Gt+D+;l{W`kO=3>`)BGCzdz@?0oZsI=Z8<$!e7h!9`41A&H+R-0dBUI!iTJ3|&ssU7TNp z9v;`@mlKo!PyDm3^*;sHUgFno5$|U6SqE0E)Y3$bj;|d;sbLAZvUrrE-jO1BkE+uPPR?QYsCqO;*W8unz6R~?p;pz0w^Mv}t)7hfF zC_Q!lkvmeB26alE6G(4UWF^{fHCpzB7aAr3Z^%iPuA_4ZCMmu8b00rnjHdo43BCGt za;?2S_Y%YWpuND`?fw|*av26}UQ&<83{{=Ap4GE8HH%I@?GCIX@@~*we|cLw zoeRy0MP1V3#XB<~F~|XY&d(tyVy?fwlj4Y^K{{G{27%tsPCI*_yFSvy?8-1GXa{!r zc*Gru^2fz-QFd%rlP@V>ZXUP2BR&@dhQ5M= z)C%d=pkie*@sk1D&Qn)Y*TCJkSif^opO}}5p$o5{=lm^wwDFS|4$a=z!$+BzEXcuJ z2popVrk#6nbK%MBOd6)-IyeL;3|o+o32cu^BQEl*C1~Qt&E(b~{=3DLuKUVgiD|lM zcXY7LJWOkudj(!$Bk#Yz?5J3>xu6jD$je3}nd&iW8b06k7Cqgp)-6jF{b*R9OmyO$ z$&;s*^i$9oA5g~~<8HBUt=r*T;&4ELiH<(sVJo4A!)05jl|uxHMEw>K7YLxHXvj`F;iE1k_* zAUC-&5edl}jB+ehQ1~T?KHg|Qykv3eySIJ3Ga`!6u;Zrr_pwW|Cp@b5AnS96&Rao1 zMs!XNk*BMD__#H&ab=e2LJ@|S*7?)|+0E>!p}_AZq3H9|N*bq;?_7@lSHtclwL!dH z>F@{J(6&Sg%O=@v8FPPgmQd#u(X1K(o*g1v7!6n&UF)Kdjh%r*;5jyq^U!SPaOYS0 z_G_RaMxl=6ESG#24bZC>bnM0aX0>y3>O`T@KbAmVGBAWbY#Bawf&|VNQMTlQly;N{ z8su)``JRF1StDx?HwH&Yb|2one|HC<$=Kxs&|uO(TiezRLWqRH#b1Pi3hu6jzo^iq z0)Cn&du-~>kzKMV(f4^^`79CqATry<+q6Yjo=)u4i8$V>=!lg6A1%)}7AoQr2j$Vk zLvG4es%hk+<28np#;CqnQBq1lUtzl6nYUY@jiVU=ISF?l`$piqKarpZDI=rZMpwHc zNKYyfJ^n_(ToEI`In8}+YnL%4;8J^_dEG&XHG#X#jwcr&4n_D6xqI^b#td=Pq8f4O zkk9y0K;NEv$x6-BQt9K9eiwPHW4F4pvaVdwm1VvnXtJ z?1=hRsS1N&fw%J7<*K8(VE(QXT_99E-Q#IvyNrCRvmU{nb|lc4SxQx#Fl^T{CBB=luA^sQh~+2hDfz9m_}swOY{w?E1=2XY2ftrWoAm+}(DS zo<7W4oU51TWoKRjEX{NmDr(9Pp$_mXz{pALO#i2klcMjMJuj84s@dpWSCy1>)1{j0 zWM~p=gzn0(W9zwrdqlLUGFym}_FwVBuC`oBbj|AHs1&j2k%WeAXJ|Uv`U?x*1J>>s z#9J~q0L!U%I6BQ z8p0-{`n21}>bH-8vA6%{1>i>66JEdYC_Nz}X%3_2LC~+o%#tEH^giy{1LpRA^)`#U zqa)KtVi%_n`hpLCo>yS@)E}uUzZ_`71 zCyG$PtbY2((NsUKLxZ-4fQ{VtW9}03qLhX?aJ17mwa{;0bUT}$7CKoCp32L&yKeiA zet*w>eI{*BSX}Z}4tT_QNpx`po? zba%1AL)BnC5T#gBdO`LVnIy1Vikv@B&V{8($G;Y*G%Mf<23)tfEJil92bIOsVC>wd z9kKDux75W~i*w12jcE0<_gCeCf~V&_5C6qq%I)(%7Q2VWm7#9g(kYUX%tuS;=E(nV zD;&FpFsET%?GK_Dpd~s6pTzr#)<)c{|@2k?Hp?=2fM6vqPhL!JEBZT zxR*s-lJsaW=CjKdM8q)Q*`ccUjp}Pkd_3p(Q+Pjsjw}Rv$>4B~gN{RLDF*odzS?Qx-5Rc|jBSxS^06a75tS ztXz?S`)8qY;$`F4i#8WQ992@9;**rQLA~)Fo(Wuuxer!oa%9NV~(X1EY(4T>v`_0gdJ#IGZL(1r#5_6wAE4*LB?r8b*V^ zRoK0qNonunUD~_Gn{c--h>o^%wAl$a8buqjd}6cVBU~ORt)6hp@9E z(?O?~w~S0U5iZdLgY7=V;JrgOmk*Zp;##u95kV_>u0?wm(EOSbO%&iFaeU&c{sD|X z0Q}rjlCQ}nJX}HPoE9266gxa?-~Om_Fy#)2_M9nkZ4eMQYyWYAeDpSj$^**Ra|FFd zf;?jP%=Q$k=)vosg&uocNHPTx%US333=7xlpuB*gc32b8_|ucX)B(qD5OsPCe#k2R zE}6NbL#TSK++d2mG7umu#~qc4!X131N=#Z<-zDwe4QxrLZQ4^zn7TCHct$m?Nd4cg zSPtD4w_zU6RL4s&b?kgao#;h(`NZWj{6u`$U+)=o=4OgCV9=$|<-KK*ii;`DIkLiJ z0cDi!*oa9O*u}<$WV@8i z#oH)P$^)?oApchFD-ndWdHvQmfo)U|3JZiJ>dtP*){Be##on6M0MCEkQ4q2sD!&sC znP7|%VZ(^Ca^<8PqJuHgfb6vGcdlu_8;cEKib1jXpgEjM6be3hl6bvLXt`NfqT)|$ zFafbluBz^&UQXJ!ciQ1z6Cx65*-^E2DGP@MQ%kMU)7c&z5!M)_XO{B!g_`8Ghqf}W z{p*H(lg#5JQU)vrIylNc@~cZ83;+DvQ}uostyiEWP$3OL0hd>|l^~9qmFhWcqGFOQ z&Qx8Yhio?4TC%@vR)zA1YHoyzR@C_0Owl*Q#l;+hrzg3s$2ITMxFF-= zDe$5@Nro<%7`NO?l7j|m*1Co}abTyIR7n2exBFaW%ji*-_XD4aU{Q;K@*0EG$V>|- zjHc^4Ub%^6sBsYdhe z=P$|h+SY#8cCEzY@>q@W!#_GW9b2Msa2v$>9$tvxchu^%E5ejQ_#}@3zqF)m;{^E! z&kHG283^rJwoATm4G}Y{uCDyKo6zQO_iE}SeRep9D{AO!>Hu54{fQ;YFX+qfiAK`b z5mh@y9+BV|nGdp~r~%SRXOGa(W{sIUFY#0?^Wcxg6>-2L!gXjW1+3di8qw`u``H&{DZkFaZ^Xrj1OhdY3*Ti1tNBTkr%{SP34X{jqV(H+#K7)0q$u>Pkg0sI5U- zXJW@EsLdHwU>p9A5B}sRolo(&WNkRLbBX4IfcH5TNd0wv}A&nr$36`OdY z7kEoNLo$-lA;^Mhp!Jd)M@a7?LNLfupAd?lt2?8F8*(Yijow3)>G*gx(OszUn&sxo zpFkD`5KkQAQ&d)-vFCyLWfySv$2~5@fpjb}f=bu!TIiPq-thOi6202pcI0i()lN^= zDa#c3(t)8NI5B`d=gTGuPKuxB_tuH$b(l?5UEU#2QhSR2j|hwwidYhOlpG|*1Y1359>=dQ(UoP!x zAB(f<88@JEE}5o^QM4CZqXN>#^s9}*EoR7heE}Hh7tv8S@c|ja>#6ct)pwEP zj$TfL(~9`Wy?rtu<`36t5@HHVXUs)fiXKd3b&wa*Zt&y3<;1UOWBzky3)h*dTP<#L zkS5?UPMYTuqAjz?EoZ@>*>cgo1J2m629x_gB$jB3H5SUI5_9CG#`ZOs;$`nX zGipORb`7;;t7R!Y`m$nlWNZ;WzsvnVV0ij0=Cu0!)-$|YTaIxxNp4%0{r>K*dw8Y7 z6bHEv$~{3q?h9kaa8Q48QcNE~7^qF{Lj#SWVSgA5gSM%(GW)kt0JPM$TAPm7)+-Ld z8Iv$fv6B5WkAo5H&P@NdnGV)ilUZm>AdXmqSUWP_b7r{O2nYPFl{&hik|)D zEHs+xRopVUWuG+mjK;R(O{7*&gG#8DGZ|j3C_p0V&jMk$Z}~dyT_hfZ83tUw zB86e-P$yYrnVYC%9PoSfME(_mhQx%Gld(~L!DXq1C6BpKQnyIJ(g@j(v{ugNU-MOd zGy&R#+o$u6)^V$f$!^e@HB!>C#(qe3rK5`s%_8C*;F)6M7o9hgbZ^YN6JI2#n9pzy zR=jdG`x{1e^#Bwg>B;DX5LEWkD3|H%R{+j)5p1K#FWIX!e>Wb?iVOh)9savIY+!p( zMj_DSIKIB#w|Q(sY`6%Z-LBN!K4WkrX`4ttY(;XF*FK@6ce^XfrE5sJ(c(#RluY4wN3R3BB<7d z!eBS!^mJA~|NOJ#3sNSzk4dd6PKRaIDIjtJNmw)&Mzsb$aS8)?fr!-6 zxF5-N0;pe3$-PQv6)B?yUkg)Vb8dmE7&|}21J`!$MQ*;=Ty~aOqppz=NiDf&@sJ$h zE_+?i8(EqLge{h0<2co@h3x;l#luAN4Iiw?=s%?phZDnP3%LilUz>oOAc(iK&V9r+^MNp-xKK2 z=)uvte)`B=d=a*&>u8DNQfow6V=jjf7AXH_6!e5pd_jX5H1GJ+KLHs%n798`MPy9E z`x7hM%l(-Xl>~{j972K9H^2AbSE1K$q=%sGS4I||Y9cp|u}q|3wGd4T4gb6(Pv$K9 zU{jh;Jwv}1M;U&Z)!Vb1aMI7LT!f)SZ!4TW&c*8I1H#}cRol@^_DqXDV79ir4XGlN z6PKKkmndwkeIQSCL^!eNr#UGtbxjfvZomSGeceUfe;5<-@vJluvde-r+Gj_B=%{!i zYSg{Nse7r_gg_0FdJ;0+d$MxM49Ii+SAeSI-@*&+oqLdVq~50q%-+Xh(cIU++dqUO zysrM>z8}TCKN-C{zAnF)ov{!3e);b_y! z2k+4}E05wU*a~#z{W-o%!j}Xiitz%++`mJ+A>#J{QnL=U2i;Y1hAFFC5EgzjtfkXB zc4t->=T`IapMa7)4Q|1#yG!Z68_L}7g5qYh6s6kz9J1YwDIEvOquHAS$sUxZj>}-d z&44J#hZ=W}ls})z>-`VwrKV{~hr`rWdD5$9GnL_nNGMZKWCYV>ph$eZelL3)*+`wQ zzk|$}Z*p8-0Ax)fj(F6kX+u#Kb|X3F}mqK_XK?tLG z7EDe(KIu@3t;|o10Sds_#D|om!$FEHFL{UhM$WpWL=3AXk1prA02oQ~b@Fm19-tU9 zY|4heo{M7cRO0l#E#MMGtIwxe>T%qHfCp(RZ55@z!9RD}0bMFV_!a$k;3+3pM!GJV zo~-dCU6s7^x1l!K`&J1JJWO9S3VZZrUY91y$#`W>9)a<-HDqjJ_GpXB_I^tu6B&*T z0|N^Q-iMbo#!a7au^f9blh}Us$+?eZ7X7{`~pIfGzL71;I1FTelG)rz= zx`tY598+Cfivjr1M(sG7rRm}>qL?sX1I5w)lvY1+B#By*bSaG z3$xuA$HN!axKam{d_bFE7%dWQ=-&1Oy9(A~tzE1Wa_zfHG@tvI&%N;NT{C9I5WZXJ zAFM~{15f-vqTNn{|9v?jCS<7Pt8&B*>rUaavhd4thvIs6H;*qoX+UTp!|hTfM_Hh# zVE9GJ83rtPw}YkK0Bsx6Ni}t`wrVGj0?qZk4#g&mh_77UyAXK}RzD49AfVH|>Ly*n z({o0ZtjUGXi}Hky*ja((Syvk|A2~*ITi-oHTe|afodY)!K&8FJp(LY``;)$e12KXe zPaxti*gO1W)C2B+gLOIDOmete)akCI$4jDuxNU3@C4f?L$pAV^Ja!5>U%`3`8gf8M z*8!=A9aF7kXYmc2PQ$^cvM>re6vJ#89{{?AX*~fWRZe`-+k2DemP<0x-RirRdv;sX z$^GShh;q4L9>zG56ri6h5k2!f!@M4;rQg_)FqECAKgh_w(Fg^>1QP|}B?MkJ2p&;R zR{WYud2aJ$*KmzbP_RKlvpev1^8EbVzHJ`q^vm=g7=9+0M zcrZB+Hj`7$4)QUN5V?10zv$4QkgF7mQ}N5~{t+`3DglJFr2Jo~@06!@r8+`nMX>|84m&4>ZvEU6D*ura13A=K-sWUAAoFqIYXdba>PStg(5f zg2Ge2BJx)^+GsG=O#P}tMx1zjXcaeY9*`SG=TUP&wnUz9U~}*pyWD>x zYRq~(`cZ1@<>fot!HpxqXqg}ppyvkhhY_>pyRy&Fl=zo0d)bZt#s2eZw2_yQuLVLJp_O`&7mH{bfRC?i?aaH~-iSa;)OhF<34#o=)Vp0k+^(=Y5XRb5;u1 zZHC&SLkFYwB$n_bw-&A8DOTyHJ~kFY91j6KGX_%Z&WO>Z0+=#jA_WL*ad*@c$5#{%0GBYv$MHlY$5bF!$P*ZLDk8^GQv1i6=hY(dkztW%&)~uK z!BfCt(`TlK+{qiaju?EfhNpq$Y1ni1-#2VJ}e-m8z{{Rv} z?Y@MArwtbIgj49wq>hjh1VkzVV_134S)BT(&qCO9>#ie>v?M{<=f1;Vr*z+58jWML zfk>fiLESyKeOnDRjhR&y0X5rTFj!GUpj1r69c7;(EsL5m9Nu1{gyB|IreF5ZzbU~P z&v^>cbuh+IxpRu~2S?cPz#}AT5xtg;EhM>SK`|j?4Xt8DUk3Nl-B2hpLY0*h<9LN> zq@9Sf>KKD-G`Vs>dFu{_-*zFFop}i(p9;9;?gs#vo+*->F3{6IU!`%hFvd_QmZ(;J zGU+7QOy;qbhhfXg6}nXIm<7(qPPIixSjirwlbrolDYTj; zc`Ppt2t>ovrNen-j6sJrRP`t=Eb4w$vzc=piS*HxyId?YB>eG&>j+-+ z=1E@uJ1PG1o$*x@Mew|rjq&u$6P*1Nm)(0K&VTw51_vYuA6kR!&K`s3y>y&ykA(d2 zTPt|(Gvnj<$j*?Lyk>&&NzIl`HcG+H-4XBm^Biw^{oHf>f4(=*|Nc^mPkyA2KmLO( z0H6F^k@tS6z?RK6mIV*|I^^Sj+s7MUH~ZUv_-v8C`DlSlFY>ta9-r5~GR@zAaQ2$~ z(pO8o?Ok~;yV&Et2ScuYR)Q~ndZ2UHeH`)EA1UztA640~-ez=6ap;KRtTSBR_vblY zaCLI&0)VN!=8In~cS)Hpx;O@ONtrH|MC*XGK?*EaDbtRIQLok-*RhErO>b{6*E>>JO*qcoPt3UkC!i zFq{)kwG?5}DO{=3_e;Gx?fX)pN^|$Q^Kt8>LRl>2XfYC{mAL7&e6ey{>$4m}W-&#~ zQA^jm_-_xZu9R8W>bHKrxDFycv3`d%@ z(g>r#SaX}o7|Ru$H*cf-zUkui0ZOp78$HMS2V z$`vMyC0yIWIR?U^3KV8ym4ybz^Lak~?OSlae=7sI6vM*zkYbv z>@I6VVY)!}7}YXHYoZ_|)S92)em9kJmDt->(AS&e@{7*JagK3VX`o=>U;p`M9ND^) zstmYLcqEiTWwWfg;xcqtW$X1fpp|0GL>Q&macjJPW+KnXf&DnfFqF)Y6B1)vv-fR7 z+^$B?Q^No;>3Nh;)fse9LpmNHP=0AvrDGH<5O$=M!srl;sT&g4K-ySd8X;N+8%;t< zqx~`fRw9kCoOrz_656n-wCV{B^YA>ump(JV)1E)dHP1W$jw>z zgmpIG|523}T@#0L-F0t(9~gRbv+bCl);#OlF`oZhNj~+_J{%`*|NRFd{_}?FobrD0 zOP_nUhMa!NTouc?XSwXSXLVB@^ObLwdBa<$c;!n{WHXW@V~W3c|1>}Tk0GwS)Z>wz zA!lEHgjc^j%~@x-6ib>v`HN}(^>YKf@cAkBABcF$B}aJm%WFLCvZD{BJX-wrbCZ1O zGXnrj7c|#>t;|baJHgk#Fu;pnaQs6bpJ+r8b5vGcbn!%@dn$HuRA?mxmYU$spG4P< z>RQ8dOoZ#WxUNkQK&@758s}P8tj36#hr zQ@mq@iAVM^9)vi;BHMB~7Nnt6m(*D46a!B?4fiQMxP2MiM3Qo0it_FP)7L*tG+AU+ z8a601w_>6mdSvRxr@%p}hyAUu@?GrzwT&m&| z`^L0}cW4ZUrRE?ZdxhdfFTaxYS3QM)e(_&}F(}Jpy%D6_2%#pVO+1unN(eiXEyn;2 zgct&+N_D!(jX%5}Gg{(VPdi9{&m-J-(>6@m=FAH=QMDy`6v7CEWnl=HEWe$w5wuW7 zr4p%R0&|Qb_A-XzOsV;~TCFj1@DSPlepV0lar&kdX|KkwesMEmY=VkbjQUlEjEp%o zXc`ims!te(SUr7sC#+@7ktD&)6e5a{P7=#af)MlwNCT4@mx@fG0zuBU$=8dsr2ws( zLW-k-(V8P82hmZ)1A7lrm?_P<=ZsBEamPImaQVgO9#eZ6458M9GZijAXA7CNCz75h zk~la)tyZG)vs);j(RGDJ!6+Q9@DdUoKr~avD21KL(tq;F$YPC={k!Rx5?9nSBti4~ zIbJX-K&fE<_hAifxdpCY%Z+IgXG;4Rt+10lNZUJZ zb$?9IhDVPadBShD7oO+x);DE&&6}tA{3rVP$j4{+#Sd5Fd2_4wnpdRx^4H5vQs%m^ zm3Yl7()`0`i_LYu_>~f21Rwk0EFlB1eyzW!0gwsZMY z=N_M@U6vpS42O?svYRB|{$7R68*Q$u5i{FF4x~!C7Tgk`@B?h z+t)lN$=AMB=}5{%5xn4)yq{+29z_C>t!!-Xa(vujVpTmL-IZFl+@124HY#i#$Sk7Q!D%|3Ts ziNF3x0pB;g>_sU)@!>uap5WIHhrH^Ilic@+Gto8S+BKg(Z!aGKtn*CrDGc!d72M3A5 zI0UJ$Z-9J04@k6*LlGRusgo`O6-6WyE=t8ueQnD@2n#7dYXxG~>%{j%N~IzV4;d-r zdbPIWVhWdr>Sv*44L_aMa@vp4LdUa{lBv@%U5XfKU#DI5vXnBWJ-n$se5qAk(;n*7 zp82YMKROXUjrLfGeCrZ5U9>}JWnm0U*}w=P5D6FUM}R3@-=_coAOJ~3K~zQGrJLz{ z&U$28qU;($LLvt|`qpiv=jIjcyXRpJO&8c4N@Sfp2^xAF+hYCIXJB307xyWaMpMSi zS-5BS5k;p{_{LpS!iX7Z=xJ2W=%)7tGJY}}2t(dP$lhK~efcH08oVb=Nuf7oXlnqSX^=oRL+;WAW?-;W2>e&Bhv^0Z*Kw$`_WaZ!> zSDbnhr>^Z`-}W-U+IN_VhaToi?Sha@3C*<7BoNpp4k}A)=)s0cmB{zeehDERToI>Z zHab9s1|cLy2ts41m20HkJ}!C1Mby4j;mg0;3dXSIjMK5)WA~@X^kfONp;Fz|@nOi} z(Q&pvx@SpcYA4K0|#jHu&R?@d>?V zsdfJPT{-^qhgF{T{88Td$32{P_WW#9FS$0wU;S-?(J@6XC;9j9R=D@(RdYz0+wTgv z^dgURYVkIH?}rM!@cBuea@x|@(l@?SX5$8%lTM7!f&B**n>Nm!dTl<*X5UEMjQd6u zC!J`|;SD#RWOLh{ovnL>fH%G_!#A%RB$F0==RYgF^mP+Fdham3Imx>}FwK>hdfa;B zN~DB)w+3@UxR!&fu1N6d&lf4oXtEi}OJ6s^(=Si(&Fcp7eZ%km!36L9P=SwqAnq%J z!0_{1YwUesm}1fJoEMMrp^we*f%oL_eZ$`Ub5EJ6Y0XqV9=ncDXkPHj3I6f#`}p0L zq`B=*pXa`KjH{m=6PAS;&2PVAoDct1FTekq40qob@az|jap^@d$)yxL@1^njU-_ps zRI7%UzkY(h`AC5ezpoeHH$1dGBc+T95ol&PYNVcSc-v^Lo8N1#@qHi1 zvhmy`Q5ee-jfVdIe)9QzlOTx8)^&s7M!gy;8L;iy@TrD*Z>3Vf_x)xjr^UjN77I^m zEMJV6X)1|Y-gi<3bvh18W!{h4F!&jTy#=SD^PDVp>2?i(&#{)nD;f3WzY2dQ(^# z$q&BsWA@yCm>0kL=?tz}3ssLVeDhW|Z5hU_9Uy;q?B#`MnJ^1*r9`+kPkH7g3_j;< zde-!yf{^o`|5Ro+jj;34o2XTM0wGxN8NCkU!mK!ra7!b{%PeQ^cIO_6*~)Z4Mo4P; zfa2aU+)}`L9Q1)nj4_;MB{1cX>ST#vY6fFK8WV>vHTudXF|_n?7Bnq_Fu=tA5rie_ z$>kRL)qHrn_COGz!jKKZrDzn>QgHsNm7KX@kly|rB9-L9oulzRsAc;Gs5Z=wfWQ)D zR6U23(&(Cxv|A=MM#pKMftu0m^(&}?hG;F{{>Dw*@Zk1l+0FJihCWnCNw%+-k%LE? z_q29IN^#Ev4(2iI@ivE-z^i^m0L0H1xlH!?c5bXZx!6P$jk z!^1m5p7YGkAwHS3CsoOj4NN5(LAs%WZy`{yWi167#gI6 zKY4QxZ~T*~CMjbKeDFQJBs@XF6TJH!J-p*R(|q7POZTJS{XvCOPPX|UFO9vBF1y&{ zMc1UL`Eft~gCAE}xx(TPUK@v$UU06F_N?qi_8o7Jm}Cl|V;OczU{F$q@6%o~g?72eYRS!*?CJXovMn#4#t zon~rk8o_MJ>vlg7*LCM8cp4;8YeTA%VY)+-i^ z1VPYD$=yzrv=b?<%i2Sa79(w1m$jGC`uS*%+hSovt;?5Vu-l1{>7<}}tSPaVvmZ+> z>!ORrpoOqZ%j9<o=jVwNFj z&)DKQSW!g6NOnz6V~il{X1RUGR%ZU`=e+IR&*im$b}i@s^j>lUNp@93iaJ6FuO0%W zL0SmMWo2(4W8n<9ZoQwi&N%C)S7Rq7`ya~l(6_g;VyaBP<=`#UP{uU%vNOT`?prfn2@n8gy*z)!3c!yB7{|sv4u2(Ey)}Ql9EZsW_r&gTIuF~ zZQu4VC!Kr}Ui#S0Uwg8d1r>?5ZFA`bXC0GLW@>bd>6sZWS-G12)j5(gn&FuWDa*#l zSaDV~ia;wupx{{~w+t|3XL;cM?cjP`I2~fussEiSLsT26h#W zP_g*c7xNQ;GgI;B$8H@*tXpgU9dOQK>wNor6@Gqejn}^_!yEr(ihF*(s-qg@wXaO` z$A6Y*&9KF5UNQd~80eQAJiIsw^!h)Z`*=T3zkHS`8tj*Bdt`2CWnsp!V!&!HFU;t+<+{1N9n%HPvtKlZV++nW&7n6Z z(b_OE8Slr3|0>5@-kIm5a}IIZ7Kb;yI?Y>NpFJvGcK?A0DWSj5;-;H@%4Nd^R~?zN zj_b~L`BK8h4YO^rX`{`-!x0N`xpQ#nh~k8GbMJQ>*4sR?Gj6j(hZP&v&tKjkWgguf zQ7Gtn^=l1BOC|&>J7mP_qKhXQT~eltB@q)OG>v#WDJ+f#t)xoBDA%@KlF4M9h>6$J zS|cn`AETRk7?s^rW&}YnC*;Q%(^S9+AqawiWYR$hu%u{~*-*c<*58=fj6$u;8tR)` zt=4P{U|!nmg~E;6$(Y9Xt>nu>B+f$R9ZefA74~zqHP4j54Hp`)+O!G5|`+{zN*l7%wstt5kbxf8^?@~BC+*dRRuDJTj}0gaC#6!Dst(Ih4G8bc2T zr%BX=ARR0 z5IqC&F_My~T8K$OA&{9hNZZ9|MO2yuVUUi8j%t7djm%;~;`XfQxQW&WNlz4vF{FYS zglkPb^`)2m?4=+7R(0uL9XoP8VrsGFqhpGg)PX`VuuKQYvgNGDf z`$BAxd*1^A&wa@l|Lgs|O~pq88#mZ|>w9yJrnfy3Hoa&zZm`+@XoylY)iv8537g?h z?fBPkl*#o-e)4~YfcP@G?rWuHKe%PH!%g2CqEa<{|HdkB{?jRjS6RI9`O7!${ozll zoPUl>CM_6RAsHNy?7DAZ9~P})d_pyekI^yB;DCjckVpuEVD8PW5xNAhYRKY8H_c5$ zf8fw8QMPKO#lgeTg3E_iSgcxUEn2^0;EcQI;x~dWDbvNW(I7t-nk09c%y;_Smn1*ME_77brAn5qw2lOUcLPTqQ$^p+J^p4-#9rgcJ?6T7To zUDS-;e+V4}^~sn-2uap)DAYnKhf4UmMSCvvZfmGfv6TRy|2d9 z!NUw9NG~Sgi4+3CiO;-}OSWy}mharc)UG_ap?(m8dmnlPqYY|$hLLUC@sCWhS$ZVG zuud@4N2Mwx*teHlu9r(!ok(zSCx?IZFq1#sNouCd8CH@ZVbiA;sY|n;YVnt85I@4E zW=Rf6MTkLJ7J5~Nz;-Ab!*oz)^xzb|NY0UxwF;8L0xO=N*nn>|>g*xbt?a|b#RM8v z3s6;`sOl3He8OUtO1X@s#oWUwBp4_P&8Up;4;y=iKuY%J4-*N^a3tmsE~2H|4S)j} z)>W${Qp=yjs4&7A8shAsm3R;Cq#OjKjNwGrWw<9t*{`ubs9`$}gKiSk{JuVm#B%Jo zJ#9PANEJrlI*7V2jL{Lg7Ars|r6DgAkpVrFL=~pF^(Q;|>5kpaGFPk^Jf^Hm?YQ!i z^SS-*t&C4hA?o+%^=nph-kGNzd!Yu(SbXZ+KcyE)ltWJ5dly&9TJuESjilgo4{y=m59w@O;AOM z`h8Ve2;0R(K02ylCwmdnA}o&8E39dfn~i(g)(w0=JHVCC8|8)1Pjb$gb3=86fa|}pf?CaxO3ptIUj6bkpZMQJ-t>+s zzWC{Wdb07ga>w01Klo9N54SbwmJQ{K1e^t5Z zd!5P7ATap;Z2$4)ua_C0m?b%W{cxNiDwPzx(@mWPeyb}nJ$)%*_73@r%fkC zMW^rM&mg6RF=~#XZLwIybrYmgDN?Bvel2RQ53?kUF>!XI#$-Q{NHj^3FboO95Un+i zWfKGeK@d=_rb(wgDwQe&0|S)HWh#|YQx($)cXAxJNz5pvn3$a0JjpePMTUAA^?-wF$mLfEkQmQQG6Vs|7Y8V{1uiIF^os?-0 zUs@_us?$ET?*Bsj+C>-3g}_*g>12$G&03KHDJ@oc3GRJxKb0G^BwpCJZuF6V{zoU} z{aaYBomwvD-{F@^TMpeg#`xWP$!dd_~mv^iUd8vrhhRa1SnT3%-nT9n=d$vBl#)rz2y$1>&DsUgg^!% z)O`Ac#pyCZ1`%go62uvkjE;#TUz4Aiq_=+qSDbVzhj#Cx7AVfMQuJc6TFJTeP^0fL zb#vcF8_GI?VCsYn7NHazlnR}6IpM{ZvgR3QBeYFejgXea&3II6MQ;A)O>Dj4Zd{pQ zt){7TaJ6Oz#rYRr%qg$Dh@e_S2yjygKu|4|@iGa*$%vai_;vF4J~FSJv@pzwSXqNH z?421!2tlYLiUw-ZBGGahSjU|HAusxpj^o!Ya>P9kyX`F;ZSP9wtz1!G-=Y!;gg>31^JOskFKuV$@ zpb|w$AgyPWF{WCL)gw}na2y8HS#&zV)ZhSx@(d$mQ`A~A0@{{E6oy!J#p$uabsVmI z>iGmgK)G5Yn@(ffkL~fZHku@o$X66Shrn|g&1J|2A&F4o7=w+#1+o|-ZP=WZSdk(b zMyUFJjs`U{mWyY*=*W-BEUiHZg!}jod4*-8YBPXANE;nivAhg25l;?HJ#^6W(nKo6 zPUeud6W`x$4-@%uO7|9FmX3mYnF48hSl+RRo*fS~&l@4dWV!Z)-gv+A%`$h~74YCM zS2w@A;9Qq?{9%^g`=cp-b<=zzqdkRnD^f|pP2U^hO>duK#ioOtv>`qg(*?~(|7Lka z*e5?%WPC#Nhwq%?58pW}^111ILtJ%5g1%nKr#{-pOJ6&|#tk;R_eT8XJA0a;PYF-( zxqs;A_x@;-k9>TFeIpTXd|if%&hP96^QxDn`TW0>IOmEZSQZQpNKV;2yN|#B)+zQM zh&XwZ!|0e|Xoch@*Dg#jU-z{#*L^KczrJ$F;_|0@+R=JsoOSB&KRd(f zl@>c5jkxByNk0FHm{{^W!NJ3dbFVx?v83tENxtyOcv&_hdEcMsc*bv!vH2v2ATV5Z z@vK|f@G6V1|MMVkdixYJMZ+1VI=t*fsiwMSpkMOu*A4QfcTDm6Kc3>0lWku9qBNu9 zF?rkH7cYPHnjbK~bp!IuzFbr|sctBXGRGOrU z@B5@uDYDrtel0fS^*onIhfU%{2+<5*YM>E{B&8$>f;c6$HqBJn4PqsoPLfV1nV6VD zh*<)}X|rArf`D4BMifQ$eVvW{ZQZZ-P^9*7q)wzvd&pDk@7q5&(D=<#$8{khqm>M4 zd|rqIX*ct2JqJ3i+er!2nmMU;{dUr(y{uL=6i*ACv&%_u-bEKn!62-~gfd2(I5^&O zP+>%_Z;*|dmHhOk2Z@B{ylZQ35|;BSqgAR_EXh5$9_IF2?qPjRlNC0Wka6MKK%`ic z8{(ujecbin4kk-Qan@B6YgeDqzgAU4CVzQ|Be(5^i6VW{CTAo|*)clWFtPstlleS@ zT5+zGq!1}|RKr8!2}#mQ;33E&8PF1|VZv)v)5`?}wJ2g@OAs zLBi+|ki@}5jivRFB@@NVq>B-fvM_{bGFyf@@kJLia@+mfcK1F;XKFaE&FYoCJnic9 zxb#)eWZw;UGeX2_t+9jyGFBOtwI+-N)#(|2`ftBPDa}jj&M>r-u;+dJ&XVtlAOvYOA*NTedcFmK;E3(om@oDn+4GqF5=D>d8`` znOT^W5rTAYFQW$zv2N`;sylX(2f~EMz2ij=1iMIk65$#uS`+4{n9>1fTghf1lK~tJ zCW8XPn9Res(k8dLRy8 z+Bb3l*Yn6`(ySO>jeLwcepRi}+mk&mq>kcCv+#Ag za>(L=+g7vV(FoUN4j}{Z%O9^~`=cS{vZ23Ea^eXKPy4?7j{|)99~bD?T5#FL9y{({ z&At&usjOK$Y%@3zUt4FK>QFnf4v5on8xv=bYCUcL;_W@W?swB1KB72ni!(2M`3tU2 z@`9^p{kwnr72{lZ-s~Omx1Nz;&(>MR(ktIE!AUJ1HdkKivGbm|e&vd0-5R?Yj&{zO zF2w`umfXiKx_BbcC1oBXq?EX>OB6*-vziy zRaz_*>3D@HEu}13inwXKUv7BOV(TwwJDt{9XxWoy0NTZWI|viU@XV49vG)YBel8mm zKVh#02xHheaS)YT&z8+6v-QW@=#dFAeEEuubR<*TrnvXU`{=8NtdbtK5Tx|%xvOeb zv@^|9FTIpxGRc44e-C>e*-OTCag;_WO-4vgkqK-8z0FkE29zI@C(@Y{X5$!GA3|j+ zPgMxgmSkm}baAwaU&11#!KOv+VpQF;B~HU^fF1=0{0c?CimoePY#sldk&xB~OGmSz z6_yo~O~L{lfN)~g!$`1apL*7WVL~fdnI;S>eD#OF;;x5A7}N$|#Nk0RBV#=GZP(Ca zyW~|wO$b~af^bRbI1^FHlnE;l-@o(Ml*<86ea`uej_l@#x7>?HaN(6_Q1X5Hu@G9< z!y^wVM$4o zO_LH2C?{>EM1VSbGaFZDYlDeCzqjD$X6|_i;|I7xAX46O2-^}Y?m$&1S4>P+YQKn` z9%zPlLEN5}n*;>L4$*!Y?Z>JFJCj0NHmX`gTC?>PLN=oUVexTfr}3IL22-cB=GMQ} z=2{>{(*3Lqio z6E(*Jjw9x!_HM`KMKW0}*1n(oT#=y_7Ja>vpWRa97r*rR+{b5$u7CVuiCm9hu;1dA z+iP5ZW0ePPTRo=?*A+)8`#Ia;0_)VZSJZ2%x z@oiZGoz{sZx$_4N#u&mdtb5BONhXub%*>#a!g3Z5duiQXLqQP{hcUH=HMw4_uyGuR zWHQ+d#cJ$V5Jc2!wK>X^qak8CrLJyQ$}Ch~`}US<$JTWhA}|&rQ5GXu+LbR$rLFFy zlv#?*X|3l{Butl_>EiK(rjZi64na)97}4~ei045D3G@e=@f~|uwR#nvn`Zh4_rtz5 zB>P?R_Z;GcYDBN}NCPWFO>2UeP$|YMGxXkmH>aGonNn_uBZWMbP-7v;NtYGE#u0)c zZINuMH(J7j8cLNWVWhw)QW#PgP%SD#mflhhJPem3iy1BU>LZFf#^5vqISPcuAaOF9kPEen*A- z$0isH=Vp3Ix-Q97isS+rm{b@tF*-)y-~eu-b9!Nn;o!az66y4D>6=UWX=;9eFC}Hq zrnjeu4Ws)=r;;QUs8SJAt;Oo8gp17e;q>Jw9zM*G!_({y$_%dW;r!P4zS; zaqDjvrp8$1S}{?19O`JLdeK284l!B;t;>~P#!95oK`jnD5&}^tPNkEG2^S0qiI6sy zn?hA*Fe*gInA|kRU{r{XLNE$rbo~-;?Yl($doMm7Mk`7|g}h%OP$7}g7$H!$g{pT< zf;d#qmKF%f3Xz~k$T&RRvN2kL(FkcZ>)Zpt5b9yk=~1Bc@IRi&cr>u>OFKQIifu*{b}GZ2nXDm^~Abo%t= zpi)~RcDRc!9w&53na79*Ng<^qnM^iAXd2!p4G1Bgw1f<_PV(ogQiKp_O_OwT-9*c> zg+p9g38{7xq2bZe*mkW}V`gTCp`jrL1_p?th*~YEx0z|SajUOMySGc@dt1(iGx@&H z^z<~+f=nib<2Yy?ckJnO8m%Lyr>B8ga-pHxX}oXLw{>3{>$HFFwC+NrO#Azz!BT3N zPRC*~Q(mCiwvE?9o-&Q!EaX4aI5wTOu~6Mw|1R{tOU!g}Jke0fw8I2p-OFR{`PQ#N zBbYdJh_s2PME(N@35X{+1HxgYmh`kn_0-`2LxE!7p+g)VA0w$XC&;;zdrw#lD-nB% zG%Hi@8-!I?xTu&EF^$1zr@lktTP|akCaN#53aA2Ww26ro1O`C?&4iTbo-FjFP>w?+ zzzBgW1Q}t`s~|r*#(`3q69X031rsY|TDPwwuwrA~xSo=vkR*|e>>DEtB3}I3XLIMR zyO72p5u}qIXFdB|cJDgOWLV`CD?`#)aXGfcu{{RDkOMo%DObjM?VnwXu;RYQNe%H= zpMDdTW3&CH2dRz5{kUvt2XufCHaQ>{MSwsWNCE+(;{eFh8VN|-MtWX+pHYh8;nigO z`Om8djDUXm|@#@e}xfnqVzaP#_7p>v_`a% zGBL3v;>=NmG#>Q?0uG}XD&<+}dX$3-l_@z#V0_JZ7!gDf(?+v@{{(wJ`u&sg)o^1fU*N(@6+hbp(b5l` zmILjV;%rx~kT!O@4-@*RT9Nka(dgJ%TiWhCVn|vJSaXkqbP||mSYbRqP_-gDn47Jq z6XM`5ftG^ta-M^=GA5N^;G9!gd+HVv*&ZC%!FHV3Q^)}b(d8PILsN|G+KavO5Vl{$ zbCRfPp;1xX?0oh`OH0hu9{=#AcfWu7s>gd9T|Bw*Z{Jz`{Qu^EEPZ`+(Z&A@=#nzW z0b1+kB-FO&daX1tOKvRfdj3RWA%dVmJRGZ1ra^MFk}|EtMk`6=6i!&49hK&nX&G>(}uaq4W#a+=4kwZ4n_#4MzgS%{QrEqkfZriI#Z zvE_>q9gC4M%T>y>FY83~EVQjo^<0X0=_+NqcswD5nNP|zQ&)$vDQHW?f)J7w+K|;2 zd1)vJjf)^<1PK%Wwdwp&ULdfwW*EWYFhU3z#KtoM3xkEg)AP6-8lEq4-E6?FlOZzx ztRN7IKnNls&_G36Ov{MS7%baj-80T(?B=c1Y5_`GI3f-O5w1%~`$U_E+4Q{2=sBSu zZ!m!+EtK*>hFG2h`H<}&{7?23XILdIlJz}mOdNsPuqGX++6EnaxFmZx)5>z=o>6Z2 z{7=|?-X=mR5K7|;aQgdrpzW&@;$v&`qr(%j&$>w4hfqq z5)F7p#BBxh(l-ORb+03#HK72FX{vY1Xm*S1L}6OUbmVhqWi3`sA62Dbj_5lq&`yMG(* zjsm&R;HdyC5!)CUgQ`pu)Qb3ixvBUNLC9b^6hlghVyN+Lo7Kw<#aUK0RXG1k9TAoD zG3g>@Ohy7AuoBr=;SyA_5}9R>o9sj@(Phw4fU|isx!->^vpvM@_#rZe$Y^xEuQI@} zfE7aE4fIC+YuD`%t~(_yD^SKrDUC!3ZIGcrXoC^G2H7_;anjWOkqu7O7g;xjXejew z?zIk_6I3v{o-D@=mUU8yG*l^4LMoLa3>87-H`O@pM#AmHK%-1s&MG<@ z*^?TCOKZyO_I+&6n$)U(X(wM=)i3QN%R+%eGNg6CmlLM6+}A?e zYOhnLb7&z&%#-=L>Ei!g2-Oz81hG2CvLFa!Ls8d-AOP2aD4xV85DaO-jHOY;rmzu) zgHp4?NHV7L`6`4YiD1AeMunkyt!J zDf)we6T^s&Rx+-S4r0HYx-lw%LQs=}w2s@+))uN+=efh6m?(pUF+6QkKWyn^YF~{g zX$ZUoQ)6k|K(TsNilI}I?7O3cA4d40LQ8>TNmi~*apDQqraX*qBhwl37}@!f~mo2v-O~qgi!A4}+-`yC1eG)k6BFtH&jDX;J719keNEFsRxL zR;mvjl!+<@>{PB}7*OXTLxg1m0w>jryJ`)IOD;N=+S$NqagCsrS`jUOjex|^N`{9z zdknRsuA3PIo-1H}%Cj!I=%R}*jv8H3<~X3!q_L6JM+nhO)!ZQ8fb9*_&OP7r4;_-w8OSE;ZLI_B>n5qwc5PxX^KWx4YFpSHXR8T-(%t~BJ z7}7>`CRiHRL%p0ln$Sd8LXedfeMXYe;IxJ>3E~h36DvG0vgzAW5rVuWz;#%6_Bu9i zT1h%Nh@HuzZHe|Ga+`bUJ8_shP8y_m+ivhB1#XA^VDZugi2VHF+?py$NazZhZ81>m@)yLka&(oGMm6nry-Rh@?5+~Bl9yj zV|jXvg*G}qGW8ZPVMrlA%@7tny-9{w4nj|sgy-Vg7Rk_%(T3c30drss6RCPTnK_g3 zinKT&3>!j4(im)`sYzKsf^(5Jf`qj2t0iisF}zd`M=6Ff30ALN$GA1c$mk5UA{^f8 z)0@q3>ZKbQePjgxNR_^m9lX9I{sB#8`)-o+wy-pG!`W3CqL!|6LncSh`gKGVpJ4Z1 zFgi~897GJ+7M5ibVaQL6F?hu)UbE?Zl2xCd?b!`LH3&Gge}wg$Ha@n@OG4lsC9z`~ z_qkTXT_JG$`$&WlRo^EaD&F>-XV7;}KmMK)<6rs__MZK*zloHHOfo*kb!3IbYA?aw zO2EmvG*?`B*|$*gJ~4UQhgOXgg%q`8-^b$s6ZuFtg{n-Wf=W{bW11?I&i8y3lrfQy zkv4g)5S3~A=%R}*y6ED+GrFYAakNCyT%(0f z;axDBg-J?*ZO;-9ojgn$Btg4^1~fvpOzhUs(8lKczpZ1WVPTwzN=-c|cb{q|{ zwisct(7Cdd8fCHXJ1tx2yXAbp*uHep#ghh_`AQk;=WNo8pU7(yPbR|%Z6GfVd7)zC zRb$8-MGZrbkYt2KQ5brO)imue#KyT(^}e%aH2X|I28k;LW5STP1X&~K*Rp_O{$JtFo%HHmORx%CaTPyYV8~ z(8hqFZD?#dhVBlgVPb}!Xa<7lX6fnZo(|{<7m*lmTV(ilC`U( zs#2-;Ei3oTx8Cji=8t>tdpBRbmzAZZR5I@y@#4LAmvhfKcRkTe% zF^;x0bInE)mXk3;+D7~qk(H3kd-m_#^|IE#L`Jt9m~d)3Y=_JkqdLQW*3Pc zN{m(QNVpU4lF*M$!%E1hNJ3EHqH$V2trw1CVgq4F{`l3djfkOITc#x;RwL$I?IK54 zSJoBVY&NgTi=I5fR*MVgE>J3$nAo~y-Tk6msZc7Fs2_Y5Uxe?TJj%`G37StWVlOUX zOL86}24&ljzL=3PId+YPG0W!2+&oV|{^VFRxBM=BYC)+WxTUVxBm4q>g76_AN*0f<>b>8-mPEE3FdJawfbNe2C@Rxsx^CxE6q7;_4NgX~x1S3La zc$gpfsShxH+fLTz7nr(!8~^s>Kg;5=^K8HE1{#a296xh`>$ICZFo;P^eI<*z%7Sa8 zlbI)_2{)t~cDw`Qyj=)@Pn#?!+SXl?Gv>MX*p~B1nvrlT0!>QYKXxmE(~8 zQTozBYYHZ&5cSB^Awm!~v7IsQu*=+FB5Go|U_vgW2J!i@4+T8gX!89061PNQ;&TJ+ zP&Rv%OW{SPVOB^|cUu#t)r>OF9u&0vb%YF%g!V)}Cdn(t+FZ!DPabD>r9;Xnr5LJg z&fg^K58+ZzxGRO@dDtS6LWaFE6OPxvQdbRGc%LC^u3{C2 zFk!1R9l%+yI#Q|6(Si~Rci+MOkG=OQ)pdXY1{h#~R|^AD<|;sIjcwcQ5RP7cCVADy ztAWdHJMWFt&wr--|N77RZRJga^W|pQt1?n1E34aN*0L;Y+s@6)Z@ZJZAR}WkvM1lp zZjYFa$d-*VDs4o}a+8lwS?(d;R5Ky z?_yRN#B*`)zK*T;>|kVcf>LFiFl=Do;W2b{JF}lXh?!ktO$qDV9h60qq9%ek#IbD7 z*H;-{xQGTkr5IB-H4H5=1W`nDWrY(DALQ{rt6-V|+ms8r1kjNJTPbcI9i>^l$fthy z5OecOyyIJoprk-uGSfd<{z%C>lwKA?<)KAML=^x+EnX_k@ienUT`ouX#ERT2pFYl*nYur`{*h$EiQnYm9#ak}UP+MN%w|?Ub z#4ntud#K$+F@?=2UFna-q{hfuKPF#uw#GHWc$^D$QVJ{wg|NDGkphB?rl2)r%A#lj zj!A&7RM@p=536fy)D{-l*J?36G0t?|XQCA`q%7>0cnxcZw-`f~q}(9XqlmJj+P*65 zkSa$4o%q*GZXM;rGn14bws_#^F#x8wOfoq=ofx-m5<#O$yIoNfSyNwde(N^wh6&C)UVIG(^z+V zy<71*=3Vbh2$V}4+s)=y(iSqzz&a&8YjMQqeqdF4gy8NuY%Ob>(B!pD!ZH%Ci@~@^n zrDyXn#Fwp?6^CVn4zBRQwetIpwl%<7_{orDFIM^?Vr8!Er1$j^mNN{Ooy*Dh4ucyC z%Vb3KKrWP7doxdyhkLNt=f!C@svGuoPHb`$%!NY=Pu4)}l%i%VhuF^(<;&(RD%M8< z6(9CPrw^Whqr6DQ3Otm)-WJ$6Y2bJJSI0%qg(#JZ%9!#NR|QW=oqtyfq5~%&32R-^ zzxBa>Yh~~t{@MvgLM7+h6p7wf%QFg6Av|Cqy7E9!7?`R(q=g2A7hLc=w3bs=z2{G6 za_Y&t3$^g=K+{c=L1#8O`i`#aF(UC(3-Lhokpgn}F5Y~1)T2H5x6Hjip%>+=$b|9abtINOwvIQS}l3ENM?fh#? zWe6tw=`pVW{m!Nu1TYx_?(yxO_n(CLb=CA!V^*d0&>Y5yU%8(f%_jG+(5K?~;-e2* z0zM%lLE~7};O`dtpmvE+xRLM^bN32j$^gat|&*m^ZJpyleZ- z#@Y-sx4j>Pz73Ch7KAU{lNly!2n(c?jqYGR>f>sT-hiUqAEo#?X%1WG$T~jp$iB=C zK3q+B*8CCUqg6E)+4E}j&?4xA_=LevMRGK@e{36(l0_*O=x0scaLw?J}LQ= z#Cyi&CN7?@kHdW{me8xpVb_=cJj_s8Tz!(Q+b14p#a+;Jm4&M{`$Uy0tCa9?mscBg zXd8}KRj5Gnwd$4A*WU8kykEPlF|JogVj(fpC;k2B(R3*sES9Q|aHt+~+hhK1@hy2Yfz6#=f5G`Px6*_! zTSw`42;hXs!b@O+7^XH^l z;f+a+Y3xruJR%DGa>ACfy*MrIPf``dzMGpkK>z(iMsny&bJd;IsEhD%q_*p9e@?&Y zaAp`PB(xKiaZ33V-bn9GXWK~?zfkFHEBR(zu!-+!q7?PJjoM_bAz4VGc?4j_Ae{#H zw+%HZwz5PJWe#-4mD2k4o9oSKe*}U1E9|nP+m4R@_%N1PZ~SD*TH1Rr}(VyrNwk`Rdw)BI>sv&a!O=3@P+w?qo%(7DFZC=o7noQrfGbg zcX>9Rec$8XF4}^pGWl^bmqL{BI=58R=s5^7!OIPW5)AZ#CR&j)(=mC561elzEF2Kp z+Dgkbyjfq2`u?Kf@tGGW@AsUNO(F|smT39yT^Y#}@C{zgSfr|+gjGYMZ$%iTyIi8m zr}-s}C`z!JAo4f%x@6o7jpRUkK}#%1Zr_!WAonNkpTWvtg!i(3F$C&V>8S6G}8G|B@vZE$cwwfy+ad-hA?kimG4lV_HQZyFwn- zmIi}{B3%Zw0=k89{mF=aQBSRvo5lJIKJ7{@GKc#K*Ti9+T(Wx;l-XFx;e)z^nIu znUhI%`PlJ@9vgsGT|)z69+lCN;PYlPUQeRiXa#aE zgb9=PpkAfAinH9}`nhCLtNV0OHaykIi~g2OyN`X)`Ru}*bc$W?wtiVM@aeolb?H{$ zI%O=d*i&DK)5XU}2&1gEW6enEE%{_&-pf}n?AiJ=Gc%>m8uoYS0)LRD{|H8%`h`%) z2v6RN>3;9qd^{fmMb>FINm%bf%7)8n5@Ot~f>()w7fLb*gry(lbUB2~Z@ni7wEunh zMb>~rN$zBpuC*~8$QF&J2EYn15v}2G0-jNDBI_YEI?-Re9JQvsj>2W+Z4a!R@5Twg zqD>C`v}+2N8xZX;DVU?L-y#{9 zLy|D_2azBhx(%6%|ICP&v|5al2Fz0|!0K3ySqC!v?2GKbUz3&rP>+MeYsG1BjRyMK z)Uf%=P-Q~XEY0BNe$#|+(?1B05_{jUs8xndcT~cT;q-o&td(kYTgp*~`jZ+@qlhO` zLZ7>}cuE_Cg4^5j%;sE4o2I%IcwPz*QBp|zuW4SpZ-aMifyfggCX@y-465TbN(wFj zW(K_25@R(!#J|xKdbY{K1v06haUNSCug9>#q(vRS{$+MwD%Nj-eK2>XUc2T4Jqv3ARt!1${PeEjUWOzZcaj&{%HtqE>6ZsAFjNkZ)ftfo!YdJFETB+fh% z)AL)$r)l-~S7qr)ONpR?Yk2uwKaERE zi7CpEUR;mDuB^XHwN){Mlf5nk$rj9LxV>Y2JO}$?NT(~$!{L3Ebgyzs@lMns6oHx; zxw_QD0ejQ~3jmw&uBi=B&3~gp@EE$Grndx*oho_WDTN+mE3cWJw`Ef%xP8^(e(Y zxzcOdZT51)`5XFsch>g$-|MtEWrVNuG=`LfF=bt)m6;XN&dof>PqH@3v)1m;ivJzi z&6q!%`ax82C5A!==$dct=cGCaU5HphcAiwSy+jA)s>k(SgOg^k zdF~Fi%Fyb>T0`SO4*+~B)_)STiDx;HMn~HM2G1ASJKsQSqqB_A4IrM|*70c&S4Rj5SjRSra24G7_;~23SaFO>J!v@AK zYh(7Y@Ui;uELyJEB~YN@%VD5C3YC|aGcYhHvxU?yMF`vn{ZzDB<;Ux1PE=Z~>eWW6 zJJmi_MFQ_prxh_oUC+}iCfbU0OT4m>n!~T}M}`_0(G-6Xt{nSAkMz?zSFLMDTMBB9O``Qy;=S#k#vr31wg3Y+!d~!PZ}H>($CcG;qc$E)(kY$++|Que zTBY?@df}d3|8^SLga~C(?Ve!;;ejjRc4R_aM8hx{nA-TqCI%~`@;w&pXRj55J^6BR z5v#x2Q}ep!;n^-Kf>;ekGHLhwl1bwwbX3-#o!JDb1Q(3als^8H(6AL+LR^ z0(ReH#L>a%nalFiK8G>T)yzp7>elwES8JPf<@~vQ3v3d z$J4QDX8i{HFc`Sh(qHKER3=#M$!nC(y7&q3-#TzVA3|7hv9VZzXpOYh(hNFfh*4om zgiAh%HAmkz?fhLXRhzJ*qAfHH6e+ztUJq;t*29sXL?ta_p5Z2vG3$$h30uq~P_>LV zv2gMk(IBLX{5=Ca{`VLh0peLz0-SmRrWHQvDJ|^bY9SoLo3{oW_7lxlfk~gKnc^{Ps?A z13!)eztoILYD71Bvjt7Lh!}Oo8;A&-22rIJO0kr}#4AY&r>4c-zGOP;j~{ns)bYCL zs`a#!s^@yD+N)v)rODGY5+@Z+dWWY|L5BHThc*z_3Bl=fy)M|5usM@i_ysZhC5HZZ zKfS4BE1)uc4$C4t-NdYP1VXP%j1>=`j^_uHcU9eVw<{aCar?^@UgzN_CD5B&=izKG zm>Nl?0%P&xekIL2cjD?B(FqFOGDHPMVPlw;)?ZF^m0yDE4_i%nefwLTkNg9!at?!k z*2Di+*WWHE7)r$#K&bN>^#@ZV!lT_q$%v)IezyCQC@Ps2v9u9CZQ+5Nam-cJ6u0Is z#qO;l9hdrtD0>oX34!Ov12L5ia9K* za7UNOt9#`2@mtU8gP{%el1V0$!~tuAZ0ONGUOV=k>mX4KT;y$=fRb11ip~T84``6V^1ZG5D6D@`%uBNCc2M_loOw{u> zD{2wW{mqseM9c^|Rrm}|&D>LuF+}9F{D_EU^>F02E%}buM-vW-W}8W-tWFl$`n`Ia zmBb7^T~b)`MqlHAJ@te_kHAb56U}IHYOMXa&;!<8OrFL%(Qe1o5)7VJ-9k$pAfrZT zN(%0Gu>r-^5(Grr2*}|#GjSane^R9q$tX?w#7fjbd1b#QuYwg}N!r9h)JbSz@xKrl z85*RCGP#+M%k;$$l7Xo_GUaPdj!__l)Dm>Ek}qb6S9#q_u5)xg5-e!8(<~PM=U7Mm zSEo|`erfuVhld*Hyd?@Kl~v~Jj6dZ3GMONrmMzyrXIj4{tHrzYtflqYOzCZ@W2q`2 zt~=PF2vosH16|ppK&4YDR*B;}wI~+)*m~4%$-af6A6DB9qtmyCrs?;M?)9WpB_R@O5syl$)*SPg&2 zC)3{iWQ73Hkl|Mm09cV(>o0&(Q4St7^THj283_S|0H*E<%+e z@Vw`p4Tf(bXpV}@L_bsf+ar#v0LT!&9!u?1_nn-`TqzN}5}<;$4DH_FAD-ne%I3d+ zJZe=?vx)3SrPo%v0x&!|i$f`3=*azfB$t0Su=!(E%Oiz`aL=c=Yc&(VW4<`;b^G;V z*S_LxK4Onv!pZl2Z(q+G)$7M$ zVo&Zr@>w~QsGXN8!Y=1KA3HZXNF5H#?h9*8zQ^zO!dF>^=1$Kh4{bYBDua_mk7Ef6 zEf1?+GjD1<9zM=@7CyUo-+I!nWIjG#w>MNl3XvI4!^CZ#cN-tw-c9WR}$G0Y!3H@-S#pR*T3qlQJ%jIFv>JiE8gEDuj}t5+!&mXz3Y+ z&OY&!zh)LFVyn8j-dSe3UK&?V7yUoB-F}SxpUs2#KShKK z7e_o~4&}GQvj|$dml{r_&_H+-RlEk^j@B*P9tu3U_&!Ljt5A{W29S^-iUC&!95X<_ zXiCMN+iB`WkR^Q)ggRogSNlamysYq+{#T~%N3UL%1J;;iMeVd7kDB}||Zkt9S zgOaHY1XN^Sm9Sp717M^K`66rUZ|9CySuq@Y2VdV%tMCa)8{ktpG-A=ZVZv#O0${mY zLDJQU9WbBVY*w(QQ4z;T@E-K}3v%`z(BykV-VuVq>l!oLmYZ%h5NM(}pumP_hONqB zS2_k#_NPu^{&mmXAzrYFwWnC!+nenTh1_2W{$bJA*nPJKb#ju5#1KdW#pu@ZdlkCN zk+5P4t^t&`*c27Vn({0vYDkMpqO_3+J&!Uk&&c*Z@4d=ZpEP$2Z~t<*!t;Dq?EcEG zpiIXbBoag%3{=Bfrr2UBPcE`VWWtJ@KHDDz^|z21LiMVnl8}XekAq=^;SOg3%*J`(YxeQ`}y2 zXA%|EXa`Zb6!EJrfhy=9^9REBr`CPa`4To(S!E!H3~_%BQ^WLOJ)NJ4KqY<}+nq11 zCOjruG=*-2&`5aMb*OY=l;%a$pPQ_oblK7|j8qy79*0qkm4}}@d`K%))Z4XTaS1vj zdtdKE(Gl0w-GRTYAGxGTbK^4i?0+bD(^?U2gpNBYH&hfOeaI^T1U|pH3<~v#!?tRq42-@!M7Faoz-q#+LE;dpWPwU%U zu;`HcCp7bQ=cvqv&RgS8QTO=5(i}Xh%->nj1`VNr^rY4T->y_{HUd27LUG}|Bj=!k z7ONkqO~5&8kW`3%K|ymqk}mq`C?-`9+I-hC zmO3^dhW?D~7MXDk145j5T0$H-Sq&H*egeixC{exs>QFeNkXNsFz*ys>Q&#zWL?y;X zMoJF+gm_4ZFKcDjMXG9nPxPT=nUT|8KX};5PxGUX-rJRgT^{Zv`y?Jd?2=?Ysce;5 z#}Wm%BdN3PKFrGdzXrOWHr}GE&q4QOCC_)0U%u+Hv%o2k2u@7BYB5tO^%z3USdw*2 z*3`jHD`G*rL7FKgnsjqQ@{OiqG^%JR4E)FstzE45`* zjWb9PsDwjXZ@a;@YK%H~)BG^FF`)6$d!S-sNdNOIlN{c7K(zbTJGI-3r~ST#?;Ujs zQxzN7Bx5fD+3}@7YHESN_Yn3Bq ztAvA-k1VVc8IJ*906PFS(nuE3far`}9- zrv)onc@YZ4zrA`!S99ELt!Vq2wqpGnu0!{IY2_?kYG5s{G?4LLw`q^?PQ_v%hLgOk zKH>qyG?DVBH+6dVlD|hA6LZk;#icY)HmfTd5NzBHqRXR^YmWRG6LrSYGYVAsAb05>z^;Hu}lK-qu7rvs#u(fB3%z~Z!5 z$|o7PkNYwycF>dNVF{x@H-NC}pXG2#W=i^kENud{JUC^o;+I+d-C>hGm&(8oIQA|Z zqWE~WHTRzl@@%ab?YjcVJ3&K=SY?~WUspuqo37Rrr{RMA`=FXUztHrc{3TVQDDZLum@zUnOnCP0r)JVN#J0m$3JCyoNs z_XoKipI_~@U?c;bx;d%B?kyI{qcOcRgwyl7*@N&i(@?R&j)AKoWt^KAtgH`;{lO#atb`4{~a z#Y^Sv?7qWhKVw}EC%U2%j)nYELAO-gje~L4J_Ta)Gp&9mbTY@GrA}eV(s_yu!E)>r zS2^U$sx9}4*^#iqkGi`aJW$!Rm)*THdK4DFHsfhxqR;9mI&!|g~TmNHTQ7gN14mN7$Mw5I-*f+sa5?rT#=~<*t zx0jIj|E8t7KfTNlBP}fL6PM-F*UbljfUZ6wpLo}EY~o#6xV#>k@&2@8T1q$z;tQPt z8*qS|suRdvHH%!Fon|XMo$u+K zno|}aQqZL_WWcQeV0=Ut;Ytrfl>O%Je90+Fv#0E=XRS4*LZlPzWTg=`rpKfJ?50q! zv2f^yVTR;kJrvit*u9S)CYYf*!}rpoVj_s4lOBb#dSy<}Ov7YGH|JhRBDqqj_I+jkw`6xtF@vOR-tKFjtwA|#Xuhs&pfQU!&2 z?0=yC`CNFNn@0AKg!&r_Pjyss4wUhg@uE-7-55AjoReB1y+eQDI zE`e$O^E0`Q4cF zD9NqBoiA}bYg>T!Y5fPXUu?T@5m5qW&!y5}xTJGu4^(FLW4M2U)hjwwFTdN|s>a5e zG}@mVcL1TK5HQW^al!Cfb?>Qa0RMEv0Et7yU%jwlKdBpkbBo7A)P>arcoauW80H22 z9xn8oC^nUUKLDBafQ+e0&4Hoh0>f#SF6HV>YnBJaF4JdsRxx!dchTpaa*|Na3%vIt zv;;e~7UtMnS0)(A)-?_9;Jdr2Y;;y6A7Vf zkOb@)v|dcbY&=wo^>T+9Yicb%dB&6R!bCRo?y$fFa0D$ncPXRvYm%j$ia-e1D*eOi z=tCK-Y3^|`T&APa!Ra@Grez_56*T0NYWfk!xou?OE7 zbq1qg$uLGue3A(b@^gxy1Q(r9Fl-txA3a#brKmwB4U{c+fOAp0JIhC^s|_J;<>oYX zvRa;xv&RRgWJXI7i9)`Rr7ekwhEEY$Q|DR6%1~L^F@lNzU#kUYGil&6Kfz4N<{GZJ zc=~xa3h-U04@sv1Ta(QwFH~B4+}JKsfXlK!kJc)YmQRa4pS*D0fm~jttwi{!SZ~sQ z^`YcCkJ8mfbmbxH<9-#bu$$+D?e8BxePeaQZ3>C_858}NRQYe6BTn%U2Ew8P;=F7W zl-c#4{E10?ciTepy~ww7?N01IKMDZuc8!?8Z|il>cDn|#$X#W!lJ-czan_U5tpu@F zAZ#5tpo(*`n&B8Qr7X%2!t)((R9QnKGIzDeqTuZ;oTZ~p&e=A}s8DgFCwaHKAFCU+ zn-eCz{InroY~;rIkdlIAU&1lKi)~7RB20sxR7P9ErJGa645Ils%zg zOGlVA(TKT%u7p=cBHM7vl@A;AwcT3fpJ(mzY3RrQoP(3{U8XuN(kJDTUj0@Y{{;7F zH6cvfG$nZkjVd$J(_d-A8P8)>Xp1s!hN1n1TgW$Dsz`&ShN;EyAy87qTc~qr9AM4q z!O@`{7%N&5m5rpLBRC66H+IFH7p|Pn)<|8R`tSFR5a`5vp zA=4XcWl26Ob73P?VFt%vW!Ok43Bu;m+mu`YOcLz}HrW3x<8Py1HZi|N!+yc1 z^@(fd%l!}u5=~69{gt6MVIvg;!V)J#3^CJTC!$ZB=RwQ&|2rRP-LH&Mg9aU{8A(sC z^%2iffh3Sq!Qn`tBxtipht!%M>WCWB>*uC?DbUXXCT!a;8Vs^)tRci9Vj@`<#gL{D z_wf@)?J%j8pbj}Ff^S6I%xW1*4u+{!!ZnQb|%uq)`B-Oy%?o$TW}F zfYMw98vLXaWB+O=z&k3@NKQQhU}scMamvD$4-pF@Ak z&hzbLmH7RNn6~{PX>CN9;B`2A?gR4EZuyGn@csV<$1wleCwrO$@9cK!b6R0IHj0P| zEE77BqunHvaLy($NshSfB3Z=1pYS{F+=48H|lOEjZ-M3P|-St$qn+ z-fPO#c&xaHS>F}AZ}s$W#XHfzc`h{oe|}LqEvkLcQu4WSw*`ua7j}-2w7L-e3JX?!uf)jlhOGriwmz12;ilmMx zM~lFWCGUGcTND_YE?zG!XJeEm^)YIYufX`Liw-oL8V-P~q%r-tds+I(=gvdO^g%;q z67q@msPA9wHu-0n=htWvohLVBJ7SW)mosyn;l+)Yi|(5e?>SC#Bt`P0xdg4=fRQEI ze3fDsXMjX0NQW+8+nK_Q+P2UVASW1Ef?5X~xfD_TpZ&(nJ%MF1rc`#4A9FtSos!Yn^Ly2@r=3XM6zH>)RU9P+Bn$B7bMUT+dI8Fj8C z6#C)36ejyRi@IB%Bl`ZlzF7*uTUn0b(kZANWR3V^37W!sD@15-O$GSzp56)JwXyH< zzn96-Z-MO7*RVlZ`XWHiU+0hu{P(7e!9iAM7rX8*bS8mTLH(ufjy<3kXNHS*Vq{fr z?z&*mye4gropUJSD19{e42W@DAE&(!Na9#CUD{hewN=d?Z}=Q5>_{PnCkI$%BDwTa z_z;}HE}eQgpxuf179#3V)s{v`bwv8GlvYO+?5(UnKjB&#j(P0;luQM}^RiLP)@I_h zqq*Y0O_PSO8B1`Hc`Emm@Sg&X8YbMyXcs^*H z`cUZl{}z7kge`Vtwu@(Ews%?YvSVpuIIDxsA5T&fr4>)=)zrjU3piXgB>=KEngGWL zHA6LHRYU@TpS9(gpYOgTF9W`qW4dHZ3eh*0DYL<7##21}o!hsVPm7w9HPY%2Twy8> zQ86maEWVmRVYd>>(+Pr-d%v70Q>B$mZ+VbX?d9?d>yie2C5#P~99US76UAug*OC(6 z&gwEjXiXlcPNcR1_pXLAd@Bb4?y?7_|KDa>)s5*|M5=r!I)D_mgH>*sC^Z#9BtbL& zA6HTu@Zil1{MhbeiO%j5>n1|GoW+JFo;kai9HI;nW(;X!8Ab|XWLU_xHx zMkkn+d-SbBLI`sqUzdUM3~q-jtn~ApimtP5(8vkS^*E6q=_i{DcK_>#fQSu9)Q0)^ zcVo53IpPvq(m!k-)e{&~$01aA)-{Nv+p+c0b(P*(KY&0@_CDT8WWFG0;dXPn6}$2D zM(4VEeqH~;AY{ zuNGPyQQ1B>TpukSV))A_techFm}HO~Od%R%FBENQocX{K?DB{^2)L<5&U#|E1So!| z6;!s;A7t zLBC}J+&MfcS$TUpPx1+;^>HlWm$49Wr6GG8qqC`1vU-eu*947U)fbmOqDB`OsjlT} zXl?8n!i@#NOsdZ|l6?^xpQ^q}_#l1bo!K$~OR0!mxo-IPhjpB-Z`G99+CLcB1pGZ`BJ3T-NM zo|qe6(|V2s*eHV?1(=py;d<0MwuM&0qB9SD<oT3YU^j?(F{ z;wG6igV!gcdp%d@kRQG`NmQ<#-R(h%PrJo7ZC7_puI=l4CmX=47$LSv=C@at3tt8Q z#SvHg#e8h+^ua_Ee195JV7`nH79Q(-TIkg%B>Zo1mOcW4 z_6AQRD|NV|{#4HWdZ!SnpmlWU-9lVWvS(K&jY~%C55{mPZsi^L37?c4Q@`vlr9q7T z=q_9uc0Sk9`$h!AXFy{!&BjFH~4s<)eqWdH&_K7NWHOw=@h`>bulY^4-fTD0V}@|WBA3z9y(M? zmGdwVb|44n9R#c!EB!}HHRRaO8_M~32S8!0_htFawjZJJSJgA(NAloCB)aTBj` zrnw@NVhNnHBIKe`Nj1wkRol~O3<>_68Rs@6xz#qfmP@i-kfDZp<*^v|UDPW`@Hxxz z@}Y{T9=xxH_uQY#*Ryrz640WH%YaXQu4gAIfA({mWFOo3{aLqO=N*xBcrIOWl`bCopV{YgP>o-rTeb?jp{4P=ore&LTLDp{o|=6Js&9V9vbFEut*D3ScW|e_ z34R)MHkN-k-GDkxrHYCmfHLes&S@XD$;WR`G?}Rd^K3zb??zmq)OS#-uJSwZB zkB&EqWBgw}VkF8b%phyHIxxHwQS1F_zejhCs=?OkG=tKjF+mC4PX$t#Py~_bHc|Kzlml`<=sor;z2y})|4!gkPd&@zseuANNnpsiv za!yKBG>F^k!`yvES6_YujDieb&O?=I*oL)m^q;vi16Wd#*Km&nByIeJ?}Fs!9O9(9 zE)9VqTZ<(XNzm-S=1RDE7-#ZXClQLDf{pltoow8kIFq9Z^NkU?j(GE==L{X| zzOP8+r6vPHL(xj{q)(zD8CG0rk8lyhQ(D>?Y$PO%0Z&xLLJS(lOyvy$#(Alz8{f)f zGgjOovAV@dBD(t&b#$p}7=fdO2Whk+Jo3`mm=DzOVyp}UsIvYs>fr-G={b#4niL*A zdqef|SvrJW&#;xjWdyM?DcRAiCdvLE$EZy|Na~1K_h2sGAHBX`K079 zpDZi=!9YQ)_OFD&luDL+O|4iq_U>m<*RcDDC4YMykgQ(SlRd=E1#9O8ctfYzsFuuH zQN_rPK|ioVf(x`L>W#fGJa6%ZG~`rsVHiY3P>LX=Q{uPk!lVg79XPj4X$V+3Zz1#? z>7Esr^f6SheR}=1=>hs|_o`Wex4|m?bu<+w-(pxg+s3%cyF$;VL&?>(ztcrwX(Kq3 z6*b7F{(Z)-6XUc8tWudO->D_9(W`j05REXtew?* zRv-gw9os|~HNLuN2KHXd!gg~*HN&Owv^aLf>OzK~)QNBq*eiiQFL?NhQ)n^?5 zwMo~3;y9*H1!wd|c@N$l%fOx<9$3RYbw4{NXB1pD=1Te0^z`Nq&K_PmNGL_&#T&=6 zGIlF|23CMAF_DFv5w3aR+t+~ab52VSPb*997bxso3@3##78N(9Q+$-}WKfWu{{j)i zRezbq^8{E!Wr;o#xo}nZx(ZlSAh0mnE_-7y*g8x`@iD=ja-r%ePnkivlMd|#YPXuS zNb&YZ##Cyb0x?fKhjhOvlfFE|J$oKr68h6vZ_H?)JkgIuw?b!HZco9DO~rXUr=bjq z4ig4mQ|J?*YV~eqpB-#X_^o$~>~_2bDT&uM2iWRBx~$hF3|U4xqr#iz$6--L%hjF? zB3HYQ4BVu&cgk*sTzFX^ktP^@j@fQJj&B%STCUYCaO!07VK%=7Iak3U3uXX?=DF-W zyuW?i2IFQqD`ojU_aJ`$4tsH7sBn8dq%P)l({wtBDj(WgJy;|0*vZv{dsuDwJHy>V zI-}OfKk-Z&bMj#ZE!ssW9M*gp{KtJy7Qv|v7!Cb#(+%_;bysZiqqvBCEfd%j98ATxO}e~{dPU}+*$aM ze)9#mY>p5C@*1{6sqslF9WKg_I*d|=!m?xr==(#XhLn5-8$K3Gh-n^35-b!=1U@ww zIOY2Nrw;)e8)+yvW#xDx{@zf|Jb9v$+b_`b@dYnN7UhwIe0?LiDwp8h&bzAP_m_#Z ziMk~97YPMznc=RJam(xShu1@&G+B-w^joafoYp^K`G3N;Q=Q>(HmDEJjR1oL8Mp@+ zjIdp2zAg+U!gGllbN`YUX^DgStiNiL|MDkK2$u*~R%V=>y`Q@gj1S*0ZgpX8w4pAK zt0DlvHm$QTc8i%CDTGENd3bIPi-~8|*DOR>JbHS4@LlaG zeDl5q#Ps1+%#g5`W}-SJTAt$wHD8G@zgo9DJQ;E#euAZS@4-FR5)kdwIXa9+W3@3V z>zDKrLYEc^0+)(oj7@)DPb|JQ+Yk1<+^*r5w_R}-;*ox3dS&cYnY^|MLhSP0(A{(O zZ7p{h<~um`%WVwTv5SaKPh0{m9eg5sZ!+=Ay*~bsX1`1$`ufr>$JMaZQ&y3=EC5!Vz+I$GX0UB=pK;o7|U2#ph%-ggOQq%Q88|?{zITV zn)`bhas;auA@~Pv*a2$?z8`z5>7c>lh77~AiugH?Hiw=7vwlvL%70mFTb zhgqx~t#n|o?npKbf>}ytI^4}FI?L{U#>y_i{VQV;*y?=L_-a1lZ06TNCaiBB*Rq?y zPQb?nF88^9)3wFJ#~L>?4~tO0lu}`sF)c+-O##{aZ)3BR1qJYTX8Wf;pL=bE(tN)r zm6e#=M_@X&JeL}x6EWhWH7(us>YCr?#y{S5{=q>GaZ)@HTw}s$VxKfHA6@DG=*Pej zoBAOE5BiOihZ2;A9R72sjPcg8H&MAy)Zw>r0HN!ef^J5RNzI3vNNG*a#RS>H*&TtN|CqU%NOi(ki&?Gz7rq54zyYR5%Y26pGNrA7HLT^}J#*}D=4-r05AtHcfv-&*4(o8X$0LPM#Qtd!OH zbtYka>Crr3BsxAvfc@dL4y&k`F*Eb-4$6PCf0F)k`vCLtAMyQVn@03yZRg)Cv5^cX zQ0sb@6NtVTkMHJ-a0~VJ>DkSPs^w>X&(gG{GLwf;|I*vlJ=nn?W3TIV)sKjbe6tyd zJP*?!qk#br{Rz7*HBUBaKydnYm}XS13}1-x$&+?Rn;hM)Jj*akcVv)ktqhHoG)P5^ z5@KBvVoU_h%58HbuvRWJNZ}^jMiad zQn=y5d`s)xj(KC$Mb#t2TD!OJLCPNe1(HP^(qHT7|NI;r3r*Y|o}Y23I3*CxYVj3b zc-3H2mYj{TUsf>DC(Faz|0e9?Hzk(;`~ILmT*Z^=NE2N* z082I6QVvQb!OX7HDRp8B&Z839C=zZkwY@weOT!8-o@?<47cl=hcGGh+gF$iJ7gXrq zHagS*gPfzg`B>TYcFOMOYnd2#1?LjPZdo}6`1N~-4vwMdP$Va^ zwG5+1y!!um`pTd<+OBCdxVr>*_u#Vl;)}aOaCaxTyGw8g?(XhR(BKv{xbyA(RK4H+ z-rA|!>AB{dK7G2QmWMnp3r$c)1z>OhqC4$sG}QE??B?0%+Ttc#t<*!9#_(0DVxjO! zem^Nfs)%3?nHot~T+ZLCyx?KPz5mrv)Y zy^Un^dmeuh9#=asF}I%+==%EmN)PF7w{^KW@NMnSbebAGgC6~@*ROX5{{>t0mO0$C zAGWkVCccu!RD`85mo?k(d)3{$#{0qHs&K1sJr<{adJuu%4MXCb^tZ2l8-XG)HGb!v zw@)K~x_#CfOpm*f|?6dg1s z%(NovtY~b~)>i-#gF`S`IJtoe2I-um5kecc_|Wu3QEBU znF@pNbiRZtIpf8jjQ6kXNO8d|W8L)GPIxC+tu<>9f^NIsmbW-7l&h}97|gNxcoF`* z_5*FM7FKtB-i|2F8efc@`*a%i(yuU)+vVt7S;qsFE00WjO-tj*Tvo2b*R0@VCYcwY z6L@kDa z1-~xZ0>`K_V{>#wifZ=t8NM=8n~a7m|J|M`+{re@3@Wju!Xf5L7g&B+bQ*Y(Sk!zM zL;~9qM85pI9-MQX#2=lPFnwpFWJBm0fISJaveMOhAKGDFay)@yl|A~N&RcAaD`vE= zzY3P5$EdTTJ3C~b@9$SPK{g^ou_908UrR7G^*(?fqv}_@N88YQT8F@R41G9B9=q$db86TTTI6t48-wQslgYz?KTYpRWw zCvHhO&Oc9CnE7u@Tmeu0vIaN7f}EUbkKF;m$HI)WrLmVe&(j|9?7TbJ!nwJ@8&^?J z=XjP+mGKYDE2hl8fAc2-UqyBn^XXmw@IhKS1h|eX*?|lEedvpu5?cD=6d18U5Lnw4 zx$mi6AwLcMIihuDA-;X&#@uqLVV6c>!x5^)$hk9eZyrD5Tzce%bnifpmQ{jHi-bX2 zS4UB*z9EIP2nbPPWGc?mmM2(bk+m+0edgW2@%Rc;)3pEjv>`pxeLOjoSA-Vlz_EWw zqKa^9Z0k!|Y$*mT2|@Jjnv$0D(xKbld6k06!|1WxH2heBFCNh`&5f@xb*f^+&4!Pt z#)%Z8otRh^WfCJ|Y)+BVW#n4<9=)_sSlxuMj?Xv`m1;CkSXqKDrPG9iU)8KpP$Frg zscBp+s>_H>GD0Lu5^uwq>l!$xOSjUnYjXu}57j>fsvHmPdHWvrf#bbTK{|3SO> z`RZ4vq1{zgI*fuUNMMEg{K$g~fQp?aG44jS=@H0>#Xl&BI2sKfK)?P*CFNaEDOb}@q&jf@b@E-Yg+ta4--;-O zU>!q|>*F*b6IX7W3NfgJu{+ikzdr>=gfTiPsR87w(+@;3kf!}AJJnBRw(^~yln=lG zI+_bOR0eT+dPX71#~B>XGYZ}~MK8cX;>W`K+AbJ{>QXin!e>+!PczTCb}`q_yFPoV z)$|SB%@ZQ*BJ=}y8#&(3Ljog7w^P%Ov~B=g5;}}{r1?m7#wmmwrH863KWXECP705F zZ{;D^n@Fxhmh-3*x5@ZNmD@AG%DXqql{!ziP0K29mdAd2goSMW6^rGT$D(m|gwSLc zl>bY^g(@yWjxRWfBqT@z@vYDDy;K1?o`k$cV{LUUv*kuEz`NiR0Sb2IKY7F#Sqq<)8!eOw(^0YeGgP_Q==i#@|4v22J6>tWUD=kYrh!2T`4 zmgEk9IZ~4_@R3ho^qCj0;O^*2Vds#tTJ6;w%D?NY2|tHkP)7Q!%cx|oJ8 zMsqRcdsR-Y&4&5ZqRS(QnW2>YMQ*4}cC`Mm`W}>Yb6rxX%5aR3nY{e*e_8<5+>#UM zJZBOh_kF6WFSpc^R&~YS2=SJfkp^K+350(9Fa-6h1s1IO!q)JQd%p;6NWN&z?{rd_ zP=~K{y~1s2`k0(n5wT(t<4I2I+*IrIZdC<@bW-y2X2>m#L+jr@ZvHG==DavIee2l~ z>A7)uRw%1B-9KX)*t~~8+iH$}A6dw~t@B3<3ck>78b` zLVJmv<9guZ=f}Y2@>y+$53bO>9Fm!gxX_r%%(XJ0e!0=--IRXojua0^{r5Z@ke4gqku-bUz8A&Vc0GWEcfP6bu{C`E+i>>!noV3>yz8O4 z_ONMDQFo=^vx`j5ctVEYr#XxXrA~!%4Es}$h%|L$it#1DfMc!8l-|%fr!_+ad5YCi zC#K43c~)c8sNh{|Y^v31J1(?J+n!IAQ@c^k5RbBbeMlZ$`-P!vd3wN>=bZO6)w6+; zY&iVRn+!j09v^M>0)Bs7{dwy}6L~Tk{q?KV2rI@>P0GIhld1uxR82cbp|3cPsV_=` zvVn_HZy^Z|yPDEmqCzyDoj8^eoxnDUS0vRsqye`!VbG#PMo~mkhX~rKF&)v(V0d+j zkydq>tA9b+g8MVeKIEW01=(7GS3pjXXFx*mvsKg~>xi2qT%J2{_g>Bd8*c=kA@AD;vQb#tX02Y$25V`ha-~W6CUU6F&AD_19HG5Lbmyc^DC8 zf_GOz!z&W~!pzhMy}k`U_G!um0 zryktUJ@Cd*9$Y2}vQOHL&Y=6!R(!mY{yo(mIe^>Lbx**~d=f{tBh17@>1hD`+h?Cm zpz~rEW8f@Q>~P*E(i40gfhV6Mt&1$decoeNcznRyz6;13;?L`!$D7nz-%vT$Zr7Q+ z%9;+u?MJ@D6xB8`!thB+Yo}kIMnz^w-}*_fgV219{-C~}=6}#@8v5PmT=?!llkPZt zJ~-g!-z-=3sJ;<^<;jR#E>zBs`} z2BQEw7r+aWf`_N%_x=LE2bEC~cJdvLXvCgxvdfHujM~7JKjKjb3niLfACHYOO*B8W zYvmjPM%K$@<`?svF)X90Tzd+o1_`H1sBr~Bl5(AieE_Ejk*VsUAzF%=JbqJ3PKW!~ zMw_UN94Z9yk>Eh*s*@Y4A_0#E^~1;ymV<|Yq_^*%ViBf@I*V3KoDNbu^s;-ef>qdB zlkM;wRifXua`7>Dz7r=dCMg!6_xye#(R%%A8R>CF!-T8VYz+OZsBd9ms5ipb47f`|f9`nDlSp-H|d z!U=~^Y6_!t)f7w<^c_2;|7+bH%Y9Htx2)V{CR{!44^3Qc9yyt!})$oA;k|LS}F zgY=+bl4YM@)>F#v*}?Bjx9iI9s;IR!z4tl0clTzJ)zaNPP04o;>uts1eI*&7oq)kY z(4Lq`R-N#i+r-fS>{XyGxd_B)R6|e;JMtPeo%3ZHlD%y*RUaT$63H_B@A$TRqY&3~ zQGj~8r3|sV}bdD z@``Q!0VXmN$uM7qR#Bt#h+Q^hi@Ibv#CLJ)te#W2r()X-zSHVfi+?LO|NF=f9U~_O zS4W>H?-^XN#Ps`lM6@+k9*M4;xGb$>O~^mcnHZ!_5~{J6qZYI`#vBPY@f}1g6`Y#%Zabhy2izMGu~%3bD=-Uo@Ti4nB*Ym*P;MSq1DC(WOb(b!TGISQ$R>{QZ($k5$IaY29xOA~8uKIlC}ApwTjaTD=0i^VvonZIuYPfF72!}gQz(!!FL{zFtJ8F4<{L7A7VWiofb5@E|DD(n%@w!XVPJjJGdMHVkRaVMBE?m) z_7)!nx+9BcBIsruIojr05cmvLw9BPZNWg{5fK!}5dZjDI!5vqv@l!{V^Qf>ufWKlU zC9@epXua4aH%pqcq27|>vTfZJCZct7AR%WPDXcCb^xOoU9Khvwgf6c9 zQBs;8m15T)5zBz4!kPrZm&yW`y|HIxO_b}wtU$6Pb&D440UJ;rW=ROv!72+?eq zWt%7Re!$@i;wKpzKD{*NyREdh3U}FDAO z{1T@bVn%#RMmj|P;5)ykBEJFztD@njc{I-_R7^|82V-EsVXEc~xfw?n7*k(%1h$_Q zClz~cbFXr~U4UKTp^Rqpgqp3w(MXS0bREnOCsMnPxNEgnyz?T)fJwj-%uoR2_Tw=+ zY3u>uNV+J6zu?DvDA1QfU2*@`Bz`2re)jgL>%&Wguyw8L;>c>+X)pHO(3&(mei~r5 zW?EqZrUAh9K$q#s@>R`UPVYzjZ++jq`atcOdzI0Ikju5wLp~Zv)9bgud!fomzj&)e zQOu$;8aA5#v&$cSv>fcR;I(@8U#ki=9tjAugEHHxxS9C!!5UNC#JGidFH~Kjk(u6X z-qBv}HNDag>lRM4Py_gTbM$&CLsyrBSGuzH`%)`*8zZHv-x@1CP>8%W>OrtFTJ? z`bMuWLKIMvHu>$wiC$OE&frL+6uxaBtPD--iaos3g^>{kWD#G12 z1reg1mJR!TI|m=#NfdC37npKAR+v3>Mn*xI&dy5|proX1wi0kZhcKEz7 zfZcwK+?R9~&NmuE4h%(ab}c;$@@vE_SsQxrtV`f8b<$~!D#b|y4RBR@$Cde7Re1g_ z0iSNSggC-$ZyK*_e>uPBeSBZy0+Uu!M7{7@&kNh@&9|zgU8bLC{=PN2c}`fmnTJq6 zi6M=XmUKrzm2&J+#e$K)7ia19f2fV3ieW=R3GoG;I2}mwvJVtcnVC07si~Ih<;9M; zIKcxTgc+E!pjsMP zTOFAGrzdfV>D!N6ud^A?A4*z=%kUNGKqJ3x z$xtMj()c7n-q6(G!Np{?Z#6Xdb*>s@*VwW-3A3;%KL%s4D~Z`Klx~5p456aRDN(9w zi4{I1N4v}()tkQm7V$oi6)8fnFC^Ok4@A`F-i{t((1IR`hwhN4tmF;y?G=*$(HC$# z{cxma+dY2FL?|dI%}fg8htAAptvB@a>A9r;`b5vh_)4(5ySrT?a%d?Ch0OafI6=T) z%YTU}w}&Ze(iw2xr3B$Js$1u*ym{AOG-v&Z zsPA6sXGbiORXzMY-iMb%MCYcagKT-H(;C-Sur+>~L(?a_C z$BK%xJ4;m4reiT}b=<-I-44nP-%;Sf-u7KZ%&ix@NpTu-P zjUXd05C{Pzm-|}&Gf*dp(U6f%KU!P+u(%*J z>4CK6hOwD%hc6%$w6cE0KNU37u|;KsNX)|5{k5W;No;w&#K~*AK@;^WJn;z?^=fr^ zN`7@t?dRl|YRZ(_IjAb^pRfa3zDg?af>U=*a`iVb_>(iFTa$+VZ)Z85Qz%{6!?Qo3 zBfoSFU;6R)r!cyv16|#am1F%T@^&2^XkXFdsykc`EWD*@@%j11>iK`n1^0(P{%|E> z9k`v#JBafPn;9G=LfzMI_W7k(6{Aou9CYd%q?mI1;~$Pj$*2TTQ-!mdbPO$qzeik> zcK_W0m(4d@qe|Ac>l|j+*_tBOHE}X%XHcn)bH=Z!hU4(Z`X7a>zW;Rb{){HWGp-l^ z#}>?wME3nl;vn!!+A(=al1!Us3wkYS46~r^;9p^GsF<`7*rzIjaQ zx|VT_dlAqE{OtvRC!jC^Mv8U_KMenO|Rj;<;dx3X^{`@VR`$LL~O z%dT$3D0aB?kMRn=O#T+HkWb4`1wZ1v#MPD5L9=0mxZ3jcF)gMAt>R^PQ;ZR^DoL%! z7;YJxe*BbW8M}m1VZ)W0XWVR^5-n;rAm$fg&MircP5}t~6a2QTKW8^>hLmp>G{eLMrL*#({oN zw+wF^6Uk@F zKw0kl0wES{jV*(0e&c(q8)!rde3Ll!x&)^icgKh#=M^)EwGj3T8aU;-{& zTRl(mN(kuYoJ7K0&H%QOF-Udei<~Qxo-3MZ9KLlyzPn>b$6m{uEQps^<>QbWmcgur z-fhpYVgL+u?}+1l5J6c}?3l-~0^$jSHinHY z!SsAme*I25zLyTYOoCw1xIZXlu9npkI>9BXq*M4$F4vc|HbC~Lqe!Ny_R36+u^W9$cyxKPz^qG9hhKv@io6xH(GQy$|lkzpL^5_V$Hot*xN#aL4 z|C0cqOU|cmKMk_#cRM@d7BFj+nKP~=qViy&K%8P*SA{qY!L19)15H-X`D{3k7Zwj* z6BTSct%poB!_zdInu26tv7m@m01rws-a^>Z3Ly1B?q<7*CVgP;l$ELj(_epTly{sJ zlr>JkXfw|Jhxw#dGC=!=LGGqF*iq)zqem!fA_pjeS7P# zjwVjSP4F=zkI%qz*?QvFWpZ3pK&E)NGIR6OF4Cu0!p4dx1s9crXS$MH{uu6)SOnTrjR zI_3wQzsm|hfLVQ{JC(}5uZ?QM$jUZS-y>N|+ljr(>(5)j95s$lVaCE8eyh+8rT^0y zD%0mbl3hc>{EIf(@3W^e@%V|I#?FI`M;_W|tEg~#u%8;-UU5d)FhWD5 zz${&l8r6z&oGHIhucCofY#pW`EC9rSqs=!bM@RO1dwk`C5Kk(9}PRQlIfn{ zaGc^7AB|n<#^wt`rh0DdTQ7}TffDm=60`(B^Z&01rIUN^w0EG}Tubm4`LX8)w+8mZ zcmkl_*sm#$7;I~_e~K7F2|tCh`jS5i^xg{OxUFb23#eA89hD2k;k>`U>p728Z+h;> z`W|uSXC52g*2nvuxBY&X=rfhXW@@=C>9WAp(d2w~E>wur6(XHI3q4{^@B6PaRb-N< z)_8p+DeNTP)s>sKz#&)@xq>Rl`5l2Cr-uIJTcAR+MlmfpWPt+onsV)B9Ry%$JeJ0J zfL?u1?V3!~lN-*zmE^3&oNK}?^4pBd(7Hw9FULDzX^Tv(wd6Wn@iBamMR{Lpd+{l+ zoS~aUH?ou&39U9`G#kCu&R-E720m+;xOxRuqO>i}7-9nR?lMm^+q+;PShx2?0g?MG z9Hq}#qV#hU#IJa02p&Z7Mcl?f_ST!yZ+@@&>`kf9! zUifv_`c<+$V+8F4l`%4iLNFA?G~~D^yHKkzKwZRuCHxL&BQ(SWQeY```3pw-iH#|9 zBd5AEU_lFx3!F1?B64NhqW@53y52jA$#MOE?`woUK=IV1lgd)Hkt4?HZ^&ARJhV-i zH$IjZen=iDJO~GR4&~nIb?zk)T$n?X1D~FmJA&4mZ3t5T6qqy076KCc0D~tD4q);88FnFei znmG#zrHfMUq<72UL@j^nU0j~Xf?BBf#b^^)ohR}!Glqus16B2=;9qZ2idn({$`BDk zu6%60ZE;kRZTEzSAIJ1Q=WM+icfC~f*;b)H8M{SC)EJ(2rC&TyCqJ3v58-4g}e?vD^08ZI$6mW3JmF(+7+Y<8Xs7rRGe7lCU|E8FA*d0 z!6;iM>acwIHDuEGnh4Y>CH;*9sq6S?m=`N}qjB(4z)b6?lyjFTeUaj;G4kYuRhY@H zoy%dB{i%gn`hGuqK*#Ku*10YBq5guM=_a3!To}-52)J5jkeF88KG@QcaO{=6QvXm< zIY_3wJ!ZvcYB@Yv=Am#GkuMm*%QYcWGKGO5R;B$_TZ2NSP?V-LG19y_beRsD1i()r zU$UVJYG{}fw?tI~>Aw-{Tstm}&r7CbK?$bPFj|crqJwt4NI;!K)QM<%Ye`q_=Eb4& z7)kS#RHr<)8Dvl*_ZN_azCOMS05+TXzLzz z=ew8x`JDgxCUoV6_TPA-E7sM+<2LMDmvPV~3n`wSBV_*T=JC_L;iuc5=NXR`lR5zb zf#-$vo}rEHj|W<2`dh6;XgPZGEF9KqWcO@@Yzw8#&{Ed05<&Aco4Zcs*OHZX^z~wJ zZTa^0GkG<-S`1N4#T$P4+VA#nS~d-kEQ$yymIf(8<4#Pv0zYc zt`qcSmEg({@2P^+OtE$B$U;RL8;Vr(6s^nxq~9cFrYQxuLC|E~@gg_V&s>~fEFoxa zAU=(N$bRV>%7W-mxaRe|jSCXuT<+}v8)d$9T+}`pPMgo&Cdil+XEiJ5h#-EG(}Y0S z9YgwB@?KHNVOu!QnLMVK=<7l1?K~x^n2iq*m3{da(LBs}@Q=fJ5Uvs$o)WKLU!f1F z{JH65tb4YFR_M1I7KSPBj*qL>pybh#<9pJ9Jrn3|NbF_l<9e?5&r;^IUYBRwKq}gqLAl%SZAuK zm=9(khMi8?jB0sP{z#u)*070vodNSh!=U;wf@E}^LCCMpWVG!1?W6Zs5F&J6h1UH3 zhaOLkpP4Do=+~#z>s){4%K}>=u0|6Xy4&(8qyq&UNjRqQ`{|ut0`GaDceYNu6xu|P zQMtZ(zn>Y-G8#Su|D)<0xBVU=S=PP3e~*x3X%8WTKVk}4RQSg1Nx9MG#o4;;FR-<> zb$ir(=~lbHAjf)WWB5vV=$zSX^ZN$8rkM~F1ljX1)&X4-1Nb#tttIx*n7w2Qa428B z#4a*>Q=)Mug1fkfwblC{$NglSB%x!MKxf+yHB1bkmma|XG4^b~LqL)}U#gy@HITw4 z&meBbOrcn3+Gy`ckCQ9IZ<1R|jTCZ66oJj|5u>ll!qhUaaZB{&98hv*C>1%`keK?} zWX-Cl9r;s=fdDHxBZQtlLnHWCf)+WQwpe~DcC};{3^^70)K;j(K9ZK-sbG7R`-?2Se+2j~Y*D!)lC<1e)Tmsia?i+k%mP@KI|U43I;Rx0!)zqt}_@wVI4 z(Z>IXGP@~hPWr}ge#DF;b|VYYVaGcQ>6a!!tLK1%zDa`z4ugk=bmsP(GNB7A zq!~us=p2_BKBO7LMhlexW)nvWV4mhRX~S;+_=iQR{Jv|3;ri0%(Y$Tz@|kI7>(UEp zHG&hk199?=prHiI7gkcU&CCe_h-Jjrsf^O!C4QjDax$Tt5HzxLMp9!e$$K=GYE4!t zX7t85*`2e?<|37AfGoX$nMUm&!rPO!L~*FF%R0)p2_Ql|9%zYJn$HIIlwxwiz< z!9;+@EAm}qRG0DTT-!`ls)OU|C!j^*;RUNm+rHan2l5Po9LJKYYP>pml?aexyrPuh zp={_02RHBN;uN?ka1Nm1RbjPer0EV9(volwonoaaqEuOC0x@Lh;nA`E@&P?#tMaKT zA_a^Zo+>0bR!i6L^(|D5=1G5<;J{m*3*m*73Xr6@VPso1@|Dqw^H8k$rfnb#fb>C? zC}o0i2;Bh*QHeZa;%)Ah2R8s)Z?hd83X#QWGK?IoUN-req|A+=Dw~R#M5c(p%noia z<_IMoxaDinguZqoR}&1Nx`Ll;O(hbcB}q#q63z;hQHRXc|3;|uBUljeBPWlZ|D@X* zN=YHY9V_J0Au^LM^O@&rVrk*y!eOi=<(VY3nn1Hm(y7i}c^uVsT2%KSr{&o9x|Npw z>W%OFRAT9sK*AriqE80z{6DEE@?97*M{LB&9S;d*ZA>UJ)BF~G+N{a_^x?1X-kMYC zqeIiK0C;`j;|Pnuni$}qWKxA%(K@xC&?xI+;~U+KNKs=a7)(xkkg2UXnIpfIT4-)a zKGz7KK-gKr*Lq%(jl0t>2E}t7c>xg~=%R6w`Y+0y9wzf;Kf}b{l9Vv1<YOxQJO ze0YAs;*0g(c>>G54s^d^e3bRMdVuKM>UtWnz<3UV+G<_eQE+cJsD|RQV9@#7>a@ua<(igGgG^XH!9{8 zZ2USUVV>2cW;=#=DnSO+kEyySO1ecLS^rU`hLAc`r8_?JV=x3w!6_@fEXufvZs(gJ zaK}!x+FRb^-s#8o$8?R2()LNUz}mZKgVE^VzxROW)6-9vhS&dw)KjD5WacbG)XdzJ zQ2wM(>7z~G>;ze^wPX^MiYZERGr&?cCEt@V85?BJ+xN=pPjDs(7k5&+OP`i=r= z3ULzBicL#?X0%Et$bd6~ZYBIOuEEi~@#PNXq#j}EV{oiq)&k~SGmSe^7Rdt?JXjhP zk&@!*&zMJPET02(Dvox|D^jx(<+)Bb_%S<)d8j-Yq@Xt)DI+A+z)`UzGNLodg@DHJ zqqj8w!r{$)Md(bvE6!-<-{l6^*a(u6>6wtF%WL{)w1C5(e$^^-6taZC8lSx#aqLCB zrwE`r6_&eWJqsayEQDQr#TSXCX+KVx)CSwQH|J;hLi@f-%GTM&0@a_`NNmXr`ALZG z8saQy{t2Z_YfELNyOtTq2{bg8w!o-1X(}ooXtc-@L){Mfzb>X&6p)lbCg!&P(x=CH zon;SP#sC;t?Jp&Ktz*OX={@P*Ond`C<9|WHDYg{%@|lQR`#ayOGrx?;PccvujP4+4 z_NZn09M~wYP@u2UjeH>oFcja_EqEC4((W4QGHO$}kBo)(m9TQtSxikKvn#6!7p_XC z->3k{lJJ-3`~Px&qlAmv?6yHmj4W8{kGdez!kR9;B$6a1DIiqOWU(oXgjo?h>U?hN zhn+>937BS#ntk@NFA_A(%;Bige?MrYd78qr__#NF{NIc`Hd$<<3(=Fuk*5yPlDG@{ z=}X-e)m>SvA$rqz(tm>i3>uyZovbB9x7AgG%P12e?uyg^=@@ef-q4s+y24pO6kzCZ zEgx_|l(nM_sq+=WdRvSEFhI>$sCc5a07^F{ zHv{bz@YU1*h;-uHwc<#rk~Rv*yp&9?IyoBf=nhUjwu3_WXB+zW99xzf@IoS1FH=wy zooZQo++Nm`1=o8mgzA6D;|uwN;9C;CepM(Hd9ANA;AdrY@`VO1u9k&utqelVU75;s zF|VJG$N#>HIc%Z9RN)^+dvTX5lV{(d~@ z`A7g9vAS?AoHqtgWH+*|k6m}Pk{p6JRP*4#t4pzGLIyW)P^|} zS+i%gbpNI-VQ$y|Q&1@p=OBYhk>8|W{%e_$?LejfO|&I2X(vo*_QavFNXqX-MFJfd{*eZ=MIz~=k3v&N_voYL z;?fm}{V^a{^34hMCCVh(@p!HUb5z`08SRO3Px|=Oh_uA*W=X;?`}|NiMxjP93izIS zca^g&(&`V}w-9I_JC^4?ZluX@qlrBx7isFY{+AX!d5y6>ZsN9HgN+q}yaTHj zo&QowHElws_%MgsB2GY5@F`?D202CxAi^pcLcZuwv>)=3th$e<;}e51dD);;3^Sg0 zUk+-85i)hkYaCBus*23oRJZ(}=c_y=#_A~tbxra}{R~V6*dc(0{Mkkk1p4d{dnQKt z;J)^is%U0__maryuzbGLZ8AgYUy22{B%>J46*~iiCx&XW%IxkbK3&1kG1!P-i=E|q zaYHT=iYz?vHWBq1btFYXNg=MD!XWwqD)J#S%`=j`PL35HTonP+*(R5GTYYQ6VpMMvTK+QL{z*(^3=goEBEyM zgIP$Y(@Y#cq<6hbzBuWXJbdrg&@sO)duN`d&}|9Tdq_go)XzM;jyU?4i*faukM%Yv z((e0M8GZeJ{O7obt>Nu0G4QWoa0C1Gtu)lfN3FM3Z_V0WPa~!OpX%7{*H6EW@O#>J zVqX0E=lTRqeeMCDZT%h2{By678cJ&F!-~T-baN0Wj)K_`C@bq#%C1rzcgegMoCI&P zH@9sH&oT0t5y4oBl?RLi)e0`LLJLFeuoNwBYvDd|LE2eF>okgw;-)B#Eq{nD zMIl1w!8!UdTJu&<$Jk<4e=@woIK)|JdL1!*CCoq)POz}eJdc4q9yKu-WW^w)RrPH1l6@=-!BP$uY9&mF^^tbjIP|A49njN*Mai4& z&KXwKd|R{E(n8TzmD}_0A$3pxV%U9v!3-nWrTspfoIC>gmBR!J1RMu zW=`lvRV9m>o?F6)i5z0pBW<+wXYh5((PQekjb^7zrRTe9mB@#k3H#*smSF?RtQ?LR z{>5Y0`W_V0v|^$cDXCRHr;PN-t`KaEHaX`FsKu3RocuG5lcUsOQZ}yCM!vWH51SsY zwPR9!t#0L4&tPLo0Qmo?1Y{1TVu-e};Som+5kT`tlUw}1JKSws1BVRKuh|CKe7M~Lv| zWF?`shwu05W12%cpH=l>yXEj@${=M{z}vBQ)M8lWc7o+ogvGzWgFO^sr7)zK`}XTM zQvpMsoHM6W$!Sx=_Yq>&PUjHD+OeBo>6UTNJt-+E$1D|e$v1`MIC3BmNC%^oWuocR zw(j0Yn;g9++EHJgInYS4Jv21)XBY-F^2ulrynHo4wp&hPJFX_qkia*;;#}|+}Utfom zo|A(PXeO36!XQ@pvY~6Voc)cAc)Ud*VCLKB-_ff6L)T0@7v1m1^y)T(PgmJ%9#_Ic z9m6qS3CkD&ikK{U`*k!+o-KLESiOsq=&(rf0W?unC5hd>P*Ynf{hJNMM9tBp_m9iE zmcNJ5*`*IM7>kz;9WdSmP4{)-my+uAO_5tbrjo*wc|YY9Y^*_Z#yS(jRSFa3if@0i z+02d)#JF%tiK3ZhNtDHZA-h$5TkiBcg|9Soc}tWc`jMvWjvarDQ-l3IO*Ee=JPb%QVRPXbvkOD^|;jl zF3wEpMSZv;gY%E*zgx6+UR_i@FV7oZi*N=reZQzPqRRjJC4v)_8*%3Z01ah_C-dZ> zEAzu$%o@KKZ+A!sKbF3^iV=ak{;_M;&Nx zCd^$QSt_NL$i4Ta#II=9JbJ=Yej)~&=mx07OK%^a89Q0uj#nQ%heB%!k9I%t&F+EW zZ~+GUjN5drksRNA&C@;~I*5<+4%ykQ+IDV?4c?=W@$9aj7e(?-e&^duU`8478-G&ZP zfe(Wm8J7`;=Gg;f@((C+Sqv||_Ym_-I*Zh0_Q72BBd4IcnRfYxaFZu|p^-|HKHA&)?` zJJf?6o}l9+*CFWEi)#h6lqDkEl^;F)ly!O294D(eo}(V+g^{cTMNpzF_aRM842!vdu*G z>45WT@VC6=KAc}$q@LS|#*-}xqa=C&8hT5PFCTxeN}mU|@1Pvbrmp+GzQ@*W&$CZ&e++_?-Js`D9rYVpz2S9xw_TiV`&b4AyxCp_Uun0F7+-yqiJF18 zJG?YJg(EpyMK+*i{s+!ovZ}&U2g1IXXw9PeTF0=K zMVz-%HJ5m`;9y|^vG=}O6+Zl2F6>`=s35Y-0X5cmEAt+^X}oy8l_GT65!vj7MepkI zf$gbNi6u|I(<7>+IbD5da(bjmRQtE!t5b?DgN5eVulb3SSIv+xRU@`eFfT-(wpRB)PBj zE9+=-+6I%cTK9y#H}6e#1!3g$(DbXxW4;vZHDv3c_bSXR#!7iPJ(jQ){-N1~55h=b zPaDr95Pq({a{Qn#vxnDfCU>QZQF5MX>Auqun|_?ba|O|>A?Qy6$) z|9Eo#J!>uWrB3ke0wH~rtDyo_@WUWxP~tY0Gq2oZe)4D!VL;Ufe496gdMxO?*rim} zWcqu?pf<_v?|dxOMw%X?ej7f4v2w3Rg(xUip{KuBWTuAVSVYyP3m*b(NYVi(PtBhQ z#UDj~3)rVo%Ooo1(AsE8N0LkvSNndkwR43K9{E{ijI04 zIzjSVoig``ZzC=p9?GpO7AzPiGYJ=!)RKxF`FcX0!En3NE#SF)#XC>Y_*-kt;tcKIH+O)QV6?ykXIi+ivZFYa!|Ay{#T;_g!1DXxX$4#geb^!d;GzBhA|OJkIwZpO!%0+*fs0|Die}-%NrhzX>~QBTR&l&Y+4rHO z_^uty=GglSG}KR-sNZlsz7gfaEz4X9Osuby%^T;?XPb3E-V;q%*DKa^DXWLs@4)eS zsYq2s5bTyv(+IHSD`00cpxp&Mrp9esvD((^F!AX^+pYf=N0*Jx$!Zu`SYw zFFuH%1L)q6W>)QX%o!*bB#vdQO2DN;h%*jgyKAWaqWiVT6E+@QYNaRLSoi5%S6UHI zH1om1hi7l$u6~d-tnN$rfMLye^ZC4nZ9w3(!wRhxw<1#wntdQrXxf<@Z9;sGP!hQk z@~lSUt($l~n?)8G>QkKQ#QPU|Rj}t;at?CBXf6GB7|@9KIA!CD!N@p63^m_y5>>Ad zFj7CBdSFp3z{Ic&F^5!W5ciZ0;@pqMD6w>H&(5CLH1%q=OkN-*9W$-ly{0Q$y(=Rd zTwCi|J@E>x%yOvCi%J=uq^4LQc^SsNxjn9KM~V>cMDpjbL-YLg}PvL~yB! zQH815B?Zug)A70VOuCmfou4)xk<(KUMd@hJd zV4wp@6G<+ucnuMRH(6~rA&4|8d{)^6KhE{^N8r1l*=t`Z4=`0}pis+|0_LZQL@FG8 z^_LNHq*5km*uG5>xH-eMJf_-c%Y2!@?XuL2&xrc;2HVA}FO8^eGIU;D9XCV@w;u0u_GYeu3a)o8->uQi@& zU+zkKBYxoWFiQsXPJFHv$cuD*hh6XexXfnZX1Qq$$}c8~P|_lpp*9kdU$wQC8_6tJ z)k+F6q8s=g@3~*=xRc$ayW2&$4(f7Uw{!6yMEXxVYiSC(r zIWca@{E{kG_{RB)HTaSL%{W23YN%->@B9!5rXovPU@dgob`lcq%qM3L01lS_fX z>suCtYD~!mz4Zqlw&riB zS+<3-PQyt|BZ6=s6gK6l@&_@yTs?o#8%_#KotrA!QaW@OF^k10@*%hUkcZQt*F)Nm`g_?BwN-%y5nd(d@dbgN=(4+eXv zF#UQIf-u>bhhWQGM?tYU$cUi8;GzV#UV@hn)qk7hAtjN*f^v#TMV|moAejs}Ms5{? zg%P$A@k@T^*%nvK;9#97YDdC^5~u+u$8n-hXKgN1Hd1)uD2+2mxpO!#Q+H)JP_-(K zAejEW?8+#n0TU|*kRK*7uBy}S-?dZ7_2F`9u2|yrUV`DKG$hvv&#_1}_prN>c8CD%ixME1 zXgt{Vm!M*jgOgO9h3p{FnZVTuDP9Q!PCBVX$RI*5NK!ty`F>hHBJe2UD`NaJ9D-?I zV(RsTc|{A*r|{@S9+Yla#~IRuXa1A9oId}rnE&f(>$peGs zuhaPV+P0Y+yY5xw9=kp9oQ+qyXp1|Q_&T`VJry?Zb6qyyT13{#5+3g#m_@usEFerg zqGxVnw|h)^ zp2}epSl(T09V{F#`)FCgh@$YAe!ZjbAU6Hjw<#kus$x(j=5sjbNZD z+j-55EjhNwps@nLIZzE7$%MtZig36b(#KCzR!p!e2K5(K6`+UHXAk~PCRr8^7BQL6DhMwBLt^UVMpLfBu;s19bHiWkR|akV-MAt!~8it^Lt|R zM(!`(9fzpM*c-ZoobX4>|E&esw?AzdXIcwKkz`RIv00HzWzRXfqeCv$*)F{h`~HC% z%}`_*7OSIC>NuGkJzs3)D_Xuh>P2RFS(Y5DL{K?oJ}YRY|HYm<(3S!V#}A*ol^Ucz z<)}!97Mtr~k)GmMiQEu(11=>Xnm=Q++95a??jm0-{5{-}AC7^XWPP~=4YJ;LzNbjh z(h>j@0zgEl3XyqR!qc0+Bde7-^NQOB6W=)o=`Y+%iY@wGerYz$^`CY;uZ*J1n-40^ z>>KC&CSZ)Bic^Bn{}7xv)<8%CakYqXC(ftoQ?yfn_=#UVr&5h*Fez)ZXr{~6w4_&4M zUL%?|GyBcUf-ep{lNc75wgrEV(!81U=(jXMAmwg$lwj{k^=|z<(!0rgja#<%-k;#Q zeP~Xnd;6OP`M!Tjd(qx2+x+EUswvBaJcbV(MPKQXUmol=vw;I^yk*Rdo1!7q;G#~Y zugmCoH|^}x&ddJ1V%LEl4NkoW#m!e(OzF5A50^1d_YV^&3AQ~hK=I4>P?t2;oIo;R zq~wo>qTg~3x__TC$ z=Xu}5B`mQ=#zZujZf4EH!C^t zPeaq3{qH6n8+*&ntP-j!z~C;y=Yi(>G-EW8DjP2#_>ZM2h2OoQXuRjS%S}JZR1}_CWR>oG%Z&@`|+g4n-ec2xLbgrig~o8 ztIl#AX65*}`oKp7YZr%j*?bA?_yWsxhx?{M5?o3vc1@k zUUol~Wcv&gp82_vi+{|(6A}^@$O&|vo!znYc(LM=e%&I?syN%2ndrRf+PO}5nJvNB z6yllAC4Yx6qAp_LRq$*&)a;quuu(?x5zRwFBRyTJzwK9QKOPacc>G1#&oL%7D0 z&z}CN4}Es(E<$k1o^XW`zh=9%c{nsTFjm`U<#s-fgl$|U3LgVK$;0-rP~*&mC<&qNON@O@Oq z!%hDM-S5fYxWJYO76ppRmMORaukNQ%gG-HuFvtfJ@-U=2>PXa+_o6E)xA!(wpIpm0s4xEv|_EHc^R>#uwtT>fnF?WFQ36=BqF9_T+y80YIFtm2TK zWxrLIUKC=?{gm5*@F`T*wLC@v3}38__5N;2t^bm_s+d}*BL#(9q4#Z%<(NNyiy9{$ zQP16+-5k>=kZlZUmF!#g-lLwYp9US2umf-XBiGCYV7NaD@iY6(tQ@@;S-68s!a{;W zvTJiLbvtDbu_xP{!l_H8q~IS*N))VmW{9qqGcsanw`Z}Tx`-w?Il(_skE^jf3s6-a zJ3xJL;bgVb-m_#)wa~ z?Xip~{-;9T6XAz{@p~UWFXc5yOa#1GO={ah^K_M{+7WY5CN(&^c-da7Nlas zZ2ee47FKHFxf;qJdyX|32#FJ_)MuA{m*@RsmUa6~7X^qLvxu>1^|OfI$d>Yzuw6Ks znps>$!c5I3jtG1&o(bVEeIR6vo=YIM^!%6;0TkiVLP+S62`vn*QI0NBQ}mN7*vSA> zqt|Kp;ni;4U7>neuYs+HdcRfIqXK2HK~1OpKZB}@3k?|RLUs=x9jYNTG;U+{XvGA9 zh6F_v7cxiKNF@}T(lF6L}q*2DjyP$8;uvPPCwUH;SxBJ(l3;@)GxzK#( zi{@DMRRQs^6?4wdRMs5IgesUSGiKs8CeDz=mwp+N+keb7?j)>``5OLYXH3vTvzXW} zI!cwdW{8>Clz3-S?@ih@Dju|LE-H1npd}yzb(NPA>@b;1q;HY1;FCj&RqouhrI4k1 zzpb032W2NBI1uf#Atdc}B??#qtc&-fG@E?(^IL1Nsc}qS=g z7A@i7ovlm3VGJVp3D?gB$boOD%%dG_l{2IkTnty$fgLH1*cL6MmKr!*%p^X|!G~s` zVI$4~WfcupJeSx4>^_&IW(YwINdYuzI74K~b{D(_>=L$NNTn{8oSGTXY<;Dwd?J>b zJjp&4Y2=s41b0#&CCn#|_xHKQ_sqCkwo?n*61uxN|^ z|BlC=B!iCyycd%l! z_)2tlgl376ELpcQDobn@x1Y!b@)g#*&N_6NtIbJBjR-a5*I=H>{$*N8$}d$=mIt_` zS~7L#L>N2be~;-N!kU1Jn?Ja<&4D09hL4V#V+fs<)HDF@UK3ysax(zSqA`%jCw%s? zmr4nRd}&Y0(6EK@n7`>k%`YUOPNC0&+zpgL_s1lcn1*A$ho5N1ukGA?H-k`Mx7n0Y^@ zvXa8mojxB&Uja3BnE5aHXazXzKwQ}s+jlN@_+Tj`F*=e|kOHsgr@kuQGa}OcUk>Pv zqb`3_Loem4_)xMq@KT~kiMSp3D20Ch0GYJ#Wst7)3HvnQ^oI z5T5w?dzVGrE|GcbRdYDtUcm6J9vEFQ;ZANm$45Q;z~$LUk>x^l9G+du6-q)AkUEB z#{r*OMDX7C>`I&V2?bYUf=GS)9sWzpX&xLhVq3M?_oRQQ(6J-Z1*&Sb8_>L!J zC4;wXD!DA!w|&0PnBZ(hQ>kvB1vTfmdOXi`TF#LbbVjNYW{;e;s%#i9oJO_`S_0Jw z9j2u85>gt00yo*xS3M%d-=rwrPXL|n1A9g8-APrlp9H@(ztUbccpI_De9dWtbt;Yy zVQN;4W~kzF--F=BmOIiH8GNo}1L*zyyG&*=m_`^&wcr;b-FJ-QLQ#ka(Nc~bzzBx?6&h@4RBn27kulgqmCKqn3UIMCa;^P3^of<_wJt<3g~5SA zI95;k*1(}%QozJQcNH8ii_H+OjRc627TLK+4~ELNbQ}Oqrl)rm$si<+2`(|_ajS}F z7BKTWdrgoHd#cqPS>}zu>kAnwUX#G6@(!Nf5>7r(-X0*nAsFY%$SdGTZ(NsrST24K znC`a3T^z+A8aQ!}d3x||<#Kyr*K2j8WjZbTkxGvnbK67(<52C%qELB7znza^)(>$! z6cST0WZug(AAH;3l39X=8Q=R$LzSR{q}V{9Y)C%XRixyZac4JB|24*DN93P&nc-8* zWYEg#PUY`9*(^J8mUtEZhF_tev;_ zXA2ST0NeD~eu-G}wUHB7HjB3`HY!j^bgekbJZ)M8)-2xJ_cnnOTF$ts>UG0|a>=fv zTb8|Q%jZ6VqV)dM zs>xy#;OUqSJ0gVp!~Nl~Vf_{wU*9L!=(wfl)~M+QccuetOYlucv2m@6i8~{dB^ps% zQeb3lFyjGwQ;Pc*++;0Aj;aZnDD<3021V?R)5&_& zZ}yt-N$t$VGL*y_1hTcRyxak-b{o+CoZZDTeWevz_;%s4y zlsb_PIqB+ba}!YY49o^3TrDchpRJ*r53QQLigTrxnP_Qt2)~XOgSRd{FG&!)|Do`f z`D~%gzZO6GrVntn_+z8^3wMjt*0kZ)v(Dzn`-AutwTM_zQIS`!oUX1eaNT{`cqG#% zcT9NmD&EG$@;~`3Ek@_oR-_@#g>UCTVtYKYFAG4bL-Iw@fU_9s!(wGXkklX;*V}u< ziB)SR&ss4~X$)awW?ZrU5eFBMT9Q0d{~VWIe{y%Iku4?8TyCGV_5^Ne zna!#=UnsXeU|O5vn{yQfGmI#JD@?97c`wP0fMEf@DK0j~OGKvfSO79FjLs3?{`6SV z1?uaK9zf)Zg|Hx_RizULnkC(r$o1nVMGd^TVYcPE8eiOa2BDWZZ57@@!Kx~v1MZX9kLtxV-g2%0z=hir74r7ZYt zKOIlmC`Sz#ptATJOWll9M_u(=oWjOSnQ)h>e6DZd>oKefG5pI%2lC$dZ|4HOP@Z|) z(tEThC+ybk8h!*HdMn!tPKrJ_(C_*zpnc&Bc#%Z<{cVKYJ9g)Re5gLr2{kaF<{IY| zAHd{R4I@i!)T_~AS%^^yT@}wE1cOaUN}hUJxV_PUN4&@(BrQZ3b~8BO)p06L4Xy+M zKRe1~JtOJ9j?Ak@CQaX6$i}B#CrfH$4RkGXnsj z(kDHdKZZwj$sy4b0tV>|Z~}XJiaj$OroGv?PMdvu3ntcdau5t|?1fHG-*a>_`5!KS zzkqq3K-U-U*4fsx>X+)b6&qO(w)evxE9RcF=l9cLvsGNqDcib+Gdl43ev?;rqc3n!~v45Y3K8BlbVl*egnSyhx?RoQ3I(bf(~h0)*?QO4OwmbGrkkNZ?toi%s46ibJQ%V zO6|Cs6kH}Gj>ZX)_aq!#9&!57&LUNAL@&F(I3XC()^Y9_>-Rf|KgZ%n`kqt9y6&Mw zYT-LCIZ8E$^&6AN@|<>p!O#y6ALJTP_F8KcGn)@#B;D|e=fI2rhR*D8@(owl-L-Dg z1DAcT199a2C9q1zs$K)-Q4my#cNTwdug>mm?>Zq8F4bh->>|L3+h!I^$D~5yPIbKh zQ?H5#fs#`rhz&nQuXH0tC@>NP$}`l;{bv|mhp?36O@++|eZkNyrajrD!X6xAV$*~+ z*^+W{@DT85BxYa=oRRN&vo;fMM`tJT<$6639-Qva_BpB8`#NQ+6NyGz*x8x2x~k9T zv^g1pN}Q3CQv&|r`1tcbC)eSAs@LJhI85*l-o=%PVw2;plf~->9v5@I-n!etR+jx0 z>B)~QsG@>#e4i^NCFSgQC;qa#KKMJjCf>BUhqL3OqX?ZI=N5M-izsMld@cAfG9eWC z;4?&$2V{V|bin`hs<^7+KR4-zhgeyi7?kZaL<4(7v!`3p_IiW}qL7CnL?%RaP&!z; z4oREBOdA;2^q`qA@rGpHa-rl-HMcH}he*6U1Df59y--zeHG556P9Mf+;!}!Q2T@aZ z_B;z4Lo4;<7agId$lYr(;%d~)JTF(Wj361kw0P73ch>mufPHGa+`gVpv;2z!cXNnh+ftG*Zb|r}gAjDht6?)B|oZu09@0nN5^V zKZn<4rky;Vf9T9=NQX(_T(b5jky0zp>^FnN zmo#De(s_^R=l{(LnZ&FJ=A<2rVp^S!^$d}Lo-IR5J%)nrONy11}@xcKe&ev@|y#t}mQ`EFOU z4JNPd7DSR+JYDbm-4>DWOOZcg*krrFW$`kIu ziBs0AEe^#0(2M*V&I65K$^TmjChS+grZ*L2w)!bVJ=T8Qft3x6PQ`8vmqW+|ltnPw zZpyedeQ9ABBJnI|Qy8vOPmrbqXe{Z?jCK6#h=>HK?sap=z1M#$rG0bAu7;Fw^)8`z ziR;y&2MU*dq3^&G6+K=^IKB0VwRc0 ziAsdoC2Sob99K3}MX@+cQ86W+v$r~Uz~P4Jz$-33-1ehxp21X+%gi7T!X<=|*7dR$ z$80yz)DU@0E+Tf9)ZbW>>UGe+M9Pvc0nu*ChIQ9mX;E)4nq_|nhMF5FkL*1%M;dGg zRSu32^A)G;6+oX+@I)^))3Ojxi>MK)`bgnN)E=7xfhOp&>EX=4*z_6-@S zQqCpzI{rrYZk;$%GQt7`EsF=g#N||*$14{wbLUH4YbM<_*b-Anp$hdeA?km$-^el8 z0UuQD=;r71&E?r6<%J9oDV-Z~q*FiJYlEx5L3wJ^cDoX05R^dk16|9SP7Ye|wy(Pj zOFzCqNI>w1Ui=9W;?jG@_whQtcM|+gq33ak{p%2}?%(%^-aLMAPb$PeXsa2R;Z5w= z2FXavzvahG{@4fa^(Pp9)N;q*xBtt%%VqaN@)TcSW?X#y*AY_BKOJo3Por{e_iJ|T z`)P)4k2^7hWMl`gH#3L-NS>8C)jR)MV3Xv?Bx#KW9NV_x#K6Yw*`L|L zkZ@u$*9xGnQW6NZHM$^(XSHV9UrhMhZC<6&d!(MTnA`-$#$NV3_2TU%D83hJDA~~FuQGLhN=%B5vP#*&x08T>9IW=199d@lq!ALok|BXh$W^~LJDmt*vUqqkERtO85Fv>JyNoCSO;Z@nIU z_JO$_?`<&jRbwK^Khu(g>XfpPG-D1$2eAu)-=fnGXEkUKyZvLOq!3uobm?`AM6iVW z1Hf_7erqe$iuSiD(%HD91D-+q8xColJBecaPT>T*`Qh(}hW*i`2#Wb}?;PW<{k2LL zq0)>1`)^XcUfFZGp>D|0*Cb(@D^&^A(Rya(uq*OZe(a9!#^@|9aD@Wv!^dX@zRp3x z!H$+}#Nt%kjR;bm7em>X%$$%hg@ew)7PDPb7I(g2!ek8l!Swa2hSd12issF7#NZFep~i>TPAMh<_4;-=Optz ztH@=q$naG10t>`3}8VmK~Rc{;+PtL#CW z0tMz50}QVBn|1{Q>(+3{*1Z;quEbVW7lApI1_PF<`!$-8igeDg77mkbhS;cFz2Qm< zm!_skUz|a2M$~NzM%}`I8T_^f9s1qIdJaexNCg^Nr!j=GaC1$ALW9hF9V+Dw`OGUM zLJ2}8S&2Zi-NWfS#9)qe8GYmu#oZ=sMJ`rY@5(Vs%*I{q!XVpKuG>Pgh}QE#RI1l$ z)w3k(8#I64=Kh3MkwL3NwgS8S7{YCJ%3L@?T5rL4K)JG!Chq4bZ~@3qmt;qaQhi6f zFK*sMjjhUV5>z7S+d?j_71Doj0D~d1WYY~i>^7P~f0)cT3{{H^R zxdSfQvW`=Jhi~8x{k}N<%~3G>T1-{^&24yOq2a8lim8P~wP-T8;X zzMg=*G63EHDjL!{tR!N{+Rt7Mp1X$T8xJh=FY_>xtiobcW55n%VIuwdI(VSYTgt9O z4Kk!HB?Hn=9-_Q?a7zPGO=3h1t`2XiKNPYg?Ax5N{ zFeqbDSlmVXWY?I?a(ph?aUP>Ma_1uAWH6Jo*FSCg;}gC{Rdnsp6?Q!>=6iMgL{h%DO0_)UOt?Y^E+hZ(CQq4j ziI|!@eG=ljF>l9r&?iY%`7UfdFQnpXaxy#caJZw%5d+QU2-J|l5+Lv)vYvJMmw`uG z(_0$Uc1N@!W%~gD5?uO2Rt2}d$@PMODKoP_75Eg)m_9jz`xP119H4Q$`5rS8_%<8Z zeY1A-E29$%9$kVs+b9if%SK*E1Z(lAJY0H-%9XIIhiySQ)yxMDxZBU-^yPbfG-heI z+1vvMa$9FH28x%MQmO?P%8KQWY)Y;vQc&z~hM+{OQ{P`conI*XJ&(unk4{+fg^{ja zwFg>excY|$`S^|ltV;Scn2ts8W~%GqN_a^nC2%6jDF!De0R+P#-*>5u!bhK7ba^T% zQGm0gE)*rm;wvNlQtBKZ*5ydUKOxPJ`4jZhyAs`03 zH6lFSMsay!MNPr)W`O>C-`blq1Ey#FqcgA=G)0NO?}}RwM4*BZU8Mze&DobLQX^k4!X(yfVB{1))blh#XkWwG|6opZw!-B(H(9^uMHD;x0Fo-KhetN|;1>i%)6s9_`Z_0mWFHU>b$G=kS6| zhEF;+=^(9Wp-I|2RUbm|Vf*rA=v)Q9X+ZgqCXPLz`LqtFNF)R>hr8NsmAk5X5hLK$<{|2$t zs|Vd;{bYjLrlV3Z-us$GD~Wdv*vVD@<+O`LF*h14BjEp*0S5PpD)Dfm8H^Cp4mYJc zE^1&UMPKGXWCKh$Oxk$DQIl1LS4luhSAH1~(xq3iv4&Ic_VH)eekOMUP7TAVJL`EU zDBT~wb~`^Vod=tBJXM`oQ4v*Yx+b6D`zI8=B}f64Jp{ygQ4Frozb&dM~mlCRi8 zVg`ttvUTPTlZ&7%AG~Omr)pt3;F(W_A7O34`NJTshD+ZEX~Xy zqH?(Y#esQ`gY=K1a$@}rRugSk!^HaFXcGgTxYnTg$NB5&Qng*@^nX$>JLz(KM_BfR(38jlp`9Um`g#^2@7pw^r&tsHe+}8$GY_Q3aLnjcogcY z5^jW1ySVbh5t7s4FTtpGE}pc<7z?sHHUN6#1S(X0axTI0w9g3KnIv9psfwB3idNiC zWgnWD)dCf)y$`gT{``G2J>k*nb+&8d6`{ct5-g2iV02AEBO?M0{8A|U8&x;j-D~Nv znC~}av3wZB2GnIKaUG(t@QIjTwj^YYCx7|cWW64L?v*L2liT`jV~&i;P}cmgMgX2J zifEcDOaePy*;}975Lv>mi8G8_CPb0Yg~O4>$?(Qv4P&etd+g)nL57C3-6FV&?ZBKW z?9!~rC+jP5I&KFVpQ7R)qE#8z!^-gbAh;_#wITsday1(*D&wrrA05f%KgNBBUEOY@ zE$vH+U!CqZMO15kOnwCBxn6WP-{)QwH(nz8u3+Ny(+P!yAcsaVumwSz9!`v+ghErF zQ0yYyxRS`qVR*{Q?N8*(Cd$BoSi>+762tA?k}p(i7mZK5AF^*=b~jDtQ7LJHfZe9G zin_YLg(j+hsEX$KqD@EY;K{GDD4xVGi}!#2>382A1m&{mk-(3nH z+zyO=%xI}IB>c8}T}xcD;QmaaTkkkPw^Vf}NXbF++1S#k$FjPhwl;6Nh402Vc%DQQQv;IueZg8 z3BsGS!T3d4Ql_+Pz}H1~yna%^!8W9&?M)G@SZmUx14LNX8+!XQuB|a=yMe`ybtz+% zjt=6~FhnzY=N`&o=KN2AaKMzrA1!9mu*CWVXDds#)Tl5dhdMOhqb$yr`%0axm8jMD zrZ=6<$4HJU--vHb&XhmN)MsmWp(m8b|852N>qW1V69n}_gH6cz~abnYgwf=Jt zv~HTrvGD$;1udpd_Sw#G95NnXV);bfbA2_K@B&n$5-bI#)6t| z)A9_>B(z$=D_|E^sC#tlPOklB@iLd_QO}2$Dl{5o#2?*J=U&JeC$P8ebNM{Zhl%4l zy27r|hRB7=YN<)ab)Q$y`}wc--UN3~aG!W}#2broim8|{Bp(5#=41)wPWQRr0e$N>a$>Edc ztl1cdNE$&rGJuE*8X~bOz-9VuFoE{AO{_az!yX_gU(IQ`M`U$a#k)w%|~|u!L$b z9%pUTmWr80F;cz=6JXH{#aft5q^WTnJFCtnSE4ibGd&~#Gr1+?KHc-L_{Vc2cgR6U z93%T`j*88Ru`X}AZw$_|BlY5J93ht^8COXB%%wKJLTiy8Ai0YRG?1uVJ_aN>LH%qT zX#^D2dhyWWBr$q}aN#ly84 zM4(ha_?hh{+985r)1cSyhlWk#oC=VS9!;k>r?i{b6CYG0jJ7Tq1~F^ksb^c^bejbA zU~C}uBW+ls(t%b0l#VL3KMlfmv4oQ3ccBavI}n|N4D6g$&H`zqo6w%{aIEe_iKsy_ zic9%#RD28x?M@7?@}toctyTB4saTGs0grsxI*H??r|!InKbZb=1><5?dC^?PzZEW? z-fsPQNig2Zl7D254%Gc;HrlJc*F)+CcBb`y3N%I>OecS+D1Jqdauw?xnh|A1u>`Wp z8dM?c5J~&lQSewoYG>nx%%JjoQn>gOpZbkIbBfQNS@*ky@SK?2p=Z)O@?j4?o3 zFk(i}d53cm65KYYX0W~qp!xog!Wr9 zT(%TAVn1r*DNqol_i!uCJSlD48Z~gd)bQNmWuay0us{*_lop|;GLnpIsnNnjsHwR! zgaAIVC3o1VwPaLY9Xsj%m~K_K4M+wy&lI#J4VZpSJJw8#%+v=l#&G~&yC%<=o<=er zp5742G3VSDk?B!Nn9O`tCi!J`6OOo&>Zt|G#wtG_-qgb-8OSz_Fl3u~^(=FLJMNf- zOu!YbS4FoIV1JzV`**^Ku+#aSX=|SeWe<0>xfefi)U|kTe*@I_hY`bMQiV2fc2Ymtt6lVz@eb%6&5&?{MivzU%Z4c243%l+YP ziuymF^W#jn*e#q_r<`)&7a~TzM!7sQocri>er)c#;tiqPT!%d!FROkRXsz3eVfafZ zFHw>CJURa_?-4Eg)eXr?&EkQ!&@qP4RmB28L8Sy0A#WD%(${5w_OGWiPU88MHh(3| zSe;>=KiVq%{yfyS9M+^eWjR9K3|+LaY6^aPPRo=ZDOll`_?!>mMsgA$Ah)^}zFG}# z1E$EAVMfEi_R5#+P#?5hUvQ&S5w+GuUv8Fk zlDSKF1woSsM|Jtfk@9{peB@|kV)$a&cLLVFN9Pt(q7#y;CqfmFeAUE|g-)1ElKQ_tBD(oeZ~Vqu!XI^W zI9=gDNuDrOk1&c$c>{-*^j936xzx835q95*Y{x%?YX)EJPDdFOX!%4`7nbTC%cZ;< zT$x*{`#&~1Q5#+9Q4LbklQ}jMppu7w5k$OR=N{TBmI;0dK#${+ylgpt9D+iXI`0KT z4iG32LK1U-mF)>?*BxnQidBC8{H53eD);idNd1Ub39kr8v|G@gxY#&7P5b+vSu|`L z53`dW8=l$m4=~>SvOq=Oy4Yx=K@us30)|wxfs!obd=4z7oKQ6tH->$lkz}6BIdp}A zeyUY`>i3wLdyd=}>=sHV3SO)~Vh1B|)zQW$D2k=@P7;*XcV^ur)Q<>zSQ+k%HgI&{ z!ItKXmGqeliV}wI7Eviwpu(UyUA7%)Yz}I*IUGX@mel)E!}XtvnJG_W|MZ`T5f=_) z87V|b8CKxC$2cDORpCDf*(h+-KcC?<$dX+g%9{pmXsptXcq6EqJ>sBXNG}H=>lGzbQ3eD?$`%?Mn;nsL|Y>8s9Fb90252*C<(u}iP(ZiELe(I7bRmBr2;hmY*jBvZ zV;Oe>(hoS`Eg?2pYd98NL+94?vPF)acEsf3dymVjDmW1KO=P4FrrVBeB-LpFum8lB6ff3q~`|LG#)BSp># zqX1*#%O7wFu@6Y#bhp*L z9XY}3ymAe^-H|~axcvP(5C-~86yBM|fDIwcER#DgV}Q^8?(a}~@fSYVz}VB-0a^=x zvRet~8-1-oZ%xam_WMNawC2|4W_~9xm+tk%n*HD8UTW)WBRVa;bg21nA3*FRweULk)JD*t!%)JSdU76t?I+J6`IFHq}5RUqSu3>AB0`;L|e zxui)(Qe5eP9l$7l2BZv&!Zt0O=8l6`12z2uPz z3syWnh#dXgaM49OQ7K^#yALtM-qPhb?Jl~!QMnH{Jnm@mO*Wd2LV}kYbnSZ2?;TW3 zt*hT8>U;6oGvi?h?T$a&0q?#YW^iF}z|tdSM0Q9q@?!y-%&R20K<1jV&~L+7M3|}H z&5r$CL=E{IN~tp?lw@)^7YIVjQ1#6f7U|_nMTkllUHX#b*uJ|?7RrU(Z9goF_FPTc zo7L6#UOEegyX{WKY0Q95gAiQqe~C-SbHBjuT<6=G@~$Pi@@j3M@Ya-=M&80Ft=t>+ zm6P@*bUsqpiGL>u` zTAcmxlLUD7&VVYQeJ#ASE=0n*@18ksEBGt9FV{umxfwNT>wARE== zW)SXlh47R`Ki@pNlPjJCJuDOlTp9VkEP3<;zY>&&QBs+Bf{yQp(^$`Ae8?zq=2Qxq zz1>_a)bh8V+@ch{`tG*X;5#}q`KjCMWgWoG&8P>*rc_?gWve1O<8Q{wi%dt5G$gIviU#BCH;eD# zNFg4?4T8&3S*I33VTgJRIJ^KEGtf*FO}db0&5K=f~h^ zzmouwguE2P4-!_3%kq3)D`sxp&@73HuLKKtOdU>q(9fMFB_`U?z& za8yRYSg|2Zyb!^0V2gW&8Kd3+8*#$`oB#q^BI5V(P?Ar%`}zU`mvZ!97|hbSuE%DH z$d6_ryPvR7;ahw7ai5<*(|%s~o(rh;eTT1VWW2YfL=fwgkPhG_+u9jHLLEBLP<9dZe1c z@F)&kv}aHLFvk7Zu(4F_phOKcQUau-LKYtsG|?)uBiY2S=ugmLx$&Lq-^3(TmU}VO z{`+967yqvikxl}_`E5{*S~HsH>4KJroMebTrT3C>viH7htqiWvH{U^dkJTon#W_nn zEwhSS^c2Cj>&E%f6ytwz4oi1p)17}fH2GXtUhqV`RTdjlw88^A65)7$+N=-V_9B5T z*1o@l>rUEiyFTGJA>2>riWKo8nk~#bT6)7d6)i;RVFYw!$@2(a=I-;zOq?%2@A#7Z zvq~@>*FbKm5cKHMhqgUETN9vKTxX;YE_F(dA6r08l;*$QdC~Cv(AuDkA7ds(oRer8 zU?J0F5$W3#?nJ(o6tcojQkBd_)+j)h6;e`&udkRY>Q#51F`r>JRcVu)`D^F^=kSS$ z&FGrXB(n^>=8dWGG{A}qV{U+XIpule3wZ8M&36lMOe+p|WAp0pK-AM(k{K<2D=FMw zb~;H(oRmh0e=W#;6l6ZwFl@%5{#P^IpNg2fPn)vDM%fz%GAtO)HMC!h9$1o+H?SHv z8Vq~W>(A>|!5?{l50pY!9nG|5(DV6G)|JI1`qj_Pnad%d2AULyYO4*JDoc?_X$Ykt z@_eIABOM6G05e|*jto^uL^PUa5U^O8LQ%tJCJ9(6wvtG}jV%fP^-lbavou0Als!@jZVGIjOU zf5E(*q50}{G+eB?x+$Y2`QBI=RyX6~Ox-J!u>y19<|k&x)GrnNs!s4oQRB43rq^0@ zmF}$D`(fd^znOE1TG~K+|KAkr*D)2${4qqRlzRwExUZ>G*4Cfh)nnI&W%y zluWQS<-n&Q*wn4wQbro;H|q3ERCE)w$pj0d$^bYtJSn zc(nLATeW~7Bvb!y9i$q>38=-ALSR6FKd`=Ssrj19Mb}9L=>=W9fVQPzi!!1)ctvKvM3$`NnmUYumYgNLP$t z|2$VlTJ!aN@8|L)NQk%06l1-a=JLd;3NOm>YqaZBnuR%nhU+1~YX2UYtNT)bm^zy4 zduMBzEDI<(z;MWuiru^xuIhTfG_CyKEWl(-wZ%C^%-JwMo0(6!+0KBS&Mdp>%0*H} zb4Qtt$ofPUfsWJc*Vp5Bv%fv1H)ammOg!|=&Cr40!F!BfcC=&Fst=ivM5Trk)8I-I zVc~C23%HkL9IC72c_#P@9XDvUle?9gijfI|Bcs3|j-JJ(TRs!Mp4+*9#>TT>UT4prQmiK6x0p92UU!w2 zRj%3OM`(5VOEY@(cHxM9JljtVmL$-7)i1)Q_2*gZ4x#5^oO@l6(f*-(;ixF;7@_G1 z^X>(k{9G8DeXVfZHR>t+2zGa6@?3jCgRsEMOM9J4uY8LW=026smL91@mj4I zlTlgco&r*dZVzok_tJ93%l)J>*Ko{{%L+T)@z$iGiQ%SEDdo@S4L!Lkdx&K7VflrG+&fqE;Pl}%{qH*?Xh<< zAz9jzP7kEeJS-lKVIL%f?~GmhnBhDvaVPTj`64ad!(I1dZo3 z1bwbj01TcyUh#@Wv|R~ z_dFJE-Ib}H72HUXAg>sR=-Pzof?(vA&_C3mHWSR#oY->Nrni>kL`Fw+6K~3g&4vCZ zlAW$nk>P+%=A*B?Z~m8{#j)d@&R6kpRt$X^dQu+Ra;}A1GU|M-W6jsAy*a`qRsB` zZ{WaQ6qb1nOXM-xf^Md|tr$FH>FUR~kl3sl*^w&a>MFM50)MfP&%Bwk$e|;s${Yyn z4HG0KkNnpGo^C(-Eu*WYerOAMm!LS{Ahq(pPw)8j#5S`iOR~?+OT?-n2Bpb4k20!N ztxB17c6()PwKQhYr|~2q5!9y&Wfkw@__vd&B-c+^6e-iH5SB2XBvO>x|H0L1xweol zT(Z{aGo=QGM52O6f`dEzH&x_*%;iG*F%etr$csexHdc?3CE-Jrk#k(d&Gew>E-f`C zg!n#@%N?=fEml$#GUSq7T3HTHqzX0HeaVL+WlGzcH3`Z76zfk2uYz~tQdD?#(nI6j z;;=!{lJj;da(otLmTBvBKPs2@+$;4%Raz2X;TH?^q6lUD5YUq~48sZ_^C_?NXh^fLS=V4|lxvM5dKoaCkY%3q$<}IyDM%0A$`Jr&`s0%$KKp*ow7wp{r#0nIDr!jTPS3{%i= zd%kpOrNuS7_4%bX-gWBN$8Kp{^`n0-2|lYuzN>W_uw&$>y-k?16R_a@ntH%lnwRg5 zTsAFeZgrS|@Le0F*{u6lEmK*);8CG+()=8c=Ke4o5$gZkUg@`gae+l6G?IodTOkr_@8nxyL8$bs_~q;n1MK*L{2@s2&c4=!`_QdWT{ zziKoLQH~k@v9Jj(<}U&t7-}Xo9R0ym1J@eSRvKh5sx+~o^*5tD`R|Cd-?2=m+h+<$ zuT^V>6vzKp5POUMR~e7^?DQjie)y_Uq*_}quY&I@>mPKpspb3A_Dv{Tc>3B`kj=g0 zEr;6w+2W%wFX4o$^(GdFBeT{S7Di$wuI%!1K(FyWaw$L4cMLx8*J{oZi^)3_&Jj){dnb8jt2H9V0dcwrq-rCT4GzSzd$7b&8yy z0)>xbJ}W6kn3{M%n0zQ1dj5J;L+G;x4T>pOVR_+%bnBNK93e^R=3Y}eAN)1#-`4Cs z=B+?yK6Kqm2Au#-H9$JHF&PNm5~!aj3~Bm08t;F4p_xr4e#P36z%k*3MyU*Ml??mH zTJe)LQ4FIufQjGBRma44s8)dJ|Sn7+UIul~Ybk+r7j{h}Y?{Qwf z@;-0)zWLi#Xz-L8E@d+_ecvzscxv!&{sX{=rwabvj?<R!wc#av)E@qg6CBvBr>KEEqeD}fpDT!rr7?Y)wa~wb7Wt+?TbgV^+oxVMFmu6dpu$a?!9%bjf z-&nDC*0XrlRd=u{R1Xu4WE;6HlI%N8e@ftUx=leoGE>YlE3jzkMj~Q ziXB#ToXyWOJ9p#HrGoh|xyd?xm@c^$p}b%o;s1dNg1vt>x3adhoGd`y9DBGM0-&8j zKOb6bNAnS7e~jM%Ya{Kv(7p$?2>j%uI{RMuv#S2w_luGQ?7vA+xX^1O3xFy+O_1K%h@MG@I5M`N(FG?}#$r_sbGwSLt=?!44fepRd7 z{8m^QU8EeA^@WGf$ADv7@{4@XH?``8nFkFVyQ@zlOe%sdywK2*VFNht`@U-?l-Ly5 zn!AK^!SFb5h*@M3&^o^tmDtVEqJE2H#uM*I^5=gJFlJy-n`UJ1(bD-nJgS&tLp=5{ zV*v(PK7ipbFA-lKTyPO^pYIZ(@r_okL>vq2y583_5V4pKC>DyCZr}YrKLs2R^ENQN&3seQe z!&P*gVHAFef~g<#*6krrXprRcgBeNv9f?4P{0kF89L}*vE*BN2#|w$vN-=Ec>yTCe z%m{QYa`Zzw>qMp`Vq@VST2Qt}`x5y^JCZ0(;bVWHVx9HyzQ{3AzP6sQvAD1RSU1{{ zv&W1vWnM=|7Sa1pwrch82RyOYJ6e*s92M};Y1_Nz8c4!~r;!;}zI4M3R!QB4@z zPHQ`GU+#=5_BK2(_F4|IjfdkYKl4QiGdW|+V#s=Ns^D7v@pPDbu&BIz+ zi3=z~`4y@*8r#yLGe`@ul1$-3-T*bKlxs|`YGb|pckZ3{8I15`UETC$woNTfz8B<> zRvdNax9ar`a<0s}#9p(-n!^>SqluV$-7KY?-4Y(-1j_|$qJMN|OnWx^Z@mR+4}4Ch z6CI}Wmltr_tgp}4`7L+(A&wgr3K#ijr=Ft7(Uu2jZ-<;DaAx)JP}Fa_O38|i4zM%9 zU8yD|8GcA;Va%A1R-`exh2PMsAs@TCFG2_nBHei5dop(@@$i}a6vL;qXdRYi4_mmu z;q-pfpgc&q3N%P|aeFVVI1Oim18+By3M97GhoeuRIS%RpYXh)$=-P#uJeM^w3+I1- z2HpjJL|@$?JXL7~Lbz7<#XmW5=T+t0*{r(%?nrRNzMMOjv-bSS#&&Xy%%FlJS*($K zui+*uSa-n5cF|3twJ<`2c>8QNr0m{`8b9o*8IyW1{iKzri&us5102%$Zs`SF7D<*| z?X!m50`C}eIALxYrX~L(DP2Hf;lCj1xU-c5eUnWoynZ*rNY3Czjus0E24(ljd~IYRJ1HR|2ZmYTgRh%cu()4PZbKLs=xY~L?? zX3?N^33%G5jzDpy*WnY#6E@o|Y(BjuSv;inAH<}ajdW- zAL!6Dj^^n`Xp2ZwT9?JJ2$S0boA)qO1YxZ!?u(DQ}Bf6JH&9>u~kHV!V$FgZouG6pbk! zs*;i4%@%?E4v3v%+Tn&t+~MD>zeKY^gLgu-7nqV%#o6v#R0yr|h3EEH@|R`LnLxPz zd4GSp6gizP>y4I9JxbDD%R^s7LSM7YG^0XD9;vO>CTt%nTdPyVBUZ$t3H&q#eSbIQ zku&94AHJ3^4tC|`$UL93|D)17ERTRNgM*m?|GVZEZfTnaGU)G8?t{>4je%t7@;JM* z5xPHX@>$jyyMonpO3uUkK~>A8$maX=Jl3Y$&8Dx%VoeC4uyG^i^t9Oa@sz<`Eqvq0b=Zf`Z||M-Vk=-=8MTUgFE)%(N#^`3#YO}&7{z+Y?EK*iJ$0^l zt(|NlNkWbPverKwIK$A(+PNR;+=YgezHzpBYP87ywaC_25{2>KV`i-smL)|b{i!PjJg61QKFb_J3nPWp8f+_=Ac|sQ zbbkQ~m0MLa3z+eg#J6j=Cl`)1eqjUS#%Byn``)P~SOg(`F52W=uyYG8i zGsyk%deZ`MD5<{w7)hil*J(lhWtQz849taR0CDEp56SBn0v_jSiVMK+)vfZ3d^vB6 zDJr78e&SaUcp?WzWIu-fd@p-^n)L0IAfj&sZ25G#PXB>-1NuF2fj50zTg2l9UV=!# z{p{I%p&VhU{ReMp!SAL?`}gA3maEY_uWf&N@3&yIkGzBoTf(KC_+sH{Wp%pc*D>c2 zj8TVTm+OvIIIsJ7+-!X;`+2Nq_t*DQ{GZi>K#~~EUm6gTow9uLR;hXNK~bIY>6&s| zan=Jd>gK1FS*NpBvaE28qtyo?LSj{**WP)`WAOvSR*Ds`{@Z7kGQ9~BaD0Kb z4k+_flW;RXB6;VKGErvJeSX1IR)jq_>P4X#S~HxQQ-TPHSW?6coRkAL$1y?)=>=4c zr6Wn)hFncFC}&c{N0(QImlC@ru}l_23HKt6sKj^+dH=h&w>8&?Djv6Gl2X~c{pN8i zu0k$bkJ1Udi`{?SiuuZk6}c5mlW!k)#7M7>6z+x4K>}1L&j;KA6f?O+LKMaUo5P~B zL;0GrbB&((y=6_5v<%^^Zu#wT%4FMbuoy63IYS9?ng+zFW0{c?k49aXWdcsf%^MYk z6vHQ5KYJ9An?m3$=30A0>hIx5(P2dt3dzI|<7VdlMZc~gM#IC`hMU3JD>lwoW+aw| zP$kdjEngo%f~e1jF@hsSaOPIDBGt$GGVN1A8YjuDE9GJRO*5oqQKbo;ZH{}HlYMG& zx>r@F=P^@O^{B3i92LgEzBy2e{GrqOy@41X>4>t1H*`h%;^3zYCp{W^fI}Kna`jS( zDx>_L=;|qnL>6|^PHi+J8**tQgd%=yn7FV->akE3t)Ks!Lx4KvQraK=xF_IL_-g8l z&?TYc`*yeH{jl!r;=~i*_};1e_JerAS*{zyz^5N1 z|G>53Mizm|07jfL>Tox&eskH2G&?iXW16Bn0L+_@e0^AB+j{K0aN3FDas(I=D8VEk zCjO$HCqt=f_$X6XW(c82==U-;2jJpW5R;c*Q`g&BRr7}FXtF~eibS>LJnaU+%eXps z?aBbLb!4-6lk9w7Rsq2XR%YgIQ0Od@P3r+T8@+8CcZ{F1ec#;$KAtA)0MdqXDY^uq zJNYIc6+oGJ0Afdjh-IMdu5O39A&(ay?{?8V``DcTBPc&{J1>H9`+Ahgcm4(rpy>1L zC90%;^}N4y1H@L$faP7F1F~MK{ycf30r1d3(Lv7JM33phkxs%j8MudTHz0iDa9=)*EGLTI(6- z+KfDK*YUdQH}0!WqEmMS2K%dR*Lk(Hv_PzH9)M~Ra?$m6zxo8wB)@5E;{oTs4O)3D zlT4rHT;U6gE;DV`@Z1`QKi=Kpsn|+VY#Ka#p}3f9F-(13HM$f_z9Qz-%+NEXntEnKJMpgpKhZRw#~ce zS{_Kqv#ai_Dyvv;sUNWIX9;KmS)Ys4fxBY^;f^uLsvw zOf&GP#ivYDY&OUlh+NOe3vJBsLnkx;m(~{?ItMgHsZwNHuw4E?bPcO&Lu6fGS(*b_ za6WQ2oHR)Xxry>W^(k*}MOvl4+S#~3;i)rfFPbz=@S!dE_^|CtYC02*L>8qfs!Vh_ z{lE^7o>p{!VZD&2Ms#S*me(w;)agT$GhiW^!nP6;UqKzvmzvs_xZrHvM>|K(^;&Cx~$6(}PS0-sAAi9X*nS z0^h&{flTb@i{BNY;wQ?!RAvuNDz;Qd!oY7HH~>QXXc~(+B8LdaTf`bVFJReBH=A9q zLHyTaq!gCzzoERCC8j*t)%!F4>K5?2hxgS3@4o=`Zs_SCM?pm7%cQ^yea`DHRm;PM zXBw9sA+q~MxkimYD3}85UdHBsV8}80P}li;An?G``7~~KJqhIEz=C=wAR%y^7Q>1g zZhv-CELC*_%2;l|tZNo(e~jb$H){)fdh%@of?h3K!FZ25L?1)p7#+dRYPxg=g$Ma%+eLZNMd5y!4IPh2e^1Mgn zh&;Q%CcGPDI4nk!`_pCqt3EV=&9tP93>@gy(^!ll&(6+toTtUcviMTiCixRUB08Y=3_5U&*`gYklLeMS zUC@67I1PRz{>x8HosXmkIlclQ1{~l+a5jM5>g#=BRM|to^Lq;HAiwWa3Dz=qc-%~$7G*gV zQ^e0fi|IjIGVum1u#v_6$s`h`4XS#25K(B}h673iGJBG?4}DxPBn94<_~pO4x-LmG z#9%mKbUTPOm_?dW3j;z{<~1`0Z+|7(ksXk>mhiy8PWbjab-U!TrVxv!jKrSA1n_*G zAu%=l!%|;HZBLX4c0yYO!Mia9-pPp8Z!PSv|G8_7es79aC(;E)O`@VT=o1|ZWu&xP zVgyFqbTuoYFl{yDpm_mhx=QpJF?xk5H4?Q}U?V3gjhWE;L{T_}LMK=^ou{37&Ax*+(np0!h<{ied^p9onc@~kskF>ms?B33{gQ{Qv2$e7dtKP zX3rR>Iyjg_DR>CNQ(yE!4Yu#3G+;%g{x2rn^h;$?vJubVy>uAnk>Uk~1cQ0K)zrrQ ztIrvBS71Vxf7~8*#Q0ULynppn01eW>GCx^FjbTvrKQdJ?s_!qy%VxsAV;8vpKe556 z3w_mR>!fK~U}yJ@<<@E&AP)mX;97U5IXM$Rv5)`ta_GRs7#bONkhEeP{LfL$fDxPh>$+}qEaf%=R(E?-%7Phwgk2^63sm9S;N5%SWEQj?L%@0?$ z|2GRTdw3C3%M5rP7US*`IP zVry$F_w!+X2oW1O>D|KvS)jp2ySuSyK2Q!-c0OCCXJqgIo=daQ8pmp({PRD)%_qcz zY)?kB9B>M0dQzA%mtqXz>>BW-K z0zEq+f(-DR$&%2x#}r3%=bz`yKmXW=?;l;|@JNKLbGPEQ9?Fn{gYB=$`Qloyz_=7? zCSGQwy}D%Wzj#8EARCT4^^n|LPv4oGFTmcD9q{pFjL2EO}6z$fUar({_qjI7tgIyp6}TFi5i4u`cS1=lEGbwqNGYvmlR$|9Y*t=!8wQ%Kcwjs$sNOG- z!%dQZi*zs*F2>_4Vi>uIRoDU2)5kL34L8pS??+coadc51!tX z0IGBvjwG?8xvw64+W8+qEUx&E)$`Nb!OPR35&i8gHlZMuUyl&(XB0NI%7WLhPWDy} zMp4aMPUecEYUnve2L^LBNBXp2LmKR9fwvLkfRQ>0&)a`2p`;-L5YJcc(tAt$drL_K zhHWWicA+ySdf1RX>;v;~!g(~fPtg!eQfNu8Bsp;Hj^PKi5!*CLrXfF%<^@EkgOzT# z>g4#!uj+1}33)0Md9ep0KUJ`=IM_=(508TB29ccBq}Hk*hOz$0EO${vYD+zex0`I9BzbS3WZ+}=sbi~JGdRVH&{!rR<7ZP?C;un zlZEg5dZm&4U3n-mzugWwmd5z43lKE}Wfe~gO`ZKUgM_1?=srw!fk(n+JP@f|iv5i> zjlQ8x@bLI}d&xN9I1U7;PsjKqy5H<8>FX=xDyG^`6!$!IeRy}?H&i)1ZiOTO;}4zQ zeBZwd!HxsPU^9^7X*O75R8&-eV11AmR8@!KL>(U=N89ZjHmMcewO(zE0(7MQi1tKo z>0WrKTReeMx60PzKQN>Em0fm_Iv-W@nfF{@>9q{5|HAFCb3s@p9%Q@fIkqK4BN?aJ zuiy20ZL!fbUfe#eG|lQf4U>O@VyIb~-Mg70bC>587+ZhXbGr=#qax_Cd*?XFM%(*y z672ps4Ms(XwS83#yY})e8*b9q`@1(3c@cgyTJloQ{_@o$p70*>KB?d}_yn zJ-@;!LD>4qesyh{)Cn!c#vj);Y)mJnW$ou#1bnf71a+APoXsfBpAL<1smJ-0I>BRu zhc^mBAdlZ_XYebo>Lsd>Bm0C?IUJbb>roQ_L4TGEvy%)~+J#6B78*e`lnncBA7*Dw zw)Yq~Ao<%UEczQt0%e2r6jcCEG86b&a>2xdBy}trX-z;PX}<>fT`EF3buxHVVSA+9 zB|92AmljLdzbRhDJjpT*&VrFw)^JntPPBTnrNXz8HwqYZvCY()b}|&V1!ywjRnse*8)VBYL0y z7!qVc%ar+MyXk(^#q??AMoD@r1G16eZ#el8!AfuF_3-h(Kk`xmvCPmUp~#7mQE0$2 zd2(UQ29uxMp=nJ2CuD3m_}g;otHBrwyD?XFYBj1J3xl~57fm1pb!Ad;U}8_P!5=r=1LjP42Gmf zcqF70%AN1uzk^uzAbKyY^cXkmVS>qQ_SAYg88?i15j8ihh-Ng6;pBCnL@at|99 zSJ+CI6!sn>PBIXP@|WN52>ul$$ZrF;`VA~L)3)nKf@5s{1vC-t!7Og2SJu_*8ycoJ zHYT(;t}#D>!Z1iUHc3?wN$`~!2<6@Nt7dhYfN9YZy6>XwPv#(ji_Q*2;eD>Q$*}X< z!TS&Hxt$X60yN(WfmYsy&qEuNC;a^UJSg|^I(N#+aCHCv9RtW;#>sQ?yTCK6S^EOI zEdE7&@Q$T)@d8uMsTYI~$;g6F@6GcAnVOWjtO69cC~Hr%9*l1qu_Y#&{&WJ^2fbKO z(z*MT0abeH{b>jHsEBYAybL|2SOX=Mu-Vli!u~vUlp70w%1laYjVI_6hpPSh9Y#The?rV>Oshams`*l3;jjUBz6J6ZhWCXD` zZ*?p>?)~udgRa76sByi_31%wdXCW`r!d#XMzB&%{=6e!#QT#*?oh!?D7Y{> zf-4NaWGezT0uKH26zy@ezA9}o46nxPrgI^`R^3ifi2MCwjAQje-@ur51ZAtT`GKn-3-}o2v4dK5^E)t%Q?QkY|3mL z_btQdD%g^*H)aIJ2G&DMr)<>7awyAQ%z@FD zxDL^ktuF8LRKb6iTM64=LhzpY*n z$E>4y4N+^xx-*91Nyd?TpvA>nAYQ#Zs=jQDb~bBt+*%UD!;zu)j-E$IwE-a-`~?e) zgrQzAt~&lFx<$|++H$zk_KR~-p`YJnS$^CR>j@nwR?{vi;43QcZ$P~dr3;VZ3Agg_ z@`f8?Q!qsXnw+4(mqK}A3@UY7fC_(F%jssE%Ly<pKt)}7LMOMyS=K3rnE+Q@U>yaQ5r0i-25!MZ`!^>%**kfIA1 zysfAM@a**5Tp!RkcmmY&#$$YL$$(V*J}l9l!(KN9D9p1Je6ADloyJ%SZ<2>i!eQY5 zy$AsMF|&bZfByUdDhBF~i9N^1PW_c1=H{UweLV^pFoj6~Sh2LU1nhiPK`?7#Lf*FH zZo&I_2Na?~+L5QVqa|f!U%)=Hoq6SSbqPSik-%OwLO`xp+TsK7PfLw*^q3iQi(GhW zgc#dMUAEt7Bx7imhll6mC;9n#ET5_|I4AknL^+GY0{aVAhcSp`FSjDl+&U@o)0^#& zNF(lI6kfgFcLphGzfJfmBzAeaChF)ZXv*Iei5A>5jPbp5k9n(53$(Z7pnaUMz|({- zLy|oWQ|M5=9vGwPSs|Et?+n9Syxo?rzXFe{_RT6Xok^@cC(2Jyethu~Pp}q4-I*Mc zbSTnJ!_fp>?-u7K4Pyc#Cpmau_^$P_505Gtcfqcy@N-VL3`nGF8VS>FONS^)>6;H# ze{{T*(2U!-u*~ovm&odM?gkVyrw(8By;*UuDFH$mPL&wSo~rqZ-M>h#g1*5C34IfS z6k~~i^{a&}q{jBIM=!7m!-+BEQrltg8@3>Nu8sVOpv;#@xmQ+ep|@<}LeC=^OzC45 zi&{VIb{voGOXMlM9f|tFxro5;G#Cm@XP-ujLD8A5$%tc%b*1HbNMP@XDr@q)iNkK| zO;1AkRhZI5YX#Y~58!g9#-|N~2d!8ho@K1DkSt|Q%xo-*zm+4)-C$N*$nYIyA&!G@ zkoT}&Wx*F&sAzA7Yw3)SB_Q=g7HhoSgbWM5!=o@L3NtHW48kq*^Q?_tD~5Io8*VRQ zVz43l69j=V33L)<1=JtRDr$>0*CFYnGm#Qt%f;ZJMmRzY`52YM%{-K1`K4Kx48`sR zQPP7krK+#IV+&7X4^*RxhFbCL9TrYK#2XC&&%0TxPKjSe#nLk@dP84!KDmK_n1mQ?S7oS7j@`4&O1sB7bfk= z8=d@pciKy}e$XN8cRGapB#XP(CTW2hO%Yo3hh@~n{0D8%h(ddoD1A?5Tej#ffihYj z9xMqthcxoMz+141YP9D#b%nzhCYUKk+^~UfMX2;GkNC$5nKB!6|FHOlNizHfU2EP3 z+CuMc4U_f@TT9%oWOl>V2rCoO3q)c33emUng!AhW6vGb*BZ7-kf7UY{$r!^Xmr`ds za*U-O$UZeEN~YDY7Z@0>5shlWKCA6m@s8zDlcrFu&-Yf!rXyr|9;W4y+rsBp0y7|2 z5^4qUb0Im#la=fA^PYEg+@*}EFqzD!_)B6x7S$Thm!b=G_QQWgA|Mnl&#lT$p8xdO zYQ9w{oS^Bs^0sYxK*8i<|9yO7UtsWe2_?vex>*Ak-~T#KT_im+F8Z#r=(|QLIOT$} zNX8ag@3-wvOXUId&tX-%Ow65)41p|Hb}?iW2&4OKFQ-8eIGEZy)%X=<>%u;1*G}R~ zuncw9d}-G@P9k#UHk z?k9HPbnILjY0n^0=-C^&{Jg|cP>AOK#%)kAHs1BfVRa^gsOt0*`Et?KMcsx!m@0G( zLZt!g4Y+v0_j%lkjE+uDWCQT)Eg%Bt78V8_WW$la0A0Jm#=#tReE?wsX?BZ*ipPdfj7^83mNV_h(q4Urk4(Qi9;Ht`GBL zW|o(wY-||1fQA93+xlr#O=lM{H~?5oJcW!TIcnkFqQ39fEqk|>Gj%`|d|HC&>mKVY zyE_1kNDn@RDR>#pBxLhlwAU59x&cjBX$v_3_@dWqcUyVe0IGw+>uO*;$OhH@CaKEH zwC6F!7{CzG2F4oCXfR|hd_P`z-XC`?tgJu~BB+P3m!zJYoMYbuQ?A_Q>4|5GD zN+W=@(g7`J(A#E)zkd1`HV10K(iCU*oUgal*nox_;-w*`$3Wdr?xTVP%F_>^b*N== z8iWj__#B|D{}j0IEW2jCxsnC^_7!*2nj;)ANn|{k{k6}CC7D56O?g~)esK}?go}5z z*KqnR{o+wBc)EO}Nit86DE$)lj{o_LO5bOmi}`s~Z|srWImKo!*N(e>PRQd1?)`nLYTyHr=EXBEXx zpT5u7Ur*L&f+>X;vy^)L>66^b7JqLd2#&2Je_U+LYG>bl0SkPuI4X!849 z2yMo{BsLWmzQa{$>;3P&7yWno<(e^?(Wf85#-f<>0dfIcyWZThY-2@K3o}g?ZfW%z zYG1kTvXh_2*$LWzwLmcyQ1HMd#xT>Hh@xuQ-W3}k@3Qo-Ww&*@2G-Gg3v#XNnmR)j z9#8~j;j5>GURs^jaWiJZ-Rs{*D0Onl+hcB~*! zd1E~Pjlyq@s|Jri?Op&B)(~)*mvbr#4rdLEo#nVx zxKZ+}7eKH}S>wcvki$!22uz)7D)q9|(jH9E&YPwNbR4~g-=cEc+b#bH%q=b|v{l%w zGD)c>83X-0w1q4{ygG0Xa0N4-A^5Cuiu6>|KbEMBvRbY$X99LJ1zDQL3ikLb$33P0o!vU)6X;mYrLYgt;H5E!)8B;yK^4=l*?0Bz6kY6jTMM818QnIv%Oc6(8ip(DBZAkQV74jMhNhrkUfV;|riPRoE zD2P;+q@sxBq~saeNxo=EzFr@$)oyx|Fi-z`bjyb8`4{ShMD_J>c4Ivx!^M6u{$~M3 zeHs3@yatIXLuTwoXeRSKcX_s-Hehio%>*Lwc2>o%2Ce5?(N-@l~THQ~F7$H5!F>!1Tnxn=ddlu*4Cc)#o!G>JRZh>BsLr z(Kgn*NV>YRuDOAQyX6o!C3V*6T7M*WZ6LGt;Ewn;)V|SEkB1)26ccckfnj52e@a0O z0vG6^ktc{_7osmt)k>)0A|U~_%k6zo-28O&Xkb2EJYbpuTu;cs;uq0lN+9wQw2}Fr zq{&~@MRGWhwhj|^uzpp8RRXK*HKWkIsiq_ilF zrN`U>hU`Ep&V_&egfsbEMI^|E{jcoi{#9+`Oe4fats5ruMF!V|&qMR01F9yTlOcqW z9AANDts^6DgV9pUY!Rl9ViwQXx(8)%7^i0JUc5RIXF*h zn%xdjjXP2;{m%94cn8;pOu1R=6RW5+w(2s;$~t~q{pe9jMc&<6NK&>MRxOTWuSh|9 zdJ;~f0G5;{SO2U?@7PPTN<9rLTs3&rNq`$I?4+NMX5d@PbJ+UT4whJ=;PubSLE>c-1&I@-4J{r(}cy*h$K zL}jN%NI8<)qdl~{NyO7=gz9Mz8!RyPg)mq}T3gu*}tX7^7fLvIu$XD*44kLMAd63c`?>V?sh~_J;==zT*eW;ce0N1c8-WC;P3p zDP=3P(~4Dg61tu={=+Az_4k-HVoosZqfs;s1Y^o3wf+Vxg#MR)vzP+CN0*z(RMWZ9 z71>p1g5QKEM(_<@n;=A0mw>9iaVno9t5RgHRs$t^s>2h>gFLF*7>z&Oc>`ubmtKe5 z68%lYU9bH{%4cHMS)zA#am=)2}M)WH5}lCJjmJ7Zk1d832aBgX%u>7K(Xd%wSdPffOM+t$f$GAFyq zc1<=W+va53w(ZHbp3~?1d;YHLYM-us)?W9$@AZ1WTB`oH_GCh?PD`LhgL%7KdPGTe zXW9Scqw$&YH7a&%*8(o}A}_s;c&lAG|9ffl@r#I0b5wLj7evn;t9x7_a3ctBgZJTT zS^aV+C5BcDQBU-IockdCC#WfQ+~vaPi6x}V<{Oa~AVj{6$>|3yY0->Ky;AW@v}@#| z78|3MA3DP9k9BQ7_%83HS6?T>KOY7d!$=0iQq(;Rlp)fhZjUBM3DQaRN|6Y6tm|zO zoZ~vpBkCss&bJIcPNRD;qh$^Q+1Zg+FOwaM?c~|GXJ^fJ1#NW<3tZoc$ytn9E_e6r zwPUhg7l~Nh%bfl^O$$*g_CI1X+}hBfdrHC5lYs{P8L7GVbgg;l9I82qziYTR%9nJB zQ79jaOB{rA2%3tuVBM?F*L3T-{ude&$B=|B3wj{jL)9^_-5mHPhake}5|1KKv^b!Y zA4V3r4k?e#k73Myj@RO(FZ62EA9*9FA%-#x+J%I~EMBue@>j+P93$5*17a?31Dkkb zE9Qucuhtv)f-MkE@Q0<1UR!h!Jp6u0u(=D^@usdcj%?vfRt%~C7H)Z5hQo_=+EGL7 z<#3#*A^t}+LfmYQtr6$XsEvBttsdncAO{|i196a@m3!~g!dGi%*#>If{6QOvNtgeM zwNf;|G4VNsEDd?EctOZSw?Q0Nxrb&>Q{GNy%)$zlGQ9tx;25#L?H>{b9M#=Sql>1c zJr88@2jV3kG_d0VTrsxZCoZ9(!-DkbBsIS!A$aNcO4dH%IgZw(+_SHLY@-_2X)^HL ziy~+-$4D$y4&8c3>#$`vRi;d_H*JU@70FTxi1JOG|zv$Az zDB2d!@?6aT4Y#|(Y>Ugtj5g(&;`b%I{R%?_aYnDyg*qMUiO)wtY7DxjyN?d4SOcMI z1{wxTpi@`}hZIPXyX0srTF+>PX)4ynO-M(oqsjk!EsCVePHnWt0eE_(MNH{?Qz@zB z-SVSSYf-^7o$rCQk*#+_3jU zVD4;m?zPT;442k<3JbIJA?#TUbVvUncs}IMxPmt4H=c2m3apMT#B-hj%ZNcbqUFmZ z96^$z2UhvFt(<2UC-$aDuHgJeKrkx})yuoUA5ZxIZqnj9mY z5S8;OH^ZHnk3J3(SW27oT@zOz%^aQ|RvgDVtesDB8$Ex{b&l&;~H-SD7S^cEa@;iz}1zZ}4+%x($TQ0^2K)JQ0if zBS_=S>hD26Y9N{EhhgNPq=xG?e6Ad_R{us#e)yQW2{>XlaUJF?CN1Vh8ca7ghiUPO zwHYWC>tL`iBH79kiAz8ehZ1#jfPh3th;2WiB7;bHoRx{JbOKSv%ni{#;w1dKZ}4|e zez9@n6RZzV`wyct44j3x?Uo4 zT6*#>PJ!p;oEZc^#4awpa?7{EQ%ooEY>s`Zd?%H0IhocsgA3stvLuG;PQw`W`V}v^ zBTs^aq-xvd4uV1!rvYrD<@h2PkFVmLD>RgZu`J)90s|`9gTbLh z>FF=1hIDM=yKC}&be!MWcu%+-Ju4C2B`6=nVu&{Mi_O-x#J_%=|M<~zb3V@J#H=J8 z?8zgw$Z4QK@dJ3<@(bs6g1`$u6KGKf8t7|KjO0xvEaGrp{{2vwzuu-tL?Xm9=tLF= ztz6ApQgADp@V}kRd9FYwukCTgd*O9aT4SLk43}W6&hqZ*d-beP*Yj>@efec`y7AJN z<`?}?eIy=yZcf95*QA7uq3gxRy;OL#6oWjQmVyilkk_C_6Hi@X5OW~;`@SGZqd73^ zxFvO$Lqp<7D*9_Thxk^Q5clI4avGrR0aG1?+x=J^%ePS~Qjb-ay{`xRt?7Qsy}DRCuG++T?20 zk6$Rzy*o@ksf^|1%k69}Rb>ULE_P>k>kT5+fXMMx?kA_ZEfpZir? zPDr6zKc7YO4(pzUYq~WKYa4;p+mBNASv()-VNHapOBzU0Ie{T`A z1i`{gq;W9WYu)D<(9(>lL{%-rCo4C&v`~?IAMgKha`Ml0eyd~*17)RqedNvFQk=H? z6Gl`qq)Ib-+wB-I%Zx9oLaSV3=z>bA=K;mI$s2eIrTb*`(|mq}&U<2}j*5e5us9ep<%Ym2j3(Sws%b85W9o3X&RWa6WJ-8@4yvf6<&1 z(Yyd#D0omNJ}^OJ25t25%CYZv_usyF0d*})ys2DLK*14xW>-~B&Gp05o#6i(n_fkC z7+v62e7glx+KdK8ps=ry{i5%W`N?-Y2_3tu4=cm;xL9hb&majC*wR26SkbIz*=hY1 zuBsv-;i(HBf~S{DuIGG#x)^Qo`ZAm?XJ$IoDQBjNZe`IlitDsh>c?X380RKHPXNF( z_Gz1{&IBqqS5YdjsDDAgQ9V=mbR~rN{5Qmm)?8Ctl$&!@cu^dnBGbEPN^gRBX~OnX zS3t+r*v0KCz^DN3cV_r>?JojvR{?^8EptIE$@3UgM4^yxnq(yYV&D4$_}=HT6&&qQ zhq7H+=trKyiYb(?NW}K@8`SJOOgNQ{1^K5ZRODJf- z@0o>|6BubFG9hF3-%N0()m)*eV?Uouk$0bpu;!wR*Ci-qQ_QxJ*D#zHizS*IH$e(gCq4{gWpb`bvC3-+xx zJ+|a{;o?@${ZVNZ(!uLC zH#1)CW9yM{oUjQ_U%Dq`lP6;D(j z*L_GeEeU<>k2up@44HDFby2`&GvDi;g!?~A-yE8Fvm`i@GP7m@XfQW{(ZJ<#h{%^~ zsr2-*T<`3Ym0Q=>(96zMBaGc&4VHVKA0dG4PMO!TA6R=hSlIEhP&0`b=2DW>>$MtI zNaQ9^!umPf`_r0uPAkWvr}0)k`_LC3gM>MjDWt|!SBQUHm{z{8`{8vkUQjH|YT>X_ zX6IU;E1Tz1mY90DTA5y@PCRL`X5F(!*C_o-78!vxt5}z8@p~cHz^Nyj&=)(v7>n=i z!J^6rj-yLO#ZZc17lkPx2vheqPS_do^RBue;}cMjkw+sHc0$1$R9al4x6JUJa$M$k z%3xk!2!ZL-!Yc)w<`=?^+fQ8Y5r`>vsXI3HM|++ZJw??x z1&bO*QkQmH-+3&vFD>N~Z;-)lryo0vwJk}%$99iIMIHuSQd*1XTOuWa7#;WuBh3kE zD%X~UznKT`_z{(tsdZnx>b=b_4sm{zr%n}{rWO6|TO8l4Vv|}TM~TV5y{P2PTHY+# z?%)7bR1yXW_6voej?n@yqZwP^iq0#x{PsJkrLHtpJp?;lGRaL-EG9TKmP|Ine=q;r z5KLZW;w1!G~!KF4vbd@Wu9N|$F;DWfCx2&8jI{$fx9{b}q4S3Ga z=WY%zKqR~fB4EmwVjyyGN$umkNbJ4$lup{|8_X zE@V+#>gT4z4m-u2B-1HEZQ+S8cvwLoigC!4d)FXzdsRS+$&d9(4r9QMu#OUU^-lzVyxrSajDmO z%F4v=bQc3AfOqk1buP`^O45U1qI2r%g+Iof9e!x3O}9+1SO0VRs=Kj~V|$nhv=2@; zP-aApI3f^M%6gZ2#3>Y7H*#@@r=J>BIRNz#kN`;3F()%q2vOY$PKCYK4l*)IfAb)0@>x z*Cv}tt*C~?s=G@8E!hKo<@M&}7kO#eO7t>k49m?)+J14h-l`+>gKMuPxbN_7D3TRW zd%Hl;>qELy8yPQfowVfD^%^nM)s&D$&-s0WREICwtGwc4{1MgGo4##(pH00A#|Jq@ zbaa_m^EQP1w{i4=i@WGV9#>J$^R;xIxTaVpe=H!V4I5Ptb=K5n}gA~oC8T?!|ZyTgcW zvcVvH2y_%Bb|6o@+bY}o`buQGOSTuXzGrbkyn$J7%L4pKlcbe#P0}r=(KLi5yTFMd zWR8!cOgC2Le}AKZ#^;fi= zkFFa+rFZ@8nNKUwkM)5c;}77mhS(3hp`cQO11n0|c4Ng}Fp*AG8j9$Tj2$q#kC2iv zVwM9NOC->9)lxF8(Db|WvVvwvE2@a7bPVcc8?r#90Y-(t^EU`Gl{FJQoSxx6OLKaoVmbSQR(>QD50!c9mB_JP)XJvJ z61_#)EO%KX6uUGD+rM^La}urTMBH4Cv^;^h9B$6>!7aY%d^GAx<`;CpuZkcXj&bk z2%V)=!0!r5oLg_&+$ZEp?bRi?oIr+yQeX-tPTHdZ|1uDhWdZhQr%HTz;Ito1#psed7)0`gSW2=ua6e` z8}ig`uxby!1M6fC4g*(e<9RJTudve0PgH1IX4x9u#ieLA9XsJw9X2Dk!THA=m_fV# z*Td6Y;jy&r_ezAj*wuI{wwPi@1ufGXzw*|9b}6LS=aVNQimAC3<`#9^zF4 z7Z3FHXz#w@7dYyoOv&(h_nm9si-a0W(y-b*xvudg*v}cr&#z|PQ;MY_ppcG(o-NZ`u1HZU;Mm?Vi!4Tf1|b&%H9`0cNQE<2&eDcyzk8ax=e zJbr+C*AuSd{i-#NA}K~r2GN@+C`+X$g9JfVQAD>IqGLVjYe)NZH%tW1k`_c+Fw%|0xSht{2(Od zz%3F7g`9jAW=G1;Y#HqaTf34X76PZFtc-Y{E3{pH846j^s6NU+uWV@E|9O=NPl^~m ze$Wk_Kb2VgMl;wuhTewQ=P{}&BYp}qg^|uwCjEo`bXS-f12!GYzi}vwQ&<>>Hj)V% z-)mo#EO6B1pCkXT0x>Sbx%GK}n+gMYhCZPV(v;&|C0}o+?Mx%_VaseQVv*I6I@Zgp z*X&J#sRIWx_y}ZWCM(HZb3>z24Xqg?n1mzNG95gTyh5=8BJ7!PJHFm<)+0o6v!ypG z-L0#FgjF+@sWacs({Oe~en7E0?>MDD8cJXN-`K#?+}0ZGvG6!t97B1hAyEJ}bvMUD zX}yi!PKed`z-@@q5&mc074iap=RCK_X~i^2Iou!gtV!zg!$1SGpkp(5_stH_%r5Fcp>IxD*;?*%&AyajF+xF&89 zBMqOrx)Le$roAqdN2JC&9rviZnpt^|-+kYO(QUbB4-aL1<~A{N^1 zrs~*$8>>djg<>`Gtr~_Z0@y1db&3WPIO5q^u(r>>qCB(8Z1+$i1 z7}W0>Q1sSQ^p?EP@C}jkv-O$+2X#->=R3 zmn$Q%@zzB6dQJOlpAiWbC$E5nBKvb8V!q#sL3d^JWQt&@ww$oYc7Ep^k`o0Hn~anq zWFkYB=Pc@g9@+)*pyeR!dd>Q^+b8LU;D&R;iO-c^=X44}Wr*T)On!53)9ns>v0hIa z%x)2~k8P6q3MMVvhkK0Om$!F`5LUXy(}jBReWuVkx97d7*?10eGUH#+1jEYN{JHhY z1v6Jc^9?HMkj>)wHbJ{}$k6oP-LcQ=@E&3@&yXR`uIxh@J?z6yJr1U7bF-!$v1HV( z%{~c+sM{8KN~vP@K2pY99^iAdOX>giK;Q#pHVOBvkM5=cIZ#1hP46^g)_}5Xm-kg1 zO%mg8Npx&0bL@q&Z&MI!7;V3Gs*iu@!7Ml;91K6o{hYg=F7jy&hHZZwHtl>Zc45$3 z89kqJVYxxEkU_M;X`)=2XP0(d$QFvC7X{I9+{Vqqsj;J4F|uvn8< z^&bkgWGOjNFwvfbohZ=UKMn<%cOeI7Q>+Y-W(3?pWG0yG;j~WEODZi2x~e0hKQ5pr z?qLaWg(BjFc4sxxpY{s1z+KrPxwzin!a`bXh^yZb<9v(gR6gW7vkj7Aam|ONtIJijHSjgRH8zQ5eS7>glh|;BS z$Zt<_o+KjDs%d@qU`wuoYebf zH?b1oKDI8^)J|Q~!T9snC3??agPky1?9IBk_3pjQwf8mO*RBy6&7eAf`0#iz;;RBnJs_I;PZ=R>)bI?spd#6t1s$Pf-HO?JHX2c zGnoJov9{=RlhtQt_X1z8SG(fR`=K(X-jnhEyAQ?{wD=ucD+}fEZEPrd^SN!v*V_8j z{MP~mGVz}orn2qdd*HybZI^>F((Z8ZDIJ1D;-cWrld(P~cl>8Bx@=;={Q<=v%^n0)V4Kl8$tUXnbQ?b87ehHH>8-bZp1t?%HBwco9*SeT@ zg|{T^ZzHxMZ=5+x(A-A4`~)a^6mb3i`Q5Y?Sja-gQP`}Wniea2+hV;cH?&ulqCsagwFiq2bO;cG4Urt#g6)L z95A@Fwgm->jZsv9&@<`;c%c07zyRQLVAy?qUT2Jg0Z+_pY@t@sVd4vZ!5qsdm2Rdxp+Ld;DGyE~!^&(hJ95kuaPMUg zYTvDdY}O%wN%55a|FZxe;@467a2l7puqPsOze-xnDNfgv_^y1{R#qDjv)||B@q2>F zxAJO?K)N5`wQu)r>tZtA!t5q4T<&$;KDugUdB-W#K771pI=eJ5-fjU2_J;$N_4P0F z3tD`)!b!fLn!vLQGa{}rc2Bv)lYI0qLWm8bVeiq8q6saxTU~MzTZ4~zrJ4UOq;C;6u;ByzZ2;|0z%Og{^VHQzcO4)ZSUnF&m#%x=B4tDZ+?pD zpLxQdC*7Mx>2y3ID23H;sXwN0ca5yk@Q*tV)rgeJ>6&fCe&rmu( zl#Iy+XRlE3mBy<@%>L*JM=7LQ*Lwbp%eQMT*7d>^w+t+0ShG$k>nWIbp1=mtM~_6e!vtzq z$g~2>nDbLS#`$V!W~xT#JuH$tE4{hWn@}&Tjklf2-1P`d4hA}VjSz=%a>+3acSGbQ z)y7lY?w?|OcS`vMgg_|2`+|LNn0BUK=v0-3@n$$}LkTAx*5>2bdG~!*tv5*~-&azn zc{)h2jpxypqV;o8Zq_M@lu z7Vs6FmVXzGNdGi@JXUMVYg+(<#jxw(#cZ>8B9@#T7LOHAe$flOPT})CJ4F(DyAF9m^UkdtcX4eW({_L81(l12dGGTh zn>0Fi3>@oeKIpPFp!&AElfWAdb~0N3cbD(Q!R~t9r|V#ScYQZ*dJzr-MTaLm$f-kI zS?P8*YjiPj^Kj$9=&;=5N2R6IZZyEG)CS9d*Oq32_5^z(htok4pIzZT z|H&y=V;yo54E@gwEzI6Kqc>2GdfK4h?Md1o>^D>yRjOp{XaQO?gC)Vw-cd?D3QPwi zqAd74Y?`QjWe1q^!wDzIP&yc1re1tEkB0b|zr&a1nQzZ*12j^3{=szbygzrSLn5nE)ThgWXMf z=D)i=+T;nb?Uent`@2BGA7|bXq(>xuibcHB%AhfGe~drkZvcgM|owYRnn@ zXyP_vi2fMPhbMp>V(ck$NSIbma(QH|@UxknxG+>73R(qIw6XVD0p>tMC?OJ4w1{d= zs2>rGwDQm2cwfEWA-PLRZaxU~X(fw(Taijmp&?kg;ww2s5xJOz*FjL>fl4LjWNz69 zTlqZuNKI^tQxX=ihKlttcp3gQMsbf4p!5b-T^TQZ#om5Ul1dDzECz!K*B$XR4%D2; z;oSLW8e9xX)ea+ME2EsuNl`>(mPT>rp)%TKnd4S_|6JkK6Su(lbSbv_}m zLr{ifSounxc)BU*A`+_FgWms!8%U%1uF7W2^ctEN+RQ*7zguhvb*#I7ivA4wjxJKk zlOxdMI>nDP1y!E@%5|}bxw6Uc6n3+5-2kYf`S`4qShSl;46(aifwY@F?~{l_7}Y0V1?T!_02*iJTwhGG3QG8ycYUNu z9kxctoP!)ZlbP+RmYsIW*87_N?OyoJj<1oiW6x0z|MuR4zoX&$N2Xw)rkz(HqIW@R z^`|8``$At+AzC#kxT?*9-C7dW_0ptIX6M~x9mf#<4Ykv;ntK?EFK1*`Q}a8osxeFN z{73*GkAaJF&<_&qd1()aPT=#nXVaZB8;RPK<}EX~w4^IK>=wndwXZis?RK@u=EB40 zHs@fh@&0Blxd|it^Xxb(U>pIrZFarJZLf{+8Zy#se7eg8y=3~gUVLn}%E9N0>F~zy zoQhamm(!>kQgI=ypobUoU?*434eOuwbrw1R_thh@W|x%iOu!*wAIal}nf39;&ApRt zF}>liiIPebjs%%v@ZC%QjUwd!0Ia;l-M4`s=(CmmIf>g)kuKh|T7TGr1(wJw=*qmZ zLy>z)-U-@h^k!G5YT^~EYC!{1ggumV`5G7s@WD~7V%t9>^y$(oz|gB*eEs1!cz>x# zgDbKQ(xx3@BqLhYYS>c)g7f}ayv#YmteL~2M;NNA=Hw$sp6m34@IXz8DyyLIk)o5zzq$4o+nkL zp&F{V^|hwWZdve^J5@kK%4^XnFxyw|s8E1I4`-?+2{v|+l(5`%Edm~IMdQJf2q7u) z`jvu3SY3@8Kk-{>`P#vW4#Y&UH(IWL*1d@`!+4XIAQ9J~VLyZfeKCT2hALoqG$-3QDtgjq+=1inc zb#tO!A^btlG+d3W~;ju_47&`JMt^q9B3|Rjh5us z%j`fD#+nGIFic>He~Hoa(QEbga;M$mzwGw5-43NC;k(^~JYK(J-3lm_Z|mZHy}hXs zJ(yhbYs{&TR#Y>&4$4ljpGk31Yu{&n6%l!EMwHK!{#3uExRvK+Ak?|cfZ=Q9wC0Y^ zD|5I!)R)<^udz;H8KFR4673BaF};@RyYgE-;=Nruan?gm$vgY+pdW`v50S>q9n3ee5qfM?a9fnZ$M${OLk6WvzXP5 z0V156+dyEGzBt>52Nr{lisADM!HgRrOV;%`)@^E`^m;$lqfDQ;>A3X1^tK?}zG%BV z1WvRa0O6PSwqHkI@&!9;cucH55bA_vP<=39c#48U`-|ctO=@3@pa@1^6}i>Gk_#{I~`R zY%AXwQ+%!=U*_Ur)(|2eMqc-@7`Z5D!JyQ{*dGFGN;IGXa=Zdq{0ru`TZ#M|tuk(4 z-n7dA{$iG*aI3Zc2?R2zQ~TYELV7$%2Gj06RD^}QsH zdw#C5u^zM2>tJr){NssB{|ODdow^-<7tneswr5BB+|*a4hYC_qH5kcv`y?0El0Sv- zyt{A-_u6|lp8R_aU&glcWK@~)V^Q_!zHp9BR8~?_C@sgyo(%8gb2}_B5KA!JTuu^Z zAjYWXuhpf+X&TRc#4Cowjk++2m653AL2&dhJ}+VN^wq7P8k>!JCe=NF+)+{6@3Zja z4MqXGpC_TTHqnT{nM#Seo-t^X1z+zh7VGn1Tc7H5*r_n(Bq#yi7#@=GGWPdUWm@$% zD)e;?TE#q3z-uMd?W%|Y1K+#eqxl+eFx>I;{Si2TxfDBM{4|&S(f=jEehHV&_IppO zOP!7Kh9KR*(d=d*sipxWA%SzQ#Aq-+`kg?_!O6*~-8OGr&%ed-=;GELd-zM-1x|yf za#-U44|3jnGS%v!Mu~q7hlh!8Wsf`pi-L@`wY6fx^ZTXm6mSGi7HD+J$;t6OZ3ldb zFzdi+_5q{wv$Opy&x;-4;5#;36_BKOG>IgaJ`+p{uTf{c`AyuHCj%E{8+jsKNX01I zd9Jesuadi6t`sRm4SNlNHH9E+xr!@Pgq3Sx5JqIqV#8Rpq@Vb6U&(u5!jq>l27bV> zsnO;wCT8KsQ~yH;&orOhQH(%^<64pB#`?BYFf)U$I!?94(MU*JUq*M%jUrnb6T!oe zct?ug5*V_BP6AIu~Us9AV{`vBZuYEMWM?~*SoXg+rU6d zVo5d&5c6g?9^m#nUwgDFB10a4EhUaX_{$NGSO3*!Y0=ki?1*gSv z4~#@%k&L}Lbhj!EHzc{yq%@AcjvpzE@x7nDD7NuxVA0m$08sYxrnMe>db0jGq@W|R z;a#R(U3uB3iQ`^6(OxiT@2p8`tdx^w!@-T3Y#pE~%8UsYj9eXHel-$T@|pd^*k2s; zw7v<$qUBi0>}7jaLh}glaT7C_RXuper(c896dN4UXEQ{CrDuRaCdUXhCtub|$R}GV z6BDa1DIwRTqc>^1HGECm(pF}@-{bdWO?nT5MZg`9f?Q;A^#XS`F}Qep>Z!1lyLlg4 z1i5M}Kb)S=JUH2+Bgd$Hn!}9V{$oNHbp8-KNx zQ`F7pzLZfEm-Be+9mJJ!^g6)R2}shp4cZP~3SYSRaXR^K7fE^q;h4K%$=`Vs#lVNy zX#MEsWgpB98PdE5`OYb4+uoSr2-p;NPAsZg+=T>O?39h6%r7K~rlOET)ar$^bi%HE z+Cn&XdCU`BqK1h+4FMfDecvrJpbYtT$l0|6eEOLI=RE`adXo2nrqYOM-TdNWt=qLB zaBBL?Qf=%wRi2ri7G%RQ0cw+8FLT+O79GsNU!n_;Q$rU^2MP~B^ldPMTj=EwI7FTT z#9MJWtn>%M(eZ%j_1EJ&D~lk@>qZJVatd@=U=|TtFu%U0Km%faVS(BA<4vekyXy1? zNLm9~S2fd#w1M$d)`-(hpI7U$^73oG7;>2;yLm+kW}i3xy8X1Y9v^%lDg_GUqnIq0 zs!R?>6M?@Uay(az=((w0q0#eyg5?*}3mL}J(a}Mt)0)tS2*|+Hb@RKpumNUB;CXEw z0b^V8fkU&;w?~M-s*8(5TsPfA@}p0D&zCBHhJ-SijH1;qj%V?=xn(U@XafB^QIejo zl4D{*4s15CoU(w8#@A&43Bj+=8Hvkjvuw2b2hsPbFT;KidjMDmUZ~V{-N_;Gosc95 zy`6w+HQ@dDk=)}bV7E}6^|P~MW$Sf$rHfU``{g|>bJG#!u7PeRM(;Ui==$Pn&Uc3J zlLMiXIzhT9Vq0S4SQq_?1D>ha&0aVg5gmC!OT$#Vi0h+;`QwDn%A z^}Nklo|ox8Q4`wKL|Nlt!_a~Rf=7+zoGqqGbeGe+?tSC=ib$YrI1P|$U8K-`!bSXbnKlH&H^ZsP-O&uf^6ZnXohrGd}PN$WRbN_ z+poK4SGfI+pn5oHH0`%TcDWU7`=rdm2+ag>jy*NOND!OwuXV=>VB#~_m~>GG>B4vz zGs5>bAKJ95bmo`;#4);h>g2nAF-B=PI!F^LUE+GMmmyBvX-8XR6)90>W8-3M14^)_P#fUk9=*@*<9?OmEo|CW$A_?8RMz=aWCCZ#oP*;^v zEr6@+7G?J-9Lz)>8mCHUc3Ai8Y7GgKMG4`7XS=_=)sS z^S1SI0a#%&Z(7z+2ii*zb?^Z_6_n^YTztCu3d6j2s=b zbK4y|?W{(!S$}WehHAGX<4NZi&*;bwiSi(ldh>lt z4w64NhklM}e_WriRJB^guvW?>Jhd5gp_ycLHD$=_y3Gk(+G=6|UB=vUS_N0e=52q& zm)VZT&9U1lK+NToquwM_`0-FBoj#K=7jgJe}K8e2XOTGs{Kbx2!22ty>mElWv zw(Ypb$QO?S-A*;jGWef-+xP7Y*8XB-#6&~I^RL z+t$ZJ)3tXtu*d-mlbDD|-;ca;qZob;D(~Yj%myfG3_9!3(9*U5P0FYHYTpSd%FOyP zN5{*KM~6XdvnybZQ^r^36OgQMxatwY7#tEgHR6J=BtO%R$mlNs9Ok-;d{kyTY&hgRjUa zC!UGB<2m<-6*KOKWuxcom;ji8bWYpDx7(@Ws;X#aqd_}h_Q!SRrB_GLDgi+`n^<;wu@~eD~kx5;WOif{H{@5Rg)(~{=j#}pmbl2LU)8AkYvi1h2 z@7JY2&%<3Ti}Z| ztUvfH&RZ7=U7D=ZiFvtrBA`|fk`EBu16S&UxN-)@rqJ+NCJ_KHg+vt8vswnQfuc9) zi7K01>VN9#B>Pjn7VY~f=Ji7=>l-tz{TB-1u#pe23AeDA2Op!Z2Oc}TRzogHA%d`E zA~m3rdJv&0%A!gWI_Cq=N#^lx#l@_$xpih~6Nx`(eh66k0qwSdAB!C}JdX$24F6 zy{Yz&9aOq9LMBTVp~FRoIUvg`jSdrMB{|-KxYjgBBSvF3 zK~{vp6^lAYnwW}ifU2v6sx#dAu;PHubF$kYGNInTE2c*$=?y;|3m}c|pVeTcI6|Q$ zd=NCYSvVSfV4xARn2?X$xmA{k8s1Q0rD3Bk=Hz#onz%34ORux9+(ll^6?1l~i{Os0%ODh3pSzlCzJn8W9I9RdIOrd32>_(cZCsX}eHG7bouBB@ zGy*SEm-0?e7O*54jYKT_t*9{(cDwc>)!(^3QkaGa>&$j9+gl6{C+NX%lc<>SUNfoU zrJz^nLzoVFEj$~tL#G!OfkfZTv`^wl_2a;WFXeQcA2f)~ZZD7&M zsi=tj>PX&>d_T+-6F?*jm9!m3$i43J3Bk94!jJ**YTAK`1)}+iJiNTzZ&!U0dE=db zfo)ip`yn>49)5LlKp=bFX-*DEeO^`CdPjVHcAx-+T8Q@5;becl9eu@%Y^th^eN`Z! z=mS9y{P8V>n6~#40^QPnr8!3PzADPzi??ja*$dNt_fgwa&xh<_;r`C)P9D!| zN?C_KYVL*Sr>~Y8`;82}<;6=T$AfPq*Y-{2nc!>D*0`jzlTSm3{X6!Gliq@YzieyY z!NeA0zWV`25h@g|ntew^M8{kh@>oxf`J4a-)8PHhLIO;kikOxqjoFm`_@cL5!dfwW?ax)v~#)jqOMzvYjU5e?FGq zOB-GCp2Kc0O7K1rGfywtZo`+4AB-$NpN>eIobQ=9l8Cf5u|)wEQ8(aw?kP?Xa~tp@ z?U}*XFJjnZ(7Hx@!jmw0nh7vUAz-0`$;o@pO)=PNf%PVe<#=U%icVy~jR7drqm2R5 zVroQPF=9|Xze;KqYPuPcoa-lNpH?b zP(cvwf>bmFyx=utjBCTcO@i*Dg?rVQ2L06|8*lPPekc5WyQc(|1~c*(@SYlanTCY^iaN(8sfyXd?H|j{dq~?!U{WD;Em83{o{VALnQnSuk(2xmU=5za)6hHmD6z3J7v%}D=BDBe zOlenF{8(-1wSRNs)WA?vMOWkdG2BRX8zf5+k!fGk;eSV-VufS*tfr-`t1)rig_ng< zw*2?$!Z*vUH?hqwh=G~z4-6LT5uBD<3}|Du&WZP@-Yq5E5K66=CvPH zUSAVq2uRX@1Fm<7fkE45n$30wHF{&UT);@Ah}U)?1WKpzH|Jl6lB((#pWUWzwEkx= z2GF^@*&l`~MTP>r6eVTlzOO$I%=FW3cXS3~p$3{5K;UnU+WD95Upm?+Meg60)g4Kq zhQE=|`@>$>eZo-4H}$-XR16&0p^%v%nEh)jb_>|8`Cc3<$=cHX{Xe44F}%(;+SY9v z+ji2}wvEQNZKFwJ+eu@qanjhfZ8x@)^XA)oU*})ER=d`GFy|QKX2aJajinjbMif*s zC5-EweY@J0?3Cs+;jGNT;75B(O#HW5 z=5M~oY{floR8t@^8he%Q>sitdo;Ga@&wAoG*+cl14$I}Q#~XBJ6yri7L(Y0%5NrNV z3*gaqzXgr0W^LRUj;M(JwavT4uN>{$MJ2VrH6EjXXv}o@X-;TZPr;8kCB#3KIjxlm z1BDqSzl+X{&01=!`uiW56tCkD$A?)~rez4!ME~*xCfHA{^h{DEcP>XyP?5!ynHU#+ zy+WG+#mR(38&7?p@uSqg4$3~ZeVf$NMaS|Oo?PU8zg38e8lN7CC1xpuF0CYPH${mD zlhb&_A}o(=`VkMQwcp5-vm+=bJbF(9N`DTmc5#xJ z#a^Tmsr~86ruaoJks=`n_CBC7VLK!cWl8<%{imO($qK$gbc>P3V?=`(t^GdPCZh0* zEsWS-{aV(-Gz0*gN{UuoL#@h>R7g7n!w5SBS5+Bni!tYSUXEggB?4mwtk{C|bAJjq zoFOV<(;xyZb=Rb#!^3=MA$TtO*HFlK7otOAsqGhh|mHu9!oh zK_i6)LUF<;F9cGJ3RuX{g={8>71pY+3`n~$8uq%*ROL%dd=yj5wtX+D5mh_e&(Fw9;5Ht1#VSiH;GJ!+>$c>EeS zjy>qoo@vVgY<5i}KHo>2o3M9|jj%W!_jE6`G&BIrn3rmgk9dOmpu=U`y06%HHh(s! z)4?SWr)l1_dd^`05!!Fq|6#MbamL{)lORQke0zTnGBrKzck$xv_Mj&D3HgKY=t2d} zY&Y0Sb#>D{Z-3DB-lQ)A!7@4mI-Q@>jf%Pn5Pu_l3fQ~*dw37+UdFj*+@Y=;=yi6sTDCYlZ*mXZHrBCRCl zN<(EKhxXg&naG3&G6MVHY=PIagjKE*DjLOzC=y*DB?Vd{)70y$qhlH=gwL(O>Eo2%d{zd@?5v^L%rhZ%0m6!8?otrpY#r;UG(v~$;7a9~ zvH|haE$mlpJQ#71_3l-{dSrpf2!$x3-bIX(9H!gS72up zG~z~_*fxi6bpClG0r*Cy@V2YBSZ(+ScrztS9U40Gy54vH&M`jDK#Kp>Be>YEct&n6 zu#+4I=i_tk6=(iSCuw`5Tsg@eQ+J59BPv; zOOMSsQ-{i7)8Cnm`F_W*Y!OaUu^w>Zw*IYK=t8yM(k#!Dc9PeftP>UC2-S}15y$%LC^3sd@97bYGmUP&$ikl_npV@8(<6Zm*g927=r+`a-T|t_*xxn7 z%r`?-{qK3F8y{C#vnsVG(e*UM!jhOfXm?gS4p$BPuEDfGS4*~-xQXBe}Cp2{Y<&X-PHJz$!wu>!TuTZR4!HA7H{fu*rR0BI~7PKv{wMfMYblV|oqx zFnTpIm3sR{5FBx{U)n{XgvwOp=w7F#4T$gBIVKgst1!p3vA7JdRC6T-df(f{wU4qo zOViM#%Yx2t=-QRUeU&&Fx=*4o-mZ(y?-v-A=AqL9=N7(+Ha0OHK$Q4f~q?H-PqXpJN^)Pa#5zoLg5{cSKodI^If; z)#|uEA~*^37!@LoKj#v=15woJI3I-;78cv3#aTOp{O?yeRKmcQcY#QK+HfXrCW9W( zEFiH{a1;PqC`4*f($g0g7eh?mgqI2cfSKiD$Ah4EAdYeXIE+JmV(@d2VkCNm zOI3w<;ZOLsQ$pv0&OY0(tjU0q1aHWm-9}OxX^xZbxTt{kq6S>jlnh2GCL=e?Q<}nY+ZHH@*gCf= z5}aAAyvMCvDKYe7-dse7=U4svfjh~@T64-uHYSU13iA^1mn~C(|Y>RyTwb z$ukku#{kIUY^I;-FE)5?zbgi(rhWM0Vs?l!o1)Jqgfa%0<&fnhG!vOfHx4(8+it=DQW6-8)eE?v)4gze2{s08N zp`+>iO%*-h9k%^R$pknhR6tm?>G4eA8t_vBu~bgLJ&nn94D(kA9C_nUH?sLlb ze)9lm&Ojh6Nt(#vxq zZsHgUMQo(mlYU)_(k=-h>*d+k2lXJYbM;st&Br^W?KYminJCBMGc(rMRE#%&JrJDm zva!U_X}4eW_mOXv)jVGk^BT?j8jH;EnvVuG%7>d)R?!LsXMM}dq{3Cb*_n6Pchvs! z2?7bP!EQ5#Sg340-^nO>fAWvvP4M`fp+fonIk|xS1>TJ2HcBAJX*U>pyze*tI$aw1%d;-Qn1a)9DL+a6%XFPD=A8>-DPqW-Y%mhA%c z70!u&8%#pp7ERWFwdqpanhbJ@a(mk=wOQ~RyQcs~s!+S@2lk4BaeXAF|Ln9kRoGmxF`I$a^ zG^RW>o+HOr!PD|H0>OQAG!$)TCd*CshRt0bQ{h~;$lhOOvmcY|n5D2m&x*Zd7ll7# zY-$iq#BtZyuR@PMnEwr3$tjeod9K*OdqkV9`lPKE541)t#I<;jrM-uiEn7Zmnmo^> zHtHsRH3{h+^~>nhX$l)7A)C(pvHrLstft5HFs65|A$x}mti3>=@svGpjJgwNu*dgx zhVP8qa<0UHyc0kdn=+c10<=U?f)o&7*s^3YqWsx;6>HK1*aPxXXrnscJ~PTcc^~`X z)PJ^sF6_Z)?0;3~hA;DW{p^o?V9@*MJyRe#1~ftCTLFcLC*zw55IX$X$oM4pe8O5= zTDU&nZ(@;{UqMTiKjXmv0@ts<0FxBBj(vtPC#Ix)W3bz3TZhI%A^(BP68s4v7#SJa zxdDC^AeJ-ibpX?!Pq6u##S_r{_{0&Y1Bwyghxcx0mj{jUD2eKm(eaS&d1{(rlgsLDj(4<%FK4RNs38z@KiY(C9iur znriwtm%v3;+wXUE_|dO>aeZXq7Nv%P+B1XWkUl@USWBFvasB9J=nmr@c%Pa0Y%2L| z?cnW3T^sE-qeB@a#Y1SOxpBc1ibiKBhF*dgNn>)a za}N9n4X%X8uz{IAR|_{cfBK*1_!l7-#VJMa3ZRrTIWGpDXB+9T(dzGPOTh8b;(F=R zf6Cu$5*rlLvsR?UpS)N{gCqpmiZ72d$rIPuIZh&o7GO8Z~#SByCX0Pr~}%UkUpe%H(wEofgT1l ze*2Zv&F1?>{|9R>wbrbDP$(ySyvr3&cBMi_Sw4cKEYEK01^Zl+uU2NYeN`k9_s7Zk z2%Dp^; zEWPHWq79ax&A1wyTOgXSoP{9tm|$Qkz32vQhYB__4oq(GNtjG`f+7-zL!t6TEC%!R z&5-iP8F>`>BADAa$YhwU#i)4E!pOo;^^#*9r-rA~@VTWg2Va?EHwIKS(^VA+GRL|3 zeMA2=C4buz>z(s{9NMdAMtB?8LlOIsFLlFUtfOw^e=X;JzZm6z_RcGgk*fJZ>G?Ic zf-q>d7GB-yk_CtF0td#{0;o*Pdc-Z3S-YDJZ+<; zNa-gF@lIyji7}XBpX>B}ubH?Z!`3HXcAsuL8DHwRnN^2}N;nC&i0tG3@WcQ`_x8#H z5+ch^_kVB+e0OITZKFn?3Y#$GZ&R(CdvAy15abTsoGHFjz5ksFkbTK1q{~~}HFC7f z@nmXwve|5=l(1g`h3-ee_DdC%bUPTaEO}y*_9n*%X_dd92Yw1~h!hOAxd7=9i8>EI-JVf{}EQ>Y% zFU6-*8u^tT#W+RJK|M~NnNeidAu)(hy4VNQkq>XWXAkN`8(;uMhQ9uc56NWo%S>c1 z)|c-&bdBG*GIk@1kc8M7Gv=}lD>B1n>Q0HzV?3PqOr{j2EslJ^H%~mI6Df;#{zxGy z^nwTgKCB11b0T)j7RG7YUX)Ax&w1IjP7)1=~cmrl>HiAzt*U#~iQc zO!oRZJ1gce@^y4A;=rT{Sn%D%C*Q`r$ihQu8Z)xj7?=*dI3OQAoHlz-$b$VXoR=WU zG8N*FGvS0&ifFGE{Zfpz=~D8?N0G$kJwCH%0)<0U@C%Bh2EIq>ueLZ|?F8LJy$~K9 zq!pmbg)zKa!5p+6vKI@jFbkqJb%+) z?QA?5nS{gRv&mYV`y=u2>teguOF#>A5~5PL)voe?UJ|&AFbb#Pr)&@UbjtsV=KH&l zduk70+uFfWggzbK#dLWr*o@-4uN}W=3`vTsj9DDdZZOr0*@wMKD(a>^yrYYNfm)~pcwrSC31-)z~ zcV-BYq-)Jt<-T)) zlc$L6>8J+3xQz~6hvIEPd_lYr-3#bt}>5vQ5UZA=SsLd(`s-fRB-Pt&8 z+x%RQRu$XK;yhfJ;^-CyrJ{LHoWSlcxo zruj9t4(gPAnJ)#KC23zL8)TJp%Ih-bo{OlP`0wlxqBQMQhSd(L5Rnw3B7A&Q^_-|p zO1q*(gPy5#C@T?HR~+aa({R^m@pet;@f|6v%?Vnv$`U=H%^#n`#9zqkZ#k2r4O9AK z%`wY!!C@b*8ui<7$ueldnejTLollo!hM?B#s|I-wLPxnZvmWn!x%06PG>j}Sxite= zXbWrdOx%Ck=$FP*D1DaJ1>;N9wB2Wk0o}6{AqyP_T|o_OG^n_19Wi{)guaSLyUhr` z9~=g`5C42=UX8qnxtv7Yu=7!A8_D9B3zG5%SK0{^P3n(@#~%wtY4(V-d-R!+aa!%5?FAST)@u4_nAo@1!&fUhDJOwtqMQ5{%N z^HgsvOo_`E9^)xVU)Z;xA`c8(UZc6(N}BtZES0%Zu6J8U6CpsZl1 zQH3dC_}9@2@So{eNvIY|pxxd&@S7ARMl%ke8gzUYZ81e{pRgIg`v#?5wn@wjrJX`P zUp@C2%AeKA|7}y9(%^DcXv?(}Nhp?T3o>ucyI%9+WQQGOCJIMC@_$u8m(dj76PhfB zR?q(xF;Xy9Rf#XD%yrbJ-JefNTuhF`j3d-UB0)vSr8y&+IWg0byf;P8XmsO}rClE! zOuEcnu9LJ|5s`DE9w6Y$&jXK`VlWyFHHi4zs*SMqRY!9-l%cN2U?h;q(~8OgQA`FJ z1#9}3VtBP4JjIMF`ZKzxpg&DmJ z-+HD(kzjgF96YX07CpK43aTp#YL&&Psmp1!3zb!oP$v{AF#6_Kt|6I5y$k!*i21fC zE4{xzBC9`Rq8WE%ea*j_OhVQ}?AEU@6oD19LQJd*P=KIHR}`cEPE1UJBobCzKTT{X zB0~LL3Js0@TaL3ln+#6m*Tf!mDVV1mBn2tNIKo+SiI~}uRKnD<>Nupz22^c0IKn*t z1Pi~yhEUZv`g$@3nQ18+D*>6}Dl7AeZYB$G(Y|%!wss41~)=t3Nrz$TM**6`BafENFqOZF9e$hp3-(S=5sBt zo5ge3#fA55w3vE#zV%1f75dTB0z;qI1A=jlTI=z4DWuL_Vew(c)dX}`QV#xQ<98k? zD=(!)iwFf*_gIO<5txdF(Cf-L$^G6=K{sKWpaw&&zRBZocXdvpK3W#?rwYntMqroy zTx8m$rSfF{TWub>Mg29R7$pY!@f4!aBKY2Q@2A=u-0I+$iHW63bM{;!j1sVPwIJ=S zu?J!To{{=ab|W*_1n!1BcXmmvebI+W6%72n{N;5R+2SKg~UQK$jtr@(@nx}M1N}V3$SHbM(|aJhF|_r zLa^deeC!^>Stm7zHH0PhN9u-rl*pk76>{VvqIsvP=sg5LmZ9_Tk?c=oFU`Z5;`VzK~aZOJeH zP_8~OjMQnYZWlx}=e1M^(?kN|oB6M9&bSH=9fXm23W7+W#!#dcM9%jGO}8D&i>@h7 zKE7*O^Yh2>pvZUS3om#6f7ZNCemhOJ&+8mIWgp(aMq#@wgEU~u%S^=|oT8HTf_xY7 zD)2_A*LQaheLaF)VUZ6eVkj^nDl0^tUtyRkf>I<75|Hvkj3@jhol__h)^#F*Vhs~+ z36?IL!!1z{>Fps?SR=Kl80hAzzyV!V3wcO>8nELX6!Pyf6=Vx4Rx_kbo}mdFsj)!% z;YUqWt!eBp5q-$7!E@%J7MJzJ++5KU2lb&Mu`ctZc?vRJUo)L>oyj5?U?Yux7Z?PO zr$DjXJdz|)MFpvfGOwC`Ts9yx;rb|q2vG)Bb>BGfineVTn&DD#40-47p^+XGP$7xL zqRt{DWpSd*I+`cu>TPWDq1AoRE-!KD%&(>1Z#s62)>_*`{d~pnYV+{L z?#Y$ENL{8c*qRVJX>UlXKqd$pjSAO+s#Bd>xkNs*+mtT@*DQH<<079Jj$Y@H0EJNVFZgj15ab z?4>R+`PxA?A9J8sPU>0K>BsldZ^LNNJgvLm%@oH*>0X}BXsio423*o+_#6gB(X}Io zSwM&k5obeF(YMT_z7+)J)aO71!s}`pG?b;PvQUYlQuF9xz0+{JRSL28fPx8mDO1bV zZq+WbIVAQ>{UB5|2SEzZzoOG0pvSyCOjA<0SNcW=LXJut2svgv5D;(Q*%nJ$Xes;?EzgI0xRw{#RxO#5?GQArcS zr+ep#8|w*Dklze23CFs&GfqPW1x4Vj z;qr1A$-KvEKzu$x&yOfP$YY{4m*9rY?QWZU|5TLmR3@f~V;)qL)76WSP{lE!Q7M<$ z2bPBZ_ksL&Rs4>y3*K`eBpfmlcl^&jV%MZX`1Xz*HrY0lv#AvcEwyi%qbaePnlTDS z#A5+X#6cWiIRvqbs-{t-A`C1@pQrvQ6t=CF|BJG7``vN7w(>nHyFyF7_4M5<%h+=g zzu<()5|gx{NP&_}0hS`gb@$7auvKtQrarvSPnJ*kGwG=i~(C!Wl_T@$J- z!im`nvJT@2;+2PE8>vV#!X%m4WrQECQk9f~*>$T~%k+{UmI8w>>*9TuOM;v#=mN9A zP_isB256K~<0Zu}c!WcP75+JVDyw)^)Dv+35vZgAyMP1{Du8|F^(zG2hnu&5@Z|wH zCBBMQdu-YjHgg<;Sl)&<$|5rMB;ZdmmcJ4JNG19K_mX>%~ zgouiZ8qWpv69{oIc%sb?K`Tf;QU469Y&|_!xVc&z>3})Fln}#UY5C%w%N+`jToVWi z3u_SWX%ObQX;>J$V@(t#R{*nNN4xnLx~}+9%X%W$mRm&kTm*+>ZRKsn{w-^eZc+q-iYCk z^vW584jHO~2oW)RG7f{_d1)voSPtaA`3s{w!7D&2clfsjNK71+r}eO8UBn?GdxWA* z9^?pOC^fY)DTtkHZHl5C31c4U982u^uJes~3sxJBYMuw`(D@Co(|F}O+6x;jhx&i3tKk1v7yPDzplc)-Dh*YOV%NtB^{d8`Kt2O_Rb=)FTmi7A(=f#RzMZ zBilIr_Q@GsNIAMd*wYNsyX*dGVelfBrttT$eK;LctFAv-b{BgO_iWm%_KVOBx{ex_ z9>z_jSC;)E&s6~}EOjdf@wmMy(tTqrDgO~i&9Qg=bjbSyW0y;rA_tR=8J=sOnO=DM zyK;kbiDRh{#aJMWJ61S(|L~&fC10m?hNBs15@%jGD2XDnAPY9a5M-1eF{MB#!*$`& z6S02@xq3I)b=OxJ=xFXMn60D=*)Hfmx zmX^wIw|~Nw#pVGap^y5 z5&}vsngvav=<@@rSCu@-Ud)~#Ll!mt(_ui7XhzSE@wnM*qsQ+qeVV0p;gRnlz-fu+ z8IGD_-GTU6o~*A-uI}oMb0+R$(69l3dZQLMR&a#ZAs!jF!btYMc(!#c+*v=gDihXVNm?9Ye_cS=)vllw7UK>#UR*XKxowbQlOVNa?^ZQrfQ`1=&XYj zYlIwEw1nY-QzcLKb~|@!7A_sPogh($;M03?qh05_mW~cV`ubDu@7-jr(~d*2$@$gi z>1Ljl3_QyGuV*R?@c(V21)Rj4>Nih3z_?~m8UgAjzNVHI=UM%1w0rC4_krCNM@QFB zOgL!<)_Q{&8(-r+E0z7I|suLWdO& z6g*4|49VGqd1dk_n&?^1Cl%klXRNDdb<8TGbz&VbJ4q&)y}X8?yMfgp>;(C%t5pc! zCM~T|JO3|=1R1i_iLuacvb5u{F_DV)zc~jF)`hF?so}j%FuSdE){6YIXY%%7l$h+G zcundF#KuAy)+x9WObeXTVq_e&`BK?>SiTYEw?H$aiDQCmhHquTMET=@vMiD1kp-zj zv$90H^1fcN%rMoI84lUwYMv1Ol%-6pvi}(?MIzj~rN|{4YZNdbI80b5=4Cs4LV8(0 zk)NsGwxVRNLYH^+Ez+pxs*Gl)*56XTKd8kVjaQl%NHMN8{vwUG~B&6{XJrN@`d3T*wq(35Tpft5v>V+I#Vp{S`T{bK~>WRC_Bu1ZirYJ9yYobz93CkLgsqIHz6i zT`-q~?XH%8H1LmVs)kZfla>7$KQXT(f-a6I7F$c2fb7*Qo3H7A(ag~f)`kRuICMGL zbb|JHXB1Pjy*=1`?cY@GxV@vXJCvccH>O~y`!*(qQRE6ACelb|LLcsUOC7VL@-l!q zvX6<2OGNvMZ?vDxR z8>&_JLhLhHNDLGZ29S}F&P!M(1;h;}%Ki}$p{Yk2fzPcz&QC)OM`DpAlAx4jssiHY z^a&#wY^t{M)~Ec`6H_kXsUqY?a~|E5)B99vFx{?j`(@H&VflNHrmD3F>^Y%JESh9W zphT0u@pw89Uvk{y&G;Zr7YNn-q2U4-CMH%TtoL}2Bs9Vf4UIZHSjxyQ(oCnR{+69f zkAQHgXVgm*Bl2|6^L;KQ4I(0Efs+_Hx0*Oy5t}`K=*Oe;pHEgL@5O$tA!A+`YT9sI zS`^5@!vzts;RS&z|Ks;+qxT42jJGBB%5JC+t_Gum@7d$|vla(R%ZYkniKX(un}%dO z`;C4f!>$8s@+MYsW@%{%5CBVCSy6xCe_5XV`|9sg+~ z-QO*cKkfIL$@F@BW}8{OUY}s`FMwF_6XH8USqvzSr6@lwR2?607qc@n*Lg4N4OSQk zJeOYp%jZZ%2Z6^P63^sI0F=R}zAD(@(htFV3t`6Rze6ju6lJb7j1APIdaeZX-CT6p zdq3^w($nY(cuLzrUq}$gtk=c>y#C}*Jzy98dl+20X?LFZ9vR6<%Ysre<0;=yd=x}0 zAzXd*7k(!~iBOOm+D_)`6lJoeur)(yBbQHia9VcM!q!|QT@*#ruTfi--d3b&Q8BwD zjTK(pbV&V0@-J;Fm%BOOckm`7c^Qg?pH4j`)+9KrSBfz>*)TYlGaK4-jKl(0k(w^K ztGFvS%nA)A#x8&bEyTES*Tp03a(~~J<_BSrIu>JMn4!g5NhZLAh7N{GHBb)Z=8n&M zZJ1%kXAvu~9xn@EAtM@=64do4XYpXkq7%yob;9_r{(u9inPgm*tI$6bnfBw`g6&jFWBxMjs zl~{igux0P)H=!+2l08L-0UN<_WqkSsvynTE98v{dr?-Zal*sUg>miu&UpDfgBB>SO z`U5+u(Q?-A$c&j{;=6+3DoA=sGhKwLtbeewt;6l);oWt+%q@CiRRGI#l=gl|`F;~d3qnuj z2(SADM+Cn>G3lQ3+TiMQ&%IQe$Zn^&36t~o2jJ9E3k#|(t*xKBqo?P^&WTU>{Lv9b ztLqup&d-%bSud{_B#RTkVn~#d@qw`U>BjlgFVVGK3e_&tAn@KIUb+ANbiF96sm(4g zhnZ;HbUXyPpVkciy&j>~XmzCpJTnwFoo9`!Lx(rM3<^b6RTtl5n*Up{F*hQ`1Lh0sy-awC<)R%bII;#n=sqQdwpk}KJI;wJ9oQ{=9l(p zpnAn8!{;xP>4ikB(P{qVJM0Su(#mT@wT^#Z=N@L=Y|B)N(GWbmHf^+B9ggvRqag5p z!%?4E7Fof|Z~haYE{vw*GN^#DE=Pm(C#hoV6%`*uaxUYofY<0uToOaP752e4pRzMP zQD>6Vs%43p?T4EjJ@!!pO?>kU+`U^gZw@X_%(~ z%$o4LZ98|lL^XB)t%fT9v)n-#A;MkB!1*u1q!to+MM$^$LxeVA3@(z;pdiAa`?cSz zWqy%EielnH>Vc4A(}I$L;7m!y(Qw4l>VI8vo9>9HH>8*p)FK-;fl;sdgJ-2dEg|UR zoSqw!WwKMl3oCnQL7VKG0zyPvpDX`oFjc-Ff$ff7OLUi#I*hiYzZ&lMF^H1fY2kwz z&M^UgelNQ}eKb`hnZ&!h4$}Qn>4Lbw>s~jL9RB9nOj#j;yUFnQ(4lLaiMb!B?q5ZxEuuJ) z{lpw9-fqJ%r|R zWWJw6!29rpzPT0BySYVnOfI)Yd0!xkdEz2UP={ZyS9@x>m$eX&{MYV_JD3EdSbz88 zr8!%Kk$-q>+K5a=<%|M5EGQ-}(z@_oAwT-*WPUXwRRCnrYRJwccza20Q~G1)xU1 z+yBtU3;5O3)utH0K9&Gjf!!v6X9!51>JH33J=2emj}@JN$jKo93RxK$83q8)GE*om zNtOVx>j5b{@W_Rgl{Pak{wu4iz*jQsd>tL*H#T&EPtC^nx3&nc+;J(t1CI$r z0@SlW{I@#nKw{W%g>oS&WEA;F%!G$ICtqcMbdas{-!JDoo$$4NxNSbE{}Fz-zuM`{ zZaSTO%(}>&YIVDfn0!CVtsC&YLtJ?XFoy$W)kL1wx9tB*B$0o4QkL5RPED-g_)0a# z1>y8FI}8=$+^FbK*_qCD5QNs zs%4CISY5qvf>rJtq#&KgU}bD%Nf=&PBbkV{e@#T}C;cQi^VoVS(f*q0079a%NFL`l z%@yF9sb2$2vDsfyCX7EXbAQ)RU%?YBK^%tYFGLnFZIVzTH}jD&j+#go?MpKz|juJmmaw4ucSRY$azH?l))-5qnD4OJJ+tqK@$8eq*X$6 z%;U>5Bvc1I4i+{Q1aeibd{|8B^vAN&v_^$ARga8Fq|{_EW)l;|9=RC&`7T?M{Y{jI z^A7|*u+CoODQ?)}b30*k)BOiON&_S^7VH z24AE+8O~2X*QaCjc(YkM8iwxguhLS==jUhleQLd7AO|ZH(f{sb(dlkp?IwM(t;qQm z3`4uiBt>W7(`^n^{}Nz2jXR1moClMKVup)n&iY0Ld8SK+?|XQcb|0KXkS&$7F`|m$ycI$YG#5Iy$hh zuv;&DpGh2mn3NWroME^`93T8yzUa*bbjEVl5qlymPV%!uiNHN_8Rp_z~nB= zzTO9@>>Z$kKz{!G+4j(W@hJeMXlS)sq?_Qmk@;VPZHkU77Qxey_^&ROXWk1B1UcS2 zR3L1~;AEllzfE6@82PE(Dc z2~PftqcNf^+Y(wd_&Q1*$`yK!-*I_8(RT3z9Nd4o> zs-RRpK{q{%l;@B4Hf__qdA^S1^pNzSdpP82E{c7;_hC8FJeJN2Yt0E>C}u;8Ev|iz z58IWNACw*Z)jvm%uc8C1wJaqrHsnaiz(K`2J!CZ>L!T|twO<`0TaI$jpYgoJY9HL@ z`sIcrqh1H+mbx?z!Jp>uWOx#bG_V9>pZB1<|9&Z_lw4hww$SJRVa9(0>+s|!8}$3@ z>F9l#+H=L$5K|w!%KR&<*gsi7zd%u4HmdvY4pN{6_%t=*<1Gh1>Y8Gtaz z-3CmmU#0V2$f*`?+@1KoEiJgS%veE|`YqTzSo3mmGsWe&r9QvSE=42EbXDhJy7H8y zs@Q_!9mOR9bidD@LC>pb7}K$HI$#AznlD#NX|&mBO9LeO)quWUOiWC@$rcX~MFVLT ztlHjJ{jXaP{1jnKF+A6h!otFB+i-SUfRn}W=3v}b$#VpyzZ4vu; z>j#jAw+A?43ftQ=KLdDxLfv@Tc$k@+bDmyI2j&0p287iWiiy)CF+4qXJ~tVPEJ~mE&o-73^fdr2ryXcx zAZCqylb*V8Iw%es&BV(@HxpxHal1QR7iEl##K?FJFJt1*)ESLKlZS9bgd=9Pr=Tvu zB$S_zBW%*eHr^kLKNOX0wGC6$!-7s zk7uYh5erFG-!Ug=+Q%GRYoYi%Xc3}5XkO&y+mx8PA67b8N*SY{Kt4}Qrn`D6sV$ot zRm1PHO7aEm(XGbJM{I1kZw6ZClV&4Mk}M**-{G^EgRZOodKv94G_mke&-F~)&~W>N zXk`+${PlDG__E@Jv;q$6U8!&XJafAw zqc&}hFPb4VY)VTMvZz4NP>?#VaGuaze=YOzO_KcQ5ZL+VYeI}S^j{c6A1BnR$21f& zND2vo$0b=PY&ANfc!1*fZn8epxejrf@vqaP74;e^GnR5$MbzNpi)MQFYsj(CBXlP9 z7FzIC@SuEA0b-3mw46|)RHT-aftTp)fn(h!lW$sHh`onr2K=9@iTz$n5fEz_gOM%I zmon07&Z52WtGBgmNgyenb+O(R^q~tzpGuUCd)!&?>n7ryi`W$QbJnt)i@5)QsC2A} z507n!z+}Sea;ro9LDIB-Dxb_5)f7uyH~geWw|ek>ndNIYF3Q{Sk_1ubfCSlsxv-)D zqo3TJv0rpIO%Z{+Wm*j?L&AIETUrU>*H8?d(YF7F3vGzN_CNMLMcdy*Lq<-{35dbE z0`hSh>Mv4_q78r={=&k-Qth}e<$At0oX%?X7busDRq$^;)ed4mu1>`q#qGj&u zE%}_sfj^R)8uSYUq+qrotx+3TS+#Fh79CCk9vlWqVy2h1qoOG)MA3D7dN(rqu6O^M zCP%gt_>mQ&E6yqio2djA=P9gtX8hsP8& z$x<|i2dNjYldbXPq6(11_8+f3MAN+I(l%Q0+TSt-*T zUs436v;DFM=I5{V7~h9?2_C-_<0}+FX9;;rF8Ayc4pkQ%P__LtA*biy;=026oMDL1CqOU|b+0 zy;o86K{`xnNkbxD9aY$@+yMWzu{)+>L+a=$4`o4F0azkT3c4mkSv-=uWjON z8D_Pc`n8*2EUOQZvu^?8xSg*2coD1BG8x0e!1jB~P+caj^M6`^`9sB3g9K|B>TGlt z6=C?WTNw`zF>wJ85$t~&Q_CYgE7aLZ<0^1)MGb- zkNwatRdHF_?Hkl6V6kgXM4n}F7?B}}D3upYPfy3hf+~Z6g@>;-8AT5c36XvQ((l+$ zcqhr3R6g}WxsFqLqhRcpVX^*y{atMsXi-sw;*bOv#2subNJ1?ILH!B^p=4#C@~A3k zjG&E)C23Se&-Q%ot%CkY`Xw$Y1c-Q{)e3(hI(R?0 zeGF5V91O>GQ}b+w9YsdqXOo5X%~_J^h(iYca`sGII|98bN>7o)6h6Fv@V#L-o$%S; zxsgfw*n|;pWYsSq6d-bFC6@Rv17an}8w-QT1jH16^ z#dtv?EttXDasZ|@CKoXlO1!k+qBQm3+uPG`vfRCb3=h7=7JXd-(NH5^#%1A=yb*85 zE9iFBK>=vZ*a+kk_T_f|e%|g)spQ63lb=*W^X^tu8cu>g%VpdDiZ%`R;$;1LJ?LIx z{e0&58~{H*6A(5M&`h0+qX9or9}`Q(etGTsPK+9%Oia6QncC>44^#hdRxPt@c^3hO zTV-U(z_u{Qf!6~)efPVAVmaC{z9%h>Y8B;$7I0hzzS{cjal2j@Y8`;F)!XO2*l7>n zS@7oe_I9**C1WS2q<`ZrFb+=Xg0Kg0N*xFHdv0E5^I1Oc<^!v!>U0>Q(Y>dO z2g-{i<%-()K*N0E-avtUM<*Xw=}jSI~hYS&Yab=?ob9=0+MSyMdU1h z5oH)xl>@O8Y558x9#6nmm=M`3XL3sTaEeRjMOSj;IdjPsi=q$CT2SNm<1#Ov3_Bd zHEj|9#-fJC#@V&C$fSgf3>@0=T_EqAx7K~q(hZm=Z3XHQz$f4a!5tc6IPh8u9gM_G zoeL!l^Z3U)=LcRG&&$JnLqO8$I1n5rgu$TerS8ppKO^)nznTU7gZERlZbKm9;9m&! zTL)0?JG#sL;-OKi*#~CC2~)>!dcY9vcEc&~S#kciz|v*aeF-SEQlRfoA|Dria~$W= z@++p)a>C608=9<%ly4?+ZJV6~J4Ph+oi6Yglm%lD4CSYN5SjdZJ!V=;1j}r0?`(kY z=Rl^0i}H{5-1Twa_uSl@%HihUvZ5!6{q z)d6}DM2;8Gi|=b`X_BcmGUU869v(P;PV}K!X+MZ!ob8u2d zT04!zXljR%K?b4|RIyc5UG&({sRRTmqx32lFiRrE_eBm-f2`X`r_wa@$;n3_5$e8{ z+E;!aI{aOeHF`OlHq=*Qe^8?;9PxbvouHlN@p#+ zolnLEE$dg@90XKQ-s;kR(sWK{?f_$fQ`TP*()gkhcaWP3u2ppjPP$rPq? z#ef!&c~p&@&rNSywT#1q?_tV=m=+)^jnPq;Sov?Ia)!_N(R~@=znJ!E?GNp$Wh0*Q zt;)orqezkh+~Hitv2V3E=j$VNWc|l2f4sc8!S{LKGnJO%@F7li_M;KAeaOL_&LN|~ zlaG>r$A-DBYCs%YXi3EPklcZHM{A?dXs9OGX`SBUAgsm`w)zdKN1(ht8h8bzQu^)= zKJaI!`^)!|!(yRACG;!k^4r{r6VM;gY&jKknA~jy{C<*bY$2C^r4M7Rdw~2>At|NT zG~ejDHMYDYi03EFDIG+0ZQt7Xh~d<$t>#A1AkiAW5i!o=YU^+ zDaDrx#{8$9Xmol!R3(fa{9RfCrfCy2)>3FSm}$^Op?kSEZxFg}lWVVmB4SqqZ|?M6 z>$G4*ZHr)-6g7^9nel>pdnyBzqq)_dG{Om z|0gt0dReE6L4asGFR1*(GSk1zefyV1-~T7GjO%?e|D!&9J;#2H0JRi$%l89A6(uE9 z;1)Pz;qr8$QtD_KsOJ3J#sc@pBgLt@l8%ln|7fRDCiOtBv0%gEzqGo+(Ns22{gLH+ zF_z`I5hiT$0lx6=a{jkB!KLm}Eik4obT+ReEkJHKgD6LaDi8uwclO&F$r>8RSH!^l zN(1y@2C&hHB1Wjw28>a@f7H+GNu!epB!sbsMU%&QBd-%lXj0)8_avQPoa`Bln`-0S z?~|L4uz^EZ7X)zoK2vUWzTy9g5o5NP!;<;kV9TzSD*ND(nT@l3zt&tF$dyK< z9zzo$@&83EWFQO)`du`wsnE2RGZ_qb8yk!zqziD3XR3EMW2~BLJ zkIUjVhW_+A99p8;7}!H$h&%OQeMKRkqi={?ZUmnA*rW@Z(dfV|<-Sdh=dA{?a2rE1 zldD@g9*LM$7J)cqh~4_AxnHRPuQTay09O$a_VVIzj9E^h4Tnr7WBF`>F+`xjL`)hd zD3#Qz{qLnJ!moRmcYlMbU2XGd>K1)*WA(?5CFhm~Gt7^g{?d#!H%n){)w^6*Tw+54 zCq3lx8})|jRNaN4-<8-K*hPvdk(~ZhrM;mcy{wa-P>cvf)eKnRVa6!+T;Y#s7F@CN zgZ2;$WgX|jSQ|ev%`=z{R>ibQZ+L9&Ht`m|doO|*faN=G4nded89$z z!?tbRoIIZl5!e?W?6b;!*f@MLeCq4A@Z~&*Mxx#=sn=d(4tM+7JM8C22lKx*e(HTE z^L#<{J{IyiWVwT>WSEG-<96G6+f=*d=1i#4?aW~C+W9WlvEi`!GUfUQFiZUT0Nhw2 zuF3_&`a*vm+J1%r*$L3w0^1GzH+Iy@&-L4jPr6Qz+e&M;mY3L7y2sxQiJv!#iP=^k z`lxB3^4=L0cjbd&uwP@I0p^UvKfy4n+|DXj_&7%E%;@rU8PcD!5wN>%=k;dR_@xzb zT2ds$99e3)&FR8hCL8%%fo?B2fDCwI%qryPW476xiy?*HTk4vdm44dj4U8(i_#Ap| z;gajiK(|hi6I{mzAJ>m8q18(Yyc3GUze;DcL$*`%{P%EQcMrp9%blLG#uGtER&QYM z)%?m8i4t)MqvbCm>C{_htw(i3VRehB1Ca|30~5Pkj5l-?_o3<2)Iu-$fV=kz*tGPg zus;@jeOWZ$l6lNbDWL^)VR?u~f1pI?O+AEH$^)3s73aHDqhNE9K|Jk72Z<@ShN;lX zP$6|hqk>lnsY&~o&8RWakA$I1cv8)>;bxPwtGw>U%Ps(hPt*8^<+=P5;id^5G{a+=L&XNg=Tw%ZBSxo!;A&nd4@F&Y$ zuu)*qBX_wG<{kjZ7?XWPDw(8_sB|Lo-WAe3=;4%tUH9tr)o8(1A*->vBY*p+89$a0 zEH2WkurFQ!TVm?uygB2=o$XjoI(+jTaqLUDFS}soXob#HB|j{$_Y@keA^hFC`W$%Q zoggjkqMFKaM;URXLl^RJi$|bkWNFBghN1b~tFIf0fhP&TY>t8s866_hXaKA;PeU3= z$|$5WXZ^78KeI?&ksvyvJ*OKdMhR!c6KzT+DK4t1L6~R7#={$QK7zEAmX$@Y+3M;v znTk26^+;3G<)awjF~t_H-u95ghyX6A9zy zDYVS)la+=IjgU`IwO6C4vEOC2T#r|*T)*h$)<6T3b?&6qM|`)k3{DIaS#;UjH{J-S ze>bj)K$n%Lu>QoU;+!g==6nLBg7|Scb~7^sI$O4#rh-w+OCid7`+nzm1?KMY>h<|p zU0=_{#(#3Xya#l}Wc^|5s}m!5*B*O$Vvvn_zgtKw1=|R{4}tYn{H$20|3@Xtecz|} zUl#~)boM>n`R9ia4CW_pJLe}9ho|J32JL8xyU(6s--jq5jxZYVk&>+}~yDOo_i%Adq zi__0&cZAx35I^dU;dKx+m{9jKOoPf)H%-_08&ui{@gb(MzDomK&=N0JH)0XIgeWX7 z5t3%1i2ieye1wHw@}xl>-cMAW!gc*j0|+A}5rRzp8?4!kFxdH>bAbNTDYr>Ur9o2a z9G2n?K(riVhMc%4xd#;~daxV?Qh|yoQp2SS5dsl861<#7lEgYP$=p6boVlYqS7+%9 zw4PeP$thyqDXIly#|iqkOv72gk)SNeu7Z{I+~wO}KqLgELrx!~At_xTHEDcDX!+kL zdk5@jzQ5+ZMKgf@0#(b7tXRS_O$_7!3_WHo2&CdMrTW^1op=GIC3y%H1+SlPcXZNV z1~^s>`|fgA^yFT-m0H|x))qD`I{Kz< zsncfhb81TV-x51cvUtR_zDSX(rt8%Lh+W(iY9)m_$kkgKM6cBybLu6rkZ_4LemS3R zvOg;U!AW3q^|GV0+liu(pTPXMH6{ zN0}fnt%*T%Ji=4NVYkMOc4?7Axt+Uyv40(FT!nS8p>RKUw(h~iUipysPYv__F`tZ< zTbf(vd}H}zojC0L6=!Opj4TEFM=68g;cqH43u5S(r)SEhPp(=nwu!Ow%_&PEmg4Wv zT?72?+T>TR(fuUDk3o|2j)9apo2)<7SRIjJXhmM^NtgY8g zRyvuXNE8$Lml-VA_v7uhGNc#`;?DJ(k#>9CVp)7 z27PK5%P8hob;|E++P6?I-LEDCa&mODP98~Mk+IfR=HZ80RK2$nO?k!3SJyM&`^KB- z$<~$QI@2R7nRoMdWcMagqa zDCmb=w55E)Q7%q=?H4Uk#fEAC`62dNh_y<%ncO484S^p^nosInc)-1<4Y`E8u#o}A=< z`7bo)Oq&7PY!+Her#e-G z;dy(TluHkxC>o|gDu&rN(Qt|TQ@!KYS=*9kVt<2PbLo3h5vP_(e+(ytW})9y4xvBxg5F= z7Rtd30ElOTAHfFgBeT+E6$hiJwX5$J4iXmaLmiPcz&ehD=Y-Hj$Ob`<)(^27^ZUc= zQrQ?12d(M(cpru*wV9Aa5>71>E5C32%Z98WZ{h*DtZtxeo?)EPnRcfRhbN$zyg8GVwE)zD}40%;ktt@Zk}S0AjIYNb|ww7%kI{ zCwkDh(#MtPqL}z`s(-#%#lZ1Fhfi?EP3>Al|L$8(krBsAR9D=(Gf(C_jDkh@+#gk@ z%?w3{B?-!_^$n8qIvnnJA48y>C%kIWe$G#9y{!PcxAU0!yct;Q?mo@1wb!IWubA5_ zK(WJjoSmU0WcFu0Nkb745&yN(DQIbp16{8C=9BcT`zXLX%0Et-yyOkgg6;QjV+4FB zT2wjTFbo#fKHN_I$QfoM!>k7EFA?x($>7P&COSM1*0*!qysB{I80tDlnRPb=e2=x> zKbn@l@bp+{KPqe}`IJHgyS^?SZ+(q|@Oq7Tfa1$P88@`@x{icv{J@Zx$?Wj$ehOU? zn(F3hTY97!4?vxQzmZE7ZF$Wah3(1L9b})vJLJU-<^1~NmvL@$vy}u_RTvAWOjCWq zmqHeXHc}*2i}%Sa$*Twy$%yVbJv!t;pxodwE%LvysF9W)h*d zo?|$f*odl3*S_lI;enV(=LB1&bwx-4Z=@BVrYcKaV4nq^#tA7ABPAoxaw}5IPAq}CxIIwIl+z2+$ z(v!iII6_%TTjhHkjK8#`uy_?3lg2fI_*+1H+-g~oS|H7)-I~kFL&yfPt_+7+M#$E(Es*)bYL8yn* znr2w>47kqs6XN{>jaOdVvyB9;Pjb^*EEUw|WmTl+8tQ&KG;ug60VyD%R+~p)<1wGW ze!a~{88H&R$9z=&hq0l@Sn^N@+$#9v<33rF_z;CS!SanS(b#d)^Fj_Z2dmMf5Z(Da zEy3p7<0X9TYJ2EaK~jMVM``hjV2BWb;2F|}SgNQV4!6GLJ^E$%NEp%C!hxtokUFNF z)vg{{Dt$b%t;;ET~b`_~Qq7bA-D(}!;L&=h#1_j<0)75na z6z=qml6MyPq$5evLjt}Xmd$c{&HCJNzB<UN>l3!KDM(Rr6AL2R-9BF5~v)$ym0Rx|2%3PutMFNRpVxx~j-po`#}EdR$n)seEM z=Ga&=%`kKt(3^)6Iry74(#z)xHfsrNSn2(KG~4U0Dv-lN6`Q@vf&hVsxW`&X*l(vyKy1>Sn7!R1ZHPuFq$0Q5&C(?>M4^5Nqdi z+}nOTUp~LOBHsg3X5F&!kYVCxQ+anFem9BS3+t%6-g-59WzOdzg#N=L)#g{7uFuOn zYyom_Pu_0RR?*ACG&Kbh^SANX^=kE(!-sxo5WUa!zkInTQN)>L|R2+VFQ{0;vMv$^#7+MP+3pRA8xXQtoRtJTN9SM^pzXDC`8G8#z7c>yf~qZO0aGOf`?8e0zS?+o4M5^6>Ft`<|sq! zt(B0w)rg!-yZ5XC-|;k4h%BgI7XBu)qLXxJmIp6mFE!WtkDq%=GDQ-@jBCL%W7n40Pzs5Grw3xDz zM$6+Sb^5cF(U=6sXsyPE`m@aa$}UH|PfW`t-+34sPSyLGtYMUAIIH!!h~I0s4Hju= z#O^Vy>&qi*DD68~|43F~a1Rn_5aiQ0Peph0aC;buQ*J_E8abCLBQ)}=Vj-8XOOC|IRvw+nws$0@N5#DzJO87=91Ys!V) zVHa4!a-|@;MBDBR%I*H27eIfChHQ?N$j2|$Pcfzu_QVN+7S&u5dJQlQ6NXw$c$5bp z-ZZhXNiT@T)dPz710-#h)Q29G(tF|qU8~UAC=pJU9Ova7U6>%HHbM zcB^#6bi+>)|6I0--4Q?)BOP)Bh75?BWdXWLQchdZ%gxrOhGvt7>#f=5!y4WN$(LzT z5~-ldeAWB*_N~EMNAqa|Nh)WncIn+aO&#M*rT18@`dCyfuH3Lx^iOD)~)ADQXRdS2e=3<>+}wNC(b{p-%y*x&ArVk(9EAE{y* zuTACC+!UpyEDKzHDAiARc}pu7j-SDuUPq^jFc3EhJ&+2Mc_*dR_o^u2bf#SXg9!Pf7@w$S-!Cr-R_&4U$eMf z)^9D18pGWgNuZCG30Ae43P!W6VD40>8)s*0~y8o z0wS`o6@~oz(*&2%(ou+Mm-UNR0=m6w?Pds>Up(vL;h{vRG+0S_SOF4pA^3p3rlnJA zYbo2}bz83a=sVLu5SQ zqQ?&12d5JRStx;EfdouYUsgj8?I^d#tNB`Qubw27?y8`uxw1`xUBjz=IYtrA{6-0G zn>-(EUYMVLb!&AhRCd}t{XHODf2eTvkRNUbv=P@vNtE+wk!PZ9Yhi9YVM_FFh0k4bL#`4q$GsHbf6W6?=mHkA z;$*ritzEYQn7W>4pEX%1^T7x(MUtt)UII`K^kE%cJ2-K8Gdf7&AL+hx*+IkiA?d@2 zPR9)^_G>S8C59!vHyB_@^+93j7W$*0ig^xOZPneS`A>oHdVU62o6;s-tToWxtddk> zH3_?Iu26J!d)x^0y;PeKlg20-CyPy1rTh3QUG>ad+ldG*OyGMsGQ1JJ1*Ut&l zEK>I9vKl4uPg-iNjTo1ZV=!~3-tm8afawt9z@4wIj{0x&b??CV{pk8NOT! zpoEo}`))jUm!xRY)1S!3k=_~8*+M@RO~8lcmx!T!y&eOCzdFOa!>I^u)3%MY*c@#) z9BHi-qlAqJdwOHq6PUgYSLV@K1lKc5kS(!v$e(ZmwfzEho8@R8bUL&ohyU0_#a89i zx_ydu)lEFsHmp;_XO?!wuQGNYoG3AQ9>({B!?U7J+jT1<*G%=Gyqv9NX9(ChXdh&& zry^OCXR|_}aMOQvp8fu<<$VsE0v~gCse96H3k?9-+(pm8w8$^1sVG;u&fX4YN#>i4?si z?zxz(EZDPz1V&InLa2|}N_f~v!frS#7a6P>s7RTP> zfh(es*%Y6+f7H6#ya!Yb(YoF_zxE~tZ) zsT3jXTiPNY1rWw}?!R~`(Yoit zI$%A=y*lJty3`DVrOJAGZoJw;U*)yt2fRhxj7b4n36EW_dAu{IS_W08)TUW3aE){O z=`xw(r6E|C$9bH|I3z}o!rhC6WR7P)%(dH+PBmD<@D#_crL@dnUIOEm-fWw(ZNtuJ z?#mLSgk}znW9n5D;5aorihC|bXZVeGEoIX8kmr!*GtBX!u^W(fUO)s;n`R|R;IOW> zUvF+;L9??KM*=iyOUQn@L$MfR@&I7zSOtM4WK*0)Npi8*FxpA1no!jB2>Do`r?|m8 zS48$VJfdrHNss2uaEgj~aH!R2B$A0J83K8;4@`}4kL567*-Rvd?4ZP9-`T&-19i?& zv5=OI!r&IxmO6V3s9=QkX@NW@+C*a&^CbxaE^`%I$LW|=je|;0RonNn?!x4bIca`F z7{_VOs7tfvZ2p$kaOPjF_%(CFG&D-1LlNWDm<#K9iks5AkD}38NqB5c{Md0;t@&_W zM+Q-rU%9jDBCHrFQ``HCopvMp6%092q-}4VoF};4SKc|sa*&mF_!g`rUBmO?D6vZl z{9Z@gTls~Bfxrwb{PdmMwC84jtna(gKi^ZxaB-OgRj5CMEKU!c9>PS1#d%dB;8bFd zYLYkB=C!0)$h< z3)3^BEs!~HYig%)l@kWv9ZWK)DN}SLhGf9HXZ=QQBd*eE!(*2H50} z>!hX+b41mymtj23&b@6Hvf%vv#MmXOmtFnI1fx66-v_*45~x0i1b-q=ahOAt*p+88 z(Q_K&s4uXo4f79lKJky|Hecm66(u>Q;tkDyKQdB>48>&%ZM0-#R#xo25u+y)i!s7X zGNeXjxFSIcQqHP4C;ld^t)CABjTVz+B96hPY|ZfzIP5!=;88ji?`Ho{ zV#(IaJy}PLL|ctaEKdjB<7V<*h>UGBL+<&_49 z-bLoZ^-v+6}RIVgn`#n46Cg1>y$J&}ggrQ#r8gA3Sk`ZCnS z2794cuF6iz!lt)h@f8tk$s4PqF?Qy*U$9~b%Cv!yQ8)=X`u<RE|EU!2{1&M)FXgh}+F8{p8G`7h3j=U87f_N+`-pmLr;36ay>AxL)FSq`T= z3kP86F1;N-mTu3Q2m9yp9%mpdri#trj6)s6Q+=MYOyD0;qshXjEC`Eq=D0{``iJzF zrs!%8f?^{kYGTGzB04u{FrkBzoUE5+w;ok14yUo+Y&cJ^TS<2nAfYHcfD6aowb=A& z3VI$qb1Xo$y%HzehYi`C10;(i&F=vly$pQz=~uu20Z-4XfaEB!KzHh20zplFgBMt4 zpbhMJ{MY<}spni6aKg`zq^bu@6M#uT^m z=K4!+jOgrjqB^FolS2Lw_%r?qO{Z3kj3wfLpwhI(8d)dv3qpSwvb*R6{pxfDDzjGV zQeJ}r8$0b8FQY8UIHZ*CsNepETB(`@mjeFA_B=2t9rpW?)eC6gD^CG0|fyGV!>rK%q=I2f75QRD2KrPJ?(&z1TNsK z;uGd|D!@^;9Sj&#h;&penfT+ zhLvMVr3>nCwR>)?*3*geurmB5tKlZYsbld2J&9 zNoqMkEaC5iGGgR1#$qh+cZY>|F3ovSp?-l|Otxd1N>~9aViVi-p)$kM?$Bh&ZThgd zC`mFjd%IH8y(c3^4?`ShLCuB1v2U6^!mZ5FMn&Q6Kfhru_{Up+#n3l3n8bq#9m_+< zyBZm6clvc4dqYuV?itN$Y* z3_YM@O*wx(*%})=QZ&jvc@*G2!YKdnfQ7g593xd;Ygg1m=N58L6?@nrCw!7Wdt-{P zh`D(k5z)qCItY@mbYPO7?poeX=Wv|1f}FWC*lfslf$nr|VdYTK+h*#C z<_AuoqS9rXK6H?I-W>wfR=$|UVb`Ae1iHj&3Vw(R3L5pOyK~U#7?Wz~NyiuZ>pUm5 zqwMw%BdF9k8+tiD3k8ocfxo#;acyLgzrt+Adz&JH;n`CdvU8SSMkGCan!~#`i7M&| ziP?f^N2q(udf38q|M;~b5{OCYz=x<%hMh`LaTobN+fuJMof$vczi7X(AlK)dh(9suvS2)(CxO6G(5nItQ_Iule4}UR?FC`Ioa+r`r!@`Li|R+ z-4x%hciOWi74+zXEFpN&dzDvd!ey-G(s`)!mU+f})&9OXU{Gt8c5qea{+xm<#2aCp zOv+oda-TIGe$>gAaLo{mbe+4D;&>S90VrdCxpr45S-`5&IJ!=@g}W&{8&l`lTCJVE z>h>zhy_<^oa}NDu9_{^h$-If(GwV0;HO1@Umz2Xmc(%5kJ%Qe*SAcsxUDJi#ORt<5 z$7>i8rVk~6Wp&~3Mx3Y-fJRXTEkkGx8H&bGW#97jSe|U%h1mV>98pOxB`Y2X>gHe) z1C%Qc+iIbdeWBwC?9_{wOYx zzCHi$PXDz^i1=QT5pf&7^~AoFvfI!c+PYhhx!U%ltjPGy}TerdY1&>#JBQ$?*Nm=<~Y|kHNM6Z0kmLF zL%3??oZE$bUJ_}FGW!kHRut8C=lW2UD@P>QTVM)77YG(K#Li{JsA+AQP~XsFGmEn~ zE7=HhIGjkUK0e04#0wK;i^BNlN+U@Ise1wTu)+GqL`iyeo+~n#t8ST7@I5(n5P3yP zY~#WfNqGi;qn8PWD5TXLJ{;|;SyGm*~9PO zx}`q~&hn|Os`OedP0MVSc!vZTn(KHUy+b(GxS1c!Uu5c?ad@3AlJ7jf#R62i$A>(Y9A1~KOG_KG(?c0b9B@!o-^cWW%pjh=6UA=rp^rbPkpx-_f-uXTbuqGIvNOKO;cd4rx&h2#nS_X zi0M#ia7w%e1udp{a2T>g#c$dpG%&TnX1ed10-Z;?iS3oa?Arq-`8~t_Wc4|GFIV^% zB9C81Io+&FQ!Y_UJw8<}erSdm6UEZQ$2qSt)ksJXqaHawCoKo<6AF@cn!>X*nuAbT z=*nvp4Yl$pHe^gCzv3hWFWF0!6SbEreBWOT?Kr#g9jf|CXJe7o&w9piXU_=1m}PqX zI1JZh%U(d$Z*xD{8`*dkGf2pp#0xCGmDp5(`~kZlTCDX#26m4zX?Jx=Ag+ih3v&FK&Z zR~w`{V{?o~w94}ek9VgxT=Tz@ z{owi@GZxSDUGA*Cb$>}<;GsL4BXKI9N6s34RjkHcpGMAmM?L3rw+;Y*XK9#qy`kc} zA&kIZ8(#yzRp_|)_O1IxwznRL0UlNm4rO| zu>Pn$21OVDK&cv>!;AvCmfj=BJ!vMoSvOOWv{7f>mT<0X7VhEfTSe*FecYc4C!cqIPu@}aO-@*20@#qG(FHkc9e)*6iWqI?}*f{gO^uDzM4$Kks^352vg z2EUb1rSbOfCt?m!kf~BZXf=7hzfq7=_-DJSCS}^l)R{}={l%7`YV+{wdT%v6o8t%F zbWkKu9j~)qV*~oMZ&k0_{;%@l7w-EmdKRhOGa0uKfg91aW3U=3CXOv|L)oyY6M63b zKn1QbP6}*nT3!@hcTT@_H!6NYiV(O^B9|Tu9$k$=xYT%~HsNM3(7~LZcdO}h_VOAY zwnxvYz0oGvdbnvAN)+%+9&>+=39UuL$I$~H?0EF@S`vDR2q?8AGO*BoO{7O6Ej)z9 z0Ued^1y{8^9UB`_89u?5h^OSK6_)<1mkI+`tW#tjch-2ahS4Ch?*V^mSpgV3022{J zfP+V;2DqQH^+W}QCzHkJ|DFr@sW@MiuS|Wn?EX`wE@BYgsS1wdwdb$Cr8xCu9B{-W z$Nio!{V^S)%3wKA9|D9kD&TW2Fy4mCyW@5neG~G_e;3SZQ~AN%$9ZIJ zLLv@pSj5q5fBsHQ`ElJl!C`{@cp6PAr!MFvK*z#7%<{gmHFHE`!ApR|K`c)aR3Y_S zvM?>*uKhPLe|5H}K<(md$Y*x5n#GA8)ejjbZ*-u)a8e9ur!kGX6rChUreRfTj1v zv6fPouPr_MEkt!4b;{&m+a1+hD_XH6L@nZ)Q!8Kp0UO!Fg8sN}KO?_7-xMCW%w!Ktxgu)+Cv}K zpN>pt>lNMpps+~dD_5`JqZgCO52c?JA3=usCi}M>QJRg|EP|CreKgdfO@H&muNC8w zyutF{qFN0@$~Z#i((v|jO4Sf1n)3KD$cdh>MqvsjJ3-Wr52p*-_JioCIVaI9(7wR* zfjdyl0oH#LHCf;F6MV+S#Ej}H)nf8{bflN@Hiix_Ub2e$oSjI-B1YYXzO3u~u>aVg z3)E_xqkTU`#pSOBCE6aP^M12(=OR=$NOQkm!!qX&y5DYlB>y_}{9?Ha7m}66=k=&i zUHIYk@szkgmb~XB!uQY#%x#v5i6u_A>P0a>&9K*az4dj=Ra>o~(!?O#0QFYSjnC@J zlE1&BcU~>WT0S$pGeM@aY#i2n)xM!C*>pdidS4l#{WEB+T&;MvPa8n3bzC3+edIgJ zLO#f130U%ZaSZRI_I(^MrwHb}DEcT(kQmins_T&c^IErYM;$Jevcf$FD&6hR+Itu9-wCy`SruPaQ-VZj1 z=XH%NpJi>qWTFWqLa&D0;U``%y*;Xt17IC;>{oJ!xnUGOwzuTopEkKX39BTH_g`p(L}76F&-Kv94j=( zS6z!0|Facxc>HL(UXpYFks^bU_IvyjrI=z3gyt_vOX3m{S`;!CAgSDeVZLO&LhB=A zvnF3}x{4v2fL@N#SStv8Id~wOk}nY4w2-Vxq^9($3y|z?^s??N*I3=Y6Lib@m@gxD zPu^!EzpN=qlnmRURRm%5SZ0WLmD0x*yZNycRj&FCH(!FgYx#F;|1l2skgJX~5eFf+ zB)p_07ZlXVa$L%tw@mqwVk@E)6cPAJ8)aV#DPkpwJ3xo=AnSWSHh3>5ED9V+Sji)A z5LGWy5Q#lmbe0;H6mT$otUBT-OYBLC@i9C8Sr_rB;{+36)Z@JRL<5GxEM zr=vn@3U~3wWhEgW0fdP&uV}Fq?zC>45qTCHK*pa6-wc*P#EP0ZL{Y3Z9Fd%ROT8x( z-54TIy}v?>$1R0*^_M|}CkEhM(Ql+o@TF5O6GOooaT8fFcBE*~tEcTO#o8fGv`a_qA z&y$jpD$Em`reOsi-{|y01_FcDvM=`vaPaUq>yFbGcbv7D)`3c8Yp^36e3mW< z7tY*0O_%pY!;sAMPt|Adl}BtKQkzp z2B!FyjURglAw$7>b-t8dx_N_%BiuIJr1&?0*@vg)IwPoWOFFK2z)oYf=;&zM1GN9- z3(A0iCU5~H_b9(Azp7jFS^DY_fp&AhtNQ%vMB_hM8YhxtG)BS&7%s~L4QNdcvttyr zIt8n}WeKE)3X1(C4Qb>}X9<)Im&P!LfyGD@No*C3k>~fCA+JzavZVnM?+o!w-$Ig- z)Km&|Qa3O0X^X|th;xKI*MG9ZjV7c!V$s$Hk)JB%->Y$Zct{NVJb+Kw8#C-srhF~% zc-nCP5iQ6_hf`=m%ImrIkx3voF7T>o-qZ~Lr=t$RAi_BYEmRm88o4Y<+CYDs#9wi| zpw#uq_nv>xcX(R6>L`b2oKaGcmS>NUSdqD-5U-zM#zqr-sI%;sOdUG_9?h_9n1;Tg zprI`!QjONAXA&OwP3Zr50sfS@Q{YX~u_D6FK)&(lrVw#{%?#qY{N%T>^i}F(V)+EY6nQvWqF9$!B-_aME@(cbdaShvv!5>3ugjVPKy|;+k zt5w<9+TeWA*5ZI>K^U#Tn26r=(=_R#6t|82%J8wnJZMh^n)^O@YRRUR+&EJB?NMg9 z{Y6?rV-oIl@w{hxzYZCC-Z-gd2D)M{!)l9h*4W(oYicp}(YF17Q(j`pp6|3siL?*C zq1jp=lne-H6am&{U4C50;GvEe`1ESS@%M_meqv@UPdB$yeH2PvvHHFZ+~G1?a=C8V zi>z!LogJ@Diz&SD?du4WI{h*pbqn)GCIBCpIAgY50SiG&BBZP!n%C$(qW4<{-)9N|4rNonJd{w0H3HyD7QQg%xfdZ@9&XUL9_d8}wVo z+>D??Ji=ALUlW@Pnve}lQij9}AkvgfhADh{$-7Zs1R@xA!^2DVM77qhw3>r85s)h` zhK-b@nY~S9@Z-g+;FX|+f~zI==9uh!;ew=Cqe@bwV?;}}Z}$Bm%}Fe+Fb3H5qA~)vz)*uONls;P+z~WY!3uIoaePBfu&ad7 z*?7~I6Ou&8V9)HI;zPmhmDhsWc}2q3kUt9>y&x(HS#RR=`1&0`rJ^-*ZbhATnJ~{qiMvKamzb^_skyex`=dt>F+;)5+8I*wjAvb*1K78W~gfMJNx8xqQ>j z8%vA;XNye*%$h7kJ)}*g+x+Pq+yi2-jDgUqD)qYE>I~8U#tjkun76wl7;&lI-?t~C zb>j^)o@n%vmPtoD%)Ohg-6K*Gkp{ne?yiT6ZOvwjyi?;#Oa-MdmA2I7?qafAHbH(4 zb?lTu2dA-Fl6!l9+!xO+{~wypF)9)VrU+qPYk?V2XrHQBap+cqXlwrzWIow?p~ zuJ?XE^r_XVwOZ}=-v8e|j#BBfXdGs4sV+Bz`Fnz+BJYspK#i5|$?Bj|v<9Q*p81j3 zZN2kEmif?#VTw3Xy?k}@d>d(bABcn>S<$$~gHcNB@g?4#3`_UcvkcQL(hvX(boKzp z@0L=s+~t%CV&pCAC={kH%&VJBkeqR|NgfGGKUj@l>4UGtT-q-6><6|bSvuV!#9>2- zSO|*xz3DycKL(_J^K)%2I2oGLG5|C-J!Kk-s?v;;uaF&H{N+ZG$V^8$QEW2w=Vt` zji6sGy8J#PvcY$nX1F9OpdzgimKo_&9;b7YPfbll)c@@I!?zB9Wb&_K`L- z(2CpLv6;@PmaM@XxM2*S5NeB!W7p?MA>AGtUSg@@b4iPb z(tFJ0YFR36*27j{Lj#!My=ThmYC^EGNu0R{mAD66ml3yJ&Qad~cKT7g%|mNRf{I@G z5b7eU5R3SQaTSW^JB#4%(llQO+zq$Jh&NwDaMgO!sHm&Eyx|Gd$Wa~uTL?l{OVO$R zjq=RjZfr@t7!SYnrB8+xL6X&+{$>vW7-Ha}C$)JXjw~AtQ{1%gA+OhIIGK1&8a`gg zkPvw6jAcLDT>j9$1disH!uB%w)BBmwY0nq}h804!Oa=bW7O+~a@8 z#6U#&z$@I;Vy^G2B@hSz1m(P}8qWxQ@nc|MOy=;p{cT{-Zr$}D1l|_EUH~C@&%iV0 z!S|Q@f8K-bn}(==*~dutgFR~siHTVLc+rIZGSx`w;7R?cy<@6I_bRZZ0xWxdb>4ho+Dt|0NgC`oJH z1)7IlVkm-+c!o=`WVNzTE2{@tUUbI1Ui&j)FuY7rFb^nj?tbX?aM;;Ua$W&JXU{3a zDz~on+(wmL{Y3h>RQbAWV<3~&gwrh1a0N*!1GISg?>r)_iBcZ*j)B^Qwp_K^d^rY`V9z2ZCdX)B3Wt zozZ6VtuD5%@|NFO&c0ue`8_H&+pS67d3X_=Hyb7&&4BvtN6o#rTab;yeh08dDOfRT zd}PIpd~xbhSe~;`b!IX~9Wspd4iih%sz&@8jKZ?C^sIv;hN)&94>~8L97%Oij&?z? z-@I#g^VVXJtc$XE6cicfGSOn7qR@x-p+9>`&)iL1AMYk-at#L-_{wd8%RVW{EUmRx zSGZ;SSX44G4oFhep=w%5T*&c9=qDtV3Y|{3=G(yyX78(2v1EcK~Ab_34SehE92r^7L1Klf; zO*k+!xum27s(bDpT|}Zzr*v7P>bdHx!1>F6$xK-M}$$CpWELkAP4 zDd@-OBx>l}a7;1Zqqy2wUS1&qEetLU1KER2KWgpG-?~P5sh1nep#7#G_!#e&Yrn@= zh5i{ko`GdEuN8G%=KEZu|K<61M4L9SynIEi8<@&S6wqwa>TLGNwS7B1k&Byibr7d- zOPEdVq4wB0V!c8!_=_VPJ$@nba^48|B|>>_^X6a1@7kB!H&N@;8XH%C&#!oTmf4iB zr7Qy+%Pi1v<3M59GPl_f1(_w+M^|{wfW>fO+>mT&ph}PY06#rb8q8W-tNrcOOD67Z zx52N`F;jP@R?=Nipi~T-)07Z;;7>G_u#B1@6e;+2dBo*uwksa0c`#`fw5rd$;m@hd zQ{78BRZs>po9ok)TY&lMFI>5MpUUQA1Dt|QXhSl~`h!6kIu^vNu&jxq6&s14lnXj= ziXFjxVQb6V1GwF|d4G023gDBNMHa2dq;!D~4*@7~#_fckyU-l{CO@@Sx5%pfZajVn zwZjGxmspoJOG{-*(8;vdVv-RCth1V!;#Aha`E8k!@h4O;{YZjC<*6F;iwd!U=gh_dW0WR_O~mCw4-Uil|?)=h2~& z@AY)duBfIhZh&3N_)8|^gV3*LE*2~n$q0X8cmUA+%hjmK7;gl&5uh1OSMNGC_=JtfUIc2< zDwERCrO<1dpv1@te0Dw}Zn(J{OH03rD%Kfod4{PfYf?iIWKPyXa_Yt4f4eUChEt$DI|-53oqdyvYV5kMPd* zF~25$Btma?S+6ifdP?q>VCI%3zp%?B@xK^$ulnKtIR3`RJ$W7V!D}J>Z&gh4cNcGL z&Vc8CtetEhz#7^jBUB^?-H(674HlK-5G=jjaI#o~txgy2*dW`D!+VeAYRv&4QvIc2 z#gr9CZeg&sj1swJ`Qhm)Ns4?}jbFz$B|q`rFVw0U$RquOu|D0p}D)x>FNpIJnW*oo~d1L3%9}UP-iAit4R_@LPeF=J=+-JWB^bG`lIrR4yC^r)Va?Y&5Ewj$pC z5m%Q80COXtfzYA}HdNYw9Sjl6ACrkGATA}LCEvg=d(X`Ja<~2vn0dDvu3n$N*7v-c zTk*cDKGN3i-08KPP*70LthZEFU-4I056F@^_`4~+{AAB}-%@HTxcSoWSEnM={r5Z)j6_!C3LLr%yj@%IIse!-%wx?D+G3Ew?xFLdHQr z-U6Ih0ycp;(QIZi@@CtysorLNLV8{KSO-44HK$~@7w6Tmt$UnMm_ms?lqd4u+yzQN zcrvjZ9*ODqsb{@evqFy4)Q2{g`rEYL0v$XxT452W9wBMEabXKc0W9)lBjkj{^weal zfN3+!bpY-e173qab|S5%(JJQSy2*F1WQ(XFnS$9>{}}QD3YHpSn)d<_Y@B|&!E#Y# zFTsg=8a8^fH%@F;rG4V?=gjspmf+#7IkDwOYzgCa$}v!7l%+sR8CGJ5unc8HMzQXV zQu5g1#jtvG1IW2)-Yg(H{3m0_TQOnpdo9!&eyq}Hyf}1_@5)hF_m(p+qg|HjOd2C^ zX6vQ(Hzn$IUQgwoFn6*pBYq+sh*T7ONg)dXJdWF?q6-aTDanO;%3P5*4G?+vo_X%r z3CfhBH8uK7O-T=V8dvt;iZOf^Hj|tzi^iu^1fM=GDv4 zZx4ioLsZ%Jpyt^QkoTWLUe^TXlImYyLNghT7l59z(x>?NV0O^pS@eo|VF)~hYOL=a&?5=kpVPFmv(i{P`dih*6i?gRkplhMg*RX%NK; zR1JZ{!s>_jy_cG@XO102j}W{63D zc|39nCsj~?c&`bRsPprUFuK98>9>Z;G2Pcj|HcGc7r+@ul3;t|c=?j?#J3>>LK5

    1*_oEHqbp^@R}(l8TxNXlJlMwG z>21xi^C1h%s=dG?*xoMSKI)>>+CX&9V7AU}Z%+gFHT}T!>A{EI2#O?rA8_ypR)M7f=0fQAR*mDt zt$}1)>vRrl%!xE6N$V*f&)FTYX5Mj}X??>V=gvP(5{BPj)3z-m9-@Eg284~Vnor~Z zn@qgC`2NA_|2c+$1nUDJi?gu1o1li{Y12tD4r^K*OLy>Jnr)@`(*>w9nm!SH;`vvU z9e{}0U2a6DE)LH7d?+Jon}A{o7lt=N zegkdlwGIpnq9nkz2tQd=Lre8-Zn*Gp9yao_B{R^B#^FfJ5Ur$UXJ}S2X%2#gond#7 zi6rd{ED%RWp!oy5hCFu#o=f!G>3c<7PRS3lDJb$4RfRh4KfvDI%YQzv(pqVGsYFYg z;PY;*k1;WlrpU$5MtU<;uz1gpU@&WGMY|;ycGlQ>YiO*9l(jM%B8^J6KKJ(+8t=abT@utY(=g3ixndnGxLw4YVtl$jH=IX-) z=;tV(SqhTKr8YYs+j0H&CCAH5%;K_bS?4#kb<;KT%!HAMmw^D0L*}J>O3*}*Y^@YA zk@r)FM5$*Umt}V9AFXs`hG)ID6X$3ZPW$pAVwFcE5R8s^=@^`IE@ACz^5M%`@N&aq zEjF1>N14pwOfH~+0N()XYICNrv)djW-ncf1Y@9tqH$^4QC5;%K#g+A+oDz@4iI|Kk zti+p*nR3^?^xaRyR5RG)`K1UEoDAuaDxFJm%O5h||D@bN4^PuL@!~O$ksEfxD^$=A5Lh2`XHmoEvs#R)@I|H;O1jeUCoAK#Wjq`5NSY1j5Lh z0oV9pW>r#XSw`p(9b!U9x?hc>A+ZHoC%{6_>_$v64$ zTEX&J1Qpmq)>a0xlmo?5@l9s2*QyEmEu|E>cTZc-*mIHsRQ@2v_G~z~^7bjE)HM;r z4k2N#1X}Xapm|-iT=apdOJ(|rXXuxp<18p3)^&%`%eYJjDn+cTDdO3$F=*6$Cg2jI z5}A;(D(|~gNH>EEcGe`p%m_i(Uw-BedmeB=fuxfT<#5ts_YI@=wRc2(63I;CTlE6g z^CLq+f=VOsu(S2o);RF5VcqUG-sTVpbew&I zcRst^ggT8PmFk~J@i`X{Lq@zVgML&`0}Jic;*!_<3!pIf%zAt3<`W7rkB6^+3u*8v zBH3gAj9dfw;1_ql^Y+K^@;720AJ@N6y~eW&*wWKda*gb4XKKa4^=wYwmT@(nw>Z+v z-pmWB=y;0LDSnm&CkdgPzib}YFye7uYu;6IY&KC(4`GRW?AF2j(n*gqeFS_xVYV7; z2CCPkph0_YGL;Iym+j{#vi^H^v9;|H-ks@5Q)DJi_s|mfW}b(B{5$Q?afZy{M_1M! zum+N0>DYsyQ7LTJxd4|bX+YcvP-ioeOr!b}i0EF?^J0h)3j`KMX6t48R7Tx#!!QB~ zW^5B6?!F61ZazFYNg6Y0-;bngza7T=H-vhwdjr*09(Q9@71h;$S*U!0lc+neM3$GA z@BWkUoLAKy106m%_F0`z9zc$xv#YD)`|Zd*umJ@(Eb1EQ?CP!of;`+o&{v->Nyr6~~)q zw%3lN)@;mO>PA=4mlczy*()oxaXR;O``A8)vZ#jUZ1oiIYH2J?0){!)lW6d_HVSPs zlTVHvS67wsIT|BtY~?o}7PXtp-X`o+$H*<@sbJOBBQ7oISHNl-*bvQV$E0iX)jh}; zWUz4vW^spMgb_hV&8~?j9q{e5bNh75TO(3)5SlH;QA4VHEH%CbU}8cCpkqWHXR)`BzK|Pz-v{$R|BoAdh(oP7}#w_GxrK3a64rP z#Z>=Q=2Tlmf{&<@?#yfqQ*3Bl#>(!F!<)!bj2=De-p+u~?A#iU92l;WY$jk6e1_LN zY!hX|93KORh29B^7JwQU>rajbLlR(QYk<3Dp7({S)Q!RD8}>k;W_dYhCWTKjx)6w8 z;uX4!8!j!it6WJw%xK;W)hsJddCp{O1-wyXmWM-O@vLNjzbVl@6pjrG$F^V(wKcSg z;lyt)L&jwW@4q=Y=!_pT={7Nm3uvl`YR|#w7xIG-ayjGPsjDj)a^a!jO1ldWi4J{5 zM#Ozrp2=6bq+7%Wr=D` z3?5f9S9jNDy}ar!?0`cLbjCEHpRYcR*ns?gYnm&1dtD# za72FZw_u5^x9)bCEw&r@Kn3fj_x;q{T%4B#=|MvYPhYCpPxTMPlbOoH^jq=GrymIV zUb{KDM})eXBPU2i;|^$%Pg3KXcZvE-Uo9^KLcBCV{+8xbl*{j$>#ahwU0a$j>-vvX zaMN(v1gk;t=FcWcdr9({Zl6_KgOH&YujYdRaSU7aeZ_+~(P+$Mbb! zJh#=9zd8yG;#jF}N@T59c<{OWX4F~Tgpf~~lSI7lt9bCew7_~h8saTXW^55_*xjFV zjY0_;lgjj^9A2eKe!ci$iTw4!ZBaZ48&!#CpB-Vco*<7zNT(*RBxSlBcANvfsOe8_kPn0#Vf3M$+Zx|G7s zrXcw#d6OTVyGYU}0l81dv6;SiP$0p!Stu_r_^e%lFlbRqQ;CvkwFc_83@{^SPdKWg z!o<*82dSwB=;(=5Hjeu^HpFvF;>NlRttZNi-X78kh6%1Zox!AxuZVYS7UwAg%w)3* zM-Wn>21caJ-~t#ZrH~aNcJ;IJ)Dbq~;7a-6vFzVrLoKuT87z`;q4MNu=1XUWEJ9QW zFH?orZ>Ai`U<)+^3*<#Ki2YS?3pl8SYBy7ShXMwP zSiZ~}UwIPN3ErprUJte0hapwr9(6D_01#F@qKOuA5i{{wbm&dd8TDAFxv=5;Ti@ zNz<(2i{EzV4W?7_ZrWI?D2?+|bT5yW8ON{Y8rAUmOc6(-t)BF{^U(lkgiD zv4ymaYNB)3CxUF>;2rf$?@Du?_B)Ca3x%BCk$SW3&bRWX)J``6PgTclb6@1z_j38x zWtvZO1-yA=IiC4_HX&%VF}!Ddmxa#cfLD}Z^WJqpxSE#J+=>?WSunExbM($7-vz&w zl|XEI)00)Qytd9~2W|Jr3sw%%o)_GPX504OjV4H}KJsCF1QDZGCLf#sa=n#p==dFS zM)Yw&@36;itkLl_ywVR^kB2dEtlYMfg~N)I#B6&x`#5#V*rJzvQHQI}mUvAzn@|Lf zmx~=#@7pFXp-0+r_)v|EYOSojha?et?To$OJCiT7KI;Vk>Q}a6SVS-cun*f5mW{Ut>khz`OQ2B`#8ZIwd?csf*&Xh%LaBkZ!JA!vD|?rvT3ZpHn~gXvqEh*CUXU{ zWEnexfetbtg{K49GJR`*+V<)I_DwuT$*R<}w4^CAk7}*X#-s5hAIr)*o7x`OupvN! zVS6o~ft8wqf&x)praiYD?NJ&J7Z;bRipsqC%hnE((SK#;69W6s;GMqocrt7h!!O9K zMKMupykDvOH*E}W*?Ka~%j~T!bDP`KH(lN`Bhez6l++=6ywI|!&io?MShMXaWG&<) z%+%2m)Uc~+h&3YVkcvzmStT2l(k36qg$d9d9v!P7c%rz6Jd6*O%R={MzHW?Jnb5_n909VG=&P@c!5Yz8e28UqbRzr<8wFAM7an$L1WD)0 z(Ua|V?GmXbnbD<3d2~?P^lXO0oQ|%j2W#lYVxJI^dw8f^oem8aHHSRDXkjxG$62T% zqh+DiLgTNXHOMB;TD_QW^x)bo)X0fC1I5TecgEB!$3l5IeMh|8+)mdEbL*T29Txv~zOgHe^|rGkiZI zq{zGFr_Db@2b%hnl@RfiwHQ+wNSubx0q@UNsxiBmvKR7{^~T_KX?dWGd*y9>y<`go z&nCnc5&D#tU^8;Rn-Vsk{rZT^6Y}O~n)(CB`%wcWRG#_FM*aQh6@107G%4>>pf2vc z7VlQU2gJVbyDiW3c8LU2Z>o`G%taERU(Ef$^|5j$M>zxSrkDBzQtxj!zod!Y+<{;R zOe7(~lUOe!?~6)K1p$^pQ8%pXC3wbghAe-9$MY?C6cOW@=2J4+ zd4=5rHPd6a+czsKUDqBi@Cjg9naAw8iNQ?meweEr5Pmn`&yQzS6nr5E^0dKr169fJ z1&h*jV}c=c9m4;rn7J-2LGXWAC5oy1%VhkcYhTUzyAe-jam7IqdB?LD4>P-6>3jn^ zpNk}7_G^D%ff^i7W_)|Ua_c<+O2`oY85h6B3BFR#0BvP?0Kk&cWl?@tS2pl5;2{I( zMQRO7gyr~e5fp@tEkoDf_3$_%uf4{`{u^4#lQ;mMT$(@Bi?Krsb>ash_%}AHNJd(b zwzh*-w|LCJd#7Mg0nUIRR+-J)5=IX_}(U#!ZFI7wR0ARAtZggzR?7ms6?It&{% zIDna)l`67XuJDX~4jWsAnH{&Jwt}z*-GOG7Iyi03s}61G;`blZY4aq@BU|=F* z{w#yazKMTFjLdw^k(wxGJwR3hm6f91`n5j_K>`hvlmM$Da$pi;1mQc#9U6cMiX^`7 z5OFENWL4u+mzwJ|^OS*e>MQxJ1NJUOKcZ38yfngzUm}D zg|g5&&l54GbRvi&_V;(8UkOiUcl$%@ka*nTODv18c@g48t=KYWCI5TE#W#ztX9wz|x z3YG}D{|+F_a1{#_>_-N=xNU6S&%i2lJ3HG0IN-8JU~c92fnO|6pGGYH@Vh=EL4D+L ze!e}pnu4v_z4a4_!T=|e{Z7km6yt}Bb1#~FB_+0+{3*dHQkI3|?conAPIsSDw*lDj zqd&4>>>O$`)5c83y-5nt4)ZWRC0v&Turwc$F``IoJ2lr)KrFE1zQdc*7KzxTC~5!rDC&n#p>w(r7KI$QP-7we6@q| zn6(n~`zlUZ`PWUA_6O$$F8{VW-PG_Dqp{?*PkEQi?+Ko=w-qVz4&le?k0?0z!w7I3 z$)>|gcG(@k*m!pN?hMlK%QTl04c+6$XI|amgW9Y21s;!Fp1z`27^%=TF}Vcd{!Sp6 z!Z>-7G$x}C^fUP6Ox@qAiNBP_qy%XS4 zSwTYs3mAae2U?l_W(eAC^Z)vN$qBS9iWBdCoo1GfP3QP-S^znuz^QaZa(yN)@}G!R z`&UN@P{82?T);HB-x{SdXmd)919!{7xuqBN^FudJIn55vbC<;VI+ERB4Mb-~xRa2C zMA$3+dxMJeiU}l2v?I7JpOvK>LE`$wOV`!kz)QaHIJ}9wPS;d{4p;_qQa+`pn4dm8 zvCEk`+HG^2xg1NIrpURD_?)&obLN@LJ;}v`_t=Qo(03s$#3W#!zDszTFi|)5D!MjR zwnG@1j`Xm_!mEh!<|hmCfjr+uU`fwKJ+-Bj^y*lc0;2&IGs75sJj!a+kv~A!GiS$5 z%{B0Bb*IRiuO&(0H>jcjmr9QSu;(QlXxtFV0_HI+NK1B?@q!;6gBw~XmzU^pNfE2; z;or2KL*H%SouP$L#!%xggkw{|nFf<`&N4 z7iHaF<$+=Obx1i7i;f(pVY1w1&RL_WD5}AibSytIK65GMX3864nCwoV8&FEnQdm)o zX^0aoa4nX@XS3*f8OcwzoTC3RDO+fI|D*7S|9pYEyUU}+3dCMM7>I;ALXqb^X0=p! zV$lh+>G^ZBrM8}@wM+Zs5tl>j)gWvL%5kop;f_4T^XqgCdCR^A#1TET_=gDt0#AQF zbz)GK<7&MpU&kJEC>UO<%`hV5YFEYMIf=@rXk@@SGGr*TiBO;vT)>%ox<|ojJI?_l z(8&9de^uh5Ve5A(Uy;&J_+!jaBPRlfOVjg$bYM$Uwiaa&mp2&j6AM8;#{JqAHG`Yg zDmIdR!ouQodw;Lk*3bh{dy`!L+NRLx>X2~Wc6!nw7!>oj_Js@$xA!r&ujAB-C!II{ zROd!+k*^B~*>YIqrF;jELJrY@b#%?~QBe_jYq+x5Y>>t3N7fb1HC&YE2)hSncK zsf?wioNTX=$N)1C``d(pcEI8-zTdreb=}VIgjbM}O(u-FrQP}GzLalx8XaSyHQR0z z624s)b^WXn?D)XuYyExtu13F> zX}G%Lbe^qJV!z!O8;b|`*AR65H>2jVDFY>D)5IZxC?g%WsoakcJ#P+ir>OnGgAd=A z!v8dA++SU!S5?M4B6LaC3PIb~AEd3lB7Z6muA6NK#{yC}9LUK#cbqMGJE(jJf^xe&*fkegz;nyFFpaN{#umf(&g3MFl?2ZpeeiBm(SL; zR4CDy8gTZ*<6~u)^LGx2ArFmTHFe$7f~K$VZ`Zi8tLSY?o91@Tj0ey^M-KDTLu`!p&Q@Co+* zmE)wJ?iXJGWL5=I(T{QYMSl-(|weZEv7g#^=0In`{A4 zmNAVf{!97#^zFq<^=GTWYH?8J(ma%qcKQs}w9VnLHgCssA+>l&A^>qH&TqSqDh}ax z>>!ZH>cQ(nJ}28*B)%fawm8_YcCsGWr<~+1Weq1guxqz=P(wV%5Go3!9sYY0yKf5# z4h-Dk$2K1)&(i*NnkB~JkUi9&=W+ua)E>!bbKQCS&Zr)#k~$r}1{^4(IbNn>d^WOK z$M(lVF5jOkw{N#w2?*!H3oA4mY)mtW^mh78(+(fp4|HB?_z684bL)J5rx5ut#Z{6( zRx}^SJq_RR>-V?NaoRd~d`z+9rE0L6sa@aNSZk=st&V9=EKKI$?7laVZoZB%#^w+W zw(gehxHRmJ8YrSJ5`XUe0qHKZwzBdht(S!7c$ud7n3x-vg|EEezjJ!amD-En?WDVF zzu8~_iiK)>KVNfO0T7Bnxlpg=zl;fx(|*c!3DifM^#wuz)tRb#dJ4qIyL>w@3N!D( z)p4;t-*3e#;M3N^)wSQ(TkcnxV&3$IUGJ9p3lL^qIrFBfz!L)efVlDd6DI)p8OwLo zjJCi@Rw+68Gi|3O2*s?=T)&~jClxKp-33YImo38 zpoyRBo#zp0PS=O1)vr}*3TM}niDH;W&;34KuoKhKlMNHAUZ<|2qNC~=0{3)6(=gGv zT{#=S$ZV8qU&2*U>UiEB zsk7bIvz@WX?6NwxY|^(GYn!pKzT97(3wiwEV5qJ!rJ!vc!&S+Dlp4Bjt!8$*nrJ|p zByH>U(Q59eyRu4eD@J<=JDvltzAk!2n>Y?Q*oeSRTlpmk+J>Rwn9lyL(&CSR10`v} zS%q#oFwT87NoF6^FCNIC>$DXabDF~9+BztZ;&@TA>8Aqu{WoEHsG<%pqwY*ieN8E4 z=*WI>b-v=DRlxmKD~h%0$rPy(5>4DlxjbdW(8gNBseISEs}iA^EtI^UzFSL<`4QCl z`Y8AGpCxatA~r-r@B`EMmWkFolZBw@9F~mzThZ|3V^(tP{h_y>8S4o_14&)Bq+xi& zt7Mj9SLgbdEzeG?jR@OKX{#klHF{}7;^=_yS!>uHuO5M5_W$h9K#yg}=B5tt#iaeZ z=S`|aMaOZBLSRBJi!)|_-v}r}?}(c(d5dW%LAm;TFYum4KH$s4-eUWxVX)nN*vI_# zi`N|Wk-(C%!;j%xnHReouTj0n3PgC-`kPxFT1mW3SC8z=>khRTu2ZWe z8_f&HGrPh=bo}(4N&}^Mv@I{~`x6NF#|o8Noz-b|Ai1VG_n7#}(~}3! zK{E1=_UiP!>6u`JQtnCC`__h;azZLY6M`nAr&^o3n1H9a%+Xc|5Dkm40A zB>4R?c>76fpwR8Pj$bxK(^UKJ&ZT8zz>uudVk*MnGZ+fKslm;^fpqUu2Hc)1qJ>y)~d!rGjaTb-S@w`)fbTHsiBU7drFSiQGfz9V@8F+L({^`AfP+k%F$lyae`}# zVID4J@X6YG+1mmUR4%$PCFBuNx}piC3A!w$Tw-|oQ}@f!jii)V8>i^w;A($joK-7n zF_PWaC^>BS0zfou`p^9rJipC~ya~ydF#dk1~1oHd}40%~0V^MKHLwzCI~s3yeiA`5q-ZI?o-u zaRt|en%%9VnH5qvDDX15+sXVXt>MFiL(FS5nSLJ-WM00)&geDt`VKAMJsF=MAydLO zfyie*J(i`{bZO`mDsWWFR?$o`9Zmx^GykZ^uCr%lYrJ9N78Y~#uK+2gms9p}# z5~|yn%8-~`zL!>3gfzwIKxlhX8=ykUBq>#jLn22a4J&+5H8Bg#3i@E((yoOChAqO{ z4{Id5mX%Kd4&?N%L(GVV1|@@yCsc2#jocIcCAPo@FH*Ld5CI3X*uzuTsH-&_36fPh zgJ-=oD49n$P%`_e7D{?(_N4!}ur&d!KJa3t?qpfp?vhQuq9<1ZC=C2pqCNsS1Q9VA zHpUjNudZA#i+ED^0)=Y+a&?#1tW>`Zn{y?ti-)!pkPPcPecHmsJbHVC_UUe>O+tfwyZitBamw%%T;0O%U8EB7V6v5gKXqK&F(Q)$t>i|~3cM8hNy2xwGxHly+@l7erbbkvSc5PgCc^I$cqe6xNP7fu+OjOn?e&~)_T3m<%dUP z>xV|za1O;MX#n(%lOn-Lr!B?~?iFN*a~-V?Ja-x2y-r*=7L+96V2GykSHuI3f50*% zmHOt=-K+W6R$uHZX6SeTLgW)h%X)!w2Re0- z;XEZV28E2up>R!sm$ze~Rw8mFd1mqt@|Hq4@iaiVxpX?a=gxe$^UhZgG;MH1Y9=kQ zq%c4FAP0g_%qaUCIdVx!SVEqto+XVn-nRL`c}#LNqqvlCbxno=c^MJS!8v(^Gn=h# zjas__9IyjmV3+Y2%?Dlu3`n3la-;%+37SdsrQ7xFf$@IbzT)vJ70Y{b-7L4*1r=k@ zK={n%ljUyK$3n909B$K9Y@B4K#hMzyi4;g!d!4#5y6|?Ijln2z>R3pl47E;-@97f6 zD##g{sYwIriiAIe?$S~GB5EQ-wtMf#>N>9NTJkj*AB?J#=q_B5Qy_bp=*gw3bVJEG&eGQCm`N2F*i?yLLH!P z9emOo2n+UT}nu|!UVJkI4WhD_fElHpYswu?%wt*t9+YPK#|-=f@HuQXHFQth8FB0IZ% zeaDWM1+Tf-2iIonPm0UpqASWY8l9%(7i)RYl(d)KdvzWYomL(Ws&&5cQDd{&&I~kU zi}Xbw00iC-4F=i@o=dJPcy29NvMNH^asvVm7t|E1cNHO&dar{3fGfG3F= zLVlmUUTpvU-RytSCvQ@iN*+qAiDW#iKIe_4S2 zm=I+59GGqWj`i|$d_#2kip6`yY{1(~9{?!FuF(~-EjaX?c*Hj zTML)|oe1;7T0!zt$vOw$_(BfMIAl5R`5K|>{?QR>^YGtO5wGoEIgHfxfrF%_wepmf z3Y3E=tYR#%vQqHqzg*|c_Jr93Pq@2K>_G6)@%ra(c#nPQr8vu+Vh!I__{>_1;#2WS=aB}?>FkADnZ_<4P1d7i;K5`=Kt zvW|n1Kr0aX9sc&yyPwTWnHc)Zc2eCc5^xdxO&hK&RxON+bVWPS%3S9~suXc-2YEy3 z5_n2MA#b?U_1G5*L${;%!^P?XM?a7GDc+i%VZLAWN1M|z+GP#BO?AmCdq;P3WJ2u% zUelGw>CZw*H?*Zde8Zc?ygafx_V(wklOFw?pDV16V|3TYUA=}-Lm?2+0#3{Eg~ia~ z6R$!Z*FpB*G*$dvb)9Y5sAqG-(#Cf=nuFp`1DRQI2V3cT8%x-UP!NlZ9SRw8e4s}H zkRc+!DPxNt9zU}d%4N#gvMJbt>G^<(SP4Z~VM&pUvdB3CZr67-ph*zT}1$3@_W+I-kXnrQwd!Oe~E|p(rD|)-B8S=_riNWhln>m=FIE$w7eLo<& z2Obh#yTNTa|r8D>601p~gJN0gDn|WZc z5Y=kZh$$qI%ofdZv?&42pt~KrChsj#)o~%`1mB;xIgs7(E8&AcH;QU1I&Ibl^o6u= za;x?3Oa^7o87e5PFPB>$k7TTkv{c(=j}q+i3Sr=B3?9xFRvT$T4lF|vY7A}*B`swr zpozKZlV#^D7jRfv^2myeuWWwV@g6>{e0lr|Qi30u~}>InI(y){Bn47i0X_6ZUZ;L8J~J2 znI^kOrA8CuDiE!3x;`h9<%$ysQW^n_N!*qFvFRDw z$amzWR8lK$h;*5nE>3&lBxO*cSmrX68t)Y!kB?tjVdUvI_Pl6qa(F^}T^wKDzgK08 ztrrjoM2+O9ToWL3#&6Qxp@i(LO~Os@M=F)oOwi*2UW!smns%fEkQ2pHQp2dkM`rGS zQ_W$`l2b9H6dP)KQXP*}=n*917~iy3yjl+0Y&N15N*mC@ON7*aAOA{4pssPdzO&Z~8p&*Ztbd$HHfiVH#jx@($)2v7 z5k<`Pi9z>eBn{sendg3ZvR+>41Fplq({M0r*I!OCHC;}9#3p_siN#qsE=5hB{ODd4 zyd|zNSES^&zV>2vm?{iI4Z5oTl8m402WkEI-DZsZ78)l%4ssoU?gZTQ!*ar*#WsANGat<__cAAG?k@z*xmN8QS zR2KXOK{9Mp&?F)GvLe2JhGpTJ+a?m`t{9itaGObEjI1fgocX?sm6q%ET#ko6HrOSS zDamL{1o~&8lpa`+2et#K!EI`2oCMD0f*62e-eUg6^lwua7h~*v@I+hzrAq!Sxj_{i zsuEbtp2uqNhA0UTNUj)5dW#ktPQO`cW%Hkd;SZ|*A5CW&)n?bVTS}p5ahKu_E$;5_ zUfkW?p}0$M2(AT+ySr;~D_-2)&fWLRp}uz9=&p%6w>x!-WM^evI9lIq{FjwhyXgLCVj`s{V%f zXW(-tteBGk5v=cU?{kDGXMe67%o4jZwkG5ZVje7sR?7#89cLTblF!)57 zpye8438HKZ`Wagd_dnG(%e5a@HvU^T+wbh4-@;Ly;$1KZP8_`w5Pcyb9Wrhu3w~eY zPT0TBXIQPCT(-<;&*kySLN%h;T+OeQr5^ZQ1y#z0dM1J}P1eF`7@)mG zON=?9OC1x9tSCjk6ARLB#pSI@6$Pu2!2L}A^!y65+T^x>U=n9M%F2jIE{%|W9g;+o zp)3T9*u8D?iWr9tZPkfaqJG!5E7jJ!Jo$e6*+V)(_P#hVtys!V9+bar6vU-e&S6WL zEX`sxPF-PuLIO2z++&j}!)m5Kpp z&4a`t0vA}LZV&rgoQ=1=OoTLL88hT`I(Wh9ezw7M^!w&snWmY#$39tR27{;Opjo9qzh@KRNb!yL9tN>ebK zUH72q16D+pQSaAlj%8&!rvB=dhM&o8+L<``uvcNd(vbuqy<_Te!!~&6g@sU+u=r*Q z1m1SU(qPjcJNeAZOwRI1wgX&$gLGsK&&DJ6J&pIL@KMiCddJ}AFyS9Yw4@7)6k;V6 z$dbirkq-~SnyxVG=ratUs|b*8*GIQUjgzMm-yH0|>(5OhRlOG&+BBepr&G@_+&j4} zxc)@RkP44ba@|KekNFMaxRj)6Kj4>eFrmX~jFlceb1~1n@e^#Bg5%Rd`+*c$u%HIV zpLw=C<(kgbY_XE#gq$3Krp@R$xIRX_qvPY}sbM1Z;h^{RUpR;U2#v$ zc%F2;a^zLbbO-va>*{YY}34S2BHGaZYD3KsPDRwSc`K!U%X!QM{PeFp}b@H zoX|P1H9OMlG{+~?J-1~M!9x8I>IA?LUqFrj7ovIRsPS%i7c3)%fp1eGhsIGI>8veE zQ-66s$#!qoRm;BXvOaY>I_)T=Dnv!Mq7DkE?-3G|s0fFiu8EGk(iX??mB5vNCRBxT z6vTkS6h$e#MDbu4(~}o4Pi@!`xEtwcY2jd!&PsRR=gmQOST@aWSloEd>HxpK zfX$nn(#UK_O$;`ce_?uJfM>}s4(GmLLE`t|MDj+bay$x(!~Wi4AN&D+DnILQd)}#9dnWtImb0=tL+!Q`K?nUoCbX)||rt*u^}$qN&q$EYfbb|FlkKl(d>ZhrhyH7nv5 zq80n?7-12^PQR;&#+TKLq4={0E2xwe7U83%go95`{WpPSg9ngUB8=kJ@F1 zTT*WhFAsw{W*WW{GEv-;kXoG;w(=sm_YxCGF<$TihVL6p5`7XUPt}bcTBv&n;ZIPq zL81uQwjW<&9kjrX=g%e9~AS%~AWzJ7wFp$G*9_mN~2n2y(t z0r4}zW~3D!hki%6XTwJU*13+i=NsErhzp*k=l9kprF-)suo>i@?giawN*KY%{umT( zSe>z4GQPo;RP{RZh7g7LYO?zMWWH0w&oSPvvQ<0rBeLy>gm?tK6MIa3B;{7t)i(I7 ztgP$-AnKxU(SqO;lw}_z2^w|xJFVkZ7_1Y*RcR7VX0$4|E9hG2)JJ%%5tML)L|ZNP z^4e&!Q8Lj2C0P=!24lK{h<@@XCA?2FM^;z2^PDNaB|=ZOsy6&uDocK~!uPZXk(!8F zG~P*tvr@u}RkEo&{@E$_fL{5qQ`V91G{9OScM9}o@ISE?OWk%Z>M#uqqa=po;&r9e zqxiISWo|})uHz-x8&Z?&N8mrPcA}&3ti(y?w-ov0xT8In@}=j>*#uq-twV};%Cv>B zXb>J~XT`?q7V@~EZLIWfUv&{#`@gAWuT+2B^4gJ35ePdxtM9nq>P$E|aqc=p(6?sR z-ohxDht5C=WV+n&UW3R03F+X4R}+HRLu~4419qS{1}&a^Q-h)Xc!Sq<c zy9EJIphRGbFG-fN1-O!H-U`J>GE_y5{y7OA8roz=2&kzT+uva2;BCp&xQkZ$!v44r z62)n+#aCBORv)+9d{)B_j9P#{HoC93rCdxFWLi|hvw++lURU_5TFnv4UP!bL(%8oZ zZpqO)sN(Up=DUWvp5Jmz1boNSF{y~?6@S^sP372))V;FBZP^Vpy{ih@j@|I^I(-Lw zSB*Iyauj6wY;DQe`tC;X<~;PmZnm~2-nSdq#vNo%ot89hO2C%>V&n8`nON-76wNBoHl~iUd1xNyz6+#<0xyjLb3Xac zqXh{y20Y>oa{R8(dwl zx1ZCr(XkSP<9Cw&h_;EeZi+nz3RGv#{jC_%u`CEIwNxUkG@;L-Jl$nvJ30KT$(S)^ zzfte2VXtND86tVWB!P}t4D5ZEq&6jkGgfHLKvNWp-z+y5#IhM9NO0A@t^|6TCXZ)v zM9qZD=`#xnS>`+bD8{`V$-3iNtXgkz5t$+;8yT7D00=T@#^J$&Tu3z@7o_X4qKZ{R z4*mk*^POg)WhHWg?caM*EK%6(oyyhi(z7F&4eFxw84cAEg-iU^ZEb_g8-9hW0;Gi? zkIIG$O+O662&LKxRI7tz7H&|Utw^BN7^#t#MPGlMSPdPW(nQSf2GLSvt+#{&`YwK! zqwLF{_G@noHs?6d9}K5{So*}|O148`&w)nT7VzNh{L65hdf_s9$09g%kiucmk80as5)zvNXQa;KSt`u*44fG3FMZ=Gsi;582E#QU zW)HkMUIJJBE}QVHTlz%GvBW)8`*?s1>YyJ)jz&n3w<% zecP>HB?#H(pNxUn*9!oX*fke;#{EYds-cg<0L1RyH(&5h$++Zo75fN@_#$Hy2#_nza~eC$8{;mbQd|ELOgM^)Waao@ z$h{nkMLq2PLf*~f`HYqGee4XoOYVLc7h;{~HWl1l;INsV8f=ABKjzRxnlnS-9y?*H zKlaCa4*l?lZshYDp9KHUks{=G{NPMG8RLwLxpzr95>xJ0UjFB}Jsk(V;B4D3`t4@X z_dYJ+RBwvNP#bf$-n?f|o($Iq^0Ex~;+%9vma99LKQpa0>kWcL`HcK5@wA2Eyf1T{ zIBsrkF8&t8)!MCd0~916N%ebver9cL{NLb}6jgSxEfHr;SupU0pBIdVL@|n}8LfnQj3DQz^J&93GS?2w5%&n!1UQ*Hmp2NrUSX}%ns)?qnSlAd{>v^qx z_Na??%87%3?JzSl#`y#)YI^!uZmD{j-n0iDCs~oTv*8UX-Xe5g?8pBYLgbta8Jx0j zHfsG-3JG~`eLV^#s5tafZzEqa2o+EN(Snajew{G8pKi3w(#F8V0cXgu+6IA#fK*+t z$HHHL@AadqhK7osZb+9c%!rObzt>%@XO{OJ4Und)o*2QlYv|qYLOTCzG&E=H@s+^) zk_pfgO=};OI9X?bH@0qKFow#Nac+LADu4NmKJOZQ0H<6-@MsfzBN(Y#F6iotsZNj7 z0$I#j8l#?gtvf3p>t)HDHdWVF&_VxAEWH7pbf6yp^9}z4r!ahPXiu+VH0l&Z!jy9s zBKCwATdewTqNeD9k}k}G1;KhNy@y9 zk{szB8Zk9phGki->FCd&mFAZO<($zY0(&B|LB-41)>ADnYfW0}dX(<thvqJq@%b zWkIZna+^s5sp|L13iqs06^^$I4T6#U6x^)o-@RbM)kAy&K^!bhsw!gEc;g>#7f<8> zIs_WVa(IW-HSmXG0dDUDoy>jxl~8w(ih6l#oqA_sotf}wA;g1-okp zBiIzhzJl0ohAF&VZfK&bpqC|x^IQss{m~!TXV^h}ZT=HvDU}}QcT>O%7)oA_G`jHg z8-HQ%;R`KXTH=q+vO`((a9n_QGPq8|@$B^H2Zqj<7(3Vbti4)p`qejDOYZ^-$BFcE z6ul~}@b@M)yg1!0*Yy`jNDL2GV@a0p-IQPNk=;C|1UxkiZ@+(SoT?F?)0dD@Xw>wo z9Z+oAZu}*e11e#A`D0AO|MZK=uJdSm_T~)@5%G!lMl%+h$nwvw^V9P3z8t9r#E})n z^?n+lYuj$d)VT>1f`^u~$l1}Z9X47td;WUbtJjBJ(4dxjfP!(*Lmqf%cua3Tc96NFf>} z2#ZYCT$fPBtf~BI;QAbkJ&yHTs%1o)?(p8%)8*#JVcWQSIR8VR@kRC|r>hf!rO#lQ zXZ58uv0~t<17`ASe z-Vt0#--*?#+@zz2(Q#}N%-bc^6ocl9w%zxT7E=&Qt%z?&yu6>U%_7Ro851ksCaZ(D zO`-_8YL?BJy3mk&?CAFnYo; zOtDy@!4{mv8h1>1SSZv6S7J$q`g!a5+v3)YT`~mi!xOLUMTs!2ZBHS%oCRwAA90GpFZ02O0e8OPVrAgX2c1DD@aBBu zW$B~6_6^@_%FeH9BA@!Qy^|!4=;(3@Rk_aE?cM#T(b=f?zi)?XW2|x)J|AF5Y{+Q%4XLvYU1VoJp|LGcm zFRVJ}1NpPom z{g=h@DgD2^pg3^!GF3|5ZH+(W{5x;%>H^REOLxrU-uZ(~;pI1b`tE|Jy|U6I0`JCG zb1B?PmvGC$8CTaA!RMDF4lQ|Z{{ERU+esdt-b(kv$A$T1n3w2DyBtYPgN&r}I1_0m zZgxlCVBsJO6QfL3?YLj5Xtbj;hiep|YHWXWWq^Fxd6oRj;rX;lfy8+G_LI73{Fe(y z=blzk(w>Gzy|F3(H)p%fM>Bcu!@@4HrvGgvq^U^)n82(EC?F`tke{AA(|A$cGWp6- z0xgZ;hb-nI+yur_UZ<21v7xU;RL6H- zAXXgK>95DOf1AlmyZ--KfNyX~_|kK)K0IJ)5=sb(6U z87#GhOExCb&(VExTg}&eM_sxnb4Mc1V~mZ;1oxjscK zzFhW0N4E>zXKq;dhG{dy6$Mx-din*mp63Iy{7P@Lb3bEGPKgpvj!Y-cVE#6ocAJNG z!|cX=vybuC9^gy+Z4aA28V2(TF3je{Avkm)(ByYn4$9348wX$ zs~{&o#hEChlqCdLI5`=C62N>Ivys9*aLU0@9|E0FPGXD}V)1#eF(=GIOmlr%6#FGn zLDZhKihaYx`Ccz8nY%RTFWE}`IfsXau3!5?_SAeT8{rP04I~Q**JM_Zm4|{2W6cv{ zEOXMT0R&?O#RVv+x^J)&-%^V)vt4;9ff3W0cKOyTSTmC}B;V*<_wdKv4L+qs@Fqt2nkjbq1|n0W-nT|fkIy_`NljFEoIed-vQ(4RNcn1A zd*QdN-AD}=j1VBiKJJnbX;@p+#l(aSe!~eB5)t{Bs_)0;zV3>h$zi|09rbO$FiC#f znCN+_kSpl?`L=r)Bz{#!6Ln`Ku9ik8pAOe8Cc(y(=Hy{BHVr!Myu1sc{tV2({2?FP zvj>kfU^4(}_-1=uA_1;&mrF4HvO3>(NV&!%8!0W?bOw^V&K5#7j5KY^ip za0O@KX;RH%O#QMflW_lILR_%E8gb6z z%Vh$=qVG?uNW(YJbG)qjlPj4WpMwlIr-Re;Y)t|4lo4x%_jz75IEt6JK0_)~unYXrhZkStZr#m2AB$Oy3BP>&_)*8_a^U4(Hj3zN ziwMbm@&5|I2Wq@mdCgH2bfJe@SJ=U3e>jtx2`58?Rrb(XbZLlg>O`Tw&_CmI3Tw`n z8XKLC2iKXCYd02|uYVWcAJ{B^-p;7YjPsE>^%yKJxoVAxLNfH4xVWUvbPCOuLDiZ4 zM*UT7;cW|1;)lF9W`t-bose0qu;l=2nGubMj9yEhk%^Z8`{~oCVQwVwaXy>JGmT9l zNV7QN7lxl>_H2fZ-F8fqB_4Ir$GR1Vw2Y%aA*Y(8S~rq#gKPDlgBfPRFSQ{TZ|!R7 zPTd<9f;C{tR~A2zsQ83`b7D0K4F7F1D6XIU&0YT(ecN$!rCf-W=i zwj4Y`Yg$^m(yB_5)REYqCMX8DpYkj~yPA+w_i(H1RR@6!OT`K0aUmSw>guA-PfQ%= z62ZD!@|}%Yp1ytK_UA+L2M{A?X%m+zWtA37QYE!{4%Ff?H_Kae3%o6%gHKo{lY_S+ zHzj;n$r?MZ-Z%C#bE`Q;Ji58&wR_~w|R~;xOw=% zQEbJ=2&|0SED4Lf8P@DhYLnl8LD*5%zvL-6vGHOc7^p2iuBQkQos!)tb^cZzf(xOC zkL4-KX*6}%@*F~okVE03E&1zd#Gph1cPc?|7dLQczuj$|ivd2k1X43jV+>6Y7r>zC z<+KQLjX@7&qy1**dChKszPx3B^;f8)66-EXJLmmvZr&mf&wFa3R$D^j<&mL>vN?0- z$4qmlqkFw9b+Ni{b{o>SOlstZIJ<^A=`uCZ%$t$a}d<~9G1Zx$?VBcfE*wQ z)RhPCeX9V{ouhEESJlY#Syj>P(g;Vc`t+r8VCw)@iGNX+3cx^B*_6N9eU}4pp8s&2 zWmQ%C(LmBVYn=}0G5jkIjwgL1#DPxaOhq`W@3))y0Uv@J2J2-r@XS%hFb#53J3b6h zqA@`Eu|_Am_@y1;_~0;nIhHNb7AHJdv>&TU_BE8skAw?IyPtlC@A4S7O|a<8fqOdzD~K%{Sp_6J@9EM z%YQ3vKgSu1<&KO8sZLnsF{TZa((sh|x-Ncm`8~|8u09_!I>zO?Cmq}N;89`qLzZ-8 zFs!lKU_n@WD*F+y_~Gr`|80p+p#3?5X2*V+q(Tyk4o%4W3wS5Leh?|7y4Nt{VDbZT zs%+xQa_EPwCYz11{Ydl4$CI#5_Mgtj3#rVnEuk$E9dL${S0lV4$frgp4HFnTIUx$a3?VL0G~bagXD(`v3?AlZ7}ZeT>Z|c=n!St zKEW0{6iZvYaLI6{#l4*lT^q+M9c}f2gQE;c5q(@nKJBt@@}=t^Q;a6ndI3smBQN`2 zZc9NuZ@S~975P&tyxvng72XwDC*3G@wn@n>=DA|=tXRS*s69+@-BKn>p7y-(&r?On zgs`7b)bX6%Dm(|jo3AT(6`q~EVK;$!9!6Kvu!1an879uTpD(XgaFE~ryp0XIo#m^C zGGVbZ@q&n%5(PtL$Ju_Vl(O&jBE(e+!biWd@d^{$pzmSeSZ_|;g^8E)n0;xuHjlmc z-K&u>SltJGL=~=fup{JnS;f>GaH6VYT}M7O8M8hehZBPv8`%ugFOOz)fVjSR&1*1o zaEPCrgbNw{^N0A+2mJK(BvlvEk3>o5!D|A(DO*l0}l8!ZA8eqr#}XMtcYwy*@849`8G9u9 zit_T;E5=B=tG<5M>j6eYCwGqni?ues%R4F@vXzpNYQt25zHaY(w+;KtvLd5vUgjA- zLM+zHCOJ94{=*E7=DM+tOy}w>ApZG^WAI_PB-Hb8X7Gm^M+$Ir=>GwUj^-MOK<7|_ zVZR7!$2LA*)t0uGK7g3aNYR3$6i)|@1xCAuUz zW0v$K(XURY*SK%Kw_Xac!rCf%s^k@}qUeg8ltBgNlex?q1{19f{i-O0y3-lt{N9_$ zCBX)5rqF)GbKT!kP~k`<&Fc#5mPhcz|7>-C^RhV+1I`SYV@gUYa-3L2!J*dJ|w%Z0oF7-DKyC7G7G?irIulF^ro(lb|OFeD~OEh#8(X863yP zgXW}m+f^aJ{#l~;tv6sHxo3emHT=alQcjb zm~eSHSu$IH4ktb2L$dT+;9>!oU9CL#s-;W3AHpjVW$0vZDVXcD8rBL+H$uTD)uF&nNu+8prYY3!B!AUrbYRw^ zW#-y0piy2i)|=y{pX(lL@fekerWk4~tRKXm{8Lzm)7e`CIlKQW5CwAeR4F<&aYc?kQQs}*X&+ZG>~CkQob$H5$~~8uy?1VaFr2@f zYuD3;Yt{Be@=WL0|M1Lz4160w)Q|ne3SC{&VZAP?L$~vFgWTMgaoqCUZ%1i%IcvYl zyO#GMlY5fKIw(M^V_|F8`56~a{r7_GE8)vk^4`nI9jp60|Cslt))gc}UT|MvpZMs_ z-Q86I(JO4gmDvv&qBL;)hri#6em79I`7(>}yYc=VR637KIJ))xTh5d?LcaNW=Ke3S zhpd4u^Y0Qun)(C8W|~emad57dwh1Wiu+^gbSJ_}`B|s|W!ZbBY9rg4+GFxD16j7Js zKfa;(G)L$+m|$k=p;Z27!28qS(r=ak4F?MgEAsY|?D%t)7@<1W2+P0%3^2-W2(h}) zN*o<<3MptH4Jn?zjg`922!u8AY@qyMBLQ%l4Qb!8C;kM z=V3tq(o81GX8TT0QDS#o2@}>%{o{3MBfXyYBc@4@VHqJ6J^A{|PN2pMZ6IYa28lkZ zQU*>?fk~RS;r0h--<;jCUv)>xi%L+7@efIZ7>U}5`y&n)@fPWUR{hr>optpC&&f#h z1Z|6{6B)QA?`uYZlSPk1uBn`1h`BHjub=!lu*~oh?mmQQ~yTZGoLa zWL7*Ts8Q=#XHyuZPQ;~HCA#wk{uYg!5JsfWu{U=%oHRIB?Xlj~rH(dTIQllf=?(>t zVEy1~4zXfI_-lf=rPzXFb)`{I0t&2U5XhoPkZ`HsBkXLn6ZGI0%{Z%biUmGFIZkn? zKvu*n-P60D?+3}qD{7Zv-^BJINv|Oeq9^FrMy9|5xhC!Ip5puQuTr)~N#9+Hyv-v^<(B`#QR$#cSmSrcs zkDX*ckl7OMh9wrRJpJ`|!q4j@cU58In%n-@X?VGwDk&-oSy|Dp>bTPeme4;!HAK^f z7hTi38@~Sg)8gUT*}kp4H-6Xi`uX3ZBktgZcW(O9ILG6nvE_xF{qnklm~Z;??4z!6 zO&=V9iHGS_YKMVe3o2O5THd#1ytS6`CL6{;^TM5AzQ3rc(%YDj>n?F1y52wPtup5m z^QzwM+25sYf8YJ>h$PP0pAXBa%$#C56Pf%uBpB#EH{Y48zEfOl$b!q$8*}YK3oXy^ zHC#5F{ZkYr9qtYjq{ia-M$OLXlX(0xw^)dBv>ny-C?8)+Mjr>=(R6&aplGf`eo9cK z-!IHd`n_}byT!Ww{@S*Yn4`19P%0kNE7InC#x*AE2+ z1r<6ii5mL8$&r!pRW18?y<3d>PqV2Gx~cy(m%9lPMi^ZhFfcG&kGn})U4DF94j$6p zVd&t48j}$;u-8$U<&YU5ey-5#$cXdziJV%jcOVD@SO}5W`aTIyPhMYqE_(Xb_quR^ zr$R(VX7PV}xikgHm*4(8DnFS+iTmQib9E zwQ@BKX*SXdI;MDFS$oHtkdaC3~AT{t4J(MHVx7SOW$&ByI znpzsqpxlc!Wc%}@c0efs((_GXQ#H?7eT%A0IGYq2y;~5ZL9Q3z-$#o;cJYK>X#_YM z$6rV_9Hb7M>aBWoEa#FLs_o{jxMiby2*nk_nDBLl<)Pt0rp&T=`G|C1idILM7*o1y zMY1|g*h8%^F7_EXpF7MJxpDl1yBXyW=R_qV*jS@c;iZ3!T9s4(tm=2yWw%{owOeYl z@S{V>%!Ku}>@Aiu9i}X##~KIAJWe9@f`xO_pjnBBKcX6F8IS#!m2io+U4Dmf)_kUgTbKbKoq=d44~g&oo>`lO+tfPC&b z<<0s2at#;Or{n*6`;Qz8V|%UWa6q@tTkmMF;woZkuKg{oY6i~efd~1VRA2S12!WsI zao{+Mu_SS{bfCOZ>Fu%8_5^oQ-g4)ga3N$yYDdglE&w_DXKaXPjC@jsj=P~VZ%Z%sw3ASB?p8Lg^MK$N$ z?Gfi91%0K#7cR;XP(J!eYb=X}j@nqy4t=WW(U69~lQS)OvxP5O-C=gdttxhdU}NZF}oo)?i!m2 zLE|&pEbQ!V(|3cwV=s$NqpF|Y&pIYH)(J>X0?sCJ-Y>tM#Ys`Ww(KT4ChptE_&zrZ zEd0`+A_Q1=!-eC%_v=HUpYc6_gmPJV24&1e*Z;Vg0NVSRJji0B-80L1lIuOBgBI9e zy_E=BD#&67*uwVMShDOtle6F=lHe>gM9m28)V{>`jv>_3;SBGRk@RWeaLD;+Z0!-k zYau5C9c_%;G244Zs)#CICj>P*(B);M4qOqgru{*Qsk0Jgr!bmXK9QD^A#+=~vIa7Nh3B4G3V z4SJijw@5?pB4hGSyhriOzV+Var_V5ud9$xy4sZ7kp3bVHNT3ao<_lWH z7{dzp!lOlwql{L^cgA#!(S)GaR)_Qx6aT(w4`59<`0!C#6iXop6fRlg(hC|uqZG8R zSB9mzQ~w(C6By@#hLe>h6Lu5aZvH@0PnP_LD6AD%Ez(|%%|Wl8S8;&TPVgu=Xe4)% zXP{)EY_ahUG7gu{#8}38mM^bC+|((0`v(dzssH=aENhvKO(8Fun2eM%E$AY>fXz@} zMORUBabSe2xoRx@Zst{Yi7gp~kA=D^P`~|!FYidnlj>r!#@1>Egh1j`k1I~h&?AI! zhg_4P3@?;~OIi+nts3ugWX=W;y^D&0g5jGPB|!|GHk-Q!t73*DDXLh!&n2sAqYyVa zIVlBZnlm&p3D$qv#tw6X2n+wb4kK@hH_`fX*Rb*9?7g=tBA2R&ZOVpdKmD{XtkQo+ z)A5qPi`_T%Z6X!o?JQ;^j^me;y{1zT=BIEq*vZF>ysmM+J)#Yd@pAw`=|_tYO=B|tWNK>K{(5SkBRcw@ z*iIx*(O@7FGYK{h5WG&WtVrA2e_L&`HwTV`fU3mZsDd}{_IME(p_23UMoRH{g@dY;$8kz@j&p$rpogado`})Fa9o8WI2m6X+!s7gIv~v(kY1yfv#0 zK3wn14GTO!JpsEO0RIp6z0)$A%#za8C9FDD26(0bAx}a@1zm#3mlcKD9T+A9#3Xx# zOgQ-X#(;~@q)zJ})D8gUK@6MKxwyChPwoNen?C&GsIZt%k~iiYzfVu294}NB{D<&0 zSnY|E1m4|hqb>dS#^_W%uLxDzfy*JH_svk3{}rmAjs~;6!io&CwE%jce~cD1dt)=4 zIMw1}eqGpLz4kNV===i zEF`9*;QF9cL`fL3kfGZefMD_-O%(f!?X~Y&P7rAp2HnEWR!kd9S-KDe`$4`_(A<2H zlZmXzq_in6VJo4#eStNd%bk5j(}kHvMRgQsDQPEyK%my)?xc*6TK;TD+o=!{z0bsk zQ{k>2TGT0c+fbQl(In`c8;+oG6z$f z@%s{avWTX2hEGoEg3Tf{ZLrYd9|&g&?=%W+%QD^WRfXH-nxbscMa?;I75JLtR!*Qt zhFqmk`7oe*8n27^z0+t}ee*rDHYKPT~39}j*)t(e(oO%<$Y z%Bs{>adic4&v&;K+X%iovI)H4cbwF2amh?f$&#Sf8+70wkhDs(B5&x-&Be?PAz+iV zswapmSP&!IDEkWjuud8o`PneT;ycW9gi%C-X}+%ju~BYmJ_+MHn~fr#F6?MJJGUo4 z*Kav_x=#JoeoHr2#!H4`ekF&GU3jqkecav7@$qxz=0P$Ne`Ijec!z|4>wA!%#ZPr3 z{5(XEN}NazPwTH@FKwVm!ARqmgbp<~Xf>oC>b@iF@^>(JcF;KAHu2_Q8D~uJ1&_J- z*;D`d|FZx!{W3UC@MX>J9o6FjAC%xvn}xR3m9$(qNur8mlcDBKj|B0txSDcRot%h* zK`3wb@t_@S`b6LN`3?``(j0drW8G^Sa`#62EC07=|0&=4Rwb}Qv%uiQ`=jl@`-*ok zCw<}g*?Qa1JJ|Iq5OlJ{2Wwt2iiZz=%y z(U%@sY}N}7b8;MxM`b0D7jO4nImvVywchu3K=SsVx9#zt5Bl*S2f159;7KVoEX)$9 z?tqt#1nPd%|6N}V@AjYdV{lOX?qpd+Mh0Pu@18*aaa5!Eq;|{$kQr$KFFai~6yL5n z@E`UP(1OG(_#UYM6^`!T;{EsRJz!Lv=Z2F%Wl%Vae=^UmIMKsl&aOIZ@+_x= zR}|~atcmJ_1*OrFn>ua)M+Rnu5@<28vT-Qke)~wnNM=~Su*>os;*9-# zaM)XD8LU1Vo1CnGEJgq}!CbW}ZpfX`u)A0xPD2rFgsOSI3C3WGo;BN1v&RZbk% zO2lxI^IUGx-0fgWpL0bncn}pKrCm@5 zU2jTylFJIWno*zgl@o{@6gGS<*J~$!(+n z8f^<*B-06>@_j$}@M7b*Nb(cjrS$lMSN-v}+kL?CCvwRI*J(&`pSY)%3Hr`mlQp); z%3t;-i?O!td(F!goVL)2@Z$NaGqVyFQet*kNY{Fb8 za-G$3`af;s*vYe;M>DG5bPI^=F$nPh;~QZZQq2G)+wmjQ9Ba!_`Af^XMe;*b9B^*TO!@xKBm3LqRu}?l}4gmO&*;4=3MNii+sKzz_1ATTqkS$Mo`Cdl(RJMBWF492#l|@Aq8y z8;937iC2Zd#2J(&97SGv05NgU&30s4ZEY0s->(S6$n3e)#I+b&wMW7jN>Hf6Vbkcs zK_qa6O(pltw;SG*=W*WVU{7gb$h^Ok2V!ZSc6?3a<9s>SuRi?1(aq#?d%!d3U+kdb zdsFPct`e}FN}<>4r76kk#njO0A$q%jfsp4pW&Ps!VAy$`eGV*($A52G06QioW;~rG z4B=~Yz~#=6GvKPZ{`U(2?(Dy`b9i{T6-ih1r*YM8Cm3B`(0T%}B*@vd9u~K6)gQMK zxGfoGxh`lyWB~+1Aoj}W9}`8LAO7ApJ&O8+&lEmEh>2NG+ER|I#?o}zqI|c~!MmPM zeKyZEv2+WHRGheaq8yRqdyVGz>TwHla=^!H%z9J#dR~Fi&|Q5<0WXO|Nl9s$XNkVS za>brpB*udS3n`2ujE0%0Ofn-pi+|BCSCoK8`%y{Mo=Ug1>#0z0c}Xx8RLUniY5`?C zF#+s~jVLHAimD+$*cWyfXz22FkSEc|_6>XYaxT;3dV8G52!cK!uT>QUeZ`&r2qW+G z42z+;6wDS}2Tw1cJ5qC<{KX;fIoXZ}19yxy(>BCfn`hYwSwS zs0Gb0z6bNs3S!qCaYff93qH$t-$fo=bLIJ^&$VW%Opa>4-TMUV)_3imj0dA4p1xi@zp=i{r2x(o~O&3toi*@8tvo zA9}(i22BY6A5GU7Rq6Y+Crp}b+cnvCC)>7dTQk*UPPT1hvTHIY|FT{0(|@h^!}-u! zt<^cF=ic|;*S;{aL6=@hm01s8gF3XOE-fj&o0uW?IohwXyNI zw-s?VA*VTfS@!#MwgYC8;54?V;FGq^H2I1XGKoSlCAcU*f(Nwr30U23>sSY2bI9V@ zPo`9;IruN&XRAj$@IPFVl@20gE>r(5%_olF6TmH*MNG+N4W=AHV+i?VJ(Waw*y&hvF=4ZA- z&Vy7-NhGNN?5WdmQI_~{Q+1t`o44SUO3y6`22sc8E(0L%PE-&`2Mx~CX9Lyd6Jq&1 zK|qG%XBTqe|IqPz{TZ4JOhI4x%Esr4WNxya)?fR3fDdG&?{mif8JqUn_^BxT1Z;sx z?4U@rAO$lQBV|7+t!%S z4*UEV6+}3SMXOdE6wEh9xDH27N}4Lie@1T#slEjsz~0G@)a17+zjHMEzi+!B_Cn29 zRhlT(lrE$U@#FP)y>Kgi>$XLH6?6G4P|U!@f7;$1%F#o&V@$fx8>`~0wMWeTt}<8} zK26Z>8sVGOn#$-Obs+uvayswJnrwo!2Pxk7_W$hq6M4x-|8{-Yxak-b6ei7y+}M*mPsi+fZ*mVY z<%lkw)rhR3%{-cS3Ojs+OX?qkYb7&5M9xXON@3gLHQOB<^i&2L%3(NL6WDt&p0}U1 zW@W{#I5~;_}BasWF zYFFeMslVP()ImVu-M{ni03PY&nEW3*;}}YVhbTUwNq}?RWY2}2tI^`+c-51OU|IK) zMtFtJwHwWN@i5x*eha(;BRmN0W8k*4_ zz{^s?hTl+o=Ve2jCyO#m9%&g!XC=pmpIccmIMX`%Wt>6TOvG=!#zB?kiVBVI_=PIR z7f7i5ZSeM=Mxip1pCYNG`u=@U(~#SSkyLthbu~#gF95?pM8|)d-j9v7Xtm;&d9pXpM!@u;ULzxdujm;Q#U><4B%(mwWUJ!K7Y0q#OJ`6m6>|pEJ_U=u-wg>iHS*!J zCZ>DQj+@2QR0-OMx`AZF+$#xEFsY5d;xVlvy44MPHVE z?y?yfF_?_x%%Q0szM&i+ghPcZ$D!0b| zL`T)JZaN0yP$`BrJ=!XwOLyUVZfWm!&`(=ruh!318U21M= zDb|uH5-uoDSGFi#Bv(h-w0#vhW(_ucAPG`56tE^(eQ{LbC&GQv69Y5PVoo_g@|PYk zn0~6vyngtRtuM|+UR$YPzMTi$xH6|G%I5u{uul(}m=j_L2T}RBS&3J#2v>pV3WOAsg=lCvjJSN$FAPJZL268_Uj`DlbK!sT5yAO z3oN$RO3amcjrv1LhI_34mV>D=5=kWaVP|_C;C$N4cSgB*cyOM5MS2Q1I=y^7SY2LU zm$k64c<%(>gLmqAD(MgEd>EY*q&L)W&2IJ8ZBb{dd2&BAe<9z@iA*$v^LKO_+8DWJB!9+@o z(^ORLRz>LVXiRtgd19q>JZ(8(xrx)_dz*(owmQy*lk%OQrX+Gk)@iXdKYtuhHy=Lf zrl_g>?Q%FUy>nU_>V`DXZ0FtH?l`AaDHQnQKU!&<@<w3`CAUs4(#M4vf`q*8lz^(?we-*8O%h=()MMfp1^W&vS?X3o`L_$z(58{iAa|ohCU*>0pAh&gN&ue3 z8hHfJ9WB4~d4H}QNNwwi{>y+`RZvC6P5Pn%mxQiw7Ihhk&6u#kinOSGNTIC#(7@`o zvhd|;p_g;IrOD~=KrTrKlT-G0^wTD;z~v}h(sjALZdfUiwp3N}HEsTDC{;a&FurxD zh0@PCeV#-G)ScB_$W`VpYnFlv|Wm4sY_<~fRJ*kytvsJTw>jH{8_DXqciHtJp*?DZ+T2AJ_$XpIpT5D)BF!E z&hpJrTiCRTwv{WbTtvMUr%)IKB-LL>*vLRC<{PP|MrSFC7f_?eOj{L7 z1C>-6POdimR16*=tNFzCaX*~n!oRwV1_5w{D{UCP@#$DC#LObcSCpG1!@h%Py&7~lNC+?Hjrf% z6(%qDXPplb30b<#A+8F@K$_e6w29PeH zrG*24o2EcZESt_kku#ArAdaOs2$;pr~8ClqO+C<|lA z>~j+u-Y|R)INyYcew-_Zm_LE3n*}x}VDHL?Xh{-)sPJlWmcdF(@q{Zo;ngq;SK@5t z?u}cPRnOGMqs!1N9ZtY<3!78q?hyFueZLNys(kpZ2e};Ld;NFH-SaeV(|C7gTw=_% z$FuTYRxcX@B96p>3tqgvrx-z3?S+KEWM^+mBVjZfo?2ydSdrFHn4YowmRF)+@r8!0 z52p3X*HGajKX}{FSqi2mLv-993CGGi>!B}I9Uaaea%Yn~alKIYRsK2{&gNj*;{APfFB?KFE zP1jj?FMw8!&bKi?>6c{}⋙A3cD|IlZ_|7?<&Sp6i(LQe)qPp4xzTGcslh4_5&3T zp%^*IN(z>e1^sryQf`_GM3u1D6)KBnly0eEVksy4jfba0RN-yW`L=iN^kK@R(1 zCena}VimU-Rl>$~kt7eDfFv>X@Z}CCnWLn!iTK9+m-VZxmh;-_e+l}+`cr1d1zvdSf1_2I1 zd=AHQ#8p8qE#~%J1(J!1PJ#`Q!T5`upI8Xg;dJ$G&(vmWLBKuKm&6LPQ_kX0Jo)Ug zl?TS@njQl^*dn7EJoIlF_)OJFXy>}YBwu%F`zNwBr+k(OMg;{PHT>^}?)7XIq7$uG z?x&`Y?0BzCh_*{YOR{C0o}cV|Z#uEJy2$0V%1qCoA};j*j!rJ6I$a||t$rRd{-69J zV=yFK$AyWlFXtUrI)}B!M!|2>IMf_^AG$mSU%BsOj28Jb&Hu#dhA!g!I+VkW(rqz=;ukUV;Uj%FHIhW;$3zMOl4&% z*tG+j5=H5&t_#0kwjAT9D-CV;t2Q@wnfyK+z%cRDBO@)%1&sb+rInR?pIGIv;5(2n zk>GW6a0QTMBR4lUU*CbXtqc>_EA=Um7shqj3vm-LoxyJN1qU4-DxKHEJ{yE9=>HnX zRvv{$RqwbXV&8SA4j9oR0^Zl-fYOEvD2&(RNGTo&*_1`5=j&|{6F;crf2XAyW_cZ? zS86qcH%tp;8ZwQ1O8TXxrLVKu3?BQjS^>=W@vbI7jxurQyyL=rFcM`V<8Muj4zLmi z>NEj>bW#GHn+#)D(#^CW(dC{t_eUoFPz>Hfyvd*c6++R|3Dx2+#h0Y@bOQhE$8`5g zzFO7qAlGFm4OUv47G@cG!2}WWQAjUg!iLzgR|>&Y<*}##NrF1l(`rA_DWf6!NqhXU z$x-#CdRGw*k@e})sY(PjMcFV+?&u{FVOSw80d?uY4ptjeg6Rkc)+R2zP%$tGWU<^> zv8ks`LsCs-Sew_x@vIf{eh48|O`2=yokvqOhBFS;OZ}L=#BH$+4kt>J4_BN)B4(g& z>*uvH8Cs9P_h#>saxz<3p?+52n{NEo}el+*zBS@{WbN&#>w1 z{%mK}azp3hty=i=#Ag~!M+w*xY+{XVLEX0D^tJjHR!#)wxJIL=?eXv{g-xx;{5Gk^9GUOTe z**J5xj@VnhOY7q@VbL-s1xbzlu|CVC$Io~0gI-H<`1e;(K)jamPqbk)oJratED2xK z-1aEg&qBL-HH`7Gkm9a1>ysCuRcrh4aJz;fin(ZkcP3nY1NrujROW{JlCG|pSi8)- z#`!~LH|MGuJJ@v!9VT_(K$vqbk+r{YYjLvtSBet)p4jGAAFRtr)gK5wZ@YB2x1Qv7 zGB%tgzgcs54-F=wsPMrtv1f@@di;s!!k-QJ#nY7`qqD}VJ`?$X(6BUsR#00AF9a+G zZ5At6j@{j{IJ4@p^rSLB%aG2t-|f_*J#7I5U4nl{W6*pLQ^MPS9GB1+K1Mhxtu%R|ji22Lza=J7iLYp$>Y;15VpfB`UV7|Cmf1ewzG( z-*=d7Nwt6tgA60&_$3g(S4t+5lq{{@LV@Lt2s;|v|qz()9h%%QZcEq$fI0`NYg#xc8`mXU-989$F>WOZJ% z{!-<7@lbQMcTe;9tGJc&NAP%Ow4xLB5LhP==jf}7p@_r(s`0<8=mY}SztliP_zg|c z0F4any3fwBfrEB~)lOr$J6S$@GqP!z0ZA^q_9=OW6{n%~B=#Bw^>-LZV%)sjSCvds zm;b5@WIv3r7;~CXHyEh&eMq|qc^uP5%(fv5iAE#$w#=O3w<1pwaW4l_TyT7X-iwrI# zeWI8-Cj>8)RuBBp-Jx%?*H&6$+2+G5SW!a^BfY0|Q=0+eIi65B3$@S7|8oIeqLL6e zdj=P&vdt29z4|>9u(o&$k;5IVGeb^TB}8SlgvCT!!BJyHq2z?5|ILYkw@(XN6c-}N ztumE@EaJIYbz?3l67MQp@D)gl^m>J)MsZc*OKA&g>>+2r-zB-;=R;slz59sL2Pcl! z`kkn2XJpi|;?RbT>a&EZX~|n{XwC_TR0g>(Rbu5=CDtM@m=R25<*Wv?lE&4sn0moN z(lg$TGIgcdhd!Of(_mci#mu!~!w9SkcFW-oL|`R=p?7`QzIZlpBc&yx?R zYP$OT#y5?$%_zQgUt^Sul1v{hs#z`xb0ZcuL{=(T@9)X3{)}Ae)|KM+&yU+Bw#Cwg zPHyV5avx&#b=Ui7Hzh&8AK^a6+gfE<=CBi)r9+n@K@Op-X(TkxayX08MA)4c6jnV zX6?w|E?wZiYMF%cmB`V^BgL%q@F4>}-?%ob4iA24nZia1Dl}|0HPtOIlpyA}tkX#y z9j@oXkK77g=2k0JHL)kd6@G|j3r-8K9U^-RU4xWm;?ciIWBrZrWQ;ki7Koo4LO_m5 z!1UI6Gqt;*qF@Fvt;tbg^}Uaa)>+5DxB`QJjZTZbCHK>U$=2RToxW|wc{(p(37n4y8((9mAbPv|}h4UZcTn_td3d)E3! zv`1r>ZjpqBPnxgBRGKDMIeYIoJ#G%gX+(tkeuso~KAYnfZC4#i5JTFopE^FKW~O^+ z#z~>czF*5`44J1w`zzInKF#e5o_gNj`#g8IM#yWSi2If=o0vf~H8lZ5cZ_w%0fbw& z*4Jqb?Y1Mvzk`zANRoB97iuuex6Xj`2R_fi(Sp5o1ZD8%-pzr+Hh|9@BdL1$Pa&{NW{H!jsydb%t%R%Y`bR*3$5VLXlARr&Z-%<2 z$lS)PFh}|z4BjpM$>ZVT^T9BlX~ciWR$$eHa}9~O1DK*@b#laoujS}v?zTc1^ZZs>RNt;q={diJ?_Y5T$`><- z5i@*sLV&?)Jn>4|+om=ans9oqFibi@VVS$7bqT#CmsJkt_!5JPio?Y9_{zv~yR(|g=LZ%$8)fHu=W z-=Et%6vfP@H-FWMW<{z=Ho|I#=4$~yR@Q$c$#UD^)t6!t-C4gReIK34_O~wD0yf)j z-&5(RRraa^;gko$XNJnc{!Y)&g4K05y zv-xRh=nAXCYQu-+eNC3W6&#^mOKccLF7zGEjyn>9!GRU-E!4ItztQLV`T&({o9S(a z#%(KDFO@lkQBhhSELId$)|Z4T3ZH<8knn&2UBzxSOk#o~MipDCb-(4HyK#B$4Ng`* zT1sD5&t;$Z0-D5nIJVSpd8@Q^bN#tdh~~Yxsj?y8PWU?dRtMrMSKzs8R14~&BwA>( z!V?WsA>@HvkjIH&=ixAXuE)R|F^%ASvp)eTavLqFgr5BOpS#qL98nh+R>tl}QXriQ z;01+$rto%LbZ2h8-?u=dxahT{?AVvMKEz2GjpsI#j|_qLq_$rpQ%xMT%)jqf=s;`Y zZ`|(jEN*$COUjmQC%X}JEVye}aWqrlXw>nd5`y{UIATu{S=JMY^0Y_HuCOM7bb3aO zCM;dPkTks3Xsz;gUZmE!QL0e+ZZ8H$ha;d>@{xCQK2G`l^?i(!}a)%qXP z5%{iLf7JL|Elp{dB#uKn{30hzBu~g#rCEDADW`v#gmK)h+Q8@M9Q@ckRGSHST85Xz z|F|-909JBde+d6N>jIVP)1(v#3;rFxujTLLh-UF#oDd}$p61~Oi}ni+r7A^K*1rLE zlJ#TuPeqGYGFy;PAT*(8Ai&<@U+MhcnI!#jxpS~Dqbw>!SIESaT)gV8gn29dR99hU zto^h$v+UmwMC^58EJ{2tT1ChfbvI-lsAjlb*cbC=l4x%YE`%T&>qzpVQ4Jm2cz8Oj z7(6{YsieQ{7eqFTM<4u=+tO=2Dk`5!!K6g#1@~U6+`ap*vr<}bo8o;@RlLq?W-+qN z%OSgk0eEQFe=YbIj;xxLtfZ|Jivu^exFE8|BqbYbQh=XYSutW>FM8l}P-_g+kk1}Y z#vcm>2#xo!hT?3`^Xb?f_w+zg zT&f~kb{XIKZPGAmV7}6c$TTGHn6MsMO4AjxfpCKpvVMoK3{zk*Nl6Q*pBU3Db^I-Y z?Y}e?w8um~@_qSMt{-lqB@2N9=ZV1(Qc!^q6}Rc$2({n(T38WAg~~qxAKq5w9!=He z9I@g!Mf8V?Jv4y9g+?A+p*>WgaBokQOg9J*&QN-VXeVZ0?ZNU)ZE`QNBN*ntem^UX zJl5uxoLmn-Ju?-451w=cJ=dz&Kx@`oQ8e@Efj{@rp%B>tld-QFb8XW3jlEh;F|!or z#@AsHRh!qhV>col_(t?Pm z%@;VnK+_;!G4O&4Kx=m3q*!gf_+n2_07-{Cs)t70q`u z!TR}n>fy9q?oHOvA00pvj8=xImV@&29f2zJf`?cA)h@7xTK`;eOq&lDyU~$Rt{GTR ztmgbtvF029JK`W4zJZ#=X&yJwKU+NkWEcWuiMhEY}YQc`tZ}X87Vt`82)5R*h#+OER3WJz1@$)$0 z$*^?Dj!kfLf%qtI)`(bFO?^Vf{aN{*=6m#Jb8fvKPl+-12Y9W39(fDmo|=X%bbE^T zqOhjs7nZ(f(D@m|1Hs>ZeX8(uH}}xd;qYq=*6J!NeY1vxD|CmAwbWm|h)^M)GBJQJ zV4=WK1>Aj)dnk|+0gEw@@G~$20wM*@+Q2`dO@V6oD)e^H|QxV z?`+2`(2)phlZO@Sov*SsLyCntu`VMH{9IrBusiuD>gEUzb$t-xy%>-HfHB?K($tz`Sf4t~MVZNzWFua9Jj# zi08aMBGsmt8QJWwxN2eoiR*$;HXBp&-N*ks0ca8p*TB{-xy+t26Q4 z>WF?*?I7Jam|LF}&tF1}jO(UT!626t#KKVI?fHPuW#Bzpz!et!w|ZF}5lvjUVj!1v z^5^B^W<400(8(B^Fl1j+pukn&pzRX3P5b8JF7rtyKjO{A3GhZp$E5&)j&1}wjS#Nz zB^P_H1F?RA<^|f!_bQTXVeR@eHE6!WA1U~cm9SbhS_PkMF@Hr_@FM*h*Y_n9LZ2mp zaa7szpPSl9N+lW-f(sK#f$i|i)X38i2)17)WDZws#+WG-IkXULRicx`O9Lyhf*!>rSk6umhs*$WHL1;KwtFa_m)dF-0jO%+Iyy5>CybF3(_a# zO<+8uRj<*PW5X?KY)k?K53jB?W>`!M#4N~uXxPLCV?00ZzQf)V;tapQhWFTC>_oq$ zI4u{#>397%WAyMgZ^3z)MK*kuoZi&2u$T}xy8MHw0@vH)Y#WaG@EgYSt zyD!GdH$ZM8VdG8eot`{r*kHp%T_5gI5FxQS zy-3xWK;n`Fzi0 z36e7Ay|^hgc|!Xf!S7`4{$y=6Xk$ZCbL2hLt_lpRaA%n5WimNja8Ng`BTN#%v{G^v zGGq_|jjXu7KMqN4At{@~?lv+3#1(6#rJ0T$j@QpVm)pluFi2+&Q%vSsb1pnYD%KB% zyp7Eei@c{QPf|4sewHE(vKrH^!5zn(F~`l#TXcGnqBruA5)0qyf~w@>CM(?W8o)*+ zLFjQ7zfWWqdAzO+{(-6VNa#GO9;>d~^=g-WdcM7kQqcMqC<^n~%_Z}b*%^PNnESS}z*SOI$7Dso%=|6? zjO91TB<=ci$_|13U_AY?u*QFfkIpj2w}j4aszHV5_j4Dkc^bvgQ5+tBsl^6nW#3hC z*yJ~;mDRQRBTC?28pF`K}gYn^T>L{6WuUv<~*^6q!oG$uJ z?~Wd8c^b`Y`Ea_A6+D3M71!8!7hqAdbrdhy@xv2+mXL8PG zuQ)`7DsF-e^(p861YH4IEE!|xC3rJYdit@NDHO^SnMCwQTalD<#`tdW(d-k~An*?k zb7(jvo-n|YFn!}=MNSAjVUpe_XAEy~H5%@HxO2SXS(bi0p2CqMNT`gnv;(Y1=re5l z+O>UV*RxhxtJtBCl>Ei^co@QyqRY#Q3-iGT*qm5!o)ciTGju>N$^E?`hzo4i*ggjCmu5W!$$Y!EJXBM8cOkMMzc$#VGP#F!C@8zIH zi+ktB?2ECr*1XNyZV{f2Nh*^Zmcyt3FCrm^IZ-%KvQ z5=yL1v+kM@x2Wm)&WKVZ1q%8Oxg(-ukh6b1mkh_44_4jphM$qemL4rB)QXD#kxj=J z9PD%+oJ3)8P4?220_SIFThvz7leBuUrXo_vw-(un|0!lvv+UV4a8@GR)l z21$MP$Lb{q5grl>Rg_M5sd%0ZgcTP9h3tXBOiqd`YD)i$tL{x_{2D}6)g;Maja+=J z_NTCcIu9_hWsCMV7O~bL|BaA#u-vE2JHvV|-Kp-GyYo{hZmseO`*(qn$<^KlA&|t)~9JpORsZt50_Lyo_Q@)U7W;`t&x3 zVwxn?ulB!HrmRfnAQJ&p#{SU>u$NZqRvp}86qxnhwwf=#%G`PlKR>tE_uToq>Gz!S*;hSWBIN@0PDVK-gyET@BTSp#Y{2;_|yL3oc^gqEw|OWVsv$a!@&1) zgXOZkTFmu+^1bslbrtL?THMzkIZBM0k+Gz%&MA-)%o744kxHSsurO4uLOp&xXpju;_}P z&lwd#Z6^Lf`=3`@8cgp3gZWgBScm?8m>|zN+z2fw|A+}*7fjlQr)iuct4OVbx>Gu5 zBgphn{X1Djc`p;__D)GzO{$(Qj7=7Bh_<|}us}_Rms>l54HaQy=a`+J|2c;%BYoO8 z)TloIld8+7!VO7K$EF+oZK!ki7cUboYYCIA^GI zP7GQqN!D<}kx*oel?HRHSlMdpK_d5xLh5P%S-H}uykoPTx&v)DW!x4x~Xr@5Sj(cH62PCc61&T?Xs zP>o~Lj_lJhcjQ?nfKcxYSh45HYFdgK!w4PARg)WOQu0t)O{kqczO(D!rTsNvPqIl> z&SjH#fG)m_j$jAR!w5$<-P95ve!+`Xz`1@Dqm{B6qBMp&(rZjxt%gh~0P(jc)r%!W zxu?i|+}OI6=AYWAYcK|-$k$v`Q)x~399q^GOWG*@khXHpwX45QcH`@^Wv%ClhSA|t z`X&iSn_S#E7&w{vwDB4PNf34%ID3XHzZ&iMHCZAMZeHZPkd`VUHWo33{t7kb)BJ+u z=A!FC|8o@z_+|hCh`mjp3p0R&LDas16mn)Q-{wOze4#SH?4!ZlP#qd8mg0lyu(Q*G zcRiPG&{dapu=y^X(OAWG5wwrbk{A7u`TS*hF8&{M!0E43{f*^uf@ufit9HbNVUl0} z*b_2FOXix-%?+23O#c9)r8cybsg@ z8;T|bnft#b!R!us&d2hQ4wChh|9juMjrUf*c^m)NSw}v;+^*1gqAiA!gCmg4+X3|P zDhm9`!0T>)S?`mM&E4OQfVkD&8FDlI!x)_}j!`Fm-ymT5sg2ysR(Dc{K@ltCT3ozIpx~-W)RM>IG{%LKC%Rc(NGTHhGL{ZH;o)*mvGw7+v(fQ%xTBPy zPNiW16_~MbWS(qeooZx!&GH+#XnIy-^P&;!qf4ktA>DuRv?SLSlBQWKWy@;yQl@~o zJr}W{jc}v}Z5+*3uGI$hJ#@_B=3yMmX2cf^9sVLkhMQg5kXyt7!Ml368mCig4Ue{1 zz>tV`s{sE3b<@hqUHF(6wGN#(vQE#_;9ce>%Jj+nrfgF!=l4x$g|#%d1+kT7@qVY; zu=|2ogsq6;S^;b51Uy!l)k`UMMlVPPsZJvuVX390jJnL%ew(L=&Mqr$l_1 z2tkOaHL|lO8vyW_rIO(I%&swT$H*w3@l!9F|2FVt?ft%{tuDu5-@}_v^k3;V9lM2h zf0M>UIsN6nSpC!eRnsO9C7iJe6&xSSj@MEUL6&-dG#PwRNZ~h$gUg{%;Qn}$>~sMo zDje%3g7?}L#SbSs$RB61Nmc_aB*}NH^<_?T} zVFL20K2t%?9pA6_$F;hBpBU_HJo4B-*C7hsOZ5Y0gkB|1BaNwx%{Oza{vp@l)od+% zT{~!2WYF2X>CJM2Mf-0*1=0z8ePy$3op0RCc(Xosi4d{`{WAUpchGvYZho~8Z`-bX zx9Eg;xS(oMc)nI--9D*iAh>*Rk__WIFZFlX+5NS_pLh(+hdLth_VmE&K>*9r(m6`} zYYK(tTlZuuGo@Pc8^QPiW~z{oqW+?w-8e_YDsG74jF0E3j3tM?d#&B%;MGB(8JM=V zUWPV0+HmGzJ_HdL0raMUg^D&QwCXMT)sqOIkNsRBHQNE4jR*Mj4~36gz-m~qNqep;i2AE;0tEp>;s`t)Z)*^IPp2%6 z5;R2%7^(ir7rL&&QFE5V6q$0&K9lN%9cRqixIQq(2^xR)b~J_zeF*l1kd>5zB17}Y z;jWnG>N`tKt7g;bc@oWJY2`F@cu#zIq|8~_IuIwnYSH8Vid(VHF!dNvpiCUC_nJ2k zCnMgF#jHZN>+&mHs;0uOoeA7+HD$qJ>1NaV;#MH3q^=icvPNB`sFk_7slU3)8~!-@ zg<1n1a7`acdzr*$m!)H0jKE$;47_ylhT}=040d&)J7e^B92xX`;HBZKKUHQBI5*fh z+mNiu`j8xdGDHJAGN5|+kH`NwQW7~5gw3iR4iiCwel1Y<_LY6F$Rxzf@pcH$^EWmpyC1gyZE_yCl$z{PGAv72Uh&xTdl1zG>P>30d%5F)S4Ze2NoY%Q-b~nZ)7yk_$z}sgp~)EE5g~n9Dl@9-D@9I(U!s<7MCl1{m9)4;4^e|86M?% z@i=*-ag8qDc_Kc#8-me#j$+z7Z|qYNr>%?H$B5IF@mV?9Z1H|Rp4PdYsDGM3JYMZa zWC_|V(ql5{rcoIJ_d1O~aOczlF(-&PRRrsQokDxR{w}9ZoXVD2S)Tox4EDpO+9yzw z&?n1v28AMZzD!(l9 z`L0saFD+DJ8uYRnY_b6E0^?XDr(JX;!#)-Zw$o`TNa|-ou&$`U;dX{xYhK#dNk064E&!6QuqO?7 z$WCMu4lKeQ^9YT$JHM{GqS?Lt)s&j+@i$j%^zTjI$)(HO3x4lH#&U zqLUh15mW8;#}8yPWF!}z?8VuSV>xoTaKx;A3fsMm>ii?Uv75&-i5I2Ww7U;;iX+AqFgaJ@B;ItcslCw%n>bW`|L+4b$;2kfSw<3)Py` zs+^F44`w`Mn(PYM>n^Jkl&0-j|uR+XTj&+%w7 zCiibLdbUz`o((i=EuFRy%*p9Bufr#!ttiLUx%k|2h@fdGeh0`Wbi6Z1lN;i>x|R+5mGPu4MK_Z33pVp38PytccQO@t;3x>LM#U-=|& z=VbM{ezMHn2&moxkLQ#Q>{=U1*!rj!e^Jsyu~@ZfjjdR|vapU>)J(1FKiR!^{AxyS zQij_!T^%aCE#2`<#!8d1Mytqc@+Q_HMHLM>K0-=TKX!%1y5rNaT5mbDpZflp2$L6N zV{V2r9syy!Fqz4H*zZYt(lQTth_X7H<}s@96qi$0uu z)GM=aiUJBGU(xQjcAKfNN7M6~?{)>-pTl$i$ zjG;z)OQ&}n;28DJCb=WXY>2}@*eFuy7NmImu@cipe^{w2uhDbkC?)U{is3g?)O51O zigzS<03^*!^|#{VVOJZlpa5l(6uhOI`GTbDzvAIRDd6x?;Gx(2*+1U?dB?Q~V$JNjaARQGqYXE9<)d(cUzqT+$Vx7 zkh~RbMcAy)m=ll)ZrT~AqV)8xR-_6}8jsEFU%n#ToGd}MB$xKW0p)@;k!Y6bykGWTBK z2xkgIL(RqxQnX)Jb$(Nm+f4o8WO^Cm z=~4170g{T%VmQ5e1>fHn*~3%hUXw&7PGc`+e9(4MxGzrLoh2Hrm=1`z9#4ume`iGd^|2bO~JO6L0^YA-+*OGQ4#i=7OH4y{#)c%1Mz%kts^P2 z`ird#F_|FhC?@ZF2JBsHkH$8N*O{NA&c0S z8Okdl{;r2en_Xr!|7-qgT8fGM1380>upl3w3{@h9()VUtmXLrY9vDq{`D>Mm#mLc) zT%nq!R+O_vRydx%$ILA6B?iydI^^5(8uIRS@nwDw=~uF`2}1>Uz-w;Ey{3H?59_0* zkiw?yzxu*ROxU8tA7jXL&*w)=fX7hsw9ycB`rlIL+R}HI01m4qBn>6D;9o@T?HHq> z7m{h?HoB?8-C;nL_vssa*yQ}QAW5K*5%}*u+7Ob=^W#yo{Zg*-0lK+jvGug=|7beL z?#Q~Xjdlke+qRvKZQHhOn;qM>la6iMwmY^_Z{1@&?}zgPYSh{LthM*G=Jei0$#hre zmZ{uztk)x^A2<21gIL6pRd?S-89b*RPXTDd_ia4Uhx?a?@&j0>*UKm%L&0`A>q5R> zpb)g|m7~Hh-b?#YMn0}I8?Sp?j^2Cmfi3qm>#76r`JtezI}Jn~Ol>p^lUl>x1@!1( zdSq#x?aWEMCG({r(cm866XcGq?{>$u#Ii_P%PcAsSxXIpo70o(Y3b>xSx<)@<1pf; z{rO{%?_&zy5tmFgqzkGk+%P}c==Nj`rS&J7+3dSK!cTkfD%HWIn>{7PcH8C%X2u9w&jrce$=O>#Aas#7r=o zI12b+pie^m^9Pwt?OY0K7Miz;NP?otz12uQVtar;)-@ks z%&(6!_1R^6j;J2Jm|q(z9I?8B^J8w_+oce8#jkHdbue)Dtq8gkXOzQ>b-n$9y4}Jv z1apP9BjkhXMeo15zH8q;F0JF=Rp`GaGv1|2eo_0281RusmKcMCh~V@v#6tHVV9{Db zM%W}m8l#-NlOCGky;e3n%v9OplxyXQcXh*(ks4AlB4KI~h7KWvMBHGQTEzk9pANT&xteu;dGocd+c2v6eLUK$9T}yFa7G{S55;O;*Sfcs{*%WK+Bn!V~() zBa};?+K7~UkH$lkN4n&h7k{U~lKBe{nTrNRqev(;zStc-elMJC)89oSU0_V1J{)aTxvkKR{xdjuX`S zB}7#rr)wQoY?eBVfc=iCuXb2g?xu)yocz5c(d$V83a95R(-H3QvV6_qPKoSb?afT1 z`{)|^Hto&(-8y%O1Xc9<6J#cPO!#G~EY0@hO%L(M`ps_YmaR9zg_UC0bNcjqD-TyD zs{Wg6_QH7&pZ-Vbq%iyOTE|GQo=legea1sk^6GV4#)pGO@BDG3wU@^O9R!iVxk=J* zd0B_Op6~7jj9Ke4_L>A_t4dh(DFnv}D97Ru_T7f|&sHkn6!7ht^yYy+!*Tm_DJl+I z`%qzGyECx9P9a74*oNVIR*B{RY)^yB(y62&gTV-SyT=0J(O~s7jhqMRDt<=D)2MOj zc!{#>e<&q_qQm!$g8q}Fn)$G!@bBnxQsDe#WiNeQmHuWzfr2>~`?%X}G{59XQ)6!o z#KOL}IQe0L${y_+QeV?&S=zr6{C z+WO%WbEQim&KQK`vz74E?yVe$3Dv3+4t|G!z}!fA_!bUL4J2 z(PVH=7qZuQ-qzEK6Cf3|jO>jGllTD4bwBUiQ%smMC;hg+?Egg|eNq6wx%IXR_lXg{oD>0!9a4!S~vBM#miZK&fU z5o9tt%VXCtxFY3t{I|T<{CAE*kqIf*DkX&T!h1g`AzrD6X;YYEbm*GuTfmoho{{Y_ZW z?hwo9$`7-@F4m6|&Cez{bUcPgd;I3WW;!3}s8NXQxUJb^C%Y$-ZeV3uzQ3Nt-kq5- zaJeFOKIQN`ANbf~N6^$49-kuuTJP{)TJ3qRbog%!tk<;a-1S{Ok4|u1mEm%G*=IA- zhJIlNzqnbQmtxZLu!XSf5%f;q4;pv8ZPOh49Upy&Xm=Xzl4Nndk5TrvwZWFK%=X$m zyl1&3B)8w})9Ulk^?!O2?dTple7|sM0-HPFM_*34@gNt1d8@~XwWIeq>y7^nf$bxaKeD({5PnDLX&5RkQg*z~fNJ2JwwAVi<|vQAz{eTBc6P5` zy4aYU#Nsyl_xm`y&h7RQl=YIy{?*lX{oHAHFylpbqU)=6@BkyMXQj7uWB+*7#_u&J zkZj8sc&EK=t^410IZS3+?1hHI?ych|i?9pO#6SSlWMV0chv)&Q()-@}cmJ#Ykv_E@ zR_RoIt_I-I@z+Jn(+cgH`q_Jx2Hs8|xBF!CtQ2*Z-G@;JD2xUK#}_s8;vTkOI7_d4 zQXDiK&Jd(I9d;!YiQmUiID0-0=@+nMX{kBRUNOsZF(LNur6<}BGVx=1OHx+Y00TaI zJ%+J-1M-^hi%%)pzJ3rzrEKvskn}y}$u@GvnB45Jxc$8Zz`?eo|E#KaUqF@yd|&-2 zzO=D1$$wMr4U_c7KnBjz%1VRdp%{JF?EulLsz)Y6ya#2r0ppnmejQI+a*1_TMIL+Z z`CUrL0g}ulkas`B=fyrW|2;Sx`vk{Qv-2mXQL^>9;p|DaTBjq|gIqoaiAd|VdLG~6 zEUm|4yUs^4AE+@j5PE8}rlwfw?(PxYzPk>Sb(PlN>eIex*-8H+5?vIVfn({{2}MLE z1gUhT+0wHmvL21B!yeVbvmsnnF(IEtU=@kGh;uH}^ZGLE(z(OPhfhGKv)VuD*&tl( zKFjvi&Y6{@zmUsC*vzD_M@|x)m{D97&#lWbA15&{$ccjevV9UfF%t8(9r$tO`?*-Y zU8YVZkI>y#xnq4*j0mCoi3>{#(sYV2H7}A(UU;i2U-~mF@b9~*;|m2fq6k?CC;&c$ zkcN)h(jfWMGK z<&w^7Tf!ro;ucxhxa1+QTZ5CE0O^bW&bv~&-7Ltfuet868K{N$8VE=~`DO@DFAXm; z{&fw3IOL1*{dvO~C_iI?iss=$K_W77z-1HKm0`LZP1F46@nNf=7t4N42TY8QY$B!Eaii3&f*_eT=CN%IdkNX>8M-sv$r`F%Yb5Gl z*M7Af-+tR!Gf)9=Sz52FQ8ev`r4O2Iv-F684wlg(zGS7$ny!Pp4mLPg(6;P!=fD#h z2p^{tASV^iDMN#H#WTYRhG}~rLzRvi%r9^=)8x7&(j>{-?cah z5~jF|>FpT?o%C6;){@P>!R7PRP&&z7#rfF4VSXJvbLM<`HsxL=qya&}xE8m%&{@#6 zXRE%q`#NpTsGH&~ce&Z`aOj^WLdV4`tP#AM(hY`KaYkrJ_g2{L^O!;nc6Pfec8wCB ze#K*G-a()3PA5rQ-Ewgiy+h@+=j}k8W zI^*ek)JK7Efg;`WT{?|Ge|E6nyL=lV{ITIUm7s`?4FS`SK{w<0d1m{0UuHU-JhShx zJBY>StKzcumPDTJ^UUE-(CgrojiERG@K2f3Ee{7+cf3vRE@Xd&_RK{9D?3X&MO??R z=Oiw`n*#di{MLs-7@7UrR1S(!|K|(2SFQ(_xNNfsm4}aFEHE$>3s9Ll_1=Z3tRg+l z=JX**N&R#14f=WHU6OqpswVes#4U}n+K{v84@N*N7VY<6CH1+fs7v;?nOE7;IYr>d zeG3(63Z>`W(elcNjkM+Y(C3={a?Gc6`kWQ!uLZ39{64ppfKNdRXEQLcx1-8yu<=Z9 zK=S(U7C7eZ1jKZ}XYOoXq$%wy(=J#b+$O}dl4J3tbLoO-Ayq88xdZiRVOL5OEX@N3)kpM`iw|hY0f#dE_K#hPqXUhDkG(OkQ>TW3%tD5 z`gioKs*)2E#+W6Fv?L;(T81Ue+pE3Hf7gASmPZV3Kkf#d>uQaqgW;66<0%n356j|m z7`PiB?JkLtqYk*})q0DOv4)U(?IC?wqi!`EH-$g!CrSb9IWsO4h?S15RMhB+$@y-# zr4k5!G=d>A#aJMNBADcap9=^?h(bz8_q^sIhJ?lbv?)+$IDKJsyUxS+ycY3%njCxc zz6o0jfgr=dM%Ws8pfNxG!b*q`nGlP_;~Y_s9U*ac<|R1l$0WgH{gL1xO#gKAmz+JB zrpVhHu7NAI!TC8P8|7R!W3rQ65kP*}ev}eLMG7@|KN)s_kz#NfNd^7cTB!*A*B$Iq&1$X0(k`*4Ka4tLvbrGasG2Y~IBaDn&#ss!BQuwEe`% zmr)`z(3#PR(xMaaNRl}_&2(2QYqjA!{v|zl-)J~CceX&GHO}!`Zo$Qr=j!z$1i}|s zEYL&XcH_)X^a!dMD^slQJR*V%l?Gg^ggN(kf==pp)M}KH!uJ0wD!seTk-WF18VKe4 z_`z}0_22<~LD#xGN8y&-(KSa0-Ov;#4UANy=SvK8b+`4h0aKN3Gu$2n@HH19+v11R zzzqnqXUkG!iq8xcNB@iLtX3YxMz_xYc8mATAJ@UC&E`~{4O2SLg|aRsIquy69KM7s zQKjyn!rU1b=-n6(?U{wV_ncPvensHPJYG}Qy4x5|LfL0c@z=sZ+X*2 zF_@jP@&ou2YzOhLz1P%dw;ng4<@o$Q!WLtTJRd7?d)EbtE1G5N+xv~rNqb|i@bFLl zs)8AESHvfHdMHPu>NZ4`PCjp3nf+TGn92(SYGm=H22*SBYaxs;+%9?EzX-h7H~t~P z4}NYBZ25R&#PMVtr(U>qsayv4G46%$Qkm8XXL*>X3|60!SY-gf#3VA1{yWdX><6$b zNCAU(joYSLT3VRQ!^YZ=4-1F_5oJEJ2yl{A708B{gjf+gXdRg@1Z3aP|>e?N!FuHYEoz8Ix{d=5D2%A+aiWnI*kQbVFXJJCq!KOH*CZ4&$Re*L z0@cs$@oF0shUJRp;)s5_q8wDvH1cr-!AVB2gzR|HMlTEMOsv zJxtRA_f2D!;Tk}$2BfzUR);_jp)dg?}rKEkv^E+ZScXK_z;qR+i(|GuOAM^n0m4oujLXrlM@> z>IoJol7x|MTuPqB8 zizsU>Z?1m7+escvipeA*C8^kbm`VbP(YUR>O9DH1LB1Xg5}>8H9$?cntp~@AvevrS z-E25JFN=oJFPtq`cFI04@pcWCF=#>3*L3~R2wxvdi?uUge9c!bn`S>Y9dEyp7`@$Zn(59VuP+Z$BwqJe*Ybd^985+01Ay zZ~CDpd#_$pv-G+?h4VKZyawifElrduuk~u@RQmG{-cpiMwucxEyWZ0du#x!AELfd`T2 zY+D#&h1Fq!e+9q*{6qEqkXHHHNt*Sg5MMsWH2LK`EmS%q-_(+sHi)WR1U&)+^J0x8 z1IfTr<-ZJw!)PfGg%~x%u!2SPtZ`X9s&q-3dK zQn2Uu(9)QX^2!^0Lxf7h0wkdZ-$9=1yr;2xqMB21;=*VV^ksTmPYo*C*g;R7-={GO zy$fX^&_xNhzpN+7O(kqf%IC40C;^oiy| zkDe8x^O2zbfIkOI;X6yUXUj~?^| zOstoV`;H-gAB2r7wgp1cw8Dw#K{FnIpz^r7ESL6^dc&GtW?YV*9U85qX2YKEtiK=g z*K9{pcHA7q=(N3BN-rp+m%`!tGymKxTR~LA17I%$)Z0rGEtyn`#AL zN*GgJB^7+}op*)b+53kK8vd6gasa~24?Q;lSQtVU`Obehivoz?gim7W_OG3v`<_^; zGQBxJ&(qeH5=wfQv8$7a->8CjL7(tz_m!;lVoXI`a<5p2m4vhI(NgU>U_##lw3=$0X)LbB;&TJhp89T zZ)Y#ko{!_W4Be@x$qdboBUFxdZ4L76pBEQOTMp6;WRl~G;o`63FJWr9H(Z+sBUNE9 zA{7;E9&h7Xdj5-M^9Q)IpER>UgPE@nH#D42Lv8-++krH`Jml;Cd5pl@!Eh4z2>6R* zr9NK-^S4LEO$rTQet2NkUq@_bh1Pp=zmxyW1bEUp!^7IMJ=;yt)i87tbNpT7q*_9o z8fF_ch!Bg)V7OS8-bT;TOgVCuzfsCxD#si(G6-%{#kYa3C-8bbbjBBi@F$^v=)cno z1aSA=yzh_gmooQ;A0NFS!b9&q)dnDk{O4kqKb-njY$@1SSbVw*3igFpFLS#bu91o$ zzk*s&g)sdj6V}WK8A1SHdUFiuY;D3wUzhrW$U4b3F1 z$=idtNTlQ_oj`+@NPh(>?2?X^29U4@&`gVgbE~+N{S4c&_#8b z0>65(M0dqQDafo-1~vRGXr_?l;j8saGBr~X(p#71twdclk1G$en3*C>nMs|f#-D$moMzL?y}7;zs)!+ zV3a}fj=-%~#IQS!jMqlJZ)uLR1BKo`^h zY%lKT&wYRL2gI_4k(dTCs88mH#Reop#p3)1si$0keLEHeXP+B@R6R@+=w~bO^(B)P zl90LTs~+d#u~upNU@lbv@p9x^vDr=_f` zINb(?LY1R?Kh_z?(D~kOYF#>=%kmZ&s-NxN$aNYZt-Y%w>ZgmbUyGZO9cAl1)GP=R zVVh||_vv9?;wV%q|NdlMx?-h39UlcC0f8lj1m`;=gQ<{Z=9mVz2t^H&;1CkRPCj*( zu#Bgqc`!095vzbOT@bN8c8{Z^%p|1#EO#yzzzHmiM+H*tNN|lRZIfu}h$^eN+_qJ7 z+x9|qYnky5lT{JAq-0Ie3TZyV6VLAf&e&V#8>Tn2V)D3UX2pxeoeL(;p2YQ-zhn81 zLMOH<{HttjKZ?wF)N<1~V-)m=lEqB!DjX}PRPlEra>rrgtWu|!ui(R;W4Ps{W{ zOr_`=I^(-Regc6h-oGbaRL!tG>` z|9w*4?P~9L3NW8r(^j3_fS1m1LAHM+-4|4_((B<0k=J!{EVzi%`5-}5E)^1KDN`gh z;9{=3@OA~{RD>RS*cxL@;wW)9#SI$OEt1WCeQR~FZJ%@9zN0+zj%K6q@@1}hmISlp zy9EhefdyxHYiG07=d9wlYQCQJ>!>ye?W{LQ>i)fYRQLlLVBVU;=T}|lzH!AVp&SDm+ zScm-P#XLLvuP-2gmV1}^3;}#Oo)Pf-Kk@Ewh77t7>YlD-t}Pq`Gd5l>apN_H;zE&vg=0MTqw|KTR)t=XD1tbMn~#6G zr0r*ro7JyGFtCS@ZPJxC{Oz#fbr!~EGoMcV>*Y#ZujWF%uy~>P1^f%%ET)CRt-qhD z7|A%`wT6(8S2UKz3z&kDv*@#C%`?jIn=8w(QA(u7M*@=WCFm;cdr+XjvZd_nYnhuS zb%C$lNMjgpyaJ`T? zTPk+S2$&__1V%BAz&|2Lr8ml;`BCEv`Ldvesr>rbJqN?7vW%gDI9`M+@R13r zrwnjVQOh)XkJ*2FuKboFg0h9Ky$y8&KQX3O0v+py)HBipnq;Ol?rY8{e5~jzP)+Xl z)+|vA9z(PKa={K?jtz%?IvCP^v^Sqi3gIYT@huB)jl zT;$=dbf0YvBdlz(l4AZaIZh-?E~%>PDQ;ZgAGEk!V`J;~5N(_BqmE$yc3Y8gv4c)yzVEJRQ>q-362jTBUZD;Lk5AYVI`(-DKOga^) z%zN)yX(!RxO*ND@j~z5qa~z$7`+>_<6nXmYIRy(Y3_Y`EPMgNp^d8J^^hnP%ao!`i zTFU*y{Y&ZP)4Oi`+VLF0=!w9j*-h_o15wtG5i0nUX^f+#;WOA1;_CC+B*BjNs+dDv zXLFGE#hhb*Es%8XyqR8^;ss7~(6E2kzUIK${B3Az5dl_qs_VN{mXz47;}dw}ftF&L zg7)pDy}>iG^j??N-F#Sh>wvlCH;cmOEE7G8`>>y&1Asqz$jtk0$m%`~&)`e!c_bKw zr1~9%6ul=LXxeuaaWaE8{f$A0{Kk=lm*6#W^$lf)+wwIkLIBZJqdN**$+9i9(xSu( zc+NyyP#m$rjFFs!-y$XBrVB3XnvrLmf*JB+7EVfg5`oCbbS_MxCHby@lZh(`FD-d$ z9GV7{@l!8e6NdI^oS-*V_&h;TNm8O7B0;A?1cUw6J3)g<;6i?Fq~;($I=Bx5Hd!Bx9?rl}lql3FIgp>!UK>+aZLp|33AqWMdT3-7 zgRMJW+bQ2#lrUyLO29n*clW$I|7@pB^y2-=<>a@_hAr-sRrRHnRsF$Dt$A>jlrYZu zM#>70)8TKQv+VWm2u@ZE>%p(-b8)q+r)%d)V>9bG#iGw-sv2KnF$`GW4{6h10tkMq zH#}5bt6x*`Uxeg=R6Z$DY_cXSLDjUTshI`Z*jYI0e4npdOuUwf?K}g@7B%Bgc{Gaw z1*nE}pU!3Z4UIm(4e7|TLPlC-LNc~@t*+O0Hy0u&)(QKXXuXPoLdby->j}}#No@q3 z`}@Rm$JqYpB>D7(ou; zj|<-?W|_G1Cemc(I-OVdCz3-9w|f2!>njzd^ry15N#!d`DM zh0$)Yp`zz@Jy)6G`>??Wf}~#_e|-?%CZA-AUbNpgHZq3fGb0^z1yeXYHrJu1wF54^ z7nX8Pv;Cl?#erOJ9y7;N8aM(u;pg`O`eN)};g2wVQ)V0AFRIh}q8YW*$}-Eal4rW+BDqnP)4$p#7+8fLFgW{pgEoz{oYiS8`&*(dc4Ee?d|;uw6xHAJ31gr3hKuXfoB`A zRBeD6yq8$)eu&Zk?I`@QY5I+tpF*)Wenkw}iq?R_@7F@y*s2V+^`j|e6cx2c-R-5;v;ZYKOPIy&arNMMGn}(PRk}hyDeQMH8(m zd%SD&cqNO+wOFbf6j?6PYo`cHS-?&T{5pn`2t@QfM%_^LkSfAOxS}GDLOe8q6owSz z#+NJ!N(}D<6%pVwN_-%#J>0`mGtjC$>l3vUO}YOP(6Ky_k{v;GDWXzDRP3N!idRZx zh1CiThnFZQKHn^>R%6*qK+d!iMo}t!T~B8$M}YV8&!SP;?dfFr4!w0?|#CpW?7!?pw)aOFWz?ND@4Z)-G^kWS( zL!^yGCXIlSvgagZO>H>aZl2e#ta(qI^#rm^w{m3iUqOEi6;L7xLvOo_cv#~(uER~3 z|C8fhU0w0KY&iqb+DI|*c>G(-%frCZBkGH2ZI-vQGH03Y%S6`OtG zxb;+bzckUqap|pRk8ARZ!%TJxc%t*#8HDr*S7ci$v^uwJvTs8ltM*!MzqRij$NfCk zCo4rqSIjMKodn2o>}&h=KDkllHA1+p?;gDQpJ+Zu3zHIQyq+=Uy&8om9DP-!L32Fz zLDpR1$I(s9&sUUJFu&&6r#QTi`|?rmeo7@;Du<~_$yBqq-*)k3Wl|-{(0AmUteyVS z|1t{Vz8QB|S33Q4IldbP_jJ$Y>- zhuM1getw>O!{t3qqEX4pS4q>g=QV3;m%GaAEblK{91YQ6c!ypa}@K z{b9b5~b!xcyE5^mre{asKbx1mH-kYv+8J=M_~f!&b)moUFE^cjmBi zdZ?n7&U0^)ny0@$_~owFcmt9*?SH45r42|tiB>*jY4zB0_7Ai7>rGn4SVhly%JXI# z&GDagn1~SO$J6|78NB(9Ke*7BgXaYF{;E&p&1ky$X+xs-KColl{t{DqFl`~rJXP?! z5>prZq^5={S8F{Cqnyi)K!4)%T?ud|=^i^=#T}VP6O)NO__;RrlfOOgU2gPEi8xKn|q@|P{YkE>zRXCQ%zzVniq&30pG zt=?F($pVQV@HPt}YJ6c^@vCMGbFK=_x=Gg47u@@rIW&@~D1!Vj9oWT;31H4;&7#DG z&1vnM**LA^X4L9oud+56jZ*_f!c=1Ei6BIvgt8)}QXVT{$S`KL@~qD?I$vYT7PEtu zwFZyLl6a+5E%F2s3Ha|v7jGj@g%vSd^kyjn-*_(=XwGi3^M+T8bXu{1SkcwB(7Ul`L!~zgbgpX{zsUaSYTWvS5T&T6o#ASk6peiFVeN z`tXIo^Pqid5D6(pl?-K+gqDm$)F>5ADdP)}GGk=fJGNc?(%~WX5Er8-z>y*bsc|Au(Do3mcKj$Ek9wJpWTL39@omMPSb(jL=x>)~3?RYSIbEdzX%m zO7o>fA?cwOROvt^8M&%%@Q;QV`EmCBbAxI)Ym1#xOElsF;_pFHWXEVH>E#>V8rS)a z=@cO9PICE*nSQ>LY54WsD^nTkp~gH_pTq1q{rE|Iro(?gu`_$~qpqeEs4p?sDW{0J zmLn=e+8yKg1A?)^0Q1=G=0jq4<>@!|>ITKL3)UtuLu5Kns2M^l!VzK%*>TTVOsH=u z<^)3_Q?j*;S*xxxG1Np&eIx?dP4XL(+4mt}HSoH{gUIDG4O~qwV$EIg*l*)!FfmLf zMcSr<-6SjaWgrJhGDcex{G+f3an#0#r2gmgmyi-OFKXFHv&H@WBW28D#^~AD+sV;_ zI%Ec9p^yQTB$#9dT8Rj@NHHmOw9$DYV=KRk2XI|@0-x4SnV&T^HJ_iS{JRCFyD)LJ zYkqG@3z_^ptr5V-a_p_Or_FS(=>;wDOK8CX1Eiu=-|5Cm=k&|qkyIEY zSxs{0b^SK1;Q_uS-TgLPUr0%nit}bta%OX;d(NS>=f`4cIxrj8bMZN4iQe1g@w#+# zrcCGe{WB?O+2K|Et@0zG-I%+TkenW#j2H8XW}zf%hzG zS;zdZ-d-mUltXF%wbfE!zP=H_=et>5!_;>B*?)Br2fUOznYz>-wamlu;E@=2`*^+$ zCc*W)oeMgMcsdDqwuuV$4%KX1jjiw#yS*9yUwub1O4fURa+LxP%#|o9U+rq>-7b^r zf5}0V`BcO#OOGJJ%gm0fU=2qp)7NFNxYM-mWSo3pJnBA@%QCil|D=(exS9df3A}~m z{k|x#w50&N4{3@znZDeW@Vv)>Z++jRuQZ#!?j$6=T_YuNzIUkq)g7MiTyl7wvclJ# zAK*)xXy1S6{QJU?XKt+?n`x4+pT`k(k+-d((~1+%DLzwsQv7D@aexP?D1H#sxoZ&w z%I1NuAe;5-`}f3u>g&p?+JklTy#L4|m|^`uJ*+U0hmL&>M2}QfRsAPt0q$_~-tf4| zh)46)3!cv$KJXvDA7Dl$zU)#`RP^1ScHi%D{zM^l*RS*L@=FwX4goixg{;&?Ywl-e zc7Wp=7gy6WCORqI<6Tv#hc`PM7_2D2SP_CQi|7 zBP})i^A`3vjr%p2-7(vB>H}4@*<}LmV~&J8#}3@9Zj?$XncG^Af2HOabdk|j5-xHb zd;jWUe|M-Y=5&S1@%Ep|Jb27*kBz9=$1&i&sU3GQ{oanoK~{{|Ofp`N`xaZ>^gSnv z0jTtdzVx>aa0UtodG(wofZvQ2v7;mKEqT+vLu8CDKJGzl?? zv1A&pk7A<6{wFqHgEswRqZDksRt(G((*!n&sb%C}8LcN^HcYf$<+Ow%H)Ht?IAA*n zSs8G`^H6sTDWezqzW@_1ug% zj6BQLm!%XBMb0HEw+WFPBI){H66K)qa|32IDMTlqqGohk%Q>}3WP}E8$5D^LM*0KK zMaTFG#lTJ)s1?x06!O#0UQqQh34?!T-G8nM?oOIeW!x1-BoEbx3{gu9@%;Ph0?p|b zB{8HETuLS?a@<|oNR)vNPdGM3vTjoCo{fOW?z#BseDk=len*dfWvx`$+>RxFl+;1| zT?0OPTY0vlbxsconWVOM%Hz7sde^7|bGsACkG z_%9mrDp7#?U(9~DH@{e7EP%hZ?Z{v1ZLp>rSmDGT#^U?H;6T9u!}(mDd|iS7fAGYj zSi==XZ@Ak$OpsPzM|}Pcdop%#d1QMJHxhY&ZvuJ_7vePjlO+5)n|}uwaj&4S5VM<6 z^0Roua6ge2lbqka`FF6Kwi#+KaNTww`hkHmh%W!Lk~9b1w0h&w2G0jGpc;kY;En@< z@0Dv06s6> zbh#^qaGQ2$dI@jhjnVr1ZysxOj1LsoBY;(dVrmTHQR6ANw}w z2)s-$DgA#I;3^QsJJ<8R0%ujf*$lA$G1cRfcOA*WOGlSP;Q6}TiNT=H?WaQ?e10W*YWs|-nkLU`26)># z7)~PaI9^tWF#gS!W9YI`qV=3420H#C;fg4rMAcCuC`OaIX(^GqkUssFIfn?0MN%@@ z68^%w2+T!NQr7Vypr$;-xg2m=>DM2AEUt%=44cCAF&d4`uKEcRXEU75d$hUz7%ZJL~ z)MK@7UG7taZf-4>?ssEruC~|v#;Q6t^|o+zMqpJO|n&6AHbJ%r7aIIA_V!}n@naPUwy366~0tT~gRTu4?_|`K%QhySOA8mjqW%aoBt~39@6Uf zhACo&H`u`Mw_9M{AMWvn>w((zEoCCB!xd%TWhJEbFf0dDsR+QLrJfl_`+zGGW$ICf z7O)tuUbxRd@}E&5KgVQ}VCOW>uj3M%6v)D0MG?uMMC8i|V7->;<$`b%KEa;(>p||W zZ9&eUtg0hg9_MG{ZeVG^e*)IHZ#dd3-@kfi+ubK-E@z%IZM+!3grwt#c{a(+8f$C>YP?io3h_=h~dk*I(C6N)=0E{73V6vv;diVzq)_@`2B^ z1K`U;9UDK(45K~{~Do(&236j-hv|NT>$%KE+aSzWzUSUF%c{q90Qg%V|%S|@SXaeFW+$!6pBdNmzv zT0*m0%=sOiD!AzPwkTvK_uD>slY2S;O*$5;r>e_^rCRe87vhs!^9<&GqGxOxMU6#68d}iaT=X%etk)hzfS80LtzD2xa)i$jf5{14xTy~`aSQG;9WR`T=A|cpSs%W#Va(tS2>#UemL_D)HGfDmYD@&V&O}>JJ5M)QOLD}rd zU#ewPjF5;G_r%|}Jd1KUMcdayCo|zYxqt80O}}R}5K6A?kpF@nHvZPb9B9dKI}*I^ zKgDw?v0J6+`5NSogLQRNzLunA;3cdW_h>`4k}P=6qQX886@rvBmi|4?T2;s4(Er-7 zl)gYC9c0|wWnpy&dKHfA;XJugnqe9)qot{U_x8S4B&}zsOOTbkvGz4|4)8XO)!rqh zpcG_u?k;fMb)9EVR0s8ONjCnTNn`+xDF|g~)Za+QdXa5qE}_SI3P*oUCamedVuU2XYCKU3ry^_w*@k6)Es=e)HEQ~6?tbmE3&zp^3w zudg6{811^^VpuH2?WdoXGF8U~HhQ@4vr$2^n-}i<+9HWf9)Y;TxiQlw4A_ZB#&;9D zYk?x-1W~zQVu%Uy6~_q0sPkQNc$%c~g4Vu~j}c37J0hm0Y6{wv1lUh7A|fg@Hq(Xh z_#g|)@Uv^=)(V<)8=FnZwpEe?Q@0tXv60AdJm=eb0Q+bWp?jTRdli_wPC z9mqz!X#r`YMoI1TC^stKt7M4+`~ zml|8hh#5vH4U>UqsMHxkl%`VsAtG9ST|~t)dV~TT*(l8&Ue8uOiOEGAP%zdv%Z%T@ z3$nv4b-v644(_IKx#t1Ch6z`l5I#wUGg{sRO3Z~sv54g=Qf0-2tP7t2vEqf-6MCb7pE=+4aNjlYiOWI0%Rva}Q6_|pg1NC- z=f*nP*4Iz-UpPG}DUVeSLYzi(pHPQ8A2okVrn%8Lo_N{+wjx0ee#&=U7%hi#US7&Q zrQn*@7m@V075b?zc!tLs&NmrF4)E#KT^-2Vvp!Ex!fg0>k0~1Ht`wRTM(2F)+WAiv~=ktLtbkz0l9i~GH zKraP>Z_|?Uj$^D^NGV#Eqk+kO+DIH#yW!#XY^bX<4YmVaMJU;jU><)^<@lkd>*?Xx z2s&-e9hEFK_b+6S{fBvc$T{mtzNAfJd8B95?o<&fl$7Yxg+kpCRrS4-Axp=C!3K+F zn-f*_`?KNEVE*AeJ#BG}^w(S3CL*s9kIX^^L>guE{n7;)$|jBzWr##|)tP$;_50g~ z=4?Euj-)i156k{}W%zTw_PeNv4ScB*e*xlo`h19J>4q~7slyG4ma>k=)SXORd0Z?J z;>KbzGaZ=`WpN8|J?N03L_R6qI9onJK6L99`{<=_>hI~IjX2)!_xy-m+}78sxGRs_ zQs6L9TpcYS560?e_xI|mjJCSA_o?=5FEjhr1{L~2nMJ-~ z0fpm-u9kL$75UPgmD&Y|8@G|Q6VuLfTs6sVKjpP4Yf7q|ozav$D6cFlaBFT|TJWW% z<D5>q25F(pYhnRCZKx@wvPb}eZ+k!+;uZJVx5{N085sSg`K1O(v&w(z1 zE(>5OfWoF2;Qdi7sl{jJCEx&o`~lae&G;uKwa)|=uE#CJFG6PbK48DS?nDPSis>H! zXO7LJ2Q2m%bf9`bDbmJTIPYjd`XQGMV_Oy`gby|*s18i@C1oo@QDMUtF(RVP&iV83 zgDLPoXt}ygXDI-vv08`4v8Sp1Z~zQ4_1wnD#qtsNy`F!YPDs(saQV92Ny#Z(I(_FF z^!Eo&?rNrdZ|hlJehrE*f6pqiy7#(k|0OzvF_xS+zl2dxMJ(=V1Wf-Mv}eC7>a{sp z!y?o19)TVB8KojtGl%31w6RT!+W<0LYjp1WGPiHq`BfmM2)H;=p|_#3*<8FVEvbMG zTpA!U6cvI0^Zx+WKqC8WC($tJFUW!Loz^nVsT>WG`8@W@t5*ITKKfaffQ0C zY@Z$W`TgK&98cL}CYL&$+geEHhLD;~R@z-q;c47h!YZjM{K%UjCbVb0|)<)JXNu(WQ(9VmmiON?WUrMxPC*u$ldy0Hd z(P~>nEs2s6RZ&G{aR~(c$jo5O(ty&0wI-EL(%luMsj(i<1)sKA@x(f|MAK~Z*@W{8 zIC#PSOqx0l%3Mm{UP(i1lH7v)K?f^k32H2;ane{RqaN^tU`}Zco$Wgal@v1mfJ&xq z*hcNTZPHgDb0;pGbdN5Ie9_r%8DmrSuv}4@)FP!k)-QcSMptk8Rer+57w;u5A?dRS zdy1ei5yyR=F1`R(C=V~00N2Bh#KI_{rpN$q*KXt4+n<EZ{D2&FBwCnZu!tu3vEC6#9j zS0I!YC?)X}D74U?G)$>7+@RDM215%iG)875C1`S`xvYdhYfB@fkVq{&X{wY2S|UIp zEG?xag=>kl)vG15Y{;kxUs6mrZrh6Yo1c zBiMwGiovXtFocRFz!I5Mr)-m1LthQ9GUmc*7wx(T*LcZz@g!bnCwRu(SEthEoCkbh zWxR7VXszg#&}Avo7{8}pPZ2kfRegODfQ=w5Eo=lf5YmzgC5+LpWkJxtM;L^fHwUbH7>4l35;s{~23!Sf$+S5cQ=)q+um<=+rkyab2^cE3{|4|w3?b7740WC= z1YXMg-2~hQoJBv=9m@2-5U9<}zW{i2mq+412af`G0*`+H+n$OU@VysOMqmiE$1vxw zXYY0EzXySU;KbvC{N|1x&ObLi=mp{(_r;I`PC9;MSNU^47Ut2vB>2X6yLjZDVV<`C z5`=O@oZ;l|2ZQ2?-{s&>&f1+t8>30qH}`PP!ByP%dIMm_3!hmymZcl}IpL(EXz5Au zz?%)s9~a?Ar%vB9vSs(77~wbyA%;n1ii(Q3_10Tiwrm-{{N*nP&1-6EqN=J2pU>B) zvY9Yp0u2of!!{VOEW$z%ktX3r2+c$*K;5=BXi1Sjv$$_ClAGh>>dQXLm#=!5uI^;E zZ@RQNS6unk6YZQxzj3ryimmT##!kBANqa!*iX=yS=+eTNzr^3|SN<`D{vcM|p}VHt zUvT{N=Xb8I`|RAgGvl(_zELbq|FzQ9_+Ub!raQl8_s;;RAl+6VpHy|(bUM_Qudl#Ao_fBW6?Q?~3s#ap(*Z#hc1WKx&32Rh>& zll6+ps(DO@GgVa9U`3D>$Xs6zT6x4J^h%4gl=S)~E!ssWNeLF72IVHOJCe}R((j`( z{NVIQyZ2AZ>U0DU(nHHLM;V_xT4w^mO=PZvw3qmZPXhrLh&X`7>TN2*L4owlS1Ivf{3Rw!BSN;UAd(Ggu~+pP$dXdGnY(dp7y``CND1;K!+%GiP$rNheWKQi9_+tXsE^M<0EZ zROKfTr1_tIceNr=NH7czfbKHEAH{Njb$cWv{uc@>;> zU?oDpL(7}?ER88#EGV0HCe7=v0ou2%b+3N#hWII8``^6%ceR?Eh8-JS>ehO6G$~HJ zFi0rUe~orFD_(md&5n&O{-9vLqkJ5A{N7W$IF4rR28Z?zMP-G>jH$jpQC(xRM^m%8 z2NmQ?##h@64C7j}-l4MG8WaJ&E3Dt-5RYr-&G8Rvr>9r3X^Tryp=9ECd(^h;8$Gtv zI0OQMS<`(ZMnrGi?69N3BODeSGC!~{)_EWPW3abL83Eh?d>&{8&I5KYCvWfJMc^*X zAb$}?*>V@~V+Jc&mI3Dim(#C!IUjfxqkhQZQ^3{0377$R7H48e7Jxqk4*`c`2%n*N z7DKSi0B#v!{ueRooWlSIxB|EyquK$Z#3;rPO>y8$z>OF(;6K^n)W#h9F&Kr=e;Ud$ zB;a>|#6O|^?D6@~nRKv#mN)Ab6-*m@&1b%HuH!H9ZA-1) zex|dby{gdF_^}r>EvxzaWA{8)ebkKE=N~ks;2+h&a55sSfIqG6g0!#xw2MFXi$(Rv zA4bxh;_i%=);+Tn+B<{3Zufs0>+Ah9Wq?WrA+4}8$IM1h?Lx0DNo#>4%sX_Y6iO&G z8e4;BvAPT0t<+e{!l_SYvW>ar=y`Gjf34MP`4cl#D-cUdtgT9R2gT?M=}Qt5=7o>_5k? znmnN*xwYl)~U0K9OPdjSk%mZeBYuw4L zPquEod)o4s)_t?KrglO1A(I~1S##SRZHb1@ef0druhq{P|E=whzcQ)0zJ;o^hmAI6 zQCW&akWtC(LX99Y_dw;6!lTtE>6MaTRVgKNCiRx*gQ1@PAJ~{d7(|@kBa0I+#Cy{xDKz>eQ)3qfyqbT}xhG9_OBWF0*IP=E^It z9OYu)JsdKjfJM`ax#N}X`uMwZ`0}f zS8(5j2XN^_>(E+r?*#|&={w)yk$3ihnA!jA3AAjyp62xz0_iPpJNMMCb!SbSZI8;L zy#8d0UtQ8m#UzWGl`e;$=_eHFf9ARE@)$iGiW!Iaa8jBZFX&d|AgcNfc7 zq&fSuZ3qG5#@cMDaY&{#Et|&zaO>?o+;mG1l@%sXA)VG-_3eDV^;Kh8cj_lvx$;~2 zeD;&O*OzlIYG=jjG*A4ol#`eAmr4KnwqCybqb|-nJIp=5Egsgk=fQOuW2ZoRVLn!?iqvF_{ng2%&Ap>v^@N?i`;PnyOI~w>E zP>I>EH-RHF^ExnOPxja8G>npGQRe?Ef%`GUS_QBXI2)r90z1w#~##VCi)0oG;a zR{^(U2qp#m6+70dqsKHx{dPe*9yGR!$VYrwQ6nZC`1LC<*e=vVfv1$F`pfoYlj zpNBc0f5fP$l9=;#UuKysuEr3D-^v`1b(os!A7}PGj}IZnR#|-H(Ed`T$rEi}d$yb( zT_5EW7qt1%(&+{{RqK~S|G{3vM zchGX@oEc*7EFV=B7DpU5xJ>Fpfzs*Maqy?-yxU?I-LsO`Uh{_Xjk+%8{_yV{JEMfk z`~WvSU&9L<+WN|w{_pK(d;`=BtvzW@zx6GGK1owF#f5(uT#4BgH-qrUR_r9?|L44( zI{oz1nKESx<>loZbIdV)({H@-MxJ`=DO}g(#v5KG{@_|#BG;=H^6N(AgY0B~i*IasBUmH2$0<;4y zwe>V@Xk_h6t68&h1Cg}HEd2NfmZ}IyI!QX;+~BX<(QtdLerJwfn}L4!t1IVrG`8I> zB4H(!!rHMjKx2!v0C&UoBKwUsMF(^XQg3Ytt-ZQuiSz_Mt;zFbVZ++C+hruB0+@pq^~XfN8-(5G;o`GxB6*?Oi5FdRZEMXv)2Ey@{W2@2=cH?sldb&x zNaV0tr0rgkTianvEnxL~(^y8?5?3A#0gKZ=bK=JRPMCg1@znfHO|J$oT=&fKo1S{; z$xyVrTdsYfa@J{IIPJoT$4$RDf7W@w&6#-b{VHHTUU$!PM>V!~Q0;hqgKmUvykc}l z2{9sM#xF*ZM6umx;reWfk3L9EJ^j!p0|EWz_(oq#eMg5^HVau2Dhp4@JN&}7w{~2y z@lQ|ZtEN_xQc&VagzW>LZ6cJ@1ATY;4p{#rttqyA*psSp=S{`&1@PiYWKSG#dlM~< z4O9XFX^{#Cv1U#sG`0$D2@@dUc5 z4b{*}N9Rte?SP>%r%%E+sT%w~(y27bXb*`UjWpNP5u5YP$>ry zkK^rVL^ZXbv_=X;rie%c|9;c4%FFO93#k;MwH%k50>Y_l{1cwK*vgK1rye0%7~`5(%1GTJe-1VJSpu5o0PU@HW+94^i-RD-UbZ zM8Z?6iFZfoT(^nV_D;rXi(n#+9wDkaZc93pBsjT@x!*mL$hdMtMhUq4{-ylr`ajXx z6_bE`e`{>gYq!d26YZb)Zci+w3ci+uH z2OY%x`NJwudHnIgBIw4(My|j9dakt8vsRNKi^tBdCy3hU>=M;g9@*?001BW zNklX2-DkU;afd;r#w< zW9odHn=kI=(?1Afz0XnH#oy@QjFUs$_~ZWL^UkWl_twJ~26*-nqey!2(KzQ^*v6v6 zgB(2ny{UB$+~3dL55xwMGIu`^L#CBsNRE-zBmYdq zfX@QYU>-FNWblAGi@PxDm?tm;`rcQzm}42ikS51th@Go} zhv_FR{(vFDDlsI?mFvP@Mj7LidqevMEGcxOa z9HSgM4nrDk!1(?IG3WODOdk%yoacub?mP4V<{BPHzcI`2YCI!6~NM(xj2F zu4#Bh-pgD19~vK8KC-pd#+|(*PTw22|Ni@Vn)~Dn?^@R z2V1s`mZqBZ`0&63p*_l#M%Wfo`l+dJX2Xs~UU^)QMib7|amdV?NuWmvJWPU79-5FA zlncrJB0!0&`qOnXX+Tja>29nSO$|;cs0Cw$g^eWHo0MH^HU%5CN0E?}ViU-Cn54FD zC8Q*CwMAMBs0A)CVF>BAMKL;$y4bR zvG%Tmmww@s_dW65`wwqwZW-6s&_*(mWIQ$#g%4XpvFB0HS5DMt(g6t4DCW(X!{qtZ zcem9vPJ8F!x3Ay$^13DUD>wS~vw}qY1#H>gW<7HCy_5G_cF5Dy4*%hkWz&1_&9BUR z+!U`#u39xPAZjuIDB1#L?gi{XNFy+icZ*29|-8X6W z4~8;SY2e1z4fi~eH?HK$n#W&0qhr~sP+KfPaZ({Xzlp?#Ornz-;Ahhhfxs#(AaBt@ zgcnc$s+;CH;ieXP36*bm`n&BHmfqmJ{7zAhB?!5SU{S=&J$C9%IwtST3#JxYetW)U zeI&5?&ZTEJ{bNOBoIeMdA0hA9gJOaC)mQ6Q@wgXB9OO7ofgKGb+8%!C2c2zARoEbH zACZ$65IUs%cGabR(biZ$KPOsUQvK2WJm(Kjf2VtOZF#PcxP|%nkDNvENpoLIZBAa? z-mvrFl;`GG9DQJW?;|hV)Ujbpah_$PghkGj@f4o_k(YIk{FaJ4ho;zS8)^f|99n7iis-z}_C#vTX2Rf=ZqGXE0`P~!?H_1nwGE}Q(9<##=L)y`Ow@s{5h z2D@ILF*iW3>*Ampzhr;%#+LN;y|ulYAK&mGon8GV=t?Qk-qFMPU$}`kmi`RO?=xz! zfS~O3nXF&79Jj8Sy*-qjIB_D|w{L&ngv?NM#vNiQm%{L#_c-X295$(lZ#=lJZ`#vq zTe$X&8HD^6@$?=9K+QX&lEzg(qjA+~fZDd!yK(um&K(CX_Klc`IJ$<$U?3p_5H65e z-{<#@+HEeET{5@>2kbX`ht57D#3lbv^3JOCh@{M|zwc$?!Tw#g@$oZ4Tys-59i57z zLdk1yrVzlP2L_0CkGxa0+g!$1+kJ!#Kyi`mD{cDAGYM9%aoF@$WnW2?5b&LEMELWQ zac=lk54ZoaXvDVnVITfous2DWD=~x6p|}J?5^UIu+u9vuBSLBzOlSa;nz^xdv2#nXxmoO@jZ5T3QJpF{r4=}{c=LfWZHAc}g8a&KX>cN;YxH$bvoS`@e zQyTVI=Ks%QNVfAZqzu42^eboHz^H%bFr1WW#1J|cX7;NJIEmdS6%W9un-0aOWa=@B zobO|f!|vh-z;IX6eb|T5P%->GZp+B)Yn~c;k&X-n~IB`fFt{ zo*QMZM}g&|S_J5pintIYg+QT^qwxS4ql+93rAkrgDwAL$Y}2;%f%Yi%d=v?bab_;I zn?`64W%(%=KBfpCQkl{s3;NSuGKR2zAu06)N}G6U<(VXv3HUNX7loxgY~^H3JRwi| zL1#>1g$>$-2&a@oG}?}ib>U^oCqSSEjsY|#b;k4XTo1=hqb10&>>fX->W$gYja{;? zww?)P#kgBNQocBza7lX-Ym|iBk&x<6lBny!R~Eo?jc7ElBtSssq5K|gv1a0)Ys^jd zbTl#`eQDe3^>XW4@7!&PUea0-LNG!4sE{^(1o>K!lRf6r0&f5}E==i3@3tmZ|MA(c zY}~pt(y(=BcwAg_Bta@X8{ug@%a3*?tN!wL`<>TUo;G{##1oXTQ%+rD5Wv=$awKW* zQf1M{IZ25Q`q&mv;6%dAI``PuN)McLaoPUoj}$7P&m(k!PVyu7WMW)UwJT9DHw)ySn-?*`1dxJRk>x<9w)fKfR{;rC& z(&%K0_BU6_*a1}sRv$Cb|J1KuJiTq@mi%*ma^7u;NY3gW*ZGL{2T{>(Y94vpj9YUh1Td~lJyTfO=a%U$-J`Mf@RMwyRm+CqnJ5o z#{cvGjr+vPhFF863Ll|%sMWAY9zK(Ik^!sq=Z8GLHUHl=Xrfkh1&D_ zyj*q%j@EeL9P)}Hf3MqId+5?TmM+-ufc@^NUNG^EmX}s6sa!a#J$GjLxzRV$mqc^y zh2_02cE(?*$8*6Cv0TN5C*Q&Ew^tl`{GoUI{!(;RYiv8?{b7XGgJ?+&B$Y>#)EqRc z%J@QM@cLVuNT)}B&$GR$i$$kgiEn^!jMfm{-i9xc#@8+fm1a4W73A+>^3t?v)41Y_ zD+mMvNGZAW(&3L)N~vP{pWFJ8>KQe`$Y%)(Lq7br6Z4NN7+nmvo6rg#zA4U8X9q?l zb9y?|ConHN2O*svuDo7+bdbxw*U6?W4vP*CvhZL(e*ftAq?$UHj!wmxs*#E0Yj2A3 zolEm~Ny_9$Bqtsh|WZ|?m%M7fgZpl zCS8j0x*3WXhA{XpW*`2_;Aq=+%2M3AhYe=HOUwYG}B*Z28Ix<9(nOm zQMZT7|69QG5H)q~9=uNaa3GcP-sfZ1`$jp+UChR3hbFfDXQ6e=h_5$Y*Y%}RsXZ_d z**&X0Y@xP1Z+4Yv>CP5*BVNg<;o!_0b2-8?$-)&e^e8udu2u za{M8>Yg!>MkDTQ0m#`(e67*U-De#XW*&V}m6nV)pRE?XcL_X1#Z7U01?J;JzTO5GQ zImlBAzw0r6)>swz$c(PQl!{KLJ>jUgT5{v7Hjjgw5DGp~ z5-EQ5hreIfbk$Wq_7vB%Hu z*%|jd;p8fnoan`zO5LY+5G0y*3TIvIG3v`vp~#s1t4lU6 zZJp+3yl|w}i1sMk?tZzf>SKp3vEEo=1yadg(Hn17LQG40F6aPQlAdT64S#=o?8Iqh z`8yk$V^+YIr&BVR=uYY&0*Npsasp)uO9!&wx4z3rgX=&}U{v*t_LL!SEQ!(@E0lxX zp87}Arrv|Qd%71SMXHdXZ>sVRb5H)EgMfOqOJpeTMJvY z`-6I2<&4N3a-#2C>GP2k7_;AutS5V!3cwNqS7$S-`jJXGs8Pr_tu@h}1hzex?2b7u zwpLg}*7Lsyg-d;XJwN^FPpPb|(d(Q}z46cFr zb<(#^CO%pEhpR7y9I?{JuQkP#89q6qyuOV9F@jZ4$3k4 z%ITIK3M&uBNhGLQ-@vN&9!iTk)%ft_zsBm@8)}+5E*|q<_4?Y&MgifA6p(xJ5|vX` z+!-hfuG0tWTlB;k4cl@9Z>Jw?@|p8AkZ}{k5_M`-n%>N9x>>vQc*ZnV3xU=e<$?C% zeXB*Va5I;Q6a%gmH84qPB%dpdLeMTD>ZO@}_=2rt=TEvIOUQKA-Z^2%Q*}RCxpeud zTi4g*cDHt*U6#+)~0{{Cw&m^=G74?T3&@6I~w!aGxmv`i;@f7$fH>p5dw zozZIT8kVcbMG#xHt*Uq8j^hvi_%ZjAt4mdV^5mA+*X0$8jEX{Q!XC7|w2H)xiM?kY zbIgNk$x*ls-Ba9}rm023?jsTNq(#@J8q}saOHTRLnK6}CZ|KIJU@+~CiTjLtNC-im zut;y~s47_yy6EgLeB%3dslUqdiBnou?3ia+J2J-0f;`J+``eqC`ibLCJoCJxe}%Ne5o_%zNN?^q=JX5B`F5n-qBWLfqg~fsc>Gb{n>~5fKLSdUv}jjZKwW6U-h- zDa`$40BMqgV2qMLMHt4N?bvJ3m0{F4R>cAs&yjcI{f$u3gKjRjYXN$tRgOaU!*~{qMXi%W7jJ@5Ml5 z8AgFT3@>bGq%XpEZj*V0@+ja}yN@`(9PHgqOOU2jwf3HzVr@y5O1q-)!w z>6GS`N0U!3{!HK`-)@i=BjN6=Vyt*6%{5QvlUp!)8_xfX&yfuA#|#7n zmw!FN8bg?T6+_s(fO(n$=uq^Rp!hLy*o=_$}IO*=HIt7{reu~`uYZ@BxqL(iWXpC=|x3m`BqHX+Y=Z= z=8^C?hDe!~*|*6U51F%fvAtbE1OH2ZO4go`aVs$Ds?TFeymBxEVYalY4nxWuf+?e# zgfUvae`rJhi8$-@@R`?sKmUI}=zjdGar3R+-?`=X-e11^lK(Vlb`{B8GUYa=EINH? z4D7!hYF~}hw08W^$z#Wky{Vv};Do)sxiwu0yE3f%nO-5tzFyYCLTF`pmE2sUFNpB@ z5YjdSAz_kNv{s-rN_pTqc&P*`5d$}6)>rAiHb*SEk#@$@1BSCE+5cx$F9RU}>>8hg@g?v0aZXymb; zSogS(jJa+7Yny-H+1$)@{T_@ZGX}XvEn`vJ6D9rA+w2;hp4?Fontb9pC&nwMmwY-I z3DoyWZz5v!!GX{a#U)t~=FE>C<(1E?(4k03`=q5UEOb(%VhU0kH{s%?6{TO+i(Kp82uEZy&ehYij^n*50{))2mH? zd+6o|BB{1^CW`>mEkC(|FaacPU9+g${?y!PGv^~2FZ+jbK10k?{*g5%x$A<7q!zBN*8mqQ6EX%@2JFhoT6bMsz=%F}T zkwQ}_1$hXPFK_rnVDXes2pu8u+zzI=0g{IuN-*IedK1{OIQgABS$oT$7f!n9*o71b zZ{;(qthS0m#*`j{r7VI9CQFIdS~|5mPx0kWKgBN#*t}*v-Cc3U9WV!fcbYMNiO*-L zpp>e7%s4C!(r2SBiI+^`HnpMSL*D2QC?k>qe?P~o6d_Mx9Wv(YqR2YVTAw!F`Rpf;;rI8xKs4I_9;hG^ z;x{*csqZ?_TBA}PwU54vzqJ#8ATUC?*4_~=4o%McAQ4M>tg7#3(ez?g)|>OYXj(CA z8++(ZzDIk%2@7)B@a%W!+V&WrHm`BN`q(Xr{XTYSXpdi#+c>d%<6qZH;ieqoe#U(f8*G7O0|1#^u(`!3tu74F6mdp9w7 zzuyf>;1ig{r7vPUecr%$%78hyS7WZt%@~66nfKApe=7uR#N>(g-u>nN4?r+Ds>{f~ z0fOVHo__-SowjFBJs$*mcGl1|+#edjVBx~O4%cx|s z5BwvkZ7@%uS{On_SZ2O*!3uyJy!jL{E|w(5yjpDXKk%lS<+C#>llSW=x+( z!T4(2WSV$)H|1k1S-)m28)|FtMGELCFQGswBB2n6Oq)tqK><%KTb6(GjXi%()iyH2 z6O_HD!C+QdWJayovz*Y1L@Yt`+S**p>y^1yeoh1{lg5=f4lv;Onr$bP;_#!6;^0#b zyVn{Md`t>wiz{jENU7NL>3Jz$TBlf4DZp<*aYVQPR1(<@7bT#s8mNUmNIC zJ6Qp9F12fp_du0X=6c*|n`EQ?FFAEn>72sb0UBTX?feywzH{#@_x?39Iq5NhAOTMi z&;lzM$PCtf6uB;qOJ8GEXV(RBeYn50p!A24nW5iK{M6BBuD|i2+&o7UMuN8s1yU%7 z@R%~JZFQ{O*+|2K4U8!+r7D^rABimlp68*Y#6No~!EHN;C1Sk&{EJw5IRtjJQe^uP zmPJarq;qWYCyk|}sez?EjT9t03Fk^0R@G1*3{y~1hR^RO*AwIx7SLQ@&(`{G?8Y68 zn>>l_wcGJWyUEK55|2c%i~M*cIdsn|Cm2t&><=%I6rL5z%O`+^iYG}1a%k`EA)Xt; z4cLfyJ9_1EJS3@Pikz-qWWvMo`SFAeS|~>g-Rp-?G>#Qh83maJkyTO+z7}=dls=l$ zCiAVb5ER5ybZ+aN-L-Dn?3zD6LxE*eXjx1S=HWm2U<%JXwA4*FV{`qXtIFohzRsy> zqI*( zthniMijUooP(=|kVDssZ9!hCA$lVYBgVxR-CRdkn>E}*lQb|6|TbdAQg|jnCboo{q z|GJz~+m9_RwAO>kyCGl0ii!#rE?mg?@#7IfaK;&D0PxsjkD-*}YhU{s>({TRp`n4I zq9V>e|9n=hTE+J5+xcf=;iN+5j>%*GxO~PI2KoFE<7nja^+*ADo}S1^Ut0~tmTWeZ@VQGW$UshotKw`1G zt9kpmG~FHMz`pg2LqVy_0mu0Xs;$|0C&vi~R({@9$;H{SU`D z?W7RlkZEV_28S&*F0*I6H+$!6Z|>&kBLXZq=-o+>OTQf9=p%w0vGCoOeR)}m;v&h+ zX{KL}qj~E2WM4m*9FxNV`}w)>EA2dXe<_6-GvuqTjk2Z2;lVrq{U3q$VISTvDf3l^ zNDYrVG{DDC4l!rCkNr<-Vu-`U_b>#(P>+wj1%-(}9*P)du%5*?cG1Sena@BxlKE6) z%1yQ~xa8!Qna^mrmwuz!k>Fs6i>Vl|lQj$`0~AKlat+2yW-W%S7!6}EX+_1D1f_wc zM^9wtPsR`f!{b%pAqp-4kc)C(K=A79WPnVJUnZ?gBrB0JG%MLU}{#oWT5DN$VJ<_=;z`UNmeHYsV zvu{K9=T%@L=3GV@UPkpJ3;|VvQ8NvE1=Bb}dmk$F#x%FwW=^GTLs_ZCA@lu%q6#~^ z6u-M`czRD|g~g}OF=O*oN^{>sF;=X05W*xkop5Zhubn&Y?WMJC_(0=J7v=KXJA3g) z(QVl_Tz1Kb0SW(^D4+BT4mfMjTeBcjP|${eEoQCLVt`lfTSsW|eKnqpQAwjrBD& zxhc9_mz_cpQ)cjEDF|vsSa}EyF#+vDGT!qDBbg-w%#=Ptx<3_#OgWH)N1JW235Ojj z%`AVA3N0!7|LmQ2e4SPO$KU4}cP2M`v`Le6H%$kHmQkRTGGzz?1!PYFm8B>msGuMy zQ)S3d*~;+8UQ(d6los03MOV6;q}lT(cRl0${x~jyt zOcGx5Ef=k)f~K?7r`N40Sss<7a6FEKyJ`y`E&9Uq&$i~$pzAW!brt22^h~Lj5)XoO zG=}P4^yTG5HdjMhDyHkwv|=5ha68#nguxv)Mq`-t(h&?R9f#i9MrBhwVapZU%C}Oc zdDu@HWbR2?ORwl`ox!d|+kZS`$B)KSniKOCrMwyn1SYP0KYqP%`eP7Ix9EB3Sl&wUO>#&7-X!5^Jz zH#C`EH@OZ?sM0viPy_2OBCUJB$26!GkTrFTle2%}g`vU=8@DZbG*Gc@+us(v@UJmb zqLKpLhp;=98xk2$fX4*K#joiU3&Hv&tGpY$#>HtPPdw6FARf)0FvRubWKmO9!!ThW zOdVn|(0dHTye86dkfRF8y66Pb{`wY6S1#ko)2GG8j67)dwna-PiGR&QCM;sEOQJZR zVHci+?}JZ?%v;RFlaFG^w9!=0T1xfHvvH$wqD}&a3?}cWGOAy!WZ}BC95MJXIez+q zFS{ARW2@f$EG=49je)?IkxtoAGk!i)=J9Iz52gB!MU;GWl5`$hTZ&DER4Wsu!+C^BBs5 zCW)gA19CDTX7R~`uQM-M28IioWi!IoDKi74y8>bfq!8fq_F6_yq^GBI;DHAM@ZpCa zc71;1jW=*zm&V3M&N$-?d_EtsSd7Js7xTdP$MH?+Wo^OAdx0O_%!EN6jg#do{?gk$JL!L38~A*JHRTqUU68^lC-mW&(HN5T&18QhcEsL>-|rng5D;!dmHO^ z^8G+1R{dc!0~^M+vUB6&Ms}Q#)Xcyo6Ow`bZgv$322Nb+4-pi}@l~J$XP^kMm)LW| zU56c~ja9Sfo;Ux~2)DcZ?6wvzJwJu?G>y*|C%E+LCLXyrgG-pdV*s?C)br;wJ` z{T@GRL@kH>kdK9%Te#x6<*cr5=c1`YxNqiI znj;no+od4g$JPJ%lBecZ?sRo$P9Dq)m+#M0^DDXN$)#V{uOd4;o4fD6o3gSp+S}VP z41Kf{R<2yhrI%j1^98%g4A%nI*b$b7+wcs|B%`R9 z(%eiA%t|5P^WgFN@Su!+HNbWqVzD^kaD=9sW@@)Ju%faNHwdNp5x0A@!O~%Sez@n$@sRBzDyqoWY-YNGkTCHH4HJQ(2}F-K>s^`x z%SJXfLt}H-vV2lfrg>F^cmla}6&shXLP#YCJwgi*&`tb~Lmf|Lfmrf;)=v4CbRA30C z290Rc1~fTwLdhHXWtV&=H~r1GVNJ_JbDny4LS9olZJI$$#*n6ljl_?O-?7kQHnrwg@?d}G*wM<4b(vo%Q0;RngaPd=xvvRdTERRWmuQ&r?4La2nUOkct` zA!XTwo6f2q(Ke&mn{Unu22axCdI z`AU4jLDNQFSNrCCgO+w|;o|55bGYZSqt5u2ot~dRZRpUF#+>}%?V*xsXP5Z0{}}sx zwYRyw4Sn2jQm5vBc4Xx6xr4H^h8OKWq%BxrK0EH{sbkmIHr^AgYcX}xOUAIm=%5)> zUK1hX_V!rI&2df3e)+w{N1iZk{2%r^X#cx6Y^fU*h}dL@f)s!IVEm(VhdL4NjKpdt zm%qBHa8OqMttBT-IdN4@olit;QglC>rjdm~htLTG{Ag$(B+_+}$#{6-^&oWRwImY> za3q+z>If&%Nn*&BW`vX&rs{ILjtlVwmX)BOyDH$wvOwC80ZPRACBye$1zDELyAwff+34sZC5cq{g zhVYPUcnQQEgxiA|MkX(ZzR$=tYu0enO*ajA={@`GvpoCkj^0b|8J_>VYKPxHy`Yk( z7YzLD`rUiI?ck(@`)6(B{#m=z)!qe6Id3ej+isz8!!LmP6>}2rG*tP2kX@iokn94D z-@KMK;OrOPw%3KCU6}V?9!beOkTSo4-tlUe%uHdwvE759JARzbOK(SLZ0^;Gx)7CcvkO_J z`|uyYTkJRj{5_QV=9>r|I2~2Kb^CvKTfWh_?y6MAm8!S0Kf1Y@yZ;pKB4s*p<8>iQ ziu&H7X3dVVX^Tz$`hp(OjeU|HIpG*zzp9rzev#hwxw6VZ*Ws>TrT1y~KaY%(J1IM{ zU(N0{FRbLnMcW8^b)LI)63<;aiT!V%OGQ(ZL++Z#+FC`XUwUW}kDfPy*Ot}N5*fIX zFFVDA$aSpx47n-YY2zKj2bnH#~**34I4J__S%wMI16^G*Y^_woNP?rE+7GNYt@Are$3Rjv%Wp@x6+C=*Sx=SP$X`gU`OQ*t+lme z6c1v=IfsAb$@KjoI3iod8lqF`=Wls_+KHlo&uzQ)xL-*C8s@ zZz?J(-sn&BUkealPl9*p}L60gh>~)ryf`T-=dg zR`M)B#n$#?KY056)3gnh1a%KqZWd0^Ph1B_*NF>_4%AzLgb+B6i)&eQbaW7HsAujw z3m95j5--Rd_27_+W%KhV6kb;T#2d%Q*KWku8Qtz$Dvc?gz?Cj7Qd*Afd?GBZ-dh(M zW36mBwN18OW;fN0(xP!Cs*)00N}LA%qNTdR^&|>fmTnspd9OCTrMz5p#A4vuNL|N9 z;%=&WKjo0(vC|GZB5GI0MnyKa|HBPid7%*_wP0ZpX_kXGKZG#F?1B>uzAQMlFwgCX z=X9*;xXHEb;e{hd8stYYh8AEJ6-rb1Dz~kxOsn2p@tv_pPyBwClw+J$dv!2tkaxt) zZzI|wqt1U!8`+le(bW+^1$F_RowK;i(TG{C*W4DGGZ5rr4FB!Ti^`a7d zen032c4aM2TNpPQM!FIijf2mFFm!}>$EpBfY^S=4C&17NnFeV)^YqycZY)lx1YPzl zxpY-&p;B~dq)H8+6yyq>xCV|;ocHOz{Jqz;{jv-L%Ep*GEv+gXtW!8ZWcNPo!+$gOl$4pmc50XOkjCvl z?#=XOrfb~tgEX$cy_cXupgcsTvbWsA_F-@02Rr$GchZRd*N|Y(4TAS!4^dQT(7YRQ zg^7g3vLyA5E(L@3J$U;?YTikVIc~~85xbq}h&w#_X(caTaR7!U_+U-%RPEQ7*YLyz z6DZ2`?~s)F!&znA`~F6zl%!#N&99~E>+5;>HbCAhWoe(~7h-^YEkps){YeiBz+)aZO|OOAo*DT;rbk>YWb(5AGj*uOWVn|8-%JsB9WzHOO=%m=t z{Pa63KCgId^~0|TUnGi0_M}ck7lE<;p7H`Yj*H5(YV_!Q39BM|VK? zBu#L?LV1JGx;=QLqe{~>orH8*wzYz7IC#BY#`;t7nI>^*(I#9n7(gS`Y4wsEL~BBj z>1t%EupL~fQDbVfIOc; zBrqtKw6apN?9$8DeDOu5k+k-f%ZzjTF*W*~?>#Ts-hke*(>2S`7>FqOZ&*v^;by*l&<1Lv}1pOt;shkf{lV$~XpcwExl;_|1* z!km3tUw`29zSoGq$D5NAkM(oiRjHhKoS%u~Jd8SE8^_M@anNKh#~;pefrTbNR^169h-;M%FE%vJ6|xwqY2GZ~ zq=I2-(Li-tz-f+>E;ZsvY{&IEmQ|Kf;(w{2&3E?JHCs~GZKyc3Dca8X+`-b7agQ6b zy?G{xws!K{q6E?KNrPBiQoUj=>oQUf${SJeoljo=SOgjx8D@j%sb>+LNliV?f>kVd z$m!`lW8(!%5;g`P*h^%b*0~QmwnIs}gE*4Ic+i7;RaZ88vz1 zikj1gX1i8Zi@$xzra=vhSEb5^CXp$%q=>5T`h)~WN)otK;82gi6%tzmN4l86%8D(e z)6P2dn!!gucGtoOul@Vj1IkWz7Oc*W*tXL2Nf%_IdqCX}>Z}AAMS~bJWyIqdLoaTr zU-q|?*MB~5dU0G5&`q?cP5q{DYDcqmRDDBzsfiOaEXNflnlMbS@Mr;Hnkg0posLM8 zZfMaVuI}^JMT?BBvH)0TCm82*y+jQ|$!mm0FCte$eEnut-25Ej>RNnKFj)8DkswSB z{K_O)a~vX@D_HaV>tk9fs|eTT2lgV*2iPZajh5X{8c5Z<}4bM(G+Ho z?jsJgZQg_vP0(Q{sB3S=X%FLQ23|*C7&^jKsyTcfWGsP1zE#K%!?~TPjZ_-GhoaOJ36=Nd&sKG7;DG?(0O5oUV7Z6Q-HmbO8d2 zLa9_sd()=s+8vc??>21P?w_S{+!Z)&|4q->{^8g!(^4@9pl~=N%z%DPukUj?2lR6Q z9LFWxO!?Qb86u%=>M!s#H`fe(JTKPtb*%G$7!jd!5 zVIRJc`0*{xxGvN+I82-Bl&OLw{4^&HE%R}+ets3>8Tl8e(lPK zUm-7S6V@cP;i%s5uky=Ao;L2+xf2JE6LF4R`__`1-+OgdiHoFTYh!ij(EW}*_QKO2 zXnt|-754k{yTll#3(YZ$XgK0`nyo|Y>gpIJC0+@=%XD0j+mC%o zajfLPP)ia;yAy_&G$-!jm3-h@_)3d8@XoX6>QcMDBiy*Ia8QQipc1hqGbcTN#E9F= zUwGq^czqMTu8rx0NbUodTItXrZ4y!{pAM2<9lAj%JA=`gMmlNw<-na&e)xx38=k)J zTN`EY-f!A=5n2THbD9EKk{uGKAWcx>g$TRkmn>K?0DxZ0ed`H_Y}&8A9P z9(j4#mh6mQRQOCcE~GSU8{s%e=?cSfMM~TjnQ==L#2w*rB_+b7alxA6nlVEbYXW0*kGDUJs|-@N5e$3q9p1Y7@3ue7OMrz zMo8sNBRnRqWg#txkjEfUHiS_l@`--9igc-wc1m2Mbm8fe0mNXejJ2I;zi+a88k92t*8Fo4i?@OzQbxH9+^AdFq>Qtz%p zrVDPT-;spac4q1VdYgYF%QE$3SxRSVTIXlzQq`zsCu8HK(>n#sqxUiRonKQ+z2w}2 zf`UE!9Rr}XwY9dPq2V`uzQ`JW9@DQqXs@p9>%fQi97apU!9b#N11+at?>YIx+kz$k z&P_-}B{v?|>Y`Fodm-SF$Nk@PIVbOFveG{McOn{-9CTD|40el@5x||mPm`bHz;u*g z;slh9!#@0*vAd*95V(8$iTB=|j%f&*TV0x4dw0x=3k;4v)W=CP{Ji;LwC7g^z>REY z7Q7d5I4TutXEDqJVI=T3;IO^6MSBDX?RmXionaRvkzy5^oNfSJ`Em@v;`fFd&uE8LG+^ZB$ z+F`Bw@~SY4x3tg}v-$q>E7;Q5>)ypt!i0tFF3gkCHsj8&@h1 zs&5m;4uBvkTow?=JFbY+e*RrFvwINOR$t3GS3S(Oy52!>LcoZUEFrcVV8_A{;;{r8 zT5?zj($LXum&BTymdR75{`}zS(?*%YJxk40tt2DecZ6+OATjLJ(7B7>S#nLo>kE<5 zC=JQ-rG#bi#$R6cdFFin+mxX>=VfJP-n-wJiQnHgvF5GBn$5Tvp}I9IZdNPp(HnSsd7-=QV zYjiMr_#AYW)a)r-8%NXG{AD@Ye)P-?YuuovxuXgjo3=%^#amjNbidCIlm!NdN{7?Y z*o4pStMHe&SV)G1G8i|a>3oLC;TQa9 z(W0MR|MTWeTYkTxw$4*(>zG3CE-8_co{p6kl9r%{(!rT84IO%Gta9$7GynO-v-!D} zBn6k4W6^=bmPl08SG0+B9zzodhPy64LzxZhx{mJg;Fvmgdz7HiDU>GR)()}ev9~h4 z(+@m);`9US&FoOC7VxDx(ROr6(toE@IU&i+8^q{eok8mtRWv+OLCm($6BasBo!0>` zx+_V|&SJvdmlIvGo=p$FO2A6s6DGpvQ64C<1hyea&&*`RF_RvOd{RAmGpi0VlNu{m z6KJ}w+6zH&)Npc7or0d`A^PeHh*?P6LAnxMQ)G{$3kCM?mbdu>t zLPH?YTowBs&?Uw3@F#iUmWBh{#Yv(yZb+{IUK2+MB94QIB$(hzOw9npq#!+y^n`}A zh1Oa0WHAyQPJS1pqSJ@p^}E?B->9% z89DzR=(OVxqDs|{N&bH)>O86eUhlE4n^8o^L+m~&)6T!wfOryW-|S7K08OZ5vw=s# z-yjqY*16|5>0EGSBj?NvGAM7)I<$u$;>B@PvQj50^Y21Ny4J|xdL`p|^b4_vcwx!&HK5PGG=ZpNiUGqkvLaj>Os>cXts z@bqBlV`3U`3{c7n?p! zHwmCoC`>|{(WMeY6Sx9e?AU}>D;_m8Q+Hf}?f0O0OtK6QDPA9%(D9}Q$(IOC3W=uU zbhIFo-6P>KRrIvuDs_zCi_kUjd6DsinilY?@}{o?LX}zeiky*7(hDeg{^&Yrf;!tF zECjX?I6f~jBNgfQp&JGs-M|n!Qc6tM#bYNBmP527N=I855(xrQGDu2{T~zht=jT&a zR)){#>r+Y^3jLPERp~|GcC2F&(I?N~Qo4R-^ zzo|2+D8&9nY1D-i13vRQVd{eYhNLmMIE{oY`OCcBjKfaN)5#lkHVx|^0NU0qwr_gr zp2)FR-j}jdL*H#19Lg8lG*-EM>rx+qQ1AU-x7A_oLYum+E;G*Yl9Bh-&oRe=pWW8N zU!QHKso6!>Vag;g&pwvL@Sz4D&x`Y&^OSkN&np-)%;4g4Q@HqCl?HXqjm;!1$)E4b z+@~VyHMyE4bMnc| z=)GU>dZ3Np|3URH($h4?jyAdRx)6sS;^k+zwNO#%@Z95BUG1;9zKOTqi?Vrn0iD9R z7hj3+%R5_H^Z6iNe<#XC-*4pjqkKI7M0Yv8>%#b{)l}CyES;NAQK7+{Pve|=Ztw7f znWqML^!{Dj-#fre6d|(+H7@JyKs|xt1s(yOL@8$W;opeeA!UkDGN&$>hTy)NyHiVo z{=PTwU_eb9USx3fg{j>0c(2a04>fq-Q&mfUSPuNE$NwQ9iW)!n(&<)>HtJFq1A`2|$@*>sd@W;(q|nOEuk#(QdV zoeO$Qn}tf^>Lg`SfK!2w2Uvekj6@MV6?DgTFQl*B&I^n|k#uc90Hs2KT{|zbQ3O;2 zJC8z7LmlHNis;&r<7F<2l-fQTyYqOYp_E4v{=2+Nz80Kza)3MUZ{x1}+xWv>-DON~ zzaQ&WzU1=>PCnkx>+eMQcwUU}oD^X62$QO6n;UO!p>&kV(Bke}+VYhaFTL7ZtubSo zkF3mZY(8QtnI-3wS+d8)(ZyMQKK#)k{Ne%mWL0 zegDJ-6EHOGYmLO#G>w~Xx`{Dk#&G%NmlF<$cRtfV*iL+*NlA*P;j3+9?o%Ie?A0d` z$V>qpyn!HReD~XA4;swv_rFF%Q#(V8vbpn?a~L~b@nBL)tVo=Sr5l*@;%r7@kYl^5 zEJM0zj*A(NLMZq2k6wTK2b-$4WSn)?cTOI0_=F7^DVgM$mFV?xzo#JZ@?|%F&rDd+ z$#f*L8s;oBH@-a|JSK(vk6u6GgtT8Ay3W-dSFWxP*ZwG8u}$;3U}(nZk^7Ijp`>W& z1s$z5Gs0VH@*3Y+sn=|(WU%8Bv|YSy5s%d#4wXoq6j$zuTG;{Q4pcI9mqF|?k}MmnCShG*3m45Fpx891vEsBwB8(P3s@ghO*|?FZMo>KoSe6LjdPy=$LPF-akPF-7$X=MD;ObcEe)?{9qO|o>Q z`yOe>V${64P(?wzF6QVWf(J!U zLNUJ?ir5`!K2IWOXu1)P>#f@&Xi*!lrqSW`U|Z8whscWIX>A5wAiPPk#pgvvVjzDU3Jw}TyVh!G&MD0nr0tT=9y=np|-Y` z^73->^Ygjpnrpb>h8vhafBr69y949+vK-EuJeU_3S2H{($gfTs#rnDqj=Fz7mLqxX z2a_3J5F%l_tf^_=DJk>#`4c&LLLN;W3F5Z9`=kuO0q2y`u<;IR*IW%m%RjfD*}B^K zby2B4;B$H2D{=0>qMd?~I-6G59Cn(AK&bnkw`{h>t*5tAJl0_2GMkAeu`bTfvLxYlm%4R@L}QYV=Ek`6>L!8#!I|F)5Q$0>iCvdX zMPrg+K=8!V?Y&5ur~ckSz%OWR>mFKtu`I!~6KeU<4??{D_Z<9w!JF?!x#Wk9w1p*C zUaZnO&%dIP!UCP@wFQJyHMUmTyfdr&rAZ_r>FC(;%YctQi8G`???cD{#A1@NF($A7 zJ%{ENm%lvI&T*&JvEtJ~95B(t6Hhm(;Irhc@4O#H*9D80COBxa@;UrqPK*gvZvfj+#K4E!Ew2!G2{kxxPPRFV z?nv*=D3am`lv<+zr6TG4eiHB^N&7SufpZ2*9h8?`@2^oMKb~Zp>2#9-mjU;o2!~Ai z5)adWXHbMn07WjGg(4Cr0slgk7afZl?AImd38Pq1P%+m4w*c?5b1b6UkaKqOw|C+Q zRQcFjsD0I*oVI}81jCCcL#gcKw$23RCbw%Kq$IaB4W%R*hLYetj4GqL9yl=B_9)bG zS&t%}<^o63tuor#dGW{OHdUd>wq>XrSbrqRxxoFv3KY>;ggRgP!!xKGUN!36nw^~A zq5F8enB1m&fxquyfBetE>k%A1-Ph~EA_V;I)^r|tBupeK2?SJ|SKjPRsAOhnoP4~W zQ6mig?+urWzTZewvwEmaKg`EpAI$3NOdLGL%cd_y6ym740M@HYWD zBk$nA3rBsGMci=AaEdbhTs>nbSI-#QHT}%T7Bg#g11VmEyG|=*&blVHwftuS9L9_p z!>Om9N^^5F&ph)?*YuA+{+RpkzaN0_e)qeab=Fy=rl#Wa`FQo!SJ|{_6W3pVecuK4 zcx)L`q5~zGhczEAqGoFy!zTgP6 z+sZ2`|6(1vQHN2|gGV}mQbK4_(h+W@ao&ob<=3?tW<+D_qaOzBk2a3Cs~ahj1|3Vb zWJT)2KNbbPu;w-Dtwb!XwXV*Tu7h3I#EN@gC<g=jYCaHXpJ==fXH4Mqp zsxIG)ud+ThZ%lxvXs|oz@Pps>>qfaR+>)4@n(p%;%9gEJJ)@(gRm=7G8jZ^8Y-$^~ zQ|PEcwoeGkgokx?jg;5bu`5=c25`6@Btt@u?PB&+C+VJE$_E=|ygYblK}BX!sD9)8 zt%uicsVyF+dGR}HkS?S~+pcSB^wl*C+k6LSk|#&7Lk#t%z?F2NSi4gQjEn(bn`*t=*0y+ce4OI@; z;n-9rV&qL6#<(A!NczyhU7j%S&iaBM-0&zZtr4V@y#235{PE$}c>Bd)P%?B70U*6F zgS?4_qzoO*`bXX%BVpsST}3nvfEQnUk-z@+uS}gfm78w5sn7SNv|@gEWXYawkS`4i_B)x{t-pmx_4?)Z@BevU>yA5y;~If(_gi4)Db>@ zb91*(;LKA4R8%?q{MRj7t3n_b0gZ$&uegn@{XP+Km_9w9}Qs(1%ajv}oBQXro<)^rpa4Tvoc?ko*Z2l3dWc)tVSZ<(~_4}}w zv8zXV8rvCJ=I7|#dR^}b>|j9K;s2>YjbC4%#^pElx#>Iz><4?Squv>&pvadFl-lPu z)Zkm72Eq@clprRGpy`Q+Q7VkXPy^?4Q3LC-bgLnT0pn2v>7OT;xgY9j`7COH|EFZz z-y}bu)MFh1V05zm+rU-HS8}9xqmJ~ zrFxydgLR*TI%mhz88@;EnOzvepdv^?uuQ zV$4XhOPV?m9(!QdYYx_)Z zkE>gAeS4hD>)#_B>;G1L%|BMMi)!~h#->f1xZr}m)={mktzDmI&6>s1rM=ZUvDiQ) zQg=Ck4is88j%hGa_}H?plKJJE=}>MG1HuOCH4O(rkt-P`3?>O5nXU%7UFjxX30cuN z?kAra1p;ym6DN`&ymT!NpbN>WdGpOiY46`49sCFiH4h#Hd9J`KG@7$Y7oEnH8^qQx*JjtaRyIJP<{=B6!4@E03L*-vqmOT(}j;hUy$rEMYB)Ka_`G5NL@Go75Vt`sN*@JByC}BD0p~5V>pl*%pf~8 zy(6Pw(Cn(k^|MlmznxPuxge2J_{YhfRV=Av4CmD?$@F}&6*Q3mT zBQadZq0w+DJpCv}U2+(%Vfoh3a&Y?O2*rLRS&$78MGbIMatMV zO|C`Y!13h$^n~)tzkN2M>5VyBmP}p?La4+gDM5I_Fp!Q*J1$?iG0y+iMAAy~y9k-q zwg^}M^l_S7x(B|N?NHm$#`#y=$DH?m-=&1nOr4Sw#>UBM&rc`^R+m%hun;Ornj zzNMK@KZ|qBkv>KZH~H;-Z3O%p`;9m8cy_M?A|<^3PLz+{$lG~ipuI!V(IH7m(a6ow z89Ul!_9sdS^YOemM;z*9+EgzOJ>JfZ*Fkly!`gKg(+}%SYF>0ske~drg=?=&rKQ#7 zt$#(C_g-EfQl_cd;goag5dx-7^>Ow0QZUUu?qrPxu0)LkpV~pYN|b->Z75+tf8(Bg z_!_V)q>K(cu>HhauT3MA()$8V+3v=&y>bTNl9?$y_V;!cF7HLWm7xy&pLbz<_5@F$ z2Hv2`W^PV?E<}+h)06*OsFUyTDeDj$23 z9g{Nk$!)(Dco}u$Xz8cjL{!Pwlga<1C|{iIO{E7qFGw!?#N_&NP`&5L18i3v%4;Wr z+8;YIPOd_cS|d^ChmG1l-zY`QKKz@JS9%WzoKvzZO?TAsj3k@^2^&xynC6|#|8*l8 zjk0?6>K(SJudk=RzJ7;ofPVM|fk(nH%cWh{$rL8GFtJcKcw30B;k4{Avxd3}dL(!? z2uY2Qt0l`4x;tY!5O8HufuVsk)En*|CY?4qLxq8*(M1CIrBDxR34>h7!C*||}e%lfrZmiPwTf5{RlRfL|3|ljD-IuIcX2QxV9AFu)fVgz2 zGGJV3S$po_{JDY5%rzq5sgZu6nLd%B=^|ItwIbOO9Tnf&IJjl;daa|Tk*IKcksiH& zYXUS62|%U<$QfI>x;`c0tFKsotPzQk?(wS_ZRsGSB;V_2$k0(To*jzT=~`XHv76Eb z5x?OHhjP;Dh8;QjOU=?3H9k4#+AIe)>#U9G^WU1M9eDa7TLQ<7YUk5M6M{1i!aphJZfi?$ShLT(Iv7#?Vkwnx zjS&bk`1pgt>$}wsiYuBlc|?|BLZm~PV0T`|$>?ecM1;geV&(+UdX)VwSh$u%qAvj} zC9K_0%eT+I17o{b@7B$=I1TLtwQi3gfR_ARQZo0<*CG%IaLOsC@Xvq#v(I;~>t+Cb zWAqa3V|HcP=N?o*n&05_%{%IX{TpETpzwe*s9QS}$L^>qcXV=jzcUaH=e|l|*Z8Z)TT-iuRL^7ew?nzJrU->8)(3t9P(%rFz*O*;yJXK|$p< z^(21bZ`oY+qb3eHwg$rx9DRh3U;H%0!IKA8cJ;)ha&vS_NA)JMW=!+Z)am##l^_Muq3>2&bUBA=k3= z2kHZ;s)w6Vp)AoIH}Ap`z`?uNwm*7r7qgx5?E&LFTz+<6dD!+OOn)9T zng$R2GK0fr)^4A$c?YUYXzywBy3ups9)o1sr79na(d{z=y*)k(P*0*$>3ssfM(=&s zQ`Hbg4fOL-gLxZ8IQ7KqD0R%PY~S{Zi5j{|nL?Dh=X=|=>1mSNPHzQLjBf9e-NBW> zD%A1mxxXTG`^u!z?Flm%bxc1%y%zkepJjf4s&DKp)7hCs?gP|K;yjdD@Cx7xx>Y-! z$VBbap2w`OCUoHa4(b?(P^Cm)qRNp5dZM0-x^X>@I_7@{en#IBjGp`rF_iC46^e}d zM#wcBiP*UL>k_;D_ac!%-+8OA6?wSUF_eGM@E_ieuZH^d{l0#)ZQB!%?|o|}+qRKD ze{w)6yQ7yi4?2Q0DF`_(QaZ`VV;wXd*~?^8CL^RBMAF1oLnQ4aM6%*#yXRoCJsyuL zaftUOxeUON%9OQV2!UZIk`JKHM(VGwc}VH<1CeSyt{Px=!AYnAovwk@6zSr`>8`Nt zT#um$kv(*s*(>OZv_jjJ5dZ)n07*naRMvOhBzQmwEa~!D<<_C{)tV<`j^m9xjwW4~ z6i2e3?k6fVJZMD$SE4AKzUy>^V6_wFplOFRj+#2<(j1ZT|LmQ2m|a!f{Xcu3b8f%W zXEH67gfvJ(3P^9EDJn=&5v9BWf}%v4fC>VFQWRc5MO08kP~az>NKYsxKnNi{nbgT- zdcFOgvVVW_vO-yE=mX?dajsy_gfNg(6& zoCBd;%Enc*_f;qVuiNVW+Rmsh(<{o_d7c}#lTPV4Gb3hSV5{x-hN9C(9p1jBk)G>l z=2Tlg3zaT_fAKZl%oUry<+I-i{-1q0!A! z<+@1A1k2Q9N!Ec(7A16+45pzKGjV! z>b<)`D39)^UkrGEbj6Z5&d{W}<9fWgc(};I!Kls_@Zk(18m4J-!womk(9poc4-X!P zQcC&g9boK*H$2&Y{M1s^y;^u)-_VeU(JGL$X#9|&xmSr&wIO%gC z&ORgDW0yMoU_TdKro*KdyqV#eOYXHT6+?^O&G5s^ z26r!}@8e_oKE3C3?%@F@?O)HTwKh{G_HQm_vT7PIZKnqee*t#IH`s+%%lr)Oy!gc~ zEE7a4a7OQJ#vR~y>>*`_MLxP?-2)-u&T9)9DqKDs+_8PB8wbtw^W_smJo0qE%!nei zwPOg=|0jlR=#F?fz2rw!upWbu-r9RU?%=P%x;o-*c?6XNqfdj$b8;4;T>gXT4taGoA>(?z9W15LuL037Y_$j7B#=Pwqw;!7Q>(t= zyIRNNph*M|U45pzpC%23Wf@qm*ZZyrM!ME*^5=IZD0LW2Wa%}afS7WL6y>we zv4=d74JDp$$xrV6##P^(eE&C29_gl>h#^JcpKhOT2crIMfvEre@du2ZUplq)smjmJ zcyj&r#v|)nI>kswA^YAVn1Ch#Z4An$jm0v(wehCZ=eKU$%tXUNxS$nLIuth1)IrOl zwP&j0=;%1q#!|IOf32g0LwNm4v+&&;udIIOzBT)FtZyn-LYJII>8mYF6Q58Z1@A8T zpm^*F)5FEH_flOiEES#tBX?6s!yuG#SohHUveEBNnwJ@0YHe?78_L>Z8i0bO=JjQ5l|2T@zTRDjb6QO z^CfmmocaxQj8X=hAAZhX<_i(^`N{KHM3qbH8}HyMHeeP z{t$(xj}Ej8Ndj%24Oth}9dhflP_6>kMWr){pdV=(c$T5>8PCzu0@bT5Gljt3)bd{S z7bf3#tUTfHaeI%=+xG11#|ofn`D$XZ&hfLaJkt&q6cDRx#&leSWg-Frx{_VI_uR`I zaX@umxHN(p^5b=+HCbvH^c&e!3gIduLf}V`s%gNRGZ~pH0W)jHc>I2gRC@5(S8+jz zweS8K*{7Vh-I-zW)eoXp)iKuBzteg})W?S%0gzI1!wol3TwKgW7hQzs4eoFohS7*_ zyY)vPe-UuNQ0skpO$(>py9CEm!`f>9EszFGJGq^=A3T+K<15*;;+4OoUp(|w|J>mt ze|Hb^OXZy{b>1Zdzb`J7KSoYn7K7RF)eoUZNEweeurHES?AZP3unp6%|T8drXjHjtEdOsg9RkOLP9& zJEsnxd@jZB?%MJ3O`Kp2dkzji*iUPl$J6suWV5PAadX%~eqMVc&1-LDxcGvhn=fa5 zHO$Pz8wiI4#~&S}rESN*v3rlV@cRYZ>fAx3OeiQ8pj{d}!@yk99pP@^5_G)7z4ST@ zhQsA(LgsdMEuVBKe6&)U|0USjtKo-eyGjpEJt4%wvxa7RcSR}Fja#oO(-&S-`@Ib6aGr_;k zt$!qg)kHf&65S%7g;x9=jXv)Kb8))y6?8&*22GTC^pZJ!5knI@`=C`mpGT8cf6h%$ zpwGjR==)}%D(O>=(@qMXcGHjY?%DaA|6TaSJ+W(k{fGEnJD>9tgJMU|Ps#ZE7=Oe` z$WJ-fx9P1U^(zOBu#6lz@}B(s{Nr}_<`!@6v_jE9kMtktRb!|eQDXYQ3P8w@5eT8I zT;tJo!SN8e4su9JJSi}wz*OCYipurtRc``T_lSEsi*U6%M+E)4BbUnN=2f~S?6Xjg zi?W>_Hbv!ZN_ejB_<1?&lBd9P5uS^e&Cr!e(usqOz!4Bv9-Vk3Q4~v)s8IOr4CSUt z#4wPdd{j{phMP6BPJg>C)cT>hyT(LIg+)7!|tmc-s{4#0wubLoqZjbUDvJ#5- z9i_n9*s^uooOnD=z7gr877!?5P~X-RlTob_2JZ3qU)D9FoZsdDuG3gw|PHe-}Y zsWj=d1VK+A92cb&QV8;dL9($UoN9>eRWy5iYwHW|m3Yd<5IG%ICQCukPbOnyZ?3O! zJw=7j#F#i4<$4IugY6BFN+AqMzTZb#)+LM}B2CJDeq<_(KSu_Il^}#9=D0Z98_8^M zKp+Shn&2svCKaxrU1~Cs&N$~)Rb6Fi7KS1G98QZ@{zi-ky2P5co~~9@f3#Cp$!$%2VN4D z$wI)diJ9(@-)t78TnL2`mW9gN`aV@2c)4my%D_SrD2W^z4HuW^x%G!{{PRDiwtP?% zFoYx=%_HyNsd-j)Ab-TH>C~*PA?OQGdC3XbYuecO_m`+DDWR~W3ai4PXv%neuP@cr zx{O?=P514cvnEBAWSSAA?S&O|9Ws@Iv6TRf8#98FPW%jyJ@F>-L~p)UG!o$U8_()T z$auEPruoZAuCJ%cF!ebaqB_*B!Y~YOzWHVf3JSRJ!V5{IcHcm_?W!GGYX7Yme^?|CD~|_;Ulh7GUxTWBmq)@#D;XDvpLmm$H(NCjQ-(pxxgleAxcGu7x8L2x=_iGlu$O)x#S@CFe$v4SbAwFS%S0)t+35642k7ilB$H|o z(K8fkHafJmd+a~+qpO#?b7ii-rIW)B?p@EJ2m1Nh9bK%g8Js86jq&45uDvpkkyU0- z`Ru*`<3Jq0aNYie2cLT}h2touOd5QCElV_^V;FWP62MJpOVRhy0)^o)65W4ZhmNb* z6At_lup?4tBHAj_gHTX#`!&O7m<}XihRT%bMs>Nt<>%#b-JSjVoFBc4Ko3gvIP6i!b+n1Di2;GS;K`Uxb&wcNq zEBM@j?yURJo$LqDq>PJJpY$Cv=%iP*(~izqxgY&de1MjaRrWd7BhfiF4e0aNOm9X_ z2CW+Di#B>6mL!@ix&^J;nMZGl>TYGfR3(f7+c48|7VDzvi5K!^O^PXBzN^U*J~d^GEQ{}Ai>RKjl}#*edhyQ1OK zj?gfQz)uGPqZv8#c&2@E_~gA$3u28Msb4whYtuAEAQ0H?7C+mz5ke}Z`ebe7ph8j1 z*)uTr9)l6`O2ueAQ*5ZrK`| z)~v+MW|4qjL7C&=+YJG`9~tg$w5p_EmJXiE(9+Ts zsVgj;`=&4hT^;d_p5<$4Rc^j5EP}41?Jvk4V$c(UHd7L+&To{4Be$;KTpvEJ~~ZrNTsbikRaPR}N*$C2AW8pGDYH1Y>ED zY-&Ax#O%FSES2I2M>$wndNZbp6q11F;dRAGtxIADd=%yt;H0y(ceGKE&EU@|HY~@* z@DzR_ah0OgaX>0er4=I)4+@kZAq0WkGiOPIF~KmknH09`&?yxoJb^@j-$%mElExt< zWY1Ho09z@Vr6MMw$dgz((pdp<2^py{G6}k}X-NBY5U*u|6k2fBJ-1Rl-~$^`20&m zq(OyY5eXL%Jn}#azdWnSYwG+)!PwEKm(JMds>GIhL`gBJ{5XzbFzNWi@Q?AM9L1QU z52b7QX6TIRd&ce4bj)3Y0D>xE(YdLGB|m+Xede7+UPUQ}-{9t}&tTlhGJf~qizHK7 zN{XZW^qMm`X!a!1U1>beBhlDJ%}ejo^5|O>xe&GjC|g&P8V-4Rc~n(ZQB_riVHixF zJQ>gPSi4q-#$S2mmCTqigCGC+$BY>>1_0M}S+{N%N|${M>^&mPsG=a_NLRpweiNZTH7)C}c*-xUa$cJgdu z&0nQ`^TX|ptXS}9`i&#M>OaNbr@xd*Db_4<=xWv1bM+#JhK(K*4=@RY1Wp!KzG-9U z%1^I<*CEla7(de_od3}WTdujWgB7c64mr?IG$MF+X_jRxY!*KE(Kw@B3Ht3uI3)Pl zwZm7$y6ii7tXXF>=coq0a6*tsSTO(PG$qB7zuvD^E1m~a53J|#gZ=C?*&>@&Jo`eL zSu=b+nJ+uSlg}mj{0YG!ogW_tM;sF1p5Mhd_sm{p&Y=hTIsKgMka;qFap`x4Z`%CN z#jP|nX;n;Zoy*hnQ(SvxKGl`~Qpfyn(HS&XqWdG;hMDg+bS%gB*h9#CWbBBPxeZMs z^x)EO<}tEj_?uynQf4Qel`AgDd;k!`r__B|4*QAvhVF=o3{)ztr2Z68VXJHmT2zAAL*Zp{VF;%csOiCt1X7Y2Movq zLi+>z;`h1FaEJ}Dj{}hahAPGTvmv$zy+O)DVMq40$8(>d@HG9^L9M`9eg3`+=-cDl z*?sZb+-EpU>GS_%cQD^T+?M+chsScC|7v{q%62kYg%B{Z%H+@kbz=P<>}HG@cPIOu zHYl@nY)OcsuthTKQqz>cc6DQ~vLHa(c4!N7ECI0?0THkwzm}8T1 z9h50>O#?>?QiefF2r^3HcrMCyF>M=V+xQTaON+gv9|>3jq|zO32ZchBQHo7ohNSY4 z3c^CNm-J!wu`KnaiVPuemBLesZOW#rJFCL;@FS>{7CrvyR{M=p7>&c-;EDdVoaYWR#SKFl}5)q{$@5 z(0Lxp#j|bNEDKi}_&hskrcy%sjjY#0&nZy0X5fUOl@CIY6+l4*6_hKp4PI%(_J;fr zf?&VA9|Z!e{4i4wn^M#1@|*|+S|ViynSf!aP;ppBEx#`yq#vomp65lplv7}LCW@2w z9hKWxZW+_QvDQC2nI@n-ysS;OB{9<~_CMEA6vjyzSouW=pAR7gc3T^59qqJ<1Zn)_ z&6-HTQ8SQjDLQ{QpU!lGv95s$I4ClP!tnbr@&dW4U6Mp5L$;%fR;l{YpQg`8(LQ@) zg!3ur>ZEbaI@&W?l$4Zsf_5iEn{Y8ri@b@I6waJLdR-F@OIA^zQv`*Tz{rJFi=dBi zNio8MY&t_a9>>e1A(NoEOVWjhBf!iHQ#@`Ah6{|&^<|jp6qEdYVxE;p@`E*W+|g2=PG%nRl37b` zZXn&&!J6y;f=Fi=DJ}TNVpe>xf~@0E76Zdo+8UD?qTiD{h7pb+Ar-4u)$-1~`zWXy zL9{RrpWjENWpdro2ZQ5cyB^!0TfyHRUqUjOCe;}y9g9nVmD^)Iq)a^HkmwUmKWB6S7aXR=n(LbqTzTAh8oM$d zgOmX(_YF~4eJSmm{|a~;-*dkA2E!)$?9+36egVi(Y;U){kE8eZ)I4y#wL|goP9=wlRg*hslv4H6pM#{H$1`e zt#cyu{b}7<(C=Aa4KrL3!~f0o_11*BM;p%!87loD2E^H z=kPvCnGt0MfB$nS`FWzB66rH@{QTQ86USRz zdu4u4`SO1uGQef%LF(Zuw1>jH)!b>cSo0yaO|323BJl zh+shQvnvYt%6A93Q|~~lD|Uan;~xB9!Nq8s&_;B&&9Ug*n?3jx;Qoi=oP1)4DU&R= z*SmcFE6sfOf+#m!^PdoX@*jdw-W>Ki zIRc{xhDodR*zTlRmPuho!i=9ffxV}U#vcvhiw2OUaMSIHcbv4_7OjjPsgxUZ9Tz*B zArni`v8I8Vr5o6oNHIhBsCK){D1l>0HVYRa1XHR;rec+)?+Tx+@UPvvm(kiOT&3^@ z0|+5Vr!#~VghEmB3yavieG6I7!!0V{zytU55{CDdOlBt5EnZpL(iLNt2oSNeD8om+ z37wGu6OKB7^0`$Y!A&?*;w{ZLB)29C$4{QhoC6!!`u0-nbY@e$Giz7=9b zUVq@pk$Gxho29!a+IyfTf=o6;AS5aU-ec2`obmP8(@RJyn+OI7iA0d^*tA%Fit{54 zqbiD>*tXU}Bb|2POW&HPZ?+;<5TDAD+R_{V z_7@}aXsSz460}ePoOFh^bdo0FP_kEs@bnwqETtaA6Q7iK4FYs^7dLhEvzqipL zJUXQ=LoY4Ggd-dxQ(cNDCtWowEGkF%4$g*VMv4&xE)=X z9qpQUHhtPk2*W&k3fv3^P^AQ(=_ix)NUWSrNb-dwip6MG zAPsF<(iSg|9#QWAQf9$|1uR%FFhZ{vAD4U?4!?hM>kg;?X5kiovvA9>(|`2j+J1jO z_Fg@Yy;ncX+#dt`oj#qehD&Iv`9&&4-P_OGFP-pBbzZbcpTm+W$qi2q-}VXRi5*V= zsIV--(T4{(`tYGihY@84r+#s0dlA6w{rcy+>@4WFZ)oj6R96~QR}K!`-EW$2P<~8b z6ctLo{H5Xdapv@)msJYBa6*uy4%;!|GIa>6&_L`p)*LeYc&Gs3;f@m^;1`^BQtz>h z8D;KLF3!IIPoM{jPet39`iA}RN7Da$uqo=-5aW0EBl6kPeO zUgBo|VIGFQ`0|M%e*KW21&jOfFMFXo)jLuYd|GfF!^^q$;NOQQ(CLtQ=!!>|GPsh} z9{d||@`*uCK2iSwO`d4+{j1x#?g#l81~j*LEPN}C7bA8-rVF9XdL_o*(zk zTOBrUbvWV>{lnVX<+1dGY|q~SOWx12e3i|pYJ*`(V8(b#sZSmr(DFOk( z33GRx!v7zI!Z9~9^>c%Ux#sIHp}tHAJ0#I@)K69SV2wAP+`a_*YUFO zki;a^3!B+<59aXmjwMtPMdYjzp6l}b3-8Kn?|Xd4#x0Fa(MVw96Mwlnvfs3Eqd}Ll zbsd`{8#-D0%YTqrwgtoR>xda4Fnm5r^F!p%ow224^2o3I?dUpJi9lDf^#||&`mf)r zY1qyw=bV|bvt8-ce|RRp$QL5I-y~IZ_MCXb)qjqv&ZPSMSC3s@cH%x4+x3}EzR{8K zT?^+txas##Rhcav$Z!N<8Wj3WVk7d%A6@tXhJ0HnRVolw$yoc?rrJhn`UUxUK`N>$ z!Ef2VtW$tFEP((3AOJ~3K~%qAq2uyI43FYJIo;0kCq3_`_)PQ}y-Pgb0NZL0RCS02#WnJBA}7Cw6b)8)A! zBuNSWf)FS+bZu`fOuJ6B0*N_5=_P>9DCIF4BuiC9IW z%2Nw|IezPy2_^T1MkG?t|LN7Ahoj-D@%xVaR@f7-R~DC~+Zvj!h~p421f84eQE94! z1rgd;ZevSlf)N-frRWqc9uO!I6c(olhgy*-oiP%vfCk}Gs&tjEgiz#_g6(U^7m^*a zYr`9!uWH|5pb&&sa-~pYm50o8309>sta=Q`z)L8KtIS>+tUGL2D&plC3PSB^U;Xl@ zQeyPMZdtm@3mZ6XS~cVf2v~|hB!=Oy$5-e_Wfh`Ykc^rb9X3sdz(#>j5Gd$Csya;7 zveXS0PAC{@MyjhzS=G>r14yB_?x9egr|nA6ON<$^*E*!UJ|so|fl0BGieUmMz|j9O z80tYoNGQxrP&vC|zZLYoJyq|7kTTfIc1cJBTl(;ni|}*~mM26{7;(3*P64J;_?1U6 zSC$;5v`R=yKDNi>|1yflnv{$^mzJ7)fXuoj_7#7-HF4Pg+#H$s@7}fls}KS%yZFDN z@aew_=b{I?Z$n3DJcf3*{0MDVI+^~}i}&CoU?@`N+w`|_aOfOAXM7<%#H{@x1pMrZ z;XQ)G;f@~_GW&}S1IxAj7@gJfX}`#K{JVEx4~9f7I_P%~{sS;(ltDV9NF+U$t*|-y z%w`Ul<;UlP3+A=)(0#>x?${tJ*VtTqMLQdo>R6>8{j`%m|1H6m<&})8HhJvHB=nCK=AB8Qrz+D7=eIb>}Zo2`&$1!q)c?g ziA*|f&QKM6>N|T0aK}?D+StK42aN>agKb^Bx3!CJ99Yfu&-D8J&pxo4=Tr4GkyO2`OKR) zkMZNj4@1g`o(_jC1Zm}w9g)w$-#C(RRd1tBc^-d!;3=-Z<5|%eO9y~av3Q!#o_a&) ztIyoPq`j*VLSR}x%#o#xJ#jX58#_r`79!}=WrIzVkl%;b9vkuATW{aHfi5*?ugS*L zpaif4}Sn-dTCk&jKxO8Ki7$;*|NT|Y|9_(@5~sf;OLPP z%!+*`HC0qpRyiFBvW9^X2#_g`VpNtOJB&XRkNMi2n>O7a2!|=~MIz-=bS!N9pfj57 zN@JCm;rV=t0-sMzjg*j=wGk#@J4BNy+N7XWnpE4a4ibUNK|^qn+Rr4iolJ zv?O9|e(+HQpo(GKme%( zD34;#Amya7{3f9i3&RI0r4T_7VT&!oWnzv%NlGa7Sp>r&yiO6!8kL8-8Ig~z6&mT> zF=S9W2|pM>Mx`z`78IC~0G<#C&qE5KNlvB6%MTC@MWpSFoEA^mrH+6^$cKk6@+?IJv+ zP)b*oR`d@77gCqJ?pvn0+p-~qCTyh8%9Oa#w z@=X71fqSkm!W@GA?~55ze4Kk)g!>-pSNJCiT#v5avj=;y2mfVABo*x)9?dNtx7-| zTWXz&=n;cY3k1;-x3bq^!wv(DEeSDubUwvlAD138j(LCUja$0^ty(TUW*j#>yAGuw zXc>HYb|q&&u&m!YJ~OV6k%a;Fsf;qcIWYV-b0tBQ4tR{mmRLIiW?TGEYV*-wCbMrm(>5TO^#b>g1 z{ttfgp!dW>SM_7S8j6BEDPv4+N)YJdvlqbjCE36#m6_~RSF3Tx$T+C58@1??kV$3} zjv=?d;>PzIpMWEsbY~>%Y+Fl~Rk0Rf&3~cXhVtr><*8BUOsQXVj*;gsFfS z*ewkRFH5E~`PnUh_|1#vA{EONX9K~K;zLL77l~|Jx{y_GET*!w6sApW?HCc5{#Mgw z#z-F~;PX6OA@BnuT%~Op{Zs%u$&~phgv`GH3DZx5a#*sp*07rzEnAT)GR#0_JS}`m zU=8X+_YG3j{nVfkl%{O{@#r&Sj`bb=T4{B`8=htBdF3^>odf(U`%v zV>~8efBJuwAy-kEaY?EyYnRqkyY1su}Vu|d<1 zQBaEV8|1}e_*=GPL=3`_Vx+S0;!2Ar0w&pg!02Ub`}hU$OIwe;iyjhLeJMOTwNyGQY1ZhR6Ld<5Rtfk7gGrGghVJMQA#MK zgMdZ1&9S>7EF}7Qkbpq-&Cw7-lO@Vw5RvvVp#~|rRDa^9Z#&)1=Bk(Fv`0ef=h(A* zl|4NT``mP4q}u~?!X7w7c17;{PyAg6_xM0t`Ll!Gdee3n$M%pCF$tu_oH(zI&5{QN;Z42 z2Yc`zj0?ZthGhx-KEcfCK7M;g35`uIYu4MGduFdP@0_nixcG{8)^Bv!XR^g-X8U;Q zwKNAE;3qFna?aPn%zr7x*=Iy}d10DwpQj5z{o|E1BdZM_e5AL?RyZVCyrg%uf6@f& zV-Yd{8#X!LMk@?I9q@-?#;H4;Wo$`^Gxo1yaz%uOt_0 zwQ|yoax#v`b1NGAt>ZIe3pjR4DKkdq^U9hQnqwc+&f;W-s? z&Q1(hAcVx1GYZ%!!ot9(1P4!Ey-N76|n6J7YL@+QjCz{IqGfD#nCE`Fu35E$e}$UQsfC+QoQ zVd|0eLF$%I9~lEW(m5kQm?mF5@5J^tzj@>86}9hAuNrYwXl>K?I^X#ql6BGqgxM3+ zsuy(o{3{80icyA-cQLT-XB)TI`=+El zM!5sl*#kjF3OYRpJM32>%fH=r-4RyCAu#ZC<~qin&%&HICLt`N#xrD_FtCF@zuyX4 z5i?*GMuS#`*O>~YYZ{QT1mj1I^2{-nOWn4_WD!q>{Ftb$O~CcYv!QM6=24NtqDXwx zHk@>tcvl-4Q<6@nX?1O?%pgXdiD4PNQ9Gv2J;|cT2wh6i3i~h$ObjcEKp+eQBW94w zMI`HMp>Rxz;qTu!lmUtBw{Vg+J|L?UF`)?L`7jIgb`38C1&U}XG|)j1P2wa4ASA*t zunetu^eh+Q%k*?llS<)9i4_bHDk#8nJ%afjD&-QF0lJ(l5`hpx^s7Zn?s&WVvVxv6 z<~se^&5DgUr zg6HIF@d|{`L=8~mytI8gt8DwCs;a7scIV-_uFLAxs}BQS?>8a8;yUJhW9IJM)+d60 z{&p$twX*@QzJ~A-XBa;`WnS=KTK?Kj!!OQ{-HEOoI}lU9bx!oVUpg_k^U_3n@E?T> zzu&fbW34kNdSn-HCOWdDH1~HK@EzdcVdl@GtKjazCxE`B%yb5*Qu3pcn?Hgb>7$^m z*x-lX$>Xw{I{JPs(e|K2*!5qy0<_<4RiE#^j3#)F+YP(=X~#6QoGjMoyVdC9|L4DD zkM>{>hQObGQ{0m&(~b2T^oVdI+}l_W1_Y+5^I`zz9ueTh*U}_Yin)gen0rKkE3WO} z{pDHGX*eJkHrLkfVHnWf(c7!pf2NO7BYR(a1^FL;z-Y=u>(-?oWdHiHSG0RzQa<%h zRPQ%bHMAbQvZjSs*64us>ps6Xf4^`x6Mpn6pzTOcyx+iC2UfFST`OlFRL!3k*Y#9r z>c$-}Z{m)ZH{mxW&t1Gfx12JWZ#}ep(6)9NR-g_&0@DwHK;Y-V(F4B^hr`@?=bbEF zx|I9wyKm6yd_Ety-+nuFb#?sW7elvIPM^BB+OMfgjI=}SWXN;udVC0Gz7Gcns>mD{Lhct>O7rq&2HtcVo zHRZ%s5ldpYE;Vb{2ao#v@$0Rs3YEdd8eR2#HlDd4(H^G@k4_YJM)CWnUf%1BlH>0h zB`dz+d0wv5t6}B>dRMPnE#j!MB%(|R2q}dLKEZ0$1xF}3Rq-@7dxml;gN;~Mm%f7Q~vY>d*1ZMs0j2oA2uDR`qBkceuTVD73#q<6!y84i5kBy#u&{8$SI#mW4Fpz$U=#xRBq`>ZT>HY zY--0Z9 z6C)n?_|~~mD$5N@iX^|dC&pn1`LQhh&Y3dNVoR;Vm6v?7VQ%Fkj9OsHC%TbcMe*2c znDg~PL+_sO&(JDd8K?`zw(q zhlnsP3Y|!z5C}|k1tB4Xrg4O_Ez`7$3=28bY4V(2YeQd!$A3~eY|uSz&!ZS)eWoq* zsBPPSZ{9rmJ7J&s)9B&hYgarPY*#`Q>5@NY?ppP^ucQS+k`RJ5D$CxZN0Qf>M8r}Q zx*kFpD4@>p=n4lgEECZgr$Cs5Jw;%+d=a4u0;LpXhD8vW@Ir>?Ic~AvRrm&F$#^Iv ziFMnl`OBi~f+7Dgi+3?QXIN}Z#kOcOVYCOn2Z z{R56eNr}i+_i-Hu3lLJPUfkTg3LtDTl-t6!6mAcBqZKfHNzuMr?nW*#r5|CWuK{FL z-*%@kl#(K=ygrdas#ifJa*8p}2BW(Su0of@_WI|(d<=Bkrc^2emWeP;lutpb&%R1S zlR`3QDHIZvORFKNk%|`6BNGi`=7lkRCYB*`v+3u*889&kx`ISUlC_;(3xJ8#j)XD_0Ja@ActO5VAOZ zmM(dnbrqXhk}TTTPR8*D%~Ke%SiGr&*VgUW`O)S1R9EU_Or{j`u5Rb*@8?lmWN_&Z+bJrL+Ga z=D<1q_oKbTm^H)4H^1?zsHpTsG$FGFU7fbOV9mq8V&IR!{=i`0_a1y==q6=O zL90=Eu=iM#dH?g_c#M%11|utWox~Xk%M{#xO#vtVPxHV@x1xP(iNQX z=<9in0Nue_uhCyk0x%O8gANy7#E!=SCjnE?V;3vXH#X>Dt=T{|P=~&`yMLkmz@fl` z+`mQW%0TV8`40qYfPo=hg=imN2zZa-t3A!kZDSVt+HTA3*9SoN@a{;U1g)ky0!RZd zpj)2@pjAeT7#y%X4xPN6L@RD~b}jZ`4?Z;fe!;iD8R6TPwR7(sMOYSm=koS`jez}U z`fwb0<@F4Y{6QBNntMcmyM7zv_8SX()^*v%dF*>oJ=fpT*;8h4=?7VY0WnCS^Iw7} zMPt5B(T<0~CRapQU9VpULcmvMSF)iw*{_`SORHOGPue_k-b~)x+R2LTy|2oWhz}v? zu`7jq249>}&Ife^U#Fi8^78Vy=bn35vt|u9-E@;4P40tGD8wCi+(Bz=E7x3e%^aoEPDiAAgNG z2Teuh><*seQup3UR=&2J(S64`a{K8jMX(^U`pDB}o-?hjJycjS;?%_U*f+ZxTYM!* zx*D1So7Zl->gWqT`}OKk+t#dG@ZK|TJoh?EDLhZH*S-@LPda4$ccyGe&|#lZOYYo9|($sK~#3{m%xc<*G7sX`;--zV5S@lX(BDFM@`@<4?C4X z#A1+&v*Vw|Pct+@Ru&BxC$@KeCe_$EE>b@6a8G#~EhV;^fZyv@!U!Gm+mCqCv_eXG zJ;yM6Wg5lioTVziCKCrw-d8KIbP((zq|)2h-n^WQFOe`_g;j7>(G_|;H$ zFAXneiE#{>R9;pkIudySB&IizlyLw_s=1w|_dexs^O;9&vgA>oAt_f1zmy1{4`~_% zvkpbE41Q11vSLkj=lYG8;kb;ldlf$dZFf`3!%M}HQZd5w$hTeM2+ctv-HTH zQo+nK52keND6Fs_AqBBSir3y)$;R3yrcW8o;Rj8@loC9Ja$K@)8JhpGlA6a}LD>#P zDIEwce0>L8`(Mn$!a|;Z{(0Kk+Q`q(=cb!(>PO0$rpbZ@3+U?VA`}Yot6%+Uw~#XB zd4BFaa~gkMT!-U&Tz>30!akGZ|93HK8sg*yOcwv(5Ng{~ytBE3M=zMg&*s-~`->Zg zT;Jr12ya||Ft4s{VQpiAN6wqc|Gu(`o1Xs=`#R^WNpx(#o|c-+fcBMdI8QWea=%|b zb{Mu2Sp003o6hK>v|7?s>oMafi(sVpx5KsJ>d$t9fEh>n_|+wG4n4)sIXCXS0L#ws z>p#S~_T~hR1zQk;2un1Elfdaccq&!xEjs(fN`kEfnbaq};`SoTH* zRTTzL&rcCgs9h#yzW%LN*3~#%`kg4nMUs`PZJvE0)kDf$Ft3fbmt?v8yLptAO4h9F z-Jjv$y71$hI(X-m!2?6v8(i-DW1QdoqKI@x@#^boe)989-kd*zyr|@sJG;2#!e~#0 z&%gdX!Ji&Z@R`|u&iR_&=39$1{OREYcmAx9cwF(@2jWD+g0G$$X4+K!TzDQ_^^;E8 z+FcHu;~zxI%)7dsXJ1Is+2ws2NSTqq{b+^E3H0w%Zb1k4z6|^x-Buk!c-$fH%DKr`KBJd>o zyob>CtnZ-%me-<5qn`kG<<>U?O`0r1lQ+KyE<~3j8;H-MiK!FO1j~zPQs%E{wbAS7 zvSsJy_G=5;w)Qrfq&XN(RNapzh*sy;I}f-Tt->h<#-r^7d(=03@R4xxi6N>ghVDe( zdVL|KC0$(l!*(18K6h-8A70k0cCjqM_rDz_o>1iH>2}WPCx_VH;PSa+dm9ELs|=Pd zEa$qPb#nUIE%wK+K+fL#?7en5=dAUt-}5~Clq~_g^20^!>PoVwJI%C` z5K;&(_`@qhwsDo>t`&Ru(MM|e&wGbTl4h1ic={Xj*w7RsmbN*xDvyoLF@Eq+J?{q2 zIp-W^&YVd>K>-gv^iXd34L97t(@#Imsi&UG+_`gUYir}d2OrF>zw^#J`Nuy-sm2u| zD+$pEI$lI@rPA2+zzb|zRnLt1vnZclP9QIY7WQ-Sv>NXH-PgQDPJEU!52@zYzP!dgnt6Wdcp%ix7#IeQ&QMUj9 zAOJ~3K~!CYohD#e*&*j3f0+*mLXJzYBT?MGy5+B%;%!u&Jfpa{Gky847xsKvZ|^Dc zQjz-E3NiHblmZEH6w_wTz%W8Ll+HWoW3Sx&mq|VuVhWJN#a0k0DA-k8S9nq0p{HI} ze`n-^rpI5(Z;Pj?v|Y5(E}841H1By5x=1^Dx~oh(FNh$gNfP=1N#xq}N!X(tOwFJ# z5I_PM$H5UGZ3pQ%C?ti^5YcoWMM4Kx!yn4S7u9hR2~=`Gil^c!a2-kq$<)G@jS3iE z4T$58AV3kINr6=4$j{MEPk~1+4dz1n$&o=sifcKTgGd<(qmw*|n}RhQcpdC`>K*%L|cZWdY~9i^Gq9G;} zhIr`i%c+^@Rh;;XqeLbz!e3g*mRlbpoOB7kL0U&F7UQh5&Z4cYZPf2r$8k94oO5Vy zZst#a`qMu5^;Ynm2R72umq7}_v)`P@PtL64!rNZqv&Yt8IxeUGb|sdhShl^JKY#Wx zZhn3jiOk5Z{g2P6<*AMBTzH%Jd-(TPnptuAvD~q|aY$<6J`pXIl+}Hlj%`;1ojcas zKfdqkhYYW8}K}4 z{s~-yS6wn2&qdn6BS9_%?jGehp93z%BYB47Y`p3d@cIg34Ba9BmyJlqDb_L_fSmSt$_|whBW3JOQ`2IKY`2IJ>mL2`%^86vM7aZ+p z!Op$TGXn{|zSL(0AT zarG11xMNu(dwYha4ZXOnizz>NhJ!1;j#6u1hS%SvDj9%BAAOXSD_4$K-rVdJ_bpwz zl=}LS1W{{i>xg9lxyV}~5spQvC5ZcUYNemH-JPu7wS*WhN=jV6j*>DL87rhfD222g zNSWZeM377pK1!t@T?itsOHv4&?BG)ug2Id=Hov?x+Jh4fAebn8Oq4!!A<)s7oVICw zcAXHAHwi($^rH#Ebm^yccPo$G{nucJltJBfsX=49HuBle_zi-G)N%Mp2NRf4frG+~ zoAfqxZ+ZQhRg;&mea$xwACBeprcx<3u6vCDe%b)(dZdg}DmM@pfL|zT$hw>e&AWK- zaE$eVf&hwKg~(W}y6>NC3rkuKIp{N;F>!eFlPgc8y$jhN6PzRJ2K~e;uTrK@KutkD zw(Hi1%R@!JaOm6>i6onahK0g$72U7CQg{69;6*db3chN6eD15du3x+R;THqFeQ}CL zZJF}O7Xi2`qf}H$#|`R2AO;(-I{lMXimLJo7Jl@kxU0!!rY85Aw$m$=$ml{SO%s~W zuZ4mop(7k=AHDH=w`u{Yp&15xev$Y5DuJDf=k_;5o-?Rr{cv41f^l*2I#bH^Jcb0I zoGg(s=-o;w{DT$=JfE2n`?Fn4$0eNetnvOM+>u{vnT$Eq`Upm}9|ca*L>ol>XhMuE zs8I^X8JGxEE;>SrTqRDySJNh7d zC;DPZ63G;w|F7$L^5Ls;vMyl=%FjB8T`#Sq`{hPLZxFv~+xDnN>jRfp<-VWaNw`X} zW_K?~PxfRbADdIo-(P9Y`Jp|r-fQD=wZ%NXeq?)RmPh#WOM7##*EaS7u&B0}zpmcb z&|?^m_|!DoxBZ&7Etdl6?Q5MsZChtuIsGtWRLxPOz`MSw_~<0}s>e-^KHWzk`@xug zm`>S5jnz+?ocx)$*M|xC1uw5PNoN!R{~Oy)_g z6A?VGlwZBY_itiAVr1e;j{1MGPQxQ~E*Z3a2VS+wXr#<5cqGQ1c$G1OYaxq(&j3^K zn83 z+5eft1B{N24mvtI#$4as-A#A*2pgI=KvpgwB!+T9c)lxDnvW`cxJr@6#Wu-GCi?$8 zNF;^`;MXKtR>mQ+WJaOwqI5}oP!BXLH0J6dGRpN*j)X_<=zt{zdFbSg(m$3$P$3K| zq=Bhiq?VoeR|=UW4O~1EQZr-H)Yn5zR4^r+hp;8lN=fNKl|Rw@oHJfuyZ+)d3deF{ z0)>?^(WNBcg^1f9e=EGuB`J`OL(p~x+&w;Mo-%+Ck`Bv6I2kf&lRK`yX;O`=Pb$ec z_~|D=vJSKKS7;0!DD?<|Fnk2Uvb$*ZqcaIFw8iQ2m62^2ne5!7vKpxEa??D<^6CH9!s_II;u|5=sgP z%&B~&XK&9hte#Yt)FQSfd+oGPZrP#LX6;A5mg(DcS8@BcmK7;fZPH8=Hf_wlt=VIX zZ2U0{Ay9y%6llszkishv!Wo5>ag>AMcy2|w3PS>xGqS?SatIGPhR9x9*K*Me;i4Q9 zA$8kQx@Be1vfFA197mxna7`P_N+UH5-RCFWn?fH{vxQRGY8|D7axx0dP_ELP)Bt%S z0VC(Tq7b;2Lh8zOMJzo)J}aR#gc1VtnpE&KRgTH+26%n4Gdd?=24dIOEV#p4{MBAXFCkY3v%fua2u|>P=HsI69Hh+?!$QgaK)DO<@q9 zE~y@4`!Ny7gYttuLEAP1-1zRzw)oRel6^maIDf*M+mVOPW|uiLhWd4u)JQs;MkhuR zz3zvBTSi$`ZaZqoj;{Vm0cT&_L0RoyJ~ZFYvGe?V=7KO)gRCelOVO~?#&O`$CsVB7 zWO3s)qhFH~KNO&D`sfuae!t-Q|1RX~-|ObOn_?V0&(8@916*>ECzX;CZus9KzVgj3 zZvJDOh4cL!zc9ch7lsLk#wLs&emu$jckKJpHte)f3RbSk@Ys_nZoI~;a5;Wqfa|kl z$qOqo%sbM@v?)45z>ZxuWu+RcUNO1qilP27lWKGhnrZO(;xxw{>*vX5)7*4z(FjuJ zn?LN~(u=~(sC|1Wp9csM_&uId;*AnRJAnVetE%}gyo9E4yu;986bH5UFWydDhkKw{ z48$4~WnUK#TK_CV6PyO)GkBFGXW>1xPvcd{XuykjGM~TWWxam`k5n0q!6O}OSljIE ze)`E5@Ft@Mx9vv^c*MLFjCL&sx5;L}Z)mh@(+J%BHjY1ze?vG5(XjJ_H&A=KFirMd z+x^a?9M?LTEzgY2RD2N7zHQWAi*4J!eZ^wGRoJ!-!NFel0FsynC6K{5&r@VPG58%z%dT^B<^Z&t1mR8Z`I-*s`Mq*If$ zD2o@}4D}5=*!+hSmzCJ|LRx_1IPrX4XSNZd$dQz&tf^9lX>n8BjjOYd3x zt8Yzce{K6OTbkO!6DK!~!53Y+6CMu1_M+)L>F3+ZL(Oy=5oQUHg{{iH6SW zl%mZP#KLK_M`|QOudHu<=IXC)6o&XiysKyP7B^D>_&^80n=b-{9S3v`y`U5~oy3h< z!z!H=DIsXmHA-zadu*?xWZDj{kIl7rzi7(rg(T@zG-E zZ5un*1-gb01IIFv`oO@swY?Y9v_~D;nwGjG$y@6q>NJPtPu;HeFw|b z|NI18r3m>no~iHPXODXGl_8%-W|--6+Hwi|M*l9qVaZM&{PK}(ZA-AdJ;C=+pH4hu z6ENPwPyCUe4%4{iBDy`5|CZG@D<3mC=8QLQ(3?prjA2zQhEI?gBWcMtIRwuGas-B3 ztj#~lPs6%Oo?DjY>7{Azyf@A@zw6`WXUpkNX=>c-aPrw+ z1}l8|vk}fYGsx4=rFrJL3_tuu54YbPXW75XFbu&Z7lt|W)F4kUP4mq2p8v~Dx5rrZ zY&pTe$j5g>y@hGQVTX==U6mr&{=BH<${*(Q*-v?LrsEg-`Oj~4(bDGd+_DUdj`cn> zix&7<`eKGjH5$6+c^MAJr5A;{^WHektq!N27|6-#`|;#6XQgsfMbBk}wk^YB9N!8Wvd4Ocp@zl#LO-c< zps)##RJxXta;b5QBZvF`p7`qvD-+A#>vp``u&jMbD&GyX)4pv1?PHn|3gDfMpgJ%} zjkd6{vGMCIEiG3b=!1Rq=tEDL;0yd>$beVbGZ4DOkdjIP8*Gz^p)tKU!uIBNHg9gEYHkJb zbQ`Jm?kN*evnZ)5VOMhpwyF9IsSy>DkQ!vE>hu#~K1iptq|A`k@IfME0MY_%zri7& zJ@biBLFCf>nUT46GS!sc62If+pWZo7wRdF+85mv-)nDHcb``E=;g3ic;QYV+&0)B# z`i`N;ZNC4HCEZ(hCk($YZ9~{r{i#ZWt4F-UxsKzMm86u0rVUhF4SOzxq%V_V^VTgQ zfop8l^(p~OwQVn^T55E6^|^L~K0C$kxhZe1g! z6nU;oA{)gV6dJZ^;dI*w*|A>WI&R*?1!i9gX*ozF=n}&fIJQY9nIM=K$;Z&cZp_8* zHPHt>+Y+zh%t<@AabKY*oNO51OotUJseWg|3+oiTazw+}Gs*rTYKR_!Y+jua>bdVj-) z%fEWNu{D>3CTM&4d3u-v+;1aHTdIwjZJ(HcC`!g0D2HgiUPw!;yJ)b0SU1Xn~*SmZh0kt+U`5KmJjqUFV(^;u}BcX3I94-&|EVV*USI-$!AA*9S4*p5dYodW!PjQ4ED zbIukFq%XZ4Jc4KPdlw#QmBRC(DF*(GXRf>k@0{NsvB2YaPwvp`` zxc0`rAKmoF_>FJ8$~0$_aMo)3$dDvQiP6 zQh?Lmg^8O$Vx!Q9n9yp5R}CXPX$n%yCd>5uYz+T7?jLEqFN_RFK;e0@>Q%)=>hf-S z>F;ZAd->iyXU{uy#_jVCpLLm>K54bv(Vd-27G!gP2P#RjvNS2cvTQ69qp9hZP~!t_ zS9JIGE^^YDd}%sCsf15c2%nNtM+JrBhPFSxRPWibOW2LgMAhJQA?1->(m-=TX$s}I zsu}Q0fjc;NXqaD0k?!Z@DN~eN6iLJt&2dz(<~VU*Fpw^+DmM>3?a*FZs^z_#+G+&@ z=}szpPHxWFcIY#zD}_J%SunGtVi<{Sr^%$#M1&AHR$8T9`Z{{i9T!)V*t!N86F2T4 z6FyW3P55-pHBHRK&_S(+z)fc`WrmM7HXeeJSt@K~Y`VWkRtf-P$d>mTdd_ z_D5e76E%hCHM=(7`|91vr2VC7bEie5VTAm;!K4$9B-NE*_sUn8JbenCy{+i&@`U1& z5(~?sNNC>2Ob&08jiv-UY!mU1)f7&tAX?@PtY_9$Gw-MwJhyB;$>abjkrxf}gKvDC zqQdB)({O2AvK4JhJ5^{zg%}beZfJ4@nRlQdgoxoya1MgpXWxHUXNs1-kwnXerWi+0 zDTF0E0WYm-Vo`8Nn&5Cex1}>D@10p5VakLMFYoLbbNhYbkTZ(ez4H6)ef1=OmL2L_ zOa7X9=)?>CZ>r2_;z1f)Um3UrW=gSZgTuu?9$h9Rq{uMh8Uhd->EtvNh9Rh`)W~Gs z8PaVyD$6wtU5t6W@=}dpP>?Z4U;psqNv`^F!Kmx@7soI3^Uo(zY}saWcfrPb!B{)GSUD^Xfn2RZ2 zY`bL)Fmk)`NSL28pk;lPvD2PHz;E#gk|sRUq<-?_^LQ*|0MA6}8w~tvr+~jP^g&(C z&@azKcANfhpr7NpV_%NvBh!kP`ZN|U!y|CM$UyqiKN+aj*@{=qGZ_CE)`r2k^fq1< z(2w!Vi6eMPP5py!2ak+-J94UV{2L(PLz_NTe|x`EEAZ%wVLI zOJ6{;XVvz$^&1-M7T0eUZpN)Sw0LUT&UtiXD;{LFdz6#+4BU%UCWSJLkgrdi{MZvq zzSFm(L6+GNbp!#G)rBjs%0*=5U=alsj!R^)FHisem6olM$QtSbeqC1?`meS-qEab3 zWg@e_cGg|#&csde?sU6IWKw~&mhsgV+66~exc)q+#7Srig9Rn0RtkfH?CsHjN+STS z308{X_p{h`2Gx#vq=Y5}%{$=r2|Q7I9*nO#Kwn!IOIPi{?Hy#8i_`?}02MQQ8h*G2BzG^fX31H?%TS8KjDyt_ zpWOIp{p20@J_VgIsVSEtDG2p+pE>EmBUWbCCch;O|Fm#f@%IaTVJbdx1nJk?*}ZBV zb;r!2{LF)}`|J&gRUJpBJG&@R{U+NZn-FqghT&(&%k?bzeSkTqA5QU<34|s@_~VV2 zarLkN&R-sU0o!&6hXefhJLmI>k1fD;T->xnrZ2(Xn+OtRIS8K^c^w9! zwzd{s*YWv$R8&+jYt}4UT3T}cUQ?$|#qakM2m~lCEoIiMS+uve@6#Xb?cxtF?q>1- zo5!uSMXcG?%atFS!AlK2Y{-%_AF3_l2dCF^`foks_=+Dz7G$UBbjN%?s|vbcJH~_wb3Eg zt(Z7N!xt2sba8-x{H~i-kDDBJqQPH&m876dGJDb6AKagDemjTH@v(58pJ-I@&nHs6 zup+}xzxURDa`$EQ+tuxI^4V>C=7KPDXZx@$#qVy7QCuWhv>&`lTD4DbNHIv>xm(PFtJ&(kGGf3ct$ovj3d3aw{HrL|KVO`ERA@i0n zc7E6g8-LFJ^`jAZe%Lm{W5BlqpWe^?e{Ub_?#=#t#3Qx9m=YFDM#ooSMOlrk94v4-Wn6-_#r@X*wKQ6{WS$q%Agb)^SEzgm}gtk;e31KuSqX zO$|Puk3D<#kV*|zK53f9lqpj%41=z&t}&CBlv3WnbI^cS0gXO`j8Y_U>2z&k$|Z%1 ziNehdRXu+ST?%{%d`b{PkS8P|p%Gy8L5!;ut;(WNImDHVA1DxBVv|n@`fGRkNgbsW zCJF=3+onfCkC_59g;01#yu%O>8ZURniemqK=``>Rf_1~dv29)$%$>{t03ZNKL_t(o zZ?kRnR;*--Kro0ht(1dnTgt^kkhWE}Dn#I*$l#(}8`nvrX%KNfSVnaH5P%^BdS{YJ zbEYp`)MPH6QC8yCPM!RuE;-ALCA^BDA@3LoT}ZmSyOF}KZClrQL1+CIIoFa*#=sB) zP1kX)48n2ILm{MP|2(elE!k873DS#Ctc z5{4<-dK1AwOGk0*GrOvEAtTo2F5(;aP$zwqShiRFq!c2N&iZr=ua*%*I)#I2Ald5U zvB!7Oo+_DKQd&KEeSITM+hMklI7*RFE&^!Z=J4$9bsTi8L* zcefKrXDG!$_vw(aP`ZZD#wKNc_`@GkP*8wrnw)v&nVfm%ncRHy&HU?M-W=jLzxhq7 ztE&Mx;e-=7;e->o`|i7W;DLPw!0a2AQP#2GFp%VPQVZhrjmW*+{}qbLj+tlZJV z#eZCzTOammLyUdP^87sh)nlm0_tTrQx$VW>{O})dv)FvvqC7S~^CM!dj{$0Tz4f)n zZcRV^@vjDRdZ4ZrmtTFxBZ|r=Yut9ZM*{uyp*$+5X;e^<;3y+uOBCBW3FgSk{*-$?|dRlOZiS53Oexnh= z7cPnLwN!43agL~)VCb-l>#C!bC8*M|}W{DQ*{^|A8lGAhbOx-$Ip zi4>=w6vQybel9D^wGk2D!*SY40Y3lf2&bMnl=%6tcxi;Z=;#;! z{If&Ms2%IOQe|W$PBL43pTrh{p^N&X#+R?cFlLvFmlmdEF z1Le?X-S{#anqvIm^jch{_|)xdhwjR+@$wHA@~PX`zUQRO5l0-sRaad_AP}ItyPLwo zLTZd zvp47?ue6BDi6!LahX@pe(RH2XcoIWuZbflag1~hYnRuF5M<2Vk?4fH{6H{EB3aRHj z9l#s#DIii_MBVgqL}3U!W3qkK7S?w4;YTug@+1{cB`I$275P&4WH;r-w70ZT%|Pcj z=qfZAlIqltA|aXNn5@?%K277i1@kDIme1BL4Lq@I6MH(lC|4i@L2S#hOrfl8ZU%p< z7m__VEd%4w!F!jw#$?yU_krwJLI8o$mt@Q0^;hKA6)cHP&tKza?0H*OuQ}D-+luNR zcnc$2xia!Z146R9VFz1Z*?L98y3LczGY&I_pGZGDW?R|lY8O&zkBCwIT9Yv@oNI$7 zv*USX$o8PnHQf>jMy5e~GOFITc3!ye{(>H%j%k$|eZs26;LK!wr_1h z7h!}D$l6Ibu_Ssbojn6Vl|O{9q6pJ+Xn3s^VG2037TMZ~-q?~mu9lz2q`VOA$#(jT zMqf?cB%2F}<3DmN{*^m0y9O$C^iYWD6;;GD zCK)$@z-7Vo83fxpNp*IS@lwnTC0!{7NgF+0EGup6zbvlhr7`ti!+v9+{@W~dPzu%7 zf=?+#z?Zw$QBBA1I#^qF<0#NHLBI%rqeyJtiU2D7K?I;Rbs~fyDg=HbFyQwzn2hMZ zS5l|U1tArN^pniEB-4FfTssO^ft_ujoxK+luZl>+BON2spwbt@pUQaTouLnvaEPsCP}vCu`jL+P*zTPQ1|1i5DLDiK{bD z4RYqGW5-D^TCnd4vu|BC)UIw{M!$yP$$h^3+0jW7Dd7v3MEJrb`&UV_wZZ1XPmE0% z0nDg1xcS)i62k=tDMh3JT7k+2wb+kX7)`(yWEKXqPs%ysW`*m$as#lU^Q zLSS%5@DM!n;5LSOs*dALVw{v2$2i9Ep5W{=gPeV)_k())9D{HFsE40^FCR^V_70cT z>oT}596raFn!^}E^r7xxl1qCNAdXv$Y?`ITE{T~kc$f&ZVD<9j+_0Q}WvHZ3d zck}3FM^hMDPj_;F!1&~mmGq=69(%p*oonxYBAHC`qaXc<)vH&dlw$t;`CND1b*x#l zhWh$?Y}@ACbI;9{#TOM7anC*X@X?Qclm{PtaM<3IQXr5zxB^?*bZQb16wR5&N4|9? zrBf?%#LDAOt>Hg^@JC!%slHgUue2mT?~gb9mpJP1y4;AxN@jTRt|ctJXEFIm!h?L* zEu|0vKa0M5@$d3xmpy3N?hz_wp8HDW+G94{@rc}^EKa}Rd~4UP9hqnEdmvheAXq+u z`QQ7bd)JkJkR_cK{_ONOhfw~K6%PKmMp8M0Lc;3 zPd(t;j++L%!?kgwFE_RvZNKk-fzrMqghZxIp1JM*;tt$TxJqFFr9x-A78n?7X60ui z3|)bIp;6!3!5!D!HdhBuGV+Ny(i^b5PS$HD`##$o^v-=(bNBoCIF4gkdqRl21 z6NqToBdM}SR+B0znp{ON;3pCe5jW$c;}%wL3{82F?6wp*v!*a15~lp%AW44*T8)qL z(#a%tZ6}r`Wfb5)bSAo?6Z3=A1XihCkUwd=i za5s~ErhIxXdV9!yM4&qsm5!oBKuSu|QuFR%uAK@mm0h5uL<$X`)G!R4VA?|33hYd7 zTTBZy3Htjz59ED{ibI0rPrQt-J$C_C{Yv|*f4e4m#3erqkMK|%$NuA*EC0`_<=;y@ zjVDj~CY~DPV!Sk_C+nm$ibT@o)%6x0}m&;#~mABW4(o@!Qy|E5)23)dosm!H^m491QV+@4xVZJ`;an4HK$Pb;rVa2 zzIn;!PTFD_K5;|^e|TYcZuzI@Rde5}CfqT~#NSP9+B7uDam9)i^!4>IapFYk>+5k{ zcZg3xS63H}jg1r*jy@A9`Ug@{$8sIITn9??IQ}cAP%>>GvEk)cwsP6GZ>6U%;k^wC z_BM5L!RM}3PygemOrBJR5CS9Q=eRGPLT5)ed;j$cbwbN2A2Lc|1Op(QCze0H?&>wm zw#~DFzIYr&Z6bp?4 z$0n6Z)1Ap+gran{_n{j)CAPxF8;5H`I?7d!)t?@-k3Ab%kCYE8G}lFH8np*aqozE9 zD+RhKi1yg9s|mXMvRjUQk^;{#HlbW*Nk2hN_mv^gpK{rz!|`?1%sS&>w1}i{cZ?k?cCu4g)X*RK zDDa1MW*=U|)T0i{_#^)1mT3kXmh70f>!nu*9a5koVe-oY9C_*jdZ)O3*Z_rj{}B$Z~w)Aa24U*4asCPY=3MNFhK zSrhHCK8!&Gn;Q)hol?x4lWQ}q=5w({2l_CsqoiYrU1O|{Uw=!i`@u((qw9Ic@qxwqP4>I- z%X~R72{;$e>$DX(7|(a+0!Dhbj^j;YoRk^IIL7gwAdysb_qeooxcut+7>CdCkr$PG z@#|e&_JwH9XzsVS#Q5UZyJ%Qf$)W`T8uvOh?6jFON#~j8(j31qz|%|9eD2~1PcKd9 zT=4I@FTwJa8D3vrK`%_@tv=ECAOQlS-kRGd9L#2tzcV&Jr_?;`+k8S zSac=R7L8d){PVMBaNYR_v!^@FZ=c=4HH){Sl;?MH=ki7_onMn9Wu{CBv8c9)FW>$8 zJKJj42{X!dv@EN7UvHZ;XAaS5l#LrV4p}~T?p%tCiPOd2{%KKF7hP_{Uc>M;wO9&j-j%iZct>ECa z0AFLP{Lh zRSL&Z`w?*)amO0ie=s0{Peeu5GRmxTYP_VkzMm zGT{mkxzwfX`-KGI5KSBOGxX_6%vhR+wJmJw=wT)bKLb(nx(@;qbi$QIL|qMYyUm{Ts~Cfb z5yP~pn^=NR2L3K>ZjgQ_c;wL)Cj^#73{vr&dyn$zL9PE&W)CEAbb`n{EeKm`0C#Sj_h zN#zv;4ExDDpL*_q55khk8WKKr(IavXp3wz4B@ zjyQj6A$MMS7?$I5T~^L?=ZZc2=!{zG%ED}EP4Jm{)vRdfW^?O19I$3*%7FWaFE&kc zl#M+U6%}#il~;1tU3al(&z>Rc7A#o65l0+BRaF&FJ@piQeSIU|zj#NZcyhEPl{J0* zVa@*aF_cnb-D?da24V%3MMR6DG&l89tRP=XI)T1;jMmncZ>2;2^}+Ij)3lO;g~u$M zuCHFcn&y^vV(o2aFfY)S76RcnD5%VjtBgwcO@|;7O(`Z?HkyJCT_Y(4f$XtUVj!_e zml`KTCNNbO>}YCcWlIZ=QXF4WMoA(=TVF3q(@;KLp@ic@c;>}Qc@;5PqhS}&6+~Q@ ze8+uTiBj)1G!*H!PB#DMkth?ZKB|}Gomn)wY(vRWr5D8v2_cB+J~}0I3&D&pf2=z=p?F=>l2>cHUfW!?D;5_Ow!rV0 zV_rXjH)69LHx##!((miFg}{>8_~EQS2?#X5kE*(9kIp)7+P|KC{FMiO{PB~{D5{CH z9&t$Nna)csU3cBF`ewf?%g_DR*{6kTif->x&QVuie9c|LkELpTUGkl*393Nc1G=?&?O%vJ{T(vgDBs^i`EnHlams+|p3o z*40aSGRYitCTpHIg>YPAJNK||yNTXjMf(eJn)kF3N+g)>xcD^B<3idtYhGN=Ez4h| zp{IxHyeMZLdJr3W6PTu%r8oiQ@_OT5nvzNGS@sI~MFkX9R??kFFn!l9>Xgip3Qb#g z@@Pv7N!Pt-N_pu;N7hu}bSEI?c>XsEgbPxaK_8yswdlY9$^{`2Szn)=0rLn3`I-g+zju!PgpX1v)AGzdd;|Vi zPqenMQMvyyYu2p)IFP62I1ZaOZCaF0r(YPdV)FdEIQ;y>4&<@k5xjiQ^E9qL4xq4x ziSthnK5){-{&&?V&(0`r`A*{c?d$CSH+)?*sL%b&?Il+pG~>WWGQS`2kx#Z4ze!R? z;-v{)0l9Lr{|0`I7wGZiV;tjnPw=Oki*ueb{n)zQo28C~ z2WIxdA&IVgelY+i9Uoxv(lp7G;-upOoOFDE@BXBRb+4PG({M~SHK428Mc1IaXJF8M z^x-}x)(m{@6&Aex_=1Vm`W)E=ehoi*xSmVqSM$rqx4q*HNB6ffGC2;P&-YDW-tgrG1qJ;6_rGV= zs#V-_%Pk{zcjJvW0^s-ix&8Lr`N9{zzzsLtFl3vPC)cP$`qHA@@dg_Sp;)a_6i=_@ zxJynNGCTasU;mA54J{0Z5HM|0F=CjcArkhJ7YWhncA}&~k)x=PIvX=-?!WKZ&+HER zNLVg4<)!@Ucb{kGq0?z-Y9(&=1*$6RwpCVFvsa}ER~4^Q33FPoH$?#&g;}Fr0hHMe zmheauffwc7W*8&{*r5Q-p21Od<<|U={tvw{k|-$1Kig?C^JDQ2y6$`wt>5cH;YNf+ zC@66u&vudf>W>OJAcOb-K`Ov;Xnt)YudZD~w{XS04;?e>l$jr?FkMFla`#&d48r@7 zC1p&ds6Kcy(OHH6<10Gos=wZL|2$ziluLt7;Z==jd7=8sBg)PX<()jabyD?jc0B&< zv3tAwM3oDH(Jq5Hj}wO*`9+7hl~Z ztM}%YR}|zQ619CV>7B`fa9KnMO;k(UA5bXIFj(P9QPSCJpxiUtf35;4HPWs_tFGk; zq)uhCGMQx8&ICtInaCN3A5C>dH4i-SAS#_fXx{g@tz33=wllSM66b#CaE`2t($?C; z%73k+GnHX-c7KlRvb(i~f|<2^=~6Zunj6{Z_jBy@ zYA!zI1d5}j#9m&_cFRObkGwG*n@wA{u~Q1_^78rkiH9(4b}i37yn;Pe23H1=c#-J! zyINmpySgqmn30~i5aon-qtm^tr7LEhc zr+8miA3iR?^*6_e$6dbsxhR$88WV~n*WMUo(E@)i9&uKkL369K&oqDof$3BAwRlEn z?>&mAexIX1vroCtaKzF!LElh9;g8E3x%%vxJX7C6Nz}*vYu*L#HmM~TsiWSV9IdjCiX$ARezO9Mrws-ys6cdC_tAG<` zPbGiiK*fAsB*3Nr`CDR%p>g5Su%9n|=0xN$6HMtB6zMu`C{j{l3Jp!TOxME{PpnB7 z3D?}()$L3!FA$n0L)8_PzGB^=BhfXX%%5ub)W^^MLn^b=It^H~#{1aT*vPDk0%P{9N#~Um2Qdr{-3d{3Of`MazDgrq+m9@Ca#u1)Ts6-;90nXSJOz&6dN}(x*FW_fFAgCr3LXeUoH-5KK^a;U&nkvpXeFn>4-^@q+c?d@k8CLs~ z5rX_+9{GVXrqnw4j6F0=nuw?$Aa+e$61bEV6;WL}fu2x|;)N55c3LE!e;qALE=a&d zP?{g+%#YO(>u$y|GaOu2$@W2GPfZ984u+|mP{e5`Ovmq9wAI%$=b(JHFIKs`m{u+} zE(@ZCobah5iEZm4zNd?lvI;iY7T_Z&JfWFpXdyv1a$aixpS|-Av#YAR|7V|a>-3%} zDU;p_NgyOZ2vq?^0xwt)5i1}9DuTW$3Mf()M3JT-uc1gsIzoUDT0#;^dYNQ0z0d9U zl>Pf--#hnCW+si${AE4QJh?gdoPG8^eXp~=Yk@755+(h6v(u{_nJF34HH6nh+Kx)q z(oAJ14*f{pJw>{We(J3>`IFtQN{^yPlWZ0i4Vp{LZ{Qdjx~AjRbqt}%Cj;pDw;di|)j}vfRC%Jp`0^a))D|Fw z;El~)tZm){g=qPBKSjgOr+eE!0ei~|>-ORjoHU} zFg~29cTl{uDoJOTIzvi|HAd7JeJ`tCeLcaLTBBba^;^r6`2B*ZlQL?XO z;*8UReK+`n4)kE#@Zzfp?)#ex7drX~AAhP_x@ zA6Vq%2#!By=m^NqFoG11`Z`5JKh*?0I^)WNtgKh1JR^$zoHKs}kFDzO`}goW&D{Lu zDcthasr+ks(=H!mKTZULL2kO~Cbn+f%H@||K7f$P&(FuQETU2Mj1>q3IP}m%dHwa* z2WhQ;d5SJ1<-#D^9OjipFLCgh$52vHfTn3Im_MCME;@y4Z+b+TivrS>TzT;+%shBT zzgF#}Menv|Y6*~6R7rj?h^1*1`Tcluf{Ywry{f{EUVA_+(QxoL=Am_H=apLiGrlnK z0Fo_9f5WD&7mk=(dx35Yvpbe`{;}cx?aUfAhDuk%Ck1`OWs&&>ZptG#FC2%?&a7>xDN?~r#Xx_`F+4Ay+%t~lnWsVk03ZNKL_t*VIb`&(=k%Q5QqO3k zyW_?6_a(M8dUQ8s*y=iJAf8P)2myvcSSB$19+Hx{X^WeW`NoknZfu%rB$8#i)bcb3 zZ(gq7apGA^&%HdU*>$P3vNM%3pS(aK6cfR!!cobNP+Q#8 zN$QfmTx{0@G^8!5f9b6vnM^*Ebi%`2S7O@^k=E$ZZ~W!0#S@R2_);>GJi23b)7`Bv zyQ3rU`b=a(Bh>0p>ZvAIYwH^sfl3kc0=XU! zPKzWk%)k?{2*17vPAD(eHrmsKTYw!@#NW760vrcWM@6Ha2slUUtRV%vM@UbUU3S65IPvnaG3Ma*Pl2QkKB zhaJW>*Ia{?64Nv}@x&ARkutijbMwtNQ(Roknl)=U=bUp`v}h4`-F4UC+jBSZt$8(k z=dj_d*w#x?&}2$wF1Ih)#t-g&AAkkpi+Swa**x<>8-)Rrs~1jW?$xictur=gduPt6 z=FeZ9!Xqn`BJxjPp3M38eZXBy>vz9Xv%Wf=o~9qsvFVyfgq9UATF)H+ZTI^HWqYQ| zUG%#sPu(8ppwD~Qw#MfEYoh%A*?fF~eXF{;_*dO**=jR-l)?4}hi%(!{_wj(zI#>< zS6th}%;_Gkx=fu4jswRoY-QwdgO#sV^tJJ`%eyHm)R=id5x4v;%uTn3_`!E_x#{Z6 z^VrL;#W{9iD^OZIg;3vQAX8lHsigKNvUYGA)*vXxLD*8C0qh|oW12&^fYqKvq zJ-|W~F>@=*$TqQK1N*Tb9|iW4GW)R~`|+{k@4c)nlOc6%7_Yby&m5D+e@p~zrJp9`Sg+B54ZMuwQcPLdTk1Ymtt>Fl{}a_4iJe% z;r&gs3P-Koa{8U6O%4Ibq%6z+xA&Kx$nQE;iEki@|d=y5S?Bj z38mwYQYA~8Py=B@Q)G>BA=eYYEh%Br83(_GB^NnTmJ3ZD>?GvD(e935{d=2f(QQO& zF#wjw>*ys#0~{l3Ju)PhH6F#9X)PCs5dw4&HZA$ zr|rbh%^QuD=T{lQNEC0M8o^2tGoFkYDu5=i9k3Ef5~gldjQCosl=5fGm)~a0^cM;| zIihZRivSqO);=b)=Ih_y_{QbGyuz%hygRmTlP4)eW?fnExeyM=&|Q6k&;u<=kAZX( zNU5pvIO(Xq2rr4QUY>d4xp|$^#c>@h54;mkesOhOh5O7+7P4W7qW3h9bMadDe(H~GkKPvn?_0M*Y{VV3hetzLHoD`I)CF-;1eGQb4ius@%ktB-IPV~Sd`vAD-2cI#ZT;eevHbdp^<4k_W&keOHi}=KFm}&KnSvUF z(lKY!vFXo1WZhfV#s9iKy5Kuk=ZxRoCK@(6JaBE4>lYU=db)w@z)z3v=J7wrIPK!V zt{d1xeEswwzxkQ6zPa(QA2GfKU`-cW>*b!c7v$6kK*yPl7l zl+l6PQvaR-3^bclhRs(4zX2`)uK6fCv>*GC#(q*}KlWokK6d=$uf;=tr|a;ui}Lu{ zMMIYzU3N)-@4UGOd6|2Vcffq3Mi|_E%i!xe`UqcNQqz9{%BdKC62an~jviV=35qUy zmWdU)NF>|4;M52kT{>WTPfrg3OO`C*lv7S&+_-UQ znnpuI0~y{>(w=~i~CNMhX@$l(q zN?l128d8`95$I&nb!?zVy87mKlf%Q(`MwL}2#xWY4?_q%sA2bJ*Y-;3QX&jYA?OA) zDKp_IsZT-(BoZM7u265?+g+Q@;X2m+GPcHbwiDO81b~$a!RuW2SaP-u=Tp{`mzcdL!DH)c%(d4IJ9g{{JNuw3xt$QBU zy6$$o2Fk>CHeSl@Z1oDM-?f8pPSOS)tfYmmtD3j)pu zbz6{?Ae1t7mJT7;B~VgC^{8^otSs#odBFslZW^IzenQ7A+S-l?MX_=5Ao`4I2WEB& zs%=*#LnAU2p-G9?Fv+j1AXmDy)oo_wt6O<=@jLhu3C0Iu!5wc9)b?=H#Jyy*P9u zqcPPtL#G>?Ew;reXCF<$*vdXaCXuxGpKn}4LsKWD@}s)CBlL!1eD8vrSoHTx@%a79 z;M*f8m{UsOtckR|vWnrZMCe1`S~@y9=;-KR*sx)Pet+bVNAk)muk;Zx%a<=F6bdnS z?p&UI_SqrZ-BY}_sgurVl5yoZtZ#`hZ*&pg{>Qt3+C2Y!vw>?*oj4>Z<4Q?ymMXM2 zX5;RSY4fbFO`@ajO4`<41cX0$&AzvBqw~wkG5QcvtNz&Xu1#){#^~wkG(VVel!v#T zPJSe$Og2tD&d-HE>!NO(%@K!s`StI62uCD2LBZlBaTXlrrEZ(fD@zl6=>$J()?2i- zJIp^c^ZZp)W#IPr5?dhA(*kJ@(QmplrpMQin6PN}3 z85m4Ho5r=k*{B%kTTu#{{n(F>6#IgdF@OVs38}y0)U>pgd1LBt1+Z-&tZzT|V?Xv| zKeACi@j7OHb>!~M8n;|l)PHuLFCvi$k;uSk>TI;Mw9wMhveS7K20n0mrKHMoNazMd zx}P51rB}Fv#@wb05z<7BAp`+ek|Q*NE_fUZP3UOCM4(6x7pO#MEC#*0a);4{AjcJ$ zQV|~ls6|J(HbOdm{SQi4+10iL2{u><#hM(s#Zd^O|3Y=SKs)MuPC0R$`R;fmw_lZ6Xlze6(5bnBf)kY{4w3%xpmQ@H~!BxmnD;y=DN1y z+D^i@ZKqw6Lh71c;YuCbG4!M(s%#<3G?ixL?KjX%DPS}mkA&Q~MY1b$kT19339spi zhH!FSq4$fi7E%&43>M5eFjh8i@*mC8z~dvPm-onk$MI^e7H$aV#Coh*k+ogtZhGMP zDJ>06qRMgc$}A&ey+4WF=M9q*(&S4BID#G%I+7Lv%V2nIE%{zkT5(Bdzz`EFt2pqW zgQ&ajQQYoc;`zB$*N&iYq@P4rgi$qRT=LBmDJ;o>c8e|dK96kg!tj`ktE?a|5WtPu zRMix7?$?gPk3fc_w7jsAWL*m~;HP9_El0Qxjfn(Z>KGQI0s%4W;8OJWw-9aEj?B+x z?6k2|T1mVGg5s)RB3MLx#OQH(=G4ie_2FmfX=*~4CgXfQyrxFGN3dyQQ?fHJV$QA^ zF06uFti~3MRFt%o(nzb(`V4iQq*A^09V6-Ef>e~WI#*>p0a9WK==GWSCsy4P%QdEM zTCwraIdcwtsC;zJasRpZwW>*n&RWtNwVS(FG<~&Z!H9F+o5laOOY5jY=|x&Ll|aRD zQ+eUZWyE#YI%evmzxzu|X1BJrQE6M4wZjnw`PeOO5D6g-jd;SQwzQa<1yd1Prex;L zWgCb@2UcM?j?0qeb^Pyd?k1-&qjo?->-suE0Lwr$zdaq4YP|?8bLCm*KhfVPH0 zMMVW~yzxe+X(?%FXrQ8^V!*tXWql77PnEn%t))eDy`?U~Ay zEgeyY<$EzSfjtP>a^d|S@Q2eTQ<|gp@tKEI4@uzc6oEoP`S`PFTc-iB&F|XUJy%3K zF1b5*w_?3>3pHXPNirt!_|BxszE0a2e2zGWOjWVyLL+ zzXKPgKJPBZ0l9lHe>Nh(+Pz$MKR)BwTT&(mI2Dywepu@NyMs-@v%ozlGo_CL2ck|q z2WUaz#}4aC$2_jwH(mea;7G*g zx=+ig_VFQ^WVhaaeT1k07O?fr-C-dU_0C2 z#!W51tGBc=W4P-iK=WV-jS-H4rTK^_l3HidF47Q1J|I^@k(785KoeR|crs)RQ$CmND&u0yu8Mu3o%%$=E>bjIfvijw%-EpS!IP!?MFz*_DtC;V0ORc-6icmC;;YjjJau`-vOYYdB?e+ogeWoEiPQ?9M zcTPib-ndFg+Qj`{q~C|vqoe0&lou2s&>-TFa5Vx=70}pCytDv+O+E)!=dp0Y*v+OE zINUqVf1kZEacFWw7hBtV$!Tq;J12)u(`5L_LZ+WIqt^sWaiuyFyLGi z0)&bwm(e)bcB+ieNH2gT1U)%E3WT|B^DC z1IA+~ZDd!7qDU|0rTNONI}6(z+lj^ozm6s?hdb|EGU#`Mp;U(vdqBzrgF#}k{yr|T zSd3tBV3~@P@@oSo?!;7l?&w06{roUIhQ|2vAb)wej#oBxa@2$pY*&)7GuNze+(r|E zJikF_#2V06!gjG7$+T*v(zP5((%H*v-t039s9*j=dKv(DcX5(6Z&*y6v+FqOiE|8! zDl~3BKg_}l{cKugv*h7KT2Qx3SP3}`r3UE-+Zp_Ra{Jw3o_sDwI3lUvZu6(B3;RmL z=gsl*@@sL9KElV6Hxm5)&&3R{w)yrC)r*m|dS*v_=>$JNyrh%nR)@P5Mfll|@`ywR zU%zdul+4a9hnBXzzsIz;IbQ+3vKzDh0+p_`EBqg7JaiFo6KXuLD-1)45cXEm^agOq zUM{;IpKD&8o9eaz% zPz>mEsD91jlT{Cm1)e}DoYKev7JM?@0Tfx41Kf|Q4%iV_p)RJ`HJ(SIj;DP^%3KG` zO|8EI$U|L}??jn{Z2>OKn*Rk9tDapmd^u2vA}+s=V&!iGzLz!6RMf@0hYShynZ@%j zM;?Ct&E)@g48N;c>p$Txw9&HWa9Y+3^}RqH!=H8x>b}_4)^=fYbMtTa^~z3}Ir-=! zVP39o6+58cKvj^`O*9<5j-#w191F-q(K_ikTA?e|gPZyu=!+YcE=aqtO*AtTyWCeQ zvl~dK0}V#nxEAPM{0PQLlNt;xRDul}AT&g3u&GJKE`x*XNY_E4EBDdt20v@5*Fz#* zdKTN-&YGM4^R?!Lqc3aN$}}M;#-Xo}F|95TX~A!Q7zi5IHy{$Cw(FhxspUfFK;ffQ z8fcoXqQnz1gfP&Aj&NlvE?uUgg;VGwWMrQrM+qId$+G$<;|UwF_d3w}8L^HaZ+yCv`8 zW@%09)J#e+`qF{4(h9V^AiAMv;@s20La0(ZM-v2e81GL~S>vZ=T_a8Fo4>PcOY=c( zpnY!2NG6Uhrt+96IJvp#IXM)aHivLaE6+XfdUYfGq}nSOKQ^BNe<`(dX5ki<<2Yb0 z7(=`xL~~s;U0afrjn1KRS`7hDCH`^?XR?V?RYdT_F@$0rbaXdWg_}b6=1z$A6*W?4z|3tIY}^@4yby+a@O#fqo$2Mbot|}3JUA$F`Sv6i6>5ZDQ@>3CEnK`2+kZ)*}eE( z8k6zV@gT7}Bd;BP{*mh=?U6juA#?IP9*R@mJZ?BlboCmv;zESi2MG(G*CgsdY;`mK zsl)opmnMy`A>j9tOb$Xc`aS&Prn4z5uk5?_xlxz*A6!gi$$Dx{f4}sld-MG?40e(Y zfzHlOa&!9&2lDdr=OYxiDywv|YNQ0|^XPDL*TwGo)r02bT`lVI3$FZk9`{}qIf+7qd|@(EV`2aelu4%^VB^hF2T?6fFx5^YQpoF;=~wq`Fe4xJaWQ z-$UItGbhE2=rF*{B!E-t<{FE4MO6U8gLV%|dk4iDOW zW2>wL6a-y{L~1%^Nr|wt$PnpZ3rUO5gP{q^qw$ofXg|}CRJ^nXQd5I|H~m(9N2JPT zhD4go8H&VF9w@?f@S)+uNs&0D`sJnuUCJY)HNBL;bpemd5bgeVzy(6dI4hrdvBvdz zWK~Yk@kCv1t8FtpZV8{1eWcZ3Dj5Ku5PYz`k+pZd{lD!?SJqC@d=yFpKLYHu%1CBN z6jv#j5SrR|ZekE$msEKg%4oNDV;w{iwdFO{;kR)!g;l9U9|6b+;f-rT((Sb9YV4F+ zC?Z8XAv6Jw;gMKwiIldRa1w?Wfk)_SHI9pnC2(6?NcMWMeO`1!$3Xd_xQNtYs)N@{ z%x@C&d5E=0TqlAnDfLTnbg}EwwXTVG>)J5dLnOO;aSV;|D+>rz`Y8=aqMM?iX>4hA z$TLFZt!qH`gb4>tdU`sry_q-ct;q=Ct#!EVVT`S9xGr?b2=TwSVR}6X6;8DveRO&g zHlo*}SThi=OF;9nz1^axDMC0B8(-`5kN;r#W^%++-^*4on!oHA3(@p@d-pz^ST+GCAv{;s;M!Jd|G zXUoIAmo{u^teG@ra-MEE1k;AeLV%{>G&QShi-b5X?+|Cxq9n&&d=kE*AObjG>L?~p ztl`aN8?dtyn*x3>=bg2H`9~gtrt5vt+g)oK3HL-O4CYa&_g8o1c|3bG+T6Bn8)L>~ zF72jiGIHcdwrv~uPEyzPb(UoA91hOAfZiP^LvF0vcl9UbCx!{(}yYCy%2{U@y?hV-tuV@99?>If+(*}L{S6QJm^MJwgwvRZ} z%ddXd!;{a&m_JXEmbwmy%=U8I-CFjd%ij*lS*4{=L^zKXChazLnN2z6+cQWr(lxX2~ltJ)+@6B{SJ`(KC89oK2TA1_^ z^l2eiRD}a4B#xiY$3D)$Z%4 z3&H16lDm0XzvWg`N!T^OwA3=!qnO%GlrrgN;7cg=Nf)Xv@@~`<;nLK)(yuGdL=Em< zKoJZ8MXB{1o%;XFsqK}1p07t;1b>qHov)*ar=jfXN23%cGf?~IUnpWOmTI#Ycmzc# z9YB92(Ye6aQ`_ac!1mPd1}H@lISWuqsdG^K9@KIEJ5=;tVd^)2k3nu)L*SplA5djV zi&09NBGh&}0(b>=tjq`QMadV((ZBR+JJ150j3RtY)ONZu_4k>F--CAWEKkuV-H(qO z|9WiCA09qF1S+YSxsYk64F9BivP(qTH`B6uz+{idBZI-3id@ zDFue6tHJq>*k!b|8VpKY93jxt#=pWy#r3AigcJ)S?UXCAkx}HN23W$>Gp50=lrCh- zYWjDI0fx7qQMf{oqZ^!h)=6tBoIY^)001BWNklU}yqENQ7|l0J@t*WP7;usVwvX zC1GBn6YuGz`@P0-!zNaRG>?avEh&(x<%B^p6eYCsgTp6G`TVK#7f!n1z&R71Xs&NO z#&VKVOicuQ#kniXr&QdO*kW1HmCawR(LChIto`b`xS=lGFt|b^sih*YCD=mr8B!-S zfi1w*bWFboD?f+`2B_6Fq-CRpnvvZhoJ0~SUA9S!wSU;aq@p6wJ><*Oy5b3XVhKW0 zq5?j;z^5mGKucEeI89=*I}cunK-PH!oosyk4ZEd#R*3cU12&C z3EBa49s8Z-$ebV|=qJ~wwzcf;rM0mI$8o3>CJ9p~nHxaQ4HEGA@E9gi0PzHg?g&XB zE?rzHk&Y9wkim?`Dr@&;pARDIYw4(SP18WQxSBz+)RA#HqVwtXcdWmEG2!M8^5YgU zT@Y(%omo11(zIbEWp|jS$LU?y@_m1Po?bPh=DApJd_=qD%=Ii0e3b`)1<7djIuIinNm?v zfngZ5w6tK`Hjh2_7kV)g3PoPPT0ghHWyJ~R6oy>Xj=EpOtIt$p)ca@=UTV>Y+GvX$*!aawv4oISUOUp%%BiR4@JYG?~3**Zjo_Aa3r zFna!cdRpfaYFyf|!TI+Sw?vm8cy#^(v5Uusy7z5{PgMK)^~V#u_DF)?Kbybvg+2nz zobJKvftzj(@t5l|x8cL*dAa`PUM5d4DJvbEaXDnRmrW}wDK8uR`)B?W=cvQIn5Lko z*X1`?_b_UN!HAkqRR)cN8k;_dQtE$mi1{?sSV;gsRh$0P!tc^3g zf)R7Q)E?obe6mS?jX~NQFcFq?ZnD_+W|GY>#cAI#q;Nw+5fTf4FOnJXe^_`?gWznx zjyq7~#AsCV=gq+FC}S}nir9D*I3DFAG8c7n<)X@ueuq*(OhJ(s8&Sl9iSo1g4{E?( zfhtXT9C$JH{{)JJO5YW7Q+)(Qdi*r??+O(8@VC@wP~^#u?0S%la!E%KDYJp07*R(eB)Bk4Uw%6(vXPMv;1tqKKH6QTyiz6e%-5wJmlm<+%&xm$L|Ud~F0a z?8f^4YoJ{C<7}(9DJs;MGRb7lEblH8M?Y@dbAN=b^)|ow$;bZ?v`;Z?)OAc>IH$CWCfDGgl{j41N6tuu!0O7eULB`H(H-ndODZuhI< z|0t1{mxssWp}oC*?;9E9xa-w4l7+bptF2*MM;oiRuB9~*Bc4p4IcmV>YN>&noy4hM zOIzC(3LKY0+o42ijL=O+pcAmuCcQFM(xeEEI5y250~>V{4!V+nEAa~ux`}iWWIwaJ zKv>g==z^Fga8e#98iESjAt)v4@+{Oq0FhcB{on3O2X(6gG@&>t2V5zoL?VSqDSEQE zh)j8B?2Gp$ne3=f0uu0+7EyKlj3;AVv69}U9bYb(Qtu1>#M6q)(VrLZIk`FI_-yK3KOyko7CYd1z>t`g}@SmP}0F}=|+lf zgr?z@0*{nsYu_k|T69Z;&)aVp$OD43p^S?JGC(N$`7e@F*J|B+wm65(+8RL%!i5 zN9fqn#j;^5f*2BsB+(vu$B`U1pwsDXlzl9_>2pgR4sy!e9UTSK{$Fi9~{*|NQ5;?uWZq#4NY3G-)vWo5D#fBJC8yv14tJh8o$nkr94R4`usQwq>dzvWUpeczK6IYEKXH}nITX$p=#($7n; z#yNa$hM+s*P%qcq2%kH;fANIhCkO^J?bVLV^x5MPeO@&H*WT327rq=PH%Ftp$K~Le zULL-u2=SglFUAL>4)!BagY&(`Lnso$1FQ!YrlwZ| zC!tJa{i(m}Q}g&yY8M}hBuGCgq_bB~K;_y05p_#`7e(fL14YUJgi&f12Q`3y2}RVr zxEp;wjSOJ{s_g3G-TuW28cKDNE%kf>rP>&UB6T*Q%$av5>(&ImnwmeY>HIm0Q;wL@AAa%bq!#4~BbDiWN{wpueDquqISF+Xbk7T8J_b z{spR}?bRXLTZkgw0w|*Eax&_lS5U-Dnv}U5MXsfNW{yA+H9OwPA4RFKYEY$1ckS`7 z{0!sKCu4l;{0?eI8cd#GqU(a2ZVeHOOWuC5Vo+!PPYRpsY*w$^m!iE-06B$I7&&hN z#=zL`Gv`$EyOSpn^yqBqh*F;Gr8jQ#1jryW)K1pep|Sl_~VbZGs*(;9I)6i@(0SmHU@{G^Nq==g;T7^UkBDrUut_ z>FDU-$}6wrt+(D9Fz;c99mWke+`xkmKFHNq?^@ODBIq;(JzbqFUA~lLMFEx5Mlij! z5VI%`J>QR}3AuJd!{&G>v3>f?(Q_rjbmMVip(x?T4no^oS-G*Ewy0#5?jhi$jw8(k zO(P~<8Ur4Dqbg*eAQ+Rj;|Fu387y@dGiU^qktD%{IE9o^2oSI>5uWz6@Cs&q? z8W9ym!Ki>hyuH`o(b%flZ5`x0S$;KomJ~f*IwewNHIAi{ni3Xx1voB32v?FS)EMwY zEcX#1lWHsNqw)#CQxZf5WXx@LEupY4+8GW;+d{f*>>(CSQfa$= zZ(%YeQZnU5Bmox#wOhi??PG+`eP{H9F@&3zL0_;sfFNPp{O6S=!PnmZ;G6jejQP5a zyW)k2wN-N*U(n+_K(=&MQ{P09Eh%v&p0t5;ssySJS}JbIFu=+Ta0P(nVEDb5LJ&Zi z0t?dznufF;<%MH9NGDY`r)h&52WLS_*(W{`dpi1(l0t3p$5syz+?nTkYE>m@llcU zt=fjt*k#Z~M(ATAFonP`G|CMx!#&=<{UaS$k+>p@h{~dc>gwt^>Zqf3+NVW}7V+SN z4^miINNa0rUzya0!R7znxt&`}Z-Tj3zs87SKMBk2^P5TIt9SIbu6cQV2V;KmBISAB zzU4nOgn&sW%qG%yG96nV>1ks5i;Lo~AAYL$B-1T>!iRMN;g_Okr2Z?n5-yRxawfV;HKW zD_dRD!Oq>$-$#)q2^0ZWm-XFZ6sa-_bq;MpZIhzZy5^(EyB!fn9eY1PslvX&|0gc% zYd2VY&{Z@aE@NDz9L_(6ZB)K^njm-|O3)PkCG8BzT+S(l|D|AdVbMubI z)F~P8XQuV^x&-_J(-b6=l6XRrm#fj->Y!_a(vpD$P%@-L3(Yj>{Lv6((>Y>P1A zSBuevpd#PP2~*3sVg129_;bhU>a~?|a|ls;jQz_~VZ! zJEbWnCx;6zxPbTHe}AX#Wna*fnkw7aDwCAYo5+#hK7qW70?dF1Ap}o9znmZb^fuwR zvQ|nt(*Lwq+;i&%%sfDas7Y56?}^g3atkm0`B64EMVTx;%E868a5OK?x};*x)ZXed z=3O5gUzT)Z_Oa2e?T5enyMO7uTU*hNJjfb3y)3cfs{3;qLlJVT%bE7WFC>>=@i&hz zCt%Mx<+y8o6LXha?N*hHNISB=@xo0{JTpb#-b9Y;rUr{-Ooyebl9~E`aMoouH864| z(v_(j{!Wrk_6a`W1Seq#tb{c(5KUH$!63A*IVd80OY?ZTle#t>%T1MoLCPJO?4v{i ztDOWR#*Ymhc>J72dDDlzls~$p)uW53)N~u^O4||oBw_j7s8f(=4$X_#cb>iW?w3m& zHf>`>BDJ0SluTx-oGs%~lJ5$lZC#~SG&ZMp_E_F~<(<^sQKy6HUF=6Y4<8lT{2>N)QpKI8 zTam7G#ZZc_G`W@jY^R7%-J^b=qa*yO5-Qil+PV!49nF(fb|eJCV-l1GL53!%0_bA?G8RYpJc_vc5J)DIw6uKuA%R;v_N@G9 zpO7)x7(Oe9buU~($JR#yx#3;=M^D@mo3Zf1z)s7GbBhGIMW1xI<422NK=f17e2TFe zRhD!cs^Z`@)VSbVC`*Ih)U>@YAKH)oP#Ek?n2S<747d`^I3vi(w-n*Y*}WTI)4LX( zn{6s*m=uo4tSV5XanhfQm~lpsf1ch>PyGO9W)iBrm#<0{fX?z&!zX?TJWF!0kaWbV&Y3%5;u;Ye29Hl-QgHonI zCNdm$-QTvn?JbA@Y-Y*xhdy1tr){{{{ z?TE#wvaTeyAr6@889>MYEc`;|k@NO{ zgjw{jD7m?U)oU#dpX=l9TZ%dVr=8q$e}oY=2K5aNH~hAMZ=b2!`tkpE;qwXp@ViU` z!0aQNx$cTWzW8}R5C1#HmDlz#b&|=euP5l~b(uHE%M;lgDL<0&M;*crz>=(N63JZZa?@=(~hlh{qvjo%@@Wqy?PU? zw(tCKb)}@SJI?K|Zo_sYH-BXce_mWiPi)`Dq`&aO3;q6o|NZxK_St7sU0uzlO`H0r zUvR+%JpAy(OqnuhXh$EiFD5pEm~;r01UU7qqbV6(-uK&;OGX_y;rn@;$GlY6(qc|XxaiUWxiiIpNDV60fL0T(RC^Efv_Y-h z!=#bV5UjX`o0JCzx+9(u!b46diL>2Vn3E6*DK$k}q?HsR`xdD_honoy5FGybF;e6Bz}nhA1BN|<%ZF(F0<>xH4O@rXcJ zxTbC3bWjsuA#($G|CQ{VR73$@T5!W2pYvo}Z+ zYnVnRl?-q!3)^wJ!|}vm&(V7g*L8&uVjwHrwKc}l+jd9Y{pm$AQi3mMKJoD4cn_Q3 zc+z^dqcJjPU$4fsrAQ_Rw}42xB>(o$NK0k8zHe{JpAv*a?nf9K`c*#1{ATz46`uTY7q8x+uGhLpu<*7bW_}~sZ=T_Y zc=^Gb75wdUtu(zm;9NQs<=?WWB|JOgHk2~q9F$q>o2hm$Btv3MMV0fsfGRIJi%e-r z0m?(<1yo7Q(W%b`srhdDko`;Jfz;m}WISaiW_`Z_;=u7aNO<%&28Ll&j9{s zw`TshP%!M*j6QsTIqul9Ak~FFo_Kfn-d1jDk8;P7ZT$926FBkaf#pF%;h7Iw33zl4 z8d=EmYua{iA=e2q$ab_WYoJCt3o~ZSAQFkt(2&UknLT?pW5UxZg8KUZ%8y`*+GX2oo8xc3&@&v#C&6)kC51TWd@$<&h z@!V8b`r${2m6H2-Z7Ky*tBTkcxoi8Zt%fJjpdt#7QZ>{`7M%}M$4WGf+d zKvcR+J8&8$hgUw*Q|TMN?&)j4lwVo!NX7K;Y$5JUY^<;U!vjyhUQ{S0<3?50+sDrR z@tE2RAAG;}2bXCj1@}d|Lj_3zUWp=rTr1=Cq8Z>?2;GAx7N_&=I;zi@O>R{wy@@wN{z$MzpHVu8QdwM*x~P{-ey<Lh>JBrjW^!~&QfT<&sQkfq+N!3@67m^mz4y!(U{VHbLo8?)fYoKdN$zt0|jg#7@ zLeu&U@;@|mO_g4Gj9r#b4GC9bN(cxIAq8e(V61njwzAXDG?DVKA@y&Hq|#Kmmy(00 z+R189+P2!>ABTa45D3jcrux*EFqZPek)%_@`k(XCb`<%f_wVQF)m3b(t^U6s{q?SU z_H|b+%UU^LV%vtZY1{Bw2oczfdNu@Qi7;3|%1nT@Z(6smebc)2BkISXUWILK_OgHe zEAp+6Xq}%pEXx^q?Cg8|3>E0|T~xrxYba&>|2HpL_v53(j-<@B^f!qG;DqZ6IPAx} zOmOQ%`;o0Qt{6a&{|My|^I>8}=PLy=0WP)`kKk})ApPIqU`{4OaFLq!N0gE8&afwno&O3%B9emq{tw}0W4B|c-q+lIV-cr(QIRm?$C`bF z48TK=$2j|p9IA$?2mT`t^>N5-505?> z8RNJkeH=Jlkwz28nVfuLfTXpHx5_DO+iri8p&j`@et3c~?c_nfN}KXFc4rRzFH9@v z>vPm)zrHKRkN?#_0qM%8Hn8!^1spo2Xt!fQn|l-3uB13;56TnlL^%UXOGze&E~hCg zE90j>{V6xybQAHo`b~bnpGz;jluIwYbeBewFVt<=&iWV` z({%vMppW7O6Il7|y95jm0axG%aQt2@sU`J*zw-aFciwSQl=mNhKU22c?q0v+fTMQ= zK@h|Wc8w)!R5Y<;iY1yD(=ACfYScty)Mzw`HEL9n*c*xs5vBKb9B{|=vbTMAW}e?4 z&tBQPJvb1f=Evvtx)Mbp;0vnNj5|F^B0=M031MRkoxYlya*P@#y$v|@DPZ6Rv6R}V3LW+)*+pwUw> z*&Xd_i>}9DO91IuY7nNmcTVhlMIn&H5=owW=}ijI7_WJ#jE30u{9FcOQUc1{w_P!l z}4rL7wx$?|)f6`k2wrMRfb7L^8alNm`@h z!XzW!x$D1DLOh8ybXBH;OeZUl zMHuN?CMjk97s!}2w44BxmthPlK}6yZOQqF15=|)27{_rSVPVG-$Z#99wIK`xnX(YN zo}uV@dPgnmcGO-uVZwwf_vU_Dmc_=68;^*`|dktNGnTMe~E;4Y)m4V$NWB?l0^;E_sBa)U%i_-Bu?@!)* zjf-C{;hw3rglaN6lp0F8GL62!w#$~^_i*|T6qzv#mGmM@V{^A_~U+cEv}%P(i%ym@Tgxa(lE!^#IZ<05gbRG3K1 zCM+CQI0=e|mNDbZ!_f53pYuHrzRZ@b*%d~^%ZqF&WyZk8u`H^#H4wtan^re~imRrU30#G4Qnns+tW;ss z)~(vV{#-M-Ef`)r;fR)thl#dZPdN8bmphsI!K#mz`-8EjVX;_?8M9+yfry2qgRQyK z#8287x83kp?IkKXNYGT%K<(^T`V)6YBX`KtP0MG}XQ2K}8~5CN7Awu6i(5ni_vPsEd*em9y+?QbfT zzJAm-trz5Bmi0q3bnK*!Ra+17NJp!Q9Az5oST;ga=|nq2y9sQcN_&KIKM}gV%SF4w zNu(f|N_(ZK--FcBq^1NMDfHe*9swPtp%T?@?TJi|g^Y$sX(HWz%Fm=n8Q15akdcn; zD2b9%l8_EHR+2;_jBMTkYh6f>Iv1vCqUQ(Dylza*z$G+v-N7Z3xJ(lbfhO&=Fe`Ik zbxrh468k)nQxs?9Oy8~-{DNV)rx9s6lVJ68ZM7_FsdX04ILSQ0<^AswaLJhD#Rp=& zvM%KV^{oVefWQeuD{G*(``W6f0B!@-MRbY#eq{?%D1k|n8{b7Q8=Ra z8$qDI&g{pF`0KIt-GdpXplbEzX8q!xqn_TQw;g(qDo)Y2+p5& zuMZliQ@JgZAlb6jV)8^KOvuR*gd?3d4ab4H`o2G#2bAf2{AuRkb<4KCmt2n>Z7z8E zjo98&%zZW#kGzKI=lAA|#k$%sjo~E6jw@!#Hs!ayzAnuAx-i9l7c+(zWc}V9Z*1nW znL{~w;!aaMJ8;z4B2uibh%u|(v6fUC@A3m`|oG*;>Fx`*IgOQ zPn$N45hF%$@x__qrCGCPapH+5W=tDjTp*7Y5k_G`(jqJz2IHd9ZE)Jm{V5pSNm30N zT*`&t`y-)nrfH-<$L(Bk@zFiZlD03a;N#~PF&2|ND+!t#LxLWOkqRY>W*snQlij0GoG$D6 zAA$gKa&nk9=Y)R{x1VpSYdvu2n9`Mlx71#|{=QdF5!<>|@%EAslZYiTl2P527g#vs zn1jxL_r>>l>F+Oj+ro)I8mAw$#p_Poa^yuvHVhgz@Q$1uSJX+yrIy0uIF1X_RyFM@ zLXMN!-qHdoa0`K+Oi}aBaz@OaiOcID;>7T(aWVt)3z#wMP-&GGZVj7!C_K(~J;!On zq~6et${`a5R~L`-SEgdA3ngH8Oy-NaTXX}BT zkRO(<$QYxO%+aJIgpDm_nzQUm%F$Wg<8~|ci(`Ti$oAAKA=2JJ37oc8c!AgQmrEn!} zN`+3DX3}5kc+EW*dX$uuFmBv98X6i{zkdB^j==7Yf%zWF^3;3S)@X{#rdW^o>VU`K zu#tttk~Rw}T1Z+u-v=RJWQh+`*H}~2(=umVe?Mc({4|7;EUak3>bkw5GyJT3<0k~G z=K{{=wbqsY{!{GTvwxD)>oa+0XsmXqSZ?9*3C2!0_`Jy-$ALBLQ*5fR$PEZ4j(25* zBGlE}RP9g$yWD`r(7~CZ3u`x|D9qRBSK9fTl2VnAZ`_=sxJYN}WLHKg!#?c8K6Ij; zC7FgY)$M@L;2RGWV(cWctv3{pHaO`I1-$a(R_vt2SFCZ)6UDn+*T|ziOu5j<;zuIg zXZ?)5Ps)55u>m+4rBqph@|F4DbzIzs|2O!~MSlMNWSDPU(8wQtTfq1+Cc3U3;_>*- z%Y@FK?c=JSwQ$LKent*Ac;VF;%T^}&$HPScOq$^0SGNUeXmltp(zyA~AdzU_JAY@L zmcy-gwejA91VbGi54ds)4D zHMiY%TaRefIdkTqcX?}m{q@%q3yk~p{Kpr`uMIO;nwaSn zBo`WHO#`AWdc>ip@Bgb@zxzXfk+C_pw5h?~-tu&@?GS5d3gp!{`|{C5Wa*~;&4c&* zQ!*IdW(K1Kq^673Wayx;Prq}@8Pm@gIB~$DaBb_6p>_7AaNEl_ zF4($#`pG98R6n^O=bWOvf>WZR)0are9J)My)6G%fz?P5JF?!ad{spP#zfSqu^hquC zq2sr1uP)p0>6)^s2Tr+2$z9O*Y!HTt(0ld?6>G<^VB-Vf2X} zbR6Z0(yo}1$#mIGmTdq?zse)h^n^Oq?j%V^vPrY>uU$qW+(?x>M#vFpW(w&^svVaO zXmM2l?SfLvV6bo@JT6ixi)JfHldj`Mqrc0AX&8V+rcyYzgQjU1rjeCwvK$93WhrHf zp{@nXwn$kPDP6;-8|a$elV}p6)1OAyv7}^0DnfO!mjjPGoZ$zICa2VgW@y+#vZ1nu zhUPW~mlrUoe?GQtW2cg&f(gPkAwsKa2`}10T|*0l3~gr|TCX_oyz{v9(o0#kY#Ad) zjG&^Tf@`n6mQ-r*d9hx3uSS{D9Is~bU6C1 zkEm+tQUyQhjERKmzD>)v2NOXyFMcDn;N;8XSvi5-8%sU+hZxV^8D+v@Cav`jjnxjn znw!h8iJys--PE8XadAVAT z@};v*%VFzwiy6n(l1xIsQjLE-QNqx{>h^Wc89Ds>os`inuDoqic%9ykmJ%BQIf+=FZW*ZbMHHqTz&Mg9@B>x``G;3qcAkVzfh~{EJ6-x*wZ&~o3SC~KdSTV2kx=Lrq1kV=zPEaEvaaRW$cF6h zR_)!+_DDP3_5yG~+T=SB42B3UuAtw9@ied5fE`bvNeEW$V8atH9Buo(^P-m3YzY~2 z1db)7aL^4+6CRgomf4}8cdX{3FlB+X$or1XxtF<6)!DtFeLvF7L&o&>0j=5X-<_>1 z-KH7h>~1QQ3}|%9X?8c5v3+@M7u)E*eEYtcC~H697wyO9r04e>5YPQl3SP5_J2thN zLs)Z&=J`n30y~z(NTv`{qPtya1-Urk2xdG^iOZcq9=F*RQJ~o6LQAC(jze=QNyOB! z1{9!sO!Vp?Imr~bdZtXZn1Skf1?U}v1`XoME3f1`-}w$J zR;Dl{&YUr)Xc()7Vh}QIOZ;` z<+3MNVrYW-*B;D|jvdY~{=F{iy5_HM;?-6495SMS?;SCu$NU>#SkHf!*I_#nQy0AT z!-M(tDPx%PSeKzm{|O!n23<+Zwnu=(+C`}={&7om>ZP~(hWGWD5;4gWH$}ManOqJ$ zPW}Gwyd=aw?~L)&N4q-)e0J2<+njh-J#)_Y^V{q4JCe`aLJq&YDcIrl3^0DI$)b5G zgmuB91T#;nKP0+P4}g$k%xLg?{*b>UzEB!4T)nX=L&IGWHw$U$xuW zhkf|c!$5hkoZWrKte^EgX{k4O3pBh1yT`Ey`s+-+03Jc%zR1VN5A^6je~bTpQf43a z;eQtSc^dcLQNZ1|77z+M_2(~#r42i!YD5T%Gv+)(}lKpn1i5ZO=r4N zTil{Cy!X{HUGe0TPx8tuJ#DMDZOcvq-FM%8*micop`e>SL}(P)7Pb%=Xtb=Z;p3HC zh`UUhii)s(K29A{%FJ&bf*J5q^VTMwdvO8lgF(WeM#2iQxPdIZ~1nmNp2%K+Q#o+eKA0PApo@07s%@z`AWBj?;gza1l#dqT-pC zrqs&RlvZiuMljy+QY3W@p?8o7rUa`s$okh7`Dop5<|zjce0Xbq$yKY~U42W_#_jrq z6A%2LIc43g=LYT$M#4g-2d_dHs0!WA7WzskW`x!wIi@$nnnTbWDmnYoneR>Cy5Ha& z%l?UPQT4>8cnsZYPs(XeInwDK4_+vAlHo8Pz5d~~xfd6>yydxn&962qCyW?cLAXq= zXs99?r|G|fFQrMESgCCY}q4ke1~vU^m7C{X;n#&=yBP(ZOy>tSoo4Df{Rv> zfBFgJ<>nz1%@{%;5=m;8trOKws<1&?g)to3ooRHyL=X@f<-%l=l}>y5A1q1x;-OSQ zEds0oMRNRUhp#RjFmfS|Hg)@p?@ZjfbcsaK3v+W9?U?AWoiwzjfj#R>oti3A^h_#sCgdE{OvWxC?kRrNGQ zl1vy7prRqlvExdZbdyrMSdQeO_qXwzQ^)j5%6zz4*+fnsn%%Zx?$X+h|EFxpg3ZlL z%eL&a3&s)LaXn32t^*oYe~^5op~`zjNx9aiAE2GS1(yu$?28naYgBLie1!A&KOCl{ zNawa2^E1N0aswKFx;=YIGr%F!-3%LIuxd@J2PyN~Jf&#f@acdKLI&Wf?*@2gZj?Lj zY2%Umi}w1l?882Mm0~ zli6K#CuF+9vj?S?T_FTtRYC^(Pq>{a=k%1Z>;!Fbi}@RRPqyFI9P2TyA(YH0NotE* zw8j6sYKq$0T54-+cfDX5U8AzQqqm_&kzT~3o@ z5t9zN0;UTcHyTB_>8I)BNrB&%2x-yrCSG*D74K&YiZDoMAkc9;N~MF9WN5oeK&E4e zkpzGe1QLye&=@QXECD_QE?ZzqnPKXyNt=F-!TRbNQSm|ew4&k19p*%1$G`s9myAd- zf~PoeNI_odn~rp_%(xk*!NhPDX(#jUu5i6bT>T3o4^zDbwnebX>3mLkJGkbEsIk!T03v9{u^C@xy z=zEJP@cK#7iZBcYCLL0mLAlF=W!p$0AjglDj3QGuLOQrj6QAW^2unpbBY@pMukS5L zFl>mypn;v&a3Udj|Dyy49^fKBPh-KN1ktGE$iqE!_1tZ2a#*%9$-n_R<3?xpE0?WI z^2w4UE|*}`2!n&CxibcZ^$j*_H(2!Vr!#tFPnAk@i^J-5DGCd;tZ&_`cG$f3R*ak+ z!Ko+aWDE{Ld1So&MhwFceEn-)@^bg!{x1NRK~euQhFy3>FzR@I_RiuJ=a&`b-(n6g zI@H$2UF|)5tT6X8$JN!ZvJ0n{f4{hDqG!jGZy#kF5*^5KB>m?chwto(XWL7iUk9-d z$^~?vkNBoqsw=l(6$WCXChYf&w%@29gcdF(m+a-HA;%_WYLt&F$8dGF$;XQ~(A?6~ zBPErxd3F9e{`|nd@#kj}3_B_-sSgKPorq&}DPpQ32LinZfJCEFyk0McVPK^r7ISlR zDJv`6Wpi4Vbt)>HqRYfYpUlk0^z&1g<6=u=ltG0agn*6poyy4#brA;UdoVPS=>@X~ z@R%B3pH#*pA8qeBGjD)S;jl|-+R^~THZQj~Joc+d-H#p)?79JfoLs@VKg;31tHYcy z$4hIy!$&V9`SBxtQ^~}`aw00SIRkBBXKc3RKm0hsjA^djPG_&KvDsc_cc_*#*10gj z=n*EvhV-0w{LvmBd%A~B#XjuA|9cp~%3$5d4qI<+cQ|<{ZR4L4cWidXDmd;V((4k+W$5_MkNk?UdQkqR5I1|pVRvH z26R+AoPtWv@}l(0UGMbQrl;NhIqgF!DrxEvIyK#0k&7~FJ{kz3V%Af@A5dMne4v%i z(L*8d25x9s6PhlVnh{yHj2>@&lbh>FUu&_Hf4A(`x@cl_T&32;1HKh7Qv^i@IA z)~q8U%d%XF#NLl*wk!+0MpqZlj=`{yDRQJ6uWZ*YXdR*kDJ2eShLEI{oahuWICk14zvo*~frdvj@CeeLC+(^VjSN+bV`FMMBV9Qp zgK?MBX3vR)L(ls>-kDy*Fw2G%&9mcrzj!Q8p6NmeAqC>ArK4ysuM$R@$Y_s?))c|v z^t=}d2~p|r&zIlMZJGDM55kbla~xNGJf)2nUCMMMX_6;RptMi469`SmqiKx6MN?f1 zAJu%Q2_Xt~T`%n3e!_7Wf=QV$7=b~)BRaiY0CZP6p*$VuY&&UnPG_=@DZxzHBv-CS z3;5MJN?GWRg^q#8a?;f`I=ZG~+ai7GXb9avYM}XY5t@b*kCFL^>>J+wFwPa%M)~xe zGTdqM`-WSCyz_pX1+S}d=EYYuv2nA-%l|Cl#A7=9d$-@y#+`p^ru>YYotXiAGGzFK>@pIQLnQ!c8om|JeA0}|Q z1m~QQ!=r!BeCz(s`*FVh%|=c<)-aGQi>ihkw!6$_qQbks9TSIjYsmw4EQXs*KNkDqlS^= zn&c}kJl-`dztWNpmTjTyI-2Rhsfm#chOTiB&L15X5OAAV@hIC~d6Sl8g0YvMU1pSs zi`r@%dNnVWfF&im(D3*@8Ov2}ttS%Aejkk|Ev~=4@3xI4P6aS_ zfA@(aX6;`6Xr$5Mh3_|a5HZO}<_~}T*LUC0X~ZlKOCHbYJc#tZ&fD#kWnv522hd+7 zOhJ(lpBDz8V!^-csG#$;-!FlIK-b8XLF_c=;WNX9iVN>;ETgCAxA*cI>D=F9RQgu| zikJb_m9F5wS1&M?>=E*Ngin@7{&mv1iCyOq|Bpe}t?XLp{~nsDSv8ZIRlUs@D1z|I zj-JvSpuWETn#RV)+xGUxzJ9>OBZ{T{o6bS1pd$u4oxCE1Kx8Daq?eJl%8%B%5CT%9 zi4rRvIo*vE$U+iiqAwmAPL`N!0n+TE5NTh|!Hg#<&}@>;;WPI??V!hpOd4^kJD`oz zP0x!P=B;}m+SHI(&a@dB(;u(E(Bh$7nj$qXfa3PNE>N8h@_3r(kKub zIX0c=N7KP&qWJ^p#U+YV3rDe98?)^)MPu?l(@SgxU z;t)5F{3Fsq%2*aW`OgSP9FqB%x#;pH8k=o4E*{XKnv{}^x95-kxrmX&4KBW-IqN?C z@wNhn3^Mr1jjbdSJs+9ByeY_!uL^MekMoccj{inIe|#X+QM!7=EkQ0h&(}fr%)X?N z+wN}Tfj<=PR@+F+Vn;kiOIXscJ{mdv@ELCvmX=N(I;i~dP*ck^Awz~{+tJ)nCGi|l zP}o)%DU?!*6q3qR0S7Fyho%lpix%)V{hb zzp-*FgA7krVnzTyp3bN!=#c~P<#?F3Nge@;D zqiOy!hL|2im-MKA<+^wJcC?+4x#Ef|cuN?cbDEWwOefNxH!b`-ppt8RP_UU z=qC~W@a+({zPf8`32#9B3%I}gbdOscK$e%3#YGxBYCB&77>3}s8`baRgfr_2g*%V2 zq*&uS7y8k47(Ucs^2F@kqlE=JJ8H9&fYmiN#YJCHRq{UU!{-PC7}Irv5Ky-N?iu_V zZe{E{|F$-&mt=Mr-2shZhwuKluPl4{)L3>-%5+s96rz+2>&fheT#kxHhD>$E7?e7p zyB0AQ7zQMOP3&6xI{-D{-c05zsS*@PPz&tnWuNoX%WOz*Z&zqveqEOR62NfOK)mf1BmH+@C07*naR2mGd>1DnP)kal7OPA>;svXk4&VC)?m|16mmNhT{>X^KPD9hb+~y!#7FyJ;8QFbu zQBl#Yd3kw9?(NMjYi#x8=eWALWs07ZsG+OU50{Ci={S)Xw0FdXK$z~%#1}h>Ok^Vk z(qvCIXr>xu?{Uzc%tF+lwx_G@*1WR7)f9?9C`@gclSsPtMEo~vK3$b#BrSYBxreU~ zq?IPYOhshaNp^NH0?^zpMqhZOV+{1Kk}>D0=+^Lx)WWr2+w#Hk+o`Oi!%IdJne8fc zq-G+8jU^p6kfLDZU}nymnhXT;mI+5}khY9CDa*2K+jLSXpGd`rSgqkn&5PFtsv6rU zk&;{+^qc^AatK;6VvTjUgdmV|(2_|Nq3kk{(RioQs$CT&9d((sC--zH586wtBw(rZ zBi#j-jn&!=!Dh8gDz!)F+A!de`-_-yOfAPA>EXLSZ01)#%VYeQ%zoP0r~A16x2-g{ zI20CWyf!b!s1XJuhIKBtW_^kmUyJentNk*{ScQNK&+YURJ75?6&`A?|pTBjx#Ydkc zc=Dm5j&*fYUYRPfUkUw1+wVGS#3*8RM;`OS(;Lt8?*#X~%P0pyMvK(1rbu)UT@ER3fi z3MTZMK8C8779#8<1Ex-LhR->yv9-CaWc}jJVxX^x9L>N^M$(G9P6z}6-DHqvvg)Ii zj6QAx?p)QTQzwsPKv@B8p(wW9c`x#MOwK-K8Yi7}D4K4hk4X~W6hp6lpUJ)e#jZ>e z=smZ-OUe4?&6~OAnrk{fUw7SgY}&MGm+h(R`lqQ>>ivv~ni=eE`P#Mw&n~X%F@0Ne z49k&>?;q$$864l=&z8n0P9GFIz2SFfjN_C^{g`>@0_sD%=%!EoRtfd%Pp5Y6*#O%& z*tad8pSpX}EOV#j2wT_KxIChRkO7!OagYv6^n^0|}11revx}6O?h$<5r1Uv~`ncnu-fZqY10FzPYXmNUf z+ItK?02(f3 zmF}I*o|p>s0bUo{j00VLs{Q_7!gK%Wn|a?Cg#MK8|8*vxIrxj-kzFFvSV3J+PT1{s z3!l$dytg-}qFL>3q^nRjEnPz|%)=O3jxn?xk?Y4!q)6?kBfe%Mc2f(&qXWz;jG<)Q&)}XC|weun_bFb($z75)J(MWR;}^l(;H5F52AItQ=5wx{Vl%G4f4@QIN(i)F-@OD-&*_18=?ybH07` zy{ulZx|WXP@Xa%i;QF7=MhG1zWn;%v1lKjN=C5yHZLJ~C?d`Q(YG=sH%Oe<6T*|=* zAIym-p2+vU_r2X-&z_4a=%oyz6V0vK4j3WruP9)N@vSzdW@W1Yf&e?xv-a$KS(m`W&;!(-+ zcT!9`(!{Z0;Y&$|PWXJ{u)lqwpZgvTarw2)+<8-e$MxUb;;^Uu)zLFO9D0zOORi{U z?i0n7mFhSST>slv)@?}f^k4V-BYhwC;VTaV$Z(GGH8!%HS}Ke9d) z`zpaNqEqVl7vOFbDUuCG0yBV>z(imPibUB4`~u~#^3U|LCB3Xe1O9;`BMwImdb{rH zZ75;^l#=8F6p8S7mu2$P`z(N$P^85*^o~*Kdb3B2&7TFOgoyG?dEZ5MX|~t+HvN zm!OE1c4qOHC?e&g^ymA4f1}Pz`#JB5yVL9cF6un~HOn^IaW+a#b0nS0q3)#Poha4J zV3cy|w)8e9(n)wtPXEP#TTrA^yQ<)J6nO@UV0sTYk1sHGJrs7B|3QL{n=Jx#qImDRf^b`i=WNQ_k&~?Fnc?Fs{EJx1mwnmY^mW&**^V zc@3l_!^l??f;_K5FlOOMiQCY~NvC_X#Vzd5Xr8z`=-00wfk1$&sw(2~%nouO5Xcxv zNGS=0dYW9)brdfIju6xsI>O^2*Pla!9iwj5a)OaC$#?=`*0uhN8(PO01I#g>GCK^_nvVJ zHVG*y5;{KFlT4AqAgn=M!0q&(ICkyGf&D8}9#1kUgy|9#CxWdL*Dv_g*HBkS%5hW- zm1-#VNJ{aAB26dt!I)T+5)*-zuQ&OM@*huGuIEatwtt+OH2Cnww>PBQ(NRhhP4AZK zq~9db`Hh-Y^O8>BnJL*BUF1&y0qSuz6wY;h+;tSgi$B&(~$>pl~VCY3$ z-n8QY|JG-kz8MWiMFa<*<1k2b6B9b?QW5f`MvZ1+#>03KkV+F7n%QMPdO0`U$h)Uw zVg4S;dc8B&$(}6J7x;aGR7x^+vMa;Pw<|9CrjMWfx|P|d=kU(^aUQw9D1(#+;GHY@4>17h`EUPHPao(IoiB%4rP- zPq54VWB?z)TO z;$qxxH-=$w^UXK2a^=che{nD3r*qfx#?>>}{M)0*ap_bvMET>}ogOgXn9`rxV4{PR z`O&e%x%15N9rNXbCsWxJW!Nv?#?%EjoIDzU%3F@^SY~})n6Wp^?|mmGp4yLXi|-)P zasnW?uam#}@L!3i4m-o$>ko0j2%SrB^Kr|!+9(;M5eZ7Xe!)-rX!N_gC@j!;@0EUB zc1<%y!>buF)IifiLnmhjylHZx@64n_@Er0Br@IFx`^TB2j1VyT_&pb}w3o%51H6wSW7_v;0dO2WNf}V*<2;md=V;(Y)cMrXpLf?&=p_^( z)4tsZig?LJ%G9F>jw4Vim2%*~^t=Fy?6@TT*-7tLJJDsJlr{&XKTDMAs<(FU3%-uJ zZrXdaH=`2BMx%%?P{dn1iS%l>?Nz7OF&cHCH$C&f|CWa3+*l(asgjQ>DlOKm-*Y3tF9rMs6Bs(8wdmfgu`L{en0o$e?QMW^GwGw|M|~< z2n0Giu*qbyPksgoO(P~Gu|$mbw{IZ0Lu1lG`!VB$srbtBFx&>Z+dycdqtZ#*5+`M0 zB`l(qb*!5ADer9D#z@V@bYYN(o+ego&|E}?q}rvCH)1FSg9hS6BQ&kqKvP?YewHMV zlS`8U!AJ;jh`QW(^7GK@8xfjD;m~q&2IM0`F%m5a>gpRPj6^8tQj(C;4eAYt5wlNO zR(kx9*>2r8+uCA{cOYmE(_a>TZR>yoM?LrN+aAtov%5UE`xqa=@ zE^!R!{XyUQ-o`+Qzo9hOH9N9k#gJxQIR9!3TW96Zx)FYPd(wC9BNXMH(%RORTPk!0 zrEDCRP74m(>?9*J7k+d?$*3~#1(hl#+LO52kF6_l*6u2;br3fZDS0XyVW4huN67$X z?9$;iq~S95>>O8ATKxRit=xBKAwRypg>%o$$*Ojlby(V1_oh}(J<;1E@u;Lor=ig% zo{*n8F|Rk26zN2wl2l4!nra&@tqy*lz?UN^DN^0uu4beytqwv!X&=p0JK=!KB-hko z&4v#7vq+Z$1vE({nxyK(RX*EshMT%ho^Fz(nKcMVJW03B~W$d~eED(%x5xKVAv><<3RK6%K;S`; zgGQcVP-=J>=<(qdT2_@zUufI!e)qc!8#WAG*Quze;PWtR|M|amZs)e4F2bnm-)6r7 z0g{$vZEYxn-#+!ePcoMO{hJm1{>|)_z$sfIzWdVd@1$nHn4_oDR(CX!x_J#%)@!dk z9A9?usqR_&PEO@1-}7?p1s>|Q*tmUy(m{HMVD9t4(7^_;K37U@y-oEFn}U3eA%lzz z^7O}7*!^|%4VA1@m0qqpOWxIICEjHpdPCP^tVa!}EJoprzV_7q+ek=1n_;q+e_ zouo|H&!SGCODQB!AQ z+fY70-9u6-NnL}(!2bFkD{JcNZ8S|#lBMIFOiHS2>$$tRysQPJ6yv`y_75=NCE3)lEKr*a{Se&l0UdK!{oBMs-FA)@(PtZnwWOLD86^e33$EfH;FUH zFmCoC95{a^Z$J7PYqqyB#kO(VHfSc6rcvt_3_WH>{h-qid6n{ZE}b_ke>B zIL}>}Ki6(mk5wT+bg$<6DnMFk0n)Aq)24*{n1z;O>8=UBVq6TjE5gS_KB+q|+}eV# z>u@t|mYXpGl@Jn={*wlS+gaOG`RKuayXwm4gQ#Tkz~3?nwnVZcpWS8(XBEJ6viA&4r=q3<(r7J5Wk>TRo9ff*hwk zQ7f&G!2#Q%N2yX*2+={x{39BsO*;HAP|SXTfbynErPrq$>~LlE)7~i@2QIm?i3`s0 zarqoSZ6SwCu4rcI`(-_d6-|Q+&hhb^+k?!1sb|Ic%){ImhTxz7igLj@z8>@U28Itc zFipXV)v1oum=&v2j2@{5gaZfY_;S?zW7DL}iq$EG3^F>>rTPk?>u8=#B|+CU2qEwb zgE4NOG7s-6-*M}xN3_B)B(~##5V+E5XvILTbTBmyeK!gWbs;DHoo&4B6afsD%Pj2 zdF`*U*G~GbccqvR+b?_7wd}^ z4K>K^ib|9bYdLE0+Z7{Gr9t_0ram392m8_;L+JDt8H^%-wxfJk4B!HK8pdWrH9cd| zhtjF|sX`eYcg1ja?swA_m8j!Br;p2TNpJI~sB*9vil{jk6^s5(FW-}V_N1k6qe!>* za<$XD%-ezL`VXa(5b4@34XEpEFrA93p*z`DrY628Vki=2SeNY;qZB)RY5U>8VJI@O z{T0WRwV;FjM9Iq(1%Z_SU>(&}*N z3^y-6RnqYm_1=d<{Ngu32AAuYreMOjulU;>fANuwKKdZ#J<$mv;Mb>&;m$WIItUp6 z+mSrCq$g+n`!_4N@#N9m@p=X8>w2bkbcG`&J6hvB^!_%agg?&SkNf6V5{&I#3!~Mm zS7&^lKYu>aXq3T&2WOBneL?qP9S5j!QW!-6j+%2K1;aAm{4HIwj&tVRO=D{WDJ5^e zyHY;+?0e#^|NNT#JT<`7Jq9C=n~a(3=HItI!;a<@!yFaU92b&ANdd;-f=8FWwjz03r!AD;9#I(n6 zzj#2(`}lLOy)`76N|bv-c}7Z#D4G@*fEyh&9hpdBi4X{h@8J;Js%&0*MvWn_y)u{QUx@On+kzb_ zEnV@`ALMf3xxNg~mUfht>RfwefS=shO8EetBM$Lk7)ptAJ$}foPM>kmS)sfUYb4N4yPdx#%i zuHN!{+=BCG`?&p{HV!|;O(G$==fP0MvuJNaw3B>0fq}s2CWp`fkJ$48ZTmHAsGZpL z54{gJf@I1fnX-~8+upe}Z8zaKju0XXZ4}&Y@X2GJYf!=G4r!0V+$IFm8q|wBy!hC#QrA_Yajj}!9bOEbVRh-DM`~N zi_+a3l&pWH=i8StC+@kscEj4N9g)7q?fwinEB*iLP{y=-;+8lYMa0BWCb%|az1dZx zJXr2Q4eXmx>X6p-@-CGB%L?Eql=|bDEbG}F{0K!>L{TL^FQG`Qg{VRN-M|mh`<{;? zf?mk7p1CNa-s4eZQ@c8)-K6%V^t!GaKw53&JQ9=zpRJkY9G07ekd>wR`8d$W$XasO#)H zlwXX7x(<6o3+mh*jPmHoc3nMzI=7#oRAPTfFS|L*vfa_1$}}Ej2s{&Y4xaDBclSCz zS(;?(q`uW9FIbe|k^77I&p(uf(+xODZGhm}z{ zx_`zz+p@Ug+J|Up=_IF;DN9stt8;#O{oll&@47;0X+@3D1OumxVE+@Ru>Oe;DA&E1 zfQ7`$3*b23m5bhb_ZK^AYsXgZ*ow8_1HzFQ0Y~D^&5xQw+n9gAz@JV!XVycW?O{8S zNW5hm+G)u`uhX)m=v6>PP~ayZ zT}2cXE7q?HA_#~|6TwCkY=A}gp!cn%WgK=-fq7$bAErExo!7uvI(K-J};K+ zPCaL4?%X-gJfG)by!10vnaB(oQoIoeV3>lg4Xto!vI;{r%sufC_nG^jk$-vi*|Ijc z_Nd#hTRrQ%?=IT$)SVZ8q$2poaCI=IN)yT`F-oQ5gldF|PkALtb{f?kBO)OrB~{AQ ziCIEu^I|uR0=f)Iz*PkLbKO)fD4Pf4QMz20FO`;K3gHnlxn&$TMZ!s=Eyf0hhDL{9 z+|rg*7Uejgq{pSvNz>u4eXZ#$nv`KWay(JpB&1-a8i8lJkR!(pMeSOpX*;<*ol~bXkz}_PHxk=TS6yl~E+U z=8UO_94GW)BikjzPvi$8Bf6GYE>+gpq_4$i;ci$#9FD~Lu_LHsGe&`Ay0-r4)Z zO;wzJidMc%o@f=w+W+yd7@s>g%!oSuw(#h~1I(Y}zaWHre9TPlQON2lh(&nHLf_qwftL4ETaD>lBI&v1`J* zkByzVkHE?M)pFj!`Z=w>BhI()FTBlO_1JngTy+cwjVY(GYhbS;VCT+UrQeM=-pHy|t1t|MQ%*UBTW`IU^Upt@ zjT;O3%-_Gg+IPEKWT3yGg-aLocdIXi>ni#3;L#MtaxSpXEwb4R#_nEC)Q+tar?HdryP0ow7+a$ zyuBiAtF~@KQYpZW+o53O(Yf{(*Fp&tHSe(^=f1-BS2{Wf0 zaq8huq>k%eyk$f4mKT?-s}PTGJJF7$zT6V&AzZ2lx%z6!1QvckkWs7vsQj1myNDR? z2g*%@VK8dsNJ`E+ZpVn#>&iDjy*Om`#He(2*#<)8lqJxIpb>$6M-xBQ|ov{DF7zfC0tb9tY!;&ukEl=%yKFdL+=0%1zt?>81%H=m$78T}kqh8}3|3a#h? zvxz1*^0odyM-T8#`Vs=&=z)Dc{^tGkhsoZ*Hv=W~WrrKl5!eQL5Wc&%KZZ65F19Vu zq{xhZ=0ENIpXc9~GJm%i!`}`@7To$wz*lqG+=3Vv1ioz01y) zlQS9yO`iR-pLJdOUU%;rhSwQvYbd-&tX(o3fGKkuN#%Xq>uL*c9F04jtglQ4BZr%8 zZyfmGv8K9k{a{cK_sT7IHW%Bz!KSSP8@vpyF&3arq(2Cd44wXEM$aw!HY`(0G_=&u zc8{1@*A(UcHySx%`VdZ--Zx;bsXNI{3pexgQ>Sv_UCa8+FNPsuKc*CP#`b{oGpu&> zeX;soNzj=tBXkTKgyewSk6#*#MCDzbJoswDC zbOBhl!gidI9jKm$_MX}UTEx-&e{|L(tuL;>cd2E4*)**3o)sO(|NYj#%su~#3vWB@ z>(}4C{L!m#j4O~rh+t_bZJ9omL{S>_D`BWM$8{5iK$q}%zA^%6UA{)XymZ-|R-8GB zB1#eiJZ?j2rA)@dtNyUy zz@6*27`V15cU(^oqqNCx5!48S7uIiL^%JjucFMFVPmH_hTi@S&=bcx~I(+`r;CQRG zYQGJQT&R~Fdf;c*1MAm6cC+6XOMl;K?FtUH9i)(+PmG2H?fIfqAH!l380koSN}%h^ zGGk%Sd&a}Vi5RV}!`H)Q_=VR8zXkE!F%(K7KS1PwVNkThX9_QrKL5 zjVM>AgeliWIS$IU!M1S|DO76To9Yf?5Q7-RAl_Y=!1L(0<=I!7>z+suX>thH4vbY< z^XR@UU3&ALXzv72=sWP=9Tde&LiQAj-IE&muqh;D@~6KWTE$(-^&IxB?Yooyy;Eu6 zKs;_f2-vlG#_o^9zPRr4@lLLtck8;_BYf;5L4Ng{ZsG|=FrWto8Rd+WeT^dXF><)U z*80LOY}sbB|4c3B3WWrbXzqsLy3pJ*@VDs0hZ(%~dSPk&mTdz+WHYB*Pe1WY{FVW) z@NS}N^f#D)L0@LY!I+Q_4?MZwkg8erU*4*9|w=GEV|zHPi|z>)yHw% z)Lp;5&fwUo)ubK88{78a_G4I`=u*l8_i>Py%N<=E$xz(JA4|*fVHMG7v-eN!=;>0mBkNwPn=7|uFXny&v+EjZd zHI70mp(C+XhWN-`Um+yZq@RUPK6A{r&K(atb;DN|CaSluDV;g0-jJ@w6ilX-0@$8Dr+Mj=GPE{;LKuK?V8B#gV)K|HM9x~EI2(vI1s?bIjfV8x@ zBNm}TO3n&qUZ^QZrV4p1pT&x`J*58bU<#3o-YhUP&if;CZ&rEJv%Vy~R7AonfXhzK zpRe?PnG!UQ2+W!(d+WI#5s_Kb_1YkWKq899!|yp%A8s#8hA4%t6jo^o3YT;wj!znz z0Lk_rAeTzi*6K%iWp7Ff@S8}(KuYNmD|&zWtm}Q~O*tq%1x$&ks6a&Hs7QhgN$MR~ zy`0Kxty21nE^kR;nh49n8a^DmBZAx6g`14hr?dM49}v!V5Q7-RApVUC)niCsV8o&D($-}=8!K6_4>iQ`QcJRawbWhw6cy)J3l zf2NNsuI-|w)upCd^2=Mg>FyagDf8)1g}CO1ZeDmf$&rWpdHt;v4?h;?iGxV_4cDk>_7#bTsVdf%f)jbh%sdE9Wr4SlvH zdJQZk+7vU=*2SCmJk604{vW}LoX^A+KRBDN?l_M=`Gy`V0pI${De~lx&C4#M9GCj% zSMk8j4^Y_}W1I@;0VNPn(9zyORb$tj(TB}Dqr@<8u&N?)vnO=0FB(5(Y$8Rpu{ng_ z9~_P;QcKp&NKTt|pXjmE!LAsVEldaH+wb&Q-yMG3=rY5$pSH@at0Fs_YOB2VXOtAB z6_t!X{o|e1fmPp-L;XF{XIQ4s93`Z2a5^48uJN_{iUmKv3q!9bWHCxcm^o79{l?yS ziYkYEazFw#!la`+YHfM?mD75DYMErW%hs0*AC^YU z@loPA-TTZ|oDNkTq@2}45s?9u)!M1S+_7QTL5 z?;ti9UsJ-ytB=K$f)Nz~>O126;)#vi@bu<))}MZG^2sMNW5x`|j2XjIPd$~Le)G*Y z^YFtDGiS~me)z*5W|NqvPoK`S&pyjzk3F{AZ5yt_Clr1mShHjWD=*y2sAKkH;>>Xb z0zLwv0M~x+Y_9w1`82n7i`trUdUkZMV#zvU$u!*!?QDB~1zX=&9}E3?q)Y+3~zq+Pe-z8yD?t+Xk7HFP(HtyZ-x*ponrI9o}6n{ zRWc@SQ{p7VhC7};OOys5lI6kiJ&Dv6jjyaJ3#{3~xU`EN@$2u}cqBsCrg}42Q`$J> z!19&L{<8Gp&2McvFd2y(AxB}gcQF)+a10O`orCZc8yPi9Ce-dj@>!6UH_*qEBJGq2!DoVbW#_H~(#%tM7+||h7&(&hzHz9|C~+ZB%EgFuBeH~y z0f8XGvUGY=9w9@(k1+K!p>mZbWYQ_!c42^FA`D3gFFnH7-}9p{TcU%I2v3nCJq3tz z6+Xvhk}Gj66Q611JXr#MvTBh`-&E#2<*Q(FepaftIwq_9vGTU1n^Y|<3z?Z>KznpkO zno4>iF5wc9jik=tqVvOjVo9ZhpZ}zStAAWUPsF9HwD5l7^9la>=Nb}8h3jgca`Fbf3M@F zg_}8iVilGl*w!9r)s6_URE`io;`*0qi{=RTc-rB>t6regZ?e-f{Qc|V?L4(Am#);E zuxX9#dv#1c7A#o6^UpuuXL@I+R{bnoxR7=0)-iVMScDL4-MW>nTelY9SV8=fLgG@F zwh351q!FN{CC=gD6|A`b4gT}*XW87+K{{;{QZNe1 z6k#z2gE|{;u?Fd65X_!T(YTM!ET-W&7Sh6W;{ zo?2m&PCIP>=b~}SXMM9vIrOAb)H#9?%D~E~TD-xlW2f2p%4;Q6)z*naow^a**Eb&Y z=HfRAC(_I`0+~Jf$R67qy)!62K}g% zjk2BWz}j$97|PMaLjhq_(Ba&#QY&XvJb|M+kg_6M9#cp#>GhtD_prrIb3rIfc|q-` zrv!1G+~3JKsjVC7HVrzJBGIl0xDF#ywilUfLLi_OGKnOlJQcLz1H&jJWa0@;$S50- zn#c+GkftAeKJZ&e!_a9`QX*u=Lq&N0E9Cj(6el87#!E%^A~CYR7OO)l{8eT77>~Rl zcSSfTTy!Csjf<@S=^`x?!!a0LIs~g!fMp^LiBhiKmH;Uw(lk+-zIaNN0yRvwi@Ej} z3Y|o;UKAdHT+_3qP$*saq+CtLNXNys9nw9Wh*21z`pDLAh74cJ2F34q_04 z7{vcNGNg=yPLjDJf9Bi&h%xn~D6`Km>9b-6JC^l*0IwWtvUyRGM=$H(%dhnB$e#}< zt@zuyZKR@o?)J?Tnyn6E5QF#-!!+rW#552HK_5aU9|8Y6dvPZOA67yJYNubroU^Cw ze!(0%V(DE*V{dEk>lN10lPV}l>Q2~nC*E7WJQ9fziR{|;slL9R`uh6aZ>*Q?1xjH7 zLmfqpvKS#vCJ05sP}r`ENP+w6Y8JfmHl4~rBB((yN=V8G5EcSU2&!#|GS?yJ8zS}g z?Ic2)lnY6DS}+z9TbNj`_IlB6G78!iR)TPT(1`=2GuzEqa<~N}J|zTV#<+C#%(@jq zxs9VHPe`m=z18owwTm8QFvJEYox<>&hHE=|*jw=R`+knR_V%-!Pa+BLSc66c&(4yBY!TDUY} z;y5nVt{~(pjEq7?THx~|d_HXyoAkWu4PUPG$15|^3Yl~vA>;RXq?dzhr%{H$7GMcY z_9+xf2#;S8AO&v5hsEoQ$okcgRiAiN21a&z-U505WJ#F3xymEZl*hihLQl)kZ8nOO z0Na}$!=+P#DFP<04#dEh!LEVtCuM-JBxJ>jfZiMMh_qQ{Wg%Ays}0A>*@? zC0p`)kWap3L_wKfly|>y6|U=`92em@V5huutxz4^;EyAHdzPd+Ferra0dkBU#2^MS zi2nlQ+s@w&d=Z$Rzra7g*iPj*lW|8Bw<(Bs^nL5|$hSK1hb0#+9GWd-+7*<7e}18z ztuGaIjQ<|HH(uQnoD5t6i~>G`j+6c!a4LFtyh*^U;yryEe@jM89x>j?NEBnZrJW zZNKmSs6#M}lc|5>!|kQjv90KrjBVS#WOCo9iP*Lc!CvJR**DV;5|av7P=P=hl9W(5 zj)RS2xOTTdWd@B33}s`vE|yYczxDFVN0c`xcT=9RtBC|1#q8Qzl_IR%pi^bcMe~Q5 zWCzFDc^MCltYNIToX=v$Q3pnbOc}evHT{jVj-39(sWT?ci6tVFRXRDX@wE-%r3;=R zXb4j|N_)y=)G3O6U-Gag*cU!F((;aLrXPZYfR?f_p=p!ouHVk8rX7q6l~Oxpsw&&s zD7w2ksIZksjHD@G2n++^_n{K#!EZJh%FU5KXM=Bg431RAMJP#=W zt`s;z;AG5i^Gkj_RfwVRJdXsHQn?Z#G^vA>2+PPOpDEYX?aPoCS;DC>VMzhPb&$B& zQX34HxGrg+)hBR{I*L>(&F0P>II%bu5O8&|lL44Y``%3hS$b~6r^NMhG!`V zD20(vt_u2I4_VDxrlH>FF`tafCwB6=KOwX#$!F!JJMYqGSb^&fMq&?Q5Q7-RzC`{v zm5U|`UPVV217If3O8cK#!ppbx|1|O2p9YaGM2c2H{bKpkcKDH=r#Jx4yK&KS-l7C%JqKIApQDxrynB9BXl&0 zQ+!;c0Fo)z|Mlt0p0%wnhDOyY5sH$?a=48yi+{VtXRW%%SB0Tt|4l%QHV6 zAcW~1FMH3{d$%AgeH`;rmo%y3BP|ufMh$1|HK#3#tZ1rTcl*PW#+`n|iV4R}53m0A z1LNFf?S!06{B|$M{4y02oL;3}(##Elm77PFWnhr4!Y*c@Z1{5PddJbH6jiRkRUQf9 zWPF44HvSN4#S(%GOUmhzk|tB?!8zmx{GJhP2pFH#*O!t~M=}TXK2<6WsWil5IYVV( zA_758n8Xr@kY8^znaY(!nLbSdB$9fblPP%<#?cYG~fpd zTgbgw4FS{Mr*>?hc=BrL`0>W4-|NP_S4gGIMGXzf{*CblF^CU1dVgar1HK8|mOnAs z<8tT6TR8RhD&|~RSjseNzK=^@8pi8)M6eTzF^Bq@eL)H407?ns9WMVkzm3(8^p(j2 zjlenV-BVsIFdH59{R%pbDF_^kCSWY!XrKi+4Cq8FCDsD<=F*eZ10Z>sQdEQ8A42+STLjBVP|a(wirMH_*o~9|r&v z(NC!_0r_?LW5lt@Tx4jyDjE_g3lNWmRVH~hO z`ux1@Eemj{_j~5ct`s;3c(zx&B>FrWEV?e>CHfwVkzU`6 zorC{rOdJ#Zd^OamDTk*q8wQKHoV0ap=W<(hlBh&N4=}T;2an7tP@m{h2faU!WWfbH*)Q1w=mBv?MPp=2M(kWE zi8r`cC=#)lvt{iXqiypBqembT%EfhTjCh=`fPu12gk=PkBQ%AuH{Z4yuage|ACpbr zQ52FM-gJe_x=mY&-uq(R^s^8C^5=ha@mQxKJ)_~twO?*tx1Ql{F_#aIKyZPCNA|e+ zgiJ=YkY8R@?3xm2R>xB}seA)vrBiYYtIt5%c2jIqE<+rbQrFey!R#ZnfX=$?6r?9aZE)1$oKhhV(wURh? z8>BMjP7(|gJP#Q>Rfw`Pgpt>7)6|4aI;q=kn1HFHy!{q37{;(P2}H)M*N|Fql3`x&%pp@ReO?Kw0N)Kx-J_wZ1{M0clYB3Ge*ySh*_u1+L!x!SFrSf zm)XATFo25TOgZo<|Fg%Q71-4a!hMc(N^#%Sv70t7wZGAO-iTUr-hIET{?n9+??y@6 z`;T)jZo8?Wfj<2n#2`K_DE1oRb~MTG)%=NeQgQ!h+gS5hoKO6!lJZeGIpwH%K1R)} z+M^w>{8x-ezS&8~)}k`y2yhzOPi9Z?c{IWCG@5L<2|f6Bym_F>o(Q^hX{I;tVsr{s zEAR*~3{7tQ9{26I?jQ%#h%WKPn-nuuU)jZFk361Zf%e4T`2W}Dbmqh>oAOJ~3K~w-9M=MTl z^R~OOpLTp39XtLs`pN7HawTuS15N@K0*9jsku%W8_cY*KuYL7sWzu#uIi|dMzeJaC z8Nju`JTwt=C-4ogjQ|sX1@u+J7~Xy?a_8b&3P~9W{6F-ypIIjJ7TyFN_1atO{TxV+ z4EjHBooCSJzyMBUFoGR`kYAbyALJjHiPV1)9(XwZK{lePW8{9HWZnfM-tUI&7ItzI zEqz~d`Tc$w4u^;C>)oZ(X%J4KI!7t3MDYiZV@G35A5X|M2s#cbk;1hd63HY^Dvg7} zX9%K}Nkl1(WC|l3#@Eq}(G&612ewx_;i+PjHA~WFKCBfm%mwtUW z%@Q)+Jg=zAFfFEh>V)fTGw^`FyhK_RvP=a0l`<@AT%R**%i9fKc;?>!1f(H@IBwQP zc8{@Juatp6>Op;`jB9VvyZj>qWrH#iKrEf&)fe9!Iec23HTk^#?xhp=(Eg(xH$5^h-rj`>1erK` z3~n@rjC3O{KSD@Uveo65+EDQlbjfJwgxQU9Zf^G{Nu78rupfP)>@t za&Sx&3?GJRqD+ZlD5NP7mNo#ELLyBA;WxF9jL#sKS)|Dd2Sp04vMCyU-!&8g2V?O#=&L-!dliAh@z*$~Dn$XIjRlwP3uNKf` z-+pLmWf)D)%tx2ZeGW|)-Qz7Q+4HadG`b}01^Pc1nUb|vdM$Gpnh?7UP521366Q0& zZ_p&xrCuM}y!j8Kua_(Lu$_Y#0A74GNmsYaNhkEJ;#h?VzJ(ecqmYK2mywL19aOdS~jg?-R4zvyAC~W8e6&9 zkmyz^NeRL5yn&Dj1dvo27UQrOqYTQGLb#4s7L_AU5<*}o?LVVX*lr5Pdr@vE2#g&I z=_DOHc2eTzdDP^$8&|6>+`cb1Tp&22mg=c9TI1E-(>AT$_@fbJV=pNWSG>NXbIZSo zx_5_4e3uE+_>FW$Ksk=cnyjk)!R&hk>6Jj``K9a?GD-kx^(Bjxiz@}Cp&Y(RPSdOm8WLND=+F( z$|eebFV@%IsszJ_5eN}7{W!@MZ`*>UJ>4u$#Q10+#3<9EOE`3;Q|xSSBG@o06c`cs zv|HlXrcZXruxOR3G$~vh*Cwo7T*JgkJEWscxrC)`+l;LGLz6BJD(yhH*L_$>O@L(l zjnZjdK2s9Vd`&7%%#Khm6lvEbjlx0U0FF|)dE|sdVC1Pvd_odL5Re8VtpKJF>`caq zI5uTShPXv(8GX#1jAxVQ;iGKb2WgQu4C2DYRf@EPl$0pfCFPMcX({M(ZH_;3E#{SJW?fUXkMVqMnV-WZRFZNO&#i4Ek{p;{)r{e#)Rp^LxTbaB zRbazs1u3ulI-T|R0`}Io?XUdvhWP&H{5Ujbx9jGir$e!6Y2S914-t%=+2643og#l!4$@Bwv z_#>LAc@j#d;^=5{q|EDRLMGGx zwP-TwRj-Zzhb99br+=l+yNM|9Z|`>nyy>+Ma_8Xmyybh?vukS*dw`Z!hx5MJ#*Vck zC=C~WiT~iIoeZlrIP0_$#*Z~I-@WIQ4==)%GZ}mEu~@mm)UBVHg=q-R`oo(AiyBg} z=E|eF;@|5?*)A6!Ir;-j${cgdF#3l*YVU-Pi2>>tgPhcKmR%V z?YAFoZEaLlRdLBBm#}#|9oirMQ5LNJ5!S_5B>UYbEY3Ld({3%&$vJVxUMB_B}JcMuBQ@t*J80n z&QMpmo|$0gm=h(h4or2%q(o+txFUP+rr7`okE=y+?dbP4!VPdgI0xTFHmZgm5fjjRxSZ6MB|8RlxvgN-b6zp#c0FAMbc9h zL<&J`+D3Flsa8t&&ooem0aDPa5`;}Z;b0gy8P)wtq);h^2pV3xm4}p#auqGg=GAx< zvm!+0jNt?-0+=NMglVv)sarL7#TZ>vDk@8YIB5qvWz!i=(b3w$j*X2BHG_;8Qb#}v zgz4X7Qs&Z2FXfY;{3I{E^b$2SHT?9aKjlkb`V#Bc?>ozn&mT65FB~zNx3+atRbnx9 zSeP3ZZsz|U(vPU~$5rse*AHgV`ZlUceB5}(3=aRrOYH34wQ>CLiU2QMb|_UP7S<(? zV(-a)Y3{i*h%{eD+m>tNaT?xuD*en!UvxiPF?8TW#Ewl4cVAv8z}~vr;e-qPeDRmz zfwyH3@XC@TXI$8d>%sxEeE9u>SC=H2HN)cZ`-dVW{NrCSetKOOQzu(Qql#?}HlI5; z%+1$TA_QFW?RL&PvxIMcS&P^=Z?!q?yjFHLIn15yV_Sp6=B+k=xT%UWPJJ(2mj*G2 z4;OYdlyTAOkEQ4mpgu0Y%7snOC)xCT?gr;ClNnz*(lLdd9PrKTRdiWV|K13@#}KdG z73F36l1L;KwhbjA!HU&s!X<)nWBx}Oo6?cLVAd(M`IGK^xt>S9I*-bbMMo_6 zko}QqHB^Qy{_%Pv-3gm}UTt{Kn>$b>lS#h+{qJW9mNU*cgUc_!oY!7^jqdJl0Is|4 zI(m9~IQH0MNhXt&mKHDT7nu-fZ-9pD(j#GqlV-&HiJW`&=kS%}NG+ulogI;JE8~f8 zMRAgo_Z#2+v2#9BX<3CTt=6@T{N;Ohu(CD6p=pUU^!yZp$mlw1KYD0-<0H>mI~$tt z0TuJ-P%&Y&+j`&qvN;yT*xG^!2Z;p(IF7^t+N7dOC`>HsY=^Mp^ltJ?gOQxk)g{B4Cx=FMqhE~^(I2^!9rcL3xMFMX3p<1SopN_ZvjGAR% zq%DD`Vt_2+lTo~QkV=u<+04riE;w@0^5w*$QGAAR=G++@7`D9=zaglxGv>`cPlcqA z!XzXNEs2m$UlmS%p9YM)1D;LjQhA(=_e*|)kdUlOMp=}KbF@Fmcz;Njwg?wfL48vb z>zlXJQ5q&_T2zNii4Lu%JQ86NU>Ux`{eph2B4pMOctGvVN7i4*D;bI>QOe;hnPvqk z_M19^DW8~4?aWb>)mG5d5#_HBF0z*{-x4|c@EPW3&p9p>4Em*$N)v5pqkHXk+Lo-N z_2rE?u_TRlijmSHiXtWzrf{hW1TcI73||Ng11XJc`!eLB>nWX-$WUdyl}lcXwG>Dx z@tFoCrbS4)ScZYGD$MAKli9p_6)lcUNJ_@ILYJvIhAvqWy{Jr){hxO_6+6>5V-A?X z!QcBhM!89BW4p8TC-=#Y?Hyw5!3Qwmt4CuF^SjA6cWzs8?fqj?Jqh8L5@G5juC{cN zXhjJVKL1JES-MrOS@fD5WBPS5SH`!h*QrURQ*1SC#!Vm3LEk-|^4eke10}54yq&W? zcYS(CQ)kS!9kaAF=$o_u1nZvPeS>gG0M~Iy#bb2UH?jJrr`fV*J>$xTVD?et?fN<| zEiL7|^UmXvOD^G!H{Jl?nrp7%yz|cECqMbgF4x^tEZNe<$8Ofb`oktvvFJO8@}HH> zELz{rb*D|^k1uZHvIkZnh2Y6=%;!5NPT<@3uiE7{Z##Py_buMerN@lj^9EIov#1(( z9&KB00iqk0roZ*qYhy=T^6T)#fo@{*9Ft$aP?7z+rNQN*ne7~RZr`w#eS!Mz4j=z? z3*Y%#8Q=d#Sym{QNGg8*tL}njr%$z5yiixEFJG1BpksD&;&A~!abls8&bHy?vs#!i z&g7*hY6%7PMf%5kBAjz^D-*{LWA^^L4}%%RApVyykkQKTf#=aGj*skSS(4p*9KjbS zS2FWXpUl>w2l+o{?+sWtqDzx9klx=9(OOf{hfnB>|E^i?lcZ9Lu5OpD^$sT-8{i*z*1V5Bc^?q2Iflu{&F>ur`|R2_ zS|Uk4J*SS}FWQ!!e%}0%JhXHt-3goHrw!qxSws28KUMC>k(W5x_lKKW!aQQAE{#e?;f z(B%@s=L19Hrqaai81|?tPW#%a1%wR1rj6S<>CCHW?TF&KDscZpuZUZI|7i5JC$B3D zmIP$x&3(<3;T(0*i9GSE2WeG;p{@cUv4xhP~PLVrYJ7yTXTL+=Q_h!vd?; z2AFC2!;A=*tJbaU!n6#w8V({9M3j}NxSe(?Txs+mh27anX*{97#D&nrj7NORT){{POzNa8^9leh5j)~#VDRB@4T}8Q6G)H>W{*%Wh6Y+Rd zNhi?R+8T1ZBVtt6cv(dB%4YuI`*Y~&M^Zg(D9J>eWiKz|nPn>w!oVz+Vl2(# zJ~-Lf^}J?hyi~I5N^tTgD3o&8Y&fiu4#$7$80LQN7=jgHgb@7ekyrW7kME+RBVsD3 zSor+gsT*(mck(~?|0FPO>@ZO_ei&urhcV)#vx)6!XW6Y!v18G4B94P74I;{`K|x1P z41XemR5t1I5Tz5wVi+dr=2lALY5bNCpJ}0dCdqIBDJ7*b8|k`GVj-1*08;5RXJqj6$63fr@{STyl=MLn~7Bqt;p|{y^KS(J>kCVokH;!0GjI}RqR#Rt9 zcx1-s{@;O1Zn<}K_>2Q+Zf(bkT5VI0teUa>@0E>RZ*40dYU%{3cshwayqW{QerkK! z0d<#kw#6?9n7*Tmo*xgc-=e{GsM~)M(=R)TiZR-bE1633na}@<`t5BN-t$yXPn?%u zTcf`A-9LysZoL#~7zDzl_@{;`{Xs2H{OE2}eG?P?C4Kg@D;S0*t=ik$v(q{{I{GEY z_Z42+*iL&a#gy7G>zkq+HMyEg{-ViyS1Imzsh(e)K5dtz%-QosAO-w=N#ov;G5~YW zokmCf&uHE7EueGtYxX~PY;rEE8*l8@3&m&tl3?6SlZgksJ1>}i`^O$ek2Ltv7-%Etx5MGWgdAV&iYL@|9Nm|mXHCs==?B$eK5wae$&H!f2iKK z9T~(RKI9naCp?pwa~9h0cE&!~w~a0nx}1Gis3LZu;jg*4coLVm_5zD$gWz`OYEiondi4?n3*m+=4dcO#*YhdH({o0iQsd z)YhO)finoBO>!5Yl^rwDgjF-T3~3emJp2${dNdPlr2G3K?f5g=e$MyR65A^Z9 z9PP347j(JL3EtlW!FSNdZ5=w{sNCxp z!t|y7aHrSCo6!VV3hiB_(DCYnco*>bbHiMJb2sZY*i4>iq7>ZumndJnuzv~fqF0i< z_;@XIXZvVsc9=A02d^wia>!hNzw7+hp?u_(OgXlXX}GHtcfZoW1&55vk}_ohlT!~I z#wUNf1c177KL?G?J%}AKsfztZmh$z#uVlw#Np3%97T29Njf?O7V5FZPa>yY>A`v!k z-VDH`Nt0-3XyB}~&f>V^jw2e4vS7gi9(?dYZJJpCJ+M)>gES3X%VcXh%~7A2N6nZ* z&uXOf@(= zqwTTPuar!xnG`hS$*qf4eWB~sWmG#}oOWKaiU8v6ooxNr6GOVT)dLE@G?0!WC=BB3 zwy^2hHzyH|W4lsV4qD5zM?w#i!q{oNa-?2_4CG2;c17|On^!biI(v?=4E3+ta>_A{rU$y-+zMv`YeYP>R{ zObmEmQ<(ny*Kfa7jugo%o*Ye56_7-*F_mOtGS0!i05eQK#N*(mafC%uDQpz`&)q*V ze7`X_%Ydi}IwcoYzFp_DQz`sruW|wDm8bQN_V)X7)9k!?ebRU`9z@>Xo<~kXz(!>= ztge=WPCtTBr5=d4ws-U0pWID*MC%B1SNGzT2>-y|@H^i1U{?fL{lwe+`+>($C!f?kbN1{_k=oMHvMxk&Ln}gx>gK4wP8de4 z)k&9!Tpyuil9*IXJm*NlbB4cJIpN$pxBc-qGly3WJId{D2NBmvZOWf_oq$D*^|ODyJ&s zV_j2(k(F9ivZ*E4=S{6K>dO6?QeeA%KdVDa{ap3QDIE37R~TK@*UN6e2oDw1OgNv` z4Lv|?%W}K>uAjtOesFJT?QYlY1?9rie@=4BR|c+5<5 zT!1Da_KZT;gYJ9K1N?2fS$0p6Li?or(A$0(ooJMatF?jqDNIIsi$Yb+YiPyCH_^(H zw}2zaDM{X-ZyC-KG+Ff-@9($0<=>!x#ZHUYmj3V>xmfE?Gzs%#v|=ZKCdxAL!$0!+ z_%xbW`3dj^GmZa3W(RERXO>1mR#I;7#$Bj99<%Hh1Va@N}e0g$EyKN%AB3IotMceayrrE zVP<~s^d-qPpFo#OwW5iud@LhZD%F8L2R}j^DElZp2ZMMQFnOZM5r_D>^S%hz zTwcM;i<4~LYIEM1{oi&Do9}1tZ2iz&JJew2G>f(C?RSlodG5u;wP+Ifg8^UA$E;IA z{goTs^>RHw{MbaM)P`Bx6yeOd!)fVB@ywe3ZL)s-)MlPutv^P;d~y@lo;G#gw>uRd z3$*v19F0c9)z!t{sMXcg@xAYTj~j2iF>B;Ibm&mVj2S~+T^*NQb{TbbbzFJnm84QB z7Az?Ih~N44s=%Ke$NP|rY^lTb*ZmD~{XhEbudBP5SunoEOE*>Z_O~#77M5k|!LktO zJR3+SlO&??mfA^miAAq04NNvmpwetkZ;5ugj>FThziORv+~}k0N=7%o`SjwkuAAmS zcvGgr>l=i4sU#Jvn10HBe+`KEy7h0aoLmu4VJIh8s$=+(N?<6(<~NtJ1Dlv3uuTWY z@Mr@k22VdNdXfoh{2?I)d9QGbkPX?$?u`7yD-VLg^rx&UB_EkYq<+d@pzr>`^EWZ_ z$ePT+Q|R_cFR4i7&4ZlLYlg7NL=h`Rmo(@|r`hrJs^f=@s_3abdeXLvP}$@0f3Nw+ z_CVlgQjtr6%10(KtJv|85_~?0?b@eew-7qL2q7Su^i)ULod9rGv3v5`l@b&3_1f{~%M2u-5OilQxM3FW-j(4FtJQ(Zd$+$Oo z>JXmMZRY&SLQ)0+hJmdV9m*zPC;870ZbNuiR!eI)on3texk@1#o4VP&w1M)W!!dmx z;UNUpkT6NVK~Jbel}{Yj+_Jc(cE_fA_CNE0WX+n{k&TTF)x+i;v~t7Rb-@Z*HDTP$ zF~5wj9eZ~7vem;!SUwt(3H-6{t^O(U{Po+z4@TNLYy2x(2yUvU)&)!plr9r;BqW5Q zD;3RNvaVy(+0{m=vaqB?1biTM(V!e)%9a9TxsUP3PUcu&jA;kYENfr901b&KRgOz27$UL09Z}nKRMRtmJS@FURf0mfP9EWyUoHhb z>BRqM@4Vyes_M1>UAvq%XL?KTg(QT85&{GwO`4z}Rg@wsTomw%3Rgt2qgPN-1bwl< zMMMFm7m?lxfh3ULCsQ&d)919^*89iWr_G$1Od2T8^ZA@)&OUpuy>>fiuV+8M=OIvB zM9s|FJR+s8zKz%*=V;1u`0*`6JzL5zVX5>gnLGq31JKsiMoCEtixw@Syu6&&)>e|q zK?6QA@I3Fc1136yUt32^EobR?9Der9X6ic=dq&CtEW8A@DG2}oAOJ~3K~%VsrWN0&rx}1%uUM>IVzb|& zyB0^i@)etoW{;!K9X=^zCFLSictsv;r!Z;U+vibLnf(Q@EXk~e+cWR~d`A@v4^h|U zx(yB=J);%Jfwz}ioc)OipEzZpKTL10M|D+UL3&k%M)$5)Rg7Q+AA0PL7EYoD%g>+& zriY@4kp28u?%lJ8Qju&#ksB|tXPz;`K?lm8q!3aJOywy=Ks@EY3Zak@FDMnuuX5hE z7Fbs`24irXAiM+^~xg*Bw@bL@BN+q-ZwD#F&M!+yy#Gu*r*JDA$hXHg#6wHwP}LDORtAgXm;Kc0cUSJc$haQp4I z^T;EQ@bJSAXQub|_M&MTKmF-X>FMcV%a$!X^w2|`bka!!NSVoHCGPmRWfZ5&It(2V zi6CZI60WIGhMQ?f$^8$#N<1+z>8ZFVsQ2d_>_m!0GDS!Tgitr9Is(zwNpF2@|AS9H zX#HEyE<2zvS_&aL4Upb0`CQ??>l3aABed{V~H*d`s`OvQ<6TGq%d zmz(PU-cf{wgG6-o(zq&_AqFhV!7H>rAAOxkWIsaBbv@g zWx~Qy54jO}q+U^m849dV#Z%R#i%O@4CzmXn@La{wD6K5`#u2Q^>oiPp1lhkkA#P-Ku zL4W;SbNWT6-cu4Ti#B$)Fe*)q=Bmj2)3z>1;T7KP}r1}YSa!U691 z@wwDYn1Yt$n!obNWi&nTDzihy1ab(Td&5R1zO)dgPoK^;*IdK7=blSlT^#^l`N~)L z*0;XJWtUwxuPE+?8hjd3Tb99}7@iKHReoib}-2I~oT*FpPx70#w3i9%`y| z8XB|TVWufECEp8=Zzhq0JBe5_BD=Ofr}_zVI-zx=QDtgQV;>G`ZAPkECUe zU>FT;lDZTvls4cwmV+g#?5EV<}XW|IBatHfHbE5*ju4EL&6BO0R!&XL!r?9 z^dn^|D=WF}w%d65<(Ikj)?4%DZ*FeJb=|!9)vm5CqS1jRZ%0oYm-=XPw=vl>5I_pa zX5FP(3v=par&2k2UWMU**_i+6If`TyqZc`Jg)YIriSh3%sz2O>E_qo zJ+iMm5gk2i`l^bKs!}r)dQc0RL0x*LkvYcFZ?90Pk@U-Y(gcVmW_Cp5EUBL(b1hoO21zei#2w!mlQ%j*>qgA zA&C@C5kpeu`^iW-umosO6e@Yjfs{zwQEDHNJ81E^v#%Q$_*_vxUk;%ogqE>;kq9D{ zW2r7LqslND+tNw0u7PME;Ljkz-kE)$N=r(UlJ{1QW4wlcoJBTr+D&D*M>D}N>DFMm zo1lAo4Hy6P^F*taPsPT~+d1)*-=VW>pjswiYGUevRlZ?w7V*|@+=PYc;qxcvrF~iQQ(83VQk$H2shk%ffP9ilU_lPrvZv z@2r0G?MbPG$027OO6!ufbT8SUNSS^|M+1Z=kpA@?(ewf-Ps2k1!Dw`>ciPy#DaFeB z9zpcROie;bB!bZ+Pc*E+!xhDo5K_Zxi&Iro%eWKg|JL)0$2V=+ddg@t-1c6QE9xie zMIBg<4Mw1_H4zZ?;Pu`P#y!29`4=98<|~!vA269IlWOVhOJe67|Ds5MPn|Z8Ll2on z`IzyUZIx2e{`d;Y!V%_&@|6&!CPR`k6DLljx3@P#$N;?e-g}&U^2s~hXQpXxOe7L- z=S|d%K|K%KV|GTxnTxviIF{paz_?;w+oZBN4j5a)#sA033KuHO=o`%=Xo%12k@Ozq|Bl`?rUjU=GV%C)O=_?GcOX{=92m zJVsEoqLli1h=jDV0<&|>Q9*9KqYulH1Ofsf;Nba+eD8nimlO+*KYHh?onse=_}>3^ zvtp&iy#2F8zURS%kHtCeBm2g*cmyN(cg9Fq{0K%cf`4g*f`W6;P{d4CrOq)&jr^Do zf-n_RE}?SrPV2NDTHZ`Jp!3^L&*h~J9hs+#{|+cGFXy(~Ze!`vrTpw?KO6A*(xppD zrBWUUYBUrU+Re{#T05293L27LSkNx~X+Sb>D#p4&k`eu(1=LFzsvV){FE5?^ z5+l#bG04s7gJ=6M4us|pDa)3W{+tg1cuS?nEJ=alY||QDxnkG-bu%{woH@Lri|v)lNJyy%I|+P z65!ic9#3h_s63U1XM5DWx(+XyVn)g_sz;Yqj{W$=NXe+^+-HCL)J>~jeuuK&1h`^i zPhDsCio4&TYf1M3c9Ag#$D!iT{i)b*27O)Kytib|`qME-?Qd0-N2#hTp`tv>#b+PR_1Auy^3nYWnbq|)zqXn&hWa@XMi8M7 zPa(N}{rXJl5`bYCoN&SktX;cyxA*0)qC4U6(DG)!`q8Nf0nwnrG08n?S#^W~DAv@n7Z{O936G%I!lBN)NI6E3|t%93|1ECVhQ<+;r1T{P2fAWZAN1j2blxAq3z2<~Ij6CQyS;&YQ`s!{!hjQ-!W;+<3|9v~>1R-`vi$@iml$gVyV}JpFKM z${uf9$rINvTTN$6JL9F!7%fPJl_oeOI5rW(Ky=5%`iGvHTl&_D*|B6?^fa|-(OuW4DwAF?)-Kg7Mwx4Ixv9_+X6pbojq9cgDxSDuf7eQB2;`yZvdNAvs;z?qT zgK%xe?LWG4zmH6LuC=lKgs#>uT6T0&zpb;+y}c#m*fypvs<7;kZ(W@2>rSEhWle+3 z>kTaPLIgk-m_A^>w9+QGe9TvAq`hXm6kudcc;#S3lIPE>Ow)`+isf&-6OY>7TRmOz z%9QK;y7%>!CBfc4OcC(OhW?|b^eCN-*{e!p>W`dqtDS9MUTBf@iLflOmfP0d@jfgm z`CO5&_7b{ZDwg*6k!gEkl93Q~o=c*qk223=d@z6x8mM?Qi#=H7}{@`pR|njb|9uB}};TSe#7`T|fC93r||eQC~Q&J+&oyo9?=;POo)y z(IC$xwaoS_Qff~g0i?G(P`@1!E~VHA;b=SzQBjrmY7(svR zg-1Li7{Lfe0G~Ol=)$}2sJ!cg?#KI$uYIfQs+(`^`Jl^}D%k(D*Er(RVb`ly76q78 z6=r2)Z=M-qWl?~tXn=Jss{H4GaV2co5vMn)2BFcQ!IbI6)lY5j?~$qf zCr_R{`Tokv%Cpk%OG`@&mLhd@bdX47J>09StC=@%9$j5stXQ!E+s+?M*tX5#LD6?Y zb5C@V9z;uJKTirtv+!6alXQ44Hj;p0V1$BrhKZ+XxKfe=q-BBYqT3d_D+wZ~)^x^W zGRAR3HK5lIQffhjk|E+l@k_x>9IHO`Od7(FRi=A>P$|VdGP*^g@Q)O6aRPr zHz(N68*`7EH@oi9H%lgF2qd2z$n<+JK}(zH?xao4%#sssDks$mUqM4oI?^B|LBfx& zmR`oF*8y4#on}*GT~UyZXo#||9xD2h%+W%OcLka|RGEVBsUyh{JxbN1fs@SmJbhDO zWnmI#$F_}*ZQD-Awr#Ux+qP}n9p2cs?PN1EyZd_HPt{)^2X;7DA4?_iY13p&phJj~ zA4*H5|I#e_cA&xuoH%#DlegNLWnt}n-C+kk%;y5e)x^TMbO3aCTdw=cQ(4oyk;e+n z+Z0tjn3t7W^(`)n^@bpa4x(Y<_K2r#pI!Ej>`MOmxA%Bc8))Z8a}|tH?1Me;)ro~g z$egiE#n$Z0=5}Qn8`KYTS z_%&?T+2w{nDay1WurN?znH)a2ZeB?vX*@xBMO4_ieNJ~2F-Fr}q8cn{&1|ifU~D}t zViAS3@?0*Y)!D(3(J#r>A%!FYj>b*taI#YRp6?j;lyE4_G|#WT*~A1f?(wW^?eNSK z!&myR0q1svTpg*T*ce3fzYK(NuD0;QJBPNqJYY4EVH9f;WQr54oVcJmh5w}Lry5tT zR)<)^(cuVziGoUg%fL+`Ldpu8W9KBPw+K_&&NUY%`je-dp)<0hlB)Y7wNd`642>5+ zgAV?AOOCeK{IJV6UHPQMImh)5`y)y}>ad*2cm0uDJNt)Jj4S70FhWq7GDss%{PoV~ z*(fi!`qxGLt&e@P6B`dy{b{75`E9SZgF;jLYlQx)po2A(PP^5njo0h1+~{i77_Yb8 zGc(f}TJr2euDAMueaN85G!9B;1MWS^G*oWBJ7 z{DPDyz|IY)lGo%?pO05n{$Bst#gMK9&5d>kJNItm0(HEmbND!AnkW3-{I7si$0t6b zMwpYUtCG%6uhRSG=H}Z;=9vp;KL1H0K>{L5OnMhf$oU!%XA5L;DGB$sq8lbwcw|{B z5WQ$ZAq>!Z z+=O-Cbm^L&jl?fPf}k3t@^ZR{B{#ip?{l@9Y6^qHBI($3z)cHzE7?p%=W#Gdz~yGz zAt_o0b!1dmeXg=d*h1sM;8vf#j|mS>&?NRtNviay)^Rg4YJcMOH}W#5Pez{M9>r_; zFia~%0ouCk%x3LrdTOL0PK!QF|7^1#fIfJFh&hN*zK6YRrgpN2r*;+=3_lU-O7bBg zDM6ab5^;bYX9BPC{W}y9HJ{OH>13Hz<#FaZ(!9R{D^XvB}PlIeC!#EmClS{+H^GyA!^lY}oo`fVll>^b4he)xA zFd_;z{+|meOPyE;^B~cOFNAKbu)0hc z#lJ(33C}n~_T;K3&Je&G0O9QVc|45EH4Rb2Q6;u4U-)&25a7P$ zb+Vyq&vW6Ca|ORH;qqdygAxA)MYDsG4}!!(oTJ}$ZeRfn6CNA^hJGT!1B#!62wK#K zis*ddOCDsGMGdzNGaRdiKGG)`3%c8O0uY^f84CO8?~tKJ{^@WAfR!6Sf-uJ$&*S-3 zI>LRLYoLzI4;P>YwArAXM4}}Bp#_Vd0ALYY7(K;$KjChRn~)zhy+Z>Oj8kk)RTw)> z&@b2_NL=8^QH{T;rKcG z6=(#&{S?prxE|9WOsRfbI*=9~abNSA z$ITRg^lQN;miOhgcET^&{Nx!95ASx0z!}5b^I9Tf>)pSzew2b^@9OmQ_4?}S>iYUJ zIlFboU$~O?og7)urO;~Usk2mCoCzlSSHLfdr#Yv^F@+P~yO>dd?GIln(5XLxw@noS zMJlwP;aK$2d?$i;;8Vg#Os4=0P%egv`TC%tWpuj{;Ng0(l}83CVT*%06)%!f~Ib?+SclrCaxW+tt1i-eTsD?+~&wZs;`jJAC* zdrE7zZd?a73dv)<9)kYKy&2q=Wvo|UZDpCfHPEgqQmPTBw+!ri6qm(-5e4^ z#z5{hkIYK~Eg~T#qG1gXA}4fu^15oK#Jh2h`#T_&D-?$hNCx56C<0X~PJwEuUv&f75-7I=^jMKbLQlK2hes8jzSc z@8IeKGu-^cJNiWc79c=Mx%+kxln_?1M`>!v+0#NcGpHuh7^ol4ZwQKY{;J zXQ$lvoChQgsOl+oYWTmncd?M8JiZS+t&8TDb z_4>g0%ni+R^BWtTaO!OATHnV(j@7#AjmznwZ)e|7n08P|oT-e#a&*Jz$J4&9!X1#Z zK`{VB@(7tAC4{@bHjr=Wtf*|)oR@fXoEPKACW&PQ)!>{RyC6!`+UJJO5AzUy=kvSLV z0f{PNapJ8Fo@M()0{Pr8@KG+9O$jgq=bf(FBq+u^0)(Z)lVaq(53k7$K<9vwHr&lj z*XDhEs&uV#d90SIvdy%wfx#b>(w$#)aGj?=ex{pGK+AfFN%bim5+qUiH?n$q9+fc6_Cepm`v9EPp>e&}| z1NH;q+wd&b4+s~?yQ1#_=Wj2FmkK948~4!A}Di4K_J>6`xfnDw*8R$#mt^u}q2LsVxQjUj9(CO+E);t@Azd#mbGT>hWufE~}DfJvB zaHhV?@uPml_f&|Q`<5r!ePr6I!5pM@NcnBhQltdLQ4^*JxYJ?XuMq7ff+)i4tdey1 zOEUpJaU5AYZw07$cT(k4$Ky-&k=4gqxRN{a)vIO=V0%pS8Rn+3(}&FBgIE9 zINTWMn|#-Q#$O{*3#FO~vw6AH6VIC$u~_S|gGCeSZ#z8Bdti5DVRwTzJ7ogL zx$5dlUp!W_a%(;Q z|Fi%Ng%}BxUCPj{wFtGX7^j?V;Rw^hu>JxH5fv5$)&wDefzw(7cITqbHl3A?Imzp) z-14#6=$zcRKHt;7sTm(!6clNmGX7ro;ttWpQvkQ&J?eXL-q0p#K6~}C3Xn(SVf_t= z!R|!oN*~P&tG0RqbnwMu_XggXY=&Ta@xw#`e}(VShjdA78ZIDWar3#P2JzSPAti35`ZDfz=MNG^Pje~LSPeKFqPOUb<;puYZe z@#Z8)8vT6o>r-8TLJ^NA$rX)f3%((an+CG}MJJxUg0$26^`?8n?}y)pB06z_;0>ix zvT)(I6+|31ee>?A`nTtY_WRF469N^k4ALefK_1&idG{~Odw?WSQQ3b|0zvcnK_k<- z;Vh%yj954Yl{k$jH%lUw-o1stFC{H7MHsGy$_?|=z#dJeqgS}vY0LydP}3(7YoYWX zYtv*sLs5~F6HK^U=ZJ?*H%Ca!)@<;4JO|<2sw{)sdQd)cjq|qK@O=X*OHMK=&5w2D zEfxFlqA?p$j*_ySc}qOF#KCk$Edt@F^mqTmPqi)!Zdbw8xK_;elj3<7n$|Yu*2|Mr zp_7phNnAs?B~qPEQKGFIP{~K)0AvJd5HDW21)oRaRZ0vvrW~}6R6vFpCWCe^L!*rgE^IIE zAIRdbTb>|;7w#h+U0a z13R;yE*c0t=UM+#T3Xs4qG^k|F`K(3?Nh9rq^G8BFylxUn=8@dK8g~?;Vuh1A?Dw2 zYE34}fMA9anjwXGDhfE9A)3@uwbr?%PMB@cX68X>W)l?K0Wce^fK%zq-0Nh!GJFs9e}=9Ms!KN}5FM zR{{w0ec~ioA%9w@jdKK5@QdVc*!@ZS5d2&Ji1a}w@t^&%Y^MIZUFW8}ZbHFy-oEhs!&Z(gVk7#@Ga>o1@K-$?%4 z`)4lH!m!>iXw-721b*5uCfN#s@kT>|8c+vfVLjCU!gUM*1_G8DlOGT8CJPw~VyGEr zH&V?n;p2F!f_66p47?$(x5klK2{JU*xx$R>8q9j#Gqn6^v^ne z&yzV@FO$kYq$O};RZ@BKVwCME35j!(LjyL23m4^{ds|2!B3W`zEDWT5l{F~m3uw-m z+L-YHiSJ}5;!cqS3a2Dd88hn{Po^qvLP(53#z{$dO(lgXQB#&9HiE^f2wo~w3JIap z^s=)FfnxeXMnnk!5fl`pOO_5b8!cbgUb@gEs z^YmCIo8OoBRqyv#x70+I--&vU{Q_u;&3S&onDIB`@W$-~TTPpq#yTEzV?to~cY!;rkLiI(^-O9{V@BVo(=T(&)?68b^Q{qbGB9_?;&G#=P7eVFicuK4p) zrN#C`Z#^dMznsQguEYB+zvM+&y==hh-fefIXV{|z+03HklO&fG58v1D&CNTbjP}Y`8*Zgo(1-;QMgN3D? z1D@xx)zWlo<#^y5L?Ib6^Dpx_GSjckGO7^LGKgcRKgqD);}nItzji8f>34_O6KQ8qJVQ+6~$kQuyD%>|+G=)^x)yzxo3F+-96G!-t$P5pv9@6sZ8(byX} z|F*>ES&4}9*Iy{|i-s;mz@bDT%tid`eLu$8CtMczVv`5ahTy^k7cv8)C&*Y4{lz33 z2W8O)tU~3&B_%o!O9Kvw`P+`s`0Wn$M=Bk)u4(&C_r6s8&jDbaGq*eXt`F;fZ>kF- zM;jGJmpYi&Tuj31kK&*dQecu*k>an}xA&&7zehb-LKHgaEKv{wSSkTpKc%BCa5r?f zchcoW$wpV_@by=`g!n;(R%@LQh`vEi-y9b*Qc1nF!6}}2cRC_aqq&=ocZQ-+ zM0gyV%K&wGFP$=WPOXI|8emX*wJn@vQ!B&V-5l(x1)Yboe-_K{Ovn;r z<`?1Otn_BCZb7RJL}ILtb+TOg16K*UQ)@HL+T90rvFQLYwjwk+R;-Z+eDyGrWvrIK z;|JCdflkEZv{YD-z_ok?RPxuQl-8BOYeEw8oUu_r4!5w;z{we*5{M_-loq z8jyB2mq!PBJy3lGcXq|twna5=Tf zejHW$C`Zq~oa&IK-_-ep(`%z1c5YLMO1<>UZhD_NahvP%#}vlG-d#jWCaD8$Y1uGV zh?z-e3%kXNTZCgzcfD9fb211xNk4HPRQ!wJ ze0@Ru>)+?HTNSz1_7p;g-|m)cT76Php8@X;4o#*~EfkNqEgJp(HUBTIM^x_D^a*x0 zPLK9Lr_~^?i=6b8{Eh`hyr7@nBCqH#Rx-JQDsDQko)bS;+==H$z6JFUo*luYYDoX( zrn&ChYQGgfZTkWZ?Xue^u~dSrbzzIB>$VP!+tET13DB>e2>Vt z#1#jTe}2E%CHm1y4!+jK+x&M~*QpV)()vv%_cV^l0+4*6qL8M09`cBp0L4P-P1s{e zQ$-3CNTgQk@!4vgJ>l0iFJ-U=TSy_fF-kkfJ_6~<$|RxeVHTB^e~=_Q;o?cfL%PF& zJjeXNKEFXK@M!bi3e(Rx9@Hivdy_^WD*=U30V6{0l(5TWgo{(Lacm{$h{+YWWb?vA zaVerob`aHYk1KeWVOzGwb_7gUsp9TARP*uEghNpm&%Fc=d?Y0DBt|S9bjP9*6xagL z5?#gwJ@}$VdSoQ^c0Rg6ig&LWnY&=HaNwkT0Z61CWMZ$kh}wr$LO$ z(FD@N2e;;hmPld}$-wPB@%AJC%HsN)#*&~7UV{8>_bddlfw`i=alLODvmEY=C;6?A z64B+zxr#Gtw;c%xUMCSaE*mnDA+lUPKdfwD&v8r=E3)p&S(T^pr7wx*(;S`*V?Kt5 zl`r_CO>`5Y(F~~gTp3c(O&8BD7jW6h8FwFkzh~W1B=UE^REsp<2C3plrxI|z!W=HL za&yi5B;!ji7Z4%qZ*Y<`?IsjTLaT2p$3j9Nz4bXM-uvXSD5ZH_Q0{w3=#;)h2~*~1 z$kHGsF5ZiMH@qDTTdkSK6do}{%Y>0|Q(!ht6$Q5|JV9TdD zbZ|7agdwKB!mDUUlNBj*g8o?k{SO}rBb*eVf zQ8+W;>K5qCdobTvp7RRwt+QRBmhF|v248xF;>k^F$76b1{vD2Z{&ZsL^R1W@?0-K) zMU0+my>(_ksX&y{WfU(_;d3)UO&P;UHM9#8(Dl*bxz*)cD6G`@k5Swt*XEji)A&v# zurx;{qR3t7u5ZwR&q+>U>y6JrDosE@$EXATM`WU))(cbI)ENr%SNM-FQ}BR3;Dz!} zXhTKW#&Y%>#)yovg(CR&yAmFWtZd+D_Y%j8ey=i3Ybo(I=3#mGrGCd#HtR{b}YKhf5dMfYmKZNVh*7Bae1 znfPG@t|25Hmz}a59;Hb(uZq9n3nKUJ?m;=SiXHMp>=nu`L+&e{t@`!?j-}<06-QP$ zH&tWW?dY<k7vhLKbf0K8Tj2;}N|*{iQ}ivxQun%-*dljqp?PMWM=&u;D_AXf&l1 z94KX{;M{A3)#u|C_a0mkC00oi@uR7?in&mMPIreBBjOxBjEW!xBF$pOuPzH_8%M>K z8_Ze}AIuYUPXSt515x`JdGE0k#YtJWrv&#~XI!`@TsokrydN)G;_{gv{*S@)7?@}% zqXjq>n*uJ3^K|?%%e~to@=cgC%^sgUW~*(M)J{*iJyg5u;R`1Tg%7tQf2XlFEBC9Vt7t{%&OfkeQ%+9co^$*K=}jjYWK0>s<>Iz zaQ`IT>{oy_D<{%akqs}cuJ0!GaxloVJ%k+Ex?IKA)1)9XbzCD+Sj02?sk*QJs^DFk zxwb!%i*sTd3=+0`P`l`DOUMf_>`tNp7mU~t;tmayn>fQ&S0Sg%6ohjqdOozVX=S12 z^4KvB&o@Q{vZvY-#y5d$6V{yHPD)=pd_G^1Ax_lm#MM>P52M(uV=cT>&CBioR3&0AeT*C5H6D2J2V`UNXPIEgR_75T>-$I(>`$Oc)|rU6FqueuWz7`} z!pg!D>I2kyx&xGsmK4!g)7fj1V7}X|)jy|&i?si6-y5ziSqK>3cgDCrKkr{IZ>e<6 zt6v|{(q(|le=?4r$7;IA6qyE0vtLn`m=4@X(d_X$B7rU7r6kwOW1`mfCJ!*^f2e1t z&%?3+)zV8kTJ^~H{=;4veC{Xw)03q`@%Ur<$Qw}kg7n5q9%0d* z6rkjCg<#abw598$w`b-g`A6ggqV4GV)cGUOPPu=%huYH!Jk=52aM$x2ezRKn&L64lRziW1GXM>zKOMZe+P(ar-c zUTF6U>v1h0af1`SEc&7Ie*~}cp>#na5|p4}`oH!l8ziNC@8HWUY^nSRp+UB#(`lg@(c{Al6;4G#yCi78j$J7|Rw*)JvYhn+cd zazx+`muUZEWc<7+$y8pGF9myudSXaWv~)mi(fO)!0By~nXgozR7!;YG4v17g=weIY zEUVDTBxEvTn5vOD9B4wr8g@i9p=@>a4+{M|%~G;XQG&&o3CI;%3vvxM+YqT}h1AMA zD^ScC8yDg*ZtwT58_Y_+hxI*85r)BO2Ny6LRjK~x2pOBLtrQB=YIQu*+mD=VkkdpH zZn%(&xd>L^^vj6zt!mKS(*kDq525egGM_2U#u7?dnvT-?%Sp%?ubf!Y>gO7>Med6KTbh&VqoxosKk11PkSvbNm81UG=q|? z7D9Qbh1sS+_kx>Oa}D^`@7q%YJGJ66W5>rEiS$8u?kIDXiFtX1TA!KwX?%t`ysSxH zLrYHSTJ8w{e8$F>uyx&y327WI4%=QTT=@jYhGTm@fFMdhLY<(v^^N0%KV4ZECyALBH8Vncq8A$D;ktCI-z?m%%aIFPMC<(9m;%DlNz5H|Qb=cHffF^4YK;tmML9DI|*Z4;^F&sk&l>QAP6zNzl=P0tjz7+U0Q{-MhDLV zj&cH}sy4A|#G_MPL-_NPnDj&_&DKKeC(ThM>pE|F?c!*=U-KN8Zt5R!h;~wNChl{5 zq6n&;9*=(xk?PI%f1CbNLR<9^=QSX7I7eNdev|WJ9#|}P^{HL#P5+@(*#LWgfKaJ;^X~C#twN-YFDpb3xHxZRnV%cf}tMs9=Fn z&|)wzMStxaGwCQNvQt!LBw_`jA_Hc}$`}BasACB@fcyQt_vTWtyDsvOC*e77N6J$ARygF-B8qU( ztFT98)Bu=Bsm2}-uz2aa@ryMcs1U-dHI^3k+2t$}W!>qf$Z688#lYtQYLPw3sw3Ao zMRd^`aYD*jpF7fWs0Rrow8BwCb~eH1K8Xu*qs@&q?x=c6FNj{PpQ7I$A?Uf4h0!Ws zkt9Uy5jIb2?E(3|mUcAtyPW^O%gip!U%fG085TC0uv+rve}r7li0 z?h@4wl{Q?@S(>*NHk3+AV5LgGi6c!4?yaR3;&Y+6h?ZYvn4aU7Tm=C zuN^C}Cu!~Iju_?N?MW1Z+*nsreqbsa#lS8Ox%~cgD2ZvFz%i5tqkDDt(PUiO`FXsPDS?%rL&N^mv zQm^r$fyWRW#}APCar$2yQX{cbH3uiZ13&IxNvM}a%4!zMtLMromRIT|UnhPJ`h;BH zUT*;cDQOlySD`e5&#Fu`YFa*DsWkCi8tb}`z|4-<`%gw)--eXElPiRv$ih8VaC(RF z;aXQdn7p*(>-@3wZ$U~^*ASdPL6f!mE2)xn8Lmd@K0qic5lQ{4r6L@Ad4Cc3dK^5U zzMr2l*E5*5X%EXjpN4^${rt=Gb+@BZz|z!`m8S*|*OjkM5IEb|`!O&^ zm-*w06^E84ADtihmvV7HrQ#TlF++8+NDN)f_xd^Uz-gvM0_(m~gyXB{Iy$Br=U_hW zWtzM-jXNyu*(=d|Am-8ephL?MNCV;#2UJ2$ zz$wKuwMbz~S==<)G;Y;%l52{!V?Cj1f<5)lISZRnPE$CFKLXPRp zo}cDkVlm3HcoR=yFlM_g@w76v>Rh7bWb<|n(}0CDASvhYLQ8t+3~eLSugXn832{S$ z?uI|K9l(qLx_l)-F_Fid7qeir06`p`kpbpd5<~^|+jBOSJ3l{<9CyRKvwjzCAHc#~ z+TRcIE8C5N-6?RMbtu)42;Zi+c}E z)Pr>F?{-?reJ?94zb6HozY{xns`)&EI z^&Ib@ObQ+nHlw(FACq z=1A7L$9JU2D%qd(16_SMMU7n2i4$lr*rY|y(C-Z~YrWRah(Sbm^qi{ke!Ru->AF{u z(VKd?{ZT3J74A*S>-O*cwVdB2`_imP*TxlF)r+cPad*{oaZr=jnJjC^Yr^XXFcUr&ms)sznV)$o!1}{0SJ=3^ zzZja7t0Z{{Ny+>lJ?npd+;?D|dE+-ZHEb#yh-I9;X*Cd{Mz^tc%T(A805WZLnxuRR zA5y%W+8q=yZCv+yO3#_-yrWbc06Ihaz&(EUT8_6nr-_RsFblb~iHRJ~D2uND?u~YT z9C&EVp6D}yCP~3A=e2&HTCC~A=XlLhs~ERHTgn)UaW_#Tou$(EcWG3A?f&&XE?|UV z;Wv}o0it@s$3CS!ZfH%6t2Ie?$ut}FG^z|q0-sLd3hbXs(G^>ANOg3yT|&H!P<$uG zNyOoJLRp{gl^Agw27yU`HlV{f=%Bc^3jyIcnW6T|RvaZrJ}vGLE^f)8z#y!?TWuDd z&_7{8;B9mnhyK)vV)4^X|4$2W5)=_>Pm9BCLIfnce4`EF3}=CpSIX^SHSe_)=3)-~d>*U$T>K=QeltG)g8DcW@qBWh|r0$rp) zojOC(x~#OIIrZ7r>#OZfa-WfU=qr=p_4^{*EsI2@{j2v_S!HzG;hqj>r7r<}g|rbg z96Ev+vcO)J(7qOF=wZJ?TS0`8m_krF0TMclWR;Z0KttcaX*$v9*}1C1$=5IIEGH*B z-Q+K+`!!GQjCV=rUb#|f#ktR!N3Pqe(W;G&3Y-B-&{+cGZ%}oiw7CiwXv&ZS8&@15 zMA_r9-j4X6s72SZ#z-GySR|;z4cv9#M{{NT&S$szHTfn#D+7x5a!xKvMZvpx*(Teq z7*}3Zz8giK&m<^4=v9DS_xUT+=BjX415!4Ygvg0Cc=i;Euu{l@Uh8+{JUNRZw+)L> zL6hlbuI)!d*G0tkb@NTSNsEovOV1w6F&-&h&&>-lQ6VeT;k$Igx)%R@hk0?@g$Uw+ zP`hv?u4}N89A|J!3c9Y(BkfB=mn=yGzMn^XI<;KJga&)JjK|7R!fRsNX*%t&Nezbu zG%r>xPVSb_N(wG-bqcv^Yawe?4eWh0f{a0bMog=&zU&&qVVcp24R@CDyc74*D*~^( z@Y^9LxiUU?*0qO6wEk8(5&nlwN;iV*EHwU`O~~gl_qC*Gng>L19f`J|aKd@b6~aU; zAJ1fLjXZ--#^A|FKGf}gZ1~NJ58Px9tMkNCt#9hVnjV?Q-Cyt$d9Trb`n@VIX_np3 zhBV}KxTc)pl=-v_Pgvj6L6a0wxpGK)pVnae;#wExx14WTOM4IF`!@LBMj*%8NXH}G zZ|<&=jG};nq%poL+KX>NnflE9*$_zuYM!c(pR=NA+5q#;dYJgR_sdb|?MD9F%^SIo zQ%ywUHcMPQab`$^ji8HSqKWewkCjPi;(t>G@@u9a1Q9?26l@(7cVdm7BotIAu^xvm zhKo|BpG0H>N<7;QJ|s|%5xqnUs3bU4C@O%-7?%Z&7|(`{0A$_3f&!lbg(S z&?0?aa_Kx`ZKy<+;N!umHL5(%;etGU7Hw^A^P8t9zG?!{UY)!(r$QnGY^A{+FS)PY z;{tPj&lyu$V=z!f+0|nWwrZYsm%*hd%UxDmV>HkY(a=$w806@1$M>poZXrdQ?sun+ zY-6#O>xm>}P(c=3XtPN+@tiBcrX2o$$0UZw8W<6Q8N1aPH=;4W`W#ozCaopL8ytXqlH{G?eNzYfAa|9*@YW@ru*p!KXx+K)e3jL7vzkK zYR7IKS>Kv&;lDuKd`UK{Vko?1aOD%fy9!mH5Tk~ouO0Ank)@#~HCQj<(u^_Tba#ck zOt(^l1iIxgkKU&)c~4Mdce{%v*!*W;Hf{DH=yhr@yef@WKU-_}K2?0&ne%4oB_6<7 zX!*veQ!MF1c4~V@v)*BRS-SLnjyB=?z(}PV*(4m20YG^D!JyX@`HEA!!{%Ee;U3ocKwB?;I z`uA&Q>lx1b6CyMed@jaOc(6tcXMrA))59)OkCO|%Sr%6pV{MZCz(>C?Gnn`BnXacN zS|h@FY_3%WX*SO2W%|f9=LedS$+J@56s(TKAr2;e+WBA7Yu))RB<Wo;9Woqn>Nw`*1A=Rw+HFq&Af=^@l64`y|g54d2|5@ZJ;df58O?#>n0 z(R2AuziVs7Zw+p-i17CnnT_L5;ovSm%^#`v|Nih!Q0Z4qO&~1=3JhGh-^30>ZH!@Y z(KeDnuoeH*f$^LWV**>E9I62QnXYIK~+P>T=F~2h>!yde_da1-Yj7=*45+ zV<&fJj~kyEA$@QHF4LYFYMT4r zZ_Xu}nfm1*s;@d%PGAm08Q$^V=N1};lEFJouc32~FTLv2-ed&r?9~^+4c;z)?1Ss^>9)6jqI^qJy9Ukg}Cl(xVjp3QE7;{ z_Dcp`4|iNGv^s-xq4Ih6D#L4!RvZRfA|f_eHs{Msa?gp%o5Uxb+I(f2=urgJ*3-gt z{C)bKP3MW1HSdQ9Yt{!1wHut6Ux&72ynikSU=`0-~=_okry*nli>A0sN z1iabZO*PgA>mle*$V4T)`JTt$KUk{RE6`_Hcq98BrMAPxA`xNjkAqg@z z`$aKy9#WRpe?pJ)n>(|%GsYYaVsi`gd1R*VPp4pcVx0W8Yj=MBYg2DGqD98giZo#* zc~^hQ8?6vThVv$2iDti`Y1-#!w)?w8H{)FXH=|wV5N6!!szmM2SSjRe=yfDiMcOT> zkMnCgb;O9#Yl5!HxzNzLO%!n1-mg&M(zah&kGm`WEag{I*W7m|YHhHI$gb=qRDYz$ zyXG13ss8=7>wcGAFXVuH(LN3Oe)S}s3&RS$J?X1gfBVc^CE|PC}!4|=Onnp;*f>3o$BXfU>L6Jmvem68u6z>ccyzv?~ zA%KFn`}*387VlNaNs5-_FVF`M5>&VgLX|5)3PE_&QA$?xMwQoIe8Yd9Y79RmJ!PGc z+XR8G2bhDhBNJP}B)KZ21XslfQh{KxL(0fmv+IE@M}-Xksym zQA8{D#7kL#^{`Nt1K6Pd+Htn|BPMua5vMB1WNk?3kwihSE?lt2T*gD*YKM3fiqD}o ztQ2`q=O7AA;f>yTvE9z8M;U7*nWXH5r3E+OwnzvP7nI{^jZ0n5&u>ghYqcT(TH@`O2kggv$g!}lnZ^=ZRidY@><(1sY_k7v3ex7Zo_)>M^$(zjVg=?%0nXM zc2kX&0?QxZVw&PNT4bG}5k2$z;6ikTsjL(Ax*Bb)V$MJCJ zbRd@03YS)W2qXIAxTl~&#`zV=oa~BgQBL_r;xOY!s*ak8vk^%_G#On>ke7{uR!ip5 zV!x4AAP0p0gc#SLnbELC%fV{sMyuGOvai+m*CQzs1}Yb-k7LfKSydW4BT&e|bL+MC z=c9@>p-PO7)I?0q%ApRRjl~7Sj^vNAfJz$CaTy& zgi18G6qXd!@L_eG4$k3gS~A}j2R&NEBBal2AaSYBs{t~QGPH`05($eU2*rusZ((^x zF%?KYWT4j^7onGGoR}{~tEmk-el6R%K&P{Sfe}{^vX(4vGLM6gc1^pfL+ktMo=w3m zfnGyAk?ZVa0rr(nv$w~x%4rLjru74P=veNq<#882>SOLj#hJ8B+UdS)#_W$%50{kg zfO3aT6l%oUC%RXXF)4`!J~deScJuF}@QDDq9t#}I^77<&LxO^#p{_Fmnb-r7%pmY9 zjOgV}A(~V3URr^9fhK!A{|x9+%bk?>dmP`b?C4g*Br^G5m=WmrvA$$^69LO3dk z`JdYhS$i{=Nx6g8La{Gl9A8s$AZ;PSA9S6;dp=O4!7z>{KnJ}9tN^Ns1yoid{WG|U z6T*O&LXA}XXl2YDiz4?)CV_6|rAb*1TU<|?J|4 zQAj;6CvjlUWYJPB6?gCWa*0=Eb7oRdJq~q(u2EINlNn5S_4*L5imcdBRUF-ZimJ1V zD7)F6HFu<-qA@;FT}{IMMiDFNx`OUAj+%4058WRkORIc*_u{W6q%)L^U|0&VBE(vs zEnNYz*fcO<(sZpv3Rc}BDxtn`2C(Xf3j3E}KnBW4R33+(tS&JlUIKVorSZ*Vp+WT1QD3j;W0$i#;ND8k>!m091X#0Swrt=n- zw?=0uQHN=Zo1mjS|}+s0%NlrM56LoIZ zZ$chs)T){&X`UN_5>y>aXzIu-4FaW%>5mY zYgl)s@d2L}C8p&M-)OoP+P!?~UVAfP)lP2POU*kr z&Y(J)HZr&5rBtwm;kViZ@B;Ubc(dRzN$n=TbZ4IJ$gG+AwmTmGNi98IYvHw#zrM2a z^KsszG!n}%7Fbvk92vbl{k8ntT0`VFk_bse96G2JthGgtv@ir}G6NVrR`KkFyD};; zGjK7u)Zbb}-yP~g8SF$?5R<4}0-^eWzNR8z#zJ1`Q`F&xMc*0`MwB2O-;~`ABAEVk z6{X;^O0sreW(U?FcIi2O^0JqrB z6j|N17XXF2aXl?6nnXdK2=o|6zMy4vv0#C0AO6d?x_Mz>@$!8=@d)$Ls<>_eUncdEGu4lYVO@x=P}+zS=?@_jrky5eu4sKj+K~I?#UT`c zD6|XpC51DSErg>ks1F?(qK>i%0?dd-Sptrwxd?Xo{{Y@VA-||8^L@&SP0=Nin8N2E z^-mfCqhH-s82Dy|5D*O}Wh_Cr&}{5z$MZeBRDP90?-R0YViMxPA!{4LLQs@Al(aXD zamWNv0%U=;jr5P-G6d6hp1%|1PG;kU)Fg9=C24qC;WxLCb$vpO_4sv-sE#&DX%|s2 zF7DsbkPwy=5LO^VF|0^A+IR8N-3&}Sg!yIVjNW(D(wqMN%+14Y@GU}0`P!g~>8`8U z^1}N+*G2FwiT3pXWuvH%I@W2$c@n5+5?B`ibT+ByI-By(4c^Gxhh_N-hnk*Fv+nUH z(?5GB_W6E*n-~9l7j|3o$~&Kcw5+Ol6CxlT~vP6d)Z@AhazRl z%gaAfTU-0FJ-xfU>ypT4yR_DLy}h`}lp#*S4#Ke!P6!@ytLV0WeJ4`4VAtWvHrrxqm-`h5#EQX9kz_QSGkn)tvAzUx;{So~cRzr?; zT@30=^IC+~LB^Gb$a%PZU1--OSJH=V+qW^{n0>IEvio^mex}bB)Q+Brl#*mRmuh)+ z-LKM8{4^f2_{7PF@YK`KvwY(=^091oUDLJ|TI+*#wnNi2(8I@HjOc3BI*mDS#zec z;<*+5e!f6hD;ix7i^BQCkcf^0u{c5sLl(F`r0jD!C(hlZGY0`}f+ZARTdcdn+kO4tAMnj$Q2s;kC zBe!JIq{;ilu?t%sC^6X;!Zwsg5h2HnU!~BlhfZZ7l`pnf?3@G{?8cCcI^dYhe67sb zDcn<(@1s&FbSi=0(Lpwy!3xFEmV@?(k>v-eg8ltn(g^{9DMB%XG{>yfP$t^2Af00M zismDxPMvzhZuZD-K`F)h_3KZ?1ik&J-}_qTeEfhtxvzHwFa7Z)67BNgOZ1?`9LcoaV-_r+yCJmv){PjWYB08|%J*z`k#{*!%kvXPn#KxO#&-s1*1+fTx4M z|4sM`Fuw4mqD=CmE2@TEu+&FpXO9^$DNaBBMipmWGN97l`M__07xzqa-xT5)4jv47 zR{Hj<0?0Ga^Cpg=QIjRp3LJhfhGvgqQq^|OjjRmT?S3l_9U)~#FoF?`;C~6+oaU*& zBYdZRRNF+K*p~z}QpU~vc zcz{Av2zwk1#SlUe5t1;1u#gn(bG4aoD{Wj|0<%y@X)GbAP=dGyQBb@TAnhOkE<~g| zxngJnGGiE@nBfn)sCr3DMZ>rnsIMR^1!&6zZiUKGlmu_3%J5R-U>zuA3TYOlWKl6V zA7cC!t55}mjIclpbT&s$N|JVtJen*feN1&K^FIizg^*YXEGY>gjoQVsaHNGT1h%xm zvJjTU64C_TT3`uT^o=piQ0PFxq_QcpZkjYceJBLrYt80tifM@?`7zZ8`JTtdEgiV7 zK)DKujBZ}lKBHSH91Y=U1Y5`Pw5DlWhiGf>2?4aUwL>tra=8?1a$R&KQ;e^!WZ$uk z+^scH$71T7y%@WwjOM-^4dcg=e{CresPxqD5~Py?PArSZx5VO+E)V8bhND=aC@!FL zIcgeeejl>zuVm9{>Ss@Y1uv1$<><)wJdo*2o#$&!I+IH8*w*r_()z@Z7a~$#4MH$! z_C${R!f~{$YeBX37RQpKA!H;JAPSZV+7L523sDv`iZH*FT$F~a3p+^1K}RB}NZ2UO zEDLE#Lyi6K6<%)=)s`sw3!(c{uk4VGoH!bt z=!3T2H@ppMz!zb2eKyAD$6_%oKX8-M;A@3nAl3^1=_gNgFs^mZN9S_*h4ETic3V^2 zUh%uuCUpwqMJ$y0Uc5%Mx#wu538`Rvp2C)4ynuw!={~%4-_QqER)JGrhX^_7Xb9>n zAQnbgmLVfkIYe78I_IJD9y*gpxIQ{xD1$waJj&&=P!=0wi-@X04Rm?ee zKl(Z^rhCh8`np)TZH@o0#);O)%d6kL-`{*@cbUTxjG%}K7zI!fS6oyf0SWB#EL7QRsAIs~SC^R~4%N#r z<*l9p_Gk|32u3i1e;;h#>harK`#Ad}F%H~s;M!8t0t}_qRohg?!t$jSR&fJ#6w&cWF^&GQzEfGhuvbm2x zJim=pZr7>WqbkCD{^*H}t%}f{cDec4t*mQH?Q)&B3LykDXU=5KoH@kfaaOHb#k0>o zYpU=7qeqYC&_f5O>Tlh;m6u=M`6Zf3K#F3SxBiY%ko4tqZ1?l5Q#snThjwhD@i^gd zn22Sg9h;;yUNBlKlj?tWuQ<1WFY*@Ri9KHOgBlH5+(-pcSqV=!lJqhsc(0tEgU)#!sf;ZJ{lS-Zj!e zDUT!`87V+0!br-s#6~l~$3_U0R-}bV6VX~@YfZ#g6hk{LzK(8 z^yKp-`?|=WanbbaxeAIAqgJtn@mPu@u>eO18hwGS0pAVABIZUaEsz!&VIDRu1Z4qv z(Wg9w5R_XEyde5dY(bf04IOMK4O_h|bG)NS#O1_Q+cz<;CqvXz#Wbp-S4?0~T=0_; z0~BrMpD(~g)2)5nB3UJf$s0|eR%p+>6t;%xznxK5R>lb@oIrVbIoq~vWAWm}q|&KU=cBJ29x^->cZeZ!l3#={mT%&2EtW1Oa*EDyfkN;3N<>{lA6 zhp8TW5#3vE26Ag&axcC2y7a*p{vba2%^cU-B_7M38E7`V-!Tr;=Df4-(Gy9_R8yJnr~?-GF&F-qy$7QygZ`a@exUh)fF=Or~&Z+x0aNWmd@xW`XZ0pK!{=BhVI)4&}Uh^!8VIEGWH55YGu-pQ^X-eC zUB3LpWA@*1@r5UU$jiBvUd|<#$+Pk0_5ADZCwZ;ChXbuB(IGrtJgsR~E-sp}(xJn$ zs8`VJSR{q{VIJpuM0D`7MHDJ1l@cd!)~m6gbO^@12n=CI z55_c_tq!Ei%1~n((I~`@Hsa|Vd)YDYZOEoTScq7hmP~?#1>X2k=uvg3woaTaO;r0f zqg)e2qg)b}A+UU{S?Z_B2&k#7WOO7(G!h|dS%js9l%i-4;(I=6-zAyN(vs+5b0)$D;MJy9yykxY%)c*LQT+VkrcE(| zvvb#TFBQ+y^INwH2{uBoXw##=0GC#3CWGN^#Xa3s72vr}^RS|0q;g=Bi)+ z1?3xdWKna=hefjq_y76giiUzo?usp2SSAEW$%b^6@Beeb2UKu=|Fq;KIx`tu*X3_7 zEuWX@HIH0Nw>ORI$z@07g<#E#tI5}z`)kwI4pu$7hOVw|#)uL_=0f@P0lr5TL}G@N z$>aiGpn%8=N5Qe^$meO&dDf^bNo@!xGau9u(CHncP`7gigISv*MiohGg&%P zDPC*cLcTZ20Tp!|GGjJQz5z0Ml$*s5NSToH#_2DUCQago8*ZSvxtWa{H*(~WM`GJH zPdxF&8?L*%ICt(?E;xKV&#ddBChl<9+;W=vmAJQ|GjDI0q-o4@!%sFF8E?6QzzTZ+}pvj z1V8>of~rc%3y+UNN_gO(8LqiL!STmL=uIe|U!3Q-qr=?$hk9%quDGg)^Usd6_f&H~ zS+>&U)U(>CtF<_AKZmyV92b4LiywclYQQty2;Ng137l6t;hHO|2sy(K*RoQj%n<2I z1?)dF#AnYgjR8mPaNY#b3V`xdXurJ;Nwb64ERP! z1a0^>Fb6}l{1Ou@w*W_AQmmRVM9d~ky3#!0`z70H!WcWBNk7SS0fzkf;cm2JNW9sr zd>%%^^FiL49$o^+27f=obj0=SUPtaO8i5;u2Qj%`4ZvLB3g8!ea6fN^1`G@LUL%C5 zJO95mf8jLXiL!PWTK1{6oqXdyQ#|0L#q~V$pY!HYchi#zzzJu8Nszo+rkQ%`aK{rBU#=8fGw_uRvM_ua?z>C;)gdNnIn ztl-Kk`<1wR@4Yw29d{fLJ@n9^Z3#?K?7}GYT#wDTG~qLK{z05}`9}#?Mf&%>Xa%3W z>{s;krs{oP9lK)vc7MU*mGb^SUx^hMnAT4p#l9!a=8<1M$hrl~n59D4LQvx?x-Cgc z`E0O!%Eyf&8jI7@*@M%SBqtzk+a&5DNL!-1J*tu^>O3Dw;jO7eq3Dy64%W6DuvLEiEG(Khd_r9G#0cvh>f7&^dLSH-6sC7dHHD!4W#I#Ml{o>({&6$kkV7K7ZM%2|voHbY~xH zuYZuPWt)gw78Su6$q7SRt+y33KX3>KoNxfu6Y2@aqgWy1>GPZ09#ucT;la&i@o3}8 zCmb06)|Wm?Jmlcze9~P>nqFSblD|Dic1MzWB%@rPu=Y?u-m%C6w$_BSpwWkv6!Zy= zt&KV(Q$l`awIU@1o)FklQdd`tZ9C*WmwYado6qC<9!hD15NM@PT2o$8PA-!rlN)?r z>Pn{2T2o(X?sclzzk*V)W#wyZOCqHt?|Fs#?O0L@DJ9YtWQ9>nM3hOX@qJ$uWG-8G zG+{|W*l|cEl0sS*QO9OOCM^UIi^X`ds|VT9O@-sIW7SsfTeSsSE3_z3CINOX)gBHT zkEL|Zq_(NNA?+ejL^wo8K1WByqGIM=96xgm@v)VJYAVpe;k9);*s!gmvpyPq;iRMY zn_z|HY|qUJFP9X-z@(B~KXjjiZByS~1Wt z7_CtO5mP$d_Z2y<@PloJgv6Gjc-StQkSMwpy=iEzY4UQ^9JEiqYWk!_3E$dUmPt%Y zEnYFVt*ytNc=)~?aroX{D(f#+O?{)gpIy4YmCa*25&U!#$A_sWosf^soV+bByzO1< zH|^WH;H8>zzB2wk1B|(aF|7{A*woj_;#`7?$)ou28S@#l|0JT-QI@aW%K4Z5lDzBD zm&y_eJGqAXD(}(1d?#8FjY!}1$)&QiuHC`2_dm_kE0;2_Y!qSP7>}nnfvc~+ngt6M zaP76%4oKhH(^$GK!N+ehWcz;ODp>mMqxr-0+xge(4*uuEGx+Hf8~N@7YY+k+yksty zpEQL_?_54;JD$=U_=Bg5FB61-r@nePm!C9+FW&Jc3O`kjv8dboEIKy*1W0Un&A;-l zYtkoN`pdEzZ|1nB>~C?&&&%F;!99TW8$Hgxu!HNauIA$Z=-;RB!!K@34p?@|UN-mK zYF?;q-0ZQ>q0QX)V49DAWMDd5HmCW}Iql3pGQw@YsV(rC{Qcn!XP)2AzOx+W9~of; z?f5_m zZ5r@7;CmRp;Y{FeOqx{&^Md;~z$Y;A-uHojUG~EXH)~Jc zxxawv)WYYh8BEHI#+dS~W1#U5Kpn>Ps2$i|GF@PT>|P9uHx*;@sey7}60rJBv~w>E zBe;%%hCyR6%-vQ@zFPrSu%8|b0aX*MyF0H<>oKh2S_T^tSi!L*=t ze`&Y~=3?3!%-

    {%T>ca%s3@DaQ~k8km78Jy$SLiUEfJuVK_sS-{08XLfFLVcjI= zoENrHj_LP;N<{|qdxCw&F=NBUNYdKqKOcqTU(4X}Q|OCb6m*4P`-MKO4)#-EkR_(S zQW(Y8zcn6PkU=T<@)s+(`~Ea{{xv<|0bnScacY#)Pl<8kZGD_{e1tpyn!<75YnN3F zTK1SDhU6ar$YeEl{WZ-)ch@svoW-qw?i)bLJhmXqIcN5#G#z(zgnVA}!b>@hJ9^JO zI9P9j2G<(?d2^N%FNnNh8db**rC(p@K1g9)*G;{WgFiWYclNWg$qcuK^3b3+h^f4X z>uZL4$2Yn%%;8h2x$qB5Ici!B5!>SVjotL+-nojKt*xyCzIS$Z;`=_4$k6BM^wUpg z@#4j_vDb>sj-CYN{l;#Yo4XIKA2YF{dAEq-O4`_t?1 zcE0joXJOekLI~n@)qLQKr*ThH2b)(kF-wN2_k8kFvQE299XEEvoKsKuvQ=Kum(C`B zzTpoK?VHPcj6ds0=AE(+wq=uA(aDyhG{1qL1=sfx%;0- ztzKCoJCF=(8cg8fq6J7BEd(ka#;%ACO!pCi9|#0el)^1ogRs#^`Xr2>HLE$->)&_h zPj0?6I=(?1Hh%(Md7P{zca$A7^CR^#xpCWLE6e@L_>vACpHWdBeWp8?a38()fin(1 zVXoVF>^^eEYiq5rbg1w=(2AV2=+YkJk3N9YzV;EEShyHSE2TO4%&S z^2!RLWpSis2LuCVr^1{kQ`E~R(b-M9FG<6g(O98Sk&F<+R16z*KhYYgHBu?$rp=Je z4g5h9l;@G_Nzr}X11x!VIs52f{0Hrp2*Q|@ArFlg zc)M5#8kHn&+lX)|@Lusz`5Z~drb32{3AZKjl%~ngV~0$+=u9q+Ed&uvN)JjQl`<8& z-Xc6S*^t8lA3n_L&`eH0zpir9$@_M8jjd5jo_(F!pF4`J8{4Cvtx_}3KIGK(?JbMM zORFa}DpRFQ#v(YQ>#Pm!tusi zG`F@g)`?+9E0Cc$D*wg`$f;AOGIi=yF249;>gwvq=kxUT4)sX5XYu;>1YPMod)37l zTNUBZ$<=)7)}?^Cjotpjc7A^LK0}f+zS0BKom#`%wmzz2Z$Y7Q$oVtq+Vn%()?Nbi zt$W40W6MhayAx;a{u4l^PqXY9m#PNI*r}E&Z1xV}hFg-%n&Aw39;NWODfC11UIfbZ?sFoeeXUF>QJ{nem;jNu8U151G~1=Ai4 z=6?>OT$#)8M#2XH*I;6^k6~Vhzl3?Pd76Gw<{04Xm^k>m!Meu)i!sK&rFZ~C4o$?U zWNzne@))~wgE$fR6DFX4C(wYY{r+L#Q@k^tGrbHXld3Q&RC6&wOawR^D3quB872j) z1(J%>7)^Io&)30Sg8yYYJt_OGolhf9V3G8pe zIAa4GfEi4`5B3?x1nkGLYdP5Wfe!`C_W~yah3Mv(pg+1Xgv3%zYFcveW;hJ^3nnG% z6bvD8Y|y^%0-G^p)-9NU4MvsxQ{Xef@{O22{xOCWxjkq@JBDdI7h|*phW%WINl(gP zNUZaKzhlgnK8ragj{|?eTsRNWKVJ6_zV~779Dm2$5DMer5#YD<%g;t*NVq75e=3#01DwmmiI|EXWb_e%8n5M2) za>Tqa%qSo34j)a)~6bpH>FZ9`*&MN`YJy;J}ey_mn8eiN}GQax&D z>-ycqn#C?Hn|+S^#PDQO0k?f8m0kOaHy`suW>Gz12IUQJ_!t)tTYUYbDfFaW*0c_O z*#7)c6Y-ShkrhJ^yUBHNJf*qy(+7}oeJm-MF{+F+Z&GYJ^ z+TjaWoPGA$?AWn`l`B^cnimR%IOUX6xaOK`hFtfKrOT=w$mI!1iPT21kVBE{vAOrk z-(oo>x$)^7Z5@LHi+tX5?tN%U?y@g@Fl?3eKfsnZ)Nslrr*rpLZzY5#Am zdVC|ZKl{P1=po~r)eAS2clWh1T1Xrr0o8AuJ1h#Ns~zKY<9SVykTu36B$a3awC+#$ zkcA2~CXLBQ;5#->B-)YMkj+;_$~b23p=+G-e6?qb2B$1sYemJ)<4&7bo>6g~?(*(& z6XNo&WNPuM1+VYF^3}D-yq`GnyyKldttvWDOck~<^3~82bvWXK2NQ}9d}zPt{%2XW zW*ezYf2ODB`J%18mn*+}J2(FF64PAEV%$N~Ir_|_c=&h!V2lV+8L(E8pcHZOI8Ev1 zF|J9|Qd$t#f?i>~Lb6(u4-^?yH8uT8i=ec&lmpd%AYy`6jO|XPBQ;w2prS*I+r&dFMi&5wM65ls*=*I%caQF#5wfzgNfG~MPn}S za@MDROjAqo5l;d&?H!4#3orhuzV#=cqGsGAq?E`|2)iM~KBpbRl9yJ}<7qv1=A_M| zPCsA*K32ZDkLE{TCezkM)r=`jKK?MAiZW7bx3c~5XOW3Cu^=ri?|F2_!c02m5G}TL z(YJE7Ksao{XYyG`)A*qS5t7W-n-=6ZJoRd&Rtg~?pLW;VT2JjNF+`Ads8p`8nM_X&2dwt?lk3KV@W_Cp)QduuLCe)#8V}v$_!cIlFuI`9!Ege5dJTH_x zDdq~wY#Z&lZ2!wYtS7TQ)iaMfeCov5{ttVuYpNtkfff?GtPYKb%BIksOD2<|NBf*~ z-qFMt%?OEx$7-k_9b(Tl6N@~Ybmv0ZX3o83GM+nN~_iXt6z-jthTP1J#S zbkMd6m@r`iJv}{Kef8B$n>LMbILx|r>-gq3zez_&$FS=GWV6`|G0#x_a5LkFUV0#o znpQ(?JjC**Bx3_YeM`xUhAo|G8p=b2Y)Rf5j<_}$Qx)Ni{YP=ppWlQ^rhsTAG|oJa zwzV4Q+qBG+fBJs9^ILb851(JX6E?i&amzPTv~O2bHwwOXO9c~W?H)6ePUs^r0q6ka z^Nbm4`6aLBnX~_!ugLV;@;sZic|AU4<(nco$HC ziDQfS>^WuZGi}$(mqb!=@ag?8xDJ{fV#x!ecDc@FpDyF3JNsC(v3UOpW5(yMs%ma5 z`K&N;cTMnp3MNi1pa&CsPGfjdCXb16^O#ular(sx3o-FzImRb(N0+FluGnB_3z)F|WUg{YlkQ#sx)GP?ObP3H!e_SGI6 zpUSfOA6atAVQ++|Vbl&MV@!eHF202c#H%r+L8-UP_b>x;B1VPq4d6};DU!ty24BHE zi9~>ZVd|^@zGNE{F@8E8Mlo?Sh9r3$BhPw;Ap(p5aZJ#DD{xh?p9cEPg1$h13QiqH ziE}UgL{9~VP?;RGZ*kDRU+{X*5>?-yCLJjTl8s z!FBpb47qS1hLoxTUI3oOkRV^dkSfzLY88p;GlG4L#|-=ga2e)YOrxI^Itnw`J24l| zwZV3;4UT^nh7=)Kt`xt=kTu`NJWJiZi#{3-Cu2yNf+@hCF$$RDG3WnG48b-%IJQ4w z#?~uGD9LQ$hnDn+JX@)9)CwSwWqg~*!+jAUpQi!UCVQ;?xY+m83<)Eh@`nSmFLtD5M-V_)>^`C>k3OF$*E6o-mr}2OdCO(k1GF z-`z{JbrY6!oCp89;IDoW+(!JOtJPrN#SkSW0PeE#~- z3q1bx>jRspHC{T;FO=HFyS#pkvqRibKaK_^!GZ*e910JKEx?NI#+zN+X557FIH7?- zPAncnS{7?xUQSg-ITOa3dtr5B14=0x!(lAPVf47M*nzsGfLta+$Bt$u&YaF0%I4lC z{7{GtW-Ju$ei}eJSQXWXo}mBzz~e|rUYC-EJsoJzq=>E4c|tPF(mNi<4!oM0n!D)g z9vp~it>vNZ?WFmHhagbOJftXNheFjqfGwP@zi{1pH+#QUoGogw{C*% zdsNOEPwlC5Xj!c?A5xuh9_QM(sTuyN-1GT4Jhrl(zrM07;rK3a@Fy$T_VOk47@__0MR}Gka5>=E zH-0Smz^5a8__8R{GS!r>`&^RizmVi-&+OiN9yg~C#=Q6)fZ?*pQfW<1b^ln&i~2>nmKQ9B5LRTUvcCy0Dy6KQNe}OQjUmRYO0!R9DGBVKIXD5Z}PW zasbp+Nv{6t+j@^UEF4>K-M6av;AaNB-1{i-0Zhz16m~U062Q)K`AUY)&?sOTJCRT& zSctJxITOP}6tY&H!NjhIGSE+^6t`hs$Ulc6lHM^=<{C_(JqSX=?2pDc`l}U;pEo?a z8m)%P@fMTk!@P^iaMPMs|D59KYZG*=8&cjr2@}YljOm!SgC0y!uQ5c+0hnMJ;0%oX zsX&5UhY5}k#01dWF{+ZiF{FsVC>KgenV-?0X7d4z0;Djwc3=YP;T)I`!w@syqyM?5 ztz>>HhGf_aGw{;E{tKjxkI4fhIJPHuv9AKI4gM<(0q|Jx{WOgFqLY3Z+jGJGha+WN z%<&iSNsRofhJGgVd5p^H?-H72d?Q2P7xHVOeJJpBLJ zJMTCvx|_DW-8wVp{Qfxi?%umCn-GeA^SoYL?#$eoGyQy?^Z7gvrVP!=w4*;% zU|vioXFmHFYqZbq@op&c)1I(f7#a)>d;a9(}iKVDYG` z)mB>^kyfNOwD86YOZoK3!S6LWpri~&Es94?8zV-Qm-$mikFB$Ufl>#mq8Tw{VOgMk zl<(uYJ^KiOK;K;!%aV*5QJFVQD^0q#89$lA?hKl{?N{dGx@3|V8d+R`qhW|rSYC>> zAHxT1+a53>5-#kS0ceLptX;Jp-}l*PLcSSGHai69H5(>cTuiih&x(%s2`Oo@tbDl= zX+t1{2uIM3ne(DNupNj*Sru#L&gO2}bR98Xx@%zm3YH~Vzr2wN2j$;G(vtW>P$P-W zF0Y8Le(v4E#c#i*_b(g$P%`NS+fn-jtE2ALH*3X+1B*m@`;PM?;pp?ia>l06goUK4 zyb^14DX!KpN%Y{P6eE;U44W{4SW6;Rw|bi%e$a?H$+~1+y0Y}^t7Q~vh0hID@v83)MYgpyA zV}=f&*}S~z|1Dg-wrFHHNV2y5F;(TW^oeDm{ZF5Mq9f!wp}{JQ5C|2qsbM=sGbXF4 zmmj&fwPx#^Yu{S^>rmP!TwpSkgl*v`+K_EUIF%*XMNw>9Q&L-lwDW`iX_H41i3CZd zdv==&qCp=0(-oAC?8>YGSoyDasr}0fjEj~~5E+CJ0+o*Q7cbV?A?giHO(v^m?%cTm zB$G*=eDX=Y{N*q2^jZi8gO_-om(QXH3+7__@IA1kwvBH*unf=FY-osg3exXrOJPev zVaV zk4&FkJbh=6kz5PyKv;10cO!h~$QI&lnn=;kpFssB;;x1*J%dQwW`BC=lMJc0*j&@~ zybT5g>lT}&n#%FDcwX0iId+uIJ%2VDF(ZfDeG)I#RTj_vJK5{Jnp%&+RUcwK)?Vxk z3L3-qm{d`Iw}F zY&F60nAq#BU0hEVSzVc{$d9vL!5pXF^klMl3!`cJULW&!34Qf&en20D%!osRoOxR* z)zfx;5ZH+bW?ojnftM8U#%&!u_oEh)tvx#J<(P7hS@d6Twln;ZE^U;XGygw!!GvGL&k}!G9V3Nh(dt1^E#V*>l! zLcbXKPCW^XR!o1$ZQnLb*;D~0+ozbG=es{rtf|}fhhYSmy00Uv{5gbtU7lQ2lYcA~ zhM>yLhsza$PGGW80_>cWDaS+?xg~M^=g#(y-1b#tVv_T_ZU31}yQ(lZckYF~t3xf- zn0?NDdTqlHUP1D;hyEk*w>dGsbU~D(4(}Rio-)bd);l}+7FG#wY09^W!KloNxF(bk*@baNyH(Z_Hq3WZzSx{Ll5P;>#pO6 zKl~vJ7xwCQ&qfG^te^GFmZU2$>9l(3`f5kQqlM(_XtMGC4a-BQloRqEigG zuj5vr16;@9lyUzvZpZ%A%WMgvObMKuNNxMXv5|r#{qiNGtYVLmRkWu5yfA(f$ zd(mKJ9XlvoaK|whf3|kWs48dW>+g*(mo|fy*?JasV~kDjt)X&sbzTO-=_en|v;SH| zM?C)#Xj_tV&p4Fd|E4SG^F5E+XBX3W%RC0jAi@cuLqUXNqb-S$5-B9Yl4v0~^R*Z8 zwZtSP+qRUDj-_r63w%)bL)b2tE-ILXr{!m9csTjA^oC z2mrEVnXn-gF~>7=um7T?iYdV$OGwc&q?og=I-h8zd3LW|zl}@3@kiR)dpg;;o-Za& z9E{aXawA#Wf=Z+*3m52yw$`Q96Ng+mqx`^QL{!ev@$_FMAYsmwWA}4~4c(VDz6rbsy8f9dQ4<&+r{M5r)l5J1EBwgfl<#@IGC zJ^~Bv1c>O~gY7IfZ{7@Kh|COZ+s5;D9(!4qwVnLZ1rS!BeV*2Y$D&O=2go-zCP=tG zGe#8i@@g}tH)BLGE4O#_nK2TuC37!75GmlaTi@QbL51Eh^|T6V7JY*)@0|j$ZJqwX z!Y5Myn00z^ml)PqvqoAlP_1Rl5v_DThJa;J*~{Xba7>8ne$$rMhw6)LiAF`9O?F>6 z{-`iNy}p$<7p0kbK-cn~2M;|S=hPGXE`QsL4;}vxx-9CZjCc6PMFVrg3OItZPu{)q z*qg2@VcvoyZWqZn1ylNS>n^V9rGWdfBrQ1Vs$!1$Y4Lyrr<4zi?~T#8&ST^u0VbZ@bpuKZ4!NR$i6@2l z`#BBNzTIOKvjRh)%%p#vl!2lVLn35*LbaGIl-Dz#qnPrc8VtE`3?@S*dlIsGBDu(Y ztk+`7nQ}3zpZ09bY$t@tg2=_;n4teNIn(w;$;t>It8O+LQzp=X$?|9>-$s0A=>AIE zh#^w?YUc(FGus=o=OT*$ru?g>_r-S!n=$0bB)SNq$=#NTV=`N^7`l^nW*wfcqxbT( z2u7DCHo5IQxwJ7s)@LOK|6X9UL($$k#3{E__^z?LbkpV*TK%?1tVJ_!hE24%>k@cjPKqPX4({|>`{*CyOSY`` zO$K1FXgnhiJ_399#q*{QE8^KJ59X<*bvTyb>;nb^uzYI=?{72Jgs*&e7Jpf=nR{NZ zr6c8W`}|E@d-^0cG`xc)1y`Rsf&1Uu+Gof2gJQ~*DO`X3^~{|+mzI_m_St720Jd)3 znkOcC(n%+=YSk*%t?Nf?+qfztv__{*z)&J2L$G+~vDXNMf*gAOQ8-1WoaD$ur|`-% z*Ynsv-=KDD14qo7ERH>LKcwAN+N4~cmCr2YiQ68dq`8AinVyswg^Qcj2KaUO=Lp#?INiUJ^6yq{`396JSNEOwyOnaVM)$T3det7%)wNnaw)n!#IEJM6x9dSC5W3Sz9s5T?vixS4cWgsZA9ky?) zw-*0(?(vilIy8xrY_AVT5k$8)ftzBOtEqkUjUsPx_=Mphhk)%&U47jn*T|x%Se{5k zYMYt^Rl=rN`=C=G8Y=(B5HQouQyZ zRb>gkyyn8Z_HA3dhDUFIieVio21&c~WUCwv5TTS&(GieNrSQ?LTeSi(qPa=!fR=)8=Ih{CCW{H3DQyF62N878Y1gPf0%exP=x7wz zw^-T|ry$`mGLyYDYD6Um?mw0V3s;cN$$|=p0-XQpsSKGmBD0N5JCtVg>+j>n6YNtt z#4fKMWRLm6*n0-A7*X8v>XyGYELu`sgv2Qd2O65*e=M1ZUsk3^ekCbYu~v%8NfS^> zkDB#sQK=Z^`%RYim=WupvJy77Hc=f^YJ@cr87aVljjN4_!pfBnT+n^Ux#u0+zjx-(b z))W>sv@t26(ISE@C_*PkV6uR2yoY(cvPJFKwiLM;*%ZXj-;r zLU2OC)0VVkRop5}r3E?=#Y?tfg^N0g86E2&*r6#?n(adJ{NG=seCkNbMpe5?@SxPp zpL55zXa3~cIbV44*|!}b(3U0n_GQP(^Upd|1Pk)ByPCIdrS+|Klsf^W)~Iv>VP{3> z`+vA^*sy_R%a(D;C71BaU;dK9!a~kD=N#tG-{q3l-9|^s%f%|SN=b#w@8X6Vf`cX5jZJO_2 z*?%_gUVLacg8cZBiZY8I-?%4Dko(4vDvM29^2phrVJb`7a;E)`p0X*Q#>ARnk|hqr zR8$mV?6UhaRk>yWP5U2A)kbdG_43Six)0{xhtVqS4a+j$*{wULJ1H{?!}#Rg`F2on z{{3Z4`OLuBF|FagGwXT(i7sO4xN8idlZ(>PHkU7`;(^aMvTSaT(UW~JWgiy|Xrnzb z5+kx2!sw8=7`6+{0sRq%5v#+nhHEg|EoGSfpMnXx55ttZJkig#p20AE=V5d~_Q906 z^d&g-D(2$40h1c#WBk(J#}Fmu7;<0>Mk{8&oos&~xC*1RZDaIevME}R1J`4Y#|;<~ zV=yq4zH9xu<95tG&BX}wf;oO6OvcThfon0DN2@S|SC%BY52Ic5JZ68d#blc7OelFE zh+zbL|A^7QDZ(6wTr9z4z1)Q%!}_yn19KhSh7m5#ia|RVhV=o=HM0XFCj3jxvAm4_ z)AMRE#NV@-^{>jT=SGa(cL|0WzOSzpe3G&Fy)<9Fq%e<=0SE*H-~C1rD^|OlesY*Y z4-T?qS(+uw(g;a@fWw@f{4@Xp%sZcQ5- z8+(pc15_0Sd1FHhF%SMdMN+=thGa44+_kGbz` z;}=h@*;zAo8`Gvuqq(`6qmMqCqmMqibNcUo_d8yE@x{*1`|rO$4?n!K>M@fIAcTNm z08%ayr75>8#(SFicR$CA54}Xm;8MaRQLJbXI}{)iaF`qp(Y$OkkFMT=@HB2~9FW~E7jg%O-@Tv2tq>Q`##(1+b(?bs{6|dJU>2p-!Ux( z9jQT00MtM$zgn~HuM25gwT2OCEjB&z-0alrRjVB>?PN!6q`P(<1-V&C+6R>p{mmll zrj)e^62iFWs1&i)_g=vU;Nh;!LJSk+0 zYAkJ39%WiGQfs1~Ped6_837DZl2&0+zpaCN|91|Do_jdMr;a015W$WFx&60SF!#xY zJo4o0#1kowK4M=k{rs_{J5t2jlO)=c)V;Tc*Y5roPD7j`D}=8#T5HO*pv-fzG8se( zA=n(SGl7TBa1LDwtm%w~h@ZVib`zfG^Zu&!M8YA)jT(?<>Bk0Nn#>`e%w>dmz*xa3 z(heX(4bTB1Xd5Cko&RbR8U`srrKfrMFaP3*prCwgHGxQgJAe08zIXL~Jp008EK8z% z#U*DQ%9WR#OgLDA-{GQ^Polk@+SlJ_(erOHT-#JtmKTiw)VONM zzE8-qNNnghrewm1#jQ=-Ub9+6TU~40(BPl~hWyV_c$)=FZ>nL^afdPK{8_>(b&4md zlc@jWL&Uc4fLQW7Ep1J$g~JQC$CIgXc1t^>BZUOCZ1sHYr?es!PmhbW#RE-^trVv` zQd$w0N#T1cBtlM6C>+XYxAeR|Bm$XEAvbSB2n*r+DCHw92PFi}jSX_gyqb^{f{5iX z%n4z8E{T`kBBs)W>;R3gFAvu*TpHFuC=g;?Ni|x#XiFd?QMB?GM+38l@zZ3`47+E^ot*TZd@#$5(Uwax#oREYeNTq%EfI@ zvVCPO??3(qMO&IF3l(C8i;+$UtvtN=z=F3Q|Mmfm>~)tyW*hE zWfpI4<*eI2fSSUDW6D|g>MyCOn+>pWrF-SGcP8hZbZMy9tQCNjZ+OhPE>81yMMVnOs+3tX4M9~>EEzhuZ_<9~ zV2k3M@~Zo8E90lXY~{qW>PV$DskG+AW5T@pY!y{I_aWGe4+lMTRbF~M$xE;ACh_>e zQH69g{_@kM9f!-AS3-=~kvA zZMa}=Ig?Hqc&gdP`KdfY24LPbt<3sHA>l#!3eC{9RJn;Dj-up+7K;iQkJ&(r+ zym1rMuE#KMV6qyPW5jy0%2hXDh>sPRKzuPq;K#?1H2(|C!}LWKVe~w*+DE zVFczTT!zucsm`p!&P+RL5_+;%~!kK-0Ak)5cF>Y2@VX}2@!(4xT;aZI5&fA!C^Oejx z{)RcXK1QJUr+uy9lZ;C)=-XlGhu`WNExG&FomJp<;llHxTzKBjJ1G;#JN)a>-upgB z%nEYEtS(Ki&z%+Jb7y^c9Up*5k>D4P_n*03R3>-2jPJoSe@(r$eWUjh0L4R(Vf-4SafK?+iTWN-68eVA;MXid&%BKAeI|DFkC>keY2Vp8Wk&go-1CA|dQh z02y>35a6iFa1>SEk|!Wi@x&m6`WZji| zLDp(n!EOuedcM!PjWwjwX=d!ZPY<`IPa1qFO(&qVgs2^Y)>ay|$B1|vRv_4U*=sLz zj=Lk}Ql@;WZJTxLYMFD*94dyFQ!%8R!qPAo9WaWE51Bw~Dn(UA0oqfnS@15&q)RI4 z(z3mkhMEQ%H`P;`^cfwDGPJZx_*?Xl*jrmDtZ%2PxQvw0)Hs^uFTYGtg@`GsZQB7 zHCu7Q5va7#*fH(!VEl{x;mZ%`Dn@wFzF%2y1y?A|UJh=z_dW3L)$jJGQgu-|76pkwQKG;e*Nxt661 z9!^yh9g-FW5+U=9m{*Xw&t|= z&lpXT?)$U?Q?lh`=J!`J_7)~(tUI0ureO#Qx@|*aj_GgcsgUhr2%7Kp(YEuteXb|} z_;(jrT|)jtCqcgR)|GUXGG*6yC`Ml=yWe-_%>O1mk;t_7dl(Y4jeHH6#h7fV+-u>+ zUe=SvB8)>=E;eSSg)nj8p6}7@#eXcGzdN~g-O}{8IwzD2yPC0we?&^4|3%O`Bg2w; zFDXD;gs`a88c!;QT7jL`H1@jc+<$WVp&=v@-`Gvt8iKwL(xSwNY1(FtuL)yOt{|v0 zsu}4nJ8CQk;u(h|EizA@tjMn`L;S+;3V>=31I|Z zvjJBkl@S+qO~#J)O?#wm$QsM(+J+Ej*=)OnDX-EBqLw6uVw4Op7)4`?OT0OWn;}TD zt;s?Hp^V*G7)hB761Jo%O9Q0VNCfq^q~4a4c|HY7p%M7~kS(1ATsGJqAhg!Jzj{3@ z*Q__T5%k5Kn0quO$o7l z!J4q63GeR(85@WqhDJ%fxB`@7RJeq;H{WNu;}%4V!AC?+fx%rvpm!xb@7FxC}42+zRUfXe@Qt7h;(w2|e~j zYmHW!`&22k?}MM6rV$#XQUtUqpF|6UR%p*h`ySf&u{?#;3dhgfCrYDy7i`;c7b+fv(ES|){HgcG9L4$$m-)Yc_w@!Lpgjf*Coa~}cN2pj~3LNd~F808dF79E7N zY`jDp!b_u-Z%CkBL`TQRZ++aB{Fu8>gZC|4cY zp8n?bhk+0>x#){*8Yl_1D^T>mPcAzb&)pezcFg*+EZbSzb{A)2vXWL{1c}e3cm15* z?K$+9%e$-BLT~ukata5E+U@?9dmo7P=coB!ji%<_g`7R@Z@&MRv44jma*yi()z_$1 z9Zj8?TGb?4761OtGkbbFA1PXU*TYUE5*r&E8(-Mdn+r%;9IPlYI%7(slWCLTp%qAr zLM^CPuvMx&U!&~*JB!gRttnNSW=rNNx(Ah?AvAKvM3jqkCDp#dLtzUL(lJ|7X|ud^ z49Sw~o+1QT8O<8yfzAm&gw-Y5+c`fI+-U_$7`N-(M(6HmF0^lm7G%aEJKMp|=+tPs zrs*7g8?)hzwoP{iDASHkK3jkWN4u0@(IUYYf)Ex%g+-qXKraYrO|j<_(3*r41Ty;+ zlY*oW)Y}#fSO_wuN%Vd`J#-EmK5$m%-DRs-vwjnv-*p^(rC7dlEz_s$%qa2WMONNd zw0DqdH?QQNf`FAF(Y)UL3A#aA6kt)UAS@+Aq(cgGJhjMNVmfo&wZ;N$tr0?+Y!NWo zCR)(2W(~3R8wpu9mTe=YB&tj~nHCTgFhoL3YHEZFI`Hg z;4qRMFDDXgdG96nv9|iyk$ZYG%F{wAdOa^f;N5+HtnS~hq&{dr{}YLpHnn%~a_2Y) zGuXX*YQ1|N8yL7$#(zDsy~5+^mVMzw1gHOT&~9by77w>L_r5Y7yP}zn9X?f49nQU{ z4B4LnH&D5c!|WdvG4Gllar^gyJJ?O(oW1xzjaM+)EESk6nw#if5Na=W5w@jUqlL0B zcdh?=SOMMM>vWq`rV?O}qhh$6STQ{Kbk~#(v8-#mm&V?)(Ytfqd%mghshDswMO9ZK zlUR{|29y&vpLIBwv^S7DaC*;Lc#OFa)@*b#KW0#m-Ydapp+<0 zBBRZbi=fJq5xFpAi9q6L-;gUBKy@vv(xwJSWJ-~;g1ntUtd&p7XrGLEb>}9`{Ome< zqVJ1Uc5O>oo$c);jnIZ160)nk!Wpn=aOb+UBA|Q%Na6zG*-{xGqBTKn2q0GoI;7}4 zJC-(k8BvNNr3h#IoCQ#j*11 z-Nu?cLIyx7#hMM9*=NES0?w|xSAJCJEt{oEWeWXVlkKr{2qaLXp~x5DIGIwO++&!N zCDr*i`zON=W=X=d0#YE129ko#(x8BplnOzq5MW6li2|a&0^dh#O+Xu>F1O`=wxq~0 zL{CU-3YEvE`gYtzI&Gzul4v?oDH3&c4kpXD6D3IYwZaHnQyvIYq>X^K$nuOr8x8i*&+UK-)p_+Hl| z)j^nY%3j&W6m~F*v~0BUabqrivK=f3J5-DpZ^~PIW*|h-_^LI3eR|l;_fqM zURuDQkvm~g`oYvQBTPLrLb^i}C>S`ibNF`(dG+`0B%1R&tz$8+M6dMzt-aWbKG8sa zInrM2VN_Sxlg~UQ{Kb#E9Um7Kyp~vmDc{S3@U8LZ{vdkH*y+3f9Nir}a6@dvYft#u zXQfR+`L!JL{rx}EM(hq2-m#u-J^SO4NMygVva+*!`Nju=>$=2JZkMo|V?!!ias$mm z(rk4FP69{@lWDOtNQ{VVLiSuXe@gcNH|MkNWzbLOkTe7`BuNfoB7;CC+ec^1nYyjp za!iJRB@sG}$k}9{teupgZL^NtZ32j3*Y?2>F`z8-MbP!R>u~qJ(Y!La0qm1TqY)@+9JqX8O0|4peq3AP+mgyufb}z` zsV?0pq*|Y}n{Y&=AR>!pNu;>Fba-JjTIftoJ+(HXW691&X#v`nU`tc(Bl4diT4}V- zlrwogq`R0xfhlV;e3eG!l2*$6Xo)$#u>>lWM5mJY&GjS`abzHbN_HSD2bE5Mw2_ug zr{kI>5ki9O%80_s9CxfvvP(#rk$Q6R({b$RAXGYm_Fc5^@`{_}{Z(}bj2%1nfB{?) z1BOzHwQJXI#7Gu&p?L7s9CYD~J-Mw91#kTAZ5lVu1oXDGM32AN{?Vydgmx;vzbD}) z;ifOQ|BhZt@55pCx#PE`KihBG0KK*U!*KfN>dW3;?!L7PU$HR*{$I?QmQ4cqD)bmr z*^9mSP+?=VG)~W*C@n*d>}#+ogc7vX54rtb0HMK zO1juN#7)0B5PhY(b`OeoC3x?VF=PVf21_#BbrBd+ropmkmR(L+T5G(V?RH2>!VwHo znn9jVCmkd+qjxFz2MC1%{SY{UQ1Fu-5UJjB zWt3~kx1Ak>EFq&^kRe0JICjQzK8^A%{9wSGJ86C-0x1PrTBr;;;|M{ZGdn9&&4an$ zvJ?BvGU)?dC2G1;B1kHbC=j504=b%HKqHk%gQN-cv1c57vhIj%Yhek6?Lz|v6p*sC z8#=IXglJ3rsUfm)Rzoa>Or*i}u$4v%L0E$nGIPIY+R%AujT;zRBbCMl;=V_*kVt8D z?w`o$%?J!hnARqHD41=#bkMfKPo`0gji_J%VN0}Uo@2stK-%b{V!X;C!cv<1J=>(h zFtVf=l!vNofwYVA6vU%=^$qA`0HNQ)xShw;`@0s&{C@(1-v>PP{yNPt-qdqzRv5*)OlJhXJ<@Yd;nHw;UsSOxc z+P&C|j|?`(@;T3Yb?h-AN=AINqr15{;G$khnPWeWw(P}T?8Tl#GNn25f(8ydB*>4x zov&AQ^Pk#z`d;V33C4`F`O3uw9DYc! z-|he8x>nv>o@VYn6?yB7Co~T~9_P(PX;!au`PmPOIrQNE*R?xnZ`Le)BE_0T9@{th zTz+E#L&xQ36uk37nkQ~a($=Ub9V|KfyAdWHG_dFK12@E1u6o=3LFQwGve6e)Ix6qW z*PStmnWM}|eO-Hsw>GwL$AZnoQa;s1K`uXXBu7ptqabLrp&`!IPpt=gc$DWa`wZIF7^m_3OFy)?2Bs?{bYAJ9aFW zU3M8mh76&jqk~5td4zfMddeON(G^~3ugd`_E+uV1qjK3Id=dc*Cm2B5M)N{z?fYpj zA%wK7fE@xYlm?adkV%&U*JrS>DHc|jMg}Hmw6r3PK%r1VAu<7|l@Y$p3UKCM6*8`ek%xJ%*Ga4aa$ehf+`DjvT5|%(JMF`&nm|Z7?xMibIYT@fK1$pebk*vnARx*)X;gI6@N8hEy&L1PKNL42l#`Fn$!eu>;+n zFr`ew!U}{CmfcDE^oNTsx+w2+B9Y+12Or$&_jUy{N0qSOaMO=yNq8*Z+RpN=`R}TI zhZS-Bl3A;9ZH5@O8uHY1F1FdxZi#F z#`s|uUmKmU)9?0y^-Da~yyNkyQv(#2?|HG@mtRd$S8ozR%F86<#yAWgYTiCiJ)dC8 zB!^Ks@!-6dl0>6|Lk{ZdA1zzq(%7Up^3WjfE={v$oyVsR3U;msj9l9zPsRy{1)n~l z%RHvBNwH*Enx)ZTj5c+(q-ml1srhEz^!J>C)kvaw`o|Dm%cp~<8D;5+l~8V<4eH) zn99>lz&#kJrM_?ua0oC2*oLuVe!Y)n{|Dpo-kaaww=ix&FYQjFKfyQx_yb*9Nrf2q zsacqs<=+C=0W)`V{a*r30{SYeSdL-aU)#;~|5xJCe+ zp4D#;=~LyuxkYi~Ep3ECf@fbyV59GyMu#f1bFR@u1?CH#+EfcuRNS$%ru)N zFS;b!^8=vOZ+l#OZW~|ubpd1dw^=+d&5u9b${*e+p?XyRUy=zWC^NpFTZ;11a2bNJ5b@N-~%x$;b#y|i0Pwu|^Zbpn4!PQq^O)8aQ{`~pf)+V|l z#EkZ#D+D{FV6{q8w9hb(JANjEMwAnZhOq-St2S)o{wH2buisqPJY%1cZQs1)TlB!u9|Lk{5I3*N+aJzUQ?FFB6Q>{$m5XdNFbvLdoMlYGZyy!4u$;=3mM3QUHK z2tX)=a2%SwG&}qhYyA{$+Q)Y!qR@~vmL0&hEJKp{fbZeQ68K4%fKrqTo1wxcAOpyN zMTHQiv`h-nK|>a1gmFbiR5!ojMr1cEKx!xz7CxPoQhCc||7akteLStT>-)lOXyDaH z=2y0NbR1JxX9&8D>$mXs^KVm9P{1)2!x`ZPP?;=}-r#CQyYlG>JGholM{|<2G#M`` zrD%670#<;q(lmHJ6+vTJ4W@)Cp%o3L(@_K?ki=CrKOkeO9D9*cOmDgG&jP z7ZV5ta1(Cbn`^fu8shQb$kLMd^s0)Eq^~UD$l@kT4oPlrlBwDalsRE$jvPlIWkFJ+ z-2?=}kSQtL8NT+luQ6}lyiWI}SZq)D9^~UQ`&aYDS;LvXrip@}#UWz`@$|AfF1T|s zTEi*RDtYkB2XNmTTPTe>{Or>cIQWJItgY+4Eq8ojU%v3EVKjE6X^y+QPRalr`1#4S zZT%TLR{jWRe)lE!@%mczor+-t5F+b_c)R9?FSN6LqtBS>B_9eY^YdS|vVDiolzkj( zxA-htlIFS}7xUe36!FJ9I+(JL!>@mC260?hbLJNs7%|LZ*}|@>te;%h!muGWM;;pF zuD{3l!|m-{c2NO;zNxfxnRzcIIseiI23J{pdb#m4yy=haeCNl_l$AsUc(V6@r`DIFJ;A~9%bqg>Lh<{WK+l&9(urW5qc^Gr#u8k14Z1%YCtOn{9z63++?S~0kCj$TY0P7E8O8@%89O&JZ=l?SPHm8H{ zU0K9E_s4kT$v79BlTX%;9By;=8C|0#KmKkpho7{AZ~ds5`))78_u=BNHS+nhBix$v z!arcY0G~T6N;J}U;Pk*Fai&diIOd2Df14A_BV|U7u$li%6#)1CW6yUUvzRo~=GrHV zNhdUq-O_W!ZrK8tG1F{LxY#5wj@!@XnLCrLddu4>Df8fO;!8Iz_kNN2SVrZfGl`b< zdO%ig@96AsF52A6+dn#-@s&}YSh9mBmh9+U?uC^NoH(U|<0e;d*K0i=y%mK4_8nHl z=l;65bANHeCSYL#Nt}FCv4K5 z*kCDqVG%2c>Ud$uqcv`&V@WwIn|7xKJ+ozm1Urb8rmhtK@gzMq{uAKQ7LW!|QO_iulY>h>f7&!gUg@R8G*`TbK7Sfpx_Y+Jsb z^?!bpsL~W_4a&m@JPGSnipfJNnf$|3shm0EOlsYk1|HBlqgex3U1e~&SGxd8un1TZr4*#oY}&DdU?k+14la!=t+oZEl?b=H zql$f^?OV6ltxlK%A$uk5wANUjV#Gny34Qh;L`jr}^|ieJm#0znEkq98pJTpoB%zXE zTl|&!cQ(y^_Q*s_lPItxT5Dpy$F_iA#JR`o@Wy7{_Ud9;7>H!FU3|3fBW&|*(VmYC z*a#~?+DlR6C8?M(g4y3aouZ*tNGW-9(HhSA;;*7@?TG>)!iJg_Aw>L~(`TH1%Wtn7 zVQG1n^7V+iWwpHU>woadiuX9GbR>2#Vh9;91lR!a=Rg0M&6_t5c=_GIyESc`bNeCy zCRP=&;+omq`DzU>tZd-wQzvrW(`&f?8S^fB=qm^Co#V#v)j7QzIbHqaYQA>=GA@}l zoUb1>YWEscSScwVcQ!j#{u*fB@SgY6`)`Pyc;zjHyIe;6*B{21eO{0UZuoFHfwNAJ zaLo^mj`d&f?cnlnH}Rz}6fpa+AP+s>we3Yq(o7t0Q@h2dzClq@E>Q~RFHCXU&0T%D z*@uOg`$U|ZuOCD>WbTW*{@%f{vqLOj(PjK}!8sAW^o1zzEJ<_xnR{Hzzb`nzZ5YAZ z^Xc97wHCMbymm`|>R>^o z#n1zGy@tAKO0R9006g8>j2sjKqcP;h(U^Ul2keW<2+8&;DuE&(8#&Ct*d|ZHkQIwC zq(^_K1P;Um`ES!DX&wTm0PkQjHi|IhN@G9k%Jq%E6&MVBmcB`ui@SY}&^IabH_U@& z0?DUyT74EVa{&?lP%N^>;SS#?4vXLu>%+fYyq|d&vsi+6mvd{fVVQs zIuipSk!akgcbv#5gz90>@#jvR~nY+mHW8VRNm=i}RD*c}p1pf14BQLCSPT zK~(U~uNLyvZ#R)jm9jXK8vE?SMLm|S*vTl;-{y31(fLu1IWolb!?t&JDn3aVyPwV6 zo8vTWQIrprY(TL0xsYu<5_s}{L;LPiFqddiK=IB)bow%M96BfKG}=dlPo z7R6zQhK^p1k!Xs!Y-orxdqNq@x3&|sC5Mh3#G4!YbBf=yC@n2TN=ZwL+2)1~8}K}j z>C>mPc=2M2ii(&xaUw6g(9=~r)t-~8WGZZk2|<%1Ip@5i@(7uDJjGA0n?p-$7ipJF zrp4Oz+uWaDKS%%k$Da?_0kgaa3idm5CiR4}esf-@^-mm6FQjIMPJMA!rpExrqg|#5w+_G-N-=4mx_5DrZGHv5yQ{!k#KQ)c9 z=N*Av5TbQe4J-fr6s=9IlmjSXYJsE$zA~ftLYbWtvWG5=Rtn{6WX4g)Lm8#g-m*dj zv`Hu}EhJ%yqI>@I^lwzs{nACJo|IVgLODsLM5w;)if4cS^f#(zjEc-SX+MhoSwZWn zO$^e4q=3>HV>TvgTix}Txp?l8tL;H01;`RfNl698lgb%)^1eL%r^k8!rKPl|O`D`J8Z^p= zpr69=Q>4(iLLjAu#AlF#QqMAEh1O`-$JIV<%BKVy%Mu93Mgz^h3mS@D4-pDw1c4#j zO%%S*sh>R|e(;5}@3IR6Pp95V)R6#PsdU)8WNvYm6s?(~D13FGiNe>b8xKhHOxpR3N~Vub)EY ziTk{>=GGTlx46lpCr1b2`<@XA_B=!&V9uE>QArma4)AuejjBn5nfmS1C?0My8e*{| z7hV24+S(JjFWnL;DBe`t{=S8@5kg8^P`%#>PP_499{QgXi10zM;3GbU*74Q|KQtO`TcoQ`y^%h$_CwK z9B}?P8rJ=q9V;#cl55`b@7=iEyLQwRd%(faJ1?Z!@Sew)ep&pXlQOxOeOL(3gPJWq zvkwdLqhGYp+NLNjlDxbi#q7gEY~1Ye@~cVCIz7U&6)sK9iX#v0Qo*RMwD|w*op+pF zRlUW(d!KUa^pcrmCX=3!Neowjb$y2M?dXJjefl!F`&(_&IP5@I~O44DJsc!XX@V*kGRJx)B{= zVF&l$l*)|=#;QK&U;qFh07*naRGk_aM9NG$JIHpdtMGvtF#**<)94)7SJL?w%f zKVF9ENJlXpVlcIYX94Hs{$2z;fgwX;n6#(!*>hRXhcFlI^S~&~emoD@0*uam-=i2} zBZ^UG98Gs_?eGXk~T$=zs3f#7b&xCTHdlf^H{1W&b zaAR)zhcWTe&tSR%-^UOy%|k5f3CuoPj5&rM!w^m*b8SyySnCk*TTDdz>fC3)kXz@c zbK6*i@fYeI&i@gH?S2s`!3+hThuPP^!w@zXU`QDY_$nq2&dYtayS(FQOl|41+_c|e zN|U52GaVlK zW1Q=+{l^W>=Pyj(3fwZVJ=Ui7n~k1zio=I*jPRLb+Q=`K#M%{KxHC%il;Iy_<*SyjqKu^{DnGTP#HeP5G>G z&g(0eANAn8CHjV|&J5&DsU-VaCoP-n+4S2dgBjaC>7tuHu%Wzi#2Y&{)t^$5R-~ms zg#x_-7O=~XpOW6OY-_UprNxD%8R+RX`&oKDWV&xL5?mX+T!NDp#I+)m zQ3P^iMM}#4cO>oS${|d7NL)Z99K`SNQ9DzjFdCR@N6cv+-&)H{Tes!4hg>c@elmVX zjLzMyINB#IY%&5G7j0UQSDpFvgtz`fBG~v=;{gZni z3PLK4P}(RfgrHK})Zr0BQz$I#9D&n)E_AlFvuo!rqohHQ7Y3+x)wkZ)>nT{a}0?fYrWD2WBB7~r&wTsVu`8Tw-^*$q} zGoG_$Tci5qXMU<5xbu1uj2iK&umq8jc^q@`vE2XG8miKg@gF>mQRhs3L#O;5sl_|a zT>pnx^E+ExDLZPKKjDg#RyYO0sj-)~x?BGIl87ggA}RyuWSSJ3U9M!}dru{>y@U2Q zml3ceoxV?JB*4TIj#cRut7WFS4Odt>g^kgJNTn&6J?f>-rjF$LM>an&aqJ`+aBS8- zvm#zxS@D&Mqi4)-es$R?x^w8xyi%HEz(G_5+Ey=IT=>$wH$`EELqS!9WKB7tk`Q$( z>vX6vf5*ggKbL;?@FSLYX*IDZo5gV)M&y+casw#ef2sb}PwF$zq;2P_l+eRNTmmp>%P)r>547xXTSU#Y^Trfs@Cj?C;02G zCd!=#q;0Mt?Pu8-a}PVH`z-L@evR40 zJ`FIOGrgRWh|8+FE=Cm^l3;sluMlE;Ym)Lj7uS|#ym#=?E0_->4!exT^&wEP+O?jz z_Z#t!oBvd>FMSx2G0mMf#QE>v=V2Xyy=S~b&Bdre`XQ5{e7MhP4G;Y>PB>(I`ho#L zBrJLL^)%<58DjpzG}nDR%IGSKzrC8~{TGG#+p8&NOm!$N>EF@2@wBSe1QJ39#06;ss=?>{Q&eSZJ$UKZzJ)H06%|BbPM*jF5h>H8fBIxvI6hwvW= z8>1}gK_LIYFPgfggKzkUoqu5dG{J%)iJ^V%L6u?rLmtWfy|1?IyD()w0N(>X%h04u zK8BF_1n?)!h5iWe9ZW~O8!uu=1~A0LRSYkK`#MJ5GY#Vk{;R#L?==|W;4t6?hUggf z!9BU@H(?&TPr?vTkL+Ro6owe;e%h$SkTk!>l#pGGiH^H3H{Iyr2cr^WoE7b}tbsku zg&5Wv;Ag-cz}Xldp>JTkbJpdi-vxXNxE53Qc?G6?tDB@5s`vUc3^@}3KAmejx6gEo z-u=@ZpM7cW{RE7f?3)3><7U~cdNs?PUyL(mhCRp-xErrOmGL&O@ZQ1@ zeo!**c#gb$*qwUj)H0@3=HV&L#@%r~{qQQ%10GU8b;=mtKc|vY?s$!?KlBc_rQqHx zXYuCNc7FcKHi{z-cYI(fpF3?Vcf7D=e>NSYOk(bt{a{(vaTt}|AY6a_^;A|?a_zO( z_Oulj7xRs8e1j*Rc!K%!=QDcrXs*Bhde*L8JE(lAsxUuUmPkj!T3|_u(wZ*q)8$&! z%o>NA*E{;x(Gh3So9jqt275VbN6y}rH(uwpTs3Cwr27_wFs$KTZ z#wL4X?QTX}65sb|Sh0@9q{P%YvpQ|`uM5j7?(3+iK)1)q+K?Sr;d?3WE)>Ocbjl8? zX8)EhZC%+?T71R0u8iqW0(6_~=FCEcxp?}R|7x`7GeT-y?I4vP7>S^@#`h&oUjjob z5Ym)+SPCZ`QUx{nf4TI^Q`bjF<<-a*|1u{Wwjz-zswm1?ADT>;$>Pg8QgGy z?OM}N{3OBR^?Q_~deW(P*+koBUB_gGxf?J@*F5 z^k9LZQktipUrOIYo@0$>4dt z=RjLm7hN0Uj2SnEaQQ<%nwh1KUh^yWiJ>yMe2O(ENBZMHKeYSaN5>ALG zfATmoS9Z3uu7!@y!KI-}Y5C@|t$zLbP1fjH)3N#}kBUZ?;uICo8dqxa*z$W@Hzju0 zF5fcp@RN@Gpfz&ceTmlQvQd{D^;Xl4#A{_0;Tid-PyBB6;?1Afwtj6zL<8Xr*Q@B@KTJ*q-e{eX})_N zM~;7gI=;KJRS2O~CMnPw91D~()rF%g@!LcAt*vCV$0$EU^+~hLb)Q3HQwOObt{s3( z*5kp)h6^|CPuQ1~l(09J^&kV!`XNUOIm)h7_=X1}4 zF~0weLR#D2*?r#JqAp@Un(!X*Sq7feL*p?_zw8=})x*BnXH3LA*B@xi-s|k=bK@cW z|AEcGj`Tkem{Gf^KPe+EljL+D_y;5RQXH6HNMC|t35FOL3bQaB`9J6W))-^n-wd<7 zrI-%>aQG{x(|;_6@cAo7;j$;Zj3JVa06qsi*=L;w;xP<4F&9JNT$!79Pjv^-M!oVkUZGl{SIdD9tJgZy1lLY>VQQzzE zrcK$mGRtgM^Wb9%JWn%zwn>Ukr!~9keU`4sFlW|37Eycj9QW>puV;QfusvKLFTtEA z`;2GqN^ueFkHl*Q&;B;~TB1`M!}d_|u^e{RX;{N= z)BTHf^3^}@S-Jc1<41GTc@sJ9M~m3dxMz=@Qzn-%XLJFl{%8@Yta;#y25f$E+0^|f zW$ZvBy`*>#g2CWp3}LAKsZV{19DB?OdN5)%Tf3KH%UNX z^hlLjo%xZssk6LeWy_3ESDG;;<@n>qQZi@!6GbPCdM>>o`MC*Gr%xGKF$yo6K^H?d zp$P>;R#K)5f|+*m#}~C&z7unNg)cBZIB0}Y2&M78!ME~Ac+Y-!p`go|b7%K9_?o6I zjqKjuU<_mX5KRkG@qXLZ`(A_6M70@ZNNR#{54ZWpXY= z{my|P7DLu9NgILzq-WF!+V}Cb#um_u;>j164*tv#&}db^vCXQQ?)4*OgtV|Ni><9&2v=>C(kZ#l*=|H>QQIjibv#6?sRs#daMdM7fYM^K7uF;Bs6Cl_S(jqIrmD zKFP-PtF)z}zGIK~JWbx%(fC2Ty}h}8ohT~sGEzFxKm;qDKwH9bEj$Sni9r6?vhbTn zT{!XVipj-a-nwYV9HlozkDi$B6s!L#dK6ZJ5TQIHSKGzCdxb3Oc|JAX0 zUE##h6=YiD5ANF7ys&9w%RHycf4?tvSOdkg56eU?*WbM4?GU>f(7r#yE-&e{n>%AF zo5~Y8qiO;UeoHe#OY9NFIK@STckN*G?z)_rcQ0m58$&o0AUy;zlNS!~+`ZRRF?oFN zG10nx>EnwEH{bOgbR_Di=XP`M_!C=dpV}vgbcvjZ@8`yrur4c@VT^_b=N{WJk-W5FMgaCi|OM;~25U%tYg2b%lh zzP--^m_E4-hUsFy&3EV@OtJP)_z9(8k{BrJ-(%eVJ1a`~`oW|zq{cNE3E)GyWqz;EJnaMChcG2vWtf}dxIWXn=)LKduy@~| zeL*Sa_zWD4zZG+g3mCjz`)ispkd@DJ;7t0z9q#^poDW_c=DRobDmpz6jykP@SN@)2 z?#V-wx4WBsZvS~FAGE%WD5ZJh z#fpC9&lhiO_w($eH_<8*cPrQ2n&gy z^b5;^Wm!2Y!y6C1#-`2N7=z7>G2@wi?S<`LOc8$~~9$Er+E^1o{3vCH}+rqJJ0*;Go zJ6N#}Mo$@sZcnqib{mx$NL%1rCX(2c^yJJvbFnp|v&FXScD}l?rID6of>Fh#lmtQ) z7M4@r+_>ZK-&**_)LFB?S6ondU%X+r$SWzP=)`i=_6)ky*LsA1PuR7VHScJPY~9)P zwNx@ii4``>R|*A$6CU-Ob~5=rvk-mGt;;VxjTh#xA(rf4Miy{vuDbkGzVpqG^t5F= zGdz6LeeCQ?a-qy4U-vHO^oFhUJ?{OIcpMvcq?IN8=!={teB!nV+^gUM9_zPjlK*+W;mJnn&cYSQy%vqlhq0o`3rtEYp>qd`x z&m1O9s{CO6Q*WO@M;ze}O%^&r;AA|klJL!)&uwSLee>|^n>bQf1lCsZFE z4dq2+i+1mh=jWZQU6=g1hkreojh?8Nt-7%0jN^!wmz;IB6_1OOMQpTKf3{pxB_*17;TSp%;QT*-IRsD#WNZ92wA32uM zlSdOShyZAzb+c0XugTixkC!+uWtNR&nbfSTz!;D3CkhJ-_bGu%N*TjE!}o0+I@$`O ze%aDI_?+6>oFJC=II^aISJoRM{ird8tg7q!M+bfP9n;P$q4v!i*|q#kfL$B)R~9^$ z{`1L~28R8OKI&|jB`=y|q;e|N6@SZ6K3eV*DI=svGiV=zltcHSiV7v;hPI60w3C8- z?OW~q`Kbh_o*3v}4kx`Qz|Vf&MO(WeT!z9YuZ%L|J@tI^tHTex9V`?V$<-J&{lUcJ z7+Zs@F@1tBMMqPghhp=C;F|1qUXc#JY2yA>lH7F5q@;U!N zwD#5^@4*MkAa>B(x$gc|n7HTJ_lk{}lBhCz&0J^Z+7A|z?A=zcFH-w3|J@j+%A1(= zer1?>&&T+u{51D>0raa!&0u_Heu*hfT8z0F{ceb5ZN(T31Dt|U`23{L^cfhU2+V%0 z!)*Ts43TvshBO(7^&EJlbzf}6TnqQoTPD>PTQN!+yU%*eJP6B zqNq@^?ClJ9-VYyyRZCEl&e3}!tLKKBoGkX^xY1!o+cjG zJn(3OH9$H%`vSS6E9YhHRN{pRjE&zON1*1V6y&O7peOuTY9ZAvM>`N&M3TiwKm zkLl$opI_6&%j=9?)QX!<=8hLO^S`fbsI=qHZg&IPp;haJB2-pM@p#?Av? zhrQvw?|m;%P#9_f9|>G*tl^c3l=Qky6djvD_{8v3l=P(rly9AFTR)` z{_ux`mL>Y;>$nbDYYKcp0g_#Rf14+7ha=88g7S$Yaid{o%^1t;Fa3~3Z?2=Mxs#cb ztC>2j25I$1*d|&!Su=knFF*J)x+6|VhH%muupKNRh#=`&xxTFB&1KZCT0>(Z#uzLL zodAPEfL7QD+C`>U-613qCFqh+yDLrf$eBc{qAY7~z|UIb35%Ha z_xfWJ(Ha|#+|f+C6tum)hIG*ROe`Gu^c%aHD37Pu-qb{wEph%3M#q!rj3;za-qk7? z1kXdZcQL~XQDeCvB`T95BcMXtEc@$X#?6^P^|Xmd%XCCeKW#SWpM4}xzp#X^m>C3$ zgacHMD&@wneX!s9)xN!%Z5wKtEL{Q!L@4Kp(NlV)jnpg5g#{5#J#hv{&6&W$MQi(&(L}=mzVVqe#K^C!&R7I`9Q zr!C9kt>sG(-`?7^ARw)l0w-9M>gtTxXjU!WaAs`VF2;llu-q^zJ($2YX2Xik`(MLv zO;DY%aSAK3vT6L?Z6uy~>r?HE-)_={;r#XuO@G%d?IWs!A>s?xf2B1Zi&|QfXzF6w zy|34Zl=?|wN(F*SBP<6!u%yTL(6KDxbOsH)@#sSGCXS+P(&$bh^pCZs$;Uo?2En}i?qi%%zIvo~(S|E_yt$FX?O;#jxSx*G^W!xP zX3w5YSy>qyH*Q1-!G#xI$e1x>c;%Jh9yt##5*eR|-mK$W7ffbJ?VA)u9Il@`mhU{> z`AU@G$Q%+ zJu&Y2MK70h!m$Cqb9*NBMX`{ z%iSM8>313$W7Y5i##-T$JG*b=ouU=&UYljqoc-&Ftbb;3 zs@UXn51f=~Ts@?`aKliI`+y{-eB>rf#Mx08qu)IlFb24H0ykj1SN;cMc6%V0 zfhm<*lv~%?z~||IVLy&3W%?0D(eYmxawCpORk|5do-`a5VOZWD=fT2|@<1j|M&tXWl>6mh(zOt(CVLW0&7`0Egm(JrDw)uXH6tDxc zZ;CM`PydTaj_Nk=?M`$0>oD6j6q+#JKM!Ndz}Dr~`_$Za&%-EwzK_Cz|Wum zDD15B`TTWxL#kn}zc!C2a`%q2=LRV*GC%H)BRKZR0RR1k{6VD1v?&g6zgod>ABZ#W zr4+uenK{j6*@6lR26$rmKFplv@WD$4lN#ro9^{iBi?XZU??)DW?jZQg>vkw*; z8ymUrzCEjt>+9>e^2#f@?6S+a{PN4`=;+|a8*dy`x&+-WA_l^e;3=XCN~MidKHHvM z%Ktv|1_2=mhJ%D_%CI9LM9yR7<%Mf`1>5U;rogTY^GU3T)@p{zz<;| z2q4+M@O8A-*uGCS=Gc0^N5|{yaVJ*)S7cO)J$~wBD%-Qr+JTjnlCYDH?c|o8Op`>RkQ54wriK`Ieg1cxdie>=IsHiTMwVc^0e>%Q(17VK0X_| z_a#M-az-c2Pg4L02!Ty^pjD2h5Q0!N+RxZ`s5s<*S7el*BV~HGN$5U5{kGYERwSnk z>g#q~aPt5FAOJ~3K~%Bi`AF$gh9;6W?XBB)kx3?TLm?jg%?;fAy@z?^&##ir`jnL9 zamRPA;^6<-~eV>Zr!cf)pF?VmDx0?EgUJ`X3T_Wpw2r1Fc z`uyUtr9ZV&d@;Du-?*c-<$d;u0*e0UJThB->TdiAM_hC))#n^tYX$YZNmXavvi8S+ zCSF_1?DwCbtIwPo_q$SG%Rgf3@9Vbjnz$Pu;mWA6tu8wlpgolq@eP~8b$&X0lnhZQ zZL*l2S8;hc!9-?ALZ*9r05Z!~0|HkXBVna{l=9hLyFHTH;ztya7mSP?S5Sc?BwOEJ zU)GsUfYvlEUQTSWLL%~8ESoAfNPc&UnzWHl5bb+t&z!e*z~wMy@%PQUx$mp@a_*-t z$e;M0sqeR=fy>6tx@JvF?cEP)-(DO~q(jk2aL~GT);2N!FR#7t^{3w|JS?rL4CEuE zg;pLaZHP9#4?YJU`N&5YIdUYKOoq*yH}l!gezwPq{a~Rro~5B<&xuK2`}11vzv^%r zZ$A@XY3_M#2fux__qVAcKhWzL1)M))1pjkxugkz6K6wN?+ftl-`<_Bj_W|Qi%4hw{ zH`3Yg44}8K&0hcXuahrc^x075UO$Vu_g0LtaNZ$7Z{-M!qQX57^?!~jDVF^RmA=c4Mg^m*dY@&MEYI+X>y6U2rrPGxtIWX9+BYh3 z-FMYJ^+ikt!^M~&k)c9ZZo&9QewSXWgF`rk{eq3@)Lz)PaogY1`$fuV1?vWoG6hu@ z6*KlPTDvbczcS>Fc2CjGebI#RRvCzoVhD|AF+Lujfqq_Pf1-bR)Gkc<&Yo~FrVQsv z3|a6UdS!E67!Q}eSWB-;XCOK-WWq-V(Hxdp={4@3r|X1N+ex@^FxaQYHF zKgN_b*}4C_OPkV|6s-TjkSdJ-$Bx{xZ^4)-cVW~n&_5CzU9Y-UG3U>G48iv)`j=G=MBhm4?)0m^_#69{#Px5Fsgs?4WlMc=_zaiB zXPA4<#TSIR_=500EptS<#n->M_i_Qtg74fo^mn_i;QQa~o%Zdo4{tbpFc1t2KK8BQ zQ(9)6=rH5N;qRSYZJIZp&Mr)M=DeIrYOZ7UWwZ8W9qt*1Fj-RD!IIj6m3sa0gL(b! zqZ&HX{P*KS3C!LZELyaPMT-^VvWpj+eL=YOGl{YHc((2fO`g%Czn zA~cN3ksC^BV??SnTKQ` zaL+3Q!yy8Z0B$&dB_vaF^R+*_grCk^LOPKq)zU@E_pm*m5@9h#1{vX-GAy))jMt|- zDL|O$aGlQPwzGd{Gl0NGAf!MJ(BJ=mB4WCsl_Hf$5@MiIrq5pM*$)bQJ){9(0X8MM zB`kbo5zfXs%Ey!uEiT}Fvue2Xm`PZcjX>gO6mPz;0a41+X58tcd@B*ptlqpcm`!Dc@46I*L+KJHyr?3tq`>Ql&sOmy+V|1Ek5J}3 z(wbcPq)AD_lDSejbB;SgG6_KjjU^;*pYv-xWuP@#?c-@vPG&2O?hN$N1wn?iXpv^k7kR)itBbx88cu_bTjw8|qfhB?ZKUAdt+UTDuUw z3Kbx$j&_2~2o>W7!U$<2rG?*p9qomaS+;B$ANj~fhM(ym;I`*C4?Ddrk>!G4>^aEh z6A!%I@9*C&+|KV79*m0k0hs;%StJ^-rgi72Vy_V%(-N<5yr=K!3wqnSveZ{qX-p`{y0R)HYO%LH8z+<;3Hm`px+pVMvP*8mh zBPQ?J1@#byL9U09%JfubjPwLx;R`61l5!k;-8()k`uyMh>LzpsqRWy5w7`KLyVN2q zN~8l)gOYR#K}P$85v1ZVym%LJASfgmt&G2i0ENyaAr0Lta)F?*NTJD~kd90K)bUtF z`6SXF&F$@MtF5IY7Dv7f#KNF-}CpczFtlTlPMJ}DoSEOPwLiu^1HJwe()C9w{ z=SN5;l1RV_xc$m-{#~H8rn9}BWG0g{I_|sEdI^K>bHnfIM2ChTm~-S@VXl;}BH^Ll z+R5g(wwsX{TlSB3LXeh%fTxN0njlbxWULG@Dj1?XT7>UuQoCEI4CNswPU`WB@}8=+r#;JOg?qWTsyz8X~f3*pm6ml8FnnovvxS8;Voia=DO4y zt7l7JBRt=bkbaKf&7DWxWS_Q->9+A^>h)-HF=UD|JJ)Pmjxmv1;`)XN5xIaeAtlO^ zNXtUHmMOrDIH;XF`;``zSuV$i3)$^w=<+=h9lnSW7?){DqIHt)`(7S`ky22AMO22# zvu#Q&hp>>?fiRXE#!GgBDTJy@)JdWh1ca}F$Z31I01LkdcUQ>`4rAsoWL2wQe!mfZHUu3!AC*W+J>#s=OV zs@?Pa6?c6pemB;zWr7EUWZYj&uM#Vtu7<@t@wI>NaylG<*+8L#NgyY6C0VkU6Ok&$MQfq|j zH4PS8qXcH8T$%SCnj$T+0bgt45;ACP4Mj@PVwwFJLXee$j8?c><7z{6xZ2F?YE4k- zzQr;Cgt9(GLQwBmq=iks=sVS*Z|6`#E?vqA48~N`a%Ia9q=5RWG0KF z4bc;_BxlX3BLI5)_1U>shP_B0^&lmdDCVrA&kN(5TLlUgrc%ie9t4B zN)wDm%z2Z^A_6WNP@adhZM0HkvsnVcAX+J6ZS4f25nR{BPp8RdvIO(<&{~sCX9&73 zJ{qMIu4S8&pG*c^qp)kOZzLEDP*74tM_UIiP0jeekLxl#p=hKbgQs{?kHhjL1qsrHd^84BH~N2m}CXb`hqb9_Is}#0a(f; zgCPt7mS@=%WE9f((5WV5a}yaUNJv4OW8qr@OIYMU_I7o?bZG^PIaj{B^aZ5`;jUroD*ApKtg&-;{qB4XGhY*%yJYn=OcP$~2 zb^u{J=Kq}WvH<*4C(<=42gmnu@j4sZx(;qV5{PUzJJ`UbZCeK~-nRT8f7d@3iS`J= z=n14^uK;zc7G$5e{pzlh_WHT~gz~lYvtr2OA_VFC9*)<&@JcE()bxLM#AE86jdwED z3&j|#h*$fxufPy8?|{te5dM>3V?0cr050!t)EXAt*2#N+IXLEQC=4uJvRuK0(+`Z4 zNwzEAylcq%+=mWmfrs#J#%_$F=s;qu58+*cys$m)$T{x*#Do98!iLS6*N18k*!IW~ zHS+kpV)+g{0NKaPIIgb}tT%bFqeTU_tnlvGxxqK(lqD0tLgkbz4*ohEWHfIY(m~R3 zoWmlK$dL#8>jWy4@Us$fvVYqG&j+pXb(TiQ!b9K#8DW$i5d@`5A{`rzpbMWiKRaYM zUuy^nNlYk1W>^w|Agnc=Qqkgjlx8i0C8d-`T%_Y*TN2lCsCI3n?I0{kAsS18$av^v z8nkg-_W|ulL?mS5FmkFDPfBc|2zyz!CA--2_~H@1B|bR1yz=gvGsfRcb^7olFF)pc z0WbV3D{a=cat&7Hzb0}1w9Ku4ImN(;5ep}E(Mk69gi3hVcqZMA%!4cNQxbq zo-l3n^KA|4yj`_B<>_Y}@yZ|mw4hY^{*0LGQ0V!fVQgioH%ibpzpkk)wX2S*ynJd~ zT4-r%V*IqJ_^}xA-A&AxIDt+L>v!y;yvq1)H0;>LtM(B9h`sI6xPJzbaZtwqk0s?lDxTPE2C>hlePp+O-)R!9>wg@c|5v$ z9lrAXvQWt1(b4Hn&M)Bn_q>O1&zpzsI$ZX?qgsFS=={Kr=Jv?@E;@>_TJhG~t0@WO z5w%mfU1avLR@xYK0ieLKAUoja+mhy$^F7J4Y-;QvUXFB78kANv`B^-rD96TeU85rN z6_&3Mj$>E}t$S24X!F2YtUxJ^z{9409duOm*jbzQe#u$`uFsx-a%Fy&N5T@cC%eG+ zJsD4LDej0*Tm7de=a9+F@jE-{K#`IH|Om3g|^NP}DZFAQLnG}9q9hqbryP_PcungVRhRXDL zCKnQ6*(fh%_D4Um$3i**R3-sJVuuP4wu8#1P}vm14wwjdCjefiXSvfHhqCeIwGaQT z{vO}=52kQNNGUfBYW33h(6)8Ba`ATuwEryab;|%oO`uBJ_D6fBxj+%efqfi6B2MGh zRsKMmgM$LkmjjjA03;G@Te>3i@X9p@f1v1H0g0G_Zrc?!mmf=|jo@EWSI= z37^lWbkgu@nRt_8*OLByj+*0K0(lax;m@CF<=oo~2@PW;)fcaPx06)Ip!>yoj1SBq z{Qp9n!QMNE@Nb5)5?OTW34w!=g7t5SC!dWEX%P#tCX!7`3|J+iBpMAP(?amE; zH;G+9*|?AMo=;Btr>?|-V9{^3(6Dw;b082X&(F_4=;v29nl__WEFOuV?OuKnV4pljurIb*)q)zWo#GSP($*<-?5fNh%|Y9!L52GYL9E+~LL z7EVLf$qA!S>DE+qOK)}9K}5pF;A!BF@)bIfK*uvE4O*)n!bWI7XGm885ek4M(HRdVz>S0$^OZB{ zsH>;*Pc8**X$pkJsC1^Iby33udCER7A@GmaTkhCQN?CEK2r)9~EMH&WQJqkJ;j}#WrOxK~8E>|?i<*++=Om0y zCXG>@$E<8Gw zOcsnCS5&)oS;we^@}1)lYiPYIo=zVZtr ztDNa>wJn6}Ap8)tgNWu~jTnJ+ED!?e*jPf44=79K;*~WTVFWos_IzLeBByStRDVrX zpQQ61zCjDo^LO`4Nr9FEUkH>0PY5!WAR{0nP5p9OC<@aVq_FEs+gW_V$T8EpmpLUM zu|`#z^JrT=mg6Gx!cgCWC@VzfN6x}B^>K}0sp_F3NrcLWG-jBT~ z9e)Gwx#rzJ@bkAHzn}KHBLUUCgTOhTbUuCQm&5;5)0AvVbIYZj<(ROLff)adujF4p z_vFyOUw!4f8)yBiSKvT!$w!(VXBqoS%1ppqmlJ>n%pK~>z?qosZ+u5q@;?mS7v_tY znB<-ZUoWkB{MuIj>&5b66IQqUErlMyq0}629@+kWM<;GX>@y)#w=BcLpAJd5eUH6b ziygut9Ks>|XQOtF?`>M*KMEMRVfn-#a^#2J{e;ZB0qKk(B{Er*ut*7s)|wQWgjQtH zY?Xox0+CJSI$jXey2mS~+w?btAe=Mw1bWmQSdvIa;%ZG=K-lxhWIJe)ro^Ya>nVXi zZggDq~Syfx-cTK0BA9gOL3D?Ym{MX;iT6GvAt<=C-}1jMGI$k;mxcumU| zE`9jE|$Xg z$PYz+cHESy{^DH?ORw_dx?S*7i2pBo0tY!4EV>kJ4ET}0cjI0@T z_>8BNe*NsK1x47NTNgW!1O|{U=?&P0ohH@S&~e|#j^z2bOsR#BQse@q!C4VU|INGag*GH zz!t`s*%p$XxQX03C;Iplb)WBjG4Suc-bYr%1Dou04)JPoq;AR6K!b*p1)T(c`mah4Szc9XT@e zUm&s&wj!|CV8MSqj=Ewxv6e5AumfyBvYq29CwuI5C7`!7{?zIVCJ;m5QpF1AEUIy z>X%^k@`4mCt%?u4H_QvKq*%Hl!}({2m^P*NbE&lEr@!i=pg?l%RlV!6eq)y3+#e?% zS6p;nn6u{|xQ)mFRAPK|sxUsIKgZlgZ^HOvJ_4Kp45@ZLgndWfGxkOX__l0*CB;j( zba493dv?>VTRvEs?}P-e{k)6C_r&?^TNV4XBB>6=gO@hrX9saFYuUfjB^#3rG<<}} zI|~660__Yaa@&n5ZjwJrSMn}vMx%KkrU zvrlTEc87=K2=bzWabs*QIyb~8J{s*8kEj&H07R8KsafA zu-g`N(Mtl^2z)eM%4ds8V+lcxbchNIfuK|QY}XkSP$_K6Wd9T~tu^&JOQZ5|5L8Kr zLTM9HinNsEij4ZrAJd9$Izx;0jb8`@DlmZV?5PlfQNm%A<=_g7YCAwsN<=V-PH0e> z-tr}FI-xz^r8Jp%k`<3HVcI2A35J4%WSpu%hy?+pGs%g>pKd0tHB{hA*DRy7uz*7iDgU;H1)<^G25j1GP=!y+@pQ z%RM_EF9>G?Opa84Q;)XXrQe-;dCeALElIM|WP#H`9#}S#&yO(7t}E1Gl-&J_bS?v7d*`{XrHOJQ z+2gu(Tw_tu{X%y6)^vOyMyAM>>Cp=d*HdlCS~_j7LsH{a$wE~+i6P;*V0+3bTo+uM zv|DbE`$tg~RG&t|vB9wrmKBf2y=wqWY0rNcEJ%YZ9u(abaH{ZB$J_Po?$N#vrUBKGF0|~q998iiK7XD z+*=%vsY00Pyt6y=<=OyWDx7$Qi7W zJ>Wc=cKj7cY+r5t{Fyrvvo5(kJnW#q?S}PBEOxH5X>D-HAE91K1%gT$~^dJ499^Z4)d{Yqs32t8Re4ihq>pLY!<$g zWb1Z|dv5V6X~h$Q%YPN6cwkRb=9WLUF=e9887BvMWnq&0A8BXf7K_L4&+XQRB)|Pb z3j_PBoutgRa+}F>YB~GcAqEXpIP-!=?zl0Fi_iPgWTp%}4h+I8o^o%u@2d%!)ek?oF-a3{jbUZr^2G-9Fqv-oCb#+@UI$EG|R~?kAzQ z8yr*c=~I;-3@T^qn^D|1=w~i0S^Z?gJ~aYoqg5JS9F9mEOsevj*E2o`y z8h77)H>aL@DossI6c-nB`|Y=L-F4UT{`>DUZQ3;My6Y|~Dk>;1?`c=iHMK}jP;Bpl z)W|LyF(^80JSUwvlbqqXs9_CBlUcrMyLsE6UTUwYYnG->9#MVEZ@#@dk{O=jx^AIs zStJ_U*s-FVWiNch?z(nL&`C*xplP9LDsn*qIiUbqnu;zf1SN^Wj!P?d6xkL%qTL}` zrhh0%Dw!Z@TeM1EnQPrqC>1irii8=|F?AJ7mT-mV-IA*XgukLe-(8bDESBTHAZ8dx zZ~kO^ethLt%ECFQp&*5sIYhE@>Zc4WB{$chFr10h)PiI=ln6mP4oTsVDI^pZl9G!Z z(G$7RwjEL71hRa=l8_@bN0y0)BsW)en-#y75lXtgjAj#&_R??x5%LQw-dZ1Pi8iY~ zEwfqC3iFaES*{>rIm8vHQRK9$z)M3(hW+Gb=aCc8ku=3C#f>L;5t3&d>mqP08{4#L zjwh*$#wbYHD5guXBcZCQr-HIOCg${16UZIs9Q+}Pa9$Q8r-bn4(S`pa7Bh<-)xj8Vg0T)KJ3gk&m3L3ZKe z5?rn+YB;BVDVecy!ip-IS4SW4WdzRkA>{``8B#bSN0O1Kt8992Yer>4h6S1{>2{r? zTb40w--g!2KOM@oS?vt^73a*w`Ps!f(l>ylmUdeaMK~1`7NejOt5VA_XD`G>{Y0_{PXQmhX)6 zt-r3s6@rr{6!EW%C-dNvN=kA9Y`AU?Q~t1oZFPMX6XCES*(|~bZDD+wu3`oS{qQ`HyY_}-LQ^?7diMF`Z z)Hw_rtn$fflW<64+-My|0m~9>+hJo`bhfQ*xJEeC^Lg?4Bw|$q(RGQ*bM_x}+7~as zk>t$Ng8Tjc8*}|!_bX4x@WQJBPCu`a-(Ho;QM3I#_H@^MxBL@>!>0MzR&G&U>(IYQ z!88TSJ~p`O$6dL?^XB+@_01&hF_(<6cMCoGRE*=l5n%nME`PMU?`>nj@c|yZ#|y%h z6suf!ODh+i6Ydf(elc7~S1Is&`}qDxz)ZXf!T+RZsqnAyIkE2({!?Hs&^Z$kE z6F{HD%+&KkthhIZ(cUF#9CJ#Llm3!TWWd4MRx>Vm;`9c#ztg9<;z8iOgKp&iJv>g& znh*!WHF)RZKW1>-(vdw{YP`3C@@>~WMFHV3V5 zlBy+Pv9mD&jd0cTn<)SN(Tpq#^WpYpKHT2ix!yw`?dG>94CAoD*?p2SM-I=yr^?** z&Q4q*SiQTIXI52n;St6EF;eD(4?gJe`O!xo<)Vu&qO7cpWy_W^Yt}3(Dk@mCXb}J_ zR;*ynnl+qo!U_E8PdzK%OGrX=*qHh>Ff9xr*ep^MO&`rEzxfV&w(dpXfqVb4kURhK zlHSr9&jqM$Se3KtvmIkUTzE4XVUJ`CW@VEzcpy2Y`Mhx3^Jq;eWJMw&3nVj%FWyG~ z;sX4m3Q?09W_2TW^wilg^$#1$FcAjMT zRB7<=ejn+j{$K0){yZ%Zd?NP9>ab`{AkqfC^4L-RkL z_Ni7~BN8fM;SdmlwzMK9GHM_b&i@9%l6+)cK~`j31b_eMB3@ef3CWbn?88QJ%@wB+ z_UqV|jhQrPt!-r88!OrL{$?~G)6XBBqYD?dH2XNS}4GnZ%ro<$zbFu zvyj^~>Rw&SAOoVSs|Y3y0zk6Dplx>(8It6sOc^ec5XcF$(o`hXuPCLtnORa{{=gq+ zrz>pb^eg;TUeGUFriIm#LT`>SA{dYqOS#M3>*zk$MT`5;U2keVATxI|?bv<+N`r~9 zJB}NT5sKts)tO5~${CU`D_Uf7=JA1-{XVHZiJB`TZE8mof>=xC2WvKNbcN%bqDNG0 z*&z%Jjr5xkt}D_V*Cm9EBr9YEf@Hcb1$p_~np)zcQmBET=$4eG$jEvCN%uobW7qk! z_KBBi3b-zg?a-J$&;HUprk-{r8U6CnGecCj$GG-yFR*@dl`Tuy$Icn=zvhPv&?N;c zVUTEz(XgYQip3k)yt4{ff_}1wP{77TMi4;8r+CT~*R)7F7N(*QQdP8ljEkghN}7F< zavfS68$S{ml8i3E@$wQ~*>$A>sKg}A*S@X(J0#6-#Pp=EK5k?bG{iB64}4H^TqVo) zDq!u;P+0W^8FK23@)4232hCK>YHMqn_u0zL#|6vxsKv)0!N4)4|27?KcLd)LcRuuz zzhBD1r}}VhgF4%w;DnhB_~s;}r1Q4DqkdBBlZ*1DlmV*JiVP zm~+nkCRzP*(1SjfuinnZSKLc$TLQ;%`KYpnH+S#lmB+6kKPQ4~+1N>wXmykio_d?* z8#XdKYap8D^HL0D30dNp707F4l4+; z^~SjzGdhnqH#TtHiNpELOIx^mk*C~z;(|&1;+Uaa{LelMCi0u(hw-&>aLmJ%DYb* zTyXRM94YhM%LyKSB8DtOFd(sKufy=6Dhr=0pr+R0>F49@t#P>e25+47=)JiV6)2p2 zNh2SxGMPLPj)Gq&%dmhA6*>gd*2T6?guG;ePavxxe8gCGCOuz^e<9*<>@>u3;zCCjMi4S zvu%I8Ih(Pgv|h*9U4eZlh$jRed}Q=ctsDrWM`{QG4NVSnXZg75+9=IYmz->w#YXx(Rqe2HwaJ|~WwU-$S3=0b zcT(K^yRI?qw~h^P?xjs^-e&bkefpe;;2HTg;-xM1g%t2}JinRSfHS}7&b~%(Ql=U> zAJ0*_lQeK`c<%d6)NQml=B7-PZZ~p%nZ^|xirDy462}mf&h|0rus&@7d!c@_#nWds zQM0zs;v^f`|4ncxC;+~L7Yuy^ubzAdRNz#g1lR+-0CY6Mk7rsm5-;Ms5?Iphx8KAo zMH>R<0Ivb-fGNO{KpO`y-yNju{Q7}&@pAG`19I`yCd<>`pAC!ws(?%Iu1$Tq?Z@Gz zG_6Sg>%bZ5c8>$b1CQV-h*qXQj{-KP+dd$@z6(4_7pW3RZ+}Gk+F7@Yq5 z61)fY1-$g7?r&=i?>rBp_j#Uxca1851$gKBNj&w<*Z42Q6VE1?K3QkVM4gjP2=K_0 zG4B3D_5pvBlP$Aget_5BOmg+lBD}gV$(WH^4??B`nzsKJ?2ZbXWuKV*>)|~5_fz=I zO)dQPs!aL}HsVECMhyGHFS0KTGX-k5Lz84sG^pC{a3H7Kk6tudc5fEf(INhb47h`F z3knZqpIJfgI8#<{uYmqpeg3bf9m6mvDJj|iMkLRm6j`FhHmOJAn3HGV%k6rXwa1d&bKk49w01?iOw(p> zO|!W9?&qajes@mia#>LrI&%!)Jgb$3e|w2c*C8w`$igAn8b!^A5r+?F$I>07@&e@K zkKq01U!icqU;^h%BvoOcm#Q?pxRRYKD=8KVrf~UKq{I(`PM?VVBU0z#JY%L)yugcw-B+?C@3cR%~wH{w=m-fu2H*L8NOyj#AFmetE=?-G14 z?(lJ`b1yhH6m4&(cH<@z@i><2uzu;gQnf4=*pZAAF1_>{&6-aSZEJ5~tm}ZJdD0h2 z&?szzrMb+x{VamnT@w@`1Sfvy_pDi8A(BZ`0;sHN5O2S~Mq2vztz_kS5yqV2e6k1R z^2E+ss>++mkR>vO@KRgcF4JXHuTqdCNnSx4+otKQ-82R2aS|!4@&>RSA_DrwED~)A z`l~KgyDMm{-pc?@1H;8_Pm=F~2n2$)TlTbPI}SpXrQq05UNEE+5g?aJ%1GO$!I7wV zZw)0aaazg-(Nx#yvm09&ZaWmVIS5@L%M}y~k)!7Xm||I2jV}SX2T99f#3Ij*g_1!N1e#bk;jkuS7@w#{{v2|-T6 z#y`r>_z!cavTc&>&bXXNFxVD}pr-^V-Vjj^XP^W#dspx2e16iUlNA}^xYWrmO=(i5 z^wb#)J99RYEKyz4%&8aON;KMz;|di}pI^ArU9)+&{Qj#qp`}ZD4>=OXpEQHlZ+wPN zR&HRD2%_o=fs7!sIBt7XjQ4FBM1XHBh^YwQ-&7xNDoH*8kr8#(Vc zZQq+QFq}iuNYEb87<1Y*Dpplux$SEw9XE4T(~51^SR1wy>KH;wG99Jf?L?H654 z{4?w3VH353=f~^=A;2~Tp{&nGAbb^AzsX|FheeDo(`apTDIH(U(iH}?XZpD2%1rM3 zOB?UJSkSrteGkVd-)XbulYaPo60L166K2(N%HkB?nCt1sR2$0Ws|?nx z>$&Xiza6}oPx(%pJ8#P7r1=31LooMS_5AVPc7FHEOzyZbi|=37)T3=*1>Sxy$@D2Y zS(yiyp0vkY?)qyx`FS!!N>nsWA~PcM;WC4hPYCeAM+P_jCX<4Eg~dx#oON1|4?Z%O zI#KVX>iPb6!`%J1HZJ&Hn8*JW=k$|;1iC4wg@6FcKsCSGdQWZBf$S`qU_hd}#`!X& z%x{1~;4=Eo`sl!$c=PNt@H}AqW<9^gLD3iO`WkRK@VD*@g@6xkZ)3|FNlv{#r_;23c27=q_n^9hidZtF9^LwID%#RqBM>3C$! zQoIsl4*=f<)~DOBDBX?^)7$Ux$;nRtJw1JFFX6dhzYhF?uC%7>(%Y#7cBGH>I=u5) zo?iA89;>+^y{(ye5Ut(+wj3Ltzbl#5P-S}+ zD-;ce&gv{l+ZQGbjBv^9L4G5`MMadX zpvG}y@_BP(16e_hQzjOX9sB}=05dU!K4v!Yc%0naz9UnCK!6)=xPg~nez}vBS-pBS z7hilaLxv1t=gyrJ6%{dc>QpK#d#h^iSiE$k>-K$a|8(BXhtzD_cBJ<|T;FTCtSF2< zX*!KBeoCySjzUSrm1Pq7*$g>i3gx?Mc?>+`d6;aYZlx|tJx zxxg7YbzDQ^imgSWsTEn%m^X5iJ$cUT=WBN~pZLP^HIZ|^eT04Vne*G;yZ?n8x4sQ2 z?Ew;2RQ#@B``Yzvs@Ng5`P8veVgBfu$4*@_^eAzBs>wfpf!4l1Gp}xsWFOkA8NhEEXs+~LVrA$UC65E!pq_v@*iN%9x+1pIK zrj=7oF(k0c{d|cQRa&~)?h7Gk0X^!Db*(57l z2vk)w+f_(38rO^&*k8(*HR`t2Vb(M=R#H(~W0=vM93lIO)FrXD)-X5_rc4V;dzXKj zU6_}{s4-(bkC6>)p|ueu7(uuWPP`S;X-O!ur!F(B9tOY$F7?=$5g#;zFC*NkG`s5B zM~Sw?y1Z%t!?5Ja-Ss^5k5~D@4^Qb-wghrRjQ!RWK3lhiR==Oo^N;#?#JnL(Fs%|J zWgolYfklx-MGeE}&s(EU@BfDG6D9GLd*+wF{85f#TV$pyN2P?zUdLqcyu%G&(w0*n zuhS4NBH&}>8S_%wh}=b5FyOW>-a2p7OCN@C1OiEwBq0gFuc+vXiXy962yEM8V08oL zvNeH}KQ!4VbO=OnlD%yVT?7fgM4=mE!_v=AeDk%1!%sc`r0H3CnTce(YXm}iysD|@ z!mN_)Sk|z!FMD=)*)n09$A--$t*(O<2w75Gt8CrVI%N3#!4u`6{AVXS6Q>(7qU7cS z0yi2(*d|T3Nu^|S=D9}`F6iV(s zKU>{Ic0(PqqJa>&jzv|-PcVD`UXuWG=FFj_q=cJpx``7`IN^Znc1JRqyaq2g+yyf} z{7`;-=CuA~2Q}90X{CRb_io?Y(&ZtuCz>KJtm9K^kRzOH@Ak z*yto>zIAM%lYHsG3CHwab}$sC$8zAMBAxf$5KlfE=Xbw6@O}AZ@bVkU&VB9=*WcR8 z^|yL`!MM>H&p(#mnbvjW;XXe2D8(^H`&qZqV#ZV-`FRR|y5A$AKKLlbQL}rW+xg%0 z^Mfmz*}lW((WhcOc3&=)d%6^#wk@zM(Q7QN>k=tr|0HU2)SZMk|LhAA-kfk9UZ%#u za4p`v^#f=DeJjA>muE0+ zp8tT=nYts<!q_#!+a>c#ZG4!jHenJ!WWJXOchbWI>Or}uY%`tudQjL+HT2k^Xbpi4dTA>OsP z2#-K|CjI@Bz~6yic5CA+csYL^N|#MQSLoKmr+CCk$1z+B48 z$+jIf-8k`LDvy#98ohsjxAXl-)|_`Pn(@AslFp9iiBk3AjZ+FxW6ZSj8l ztz!c`@?^XhDYId-#mQ$k^58u=ov!%@Lr%8*4zPOP<%&ufaPsGA>w+Ko+470S#p9aE z>8Ie@f|4;R;R8g;UcE1osN8BlOGinB%pEH11t8soyw*pmp!$fXD^vTMPq`ZOdl(DwlHqMp_BAoJJnj~V}PKl z>dAQhbr1M_KJL2fE}EK}xZ{ql_ww4cYkBn1M|t$oN2#i+B0D>qb?eq4_mNmVX+Xcm z;+9xm1PN912A|E2O@ksBGj{@k!mixz#-=u2e04dAWN&3>PIlkN>!woVpplzfNKxqk zd=tl_mkdJ9(?2Wr`O0S=IqUSY!^)5&D)~c7$%Wkp!Wi$SJ^LCca9`*3{r#}6& zDSHZ}y;h1!MKF2NL{6GJYiaJ>fe);E=)K3K&AXU_PSABo8-E}Pu>1=L`Z&CgMW9pC!|FH03ZNKL_t&q6J;Mw ztG1Trw6rnQm5FZJ%01t`i5z4yWFOo9`U08+#i~w7R`IJYMoW9A=gxpgK5Bg{B9>%~ z9-{h_o#>{;07*lX??FPMP*(A~4o$DF(nqxzBwOO_yzOaZ0izTR>8ba~NVXGjq3ZP& z$}ly6FWy3I>u#?UbbdZV>QneJnCj0&Ye`Z6=6Vz)j?62ia@|JMU?%xlxk$kvw0jd# zyFH3!S)R8{ho`SBdCC~*LCT~g*z1~vbF*MqPp^hgKih%h^zOgoNt3tUUdP3kEI?7a zhNW4>x#$6%Xe8t~s`BTS?ap}(Ez!v%jx4()FuvqB(bky1-=)(;`O>v>BH06S{IkdY zL0_`*y5{P-NCzpSyD)0bY%&)dzSCU3(YI%%7?NiRB2y+}XBGPDcDK&Y8SNwguwjz3 zXeCNZI}-RTe?T&Q8cr%jGHqJi(L>5W>$(l(`9moF420A7cvcdgQb*CX=%f>7t{+@d zTANi`_-Vz$56=%duG3Q0di{vwM?c}Vics}a59BSm=5|8>d)gYj``7fvQ}NadkNEMC zFNvg>Xf!(c!lxri5|ZWz+d!B$zS92Kst-HbjOCb=O&-U<>7$Xl^?6Or?U<(3XFDz1 z;q|va?Y>B%M~ZzBLGvDgCs#fS9*~$L0#!wrvpY>9n$FG~rIN{KEnUYZ|j_o~K>z7#U-R>}K(xC;U9E;&VpG4N@5IT{O(R-3_ zn)}~CeS?c4OMKcb`(egZor&YRjyX4{_qoi?Irt<}>=UoqSFMtrDbxG~0%3;=$AQ=1 zPIBWl2PS>4{#k@y{xpK$FLjPvJ1}>a=PR@P6N3q3H3EK#(PbLVQHR}CHXp6%=_k_x zU6(lPv>-pcvKd*Hm^sZy<({r*Qqv^za(f=XWqH-H`W5c~-c1>z6ffK1K)8ZKbCFt& zH+Mb-m5pSi=7&qzrhI?It`@pjX&)^J_^qzm_C(pu+HD0+bxCQ#4K| zlrIy=l5tEys#Vam!=m~#i;53Y?0Db6Ilu#rMqtU-K_h=6ySH= zJ}<(1XvP8^h6{bAP%ZBEcX|5X-t^}<9x2ivkCX`mKf&`DD#cU9d>%G)YPt;_VFv?G zy)>1siPuWH(w$PkF1*rfU*o?Fk31PekzvZ*u0gtK3Lbefc2H7g)n_IX#(G`Q#Bn;$ zzL+4M5S_-q2g9PpDXME7esz5dzq;PbF&4smY5nE)Y$6%n%YE}Ui*KG>&mVr9$$4k> zZEW5bCXCfydGABxulp_!WXPxSIY}AaFY()FBGm73i8Z?vk5ssLe3bsf`hKyd5`q=4 zn(sPhIVRN6~$&$oF=T2ZmVTgHmub?H-_dvb_4}Y|W zf3L1#a9)t=7K0xjRf;a$8H#D1+!ZdqM)E|8C zL7si~S&E8^sH&>s>Z`A&y}h?2dfv!kwbM6O<_$z87z`jBmm0@pt(#=hw9!mG>xj;E zU03kQr`y@Sqq@g7{5~yp=>^C3l3dv-la0?T=d;>9lx5^lUDt&B!3vz=)eJj!a(3>d zoR%Y#vxqg;vh2P$sj8@^!f}`|a3B+o8D(#Ja&<}bx}C$@qOI8Jk+ddBQijuhMxeE* zG&hoQPvNjZt1a94Rn6WS0&ONL5>m*AR*;9~x+EH+96n=0L+0^AA9JPDecM0Wxgffv z_4Yj*Dm6owiTHgq)YTIj-T#8t#zySg78JjZ8VTapgUGUi3P^?nNef9;P=$)IJL&A) zy!EblQ+!5lRF?ya#?f=;5<04^(RX;!wY%ThcDY^GB8{4JB>s^@m^&BAH0w0LzyxMF)bCLVrm`(Nr>!2ndBXS?(-vUKGwI(^UvIw9#hT zB!B^}?UGMXIh-&G5{e|D$R6RRNeU_gBpD$|RN9tT+89rb5zzw()4+{IDO7ZPDFYz{ zQXovbY0&1{Ua4@$A*a5TEX%kxCk{To3W;WFjI)eT2i)y-Q>l1L@WmCKEpsoL3EaO?i$w# zA&4W;_1AQ~S~uYNqVWK`)GVVDGTKUy#gtF0clJ&L(kLCeiT zEgV9DHUu+6#x@M}VAs2K()c0x{W>Y5cUvPNKTBV}k#K(Jgj3YkM1NBM-lp64Jo$cb zd`2Fctl*~WE&tI@9?;G6j5E%lwY8P8W5+Uf>{!N+A5SP0;*?WP;l20XqqTMa#Zmo! z|F>hY*rJ{bGv2`)_x8ev+nYG!0gq6Mc6(RVwHYX~M8vPsn)FDW+>lPna{GLz)wO#m zuQ?%|+P03rz5BJc)#$bUL80g{`h+Gvef&G5;;R$wg4h3^TsZxBea4{#vd0~%G44oj z|My)HN2`yCQg&pxULMhsKwU!-vBbyMJJ-`5){k|ELB*43xDF6`dZlNZ=iW%n2dZr)}wq|`esRh8HePx^(ibcMm7f$Bla zZ2SGveyesKHQUFPzm4+J>q+Ju;SCui31-jqbJt(nv1~YeM&H4}?|(PMq$6v4`X6?~ z#Bn;yKQUNvy!XtnSY;CMON{x9&gNh18^{ToPrmuPvK=y zd=Wp=|GG-Q2YWF8f#*H)FFaq6UTCdySoLs>RS$pZwmgNGzVbQh&+Qi$J!SAF&_UJe zbW|tlfgt_7OE9`F-1l%hiAKWYx~k?90<1RWkZtMe&qFXO#AVB*A@Wk7M$nOpd;L zd5=ME2WAb+p|UB-o@kduxix9?*`78EBR(#fJ%}rx-}FVBa8RhK$}P9tLLd;}r$7B^ zFaMYhw6wI)($d1_(o1`-Ba8I3QkFU=?1hStqNK@3&%8(3+)-ro^X?m2 zmU#N1D>>u5+h}P^V3{_msyOGKd6c@~_@0hGLI~Erv5Hq;Sj=G8CDGPOvb_xf7`rP8 z^$QI$^g$PHec?kIHf^Oc6~~WE!LU+>oH~`g6}9Th*B76@rKTFq70jAAiAG&x&FW7n zu~X8(uzz}u+C0@)6lja>O@(%C+fI&|E^jL&jIBF};^5?E8xup05e1FS0skn6J zkTVKvOs!;C2~}0Qc;}yQQ)U_TpH)z_x3-pe`JQy8T(8KqlrEdAC*9 zw_Uhm;|8kR+L)|`$<}mAiwEPY%Kk(*axc&CpFce)RZ&%4OR9D+{f)tF-(G_jbM=h2 z#E+tz%QM0P3Q>_Hw_A;5K$7qqE_*-Q&4{BWBdJ{j_LJt%;LSy=iN$-qI#fmG%u|lw zPj_?${an-L`RktMNB?@;d#MNkisGf*NZ?2kVM!$qP$U^$l5vD!h#myRJAOx&yn^7i zL%nU|0+K9~;R}%y$i%QxG_*C4a%{3>l>*(5A_N!)=n7IdVnR|huUw^YNVyJi+v+^* z0!>FwwqxT}G7_#!X4)6UO__vk&}4-s9AqJIlC2&OV%Y>V6-iNWT?mbw^n zK(Z~cEf6k_nMBcp$a)ahHlQ_%5CZ?;VjRDQ-Ozv&i+R^xOZUsV+UYMt2jMD9U8zjn zNEux~1~OHN-s9yHkDJCLPb?yt>e;VE!hRMUKL%-^0yT+-IF4cCLvrPmRWbUs3GKzR zhGb~jdWKRTM>B0yU0F8l$g*0Z$|=$SWu)uV9fY99OfgjUA;l9kFaCr^C2HmfUFAMl^XcRjE_6`bV-tZN~50>sknex=qZ4 zi__GA)7p%rC7-kk9)d}lR@WLKXV4*A6|E}AX%FD*n? zJC8%kkOQ|iZv8M&q-kVJ-hN1LOLGoP`q$LdP*qjM^yyx|*uQ^&d_Eu3r%z|aiWLVW zWn@{7(aXO=-mg@~azvl+sfxw~F~eqBX%>q%d*;;BO0(F|hhaT<=J!?66w^vG*;M1L zGktIt)h#KS6JKOV4~#x8mtD)RX76X;1lU_Hu6q9&BZg_ciaHz! z)2I0O@h_viza+)zGL5_b*4|4YZQ1b4-$l9YhHN%%vAFl4cK-e+ZyGnaM5VFW<&Afe z6y_^^R$l^m^W7Bf?Ov6s&(@nf_fmp!V>Ct%@7>l{7A86gk1vXGqjj>gWd8AZj935F zWnz5f;XbauzJ+O%^!)}KCyvt*(LSf)0Q}(lVJ^D7nWK;NGiac~FMrp3F^?9sB!F!NpV3 z%)m<@0#B)vjdyHc6=ve8an__i@5_3c9Qgj(1e~?cvcvJreh&pIUJ6|+U1ZqT_*8o~6qTrcUxoG%i}4VpN&di0%G+nQWHU1YtNO0f%oyum+X`nhAjO#4os+>c9U4`R)pR-V3S za_90#m+#@pk3CV{6BkV4u6K6um-oHhK6}X&8rludh-yM13pdpB)F*rU*!ow4GtM}J zIdkT)e*Jpxyz|b^l^H9(m*u*01mF`vP=TW)T8x z2U(HHS2U{X+j#KOzcT0CBPkp{fM76#JWc1l$9~JY&AVxAYEKQzFZgh9enGr_Wpl_? z#ZX5QLu1iaHh;Q~rLQidz!H=w0kRbhpY0-a4ONoJEN_+?Dx)}SHc=$Wl*(PEMZ(^xyDg*lGa?1@}uXP~=m21kW*t8RgE?*pwPy!i9ii$rFqa zgsOn5pe(FK2tm%&Nr?30Ch%?x880ePswxPdiW$(U-nNtImR-maWM^bhADC&mt?phHb0tKd2a(?ZMdhZB$C8gcCQC?a5^h9W2#Svc)c?AB&dTa$zb4J1%f?3KD! zWVE#cqK){bO(ft8;KmZj8`eX#!Be&L@n#OVP^S3V-V{$?i>{Tf{l&NWVCe=bch`4b zzet9kG5W}4Jf^e+RHn|Dh_BhCaZ5QhMvOwAUK<)RaBF;B1!i>h zp;S8`|Klx!`4Ni74FQQ-32Dc@cm06h-Td^>7hYLjU^|W+^lSY3vSX!FPM(9TDh}|W z5MrCtZe6hZ^{wIf<{k7`eIA+E0|(B5dE<>Yc;k&XIzOLy;)z^%;f4JA*Iy=6;qxJ3 zIz07BH8(COV^d9x+>pjk=MCnD*S2-8bJIy>G{-Ien6A$B_ochJ`nX{%EpNsZaLw_< z`1{h`pDX332P7HB%%4VE&9`W;d#z!&z4W~&jg_-c)sNMDeNUxoD;##LwHY--Ls4P- z8k<+|Pjcd=Uycws7*ti_8*}}gWtWQwC`=mPGZ-{wqRxQ+9x*p*yw3GkXL8qH+c8YR zqxa@Ad4kT{FBWk9t*u;jZ40UbQzz-%cD+X;jvTHL4D>wik;AoKX+Gn}Xxw~l78m}c z8PgP8eMN)|&k6TP#Ti|uQBtf@Hno~iNaEUGWOn+!6c13i_s(qYe>g@mCH7l=>6sVe zR8>0+9jvlvufv0n#klaCaG#{i%Wouk{;|AX%lAD$9crDvAj@#cd0|$4W-@bnR}B4| zNBMc}Egz>Z=vhIuY`97y(f7?)R3LLiH&xAP3xd?vJ6v>mGx3DWsV4^c+z23%lPo@i`96?p2T~AezMQ^Yw&z;8u1iG`;sjW;hpyf@W`r@@l2QZXDYQX zrr;@*isg?z+E+q?A*Cu4#_H@Fgq$%| zr+jsPUVAIamTfi}VTt?h>=j>Ojg6Jbr&}pN76aydcb&ks6Kzx80D{x$plZG#?!I zeXlLYU(nU2tU_-fR5V248|V0G*yEC4EOXB9f)thZEgpO3w&ad&tE`UxDM;qP^T`=} z&~Vf(3(ILs^&NFvxvQ0LKlo{{9!m@x<;_}R~XwqHU<>X2!4OsHfDVOV514nt&}n#LIK z{COcn{OAD}>j*BcDG{>O5r5!h#V6dbyTn*4)^P{;Uy&G?` zYi`*|#CGxNK{Uxrb1_pX_Pn`-rJGh`sW8}8N$qJyOQa}&{R5OG0g9X2klT|px7@q1 zOvuEnq*EZbv@ul+lPwf5Y;XmNER&;Yn3kbrZrOe8CQUllkYzMkB3qKkmsLWNOfa6r z4h12tQBftCT+vsB9m$(us49}?d9r{2SAZ-b$uh!q$c)7aw+UR&Oaq~69%&$8un2;1 zQ7s4E5#A}6I(OZnlj5 zOpcy2o+~a}fX~-;>o--_^2(oIBCp9KSXHmI62cVJ$D_Eei))&gduu%%zAPbZ8zBVN zo?4Hi16RUP zkw_q1!EP(%MI1DpfFz?z5-H)LOA<0&_aTzxo!^ct;L|8nBphU~5{?kwD8J)!Nm37G zj^Yb@=_Zc^?;NZQgV5 z);D46K13pg=uoB^c9)W-=bgepStk_t`iQ#CduX58L?DoXrm8G{=?}d0=Eq!m<$d%k z%;GP9IFBP{jz>{cT*F0JF0tk)>t9{T@^_b$DI|uYg);LCe%AQ%rm3-yHxh1a!*Bc_ z_Rc%ZuBu-DpS5;5b$ZE6dPqn@?}QrKMG&zeHl$osYOXGgWHbxGP1!dwiT5f)jY$3;- z3(ssyc4mL>YA40^_IFoi3iJX}iYm+ZBf|I1eE<~FDWoPE7KjBs!Bf%>+gzCl;*JX{ zMA#9u3WxnqN+nGp=$+lffM_&HSjeJ9$Sh$q(A7t#EjTf1*+lY!#>z%wNP-ockYT{$ zcokw-w<~*d=SQ75kr2?DFh7X$CN`e6gG5e?<>Cd*KPdrv8JK<$%sAV8w2pI zzieSfnafLGIT?Uot=z>G_ilM*J30T@3O4@rze#ue8PGe{dmq2&7x_ou`tjI=rTSXK z-9OFq{f`Xddz!jA7H54h$~m8WZAqDALX1i)dh?mFaf4jn`TFS6nNMF@#-}eG?WcC^ zQ4#LDZQ{YKPknT}_u53$CR_JdT=q%h-!c(Ca6ys}T(Eo9^R+*knj^!;%|5ZH80C#K z5x)D4J(D0;d})07(f&)E36r8ee#zv=fAR^@aqZemKUl`4AAA{pey=Vz0YAj_|NaZO zYRr5G<5yaS@fe+4HurxJds|odA||$ZA*MtAZYD5b+zs*=Uz6Wr2$7eYuCzNeVa$6U zz?9yEm{{riiu2PLUz5*bYU#FM*t}9b+hrKj-cMm_>CVO6IHhmyKVsskN8;NU;_4#I z4R$f+{7hEw_BV!oda@W5(nt;d^JA9%4Wm^sw_#+67hrDepJK?Z5`G129<$A{)7E2* zfk)!!m}Dj}=1!Mk9<0rn>we*g&wd|6$n48-+0-3S9JM#+;mG1TK3ZJI5e!QzpJdq2 zriAN89A_)$ykwZhKQ)d#Z1NY`$dQ<{PM>5AwJZHQDLqfM3%|LY~ULJ_4=qg^iSgxZ^^13ae{?dJTj^$gaVfNT6z>3T!80lof@H zi6)jNo;M*ROBc+i>SJey&Vu@!-|u^Uo7!d9a~mRE&##Gwy(yuU!p;`ZUa(O}v2?=T zR*6&y6@(r-v=C7jLXFN9iYYuUNP&w$D>ZC3U|Gg5W`u%TE8lcnwK6AO6}?`H_~dw7sh*b)apEMY1if=nMsT|B475-?#@LfQ||+B}omvT578 zmAX0ekX8icYH%HNA&1K5aO-MO*#h(WH0gYfOun0bAP~?qVAkPn*nn@FF(;j!U<_@P zB1qvXs412^t^EC?sOPs*x2T%(+9dJH1dYPM5`xBfjO31fUf8yRFbwJM>Z7xxgPrSJ z7#z&8L`InJmNP%&Te+uJzlr8QXtn&G&$7 zMXg$`6cq>Wry6I~_gF{H+H6MPt_8a3=&C#=zBq=Nsj>DYtIvh7Xjs)6U zQf9@96|7jXVlS84Gk#c9YfgrAKH&Ucuj2e)ubOcFfBt^msQuhuRa z9Qw|~Nw>V8-sWGWy4dp6J>DayUle^$e2kGUK;u3Z-~7vKmmoBay~mP$9o9TPZFjjB z_%bG8_i{|t$zO}p9ZdiK7)-zQw!h2X{R89WnmujBob)eajA55!N@(T+)fnFp4fJA^ z9NRI=hHqw0ZhDnzDMe%2%WyWHpDR5?j&puiF zDdCz4*6~2`XChoZg=sGqe@5avBmVAVyesxd`Bw6w;Eyt1UWw9g*vwTHMvE2vM{Q zDMj`g;z5CwBwU-Mlmr3_0z$0`wJGNb8J`9LrjKk3fg=o|BTJom*FlxmohzUn3*k7X z1f*ELBQffU3dc5OGhSdkJ3>GW$x6UiMRflj4P8wg9AU+np@caaDZq9q8s-!U3<;6=@O}wX!q%V!)xsu} z!{tj^3BC|iVi6M(%O2f{*6EBPU!)=Sg8m+KcL)U!gfw0sN|W(C+C_+6TS;V2J(-F) zL@W{!mkJ-e9X)hz*-5?S4EgztxLeU$6J}G!WH$_rI!21okt#}?vL?sI&*f>88WH&9 z*S&-zB?{=5;7cgmxs%HJMl2bDSOsO4MOhF)r~yrtFyAL4Q3j4{PKaOZoI92w;{*ub zG$nPY%zY^hK?$%>M3~W%CfhPVN^AV$^P@sV@2)N$`Ncg5z(QanaD-sKkW|@aR5>p7 zP7J(|;Kj{EBMDUKqr5Cyhsb!0yyugBb`3U$)Jj%10-ByDpU2Xgnb9)ji%oRx>O|I* zQ==_nl~pX7IhVe!Ub^r38~v6;T{MXut1#py;FPdGurErTZoPj4!72XhE%8G>v#R7IGbfV9@;90%E6tVjas#sN*}Wzl{CtreoA;uEsy zH55!aJ|`k1M?}k69IvDgNT~o{D?+VMzGnzOVPQ!dDFjkL3_+!kR7sn-v~ir+&~q+b z)2uh=eoDJAjS^-oiBYxB$LMYTE#R+x%>Tsg-^(6z{udMT|K7Xy&xj)qb@}3Fre=CP zjlT;9G5znSF~K)iV{A7*4jhFEefi|yZSVep@roU|F^Yy;UWN5cV;a-=C&Y?p3x9d~ z{GNX~7xbwjn-vq9nR)4O#jie>xoo0&uM}QRZ2{_wKXJOZe2;s-GW-F{Ng+f@eJ2UL zy-7~{`#^;gnh^H%^xWRl)3a`(d9M(%e$h#%0>zkQMwFTegkyY6943e#+zoW7(0+i3 zj4tgEQ5S;Hc!Ah9+V^2hEGvG1meLrWy0+;M1x2-l6o!n^z{ms@KNu!LM)cv!kTh*? zV%L^!70+4TTV@?~l=FdQZ@GWX1FJ77bIZPT;D4Uww0HI%>vavH3aSGk5GD1>NHRcJ zqy0_*6bQ#Qo$%8BsR?>&wox9HI{D@V8O05jJAB@yZKf%0{uUA&n4vV~TF`DmLE59} zB0aKa7yvmr$6)w zD-#@c**R1lItO9NA!B7UWM4?J>dNcLb`Fq?MU7gPfl*)wK+*hMc zZ|R;AWTj+K`!phPbnzNllC&f6f`GDIj-b62>BbR_^~931kt57@oz<&gpojPYOGze; zEZ$we4thIr_gzFZo+QlW5L@!Y_hQ6_P$7zBW1|ycQ8bAch7?pdq%adexwJXhN#JRX z)C!@&v25m-)e?!skwTi1E&)nPV@}|@;JQQNtE7e`+89%7^Bb+Ha*Rq!1s;C7oA{uH zHkW)&HEvxEmGkFP*4T*OH;BmO5eNbu4smvNMdYCNut2zSYniy`g)jAO-KqM$yhEU5 zLm;TbW`^w&nbrPDbcFv4`Z&K@`lC1uax_+rKH-9QX>R1S}JSMsK6)8_G2fi zjgqazOODv6MicsZq#eN;wX8=p3`xjvprtpxMeA3OqS0Cl-}lEeSgFrD&~@CTSGi~r{31>*e6^i)Ghgk^1wkOXvxDnr!ie;rV#!K8GHl!_C7vbew*=a< zsJ0xU(jp@uT`U`^4vQ~S6&l5aZ5x7P1cVT1DNV;%t6{~+NGMYhG^8%k+WeIKLTt;B zI%E5L(kiM>tfAwOT2m=3n!_AYKvXLiMYVLSSYgn&((QwvPP@@3Y_E?nRDB4cG+Ls3 zkj@C79gCq*JSo7j5wD41zNj0k*NyTGQFtfs9A6V#V~Mh#>6ihjb39lu4$FMG?LISbb@P@0(+dxBW;Ox9ca#xcT!l@E_S7Zop2GZz)IRkAsJL5i7-T17PyX4SLKT5*)`2J zfj|d7T06t{Nh$hUgI!)jt?N+H+l5Z0%|6B=#OBWDfVxV&j$VSc7F51~%I6W;6rocj zJRIW%6sAp^-Rth7koCZlghkU=?FhoqN9XhCz#o2obn)sG$ssFH)GC2+qv&j*cn?`f zATA_}WdwqdFjN#IU^zr%F|5iYBH|!y8(CA1Oh!$dc)kFAnIZ{jJdLO>L&T$~u0B*M zhYCXQe8N-)H86nIAwrroF`Z76?;pUKQIC~~5t&g*;D`AAgXmP&oNtLzQpx~RriS4k>1kT@DsJbsfuH#^y*nQVSg;@SViopq99%ij z$eCcD2@nRTrk8>TCtlGjgCoUcwPGDDt-(VbouQg!{xtp%!7Hf8UgJ$X3mlB8rYXY& z2erP&+x(}-G$}KUX-wl4p)4--q6N;&j$!_1M{E*18tLGi{O(BQ!b4u)uh}ckORZ|% zqJC=ri_T-t;b(I2TX!ED@Q;9W$2Qu=3t}9{(a~u1RlmP{-$%+K*&s>;2&VHY1R@s0 zT{I7S-Ym)zacW%C!S_6$f*)Y3fC}FOKfnqVPNF>;#HrsJjpuv~P(H`(w0L}3PENMTZfR*JIP3JyDAIY&3v7h>_UKO?U#{Hd5}o)OrCrTP$hP%9Ntn5#u#PasLbc(7mGz-f-DnsLVXq#*&h_A0VVe zrTPd5MtWZfa+bgo#j3ZVyRJy0YJnw8`CuYYSX!e?&yN6MTSYC6L{^mJ?`o#7Ic>;O z*T$)@$E~d*YYQAdhW6Q!Q6$Q0Yi1mD_JP+_)K-6|?Z)Tg9Rs};f$dmj$ILw@Qcwqq z?R{WJP-96M9TH^wN0XJ(M%t00=M$*>h*DE+lu(9TEt&=g1zs73nOosR5yfqXQlcXf zv=FFb?7ffzp$!R&v=GuZzDDs1RN$dUrArB35U}&5_5*5bYrppjcXAYzQVb3bZe?u8 zt+Mf>9QWa)Ud?U2CV1qUv+3P=1Q2XrPk8o+>_raBQfr8=o4|))CU$7UH^Q zePj3U)j~d_>DXcXAQ~1(BC+w?>1|W=b|~uSNXlz=e;!6+)nEP0t_|VUlwt^H?DKsN zd*|$tpJ^zM5O>Y-ccwiC3!?`*r4THtkCTkpH23A{Oi!(IFtajB5b6m(?^uEZW|rXv zn)U7JSL{g;kH?ukdp1%^Iy*b*?HzAkoJb^?J9jSq{r$AHwN1PtOPXB~BPu|I04It& zYc>OpWZU|+G_|(U+1JN_R~S-hAOxNe2sDn;L=eO*n^|^@*_KNKlBAHxqG>CbQDz|} zDw~I>Tl5VnZZ}sPB_FARDUGa`R1gypG9`6_@<6&pvtQ6bh_hrKb!Q*c9>l`m3aw+Q z?(7$H-RYCp{Qik0&pi6PJXl6>wMKh7?<*BV5KhV0WgG-X$y4wl;+Vg)ySX=liO8b~ z;0F*Ek5gEni{(;EKs1K1E#t|8Q5%i24cD4lOOOy6Tbnp-siD_0{y(+akT4O;q9UFE zT`YSlnmSiRW0Yxy5E4g7LNp7V_z0d!kN(>lacznrRKj(J%9HRzupLCykP_N25)ue- zBa~Y*42V#Ql*eWa;b9Qm!E?1iO@n@(Rq$<#Fj_hrk5-~&4j37S2l;eqb)ch6#9V(*^0)*D)S{1!l zVhV=7DvR#OVr1P-=^PaI&&(Na;`(7oYkvocR4+A=s5y0LR3=Md^HyZGf%u$R)J5hI zDzT$Kq`Gh6>>1^YDu4XM<$t+su(kKUq~{BnDKPNZD(t~54Q`wYIsRROu#j#HRTwPZ zrW!(@AoLMpC}V5PBF0BZ1s=k3UI8g1uo6|E0>XS68A&o&Sw=@~3=wf~6AA2?gX7vb zmW``5uCI_84{I=wQW{YR&;wb>R)3F)M1K!>o@UKUK8GLT zPWUP-K`FTI<_u3hTcEN+^5K6^?l#i8wC=B7Ilx!{rxJV2M{m6|i&F5ew~r5(xa%)D zRz5ZUnSTHKk}O_ibI$`g9(~-*ud0yLR7;Lq7GeJ-qp!tHw`N$qZZrw};eSuEVBU0h z{$BypS8*ECn8xddyZ(~n?dNy#pC2pZe=i>$ANZE{cCm9;KzW&@r7a{D6`Z;}%H?0I zV86w~FQ!yl@xf2@a@(J>Me;<_)Ew}M50~+k|DHUxU@)UudQ>a*brxHmpE>GfedYI3 zeEr)4>@(kHFr(@1Q~d1eYTkX$#K}!B7r(nQ%kAIKQQau<3sA^u{_B@z9D0f~>NB@p zonzhs7CYC4Tyj-{(=Qw!={*)&!R_DAu5H;8UJpRL{3sTla6I&I=cgde^4K;Ch9BQwe) z-26-n=lybY(#4V)N$&sDGSc~g@|aCiZ;m%!^EBy6V!8K(g$oyQ!womk+S-cedCZ$P zkGt-=i*J4FTSGo0C!TmBU;p~o*|~EkbLPz9{`>Fe$}6vAto?zILQ(Yd7$QidKm`Rh zZ{5gKnLfg*Bn|t{Z9YzGE13p&WE{iG$fP!C4 zSkgoDMwY9*ER0-MI>v)W2S(}O#vu_WjJPPrMpzcovP>zMTQteF9i(L$j}|GJJ=6!% zuz4+3btUl=jz(iT`l4kEGMONL{E4-mdG3WgFnpfp06 zzqK-kw%QB9^9cHTizQ0}5gDP7DHMt&M-hZ$qtMtIg6IxNS)F>V_WpQ3Gyl+n)h(E8X{$eSQ#nJ^$0=|N>GxQW4 zR;&y=9s}Dlgkd6zc5Oq9SY~+v5NfRFpND}SA`9jcjVBF{vNeR>PMkS&h*X+*S9_O) z&Q_eI3vrzU0&v<|pk)Wnj5?w-$A|?4uww&OJWg!M;+KElV2G6wS9|QtA=oGy2(g7A zs)jwJf}TEt{yxIi4tgy?V%{w5Ky~|tATq_xE$(efQDT)is6vpE^!jT*EO7%stqj3s~2h9+fT_b1V*< zTh8HgE9gvn{QlXgS5BOBSOfdkC;0aL+fY*-MW~o%QM=$h^ltlKAhm6Ec-bxA%ARuR zHOak6sil2;$cqpAWYe0)eJqYT)5UrndTZDGEX@H+ohgwr>(=|6@s3XVcFf-6XJ2o$ zb%Y#wN;`#)Ik@iR&&>aPt)JiDk>!8>vz(`&_c-SCc2=)!q@jKSqP2)eRu*_@MS;t| zIDX!}59SF1Js~Ocw@35*`TiW|ym{g_<-?B^xa-~=|9)PA?q0>Cj~DpFXZtwqq$oH2 zvWBvx`OdoYo*eBRA;%v5y5}NH<8{C^DKm{}OyhOKuWuOS>@#BA@cRr`ex(w}8U4ci z+@~w}^rdA40c_mj^X+R=9D8~PPdqSVh?sfDh27+Gnx?h0nAK=ro*kVb|NGXMw3s=qmCI`G}!m_2GuV~`4x35PE!PnlhnA<*b1hYT;AelnIdw=;nk8U;%+au>y z@c3s>;I7pjtk^tpl=j1$dbr`K7A`q)E>UN^s^>fB?#IKMdbsG?7l=BNm6sjQr%qeI z*Z;hEYA0;f5P{@WBUp=9y=39EZ<;{_|XO%{AP9`|UI~ zHge;QH}bc?{f(!e9_JemII-ODr9NV9)p9uyDO?PDboF_GT7q$v)Z| z;~6Bd=gwm3+&QRFkzKo%U?784>MWLiM@-p?9(mpcB$G+@n^BJ%$Re~vD@mXvT1X;! zqsGxvF{lG#mW^BV-7yBurkqJzwjq6ry~Dt^2y6#iN<^s~ZO}u`FyCdOIE*Z92k92W zokw0o0Z55-#*Va4&;g#HQ>@YGAVgZFVoCqB+E}vIBr#AMI+KF9Y^t5)(Yk4M*G7QrvoS_#;!~s zgMl|B=1Ji*Be1ECMCl1Ux^=)DH;Rpqm8dpkPUsuIAQh7Ha_lG!Qs>60wOq{Iz6WSU zHVk+u*H5!l%$YxznX?+Gm{UjA4|w#Y&4pdv{o>#Sv)mK*TYxPkVcy5m)pZ)eHX|L_@<*4%mNksLIu94}C8Xdj$1DRbzYa<04hP?8aw z?>?|?!V1huarA{t=-c&8x;9-3q&GYj{Jv>@__?|JO|2!d^~He8{%wGRPH?E3EBWh< zd2aq@mT&&0f{7xuUn`{2il*j}{T4es_;4N#9KXz^EGbb6Hf;6@LwN25^RC!;p-p+2 zdH-+U8L)bt&)nG-haNPnR%!1H$z(JQGb|o_I8Q^p#k{%JxM@rFwP|e+N2x@%?+l1W z1&uQ-vN_Gh%|3@5=Ekn zskV-gQ{LRk$3N4@bw3%-YIwt`F+Tra)9F+HikK#4rZJ6aye??(47vZIJe!}J$tiE{ z;O_f!y#4HnM-6P-yuhygQ4O26ba2IYQ(XVE8df|};Gq?HRk?K0$fW%f&Hg4|hO>fTPcfaNE^6 z@>xwZE_mpc0tX)NQ1YQU;&hj~*^EY8{fgaulUI$JNfJx3tu)VQz#TD6oyHF?c29AFfc$xg=t7FTegfyB*I;H-335f zTN@8Q{4j5N)0@VTGKgY(yA%gwTX*yLd^z3(EamZu$f0Nqk;YL!lEXir_Kbx-YeXLp6#);C#Ew;%Ab%>l%&zys2k%~jQ zCr#nSRyL>82qCCEV6LB?RpG@7D&GC<4iWUHs0@vvsg{yn9WYQ6BWhO=ZSST!Pz>mR zPDdac8nly$Q|L{J=I$<*9k+jK$@@+?eZ}|g*p%PaQWnV;D)JugKx1`v^sK`^EgxL< z#=)K2QNHp+ML4pvC1UPSIPS{f001BWNklStv&Hx(?+1ah+zZwIO$= zO3Gl$JCK%92H7@P#{4uVB$Zm=Xh;i9Va%|7LW6^Z5CY|s^*z!#P1drRZJXy!<@02l zcCph6@X!Qdh?mc?ZSw{sCXPAq3WORuw`@fVkh)0LU@ChoZ7Qmar->#f1+Lc2^Fk~) ziinx#(}qZy z6wsA5YL9{K+Zk-@9#5(%ML00P;Iq#gCnMW7enqAGr)1_7;KYRP=4tfoO^ z7e{adL(B;cqDa^|y28YhYlSGOmTU)EUq!?ZnUhKrEG>J|+uZXf5sB1BlaZy-&cf+h zDW@WCF>6j$R_y3cQ3xAEMG_(oR?qMNgH}EZ8l%iObYb9cAC%$7R#SLYJU^mnHm+hW zdLT{M)k8Xy=2@L%_P_1Vx#yiu<@|aq*XDtTUgSUi>t_t4GHw_u@zDCM-0Q{TU zu03I0>mVP#VKo5rYGQ1={8Zkse=UDm*TuVj{yhCzpRc`T3CkAjzI{-FV+nqJ(IH%Q z-&Vf%mc0_V7{sfgasM~bwdw0X`_A>jH-2|z_N|}!P1(UyS$xJki(kJ~MMa%?m*z8? z4Dvj11WgMX}NpZPYw zy51O+f9D5jq=ZX9SjI`mkG_XjK2^YV1t%UmJpIjQ#<=6|+@z$8*6^o$v)p%k{i}Vt zCq&~6i!XkrocDjcm!JG^^-x>1sX5>ef6Owo(PG&Vk#S{I)A;Ab^rf7}G^X*o;QCuK zEI%&7oLLqZygR|QH)bX!Wl9hN&NwZ~Z*DR#*@qv?Gk>lA3Ze zPc=VmP6ab7qpaLAKBaUjm|Gn~3c-f&XJ;oXRv6-E=FFKiH#g(^!^)2B+qbiP`SNk==uBnZMBw2Fi@3DVVMvQ# z;3Zw)tfjNq)jmu_4Wu$$f6K!qLZ-OOny#J!zI6G`;g7%j;ZYYZSy#!SryRlqYj={@ z3b&YGltwfE;KfvbaycDM9aPS!B6r(rUcB|MR3COAOFwh^6HdZ?UI^aTbmKF1+irf4 zifjR)HF+J9nP01xe)RNpR@y&s&3Eq5=!O zs|8IPcOJfGL(|U}wDy(@L_~lbNDsQ{?QNC0Tpmv=LO=91N}(Bwch-IYmQ@@VFLpMi zL<-BK+XNc&g^35v3;u5Xg2zF~VnjB^YsWU{%2E-^RX}|R5<$`ubW8B0>6}XeHChta z0wp9JQV~Z}CTtQyU=<_Bg_O9_D6@qoF9a3>S6Vbik|dO|fOUjKqM2>Si(&wc63{C& zj@DF$MGq2lb{G_pks2!&LAZwe8H&Od0uhM}d8L$4Yq{jLqPwh&KmX|&5ifHO4Sjv6 zKUl!)9pFG2#Vt9d6#ZL-7hq{c&i5#^w^N}dHAq8539~Pt5tfaWs6^W~GUgRa%#=x* z!Y32>l-W^3COA+r)>RTR-QWc3BZx_#8 zuefbfPcTCwoVLx>z)`CRI^ z>tAZ$w(CQlmlg2>B$e?TQ?^Cou=zB+?SL-3Jo>5ZQ$1hk*|>8*yAUFa=DS)7vu)2K z5{BgR1y<+N#E)Od$^Y>dlC?&;luBp$_-B4jZ(kaUcTO%>ptaTG;*Wfvzux@~gb-L! zoANpJ?Ej%Nd2UA!-D|s;T~=#MiieimJJ_~OJRYZ~r)TdM-V5yP$4WoIm6Ra1(;ZRp`^Z+V$Ja`=1Z(XrubIySr)@OG^Af4=Ss|2qd9>+F$LNmiC* zn+DN@pr%ohNxecNwwHnC){yIdQpTyvqbLOj9oNQfe=;RDSA4OOGv3k3@2?#eYwU{74U9{^kJJ|Ez}py}Xj!@5*x1FKQ+&Uuy3NnNe>I*=7MWHdwTEOy1Ud z{zZ>iOpGe0-y5uas=(=Q?;JJl55K9UvSRY@sDt)*@jT7e?Ewev?;wRK9oxJ$VBH3v zS&bI={Go2QC0En<=fN~7GmU9X<8{HcH)i-;QF3|VdlFp!-4yMe;T~Tmvl=b>`b}4; zyGPMDWA9%+zqx6UH@zW7O|>ylTfE5O_jhFZ;Dy8HfvL3ScXwoIY7R)H6~`Pkwb8*B z*7#orzC3n%F0=ba)boG!xcjGhzWJBoQJKL$P5s=_FX(ugAk{PZy0U4_1HaAJ6*Alh zKqLW&oU_|)zxB`=EU1km1)Om}9p8OmD=lM4nVN*lEtee5RrhUSW5;;kgsGr9?&1ZC zygxkjKalfrEI~!grf+1U+0V@ZwvJs#E;n%l?fB!5XTgF6ELyaP+itsUh=i%As34Qc zjQVUQlNnOdjKohLTycb�%xepBtCXJt4G4tbB64r@}BMM<~>VlvFiT<7@CnbSyn7 zkmd1A`|4Kp!~gkV*{K)2NgY#F-8|@6bKTZ1R(|D=%h#uRm!EUl8-nP9`iyq$M8Q!+ zZ3jzf79V$1Q{|%hZ{6|I=1+7chtq_3DQt&P_W7$e`wd@)MX3qCqj$chT0RTV6VL?G@WA}+B&Q5~w`PP`~~U<`{vQZkgD zHKZKbyc(;jg2Zu05Gxw}id|cIMg+I3%QI=%>@k!FHKHXdMh>V9LEkavep!!uZzgMxkO?~G+=F2(9?lEXD)7a4cIo;jxEMhX5L&Pl{KKj zX>W$ER-DF0B8{`5JZ_XznY`J?&W*@e9C!Xm9#)UOrACvs#Us|k{>$39qLh?eCGt=g zl_XlLq8E_y2O=y@Q$yuvXoc$SA`pVu%vz$^USv+?{B66G_4I1`HKNvuU>A*e&Dntv zO(6);VTcceMS?6Zz*h=iDf(1^d(t8nBh}{Smi->xx~=Tk+@Wp#6?T|?S5kuU1;KcKt3cxa4Z=5vsr-2nwkk-HzYZBg;El z5w=@2V-DCEbC`{O-&n>aC(PyW%O7RGhO(En4glN)%sS+)bZ)*E9j13}Qr!5pZ0?GC zEB0FIvhkUKrVSzg`Ln4T>JIj+vw)cs%&Jm~DL0_%>nu)PZgyEpIO0&3?K>y;g8TD* zIp)r`xb@EL(6pLr$zx9zhDe!Xj&z5}ml7tLHWi%zuHo^T3*MdJqK{6U^z#E_pEeS< zE%5!xUut*WljE&ty?md+`EzYPbkXQ1Cl=j3%NZ$N_8>6(_3Izi3@ww*Y0i8{C;$DG zetz@gn#oo%jejCclQPqo#x!1YJo#*ajaz(z0RHet^TM9lU~&B|89wug-3vNe+QOkE zrm9LwN7qzKA`HS1etS!Xx4kJowCzRv*j#&KW)vwiXO_jS*O^hDzx*}N+uqm3mgi?O zd*<%jFm<)^Pr&12r(2FV5IBFLW!66CbJc}uKK;uw79BSHHJq#xH%Jslk#{PB-}WME)`L}IkKCXq-mFfhKMe(b&rw$^v_E}Ut**qD-tzR;&d`RsrC zq0}rIZr67Ar1;HEeEi@@*AZU|)R>4Q!<=z|(= z4R`jJ#Sn8-O-&RWiUa}+m1$O z#bDgUu8o~orjt7(gV8J88S%lH4YfKNN=KAO4w@@%tHF&^pZYfUDTVbhjP2yIG{R2bsr^E5Z@Fr1DS1c6VeHQjA3hO^Mx zc*rP2PzViDX>6^FWhxAnbLm`uIQDr0LIw;OlnMjZ^tRF_QXIMTFd|hJ*&ajW1Q8nt zlYZ78F%_CS{RtG6b6n0)qZQRBs=u zkRj~pA|pb=1+(#$C=iKi)mTTBo1h{PSV|)m=1IZCvAZKn`ih3oS}U{;$%j4>FGmH6UI$c zlYi%&wzQVstIxnKDxyAf+esbROquWFd>n(H_3-%6DVDG_oPKf z+X&)j>0*Z^i-rl8>Z2p?|j?dkvf~U1_%LjXPb87ND?O=6I}G(1mCl=N%%f9=XHfUR08?$H6#v)sL)A!$ZM_q3H!Xw-y@uJG5C-8YOKR{z`1*cu|CX?tRKx?fZdHf}@Zhh0J6sK6! zDSYU?M@OT{@{;}lfP6a3^AEpBH8$=DZy(!n34>70T(r+U=Usl##ra(WWnDjd^mLuc zV%ZiA`|aDe=;Xsc8f+40cD}G-DM}SPxPr|(pyPoDWh~#k?Cj6H6RImv?E~b30%1NJ zoOk%lvwPdKH|DhW#p>DB^tKMlGOd@${y_>@gdPYDIt+_G8)n2GFVI?xQe}>TV;PSR zWj;Sd#zag+ zbg}YgsAC=$lX+ymKy+7UNmOEtS$!Xx+lCHV`vF>O3cFgz(MBWpS{K)?g+Kz10#_-V z;&Cupxr|cu`yOr>Qpn|~T^vFAnsi5iv<044^s9gx+a+n+SeA`0bw(WvAtA{1BW#H- z`7jsNE=WVG;Rl5M1BM7IUC5ydAU&j#2_+0#CIKuIMj@lc@bQV_=hJ#yz1axK$(c9hD#;$=uY^{k0A#SO2r8O#*CjY{V zBMye*JugV=Y=TGm@@aY zwUDoLAmS8ceYLJ%xRCjw&2WhI?!OB)5DHBJ&_WZ40K3-4Zx7P5{i^MaQRf_Q&CZX- z26FLz>t_*`S(GoW7!;kV=it*$!fxuJTtUO!s=;7OryaHrM0;1Rw^~}GmmdEfZai*QrPcjG zB7N?LZ@tjj`^Sf43nOLNiE8sq<Vr*@8m0A`3jd@atWXN z+~;CWX-`8y38nAegIh1u9{Gm8&+cx+7*bu>yIQ$TouI_MDTk^3d3mkdq#BHtZ zI|Dkp6vs|cLH%kV2;c`lPjl+>=s2U|5}I2>s;hSI9XO4D9!!%m)0oCIUQ=Xqn%~`? z<)&ZOaMtO=jf?&PMZ=O7o_f|}*^%R4gw3rXSA2JXRjWOI_B}H?amtBNj$anxl27(< z#|?Eu3Yz`_#ka3Xarqa=HwJ!vLx%I-nc!zvj~?N8kN&~ z-u9;~LcoFhzr5Pv$*^Trz}LS$^*Lm;3T_BiwOKmR%b|<}9&Tx6-F=d&qHb zo4BEH(-qmxTUPo1ulR2n)$=c)dj8A)UXQyLcYpk7I?@H+_p9d#CWxK*=t=WBwhcag@%M*8~t$mdPDRb5>jhaP$;Kls59 z0C?)Dr|^BB(@#I0d+)uMnwlC;I_V_7^rbJ2TbB@FpoV-o3@UA#T06qJhu1J`$v!MP z>h{+1VIp}Prm;Y_y4nZ-eGc9b^HIEr%c`1*_ut+ zWYasOKtgB|h@lth2#SIVzKZY@QIH~4UJyi7#6lH95$PzshZaIeAiZtcCfm#GPJhbz z{c&by`({IefbZVdwb#x(t zq}JNaU;#`7MTU`6O=t)Vp;6*#k0#JFp-?5>o+1onpI_Sx(K@LUI_)9^j*tX}#)QG8 z`11V(yd@ML>m!{^@%|$pu)(p|vYx1S-Y0E766ZAg3l#=SF?)Pa{1L3v?@WHKm)QtG}d4(2h`7X&E@ zrxZ(6?DH`+7y<-^8HH8Y>!&m?OT2d|zjiB_CZec=x~!|OZ?{J5yev$`>CM|PhYv&egBZag?07S2>5@()a2+>oR5wXy!xo~Na)Z)x^~=TO zwO7}5kr@)m(UiB0r3-|eCKk=3ZSj_KYCl*uwrP9KP>(Aq^XC%?g)oKDjw^!={6ZE91!422#_eOloOr(zK=~v}6il+sedPx=0BQ zE=`U_y>O}V8*F%UIpgQeK+l95jvYOO`G-#9g;$o)7Htnz4dwaWU;b#mrsuL?$%u>m zGh2dxh^^b^FV;N>)7LIt>Q`Fs?ubMp3>!A=Gws_KEJyAZ8IwhIB+0***RfB9>O&09 zSJ(SK6=4={X@Q2%Q0T! z&mJ!Gd16GlK`Jd-@K}t&gLG!>?cqn?4>4sERH^0)q8uj({0_pGdzr{Q1@tcty*t8uziQkKc0$HSMT!LGs>PYk(Au@yH@5O z>Z7DsZn?gY0sMDhfRq`)00!{6;>qXYcswwFZs(VBL0IGH`F`$uILdze zD#GN-8(O&G)(FX@#OoCt_B9{xzBD*ztR@6J`CuvM|Fnr=leRNul1W}rW5wz;-#)#& zA8ccj%X2R#c=7S>eV}ii66BZHws6B01zdc2Gs~7+3>&JGOiHS29q#&l(H=KXTX21x zc$?(z%c9(US-VfmZEqJac%)9nWSwKr^KUZisL-^XbB3hF+wYMIgTYlpU8@TmlW%qLF5o7u7D;sm9%$;ZM z#Tm1P67VQf*rwkN;)NA;oORDqwf&Q;dFB7jVfM%Z^8E&hw8QUT?_0v&7Y;n|KrXo8 z0;;R4u`G*`BS-SmOE2;K^Unh+^T%zs-Nr9}`Abed`DBIVTh)*MZCF;jbV2Kt`JBRS>y?ODX}LI zoR*I;1a87++_V~;C7W=g38c_KlkFLl92b${ho!4hSflG`9upDFM=!{SPyjs?Km)W? zM+K8;Zz3U}AP>?OBG%p5yVE{^X~m(ThQQd-1oJ{j0p=Z?Fpa^KIJ#Rh4+lhY}nyvil*{EJe@DBRFMZFGugtcDc|XGM+KCd*fun$%KnC z;*}Xc7;eY)001BWNkl+_nvRFope!nG{cJo&sgq_Bqv{HC8caUx^JjA7~0r6iL{ zrca;F2`8MuO*h@t_l|oQ~-7>VhyJe+5T9hnvdT6NAjb?&h#GT?Inpo zq`~EylUgYsZ!qg94;z-LdpTU9QCj}_Dk2U!(8r)s)#oWL)Hraz&J#zI#v3_P+LB_8 zNA51>{)b~El9C&*Dqz-342mu%TAdeq^Uy(AVDR|<667IaG zjc1-u@QVxcd-Ni_=a0o)bXhasIIEt5u*QRbDQ4Q#o+rSbc|O6#KknOSXz~PutyMOE z`+H{(zJm|&GJdSdiq%%Pb$NLqMpYP$9c8feQ!Tf?tW@VG=Y=@=_&_d9OB1kuqs1dn z#E=rohZ@}Z+oDe1Is^D>V^5MYCa^Cs0T=~@fH06o4H{}uCXOEg-F4&x7{CDjD{0Xo#PcE%t z;riFRE$=uJ`L$c$>y*{v>gU$x2%9Y8>2_W7CsnPCz4CSTsR)y{B_D2X#&SM;NYvwx zKhEo~zfMI(1yV}3Y}rC{bLZ?(FTVI9OO`BQ)TmLkw6w5({rXNJM_FhB*X=OIkeLBp zz7&kpy!aiRO`Er~cGI?^H1d?RX^=DwEJMfDb!0|)VIZda9EV`qLQkgfx{_&zk1^f= z#a*=OKF5KYCgBwtr5(&VvC}j>`w~qH-#snj)v;44jJhUBrD=F`8Sj0x4!1Q%)#mNg zu3xFO1&udb*H-T+^7;*tNKo_Mhx)c9OCN0Y8nPjk)Z+0tQwxjbzTZ1;UFqSIo_CX$ z>%>xdrq@^CxRmTzw|$?F?s%ra-M$6QkU9bvAyfzsWCv-va3N43K6Eq-RdHQAKWRP9 zu4@^ekFflsKMwU*c8mq1mx2_QviKB^(|BFBq%4bJr)JM9e;mr%6Wk{`#{wt19slE{c-D@H| z26o0%CT*ulxoJS)NY(zfbVx`W0azKz!f|aZJAt$%c3jN}JFz(N<`yL2L2JJjq(s^_ zR-{dlZayQE##+PG)&H*Qj2yR=y(Fbn9!ZY!{lRh&X$ORk)EqRSA%X#<*NZC*oJ1>b zvJGMAXu5`*N-HB^zj_ZCnQPv4UAxV(MAYruzbyN_5Izq=>waB%gvJ<;k9fio0n?A3 z$qpq^8NJM=HWCdjT2e|)pwwDHp<_g%zEDz9lwXFEh)`;JXx(0i-}GkEp7(Z*3H(B5 zZ*LwSRY!R4mVdJM5eJBZab+_#uYQH$_t<~E@%w0o{=TkhrKU&USK2Oh>uYe*Hi^16 zS^NH$Q&QD+hb5M8(1-i-@Ob-LB5L>BLEVQq{`$9{8l!eX@wAY?f?^^pAAz3l;kXS^d(_ ziEMuya4T2aKY99(i8oLGMWDQ=&9|?2u+y+(qr-2`ZufdSRsXLc&5BThT9d;NP_25|IzevQ`q?`Id}cWa|8{^#60{^#7@otV!1ZXV}- zw{NE=uUGK!-95MM0RB6$yQEA$a9ZZ?06Hj1cY<}mi@*awH+QiC3}68NJt!&ey%Sjw z)+op%#Thna*HkIPhUh!p$L|xlIODGHcsj2eKi0^_Cx2cj9NfQ|uHh4OhEM4Ix2;}e zB`ZI*?naT`P&VmS_BnH8f6A_D?QT??MO)IQE!nqE$kwLL*^uhn($u%5d)Zo{HEHw4 z+C7&JwW+CzrlzJox2dnMr@p?v&uxUDbM7TqA`@u@l0hC1VZ%qc*A!r zNjpf|2W%Q@0PL3#G=dZx9>SWAuZIDYbkf-ImL3OJ9>=Dru9={8kP=KZ9Mh);%n2K5 zs==e&+KeALYOvHt8HqHG=|yQ?3=v965lTAfnve1+6H|o;jk$ZvTdU@N{Nl3F(L};m z7S4C(oON*X$OA^+xcb5HZ{&8+1!m3zHbXQ?DHXvXK=XN3)}oC6Nc)f3jUkI+bQqwc zh?nfya3$!fe3?wC?;Xxj4yLZi8VSNQRl;hwJuD~N#?p0>@l-Bt@)rStz!ri}WQu8d z270lE6;F~*$1w{1n6?);6~-Fj!)OjbEY{g%+0D8Xcer9*7b~40<~pQZ7sqjMX;0TI zGAYe<$H8>L5CRQNkuF+>l+ZLZ(;y{XqOOA`1o>!aQsOqY0AQ`zfRzbvahlaVm0Y`# zMqd>+&=ygosI_?;>3XF?u-nwWc0&^_DGMnj1wzk|7m5jW6G_sWHs{DS2SHk>Kr9<| zDm%5IP)asa3Jgudi|BAVMW_GLQK4^|KM$cBXkH(lis4wb)wpdLvdeZe?I{qtiBGzi z2&9YKoJfdNulkq{Fw`}ey+67_M-bB5pXJg~gtj3BgH10^M)jiXl?A$JH#D~65s(h~ znnBQ`(_fuLP}7*<%crt7#_|VV&?8=BQo^fE(mW=bkqNQO5}J;So3e2&2XD$AU0}PT zONGfuUy#z`Aqbxj;vJsvB4<+6D>iQ2$a&|T*U#F1cHHsC=04Z|?$t_u_iAOY>wo&# z%3jxfQq{`7H!l3FRqKqIr|(U)_ClJr-kyrEaq)}R!lS=0zZoj(e!WcI-{fzf4uqq8 znUEJ0EPt=h+zA61z#hS89f6Djehz#WrPAD0jL-aC2z(4&13dQ`>oR}=4B!hyBJP@% zn|CoI%YP9pOZLc~xM}P+|B-50`QEOktJygg{VTn#YOVXH%-1qpYd-5<`z%rKUmnzN z=+VH(wrx);)jN^&Sz+5Yno#Dpxgmx?Ng8}!G$9BGK|s?PVtSP^DUc$gD99==BzUBn zLn>2R{?hdT;Ugb+wWR|DBD z*?)xJs}vmB&=AAOm;`53E*+Iw+46NwDI<)`Z`C!mohH<>43W|o@gqzFGX6K{8k*>t z$P_{#{9cun=?g+O(kg;Wo6oH`Mwri;nCpEa)aJOd%+b@QJo&^6ljNI~Ovj|$vN5Cp z-Bh7pt_$dpRhdZ_5(#wMCO=E?Npf*EBH%^ny1LF%DmxGw2%m|xU8I}Iu%+o>8hC|< zw@c_&R{bG#J(p1`+lGcFDAH6HGB0y{k*h@ee}SYR>um!ad|uRF#>xi}7>K?*rLx0^ zjEbdCdO$;&_zHn*r!ag5!VG|jwbw-x=q07-p?m_72q7&6t|ok@N5uLno6J4oy1CFh zVeWdDS{I$kq#U}abo73jAFGlCVclSwKg3AaA?`S&qc%;XNlJ+&-CS1mfY1mCjj-k+ zVEFNSG`vE?^o9_cj;Az?-IhQ$M>9s+1E!+8j6oAT6pr{FOhtjH)oYsdxr3fd2;U>KnuhTn7A-KGNmwB4z^50*it3fu(z>+yM+=0RI8J z{D%GHqGioBUvxdbC^Xi&uk^HB+RoeWJej)k^Ejr^gjG6R|91AP>r`IP=JpvuJMDfD zX&|$}TS8vm;oVF5l0mvXItMp4Hr^G9L|*+Ij;M_~X!^`;9W4?v;WDHw@OpCNBv-nm z0U@RG><|KPhuLpeN@5w3B~NJdPvj5MwiU^dAtG|=d$a44nXnzdM}-YZ38sP6w2X=( zGqiFX2>OwB3Omt4fs{lIlVoeu3O?9QF!L1D}aZxb2D+iBcB@yqWDgKo{Wmf@Q0;(uOkXm9~>J?9DVF zSdQ|o@p;u?*LHTU#1W!@M2irgn^(-Ppg=PaKx1`$MdH=O)#X3G&{i%}5e zAT)Gu9!@&mX9{FAqwn?I$`xpa7dIWls@Xv&^25{-x<)eEMsq5LV_OKXA0dP&$;;Ez zy^wre%NKrc=j-_kMLRL92|*@WsGhjq{OijXoeSrhIA~X>$G17nfu*MMRBbp z!e?TZ7UBqj+t`K_0>9&sue&YV8Y8P6SN0v_wF{6^3d^#(OCVb|SM&0(KiE^p`9hFv z3*gI}Lo)gn(6DZ?^~jB9wa(k)$8iyk?XKx%ZS1f2$19(EG1<4Y^(%t6-re()HUF1T z*XZ^wHy*%$9J@lw>;*gwO#PhdG7I<+xFPem#~$U9PS@6!V^p$k{l?ADDA`OlT4IMh}LH0ZMm@jFa}U@5CM=^>>p z&>mi7E3c4J(?dgZi$_MCBMv|Jpp*1}7-b$j#{^6Lj6Y)H$M!aDYCN4n0=lW?30>&O zjBkwNf@!penq-fWRj&Z}RF)&9Hqd$<)C(byrjbbkl-b7YLR)3LYqEn|DKlomJAM$J{V@M7go_y+yN(WSWU)m;%Gh{T8X& zkVtnHpm>xLNqW7|lVNWMaxd48rkV2z5?+r|Fny^YaZ*u54)g)t6TnHf(NBwMaBbYI z4^o%1MaKNuN+oD)ZbM3mw_pS=XnxbHYwqe)Sf^Og`$tP_)&}30A1o?x)OR@XX9nj`&rIsM;6 zLxc6ivgOV*UvxbN@P8BiC1p+q7684v9GQMW#erT%%<(dKs!6a^!xz?Y(voCEQoqik z`V))FH1uBKbPdrb>Q#6iY=+x-rpIY913jirkToi%h1JLd54$187YH zgd$?HN{=jgll`25j3<$Xj>wQYexYO6N5rx_o;}Xy`PuGAe}j zva-`Ew`~PL_j`+UQ<;Vc!$3M|rLgdHQI|L!)GNufN&%gzYhUO}mUJUeG_5_{CL0c7 z?|fcHCej&WVuAQFs6BQ91Hl2p&#Dbu#G6&s=$bYLk2%JdwlES&zHWvX;`MbJ!*}xW z$+o@iDAFt!Qr5k#q-87hm75{hOdZ#D&^U=LkxWXM=Y%p~K(Yz2|j|aUahK?dPG%~!0CeTWYkWuCT zBML*vv<;DL*R|asx69ASsp&e?o}IVpggn0@EnSIhjX|GLv7-A&4P+*>nb7q1c)Cm| zrgR*ox=J|+2{IhQYHY)8Zi7gSv}L0Oeb}1DdQE3*b=&B|(z46f+Lw!DY{nmqM*)|7AS8b%_NwO_)Cht!T<&^fE;$zIK2Boig}0lC@Spyym;c- zIIgQ4=0kacabrx%hxV*8X^W~<*W0Qb2AAm^G{?)BQGGwoq*Up-$B#AHYjThFB>*g6 zWwBhdk@PeX}K)jw)66KhH>M@F@F4bN=izot*vF@!iB_QogE;Gii(&x zaU!WyiX}^W@srmw8HYMRm65?rC?t@z(~!&?5_ud0CXLY$drxnnackoWh<3~X&^1Dorp2@&Yy))S$Z;= zYlJ2cw#9qzEv8;N#V+#j?Az9@jpM1Ur(Aew1I%p0OwM(M>#EQ`bnm?v)&MBdsK2aU#;8!Ldk=83xi2PIHS9U%LU1>A}%-EGfy?47?e`<|HnDG~}kO zL|uopl<2xn01aOkg3y)F<~mr?C0{r3bb033^wJs6Y?ef#3xTP1Cu6fevp2Xvn^ecP zrHhkQ=Lj;X*OgJZDKrdS!=q{BX$EFEj9C;?nda(Ra2o26^)61k+tdKMV%E3!re*s8 z0YU!0Wi)KK4ruuFZR?rF9qxt2L%%e!Z9QUZmCd>hy_0-XCYfxjawsg&7&oTfB_8PD}dkpzLh`xwT+vuF5njzbxs|4 z<_{W~v#*EZBAp#IHtRRqj3_tw+wDcnn%VAEvGDyAC!bwU#c+eElT22wvAE*;7S8=v z9@kwS?)BJjy_@9J?>4aCK3?8`rL4zonp<3sJ-wc-RW_B&hBB&R&kk7rdP$Vm9!gO$ zSw}Ynm7m&N^yfSd{D$h3Y~SGU%OfMSHM_VrT=P_z8He>wAaz7KDS7kJ^rD(7>q7v- z4L}rc%v%NV&$bJl*tkP=>B)4-8`ShS0+)*UzA zcq3c4Zl$TIiFxzp@$;YmoFDw)2UJ!n8=dQ~zn;SnKb%A&!P>QJIsg3gdn`xjMrWg6 z)U0-EI>B4Z7qd-wDIQY7&|$+VD=#L$D4*@EG2UIep{{mw?YeSTUs)Oq#48Tjd#lP5Mb&^$3>G4#1hJ1#qY^wLlPb{ zV{EHJiE^6J(F1l{W!$ys*sgJe3W{)ln7Ed2FUz6mS5ev_TX1R7< zrPvgy!BY^Nr+W-v$2RCWjkN}*nag;Dq4!P<>;$=V+t7(r5t@edn%%>+bWN#%^xi|I zzVr}EW#L7jr4!_7`Rd$i0^4zLl4+%CF?tx_bp6R4ji7sj?Is0@Y-C2|AwiwP zuL@inE85suB_niRCX;x%Y^d)j)ROQ(OaX~kp`sg;CfWnFBf$UI!Ia*DVnSl z4iJkcKuED88P(UeHc>1LY$P5b2nn5#;X%)&4lmSA8d6CT8hC|9+_BMt3U3f^hB%5# zhaKr8ZJBj`&0wh4hhOLN6u~WViRCXev04SsU}kr3CXIp z7JE-IF->)yU2|EOhDMhwu5V$*`$H%!P|xeX-5=$~+ge%v-r!!#wrx1#*s z&Y3~3`bC(4zYFnc!-?OjXYt2r-uibLUprt=*`f|$0DBI7jW`aY7eZ#{w}YH;M`54J zn2y-~ahjH`4(0oL2$#2a0K(-ur!OdG`k4X#c}^42x^55b*}y-598?!0t?^=K-66k`86AM71@*QNRy@6Z%osc;H0f z<}S;x1@1y!3wsKOWa!k4+k5k`<+W^Xj5GcEw^>`OxngA5_)$T$F6)uz|RJxE&WPgWd z982xap*7 z&#vA$y~elX3hjMeSHi|)b|@_4HS#5GN8KC3Nk=okK_I+7&^6_EV!4Q{T0}b7@n)h{ z8_71EHcgU7;z*V5+LyL55=o@(AY2zGmClhej+8{DO_S?TEOc}sNLUuaakO|crEk+5 z%t_^h$_g+McvjWZR^N7hSQCp-<_(}3I*DY8U|}KgXdBzp2?`AlN!KCbSWsR{ z-k4&%t{}Ogj;fj_ya>|L#m;0pYqZmpnVwu&lXM)a(n%5lFTOEjA)273wgG8Fp<(Wn zn5?zaGzo{`exoU$Jd$8>A*Si0uBDB~UtiL?Z1v{mBMzEYe$v4+^?+%jr7fI9id0QA zjjPsCwPHKeR8yRCl#)%;F#KVx1VDE+WJk=MJC`f2xPo`yd51_O!ViD=L(Vwk3<~-S zZ~y=x07*naRL(#Dd@O4x&xKvUA>)fVZJ!}LwxpWTB>^rxY!sCZF%JFh`&f?Tq3_LL z+@K%=!P?sBPDz-+$l}7A)#+bJHvKIdc*XmA|HT%};>D zx)1FKx2|@s8!<`m_YBXqC$|!7l~^gs)C0}Wos>E2)F5Y_8U$eF8jGp>SM&0dgDC5w zetGPvI6u9-nfvc7X3I94UtHb7KkqLgKh*nJaN+w&MpYQSs-F8oen{h^H+m<00{+hH z7k`}Q%pWwcVUx{2?=R`J?QidBWv|H|7JvL@^U@l?0NT;pL!uOTuNU1FJTTa7q}_&y{FO1UZ?@{WFX#; zIu_F2I|`wQq^}zKTkj8mjr}b1ZdAzJ?o6krP#MCqxEJ^~?J>3<6mioZj6xAOT}he$ z2mFgYOUmpA90B|pH8}bsiuk%Hvwk>=Fnk6Gqwa}(;IDhI4xbyIeIY?np~j8BD&YQy zxAX3z6bJ6t`)q~BBlyj=1w8j+oWI-`<>qS&xa;px!ucAPb|G{^c^apFBhX7p(Awtm z#Itc0y*8L=RC3=#F>bl8GePjuYf08`w7KT8@aIO#Oy0lq?J{<{K{O&sCna9LAQ%=* zoW1MnoVI4k;uoy9Q<2PlRy^Xz%sgXSfA)QPSq*o5b1Gv?gM7HTrPI1CjS1?bDF%mo zwG-q0%H}@H?^@=bhLn<2Dn&Zo-r3r`d2|2v)sTYDp%AW=)H-RVA3Kv-ryWf8G5y$6 z@ABAF?-Fe{Ry9!1@yoBi;gQR)yZj6rAxxob=7mQtyJ(&=u5LRL*9EeBi&;roitbP6D&ka8l;q+9Bh&x>K8`Fb0CW!k(`j`9r2 zqxbA719Zy>r0HD-Mqk$S#zLTZ12|S3q=PU$=tGBKpX6_U`NM!sdxt8D#P)mH_u}th3@U(#>n7K(iLHM8l~A6Pn7!PCQcCI^izZz% z%O7hn}Q7<2T>qDM@{8tPgR+8I49i79P$6uvx z!7}n<0eoi0=Sb7gJiWgQvRJ-+ImaJ=Jc&dCfcx&dkLR9yjyZGYuyEnR-MlzDV{L7W z%Q6!T<%K>r-#CvWrVQd=pVo5h9g9iZF4rADf&E79d_v&71)p~M9#1=*d*Fy&BV~MH z7&iSlYPa49@#+nq+P`_?w)iPOy(=`czeU{gS^URp|h}yy&g>e<#pQPj>9@3OVqiP`?Y`{7x!I$N*Rg$&=?dG3CSnT9+dij4=4& z!ZQAPNG)}%x^?D$jZy`C+I7WF@NeJ>+6T2A@f}n;?s2pm3O|lg%lr!X8L%$1Jc%M( z{?^NJMrMv7fS+W_uu%i%Y`WY*z&H9R17HZs;P_7+mW=_v2He-f_9C9eqw<89*Xrz%7BWNm_5_W(ofZZ zd&#miv-k1jWVQXpqff+{INoIHB$Knx2y*uSG;-rr;aoXwQJ0@w+Qc&tmny%7UBD+R ztm9GFbtfd++zC6|_tga{CeJbP`gd=(`l0LNEo(ls8c@WsPH4#43>x3BQS00Z#kf+k zr76*E-TXEh^y?#uV&#p7+v9y2&~+9~_r{d_F_Bi&M?c#&`tApF5G#pA_>N=1W6sZ2yQ zrP`5z@Of0&RDU2{+*DhaMIBOT=Q6xx2$*;Zye4RxG8?sQwT;)zrE2aJvLry5U&T3$ z46^3UfNdI7*)~P4OF^$hS8pVk==87qYJu>0`c}exIYlxcC3dV?IhO;{O3|{ZlBCZ^ zX<;ee@<9;rBPxQ*|55X@=EL-fTY2rKQ|DM`DF+z6&m47t@%aj4J~PUP>iqVG0#5x-10}^8Pdrev(|w+OA;D7%N}mi5__Cs>Ue{~;uq0__EKoJ!O?@|R6ne#UA zJ5)GJM;wkK4m#4NE^0vhvt2w+0;om}>MMa}6hTo=J1H|1rTFQKl&J?U1KtIeWtLr> zDX%9iKq)!yLJ=QdN0Bn8pooiKqsWpEP;Iv+v&}gul4}`oD~gaQ0^R_wLXjAEqDZ2f zP(;n&QKZJJDCJPsskyJCh^J41=_qn!Z&ds4k4ky|Zxn%b6YyT9Z4N<^F-K>9e;U|< zYR9gWb{mRhdm7jRTn$V>kxDK~S+Y;2E&dm!B*~V!y-S(nfGdI5QHIh7p_ERa1?QsL z`300J>nT)d)O)D&vj|0;RG|o@D}e|4QEnmKi6R|EP7Owd^*#I<>---@)eeVO-%9f5 z+f;PK+20Iu#7Xu1{-(m6n&}o5YHZq~JOtti$&kUjE`z=Ip(tmcp?JZ0hxjmbc>a|n zCmgM2a4x;Ng|ki#GHJZYw(YwX_uka(&PP2rJ7H%@CtrOq$-7Ub_|2=k7t&K-<+Aw2 zQ~{tumjXpF=X-tbbNaqRnK>d%(5o|Jc$ll6Sxaqe=j2DDO9DJ_?sTqtW-XNs{Sp7| zCLF5(rEu&7+wQp`lgVUG9W!j$Fv8(5O-;KN^0ln8YO3q@(s6(OgMOD|>iU#qeN^)g zX@5rwAqWf#;UY=qOhyIu2IQ3l*|BB^58i%1)Arws6R$iI|Ijkltz1d+qs6R^G;#EK zCo*zMnNr9k)Vnko@Kd(moYv5oF^7Hf^5RgF*LW<1GqlJTWa{@%T3Wn+(btppzNq_@|4O>0`@JOA&5R|MkIaJm0Q5BiV7<;69dp1pmLtb3^dAb-N3?|B#b)l)T_ zLN}Y~C7IeI9xgJKZYO3st&osRcaFg{l{u}<`s#F0cxe44hrX;ZbZ{ib;BvgfN*L~> z@zh1pnj^T$9u#__!{06*M|2>VUCUM;GhXv6VT>%D&S3`mo*-c}fZNbOvZgAh8j?sX z$0jNyD?VLG`F=q*Zi|vkxEwTUUp`n{&&nOu1dGCmq7Vo{>!z*bSJ!j;KI2*67G>W= zt5!6&L?1qN7)v8@Y#c2=5Y*dh8(8x6hh=_m!Ms>y!_Tda+w_T^JXUSqO6~g1Ys!b0 zeA8X!UKm@vc81V2v31bmD;=|Fr1!Cd=&uy`%$boXbel(1sW7LGsT*XS94p;RIr zt*&pbD%7+IPHn3QYFiMxi9p~;mqx!y0ma?Q>J7&na}2KQvS`uH1<;8^;@7BtZ#&Y_ zi96fRV`zNuz~O}b1|M$jTfNyAPTgk+=N()@NuGxtktAo|yKLt>b%o)B@_kOBZtW-> zJGOnD!^6LhS-<{w@1A#i647S&L|{q}tMXm9=cFzDMa6J~L{c(mmbcHaB~VEdTo?A9 z^4Umq$A!u*ov+zgyl>@@ra@_mMr)he?vA_KC@$(-Nj-o8d|A*_@8+7W3r5WGa>Nb0 zK5!VeuSY3vJKRIza-DE_@13f`3WJmHDdvF_xbgd$R2-i0dEqC!EgMJXjZVl)tlJgTqSO!bfPZF|9k+{RfKu1o4g3K3F-lo+28w9tihWR_E~Drk;CmG+ye3N-^;vq*>bDf`Sb_H5wzb&ov`rn6nFnJ#??>cGh)*28EyXKrr3u1D)$5wffr)L z>?g?|(&sa5(WYkZdS@#s+hx^`D2=hs1E3K_eqOtH4)?#ejay#sZ{*=_!t`%LDdalA z@Auz9yVp_<@4x>(@4x>(0GD2RDL?(`Pr2~I3%hRCCw_9=A^#{?vi|hRx{pvM?*}e!{HW!1m(H@8zv`SLTd)v(Pjl_n$Jn$TH*jJ3M-%lr+{v&@-7$0EFSe zwJc%@YxCey#fvA;nR3Fo*^@oQTx`ciTfZ4;XiWUtR3?6X5;f1S!j7xVPi8ue?(-90 zwmLsvfF^x;CTzLDDO$XKc0Nn};4gKIqF2&;odCTJ?svJ~`W45c++v z*w>WWk@#D>EhdWXf|2r_ZO^(@4H|&vF^2iG12`eT=govI0m0puo-6ZSk1`?7!lMj} zdra+{&Fb{!QSR?C2wg{7X=0@CjTlTw)375evD;dZ(na(1^1KmRdm7`6!LyW7g@JX1 zp@X4y&Z^XLyDzDSOrOvUY{Nrk!&ZEn#$bN{P1Dgbp>-a=mtiwU5t>wn@I=|Lu>~!i zMjxl8oz_-Qw7Ho>_n*l4K_%4fXyd-h%@iinOrAe+)9Xu?kE*U~98ugfoI$077#Z9O zt`NiX3-!awhLbmVkU4Tt`CO~TFj~qh$T$2LZZpkW>Xytr?Y?By-M`oK!(mE;B{Zeu zRGSH;ZOPEIP}|6l2iG+=g~~B#Jm4pDA0N48uW-p`drfpp-Ph7Xha*>P63OW^zCL-@ z)YWEv3!*NGlZqn^0hWd3x(t#&@~4lc#=}R%AEJ$a+YuJ+w-O`d|K7U{qJvMWO0Ct4jaV@ z)62N`-EF&G(6p00YFy~1emTK0hxh(|*xk^jU_kKK-}Py8)(w^=sjhV>Ezzi}clgzf5&r(?VwNmx z@8hi7U@@w~VEC}FkjeP~{!gIm+kY-_K*t5TDLDDAqHf_v{lU=b9*+Fq0$#eZ1=ohq zV4X7_D%oim^W@|G>~%_j<&SrpoxO}*BV|A-LDmCPyDV=+`EqncL1x_-g}YE{lb@r) zViwU|rQzWez}v zA*E1ZPGf;#J=B{_dD+o<1T~l}q}}_cFT9Q-zp7CoLQ68=lbLn>#X1xrL#C`S>VD`t zLXh;F@KvMpkfCFkRW-_t7u30Uw8Od&QKX+2)mB|mha#m$q7+75o$1zQ)_H)xpcG6e z^-#{222#R(4@Eij;Lg(Jd0+E!?}BKbq|Ekehu7aua{K?PXtbl|`#AT4Cbm|o%uF5O zx|zs;F1YWZ7<*4KDK2VXIqwi3ciz)RO`U^f!R&oJ-2bpj@|H}h)B4Ecamq^dosu$z z1zH2`{!=;V9?|3V{N`gR{`#{h*FF_y!mQn!_206}u`8E3_o9ea7&PHe%>LF+N#)Ir z30_^@(Brz1#R1;_`TqR<{VJ|{X6B^QDwn!e!k%D=C?O5P1{B2u*P74d*cb8&}iZ(oQT20pWm8{P0`z2o`jn zIZm|3S@QOJiiJ)fb72b2z%O)SkwlG8bAEEt<)<$Z&Gt>(9(adDJ1x^0qwv9&Xwq;rHNH3?osw4Y_U&g?`;zII;XW(-Lz9VvJ10sC@AaVQd|mUv|hS z@?sV^YqA5E1xxYG?(QMDnc(52bre+;^3HfZhBk8TVTT|`1Bo?oNya008pogigpXqL|pEz~aP_&{jh8qevN#^S*o8Yj)>im05 zFjQAWS`IR85paS;JTB=(3~ye$b>2SH$KvyvB$M5ZPKyfyto+~)cvN_i>q>4mG;zz) zKfJV~?WqrZqx|_8{sIt!cq+!PBRjfvOnSnkNt3w!_S?Dbw%hvcB@+k)j&5yjeWCOD z4}XC2-0OxHSJrdX9?0mI#oF5c&)#{5*;UnF|FciKefmtwr1y|Y51k;=`O%9s0TD$- zswf}`qDV(XRGM^@A_1g_5)%l7k`O}rq)h6}WXheH+fUi=ANx+Z(=rJO;OngC8OS~D z?o;kLd#|&;YsFfP?l(qL+TTkBY5?5UxW%y8o-~GCP;X@66d|5qTemH>qZbDyPdM&{% zzu7V7{=LO(GgEjT>_5#%b4)U7guzX>=Q=Lj@#kh5n>?=gS?~Q(`_PB4108>u7j#@; z_j5z^o4Eb;+XwwJk3BC4)40*4bc})F?_G!B$Xg3o@=_Al&Y^V=Mh*5WwxJ18l#%c6 zJ4|1QQe1TOF!&B_r9)o@HfrG9g5K7CZ9{5u9L0S(xX$45Am0W zVw`erE%)DD#N-JUo(Ippl;FKNDIWM^?oYzDB~LsP=kA*eIOF78@@MwkG*A39&M$tR z$IKaJt<%?UbQv;nBTw94yu%~0KYcU9eHX{L^lxFxN9)9*>i!nW6Rl)*%QPgUVv<-? z5(o+OE^fom-H}*S@r9GUM+62lXv#78w_hS%7V+`g#d|Spc^!AZy_&+H`qHHBlCsq$ ze)I9;n7MQd?=4r{b;ze<=^8#$!_qYhgC@2siKP|488CJHrbfWjF?B&<(8Td1&8clu zJhh;-w3Jb!MzLVQ0#d0IBSwtiw9`)Gz4zX0T_!Itk4Pj!Boe{r^HE-2P9~FK%a#rb zOij23qI!Ts!l9 zsHr2U8~DbJV&qu|J)7UZaOS*MKYTdZzX(}XL;l!d>~i7B%(?3cjJhagdrr;>v_DTd zc&`Z?*Hn*`8Au6R_M1FBuKTTq$nK*D24*kSwPcL2KTN=pq%*DnAA0@(EW<*y_$>%P z3XE>OOLh!Ya+9fydfSl?N*R*c@kmJ zmcG^fitUK1*8iwTav_vDM(>(*k+!YKFhhqH(&oR2o6#);t2m!h@{ox%UQGhejgi&_ zsen$cTfMrkRQ&(dOZ*Iu{u zomtn7I_XgSPMSiUNko?7+#Ts+rfa6x}U zMfv#m+6BEpk4RTc^G}G7S>#9fefaW&Z)Pg((iJN!#*Nx<6p`^INLvnR{$$;dbbS;V zPaqx8GcH~#iFDGC$$;l#c@CPLV$EBHj5>B-48uqx#Fi05`^jUD*rW7?mp}9;l5O3I zaLC8aSD%a(@HZ}OK}L5x6wQoBi+jU(T>++vqqcH!Q8@8#~h z@8*?PI=;jE??5zRW9Xuj;=k7zbzmVC|M?BE>URMum)e)jd_48`5$F5+?ck>Fbi6$) z#Z%8ESonT_gn%EM9p>2=6I}7@C=dOq^H5|{mCLF%4hQVhvogr@pdp&ueQqgfm$LIb z%MzVR-aQZ2u5+0AUW#jf7v-{_^^)e(SF1cMn(U<HLq z`KkyOYXpn8t%kX1gu&#~f-HD4=Ow8C&H#S9jZOFyN-5G_tM+G4tAg*hk#*<)x^tqees6>kDRL!|}xq`7#u#SJjL4-$a=|KY}95eok)8bx(L6<)L#Ps-$T*l)@*5Ipl07*naRGsUI zFFZHQt8XUxMTd$P!+;UPjBPd(?hRh~TZ(j2a_jeV1#W*^P{_cMI?{tPhO`Ow{&1G! zQm=VBk7>u`y8kVkXQ$UMcm7HXS=ev*ADD7-my+e);;2bwj2{qY{D3fLPiylozW(Lq z-1O>70M6K}oXw4?R#N7^?@i+S`?M{4(ryEId0{oj{pAw?et-N}E<3bMyiLYW;lQefLpOQNfj0 z=2iphhUQvA>oh*~35`8`d3?Nb15e)YAcZ6P;}wU|BLRMN)HF=T!N@phw#UbhzQdc< z^;Tm%bxBG8B7ZuTB3j#osE;w()fwyyU}cE~O*au{fZ&!`Y4e9)oReO-i~(s6(-*|A zX=vd*tV%7CN~SKDu-7E2d|}p9tiy9{n(FHzk)mkuAPT~Pl)Jj&C*k7!;X@8R7(QOg z_%Q>?+huB9=F`}h!F0H6)TlAK`{h#HR1*k+Pv{7tf#)Ed6b|4y%CbsGu!Po0Cb**@ zTg-z^Ly-s>8=0{cLD0b?M)=IEK2e$d{#PnHdI5nT0KFic6fxDBPSr9ko4zEvQrC3c zf@LaWWye(`7+t4(1L1EU+@@wyYb%vubTX}C<9$JN!-ucYrLKM*bJwom+)=~t%iq6n zq;;3nK(e!UV!0nyQ-_RZz%)@(9fv8x9y)RKnoF<&=*Z&6)+D zvY|1G2U;SXG}EaRWmLg*mO%3iWPO~B?cuJiB9id1-}oF&YKW9g>fdwmJc(#- zWT3BrNE*DATZlb62jAve`WX={zlF~gc=a(7vlp^q!Iy=GX`Ei{m^kaIkbt{p^WVLy zdXb-m)epXkn30ce7)Br?h}1Qs3xUwBY(ScYGz`#uc&+V$ zs3R!@%3EM-q>M!Qi?rNI6DVJqKhRb(vH?XLJb+SOWKeO#r=fgG+9OTpGNF#JJ1p}W z$^f=9yZ-$^d$Y3k?Q5ou&;X?XaZxIW?)u5~s5Ga?P$gPs_TRrn`H(z~Dh2SN3}{Znxcs>#TWwcwv0=jo&N$-?Ow+_P zO%jRDCd5xX@kFoEm^@wg{D@8zsStt!!{h+1kR`EZRxPNYUb-Za-3bgv0W_}JOaVGW zg~?!FfWZMjR=av#C)I=zC?vn88ETp-HUc=Aw3505ELzT{FP0rW&q=VwNi#~A=m_ef z&1|{hesl>{)wRrDv?wnsoga?X{p9N=WrjttYQ0$epAUw{Ja?#1(-|lXjFv&Slpvi> zOtADkS|k(N4j!O;t_QZQ%9b1#T(7lc3DnniHP~x!>f4d9*>T903w;#`9X*hTn~8(d zo$&FiL&|n_ncI1egrYMcKOQU=e(Yl>yPMI`7Jx~T?%n&(g?bhcF0@!CC) zUOV*pa%%ksDMRCp*WN0XQX*`Jq=*t8RY=2nhZ-_Hcd%%U|_fyk}jl&Exo97w6|KhzS?X~-yvY`V~;ev?s&~-oaqhWx=^;{$_@zo79uCG0%W_9&p>z8jR zUH17>F+6UwSJ_B}=OQ&t5xS@n%&p0+Mvfdwb#*l(M~>v`tFLaI{_L~Q?oicCMNOhd z!epNjg`BjTdj8imXSncyp)B6i+)Bz+HKnPKt1hf3C6me{{P2Jw6a-8*HKus3Z4XD#w!Uf{C?;DRePL!MyN*urDHqV+lmgNrPj}0*TyS12rJ+i6lwUxwPkgI!6c3Z?`=iMGka@XR?1i;l1o%3tW`)D1agy(&Uy(m9_i# z(H*u`h$=aHXe-}27nLH^a_4Iy8mdsGSpgIY(w^|SwZk@^$o{q9U2?ryJd`1B1V!ky zCy9<~_wT1s1WJg`a*52IJ&9?Vq6miy5zT%&{m^Onpv*a7Ie=X%`UoG$PzZ{0a z|7^tJ+?UeP^{c(M-fsTTTbOus{~lKP{|>foW80k*{S{pu~G=Rw-eRl^9{jCE$H-72 z{!D_Evsd!^dtYKp&kySIY0(A>z!8FGArJyzKPk!zHJxczm|^{f;?oQ~JB5>M#t7sq z0;m^x&9i3BV%Dr#UuAcDg@-@r+1ciAvn%=A?C$J}$?;4}J052~{8jTFy1}lePNAvl zQfe#iN+#L(@$2^6M_wR*7%A%d{&(V~0ZzR1s~fC;leqo2gq8&%9w=S`@AGMe3S&R$zr!F(0; zGzjks=b_4lo<}A1^adTHqqq0FdqQuHkwe#hGylKfs~k^1E$^JH9C-;-X62x$6k1y?N-dBNb+j_`vq=nX5DTAh=nE~8P0-w++F|6z&GG|fE45C?naNXVy z_@$?o?P`{r!S!r4xRSE1T*Y$~*#g-V9)a!)qZvM&RI?gr`66gO1L=7<@dl9F5bZ8S zw+3JUx)s86Ge|oHNStJ2r_>+MaX<*PEK$(nor11qqqQ@N7zp}X%W=LgNYCpOH!XyY zFf8PDs$8UNtJ1KYWX>X`I%XJ#I*zDgDun>gQ|7(xI2D<;5q>L2{UW7=wB11+qqS{I z|L-BS-BdHu3}j2&bfjym-=ATE&=^iWL!_qyy`rGGAw(d6=a+a=;zp2u)YSa5|pdKM9C7wNf8?kK*A5CBx6Bw&Fe@ zz2Y9 z@#S3%+P7O-<=I^lznM&CUSnh94woW$o@bPo7Bz$=|LAs&{8Tt5Q#)HmFJ3^Y|0i*D5A(ov>c+A0aP!(u4N4= zY@x=pUA_kQ>?G1{$0>IeQJZl(r3Z~ z)mcfPqX;YAR%WzPdPvtn=q8#O=$1T@o{Ns4pB17;2&BZ2V76agdLCXTiRKF`#Twuw zqkurO0_axo+eOY~jiap|>DHd%Ws|*x;cxXcl1_$*<5FVChE=uEg^t@pUiCIYN-2cs zBDFBOZW-_1v2)~TUl&qMAp()zNjA>~qD$sE58rWq^Yk74HPS18h$} ztQ$|8-kDGQccOQ>fnN_A*?K8aAO6QNZmhY_uP)2`)i>RaZwi-RTfdRcK2&Hz-~GZn zLg$a1^7Tr1U%fwB^TciOKetW@mEOnEzuos+AGh-1gR7}seR;>pkx1n5;^N|tC4yfW zwrx|fvFeuox~6y-%|N$;O8p=`r1UVtc~F{<770SoLRc1Bz(6a}aO+&8aL_Cd8MSd6 zl1kZ-Oe14y+(a5-J0M*=*U73(wja{Q)>ZsBtG)*Z~vfGlL zhs<&)GUL@b&FKu#Wx;)~%As^U$0J6%F4FN3R=ew8)3!6lWM@F)CU>l`Q?mj<05=`a zrqpalt0XEG9HEpi9bxDwUzOa!wlF)qnf5$YI+n9g$M5N^uGv}8%z*MNHhei=Mm<4x zll0@Jn$ZkjCr={JPT{8F+25}!*+SRQ36?U`NdmG*f~q})rmM0gy}cyMV}t~MVYqp9 zP2GZYIRf-0gRmf-vG)*9M0TGk1CMb?Mc~pso z%iIGrUx$8vjw%Dtb+lgY!`B0W5iU_>G0rxOD|^VtmC{4Ef+)hL2@lDp7T+UH2ehq5 z3QH-osuvJWH)NPDpsRTvtx6l&@nyIW2*=K*X$z#|BGVaF4cG2G31FaU?f5%}ZlGt4 z$VF@TQ_uZOMFzHSN%pu&Px&ZiNf{|6UM7W`iqT@VCPX&LE4!YTj^WuUgb--qVw^-H z!m!kD-gA&n24VUTx`8G&O-M}Xxk#x>o`j}hMcSmoBQGHoN{DMZ=^4^bGM%0(;wwC7)_`;IK+pfSaSeL8FFk~}$Y1MzhC z3iaKG=5y${5(+~Wo1!V6_-F$SiLYkB+Y=&@2*(_A3?oL2AP@+!cI{eTeDOtUYinEQ zA9BbcOr1Iv!!TI6awRXk@B*<|XCD_SaodK+66t2p%mC7JNyVZpUa*OEZkmLlAq)Lz zhDIi6;ReihIZOi0b+MXL$mR@oGJ`MeFj%wL)fXX>C1He-&JO5z+M#LN6E{Q5bMcp# z$-LwDOi0^VyJ^LefaALT{Frt@AX3wBmtmo%&zB73ty-ZAEv)&iE)0*iAMH(KCG7{u z-yR6S2;^lI1YIp4R0&N+`PvCH0G``ziISH|sQKBFsEaqOWlnr&TGs6x99vk-&4Wj@ z8VL)Zh45wja7H!~*YY9!xzjLBgiqbqMbgZfCS?Z4cG^fSnI#OYmgj&#$ShGKgenmd zdaH+$GR98hW#U;L9)ZOE;`wl_n`%QeSaK{n{J?X z)m1>lqWA5Ws@A%f_8<1`Hg9_Mtt5~AL-l_mVU4k)49++u#Grxd_wRXd$*&qX^k9EZ zpXj4c)BNS37=OL1h)}TWt0JA2od2_W{{H78d>vxIA9_4Sb4+sCPa>Vxd;0k}FTUFO zzWj@e^VoAYi)UU)@UMTX`*K0PMp2>00sHtk^3VY71$0k8A7{oZNurG&!GPezV}qP? zdg$9+wb_UNVYHANDU=CmE7_5WZC}qZ)#$NicJ3RR!P9(%O1AHwly2^_9Xmzx*M~mz zVdvtZ$74MHk2o7Qxg4-hY0kXoUQ94*gu%2ueQd6B`RBjlTy%Lom;W@v?|$7DtNqez zNzS;SmJ^N%a@ce~!JuHqD@h*zXPgDIyAL4xWPXNw?{7xa;QQapC2*E5w|RS3Dks9R zsBp*kqyBtxjD~8D3HzF4Qj$B)Z|2A!_&MhW#hd*7+BmBhI!r#uLQ2Vfm&EvNro~V1 z={Z^wpa9cAEWdG!$ER=FGn2_|RD8+sOWEt}i5-_aci+L37x@}=_SAMn^&(Gh?#%PL@ zb{oJ|hmT~}-_2%A^UjG0E-Wl$;>3w8UAmNbJkG%fAIwQ7oy3`Eo=JUuJqI0h5GS5^ zBC}`Drn$M9Bab|iqmMqCbIv)3bUOFhq#44dL;8|t`f-J1UR@;{f(H8@djKO39E(3c zf^Jwm`}#+``Jd16StchOvo}W{w!2!<^KjA*(e(|ip0k2Q?|jOCYPN7#s1QqN+ifV@ z6{OdazSG?xPvUqENuQZ)C=w%2qEOp<5V%2u`xOH37L3Jhzp=0jRVy6zB#g<`*IirNSU! zAq@>TXkq#T=tAJd;&{y|WIWL;Pa5e-C5jOOqwCY(YD_HgNC@5XtMg|&$as>}g5}8dwMZdo&i7#y zhX|CGqFW{+Nnvx48poezNTX;X;IcMNkeD`nqeYz zRR$(q8_#vXbJ0v6nM5N^nG_k%1q6m^5;1*PnxWF$gr-zvy4mWr1 z%kt6B3aHX4(~r=4HW;>@4C@-JS(}bg>p3K(O9t6$^lJ(YOK6xv!;c`KY50ZuD++`e z*}ojk>4JdSin^%pePcVAW*@f#dHsf=9)M37Q4r=p&>m)7>aL6LqMWn+)0 zcGWFF{hCG2um5>#;_yrV8kw-I`?h|W%S-nqNi<9LJi=o7>D%tf*;}lraQNtxG{3$w zpF~nJ^Su-|-_^vTxdRwnuA^x%{Qw_7xVVnJ_ZUF`GM!{fa_&#+IseR1w}cG9toPHb zUFUQnWB?X?k)gKULxsEMV$ouoCCltiFVIS}W68zKY!)rHx$GwqqKzJv>m7c2WdlWp zjlA+qDFgef-_oYdE=PRFPhLc0OP$A6zll;+?efb@`wA}l@a;o;#YsKwVwxK_xZC9c zSMhcV*Us(Xj6HJu-!?a{@A3xv-);EShd%rd!gb;Cf5y4<_k~<~bpxBLT?X{aRl$6B zx}Tq3(Do31|D!bDJ-&vCyI7olVvyQ8k8^%p$8}fb^Q(3b)iX{GF@IstgPBL3igDIy zAr^d*;h7f_TzGCS(J^F@vC|*a7u*t}uwPrJcJ%HBcmF8Hnb(HUO*s9R!JPS154O1O z{~9^(rVzoro^Qs_-jS?WIp1#aWC>C*^jwODcPUSJbMY2_`GN{GI($MYuV1`3_q@A? z|E#EE)UV$olYOiF$9LAS{+91>)WkBLpTD`&c9vGf7#etV<&{@j=fCpGE4=mATkO93 z?#!J#H)mVY)U#f>?esF9ODvNhe^fsX`Pu)`Z^{sarr|g)N1XIqmaW`CBB98gS?_=8 z&3JX5_v8bYsb^^j!bK4VO&P-2>En6rt`}ImvWCh2FnYU(X@hi0`hBD|$ao$kQ)uZl zQfOeAn4uuL>)}tP2?>p0b`U6~Bg(!#fpxWi zO*dzL*_=+*txv?`w(DrC0-Fm$%l*Th<<$kc>mfa|M#ldu5N)M1QmTQbrhEY#Zg6Siu0Xbc#(4 zQ3?w3=@-eza~w2uymS&z^N@Z&Nnx?c5$O3r>FSCA);!IM#WD=kbu2u*u!-;lZYqUt zg^{j}G(7N`B!xl7@>6IOlP5Jt%buCT0AOJ~3K~!Syss>z7GUK8> zxZ|zW-1y3h-ZyHGGe=Xm>JF-xpARG}=DUxtT4>)ia*EmO+Rdu9F2DFrl<%DBXXI3a z$8U&Jx5?w=%XeN(c1f|`+9&$i4>CJQeTsuy2TZJn~eW z;vyx3EiBmaN}2YA3qUwunas9u0v+dv3RDN!-AcYi)f(4Z@_{{rmbmnikvFo}+2ecD zrp23@5d!+>`S`Rl*Z4G^aj;#9p?BR8Z%*ZQa2-z)Pdgae*QbmqDJdZk2(WpxB8@Vc zTyoB79RPM7KqiN{PUFxsULm5m?3foC7Uzpr_c(K1LlTN7+cNn=5fU4C%X>Xe;&(g+%7Im>HD zEP3`FG{a!T_YWt$`(T9dsC#b(8~!zi{+>pjp;DK8R)8V)CN6NFQdi8VMRkaic zLam0JLNm#;{8UA&SoH6=%xX=JZj#REW;;W|b@4(wksv;(n(UDgEeLthy33j6pk*#7qG}w*0bT2&zb-60wzew5VLcC z%axM#c9LprN_L&Vi0@7&e`pb=r4irKz|uDt@bTN9QNGE*a~!-_0{escxDD#jlK%K} zQkJ^E+O^dHq&}Qa!XH5B8cwsi?bu%|CACTk^)lIMnWYsZH+G>m@H}KZfwOvT&SVMr zrN{6<5n5>xB9%f$qjyN;)H@1eLcjbuZTcsx#h zRTXP$Ye{=HO+iUox5&q0LU}pG{e5iQP|twT15zcSeDl-S=IRx=?4}Xc`;{=@hy!0E z6u;d~c~03b<-2GV$*Wkrd8E1bSn>w?2ya+Vpu8VOeF(2PfwQs_!?v-ejl>vN$j1L{ zAiQQBBTt<)yXuRzzt=RctZ>Az3Ho|2cjtZS(+8IjIDAxN;*07U`SH5Z6o$}?iqP`I z5bzPvbo3$}y-Y{Ons2r%y)eRex#!rBN+Z(_GMz#u5_s`AZZv_rp_Wxm)zn8!j=t=8 zhD;lc;ZxVtb1#0tRo6d8Q*#n2CGUT-l)pdw4zK;|dPa>HfUkd$yz%`g-E$=Ch7F_g zsn;2vHVFsvbIwn1aMoF8;W!T0Uw?fs*Vumi;`t?1HL3gZJC{x4nj=T^y@%#A z`E(OQiUL&p?vSl+=Zfc-uqoO$hWTJs1CO0Mm78B*iS71s&;5B&zU!e>R}O_#<+`QL zozLE$JniZy&E0ytKmYzqiYe1get4Tw(Doauapwii{NF`>tiaB{OY1sVmLQ$Z-RD2w zR>XvTHgn~5QU3aHGoQ}tkKV%&QA+st8%buqSl0bQI}o9u;MyzmIOeo1)Yf^F6zBG* z90xvKkYVbiZ(k{GANl~fq|9Pq-}W=t%tz{3-hI-EFz}?wpzeEkVy=)s61HZ}c11R#Sfi~jkR^Yj9XwUXyKOl)Z z{s*H5|63zv%7Clso|O3^5aXLCWv)UU{kdNN00kVIlUP(|q3k6WiLTd{#uy7Nl{$Mu3Y-Tv&dW2R4eQb5vk3F`(zw`fYoF-yaQrw$%bH*4+nT0m#`h5Ipo&LVHW!F6k(KKy6WQk!07%^y+T-o0j z9U$G>L5Q>w^m(3XYL0aMj_?LGuBh~{SiKhMc<6|&hUc~<+GxISfnje;e7SC61oH6g z6ka-p&@D78pyJG1*v@RJ3GF|lN|J=>$4fP}#zSj{g_&1|XJ@iWTrQrSP-#0>5Gf^g ztO4m|uLUXFqQ!+k^Mx_|;jBUIasbk<%VIallmm9<^8q0)dEiAnPofEdVd&g>-Psr) ztYr2l%h^9rkaI0cDXDcbBwd@5y?0^KH78;fx4SP5FQIhW2#ni&tb6+t$_xvChZ2(p z&t|cmV6Q{=X2K=MU=~>jAsUcU6pijzFnHQHc0YO=70=8;f3+4f=p#6G7-DG>8tc(Z z3(>ypTPo07c# zIG?21kZ48^Sd=;*n_QRm;Q(X%mojd*QPijBQ#f+K4TDCG-Y+8q$G-dV$DoTy#&L-3 zH*h~QBgTF3+^j*ym^`z8;XpCZtDvxM6T2QgZCPla{%<>V?)TTfusE`1-XbDJg$zA@ zKa4RUHoaHL!Vf-V(4aDc!v@S<{^FOv*|d4{KF3WQeRE)7!J67gU|iXLqcMi&S0+BI ze5=_@T@kEo65i_dxB^_iMk;8~EF~FNFu1(@2LpGTcxQUiN}N?2k@0j^dE}~N>q)R( z8sm+mGHIrsau~z*AB&c?GpVa@=IR@tq_L@uNVFZ7+Jop~EVQ;Iw*;$zg= zyLrj_s9g8@NBUS_1YO&l%^uVC@Nw78h1=DhKJ;N{ zqdh4z8#O>~#q!s-jg;B6AVYIi?oDva5rOSCRNAuKrhav&8~X~>V0ByYdz2c(1M*P{ zlp}#xQKZ2uz#mYK+bwtAv*?gWmBl|hd^S)jmK5EqYd{UIe+fKlGB?*pY|DFQaqrWooCx?Asx9@Y`4+SU_|H1vdf3iV~;&XSy>qe9B=?X{_&6b?6c2W)iNzO{P4p$ z?X=Ul=%R}{DQE!ViFC2;Nwf~7x~`OnEiOh=+ifLdcYh1D(;3TgGM(-*hN;YRZ7I=% zg=m^VG8Iz^O=-c*7hWZ!3oe@WQ+%dQ-I_|~{O0d`nQrFr(+`)$UcVKYL}Iv$r>-T< zAiZ)ub5|^3NnbFQuEfhY5C@{s4z?1BwEQCp_|}2XjU-mmC15OcL}+9ZQM9bhvn?et*C8!k z44_cA&`?QTLesOPkf6#=Q$BtKjk^!!k2gL>b1e7warupp^ZXxw#+RQiq1MgN&#-85 z^YDQ6P8umBBhEb-v&av~jUXOH%2H3tGi@gs8gc4gZ25dS(Z)3WjohFAdOJwh(^a1?=hSN4e<8+c=;CT!^`o~n_wM?14pA56(i6v-gBXH z4gUQn6C5-UfxtI!KCG@Fu+J3o#*798!G&MK%4G!hm_*)`Nva{)d4N0n(H?YTXyD)F_8kR4wVC2L>l$HiaeNoH$T9;RJojs12LUkg^?gI-i#qnf# zxW@QsKZL185>0Wel&>+p&MREHaD^p`!<0@PNbS<)tXN$^X<7dd!()oBtp9vn+50cN za;iU>VZSp^#GDvm+3R00=i!$~#p0Bfm!JvRXu7FbW316@sBTP$Y$H&!Yz0kCb(9`H z#kZ!WDc!hw6;o^rEt5n`XRs`jq;y!5j*}Wagh7Yx?&8LeN`JZ>k<6xONr~_r@H~WW zAcY{7Ng*Qvh9A9qDT027 zuSZ9E)ay{d&QU)k5{VxIhviJn#K!ez-9d$Zj+@e-R~J=(<#uR7aLtjUn6Y3pX=fV~ z^9&1y?0GCT%Rj<(nm1IqJbQa0Gj)1?us7qOy3JmWYF0NPQlwG4v3Ko=HFzhW#tj`I z;&HFb6W0*+c#*Hypx8CKd-$c3j&L)0)O@239=tCdAIkf-9 zy+`)_MazUQXCyeTv9QbAkGcCXL^H3!# zcXn9k$!@lF2`~{wU`+y^N0A36YLGp>oAtg#m62QtT-RZq23!oBPA;)?J8%K2Z0M10 zw%Z*Z%(f+pQnXy0ZR?@HpMYK3Eqg195V*95^#EQ(DRQ3b@Lj`E=OvNdP7QE8P?w#r z1J9t8OCx|gvVR?s2Rr~wMv*&->~=bq=Kze(Zqr1a%coEzmP8R>F0dDlkP3`N-GlS`Z(fg(%pq-Rp*7~sz+&!bY*G5JBZP3NMBz66St8H76DE!Xooz-=h? zR2)?%)f3JG9?S0k`E({_2BVH+%l5ueJpFte$C3Qv`ZnR2X$l^FI=)p>W_g9p@S*Bf zHEf8%ORpuj$?vLiy~De+Q`9$jd@wKFI&I#k8E(F=0K=dY@$#ed!rXjU6KmHwj2zx` z*xNz-`F=Tnq5bEM)5C?@NwocTa`5;Kapt|6;g&b@2^VzUkr(bs^7_LmZhk$V!u~zq ze_y&c`DtUVw>RK{e<))Po`WwuxTkd zlG$ZIgtso;o8P{=f+y!~-0JdO!V0VfI>m>ELZRn?lRHjdxNso=GiT1^!3Q7YgcDBS zFMnwhn)1Rs zFaA8e-kz&9r%iK9@>-YD6V9kRc_HW!+Jr>WU)^ji%N!|LDEKEh& z8lq*(f&CDUIl@lPLbS+b}pnCQ3JJu;pz zYa8dRIjQ!&FEE8brX5d8fgw95F}8;g0%3lG;fF#)GyQmW8YdOY#!G{AT{M3f&G0KF zOVbvF5E!AtwsvbqmW*ln1J6mfEth>6E!7*xVizZjdU`^J(n%6&G6!Z#G1~N?j+CtPG7K9zh{8$bYNC`k6%9Y@ekpIzs+SC`t6sJ2m*wN8YW1Z-yt-Hp zDdS2>%&{pyXaZ)TA5Y57wqqYQVD$N002aP^%_+&v(f3CkI4!?vQ4BZf;MJu_&RB!J zM%}NYvn!|yY$lB)woVbBH6JabCa(%1AhuCegx7q!jLmE6F*QL`jan|YbQKNJwBo#k zijEhW2A;%ijFDKd41rK3k3xX1p$mcLx5)2bf?E|uW=z~vQ;yegI;Q^7+e$?vuRmH z|KyMmb|}uk2@!OiNXGByvoF@&e&mE{uV3-|Ykut8)vQR&tN+2ofkXF9#G47G^u*|+ zex6=*%e4zfhx1SFH?&ME88a9otUoho*zmHW_Som(jceA4$bfQ;JhSnT%Z@wgyFq6U zcZtk*8tk%gSutxX){?i+L^*oYi2CX!8xXFEo^fz8F)2-h{9s5-D+$XX7aWQ?&^I_a zXUh3a0skf6MD z+V+{Q%&qT~5;GW}=T`;W56|-kp-RQuPwesS@Uq`d$CHwRfXVBNYqre;rW@RO$}S8q z33BGc3$||qlTWZ%_5NS~Se&*2HX+;aif z>-uHU@Sz6JKB5l$%=c29aMl*~+|^>#h_?IvgO9~nzS7~dS^e4PuqyufLW0vz?7pk| z(rXFsyQ8RgjqU>Zd4k=yvC?Ac3L7C{R69GpvQnM0Qk{MFgg`)W`uVlo@T>f9!~2Ck z^dSfBdsiEQ_fcvM0PKWh-u*ESx~g}ENXt9;$>^qF%wgL{%4Fi|ySqR~rOLMA5Y&M6 z&Ftr0fseaiyhr>9MF8BM{k*kWhhJyEtK$G}Fp4~w*I~MgQuyq`w&QBr6f2WZq}vRX z3M2&Vm2HcTA`6c0V!er|!Tt=o&zk^6N=>0{@c&m7!SUy-6Ln1flx_10RB70I zJ$z3gaBOyebYN+=oh{``4(i%;P}k0-sPepT439h&=i&<^IpshrRykaKW0XJsp^#uV zb<&mV9iDk1!F9h-Z#7OlHpn$MMS1SU#Q$UOyyN7m>i+*e=iWPa`u3LHluZH&gb)Iu z*H8rkK@lq|qVhZ{;7`Q%SkMO%AK^j8f(22*!h_hTB2{_~Ng%x^yPNI1vpfCXbAErE zneCfwLg3NI`Mh4q&dhD+p1Ct~&*yx;pU*gHZBMV7Ffr+uzfE%3Apx%a^61;h_kOgC z`yWbk&RfQRY`3?V$m*)fegCU{%NGiS%wNl>ZXCb=-`|kto}Z-o<^yF+o3m?~&a#K| z$*pVs>nSS18s^-At3@MFvA=&J#fA!%d@vWPPw!Q zI>UoxDGEs|p1!;9)xP_?Ut4!T{^y&{$_*x|iK&ZUE5gmt=7%!kACs76<4f$?&ZkAd5I$}RMyju(ps`>Qs(tx4@&^XLfY8j@`3_I zq4T5fH&iZTj-fR|O0-twlf8f*Q^r(u&yj}IDb@}uh1Lo`XUu$y+eq6*DGyI6c6eE4 zo_idTS+jWQJHN!9HBImL_LH6{n-lNLd)^`IZn$SgvaOE_X`5pe+R-5t2Uo>t-Pt?o z>8)Mg!jkC?b$|Wu5`L1?|GRV$*vwy3d{3|cXZ*V41pBw>>=VL(8|XdFal83*^V`k zBqSw)elv$5x;l~R3;`*z2h3|$XE!qIkq4w_e0-#BqqQQJOwzVy6(A@pB>(IdLLx&E zWMvsTn?q+cZgUd{pK~mM{X+C@X(8oxkg*-ScJG%`%Xc=#V$t3~xbx9xIP1XqIN=a6 z&nK76JfB1E-?q6AW#{m;PpCYA49J)-Eu3C?q!rOgWu;#fh`;80)dA%*n+~5@9wK~7 zdA>e}?wNgcb_Bhmdf{1u35Y#YH4` z-kZy4{(e{X!BgHFJZ-Xa0z!_^!VUQr(IjFO2^3nsHQMXuBu=+w8~LMReLoJoViHl3nAzTsLC|zI%%Wz-^dP zmE!cT&G<5ssp2)@DvZ+Qp2G88VLgU4_!35)Qbh4vYoc~!8Ex7+RRjyinS&u=BEU3E zDbKGkeegVR8b*oo%82d$14Awpw`*kA=C*0ztirzPFv^*oW0n`mlARbr>}1B1GUs5F zIK?u$Acj~OiwJNuhA07}YPlVw0xBNo_Y9LnPXHHA()M!TT#Tm-n7;Xc43jd~13$); zpY4v6Nn#9o55@FD1?HM7k}^+X2$|yJn+lJQ#Slux>7B;?*83yOd-I@C%`xVyPv!MlH#IwnTfDvEArg= zrxbntiWRTr`SqPiPCY5eWgj!uL33x@T=S)JK5}^vJ6e5?I4po;3m$qr!=LU=@xmjc zBeAuHU;HM?RhP#(^`y}R@rCC_xb@db&Us6SZ{C<-!F-3t28+#G&CSRAFN{z=MU~)G z@s}SO!sTQC6{TgJPs=(pxSxNNjT;g?@|!HTUz6lRUysnaP0_i{d=hg+Izo`0~(_I@!t>U?&aOF`xA$A z`*SVa@nS2}%7fg0`4POlt)JC92Zz?*(VJn-&Iw8N*NqcTJdt=j&Xz4(uq=xcPdt&u zix=~~?|lz|B}He)1x| zeB}j1ViA*$q%tx+ya=XZPIPM z%$`+8d*@i2I*?MZ_~6-euWu(lX0%`lK~P9~6T_b;r8!4y{W#ny+m?5nC8ZTaDU#V7 z)5j1S4q!`3Dlv$Z63@#oC|CKjDEwB|%$ol8K6hui9SqRbJqc+fCBZiRG+(Z6(^taOTnHb(JNjMTPfjP`eTtu}&xp$HG2o zL{E;3FFb)vB1x<~%6M31TYf;G&W%{9z5&?W#^z_9ZL$~4{>p-* z4$;9xhD=Knq)tOsOF9H~4%mhS39rt?_JBu4q!G#YRML27a-wkJB+ zdT$x~U2p=HV-y23nre8@JC5hqcRo&HU|6kH9uITlH5ZQ~WOCd4SoiaXXz(2vW%RCJ z54HM+pg*0Tbdq6Dal<|@JV^WYar?7R=qt*_>;G1wbl@z4rpEqL=(ieI`a&cb8bShga^AqxXsa#;@-o*(A) zlg)SHy9&Vzmwm36JAPh0Zu`I7pXTf{Lc1;hUb8OGx4ttvr{t20%>CY`t=_n0r!5T* zg*t5AZkGEBT3S8seK12+rR2A_nD3x$R&&W^J)E{Q$h3NkwHxwWdqaXtFOHT-nG*gX zG4>PwTg>eJ&=0%vha=Q9Qf^yp3J^mwX*V-u%yq*S27kC0)|7@v6cZ44Q66Grj#IYz6eMz$$GqD>LTml*A8M0+uYU@MxUPQ&zFk(3$P zFHd4ra0~fgB4yTX@VM&o_$WdKOzrQNK2t_}hxy_-Pv$?@9%4ttIF*xc6 z^z)yJv*;j)n|?gV4}La4WrgIZB`&}H+4viSE!#YnEDrF_w~fDqFS#hf^*0TW&uc6R z*WZ+&b*E2tmE@9(BIBYI_XXNE`7|%E`P(l?-|T(yH*wr1LCXf8*$Zv{erJ}y-#N_D zUU74bnFo&UzsG);?cTD=|H9A<6|=v={L^c8*MvNpbX{~P1o-PhO0*=L{4MHgKJz{ZUm`S`~_ z&boDm({x>z#~ynO+qOC4h$Du!>*(khN6HKi<}Umqa^huA@yE9(h2Ps5s4 zLonnLa|2k7^<-b`x0X~kf+$D$X7HZLWLWvLCzhmDzA|sgouW40wP4{vHPf4>V?~0* z4-F9)^@y;1%FBC?yEVZZW}kELM`oTd|HFw*T@|fQuA%3p^`yH8sqrBmEmvxO!(Gqc z{qm1oyy&z=Gro7!IZIlPzu?F-bXpy}_BYRpoew<=IVFV$Wr|@_+_69CuLD|nsC)`0 zDW4dIKsZ69?HUqB2q1(G#!y~%NCjiL5o92YE|jnowluNU1yVu)A`mi5tbj2wMVdN* zLZO#*%-6H99J8HP2q93uhsvgq(m_ZIJ6erS_u+*^s%P2u-)!yfeut{7h{onr{JJyQ zb06W<|?!>T4n3 zAXOULw-cN`jZjrJ2yjFWwn3nw7I*q|L|r9;?b~4EDx6~vA--fWF%4vLsIDH=wsv^= zX=H5`rmy=Xr)jqQ;01)Ag{<}vaDIYlID93 z{Cf4AibI3G^`Tlv)7#cNCzDDM@f4YzX;_md>;yS!#tfpqq-#z0u_EI!_ppkNkRAJO z>k9piaK|7hVpcLkaAT_-XiwqxCLB6*2lqG@Wdk`xM-MxC+eJuNk-+92GNK>HQ-ENG zRVG?qSQA{ku7z4*WA*mXa^FkUWvM)oKtZjURRmtz$j)tTP!+GuW^*@ox3`ns-iGD- z3_S4im$On~Nx_CKZC6oQc~xB?LM)j@wf7QGqi=(4t1xfpYbvG701g{&dkW7DG2_?; zM9L#b+v1upy^lo;oB7_&_t4WjK=aHxuKmhI9DLwRl&8?XBA?DNxTcdGe_T#|K0-9$ z6h4OrL#nggVBx}r)Ya87ZQ3-n)|`6kskFDZvvTFiDQ&+m5Or;inqAJcGBXxAer_e* z$sA8_>?M`+IeC6H*Pb_@qpo`rfGbXE=JJ!9x%_vpGQU2`{CYzU6xZJ?9QK~Y40e8q zzU{YmceDE0d$UiS{=wh{q3Gn}p|dUt^3}H|IP{bN_05u>eLl(Y?+6g9d}Ek|g$Fvk z{hZN?;raVHT=&&-RL8M(nr#a%V06l$b+_L_J`3+gJI6!-+KeW8ET=IkKD>(Di&`?>DWeMgq z+x+^@B)xr#Y4sM@UsKMz-#&G()DlW~Gck6cngOl@zB}^8XTCqc+*5)a__oQbb6S^; zmqb?YXS4pn3=du1&nKR%n^J?ktme1x?jn~Q_r<>*xMfN^8IS!iq{)?-Qk;>v9aH*p z6o#lMVm8JTWkPmn1Rg2;y9!hGGZUlenGCI%LH*Z9yq3eLDZT`p&v2>GTQFro@7hfp z#$q<+PW1H>kbQZ(OJk7h=ZZaGX{DxtFluO4fuf)6u>oIr3M*;Uu zu%DMOs-2%quxunc3;&K_SUGhZ=6&2#T#WJg8QGpM7heAorp%~_g9^ud2=kte#R(YF zuh^yqOwF`+HKvR%P}pxZroSe_!G&cxtelYwo zdv;SVORjxlx5wOi*IrVybZf$9o8 zCxG7BYvQiElSFzGC#C(=NdYPGv01S2Aj<1%Of^hI0!Xd7+HvGxfYlmS+m-I;D=QmC z*}S@oQzspIWdGx9;e~a`tQLI_tvMs5GYfmNX|MgcH9DCbkQqt1AsWT%NfFTkl}*gC^nVbwavPRA!Lf&Z$U=9gGesVu}z#V2z1-9!sK)h1MEBodEPM zXGP@%5z<0P6MbDQL(&>o2qfALCUR9G$FJrcxuBxqkfx_s{rQEP>t;_wYyXRWZ|ajK zsYQ&~m!QrGvTE%%f=`z5?JvHMFI|5JT|EQXmZYJsoEty?0iM78QTEriQId>kuM~ng zPLOqpZeIMK$2t1_r(%cP2tu5zHN>jx0Kt7X{F!i9l6Y{uf#oziz?v1?c=ES@edQ1Kli!g8OXBw$HBGjql}um47+H52`?y?N zJLzm5y`zQBPE-2W^87Mh+q4~_Gy-kN%VY|rHQilZJbcIh5Y&_}yKMzHT(y%b>jsB9lf)hdL+3Q$0KQ-93+e$*rq#_t%18z+uJXPg1#Q8zEm2 zs;MQ{(M8(JQKM`!LbG}G7MdJ~zIEyN3oY9|eo$vGcHBkfb;Jkk{sh%l86p&iv~T_a zVP!EZR*P#nNMA5=&M9a)%#7EQ_HqO)o91{Oc28y;)g_d|Y3+lSUZhqu0z`*7^_s%9 zqkBElJv-5sjW0(NBojd(m>#c14|MSI_wVDeKR!*op`40_a^h7HW`XBaS$NLk~R^zhH!N{`u$g(n~MxQ&J|A zSG=^ff6}<>hB9|(vf!ny{akgr5j&s%qZdi##(O)>t%@VU3~13I+_ljSQ?+| z9{)vs*GGE@#s!x?UN+la4a_H?$e%)PMSZ}P8-5(3fZpJ9Mp21x67hy`d#+Hhe@K22U zewJ?A{95jlg{OkbS)XUt(WSeOJw#7`I%7{SpOh*PLf{A+CtweKm>YMoKdm)>W&o8- zAuJm^5G0-GV@q2Pp7Kqpfq<~>5(|W=bV3Ad*N_Xs*us`8i*gyGr#?>Y0S6MQsX@l1 z5;2h!T0E?!zP@ti`<@m;jB9rH*4r9liz?^46^rA20^vWoUW5{vcta)`*II*?Xjz6p zBl>*?d`+_*L}xQd1=tQq8!wdrVH70V+uQ2i5&cLpl6p6@%~PC(pAxh(roFpr*BAl? zz|WAWWH6Gzc!V5vaBt zjtiFY@^7BP?#eOe?1Kq6R1&U;W4kVi4V`RzY8CUOLu3MCHYzO^TVWpl$wPF#+`|6H zA40eyg6}K(+PZn+Z_m@RaR+Y+R!khfrF^uPGr!z`XnP;}0M_U$|swiT58NvN(wfx#DQ8lYxpK|#-$@S($s-vHdwVUbPu!Yu*n+eaJ zPH^TlR4R>5Pb?fYWoe3;(JIarg0)GnHk-^64!AfQHX_@52n&g8Ii#LkMw_(~9SBfv zJ5&Zjq$2_PVgXXV6>NQ4mBQWBG9 zKswo-uN0Ed?#xAs@86WxGHviO3AC4IX0(QQ#-+VwfSp@==~NzVMQbGrf;hlI;tGK) zEuz9A>;#CpQLIqexGXlUHQ9W2N-q1i+;R)I+_Jaxs8hq1?$jYce(tLHC;n0 z8Gy@v_Xgc2EqU)E`gdGO_m=B`j#nPdKXBGZ)W3~PSQ?8HE^s;Ff;Z2PWnUub3Z8sm zY7_A#lu*JjCL(1#;A5DG>>>N=+@R*xw{~#xy|oh(GY4N7=7paPj=HC+nrrj!+pDNO zaQ7MY%7Z`tTMsLLpPFd#pP3}ZWD?{s9wNo`pRr{mVAKgk{1`*ZoP{YRc@Sd^JGMLp z%%HhA4f}nJnxz6$O7ayZj-GxH7&$%Aiz)A!!SEDN2S)vH9!9aU2BV&s$Xnz;F$BE_wz#-Pn|am-92jKy?;&r;f*}TKQfY8HK8)j7yjluzLk79 z5R|*mj@(1^cIXv}&Y|m|j{IPTN3OqrUmxd9#X$RnBj{8rwT59|rhNvblpT!*+nrE= zT)_-h7fN=7w01iqJsGrCAT5LyK-m_7+FIr~b!3G``yTmxo_sb-KAE8-o1#MHi3ZC+ z2(%Q4fP-wTrfJE6SXC9su)vvP-y;I@n-$IPE2uf&KjE<}XKcKtXX~5??S{a=#ZH-b z!L}Wpp|Z_=L_=l6ZPR*4iIU4_>CLC`QyK7l6V3*~u#&To$*(A~lA}kv#5GIte#KwnSSn4%YtxIdf zj_%IDj?PY+Ufs;vmd^Y7+S=pOCk{8E-f=lhz{cJbTmSTT{9K;Fj$St2{Wy)nVy+vd z!FERxGDD|=V3rd?<^`|b_Z-WgUWwHd;lL9PV!=rZ$*%9CN!d)dCm!Sp1WmTf$-0cy zFRth5<(nboqBLYvXr}&>roR0a^=;}Y-}=%NF~B{&`RNF2eI5p!8F>G=XseytUwqs0nwrh z5%mbU*WW8sfuBpEb7_PVL51@pDS(+Y(e_c0VgU?H$Xq4ZCPN!ysnr|HmH zqVs3v=uPgudD*`j%BS1Z?EgNxx7-9I*FK-W>i0LKmVWfVqVxW@n^r;zCH&)HGVSlP z7$w3e2lQm8;wMYnx!{&64u02YS=roEgIw}pEi3L!kxeM(EDdtl#StuL_dh_%PQ~xu z*Twq3O(=xfj8OpW34BJY8Sa_FHd`<%q1|Eqh{v0zxXnh!D`TExeA-fu(Oxr?;qfV~ z(~3#-DPn9N3^K9eV^`aatO*!fCi6E&$CVe!o5YBH+&IDU#-2+DQ;+|Co{5vQUL5m$ zI}4p_!Nj>|kPrPo#bGcVt`CZEV|iDz-beZCf37oQ`eVwr$(CJ5Dk*n#9Jiai2PXxH){3X`RPnA8u!ibdQ5YhyAHU za@k$@=f@Lji~iS#BDS4$$AtZ2cZ<#3{;7Po z_zA0!HOuO}9>zqJVOs|SDJ~*BPNoETK5w`x_JDQmt(lg_ky-Br1?#jc;@WYXOySRt zgk5UXMIH5EZOz~Y6Jll@2w>NQ4*^xC2f?}bzAYNjpw@NJ?Bxu5?>2KEcX6-NPFl!y z{d|CGWc1_BJoExTb)6p#PbiKIF<+1v2>_B(EkLas`|#*Vu9?9G^EB{g;o~AaHqH($ zNuKlqsF_Dir}WmzvhmtDq?m>mfTtfyJ@qGM8|q@T7SFe^tu{6u+YgCujm(>eCt&O^ z=blF9OC2XR@u`%_iAcWUrXLetB@)!>ZYeK(v$S_*^3@~|$GjkRJgU%<3b&w56>ud>*7D z6*ZJ}O8U>=%$B6TR`i7fw^mmokPo;Tm5S@YcM>}3M)3t0v>m1ecSc7p2$w5nfgtr# zpS(YJUS(}FXww;9QFyJIx*F*XmL@brT^>gAWzlo0z3jwaf|n||7>S^BTu@HmKBIAD zh-`jsvXwbf-_(o1oS`!$P^3?gcoAND7F6>S`Z?=VDqwS`h?qi#L>3K1OLrPr;i4l% zqY8of2U(Z>a0?R}+n^GSXB4@j4;5zM`>jThjEldQ(#T*ap}z+f5{k~i5;|TKD;N8N z@sT^!Y|4OtAi0|zXPS>`sm1v1>8+)4dTWGIVemO@)UR3H{qQv#dimo-kRF>1O(4{H zpUdFq0n8WVim%)5ZKvy1cnRi?>H5AQn9d-7I|st~k2oU7@P zH)t`L$zq}oec8)YM~8-!eIQGZs$8Yvv$(}onc#6Y_XCtomEqA>Ve8347nv4iA{(NC z6c@!z93U?cMd~|G-1QqtNZ{>jI|mp)eqJbeV$NfQfGnXekpZew0Ab zWuA{_3w;XHywT?twvBx4%N=np6!P6xkWBoIoSx|754^WS)R z&PdC(d1jlgr?Z4<<=*?!JVvj_t|2u88kO&y?7dme znLA*-c#6vkzTM!4cfYH?jJ=$rNJdS;k99r>)M)KF8GJD}5wbhvWc3gf_;?*9k2UTu zGYBLBTR7>AuyF51~3sAhimh(?Kgk z!p-zEpS53o_lj-CFJ348rtiZh36%y{d(OtS)~WJFX{kvrai_Y>WoRW$9~#M8qK$bl6MlXqEinA}ixdTGb6d}bc6PUPb`X+~OXE%sbA`MV$%x*x8CY3HOj>Ukq6&)<%l&?YK; zfBBnMp8LV^Q0IkAXg|5KYkseU8-mm2BrZakURmJHL>md_3lq@GzX~NSWPc1~juS!R zsYP>-icLrEcAv%SX7yeYkaZLVEEiKXO)Vf3JE%X9+IG0=WrGO;#;$cf3ud%n&k!c7 zHXT}%#)v@U<_d+0i~FT;Ttf7z2$l43lJG^2$ogGt{pa#jNRwuE%^_m#z)o8&7}Tlc zae|$NgvZ3@5r|08pW7O5*W=XkG6zOrhT=K^(kPK~%b zn~e2ilnBFFXc4{?M8W`J)?92>dmpE9*2P2q?(D_BUZ;=@Kr%P5G@UQLeO6%tGa)@2@XL2vWUIu1I5Zx5xj``k5o%DdRoSUP9w~D`AaY1 z;d1Z;E>-yN?Vna(tg>C6O588yPsb9OM4gSiL?0<+Oa8+@lwz<6=)%Tj)f#g`E$YOS zq3RkkCz;H5R@f@TT(*h&l6K3wyy~*dHC08E?Gh(X#PjSc)6cLZFj~O;2w0q=;0Ue4 zTv|S$1bRiy`d9N^Ea%BtSF}L6{{1z6g|F{a4Y&2y5W04Jb6qRVvjG~Uw?A?J5KU?t zLJ^K-(6sq&XQw1-JzgQ|;0%QzRN+x>kf~C7@8PC(l=HwS@|c8>mKeOU!k|UfZG2a$ z7ldYL#Wu(6VS@K+-fG}BK@B7Y%|^*xP?DOp_{p3&;pZpq3jf#rhSrs*-Pc3(_7^PS z`!aR_9lmY%HAAX}_5yb<0B&qwrb&!8s1{a_AlViQ;mFU{P*siO4ZqV*PYeY?%UTAj zby$dK9{SHcQWn0j6%w#UkY6i28s-g7uJF^nYF0Rx92WUOCk z7&${P3|PoAUAao*^7EQtd>U|Pc&a?@@>WdGbGh65(0AvTb4>4C;}czhH#=GHOFFBi zVuQ~$)k0?X#=po)M49_8q>&kRaidr(&qltZd;E)H!1?c)w@gB4~U7G1F65i5V5XB)1JYT$jT9SPbJ`^th z_1gupM`|L1j};%8Si`R17;<)v>O3GmTm#PBRU@qStNq}IP+k2ubUyWnxmM977|Sip zm`8@l_2o873`=YTDPXV96f_ADMdtTA!u6q);gL8Z*xF1YSE^t&!#`HEfab`*!_XjOc~gnYjmONR$HQuR+I$}m_bv8glqN2wo=H8X z#ozl)87xyFXG#=SSPEltuoVT)bZPB4{^Bg)c=9sE_ltff?3`rOI^IoNee1m80@Iv;9M-FF3X5DD@8KT-nrf(yK)36dT?PD2()G_ zV_XM#&+;BErnxAF=wyR#HiL90TL?j~Elbx6uBFqnl~hQOb97si!8yatbu#!)qgqE5 zcxkZ&bS7gPgwR@+mo7GS_gV{1(Clt@y1ttIddy>i-f8A!ud)ayUfS$?#J; z4~5tj34J1GCJMD(C@3huB=ylwc_cx`YvJhuL6q9>))iRh9tNSYz*v(nc&%=qoI=G= z94LnC#8JF&Pfd&Tkp_~$f|3V$isPG7mB0UNs-Ivv?`Jp>dm@j`frZ9m$Ti|reRMGc zZ=r_|Mx#SrD%moAuhIG=XyT)GjB+zOdi=Js_D`tOjp3b*qPDNe)s}5bbos;@e0JVN zyzGxH4dnYyqu`Wh!vhFDyubQRlAr4ozL*4_-G-V+^q^|IZTKGcXpE|DY3zW!M7xVJ zY;-f5)0&{L54I@rfxudUe@LXu5XqOS4YnLBW zKbwuY{_b+|jYSVm^=ZsTtGDNz`j{1MzP6}_ItMXLC9$hfL15LJnz*M?4gYxKs>K&J zi@MR4e0A@SI62AD?K)%Hz2NhL92Nu{)UusG)nnjN5?Mw*^hZ#_*&(I|uiw=r3wM|W zN7cK-D}bQI(#DiuN(@6M{FC>$SdthV3@Cd(F;gULi@VHmxw-Dq$ufJuE{21x*-Fw+f7`CBy|l=_lHhK@ zmOYO~9cLjNtH2$Zqw+Q_qgv2Y;55@kX3Gr8RTa5|U9B-`f6#EYaalsh@}oPm zOt0nSHPiQp_BT%U?NL_qRnHN5gxLn;-_xKO8t=^orTVLprrKPrGgicBB#qKp{^k&D92Uw%5#5M zQlDT+zIqCKl-*K4ITtySP%@Kq;_BaSdL2YqRROdTg6$cq*xYc98vK@j)|hLl zJOO%;AB=go{}CCMO8`4F5vR;W0{d7})ewcxr(1Xll*A4-vUiUiqL7^UeCfSP8irkE zIYW_lH*K8ia}NU8n6|8X1@h9TEn8C0jP(?|lMK-waV69ESSTs2wi<52`;jmOS6^9@ zVJUr9CQyn!Q3vd!#YFpaC>oy!M6u`bv9n~lMz=j@)pcj#;?J3JvN1^t9cAcp`sJ7& z4r0cHzf&?1SjMd~qQ2W6q*w3thR4RkxWji;d9Q4F0kK-#c1ssteNK9m=D7ncKaGi> ztlQeq)N$syW~X!vZ}{olBT;;be>H0vCryIn%@chN`-4jxPD1;*sGgOIt|?~nCATRV zC|LwtH;SBSpU6hqntE2qqEW~#`w;>nu6tgI8p`4lQYJ;h(nHjkw#YVdmb)eqqkkX{ zMOQ8OyF_=9!cc}t#wryf?jCwAm3NvLGG6tm3u zAC}InS}g|> zzLw(TTzxqbE^27$QRjHq`oLU=4z1Eue)*@jGcH4+M_>?WS|fF^XtW$v6LL&?j1<|{ zltlS8I^91m+Zs~#)C7fmY5kdon=M)Jm~)5aK`7_*abFmIjQY^_;Qp!fvIal*sR?@w z(N3V_;_#-sfoRnjEL_KC5CXc0-vq@9=jsAR!sc?j|F@ot(8K-2THq`(T3O(WZe-T! z#8Ih@)owJE^etLC48z)O{E1_(CJ(rB@QEhY|eRtOQ zh5=$-j+UX~Bemd+Ccp}E*Ikm& zT1})%3;fi%hX0}#2E2lG--^z42=EUGkSE?CM)>9$U3rHW{C4TJ7w>%ho9eQSm>Ev3 z|AIa|*c#emkVuDcW4li_eMSmiu$koN?H-;Wr%?+Z4+W2u`3-V~M~zPVj== zXZc+sICoYx$wstiECtYaEL7!BkmA4#ok*NNExn{c5AvWmj8;Vpj3RTZ{HuOlNRJ8<@h}0GoU_=Etekma}}4{%h3&Cb!8P&L_;4WK)1G&wp!~@^#pRenx8c1I{SyDnucas`#1{ezdf#pTQ1buKw4_%in+CFAP6CD#8?!?{V5>uzCYth zq3>G1yVGOd%2Ajbw(_7e^-=;cG$EFhqz#%y3KPF!*7R6!W_uDH$DvA;M=VB}3d{PK zTL)i2_Ul!UoHW6zkEsKg5W{F|420LlHioK*$u$GcO;PK*o=PPWXSNsH+qLo{1f@N} zi_pU+fdW{{ofcxWytHp>*X1vMEg!9I*=zm}@wG?ztcho)^%KQ%+ymZ47uzxWuAnZ~ z0Tp4QN&aOZ5&Z<31I{0Uo$CuJj1fuZ7VZWo+{vr({Km;xaN{PucWoTxf@wUSa)s3p zg9xGya$*RTPoDa>NFZACnr+t-&hHjAQt5BHi|b zaW+!2iyKZE=K+nvuma)WWg(JUprgL_dV+~;_ybGH8k-{Oe4w|*5BK+H|6lZ=1BT&P zJ=ouM4`WHas8|IjDU8=^66TZVjMqmTOyMOvp!P$FL{)wFcQtE|+s2=QlnAPD^@=*H z<1|e1lZ^|!MeAEqmS(C9H>SzN@zvQx+@1r%t7SDwKA`XW_~+}ty6(ob3Cg&x;=@MY zw~X}a&3fQ@*t?=C8S=~K3T5Ue=2HlWPL67e3IRwYM&RH1)W4F4Ecb^EfrW+h&?vQ_ z6t5nL3p&I3saGK2{f2OB#;ruEjH>wZVAMOHRWOAEi=p|qYD@>>&mJ5g0qYW6$R#9| z+14-D%{|q5MO{gK&JZKbX=-YDpi@y5m3}tLS-6B7>n+_~c(g1Xb+HqbFzIYEMMv7T zIUbrWI61Ilg8z;IUYw)b8_gKuma03*L<%(NIERBV~gxchl#09@G4OV65 z>)m-#!XBQsPRu$uwzrqo*Ay1Ah6xnA7IS3hv;Xw|vgMUNIPq?0 z0hNIb3Y;%3nGv}s;3>oSB2m^r51?v3^Knk4(*CyaN=4O zIjePG4l%2T&{G-z8%Gw{;wV8L*T}$R($!((J8bL9E~!NOok(F!xIp5#6%C^+FL3hI1Ch#f8nx}37%yj64e!D^z7VYA~+halIE}BpVszh52H>j zFZ2|oJU2Q*xH_vjSL-^Z)i~1NR3*(7Tg|n%2N{eI$>u%RUc*wLv~eR9-=(=cV`lwW zx;J}WcLkhU?lhN{7a$c|S{YLWt?LWOt;IQc9B7vcz4W8f?%K&K*L1NI>98Vv|{XKOT(DW zj%tW3W>_D)h02_ehpoZ4|6(OWt%Q7DTpJTNrXB{JonkoNn$9?$7&pT05pO&-L}jao zoAFAagcALP$S7H>ntGz^{fG0@c)>b3IEND4MONwAY z^?gxiHe7aQ+DV)S({e6l2*>rjjDBl&y)4()!xuE2VZA)uF1s|Frn!+vwMmPfOz7#3(9DuuE{5_aRsBpXodhDt0?Rm9jphhAqf*1b^2 zR4@Up8qAP&t(J5%S8&I9A8tH)x&$ey_VW$o9gb`<=R~?RT~dy!%XmX*b|Xj9 z(w0SkI(_DO0gxFree8$jt^g7K*vnzH7>Pj`RShHu2n6}o9)J56#r?ac4|1|p_ z@n*bVZWC_~tMuvu!zaCN7g)S0KnzCOAY7cBoEOZed^69@J_nTxiF%;fWi*;RWNA>O zXnr^nbOfQLVXrQMlT%Yv#g`JOWp*N!y7FE+Kuz?FG<;e&UQ6+m`pF;TS(+bmbh0j4 z<@SWv6)Dn~8V|=zx4~!I8OzBD%9!GoPvjrTRh1Y4JX1B|P-sgbhGc72Vw3v^i0LQWJtur;@qeA9`R7VZ zDZ#ffTBui^ftkLT2Ch?BpN3bTcD`s8lT|kBg;XoUf^`UmXZW0jf4WV-kWu5s=X|Xu zkDQdh1~UUv5G5aono!LF6Z!PZP#}pHNM?EnbFvR)T`LFI2F=>*fJd`k*}jB6yO7G~;Tu{#?AQ@$4ZEBY%L4FY z4rk-@!A#2Kyvz8BKzE2*o&d2F?NVmB8Sj)KS&DB7IO!I1*?p>WMyI{-<0`=ke|zqJ zmu?R(AJ1T-e^B3c-KwBf9^kvqTne_8i##~ zm%GPpH?us-8e-%?HtT~P0NXY__+gqUB8hsH3?~V4vpgbESt0UwI5g4%g@nWfmY%M4 za+Gzt{L^dMOK0DS)Y3KyZI4~HAqOMsI%PBWQcy)PQX{aQjl4BI;gFr|!ej;{P`WSt z^v@|Vpr*db<7z&Dw&&Fj(dCD}6rp85YBXuv=3>&KuZ`4aU&Qv8>&)vbH&@B87N>bn zbG~gdTuO2j$$`at@cts5ytH;QKqS>Zc>{|h)@+u6V7Z08-a ziDBswu<2I73Wq=u$KDgKOWKkYY&6mp?tfyQkfJQ%;LI9WG5WGm3VT6>pP_1M_P10s z!n7cupkRWs%X3N@qOK1VL+uGix-Y%9R7y1(g4ib13p6nViIs`UTG26wu4L3;(W{(* zva`e*2Z0^2F;v)~ejkX-wq6x&RIgECx*wZ8rmeRY+*M)9Cr${3z_XP{hU}wjGmED#Iv~HK(~E-)gDsr#0LB`25JVs%Bhq?F5?|h zU3KE&SJ%9oO&8mMw4t8iHXbbCn|FblVWqKnX6=62M8tHs&MsH1=1+B8jvoVo*6CU{ z*CA^IfoyP_XyYY*8O-#5hSND#j<~K#4kahQtqtSTU1J(+gYiY3QrSKlZCcSA!agKg4fmC0Joz}&VKorjTeH7$P~ayr6rWc&rP88_Dda@^T6 zoWF7;8u^aU#_)7!b;e$MxR9kTC>?zD%AlfFfTuR7smFK(HXZgIHg$7;gktyc^6Hvp zU8f*<9^?HP%Z6#9AH!qXf?8c`-TCLwpR1ZOo83Y|L~7!kI7Zw$9p>&vnL@oZ*c;{JCE*B}1&dLD>sLv!{&7;eHa3ML zsM>O>9<8oR-Hc8%U+n?xWkm(O#{pUg)vRm~s#AIO#u4ZBd z>-WC=H5(f1=nV&9Aw4E$bDVuMBZTlQs=C*TQDw0>&^(@`}vVcozo8_mf z<{rE|I|I&b4n{AxbK17vtT#UJhg=uhd52sGb5%t6c*kVfZT9u`?NP>UJY~8>O%Ud2&DxLp(^X(RwDhMd ztXQeoNaiMUBrL@KkV4!YgLmbenRRZgav6nJY_w01K*yOHVDs97$lYxcFUPq2F)VA= zi6~}E*CYVQ%PY?AKf}t`bu}hu35_M6%*7nI1PSxf_i5H+sA*vTya}M9xsYr$rw=yD zhv@Y4@0v;LFrDCA6O{);@xnLMZFBd`=MtnsN%>yd+OHn%q%6k1!4IlkwL&tf!QYO7 zSQ)z%4bfMrRoAebb*QxRDWu{Y`sirCJS<`;r)ummgf{{5n(fAT>^l6sA0{4ukXg2_ zsPKJMA}ZqZ4c==m3p?_Un!A>+6Db(zp=n#s=$XrF3dff7!b)Xe#$%?Ht=Cg^P`o(y z@#&T@q72siD6Vho(Wn32@Tho>OCRyr61un~t#p@x;to<-Sc&_Gb(PyN!KvT`;}lu( zsiG<7Rnk)1UHN&nEaGeaSYX`G3jRt2;v?>b?PL>i1h$q(g8nlLr}6gF4E2N)M<+F( z8vN!Yn5p_!(*-Fp$OSI;iVgalFJm~w!jEUcOG^jZ_=OJxn%LPmEk`#>_GF{PCC{ph z$bcx1JA*Q2WDW&TO(I&2 zdXtSFE31x2L?VaQdrq&)#W|A$T&g{n-uaC|HM6UdnjWn*KM4h8EK8=-b9MRsM9y8 zO0kU{TPQC3c?CXF8-&tl53bW~gQw#m7FwE~@^06wWK4$EG_dpeB_(La5 zFt9Mm!-bFalH2p<<^~;z*x9{F7GO!i&s-+F= zVqo)Fb3wfhzfQFrRXCKLB3wTs7KJuh+rCXBobNNo`SVJwv6VM1j#J4nIZKUa6UC>x zIPTeeCm-P|Kq)oE^p(+Cwx$-0e=8|XBX)AIes+pe%NTyW9ix8om{yld_ITU`wm=RDHUZ%>7j^Id%}^gpyh=wVDVp0U?? z+rPxT$0CBH?b&gbh$)PW$FQj4po66=6BHVeI+IBEv&7162FTRKl0r{f#Jg#N##x}M z-ZE;Qa=DR#uQ4madnVyHNu~-Jl!8o2%qJcZE2kc6p_Bs>Bq*TlZFxz2y>3U=z_;X9 z`o*fWU871X=)C)m93``JeQS=TybZ=+_4U#>wGLn&sPc0P_vtSB)YiV0s|D)iZ+8<& z2I`No>B}2c=gwVXCK7ZtLP@|*{fI0-f%vqqWHmrQBlxlN0){w7x_GmsfFoRCgPo9hbji6?fTG zG`B6VN3pMnl)k)*v$$#8R}vY{P$Xpu8C^07*aMBKsxH=Hiizi~=#0U;c2$v8W$_W} zfEKEVDDUM;S_tk~nDIXdm@*DhlcGW=fgIBbfeif>6=M|d@Ezs2rJi&S{cU>t7uk&9 zwVBe->ev?zZEXXGIg<@tTdRw(e*+OKumos)?`tWhG6RIcjdnRn2v{!S@hNk6SQP&6 zTtEH4xd!Stk185LV?85SyB0GkCa$nkk!;o#45XtWI~0p2iLCv> zOh%>*p-dzr(E#V4j8Gg@`vVJP?I*E}pQWEAv<$$xm-I*74-MveBxiLpsbt%~aDTx* z>3EqPg@hu~-5e59GD6DBS7H;7c5e)o%oI_>%|I|HawTyL7qBu2)a{ZddpXA3jK+`S z<3S_51RXb(D(vMeHi^I_Q0hq%xC&dokqz9VitYAIu*fX8(K%`Yu8xZ+ZmZ>Yqu`J` z6D`wAz&U+VMR(=c^!bkPHJ3##3SF5;icw>WN5 z;|ZJ75Ljd?_g|WlEpZ=a=MxEOcAAg4{X#UOL~i|9152cLV!)WKy5$=jRClPRXU_pR zInQ|MB)Ov+%ut$QC@96%!pd;X(2&sZG7VEjl0fy55_iOuY}y8lEiZ9RP-5{wk{7E_ zr<6vT7^x5#g_DDg+8fO9fQdn?r!?4w{z_Qm!FBR%R@q4l5GP}-szS7hA|q^y^<}L_ z%$`9h91SfHQe+5W@lrdoZ(mvM()kn~Ilhiesn>QVMY;*R<~O9eot9A6?0MPySV~q- zdCb3r1K|svGe7cw2)4*mnfefWH~WGApWGj1*3t)LRn+@(XtX|o=qRc505n)-jZ~o& zGUqjLC=+QhW>qj04Uh?Drl9D!+ERwF*ag0X*vt^C*9#dw3$h|H6EI5;ocN=DG;XFQ zgq*Z#poIwZ=GuN+WF?`~G&dGrks=&bOIO9!2A+E)gCU=*pIRx7dW4&1FFSC=w)5Kt@BCncG zM|*AUNsg+dAOo9-mKps(bZTJXt4Cat>^dVu|H)82z;LwPYKE?@1^?=J zLd|?~=Lm2iduWP77h*@Ac5&!lW@l}pm$dxIQkM;16L93d-*gl~wj3mJInfgGkPAPU zGcFfFxPV9H#MuENn$r12v6yig!G+dUPphxC@#G?-AxH+;{A9H7()CCL970M+#lH)K z3o|q{G}@tq!{+ctRLB<%`QTiddOLG$O2cSwCtoCHoHP#Q;H6dg&Z~8kD8qqNC7z$ zB(hC1XuvS-MXAZ2)adfN#@Xh5EU6bg}M zvI1ZtK9G!z@#yyvxq&+qo#dJsILVJ;5i4}eW=%y6I$v!A;u|eXB&h&HgS1fF5qB?s z-scM^pos$vzjxli*l#@`BD76cL1OpK=k_CeYjLtd2oy&!X{^y?+?;G^f51eMl_q%5 z6m(ZweLTDnM`RnjpcQx!HC+0VBiaJ(yH<5A zI;HerA~!2Fh0quYkYPAkDSUq;ipCCG*x4~76CX7iTD=UkJu@``Q$v*44^Bd;zrp}s zz5z}YN(ELKU4urWyjSVF#RjgV12XjTK9ggtEM|YaVgf|x2aRJ5@8SXFsv1u)v?M-l z9x)088SA789v^maVKiC`QdqRV=J<6s8PW@OXe=QzeaJ(F13o9jFFk%C393PZA;eMR zkbGx`dcyY-3a=I@O9dvY9v=-Y6n<-mlfP|5hr+OeogIPZrYM>X%I4DHG9u^}$$s>H z^wNW3!BDANNXfm-wwU~+D18<-Laf2JA}(H75?rT>Pd*>j4BUI;p1=0=Xa1vmzrskz z|1}lP_h=*#*y%{n+nsg>0mumUx}X%f#8eNX@B&A$%F~O{1`^>!_T=&U35N9j@XP`c z5oG`sHMB5FIE~P0InrEfCXkCtFI<1aRrzz{K zs#1Q-ACCrec=BFpm8|11Q*pkt$n}LVZS}{uDRc_$ZNZr)67^)f$$^%V;bhWnj`Cx* zfdCT|P-57LSZ~K>0IX&`tE`|RIk==+r584|B>!UkdvGkW5DG>-Kr@~?R%RkGXqHU5 zzVLZKep|(otfCVV(Y?Pn7CD)WOggogTsxVXm{b!Z9;x_{!;x&E-b8pX$TUrf6Ym%B zNup?l`iLj1H?g>En3=SgFw|BeBb{No#BLm*6J#OLnHa2?T$4z%ALX$rsJ51DqJF9d zAQ=yc1rz#BzhwEn0oKqZ|GmRmS6)j)$@E~^?#EvHlt85`c9H`zQbvVzy`NnXd0*?^{D-$q}I@AB!%z_IZGL|p@xvv za*>#61evCghL8lakP?WHn?Hf%B{otpjWm2Yj%?tAwHO@X%^<_Wmdk&{o$X~OocUz; zzcDKY@(je8udB(W0CKTbZNv2_w)9)SOuwm@*`P<4Q(OZB4P$?+JqhY2(A2?h#g#!| zdWvHQ0A#nR_S0B93$Sx9zi=qum+SdMdEu+7VdC=>bAi?V)?*2J?#~0P_BcJG>>aSE zB8Bxj{B>UxRk&lkA=b=zz1Nx34Br#)4^K%snJgR(Aupru8=<$EA&Ml|7JMNYHlOj2 z|3KC7UTdVU#s}Trw&nYu=VuUmt>XEg$N#^ln=jI6s)PUg_P-Z5xV!&L za{pT=|2g&m|9^cj_k9`v-+B1=unG+P;{&|f8YGH(T=@4pY-3ADnf+4>?9CU#>s&U{ z?Dfh;=y%ZTH!$F(if8YpC+L6wkpKK5cBgX%BO!ST7PD8~c1})Cm&LLf9=7TiB^HY? z9+58BSC6i=?Gzecr>Ki|tr)p)Ku0wNh>8r;r}Wr8W*k!L8Gm_Lj1ztbZLCBQoVI@! zTQAT%v<=p*k$;Dn6Wgu_Nxpn4-O&^twV#Ied?CgE$MO5e_uI-ZFF(9>1L=5cA2X?^ z7OfNcM2g50H~;67JaOx&rCT@hxvmpdAIb}j4%vP#+A3FW+|;=!Qz?(?;Xh*!Dg8kWsK#v8YrgYhL55k4Q_X} z7Eo5yvs7qaGPo$!wYPRElhf^5^Uz1=fiE)kxNo@%82BRicXn z1n}^hZ>RR%E?qd-2(ruVZnDqRy~U`y^*iKgyBEioeQV_H+-a3rt@uwx(|TM5T+_zc z>=n9RgC9i+VoKBv4fkm40p}eZZ4zYlt(BD*{afC;AzwbP59i{%1m+XTbok>9_4Qa> zj$~6)Qvj_-s0CJEHJ+_`J~uQ^L;bl#qVx-!M3lc&_Y-%@sB+&s=9-mP=wzN^S!K#I z67a`WHD?7Fev2nrgj!YBY}?Us9v||n)MN`Tr7!$`9=>j(T=6N{TDDJoEvR@*XHE#V zN>C^!Y7sY=r=v4e?CukhP*~I#d+#5npHR2N;V6`a2EjaNL~=+FR#ax;Mb#h|SkOWUf!Ks*vyW+Q=?nlX4>R@?HT}!*Tk z{Y5ohARqklp4FN7pgdE#w?Y2+luIOU_O5}sqDMf&A%2|1VdQnMnaPp;9q@m57W8Lf zs6MJuFL4;A#^>98janN|Ks2j+dS)M}V>@@I$k7<;N4y)GjC~$xYr4Opb~=YYts3e4 z5R5#xw>0_8)M1`ijxY=h9BKuneZIKlofpcAq298(Y1zO{{gU)Qu9b969!y21ukNH8 zBrv|Hd3IM{Wco_r1ZrDjHWq7dy&6Xn-7?8%iZJv{x_iCIR0C!}X=?pUhS2k*6?0l8 zqgCFIp?rCnP_?9*E??c_7<_sC&bz%E-Jj7P;n&7^#_Y5cA|Px)iASO9E}9V$#v4{ zB+^X7F!r@nOfWseMOBgB+Xp+RvJ8B;bkCjF>5)oJJ@7Q;{3J+JyX|I;u(on>CBx+v zDjF+UTyA#AILG$5(>&R=bmwnOz#Lq}*-w9;HXk1<>*E_=UtwXD2E?1dT#HFTR=YE4 zk~+Hu8mHliuSnUBPc9c{^(Q2|+EzOyP?sYLt}WAX4lKAW?W1;c|5o1Szx9WtQJ&Mb z6cs=6%a+M1G6th+3issSjuO+-W&-D2+;(pn)phZN)}zWK_uyS4h<+f|5uaXvo z*e#er4fI!%5-jeV|5mZ1UA6AaSTQ$W=u#lYXmN9wOYD)g-_1&K0xqp&UiHlnIsZb- z@0{OV=E3E9UZqL)$&RsH|BxrU__R(RA|6pg4oiPO*#kh_D{I{A#z%bV%!DuD%n01R zaYQ>k?+lG~AMWnn=ue#JlWTNzpTob@V32DxEoXPKv!``FE=SYJVR|JPOto)y_vOUf zr;xoE20bQB>)y!vFIoGpw;}Wp0$}yhkhPVXr`_6%s3cr-l)q@fupvWsfcp$$X=^&; zpLTqEgxiq(X{%fPLkN9RBk0>h6Xf~Reh~E{i{srkY;^wm6noYABF>xGHvBBd(d+mL zAW-culHheb`&sR6O71E1l^NIKGcIY|;V|1%@YAESD%mGbepOfLcNmeZ*FGB7*F1D)5g*) zRGN7#*GwDhKji!QPS~B^kMzvElBWxH%=clXc%7t8RtOg9b1gAuIm`jlER9B^(XYN-qKrAITqwgyM(&9|-#7+KoaRwf@}S$8#+ z2a^%j?&dz)zHC$bVI>2Zp6>X*oGr;4*OnxBr$R~R{*lgM`+6{M^7o7fk8l|Da`l!G z)9di~Z|(zC@Rd8IPT!|YM>%*z-tF6Mj+C>?joJe)S>uGU3VSj4*Em2j{enibSQ?ry@Ol{` z6Yf=M3+vSzrHmlO)WJ?`^o6Le>SfL9yeGg21X z(HNl>Z9eM|go>Sot*t$9v6-!pr}bSRa&1gWnO-R4_-#0RYbuzxK2zBG!wPqlqHzQ3PK4h4Q%os7?Mp8FJ~iN;hOJHPUz%sK3VPJ4+r7^SCe47A|473H1VFj4Q7Lg5VPd-xcL!KK>|Y0ZQq(iR0$sjs&REsIK` zxB0Q!>GMYi)K=^ytP9zgpWH2Xpc1`~q@5|Gu?9D6_+|tn;a>OQf-Wz6&}K?CD(9bj zQ28R8oDQn(w?uI0H9JSs*zlPRgcop~?ajAJN-MULH1rKm=A(1_JN=<)Xlb_r@e4zW z6LGcfb;06sy{nq?Bz;)WM*+4a?{yhB!g{+RJoLquL~;~#f$+m&e)e9@{gKi`4>p>ipb0)t<= z0hq@2FU}DcgXGUmVp^SrmC~o{C^!@~DtNgXKS^Wkdx5Dj+)9WuQXYxXxtD`3Eum{{ zip96bG>#S4;gF_lZ@lBs!&Ef-s)3j^iEeB z8i$IO2|D7Z@aCbv!PZ==2M)6mxlf7XMW;d)C8xMJv7M9{%VG z0f@Tm;V(9CtuODU1=(7nKk7%jUc4R;e8yH^6j$0HMiQS>^j6e<(r4i6M@@HB4!3(X z@jTlzDG0vI^fn0TVUlBE5_%|eRJP;q{ClZ(J-jy6y4>euiRR(23!eUBH<0R?$+XAu z+Frr5N?3n@bB^T@x$e%_Kb6q7yYIaEfF~$s62ro{?(X$4QA$YYiZkFd1avjr`T&)4 zq)&a*%VtPLw7X=pK(wf^6#@%eez5^aprC&hs5boG3RJ`s7ZkE$K7m6zOuNj!kr^g* z3IC;;y(Boci;3;77FOjS+`g#4Kg2)=eD7;aCGiAu$KHC`8IHfmwR;Q2tP5bx+fF`N z8U_fhO?L8;^a5#xNTI#{pJ~?k0f_2Qo%E)Eh2;l-y$vf)gbq8Go4PwW#%Hbi2ekf3 zXO=r|5;KtY$Tz2(*sqN{?NrCd@)gb0k2fUUuI%%v$asbJ&ttxAHMyIcL0z zK`hZZ!3sN(Uqvawy++~K^bwDf`%8Vm zs_2_TY!W}UE-TTv;)(1X#^~s@YKuQKkl)OvQFuI}_3-R>{RmTpYJ4i^SiO1wJ^vty zJhC@$1b_Y1+^px$+R_hPx!-u%jZ|D(+Oun8ne7s1;H?o**fpzeRKPS-J+ny%Z zd~q@kk0QvQ5noxLqV7d1yrg~7j0RR{^_`?SCyA2Bwyn~P{{t$$1I zqrd?o?5Zf(3?6A4JY2S9_|7~R^R>(38)8G=&;LIQ@UnCfDs$e!7FZkGyF${tsBK%d zxyG-{*rgQW@#L$OA$&W8`zg76mRe6Kbi!((QZs3JnLW{<*wYLn?&{k8;ltp?XHl^Z>8Oe@amy=0o;+deuGNGg=>&wrUd(r+{h zoCuCc2nxV_dvW!p`qwCKleP5h-GzGo+FfcBFgur0*VI_9Rd_Rfq6A3p7h+q}ZcQ%e zm*U=SqJbR-6VH@$P@e!cr_GZKeLfMP@|Na*Ea}x&^VKIlD#O`SD0wWyZUFFmd~;ye z?+hVe%`w?Zw|aA}cA1^X2umJo8SIJHMTdsM=6U1(!29#%Ob?cJo%G$ghTKd)6QYK7 z6CJMBXZ1+CcAJb-HC23F7asvhx$^ztj#(A`B~#qj@mKDcQA9Q~{m34LGSlTH4tm{H zSKxm9uDb?y``Mv6LMIuH2mZ;(g0pljX=c*6EXscnF|-sAx^>;DhmCDyCGL_Ww#f}dFIdsaEzh_x(9gtkewGltzp|jba;Wh0qCDJ6FLstj+Qv!!##72 zLo~R|rd6rDpE8P-Bh|CNEGBjgH&$mjeWVxiqWn&8?XX#!HSy=={`0@{%3-08|4Z&@?X z(C>8flatsk9{vt{tKnbyEfLss>Wa$BA}T7M)zs8lpY}7ba2uKo%Cu^J-<>SX%+8A0 z*f3PK-4lq5i@#zzSP;H*A;5h6Zwuh6!vGOY;KOebvfQa?BQbg$3cS~+?Xy`H*jD#- zJpDEUdWB5R0G<7ce6o@_Z2Kv!lgE`wteL@UNbAK_qyAB5yBS8IJoR>I)SW7O{$m?9 zCUQFeZ-aFus5zb6iFH5Tc1_tUzIEc6UtSXp!TUaiiyfe*HIwiVI({FgM6uCa%bKnX zv?UxE`MMT!f~L=^s`!ARY*oX<;~N&g$d)uSb5A&BXdDV2CAW|+Db=GGOQoOjKW9KjhxGW`)sYnQq=cbLjw; zg2j(>f1%qD4Ax)xh-Xx^29J4HJvAr-;fwg+M1me;ydT!xTdWo+Q)pwq@*>FmYwY_i z&kJIdvtJuSA<|u(FKYlVz>^I8=cmy2cgYJUgH~;)^69jk7Js^#eR8s2#3oeg|F4Yo zlr3TW;GZ9u{7$$gzh)%mNtm6-3ZW!{9eiN%%zQTSpkoIzxg?d@J8Z^G&h0T%a*9?g^9(tkt7qrTXh zIJ&OB=+XgGFY1aL1`{yJud%!Pd;}h6<wb{Sj35Vm4?~(jwSQ0h zpzlF3T*t-nx@!hV4NT-^p`{ByEW0(DvI-UtbJNt)ipm4DZ_hlQ)hS4oB|9^)HWT}+ zBgepdAZjrgODEc&Ef%~dzM$fhU8Z>`!VuMq#5>;3dJ^(2Gwk%sZgAWEAuu%Ys<4xo zbkU5yd4p)W4(>x~;AB2KC14Z~T1*c%G@Eo${lh&s!Y-W!stbNbOgL5!%nn>O^^&in zQdq;=+x9#2u3vYb-A+jPEZgnU>;H50UG$LUUU4?723huowzqD!1-#=~@Xy-{7|%GP zk#b`5FlVg6v3|M=R52v@z$+limS6dM<*cBpDt3GOXMtQ=H{V6;OwRhAqmrhkRHc4f zDyIzrFe-3?6+6c+54k@(>m5lmfdK2m62N&TT14tg2Vg(JQuT5XB`i1;0x?%tPJiKF z-vi;uq%rUA?qEI=LB2uzL*3mG>G9ByC@a@4AhqyQo|NW!S5>DkB&#ypKAWxH?h`;+ z_DGAYM;8XS($>X+5AJU!zh!W5Z){ASFx_00us&q5v)}pmd4))wxFSu$Q|ot#wcLz_ zY|rWGEwFB_Bc&IwSvsE0}j*-{k#U%Z)=df{d{r#LsgK)I$p^lrn2f{@$mMx zQve?pQvJn9MI+WkI??w9GCyH_aw9g&aZ}n7WYaO*8s?GVL|&WNxmkju64Exk%>zEj znwV2f9~a5~XGBEX%yuJL&wk^l3=ZN(}E>bA*xBe2i0b5vCQ~q;cxL+}GfP`-$FYU2B8!-w$bdgWQPX`Yus#N=tUvhW73n%<<$k;w=Ht22 zV&LONN7(9j9DKP0`7~25Y}$W@4<*Mt*b`8h!2fLA=%S2{u=vscYu8_B0sb42AOI#T z0r=v|NH3Da3hi<$RQ%91YzLw_CeUDVdducav;i4(J) zAw6+^ukid0^wk}b$Nh3{QfYMF&JlPnu9tziFqbi!hHErr_5_vb>iA2mrbkZTe4s|@ z_Pp4+iu5?#O{g|FBkZ?1tzy?aUSyFS;>t1;UqIu@%z9(tTWcH&p(Hu-jFY z=jJ|c@i`pfoAYnnU~UJw58wD-Z3>O3?#FiHp*?FLYe=poB!w4CSsY1*?aNg=snB}y z2qeIz)-0^`Ab~n&`%Pinrac@-N5{oh4>q@T53`Wx++6bWwg>&{nwsLWvR%N!9Xm(4 z^ZQckdAp)Ql1@i{_-3ylITOc(e1L{y_IY;htd9iLD4;~yT#i+ThlizPWhvO$5}J8e zI4T<(Q>Uk=Q5RT{DY#5XYAb^G?YOwE56v?8lI%(%lrqmGlVG(YsF|5JCVrpIXhOu; zd$zOo)G`|sCMwVf99|Jh7Ahz(s4)B=z|l^NOT^w?<46xLOh`2jXfBte1`@=hhvm3VlF6e|M3TIMGC_zmuEVWL2-2!sA%&yTzAh z50MY}@M$FAK`^qRxh;~Q!toB2Fgw3=6xCIskTeB<>i%`5rLNX&R0`K>{=|CqZ-aJE z>zi++L!RsSv+15?ltZ50?Xe;FWo_CR{v-*MFqY3d^!1kEymfWP#r^pSfoXK~oOzx} zrR(AKOTy81v6T?{`vc zE_bG-b;*G}cK-isaJ(|6vN8QGK}19{=1e?{#6SAEBojp`v{*1ir*1*mXtx4&euMZM z)l!GB(mV~pre_Z`@)f^@m`?p9iwb#XpjmT$T*K!Qs&1}O3t@01skq|bx11z3xC4;Z zK<-8SM6yeC*60PQxB@;61hF8_|{* zdOlACHJu}Rg{UJ`9r7!2s*GlVfK1mf&)dYq8Y76mACBa7*){^pEJHO>1W=Uu=cBfKb^7@6ml`>RO^$#m#B z*><|LiAuoLjF8z>L3B%OUUMPKL9T=D?J1gf+tmO=b|v?oQ|xjsp?p@ei&;3rBC*b6;H&5(coZ zZ#D9FLskjd$iXwF3>E_W)zDryQ^y3p)GrQJ^~m6Gowy?N>T+U%lHRL4M9o?Yc*sUD z1z918BY#5x7SF^gs(&+|ox>l-s*G z=aon3rDa(PM^^P~Nw_faj<|svYB8_$+_#RpEB%f@r6J-X9!%%7*-mUa7JWI9F|*{9 znGqOMzMV+pEBMI0-qq#`IGzxaAjRkpiun)~6qlOzUe+i^A|17h9<+CHRvXeau^Z3%SN-Z=BJe zAgNPgL#BZqOfIf|o-cuTaYcPf34Fd4fILG!uDl$Lz<76-4$XitMGdKxNPo4&2k6Eb zT-Jep^yRb)@VLKT2peO`Ui?i!`4^=X`t*tBzsYt&;}^U7{D39Oqw;b~y?^bl`S@DJ zKQ!n=%YDqu1pPuMmWOk*9>eAtbn-1%Ujsl0&Q-@fpA7Pc;K; zPp@L#$LI*|l2oG_kaGW3!nCLjH&HcM0Qn*lgVu-WJtbeCrWH%;Mxqzj-8{_#&g;$Q zPZ2U?UHXY9&zI-|Ap9g-Od2jWLzoJh^m-L6d#OY^v$M15tyiwd9SY9&5tf#mPuo^} zvf@9I#pG=cLR9pOSpQTmZ@u+tEI2@f*oMa9xQ}-&qceBqn?9$8Mlh95^tBR)v1gEYtdR^C?? zht1V>&;GyKe860XMsS4BdA_oKo))kiTeG(4qAjo<57$?#kNd}2uHxy7TnXz-g4ypS zGrX1u4o^5WYc;A^Cg?O`X*ORIq=9XPLqp%daueACS`D^(A)a~*X*^C;W?3#c(D10n zSKECyV@!0m9m!u@_YB09Pz$oCYuHvjPs&$a7W4=m2g!_$jhX%4z1M-Z6Y79e z{H)l)g(`ZV3waCm@K@)A5s>CMMIq|WtB=sa8So#cHUPensGt3nn} zeBSSaEw>@f&P2ezz1r{`2-GAJr|Gvhn%Z$L^Z`R0o~9mJY8d;=8XD(~6racC4)UJ0 zEoI+7R9$~rThO%0PD?g|5GPfzq`sIFHfY#yrE=0WDZ#fidKUPMpn=)CBQH2VTlq9;Lh+*1S+ZhG)niGgZS#47`n+9rzWHEa0qcf(L8i$B)5BM{BPE*JM zJLRyB|DhRon5aMEfOum6NrQr3Cx_(>h9nTK$ePh6gL#!tAdp!69*@O2b{NopH*?)z z(@n{w?FT>T|3HSadF-?S3J2&-r`XX-lq;E7|O%*nD>oqvnYG-+7R=QXVnG2yg zfkyWNV|Luz0=U2vTM?C?k@3xAjJ%?q60+y(a_z_Vau@@5iCa5Dx}cZ)dtNR^|5W`s zTf`7mvu&;z^K_Q<_pM>2%=RLu+oPHabTb3c47lOJool3h^x&?EWta~6H>&c}`AmSi zY<@Ux;LQ)T%Ym~pxr#P^G2e>OdBnVg{Ecw6*uxqo_scFNt1GCdp^+};JU9P-viy_n`LwUnCY42IC83+iBsz5t=` zmmPEY(6LA^?h-Ymf%F-uyT^C7olK$q%{VqxkxoFzBnptiwhg3lRqii=++6xCPUoy& zxQ+n2)G^ok5CtL)z8k-u%Y}JraxCR>@%qmwzL-c4t7EyQ;t5?jr}CX!9Z$DW6Vx2?iw33WCXOpe?jjZ`bJb##QNx| z6d*fcRr90iaKh!ZC8cm~^|?0TEz?Phfuud|A;ERrHOOR1D`}o_zR|{(per)^bBECS zq0umS8He@;EM2u31>@(#B4+A)FrHY+6^V^>o3cnXXza=tW;hVNW`bQ#1bzL{+kOw` z{c4=|98&aG#YcZ|EY|kBpsw0X&TCm)^UeIUOi8**;p2K15N~97Cx5;NGRr3bGBWWF z8V*@F{_F6_h~HH^&#T=fQ0>07bPgxc@timAP%|zU84`g&c_v0j>j zO}wk?le=I)SawUdGua%Y?--5RfR%79R^%J^laf|ffqe^Kwt{@#E@U$XTb>1eWB_bRXY!pX<}hJMhZ({KTy5!uG|t)g&v+_!_J@4ET9)iC>Z=o0n%-|u@=lqNW~LHa zP)GT!tA?w(Y~EIrT`ax`w9pa3gog1UxVJ74>n)rKv>WNgkOz;9E0inYxFqmA+>W!% zsjAtJTV##M&zvuOe>u}duKQ%PCWp7;0&+{tS5bpK$eL#1wBL6))g~{-eGv(zAb`6Clx@Ju zw6uE}E(kd!pkCYeL6)>4!o6r#9aILgDuGUl2hel$L9N^k6>S4Jti<>1(P9-p{&B=k zmJqL|r)UYDLEf@1|nUmmx^d^9YG2Ub~ zh3j~}%i~+XGh9O5iHiiXn#V=mD&tu1N&}0H%)zI-+Rv|TQEi_rlvKk(P>}|A9F+fWVZ=4|LjqIyI`=}gAA;DgzzY} z**yMOTmM2Y3-Y``KvY)amBI!9d{XYu@8a}}=-9AyZElI{s$$~8Fh{aXBOh11JR$Gg zOU5x3(*H%;PVl9R>t zx04Q*^m2Ypws2SlPICKGPBWpmJ!Es7iOr@EexmA8ty*)8g$g|i4vwVMRJ`Rns{ywS zpAZ?!iX)(d7a^0seLPnh6cTc?8HiTxe)SVfy|V){Vkh7M%v>4~69?ouXNTr3}YILx}3+R8!c+vcuynX(oArZa#TvSEk~`KOZ?(@uB^s zF#q||p++kIa?5z)-CfZ8)vy2C@Z;syj?jVs%j@BMpHH1=PHdI07P9{bOcBw)r!PFw zcRJ3-COVom%;}NzNDlYaNgv)Z-&ctTVlry~nrUisehU{#n!}*dZOVhjTjNI?O8U5lukF~D>`816aV?W7#nA_nW;Y>;`YYq_M$;f}({!ZJ zC2i+9Tnm=kt-EJ?N`-;WCCHy?uXpbRu57Z|jkipk7W|2IBoBVUiz->2Kg#_o5z$p| zV*7VLKvZ%-GuL!1ee2*r($kYS0+(rjwaF>^UP16FXn!o@GajClgan+`LIoua%~AC2 z*g%{AlC?S>vI)tY2|IznTCeqAaI7Oa>5Aw|TVUTLZd`hPd#3Tb!MIhr?-+@adu6$I zgsy;5l0UpCGhfGhj%4vA_V=5s4$*0g1ciUMO8bxJ@q*rujW(kYUdK5V(Lnh3g}2MC zyij?*+HYPc;}r+Re{V>$&(^pSPhErmh)OBSSM7Rkv z`Hr*x1_2Vp5_^2P%2NF_m5!A&7fsjiq4?JpC8+@2D7-DGk#P1+W z=!QJ@@K4Y{e@<+83(-g* z*i;E&9`5gBFP9FokK`uaKoIl{bnIs|(MD6It=3EamTgPEZeO7utbfW9QohIFN{QBD zrx{?Fp-JZ#*8q#;tGf&ef}X!z_me*80^o{=7h0SH{SBGpphh2%c zX}=`K=T`AxAXb^GZ4>G@^Oz7DHgmR9(MTG?6%wz2|J26l%5p8H)NfY5P&Ft90?S%W zzjq6_itJ{rJSrKDuks!t=+SMEh~;U;cb)N+XXJ;|%xCZ}OD}PI?0o_f=72(EyZ>i* zFE)V68ulTqdx7a47mww;1gVo@kV+0rs zN=uQvipQj+Y%T~QAhIiiyY`bdTo!g@^o85~o5|^y>Z>*HHrd;GQXrm8De1?SwlFs9 z@oM{()M8na=H`J;M~RB3FH*+FiKUHUJjn{+TMX>Bq|S94@3S*y|Kei}Cf?0bDpQA; zs-}zH&la|(S?P6U>n2-=#=vxYC26btr8`bfk9ORi-J1IoTqJ_;xMFEqo#LAb8QvhZ zO?j~*M_y*kMOgkA__~b&m*Nkq5{Y7`aD=eq$%}=o+xNEm{x z@KOv@>ckkdL`b{Ph3H!~?O*ov#2S9Q$K0PCZJc$ShoF&&zgCafTP%Q^kFu9(=aSof zL3VplNej&$>#pxJaG`zH8Q8ws=8f)qkxfZ$ESceBsEYrN)=2c7&mXkSk#wicfFSVp z_I@34Y6P&qg_s8;CWNAz_A$7pcW`9Z2gyN;HHg+;f~ z-aj)l)6ZvI+o22Q1?i2fymNDEl8Z`AIxk3Z8VNa5O0B6bMT{&#k&Y2Bsq54f2AMQP zrU)N5a^2XWvVGQAn1l6)kHqs(A=FG?UIEVmYMNl>l&aEknOic6uL6^M1|k{t&HA)D#7FKy zx7Jz=^v=)7WBUtH|JZH*8b1g^<0gzT&Se6V0M`c~xOoN!rx7A9-}QX6dl3#l+lR6z zfoY+HHwfMbYLahxYEG0F?ZguKFg!xmv;V9bvZLsR>%l^AC1#g{*6U!b{?tM}pV{0} z&|XL%3nQ^-;dr|Fiz1vETK{Jv%6!PB_3*&Zqh-32ywMpPgIzm#;vF=MfpPvckTK`<2B+%k7vJ^9^4=_Y_?`f1RJcLoA;O9s%&@8At(A+UKBiJxWcr3LB%N{Q6nL< zo`xqeCdNZh9u&d&00OH- z1+%JQX7>yG7u+NAph%FRB$VJyfsPUDw&(jtWQpBOF1TmAb7lM87D3=7xuw?z2P=AHlUL2muVF*avK1?ZL>ikseJG=Y8NW5<6qdInN;xaOb%EgH#YNf1Z^FN6x=8lCm})F$()wso{=lLs*BJ3CdG-adm9TPpcyB7H zuVB*HC9GuCGQU-#5dTW1?VZt;hE!S&U$By_-kHrlnq6A%O?(vG&EzOLRD$@-sghv3RSu-oc(wK^)gx9CZx5b-rt%&5Lt|& z4~zdRtK+0tUHn`rR{96aOo0bR4a`jETLL z`5U=#QG*34e0~xFM@udCy^Dkd^D5WdPGn!RIIk2tI*Y6pIjM&ktmUNYJy6@rK?jP;jze0BQN6PM4N&(EbRf6)=-_KUL4o`yH=c{g3pKGIS$xjNd*l)%r!qVj zbS?ex*&Z>nZ*$>8<`iE=jve}zzDTr1>Cr{Pv#N}F_2EEa>d z5|q>%-%+8=I2*HbQG1Z%$$~mn@D=Gne=CsTAoa28VC&#Gu-N-Xhjn5V6n1F9Bw`jQ zh~4ODOi(QO@}WL4A-NddkCVZ2U3}~6gHq1#NPMsE;#g{1Q@?lf%^3_@ZC4dcz3;wBf5>g%n8VBKcx0uQ77Jei*uAm75D-Kpq699nUiOUpMfKT}>s zX7O+YbU;`f-{aE`Bw+ZSZ}!}}zcJ9Ob^|ihVoFsPf|N4q%>^2(>iQ0x1(C{zsY)}b zH&4WWy~fonUUBJbFUX75igneQ8Uw+Y*d9AM5*S;`C2DahhAffT1qasqcKBXv`n4!SA|NFW0ZWKUfF3sGfh@{uNHmH~MDtfs#q5TKAF7ba$gS(a9lLclh_4142O46DQVzth?P8%gUrrBn zkbAwJR{O%L{rWpjAq*0K;jl4KyiJ7mL7gv+61bGxui0iRFO4`wMi9c!{zB+V%mVzG zkPp3gt0sO~VUN)usPl#g6V}{tQOB?c0*r<8p`RNAU9Cm^6&Lc0a=l}x}2Ga`$cp7&;8urS}NPKCV(GFd3(7- z{$n!3r(!Q!T9Y&5ao#cpSA$y;CqtxUT91Ba^W2eo#Jw1QBlPphmWy?r{ z)7k-TZR4pWd+jCYLbS(I=AGx~ZaLbu-tsp;%}(ftq_?|9_u0|ZWDkBNhLkItYdmer z5QZAP8SLzelo6+~>(og`@IdL_Wgj)RX>L*@C;JKE2<&Ru|Ht!jsE=Yl!PjLlZ9Qp5g?M-QTh`M}9j9uMgemsxUewFW=Cpm>IP8{GS z!esIt5m=!PCcu*9ap-u|zAsTxte5`jP^O=dJhlTavaAHQs~KT49Z2)mvr~Qipk%)G-UO;i;`R4$SUHI zvzkZQFo}Rbq@Y)o34wq0uojNp(Sj$Z&2s|FG3wP{_WmIq2eIFb5t?bIj=`J-{emhkG$c=baMB@rg(sWH?!{$ZU_AVc%@1Qwef3j zt8z?-clqyr6s%hFlD~E_!YNjMZ2Us3L9|J`&c|6@;~RJ0FIq?U*6MWD>lJwm6xrgj z3_?eT3v8W6yD}CQ65q7gA{cU>vL?|MrPK_SNR^z`D z>Rj*vA#RshgxLa>Ud(+GE6K+?7~RSjs(=C}-VNiUKrO?CpC}AYsJlSv+;;n&PNd%@Q1eSc7?gh%#b=z9-3JF#}RmU%iY70D(b5W6cu>^?Qz4W^|Fi6*dE8II9wK{0pX)NW907K2(t zD4a;+cAgy^xCml%`N&_P4%%2DB0iT~L*aE}bI>)%uEe@-87mdExn%ae6pZa3o2#&3Nlp)Zt~* zw+zOvC1jMk_4U2Fwla^0HMgPR;g4e4Ljxp!ql^EHJob__bnm~g{Di?})cvDfXX#dE zCwQ)B%!=RUc_%`fG+k$Cva$+up;Zn!erqU(IryF9MA9FHj>!*8CcRY^2&2hNBt{rRkibpo0Cd@86}qGJ8v*Gw>E9 zBv?_>Di7}y@m5zeoI)s3gGEFpLZGF1&#-oV-$Wd=HfH-7q5E6N3e8>g^G+utY&{Od)QyMgFBDU>^V?7ccW^o2Tl= zO<=|C*nCP=+B`JTP6&5`v#m>_)YSJYr~KZj$HO3s9U-@|0bsd-a|D`Dy0QP}S2=Nu zn~kzHG$58}uKhb{?u1>gRx(pifF3WZ-kHO^ixq_ejJ|PpN%kF?Aa2a;BBUkK#1@$6d&QFb6vImQpu0cEG>4cwNFDMVO*7>U#mn=g8f7I zbGyA{vEDRP`sD}O%L^GySQ5YmNns*#-`vQ1{c}6sqbcvvpq8;#AQGXqBxa~0sZR)7 zP9H@Qwag$7;7$S=1vlxBze&k|QIX1-!Q)zi!_XOjuRJ^rzXOx^x!wc?`B}NhuN2-SRw4#V{J1n%PwX#rx$M|lYk20h!o1JD&I7MT+ zv|3-)1$BIEpk45=Z0N+RcLa&ad@m|Eh zF+B98&WhUI>?a;Y|L%47iHBjv)D0{}Bw)Tz3bc^K(Gt|_6UQRL9w^YwH*(_oFF?CdZVBc()>hc_V;QNJd zhn#W=Vg^dB1QOCcAnbx$Mq&!2Vm~lvjD4k~#K754uh*zCmFIOn>;z!?h4X{=YMxZS zvUa_-^guLGv0~0gTqb?z+Oy@l2vj28$z~TTataE3;ECs)oE%_$UB}R%=DLh{F4AU4 zhs92lVtvCg+Pgfg$bd4KcR^Y&=ZE{ms_R$GqM34zEwyK;zaZAPw-d)6P{GNnQDs)c zKo?G`w30x{f1#0$A{TI69sKu|LXYn;A;m6VT9i^II0!{&El)jShvs;| zyq4wY&0CvOg%t?(x`Nw{_5SkpJmW;fPs+ub&a~auzgs`jNf*kuzU#NkBI-yKH0qm8 zWZ=CSGj~{r-W^I~p_4lBm^vULmcziUnsQl@2+C|pB;&Y|D@S4p!*Ak=us@BiuVW~g z9LW58+Ym-TzQgFR0DTl%nOMM}hI*%|hj88dpoB_=x?zY&!;tfeqrSR+23w(#4;O~+ zAZ$@%U23DwA!W$63jSuxk_`)$disK4p&TSc9#F&xZ1rq?!_!du$s@vF9D*JqEVfBV zKV^sBEioh`AzmvMD)*$noUs@K*0)~K->h!CI0?65B2IH8u1Z`q{lG{nmQ7AT7L>8= z%PfBTU6`fyp4qq?4r|zfznsU{Pmn(}s`lv?a4|)0|Al3F#G@H1VHc z)iICtcL2*eMnHG8I1V=Q$}FuuX*hHTtjzO6yF-Ft(z1+xdlJx$YtJam)zg^>q)S>J zPBjxbyozm9KWj0oGS2V6S~{LrS7e-jG3c@WO-aWw`pg=?N%|?~9?`gqm4hK8iFk-S zPB=^3@dub;Z2+dX^J$WWB18RuEjNC-;b(^Cll@FDz~w6@SIk!(OEL^RBzMpl2}bqf zgrB@E`!7iqAOARpMM~44SGC)HK5Wf2rV^Uzue-q+Ct+dpmN{DITv{lr4-~=&wg!CM zB$jre_UfILr;%N zqH$mtGj)PhXi+cIj05C@QjQ2L95P;~B#FM>8J4Bk*CN zp$3rmH$p-0MR8J?D(&(QjgW$mRobn;nwc(I zcoDrs-w(Yb5&TD0cxWY{c#%n_IM#r@84-#Sw1MpFi^*lAlYsvko6ny}WaS#OXA*CZ!0@?)GP01(W;ae#ga zH*=D!jm*^5Afwpg9OPc*D)M*hHCn2z*my&Ib-;*;JgIx+d?^2FO`fAdot2 z6@z7IJwz&sCj#AHdvOEgsr;9YQu42O!;MaHnW}Ox3l858{%r!zPJC>YUV@;(zhYwN z#wq4Zo_goJ2i?BNcD)oZOm>N)2%?ljv<|lDAGI;mgAi1zv-2<(HstMkAGDOQN+QwE z3$|}dEDpEa#py-y9(+TKiky+JUTA-Wzd`2g5!D6XB_Cf%D1fq#d`JQJu_pv(s@8`W z0LVXc^I!ihbp8_bkJjCOcEO6q41w}HotvpN`(spB=Bd^+V!1q4?FIHHMuX)ZeIlp$ zd+Yf%R_OkaNJJzfd7M4xk{RQ7hU1)EP5;k2i#1b*j@N>NX%i&C)!d}WrHi5vfp z9R1FSyWf1a{K#Tda_~I_3=Xo@%XA7gjY|5f>kAwr5_KJcIT7r3r!#IpNi-=DJ6E&iGVd4?K4&y=Mb3LW`1nJ0CLhN zgsTM<9~#4TfUO=)6diK+f_ted4qkks{NHpUcmHZ1y#@*Gl_WA&jQZ#?GpQ_%tTVe+3VdsfHehz&U8r0>%G1aXziC1zpg>%k#j%{ENov}$kA zjDejA~-EGjT{X_j;_j)J7t1yVo|Ick*-}Pf<~QOvh}G$+dMOU4 z#Uf+g@YYL!kt)MtS?UPg`2BrA%5>h(NZa>0^HbLNJ~gHyVV+VdU1ch+JotQkqjTxT z^tk@V9zfuO-0@M4X&2j72LAk?ySo%aXxO^Ny|mWP5b zYhJ9Hkfn!{2sQMxl#-S8En#MGm${RU$xZ*h8VjmI+BCvt3b$iv#BC=h9y z<($nZSfzvNbi25kS`AtwMsKnte=~XPes;R#`i+`uHp_@gg$6PD^jVq%z@1_sO1H^0 z=O--wcYjQF?FYe94$k2eCw-<;HPty!Pfg~%pC*xb86#Ul!)x}~MS}=OYME+Vx|e8) z-u|JlPG=n$g7^jG?8?JVphi%P;RPJa=^CkO6DQRJt-)1`wuJBLQ#0lNW9u5D>x#a7 z(5SI(Cynhijcwbuoiw)9ps|z2w(Z8YZO!e>{MVWf^FF*!@2>Ukz2}_0_YZqhYE)px zYWfO7KO*5R#HaL$%C|nr224f`>YJX1OK0o(2JYc4hHt!w$A80JP6Dm_*gjIZ1kIHw zrAbiCT6tQAV>2sq{;jIbSUgv4S9KmpvgIaRP!1k0tO&X-b;@lqi=!#JayCa-zp z(`z`O2I0#%PYEvvzlLXUa+t#Pe_rvB8jgrA!sw!46KC>x9Hh*`9OcJjzBJA5H;vD)#D!ZFcWuxc92U4+0bB#niKfl2F zd}}Ju1jkf5`nQaf06@nVxHSnryqVa0Y_M5X6b$u&{)?^o9bjDUOa8KUq~lV*N5E~~ z`i(zZ@ZR3Z$G_DqDU^o<)=Yi5)sK}9L4+YWt`GO|!(Hk)A8ZdGxWMb~i#0{Tr2SDE z_vhX$ONy3vv6 zCP(sg@gV>baJlx!kf)bqa*zIQDHE5pH&ar`eUN*Cy3Aw}M;|s9edxdB7K@15!IqAX z@Y;Gut3NRo!r`qTUNvj>_}U%>oi>d6^x&L(rQzD?8Gell$X%Zw>coLMb}XclyG%JD z5dd}xz3wY?vCgS}UGxq4^+eM%V5s0nK)GVBKH&6n6cre4$p+^jk*I3hIH=~T73DmZ#20e|pWbIJ`RI;a^`m6J zgQK@ZZ>WW2wmv=~cx<8l&Ko*hWj~X1U%Qkg-8z%oDzCcZkLEqfxhgHdx6TwLn<@OD zhmxXh6)|MvYIAL?N+IB~ZQZ63SoQsT4U`!%NLwA&;X? zS9JU}@Fj;|C2ZN;Xm(T{tuT!+L|C%9tD4Zy?zVHZ)3WS9*t6DzYR99PsCAHRhwqzF zivB@$>aePp?9b+E%`c}pc9UTuV#|(i2cz#4hev8I*Q3NB3{I z3p)l(>uS6nZ9@?7Bcv(v4F@6seNyMMs5y_~tGL&}c=~u6Qy=oNzQ996!r`sMqGRx^ zQi|QzbZPdQr_-LFP;-S+n9M9JFwoFMG&B)_MUF=}{piSCwMu(rp@A7Z*RsJ zj2N3gY$OX6@h`eckqT-N?HXf&xjQpbu{F-dsM$7Z={PmtE4b4}C+8-EL$2}5?a9>+ zkxc%^*be5)WLZ>A@ydtq`{@}SwfBLH`?eEL@ovH4G)|oK0Ne;cddsGlm?mGcKX*Ar zy4fZ;XUpO|5ySe6kT6&27yVUUzI3&UZ$5fsvyWLj7ySdo^}qn$)lT2DO-p0xG2Swc zghba7A@QIj;%cwXDX9W=WFv*98a4U2dh)_B<{1S=_EjZKshee}?E-CNWQx<&fj`#K zApmF~jfE-{?2hg6JPGwwyF63zrqCCjNFmCHEgfz7b(SS-h8ngj+EKUzaJg;meca&j zoAw&l5+_O=J=_0|M4UJz6uz=A26;H+_$Pqa^dZm-k<6ga)QP5k3y^9>3C7jJ{%eDy`4Ch&3O^EI)T>QDslXoIc0aI3qPOF>!E{$jN~ zJmHv-Tcl_<%C}r4zRp)8O6Rg}=4 z%H*ZJl!nW9<4_B@3^w~wl0>AK119CY0n{1oABxAv8YnQ*pNxTKAy9QzO#!rO6G;q| zMjMOq_0$hK9S=e!M&t4*egZJ%n8IyoFtMJ@X|m_pcJo>4?RilTb;u48FHJR71$F)1Q0 zBYBT52~kn@IY!(<6*kEqLh4}!TXM-+9VR@pVi*AFtk3}I-!{)31gH4;~;Tvp{zH8 zxmm{PzBF7y`O^ZBRUx|E6+3{FZ%(M?(y=eOo2oNLU&tAa(7^xWmdt}Q&hReFq$-6W zwESjg+G|QurpsDR+uiq2d!&Em?j$n69zTnNoU)$+1rB&*S69uzoTbWM#rp64P7F!r z+KTq~85>RP4$u|;r0)Rv(0UF{5gTB-xm3^Y{5WfdUuI`qK7FPeQt;dk(yx;@#|r0K6D2A9BEx7Sgi znS`6;bqt0GQGYjGM5Z(4te+DXl9`JAi|Qr)vd3~@N6pL>TgDxK@ZMY>JuN(T>*V#xXX6X zR7SbH9=>5j26uQp&Xy+LHfF`eb+@{lVsYC4{`L7!Xej-Q{U6AHL`WFhqff-ewXE=g zLj-8Wbvry28Z1@jE!hAj#9nye4cF8Aouf!`{!M0xxrFl?Gei07u4Bw3T^`+arH*;D zY>oa?FDY-`UfLM{py808g9{3(pL3;%LVIhXn9z=~FeSg}!Sb>H$r|zPukvCGp4e;x zZNjY@4zOc^9v%H_L}#4$PG*6iaavVodJX946vfiUGf}!~+lbZ%G+sODRp?VEBUViH=h=P~38 zApz>*I3eR!-0bj!d`c$)0nxpwy)2!|t-uD<7MA3C-?%^3DFU{T@0XMn?Xw3!+Tx*S zNTTS;9?a0n(FBWmwb(VO2RS$nxpJ7Es}vUna(fg$_SfPvrX5*zK>93Ly>D5E;FS4nmLE+UMG0ua3%jaD+)ql%`}Iv zn3Q~(PTWFaR6Dq9(fU(Mn`&fVu+FL@#Y)Z3S0l20RbNkkG}q!RI+vjZ#a|-5exiqk zB_DH23G3B1MGLxD;(>1ng?$yV?s?b5xUYM1@q2FY70W7?G|=u8fxGfAhbcE9FeT+L7GZ+P`-&~SZI7TP434809v zB3`m)KcH9mN7krLB-dLUA5v*(@XHQvKKr2ax{Z~{#-Z#CHdzLtkk;A@0RCC=ADUi{t>7K)YnyMG*g z==W?P`dlFCB$P$ys>+F+F(+jd9GxS8bbj}Oy1BLURIJJ<)mE6SlBx0L?TAa=81FN# zooNn8SYO@2D`exioW9<`HK3o7ytkx%y4i(pe9xnGQZRkw27hJ84*$krVoh6YqdIl? ze*A0=0uT@B{E{MoB$k;gQ^1gdQ+pKkvKbM~hFzUc#%pKA;?(-J2#KT|j{JrK&ViTl z^g84VjfwY-IX=I~Ja&QNW7Z~PS|w{W-sIws6ClIz=);KzDhbJ|m}Yr_4Arkj^Rq_u zLco06)G>{AcP1__EjnrF~1sn#e`y(z;ve1)E!q2_cWb745lfU<438vl^dprYvkVl%o zDbz`zC`r0DQCa<}Nhn$~YSDvY%Or_Cp^0|iY8OIdKjqf4UtIY=1hzuMkUSyPW`;u% zp>DfkwD0Gqx0r9y0YU0!twrdAadpo!LB5h_)Qte!N!`|pNVQ4}JG0^%rLe+&fp8LP zVsera20a0b5&LpjIa&V4``1|7QLn$aUom9a;yb6wXq|jqE$3prXRSz!3BB{2EJT@QT)q8{6+6 z7>Li#jwuZK>HNQDgoNW-6A=`{+>_P?!_hFj{<^yNd)GTb5W@fyV3@duYuT3^lG#Zs zA{yqvu(%J9?MJoxk{i4$x+}&%yRObaS-EWve9liVJ)BCE%Q9)zs`^s_?Z0;)84Vl5 z>D;=;sl4O(qd{moY+?=m`U$u-x*XusY~57A3OgPp&U z-+K++`dOkngGp)u30ZloPb~eaTJ^~Lt!ofu?NQII7l;&YP=^c|)Ktzn=CsKuIP)DG zVtd5#C_*Gse$uLCr1^?jvraQ~rc2CHe)Gh`f_VEUckS6k;J;Zko{G_wrgw@uvWMp~ zhUd69bMl#LNslLsAkrsHWpns_-to_0b=wYb4*}x}De3O<-QC@4P5Z@2iNueSnw|oJ zwgC5p&rGt2Sz=`0FG3x#s*fX%5o}*W0&Ui{0?KK|84EalZZ1iO^UtES4=k z>8a3It?vJ^8a2kN>8t2UcltIr#d_s%Mb6WUj)?$5&GZ}7CBJFXDZo_JK_i?htDc10 zHD}^w)uoaExS`Wit?fA3gDAa&c!`owamU`Y-OwUOb_tti%%__%AZmO=*DHvMW$ypq zo4LLzcpKV$CHr)(9DiQe@p}S7vzHa=IkXxMcN=mN~7Yv#2h0nAM#- zcc))L;ve5KS8hdf(mK+K||fLVbQPbgOw%iuno|J8z^@=4f#bxusxF1z9wZ)MXePN6l zBPum+Rdm{3MlXXybInj_nT1IBh$9w*>r)=hKZ*w!%lblNSHp|`OdA!_5q=_1MZtOR z#mjzdKm>d`#AGvOY1PQ?j)dV|WGXZx*d;%{y_YNG-+nvcMRN;%aXfuv_klTCGZ^5Y zP9Bw1DN}x~Z7!D9h|kLEkS$cSp}7TrZ9a?>Cj&n6g_7tXz{)yTt&}2(mv3{m0c@f} zK#j%acHudIUoBVJtRMIu%$cOBPsFyl9!t%?meacbb3_%F%d;Ww6e6117{zh`BA+>} zC3DwT3mQ>*x?T~BJ3knFr#>#rnti`GATJeLhEV~f7^lx<|GXQo zS$*Y;!q`R^{CFD8=nsJ<(w~=IVFj-65S~Bb>#$RqN2S!PI33se%`P{6!B+rv))QcD z^UxFVwAO3Y>}ycoE>`KxjKYvfjyd@OFzuZ7!^4<_BJSRol?f>Z2G?KV`3Mkx>)I^p z&swm2#a`l=Rsh2#;u#ukC$}7oMj&Ps>~*_cV6`c6W?Ge-s{do&5~3gniHdyj?#8m~ zg)RpVPr}-N%MUQaOMvF|dv5ZPI5hy5=+G#?|4|rwjuavV$oLt+OcQe7Z^npY<9%Hj zu^kJcK>wHeB)iMp^jwq<;0O)#P2i3Rk7&cscLj$2dpY<0J6B-i!&xl&$q<(L;!B;x z=E%ICsPfz{H==MkVgNH55T{Bt>L_3_zUg1AwSatqgaqWY(uPJxfTj@c{$yeIY`L!e zW|THw8m4x)YrX{YyD(sr#g<= z%6w9fOzwdD$VhYqI21-hl4FF6g4x|!b5dIBF_c~4}!iu*JkT_FE!hZz!LM) zj*2=_xg0~OmRwPMcs{ZQ5>lyGJq;-S9eC4_$%pM5$*@uBe-x+m6b-aE| zOrjai9mFOtR0?_Xa!~X1_?1YBMJW%y^#Xg`s zzOXtT%6^B;_ToxC6oX`W?}Lt_aDVUc=5Ba&3u6Y9u^!v^yf61~1*-5||NilL?2SeT zV}`BH1q3cN;b-}iFg8G!{Bwrd5)nP{qpUXFkPSc47C74>i5W^0L2$EBDyp1y#2u!c zsYF5lc4@FjC`7X-9!t+%Xf~wsb)z}pqLhlhvr`AYKBll#lVc_dIMk&y+-`~omC8Qc$`lZ&6r1%sO|FgmGD zob1XrHsc%Na?nlnJ79KVfm|>ek3jwQd`hz~^v?Mq>qSt8xr<~Y$$UA5wxRA8(bT$d zwe<1q-#WgU*lQ(_*(*oCU%hyFxa^wzd{+!RnT2x~LAt-iI`6R#qBSZp=H|~x8<2!WpE#zX(It)y zhAUB6vx|qNBI7zaDPVQ9K`m7||z6sa=Ydw8)qxC$Vg*|f9fb;NSLuR4( zthm|aP#%+w2*p`t<6ugsTxXmd(&d)o^eijjPMfLsX&)_r3fMWO1dwKa{Bk=w;^K_N z%z-6l?!9j%Z1lQZ_ z_U-U@8$HTo0EB>uNn-_%w}1~BBhoAR=rd{Iv>wif;;`#tu!}P9jdI?Ts&(&xeSwto(N~PZt@?Y% z6B3Ya?w0r5w_F)O843mY&#^NFF63v_=r@;Ro?N}s+z1ty#VoQwE$lXgqIk5cKx~|< zBzEa`<*+DmU&(i1*wmO|8u} zT}|NOS|CWa*onG4J2MkbP+=ugo1RiYfbeGzh`(l~X!!z3YU;XX!35;krz|@cI>v_({;_ahWd_q|JDXB8d>wjk1WGQ55?7uDu4p~=m?K5R(cm@ zaBig}o*Yf6W|kHz-a07Jd#%apU#^#Y42A$QcmjFOFWCOCug?Z-KSXN}abFpv;OEUr ziXGQiIW+iO{`PP0ivF{2$DF^Z*Y~oWdK`R1U%)B;r|V*E6^QN|(vCEp(5Wc0%(r@Y zaDI5VvA3{$6XXV@KxA3WHKspPj3h+=y@aDwMr0T(%#1>WPdZm-D=bjp?M~^+A%i zT&T;{kS@5#v+71BlH`OiM7i&sW!nLI_?Lt6FyjeNx=1xkECHriJAp`|7w%(Q+{Tlm z^$DlDg$f8uQ332Tidu<6K(~3h>@o2x%&WVB^>OpIBG~f6YWt967$k}iU&uWzXn@vd z`GNm~=c7w_bRI+$#OSN=gr~ihUtF!8@T4z&Anc z*7ulFz+?hs1c`rxh=K}$QI1s<1LrZ7(>Dw(fJ(9HI>KI}j0?F(18nO>z8b@812~OU zEk21)zY66|$mw?Jl_G3Y{sf6xOqWZHkoOG}L7e7T^)z)+-d+^d(cAFhwysPXqu~HX zQQ@YS8teO7W<0ir&FPE&I=6FRnQ47myECpu1zn*eUUkkgL5! zxmwc+oS{agVp%5JwPt34rr1xNBuVo1HaAK}#yBwokD%whYk=wUO~ zF4yT?ze;m0>q8~1ClHV`SJ@z39>76Tr+(?aSmgSylFGfNW8serJR6RLo{l_sB52amWk^$&ggPZ4T{)}iH)SL#83<9{zKS|f{g=5T78sHA7 zKhBt(2K_E9y0)g-y!>s}hNQPpx$?|ov`A5l%ZZ4f6fN72E45S)qt-KE`k{gQ*N<;E zgMlWNkoWNYQ*yn4K=)hyYxml>WRyMc8(q%6oG}CaO+kWll@~h-ma%^@2|@cNAJ~{- z0I=6|@%@}2rYlsRY_l_f^r8V}owO{59NS`U_TAf&i?ytJ@5muv>lcvqMSL>kjnf1% z$_t}Sr+*6Me43Viorhxoh%^%S4-GK$-ydic0kgETy8+DS>pkNdG_Gg!PFstdsf;&j zL!q^wzn!)mUoyi1Uk-Oi^uOD*E+beeS_ zCJWP#{#v(i|5_QS`cqRe(-(@%tZSTS?DDjW#rl+4c~K4Xr0YguRDqT-iq^Ql-oBTl zWA$9qERSeRwzwyi-etrvV5;le&QA`JI3KG^dC}Mj(|1$SEZgbpF>dh1`h^r4qB3$T ztTlnCsBa2Y6&iNGCGz#TwJCk1OY*j>dbZzMHoNSkG?wZo#HH&qzP|@6LnA6Nooqn! zrzs6fB^Jt%5wc;@xoP z$k{>Rfw{KC@WqQ&J$>blX{Q8h=)HHoKgXsZe9|1#*;W6T}h}Vf}8`A6XoN-)UKo%${Kyn$y2T z1W)eKSf4YG#KFf2FCuEjGPZL;ZAI<7cnrGlWDk0LH#FHq@s}rfY^5P*3DyJ*Wz15H zTBN1pS|2ar``eb!!B-V5K&MVq{b71dn-Pbc$?_R;@s-AMDS18OM5dEs@SP3!wnk# zCEj?=2rXS0M2k%@_E;?`8^}T+pl_kqBZtAf?sh?Hx&m9O2HV+88p_o;{TuHTWoqz- zD+N?vVb9l|1t}^stVTu}6qKzGhpNlut7YS`ZtlhV(p2-E3F{6q9QV?K8BB*14FAkE z-g1R(B2V^^n%*H>x?V8X_#gN>J}h>owm9`v;96i804@MN9M<)D76R%(9JZjJ+j+rJAhI$v#98g0h1 z+&02Tj7fNTGlAh82`MRqc_NXLj|O$iB-fqA_3G06@9H2AS#(>gn@ZG7t60y^wv&6q zw92Nr;U)5qg6!Pi(xL)yfB8&Nu_9yB=u#l~vT?Jftr^xq5$FH5jD+q@G)-`7MAsMi zv*7r0iah|~CWr7y&B6JYnmpojd&EPL^y~6A3!(PJiFEOC@rBG9@6YNq2qN)ijP3A5 zgUh!|UbPCEZSB@%5dn<4H%yO-==t)eyGSAK_1~l{W0KyPJk)yRx=NCx#-_{dv&J1A zPt*U=0_+$~ZDtXZ&PgV_Kc1tavKkw6!!UQ~>PQBG1O=5artf8(tytwLT{>TM@nnj^ z2Zo2M-uBfR-oVljTnSu@lkF1xMa8SQks{&TI{D0-<9by<_J04tB$}ATbsL$+qNnIa za!+$G&al&fDU4n)SH|dhHupOYlbF6~;xE3asgH7ZZFQObkdMZiuN4+w+lw5FW_x?k zD%6weTu?|!Sfq;6PC??{nX3}?LuQ8c^ThBy-x?*^1un*9y~K<;>r>^<7x{e6IK7`o zyOea=s}Hj;6c9*)8dR}K)F9bHy2|{DDSWYCn%d&Jv9{>;#3llfka9Vd{0E79T)BnD zLE51!gaR-51(nFsAQe>Ka%P)SlT745Tb?LPLP+-d9D|IXz{EjucF0ULX@|VQuh|^T zB~C#o);e77#Q$^=!T>|fprd$_?iZ4s-cj5XP0@rDn-iEPlBdRy@=T~1HI|D7SOo_M zBak?W#aE{FB)iJMag*+);%inz;z)C7Uyr`<21M;67oI~wb0z*h+a+TJJ%YHqJNn@l zM0Fk77Em_Y`4@Z}x>Ny;4>srx8GNc z$fVrNBW5L2_O`L#Iul=%6zR^^lcHpcd(G>Wy6!b}-Pt3=L{Dl~4UUGT2W5w^X)zyz zaTZv|z4UfoUkOHbDiOavJ)NshW;Wc+?`f+tNNlyba)145Q-7MEYT(rQ2B!5*2vUzL ztP&gs-lyv8qQx+^E8+=4*HZcuG;!YG_~w`zPv%?8h@sKwY@hV`Vw|1p%kDx)ypA=6 zG(dh7PYBk2 zH!Jn8+hq2ud3RxlE2!c@ul;M`ii5}3)I>_Tgsd!?O3emN`z;W799Dh69-Ah8vkpwn zG2HC*(G8hp|3wF;_n0){XOiPn8VvCH3s%oHQ6wiSFh4L02F;Ose@g&zVeG?0B?po^ ztZ2yr6&PeZNz?#`#4^tq)1>X^8C!Mcbg}F~dH;#8zdAV_PWudwjMl+lqgdD}?njDm zvxwK8D=xd6iB=~Y31xUcb(Sq*+wjqSdC}kpZ(suDx~K{+CvvqHC$W*#s>`+)KEsc# zCr-Y<{Tc62eu_7mJXNY|4Kbozt6rQz{ix0nCAFackgxMZqLkD6qfVt_h{tbPq#7L& ze%hs{+3U}rJMJwJWfmE6z877V2}Vj*a8@RQ3F~x#$z&|ZX``J~9`DJf=dIFzH!|}D z;(M0nci{S5H^f8N(Af0wSfx}N4LDIAQi4&_8zqIi6O2*XDY4tF-Q~0O%)LZ1YWkWw z+x+;J%jdl-(4$4#q-sB^gHM9_S5`1r5s{(O6oOpdcWs1YY*miieZJRm>rIQD0hrWI zGEWfDrym}2Sh#;Mjw0finXl0!6?kTlYDW9XS#N&@XM}!mqY-yBQ@?fYDT3clFR`0H=;4Y7V74WQKC~; zs233r`8j%62@S(k9OdKVA7`*g{mHZC?kNpbKkAFm5JyP*Wu7F}1|^_|6DGW4*u670 ziY_eBf=}q|Oetl6c$6&kGe)3Zuxb}{|CTj~%mZer(%MhpieQqJ%5Nl>DXexVY>lN2 zIl-#F);Gnm3g5oWlK`0Z@;uDu4WR(qAO_8g6r8&I6w{Pf25oR(c=OB?uvu z#<4P|+&MBQ*rxMByyWLU_M=Pu1t?sEG56j{xc#)g$~{&Lfph$=u;)1G4|b&QN(lU} z)BiYJAVJNFBf}@mb{fKBHhFbi%v|kw-mrKxh--IsTHTe9lOtzpYHHE;_V%xrt4`<3 z2`vC0k4(DW08AP&EwbXf;`ZAOK3H0;Q^G}pVEF?5U@(aFdgiRN%X-J@N_h+ zZ&A&ikc1Ti5|z#JFHPdcTcNVVw@yA)hR++Uu9@SsZhmHta20$>Bl$X(w^zLa;nNTf zoA+!__CK(zX;g3o8~%oJKAhV4Z=W$)?JZWLGqiptUunir92ZycIyn*OTz)k;BKzzl zEXTwWuP8h?i7_dzDOpfQcBxmpFw(Ag!8Q(@rkrJ|cx#^R4%rX4{VFXc^84S)Z|pSS z{jf&J@zLm??%B3pGSpw5A}^$g(p~@IaWrDR@mU`i-$(j%jz|imzz^k~B`Tz0K2Q^9 z0>%`=#g4T1aMLY6V@kx?=1ljP47ADG9x~Fo%KcM|mA~o7Myk}^QL=Egu-9v%$MPoo zNR+Q82djOgPAx0b+I8XVHe5_2v;1npeSYiXYpOXR-Q>=f)p5@-#$Jsvz^yZ2JBTyLt(P;r8I*HAgSVoOV>He8`@+htTlt z{5q^@$_i=lZ4j{L`4Z^!HXLGgWkE4A`*$pur|-J9N)9N*bp4tirxh&kk=9t%Q^DhL7+bfip1(LBZP+WKAWA^e2Du+M>B z@%jvpcH6+R>Fx1}lWl<9wX3eEQ&;_-zRpUs@@t(2&i>v?Sd61zeEE2kp?utE6bswK zr6}6SL~E|x9j$`KhZ*n?*gP0^g z0*^MC!{yksX__i==QD(O2Nf$-Q_Da39d^EGR;Gl7LFarh;Y7oQP8e}(RjOio5HR@D zf<3#-+3P5mDAP2FSJ-WK-kq;|Gv!t3Ufk?hbtDe{FS<*3Dh{%b_qi3(@oe$MFz0{TYFc_1b2eiKgjtMcbuB8*lX9G$ZtVa&#-lkC zZ*5z2W8qX+p?Iw~h>Wkocd57A%?>P6>>(w+f9qWBe|Ho6t>b zeAy2tqcAT~6C0+iR2{gfMs)|ab)IE5ac)EiCBaOp=df^4x%td^R!Nzzic(o8wujso z+$NmTznldj)Zsm&7q*q&zJAQt!uI^ro1$O z3X7Fm%$6AHGM;kawm9iGrw06yE#BFNy0cz2$dj9rr{G5pA22-J2(9IGP?Su5JVhV9 zI}9q|c9`uAp@TdakD$#eQ7GNoZ8B=P4Uk44V454=^-isz%GG0d{3@PZqN~zpXO)n4 z<4E6xFtO(x5xgf1Z=+?g+|FEcr+$C(MWLhY(q6SPgq^M-h?ZKPm>XTdFSWZL)9Kht z43fH3_2e(Y&SZdrG&Z416$zz32t7HCwMF?^Eh-7C5RkF#Ll zwqCN|40QM``Zb}$8_FB#9@Uskn4}?UTyOz=gV;QsnfKiUa)H;0IBnJPLx|bP*HGCz z?}|gdS8Xt3kdGpUa?<{&u2fm{ovEGY$TM?2SW49A@|vpI}+2S!>;V>7NcfkX&LKl6%W>Q=S3x2SxJ9kva5OKg-2=`@J-X z^5j`xe9k*WbWSo>@AO8uWQ|vk=bU38<_y$|tuT3h=mK$Qz`9{hnF;4Ul)P;YYqKtm zXGO(iS=Y^wf?r5#{fSYi0VhLsfu%;xhxx1YxVDSMQ_RJB+dqs7=+gppLEya^Ce7q_ ziI`V@KE9YOgaxL~0YZ+S|60Gfo~b{aE&s5+7^wb&-rWWMkANWbeIk~SkVr~OvcFj4 z8aF+3`dv^E1cX);TwE!@Kmm*lX`^~n%5iHlYJ8dU(P*WN#@SVyA!5oL7fRIHC-Z+v z{Hti~SY)`);)Y2ou(|tpaIf~0&+Mj@#ehvF;XWy?5|39cV6i;x3tKq69r^B+mEc2e zR?3K8hvxk0=f(mDMDzJIqi4*O>K9>3&Tx=6e2Q<=sHdTL&FWZ7Q+~6Ms=}qp~fun^Zqo2i*^A5s@(k)-EDvP&uSm`L4voN$~%!N-HlFjnFtFVZI_$g zp?sJ>m2_7+?q%ageEg)-@j7YJ2HzVhN>2N3_9h*NJ3T^_Gf`F!{0b)LEs$5 zlKa^y*@~|EHRhCBt&nKuW`GAQ$g3=&WLM-s_L6z17zW40XC&|KFW^-L{tAlB`M zW58=mntcIn^q>XV87!A}s{;&?|0iCNY*>*_s?!~I!lY6xcVS;-YHBk!o@btFG!bxk z?bnz&y1y=9DNbspUm4OHU8JUV0c)GB41&o?l|TPtq0S&OU|>wDxzKC5&J@Ag2e`l3^fYnOdp>C5FJeRFxqn3ks|Amcl>wPnA?Ue?DZ$9N{T0aT{7dx23 zw1Ri=(J#!uZrXg`Ii}6*wN3y}f3ky4V#>{PHgl4R5r_byt|j5?^quHAc2e6NE`BW# zk(j7DZLTJxNz_Nq+|m@NJZ=|z;gs1__c=h|fo14=W43I-saqcZTd9@K?Q%kXECupO zuy=Tvs#QwM!?Q{UaUry=p)-Pc1CQbQA|dBkvW7>+tVx}Bc9}I}xEnjSU(C~zJD~$V z!uh~#@hS!yV&tbTz}Go+Be{O?z2^lB{Uxn7-8K1Zf~DH55sg0xjsI_=VP4hu%L`Eu zP;G}2bBUt`ac+4fpry_?FEC;PUZqG?(!tUOhcaAMV#u24YYGijQpjeC%$DNvIPH7L zFa~Jo>lu*JG$nte9~R;f5qncv$=^ENsVY z!oU7j^%ir}mJR%iP)PnW=JlB9=sI_3)IWQ+PJ0Y?=Mnzk(CT)cNd}c}VI(Ep?0V7J z`Eci&tM|F~bnX*k`p={O)z3stvHhb_=L*@6#Z&e~z;tVZKS6oEm-_|9avX|5{Ze6zj=1Chq%O(m8`N@~qzRWnnr! zpC4~TUBrT!xaYhIw89*+gqx>=#Vv%;2J3g}oXx?<24K5`jD81Rv7PiS13aYrqs!&J zLcArv=UCU5w%vQ~5A{o}X{oLR&haa)@#CJzKNvj-|NaGpgn0$@R-q5iv8Lf+M z6eW%)1i#j0Wv>OIydA%5ltKRN@$b>UYUB6+WCvza5sr_K-)R-Sc;_mXdM}jIle}-y z6%f8r4qrZOv6fT?x_NqAw3PClPLMuUbQw>@>U3gcOEXPie|pPq;eYe@!#!gwv+zvX zJR1#MsN!~fs4$rW^k5*~`FRE7H2Um9qMUzZH5%8&Ug@C2|6o!kK0yiL;SK##5C}`F zE!w?%5(m{4NkTw4KgQlqs{)epq{esTgk1^Y+#St>XXuOldMD(%bsl7Jy-+MaN+Gb8 z-U7Tim%%-RAUy2Yv>pB+_oHUdjJJ|InV(d?chDYtWh3;859gL;ZJNuAMqxOE5m7a} znN38({bWJ*!zz={KB+!ugIX#HMR;Q@#Lq@S`)DFS4FhYbG}zW9o9v4-&v?K0cg9ZT6@fWzA|m8oQML`axExR=0LrHms;C zD?2Y4GpnpnHSnfQ9Qcon`=O1Dj1Ug=_t&>9y-rL`33vgL9!rAAd)A}&kn-04*R>><#Ii2%s;S0HR~9sYljisM3=?3B}z)K-R+ON+4B%d z%)ka|+FdU7=<BwA+C{)hI2(xwctC|H{^vOW zwQU|UI=V?6)rcyeitC_=kaz42KHo036AhQ%jR!w9~TfPx~*EcAJDA+ zM(X?Y&TFr@@`nzHkhb^~hhLQyFT4FYt8bxLEU5JN$=1UhLb;kQ3jc|RhSh7JDT#{ji z#mSpEN4?+1@zz`$6w~yCvDVmfjK^Z;5sNB#*m+#&Z#ge%O@aV-EH>1q%m5UXK*bwKrW;))Ic_{$8%h@EuV%a9JNiV0!N9N$bgN2dq(=d8sIbtwv?pUU8QkYCI|RapxKz7*9VlGN+ZExtE2)hMfKOq$l82VSq|FiXhbI^~g(Rx`Zm0pJtM}%*>#mP+9=Uyd+K~EMK zi3+IIjkkM)3(t9gR#iZE8DL!2It1ZsAAE6ItMtM9AON`*_i6ocZW_<*a?~=q_|^35 z(pQe0oj1*AYE$^K995(JHS^L3zAa;12vx__wntx;W?Ds1XE%hRso&|OX_4xsgR*-B z{2?5-i^F%(;5YrG+HLs?H8mSF-J)>_SMf8@{GV@`D`AsKjA+;-*)e^s4^C~r2r zWSld0#$WUu%BBE&4wS!#uZ08STI$0Elvx{-5W(yeooPdjS)v*2UyGce9*OFk`zQBO z9hU)xz|Yp6yVHFF&aMwvP#vCNdzVE0qKRQr(z(%d(gN3!`tTX7C|CXrwPBv>aF33K zuXdfOQ#X2WNA>oHzwJXdiH}9eA$cC7Mt0JNNYmL#bLO2?JzWqDc2E^K@qA3D=!}6k z2UrZ}tFZg~DM>75Dt0zzR`kQdRZ&qZO;`G`bU zTCFQ%kZV@?6Sgl;$0F#Ibv_(1Uo4Sk>HLp*DiY(eh$+T7_fVYc2!E4I#QaQ`2nwn% zXP9UujZARui^9TFuq3>iOGnBQ4j%~fl)CS`Ma;HaIbr#E>%>n<7;Jx24)M6uU-U!k zT?^ysq^co&m?6u?L#D|;%o%D92dg?L5D3_vUi}$EHnDrwAVh4bm404M>;X~y(~B#_ zmLvFT&G~V@5Wt6@ZvE5K83v}S)u>Q)o#n1I+IqV6ioYF^D#NwVWr}xXT*rnx=4z_I zAI?@(sH-The8d;mrhm#XO$ne50B9bguOz*lA5|%dXv>sMYc3SZp+Dk;*kZ%DvTVIT)?1*#T;U2hbwR zmuh0MEoNjk0rASpy3rIUlT&_I=8hE z<7mi&mgulARg|bt1*~Tve>JU|rEP~-0HGBtWMpLK^u0eQg^>T33(y5t1|Ap`^dFZ3 zIM=f5x-tNCQBU5B&Grk?l-YZVo*CBX?bowdXKVtl{vGH_sUOHW#V4yk z*KSgxnvZzMD}O62ySF(hw~$zjbpv7OqaU{d79*YSZHE)8XBf$~O%J&?4FYfkJ+;ef>7o z1ipd-z+7bbAaDUj#*cavO!uWIn*RmNHrJ7*f<{-d-Kp1-IaYR{zlfihxIh7rZ(T?E zaAr-43kmg-6AF&KPbyX}{IT204GsneGHJ9LOd_UT0sS;Npo$g%*!~5$ZqH2%CyE09 zfu_mIGmqP~k9{24f#6?MjIHA;FmUKb{XUQ-Qc6U@mTanV2t>B))4|}sG;b`tHaj}0 z-26Q8eQdbOz7J|W#Xl^q_gO#My>GUbuWb+o3HQDKpc;PCeBNIn9-3M#giUefvSe3| z)og2yOARsK9pN(H%gFT@AWdd8c`q)1HfCJ~N)7TnxtP;C16Dsho=7@Ncf35uF{k%G z;TWsTxnx}b#mT1PqKO1!v)w(`;$S#M>5^>3*qpk2^~&|RnAN5^hsW%cchJ(+;)JMG zVk)7FlHiP6M|?XUMM2%FOrXAX%WH8uEyj6|Lduf!aCxu?2C2$=QUm#`eKRlRMhkTT zEZH*BGx1sG{Z?qjV!$=6(0I6-1gvR|XXD7cKMi$HmJOEV$FpC=I$pha^RqKXf`j75VpJZpIjk8XY%B56&6-0DfLjTIX2aVjI7_BH?jWYZT4LqDlT^J z?wzGerSP4IWn4Ubs&hAa5`qMOY8L=wl^7JyvL7(pd0}5LR8Ab%M9O+lgeX)ut*}ok zO&I=b{*?@UOnxA-V1@L3U7rZNkmkV!)i6ch))K~y z$dY5c0;B}tw`sNuAc;py$8SlKbv#`pBV0-wEQy&=rVGk^xPpRqEcJD%GeEXF5hR8OE?f2+0VP<>OHDks0 zcw8|DX+5o|Oy_ZHbV(I7J)liUunijIhcBGH(g#rZHSYc9mNY0TCI3-Ady1Y zZ)G9thD`jY;5wg>SqduSmfs-!gTo*336|B0S~tZ4DT=BlM-MG`9v>Ipf}qpUvNTs6 z=pveBk%=fzXBy|XT(q(wz1v-zjXtJG_%(f2O~&kNGSET0C^* zFF)mp!rVxc6vZTivR;c)P_WR1qRe_bn92UWhbHHYsohG2nWcJ}7EI96xbl!va6#vB-NCLjP7mbiBxdllq6(vcZzIqN)5EFq zZ$-T?tEVQvKoOC@f_(S?{tR(_;qGQigiCbt_gi~F>WGX4MYf4FLvY#2Uc<%()Q$$M zow6CLy+A$)zUztt-ZljxmgcuA&p}507}8_e zi1J`t`n$%wA?t-lK{5Z)5wq*4ho$+Z_dY1DFLsSw&lB^>>BZ$5$$RgQaZeu;pQg@1 zm6bbXw7NKnBDa5{nKh~!KO4tkC9TMNS7idIBBcuu7HbhnD7a7ml*hyvz0dgcBToFm z#>=jK<@OF7nxP zSSva;Qj8Exn+&;RfzeNAOpF)$3kn|opzG~&?|8QG{k_r27cjNRD3Qxj?)LS0yxbTE zKBSlN`!u8kaf}}g8;5A$&^IG>20{mbY&o4H598W%1(W@?dY z+BlNY7+6b4hriWbNU#JAt%S?lBd*I6{9$f0z!#winRO}iij*+2fiDx>V+IxCrb@Vg zb>*Sn=NmjDvT9WN-4O{;tag7x61y8~N3Y#N*i79%AP(MllSOxUWc~ehHuBqqYm@g)9pz;!{j3w*1 zvE^3~IJ9}x(KRyP5I4>kOOlWfo2ik(2FNF>Rt?_2TaABWG5~=_0Kq!r!PEMreE{Ht zG#IBvAbw$-IkgXtf8d}Pz-U(A+TO0Dh0tngez&JiV7Fmwu+;*+aR3oM+zJLtc%%Lc zhTz}~be)r-F?w|Tk7>dRL`d6ie;#;n50=m^mw;qeWM1}je}gw=sZhpo}xE5C3CfB z{&WZDESQvQgH?{pRqySplEVLV-SUneQ{?)YZl+)O-)%JO$9f)f#66$j4hE!PuO{g8 z#hVBh>0~HV?xyq~cc1M_4YP*xBmz;J%o^Ribq@~ZD zTQ~h&VEh5P4*BoM%q-h?3=OXEN|x-ymgYy@_nsIwOC`QUc!@@-=znvKQlNLu*=G0e zoz6C>(;S7Xb>4Q|N4GK2S6XqUUWicwPpa$$<2$OZ&{?sjEPsvZ@IOu!0@794XDs~Ml>O93s(^& zhfyo_DVDjnUL-g%*F_)Gq64|EdBuO&v?E?IOFTkGfrl>JqYZzv6Rk{vj;BQan*Ppv ziI6F$^Xn1{Sh^k_3Z1}VAx-@*G>fJmkSx-lJX0xb1BN?p>*#=(L>&g^BdL!r(=sAP z$w@EH>6ip?GK=KFDw;2MKU&bl_vX!V!HEH2FVK_yM;T6bp)Nk26B;H_&}#J&C10qt z(roXQ?7zD53+~UaYPv>jr6@CPKzuNKT)*<)BMJQZ08w_Hon)zLzOCGu8pbC$a}c(I@uwz) zhMjb=4-TC~oX+w`X@tks@XN!N7Ql3t@~vQQ+ns#6)w-@$VMWI;*CfeBi8mE! zPYTKNLDG<>_I(vY7N}+V$-2trG6c}MGhZ6_P8Q^boF_fOu6$JmH&%t#9oz3RT;Hk< z`6Ft-eg4OPjsWo$2}B+4e}vyw7ZutbiTXlWjsqw2BP>TnP#bjL7TQKIHTY&nWECJ0 zj~e>D$J%tGv&Y2b&@ZFGnz%sqIt2nL1bp}-K{epYAHIi?)L!)DN=8t{bOqP+#g-Im zBc_OslM&qGL=qf<@DyUW*2+mVVFuZ)VMpdC!F9nnGh0ECJJbwFWy+lse232tz9`u& zct*-97~J<*sy_r{`g`Kxp6B}- z@_{r-u=g_-5v}e+6iEQIpp7WV1DbFFX9vU(;nNJySgY!H1gbTUE}tjJ)Ll}lN1EZh z(C8&_(-%&HJ*RJN3|A2P>ZuRvpI^vs$|VGj3LDW+K8C-~)3)k44P4nt#-fm+G8VtP z<4JKbgV7{hW$p2JkuV|xtbf&4Mtt|l>3ZC)&LiYGTkuVWpAyI+3pU}N7I?z)O+uG# zl>xH*FWV7KBW}kcX{P;1SdVODN1ISo`|fQW(9hs)d1h2^3QAMPUE{t5@xOd=3jDc2 zWkJw)W4lJ0cp@n?Y`_1dIlG6VYLVi?mljYb1m9%Z|CE;qmo$KqkmRLHG%^#-#X{V! zu7K(JUaeyxV>+tvnHS<&J=I`S8i7;ml1SO<70i5TXtyx7;-v1YsXp;(GpfIUt~=YL z0;NLX-fiDD_S@}>ZMGw$xi9h7k1#M?7GK7ZB~PWI8vtb!@16efRF%W}<6r7|Kaa|J zE8+~q>ZPF4kJ2C<&Woquta2tg=sv48`dqL#I}5Q`e7S}?mlj&VOZQ@c5&2xRjSk?= zCuLFgX8Cxwgb0LXMq{zi%NT%i`oZCGCr{<@Bmp)#?(UpG!JNosivr9H(wd=RVG9BN z3y`UM&~QI$)yQJBN#EsL2VcnjugJ<7%C45Hx5QW;P}+n7xg;1(w?e)Rjh*txtdb`H z68de!hKG+Wx5USR^$NrzEYRa?$KtwmkpnuYK=jE!z&OH4FpqGxd9L9q-{~W3-ngv9 zy%NwkEO#^AaO$Nm$)x)5pqgA-1%?$x= z@34lbYU3v%&>Fh8Mt*rIUb$8wi;%Qd*ZQGc0!)K4m2r<)8*QtV7PbtvGdL5IRiHHu z26}8s`Fpurz%^#YZASJ8XFRvn!%n;k1M653ebSw2b&_BhBy4M%Mx|hbH=;sgekR|x zE{nPq7_)T0Z|7*8Ot*6S`=O7Km^#L9znNu&EEDF#pt$=*g71GI8}$T&r*=9dGK0nc ziOz+hDij9gm8kOsg_gxDk`*ZapyQOv0120fVt7Z)*tiS@SLsJ`9ARrwiz^EEe;(nD z0*^pI=~)=-AeTp>(pmWe4Th^D+?Uqt7_On-wB!;=cCrX4%J7EsjsYL|v=?ATuO%FV zX`I`6kJgc0WVcZ zn;jMnPSy?p{}LMW-BfGd2wVqyL+&$Wb7Uw_sCW7>t&NI@tfl&}42l2lM+m|(#x)_L zEaR&_b%nQ|d-nTJ8y@s=o<=H%`VbjPTPh)`F;8$0c4)kGEzO=LffBucw2NJ^yZzvq z? zI-VWjpI}WTO+mbaDII zE>tkDH>3x8F|nvB+ddCFN?Ys(Qo%uMgB;3dintWiXjGR_BRNJ+7W=Xw48-Z2JifS_G07QdN=z;* z!oaIHL{e+HjAHcdsgkmtD-8WU5q!PjOD(@E#dz|${o%vn?^PP=boH-6MF_hYc6a`x zKAYc!j9W-d^}SdoNm6zuK7IR53mK!bmdYBy@IN-RnK1H!cKBG)G6$R*(;x)M3wP=P-< zRJQSYAr<`JH@>Q;&f3LTVRwUc9=#kpQ~z~)+&HRJOj&a0w3pM_f?3qx5N<2SP3#Xy zw_s~|c=)PNt(9NdsXB7`-Ub2os(St~{`1e>3Z#QCd<5RLTaEvgv;l(ZKsq60GfQ?bc>6~D_7Q~1pBsF(c>iK0WH&+JIZDJHj(A5hd>O)$J3f=)-mP?aMb5Oy2+`1&ZVYL#Uf=C`<$K z!1>>tAA&+RSnD@)TFug`jwlrhhAv zE{vd|AMkcdB#Y)+%G5lg5W&`nOm$-jsHmGun@W9E4WPrH8+xLmoNKN!Ij-OoYlQrcEeHFzhpK_xn^{$ph1 zbzaJx$7+{9HpRtXbibWXjz5j=2A9MDf!^q}ghcs^SOv=M^e4i}TwY3-`N1+aXygW#P){=FamINk-s7D&N z=oBi7iU!W`ege_P*2{GPA8$|dEp}UX{6(`C-WiU{%+&sVzp-Wy#H_5S%gaCM+N{}e zUS86+*k?@Y)gmqatnHYnd-#5)h@SEMN^&rPI6{Dfgd29t5a6%dc$eOL>_v+`{)b(* zK*|V4&{Hg=1<|d64eWq#%gJE?s!K#70` zBY_FM-86CCl_$*>riL0Mq5`s^k2JGIM|hDO_o=rTFOM$VRV;$zndPqKCA4DJ3*{UV z8O`-RUGH)BU%4eSJ|*jHua^xN6Frk+!9Ng$M=%_bYty}w+24{syb_ts4sgf&o5HpG z0}SGwu?;K&ix}JV^8`|SIRz1JV&7<(SDn>Mbj7kvW^=Zi$b5dPB>Vz~15*tRT5pq5|+3TMMC09-r=hkChcbp!vE zNIO(?bZj5mW=EsOoWA>R`o|l38kokvB>M)v86?ea0{8~39rBHYTl6Iu{(uq?&zBsB z7JcH%M>ib@7l{g>q;JKtP%TDEC4oNcC?YE#YLM1l1cQ@TA~z6$-q_pII`s(6IIAqy zikl72CsfeIKE`5{HHM=U;RyeHk1R4gS6yvZi9Py--TV9D_MNFUKEq&7mO)VhmB+OxDx%Ww{3u&11GwuX2^cstN2$R{dyPsS{tbCU;nju1sEJ3L7{ z3@VXUiz}=!95*Fgg@Zv}D~vt=mFRiuJd*Be5`q$eZ;pDQL2xaN@bD?l6O z&4iW^?su%Qkn!?*?ADkD-Zx@{agf2m!Ep4{ z)UR#tsUW(v0JB+vmXfmdI5=?9>`rV9HOa-BQfv4N8f1bzyStvv!Lx>I``To0M1K64 zgoj~8VFup-_G{TVQ%TW6p<5La9-!z^Bj7Z{QbD2gkco>)W_X)CwnC!#cSV2;Wg!v7 zskh>|t=eOIv-fA1HDceCoCLQxd%?>qo7Ky_*@hb#)#P>IseRf-v~!4#J5G%fIq?&K z_98p~UDd6O&-W;m(3vI}b{Ca$#NCn<^3|;s_vYj^lmOih#UIC^`g&Wl6I1$u)!vZI zorZH1|Lv8qpyxJBMK{~QGO(d<%QhKFda&^rIis}}rAn-cGAiir!;@!l1$IG<4 zAGsDyp)CIFv-q}_m^0vR9dCw&R9ee;M<&(}wtzb$mSg9ZbvH#NHEI`{RBglopD>bI zp;(ara*L|RFVPK{)1(1(5;XODHt)g5Z%to{O z?dqQ8#>+IwqScIR4=&g!(%UM|B`({%Nq~9z@uDVm#=mIz{|ZgZkea3sW20k{?Drc$ zB&iHoJ>Pq_ng7wI6A}WvVj!s1-+#m>C*M2D%F1Tl>Zl_CMzH39wN=N6aeb~hho4MR z?q+PJ21=FL^6h9?5dk*5Vy)>+Jb$6ELCu1yla^C#?0KE$7JrO1c}jWY8fzZ)$kVV>!OZ3)hJA^m=241aMzX z9;5w(G_;RGYBpaY7hl8%zk_a@# zbF9to@yMYL^o80vrcPQU9@ys2=I3}r{>n^CI6JFAcj$?XkL(S99mnw1n7U#M_J5r+ z)iWkdsZ}6*MPx?LBT5OveOfiyf74l6*?5cpR~o^;xF9swsNd7AeN0oNykIZN1)g}j zSH8Rw_T1DFUZ!nD^G4sEYx}Ys8&5S&5Emjc`fYeJR zNmd#8S@#ivX=hfe%C#31G;RM@N~={oxgl2`8jg{m0z?#d3li5a-)<~J6buzOuj0vGX(ScpI*`@0+6BlDlr-mtcQ;) zxp&wYh=4S{bM5H*+8#(i^tkGLl1^)~T8M0I9uu)8Y1L&}yF_pHke_TW$~EYQCx7*XYL}ft@*w zUEz&4@8(3-VMG7@?2(G)>@beqzM!a=KaoL@S6Q2cvP_0NS4<@%28lU4AEYF;;E#zX zV;~Cf&^keWi~r`wmx#V+d8~~NCmE6_HB!}sPnu)c9@i{Dv_GnT&>>D#lvIe?^VQB5@sZ1rJ?i{M?&t6u?zkF%{xK*i&S4&l;}h4{z^MoVhSdB8${TdGc;WiBTmN4 z`^QZq*$ie!Xn3v%sNYtg8?ru!!4KXA@|Z}mn&08~B?L%;JFdace=z(QQX3Dvf+-uJ zw%VR}i7P1Tv!_!^n1v~!(boiEk#FW2vwhA*qUW7O2R8IY2XrleTZ0lOnhW%$nUP=| z>i!{~3eZ9B<~u`PIyLjg7Xw2ou*m<{yb!+Cme`Fv*zJQ>OrNq(xyx-6{j6`kM?wmM z&GB!pD50CEH%O$(# zt92cQ#y6@Tlb(KUk?wvU!+p$~pJd$NhxLN4!Us$Rudc%YyL%pb5Vi9vUxw+9v;0q% zxwDGUB(>vwby-T4t6!Hs8?&n|Ya@zuM1Ol)aJkGV{KyQnMHUAJL}LjAE?cSq1130J zPNbw!QAtTCFi3`Ki9gr_d+|=dmrgL z$3-Msn6kgik7UVxymY%A;_0P4Mghb%Nx>NTM zqh!D}Pt@b(`0Fg*6-OblpC8E|L;cE{Vns3gR|h*PHEL@sC@iPrbqjWDdXGY{%vk=e zr>a_^JixbYb@834~(Q=b2g?loo+*6O)uJefJ(Rg$0E>=Tyl7;mudFPj*RXzI=r=B=>`b)3sptq_5yW{qH6=Cv2JA6Dxl@%5p@$L^qrr zflSvN^MKC~om=?B>R4$+8+*iIjtW5@{3O+EN`jzgx_VsE*8jLdpSCTUkZ=M2}NXQp# zuCcgFhzB}$wS+--F}K3Q8z=>%Wk#LsvAYt72T`ByF#CA+A%aKL6WhWmEEVl35mk{L}D^f2Xn@q7Afih=}IW4!B*SH+Eb2xD7NlfCEN8GS-c_ z4&Kr&2CoqJ^6#}_DPk8J(VVqI#8WxDTbZBF74#{G9-{xYx=_aTMWDJNrEPd{{S5C@ zl+P5<9=@~(n5G8ZE~NsmcUes5Wt_Rux~D33eZE%S4s_&Xy@6O|7r#wBjn7x3O?)rc zH9e-_A?JMkrC1BMzf@o^3iMdkp60Rk#R1-=JV zz^-=4gxk;W0EDjM=EY}{6A1m5t^KWB7F&LX;$b-Di~7An0!x#pfdoAaCu?40@)*gp zqdTGyE1()Q%%yxVJnJ-3iP+R`!Y=H^LC3M@VmyCVBa@`5t&(y0# zO+jzz=c|fuNtguAk)s?5yxOmFuC6t)aHYYusKRjCNWt{G+z=8TUDfKnA369wG`Pma zQ8dzi0>iRN;@pcLmPgKsXMyS+THQqzPhTfkw&=Cjeh5xZ(@3!w(F`B;<3sU6hVRdE zrVR~z9Z!}ZZh!bM^Qq-q_^bOq(0`1~-=EJ5BDX8XF~y z^@`z9_m2-d1G`h?zFQB6{X>s*?!x%DP_x-T4iC&WUcB~iK3XP6?wlRf+%8s@OlY3& z=PS6Lj|%2TtEUIzyAuZ1raje1Pr4T|X@%}i&Z;vHwXxy*ezh9Jbp4Z~q8J1|wgskX ztn9T_r*ujBrKzbJ`r-R;T)pQKWE#}wZ@-R;sth72dKwbJ|AMXI{nTO#P?mj6^E5!p zpX3f7HNH9GAt5iaOI;?<>N$}urVyb@&H--+`vYxc)LA|7Hb>?w1A|yh^AB|os=@9% zGJFGj4>yvr0YF0LHXX!pif@jLQ&AE1)XFzj^<266wuYLz>X&~ z(Drq3P^Hk{-GKi5)X3i_QgrWuJkwJX4)^}Oa_-35k{LR8ELrHfEcs_L{!^m$Fovmm zrr^?Cn{8pTw!vm|*7Y<8B5S|Q@2V&H(fYAL1Cw#YIkSA@_=s>qYB{ptpJ)^AY%_Mk z`Dd_Wxf}uD6}a!;3!~C%i4s&rohPAL|B^jAx`_~TX#nHtJ&G!q^W}s%{@3sf7IS4q zfL^GJyEhcG2N;$ao+#f$OINEGCg)i?sb`NiDPOTAsBKk=gJ(&&naxM&`fld-9dABx zrP%y_8rHd?glWXL8GHtTA4ene+ejG-njdfHtML!z(Ae28xzTjJhv4*?xtq&ec^u?} zzyZ}?BN9g=sER0X{lWCzei=3QDtoxEoc+>gAq{2z4j)WJ++YyG;xcnQ&PYI`VA z1Pl>aJazFcPi$?mDQ&m-bCF^eDi}Q~BJ2b(`psHsqVtlcS7Tg(vI1rcZ~9yZrAl3= zi3YKrHM*>%B>P_GKVi+0vx=2|ElySo@*$CzrP(zmt{$7k-Sns9*_reLWokpG)Uhh_ zrdIssv-G?5nk5B^$~dHo?8K|`{ar?yxGLVa4*JDh^iF+4WHxoog3^W zk?%eYE_P_&StFSAX5&ibpxD2e*M;rJhgMG_WrPTdv=fLc24c!zpP&zbmkg*XLweUK zCvK%_9&b@33li_{my-*NsCnN>!Exs-3l^g+pkqvzD?fq>I+L*#=Ed!ID!@EDMRi6~ zHr^xBoPGYO_fz3@v5NRb*jIMg&R}Gj9zT{`D+fHpKX(T9fWlZ6O-*#I2Ujs@S%zNv z+b1vp|6>m8&6U5gG|DPraM<+43dgnmey}~W6??aCjkp6ZvhrFtN)qw;+0peB#)QBW zKK;u^mGo7zhW{4HG9+=_f8$U->!I;Qcdn<#g4cg{_FaWKLA6gk-}vPD=k8ZZ02?A` z(Iq!-tjfyD%0a~aQIvM+{D(^HPB(hXnm`jH1;wy}ecMS%mZYq#2_Wef6&E*R&bW4` z@5t#h7$tusN1OSpjw)cMu(OF{#b~{#&nxEhVtqlS9(OEQCLgr$;zl!WS1#^&K)<}cH(lBYl!0hJSbqa> z_jJ8eh9*VO=lTr_44S{uE7{a~nWM$={oJpXdXaS(5fxbM5+5I$bY-`_S?T1v(M1T0 z<9abMf-4b5j6EDbe{PBiu$W5&nvY~3D zcT>uyo0+}EFPDm;oOZX-3=EvslnI7}B8}$S?5AQv_b~ z9nG})yzU21VTtd?T^4^H=Yi1ywn1=eZ+?MH*tXcFDs}5eGvnvm<$z7k@EB7r$`S1((rU9>EB=L6VfdXf$T=jrIjjSGDTS7>5T8 zQv@4Bb-JHU++R(?onnMC=?>a(gfZX0;4WI%%{KmmdPCq|sT-9a`;9HCp*-Ia5$gkq zJMp1sQkTblVbrTkBL!)tNGC5cZsv)A=W_GHVXCqK)G7E=D<(|UKbBaWj$|}z{ZCF4 z=ejyE=yHSXKQ_w-u4mgiZUYqrF~79Q{<@$fol@YlHuxrO(2SuJo z;kA+Dc%yN8^w_~;`2xntuVv;20t~2hnvK8zeBkjqD{ww-(KUP;criulx4b#;wL=7_ z@Z3PAvscEyT_Q*n2K0jUcOXj@f2>c1_6GG~axmo)1@#4HQez|~oS1D1QSh|~gX`wy zo|Kru=T)fuyuF^&%v)wRGeKQKtrqZH9|V3eXATT(s&-pVZYn=VN({o-$h~`ExU>q3 ze*Z37@8JB_m-s14&lnrKfM3p7y;bU`vTs7m>XOCCwl3o0SoxYNK42;|B8CC{bvJ%6gF@7uyx7#Ue(AJ>V(o6<+p0IvhX;*Z#W`pF} z6t1~2dGof8zPMB^Y*a^-zfcMakqN z)AW^&JqTh;S#Im=Mf|Fq5qR#XUqSPI9+a&-^mILUt-H!klD~kH%_0k~0vfJ=Rljd4 zcU5UqQEO{aXq5RQEmzLhzlRvfXFL90sIXXEUJ}nr^<-w=*vEJ#j+Bl>NHJd6KYUq? z0csS`Y8^XiKmfI5N3E;*X8{;l{K%lu3RU&_Du?U( zk+H|?Hx!yl?6c+iwO#;3LDN0RW*szsQ!CGRJ~VLH)*7Xxj)M&4%M;ns5zYXL!J}Tl zq*s(y>%^EGpD-gPXcRoMINJ(W7t_KCaBu!DJ$c~n%2tw8chv$RV-+1tPf)Vf(Tkah zZ+K(FRx>e$jLjS$yFoIn8c{fWS9uNPw>Eh@wc6AW3xtDGVqg^|`<~$kq9IZgE&Bg1 z>aP8tT{(Js*Y?hdhQ2=GS}v!_OtuVwIj_@VdjL=#_YV&p-=7@-m#J?(vxO2Xe=L9C zaXbI~@XVuX8b62}?ye~4LDu!B{L`M^Nb)@n^oo{iEO!2d62=5A652ww>}v6^a(X(P zc_yfWd<(_v9Lgte?s!=nWCn0+C`_zJtvSW|B0DUFAfrFAaY-3~o$FowT=biS%R%LY zA2d{R|78!7^2^HIv*C-qsb=ZpZcY5f$&sO({*O@; zwfAdEghDsUEFFFvCnT!&*IstNNqR>)7`Bav^8nPcn=lL6# z*&l37j#)Q)?i?5ih1UOI3{XNAcK?}HAe))ADWQhf9`b1Le~gJLM`jH=?Ydtjf#Um+ zXI)fQdic0Xv-s7sSpd}eM`%xW+ef`Oz|sh~R7EpYjPIsjr)u!0meW=pDB7nlHyE&7 zZTQ{y;ZV)| zR8-KwYy}vfaJpX;0tQ5^Hmm>aaKx0xk_XhwRb54sU8Gpc{^22~d>jAi+M3Zw(sb_F zp7jTmC#F)O?k!rf&`NhBeBp$gtlN4_iV)_)7AWP~O{eQ(SpEnKl(g7RpfZnA{(63# zIEN)(H4!zZU-w)8T`x(HodjxeU%Y^lz!iUOuv|hdJZdzUf-*s@J=l~;3( zmF9(Sciwy^ot~j6KU?O809B8Y)oZzKMgHg!0`6@+H?AIob@?IUgR88)AY}ASDI&cSN`h6_5;{vu)*2Zmz1`&_PlgTMCfG_O_A`ubHnxQP=DFtlH`-o8hB6<0|_4OY~d1?6Dn zeSgaIyBvkmc9Al^RsGQ)_CoL1^7j6{g~%P+NHr$LEF_&BH2)@y%SN&YBGyG$_k(tBerrc;I$L)GP0&F@iTMS~vli=4? zE83u(i6H$mk5;F(vXa~zbZidKC3_E)+?$7+CRP$6C#i%#4=8L3=H7SuBXeNyCp0uTOmalkTGn$Xl%Z*BWqiU0Vm`FE8OH z8q%Lnn(I(+l@lZNMTc`>|Fy9ro2545htG67g_F|y(Ip!S2XnNIT)H*D%PTwRwO82o zbVCb#ZqKBkQg^3FOa*UYmzDHhl7wA+a`;EV$Ku%ob=NavXjtBu*$Xv}SyWgx4=!yc zUhA%cB_M6y0eYAdA9D!!(^Jj%S@FI9xXDP#=Jz_;)UH>0pU8^bIg!Bqn87|i(bHuZ z?adxYMpMmdnA+xFM(SPMCACEeUitBMEbj3s5MR z0)l6~rlJ|c+zY!4I%i%oMrq{iy3>&ut4eHr{`1w__Fk_v1jtS!2v97>evGzjU46vZ>1Nz?uT2~c1-48n(Uu^4YA#DGmJuSiz6q@JI7#{AD3Et&YhbA z-83Mg8SzMeYxNafT;77W#T$WgE1%;!`&UeBwzOw|=h&fMzBsV+EeGg8OC3n?VsK6+ zr5)ZfX7M@CP43uv9?nhyj6PgGZ(Ex;wo@oiJ#5u+A_}-PC+yK%vxkT;0VYp_qOJQy zyj%;DuX3(%p8qNSXb4+3>VU3#GV8cQpFnE`-_emz-!E-~7Ewk$a&NQNjS~1XqIak( zhAe@;2bejhB2!0l z?IG_|Mn{~Ja!;UJ>3N1llq1K_Hui3MnsX2k@Ew%7)aBm5!BULHvVaj&fQURc$6U&d z1CZS!<(|I!YeZ*)M8SOiZ%D3r7zDikolz52m8Q*|I3Zi7zC=Gn7k_C{8&ehWG@2{OVX$2 z|42L5Clve#T6BNrdh_mXoT>qe2^rEvnv_4R3Ww%f>6@Js8_!Eo%-;aF+T~@<3A4tQ zQ)NrQd^&|jgPeushs3v_BquaeIBhl}Znl@j?a*qgl*pll7>j?@kHzWlbMeA1*nhB7 zmcD5gs?U~XCLrZx{_*CadTC}3tvDJ?wNt1&N{bB_#$3g@;;{C+Yz#*~YKZFN{Vo#_ zc3ffQd>||ORYOVg;>P@@0lUG26JF_fN!G`}R+^-HzH(G#a3z!H>q?YRFd=}G(M1ZJ z*BI#_KEjvX#pZ*>Kp@O$%HaA|wcjV0C>Hd#J*T7`-PwgQO8bVqqvP%OU-Or@s_EMM zN~n*;$#jEoKVAOzY9M2@NErIX+kBx{LoShhY>Uo43c$6>pF8@v+DF~(ovodKF5x5i z*C)al7yEq%YdM-K=k{I+#AvfM{i~oVok)y|;_d$r)l=`*g2|t|h6Jl)Y*uewgnGcz z-e2Hh*Ztcs22?s287sEjO_k3lmE|-24FcBdT-#%9ARV|>Z}ajor`V@@UJvW&KqpVk zwjq~>a7*=(5<6&AU#?nF6jis?_bqB8d&P3tlFRk?T6+;EO#3(S{Of(+r=_j97GBNn zkml16TXK?>LdZZataiWm!Nf+7ta&VxPEq1E(eu^44$sdXgOHIR65#zx3-`hwFA(Cx z`|@crYHa;!V(R5?X-(hFP@kA|_8S-!(c=kYK1rhjQ2Y4?gC%1HA4OZweV!vsW#>|& z0q}|o!d_sT(D~VGt>pgGeucSw5H+2bmxnqH_Mcv)SEVmBIcN1lpgb?LNjmG}KQDuk&{S}IlqJy^vuUeF2Ps_P|eAW>aP~Jbx@WW!cx$4Mre_2_KOx!Zs^=>iNgX4D! zWP4q9FeWglX9)vEW6KXsM!qIYp_|!Z&)@mcuI95AM&tAGPP4C{Uj9C*K+rZ9QlorL zC{2boO_EfD4kq5KjfW^fvc@VCR4qUNwCWd>E-WpbCjl7gw^NkyK*Mi;!Q_y-jbQ^O zVEB!}U%?#2K3*#OHZg9l+V+wGRO^QX)F{9ogn73diriOM&@(g)px9&b(}K#yvwkv^ zWJt=nH9Bai5l0tD3j&AeOjwM2gjFJpvH)J0S*}g}8{($fNGS@ZN_003kJoh>G`+mLe=bRzi-%VCkS)Dw$ z{6xj!XwVaK<#>qofL<24l^g;1R9P`*7BKXtWd2kAAKW0fyW&x9lOI!&7eerytBWe+ zW;ob?6^qOlb$a)-0qq}?!jcp5)*!e_T)7AvA%rAoIZOtKri(vitOTc_bDB;Rzo#I> zpINIc1iBa6qX(>I6Ibkp=g4DoJcsJyV^edYwvBSn7|3}n4A?PJJZ9(qEKV#{*h!0T zcwP!p5%A_mJ$0_cr}3xI!>w z@(s>%oxD)&9`6_+UaNK}D>M~6i-?m$9tR_VoZ17Dxo(1*G{Ll%O768?7Zt(7;wmuK zo^{kF!3qZ$kY?q8^riB7z)z&qcrTKlMJ#>E_b6WoV*={Bn6c)EGFfvdt&%XSIM$>4 ziS9&&Q^X9Co?I>Tl2Ot9=(gOA_H9+*%xD-`etj#k)?mI}yO&1i|Ksb)WDnI;r;AAH zQcgRHRoEbX{{|ni;*Y?Fz+vYFHj|iw@KpW0=h8@l5EZ32L6;o6XH|xdcgc4G7{+@O&lI(`aav^||WZ%nxgy_C&+b3~N|qKG`18i*|I5QF(FvsAlH zYL2r9VZIc|g!fU*PUB0wH%-+rjI|a1slkOj&|wm@6gT~LgJST8E7O1iB&hRjfb)m5 zD9?pxp59le-tSy=l^*TKX3l%=>U>W$U5VzeCg!q?z+&s0qG`OunIxC{$ffUzIz zbs_AAu=cpOY~6e;jk+>VSDP1%V9aBm8rXrB1%cL7RU1eZ7DC)2#*ajgR=OhZ zT8J>)(s46CfLNoxIpSB}V#Ss?$GF#xkGCAVdPtVuLTc*oH3vM2`%vq{Y~O!ggTjjq z>HNrBdw!ED`gBAcwln|S)p>$1SPns;_nzm5b|Mxxx*CVzr6}-Nw?fUTr>n+^{_^*s z%4e8Fy@GVY$YhIQ97jZPNp8y=Uvo=a9*N_E&#$a(H`c?tOQz zCa%qqUw-s^JBli&S3s(-4_s`;Pe%2R@rb_b=Q>w7p%yygHjCU;12i#UKWx{LL8Ohb zhvk86j>+G0@H%BNBzYn1OirrFW3D<10(|@U;#5EjujRC+!`%!i;JW{?rdu6vs@B}#c}rqCM(g&t&$DQgMfckPvjL!8 z;fhQ~tX;@9dXSLUX|8j4H)-U^DL$F<`Sa}+_SVTGI!CWij9{m`x&P+kR^NsFTP~=@ zEY$JocY{i4e^=wCo}!)2unhwkByQ_jsMWn?cJ^8#=F$_1_j^kj-S*mt6xWYmf%H`+ zAm<=;5A3M3D#pUjQEIo0kbDmxtVs?M*-1=ORP5$hs<2ATnlEo)1gDe=22LV{G_F2 zALWbC*~7s^*;n{_PdRK_?Us+X*{wL7V8>cV8Q+LQN^9%{-Q`D1zH7>mz`Ka<9#Z*} z+F+hn6@w^r_I$Aue}3JM>LwB3RrRmZI^u0RACHtO9&lcJXmw@Z5b})BssLKcIfi^y5I|OZ>m4jTYaxjAX`h@-iiMw9+_zI%6YTCaqncm zfO7=%{@vh9w%Mx_i@Uy;fg56efWRgRv0 zXi}`XoXfXN+?oQtaibj;RGGNJM-~DfW~~jRblbcwzHIGNNv_~#ry9YEB>VczQH$_g zJ&eBB$@~;}@WLa2wBP&gT|J;F&?he6N?u|o#0yw%Z03=VIK=lq2YCQFS2eH!svTYa zhQWUy;9eNB#^IiB$HqyT%`@4ks6DF|wIVOM|C!cln^T6L`!%Q1!ZtPEnNf>E(b;dq zO%eTindRe5VR8Mo)AvPlb45g8XamO3n_Wr<3%|qUFl^5ACQ=Skx9TUo&5GgQU1yS- zyQgcFjP7JT`s7+r*X>YQ8Jt1?pcJ)PLpy`(?PXq^%*{K-8|1(K-Y2TdV!CgdnG>`H z9L)yOJt{R@Of#Jf@>YGIu*HGaITmI=8LwfOs;DAxhS;Q}=^O9xU4z4%vk_%n?QX!h z*CYz~(NN+|@Pi#Kzm?l}s-NaC6dG>UP+5Ku$<*17LFyKwmUiX?;zW|Ax>~+aH<$dW z#uK#LYg>M`?6iDF+0yfUNxv8b@i_x=Vu)sMS-QMl8h$=I{V6u^zf^>}kYI%c!Se=n z!LFiN3yiK~+xzW;H!=)~i$BMtTUk{L&ONeTGb z8&>Ky>s}jJg%kW?vxq`uxz18Mjsjac3KjCIfhJ^@gvxmr3or9pay!BaD zYp;{N?(#-p!Y;aLhi%OH;KQ%`T~_`Hq3l2jM*i>FzRz22|?WP4h2W`15X7=qvV3o zU#uf~K8?`fllbE7F2?tu%B`wCM)PecN8CPY zJ;l^U=2(Dx27r@OYDySNA#x3b=?SP~f9=xH@jM@zrc_*F<7UQ`S30{rC@U?^ce}&o zt?&kh;7}7Ww2xqH0=<+tWtq%1e{B6?tgEymGgC?=+EnA+ncbC~{;41+bVD;k+?f5#h2Hgkw1t`$$9YPR3Fp_ zUduAQI-ioA`%POM4_LZQNczG(PY{#MVwJpupC!LGhNk(>JBY<$-~pHwr10Y@+urAcu(t{nG7wB-&?QwG;omt)Zq2hfXM z!p?xD-Yztpb``4r7Y+RVzvw{A-hjG)Gx7TF8cViakjT1833Wip2e-p_7Yhw@)tkbC z{M(vxsLID+$^-oM=jn~Ho0N)TQ7>(z9cv6fM21oByaYW|oF4JW)dEBLp~X2kw7HiB zBJA&S;VN|Cj#@}$2krAT>d>!-m6;xzptRDrH)=W%QS9fC9%pkcZiZC$T@NXrV}y== z|9+z!6R;x;B4^f4-pWcO{njwV6dEydN9sL$;q(+l(08BP#pa%5M(y}mxn?GhH$BZ0 zVEvfOv4X`dsSbO^iDEeSC*e?({Ry9-T~#>0q$wk_c&)p}iG+(>Kal9HZLomA8?%*b zdh$|5QQ>)Dz8LqCty{IjlP2psgN%x|(x*hU-15btU@l&IJ6f!>kN zKnaoKLou!2Q{rE`&}32W1=b@qNd&O=J54HQ{8PdYfG20cDCLnT{iU_IXd#A!!jneI47GdcEsQ@cQ?UJY%ueiU zcwd^4Z`uxtvgT=h#1N*JHDH*8rgPD-a9Llbmy`5t!l!tJB@L9w>Emz99`);AO(>4O w(mBz!{>p4)dwvb^=kNT_f%|{o;4LR)azPJ&KbCT@Is;ysFkQ7WRm<1^1GV9t`Tzg` diff --git a/resources/wiki/Pictures/SVG/XMC1100_BootKit_V1_2_0.svg b/resources/wiki/Pictures/SVG/XMC1100_BootKit_V1_2_0.svg deleted file mode 100644 index cabf8943..00000000 --- a/resources/wiki/Pictures/SVG/XMC1100_BootKit_V1_2_0.svg +++ /dev/null @@ -1,6496 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - image/svg+xml - - - - - - - - - - - - - - - - - - - - - XMC1100 Boot Kit - - - - - - - - - - - - - - - - - Pin Out for Arduino - The - Legend - - Information - - Labelling of Pins in Datasheet - - Pin Number in Arduino IDE - - Physical Pin Number - - - - - - - Warning - - - - - - - Additional Information - - - - - Unused - - 19 - - - IOREF - - IOREF - - 20 - - - - RESET - - 21 - - - 3V3 - - Power - - 22 - - - 5V - - Power - - 23 - - - GND - - Ground - - 24 - - - Vin - - Vin - - 26 - - - GND - - Ground - - 25 - - - 17 - - P2.6 - - ADC A0 - - 27 - - - 18 - - P2.8 - - ADC A1 - - 28 - - - 19 - - P2.9 - - ADC A2 - - 29 - - - 20 - - P2.10 - - ADC A3 - - 30 - - - 21 - - P2.11 - - ADC A4 - - 31 - - - 22 - - P2.2 - - ADC A5 - - 32 - - - GND - - 15 - - Ground - - - 18 - - 16 - - P2.0 - - I²C: SCL / ADC A7 - - - 15 - - P2.1 - - 17 - - I²C: SDA / ADC A6 - - - 7 - - - - P0.4 - - - - 8 - - GPIO - - - 6 - - P0.3 - - 7 - - PWM2 - - - - 3 - - - P0.0 - - 4 - - Interrupt 1 / PWM0 - - - 2 - - P1.4 - - 3 - - Interrupt 0 / LED5 - - - 0 - - P1.2 - - 1 - - RX / LED3 - - - 1 - - P1.3 - - 2 - - TX / LED4 - - - 9 - - P0.8 - - PWM3 - - - 8 - - P0.12 - - - 10 - - 9 - - - GPIO - - - - Micro USB - - - - - - - Debug LED - - - - - XMC4200 as Debugger - - - - - - - - - - - - - - - - - P0.1 - - 5 - - PWM1 - - - 4 - - - - P0.2 - - 6 - - GPIO - - - 5 - - - - P2.3 - - 16 - - 14 - - AREF - - - 13 - - P0.7 - - 14 - - SPI: SCK / Built-In LED - - - 11 - - P1.1 - - 12 - - SPI: MOSI / PWM5 - - - 12 - - P1.0 - - 13 - - SPI: MISO - - - 10 - - P0.9 - - 11 - - SPI: SS / PWM4 - - - - - - 24 - - - - P2.7 - - - Additional Pin: AD_AUX - - 33 - - - GND - - - Ground - - 35 - - - 23 - - - - P2.5 - - - - 34 - Additional Pin: AD_AUX - - - 28 - - - P0.11 - - 39 - - - 27 - - P0.10 - - 38 - - - 25 - - P0.5 - - 36 - - Additional Pin: AUX / GPIO / LED1 - - 26 - - P0.6 - - 37 - - - P0.13 - - 40 - - - - 29 - - - - Vin - - Vin - - - - In-Circuit Serial Programming Header - XMC1100 - Additional Pin: AUX / GPIO / LED2 - Additional Pin: AUX / GPIO - Additional Pin: AUX / GPIO - Additional Pin: AUX / GPIO - - - P2.4 - - RESET - - 41 - - - - 31 - - P1.5 - - LED6 - - - - - - - XMC1100 supports only fourindependent PWM signals at the same time. - - - - - - - - - - Pin 5 no PWM - - - - - - - - - Reconfiguration of the PWM pins can be done with additional effort. Please consult the datasheet. - - - - - - - Board can be reconfigured torun on 3.3 V as specified in board information. - www.infineon.com/XMC - www.github.com/Infineon - - GND - - Ground - P2.4 - V1.2.0 - - - - - - NOT fully complaint with Uno R3I2C is NOT available on A4 and A5See Wiki for more details. - www.github.com/Infineon/XMC-for-Arduino/wiki - - diff --git a/resources/wiki/Pictures/XMC 1100_BootKit_PO.jpg b/resources/wiki/Pictures/XMC 1100_BootKit_PO.jpg deleted file mode 100644 index cd24a56f121796bcf892cc0bd3badedf42834578..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 251809 zcmeFYWl&sEv@Y1VLm;?I;{k%ZI|OSiI0+B}q;UxzoZvJxBxrDH8gDc}Ai)C!Y24l2 zb+~V;UfrtqZcWY9oj+5vtJXPHd)2meYVW<)_pS3Z{j>~tp`oI#0zg3lpu9qP1pqwF z0TclkXz1wZXc*5A3=9lREPQON=R$;shl5W{L_$JLL`?jWoR;DxDK!}}F(nfvH60xT z1H(%SW*{>?kd~f-{y#cFd2Wh@iA9KwO-N5lOiKTMyFC2@5M!f}qT8XNFauDDQP7A{ zp8f#n002}}G?eH0{?CGmfrW;Sjf#Tvtag6^KtV%8Lq$c$z{4ZN#R9xUK}ACcU=U-H zFk$h(lqY4@dxuRX;1)to!J=T4oSIiNIz|Z;6a^U?yF;MkLL&MG?>#)dyhBrJ>pEG5 z#T3)>3+lU8Y;42Ae@`6aDET1RlvUL1A_}|LPS{mf#s55yN&6qh!}!lL0$}{dsF+yT z&ssI&=NX}*qhew|n-mKj6%By$yc#rg3=$@Oc|FXR%NU z|7Wn7-!N|{Fqndh#;2^tX`MxzPVSA0>5)J{YGoJ4vvSGDD4EkdNk|S4%yd8HAp@O#w_JCKilDdk>p!gz^-)W z>Jt1hI;vdCgr9^Pccx@Nsh0OJh{{&VrM({ zE6TeBjjBn3|m1BnW{X zs*c7b)-Tj)jvTiPH@)akIY-RBb(B_QJA6psf*gL)M7_o=v9|yLAlw7 z8*e$0c=LRr@k>U#>`>2^on!&Nn9~?2>!-)=Hj9w~1@%L@{>|tX>X_9w3hsQTq-Y3#M+Bv<}!vn8|#H$Kn|LM0PgN;^@p11l*o zJ3J&YPbct?)i9BQ`o*lD_0gN;bI<vPXKv$?HjlB4%57xPrLD=9)Q>bJ2xP8Y8bU6~afeN{FTUESLg(q=l^4aggm9o$ znK0aq?Q!XNkN8;5QbG3~DPg16KYsiv*&6 zE^YRKEoKNmgM*pGbXH4C<`Kmd`R@WT+S`j~NBrOR;!yX8%?n*sc6K-gGTCrxjq8~e zH07pF#gQ*R0rId_)*@l&6=B!qU&gW}CQZNP84c3rs#-B? z?i^?I)^olc8O=a=c61J@I<;gxVj-fjM;`KfAE|q|kiq4oMV5)@9(YfHPfdKT%QB&A zm(ZBK=HdHlwP1>y8PZ0b*GMJEoc#&IUUQOH_Y_(7ZUPV3Fv78#N zDO+-geq~if?pTaI0Z^e5!5h{$17*wSGLwXRmE{xZ7`}-b*y^{hb=JzF+h}&qfSiMp zW9fG#n?I}mkYcUEP-B`v*2@LEo?$P`+I)!67_c?;{G5Ii*!&*zM%di3FpXT)foke2 zzs1PMm%Q3fo^Hgcf0WlJHSC1bl0!A`%5&O`8AyU)Xs=i5?(kJ;9$Bn|G)9!k+>yNO zo_flp2Fj#*O8@<0U_SU;@2L6!Po8&BVFF6nKPz~BbB9!TN1EedYD`nX?SDdx0); zbr{i+?fogk?~dC~pG=#v!*J$N0;GmO)TK~j)`BB03mcpg;rrbF+m3Grxu-r*o`4Xw zYeTi`o~48W3gpQL!*Vd16@MgU+5&-~>JBW9s?i^k^;P^;+bS2$+l#I)LfyI~@zZ%X z^OA!7YUgntfi|v9Sa&micoc0P=co8~1_mY;`l>}3-W)$i1#d$D+hN9*qT2Y2`Z*D! zlGJ?t?Iw!J;vO6TItz}mP4@gtgPe#6wiVc`p*)OF2v-{xZ&%z?wOe^9-}@UFQ@rfB zEo`-s_bT>$wGGZZKlcU^G9y0)s)+MNzcJ$B|0uGc1)*{pCM1a&Q+~+ z?YH%5xdL|4$CYFD^T0kcM~6m3+J>a;FQklRasxeX8Y`6&+vP3Aq#xe(D1AI& zN;6Z_ppokWNr%=M{lrPOS5_(oy@k?srb-NS{maX;eW4}|v;NSqL9C3~{vo=3RPKNE z4N99Y@mAYuL>`nfr8|vm9R%r&QRspa(gRcpyEa7*J8A8u#yh&$mShh8Jy?MeUC9!k zVr}AU=q2rXY4!F=lKW*=bn5j;a#ivM8_&a(f8|nb*RH)~ti2;*%PIj>m_4<;Qz4{M&^TP%;nO@%vQ*To@1*utCvsck3#;T8nR{bpJ*DT15ANo^ zvj`2#mxv$J(qi7Sw|hO^G*i*#X)?qJ2CKjAh1UaL_^z>|FPjH)P3Sl}nGeRC^GvB# zGhinS^@rCmE1=4skj@6F0^>;h^`WFn&-?uUC6V8gHntrTi7>D7AQ=pZoYUczs+!M} zu|FXa;0pf&tVsPhQF)@BsqQvSFtNd_GASYn?b>jxHK%Gax9-s&X38~TOhEM^#2KNa z`?>eMB@=m|2%FgFfEkt#yQ6v<<(6K zBip-8dgF8X3^co(;^kJFJALn7pB ztM9|lb_9Ck4g-I{!gE(cvJ!LXO`WTL)pwc}KKMFOqb`6&vR}NvSxV3ICli92rLL8Z8$6L<@!<9G^ zjoKoWv3LG|0T~>X%4<^1I%q00Zbr!P%Ia}mTwV=>NZS2;Kg*Mn0n3GjglI2BDH_^ zjJR_a4X+x)0g$MjNm-u^Nu8&Zl0W{~x#A_ZsRWkp5e&o?IUi4` z$m6bYN-ZyY%M2uzMa_fqxuvVe3OV1CBb})6J)79MIP&Y$b~*B6nE!jEog<`Q4E6bZ zFg^L8{B0_hL{p~`l08()Ve8**-`A~2m|0b?r))_4d`S{32N=5q@;RE_rTM3N-!ty< ziZ-k7tIDWEe=Dy-if&i8)DZVWXdI$Yl}CckI3*MEPeT^A7rYC z^HI9BS|d$H_#Qqfs-GI;mmstK8eS z*pGer5IMD@5%!(p$n%Hxg_^NMdW{z^*IuC|t`h#TAHi(csG#O?9*-ll`cpRox!hd+ zc0fO({%PI+*y;V2b>y6bVlA*8k%R5Z%Cf1=nb*q@=)`-dNPC)`WizDOwD0i#tk&0| zly!vQcQRibkWfs=BiF@+KL`1)bhS?S3#T-z>jbsLdtQ;(e;X9=G!wR2{M50s3sLhz z!sY{Jik39JJugG+mXheA| zt99t20N$sxcjW>37%NE=g;@NFH5D&(0|zK&f@Zt6CCFS~Hw&mkzQ#g1wWWEs3`$54 zBnTc=AjDVvaw0x?>;12Gb#<%gc`bNq0tzc*qFXP6OkkE}OI3+TY-;lMXzmHhyxN8L z-B_)PP7^Y)v>rdxLtqWT2BHnXr_hB+8)6WduxCv+<~Nb}XjgOfelYb5ldN#(GRDZ&0AJ4WmzAAIrwtl8Kdi)eD7Eqr>D~;iETs0?bn5|K=~IsK!@C z)TPJdkNVbW>F?tVQ}9+W^5x^Yks$CGokDDkneRIU5%ZR_s?9m|x>(G_C1j}b2)idC z`CA{@!PE>*Tzh>3c$S45KG~Q#;T^idsl_Vws;Igy&W4il=C0MKE>kZ%jVx8Xa-yd=g1L5a|q@k~_;}@zEm^}Rlcz}6IC?fe0Nm@CK~<;bG|V5sYxEo-^nSi z??X8qvRLQ_p;$` zbbbuS|B!N>6}`Z=={1K9lgcxA_eLM#w~?~8Yl1aN9kKqq3vWY=@veFF3vulU#ch~;8IccT& zY*w%Xw=1i_d+Cu8Rpe#UT~+%d{nl1dImg%Z-8=KZsij~dkF(K>z)G3DqmHQNn;pj( zX1o7?p#RUC&UmZS`Np?xrpkGdx6T>QQPBYmveJ)WEL_LW;ZBDY%3w2`5Ih0yIjb(T zh%KM5Lt;`rJ&E7Ca$~pdcBiWq{8TgzVS8eg{c=|+AqH&dPzaPA`MJ0g_zmr6sb!hd zoMm{epFxGJ__96;qY>$9Tgi0tX7G}ERE4ncn&D!0t7Q?zk`<2H3ITgR2fbYIrn}Q2 zVxm#nth8{kGQrt*Je-liu#gB6eiya2ekEL1a`5tK>RUss4aSXo7B(2|1QPIt3V4H} zhj7e@#2j4k6Ca(WWbH6BlITm9Oj;L5`Ez0-)E&83#`kLW)rldSe(x7apl_LKKg*nj z@mNC2jHeBcc3Rq@=ubP4fk32A%@6-z%G1D^?lRA zTDrY_?mag6I=ZqlJ_0SGWw{YiS?gQH0uMHSAKys0?@&kxYDtR;oodM^j~_er!swAI zSySb}Rq_n|StifYj7G&WT>d~jHJy=eu39H)?~HWzYBaD@OU2Rt!|7`b0KQ}YJE2TN zeX-L5qv4^+#o#x6T#Qf|^Uv#jw^}*N6*U=*eW!#I`?VO1*HVOqsXt6^Cfluz8-10H zXdSogn7yFeh!wt^I#K${O;CMHe?kQsv4t^`t{+P#I&+J6@nOhR*XabO?U~ziW`D@f}YKaiasfR9Mc%I344zpoP*`*VOLpJ%8QF$kVmXAm&sYMr(X)l&d`# zhCGiciOM$1EYH&u({C95mPPgTd%`PKxuHc8mQ2okJ#S9d!FC=6O-i(W9Me1bR7ScopsV2?N0!?x;ubd9*Fphm zen%a+7alpQ7!d@aR;>`g>enlFj^DFKT&8+oKeRPr2vX1rMd4m+fIJ{rGL5y>3+7hs z-T4J_A2Lp)n(ot_%=|H}n#SGurnJ#=i88$MQ(DRA)fP+vgE-4?KOsQ{?9h6^~S%?%2jglm^- zR*Sgalb`R#@Onz_UvooZwz5@^)893hJL&8o)Dlv@+&5m5-S?@9-Rg{LXS3`{=UV7o z=e%K^t?XvisxOgJSp?Yb8=>@3Nva)e`c@!ZGg}O9d+T)UJKq(>&LGQ>{I_>OTx0n$ zZ+AtSYCf9r^@ygY8mw?8QdLk`>7J@x5(#`}P{UHm7Dc++phFsW4eZ#`fBwSBiP@xj z0^r1+7QIB%nlnwzAvuG&eZJ{byElA)o(rD@+e^0!_pon7l4jsq@el=TVHlweubTQ5@o7|9)zNIDO54QNl81Nk)=-Y`)32zqf=5(T8C}m{d>@Um4I*w~J zw{OHUG#z&$e3AP1ogEmMyHI$Ve1!f$w`(}fx@VGAx5(bFEJ{=Baf)>p=L_47IUSGo zs&5$^tAF(jD~RJ_)nLu21)ARUj`vd1< z&`Y2eXWfo<(~sk3kT=}sx(uEDC}Z&h(dVl)Oh?gKsma)rSdrIK9f}QS>n#E?mAA^s zSU%l=x8Pp)1ur{#=2fxk>UwW3g=$fhZCy=HQg`ca^sX<+9XMcOn~+-?4Cf{ zQLv;;iBrBILvCQvWSNQOZ$`ld?cn@YZVFp~gSHsttJ3T2SR5{<;7G77RiJLuGdMJUtNV%a}oLF1G9 zt%eWGrqDzn6H#ArCvA;#%UQ;)Q4NyEY^u3Po5O2rAPwuvwe>5bS5^#_rPFzP;S8%$ zRI9bhePer{Haw-5xLWZ-Fqf~xq-;s2g1pF_OZGQ6yw1wQ;4x~?uu_wM#W9@HgQ&b2 zT<9l}@OeaB{g!_zm#d+meIk-3NHW^11OOsWNh-{J?c|qjG(iW+-yIEPA;jY^KPz*7 ze?~{O|LeZELU0yFU(y<{5*{`y5zGl&sQvR}t%I!O-}=85Yg+CPg4cVNY^mvXRz;q} z$7O1t-u1bF@zk~`7Xg;OBQ|GaJsmA=pQUVBGa=s86J~H=36~-VojU(X<&d(0h$F&dad8rKl0umiKL%w6g)?beS6`Un;~ix}my?^-iup8kukoF5zJYQ}pbPFBEN)>Nq$wFT-yO@o&~p^9pv^1``IpdYylm)i#UeG4WE2%UW|dI)FiT9$3PO$gR(LI1iaV}XS+~h6 zIm|clu^}6_{zd-is$5&TA5RWMPN<>`{@^fOfWM#lO^*>h`}cG}c`>qOSE+GR?!)}% zbZr*6MB0#PvXhZ}@?hF6#y2P+bvB0|a|aKFAZ1+})9D~HUxz93(642O8r=|3J*dfw zw9le{O|*2&&BOQ)ST3U-q9=GneY?Y7+TgFi%PWyj+66LDJKbU=%B6($s`a!v&}Zp1 zF4SLjAII4j77Ny7^76dx2dpuf{KArQRTfiBw;BH=Nuy|z8NOO=5qNA=u-~J8b)qiq z+}yH?dDLkKEp8+RGM9wD@CpFTkt#fL=J&N0sjWLhrzn*Utn2 zHPX%|kwCmRECcADUA!D2WQvukXVFZF?JPkJr~8{d|C)cNqysb;P)Jy!v6wCkx`7v0 zrN1p%&5s3*9W7-*x8ICsOuX*jidLb9$c&W6FQIAD1`Gn)FS|bXOTjME)y_Bf@_9wu zX#A2%>@pO2)EZNHaOs)HLfRSwy?YF#opseIk8}kpj-*am=W^Ux^2BW$5Ug5vorhv; za~q&ZEW}47|KSQvLfl(kq zK=vBXLaAo|EQ87f6#pIyyj=IW_gpCO)UKF-e5)~|R33Pvav2|A2*<_(kil>?R1e#o z-MT%Iu#)(BXPgPY$WewjbBkblvSNXs#+_<7Op4AE5#WU$wZ36OhuuG!GCA+`Jcl4s zY)0@wP$#$Roq)n1SUFt{Bl;W+Ts74cV_s;#Zjy?+gSGv{I#w-R4bup7Q zbobocnC4!`s9KA-Ej%J28c!gM^M;-B{(?6LSv`rlO%^^3J0R6F=K7yZb}3&Z!v)*- z#~b!jVdDc`D}32qEy0IVops0P=Ecg&FbC~iCo{8S-hY-9O*yrf1Ez{YFS~w?q`9j8 z4cLX2S+E8*IbQE$u3VGK=?){_97gcM=&}-d2aUTNJ3+671_XIzSTrf~`>Bh3cj?}Oc9e{Tn zUv&!8xali*!@T>GjF9l-yXb^;Xetnx8vigXwl!R-XGfTKG4alZD=M4V`B%cJDgz2AyVL>Oh4K(J7w-By~`nUG=1fATt zS|sNQU~3$3C)Xog4=XwNYav6**PWD9+m?X0o83C@?GbkWzBZ$zWxNpXCuvmYQm5(n zhV#WJCqkmIG=AXiFOVF%U-L+N^4{#cn}dQ8f`ds?7iV}B;wl{m%q@;?!BRf2E7msM zAF*`V3)*mx8w{l`5t&(BMQtd;p&4PH(|rP9Tjn?f(v-l*U+G!eZEd7waR+K*NaF14 z)Efqm9?hw02S+vDIPPCtJONC}U5?KlhYXbeUW`%O7iRO~hLHze^iPR{BiNX7W(~9# z{-85rxC+kS7>kZ?b>3YrR|g09Jj85&Ow*OGr6?TtTmPDHR)ku4J) zLdIf(PC9QnV#e#wgXMPUgfffU(}0p8Ydr4c;~XY;O6V_&=pX0T#K;nLJzbO?<6k>J z$fQzv7M8`=lI{@^FW@d}KmuA%Hn}N&V=8_{>`aHK{&u^X*F9zBl*4*#zPo5VR!Uku zhwpOgaX2~}C9mTqp*#T$^e80fz!WqQ7n!sl2L%@cR5gLt5nJdCAEX|>RentzbI#Zv zl9^cWc&+ZG#Ofl=)RW20vfhyTqG0-}e@)6D2wJb=vSQ_jg7e3FJ}r6QES~Y1#dj

    J{`jP7&P ziPp4bhzbGykf(hS04r<9Ii>Y49{XU*&a?jFHqjq&YG<bx4Dpc;TSA4gs3w=`D&(WtA@+ zZ}2GAHunKeI}w(?DZ%n?Q6y~D1Kthwr3ZL8w5X&iZk<>%<_7`vEnr*ibbDh*>`!k}xIL0bnV7Vy z$J9~GbTCxW*Doo1#PfMw@>?MNlYw-B69*1Z6IvxIKJ340Uf4Wvr4@12*}^Q8rKUc5 zjlkf4s?1ClLj#{}v_v@VRHvC`U^o$;yovyWoAvJqd?LLa{JE(xa{^UR`lY@6(Dc zSJ`ILRwP*TrP^NEB{pCC{pZen=uefi=K9ht0O4+B8#(4 zgL0}6DNmaV@xODT(32=DtRJrYZr9=vWv^*1VsvZzF~V8FK-^dg6>C(<9A?3EEcXP6 zc6kD-*Rix5V3`vltiHuIRZF+0I@nk5rP&+&1QEuJFcl~>n+ z)^o8}#-E=6_ztU{^gFtUv0Myk;JhYnyai`Pe?}4ii{w*N^{(hgfe?nxySJBjDx8qE}sfEi4>dob~|Htayx7ODLL9f4+=Eo#ia+S*d zmoQ&(?tiJOY>B!{UR;V<=Y9fo&^#k89hLiRI%-}lPE@GuU(buwb?@IdLGVoki)(Oc zcx73y(6mHCpgbC403rvr)>ybKLZ$c#K+$}|o!Fvz_i-oqq~7K7E9_S4bWkH2SD$vCxL6cpg-7O&}vcIS3mL3BE-^_W{iQS`-BMo}#=6fn?PeGYq29u&%Rlf)4g^B6M$bA1DW_9lZ z@3I_>MSoyxG5vXtl^2?l!%_|_3wN|5qQ)O24svLF*{}-B6&Br4xPV2RJy=ONWEuhZ z!D~aRkN6|E1C`%lCwDD9D-(j=p5xOM+Yd#=&a*fErh5nGzQ<(`jYYws{Eu*RS#+z} znkT?X!P2g%!Btnu;p4`QJ6U*%7=TbCHQ)u5=}_RP^|yf-BV>12@3#|7)iD9?M!#s(mf+G5 zDoi8?!?{K!)fmH+UGBYf;^o(hZ_*oP17s3w{AYOd{B|nCtLY%-AmyNtDWZ!GBWYO6 zSGVu0P=&bF{4VW4-7y?0h8}U_@x#i|2?!ER$Gn7b#VudrG|2Nu?v?Qt;^X=IFMNUe zO<$y2;g2a(t~Q(maVh&VURYXw1Vu$3qxHSG-Pg@aUZ+p!-h5KUqtXCjp?^{F$nh{> z*R4O#CaSWZF@vm_Q$U)I5)GAs7q|hpK3M&c%9qGz0(=l2vBJ}Od(rzAQS{9-+Pj|B`3F7u z?RZwMGYJT*jteHb3}w>sEYd1n=Xdk1zYEbIyD@P3e*0b6hdytYDi(O1&VISo&(uXC z^92BZ!!;ED$8o2CO}a$KeXhHTeqSW5rJa3R_zK4Gqm3>MUQx?88*0$NcwO`jt^xv; zVBcr}!+x;?Q05uzxdOpEr!9fyG~s`ufOAEN)jwXpM3-qfaeL9j66C1Rjdjm41(?r+ zwHrddln%Jw@0q3s^B4!?Pj4HB>1eP_IqSp24nZV3x1p7YZf@C^LjC&?rO)7FqlI^# zoGYO}=zgH&(mir%E~mpRTX)3$+?|Sg4{+73OV`sVve@s(u&+>)H}pF2CrMz0*{P}( z^Cg*B^M!@E7s@OF#GAab1{MiqyBduW5k#Lsq(l$;SG&Ki?Sf5>WREX`>x6B#W5mYY zPp1A-8Q0dpLt8}&q@p86T8Pvay^4Q4=lj|6APEk|>LO?4mf@;>_=&#ks1@zSo=gi& z`3w_!M~^w{T9KM;qLH`;KOi6<`acOoX+e%d$KsD2l}oFLV1#oO{ZIV!D3JY~{u6-2 z>BAG?WtGN5>f3j)R2MZTd6_kGtqMoorpWv)!|(*dZE>sm8@`UvTV)71R$+J#BgkmO6W98^_tw1ob3c42CB ze(K{KGY_;OURt$BO0zsWnKH0y+8C5m{322vz^atxBHtmADK&Yteex2QcZ-#v6r~=Y z33yVYY>tnCwwXLoE~zN9nAg}^mb{{A7Iu+OL!(EQuT6_1)9_ED0YEEZG}nj2vsC| z2*lb}m4oS;7yFP9fVIyx0(?P4cOT{F-fZ^1)2avCZTr0dWOZGc(o39)@yE#?iK~Fz zNRXgjW3$oec@(eFTo_3qp!lApWAq=1l=O<*vJ#V&CJXtzmb#J)+DQ1RV#8c$CVJ6n(%4iFD8imS z_ahb=5fUpA={Uasj^U`%_x&f%N_Z&bZ{dA|1tkmph|928F{MPp397<;;KqE?57h79 zRwvaSSClpw#QJ20xxwiWrd_r*0-AA|Zp0*3!wwXd#o9=A^&F;UyTiYISe-dS03Z1+ zG|Sf>%uRu2pS1U(D{!V}AX7K1oO=?)#|BGmD+j6eYbU76ae0l68-)gN9-40|m7s#D zE&Z*GOPdf7L8e#yJqlYdnP53pWM~%= zmkN&Vt%953l6H$5jrM%LG=GhVACUEUg;G;vSOJpDj6Liy2TR))ofB>t6;3C-N?qe) zX~hNH{_e~1_npL@5^_(M+7{v%aA8BOV&>D_y{M(}7BE`-sD#Y%{6vIJMu4g zd>A|Vkk)i6j8Qh(a0uQ$5Zf_zn=d42zDa~Ks_jhv7(c9GB7(~E0-D{75j|tt0u{>% zVvM!{NU7MpKBVjmq1|*cWL`t|LOKm-3}-}aR(#)`-_(bo3{>YZ>M6>}uB?K{|LzeE zjZ~U2LnDTZI;BqhcC$<-*T7}wRN7#|0bbE2$qj^@mVt#?DN6O;|IVc+7#0L-C`ApJ zc{v=dQ~~WNFSMnOwM=gPRm(35Xfjc+9Ih*Uz0%jE;-pT^xa2ICa{#7l7)r-k2^Z>4 z^tpc(ikj`y=|9?OFZY6KYm405!ciJ2d-!|AV5Q^bGk--S=$$Z(?3jj(L^3B1s-yqT z|113b1zkL=NHw8X=$dy#$AKQ$XoaIq+-AGXVCRvYv(9L-T5prDGkut6)KDDRodUN(bD9wo@i24}X^UxG%F_|5t4aIU;?+j3F!BoiiikPoQ{kS4Ku~Rwni@V+ z&aY4$_Usvu$Dz=i!?#v67g0{5xp2eU!gi>T1^5pf2cw8{{zY=Ah8*J|OI(VvOm3S4 zK`@TMAF;E0vd^|};_xas;?|_cd=H7n%|tA79mE6|vYNQE5Mt!h8C6uTZ2EDGsm}WQ z;r9AvZ|n+D3%Sx&JRk4Msg*}{t>@q)PzH5SfQ;ZTyDaY>EFh7Lzu{=fIU+@4&eU;= zAiWY>9Xp+=@VYQ(JqtCtf7wm{s9#fy=YpL>{+HUB^p^^ev68Hl>T}FS%j(#leoI{u@p>7MMbPzNLohX5Ov;UQ60quP?DT{HbMS!rwScFLjEI1 zs*!pcLl?fsEoskcZtqZbKB1K-mXiA(r_2^fxSQuUL{*h)NF12ouBT-6u`0BEl-Pjc zH_>g%ny2^|i4!xb_ ztDufmo2IIrIq+8M{RAaz`W@lSaRrKYwY{Wk1#rZi?D`n-%yR3`R)DL&;&9_O9URd? zUMD5V%+=QHGc2I8$h^p4inl15MS8!E+ETO@Bb}0gQpV5ws|~LlpeOR14|+GfX_;T2 zuOuqF0h#kkthSaZJpnGdrMGix92YpP9s6;}Z}d#`c&NZUj&f257~Hh>>^u3do&cD^ zbIwZ-D^GyS57|LvXFxLqTWT(G*L-xp*JPRuQr#3=Ho#D`-M89q3ht?Ovv; z>Ivb2XMwei{|f(x9vaEFsHJIOe#^4XfL9c`M z>lHl>5)vGyUxFd~@DU^d{0ZQ{FB{hSz)Eb`IH)zy?`F|*Krrq84@F-ap957umduon zaFn`XX~Lgu6&z_peh#hZGgbKq6{t=*Uk|*k@@g+`a(qy_xZIrhu>LcZRXqWc`i>Ka z5%;P*;MwxSZgGnp=K~RP(6p+e61SjZc|h^!XLUCWapP)0byfcN4g-F(b7kWOi_l`}#0{C7uOw^xPXs3b3c0ds!&j#8-Iv)3c$ba!C3gF@^jk|-BPcHv|d zdDecNEGePMzb+?xJ7HSp=aVtt9(K8ttTKTu)V`9Wkz+|Hx>6ADRv+I{UndqB-pGRTxmv>KgT2?(h~huSHJ8`BUN4O3g3Q2 zNLjQ{xPo1V1jGmPYOW};24~_jf?`Utu3-4GKU?RmOUEQ<|dM4!u@e|9B{w7aSUJ|7orm6j&n6iHgX(X{dY`S z(4@V=TH-wF!_TNT(11vhOk*8V#rGh`DP0(j6dkhi`N{ZVzCYpTv~(BlSGBw8Vt6p} zz!DZZFn3W^)&> zz6Jj~AXJVar_tYUD#{)N4XeGSn+Pb4m5x>L5{G}B$PBFA0o;B#VRbtGmwMC>+)7U5 zlbIIwxd-C&k4csk?JpYjCFVS`N9Qa)w6@0~Wjexnn?PzWKB=?+RrO#wYF5jbGuyRz zf9BLaZ*T`DF@1-F?SOt0o+#_ve>F;>dQZvgR_xg#MV^*Rzr-||qw{UPwm$b;L=ek< zIosYioh{t`0oqEt5ye`{Y!#Z{DQ`?j!QV)^)&30LYtD)qE_ud}uhEbqRoxVwqFFqg zOQs8Rh&Jfo!o+2<+jLnDL?p%i8TbgnBPTw=?a^?ZaKj#+y23`v5iu!~h|<5Ts!*7p zLC`6v;M~YLUNb&;d#L4=JqVglz1$i$=%mKEwasM3Pd1pb_IBw4+AZjkB4vgDVvvKz z^dtQW=iPi(N=S-{5Pj2xDVO8=+l}zN`Ol*Z+LzhApGxMA&=~@Wb+&V|oQNkhJ*kYS zPLjzzoPrc)bR9SpI=S$A#(#-*ZdS@h*bNI==G1^q$83kbh0aP{{vas|_>E-P0=?{b zUV}|)qitQ@en2fPi>%1e719jm#j|H<0rhCtGA~01YpamV20&610QtO`*L-3T=Vhry za;a~8x#)i<1v8P2P>(3@!lYVL@8TmpKZE;>cDO!XzXctqv^LVf$R%dp&WwdEKu_0IBn zi}$=6n?4#&^Xk1wUu$LU+2}Q<=k}LhzTxn}dO+^!PkT1Lt=AM>?vwir{08X?>Zc0= zSNKbp-Kr*6dhLpWj%E*mYK_s8n|fs3Vly$bW9lqelBrIbC9}IvfV{0%u7NXUB6g?I zC3Ssme;hzq^13{OUvz=6QEtml?A)dQA3J{5l(Qm-Q;<%EPD4xG3e}y~V$d^YdN5b% zy-TFed%KFKS7nsRWo~EkK@q2wtkBrkm~lVlkB) zH;obLYmL6cR@Y<;2yDmLB`zpMbRpBUJ4|GwmSjJCv^h zyJ6rmOEz~>KK3ga(s@R8qCGNoJd=sSk7boEl}Y~_C>hO)rIKgY(-;NsgJygw12d_7 zHD|F z*R@XoZejmzmp!)bN1nvTAz`Hep$_}8j_&ju6F5G@!}=0M0B%x`>_Wn^%O4)Aki>i6 z(&x?c{Rv=VI4=Bm360_UOz#O0CiqwjD|YLfqVZ1s2a7`jWW}B26EzIaAEzWey*A% zH$FcsYo1;QMsz_MYJ+ANZ_96@J8vDcDN1FVh9$@>Q}t!%f(aDbu{yuzqfpN%(W~A+ zA2}yZN4xJ_4v|(v&jc1ZTqfR0GpKgd)#`)hhZVYTVe$CI7Fsm`jP4Rfg|(EhJgHr9 z!Tx6ZV{`K$(U2ZJEgLE6X~-GNfr@y4Z>#VRw^#a=LW*B~I2e@MU(a)wk;Tfnh|3zD z6;hLW-o5Fojm>MuD(2FOd3)S&sPM9p26`8_CF9j&x&T$3^ywkT*7u>pX1r63AzRXA z?ajsbT0^Hfx-OD#>L#5A#SfKnb&7o?7BQUhYy3=uYm!kToF6nTCQxwSwzdr)PMmKk zLTXoEX0i7>oJY>oA2?jt)Q;0TmEO`;w?iEA303oefvd{KviOLQq6(fZsJ7{so8)I) zLMwnw_?20Swpk6u=+0z1d4!Nog()az?5Dp#e(srL%e9rGSR?j;&QDgx=hkmu!58`6v8Pk^CuKC>U#>)9qtpGOUtr(-@re7TY!O~tAF8OEYuff3 zMHZ@1ksE1zQS?k@5EgJ-EQ6nX8%4p@W6&=C{ex@2IOv=Q=A8s@M6H3}>`6Ec^ zmzcvL`)2*N{;N)U9lF5f0Eo}8t=q@e;27j1vgK#X(VgzD&auwDdb#Mb$3w71N4MiM zFTP-D;qy@H#eU8H2%N0se7tapHCiNl-1P}dXY(|>oEn#1!+Zkp_-MH{DtCYb1s`9# zoKATn{d68BrDPlz|9nVSCxdv6)lR`iB@LMg?H7A;;}+fv+Jf`)wm@-rcX#RJfA7q?ckZ2gKh2j}Yd-9iD9iEVLZix+ash(B$bgSDJL#zxSimjw7xZCuSxHm+ z;=qT0)#<2AuVyFz_g7*>ddw%wOlq9@G)f=zyMHKKUF+p$Q4;uNJ7O^WW_wVNo|jT? z?4PwxS&piEkC>7rKu!<7&}bi zT_T^`g#fyh4@2qYUDT;Pk?x4Dv{TaY(~x#D6|J6uyTT{jazN zBa{kGzS3-D|3`U-b6Cas>+Dgq18gH|xpSp82Rb7Z>E*1ScjK)yCdVzxo;L{B zTXJTVpq)_A8rtY63R)c01%c<~=aH#aa8sEoD*M5b7rQgAv~%+M?q(qm9I^07mJv(* zRv)Gi*}(V(FtVbHdhQZDqPO`g`Vv$MWDs5$)pZ~I!cJ~0e6&d+|J)Q7%%6U!>VO0UGG{7vl@k-XFB zDCE}sJ#gj&ZrZxnse!?rv0}Uq7Mvh#HomZBS7h=cn2wFnT@u~cWXr;-PhOyw z@XM~DNvk$K&8JIHo!y3g9cps^YM$AL#UfdcG<<>VgzG`^$!rOamK^SxGdp8~;w?|o z8Vms!AGl^L@g9_D79YVpQJjHd0+YG$4$+qSCq~$L7IKbZ*-);C-*zeBgDl>VPo4dP zi}G8v#>2K#Id%&f!YG>CcgbP;!^s|nQP3e3pY}GvTZ?eAnp``NwOU+dX? z*tW1a(@Dwbcg8TT-NsyvomyvP)p+|_-eGil(Sr!OonKk=fH1t8`ds|+m$TkyC*`t% z>HSiuVcBZ8^NktAIoZo-Tc)<7m%8R-GU@>VMmn_MoDIxfmc2V@;`2^ggUEs^`H0S` z9`4^VYU>16OC(*XlGQP38Q*MmZ#q$X9wvTGYe@;S`k{RpIb6z2R%yfpUq3%zpSAFh z$x@t)|8%mkk}+fE;~*bsqbrC`a}JQ+vm4V7GrhebonYiiDs7G}Ap4+(?c?70(&r<1 zDp4US5430wc@5{es3IVmecn^3y>Zd~VpT~yQF16{#@1>uBF4_Zfw@D=HiKLboB}ai zRwA?Ntt#avEu!Z}-k}#slw-0blWO26S`KiVppd{&Hz>CAm)_(xS7>N*yK}q@C!dHe z+Fl<}cA=3{w$c&h|2yb-adBM)D3u{BJq;=h4;1PvB?~g99Sc8h9S%eM$+B;> z%gV)ud(%q7)Jrb^=f(eE2X3HGm(N;0dL_8*w`c61V@O-t zcX6YP_Vi*mGW!4jg8vUT(H?#f#-oh?KNM`6CoPT7|JUW*AKNWf-`b^g>*H*VdZW#? zDF_?KmX?;H@fRc1<^7MjGH^x=_sXUK@Rg3TfygM#$6;gIL1GC-JYMYbABvp*b~q-7 z_0V}`at}A_cNdko4u!8jB@FHQG9hZYicZ*UK+p%Ef};YwT{iwv$xb!TsQmx7OeL6m_?$ALa>@fvx@y;WXB?YbGY`pE>#YE8uA}OpR>4 zg5PT=_axcK85ya7D_zPe`yw>etrA`}i$}vkXkW?L+2;Yt>x`=;sELug_v~KZ^B2tR zoFhb`b#0Be5Nc2EdI~DB_~aG@5$HK>pWHEDj9K}wfs86|P+_I4BMMcbLG1)JVMXp0 zrJ8bT;roP*dY4#)p*vcsG!fNH7{C#Q#%-P$_?sA7NCvc#8omr^@1FC}OEy^Nc`_sE zNsp5{@My#xoNfqxLWV=j0ErH+p)cx#@Rp|*UA3Fs86Sw&r~j0#>zcgpk;x>;YjEN2 zALloxwX+jmd_~Z}B?tsjDk9M_!Jz)`1@+I>)mHgtb&K{=NrPulQl6!`Y#fStyidV5 zF`tvbl#qUi0rslWn-jg`iUk*Y%Qq6k#T(1*qGT~=x~%_p zr^)Zl(D$kAtt0mlNGc^K5uajSH_)xLG~ z#f~p~E!c+e&l7~ys{r+_36aygVZ}n(Y4E*X#hF!`2RPHdy||I51v@3FOkAUv7#ap&YUK6|Af$+hzEg^J!>y}pG( zroDAigWMOjq?i!Xkl;WaF%op?qsuDvuE{^83sL-F1pkHE08ZMwwa6GM?UTsdPHw5|~nJjfW0YM3lX zVxU0acG0u=?jII2`t&KvV{l^QupQi;-(KuAPhF z0AGTkQ)(_Iz_KFa1Conn1aD!l%P(#Hq(b6mZQ~lD>2J7Tn33GND)VuH+w*t_%Z_}s za^Xdhn_8@YF+!1l@YCxb(XBpO<|W4b3!%zVb~PB7iqeuNBkC<__k2~1Rxu3RXcc|U zs`g*w7v_F@Nog#N3em+*QI2Y_GMlcn*0*8m-S3wH4Q4Up^;++n#9_xDR|65t>r|?ih0AOke{@`V=J{JM%}&85kv9iGI3zOim1(l ztrINzRQ9CR;5wsODiAS4wDh!^nH3tahb|@LmB$k=dSkr$2H0{@!Q)W*JBDTkk5eE+ z*|>t}pwdhTFmmj571-H_qUMvyB~$!$nRju9bN}_Ar=7Q?ZPPxABc2fDL>wrVBzQ54 zL;H|7j~~MO86WRENUo3A$8A}mpA2jmh2;}}$Qja>BZbAz7)>M9&u2X+Mss2u#ng=3 zD0aJ>Qqmqz`I&8AU8qlx@AGe@%;a0i829ZTEB;-S_k@2PD~yk{tgpgfZko*PfMu2K z>i<&sQ7#kTkiTYUFyX41@MUDl!jNELt|(z^Qi5Dn4S4bnE$>ZLs#w2VtWryG@e}U; zn*6$EL<%Kt$u}e0PIxJG_xg@V5}UKGv5=*5}LU&v`y~$dw zB$wcWoK@Cx*HFoZFMvGeHNd^G8ZL=lqb3meoHM4T+wx9RVoToUN~+`Jo3uo#5d(Kv z5z#A2O*&c-9_sbYdixdO!Bwnwm0d1;N}OoLS(YU~cQs|e0kv;HP^tSY!=29-vbmdE zng-v4r-AzQAvS5m#asoY43l6?U>y(7$No`>zKs07A(~67MWbAlH)0uS6Xok0bo8L` zOgz+N5Tc?2+Z2tOZAjOQ)5Vamp_P#0ET;k84y8=u8Ix*S!I`FoBN&4~P-2!BIp6kH z(biznLb`>T4I6w%5AU69rWk#~PL_L8!Zx1o-bQshP4gn@pH^t=29C??fQBw9rs7wC zZwl;v9}n<8aAYl+KNv%EzUc_8*3@?JFpCB@&`7dr%tJHpN)%?BLs}A}oke_Emg~rc ziLXpsmUxfW1aMrAWxtOAoijGw+4R+Y7gwh%JuvPE9m+H%y5Hb0IXpcwN`_` zPjN}a^1cDvWdlyz5;l-p*SdVcT|5Qt-@rJMRY{%MzZ*W88%^?xqM(l0ah*&_IFy~U zDfg0S(VUXwdxc|OQuNuj=h5Mbp4}4IJ?^J!Y5==RQ$p#K z(M$G!CoS!gH&nNk+1Cqoi4ZcqV?tEcEf`wEjkfRszWk6lLNH=lVp z-UJk#unDdT=ieTfKfD>&4;v>YDxe4K)Q*Te?KgswF-ST-My5q(e9Z^;oTU&w0Bp17 zsA$s*)?Fgo%DAFnk0O*IG@yMg{gi@3#2?pd73X;9cKZskTy25h(c{zFXL1qVOPJr1 zmBMDZU|9u$R<{$7NCP)dlZ9eF`@XwjHMS429e2yc`aE#5S(Yr>$OU{2s9P}T)2FOcu5Y>deV@v0nV+zS_+Kw3Reb9(XN*x< z2neM81Gx8lGTcP3`no)E_;u5wQcOz$zNZo+sFILaLlKQ7(BRh&P&j*f*u!mNiKbb0 zLSOCgPVgs9(N4EPoK0vnD`9YuB)K33J7th%RIz21<&^&CHHry{%zRPLyTF zDMvU{qwu^J_zxR^@pT3g$mo>Vg}A4mj8X?(zBJUbvF+DS(oG`)ES8KS1z2ykKS*Kx zVRaWm`L-T86Dt0CO8C1A!ysq5Np3N)J@T3ZBlwsXY5gXelO0UhV7s!l6yDb`(5V#? z%~E&~0cR~US+kkq_^HCn*RoMmuprK#;AR$1o)o`!O1w}|LdQy*6cV%4I#v1V$t08M zW3G|ics3XSF$a?7$Eu+S<*~hGt@62rT)jB5Pt0%NPMlKJW7=2l3>9Ca-n{*rj%~-n zBBa0_`X=5nhzDt-3dt*{iL?~dS2OH$RV&=*vMlAwMfmZwU|E_5sR1ztS(bfEr%%c* z8?!7!-6!ETzJH1$`=C2wmC#e@ZN*m6#j*NeNk65`wM z`o@JuoD>ZqQ~b?HCJq@cSIOFtHxo>M;@tw0oxy?28bmxdq^9sHqQaWJ`j%^PYvfjR zPq}b;^|BNvVtpl^&b#+mBxrZELW5K^(7y8Jygi@Bg|d0}JA4BiUJ;X63jSbS{@Gl03$% z4O^XUc(``ftdx+1cSPZCUVe4z0rj^6G2ga@O1p|RoHVxAp|nn#6v!Kk13cq|So%_A zSLLfWrgLr-eQqG#Va6D5WBuO%9Od_jaU5_Bp23k>x!vKp;li~L%?`?;e+$)vOCJ|D z`^*PHDF~cAw2xL7jBwY%_jlSR!`#ml@SY&!gH*>;N8FAq^{_em?Xgp_`t-^MNeu|{ zEqh1yT1@h9K~BKeEb=-c)auBvdDfozsZ<%+=SNyIo?_64=uS<^T2IgW6Y8$qGbc1YRUc)R+2j3qd z1G@jL5gLjA3vBB@z^(sPk)nH@7>HyzmzUgs%WJp?aqCACxQWe~`F%>ewv$)9chX+^ zU3Fr}>$%Ro5RNSeE>2aE5Put=&!jt1q64_QoJPmNhEhfzTj{v8;JKm>Sx;AeUg7L^7x06 zu$qpV{8mNR<$BD%R1>iG&ye)uiw!%Z5?HzcQ1hYN&UWBor2l>hZu@brW4l1vVF zi#w;g&R%60n40YhrkV_YOEx4FA9n|IxFfRqoFh}$r8Zhr%ApVsK?jauer1-d{Cot zFNRL|&Dd6NHYf>(wRt^AzJqAh0$P<@gzvG1W>a@_W9tD^4j?3<#?-%?wtaCNL(seXuxFVA|pwFvsOldBR^Vz_OQIEyXt&O!*=|n$4os};jb^I zw#wG(5g)g;VWO?Ckv!^)LIFGU7t1{!lo=7JtPkA@Ozc`-YR(!t8K!|5G(H==`LueH zgp4K)=83__5%^*HxtwGkm=!fO>u+oxp_!C^%T*S6#E4)DrZ&ep0gTP z(xRINv#A92^{&#{Y3fK0*%&ayjmH-s+Bl#=n#srt+|b}M-e?Zn^VWu_1zI)1uw!lo z_wHbB?A%%qh^=f~mLj?`FbVi^1+G43Ncycp0j6;gh_2fuz6|{-27dY!_EfF@jRh;= zqf|e(8dRzqW0_q-Ri$H^G&GeM=`v2aan7r_MjPE7wq7T>A1XkY*|p+OluQXC7m~Yf zICqk)1XeOem;HbP3)(a$JcvCvFEBi>kiM`wgYB2ew2)}LRAr?|A)jkI@Tdt=F zQno@Q!Rr|)#NSPgbb3&|%v^MdG+9^$Kv0LfUKaBK@VKdSad?NyT}PFwIa0~3<#T?) z7XlTE;OAfi2YVDd77?XY>f4LeyScZ}R=kwRl6iND0`Z;0i_HK-pT)cvF0q{`DE-#S zlO_0bl}9A3=xho>zGY~CS7PHE8C?7TRR2(R^g2PnO5x4aM~f72qlZM|cIkJ?*R&RV zsOVk2>M|Ov_w2iJVfr6^eQ0foa!*#l^L1Ol5S#PBxKX2QQ|=oI-8GfqoAN_CGOini zuWJk^=?(Py^Et*nJA?km6(3r$hs#EcA~9gv&-=ZY+S;UIlAd8J&C2}~aW^`t$?$;% z|JHc*zeF6zxzE*+*(O+zrqe>rDxRve9}1sEwcE6Rf5lwmJ3gaVBuH1oz}CYU&CnT0 z!(4AX5xgB^75ibuu+5TQ3c|7D331ocvSR{Lsh#LLCS*8rEXt=mCRMJ33NsQ9t7H4c zladI}DW&}hm<#9;wQ{n?FV8NLM zckRKldT$oNfWEAaorsk z1pk!mM?1%@g4`W3SvcM}YNs>^5P^~$(~Pp-bxYwtn6K~;#T#iO^7gL0f46-Sq<%Cy z6L{F?^QzN7lqvIwq-PT9593eoCa!6UT}QAlua+m=%o@WO1&fyL zq!gyHH7^t~XxZ2`gw|WODfbcy(^y|JO^?^$*F;aDB2{h3l6a84VYzaQsn09d|_iNp342W&So}#<$p1LAK zv#ulj)3c3LdB=@?lxMwKgPN3q-q>RFy+S%EEE&H|)!9SJ4YBX@)38Nhisz^WIe4d< zwUH*7w1pbeND3--3O#6(pnr{MId6uniYD0YE9kl&igU#~uo1>*!=lBQ&}fAkV22d{mJgh9cbl2-Wn}O z_^0}1eMKg4Ed6+oru%SVsEU9#y&9`{9+;saGK$8kWomknxXn(v#xnT>uXX>Y3f-Q- z@W_nKq%D>Je>{}hne;%=sxgZcn6#OYa8R874he}l{AT5YeJS=sr))9US3viAMR~d6 zULc%)6yM%`!$YVKdgZ#?5$XC<-kOx}Rob{Mq{^1b%39jAtuDSGsXUZ3R*Iof=krs% zi0@!K)>i|0(sQnvrt?iZirM9U$RczhL-F4F_ur+jdvJIr(NfWs0UH9#E|oG&fa&n% zu?8ERaR8p5^*i4x>08~)9l84HkyO#CZw1xb`+NdE;-9jsiHxFQ_?7#o>(6Q;Ge$G~ zkK7XWe!>1pE03P8a$-~8^=($4{Cu+s6Rexh-%Ix4G?Nx7_xCwUJC>#aH zrLp6aoogzaQH2-;MI+zo-3p30?;*O;z^-Bo(P{V4lDsW59f!f$G{gcO1(*=v~6E%;R+ z7$!ef2;t5(i8jfp{;prrG?c#1IxDx|U!(0ojn6LfGL_&L=AfGumb69=Pa!&IVs?_~ zxk_Ke^gk3GT2wo!cQVUN-BZQe5a!Lz6RRMC{1Yv+I`xM1nhs3=bH}lttFiuY=ZLbZ zqPe&G7~Ng|C(EZ~NKWa59Xqhd`XRGPowF0`hX%qa<8VWUFk(iu@#@*^Y7Dq8;G_Etv|BF>q{ z$Cb?dDF^ic_35b4M{y;8tH9xuk7@l3bs7?9>#2CEJFh&_q!}NA z#Cnek^-~YLTihLe44?al!fa3b=pBEH_YY+-`#+vBq`cSLy~CG=t7_Q~QqG$QaL2X5`Rprlxpn^cH_{efH1O!-TCA`2 z)kM)=Z6}@>b#9%E2tRAc_7=Gi87j_OSy@4A$my&=}eb(#tN5>b&)#l*%CprnWq@Fq)XSmp7>(a}-|o^a6Qc_ieAM;f&? zb*F(lP<^8kKj^cDZ6suBIORQK~~*)zzBkQU^nBHS||sAW%AsC3u0 z{Zo=d{>;3=h~m_Kx=CxH?}h1yRFu0q!AcK({B9iwlSla`3-kSW56{1M*5WuJbgF3% z@r;tG?-<H@Jyep$zHXHCL%6{P9V?ZhJ>8N6Zb>qa#&h$U*<7tB9n*4O;}T(w^fe zPh4{JOs5Gy2V1V~k&2cw*<$jjdUmmCOAuK>Mx=mTwAydS~d|a?+MQ4hvIjNto?tI(ViQH^u6zLwvCkqIGirdHtf-!C^R3n)eT$7Cdu_U zrNSK*FJjmv5`0wI7cXfV5Ec`>?MqnH)8EVV748OKYJ1NQFLGMsFOmP8Mp7fre{Nc= zwoETfR-!wija?a53LVn=bV+!57Ln^Ho36g*h!&!|KK%^1xQTI838Rf&vzOuKtzF_! zQhMmCosyedCvE(^)?440ZxBa--%Ym5MbbrZLgwjtDN?a}d$gvgFF{{w&bJLWp`oel zFm}hzSPx%jt|Bvm#g#ttSBU{uZ-d0mJa9>RE8NseI3HuQksUuRQmQ=t3a&LxQ@{c* z^4Ni$ohXM{kqwY@?NdaQ?p4rlp@o31%hIBYNyYf?pk+*`f+XwC3ugO+K#ln8tR+G zm+*5P#H~w&AA1E-J&Y7f9|1VRO>Nqdl{rj@-%6doSwuTQ(;QtoNku>O+jB}OgqCe` znLb^B?{zofdXECtw+Df%Sa+dIpQ^ySbZPbLy=cQbu(%;B@3l!N2Aa5dc_Wp_>keuO zFN!J|gyj;%nc;84)Y54+LPhTAS(Ch|RY%r4Tm=2M7J-HjyGj!NFIb-Vl^Ff;m44ZA z*c$)OBb|IC`{)){^*h_}9{NW7W$DG)Q#Ao{+FGyx@bC}u1#R(Xez?f$9fA?YT>$a7 zDk)jI`o6-;u1a-n<`?C$FP@zvogUMDYFs}_L9lh0Ia|wvGk*IXjh<;XKp&@8Ry>?% ze7qUVdZ*$L|4>S_nfj{?W!gI4%~O8EwOPXqCumuFHag7yuG7>)S>e4I?3L&kN8+34 z0xS9}aV?YZn7$V!mNI5;(bX`&Ch0)V7TXOO9St0In38(|^#DxzE0;j5!u5Hwy@>oi z6O}@lPJJh80JM_=SOOLbOexRZqkkMdXgkEM;kGF@sxb0zmI%3^&Ifr)OpIlx#fM>s zF})wE6|>wn1bq&*Zv^<1TbsOa3FVME6F&a0qhbFoO6KcCZ^@?f^@BCx^l2V`S&oxd za;~#2dZDq2$E%23^B#LGeBN^)Y~Q_t7@eu>>944^Q@N{fnnz!woT5cHyZc8M=dsua zEb*rPRQ8kOa!sX|#?g;gfqmhWeTTlu&^oczn^zIdEe9?Q3u1aaM5$n&q}RzDvx2KG zN4@MSlSHP1q&@N+*z}ByW(q9xV)@i%_xlQ}mFeFK4H%B1+@vU(a_Q(7sX{v9g?64D zU*w+jvBytMQ^uyXK59D!O>mboDV}z6wPl5?{)qE^NolBz}VLTl+pmM->v z5H;vp0IZ^{6S+^16XiaYPmjk{z?E88)l27Hb~I|w7TKSZJ*LyUe=s#If}C`RZ@(tk zCw@~yhdbN1H0SX04u*%V2Ac#Q6#VLq+uOpnEFaILBvSJsP*bRno*dp@$KmWt;8av` zC0O1nRg!iI$e;>bsX_6YvRa=y94yugXieAVV-sPxWmff>WMm#D{ayH#{A|uiz09@_ zi~!d+D=X^EC$nZlvMtNnCs-AoO^cVH3R~}g4em6f3HJYCyOG|*3CoLDA)Rc1<6Q}= zhr~JdsV{F=wPQ@g@L5`XT9s=a5){e)!Y*U+vjmf2k3kfeUG$YZ)pCWdHeiPlFV@Pa zbkzF8*<$0Y`xb(^A;>*(4wJ!8Bwp>!K%Y&HvECsV>xB|vF{8i^Uv$l>8>7Zu-eu%3 z>dkt+5wjTSh=G|IUQn4l2%8tt?lF^#JhA)A`GrRqfVWB<;MsLi4W7aOY7IDC`DPxE zIWm0%UB{K4Paz3DA~C}Jp3$xB>^nxSEB+V_=8(p8aH8qCm>Fc3AhDwu)K!BbGZHL8 z_>s1nm)B@4yJd75ErFv%5ON_(?C|rr?P|xa&YS7Rnfux#zpW7ew&|mGAs|Mh%=wh2 z^*$A4lVX3#yjI*#-4jLu9!jHuK?&dV2Ul^XvwtWXA#wR6DM*7^Z?g$4eM5o&)#Vgr zOWALX8Gr)3P1$6ek22yIdmQ6j-k-@A&VRt2FQhMpk#)tlTltM!Jj+0DHJhD8vW@8{ zkyb2WmyUn0o)McQCi$p~QS9uWEg2R;k~{>KCgTmCoOZTd|%T2IuKri;n7tGWP zMMr#x*1#8)j*}TrrLK`iQ9|o^JNSWId%0WDONcMC6s|(#kiH!SV`ix$iYd(Vg0B&| zkxOe+r)LM;{sY(NIyD`2>HU7`IberOis>O(5CC>Aq{_%rhexC+bBeT;|5BFg5F66P zO8i(dpgf8ijb4E}bSRQd4LYQz=ImyH- ztr3DuV~M3mj^e{{L@Wz3&!3p4Rzh2Uk}*RV=2?ipo*nQ)d63i)6u(c*i%7a0RTcIr zvWN-|meaMHcyn(05xt=$J56`s9+w}v^T56Tgp<$bJ?8?l@{wEXd-c}YKvu8;?-rYZ z&ZjTzo`71JkQ(m+=U>Afz+k|L%*=~u6P-}6gB#i5@irt? z;wZ9dh;?B!m58WCj=`f~_U@TX#)uKMqq?sPX;xzi!J&n8=U5oo!r4eVd|ZnjCqmD$ z$dHTlZroUCy~kU{RIusyfXEMEAgd5SO&%X@4%r}tO83EqOM;VR+J+ALwCbZ7_05C$ zlD3sSN1FYWm)jYvd0alW;Bu5e4-E+)Ap<>9ZMiKpN$v zW5pG=k`XbW60X6&#_otaL{sL;a->jKfK+VN7|{P}lJFTWK9V+Io)Dop8auo9V{nAKBQN4YDI|0T76 zMHHSN^kbMYJZy8*`1TuC_c<2TPP@bW(J2@By7Ic|V@{9hmy)w|Wjpw%3??=dJS9=^ zFtJ>rZ-ahyN`IwCxvg>%Sr~O3TT;vXvug=~HIDk_hNRW)`No{9Ss0F%KIf3K282e$ zqJ^x#BJm-ymrqkxf4bEdN4vcoTJ_rU!yLJ_s5xxGE_w$GAc+Q3CvGnBwwhRy@wi=n z$g3cu45utm449v8b4Mn|>d2TdBbFmw&YU<}dbb3r)gN<==!|&_{K`*lmV=3#>p7$q zN(-WLhBm^Wu;1caL_5M`4#~oV%#5k|^!7FC&?pABd(2X7)=2Rq)4HXlh@<&2hbAH1 z6;k#sd6~k{vje&k>atbm51u6S|M`=AsnfG1n8NP0M9k-vcCV*}QoPQo2*8fiKp8>V zS!5T`*)^mr{|%UWYc%Ewk-=@|en+K`QNtP?c>D^9S!B(8U(|4%g81S0qjsT^P-(F! zw@+C~^Exxf^kI~b>wmL3^nY#~$;HaNR&?lz|LwqV!=b40=!PR8Z-rHmrf)Q~AGg5% z#;4=?lh&j*CWc!|axYSK&=iM;#jXzU_M+Pw=E9X&o`fTViW((1_bd}0;;P^JetzRS zxv7|nl7mduoI?KeoiTeO@M$kZ_RDU(@h7$(zt=B3b2j?_>T z$G!xp8Aocj#Pbr$X0Ak?RALG2xO+LdDX5WKY%7?sQ9L{G1?>#%&Ay5YxBl_J?<@az&viEi*5MjXquF(Jnz9-N1d7)>BO5Qlzb0RbJI!9`T1H{n zMkie}B;CCY@7Q~=+h)&K4yKWH4rS@qCju=i3|Yx~M^bl@m(HKVyJI~u7QoFhp5a(n zD96pgB~Kiw7U9h6l=d4|II~o4;;nSqcVpLWr|Vc|7;v@p<{3H;uA6teif?iQVB%Q$BusBt;J;phqPMqMQQH%Dzb0ctC%} z+`!yU*UJ~4Ren1-m9jgH;=NG}>1JVMJXTyEU9`JeZRLhr1{lNAEt5HRDON3BW=T-H zzE|}oy&%Hv*B2g&uOW@#Y|0Pv3D*wH_I&wxWdh;SSC;CNwNb6&DGqxiqnXd9{`ICQ zoVrhu1%p7$0EBaPMQx5K_>TuX1`MZ}{wmNWdkQ-|Kt zacq5=9DK+7>c%&(knl16!d9Ijl8^mn5fYb0VToUG@w}#Yw91lgX2dTCd)&4ERS+C> zkSn3!a>wS!?-UI5uKmMI<=2ni3uTGBnRGRp`ijovNfBj7^NaOac-W4X@u3`dCVGt#v2Q-V|NVf*#S(Myh>X+hfZT^7*-wy& zcERk$LWVQ&RhwB~(}R;Hg2cXkNF14)9#mNaP5WuQbE2&_0Q#V*J=R-d@t*d#%A2=1 zS^0q@5=_R)B*pE<@yT&;#a@So19p_wfQINdN9EFGm%m&C&lN`X44vSR#T;=5;c0Jg zt)zyGY^#zvd@gHt{m2+iQY#=%6g%TXm=8EV4s}P@$j8o7f^H{R7Gkf|pZ0JSFfh29 z{ZsQ;ROv*)PuDd_mRti(s!E-P?Bqfkp?b)eZk+ z zC8kf8yQw7v71b=qEw6Kp%C%=%$juPzPz)R(yKS1H5=@E39*avG)cq9@{?Ii36QLgM zEeHMuwr^zebL1}}#GfZJt1$ymRk_HG?gEx{`sJ16ZHh0 z*pSc9=6Bh7N8TLYMz!vveGVwY{}M=?&LmEbfOcc0{g5g|6>88!NOJn2p9Y zadgL@IZ;r@k|fAgU3fPrcx8%kJ$Pqn022t!eiFpaVfFd;Pv}hiGIjrf(dQ?nr!NyO=3W0l|IpGFqTMAQ3f#wD&w2D0Ok`A~t2n`2g3a#0 z1(7vUaUW(+5yTxn_Dwfia$h3R`LnN`9K+bUGes;XgPUBaAJhsa;KQ_i(Y#q^uz_Qm$1&UUny3Q(xw>O_opYE!<@)DOiL?d1Sb{G`^ zqSD9m{2M}}^(3R%2Q+OwpFtw!;*mzWu~a5br#IBiNTpb0xf8R*6gnh))k9#bJIQL; zt(|1>+ksJw{0R}XSxSQAke&SQ$@;vb_P`TpdV7ftWlU5r&x4uPK(!>iM`+C&*A51}o+LHTo5sUrl2i6?%*$1zR z%{B`M!++5w6#!gKeHUsW@aK|)J9w#p?rE`*LqugAV{Sk3f@X z7u7kc>);{j18k1OH&ZbnybY$q9Z_Wu+7yJ|zI(GbMsdTptf=U4<#H^Ej|}O>#R9PQ zr#BrI6_VGXlao3$hW96>l_3~rf{n>`NLlMrb|K%@bK}0pkFC9LMuP98dBh(~{TTEp zU9!zf4%*%o<_BB1z3|ytZN-k<$elJ+BuU`kl>ZoXLFI$wpl>5`-CTfTRO`rqvEZUX zT*9R%d0EQ_D{Lxu0T((fr4|+Fv{pTaY|ua8OJ(4u?D2mChVrKOb(_q`&KvXRVesZ_8qhS`S;5s+gWwYp)+P0JEdAX=ohd5;EZY2MG|xu zsvJGLW65%oa93`=C?<6Q4*t!(JfuFKR1_;m`4O9p4G%4IBoR1WAHV+7c|LBvvdB2s zUa&BBhi`35A(}MoO)?uJiA5u`bOERGXYXId95}Hid?lCBG*{MT^N`tLYoyKAd)!-T z^i^XjUHZFu=wYzFGFX*{dH*tLJEFEwNZU@qBK`WeP_Lrg*NBc@i$*}74T?_0;p+5* z>KGY3F#t(F_X0TSq2#^KM@sIHYP$ci=%nIJPeKFI->p~Ge_o!1s@LRI>_G&Tyd zh{8tj#9b1Vs!MW{*#rk@+-k+TuclYegt%3_^zNo@{^*YH3|qg%+?GwPZ=~q#Ph%O- z;k{A*#<9$~H_=dMA|Jr(OI%dYI9rLC6mehsBYJyLA(*0MzZ>SK0jv$k&96vQ%iCiHPW)C(k?fIdqq1O7O2jPdxwTgS7o*1P zcQrj1_YP}QhcDXKGA{fGn;&k>R=?zbY-n5XI0UHz|z_4VJMVBtbo#V<`VA^5NIrA+yh501iq1e-_k zpK&c&ESaVq#Tz-4EyfXIe1ilnoVpH>(n70hPVWQDoL3{^-sm`~O_gC8MlsF$z;C|- zuQa(5Qx_(ieqA|t3m`R%qK6cgs?hr~az4AxY{vuD$T(pcm7&>2kH)`WyC+j#71KSH zgRqBgax*H}zgg|CSKiEfIa>CM;1k#(_x-4Cu?%i7$-7q4Rh>ol2RYf4^`h%H<)r}% zkO{`uSBO|NzD4<~*d6znyt_e+7QrJFM$eY&YO;$g$BXdaphhxKw^m%K2jJmq*Y*%m zsBy4J##PXx+E$;LQ<>#;YnQB&77S?B_Hc(miZNX<=Eo}r796m!}c-sN&tHu3To#Heg$oimlg zw(J^zNFLZ6nxg+W`yvvnKZK;L4c@9zM$=l3L`QJ45n~-kbO(ZJSMZu?RWyPd+pF>PFCW zoeLjfa-i;2Jda<-E$LXF3Nm2~_?;d>DE{QFtTQ*=N*Th}9FGoMOJUz*5`6puUyTt| zjw2_#3!Pt4QpvYPcbRo2CNLksp)9F$kuE7-=_fbY8Tbt!bR14=v_mp<+g7 z7NrPW2+L2~b{#w)8Epjsrxm*}&?ATFTT+N-?`6H&>+vxL=CqS$R3J2XsoOSTVf3wo znis^W#7B`kr{Xm`7=c%y)7Xy1E&H-jnV&!DBOJ-pM}Fh8%92`ks-mGX3%;d_OgN~D z&2(>6Yw2uUWsJZWa8Y&%?4+ra-(DXPDxfM6-4uMc~<=sya1qAwA-`=6MZRN2CpvSVCr0UreKYlSPi)7Aq(EP(N&BFgdf# zqm{BRq3~n9?8Ma~wDio!f@{MHxKf&M$i!L3NRTuE3BH;}z(>YEzzi$LjOdY3Ma3fj zP?l^4yODyJSzd@sjLb76cy`JhyW0 z*=NBLrB~PUD#qLGTUA_`pNjf5$2I~;ND>}36p5B?2UW_hqA~DQz`b>Y(rxrE`bHpEx%W5{q;d*NuzPJZJMd|ZH??2iYX;|Vq|miqJ%qiNEg$M zXhclmj^Xu-umm@Qypd)$Tyis990FMu=1|7R=&Xd3x8)xRIO4PsSyY}386Ncqc&1!4 z2g5mfkqzCQJX(eIJB(!vJHf%x4{YN+)x9-K?_%D!!W z*otE3W5}q9sIY#P>0%RB3GSGO`K6?q{M*^fk6(t9w>(mq!n8IOg}Owf`sB3-{s7hG z*7cy#SyJfFb5%%~`>ImUc(bmFbcr#RM)=#b3x{X+uOIeVfzgT35!zE&48hkFv$@pt zDF7}{d{4v$h%7IWU>)msRelPGysT05_dWWgvlTp-!VYtUgZT;9*fVpe4gX7n-L=Ip z18?$8vgJ|n&ewDuyPk`j_9_u!1lJ7yd{$+Xt!4k6yTShxV-$vk;>-K=k+=C;ANDKV zQ=_qUw{U8<)xQt!TJSf7_GkD!hm$3J7 zu!06Ri1F3kIk1smo8p=Y&Wr;ZPDImv->>Z6O`W)Kc(!Op< zK=R-CXZ#S2Dv6^s#9Tm!L3nPtk0%fb@?-pBr^4PP;K29 zgJJ#F6h0ago(g-b9rHPTo zxF=JI*hZMYy@5ba1fjxnr39ywK^zKVg_KO`MvQ{xrZTtB;8tssFc)3Og7Jy87K+L# z*SSILYRJKz&j0s7o!RyslvKAue}X+`HvF7r5iu6627 zaZ`aB-!7Bvd~fOd26AggtMK-k#BVW*1NL+f6NZmV#qU0L4i1N9+%E(>l_^0R5HzWqPt}8V z-z_y-9-pzeTC43xB(7tWZI13gwLOdHV=FyJ=TS#iksMiEsH;&1q6e?#lV2wm=HB(u z_S=8KY;oV)LzJ&2|H#Iat*8TuBpHoHAben}Z0;ONY-tX5xx&kc2KQs^o1@GzHVoZ= zC;~u)MI=ds8;`4p5~>UPhav%?U?4C67h-qELh}!0O#4Hkkuo$&Nmswo&PwYO%!O$sJKQ^O#@7Ql`H zK3g8IwIgp>4jm_na{U-z>txG|Adg=LCJpHW70}7iV|nltKA9%4$cIw9n9A6h%rZ05 zGq6c;lSZ;f|DsBrB@Q0!GxAt8hxf3|wD3{fIVXA@U8(8}lt@lbf*tIr#XdJHKoEd8 zf5SHUS*&eWoue~J&tSnNf1@2S|v2m5lNu#3Och**xhDt&ya$F2&shdb*vXsyi zxX9Mt+~}q-#Po}jO3S%@b8|P{#24v~$REUNJ7vt*eB1JNCo06NzXJ!XTd1_c8qc>_ z0dy8#>=G)n0C1zerm9OyOpzv=dv8PhpuggQ?F@x29@{n-*R2UQDl4c?K@bf}7ta3v zgSGZ`pSfCczKU&<*p`~)52?y7dtV0-f7!^*}Q%q zN}9eM0{sy|RsLQ^vC>$Fv8+;tHH_C*zkMe;OFev7<|zAUUBPu0yegh(sCJ1Ro9oupTYz*oW*@2%ut9bb|U{!BY7V$k6uLQ#|u@JWbI~!{r5i+R2Eg=@#@`+QC0R-cS*NpT~F`={Vk8Tf_VH`IcB1!?F*UEgKz3>!4x572wN!!5ma-3x*7DbSZ z;Y33ax{Turp))qEf17u@Q#!HYjX35|SQ?V(I=48S1y=9^-03BdpJJsY^)28asxysX?06I#gdz z=K@`%gSwnPV+nTBNau5YQ2uh{9aO4+o%T_uB$*6Nd)@XVM+9;8J0ms#epXwuI0;rb zJ*E9dlJyi*f78pv#X1{&Lw`Jub?V!yqgc&sPHeEUk`_z9QBy#?N1B_rA02u1_)wAb zDqobThrZdghAxg2hZSjfXpSqY`@?EwB|5F-3p!2!-N`FP;()WLrrcG>%NvOP6Vc-= z&Vl8dL3d69??rFrp;xe9$p=n!!#or=!a(9Z(U~~C05!gpgFahgU2=d~_vLAF1k5_dafR9n(q_3K5TuC;^A7K*2V21u~@BHxk>cw@p5==tM-KP z!d^SG2>Tz(+pfP=I}aC&c$+V~(WWbdYD5BK5pYi%x#S+qJyRYArpwK0XGQg6wbM3u zYL7EnxaQmF?}R(aCtSs&tPFJL11+^!GDWbFa+(C2IRklPh6SBpJQ{cZNHywesXr=T7uE;UcG(Y(dBv9aWK>YiqYg6HpSLZmwal7E|VEH9`C>oXMx4 zdTO?ye&ZF5$hm4mYdL7?DMpcnJRCn9cz4A_H1`Jy`5 zF0|&wQg+zE%Ziqpzt`uv5{z1fS>g5Ka|TV<19$oWi*ky+5<$FM78esq=6F5 zj*09?2fj4M>uApxWf9c{awk0T*fNb6g7Na$n3HxwdGHup<7x#?b`8=o`FMu#So@|8 z|Nqg8>_Wef>B#sw`^UuP|I0J=|Kxv#CQs?s>n7~WSxwbBtr|q~ECu218m21W3O=w6 z(#tgM)x$Lv4T-E?9|dpbrbRy+tnrnWlVH3BKOb0{e)ZqicKi+JZ0nc*3VX;-6hqX* zfQD*}X6*7}=Eu7AIw|!o;&$e-+ySD8ThIy;%=)$}=Ktupt%Fi;y=az}X1NU=J$4F@ z)#8Y#9()=?==B%J-d)LU)AZ1b>aYAU5JjJ$PP=?>8AyqS$;_^$jd z`Y8l={4Ro;iA|CHX-vmWF3eUs&6XL15Xp147}6vfQHe(tn#di~D+aRbXi1_6ploP; zi=gSzDX%>1IN>XJtj>TJ4T-M{$GKnA3>R=V7UjCz3ZL2&XEEO9(4V5oK>y4G23-jj--h?-tW(410Ui&b?^Ku5T zM%Fci1yt1#KQ?Uws$ZR~6l0tUo&<|O44(+b zMCYn3wEHpc@wiyNLq({N!hg+BI#2y7j5_HJmb6rh&M)2!1Nu-`8SHVgg+G zrh@CE)U>&6!GCeB$jhMHiz|;>%Mg41p06 zr1lN9vjoguXl8Q40Zb_)C9^2W_G4-b&tb2o{}~Eqk|edD)pAuA4q84J+f*lFaxv7z z6JL(yF)-;XrDMfPhI+g!*MWtO(>&Y;umk-y!3hRr;RImQ53{Fmw z@vH#6W{a9O$fccCr2(haY=NjYkp3(~J54(lCU|I3!m;{BoUeKcQX!3B`t4FS@w@|W z-HqG8NT`-xs)A!TSw59?O;fve9>J-?nG6IO;dFaANGlF8-c7TBg6gmb`C^rnhvOMr zmq>o2I1Y$8>FKlmOmVJ2A}o4oZTS^qeCa>|Cx*(TR{~uRE== z3(Pwsgt(}-j;0R zF1aH|;t@a*HSdMw&cnB#y1~6HMvl|PZ7IT^h9J2Tq}7$?24<_A(T1FpCyB}g#G7Os zKj|Bc*##*typ~WIM6C)@ktET(BPURs(B~ETI7qGEx2=XOS{X2SvLOOGNyx+BK zS$7_)4n)f%6tKYwsdKc=_B>zo$=K`f2{*x^XILD9vi^Cm91m}}APy;0#2vzvq_S=_ zk6ddL&c{)@q1tMA*YbTq2C5Fy;=zWE2!q`co7>a2NKaOVIj$8Ec7~jZBs+>{K(L5k zFVba=)WRZZN3HH>8;$vE3t7s!9Z!BEdiXC}O z2R?!+9r&Ti3I+g4X^58~N*Q2*F#sCn`lq z67~oZNSQcYc8Xtoi9v*cxGxYt5_35!b}hbLm-;k!=6*}(|D;Q4i^yW?NlNIB*tw<4 z*{hR<6xY49HN-DXhPn_mMNTubhOSLoij+&25i6cgma!ba+qkl5g->8k8n`>|?p$V< zPp}ue{ZOsx_|ZLmR`e>gjzZVnQ*lG{^-H~U>J!-Cz}egde4L4<^ULWR>FeFi!HGVO zH*<=%N=tcwF4cc1dI7%eOKU%Q*~1S)#bL)bOC&8bP390ap{@2Q4TJLECpqKCdud9= z=qM~3Xo~0;a~E65Fp|(>_^+RgEvv)tlBEUcH4H#;etit$YgawjYFH1T{lBksGs+F5 z^PE|$mEVapDrIWUb2h!0JS(aa^;n^EROKm-Q-2++z!%DL73E@<4;|JV>VDbE{&pWr z@Wqc4-3NwSaV;qpI5lzhSz<<_+0Sza8?J%a)LDIlln(S=mRvrnEPTw* zG29h)WV3Q8f|{^rkPy_qzZzcIWyU{5)T5F3BZ}-hVcWukla|GUid>;~7p~foND2SV z6|)4Ny?D0r%*&GQ>dH);IqUH3@n5BupLzr0^DR(Vh*RFY@F%M9rqwmIqJ-?&`byBz z)6s)Rfh2+h{x;j9nzI-$?MGKry7d{J~+Sgm#GKHUopD zUFX^Rz=sUO2+ZP!5I*WRBo$UKa4t?=>`VkSxXw9hI3nS)F+^GKjXIQhOyei9X3=ZN z#jP9B$_gv;Ns6%FXauiFxk@B9yr^mTmjB}H7wr;K%-Ey}d1M=&TW~jUD7r5oucwW? zg&rUH?UWG!6R(&}&Phfr@-X&Aq=B*GPmVub>js>9;z~h=YB=Xi!hpwbT80@7Ynu;@ zO6}hg(~#5s<>UP6c}>0V^tWyF8Q4nE^SQFjELb!+z1+qG9I{E_A(G`=ar(#a$)VfO zNnrc^+6og5F5y-x_Pwp=Vd~6NvG*hD#F&0U1q>>w82lCKjeF&Tyl^4SE=;utzSSlxWv7p94LQ4>N%oTF7(8Q zOLb0_{2CbSY@6JJ&HMbqI-d)Xox^Kw{9m?`C=@nn#&F4RuWxUGt2QHXglElb z_MH-&?QGCtIIeUv;Fe-fSTjzmi*wN+6aA+!-yi0k2Cxn8I9>AowUo{CGE$jlx>tA@ zH1&j(U|4jFX>m?y9KQEX^L9k6)-<2J-|8FT{99{wKkUM_^0`IHf-c^#znEpGF{z}@ z|7(qXww>dJHqZ3(NQ`w%EnR`821CnR019zw8@=9;L~RaYT%bfR_zFx$Y?y{49D)AB zYdzsKJJ?#;QH^PGU5hO4q~n3<*-jkFNxSTSqx6UvH_%l-5=tGxPtJwva9y5xDkeFO z)vSkynZZ7XC2H2N$}-UX9xzzQ}BRt+S2Cc#&O?F796oFaz;PgD?pAlF7QsHL( zDG}M)1o?`3KS4i%rrhYp7FV zIPtGiCQbi~-Afw5@eAvPyrxywb`%pc#~MgP3Qzb;7pzQH7m>3X@Hf{dKh^Qz3)xM& zayc9t14_8w2)&Utm?vMTD`G<3S{_TPwZu`>Kq^G3tZ~Utk}OTK)}~ABD3s|?JU#Mu z=bdInZlx@`zX0KW|4+$hebo&lkZjT8A9v;12r+plwZo#Noq_saucr(9Au7h6$_}mS z$uNya4vbI^YcBN0cmlKrhnCIds^-j6iU?aXZln}L{b{nm3rAI^ENatx40@v*v7F_l zojWg>t2^h->(V>!NNZu+Qk}1vHVVuApS7m_&k~dg2V5ggEQ^kvKO~*JGJ4fRKWJ;y zRE?Kc6jw)Y-qDh`Ht*`Dm91hw+lcD*w^GuG-07=E>Yr42L+Tnx+E5kI0MG-<&tyTy zu38|z`Z4apoQx3>Zv76eg?`sE7MlTjm^8y4PJ(rs}6eZ#)BCW?1b`(3Dvm6u$U} z&o&lQ3BbFTfa;>NnhBxarRaj`Gg*Kwxu0MCxFA@*zhq2aSCeX5D*G|H{MRe9OO#bD zny)88j~xtmm#D%9fn4+siY@?p4B>i)FIda0fVZed&b%v|Z;=;aAdQ z<;UqC*RC36RFXy2bEH<2%NX9C1>spxf9g|Auv?f^1@nc^`K!-^wZ-s%?CJh|Gom>` zpSl|ahceOS%P`)Mzbmq9`zZwR5XIt}Vvx2*6OPm6p;rV*cg#qCmQkq(;`>(|M&b_Z)%e-XFRRu-7NR~M3Kyczz8B!KVAENZkA>nGq;-Z)esNmFeg>s{0{sIh$8ZB4>W z3@Y--+Q39Zu`l{$s(oGJ3nQK5@6F`TarIkI+>-mB_ zD@Z9&MD1tXhkiTb{_UEzed0u{mV%N|VAxzIxML-jEu>&UYjVY7a();Ghi$+vDv6m1 z2x=BP!iab~;T@O6(D5D`B^qJ;r+ms=)%8f{=Y&O$ihUxWfTK!KdtXmg#TRAHYH5tf z42S~@Ghn=_Jo%VQZ#XKyUsJ$Aw7@)E#2|liIM-{l`b#VN>!SyWTxj@)IRbX0-!E7h z1CRDVTInNeRc}80lj#$qZuvXR|BblvzYtk$?093uT*L=sk%B*aze0CFe_Bhf1#`zN zpM3+{y4ZuXB zzH(pi?)&zq#=>jSRa#HSCtCyAJ#NuAuam`tyvQH42^cPC2eextBBf6KJWS*qgCbJM z*I_-f$M-t_QzgtAD$Wvl;AAH~2g)865=9Y5elsA9!fK}lu*@(49A~rVb<)P!ssdBt z2p*9iiZMNLRJ(ZeK6SoD8$Q0tRd0e5x~R)0%G<t z=rwKz0Z}S@z=4J|7Sw3~Nu){siR(Vf>l)Eoaw&V^$=i zJBEeZCV}mg)4~%=6MM?puBB5FdE%4mZ^lI3`g=;b<_5t=4jurf_sYpe)Y;s1M*tjL zYdgq|P#a0gRsM_9d{2WTGeLBctYSj#L^>P}9g3_zz0Z zv>|c08oouMI#pLT#G#bE{9=km3e1(t1*_+_YO7Z9a2r2CsRVh`aRnlBIl|rV?a%~gLL3_+ zK}4hT3Wu1vi$KxRF<(VqI%|20RY;#WR?bm)!yh3J-jV!w*t2v|C2TcD-;1Xqocu3WBOfI>0gr*eB4Z|C&~&O z^GRY&JHUl}#_NRaCiVLUwYQ&zlFui{3`qlPlClEWq@1IqyQ~@v$DHDo0~{M3JmdX^^2y}xbCF6zKvc1~Sj5=oCOE~5Py|1o0{ytVxjBYVS|ZzdOO&?aj7 z!FABxkLlx&Xh)OJUU!fe!r0Z_XV8 zabM}wrw*H#16DmaESbO|#Nw8O_An@H%1SV0VDoJO6bbD-DmrD(eZ&RR# zsN`~~=K8tp8E5|50u@$%WO~&wO|}j@+~hgyrSq0KeF?Odiv#T{PecJ z!&Fl|2z&4k=(QgOsH|ET7mQoU`qO;+J_r9`1pr8$lVq0z0|8wV-b-k7;RwGswyjeX<~R{Z$BKPgOz9G3nFru_vo{kl*}L z0z7|1?)z-FN3VxAkBZR5p{l^Mx z9S&-AOde_)&Tf}4h;z(_*zG;OFb${F3Y%RDY9!RHPmKq9nu`ywCCxn4uPWi6yC(T$ z&EiC+<5K2?By(>i7Hx3S34+iNNLuYUL}!=O^GYsRLGP*17-&yD6+S%UE?m{`FPq6C&U_&?}%Dne|DsuQh^7v|uyF7{YsMO;eRPP|ADB21u!sZai zd9U~qKD@&dXK#*z`#o99Suv_O956{h2+4LW0MJk1ZuM?)##is;m!?|V(g)(IH$obW zvM+WCmB1Q7-vqwNhSY_IT7(pfaL40&vbE4ej*frV=PR=ItL=3TN2AO;j%j9BS-!)R zv~5p26oSsWxXUVaTNqpPdW#Hale#QueSYb9>SPblGo@!$U178qNl_k|^el_lAiEWQ za{se0m$9^}^?vvb^=wN>z!Hc*h0$>wKpkFT6*-`rufs>3DbhcM*&>OeV6B33q5UR~ z3Qf&w-CYa142$DW9<;RsW!a-JeNO5gI%e&TWHZO?;{4-{U+4(H7_V^;5JVmN0@Fui zrwiO@7VgBM+ednqGb&le3@cO?`yS5wN5&-dugXjW?XLWg~KCVO+jmFcFQs}XMKiv@)$RdT5?E->cdql zA#v@7QH_5nldwI8IP0wfPAdk;g3jaDwM|2g0rZh`oo(g7U0J=i)^E2OmYqlw@B;PG zY@)U_`+U&a10z|&|2q;3DD1Px0sC-UJgvlyU711nT(dC$4VHh@j`QdmPOfV{!z9}HJ7qdJ8Q}EXR`*1@u@SR zGbJb^t#y0*HZxVU`U@QL3LM5E!&DC~hXZ#lS&Rt_Lnk1eKg|_C-zAp z!GQ_o7W@&eo!^{pTQ3TtO_z3t2v{-E85nj^J8wY)xun;W3f zI9#11LvlXS`fw~~-R$sH1-N{IY!S18QWMGT$lG&Gp-KwQ`FILjrE<#CLzhpuAk{~F+%YNa#R@ead5Yp#fHvgTSpcwS=wq*>(7L`70fQR4gT`7 ziEpD;XcCm#&{lY!X$p5my?%XiRMTyR#%M_HXQY#(8DX~TqK+FORs%VMekOynpyd%~ zRoDeEdJITNqurt z=0amB*##3tmr{f_+YmN^YO&1Q?BMJxeTTD%$KTPVWa z8|N-66uzH_+JhGo;FU3aE{9QPJ#p_y8?;KE=);c#im3BGbgOkx2HehaB0h@qru^n? zpMFiRi0w}qUbT&Mk(E{4{SjiZ9hUCI>Jv!5vwFoi{P1q$K8w(OWZ| zmIJe!no;a4I)y_T;uc9dtpTe7nhRnS6VOhzn~PXc9lbckDEj7))SRtdxH7>*CQF8X ztE`Ljlu`4fCDQtu2L?};qIG$=el9o?a@?$jy!F=6+v|FhlWbh=xJ^Uoi#k)~ht_gT zF=ix?7bu(1tv22Q;^Vp1DCn}5t$;jib2{)Sly{5O!fPYDL(IzwFe+@xJL4};@sn%o zEz0ZUA&#&9L)XofnAqxT+uy8Nr~=e}tsCOW*$6cDEM;evikl2CUNxeY@7i8Tr5L$r zO*zR=$2CJk1BGkrlPCP%?{Mc(g0nX#igpEWby~&vy!=)e8=>UrTfbdVG;N1?7{mCj zm$FX9H|!~EiC5yKBLJ#jMfVp?l&uK6yI%()Tc=bM-sUN4(hQ;#&q3+JbsxuavKr4Y*WTY^LGb9paNd=I66f zSo5Y+2G=Gg7FDG$Y74Cu8`9<@_S&O4MM$`d9z-jqNnGK+k8usi>-L21@8%`~t||Dd z19dfJzH@f$pIEAgo%t8dnH%n~74Ca=OrwhKzB2zqamby}mC}omM<<4}GlaI~vyhA1 z@ztI?#0M1UkzbroCHy_ozlqXd9D@8EYoxS})Y(UebbFECXv+X5F(YAP6v})w8z`o) zbMZzA;1hm`*?%Zl12Sza^%zi+hM>SW4jRM==&dGG$%>(zYR!*MuuoXutJ1x}i>jo* zAK$MDe-1TVjo;G#IDH!#^UJ7P3g@OY5Sh{1Ah9LA-C}j`?oc*s7O$EEoGOUy;Ze5H zph@SE(b(n=+O8I^K{gY3v_EgM%tbsJwM5goCJ$tY|>b$@QNY2 zTgBpP73ZVO)TMes(X?6lw)?`$L%!x{Y1@KG_9}z_7C`tfKtzPjb`|GjOTPWVLjqIz zrc2{5vC`?+n@o5Wn9N!Gdn5?0s&ZrxQXc7u#JB&??Cw|JzTn3_#zQ@>?H zAxEh*c)(aj>Z>UAuUprCIU+qb-FGIiqxu6gk0}q;26pI2X&SjX2i7V9p-CwN8ZeME z6>;rPIL}KP>HZ!}tyFZyCY}+Y{X>eT0*Xc##NTk$DYz1bNSf9Jk zk$(%C|Dh=9Gur$^2~8H`MSJi}DxEK)`9X{^G_FVlNK8%+HYB9vD5F>X15B>GjAe+Xl@0`$Q zyN4;f*tKhUN8R8)R@|5U{%tx{-Qi_$Q@$m}-H8z6Ua9a%0b&NsiC)GJQ-K!QLEk8v zzEw_eaR;vu9u0!$=7z*6)II+s7onigXvt00=fNBT=d|3mw-8P`IRYIj=S`jQ z*ME8VE?gpuYbxgn^~bh(5^gbaB&zQ#Rf}qEir=jg%6W+UYO56G5c<_taU7LuRz7sb z6lD6!^Z5MKb#GZdShI#Qok^{ks8FazAD<(oj2-|A+fu~scV>yohyLG$`yTp$4K}I| z7juz;0D2h=t>Q1f@rRIw2b(Az+T*($#`&~_Tj561g+za9tLW+Ji=Z$uBcx<3rfi8N zY6C~HlQiZtk`r-K9jQhlS8%~5E+b!}6CI1FIufGpASL=B+BIg+C3II72x&g~TY+1U z^&f!u1%oxxn6X}dzhkQ`PEO(pcQCEj{}CF=35D0MI8emPy2d?Ln7tyji2^|X!b;NL z!b0GYqsba%Bm#l@iCMZe8CNfmtG}(T|8JfQ{^P{(C7rrigC_FNh!cOwoLF8o#fTi? zTcd=sdvX}q)9cj|-8Wk>?t78nUiB5W$0Txksd zG|zk~--MLwozJkvw^Q6$_fQ@S(uK)`DtbU*DC}eZt4CeZC+n8P{QjgLSFM9cKScf4 zQ&q(@_xk6T?Gp#{R+%BFYYt|YEx8jWr0($2U8DTC?5k(*(u;flbgSp4-nb2?g!?K1 z>Nkh_|4=S0{gqQYfWcGZ#jkVA`us@d4|Km|uBLhZS{|5SqRpwTP+xd`QJva#Iij#% zny0asJGW5!LSXPom-fm0KGpv*NAVxZ+R_u-^>yr_zUaY~-&^Di#@Q+*1HMwWv=7_< zIjz*X#RI+oYubk+|D2panGAn}t${xTSGnaoah2Af%YP_@4HCEg9b!JzuMW-L{*B1( zF?hV5Q_!`QTG!O?z<0WwpQxZ_x>d7$6zZ5zlghtKx}SLS82rS1*evMAUKWfr;#T&f znBTAdo-d{%`Y1oJ3G?$ldR=)Ha8}OI@m=8VXlSlQ&=aAf)|2^oEo1I<*LGM~A~>}8 zKc*19`cM|&-}@>z!``%5kLLFeO~d^|GbP#;C8U0OtE!1&ULh&4+yQyFe;P7c=P;HSntlg7YWMwiw$8jBp$|YjhjA z)8vbH<|pKq7tu6o5WO4+!NMaJ z>ekO&ZRq`Y*0vo)A_>DYt5~Bx6&j_9N9-S~97HUk)4Dgr3zS{MuFFD~6%9QIYRdO) z7VGuOZY%i>=ssT;;TRtC=3gO^e_^SwNWiP~*6G^!+O$WPwBJ}*&S za7P!5se+zjtbvQB@Cc|v#||K%Pv}c5Je{l%n}T8hRG@Ae2k@a4g`7|i>1?^K1$Y1X z)(Vwi(GD3-hW{)DtJE*nyxiEwcwnbfy`j~``l9N;s+Y8&+Z_OBv6Nv%57x4M`2`BG z#Zx8|Gu_}4wdQm{hJM~Md^#1C)=_UO2SJ90e?5G!%gfY^vUx*N+|*iTC*k)q4H5#P zbhq@{M@Fp;@P&962JhejcqmJE_&q^q-Gj?1qcm8f6Azg-w}`M6p?c| zfZ}<4tOKt!O4iUdx<2Hyy%BgAG^-kvkxNwdGY`3?f{5lS*;riLJG{%QVNjDKP=1;S~X0!2L zDo94XW4v=AxeAyf2)QfD3c_kBbRw#%y>71UZLBAd&7Rd$hkWCrXs1aB#81G~=l zK`IAF7DM(?PW4zQFrxjFbjeb6BNohFjj$S@Dx~ATg`Lb1d z?jWw(DD_mnj)4u&O0VWp1Zb$%?Ye=sMtF zE>`YZbicG}<@?>qQ)inG%r%79Fcalsu%f#9J^J(K+nc$r5|nf!v;MOu$HEnmutfwe z{)xO;por8xru5+e2?ID5G|VJOcx3UX(i$t5UX$&QOob*Mtb_#4ile^E%FJ+1(dXH) z>_~<)J;ee0T><9!R7$w$2EB~l4`3VC%$1Xf*8bcxQjXWDSAUq3HT^~izr~z8yt4<) zn9Llqv)?XyZfyML>y?(*H1}AL6TX zx;PyK8AI%%PLhL-%c!gINX1lQszR>U49wYLgyEN+KM)6~s^{9tOJS|qyUfNmb#FuF zM9tg)OMbwiqUU;BA@BX-`Bio_JG0@OP9?4idU{&}9pXwC;)3j=%Pvux*-be>6+L9V z>vm(l3Pw?&J)>=WDy$#2sHws=<|1v;4xn|2&!g;Q3?7FJ)Lq|CRQ%OC^uPT599wzM z%8J_ozXGeu0Na02gA^)jL)JT~SpK2>KC(XIuHJMi@3;!^m($VC`-0{l+i^VxM)X+P zu4&$={Bw@|m`gm0^D`nSb~< zasDs?LEhsQBsj#p)K^I=uP>^Y(WLKoT(}4Ke=#q{JAou}e`DCPw8&ySrMhpmU9H#p zaZK@S;e+jRCj19!?1}neC>)(~32glqI7ux@j*>!aTNQYpS?~WP>96^EvBE4eS(_xc zhvtb*AU`dWifXAcfy$UVEruc5eoS+QHJh&7vov0v4}N%LRijw5U=m0gNd4O{VtZIR zn;pUtkKIkOgd0v-gEFXUKa#k2pyFT7MX=!X=53?LRtMh5H_%_rn0iA^;PM4Qc_MC2 zBI$atF7y9fQ@rGacA@C`?d^fi>q(`3E!S*~5WyD-TxmoU{r3cm#s{P5lDeY(GaoCx z1%Q%mhSv^;*X^U>d)uX;t=UCEb~CxQE=d;ad4O7)*bzvUTJdQ@(bzqi8q|zEbFn?@ zJ+j4rZ(?}NTC*7|iII;1CD3)g#XX??&w^|Dsw_#=0vC2Df=Lcn zdG#>Eh%N)k8})fLzJ`K&6Sp%>IJ`q+fyXy z_n}TvDN20)5gHDob+qC$)FkR33N~5CPV+q<406;c&7~1-AN#Xb`Eyq4x|u4o#78L- z+3!i%}Y zP@EPh?ozZsfkJUFPAKjUrIaQRin|y0qQxyZK?A|vX`w)Hcc(ZM3O#veu6h5@GjnD> zoa=m<5Bs{-%9iZC)|Q{$_Z`We;bm96u&KOqGJZK|u#jhTazP<_uePyNhCkppK2JXK z6JE-ylpP+lZDe`1o1ef`@QM!dA)1bXwb;n`dG0q1OZ|Z9rxO9|PiFt5Nh?OQ+xcf5 z_<<%&8pDwp0}`#U;h819{?<>RV(sunSE1Cz$^;31e!ZluTpM+_T=`}sHzxBtK_|6# z4Hc9t7+2gTBf*}qBednQ829LgewXjf`-c&wR*|^7H}S6y`K;ERpLesJ-N%jz;oBKC zH9RKRFK<)rKcHGt*ds|K9x!bBt_x*EriO*=`{y^f1uN+Y@>GE@oYOz()!rU;pHh8F zOW5#z(XQ}PS@E?qFu90ijEnambg%O?$nH@!w@~RHZF&7zG6VmA486d=ItrgA^gRBt z`Tw?EBdfn%Ph0%!!vEDF%gQ&`4FuOcXtq;4KIaY?cDelY&vw)>H@dkhQ$@fu?tf2F z{6E?emCi%eDxdTqcll!f9O!>^$iC53TQOCjore7P$XEpY>lTL#%~s-7bpG?Ve?J58 zPeng)tKe}hkxb@^opP=9R91*ljO_-Z1RO@99H$Fv>;I{qHq(EhZT?>t9;_KKzuQ=` zn~mLHKp1Pt-7X@gJj|6q_AS6ED7#s-LZIMh z0($82zfuD?<)_g&DR81GD+*s_PA`|0bBwQFed(26n#t#{cSrm~@Zn$Kl} ze4TM_lSGa#wK5v|eGxtOBv^1e%-E!)j##C_l}c0%MrpJ``MFa4T%I^XVS{>qDDs|lgDtLonfvCY$KE(f_(ZB% z#pb2DZsi)6<4_kB6;#ct#9|TwU$DsfzG0*~7F89O%if@H%`E*=JkTjGw)Z>>44M;V5b zs)Sp~(uzVcTPZD||2a~6*>v}`nDX%1uTw?o=`xeej3tt#X7%v;@&U7Vjs)}ydSy~I z2%EQ7jx~+X!R8jhhfR4@*pOC&IV_3#*KQE zJc=N?sK|w$uj10NI(E7Mec%1Tbj>qZ=x14V=QrKs+15¥>Kr%_vUBb!N&uk_3@~ zg{BIcQX~7rkd^$X$zH_Nt{ALM`=cRAOV47~K3u#bf@O&LmxH^BTJN1nRc(N$KcUqi zeW7)uHJ^$%IY#nrM}nqiSE?qy3RmSSjLz%SMZylk?5uCNN1^>4J??eu33bKcwd_*W z6GmG54jd#5DXiNZYa6L0z?4qPB^A*zz)qE`tBG3cGi8!$6)mcT5*m7ozA6Kx*uW-u zrrxp-^nR82{ro%I$){03U7f?{Z(8FsrSvMoS9JPRGi462>I-5J`|8gvDm2noqQ)S& zva*`5B~$j!UxNY;l4h2#Bm>58QIYm-3;!~WrHA{|w|9CC)6$7Yo$1DppPlYF?)o+W zT3X7Q5?oQCcSX`JH@~{E_qDEo{=2_cg9#@~bRSjzjLcs6#7}7O1)o1zULZvK@DcGW zT|K$>8Joj~j7(TaR(zHV5R43D$JVfL|GmTbz`0Nl-v3(t%9}o;6PQrE3`+H*nBg)3 z1C_f)yG8Ffcc#3N?S0&#Os8)dKjAzi_wgV9NRc=k3hN;ZOYy2REKo%+@Hzd_*I#4G5Ic2|$^{hrrR($(HW2wNDZ(kKJRqLbm$DU`;-AT}g zcv=cj94>}#D`&44DLyEc+Z0dwaSv=96VUSoZB(r8?&_QP8MV?x1?>-NPorsNa*HgN zfnEBCm%nbTmC!hiH#VwGFodsAaOw9=TAS~BuW()!G*^^KTC~d{6m+?{kmBN1ZL)ei zD<-Ou=rt&eQ?AX+#k;f0jgH9}I`!L?1nn)13Q>^(ymDAGi@IK|9B!F;uHh`s^#cXO zWRiraMsoL8#<-qL5^4g!zSt#21tkGn;ME&8`=)cl(%%fIswZ+F3T=J)5IXz8Jd` zm}wK9A1xQx&&n>Rw-y||tfq$rFY-6Ag;R(L=E$F(nvlaWZJz@j@1XF%0Gp&+n$<$3 zY1WeaSGip)57fJq#xCkZlg7Wa$FMNRST~L~J@hSfcxz0YY%sW49AArwVmIOl)~qzl zBKVP9uA=xFD79IBS?a*W6#AlJV)N-J^2AQk!Zk>WE>71Dv(Y}H z&XDjSnMt-yFuNBA<0Y}EWH;r`N2!)(ARJurO_fgvU9G>RAJTU|xg2*9^740}CiYJ| znmbS=zKL46;yA3>zIO1+kzIq;vA(1)#m!IKIG}F$5B{%-!h^)Ahg6NV&;GHRH?c4o)A$^TZ5f?+Q1|Npvc)0FuzE4Jb!7jp%9qcJt=3}^zToki$jAmChe1((l32)rg zAFfD9$9XfS@|4r2(y@T=OM;pOWGZ^(yLB}68)@DLvAeEZlfd;RC8O8GEXUH`JmLSC zWTW>Mki;Tksx$Z<=-ken4J zqW42WFgYwUkZSo$)-$8)|Mq1nQ_X~0n%eW_n4PC%-LP0(svJhkIyI)DFS=!DF38C0A$?)n)P{i71$--;#Z}by+LuTk(K{s6B7?N#nU)lbIS}HnWnL z2lA&CRIO%yyn(!Kz*Ah`Z4S;I+hgFjuo$E>#(mOW%$m$!#^nzutE~-u)cPNh5X`Ccp z4@e30xyWt6P-ifa%0i8h#_t^IJ*}(y{lU`!=wCqk=3^+kd4sSPB;1hiEGOH~*nB0r zI{M76?6Qv=L9qroiw}>-wD#A_9^RZ5Z+BxZosDMpc-j!#_b&2N7_#}agHyZLN|}JP zO2vx<7=^>giqdRIaKxB6c#Q0Y2Yus@6EzYE+Fr5z4An$hhDy6xl6;*>kMoa}u!k*s}sKt!!BycQGRC z|2<1m|Cqp{r;SZBBs55bI7w=R`#ozS_i`hfoYU+F3QCi58z2D-qZQ>6ny6&c4iYi^ zZir~Rh?T<++JttF2iQEDAfEl_S^sNx)RMJ`bN~OhmW=&WKAd-}M|O@pxC;J%2!sDe3hAG8XZ`_ZfzA(J>{-jK z4EHv=;Hd_ATdBL13>UW+l3e3;W<>k6J~R#okYw6>!?i~%t_rqp@+G&E*pf|XTxEc* zbT7vo>j_sI9q>lSXgR|3+bn_IXYLOV&37C`hJ(yZZJui9vRL5!V@7P;P_l?i=j?3< zxEQ-ztH-ycqPkH$POCWJ_+rJPx)@1`;$Hyarub5``=R&Xq3a;f*Y;u4k&%6MSF4@7 zR;d$=d?Q#*PO3=8v2zi)GYL?+A@)D5s^4$O4&S6{D^4gPv$qoW(`9k$I)_TN%M6_O zb<1pee(U*kM^?)iJI(+o6M1-E&)rGNWze*Gf~b?e)vd4c*3C489d7ddMdj(VWW>qK4xfi11_|Vzm%HyhOY|UEjMH^>9;kG*3#R1Xyg1a zN?>;*U$`2k4p8UZCOEod7iJmMDcgnzg<=Bu=Dr-2Z%f`kkXm&G|Ma_T*qSuc)L0qg zyl%1?ao1{^AwJv{{2ocWyOq`OR8lV8Dbx`utZEZ1|2m&+pM)xY4b$5Fd7`dMoF~iV zO1>Yl8+VT^d$ZH07Gh**ZfbHMzhvNAMvVMNV%c70?8P`cei<%+lO7KdfYYjp3kJq( zpcQxycuoQFrI!Z93O}p|92=M(pO!o{l{ib6Zk}CI@8y0Oz*ZDk5%(5DkudT!Z>|I9 z4GedV)pf1-e&ef}2hJDiWn6Cu>qW+=OoW<*pF(S&EMmEJp9b%Kp=uCo^U5N8_4SAO z%vdx&_($=Zrd}_Y0!!XSLbWa2U=TYZ`Iw#Y;>+W~N{h+v!VVkR$g&VdT_7C6kvMsF z+fzAu;X{S_Rr|@>!Tvd+)zqL2NDex^Cu%Xat z9R4-wa>l)BYovMcyR_tC#S_MeP_YVJ7qh{}Nbjgwe12R0VyG#D1yq=>eb|eIZqDFF z^hUq@&a8w5eEgQWvekVjr$fGtSAtE;@ z#e`kUIi@Yy126u*(6g!FcRlZ#co^vz+NNji^+EL~8jTW)bLnEql#tD3cvIWnIpiy%BDfw8!LqmU2nPa zu_t~b>dM^cA(Ww??4SkE##oR{X5YdjpC#i2G7Z;HVI4S?&C(8cv#ljvRgkw9VQu77 zfmgAiWk0j48&#}FAsEUjCYL3)r$-AH*tjN_5dI;KvC-VHsX(qeo@pO+;XR*Q=DR#gz(YlDS}4SARiiL#_m zPNBgnfL)Bl*Wj^&QZXV+#;6p5MFgT*QmEv`RvCT1Yw>z{7Nj`OxIp3Z1+J?5Qh3pe zw%oa;v&pZ4ewy%Cta6S!SuCK?;aZ+SwgCieOp(vj%0WoGG0HtT*P>CRaF(1q!g*8h zQuwQ2MNB^vN@ua@KsPiW5~vgww3FxaWm|E7wVfCh^B&(vZj%kHT+-mTHTm_+9*yx^ zM$FD3sC=|y@req8IkV$$3oOp(AHS^t432EkAttS_}-uO z{smAJ_EC_y;H^|2R1@}|iQgN_qD=~9r^*Qa!;zicu(39H5 zY=>~%x2dpgLMmvHGVa=`P?=ne2a4eZK`-t!uRf3=BTI4wu*4hwpBs7qm%*oFfhoOc z0n6Pc2}rry1OGp4NB#COgM1SkwU=j-bSbR}k>v)KO=$&LKdpBUNAb5tk8y>c&!S&R zz|C~=*+E7e6Mh=HK~V6o@9pX`UC}P<(2p}MK~`{4>YN6heP?_z1bpkco%&>; zY3QB$E6-r^ZO+Q_u4^hxQu=|Y+v-Gr@IW2!cuAZC$#|pP?&E~s$%JjQ1y5NJB|ZZ9A3E?Yx+do%#nMdJ=bI(tn`WIFiYoEzsBarmo;eqND18tFUe%oyUS1*ukXYGB zgwZD{w(JlI+k`CNhEm57#kWg!d??(hajM&XOy3jnPPZQ>t_z1SEGYSTgr0#MYXgJs zIB1qQo_r2fE{7$X7{I16VL+a7&~^`liCGtAcpgOeKGkt{AgF8r2djwiwEqQ&cwt+6 zvDkh!ZK!}tKCTKeHE?}@-8V3L20P0=d!8I>nLizfH?&6UbW|0w=TK?0sA8)jOufiS zOq>Q$%fleurIJ;0{k_|61T2J<x87nAP(f#ai zG^x^Dk=JeuritnN+e$i-0ZGjuS<<9KTU21z8snnh{bOZf#EdAK5vLm_oaI>x$pDA- z!NRX~%l)g{oF%T$TYmw51`iqs;tLM1Gu`JNer)ANAD4+xJuGx>vH0B2Y!9%i9la_l zliL1nGOt&rDS)r1a~gWOdC>X}gT)hOg6JH70W?~BIDieaFJ{cQXk@!JE4P@jaK4)d zu55;%p&g;ukX2QYUFzz}0C+!l+ppSw9MKatUjz+WfQknr5ah(qQ=l*JgCq#ErdPpx zGl}UoU$|#K7np`6B8=W-(&I9-5R=47POEe^_BBbatEcQuOfIBu2DR_Tbv=u@h!?wJ zC=vFGY3CW_;Ce5r?4`lmtE~$S1tj2(WB72{z_$~h@t8no1^rlbAn$5~aCa-bv8D?l zH8zXOEukuj)brdRW8Lg17HFWjrQcokPd^7t0gKDV{OE%0G`CJ^ZgSafd8O2%5bQC6 zr7V^>ks|jo&XHhdy*Cr(V}7j}H#>|sXJ=;3r@oYXGnsz@SO)hB2I7A>^xS9>|Pkb^~jzmsNUm!0P7P(dBnzgoeE_2D7AxD1d%d;NrYIu=%|PpjvF1M9~-a0la5vkZHrJU*=Xde*9f^Y=@mZfR+T zxSEEriZu@JS^RFtHNW?gnaQ(6*UuA1SLyh36)wA;Cn^O?@AAR#Iv%Hw=N*OL?9Dzc zh=zr0>bh@ZGrn|?84{6*w_&R&MFc}DdhLlyV#AvsLW1!+{O#QFH}s~X#n17u^JT~{ z(RRX+1zGnG;JGpf!ya9Fs!4Y975?Z! zODC1oh*T+41s5$~;0iord=*Q;C3pjjjqN?2>ylGH@PfaRSTKbQL}jR!0jGkYIV1Ex z{TgaeU|+J&ZL00XvuxUde2h#hd^@T2@Z5aEJ5F8wc4I%2Xam(yi!9mchM~w@CyP%7 zQ3Fte@V|ifdbke>e|r9pmaoQ9_-#Q{8#(X}njGgteJdhLs-*={a^nugO<#gK*)` z>c}tSzSq?O4y!kPe*u+TOuYt3si$pJ|EH(aR)0?{9mO@RQT^oQ|E;1Y;(tRwI{opV z=5;yqzie+N^+T*G_1FpiDsFBjpT7Xu8uTJfmw+t(y$t7W$CB494Gh-_?9>-dUI0w4 z0!E&wTnO4-ojVjvi*4^P8~(y;To@@B=%WDYS3Z30KDbB$pdD!^=ZaPPmoyMAJ#3z0 z2Pn3h62!LSQ5}eU^zi)YXsRx1ywUEPyx@#zI`Ayb#jHM3epIe%yOj(Sdut7_1fX<6 z*GIN<%Z}x4q&@$jtxi-`?n!`N-)Y&z^S_zMQ4VnVETjqFzCnp*#^Fe-S?-hUwM2{6 z5wtNU&h2e-3Dw_qDQ4MbTunWF7(ih%d7v#FOU)+>@+C`dARC@njETCH5Sh)S7=p{( zQt#rcahXH+wW??0?NvS7JpvVaqf=BI9ENzRIn+4Dx?jH{=<6IcL@XO!>n8-hP7)rP zy?vuW$ra4lgp?0lNYH-0Vfb{!dKRMIrYPCG%)A$(P*l_O1x{^MQ_Yau1>Q_UctyGWu=^4gcyPDJ|IWPN>6Pr?>8)}GJ=;1OzLJ# z!1-kYaid-<8+H4^LsQpKiXS>$?8$RGAY(BXV#{G=!GEpR3g zhcT2PC!*qqZRM5Z*ebykI51joS}e9za=zAiPE+;8WmxvJikD7!Dyt2gR0B)9BoFUf zHKrDr=8o*(t?$#^5PeD9$wj*fqwy~YNPo!&r@(XElX5v%zD(Ww;MX)$aD@z)wX#f@}mo3vVDHhpf)NZd%P8i~z#2Zf^V z#`DSRjin)PQdSw|Go@~v;hkj|;%Wo(u5!-CQapaM=%uHLv=A=YKn@^(UQ!bLBz?+E zvB}K5Rwcct@2SGM^-m_1%hS#L>&b(#>tL+sc|E6j1uijATY*)-+JV;bx*rLLLuNTn zSzT`_jYkRULqE7LoX1mc5q|4``*UU}6(;H6pxZC_zKPS$Q|y+j(>cQd}FDW==sWXxv5pl^mkjGo#@hihzxXj{R&6 z=j^g#6ihFcysWa0mt3WLP^d|vMt zzgz0`3mXqmF2DRxjC|q}+a?Fkiy{%I^92`&w2cL0Jg*HA&%#}#TQrpXVRi%C!Lgbc zM%d23dFDe*+Ji)oprK_2Dr4lKe`!s?^omDvUELiPZ0$$8vUaucNlzAzWUfD?icKyA z8XH^SYU<+*99=|ZONt;AVr|vJ4xQ^q8mL&CA*riwn~b4SB@!Phxm8gnPE4?5I@t!c znw1Ge|5NIZw_cHK<4h(KyEbX`hKUv~_U}e9;f$P=e&+$%U%#6PzNOQ&J@8ZOrMfSYUQ9SWO*n*lBq7 zNYy$K9&KQnlpjOihdwfyeiXM!ZVL{zQEN=$#bp7gOAN7NMdZQRH67FpU2mq{N_*eC z=LoY^(SM_NS{qd>n?xBW?<34lpQI%aIC@r!xxiAzqx*F_INtLgS1)D0{*15YRh%y4 z^eJHyaGEur2;ibG4?7A<-P*I0E}UbQXeO++X>5gn5O|LF>H=ZY8i@C8pv6@_LyE%mc{M-*bcm;dT^GiRsXtFDXYyq&!IDY3Sj|6V<$x`KMk}>O z#*N~hnQp3#tR+SH(5BQbw3qk9&k6XJVlIXYID6Mh?(MGX{}g;a?=-_Vy*Sl*XtuHuVkX_Sf+~oZ>=#;Da8Sr_AsCW(Uy9oxJ%3cSga#K5t$CbqSab*7 z=-J*6KPI*vmWa^pu7{vDJqITxV-X9{V`BbMhOpe+j;PScNqpmo>+{VCM*c}8p>G)%#w_>e3179; zouvKv{`y7i*MN5-5RyJBCi1B&P@1yTw*G!aBP<1a$&wjXmz7Rk3n|v^RE$aPeM@;+I>W7KI0^($hard@5UpTY*`98dIg-Tr z&87+_^X$pGqk>`1?V{C&kfJ9fUyXIpm}}+?5a^?ET%@sFg;2xATIF=;G8_?`V1QfD z^V<3Ky!phJ6Ij}%^K~&OZ{kgD3G_QrDe?&h1bPCac*YQMKmBQ?2q|0<+KAbyRmG(v z=-0E*%r|cXCQ6UF>mg}o6~(i+lBZV^J@V`8JP;-3zB4NFcjz$cpZ^u_J)pciKm7-WtI54cSZXw8m2ja6Z-zGs)$;nF z6@G~bx`=9^JHU^uVXf=Fy#4_dL{QP1%_i!%n{j*l4iKOtRl&@&FCc#(Wf08{+b1m1 zSZMJ-E>#JbFc9*EOF=!$2ToI?-u{lPTuC{Nc-Y>Lzerx)0}s~lFOnB$e$;XPno=sZ zI*j7baT>nfZ2xS~IIrU-4z_n+&-22>yWnBfGylhapDwFIlz#EP3&<+|3y{-?k-=f6 zi!-raGjxJhY86_FKTkuq30|ix6pgq8Y0zhlWq&5ek&kv%~hB(nwf!YVX7A=sO# zuTFRtYy7@)ozW0*bV{xltW$0|D}ncT$}Y9d+hzzYpob)6b(2)_G#kI3zg|!pUfy`N ztpFU8TBO&r5TD5AvuPn;K2*qAc8uxJh6+u=xK0DL?TULpzdAmSrahTL{QT|da>kY3 zcl3*gM{Z$d)Rj73n%*3Z8$_y>;|g1UP;tviy^;_)>HRh_H&w2`0e#g3TVlta)^Iv1 z<0{wkoXQwCc%2+>j==E{fLhx_)ndc>j+_8ox5LgQ4#rQ$os;O*2G@z6Sf3@6_r?#) zA}7Ncq3NP3YtCG19jPG2xg@%dHY3gNZQiONlefH*! z{EDAdj5*QhsX>^AbJp2y`EAbl59AtuspC#38 zgS1_8FnB)RDvID=Xow7Hd%X2BZ^Rvs!mcMXVJ*?$a~$<5aSAMs#2c(<{G!(Wwv*Sw zj`H0c_enE7mm&*>^--OQ{zidBo&V`C1B6nG6OGynHaW+x8VfAH2|*|R z;4k*Iu+L=s0-sCQzkP!A+6;cYapC%=n;D)mwx`s7qx8r*aHPlDvpM;J;~eX0YjS~< z8|_AGnX&PXpX+!?(tW(*mH(rQa<=yVk)IBRLRPP%!x76j=ZO)$W0mWY1@XA6#Jq}k zstYox_zY{EU}i?(ryYXArDk65g!U@hd;AX)iFWRP0k+v6n>+1V26esOap3{m9zqyi z`!$e{DV`mXMMOURxo<$1Rq{r?|MTJ&&Sa+75KPq$lVH#_Ax%>ePlYx<%OJgOnF6!Z z+QywN74V9WZ&x;gawH1ra*3vHth=XG!r1Hv7LN~29)Aj!&F$81|A_oj1Bh)}yI75S z7uQ?2ji9DcmpB~7v4O{w$!DP%xwOZQkdjbYMVacB8K+}rsgHoqDu2zY@$clgvla^o zCr^0I7+b{bhR5cmyu9Z`WB#iDE+_6l$R2BphkTb-`KmBqJ|V!Rwb8e{m0M)7KU}jo zOE!u;n!RwMoRs+#LoLJtyytVWp1O8`K zF?-Jkl>`QFpQA!0vtqs+s2aZ+4vV#S{&G4L0Y^Wsd7c*RqR_kG|0=^!Mn|NjctiZD z|Hv1yn#K9{`x@Yh{65^L8afwzMo}r67c1MfAwj_(_q;HRjN~_1XxAxxA5X4qNv8{g zK9gy>82Q03p?yn#H4!Z%v@w>s3g}`E| zAr-APUb^NVK-nbs%e{$LjS&Vac4GrYaPpvI7GmtxNwR0B%yg;Tb7sm^r#A(iX zf?aBx9ck#>xIL#C74&}e>`pbMW!h<1vm3>%PgXBZXg+co0fBlAKs56nuWIO7!kY^N z#mh&0lm%c(ol?OTk67HU)3;W(_Jy+3MMYluTXNP;xaVY3|vE5`#td$6A5FS zou3o)18!#CsFQKuX{qP=#J<7bF0Wp}o)~_qIdr02{qiB{&xAUiS>2pHb+TMdxou%N zKb;BxbQ-l5i)C&>vNkr}jlM9>>lQB6)TN)0k4GnV(|#%od5#2<4d*dg)+iu&HAs9m z)LGXl>$);le7$03YtsQc#S)gZ)}&2zP%#?STs~Q^=m-;e$rvxqITn=mT)LGZ6)wA? znqODt6c@m)2HK0t^+&u_2SQaK`9b5HPwE9mW~<~3cj@w~Hf*m+14s?ZiC+V*walKJ zqB4-A^8cF`h3|g>XaNi4(zhcT+hjh|M5h!F`PQhKUFf5hK|2wtp5usl>Yv%1CNp7g zUnn5@%bqgO!dUx>b`1c4)^%Q)6A|Fc^A|9dD6QTUos(l|GUG>~;|ou4rG4gaQ{_PY zOtxmPe9}jQzv~?cVQV8%gLMBfsZPGpq%75GwUo<Vqhp68j+SXzFtj+|vQG5(J;^5Y6%qZ9r6{@Up5ayt?$W%Zq08>>%-Vb| zn9jH05B+57R-A}1`%&Ou*r=F8FUJ{o6jB5-?g0|NJ#OL_8Tad@+lvg2Qg6Q^(HNXG zfV{QI#=49)vX@#U4#Zu71_A>`C`GX;MK+3H#;vN$R%)3JNb-5UJp9RJ`H*8P5q9S> zPj$2xO2KH16Qs+eollMTIU3UqKD9(GY*9u5KXfpt&j2HEm+!N-tR*k{A-$a@Jo*&X zLXov43bN$TmT<>~sJG+Qi?kkFUK6A+(#q?O$(h^dIUTDop?PAfH?Ql;A~jVV&_hvy z07dO;3xGHD?Ap*}3H)b9XL^v;P_qXeSooT=jJTKxW3A$^nxELNxk$NyX25ca&}%h;}0gC zim(|3YG=_M(qL%~pmB~@1S<$D$QYvrztv0&+z96S&^!uE4x>&;;dm>}h5kKm%L6@U zI&rzewSVOHDh~5*nQd#>(D}{hB2`T6r0<7)WxuFpAqWlAHtsYGRnTP(ohFd<0E;v^QHBN6T4L=( zFc*K6vaOLt$${#0)hJYc?mBWfHVXi^qWrAxK!;#}aD{C|;6>dtm+T+bfb z{+3_e_HUtX-u+jQKwfL1@NS_cAgKK@zbFcXRBO7)x*q zC2vk`r3Jlg&xl8Mb{f!SGqcgA06ENwNxdsG;U8bOO_;ZdGAy`AW4T;ttq(m;rQg2E z&1l>GEyVm6aM=04bH_p7lDk6>(%$vTwLefRUt~pQN^X$A25A7?-#^@jIGlLE^_{lY zav?nX5NpRKb;MFJ(6_r)-1#dcZb~hLlLieJq{`wj63Fv}@Xrn*Ku1Yiz-cA}r0+rD zhLA{0xb*tEQQdC^+T<8<8UZHyjR;<=$5?6GN5|6p>c2X*2&D^=H_`~(cpkKUosUk& zt@;dxjJY2F{uaCD1kkr-FaXeNvHPqtCGCN&4hT}m>5J6 zCv&K1YZqv`SH84u!mi!OF8erL5Zd0(7DAKwSe#E8vqSy({V9i?bJN*I+gD950^!AUpi;!TrzXI{z6quDgSPZ(c>E z?VtBka|!1i7J}tS@`wFO7S+m4f;b5(n4PIPq(#{3{Y(A7`b~{I+GIcA8+zN6P}K{B zo9NiBY&4cy2AXQo`u6Fj_|b*K8z+-Y8N(236p}gyWP1PHi=mtWYTt>Wc!G)u!=H8J~gH1K&L&ono@=|obqh#L-N@sNl^8x$O){>bc|GJ4^XdK5i1 zVU|sH_3FfJi>uF-=(=C|jBpG~e7f^AGrY>pyz1k$-IQ=Txt%c@WWbsm(s4eCmx@Cv zg2Cv6W6@Y4DOuAS)=aCPCQxyUWf=9lSUy8oGA`lyn zhbT$0Z^^h4Y&$v)H7wQZvd6ao#C!DXHqA+OEB z(RS&#lP-AbSeLoQ&Yr2wQx=vw+uF^IO^R0wf60;*|62T-v{!5jX(Sf6?Rgj2Dv+LF zfYvk=b~1F7+Qw2O;a4s*_`_U^^?-N4Jo^gMbNNiTU)+!AyZz;7^Zygg z44=uHIsu1Tyqba)$b?Z{rs}RnA_kXZZU(j~;`A52tlXcoMe*r0GM4M|IO^mnmPC6HP_ z)ih-vW@c+1q;~$mAU*G6_D-r{xgIp_^B#Lm`lfi>m&1l7F`BNPWtV-DP zdb{}j5>)te;KY)(qRmDc*;WxTztfhueoLYzP(PUL7iBd|;2T}6g!vAX(h6wtQdhf_ zQ}CGYPUB&}9tGJ!(qUS4EU}q8JhhP(BcckR=-9_7JsB7nrhVUnuI{!7ea!?@Mb@=> zr0Q;Tuw|%RKf4vw^`&;;%RhKJsxB7N_D6u+ggp%p7>T~P(qbTUK<@CI1WztPexUv! zM>yt&Ea%6iLRa=P5c{>M1`sq$(SSb0M}tG-oOEW|chjq|j$Dn4ATPoTdFDU*S_pikbq$c(6u+75GI3Y@`atZml4!AoVi-MAmi+B=-Nt26CH=Y=S z5Ib8B_V>s{=()<;jDVpadc?|d*y*0c$vX%v2`0@_g2>2G=DFr)$lZ{{^=AK4+=tw zm6V)k?DB?M&{-xOUy@6|K>4(M<4SN8fDozkTg|1jr{&c^OVd_bVbizqt`D!*)rsq} zyJZ+8oNf-lM*;icwN7SKo(>ZG8)j#ELM~r+EeP)qPjFOz?=efZjg#TDJ9&Dpi(kL+ z(aWx&!d_C4c~{>m_};FhN45*-E*x^o7vHYtlwq63%Kb@+mgU**K2z-wC@mFe>WFAs ztLR*TMd_Kn`;=GviZk><#q%58AqEw(N!=ivk)KI0lw>{jK$BB+JfM-8>}yy1o{j?t z9&Q(hh+yN8wr)y7IFJO6$v(|Ye?U*4khhTu%5n;u3es=xAJCtMrO-d;QgK8)~0oTD(HE za{i996QcrgXlj~k)OFNMy_9NlT(g8Q2DDVU8A!WTfP##TkYu3mq319BCAfyHyJb%t z$uRxdoI^N3TFmGSpD_J0UD}%W?NnbY#acOxBnMY(K|{9X?hD}$cVqRGF)s*h7j&fs zJrll-%HYTii|jggQ{6an#+L5H5^rMGHYf&EwTvJ^B2Ww{?)Ykj&c_>!gp*R!|g|-wZ?(P~SxD)~ecQ5W9 zXem$j@do3g8dw1dIJ!rHV2Ej5x3qE8{o zc=)6cg+puEP>&gOs|P47C{!BK6e9noeJO{v5U4$Wfr@sTx z`&ySMnkV(dr64~|kwLStFU8;`F2@29HZti6SnvyL(DMs+cG9``FH?u+rOvd@Q4p>l z9amJ>{nX;?tC5K3nTWDya9ALGWTF+M(P`7bT^F;O9}4B13^|eu*Ti4IH$Styip_|) z5QM}&dkOZ%T0d?jJ(Sx_!pwr*4g21K=&F7{n)SNkKBr!FVvMwC`U%an3t#3zlXJdV z&|YyUw~T>U#U+HO(9sC>hHWi7LM;i&|$GKPA5E9KU037-k$ zuac+ueT#&qysphY*E*suADmmec*AC}TVy&2WZp7zNBGe!I)P-R4!^CMcI6Uif{$>k z9Y{2b!sV)BPsTpu%!cP4MgS{nAXmmSvkS^b_>tQ<^CxRq?#{rN2JO{KLvt=;b0-k1;>hS{Gr>YZLArdxZjem0b}F77UyFEm;u z1Gp#L2eOb$QIfIzq+N)UUk~J1Xk@&|6aj0R#Vm0m0R|pqpz|e77!#+wDmol`N^fdP z_`Bjy&xwlWYK0uG@Mk@f$Q3M!6|-!?`;#)*quA_<%4b9AM%$x0CeSHeW#WGPv{eK& z0ass9RzkE2pSDI+w!&r(Vz8JUA*7|EJRhINgxVjAtlou1XZ`?CP#kEHY(a_*7TBA2 z)}51GkZKh>{Ap_><&{aN%(10w7nPUAqXgu^D?7U?-hG8 z^+2U431S`{jO{9>^H8O5L8zQkc>b?|p&acSqUU0=tNJ}#_oc0$0xau)-YA--K9m~& z)JJJqO!=x`)%th=fu}7|$E^P3GBiB@mi&#doi3oS8mw>EF$;J4q_ARYwghMA`v!z4 zz1?3jsUWA3`C#O>UfhosKr}&uzP_o3tVexS3)lb5w8oPYV%EAGz||ZzwG#eY%Z!C5 zJd#3PsEJe97uO5=&YHlNebiF{FB@);3|@;m-=VbQ0SKw+q>w$7d~X5$Rr*`X*}@xc z2=0G_sR`WF^j0#xWvwlGwgULRUz!gSnKzr^H`J1cC<=-HzM0C6_lN4+Qkgr#_GcSa znwLUbY6&bQ{A!sqJL1)Ahjq?M<+DWWr>}${IJb?kVgq! z(i-Bf?t^ozL~PlX(-mQQ;~xs4xJc^1Bzs!QNeh_qbUMFmAj<{IyoT6H32DSGNe(gl zT@u}^+64?Un5!RK#PPwT?C!I7Z!*4)Pzx+(pK*pVxQe_Yk$L-8_flAf9g~8dxKRii z?;QNeus@=d<=VwW_4|~rrJ*&8w#;yH_)>H?t$()>05BXRd54s!z)$-)P;nhM#g#Yv zzPoX4*Qjbg_B1<(NOB6UJ4u7H(@jDYOtz?nSLDy}R=QmTPr5i}yp*;rjGmN0eh3M9XB+Ju z4;hubQ`kG?=C46&S>^}8IEO!1i&28q&?B_*a-%$SF*ropW7Ae3fg1o!bxy9ajm(F4Py#Rb7 z#&Fa5cEH|yjzqh$>Mcnj@p7^p%P)VWgX)$gxpkEn+bg^Ajfa-zQqUCRM;7iAmO$%#8k>7{na4*ta>u3*bOhehVdk+tgnH6me_$hQZxBvzW_H@& z7_aK)T*Eft=S#96t%dvm>!@33O@DYKR&$NpD$3&z&6OJ_)&dIM3sG#A^^4d7=I~c! zB^v>R>LA-41=g>}q#1Upp_JsgcFEs_{URohb4*t6tqmov$vh<&3Z^wEq*HBB7iff9K z3EyH*r!$B)LH32nM24NkAi8}dGU|x`tqNL42;GH4In8gDqm*9Y83rTsV{M z>0Cas0?TIbI7(W<_XHNXbCT*?e}?`0m@S4F@K|%aUp3r#B+O7Q7=*i=fTvH}ZDY`R zJgpdPQ(;y<63az*s4(YRrtJ+oX2#m4{XBrfR$kTI63tzIt#L;4s4b2aRr{FG#%%@y zWhic+NR$Ya0Aeo70%kk=J*>hva6^NSE({?xs>qs&;(r_4We9;8AlVf&Wv%Jl8i`5u zcMGdfI+}X=)`ZQ+ldJh>QclXH(i4A@2&+ce+6=VGsx4SW;EzY-zy9 zJuk8>MpxA_!{DrV+rUw6Wuvc2z$&rlk1+eVz%RI-v+F!N?;+$H9oFL=1d<~@m z#5O|!byf7u#827IAs&dD>E^ZF#bZdRBRO7%EL=3l-NBIKYdQ@8(lB85%gh$*4aiPR z#nA1)^SS?v0_(qOu>Z#o^Y72{cXy2eiX(c6MwLeU^NC4vn6^Wws0HlrcUfWCwBslu zECVp(tY&l#I^bo}1Ox2QE#0nEVkP0<8?ry~A$ip=wSM_;cS-;b*?c-}72k0Ivn=uZ zK``KXbv-d4u6ND^u9H=7jJ@2BQZRqh*Y+JOzH=O`CV>5o_pWR944rWf_oKHF9G09< zrruMAat9d0yrb5^+0>38TPo3VfaRqVb1U#eDvYGe<2!dlQfJz;e+k$42ym0K!n&iMY%DZ zoOXp3J3~Dh!B$X6JP8-Qfz&uT-ufm|m&SOO#>ESP?weztC5VyXIb1=jZX$25MLNG} zG+O0QP21sdX7C`9CccL=4W78G^fS@l9!V&=f5hNwaY1UykQZvOCnPSh*=Dl7<=<%3 zs%sO0Za|abX!?=8Y8Yagy*2L_$9IIwVKxJsbnFzDhG|xgCd-3tZwsXo?XKF2DIcHn z-G#_OOaqjjp@Ly95gJcW{EtSw_V=p76!Ohrrb@3JWyMAOPE^WNNRQscaQVmXs;Z;b z&2FQLebZofHP=VXyuy65fa68ypwy1c!19~{?e|8H&Q!(ek+|ZS*Uef>21^$~tBc99 z5{%8;I(eeR9(A$Liep%}K9V1`5vqm9D2|e*Z^_HS-w1PaRcZ!}uZ{>5qi)YRfCslb zS#fh(lS}p<&@F$~55*Njn3_Y#BP*M@S4CjoL-j zcE&`>P4H=fK-8K|vvd{lVO_MSr-3&Ke@k)xGR^XB z$){u^BAhYkZtN!S6%cBM?Tqo!cLBEUwfW^~@*zqT>W`)0 z12IJ2Zl=Om$E_?)sl$-3Dfe(yz{c5dPY#Z9JOI_9qZb_;O6<%U>jop!&&WsphLU)a z7U`e>NTbZE^8F9hH_!ncZFTmn{lLX4ku`rmFXqwFD2l z$kv#SzmPuBd^_LFjXdG&!DY2o4ZG;+u2D~do= zNI}&{^SUmbI$Cw2C46=UkY5n3PK&G8EKbGRddoXHWV=kR_k(u)ulyaCIuqKt7EZPS zoKhLsd z#*qHxJE<6_8NWe*A8@X#%|t2A$3o7K%p~qziHxxeNDp;um!7io=97v@vBPVxR|&HE z0(VRq+a1ZwFrNc!NT!#$Z?4$q@LfRTceoDNkyHu0KE}-bU7ZQH6n&T!_vy!+-=6kstiDG`c1k9@7=PwHyCO92kEo1cqxf|@*k5wyAk zjBmUT$fDDa|L#9rf3LJw3`8SMnX(IT-37jv&40j1L;wb7Es9KBDqe{04kmBD9i%Up zi-op7x|?dKDO5fnl70Ty-QZ)H6O>}AwIVShNhPC(1~?;fk&O{a!F-8@v?5mikJfpW z{K1{3(f29M#>fs0q2ng7!A%E9@5yv$|&-D7=Jw90D`OJ5A^c1(Qa zxNJ%`iOP4o)>j^Ocn9Sl?uopx7TuKmIw+)FhlkI|*sfr7^1-3hMg`L6r3jGx;SFK4 zG`$SQ6Pan3v4k{|)lB11sBWTqb3|BMq1`ZBJtHQKJ$AY&jeobTeL@=YV3q!t3_*wY zCw;bffd1!ulDz0!{ey(oc|a$9ME9rUeJRKLQ^W))ApeqFxGrsu!aJ-!!Np zoEVG_Kx}!9p>g4oshq>eL$O<5lXZ(LI9>Or+aq|+S_VS2w4w`_ad;_-&qpW_8(+}H zMBIx~GoDA33>>&U(sv}S_V{9Phs8C1Ka2)=>h8-1z0_R)gLGf@`H5+gC_Lw|o9hGT zry{U#Tr2M>@zjYU|C1`iKS;RA7Z8xPb{Gk>v=#sQRW=|{@diWDjiI@Uv$9-?U2_By zvc!fGFQgszLtZKD2I>0;#?M5f#oM4$Fo!JM(JDyY`zBe*c8r^Ulu$(Jmw`E1Xj>+q z@E1e>PQvYCUwNcT3)bxdHX>h~=m=FGiY_FpRe1$6K;o=S+dMl9w~(ek#*Mc>9kSh?+Nb~TFf`D z3@@9H+wN|^xf_u#Vf!UQFe;@yB$fQRN`MU^N5XPZ9Iwp0kOsbORLxNRN$IWoWZIUD z6l%rTKSUL@khw>_)ge%wW~5W(sI}U(aD!I0!5In_`~#ME2Fvp^1-S-!jW zv$F+xCjgyp!Ec~=-Uc5I6^;@P*A+VBq>x1vW&RF|uV@|tt-k{#JB`{YhwiDYutL>D6-fs$lEzUKp8;wv;m(!}?#1$0c4o~wUCR0bjABA8K2eH3l72dW$w8KZL z+))H|<(F@$Bgckq*J#vA(;~6;Xr+X|B%ft)A8>!x^Z+e5FWtnIs4J$$wl?%RQz@{{ zAluQL3yiAXunf7iU#A_Jg--bFu&k`-VmaZCnL0OT`t!&n&s3dwek%L}q+^G3cEE;f zQfQR(T_c^m*;&~c2MgfWcB4f~z&(rQO~I8>s`XNQrYQD>PR^?%+>Rz%!x^u3Qopd- zAO5q;BT7>v+AZV$sc153SH@Id*@aV^C3Od^$T1&uigPO{J3h4wH7xTiZuCt#FUN4% z?s7NCzXg1kTu>y@)~wp|QVf^FNRd`OamSVvOix{{t>JvfoxZ}Jy|B2zjx3kmTgv!% z`$@*M{RTsIajmBHr2kdr=g?oU(}1*~ZWJ)8nGv)(D<7j12EBF&Z2>{D-hI)j`s8ph zc!qhei66YVMMCt!-yG=8D7rZ9sCZ~6GOe~kIUPv(*%nSdR2KUuTys+|^{Noc+pZvc zQiT#+uuhzeOQ^4jxOihM%%2$54Hg^a=|6tdoS<;aTxam^j_O+X#Wl~WaLc5!2W5^b z*_e~`k~7L1_M)%J_bZZSa_q1+HRzbOqO`$~0!&M3mDsi;f>H6G+&WSzMHP=x3F#pI@E4g0LBJpMK z-N=gFv|cwK5E3eVIgrOKC1>hihem`pQoIGC}k z`-LQ|>vnWn09K)~b1~{Zpjkko!{We0Yu)@6j$w8ttV>|q_UlBc)Ozg;D>tjCA-xBM zFq3c4@5;BK#83x~+Z0W*FQ_pEvYKn`0R6oVI5e=e6u3V}@1))H$p42n=7{+FWNWJr zN1>_SagKJnY)E`X4)U8J4H`JcCf&pA=3@xu;Was3)LS8~d@gPOWKdElD{5G7hk6C= zfM|eu(E|7*L?gc+P3GHyD(2}=fxm8HM0;h*Z;P(CJ^_z0Xi}H>bl(DmdfwQ)D?eV? zYpU<$l~5+;h^x92EGfGxRY~OfGu%ENztWF#!N?tUYD3MJpVg(hXC~~IG*5O)b*jMO!g0HvVN&KdKL$ygLw3L zT=;&oO1gU%t`4MGu#YFSrIh!T&R3fq8ZruOGW+jLUxj8`AB_4bMvmcef3REpMa=7;lRnzd@~8PdaLNG5pAcqi_9w;$6>ci7(x-R9Kgr)jzGqVM zz$3H+e^k1KGT-i-1kDcX!Gw0>q+w@c7viMYj0B^7kOo8R3ozo1Jlz5{=J;AEi>U(U zK!g?JVvCg6kv4&W#Dj^f-GK%Za-ZQGa+e)~t`kwW|8$`>*5$>7TGSouDVoL|@K{b2 z24Tb^b8(GjSXn!(!`hjLV; zcfU4~ffc)A7jAh6X){d+$oB76a%>rgdc`byI?6!MT%XT0rR`Oj^|v$+^UAKv=y*8m zLQcCeuW?rU0VvPRm?9opEkriC91_2^>`kqOFYSY%CaIOLa@RCt^JD2E`cYKvL>9rEC(dv1 zD43aAHXk9yQu4Z>b%H>cZYi!rH}r0*zIE&$M27g-vTOZ5c7{425Y+tim;9oO&if|n z(*<0+OD;~I?UN6j@d;BKHsmop@0gIUv`r9nc*=6!_Y+ylk>|5&1@u1gYy~*1i%4(A zzmIA~td0;n)}qAt2w30#<#$bO%5w|5(_7B|Y960XHs#6RghvqMYmFix+I3v9IIXa9 z?N%Vu>V*XgJpmyM12j`E$QT)B`w1ErHrT&rmKg<`T_y1&7eA-6)5ptw6R4!EK7#R9 z9^mzW&*UI|{6_B8_`MoPIIK)TNLOc)JOp(=j>R`uWYtdmj{uA^2S>YA&1JZ002*f` z(n`z1*W>otcC(Gs>Ftcp4y1=d>;_$IAT9@m0q1!F?_(LYYoU@v9^5I%{-jkyuoV_w zLtG!0su$xQ>K8!QEX1G6Xl*HAdAgee0JxxWG}Hf$gq-YzIBte)PM~kOh~VFUJF=JW z4%-0!kdVG<#lsd$6X`1(q$;egW73-4{O_te<(}#F(PQYs<7+>Su)DIztoqV&Ugk`u zQVhmn>vUE(;+K68iP+;Ih1h-sA0Phdc~~)F6TOknJ#FEAM?r2wu}fNhP|^v@k1~uP z<*fA3($`qteT796h*I)zU$xeBxXFw|DudFO-Y_#I3dN$NZQ-84^h<9k$HU@~7^PUf zv^JZZX=zaxGW$T=GDq$;Z{GZFdIaZwZJ`)v&DB`*yoM%pi26y$V#To2 zF}c}gnxRfJw~L*hzxar&CI;_qeply8ZcQhY0$VZ|KYOZ5OOLwyL~^H9&C2K|Btz%} z(rG+aU)!4A6fs>}O)@N3sGI6k*118ayx`_E9iG--)ZIE@Q%PT%K1=1yIxktC>>ghl zCAzxOy1MuyI?U18fx6W8Hs$W2M9J+bMma&w>Q0Xax^L^w{t!Q%kXNra<6gsM17M8`kbtn_4_j zb%P=Xq+Yb)-6cwF>91$3S1`BJB484H_C&SWIKxzA^PZM9V$-LpHKcy)$%YVT7Xz_Ne1*R0&0G;Zf5tLrp~DIOhvV#t0M~ zvAle37&keHYGB3CTxc1>l&Py7&hdlP6WhS1WriHHm=OG10)|aqZu_?xf<&tvBVBiIaR=Q{NLeTjCPLIN=QXCt+kCNB!Dv z?sOKm8d*-JhSVwCP9Q^{s38FUF=Q>2OxNheH%60@U!J!P8{;`_SWHgEWCAA*udMH- z53zgm$)=~RSv!b;padsSG$ySjy042sC0GnICKZe)m-JJ8WRxwpf4P+%AQ^#5pg+jC zpc}~c>)TLuFNC7<)z+8M~f!7O?u*AO@$@~oI#bE}jB7eO#^ z5C`H5$67FH;cy0)Y|CK-f55mmwF?BNs_aG_m{Kb-aJCr4<3*s@F-B8eThs9hdt&S$ z?W+CRFCK!Db!=rYIqmI%wp!}|u1wnV=u6tAV1srZxpe6Y^ zDlcI_oQIZg*i_RDE>8^7S`X)ertCR;d34|>`Hgq)vg`!PjiV)^svKGT_^jrC^8Jb8 z{7~5FWB|`PdW~qYVxT5`)M_1m5*^!tiL~N?)keK-o`en|Y?u-n!pzdyA3<);KLEGm zt;On;kmaKSyCKUWpB~(q50g3-9l0xS+c?wB=0_$*%%xQR`1dt!zS2l7O!h{~Ue&2| zKg>^S^P{-RoW_-FX5yj@8=axRq^E`vO(G27+jyT0AP2H!n<%z_UeaB%4I9t(pD9b$ zD+K}V^+z!?yUQ#6GsLQ+k*AWhU$!@s<(UW*=bR)^Jy8klOw@0Pc8cf0M^M7e)aUr5HU~f=lbPt1D)ocQFcX<_Vyxl3vbolRBSH6e>7xvzHm$Px zWvJmYrokP_F`fAka9wtCOyW&-+G%NJGtcCR#OqEDl57oTyIl1B?Tl}f>1dbJJe+~z$r$@E`^7B>+dF(Fi*?3h`F25l zNe6MOFsT!te`q)=n1*{m=|WjR^akQduDCMbUy1|eprH7@B|N*616n;J+pXd&$?&k3 zbFJNVP-O>n(Z`0j1;1t-3k1Ai4z?iH?uw1R&Qf9%2zrrs1MFj^J2F{N={1i=0|--uX0p4 zZ&KEoS1UVd%7Vq|{A=7G8vlOWw0C2FDRk(^4mle{KQgt`KpGC5DIk4}^r<0ZpB7YkCmMgF6A*i4NmiILK_9+7cV`v5PZ<;V0e~VVo9U!5{GEf1? z>!POTlTv-QBGqc*kDV=n%4Mz_# zzCu|on@xX%b^bWu)^w^v7e4rsoO5!)`1>m@j_hCli$x_BMy3-6T)UZG|=&O`7^r9m`9>?$$G*{k0GC4Pl2|@fwt#N-zS1Iao z)4nO5S^6AIW4nP4Ij$s>8P#KwM2N|83PsnjDzZRn_$ zO`+@Zw|~xR|8bk?sMg3j_%J&r``OZ>!zSkB|Dfsl|Fdsu+WZev-=$bP$0g;s9+%05 zTh5u%-|#S)3m>Mk^=mKyWxmim$BG3EDzNYgzZzk)dLJq%(S@m7rnbt9QsSO}_ro;mva1&9E zxE<8>0y-|?L$ngXjZq3G@Y84->8iA~`mmm9F6X;o0#7KN^U0ne#H)GPNWr@;vw{7M z(jOnmnviYramOEx(g3#|ztUvV9J?~Hv+{P#F?ic@i*35xM>G#5z#Q60W|6T>>&f=&7ols26W(Aq`x?+~-Dl@Mr5LwH0jmL-J3>>C`*Sb;~{BjIA>= zrBK#hcgtINy_i*dcDklddM@jAf1)ronMSD0`F16` z_%8%5Z+!!z(?W?IM_n*9O z$PE)Xz)GjCDAd-#jg%tx{r_`*R=XfOfA!Sl}>?@kR`j}zU;K^U)_u;1|vaof#>uH$H z`w|1QT87ABa}C zrcm(u5-0V#n9jiTKF$2-CF>%Zu6kUUTyXEI{M^czPs?7;CIlWi?n=YcQ_Bb2Cx%gM z=1lsp1Y;t98;mEb`dgg7%9{#Hgra6zbZ`V*;med4ChskC4IDBTEm~0W z7HT3%M67uz`T^|_r?Si$SeB)AIfP33lEj(oL;{y0?a(8=c}GEmiwpN%MrBS5 zHqL4v5|M$asn&-JMc%Upqy8 zJ{ue4b^2Q4L{G4%D)$COyY}sBPeqT-Ua!9>g#j$|_7sCQV6nia>iX$yH%s37w&m}R z3TT$QP3_O z_mgYHe7h?Nt?xef{@?=JZmFr}^y6Lm9?<=X@^SOq>?|Dq;oN_SNG_yBf|*@jK^O^h z`)(Y{sQPfnp~?^$$a7d1XqV$DplBecxZ3DHYhA%Lx6yU zEwIdGB8vF9UHw+Lc273yL-A=@^gGvaq;EWyks2pU9k=O9{ybn zZFs{|j-uibiVj2)621|-^K{-SdPz<#Fr!CadX=er!%J0s?3F{N&@vcbnUsPnEAKn7 zVH?P=$oGox=|I?;I&taj$X!b`Oo$`a?s|t-Gj3)qjNaLoP4=ow-{5>rXP7Gv4i>h_uLtKz z$NX2<+mX;U7#)=kN0Wf#w%|5#Z zW(P9PyM62caYqzndQN8gtR+oZzb8VS#v#hoE_C~Qyna>gP&swuHF`{qA~o?Z+?ORs zrnDp8(4WLFP8H<5GRj8N2Hx{sQoT}$U{JXh8358Vdc9Vein^(-H`}8g@w=MCy-F?t z)!whQ8vwQ9G>Dw*K~V!ir7pNOGlGUNA*JZ|3-mefOV}S-$VHo3m3vE?S;UUay&g zkoDpkh~#OWGM4MXw^hJ##rl1&+&@7taxp~e&cz>`yp=WaUcW6)|Hj@Ke5_)M5Tuk2tgfa!IPG{a?L|@GUd8q@6Rt;ucPp(e8l<%v%;*0dv z I|*%cX4kgisR zazS(VGcDgrAFO+Du^7`>yW*l-R`oEn#UM{2et9H5dG@2eClzgy$ZN$*M0y-CM)aLm zXkQ11>MBovLln(FNb^v@b|}O6CRDoXk)yEae4@XxxDz6uFw;%`Nh7T9)HU>cP2BqW zB5U?0e$s=ILwkPfcd8?1I@&-U0$Md3kJ8qzF@$VqnRBHEwQ;x7pB-ng#Y%?D$0-Yp zS+aZrdx}19h(C2z0Mja`cS;uBUMiu?jDTyqayvcRH6V+#0owCBRh6O_wfl{n7hpYi zd6?#9&o=)+piB3o3Qq{i(yo`9r%zneTV(GQ zJ7ioe-657nP(b%*rAsMa^Zeux*4a%9F#z!3AAEa%U!i<~Oo{A`Yb2l=$~0 zZ>cYwZ^UZy8+rM28udk^eJ$XM1}|;^sSpsC?Hte1U0K<~%_C5C+`m0Inj!v9&}p+6 zNvnz2Kg+C%YpQv6Y5LNPJ)bjg%U;mfeglk3ggn?UBj1iun&fU2=QF1c9!Y&$+{3w4 zIVNXdc%Hyi+V|>X_D6%+UNxChczKYsy`LE!1F?F3Tc7H5f}E;2kei#o7_X{mv+4Sg zlLOpRq}4`tcpj942CCyL7d0NIhobn&>#XoNLDmx$>iJLY$ zx(7ZbS2~Es*l?rBSmt*dZ^yDTSvofp$hy4dXViZW;t|sp`J^R=zGUyI+V|Byv%p7~ zj|9=$*GH2Mj}HE>j%FCT#R^dvX|?@UHDYyi6Dx$nXUPX;SF#t#`YvySh-vZbZ*<5= zzOjdOx2VmuT1BS({;;ea&-Cik?FXviW`QkXUCLonS{L$$#@~F%Zu_%`cv8(aAFD#I zpcCZC6?C1pmJy!QcfMiC?yWcUZzZ=M8I{qPqY4?ZHQP<}SSb|ikWVp7;>-P%D0eK{ zlxJhX92FW2AHFCk*_wg%|tNF|=ac4VbZ8@aDNHJOLZPkGk%SVgR=f6AIrhTOfL? zAUKvWeFi76HflCB;e`7?6v{uwTaLs>&t}x(6iqrJ`W+{IMP$pGb()dWirNa0##}t4 zJbARSdv)ITa3kHq(+_UXyDOd%ET|$Xh%{GjPi`cs2vPbQZFJvY=Zql^-DUGdhLvqQ z&JW9&xx2?}9eDg<=cq2XBEV zN*;})Wyh7ci9)KcFj>TUmKA76pxFok4fr*MiBo~2B_kk&+)@S z1^>pBoC@d*=6?MaM#h`Ung<%4>g`F`A^eWT=+V0!nt)yND&HugHqM`A#)j#FMVy%a zRxWBfco0C0j=$EZ`;o;K{q$pN(P^fZ)7r1^s$<+Kotx>J-}WV}se&bmrhBbh6|PEu zcoa^PJsEe_uF^Vax9FC3krnV61twgn;@P@h7tg2~21dHz5U7 z_;g~coL>>$U^~YOY^x&YH|_Xg^hpQY=9)}Y*zg^nCMZ zC7war+$E#@0D@YdU(ahg$az_hp>U4_8p&^PQjvnn8jIyG{6r&apEiAz(54RytrQ`K zIUq-hK7$W8Xh|pBw|NoF9F2TS)uq>blG>@Hq!pGp3EGKr7|nwMg_cI{Z;x4C;xvlL zZE(|Zwnr39={=NBooY2&!L;8rVLu0R zT&Ob&{)hAQn`qF`T)z&_XEcAH(CR2q*Hl(`dkk}n$AKPLfzud?X+u#o6h z*hL@9#?rn|mscyeLF)WM<+8Z+I|>UEm+zDyrN;Ef1+gSS0ke&~_VGmtp(-OFwF8km zb!iw{S1r%<4@#>V`HQcw)iu-sx^02Y=889!k6CVQi&aYdX-(1Pb}ePiTBsB#B+_FbyWpme`GM?=^e@tT`99J^?+3# z`D2OsmWXH&WhcdP$cbSbmAm$ZU4tnNQWfBY0_U0&6-VdXL)vYR7-Xy0w?+P zhe@K(T{q1q2P5}kX#0eC`C0oHE2=X*^Lofa0dsHq*Bbj*KStNtsgBq+=|f_dI6r&~ z!%dX3uM0{oW=eKGVM1{~$3`M$fed_SJR%s(#jzEc~3K#I62Gm{K%SPkkuJlBVc8u5B0Bo7@|FNvaa~Kz<{ur%g*^4wI}u> zmZG!psgH5RJ?a2zyid`UyfQmS&nHji7xVE=wYPj)p-f0fNPfS8GxVwjT!QP-(hU@h zi|y?qQ7NboXJaWJ6|pp!>4}68(KL;!J#Bo=hf1T8SQ<>pP=~#>HoE9k3U$dll3kek zx&C7Kvc@fPMxh6}4SKW`Mq9D%mPYRvQTC+zFY=hqm;ykjSlR%KJ_m;WPG^ii!15A7as?@xCOo9@uPb+Dt^j>~gG_JB zSfXO>>R}thKqbuBG(W4>pP`Ht01f_E4O@n0g2QU@iTP_R^;L?L?>eA~iI;fWw3?rm zefz-Soge{;N~-!;T^D=qnE! z2beZ>9P3tRh;2UiK)pl|Z~Q>H2b-LkA3HSEvRQ&+JjZ7bBqjRo8klxS#Z4orIO~MI zgQTrCoiVILQ?6VE!t8V4`t%9~#eMQab67+7yxkVxfcaN}_K1B_qQ6T8*uv#@1Sh9& z6__1eZhD9W>y7H)_pVZ3XsGyZQ8cd7LWYL`@1V(j%@3OP313(hJnFGgVCG)Ec%-F(rSV$I#Fc*lF zhoA#ZuoRz8S0wsxGbT>GW9`~twT^m;#)D#ISqI9g1so-?qShclKfEFK#F@%_+yURG zIy3bs1}ArhzmZ>(n(IU|8Shib;G^9az$_MdW!EvlW@=MtI(eH%)`Ow(bdZxRNHpZ( zXs$r?0vmMX70~K zeaGr7Amqt(F>c!ho&1?xZ|;>Pt7WAmZniwE*}Qne3!{L#OgVtI3PMW47&k_IdKZ>+s#R2!o&Vjldw=)7@7>)G_rsjieY(1w|5$_yMJ`Mh}cfEahbdT@JnbdteUB&(fYc?BB^uohHDaQo>Fi?pt4A zF$B!z+rdS0%{11xCU$DAKQz!`YT;m7Nlbz>ffb7JaeR1RbZ|Y5aIlIOBqHzmM0-D) z;El+ksor#;CN5>{=e2Za@q$4BE2ix1Vm3uU!S1S2Gt`?jRM!5})k$%Y_F+(N%9kvLl%w2N=< zX=Ur_L|0^m;?|e;_LQIbUNqY_O70`VnEaj-Y^CbwLF{}v>I?WM6fH!5q)N6Dp3VQ+ z4%R?iH6v%u_9}m>Jr!qoJCEwkqM)m%Up1t2;P3a`xg?qtqIaUzZ}WS-jv+jJIzIUt ziye*RIGPw%>#QprofkN=-dyyG%6MHe$s~6g-MBn$JR@S~OZapXe^Apt&tc!UCKVS{ zp7o4z>c6@s3<3CcWy zrQuS3o9t^Var%*4V_E0#v*O4$-oxnmPXw}oaRgxr)#c-E>>%^owI!j?D~9`hZbKa zV|2EI8`ZDf3j(IHzkK!K@|N2baCgy`J?C%Ftnwy-ra z^KIQWg?PGYiPD&nH$-**U?GFLml%0g?x%V=#cKgmQrz0LhxFUO4@-`Q3bsaSn#ef$ z--;IyR;^_+-j(2==&%aL$j{SYdPOu1Y$I#+Fvnk?%y}aa&j<4~I_VJD8uux(*VG>`z2W}gE6J+Geww5Nr zinzIf+btm`iATj{bZJjc^v=pa;m>313(eo@Eo;`a6&%AkDJuheuq+6ts>`c7A^O$c zM8lMoa}^yj5EJ)wYJG>VN-%KdP+E$@BT@rKo4}bB!6`F+(}N6$UqUWFv$sW%%BC4p zFz=p(Te~CRQbr`>a|2BfYd!} zYK>~ItH*!dW+b-A?*zU#!|A^4h*klSQ|{s`!nxbb37H0t6qEj6z(%B0yjyZbt#PNO z?QAN?YJ?cYIbXQo-P_#N@|=ZxLGyD01qG(BdzAe`24B5w*927}%vo68BprWc77oD- zGRPA0dvtyznzmV;K_xD=?%a^HjaWJz)sVGe{`&_TzTy0XX>SOXHFf;PlUqbx8c}K3GtZ0Y#$Xa1LI8AC_^1V(C*J~~Ov9&R2z_M7kw-s6(EOvIqBj#}{Q_n7r+gl@WD8?X zCeCJfXEPfLj&X)@rD0|sKCw&Iwl)rby!T~2{!E|8L@8HklE6QDl8A$PDj-!HR$NN;BL2-EHb1MBw5DMOM_ z8|I5yG!g~s?Qj@|_YDgz1eqvjZ~ODR>(CaIemdoocB@Yz2nz+Irf92p8;beZ&7Y)Q z=V|kJ#Z>g*dwjEr#+*#qq-12{;c$6YTAf7dKN#3)USmnx?~l?l`|YMF_mS(#?T0>} z6D)~=QQ2bTuA?3M*LX3@mPsPz97-#hquI%&4IYB|lJ0tST)N)3C9ffRnY8Ehp)g_L zid#3YH6^Lz?y?I!j?)p|3Nv{qe^HoI_)eE1pK&x5S zf}Svb>Q9|A$8)BZSNcv6hPqnUb?yO6i&Ovzh>-5-qo`4VS91%!?28OB48AuTxpe=7LieInYWGdCkJ<%$t*< zy4{I8?2E%Tl7?5ZErp44`)tskRJy>l!cWZq0^F=7nOhJ1QaFRu_)QgBBtq#F zo(e6yMVCgMr>!M#)Z}??z|4~z*QV}DG#!D}+EJG-?J~m(I+DcG9a)pQgZw%#I1`R} zWb7!vU2_H9S33Pd=jC9juK~VHABCPYCr{Og2a)u;m|%UtpeI?w!?GN$(AG(-8XnS? zzRzTuHbFhuRJ&F;m{Q4@aIjM~8keyl`dcE!xm*CXhG8*-Tl4E<+z6Mu$kxS?PU}B) zmT8ghlUjm{2RYW61Ddt4`M&^L#Za(DYAYfH`9?wx{t9jRX}s1J)s?HZKkk)yb~8it z7a*2A1+NOC>HY9kYtkA63pvW;rdo=HlJkIzi^P7E)1XoP-m>hKSg_$2|05gtjLsiI z%hBzvj_vSu`;BsfKF_}+g=Ss<`|8st=}in&CF9uw;AQ=j&s$~n39#PGJWe}+9hJZY zbK>fTai)_wfPMpjC8J>CazbYqBC3gI_x;dR_|I~m|F!Qa|K-)s$mBml>AzGguayI_ z{{rky{sOju@)?Gw%IHK{sXBgD4U~f{kF)ln=_<~f9^)ft@iZCZXKIZ6SRC7xX@K2N zvwCfX){Tj}wRfjN1IUi7Z$`HS5InP{hz)E>THNEnj)MSA4EI}OZ|%O5OJ8ps+=po7G$0rkJXgGmj{uj?qnjwMEN` zxx<#{htD3r8CO4um8c)gh?Bom329#}-m0qjL|+KpB)BP&g4KF)*Pf*&;gcXbOes=eA(&G{289*+niU$v#ta(-jXkm|h8&y}!z>$Dues(_z2!td+cYxO z_PTgb)W|bw_<%gS`@VB+M-W%=fyQu?+wOwqrs}?%ZZ|lljNI#p!L$)&0^4o( zK%gbH5Y9$FoentINP%if#gIN3ydpC47oacj1Y)ydf|y@WZtTw0Od8AuMq~p_@9FUg z7V%{23RLABwe4y|HlO~qvo>=vHsM98M?X=92mmR#X?IAPsf#JoBFPk62^ifxRGjq; zbMG1-Y<=|?pJvC9XrfTA9+dMxE2uX4An^`FcM@KibpbZO?*3t&0LEI2YuS_Ya#w1n zOFrdc)zbP$ZIy#bC?VN9HlDQ znv=|ZJ17&7|EA_8>QrYC5vb2%6i-vcP5;}N&b+5j^Yhc#5JYBpVkuer@wGbKpD&?t zpwqN=G3hG$n7q!{!svOWr(Nmsl6ePDwhd0NY21`;X zp3uu(3vRjF5-&pAK{|QX;!Ik=?&zh(Rq;wL#)KOgyA@@lGAi)Fh)s=GApez9Uc2n1 z6TPM33B&mYJVWdd8>sIDa)+d#qmLzVF<$I-3OfwfmL=CQPx(h#wAuU53ODYf&p39kRQu6G0lb^UiP2C6rhf#VDg-symt*K%MCBH}C0H`Q!h zK5t;~stZKC#Lpu=4ygR&wc)$e}+NvBn)<|Uwqi~?1E#GJTW7#L3- zV8@xXnde_pBjsMr@zqY(j5+F3=eAB@K;4E7gA>Z2V>meaT)k1?#y5|hE62GwlJbez zP$nWgj06`Yn#GlMyNysXjM`i-LsX;;ePDBf$^${TbeQ#`;}hjY8fyz?=Bu)O9lpN& z_(7@@dZ#b#B<=OWA4knU&U95B7u#@J_wSbtmAfl()&1Ij2x@%O^kdxCoDm`bplCo! zXy}J70YbH&EsNj!^gXYOX#(*L%7j->&~a0r91ENs{)* z&~Z&FznWNR{WYtZyGzjOzfXcf;?Yw>4M^oYQkNH!KaDoSAcOwvg4jsfO+`9hHfvr9 z;XLaz-Cg(xsL=7j7_C1?V%1wRM05HwToPBdUtZL{&qGMCwD0Vj4K2Yd3?9bRl=n;^ zh%b|k)$)LjO;co8`X(uv=NC-4H2=aO_OeuNxshK3qNGDd?+WAJ`(Hu9TNI_!)nW z9OX!~C^V0}bdw+kD8U*{f+x2aS2tfdzfF0g)~hkc{y};dYtZDbx!2xP3r`Q>z2VvM z2*H^_DV9LwqQ}3DakASQbo-Kn|&iaQARO$4J z*;dc$I#UG}%jH;Tf|TBrPlQl}@Dt{(2-R+3d^vg2Hl`kix2s|8s^c(L`N+}Gad=rX zO@E_lQ>+f4-lxg-#e-xqquqg@;|_o6>ft?~Pmv=n^D3rdv&$gs>xaJpzJ{EFE z5{B)*DkxKLlo6C@I>zeW--I-EbL}Py2#A@=@lojp0HHTU+Y)JMc;1rTV+DStTxNw1 zmt1AesU4MmuOF4(N2lBvIa0xr_;ENwUm+LTnyOZz@^#kD-SnFF2@&X!QIM*Fye=xo z`3G{+oL}WaBuK9m3I%TSPq>_;TF!CXHD0ch%0uK1Kv3VPZ5r^!v=OF}2Du;I@y&?t zkKF4eZFYYXq={{8HG$a)8JffM^JwX>az zRJ6MMMg~t`+!uQ_knGIC_SR=~?&i}~FD=6FHkMif>fKfyL&`6i&Ss4$8Ly+Bz4*0n z2Y$6QJ*t+@-s{vn%>gCIUq z)s0`4mPSmTd;8=@mbhq}WxF^Go?CO)R|JZdp`(nTU$2vdo2%PBnpGSKAMv|N!e@_# z8+|?mT?h-L{sqJ}1!}u>>mE`hJO7kK`vI9G6yV5_hSe!`sjw~MjEVQ zHR#O9yw?E3HnS}Y2#HQ#yS`_s&}&OPjb*zt|I&S-NDuueAh8uMo0d_goPOnQK;-@m zGc)KIDV8m{iR)*E`gjg^H)Pi=<#dY(%@j~;1j~%5Ey5>xhP5|upIt~MlD1hTJN&F$ z+xaCX;P1cvd)uN;BhDs8*>4k~p=@2qc4*~`nBIuH$MuX11KgVmunbfU1Yk0B$rn#q zE%|JKVHjPJ9l8OZm7?}65Id|etrIhb7m}uC^#rQ;EONq@C&N=7Yn{q2>_LJS^HoG+ zzsf)GKe9dn0P>e#-!Kmi#1a9KnMKyg>0!^W;?gIwd_-{?L+uP`%I`E?j^0E@05$PA zJ^TQ^@}frRTQ8`SB%|Zt;#ACL^kM{#lrcts5CVFo$RAqx#0Ug06#vW|VC}vO)Zqms ztpemKtFbB;Rlj;qIuEziuT|hbZQPRK{3O=-sZb{8V~hRqQ)c23J$)hJ)K9lDDO2ms z(Vz`JrUq2Y=|DB3g1f^q?=Yk7V)$)7pb*phrmEWUy@%Yjc-?^qi&jZlA3S;4R+!^R zQ7WMxJ)W2}nN3n%Ib}d;X~rA&PX5o&(+!*&Yl~05n@0`Dgi8fdG&eTf`oJY! zTt=MYeS@N{rLI)Cnq>q+%8&w@(s=-K(9f-$Z=T^4hsK!B@qu{0q?*v@!}u>C-+@Rf zpfYbJV`yGz!lb=T{j-%jNjc=uegoM7^UE14dtaf!VLvduFci&wQIlk zeL}Urhq^!>vth4GV-z<3+4hw?u)cLtoi>&gu1HGPoD$h2jDq-_T3`g%MU_SP>IjD? zU=`YzBJ;RRv6%nN>~ghMC(Y^Y$^4({4F^9ZHLjZ>A2CTuc)_S}(8qr9R!gsMUY0k&JL9Myy*3 zNt4&;zdbIB3Lg!bZ0cqv)aW`S3YMB`xf6OLxo_{S*C(Tl_>`HNI-jDpS#xzjVL*iv0 zgh7YOSAT|{+(_z`Yi7)JJA?S3WK2)jI}}w{_U)UCjr)2MtkTu%BRkuLQFuPbj`3D} z7z@N8b+ndL)&}Qi7znFSh+no~dO24n)+kZBj=5O^FKE7Mc_=I(k`js7T3f8h&gOm^ zc27TinCjuAFj_AvN!_oMwDQ5b&uHLXT^a*eT~AtIt)CLpNm{TpHH^x;}B{Yq~0dn@-_k>&26XTHVn$x$m$OnZ@Df=>H>* zck6BNUwUIz&kD9TyxWx~*Q*Xz!ogi+L{(tp)`sMh-;D0bP^+wyAH?zkiHeo3l~H*< zug{i&r(tGaImVc(%gdFN%x2RcOSvekF^MgBQen7z=B;yES%iMvsJ*Y5B{b|7U6^&D z559l?;owCkGkL~vjNYRXkLIV0)*)&#>v0PQKRgfPy`M@@BZ0`rC<0dj)?3HzyZv8$ z+dCl9-6etp82FC>!f}hO_%Z*)s`PkZS|{AvM}|HsCD%$9-bz+G(w0evs0Cw&UJeNO z){N9@oBz_8KuMgMSiB%G6(-&b)?ZmgvJPcpI#CqKlyj+iKYex(P~^Z`riAv<`r%Tr za&35l>FrV!pxaLU^E8UW(E&~G)2<*;s&v=b0qOit4EUX>ou)|h$JsV`r!4o52SVoF z(ZG%%*G~$OkP(=%eoVlMc7IoEY}0+=6~~>?VCmdtKvAL8dh3Mej;NSeRRem{-aAJy zzjrINaSxJeMD{&daYQp4$YnbJ>=XE6HrMpEzchKr6k})yE;nIy%BTDdGa6{3@BtUN z_mf3qSw{0>7Qb6+S+`5bu{aF4QCrTq8j7C6SHgo4iyLT{)G&M53+*($IK>i7f&UR2N>3FqlES`ggvs03@Dbu7Ol?%F8l zRnSum3mM%CO_8a73f4M1E`>a@;zcLRo)};i>9qi`Wu)lwz!U zDwo!6+$D#Pkdue7SrJgP;o}sD;03<^n^FC|1Ttw4-6?Zvr)z^89Cb{3>wf%v(KH_Q zSU$IA(2Ak0Gn;%lKjMJjrj6h1t+Ta8mnumZ#DEistmt(miR27FbORTK@5lz)?sy*H zL{rD_7WgYPS!k4VFTRRdC;5hJ1qy^pUY=7Wu(*=wLXZ^u8kVSiJG7T0=Azqr<#vJE z$5T_&_$pK4sJHv&-(Ht7kpEc3AH>2+$U)8#XSLQjhit%bXGiY56PBRmLq(na(Zij( z3eed%&!!F?T-gw1y&`i_k-Q`t`soO}`oVt0^lZd2+HaAT^d6lrgmy{HZv1+)3cqJM zIj&fO7*jtP4&D+MV9|xJx%h!F5T(tMCG*>q4U*fQ1`c9NSJ{t zDb{E$X&p-a^QnORknxWRay3hYZDqaF?ZfMFqn#D&a*6mLq0#oA#w?Zj(uFfF( zvp!ZuF;i((hUa_T%+~~C_Q)~h)dgopmq+WMS`@4oH!7F;y{dakNfS`~n0- zpT6`FQ*&zC%$ZEpU6HRpTjGD(oSxk`~%tz zVb>f~s%g%Lm-R%3Y^eX@vot7pri!f`6x612^UmQ9xJxzpA2l9){~#(BGAWg&6-$#V zWnHV!77HY8TjXTLBxh8lB;U}{nf#;?81n^wn3OqnLtU#q(kyo25=>LJqk-K$D65BR?A#@Cy$XQ>zH-9|I@% zd4>JH1MwFCd{v^XjY{ONI5{Y&jzp63tuGM|8eMZ~5D92nhv5Oilt^Cm#4~R%)GS4W zIU|x;pU6ysd|NG@%VofOj@dghn%-;{{Sk)_X7kXM0BnO#=ax!e`DPXF@L$>A-FwBK zTul8g3r>72y8<`5Z*pI1QPtc}q=`yTTM8bn(QYAX4VAzR9TFI-ry&m=CW zkc8^{^D!EaUCu*djyU$8O8n9%;RQk~TgqHOtiEGSC`#Brn)x3FQ-8cIpp+d_EB5o4 zVQcyA9p$Ir*_Pm~^^gJZv_V$iRzzut@E6#YbC@gpnN`J9k0-5cdLdpVZv|6(hy&?= z@etO;@uB`Pm@KbcQiE2_-e=TJ6!Wvk!T+lPiW?}d{;zIr*ni?#iU*R^zI2sUIHa0g z;3EGt{26gc%CX%NNi)Flqc*kpUz}tC!pOxZbQsY}Rc@tE@l@ULS%Z~ss$U&M(fkCy z`tcWVS-ArG3t(nBvqd{{dQ`253Y^te;BL2mnDdp9J(Pc|)_b1u{5~~JmwD1@yD~2+U@uAl8*Y05Ni6J1=?RJJZQ=jOcvtB0S+4TU`?r~YlK%pv z{;|22RDD3K?Ki%nDmDil7ihK@RPvF@qPFfR>rtwHX<|ZrtT~9!V3?LZFwi?NcclJ@ z7Y<3v-$VePpV&xx?UPKY7LE*lHD99F;RNZV*oX@8S=WOU8*xpC|M%0YA%6iDQg&}Uzc-nm)(MMI4B1@aJ+0(&kle=jnaRS1cz4*K9AcW$3to0weM?%ZrMT+Oyu4^M z>jZyUED}1Rd>yy=-NgUxCK5vB(Xu$Zed$7cOXyD87J|49F5&_LGW^RxoOY6&1Qf4L zR!MPrL}Q`NMTgGDqx{r`sXn>rh%u?R`unMD#JBc2-ITk!g9P9Zkla+SXdoNcvPe`x zb1^B%bh04jBCYk3IayY75r>Sxpgzq5jXd`=C3+s0@5w(&L_4#YD={OR%KNrCzvSa> ztYR8#YL)H?d}6Uzhph;Bx%3BydiyL3607+M^oc|HbwA(^te+e4C?R$W=N=yW+*Dp| zI|U7f-BCyh5i;|=%qu(M!9Pt=eST2DR~c2@G6J`J+hD*|%aIECz;#SynhA``+CMka z60B4VW!I-Z7UgOI+qMF^cJ7WdLo@PAx2=PPAwqYdj-H0kt9NLqud9TLA;%47CQq?3 zHD=KX$D=~h>xKdL#DguuuIf=RAtog)vHN(mU2io2GbL~=U&tvRqpAkluQa=)FDDbu zD9P-RkMWuuJ%h3_?>k_@GNcHI-VnRirs-UW4x5-@Qgl@v5`X6()Lt4fU=YDGsi}Yj z5-1#z`04c;nic%0-YsplG#WBB*w;}PDBb4pk83EDv4z8!un&kP5#sFQhx@pm?0UXM!RE$-&)HujAsa z_Z?~ovk&LHAU#ccJ^&+8Uiv(MSXKWOXt}ebGAp#=G0}3y<~N5db?ane$jw$B6bI=* zGzzHG@8N5UL~10&0`h%+R_24C+4iq`gm<2EWf@pJ-WogKYHrlgA=glBf4G|@X%pxs zu=JfE-;4QhKNdxE5ASRO-z|u3JL0Oe<}zqo%~5|O=@|W;cd=JE(yPcBQOQ(fc`_3) zND^yiV#8+$H8q%`OKQicy2Vjv+>6_ zX6NK`xaRn#*jcVB53F&D^)sN}`0aO7EQSY7PDpz>FWar(g@4Dl3*a^?5E+ioLN=ca zQ%F_Z*J)mL=1j?*e9ujyb%s5GT~PwxJLW;hWZNgB!B0}IW*fzF-zToq>TQ#q52Yb1 z_*lf$sNfr`%TPT3vuGs;eAQpXX@KKV&)zp43!=aH()l)H!IS{~y6+m(FKDs2OutZu z(LEZ}`(P2d(&-~rrjX&5`N^sqxX83+I(DA%UZV*Ow?Ba1jCDFbNZkq?GCe%{3pnMt zoD@YzL6RNQ#8S_~)iX@=pe|e&6dk@;;VGna@EotTm){hlK6f-Vy$-SqA<5JIQr>>N z%T&zzZWx+*lV{XtVhz*uR;vd{-i*C5Gt$)W_CFQ3bsp34def}A;KKgiBjITmQjO=~ zm&i;kS_Z&mZtR*Zr-7l^$?I%`n-bOM$9NHt^TvgIwgv~@dNYD`k<*e_!f%A+7Hf}m zY{RHlz8`aX?{+@pn1LpT3)?ZTpQ0_YO)|zL&)^Pnd${*Akb{^{K3UM;0o-;E*T*e{ zuh^3Om*`;mD8_uB#Di5N!EG;dhz zQb0ID3l?R=EOvDe5R#iFNvGqMR*a+O7}@fyl#~1o0{17K!rD!`+4y3x ze$_X4LGZ#hy0^2ev(E+ij5fk{SH4K|a=dT4H0se7D2`9x7;aI1>qJ901l8t^%7-?C z16c`@o|W|TY^Uag&16;TiG+hyYAFq1&l1}pn)go-uspOFYLx1PvhassL-*VaXe?^bjtaGETqeaZSn=gvpxv zWBZdoJ5jOd4;Prq0w3;$*#mdCtTad4_l9yprKJ|;<;=EL z@qKE6;rpp=`8g-v4jdQo3-kTUtiUL;8RyB_!O5X!S%nqW3tupkY1@D zOy%P#rsgGgXtu1BR0bI?Lp{F49u?bE6w`EbHFJ9Fer^slauA!QnaLf|uQ*n_zx54F zrgvyJ@HoZ6k+7a)aXAyu3FnhooyDw$hM7ieKPM5UA5{`%yjF}WWP=GU<6zU3X37Sa zK1wn`auU6Mm##njox=C44gHLTVnIIMp905q0Uf`pj>gM`tPa~Igh*+%&vEDIb2QCS z`M~;G>OwTUIog%s<9Vhdv`3BOi>u4{2H)s1+5pg@fBm(y8tmq2+=K_oZ;g{v5SYN{ z_Q+>ZdXI|bEL9A>q$GONqg=epaSAk3^!#!Bb88{F|Nn~+^Gi)gUCusI)2hDWSI!iP z=N$IHx2fC#;<0W6LXvKe6vpz^mNb1W^BqQ5SW5$~rz->wjhPvHr)}53V2B~_MHQrzzu`Wcu7Gp=*D*A zM}pI6c%-a=*z}J}qf9~mDayH$j)byz7$t{pCyuQX z^SzqUC?}PznP9P?494YzkL%zdxt;vn^e)2=7tTT*^C!c?i&UNO?B~(m_GQ8Ros&LI zXLC=zQ#8cjkpjgRChC!rua%RMRdJ&&F*9wq%ejs1uufU#sQC6!#0O?9OX?Y@9@9T*RxVhTlCM^ipCA`P?F3d-80i z{HPN{YIkB-kBh%2=+R|2+SKZk(XwX#*Lze^Phs&&OTWg)GqZOpyJ>jKi6ygGKsx4A z?{`W$Lb`S$#G@fNJ1OiOF;nW}umbtO$*8<(lyBjbxc7naj(HsoYJIGc|J&KTgPhoQ z8HV(DdAI|Y@@0753GHHo6EIC6NG@ULn8ZSm2DN2Qzg+mZZ^_nj8zu)ain?4%0hT}F zZ%?=A_!3=813VsSeI7MyZaIZ0ts%;zTu(StYpd5u6#R~=^DOz1>k%K?Z`+YJ!T%LQ z!!2}_QWbP5w^-8Ksc42}7gZ8Gjs=Z+v$nuAP8TiTqOl0xshprtbHw-0+7R^(nELrk zkBRt}nS_fHioqJmi3o3(lnMU|P*!LiY}edhS>397mG05vNJGUpi4<=XO6f^?neix+ zqgz5@aL*T>9#=n~>1Oep18oHzUUz7U~kpQXt_(%ZB5`{To-;b z87>*=A}AGPkWA)l3=bWB*Pm~L-FTy`<$Kx9Ke2gN~s8rakYx#|+BI!eh1Le4xx)ah>GhOaf>J?xc0phkUW-^kp z>Sn4fd)t0Mu`BMa9XF)YL);4W8_83a4l&dnlnba8(-Z^NlcA55f*kHlf79EK?eeY_ zsm&Ia6@D#G`13aL4lR?ov5WQ(x5@O3=^b6qrXpcq!I=AI#m}qjK`tqAtmh$m5|{j5 zjON-fzx{*vlPaOIPXdDc+s*Gb>;`$#Q+prV|5ul$lEgA_XuXRvDhLm5*62`D@X(^R zVRNlddBJ6m3)~JJL+Ih63oORzTN%gl&+EzkqoN8a-dN%P{)6T7X`A0Q z<6^l!;ycWUY&d-R6j{0fk~sS0$I&916O;bWCj5uKdKUj54%#;@uUoQm2Q_PO_JL;? z%~jnDA~SeBkH7|UaZCS)XR_jIwW!Ha!bPiLRQX4x8){1|)6Y=?7pO;TvbV#-u?Egi z{&-!nZ+GTUBLATzIFiLIIO{!5j_|KI@gMs6lqyu^SF?Fj&+`+@kEpBpN$LU;mo`vL z{6^2y$N)Ud-ux<*%6jNuVNHQ|{G`FK!e-?UY{{3v?(Fbx^*x?bFq#~$K3|tjv$yO_ z3f$K&YgPDo@jx&ds?NF=k_8j@6z z$nesV^;v`#al2#``GJ{P9(bHmAK~9?o?(~fD76CTX#}uhdi#Z#n6qAod8O7UpOZIA zJnWBsH5KxL#@+`)+#Aurrb%qXvaMhfosAZc1k_#u-(4p4Fg(T0Np? z4SbQY{yKrcj>0AcfI5?Jd-cO8Dg^mk-x`9`Gm_~Pq{AnypUF!RBJTPUHwBmWqMSag zwd;+nX*nYUqV>;@cZ?EL9}%OMXLsDPoS^z=B?&McavVRdUUEsm`4UoN#+cO1sS@9x zslC)Vw?@^vBdc80Cv1^LH?Gcv%Ow)ygq42e`u+6#b*aCA-#4y*az4j=`@RTf4W|B$ z83H@Zw9_+8oh6+%#g4?X_Z+L!n{so|4f!9+kYpwDlr+*?nS7z57Eba{)vX0z0 z`-ACQUG}NES>q5ov1%gEPVOo%6D<^;t;huYiMzdf@an%g(Y*}#3n)^XJ1m#)@_3)S z_CQeLLMC#V4|eIB65~>~J-F9=6H~{gt|%UoO<7BcgX433k{#E7#9!!#EuU{SGg_TNq6ruR;gH(W9!edQ43W}7H3IjBk+WsTkM z4sXAK{(5aEO|`UO?mN9}g7U5dTbRty+raQ!KPyqJ%X6}3K8|G5%Ua-A8YN}@HC6XD z`{e*Rs zv3)IJQEe&YmhG|tvW6LhZV%~+`gz>k;?4aL!^?<uE(X}-ay3V#HD=7T8)w+NSGd^*^lxbHg}jaS5hd?b$rsC>wri$Y##sc zl~?@&fH5d%o40H`{Re436z!P(u5o|Rqt-r|u7T>;G26^1>Txmt*8-92P;joXdzu0A zF4cXK-cGNRo?o1<8$zDREJdgJHM7Dh5)XsT#1ySrIilM|Qg2Qt49zYQF!F-mX@oVW zsC|$#`2MGAHtiEb;D`pS0gd1Z%h05KlD2-r_#l#Po9bEU+5E*aC+C0@q+~-pY(wBi z6_`@S`zU>hJGbpGz$>@J>j6nUn)bYmife~Ue~; zc}h5S9{6@B9oP(K+~Zw-{OvQ%aBaz~IN=-Q@N_cYs$PAc&FqqM$&JJd#(;JMGIeJ^ zD@OOP1J#gXF$P>cf6n7mz5NeHhv{5D)7=v0LN_CL*w!f`l05MGgwij;@|tvs(q{X& zQ|#h`G9Te$hx~Me8cC#kHBarFSl8dUUIkD#2T38(QD+&TQ$6bY#L-#n+QkpjYiGJK z_YAW`IhI#2q}`0<=`jqhGEMxhvgdu0%X#7B45M)^>rdFs1TB5KW7>m10Ih_z@wT!xx6$8+F7N%>)V7=d`Rst{38pa7dI5W(&}X1W0;H+qse5XNU%b= z%or@g(<;m@KMHL|b7^?%v>;1&ob-m0nJ%!@OwTOo};dNakCT_4xD z#xv-|I)5O0=VJIW7b}iVt4~+r7vJw`CYis0jB>e)E>Tg%1j|Q}LUNMw`gvI2QHF7%h-EWTZqr_Z6T{XSgzgl0Ry;sJMnUBu-mhA0M&c4v2| zWMd}L@ATw?=A4_>>U6lqQ2t9g$#-c~FdDe5Ld$bZ*^T?a%2cDJN*f|S8x>mMAnwW$ zT&~m!B(=Cj?NuqDWbP9vkXTdsxFzrMa@r?hoQALl|AzXc(!j|Ba~aAjy{xf!BIHj96tEmmIX-UYnH1YvgLcUf%GzV{%69 zs+j5E{Y$9U{!&Ch&;YO($@cTNGAqusVa5ZhIyE^6Xs{cV5ksFPa#^`NRjWn_@l0ju z<29NDEbZlO6-d^I1i7`f>T@D*l$!qzwUd8H6 z_apc)d~@qv_WqnHv3f?sa7fWr=~dM(b8O z)MQ2&b!nc99w$>PCmMH5qy~dLutQgc!-W|GH@y0VysOS_n!ED}wZx8*k^Kpqf;tt% zFqHrU@z?9=5X$&mu5yCi=V3$T9|D9COnztQ5b;hb`md$%Iq_jj&K8GvDIY#0qy=#F z2wLZnvh6|iMV?S^4neESI*mk3Ez-^`$Hsq)s##I59FxBtz1F z{bEv6IhR$vO)4!5Cs~mE`oKgJ(DuF4^UE-@p{GJ{)s+>vVs?bMJ+?7$NH3p)!N z^`7e6ndCsVhG2#@XLg!o17V$n^zuYeohhkg%UK3!?t&f(-rwPbPXge71%c{JiRZ>d zx8q8u1``(?o2o2d@g-xrxNo&jo*3y>Ba~?_!U&0SN>6Cr7e0N z2r>UrIcVmnXprC1oR9YY^4URJz(jEvc8>XGOa)O!j3{GcvBkM3-k49Y-UR%kjN##? z`SKZ>Yv5aidTu68peatTs)xRLirM%C3ju_!e{SGCU_VeB7x+M4h-^@q9Lh9F||C=?4rH5CFOxi~<{_%IB;N|q;Qn1@g+u{`R z`kyEpki^!Wh-o$goQ>R5HkUAlxe-PJYM3J|UEknaJ7ui`UH^XbPK3VEdogu?}?R@U6UeW{K zZ#e(M8u*RZ{?uUOs3t)NhBIkg{q`@%VL)U6Ig{{uFZ+u2TwZ#%auUgW4zkl%js+O| zTH*SwNQHCaPiVW9pJ2E4IxNGZWpmY2t)ZTq7Nd~~(%kl%@TsNhI8_PVa>5+qshnA9 z2<$lX;+&>wVHXQEmeF}rP%|)2Yk)y~CKGuvgKBPJRl+XUVw{)|qe7|;2pK>nz+h?q zA1g`gZbyP+Vwssv3FTsJ2lL7a$T0ZYvi(3XwdftzR<|?%2>)lX$$O3a>7G}^JkcI! z`;n(A5rzW}`lCu9EXf!0TdB#@c;Y>cOk&3{oB#U=>Zwuc(KR7i>Ud;otlHxgEuO3E22*hxe*c5I*nt0ndLw>0 zE2{l%d4~lUr#ACBALB;W0}e(sAkql>M`k&HFvzz0&81sK_odjNy^=C4QF+*rlSjLq z&LJ~{aZiPgHtf89WaZzH)gtfY?5q}375o!yf|B0%kFV2Fv+0ot>F#_%c${C#zYz#I_hpb-j=oQQT960w9o`gHz5dv$1YsY2q&U*L~3S z>{nTDZ>S(f=jP*dFSK=vH5fEgn^YcGnjjUIk^0W~((2$jF$`MlviR-bF_=T}3;dDq zSB5|pz?9KtG_s_JjSbb`6zQnv_$f{IU01UJ*Uoa!GdQg8;BzmNmZhiTf>SHL(IxG< z>>`}6&h`E%CifbuRCL`EHv6%J>&YU56=y=?V)om0?($ho%enBK15hR>y!RE)TSWdJxk`si?D84Xkkyo&0z(>-OU#$NUy_= z-dQGyz`()O~EN~KGlxqk0ePilGYKk$^nC)dY3f77FjxFelCV&mHb{I3sd z4_x8`KOA7Z^iq6}LAZ;joDV1<$6LAn@b4p1oO%02@^}4Yn|=nr@tl7arOo(TpEeX> zKqlvFA@&Zb7cz5Rrkwy%uOw>r>}a@v`N{{k!&9J|eJ7kg69RshhBuyEs^3Axw7-$= z?izs#{&&N$Pu0uZpx@keBmbMQ%G2@X&AvfOdRTkl-!uAc?(Y)6}X(PcqG5E zYyCDiwMB`h@QbIduldLuxnt#*OYPg01KvLHTs_=0+GQBsO_VX@NM&4bT&fd?DaqNo zlVvpc{b-PcY$497_7~~9gy~$sL{cIwr0>OtI=Xn<{$F=yfWYN_OTJHGrHITdS+!>6 z#s{~oFFDkYU!j{93uZwSBnDy4zf#v_Llp07X*uXrL=hqJl}TQ~uUC`2ZOK=ZCV3mM zeruD~j-)T*8AbUoPDJ}V)eSm})YtD6r)=tg&bpc+1=~hgsCMm?>)nDdol>=qu(J~#r`1P3WUJsmW;%xDQWl3RZVSy5Mo@}U?l8c*wlXww*9Qi*mi~j=n7m3-)R_`m5(tzD6k?CZv?-Pr=ke$GGgNkx9$98 zTar}pm1-5b~0=ZN;=Xw$7vJiU__6PfX195dK zQxx_*s9*(!?Qwo8!b@SgvOlp>mo}qU`kjTS%plso22sw+wYUPa0zF7m#{2wwODi*P zK&5QcU+tH>aOr2lfE7Y27S|RyQ!f=;_oPV_9F{m#;$wh|=jfDFJH=#?!L@(bLM{MA zWT0aj7)3Ugn9%V)u~|FOSzL)671oIvSd^$`iHCY_ur&R#RTB!mMiZfp$U;6>N*-3% znrk`k`*~YoWGhaYI!TN_w&p^ ztB7c7{4$AC#7|WV9X{2mW_wAu9{Ypj{i zV$xJUG^?vH(QW3=6YG&KvNTM{_pfO@fqXPN5{gDjn);;l+V}4li9m(@@6R>Wf}oLK z+im*uZf5P92%N7B)qVJ;ucx!c{ivNTj{^}Q1^l`7K zdY=#Ca(yOx>fAb!;^<4-$@lU1I==8)j{gryt00ArfW}|5>(-J9muo~19I}RDF@^$h zMi>x;P@^?>E>3|D=?k&IxG^kL%D|$2L8Ut_Vpk`>zK=Psi?j*oLH`bQK+0~%KXXBd zYWg)jSwurU{r~q=;YIG~OBHuH)}qyDPW~%VJ!sQzG>(4y+3*sBZWRb;49KNFqKWu! z(9kOluN_sJ%KqqQE-&LnznpMl^e!X)Vd9FQ(NfDw!z=1XS#{mLTKSxdWitBhcgrOP0Tn4Vuurej3 zki~6?BTTG-=XP{!JSc4bGl49^E{(xJnROQ-XNoXi}WrnXUWqi?L z6q0@AmmEa&3%#ylyabSM>>)lB#0)LxNqi<0rVC7|-+~>6FF~hV8Cf<&*6es_Pt^wE zthhqEp4gM|B57Y_lTYPt^L5=8o0a@hLtFUXqSvJQj(+p5uc1GN=~wE%dfst98aI*l zK07^R!#Pxc#*ac&rb0s9_Isd)i7#@NHzEZmnN{23kU}vG+@?)GTtc2c)X&+D<0yAZRL~WJi-?9GP`#9pkZ_^a8F7E7 zZ;*9YG3|m~OAg9|^<4UDX2)q7iamamZ4gmPP7%IJI7E`St@Bh9Nm>BI}>8 zS9pZ!ppyp>6&jj1?2M6Z7C%b(9M5}MM^F_rqu6Nc<(WEnw;j?^YxZ4 zrJe@P;lUusPMvBhOk5-%T$Hg_LGSw+Sj{$@L85~ARsYGovaQ&HmbOV20h#t)dGUn5m`viRI;~IL(hIJ#Z7GY@D=z!5}U0jum!8{t!M)nztGen!2 zoRC6BkY*Wm2(nDKK=s_18gQq;h)<-@eLvv3*UAx?&Svy3^VKV6z~I-f*Cf&(0tFSI z={|v198jKThRtHqk6w9@xA+8j)KATw;Yn%1%y9jODkE`bS!(>jl>W-uS5ONqT6NC9 zT#j~i6n{1%iXaJx@_E40diJE03lvhF(0a3ij;aw*H zy)|VKt-4eZMc2}_(*(Iw+!JO&srK%H#ngg+p_rqSU;M7IlNS{qlB6P-=%XS-q>N^a{K< z#2MX)5HWTG{pt<|KLi=R$Qhl#07iiC|UuScBIuj2JsX|7n^ zsj{-rP8q%0O@7J639&-!A;y-ikB4j!Y^0v3s`hFboBo+CGX%u}=ei1}mA>bQomJaP zXU7P$m?i$QvO|ULX82gUgs)>^ZozMqMQR%)PVlzM2W%~;V_}ZT5`04C{t&+*%fA_} zn4^XKrs)c^EAaA)Gf^f~UKkpfDi#M=GU^#l zk7MbJ1-?KwJU^*kJicmxnof;3v^9cs`o`k3Sf1Vo2*oGivw`1EPO7N@v{g0HNvnJD z>JDKnUne75mz?F=HCoK`95u%OLqh9xbatYS-GBVTbU1=$&A>>6D8xg@kNVL5RWLlEIhuDwc2Jrf>t_Ap*7{DZcjYO?IMy>S29pZ#*KPu z@8`|HhJL6AQf$e4^BD=9IB~HU2QluB8Q(;vy0Wz)P*2L5=h?a&j)XH~ZUm~`t!t2X5erJqf{L>n|xqR zKu^thRqZGYwhCfiKxd=(mjiwhH8!F=3j2gtYP}G!W@MnKn$JSEn?>k0M%ArXukU)_ z*9I*=(H2wr-ZgBeHtuLGOsXt*daZwkT0d7T<%(nXyobQ7yK(?Ts0a~~sc04ag36Vsa_yxV2C1@w!=3aI+dQGK5<{cn2O$sbxvOX|08IZ*OJTI0SZh;@zhHQ+s= z=41>SBU%vj7fN{1tpe|CZsolhX|9-HrtS0-XS?VTu%7hr%D@1!urDN(oY0+4kOHr| zVsokD-T*s}I~y-jDq;e$^t>MU4yu84%aEdW*-S#j1H)BZZ<<}7a(8n`xghWN`Ssom zp`c0I#=?2=8AbQj#@=Xp{W>(SZWI=z*$3^qbtVDqIXmyRV6e}Y*^99JUg92Z3OYUC zIYFf9ZkBB(=XEcrc>5H*)%!ZXwUS$}q75;I>UVwx+5|+--$d`GHtaIjsMfb?Nc(l= zzM&8v&GLgB4(7NRYXMlieLODBS*}E4hrB^w?9Q;fehrQ#MlH5dfBH_;<~>U~Yn|_w z8}+&GsOT)QqR*r~voJ*b0Fw_4v0-b!i0)1S(buH!n^Hy2s)Dp>~9_-gsIBQ0iVSD0X& z`Tj^b?7VhKd%yM|b3J@6_A`f$D&Ydsw|WdVtbvieuv8qS`<(1^5Y~Qlv$ew4R(3jp{|aoHMs2 zTqzbcAL01!At%nMv!yae{UqiidYA*M1k$~K>i?i#Sd;!KS_4e!YtOVOR?II2kWTXFEEn zm7YcDk60p>SRsXq$LkAJEtd0D$o^E73nz^D+x*YF2vXnC#Xd~}fR*jk5yz=l3QXmN zXDjM9$k{G&r;=(##t$5W`Zx2wefBO$Jq5X%jZn zelQ5SRa{van21a#DE3~IG^IhK+U5AGxi8l8nuWbn z>GG&nfW1$O|H4Xbx~+5yXGP*&d4|xsk!qkzs@rke@3Lx&T z>=>m7`K(+z8Q{)=5kRWj4n%Xbi9t>DSB2OF=z}l2;N$d&H=TP!nVA+17UH3RG=9H4Gg@S4ZJdYg_Pws>!7F6yrW* zc-Mi^%}mYjgU$sNP`X~K0RGNAPSKI{1EWwUHzH2Nmm$(lkpCW@$eZY)ZLZ&CQZe2l z-)3e~I7vLRQV!|;QQB|%bG8keKq3Zwk|<8$6MtLx6!z|FMYqErSA0bP61mupA&VZs zXw?p1ayp!^2CQi*(tL5>=(PzM6wlfyoLl`P=Atd=9w)`r`{muY@if9Qxi504=WiHa z*x#17l||Iv*;bsPEESi<=$2*Wx`f@NwHv=I$L7!tk|@LoHndeyGRkOdX=c?}k3u>> z8OZm;8hLtr8u^`p!Q@*B-ChwaDHmWTfQ9}(lGPg5ET%^09_79aIvqN-(oBI^?fc_i zV#FH1_W5)DS5>2{{k`^4Ek>lZU6v!TP?<^&U3OEh+q#xmI$z`rVR_mJUP>JzSM*+H z4`|)wPA>nWfWhLmgTq6c_bRM+vviB(OOI(Fb{H;a`^d(ZV9Drr_Z6#V2C4Dd$meyeTz>z!XsO!w482yn4 zw?5_kw-kG!BJU`X<(*vRXG6oNUuFe*rf3~5x&OR=Oa8R{*JWk+uni_Tt(I`Ej`NU5($+cJMB_W*W3 z)QG2WJnZz!e9Pn@H&ZR9K^m&9$&^-si=vfvk}Rmz&lPE6K3m`eBRXx#;^K z*=6EdRVFACZVumH%S!9-GjAWh&tSV9K34lzWmc_dxOhTkZBMSr{dr-Yhblm6Hrm&> zmDXo559Y$Q4spbVSiIC<_!)V!c1+&IZi+vL6^{1to20+s@^zhScRef=0q~qLRzEs$ zD9NiWG`lRI9nIq^w5U?b+fJ&+8X1p&t*gxUdK(wBIJS}?>e%+9z{M8(S>0=?AK4i- ziQ*@RIAU%)+mb+6^~>S)laE`RLZQ3C9q6fbAtO>h1Gu(Mn^wdNBRWubG@gK?FQblm z<%M^0_L(IymPgl2vQsx*#QS=G60HrHL#wn%TQ_O9#1?EmbGCHd^?$8#smk2qrR#t% z8ocmx)#x@b;pZC!5(ZOTqs&guoL}ri8;LI%gyq=H{1qb6#;Y)a>Ja!)iTDtya6{?a6a<{N}_!> zZW%@8=5WZ)6~$Zl8hq(^wZ~X>3-nyk0n6aqdEitg33eCnJ4Dr=g;jlAF#xx7LW$Vj zyw95x1LTW~|4s1lNZejly<$4I30K=NpV~tE(H;ubtp$zc)Q$%MgSg6LNQ+!aa0($H zKlQ>x7F3Gd;9;KnVUe@?i+|`+TE?#j2FCXz99puDD{bW?pygNIuRh9utT>m!Y_zGW z(mE29MQKUgw&v+b%MCBNx9;xQV#s+(US0lwI498{8;NZuX3ZnfON#qdQuL|hcz*mL z(;*g+ts!ecBT=-qi_in*HzF*q%=HQU0h(a=avyvvatEhn0;ZbA({qLS#ga`G745^? zb)o;V5^cGNO6(@c-&E(*cfrIeENfJcEd#1P#aU{u16FaF0cDnTO_eqWqgMgDQ~o&; z&-A5&4&NO$JSIy4{9rF1pBdGt0;b~7MkBxd-YNnfT#gUsl!VKNC7l!enLi3d9+|h? zDl&+~KrrT_9J1PkDlrOQ>3S{Nx{gwn12$x%2kK>Ly})ZCp4vx}uNTeN`NN7P7Pd+& zKw#~VYKyA@A^*U=qGVevB)J9ahYnRsshiQJDmf;rH02-t;RAExIG(dohbaAf^;5A& zD#NOvcou~Z{ne73{mTCyJDmR-SNw+*nV&Zm$X%HRw%~O5x$kE`Tr;TJ`x%?te&ayo zW+reczK4~Ag*HFM#0uLU7ct-)e~~WzL*U{SOM*S!WL))OcP8pw4qv228{!gH3CIf!tLfMGs^6rOWzbMJbb8f{bua&Ac z?5NzY$TWp}(%dehx7CM-)kV7<1>X`&H+4&bDh=H<>gTR|*nT7ZFB8YG_qymnyk>Xx zfwJIvXL-KQjl^y~o3jbmI2dG(I??{D}0OcyIP!kZ|xPrp^C%IfrS1%97BF=d_&D z2d+h%P0Qg#D~a$5Mk|7ezw!lec5Tdod&GBZf9^l1a7>`&LMvBfKor5R0Vw#l4pMz@ zC!nV{z1=MquE)3;B#1W0b9O!3I7*q}F;E{DG4kvD?ZIsKjv>w*7DYf6q)FV8X!juY z^i+Xos-79Q%Udxnt5)#ctq3N$(~ekmy~Oa$+wkR&BX%~XHB2&i#Z1b+yh*Y8qpk)2 zaKBI2Yu4Mtw{9*2KMqCP9ruHu`GbVMckOgb{ape=Y<|a2b%Q4EPvI(PYkL-Kq{r!v zBD)4*6$}k*ql}X#E2`<`LYO*|V$0~BL<_zh2$0!vYurw)xKb6Y7F>`1=#B41 z=LCA6$7mi{>a6CtJw0q_Te8lsN^tEoS8mB>{%|~opyKd2F~57xR}KQss?W}xkj^Z0 z{P3DLNC}NZg#qd;IAF?O_Tiz92G@3Zt{no-53ldJtYg;ZGw|z&8Ey8&6O}3R@dACi zjBM08=nTazB2sww+TW_vS5hK*QFMyDxi$=$uUH}16qIjnKJ!kMkUrcx*A0uTF476` zIN|N9>_yrN6yq-SbNd`@cu+?1;0FtGc2sCx=C1}889K~|;*R#<#ppA3?*nN#hDl-Z z562=^d14@>J`;s?uSPi%j6d%wTt)wvj*E<3bUxY>-YyF}JLK8e&1@=619pt=+Sxe2 zVIrG>Kjc@7JUf;DxM=Zoye#y}VbS(n@6Mo$`g*-z4eKoz6MNy-wGep7TY`)m{*uVc zZQ^px2i=vl1%s+5!TdB+?0ow%(CoQ{3Zag z+rqND%jB44e>p=-^(s-8u2c?-!N2Ml5!(is^~8%FE@)noEi5V@M)$T`w5-|C7}sdJ z9B~^?CCz=IDv&Wyr_h6yRA}g$BiC^{@ZP_SuX+W+dI?(3!ehRT2%#lHE$3IHZ+7JT zj|o4aDMPiifiF^VfS>F?>I8-2W5mYEsq@Wqt(!hxmSe@8){UvDDJ$Pot|hl5^0q5T z<1r^@3zENut~@x=YcGdVMwdsDy+%r8wCU492KE>pmK=vp6sPR*hjPzC+r_$2*Zd-MAU?)RElo0?Iz&w@z!fs7fITmU)KSp@SpsobKbm2-oWiL_PHtxWr_^jdHrL=Uh7H9ksopPor4y}_4ad# z!KgVq8-{8x4VI2J!<+ng!@MXRJJY!RJrXr}-oKwHMwb+*X`+=~ysWP~Lf`uD?n6ga zno2DVsQ*JMZJn>VG2kQ&;V?JfpNT=yZ`9=Fa?py;a_hiz=jd7qum#_EmYD zx%}di&1?Z^qM2C`J9Lzp&EXzfd9mfD3N~#poW==iI(cb5wc4s;W^3A5>Z8!Df76?} z`cP|#&d?-bMwDZM2opyC|DASjVOAk0`N{SfRR)>J!JXur83LFCYPHf4((3Vcq56MF z;ogHn&K2D)yNgW*S?@RwIfrGF!f1|-#|>xph#UhxJr|z2eYwjWfam9kl)O~gXMAHM z&OVq{!eZz{k;u?AM>>5mmpJ{UW?H2*lIq61zkAHhil-|z6weqi^k@V)A0K#thZm=$a061PnQ|>;XS=L!UxA{L*sS~&G1)9xZpVRG6P6vVZQd}5zXpV zIP^5b!aM5^HLO3MkY4{9bC!sUZyN`;Cr1Hj`@j()Kai#07xCa2yoxxVp}-cp;V#1K zs~p!slCz5qT0M)WcVu|9#7m{&>Ghcd+DMP%OiIG>Iaj5VF$D4zCMmp*@^&jtgg2?F z?Wjq71gSxmPDC}oox8dvI|$xPLMQZ8Cy2pa$3l#{RTkDur&$n-`Oez2*WVQkJcjG6qtZ{i_;z4)aE}EYgpDQi`mUT&8 z;jA89Nm8h8M9XMB3rm1GJdC|}$V^`XmpgJdP7Y`8g>Ef_?3$o)u#|1#7gOk|*0kF! znys>)@Y}Ho;9M#einKBtnvC@F@AC6xf$e;#5vPL*E$pCFz_Z>o9X})_?Z}l~HM&Zw zNZ7x9?fJ8Blvkgb^G4{vUI+7@oA1Lf@e{hEn~17%G!A8C6{KWM6~^3{`P++y`_Gy- z>+Lub_to*3Guzhcg=hb;f6IxgP1mK61u@@64k#gA$tsGe#?l{arkZnqU@>9ruPdhL z&U{=Bgop-Z(0e34VKH)11T*u&Jn>QqkR}vmh*(O1i#hFg>#N*ikxtKL>RoZ;86d=} zZz~Rzpcw0FVWBP<3^c$TXUXl}F2c-<_xEVYkss&mIKXDJyQ8rlJlzz~LO7IY%w`6v?fL%;d#Wst4LWg758yd2NtOQ-O(+}#+YzWb$ z%-JwD-KD<~h|IdXkh8{Rn?SYPOmat-l+qirV|0PzYf74EW?LazU)46fNsP-+E8mnd42nNvtp$^fz@_I2a$XnUb+y(PJ z2=z`q_5j$CMF4xhU&1z+syw)*dl|BcE-ewJ8yM8V5A1@ms4jV}l#NC{XIN)c(X@&3 z8q47Fow0DZ(XlJbp!)rXz-`|9Seh0Gyg zvoQ3oE~d*`f5WI7>eDW}qs)` zKy^R79%*z{3cNBmB+<3U?&7TEoN2H$`n|)+q%{YQshedXm!j2$UFOB3T}E|}Wbqr> z=~G$5gXVDkK0br>uW$QJ>(N#-deXsFt`R9|2IYhbGr0yfrUj$rxn-v2_M^Hh6zNRr zetYz^?y9y5*d_i3MJ=3cuIaTI7x$r%cu#Xeo%aZe`#*;uv))a^0^w$EP!-?49Qsef!mW zHc8Hc=E}k?q3zH`HB8eI-E1_ZRHRKz%4E@BtI>BE=iik-E74{V$7H!VDWM~ec50ZS zaQ-NC1YB2qB>5gMDK!zLF|N*Ktd>;VQGsh>0C-E7`WEBIu0NVndzt600m7aIv(3IS zi0B}4%`QiyO-;>6>qND=NoC{Oy4S5}Waezy=oLrT*({TWD0Gg0KxLwf!5#B=qyi}3 zLDI{SeKv(@cx*OTSL4`sNFIy3$!Dw38cqc>RS6EbhHzVU(Uh!yCJIDgr|gi9p@_tm zHOr&pU?9(4Qc}x@zVT!ndtXt@oL3b5?5~R=V3DIyy62>yp~dU2>zE5YR0SPR+7LfV z^mKToq@1}OZbRD+W7jJ)Z!TQHkk3e>2kPnn-14o5wi1saYac>JkI>~ZH5a;@ex7eHZ%>4z|0KbjBmB#jIci&PwNiB<=PI}_M6l;( z!H&l^j+7QQAcD2jAZNA_|IOvB4-e5lE+!;@NiTwm)`Qo<^77FL;$$rZvq2q+o(T|2 z+fUA~s(RG)Pj&KGDEK!Zbz4-T9mtpr~;`44GI=YC}6^8lpjFBkfMNW7-8L*=VdS)ezco#@0U zyD7Y~<0CEG?kWLI7-++6bS)^c9lL+iE2=8%6HjX+Hs(NyMYi{Jt}IMAQ=a(5sbDmW zAy+UiAfS8serdZEZi<@+f0cT0SVLXr|-menXg(!|JVzIds28{ zIcZFLXytq-c6{YS9qA#%4BBG5t0$XTpo}hw54qhn5XED9tPlffW_+Ep;khw_s5nrd zq&DiaMWSc|M3qr*XPNW4cz{qU`8<9dOEH%fR4&4kYrq7fx@zXT*u7I9blz`cKj8iI9{=CK6Q%>Z>ViAL94>O=rF{nxvsP&PLH9{>UcSs+eI2<*AZ? z6pqaA&a8KA%RaBj=H0#&yZvp>b|n@=&CylY>>c8|ooyO!qpUgQ^ZM5yWkk# zh;E0aBo+1BcTZdU9r4F32sm8CUIR+lhc~o*cK+ya*Y26&?#l|*id|}N+g}Y%O)_u) zNWH^q*AZY`4oyNGf6W4gcZkj8pa}e_OWR7~J0{pYsy=;jR$wfLd~1X(+`hCilOoKn zGjDsGRA}`1J_w!F3pgZi2>p%&rVi#K(;}5dhk2n$lbv%o8EfJTniq5f8zwmbf*4Aj zQ0mRe<}6-KZsd>Qnd$r5rYai+<(9kDN5Zx2kvS`C!*TxJ9aml!3BBn8KhpL;hKEB? zgv-$|b(G(@N)4*Jr6Csj6axR5*~z*58;_{&iXs=s39$;ZVsW z2CfNQ$DU;QitgwNeXFUd`ZtQ&=NP6k6J%lE=@-cvzcz2ntY4NNnec;#^s|jw`_hYc zTfa|Xt(EE3D^WUR()5!@?n)4=pYiu(Kx^q4`CU49|5WZl%A$?{Gy|!HxR?8POuIDxOJ1GA(V@HVA-MRo{ zaRiW@IS=Xy9i+0e!>19Yk5pny(;ugQ46kpbxW(~mo+lo}Np*+3VQ^IS`DZf_ zVbMtqi^JwdK5Oy%NT7_!P%D_me&-jV~Xeb9s>fe4bS~0EMKkd5c}{g z)Veb5!(Q}&pJC1zET5DG9V*nv*X?R!A#o0U+rg5Ss~S;E+I}C#fw*GY6T}5$TvaTt z55c~IA(o80_-;q+-bPR=JmVhL35vSrXr`HUjz@3mjgS!@Jipbdxh)hp&r9W&E)gZY z;RI`Gb2X~rGWFU`W4g|J-K|flL*~Xf0cdecJ$Fb=s>M%CE^45nZiON$l z8V&oZ@4YpVKaCWz%r!ANS$wZ{w(CqIvreUo@?TTEb?^O-hg@5kbSMnNVKIBsZohmk z9llrlu@&%4mtFvuxIfoDMlSslbvYhF^;SVVd>Zb_mQ06p5nXV{J0FGq2tD171+LK0 zR!P-mVf>KzFuPN&S$6i${NH4yz-ugJ)k8O-Rd|D@a2LGKqzMlZ&_x&=j=JPod-!o1 zffn0km`ocT_yX_m*Ol&87O#)BzY%9JvO$l93?!>mHXDc1jKvxQ#iFWnLofELIiKCv zY#n};S0oOl{7ntY&3_W#lhlc!lY7pjtVVhfYWpr}sFQxs;finOrr>M9qgPhwG3s$_ zBoiywQyqnDNaFh`w5TVwq2N=)-5rUMyOKF5J$QSeYJY|IuUR#7?LY7ionv8%MPug8 zNu1zSg<92GX>vH2K%!5>^ucYF*~oSze}3`{8ye?6DHiphZql&YtNgN90pbFCZ2%)Jc7Z6-jF$FePj<-MSFMPCTU}w+%2Ko0W``4pe6E+lB^;U#OXk9>?_v351;Utpwb9Lz+Z)MYKJ?g#+H#m%Gp!;UOq*6P--K-E z)a-GTbd{1>FD;|mx+Pf2XFtg5H*E^kx9Y!ZC}~mcfNcai^J0m?elRIH8g_>!<5>pO z>Uc{EfNEFe*D38r_P4I~*i=C3E;7mt5>z$f!H-y3bD3j{VtGPu=8ZtnH%x?W`^bv; zM@T;&$$u_Cxs{x)U6=h#plWZLi2DX1NHi!}3s`n?F6WE`HB6;3D3-vpYfddDDcp z)den-%)dXt>1sAw6x`p1IbAS^kT=ROs+jkY#7pU|osdCIEJC+r$-&+eCv5*HkS zYqoV|kgbz6`vhSzPf+50wAB36dG2(*#1j*eq?{Vk zrAmJ~Y^0V3*!12!h9{%=Q0kOYEe!6T_H689#DJi=u6$AHZ6&^(>DAIKuDkiG4Ph|L z%~cRT-AJklPWaO_T1dh6_ErtoC<>q79H&L%V7B_|peX=Z8X1e$dX0yJqnS9WH{35Y zaG?PtZg;@agn3VCh%mrnpo@bK$j)#I{%m-{aQq(ja3qMbda8Qd8aa!?IHbQ(^cVEolqE0@M3ced=F0E8jDX>KDBqXw(ndRdl-~!oE$EAfR>|MUhfAiNXBSy3v04@kvHJ z9f0>OAFDQcxBbLqQ(zIdT2!Urp8N##n_7+VyOR2oo$@R26i7z14NdqD>E1)@GY*+w zC~?YS%=~39jamoEsVXEjbE(nr=R4LHGy6Bqq7PV&n}>)|dOrE!WJudZ;$1q++C)~; zb32IS(8p7qwJ>!z3ZL`42^qN~LRg|$ejlo&6yV=&qNtF?<)aCQf|+Hr2S$Xzhdsv* zEK)N<%lbTUYqVKag>3n;t=;;Cru^%KpGUs|4MLc5No@D=SLW;zuY%2j5S-qj3DaoH z-Fgj1Hfb9#)R3Zz)|O(ykjYM+bRKl0z5C7o!#pEnb9~Ykrh!g;_L44+gtpBTesL6l2GeT%9S0Bik)*WyL-Wjz_B%}lBbmyOE=r@uv%595XB!Ue2&fi=+Wefr1ucD z10k4yyfMhGI|`@8;J^)^0?2sX5#EC|OS#&uSgcOr5c73~{NW?%Zt9Xwb47?K3#R`Y z#*ARAF?HnRSv;=PcE@tzR!V0E@EnP2_kc!`qq00R+s+^j-CVp(VM>2myPrQerK0z?Ci7(fx4~t(X|Ygk zxIi}@X7->eY&)OeP0TIj@!J%0;7C4aR|K7PmmZG-56qb>E_4gB4HC(H8eFDo-WNen zVe@7ot!Mi!oy9wPJlosPq=YN-f&mz(bXV&H8)@BfRf^ZthW@4K}cLG%^`!RRG=?|pQm8zh40y%VB~=)Lz*#^{F8 zYxK@&qeSlnK@uY0F+yD#F&1lxgYt0r82OKC>IL zU5*ob{MA0>!D2|--O9PBlEb73#(&dLfD0%buNx%Kp*K^5TP41v*wMU z2B&n{vx6)_D(dKjm$mIuSCK^(v&R{^+m-NI)NIq)N)`*_63RW=7*F4h_9`Q=A1DXX z$@7=-IV}1bv+d_At+jBE_)EH_(wPu)!=k;F?gVm*_zw_u^uZI(mFbbtHtnV1!E(8cy4gq87j0^0NE}q9=e697 z)phfg5QSE3lsJ5^f6~>Q+Q}OSri6Q75}&Px*{An&(Y$d)VY9m zbH&s;^o3;8)lM~mxVK7b`$~;9`5&G_tMD z=@jD~nk?nt4dhYmQpmQWx6hJ(=}nwdS9T)z^y+i+oey+g(!;?z8N<@I^~?B5ahqlH zd|OcVHb#A$KGU;U9)VXjMZPzcGG|Dnp%Vg)Uk_q@bPB?Wo`@MVUSo?9lbL&KH@=*_ zB3M}uRCNdi2H%LKw-RAp@Oqd{S+DuKzPtlYRakX4s}j5q?!|}LjLUEL8_mcgn{K7= ze|;u(xi5T#@P1eMQg&zmV4jHl5JvZu^EIZ+Y%%CQ*@f8M{DY=qc4K`><>$KXDv~{y zp8Dr~jNUP}1AP;Q84->s`g+7zMRdJH%Mo6;u*V#)q6-V_dxKJxii*lVXjEu+^daL9 zc0tBkTpg=_OKpCQIPNPuXk78{8D)uI|EL`iKjbPj6QERNG~md&OqC zhu}O)p!QAg2q9VW1MA6PLfc zVU}@3a}$S|lbxV#H6V(He!hNXEVM6JpPG8S{D<-BLFwbkYs}L8@*lL5tDe62pfB^M z5fA%JDDTBxgLPr$ZeG+5DtE~;b1xi~#m{Lo;ze+$F4(~43q*r``Ow-4JNLD(k@r$n zK?o_?KVXJ6$gdC+#f`1=C;tAqWGc$z;C3|`YbL_lmt}c{F^331WpMHSP6^fV<5XUajiw-+XX%b{H*L3o<;A#A3Ig(^17n{vVR8I`o!Q zQ*UiQ(|lLbKsK53f^Ur)5e+EAyIE8~Rlh7hhtJzX!{nO+A4=;Gftxr|TLyye^I9(d zMBn)K4C~dmERyyzfAq2%&=qGXfg9bzBvIzZ&N9JoW)t!hcfQrNHkArF~ z7a5H}^XamoWl@q6=iI=(@!C0Q4rB3YJ_y&>6gYqpZ*ks8f-F@Y$5@jB`+TiO|e^lqF$lFaG6c)_Z_}GzCC(`yvIg&t9;K zHxr^DwpC4mD{BMGG|ash zHw7#a=FHWSQ@c%S!>SDt;Y2BD^RoTdPm_fq{j!QD#uFWRYHF0nFyrymVL=)lsqNvb zvAuMdFnwXqag>_owiWUdNIjj20Av;BdWF{-<+{;1uyOJ$&-d^xXURSN~hbsrNs>%D)$?B}6adf}lSM-qpTg(%Lu19#>j=n+T`4xHSkZ|Cr1V zC+Wis`%?5PZ#&@;8t`!0EA7`!0rRkS@>GQBJAFPt{{>sqJDY<<^)rxt zShnL9EqYge_7ESoPVtkdL@O6v}MT6hSwK+^&L(##s#%w z@)YAfi_~M;kS7O`9a<<}zM0>UpWEO`v06@!CvO&aY*htUc?_@WV#}QYure-Q+eyJj zzjRgAqC{@01X)<46XoQ7a=Uuv+YTF=F4OwtZ0MEnc7%>PE>iAtw1e~*50XdCMSU|k zS_q13IjCjqsBaq#4p+_Nh|Et$-)x{d2A4<{v0C`|T4^T%RsQl|%8YUiJWk-~uGEXS zH%5kzhjEj63*8FcqTY-A+{UfnKmRJ$$m40Le$A6PKk;0KY^qi=yiIStJn9|f{rG9J z{JfqA!T8*>c=Le+sr!h z$-FFNc9w_j#L&vr$nuO5m$u)29$@genu2!!K3IZMdd9TAlD|c2;$+1#yMxyet8%AW zF<~rv&Gx(+j}v7OY@NUNW9qH99tFw5QIw)*5kYYbhCvhn zD>Rf;%~+a1nZ(e-5V0!L8OV9{N#JF8w(;{}b(^jQ2md;O9C>zKG#H_Kh!LMxm@e^- zxf=q8-Lx-q{kj`=OKMXBbrakXh#I|2E@zatd^zBbj)_LNZg{LrqT7mZ^I$`(wGYcI z4)k{Md@OHf+Ionk+?x!DghM!#Ipv%I7rJb(UtMx(sEu}wE?p&jGx*x-=zT)f%}E|R zKN(Zzf2wB7AA1?cQqW16eokNgqtl}}wF7WMxMpZ`w*Gz*Vei*SH?GHKJ3yjILeg}lcf`0DTqbh{(u)J67e-%Tld zXn2DM_7&61N#nB=^B53#&yfZCG!pZNy7xA}dZzva6bP2I){*XT>Bg?eBtk=__-siSrfg_|ADE@wX_ULwl-_k;AvYACH zaAFVz+2>MEO@>s_k7JSOP0Rry2QdW^gt7q73UH0*hE z(dR2%q>FDcZ_S;~IBfBm&bALPaR|F@o?Jkc?TMuc!h#snY37C8(Pw@T@34v5DGF{> zkG($mo;4>i(z0g#&Gs8Lydf@qSodozIi6U2K&h5>WI(7-Q>&MIB~@p~Lt&nz|HiKo?Z5gb5>RZutd}#KmA~!-uGe3i$ z(B_!r3#~h3KS;NQ{ruJ4usflkfv65|Yp3$O_0RW^@)Zq-EG5bV$^uRx{^bTE=N4D{ zkGke(qQWlgtS>jv&>TO0*=tO3QQxj$xj?3BM@+u)x)AuVS-P>YM5&}6v;Dc}g{ezP zXhb>|BY!vu{SeI$@O!zP3P{?*g^G5CE~K%^0R84&uFYKnwAcL|zvzeZJ;QnVa)|Gv z8SC4F)qQEaEgymsfm(sw@XzB{dKp3@0JJEsL9o(`a05b}K=Y*+{0gNvUg^~Pd%L>Q;MJD18G-YVrhm6W9z8a5nwCTxj+?&^pr9b9(% z1wPq+v*IOeu8>QRaSEinR-#j+f5bFAviGuvx90Jm)r-Wl69X0AW2J?ws7)!JC@FVA z-}FLnobVj58TnjNnXv<|X}=`vbRp{yMf7XcH6bsXgg?eo4Rp&)b!RcLDr9y&M!s$> zXKZ=RUM{wos>;kpWNa4QM&o-(pvxL)AgZ{`uDd`2b!A+{kRnb$2a$qO)%80gX1rcO z4AgK2RNGFfZ#^jkBpPG(3UGqbkAIGvJ zz1f5o=a%-=6x9`Zg($b!_8=MW$W}f;{t}CpJ7n<~oyuxi%v*9f`ixw}DplHS?c%a% zsA0DM*z={^qE?=UGAJLn4fDSn_s#>Q1Q5`Mi}^*dyfHax_w}$1d}Qo=ry6rqBeF)| z{5Vak_AfBT^rGG9cl;z`ED(@sK)x_pQ*N*O1IriYRdR3CkDQLJIQ3pgInN5Mv@Z2l z%Iq>^-s>PG+&sjxrUnj6!Rm@W$`ycdPFgY~?Xi(#>R@nTgF?7xI&rD!t{77dW-ItB zg}EdN9OkAwUyfd?c0if`wBu-dp10RId3aHio>{^1tw}T@1)jK=iv6I+UscpI*sbk& z#q1ZyCwZreenGC|(YJNgSFxI_zUGchGjCF|{Uvy_4qZxDO#DGx^wbB59paF;gzmD5 zlegD!e;Dlq7>E!wfOBF zI_c-byFyb%jPGj4h$=mi?$3Z?n20vRI3nONHHvi$nP(Fe0*#})aY^#i7{AH|N`6uJ z%r16aU7>;P%!7~V7>4!08FWH_aS#>7B$DfN+mZf&cxEF~F1DgR9*w^4`TRm`ZOAZG z95M}~7vr3VsT9ae1h|Z8onlWrodj@my*~aG*JsZjuF&ME%&h^w5TjsJ=N!q!`1HDh zu&i3qOK8W;Y*wb?$s9ql*EQcH1!^(}rF$HBnK;?2Wz4d+RAX@uraL zDU(o0FZ{|9M^#H{D9=$sxg2(&annm?8jkv3UVEza)p0(9z`OoI`||zDjurwlafS($ z@nz*dmAJO?w&niypnx5#cyP*65Q-Qo`i1A-&x!o>L{dJKqpn;#8+kWlUIWAD^BgoU zbbsUR(e;~7Dcuyb7Mw(9JKV6iR3FT8=n&rvmZZ zbyDelUkcLH&F1^2p@p5g&0r0bN=x?c4YWL~dah{~!vzm#yQ zr(TrjE-3apsMU!W93`;K2F;UGW;N)b!onSE0yq`TA&^~h=JCovOK#AcRHh9*Pfv9e zuJs(P3Nq>y1Ig3$Fj-iV#Fu(|UMP*tz;Pf@uLiNm=RI$Yck=ZZ{p&BCPHqveYlOt} zA;;VDgGFR?;ufZ6Q`F(Pdka}nuf`I|hrC*S8YKr-+H2&x@B7ev4P#vJFuAXSVpYCwrA`i@INAT_qVi{o`{Qjqf|i%AX8pfq-YQ%B`~|(5_l=&F zzuITne%gC}{+4-T^x?L7;UU69g433}oTp(uI(B9);|=Da6hj4U!{;c)S;YRTMpP|q zX(0I~i?}shZCyd+I)BgIQBiZfMiv}5p=ruC;X&Y*{38t4dRX0mEyI;X{K@Ny8HuQJ zd9_CUuxNjKGu3Q?W2}(-OYFYh(o~jf&|wmD42`oG4jHz&9o6PkbMS&h=Er+x0KCi! z*bAJKs&tXremD@ZC9e(8S=ILU%0HGm`V88Vw=|UGn8AAv(y4|Jh zapVxj`!ck!2W$h@r)| z)8d}?%JW8U{L>f5{#MjYO-M%Rp^rI0Gx=-k{QUjnn|aa(8g*Uiw?qu=MJ~o=1%>`v zE{);iUenL8El1?_#S+RcvX@#*Y^WC!Po_@l;=>$Tj_=^NP{%ge9sj6u4h2Ok2=^OK zF@VipJP~Ik(szw*sdUjd!QPi(2*li4S)e`uiDI-J!Y}|q_5kr{ss-%U=>-$x=(x8@ z)zT5GCWY#{^K!2+`|gZXr8EZ;5QDtgC}*Gdo;d|JPxZSs2Lyf%zyfapYtnv<E_&*C4MhZ8AW1gb2ElNzvzPVew9TC_Yd?JT zzFe4)zY}SaWdX%S(7#d|SUhHZcBa%aQ04r5(bR&XXz_P9-5X0Lhu9@sjv0bS9hMuJ zRzC4t-P+OVb4dPgLbU2a&@E%+QHXR2zknZQfqNC3jH%8()M)8B3bA1BUI50 zM{s(c7m;*ae#xk6-u1tVKJP}HznuAKyqTrh#iixMr2v=~S+EKIuB^VemDOeR?7RT6 zg_)W`SLs1 z!q&3F3yR2aJmBHB7|*#%arPNu4%-q%IOeMv`RfqzBa~5$bNWK&+z=il>YCx zj*?@iHm5d$SN<#3C=-KcNS*K%{C6rmiGAs5@qXBr_jQK|^r4dDpFDCcM)@FeveU>K^88S*7O8hjPY6OnIG1!G z@oB1HX!en3B&B7jcZ=CGQ^38sUw7J5J7CHlRhQK4X#g{-Sgf7)D4s7!AjUC3$)N)( zwAJO*UY?=RkH-g#_%V2lTx6AZl#{mbqE_{c0suL5r;?7!uFYJndqF*Mn9wQudO^RZ z8lPF_*aD9qJ3`WH6KgcF{NUBFZ!O#F-ANnYALkbM#q|<}zo{h(9|`+uux|&dN*5Uy zqanq_r>-nt6Taxm8)M6**BmZUS4+5*ap$h-eN<-9*9zlzt{vS`hGI#91azOLTsNl8 zyad8zD~y2mLFyJ~7oDu$8efth2%r#wHi10ZH}p(R#h_3~e#l6~q2;GPs=ibK*2wi< z*r)Bu=gS^HM>7P&b!&ljgs&Ud<+Gove9!0#5{vEQpb5C0UoIvb#*}f1C?h#cfX2b? z*XOyR%X;Smc0Rnyw{52>q>}@+7ZNz1CoJ)hQ9?See?7G8NQQsxtC;A?^SokL?_BZT zACQxi^EJ#t7?BFdjTf@LDwMuaYiSQiqxX&r$#3h$HA#HP9Ny5!d$rB^CN)*;{L5wF z3-UqS>dlFFcOwUr%x~>_Ez*w`zGS3!E8hw`dafYZ-ux9JMX~Xy*>vw9lAA&eo_Vbp zG}rqmPZ?X&9DIW?%j13OH!L)dvEcPrjlv;LCVP4@O>?Ou-SB$MqNawG+~S!J`(vYA zuk_(IUGAdRY&h`?GX|^e61OQvex*;tnj4^Cj&h!+q8H(Wix@=A3|ii8%01eN77gtk zS&lElc-$y@V~(C0eX#MoIX}sa;~02rS<7TE<0?sk8Wk%*?1Xj&)vxQJ1;b|NP!H7> z?5h>aH9D?#%WVbN`-(6jU~`Pds!v9i@Ofr2Md0&302?}ZSd=T`U}rJ&rgNu`M|Bpj z6OanUMR1SeY}P(h%SYelaqu?2QEdgZw?RoP(HB$V_ry<0(H<5@Z|f>nt=9^lm2YC% z3(bq}ezmVG^?OGCM#r4}{r9*9-zn6*r+Y)haY#o`pXhH`FYGk1D*!oT$bD|fbC>K! zIpN&qC!`*o7iTqkZK2_cHa~0dls;A0?H}d9ql3|=_<-#kH|NwiK1xR^dRr~p;s5@` z{$s{#iYmw#*4~sCymrFrq)j)L#ED5xayh8?2605f~{&D!!ZUjm=%|F7%cZIH%|!;eQcd0wP@Ns zy0(PFyiGNDM7oc~aNP0K4G7gZhP50@XZ*9=3}av1{8eHlG{gcgRjkR}{oD%pZIIBh zR&zc_LbxduDK_;d+9dpkz0PEE7v6-ARt5)6K(4rND@sRDDn3ktj)F!_5IcDG+ht}M z@;>=GrUKu_@YB)z3x(eEMdmBRK%v?Nqqnz1J=~Ja{5{pHK7OjmG7)}PDd8e)^q145 zeD%cds;B=zvKTAh&abw}O_*~tX_seInS^Je&Z93z>{na#FNL9Fa-Zdmy{ezD zPjG4Km9>zKHt_Q=H&dz1^=$N+iURoaY3CYHrH>4b23*W!7jJHhG%VfBJb%*c3m7aB zXHo0K(6hTa*#q(RUSv@Q!=5IojmuDqdR^eBpq(~lR(De;ZOr=ymF*m4ZoHNTt;69ynQ@3!uBs43!ayk1Jqx>bYAqSGY(fT^%!@=v1e!KK}g8Ye{^ z8lpeAdjCu@fbJ_VQm6imKiN`e zdLB{3I7Rb2gUtQ%K5EdGf?3<-+kD)79hmu#dRs`ORpfTV@J1)v^~)XD_lWappIWNK zjBk6jr*$blJW2rzr<$$x*>w-2IxCBbLzq&zE!90IA(0)MZ(3{Z%6L<1X?o_P1Qwd| zK)YJ;%^AbV>Gwm_w_&d!*W%)2TzDHNJx|pW1eg|qq6qG_WMd+zUW!FeV;meu8i8s* zE1-kYwdU6Cnw z)cv^G-_;>cRl4fYQUDJfG%(Mjx0wv&JwO+Yf>*T*cdMn!EmiK988a=$^u!Z2b6tt%i0952;aNMn21YW;()%}5yBJ)bxt*AU# zRogqVrO`ik)M6aW$v8R*+k=OTHU1tpoO$h2#aTaXTJbiue|sk?gKu_nQPAuq?P4xNd!OQ|UVBeEKS;ezH0iPU zi5)9xNGp(byZL<%M;mHFZK9<_^_e-&*GRU_3M6T<%=@wn=yd6N4V}>O+1j48Ag=S! zO7xDZ6#=6<=;;ckjdqy!MRBfG3wzmxfayw7t=YN_!Qzp{L`mGxkY2^j4#1A*b}#mr zX&f3smFI+9hPSdCyOGU>T38_Z@~;5rvzhHHBrZLQcz=`Y|qYQE{Y z%k(q-llb2tsbG>??jn6WC9e812M>?dRv712EUBrF3r`MIDHOa8DN%C|gsmIsr&mRN zFotEGRtrs4%nt3GR@D;oG>QBY*qd^xuoxXhwGgMJjP}>~5m-RZM?*WKE1Q(G#u(iV z{@f+A0Cur!V9Pknv|j6mF7Fqpq`5p7sD7E5J@`ZsQVdI+U(-k0DfnupckcpN9IUZe zfE+HS>ITWrFhZxQYkq!D^m%m$2jopiOUH=pmKZXVs~2)9CmuQDl;z2p5D&F;0g=I zwG0V;H;e3eT@f*OE5@|?9o(R1ixE#fw!i9mfpljxgNdL7z9VuHiGI&5mDsxLJR*>75(YwQb4$!D1#h4t$ETk>d4WLF$>YTx-7h0 zMTP(tCH6}Nou(?+a=|z14v)@x<(VvFRJ9y*p(lqbswEs%7eZhUd=s;jUM|(hj12B7 zG(rNc^_q^3HJU#|o$8vMT)M|EjSeW0(NFgW9$`j2jZLO`Nab18YY10Uv|xOSnWv9Y zcASV1wM63dWV>w%bqs537CrCbz)GrT?SmnL?$RUQ=y}Jo>SU5<$TMh@mU3f;wB+0c zf%ws=8jHFY-Yr`HzR9^dicHAGBtQ3^t|t2 zh~tMR!3^HVpn(C(6zSv};g{o|2EkTJS#oN4F5)0h1Am~fxGNInx$mF$0pWaGGs0)SM~M7;!oKIP)$2swryD%-5mX@;zsOW zW||#0xB?4d!Fl?ouKJ|oZw>s@P(FRAP)1u0JxMiY90XIV5BA@o%90A#;%=}DNqPgy zvVh~o>#937&?xoRm0@An>~b7S1jHl5&XM`+)2KGFoNJwmB6;!8K739+0n zrxgR%{SOh2wGex!zWJXAyQ?UzY0Hj;09*Otfu#Xnl6BsT87zUQOYJiZ{6o78 zsydMgxCL0`#gwiaw;Dpyg#=B2^oP2Kb{He4Jyvn3HYk)V**Ba^(eeaxtS0hvsM>b! zA*#QMq)b`g!7SgMJ<%Kl!l@3*jc)W2S@rByY?QU{SmV_(XK3xEH#3`b;29xRAlGeS zk$0gx1_7}!SFS8OhALcXswwkhu+*O?d`jTdZ-o3JY#Ik`f#$oypRdd4NFiB!W=VNy zh$R z@^+4jsRjDAa1`pcLAOOrBrS1d6)X}`as2zIg*E!YzMO;(SN>Tfa3yu~*&Y|j!J$E5qqd=3sji(Rv-UY_<7KIuM{S*i7f9* zQprw_$<^24DaXc2MPFb2QNj6?ip$-9H+$5&Q5Gmv;@Q>%-psg9oDN=^2C41i14lga zU%mR``rlK|fJdAAvdvV8h{eCG#_3h*+Zub@0I#C24z8Ek%l@nc{Q3S;N!%%}t+*NQLcMBgquSg~N0mdw43%fJWtTiE~6a*7JZ&T7_uxbRo~^;it45 zmwHG`hwA+DX{lMv?%FMxZ>vIbZFxD+wg$Ge4>p&If3cgynbhIL^Oo8y^`peCFvah%bG4UQJ?616@RASY~7};c%HILTpm`jgxgqUrd*{_28rPel; zd$9b8&l3e{1cA1h1Lgz7$r!2}*Jwtc;w}Hq`~Aj$#Dhtcgdmq)7;6CXA*+;gPK9|M zR?hYF799HEb;78~vZc4UE1ozWZSVJLHB!_QM3BL(sXP9?Y6KE@i1Uz>yD>hZe*RFt?Y*aS*2hGC8>JQGT+fB-+C$e8#BOChY@;CL( zO-oyiMz{BIjIPgJ6WM#U=F)|KgZ=a!0|9goM>TnLWpno+Mq$+!>_F`Y5!&1s^>&UZ zUhZg!LLk@*Xk7E`=wD=iJ%~v9HuGjNb8a8mNMCvheH^0Rm5_KC)Kn zzqr1e4$~0m&CdXSv;5oY6{y}yu;gqdel4OKD9a8IGmPkeZO1IUxOLG6b+s9M79kIn z;Yu4eb<^IG%PP>Wl#?P6afbRGyh(Bb^A%8QWuLkVL0F22XfcSh`#Es?`Yc{i*F32$W%7CaNPxPLn=ubBTh1>(Q`BQ1mKWGz+DNKr_9hI(g zsoa?{=Va2)1d=z}GdG1uu&y-Av9q;|XM{%Lph+%_VryuF$aQK*+0yjJ zl@$cSD{^r`;bG$jsq#;nWAO5E?w5V+s;ssAiFl*L1APw%0SqE%NL#9EGgH8qfD6#_l&BljrQyJHv&3ill^m(h+w=paNYF(s)a>+nLTLJT22A;sI5) zuL%!l08jAWRC)iB@bA-zt+^Xf#keL+Rs4zm%P?xRKz$%!4Pq0d=*!H5l*UYJMsAVx zhi6~Il6>s@I@XJOVu>rI>2A0@&7A@43~r8a38D(2Wsro((82FYrZrwG*Ac-|K;zEY z*(K&8{Q!SFRXji3_|KO*DTe!5{bHSye?T3y9$R0jF#@GXM#W0cD{4DfHTykU zlzL>zv~c^mJd|V14H{79w`yXSNJ4bjeMhBdePzP7H)?)dx@tjwpR>#S_lZ1iS`?u? zh*TxyR%qis2g;ji?D7v9v4e?D$8z+Cub&}OIPX=(4i9SSOZ%eSdPjcs;1%=pZqQhL zDbMi7^Px=-)e*yK{g}YZV!~WBV)COs5`I!X&0zawq0;jpWx_VmD1Y5)O;H46Z&qX#GL_9^ac#t(}lp_ zH|V;5j0L0_TQ%I&X%#+FsoS&v?A(aDZ5CMOxJ9toD}2%T%qAH&tRng6*7P<>>v%0V zLgOSs*g3;KDaav&8)wPD)GX-dAxh>8s)jR@9vL^QL z;l=Qx_hF-d-dEnI9DR3;aZL#$xtJ{VM~P$i-^odDTYb`U#L=+s_GvlJ_1oXQYDltQ zKB!d@YAu@2tv$tHzSY*6{xEE_X+;`cG)muOAOm_9T-jo9e?6J^tgG8ZUtFJrP`jUF zFhe{&%2xHKqAyVw4MK?dTr-SvhC%l>kqb}FndC)g9{oO6D%lT14P>08L{Jsg>8k)z z0D@3XF5uSHW3q&kMRjstrS(Gfy_Kglxi9!9U$2SG%I?Ni*$YY|X{U5&>z7>u5sU{dec$h8+bx-^*%- zr2;IM4crk^0`Z{cruynnxW7ndk@lUS%zRxnY|Cmt_ANg{)m3g(ph$k^d<(1}YTijH zZ5WwSL5?>RCK6WZpT5A9kV^r~PXkP<}e&ON8P$CihZGYNRAQTECK_(%Mz+-g^ew9ajYxS6!&9 zUGMZj+1E}1#L}g8r$L#jii~7=aiTFw3jtBFe za%INXgvUa^HX?LXk83nGhL%t%yj=S&tfoX+^IIAY8Wvwf_A)@sU_a4zISfAFb?y9a zA`4GOM(ZqUGYCEZX_sy3H8>?miJMlK0jmzv5$1BJ9JfAkvG5gkg=dJ^`@6 zJeZB(f;M{locbVFhC0hd-gf@pp__{Fh{oqTv6}BvZ7k>s&2v7Xd2FQ@Tlqix20YeQ zc2iJ|{RTR?E{(nhHjpiNjD^}0+8^Q&6W*TVE4x>YkoX6Ut7E;f0y`Eq#*=Cl7B(KiLapXbn}w5{!C{C>X`aZ7cSz4z%Iw-Q^lKJHGTaiDt=rdz$C`zNu+a4eEfcgl53lbshGE^lZwm9yNHDKZl5EbA4pz;F0#rzBnRq%7FMZfjy^+L76!I2MMj_>+H3=F>GaQ&`w- zL?mA{7_W5%K&W?SAO5DuoL6lG^vR6g);5)+p}oqH+Ct-U-SzxnTL<8ZE?-Q2E%>ND zaYD ztnqyqXIjrMz%+6^sFW(GlR^S;UeOOI)ui-&KdTkhcWBr2`00vDw5bGw;|!k+H_ZpY zn^c_{(;Q|8$9*?WK2?7*94<@1atX>vCePOb5OGbH6u=~*$Vm6W+*;*k1q=99COu{e0n((;{gJwDr7rk z45TL^M&fIdpP>D#kMZ;eZ45i&gKwO*XtQqJ{)k69wLR>q=k&81L6&j;wMiR+#c>|s zn&&rXoM+Kt_Ff|ccPS@8o#QzuRSu9S_cKwM*@r_|?~t_di+M@zp#Dm*3pxq!Poy&*#-&q?!;uS_8v zRor0C@>QX=38ntHE%5YD;KyTkGZfsDQZ*=BHLP>Udto2V_6i_UjHKC55}Pr`*HX$5vl3n~sQdQ9)5?@P<%P8KpO&`Q-;l&6}#N zG>SfR&kIwBY(? zMtEAV3S@qCN5iwj)f=6r+Rkm|pdW+$WzIi4<;|UMU3CqA706S|!y}iUY>*KV|Km&E zMs@Ea?ccDs^GMs<#y0K=y-N02UYZjf!I`4K@e$hsqSW8PZBASvrHD5w#}mQV3Ohg| zguw1mtPAbRK-fx6{#7C;v(ei95K_a-OyRMD8}+_lM#G^?Gv=cJgSnia*f`mCCAL5A zbP(By(6^Gm0uoTxqY8|#R9&wp!1DCW;8+&N!@Vu*$%We>Hbo8^6Jb_TqT0rkQ+iJN z%c=JUPIt7D_YQ#$6W(5S<~oXe1AO1Y5Fh%aqBl7^e#x%0tQrO!OJA#RwmYbjW)n#S zJNP2R;}5$awk_77y3#F9^Ed`VbOVomEsp0bejmnQHQQRl=|7Z*SybP0#owc2Yo&!h z-)Bpi^1(NCzI8J1EPMA_XnVR#UgZY=e^*EU?1BQMCtI7qI+RK-!&9Wh>IK_@_QBO3_0x_$o$zn}poKpMcOAoGR`xP&*9HvxugrWn znZJv4oOWFOEs!bs8e!33pY&DpC{e-%v85CqjG4#oM#b|jqi4_afd zQ;4jl55?-&bcDbKjgzc1t%Er8M#k=u@VYndE#14z^N9EWTzxS{k79Y0vFZtrUd7Fp z+wQ|{)8bBvwg{`bqOt=}O;1ga8m$&>_ow2TNj|bchQGBW*66VIN3mLdPI!?2C5k6- zROipmb3c}M+hW=wx{$)s(Hx>W2~KYwnaA6eJIR4~{|lj*Wc+0P?p_Led70MdoI2Iz z)@%_(_OmpF-1q|Kp%aeESs;;9f}Zf~#F^BINfjKaNC*dQOtpv~+LsIR@#Y%T|DxWV>WwHe20dBGdEN+{rA}vB4uUM5OPan&+sG7Ar@Z5 zG9=%Y?P-f9xZM$9MQn1Bum$LIaN4o; z_Zo3co^rmj?>t=Nwd+!9Uh|?VCmz#Pu>{1}$=5kc=!K`HrG33Fz!$pUsheqPrTFYE zT-MU<>r}-R8e^xoS!N^uUTlOuW%c7scQx=q)A3Q`Y^Lc{=ZdN~M$^RVErWD?_^^HI z?5NiOuLF?-#2a_#_1QBov3rk7A59zk6xR@6&y`l)&sCgAMa6bL`9wUl?Wdl!{Rao8 z@eE0T29-78t48{6&%^U-%U<`ra-QecnOiJ^74N+D9MLQ{HGED&wbZVV5e~zKg+Py* z<9kJKp*13Ig$@%9HbB=s#F>w*@Y8^bd5oL+WL8^?VRSS_0V}P)QsG6RB7k=6V-Rd z(I^7?ZS-WO(0^qL3o8Fx6;yf5M83yZc#v>Qv(`rUJN{&wX43c6_}UTPbOm+T{eV8*BC)iY63IiK4v93;VI zRoG1p`a>Ql&&(>QuqNk89=C|YJkNUm9G*I`0>#^L4N9)38-kb+S8`y!q(U=9$+>v& znr7adsy6k`UE3Q9ovx7Oz~QqE$qnQr?tJc&4UPb)A#CT6P4HKsqP^e6LV(JXY*e8Z zo(em@x6Dqw>yzsH@#0gymV$J2fnKY?M$L|?4b+WBo#!ow8LRA0=9d zvKNGvx683g04wOS4^*tIy&m@btb1NV&Jf>PHCJkF^jfrk4Ck)Yj{*Bz3%+21pGD<1 zN<70Z!NpqEtT5MZMw9uHct71Na3HU+F?c&cP~^Quk-ueh;jY(P^;X|GYC+A!n!!xA zvTEkkC2-hg)mG-2T8x^Gk6+gZA+C~EMBaQ#?rrrsG(}X&S)o!xUA}H;9kcJN*b6Z& zS1}w=eqVoO_8jeC=4%)AxXRiIfdNFB0BQfkkQXiq(2?jWT?bPQEamKqDb$MoOEEJT+_*gl~b`}J0j&qbbTWEY{<%_>SV>7vo&3K;5+O1k6_$AjXvX!Ky6=IT1VDko8 zT+$$sOsR~`!qzYmI7eHfx%AZ9jCTP^GLAoOoW@ODb-{lj!ss6|+~ThYys})Wtuvfb zLiBfjYkKQw%;CH&EcqUo!Ii`58jksN2)p8PsBZQ<+%W@YSjm)A48Nw~ zCeXknR44ElBzaDamE+nW!qL6=%N%G#sc`e*kTo}@v}K{F%j9@LM2NUMC&g0ZbNK7q z1eia$e!|i^p3I3dqC{^#&WaW{-_bL26^-ES_X`=)6KYjad50sAIp5|62#+`;jHahh zr!`b_=;nns`QEE+7+goR9o&&kbBdB$^JPiO{D6FYT|bDai2iE%c>_g@s+-V+B)4G7;FL`9sM~O@Y5NK#a6{yjD1E7%9 z;%jpwnI8ZEQ##jL4aDxD)-gQSwyJ5u5*50$_#zKAOM^iUZhBUo2Q(=Vl^#=`|LmdX zs0tm?tkx>zJs_ITSIc0|;E{~sjHWeQ%IpgJAzB+YwC<`x^~`q$)vPC*US_vl@tjD( z#7UE{U3dPV3BX*0qT`0k2!u}e~ddxsNN?D{f`1YA}VOLOO}N?~b&PFI_l17rjJGPPm|*Gm7%B58_)|GP4MCl(xB73z{kA+V0YX^f z)@Hb77_;FIde>B$-;+!>cS!V;3kA52qa+RJd|s?4*ZK=^tyxA!h>&G2@RcEwmC*)N z1=ah}E9GvWid~030|tykm!mIhv`=O4ZS;&%aU+Dc8HJo^)pqdEyj9I2G^tFw{W#gT zEdeguW3vZXr)i_o{z|^xocM=Py9-X;X4AW(Fi`9&-xUUizBZR>9n37p9vqt6%6rL; z=?ID($f&Vf^0)qcZk94{<<=RNDG-@zGh1o5xha|m;mCFM%RK5i$>z>f=Wda?lpso| zUO%cIHqsl@ar-VG2Z{zd=;)3bs80GX5I{a?kA9)+U*OIc#k;FpBV2u4s z%@wLe3DT|>+XNk>Wo7;6TFZj|ymJ3rR#y9utW3gT#qN9BmkJX2u}yz&WPPNmPm7CI zl?{BjspFcU?w0plF)1wQ7tYbBc}y$5-&pFhS`!9cQ*Cr~HB%{0zSM`&EHYZrlY?z~ zZJ{icjaAC-ag~Fbgz2OB@uzJJLGteTPHO3yl=s5No=tok(ZXyCD`|uYvUS;lISN zk*oaf2Hm?lV}cU~*huU*lkbS%=BCiOU$lp+hMj5nshl+M)k)cimhdSNxGB>I`yPW@ z4f+lRA0P~EZL`Gw?g}5Dy;P4N=gjv1RehDL&kRV)Bb>ULZ~uh7rv3+y32l-!Lvz&s zM`y-E>&#h-=-`ua)|u2?&sU3o7{3Jry`0Uz-k?Fem{I6j=7p_B_N&=)DcMETfJW4- z$v6cic^!ziUX0EN?qC%&4lb2j@2~KA+Bq7CGDyWf-`pz6HL{IGI=v0JLosH6iYiU# zmg>cSiSA)eM6X@!D^NAa~#nEb#7b5>7vS966TP^=~O8Y!B^1}Vn|R5f#!LIPoJSyi|CRXVIZ3JJAL81TOklSa+QxnIbD7)=AXc3vbFdYx`$rtqp zTSp0Yi4;DE(w<+lf21uqJOnE>%)b7DkS9!^s9M;e?!&?gupS_~dr9&q_T6nY{+ed) zBjwazv)T{q2`tr_$Fz@$lUL>M!)R2TSI1q187$zFz#V`Xl8VZ`M5;?)kGrLrV?n23 zOQ#j^+FJ*orgouaJ^KO6g=X%sGdXRC+R9wf79f1c}Zraea2e9enX zb0#MQ%Z0oWP?>a>cavdTcVxIq@m8?WTDT9~CVBO$0UOjyT*Od%Uzj%Kq3J_Zp5Nj{ zICOk1)Tqb2!eo1mH27(nbWkn-qv^$0dj}T}=68K+$$>ds3|jGr6Lr@yXKY`QgN7yD z)N>PENyLLdJGabKa%!r*3~REf7i43K7S`k|#^9nNblPw;tl&wx{mq2dA0@J?&kpE^ zq&d^5TULD^C-FcR)95B5;4;ewS!X)4OtwONrzrt^;;IboAyZ{bjz{8cFImU>9UUb^q0Kx#poaGCBNY9_5P=q`JJ8(t3hc2 ztw>6*{hG^tpMEi4nTfT06Xh>wO7?>U8urJpPq622Y>SVZ(5?B+0yt5YBNnp%&Ds4J zW^kkU`rf1Z@s;M*1FYES)g|iSq;y5lcz3Ni&vbJhcx3Va z!@y~vKFaA=7L&Ok5R)_*?9n?U3YgQ3@Jam^u0WdH-1?1=MBZ12#n~Q(mp}WP*NyFv z$dd>dYZ|K9A6Tbe7i`QdfvB|s0{#@p4hFW{J$NUjh?;PJGhdG=pMBeZZumoTYv-4G zj_RbO012+OU^TWt6n$SDHZjA{cgYMNPvm6BDt)0x_T{K^%9iB8SVl<5$?>iMEbE>9 zfuH3VkM{m8cb`V&DgQ>W)GLt81DPF8fy!3^*~kR*6$uVq;A1fsQ3K0p+fdGajghW3 zatV}@Hiudzqx@y+~PwtTePyT9M_WIyR~sd>X7&Scn2Qb8OJ ztu_BJq77ApKXo2F1Od@1wWS_ATCt8h!IPL}(l9}a)V-v05@zjc=|Gi!L2qHANXyeR zLVH@TRQFcYJx6E7-dG$t2E@4(=fr@*I5N-eTPw?gQyVW-C-J}3R~$t!#kL7$=-#WP z9{a?zO1;l9B1de!}x{R}q{`?lkUnn?>hQV{2{n#7}%iKt4uH zn=#-#N!<2TtKLS8;n<)9XH4d8+eDju@T6|#+nfmvWLFZZ;{*=Y$#U1DpiUepq!8ykvX zZHk_@remsFs2n!O|9K%Ze3>yiZ2v6GhCoGk_oMDrbG$WLVGwO~lzMkvG{S1GpDL`cVSk)>;n(28ql?AdL~?{PX!@(FVS(10 zsfM|Ter>Q9AJQyw;r)OSWv}Eb&)H9@72_-z#XF*IspQ&J`ODRQ%ha!i;iUDwu8eYE zkG6d=mOY^|IU?9xg{=|^fmkUZEhQw8lT&8dud>_$b0I-?`pu)8(Dv(NEo65S3ghef z&|FepY|ef=;?S%DQ8SR8wOH12lvEA^okK!>K_M^L+Jrz3mLI-FSvcjXNWU(T%u(I> zl;w*pdq*Q3w%Veiw5`nWY zzk+Un>?-d7UTb35Rn&n@UI*7X zPFe`W@0pxfRO&a_Ez%AvB)t&xJ^MDG%<6MoNL7ndbVsVu!9)UdrD8b30a{smimbXJ za!N_Jz;x)vF9h$c>9s*6hsrwNNAr>SZS@ZL}hBOsIjmw#6k8|I*@ z11{B;Zzb5z9`j<3EGWA`qcxZ}jqHMt)K*bJBdO&>%7h!cu~&9Y+WF;PnfY^z#QfAe zCGN%}LAdkU@Qg3Xd6e)nEQ7&EX#}G;%JtgU}gFX)va`|CB1vpJ#y@v*3YAY-2l|swfS)PLLn2PCnK7f z?q2>!15jvBGw3fAS3Z->Vp6)<8ELUd^==Garx5w#1jFZCLl`R14$%WiuugevZmmX| zIeJ(NM~+4QNfLsJ-9=b;8NG{}jWbY!ay3;F0I&`UY5 z{lM*-=hEo}BG9)Lr@}4By$BJVZ^k_EWPGtD_z1o?rIvr z5V$1$WZM}eAmLLE6gJ@d6{F2|!!rUIUT1CN_BOAkOIIgN+yC6Eh)Pq3Ln>LoW z!iqLFN>|P44h9Kr%8u`r7bn1}5KlTMpXBsQhB4ei$Z}nqN;#N44f63?PA)b%1IzUp z&O;J@tJKj|8*iE0p5{ESgMIZJ7a6PMN)>bJC{Ho)JEd#=lS&K_VI;w5jgm;O*liOe zjjr-U;DL)oc-uQPgIQ*Wo%F9Pe%`|IKa95Xxq%_rTFL+I|BAr?A% z0G^5+pdtL2o`l(rgrugr^Jz02{@t&a4MN1Xb--euj3cHBaI$nR(2|Z2{ z7tj6fBUI3abO0X?$WTb~F8o~C`n5DecF_gilkiybsWPEG%z#fBfxm{9xaF#~8LXKy zv&z9cVk)8Mz;!r9y@*6~E;$SLN}l6Y3lOKNFaeX-Hk8Z7gZuHa>nW3fsC(QwdSAkpH!}4U&*wS=eDfx8odVq zkJ1;`_3Z3h(jwT)LQ6A9(-XleSoLun9@5Z96kg=VDz~8#&MzpC{ zcCE(8i;I*yZ{v2WcFN^sp9wdV0g9C!GD4EoOvHAqk$>o%eK_hgkyi|(srkKbd&drL zgPZSd6fd+fo}sZ9fioO_#v1Fd$%R19{2#d6$=qDd;>Fm1?LTm~eRwkFJEA2y;hz7d zrE%Exq$KA!q&zAT^|-H=+W-2Lz5BRUf@jgKC(7^Lp~o-9gUQk$^`_4@!lQJH&#%Er z#PaM@HqTg8yM^1NY!6AJ#Mf*PBcHSph~=iI%5G0Qak;+*`|R2iY$kNxNgH}}5MCUq z+pozwy0w#Jm{N2RJSio8royV?-YB!-Xv-ya|MMk=`uLCn{0v`sk0QT= zL4Aq+;pv=2=dCh})Jm0w;-&(-snYIRw(eTPU>xVqoM{bP8*yWM$Mfl67={Yt8L=wA zM3s9hLpLqDm2}04Z)GrxyX`rETgyU{w0s6*=;MU;(Dyd*Wb|dtA2!+~V8vYIakX4V zqs4pN=ZON!0koEL*B=d)nLA0W`19gnX}sSo-tD!1DB7iAURa&_(ZX(d=43N+bZQ>{h7>bzs1Q! z3lpvg?ZC43p@4Iv;(dJPHiAkkv@?@{N*b ziifcTO9ekQ2=6q@jXV3);xI13uT^F222gB=y_`t#fK0a&dhAxIxxxu$*%H3SlZa!k zF}r(PQ847#x@)+WHC@2Rxa_#-LiM+-u|x8FzE+lt8xh1^)PL)pIbH*oH1i8PNg;0x zj_+0jraTOrOK+#g_Gad2_t1W`VG|*s!=?|9jgA&J3mXk2eSv}Sd;eZd< z%Elb>{Bs*)AOb)}%?(pxcFm$Vw}tt$zJrz3C$2dZ637CEK}AzAR1G$cj+F@=lX27a-!sUlm~+Tms!`K#j} zib*vT2)=!J=*a!Ua6Q$G^1)u$t&(^249FLl(A@`?I^)leO~{uQL$ zx!K}UYveioHIYMJZeJSKceFO8(^HX3-7b(B7hi#2+GNU!xf3#;t(Hj2zlx*i)NI^9!vlG?2%w5pCz>7M}{fy1>G{|{ym0)B)SCq zY`XAuYQX5%!A4VfL;@X=_sTTs^bJr$r)2EuQ`=toL*tX&+2WX+hm0?)uoL?z0GtEV z9Kpdp#TFha^Ej#PU@*U?*JO0XTG-f^W}kihQ@p%fe(@P@xRP3~3Iv?a>zA?R7lVNd zH30KN@^xmP-}(KVsD^TMs#$V>QFy)$`PobhB8s!O7qxK^!@jQ1gnOjPHNd%?X7b_0Y$J>2C}L4o~wp7=&{1a!RWWs zb*^Zpm4e%N;*F_9ItGN0oU|3^*?g>dk_)II=wFq0#Pi*>rxeYMP|^(+xJ&OOHK@bMBB;*Xg>Hj4Fwsjd*2L;);C@S zWu;YSR9J1mPu5afnRQ8Td2nG8>G47P7^>Q?n4;A^@9cw$%&vGAi%qQCn80#{)H;7M%)e8aY%`pU9#B46kzJ40MB+8G~o@JvYs zc)g}KCLh7(fWftyr%Q31Yk1%|F@L0Ap|irKWzCN4CkM3#XFzqoN*)_v4qNpO+Rpi< z_Eyl?99?ZuwLhyZE>!UZbQB55DSMHMiT>iOJJ5>kTDCo~%Q`Z>(>g#N+Em4M47+a> zVl;tg?fa2BVyKpcF6-31%n2iCckiK8o00MBnjXG+_=963OoRX*t2uQ^Iy_M?+v+G#D%mbrJ zfOp?d5J$zp{3_}Mx{YZM50n^0MnjA!POxA{m3e=FnQ+s0P*mgLSe#DOU>B~bVpCg!S(Tnwu@7hsVMz~_ zHycE5)0e`@@|V%00XaF(AvTIqrC}`)V*BI!sWyp^59h;wvL>d4F>eU{uM zwoA$(-I_-ZD7xeavO?bTH_kUm55N+t`eIeDWKZzunCzc5Z1Z60Y^i}Uhh$$!##S(! z)alhC60^F+^!J^uzy|(rzPL*xhb8L(>BYspevu~&1a2P2Z{SErpsjMXClrqu2S%J4>IsvcX8r*S-pq#csm5xQROI~3X#89vAHV3 zh@zf(BA1D!7eQ7C_W0VbU7qxd=O0F~$EBllY(iDEaH+hxmJG_|QBuOR*M@Rr=??{K zdT%3NQIQXK|5CiofB3T_$Dj=T{zH>oH8VtMd7w-?t7KL(P_9h?!O)MEJxk620h04c`=KLY^lDMl%I@rHI(fIqMBmd9b z@Z}YAFb4PXY$#2<)Hb4(r{&Lc$3}+l$VZBKSD^Z%NrR$ON*VC`7)HPP6S#rET z?^_VM-X_?TtLgxr5px*6c-f)S`?Hm4=5v71{?pO++~S5;C-l0?p=tX+u7uj?67@O> zM~1QSyVdYQ%0K<(-t<{Pp&9p!Z2vIW+~{0>arNKVog9MoYFfs5;mLilHx3`$aT|hz z3u*X8{v_k$x4sTACORpY_#25fqjKxE7_4wJP8pQ>(_KPbI;|cZJdS90t7!Rg#t7 z)-1#`HM`DCt0G@Wnx~DL(Iri@jb7=^hyBCI>K?EXLkph{HS>!#@db?=Jl;n{(S^cW z7e*l-ZHR{nxZ_u~9D~c}_)dPSi$rmPi1W>yw@s&fsSF=9La?MASDM4xY@OBTAQ+;v z4laF)33fL2Qa8fc7M#+3O3EozRn^or_si}V%-8trY@8_E|WiibYaxr+cItatufw|sBkgjkXD`5;}T`f^XwGA~GS;V3$~ zttdg(Me9kFe{>A@hf!rTxWHFzf_cfASi4;&jCHtDo##t>2aCW)bj#jODHpce@y29s z$5B-+M5))sMcXq}^Rq?;W!M{?uWFHVA$|DK-D6@qH4O}j?qb)|9@RE`o81yGhMeqY z%f`~1^GaRi&V9O%MBtyORomZ^%qY!$4WD5dmV4_;zQkDHQNrB}G`4L-YnCi3|IsX$ zQDtO5i6Ma$jrNS?o*`?pUNbtii_{C3UTP8D>6OJVqmtjmdxVlGf$Dj1{foG3&3T=S z&HJ)|QOU#b;EFCF_22v8S|0mJhzPFB<~w+Tx&tiTJu>E{BeP}KM!nC+njD`_jeKS& zYN8~uv>%N7*EkO~+__-$4h_juJIk(2Ne(CERG#0_@v65T7)~AO=zjWH#QSMf)1-6?wpAVxj{8| zokb}6;xylA*f7j~`)HSWaznGII%UG6XP(2qZt`*78IqJ?+VNMZ2x%`N4qqhpaUtcd zasYc8nW$M;k{G~%GS5B~VpT>`yJwN6!k&^!wYm-G%r9P17!EnL4Rb$R)sx~Uzb73}2BY)z1mvMhB!WFC=38VZ5z)Zp=>{;#pQD1N3DBShZhN zKX7skX-VAF96kAnYrhEqH&_jLmt~WREMT2w{|fi3;yAtlEAP}-si<(!3pJY#cM_Y_`IBhV#4VbJe)4Vgz ztO7;LI4juU)+Eb2k3#&yRAVddemJ*0gXzH2e&S!Hu0x|qlU5s)AKNOcKpPfanjrM!98O5a(`TbAR5_bu`5p)# z{bgULr_>>Up`AnR7C4QXr?ft^84L2ovGOnOs!trs@e6`wA2xL4!OC7uFA$~$Dn?q@ zTN!BgudD2J?7)K9jEpI+<7eSJW8LYufWA?T`-$f=3e#zlA z{VisxFu$Vg5Ak!0?|6l|Io`MSHSgyuGVZ?S&|Vb+7?x&0S00EgEI4<5C%f`*h|yGi z_m3v)*lTo7MHwlm$LzjsvLw9$q}bp*vrhU`GwV8&eoQTZ-yr=-NZ=2{<tU_$a(yPCU{T4$z^)Hi;!{PdNTqfag`2nUCbGyAI3`Igq|Uk z`ms~Ce_o3(19AAmI2up{5YMZy-xK{6c$KimPteUo2XcDWg6?h76u1DFe;F~p8g>=H z7nK^+X^7xl)mq*pef;LOk$JQb6}s(LP0{xqq86ZSK0LY6$UA->D1>|Nf6zzY3b1Op zOqu}sJ&_k5TTeFzh1OHLoW~3=W$lKjqp>Gn5jrh`AD)%JF{x-_QzxB)h^Q!cZ@US)8sh$&;S&p`Lp!oirQu&t{+!%sPh2RT%0%*gc z&CB>yZHJ<{+AN<}({P?NR>8vRFtSgNR7__{e~!ks!xN#6QGe074srj(FOi6)Qll5M z3yTa$Rkt1SOzJjC+kQKUVc6d2q$sQ=p+=ppJelYEA*|jkFWWeK<~xX#$VQffu{ZIr zXGG{CCCqh5su{&Uta&BAFQ{Ik9e%F&8WvH+2=e&+ZO)#z47oz2bK+eQ@{T(tH{Uyg z;6RSkMtlXhy-b%*k#=*a_v3?0)U3a4e%nEuo@TY3=O}VSJAONYPU*XTvb2E~e)9{O zu{2`kND?j*k;Iw4rqE@e1LxDZqS}E^b|>&CEJVx1BrpxM;@pN?g=_>0AB_>9jk8bB z#DspA=-D0yVpQZGpvNEnip-Ht$j>$kAB=dIqY5X@Ft+{I-xGkfx|@$rrN4FJl;d4Q zpjkl7q6Pvo(x;r?Pyq0lFQbLh?12#13gr9D6Z=hVl7pMRUmNobGxZxWJ;4%pm5;h> zoR7D;x7a@(1f8FVnu_SX<9#>3!kNEulsB7CLul zx@hs$gsVGP_!3ujPc-R}rxwAhbtJ=&UotubeiT1~;?6%3!%xdcE9%IZayP4v6BUiE z98{(NR^JRKOc#iWU|u-6R9inds-_XXmCh7(I43Iau2Sx6JgZY8kfoQG|pHc}zHaWgfV9T?zko?L4@H1X;ye^E}PUbsPF>(LkVQ zUABXPhF}6Cj07%v3@&71rj@qZ>YIxf8nA4IOu6ri#BCl9B<|Wzr%SJ7JjZWle13au zl!AYDn`R1}T(6{e(tiJ?Qi&Kyz+nX&Mq6i8eO>DFz6}p;{ouO2TwF^!5LWLr*4Cdy zp)DTb#62WO{aqoQKePcWqnnUZB4(7P%J%)jB*t~?DZN!^w*q*m?w!i7gH>PcPwrhk zV0?|9K(5q*=N&4_3gcpmhB3N6&$)t=Uvro88&_q}1y9Apv|4HpOW{Xh5%ik|On6$2f zw{I+?tKTiLrQF}}bWEG-Pec0lck71T0+*w0v~RTr-I`j;;*VGHwgg1!AGeLkI^rsJ zhMeVzO{r%qiR8kmE}o1?)x-*Rp9JO3>F_QLV)796F7yI`L27c1*VU>V(p!#2EoQK+ zO0%GypPBg<2vf=`?^)*S0`;=OW*{e28RvBd)Zkfd5gw`Afah+OFD|mZ+0NhhXMT4$ zw4&jLLqmkhYxk83X209ogz;O$1?^+U`c3uH!~4-kxYr*7&lG8{H^ovUGDbE#l)P54 zat(p8syG3gVJh8k5XxFLbBhul&5H1-G^gm5S+hV+W0NnN=ah8;ioOA#ETw17%+)K} zrpj(I1*vadh=+WEKIUST;f@!ZHF`~?Dj-;#kb)I!>MD9E)afU>m@o6(Qf2NP4DNiB z?9Z@kM*>|cVNYyc7T~Gwgd~+$Ybp!dbWna=c+k7C*O-h&6bo$Ww9Rjq&J!9D;O_|m zhHB<+9+h1Z0uI(z&~F(RZgSwa#6uGUa$$^_QGA@d0@1qA{<0gxcijFrLdCyW@fwTp zO+O?Fwb}aJV4T?R9X2Md$5mX=J&H@$ym;L2_{7{ZTkYq_1n!od*RA_`#K~9~N7;*z z%|`we$b)Ke^taj(L86!P$56rr%dD9$BBCO~o?sPMuYhcVPLnOww(8AdF?Ab~&tmw3eO zpDUUWl}O!d_zKu$t(}34!L|kObV;~5UVh+YksAHk`cu(;aoSEwEiR~IbnXk9ZPu=a z6fcJ%4`lUl^VgXo;kyKAQr{4t654Ng^i&J-7UA)Nbdgk*2mAbZdBgM)S8tl*=JDaV z+@k^i!?fpL`A-$f^HxmV&$V|%?!71!<^EyZF;V`*h@4{kwA%cM2llO;PVukMkXz)d z@%Wp_3J{~33Z$X87+(ROS}gM%XYa*g<_Gx>ee{D#JdY9K ziGT~;EXqO7h+?z|qxJefj;>-jkP=X(TIVu%= z8f(^gC84Djl;f|H613yLenqua8lhukRIk<(58PF6qN>O*k+4} zpS*WF^fnoQu|*C zQg;%5)pq6Ap!e+YfE{aw>Wf#O^5;z7P`pEVqJHAGd$n=?AXhi*lHzvj;pr#5BR)!151Z~ggHcaXQxs5w{EsIk4|~4TN*El-7VUI8CrOQ) zMk;>Zn)Sd^2M%u|v&i)?X2{1vXr@?tgesh-@2?GzGdIR7<=;hYE^_Yn7%e&#Z#U#Z{^%(;eCFxHtYU9hUo zBtaDeH@s!2RK8@;eLTwwlD=0Z(`Ak_2)en_g?+g#{V4I?WLzAJKff; zP55hYMyh}>^?~0oi!#GC6!Sv&1>qeVegQF1wIhN{cVO}h_LgvT_ylvrVO zl+PKGXL0uvAYAxIXllQv&aSp_>hu%e1>w}e1JhW* zSY;52spuR8bNs&ksIAfj=lxVkR|Wr%+s-x{j^S}FiMtuR;{7Qw{YYO%Ky##|~AV`B;}3X6Cy&X6!(JAFo$Trh*VOyY12@aH(JQm}F72~dO`_$B$TU&~s-eOK z@l*k6t9J$SOG1%8R}}v+*5~iI$R|b2^T+I{uemx@cj!rFCBr}>49ZnJ2H_~@tci+) z-z;@@doC0XbJ(dGIKH~uLsqZY580`(g%}Fd{FFkrg z_PR#;J1od=2AeJRnctm(=x9c#i((5$EOd!wGL~y5EtnY6R3CGybaDy(Ep&-fuv~o@ zH|3#`FJiwa6t6Gh6Iw;ed`9b{1;HT|$q zKILz+EC)5Y#ThmJii?y?s^tWvpZz|kz1nr@770YImzpx;FZub&nL#-q-;FuwpHddA zqx5#LxKIUN1A^@At*h z>q+?DI*j=T{!Y88S*URv&P}pSEMY8w$Fg+L(!xep15VL&I*eb6#naz?VNemqmRn(oiZ#3-XEuPn^AKKb4lA}9}L zVLJK8Ax8mdk`jV*_Xligiaoq5gJg4?^Eb}JU2R%UFuSeMd~s~Y?g@=)!#k?>HY}N| z#|+F8?LQcW{-@UHt%bgZHV;d-hA=o(32bn3TDYtR@ec6!&Q!=z13@mcbkmC}Q%w!< zaCHPTNyU;rr`4Dybd=v@VAS@WJk{nzfUWFI%lz7&is1&LXGq}V8pAe1H=G{BruaUbRH`F`)q-mXkL@_ zad1ues^kaNETdehh9|->SS}e|Kk+`1#O>X-oiSA=?$V){PM(J9RO11bL-M|iBR4gQ zX1$~Y6Fk&p#r_^ZAMc?%?db@;oKY(A`hGmB$`d`trCidG6#!(@22S(zXo|95>Pr}w#B-zi?2dbF|dEzqv2m#Nj`+Ee%BvHlRK~E$e231mM z_J;?ne;8vMaapK)a7l2ed$K!z(-*w}f7}=b>F052BM$P%5}QcYOiK;9{pQ}8OZ-r8dvX`r(vLI`SwT{$V}SmM>NBIX7|b3P~gtCWZg0&UtRl_cpt{v3V`r zt*Axy#*Z<|yz3H4_YnmSiZXB3;RIY>O# z?#sf)mJ*_|UQzRDu-QJ2V57DqU3IcI-w4=hxbxpSOMwGcxed*K>ntyqd2cdFR;*3) zQW#i*=n{b2{UE|l0N}o@>Mf9R3Mc7U%gYBDXC!u5q{=erg*zGz@9VT~>akvMO>haV zh9zzFdh#~x)4|Cji#JKG8CPRcCxzb$&#HIjRy7{DYMv#nb~lOA5PHN?k*5^_fCd{J zBIhMfNLRuIGn3#EZG&CE^yc-j85&X_Js(z-@|4=+@zYi_tO0#&%^v33f zon2Y|*-jB}ij{2F^*j`bH$z4Z9LDKgw_7o7w>H=RY%&Tv$cuE7=$ zP>b6iUF&O*Hh63qX!b7s5xq~A?97t4!LcYFWY z_zu^WICS1LooB1#KJRJqiQ%M9Q7AojvIf?NCIR&^ulty>vtoav*VyYSUdx{pEb6d9 z0GvG6mDua*CC&I@6K{7X2|WwG5|-Y?er!Uy1@L%dXqQ}ASkptzp|9Sr5>4HKX@COW5qu#f~i4A1dvVKtq)-7B6{D8 zkV;i*oo@u(vrobLRV}uYrhBMyXb9CAd#^+@h&Kd5vZZ*Z)tUVPT_+OA?bLl z2k(xgF zZPg?QYqHxNR)Bny?L<1Ff;SP!$@viCdT`81|C`O+9n zdDrIQR{&;V{&U5~q_^KLTaGw$eh_J~^P-a4$$wkenN1L+eds6`t#T(#9x1#jmO{d6R}_ELv#qMngwN1VI~3{J_( zp$`GEQCu%rJ1xRWU&cTw9DR4zs~0hkXJ1%&m6o1rjNX=IEeD6>?_vjTzp$-}W8OK7 zedkz<1AORFr#A(WpE=9fdSfa4cq%Z#O-|mIkU8v4)>OW4hp?SuyyU2FdXWg9Zcr22$= z2ZJa^LZY>3Rv^9IXi`eP$HZP`XpuhZ@+U1)E42RnSz}OnN0rM`mdf+}f`)5vpO5hx z5ve%+T|N@AwAxd(%bpB{dr}iYxlc?yKMO5b9I8MyCmh*22VGpCW~wo44Q&_i4(}>= zs{BfdYSmRT3FjAT7RwI$Phj zCH9S#o^7(6VW)DctwWivIeCvC^GU-cFEQnP>NnaN6Jjw-tdEmA>~-5o!Q>+dp43L+ zI&W^j@i$vNa+nf=$!CE!kl1>Ud%ZnDlNANKnas6_LVEdo{;~QVrWaqx%i{NsiMi)n zsIR|0F5Yew@M2v5B&^_$=Akdw3^NQSe0^nxE=gQT82BVP?w=PQo!$hB z+)Sl_$Nhqfm-iZ4e9u%lCwiF*pA0aui>%4~J>;HVTJe_Lb6$N2YHqh~wuNZ`zEyZc zBsr(;cj%OFS_|Z7_MQ#w0QDRy3@b+pQ(LkTNAslJJ-v>i=>%ji1s^|s0sA}p`*7i<$B_PPrYjd$whJs|$OpvC z5YKrLODvA5{$h>cEM%=bi73-s_lTDL++tu2Tes-IYohzi!uz@YrAaR(^{e9Kio+F5Oadim4~W zE06_g_A_si=r*>LdCR8m(Ktjzl>bogsabqQ1^k7mGtGC+WTeMLI%YP-=wOZaIwdc# ze(wu0BE~0R>udO0^VahGv@uKxZ%{^OIfj}G{>dtfB|zrq{EDvv*lq$Xkfz@W+lgYY zM=x(mOw`RMn~1(<%?At_6U>O0<|C=6y{6NKShr^lbD*bsNcJtZx-KQr5yvWupPU^T zHI-a+uBTy!@-aYgYCJYG{nOv8f2K^jX8gj`EG2k^wkO>v=a&t%9qTC9Ucc237GO+(q_DeYWx+HE@_FWm6`nyQ0m;`1@Yx%c1w2RG_q zl{2yQ>B|+U!8!I}=*F!q<3B8lP^76bZWT0!vsT;a{}YA3TrDH&cH>^Zh1!F5Bb`3x zAZ${3lp9FJD-=$#YFK8z5fE2jf&U&wV^$*OV4H~%vJh(?1{C_nI@&oIiVy2+H@s=e zR?T})%&v(R0GV7V2D#-$dgh%g95fZi1FBN?P&T>VQdjI;G`Mm9|t=7d((DO(!>rX>2StFgiq?-TSd+M#|aUE*_B|W z{Pwz$Y+ZId5Qf~r{r(tanh1M6JqFqoxjzmo8K5x z&j1X1))UKz0vDhBhJDF*5qw@G_;AjclTIn`{#rQNQ?_CLgGmf47{+BOk*~^A^rVaQ zAQU7Qlk~Ou<;NN@7b>{?qR8NQg<7V5{v_>lAPVcpW--l{uVPze)ow5`Cy7?Xkfyk~+nc=7S-a_3-xG3?QWWKN<8z)!tfEdf+?c7t z3eysY5zFo9DcL@l|-%JDqL3Idq z_!E6Q>2-q(1gA^G9TcjT5Tu6*_H)z0vHGsi;^Jm^-?S&TMU136MmAfU7UC|Vtmxg! zw25gS6oV=)_lu*?P2g6p=`p8GU5QsBrQw4KYpVi!`G=9R0M7VTVTT88_c~*NqlOWy z4+mnuMf+jwzoW!qB6x89m(!vO-NZ(YF`@l@K1#6TunuW^B z&oECMr!s!P;V`a1m5mEZ{w4B7QV98i`IP>HZ28O5F>_QlF45$DGe*o{CNu}Pw1x=q>px`W$)^U!J&u?iDeS=O-o3=d>Mo)QI>y?*0l&;sm(-aEFO5|?#ia~i&LCj`Tl$lwm0>*J27*ty47K%}*zrxcOmx@3K zKxyx);Z1~+Y*L?_UPWKzc6`HB-R=LW{{0?NR&}G-7>Lp~_Sh<2qP^miMY1Zc$-94P z(L+tGu9bGt7>3eK25N;suqnPN>Nbs5fm%8fh-a)(!;_@Wgh>7ceF|!BV8R|(fXXR~ z^2htLwc};NH`i0#V?)T}W5kE5bIRe2mblr0ggy36zKGsLj&BtHHU8=d2*2;Yf9 zGFPxrvjf7HWNs*S_G6^4;Xm6F#>*-GVd)J1!y@#5D6C9AfRva`#bkvGxog;|z!tMV zyyZpkZ&h?x^EE^yC14}V2){qLq-^!2GG=^0zM*Y`XZ1VeZ~(<{9+@w$lC5xIj6Xv2 zUQZLMD@CSzu+6gap4R_9=`tSDy+rPR_XGJ^HIHx;TkLN%KVcX5ExDy4 ziX4U2Dvq`pGt^hHi$vr(5KBojrN4 zSOd~Z>{|UH?@a8WzcSFD_OK@-a!AVva1*_8aj(}A_ZFl5D5b#bKf=aVM26CCh1hH- zQ|XeTJ+|5oYf-_VaT)LJ8D($#xQ60&rEfvqyHma5X~@NP555Q<)kRTk(WURd<6a>r zpEwDnlYD4{m*WBcqBfZx5S)vG%1}0g>{Hxq!@O5wg8PYN|AJ2gQD4cHifCGb`6m% zZSZIrdD&9{OSGZ5v(J7#NMx8=KSN-cNcc$vq&Ie~Qe(0t-mOU7MDvyeejgu13(1k2 zzKm9=GF?He4Yeqs{%Coc4>(aSXon`}M5NLmx#XAwuFp$UcT6uCO3!$w*O~|1*aofo z*!sZPT%fL|#xrDmBLt?_}7#%?MS0e12ENJk2HBy@?`1f=wN))b7OAXCKcj;|1n4HJ-#A=zS( zFHZ@t7#vF|@)hSb!$oM;e#I)~PZxZ?ac`#Uv$az#&o}pJ0!i=#I;MNH>upWi|Ic?Q z`6d^WtujHWT3J+q5Stq4UtgZHRzC3P*wgMl;bwEir^aGuW7sdO{Pi8iO_2WF7NbBx zJEVOTx&`i^KddM&J_zm$<3pt9(yzH4mWP_cD@V(spz4|&T zmvmhxM?LedSOrr_1aVtaMn2NfWf^+fv)O|{V7LSve7nfI*DRLay$}u^IP- z1gzo1pV%EZ2o~zCIH7dhIMbW}n=sd_2KUMi+4_M?Pt~vA6?{hah2L zrc8f-t{6JF`he#ak+>{VKA**P6R`$PVn(C0@2wBzZ%?X&*Gu}7Pc%jnC`QDHoK;nw zuw7wzGF5ouAFl#4&rj4=o@BOsR^A&@z-Z7-ySG2ljiLf#Bb|LQGF?R3kRJmQ=hZGg zq9HKW{Y;OUw%5AdVoF1_IF2FHKt0zD{_}o)6VDF5aFc(e%+l_>MKPsKrwb#YHbFM+eGSN2f_%jf@I&jt(0c z6>zf8WUFZ5iKFpk*}l;T#)js6O&*B4j4*jK${bthEzXJ3%}2`o1p@THr*xKy>t)nS zR~Nryw7#AokfUF_*4+ipldl(xp1UM?yZ8Bx{Swoqt<|oXJImH$5tv_gGs;lmVV7kt zldw!ql-#bTwGqJkrParit3K)x`-M#MAC^F)%DnbX)z5s2_TUg$`askA#0d3C1tLCC zk1wEq<3umUy`?@ggUd8kY3jYd7ptC~R(`^2x^@E1mwm}S!0KPF9@Ih)-+@wMf8Ehe zcYUu`Ut{XzqXtsfO|E8710G&=`$q*E(iEFzc~TF4Y;KRaexdgQ-x5#`xUu-S;NA`+ zRJ23q9BYJQ*1O<^sea!Rbe@%ko6%xeHiRha+*A8VUUKh^y3}%p_yJBX7F>n_rMH^| zJ4kEF<79HOJ8j2a>sKDb&;L{o6eiZbt2>s6xsF+ojV;>mjFFBLc|Pc{euNOOqOwp6 znRNH!OFk3rk}wHbgMBd@J;nn5jjMhtxy%&CHsCfV!(yWy63}7eM#gAwBs=^Rw)@%P_37$rRdmEJg_+V=n5Ur-Q7vxihmgV zk$!xt30k(86T;(7oeb?uXiydBkNa-vek54?h$h=JD}BlLiFr4?gb3L6`>Mk=rX!Nn zSa!_eGKDl-sUy1#i9Wt5jk*@LCymttRB7bX(4e^s&#v! z>aTdDhLtShFgEyYdOK-p;;4k8knt@ z^^(vG#4lvk@$`-??S678OG@*`wUGt_$aL=wy)0gpzV#NyA#mg;CFqN8^;)!Pa&cXd zm<;zCU20mqM^Z-M!`n0;1z6;WD4 z_JVTOPCiI3@d*pSH#Wreh@x((c~Xqwc0BkagLbDWFCX$L(4;k~*B&FUDe7BLcpWg^;;haA*=t;IY&t`)1Kt~R>3dRCm#6ywtnS-F0w|cIacsJRAtnT1PGHz}%stf#K@R*L>kB?4r&-{?&fbLGTkU)Pm)piiU1+v)d ziAaQLut~kw@l2Oh&ztH|8+Eo+jVM86=mHO>)pucQd z7FbA`)flk@W`BkWGHBJ7pT)z^KXqx&8}I;;1?kw-faH`#ve+1Xlq~~HYKC%yN*xsRs`N)Jn$dw5 z5F19S+nS$MDI1rT`xLx1LtHT(Tl|Cr!aL!~wCi+CjiUE|TAa`qbA4#j1x=L!hxw>n zuDVF{Jt{IWcWm2uT~}%fQzRB@Tmxx}Felgw{OZk~*!wkNTGmX_45jnNbRi`E!-`=b zkb{25KoTIWN&#y=RPAw35$z2PZg0v?%O_4ay=oZ$U}7?yLPLuaw1Ja{kJd^j9i-L4 zttkB~N5KOI2bt#q`zmQEf0iMx8)sQNuDaAPn}SV~C<&d%tTLrsr+Z|*S-EGL|IRf!T12%j9Y8Xzt2|N*=eG#aZ*29=Y#_4^cr18xt`RB`!u%#vyR9(Y>`vm z*zv`75y6}Efl{awfi9b7Bvfx#oa9WKG&E{&hlRio)qK3BS=kAsj!V6A zO%;nu+Al`d!d@OZwFp1=!eZleeNXXpgBd2m z=vzWJHGaWLcQ`yzTaWBosHK``eo;*-r_t!Er#H@8PM_cw|Fx&uer^Uvs~FLENU-Xw z=CAiUhUc57Q0*mua3Nx7Udyk!)vft}$ml$mfXJ++&jZ{ZYXXntx(|i_H%lrJb}O*^%{r9~`*>DZPJmJUJ9#loVDf_0sxz2 zUzDvIbdK>a!3kLUu|v=H0ERg4DcQ1rXZ>Hq`M9CEIiQStaSgNXxgolZ5*u=FSr*Io z&G(%c7x*(n-fxV*0^4fBc@_fBX6InW>Aa|@#;);P6dWtqx=1BRKnsl<&rLc@vyv;$ zZFuEv-bWRLU8X;hOJ7xi$U#X(o`%k1Lxlrn-C7ocUguW8K3l@6z~*AnOq|rRo_6nn zUHGu>iO~+fA)29{hApwdeTGjIl)J90M=2!hG+M3@AG`nUa(-1dxP=DQI*!VI?3R?+ z$E*Dj9|27Kr1JjR_ecMa%bC(8;FJxUJ7HAK_HiHz!HL~J@?JqM28>t3WZz_tmsVbs zZMJiMX|Z}Yv^S_k3Qg^0;b3aUk@77cs;X>RG({T=l8ch&>+R4RLESW*4<)epu;{V4 zgJr}6g*jMeV};UoiB(cwzExH8O3EFAE`nx5o+IM_5JT|n4(#-rTN<{w2D{#&(7#`? z^Bh7X`Zeam+~fj6`%)d7mX0b78NC)C-``7_66wx7^JHG{?C5S?n!h-M`ccV)r@i%I zUJgg_VOXRTZ9u;x8onX!_7h;~x^hC>*rGEvKT%-wj`x#J`H(9W5!+ZI(&zd6W5PxF z8uID?_?#bZq}BJSF+OLQRi}^GEFhwmo}8QhNRypoQQd>_^JEGVr`CjNJmnQ-Yh^0$ zyeWKW*Hhsk6R2%3u41Z-lwo=&PYvqJ3nqR2=9N@;O9lln-$2A=_K5yZf?H1KGkn1* zU=yQ&SVs7|mXDtmrfIoptJE-w~_dWfgvH<+OG z;&1lE$hz};b=;{~yD%7WafDrNctM^yHxmZy_VB$^cBbD_-(4x_nz5C6^$yVDERtlR2g{{4!VGA<$GzQnMs6F>rG-MXXBC z3`x-;^kr{kNVO04oTr)Ji6sBOeNVgp_?{*h-}CtY_B}O{2$hMa)&-^<49PqjOQEnk z(Wjr>axlY-e>f?cXNdJ`WP3FdH)gp(pXIApUQ;z)vONmiE1g4&IfdNr%6S1^DB)N2 zVcFn_elH)W*RHsWu3TSEa?K^}qy&aKeCAQZhi^EzLf-#B&ExOdjn|9~$Fx`sJsr`U zt;TEpO_jk1<4u~ooZ5LJgkZ{)Fk`7oWxq{30g<~f6}1zjuqw||Im<3flY!G5a7-AA>78+f@-&C&cCpo0w^Wx<$s@|K6ldSQ zb%d}$*@x*!7W?m5+(5%<(UZJC<2>ynx@E^0%AQT4jcuj4H~i(h#Qk?5nAW_fIrxkc zp7^%eV3gl~y0Jf)(gTVQWi>r^6BI5~Z07n<)>5qM*~45BHhuE^hu-~{2H{YDPD_z zvU8#wU{}~IK6hWqvb~*vJ`Az_?qMp@zSLoNRMYqJYs}gh&Wc{Y%FrHUW{Mtr|LdF= z>iI#}wW$zWfhydN6sKeuJ*t6&L(T9H%kyI5fx`|%`*%p+;wD_jYRCC|%Pr5WPUcKU z#ZQM>OiK(%T|M(*t-oK5L5O7*3)1;@txP)QKXI7UqUNii{0&LVY?bHmjw%W95{Yz+ z+!zk;qp%t?0Z-{#e;zli)pTfTiJmM!El>>^pRJoM?7xgcbXpKgp!jeSIQ^P&u%#|~ z$`r}}gFP!cJd<}A&obSrc>Owx=X!TP@ap#}@ps?y94v`}M<1In)>bBOJpLwFlzCC< zR4o@l<_H{8Q7>{!MCiAA{KDrSJxrO}ALo^ot>6-k)D^!xK8@pD-Pe$MlQ^yUYj*nRkyMU5 zl;?C_ibo+ITjMzeP1oNUoM}w=DaCd>u&?hz++WP5p$|DaNx=Vv^u4Wc3aRIu>YO1) zGMpmbd_f^eRc5BYf*UAF5p}ctrPs}>-DV4D)srfm|6!tUlr*4n``c*E;+$6M@hUbrQGo$ExymBo4>p5!C zn;Ge=D4xDT2A{?&GYDU8ObtIlR+k7kt#)o+%FGg?mvgPjail25k$@9yI#@6^>Ym+n z4k86Opu_1dR1eIKguY<*_F9+iP?%wRp=dhIuH?o|rW{%Z7z#>yU}r!`h%GO|jQQln zGyQh8$*!$m16gIDr6u#XtbBiH>PIOf(Cd5!haw`(_njq@4pR3;><;3(dH=9{{lvXg zVc(_s$|x$AXkc5SdPXkvl)^^5BOt{6 zxCCZVE&#|Rwq008e3fbbwwAWeyFLU>Zi^HuW>FSzAXSpZXZX1O#m~&m%J1$UmQ9^K zNGw6U5A`FE-!#wqBo7oYL8OUS<62It{JDnXxi1#zpiNi8DW(8ZC0mS1xh+z&`#dB}*YVXC#WP&vY9Ej>!txBp1DslGOblJO5XAxLdRA1& z4(%iRipMn%(sDtpJP)h229$;|8<5TW0H1pDz+-DnMTcqCo{g5E;uN7yRbU=*mP@tk zMlbe&&(9>^^PJze7IRvYr;bu7JxW@(F0!i9nl}}LZLJ#?BU!+Z?fb3P(xN#~qfyvRw)j%#R`UJd) z#!(2r&Xz|isA^1+T#E`jfX5TIQ6=dYH=#>CvH zzuZxLC%~IyJz^CP55Z1iF7`>L@8f=VaYOvwg*z*VK>BpWs8+aQxvf?%g_FYjjNTVp z`GiM)ucoz@Yj2uO_lBqOG3_sc6OLUW<55AE4NWK=Ztk>$UTM3>_8x4UKb7$ilhcH^ zt^w@`@l=R5?125F%3s+8$xi+192lf0E}W*%DGz_JJ6M&OJqM<#s664q4e!_b&Vlvt zsNq)EA=jkD)2d^tOi*WcH=C;0jSVJ16x1|%WT5m9%b>)V)R*2L!{m>@*j~6q)KH9S zkMF!CX&eZgO0DSgirWX=Tz%E_7O0vx7nolkpD*M4wLPIeYdsAb1 zt9E(1tGY>CU^{X>tqWxD?!5{mRS{2Ie{&91k?_Lx|IUE;CF!>U^~1~uDX@^P*dj$6 zuN5K~YTo-kQd*Uaq0k6mHh&{sWSE=&9jL&1=e}9mZx~FgXd8Sjv?Fx_@sw=0XV18? zY?+l(gaNo8WKBQ)T2w+DMdcbTaeH8;mF6Ei7Cu7X|kokoyCxLg}?XZCKf z)X;*q?8Wy3ox)*13nvmfBk%kD*D5X9_3bC- z&>29TMe2*v&*A|TlwA^%Uo5Z~9X|9;IPjErxsn|>4OMqji zS}Cr?=NgM06F#}5GD+DQU*ji~9rBP48Z>Vnr$+;yw=E>i`dXF#uym5~IW56*!IH=k z@x;->ygJuhK2Vhn2O0bDZBPXWwA>$;ly;?uBgNAQL`1Mo{k6y`%lBZVf3KE^&0hb4 z&6H`eZa76(IkRvP=#3@1x&5s2`14G|!fnF!bpcXjVWh3=TI>g+ zng^v>%g$~Gj&|*1j*U@lz2bVXwmx#sFI|%iMnRCusw8DqW1A=`8LN_#9wG8%a(X;= zj!o~*wQTu)am4sZK)o5_SHa>D@!Pf^$z_?IsHAqxBM%N;12HEcM}1d68#;x1d8jt!H#mowp%D{LX9WYvnODRBw7*}OA(wtD@k!wO3`b5E?@hXNPb}?44tv1%C zS@MKLX00b8j4XsNU&r<5Pw@3|+Ppc$?!)h(p!ubxg_8LgJA#3`%g4z6q`Jn@;DU zdTrK;Zrl7#GH1V6mhH0HmMLOI5{+^!KDxnAQc$OiBhHrm)owR=v#a-&$897Rsr)8D zu^RE7Lcjz}j-()G|IQD=qSqN&|3SFt)39WT*!*UlyqVESh|L9^b4@{8Bq4je`b2(L zDY2IBIpqkowvS89T`#=XsX!4(5ot(7otL1uC+hKJlI0-yNxeW;e7&7!r^$jL9Cs%n zpEo=F8A=+F>}7h5Hixk#-(P5!aF!6^NyO$9lL)<*FUdY^O)b)1sU99pW*-TC(f3Nl zn}AS%j@Iy(4ymw@J;eV8kdx?P$TJ_WI6YPFtjVgHW<7`$FwoJ@)5KVLjb&u$*u=l*oukhA*yh_ofkFjS%yOM8qRJcF~i6NKvFNAMldoXYE1}#-hsOPn;3Sg%3;2CC&zn>Zhfh4k=ITQ0p&*fYZ2GgZ z;+E;9vD;)`p;^a;GMON^r=r9Xe-s+W{2lhRK`QKxRq*nV0#r_<7Fm0(+&kE?-L`?( zhm`l}tj6lcfMcV6Um~I_U+O@gUUA~Tws%Hl`sFPb5U@5s;x1UN9oSD|+WJz}Ry7tq zNNYs^12D69x$VP?BT9g)S&5jfF5TC~sCHeShHjM6jFryr$oJNk%<@6GH-iqowq zpFh&~7nnXl?Q9s7w7;Bk_T6r0)D%oA<6w+d`Y^WL)6S zww`wJ^M+6zXf#>eAY{u*BA{|=f3$guR3PoEzuLl_^@5e}3kLMd)h4UkZh;a+F|LKZ zgid&Bm`j@%-N)S0U2U-$ip)EdCaAe9cki@j|I%_Gb|=b+g+P@B5lLtW)|tci`G0D2OciSHqd7q?BBfgEO)JqT zg4e}~I&Z^c-&@8wnW-cAEtbt|_I%Xnioa=G>WIy2lbXe(M?~pFxM3;=On4Q)spdN9ILf{tj-;#qx1&CE5bAf*01{&eaxbru=;-3;T*3oDh z9JkA+;nt!9uTV>nM804DVvr8}?Rx2O0~)mpN0=i0z$LE`{ku_SYS3eE^4s4I9V(FF zo2rlsC{DX|Y&ZR#GwMdr+bfSN>v{d9UQ|v)kw*02R}Db!Bvh~GJ*H#A-N`F#qZKYQ z@O|{LMpMI&rYC80Uef}X9z7WwqXUkEiwxR>TrTBFDd_UQkg57IfstrPE8DsVXGr>Z z0!dohmzAm%}Hmjx7D@y8Df}~HQ-z6SIa%V&$8p$8A zIjSrw5e}>)c{Ivq+<^@~13%x^CFPtktL+LN>$ld;ajacxq9(fm0rlCD`8F&E5_gqd|h4O zNZp`^1@T(Vq2J)ZnbVVWFjSS!*TC8#KUS1r31GaeaXN zaj#2m`*T|JRG}+ii1kM~zV-WcO%mkJD8((mF`ZEnP3JhCLFdU#aBc+u2{M zvd5zrW8lL>8~5Bnovu-|kc=5wYNBtQwkL^Yr0{pzQ_HTp-Tk%;;o@k+?RZVFZ9o5NBLcIpnXsyH|NQ~`tnaLqAXVk zy}o50Wq5?L-unLU@3KHmI^C3biS9CG^7>+im_66$3g{v8{{44`A6}e)G$#Zc%VA@4 zT~Mz{16)(N-ZbJ36pvfK-;q$swRat=N%Trq;1L}+SHMg-?!y9Wj>cePSxxgsb}wLW zR$Q6+B2dj%vUmo+xi)R4!1$>;=i}EottLE4&LqpsqL1arpgI#3i;u#nrrXGY9DU|dXgnM zYwIabegcExG%V_Ovnm`XIA-8Wp&hd3u1NoJx&Z{1^E!Qi|4+Bj9wQlj+o1)o;(=c- z>*U0F9g70@4fKtR(5_AF_Dt&yj&-BKa*d_K*u5gl*;bDpqjjK_x3Nnju7Rt z>_S8__MkGeO$;pC7j2B>X^vx%5O=>tzjbX9W_UAxo{U65lD`m=VuD1kjsR>~hWqSY z&n9#vUoJu~?5s+2lcU<+04Igu=<8pPm-g|@AR2%f6G%$l0|+-^LTdSEdZ&U;<@8&b zC-_&&Uy(a!ra=`aOk@FCXZ4q6_}~AQDSuwG!Nkhq?%!T#H{Dl~SxC?Q!`i1szXaxg zv@&Stq*2?mUe-0dL%$3*w}kadS90a<^NcNt&oF3X7O5Y98NKaNwefgOXRoIM zbt#7Dgeg0VdEUNVMwXQ77163Hys1duXZ4eHJN;;ijrV|FjC3B=U7+sksA5o-)^DB8 z#td)7H0^`Dsj~TIT}gF@VzdUK+l%x;huHBN6y59JKM#gv&TO{EGKXU-?`Q)iVZEmn zHwNCyC)1bUsN#yqH#YJ>Jg!9oIXVJ;=@$IC`NCtKAGus=bABO`FXbi=YPiJCk>$yt zjb^}9?xQu*U?^hWO-(hTN-#>Zbs0LZL(~u3qIrU4zQs=-QKI0tRp<7YoU*0uz`c6@ z!~XEpQg#sAQRVJEOD4ZwGz7ZN?^*|BW*F?3yq#x*$Hc+moMMqri_vu&sI30&iph@1 zGykl--A$QC^3OrMY&doEZD*QsgWvkICcPUk{7vBSS41&dIkmV>3lV?*n(XDTF}iWj4gm0-P@oTfr7_KWow6zWTZkB8=_5uByLifr1IC4$*_nD0WNqE5mjI~fE>c#|CD=X0xW zc*wy0%d58HNM!hP#Lf^QdU*LJf;1;3%C(wse2;;t{|H za6nl(>185;kp7UeB%(S|47SYB1yTDoPd#4^^=SyTmSp`RSR}q!*LxU^0HOaY&#^Jii)A_xe<;O z3STg}gf_FEn~@-9%~wNPgM~Kpp=`O)7@UHLmt{Kj#=r(Jx47SI@q-kz}FpxW?|J$4A z&wF@6NOLv-IZyAKOC*T`yzVPjk|c`>o_t2;KYbCw;f?70$-$QIDIlLj`VR}{n@Q3z z->yuj&-|wkGqS3`z?hGmgRieD&!QfaBRR`A=6;$Reg9|-daP4IuBD@k(cToa=0ifA z2WWnjV?-+GuxEZbTHbcytP32tVk0nA{%!qKvgS+hH2GJiyZ-P#hnArHuUXTz=rbn4 z$xHvKs=xXHhNTu*+x0Ca%8?3|OdXXjllt6$tLuBd?gJK1T-ND(FMB_F*1Y-g5vtpd zBXJR$v!0S+kWl4R%L9P-Sm4a1a#|O+HNCa1+Q@Kk*q_IyIqu?H{dKlD3yQYV-YgSi3ZL(r-osQv~2K4@ln-*krL8VMV6< zB|19KX}ynGR4(H{T_c zH+>SOF6(g~r)cMfJo-#D`0;`RORv3VqP*r;F8E0BRe1iPIBMOVO*<3FrY!Dmgy z-7N*BFHn=Rutu1K5I!Qs$fFpgJNV(S1k&o4F=+VY6J5G@$%xEO$;!@Pt6d+PMv&ZM z;!3YAHZQ67^Q5Dj>B{Wry62x}LTBl+AkzDjiu>GePP8-R_tMgeMdmGE@b7{@65hG0 zl}~udPTZ#3RYnYdD);X69-jo(Z?8qA}c>mNFHz~(o zSrGbU>7AXgo!h*V?bRooKvw_TPR(@6LJ;nkTXQpDp)cqmPGMj1gIqBuA)K?msaR?dcE+^MeKidxcMCinlaQ2;5&DkG;gXK@hu4Ia3eeEbD>Awm3e2Y9=6B-)O_i#^Te%@y$Mf#?w7Q=v4?vRxH z7Xu>S1A1_p-Epw=zvXD>{6kYSGxS;;cSO3R*#2E!*!k0!>_`UL|6)M){)++mCfGb} zl!~daS{Odq&I{In7-ka7_^CQqU?TUA^yYw~)Dlc$+23hRys>(tZGR6&^exiav41UJ z4pQLs|2ow2(|GS@SEJtr0JKW){VxLKnMK{BVyF4AJS7j_&)?l z(t@u@86xoI@Q-v%&V9|+lejx(sfFB!ou5@go{JZ_@{F0o`BPH+yG4;}+XE(Ijj5~5 zSuKOevLzX0gt8oYzd|wJ<5hm|0!3xOX6%egpXgfg{~#bYymo8Vyja9e6b04=Tof=i(kcY;fi0tp_VxEH5rDems>P$+$e_xoo4Yi6yvI4ig3 z>YSY4-p{iu#MZIQ$PB?sPOd3@B;vmKANEG->#I=JZMgBZf?IWGfgH{`O%hBfrs7?V zXDkMjoJ;IYIEi0psMmk{r)v9j#Tzc=ADiD-1RXufBscz3>?q~4*1-~lA7WbTr&@7p%&{VIr_YNz9oDQ5j!&UHfW3)i%2@AzADnt0-1)?L$Wb;Ss!5(l5zpX7M zMAK);m;tg;ZK8wro9!I`EV1+Wz0|ML+zF(tJT?)j4$;>@pNXgZiCKu)D&wv=#$++2 ze7iI=Z6?3Q`9+jRTm4#uj?6%~I2`AbShZNnQ9n&xEA|@}2|8CF=2K$&!X!LQ*Z|%A zyD4|p#dW1Gj`gD6StEO8Hl!{LNU17Xx)SgYP@sFC3V-Q!+@&^T^FZp$*u<~Jcf-!A zw;~hoVmhhO!P@j|$;kucGv?&`t%ZgzWSxKw&o&5_2<@JR&#jFzOJL|-N+|hn# zctGh$<2s88$Hj)^`mQ)ZY)YxhPjMASrmSn{T2Ys~*6}M2^|FP-p9^KmFuudcKv^MEBfAi`!9S6HzYwC9UAl}(S2~Dg` zJ?pXyTYU_sf9NE)!V=d@6>Dw||04xY0(0bLDh?%FM0D(@Yo(PoS2X7^M(B4L*%_>N z7!eqiOS`u59j68L)=!{m9Y^iGX#HsLzZiS$gapsd__x>(yAJ*d>_IVw1^rF+ygArk zsS@|q`h=&;7&UFB-Y_PwGaGL`PYn6-bhrvW@yq(@-n8iA{)XkWBBOE9iswEUY#(~Z zpwhMV626g;csc51e9igOz*AM}y@ZNuzQE zpN_Lei!#J1yvJ&gkuRe!}+*yvX-V2HswZzzs8u%e|J}nS<7@4jnC1Kd!X0(i!dOB>> zq@7-(F|5DhJPv%OGHPdcY{w#LIg)&;)fmh{Hk8|ZwGWOpp7cm7Qu{9ZQX6kIrkz#f zEP$0-*mgA`z}TafRd(O--mN3=>3eZPF^2+7QbI{Qtq*}Z}f80=6#VMvnpq5{#K#)+zc8H6~lWm zQUi4|g+BOS?1c?#w8#K$3vrn(h9WaL_e-o9m#L7c*Xwql82$lFR*n{Y%Mut&`n6S_ zacN?G5BCfC!%4g)eeW6W(m4xJx9$2eje7weJ5J!an9Os=KdjsPTBt_#j7}xvQh&GW zA3(8Ai|r(3i`1sy-M(7KVSe|_%p!roaij|CG!E;ob~%BCaO#o929Jg)` zyQlw&-LXAtjY(b&L5X=8hSi~1Kyx6z;SjxBpx=YS3t!H!O|)}4Yf$_FksF&1pSMRk z5-c}wlMu(0+LD7+9@;Pa@(BQ(KrPG{iMdMjvkOlw{}a#8Jtirlq!dW;5+XQxUEe;K zAa_pQ`C>&2LU3bw^F}jWYUr@V@XqRr^8_(JKP_gOLaXg$^|iM1Y6p$A=jX|U3h-tt zWIO)TKF)htMF>rB}BJ=8N8V z%m6YLjt}>}`bA9V_$=;m*Es7=s$)!x(8+e|xA##tZ`>;KmP(bShbx;xfKk;MnN-$K zk~b5m0+TZ+T()b=_2XeqT~WrKF1SXc+_6MWY9tJ`Dw8ToDCC{fM*wO-+5KE7582If zo&AI>iB-Jb^hK@qQ!X~O4L!rxkBuUVynjpwmQ79sT?}88Du(5-!u!L!>|c!8u6VqH zY2P||_GApHi{UO%NQX6)Cs^$J&seocN?ld=DC589Osei02`DiFx#B$S-^O3FWZ z$9FNQFiA!_KkW_%J!9+)?tyLe+rOAwCr9;35i;-Ht*+CPj7{_!TPo_wnN@?BvKBc1RbR@mWmc05Y(*U zbs5Ye@+ex1jbQgUM2Vu{s8@iN3bH zr#uhf+DX%8bgRi0NX7i%>spvqCKz5f^HPK0gzQPRi=edUeoYnB=qLw)2%F(XXwhWgGa;g;NWS@2dYS*CA_KUaTN z>j3B2r6t0w&JRTTqB|H@rCUNBfgs7bli2#Of#d@F>XN#jozDKy(1fTGB(T{4ozQNc zBT9kz{d&0cN$x92P*a7es&gMYL=zs1C`l3K{7*8C+Zf{V7jhSPv#IUQz~CwCymm%Fd`@@ z3TQy{+8N%kXoOP(f5tX)pomCl7!i1^A61+|I`lpSW_%-yu%KcK;Fxc9?#@QU29t@d zQfhrHlGST#4Wp0k zy;xpprI@h3Qe!>cs$Wej6vh|uO7&SwZ~6`T^9Oq)QD|>+7*o9LPeAna#49jMwrRf{ zt47n$=8p88(G0{(GaZPk{SPRc3>r`w4ftB6WLJQLXf>l<{kvJEvmEU9_}seXmkmc{ zL&KDAeO<+UJSROT2tX&=g*;Y4vFt;ZC-ir4Q~8LprKEI&t>=ph>x?d2ZzlDvY~ zsdh)ujILj5Ukjy0e2V+@4ZPe6Ip$opz~!4MVq(y^13?w+@j*!y?mx7&BtAsH`8m;% z##>yslIr~En&nc3mLf+RYd{y_IozCZ>3E@<8b_NFejpD15kO(XLrnm38 zlPW5zOGd!VQj3XMcE!#kN9SblTmX0qFi_KBFR2umSm6wQuLD8-DpCsS>x-aQhM-D| z4G!?h+kxUqMXj6o_%wts)UV{>Kh=*1Cob!1Zx8>p(v+}ZXd#rLD$#?Tcu;@zK>z@M zss>BhtWGlNWDM!>9toXt66$@7M?1*J!kZr`a}Buqsqg~0R3~72TI)iwczx4<-J5TS zeSF%GwhhF?1x-`JQgqFAD$c;B`}H6f;`_^A;wO z3$CL_9{vlSidk;A^i1-XymnUZ0D(66S>^i1y(qjl;aj;wW6cGflGNyEvDDF&35wV% z*`alj=Bf()*iB(fgNEunsVGG#+cmo;Udqq5AoA&r`af6sV8WQfQ~n%8=LGU5;KtmY zHSqa;AVuhH{sc2~h85*ypZVzqD=!^%lLV;@B_{%n0CA>-1!ARbE@gGnGMNm~ z;82G2W)~Xg_OROA9F&j+i8mG8SyY+g4(*UC7 zLS7uHte5tWqo(=WRpcrdi|bbgY1!ZUCs)K!ub_mYjCQ`$>Rcjg8eYNm+w#wboOyJx(3AIaX zXo--dUh+?R!p-cB(vw05`P}@G>9@6hzG8wmlyQ3v^IQWk)-Un9TEPph6BBtxvB2yZ zWcAhkm?I@oGOI-LSJFj^f6V|sa_y^&cFAY=9O#?*M=vQ*$7;VuT4LOB6P`(Bf2D!~ zLPOWig9`XpamdCdZz-}=?dlK=czDWJiJh+%4BItp><=HOON2O_j9>L{Pz98ie{6M% zPi4LS8MTao#{i@}C-28yQ7ARyI)O~;{E%0&@Av{pjhF_H>(3`GJnri1*-9GlCNP)&*4>uG(k$PnmCIZ-p`b#?ry{p zsxE5B$tb%kM7^kA=37+%E%z*^503rcUD)sa*X1)!FX`gUvcFJqv(u)@hYOP)h-4fr zR1j_X+O$(6Qo%s;wK@j@NtA%|_|C)7_Q^kh-kTJ0OVx(Rnbf`4Gl?c#1L%A31_Sq0 zh7TtyU5p`f8wluI_0Le}Q391#hsMZXnD3zgb1GmDayc9S0-Pe^+5@$90 z;^msBfi}Bnz0#Yyw4ZU!6+$%;WGN!gEAA1G4KhrIl@Z^8kJJp@)g?##o>?P8dTZ|8 z=G-L=)nAphl-MvyB+c+BD@AANA^5*vnfJ(>$gtPLdyi|e0AUK?;ZDbD47tb&l}35XW6-3mVBU3BJ*0e{@^+hbd&D^ zn^tIAHFH>NwaEI`p$n`=jogpk_qa&=b)@Wh_Orsm@NW@B>UJ2Po@*xfo@h~)+YyAv zwl_Mc<=_x8aL;j1R&aG}7i@B|BZSw*>qBYxeu&VQoWqHKy|;EC2+h<%w7aF4roaA` zr(*<_Vl>9F2W(O)KTNH&{Pt{fFnVV9(3bD&yg=1##=D1HF4vj5m|bQAfpiR%nOO4} zR3+t_dfOc$wilzfgchF(Z56EafxypGP}i)(exD5`E`N$v*5n9F72Cm;ANh}u{uL0A zv)89Q&_5?WNU(K`cpZJ#Zs=oLxPe?@$;icxR|<~X&Y!PoJ7J@wtAw4Ds44y(WPBv~ z1VYWZqi)N|*Ndt~%YO7{4I8}2`#DpSWslKIU)+P)f_IJ{ow|XxBU9{fXd^lw1atZJ z{U$DO8{&4;2;?NXY5ludy!3A-js4NobRE@4TU|pDl>JH1@|)Csu~@1*1zp2Ic}}g? zP@{%09%o4-Avc~*q>h_@Fz#l(#78RU`LC4`+y@h>=4>m$%L!C% z>c;iV;ls4QJOyhU*lVmXTLkVH6s zTH4S=&<=j2jMf;I!gU<3yV~AEX!!)Ux9Cb|ww(>{O<(Ynsmcr(zf7ik9s2Im0mFR8djC&VGDy-+Aa!v@$DmrE1rB-FnYLBMteo`?u&9vg{ z@@B#6f$cH$WHirtGR{!9-2}U5 zXPwH;aeC7_lr>h7x>I5`P<;1r5l=yF#UNfdXIn8K<&FR$?P1pEE; zjBse+V1_~#;^&PSF;fxF?DS~ay8wUSYY1c4gj)s%8gr%eO;nL{MW%HLkd#G912b1F9G}0RZG5!SmEtt+L zC3WR5v_wLG^ol$NIYV12po9ZNTYok`pH}(l9AfuPzht`Otz>iSZUE7#mTFd>5S!=D z-?|%9HLEqMn)6btJZoj>2d{u+J*x;tY(FQo8|r>CSo2RNt*eT}N7<#-Uq}|dPl|Y# z{3T)^w^4vf&C7}nCn@#$!Bfih@pq{}e}-){Ztwf(h}92IxcJhLaC0ybE_$QY&+z32 z_3s=106<0|&XK7A9zt*7irt6&KATkc51M`+)PD0Sc~9$_XL4SR%ynN0Sw(<=Y%k1n z2=*S@O7o0|*YRn5#h(z}p&hV!bTzlc{W|{H{+TQrZ2%G2cRL`MS}u94v(-=zo*2f>s-o`2V!x72 z@3>8GKz>~*zWz8H!9^#oAutjU+TUE??9;_JoBjFc zAdP+iu-JEim|oR?jmMpp!P$q+mwDLJJw z459`n{JA7PKN(5ErT}NlwHk|C0}lsc6&rIwfqwu`R!88>V3{W>K~u2!>cOj=hGJYN z^j&;V-EQ+zL4n>U54V786uRltEt%zkig4pQinp+LF<;J9ZhvaIceGt=x2V3BRy6r5 zUDr+*(0*0Ns^Du!jK!3Akn|MO)2vxyN%#lMdEgfKLm-3b53S9Ua=X3<<554CQG zHLk=(KnALv*wSIX;tJJI-a8frlOK)YjSNCJK4SU&A{ zLgC>A7N7a9 zRZU)zi*L?T`O~Bxlh2?JGmvl-i&~ahsonyEm#4+?OS7G6PSx+mgbSr9Wb~OtkRUPE!Ko=RhmS+hxSj@H*YdL z%eVJ%rt70Q-W(pPc7RgZG@3-p`u;43fA!HckG(BRYvNS> zs54W7*oiay;O%{q$XZJ^b1|dC8zxjZq*?bW+gtmvyd&3nfNNv=U@jP+vI%UdwxBz= zZO4>&EHS0uG1Hndr!}8Ro2MGkU~m|N(S@&txpsT{KJcZGU5;eK{+^%1N|F33*-%p( zQfy-?u1SWSiFKRARWhR!hn>FVtKE1iYC=M;f02U=cpb4;l=|s_%#piK@#wl`F6|G` z2(>$}PRi?g6(|7lu~*0Wt2F{lPRsF3_`vUA5a3LcZ8cRT|H5x-0ibd}J=XriS#Dlo zov5pC|$98U0&1A}x4#NA5<$}3&!$5>{?#NzN*+Rs;!4Z6vo26F*^{xsDZdu64e3x@!VZ!rbT)d+}BERSj&mBflY@#K^j+a8CSb5 zk=!8)E05L(Mw!JP<@Z_k!3TsaHiA^Ln8h3``*@rGO7M4$PP}8j>vHo~EqES_OFCGI zqRp%S(EY$OhvWaBIl|+t|1<;8e&sJneJD{2=xRuUh{f%0$%VB_J$V(2des>9QW&k6ejVbWfgq1$Q&%W5F|( zKQOTo<{X!lY-J~A?ai5-O{lED5>{_Gx_w9&IGcG1z@eI6IQ{O@x>}>t=m44SxH~@K zyqWtF(zJAu@4^TG=#UNKNq7VF^hf(lY(<6ihZZ+Q<5tK#>v91!%+E06SLBMXLJsTg zzC7OJgYO1QT{jvI7F5I1mWY84Xfi=6_IN+56L-Pw8VPh#l`!o&XK93d6mSM21A=(Y z9XHhliD0;;b{;P@P$^&cH~NWF9xY-ya%L|D5^jf?>WU@ty{P7@AGEETEkN3hVb7?hqQVfBN*NR zK97;@W|bvP8kXL>Ysq#jQjqcybnVnAgT5{QPk{idK#=*T7V5BVl$li%d@`(8Zf`PU zl|OBJG>BE3lJnbO8sLVEHD@B0{L8dr;YA@@s_=jH2a2lS$&UO_f52e1KP%w`n%DCW z;4iIxm;M6T;N+WqA?m=j3$v8(v3egBkaZ2jY@OFyiT&bw$M*!n91qk}`=uzi!tYQ$`?siai)|{l*o6g39a`3u3Z#+?wX%eJ z@?|^w6|EdnR-xdH{C91}e*jlG4}~4(>cMX;Pe%p7MJr6JP_?l-er(YvD$jo+CWB!L zE)+_%g|-^IQ$dIP&Ly4}@u633;Eyc{71y0F9Tn47u*kqBLQ;iq-6ez$S~ju0;?7@C z8p-DS40!FccP%%2P`oSHwo)?FII8LxSL)};59(KnZP;q}jAIjN&zP?-P!?g@I`8xH zk@R!fn||`J0l3C(LgxQ30lpFEliHq0`V~=&wN$;PbL3GQ)|8`O#4OFsVV!bEj7&2~<*%<+I*Oq*I6Cu>_gPRUE@BTC zuzhu?YsB<7z>?{(|D}uvFRLbTv7dFrJR!le%0V32n(2m_dn;LMVUzHG#SgX1CMCHl zV-AXTEh9}bd8~>J%|f>nNBVzk64z07I%KZcL^?W9GhBSG>B5z4MuxyS96CnE< zykJ6wrU0Z(03^ny+SBxn5&nU+AUa1g`h8~zFH`L#1lNc6kepfe2FswG!l=R`mYw|v z#`38IP7b;TbU2dixo{OAmQ?~x?fWZ-_svf$Ln4Kj`o3b@rJMGgE+u1SO{E6*6PE96 zd#nT&)l;k;ulbN@O}io(!_DHRnlpwR9yt~htcCH z9*IeUP9Ad9?4;f6XzBFF@y!7m>x2~$AAIp~h$Q8F@v|{vY4NLHD8`xkL!@1v}=SajmM1NNIg`eWL`fJj6i!^a1 z7L9wP7E5&2C9}#g2Jbk)Cd^#SwrpBB$suqDex%bJbm7uu(FqE%P*7{K&KREvr6-nm zfq`@fKJL$oJ0_fO_%6x`g$ciH;A1@ZyyqO!NV_vi3iz}DZFqy~fMO*H?T4a>! z=dsD+9V`>lBYc>6aQXJ){xf87P?fKQ~(OL2$M()-@U=P?@p11RUk zsHhQOtO?LDt*YuU*h#P`E|@%hxZ%o4u0p|#%zyJBd8UFfIAC|Bs-ZV{%qQ+AsPAQU zf6q+=|9ska%oX_PPuN&Nc(9W%4s|KkN~KiCV^bDy2dXT0ioc^`%(keAPpI^72ToL) z42N5wcw>-1(=@|#^-ufxPf;8vUo5;vn6N47{fY#0T1^>OGsM=h)u|tNYHBeQha4S#GJF2?mvA3vEG3S+1cpTjIXt5;VuOE3^Gb= ziU_15TSBHX?k%S2gyp&U<{U`b9OPVFlW3J?&_0lFp^J9yW?Ae7CbldTEM13Jo8!%Z z(`1uf(aZzG$Ja9=wKg5?2AmIAle?-6?BV#)z;fAx2a3i?)O(Msnm_uS>LOuZ^Ji#P zx))$LDV(fLQk!!jy3-m5n2bdME+M6qXmR|NH0mu!i9N8B53iLHPtFy0raq2M_?8FU zg3VLgE+e5u6MFR(>%gZOw&XeeAML;NwhJr7zH9Z|Evj63-THoOI}9f8*;KB;Q%71e zbViVo!BNdrwB;^`3Dd-DuWtW5;9TuR&lS`kC;Ui;#;}+OcEbpAL+=IxMyNF_k7zwAtw3%rm_Pz-=N;nnp=j+B>^7HYU{EKfJTuL@x9O=(&;rZm_} zN=nLUbrp&$BuddHQJNX*p5k!VVm0Huq?cs4GO-+f^f=g}=`aCz2j9Z+er!5;9e1Ke z1t%ZHixX`Wnn^lqD;+j`YRJ~HAz=gFn5h9sLo_k_AxU^WN?&!wF2%E_<6spXO9$;-QQ{Pm}&e7Ba!?1G4px?#F#rZl??Y zqy%AeSR58Od9$@72_Td?59C5z7f$fzCSFm0azDry7*=@k_5ez3F{R^7;>?!3sTthM zN-^1og=f7jF#%T^1e<7UNv&&-c=TxAz1$j0_ip|km_Qp7n(2<`X&%O@4rFFvs7YGy zAIAY~iZZW6ztK(n`j#J@64O$&tk!B=KWNf;(P+d490SR8e>Uz8$L$m&B_M%{z@X3!k=YH}*uW+Mx7XMs_*I))4dbTln} z3UB4=u(e2so`jkjxIYG*U@C8WCt5DcI89C{zId)Ib0{l3Jw#(8{9O1=q@XLM;(6>*HdgE8W2W3GKsZ!`E;SLV?Af?Ix?j*YD+9YsN8ez%m4&P43qpWia0)_kE^E*d9fU6hua^ENFpR45GA^m$N%30(z1 zY8Er$(3SGmJSd6Kg;DXC$fd2)?5yVzsr2KU^S4?DZ^bV42C-q3;6^?Wsw7GuAu^`9 zT56}#TJK^pGaAOjIS2wT;;Az=%vw-Wcd9JHi4%9TEmFXfWsQxK#~dYJ5?DwOBc69< z4@|B%eNDr3jl=KERq=2hUTKI>+U!49^&&`7{s(aWQFUbQ4DcIh&dr9&`jArYrc}*D z%)WKPMXix%L^&&)D7to&&1#sVVH`PkQjhnUov~y=?jOJuU4FNk)8YpdLaw0?!kN-* z-!PP#6Yupy`v;x9W=)w2XTeXerbX0jsZNrFa{PCqH>z&W$-|(`;~+dhNW71rlP4+I zp`HJgT1JCNY|r-r6Asf~hJ?z{&%u`^R`hFcQ`Y?l=t#Z|ur1Si|0-V1QSW+i9;V&` zeIRKFu=%ZwN%N=I@Yf>|Dr(7GuKlnO4tVxQR!Z_OJ_b1%Ru3fQWvhTdFA-U?639aHF+5h4fl{6XGKN3%)lIWlT1DrZ^PF~1BFuc3W_E!^heS*$0-Tz z>Jz8lP}vf5UZjgKnX<(KW%G)eacmxmDTlo|YAZO;5+~zx%h0@Hq)f$C_PrIi(mht%DeP^Sc_o zF=NlOXQ^WZ8ZN%Fc>d=4iR=2`K-b9n!1t%w<}$N`|HcU~NzuIL4>oogE&5`tv0f6M zfcn=Zwt_xQqI}mM+lJEX=u7uhhIDZ7F#6We=7_MsD@m-TSC98(nY9Q;kV$rfYLmO< z{M(2h;NSEq?(1;2JhjwM^1UW4*8AoJ$Q$V4<(ecJp~sf*31L7UY!RbNU0L(Z=b*I@BQr z3em5g+W@&gb&Jbjjj%b-cb*9QdiM$bd2_NXGnoY%S^lmF5eP%wk|pzvGO6eyFjJ5k z$hs6*@=~h%ks$g4^Yk0vLnQ{^XhWyO!?-Z$}Tvvq+=aJ?lWpTLR zmPqU9ehcc`wK|E96-U^grczk%$45TeaRdLl=Ht+vKQNWklUHUn$TW9)4b z%SbRqD{5@wARXGI+E{9d&zsH0PS+E^5&7~<9q<__!Yiw1ggh-}aR>xAy!gSmxO-gm zAeB_FF{?fg31NX?zcJ0on3XSW!XGoyS;1vcQQif(X|Pi(%%Kc(tVYXBN{<$|B`&q; zoJDnVb=<4HIxhwxdd2%^S4H;kNc6V222RY#0@!~ z?I`-rjRb9Ik!*lh;99aeL-C4elz^{=!ICMRcFKUmG$T$C0)A%X$wLoqsQ!A*GHrC#a@oedbV8=|5#(cguE&pytT#i z2cPwj93>B<6X1m2yK@2z@1x~!N4HaxNfho+6FMO2hYt3k2p234YfaG-dpO8u)IB9iW)jN^=fS}EH?Im0}acOUZg(xB3r9VFbl(W za~MQLokRLc*N$x^wS?_CnZ#u7--FKOYaQc_p^G^gGnT7Z22%(*8?UT|$(SBf?36LLf9 z%sh(YZ10Vue76@6Ti-d7YHj?-r<{r;SO?vOPZ7sO{%H@nyoiobZZUB`{)1W9;+m_p zNqP3>ejil(cS6=KuiYqpAkH7-rG^|RhW^T;UFnn`f!R0N*R2<&Ob&6f-1*1*`(v_s z4mJw~Jv#aM4j;m&>y-`o$oO0kWg!?2axH1{^`Q64R*7bEIuB* z`%(M?OnGIpIYr}zdJ2r+pBDcEsL2~O!iym1v<+X>DVo(SLJRVGObJEFO3CBCU|KF5 zv>^_qf@-V$uzS8>m~ua;@oyYY=s-IIG!Xt0A9=x)sW4RsU-Q0|@vn^~W*@(r-u)~1 zaIU#GqqyCMfPX;*ew^uF?bq$o<%OV+MZV&3k*L2=2kY#*wm2NVN;@*l3}w2r5b&r; zNv0i1WoB&d+{y4@yttx(zni&x6-f4gFklh8p7@i}oP)@>|3HLOp^SM6$`Q~u_#XZ; z^atVKIl2bPMF8zjTdFa3p=~~e=^g9QFoJ%0uR=tT^6zI~8Kfiehh}9)^suHQ5T;qr zf;!Qptl}BlWkKMal#LlJB+4433V$KbnNRd`RIh%R zTtacaE8bC~2s=dmcKe$$y9|sO)9UpTllxHNoF;3V?CZ7*c&_^@ph2K_%S+U=o=&np zs{DP?lDQ02`wbo+#9A{`ynz`6$bN0(__BLpmb%!WT@ptX@(wR&Bh&C@&1EH!+BL`! zo|mH1NoUlFU0E>UfE_m!wNC-GmKUrqwUx$Viy3Q9uv0JI9E71Bgm8c53sT`}R%1`_ zNIB?C!6526mOj>4$|~%bp>aLQu~|8LwgdOI#rpxKOx{{jQAB((ZQ|t=+iU>bAp^u# zvB(nkWV|nSQq`>LRgC+{$YlJ0V;>%5$5Iuqd*CS++^ZNxC@63FhUMGFEEv>O4hh6) z=+>$%(f-Ku>pNG-JE>f~6G+%QbbF_51%7&s&1k(OdbQ*xZWjIbd9l!`=-Gw)H_6A8 zc6`<99e&PW_#qc_FFE~NXBpB9hF;E6v+Xg$*o0+6( z+6&+id#9~+Kh0ZD!6@_t2wKFWl#|)qsmz6YYIUp7)H!Eqc2 z&8G87wM{LSkW17ZUAmJbFPOP{&cPmpmhO&rUpE2qA`(;9qqAJzIJ-aFYTxJ{a(MP3 zmrC+3feFYPVWh<4_47nYEgI;HjT{8$c5+xLYs+&q?VFs!Z-Rx>KB|q^9NGhVFj{G< zACRZRAZjkQVt^NApOqz!nSK3^WwL+W^+yWUwrljlj5ofm-`_*}{Kx%R3~F1O?d!~- zY#C{K7Z7+c+!O?ZCw$9J%--za`xwt@meSu2_7HgB{1v7WyBV2h<0XpEyV|wf>NW8^ zKS*X5-+feH*}iq;QT$U#Kz#*^)yt4kD|o79i+;RU2}$w^OAE35fp}3qq%kT>Q8BmP zbf(l`n#-S0>)`UnBY1v@=uf#rrzpqfG`;WbIm;z!^|w(FyRKBVYtDap;i5DC|A!YI zY*}98B3u@#8T!Fg>jB}wqzR^&!^hcqQ(t!^YJi>RJd60l&+zlbt!WGAuBibJ{*o)u zp_7t|m8`3DW085DsnHkSbaTbp3*WHj5&@AO(hh?@<89`;D&a(%?VH#?>uVXd=QpZR zO{1w(Oxu{*bi$s%e{|DJL7A(9h(E}7j^T_QwH86M{fdH!CUuBbpTrJ-yyl#XdP1S+ z_oa&_!xdkinBj(^b)F|?*na|a_O6uv1M5hTDGR$So{b)B0!gqARJ<# zvGE@fd_u|g61`jk-?Y8yio5Pp{HGj1m_EH(I89)Tr#a?>IxqFCKhyyi9yosiP5esS z-0hRx(D}# z09VQ2g6qw4+cGiZoz(jNqsCOG2izCR$VYK*U9Lq$sUDK( zB_{H&O6e+NyEp}Q2o&cj?A)5^`@RWr=gn-q+E{&2(%Mc-sAi65>pe7w9$@l&v)#~3 z6}dA%sqqDT)R=kk!Y8_$Nh0b6d=rajqOKq6sMu>2a`D;Vxs0eNX@%NMjn#e(dH0{k zcAXR5%s_e10k3z7i&m&=Br{fB6A>B%V}mQ+rUii&m@9L{g%~uW!0zlR(A^l4;|3q9Pz2 z9G3E2#BdWWXZc&TgJ#1$T>+Ew!UXdqV;D1oIOsV5x>Xuj`tw;1!n@p=)P*0pqTX@z z_~b0Z>f>eJZm0+Ph%0KrbBQF%v1ULXS+|qsBfisX*hTMGUp)vI3aJEXFNOm_AGfMU7uvi~3Pd^M@LDW@~CV5SKy~7`^kPc_#d_0o2 z`in{WyM1r2&RfM@JTezwSw@|L^MnNjaH1O?DPP9SZRM$)UA7)aU5-j0oZjhz_hSIt zMW$}2Z+)FUUv?5s(uTUATm9?S!kOq)oSR9mF7luCRXR3hx<@t3Q4I!pmToIIp%=rm@WL~B5W2X3f_BS=UZ(3i zq7rA5^h)lexo`O^JPogte+Ey+J*cJq7V?9#Q4Z5J>dKy1_x8?K{q=OYG$;h|)N~rL zDVZAdo!d^{F+Mm-k%3L$2Iw)dxr_ms*cMefE2!hTyKFfkQ!9n#rYfEu4HN~EMZdk0 z?T{!Dd2(c(VXWWU%jYdtD@~z7 zO=Tgdz|23-hJ;{C!K||NH0gsW_bhDj?sO=M9NIL%9mmqb3`h$(0icl*1h*gZecHX3>(hgZC$zvzh({mwtV=9A~R-A8vrI>kHPAOyCK&Ag!;`IB^T|s#Cg@qblzk8)(eKUWF0~xb^wI-6BmY6Nul>_qS&F7s<|N24| ztli5o40vePOYA%QvoKy)-!r^4Q~r86QcuTL4nJ~Z9Uy0e*2yB?QyT0sE#cL!=EB(o z3y8zFu?G?IkB3}n>zzB)69(YWvc3P%EJYNA$1Oe&YP>pw#;h02Yrcq7iq2|UIFU_c z*S?T#E&yn=kB||byf{aHPUKKYgBcP4{e*b8uuJZ=x?4P+_1as&2)n|5JT`IzOps^j*d3O1cwy z_2|tqq_sZ(JS4B0`{)OYg}3B;R)Y@s)$t3W(my0Xyb(GkbNt#xa;ei4L_s zL-q9Qe*nLj&grg_4^^3FZfPF9F8$z5$q06g9^UR+TV$7VkB3hSFmo2dzu+SKyEwU% zfSi7;Pg(nfFd%|hWLCL7Uar=u0p?cG+bHhSW0o6&`S!9nGR?$m>3IZbRaR^4JkD8! zzRp9N>-b5VZwtK-Z`xkr@Dr$QCDvOmlHVa=&YZ9mceMx#qp#}2OfKM4hT(D4&#lSN zdrZdYBSxKK2`>-b5UL~@J22(AD6*1TC_3WnOWp)&WL}DNMCQD@u5bmg&@<#2!iyp? z+q+HDIc+;XX2&gM^Eor2iWwdr=vu{X8jsmfpIq;VzHA&m$0(3t(y3r6#t0RiluB?@Ll~6zx4<7cfkQ1Ugd%`2a|;tKy@3 z4?0E#6u{d0g3U$_5Bm*swemvC++DE~{(1T?Zmm6drrPr@oM8!Mx`k_b`&sw-u=Uy4 zm}aa_u8AoA*^8!hQNgyk9eko+!D5nwOdIkV^ZK%4$$Yn9$mfuse`AIEs9i#U_PQQW zvlsJ`!uTW^y&5uqto)Vx1Zn>kFV%q+Cfq%R3pF|^?usiY`gBM=bS+3@s2(V0NPC%~ z9;xz%fn=>kzm_=rdV0SqeiWbfy_Ru=o6u2(r!Hij0{{!iZASA7E4O5;@}>0-u@}&ts>*01N*AV>~ase zD(z)#N#uFK{&r>TUrJ)wV|ucjWdo)a)f5B|H8wlSus)B}-e6A)zM__h^`FW*cRDxA z`Qx=#4Sdtxf?hgYivoK~{!TurD*GRvf2|M_^)GPOILG^0p|Ao8)_*1F%`yrCWKce@#{tqG=^W1BW+Cc8ys0$oVd08vm z#P4ohtboJ8(XRu2%pX+3h)dNqd~RaV$g?1|U}+8&ZgneAT1LlC25HPZlZsJ_6DX)V zg66`;$m@0>>7}Q0*4Yzn+p;fTn=~JXVpC3Xu8@;_Xj!Y<{+V2CSY4+kOH>o^5h;uN zWksjMRHpZ*G;>%Z;3Il9d*^SuZfRBzFhds&^11~HLLI=kp<1ujAOxd{6}QQUm5L9; zfzmM74#MPK77%@#xCf%0>4!I|YVZ$EPJ&U>x~lM$q@xU#JZ%lh4=T}Y(-Mo0bj=!w z{Ykq~JS3j%fJ4T-JR^4Fa#@*VG*ur{lH`Kgarg1GV@*bDynTr%yUPp-$-d<{@Ejy?e-Bg*QF-a z3(lZ*7a8*gWTfyFwgNC8-tww-e*Fiq4tZ?->ri$N_cQN5q?aGpKlMJ=U!SirSqa{W zQ#L7k+s=$lB9z*2r%W}a@(({jDl_o~g5&`9OfJfl}A>MTuU%mRNQ>9MVWW~9c0NkC;UBxI({?Aw-qyf ze@1FmlF@w3g2@$5!iUz^he8gRgP_}ecap28naeY*BkhO^6)P6Tq3tfMqq&TBUm@~F zwhmm%L1Q5uf&yYp;-5cHAGOVF2Y;8Zo;sQ%#iJCH5!Z1O=eIDvpCIZ>c?*;jO4&j0 z2l90n;)86=s$N%?lTc_GX%uPN+2|DZm`Y%})_5W{(zgRy+m1}z4{_&%DzrmcRV_D@ zBm&Y%(5TMdI?Nt9S1tNE@Hc-@YHEheyQLFiMku>ZIg31{&oi)nkR8<^|ISR2zz1Y1 zJ^ON5e|8@b>#7iadB{7b8t*rGk%S|9uMo&NbCi|u#BTV_lO6yNzIo*maG@nqufy3| zTq@qm_Wt9GVy>5*5e3$T#1_A1Y`XFj{FtR9Dlzit>UWn$Z>yU2LCNA;8y2aIg-S{7 z)}ie*BjRMLf0!6t1JjVKm)`TAerjK}?*Bw4!$M;7x8)+m)**yI2d_OA`EX_+kcv6K ziZ%s{$MHBu@L74X5Qe*rzz@4zvrHN(rmYqhtXs(l8=C_JpNF}v7|XS|d>9@4|7N;< zs3tD4Xgv0a0mIHLr zI0@PVZ{D4q?;A5G#^;QPbJ^(j17nmyJ zROW-UGS&nIS%@Xy?D)Fy>A3%$ETASYY@2f1(^u@suKaNA{6}oF6#aK>>`@kksGfjC z*`wbW%?P19iV-&HmeuUOu16~NmXxuT-yJv~JENs#^eS<6=8{(=zV{xqf6En%{*)JM@#VYGnPGSp zuT49JSvyV#77M&19eS}*A5M&1q}L}{lD)rAb@#p4&e$Q=E30R&yyrJ&E;taRg&OQl zrgXR5kfbzxl!~*aqJLfK{Jb&e$_6zdc2aN>JEoKT*Is*2di`aM`kbGgY*Tpll%KR( zrgvgf{tlxka--l5whfJv1x%IHoyxa>=ZtaFJhkM zP>rYKxkfX4Q^c%`u4Hme?pD)UKAA}HYQDzWU^B{9c3x>DbwWDnXQdFDGP=@YX+2i= zE)3Q){tqC(rETsM89R6YUc*bVt|xR^9W`Db{C!7lPu`2R~jn z&5h^c<*dT84Kt)^AC9rqElfnX*AsUHj+@FItUBehXenS_2X1Xub{k@PSRz7|!#<_1 zH?-83=;z+;qjqYXWkceV+|EL6yOm@xqg5rzsb_&LOGK(jW`})lHEBPG9-1E=ErS!> zxxUY(UdQ&ax#9wL5N_HC#bHSIu_Cv7Uf1gdR_n&?uj5pvgKP_$5`>4N7n7#xNGvX1 z8tT3&e<2bZ0>x@Z!y4rFW_@DaPxq}SJzZYwIg#P|uw%DjRQU|j`SYfZg7>^U*hNE- zJXwk?_p@D@48|Z$8;OB_-iyGr8Yg(NEw~57=rXB}m``adiF_Np?26h$fA`wJSOt#> zKBzTw46yAeaB#W|IxCb>Kz$$$kt0EVH&010qrPdX+W88zF&b*J8nmCaeE5`fy@}p~ zhN&5dtNkopIrb}2Q=f~ggY&z1B?%nq>x7eAayCz0XJaRhgk`W4*<|Umq~IL(41qmB z#q}%ofYx}XLKxV7W&bmam7I96wqek)QtAB$XUsCKuYs@uGzr}!XQ+&yd{55d)>}ns zqZZF3&0XD=WwIDg15ISo#umUpd@xDg+kb}y59#RfE5nuk0YVUos16=Y=ifE5CuRPi z+BK!WA|6j&oOT;Q_IGtbw0r}9RSK`F{sI00I)eV9K6mt%7` z=YA-(vB%@^Zp=!9YOKq`qH5gl^9bq>h75f1<11(MA4Ome7sV+lAOJgw^c0p6{F#A& z4tfup4l5chdF7*P^@A(xhyCUr!nkLQ2bFK}mM`y!0_#)6^!${YHpop93u`?O;aHYTGH%A7s4 z8`_jzPn>{e=w`wpn{m{Zz`x%7n{alQBRKu*k(yXP(qYdPs1jGfugs;ECLq{ZbiSOs ztVK!p#G>@>b3V-<+&@(Wg~vP_e??y1Mi@+@TO*_#Feu9>kf@l_C@a-9`}%#5>o=85 zXIl<&C8niY14>fcgp{hJ`>*d}Xf@V(6Y-Zqp1j|`8$1o#snrT{X#UIL@swRNDi$>U z+hn4Abs8S={vNK8-#O*n=c2+~iAG-ZY`#E<$R2j?*^#6PJ;0D?E1cBIz(BcscHY5q zcOGYTGlpVBAq;BI1 zn~GkF^f#i??|i}KS}cm({OwKnQDmRAoEvL}yGnv+uhja%idIfc9|!X|^s13%Ucc8o|{&wuKlI#(}-P+wrU-O2A1@m%GD}MO|&S<}U zUQ00&>yO${&tIqfT-S2dt3``@BegEBKbX=>5sz;pc6beLNs_)%w4UT*UBBbF-gyZ6 zs2Ic@px)VA8b(XHaZ>eo^@~l`$od%Mz4%J5%eRdN>CZpgS*XkM7=TK^X_RK)vmL5p zI_D^O{AjMeWUSCzZRY);n-JBI4|^;mvUAtWHvu}gCrH3En?Sq+Sp}c1SZExN*g1S# zo&JbJ!`k=vn^>3sk`vmm7b&uaBb|D()I48| z#6ZhrD2;nUly&QCCNp^03sCw08QPG(~2?FnD@okqqVdC8}OR3sBN<_vw_0gBqJ zs!p)p3(d%McJv@R+q?Ju))hDL;uxyNrE(4~v4_G~d~{xeOwPnT#>myw1Wn2lha*(i z&~hgI^DRIqIpmD8EZ%4U#c6c( zNsvWl0pC<4Juipdbb5#kN*12Po_mz4AL*AJP${en_6znn05Dc;MS)YoAz^X!GSJv- zloXQ{(Z&XDw{FQK31ieX@vwhR50bbUCeKdGLnMz};z_|NT41)uY2b_-jY&4wPp<=i ze?yk`wolnPnQP+`H8r%5%XwK6pQhbyaGWzgx1V0gR~M<^j@a@ZFfl^QTl#ZrWvNNq-ETd!3u_PoK@uiCxP7kCMgl zkOnojWwFaBG5m(Mknx8U_+Fxdpx0ZDF>4n{*G{CJPm=ZPHD^1#u$gtlSZu@`;=iUL zi^J4krAAHDNk7yS8uXAo?v+ltkSZ_IhO7({9>>Vwc4?>%s;j01F=*rntFvhgH@aV& zArv+NYK}Fni-M;QIwya0KCY&_XL=;;mQ?~ZoU}#(XuXOO5k8#~*JC@ZJ3@POhdKqO z(;_+z2CXD|uEYr-LB9xds5uCoC*T@6d^_K`->&kkzBDp#Ib09k+*mWJW+(V4(9qz{0sj z3t@CFjOWY*BJ8N@fkG3@xf>ikFBTb5q!DEj9d2eD*`7aC6Mw3ZTXkwzj!mXoqCrKC z;_;Qk$*6AOHFG#StdH0t2-iTo%;>-&QYY}ol8k*k=+nH4 z_ocY9WCi4tZMAx<4H?l1Se>caNKXBoGas^^c`!OwrcH|6YQ_}%iN7&&qwa;hpx zsj~n#)%>!PK)l1|5zC>CwilA(D}nZ2yzM%2b{5n?`^>nCI;{RK_r}+KLER4SlDME| zVrQ|t0pVKZikD7sCXOk*>OI5pVqvn^&``!$%Y)zQ73NZT8^V6e|3Q}verrKsL$Q$B z5%(XASaCk(>@CA^wtY+Wxg<(3{e$dVr0UW6Y4e{w~x|D7vViT&{+nd$73T4xrD zV8Qb{8oDa;S$(D`Ekbp(sZDa|{k{|@hZVhtyr=OiXDW7|qR8(zPTBm>+!br11WQVBDxq! z*oz82yxD&5g8|_5rvTpN>W*n@P&-YDq= zS4$VpDVMa{Wyli3AqrVS+l7g{mf84T4%)TX9bmOtBk#SOM|q!< z0=oCh{5)ex#i-%eB8Tqt))7s|QJfaOI(ck`FDff*B+k|f997Gt$Ke-V)P3iIm`l#m zg+lt_sJ&YQq_9G;M&~f3l{G0cYkqz{d(|t)9{&$#m`2W{RP2s0=WpBXsi+w0Kowmi zkJ_o5QUtk`M8R8+ld_uhp6-IIE^xO+R14CiW5Am~rd=~8qU<@g8yfKT-~cw2$^FW> z6L&R#U2rMx^2zXZk(i97ADaeDSlCHSijNi!sp8vG0_OD0&bhZjXp=8Gf0<5raXhQS zx99RCcwa?|{itzvZI!9mo$#v!()^Bxk0n48eyq!$Qc@)qEhZ*cEjns3fB)lhy^Z_w zjZoHUe@M}mw5^I14VM`em_;cyJUpaO3}(^-et4to7wFfBJiU1`c`&ddUXEv}BAMT^ zk%&0$bHi#n)G|=y^N(9JfA8b|Uaw_x{S^HD?XIL+rNNDQ<39ia?+;_3X|$HcLe)Ze z{Q?_7FnRNK8X8!zRi+U$a zX4E1Lp?BY}_mx|{O;3ZQH1(uh9_)X?^UFLH+~nst@mg$6SSgyjSXD;{J0xUm-iLPg zqX^~1@b$PQYI%>pCr^?~hO+?}go7u6tlOFPDFPnbn2KkdI{Q5;nq%lYSlgup|!U5*tWuSRVLz!-@a7--YFYa2?PCVWf;0v>M$6DE1A`` zU74QwIjT%Wu3!=Gf^_4dA;Gfxv?0L`LnVc?SsGD{aA)MVs>5{Ohfuk&idKBe_#Y7; z;j`8)`LLFWgBRgMmgrJ|+6^*?@2Ah-T&8}X(QPGJj_8FT{E>TaFlWrb zBJwjF*>9qC)O&AX?nNT4jH+Z10_gQ83JKWVJwNs*AYl^Z!00a#ZZdQk<#?t#QUL;m zdw7Sco+C>*#0LYuZxmDJ%x!<%n2_<|{OPNI`Un+F z)I(8=5jakG|pWweP^;tD96S1(oXxiI7p|r}+B6Z#HU<%Wn)k*P~j%`}3iD-go0~{d7T15IW&$0X5H74+3&qsT}2zc!>X6jzlN^NQ2IHz6;TWBf*U;a^e=2oU9!? zE2clbc64!?!k_ArtV_7xx(7-d(`{j~X9Hhr@W&+w`{NDI*IccMmala5%5nOBa&+RO z0|8fFJ92UTRuZQ*ki7eaC_cM|8Gk&&NO}a(<=3IVQ{eexBO3guI(!gY`rT(P$twmod8A|)G;4>h&_+Ij~T*Gl*NCd<&?rwtJvP{ z;x)WPPMGGR+c!h9jq=XnFp2^WQgso{+Wa5BnouV_oHn!Y<+%|I5xS^yWfE#^>IU<@ zB~Klu`x)!LQ+6Uu`iUPh610<587%>H7?@<>ViB3HNhA)az%F>iSL{37PmRnrwNwcl zb&>Z|ovR~Z7Q5K)-ci!Yb92yM{z^Q}0B{G8Hx^y1czIQtGa*=IBDY`cezN$?UlquK zd0&=k)<r_t)8Nzs1@ zwU3@Q^}Hc0YGhMyLg^-qKWV#lwH-Tp4KM7JU9(`;;H)>uCW@$h0q91Ik*TJ4DRc$c zK?hRivI8@9$f8~pM=*!2zEFlnxrj|`9mOlT%r$ehjpPL0Y*l$|iL&T2S4D0xEqKw> zSn;&wZONyU_EK_Q2$r{YEw^|VH?2A?E+bML-x}iS!`xpI_ah?)wpp&Qg4@!ts|yH- z#S#h+>!TMOyj~g;f3;h88u_Z~wS4Td3(V9zG?lk`j9}}$SzIerLU}TSD}}C6qj^%7 zgmrQWqT7-W9E+{&RfC+9svLsNd`?K#EHh-xXTeOWqKY13)YZwm(4q5W!I)n32qqHf ztne$e>=7hZSIQVG?9LVMH03FgD8v|&HjNj7lEK7f^+M~7!JxhoOkL0%1%;JtA_b1) z_TGp$@i|4nOM2C4H?u-h#)aSR&wPfk-ux^`JIsBS5e-hKTlrN!#!W)&Zhhp`0%du_ zk_NPSn~CQx=kHHsIpklj1NnUt`?c|7hiYi{oR!adDv6jL>R#B&{Ouk+MK3*kC$%LH zE!65-NxQFctoyJt#;sl8O8o2F6YYlL+ZfrHn09C2W)akyYRU&w&CnwE=L2+@MZImr z*t4O+SiN7C(#t74GNUb}Ap*vTgC4{`7Azy*kyOpBNF}Z_g_v5R3>2fa6RV*k!EorqTxjU#g#Xasz$9}` zuP`vX^WN!}LYL>(wRNa75=4t^pG-HB zYNKvD0xz`v(akt_yxv4Xrqi0Dg3B&}Z;57#NYq&IB4K!ajYdl9lDE*$ppzy6Bp}gh z4CRk2Ai|ai(|<~>QR9WyzA?8N?X<8n(RI(57koPdE-A_X2e5Mk?3PKhu&9V@lAU@j zwE0l;<{MF5bq8eZ)G;K)Pl4W4;o9PWhHG0z!sC+oic{EQe?W-KN|o~IVpSpSQfIOA z(6Yfq5(hfS{MSI|Er?Jpk>SE=sK>b&lRB&8#Sb7&VcuFFglalNKJCp9!ZO%jYBIxP zlC=2YJ-gzKBPW~*?oL1N$H|56RG|gL&D)BBdIne-7R%g=1sb;ZTi1coYf|cz zjn}dal2|bRjlhyMG#Y_9CjPVc9n#a~rs(zfCe_1^= zO)a5aZr(cfnJm8g4ai&kM4(+}O5(M-j_#0VR0mx(nf$y!YdBwqJX)hLlNZL|`)h4u zV~_7=(ITg3Fjc9DxtrY0uYK)Zt5D!xQ~HGOkaZP2QxDEz3@ItmP$9|NeNcD2erYZ{ zOPrhO-Zq~6qOF}Su!`4|piHt?b(&GtKok*NdX+>N@lY+4YgQ9#+HCQ0p!G+h*p?I@ z^>3yjANDeM&yOl;O!lO-bO3+YkaBK($*RlYcgmd|vO!)9loqzgfGr`sJ)!k>8YHrxGsHA8k}9U3-QWROqJ)Je`(BI+$=a{9G$v`bhj{=s>A)-;Ec36Z!TG2>23RxNFCbtntFtRlKJT`&e^ZL7ib;(gWM zg5@)V|%n&({t>_Ty)YeoyH95(8)*RncSe-I-F)>6ql@}#b5#A{hEfm z-BTww`8b`MEplc|1MS+v)f&0^lHjEXY>;m;nD&tEafVI%M})-sBx}KD-Y)|P>uN`> z1x$>XgxdZ!r~6I|MdU3BI(nq+CvsXsK6MRq#;OOVhBG%VLX)ptViV!EiTM7qk!z)| z1R47~56xBQ+kSl#Fr{tRm_26}V2d2nA!po{+300z{8MEC|M^@!Iy$1&^X{0cDr%ed zhptSDHCw@RspM^^2eZiYJwrUg0PHW^q?O`*Z`YS#Msu3z1?hKGpJCLfGyqd5o_hDJA;DND}`=e($ z)7BEOoJH1aOsv!EuaaBu4t7u|S;42NfG4o`BEL{Pv}MEUovdfV^6>Z<>i_(>KY59`1_$29XIRJYli9~on|$bWU+G~kr#(>mCtZXzc%k{}cza#^iBrlsGn_)M=f z7{I(#>Y3A=Ej!F)lTk>#;*9w6>&&cYCF(&XvCtCSBTm02H4DEoruG>8ApW~IE+X%K z6m%^ko<8z4do!P3FzprLey1&9_z=G!R4U34wk&s(%vx=2-4&_ zuW#gTuR3&_mySW&o9I1^>x^@`Y_V&2pNZhg^0{L1d(KVOP{c++-0r4ecwU2FhPhhI z+%zbVf46Ab*jAH~t!~%92smsvF$m{m!blO(l5mNg5R-@*GS;q{%x@)L^h|R+yxg-J z5Z;m@tCHW51NLKy2=x4wg9L-L2afz?VqTZb=iYhUnjH;zJ9pnmNj1t~eNo3f_^L@HIT%5*rQu!^!UjF0Hn<2#m8XDvtle>G+6!}%5oO$#DN=tlj+zY_eY>pbzd&XfOb82Zn<;Aus ztks4qj5P0CtQDr&rK-_bBE@|U8AO}Hk?k9_?pQm!_z3db3GD9SMk(fHH+0grXK1S=qiV5gf$wuTcqn=X#EN zp~)&f?{@*@t##%a49-$_b^p1Ei_YqPubNCP8?P>FysPHj_c+ko(8-f`?mQAcSt5|5 zKjUc<;#i%c1+98Clv$ZKYZN{km~Z6N4s=O|>cuBZ^6w0efTrHBY~3;Z19;^d$-Tr?hjC^FD8N){o?P(B(@G^ym8bYaXrX$G#j?+;zA~L+4W3Uo|Il|3 zbcm_Va5>*${s)+B6|^MsCeDeQ2Q5Jy#JkFs;IXdiJ|l7t0mVwb9Jo8;{txFC--s{8 z(yzrU){L9@%PD5ByudoYV+@mn&o*%kc!PtwhQ+IKTRil}#p_jnoPSqrDG|#<5E+3R zRv_bT{fZdv8M|z^JZi3CSDfV8={!KJbj+PLIHGPkEUQQ3r>E|Gq=fw5G=ZVO{Zaf) z+2rGct0v;~Vo;yj8|l*NC}jBq&wJ*2ON}>F(b@;fe9%GTHfia0N<0eL6oGT1@@1JK z+!^Q6VvSr}XCAUqUcGH^nD)A^e4?F>%%IN)y*3L~m|6~Eri`0YzJdf=^`1SH90erQ zEC6oP=d_!(UYVMwEK!_9C``-`bc%H(8*a0c-({^95w~pm=Ghf-FBIH7dhMH(F@ncLD5F1Mam7a*jII?>OS1ajEfDerujK9F&AHz97v*_nLl|Sth|e# zhFvX^KHH{1V0{DYR^d6ZM9^*CFk$3uEDGHT#hXhl5ToK4E@q$3=~0>nWy}h1X{oU$ z&mXZ(0=Qo%j-=|~i5O%@p{HR?^ zt{R6wyxTgm(JANPHpRhW64{?lR(D! z0*px;;bzF*_%Mr36x1n72eQP7oj`4rzp`B}3OYQ;#dulcE8Y}jhWc5M&@DG_Ag}B_ zOP;B7zv3k>T*1f)(jog=lcWq}-V9b6>uu{IhpRs8>M>J5@Pnf;+YlyBm@g?BG(Z?4 z0N+oOuheT%;8~dWPOExig{u2S82`AJ32I5Ie}G8X-SAC+kfgPX_HtTD**XKh_k&oF zr16@|;bPuw`%f6+gAmgQk3gH5vXSge8mBwx0Fw*<6|XUBMS^#*x@NksZ^u3;m>5Gc zW=OZWpp_}oQ-Bj}za~mG8N(onO0GbGjJ@Cd=lXf7rx~iSM*3siVFTB2mfdvH6AXdM zk$2h#e~BL5-~Hl1&54i~3#>=C>vr0Nfg%{@#E?gfa8oDp!R?qXJ{pdhXl0mVNJ9Gkxj9m4R8gylMIB$PShHkTWmpw3LAigx%Jg zjm)k5>{hY%O>iP-fLHEGk}^XwkDe?CW&sSOz{vr-?Xr)*E=|q=B6X3ARe=BvJ>A!+j4xp&%lK_Wg2jkTICC#2sMJ*7Yiu8pWBUuZuwWO&RhK|0gNXjMJeji5=% zN8W6@7l-5(xFMQ^%!|yf&ls&#x+7F9lTiof_dN0|CSBr9EaPr%){`CsCJB>Aar=ge zYp?iK8xxjKpPdJXgc70GexVqb=UiOA1#6hSrU@fze*Ga&bp*!^h#+!8&wCO)`UUk| zRWN0ii>O!)e!R)jj`eiy+^lLasQ5(7D7_n}@5K!dU1}aY1sb~9@?iucL^KBtaYq#w zn9-2*`akn_P}`!j8muSD@@G|@rbW-KXG$B$9X34P{f-%#dY;`MaChcrRC2h+E)Wh( z)wNZaGZRkVjGo4&PorZ5YKlup7KIgfNE42!FYgg&Hk?{Vy>n1}BjJ{5hMFOu=cEMS z0|4}TmsJ9#vn)u3W(~eHm3G|ccJgPksU4kDn|uK5umg+o!!}qK2g~~Bf>xz;(ap*u zXI-d|sU|0j(dcHdxDMXPs>$l^m?WgFK=Nsj;p-f|j4V9KLHl^Uyu&!vIR37>+RMEJ`A7fT@vQe`A6!_>+WVu?o>QCO%PCyR+DEUZMv&3z;S7b7IzZv`C z1C_z@leF3bCh#XrM-BSXZx zZyIn^xYdh)&DWtmOh;P`}H&2KMj-bR1y8tgJ{)w5$&@ZxDWDDHs8Vl!+hGi*L6 zI3I~;&7-}ec8E2NQ5nz8X^tc-qu*0O@r?pS%R~}8DNOlH2r{Wm%#__)V50x^av9}T zWw596?!VpdO~c_9a=_2(p`7&;*{WcjsgwLF08x?N+@-!%zzb{B57!}hA1>zGU%CY1 zLhwaWZz@E!FdFI$aTQnYuiop~07{rr@}m}>oHt(mx(CZ`B0avF_!ZOJ<-s}UQ-2ty zFurzl1A#O-)(>iio2Q_D<8D3XV!6J#l>!%6*M0wicy*8|rl=aO6w~Lb{}GRq2#709 zkmJr_KSO{3N5X~4c+U>Gk$HQQg%aNxtr%6gHbtbkOjrBQ^k zjR`(_^Ov+8p2HerN%MMNW8;>$)P^91jm4EnndRidGz|?+)-FGYms)r#X?Z*x1aIi{ zOMpmhqVd+%Eg3DfpKH&yDy&4$mB+>zzR%FI(2MogMAvznf<7awjNO4=a^{}jIqetN zzun1KXmCL1N>WChI+L*RSHMhC!n*C@aJ;^2+(DJQBAr{+L^Cp2RC}k@`UrE}=E+=4 zKcC=>1G};==RZMY zD_nFvQ@c>2ViPD*?_)ENu%2yLnO#(7EghnT%@WkvdpW(WzRqT4ofD^59%#8gl}lHO z!Zcjyc2E`Fbd}N&(Hwmsihl3x?vhDK*p~^V(l?8ge9Z=KrDHubo3p5>0ZXi8ijCHj&Ons3ctoS>J|?!J~zSb1O+1 zO@hIcPDc0fzVOAO9q(dCRL5ex+Qi7$StYU>NY!~6Yuk@U9x0t*V}t>R}B4zpfxp@`9Q8n2EN7v7lLG8y$sMmbSD6aWhc(_qdyGsMqr z{%4l#k#!lTQ77+ChHS!&hOpCGH@)$sVIZhwo#(!yiWuhYs4)7xxle9AEwqyW+V)qU zPNY8%gN30=R7+EkalVSk{M66ZTq2Xhu2jF#oib}6goguB9_(71q*0_okL~&kiy~QeVH0PAG35LdP}W%gua3baF*< zF)YOib%FvJP$@k~Bxp(a^f9S8tXpE2_A+PgP*vlNvanB5#B25QTb{ZId?4eVGlXqD zv3rGcNBRwfW&lFRRV)v}ZugTn%N!>!FO zw*`Zu$3>IJ>7@N(g=e0BXdygMVitc=j+4Xun-f__#(BhUu_$ie!8r20Uyx@TeYiNl z%qqJe!j&F7p^#L3T?CnTv)^(>ZK0`laXqc{Ew!9*2r@J7J{L$E(0W%r_3V>hDO-WK z9;(+?z0_cTQfiVDA7p&bB@My;9yP1-bI+J*!Yuz49L72Ut$6Oez(;LB;nU;W)5-PMci4j)1>zs`^ft5uiNyxg#;i^yt{5w=iy8?UaucEHD5vZfGFjBg zWJi9{>GQGfFo>ddm1(OoXaX}Qbp<7L(DH%&a9u1)621#0{hMFtmsxWXzsB_%F=rzJ z6+Qgo@7F`O)s9Q+3YzZTFi2-?e)0hS1N>fkcUBMI^HY-H5Gp6~hLg!lzichu#bd~JB>%$BGIHi#ah*t{=5bgG6o_9?4|;A2 zR{!LvXVW%fBu!M6vN8fx7I`;lAUYM8?%3@yhj=!mu>TK0FU;ZfhxCP4>W@G6A9%1$RCZ*kGr>0se%pEjXEGRo5RRbk9%`DaX%kQI{!l_7L>m%(-C z2=Jm%vI@ZL@2Y{u+9oDByGAfKqT-^4#LYVrQtlYja#tN#)(<8rSg)3*CFD0C@DidR z<6_4n!xZp;nD$F4mPw??^{q`P-2j>RQ5}B-Ca-90c z)jiLWqxp>bXXaeXpk7@ts6XGny(0o$WJ)PRNfh?cYbwoon&QNTfJdO+U;wRcvE9s# zYCRYsW3hW`uzNb@>Jew4dR7@rB(1qfk;ZySA=oo|QX*b@J@z8>D~nlN5~1XkLUFOD zoY;qR@2?#0wi;cG+XCG4(7G*Yvq_@NZS*og4I_#iVK^utrKQ;AU(_HhUd zz*V5}DMi!W(JI~$lKZKBpiL#3JKF_h*+r){wxXd&bFE_5H^R&gkU5hMmi$z);C!Him7r;v}%+i*hivcPZJY}jMa%mq5kaEY=b zkwg68c6Vg9+{dJInjouxfVs!Svucfl+N;5)tF;`jZE=1B6B--=ZR_4?X$88S`KY@(}2&xy=coV>{yIOIvP0GnDjriNle7F z(V2wGOnG8In14g$eke%B%?1XB!&DV_VIp`c8DGhE_VU7ps0Asq;{E49@C%j^8{wbF zcDg`WTJSza6tx!vnN5*NJ5a{*0?0N1^33?B>{pqZh;`dgFC^4Hm)tu zNCE^85}>ihH8=zfgk<{rPt}<@HD_w3=4vk1O<(j{d+$|S-rxH?4?*v^a1E_SwYbJp zkNEsfKee5jD!norrB{4V?>K-2?&mZ@nt`Wo1N(=vg#x+K-$!m#te>}c1L3iKi6k}f zB?9$6J?yOaBRrh1)^!)^`OW9w`S9g}PTF!M9qpJ%T)_li8SR4XE{;Vh=JiE}X8+JF z*9dJ6e){3f2&BGYX6NSR!J;A5*~l(2T{DB}Am2{pH4eUI=&e3y*6{4lQC!xl;c?)_ z!o__p9r;1J`}Kzi4GM5u`I6Kk(J1&VKQ$1h{#L$=Jv!JbyW$}W*%iFXC4l!2K)*$A zvXfgGEH+Z#aF;*s`W9!3xsxQ8Mu$$_Twx`Z6`M#chawaujc>f*WNXu^ln>c$g~8XA zNU5fw?<;~j13VaAR??$}D8-dEq)s8@2Z?nzxHdbMraTLER!xMlg*t-_lzn$H}QmCa6cX33*2)61Nc_V%hc1?svlR+4I=HB7ZP&pE{a z=5@T$bOrO6u@#lNGKZ+kDt`J|2K+>eC5F3f`6JNZrTwCc)uL=DdUOH&`twqsUg<#$ zSTRNLkWECsqE%d_MkbqQ{Qao}gx&%kk)F+U1_0QRqD239Pv;li zkP7abLXY)ngRMF*cKs1HpM;j8EwtJ5>ADnaKF#PjnsuD_CfU%BDKt!5Rr@@nU4m~9l*{VE{bsCY&%CQ;*6jR4#f8U zQx5XaBVmt!m?S5>9+oaJ2#sM6Vq4J`F(y-a8TCxf<0jN_y7mG@6-q)rPBG9{HSdw4 zvpH+&^>w8KVH-1vR&`QcG{m4X7{>_E^xjG2p$P57BzskAb8$3_WExn1nIGOmWGaiK_uct}+E3x-zUxn00c8t4!{M40ygVV3oK`LpG z_u3+e3e6*_4|;D!jIq}7K;ON2qoe}sOoofL1<)rG&DozQNLm;uRd5EfF*_CB)G;QY z7#RA2;m*!ZKK>Ub{#x5Ls}Mhx74JHR9=ST>r%i-#HWjKf=n$A~J8F}7M+J0zJ=;Fi zTj`FELwkPRWkj{S=z;F$MCveXdr36Llp*tjvQZq51kdmzXKP|DQ13z(fw#3p^Jf7i zuKpfNcd1g36LnCvBBEkOGSQVA>9&sV83ly4rCCi4Jjl8(Y@Rhrl7I~3hoy})7rBS& z871m|C3OC7Se^(CO<3D8Nv9FHelVsuRq$-=eaUc8v@#rn)!J8H57$R~tkFHcF|s{) z?RkO5bPNB;nk(u8dRN4K?mWe+dZwC4j2JY72q((LF5&fd$Befzs_ zKKb$FSOb~4epFZ7(Q&XK^=r!|SIRI0zg%^x3Q?F96NmLD`@Oz}v1?D=*s4QzCn%Gv zSuhe{bV@#YJUGlrr?j&U#S8A+ZO@{&<@`Nl{ufOqH3e~9v1a$ zYzQfDxpTc6>t;%+>Puu)^&1GTxVN9fnXcsIR^_R35|v3#MmE=W)?GzO8M46WQd4K` z3iohk-mNQew{x>SHfQc@J=UO}ZZ5pc>Q=^#;7XKoLr%&fzHF zsUbRKXN(%s#kT3(ra@LNHMLekjYMfwWgq?&nyR;MGP;mrY^L~GG}yk=ruF}t!+*J` zWZzz7S=FlSoANSOwCZDvYeDdq6^jsrK$?*Y&slaVWS-a6#iC8e+F?J=pJXv-y{V5x zlv_hycPZ<`wkp|-b&*x&S$qMxlOe}*blBG!cVy{qv*i8a&<{&$zx*G0NYK*HWM7kY zv@uQIv&LpMO3UG)&jSuMAU^i-QPX-2gPUikrxxrmdmk^uLI;yWS0`6EKhUYfQgpv{ zDb|vk?LI%5KYRc3Yt?eYqS~$NxtRT2lSk{Oj@UMtpye&i#3N?_(0**q=m7P5bUvY1 zVYQ4@4IBRG-7p0J@D)JBbH>c8k>w>5C2BSCd@8>%5CbljF|dTS-n9|(4`8-b{wLt{ zVS}3+VzoGxWK^cxEpRB zkc>{ChdLYD_y%KHgt0g?3_q_yYxZW!o;@SqdbIS%DA>~HZ5OQzk7DMB_TSrkj0Y`C zPl@(msqn`6PvoZ=S##s7^WeAEqld3M#Ewraih`G6&-U@Edfg)*VLyq+I$^Eh^}_@0 z^OnAbHM8~n27f!Dn}UedzpGR#Rzu)3r<*o*-yWzm5_e{!HAa(aJZj*43T#KC>b(Br zpB>Twva&snG>lT^#6FzFqCY z7Mgt`_kDOf_p-Z7Wd{B=8X6nL;tZ}>$K&Vb(ZAp^d88pL?*+hWQa`ZVP3e@89X(XH z93e;>`^k<_^hHSY;ySFSf?pn3^MhNR8Q6Vc8js&vaaD)L)K^!c)HGw%ISX;p)Ly42 z1=M&XJEKXv+LtM-`x2PD(AiYHmw)&IQQ^*CNQXH6rcYIg&n{WJw4#@Znq& zId{WmwY<5)5WvU!J)C&ZupMN@$!iAmEtZYoHPsoP&9`xDbq}<(z}d&Twt2@3{{B8g zEuBV!`S%Q``DJLX^6G|KbE&Ebsy#*wLexhQk?o-YOd~KM7}+-QNc?HZ2<_Ag)K~X^ zS%!?IdkuLUGFOpJUPOZ_}Mr@~6*> zcraL^wYv`Fn^k?0^a3|T#fYEyC$ER}pCG|oP@P9X2s0`EL3zW$R4wBHNoo&x6ZB@tylnhI6=gqw5qy+!$`P9j~ULtK|^FlZPqB)vPN~g;Z!67wUv?j^Woo(gp ztfh5`bGB>WEBMJGE`2GNBK@+OXy01!AAm*WA0RE`%Sofj0F3#3>ExEHC*4*yYCy_@ z+?GRvx}@wJ60AVAHzOk|iw-FKsEVS*xGyUW%u$t%YG{Bye*LvYsksX6ZxJASnI~9| zoF1ijyiufx!5OAGk%>j#RNBJAvi1iw3FYj0yI>dnVx?=)%sfF+nQiZO*FP^>Xa!y&H|T zy6?9j0Ylf-`aRC1*)aT8h@TEd3VVncxOOfURC^&+4ui+RFg6!~z7`SB00M)%G2K)> z-Fgel8FKyyQ?sS-l6gWWm|bGG+1aM24IVe7l|2f{L~xXuwRL^kfUu)cU-7R-CI9%l zlSaCFa>FBJ61*pGINC&~v=vfYb)b9q*&V;@#LH*5KUZ%BSz}vkpUYJm#ZH%r(TF`n z5R<9v?lqMyZ0h{r0qEX>To-*m=SP>cOthtLN$mdv^vnO`DBt`01oMH#y(&j(_~XFG z(sp)^>0D;CGI*L%&v1IZ-QXor1F4;O7{mlf2PxhtWeVVwOLH& z`{X}B$`MA*y!a}7O;@evx3QXf^G1_}+;mOed7lM~M=Lb6hq9O#n0NCLJ_F7R$rD;t zXMI)nk)J+5!kdTEJ2mRMVie@hP?RBE^Rx)~aAjKYhvC#|=U{Na!2wn*(N$3NmdI9Q>%dYLEa;$uCOA43MyQU%c#!#HMY!jRgKyy)B})2? zjp);@EN#(q792q4DI3f}FN}0r8J^s40zc9#-GqN9Uz#m>Nns`N``k1;1?AalQNDES zU64#Jg-r*>0g&C4ggTWvukU+Bl(vMWo6o>S_yEVwTFPX#I|LYSy-*iMB~MrlAJ*U; zRffT4titemIsUGwXblnzMWVqdOcDkv7~Dg!U%;8a;uw&{R!Qs2_UB*0$t49=>Qf|s1k zf-kM7=2s&1la}|*(m_Mr#q>*)?(qiRDt~|Fm@$N0)SjM)k0FQu-Pem67r0_#V-gD# zm)UDR!vOz>fv=P>iaUV9tYntf+~gAQWXj$}cVwGOu>BcKQgUQSvN5#`p(7gb#!3XO z0O@ccruwcWa@Yg04c_BoU^wWa5!xP_U2>Nc%=whw-MVQ7ZpJ1zs3Q1EsGBQ+d!cV? z8@1ZgF=4fsTO?v*hNaSd%=zKNL1|h#de~H7-^fEaV20%@6V|1g9X#cUh5A2$;9aBP zgLeM>%@#)fUKMgD)hgvU{a^@zCeQ1vdITVr42Sbvt^6BQMbb!*PUNpBqa*RtZBJ^q z%bIOADNn2Osc|JC-dGOsz6Nkfai-mIhjHkTvg_k4{B>Q#0&pO05xiSixB;40C1Cs7 zz%Mf+UHJhq;|5>MH;Tb~wUuj5Cb5A-xD10D$uw(U(ih52IbV6{iLbLdQCb?yMBwB+$p=-u}(ayMe!Quy9W#*@}HF!RG!-+LiF* zIT02BJ2y48JRkt)h~iwu=#uRbD~T{hYh*a%=6i!@AzTV<1CBUpxI9{u#=M}h*fcZ$ zV%tkomy-#NDXr}D*Xf_mR~1fBP|TXy!L7KVd3w*}Xl`V@SNcg~B@UyUf>asroe*`x zo$rep+^pNQ_nkpzeM#>??$sgJLo`iKp;ou^Y62~nJy~zpPu^>24;$FngzUVL)d>r3 z`B@vTvVoh4DhfQ7J}AyJEolcH`lssA9mB15`ICm?f34`heY0%QI+h%P<-&&SJ>Ag} z(Kih8paIAJIN&cJ$y+Y^V?vwFpttM8RhF=3_5y%E1Y51f1eLO5BEBGmgszrVy!z}7MVWjWEs=gcesWh3$&G>r zZc>1#o%8)Ou_89c(WB?*KVXxz(mvK1N$oIx`)`5sHlUB}X28s^HA`FxNeq-HXiic8|&z7Db?Q@+HW^DbIV!nzKMlD%`BXLuQCC>Q+NmoC*4sRfrX7)x~dCj9&% zo!daIwoF!oN!xr@pPW5aeT~gZr1j((eiHLnU1- zs5*8lMdassf%lNra&*>SpSq?UuZQs={n_tXY2Ld`c~^dE%DKFBe;6owCdKIu#UV(Z zXGj9iY7^pI2Gmw7V_)7oFem=<6uJVf<#Uh0$ywIO0Hxp$-%Ew~_HMxxSCH?jS6zR< z{m3(0XHsq@Er3WT zYR^D@R2y@|rfySGWg-v49{%^@-+}`!c-Cj5rS>XEl*U1d2KvqHM7kBf z6tln3T!k?3vrm7#9#f(X3ugO5i&t~#&Rg1}6FOe!&`QD5aZQ!dKdczPg(7^8y-^ll zTi263FHQ%}V4JX@Smq5$vrb5a!k@3j_WSe zFs@c(^5B?LZi}3ykNUXuCqP+?2kFg)FEn>@kRYzh61A0$pib3?f)4b5x>#r$68@Ke z+kZUV{=bey`YM`i26uI^fJjRWyApFkRd5lcZ2!xx!osdHWgUSm$ zKgZuiReh%Gfm+);c?0z`L7>bITy5OgcxZsv;S3Xy@OSCc3Z<+E6Hvr`}7a6W6t1de%E1w ziAZRx+MTLW@cOt}(;#i1vu6lSUW59V&5#K1z(>&t_^7Qs*bxx@2bu)jPOXA9J^_nM zk2j)e0yMLKEKqYed~u6ge+dDFTUHPQj0o6Rn^b_Vr?F4Uyt>?evm_%M&YF}|i<&~pq+F$YmcU8{V~#H0}y?>3Fdh|d_< zTK=L-JFJs5m}{HTfEFZZI*VGfA|LyY$Q?)1$A2YGmO zKxdCmGuHsVC!e7~ABmP8SSkCLY}OfaJ)VxG@#e-BN6!|t35&8lnJ2aXvG7_C_zI#( zAupYlkzV)?<@~p(LuQ)p?`IFXx=7TClCKR8A^43Z7K@Et$+Pp2x{kvAx4GT}5>Q!_ zN=mMb!i1MV+Om{8pxfS9+mv)uy7W5XNm|P#jcKcy2)NDiHOp_1%zJj$A z;5PD7^|SZWiuXIr0#Bs+aDIHA(EQmPGw#39HEw@ZuDkmZOGR??K@G`$UB^gl? zz2qL2{bDLMnulOn5HZuz_Iz;7U*<(cu(rmMnZ&ib+HSoEyxLxcCGN5@rah>dFqixl z(e^KbK?Ry^1LLx{@M&6sbJtWN?9an+jbvfJGNt4O-m7cyhRd?LWaCPBIjzbp7-ZvO z15%w*+pPFocj=~WDP>+Kz&DzYc(eFcHW@8xU}h2PRlIC$3D$E~O*s6Uwt@H__x2IN zf_Ew-v%njV`$iA=p;GD+xKS+*tNN@!t2G+Fpr{&fEZf>lD7)tG6jz6gs+f_w0K?Jt zWNI7+S|yaErGRQjcKY-Q+2H-vf=heNiT&Mz!i(0#46vZJ+3=vzsKy^y!yIGkexj|0 zXw0Zw;+AsDcxYGVuZ+IgR}W=1KTkOxwEA>=MsxetEXq@R(%vS?rsKCGvE`l37hnQtG%dT-(Ak$6#L150G79p?5$b9 zC`0mB?Kvk>z@#>*9^ldmeZHgl8nR(`>81*oza^=;xo;k28i`HD53`+iJ3*2*Vk629 zQpZN=m@XSZD8s9h)@}=SR}Q<{?CdfuLeuV!1f z7Dp{8eh?R*m5IT8leW*xDeYguLLbi{B7Tw$&s9g)!*$3#G(F{b7o@|ahDXV;h5Ek! zu_Y-Z_^grB?kZ8((oCPA9s!}9&mAG=!p}oALwzUIJ}xyLKbxh~T*DbbzB@Irl#;b_ zSWnR{mw2SGclx$Pd^+*3N=J zzs464xcy$%kOll?<>WM>JE?X&j=e54{`LIYCOMlVt+zm0gQb%ZzllKl{x0i__uGqa zN+rMcMRC)U?p71BI_wJx=u|Z5N*I-qV$%DDX8y+XmX!HDj0CpiQMFGTSuuaksLBY5 zNd@adK6|}4sC~+hNrwrMz-V7 z@&ibG00C`k8|7XP_bG9$s}(6Ogt~+X2h@oeHTOyCpFk*gE185sVX(Jwg*J3P0$pAj ze@x6y_y@8Sdevd+$3Gy*=|8z;w&Sh?;UJ0oeuH_WHN-snzw3VZ|K;yLsOuzYsGV`c zquDOzu1x2?+_t{B$qKLK&Dz&hU;EHnP@pUJCTQ@-$|}48Jm8}sNI1DwAa`2N)c5rF z&)eO}`$PP*=&;~QWJmbyOJmPA7eZp#JAcHOvc!us-t(NbI1^^;IZKMmn(kLLH?6q z6JE^P(xmb%cBw8iz9DrL)32oSZ zrfxv#7YKoN4aytbgEEF0#aGmhb2pVg3;c)WFc~>3oIV|uFDTe6`61?5nmW^gkf1?Q z!S*LU1Pg!LdPw=jj;Ds2{(=Lh0(8zAF2%w;eSWT`xc>w6G=~$Y?Un!6DLBZ9s@*NM zc&k$i9t*CN&*q+OVG$65ijBDm@VVp5wlH%(-;=D*`CBRl9Sqoq0MX{{=;C%uiW&m1 zp4cgRE-%h&aUu!|{Q8%a6RNye`>3;}1*YG>$wg+YKh8vUPMQDi9^LsrPP43J+uyt1 zKP*heH4iTuE3K>0G(`|5xOgC3U<+)q!_s%~gpNn?>qD}cKhQ^kW`bZqS$KBN<44n6 z_3rAxv}nH8?TO_{vbLg<9q@z;=go9wc_e}4dLeD~{=jc<#srZy#4G!VUE;y1;uzhF zknGd{>4Y0u#9sMEP2H!IB?GJWn6x`Y5u@bwuRaaDHeJvKD&4Xppy^Cp>Egm)kEyt_xiE8nspq+45btW7-ktJ@m9g(Bsgl?S>f))H z3wCz+L59S_*UaQF+w#YME#gYc>Mr(=iK{IY`6#hbV;_-Rr#=b+9; z`UkZ4x}#SLLg;Rlx3Ep9^aRn}1&MOvADR3Uai;fLV{i!a~kklLi7%~4HF8!M|K zYsOy9uNPOh5C3bP|I_Z$mjTV0hRD`BTT}|I)DAGz+h{%Q9D||fWOuHH9LP-Rc^$lfd;yR z9hg)|pAdC$QuSqNR}r!Al&>}1vf8Dqn3hdlCivm!R-mI)rQOrX>iRb=GyBIgC!zFu z?uU)`wBDbT-b^hoc8{L^kF%;vCEv#x@K1gIt_e3sdYe*xRrG>U7Z8}42>+rAnvkp} zl!E9BSHc9!wR>R@owc2ymO>?Gt$1yFU+I>}~ z>Rq%LAJa!$TY5|%TBzOMC#jP*3rI_*cf>8;@rQN8peMgT*&m7lug(bXc&hia=k}`W ziDqXiIDdFF2CE=h73C}j2cJ-sj(E#^=mC#;mSlB>ZXVR!rXwkT{puiy{+1+Rmb7&^ zT4162WC@fC44^l@4wY`OdC2iB!xA6?N_@)1kHb@2fI-K4brF{1#nTqlmh}X9#{;Dt zinMDvVAX> z%Fe}WOvLzqJy|Ub)~W_E(i**$n&GvWqfk|R0*xlN2fmPe4k6JEO0;Xy>>PW{ucjKn zLS&Fr=9LwZhQR<5_}wbA`=~J{?c$`z#UfaP{y??5uH+uqNp)#OxN6zV?(EfqE%@zn zUms)cKKPcudJ9W)0_!TXSI%7q#&i{4DtioFyC`R>v}!@EeqL&tdu)<3L(VSa8DGw` z!*ZLVYLu5S5voQ`MP8Wks@vhiFFg0fOIY%;G-S2tP0B0{9I>s_RqKkjB&{5pE(A8c z-XOW_6!JY5J)#Oysyn2&qMa6YcOY>$_{qFSIZDmtH ztKG7&#!I=CoT9(JPM39s$U2lZQ|PVK;52;iB%vcdjc)0kghbLn8 zcJt7;52W$nG3C* zVfkFyddLb=^JRNy?#17q2LAx}dyEa?D4ZGFA`g4#Fgk&u?Dlr_y>5}_a8(vbvSv<(D)B9G8Xr+ zGP<@eer#It<(t=+1y-ok#l4!_mtQ`ZzX|k-uS9y@TkkiWYuR3N*W5+ye>o1U`Z6FG zzEB1E8Q*A#2p?(F_y@RA_WTFf1HG!K#?4jRZjU8fYTwOg4qJsP17Zt zX5mLqK@Vn!s`>lfccR5t9-Sj$%KGd?@n~0d4TH?64j0K$-Q3okOEN2Dxa$N98bnzGD6U5NY`{g;|tx2=XnM)l&ame+C0c zXNrPQ@A>Ib8E?Urk+Ut?x7#>F_X+V}X^F`;S^i+(4b3t-FsUR2rubx?oyh2|yovPs zZ5K+d{@6Qz-!kC#=CRa~*tp^-tx-rOX~Ql?6p>QR;v~Qi;^E$|WF{RRcXitjluY(l zTnqHyK_3S`QmM(M(A3WY-h$ab2dN9*oE7h@%NnW7nFxHg@MI9M)!R}oEO^7Jo@HjC z$HeVW&xI-Y>Bf2=zDwGyyL`_s5;^e{0^><-7U}&5*hGbvA|d6+C6C0R?-3`FN8rq@ z=&~7hu&1{t#X~lKmi-)!bhG5dOBcEF$>3MVif8R#z>D_p?+gLCwD)W_tzHU~-&M3X z0w_FOj6yYz23P*}l?qzk&7oXc3j-iwr_QDcVdO{!O#+?b*-GVgzzmJtHSFvUJ2VK$ zAXkIM(Cd=A@7jQoB+KHR>^tU(scbIVy_G~tm5^#~kE#1_#E=sxPOol);CsNgIZ`>f zJL6Cte^P0gd!P$7-g-7B&|vdnhmi(&vr;0JT^YI5y=X;neS8 z@1Z{i6AytUy@BqI!$kOWW!0@!q9W)wlJQ3<&krX&-#n|`C5p!P4{N_lj9R6sDCEI7*yZ3C# zawaVWQgBr&WBVpW86QJxkebRiCv(U0S0f!{HMwbQ7TY5_E1!0>S>)-XdL?TbXab|c z+XODahNE!;?g$!zR(OtqgXGF%EDhOBJWYEBU>CHP|FmW>FkQ-}nzO_wtGQ}v4>6*v zHE$EU9k8<$%HU&tW?#AZy#m?w48~kyZic(=+gsl%niYQ}aeqx+-~!EVaK%VVF;)W? zM!LpN15v?)dyFHH##~32YG)OsvKkwE`@AuC2bSi!jeAjz5)O)JV;;Xm;)=8}wPxMs zgdC<^fD3eqb+XuExrA*t%*t$LS1KJ1@PaJ3j>vM1NR$lsRbO5U_I{tAqjC6{gv8eQ zJW>8(8$kklqK>i|Kg^c&&>o;NrF^Q5pK+Em*SAQAaFS`6a5FD1{}!}SO<;OxvQsku zef{MI3u)kQ9&Qt|ViJ8Hk1&pcFp_zr;pQR4&tU`p2C+K}t?Y(eoJ1C-qXlk7F`q{v zj`DMj<-tac#a7_DT$Xn4OUhz1B{ww8hV34ez5|2qE$5F;WWM>bZQB+GqLaO4GIOs_%Pe%7mAUvyfZ7KC-{AT7!)!~t zZmH0`;UDHYd)7Xd8X$aVAxbl}WAsO^wF0B{$(2up$m!r?fmf+Ckf>Vs1{lS$`;*V= zgR{rOfVWu!xt#^bkZP#_>w%9g4d4W6>I^n5a2&L^HZM|(EjJ+clZ*P1dTyFP6nRKz(HuM zl~|SX8>dJP>JA2{3^LML+uxk(JQzHuDMu!_uE{_6B0n4cex2 zgp?zr`C>q@okkO^t?bZ5rMC&3T6{$1J$gg77xu55cuWs z3GI?h{aiy5x-4pQ&v7K4*GcQPqZ2xU0-KV>bi8>OA%}+14^b#4x3%I>4>!DdZNWru z$xnfdHOn5gXej|q0@S<>{WbW+B0%dMCKL!InYQ&&N1U5`LY;<&4XzUGX2m`407Vrx z4A&B-MUOk=XsGKwrn%CYCX-cWlG^Jw^z9f$QQMSbknFpbBWkLp81L7^tJrn}=XCim zAxaQ$AKekK{4F?eh$LWK!M@G4u|meLQz`c2<76+pu3!3FYAm4kE0B-=d6p*?|PPy1-vKyBN=_%!JJz^28Z%}3=q7ci``w+u! z_lqKfz~mh+{e_uluzdo0hRnq!L#=K&UHUKA(M6mO?(&$F&Pzj0Db)N*Xq9`S|L`G6 zSC*D@&a43i`DZeG*9?q!OxB-+O{Nlh`Ut{waN@s^+)i)l!p_Fjt#>L!G++ z=*A*Hnj#93NQ##Rj3&F&q5E$AYQJG7Xi*A&$*DMczWolwPmOoMk!XJ}{B01CzBjwX zGK8WFyex@ppJY7u@M55LHsq0kQj{OP)?v@I%$8m?1|(uPxyb0jRJ%AP*`MTf@H#(P zMhx>7flSdUt&k-jeMJXmp@wU!~a zpox)rVxGxkK(Y1x?aQkr`R6=1X`onA619Utw8uuB*71b-^SPYL)xf(E!Do*IG>d2P zZXM0H0DDPu!J&NLT&bWk9j%e7=4+hc^xv?)le)&vecHIG?dG!vA=dJ}(ey#{s!Jvq zZ^S)@^{69u9tqJ7Ve^s1r~5kli#BxpH3M%nmDh<2eU0ri>TgJ4E_=|rvx@fdMzbzy zJQo98-;G;BFG$jDL>A5j_W7X8h5kQ)<@}2?weVR{CR@n!2C1yCW0* z(eNHD}lm^Qp8`s{YIC=&kddhq4{^BAeDewS}iL?cf@T-_jYU$?4Y(wGE^hwv86$ zS{k#@iWIlLcYGI{%ECR4jmtty4*67+hlO{RaeR8lsvE!DF7zpzrZ?-=*av4*i4CQw z;U=GLwU0C-1|=@Bv>KKv$mT2-whrJKeou7~Z_QQcn9gMn>P@?4eVm@Sw{X$hm zCms!#mgq{`L{1>R-A{kofXbfBIzzK2>h+^U##Y2qan>?N=Kgm{)@Sho%#mqo6~xgI zlx^veDo<_23U+c%Qxh7mfB$xVB|{5h7;^-v+t%vV8pR}CkE;I?Wif(7x>qi<`)%4t ze(HR0@q6e@a;d`MMCVn3j$TT;E`?;V9lKQ+? zD%G=-2fi_%@^HE)s1wpqa)zSru2#ew?moDEQH=APo+qpqbo3#o_~_oRuUR>-+nC(} z3kg`~L~WRhs08U7^CGkZYlCBIj^-Hj#$#99;a{`q#CF&Gb$ZaXOJzOSG79O*E6s)z z*1^WrC8!nAnfziy{x*(13|<>Y6xCRy5k>k=2p5J_f6Pg!57w79Kh(4$@qJ+=PKuV< zqklU*-rc&yRyn}JZCHEH;uRffL;%PTTQ@+8_H^Dw+t(5GD2wF^jJQ~YOc^#S8BMAH zWbQdrBdJR=3nAdAHnYY|HCN(#W1)IImZE$TdVZFNRuZbqaWY)ugn7JRRI#GYCYBBb zQ7RC?6Wkv<_fqsE>tkrQYKJ1qWZ!^Tb)&M>^Ie6=rji?D>kpW###&|?sj7Mzub@v^ z>H6q)Ypw<%0WX$vn)>tWG_qCE{SjiZz1Xc|mJp)r8asyaj-lod*R(K(g!}0RaFZy- z6*{lOnxO;TsGZbJ@|57svj#FzCIWtLCax~S>p_^56Kh!6)Y6T~A;*~1;pR=l{PV|d z{bKMZy_Q;~zzp);)8};(`ZlsNk-R(P+d~@t!kGguLmY(O1^h5;DI8 zcm4ryyL`sbzcG#*ledB#s5(&Gh#~s z4cT8olSST>(%Z*`xVYQ_G5J%=y0zo~94) z5U@wmZr&@yF5D6+8#I7-(d(#Ee2EV`Oa}=Uwwsa_+{s*B==>FHB=C$0Q}3qJh$!DH2%W+ysrtlN;awAje0zL#iV z{f9V4OS|94paTPe&b)BzqHY#&oT%Y3VP|_yM%E~ui!wV&WENL;wg)~l?vdoA>qfy` zVt^6WqV?Byd2IPS2e*3PbIU>Dr$hZW`g6y;u26+G*qd2IqFJJBWqf)-yU32%sXf|FL0XYt z<|P;yZ0QO;y0nX__uNpE=w--qdp%p5E7{25t5&}#+XHD4EH4XUp!^(#&sG|*g^|)s#uJriw z?XtRJ7RVBB;7DEFpsQ_ALo`FIszdQEC%c9`4RPGMgKYQ7-N-?|uFU4gW9C=mOd0ug zYO{WbMyp3Wob-~iiHF!<9IvK|>eS%D`+J^!EoJ8Vyyv4q1H#0O_|6SER-E4Ejn6Qo zUTAr(sRR^;;dgdBWxt-uC|zQeliDy5sYfNLU7*DY2oc3@}hvxJOpsJ4#+jT)NW->*u2j%Wc@`iWC(uKZGZS=U9U2L)IYCF3Q5?Y3aSrc8kh%?b4q*K;cu zI`Sn8#RQ?OO0MTad7K>$T=}otpV^PW-3l%_3!sCrSDWDRc0_?)yI!l6i~NhD+L0mI z(UgPL&VccTC#}Eh^tB(GwKnZQqh}GH zp1fK3JepGQ{&O@X^73V42FF8>sUoFV&lH(DE zpd7lQecPN1+{8kROZ2Vj3<}dObGB|1{pYESVC|Jz88EI4FTu&@^d@a4+Rwtfv}Tu5 z2F{~vhF#!WtNa@8^w7>+xXfTZERaEt*SnRIub=iEH+TG7t)6#|Xm#Y&)z`W1#P-Pm zMY`Dgvd$Fr@WS3@RR@a1*$qq|7{GIxoT)m1WeC7Ya_l)19Ip)}0BHI-xB zuIz`w@$7SY#<$ib-d}dMAb?uGxAus*6Zq!7n{i8`M$3V81Khf%=BfQF=G%w?|F6w` zX%%*rbb92f1cVH~eA}LB@9#FG@lOlnY9tB!SWi0#3w_xjM&vQOopxAI>D1Y7^Q985)7Bva=aJVY6QEJ>u= zHbxxrxGxm}lB*O3NyIT(>BU1_FRGQSKRu&Y9{Y%6mDwTtjKxsl<{m;KwvyBLFgfM; z{V69%Xy(bFZ-2_>Z(panv}|5pwq}DYwP5=etJ1OA9QY^8m@uIUiqRkc0783t*x7gb zvi=v^47##!ihNEED#R&xXCoG_o-r|X>a5wmI^|)A!1lrPYTNC-*zVdJHSQ z@vz?s*yXt*mj3p|hp)SheaTc?erCHF>(?K@i{p}wa_%9Giz|ws-VD4yWS`)#y?>p~ zAEH;?_T**7o^*Nfx9t?^KdV2C9wL;WuH1-d*TbYJS>04_MA;DgR|(CK^L7@t2rPi_ zv1GH8+r0oBWpZi3YP0pp%aL04C9L}i!&qu^53A~FhHuJph>MQfJldwKO+K}z%6hr@ zzEK;|%@8r`{Q7Z!4VS#d%P%B2KH2S=N5lJf+6Ji?pzr*%P@Qr;+`nq7%Y)4wpq9ew zk5saGFZ7m9y^osTs3V50B52~L-#ccd5v9JbDEfLYFLLqN*pf|H&OmJY9XZ%L2kd1P zN@(>Fq@lA(6ic2}==3V4DXGGsa(5>H>Q9OyEI8i3-kaolmp7H~fo*O;^*Oefq$2kb zIeF0mXJN{=GF88-z+moRl2Fm$e=)E}W&GZcmaM1hxoI0yzP{k} zQQLmx`=`g z0!c=h1Fp`m%MeF*u7kUUGbhV@0oR|kU~;Vf8@@T{BV?{ED4?RF#fqi**+yaJO;1%T z66s$lh3dD^`AV29y)3=qlPdMd1b+t@TYu#dgt!_8$!ML+eB* zwXBVWb-qOp^kA|6j9Wd= zaf3<1-YKI_UikfL?$FY>;XOmU!qylRMt`8=3-lb6N0+=-U9m2}R5?1d!ss#_Um=Q2 zAuXd>8k{@#+HS$ZUlv)y7>D*}=a7hwN0@9fY!taj^?tBWLke;`Fg=?yShLokEvx#8 zdav$l&8s#oQ(r8%Z{fNB0IhS?&Z66rvEkzwYdL>4t2a`6y*jUqY9cmYTPpB`5~>lo zNtjFPPLRnOf6v$1PL_B*kqoKVUH#l{ohpO=$}B;d#Rq3t0_g}YcnOh7BBbhOA7nx> zm~H0C`T^B02D6<5%_~F(E%~!Uvo#2ZYQ20XpPw4XX&lcb-ch=>FC6JWV^;*a9J>lK zA#buu)Z8UuZnyyQCkhwW^La({5R#nYoQ|rmN1BNiVFMgDBx{VXZkll76cH@0?$Xe# zLi=V38vMegFWB)J<_8Q{zcE%2I+moGJ_TMGHVPwz`f}Q)45HIH9aJL*r)SjM_c4v@ z#|=fJ>h6LJs5^xv)v)0OMTPZ^?Us^4lkth_#*vTro5Bu% zr2JM#El=ZiEo1{jsW=~09#lwTO?~V6goYTL!CTJk-`uk()^iN@X_{ws_-^?νw4N#}ARbN=5)xBqsmW1yt+9RdRVqTx4K)MYLjW%@X@qYB7E>toSpl0J;f_9z}n+wo$f zY&?0Q+(LVL$0y-*fPhfTEtp9|H|dlegehz7B{7vOdOn2tIi2cY@;l3g<;oj9Z}r`z z!&(mT8uuJh1C!X$X;aVaq$$TY<|&8_)^StR*e2rBt>5;2dy2QBR7)2Ri|Z$96QeUY zkLd2nj`Z>_ar9U@@j9Uz4!DOy=Y&2FsSBE=yD1jP;{YmXg4VqRcLszzLsjOhxY{R* z-hD|7{q=YrxN3DSmd&ywh1u|9XwUO;{|Q)C(tV$>b#64*Xrk#R^` zK7|PC%wuH6;yF9d67OIZD-O}8+?c649=T=eS$^lU9Ca=_c{G-g)tP*{efzpkNb>92 z1U}mC2-2{IfpD2;{zQ8P4%e?t z>VHww`6dQc-1bU~-Su-y(C@)G{X(}GJxbqO0WA~wbW1>XE+#GOL! zd9)>ZjauKRD%(4QiB@$KmRcQt31yvyMlI@+9&j{L-LFiHiTNdVw|@QR>-SEU9&*7i z%iG13rbv}@Lv9SEFLtr7QBM~Dm$_B@FP@rhskgttt*%R>YCGmS8{zC(e}52AK!0;x zsDO?>lgsri!Nbu%wwLC|^&FH817H5yY%WrHv8kJo^1l)GmO*WW|Jp84C`F1DcP&<+ zKyh~n?vMa2Ry4ReRd-gf|oDcc1G837} zWUcl5?&rF%mPI*=)1RSq-#$gQF>$&>ZK*FCg#~6NTPoIg&7A$~5qPez+qwC+f&~s2;my9=ZaynoB z!>G|gMc_TWb)0Ieidq{s>EYQtA|4NqZA(#)pZJ{HTF&0F{V4{O)F0W!=J;Ucw2^XB zC21|DNm=}2*|w{M?IsUDbmbDF7IjRgqalIefj6#}TKk@3ZmQ~9vjv^|Cj{l{6@EQ1 zn$vqR5gF@&m2r{JMOYpYyqx&qMWdjUWF6FmNd>i5CCsL$*3!-BQZ~e(ycVAUdeOe@ zd8T(OBZ80oglaxYptnOfHeZ&3%+-Bc*71k_r1-iXb=lN?l}?g-4;uoH?Eg@SLi$&E zo{;>*U?+BW*3EX0exZC)uT4gP^c(SlJ+&T*8n++e!1D;wcMp#i7*@yFI#mQT>0lS> z@cl6F{3JxU2F_jNcwi%96-gzfa8!!d0A7-XXjNg3A#l_84>D_?0LmtTwjZbJo{r1( z4ar>K%NO8x-iue`yIofYk`ZRzaSlGi2yjBnk`HHA^-^T2K<%hB*ErJerQ4j&8&XEP zi9JJ@mJ!XER~UX(C%Oi%l0tWWZR;g(_arYr2l9M$3^Ty;v&GRa4-b%Lbaqj-EPLxZ z*{$TJ>A63Zwd({K{Ot3DWhNsU1MRUh`l0SdD=FrDrCm<8F7k2J4>{ALZEY*KUmBn0 z)4OJA-$7cZhsymsYOuTA!ZIfeW3F;Dd9h-*6WOneAyYAqyqx zV};r*H`-mJ^-E%^uX4k7eNFOWvd%8qq!_r8d=2taDH|ykUck8C1r`6?jhx8`Mw*N* zlDM1F1eF>`u=-32gFW@`fkf@cmKT7zl3RNYM@<#_t>5*>P3 zrA}9$!XI6mi;=yiDD%zWi0A&q4^^xArrU-(W?mAsfZ{x z2WAJj(Q_APvGR$d{ZZsz$FpcA1@rwV(QS3bZne8cwn-PKnGTUOxa(^M?XHi%ZrQ`? z{g=dR9Hjr^e@o%NqTEVw4YrSqvyPUGq0<9If@0J${uB&{zHC-Y`jEn~a&di=mSx4> zi6kS-Oh=^>5zhl?8y-Ab8n)`W{lg9xLOF!&Ov(RYK+gjO$^$+lHViZ0d9P7WR0~|z zoAelrW-fUPc+$?fSrCp)YDFt&P{b@`zqkxh&a8E?-rmE^9ne`>j6k~5bQ~Uz!7A=` z4gzWu%Hr;L`CJw?fmvND)c^xgG93-w^WfV%lPDI*KE2^ZmOyV%# zmc6JV`^PdjkpHBLZKB8OT<>ZA^-VTAd*|A~qNoWncIaI+Rsgb~1H&6YCAElH!_{m3 zla~=VYrD#(3Ffn0^df9;qX(q#a<}qkKyj_tleg|ys6fb@rfu!d9DR8<@_*J6QJM7L zcN|u)O<)H{p^>gZmIpHNubwtlT4nuGQr|<@&zRtf|2T}FOR0fcSPKfhNfMUih3HKR z2n!Mwck9-q7MF@SH2ruRbhpEpi5gQ7*G_Ky~E!t36q7K(bg-)D{ya)kUM+yv%7(S{<@XV ziGRHf&-zpG_}a*{KQcLocoO)sP5l^KHg%7(CptCz+g92$c84TQeqk^@yh+9?CeA(y z*|wKWmXzPHZ?vRR#@f*}-Fe8J&LTUf*SP2PU?l+#Ue71{8D)OzGI=xIj9qT@Wo3eLr%!2?(%1u2HJNhlx<)ZCuQ)W8?1=*oMv{f?#ignjZDhdjaU zVoxnnwqgZCR1cD%-?mW}>6d!m+ptY~5s(N){A5jM^3Bo@d@}Y1kwJ;T>$1`0cS7Mi zLZQ|juw>!!5qDXXV8>^T^5InB7rDS^vscCb40aTWk~)FO>?#aF6 zVJ~js;4!RwaV-A2u9}7u|7wIEUV#CF+d&cI9*5$^o~G z<4&-5W`541f`L6a4}$yW**jY_jWKm}$dP@-Q5F|+p9Y--LQ z2(~Zcn!hOgQTzMe$ z+2R(1;>YhAcc@lpJ>&X@B0h)JhS%|Ty&DLV$-%e(lL%&-B4O+dV&6V_ZRBTvh|13X z0Jo&a{4F$?VWFWmVX)K<9+$uo-=zp`;a;e^6;05<7SkFsl$-{a2irMQ(5qw21bs-W zWsD9ru27!hraeE>`CeOyWPg=*d>M7+W-`apb-5*l=+t%5Feln8#v# zKKVXGv=zpG(YK@#pCjm1iJOb{M}$}U9sNb_l+MOdiHj0l99l zLOk(*S;CO#*y&rVD+k>h%G#yuusOfxfI5;cZvT4bsj*f z^X9puX`@bovqQDJGa>z)2%FWiPm(B$)e?lLW-u;A#Q{6*i}?7R3Gn}p2741M?*HHB z_5b}jZoa?S-$OtXl7~!|Ar$9QU(Qw-z9}SeZzt{-B%t$KkoJDTww&K`1Ac>n}OHVrqbj(K!NpeEv498Ow!VcqB zn5ez|&s%<+DX-&HzEtTN4gECfA6!f2^iEp!h%igjE*SU3ul;J^c7fgP%MtFLJbrdO5;i=Ndx`ql?=<&X)f+J?&u)k1EMVd*WRmyMJDXZA%n&%rm#GDFGtg39 zC%qFDtv!t&Du;&HYXUsS*mbhkUs(45dNm3sC%t|W4Zsv}%*;KcBM_E~lqhE`1!}boR##uP^fusa`BBX|tZa?^Mavdw*E5{0sp4x(^>Z zaXl=gxD{c_t@MHSG#?Y3z*WmE>+i5fui@q$@?JvaYA7;G*H?t)WT|TSbTRVdrQD9R zVQU0>>+Z8_!1wDw>uLZm2ahI;H8rCdf$5C?EyD}DX4Uz$`caoxPAiiMIE?_SK_n!j zh{S<_nf+ZMYNy#n+uCt1E&_G^HB)r!I5+Ysp}pKo07Q(}=EYvdrI825c_0Oo*D+u2 z`g{0vwp%ZZ|B%IV8<^BFqZ2r6SNF8*3=c;oa4nJkQb^@;YCexI>(-4jIO!JKklSmj zJ|Q74a;GlyRZRCseI71sPEMFJTRBo&%x4mP+l0-;K2>g42&O}pVAJ_^qkihXgf;C_Kg-bC_#LQt??22KE%zU zW}{~zJ`ETu7~N1Wa$S-Fmri2M6NzgDkfc48%skp|l_CS-4pP%Y6RSA$LRiiTQR;$@xiMz#9Qrg*+lFEXSvvF1kXKth z^GI~RL6@?XhkFTv#2RYQBmPkz|5@K44%h|bzIO`d7>lBRB6L~4f2~6*c3d^ohAZAy z!-*Q`ryS?lv2mWx&cfHAGQG7Ijm^o-v_Rz1hn@( z6|%R`hHva;4A`T^!BDovaXSYKKA$k~5F<@;R$o#{A9!O`m=w~|xw9i{lFHzu-H!ZL8eQV3hr%UVBn2m5*!bY~xD)4K z=q82hRVv+vh7N{-mtWQU24^0c0_^7Zi_RW98(6s8`=wvq3j>JzoGZ+Zyh)0Ywm|(V zJ^*aQ=;hl4j;52eh2qk=iRNeH*z`C=9;!Nie3oz8)~p9&rV97kf7ToD@xgZydV(83 z@}{!<^sM=r77=%SQ>hY4Hxd`4!xOQ->$@VM>Z8Uz*~c1ao6j#5%57GegB`vp>0wX7 zrRg}bk``tz6Lyw`=?cLwPs{_ONx8tD?#)fS2DrvN9v?`@rC!!}VOG~Mis^mjeij)+Q z2qZF)`l{+X1D|premZv$WbbZ77pT|a1(c;X^|Qyr!=quO9*pIYwYx|tj2A0j0+a9> zUAcca`oaBwzB#PjNknIM?oHV(;vWXpcw5azPp$mhsESDkT$$U#Uyc4ful6_kT_I=b zJtV*0vN+;D&_c?uikwx9YV)nJlxCI$hwFb%y8F((g6|Y%@ zZ&}J;61fFq$DMV8FR(AQ7Dj>NbMMmniRV$$nb(bshcW$&Cg19^#Lq1)y=Hho+2%ay zd|tMn$V>Gyz}U%TBvIwW%siy^1g?pv{>&Dz5Q-MC&5AL@R;Kt6j(ro9JUwlP%Z|ip z(%5o!{@&^&EESpmehu%)jfFFlqm?36=8*ieTi09bKAZGv-}9o6Lgy732~ugPNDBgP zoC+fgB5qp`OpCqU#Y2iizeS5%D!BaG(&vv&n4he-p2jN-5{CXUDmRURw2ihL^-%d| z<6&y@fJX;5(8PMZP93+iK8K2$1ZR(3i$Yt6M?uxgqmxK~x*S*81^Blkdp@iT77hta z>1s3V%a$vX^aAz7nDgea%7)`;x56%`)FOhL;igM-B|f&WeTr%gj8rmV1hx2znjS0M zPOZbdLG&cb>6>-W^EqUOjNrF<{%96^9tC|94=+(J+hpfs_XuDhN!qdu^xEl817Bi4W(oSlC`Ia8O(p?!|mZ=kbYJ+K3}b^?)``He>~ zY#-ELWqS^-nx}KC00g9UdG!q9KfNP*##rN7WZ*Ixnq(T)<6gw!S6SS=Lk%#hH0B$I zugLSz4CqaJo=;hu>e;G&@)o0Gm}8iDa7vcJG>NkJJw;>tOEOG+rwfr2CbM1XrIU@G(RYPY_ zehLyef&d?roj%`hYtK;R;Lqr1r-ZLLR1#;e&j~2M$3yPhI5ciRx|}qKTMTX2ZH0`B zJinew(f2Mn3|lEf4N;-SFuPeF|N6gWYYlUaCUJfzMsa7tw1#e3CM#ULhBy)%=)jR; zO{V5c)AbJ%qzLw8m*&Ec&vROFTHSd;-EZ09rk8_c;_CR+3|+Y%_rF$UcO+BLa*Oi6 z&a%Cty6wqmk;JT%Ty9SUdT1`1y|@W15!%9xjb&tR@Lb5<<>2WnhFP3+o16MLOGSx$ z4Ud1zVunYxLjYpj`1pD{0W=IT-r7Iwfmy=dH&22B4>{L%>VV9WSMog^PTUvdinmcv zPIn$$eD9R>{I_rEI8kcoJ&oU6i>B0;M-g|V3m@+JIIoPeEGfRUw%ZTcWw{c{{|JBD za~zSNkU0%3t9Vp_k7j>Z@H1{g=JRW0zYMYN7^#Km#;pTPH$`v*(mgr`VJd;5d#tM@ zBaWq8qehUEWP5Y(UJJGqX6}dWCyOS&CqGYbb4<-B*Mb&0o?Ecy{NUGR%iv8VLtCJP zOd7gWQjzq5{y8P zobR6YKfjUACJj_Y7WmIsz7%6W*H}}Sasu?lN!oD4or%5Uik(QEM088yv z*O6epebR(g#wtDJK5A4;k)^3M`jc{VG^uRFWT%llqnqfj{Ovm;>7$8RD7cxAHe%JM zRRr84rIRKa&vNoSamIJSPy)||nkY?82tT!jd zt(GaN!2!@`FFYufd8&I}@1lwY$_$qZCqtl%1Cptz^}FPbyl=n=gw`fj>#{ASsINL(>)fXKJ?u&_3W*Av1u%DXCY1I5s9%!~~ts@ZmQqTXl z8gd=QBQw>Za2L0>%>gZb8qsTlwIJkaP=o`ve4&aa@(}QZ8-xI8QlZPZ1L4N}D^|il zPbh5+ZC*6C98)p=AO8;eR5Sl2;w$%IxS6v4nGtL-G@qNh>gu4D!*K$Gu6)!DvN458 zjS|;*Uo+WTE+`v(0`)m1dH&Tw$(>IdhI09K-R3Ma?VSz%J>4gDz0SL>oqM|@{`Qm< z$PoBg2HX5C;qecns{{1-^0DSR`&Tm61GdR0s}GK6{(p5W>U+#pz zBO-Eo3}TNB*UP^u1Rls29!V)C{C@lvb&~u0JqeBBZBHCe{P$dt6o}OQYb1H{rwDD> zZFmGOs;uAeT&oRo8m*s8+8U#nEnMNZwtdbmJ$yLe>YZYvkKwA@XfE%+o+gw{>b)F> zUIWt>)?UT=gYs##k$Hxy?CesB(nt6xD+OHHfjx;^(B^-Ajm7rQlEu?wG$7kxGHLvG zsp|Fs3E=m;W0f{x@KjI-jH>T>Ne|rWlT|>w={niks(iDWva#Fpq^487*W&W{I_te4_a*;@1CG4eTrm-)PkI@e@o_7e3@IHKJ?F8Dvn@p_;YYA zdJ^k_EmW8OMVYG|4;N2i>}k1Vt%u68whQIXOxM)w#?u-@f2CXTsO(hI7wJ)l%n@XM z9P}O@D!xAZl-GZViD#}e?7Tnr6*>Q_hnY3a9>L| zm!@=1)?_?8vN0&;)$l$yi1J{rH-Ifp;t;o!J)GH29% zme89p9JnR6mzJo?ZD0G5E%gR5$A3HdL~v?$@0VB6*YaNtKT8#!0YU4K`Z9=cy!o*K zyJnta&M|{u@RIl(KfwSG&mK$+!x(OJSS-f`UE*-mgw|L(VjF%=>ySCl} zkBzS#fjrOa(RALn$M-#xgRfzVtQ(Pnb32IV%xc@*j7kR;fd(9OQ4chM^A&5e6Y$ zBHyf&OTi-mzBrUi`)yS)f6*r=8~v6e7xI_(V%vyo7u#o=RfmgK%S|PStp^v;0$7N~ z?#lsdn8JnU&i$*GsYbZ2+kc0oiFsy^&WqXr=^>qh@8ZDorhew{`RerzVm6h6@6(j^QtDarl*mVt?_6 z8IHx2Q!Gl#z*cDu!^-s z6226A>`p+F!bb^#9#hw<8}ShCiUFzndoBCb z;bUU{kc<+)a*aDqe+s`$TIn%96R{k7MqXlG=hUdQOGy376Gq#K-jR084G-2=E^G;c zdEPE=?2y5hFBSrO^t`xV21ZOvx4l0@q5bzzzY(ITG8Rpza?x3>(p`QxQ1mba#7M15 zV&G*w4e+F?X3Au%%qH;2sJdAF=I6ws4PPR>qY=r>0((xFP4)i? z!csf_@f6cYV3!kB|DLHwEhE+ybozDtIR!L>9BSQzN=>ahLj~U=8npyNlZO%oZCYCA z%d3Z3FuBcT5SSKog{{4o*R7N3S-(#@yKprobLTH}om>p#Ld6Xd9CZv*!_@m(WH(%t zOpX~;Dy)yi{T?kI&$N%!_`iM)t-#;u&BQKFd5)){6rPD)#k4X_#A{X1RTHyUF}?iz zX2Ji6OzhUV#*!}m+ysBQdZ`qOJgYHCZ%RjS--a}79M8WU&FTt{x2zb!r*j;Nih?5z z^RG@Yo@&Tx3#|X}*JknQ9qw}0gpSg>GEsBpbwUeS z8;|E7<>#q7bjP(o?14#mLezl=nhBmfiWw6mg^DD_5Ih>`R8{^qxCkqE%d0lm`w00| zf|%7$D7FH6-43Al!7*hiAL84Y_LvU-!ezhwVIri?f5b*CxNCMbRo~7tn*l)MJ*ol7 z=Ul{-`e|I)?+s)K17y!7)ELaWbM=rsMTrAupdtg};7U;M%wpR7rUvi{7im` zb!q8?;Y$Q)@ z!!75ZW6Q2E9yoY&$Clo0+CQY>Ke69hZb{DuLo+IA0#)B__n=$9k;Y;rqUq?a*HdjT zJ-g%%#OZDtx1H6xV=E^k?F&+UX7U4u5s47BPjlllyjx%G0OvHNBFTzWshO-z=Df=9 z5CaFW^Vl}pd25tYk!Sn5#m4fBbA48mVkh+oW~814Al?jxX%My&b-w34Gh=3{jWnz# zT0M2|cotrO03_gIBnE9XQp;M{)I5TML)YCsj|nIfhGTrz2ddKSo5zhlC^`gjLi`;d zCmU)xXOBeaT>dF#?Q!s2#p_AyU-M#o{kY-aQ+A0z7A3Z_3%TpnN;U62HCnPhP+oph zYwQ;fwo`19)Y9F|_Ij5h`{!zHccfMPq@H7HsvSRTQ_6Vow{8gI`Uzd>l^1Lx3Y?X_ z4bZF`S8};A?c(+z%e*^Br+UV&OAV(!W0jt*d0zVUpXZZOsWJFSLTOljHZ=%$4Ly(i zhavf5kIIxN%Bsjk35c4n1-MqnW~v#auuvm-ISYPIpI&uI9E!yMG=#mYLV_jJezlWv zF7GlFdIY+dXeOe6u2-)B3&oVwk*-733W`(@Oc>$vrt~D9r>tfBfb5GkRwD+fiw4~2 z9d1ThY4|><_r}$ynjjcJcQVc$_Qt$9wNtm&ISm}*0!Z1`O2tz# z3;$vCP!wIjwrk@{1N@YAyy@dNDf~@`C$fATh$n~X9fq9f?JL&==)80on)h}|8ujEfkisr z+_{CReHU@X(i}mB3t|ZVpVxI45#FONQhbimtxw^a3as@0i2HvS`WVzgQj5@OdR^2V zFY5@;j;+8BmnhcgRo}Oaq`dAcnAwzFulm9PLR_NYC&Tl5Vu{KL>&2nAlRn&d^l z%>U*)C6(6b(y8Y2>SK9i!)8ck^b5xLX*@O?&$RP8SUlAYo!rL!Z(hDo+KxSa6>{bO zzlSkKL;CR&hYPo0`g2wCsEJue0SvM-aTGnE&x8EC(uWb<=Ei%jc*sJJ$YPz3fF|o8Gx?_|9I z4AwAfg^g}9jBd7#rv>GsiYZZt=y6a+C1bn6y3dapIyHD5Emy+l!t~%z_D4n9`KpEK z7qaE>CRDqrvh3cHjYPqBYc_8?(TGa?WHJT%^YMW0?|fQkMaDJkj?Zt?=0)q&<4s4 zJ!u6+!^$l`w>Iy^h(k_BTH)|ph^D<;)VcV7#zx9|S+y$n?#AHz(QPN~j*pd0;a5D6 zPbTvd8OTAe!e`v7UgDQf!BP=$#iDb^0IbEM-TVeNeVv14KqtfsuxJgBu3aQ}mYQj; zO!SQ1xUfe9M{>KK8JK=_zGmvBnP<2ipyA7xmVfAHB0efu==?sms$Q++=C*9UN6Ys_ z`5D!7zzuBD)%dGswW8T`EC#(@*%Efb6lPtoRo6D>Go^(!ld3+ar8-hqQH1Ab_xUsy zZ>H3WHWK~S@|Xag!8lU{x|#@F&3wcs%&TXS3pq8L0P`yQKsBXMnzoqAL?<+daP)`P zGN`yMHS^yKTfr)Adi-G{*|ht1%GZ0W>W+}f2}~SyL+;-o#fTI(tR!7xbKUMEhCnI+ zv2M%fI>48Pt>wfDb`HFaPu|-BaeT~YJfq|#T_O(p%0|s^80$L3Sbux8jePR#JPG!_ z_>Kq3j7_r*;KBqj*5o6nciY%FG4kIRy55Iv)79Rm8+6axY|75M#|{pD)c4G0ukKg# zczrB!boz#$5ETLH-r%KE*cY24Opt$)n zRn$wMmvrd(u@o{qg@*Gcx6sqc^rETc7!Cgzy)AZ{1iDdS9f7^f;*qpE`|T&w(2BXV z13;E+ViC_6)R&>nK-eP)X~o@!vID)nAZ6tb?c>O%9DDVJ zAeB7JKJQ}p)C?_b-aEF_v&+!RRYT2rF~bEJilFCW-~AHkzk4n25JHzjU%Y$rH8eWp z;S)U1{m#sUmtyeF%YPu!J#nv^|6M^n90H{$`h~F|`+3oQBlAgE`hv;m;hU5CEmr@7|h>MNtocG^DkUsklobWz}D&SGiN62hu%d|i9S zkgmDwh8*;ITSNx#meA!~8+vfa?;~54 z36e!#GUTb!@y;p!wn(ALEU1<~V}X%gCz?@(N}L{ ztXwtknt>xv?^E=6kVo%>m-3v;g=xMCRZRTCHyfYOZ%^C`52&QG_lhT1r$>l0lOAv-ypIRYN%qQC6?nLc_Oh;cYf5p3hS&90}%% zD~;!&10IV@YHE-7SpZW{-&4+!#~uN)G?PnOx41s8+e+WgOeq__(FgLjSBu@&%TehV zSj2ZQ=Fl-FM`V`B(q`s=B6{q%#YXECy;OSs)2FU7-6#L4nlCqW@VF9{8+u?6wZ{SX zb2msyos4CYj0T`9*A?ITzA*7c5!TuxJc~i}?Ooh(h`E7&erqNL+OK$sjTs?Pe?oys z7>UQ(;bG8xQ6|Pw-i~1gm?Ou;NXutpbxiP!pKY?B@M|9G;NO%)Rr7HSQMy$P&TqEPh!(PVtuGo+~2JuVXF#G+kv*Vx!Z0b#8Z+f$> z?E!YnH-GX9nvLPU(6LfYdso?2&u%^f4Zx>~E9^PVP{GA%W!UPu*xmb8KCc~wHB8Y- zX!-j&$0%fXV7-P$QGumN9Su5}f+-NQ-}#y3l^Fj9x1M~}^pV*HOWv2YJ^6vG!DA54 zz0GS!VnN}jd7bAMdu4;`=*ze|F`UcR|_2&Yi!wwy7D$p zoCmAEUcaz~zRETNC{DyTHygJnCJXw`nuEU8zC6=^m_FN3_|x4#52kp&JA?V-zDCan zJe^IiFFV&YZm>H6Qj6DLnrR>gij94NiRW@mQVB8auI=F6WC z4k`meGE@T~7gejjqj-8aR$JZ{W2Uq7`U7ngcy2$}%LI5l8Pe8ESMy?TRQp06mMT(b zY2#-@x;M_7v%L%aw0yd@o7bL;Y~zHJ6p<=pQ5=+d7Y6pb!`9B9ua`=ma=_PI^bO*_ zd5Cfaaux0wOl{Uux@a#x7(IM_S~0e^`-WAzISGNU;|GzzrbPrCCsoXP8^gB);lg}P znUX8kBLNC;+1m|DNeg%V#19%u+-H&gM(5Fh=)q^F)GS|UpFU?5Rg>Img<}W&Jw}w) z@{Spw-X_%E)<*9`!HYa5?SKaQAK&sQ=iZsgA<@!Az@%!z+@*JSJwCXtcfkRy! zUAL9u>&JIwMY~0ynRs$6=N48oFABpIcwG-nS`^}+^*Oye)x&-$r8X^9;{{-$MqfZm zF)%Iz>7OJ!lf5h};O7-8YoJ{X#Pfs&5YTAQ;NqB{y7;XI22GBwX2p7#(xhQ>XIG*Pv|f!z zUzU>{qOGfRv~2vsIl-;d=Xf>HnVLJcBR!8u2vS-aUQv#=OS5mAKjEZq_)^-nn_`hl z_e8t(aasH|-8;?llit4Oz1luq$ywj`UK~e$ciQb0J14PuG(1F59`&_P9#1JlTKW&5 zFP*Gfr+dabQEx<=K@jlZItz5tp09J`XLBjZFR6(b4QwJ^iiJ1Em9z~X2txY8wi>B9 zFn<*sKKN&jx1E3X^*h0r>5=5;=-p&+_N+?XA62q;#-M;y#%I)F2$gy~#Zd~ilZ4*! zd>~GE*D?6u+aU>wkdw2nAvhw*EMO>ily(bh>lho|nRejf9lkPOTgsA73 zc~)IfAlob4O8g={g#~omp2cPyHRtj!fH+S7F2IdJWy{#R{8v%9u8iqyXUxOT09$qB z7W83)RROF;m73N86*UnfdoenHI4xcyr{z;r8x+{ysBi@P=x-L!o8;{mWb^<)uz*6D z-xxsxcoar)n+xmL9gpirKD~`DWtNV~s#t_et!@;dQMpSa>3#$S!97&u!w-gp-$Z{4 zR1+z0hKJO0?yK37R^Q-xUdpLpRsHSqDSQ=V0` z{{#@dmdUvJX>t_P_6<34;<-qfF_gl(VGg!2)H#0}8*TecU*_XM>&p;k$&W;vMBBWY zNSXxkS0lb)X|kUhm@2Y;;_N2b$C-=h^1Up9J*j(N{g0arN;130Ri104B_G-!sf=dT zfpiwSz1LvihLQNxS1ogQN;(uBM`nAf1pC%0&Ea&_n%rP8aQ)o#ENhC&HCqTUNMqkd z&jU=fSUch{Um17*&BaAr#nbo?eAo`vlbLcqzT_q?vEB%!gd?iM>kU% zqdlH&bA3_v52iOyXDgsbC$8@~yDOGXbY4}9D`ut@O4lrU9ZBk)_@4%PG!(80(~c zfB#5Wnp@O^le~hr`fSo%TTtic3d{Jpr!GGBviG^p$Hz+sQI{S#q`uk|hL6FyfAJ;1 z{KHVCx;F~_uLmlwrko){(IpI8E$Vr`oeCN2)vz}XJ07IaE#vOE6s=}caQnO6U53b!Bqn=^ zC2n~MkBRkD?r|S%S&5KoPEoFFie_EH5!mG)c{BEiWCrWji5Gl8e+e6%Y)fvwmZIZ` zU(+I=b>taYH>Cc6S5^u(zKl_uHfKo6-<5q`(51QLdq5*d8p(K`jm;tx^2~=v6mwhJ zGTNqC|3Q#G{|7;0rYZP`aY@cs@GEN#!qmFy%dSy9VNi8jF?T3UI$U>k+GyY~=H3rYjPofpL7Q>F>7r$@rgn*ZXG1ZaQChkN%{Qdd`3y7y`Akm69CHHWt>EmWE?5BI^07dZXYnhAhh zyqoyNE?%DBc7&crXO>_EnDPNz3b9O^QAdLl^#n1IEa|y4btS$-mLj!_vZ(M(>~#)wAd0zUW0l7mYrx=jTazCi|a5#mt3X zc&2n}NVL8~yJ2+>(P4HDf9RQ>4+79>1>3S5@oC~S64W!NWjZ`b)_C?f1-d}fTpRIT zCKYWw*dMU}*b|-5H=84cicegAvr(H+tg|zYc7uKu_{Xg-*-NJ0vtPKTzE>tug{zXbl$oY=<|vd{FpFWb&ox5;?k0cSC@ z*n&RB{?sE|?!wY#^!ezS!n#=kJ7}60y|9fFTF6-29(5luSJLqIX%3eig>i&Yh?~5oNF~l0b54Za;L$4n_KT>es(0TIwBMvfI2yszj%}SYo(;B7%S0J% zBy9d4uzvd!)BNClB zmKD!vx3(C=o)-nb9%&Fxjvh}vDa0q=iPs~CQD7K_8tq*MFitFIR=%7R)T-wwXL>!6 zNi`gk8Gxh4!!?6Iu;=?%xi#S&YiqmA#x-g6$-kG%rfW58XpRO0O}=_))+%}!S-cI| zFV8pPOE=W)6sdTH?0gW=X(MA_X;U+NqY7%Hu64pw+|cNsbOx;{HWho1YkL`)S*pOy zMnBQ86V72%f0OjZ_<{9o*#L^S5TU#IMYLk$wloRfY5rdJV1a|L%B|tG$7{XPXpZJE z9ehB*m@_NtZQ8alqiBX%&d?VSz;LK;OkXMKZvUA<27WMM5t!9cGu>q#sk-UANLKI1 z?bMAhx(1LEc5vl~yr~{Y>QG$wem8p7JDg_Tiv8K^dNdoZ)}a~3HzA9TbzlL`smf(v z!Wv#Tnx!S$N}Ei9Jo>i|L}_<$>zk$nf4s_hp!}re@)Iosj+M=H{RNllT`eztX+!xH zd(4%Czc}I&vN0b4!OD`~x~qdf%6YUYWF729z{SXJyrnh}Ax<o4kXk2^F1PITA`{Vo&@$%tZ`Tc}(a*uBz7;muqUBh|5orT7 z?7K*9p6h$xjptpJV%6CXQ&Ve?^)4MEESJahtenY^C_lhQ9ie;*yK{s@)gy6D#n;8G zikuGUFLd8|wT_DMZ+|M#pkBqoj;50)!GHmPq%{46$S>09n5R{y&Q{&6Fa8ZbQ{HvX zd=?^y8WOhKVFoA&?nJkEExp;R)jVZ2u=L3ks`yEnO|+Y6i;p-Y(Gjni=dj=@>A2CECcF7mrBRLl z4W=8|$yZ@msQ$dYY!7~Pz6*6Akwo&RZ0Ww>wvg_mxi%pjn-PEVT1IXA zY1qs84eAebiqgU+%-^ca(O+Jatb{hFq-{5eLnD**c`;5#+x9dm5+jQ0w z=hzXr7MS;`^s<&8n|Lvj$ul?u1OS8^WS%e-lLg)_6^wp!^B2G1r}b8zD#D9ukkTDf zN^V+G*8u1M^i$>8o-og~8PjwfKiYan+c(X0hUyGFA53HT{#_YVGwBW;320!3M3tnZ z7t)*UN+X;eL5`UVntoO7lPNB7fpg%1m!OjJPkE`$S5lcDdl;F~#Xk?czIA-1JYSN& zDzM|F>XbR?)Tf{F(w|@--Jx=9*ZBb*xVE(#H9pV=W{^A9NzJ?3U~~M51cxxg+g`Z* zLGROsHahU!7~{))BYP^_nH17R<`SJsufc8+tmrBMzW~$vBI!9cfc8*DT#^fpf9-iq zyY{?J@fN&HWSLYzT+T+*uG+#{!(_9KChYrQ8JkKeZp^Njqi*}u5izfKg`dA9toDiD zW&M$&nCHx>OZEe`sR5_IbW4)p!zKUhUwY{lQn*=O4yj z(oSb>tp-EME$b1}zl~IU#Km1l_>BAUdQIyk<{T&OSLY^leicENC%=0nNwP~)Q?M@; z46RFA-)(VmF-gML&nT>LSeWsiycV)?Ff5k(9^h^4@y)s799X_m!7`aNqm10Q(90&N zexWz9&rZl8U;VBQvtN4YlA%k6$AVpXZdy(-V?1MA0(4dt;Nd-};VlJTH&HkK@6xmG!Bv z=I_+G5s+7zeZkj!sMhuR+6c4&srm+q#-ob}1osi1vY6e(s|srupbfE697kub3sole zK9#3DT8XVL7kL7KXv;@PJz$Y;S#UJ<1^dBN&eN|&Aj_u(TghaNPn6KD5axhzl!-lX zN5~Rr<}lL1fwTNt9pF`Hq^Qw<7zxb%RNd5iOk-6{>7w|SU8s7wVugq_G3tlIoy>7;^`jqo~^4%G6k|<)#zkn31?EADTaJnx%p?%dis~~C+X9Q}&Wawqf zVMWJYygmGUnDlldw6>!4$WOpxo;}vXQ>JJFFIj4gZ3|Z9gf{6_-VeM>aZT_E3(IrH z9^n?W7tj;RD&iK`Qyd?Rm8O3Yzu{jknA=RZn*=0ve&U&5J7k^cKyx8__G2ulR)DI@ zkhV?UqLH?ANR-?8do(K7fI4;u4#%JYLWr}(7!`ikT8({}^8;n|EUxW5s^ScSh?-Z7 z0$)HfKNzMaGE`u=vt$XuFuGTs7@yvD9H(npqLA%KI?p#E`iYcXBKql4uj=e5$p;D( zOBTV3ir-byqYHmdzAj8;Qm%6ow>^6bSp!$AvvW^X;Q+4m#kZd568^)mKz{fmGV@S- z-EP;j?Txd8qFi4+c7B5(S#49iq~CNxe3A z4M1BTH$b*>#49l{ZS+)j>>5^Q2ryA3<>xyzw;-5p3y-)B>UUqAzrC;Sh?*vkqScR^;u z(*5G_b3OSwNW>?+e zB=)=t_Nb5D9`@QOMV%4y67$5BD5T(z!+WIlG6|n|>n$uZB!NTd@=ty}$7^Wk3SMsk*^{YJaCtXYq%$zriP!u6ZY#GM zHTGWOd|%WCrSuzX2VUymRu&JA@hK)b-z3ZG;M62rtLH)HJuKYgUu?JuBDSxW#t;fC zP2@%%USi%TLPc{ZX3{GDDYO5rcd3@c~ilb<(`srbg}>1ivoR6;i|@4&rBZfz(&Qyk5Y zN0fGAFKOGN!GzJ28L}qNn91+h;yq^N^hxe#oz*nULD{ZBL;tI~uMCQ-Tf1z6lRyX( zg1cJ+!7UKHgEdYANswS^+zBMXT^je`jY}GLw*bMRafgP6;1@n>Io`^UXQE)~@Qr*DNoU|<=`6FmkM2}xb?j_l=s`gX z2Al!o>zw)0TW0x)XHDjcmQZB)B5xgOtJ05+#>;VXk?DtM3GvzGtWk71@xb2nNMm%v zK~U1_Kw@>f0&vTKTKRZL?urXDavfgVEhR~M^BMAbM(1pBP#SVaA(WB&gc4uXVC!PIq72y%qbqdYO%}T+OE*8(HtW1?R z;qykZG4B8k-@o4Gf&CuJ%%xxZ+$&$3u4J#s8}C(|Ed`I+?b|2UAbmOj)J2G^?DAK8QE#R9?*MgQM_=yRGU9&W!t@|s_*@E{;0H| zHjIK6$=@=38(XK7>kLMeVbS5>;F8mOhxbk#S7b~fA`}dSBq&lNCd~p6i2<=YVT~seTk(2%f zGgByx*LXQFeu~#syjA#tNti=$DN|wV+Q(?~t=aefO7o9mh)H6=jF|I^aaH{K`-GUJ zu&QLIxbs&2(J&EKzV?lNN-x|Xm<5!KhE7ss3RtuPjppVlPIHa&QV+E4Nf=wrsPj{K#^meZgjUo$;XU zylYwzmNsYwM5H!~;=d;9?v^T4>nHKEQJZFU z6ID&lZQ(g7Yk%?b?uC>1Waicr2Z}VCk!1G3R?S&1Wu%^Hp*ay_)3maaJ&1z)>ehJ& zt}up2oFS5I5AFI9<@F>)5<$##y404n$oJE9S;$rgdxd6@=@GR17=$!_GG{i)Shql+ z!r)&?zWn(2@pWlVY&Qodhb25=$DRa7aD`sV8$?{dsw$@%>kL(59u8+JxM41R*%vxq za~56GzQCiuuQ2LeB;o`O-Tx%UIjhA;J#b76=Vjrrn%~mHONLcyuc_31FWTC}KaO3W zWz=BPj%tYfHLtixtVF=Dnlbq(<#~blQsI$HV>wpc3A`k1U2Z8ypG`9aUNAU>eZ&esHnA! z*KvEOvAfOg4OvUC4c{!y1v@<{M~Q1Q8nu^xiStU!=n{wF9r8iSd0uw+sviev|9HQF*1 zaXxBVKsbhdboHvtIQ~M2U80pnfCThnEif={l+dmFP0fs?aJnKX9HLC)BW(jF!BN~y#a$~JK{%0KUKUg`Z_Fiy=J)xhRubl;y4&$or|Y^#wD^toVIey>?NYn=AUv>vPt`(%r0h0gU3$**F0MU)6%4;zZbQ=iHr ztrqR$BDyFSb`8#JQcdXCr#4Ew$gw=SQsMWuXMzv8wDj|Me!{5w2Fn&lX5*K`l!Bwm zH{Sj0%`c%*c=Kjj;oXp`d%^nLGHw-j8%KCavw>fOcR(?-6QQ6TmD%#H=-jbGzgJJT zwbKk~wjCX^D0^o1S~$opG4KtE!xM`9XEFW{=yhIlKIA;`+Jwb}=`iV@IdnR_(_78V1MG-hpUUf)+)pfLwVS}t+!B@Q z&dQy%#)b&Xt(Q(S^s@q*@|6%&{ zx|9k|q78>i#8{2IeW*s8YJ=N-O$R&obFh5E@S8fJ;EYtBQswKa|H=INna7kMlknnp_HF6*g^jH&5{0Y#tQrmA)L{7{D$AJ+ zKE|c~z=Q%zMnEx#CIMwd0+mT%6s&QPIIctaR~7E}gby*r!R@{kG8Z!Avrw&FdtSL# z)yRR@kw~ANlN6~9txnbSA$4mUeW`&Kh5B=CgNFOIn{>!!j_874ic#wZ_Pkg9m(t)kN?!X)+;^h0dw7^b+~La>Xv@ zF6PYD_l?jk%IOcF`aZgbDAddlu|7jgMWy&22UD?q;c$b+kx_eMuW#oF(TLQYFZIwl zci!F)vXQ&?uj-5(&Jt#3XXlnZ@LbQVRpxWkel3YmO@FkgqDk`zzRWdtlVW#?K>M|r z-_g=*6Z+j6e?It}SEegY87?*AXoo?_d)}^SIR51lsln=qW;@S*&N$VarhxG_MI+z! zPTZtYIe*S4r;Mo2eK$vKsxOh0RX2);X?`Wz^D zNA4y(SDr}iJ|1FIJn6FC2+rWTXzeZ~S#qVy#3drgp7?b{v43`0Bw^=gl-^JxudF$t zW0KhHiAz(E4<$(O(tkh5!VWIq^E(*n2T_~Ke}C0qCXRk zpC)!AuTj`?VJIvAc9y`2m5^}q07H^=#~?{J8OdGt2hbh(_J)!E#%QAbY_?Q?n7nJy zdEdf{(U__6sT^s3ii);9OTjDRLnW*euJzo|yqB5z2ClV*ee`Ev?frjfP=8nOp-iWh$4 z6S)KY1tBa?ESOhsfTE2`P}JXcDBAK zK3g~dFF@+}pJ>yb!^GDfzLJ}ci~r)15g@PHlzV`hucMqw`>sDMCs3y)3;@YWO+Co> zkVZr|2-zkqkn&NKE1yWdtQoEZljKxm+G;}I9>f9w?hmqzvgx&4x9R&RfISzKQ;rJb z3*F7X1=eW@p3KH0W1s5b;|7n#m1VwN@UYV7O+|!@^H2nDaIwt4*IdL_&%sCn1^!j_ zG_~cIBN<5(XX+~||KyjH@1sE|>@%tH{SVk4k-5*cG~I6!v5sXy6y-+xd+&z|Gi#;} zq5Q&NH(oHYq&y8te3)c3E^ai}_|H3eZ`{sA)N^s)iVqA6?B9>!b}qJGM9MeXd-yP` zC0fnvqe@oSMx*de{W?lb+uCNbaqNz}(_v6gL>s}`dJDsmu z*CG$TcpjK1OWhmmeQi*_3N;$dpQa~^MoS;!eqE7apK!n2*@0E!4Bzg#-rL&!0i+hq z={uBU@-$!ZEevYOd)fc|f);^#9=DrH|zvhs_HJ zBxjI!Xi<{gNOdY9(TdJ%Kz7HTYxAqP)V{LlMQ)v#y{k#(PQ*t9@_9HzM>wqpe8guf zF_Ok3L722>bJfNSsYwdhqy7UhDX)&oo5c|8CCV!LgDrH|Uy9cec6cG^f-|4kHoM5Mv7s&j7~Spe-ObbC5Xz7I|C3He0zop+5{~ zJ9}C?CA&V{CIwwyK#3sD&B8O($@`q5dvs=^n@jEpEa%r15S?ggbDMG_l!JAK=lcv$!XR@ z%O2Ggw2+VoSxE-Y(y9h~^OSJbynza_;IUZKif>7DOg9zF?K+WYpNTjmM>rctW(o<= zhgUrxnu^*rf>wxl5D?Id3I($wcW>jgsq9lg*#eS;u(#!F{C0EaZPUiwE4rhBjl!)G z`3xp*lFgREAO`_*DUwz~&}Od9uZen`rGH?H9aTd5`k0IU5W|xs@ z?@M#|P)-8lXDj_+Jym6W>2K`Po!}^?X*J1>k-o`Yx0U&)NqS`M8Hd}YqZwniZ0UP} zc7(^*gV1auADq>qE@QRoUQaG;rEYv9kh>E+ddiymtdSJ1ePEkf5A2;!Ml1Rs4lbwU zKd&vjlDVr~Ya{*%V3(+J_A1jYA9mR)oC6%vcC`Dtj%VKVOL5WG6&*^K^a8zW8LN`Y z7=)jHp?X`|CwktnUd<$35KiOu#C2b?*bZc1uzAT&aC;UsIiKwLbUDMcVC6_(#9^kk zVtp|Td#XWRgOU~RAn`$lr6||n64b>=oL+Y*y`-GCuZeY6q?xCfujeoPkcv~443RJfh;OAfBX&@%}a9pM=4YlAK-qAE`c%&T^lD9QJj!D-nIdXk1W{t8j030_o=h{Z^H z2&$Cusj3IIMJa}a*L4Zn@%hcI&Y)&3TSz7jDR_(PWj5ubdX!#o#^bD(z4mLNh0g;Q z?T2R2ZG;eyX_`pI*5Wt0c)Ri8D2JyrGa<@Ogxo$A94FdqMfjM2VkIFXGSu>=(1CTx z7WMvc*h)6x`8;3Zu)cy5w_ra#?hw_f#(hV()E)1KQrGY7I!R#^1j065Z+do zu$n2kH5q7OI2X9;%Wdv+Q5Tqs_~>qd&aq7r5@in1@N!9#l`_YF!5=ZaxHPW>nNTUL zIn%#>F&vApKKJDa@eMFm8L*fg*C$rawFxSupRO9n%p5GrW`As-QFwtg(^$MClW)B7 zM{M9F^S^m*Jlp*SS2dl#MG0SBPlP8h3rB+v`RlUZnT7iG;KXQKAU+OLIu{6}^UCGJ z!51Ae5%V^i$0d+uA@}OWt{R)`S*@aP!8yv&w|M_V2D{hMN)9B!((0a0=8;p00s07* zbE1V3du?V!t|>fEHWBFhGWOK@si~E7l}MiFKY&387&=cZoDR%YCQ+8C{|7M0^B2vS%C6NXA6~8tM;09 z&IyPMf07n{1{6sBu_*I`?sruRy0k*pGVSQF7;k2OBrg~K ztyA)0B$uG~3*q(2$fa*>8zTAQt)r=pi~HevI7h@V(L{GnBd4z&HK>GLkV~)d0Bbe+ zTR4M||D5Kg`<{SgU)qBHJ*-?CmR_qC zL$AH;%EKw|@SXx!jv{7>h1Uyn1=K2o#;WYo;HYzf_71<^<-3s!X*5gt zC=#kinYJy|w`W$1)UV_lSn_gYuCwdg;w`enPe^{HJ-FA z6GJ>j`b+>Yt+8}&Ugxnv-Ih0wRuC6zdy&ZTvM62JdU16zJ3Sm~>z?E8^uE~0()o^- zpNs|8xC)iikGh^y)_eRhKzA$6^xKqp@|z#u7Y@)L{oOD1xo_TokigR}zX^kg4p3s+ zbaeD8*{TUjcjMd^@QkT8s02)2Imx9{oA}~GuN+x0J3$Y=C`-R1Sa>>f!kGk@iQYMu zKl(<;=9Bmr4wwx;%%zaXhc)>f=WJ_G>IAQeKRv?5g0XsuN?Ke`Wp;|}#{Bk@LE4M2 zSJmC|uEK-Uv{aKs$X6d|`hO0WN+>GkyV1M;3k(!MP3*jId%p|&lAov$n7|>^z@9X| zb`!`=SFPNqAnZnQPn=u?@A9JHhSEW0&OKMGOnrN8Y`))}z>#86urUslFhu*%<(aLP=|qdJ9~T1am=vtEpBI_>b_6nbK0eX$#M~)3%(Jz7 zGh&x}=&t5a^sWC@1H3f8qMk{de60p(5kewDtVI2N%(iVLw_eXXC$Y2t6$*hLg}*FD zkL4F%$;!*F)A3=9z%}#rWFHEuQ%!iu%J3Wsb*w@}r0dA8Zd4zEBAOPntJ2dBsbm*K zm9?PyDXW-~M`+aha$*Zz`(SIOZ~d@fR?lEZk=KN{IbB`&hdz0272td-R_UX?WB@wX zOUSLkuWi@7=>ZwpolV3m1Pzhm&nv5T9~LN0F<$`mM7cCRg}3F|gqv7_#17n0TVLy1 zKAjPKNe#OVd*d!fG3b7=V@NwO))gxv{QG$UT391CzZ7@0piJ@J%{OGj+~LuUcDfX0 ztv%P7RWq~#M{x5~F?jXdrFLvDsxiX1kEV#3bE+knPIXv8Lli`YaqcWec~UgfUg0Zs zPqTA3eKXfp5^jJJr`491W_xthhD79AQ)pn_Dv;^7aJ>BAQQ7`4{;oh;y6DtQ8g4U7 zrR9}y2(jeqbOW4-(U5RHIR5OsRC3_X)Etmam8;s~5J^i%;h#{txs!2t5otb}?Uwxe zRr}HLAHV`rX{M5Sx{R?+b2lAD9@r=?`I4JpxIBlm<8+H%Xvyp?5@?!HE@7%hy>!s>iRf^&cy|&D! z_eC^}Mg2vMjCe+0SXpvZC_53~B-Tq7(eh3Ee8!Ky62ji0j~y#?oYVCIN>IBxWV%$3 z!Wnp}-?foDyo=Tw2m}{@Y|2NO;z?lWGuN7D78}S9@bt8Zt{XQtIzTC;Um58I)3_BoId7j4{9{)hVes z|1vtC6cT@^CTqEU{xN+RRda2m*&VxV$w|OToj|rOyXuwgX0&koW#ZKJIA^jf({1u~ zC80Ys6YM@D884zy8z^OENx?y4e-NweRR1p_-)7kieN!OV@~5sZH?o>avUk}SOQvd)d0v~J)vo)Z^K0dG*T0-&gy zr6}vFbUs{9M96TqnSG5dhk?lNyOlafiAi&UQg(>F`$FAWC^$RD@2N;FOTrjm0W=2q zseljmAZe-vr8>Zj&q5mabpUqT*Ydq;WF+1F8+a0R+r8^<5j)H+=dY7Yqs)k#wKNvn z|FZPFy`k2x@deug(>^5ION2#Sh%9tO`01|4!|06sVgkAf0rFZggbV09+;Vyev$U)n zughe4j}46LM*`Z&QCW2AL~tE#6WKW2SLCGp_O>H&W%(lZObVH4JZ9m==7p#k#JPxg zIed1(#@qAq!3tWxujQkx%O*BAGd?>zGwuFiYU^P0VlA0MvsjLGV<@L)#@;b*-t&u% zeMjfxXZPE&Lif=#`umB~g`LpJ(>$36a+Ml2J=UnCgu)*>-VrX&G!lu~2}GXwMdgfE zsdmk_sh}1aqCHPiW|W>r$Zj0syfwr{bz?rfTmMO=`ih`^ma*de;0zc}Cm$-ltJ{?h zY}KN}w^h=r7%wokRDr8rg=3?hdKA?Ax@m+wty=(Q;VV;nh)1qjY_Q{!OJ@2O=%kja z7em4RI;ni#I#E&Oe4dsyWgC7cfL9XHiWmcE6U)hF3y7>&n<*;JQr++3;7Xmdmq*zD zNj3O!$x}Rb(SeP$DfNg}rJq&r`{ddA+)?u9TXj$OfFP0&lDo17xM*I61lJf%MamFu+SN zyQkq|1~aADGn(+OOrHX^>f5+!2PPIT&d}S4l$%fN39;W0U&RPIY3O8EPkUKyAF?7S z3iq44lkDCkyk#=hBGN%scSD|=V>R6`vf3V#eRGe+`)IM6HaVfUkX7Y<`dpP?m!E}yVm1P2T249!R8 z4H|&lmeV7dxpeP$Xi12ZN$L}M@#S=KV~w={!uVL;SC#s$PK6)q*?DKxG}vAi`agsT zWJ{CipXk)!PG>Tgo->_eiK+;!8}nvGIgIRGMfMoVP3(jZf0AlQh--E{ zVR*FTcb$i}18=%Z!0ScHn%QG1aQZI2u>zluic%+u?Tl8}TwfdPm`u$&&3M$W;-^yA zs|o4ykSNM-rsUa02{Q4HY8z##n9cO(4;v<3;aOo_<+0DoBFZ?$aB*>JDW)>1658@g zSxGtwj6lDkH33i>RV6M5d>IQsQS>?C6d}1stDvX-B2zwaf`1-CU^>15+Y;Ldyxcj~ zIYoG@)}CI%>uD5p1Ho})Wfbeh27S`%cx9h|EK;W|PR+RP6U9+M`ZSWsP0KV&B$K?- zN@&C;j1ztFYO8G(dO_HO=N!U1Iqd+{uV12?Eb&>A`%CqPHVY9VxVcEHVfXETlcdf5 zbRdK{mv$(0*n-u-U`U;aQ2)qvN3$`P!b(40~hellES1D(@5bUG0`x+-xf_Eyzh z)b?GSvN{IzD`b)UHC*PDD(T5(LA^<* zlC5F8PkwJ6TP|{4IRyE3GN%(p*pM{Xp`|*&K+n9hsNYvhhjNp6Bl>$L68zDtORhrQ z`<^?7`NQII46fLiMDru(#L4uYOxS=}eOliB*dxrAbaL4+Wj zSY@b+ozIA9-Un%cl7;cO`@pg1*SjOx6kj7DQ&Nm}9Y*RuUx#jb^fy({v^Cb3+_>3u z5e-N;vXD|)zY^yP7V01#Z)dHxo}C$_GD$~Gtcfp%>Dss!l``P_wrlVOY1oA_CyD`;LmTwILL3d@P#C zxHSaeHNTL{x1w~BZW}j5z9qS~TvF!qxZlLX{wXBLf`PSHrV1BSGm?zY>^HEvBIZ5K zw^iYaaZ(B+d^7Ajar2x^FVmi6Z=ag5A@`>FqhU2`PyNzzK=%peAXuH564M%+phFB-Ohe@11cpts*R0=n zN5Nm2Y}Cb*CZz1UbfyGd=@l=32)`3QEQ-xvG~n-gH0(RA{E^IGGl4`ms+-|av_@Rd z50orq@^N?5+at6ZDfo5oV;OPh0A}7wYgXHSu7wz1HXB-+yCN+Ed%XJZI4sm^T@sO$ z!wGOHCT)JJ9s>eBcTp9ou#SQ4Z0ZmaH^c(fM?Kc(MN>KpBSHCV$#?^jx^t$i#_M%c z^CpMbU6z|M245JSE%+)66zipX7mpBeg>+voxAV5KHBL@F&8G9Wqp0{hNq3q8VoHmNPo4XhN zG{P11=hPvM0Jv7k~U2@ z)Z{qJmdr;bOD^~k&T?DKY%es0Z>p$~Xr2n!GTIDuc0S&zC(qL8+`eXW4Vw_p*nsE1=oP-a7k>BZLl!#{W$K#3aL3w^Cr{cn2qVA@{bK}fB_n7{G zOdaI6Zk1r`V&^jHO|1aBaSv-naK2KNbMmjXs&h#jk1IHOupxAnY>oE;i1gxcCz;CM zd=wc1kZSc$-z`s%r0QFrudB5g5k3%_kZRo*VsA<+8)u7p@%bS)g`F~}3jeCnOB99H zG&ESA5DEFIdEPa&uIfKvQf)y_)Sv8gyN3vmq9yJO&i!)gF>Q6$w35own(y#faJAL3 zrePViK=IK~-6dnSc|`~%Zgc}Bu&?`~onf}vCb)9%F`BVkbQVnb2LSMDMrI|0Pg&r5 zK!k3ih=jQMdRc_+Y5dMDzxUNLv{m>tM#T9$W53fnukdsbKi%Z|sXAQy<~7bAz!%A- za}8kmHPpeys%a&BT6rQNO;mLHENGPRsAdd-VZj!_g<4?tC2cLDI-MxA=}8Ew$P~XMa;v zF!Ouxg^|(Cx2n?eZ$ZCX7Lxb9TrN!QcF{f6RJ+52xG7~QD%t68(ao~QulRpsY#)_) zn>hT4*DmDW8(pX^kcd|2-QT?ZY+0sZecOBxY?^K1_N~10VI5DA)T#fGw?}S3?z87p zn*TGJ2-5VffqTPFeKQjC*!cwa`-KrsN_!Be9Lk13e~4+ZCHsGg6^CjPMnU|io{3OP zdj2S~gXAu*;?wWh9c0qGL+fVQeB-u+o&C3}RXL@{lRb;Px!Na0Uv49@u9}g>dv5Il zYBwqEM=QszMeZ-MBW5#vWGwTLW`6+fpZjJq=lYKRd8>$v>%S&g`PZ_rMxhsd*2K&= zu83C5$-0i0)e52Pk#^Eb?QYUr8eSpn2DC}6S?F8b-mI%h1`$d*bV*g^5e~q-h0+gVxtuHhV)U09#^-iZ_JZrKC%NEy|#V6?KP9VWPfeHslOVv z{k4UHtZ$prfggNhb7WZA=2{-7c-F>woBpmFwrfI=`M-cKBq=Q)+l+>PR(`kg3*G7; zGX+|yn$BSfx_pN}_D!0OyxXxe!%1zzN8eaXtG^hyvS2jyv(nXwFh!wHfnR5;-*2vLnp@zZQ3H#vVH1} zGuz(EM+9|AimDHK2^3faUkE316XxfXZ2*J?<@I>OcStVH(GK6`zz}Ic=e%MSPA*7K z5KF8V&68gKO4w7jT53HNt)mxYzq_%+oFNXie>4maTH=GIl1bv%SS}qcrLKi=rEj)j$TA-{WPkDMJdgg% zP{QA@dDRx#SP}|>F$HJ~`8pMj^Hwtv*cTFf^0<;(?C)<7grmrfV(X@0FeE8qzf!yw zD+kWVfHrgr1z=o#71~g-1%4>1Z{JRPGVUu%}!3ixNXWb0(_c%9^AkM5ZNxTs+}w%@oFRWeXsA0XE^X)oI@TKK(F2 z_!0NgbP+?XfcTsjMDR%xumtjsmpTDaMTUVOaT<9dJ^tU&ar!?z!Bni+W0lz{?&WaXlKw)*wprIs#PaR6i9AWQiWM{W%l6WT4||MkWH HXa0Wxb9ySH From ec980d279124232c47b4684897f546655813daf8 Mon Sep 17 00:00:00 2001 From: Paul Carpenter Date: Thu, 11 Aug 2022 18:19:00 +0100 Subject: [PATCH 66/78] Update resources for Paultech Wiki Reintegrate some resources for extra pins and schematic --- .../circuit/UNOFFICIAL-XMC1400_TSSOP38.pdf | Bin 93421 -> 0 bytes resources/wiki/xmc4400-X1-X2.csv | 74 ------------------ resources/wiki/xmc4700-X1-X2.csv | 4 +- 3 files changed, 2 insertions(+), 76 deletions(-) delete mode 100644 resources/circuit/UNOFFICIAL-XMC1400_TSSOP38.pdf delete mode 100644 resources/wiki/xmc4400-X1-X2.csv diff --git a/resources/circuit/UNOFFICIAL-XMC1400_TSSOP38.pdf b/resources/circuit/UNOFFICIAL-XMC1400_TSSOP38.pdf deleted file mode 100644 index 17bf53c5f2268f16b7d2bbce819679398fc3dc0c..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 93421 zcmd41bySpX+dhh-Qqt1h-7qvrONn%M!@y8Ohf>lYEh*hYcS(0QNJ@A2z#e_x=lkBZ ze{1c%|J-ZVa9?rud0ufJ1I;H%X%-GvZe$K}c5;x34YH6BGMk#U3(%aL{^=P`9quEX z5}Y*bBMT=1`-;ISz_Gw-!70Le9B|xl?68j^oEn@e?4tzt362Yn4~`Yi8O{{WiUFBT z!pYp&1?2Qsk`#>m*vu(6LYW?Ps-mY#xAg^N(ykYb8@ota`JO>@bI#8 zG9ZhHAe-Bp{Ruwje<#7i!JM2;!q~+a2(pBEWo&8gOwI)(Q28$g?*D^9%H2gq)di*r znN3xU+{Fp}r=dvB&dSb-%w}p#&cVtKON`h*Pcd0latmXi^IsZcXIpZ%k05*V|Fwtb zKjL*^>RnvSo$SfkB+Xr|P0dwg#P$C*8t{ME@W<9a7CV{SyZpywHVKfu3#{u*&iB^^ zHWhPc5ZK8S<`W0|KO-1P4RjOc%3_}8C5R_c=fPsskn;9tWP z%K|keT@(SlvE$I|QKu0bOc-El%yMk+N-E?oU zCH_mUGzp=*JK4F@D={MMDD8!qA(@?N<B5GaAMcXuWS|N)>uG*YzAP zGW+ax`xsr2d=^q96Q=e%q)bMLzi)<$Vhxim>Xjq)EESn3NLc9|uSSq*1b+`GY*p)w zTl3fAyQmI?t#$@q(;nz|;%KQeD?OwRot)^2L^4Ypw&&4e-KSQ?f%M9J9ai5i#jY-QJ=DH2qjEpj)-_lG$(DMAa^mLR4kGL3h6x%QBMK)){*_i>Dl+ zOG+RC*iHg!1ColnRMsXVE3bb%@+`rju!TwmZAF?zl=4-jMkdt7*KBobbDeAnuQF!k znO;#tGxF}J(S!0Nu-kPa1oWomT~l6M@ax5{NE-WW1n}!VYg-OsEd&c|d{~cBw-80t zXZ9_MpxH9f5dC#T?Yw@!;RcQxL>7`?$|L5vYXf`6=2m@7ML&ncfIVG%G{{`MP2b1y zca%~NR9NOjFsoEIA8YGPJd&65P1ri^nj5|?O<8qu(G+jajiP;UOaIy0v|nX66ZASS zK_p;;u(H=iWs-{QnyEUJgh{70#MvN|gpcHMg3hqF$4#wH&(GTCur-;`OA41vI&DT% zby2TsrrRZ0;m6X*M$f6@SV}U;l+tb zvK8I~lGJh4Oe}!BVkr{i;Gmb6q3hTgwhERAw53&PEDcr0OYO?mTBHqCw2rPu8#5JY z3O$v_Ij%L9OW?SXVa|=g!~q^t1PE{&lY$l)k#=ODE?-D(av4?upQ+_N<=&{NJd<9z z0?-{{rV?3iY(+q#JzQ}L=cR+-YzzuOxJ+OoOKS@Z__w(_=!D#EBa$n;hSr?b_*Kdg zA;3>*B+2eG%+;KSgK&5f^b$4Ud2gGOyP8=ify3p)j7!r25gf%Jid&z?A$!95$sG6*c&>G&E;&y1V2%n5oMHbC&KXjgPuDrKo~> zmD+;AFja_Cl?<=NraAVqzdP2&Ci^}%L%ySQk5a#(DT$7RkALXnXlz@12-ODhcQwm` zv4tR0PR|FZNs(yZp`P-w?TT;a5j&e5UA+hIvS0>r%Atl*-MOXZ0Lw+)(0W=wLmk1B z7-V`=n@f{UcRNn;egJ1ndlu!y(sQ7C7O3cHmA#+4KKvj%Kj}SZfO*mtxm{<$S#e0 zubx;hvM}28GgVX1E~)xOF3>g=-mWa}pzfg03DC${u|@}wX>S*TLiZk4ndwq0k+I9Z zWW0NYJ6cK2O@V>-UI{-=RWj-;M>h*PC{Ad5W#io3f z1Hlj6p5{g!O28=Jc8-ZslAhh^jt|K4#fewUNOsf-MPI(Lf3I;)siksoXw?t+;mb8C zh|!Q}g{n0Rp?O`?MIDiA!}G6hAXeIX6St^vGX*a8Nd9{TYJ*tdq|ijlYK#?tI>QQp zzaoUM5d20ue|(lFL1$Ggdx8l*)m@C**YE?kD8o9M#uNVxA!*AA;_P)uy;xDiK|GDS zY3oL*W^80sHIeiz)2OGEHa4H_OLKLy3wKG>BW-i5mH--e6AwH#@(9E;W`o|kgSUxm z7p*@RvT!=EY514MKgF(vj;1YJC&)8M7P)frV#QNhW;EmM5G8h$c$RndVv!d-Xb@}+ z2HO!$EVMBMHP|zCY7V{$$FHL%sgA&37zuAnFS1(tK?}U$*Y1Oa<7)$T1GDW^EtpN_ zU4GS-mJ$&q!c&D~Qb-SVmwZv`LNUYa+Rn60#H0#0pb)9Ny|2s8Ph?uGW?7ju_U+9F zTum2cwcS~cJ4xiQbbxg^0tuFwlc+5clG;c*~MvMrYzfSMKJR|!T=M1 zKPUijJ=wr9@aXmAHU2vGZHCzYKuz{yMMh7%s~nbG4=vPkW26gt#_sUQ3$Y*sGN?S&Q`M zrO5_P)kjraO8W2pl#KY=(|_cOh{J5q;4i*_Y;S%@7|ytPxiM%nrmgruZw{e0=|rQ! z#2%7h>h5MTYs~^~%27(Yl7Td_n6orOCYU;Hl)$431Ep3xLlwkCI+%Leh1vQ{{@-X4 z5u}H@nEYWS(>ZCAs6P42X>!_W@>fZ2k!FkM&XKOI6~TDM(V30G0c^A0o|96TUwL?i zJ=A)GL~DRLJ1+1&()0q=pDDFrEQEKK@tDh`^BPD8a{-eA0zAc=x3HEB#MeGF>~_~5 zM(r+qW32y!nM}2+R!#Q6JG{i<*Tk#^=8<=@#e*lH97bf5%BS@9wuZ_~h!Y&JvWqHD0dUiYQqAMsOns z6FlTqu0rzCQ#U#Bhj}-hkf!;HhI!{POSHS2jub?l1v8KYzm+mkpVFX%JlKw_g2mwd zJg%d8z;8R)xv1}g;ku@}EbchX+0h?mK#tGyHGKDo*?$36G7-B8a8T4Gs;RtF7fmovrkyy$#&CE~WZYLyom+3s89nbNCx%4o@lO zxw1x5wjaVv zy3w-(O4wA?ECAbcxJ@uwCtT$Vvs%hn5L{!GGwDHf))Brytx< zC73CELD2GkXhM4uDoYslA4f3$ZQOjS+nHn+vBGn$JBI=FfES)-pY- z)Ux^|Y=xg;MI?UJc$L`;Vi~J48aO+6(+4?lo4Yz}Y7P;P{y;NYESWH@Fu=)Us$)J< zJE&7Zo&7}#oI1-UzJ-;FAP={Cj?CvouB*Z65hU0e zhAr(7B`YMV4V|rY!Y*`^g%iloLPN8?S>o^GrZkd7ndJ9b) zQOxeE+M1g5Rts}>DQ1h_A1p`F^cDyijA4ejjHsBx?sZ&gc4q*2F~^~-XHHIilMWSy zUrrr?Bj2j|V-K=5LX=TE(Y(dC&Tnm`(%q6?mD{#|veYOV27Hmy(++`K_`-y8mQu;a z&Tg!~Q7S*}g!sz|aheI1CF55EXCbjvz+SrFZ={D7PThH7JCdtWM2HsTU=#9&9Jn-p z> zjX|B2_7Eh&dpwS_;_6Bts#2+V?335s38+E_-TheQFC+1ozlC58>}>ZKAwfz_VM|FX zqJP32cJNp@CGo_cF?4?6#Rc4aB~-56Pe%+Fu|1(DLWNy$4?_^okXR@LPeb*;R(0+4 z9~=532~vtjBqAN8o6(KoTa-U?cxn1Q+r$glBR!~#N`ktX`W6GUHbWve(t`Tdm$2zH zTDBQO=^&dDmzT!gckXT8mj?G#%)0IrG9U3MXDl<0O`tZadz!Et-^razlGoNcG%V=wZrZ`Df zZk7wn->y~#Xdti2G0F`w74cQJuwRx^cbWb8*7MvY-WX8uW2&dKjXl>u6Dw~_I==>3 zJC4VM9gvr0nMGggM#Og~QV=dNUya|{T}!L_x+t2s4bR0_LYrKeZy+;hU`B<&@bq*p z%^RZdki_XN7I`h+I;7f6w6(rzfLlh(U#H@SOPh$DZthp6@M-JS@8UGW;#Q`il9GJ0 zc8e(eBxO!yubif{VDB~|79?pB_3M)+-OK%&&F4M)pXE*a+T))L4hErL5=cn3^EZ#G zIkgPcbx!6A=E@@M^Y=S#+&Iljt>}lgJ1YcNsxR{e-K@uxY+AC~`%$ESi|3*YWhbP6 zANb5Vs{K7zpI2+urXgNXNFMt(D2!Wsv|lJ5=e-6Ne^~`$2EP*r3skb}F|SnsPpv;<4P8JscRs&k{+TX8dSSgt46xHi_91Q*?A z$_vRG5JJDubuG;7anw@4;mN(1db;7m5bZrc*fF2VyI3g$MqT@M z={|}r@Xk$b={LyGx!~}b@fP)@pE8Ry`$ck?g(_zsXP`Yu(i3B1a#=C}PZ=<=sLNoP z{n~C2@w>P?@r1q0gOcRXN-zcC=OU|t;G>fmvuD0+;Z;TMGE)UD?iV8^Daedu>ONwp zru`P8D@uU+)-{j*H&(2vvIb;j*Vo2oUX7W+thW5Tp+AF~3#6@nX&lq(57jagI(`ar zq6&?T3uG2)=5XH=uVi&>Kp47;*$d6r>V6RoI=~XAwfuu~@r5eF)u+XkdN6;;tj0F^ zqKn-}$%i@ss1c>a8N;qgWL0vCe6jw@qZzt{+`8Ia%_H#bsAFz-6LME4O-J+04X{`> zcpPvAmOp~U&|Hn}RzjWSo%4<=6}UDYo{&y%3{nD2D%dj_r02HKv**+2wtnE34qApy zNZkd{yY5Kw)4!2F|8C+U^+X=F>?MU3TYGg|6Z>uJ*3`=NX3Kr*E$(mCk$#;=G4AFY zofhjiOlL(FW)x5ODP_#vWK>vn7^082mxjE^!aFd0_&*Tfe~{uoaN!>Wk%xnW>t7(2 z{td$a4U6UY z2l{3Ee*xWP>QHD4o=giX%!5mRtSLXmH+1DZA}wJ|+1<+gF}4pUJ6W-uR-lkUFFZ8oOeV)pX{(!PsYrN+Kep6Vt^@dGy#j7qgvuv_^;`DZS zN9x1m_G7s^EsWVk$$I8@WPZ;uHApyTwvo_-%;zPxtLx_kv*)?jh(WkNVb5UP4 z$nz1=;N=UNv#jq}uMdEy;UmiJQU#aUH7FMKMs68y=JOsa-)!mP5Jc|#R(+vUhNjAy z9uG^;&|r^;o7=fn`}Tdq=d&X}#;f7SF_7N_TYFg415wU?D#mUk_<(mivtYIRiYTbP zGSQE#b>UXA8056U>!*R5%o`Cf(WWh%j7N*j~jjUeE;)0a)F+^1|8{4Cd7YgIDw|0wSQc{>xU zl>c_oe=3Oult9}$3~E!)%uR}`rDdi_2Ck?m|HQKUc&$Ce(Cik*ph@GNg94n zJ}O^I6lf;xTNpS_Tbhjz&-3)!%J!{h#7PZ%DmYrqXbtOS7LkJ21<5fbMzWahmDudp zCvI3SZ>b=q9-9=U3|N4dX#!TOsyK~w)mEMAJLsZw$y8<7fMU<%*z0r#a2FXDl#WA%_5E_w< zA$O%X)djXuYACW-3iC16rOANJBJVtI({L-VjgAV3-{D90qU=?x$<$ejlAc=^edyE2 zYC<&v46QiDr|*Leq6x~D>**-H31|6(@(!bhbFC!Sgx5{f;;N%~iXN$xQ^#JndWw50 zTWLcS34NToE){jo+KSNG7*6y0cucwwtG|an}WU{ zJZ~{wb+ruBw3zqh=4PfrHNgO@`r9=4TX)0#9JKW&z*XgyGBeqXB7yn5S$RqGYGqZS zx>m%%N<04+x59nHfhY9tP-aP-0T+~-zvMxG zH9awt^Y&}v7x{4|g^xYFzhezlCbzAZ@@`zQ>U~(;ZhGtw0U54ab(DOKN^UFPgife4 zwybH_>EM&w!D9n^g~Qo$P|w9qAEUX+miD>?NU71(=yIb!iFGV5;dv3(D8g2h+HGrV z3#Nv91n1yWX;5o*$s1hvDpd@bO`L*ki`2#1W?8p^z-;#9*!ziP?d4GY9JUIgvwn#3 zPJzG!%Qap8BxWRkOSb{1aP1doer>&{@x^89mhHH;)hu>wAg0(?bK+Yc^Iu@zRMHfx zj2!NfJSXz>)=HPEwWX@jGo0cv*!z1hzI-N&Wa>&pZ6*Fr0$u&Kkr82%r4(Oic>#bI4eT}X{ItO+k(V$OL4v{RoC)V z_{ZX1njI8S*u&a!ZukW2EYr<)M}C^@7!m7+L^kTEPaC?(>@cC*Xh+*;CbC&5F5ymq zYaaAU6XX$1T$7reGpgsgokB<5-i0rhTCsaBszv@842_uqKcM%P4jGwpovzdzLNTX) zH7*Mhik!%Yj(?SB+)BdlBSkDaTllR7@0D*7j4>tJtbKfwvhdKQ@w*4X(qQ00G?EN~ zEF0K=j3e$$jMQ0OxhK3?v8P)^v7$SmdjtDjCvyl zyA^4nQ|n8ClK`8G90Onj-{DaJ05X#GBM z4GY>~+%w4fM7Z&Ko3&i9zKVlYpz61erW?mS4eqy@*1OMRBY$qxyb z4W27TE+;nYqiKFq;{E1E76}t$OSYa$D6S_~La!F}!z_o`l&M^yFKyRf+jM8bC~<7M z4OeeaXpVXaZ8LaJN4#{berGq=Iry*~zR`Ca{od2Los`>ZD2{gQ(fYf&8Gl=S4c@0r ze>s%s5hD7O9>7PYBO4|t!A7D!DnGbY&F|hExHbir5I7{v5R$6p6QISybBtYm-=r&fv%keBd1Q9 zlfO-^gzXIr`PZq)bqoi;vznEy&AC9u#`8i`?~RMm zOfyxlq!r{;r-}>mAiCpg(zJfjh0OED`FOu=#YWhyAj-?hd~c7Mj)#MN`>uSn+aj&| z-9=Am%TkhPU;Z^Nah_t(q)h#&@EOfM`uwy(=KFayMxV=Am$qa7p#VT_wHciqqk(Uw zO;`T){j1J=r@fpK;3OE&g{-=0nWMU*=zuL4^oQ@W9V4TA#C<1p7y&wMk6~CFY2<=*KJj9D~CY^SbzlXZm9uA15G!g3tTT-g3f%C$|8K9mSgWxpeoDH zg=JnDAR{9RuXfSjEL=bGf(}L&i)e~-GhMH@Q$Ytlehvxx1bVM;hB@@fc4LOqBW3EY zEG!RWy*cM*mV@(GK#Wyv5=BNEwstt8CaNb&JQgQmiVL?Yx;;0raw*b!^HEIrqG&{^ zs_2Fe*BP-Vzs9eqYy%-!mVW`RKCEq4MrIA$-<~ z0;`h~CBkjJU|Ehuy0+P~7pb0pHad89CTgPw^$=kT)d$tU74B5VCZ_buUAC5yr|#Ig z8U|efH3MNs>PPf6%9fpk8qT~2HG$2!G9S9Sl@BQXwQp0|et8LSQ1ICnyOUP^P-CVq zWK!xoaVLi74U*m=$<2z>ImBkG@VyvlOOFbSW}G>~zE&jCF9r^*gHauGs5r(H$TAL5 z7X9yv3&W4qin;-Y4cLHko?~!DuHs%AJTS^@(FUpwsC7%vs$fV@*H3fB%Xpt*XJh%& zqoU{)Z}_6i@|QJO3FEmKE~+uYlUhQVjwpW#4sp!CV>TjsZlMSi8OnF1t$mZ~{~EZ% zCUn=fUf>!WO#A*bX6ibp@{zpXVD95orT}0;Q?JQC-~kypnD7)ogm-=BCH%R=-#Ye#T(j${zYU1!Sf;fY zm$dpvtHG9$*xZTTN$u98|32~O^SR}k^B?Go2NH59O^?Js?R8n15iMz_Y^AgWHv+Ej zV>@Sh(dR4e8D}^(6@DYu^+B2;TYhV?gLvbe$31~Sl)31Rc0YBxrA`zp;}g%`4OD1$ zY#4}jXAMft0SFR z9L3>iDO)0J?kcGnN}m;^CRD(>3HFNn+tF&tf&I5j18*Z<7=ml<-8)74mCDv@_+;On*R|c%7-``C(_{Tu z_~?G9QgMr|TeN;v+a$@V3A+4#&uW64?xHX%hYzdwSw|aTnx?$0M#&`ETkA?zJ$KRN zHbN)H*&kFuevcQnADV3{dI%#}NPcKm1h>Xv4HotkePVv!mxi0S9JCYf>h?g?00a~f z8)g}{2&%lT(bHD~_xb5w2y%ZE>p`FWQ|f zhp%PWalji=H2+NgBni)IS)8jk7u`uZJ|A~HK<5&>qd11`T4b4gI#WBl_M-7J)`X?u zO}nG}le*_)#3=W1X&Wn&;d72ij2;z&x-OQ#v6X~C4W* zU|vwVhr_A!|1Q zXm~?zZWqU%TkFQrY8+TQATPJF#aoaQ3_przkY#wXwV)>P!Es=)0p&*OTDoXf>>UW5 zi@t-P;nkx@j>>bFN!GDql6%9uy4yt+^2UfxCzbUk`#RgWu_c>&OEWo^#m0C8W3v8Z z!Wj81Zc(I<3xulDNh`ZMk%EuD4_st~QWp)_dwPX(TQp{>%=z4lNG2LP2gNpX`~e+> zMsj`xP}w@Xl`mxl13=-`ghsB2b6SMmv7)4T>pH>Q?L8)a&)e{-yH2`$Q6PKcPC3=# z+W3I=^Y3y5KbF-)#<9kh`N<*;w)Ku1fKd0R;53X0w&(eA2KK+P0N z$QyftX^O2(M%Hw{*K?YWvg$1DbS~IjuJI67%E+GtOW4^ld3$tAFcZ#%bOz zoQ7CUU}>iN$%2d|g2PE>5G$(E#CPSr&g*ku7dUM73I8cg`+(JGv`?gAxc;rDlO11n z;d)=6QXYp=g?qnu`HaVR z)K+62vA-Vp@*x&Y=P&X534pL;^gNW>-$BL_D}Tq<&W#;li;^c7)fQWI1k<6(pTFo( zV9}%h=HoKAtmh1y2x8K3Qh4&vZ9+%1uvweTO1r@BOYv~AV6euv+R1R-5axRY*(by1ruH-0SlpL>eEc zd}3aEC)V15*YIRK=A4Jm9cVYb$I|_l37B^;T!t$$aBz}t^7%t1%5ZW@{ch_Qt7s+f zp=o$~KadVT5kdh0Fsi&Lxm85tREmw3|9P?2&NSs$LyZ>pMagWgFdnwkhj7Q0HY>%& z6P`|7?o0*W@If=a>mQl*SHAVM-@%GDG6lK$*8n!pc`0)vE{%Rhwx-K(kfnBCN!83U zL^}(`>Gul^gizN9^FgahAQ0ds6#aem&|2LV1M#i_9xjWCQNF$PFW zRe{=;8@mY~dn-U2`@MohkhvW~(F)r(M|Y|uSOc0?xn&SH4Hv@?#hZ@bc7ke4-{@$Z zv<4)^n>5Teql_g#MddRePC8Fe^Ub6s5~nvGKNdP8XaJ&1!J}ZmMaZUW)VO@)jv6;a zzO1dOH(>l$h>LHedUUbI%Mwed+lfc^dwpp*Kw?y>h3MJ&Q1fJ@+7mnMxJp$N{9JSF z9{+%BT8~~QNO;rM`L?5AW+BO1*jLrfkT?8CPsC?Z3ry~)2i2JV?wnxlS3%W?2?bPX zorDCXv?b$~m@e${gPLuo>jP!dOmW=N8%KQi^?WK{vvKF&WGZW)zmWAN!5&bUkAlV< zCQY=@9e0*cDcOqZG)_LS*h#XCdE#Rp`*&AaV6pRQQC55(v!uKGOfAw&{~d`4-NcJ1 z$qZg^g5Z}*a4BBf^kwK#UjX{4gHc<2!5Ez%^<40Png28=Fr@YUi+1wk=-p5ssS-L8Iz9?2vG?~eQ&`B+PqL%|x5 z@2f!ff=Pe-Me41KS}gj94buo%MN~eUinBt=5X(TZ`c>*m-c*y|qk>wAi4a#rSCLRx z#1A&M_^EgPM2l?X|5&?Z*KS1g8A*v)cfk41w305og5sa92hudqnQg&3zHXRumdi7*kP^EX!eg5 zovsH4a(TxKDCI>$7NX6S4wB2NS<|iOW6`Tk<;~?KUeYuW3286w8^(o$(4Q6}d1lKc z|50qP%tWFIpIYU&eW7t(jkhHofmGfe4mEYT2?CE1Dt`r%?q~FP$dfF89`Wu)1&^)i z(Vzdd*h+L!dAT}kTKJhOvtBst?4(cTTP;WPB-VC(2JiW-ru7BWzU3+7r{}7-B(b}6 z$W=xR$uCmxJTui}x@G><9R_C;XbL0r-36y`_c$kNfO?z$%II8OO%h88s?<0w&Y zGvSS~(1R@J9Xnr{$KFH8hLa?oelOyn<(2A3grPm#gJv#_bVQ|h+J-hI1=Z5&j2}4O zd{GdBWQtQ3Utowclww-TNb}cs?*c#TZXdn$y~y*Vi(Z&m(GrskpjUU671$xO%b3}o zn;CS~Dw$#XRXdrY!jwM4#*+k1Ch-Ya(L)OcwC;Rj z6g|?nM6RP@;(c$M-xiv|V3G~JO6v_obxRE-PSPu-uk|?>2ufNkxUZ>uheZqr6ik)~ z#`deh){dz+oWQ55L~Uzh(uwJwsh^$q_~nnF%$Z z16z_q6h329uwhuP|EU9CCWLjrdscg~*k}sib`Hsw|Dktas2MGA473h$H21SO=hf|O z_GJp%s8`VtZ4xXL-IwcogyB#@$NVCLgsE_=|cRX5M zv;f*68Uj5$!&2Hz`rV%K>F;StZOzJRXtDnhVVjqyvzMkX$MwU&2J*Xs#HYH|ov&yg zUa7c=+R{Yd2D`xZ^Q=P0;P-hW7B29ITn=L|u1YcOd1|lq5I@bTynREXsC4284V`P8 z7-lU7l~6_Rt11PP61CqZfm2!%IhKRP9{J}%lg6h{p(pF!KU20vw$7Y=i7VA@Gbc?p zqK{W5mgmX_>-JUW)QT)HUmp}IqnM3g7n)$sxZ`KNo9+MfyGFxDT_bN2?}KJr#~Q~o zl!TH_5|MZ&QPuR+BrBoF-^}tA=h?G^{ZRdMZ&#LoADQM6tv>2x zsF9cA28*BUpVmK=3uioeS8S19f$!Vd%y!~`T(r$*D zzlm=mtCOI6a#sQy=6;@Ql~tnpMWd#$=7*7$6D3Q{Hx=VD_mwH_KF!#S_yhGaSbgKI z?^x1g!)Ax(yZa^vz8`u=z|N97ycZ490-d& zlLF=+OcnAMnJK8SqZ3Og?7G8*0zVbxpRu#{A8_R~IAi@l!kZ8U~n6J6AdfKnFc_9`BjkggXEQfcz?GXpFDAFm;t?KU&m169V53J~hwlHAiSpi=Qerg1)@dDbd?RL5F=g<)wCwxnL_xB4r=pkeJY~u639*9*BSHe`Q~VwNy-|CtD* zi|g*gr-7Yt2J(Ee>*6({w#=)GzBOD~pt;$+Y2uSsTxz4@_}ZTqZO0R@WxXSmVK=4u z=wPp&Y_7JWE7vo+(M#SMvWVO)4?{%)-2PpnV7D=L&NKQ(yaJVUnSoY537h>VgEXsn zeKm*cg3JcO8Q%aXoVzEkrSVw{FjLvQIP)8g*~Xr8lLDAj{Ezi+8`pHBy&NU$-w2kO zFii$ge%;)tJiK@+1jX*~+LtMo6|4^LCErYa_cMhGknFe)BHeq1Uud`QhBjL=6l`n> z>D62M?oZkCXR(D{GY!d37bN{+dKwwplkZg-#3@pAy1Ldi=la!GtRH?SMQxOqA`jdS zH#efb{rC0?#Gy8fWiw@ni`5U?N;$ZHvOwwt)ac(>T=G^V5@u+A)!79kpcPz~9VRzH zod&&NXKLjFhHCoXyY)AK%Iy@E8vRie+5pSoE=u{KPY-jnM8xz-joVG#*nB>8UM+(21?bQsSJ@~{XRqFMGIV%1cC6&RGQtjL?Xg^8RuFvUw`D6#VnabRn{U8t ze6a?$_XH4@!uv`b#fz~@#gqYbTJNkbO=`~{QjLZ(^?i~=cU+p~4l9z>iUh@w;J!Gb%Rp6E9ixTVJqn z7cl2irsQGKPwA zG_bQ+1TuZ{xF7kIsF$st{BTATu!l;sy?22SyP~D*LBG|=u>gvHH8t-bp zt-78%fNxptIsATm(AWYyWAzcd{H;Q82kg)C+JEasDgf`d5$>~KQs1vvy3;9m`Y}bF zqzuuhJ4UN>htiP?C8&;0hN>R97@gTIjKVpY=eIx3lM%Sfg#2$uHm8P1(Ol7K%&Jk) zbgc4lQ>T*>Kd~;%GgG815T?7cPr(_v&)hdF$FuIg#&tbuvFSoFEm$a^xQjHbt;se# zSZ*v*_T0$+Tzi@S>QF!V-P}T)=fdQf9^c5s2NKct;$t&NBcU~m?lu4OzLpLVk4aY; zFFr4_LrKl{W^)-61@s%aD8gVLFp^ZCyTXkS-I9-p@C8-$2=}=Lq1c`8aT7)sCK#w% z>AHhyl7NAKJZg`R5z^u7EjN`%q4<+t@uy@8&VjW?X@Q3x-H%|`VsKtuLfhv;QAyw$ zQAJ!+Hy?{)(tE^om(u-QQ{BCSvds&UgdIVtgp+rbA62$2KB&@ZtNs1kZSjF?RXO0J z3hFiq5AZm%^Uyp~o0VK^qz6yu-jycMLssMqsx_MT*Kj)8HLL}QWHl=d`=d)AGw?v} z&CD-E5}N$TpEVcFCU)wGw&7F7dIG7uzgM0f{O+$1T1Q>oeYnf%!%$T$csC2S61W_S zLnJg3qfjZtcz8A?-Duc{LBYcaj7c!l~1alXPoFeEhXnQ!4$iBpu&Q*xVL~q-8a5;yEGov75d3^jShw^ zt=xka!~J%g3s4~GI*rRkb9~j0os*2JWN4{aORWF>IIZ>i-juhwr zqWucCSCdi91IHDsl9b(zWt{~}gSj=Dwh;467-ueY_cl}1+LZOTA#RekXw23DR%zpJ zMmofDM6#Cm%CLZUk#=FE7kJR*)xtnE3KgWz%X;K2pL#2NhVQFS%e878n*1#ZTL;!J z4QEc8vfdFZu9e&`Z%fHHPZlZ@*@YS8NvB`Ji)pH%x~{q-3I810ops|k z&xbjDp8KF3a9}b(a$6W&yk+|C_{Wa`j@p_O!FkNK#(=wKxdwQx^qAxK&g4ha4$ z@!CjkYsR|C4hXMtj(>PtIv}(`e8FyOIV8Wt#DWCrRo=oRbdtPV=^%Nh))3%tvxgQ& z+(~k4^~R0-GHQ1X?UlZ=sG5)%D8XomttlX*{TMAoL!8kGfu((fB%T=c_{UaKTXUiu zire^5Tvr^?IvR3ut{{D(1Hx8wfFQYD4KcwUS_E5Y4Xc^gM=ZxsOvFsz>@i!t0b?iE z!=(+~+kSXqgLrtsJ!XFSaM%9WOh+fcZy2U`;#1yyZ-SoJ)g%V8&tQm>bMlA> zM?SvxPn`&(U861Qd6lgHIEX~;X0$qdA3}(7h@dmXOT#ruHVf{msN!Y)NAUNjm?}h`6nq- zn8Zsuu=|JbU^xQsvZ7TmIwaOZZppuqQzHhvlKl|#2B|8BTpnpLLRQME^A+X@);Ko` zWiZW;J4Q)j`A?YyXUt+g7SxDHo#bNgu)4+ksi{Ax_yeGy+dd4PgSxAJ|^T$2RM7s(+hrPkAMnQU2C?2CF#OVCteL`pg@kM2g~5j4Mw*Rc`@7jlN2% zRkCB+y}1zalDTSI70#|a*%PZi_3$|L(7tUEx@}?hHX!vjz!hOb7hyxmOhU-i+@}iv z9QZTPSwh^X2#tv_aq`K*hO6}LWql0*Ec7+-Ow6(U?Z6TnpEV7;m}@C*=X?yUv9424 z`8hHq9R9%8P;@hf#d8D+H`!B|t^%N-YpD6mUVY-O{r;6yw5N^fYg?Q3!j z4gM_yDZE-Eb_Br|LCGtVN?KD6bjMLLh3=}f2{f&mG&fW(?3eJdm3*6QQnTSvvio_l zymx1NUW#l?+NWNqrrN~@+5KKLuM%s1#wL1Ba8w)cDQcZiw@Ke(USw1rzIpqhcej-G z+w1Bpug2Oe|CWJhkT;uM|73fTw06z9lfytir+DcMLU+H2K1)uiZA#>>H6hy|NWBi{ z0MK5HF7Z^F=uzL4l3Sj9RfmmZ8p~dQFl^mh!-Z9{S?2SZgI2KDn$siB-#A6=R9(Cu zE0@_glPy&Y_wTqYe%`?5W9y-Lim$@d5O?dQvltf{RyW;;PCz>y7N)o2=$TgzWX_x@ zzXh~y96Kee{VM`9Gp;JW9sZ0$%-f$j;;wYF8s4J%Cu4^-r!0O_Kz{%R@MD}P>-pCv zgQ0=Ux^wWbSqT5QnV3lsPn)zuWB4P5*nCX>ZPthCg-KkpnWd~>tz6=k z30lU&ejj2+Uk+Efw#l&ratB1;Sp)PzXICc_(ynFWct#I%{}&VA0A2SJEZo>e<21I- z#HDe|9$i!3k=;!^jGy~$@$^80N;-X+mH7jG$5q?#`1UH zLBuaAnnyK)M>Wh{^M20XV}e(vJsZ)i{w#1u98JrUI#j2Az|2+uJE#=p^;p%=K8+Ms zp>=txmj`I$oJS47$6tn@`aDWbC6mHD``|IpbO;`^dMD9j`akurO&cbK-MM|F3`qP3 zD?*!eH{7U`*253x>ThmvScN-4vinZx7`W7s%#suA+-k^UQrZU{T|eao*gAjE(ox2; z)ZMU7g<)gftm<-DJ2Yz6Lak*dnC5me*)}RsaL-b^=3^W(gX7X^%Sw7E-SZEnEB9*Q zQ#cknyagIpoF=vVsk!q9egU|%nyMtPNlNMloSs%TsxRyWm@!KLI&DnTKSrd*x}M6< zE&3P7crp82S$^&7G~-8=&WvSq{oMWSL1Up6blZ&MsG^Gh#v--d1+~9O5303Mlf2{S zM%ipKQkN9KnZd0MPESrMSo;`|6m#FeOQP3Gb0*jKCdwKnv^3?KQmIIQm7`hy` zZxt&6)g{FH5B!f~I5f6K>@TQh1KrTl2Q2w-eau?4o}cm1Xg(XUzRY&-J?G7x%C_u6 z=E!t-ZQ(0z@bH~d)huoa$=>U)Bl(tzDsSu}1VG0+#j4|?!W#+$sM8iKT^&7AL#4j=sf!fPT|Xqn)OHqa9WQYiGPmwx*Z|fmWuq z)?Em;t)+QZ(9&1Dij5}C99gIRiU6c2QxXEH7hL+)>z(_gT2Wl{FvfKBESwgN60>xN z%0Pi1d7~jo>M-%rVsk{^VNi8e!oQ+OzuXR*e^zE>|74LMI^}O2+q)Z+5t6Ltj>P_9 zvpp$9g3@rl4EPn1K&4S?xfVa(Nuo5>W|x)5R!R|16^jzYL)_@LT*Xxr2V^M@*^%*0 zH!kCqR&YM_7TNTM$GHupi=#c2nInO% zIZJ`LwUIPNQEFr=6%2^_)p4HKOd&Q>e9{W;Q)2Wb&Xh2v3hK~U$?QvUEgA~D5wBdF zw%Kmwt2Wclb=t)O|B}J)&{h+=V^$M-6|{FQ#?!#d6qI?z@=rEW)zC0Abg@L1rp=0oQrZ2gsJxcB zVTTgh-Fhi&ll<$n$-9(iV*8fMe}5AKzkJ_`d=J`g$E}Iim8dc!qu$xcKaD$vD zx&6~D!?17IQEXhyr%aoUqgIvZCWg%H*U^V!J)|i%giCyz*6YT*li+fJHmPMO6$}Iu zIm4W#x7%eYP2FWKip%J79+J}bA3Y@7((f5&?m91L&MWI0517UhJpcbiS>g)y^JO}Z4oS9M$ z1*o%mDD^1?j;S1r9Ca&4))_SfPQ2*u;!C4L@02ODDsMvCNg}vHiW89LqWLL@p(;mU zrmd8&RRy2rEXxujPU+tsa0KHbzC|?-*{Kb-13OH(s$si}(~|dIho$^xojpn&%RYfx z2uLhN^6R#_Qqm>TQ|T&;nXp<#dIm6CWwOs8m&E9$@-t|UJ{_}3^C6|(0XZvymZO~V zR4RvM1=_+i($%tpSEJo#-6f#Jstn7t>nhm_7`Yq^y)uPvGd-EHDjv-EQtE6gkNn++ zNw2}_gs01HF*@j)zGZh3&g}GCEBr|FG6wKsw9jTOy$BzN4r_)kRU@Q785=Tvhq1P7 zA}uw8jz&l>y*175c1QP|R!zz-{{HoBVGW_X#P^kX3G%X>#U|N}B|sFZ8lG!W*=j%H zJ)(#qM=CoTcDY8?ssaX7Z#YkGIfb!=gYu3FQY#^1o1x8QS$Z{WN2$;yg!B|GG0#n@ zPtR!$WDKZa;7_22MyV2?QwG0*2)@#`eE~UWdXkLB|vXdDp^R!b-#APEt527zwrC>l0wYc(5p4GPb4pV7DdC?C3)E1cDU~~(#l3HxrGmBx6@b)2 zijMd2q>dJ*Y}Muuvr@VH6nNtyadnonh^rMmUTvi|xc?P;*dUumUROq*cHNP_D_etM zXiI?tk_ohNg*IFeTve%X_DpdGCuV4;!2=rHEDx_G|C)utG43h9%xw|NN+Fst!!|gF zwWQ+kqqvo)#GUw5;N3PxeC@Asvct~jpHXg8x<12Y8Yxt?Co%jSC9^WiXnl~P z9CA-MoRtdQn78p-Ox~&rlkvMKPLB=70c&WxhKIDbMAe)n^s~RV$^JZKKWJX)P;Yx>LIBOUos|O}~)N-MTC_2T_?=axZDZZQtO$XSWP44|OnwG^;fY-lx=cC_HKqlo3EG7aMj{!(3=0VTIVx3H zmtMXd)4uv5`{2u!2RutKc0vKZjQN(+~-Ng-O+2q8SMZ4qbs5OORBK ztW0XCb_#sAma`scV`*jt>It$Xd?@kS+56td0s?hjgSey1Z zpIMITZ^IHkOEUK~J~28xFw~3D7_9ORr(2V1N}Dga&b-Ne#G z6H%GYDI$u&7^?CdXwO3)67gm4Qp1$$F1JXjCP1UmG7~0omxvW^mWicVuI|Wk=3r3i z6{S&BIOk!Of>p{dnKX+8@XTu!q5ErWA@7`|^ruGJz8gJJ`Dtr=#fO-;Jjt8a4ftKU z_H^I;RJ^_sx<@lI5j5T+Sv7F;`L%tdNy7kw0Y# z3a*n|aI-F+Lb}Em*#IEbEc@KYBL^2^+E@zWP;o`@ zw6e$zdp6>CcfUGb4pZC(ozMfHvvYqzeG&eF8~8$BDem<8HSEu~+2drVKV(Rsi%?Q` zJ9ZLVM&i2#T^-lgG5)w8INa48cl9QCsG#Ky2ru{fULcNBM3;7rYPKCdH z8gLyh_~k7hq8dB(uD|=udu8Km&`H(tSJY!?A>Pj}77^B7>h5=Zi#neV^gcH#kP_kt zWND$rdGX}LQSj$&9|c=!gP)oN=lE4E6t=mR^mg`l;7`Bs39&Nrvvb^-G^KTUkl59I zuIb9N_CfXhj^FPM^RlQZts2(*1De^A_BmQN1si<>kui1QDGMa`wNOJJN7l>6k1KfB2@|i>?HT+ir~Xu_@ZhIM6d~pl4XL z1d)`#J=w}F@sE!xVO2XeR)kE&))Yq;iaVYYI($}hL=}@x1to#Bz)!qcwESK;?Ox80 ztC^NRuo^nbIM&Y8I(+<9Sc$UTunRhZ*9Atty^U?HE}_*{t3SnDKn@vdgEr+SYg6z&KT|>i#cINpoxc58^m0mi!tD# zKAwp-qiW8}y1SS~l=(S&T-etjfnY@SDP#Pg=v9{UelpZ;84q=`gOghNK)IxOjwHEs z3gqLzlp6ix(f#CNDRN)Ynip?(IU6tbbM&mRALEWk1jTQ~{OI7n+22H7`P{Bep*GRSLEY$szUG+eotdK*c&yKXv9M#T%-nl%c(BY?F$7~G zdq$YK?<4qsa6@Zlc{>Lw)spzAA&@K$7+J{~aP`Qo%e=KFl?ju>yx0&fwhv~s!uYN8 zf{<{bZaRqwf={tF*b4JT>3!{^;p4vLz7AG9_X-NuYq^> z$zRF*(PMJiRHu6QFF-s@a)yO*Q4DnRcx;R*v~u!6F<2-61?=FkZ-~tuy<(s;_-7Zm zT8og}1L0D5))P%DS&X8MB20Y=+Wb6}*!c)XND}E-8xz&vgNDW;pl$MyYeHO%G*1gh zFG~y*3AQ&I45mwWTv2dw>*VmYVL(KE=%Y4032kV7=n$17DDQv;oZztCrl<_mb zC{(S#B$YT2xNKG#II3LsX-)9v?TjTxxe4X4iKUX9=o*Y&zr!(ci}y1mmsPB0K(8Qj zbP4@GMp+uh5_6d>rr5#WRkib&@8ptA8C?hCALVqyfHADJ%D4+SWC{zZ zk}}}-XqAl1)}-;nA^CZPj7muB>_9QgsbUoCg%#~5>(JgOsrx=dz2X$05I-2@E8zt! zcY0LV(IbbXxTgN>LT!(sQ18*kia^=95T&HcsF_)$Nf(}X_4^kWeZ8pPNzn=gPyZlw zCB~Kw{5^a?-KES>Vx3Wj6~ih^J6yvgsUsfqbwU*brA}9qK~e-fBKAA5ArgAZQNZP* zgS%J`BkNvP@)lehF${iq$&=P{_)?j_>`H>Q61N`7;U#T)%Hiw(D?v03*nk~uTd470 zEsDzk8o9G-%>a#5fW`&m3P_j!lyM~k(3+iR89;=+Ad=>A$+$u>t0rq*4Qp)+aLM3y z=9ABz)Loqr#UN&+L)&^3o)dAQ0h|Hc%}nNh?utgb~&aOiwo>S#t|g5n#!ZT zoO2-BFY007jHbbO`~3(bkK0iTn=OOSUyHFZNmppZHl1B@(2$sBl&8Ti2KS$re$0F@ zcJavnQh@tU156Q929E=#_#{K!srz#&#wOeHG>kkAGe*Tq9%Cw*JWZdWB!sEfsvN#t z2ZMhCMKX>3S4>r6C^ymz(<3`c}z)}X`}t>vC&s7_NzexTSM9KHjQ&L zW~ITk)txM=oTP1UVX2=N6Lt4a-)!@P->EKQuUPSfEb~^~pZ48(l*;CLe?Qf^>P?K> zzCn%iA$hOz3T=H@%}Yvr@5Q=y;q!18d-P`szHEEcflgez%nR#$CM~ZpNI+0w8`PMBkIr#(^~;I;(9`ZQZw^IEQHvac0;c{!#F>od z-ehzKi07oPyk}f?H`!N` z(ulAGS+n}k6;{t0jv^=nMV&5-o?YXY$ZjY_Z2K^SzWqpx8*Or^N<=|ulw&gkc?zCA z1v1AdAC_px!qh9)uho&B4k6i}a145umFGFf)PpwXDHkYuA-5kJWHw|xUVoYna8bA5 zvJ8J!8QKo{8qxj4d^^+;-~O&w8!_yB+7HaoLVjTXx$L$2D9?4+T|Gx57TwSF3$aHb z|EgWad6GzFjGv6av6MfD-f`1gyp%wXC-Y-@`!BDWQZ6O~H0CN>4e8&|vP%{T@n^J) zimAFhHOJa3ukA#|s+7{~-hC8^bTIO?3!3zX-UrVG#uXiMO@} z&iu!gW@8auc#@e^L-4pFO>GEAtM~-j?NH5@iAV^z{La-1lP8YnUk7-`(CIzx=K^X9 zg1oT?%*x8SuZS++^|CUr)`J@6@>&rCP+*e%WPe$;)i3V>l64&!ydEzswZO+xb@$7# z1suALwdRiw5p}S$XWL~w06Pz#o0>0t&hCD~OhiACs^`+aCeqzn8u_=^LxpK9;gBD9 ze-_5J*2}iwsq71=y9sq`RU@C&1yuy5ye_+_rw?hWw{US6Xt`ZF@KCKC_aHdLd{~Rw z{H~~6tVMkGts_Qb0{%|hI@~_pKbv*Edo?dRB-PsUt-~^} zI`{kMrBCH&fLhT#_vN=zHV;3`wXHup&F ztmzZl-otiXwCLrYCYicaMr5~&&3>&8z5>(^?AgJhk>QYY%Xxx-RvEBVj z0HzL(efS+G!?-Ohn?Ac0j?hOvbYVii;Cb$EKWl4uxIB=M)~2ss-xd!FIv@n+K>&a zikNSOQRhj%Mxc`5O;~D)nY&dj#H*eoMu`3>@VnFyAzEV*MyQ@-dZ}*VGwV!D_Mokn zzp%iJ-Wgpn)_cF?}HiSf|tAXV9x;@5qF*=fuRH)Z9!|ipaFeS zX-RM-;F1b9FAE&!Uj$gj*^e>o;PkwAxtv-WvwSue)V*CZjDW*;{XjV7nhO&i%ZujVb!)MuE+6m$LGd z_-xCs>r_56Yd)8Kq#ulj!a_qNlYeRVMw0Um2mkqY*t6F^KiLD!>(ok2<5$O{O`|^v zjK^4AuVR|UO@bE>*$K@Nzx87N{W9VY|g;K1Gw&_UQj`yNR7btZdSMUEDfj0S8loF)I z-_+qCXdMX2qVhiJsAp{5NfMHA4m;D8phD)PT+RG3m)=tv8O-Q#cNULGGK9iD^Ih#sEDhscm*Ul8MfwTat-x zCdAg0x_Sf$EA(%O*wIf+R^Hv5oAB{wY9 zVN)q>+x4UAoVN1xNaFrN=%1jWXmG}aB>d0-`{yTh;FyfO<99yIwv?(<*Q&OboGtk; z0<}4L#$RXBt@C#ow@xWAYnV%Fx_P)N=L^pF49huxMvWGpT5-INEo4lbLu9#qRGV_~3oGHs`xb3NA*C z2~dYpfrzaG1doIHvq)53IAse;*eGm2r$vt`#cr3wLnm^UKdG2`JK<`|z)~S75n;hE zAMYesizE92&(RLkVmEINFO}yhSbZa6*5xz)LR7s9{HiK#*fTGYyHryFVaC>FIDELt zwiYe4Jsq}K08s*;cavN@V)*=`us5*FI-^`%Xbrj^jB=?(8@9+oExGPV3k}U?*@GCa zvP3PJ^_QQ@Uw-t%Dzwm(GvI}07)~)dJsGyC1Z^0kBOMt0f4SR6Q7Z6S&f#KBIbvkX zV50$!Wd5x@;^4yv;SyOzsl>>1`fw13?7-~7dff&w{L|lcdog+)2r=9QCtR!wYy+^v z#geudA8aLQF%W~5blW~*>5j)w>VuI=RN(JiHNy5f*?ft4sHedZhm*n)IEo=m<#SRn znuwoF9F3o3cLHwo>xb-gyK~B{dAxSt0GL8Lg3@TBpt=~(ra^E zL@@Iy*g?>(g#7~Ig2BwC71_%p8#C_fsP<(Lr#!n=6^xm;l9*br6E@cpkkq~WmPSAp zdXz3Dj+=h>(RqF9K_JC+f1MO{qkCD>~((^=aOLd zgD?PnY!?lGFl7)~M4Xo6!#P*VM_b@uaLUK9Q4cn#>s%ZTb6A<3jNsA?q=`cw1|l`; znRIfxq0-a?vY3k{hm9Ps#Z~?ljP@<1nT%LLMB=C)sDAs^05*h%{MtE4S^VUdi)d?LIOLDwj)L@+{J;U}3op6WGQn+~2z7v~5a{f?Yzl!wb=0P?qccekY)}{gANt zP@KVRCB6#}QOWJLtrX(f`0ia}JF)LBKG>qMlrU^9p)u^vXejWeATLTE{^W{KNC>G` zc~prk-0>c-XcDHcxt;w*y+GP~81YBbFY&s?a9#P*%yyOntGqQZaq;eDmiCbj= zQI;SPBU$r~VxYTE0W$Gp&73!yzvHj`gswuqCG@P{PKdb(Uwcj<3gsuUbHkyhIC>i; z%YX28hK@8`5t-(Q?>n=<_6Mp|rigy56<-`P9|6?P^$S-%6LGx?FCRneHYzsGs<_H| zBNhJW@r=IPdNBFELg-_4okZ@)zme~?i>!BkH+v!>|4f}(w2gpY`h2$m7 zmbl@*15hkWb;t?){(u;?_{b;LulI~`@K7}Z{lz`O(?(VMyPn)qbW3m`a({>B zAI;B$tJCD7z4?p&tH&P(IZZ&UT^Dy72JKUhbe+910!Gr%@e}f>U z__S;)j-jH9XK`WXC}s zyWkEOt9W0yehG4pR@F`Vj0la zg-wgZ2esiYyk-lfdM*sQQ(n2FAl-S+8ZM?@X!N*1q#T4Jcgg1){QXVga$`b0lPy$zqhpzV#Wk+L2(< zZ}3JyU|J8^T{il8wH`F_oOY~9CsOpBQ1GWXYGf&_u!S(`IBEw1#Yf^&gkhUu6HZY) zMZ9?Gn{C_6u47i3Su){5py`x8U!61QjA?r5VG^aatv;%(o5(oBhrXNGmb>@lqRho} zrl}-0GVS<9bbHtEK2oe}C9^lg!A1R^paq*MQL@;y+oQts+>+IIsXs8g2Y%q?>V7Qf zl&7md8dyHUPaOYoBqOAR$0|Qz94V&sQ47@bHMxy6kGVVe@WHwM?NI=<=I!Aj^WycK zk=q(1vbKY5NZ1z>_Jadm-8N9hR~%H9<0!}9pBBqolG|~HM(+W z>$!eUrPZ|;r$fpN_TaAjUza#me(t~Ddc*f-)Sq@AoHDt4pSBnti;Qxf+_xE6f4%7M z%S|V%^+DX?-<^yI%?OuChYw6fcU2Tz)Y&`kuC*~a>TBKcf_PT%B1o1hZN1LQoow#k z-q9`wj9P-5UsG*YgS57_gX;WVlm=?0d53$`_EvX$#&}coZ~9kG_8v0Wx8`) zN=h94cFwCJw^#+GECFQ>#|2BTgner}@bQ9^osIjMfDO{YAweT9FHvnXr|E-ZEm zEJ#j6&+b!!@PR5$h33>9x~GDfoQ>NvYcKgg;L$8A-iJ0%S4Rh9%0|MuEXq2Toc%sU zGV^thOaTa;J~_rQMEqYMj!z10C|;W~0Y4vZi5PMAOOK$>0G{%)h>#GEMIiGS7ixsh zMD1P3>A%1VqU!yuYNilaY^wQFi$$hU z&=E}7UULr=VL4p8vXoHew4&*nJ0(zNi1gz5fGPAP;?oPA_3+W#wTEz*(b%RrEtzO> zC|GGB`7>~j8tq9yQ$IbTPMA~ach+IbY7Bo_v|H}NQ5Txn?f)V2a=5?2DMSJ9&4Il2 z2$^`nEk;GJY=y>m*ZKn^aE82kd9r=vYdpOsN2FynhT|l^o~1$*b5Xb>2~kvqyxZ`; z^WBVF&FCn%YDXJ%YBt{Cw0CwEBvMc9m05e6z1;A)L+Rze^Wdrq{Kph1e_i0nxuS}3XQVll=C!{HV!}{=xb32bIjaa!4iGLd^QFd8O#H^a@ zTKjqsz!H)5BD?>rq0IWQXRoucI;ekI_8Xc*FwzK$l7(o;HsmFWChIgeN;4Z8T%^Im z9ARotNr(!W^Zd@vS#HD(Fyy!n6gnA$^(_<>8XXGy4OMk-@>+ENVLLW>Eg7`QQLS_x zVwd|}^YS`3%988)C~~=h_%_dMUy}9rW^9VmRd(d6;dpCHQT?7j5 znGR4}gYegJGLKuN=7gLem4LMRX_9{8of>aTF8Yu`%m|0}LzeGJu8BGz24N)`rK%et z^zeJ?TGcmH{=U5imL{U4`8wI52GNzQ_Hj3KQm0Qc+%Dc-b09$vn(i6DENYY7#!E`Y zut5hz#jx+aGKC`59MpncYN@B=2A@UlAZS!tvyc}?IHPf~Xme!(DyqV)slgzTg<#dqJsC;Ksnu{~G?JlJy0Dz|!!z|v`Tzv4KC`w?i zp@M`AWAw$S-99b3h#hqUK;-J_&gil zB2es7qub&Ty)K@+n09Jjc0=gupf!ebGv?OC!sY$?&+_6vN_4_>)Dpt4T_{zp{GO1+ zf)b3UsbAaFN3g<16d|V`df+8;7NR(VzX!_~u2w^REMOPwCxSM1y7_cjSwZUO75FA( zj(wvkc11_^c!G*-{5kly9cY4X_yGM11y0B6U?i$IzA^F>@qQ^8siM19KdxRI!nS!E z_d+Y)ylbDdusw7k@m+SgupeH_m({juUB5XoCF~i50JSLb1A8}e(rLae6!l76TQjt! z3mwJOCJ^%&_iY$?4Cn1A7s2*VtNQ)xe$-F{JoZW@@^KRO${D-G@*ugeR*8mH)UJ1f z$ig-rb01dud!UANuOMHaZ&e__<4k3wGP0H5;v*3cEMTaTJF8xK#H8JHObvEN4vqi_ z`->Y4-dta5s~vI}sZnsk1Gal8qgnNc5B6wmkRh)ruNYBkt5DmL_=R(gkUk}FN08+( z3L7HiAk(vWoH?rX(O?g#TBmrx>pra3g}9*n25%X%hFDU0R3MNIHE9Cxd6cG(AiQWPN3E= z?ynbXe>oWb0q?e8Lz$KlVHU1YOq&4j_TvD~txK4Y%FKBAi6$YY8I^iaW__Q}MjxO0 z6K$}d#w9TIW7~5(+Hy_4?_#OxY+P?bjhA1=8Q)dL+2&%srXN_Twh;K!5^Qc6& zAt!y89Nigg7e?%83ZYJ06>5UlZ)y0vbm4llykavM$+3bFb0e~h4Pi!1@ZCWaPIcZ? z^Y15$?V*G7_d|yv*82BJh(>Du`{0neamB`?zv}U3A3@kjIxwi}NYWhhZJMv5=nh2u_EA-{P_)4yUdJmsS#q(nMSgG zCcy4hEAdv*bRZjv39?Jj)ALNMdpOE+$15a2Kh_JB@++BG)ohHI;7Ba^)MzPilFnWC zryxuLRqgI#NURw%nf5f`e2#pM=^CB7*rGt6NrZWdLk>@(-=+&rUUFRn&#{JO!yHrf z%kw7(`Z#XQ2x_yk&@?=_cv`+ZwgxrF30m(*Nz=sO3k*q)7DBm?H9xMZ)4dGW4&7>@ z=B)NCM=c>YdD|`4IZFu3bV%3@6f+DL=-%PTPMAA<5}4cR6j2+50I5^H9xjg%9xi+d zsHoj`P|hZBk#iSilq|e#3LlB{UMs>QMA1+a4uu3z^sISO_gvv~-(A*%??w#aI)&hCDg?s%L3}vKn#b?INTlTc%6S%!4JSA>AD+(Dt~6IcTkypNTYtH`*Jc zs(pV5$!^v($mq*psQrDDqkb0cuW3D>dcT^9`Ol^tOjSn}=C;KZPJ=mQqIhZ{O(Pci zefElhnu^-TAH)$`=I5%=vkt>3`2v0jf6%AsANy^Hi8$DL8pNUK{Ul--ah9Rtk;iZo z+)aQ&SUE*tXbk}8c*+`OA=%Sc-&lYRPyCVvqcg)J!H1Yz{77Wz%Shy+2sS9uO)@Bm z7}xJyX~FjjVlq1fF{ttlRw98|%~eu6ol{>s@*w=J$a+aQRAM_V2M^hx<^_^_Wz1o( zvcu7P@d#C1VMlo|0Dm_T+%+4uYE}z}t(j_#20lj7=VmFUDfFRn8&GpndV5e-l6*)_|5*{1T5I>_$OX8-MEF_v;G1-dV9;=>n zwLj+d$)q;X`$g2KvrWwGlZ@KyZqQSozc0BVWZ1LAm!OkA880xw#M^^(rul&C?v>+Z)k zg{ZYRS}@|9mF8{jnW5Xqm0$i}Jt#!xiN5d*)b>;<7-^`1jJ3T7+?P9-{f+w@FZ7oi zY^EB~w2Wod35T$oaP2RDW^Z6;`%nyT8jT5K*5WlJ8P?HpKkv&u7@P*fFZM_=-@ZUL z+-X(_MsH*0%vISSbs z0c!dcraty*X?creq9K;WjUp_JMYEa3k&i-8n#WRkLQ}Wnxzb}ndf&0_rBjUhF(m^9 zhhT!k91xWFc=Z~EktQ%B{G+=U!<+eKpdq#Vl%R7MYfYIUHvkt&Vp(WzlAahPh|WH-XM7j9vMdf zvSXDM5}-jGti(m(f?_EB{hmikjWQlo7cRxL<+g^dt!E}>;F=vas31TAN|hpZI5mZ4 z#-#y^#D6YRI%_ov<$dNgN>!|S%w)U#M9Fy;LKe^885oJN-n5vE7bZ2mTc(;BauA#g zA&}BHZ*v-hm8flGvurO(a0ikl$(JqN;Vo80>lx%XtDmpxh~_-YPZwlPk?P|SE8US^ ztU{BrS&kGTxKl-n{{mmRi;*>ILg~9$71@UqH`o^uW>LIQw5|z972r9az)8@0yE@d= zgG!AM4{I+gFeDd5oJST9OY`P=bV(U_)Drqtzkn+W8~IkrKD40U`3?VD%JMWcKv17{9cxU}*C<_d9w z8M){4x^?5VF$XEmmve`*fm!M#DM0!=zyAH&23_&Og`h2`-)SSjI~wD((cL5{UmTZU zW+6q&J?)*J=6-Dq*@Bb_Ffhx9+Q(@r!J{afXebqN(Sn3wpN>@*DT)dFW0xLSnRz#{Y=Np?gHO?v;iT z&3I#koODC-JhL8un{h+(S~RzJAxR>Z=8LxAvV+8VK(>;~o)0g+1HkpA^%OU0)}b?1 zg~^VDf2;U2Q13pOL9JQrG9cv|iQaFD$CbqK#|eSnFZKLBxpHcLd zoY$gvnO{z+s9zu;8N!2lu&;+4vDynS${^~fNYl85&87wnzf3r1HoOvAc&sZ&TsddT z3U?ZYT++Otajwe=(|Xakv&u_H*_Q7*X-|fnDkX%T@;r6?lB5p|)nld9LJI8p=@65B z352l^4eIf_7H!jr&)(}eml5t9fes8E&lS_ge)aleE(*MUH(6YC{&+1al=&HMDSX!{ zi2YI8!562b+@{1*sYDCIOwXDMG?jUxG!k|1ObwEz;P1~lIhoSXF7aBRt+ISm(Eby} zoGkIM7g;4!5Z}l6sU{^*wHa_3l%$mtul9|nqgAe?ZQda*XUp9h7#^q^?Jla_PLFV+ zbd0$@iL>yg&ARZkz(NnOuaE<%YRwINYruqy=W(4AIC-#)%WrO@;H|xH88*KIXhTMy zeqivr#|5(Io3t@mdFs>Y000Iij>$%iso94DLl=?;X6A_N?}R|0TY<^TFLVGGZWfi$ zs6|pi6*~Y(lSL(LGBZ0MxXO4(X0@T*L@qmbU1*Z=jt)Sk)zKGRn{g{L*+KdMY$-Cy zfW`m_(yq_qXX{d912M_0V)*PAeH(Hu#fKR2$txiHoKDeoI^t-vs3b-iX%MaGFq*qr zt+!Li%^b}dddek7895NSg$vGwVUOxIp`?KYysU?O=e6du-R07wjN*vY!|tnXrnB8J zbWJ}Rd5qczsOL7Wmi7`atqXOTvH+&hn9W+OYa_$_&F`kOQp(LH$T2V@`g!Q3Ixe$6 zLKS0R%*%CHamPZ)=x}vL$XFGdP5vMZ8T`6PKXwSjMzWG^Ho=X7ahGPbN;eyFpu+`n zBQ|3r-50U|@9xnG09`cL4rMy5G-DyQaQRV8F))6fv+msCWDkukxN9I1)3r`PC)EwI`axPr9)h3*`K={wBkd7u@D zf8FQ>v(|Vd>*U#W)D71`TSw5U9>;vOdoioheG*HH!2ORW1mJVQsFbaVc?FwwG25{` zM?$Akj%#@Gcv|9kD-JA2xZ?vNMSOJ(o3{hO=*0(mol`+8h7h&~#L%~L&0t4;ds`qi z=h6H0R2|EDdwk9~QS5kL`dj%7%w{|7l7Z`DmTE=UUYKKU2Io-#&Sv;KPW$D%KJ4am zKT0z@t5qZEX8Rh%=KXy++e0Evg~O)Pc3!BbqIrUnxs+YNXs({I=wepwLYDk`yPvA4 zxn6p5)>|KPMXY1bM;ttN|JVtl@R8#wlHuHlp5QLHt% zwf=>+K*G6(ro}9tg8wB9&mQmneSyeQK>T|gz!3L8lov6Go8$$Cs%+HYvT)iZ1$#@i-r^F@(Q_u4aF+QU8IV%>M!g z|6*VK#s2@qHQnq7i!S?5^nbs@)Bi~m>-YjL7dP<<98z!Ij{z8f{{)i(S7|_>0pdn) z(%gu_v;qofkdyTb@v~JMrkNH4!v7cb^SoxQ$VKVaQ~r&f-mlEH7|5*JQcU_qk*$=4 zv*axXXR^>I=4fzw2HH~%`7_`Hy;Dh3TMMrAWLbBWP>xIXn^>m@qh|7(Sczv;h~`s!Ox zsUzDw2ri>eORP?f@k$Q?T&=I=V9XSg|F{tTMgG@DVBG*_MvaXGE?VI)6dEjCqHlee zPVqm^>1M%ea#^Z>nKVoNWjfkzG7H9aQ28Ie(E9)JVp5Jm_$whg;9oC+J4?0+tP9rU z2LDPR%la7)c9jppjjW^IkCr^Z3i}F-6uNNdHOutEg+BPOl z?&U(&H#^ZNhtC_-7M^`eou9R>RCtS&SF|0Ql5+b@*{7PagIC7$`Tx=N)&Ws{QQIhz z5-K4f9RkuIB_N?99nvY?-8D3#AOg}z3`!#{CEXx7MmH+sm*$^+u(6RGtGcJf zm>E8dQ%IHd(@9dcaQxY(e}rGTnj8;Zj+1|kUqP>Ytg3q5kC>xs`Cear38i^58l-JJ z;O)Dazwt^{<1o@mnY;bs3(1dK8PjGXmW|035)i4P9~Vm6d4;4oNWMHl_4t6fc~su{ zdDgy@ZoAcCWb>!bs>ex>C%hT5);EH64m6olS+XenyX^h@SY;TpC{Phog)1aXbO)4x ztXyrH6&vUR!UZOy{}HY*8HL6AL{G-U^>bPKSWhX#j|EU&9}Xi?q|kIaR2OIXiPz~{ zKS5NNQOI=P`3f1juBB1{lkOC#Gf6Ma> zmt+azU3SIG0~2h6AyIy%>_}P1P&vsWN=TbWHtgz_$poP zRAnpr7=-rJ=*YD*jzyNT`SSAlEXPvy$5Kz@JIw97A&S3->hP^y zkj2(JJRo$C#2K{fPAx7Iu;LJ~O1B*}vKf>ZPt6%gWhxE7HUaS(C=nabMc2zv9-YQC zb;y~29ZQAMe@bQVNi07~J!I=i9P?FT3+2lbqSbJEboQ_`kB>@Rc5K}Jc_x_Y*@j5` z8%W&XF?C-qQtl9}8JI5%!vH~ch?eS`8FxY!|L=CGE7ixTTnicPGLsqDbwr55 ztjm!*b=RTSRh3u-D49QRegkwKm}$rZ5BS_qlj4=Xm&4-0cV=jVK+qDvS!t}e4?rO- z`Ol~rmvC!^1i%&&-H5*HJQPZ}LrtB;jKD>G0+P377FWJQ>b(p7{XX=aD_Z4g9B{_n zg%-cF3ylUJW8XU{Gl&DI22sb)@8!0KxaGL7*90H%0y9#@{G{@wT=`u_QWeQ}37VuG zi{86M%lI+fI}F{^sMQ`Lx$`6(e+!&sfMKjJkTk=6WQDs#trYGi4w`uEcV~u4b)VH> zGNg;;9^z-21yETliUI_eof84w|7pn5{;A5T4QG6>d5d>d$_ z{hE%o1$ohb2|h^6#$N>?+$HJH!7ZiUx6LsMw`F^vGAQ3|@x~>1;PGfztHH|OTPJbu zB}8d=_x0Hf@9kD~$8l`bl||`(g5?9jn~xo;$?;j7nR}q!j0XsfmVJ^+3A%$l<|}D- zROG}#OM$>4iR~im;l(#vhAU}NROGjtmI8u9k{^q#FT-1qc#?7N0~wKBBPh8*M#@0O zhJEo9e96(+D+`>cv&P!q1<}7d z@n2b#ldglx_DPat5E>n-ntiI8ovPbfZ~WCjY86<%TvO#wTg=KIax)4xbsIf#kk&ts zYNjld_VfAHOg0_)ZU4uivKu9cfe_)x9<()iP)aTm)BNzo8|iZc`_4LTH?SE`ujG>6ba@h#$+C zRdcbatAXv?Nor=vmsocr@el2sXG~VHn!KRwRJIL0doHunWJlhC>xdb#+IG%C!YV0} z!MBh2@P%TvKzz>zK@M0|{6D(-yEH-RTxMjRVR{qHR=u5JdMnIpnWJHBkRRT&cvd^L z5ksFvjy@Z7ZO4A#1r21Tp3LD{IoFd^)y;+J&2sVXHJ<2RvOqjJu-w;5>mnwfxX+i6 zqVa9Dkd}BVEAdUigQHSC7x1iTNFsdAk9$kZ(fPJg2_3Y+{Cl0GO6(BNsw9104sVjG z9^zO}MZ2~pDji;DktbHR%Dndf-VcsZ@~+nJMx(!}%l(|1C)n=y6$_rik;*LCRTARM zt7sQ7!!D6px)g~Eygk!jtB136819jhLT1h-)}x&#x?Yfdi_czu@wJ{7c>ksreyqP- z52p>Sr)_3#ZsDCW*9326u9ysarFFWCuXP#50{3opTu)f&ASYg`gC`?A8yhdW5|Mtl zN#XDt62L~W*AT)eUoJFwQqtkxtPwak;}C`PJN;S@AD{;FHxlAHD1o;`@Yno+67A40 z^pjKy zTI+V_VobFkeTrY3{szMH4x5Q@x*_tI6ykPmp zJ#|TVTABZfskS6+z5W|%wGERWd<0vZ$5s+{kz$kZenJORIzWx^xM}#YAKW^~qc(os zP+_86pS1z{{9?R*b=#|7?2);FKe6!1xf9aTx{hSfTa4~#UWFI2;}3L!cP>YKh#kzM z`Qcvw{~zV^{9ION#>WZ5q?NO{`OfTSb^OyaJN_k2k*`WP$BLa9oy^Yi8NI~XVd-C| zcQCgSjsYYGg0XbK3BWZ04hAbEKxn0Ztiw*MsX}Apcf+GURkOIjE(?fsnX_IsW}1}V z-B!AKiP3HK0aB#-{Wc4X+wx!ybRO+5rXp;QhZRs7Sd!Sep z0Lgj}nUesQyY~ccOYb0CW^q~mHTcn&1FA*bK1QMdWST8zuN+=FsY)CW$t33rj_ow z7;tRh-qFRp-);dcBQGFHyn7LFUu<2MkQ#p%N|3o3e2*t|k9W5~4*zi!lvn*v1l*y| z>@+F)|Gy*@SeyUjr=4&|qBpGq4x#K0x8dB#hLZ)#$`!bsHuwBMii*ue)@5Icd|ThM#aIY<(TfrW=NsKK^sBonp(iPLLkF zk&vuSY2J8Iva|DWRNXpTNb6?}RC-G@n~R3FE`S!g!@PCc-mpB-5T+728>6b|0Z-1; z`3laHHOll%v6`=Y-4bu{(XoVTMJNj>M9#Q)MIp!GM$(B z!+n{yLl7-JGwU#PW%;`#isieGHgu>6llakOB6ZUE*#4NCA7v;w|8p!^UqeCZVveWf zM@2R%RqJ;nMtW0!@bU}l7js1T#UruSsr9@AN*dLZedF;z^trEYU=^O06u)KrZA~F9 z-i^k^mG=W|5e!Wu)>Y+~G8k%bRR5|UH^MZDM#H=n)825Th+9%XB`ug&2zCj+xS>=t zg&bsr6$wEnw?)8Sm?uqPwx$r<`p0hSPew$moH$Bm{~&!X9>A)QKIrJ8GEf@8EQ~j^ zzkvf3Q^4>uUc8rt=);gDrt169Q$uCZzK4aDOiBY5^J##BcqCc8SA%$DT!Of|3VA#( zMeN}LrI~TR*kDAh4}zDAaM$BYH~_#*-pT%kJCDSl%L8D3JWvesg%S|JnoVi8w}A^3 z!^-|s9EivMGsk+q9lSh)H{Q3(2GL37=9Y@iB2Fma{0Vp`B>x205S~n7)U&osM4)+uU@LvL-5u54* zl5|u38TZ#&@`+K|;89*j!&5`aaAj3HDcMtMReLGxp@szUUVf^4`#)tCkb@O$O<;EX zNG6V`vcU_%$vhkI{LD91$cJA$cm_;i031XQwEnGMw0!*zGjS#pncZpu zN-HmA-H@TC)<1HXRK2kU7?`p&0|om!ie?!wRGe#@EeV1@3W6q=K&sc)CD9z(iGLR-B-JJ zwByzdMe1n*Z+r9kIUPabOjc&{C~2g8UmxSB@7Q2NX@yg|UL84fhiU6ixmvcn<*AT@ z2e_o9(GU7j{}y8I7dwJ_#+O&td8n_Aa5vdQK+q>|KZf62x-rDFM4np#+jdhcH%I zGP}{zqIY%KdO_EJCB3glz`#RrMQeVFct^9Ws%(Bzsea*2EZ%>eL4KlGM#FVsU(M?M z(qx@-s4r6~wLxWf&@e~1K5LKBUgu5JDZ9hY?+P!iT?kx4w=rNYvzb)D+Bv**o?XAH zt{>|32Qr1g99omE35~;|v9uS?{539F z>ve0gV>AtGZi9(kTW5;?90&TpNWGmMcHpKv@EKS@8!X`AmXdCxYOR;CO)rAnpb@`h z9tcPZ-R;jj@5Ql?jV%?&gRRAMKxs*#v`MAn>?Pv*)|uG$vBOZ>k3adRVdiZx^FKAc zpK5x4msFYTFgWZmkcjp}Y4PkKfUl%3D1Ue>fwCOZ0R>NZ1>~1)Rkg#aDr>C2)L0{D z$=8BwkS6w!$YSy}3wsEbJ)|27Mz>deR`O0c-nt>kGQfDf!~-Z=GoYhwYG00SUk=kP z=ztYh*65I|d(@uZfSx5Agq1d9mo&3@&l;0JjiO4M$@F)4Ozn9>YEu5xoMqWQSmeGu zY=<3I*5v){Zh2Z;tEp?iZUFjnUU7PZ@lTWnnmi0mR=Z2(rK#f&2S>e%+LCrrbo)KY zh7RdpIS!6$x*%4f+#I@+(!97BGGIVxQJ?uns-Uu_rX2>Gfx%37K$`1u5A654LO2UZ zrr6ib?6*Q|JS%IoOdLsDKE5Y~YFpYH^aO(_T6pG54@nygELrj8%g5%~jSXKOX$R&` z-FNxTORDC%RNFfCshBo~Vv`eG`vxr){Gv*Oj6!i)9D)X(R7hP_GmD4gPruhKK?<8< zacpBHKl^T^?Cp?*sm0I4VS&ts9vSAg#qNdqd^FPS)!Fnp+pyOzUZH5`FxoVZH06G!$dK zIcxCu+G$g2;E|2&rsIX0;sjVUn?22=Yy#w^wxuVZX&p`pvD*|Ywt2JjOo|YKM$4Au z@fySDx&EFE_P(3|Jepu3&Zd#-SsT-+hw#f_`hHQ8{8Iw7=c2oC0yOCnpJ{$H!tfe# zjE76l+L*x)f}d7X1M1xD#R_XQ`bW^aekTn4fbdPRDFjXG^IPjbfU%E-AQV_Cz~awO zV38nb+y?~o5!Pt2zzPGc=5FgQ5HPy*j?%rvFl&?xX$}TkC&fzr1^a{J*ht13MC6xPa5! zp-bMR_$c^+;S#|74e+2XG%5Cy9iSfu zP)6Ih&oSr!PT&!g=q?5$9&oV$VY@_HqrCx^tm`G(_xq&PM+N2p2H5uu?&k~p4)C9J zmCN1S-Ss2dfVjcH{l_z@?+FhKJzk=jg*y@K69nt#QDLtKFc+~K|gCET-;a=vTb|*{iyXt%F!ZAs-SE|Xqp#7T(Zct>{R;npW zEx_WGC%V*}wE57LBPnVRP}xu(%`13*`kU1M-u6!GcJM#LuD^g)hj|a+27F632iPR_ z_}8h^nC9^z09gb8c|XkmzlXX1JB%r;-~yneyHh;?CZx4_21PM1C=!79*=@CVqVS$B z0LSp&s_VV^5s%K-ghIuI-pOrl`Hlas^Xv3e{M&2!F6eSmJ2yE$e zMbQJ%Z*LB|e=@C8u`WS~j%S$7AVe$CB(BJZhug$_$cLko%u7Q=*#(MSX-p*)$nGCZ zCDtiDG<}q!@q)W@(2+P!vjL(tz`38Or%JIak?EVTN>>8YH|vxLX4!Q#yH!rjBo($oq%P*~tSKy3_N$`cI&4>F(_5W^UySZ|Hl+J3@D%-#I%t zyJ@(Xnp@J}4L`ioaG@9c59zMUBW>wrYi_A7`xY?OaIyYhfvlUU?;Rx1dmj&34G&X~ z|J-FYOzH2^RlnDLF!k`TbaT1`zB82pa=8y8BTRpn{eMQfs%CbU=JyJ~=>Nm=E}uJ= z2J|2Qm-+o9{4aAQODAg&8+tyG|JcgdIsn1wd1M>_GSZgj&K8z;X#cYoJ{jB1ishUl zW!yrDR>oc&7wTrZVAG$C4FkbA*xU^do^ZeB-GoW}edW8jEVhpjW>a7!{rd0QU^BEV zsqzp0M^Zy$_3Rf4j3-x9wRpu#yego(#l3NK_`7ghF6r?Ymb4dCj)3)0hjg^|IbRI5UY{dwRu2(@(g^Kj#Z&X(Jx9RKvXSG-zpFX?V~dRx_Jf~Zl~l7W}TLAe9B z-lHkESU0!EJh!MI9ImUBSoSN9ft%l?XLOQnzXh+9KYB!{@W6sK`^0LVJ0{3n-Z->R za84h=&bK6kuD14wjvcsfuUZxA6&@T&-ZtI5xJB`#+^Vr%pWSX8LT)dZKHZRCrW}&n zqj-w0m`H96EjI&KRI3BVH#e%)axWw!2?Un|_M;9&3_}I|`0$iBOKP%} zM$rZ0%EZPL2d{a0N^Y}Rxn+a;K5KwCZFAQ0Tdxw6jvH23$eKeLx_W&0M(Q~EzSuwv zejEhPs0Ph^sE6B94vV!;Q(Se6t~X>0iDqi2SIOJg30=bcg+${_DoFSaN{c{ghqwY* zztN8rOx4sbk7_?y7nQo|=zn1ty~r@|u4{akCKX#Njun!B)WQLz~5Nc82Bh2-|bb8-gWG$TKsw3bZC=zF*9)2oC+)v1p@efm&oxMO$u8 z#CYg7Y7n{`QPF4%jS!*}2=0A$84q&pd3P#dG6nu+FFbmFr1E33_K@P0Y_EdSq-fDpzi+;6o`Gqa>4s(X;I%;K9PWZZE3oG5cNfYzB*H;y z_&T5$y~$Nk;ISs9c`)r@*rmTd{`n7Df{uqev;77db(a^pb4#I~r}0vlE>GP>53YJu zZP>#J$yQ0bWSo`fy>c}OY}JG~&Oc>w>E-zwY09m|Wx|3o-)7DPBe7O7n$z62TK`r*u3igtVmeM+sccMmFZwno zvR~?i(ooW+J+Qdl>Ngw`Q(QgF$IbAYfbxl#+NpR`P~KwZRv#Na7gN(&FyhB(hy>>L zE6lySGc9pnyX~W4d>ty?tIoL7ayyCeXK+-^0zbHpm_=)d-P>-{S+da^tLrVz^OIfv z-QzL^j@I0j&Tg!NH^fQ9RF*e`MefKj14HeZcN6GbbACrgVKcRCEgr1w6>NlWGrc2y z%q!2@e0xyBToup~1dr=ROx1^QA?tlMVy`@v@FVRt8E@W9Ysse`ueChg`*+LFidU%& zg-<7o^UnN7UR^DfobGvEfGWQ#vvYIX1jv(VCS{zhRsZ%|jKqsd*-5mIgtG+n=K9ti zH48dHa&Nzty2@WNKX;i!7%b;vA?7H(3$p`fWL~-AIGbr5EkQ^fzPC(YG#XDw`ziQr4{Pg*r#ZhWBE)uzZnAZ(Xr# zM(Vb^y(6@njOX(@0vc2#k$q$z9hJBxk;toD5#e!MJ;9IE`r;?)8~t*Xji;{4_{DP@ zjvm>OMChBMZt1fI9CgG=KzU1^WT9*0?|{|3Pu>BNV=ahl6zi1th3Cmf4Y)4*w_%>1 z{BKj8ZvzZ&J7y>0CjoUW1A;3?dI1Ntp;}w&KEOkOr=~Kmr)_&2mU+e{=9%^ywjB-7 zSo@@k@nD93@E<$B(qVl()RNpINM_-BZZm1HoK@gjN^Hbf;O{qk&NKG6*BwgMu~*j< z6xV|Rjz5KMD4vcKVI~|!vU=Z2M;~<=dYIzEx_$bd`D;8>TmqTxE|gexD0XN;pCzWy zyPWA|p~RD(Xw$CSh0qGZ_?19co0hy`iXsviXS0X2+D2V84(#1^hmSd8!wj03M(cBV za=U%j#D5rfupOS;q-gQJwa?7Z|0c-l^)6^LLl#@PJ8=lOC<a*md#jZaQHRrn>axUu-BXZ!=2&*FN}iGW zdCH3-{`!;&5e|jTrcLJX$}EMiysfZI_6g{d;d1|MZ_;fJ$zoT7!ibqN9Xyxa!i4gN&OWuFOY+49S zmnqkLeP*eW&ts|&v7)szr#4 z4v0PSY_}+!FV~&{2_XH#FWAno4pdFWEx~&M69V?&UdPbxf%^GK;Tk8-0BYCTQ*7Pp zUs$09&aOKL2{D^j>CO0WJ^M}7*0(O#mqUrJeW_N;w%Dt`n;EucPxyW*yk?cs#TN-9 z3msb1(FLh@PjId}qJO07Of&w=vD#j2g@x5=fpfUF8?as-pnid280n1?T zj!Wk7Q1r!h!Cc1*0(r^{J2Rhze`o1>e<4%cHNv0su-^Y5_f4c5-_C`Puj{Di=TUKnq+opB!;dL{ z^cLYCEK@LvrXn+cGbPZ03|55vUT0zWE%Tll6#ifip*0pZy3PHOlleljK6P{-{XC0s zfrmQ>&3ba)T^tU#Vem{5U+4Z!vZwFoR(&2&FiPnGH9P&;WD_lhx-^Ff!se;Ym4pAX ziej|}aO|lKDEeR$Y9fa~CG#5KS$EApimoBrTUQ3YvUMbne*G~1$%^Hy7nb9;TlWP_ z?cm)BN~-#3_UAyXiSXFMuyGmqP4dZ7P2b{Dc2$&Off1em@H==qN!ui9p(0%o`h&Ut zDO?=xIDg<`N=-mc_`UngrLwrG`NwOU+=W7mky!)ZMk6@fE1qEc)kFj4kWg#V6c>b! z!oGAeQ2s$mwpmY3iD>Koqg%SawpS5{UG_T?3s_CsSw3w(V`?+ranb!gY{p$DBcD`p zTK4gcy~$mV9|%%BdBnTC#a^J*IV{5&`$Se`|EROOaD`!af)%_raunB^<$}r?@Qoa{ z_QaLwegEaSBi3tf-oW6AtPB+2mLEnHH0rwqOJ~uM;Do=(dXqlPCFB#dl!rvy~-LsN0Uw%)o^vN29Fcqd!bvr8s;h6c(m6ZfvFeY?aLN)V;h~ShbDJVn0|zT|3iz>NtU{+PhM~;Cp-3wg{3Oydmzxx%saoxPtAq zXzJjPCm$qiHN<3ha+R5v$t@@Fc_t;DG(Zv!)oia5(=#Lw^s-nT?VNLdR}>YtRkKfd?wl{W_J(qJT4S#N*T-S=Xz#Lss)|MUvmRs-tmUvbnW%;h*e5tGH{ z*dH7VX1EY@zP+}PtU0?$s$j#AXb@T)OxLtZhedwrel6M^pnrMP!%Zb5Se{M?hCFp& zK``v53wj25#$FYztN1^FBnZ`v_bR4eVBbvS7JY1fnEp11{Y@G21Q%RgbZPI4XwOP> z+-#fHxniR+K96gMR2DU->cJ+2_X~g+dg(+$t4YyORpm{$Ckw-52McQRv|MM@N|(f& z3FJ${+K8H$DG3Il7)#Z#j3=Di@A=32t8q9qtYa`^b@c)Y<#xZgiZvcP={?)kHVz$L zYl3BzI(T3AEN*;+A@#gAus~+U#|5Xp{jGC|#(f&E!y&QXk2CyS7Q#15RGQKkJ5|Kz z5C}qgH$w+Jgk4bQgVt}SCF%Z4<9bzJw7AySC>q2h*vnzGE6x?x*XEwAr)*ib=u3Vl zWv{lhy{SRo@4VOcbs4;wmmjNJt4mZ0A?NpTvWJ~rR#CEgGw`PG5jZXFAmJ*bQ>fUd zq(wNDztCRSW&LJTxRJq+SK^h6*NyV&be5&={f*5QHp?|H`9Z#CYNQl4w4RT5Ulp%t~QnyJz~NQr;gjnlGz zdgg&B%ppyAQMBm<)m678COMQgePRdwoTPj`F({Z-Gq*m!o8^1-*vxwG`iHZ@-yq_) zB8r3SHj=%>ndY1oYgJ`YOX>!J-LB@@*Ew}ljgjt&Ghxblpd}Jw;8hmlo>*_#T5fdy zrm&Z3?jw)Vv?e+aXWL&?sY*LdWzi+a6SC*}#DA%gnap5d;rkS#&bZ!C_$|%kvN~?w z+z<0?S|-yr9t8C-?XWWRlI*R6#`1TwN~(RTDWROco2Y+Y$2Ha(VT0w6OJ zAqh!jI`dVh7fk_IpOtrZh)Km925?>MJL(QcW4B=~txyz=N-!i%)I?(y^KTtu3p<}l z$TP_DNGt;_%Nuyk)OW&00p8uPT-75<9@zQyk-SH7 znfS?Idq~ZD?;zD%;lJ;^J3~)_&%Z0np^4(xYe{srw-0YY%h<8jRzt0;;G6jus=9h2 zSu5L-)*BLo{kss=0LYPiqwpth4)aJ4RQw(;qKxlHF$8yN zQhnVYID3e6i{aVcpu{Aazi$S8_iu7sStaN`dLnlrY>FHhy+H@Ng9Qr`B|MEm1*ugF z*Rtd)P1fG#LY~gn$rUeO+i&EE9&qi@K~v@t#jE?rmR+dsaXa^Auh4n-c)xvrpT9%n235dC58y3NT}1AW$no%dUh5$bd29;6Fyd)TgFMEUFi z!m;M*^Q)DFt&+y?>_9+fJm9xDz5dQHM&5VJGoQhzLoncsJe)e>yxP6d)%ebWj)iq5YD%7DN`a#aGoQ1FpdD>Z-imJ!HyEJ4VMDnD^bxXNMiw*OfdVDa zAiC@<8@O~I)&AVs8n%N^b~Mq88l!o387ZNGLT)p(H9%CdII6kRQR=L;0f9@uBHIl_ znwz)Z$1`B+PY>nq8M&1WUGjeVf^cV zRRmW?tMJV1fm8L^5E(lAfq!v`E+H~vi#ux8^{MEi9G}96#x4nHMn4~ z?Uc!bY7yDpxB?_ydr~{NdH46Q^TSuQdv7AE_ngYqFs>{Dw z$I2=}Y4)AMGesm z^BzzmO;|%vcVt6{G6tgg2{aNV{UUU+G)0mKlkeQ)~Hjnqewc` zO;G^RSkT?8b$2Q8^zftCF>PuTMalAU-HYirI=WW?~B(m$fE(v{>o@>~=c`VUcE5QQCMtS3g%`k`Dg zf0W5^z-Lm;7XwB%yB>!N>b)L(?CZ>++m6`axk;Kw6JGjqKF5AX*S*sIV+;J0-h88W z8SAeOz!^AJJuAjeFCe+yIRa$AO-FfKGIe|}_wfG~wtaTNZ=d~q>R@B+>*JpIggX$Q z3br$;{6pa2!ptE?G4%DYm}hmR|MKZE`ZKP6_H}USQIz&gmu$ZmE7`BGkneL1b~Ji< z{H?xQ1&^(a(B?9KPWi~lY3O#^*VkKO!1>O)q|SK31me z>FDPuuzT#c_^7Z|DIG-h%HgxuMn>KFp)+yL;MgKs!VyOJ*feFDm zKQ6)SY9hnG!J963t0T9;D~TiH{Q6&=TP5o0M1BM*96w(yi$2dd%fQEK z%>0eA>0r49_Z&=RSWt)4kJS%zq_HY=GnMtWZ>fF4wQqQt{ot?&W@KDDU;lY zjMc))aO3{^&euo8jw^nSv2DjU?C56OrwLP7YyuCuHs^jSH)GA5?Eb0x$QadhdN{W( zd~3B^e<~vvQP7Umh!GM@$6OqU+}WMl60WyMzczbH>#o2`i}Se4jmq7YWNMpj*fr-M zp-y5|aG**@Rc{OU3((>aeoxb`UB|o^FG$F@Ac&Xky!%T@>-$?5U7lxq3#F&Tq|;I3 z7fr>uR8{k0e)90}_gJ#A^~*93Z#&XoOMc)P?Xu$G4sL$FH9Q+*bz4?u+)o?uHE#{> z2jB2`efq@}su?{?z$K7M4G}wZ^5JrqYFzYE4O`!J2!1%n=~St)7G9TowXsRPh9lr~ zTDjT8uaQ-z@{lC`(n|dA41>Y-{G_kRj^(cL*(voKYrJJYC7ITp6ZfaoX6`Ra`3YYv z?bg+W?y>tEa;(|7IRlk*Y#rNluu`_0wrY&utum~wVN+EcI{3eG_2K1l9vZM1rx3oi zG(TK!d!95i`;fKZiqT_r_%DfSQQ(m1_i=V)d04Y8sfd>FhPOG)(|LQ4F#ScCY7G@W z+*o_Ji^^HzW4fDewMn{m>pqu3tAp81G}# zWgV#FE>D=LT{se^+Ol~Rv<(3{`m{Ely zetNvxv&x_K?VOlhnAhLRa-cC_udfJ)Rl~U!Gq10smC-ieg5#r zn_0h;FfQ9a3whsUmhc#;&akvvGznf9OpI^K4tm!QDelWA2TKG93BTEwJHuaiY*Rc` zr{5oxXDQ7 zT!c0Y#CEwh3>BC-(^1em-CByYSOet=Ipw9Uc|o6OIc+|?nJL9Q#~}q{)K|gQY+-Cc znDz6SlhA|gxQM5YPunV;2x#L?x*{g3X9)c?RSKYKEd8WiOEeCvpiI>_4VYJrg6cjc zrn&y!V1}CK8pW_@z7}@JJD>fjx7z%Qw%!Up{}&H?u0Ejd9BxM}@TtggMh?B?Jjv#{ z)B~Bm7q{roe>{czO<}sreBGvw+HQJU|3RxFMv1Z9$0Mc0|D}mK&R|);jHQ)O4PWJ9 zqyAupsqHaMZa-eljN4}+L73zE1szGk+Qg&i=Nfal+DS#aR)W=UXC!))Ibg?MS<{lI z|EW(73O1G@)gL^P;}fMIcbBGLq=>8=<_*<+x35FvD)KV+Wjs#N*F^~O?dzFUpD`Dx?C8m{g5@5xn7=^i^84sMZZ%(NEof`)4bb4q+}1D9x^Z%eX}F!H7&@v zUu#@GZk*@PelqY0;#c1IDyJo1{+;)uTR5|dY(Hf6qK+=;I_2c+Kz!x^!=jOCRiQ)2 zjqfoA2Fev;n>208V=FLM)Ed8{})J zO}~(OYZ#6vAK2FP!TM`5@@IdYYWZA3$Sj?9zWLQvB4N{UwBEx3@4$#DLn-W z*Mhre(?_MfU|+!&5{hO&@f-7-Iw@XfytdLMmezY4+VfmwU$t6;8OEs#1j$un2mi!9oWp%y6 zFjwL8>LBtp9SU#c%~?Ia-xEV^&njkW5!0GW{lU@;pCpQ_f4D&D7{uSL%N&8mx&g_? zisxZp#GV*xT#yPh5}genK&Wvc;?qs6j=R=tH+DRf8E30ueOAQ>BQsIwyT(gBV!vur zcKjsI|7efO7O`ItTOif@No&jb>47Xr}&eP}*+P=6b}W{|Cq+r5ISE-+Imm zvfK6z7B|Dzy!^iZA5zexxw6qIa0&!wetgDsFcqN+=DZF0clO@DwVqA{KJ_mlD*-CO zP6h`-bYL+1<7>z~vZB)caNHvx_hV~>x0i*CwJ4~zvg$m-DmKG(_5hS;W!yC&mOXmjokPN-_=TLc}~71BQC)LMm4 zj%FwT+JsIG<+9Hi8gASxNc3zdzdowt)Pn&HA8oVTyhNSX(Tb0Uzs{oaP|IhU>%PkN zgK-RD&+9+So!jqdVmd9e!s}|WQkKXijeT<=X~@S&cPkCiBc)M)@9v)K7dZL{_BLLD zju-zNU^0rgg+h()c1nH~<-ca;WvyeH{te}MQp#XtHC@B3R|2oM4ztNYTkC;A$Bd#E zcGsiu!EX+~SVFAA_>KMFpSCp{Q-PA##L@~VFOFxk-YW)eUATL4fxb(} z=);t#tpJ=yC8m+1m*vgk_U1p9T;>%DHUt$eHy~EH)<{8tKdwWE4m()^o{j5F*`tbo z^a6Hbj*;M%(UKab-tQ8pOCjl0pN!sJ8gm_2p4AOD-Nn?&px_`cHf;1I=o%L#!W z2p1S#w z9WlePFr2!K zx>GGR)x@=$DpP%>|7P40Zj@bEL*A6MiF)~Q4gdiDNA=q~nYTph4I2l1?I3uM|opL%nn^ z!0JbNUGz6>tUlt7N{n1O1OgDs!s+$(Fqx=7WCd-S4p~anvtFO^~G?Ct+Xp7Liz`Hq5Hc>FS$m*JmVQJ4QPOp;8I#o zZIp|Wgx?55n13gJ7l|ZhUbR&HTSwk!kwZrD>}F!w_`C(a=7aR7?vyF+{u7*jyHZT` zoDt`vxDsefRWKPRpp>SP0TpdLSxt=KHx}nH|I~R}7g;$>V1snJwo{y_|0ZY@pAD^c z+I@Ek^9;&ynM_DhK>S`q>GY1lcuO9cPn*pBUWOj9_V(_1@kSsoB7H9gn7 zt|98#*gW;Ij%*S_50cZp-O#%EV8S&N;;dK}U6&Vv?^ldTL(LrWi4ec@hmq62#q-kX)=e!3rTivYcA*#QKPcm)0+z2U%zhNa&aA2CYM+m&59OKkgtTM@9 zF%wtr@=NRW47J-gRb=G|U{DK`n{E>}d9wME@>jXdXE))J#75IEL-KpYO(tSm@26Er zXP;|1eYUHX*G_u&yPrj`TP9x~wNu#6QiRP^X%kW|ZUYoPkTE-XwxVEhlxiECQV`*& z@a{X7qJmlYllLMT>Ah1E>{H%J4 z%jfUGiA@w66%zf>A!2;w8s)-bz{D=;uiJGxc9wc&O62Imncdxz{@&t`$r>&ZTO|8Z z>eT@epMKfk_Y;z&XYq^u&zBbaKh+MINvCHK=2Ta(U=uxw`X!E8A@M;~JHkX?wdc7h zQAETWY{HRv3{h!m3wk#e#$3e;cA^KR61pFKe@;E5cVY;|ldH}UjTBiW8ohJODF zE%KjAbcU1hvk*4nQ0DEL@b?>$CJdlM-77F3dw$d>_N|WWmmofE5v;+Y7@2Sr>k#>_ z>}MX+eW7^|6jk;a+L;Vdz+(?s7zM`qik~`!IWrA$D?+Z~Sbzs;+r990J;W-;5H}6@ z$;yc@SP}N2Vomq^xA{u?l47BGBHvbd9E0(*K0>wPVT&FGaXik4Err-E>zKxIiYD^= z%>4U#^yh`l1(l|(PEN!Le^zvfi=taRm?nZBNvleIlKv!UkzQPx29(G@)Vc-M$d9cV5Yvr7CI9Ezla+Q=^!6;S?=R9T-)=KYk zBjse$)ef4PJa%>j=PAzQ;ompt{!;+%UHl)kFzWyj{X@YhLp^l3@aX79P#ekYQ5zHM zN`PBy245!*rfwMmC*)3j z3Ty^JR3PdDq{&@W8sXtm6zqpzNI!@!T_L90JGn~U551heYQaMNek4i1Bk|XV&(jIL zeXB$=Ty>J;@!Uyn*v5?9`DRV;V)`$e9+jBcmb9$bz(ENWO{{7)()}jR2Oy(N>J98{ z@aM%34`15R)tJA)axY@hNx134hP-I!s^JHGEhXiorA$daER9nEx^*@ z!5Kd-svO<_LylWag0k=@*0+|N-4ZZF%b1aTj%Xhig?b$cb(_~EerQI)UrD-Je)_7K z(}w@*6`fKy;LzgTp#T$nz8vdTO*y%3QeC!`q+}qSA8A%g8mOAEIPAzeo|9F3p&?#)Qcb`_;5b-vBSoi+5mTD_cR(x1bUW_@--oeZCVyYC3?uGU1{H9 zw^~E*-@YJ!-C&}8`!$Axk8F$Fb--fJYMjx%z@~KDx*HE(chasD+`zuwaXS9JS=6-c7EG8Eul8@hTLhqLrURJ)(*Gb<(3ZK@iw?rj7W zrm)ZqDL>D01Q|a%*xz*n@>tT7uf<5?r!_fKii_19*XGo2&=SV*sn*s0vO@b=a@Z#u zZhMyqGgpCkI7_sdDdlqk?fYQ|x*wmGm-N|ypD<4OGvtS`LTx4e(7VRzzcGGFD#u<) z+%`R1V^m^!b+$@EqB85gmFb8N15lp6R}op&f0Jq5XyCSle>Rt4)+G&K64%zks3Pi}aIV$f2MN7jw?nb7oX z^ekOE7!jJ=^IVQk1?$1GF$vQsrm)=`&{ISfCl&d>M#wM|w7jPiir2c=o;Zk_jXo$8 zQDpJXSemaKPtJHMNnL)=)>TJK6a8?sbTtCBx+!#aslk~ux^$(b`DnFZ4t3U97~0Yr zdf1eExJSCQ2wo&N zw}eZsMD)mzusd**Po;P0gh63A`$#64~s3^fo|RiO(f@Qexu$ZfM=@JS4z-&)MA zJ7o7gEiGzV3uB(x8|9tQmA`JWGZOAs$yQXD19%yq=%4c(QvC1n*X^0X= zj4RWF2kHy3ea)(4jj?od&@ZkJnry+3zdjFk?EZ}4*2Jy|5kt|$-kvh$SWIj)3a*O2 z4~u5dDuQ?#?HZo}T|7decl^3nLO*XS@|82qjSnnno|xu=MqNHrsGlc8{A4ai{bb@G z3lPs`40YR{u{%9%(wd>ni&LjQ*sTkK02{A;jN#|>_PiLR;E}nb(DR>OZ(xtLuQ#ZC z{?F(h5}$Y2Z5Tp;Mz2lbai{@Dx5|$k4*DOt3}{U~>ydE;eO4`nj%(ET9OiQy>OVR$ zSFCpE@vq?FcgjrdHyBc5<#%u~Xn03n66??TPD`P=WM9KW>vSc#p(hBxHrOUewjmH(5A|XRNu~ z8!8G3kf`B-$ld zoE|X`@v6s*8Gus!L{Qd1h&>pC-TjjEyc1d;o#n%vGNpdN)%jTe7Sb5zdnI$qp0>%R zUWZ)l@yoDk`TKtoeoJofPV1eFpgX`DpXR!_7d`*Y58|2AW%+;QJ`2q1;s4xB)gwV! zREu#Dl9CK=2`EnP8fY$1ex7ncl`aC==sFZx$tHf~$PwhXilq2Xqx%R0U;h(<_`CK zm|f{jD>(g=-gv?GdZ&Ym^;mZ6zvpXy@5(^Mu%xh5<94s2N66HT_-hbc3b}XnCA6+ zBX-g50k}>-;V=0*oz+7S-r3RP5Fl^(j4_A%kFD%g5tME9#GZ;SoAhH2{Hn#EfuBWr z$BS*v0flRHEMfdF4pLjrlQUz1^hmOBQ|53}A+!-Kv=P=(N=Uen@ayx1klm}2;dHaS ziostJ%`QibLm^;9oeFC!Ltc0Iy)d@3*G$EG8MYHIU(GL$SshBo^N)4#5A0Yr2CSQe z3$GG%LQ7Ow;)Z%uvF^7_++Ksjr{ID$Y3=?{+E=T2gg-lW&*48hCC;S^0(NAM?XC@5 zW_ly_5NY|}VCL9<$WX}`>D)^VMr`87ef1Mn>W{QPkF+aB*=tk*{T@iE{ z=*dX^aIKZys28FxHVPa5)B~YFsV%E2=s>AUEjI|03B{7v50e?JJ7|xoYjPy97u!0a z*s@l4jaM7|%+H#>Rr~(FEW=gn!8@$_jfOhUCNk-(E%XzVc^E-I^%hmriFtfp=;4jC z%HYS+t?9x^ux|)jfgE@TD8AjLkl0l-EJ}5}lQ^=G)DMiX8{Ny3n+#{!%DVrCt~#|C z9_i(^Z;M>CPPZs=jWLg-+CEtqwiDOz?~|c4%`Nvafu_E#4Qo?L-Ny5Sac-`MmtCk; z))|4PBb0A#L7H8BuChA2wkrmr!$-dbCY6+)Mat{*_I9Qo+HL?7QVtBP;?TYNC|V5s zN@`qVmjsJtlY93pKvaz)sh%d!gbsLIJTZpHfuMYP=*fU z8WKC87le*}2nr5iY0Y<0m@WCSudWqa?nE$FV?rP(OE8oUkl6s4ePWXF1L)nXe&C>y z@(*47P3+N~Gm_N4YF47=DUtbp;mZY`ia7ULtijweWkEzZvH{MG4Bg)PcZ1m-8sh9_ ziHb`SM?l4$R?DrH+aw9ps1o5_oz*12XyuEVY1UClhHM!@TUjLM4Da zFT)sumQa)G7V8V6mml*hXF6md%szou4{ZSyg*-5_w*o&x#ksVQ;71?1Z zxK>l@Q@85pL%Wx~)Hn5pz*islg|9QJ10#8SlarA@jn8>mM}se0X#$-RM1FSpw3niz zGdlp8(J4G>SgcwWlll8%KqgIJAXf`GY_Du|5l{7Htmp)+ZL}xi0}+zmWn%3~Q>YdM zj2&v9^I&PpUTUhsn>gjU1YmOE+&sj6-yVp3&;eviyjS8~5ywGIr@z$MY%dr&!Xj~g zxw?^8(unoP$x#5k{ijHg6BT_}7f$FesIaMr`5&Oc~ImM26je$FRj|MNSx_z~>|$>G2u_xZx*_ z1rz=K9+@fya8~#ebcyYioO=X3$BzMzB|}rD=gTDdkFK{2Bj8jQ*w`VKzkUvDk?1R| z&0ITsiha%{sbp5!dXW*qd)xmIVar{O>D`XIYADdR9?->bXtFaRJDKS?#uRT1?G`LWdGR@90tgB>4rdgFFJpH$V$O~Qdz-}*U*u&~G z0VKa40tyQ3l3R43&NfxD6fOX=BLr;hfIm0?LZnm1Zs za}I-L&6*tt2ZnWHKv8;fc5EQ#=@Lo4hp4`yjfyq2VjRo_H9Dk^y_$Y9iCO^hvFMJp z(WO7u#~MFc#&->a!JiYL^XXTw%ubw7)OnrJsT2$vtMKGQtk&2RvE^T<*=USDnX1W# z^rbg^^8fzDV6$JJ)Bdxe0sr4U$MJT1s0NDNE0WjXcmK9aJ_2=CX8X9WUsuar)cDFF z)ll^cAKtvDmR{L(c^dhT;W^y!DxhI0=cd-nK|4@6!wau&&HWTr=JvVqKJ}+*S%dk7 z%da_l=VpC1i;{b}4$#XjZz|X%@vK+RYN%}5x#oVgea`X++t!n#3^ikGAcEYwbH%+;bvjs`KW-wHDP-?BW=I9)`9a$Q;o z`L6}yuiL<0NAiHaymxfVWQbe*(H`g=ad&rzXRsN zmB=`n_7Oum#lSjMb2D!trjxi-?L*pV`N4ZFZ^V|Pc~$YN<^D(y17sh`6lzday_~q? ziMNz?CsTW?hi2V^zW7|~)1kxu%EoLQdz+1^b%l4C{#RJ>IfS9t)wpJGQQpsW19*s= zc%w1_Bllz_ZyrCx7|Fu>H8UA)&7*Oil8GG7Ez7M`#MIMZnK+I033e-)4k-m!h(xuL zQ5Rk;*H`=XNGXT{H$;u|D;Y$4w$vOF1}bUoRx$QREh{HXQ%WnQg-b)P(65?eK4~Jw z>cZgDneR_qIA zgmvt+O!Y=X6fK&@>e0(liAU1=c}hgKOOwBKmI4Ddyb%m$X4eo5RP4({P_t(p+=Gu& z!!+hhYVcswN@Q4JDr(12tduZP17i>YzOxQT{OC95W zPXPh*;_uy*(W3O?6@rC~k&U&aX5=dLdY)plgd)>raDO6d{84gub6i{1ildY3n zmI3n;Ofo%5R;0XRJSFG1e2QvN_r>M9OhGp6zj6^3Eogn46?S!&(+W|6Jy!E+g+u^G z&usOdYRE5ZWmuILlTAP$g^$)*E^{Rsa`IKfTSEKiO}SjEwk>Je319OHQL{(RqCOWEWMbU&r*@6p*Vj*{q1oEuaJyb| zk$RqCJ(Xb}V!aeDW{`LyP;O>hMps8+TW}g2KO0(z?Y?m5sR-46)ytJjLkzSPP`B!t z%ZUzgI42pK`D$a;ZJy!J%=JEO*19jM(@i>~dw{HxM;RJRMVPc|KoEC@7^k_gt0qy^mY!L$Z_9XF zR^_JZo)>io<69jsnnnSE#Zr0r3>6nrQN@gubjP;x%L}UfE6s%szt=6?gDq0cEjmkc zBOaJfg2PprpbeSil9g?HNNW?<=Erz|b9m_{-b^veQY+G_8MUE8Rs0=4^C)$I>9Bt6 ziww^wXy@Oz$O_1(|6+JN?DwxgzUW+&|687o%9_H@(Bc3pNZ)7mkbtuOF=cZlG{a!d z8u-vWZOUxgS;(CA_JLcjk8%H!TOU=bZZ@4=vCI{sK){o*G{sX~1wWY!)p9mLI|^fj zCPXoXMp{R1an=xAcdMipcLF4_o{_m7h@?IVK57i(`pTN(2PLfj>o14U&BtjO|J8iw z+_27;92327zXGFsj5(+fDs-z3%Tft1@7+f&#oiK|j1Gm0ozomi)#7XXKBuZr71JvK zX>~(_*($lI&tj$Cb^u7(vxbJy>Ne0020v(y8>Fhan1cJzpIc8 zm?cYbjND%jx2pk;tk|j>H5>+NQziLO%`hhQS%_2~DI%sLQY0Ov5!WQiu-3ax;A1$6 z!S7G!{|1NjC})ML;yiq-E-U>Rs>3#UiJ61G5j}=7y!lKQ1)ND|sZ+thY@Fc;F7r}d z66m;LKIsf8Ya>1bN)313nuDsX2hN3yp?IrwgP`BC^8)ug?4^$dv>Wq|xrvXPLD+~t zi*Q5xCwlouqa~X8TJ#{O0z7;CE3;e_ccFNO4nLkU*J&rF@(e;54#(PQu$s4G0pe+k z*m_SwFg{}hM>%P5YBaPCI^f6RXn{(Fx~njgkm%G`+LK_5D)=>Pwj|k(2~-|?tf6jz zJy(Q)Rfx5ebzhh&RGB_ehz=D6ey&;SR$TPLAS$SW9pop?hCLq}?I$$Jh?-Txf-Tp_ zFptn``UVvthCiS}l$iJ&<2$H0cNp}gv(T7@eLfbYDwu`6j0Tt*Dx%FO$aE6i`L81~ zWQ>m8YB3T{7N==eXUNV(&Y8$8%V;bdYgHkcXSI6b#92rQLElOBuh~oTz!=Z6E#sun zK4}&7@J~3QE_4yqF^+#7T4mmt{R#1DR<#iid7EpnCJy*pHW9}!o6x->*c0r1(4#KN zZtio__S2~Rhl02LDEANKY=}{B{S_EluqRn?p+-@qf$vXML#c(QBVEs!f*G*i;oGS%8N z^G~am5$^;`2cm4*US-gg7?+RsCs@5VQeUB#-A<$ge?{5ez(vmXAK3>n^bT zik(yN9pe{r$|MET>F*pk-tR?maKBoO-CZ4pZB1=9Kl{wa5$CQ?A^uwVeCFnv+9BfS z>o)GjVdVXk&wL__=rxFUoSKliCj&tY&!-;##yK;Q_tyx+&GX*Jr*pNDf>5pC9LF+i z(r%7>IjB=$kC2qu2g4262CQ@}g8O zN2K|kHg$~M{x>m~TIACr(r6W6wd<+`_K> zy!-{!A-~iO&W{&QU6W=btbd8Mba9%I&hBp5lM{NJzhSpqa?rhz65m_e3#%AyY@Np* zUM7_LV@;3hvhaLGlyCmFfKXciu2FT=ca2m&E_Xrc5-zs=6?YD`1ubGAlkoen*=RDN zO4m{o0dnlql{0TWR;7<;t$=|_zVTOmS<}7EvsO1iLGeN(RQa$JYBJMrOC=L^OuV1( zZj+MAo_IMD=Sj!Hz)Uth%a?d6VwytDsL@L zLP&{gNcfit_*!`Mqp0QL<~g~Vhl(#Pyy1a$%hN~^W_C-7;1E2 zJ@YPD{Qcu?Y1R&E0zs3DI`N+@TXOI zLUijn=5%H0E+a5^u56_n#ctKrT&o@k+~XL`!|#M3ZeTAMa{~XBQ;YDgxd>QkwZpOmIY)n+Igxp;3{tH z$RFWT@$h>Ms>ztBgY8?9ZaYBn3;AVx?Afb56C92Nf(wpevyq8N=!%`4e0^O6AkP!4 zsYXif1LYu!_!n6Yi<{O)k5xhQO-GYQFWZ0tSsCAf%MA@}S;FtVD~682u>DYXz){r) zt(%W=pK|k*Ilu@nZca))Y_Fi-1;j{xb@aS)F@5${P{SujoB~ewrMy@((_NM4mof@e z_%5kB^w=@=bhnY4J~?JfK$;>E@a$q^*VtA1#C*tPE5nZRSTg0R{ICwa-jd;_mx^b* zS#B$ioXVIWAI-L+sX1wgb?vuxDl@f0>3IftUQvVcnv*_#rwk@aK{P+_D<)se{_uE< z-nPND&g8kURB4>BQGd>@-E}gyK@Bjw*8X8uDx&|Npdas*;qS|Ykhl^y4lxrwp4}-W zm{<;v^Lq4a^$tg(4k@_yQSirTJfW-2aevN#kTxLJ?v_tWI3enTYR7_d9G{JQoYgpu zC^MCXaM}72k*%>(kopBzzgejbXjC4w;uLMlSipjX6{mUT+Z`j7VpFfeX|6a_7IRA*-1;;%R&*lZsTrRvF$ZYUm)l4Llovm?V@Wr zODv9T8)85Rkkkv+fIPFpvB1O>t6Ow9o6UdM@#AzbAPef2zCD}rcQmTlHcRNEDU7V7 z#yiIm*q!g3*TigM&-fBZTU2Ip?f7B`ayq1_GlySm$;1oSZL`7as23lb0CS$rtwHp_ za|ZSct(f8~?4)NmDWW6BZE7{|@C6JIWh`$rcdI0=MMDIzRw4~J!G@WZX+X@>I48Y& zKMA1pZY*XnsFup2H}Vf@1J*Gzz5ok=syi$fdV2T|!ZWxaAc(~iR=aE`kdI{J@?TDGni1GRGv zNf3pS@IqJuk~-kDiL6B;LV4^LJjBxh0P|Bt-HIrNf&2Fhod0@PNc3)J+ySfG++q8n zP)l@Tx0j+PYiPn@doI1PG+p2N!Pi=x7?d71z#f%`-ZL8$3toqXo^0I~%*W~tD_%znsy{_J?%h)?C)=&EP!lTPu(UYrG zfu?L<+U%Ybk~I!0K`mINI=G%LrBvYMDu+0K0;q5`O&VR(NKUf&RaimmF|1K#OSi!< zO~-gJ0@WI~+`vTC{ybk!oDUqIG`=`4n;K0GvXYtw5-9>lQ#L*%d=NU)Sa(W56$PcS zM4kAQv~$-8=yu6K#l4$;q6{z3zU@3)8rpcfV~>GEqwR*w4;y0=O1v5zoa#^VNRtRy zbHO_0OTr3ucgAN-2M2zk3(SLzN|TIP2~s|RU!CkCl8R7)+hA#yRS(DMU22C`6_|lM zyRHnK#xF8k5<=?!dSJyEt@nm`piaTG?Py`_|JLHxhaYYus+C{j9ZKF2%4luU|6qD& z%uoug`I(+~vqN#PQY3nveDx?Q9LZ7MUEPu}Hm&oXTTEhFb?0|5%#U|-tw=t3R5T2y#&-02QYpp2nG!G4_xP5>)m5-v!NbEJ7AV@lF0 zvhd8D06d>1IquITzKb@0SiM2{o86{(Z#$LQOOf|-K4rPAS3eX23xJKgIqoBioA#y{dg@r9$V#Z!wLi4K|oGsO!d@faC4XgSGn@l$_SQ44Hdzt@pTIj zf-iK9pB>zA%L>cTrw3b`?0^oI$`374NNyivE*Wt^I9zv>N`R61Azv5uEt;J9{lENc zzfQ1Oe5ifUo)Ya9wHt~@q5)YGSRzYqRqqHfJ>l9-VFc3YD966^Gx^h_`Ld45x18T} z;Yr+{t;{XfJoT7(u!v=}1H`tSQbKHj9B^YbdN9?a<|2%(x=Juw0ATt)k*xKhi++%Ra|986%{X`I067d)@qX!UN;SUwV1K! z!-Zi`tOj?Fjau;R#u8zsjVuWnW9Q;pCEt*;RKY$4XZ&w;>7%VkhE^4-aI%?vTG8AK zqF6!iF{YDnrCN8s;y*3pG$$W-Oa55#n18Yu|Dm>&%#BoabVkr`bThV+j_&tYl{~*n z)I1`@kX9_9*S__WV41{WGO~alPe*ye_Tgi$NS~&dQs7~LQ}kk{L&E(gsY3Y~p6%!1 zJhUZDA)-t>LPQKmrYJxbzCmoB%GyAzOnMF+2#l$5hiNSxL#_DxxUhrnY-e?Bhe7(Wd5m0;QlBYR? zep&1O5cd)*$iDo7E3Q@hNdLuHG0>J4o}w;xX^obu(%9R*w^I|1(6MBt&nNqHj-xDF z49y0iQn*=!QfG#oy60ML-EU!HZz4tv$cK($ zi{t0X22ZSZ*a8@~RH-}9dA{vaTk>A+d7=~H>d>TYDE>sOiPSIRt(yjJ9m%c)Jy_9hcJp=x2^+{7baX){tjDhrj%ciA7nfpR2MjY zt0+W+zy}2>H4h<%LOm1X7{GeJEQyR}baVJDxw&V3Nc6_99i{Q=>Q1O4OEv@Sk>hI_ z7tOuj3)@W?RXyC(^AiaYW+G@JO_e7~bfIJ;O^s;?#O#hw(*uVE!#k>ek!xqth7Qu? zY3qkyXV{zT_39}Ekw6RO^#$PdwMv3{2R@U-7CH9vdOS-z>ZeWh{T4?m4;{a&AGYJS znDy&xguF58VBc+1)01kMPYuzAf@~!A4OIQHWZtL-o#`)|uX#ZPg5}u`r!C>as9I(? z-HKbFoQDl174QTu(O zsON-+v`MmTo@04pC1on{FE74!n9^&rS$$7z862Wx$$D;MudV_q=%28678NqO;W|gw>AP_78QR9=hCUaTn;_Rc2zR&Y)(hTkRP?93kT4o<>#OY0g|ljiXkOvINgSQBZUyI=N>ejfbN{|kcc)n z&QTdW(dTSOp|=HIdltGNbKWm` z7lg+ItCRV2EYG}lwBxxJ{@<=<1oplW?|pMY3b1k|GI#&R6rPR|WYzouoyTIx{$xcj|kvYTft!?}3%P7$QA1Qb@XMy^Eo&AO~7&YD2_PA+*Gv zB$37iOz~#5tq=@JxRJN_mzYs+=(_B|JsSF~Ka8G9&`BRjkva;h7JKz%y~Fy~n#6QR z$~!Yxhw1iWx}RJ92xw~BkX-DALe`^YaZ2c&TW6a;@VWXNb|J>Nw+72>v?-}=5>4Xr zN;&z6LVswtivsZnBpsv)3x{1g_?KdQ(nRjkD`=e@CVu=iH$4tH_4~ft8V2sfhkO=6 zTyZh(Y#U>&`)yBGk>^5EK^k<{YG8-aMZ~aD_Dmt%Xuevh#?R5XrmQ!PI_P_Vu=-f)Xp&|nG>5S2 ziN$ka)soQsCh`pA5ux9t)_!89nGa?BmFkw@O+q{|s^m6nLY*D|*`fP)S-HWP)dbNj z6UfrCqo9(KM6IFdb`o{G6~@?*)Jc-ZW|^hc4cFTT3Xfpi3mNEwBelh zo2Gc$7a1p`{l<#V)Z9_r$mR0*!uw7lhl`=Y2}L#IPe)h7`LDVyYe}hnW)iAQM}ccY zuH!?awPTgTQe1KBbQ+_ALW)M0r>N(X>qKY$a9+OBDssK~Sq#sHdz#1-X6{6b^*0Gq z<;fD3^LMizQ#>61%`|lbDXEUYg48Rf@r~sMqT>yE!vLwV_dnSlaYcf-H*ixOF)Z`~ z6+)B5J%z@NK7g45$EJoyw!R7hmSQ_8H1W*1ZH9YQv8capM$Uac=Ym_z-EsN;L)ngh z>daDes&BeFClF$0{%Jj9&_Y_GGimWFgL{d5*-Nd&rjh!cUP*Ah-Z+u)g;ZCq8HQBr z6xtuG*YD&K9qw^WjCqtQU|$4)heg`Ew<0&)JR7pLOflzp+m|v)(&qo$-j_Jz;93hx z)t?R31NhHF;9R|(Jc$MAv4IHT7$Edij~1IERwkgip(Wr8BC}LG7M&jIb%KW^v1Q6f zZ=tD)Gd=UVOk~6}k0Qb1dawl2+ zec$|-n4y=)F);}uc7pY;Im=_;$EMu8tC9LY9}}&+5+K<^{I;{Ws;b>qGW;5}0sHKN zR~sX=ZW&}yn}{TsrQq(Lvh2FuOvfH>p7QGA2s5eU0-^;P>PPLZX}X<>gg$M07BY^x ztA5l)Hqrd(Iu&`q-aOVArNll@tFuq0^%Cmag~kDP6{DTL{J(YuU5bPy+h>AOmY8=( z51%M1>(Grb+7Z%NbF>)}DyH{5OWNfEluzi|e$2BeW;-eDJ%U!J3N>*^cShat(QiV< zVvWghX%iMFOhXQwv%U2bg$+3q9+MI2eMxY-4=9hT9F#qi=`D`rlx|B?1(WLz##%(x z+3vKot_cA`39~ZSJ9Lxrgw);&U&w1{F&)xukR04i2EC7Nc;K|LyX_k&2_HFeNbf>f zyo*iqGijBZCQ_0Q#?rlAaD=t8rc5a<@FMy05Sa{b2`7c!0*fiNxD(KmM;MQs4R5`M zgtz3$3$o}1#&Egrr0Bh=)`JwaZfV-!a-cB0V(2K9i2C+5+{pTNGO#(ICRACyop9J;ZB}^S%9S2@r1Lz5UXK`#6`QD>JAvk5dd=k z0V#+(7_&p1u}3C98P@#Vf-j7<_4*G7v^JP8Kj=&gE3Jt;<$LS@F9=%#yk9~`$a1$* z=b80ibrC%Df#xAw0N+2{tPrKHqR%dRpy#VDLxnr_jbV&);*m{(S%0lQ*h#m2b|H~ zu^GZzoC)s9BNj*h3js)8komt5sJ%_h{ue^)!C29q6Y%;4jb6wM53xS^uy5BJB z->HM3=_XucDe|XWTt7B+zbzEeg7@GLZ(|$+sT@2=V1e(cOhl&<7)oW3{u-!n2e ziHHU~Sq0Q-9DY8z38ZZ`l23x*{;mZNC-zprpE8e-kSYTlKYu6AR^?#!l^}MhQ|p`{ zcA376iQbIhopGO?flD@YZlJtqiSQj!-TP%jRNuaN8656@!`Lyn0`mggNa5>`4}w92 z{h0f8J9i;HfqEaF`U!)jsGo}6L|f%R*R-epC{3mUQ%Gq1W*!qu^lika2nAuoG#tn9 z1tHK#xyC+C7LLN>8`%K4)|Ztb542aEAY=M<&I@w{8Txz@n0;2$_d;v7^ucL_Eri3@ zyJA6$6(dZ$h@v&{1@3SKlfly+L72ycLg78py-vI}rYki_EP+gd|46FJV$(4+KSm^Q zEh3mSbDD|uxfdm~VWW_hqf&qP#b7QCUXvpoQPhrutl4{K;Qc&j#`}N7o!nae5R|gx zfcwAQ)~sU}pYB zHh?GuZ;`vhEw{#&8M@O9MbMC-u0@66m&jl$is2{TJn1V;%lNGl!HD!lE1{vtoyFU_ zYsVTDeDN#L{0J2y2QK7VcbHMSMaWw@3TcEZkPDt(3!0Yci-_5P4SCAs1mlK{es~Hd ze+nkl?yY|hW*7!s$GivA45uY7_GS!y$GPRGms*?Njx^Sf0>v_aS%NFT-bZmOfGYs( zql6B@72xgz-HdncO!TAt3AL#Pdt$?&IaOnscW^QM*qa7-!l;WBoB;EOW<|5_DIh*Eyrv_e7~NQ^fQq~bs`5)2QD>*csGRzUY7WOGM@ zV+=CRT;z0v9?sp>9RTjoaiEI+4{0id2mbgoVP8i|Ji}PX9V;}EP{t{~oKnDZ0BP!+ z2dXAkKMH12JBlRi8!e|KyyXbKQIX_OF`@aUnEK2tBdjNtb!P&9JU|?LXBN9d3X*hk zQ2YRuOFUs*+RIq1=tUD(yi%=gYFK4L%2~`8vRR+)WTS&CCPesX=*Dna??P$3gU!hc zXcIgq_L~m+Iu`!J(SY6vyxqyQmyAsp7MNbgs-wl6Lg$wvf`Un5Ry)cf>ic*SPV=9L zwSp$O^V0~7?XO}$x<69KUlvZZqL#YnX=fK$4z|VL0bO5Wp+gsFOu3|ACrT#%ZZEahUbLNSJxr_D@<(1}IFw<_Qe!D`m#UUZ6zX{n}A)XY>?`wKGjoUV2>$JK0-)z~^=rBm+6I!}^*Du{8?t;DD} z0+V;cSawt)IonaF2K3J+$fISVC16c)BAr>KQ9qfuRXq__XRr-Ald>$7$U?7@1ukTOvf#1>N}eaP zd7XCn)My%4dwN!-%Uo8Mip&5PwRP53qk=N1+?{3KjZ`H!P_5b~8&9t=wb+Mlh?;@6 zCS8sb4JcP=>OhK!hfA3nwja315Xu$j^HIEuRHlQpP!FR7Rw{vPyu$d^N$PR&QA`I5=C^-z&j-eSzL5MKD`%vQ zuN!`{N&LIw8LRA3vMJ^BoKW|4Ew1$O9Sx(JE_g8dPKhij0ze$wBI-7<&(O~Lwr ztMBuC`0tSjPv_f9WF`MkeJSzGw*W4Gzevmi$zi}V8HK-Jax8_>;XndK%8lWNzc*i@ ziN%-==TOf*3lS6)%=<2@@i^Y&->CvF2NKvbZua*zh2{KjQBjpdO^26foTdFOh7

    1*_oEHqbp^@R}(l8TxNXlJlMwG z>21xi^C1h%s=dG?*xoMSKI)>>+CX&9V7AU}Z%+gFHT}T!>A{EI2#O?rA8_ypR)M7f=0fQAR*mDt zt$}1)>vRrl%!xE6N$V*f&)FTYX5Mj}X??>V=gvP(5{BPj)3z-m9-@Eg284~Vnor~Z zn@qgC`2NA_|2c+$1nUDJi?gu1o1li{Y12tD4r^K*OLy>Jnr)@`(*>w9nm!SH;`vvU z9e{}0U2a6DE)LH7d?+Jon}A{o7lt=N zegkdlwGIpnq9nkz2tQd=Lre8-Zn*Gp9yao_B{R^B#^FfJ5Ur$UXJ}S2X%2#gond#7 zi6rd{ED%RWp!oy5hCFu#o=f!G>3c<7PRS3lDJb$4RfRh4KfvDI%YQzv(pqVGsYFYg z;PY;*k1;WlrpU$5MtU<;uz1gpU@&WGMY|;ycGlQ>YiO*9l(jM%B8^J6KKJ(+8t=abT@utY(=g3ixndnGxLw4YVtl$jH=IX-) z=;tV(SqhTKr8YYs+j0H&CCAH5%;K_bS?4#kb<;KT%!HAMmw^D0L*}J>O3*}*Y^@YA zk@r)FM5$*Umt}V9AFXs`hG)ID6X$3ZPW$pAVwFcE5R8s^=@^`IE@ACz^5M%`@N&aq zEjF1>N14pwOfH~+0N()XYICNrv)djW-ncf1Y@9tqH$^4QC5;%K#g+A+oDz@4iI|Kk zti+p*nR3^?^xaRyR5RG)`K1UEoDAuaDxFJm%O5h||D@bN4^PuL@!~O$ksEfxD^$=A5Lh2`XHmoEvs#R)@I|H;O1jeUCoAK#Wjq`5NSY1j5Lh z0oV9pW>r#XSw`p(9b!U9x?hc>A+ZHoC%{6_>_$v64$ zTEX&J1Qpmq)>a0xlmo?5@l9s2*QyEmEu|E>cTZc-*mIHsRQ@2v_G~z~^7bjE)HM;r z4k2N#1X}Xapm|-iT=apdOJ(|rXXuxp<18p3)^&%`%eYJjDn+cTDdO3$F=*6$Cg2jI z5}A;(D(|~gNH>EEcGe`p%m_i(Uw-BedmeB=fuxfT<#5ts_YI@=wRc2(63I;CTlE6g z^CLq+f=VOsu(S2o);RF5VcqUG-sTVpbew&I zcRst^ggT8PmFk~J@i`X{Lq@zVgML&`0}Jic;*!_<3!pIf%zAt3<`W7rkB6^+3u*8v zBH3gAj9dfw;1_ql^Y+K^@;720AJ@N6y~eW&*wWKda*gb4XKKa4^=wYwmT@(nw>Z+v z-pmWB=y;0LDSnm&CkdgPzib}YFye7uYu;6IY&KC(4`GRW?AF2j(n*gqeFS_xVYV7; z2CCPkph0_YGL;Iym+j{#vi^H^v9;|H-ks@5Q)DJi_s|mfW}b(B{5$Q?afZy{M_1M! zum+N0>DYsyQ7LTJxd4|bX+YcvP-ioeOr!b}i0EF?^J0h)3j`KMX6t48R7Tx#!!QB~ zW^5B6?!F61ZazFYNg6Y0-;bngza7T=H-vhwdjr*09(Q9@71h;$S*U!0lc+neM3$GA z@BWkUoLAKy106m%_F0`z9zc$xv#YD)`|Zd*umJ@(Eb1EQ?CP!of;`+o&{v->Nyr6~~)q zw%3lN)@;mO>PA=4mlczy*()oxaXR;O``A8)vZ#jUZ1oiIYH2J?0){!)lW6d_HVSPs zlTVHvS67wsIT|BtY~?o}7PXtp-X`o+$H*<@sbJOBBQ7oISHNl-*bvQV$E0iX)jh}; zWUz4vW^spMgb_hV&8~?j9q{e5bNh75TO(3)5SlH;QA4VHEH%CbU}8cCpkqWHXR)`BzK|Pz-v{$R|BoAdh(oP7}#w_GxrK3a64rP z#Z>=Q=2Tlmf{&<@?#yfqQ*3Bl#>(!F!<)!bj2=De-p+u~?A#iU92l;WY$jk6e1_LN zY!hX|93KORh29B^7JwQU>rajbLlR(QYk<3Dp7({S)Q!RD8}>k;W_dYhCWTKjx)6w8 z;uX4!8!j!it6WJw%xK;W)hsJddCp{O1-wyXmWM-O@vLNjzbVl@6pjrG$F^V(wKcSg z;lyt)L&jwW@4q=Y=!_pT={7Nm3uvl`YR|#w7xIG-ayjGPsjDj)a^a!jO1ldWi4J{5 zM#Ozrp2=6bq+7%Wr=D` z3?5f9S9jNDy}ar!?0`cLbjCEHpRYcR*ns?gYnm&1dtD# za72FZw_u5^x9)bCEw&r@Kn3fj_x;q{T%4B#=|MvYPhYCpPxTMPlbOoH^jq=GrymIV zUb{KDM})eXBPU2i;|^$%Pg3KXcZvE-Uo9^KLcBCV{+8xbl*{j$>#ahwU0a$j>-vvX zaMN(v1gk;t=FcWcdr9({Zl6_KgOH&YujYdRaSU7aeZ_+~(P+$Mbb! zJh#=9zd8yG;#jF}N@T59c<{OWX4F~Tgpf~~lSI7lt9bCew7_~h8saTXW^55_*xjFV zjY0_;lgjj^9A2eKe!ci$iTw4!ZBaZ48&!#CpB-Vco*<7zNT(*RBxSlBcANvfsOe8_kPn0#Vf3M$+Zx|G7s zrXcw#d6OTVyGYU}0l81dv6;SiP$0p!Stu_r_^e%lFlbRqQ;CvkwFc_83@{^SPdKWg z!o<*82dSwB=;(=5Hjeu^HpFvF;>NlRttZNi-X78kh6%1Zox!AxuZVYS7UwAg%w)3* zM-Wn>21caJ-~t#ZrH~aNcJ;IJ)Dbq~;7a-6vFzVrLoKuT87z`;q4MNu=1XUWEJ9QW zFH?orZ>Ai`U<)+^3*<#Ki2YS?3pl8SYBy7ShXMwP zSiZ~}UwIPN3ErprUJte0hapwr9(6D_01#F@qKOuA5i{{wbm&dd8TDAFxv=5;Ti@ zNz<(2i{EzV4W?7_ZrWI?D2?+|bT5yW8ON{Y8rAUmOc6(-t)BF{^U(lkgiD zv4ymaYNB)3CxUF>;2rf$?@Du?_B)Ca3x%BCk$SW3&bRWX)J``6PgTclb6@1z_j38x zWtvZO1-yA=IiC4_HX&%VF}!Ddmxa#cfLD}Z^WJqpxSE#J+=>?WSunExbM($7-vz&w zl|XEI)00)Qytd9~2W|Jr3sw%%o)_GPX504OjV4H}KJsCF1QDZGCLf#sa=n#p==dFS zM)Yw&@36;itkLl_ywVR^kB2dEtlYMfg~N)I#B6&x`#5#V*rJzvQHQI}mUvAzn@|Lf zmx~=#@7pFXp-0+r_)v|EYOSojha?et?To$OJCiT7KI;Vk>Q}a6SVS-cun*f5mW{Ut>khz`OQ2B`#8ZIwd?csf*&Xh%LaBkZ!JA!vD|?rvT3ZpHn~gXvqEh*CUXU{ zWEnexfetbtg{K49GJR`*+V<)I_DwuT$*R<}w4^CAk7}*X#-s5hAIr)*o7x`OupvN! zVS6o~ft8wqf&x)praiYD?NJ&J7Z;bRipsqC%hnE((SK#;69W6s;GMqocrt7h!!O9K zMKMupykDvOH*E}W*?Ka~%j~T!bDP`KH(lN`Bhez6l++=6ywI|!&io?MShMXaWG&<) z%+%2m)Uc~+h&3YVkcvzmStT2l(k36qg$d9d9v!P7c%rz6Jd6*O%R={MzHW?Jnb5_n909VG=&P@c!5Yz8e28UqbRzr<8wFAM7an$L1WD)0 z(Ua|V?GmXbnbD<3d2~?P^lXO0oQ|%j2W#lYVxJI^dw8f^oem8aHHSRDXkjxG$62T% zqh+DiLgTNXHOMB;TD_QW^x)bo)X0fC1I5TecgEB!$3l5IeMh|8+)mdEbL*T29Txv~zOgHe^|rGkiZI zq{zGFr_Db@2b%hnl@RfiwHQ+wNSubx0q@UNsxiBmvKR7{^~T_KX?dWGd*y9>y<`go z&nCnc5&D#tU^8;Rn-Vsk{rZT^6Y}O~n)(CB`%wcWRG#_FM*aQh6@107G%4>>pf2vc z7VlQU2gJVbyDiW3c8LU2Z>o`G%taERU(Ef$^|5j$M>zxSrkDBzQtxj!zod!Y+<{;R zOe7(~lUOe!?~6)K1p$^pQ8%pXC3wbghAe-9$MY?C6cOW@=2J4+ zd4=5rHPd6a+czsKUDqBi@Cjg9naAw8iNQ?meweEr5Pmn`&yQzS6nr5E^0dKr169fJ z1&h*jV}c=c9m4;rn7J-2LGXWAC5oy1%VhkcYhTUzyAe-jam7IqdB?LD4>P-6>3jn^ zpNk}7_G^D%ff^i7W_)|Ua_c<+O2`oY85h6B3BFR#0BvP?0Kk&cWl?@tS2pl5;2{I( zMQRO7gyr~e5fp@tEkoDf_3$_%uf4{`{u^4#lQ;mMT$(@Bi?Krsb>ash_%}AHNJd(b zwzh*-w|LCJd#7Mg0nUIRR+-J)5=IX_}(U#!ZFI7wR0ARAtZggzR?7ms6?It&{% zIDna)l`67XuJDX~4jWsAnH{&Jwt}z*-GOG7Iyi03s}61G;`blZY4aq@BU|=F* z{w#yazKMTFjLdw^k(wxGJwR3hm6f91`n5j_K>`hvlmM$Da$pi;1mQc#9U6cMiX^`7 z5OFENWL4u+mzwJ|^OS*e>MQxJ1NJUOKcZ38yfngzUm}D zg|g5&&l54GbRvi&_V;(8UkOiUcl$%@ka*nTODv18c@g48t=KYWCI5TE#W#ztX9wz|x z3YG}D{|+F_a1{#_>_-N=xNU6S&%i2lJ3HG0IN-8JU~c92fnO|6pGGYH@Vh=EL4D+L ze!e}pnu4v_z4a4_!T=|e{Z7km6yt}Bb1#~FB_+0+{3*dHQkI3|?conAPIsSDw*lDj zqd&4>>>O$`)5c83y-5nt4)ZWRC0v&Turwc$F``IoJ2lr)KrFE1zQdc*7KzxTC~5!rDC&n#p>w(r7KI$QP-7we6@q| zn6(n~`zlUZ`PWUA_6O$$F8{VW-PG_Dqp{?*PkEQi?+Ko=w-qVz4&le?k0?0z!w7I3 z$)>|gcG(@k*m!pN?hMlK%QTl04c+6$XI|amgW9Y21s;!Fp1z`27^%=TF}Vcd{!Sp6 z!Z>-7G$x}C^fUP6Ox@qAiNBP_qy%XS4 zSwTYs3mAae2U?l_W(eAC^Z)vN$qBS9iWBdCoo1GfP3QP-S^znuz^QaZa(yN)@}G!R z`&UN@P{82?T);HB-x{SdXmd)919!{7xuqBN^FudJIn55vbC<;VI+ERB4Mb-~xRa2C zMA$3+dxMJeiU}l2v?I7JpOvK>LE`$wOV`!kz)QaHIJ}9wPS;d{4p;_qQa+`pn4dm8 zvCEk`+HG^2xg1NIrpURD_?)&obLN@LJ;}v`_t=Qo(03s$#3W#!zDszTFi|)5D!MjR zwnG@1j`Xm_!mEh!<|hmCfjr+uU`fwKJ+-Bj^y*lc0;2&IGs75sJj!a+kv~A!GiS$5 z%{B0Bb*IRiuO&(0H>jcjmr9QSu;(QlXxtFV0_HI+NK1B?@q!;6gBw~XmzU^pNfE2; z;or2KL*H%SouP$L#!%xggkw{|nFf<`&N4 z7iHaF<$+=Obx1i7i;f(pVY1w1&RL_WD5}AibSytIK65GMX3864nCwoV8&FEnQdm)o zX^0aoa4nX@XS3*f8OcwzoTC3RDO+fI|D*7S|9pYEyUU}+3dCMM7>I;ALXqb^X0=p! zV$lh+>G^ZBrM8}@wM+Zs5tl>j)gWvL%5kop;f_4T^XqgCdCR^A#1TET_=gDt0#AQF zbz)GK<7&MpU&kJEC>UO<%`hV5YFEYMIf=@rXk@@SGGr*TiBO;vT)>%ox<|ojJI?_l z(8&9de^uh5Ve5A(Uy;&J_+!jaBPRlfOVjg$bYM$Uwiaa&mp2&j6AM8;#{JqAHG`Yg zDmIdR!ouQodw;Lk*3bh{dy`!L+NRLx>X2~Wc6!nw7!>oj_Js@$xA!r&ujAB-C!II{ zROd!+k*^B~*>YIqrF;jELJrY@b#%?~QBe_jYq+x5Y>>t3N7fb1HC&YE2)hSncK zsf?wioNTX=$N)1C``d(pcEI8-zTdreb=}VIgjbM}O(u-FrQP}GzLalx8XaSyHQR0z z624s)b^WXn?D)XuYyExtu13F> zX}G%Lbe^qJV!z!O8;b|`*AR65H>2jVDFY>D)5IZxC?g%WsoakcJ#P+ir>OnGgAd=A z!v8dA++SU!S5?M4B6LaC3PIb~AEd3lB7Z6muA6NK#{yC}9LUK#cbqMGJE(jJf^xe&*fkegz;nyFFpaN{#umf(&g3MFl?2ZpeeiBm(SL; zR4CDy8gTZ*<6~u)^LGx2ArFmTHFe$7f~K$VZ`Zi8tLSY?o91@Tj0ey^M-KDTLu`!p&Q@Co+* zmE)wJ?iXJGWL5=I(T{QYMSl-(|weZEv7g#^=0In`{A4 zmNAVf{!97#^zFq<^=GTWYH?8J(ma%qcKQs}w9VnLHgCssA+>l&A^>qH&TqSqDh}ax z>>!ZH>cQ(nJ}28*B)%fawm8_YcCsGWr<~+1Weq1guxqz=P(wV%5Go3!9sYY0yKf5# z4h-Dk$2K1)&(i*NnkB~JkUi9&=W+ua)E>!bbKQCS&Zr)#k~$r}1{^4(IbNn>d^WOK z$M(lVF5jOkw{N#w2?*!H3oA4mY)mtW^mh78(+(fp4|HB?_z684bL)J5rx5ut#Z{6( zRx}^SJq_RR>-V?NaoRd~d`z+9rE0L6sa@aNSZk=st&V9=EKKI$?7laVZoZB%#^w+W zw(gehxHRmJ8YrSJ5`XUe0qHKZwzBdht(S!7c$ud7n3x-vg|EEezjJ!amD-En?WDVF zzu8~_iiK)>KVNfO0T7Bnxlpg=zl;fx(|*c!3DifM^#wuz)tRb#dJ4qIyL>w@3N!D( z)p4;t-*3e#;M3N^)wSQ(TkcnxV&3$IUGJ9p3lL^qIrFBfz!L)efVlDd6DI)p8OwLo zjJCi@Rw+68Gi|3O2*s?=T)&~jClxKp-33YImo38 zpoyRBo#zp0PS=O1)vr}*3TM}niDH;W&;34KuoKhKlMNHAUZ<|2qNC~=0{3)6(=gGv zT{#=S$ZV8qU&2*U>UiEB zsk7bIvz@WX?6NwxY|^(GYn!pKzT97(3wiwEV5qJ!rJ!vc!&S+Dlp4Bjt!8$*nrJ|p zByH>U(Q59eyRu4eD@J<=JDvltzAk!2n>Y?Q*oeSRTlpmk+J>Rwn9lyL(&CSR10`v} zS%q#oFwT87NoF6^FCNIC>$DXabDF~9+BztZ;&@TA>8Aqu{WoEHsG<%pqwY*ieN8E4 z=*WI>b-v=DRlxmKD~h%0$rPy(5>4DlxjbdW(8gNBseISEs}iA^EtI^UzFSL<`4QCl z`Y8AGpCxatA~r-r@B`EMmWkFolZBw@9F~mzThZ|3V^(tP{h_y>8S4o_14&)Bq+xi& zt7Mj9SLgbdEzeG?jR@OKX{#klHF{}7;^=_yS!>uHuO5M5_W$h9K#yg}=B5tt#iaeZ z=S`|aMaOZBLSRBJi!)|_-v}r}?}(c(d5dW%LAm;TFYum4KH$s4-eUWxVX)nN*vI_# zi`N|Wk-(C%!;j%xnHReouTj0n3PgC-`kPxFT1mW3SC8z=>khRTu2ZWe z8_f&HGrPh=bo}(4N&}^Mv@I{~`x6NF#|o8Noz-b|Ai1VG_n7#}(~}3! zK{E1=_UiP!>6u`JQtnCC`__h;azZLY6M`nAr&^o3n1H9a%+Xc|5Dkm40A zB>4R?c>76fpwR8Pj$bxK(^UKJ&ZT8zz>uudVk*MnGZ+fKslm;^fpqUu2Hc)1qJ>y)~d!rGjaTb-S@w`)fbTHsiBU7drFSiQGfz9V@8F+L({^`AfP+k%F$lyae`}# zVID4J@X6YG+1mmUR4%$PCFBuNx}piC3A!w$Tw-|oQ}@f!jii)V8>i^w;A($joK-7n zF_PWaC^>BS0zfou`p^9rJipC~ya~ydF#dk1~1oHd}40%~0V^MKHLwzCI~s3yeiA`5q-ZI?o-u zaRt|en%%9VnH5qvDDX15+sXVXt>MFiL(FS5nSLJ-WM00)&geDt`VKAMJsF=MAydLO zfyie*J(i`{bZO`mDsWWFR?$o`9Zmx^GykZ^uCr%lYrJ9N78Y~#uK+2gms9p}# z5~|yn%8-~`zL!>3gfzwIKxlhX8=ykUBq>#jLn22a4J&+5H8Bg#3i@E((yoOChAqO{ z4{Id5mX%Kd4&?N%L(GVV1|@@yCsc2#jocIcCAPo@FH*Ld5CI3X*uzuTsH-&_36fPh zgJ-=oD49n$P%`_e7D{?(_N4!}ur&d!KJa3t?qpfp?vhQuq9<1ZC=C2pqCNsS1Q9VA zHpUjNudZA#i+ED^0)=Y+a&?#1tW>`Zn{y?ti-)!pkPPcPecHmsJbHVC_UUe>O+tfwyZitBamw%%T;0O%U8EB7V6v5gKXqK&F(Q)$t>i|~3cM8hNy2xwGxHly+@l7erbbkvSc5PgCc^I$cqe6xNP7fu+OjOn?e&~)_T3m<%dUP z>xV|za1O;MX#n(%lOn-Lr!B?~?iFN*a~-V?Ja-x2y-r*=7L+96V2GykSHuI3f50*% zmHOt=-K+W6R$uHZX6SeTLgW)h%X)!w2Re0- z;XEZV28E2up>R!sm$ze~Rw8mFd1mqt@|Hq4@iaiVxpX?a=gxe$^UhZgG;MH1Y9=kQ zq%c4FAP0g_%qaUCIdVx!SVEqto+XVn-nRL`c}#LNqqvlCbxno=c^MJS!8v(^Gn=h# zjas__9IyjmV3+Y2%?Dlu3`n3la-;%+37SdsrQ7xFf$@IbzT)vJ70Y{b-7L4*1r=k@ zK={n%ljUyK$3n909B$K9Y@B4K#hMzyi4;g!d!4#5y6|?Ijln2z>R3pl47E;-@97f6 zD##g{sYwIriiAIe?$S~GB5EQ-wtMf#>N>9NTJkj*AB?J#=q_B5Qy_bp=*gw3bVJEG&eGQCm`N2F*i?yLLH!P z9emOo2n+UT}nu|!UVJkI4WhD_fElHpYswu?%wt*t9+YPK#|-=f@HuQXHFQth8FB0IZ% zeaDWM1+Tf-2iIonPm0UpqASWY8l9%(7i)RYl(d)KdvzWYomL(Ws&&5cQDd{&&I~kU zi}Xbw00iC-4F=i@o=dJPcy29NvMNH^asvVm7t|E1cNHO&dar{3fGfG3F= zLVlmUUTpvU-RytSCvQ@iN*+qAiDW#iKIe_4S2 zm=I+59GGqWj`i|$d_#2kip6`yY{1(~9{?!FuF(~-EjaX?c*Hj zTML)|oe1;7T0!zt$vOw$_(BfMIAl5R`5K|>{?QR>^YGtO5wGoEIgHfxfrF%_wepmf z3Y3E=tYR#%vQqHqzg*|c_Jr93Pq@2K>_G6)@%ra(c#nPQr8vu+Vh!I__{>_1;#2WS=aB}?>FkADnZ_<4P1d7i;K5`=Kt zvW|n1Kr0aX9sc&yyPwTWnHc)Zc2eCc5^xdxO&hK&RxON+bVWPS%3S9~suXc-2YEy3 z5_n2MA#b?U_1G5*L${;%!^P?XM?a7GDc+i%VZLAWN1M|z+GP#BO?AmCdq;P3WJ2u% zUelGw>CZw*H?*Zde8Zc?ygafx_V(wklOFw?pDV16V|3TYUA=}-Lm?2+0#3{Eg~ia~ z6R$!Z*FpB*G*$dvb)9Y5sAqG-(#Cf=nuFp`1DRQI2V3cT8%x-UP!NlZ9SRw8e4s}H zkRc+!DPxNt9zU}d%4N#gvMJbt>G^<(SP4Z~VM&pUvdB3CZr67-ph*zT}1$3@_W+I-kXnrQwd!Oe~E|p(rD|)-B8S=_riNWhln>m=FIE$w7eLo<& z2Obh#yTNTa|r8D>601p~gJN0gDn|WZc z5Y=kZh$$qI%ofdZv?&42pt~KrChsj#)o~%`1mB;xIgs7(E8&AcH;QU1I&Ibl^o6u= za;x?3Oa^7o87e5PFPB>$k7TTkv{c(=j}q+i3Sr=B3?9xFRvT$T4lF|vY7A}*B`swr zpozKZlV#^D7jRfv^2myeuWWwV@g6>{e0lr|Qi30u~}>InI(y){Bn47i0X_6ZUZ;L8J~J2 znI^kOrA8CuDiE!3x;`h9<%$ysQW^n_N!*qFvFRDw z$amzWR8lK$h;*5nE>3&lBxO*cSmrX68t)Y!kB?tjVdUvI_Pl6qa(F^}T^wKDzgK08 ztrrjoM2+O9ToWL3#&6Qxp@i(LO~Os@M=F)oOwi*2UW!smns%fEkQ2pHQp2dkM`rGS zQ_W$`l2b9H6dP)KQXP*}=n*917~iy3yjl+0Y&N15N*mC@ON7*aAOA{4pssPdzO&Z~8p&*Ztbd$HHfiVH#jx@($)2v7 z5k<`Pi9z>eBn{sendg3ZvR+>41Fplq({M0r*I!OCHC;}9#3p_siN#qsE=5hB{ODd4 zyd|zNSES^&zV>2vm?{iI4Z5oTl8m402WkEI-DZsZ78)l%4ssoU?gZTQ!*ar*#WsANGat<__cAAG?k@z*xmN8QS zR2KXOK{9Mp&?F)GvLe2JhGpTJ+a?m`t{9itaGObEjI1fgocX?sm6q%ET#ko6HrOSS zDamL{1o~&8lpa`+2et#K!EI`2oCMD0f*62e-eUg6^lwua7h~*v@I+hzrAq!Sxj_{i zsuEbtp2uqNhA0UTNUj)5dW#ktPQO`cW%Hkd;SZ|*A5CW&)n?bVTS}p5ahKu_E$;5_ zUfkW?p}0$M2(AT+ySr;~D_-2)&fWLRp}uz9=&p%6w>x!-WM^evI9lIq{FjwhyXgLCVj`s{V%f zXW(-tteBGk5v=cU?{kDGXMe67%o4jZwkG5ZVje7sR?7#89cLTblF!)57 zpye8438HKZ`Wagd_dnG(%e5a@HvU^T+wbh4-@;Ly;$1KZP8_`w5Pcyb9Wrhu3w~eY zPT0TBXIQPCT(-<;&*kySLN%h;T+OeQr5^ZQ1y#z0dM1J}P1eF`7@)mG zON=?9OC1x9tSCjk6ARLB#pSI@6$Pu2!2L}A^!y65+T^x>U=n9M%F2jIE{%|W9g;+o zp)3T9*u8D?iWr9tZPkfaqJG!5E7jJ!Jo$e6*+V)(_P#hVtys!V9+bar6vU-e&S6WL zEX`sxPF-PuLIO2z++&j}!)m5Kpp z&4a`t0vA}LZV&rgoQ=1=OoTLL88hT`I(Wh9ezw7M^!w&snWmY#$39tR27{;Opjo9qzh@KRNb!yL9tN>ebK zUH72q16D+pQSaAlj%8&!rvB=dhM&o8+L<``uvcNd(vbuqy<_Te!!~&6g@sU+u=r*Q z1m1SU(qPjcJNeAZOwRI1wgX&$gLGsK&&DJ6J&pIL@KMiCddJ}AFyS9Yw4@7)6k;V6 z$dbirkq-~SnyxVG=ratUs|b*8*GIQUjgzMm-yH0|>(5OhRlOG&+BBepr&G@_+&j4} zxc)@RkP44ba@|KekNFMaxRj)6Kj4>eFrmX~jFlceb1~1n@e^#Bg5%Rd`+*c$u%HIV zpLw=C<(kgbY_XE#gq$3Krp@R$xIRX_qvPY}sbM1Z;h^{RUpR;U2#v$ zc%F2;a^zLbbO-va>*{YY}34S2BHGaZYD3KsPDRwSc`K!U%X!QM{PeFp}b@H zoX|P1H9OMlG{+~?J-1~M!9x8I>IA?LUqFrj7ovIRsPS%i7c3)%fp1eGhsIGI>8veE zQ-66s$#!qoRm;BXvOaY>I_)T=Dnv!Mq7DkE?-3G|s0fFiu8EGk(iX??mB5vNCRBxT z6vTkS6h$e#MDbu4(~}o4Pi@!`xEtwcY2jd!&PsRR=gmQOST@aWSloEd>HxpK zfX$nn(#UK_O$;`ce_?uJfM>}s4(GmLLE`t|MDj+bay$x(!~Wi4AN&D+DnILQd)}#9dnWtImb0=tL+!Q`K?nUoCbX)||rt*u^}$qN&q$EYfbb|FlkKl(d>ZhrhyH7nv5 zq80n?7-12^PQR;&#+TKLq4={0E2xwe7U83%go95`{WpPSg9ngUB8=kJ@F1 zTT*WhFAsw{W*WW{GEv-;kXoG;w(=sm_YxCGF<$TihVL6p5`7XUPt}bcTBv&n;ZIPq zL81uQwjW<&9kjrX=g%e9~AS%~AWzJ7wFp$G*9_mN~2n2y(t z0r4}zW~3D!hki%6XTwJU*13+i=NsErhzp*k=l9kprF-)suo>i@?giawN*KY%{umT( zSe>z4GQPo;RP{RZh7g7LYO?zMWWH0w&oSPvvQ<0rBeLy>gm?tK6MIa3B;{7t)i(I7 ztgP$-AnKxU(SqO;lw}_z2^w|xJFVkZ7_1Y*RcR7VX0$4|E9hG2)JJ%%5tML)L|ZNP z^4e&!Q8Lj2C0P=!24lK{h<@@XCA?2FM^;z2^PDNaB|=ZOsy6&uDocK~!uPZXk(!8F zG~P*tvr@u}RkEo&{@E$_fL{5qQ`V91G{9OScM9}o@ISE?OWk%Z>M#uqqa=po;&r9e zqxiISWo|})uHz-x8&Z?&N8mrPcA}&3ti(y?w-ov0xT8In@}=j>*#uq-twV};%Cv>B zXb>J~XT`?q7V@~EZLIWfUv&{#`@gAWuT+2B^4gJ35ePdxtM9nq>P$E|aqc=p(6?sR z-ohxDht5C=WV+n&UW3R03F+X4R}+HRLu~4419qS{1}&a^Q-h)Xc!Sq<c zy9EJIphRGbFG-fN1-O!H-U`J>GE_y5{y7OA8roz=2&kzT+uva2;BCp&xQkZ$!v44r z62)n+#aCBORv)+9d{)B_j9P#{HoC93rCdxFWLi|hvw++lURU_5TFnv4UP!bL(%8oZ zZpqO)sN(Up=DUWvp5Jmz1boNSF{y~?6@S^sP372))V;FBZP^Vpy{ih@j@|I^I(-Lw zSB*Iyauj6wY;DQe`tC;X<~;PmZnm~2-nSdq#vNo%ot89hO2C%>V&n8`nON-76wNBoHl~iUd1xNyz6+#<0xyjLb3Xac zqXh{y20Y>oa{R8(dwl zx1ZCr(XkSP<9Cw&h_;EeZi+nz3RGv#{jC_%u`CEIwNxUkG@;L-Jl$nvJ30KT$(S)^ zzfte2VXtND86tVWB!P}t4D5ZEq&6jkGgfHLKvNWp-z+y5#IhM9NO0A@t^|6TCXZ)v zM9qZD=`#xnS>`+bD8{`V$-3iNtXgkz5t$+;8yT7D00=T@#^J$&Tu3z@7o_X4qKZ{R z4*mk*^POg)WhHWg?caM*EK%6(oyyhi(z7F&4eFxw84cAEg-iU^ZEb_g8-9hW0;Gi? zkIIG$O+O662&LKxRI7tz7H&|Utw^BN7^#t#MPGlMSPdPW(nQSf2GLSvt+#{&`YwK! zqwLF{_G@noHs?6d9}K5{So*}|O148`&w)nT7VzNh{L65hdf_s9$09g%kiucmk80as5)zvNXQa;KSt`u*44fG3FMZ=Gsi;582E#QU zW)HkMUIJJBE}QVHTlz%GvBW)8`*?s1>YyJ)jz&n3w<% zecP>HB?#H(pNxUn*9!oX*fke;#{EYds-cg<0L1RyH(&5h$++Zo75fN@_#$Hy2#_nza~eC$8{;mbQd|ELOgM^)Waao@ z$h{nkMLq2PLf*~f`HYqGee4XoOYVLc7h;{~HWl1l;INsV8f=ABKjzRxnlnS-9y?*H zKlaCa4*l?lZshYDp9KHUks{=G{NPMG8RLwLxpzr95>xJ0UjFB}Jsk(V;B4D3`t4@X z_dYJ+RBwvNP#bf$-n?f|o($Iq^0Ex~;+%9vma99LKQpa0>kWcL`HcK5@wA2Eyf1T{ zIBsrkF8&t8)!MCd0~916N%ebver9cL{NLb}6jgSxEfHr;SupU0pBIdVL@|n}8LfnQj3DQz^J&93GS?2w5%&n!1UQ*Hmp2NrUSX}%ns)?qnSlAd{>v^qx z_Na??%87%3?JzSl#`y#)YI^!uZmD{j-n0iDCs~oTv*8UX-Xe5g?8pBYLgbta8Jx0j zHfsG-3JG~`eLV^#s5tafZzEqa2o+EN(Snajew{G8pKi3w(#F8V0cXgu+6IA#fK*+t z$HHHL@AadqhK7osZb+9c%!rObzt>%@XO{OJ4Und)o*2QlYv|qYLOTCzG&E=H@s+^) zk_pfgO=};OI9X?bH@0qKFow#Nac+LADu4NmKJOZQ0H<6-@MsfzBN(Y#F6iotsZNj7 z0$I#j8l#?gtvf3p>t)HDHdWVF&_VxAEWH7pbf6yp^9}z4r!ahPXiu+VH0l&Z!jy9s zBKCwATdewTqNeD9k}k}G1;KhNy@y9 zk{szB8Zk9phGki->FCd&mFAZO<($zY0(&B|LB-41)>ADnYfW0}dX(<thvqJq@%b zWkIZna+^s5sp|L13iqs06^^$I4T6#U6x^)o-@RbM)kAy&K^!bhsw!gEc;g>#7f<8> zIs_WVa(IW-HSmXG0dDUDoy>jxl~8w(ih6l#oqA_sotf}wA;g1-okp zBiIzhzJl0ohAF&VZfK&bpqC|x^IQss{m~!TXV^h}ZT=HvDU}}QcT>O%7)oA_G`jHg z8-HQ%;R`KXTH=q+vO`((a9n_QGPq8|@$B^H2Zqj<7(3Vbti4)p`qejDOYZ^-$BFcE z6ul~}@b@M)yg1!0*Yy`jNDL2GV@a0p-IQPNk=;C|1UxkiZ@+(SoT?F?)0dD@Xw>wo z9Z+oAZu}*e11e#A`D0AO|MZK=uJdSm_T~)@5%G!lMl%+h$nwvw^V9P3z8t9r#E})n z^?n+lYuj$d)VT>1f`^u~$l1}Z9X47td;WUbtJjBJ(4dxjfP!(*Lmqf%cua3Tc96NFf>} z2#ZYCT$fPBtf~BI;QAbkJ&yHTs%1o)?(p8%)8*#JVcWQSIR8VR@kRC|r>hf!rO#lQ zXZ58uv0~t<17`ASe z-Vt0#--*?#+@zz2(Q#}N%-bc^6ocl9w%zxT7E=&Qt%z?&yu6>U%_7Ro851ksCaZ(D zO`-_8YL?BJy3mk&?CAFnYo; zOtDy@!4{mv8h1>1SSZv6S7J$q`g!a5+v3)YT`~mi!xOLUMTs!2ZBHS%oCRwAA90GpFZ02O0e8OPVrAgX2c1DD@aBBu zW$B~6_6^@_%FeH9BA@!Qy^|!4=;(3@Rk_aE?cM#T(b=f?zi)?XW2|x)J|AF5Y{+Q%4XLvYU1VoJp|LGcm zFRVJ}1NpPom z{g=h@DgD2^pg3^!GF3|5ZH+(W{5x;%>H^REOLxrU-uZ(~;pI1b`tE|Jy|U6I0`JCG zb1B?PmvGC$8CTaA!RMDF4lQ|Z{{ERU+esdt-b(kv$A$T1n3w2DyBtYPgN&r}I1_0m zZgxlCVBsJO6QfL3?YLj5Xtbj;hiep|YHWXWWq^Fxd6oRj;rX;lfy8+G_LI73{Fe(y z=blzk(w>Gzy|F3(H)p%fM>Bcu!@@4HrvGgvq^U^)n82(EC?F`tke{AA(|A$cGWp6- z0xgZ;hb-nI+yur_UZ<21v7xU;RL6H- zAXXgK>95DOf1AlmyZ--KfNyX~_|kK)K0IJ)5=sb(6U z87#GhOExCb&(VExTg}&eM_sxnb4Mc1V~mZ;1oxjscK zzFhW0N4E>zXKq;dhG{dy6$Mx-din*mp63Iy{7P@Lb3bEGPKgpvj!Y-cVE#6ocAJNG z!|cX=vybuC9^gy+Z4aA28V2(TF3je{Avkm)(ByYn4$9348wX$ zs~{&o#hEChlqCdLI5`=C62N>Ivys9*aLU0@9|E0FPGXD}V)1#eF(=GIOmlr%6#FGn zLDZhKihaYx`Ccz8nY%RTFWE}`IfsXau3!5?_SAeT8{rP04I~Q**JM_Zm4|{2W6cv{ zEOXMT0R&?O#RVv+x^J)&-%^V)vt4;9ff3W0cKOyTSTmC}B;V*<_wdKv4L+qs@Fqt2nkjbq1|n0W-nT|fkIy_`NljFEoIed-vQ(4RNcn1A zd*QdN-AD}=j1VBiKJJnbX;@p+#l(aSe!~eB5)t{Bs_)0;zV3>h$zi|09rbO$FiC#f znCN+_kSpl?`L=r)Bz{#!6Ln`Ku9ik8pAOe8Cc(y(=Hy{BHVr!Myu1sc{tV2({2?FP zvj>kfU^4(}_-1=uA_1;&mrF4HvO3>(NV&!%8!0W?bOw^V&K5#7j5KY^ip za0O@KX;RH%O#QMflW_lILR_%E8gb6z z%Vh$=qVG?uNW(YJbG)qjlPj4WpMwlIr-Re;Y)t|4lo4x%_jz75IEt6JK0_)~unYXrhZkStZr#m2AB$Oy3BP>&_)*8_a^U4(Hj3zN ziwMbm@&5|I2Wq@mdCgH2bfJe@SJ=U3e>jtx2`58?Rrb(XbZLlg>O`Tw&_CmI3Tw`n z8XKLC2iKXCYd02|uYVWcAJ{B^-p;7YjPsE>^%yKJxoVAxLNfH4xVWUvbPCOuLDiZ4 zM*UT7;cW|1;)lF9W`t-bose0qu;l=2nGubMj9yEhk%^Z8`{~oCVQwVwaXy>JGmT9l zNV7QN7lxl>_H2fZ-F8fqB_4Ir$GR1Vw2Y%aA*Y(8S~rq#gKPDlgBfPRFSQ{TZ|!R7 zPTd<9f;C{tR~A2zsQ83`b7D0K4F7F1D6XIU&0YT(ecN$!rCf-W=i zwj4Y`Yg$^m(yB_5)REYqCMX8DpYkj~yPA+w_i(H1RR@6!OT`K0aUmSw>guA-PfQ%= z62ZD!@|}%Yp1ytK_UA+L2M{A?X%m+zWtA37QYE!{4%Ff?H_Kae3%o6%gHKo{lY_S+ zHzj;n$r?MZ-Z%C#bE`Q;Ji58&wR_~w|R~;xOw=% zQEbJ=2&|0SED4Lf8P@DhYLnl8LD*5%zvL-6vGHOc7^p2iuBQkQos!)tb^cZzf(xOC zkL4-KX*6}%@*F~okVE03E&1zd#Gph1cPc?|7dLQczuj$|ivd2k1X43jV+>6Y7r>zC z<+KQLjX@7&qy1**dChKszPx3B^;f8)66-EXJLmmvZr&mf&wFa3R$D^j<&mL>vN?0- z$4qmlqkFw9b+Ni{b{o>SOlstZIJ<^A=`uCZ%$t$a}d<~9G1Zx$?VBcfE*wQ z)RhPCeX9V{ouhEESJlY#Syj>P(g;Vc`t+r8VCw)@iGNX+3cx^B*_6N9eU}4pp8s&2 zWmQ%C(LmBVYn=}0G5jkIjwgL1#DPxaOhq`W@3))y0Uv@J2J2-r@XS%hFb#53J3b6h zqA@`Eu|_Am_@y1;_~0;nIhHNb7AHJdv>&TU_BE8skAw?IyPtlC@A4S7O|a<8fqOdzD~K%{Sp_6J@9EM z%YQ3vKgSu1<&KO8sZLnsF{TZa((sh|x-Ncm`8~|8u09_!I>zO?Cmq}N;89`qLzZ-8 zFs!lKU_n@WD*F+y_~Gr`|80p+p#3?5X2*V+q(Tyk4o%4W3wS5Leh?|7y4Nt{VDbZT zs%+xQa_EPwCYz11{Ydl4$CI#5_Mgtj3#rVnEuk$E9dL${S0lV4$frgp4HFnTIUx$a3?VL0G~bagXD(`v3?AlZ7}ZeT>Z|c=n!St zKEW0{6iZvYaLI6{#l4*lT^q+M9c}f2gQE;c5q(@nKJBt@@}=t^Q;a6ndI3smBQN`2 zZc9NuZ@S~975P&tyxvng72XwDC*3G@wn@n>=DA|=tXRS*s69+@-BKn>p7y-(&r?On zgs`7b)bX6%Dm(|jo3AT(6`q~EVK;$!9!6Kvu!1an879uTpD(XgaFE~ryp0XIo#m^C zGGVbZ@q&n%5(PtL$Ju_Vl(O&jBE(e+!biWd@d^{$pzmSeSZ_|;g^8E)n0;xuHjlmc z-K&u>SltJGL=~=fup{JnS;f>GaH6VYT}M7O8M8hehZBPv8`%ugFOOz)fVjSR&1*1o zaEPCrgbNw{^N0A+2mJK(BvlvEk3>o5!D|A(DO*l0}l8!ZA8eqr#}XMtcYwy*@849`8G9u9 zit_T;E5=B=tG<5M>j6eYCwGqni?ues%R4F@vXzpNYQt25zHaY(w+;KtvLd5vUgjA- zLM+zHCOJ94{=*E7=DM+tOy}w>ApZG^WAI_PB-Hb8X7Gm^M+$Ir=>GwUj^-MOK<7|_ zVZR7!$2LA*)t0uGK7g3aNYR3$6i)|@1xCAuUz zW0v$K(XURY*SK%Kw_Xac!rCf%s^k@}qUeg8ltBgNlex?q1{19f{i-O0y3-lt{N9_$ zCBX)5rqF)GbKT!kP~k`<&Fc#5mPhcz|7>-C^RhV+1I`SYV@gUYa-3L2!J*dJ|w%Z0oF7-DKyC7G7G?irIulF^ro(lb|OFeD~OEh#8(X863yP zgXW}m+f^aJ{#l~;tv6sHxo3emHT=alQcjb zm~eSHSu$IH4ktb2L$dT+;9>!oU9CL#s-;W3AHpjVW$0vZDVXcD8rBL+H$uTD)uF&nNu+8prYY3!B!AUrbYRw^ zW#-y0piy2i)|=y{pX(lL@fekerWk4~tRKXm{8Lzm)7e`CIlKQW5CwAeR4F<&aYc?kQQs}*X&+ZG>~CkQob$H5$~~8uy?1VaFr2@f zYuD3;Yt{Be@=WL0|M1Lz4160w)Q|ne3SC{&VZAP?L$~vFgWTMgaoqCUZ%1i%IcvYl zyO#GMlY5fKIw(M^V_|F8`56~a{r7_GE8)vk^4`nI9jp60|Cslt))gc}UT|MvpZMs_ z-Q86I(JO4gmDvv&qBL;)hri#6em79I`7(>}yYc=VR637KIJ))xTh5d?LcaNW=Ke3S zhpd4u^Y0Qun)(C8W|~emad57dwh1Wiu+^gbSJ_}`B|s|W!ZbBY9rg4+GFxD16j7Js zKfa;(G)L$+m|$k=p;Z27!28qS(r=ak4F?MgEAsY|?D%t)7@<1W2+P0%3^2-W2(h}) zN*o<<3MptH4Jn?zjg`922!u8AY@qyMBLQ%l4Qb!8C;kM z=V3tq(o81GX8TT0QDS#o2@}>%{o{3MBfXyYBc@4@VHqJ6J^A{|PN2pMZ6IYa28lkZ zQU*>?fk~RS;r0h--<;jCUv)>xi%L+7@efIZ7>U}5`y&n)@fPWUR{hr>optpC&&f#h z1Z|6{6B)QA?`uYZlSPk1uBn`1h`BHjub=!lu*~oh?mmQQ~yTZGoLa zWL7*Ts8Q=#XHyuZPQ;~HCA#wk{uYg!5JsfWu{U=%oHRIB?Xlj~rH(dTIQllf=?(>t zVEy1~4zXfI_-lf=rPzXFb)`{I0t&2U5XhoPkZ`HsBkXLn6ZGI0%{Z%biUmGFIZkn? zKvu*n-P60D?+3}qD{7Zv-^BJINv|Oeq9^FrMy9|5xhC!Ip5puQuTr)~N#9+Hyv-v^<(B`#QR$#cSmSrcs zkDX*ckl7OMh9wrRJpJ`|!q4j@cU58In%n-@X?VGwDk&-oSy|Dp>bTPeme4;!HAK^f z7hTi38@~Sg)8gUT*}kp4H-6Xi`uX3ZBktgZcW(O9ILG6nvE_xF{qnklm~Z;??4z!6 zO&=V9iHGS_YKMVe3o2O5THd#1ytS6`CL6{;^TM5AzQ3rc(%YDj>n?F1y52wPtup5m z^QzwM+25sYf8YJ>h$PP0pAXBa%$#C56Pf%uBpB#EH{Y48zEfOl$b!q$8*}YK3oXy^ zHC#5F{ZkYr9qtYjq{ia-M$OLXlX(0xw^)dBv>ny-C?8)+Mjr>=(R6&aplGf`eo9cK z-!IHd`n_}byT!Ww{@S*Yn4`19P%0kNE7InC#x*AE2+ z1r<6ii5mL8$&r!pRW18?y<3d>PqV2Gx~cy(m%9lPMi^ZhFfcG&kGn})U4DF94j$6p zVd&t48j}$;u-8$U<&YU5ey-5#$cXdziJV%jcOVD@SO}5W`aTIyPhMYqE_(Xb_quR^ zr$R(VX7PV}xikgHm*4(8DnFS+iTmQib9E zwQ@BKX*SXdI;MDFS$oHtkdaC3~AT{t4J(MHVx7SOW$&ByI znpzsqpxlc!Wc%}@c0efs((_GXQ#H?7eT%A0IGYq2y;~5ZL9Q3z-$#o;cJYK>X#_YM z$6rV_9Hb7M>aBWoEa#FLs_o{jxMiby2*nk_nDBLl<)Pt0rp&T=`G|C1idILM7*o1y zMY1|g*h8%^F7_EXpF7MJxpDl1yBXyW=R_qV*jS@c;iZ3!T9s4(tm=2yWw%{owOeYl z@S{V>%!Ku}>@Aiu9i}X##~KIAJWe9@f`xO_pjnBBKcX6F8IS#!m2io+U4Dmf)_kUgTbKbKoq=d44~g&oo>`lO+tfPC&b z<<0s2at#;Or{n*6`;Qz8V|%UWa6q@tTkmMF;woZkuKg{oY6i~efd~1VRA2S12!WsI zao{+Mu_SS{bfCOZ>Fu%8_5^oQ-g4)ga3N$yYDdglE&w_DXKaXPjC@jsj=P~VZ%Z%sw3ASB?p8Lg^MK$N$ z?Gfi91%0K#7cR;XP(J!eYb=X}j@nqy4t=WW(U69~lQS)OvxP5O-C=gdttxhdU}NZF}oo)?i!m2 zLE|&pEbQ!V(|3cwV=s$NqpF|Y&pIYH)(J>X0?sCJ-Y>tM#Ys`Ww(KT4ChptE_&zrZ zEd0`+A_Q1=!-eC%_v=HUpYc6_gmPJV24&1e*Z;Vg0NVSRJji0B-80L1lIuOBgBI9e zy_E=BD#&67*uwVMShDOtle6F=lHe>gM9m28)V{>`jv>_3;SBGRk@RWeaLD;+Z0!-k zYau5C9c_%;G244Zs)#CICj>P*(B);M4qOqgru{*Qsk0Jgr!bmXK9QD^A#+=~vIa7Nh3B4G3V z4SJijw@5?pB4hGSyhriOzV+Var_V5ud9$xy4sZ7kp3bVHNT3ao<_lWH z7{dzp!lOlwql{L^cgA#!(S)GaR)_Qx6aT(w4`59<`0!C#6iXop6fRlg(hC|uqZG8R zSB9mzQ~w(C6By@#hLe>h6Lu5aZvH@0PnP_LD6AD%Ez(|%%|Wl8S8;&TPVgu=Xe4)% zXP{)EY_ahUG7gu{#8}38mM^bC+|((0`v(dzssH=aENhvKO(8Fun2eM%E$AY>fXz@} zMORUBabSe2xoRx@Zst{Yi7gp~kA=D^P`~|!FYidnlj>r!#@1>Egh1j`k1I~h&?AI! zhg_4P3@?;~OIi+nts3ugWX=W;y^D&0g5jGPB|!|GHk-Q!t73*DDXLh!&n2sAqYyVa zIVlBZnlm&p3D$qv#tw6X2n+wb4kK@hH_`fX*Rb*9?7g=tBA2R&ZOVpdKmD{XtkQo+ z)A5qPi`_T%Z6X!o?JQ;^j^me;y{1zT=BIEq*vZF>ysmM+J)#Yd@pAw`=|_tYO=B|tWNK>K{(5SkBRcw@ z*iIx*(O@7FGYK{h5WG&WtVrA2e_L&`HwTV`fU3mZsDd}{_IME(p_23UMoRH{g@dY;$8kz@j&p$rpogado`})Fa9o8WI2m6X+!s7gIv~v(kY1yfv#0 zK3wn14GTO!JpsEO0RIp6z0)$A%#za8C9FDD26(0bAx}a@1zm#3mlcKD9T+A9#3Xx# zOgQ-X#(;~@q)zJ})D8gUK@6MKxwyChPwoNen?C&GsIZt%k~iiYzfVu294}NB{D<&0 zSnY|E1m4|hqb>dS#^_W%uLxDzfy*JH_svk3{}rmAjs~;6!io&CwE%jce~cD1dt)=4 zIMw1}eqGpLz4kNV===i zEF`9*;QF9cL`fL3kfGZefMD_-O%(f!?X~Y&P7rAp2HnEWR!kd9S-KDe`$4`_(A<2H zlZmXzq_in6VJo4#eStNd%bk5j(}kHvMRgQsDQPEyK%my)?xc*6TK;TD+o=!{z0bsk zQ{k>2TGT0c+fbQl(In`c8;+oG6z$f z@%s{avWTX2hEGoEg3Tf{ZLrYd9|&g&?=%W+%QD^WRfXH-nxbscMa?;I75JLtR!*Qt zhFqmk`7oe*8n27^z0+t}ee*rDHYKPT~39}j*)t(e(oO%<$Y z%Bs{>adic4&v&;K+X%iovI)H4cbwF2amh?f$&#Sf8+70wkhDs(B5&x-&Be?PAz+iV zswapmSP&!IDEkWjuud8o`PneT;ycW9gi%C-X}+%ju~BYmJ_+MHn~fr#F6?MJJGUo4 z*Kav_x=#JoeoHr2#!H4`ekF&GU3jqkecav7@$qxz=0P$Ne`Ijec!z|4>wA!%#ZPr3 z{5(XEN}NazPwTH@FKwVm!ARqmgbp<~Xf>oC>b@iF@^>(JcF;KAHu2_Q8D~uJ1&_J- z*;D`d|FZx!{W3UC@MX>J9o6FjAC%xvn}xR3m9$(qNur8mlcDBKj|B0txSDcRot%h* zK`3wb@t_@S`b6LN`3?``(j0drW8G^Sa`#62EC07=|0&=4Rwb}Qv%uiQ`=jl@`-*ok zCw<}g*?Qa1JJ|Iq5OlJ{2Wwt2iiZz=%y z(U%@sY}N}7b8;MxM`b0D7jO4nImvVywchu3K=SsVx9#zt5Bl*S2f159;7KVoEX)$9 z?tqt#1nPd%|6N}V@AjYdV{lOX?qpd+Mh0Pu@18*aaa5!Eq;|{$kQr$KFFai~6yL5n z@E`UP(1OG(_#UYM6^`!T;{EsRJz!Lv=Z2F%Wl%Vae=^UmIMKsl&aOIZ@+_x= zR}|~atcmJ_1*OrFn>ua)M+Rnu5@<28vT-Qke)~wnNM=~Su*>os;*9-# zaM)XD8LU1Vo1CnGEJgq}!CbW}ZpfX`u)A0xPD2rFgsOSI3C3WGo;BN1v&RZbk% zO2lxI^IUGx-0fgWpL0bncn}pKrCm@5 zU2jTylFJIWno*zgl@o{@6gGS<*J~$!(+n z8f^<*B-06>@_j$}@M7b*Nb(cjrS$lMSN-v}+kL?CCvwRI*J(&`pSY)%3Hr`mlQp); z%3t;-i?O!td(F!goVL)2@Z$NaGqVyFQet*kNY{Fb8 za-G$3`af;s*vYe;M>DG5bPI^=F$nPh;~QZZQq2G)+wmjQ9Ba!_`Af^XMe;*b9B^*TO!@xKBm3LqRu}?l}4gmO&*;4=3MNii+sKzz_1ATTqkS$Mo`Cdl(RJMBWF492#l|@Aq8y z8;937iC2Zd#2J(&97SGv05NgU&30s4ZEY0s->(S6$n3e)#I+b&wMW7jN>Hf6Vbkcs zK_qa6O(pltw;SG*=W*WVU{7gb$h^Ok2V!ZSc6?3a<9s>SuRi?1(aq#?d%!d3U+kdb zdsFPct`e}FN}<>4r76kk#njO0A$q%jfsp4pW&Ps!VAy$`eGV*($A52G06QioW;~rG z4B=~Yz~#=6GvKPZ{`U(2?(Dy`b9i{T6-ih1r*YM8Cm3B`(0T%}B*@vd9u~K6)gQMK zxGfoGxh`lyWB~+1Aoj}W9}`8LAO7ApJ&O8+&lEmEh>2NG+ER|I#?o}zqI|c~!MmPM zeKyZEv2+WHRGheaq8yRqdyVGz>TwHla=^!H%z9J#dR~Fi&|Q5<0WXO|Nl9s$XNkVS za>brpB*udS3n`2ujE0%0Ofn-pi+|BCSCoK8`%y{Mo=Ug1>#0z0c}Xx8RLUniY5`?C zF#+s~jVLHAimD+$*cWyfXz22FkSEc|_6>XYaxT;3dV8G52!cK!uT>QUeZ`&r2qW+G z42z+;6wDS}2Tw1cJ5qC<{KX;fIoXZ}19yxy(>BCfn`hYwSwS zs0Gb0z6bNs3S!qCaYff93qH$t-$fo=bLIJ^&$VW%Opa>4-TMUV)_3imj0dA4p1xi@zp=i{r2x(o~O&3toi*@8tvo zA9}(i22BY6A5GU7Rq6Y+Crp}b+cnvCC)>7dTQk*UPPT1hvTHIY|FT{0(|@h^!}-u! zt<^cF=ic|;*S;{aL6=@hm01s8gF3XOE-fj&o0uW?IohwXyNI zw-s?VA*VTfS@!#MwgYC8;54?V;FGq^H2I1XGKoSlCAcU*f(Nwr30U23>sSY2bI9V@ zPo`9;IruN&XRAj$@IPFVl@20gE>r(5%_olF6TmH*MNG+N4W=AHV+i?VJ(Waw*y&hvF=4ZA- z&Vy7-NhGNN?5WdmQI_~{Q+1t`o44SUO3y6`22sc8E(0L%PE-&`2Mx~CX9Lyd6Jq&1 zK|qG%XBTqe|IqPz{TZ4JOhI4x%Esr4WNxya)?fR3fDdG&?{mif8JqUn_^BxT1Z;sx z?4U@rAO$lQBV|7+t!%S z4*UEV6+}3SMXOdE6wEh9xDH27N}4Lie@1T#slEjsz~0G@)a17+zjHMEzi+!B_Cn29 zRhlT(lrE$U@#FP)y>Kgi>$XLH6?6G4P|U!@f7;$1%F#o&V@$fx8>`~0wMWeTt}<8} zK26Z>8sVGOn#$-Obs+uvayswJnrwo!2Pxk7_W$hq6M4x-|8{-Yxak-b6ei7y+}M*mPsi+fZ*mVY z<%lkw)rhR3%{-cS3Ojs+OX?qkYb7&5M9xXON@3gLHQOB<^i&2L%3(NL6WDt&p0}U1 zW@W{#I5~;_}BasWF zYFFeMslVP()ImVu-M{ni03PY&nEW3*;}}YVhbTUwNq}?RWY2}2tI^`+c-51OU|IK) zMtFtJwHwWN@i5x*eha(;BRmN0W8k*4_ zz{^s?hTl+o=Ve2jCyO#m9%&g!XC=pmpIccmIMX`%Wt>6TOvG=!#zB?kiVBVI_=PIR z7f7i5ZSeM=Mxip1pCYNG`u=@U(~#SSkyLthbu~#gF95?pM8|)d-j9v7Xtm;&d9pXpM!@u;ULzxdujm;Q#U><4B%(mwWUJ!K7Y0q#OJ`6m6>|pEJ_U=u-wg>iHS*!J zCZ>DQj+@2QR0-OMx`AZF+$#xEFsY5d;xVlvy44MPHVE z?y?yfF_?_x%%Q0szM&i+ghPcZ$D!0b| zL`T)JZaN0yP$`BrJ=!XwOLyUVZfWm!&`(=ruh!318U21M= zDb|uH5-uoDSGFi#Bv(h-w0#vhW(_ucAPG`56tE^(eQ{LbC&GQv69Y5PVoo_g@|PYk zn0~6vyngtRtuM|+UR$YPzMTi$xH6|G%I5u{uul(}m=j_L2T}RBS&3J#2v>pV3WOAsg=lCvjJSN$FAPJZL268_Uj`DlbK!sT5yAO z3oN$RO3amcjrv1LhI_34mV>D=5=kWaVP|_C;C$N4cSgB*cyOM5MS2Q1I=y^7SY2LU zm$k64c<%(>gLmqAD(MgEd>EY*q&L)W&2IJ8ZBb{dd2&BAe<9z@iA*$v^LKO_+8DWJB!9+@o z(^ORLRz>LVXiRtgd19q>JZ(8(xrx)_dz*(owmQy*lk%OQrX+Gk)@iXdKYtuhHy=Lf zrl_g>?Q%FUy>nU_>V`DXZ0FtH?l`AaDHQnQKU!&<@<w3`CAUs4(#M4vf`q*8lz^(?we-*8O%h=()MMfp1^W&vS?X3o`L_$z(58{iAa|ohCU*>0pAh&gN&ue3 z8hHfJ9WB4~d4H}QNNwwi{>y+`RZvC6P5Pn%mxQiw7Ihhk&6u#kinOSGNTIC#(7@`o zvhd|;p_g;IrOD~=KrTrKlT-G0^wTD;z~v}h(sjALZdfUiwp3N}HEsTDC{;a&FurxD zh0@PCeV#-G)ScB_$W`VpYnFlv|Wm4sY_<~fRJ*kytvsJTw>jH{8_DXqciHtJp*?DZ+T2AJ_$XpIpT5D)BF!E z&hpJrTiCRTwv{WbTtvMUr%)IKB-LL>*vLRC<{PP|MrSFC7f_?eOj{L7 z1C>-6POdimR16*=tNFzCaX*~n!oRwV1_5w{D{UCP@#$DC#LObcSCpG1!@h%Py&7~lNC+?Hjrf% z6(%qDXPplb30b<#A+8F@K$_e6w29PeH zrG*24o2EcZESt_kku#ArAdaOs2$;pr~8ClqO+C<|lA z>~j+u-Y|R)INyYcew-_Zm_LE3n*}x}VDHL?Xh{-)sPJlWmcdF(@q{Zo;ngq;SK@5t z?u}cPRnOGMqs!1N9ZtY<3!78q?hyFueZLNys(kpZ2e};Ld;NFH-SaeV(|C7gTw=_% z$FuTYRxcX@B96p>3tqgvrx-z3?S+KEWM^+mBVjZfo?2ydSdrFHn4YowmRF)+@r8!0 z52p3X*HGajKX}{FSqi2mLv-993CGGi>!B}I9Uaaea%Yn~alKIYRsK2{&gNj*;{APfFB?KFE zP1jj?FMw8!&bKi?>6c{}⋙A3cD|IlZ_|7?<&Sp6i(LQe)qPp4xzTGcslh4_5&3T zp%^*IN(z>e1^sryQf`_GM3u1D6)KBnly0eEVksy4jfba0RN-yW`L=iN^kK@R(1 zCena}VimU-Rl>$~kt7eDfFv>X@Z}CCnWLn!iTK9+m-VZxmh;-_e+l}+`cr1d1zvdSf1_2I1 zd=AHQ#8p8qE#~%J1(J!1PJ#`Q!T5`upI8Xg;dJ$G&(vmWLBKuKm&6LPQ_kX0Jo)Ug zl?TS@njQl^*dn7EJoIlF_)OJFXy>}YBwu%F`zNwBr+k(OMg;{PHT>^}?)7XIq7$uG z?x&`Y?0BzCh_*{YOR{C0o}cV|Z#uEJy2$0V%1qCoA};j*j!rJ6I$a||t$rRd{-69J zV=yFK$AyWlFXtUrI)}B!M!|2>IMf_^AG$mSU%BsOj28Jb&Hu#dhA!g!I+VkW(rqz=;ukUV;Uj%FHIhW;$3zMOl4&% z*tG+j5=H5&t_#0kwjAT9D-CV;t2Q@wnfyK+z%cRDBO@)%1&sb+rInR?pIGIv;5(2n zk>GW6a0QTMBR4lUU*CbXtqc>_EA=Um7shqj3vm-LoxyJN1qU4-DxKHEJ{yE9=>HnX zRvv{$RqwbXV&8SA4j9oR0^Zl-fYOEvD2&(RNGTo&*_1`5=j&|{6F;crf2XAyW_cZ? zS86qcH%tp;8ZwQ1O8TXxrLVKu3?BQjS^>=W@vbI7jxurQyyL=rFcM`V<8Muj4zLmi z>NEj>bW#GHn+#)D(#^CW(dC{t_eUoFPz>Hfyvd*c6++R|3Dx2+#h0Y@bOQhE$8`5g zzFO7qAlGFm4OUv47G@cG!2}WWQAjUg!iLzgR|>&Y<*}##NrF1l(`rA_DWf6!NqhXU z$x-#CdRGw*k@e})sY(PjMcFV+?&u{FVOSw80d?uY4ptjeg6Rkc)+R2zP%$tGWU<^> zv8ks`LsCs-Sew_x@vIf{eh48|O`2=yokvqOhBFS;OZ}L=#BH$+4kt>J4_BN)B4(g& z>*uvH8Cs9P_h#>saxz<3p?+52n{NEo}el+*zBS@{WbN&#>w1 z{%mK}azp3hty=i=#Ag~!M+w*xY+{XVLEX0D^tJjHR!#)wxJIL=?eXv{g-xx;{5Gk^9GUOTe z**J5xj@VnhOY7q@VbL-s1xbzlu|CVC$Io~0gI-H<`1e;(K)jamPqbk)oJratED2xK z-1aEg&qBL-HH`7Gkm9a1>ysCuRcrh4aJz;fin(ZkcP3nY1NrujROW{JlCG|pSi8)- z#`!~LH|MGuJJ@v!9VT_(K$vqbk+r{YYjLvtSBet)p4jGAAFRtr)gK5wZ@YB2x1Qv7 zGB%tgzgcs54-F=wsPMrtv1f@@di;s!!k-QJ#nY7`qqD}VJ`?$X(6BUsR#00AF9a+G zZ5At6j@{j{IJ4@p^rSLB%aG2t-|f_*J#7I5U4nl{W6*pLQ^MPS9GB1+K1Mhxtu%R|ji22Lza=J7iLYp$>Y;15VpfB`UV7|Cmf1ewzG( z-*=d7Nwt6tgA60&_$3g(S4t+5lq{{@LV@Lt2s;|v|qz()9h%%QZcEq$fI0`NYg#xc8`mXU-989$F>WOZJ% z{!-<7@lbQMcTe;9tGJc&NAP%Ow4xLB5LhP==jf}7p@_r(s`0<8=mY}SztliP_zg|c z0F4any3fwBfrEB~)lOr$J6S$@GqP!z0ZA^q_9=OW6{n%~B=#Bw^>-LZV%)sjSCvds zm;b5@WIv3r7;~CXHyEh&eMq|qc^uP5%(fv5iAE#$w#=O3w<1pwaW4l_TyT7X-iwrI# zeWI8-Cj>8)RuBBp-Jx%?*H&6$+2+G5SW!a^BfY0|Q=0+eIi65B3$@S7|8oIeqLL6e zdj=P&vdt29z4|>9u(o&$k;5IVGeb^TB}8SlgvCT!!BJyHq2z?5|ILYkw@(XN6c-}N ztumE@EaJIYbz?3l67MQp@D)gl^m>J)MsZc*OKA&g>>+2r-zB-;=R;slz59sL2Pcl! z`kkn2XJpi|;?RbT>a&EZX~|n{XwC_TR0g>(Rbu5=CDtM@m=R25<*Wv?lE&4sn0moN z(lg$TGIgcdhd!Of(_mci#mu!~!w9SkcFW-oL|`R=p?7`QzIZlpBc&yx?R zYP$OT#y5?$%_zQgUt^Sul1v{hs#z`xb0ZcuL{=(T@9)X3{)}Ae)|KM+&yU+Bw#Cwg zPHyV5avx&#b=Ui7Hzh&8AK^a6+gfE<=CBi)r9+n@K@Op-X(TkxayX08MA)4c6jnV zX6?w|E?wZiYMF%cmB`V^BgL%q@F4>}-?%ob4iA24nZia1Dl}|0HPtOIlpyA}tkX#y z9j@oXkK77g=2k0JHL)kd6@G|j3r-8K9U^-RU4xWm;?ciIWBrZrWQ;ki7Koo4LO_m5 z!1UI6Gqt;*qF@Fvt;tbg^}Uaa)>+5DxB`QJjZTZbCHK>U$=2RToxW|wc{(p(37n4y8((9mAbPv|}h4UZcTn_td3d)E3! zv`1r>ZjpqBPnxgBRGKDMIeYIoJ#G%gX+(tkeuso~KAYnfZC4#i5JTFopE^FKW~O^+ z#z~>czF*5`44J1w`zzInKF#e5o_gNj`#g8IM#yWSi2If=o0vf~H8lZ5cZ_w%0fbw& z*4Jqb?Y1Mvzk`zANRoB97iuuex6Xj`2R_fi(Sp5o1ZD8%-pzr+Hh|9@BdL1$Pa&{NW{H!jsydb%t%R%Y`bR*3$5VLXlARr&Z-%<2 z$lS)PFh}|z4BjpM$>ZVT^T9BlX~ciWR$$eHa}9~O1DK*@b#laoujS}v?zTc1^ZZs>RNt;q={diJ?_Y5T$`><- z5i@*sLV&?)Jn>4|+om=ans9oqFibi@VVS$7bqT#CmsJkt_!5JPio?Y9_{zv~yR(|g=LZ%$8)fHu=W z-=Et%6vfP@H-FWMW<{z=Ho|I#=4$~yR@Q$c$#UD^)t6!t-C4gReIK34_O~wD0yf)j z-&5(RRraa^;gko$XNJnc{!Y)&g4K05y zv-xRh=nAXCYQu-+eNC3W6&#^mOKccLF7zGEjyn>9!GRU-E!4ItztQLV`T&({o9S(a z#%(KDFO@lkQBhhSELId$)|Z4T3ZH<8knn&2UBzxSOk#o~MipDCb-(4HyK#B$4Ng`* zT1sD5&t;$Z0-D5nIJVSpd8@Q^bN#tdh~~Yxsj?y8PWU?dRtMrMSKzs8R14~&BwA>( z!V?WsA>@HvkjIH&=ixAXuE)R|F^%ASvp)eTavLqFgr5BOpS#qL98nh+R>tl}QXriQ z;01+$rto%LbZ2h8-?u=dxahT{?AVvMKEz2GjpsI#j|_qLq_$rpQ%xMT%)jqf=s;`Y zZ`|(jEN*$COUjmQC%X}JEVye}aWqrlXw>nd5`y{UIATu{S=JMY^0Y_HuCOM7bb3aO zCM;dPkTks3Xsz;gUZmE!QL0e+ZZ8H$ha;d>@{xCQK2G`l^?i(!}a)%qXP z5%{iLf7JL|Elp{dB#uKn{30hzBu~g#rCEDADW`v#gmK)h+Q8@M9Q@ckRGSHST85Xz z|F|-909JBde+d6N>jIVP)1(v#3;rFxujTLLh-UF#oDd}$p61~Oi}ni+r7A^K*1rLE zlJ#TuPeqGYGFy;PAT*(8Ai&<@U+MhcnI!#jxpS~Dqbw>!SIESaT)gV8gn29dR99hU zto^h$v+UmwMC^58EJ{2tT1ChfbvI-lsAjlb*cbC=l4x%YE`%T&>qzpVQ4Jm2cz8Oj z7(6{YsieQ{7eqFTM<4u=+tO=2Dk`5!!K6g#1@~U6+`ap*vr<}bo8o;@RlLq?W-+qN z%OSgk0eEQFe=YbIj;xxLtfZ|Jivu^exFE8|BqbYbQh=XYSutW>FM8l}P-_g+kk1}Y z#vcm>2#xo!hT?3`^Xb?f_w+zg zT&f~kb{XIKZPGAmV7}6c$TTGHn6MsMO4AjxfpCKpvVMoK3{zk*Nl6Q*pBU3Db^I-Y z?Y}e?w8um~@_qSMt{-lqB@2N9=ZV1(Qc!^q6}Rc$2({n(T38WAg~~qxAKq5w9!=He z9I@g!Mf8V?Jv4y9g+?A+p*>WgaBokQOg9J*&QN-VXeVZ0?ZNU)ZE`QNBN*ntem^UX zJl5uxoLmn-Ju?-451w=cJ=dz&Kx@`oQ8e@Efj{@rp%B>tld-QFb8XW3jlEh;F|!or z#@AsHRh!qhV>col_(t?Pm z%@;VnK+_;!G4O&4Kx=m3q*!gf_+n2_07-{Cs)t70q`u z!TR}n>fy9q?oHOvA00pvj8=xImV@&29f2zJf`?cA)h@7xTK`;eOq&lDyU~$Rt{GTR ztmgbtvF029JK`W4zJZ#=X&yJwKU+NkWEcWuiMhEY}YQc`tZ}X87Vt`82)5R*h#+OER3WJz1@$)$0 z$*^?Dj!kfLf%qtI)`(bFO?^Vf{aN{*=6m#Jb8fvKPl+-12Y9W39(fDmo|=X%bbE^T zqOhjs7nZ(f(D@m|1Hs>ZeX8(uH}}xd;qYq=*6J!NeY1vxD|CmAwbWm|h)^M)GBJQJ zV4=WK1>Aj)dnk|+0gEw@@G~$20wM*@+Q2`dO@V6oD)e^H|QxV z?`+2`(2)phlZO@Sov*SsLyCntu`VMH{9IrBusiuD>gEUzb$t-xy%>-HfHB?K($tz`Sf4t~MVZNzWFua9Jj# zi08aMBGsmt8QJWwxN2eoiR*$;HXBp&-N*ks0ca8p*TB{-xy+t26Q4 z>WF?*?I7Jam|LF}&tF1}jO(UT!626t#KKVI?fHPuW#Bzpz!et!w|ZF}5lvjUVj!1v z^5^B^W<400(8(B^Fl1j+pukn&pzRX3P5b8JF7rtyKjO{A3GhZp$E5&)j&1}wjS#Nz zB^P_H1F?RA<^|f!_bQTXVeR@eHE6!WA1U~cm9SbhS_PkMF@Hr_@FM*h*Y_n9LZ2mp zaa7szpPSl9N+lW-f(sK#f$i|i)X38i2)17)WDZws#+WG-IkXULRicx`O9Lyhf*!>rSk6umhs*$WHL1;KwtFa_m)dF-0jO%+Iyy5>CybF3(_a# zO<+8uRj<*PW5X?KY)k?K53jB?W>`!M#4N~uXxPLCV?00ZzQf)V;tapQhWFTC>_oq$ zI4u{#>397%WAyMgZ^3z)MK*kuoZi&2u$T}xy8MHw0@vH)Y#WaG@EgYSt zyD!GdH$ZM8VdG8eot`{r*kHp%T_5gI5FxQS zy-3xWK;n`Fzi0 z36e7Ay|^hgc|!Xf!S7`4{$y=6Xk$ZCbL2hLt_lpRaA%n5WimNja8Ng`BTN#%v{G^v zGGq_|jjXu7KMqN4At{@~?lv+3#1(6#rJ0T$j@QpVm)pluFi2+&Q%vSsb1pnYD%KB% zyp7Eei@c{QPf|4sewHE(vKrH^!5zn(F~`l#TXcGnqBruA5)0qyf~w@>CM(?W8o)*+ zLFjQ7zfWWqdAzO+{(-6VNa#GO9;>d~^=g-WdcM7kQqcMqC<^n~%_Z}b*%^PNnESS}z*SOI$7Dso%=|6? zjO91TB<=ci$_|13U_AY?u*QFfkIpj2w}j4aszHV5_j4Dkc^bvgQ5+tBsl^6nW#3hC z*yJ~;mDRQRBTC?28pF`K}gYn^T>L{6WuUv<~*^6q!oG$uJ z?~Wd8c^b`Y`Ea_A6+D3M71!8!7hqAdbrdhy@xv2+mXL8PG zuQ)`7DsF-e^(p861YH4IEE!|xC3rJYdit@NDHO^SnMCwQTalD<#`tdW(d-k~An*?k zb7(jvo-n|YFn!}=MNSAjVUpe_XAEy~H5%@HxO2SXS(bi0p2CqMNT`gnv;(Y1=re5l z+O>UV*RxhxtJtBCl>Ei^co@QyqRY#Q3-iGT*qm5!o)ciTGju>N$^E?`hzo4i*ggjCmu5W!$$Y!EJXBM8cOkMMzc$#VGP#F!C@8zIH zi+ktB?2ECr*1XNyZV{f2Nh*^Zmcyt3FCrm^IZ-%KvQ z5=yL1v+kM@x2Wm)&WKVZ1q%8Oxg(-ukh6b1mkh_44_4jphM$qemL4rB)QXD#kxj=J z9PD%+oJ3)8P4?220_SIFThvz7leBuUrXo_vw-(un|0!lvv+UV4a8@GR)l z21$MP$Lb{q5grl>Rg_M5sd%0ZgcTP9h3tXBOiqd`YD)i$tL{x_{2D}6)g;Maja+=J z_NTCcIu9_hWsCMV7O~bL|BaA#u-vE2JHvV|-Kp-GyYo{hZmseO`*(qn$<^KlA&|t)~9JpORsZt50_Lyo_Q@)U7W;`t&x3 zVwxn?ulB!HrmRfnAQJ&p#{SU>u$NZqRvp}86qxnhwwf=#%G`PlKR>tE_uToq>Gz!S*;hSWBIN@0PDVK-gyET@BTSp#Y{2;_|yL3oc^gqEw|OWVsv$a!@&1) zgXOZkTFmu+^1bslbrtL?THMzkIZBM0k+Gz%&MA-)%o744kxHSsurO4uLOp&xXpju;_}P z&lwd#Z6^Lf`=3`@8cgp3gZWgBScm?8m>|zN+z2fw|A+}*7fjlQr)iuct4OVbx>Gu5 zBgphn{X1Djc`p;__D)GzO{$(Qj7=7Bh_<|}us}_Rms>l54HaQy=a`+J|2c;%BYoO8 z)TloIld8+7!VO7K$EF+oZK!ki7cUboYYCIA^GI zP7GQqN!D<}kx*oel?HRHSlMdpK_d5xLh5P%S-H}uykoPTx&v)DW!x4x~Xr@5Sj(cH62PCc61&T?Xs zP>o~Lj_lJhcjQ?nfKcxYSh45HYFdgK!w4PARg)WOQu0t)O{kqczO(D!rTsNvPqIl> z&SjH#fG)m_j$jAR!w5$<-P95ve!+`Xz`1@Dqm{B6qBMp&(rZjxt%gh~0P(jc)r%!W zxu?i|+}OI6=AYWAYcK|-$k$v`Q)x~399q^GOWG*@khXHpwX45QcH`@^Wv%ClhSA|t z`X&iSn_S#E7&w{vwDB4PNf34%ID3XHzZ&iMHCZAMZeHZPkd`VUHWo33{t7kb)BJ+u z=A!FC|8o@z_+|hCh`mjp3p0R&LDas16mn)Q-{wOze4#SH?4!ZlP#qd8mg0lyu(Q*G zcRiPG&{dapu=y^X(OAWG5wwrbk{A7u`TS*hF8&{M!0E43{f*^uf@ufit9HbNVUl0} z*b_2FOXix-%?+23O#c9)r8cybsg@ z8;T|bnft#b!R!us&d2hQ4wChh|9juMjrUf*c^m)NSw}v;+^*1gqAiA!gCmg4+X3|P zDhm9`!0T>)S?`mM&E4OQfVkD&8FDlI!x)_}j!`Fm-ymT5sg2ysR(Dc{K@ltCT3ozIpx~-W)RM>IG{%LKC%Rc(NGTHhGL{ZH;o)*mvGw7+v(fQ%xTBPy zPNiW16_~MbWS(qeooZx!&GH+#XnIy-^P&;!qf4ktA>DuRv?SLSlBQWKWy@;yQl@~o zJr}W{jc}v}Z5+*3uGI$hJ#@_B=3yMmX2cf^9sVLkhMQg5kXyt7!Ml368mCig4Ue{1 zz>tV`s{sE3b<@hqUHF(6wGN#(vQE#_;9ce>%Jj+nrfgF!=l4x$g|#%d1+kT7@qVY; zu=|2ogsq6;S^;b51Uy!l)k`UMMlVPPsZJvuVX390jJnL%ew(L=&Mqr$l_1 z2tkOaHL|lO8vyW_rIO(I%&swT$H*w3@l!9F|2FVt?ft%{tuDu5-@}_v^k3;V9lM2h zf0M>UIsN6nSpC!eRnsO9C7iJe6&xSSj@MEUL6&-dG#PwRNZ~h$gUg{%;Qn}$>~sMo zDje%3g7?}L#SbSs$RB61Nmc_aB*}NH^<_?T} zVFL20K2t%?9pA6_$F;hBpBU_HJo4B-*C7hsOZ5Y0gkB|1BaNwx%{Oza{vp@l)od+% zT{~!2WYF2X>CJM2Mf-0*1=0z8ePy$3op0RCc(Xosi4d{`{WAUpchGvYZho~8Z`-bX zx9Eg;xS(oMc)nI--9D*iAh>*Rk__WIFZFlX+5NS_pLh(+hdLth_VmE&K>*9r(m6`} zYYK(tTlZuuGo@Pc8^QPiW~z{oqW+?w-8e_YDsG74jF0E3j3tM?d#&B%;MGB(8JM=V zUWPV0+HmGzJ_HdL0raMUg^D&QwCXMT)sqOIkNsRBHQNE4jR*Mj4~36gz-m~qNqep;i2AE;0tEp>;s`t)Z)*^IPp2%6 z5;R2%7^(ir7rL&&QFE5V6q$0&K9lN%9cRqixIQq(2^xR)b~J_zeF*l1kd>5zB17}Y z;jWnG>N`tKt7g;bc@oWJY2`F@cu#zIq|8~_IuIwnYSH8Vid(VHF!dNvpiCUC_nJ2k zCnMgF#jHZN>+&mHs;0uOoeA7+HD$qJ>1NaV;#MH3q^=icvPNB`sFk_7slU3)8~!-@ zg<1n1a7`acdzr*$m!)H0jKE$;47_ylhT}=040d&)J7e^B92xX`;HBZKKUHQBI5*fh z+mNiu`j8xdGDHJAGN5|+kH`NwQW7~5gw3iR4iiCwel1Y<_LY6F$Rxzf@pcH$^EWmpyC1gyZE_yCl$z{PGAv72Uh&xTdl1zG>P>30d%5F)S4Ze2NoY%Q-b~nZ)7yk_$z}sgp~)EE5g~n9Dl@9-D@9I(U!s<7MCl1{m9)4;4^e|86M?% z@i=*-ag8qDc_Kc#8-me#j$+z7Z|qYNr>%?H$B5IF@mV?9Z1H|Rp4PdYsDGM3JYMZa zWC_|V(ql5{rcoIJ_d1O~aOczlF(-&PRRrsQokDxR{w}9ZoXVD2S)Tox4EDpO+9yzw z&?n1v28AMZzD!(l9 z`L0saFD+DJ8uYRnY_b6E0^?XDr(JX;!#)-Zw$o`TNa|-ou&$`U;dX{xYhK#dNk064E&!6QuqO?7 z$WCMu4lKeQ^9YT$JHM{GqS?Lt)s&j+@i$j%^zTjI$)(HO3x4lH#&U zqLUh15mW8;#}8yPWF!}z?8VuSV>xoTaKx;A3fsMm>ii?Uv75&-i5I2Ww7U;;iX+AqFgaJ@B;ItcslCw%n>bW`|L+4b$;2kfSw<3)Py` zs+^F44`w`Mn(PYM>n^Jkl&0-j|uR+XTj&+%w7 zCiibLdbUz`o((i=EuFRy%*p9Bufr#!ttiLUx%k|2h@fdGeh0`Wbi6Z1lN;i>x|R+5mGPu4MK_Z33pVp38PytccQO@t;3x>LM#U-=|& z=VbM{ezMHn2&moxkLQ#Q>{=U1*!rj!e^Jsyu~@ZfjjdR|vapU>)J(1FKiR!^{AxyS zQij_!T^%aCE#2`<#!8d1Mytqc@+Q_HMHLM>K0-=TKX!%1y5rNaT5mbDpZflp2$L6N zV{V2r9syy!Fqz4H*zZYt(lQTth_X7H<}s@96qi$0uu z)GM=aiUJBGU(xQjcAKfNN7M6~?{)>-pTl$i$ zjG;z)OQ&}n;28DJCb=WXY>2}@*eFuy7NmImu@cipe^{w2uhDbkC?)U{is3g?)O51O zigzS<03^*!^|#{VVOJZlpa5l(6uhOI`GTbDzvAIRDd6x?;Gx(2*+1U?dB?Q~V$JNjaARQGqYXE9<)d(cUzqT+$Vx7 zkh~RbMcAy)m=ll)ZrT~AqV)8xR-_6}8jsEFU%n#ToGd}MB$xKW0p)@;k!Y6bykGWTBK z2xkgIL(RqxQnX)Jb$(Nm+f4o8WO^Cm z=~4170g{T%VmQ5e1>fHn*~3%hUXw&7PGc`+e9(4MxGzrLoh2Hrm=1`z9#4ume`iGd^|2bO~JO6L0^YA-+*OGQ4#i=7OH4y{#)c%1Mz%kts^P2 z`ird#F_|FhC?@ZF2JBsHkH$8N*O{NA&c0S z8Okdl{;r2en_Xr!|7-qgT8fGM1380>upl3w3{@h9()VUtmXLrY9vDq{`D>Mm#mLc) zT%nq!R+O_vRydx%$ILA6B?iydI^^5(8uIRS@nwDw=~uF`2}1>Uz-w;Ey{3H?59_0* zkiw?yzxu*ROxU8tA7jXL&*w)=fX7hsw9ycB`rlIL+R}HI01m4qBn>6D;9o@T?HHq> z7m{h?HoB?8-C;nL_vssa*yQ}QAW5K*5%}*u+7Ob=^W#yo{Zg*-0lK+jvGug=|7beL z?#Q~Xjdlke+qRvKZQHhOn;qM>la6iMwmY^_Z{1@&?}zgPYSh{LthM*G=Jei0$#hre zmZ{uztk)x^A2<21gIL6pRd?S-89b*RPXTDd_ia4Uhx?a?@&j0>*UKm%L&0`A>q5R> zpb)g|m7~Hh-b?#YMn0}I8?Sp?j^2Cmfi3qm>#76r`JtezI}Jn~Ol>p^lUl>x1@!1( zdSq#x?aWEMCG({r(cm866XcGq?{>$u#Ii_P%PcAsSxXIpo70o(Y3b>xSx<)@<1pf; z{rO{%?_&zy5tmFgqzkGk+%P}c==Nj`rS&J7+3dSK!cTkfD%HWIn>{7PcH8C%X2u9w&jrce$=O>#Aas#7r=o zI12b+pie^m^9Pwt?OY0K7Miz;NP?otz12uQVtar;)-@ks z%&(6!_1R^6j;J2Jm|q(z9I?8B^J8w_+oce8#jkHdbue)Dtq8gkXOzQ>b-n$9y4}Jv z1apP9BjkhXMeo15zH8q;F0JF=Rp`GaGv1|2eo_0281RusmKcMCh~V@v#6tHVV9{Db zM%W}m8l#-NlOCGky;e3n%v9OplxyXQcXh*(ks4AlB4KI~h7KWvMBHGQTEzk9pANT&xteu;dGocd+c2v6eLUK$9T}yFa7G{S55;O;*Sfcs{*%WK+Bn!V~() zBa};?+K7~UkH$lkN4n&h7k{U~lKBe{nTrNRqev(;zStc-elMJC)89oSU0_V1J{)aTxvkKR{xdjuX`S zB}7#rr)wQoY?eBVfc=iCuXb2g?xu)yocz5c(d$V83a95R(-H3QvV6_qPKoSb?afT1 z`{)|^Hto&(-8y%O1Xc9<6J#cPO!#G~EY0@hO%L(M`ps_YmaR9zg_UC0bNcjqD-TyD zs{Wg6_QH7&pZ-Vbq%iyOTE|GQo=legea1sk^6GV4#)pGO@BDG3wU@^O9R!iVxk=J* zd0B_Op6~7jj9Ke4_L>A_t4dh(DFnv}D97Ru_T7f|&sHkn6!7ht^yYy+!*Tm_DJl+I z`%qzGyECx9P9a74*oNVIR*B{RY)^yB(y62&gTV-SyT=0J(O~s7jhqMRDt<=D)2MOj zc!{#>e<&q_qQm!$g8q}Fn)$G!@bBnxQsDe#WiNeQmHuWzfr2>~`?%X}G{59XQ)6!o z#KOL}IQe0L${y_+QeV?&S=zr6{C z+WO%WbEQim&KQK`vz74E?yVe$3Dv3+4t|G!z}!fA_!bUL4J2 z(PVH=7qZuQ-qzEK6Cf3|jO>jGllTD4bwBUiQ%smMC;hg+?Egg|eNq6wx%IXR_lXg{oD>0!9a4!S~vBM#miZK&fU z5o9tt%VXCtxFY3t{I|T<{CAE*kqIf*DkX&T!h1g`AzrD6X;YYEbm*GuTfmoho{{Y_ZW z?hwo9$`7-@F4m6|&Cez{bUcPgd;I3WW;!3}s8NXQxUJb^C%Y$-ZeV3uzQ3Nt-kq5- zaJeFOKIQN`ANbf~N6^$49-kuuTJP{)TJ3qRbog%!tk<;a-1S{Ok4|u1mEm%G*=IA- zhJIlNzqnbQmtxZLu!XSf5%f;q4;pv8ZPOh49Upy&Xm=Xzl4Nndk5TrvwZWFK%=X$m zyl1&3B)8w})9Ulk^?!O2?dTple7|sM0-HPFM_*34@gNt1d8@~XwWIeq>y7^nf$bxaKeD({5PnDLX&5RkQg*z~fNJ2JwwAVi<|vQAz{eTBc6P5` zy4aYU#Nsyl_xm`y&h7RQl=YIy{?*lX{oHAHFylpbqU)=6@BkyMXQj7uWB+*7#_u&J zkZj8sc&EK=t^410IZS3+?1hHI?ych|i?9pO#6SSlWMV0chv)&Q()-@}cmJ#Ykv_E@ zR_RoIt_I-I@z+Jn(+cgH`q_Jx2Hs8|xBF!CtQ2*Z-G@;JD2xUK#}_s8;vTkOI7_d4 zQXDiK&Jd(I9d;!YiQmUiID0-0=@+nMX{kBRUNOsZF(LNur6<}BGVx=1OHx+Y00TaI zJ%+J-1M-^hi%%)pzJ3rzrEKvskn}y}$u@GvnB45Jxc$8Zz`?eo|E#KaUqF@yd|&-2 zzO=D1$$wMr4U_c7KnBjz%1VRdp%{JF?EulLsz)Y6ya#2r0ppnmejQI+a*1_TMIL+Z z`CUrL0g}ulkas`B=fyrW|2;Sx`vk{Qv-2mXQL^>9;p|DaTBjq|gIqoaiAd|VdLG~6 zEUm|4yUs^4AE+@j5PE8}rlwfw?(PxYzPk>Sb(PlN>eIex*-8H+5?vIVfn({{2}MLE z1gUhT+0wHmvL21B!yeVbvmsnnF(IEtU=@kGh;uH}^ZGLE(z(OPhfhGKv)VuD*&tl( zKFjvi&Y6{@zmUsC*vzD_M@|x)m{D97&#lWbA15&{$ccjevV9UfF%t8(9r$tO`?*-Y zU8YVZkI>y#xnq4*j0mCoi3>{#(sYV2H7}A(UU;i2U-~mF@b9~*;|m2fq6k?CC;&c$ zkcN)h(jfWMGK z<&w^7Tf!ro;ucxhxa1+QTZ5CE0O^bW&bv~&-7Ltfuet868K{N$8VE=~`DO@DFAXm; z{&fw3IOL1*{dvO~C_iI?iss=$K_W77z-1HKm0`LZP1F46@nNf=7t4N42TY8QY$B!Eaii3&f*_eT=CN%IdkNX>8M-sv$r`F%Yb5Gl z*M7Af-+tR!Gf)9=Sz52FQ8ev`r4O2Iv-F684wlg(zGS7$ny!Pp4mLPg(6;P!=fD#h z2p^{tASV^iDMN#H#WTYRhG}~rLzRvi%r9^=)8x7&(j>{-?cah z5~jF|>FpT?o%C6;){@P>!R7PRP&&z7#rfF4VSXJvbLM<`HsxL=qya&}xE8m%&{@#6 zXRE%q`#NpTsGH&~ce&Z`aOj^WLdV4`tP#AM(hY`KaYkrJ_g2{L^O!;nc6Pfec8wCB ze#K*G-a()3PA5rQ-Ewgiy+h@+=j}k8W zI^*ek)JK7Efg;`WT{?|Ge|E6nyL=lV{ITIUm7s`?4FS`SK{w<0d1m{0UuHU-JhShx zJBY>StKzcumPDTJ^UUE-(CgrojiERG@K2f3Ee{7+cf3vRE@Xd&_RK{9D?3X&MO??R z=Oiw`n*#di{MLs-7@7UrR1S(!|K|(2SFQ(_xNNfsm4}aFEHE$>3s9Ll_1=Z3tRg+l z=JX**N&R#14f=WHU6OqpswVes#4U}n+K{v84@N*N7VY<6CH1+fs7v;?nOE7;IYr>d zeG3(63Z>`W(elcNjkM+Y(C3={a?Gc6`kWQ!uLZ39{64ppfKNdRXEQLcx1-8yu<=Z9 zK=S(U7C7eZ1jKZ}XYOoXq$%wy(=J#b+$O}dl4J3tbLoO-Ayq88xdZiRVOL5OEX@N3)kpM`iw|hY0f#dE_K#hPqXUhDkG(OkQ>TW3%tD5 z`gioKs*)2E#+W6Fv?L;(T81Ue+pE3Hf7gASmPZV3Kkf#d>uQaqgW;66<0%n356j|m z7`PiB?JkLtqYk*})q0DOv4)U(?IC?wqi!`EH-$g!CrSb9IWsO4h?S15RMhB+$@y-# zr4k5!G=d>A#aJMNBADcap9=^?h(bz8_q^sIhJ?lbv?)+$IDKJsyUxS+ycY3%njCxc zz6o0jfgr=dM%Ws8pfNxG!b*q`nGlP_;~Y_s9U*ac<|R1l$0WgH{gL1xO#gKAmz+JB zrpVhHu7NAI!TC8P8|7R!W3rQ65kP*}ev}eLMG7@|KN)s_kz#NfNd^7cTB!*A*B$Iq&1$X0(k`*4Ka4tLvbrGasG2Y~IBaDn&#ss!BQuwEe`% zmr)`z(3#PR(xMaaNRl}_&2(2QYqjA!{v|zl-)J~CceX&GHO}!`Zo$Qr=j!z$1i}|s zEYL&XcH_)X^a!dMD^slQJR*V%l?Gg^ggN(kf==pp)M}KH!uJ0wD!seTk-WF18VKe4 z_`z}0_22<~LD#xGN8y&-(KSa0-Ov;#4UANy=SvK8b+`4h0aKN3Gu$2n@HH19+v11R zzzqnqXUkG!iq8xcNB@iLtX3YxMz_xYc8mATAJ@UC&E`~{4O2SLg|aRsIquy69KM7s zQKjyn!rU1b=-n6(?U{wV_ncPvensHPJYG}Qy4x5|LfL0c@z=sZ+X*2 zF_@jP@&ou2YzOhLz1P%dw;ng4<@o$Q!WLtTJRd7?d)EbtE1G5N+xv~rNqb|i@bFLl zs)8AESHvfHdMHPu>NZ4`PCjp3nf+TGn92(SYGm=H22*SBYaxs;+%9?EzX-h7H~t~P z4}NYBZ25R&#PMVtr(U>qsayv4G46%$Qkm8XXL*>X3|60!SY-gf#3VA1{yWdX><6$b zNCAU(joYSLT3VRQ!^YZ=4-1F_5oJEJ2yl{A708B{gjf+gXdRg@1Z3aP|>e?N!FuHYEoz8Ix{d=5D2%A+aiWnI*kQbVFXJJCq!KOH*CZ4&$Re*L z0@cs$@oF0shUJRp;)s5_q8wDvH1cr-!AVB2gzR|HMlTEMOsv zJxtRA_f2D!;Tk}$2BfzUR);_jp)dg?}rKEkv^E+ZScXK_z;qR+i(|GuOAM^n0m4oujLXrlM@> z>IoJol7x|MTuPqB8 zizsU>Z?1m7+escvipeA*C8^kbm`VbP(YUR>O9DH1LB1Xg5}>8H9$?cntp~@AvevrS z-E25JFN=oJFPtq`cFI04@pcWCF=#>3*L3~R2wxvdi?uUge9c!bn`S>Y9dEyp7`@$Zn(59VuP+Z$BwqJe*Ybd^985+01Ay zZ~CDpd#_$pv-G+?h4VKZyawifElrduuk~u@RQmG{-cpiMwucxEyWZ0du#x!AELfd`T2 zY+D#&h1Fq!e+9q*{6qEqkXHHHNt*Sg5MMsWH2LK`EmS%q-_(+sHi)WR1U&)+^J0x8 z1IfTr<-ZJw!)PfGg%~x%u!2SPtZ`X9s&q-3dK zQn2Uu(9)QX^2!^0Lxf7h0wkdZ-$9=1yr;2xqMB21;=*VV^ksTmPYo*C*g;R7-={GO zy$fX^&_xNhzpN+7O(kqf%IC40C;^oiy| zkDe8x^O2zbfIkOI;X6yUXUj~?^| zOstoV`;H-gAB2r7wgp1cw8Dw#K{FnIpz^r7ESL6^dc&GtW?YV*9U85qX2YKEtiK=g z*K9{pcHA7q=(N3BN-rp+m%`!tGymKxTR~LA17I%$)Z0rGEtyn`#AL zN*GgJB^7+}op*)b+53kK8vd6gasa~24?Q;lSQtVU`Obehivoz?gim7W_OG3v`<_^; zGQBxJ&(qeH5=wfQv8$7a->8CjL7(tz_m!;lVoXI`a<5p2m4vhI(NgU>U_##lw3=$0X)LbB;&TJhp89T zZ)Y#ko{!_W4Be@x$qdboBUFxdZ4L76pBEQOTMp6;WRl~G;o`63FJWr9H(Z+sBUNE9 zA{7;E9&h7Xdj5-M^9Q)IpER>UgPE@nH#D42Lv8-++krH`Jml;Cd5pl@!Eh4z2>6R* zr9NK-^S4LEO$rTQet2NkUq@_bh1Pp=zmxyW1bEUp!^7IMJ=;yt)i87tbNpT7q*_9o z8fF_ch!Bg)V7OS8-bT;TOgVCuzfsCxD#si(G6-%{#kYa3C-8bbbjBBi@F$^v=)cno z1aSA=yzh_gmooQ;A0NFS!b9&q)dnDk{O4kqKb-njY$@1SSbVw*3igFpFLS#bu91o$ zzk*s&g)sdj6V}WK8A1SHdUFiuY;D3wUzhrW$U4b3F1 z$=idtNTlQ_oj`+@NPh(>?2?X^29U4@&`gVgbE~+N{S4c&_#8b z0>65(M0dqQDafo-1~vRGXr_?l;j8saGBr~X(p#71twdclk1G$en3*C>nMs|f#-D$moMzL?y}7;zs)!+ zV3a}fj=-%~#IQS!jMqlJZ)uLR1BKo`^h zY%lKT&wYRL2gI_4k(dTCs88mH#Reop#p3)1si$0keLEHeXP+B@R6R@+=w~bO^(B)P zl90LTs~+d#u~upNU@lbv@p9x^vDr=_f` zINb(?LY1R?Kh_z?(D~kOYF#>=%kmZ&s-NxN$aNYZt-Y%w>ZgmbUyGZO9cAl1)GP=R zVVh||_vv9?;wV%q|NdlMx?-h39UlcC0f8lj1m`;=gQ<{Z=9mVz2t^H&;1CkRPCj*( zu#Bgqc`!095vzbOT@bN8c8{Z^%p|1#EO#yzzzHmiM+H*tNN|lRZIfu}h$^eN+_qJ7 z+x9|qYnky5lT{JAq-0Ie3TZyV6VLAf&e&V#8>Tn2V)D3UX2pxeoeL(;p2YQ-zhn81 zLMOH<{HttjKZ?wF)N<1~V-)m=lEqB!DjX}PRPlEra>rrgtWu|!ui(R;W4Ps{W{ zOr_`=I^(-Regc6h-oGbaRL!tG>` z|9w*4?P~9L3NW8r(^j3_fS1m1LAHM+-4|4_((B<0k=J!{EVzi%`5-}5E)^1KDN`gh z;9{=3@OA~{RD>RS*cxL@;wW)9#SI$OEt1WCeQR~FZJ%@9zN0+zj%K6q@@1}hmISlp zy9EhefdyxHYiG07=d9wlYQCQJ>!>ye?W{LQ>i)fYRQLlLVBVU;=T}|lzH!AVp&SDm+ zScm-P#XLLvuP-2gmV1}^3;}#Oo)Pf-Kk@Ewh77t7>YlD-t}Pq`Gd5l>apN_H;zE&vg=0MTqw|KTR)t=XD1tbMn~#6G zr0r*ro7JyGFtCS@ZPJxC{Oz#fbr!~EGoMcV>*Y#ZujWF%uy~>P1^f%%ET)CRt-qhD z7|A%`wT6(8S2UKz3z&kDv*@#C%`?jIn=8w(QA(u7M*@=WCFm;cdr+XjvZd_nYnhuS zb%C$lNMjgpyaJ`T? zTPk+S2$&__1V%BAz&|2Lr8ml;`BCEv`Ldvesr>rbJqN?7vW%gDI9`M+@R13r zrwnjVQOh)XkJ*2FuKboFg0h9Ky$y8&KQX3O0v+py)HBipnq;Ol?rY8{e5~jzP)+Xl z)+|vA9z(PKa={K?jtz%?IvCP^v^Sqi3gIYT@huB)jl zT;$=dbf0YvBdlz(l4AZaIZh-?E~%>PDQ;ZgAGEk!V`J;~5N(_BqmE$yc3Y8gv4c)yzVEJRQ>q-362jTBUZD;Lk5AYVI`(-DKOga^) z%zN)yX(!RxO*ND@j~z5qa~z$7`+>_<6nXmYIRy(Y3_Y`EPMgNp^d8J^^hnP%ao!`i zTFU*y{Y&ZP)4Oi`+VLF0=!w9j*-h_o15wtG5i0nUX^f+#;WOA1;_CC+B*BjNs+dDv zXLFGE#hhb*Es%8XyqR8^;ss7~(6E2kzUIK${B3Az5dl_qs_VN{mXz47;}dw}ftF&L zg7)pDy}>iG^j??N-F#Sh>wvlCH;cmOEE7G8`>>y&1Asqz$jtk0$m%`~&)`e!c_bKw zr1~9%6ul=LXxeuaaWaE8{f$A0{Kk=lm*6#W^$lf)+wwIkLIBZJqdN**$+9i9(xSu( zc+NyyP#m$rjFFs!-y$XBrVB3XnvrLmf*JB+7EVfg5`oCbbS_MxCHby@lZh(`FD-d$ z9GV7{@l!8e6NdI^oS-*V_&h;TNm8O7B0;A?1cUw6J3)g<;6i?Fq~;($I=Bx5Hd!Bx9?rl}lql3FIgp>!UK>+aZLp|33AqWMdT3-7 zgRMJW+bQ2#lrUyLO29n*clW$I|7@pB^y2-=<>a@_hAr-sRrRHnRsF$Dt$A>jlrYZu zM#>70)8TKQv+VWm2u@ZE>%p(-b8)q+r)%d)V>9bG#iGw-sv2KnF$`GW4{6h10tkMq zH#}5bt6x*`Uxeg=R6Z$DY_cXSLDjUTshI`Z*jYI0e4npdOuUwf?K}g@7B%Bgc{Gaw z1*nE}pU!3Z4UIm(4e7|TLPlC-LNc~@t*+O0Hy0u&)(QKXXuXPoLdby->j}}#No@q3 z`}@Rm$JqYpB>D7(ou; zj|<-?W|_G1Cemc(I-OVdCz3-9w|f2!>njzd^ry15N#!d`DM zh0$)Yp`zz@Jy)6G`>??Wf}~#_e|-?%CZA-AUbNpgHZq3fGb0^z1yeXYHrJu1wF54^ z7nX8Pv;Cl?#erOJ9y7;N8aM(u;pg`O`eN)};g2wVQ)V0AFRIh}q8YW*$}-Eal4rW+BDqnP)4$p#7+8fLFgW{pgEoz{oYiS8`&*(dc4Ee?d|;uw6xHAJ31gr3hKuXfoB`A zRBeD6yq8$)eu&Zk?I`@QY5I+tpF*)Wenkw}iq?R_@7F@y*s2V+^`j|e6cx2c-R-5;v;ZYKOPIy&arNMMGn}(PRk}hyDeQMH8(m zd%SD&cqNO+wOFbf6j?6PYo`cHS-?&T{5pn`2t@QfM%_^LkSfAOxS}GDLOe8q6owSz z#+NJ!N(}D<6%pVwN_-%#J>0`mGtjC$>l3vUO}YOP(6Ky_k{v;GDWXzDRP3N!idRZx zh1CiThnFZQKHn^>R%6*qK+d!iMo}t!T~B8$M}YV8&!SP;?dfFr4!w0?|#CpW?7!?pw)aOFWz?ND@4Z)-G^kWS( zL!^yGCXIlSvgagZO>H>aZl2e#ta(qI^#rm^w{m3iUqOEi6;L7xLvOo_cv#~(uER~3 z|C8fhU0w0KY&iqb+DI|*c>G(-%frCZBkGH2ZI-vQGH03Y%S6`OtG zxb;+bzckUqap|pRk8ARZ!%TJxc%t*#8HDr*S7ci$v^uwJvTs8ltM*!MzqRij$NfCk zCo4rqSIjMKodn2o>}&h=KDkllHA1+p?;gDQpJ+Zu3zHIQyq+=Uy&8om9DP-!L32Fz zLDpR1$I(s9&sUUJFu&&6r#QTi`|?rmeo7@;Du<~_$yBqq-*)k3Wl|-{(0AmUteyVS z|1t{Vz8QB|S33Q4IldbP_jJ$Y>- zhuM1getw>O!{t3qqEX4pS4q>g=QV3;m%GaAEblK{91YQ6c!ypa}@K z{b9b5~b!xcyE5^mre{asKbx1mH-kYv+8J=M_~f!&b)moUFE^cjmBi zdZ?n7&U0^)ny0@$_~owFcmt9*?SH45r42|tiB>*jY4zB0_7Ai7>rGn4SVhly%JXI# z&GDagn1~SO$J6|78NB(9Ke*7BgXaYF{;E&p&1ky$X+xs-KColl{t{DqFl`~rJXP?! z5>prZq^5={S8F{Cqnyi)K!4)%T?ud|=^i^=#T}VP6O)NO__;RrlfOOgU2gPEi8xKn|q@|P{YkE>zRXCQ%zzVniq&30pG zt=?F($pVQV@HPt}YJ6c^@vCMGbFK=_x=Gg47u@@rIW&@~D1!Vj9oWT;31H4;&7#DG z&1vnM**LA^X4L9oud+56jZ*_f!c=1Ei6BIvgt8)}QXVT{$S`KL@~qD?I$vYT7PEtu zwFZyLl6a+5E%F2s3Ha|v7jGj@g%vSd^kyjn-*_(=XwGi3^M+T8bXu{1SkcwB(7Ul`L!~zgbgpX{zsUaSYTWvS5T&T6o#ASk6peiFVeN z`tXIo^Pqid5D6(pl?-K+gqDm$)F>5ADdP)}GGk=fJGNc?(%~WX5Er8-z>y*bsc|Au(Do3mcKj$Ek9wJpWTL39@omMPSb(jL=x>)~3?RYSIbEdzX%m zO7o>fA?cwOROvt^8M&%%@Q;QV`EmCBbAxI)Ym1#xOElsF;_pFHWXEVH>E#>V8rS)a z=@cO9PICE*nSQ>LY54WsD^nTkp~gH_pTq1q{rE|Iro(?gu`_$~qpqeEs4p?sDW{0J zmLn=e+8yKg1A?)^0Q1=G=0jq4<>@!|>ITKL3)UtuLu5Kns2M^l!VzK%*>TTVOsH=u z<^)3_Q?j*;S*xxxG1Np&eIx?dP4XL(+4mt}HSoH{gUIDG4O~qwV$EIg*l*)!FfmLf zMcSr<-6SjaWgrJhGDcex{G+f3an#0#r2gmgmyi-OFKXFHv&H@WBW28D#^~AD+sV;_ zI%Ec9p^yQTB$#9dT8Rj@NHHmOw9$DYV=KRk2XI|@0-x4SnV&T^HJ_iS{JRCFyD)LJ zYkqG@3z_^ptr5V-a_p_Or_FS(=>;wDOK8CX1Eiu=-|5Cm=k&|qkyIEY zSxs{0b^SK1;Q_uS-TgLPUr0%nit}bta%OX;d(NS>=f`4cIxrj8bMZN4iQe1g@w#+# zrcCGe{WB?O+2K|Et@0zG-I%+TkenW#j2H8XW}zf%hzG zS;zdZ-d-mUltXF%wbfE!zP=H_=et>5!_;>B*?)Br2fUOznYz>-wamlu;E@=2`*^+$ zCc*W)oeMgMcsdDqwuuV$4%KX1jjiw#yS*9yUwub1O4fURa+LxP%#|o9U+rq>-7b^r zf5}0V`BcO#OOGJJ%gm0fU=2qp)7NFNxYM-mWSo3pJnBA@%QCil|D=(exS9df3A}~m z{k|x#w50&N4{3@znZDeW@Vv)>Z++jRuQZ#!?j$6=T_YuNzIUkq)g7MiTyl7wvclJ# zAK*)xXy1S6{QJU?XKt+?n`x4+pT`k(k+-d((~1+%DLzwsQv7D@aexP?D1H#sxoZ&w z%I1NuAe;5-`}f3u>g&p?+JklTy#L4|m|^`uJ*+U0hmL&>M2}QfRsAPt0q$_~-tf4| zh)46)3!cv$KJXvDA7Dl$zU)#`RP^1ScHi%D{zM^l*RS*L@=FwX4goixg{;&?Ywl-e zc7Wp=7gy6WCORqI<6Tv#hc`PM7_2D2SP_CQi|7 zBP})i^A`3vjr%p2-7(vB>H}4@*<}LmV~&J8#}3@9Zj?$XncG^Af2HOabdk|j5-xHb zd;jWUe|M-Y=5&S1@%Ep|Jb27*kBz9=$1&i&sU3GQ{oanoK~{{|Ofp`N`xaZ>^gSnv z0jTtdzVx>aa0UtodG(wofZvQ2v7;mKEqT+vLu8CDKJGzl?? zv1A&pk7A<6{wFqHgEswRqZDksRt(G((*!n&sb%C}8LcN^HcYf$<+Ow%H)Ht?IAA*n zSs8G`^H6sTDWezqzW@_1ug% zj6BQLm!%XBMb0HEw+WFPBI){H66K)qa|32IDMTlqqGohk%Q>}3WP}E8$5D^LM*0KK zMaTFG#lTJ)s1?x06!O#0UQqQh34?!T-G8nM?oOIeW!x1-BoEbx3{gu9@%;Ph0?p|b zB{8HETuLS?a@<|oNR)vNPdGM3vTjoCo{fOW?z#BseDk=len*dfWvx`$+>RxFl+;1| zT?0OPTY0vlbxsconWVOM%Hz7sde^7|bGsACkG z_%9mrDp7#?U(9~DH@{e7EP%hZ?Z{v1ZLp>rSmDGT#^U?H;6T9u!}(mDd|iS7fAGYj zSi==XZ@Ak$OpsPzM|}Pcdop%#d1QMJHxhY&ZvuJ_7vePjlO+5)n|}uwaj&4S5VM<6 z^0Roua6ge2lbqka`FF6Kwi#+KaNTww`hkHmh%W!Lk~9b1w0h&w2G0jGpc;kY;En@< z@0Dv06s6> zbh#^qaGQ2$dI@jhjnVr1ZysxOj1LsoBY;(dVrmTHQR6ANw}w z2)s-$DgA#I;3^QsJJ<8R0%ujf*$lA$G1cRfcOA*WOGlSP;Q6}TiNT=H?WaQ?e10W*YWs|-nkLU`26)># z7)~PaI9^tWF#gS!W9YI`qV=3420H#C;fg4rMAcCuC`OaIX(^GqkUssFIfn?0MN%@@ z68^%w2+T!NQr7Vypr$;-xg2m=>DM2AEUt%=44cCAF&d4`uKEcRXEU75d$hUz7%ZJL~ z)MK@7UG7taZf-4>?ssEruC~|v#;Q6t^|o+zMqpJO|n&6AHbJ%r7aIIA_V!}n@naPUwy366~0tT~gRTu4?_|`K%QhySOA8mjqW%aoBt~39@6Uf zhACo&H`u`Mw_9M{AMWvn>w((zEoCCB!xd%TWhJEbFf0dDsR+QLrJfl_`+zGGW$ICf z7O)tuUbxRd@}E&5KgVQ}VCOW>uj3M%6v)D0MG?uMMC8i|V7->;<$`b%KEa;(>p||W zZ9&eUtg0hg9_MG{ZeVG^e*)IHZ#dd3-@kfi+ubK-E@z%IZM+!3grwt#c{a(+8f$C>YP?io3h_=h~dk*I(C6N)=0E{73V6vv;diVzq)_@`2B^ z1K`U;9UDK(45K~{~Do(&236j-hv|NT>$%KE+aSzWzUSUF%c{q90Qg%V|%S|@SXaeFW+$!6pBdNmzv zT0*m0%=sOiD!AzPwkTvK_uD>slY2S;O*$5;r>e_^rCRe87vhs!^9<&GqGxOxMU6#68d}iaT=X%etk)hzfS80LtzD2xa)i$jf5{14xTy~`aSQG;9WR`T=A|cpSs%W#Va(tS2>#UemL_D)HGfDmYD@&V&O}>JJ5M)QOLD}rd zU#ewPjF5;G_r%|}Jd1KUMcdayCo|zYxqt80O}}R}5K6A?kpF@nHvZPb9B9dKI}*I^ zKgDw?v0J6+`5NSogLQRNzLunA;3cdW_h>`4k}P=6qQX886@rvBmi|4?T2;s4(Er-7 zl)gYC9c0|wWnpy&dKHfA;XJugnqe9)qot{U_x8S4B&}zsOOTbkvGz4|4)8XO)!rqh zpcG_u?k;fMb)9EVR0s8ONjCnTNn`+xDF|g~)Za+QdXa5qE}_SI3P*oUCamedVuU2XYCKU3ry^_w*@k6)Es=e)HEQ~6?tbmE3&zp^3w zudg6{811^^VpuH2?WdoXGF8U~HhQ@4vr$2^n-}i<+9HWf9)Y;TxiQlw4A_ZB#&;9D zYk?x-1W~zQVu%Uy6~_q0sPkQNc$%c~g4Vu~j}c37J0hm0Y6{wv1lUh7A|fg@Hq(Xh z_#g|)@Uv^=)(V<)8=FnZwpEe?Q@0tXv60AdJm=eb0Q+bWp?jTRdli_wPC z9mqz!X#r`YMoI1TC^stKt7M4+`~ zml|8hh#5vH4U>UqsMHxkl%`VsAtG9ST|~t)dV~TT*(l8&Ue8uOiOEGAP%zdv%Z%T@ z3$nv4b-v644(_IKx#t1Ch6z`l5I#wUGg{sRO3Z~sv54g=Qf0-2tP7t2vEqf-6MCb7pE=+4aNjlYiOWI0%Rva}Q6_|pg1NC- z=f*nP*4Iz-UpPG}DUVeSLYzi(pHPQ8A2okVrn%8Lo_N{+wjx0ee#&=U7%hi#US7&Q zrQn*@7m@V075b?zc!tLs&NmrF4)E#KT^-2Vvp!Ex!fg0>k0~1Ht`wRTM(2F)+WAiv~=ktLtbkz0l9i~GH zKraP>Z_|?Uj$^D^NGV#Eqk+kO+DIH#yW!#XY^bX<4YmVaMJU;jU><)^<@lkd>*?Xx z2s&-e9hEFK_b+6S{fBvc$T{mtzNAfJd8B95?o<&fl$7Yxg+kpCRrS4-Axp=C!3K+F zn-f*_`?KNEVE*AeJ#BG}^w(S3CL*s9kIX^^L>guE{n7;)$|jBzWr##|)tP$;_50g~ z=4?Euj-)i156k{}W%zTw_PeNv4ScB*e*xlo`h19J>4q~7slyG4ma>k=)SXORd0Z?J z;>KbzGaZ=`WpN8|J?N03L_R6qI9onJK6L99`{<=_>hI~IjX2)!_xy-m+}78sxGRs_ zQs6L9TpcYS560?e_xI|mjJCSA_o?=5FEjhr1{L~2nMJ-~ z0fpm-u9kL$75UPgmD&Y|8@G|Q6VuLfTs6sVKjpP4Yf7q|ozav$D6cFlaBFT|TJWW% z<D5>q25F(pYhnRCZKx@wvPb}eZ+k!+;uZJVx5{N085sSg`K1O(v&w(z1 zE(>5OfWoF2;Qdi7sl{jJCEx&o`~lae&G;uKwa)|=uE#CJFG6PbK48DS?nDPSis>H! zXO7LJ2Q2m%bf9`bDbmJTIPYjd`XQGMV_Oy`gby|*s18i@C1oo@QDMUtF(RVP&iV83 zgDLPoXt}ygXDI-vv08`4v8Sp1Z~zQ4_1wnD#qtsNy`F!YPDs(saQV92Ny#Z(I(_FF z^!Eo&?rNrdZ|hlJehrE*f6pqiy7#(k|0OzvF_xS+zl2dxMJ(=V1Wf-Mv}eC7>a{sp z!y?o19)TVB8KojtGl%31w6RT!+W<0LYjp1WGPiHq`BfmM2)H;=p|_#3*<8FVEvbMG zTpA!U6cvI0^Zx+WKqC8WC($tJFUW!Loz^nVsT>WG`8@W@t5*ITKKfaffQ0C zY@Z$W`TgK&98cL}CYL&$+geEHhLD;~R@z-q;c47h!YZjM{K%UjCbVb0|)<)JXNu(WQ(9VmmiON?WUrMxPC*u$ldy0Hd z(P~>nEs2s6RZ&G{aR~(c$jo5O(ty&0wI-EL(%luMsj(i<1)sKA@x(f|MAK~Z*@W{8 zIC#PSOqx0l%3Mm{UP(i1lH7v)K?f^k32H2;ane{RqaN^tU`}Zco$Wgal@v1mfJ&xq z*hcNTZPHgDb0;pGbdN5Ie9_r%8DmrSuv}4@)FP!k)-QcSMptk8Rer+57w;u5A?dRS zdy1ei5yyR=F1`R(C=V~00N2Bh#KI_{rpN$q*KXt4+n<EZ{D2&FBwCnZu!tu3vEC6#9j zS0I!YC?)X}D74U?G)$>7+@RDM215%iG)875C1`S`xvYdhYfB@fkVq{&X{wY2S|UIp zEG?xag=>kl)vG15Y{;kxUs6mrZrh6Yo1c zBiMwGiovXtFocRFz!I5Mr)-m1LthQ9GUmc*7wx(T*LcZz@g!bnCwRu(SEthEoCkbh zWxR7VXszg#&}Avo7{8}pPZ2kfRegODfQ=w5Eo=lf5YmzgC5+LpWkJxtM;L^fHwUbH7>4l35;s{~23!Sf$+S5cQ=)q+um<=+rkyab2^cE3{|4|w3?b7740WC= z1YXMg-2~hQoJBv=9m@2-5U9<}zW{i2mq+412af`G0*`+H+n$OU@VysOMqmiE$1vxw zXYY0EzXySU;KbvC{N|1x&ObLi=mp{(_r;I`PC9;MSNU^47Ut2vB>2X6yLjZDVV<`C z5`=O@oZ;l|2ZQ2?-{s&>&f1+t8>30qH}`PP!ByP%dIMm_3!hmymZcl}IpL(EXz5Au zz?%)s9~a?Ar%vB9vSs(77~wbyA%;n1ii(Q3_10Tiwrm-{{N*nP&1-6EqN=J2pU>B) zvY9Yp0u2of!!{VOEW$z%ktX3r2+c$*K;5=BXi1Sjv$$_ClAGh>>dQXLm#=!5uI^;E zZ@RQNS6unk6YZQxzj3ryimmT##!kBANqa!*iX=yS=+eTNzr^3|SN<`D{vcM|p}VHt zUvT{N=Xb8I`|RAgGvl(_zELbq|FzQ9_+Ub!raQl8_s;;RAl+6VpHy|(bUM_Qudl#Ao_fBW6?Q?~3s#ap(*Z#hc1WKx&32Rh>& zll6+ps(DO@GgVa9U`3D>$Xs6zT6x4J^h%4gl=S)~E!ssWNeLF72IVHOJCe}R((j`( z{NVIQyZ2AZ>U0DU(nHHLM;V_xT4w^mO=PZvw3qmZPXhrLh&X`7>TN2*L4owlS1Ivf{3Rw!BSN;UAd(Ggu~+pP$dXdGnY(dp7y``CND1;K!+%GiP$rNheWKQi9_+tXsE^M<0EZ zROKfTr1_tIceNr=NH7czfbKHEAH{Njb$cWv{uc@>;> zU?oDpL(7}?ER88#EGV0HCe7=v0ou2%b+3N#hWII8``^6%ceR?Eh8-JS>ehO6G$~HJ zFi0rUe~orFD_(md&5n&O{-9vLqkJ5A{N7W$IF4rR28Z?zMP-G>jH$jpQC(xRM^m%8 z2NmQ?##h@64C7j}-l4MG8WaJ&E3Dt-5RYr-&G8Rvr>9r3X^Tryp=9ECd(^h;8$Gtv zI0OQMS<`(ZMnrGi?69N3BODeSGC!~{)_EWPW3abL83Eh?d>&{8&I5KYCvWfJMc^*X zAb$}?*>V@~V+Jc&mI3Dim(#C!IUjfxqkhQZQ^3{0377$R7H48e7Jxqk4*`c`2%n*N z7DKSi0B#v!{ueRooWlSIxB|EyquK$Z#3;rPO>y8$z>OF(;6K^n)W#h9F&Kr=e;Ud$ zB;a>|#6O|^?D6@~nRKv#mN)Ab6-*m@&1b%HuH!H9ZA-1) zex|dby{gdF_^}r>EvxzaWA{8)ebkKE=N~ks;2+h&a55sSfIqG6g0!#xw2MFXi$(Rv zA4bxh;_i%=);+Tn+B<{3Zufs0>+Ah9Wq?WrA+4}8$IM1h?Lx0DNo#>4%sX_Y6iO&G z8e4;BvAPT0t<+e{!l_SYvW>ar=y`Gjf34MP`4cl#D-cUdtgT9R2gT?M=}Qt5=7o>_5k? znmnN*xwYl)~U0K9OPdjSk%mZeBYuw4L zPquEod)o4s)_t?KrglO1A(I~1S##SRZHb1@ef0druhq{P|E=whzcQ)0zJ;o^hmAI6 zQCW&akWtC(LX99Y_dw;6!lTtE>6MaTRVgKNCiRx*gQ1@PAJ~{d7(|@kBa0I+#Cy{xDKz>eQ)3qfyqbT}xhG9_OBWF0*IP=E^It z9OYu)JsdKjfJM`ax#N}X`uMwZ`0}f zS8(5j2XN^_>(E+r?*#|&={w)yk$3ihnA!jA3AAjyp62xz0_iPpJNMMCb!SbSZI8;L zy#8d0UtQ8m#UzWGl`e;$=_eHFf9ARE@)$iGiW!Iaa8jBZFX&d|AgcNfc7 zq&fSuZ3qG5#@cMDaY&{#Et|&zaO>?o+;mG1l@%sXA)VG-_3eDV^;Kh8cj_lvx$;~2 zeD;&O*OzlIYG=jjG*A4ol#`eAmr4KnwqCybqb|-nJIp=5Egsgk=fQOuW2ZoRVLn!?iqvF_{ng2%&Ap>v^@N?i`;PnyOI~w>E zP>I>EH-RHF^ExnOPxja8G>npGQRe?Ef%`GUS_QBXI2)r90z1w#~##VCi)0oG;a zR{^(U2qp#m6+70dqsKHx{dPe*9yGR!$VYrwQ6nZC`1LC<*e=vVfv1$F`pfoYlj zpNBc0f5fP$l9=;#UuKysuEr3D-^v`1b(os!A7}PGj}IZnR#|-H(Ed`T$rEi}d$yb( zT_5EW7qt1%(&+{{RqK~S|G{3vM zchGX@oEc*7EFV=B7DpU5xJ>Fpfzs*Maqy?-yxU?I-LsO`Uh{_Xjk+%8{_yV{JEMfk z`~WvSU&9L<+WN|w{_pK(d;`=BtvzW@zx6GGK1owF#f5(uT#4BgH-qrUR_r9?|L44( zI{oz1nKESx<>loZbIdV)({H@-MxJ`=DO}g(#v5KG{@_|#BG;=H^6N(AgY0B~i*IasBUmH2$0<;4y zwe>V@Xk_h6t68&h1Cg}HEd2NfmZ}IyI!QX;+~BX<(QtdLerJwfn}L4!t1IVrG`8I> zB4H(!!rHMjKx2!v0C&UoBKwUsMF(^XQg3Ytt-ZQuiSz_Mt;zFbVZ++C+hruB0+@pq^~XfN8-(5G;o`GxB6*?Oi5FdRZEMXv)2Ey@{W2@2=cH?sldb&x zNaV0tr0rgkTianvEnxL~(^y8?5?3A#0gKZ=bK=JRPMCg1@znfHO|J$oT=&fKo1S{; z$xyVrTdsYfa@J{IIPJoT$4$RDf7W@w&6#-b{VHHTUU$!PM>V!~Q0;hqgKmUvykc}l z2{9sM#xF*ZM6umx;reWfk3L9EJ^j!p0|EWz_(oq#eMg5^HVau2Dhp4@JN&}7w{~2y z@lQ|ZtEN_xQc&VagzW>LZ6cJ@1ATY;4p{#rttqyA*psSp=S{`&1@PiYWKSG#dlM~< z4O9XFX^{#Cv1U#sG`0$D2@@dUc5 z4b{*}N9Rte?SP>%r%%E+sT%w~(y27bXb*`UjWpNP5u5YP$>ry zkK^rVL^ZXbv_=X;rie%c|9;c4%FFO93#k;MwH%k50>Y_l{1cwK*vgK1rye0%7~`5(%1GTJe-1VJSpu5o0PU@HW+94^i-RD-UbZ zM8Z?6iFZfoT(^nV_D;rXi(n#+9wDkaZc93pBsjT@x!*mL$hdMtMhUq4{-ylr`ajXx z6_bE`e`{>gYq!d26YZb)Zci+w3ci+uH z2OY%x`NJwudHnIgBIw4(My|j9dakt8vsRNKi^tBdCy3hU>=M;g9@*?001BW zNklX2-DkU;afd;r#w< zW9odHn=kI=(?1Afz0XnH#oy@QjFUs$_~ZWL^UkWl_twJ~26*-nqey!2(KzQ^*v6v6 zgB(2ny{UB$+~3dL55xwMGIu`^L#CBsNRE-zBmYdq zfX@QYU>-FNWblAGi@PxDm?tm;`rcQzm}42ikS51th@Go} zhv_FR{(vFDDlsI?mFvP@Mj7LidqevMEGcxOa z9HSgM4nrDk!1(?IG3WODOdk%yoacub?mP4V<{BPHzcI`2YCI!6~NM(xj2F zu4#Bh-pgD19~vK8KC-pd#+|(*PTw22|Ni@Vn)~Dn?^@R z2V1s`mZqBZ`0&63p*_l#M%Wfo`l+dJX2Xs~UU^)QMib7|amdV?NuWmvJWPU79-5FA zlncrJB0!0&`qOnXX+Tja>29nSO$|;cs0Cw$g^eWHo0MH^HU%5CN0E?}ViU-Cn54FD zC8Q*CwMAMBs0A)CVF>BAMKL;$y4bR zvG%Tmmww@s_dW65`wwqwZW-6s&_*(mWIQ$#g%4XpvFB0HS5DMt(g6t4DCW(X!{qtZ zcem9vPJ8F!x3Ay$^13DUD>wS~vw}qY1#H>gW<7HCy_5G_cF5Dy4*%hkWz&1_&9BUR z+!U`#u39xPAZjuIDB1#L?gi{XNFy+icZ*29|-8X6W z4~8;SY2e1z4fi~eH?HK$n#W&0qhr~sP+KfPaZ({Xzlp?#Ornz-;Ahhhfxs#(AaBt@ zgcnc$s+;CH;ieXP36*bm`n&BHmfqmJ{7zAhB?!5SU{S=&J$C9%IwtST3#JxYetW)U zeI&5?&ZTEJ{bNOBoIeMdA0hA9gJOaC)mQ6Q@wgXB9OO7ofgKGb+8%!C2c2zARoEbH zACZ$65IUs%cGabR(biZ$KPOsUQvK2WJm(Kjf2VtOZF#PcxP|%nkDNvENpoLIZBAa? z-mvrFl;`GG9DQJW?;|hV)Ujbpah_$PghkGj@f4o_k(YIk{FaJ4ho;zS8)^f|99n7iis-z}_C#vTX2Rf=ZqGXE0`P~!?H_1nwGE}Q(9<##=L)y`Ow@s{5h z2D@ILF*iW3>*Ampzhr;%#+LN;y|ulYAK&mGon8GV=t?Qk-qFMPU$}`kmi`RO?=xz! zfS~O3nXF&79Jj8Sy*-qjIB_D|w{L&ngv?NM#vNiQm%{L#_c-X295$(lZ#=lJZ`#vq zTe$X&8HD^6@$?=9K+QX&lEzg(qjA+~fZDd!yK(um&K(CX_Klc`IJ$<$U?3p_5H65e z-{<#@+HEeET{5@>2kbX`ht57D#3lbv^3JOCh@{M|zwc$?!Tw#g@$oZ4Tys-59i57z zLdk1yrVzlP2L_0CkGxa0+g!$1+kJ!#Kyi`mD{cDAGYM9%aoF@$WnW2?5b&LEMELWQ zac=lk54ZoaXvDVnVITfous2DWD=~x6p|}J?5^UIu+u9vuBSLBzOlSa;nz^xdv2#nXxmoO@jZ5T3QJpF{r4=}{c=LfWZHAc}g8a&KX>cN;YxH$bvoS`@e zQyTVI=Ks%QNVfAZqzu42^eboHz^H%bFr1WW#1J|cX7;NJIEmdS6%W9un-0aOWa=@B zobO|f!|vh-z;IX6eb|T5P%->GZp+B)Yn~c;k&X-n~IB`fFt{ zo*QMZM}g&|S_J5pintIYg+QT^qwxS4ql+93rAkrgDwAL$Y}2;%f%Yi%d=v?bab_;I zn?`64W%(%=KBfpCQkl{s3;NSuGKR2zAu06)N}G6U<(VXv3HUNX7loxgY~^H3JRwi| zL1#>1g$>$-2&a@oG}?}ib>U^oCqSSEjsY|#b;k4XTo1=hqb10&>>fX->W$gYja{;? zww?)P#kgBNQocBza7lX-Ym|iBk&x<6lBny!R~Eo?jc7ElBtSssq5K|gv1a0)Ys^jd zbTl#`eQDe3^>XW4@7!&PUea0-LNG!4sE{^(1o>K!lRf6r0&f5}E==i3@3tmZ|MA(c zY}~pt(y(=BcwAg_Bta@X8{ug@%a3*?tN!wL`<>TUo;G{##1oXTQ%+rD5Wv=$awKW* zQf1M{IZ25Q`q&mv;6%dAI``PuN)McLaoPUoj}$7P&m(k!PVyu7WMW)UwJT9DHw)ySn-?*`1dxJRk>x<9w)fKfR{;rC& z(&%K0_BU6_*a1}sRv$Cb|J1KuJiTq@mi%*ma^7u;NY3gW*ZGL{2T{>(Y94vpj9YUh1Td~lJyTfO=a%U$-J`Mf@RMwyRm+CqnJ5o z#{cvGjr+vPhFF863Ll|%sMWAY9zK(Ik^!sq=Z8GLHUHl=Xrfkh1&D_ zyj*q%j@EeL9P)}Hf3MqId+5?TmM+-ufc@^NUNG^EmX}s6sa!a#J$GjLxzRV$mqc^y zh2_02cE(?*$8*6Cv0TN5C*Q&Ew^tl`{GoUI{!(;RYiv8?{b7XGgJ?+&B$Y>#)EqRc z%J@QM@cLVuNT)}B&$GR$i$$kgiEn^!jMfm{-i9xc#@8+fm1a4W73A+>^3t?v)41Y_ zD+mMvNGZAW(&3L)N~vP{pWFJ8>KQe`$Y%)(Lq7br6Z4NN7+nmvo6rg#zA4U8X9q?l zb9y?|ConHN2O*svuDo7+bdbxw*U6?W4vP*CvhZL(e*ftAq?$UHj!wmxs*#E0Yj2A3 zolEm~Ny_9$Bqtsh|WZ|?m%M7fgZpl zCS8j0x*3WXhA{XpW*`2_;Aq=+%2M3AhYe=HOUwYG}B*Z28Ix<9(nOm zQMZT7|69QG5H)q~9=uNaa3GcP-sfZ1`$jp+UChR3hbFfDXQ6e=h_5$Y*Y%}RsXZ_d z**&X0Y@xP1Z+4Yv>CP5*BVNg<;o!_0b2-8?$-)&e^e8udu2u za{M8>Yg!>MkDTQ0m#`(e67*U-De#XW*&V}m6nV)pRE?XcL_X1#Z7U01?J;JzTO5GQ zImlBAzw0r6)>swz$c(PQl!{KLJ>jUgT5{v7Hjjgw5DGp~ z5-EQ5hreIfbk$Wq_7vB%Hu z*%|jd;p8fnoan`zO5LY+5G0y*3TIvIG3v`vp~#s1t4lU6 zZJp+3yl|w}i1sMk?tZzf>SKp3vEEo=1yadg(Hn17LQG40F6aPQlAdT64S#=o?8Iqh z`8yk$V^+YIr&BVR=uYY&0*Npsasp)uO9!&wx4z3rgX=&}U{v*t_LL!SEQ!(@E0lxX zp87}Arrv|Qd%71SMXHdXZ>sVRb5H)EgMfOqOJpeTMJvY z`-6I2<&4N3a-#2C>GP2k7_;AutS5V!3cwNqS7$S-`jJXGs8Pr_tu@h}1hzex?2b7u zwpLg}*7Lsyg-d;XJwN^FPpPb|(d(Q}z46cFr zb<(#^CO%pEhpR7y9I?{JuQkP#89q6qyuOV9F@jZ4$3k4 z%ITIK3M&uBNhGLQ-@vN&9!iTk)%ft_zsBm@8)}+5E*|q<_4?Y&MgifA6p(xJ5|vX` z+!-hfuG0tWTlB;k4cl@9Z>Jw?@|p8AkZ}{k5_M`-n%>N9x>>vQc*ZnV3xU=e<$?C% zeXB*Va5I;Q6a%gmH84qPB%dpdLeMTD>ZO@}_=2rt=TEvIOUQKA-Z^2%Q*}RCxpeud zTi4g*cDHt*U6#+)~0{{Cw&m^=G74?T3&@6I~w!aGxmv`i;@f7$fH>p5dw zozZIT8kVcbMG#xHt*Uq8j^hvi_%ZjAt4mdV^5mA+*X0$8jEX{Q!XC7|w2H)xiM?kY zbIgNk$x*ls-Ba9}rm023?jsTNq(#@J8q}saOHTRLnK6}CZ|KIJU@+~CiTjLtNC-im zut;y~s47_yy6EgLeB%3dslUqdiBnou?3ia+J2J-0f;`J+``eqC`ibLCJoCJxe}%Ne5o_%zNN?^q=JX5B`F5n-qBWLfqg~fsc>Gb{n>~5fKLSdUv}jjZKwW6U-h- zDa`$40BMqgV2qMLMHt4N?bvJ3m0{F4R>cAs&yjcI{f$u3gKjRjYXN$tRgOaU!*~{qMXi%W7jJ@5Ml5 z8AgFT3@>bGq%XpEZj*V0@+ja}yN@`(9PHgqOOU2jwf3HzVr@y5O1q-)!w z>6GS`N0U!3{!HK`-)@i=BjN6=Vyt*6%{5QvlUp!)8_xfX&yfuA#|#7n zmw!FN8bg?T6+_s(fO(n$=uq^Rp!hLy*o=_$}IO*=HIt7{reu~`uYZ@BxqL(iWXpC=|x3m`BqHX+Y=Z= z=8^C?hDe!~*|*6U51F%fvAtbE1OH2ZO4go`aVs$Ds?TFeymBxEVYalY4nxWuf+?e# zgfUvae`rJhi8$-@@R`?sKmUI}=zjdGar3R+-?`=X-e11^lK(Vlb`{B8GUYa=EINH? z4D7!hYF~}hw08W^$z#Wky{Vv};Do)sxiwu0yE3f%nO-5tzFyYCLTF`pmE2sUFNpB@ z5YjdSAz_kNv{s-rN_pTqc&P*`5d$}6)>rAiHb*SEk#@$@1BSCE+5cx$F9RU}>>8hg@g?v0aZXymb; zSogS(jJa+7Yny-H+1$)@{T_@ZGX}XvEn`vJ6D9rA+w2;hp4?Fontb9pC&nwMmwY-I z3DoyWZz5v!!GX{a#U)t~=FE>C<(1E?(4k03`=q5UEOb(%VhU0kH{s%?6{TO+i(Kp82uEZy&ehYij^n*50{))2mH? zd+6o|BB{1^CW`>mEkC(|FaacPU9+g${?y!PGv^~2FZ+jbK10k?{*g5%x$A<7q!zBN*8mqQ6EX%@2JFhoT6bMsz=%F}T zkwQ}_1$hXPFK_rnVDXes2pu8u+zzI=0g{IuN-*IedK1{OIQgABS$oT$7f!n9*o71b zZ{;(qthS0m#*`j{r7VI9CQFIdS~|5mPx0kWKgBN#*t}*v-Cc3U9WV!fcbYMNiO*-L zpp>e7%s4C!(r2SBiI+^`HnpMSL*D2QC?k>qe?P~o6d_Mx9Wv(YqR2YVTAw!F`Rpf;;rI8xKs4I_9;hG^ z;x{*csqZ?_TBA}PwU54vzqJ#8ATUC?*4_~=4o%McAQ4M>tg7#3(ez?g)|>OYXj(CA z8++(ZzDIk%2@7)B@a%W!+V&WrHm`BN`q(Xr{XTYSXpdi#+c>d%<6qZH;ieqoe#U(f8*G7O0|1#^u(`!3tu74F6mdp9w7 zzuyf>;1ig{r7vPUecr%$%78hyS7WZt%@~66nfKApe=7uR#N>(g-u>nN4?r+Ds>{f~ z0fOVHo__-SowjFBJs$*mcGl1|+#edjVBx~O4%cx|s z5BwvkZ7@%uS{On_SZ2O*!3uyJy!jL{E|w(5yjpDXKk%lS<+C#>llSW=x+( z!T4(2WSV$)H|1k1S-)m28)|FtMGELCFQGswBB2n6Oq)tqK><%KTb6(GjXi%()iyH2 z6O_HD!C+QdWJayovz*Y1L@Yt`+S**p>y^1yeoh1{lg5=f4lv;Onr$bP;_#!6;^0#b zyVn{Md`t>wiz{jENU7NL>3Jz$TBlf4DZp<*aYVQPR1(<@7bT#s8mNUmNIC zJ6Qp9F12fp_du0X=6c*|n`EQ?FFAEn>72sb0UBTX?feywzH{#@_x?39Iq5NhAOTMi z&;lzM$PCtf6uB;qOJ8GEXV(RBeYn50p!A24nW5iK{M6BBuD|i2+&o7UMuN8s1yU%7 z@R%~JZFQ{O*+|2K4U8!+r7D^rABimlp68*Y#6No~!EHN;C1Sk&{EJw5IRtjJQe^uP zmPJarq;qWYCyk|}sez?EjT9t03Fk^0R@G1*3{y~1hR^RO*AwIx7SLQ@&(`{G?8Y68 zn>>l_wcGJWyUEK55|2c%i~M*cIdsn|Cm2t&><=%I6rL5z%O`+^iYG}1a%k`EA)Xt; z4cLfyJ9_1EJS3@Pikz-qWWvMo`SFAeS|~>g-Rp-?G>#Qh83maJkyTO+z7}=dls=l$ zCiAVb5ER5ybZ+aN-L-Dn?3zD6LxE*eXjx1S=HWm2U<%JXwA4*FV{`qXtIFohzRsy> zqI*( zthniMijUooP(=|kVDssZ9!hCA$lVYBgVxR-CRdkn>E}*lQb|6|TbdAQg|jnCboo{q z|GJz~+m9_RwAO>kyCGl0ii!#rE?mg?@#7IfaK;&D0PxsjkD-*}YhU{s>({TRp`n4I zq9V>e|9n=hTE+J5+xcf=;iN+5j>%*GxO~PI2KoFE<7nja^+*ADo}S1^Ut0~tmTWeZ@VQGW$UshotKw`1G zt9kpmG~FHMz`pg2LqVy_0mu0Xs;$|0C&vi~R({@9$;H{SU`D z?W7RlkZEV_28S&*F0*I6H+$!6Z|>&kBLXZq=-o+>OTQf9=p%w0vGCoOeR)}m;v&h+ zX{KL}qj~E2WM4m*9FxNV`}w)>EA2dXe<_6-GvuqTjk2Z2;lVrq{U3q$VISTvDf3l^ zNDYrVG{DDC4l!rCkNr<-Vu-`U_b>#(P>+wj1%-(}9*P)du%5*?cG1Sena@BxlKE6) z%1yQ~xa8!Qna^mrmwuz!k>Fs6i>Vl|lQj$`0~AKlat+2yW-W%S7!6}EX+_1D1f_wc zM^9wtPsR`f!{b%pAqp-4kc)C(K=A79WPnVJUnZ?gBrB0JG%MLU}{#oWT5DN$VJ<_=;z`UNmeHYsV zvu{K9=T%@L=3GV@UPkpJ3;|VvQ8NvE1=Bb}dmk$F#x%FwW=^GTLs_ZCA@lu%q6#~^ z6u-M`czRD|g~g}OF=O*oN^{>sF;=X05W*xkop5Zhubn&Y?WMJC_(0=J7v=KXJA3g) z(QVl_Tz1Kb0SW(^D4+BT4mfMjTeBcjP|${eEoQCLVt`lfTSsW|eKnqpQAwjrBD& zxhc9_mz_cpQ)cjEDF|vsSa}EyF#+vDGT!qDBbg-w%#=Ptx<3_#OgWH)N1JW235Ojj z%`AVA3N0!7|LmQ2e4SPO$KU4}cP2M`v`Le6H%$kHmQkRTGGzz?1!PYFm8B>msGuMy zQ)S3d*~;+8UQ(d6los03MOV6;q}lT(cRl0${x~jyt zOcGx5Ef=k)f~K?7r`N40Sss<7a6FEKyJ`y`E&9Uq&$i~$pzAW!brt22^h~Lj5)XoO zG=}P4^yTG5HdjMhDyHkwv|=5ha68#nguxv)Mq`-t(h&?R9f#i9MrBhwVapZU%C}Oc zdDu@HWbR2?ORwl`ox!d|+kZS`$B)KSniKOCrMwyn1SYP0KYqP%`eP7Ix9EB3Sl&wUO>#&7-X!5^Jz zH#C`EH@OZ?sM0viPy_2OBCUJB$26!GkTrFTle2%}g`vU=8@DZbG*Gc@+us(v@UJmb zqLKpLhp;=98xk2$fX4*K#joiU3&Hv&tGpY$#>HtPPdw6FARf)0FvRubWKmO9!!ThW zOdVn|(0dHTye86dkfRF8y66Pb{`wY6S1#ko)2GG8j67)dwna-PiGR&QCM;sEOQJZR zVHci+?}JZ?%v;RFlaFG^w9!=0T1xfHvvH$wqD}&a3?}cWGOAy!WZ}BC95MJXIez+q zFS{ARW2@f$EG=49je)?IkxtoAGk!i)=J9Iz52gB!MU;GWl5`$hTZ&DER4Wsu!+C^BBs5 zCW)gA19CDTX7R~`uQM-M28IioWi!IoDKi74y8>bfq!8fq_F6_yq^GBI;DHAM@ZpCa zc71;1jW=*zm&V3M&N$-?d_EtsSd7Js7xTdP$MH?+Wo^OAdx0O_%!EN6jg#do{?gk$JL!L38~A*JHRTqUU68^lC-mW&(HN5T&18QhcEsL>-|rng5D;!dmHO^ z^8G+1R{dc!0~^M+vUB6&Ms}Q#)Xcyo6Ow`bZgv$322Nb+4-pi}@l~J$XP^kMm)LW| zU56c~ja9Sfo;Ux~2)DcZ?6wvzJwJu?G>y*|C%E+LCLXyrgG-pdV*s?C)br;wJ` z{T@GRL@kH>kdK9%Te#x6<*cr5=c1`YxNqiI znj;no+od4g$JPJ%lBecZ?sRo$P9Dq)m+#M0^DDXN$)#V{uOd4;o4fD6o3gSp+S}VP z41Kf{R<2yhrI%j1^98%g4A%nI*b$b7+wcs|B%`R9 z(%eiA%t|5P^WgFN@Su!+HNbWqVzD^kaD=9sW@@)Ju%faNHwdNp5x0A@!O~%Sez@n$@sRBzDyqoWY-YNGkTCHH4HJQ(2}F-K>s^`x z%SJXfLt}H-vV2lfrg>F^cmla}6&shXLP#YCJwgi*&`tb~Lmf|Lfmrf;)=v4CbRA30C z290Rc1~fTwLdhHXWtV&=H~r1GVNJ_JbDny4LS9olZJI$$#*n6ljl_?O-?7kQHnrwg@?d}G*wM<4b(vo%Q0;RngaPd=xvvRdTERRWmuQ&r?4La2nUOkct` zA!XTwo6f2q(Ke&mn{Unu22axCdI z`AU4jLDNQFSNrCCgO+w|;o|55bGYZSqt5u2ot~dRZRpUF#+>}%?V*xsXP5Z0{}}sx zwYRyw4Sn2jQm5vBc4Xx6xr4H^h8OKWq%BxrK0EH{sbkmIHr^AgYcX}xOUAIm=%5)> zUK1hX_V!rI&2df3e)+w{N1iZk{2%r^X#cx6Y^fU*h}dL@f)s!IVEm(VhdL4NjKpdt zm%qBHa8OqMttBT-IdN4@olit;QglC>rjdm~htLTG{Ag$(B+_+}$#{6-^&oWRwImY> za3q+z>If&%Nn*&BW`vX&rs{ILjtlVwmX)BOyDH$wvOwC80ZPRACBye$1zDELyAwff+34sZC5cq{g zhVYPUcnQQEgxiA|MkX(ZzR$=tYu0enO*ajA={@`GvpoCkj^0b|8J_>VYKPxHy`Yk( z7YzLD`rUiI?ck(@`)6(B{#m=z)!qe6Id3ej+isz8!!LmP6>}2rG*tP2kX@iokn94D z-@KMK;OrOPw%3KCU6}V?9!beOkTSo4-tlUe%uHdwvE759JARzbOK(SLZ0^;Gx)7CcvkO_J z`|uyYTkJRj{5_QV=9>r|I2~2Kb^CvKTfWh_?y6MAm8!S0Kf1Y@yZ;pKB4s*p<8>iQ ziu&H7X3dVVX^Tz$`hp(OjeU|HIpG*zzp9rzev#hwxw6VZ*Ws>TrT1y~KaY%(J1IM{ zU(N0{FRbLnMcW8^b)LI)63<;aiT!V%OGQ(ZL++Z#+FC`XUwUW}kDfPy*Ot}N5*fIX zFFVDA$aSpx47n-YY2zKj2bnH#~**34I4J__S%wMI16^G*Y^_woNP?rE+7GNYt@Are$3Rjv%Wp@x6+C=*Sx=SP$X`gU`OQ*t+lme z6c1v=IfsAb$@KjoI3iod8lqF`=Wls_+KHlo&uzQ)xL-*C8s@ zZz?J(-sn&BUkealPl9*p}L60gh>~)ryf`T-=dg zR`M)B#n$#?KY056)3gnh1a%KqZWd0^Ph1B_*NF>_4%AzLgb+B6i)&eQbaW7HsAujw z3m95j5--Rd_27_+W%KhV6kb;T#2d%Q*KWku8Qtz$Dvc?gz?Cj7Qd*Afd?GBZ-dh(M zW36mBwN18OW;fN0(xP!Cs*)00N}LA%qNTdR^&|>fmTnspd9OCTrMz5p#A4vuNL|N9 z;%=&WKjo0(vC|GZB5GI0MnyKa|HBPid7%*_wP0ZpX_kXGKZG#F?1B>uzAQMlFwgCX z=X9*;xXHEb;e{hd8stYYh8AEJ6-rb1Dz~kxOsn2p@tv_pPyBwClw+J$dv!2tkaxt) zZzI|wqt1U!8`+le(bW+^1$F_RowK;i(TG{C*W4DGGZ5rr4FB!Ti^`a7d zen032c4aM2TNpPQM!FIijf2mFFm!}>$EpBfY^S=4C&17NnFeV)^YqycZY)lx1YPzl zxpY-&p;B~dq)H8+6yyq>xCV|;ocHOz{Jqz;{jv-L%Ep*GEv+gXtW!8ZWcNPo!+$gOl$4pmc50XOkjCvl z?#=XOrfb~tgEX$cy_cXupgcsTvbWsA_F-@02Rr$GchZRd*N|Y(4TAS!4^dQT(7YRQ zg^7g3vLyA5E(L@3J$U;?YTikVIc~~85xbq}h&w#_X(caTaR7!U_+U-%RPEQ7*YLyz z6DZ2`?~s)F!&znA`~F6zl%!#N&99~E>+5;>HbCAhWoe(~7h-^YEkps){YeiBz+)aZO|OOAo*DT;rbk>YWb(5AGj*uOWVn|8-%JsB9WzHOO=%m=t z{Pa63KCgId^~0|TUnGi0_M}ck7lE<;p7H`Yj*H5(YV_!Q39BM|VK? zBu#L?LV1JGx;=QLqe{~>orH8*wzYz7IC#BY#`;t7nI>^*(I#9n7(gS`Y4wsEL~BBj z>1t%EupL~fQDbVfIOc; zBrqtKw6apN?9$8DeDOu5k+k-f%ZzjTF*W*~?>#Ts-hke*(>2S`7>FqOZ&*v^;by*l&<1Lv}1pOt;shkf{lV$~XpcwExl;_|1* z!km3tUw`29zSoGq$D5NAkM(oiRjHhKoS%u~Jd8SE8^_M@anNKh#~;pefrTbNR^169h-;M%FE%vJ6|xwqY2GZ~ zq=I2-(Li-tz-f+>E;ZsvY{&IEmQ|Kf;(w{2&3E?JHCs~GZKyc3Dca8X+`-b7agQ6b zy?G{xws!K{q6E?KNrPBiQoUj=>oQUf${SJeoljo=SOgjx8D@j%sb>+LNliV?f>kVd z$m!`lW8(!%5;g`P*h^%b*0~QmwnIs}gE*4Ic+i7;RaZ88vz1 zikj1gX1i8Zi@$xzra=vhSEb5^CXp$%q=>5T`h)~WN)otK;82gi6%tzmN4l86%8D(e z)6P2dn!!gucGtoOul@Vj1IkWz7Oc*W*tXL2Nf%_IdqCX}>Z}AAMS~bJWyIqdLoaTr zU-q|?*MB~5dU0G5&`q?cP5q{DYDcqmRDDBzsfiOaEXNflnlMbS@Mr;Hnkg0posLM8 zZfMaVuI}^JMT?BBvH)0TCm82*y+jQ|$!mm0FCte$eEnut-25Ej>RNnKFj)8DkswSB z{K_O)a~vX@D_HaV>tk9fs|eTT2lgV*2iPZajh5X{8c5Z<}4bM(G+Ho z?jsJgZQg_vP0(Q{sB3S=X%FLQ23|*C7&^jKsyTcfWGsP1zE#K%!?~TPjZ_-GhoaOJ36=Nd&sKG7;DG?(0O5oUV7Z6Q-HmbO8d2 zLa9_sd()=s+8vc??>21P?w_S{+!Z)&|4q->{^8g!(^4@9pl~=N%z%DPukUj?2lR6Q z9LFWxO!?Qb86u%=>M!s#H`fe(JTKPtb*%G$7!jd!5 zVIRJc`0*{xxGvN+I82-Bl&OLw{4^&HE%R}+ets3>8Tl8e(lPK zUm-7S6V@cP;i%s5uky=Ao;L2+xf2JE6LF4R`__`1-+OgdiHoFTYh!ij(EW}*_QKO2 zXnt|-754k{yTll#3(YZ$XgK0`nyo|Y>gpIJC0+@=%XD0j+mC%o zajfLPP)ia;yAy_&G$-!jm3-h@_)3d8@XoX6>QcMDBiy*Ia8QQipc1hqGbcTN#E9F= zUwGq^czqMTu8rx0NbUodTItXrZ4y!{pAM2<9lAj%JA=`gMmlNw<-na&e)xx38=k)J zTN`EY-f!A=5n2THbD9EKk{uGKAWcx>g$TRkmn>K?0DxZ0ed`H_Y}&8A9P z9(j4#mh6mQRQOCcE~GSU8{s%e=?cSfMM~TjnQ==L#2w*rB_+b7alxA6nlVEbYXW0*kGDUJs|-@N5e$3q9p1Y7@3ue7OMrz zMo8sNBRnRqWg#txkjEfUHiS_l@`--9igc-wc1m2Mbm8fe0mNXejJ2I;zi+a88k92t*8Fo4i?@OzQbxH9+^AdFq>Qtz%p zrVDPT-;spac4q1VdYgYF%QE$3SxRSVTIXlzQq`zsCu8HK(>n#sqxUiRonKQ+z2w}2 zf`UE!9Rr}XwY9dPq2V`uzQ`JW9@DQqXs@p9>%fQi97apU!9b#N11+at?>YIx+kz$k z&P_-}B{v?|>Y`Fodm-SF$Nk@PIVbOFveG{McOn{-9CTD|40el@5x||mPm`bHz;u*g z;slh9!#@0*vAd*95V(8$iTB=|j%f&*TV0x4dw0x=3k;4v)W=CP{Ji;LwC7g^z>REY z7Q7d5I4TutXEDqJVI=T3;IO^6MSBDX?RmXionaRvkzy5^oNfSJ`Em@v;`fFd&uE8LG+^ZB$ z+F`Bw@~SY4x3tg}v-$q>E7;Q5>)ypt!i0tFF3gkCHsj8&@h1 zs&5m;4uBvkTow?=JFbY+e*RrFvwINOR$t3GS3S(Oy52!>LcoZUEFrcVV8_A{;;{r8 zT5?zj($LXum&BTymdR75{`}zS(?*%YJxk40tt2DecZ6+OATjLJ(7B7>S#nLo>kE<5 zC=JQ-rG#bi#$R6cdFFin+mxX>=VfJP-n-wJiQnHgvF5GBn$5Tvp}I9IZdNPp(HnSsd7-=QV zYjiMr_#AYW)a)r-8%NXG{AD@Ye)P-?YuuovxuXgjo3=%^#amjNbidCIlm!NdN{7?Y z*o4pStMHe&SV)G1G8i|a>3oLC;TQa9 z(W0MR|MTWeTYkTxw$4*(>zG3CE-8_co{p6kl9r%{(!rT84IO%Gta9$7GynO-v-!D} zBn6k4W6^=bmPl08SG0+B9zzodhPy64LzxZhx{mJg;Fvmgdz7HiDU>GR)()}ev9~h4 z(+@m);`9US&FoOC7VxDx(ROr6(toE@IU&i+8^q{eok8mtRWv+OLCm($6BasBo!0>` zx+_V|&SJvdmlIvGo=p$FO2A6s6DGpvQ64C<1hyea&&*`RF_RvOd{RAmGpi0VlNu{m z6KJ}w+6zH&)Npc7or0d`A^PeHh*?P6LAnxMQ)G{$3kCM?mbdu>t zLPH?YTowBs&?Uw3@F#iUmWBh{#Yv(yZb+{IUK2+MB94QIB$(hzOw9npq#!+y^n`}A zh1Oa0WHAyQPJS1pqSJ@p^}E?B->9% z89DzR=(OVxqDs|{N&bH)>O86eUhlE4n^8o^L+m~&)6T!wfOryW-|S7K08OZ5vw=s# z-yjqY*16|5>0EGSBj?NvGAM7)I<$u$;>B@PvQj50^Y21Ny4J|xdL`p|^b4_vcwx!&HK5PGG=ZpNiUGqkvLaj>Os>cXts z@bqBlV`3U`3{c7n?p! zHwmCoC`>|{(WMeY6Sx9e?AU}>D;_m8Q+Hf}?f0O0OtK6QDPA9%(D9}Q$(IOC3W=uU zbhIFo-6P>KRrIvuDs_zCi_kUjd6DsinilY?@}{o?LX}zeiky*7(hDeg{^&Yrf;!tF zECjX?I6f~jBNgfQp&JGs-M|n!Qc6tM#bYNBmP527N=I855(xrQGDu2{T~zht=jT&a zR)){#>r+Y^3jLPERp~|GcC2F&(I?N~Qo4R-^ zzo|2+D8&9nY1D-i13vRQVd{eYhNLmMIE{oY`OCcBjKfaN)5#lkHVx|^0NU0qwr_gr zp2)FR-j}jdL*H#19Lg8lG*-EM>rx+qQ1AU-x7A_oLYum+E;G*Yl9Bh-&oRe=pWW8N zU!QHKso6!>Vag;g&pwvL@Sz4D&x`Y&^OSkN&np-)%;4g4Q@HqCl?HXqjm;!1$)E4b z+@~VyHMyE4bMnc| z=)GU>dZ3Np|3URH($h4?jyAdRx)6sS;^k+zwNO#%@Z95BUG1;9zKOTqi?Vrn0iD9R z7hj3+%R5_H^Z6iNe<#XC-*4pjqkKI7M0Yv8>%#b{)l}CyES;NAQK7+{Pve|=Ztw7f znWqML^!{Dj-#fre6d|(+H7@JyKs|xt1s(yOL@8$W;opeeA!UkDGN&$>hTy)NyHiVo z{=PTwU_eb9USx3fg{j>0c(2a04>fq-Q&mfUSPuNE$NwQ9iW)!n(&<)>HtJFq1A`2|$@*>sd@W;(q|nOEuk#(QdV zoeO$Qn}tf^>Lg`SfK!2w2Uvekj6@MV6?DgTFQl*B&I^n|k#uc90Hs2KT{|zbQ3O;2 zJC8z7LmlHNis;&r<7F<2l-fQTyYqOYp_E4v{=2+Nz80Kza)3MUZ{x1}+xWv>-DON~ zzaQ&WzU1=>PCnkx>+eMQcwUU}oD^X62$QO6n;UO!p>&kV(Bke}+VYhaFTL7ZtubSo zkF3mZY(8QtnI-3wS+d8)(ZyMQKK#)k{Ne%mWL0 zegDJ-6EHOGYmLO#G>w~Xx`{Dk#&G%NmlF<$cRtfV*iL+*NlA*P;j3+9?o%Ie?A0d` z$V>qpyn!HReD~XA4;swv_rFF%Q#(V8vbpn?a~L~b@nBL)tVo=Sr5l*@;%r7@kYl^5 zEJM0zj*A(NLMZq2k6wTK2b-$4WSn)?cTOI0_=F7^DVgM$mFV?xzo#JZ@?|%F&rDd+ z$#f*L8s;oBH@-a|JSK(vk6u6GgtT8Ay3W-dSFWxP*ZwG8u}$;3U}(nZk^7Ijp`>W& z1s$z5Gs0VH@*3Y+sn=|(WU%8Bv|YSy5s%d#4wXoq6j$zuTG;{Q4pcI9mqF|?k}MmnCShG*3m45Fpx891vEsBwB8(P3s@ghO*|?FZMo>KoSe6LjdPy=$LPF-akPF-7$X=MD;ObcEe)?{9qO|o>Q z`yOe>V${64P(?wzF6QVWf(J!U zLNUJ?ir5`!K2IWOXu1)P>#f@&Xi*!lrqSW`U|Z8whscWIX>A5wAiPPk#pgvvVjzDU3Jw}TyVh!G&MD0nr0tT=9y=np|-Y` z^73->^Ygjpnrpb>h8vhafBr69y949+vK-EuJeU_3S2H{($gfTs#rnDqj=Fz7mLqxX z2a_3J5F%l_tf^_=DJk>#`4c&LLLN;W3F5Z9`=kuO0q2y`u<;IR*IW%m%RjfD*}B^K zby2B4;B$H2D{=0>qMd?~I-6G59Cn(AK&bnkw`{h>t*5tAJl0_2GMkAeu`bTfvLxYlm%4R@L}QYV=Ek`6>L!8#!I|F)5Q$0>iCvdX zMPrg+K=8!V?Y&5ur~ckSz%OWR>mFKtu`I!~6KeU<4??{D_Z<9w!JF?!x#Wk9w1p*C zUaZnO&%dIP!UCP@wFQJyHMUmTyfdr&rAZ_r>FC(;%YctQi8G`???cD{#A1@NF($A7 zJ%{ENm%lvI&T*&JvEtJ~95B(t6Hhm(;Irhc@4O#H*9D80COBxa@;UrqPK*gvZvfj+#K4E!Ew2!G2{kxxPPRFV z?nv*=D3am`lv<+zr6TG4eiHB^N&7SufpZ2*9h8?`@2^oMKb~Zp>2#9-mjU;o2!~Ai z5)adWXHbMn07WjGg(4Cr0slgk7afZl?AImd38Pq1P%+m4w*c?5b1b6UkaKqOw|C+Q zRQcFjsD0I*oVI}81jCCcL#gcKw$23RCbw%Kq$IaB4W%R*hLYetj4GqL9yl=B_9)bG zS&t%}<^o63tuor#dGW{OHdUd>wq>XrSbrqRxxoFv3KY>;ggRgP!!xKGUN!36nw^~A zq5F8enB1m&fxquyfBetE>k%A1-Ph~EA_V;I)^r|tBupeK2?SJ|SKjPRsAOhnoP4~W zQ6mig?+urWzTZewvwEmaKg`EpAI$3NOdLGL%cd_y6ym740M@HYWD zBk$nA3rBsGMci=AaEdbhTs>nbSI-#QHT}%T7Bg#g11VmEyG|=*&blVHwftuS9L9_p z!>Om9N^^5F&ph)?*YuA+{+RpkzaN0_e)qeab=Fy=rl#Wa`FQo!SJ|{_6W3pVecuK4 zcx)L`q5~zGhczEAqGoFy!zTgP6 z+sZ2`|6(1vQHN2|gGV}mQbK4_(h+W@ao&ob<=3?tW<+D_qaOzBk2a3Cs~ahj1|3Vb zWJT)2KNbbPu;w-Dtwb!XwXV*Tu7h3I#EN@gC<g=jYCaHXpJ==fXH4Mqp zsxIG)ud+ThZ%lxvXs|oz@Pps>>qfaR+>)4@n(p%;%9gEJJ)@(gRm=7G8jZ^8Y-$^~ zQ|PEcwoeGkgokx?jg;5bu`5=c25`6@Btt@u?PB&+C+VJE$_E=|ygYblK}BX!sD9)8 zt%uicsVyF+dGR}HkS?S~+pcSB^wl*C+k6LSk|#&7Lk#t%z?F2NSi4gQjEn(bn`*t=*0y+ce4OI@; z;n-9rV&qL6#<(A!NczyhU7j%S&iaBM-0&zZtr4V@y#235{PE$}c>Bd)P%?B70U*6F zgS?4_qzoO*`bXX%BVpsST}3nvfEQnUk-z@+uS}gfm78w5sn7SNv|@gEWXYawkS`4i_B)x{t-pmx_4?)Z@BevU>yA5y;~If(_gi4)Db>@ zb91*(;LKA4R8%?q{MRj7t3n_b0gZ$&uegn@{XP+Km_9w9}Qs(1%ajv}oBQXro<)^rpa4Tvoc?ko*Z2l3dWc)tVSZ<(~_4}}w zv8zXV8rvCJ=I7|#dR^}b>|j9K;s2>YjbC4%#^pElx#>Iz><4?Squv>&pvadFl-lPu z)Zkm72Eq@clprRGpy`Q+Q7VkXPy^?4Q3LC-bgLnT0pn2v>7OT;xgY9j`7COH|EFZz z-y}bu)MFh1V05zm+rU-HS8}9xqmJ~ zrFxydgLR*TI%mhz88@;EnOzvepdv^?uuQ zV$4XhOPV?m9(!QdYYx_)Z zkE>gAeS4hD>)#_B>;G1L%|BMMi)!~h#->f1xZr}m)={mktzDmI&6>s1rM=ZUvDiQ) zQg=Ck4is88j%hGa_}H?plKJJE=}>MG1HuOCH4O(rkt-P`3?>O5nXU%7UFjxX30cuN z?kAra1p;ym6DN`&ymT!NpbN>WdGpOiY46`49sCFiH4h#Hd9J`KG@7$Y7oEnH8^qQx*JjtaRyIJP<{=B6!4@E03L*-vqmOT(}j;hUy$rEMYB)Ka_`G5NL@Go75Vt`sN*@JByC}BD0p~5V>pl*%pf~8 zy(6Pw(Cn(k^|MlmznxPuxge2J_{YhfRV=Av4CmD?$@F}&6*Q3mT zBQadZq0w+DJpCv}U2+(%Vfoh3a&Y?O2*rLRS&$78MGbIMatMV zO|C`Y!13h$^n~)tzkN2M>5VyBmP}p?La4+gDM5I_Fp!Q*J1$?iG0y+iMAAy~y9k-q zwg^}M^l_S7x(B|N?NHm$#`#y=$DH?m-=&1nOr4Sw#>UBM&rc`^R+m%hun;Ornj zzNMK@KZ|qBkv>KZH~H;-Z3O%p`;9m8cy_M?A|<^3PLz+{$lG~ipuI!V(IH7m(a6ow z89Ul!_9sdS^YOemM;z*9+EgzOJ>JfZ*Fkly!`gKg(+}%SYF>0ske~drg=?=&rKQ#7 zt$#(C_g-EfQl_cd;goag5dx-7^>Ow0QZUUu?qrPxu0)LkpV~pYN|b->Z75+tf8(Bg z_!_V)q>K(cu>HhauT3MA()$8V+3v=&y>bTNl9?$y_V;!cF7HLWm7xy&pLbz<_5@F$ z2Hv2`W^PV?E<}+h)06*OsFUyTDeDj$23 z9g{Nk$!)(Dco}u$Xz8cjL{!Pwlga<1C|{iIO{E7qFGw!?#N_&NP`&5L18i3v%4;Wr z+8;YIPOd_cS|d^ChmG1l-zY`QKKz@JS9%WzoKvzZO?TAsj3k@^2^&xynC6|#|8*l8 zjk0?6>K(SJudk=RzJ7;ofPVM|fk(nH%cWh{$rL8GFtJcKcw30B;k4{Avxd3}dL(!? z2uY2Qt0l`4x;tY!5O8HufuVsk)En*|CY?4qLxq8*(M1CIrBDxR34>h7!C*||}e%lfrZmiPwTf5{RlRfL|3|ljD-IuIcX2QxV9AFu)fVgz2 zGGJV3S$po_{JDY5%rzq5sgZu6nLd%B=^|ItwIbOO9Tnf&IJjl;daa|Tk*IKcksiH& zYXUS62|%U<$QfI>x;`c0tFKsotPzQk?(wS_ZRsGSB;V_2$k0(To*jzT=~`XHv76Eb z5x?OHhjP;Dh8;QjOU=?3H9k4#+AIe)>#U9G^WU1M9eDa7TLQ<7YUk5M6M{1i!aphJZfi?$ShLT(Iv7#?Vkwnx zjS&bk`1pgt>$}wsiYuBlc|?|BLZm~PV0T`|$>?ecM1;geV&(+UdX)VwSh$u%qAvj} zC9K_0%eT+I17o{b@7B$=I1TLtwQi3gfR_ARQZo0<*CG%IaLOsC@Xvq#v(I;~>t+Cb zWAqa3V|HcP=N?o*n&05_%{%IX{TpETpzwe*s9QS}$L^>qcXV=jzcUaH=e|l|*Z8Z)TT-iuRL^7ew?nzJrU->8)(3t9P(%rFz*O*;yJXK|$p< z^(21bZ`oY+qb3eHwg$rx9DRh3U;H%0!IKA8cJ;)ha&vS_NA)JMW=!+Z)am##l^_Muq3>2&bUBA=k3= z2kHZ;s)w6Vp)AoIH}Ap`z`?uNwm*7r7qgx5?E&LFTz+<6dD!+OOn)9T zng$R2GK0fr)^4A$c?YUYXzywBy3ups9)o1sr79na(d{z=y*)k(P*0*$>3ssfM(=&s zQ`Hbg4fOL-gLxZ8IQ7KqD0R%PY~S{Zi5j{|nL?Dh=X=|=>1mSNPHzQLjBf9e-NBW> zD%A1mxxXTG`^u!z?Flm%bxc1%y%zkepJjf4s&DKp)7hCs?gP|K;yjdD@Cx7xx>Y-! z$VBbap2w`OCUoHa4(b?(P^Cm)qRNp5dZM0-x^X>@I_7@{en#IBjGp`rF_iC46^e}d zM#wcBiP*UL>k_;D_ac!%-+8OA6?wSUF_eGM@E_ieuZH^d{l0#)ZQB!%?|o|}+qRKD ze{w)6yQ7yi4?2Q0DF`_(QaZ`VV;wXd*~?^8CL^RBMAF1oLnQ4aM6%*#yXRoCJsyuL zaftUOxeUON%9OQV2!UZIk`JKHM(VGwc}VH<1CeSyt{Px=!AYnAovwk@6zSr`>8`Nt zT#um$kv(*s*(>OZv_jjJ5dZ)n07*naRMvOhBzQmwEa~!D<<_C{)tV<`j^m9xjwW4~ z6i2e3?k6fVJZMD$SE4AKzUy>^V6_wFplOFRj+#2<(j1ZT|LmQ2m|a!f{Xcu3b8f%W zXEH67gfvJ(3P^9EDJn=&5v9BWf}%v4fC>VFQWRc5MO08kP~az>NKYsxKnNi{nbgT- zdcFOgvVVW_vO-yE=mX?dajsy_gfNg(6& zoCBd;%Enc*_f;qVuiNVW+Rmsh(<{o_d7c}#lTPV4Gb3hSV5{x-hN9C(9p1jBk)G>l z=2Tlg3zaT_fAKZl%oUry<+I-i{-1q0!A! z<+@1A1k2Q9N!Ec(7A16+45pzKGjV! z>b<)`D39)^UkrGEbj6Z5&d{W}<9fWgc(};I!Kls_@Zk(18m4J-!womk(9poc4-X!P zQcC&g9boK*H$2&Y{M1s^y;^u)-_VeU(JGL$X#9|&xmSr&wIO%gC z&ORgDW0yMoU_TdKro*KdyqV#eOYXHT6+?^O&G5s^ z26r!}@8e_oKE3C3?%@F@?O)HTwKh{G_HQm_vT7PIZKnqee*t#IH`s+%%lr)Oy!gc~ zEE7a4a7OQJ#vR~y>>*`_MLxP?-2)-u&T9)9DqKDs+_8PB8wbtw^W_smJo0qE%!nei zwPOg=|0jlR=#F?fz2rw!upWbu-r9RU?%=P%x;o-*c?6XNqfdj$b8;4;T>gXT4taGoA>(?z9W15LuL037Y_$j7B#=Pwqw;!7Q>(t= zyIRNNph*M|U45pzpC%23Wf@qm*ZZyrM!ME*^5=IZD0LW2Wa%}afS7WL6y>we zv4=d74JDp$$xrV6##P^(eE&C29_gl>h#^JcpKhOT2crIMfvEre@du2ZUplq)smjmJ zcyj&r#v|)nI>kswA^YAVn1Ch#Z4An$jm0v(wehCZ=eKU$%tXUNxS$nLIuth1)IrOl zwP&j0=;%1q#!|IOf32g0LwNm4v+&&;udIIOzBT)FtZyn-LYJII>8mYF6Q58Z1@A8T zpm^*F)5FEH_flOiEES#tBX?6s!yuG#SohHUveEBNnwJ@0YHe?78_L>Z8i0bO=JjQ5l|2T@zTRDjb6QO z^CfmmocaxQj8X=hAAZhX<_i(^`N{KHM3qbH8}HyMHeeP z{t$(xj}Ej8Ndj%24Oth}9dhflP_6>kMWr){pdV=(c$T5>8PCzu0@bT5Gljt3)bd{S z7bf3#tUTfHaeI%=+xG11#|ofn`D$XZ&hfLaJkt&q6cDRx#&leSWg-Frx{_VI_uR`I zaX@umxHN(p^5b=+HCbvH^c&e!3gIduLf}V`s%gNRGZ~pH0W)jHc>I2gRC@5(S8+jz zweS8K*{7Vh-I-zW)eoXp)iKuBzteg})W?S%0gzI1!wol3TwKgW7hQzs4eoFohS7*_ zyY)vPe-UuNQ0skpO$(>py9CEm!`f>9EszFGJGq^=A3T+K<15*;;+4OoUp(|w|J>mt ze|Hb^OXZy{b>1Zdzb`J7KSoYn7K7RF)eoUZNEweeurHES?AZP3unp6%|T8drXjHjtEdOsg9RkOLP9& zJEsnxd@jZB?%MJ3O`Kp2dkzji*iUPl$J6suWV5PAadX%~eqMVc&1-LDxcGvhn=fa5 zHO$Pz8wiI4#~&S}rESN*v3rlV@cRYZ>fAx3OeiQ8pj{d}!@yk99pP@^5_G)7z4ST@ zhQsA(LgsdMEuVBKe6&)U|0USjtKo-eyGjpEJt4%wvxa7RcSR}Fja#oO(-&S-`@Ib6aGr_;k zt$!qg)kHf&65S%7g;x9=jXv)Kb8))y6?8&*22GTC^pZJ!5knI@`=C`mpGT8cf6h%$ zpwGjR==)}%D(O>=(@qMXcGHjY?%DaA|6TaSJ+W(k{fGEnJD>9tgJMU|Ps#ZE7=Oe` z$WJ-fx9P1U^(zOBu#6lz@}B(s{Nr}_<`!@6v_jE9kMtktRb!|eQDXYQ3P8w@5eT8I zT;tJo!SN8e4su9JJSi}wz*OCYipurtRc``T_lSEsi*U6%M+E)4BbUnN=2f~S?6Xjg zi?W>_Hbv!ZN_ejB_<1?&lBd9P5uS^e&Cr!e(usqOz!4Bv9-Vk3Q4~v)s8IOr4CSUt z#4wPdd{j{phMP6BPJg>C)cT>hyT(LIg+)7!|tmc-s{4#0wubLoqZjbUDvJ#5- z9i_n9*s^uooOnD=z7gr877!?5P~X-RlTob_2JZ3qU)D9FoZsdDuG3gw|PHe-}Y zsWj=d1VK+A92cb&QV8;dL9($UoN9>eRWy5iYwHW|m3Yd<5IG%ICQCukPbOnyZ?3O! zJw=7j#F#i4<$4IugY6BFN+AqMzTZb#)+LM}B2CJDeq<_(KSu_Il^}#9=D0Z98_8^M zKp+Shn&2svCKaxrU1~Cs&N$~)Rb6Fi7KS1G98QZ@{zi-ky2P5co~~9@f3#Cp$!$%2VN4D z$wI)diJ9(@-)t78TnL2`mW9gN`aV@2c)4my%D_SrD2W^z4HuW^x%G!{{PRDiwtP?% zFoYx=%_HyNsd-j)Ab-TH>C~*PA?OQGdC3XbYuecO_m`+DDWR~W3ai4PXv%neuP@cr zx{O?=P514cvnEBAWSSAA?S&O|9Ws@Iv6TRf8#98FPW%jyJ@F>-L~p)UG!o$U8_()T z$auEPruoZAuCJ%cF!ebaqB_*B!Y~YOzWHVf3JSRJ!V5{IcHcm_?W!GGYX7Yme^?|CD~|_;Ulh7GUxTWBmq)@#D;XDvpLmm$H(NCjQ-(pxxgleAxcGu7x8L2x=_iGlu$O)x#S@CFe$v4SbAwFS%S0)t+35642k7ilB$H|o z(K8fkHafJmd+a~+qpO#?b7ii-rIW)B?p@EJ2m1Nh9bK%g8Js86jq&45uDvpkkyU0- z`Ru*`<3Jq0aNYie2cLT}h2touOd5QCElV_^V;FWP62MJpOVRhy0)^o)65W4ZhmNb* z6At_lup?4tBHAj_gHTX#`!&O7m<}XihRT%bMs>Nt<>%#b-JSjVoFBc4Ko3gvIP6i!b+n1Di2;GS;K`Uxb&wcNq zEBM@j?yURJo$LqDq>PJJpY$Cv=%iP*(~izqxgY&de1MjaRrWd7BhfiF4e0aNOm9X_ z2CW+Di#B>6mL!@ix&^J;nMZGl>TYGfR3(f7+c48|7VDzvi5K!^O^PXBzN^U*J~d^GEQ{}Ai>RKjl}#*edhyQ1OK zj?gfQz)uGPqZv8#c&2@E_~gA$3u28Msb4whYtuAEAQ0H?7C+mz5ke}Z`ebe7ph8j1 z*)uTr9)l6`O2ueAQ*5ZrK`| z)~v+MW|4qjL7C&=+YJG`9~tg$w5p_EmJXiE(9+Ts zsVgj;`=&4hT^;d_p5<$4Rc^j5EP}41?Jvk4V$c(UHd7L+&To{4Be$;KTpvEJ~~ZrNTsbikRaPR}N*$C2AW8pGDYH1Y>ED zY-&Ax#O%FSES2I2M>$wndNZbp6q11F;dRAGtxIADd=%yt;H0y(ceGKE&EU@|HY~@* z@DzR_ah0OgaX>0er4=I)4+@kZAq0WkGiOPIF~KmknH09`&?yxoJb^@j-$%mElExt< zWY1Ho09z@Vr6MMw$dgz((pdp<2^py{G6}k}X-NBY5U*u|6k2fBJ-1Rl-~$^`20&m zq(OyY5eXL%Jn}#azdWnSYwG+)!PwEKm(JMds>GIhL`gBJ{5XzbFzNWi@Q?AM9L1QU z52b7QX6TIRd&ce4bj)3Y0D>xE(YdLGB|m+Xede7+UPUQ}-{9t}&tTlhGJf~qizHK7 zN{XZW^qMm`X!a!1U1>beBhlDJ%}ejo^5|O>xe&GjC|g&P8V-4Rc~n(ZQB_riVHixF zJQ>gPSi4q-#$S2mmCTqigCGC+$BY>>1_0M}S+{N%N|${M>^&mPsG=a_NLRpweiNZTH7)C}c*-xUa$cJgdu z&0nQ`^TX|ptXS}9`i&#M>OaNbr@xd*Db_4<=xWv1bM+#JhK(K*4=@RY1Wp!KzG-9U z%1^I<*CEla7(de_od3}WTdujWgB7c64mr?IG$MF+X_jRxY!*KE(Kw@B3Ht3uI3)Pl zwZm7$y6ii7tXXF>=coq0a6*tsSTO(PG$qB7zuvD^E1m~a53J|#gZ=C?*&>@&Jo`eL zSu=b+nJ+uSlg}mj{0YG!ogW_tM;sF1p5Mhd_sm{p&Y=hTIsKgMka;qFap`x4Z`%CN z#jP|nX;n;Zoy*hnQ(SvxKGl`~Qpfyn(HS&XqWdG;hMDg+bS%gB*h9#CWbBBPxeZMs z^x)EO<}tEj_?uynQf4Qel`AgDd;k!`r__B|4*QAvhVF=o3{)ztr2Z68VXJHmT2zAAL*Zp{VF;%csOiCt1X7Y2Movq zLi+>z;`h1FaEJ}Dj{}hahAPGTvmv$zy+O)DVMq40$8(>d@HG9^L9M`9eg3`+=-cDl z*?sZb+-EpU>GS_%cQD^T+?M+chsScC|7v{q%62kYg%B{Z%H+@kbz=P<>}HG@cPIOu zHYl@nY)OcsuthTKQqz>cc6DQ~vLHa(c4!N7ECI0?0THkwzm}8T1 z9h50>O#?>?QiefF2r^3HcrMCyF>M=V+xQTaON+gv9|>3jq|zO32ZchBQHo7ohNSY4 z3c^CNm-J!wu`KnaiVPuemBLesZOW#rJFCL;@FS>{7CrvyR{M=p7>&c-;EDdVoaYWR#SKFl}5)q{$@5 z(0Lxp#j|bNEDKi}_&hskrcy%sjjY#0&nZy0X5fUOl@CIY6+l4*6_hKp4PI%(_J;fr zf?&VA9|Z!e{4i4wn^M#1@|*|+S|ViynSf!aP;ppBEx#`yq#vomp65lplv7}LCW@2w z9hKWxZW+_QvDQC2nI@n-ysS;OB{9<~_CMEA6vjyzSouW=pAR7gc3T^59qqJ<1Zn)_ z&6-HTQ8SQjDLQ{QpU!lGv95s$I4ClP!tnbr@&dW4U6Mp5L$;%fR;l{YpQg`8(LQ@) zg!3ur>ZEbaI@&W?l$4Zsf_5iEn{Y8ri@b@I6waJLdR-F@OIA^zQv`*Tz{rJFi=dBi zNio8MY&t_a9>>e1A(NoEOVWjhBf!iHQ#@`Ah6{|&^<|jp6qEdYVxE;p@`E*W+|g2=PG%nRl37b` zZXn&&!J6y;f=Fi=DJ}TNVpe>xf~@0E76Zdo+8UD?qTiD{h7pb+Ar-4u)$-1~`zWXy zL9{RrpWjENWpdro2ZQ5cyB^!0TfyHRUqUjOCe;}y9g9nVmD^)Iq)a^HkmwUmKWB6S7aXR=n(LbqTzTAh8oM$d zgOmX(_YF~4eJSmm{|a~;-*dkA2E!)$?9+36egVi(Y;U){kE8eZ)I4y#wL|goP9=wlRg*hslv4H6pM#{H$1`e zt#cyu{b}7<(C=Aa4KrL3!~f0o_11*BM;p%!87loD2E^H z=kPvCnGt0MfB$nS`FWzB66rH@{QTQ86USRz zdu4u4`SO1uGQef%LF(Zuw1>jH)!b>cSo0yaO|323BJl zh+shQvnvYt%6A93Q|~~lD|Uan;~xB9!Nq8s&_;B&&9Ug*n?3jx;Qoi=oP1)4DU&R= z*SmcFE6sfOf+#m!^PdoX@*jdw-W>Ki zIRc{xhDodR*zTlRmPuho!i=9ffxV}U#vcvhiw2OUaMSIHcbv4_7OjjPsgxUZ9Tz*B zArni`v8I8Vr5o6oNHIhBsCK){D1l>0HVYRa1XHR;rec+)?+Tx+@UPvvm(kiOT&3^@ z0|+5Vr!#~VghEmB3yavieG6I7!!0V{zytU55{CDdOlBt5EnZpL(iLNt2oSNeD8om+ z37wGu6OKB7^0`$Y!A&?*;w{ZLB)29C$4{QhoC6!!`u0-nbY@e$Giz7=9b zUVq@pk$Gxho29!a+IyfTf=o6;AS5aU-ec2`obmP8(@RJyn+OI7iA0d^*tA%Fit{54 zqbiD>*tXU}Bb|2POW&HPZ?+;<5TDAD+R_{V z_7@}aXsSz460}ePoOFh^bdo0FP_kEs@bnwqETtaA6Q7iK4FYs^7dLhEvzqipL zJUXQ=LoY4Ggd-dxQ(cNDCtWowEGkF%4$g*VMv4&xE)=X z9qpQUHhtPk2*W&k3fv3^P^AQ(=_ix)NUWSrNb-dwip6MG zAPsF<(iSg|9#QWAQf9$|1uR%FFhZ{vAD4U?4!?hM>kg;?X5kiovvA9>(|`2j+J1jO z_Fg@Yy;ncX+#dt`oj#qehD&Iv`9&&4-P_OGFP-pBbzZbcpTm+W$qi2q-}VXRi5*V= zsIV--(T4{(`tYGihY@84r+#s0dlA6w{rcy+>@4WFZ)oj6R96~QR}K!`-EW$2P<~8b z6ctLo{H5Xdapv@)msJYBa6*uy4%;!|GIa>6&_L`p)*LeYc&Gs3;f@m^;1`^BQtz>h z8D;KLF3!IIPoM{jPet39`iA}RN7Da$uqo=-5aW0EBl6kPeO zUgBo|VIGFQ`0|M%e*KW21&jOfFMFXo)jLuYd|GfF!^^q$;NOQQ(CLtQ=!!>|GPsh} z9{d||@`*uCK2iSwO`d4+{j1x#?g#l81~j*LEPN}C7bA8-rVF9XdL_o*(zk zTOBrUbvWV>{lnVX<+1dGY|q~SOWx12e3i|pYJ*`(V8(b#sZSmr(DFOk( z33GRx!v7zI!Z9~9^>c%Ux#sIHp}tHAJ0#I@)K69SV2wAP+`a_*YUFO zki;a^3!B+<59aXmjwMtPMdYjzp6l}b3-8Kn?|Xd4#x0Fa(MVw96Mwlnvfs3Eqd}Ll zbsd`{8#-D0%YTqrwgtoR>xda4Fnm5r^F!p%ow224^2o3I?dUpJi9lDf^#||&`mf)r zY1qyw=bV|bvt8-ce|RRp$QL5I-y~IZ_MCXb)qjqv&ZPSMSC3s@cH%x4+x3}EzR{8K zT?^+txas##Rhcav$Z!N<8Wj3WVk7d%A6@tXhJ0HnRVolw$yoc?rrJhn`UUxUK`N>$ z!Ef2VtW$tFEP((3AOJ~3K~%qAq2uyI43FYJIo;0kCq3_`_)PQ}y-Pgb0NZL0RCS02#WnJBA}7Cw6b)8)A! zBuNSWf)FS+bZu`fOuJ6B0*N_5=_P>9DCIF4BuiC9IW z%2Nw|IezPy2_^T1MkG?t|LN7Ahoj-D@%xVaR@f7-R~DC~+Zvj!h~p421f84eQE94! z1rgd;ZevSlf)N-frRWqc9uO!I6c(olhgy*-oiP%vfCk}Gs&tjEgiz#_g6(U^7m^*a zYr`9!uWH|5pb&&sa-~pYm50o8309>sta=Q`z)L8KtIS>+tUGL2D&plC3PSB^U;Xl@ zQeyPMZdtm@3mZ6XS~cVf2v~|hB!=Oy$5-e_Wfh`Ykc^rb9X3sdz(#>j5Gd$Csya;7 zveXS0PAC{@MyjhzS=G>r14yB_?x9egr|nA6ON<$^*E*!UJ|so|fl0BGieUmMz|j9O z80tYoNGQxrP&vC|zZLYoJyq|7kTTfIc1cJBTl(;ni|}*~mM26{7;(3*P64J;_?1U6 zSC$;5v`R=yKDNi>|1yflnv{$^mzJ7)fXuoj_7#7-HF4Pg+#H$s@7}fls}KS%yZFDN z@aew_=b{I?Z$n3DJcf3*{0MDVI+^~}i}&CoU?@`N+w`|_aOfOAXM7<%#H{@x1pMrZ z;XQ)G;f@~_GW&}S1IxAj7@gJfX}`#K{JVEx4~9f7I_P%~{sS;(ltDV9NF+U$t*|-y z%w`Ul<;UlP3+A=)(0#>x?${tJ*VtTqMLQdo>R6>8{j`%m|1H6m<&})8HhJvHB=nCK=AB8Qrz+D7=eIb>}Zo2`&$1!q)c?g ziA*|f&QKM6>N|T0aK}?D+StK42aN>agKb^Bx3!CJ99Yfu&-D8J&pxo4=Tr4GkyO2`OKR) zkMZNj4@1g`o(_jC1Zm}w9g)w$-#C(RRd1tBc^-d!;3=-Z<5|%eO9y~av3Q!#o_a&) ztIyoPq`j*VLSR}x%#o#xJ#jX58#_r`79!}=WrIzVkl%;b9vkuATW{aHfi5*?ugS*L zpaif4}Sn-dTCk&jKxO8Ki7$;*|NT|Y|9_(@5~sf;OLPP z%!+*`HC0qpRyiFBvW9^X2#_g`VpNtOJB&XRkNMi2n>O7a2!|=~MIz-=bS!N9pfj57 zN@JCm;rV=t0-sMzjg*j=wGk#@J4BNy+N7XWnpE4a4ibUNK|^qn+Rr4iolJ zv?O9|e(+HQpo(GKme%( zD34;#Amya7{3f9i3&RI0r4T_7VT&!oWnzv%NlGa7Sp>r&yiO6!8kL8-8Ig~z6&mT> zF=S9W2|pM>Mx`z`78IC~0G<#C&qE5KNlvB6%MTC@MWpSFoEA^mrH+6^$cKk6@+?IJv+ zP)b*oR`d@77gCqJ?pvn0+p-~qCTyh8%9Oa#w z@=X71fqSkm!W@GA?~55ze4Kk)g!>-pSNJCiT#v5avj=;y2mfVABo*x)9?dNtx7-| zTWXz&=n;cY3k1;-x3bq^!wv(DEeSDubUwvlAD138j(LCUja$0^ty(TUW*j#>yAGuw zXc>HYb|q&&u&m!YJ~OV6k%a;Fsf;qcIWYV-b0tBQ4tR{mmRLIiW?TGEYV*-wCbMrm(>5TO^#b>g1 z{ttfgp!dW>SM_7S8j6BEDPv4+N)YJdvlqbjCE36#m6_~RSF3Tx$T+C58@1??kV$3} zjv=?d;>PzIpMWEsbY~>%Y+Fl~Rk0Rf&3~cXhVtr><*8BUOsQXVj*;gsFfS z*ewkRFH5E~`PnUh_|1#vA{EONX9K~K;zLL77l~|Jx{y_GET*!w6sApW?HCc5{#Mgw z#z-F~;PX6OA@BnuT%~Op{Zs%u$&~phgv`GH3DZx5a#*sp*07rzEnAT)GR#0_JS}`m zU=8X+_YG3j{nVfkl%{O{@#r&Sj`bb=T4{B`8=htBdF3^>odf(U`%v zV>~8efBJuwAy-kEaY?EyYnRqkyY1su}Vu|d<1 zQBaEV8|1}e_*=GPL=3`_Vx+S0;!2Ar0w&pg!02Ub`}hU$OIwe;iyjhLeJMOTwNyGQY1ZhR6Ld<5Rtfk7gGrGghVJMQA#MK zgMdZ1&9S>7EF}7Qkbpq-&Cw7-lO@Vw5RvvVp#~|rRDa^9Z#&)1=Bk(Fv`0ef=h(A* zl|4NT``mP4q}u~?!X7w7c17;{PyAg6_xM0t`Ll!Gdee3n$M%pCF$tu_oH(zI&5{QN;Z42 z2Yc`zj0?ZthGhx-KEcfCK7M;g35`uIYu4MGduFdP@0_nixcG{8)^Bv!XR^g-X8U;Q zwKNAE;3qFna?aPn%zr7x*=Iy}d10DwpQj5z{o|E1BdZM_e5AL?RyZVCyrg%uf6@f& zV-Yd{8#X!LMk@?I9q@-?#;H4;Wo$`^Gxo1yaz%uOt_0 zwQ|yoax#v`b1NGAt>ZIe3pjR4DKkdq^U9hQnqwc+&f;W-s? z&Q1(hAcVx1GYZ%!!ot9(1P4!Ey-N76|n6J7YL@+QjCz{IqGfD#nCE`Fu35E$e}$UQsfC+QoQ zVd|0eLF$%I9~lEW(m5kQm?mF5@5J^tzj@>86}9hAuNrYwXl>K?I^X#ql6BGqgxM3+ zsuy(o{3{80icyA-cQLT-XB)TI`=+El zM!5sl*#kjF3OYRpJM32>%fH=r-4RyCAu#ZC<~qin&%&HICLt`N#xrD_FtCF@zuyX4 z5i?*GMuS#`*O>~YYZ{QT1mj1I^2{-nOWn4_WD!q>{Ftb$O~CcYv!QM6=24NtqDXwx zHk@>tcvl-4Q<6@nX?1O?%pgXdiD4PNQ9Gv2J;|cT2wh6i3i~h$ObjcEKp+eQBW94w zMI`HMp>Rxz;qTu!lmUtBw{Vg+J|L?UF`)?L`7jIgb`38C1&U}XG|)j1P2wa4ASA*t zunetu^eh+Q%k*?llS<)9i4_bHDk#8nJ%afjD&-QF0lJ(l5`hpx^s7Zn?s&WVvVxv6 z<~se^&5DgUr zg6HIF@d|{`L=8~mytI8gt8DwCs;a7scIV-_uFLAxs}BQS?>8a8;yUJhW9IJM)+d60 z{&p$twX*@QzJ~A-XBa;`WnS=KTK?Kj!!OQ{-HEOoI}lU9bx!oVUpg_k^U_3n@E?T> zzu&fbW34kNdSn-HCOWdDH1~HK@EzdcVdl@GtKjazCxE`B%yb5*Qu3pcn?Hgb>7$^m z*x-lX$>Xw{I{JPs(e|K2*!5qy0<_<4RiE#^j3#)F+YP(=X~#6QoGjMoyVdC9|L4DD zkM>{>hQObGQ{0m&(~b2T^oVdI+}l_W1_Y+5^I`zz9ueTh*U}_Yin)gen0rKkE3WO} z{pDHGX*eJkHrLkfVHnWf(c7!pf2NO7BYR(a1^FL;z-Y=u>(-?oWdHiHSG0RzQa<%h zRPQ%bHMAbQvZjSs*64us>ps6Xf4^`x6Mpn6pzTOcyx+iC2UfFST`OlFRL!3k*Y#9r z>c$-}Z{m)ZH{mxW&t1Gfx12JWZ#}ep(6)9NR-g_&0@DwHK;Y-V(F4B^hr`@?=bbEF zx|I9wyKm6yd_Ety-+nuFb#?sW7elvIPM^BB+OMfgjI=}SWXN;udVC0Gz7Gcns>mD{Lhct>O7rq&2HtcVo zHRZ%s5ldpYE;Vb{2ao#v@$0Rs3YEdd8eR2#HlDd4(H^G@k4_YJM)CWnUf%1BlH>0h zB`dz+d0wv5t6}B>dRMPnE#j!MB%(|R2q}dLKEZ0$1xF}3Rq-@7dxml;gN;~Mm%f7Q~vY>d*1ZMs0j2oA2uDR`qBkceuTVD73#q<6!y84i5kBy#u&{8$SI#mW4Fpz$U=#xRBq`>ZT>HY zY--0Z9 z6C)n?_|~~mD$5N@iX^|dC&pn1`LQhh&Y3dNVoR;Vm6v?7VQ%Fkj9OsHC%TbcMe*2c znDg~PL+_sO&(JDd8K?`zw(q zhlnsP3Y|!z5C}|k1tB4Xrg4O_Ez`7$3=28bY4V(2YeQd!$A3~eY|uSz&!ZS)eWoq* zsBPPSZ{9rmJ7J&s)9B&hYgarPY*#`Q>5@NY?ppP^ucQS+k`RJ5D$CxZN0Qf>M8r}Q zx*kFpD4@>p=n4lgEECZgr$Cs5Jw;%+d=a4u0;LpXhD8vW@Ir>?Ic~AvRrm&F$#^Iv ziFMnl`OBi~f+7Dgi+3?QXIN}Z#kOcOVYCOn2Z z{R56eNr}i+_i-Hu3lLJPUfkTg3LtDTl-t6!6mAcBqZKfHNzuMr?nW*#r5|CWuK{FL z-*%@kl#(K=ygrdas#ifJa*8p}2BW(Su0of@_WI|(d<=Bkrc^2emWeP;lutpb&%R1S zlR`3QDHIZvORFKNk%|`6BNGi`=7lkRCYB*`v+3u*889&kx`ISUlC_;(3xJ8#j)XD_0Ja@ActO5VAOZ zmM(dnbrqXhk}TTTPR8*D%~Ke%SiGr&*VgUW`O)S1R9EU_Or{j`u5Rb*@8?lmWN_&Z+bJrL+Ga z=D<1q_oKbTm^H)4H^1?zsHpTsG$FGFU7fbOV9mq8V&IR!{=i`0_a1y==q6=O zL90=Eu=iM#dH?g_c#M%11|utWox~Xk%M{#xO#vtVPxHV@x1xP(iNQX z=<9in0Nue_uhCyk0x%O8gANy7#E!=SCjnE?V;3vXH#X>Dt=T{|P=~&`yMLkmz@fl` z+`mQW%0TV8`40qYfPo=hg=imN2zZa-t3A!kZDSVt+HTA3*9SoN@a{;U1g)ky0!RZd zpj)2@pjAeT7#y%X4xPN6L@RD~b}jZ`4?Z;fe!;iD8R6TPwR7(sMOYSm=koS`jez}U z`fwb0<@F4Y{6QBNntMcmyM7zv_8SX()^*v%dF*>oJ=fpT*;8h4=?7VY0WnCS^Iw7} zMPt5B(T<0~CRapQU9VpULcmvMSF)iw*{_`SORHOGPue_k-b~)x+R2LTy|2oWhz}v? zu`7jq249>}&Ife^U#Fi8^78Vy=bn35vt|u9-E@;4P40tGD8wCi+(Bz=E7x3e%^aoEPDiAAgNG z2Teuh><*seQup3UR=&2J(S64`a{K8jMX(^U`pDB}o-?hjJycjS;?%_U*f+ZxTYM!* zx*D1So7Zl->gWqT`}OKk+t#dG@ZK|TJoh?EDLhZH*S-@LPda4$ccyGe&|#lZOYYo9|($sK~#3{m%xc<*G7sX`;--zV5S@lX(BDFM@`@<4?C4X z#A1+&v*Vw|Pct+@Ru&BxC$@KeCe_$EE>b@6a8G#~EhV;^fZyv@!U!Gm+mCqCv_eXG zJ;yM6Wg5lioTVziCKCrw-d8KIbP((zq|)2h-n^WQFOe`_g;j7>(G_|;H$ zFAXneiE#{>R9;pkIudySB&IizlyLw_s=1w|_dexs^O;9&vgA>oAt_f1zmy1{4`~_% zvkpbE41Q11vSLkj=lYG8;kb;ldlf$dZFf`3!%M}HQZd5w$hTeM2+ctv-HTH zQo+nK52keND6Fs_AqBBSir3y)$;R3yrcW8o;Rj8@loC9Ja$K@)8JhpGlA6a}LD>#P zDIEwce0>L8`(Mn$!a|;Z{(0Kk+Q`q(=cb!(>PO0$rpbZ@3+U?VA`}Yot6%+Uw~#XB zd4BFaa~gkMT!-U&Tz>30!akGZ|93HK8sg*yOcwv(5Ng{~ytBE3M=zMg&*s-~`->Zg zT;Jr12ya||Ft4s{VQpiAN6wqc|Gu(`o1Xs=`#R^WNpx(#o|c-+fcBMdI8QWea=%|b zb{Mu2Sp003o6hK>v|7?s>oMafi(sVpx5KsJ>d$t9fEh>n_|+wG4n4)sIXCXS0L#ws z>p#S~_T~hR1zQk;2un1Elfdaccq&!xEjs(fN`kEfnbaq};`SoTH* zRTTzL&rcCgs9h#yzW%LN*3~#%`kg4nMUs`PZJvE0)kDf$Ft3fbmt?v8yLptAO4h9F z-Jjv$y71$hI(X-m!2?6v8(i-DW1QdoqKI@x@#^boe)989-kd*zyr|@sJG;2#!e~#0 z&%gdX!Ji&Z@R`|u&iR_&=39$1{OREYcmAx9cwF(@2jWD+g0G$$X4+K!TzDQ_^^;E8 z+FcHu;~zxI%)7dsXJ1Is+2ws2NSTqq{b+^E3H0w%Zb1k4z6|^x-Buk!c-$fH%DKr`KBJd>o zyob>CtnZ-%me-<5qn`kG<<>U?O`0r1lQ+KyE<~3j8;H-MiK!FO1j~zPQs%E{wbAS7 zvSsJy_G=5;w)Qrfq&XN(RNapzh*sy;I}f-Tt->h<#-r^7d(=03@R4xxi6N>ghVDe( zdVL|KC0$(l!*(18K6h-8A70k0cCjqM_rDz_o>1iH>2}WPCx_VH;PSa+dm9ELs|=Pd zEa$qPb#nUIE%wK+K+fL#?7en5=dAUt-}5~Clq~_g^20^!>PoVwJI%C` z5K;&(_`@qhwsDo>t`&Ru(MM|e&wGbTl4h1ic={Xj*w7RsmbN*xDvyoLF@Eq+J?{q2 zIp-W^&YVd>K>-gv^iXd34L97t(@#Imsi&UG+_`gUYir}d2OrF>zw^#J`Nuy-sm2u| zD+$pEI$lI@rPA2+zzb|zRnLt1vnZclP9QIY7WQ-Sv>NXH-PgQDPJEU!52@zYzP!dgnt6Wdcp%ix7#IeQ&QMUj9 zAOJ~3K~!CYohD#e*&*j3f0+*mLXJzYBT?MGy5+B%;%!u&Jfpa{Gky847xsKvZ|^Dc zQjz-E3NiHblmZEH6w_wTz%W8Ll+HWoW3Sx&mq|VuVhWJN#a0k0DA-k8S9nq0p{HI} ze`n-^rpI5(Z;Pj?v|Y5(E}841H1By5x=1^Dx~oh(FNh$gNfP=1N#xq}N!X(tOwFJ# z5I_PM$H5UGZ3pQ%C?ti^5YcoWMM4Kx!yn4S7u9hR2~=`Gil^c!a2-kq$<)G@jS3iE z4T$58AV3kINr6=4$j{MEPk~1+4dz1n$&o=sifcKTgGd<(qmw*|n}RhQcpdC`>K*%L|cZWdY~9i^Gq9G;} zhIr`i%c+^@Rh;;XqeLbz!e3g*mRlbpoOB7kL0U&F7UQh5&Z4cYZPf2r$8k94oO5Vy zZst#a`qMu5^;Ynm2R72umq7}_v)`P@PtL64!rNZqv&Yt8IxeUGb|sdhShl^JKY#Wx zZhn3jiOk5Z{g2P6<*AMBTzH%Jd-(TPnptuAvD~q|aY$<6J`pXIl+}Hlj%`;1ojcas zKfdqkhYYW8}K}4 z{s~-yS6wn2&qdn6BS9_%?jGehp93z%BYB47Y`p3d@cIg34Ba9BmyJlqDb_L_fSmSt$_|whBW3JOQ`2IKY`2IJ>mL2`%^86vM7aZ+p z!Op$TGXn{|zSL(0AT zarG11xMNu(dwYha4ZXOnizz>NhJ!1;j#6u1hS%SvDj9%BAAOXSD_4$K-rVdJ_bpwz zl=}LS1W{{i>xg9lxyV}~5spQvC5ZcUYNemH-JPu7wS*WhN=jV6j*>DL87rhfD222g zNSWZeM377pK1!t@T?itsOHv4&?BG)ug2Id=Hov?x+Jh4fAebn8Oq4!!A<)s7oVICw zcAXHAHwi($^rH#Ebm^yccPo$G{nucJltJBfsX=49HuBle_zi-G)N%Mp2NRf4frG+~ zoAfqxZ+ZQhRg;&mea$xwACBeprcx<3u6vCDe%b)(dZdg}DmM@pfL|zT$hw>e&AWK- zaE$eVf&hwKg~(W}y6>NC3rkuKIp{N;F>!eFlPgc8y$jhN6PzRJ2K~e;uTrK@KutkD zw(Hi1%R@!JaOm6>i6onahK0g$72U7CQg{69;6*db3chN6eD15du3x+R;THqFeQ}CL zZJF}O7Xi2`qf}H$#|`R2AO;(-I{lMXimLJo7Jl@kxU0!!rY85Aw$m$=$ml{SO%s~W zuZ4mop(7k=AHDH=w`u{Yp&15xev$Y5DuJDf=k_;5o-?Rr{cv41f^l*2I#bH^Jcb0I zoGg(s=-o;w{DT$=JfE2n`?Fn4$0eNetnvOM+>u{vnT$Eq`Upm}9|ca*L>ol>XhMuE zs8I^X8JGxEE;>SrTqRDySJNh7d zC;DPZ63G;w|F7$L^5Ls;vMyl=%FjB8T`#Sq`{hPLZxFv~+xDnN>jRfp<-VWaNw`X} zW_K?~PxfRbADdIo-(P9Y`Jp|r-fQD=wZ%NXeq?)RmPh#WOM7##*EaS7u&B0}zpmcb z&|?^m_|!DoxBZ&7Etdl6?Q5MsZChtuIsGtWRLxPOz`MSw_~<0}s>e-^KHWzk`@xug zm`>S5jnz+?ocx)$*M|xC1uw5PNoN!R{~Oy)_g z6A?VGlwZBY_itiAVr1e;j{1MGPQxQ~E*Z3a2VS+wXr#<5cqGQ1c$G1OYaxq(&j3^K zn83 z+5eft1B{N24mvtI#$4as-A#A*2pgI=KvpgwB!+T9c)lxDnvW`cxJr@6#Wu-GCi?$8 zNF;^`;MXKtR>mQ+WJaOwqI5}oP!BXLH0J6dGRpN*j)X_<=zt{zdFbSg(m$3$P$3K| zq=Bhiq?VoeR|=UW4O~1EQZr-H)Yn5zR4^r+hp;8lN=fNKl|Rw@oHJfuyZ+)d3deF{ z0)>?^(WNBcg^1f9e=EGuB`J`OL(p~x+&w;Mo-%+Ck`Bv6I2kf&lRK`yX;O`=Pb$ec z_~|D=vJSKKS7;0!DD?<|Fnk2Uvb$*ZqcaIFw8iQ2m62^2ne5!7vKpxEa??D<^6CH9!s_II;u|5=sgP z%&B~&XK&9hte#Yt)FQSfd+oGPZrP#LX6;A5mg(DcS8@BcmK7;fZPH8=Hf_wlt=VIX zZ2U0{Ay9y%6llszkishv!Wo5>ag>AMcy2|w3PS>xGqS?SatIGPhR9x9*K*Me;i4Q9 zA$8kQx@Be1vfFA197mxna7`P_N+UH5-RCFWn?fH{vxQRGY8|D7axx0dP_ELP)Bt%S z0VC(Tq7b;2Lh8zOMJzo)J}aR#gc1VtnpE&KRgTH+26%n4Gdd?=24dIOEV#p4{MBAXFCkY3v%fua2u|>P=HsI69Hh+?!$QgaK)DO<@q9 zE~y@4`!Ny7gYttuLEAP1-1zRzw)oRel6^maIDf*M+mVOPW|uiLhWd4u)JQs;MkhuR zz3zvBTSi$`ZaZqoj;{Vm0cT&_L0RoyJ~ZFYvGe?V=7KO)gRCelOVO~?#&O`$CsVB7 zWO3s)qhFH~KNO&D`sfuae!t-Q|1RX~-|ObOn_?V0&(8@916*>ECzX;CZus9KzVgj3 zZvJDOh4cL!zc9ch7lsLk#wLs&emu$jckKJpHte)f3RbSk@Ys_nZoI~;a5;Wqfa|kl z$qOqo%sbM@v?)45z>ZxuWu+RcUNO1qilP27lWKGhnrZO(;xxw{>*vX5)7*4z(FjuJ zn?LN~(u=~(sC|1Wp9csM_&uId;*AnRJAnVetE%}gyo9E4yu;986bH5UFWydDhkKw{ z48$4~WnUK#TK_CV6PyO)GkBFGXW>1xPvcd{XuykjGM~TWWxam`k5n0q!6O}OSljIE ze)`E5@Ft@Mx9vv^c*MLFjCL&sx5;L}Z)mh@(+J%BHjY1ze?vG5(XjJ_H&A=KFirMd z+x^a?9M?LTEzgY2RD2N7zHQWAi*4J!eZ^wGRoJ!-!NFel0FsynC6K{5&r@VPG58%z%dT^B<^Z&t1mR8Z`I-*s`Mq*If$ zD2o@}4D}5=*!+hSmzCJ|LRx_1IPrX4XSNZd$dQz&tf^9lX>n8BjjOYd3x zt8Yzce{K6OTbkO!6DK!~!53Y+6CMu1_M+)L>F3+ZL(Oy=5oQUHg{{iH6SW zl%mZP#KLK_M`|QOudHu<=IXC)6o&XiysKyP7B^D>_&^80n=b-{9S3v`y`U5~oy3h< z!z!H=DIsXmHA-zadu*?xWZDj{kIl7rzi7(rg(T@zG-E zZ5un*1-gb01IIFv`oO@swY?Y9v_~D;nwGjG$y@6q>NJPtPu;HeFw|b z|NI18r3m>no~iHPXODXGl_8%-W|--6+Hwi|M*l9qVaZM&{PK}(ZA-AdJ;C=+pH4hu z6ENPwPyCUe4%4{iBDy`5|CZG@D<3mC=8QLQ(3?prjA2zQhEI?gBWcMtIRwuGas-B3 ztj#~lPs6%Oo?DjY>7{Azyf@A@zw6`WXUpkNX=>c-aPrw+ z1}l8|vk}fYGsx4=rFrJL3_tuu54YbPXW75XFbu&Z7lt|W)F4kUP4mq2p8v~Dx5rrZ zY&pTe$j5g>y@hGQVTX==U6mr&{=BH<${*(Q*-v?LrsEg-`Oj~4(bDGd+_DUdj`cn> zix&7<`eKGjH5$6+c^MAJr5A;{^WHektq!N27|6-#`|;#6XQgsfMbBk}wk^YB9N!8Wvd4Ocp@zl#LO-c< zps)##RJxXta;b5QBZvF`p7`qvD-+A#>vp``u&jMbD&GyX)4pv1?PHn|3gDfMpgJ%} zjkd6{vGMCIEiG3b=!1Rq=tEDL;0yd>$beVbGZ4DOkdjIP8*Gz^p)tKU!uIBNHg9gEYHkJb zbQ`Jm?kN*evnZ)5VOMhpwyF9IsSy>DkQ!vE>hu#~K1iptq|A`k@IfME0MY_%zri7& zJ@biBLFCf>nUT46GS!sc62If+pWZo7wRdF+85mv-)nDHcb``E=;g3ic;QYV+&0)B# z`i`N;ZNC4HCEZ(hCk($YZ9~{r{i#ZWt4F-UxsKzMm86u0rVUhF4SOzxq%V_V^VTgQ zfop8l^(p~OwQVn^T55E6^|^L~K0C$kxhZe1g! z6nU;oA{)gV6dJZ^;dI*w*|A>WI&R*?1!i9gX*ozF=n}&fIJQY9nIM=K$;Z&cZp_8* zHPHt>+Y+zh%t<@AabKY*oNO51OotUJseWg|3+oiTazw+}Gs*rTYKR_!Y+jua>bdVj-) z%fEWNu{D>3CTM&4d3u-v+;1aHTdIwjZJ(HcC`!g0D2HgiUPw!;yJ)b0SU1Xn~*SmZh0kt+U`5KmJjqUFV(^;u}BcX3I94-&|EVV*USI-$!AA*9S4*p5dYodW!PjQ4ED zbIukFq%XZ4Jc4KPdlw#QmBRC(DF*(GXRf>k@0{NsvB2YaPwvp`` zxc0`rAKmoF_>FJ8$~0$_aMo)3$dDvQiP6 zQh?Lmg^8O$Vx!Q9n9yp5R}CXPX$n%yCd>5uYz+T7?jLEqFN_RFK;e0@>Q%)=>hf-S z>F;ZAd->iyXU{uy#_jVCpLLm>K54bv(Vd-27G!gP2P#RjvNS2cvTQ69qp9hZP~!t_ zS9JIGE^^YDd}%sCsf15c2%nNtM+JrBhPFSxRPWibOW2LgMAhJQA?1->(m-=TX$s}I zsu}Q0fjc;NXqaD0k?!Z@DN~eN6iLJt&2dz(<~VU*Fpw^+DmM>3?a*FZs^z_#+G+&@ z=}szpPHxWFcIY#zD}_J%SunGtVi<{Sr^%$#M1&AHR$8T9`Z{{i9T!)V*t!N86F2T4 z6FyW3P55-pHBHRK&_S(+z)fc`WrmM7HXeeJSt@K~Y`VWkRtf-P$d>mTdd_ z_D5e76E%hCHM=(7`|91vr2VC7bEie5VTAm;!K4$9B-NE*_sUn8JbenCy{+i&@`U1& z5(~?sNNC>2Ob&08jiv-UY!mU1)f7&tAX?@PtY_9$Gw-MwJhyB;$>abjkrxf}gKvDC zqQdB)({O2AvK4JhJ5^{zg%}beZfJ4@nRlQdgoxoya1MgpXWxHUXNs1-kwnXerWi+0 zDTF0E0WYm-Vo`8Nn&5Cex1}>D@10p5VakLMFYoLbbNhYbkTZ(ez4H6)ef1=OmL2L_ zOa7X9=)?>CZ>r2_;z1f)Um3UrW=gSZgTuu?9$h9Rq{uMh8Uhd->EtvNh9Rh`)W~Gs z8PaVyD$6wtU5t6W@=}dpP>?Z4U;psqNv`^F!Kmx@7soI3^Uo(zY}saWcfrPb!B{)GSUD^Xfn2RZ2 zY`bL)Fmk)`NSL28pk;lPvD2PHz;E#gk|sRUq<-?_^LQ*|0MA6}8w~tvr+~jP^g&(C z&@azKcANfhpr7NpV_%NvBh!kP`ZN|U!y|CM$UyqiKN+aj*@{=qGZ_CE)`r2k^fq1< z(2w!Vi6eMPP5py!2ak+-J94UV{2L(PLz_NTe|x`EEAZ%wVLI zOJ6{;XVvz$^&1-M7T0eUZpN)Sw0LUT&UtiXD;{LFdz6#+4BU%UCWSJLkgrdi{MZvq zzSFm(L6+GNbp!#G)rBjs%0*=5U=alsj!R^)FHisem6olM$QtSbeqC1?`meS-qEab3 zWg@e_cGg|#&csde?sU6IWKw~&mhsgV+66~exc)q+#7Srig9Rn0RtkfH?CsHjN+STS z308{X_p{h`2Gx#vq=Y5}%{$=r2|Q7I9*nO#Kwn!IOIPi{?Hy#8i_`?}02MQQ8h*G2BzG^fX31H?%TS8KjDyt_ zpWOIp{p20@J_VgIsVSEtDG2p+pE>EmBUWbCCch;O|Fm#f@%IaTVJbdx1nJk?*}ZBV zb;r!2{LF)}`|J&gRUJpBJG&@R{U+NZn-FqghT&(&%k?bzeSkTqA5QU<34|s@_~VV2 zarLkN&R-sU0o!&6hXefhJLmI>k1fD;T->xnrZ2(Xn+OtRIS8K^c^w9! zwzd{s*YWv$R8&+jYt}4UT3T}cUQ?$|#qakM2m~lCEoIiMS+uve@6#Xb?cxtF?q>1- zo5!uSMXcG?%atFS!AlK2Y{-%_AF3_l2dCF^`foks_=+Dz7G$UBbjN%?s|vbcJH~_wb3Eg zt(Z7N!xt2sba8-x{H~i-kDDBJqQPH&m876dGJDb6AKagDemjTH@v(58pJ-I@&nHs6 zup+}xzxURDa`$EQ+tuxI^4V>C=7KPDXZx@$#qVy7QCuWhv>&`lTD4DbNHIv>xm(PFtJ&(kGGf3ct$ovj3d3aw{HrL|KVO`ERA@i0n zc7E6g8-LFJ^`jAZe%Lm{W5BlqpWe^?e{Ub_?#=#t#3Qx9m=YFDM#ooSMOlrk94v4-Wn6-_#r@X*wKQ6{WS$q%Agb)^SEzgm}gtk;e31KuSqX zO$|Puk3D<#kV*|zK53f9lqpj%41=z&t}&CBlv3WnbI^cS0gXO`j8Y_U>2z&k$|Z%1 ziNehdRXu+ST?%{%d`b{PkS8P|p%Gy8L5!;ut;(WNImDHVA1DxBVv|n@`fGRkNgbsW zCJF=3+onfCkC_59g;01#yu%O>8ZURniemqK=``>Rf_1~dv29)$%$>{t03ZNKL_t(o zZ?kRnR;*--Kro0ht(1dnTgt^kkhWE}Dn#I*$l#(}8`nvrX%KNfSVnaH5P%^BdS{YJ zbEYp`)MPH6QC8yCPM!RuE;-ALCA^BDA@3LoT}ZmSyOF}KZClrQL1+CIIoFa*#=sB) zP1kX)48n2ILm{MP|2(elE!k873DS#Ctc z5{4<-dK1AwOGk0*GrOvEAtTo2F5(;aP$zwqShiRFq!c2N&iZr=ua*%*I)#I2Ald5U zvB!7Oo+_DKQd&KEeSITM+hMklI7*RFE&^!Z=J4$9bsTi8L* zcefKrXDG!$_vw(aP`ZZD#wKNc_`@GkP*8wrnw)v&nVfm%ncRHy&HU?M-W=jLzxhq7 ztE&Mx;e-=7;e->o`|i7W;DLPw!0a2AQP#2GFp%VPQVZhrjmW*+{}qbLj+tlZJV z#eZCzTOammLyUdP^87sh)nlm0_tTrQx$VW>{O})dv)FvvqC7S~^CM!dj{$0Tz4f)n zZcRV^@vjDRdZ4ZrmtTFxBZ|r=Yut9ZM*{uyp*$+5X;e^<;3y+uOBCBW3FgSk{*-$?|dRlOZiS53Oexnh= z7cPnLwN!43agL~)VCb-l>#C!bC8*M|}W{DQ*{^|A8lGAhbOx-$Ip zi4>=w6vQybel9D^wGk2D!*SY40Y3lf2&bMnl=%6tcxi;Z=;#;! z{If&Ms2%IOQe|W$PBL43pTrh{p^N&X#+R?cFlLvFmlmdEF z1Le?X-S{#anqvIm^jch{_|)xdhwjR+@$wHA@~PX`zUQRO5l0-sRaad_AP}ItyPLwo zLTZd zvp47?ue6BDi6!LahX@pe(RH2XcoIWuZbflag1~hYnRuF5M<2Vk?4fH{6H{EB3aRHj z9l#s#DIii_MBVgqL}3U!W3qkK7S?w4;YTug@+1{cB`I$275P&4WH;r-w70ZT%|Pcj z=qfZAlIqltA|aXNn5@?%K277i1@kDIme1BL4Lq@I6MH(lC|4i@L2S#hOrfl8ZU%p< z7m__VEd%4w!F!jw#$?yU_krwJLI8o$mt@Q0^;hKA6)cHP&tKza?0H*OuQ}D-+luNR zcnc$2xia!Z146R9VFz1Z*?L98y3LczGY&I_pGZGDW?R|lY8O&zkBCwIT9Yv@oNI$7 zv*USX$o8PnHQf>jMy5e~GOFITc3!ye{(>H%j%k$|eZs26;LK!wr_1h z7h!}D$l6Ibu_Ssbojn6Vl|O{9q6pJ+Xn3s^VG2037TMZ~-q?~mu9lz2q`VOA$#(jT zMqf?cB%2F}<3DmN{*^m0y9O$C^iYWD6;;GD zCK)$@z-7Vo83fxpNp*IS@lwnTC0!{7NgF+0EGup6zbvlhr7`ti!+v9+{@W~dPzu%7 zf=?+#z?Zw$QBBA1I#^qF<0#NHLBI%rqeyJtiU2D7K?I;Rbs~fyDg=HbFyQwzn2hMZ zS5l|U1tArN^pniEB-4FfTssO^ft_ujoxK+luZl>+BON2spwbt@pUQaTouLnvaEPsCP}vCu`jL+P*zTPQ1|1i5DLDiK{bD z4RYqGW5-D^TCnd4vu|BC)UIw{M!$yP$$h^3+0jW7Dd7v3MEJrb`&UV_wZZ1XPmE0% z0nDg1xcS)i62k=tDMh3JT7k+2wb+kX7)`(yWEKXqPs%ysW`*m$as#lU^Q zLSS%5@DM!n;5LSOs*dALVw{v2$2i9Ep5W{=gPeV)_k())9D{HFsE40^FCR^V_70cT z>oT}596raFn!^}E^r7xxl1qCNAdXv$Y?`ITE{T~kc$f&ZVD<9j+_0Q}WvHZ3d zck}3FM^hMDPj_;F!1&~mmGq=69(%p*oonxYBAHC`qaXc<)vH&dlw$t;`CND1b*x#l zhWh$?Y}@ACbI;9{#TOM7anC*X@X?Qclm{PtaM<3IQXr5zxB^?*bZQb16wR5&N4|9? zrBf?%#LDAOt>Hg^@JC!%slHgUue2mT?~gb9mpJP1y4;AxN@jTRt|ctJXEFIm!h?L* zEu|0vKa0M5@$d3xmpy3N?hz_wp8HDW+G94{@rc}^EKa}Rd~4UP9hqnEdmvheAXq+u z`QQ7bd)JkJkR_cK{_ONOhfw~K6%PKmMp8M0Lc;3 zPd(t;j++L%!?kgwFE_RvZNKk-fzrMqghZxIp1JM*;tt$TxJqFFr9x-A78n?7X60ui z3|)bIp;6!3!5!D!HdhBuGV+Ny(i^b5PS$HD`##$o^v-=(bNBoCIF4gkdqRl21 z6NqToBdM}SR+B0znp{ON;3pCe5jW$c;}%wL3{82F?6wp*v!*a15~lp%AW44*T8)qL z(#a%tZ6}r`Wfb5)bSAo?6Z3=A1XihCkUwd=i za5s~ErhIxXdV9!yM4&qsm5!oBKuSu|QuFR%uAK@mm0h5uL<$X`)G!R4VA?|33hYd7 zTTBZy3Htjz59ED{ibI0rPrQt-J$C_C{Yv|*f4e4m#3erqkMK|%$NuA*EC0`_<=;y@ zjVDj~CY~DPV!Sk_C+nm$ibT@o)%6x0}m&;#~mABW4(o@!Qy|E5)23)dosm!H^m491QV+@4xVZJ`;an4HK$Pb;rVa2 zzIn;!PTFD_K5;|^e|TYcZuzI@Rde5}CfqT~#NSP9+B7uDam9)i^!4>IapFYk>+5k{ zcZg3xS63H}jg1r*jy@A9`Ug@{$8sIITn9??IQ}cAP%>>GvEk)cwsP6GZ>6U%;k^wC z_BM5L!RM}3PygemOrBJR5CS9Q=eRGPLT5)ed;j$cbwbN2A2Lc|1Op(QCze0H?&>wm zw#~DFzIYr&Z6bp?4 z$0n6Z)1Ap+gran{_n{j)CAPxF8;5H`I?7d!)t?@-k3Ab%kCYE8G}lFH8np*aqozE9 zD+RhKi1yg9s|mXMvRjUQk^;{#HlbW*Nk2hN_mv^gpK{rz!|`?1%sS&>w1}i{cZ?k?cCu4g)X*RK zDDa1MW*=U|)T0i{_#^)1mT3kXmh70f>!nu*9a5koVe-oY9C_*jdZ)O3*Z_rj{}B$Z~w)Aa24U*4asCPY=3MNFhK zSrhHCK8!&Gn;Q)hol?x4lWQ}q=5w({2l_CsqoiYrU1O|{Uw=!i`@u((qw9Ic@qxwqP4>I- z%X~R72{;$e>$DX(7|(a+0!Dhbj^j;YoRk^IIL7gwAdysb_qeooxcut+7>CdCkr$PG z@#|e&_JwH9XzsVS#Q5UZyJ%Qf$)W`T8uvOh?6jFON#~j8(j31qz|%|9eD2~1PcKd9 zT=4I@FTwJa8D3vrK`%_@tv=ECAOQlS-kRGd9L#2tzcV&Jr_?;`+k8S zSac=R7L8d){PVMBaNYR_v!^@FZ=c=4HH){Sl;?MH=ki7_onMn9Wu{CBv8c9)FW>$8 zJKJj42{X!dv@EN7UvHZ;XAaS5l#LrV4p}~T?p%tCiPOd2{%KKF7hP_{Uc>M;wO9&j-j%iZct>ECa z0AFLP{Lh zRSL&Z`w?*)amO0ie=s0{Peeu5GRmxTYP_VkzMm zGT{mkxzwfX`-KGI5KSBOGxX_6%vhR+wJmJw=wT)bKLb(nx(@;qbi$QIL|qMYyUm{Ts~Cfb z5yP~pn^=NR2L3K>ZjgQ_c;wL)Cj^#73{vr&dyn$zL9PE&W)CEAbb`n{EeKm`0C#Sj_h zN#zv;4ExDDpL*_q55khk8WKKr(IavXp3wz4B@ zjyQj6A$MMS7?$I5T~^L?=ZZc2=!{zG%ED}EP4Jm{)vRdfW^?O19I$3*%7FWaFE&kc zl#M+U6%}#il~;1tU3al(&z>Rc7A#o65l0+BRaF&FJ@piQeSIU|zj#NZcyhEPl{J0* zVa@*aF_cnb-D?da24V%3MMR6DG&l89tRP=XI)T1;jMmncZ>2;2^}+Ij)3lO;g~u$M zuCHFcn&y^vV(o2aFfY)S76RcnD5%VjtBgwcO@|;7O(`Z?HkyJCT_Y(4f$XtUVj!_e zml`KTCNNbO>}YCcWlIZ=QXF4WMoA(=TVF3q(@;KLp@ic@c;>}Qc@;5PqhS}&6+~Q@ ze8+uTiBj)1G!*H!PB#DMkth?ZKB|}Gomn)wY(vRWr5D8v2_cB+J~}0I3&D&pf2=z=p?F=>l2>cHUfW!?D;5_Ow!rV0 zV_rXjH)69LHx##!((miFg}{>8_~EQS2?#X5kE*(9kIp)7+P|KC{FMiO{PB~{D5{CH z9&t$Nna)csU3cBF`ewf?%g_DR*{6kTif->x&QVuie9c|LkELpTUGkl*393Nc1G=?&?O%vJ{T(vgDBs^i`EnHlams+|p3o z*40aSGRYitCTpHIg>YPAJNK||yNTXjMf(eJn)kF3N+g)>xcD^B<3idtYhGN=Ez4h| zp{IxHyeMZLdJr3W6PTu%r8oiQ@_OT5nvzNGS@sI~MFkX9R??kFFn!l9>Xgip3Qb#g z@@Pv7N!Pt-N_pu;N7hu}bSEI?c>XsEgbPxaK_8yswdlY9$^{`2Szn)=0rLn3`I-g+zju!PgpX1v)AGzdd;|Vi zPqenMQMvyyYu2p)IFP62I1ZaOZCaF0r(YPdV)FdEIQ;y>4&<@k5xjiQ^E9qL4xq4x ziSthnK5){-{&&?V&(0`r`A*{c?d$CSH+)?*sL%b&?Il+pG~>WWGQS`2kx#Z4ze!R? z;-v{)0l9Lr{|0`I7wGZiV;tjnPw=Oki*ueb{n)zQo28C~ z2WIxdA&IVgelY+i9Uoxv(lp7G;-upOoOFDE@BXBRb+4PG({M~SHK428Mc1IaXJF8M z^x-}x)(m{@6&Aex_=1Vm`W)E=ehoi*xSmVqSM$rqx4q*HNB6ffGC2;P&-YDW-tgrG1qJ;6_rGV= zs#V-_%Pk{zcjJvW0^s-ix&8Lr`N9{zzzsLtFl3vPC)cP$`qHA@@dg_Sp;)a_6i=_@ zxJynNGCTasU;mA54J{0Z5HM|0F=CjcArkhJ7YWhncA}&~k)x=PIvX=-?!WKZ&+HER zNLVg4<)!@Ucb{kGq0?z-Y9(&=1*$6RwpCVFvsa}ER~4^Q33FPoH$?#&g;}Fr0hHMe zmheauffwc7W*8&{*r5Q-p21Od<<|U={tvw{k|-$1Kig?C^JDQ2y6$`wt>5cH;YNf+ zC@66u&vudf>W>OJAcOb-K`Ov;Xnt)YudZD~w{XS04;?e>l$jr?FkMFla`#&d48r@7 zC1p&ds6Kcy(OHH6<10Gos=wZL|2$ziluLt7;Z==jd7=8sBg)PX<()jabyD?jc0B&< zv3tAwM3oDH(Jq5Hj}wO*`9+7hl~Z ztM}%YR}|zQ619CV>7B`fa9KnMO;k(UA5bXIFj(P9QPSCJpxiUtf35;4HPWs_tFGk; zq)uhCGMQx8&ICtInaCN3A5C>dH4i-SAS#_fXx{g@tz33=wllSM66b#CaE`2t($?C; z%73k+GnHX-c7KlRvb(i~f|<2^=~6Zunj6{Z_jBy@ zYA!zI1d5}j#9m&_cFRObkGwG*n@wA{u~Q1_^78rkiH9(4b}i37yn;Pe23H1=c#-J! zyINmpySgqmn30~i5aon-qtm^tr7LEhc zr+8miA3iR?^*6_e$6dbsxhR$88WV~n*WMUo(E@)i9&uKkL369K&oqDof$3BAwRlEn z?>&mAexIX1vroCtaKzF!LElh9;g8E3x%%vxJX7C6Nz}*vYu*L#HmM~TsiWSV9IdjCiX$ARezO9Mrws-ys6cdC_tAG<` zPbGiiK*fAsB*3Nr`CDR%p>g5Su%9n|=0xN$6HMtB6zMu`C{j{l3Jp!TOxME{PpnB7 z3D?}()$L3!FA$n0L)8_PzGB^=BhfXX%%5ub)W^^MLn^b=It^H~#{1aT*vPDk0%P{9N#~Um2Qdr{-3d{3Of`MazDgrq+m9@Ca#u1)Ts6-;90nXSJOz&6dN}(x*FW_fFAgCr3LXeUoH-5KK^a;U&nkvpXeFn>4-^@q+c?d@k8CLs~ z5rX_+9{GVXrqnw4j6F0=nuw?$Aa+e$61bEV6;WL}fu2x|;)N55c3LE!e;qALE=a&d zP?{g+%#YO(>u$y|GaOu2$@W2GPfZ984u+|mP{e5`Ovmq9wAI%$=b(JHFIKs`m{u+} zE(@ZCobah5iEZm4zNd?lvI;iY7T_Z&JfWFpXdyv1a$aixpS|-Av#YAR|7V|a>-3%} zDU;p_NgyOZ2vq?^0xwt)5i1}9DuTW$3Mf()M3JT-uc1gsIzoUDT0#;^dYNQ0z0d9U zl>Pf--#hnCW+si${AE4QJh?gdoPG8^eXp~=Yk@755+(h6v(u{_nJF34HH6nh+Kx)q z(oAJ14*f{pJw>{We(J3>`IFtQN{^yPlWZ0i4Vp{LZ{Qdjx~AjRbqt}%Cj;pDw;di|)j}vfRC%Jp`0^a))D|Fw z;El~)tZm){g=qPBKSjgOr+eE!0ei~|>-ORjoHU} zFg~29cTl{uDoJOTIzvi|HAd7JeJ`tCeLcaLTBBba^;^r6`2B*ZlQL?XO z;*8UReK+`n4)kE#@Zzfp?)#ex7drX~AAhP_x@ zA6Vq%2#!By=m^NqFoG11`Z`5JKh*?0I^)WNtgKh1JR^$zoHKs}kFDzO`}goW&D{Lu zDcthasr+ks(=H!mKTZULL2kO~Cbn+f%H@||K7f$P&(FuQETU2Mj1>q3IP}m%dHwa* z2WhQ;d5SJ1<-#D^9OjipFLCgh$52vHfTn3Im_MCME;@y4Z+b+TivrS>TzT;+%shBT zzgF#}Menv|Y6*~6R7rj?h^1*1`Tcluf{Ywry{f{EUVA_+(QxoL=Am_H=apLiGrlnK z0Fo_9f5WD&7mk=(dx35Yvpbe`{;}cx?aUfAhDuk%Ck1`OWs&&>ZptG#FC2%?&a7>xDN?~r#Xx_`F+4Ay+%t~lnWsVk03ZNKL_t*VIb`&(=k%Q5QqO3k zyW_?6_a(M8dUQ8s*y=iJAf8P)2myvcSSB$19+Hx{X^WeW`NoknZfu%rB$8#i)bcb3 zZ(gq7apGA^&%HdU*>$P3vNM%3pS(aK6cfR!!cobNP+Q#8 zN$QfmTx{0@G^8!5f9b6vnM^*Ebi%`2S7O@^k=E$ZZ~W!0#S@R2_);>GJi23b)7`Bv zyQ3rU`b=a(Bh>0p>ZvAIYwH^sfl3kc0=XU! zPKzWk%)k?{2*17vPAD(eHrmsKTYw!@#NW760vrcWM@6Ha2slUUtRV%vM@UbUU3S65IPvnaG3Ma*Pl2QkKB zhaJW>*Ia{?64Nv}@x&ARkutijbMwtNQ(Roknl)=U=bUp`v}h4`-F4UC+jBSZt$8(k z=dj_d*w#x?&}2$wF1Ih)#t-g&AAkkpi+Swa**x<>8-)Rrs~1jW?$xictur=gduPt6 z=FeZ9!Xqn`BJxjPp3M38eZXBy>vz9Xv%Wf=o~9qsvFVyfgq9UATF)H+ZTI^HWqYQ| zUG%#sPu(8ppwD~Qw#MfEYoh%A*?fF~eXF{;_*dO**=jR-l)?4}hi%(!{_wj(zI#>< zS6th}%;_Gkx=fu4jswRoY-QwdgO#sV^tJJ`%eyHm)R=id5x4v;%uTn3_`!E_x#{Z6 z^VrL;#W{9iD^OZIg;3vQAX8lHsigKNvUYGA)*vXxLD*8C0qh|oW12&^fYqKvq zJ-|W~F>@=*$TqQK1N*Tb9|iW4GW)R~`|+{k@4c)nlOc6%7_Yby&m5D+e@p~zrJp9`Sg+B54ZMuwQcPLdTk1Ymtt>Fl{}a_4iJe% z;r&gs3P-Koa{8U6O%4Ibq%6z+xA&Kx$nQE;iEki@|d=y5S?Bj z38mwYQYA~8Py=B@Q)G>BA=eYYEh%Br83(_GB^NnTmJ3ZD>?GvD(e935{d=2f(QQO& zF#wjw>*ys#0~{l3Ju)PhH6F#9X)PCs5dw4&HZA$ zr|rbh%^QuD=T{lQNEC0M8o^2tGoFkYDu5=i9k3Ef5~gldjQCosl=5fGm)~a0^cM;| zIihZRivSqO);=b)=Ih_y_{QbGyuz%hygRmTlP4)eW?fnExeyM=&|Q6k&;u<=kAZX( zNU5pvIO(Xq2rr4QUY>d4xp|$^#c>@h54;mkesOhOh5O7+7P4W7qW3h9bMadDe(H~GkKPvn?_0M*Y{VV3hetzLHoD`I)CF-;1eGQb4ius@%ktB-IPV~Sd`vAD-2cI#ZT;eevHbdp^<4k_W&keOHi}=KFm}&KnSvUF z(lKY!vFXo1WZhfV#s9iKy5Kuk=ZxRoCK@(6JaBE4>lYU=db)w@z)z3v=J7wrIPK!V zt{d1xeEswwzxkQ6zPa(QA2GfKU`-cW>*b!c7v$6kK*yPl7l zl+l6PQvaR-3^bclhRs(4zX2`)uK6fCv>*GC#(q*}KlWokK6d=$uf;=tr|a;ui}Lu{ zMMIYzU3N)-@4UGOd6|2Vcffq3Mi|_E%i!xe`UqcNQqz9{%BdKC62an~jviV=35qUy zmWdU)NF>|4;M52kT{>WTPfrg3OO`C*lv7S&+_-UQ znnpuI0~y{>(w=~i~CNMhX@$l(q zN?l128d8`95$I&nb!?zVy87mKlf%Q(`MwL}2#xWY4?_q%sA2bJ*Y-;3QX&jYA?OA) zDKp_IsZT-(BoZM7u265?+g+Q@;X2m+GPcHbwiDO81b~$a!RuW2SaP-u=Tp{`mzcdL!DH)c%(d4IJ9g{{JNuw3xt$QBU zy6$$o2Fk>CHeSl@Z1oDM-?f8pPSOS)tfYmmtD3j)pu zbz6{?Ae1t7mJT7;B~VgC^{8^otSs#odBFslZW^IzenQ7A+S-l?MX_=5Ao`4I2WEB& zs%=*#LnAU2p-G9?Fv+j1AXmDy)oo_wt6O<=@jLhu3C0Iu!5wc9)b?=H#Jyy*P9u zqcPPtL#G>?Ew;reXCF<$*vdXaCXuxGpKn}4LsKWD@}s)CBlL!1eD8vrSoHTx@%a79 z;M*f8m{UsOtckR|vWnrZMCe1`S~@y9=;-KR*sx)Pet+bVNAk)muk;Zx%a<=F6bdnS z?p&UI_SqrZ-BY}_sgurVl5yoZtZ#`hZ*&pg{>Qt3+C2Y!vw>?*oj4>Z<4Q?ymMXM2 zX5;RSY4fbFO`@ajO4`<41cX0$&AzvBqw~wkG5QcvtNz&Xu1#){#^~wkG(VVel!v#T zPJSe$Og2tD&d-HE>!NO(%@K!s`StI62uCD2LBZlBaTXlrrEZ(fD@zl6=>$J()?2i- zJIp^c^ZZp)W#IPr5?dhA(*kJ@(QmplrpMQin6PN}3 z85m4Ho5r=k*{B%kTTu#{{n(F>6#IgdF@OVs38}y0)U>pgd1LBt1+Z-&tZzT|V?Xv| zKeACi@j7OHb>!~M8n;|l)PHuLFCvi$k;uSk>TI;Mw9wMhveS7K20n0mrKHMoNazMd zx}P51rB}Fv#@wb05z<7BAp`+ek|Q*NE_fUZP3UOCM4(6x7pO#MEC#*0a);4{AjcJ$ zQV|~ls6|J(HbOdm{SQi4+10iL2{u><#hM(s#Zd^O|3Y=SKs)MuPC0R$`R;fmw_lZ6Xlze6(5bnBf)kY{4w3%xpmQ@H~!BxmnD;y=DN1y z+D^i@ZKqw6Lh71c;YuCbG4!M(s%#<3G?ixL?KjX%DPS}mkA&Q~MY1b$kT19339spi zhH!FSq4$fi7E%&43>M5eFjh8i@*mC8z~dvPm-onk$MI^e7H$aV#Coh*k+ogtZhGMP zDJ>06qRMgc$}A&ey+4WF=M9q*(&S4BID#G%I+7Lv%V2nIE%{zkT5(Bdzz`EFt2pqW zgQ&ajQQYoc;`zB$*N&iYq@P4rgi$qRT=LBmDJ;o>c8e|dK96kg!tj`ktE?a|5WtPu zRMix7?$?gPk3fc_w7jsAWL*m~;HP9_El0Qxjfn(Z>KGQI0s%4W;8OJWw-9aEj?B+x z?6k2|T1mVGg5s)RB3MLx#OQH(=G4ie_2FmfX=*~4CgXfQyrxFGN3dyQQ?fHJV$QA^ zF06uFti~3MRFt%o(nzb(`V4iQq*A^09V6-Ef>e~WI#*>p0a9WK==GWSCsy4P%QdEM zTCwraIdcwtsC;zJasRpZwW>*n&RWtNwVS(FG<~&Z!H9F+o5laOOY5jY=|x&Ll|aRD zQ+eUZWyE#YI%evmzxzu|X1BJrQE6M4wZjnw`PeOO5D6g-jd;SQwzQa<1yd1Prex;L zWgCb@2UcM?j?0qeb^Pyd?k1-&qjo?->-suE0Lwr$zdaq4YP|?8bLCm*KhfVPH0 zMMVW~yzxe+X(?%FXrQ8^V!*tXWql77PnEn%t))eDy`?U~Ay zEgeyY<$EzSfjtP>a^d|S@Q2eTQ<|gp@tKEI4@uzc6oEoP`S`PFTc-iB&F|XUJy%3K zF1b5*w_?3>3pHXPNirt!_|BxszE0a2e2zGWOjWVyLL+ zzXKPgKJPBZ0l9lHe>Nh(+Pz$MKR)BwTT&(mI2Dywepu@NyMs-@v%ozlGo_CL2ck|q z2WUaz#}4aC$2_jwH(mea;7G*g zx=+ig_VFQ^WVhaaeT1k07O?fr-C-dU_0C2 z#!W51tGBc=W4P-iK=WV-jS-H4rTK^_l3HidF47Q1J|I^@k(785KoeR|crs)RQ$CmND&u0yu8Mu3o%%$=E>bjIfvijw%-EpS!IP!?MFz*_DtC;V0ORc-6icmC;;YjjJau`-vOYYdB?e+ogeWoEiPQ?9M zcTPib-ndFg+Qj`{q~C|vqoe0&lou2s&>-TFa5Vx=70}pCytDv+O+E)!=dp0Y*v+OE zINUqVf1kZEacFWw7hBtV$!Tq;J12)u(`5L_LZ+WIqt^sWaiuyFyLGi z0)&bwm(e)bcB+ieNH2gT1U)%E3WT|B^DC z1IA+~ZDd!7qDU|0rTNONI}6(z+lj^ozm6s?hdb|EGU#`Mp;U(vdqBzrgF#}k{yr|T zSd3tBV3~@P@@oSo?!;7l?&w06{roUIhQ|2vAb)wej#oBxa@2$pY*&)7GuNze+(r|E zJikF_#2V06!gjG7$+T*v(zP5((%H*v-t039s9*j=dKv(DcX5(6Z&*y6v+FqOiE|8! zDl~3BKg_}l{cKugv*h7KT2Qx3SP3}`r3UE-+Zp_Ra{Jw3o_sDwI3lUvZu6(B3;RmL z=gsl*@@sL9KElV6Hxm5)&&3R{w)yrC)r*m|dS*v_=>$JNyrh%nR)@P5Mfll|@`ywR zU%zdul+4a9hnBXzzsIz;IbQ+3vKzDh0+p_`EBqg7JaiFo6KXuLD-1)45cXEm^agOq zUM{;IpKD&8o9eaz% zPz>mEsD91jlT{Cm1)e}DoYKev7JM?@0Tfx41Kf|Q4%iV_p)RJ`HJ(SIj;DP^%3KG` zO|8EI$U|L}??jn{Z2>OKn*Rk9tDapmd^u2vA}+s=V&!iGzLz!6RMf@0hYShynZ@%j zM;?Ct&E)@g48N;c>p$Txw9&HWa9Y+3^}RqH!=H8x>b}_4)^=fYbMtTa^~z3}Ir-=! zVP39o6+58cKvj^`O*9<5j-#w191F-q(K_ikTA?e|gPZyu=!+YcE=aqtO*AtTyWCeQ zvl~dK0}V#nxEAPM{0PQLlNt;xRDul}AT&g3u&GJKE`x*XNY_E4EBDdt20v@5*Fz#* zdKTN-&YGM4^R?!Lqc3aN$}}M;#-Xo}F|95TX~A!Q7zi5IHy{$Cw(FhxspUfFK;ffQ z8fcoXqQnz1gfP&Aj&NlvE?uUgg;VGwWMrQrM+qId$+G$<;|UwF_d3w}8L^HaZ+yCv`8 zW@%09)J#e+`qF{4(h9V^AiAMv;@s20La0(ZM-v2e81GL~S>vZ=T_a8Fo4>PcOY=c( zpnY!2NG6Uhrt+96IJvp#IXM)aHivLaE6+XfdUYfGq}nSOKQ^BNe<`(dX5ki<<2Yb0 z7(=`xL~~s;U0afrjn1KRS`7hDCH`^?XR?V?RYdT_F@$0rbaXdWg_}b6=1z$A6*W?4z|3tIY}^@4yby+a@O#fqo$2Mbot|}3JUA$F`Sv6i6>5ZDQ@>3CEnK`2+kZ)*}eE( z8k6zV@gT7}Bd;BP{*mh=?U6juA#?IP9*R@mJZ?BlboCmv;zESi2MG(G*CgsdY;`mK zsl)opmnMy`A>j9tOb$Xc`aS&Prn4z5uk5?_xlxz*A6!gi$$Dx{f4}sld-MG?40e(Y zfzHlOa&!9&2lDdr=OYxiDywv|YNQ0|^XPDL*TwGo)r02bT`lVI3$FZk9`{}qIf+7qd|@(EV`2aelu4%^VB^hF2T?6fFx5^YQpoF;=~wq`Fe4xJaWQ z-$UItGbhE2=rF*{B!E-t<{FE4MO6U8gLV%|dk4iDOW zW2>wL6a-y{L~1%^Nr|wt$PnpZ3rUO5gP{q^qw$ofXg|}CRJ^nXQd5I|H~m(9N2JPT zhD4go8H&VF9w@?f@S)+uNs&0D`sJnuUCJY)HNBL;bpemd5bgeVzy(6dI4hrdvBvdz zWK~Yk@kCv1t8FtpZV8{1eWcZ3Dj5Ku5PYz`k+pZd{lD!?SJqC@d=yFpKLYHu%1CBN z6jv#j5SrR|ZekE$msEKg%4oNDV;w{iwdFO{;kR)!g;l9U9|6b+;f-rT((Sb9YV4F+ zC?Z8XAv6Jw;gMKwiIldRa1w?Wfk)_SHI9pnC2(6?NcMWMeO`1!$3Xd_xQNtYs)N@{ z%x@C&d5E=0TqlAnDfLTnbg}EwwXTVG>)J5dLnOO;aSV;|D+>rz`Y8=aqMM?iX>4hA z$TLFZt!qH`gb4>tdU`sry_q-ct;q=Ct#!EVVT`S9xGr?b2=TwSVR}6X6;8DveRO&g zHlo*}SThi=OF;9nz1^axDMC0B8(-`5kN;r#W^%++-^*4on!oHA3(@p@d-pz^ST+GCAv{;s;M!Jd|G zXUoIAmo{u^teG@ra-MEE1k;AeLV%{>G&QShi-b5X?+|Cxq9n&&d=kE*AObjG>L?~p ztl`aN8?dtyn*x3>=bg2H`9~gtrt5vt+g)oK3HL-O4CYa&_g8o1c|3bG+T6Bn8)L>~ zF72jiGIHcdwrv~uPEyzPb(UoA91hOAfZiP^LvF0vcl9UbCx!{(}yYCy%2{U@y?hV-tuV@99?>If+(*}L{S6QJm^MJwgwvRZ} z%ddXd!;{a&m_JXEmbwmy%=U8I-CFjd%ij*lS*4{=L^zKXChazLnN2z6+cQWr(lxX2~ltJ)+@6B{SJ`(KC89oK2TA1_^ z^l2eiRD}a4B#xiY$3D)$Z%4 z3&H16lDm0XzvWg`N!T^OwA3=!qnO%GlrrgN;7cg=Nf)Xv@@~`<;nLK)(yuGdL=Em< zKoJZ8MXB{1o%;XFsqK}1p07t;1b>qHov)*ar=jfXN23%cGf?~IUnpWOmTI#Ycmzc# z9YB92(Ye6aQ`_ac!1mPd1}H@lISWuqsdG^K9@KIEJ5=;tVd^)2k3nu)L*SplA5djV zi&09NBGh&}0(b>=tjq`QMadV((ZBR+JJ150j3RtY)ONZu_4k>F--CAWEKkuV-H(qO z|9WiCA09qF1S+YSxsYk64F9BivP(qTH`B6uz+{idBZI-3id@ zDFue6tHJq>*k!b|8VpKY93jxt#=pWy#r3AigcJ)S?UXCAkx}HN23W$>Gp50=lrCh- zYWjDI0fx7qQMf{oqZ^!h)=6tBoIY^)001BWNklU}yqENQ7|l0J@t*WP7;usVwvX zC1GBn6YuGz`@P0-!zNaRG>?avEh&(x<%B^p6eYCsgTp6G`TVK#7f!n1z&R71Xs&NO z#&VKVOicuQ#kniXr&QdO*kW1HmCawR(LChIto`b`xS=lGFt|b^sih*YCD=mr8B!-S zfi1w*bWFboD?f+`2B_6Fq-CRpnvvZhoJ0~SUA9S!wSU;aq@p6wJ><*Oy5b3XVhKW0 zq5?j;z^5mGKucEeI89=*I}cunK-PH!oosyk4ZEd#R*3cU12&C z3EBa49s8Z-$ebV|=qJ~wwzcf;rM0mI$8o3>CJ9p~nHxaQ4HEGA@E9gi0PzHg?g&XB zE?rzHk&Y9wkim?`Dr@&;pARDIYw4(SP18WQxSBz+)RA#HqVwtXcdWmEG2!M8^5YgU zT@Y(%omo11(zIbEWp|jS$LU?y@_m1Po?bPh=DApJd_=qD%=Ii0e3b`)1<7djIuIinNm?v zfngZ5w6tK`Hjh2_7kV)g3PoPPT0ghHWyJ~R6oy>Xj=EpOtIt$p)ca@=UTV>Y+GvX$*!aawv4oISUOUp%%BiR4@JYG?~3**Zjo_Aa3r zFna!cdRpfaYFyf|!TI+Sw?vm8cy#^(v5Uusy7z5{PgMK)^~V#u_DF)?Kbybvg+2nz zobJKvftzj(@t5l|x8cL*dAa`PUM5d4DJvbEaXDnRmrW}wDK8uR`)B?W=cvQIn5Lko z*X1`?_b_UN!HAkqRR)cN8k;_dQtE$mi1{?sSV;gsRh$0P!tc^3g zf)R7Q)E?obe6mS?jX~NQFcFq?ZnD_+W|GY>#cAI#q;Nw+5fTf4FOnJXe^_`?gWznx zjyq7~#AsCV=gq+FC}S}nir9D*I3DFAG8c7n<)X@ueuq*(OhJ(s8&Sl9iSo1g4{E?( zfhtXT9C$JH{{)JJO5YW7Q+)(Qdi*r??+O(8@VC@wP~^#u?0S%la!E%KDYJp07*R(eB)Bk4Uw%6(vXPMv;1tqKKH6QTyiz6e%-5wJmlm<+%&xm$L|Ud~F0a z?8f^4YoJ{C<7}(9DJs;MGRb7lEblH8M?Y@dbAN=b^)|ow$;bZ?v`;Z?)OAc>IH$CWCfDGgl{j41N6tuu!0O7eULB`H(H-ndODZuhI< z|0t1{mxssWp}oC*?;9E9xa-w4l7+bptF2*MM;oiRuB9~*Bc4p4IcmV>YN>&noy4hM zOIzC(3LKY0+o42ijL=O+pcAmuCcQFM(xeEEI5y250~>V{4!V+nEAa~ux`}iWWIwaJ zKv>g==z^Fga8e#98iESjAt)v4@+{Oq0FhcB{on3O2X(6gG@&>t2V5zoL?VSqDSEQE zh)j8B?2Gp$ne3=f0uu0+7EyKlj3;AVv69}U9bYb(Qtu1>#M6q)(VrLZIk`FI_-yK3KOyko7CYd1z>t`g}@SmP}0F}=|+lf zgr?z@0*{nsYu_k|T69Z;&)aVp$OD43p^S?JGC(N$`7e@F*J|B+wm65(+8RL%!i5 zN9fqn#j;^5f*2BsB+(vu$B`U1pwsDXlzl9_>2pgR4sy!e9UTSK{$Fi9~{*|NQ5;?uWZq#4NY3G-)vWo5D#fBJC8yv14tJh8o$nkr94R4`usQwq>dzvWUpeczK6IYEKXH}nITX$p=#($7n; z#yNa$hM+s*P%qcq2%kH;fANIhCkO^J?bVLV^x5MPeO@&H*WT327rq=PH%Ftp$K~Le zULL-u2=SglFUAL>4)!BagY&(`Lnso$1FQ!YrlwZ| zC!tJa{i(m}Q}g&yY8M}hBuGCgq_bB~K;_y05p_#`7e(fL14YUJgi&f12Q`3y2}RVr zxEp;wjSOJ{s_g3G-TuW28cKDNE%kf>rP>&UB6T*Q%$av5>(&ImnwmeY>HIm0Q;wL@AAa%bq!#4~BbDiWN{wpueDquqISF+Xbk7T8J_b z{spR}?bRXLTZkgw0w|*Eax&_lS5U-Dnv}U5MXsfNW{yA+H9OwPA4RFKYEY$1ckS`7 z{0!sKCu4l;{0?eI8cd#GqU(a2ZVeHOOWuC5Vo+!PPYRpsY*w$^m!iE-06B$I7&&hN z#=zL`Gv`$EyOSpn^yqBqh*F;Gr8jQ#1jryW)K1pep|Sl_~VbZGs*(;9I)6i@(0SmHU@{G^Nq==g;T7^UkBDrUut_ z>FDU-$}6wrt+(D9Fz;c99mWke+`xkmKFHNq?^@ODBIq;(JzbqFUA~lLMFEx5Mlij! z5VI%`J>QR}3AuJd!{&G>v3>f?(Q_rjbmMVip(x?T4no^oS-G*Ewy0#5?jhi$jw8(k zO(P~<8Ur4Dqbg*eAQ+Rj;|Fu387y@dGiU^qktD%{IE9o^2oSI>5uWz6@Cs&q? z8W9ym!Ki>hyuH`o(b%flZ5`x0S$;KomJ~f*IwewNHIAi{ni3Xx1voB32v?FS)EMwY zEcX#1lWHsNqw)#CQxZf5WXx@LEupY4+8GW;+d{f*>>(CSQfa$= zZ(%YeQZnU5Bmox#wOhi??PG+`eP{H9F@&3zL0_;sfFNPp{O6S=!PnmZ;G6jejQP5a zyW)k2wN-N*U(n+_K(=&MQ{P09Eh%v&p0t5;ssySJS}JbIFu=+Ta0P(nVEDb5LJ&Zi z0t?dznufF;<%MH9NGDY`r)h&52WLS_*(W{`dpi1(l0t3p$5syz+?nTkYE>m@llcU zt=fjt*k#Z~M(ATAFonP`G|CMx!#&=<{UaS$k+>p@h{~dc>gwt^>Zqf3+NVW}7V+SN z4^miINNa0rUzya0!R7znxt&`}Z-Tj3zs87SKMBk2^P5TIt9SIbu6cQV2V;KmBISAB zzU4nOgn&sW%qG%yG96nV>1ks5i;Lo~AAYL$B-1T>!iRMN;g_Okr2Z?n5-yRxawfV;HKW zD_dRD!Oq>$-$#)q2^0ZWm-XFZ6sa-_bq;MpZIhzZy5^(EyB!fn9eY1PslvX&|0gc% zYd2VY&{Z@aE@NDz9L_(6ZB)K^njm-|O3)PkCG8BzT+S(l|D|AdVbMubI z)F~P8XQuV^x&-_J(-b6=l6XRrm#fj->Y!_a(vpD$P%@-L3(Yj>{Lv6((>Y>P1A zSBuevpd#PP2~*3sVg129_;bhU>a~?|a|ls;jQz_~VZ! zJEbWnCx;6zxPbTHe}AX#Wna*fnkw7aDwCAYo5+#hK7qW70?dF1Ap}o9znmZb^fuwR zvQ|nt(*Lwq+;i&%%sfDas7Y56?}^g3atkm0`B64EMVTx;%E868a5OK?x};*x)ZXed z=3O5gUzT)Z_Oa2e?T5enyMO7uTU*hNJjfb3y)3cfs{3;qLlJVT%bE7WFC>>=@i&hz zCt%Mx<+y8o6LXha?N*hHNISB=@xo0{JTpb#-b9Y;rUr{-Ooyebl9~E`aMoouH864| z(v_(j{!Wrk_6a`W1Seq#tb{c(5KUH$!63A*IVd80OY?ZTle#t>%T1MoLCPJO?4v{i ztDOWR#*Ymhc>J72dDDlzls~$p)uW53)N~u^O4||oBw_j7s8f(=4$X_#cb>iW?w3m& zHf>`>BDJ0SluTx-oGs%~lJ5$lZC#~SG&ZMp_E_F~<(<^sQKy6HUF=6Y4<8lT{2>N)QpKI8 zTam7G#ZZc_G`W@jY^R7%-J^b=qa*yO5-Qil+PV!49nF(fb|eJCV-l1GL53!%0_bA?G8RYpJc_vc5J)DIw6uKuA%R;v_N@G9 zpO7)x7(Oe9buU~($JR#yx#3;=M^D@mo3Zf1z)s7GbBhGIMW1xI<422NK=f17e2TFe zRhD!cs^Z`@)VSbVC`*Ih)U>@YAKH)oP#Ek?n2S<747d`^I3vi(w-n*Y*}WTI)4LX( zn{6s*m=uo4tSV5XanhfQm~lpsf1ch>PyGO9W)iBrm#<0{fX?z&!zX?TJWF!0kaWbV&Y3%5;u;Ye29Hl-QgHonI zCNdm$-QTvn?JbA@Y-Y*xhdy1tr){{{{ z?TE#wvaTeyAr6@889>MYEc`;|k@NO{ zgjw{jD7m?U)oU#dpX=l9TZ%dVr=8q$e}oY=2K5aNH~hAMZ=b2!`tkpE;qwXp@ViU` z!0aQNx$cTWzW8}R5C1#HmDlz#b&|=euP5l~b(uHE%M;lgDL<0&M;*crz>=(N63JZZa?@=(~hlh{qvjo%@@Wqy?PU? zw(tCKb)}@SJI?K|Zo_sYH-BXce_mWiPi)`Dq`&aO3;q6o|NZxK_St7sU0uzlO`H0r zUvR+%JpAy(OqnuhXh$EiFD5pEm~;r01UU7qqbV6(-uK&;OGX_y;rn@;$GlY6(qc|XxaiUWxiiIpNDV60fL0T(RC^Efv_Y-h z!=#bV5UjX`o0JCzx+9(u!b46diL>2Vn3E6*DK$k}q?HsR`xdD_honoy5FGybF;e6Bz}nhA1BN|<%ZF(F0<>xH4O@rXcJ zxTbC3bWjsuA#($G|CQ{VR73$@T5!W2pYvo}Z+ zYnVnRl?-q!3)^wJ!|}vm&(V7g*L8&uVjwHrwKc}l+jd9Y{pm$AQi3mMKJoD4cn_Q3 zc+z^dqcJjPU$4fsrAQ_Rw}42xB>(o$NK0k8zHe{JpAv*a?nf9K`c*#1{ATz46`uTY7q8x+uGhLpu<*7bW_}~sZ=T_Y zc=^Gb75wdUtu(zm;9NQs<=?WWB|JOgHk2~q9F$q>o2hm$Btv3MMV0fsfGRIJi%e-r z0m?(<1yo7Q(W%b`srhdDko`;Jfz;m}WISaiW_`Z_;=u7aNO<%&28Ll&j9{s zw`TshP%!M*j6QsTIqul9Ak~FFo_Kfn-d1jDk8;P7ZT$926FBkaf#pF%;h7Iw33zl4 z8d=EmYua{iA=e2q$ab_WYoJCt3o~ZSAQFkt(2&UknLT?pW5UxZg8KUZ%8y`*+GX2oo8xc3&@&v#C&6)kC51TWd@$<&h z@!V8b`r${2m6H2-Z7Ky*tBTkcxoi8Zt%fJjpdt#7QZ>{`7M%}M$4WGf+d zKvcR+J8&8$hgUw*Q|TMN?&)j4lwVo!NX7K;Y$5JUY^<;U!vjyhUQ{S0<3?50+sDrR z@tE2RAAG;}2bXCj1@}d|Lj_3zUWp=rTr1=Cq8Z>?2;GAx7N_&=I;zi@O>R{wy@@wN{z$MzpHVu8QdwM*x~P{-ey<Lh>JBrjW^!~&QfT<&sQkfq+N!3@67m^mz4y!(U{VHbLo8?)fYoKdN$zt0|jg#7@ zLeu&U@;@|mO_g4Gj9r#b4GC9bN(cxIAq8e(V61njwzAXDG?DVKA@y&Hq|#Kmmy(00 z+R189+P2!>ABTa45D3jcrux*EFqZPek)%_@`k(XCb`<%f_wVQF)m3b(t^U6s{q?SU z_H|b+%UU^LV%vtZY1{Bw2oczfdNu@Qi7;3|%1nT@Z(6smebc)2BkISXUWILK_OgHe zEAp+6Xq}%pEXx^q?Cg8|3>E0|T~xrxYba&>|2HpL_v53(j-<@B^f!qG;DqZ6IPAx} zOmOQ%`;o0Qt{6a&{|My|^I>8}=PLy=0WP)`kKk})ApPIqU`{4OaFLq!N0gE8&afwno&O3%B9emq{tw}0W4B|c-q+lIV-cr(QIRm?$C`bF z48TK=$2j|p9IA$?2mT`t^>N5-505?> z8RNJkeH=Jlkwz28nVfuLfTXpHx5_DO+iri8p&j`@et3c~?c_nfN}KXFc4rRzFH9@v z>vPm)zrHKRkN?#_0qM%8Hn8!^1spo2Xt!fQn|l-3uB13;56TnlL^%UXOGze&E~hCg zE90j>{V6xybQAHo`b~bnpGz;jluIwYbeBewFVt<=&iWV` z({%vMppW7O6Il7|y95jm0axG%aQt2@sU`J*zw-aFciwSQl=mNhKU22c?q0v+fTMQ= zK@h|Wc8w)!R5Y<;iY1yD(=ACfYScty)Mzw`HEL9n*c*xs5vBKb9B{|=vbTMAW}e?4 z&tBQPJvb1f=Evvtx)Mbp;0vnNj5|F^B0=M031MRkoxYlya*P@#y$v|@DPZ6Rv6R}V3LW+)*+pwUw> z*&Xd_i>}9DO91IuY7nNmcTVhlMIn&H5=owW=}ijI7_WJ#jE30u{9FcOQUc1{w_P!l z}4rL7wx$?|)f6`k2wrMRfb7L^8alNm`@h z!XzW!x$D1DLOh8ybXBH;OeZUl zMHuN?CMjk97s!}2w44BxmthPlK}6yZOQqF15=|)27{_rSVPVG-$Z#99wIK`xnX(YN zo}uV@dPgnmcGO-uVZwwf_vU_Dmc_=68;^*`|dktNGnTMe~E;4Y)m4V$NWB?l0^;E_sBa)U%i_-Bu?@!)* zjf-C{;hw3rglaN6lp0F8GL62!w#$~^_i*|T6qzv#mGmM@V{^A_~U+cEv}%P(i%ym@Tgxa(lE!^#IZ<05gbRG3K1 zCM+CQI0=e|mNDbZ!_f53pYuHrzRZ@b*%d~^%ZqF&WyZk8u`H^#H4wtan^re~imRrU30#G4Qnns+tW;ss z)~(vV{#-M-Ef`)r;fR)thl#dZPdN8bmphsI!K#mz`-8EjVX;_?8M9+yfry2qgRQyK z#8287x83kp?IkKXNYGT%K<(^T`V)6YBX`KtP0MG}XQ2K}8~5CN7Awu6i(5ni_vPsEd*em9y+?QbfT zzJAm-trz5Bmi0q3bnK*!Ra+17NJp!Q9Az5oST;ga=|nq2y9sQcN_&KIKM}gV%SF4w zNu(f|N_(ZK--FcBq^1NMDfHe*9swPtp%T?@?TJi|g^Y$sX(HWz%Fm=n8Q15akdcn; zD2b9%l8_EHR+2;_jBMTkYh6f>Iv1vCqUQ(Dylza*z$G+v-N7Z3xJ(lbfhO&=Fe`Ik zbxrh468k)nQxs?9Oy8~-{DNV)rx9s6lVJ68ZM7_FsdX04ILSQ0<^AswaLJhD#Rp=& zvM%KV^{oVefWQeuD{G*(``W6f0B!@-MRbY#eq{?%D1k|n8{b7Q8=Ra z8$qDI&g{pF`0KIt-GdpXplbEzX8q!xqn_TQw;g(qDo)Y2+p5& zuMZliQ@JgZAlb6jV)8^KOvuR*gd?3d4ab4H`o2G#2bAf2{AuRkb<4KCmt2n>Z7z8E zjo98&%zZW#kGzKI=lAA|#k$%sjo~E6jw@!#Hs!ayzAnuAx-i9l7c+(zWc}V9Z*1nW znL{~w;!aaMJ8;z4B2uibh%u|(v6fUC@A3m`|oG*;>Fx`*IgOQ zPn$N45hF%$@x__qrCGCPapH+5W=tDjTp*7Y5k_G`(jqJz2IHd9ZE)Jm{V5pSNm30N zT*`&t`y-)nrfH-<$L(Bk@zFiZlD03a;N#~PF&2|ND+!t#LxLWOkqRY>W*snQlij0GoG$D6 zAA$gKa&nk9=Y)R{x1VpSYdvu2n9`Mlx71#|{=QdF5!<>|@%EAslZYiTl2P527g#vs zn1jxL_r>>l>F+Oj+ro)I8mAw$#p_Poa^yuvHVhgz@Q$1uSJX+yrIy0uIF1X_RyFM@ zLXMN!-qHdoa0`K+Oi}aBaz@OaiOcID;>7T(aWVt)3z#wMP-&GGZVj7!C_K(~J;!On zq~6et${`a5R~L`-SEgdA3ngH8Oy-NaTXX}BT zkRO(<$QYxO%+aJIgpDm_nzQUm%F$Wg<8~|ci(`Ti$oAAKA=2JJ37oc8c!AgQmrEn!} zN`+3DX3}5kc+EW*dX$uuFmBv98X6i{zkdB^j==7Yf%zWF^3;3S)@X{#rdW^o>VU`K zu#tttk~Rw}T1Z+u-v=RJWQh+`*H}~2(=umVe?Mc({4|7;EUak3>bkw5GyJT3<0k~G z=K{{=wbqsY{!{GTvwxD)>oa+0XsmXqSZ?9*3C2!0_`Jy-$ALBLQ*5fR$PEZ4j(25* zBGlE}RP9g$yWD`r(7~CZ3u`x|D9qRBSK9fTl2VnAZ`_=sxJYN}WLHKg!#?c8K6Ij; zC7FgY)$M@L;2RGWV(cWctv3{pHaO`I1-$a(R_vt2SFCZ)6UDn+*T|ziOu5j<;zuIg zXZ?)5Ps)55u>m+4rBqph@|F4DbzIzs|2O!~MSlMNWSDPU(8wQtTfq1+Cc3U3;_>*- z%Y@FK?c=JSwQ$LKent*Ac;VF;%T^}&$HPScOq$^0SGNUeXmltp(zyA~AdzU_JAY@L zmcy-gwejA91VbGi54ds)4D zHMiY%TaRefIdkTqcX?}m{q@%q3yk~p{Kpr`uMIO;nwaSn zBo`WHO#`AWdc>ip@Bgb@zxzXfk+C_pw5h?~-tu&@?GS5d3gp!{`|{C5Wa*~;&4c&* zQ!*IdW(K1Kq^673Wayx;Prq}@8Pm@gIB~$DaBb_6p>_7AaNEl_ zF4($#`pG98R6n^O=bWOvf>WZR)0are9J)My)6G%fz?P5JF?!ad{spP#zfSqu^hquC zq2sr1uP)p0>6)^s2Tr+2$z9O*Y!HTt(0ld?6>G<^VB-Vf2X} zbR6Z0(yo}1$#mIGmTdq?zse)h^n^Oq?j%V^vPrY>uU$qW+(?x>M#vFpW(w&^svVaO zXmM2l?SfLvV6bo@JT6ixi)JfHldj`Mqrc0AX&8V+rcyYzgQjU1rjeCwvK$93WhrHf zp{@nXwn$kPDP6;-8|a$elV}p6)1OAyv7}^0DnfO!mjjPGoZ$zICa2VgW@y+#vZ1nu zhUPW~mlrUoe?GQtW2cg&f(gPkAwsKa2`}10T|*0l3~gr|TCX_oyz{v9(o0#kY#Ad) zjG&^Tf@`n6mQ-r*d9hx3uSS{D9Is~bU6C1 zkEm+tQUyQhjERKmzD>)v2NOXyFMcDn;N;8XSvi5-8%sU+hZxV^8D+v@Cav`jjnxjn znw!h8iJys--PE8XadAVAT z@};v*%VFzwiy6n(l1xIsQjLE-QNqx{>h^Wc89Ds>os`inuDoqic%9ykmJ%BQIf+=FZW*ZbMHHqTz&Mg9@B>x``G;3qcAkVzfh~{EJ6-x*wZ&~o3SC~KdSTV2kx=Lrq1kV=zPEaEvaaRW$cF6h zR_)!+_DDP3_5yG~+T=SB42B3UuAtw9@ied5fE`bvNeEW$V8atH9Buo(^P-m3YzY~2 z1db)7aL^4+6CRgomf4}8cdX{3FlB+X$or1XxtF<6)!DtFeLvF7L&o&>0j=5X-<_>1 z-KH7h>~1QQ3}|%9X?8c5v3+@M7u)E*eEYtcC~H697wyO9r04e>5YPQl3SP5_J2thN zLs)Z&=J`n30y~z(NTv`{qPtya1-Urk2xdG^iOZcq9=F*RQJ~o6LQAC(jze=QNyOB! z1{9!sO!Vp?Imr~bdZtXZn1Skf1?U}v1`XoME3f1`-}w$J zR;Dl{&YUr)Xc()7Vh}QIOZ;` z<+3MNVrYW-*B;D|jvdY~{=F{iy5_HM;?-6495SMS?;SCu$NU>#SkHf!*I_#nQy0AT z!-M(tDPx%PSeKzm{|O!n23<+Zwnu=(+C`}={&7om>ZP~(hWGWD5;4gWH$}ManOqJ$ zPW}Gwyd=aw?~L)&N4q-)e0J2<+njh-J#)_Y^V{q4JCe`aLJq&YDcIrl3^0DI$)b5G zgmuB91T#;nKP0+P4}g$k%xLg?{*b>UzEB!4T)nX=L&IGWHw$U$xuW zhkf|c!$5hkoZWrKte^EgX{k4O3pBh1yT`Ey`s+-+03Jc%zR1VN5A^6je~bTpQf43a z;eQtSc^dcLQNZ1|77z+M_2(~#r42i!YD5T%Gv+)(}lKpn1i5ZO=r4N zTil{Cy!X{HUGe0TPx8tuJ#DMDZOcvq-FM%8*micop`e>SL}(P)7Pb%=Xtb=Z;p3HC zh`UUhii)s(K29A{%FJ&bf*J5q^VTMwdvO8lgF(WeM#2iQxPdIZ~1nmNp2%K+Q#o+eKA0PApo@07s%@z`AWBj?;gza1l#dqT-pC zrqs&RlvZiuMljy+QY3W@p?8o7rUa`s$okh7`Dop5<|zjce0Xbq$yKY~U42W_#_jrq z6A%2LIc43g=LYT$M#4g-2d_dHs0!WA7WzskW`x!wIi@$nnnTbWDmnYoneR>Cy5Ha& z%l?UPQT4>8cnsZYPs(XeInwDK4_+vAlHo8Pz5d~~xfd6>yydxn&962qCyW?cLAXq= zXs99?r|G|fFQrMESgCCY}q4ke1~vU^m7C{X;n#&=yBP(ZOy>tSoo4Df{Rv> zfBFgJ<>nz1%@{%;5=m;8trOKws<1&?g)to3ooRHyL=X@f<-%l=l}>y5A1q1x;-OSQ zEds0oMRNRUhp#RjFmfS|Hg)@p?@ZjfbcsaK3v+W9?U?AWoiwzjfj#R>oti3A^h_#sCgdE{OvWxC?kRrNGQ zl1vy7prRqlvExdZbdyrMSdQeO_qXwzQ^)j5%6zz4*+fnsn%%Zx?$X+h|EFxpg3ZlL z%eL&a3&s)LaXn32t^*oYe~^5op~`zjNx9aiAE2GS1(yu$?28naYgBLie1!A&KOCl{ zNawa2^E1N0aswKFx;=YIGr%F!-3%LIuxd@J2PyN~Jf&#f@acdKLI&Wf?*@2gZj?Lj zY2%Umi}w1l?882Mm0~ zli6K#CuF+9vj?S?T_FTtRYC^(Pq>{a=k%1Z>;!Fbi}@RRPqyFI9P2TyA(YH0NotE* zw8j6sYKq$0T54-+cfDX5U8AzQqqm_&kzT~3o@ z5t9zN0;UTcHyTB_>8I)BNrB&%2x-yrCSG*D74K&YiZDoMAkc9;N~MF9WN5oeK&E4e zkpzGe1QLye&=@QXECD_QE?ZzqnPKXyNt=F-!TRbNQSm|ew4&k19p*%1$G`s9myAd- zf~PoeNI_odn~rp_%(xk*!NhPDX(#jUu5i6bT>T3o4^zDbwnebX>3mLkJGkbEsIk!T03v9{u^C@xy z=zEJP@cK#7iZBcYCLL0mLAlF=W!p$0AjglDj3QGuLOQrj6QAW^2unpbBY@pMukS5L zFl>mypn;v&a3Udj|Dyy49^fKBPh-KN1ktGE$iqE!_1tZ2a#*%9$-n_R<3?xpE0?WI z^2w4UE|*}`2!n&CxibcZ^$j*_H(2!Vr!#tFPnAk@i^J-5DGCd;tZ&_`cG$f3R*ak+ z!Ko+aWDE{Ld1So&MhwFceEn-)@^bg!{x1NRK~euQhFy3>FzR@I_RiuJ=a&`b-(n6g zI@H$2UF|)5tT6X8$JN!ZvJ0n{f4{hDqG!jGZy#kF5*^5KB>m?chwto(XWL7iUk9-d z$^~?vkNBoqsw=l(6$WCXChYf&w%@29gcdF(m+a-HA;%_WYLt&F$8dGF$;XQ~(A?6~ zBPErxd3F9e{`|nd@#kj}3_B_-sSgKPorq&}DPpQ32LinZfJCEFyk0McVPK^r7ISlR zDJv`6Wpi4Vbt)>HqRYfYpUlk0^z&1g<6=u=ltG0agn*6poyy4#brA;UdoVPS=>@X~ z@R%B3pH#*pA8qeBGjD)S;jl|-+R^~THZQj~Joc+d-H#p)?79JfoLs@VKg;31tHYcy z$4hIy!$&V9`SBxtQ^~}`aw00SIRkBBXKc3RKm0hsjA^djPG_&KvDsc_cc_*#*10gj z=n*EvhV-0w{LvmBd%A~B#XjuA|9cp~%3$5d4qI<+cQ|<{ZR4L4cWidXDmd;V((4k+W$5_MkNk?UdQkqR5I1|pVRvH z26R+AoPtWv@}l(0UGMbQrl;NhIqgF!DrxEvIyK#0k&7~FJ{kz3V%Af@A5dMne4v%i z(L*8d25x9s6PhlVnh{yHj2>@&lbh>FUu&_Hf4A(`x@cl_T&32;1HKh7Qv^i@IA z)~q8U%d%XF#NLl*wk!+0MpqZlj=`{yDRQJ6uWZ*YXdR*kDJ2eShLEI{oahuWICk14zvo*~frdvj@CeeLC+(^VjSN+bV`FMMBV9Qp zgK?MBX3vR)L(ls>-kDy*Fw2G%&9mcrzj!Q8p6NmeAqC>ArK4ysuM$R@$Y_s?))c|v z^t=}d2~p|r&zIlMZJGDM55kbla~xNGJf)2nUCMMMX_6;RptMi469`SmqiKx6MN?f1 zAJu%Q2_Xt~T`%n3e!_7Wf=QV$7=b~)BRaiY0CZP6p*$VuY&&UnPG_=@DZxzHBv-CS z3;5MJN?GWRg^q#8a?;f`I=ZG~+ai7GXb9avYM}XY5t@b*kCFL^>>J+wFwPa%M)~xe zGTdqM`-WSCyz_pX1+S}d=EYYuv2nA-%l|Cl#A7=9d$-@y#+`p^ru>YYotXiAGGzFK>@pIQLnQ!c8om|JeA0}|Q z1m~QQ!=r!BeCz(s`*FVh%|=c<)-aGQi>ihkw!6$_qQbks9TSIjYsmw4EQXs*KNkDqlS^= zn&c}kJl-`dztWNpmTjTyI-2Rhsfm#chOTiB&L15X5OAAV@hIC~d6Sl8g0YvMU1pSs zi`r@%dNnVWfF&im(D3*@8Ov2}ttS%Aejkk|Ev~=4@3xI4P6aS_ zfA@(aX6;`6Xr$5Mh3_|a5HZO}<_~}T*LUC0X~ZlKOCHbYJc#tZ&fD#kWnv522hd+7 zOhJ(lpBDz8V!^-csG#$;-!FlIK-b8XLF_c=;WNX9iVN>;ETgCAxA*cI>D=F9RQgu| zikJb_m9F5wS1&M?>=E*Ngin@7{&mv1iCyOq|Bpe}t?XLp{~nsDSv8ZIRlUs@D1z|I zj-JvSpuWETn#RV)+xGUxzJ9>OBZ{T{o6bS1pd$u4oxCE1Kx8Daq?eJl%8%B%5CT%9 zi4rRvIo*vE$U+iiqAwmAPL`N!0n+TE5NTh|!Hg#<&}@>;;WPI??V!hpOd4^kJD`oz zP0x!P=B;}m+SHI(&a@dB(;u(E(Bh$7nj$qXfa3PNE>N8h@_3r(kKub zIX0c=N7KP&qWJ^p#U+YV3rDe98?)^)MPu?l(@SgxU z;t)5F{3Fsq%2*aW`OgSP9FqB%x#;pH8k=o4E*{XKnv{}^x95-kxrmX&4KBW-IqN?C z@wNhn3^Mr1jjbdSJs+9ByeY_!uL^MekMoccj{inIe|#X+QM!7=EkQ0h&(}fr%)X?N z+wN}Tfj<=PR@+F+Vn;kiOIXscJ{mdv@ELCvmX=N(I;i~dP*ck^Awz~{+tJ)nCGi|l zP}o)%DU?!*6q3qR0S7Fyho%lpix%)V{hb zzp-*FgA7krVnzTyp3bN!=#c~P<#?F3Nge@;D zqiOy!hL|2im-MKA<+^wJcC?+4x#Ef|cuN?cbDEWwOefNxH!b`-ppt8RP_UU z=qC~W@a+({zPf8`32#9B3%I}gbdOscK$e%3#YGxBYCB&77>3}s8`baRgfr_2g*%V2 zq*&uS7y8k47(Ucs^2F@kqlE=JJ8H9&fYmiN#YJCHRq{UU!{-PC7}Irv5Ky-N?iu_V zZe{E{|F$-&mt=Mr-2shZhwuKluPl4{)L3>-%5+s96rz+2>&fheT#kxHhD>$E7?e7p zyB0AQ7zQMOP3&6xI{-D{-c05zsS*@PPz&tnWuNoX%WOz*Z&zqveqEOR62NfOK)mf1BmH+@C07*naR2mGd>1DnP)kal7OPA>;svXk4&VC)?m|16mmNhT{>X^KPD9hb+~y!#7FyJ;8QFbu zQBl#Yd3kw9?(NMjYi#x8=eWALWs07ZsG+OU50{Ci={S)Xw0FdXK$z~%#1}h>Ok^Vk z(qvCIXr>xu?{Uzc%tF+lwx_G@*1WR7)f9?9C`@gclSsPtMEo~vK3$b#BrSYBxreU~ zq?IPYOhshaNp^NH0?^zpMqhZOV+{1Kk}>D0=+^Lx)WWr2+w#Hk+o`Oi!%IdJne8fc zq-G+8jU^p6kfLDZU}nymnhXT;mI+5}khY9CDa*2K+jLSXpGd`rSgqkn&5PFtsv6rU zk&;{+^qc^AatK;6VvTjUgdmV|(2_|Nq3kk{(RioQs$CT&9d((sC--zH586wtBw(rZ zBi#j-jn&!=!Dh8gDz!)F+A!de`-_-yOfAPA>EXLSZ01)#%VYeQ%zoP0r~A16x2-g{ zI20CWyf!b!s1XJuhIKBtW_^kmUyJentNk*{ScQNK&+YURJ75?6&`A?|pTBjx#Ydkc zc=Dm5j&*fYUYRPfUkUw1+wVGS#3*8RM;`OS(;Lt8?*#X~%P0pyMvK(1rbu)UT@ER3fi z3MTZMK8C8779#8<1Ex-LhR->yv9-CaWc}jJVxX^x9L>N^M$(G9P6z}6-DHqvvg)Ii zj6QAx?p)QTQzwsPKv@B8p(wW9c`x#MOwK-K8Yi7}D4K4hk4X~W6hp6lpUJ)e#jZ>e z=smZ-OUe4?&6~OAnrk{fUw7SgY}&MGm+h(R`lqQ>>ivv~ni=eE`P#Mw&n~X%F@0Ne z49k&>?;q$$864l=&z8n0P9GFIz2SFfjN_C^{g`>@0_sD%=%!EoRtfd%Pp5Y6*#O%& z*tad8pSpX}EOV#j2wT_KxIChRkO7!OagYv6^n^0|}11revx}6O?h$<5r1Uv~`ncnu-fZqY10FzPYXmNUf z+ItK?02(f3 zmF}I*o|p>s0bUo{j00VLs{Q_7!gK%Wn|a?Cg#MK8|8*vxIrxj-kzFFvSV3J+PT1{s z3!l$dytg-}qFL>3q^nRjEnPz|%)=O3jxn?xk?Y4!q)6?kBfe%Mc2f(&qXWz;jG<)Q&)}XC|weun_bFb($z75)J(MWR;}^l(;H5F52AItQ=5wx{Vl%G4f4@QIN(i)F-@OD-&*_18=?ybH07` zy{ulZx|WXP@Xa%i;QF7=MhG1zWn;%v1lKjN=C5yHZLJ~C?d`Q(YG=sH%Oe<6T*|=* zAIym-p2+vU_r2X-&z_4a=%oyz6V0vK4j3WruP9)N@vSzdW@W1Yf&e?xv-a$KS(m`W&;!(-+ zcT!9`(!{Z0;Y&$|PWXJ{u)lqwpZgvTarw2)+<8-e$MxUb;;^Uu)zLFO9D0zOORi{U z?i0n7mFhSST>slv)@?}f^k4V-BYhwC;VTaV$Z(GGH8!%HS}Ke9d) z`zpaNqEqVl7vOFbDUuCG0yBV>z(imPibUB4`~u~#^3U|LCB3Xe1O9;`BMwImdb{rH zZ75;^l#=8F6p8S7mu2$P`z(N$P^85*^o~*Kdb3B2&7TFOgoyG?dEZ5MX|~t+HvN zm!OE1c4qOHC?e&g^ymA4f1}Pz`#JB5yVL9cF6un~HOn^IaW+a#b0nS0q3)#Poha4J zV3cy|w)8e9(n)wtPXEP#TTrA^yQ<)J6nO@UV0sTYk1sHGJrs7B|3QL{n=Jx#qImDRf^b`i=WNQ_k&~?Fnc?Fs{EJx1mwnmY^mW&**^V zc@3l_!^l??f;_K5FlOOMiQCY~NvC_X#Vzd5Xr8z`=-00wfk1$&sw(2~%nouO5Xcxv zNGS=0dYW9)brdfIju6xsI>O^2*Pla!9iwj5a)OaC$#?=`*0uhN8(PO01I#g>GCK^_nvVJ zHVG*y5;{KFlT4AqAgn=M!0q&(ICkyGf&D8}9#1kUgy|9#CxWdL*Dv_g*HBkS%5hW- zm1-#VNJ{aAB26dt!I)T+5)*-zuQ&OM@*huGuIEatwtt+OH2Cnww>PBQ(NRhhP4AZK zq~9db`Hh-Y^O8>BnJL*BUF1&y0qSuz6wY;h+;tSgi$B&(~$>pl~VCY3$ z-n8QY|JG-kz8MWiMFa<*<1k2b6B9b?QW5f`MvZ1+#>03KkV+F7n%QMPdO0`U$h)Uw zVg4S;dc8B&$(}6J7x;aGR7x^+vMa;Pw<|9CrjMWfx|P|d=kU(^aUQw9D1(#+;GHY@4>17h`EUPHPao(IoiB%4rP- zPq54VWB?z)TO z;$qxxH-=$w^UXK2a^=che{nD3r*qfx#?>>}{M)0*ap_bvMET>}ogOgXn9`rxV4{PR z`O&e%x%15N9rNXbCsWxJW!Nv?#?%EjoIDzU%3F@^SY~})n6Wp^?|mmGp4yLXi|-)P zasnW?uam#}@L!3i4m-o$>ko0j2%SrB^Kr|!+9(;M5eZ7Xe!)-rX!N_gC@j!;@0EUB zc1<%y!>buF)IifiLnmhjylHZx@64n_@Er0Br@IFx`^TB2j1VyT_&pb}w3o%51H6wSW7_v;0dO2WNf}V*<2;md=V;(Y)cMrXpLf?&=p_^( z)4tsZig?LJ%G9F>jw4Vim2%*~^t=Fy?6@TT*-7tLJJDsJlr{&XKTDMAs<(FU3%-uJ zZrXdaH=`2BMx%%?P{dn1iS%l>?Nz7OF&cHCH$C&f|CWa3+*l(asgjQ>DlOKm-*Y3tF9rMs6Bs(8wdmfgu`L{en0o$e?QMW^GwGw|M|~< z2n0Giu*qbyPksgoO(P~Gu|$mbw{IZ0Lu1lG`!VB$srbtBFx&>Z+dycdqtZ#*5+`M0 zB`l(qb*!5ADer9D#z@V@bYYN(o+ego&|E}?q}rvCH)1FSg9hS6BQ&kqKvP?YewHMV zlS`8U!AJ;jh`QW(^7GK@8xfjD;m~q&2IM0`F%m5a>gpRPj6^8tQj(C;4eAYt5wlNO zR(kx9*>2r8+uCA{cOYmE(_a>TZR>yoM?LrN+aAtov%5UE`xqa=@ zE^!R!{XyUQ-o`+Qzo9hOH9N9k#gJxQIR9!3TW96Zx)FYPd(wC9BNXMH(%RORTPk!0 zrEDCRP74m(>?9*J7k+d?$*3~#1(hl#+LO52kF6_l*6u2;br3fZDS0XyVW4huN67$X z?9$;iq~S95>>O8ATKxRit=xBKAwRypg>%o$$*Ojlby(V1_oh}(J<;1E@u;Lor=ig% zo{*n8F|Rk26zN2wl2l4!nra&@tqy*lz?UN^DN^0uu4beytqwv!X&=p0JK=!KB-hko z&4v#7vq+Z$1vE({nxyK(RX*EshMT%ho^Fz(nKcMVJW03B~W$d~eED(%x5xKVAv><<3RK6%K;S`; zgGQcVP-=J>=<(qdT2_@zUufI!e)qc!8#WAG*Quze;PWtR|M|amZs)e4F2bnm-)6r7 z0g{$vZEYxn-#+!ePcoMO{hJm1{>|)_z$sfIzWdVd@1$nHn4_oDR(CX!x_J#%)@!dk z9A9?usqR_&PEO@1-}7?p1s>|Q*tmUy(m{HMVD9t4(7^_;K37U@y-oEFn}U3eA%lzz z^7O}7*!^|%4VA1@m0qqpOWxIICEjHpdPCP^tVa!}EJoprzV_7q+ek=1n_;q+e_ zouo|H&!SGCODQB!AQ z+fY70-9u6-NnL}(!2bFkD{JcNZ8S|#lBMIFOiHS2>$$tRysQPJ6yv`y_75=NCE3)lEKr*a{Se&l0UdK!{oBMs-FA)@(PtZnwWOLD86^e33$EfH;FUH zFmCoC95{a^Z$J7PYqqyB#kO(VHfSc6rcvt_3_WH>{h-qid6n{ZE}b_ke>B zIL}>}Ki6(mk5wT+bg$<6DnMFk0n)Aq)24*{n1z;O>8=UBVq6TjE5gS_KB+q|+}eV# z>u@t|mYXpGl@Jn={*wlS+gaOG`RKuayXwm4gQ#Tkz~3?nwnVZcpWS8(XBEJ6viA&4r=q3<(r7J5Wk>TRo9ff*hwk zQ7f&G!2#Q%N2yX*2+={x{39BsO*;HAP|SXTfbynErPrq$>~LlE)7~i@2QIm?i3`s0 zarqoSZ6SwCu4rcI`(-_d6-|Q+&hhb^+k?!1sb|Ic%){ImhTxz7igLj@z8>@U28Itc zFipXV)v1oum=&v2j2@{5gaZfY_;S?zW7DL}iq$EG3^F>>rTPk?>u8=#B|+CU2qEwb zgE4NOG7s-6-*M}xN3_B)B(~##5V+E5XvILTbTBmyeK!gWbs;DHoo&4B6afsD%Pj2 zdF`*U*G~GbccqvR+b?_7wd}^ z4K>K^ib|9bYdLE0+Z7{Gr9t_0ram392m8_;L+JDt8H^%-wxfJk4B!HK8pdWrH9cd| zhtjF|sX`eYcg1ja?swA_m8j!Br;p2TNpJI~sB*9vil{jk6^s5(FW-}V_N1k6qe!>* za<$XD%-ezL`VXa(5b4@34XEpEFrA93p*z`DrY628Vki=2SeNY;qZB)RY5U>8VJI@O z{T0WRwV;FjM9Iq(1%Z_SU>(&}*N z3^y-6RnqYm_1=d<{Ngu32AAuYreMOjulU;>fANuwKKdZ#J<$mv;Mb>&;m$WIItUp6 z+mSrCq$g+n`!_4N@#N9m@p=X8>w2bkbcG`&J6hvB^!_%agg?&SkNf6V5{&I#3!~Mm zS7&^lKYu>aXq3T&2WOBneL?qP9S5j!QW!-6j+%2K1;aAm{4HIwj&tVRO=D{WDJ5^e zyHY;+?0e#^|NNT#JT<`7Jq9C=n~a(3=HItI!;a<@!yFaU92b&ANdd;-f=8FWwjz03r!AD;9#I(n6 zzj#2(`}lLOy)`76N|bv-c}7Z#D4G@*fEyh&9hpdBi4X{h@8J;Js%&0*MvWn_y)u{QUx@On+kzb_ zEnV@`ALMf3xxNg~mUfht>RfwefS=shO8EetBM$Lk7)ptAJ$}foPM>kmS)sfUYb4N4yPdx#%i zuHN!{+=BCG`?&p{HV!|;O(G$==fP0MvuJNaw3B>0fq}s2CWp`fkJ$48ZTmHAsGZpL z54{gJf@I1fnX-~8+upe}Z8zaKju0XXZ4}&Y@X2GJYf!=G4r!0V+$IFm8q|wBy!hC#QrA_Yajj}!9bOEbVRh-DM`~N zi_+a3l&pWH=i8StC+@kscEj4N9g)7q?fwinEB*iLP{y=-;+8lYMa0BWCb%|az1dZx zJXr2Q4eXmx>X6p-@-CGB%L?Eql=|bDEbG}F{0K!>L{TL^FQG`Qg{VRN-M|mh`<{;? zf?mk7p1CNa-s4eZQ@c8)-K6%V^t!GaKw53&JQ9=zpRJkY9G07ekd>wR`8d$W$XasO#)H zlwXX7x(<6o3+mh*jPmHoc3nMzI=7#oRAPTfFS|L*vfa_1$}}Ej2s{&Y4xaDBclSCz zS(;?(q`uW9FIbe|k^77I&p(uf(+xODZGhm}z{ zx_`zz+p@Ug+J|Up=_IF;DN9stt8;#O{oll&@47;0X+@3D1OumxVE+@Ru>Oe;DA&E1 zfQ7`$3*b23m5bhb_ZK^AYsXgZ*ow8_1HzFQ0Y~D^&5xQw+n9gAz@JV!XVycW?O{8S zNW5hm+G)u`uhX)m=v6>PP~ayZ zT}2cXE7q?HA_#~|6TwCkY=A}gp!cn%WgK=-fq7$bAErExo!7uvI(K-J};K+ zPCaL4?%X-gJfG)by!10vnaB(oQoIoeV3>lg4Xto!vI;{r%sufC_nG^jk$-vi*|Ijc z_Nd#hTRrQ%?=IT$)SVZ8q$2poaCI=IN)yT`F-oQ5gldF|PkALtb{f?kBO)OrB~{AQ ziCIEu^I|uR0=f)Iz*PkLbKO)fD4Pf4QMz20FO`;K3gHnlxn&$TMZ!s=Eyf0hhDL{9 z+|rg*7Uejgq{pSvNz>u4eXZ#$nv`KWay(JpB&1-a8i8lJkR!(pMeSOpX*;<*ol~bXkz}_PHxk=TS6yl~E+U z=8UO_94GW)BikjzPvi$8Bf6GYE>+gpq_4$i;ci$#9FD~Lu_LHsGe&`Ay0-r4)Z zO;wzJidMc%o@f=w+W+yd7@s>g%!oSuw(#h~1I(Y}zaWHre9TPlQON2lh(&nHLf_qwftL4ETaD>lBI&v1`J* zkByzVkHE?M)pFj!`Z=w>BhI()FTBlO_1JngTy+cwjVY(GYhbS;VCT+UrQeM=-pHy|t1t|MQ%*UBTW`IU^Upt@ zjT;O3%-_Gg+IPEKWT3yGg-aLocdIXi>ni#3;L#MtaxSpXEwb4R#_nEC)Q+tar?HdryP0ow7+a$ zyuBiAtF~@KQYpZW+o53O(Yf{(*Fp&tHSe(^=f1-BS2{Wf0 zaq8huq>k%eyk$f4mKT?-s}PTGJJF7$zT6V&AzZ2lx%z6!1QvckkWs7vsQj1myNDR? z2g*%@VK8dsNJ`E+ZpVn#>&iDjy*Om`#He(2*#<)8lqJxIpb>$6M-xBQ|ov{DF7zfC0tb9tY!;&ukEl=%yKFdL+=0%1zt?>81%H=m$78T}kqh8}3|3a#h? zvxz1*^0odyM-T8#`Vs=&=z)Dc{^tGkhsoZ*Hv=W~WrrKl5!eQL5Wc&%KZZ65F19Vu zq{xhZ=0ENIpXc9~GJm%i!`}`@7To$wz*lqG+=3Vv1ioz01y) zlQS9yO`iR-pLJdOUU%;rhSwQvYbd-&tX(o3fGKkuN#%Xq>uL*c9F04jtglQ4BZr%8 zZyfmGv8K9k{a{cK_sT7IHW%Bz!KSSP8@vpyF&3arq(2Cd44wXEM$aw!HY`(0G_=&u zc8{1@*A(UcHySx%`VdZ--Zx;bsXNI{3pexgQ>Sv_UCa8+FNPsuKc*CP#`b{oGpu&> zeX;soNzj=tBXkTKgyewSk6#*#MCDzbJoswDC zbOBhl!gidI9jKm$_MX}UTEx-&e{|L(tuL;>cd2E4*)**3o)sO(|NYj#%su~#3vWB@ z>(}4C{L!m#j4O~rh+t_bZJ9omL{S>_D`BWM$8{5iK$q}%zA^%6UA{)XymZ-|R-8GB zB1#eiJZ?j2rA)@dtNyUy zz@6*27`V15cU(^oqqNCx5!48S7uIiL^%JjucFMFVPmH_hTi@S&=bcx~I(+`r;CQRG zYQGJQT&R~Fdf;c*1MAm6cC+6XOMl;K?FtUH9i)(+PmG2H?fIfqAH!l380koSN}%h^ zGGk%Sd&a}Vi5RV}!`H)Q_=VR8zXkE!F%(K7KS1PwVNkThX9_QrKL5 zjVM>AgeliWIS$IU!M1S|DO76To9Yf?5Q7-RAl_Y=!1L(0<=I!7>z+suX>thH4vbY< z^XR@UU3&ALXzv72=sWP=9Tde&LiQAj-IE&muqh;D@~6KWTE$(-^&IxB?Yooyy;Eu6 zKs;_f2-vlG#_o^9zPRr4@lLLtck8;_BYf;5L4Ng{ZsG|=FrWto8Rd+WeT^dXF><)U z*80LOY}sbB|4c3B3WWrbXzqsLy3pJ*@VDs0hZ(%~dSPk&mTdz+WHYB*Pe1WY{FVW) z@NS}N^f#D)L0@LY!I+Q_4?MZwkg8erU*4*9|w=GEV|zHPi|z>)yHw% z)Lp;5&fwUo)ubK88{78a_G4I`=u*l8_i>Py%N<=E$xz(JA4|*fVHMG7v-eN!=;>0mBkNwPn=7|uFXny&v+EjZd zHI70mp(C+XhWN-`Um+yZq@RUPK6A{r&K(atb;DN|CaSluDV;g0-jJ@w6ilX-0@$8Dr+Mj=GPE{;LKuK?V8B#gV)K|HM9x~EI2(vI1s?bIjfV8x@ zBNm}TO3n&qUZ^QZrV4p1pT&x`J*58bU<#3o-YhUP&if;CZ&rEJv%Vy~R7AonfXhzK zpRe?PnG!UQ2+W!(d+WI#5s_Kb_1YkWKq899!|yp%A8s#8hA4%t6jo^o3YT;wj!znz z0Lk_rAeTzi*6K%iWp7Ff@S8}(KuYNmD|&zWtm}Q~O*tq%1x$&ks6a&Hs7QhgN$MR~ zy`0Kxty21nE^kR;nh49n8a^DmBZAx6g`14hr?dM49}v!V5Q7-RApVUC)niCsV8o&D($-}=8!K6_4>iQ`QcJRawbWhw6cy)J3l zf2NNsuI-|w)upCd^2=Mg>FyagDf8)1g}CO1ZeDmf$&rWpdHt;v4?h;?iGxV_4cDk>_7#bTsVdf%f)jbh%sdE9Wr4SlvH zdJQZk+7vU=*2SCmJk604{vW}LoX^A+KRBDN?l_M=`Gy`V0pI${De~lx&C4#M9GCj% zSMk8j4^Y_}W1I@;0VNPn(9zyORb$tj(TB}Dqr@<8u&N?)vnO=0FB(5(Y$8Rpu{ng_ z9~_P;QcKp&NKTt|pXjmE!LAsVEldaH+wb&Q-yMG3=rY5$pSH@at0Fs_YOB2VXOtAB z6_t!X{o|e1fmPp-L;XF{XIQ4s93`Z2a5^48uJN_{iUmKv3q!9bWHCxcm^o79{l?yS ziYkYEazFw#!la`+YHfM?mD75DYMErW%hs0*AC^YU z@loPA-TTZ|oDNkTq@2}45s?9u)!M1S+_7QTL5 z?;ti9UsJ-ytB=K$f)Nz~>O126;)#vi@bu<))}MZG^2sMNW5x`|j2XjIPd$~Le)G*Y z^YFtDGiS~me)z*5W|NqvPoK`S&pyjzk3F{AZ5yt_Clr1mShHjWD=*y2sAKkH;>>Xb z0zLwv0M~x+Y_9w1`82n7i`trUdUkZMV#zvU$u!*!?QDB~1zX=&9}E3?q)Y+3~zq+Pe-z8yD?t+Xk7HFP(HtyZ-x*ponrI9o}6n{ zRWc@SQ{p7VhC7};OOys5lI6kiJ&Dv6jjyaJ3#{3~xU`EN@$2u}cqBsCrg}42Q`$J> z!19&L{<8Gp&2McvFd2y(AxB}gcQF)+a10O`orCZc8yPi9Ce-dj@>!6UH_*qEBJGq2!DoVbW#_H~(#%tM7+||h7&(&hzHz9|C~+ZB%EgFuBeH~y z0f8XGvUGY=9w9@(k1+K!p>mZbWYQ_!c42^FA`D3gFFnH7-}9p{TcU%I2v3nCJq3tz z6+Xvhk}Gj66Q611JXr#MvTBh`-&E#2<*Q(FepaftIwq_9vGTU1n^Y|<3z?Z>KznpkO zno4>iF5wc9jik=tqVvOjVo9ZhpZ}zStAAWUPsF9HwD5l7^9la>=Nb}8h3jgca`Fbf3M@F zg_}8iVilGl*w!9r)s6_URE`io;`*0qi{=RTc-rB>t6regZ?e-f{Qc|V?L4(Am#);E zuxX9#dv#1c7A#o6^UpuuXL@I+R{bnoxR7=0)-iVMScDL4-MW>nTelY9SV8=fLgG@F zwh351q!FN{CC=gD6|A`b4gT}*XW87+K{{;{QZNe1 z6k#z2gE|{;u?Fd65X_!T(YTM!ET-W&7Sh6W;{ zo?2m&PCIP>=b~}SXMM9vIrOAb)H#9?%D~E~TD-xlW2f2p%4;Q6)z*naow^a**Eb&Y z=HfRAC(_I`0+~Jf$R67qy)!62K}g% zjk2BWz}j$97|PMaLjhq_(Ba&#QY&XvJb|M+kg_6M9#cp#>GhtD_prrIb3rIfc|q-` zrv!1G+~3JKsjVC7HVrzJBGIl0xDF#ywilUfLLi_OGKnOlJQcLz1H&jJWa0@;$S50- zn#c+GkftAeKJZ&e!_a9`QX*u=Lq&N0E9Cj(6el87#!E%^A~CYR7OO)l{8eT77>~Rl zcSSfTTy!Csjf<@S=^`x?!!a0LIs~g!fMp^LiBhiKmH;Uw(lk+-zIaNN0yRvwi@Ej} z3Y|o;UKAdHT+_3qP$*saq+CtLNXNys9nw9Wh*21z`pDLAh74cJ2F34q_04 z7{vcNGNg=yPLjDJf9Bi&h%xn~D6`Km>9b-6JC^l*0IwWtvUyRGM=$H(%dhnB$e#}< zt@zuyZKR@o?)J?Tnyn6E5QF#-!!+rW#552HK_5aU9|8Y6dvPZOA67yJYNubroU^Cw ze!(0%V(DE*V{dEk>lN10lPV}l>Q2~nC*E7WJQ9fziR{|;slL9R`uh6aZ>*Q?1xjH7 zLmfqpvKS#vCJ05sP}r`ENP+w6Y8JfmHl4~rBB((yN=V8G5EcSU2&!#|GS?yJ8zS}g z?Ic2)lnY6DS}+z9TbNj`_IlB6G78!iR)TPT(1`=2GuzEqa<~N}J|zTV#<+C#%(@jq zxs9VHPe`m=z18owwTm8QFvJEYox<>&hHE=|*jw=R`+knR_V%-!Pa+BLSc66c&(4yBY!TDUY} z;y5nVt{~(pjEq7?THx~|d_HXyoAkWu4PUPG$15|^3Yl~vA>;RXq?dzhr%{H$7GMcY z_9+xf2#;S8AO&v5hsEoQ$okcgRiAiN21a&z-U505WJ#F3xymEZl*hihLQl)kZ8nOO z0Na}$!=+P#DFP<04#dEh!LEVtCuM-JBxJ>jfZiMMh_qQ{Wg%Ays}0A>*@? zC0p`)kWap3L_wKfly|>y6|U=`92em@V5huutxz4^;EyAHdzPd+Ferra0dkBU#2^MS zi2nlQ+s@w&d=Z$Rzra7g*iPj*lW|8Bw<(Bs^nL5|$hSK1hb0#+9GWd-+7*<7e}18z ztuGaIjQ<|HH(uQnoD5t6i~>G`j+6c!a4LFtyh*^U;yryEe@jM89x>j?NEBnZrJW zZNKmSs6#M}lc|5>!|kQjv90KrjBVS#WOCo9iP*Lc!CvJR**DV;5|av7P=P=hl9W(5 zj)RS2xOTTdWd@B33}s`vE|yYczxDFVN0c`xcT=9RtBC|1#q8Qzl_IR%pi^bcMe~Q5 zWCzFDc^MCltYNIToX=v$Q3pnbOc}evHT{jVj-39(sWT?ci6tVFRXRDX@wE-%r3;=R zXb4j|N_)y=)G3O6U-Gag*cU!F((;aLrXPZYfR?f_p=p!ouHVk8rX7q6l~Oxpsw&&s zD7w2ksIZksjHD@G2n++^_n{K#!EZJh%FU5KXM=Bg431RAMJP#=W zt`s;z;AG5i^Gkj_RfwVRJdXsHQn?Z#G^vA>2+PPOpDEYX?aPoCS;DC>VMzhPb&$B& zQX34HxGrg+)hBR{I*L>(&F0P>II%bu5O8&|lL44Y``%3hS$b~6r^NMhG!`V zD20(vt_u2I4_VDxrlH>FF`tafCwB6=KOwX#$!F!JJMYqGSb^&fMq&?Q5Q7-RzC`{v zm5U|`UPVV217If3O8cK#!ppbx|1|O2p9YaGM2c2H{bKpkcKDH=r#Jx4yK&KS-l7C%JqKIApQDxrynB9BXl&0 zQ+!;c0Fo)z|Mlt0p0%wnhDOyY5sH$?a=48yi+{VtXRW%%SB0Tt|4l%QHV6 zAcW~1FMH3{d$%AgeH`;rmo%y3BP|ufMh$1|HK#3#tZ1rTcl*PW#+`n|iV4R}53m0A z1LNFf?S!06{B|$M{4y02oL;3}(##Elm77PFWnhr4!Y*c@Z1{5PddJbH6jiRkRUQf9 zWPF44HvSN4#S(%GOUmhzk|tB?!8zmx{GJhP2pFH#*O!t~M=}TXK2<6WsWil5IYVV( zA_758n8Xr@kY8^znaY(!nLbSdB$9fblPP%<#?cYG~fpd zTgbgw4FS{Mr*>?hc=BrL`0>W4-|NP_S4gGIMGXzf{*CblF^CU1dVgar1HK8|mOnAs z<8tT6TR8RhD&|~RSjseNzK=^@8pi8)M6eTzF^Bq@eL)H407?ns9WMVkzm3(8^p(j2 zjlenV-BVsIFdH59{R%pbDF_^kCSWY!XrKi+4Cq8FCDsD<=F*eZ10Z>sQdEQ8A42+STLjBVP|a(wirMH_*o~9|r&v z(NC!_0r_?LW5lt@Tx4jyDjE_g3lNWmRVH~hO z`ux1@Eemj{_j~5ct`s;3c(zx&B>FrWEV?e>CHfwVkzU`6 zorC{rOdJ#Zd^OamDTk*q8wQKHoV0ap=W<(hlBh&N4=}T;2an7tP@m{h2faU!WWfbH*)Q1w=mBv?MPp=2M(kWE zi8r`cC=#)lvt{iXqiypBqembT%EfhTjCh=`fPu12gk=PkBQ%AuH{Z4yuage|ACpbr zQ52FM-gJe_x=mY&-uq(R^s^8C^5=ha@mQxKJ)_~twO?*tx1Ql{F_#aIKyZPCNA|e+ zgiJ=YkY8R@?3xm2R>xB}seA)vrBiYYtIt5%c2jIqE<+rbQrFey!R#ZnfX=$?6r?9aZE)1$oKhhV(wURh? z8>BMjP7(|gJP#Q>Rfw`Pgpt>7)6|4aI;q=kn1HFHy!{q37{;(P2}H)M*N|Fql3`x&%pp@ReO?Kw0N)Kx-J_wZ1{M0clYB3Ge*ySh*_u1+L!x!SFrSf zm)XATFo25TOgZo<|Fg%Q71-4a!hMc(N^#%Sv70t7wZGAO-iTUr-hIET{?n9+??y@6 z`;T)jZo8?Wfj<2n#2`K_DE1oRb~MTG)%=NeQgQ!h+gS5hoKO6!lJZeGIpwH%K1R)} z+M^w>{8x-ezS&8~)}k`y2yhzOPi9Z?c{IWCG@5L<2|f6Bym_F>o(Q^hX{I;tVsr{s zEAR*~3{7tQ9{26I?jQ%#h%WKPn-nuuU)jZFk361Zf%e4T`2W}Dbmqh>oAOJ~3K~w-9M=MTl z^R~OOpLTp39XtLs`pN7HawTuS15N@K0*9jsku%W8_cY*KuYL7sWzu#uIi|dMzeJaC z8Nju`JTwt=C-4ogjQ|sX1@u+J7~Xy?a_8b&3P~9W{6F-ypIIjJ7TyFN_1atO{TxV+ z4EjHBooCSJzyMBUFoGR`kYAbyALJjHiPV1)9(XwZK{lePW8{9HWZnfM-tUI&7ItzI zEqz~d`Tc$w4u^;C>)oZ(X%J4KI!7t3MDYiZV@G35A5X|M2s#cbk;1hd63HY^Dvg7} zX9%K}Nkl1(WC|l3#@Eq}(G&612ewx_;i+PjHA~WFKCBfm%mwtUW z%@Q)+Jg=zAFfFEh>V)fTGw^`FyhK_RvP=a0l`<@AT%R**%i9fKc;?>!1f(H@IBwQP zc8{@Juatp6>Op;`jB9VvyZj>qWrH#iKrEf&)fe9!Iec23HTk^#?xhp=(Eg(xH$5^h-rj`>1erK` z3~n@rjC3O{KSD@Uveo65+EDQlbjfJwgxQU9Zf^G{Nu78rupfP)>@t za&Sx&3?GJRqD+ZlD5NP7mNo#ELLyBA;WxF9jL#sKS)|Dd2Sp04vMCyU-!&8g2V?O#=&L-!dliAh@z*$~Dn$XIjRlwP3uNKf` z-+pLmWf)D)%tx2ZeGW|)-Qz7Q+4HadG`b}01^Pc1nUb|vdM$Gpnh?7UP521366Q0& zZ_p&xrCuM}y!j8Kua_(Lu$_Y#0A74GNmsYaNhkEJ;#h?VzJ(ecqmYK2mywL19aOdS~jg?-R4zvyAC~W8e6&9 zkmyz^NeRL5yn&Dj1dvo27UQrOqYTQGLb#4s7L_AU5<*}o?LVVX*lr5Pdr@vE2#g&I z=_DOHc2eTzdDP^$8&|6>+`cb1Tp&22mg=c9TI1E-(>AT$_@fbJV=pNWSG>NXbIZSo zx_5_4e3uE+_>FW$Ksk=cnyjk)!R&hk>6Jj``K9a?GD-kx^(Bjxiz@}Cp&Y(RPSdOm8WLND=+F( z$|eebFV@%IsszJ_5eN}7{W!@MZ`*>UJ>4u$#Q10+#3<9EOE`3;Q|xSSBG@o06c`cs zv|HlXrcZXruxOR3G$~vh*Cwo7T*JgkJEWscxrC)`+l;LGLz6BJD(yhH*L_$>O@L(l zjnZjdK2s9Vd`&7%%#Khm6lvEbjlx0U0FF|)dE|sdVC1Pvd_odL5Re8VtpKJF>`caq zI5uTShPXv(8GX#1jAxVQ;iGKb2WgQu4C2DYRf@EPl$0pfCFPMcX({M(ZH_;3E#{SJW?fUXkMVqMnV-WZRFZNO&#i4Ek{p;{)r{e#)Rp^LxTbaB zRbazs1u3ulI-T|R0`}Io?XUdvhWP&H{5Ujbx9jGir$e!6Y2S914-t%=+2643og#l!4$@Bwv z_#>LAc@j#d;^=5{q|EDRLMGGx zwP-TwRj-Zzhb99br+=l+yNM|9Z|`>nyy>+Ma_8Xmyybh?vukS*dw`Z!hx5MJ#*Vck zC=C~WiT~iIoeZlrIP0_$#*Z~I-@WIQ4==)%GZ}mEu~@mm)UBVHg=q-R`oo(AiyBg} z=E|eF;@|5?*)A6!Ir;-j${cgdF#3l*YVU-Pi2>>tgPhcKmR%V z?YAFoZEaLlRdLBBm#}#|9oirMQ5LNJ5!S_5B>UYbEY3Ld({3%&$vJVxUMB_B}JcMuBQ@t*J80n z&QMpmo|$0gm=h(h4or2%q(o+txFUP+rr7`okE=y+?dbP4!VPdgI0xTFHmZgm5fjjRxSZ6MB|8RlxvgN-b6zp#c0FAMbc9h zL<&J`+D3Flsa8t&&ooem0aDPa5`;}Z;b0gy8P)wtq);h^2pV3xm4}p#auqGg=GAx< zvm!+0jNt?-0+=NMglVv)sarL7#TZ>vDk@8YIB5qvWz!i=(b3w$j*X2BHG_;8Qb#}v zgz4X7Qs&Z2FXfY;{3I{E^b$2SHT?9aKjlkb`V#Bc?>ozn&mT65FB~zNx3+atRbnx9 zSeP3ZZsz|U(vPU~$5rse*AHgV`ZlUceB5}(3=aRrOYH34wQ>CLiU2QMb|_UP7S<(? zV(-a)Y3{i*h%{eD+m>tNaT?xuD*en!UvxiPF?8TW#Ewl4cVAv8z}~vr;e-qPeDRmz zfwyH3@XC@TXI$8d>%sxEeE9u>SC=H2HN)cZ`-dVW{NrCSetKOOQzu(Qql#?}HlI5; z%+1$TA_QFW?RL&PvxIMcS&P^=Z?!q?yjFHLIn15yV_Sp6=B+k=xT%UWPJJ(2mj*G2 z4;OYdlyTAOkEQ4mpgu0Y%7snOC)xCT?gr;ClNnz*(lLdd9PrKTRdiWV|K13@#}KdG z73F36l1L;KwhbjA!HU&s!X<)nWBx}Oo6?cLVAd(M`IGK^xt>S9I*-bbMMo_6 zko}QqHB^Qy{_%Pv-3gm}UTt{Kn>$b>lS#h+{qJW9mNU*cgUc_!oY!7^jqdJl0Is|4 zI(m9~IQH0MNhXt&mKHDT7nu-fZ-9pD(j#GqlV-&HiJW`&=kS%}NG+ulogI;JE8~f8 zMRAgo_Z#2+v2#9BX<3CTt=6@T{N;Ohu(CD6p=pUU^!yZp$mlw1KYD0-<0H>mI~$tt z0TuJ-P%&Y&+j`&qvN;yT*xG^!2Z;p(IF7^t+N7dOC`>HsY=^Mp^ltJ?gOQxk)g{B4Cx=FMqhE~^(I2^!9rcL3xMFMX3p<1SopN_ZvjGAR% zq%DD`Vt_2+lTo~QkV=u<+04riE;w@0^5w*$QGAAR=G++@7`D9=zaglxGv>`cPlcqA z!XzXNEs2m$UlmS%p9YM)1D;LjQhA(=_e*|)kdUlOMp=}KbF@Fmcz;Njwg?wfL48vb z>zlXJQ5q&_T2zNii4Lu%JQ86NU>Ux`{eph2B4pMOctGvVN7i4*D;bI>QOe;hnPvqk z_M19^DW8~4?aWb>)mG5d5#_HBF0z*{-x4|c@EPW3&p9p>4Em*$N)v5pqkHXk+Lo-N z_2rE?u_TRlijmSHiXtWzrf{hW1TcI73||Ng11XJc`!eLB>nWX-$WUdyl}lcXwG>Dx z@tFoCrbS4)ScZYGD$MAKli9p_6)lcUNJ_@ILYJvIhAvqWy{Jr){hxO_6+6>5V-A?X z!QcBhM!89BW4p8TC-=#Y?Hyw5!3Qwmt4CuF^SjA6cWzs8?fqj?Jqh8L5@G5juC{cN zXhjJVKL1JES-MrOS@fD5WBPS5SH`!h*QrURQ*1SC#!Vm3LEk-|^4eke10}54yq&W? zcYS(CQ)kS!9kaAF=$o_u1nZvPeS>gG0M~Iy#bb2UH?jJrr`fV*J>$xTVD?et?fN<| zEiL7|^UmXvOD^G!H{Jl?nrp7%yz|cECqMbgF4x^tEZNe<$8Ofb`oktvvFJO8@}HH> zELz{rb*D|^k1uZHvIkZnh2Y6=%;!5NPT<@3uiE7{Z##Py_buMerN@lj^9EIov#1(( z9&KB00iqk0roZ*qYhy=T^6T)#fo@{*9Ft$aP?7z+rNQN*ne7~RZr`w#eS!Mz4j=z? z3*Y%#8Q=d#Sym{QNGg8*tL}njr%$z5yiixEFJG1BpksD&;&A~!abls8&bHy?vs#!i z&g7*hY6%7PMf%5kBAjz^D-*{LWA^^L4}%%RApVyykkQKTf#=aGj*skSS(4p*9KjbS zS2FWXpUl>w2l+o{?+sWtqDzx9klx=9(OOf{hfnB>|E^i?lcZ9Lu5OpD^$sT-8{i*z*1V5Bc^?q2Iflu{&F>ur`|R2_ zS|Uk4J*SS}FWQ!!e%}0%JhXHt-3goHrw!qxSws28KUMC>k(W5x_lKKW!aQQAE{#e?;f z(B%@s=L19Hrqaai81|?tPW#%a1%wR1rj6S<>CCHW?TF&KDscZpuZUZI|7i5JC$B3D zmIP$x&3(<3;T(0*i9GSE2WeG;p{@cUv4xhP~PLVrYJ7yTXTL+=Q_h!vd?; z2AFC2!;A=*tJbaU!n6#w8V({9M3j}NxSe(?Txs+mh27anX*{97#D&nrj7NORT){{POzNa8^9leh5j)~#VDRB@4T}8Q6G)H>W{*%Wh6Y+Rd zNhi?R+8T1ZBVtt6cv(dB%4YuI`*Y~&M^Zg(D9J>eWiKz|nPn>w!oVz+Vl2(# zJ~-Lf^}J?hyi~I5N^tTgD3o&8Y&fiu4#$7$80LQN7=jgHgb@7ekyrW7kME+RBVsD3 zSor+gsT*(mck(~?|0FPO>@ZO_ei&urhcV)#vx)6!XW6Y!v18G4B94P74I;{`K|x1P z41XemR5t1I5Tz5wVi+dr=2lALY5bNCpJ}0dCdqIBDJ7*b8|k`GVj-1*08;5RXJqj6$63fr@{STyl=MLn~7Bqt;p|{y^KS(J>kCVokH;!0GjI}RqR#Rt9 zcx1-s{@;O1Zn<}K_>2Q+Zf(bkT5VI0teUa>@0E>RZ*40dYU%{3cshwayqW{QerkK! z0d<#kw#6?9n7*Tmo*xgc-=e{GsM~)M(=R)TiZR-bE1633na}@<`t5BN-t$yXPn?%u zTcf`A-9LysZoL#~7zDzl_@{;`{Xs2H{OE2}eG?P?C4Kg@D;S0*t=ik$v(q{{I{GEY z_Z42+*iL&a#gy7G>zkq+HMyEg{-ViyS1Imzsh(e)K5dtz%-QosAO-w=N#ov;G5~YW zokmCf&uHE7EueGtYxX~PY;rEE8*l8@3&m&tl3?6SlZgksJ1>}i`^O$ek2Ltv7-%Etx5MGWgdAV&iYL@|9Nm|mXHCs==?B$eK5wae$&H!f2iKK z9T~(RKI9naCp?pwa~9h0cE&!~w~a0nx}1Gis3LZu;jg*4coLVm_5zD$gWz`OYEiondi4?n3*m+=4dcO#*YhdH({o0iQsd z)YhO)finoBO>!5Yl^rwDgjF-T3~3emJp2${dNdPlr2G3K?f5g=e$MyR65A^Z9 z9PP347j(JL3EtlW!FSNdZ5=w{sNCxp z!t|y7aHrSCo6!VV3hiB_(DCYnco*>bbHiMJb2sZY*i4>iq7>ZumndJnuzv~fqF0i< z_;@XIXZvVsc9=A02d^wia>!hNzw7+hp?u_(OgXlXX}GHtcfZoW1&55vk}_ohlT!~I z#wUNf1c177KL?G?J%}AKsfztZmh$z#uVlw#Np3%97T29Njf?O7V5FZPa>yY>A`v!k z-VDH`Nt0-3XyB}~&f>V^jw2e4vS7gi9(?dYZJJpCJ+M)>gES3X%VcXh%~7A2N6nZ* z&uXOf@(= zqwTTPuar!xnG`hS$*qf4eWB~sWmG#}oOWKaiU8v6ooxNr6GOVT)dLE@G?0!WC=BB3 zwy^2hHzyH|W4lsV4qD5zM?w#i!q{oNa-?2_4CG2;c17|On^!biI(v?=4E3+ta>_A{rU$y-+zMv`YeYP>R{ zObmEmQ<(ny*Kfa7jugo%o*Ye56_7-*F_mOtGS0!i05eQK#N*(mafC%uDQpz`&)q*V ze7`X_%Ydi}IwcoYzFp_DQz`sruW|wDm8bQN_V)X7)9k!?ebRU`9z@>Xo<~kXz(!>= ztge=WPCtTBr5=d4ws-U0pWID*MC%B1SNGzT2>-y|@H^i1U{?fL{lwe+`+>($C!f?kbN1{_k=oMHvMxk&Ln}gx>gK4wP8de4 z)k&9!Tpyuil9*IXJm*NlbB4cJIpN$pxBc-qGly3WJId{D2NBmvZOWf_oq$D*^|ODyJ&s zV_j2(k(F9ivZ*E4=S{6K>dO6?QeeA%KdVDa{ap3QDIE37R~TK@*UN6e2oDw1OgNv` z4Lv|?%W}K>uAjtOesFJT?QYlY1?9rie@=4BR|c+5<5 zT!1Da_KZT;gYJ9K1N?2fS$0p6Li?or(A$0(ooJMatF?jqDNIIsi$Yb+YiPyCH_^(H zw}2zaDM{X-ZyC-KG+Ff-@9($0<=>!x#ZHUYmj3V>xmfE?Gzs%#v|=ZKCdxAL!$0!+ z_%xbW`3dj^GmZa3W(RERXO>1mR#I;7#$Bj99<%Hh1Va@N}e0g$EyKN%AB3IotMceayrrE zVP<~s^d-qPpFo#OwW5iud@LhZD%F8L2R}j^DElZp2ZMMQFnOZM5r_D>^S%hz zTwcM;i<4~LYIEM1{oi&Do9}1tZ2iz&JJew2G>f(C?RSlodG5u;wP+Ifg8^UA$E;IA z{goTs^>RHw{MbaM)P`Bx6yeOd!)fVB@ywe3ZL)s-)MlPutv^P;d~y@lo;G#gw>uRd z3$*v19F0c9)z!t{sMXcg@xAYTj~j2iF>B;Ibm&mVj2S~+T^*NQb{TbbbzFJnm84QB z7Az?Ih~N44s=%Ke$NP|rY^lTb*ZmD~{XhEbudBP5SunoEOE*>Z_O~#77M5k|!LktO zJR3+SlO&??mfA^miAAq04NNvmpwetkZ;5ugj>FThziORv+~}k0N=7%o`SjwkuAAmS zcvGgr>l=i4sU#Jvn10HBe+`KEy7h0aoLmu4VJIh8s$=+(N?<6(<~NtJ1Dlv3uuTWY z@Mr@k22VdNdXfoh{2?I)d9QGbkPX?$?u`7yD-VLg^rx&UB_EkYq<+d@pzr>`^EWZ_ z$ePT+Q|R_cFR4i7&4ZlLYlg7NL=h`Rmo(@|r`hrJs^f=@s_3abdeXLvP}$@0f3Nw+ z_CVlgQjtr6%10(KtJv|85_~?0?b@eew-7qL2q7Su^i)ULod9rGv3v5`l@b&3_1f{~%M2u-5OilQxM3FW-j(4FtJQ(Zd$+$Oo z>JXmMZRY&SLQ)0+hJmdV9m*zPC;870ZbNuiR!eI)on3texk@1#o4VP&w1M)W!!dmx z;UNUpkT6NVK~Jbel}{Yj+_Jc(cE_fA_CNE0WX+n{k&TTF)x+i;v~t7Rb-@Z*HDTP$ zF~5wj9eZ~7vem;!SUwt(3H-6{t^O(U{Po+z4@TNLYy2x(2yUvU)&)!plr9r;BqW5Q zD;3RNvaVy(+0{m=vaqB?1biTM(V!e)%9a9TxsUP3PUcu&jA;kYENfr901b&KRgOz27$UL09Z}nKRMRtmJS@FURf0mfP9EWyUoHhb z>BRqM@4Vyes_M1>UAvq%XL?KTg(QT85&{GwO`4z}Rg@wsTomw%3Rgt2qgPN-1bwl< zMMMFm7m?lxfh3ULCsQ&d)919^*89iWr_G$1Od2T8^ZA@)&OUpuy>>fiuV+8M=OIvB zM9s|FJR+s8zKz%*=V;1u`0*`6JzL5zVX5>gnLGq31JKsiMoCEtixw@Syu6&&)>e|q zK?6QA@I3Fc1136yUt32^EobR?9Der9X6ic=dq&CtEW8A@DG2}oAOJ~3K~%VsrWN0&rx}1%uUM>IVzb|& zyB0^i@)etoW{;!K9X=^zCFLSictsv;r!Z;U+vibLnf(Q@EXk~e+cWR~d`A@v4^h|U zx(yB=J);%Jfwz}ioc)OipEzZpKTL10M|D+UL3&k%M)$5)Rg7Q+AA0PL7EYoD%g>+& zriY@4kp28u?%lJ8Qju&#ksB|tXPz;`K?lm8q!3aJOywy=Ks@EY3Zak@FDMnuuX5hE z7Fbs`24irXAiM+^~xg*Bw@bL@BN+q-ZwD#F&M!+yy#Gu*r*JDA$hXHg#6wHwP}LDORtAgXm;Kc0cUSJc$haQp4I z^T;EQ@bJSAXQub|_M&MTKmF-X>FMcV%a$!X^w2|`bka!!NSVoHCGPmRWfZ5&It(2V zi6CZI60WIGhMQ?f$^8$#N<1+z>8ZFVsQ2d_>_m!0GDS!Tgitr9Is(zwNpF2@|AS9H zX#HEyE<2zvS_&aL4Upb0`CQ??>l3aABed{V~H*d`s`OvQ<6TGq%d zmz(PU-cf{wgG6-o(zq&_AqFhV!7H>rAAOxkWIsaBbv@g zWx~Qy54jO}q+U^m849dV#Z%R#i%O@4CzmXn@La{wD6K5`#u2Q^>oiPp1lhkkA#P-Ku zL4W;SbNWT6-cu4Ti#B$)Fe*)q=Bmj2)3z>1;T7KP}r1}YSa!U691 z@wwDYn1Yt$n!obNWi&nTDzihy1ab(Td&5R1zO)dgPoK^;*IdK7=blSlT^#^l`N~)L z*0;XJWtUwxuPE+?8hjd3Tb99}7@iKHReoib}-2I~oT*FpPx70#w3i9%`y| z8XB|TVWufECEp8=Zzhq0JBe5_BD=Ofr}_zVI-zx=QDtgQV;>G`ZAPkECUe zU>FT;lDZTvls4cwmV+g#?5EV<}XW|IBatHfHbE5*ju4EL&6BO0R!&XL!r?9 z^dn^|D=WF}w%d65<(Ikj)?4%DZ*FeJb=|!9)vm5CqS1jRZ%0oYm-=XPw=vl>5I_pa zX5FP(3v=par&2k2UWMU**_i+6If`TyqZc`Jg)YIriSh3%sz2O>E_qo zJ+iMm5gk2i`l^bKs!}r)dQc0RL0x*LkvYcFZ?90Pk@U-Y(gcVmW_Cp5EUBL(b1hoO21zei#2w!mlQ%j*>qgA zA&C@C5kpeu`^iW-umosO6e@Yjfs{zwQEDHNJ81E^v#%Q$_*_vxUk;%ogqE>;kq9D{ zW2r7LqslND+tNw0u7PME;Ljkz-kE)$N=r(UlJ{1QW4wlcoJBTr+D&D*M>D}N>DFMm zo1lAo4Hy6P^F*taPsPT~+d1)*-=VW>pjswiYGUevRlZ?w7V*|@+=PYc;qxcvrF~iQQ(83VQk$H2shk%ffP9ilU_lPrvZv z@2r0G?MbPG$027OO6!ufbT8SUNSS^|M+1Z=kpA@?(ewf-Ps2k1!Dw`>ciPy#DaFeB z9zpcROie;bB!bZ+Pc*E+!xhDo5K_Zxi&Iro%eWKg|JL)0$2V=+ddg@t-1c6QE9xie zMIBg<4Mw1_H4zZ?;Pu`P#y!29`4=98<|~!vA269IlWOVhOJe67|Ds5MPn|Z8Ll2on z`IzyUZIx2e{`d;Y!V%_&@|6&!CPR`k6DLljx3@P#$N;?e-g}&U^2s~hXQpXxOe7L- z=S|d%K|K%KV|GTxnTxviIF{paz_?;w+oZBN4j5a)#sA033KuHO=o`%=Xo%12k@Ozq|Bl`?rUjU=GV%C)O=_?GcOX{=92m zJVsEoqLli1h=jDV0<&|>Q9*9KqYulH1Ofsf;Nba+eD8nimlO+*KYHh?onse=_}>3^ zvtp&iy#2F8zURS%kHtCeBm2g*cmyN(cg9Fq{0K%cf`4g*f`W6;P{d4CrOq)&jr^Do zf-n_RE}?SrPV2NDTHZ`Jp!3^L&*h~J9hs+#{|+cGFXy(~Ze!`vrTpw?KO6A*(xppD zrBWUUYBUrU+Re{#T05293L27LSkNx~X+Sb>D#p4&k`eu(1=LFzsvV){FE5?^ z5+l#bG04s7gJ=6M4us|pDa)3W{+tg1cuS?nEJ=alY||QDxnkG-bu%{woH@Lri|v)lNJyy%I|+P z65!ic9#3h_s63U1XM5DWx(+XyVn)g_sz;Yqj{W$=NXe+^+-HCL)J>~jeuuK&1h`^i zPhDsCio4&TYf1M3c9Ag#$D!iT{i)b*27O)Kytib|`qME-?Qd0-N2#hTp`tv>#b+PR_1Auy^3nYWnbq|)zqXn&hWa@XMi8M7 zPa(N}{rXJl5`bYCoN&SktX;cyxA*0)qC4U6(DG)!`q8Nf0nwnrG08n?S#^W~DAv@n7Z{O936G%I!lBN)NI6E3|t%93|1ECVhQ<+;r1T{P2fAWZAN1j2blxAq3z2<~Ij6CQyS;&YQ`s!{!hjQ-!W;+<3|9v~>1R-`vi$@iml$gVyV}JpFKM z${uf9$rINvTTN$6JL9F!7%fPJl_oeOI5rW(Ky=5%`iGvHTl&_D*|B6?^fa|-(OuW4DwAF?)-Kg7Mwx4Ixv9_+X6pbojq9cgDxSDuf7eQB2;`yZvdNAvs;z?qT zgK%xe?LWG4zmH6LuC=lKgs#>uT6T0&zpb;+y}c#m*fypvs<7;kZ(W@2>rSEhWle+3 z>kTaPLIgk-m_A^>w9+QGe9TvAq`hXm6kudcc;#S3lIPE>Ow)`+isf&-6OY>7TRmOz z%9QK;y7%>!CBfc4OcC(OhW?|b^eCN-*{e!p>W`dqtDS9MUTBf@iLflOmfP0d@jfgm z`CO5&_7b{ZDwg*6k!gEkl93Q~o=c*qk223=d@z6x8mM?Qi#=H7}{@`pR|njb|9uB}};TSe#7`T|fC93r||eQC~Q&J+&oyo9?=;POo)y z(IC$xwaoS_Qff~g0i?G(P`@1!E~VHA;b=SzQBjrmY7(svR zg-1Li7{Lfe0G~Ol=)$}2sJ!cg?#KI$uYIfQs+(`^`Jl^}D%k(D*Er(RVb`ly76q78 z6=r2)Z=M-qWl?~tXn=Jss{H4GaV2co5vMn)2BFcQ!IbI6)lY5j?~$qf zCr_R{`Tokv%Cpk%OG`@&mLhd@bdX47J>09StC=@%9$j5stXQ!E+s+?M*tX5#LD6?Y zb5C@V9z;uJKTirtv+!6alXQ44Hj;p0V1$BrhKZ+XxKfe=q-BBYqT3d_D+wZ~)^x^W zGRAR3HK5lIQffhjk|E+l@k_x>9IHO`Od7(FRi=A>P$|VdGP*^g@Q)O6aRPr zHz(N68*`7EH@oi9H%lgF2qd2z$n<+JK}(zH?xao4%#sssDks$mUqM4oI?^B|LBfx& zmR`oF*8y4#on}*GT~UyZXo#||9xD2h%+W%OcLka|RGEVBsUyh{JxbN1fs@SmJbhDO zWnmI#$F_}*ZQD-Awr#Ux+qP}n9p2cs?PN1EyZd_HPt{)^2X;7DA4?_iY13p&phJj~ zA4*H5|I#e_cA&xuoH%#DlegNLWnt}n-C+kk%;y5e)x^TMbO3aCTdw=cQ(4oyk;e+n z+Z0tjn3t7W^(`)n^@bpa4x(Y<_K2r#pI!Ej>`MOmxA%Bc8))Z8a}|tH?1Me;)ro~g z$egiE#n$Z0=5}Qn8`KYTS z_%&?T+2w{nDay1WurN?znH)a2ZeB?vX*@xBMO4_ieNJ~2F-Fr}q8cn{&1|ifU~D}t zViAS3@?0*Y)!D(3(J#r>A%!FYj>b*taI#YRp6?j;lyE4_G|#WT*~A1f?(wW^?eNSK z!&myR0q1svTpg*T*ce3fzYK(NuD0;QJBPNqJYY4EVH9f;WQr54oVcJmh5w}Lry5tT zR)<)^(cuVziGoUg%fL+`Ldpu8W9KBPw+K_&&NUY%`je-dp)<0hlB)Y7wNd`642>5+ zgAV?AOOCeK{IJV6UHPQMImh)5`y)y}>ad*2cm0uDJNt)Jj4S70FhWq7GDss%{PoV~ z*(fi!`qxGLt&e@P6B`dy{b{75`E9SZgF;jLYlQx)po2A(PP^5njo0h1+~{i77_Yb8 zGc(f}TJr2euDAMueaN85G!9B;1MWS^G*oWBJ7 z{DPDyz|IY)lGo%?pO05n{$Bst#gMK9&5d>kJNItm0(HEmbND!AnkW3-{I7si$0t6b zMwpYUtCG%6uhRSG=H}Z;=9vp;KL1H0K>{L5OnMhf$oU!%XA5L;DGB$sq8lbwcw|{B z5WQ$ZAq>!Z z+=O-Cbm^L&jl?fPf}k3t@^ZR{B{#ip?{l@9Y6^qHBI($3z)cHzE7?p%=W#Gdz~yGz zAt_o0b!1dmeXg=d*h1sM;8vf#j|mS>&?NRtNviay)^Rg4YJcMOH}W#5Pez{M9>r_; zFia~%0ouCk%x3LrdTOL0PK!QF|7^1#fIfJFh&hN*zK6YRrgpN2r*;+=3_lU-O7bBg zDM6ab5^;bYX9BPC{W}y9HJ{OH>13Hz<#FaZ(!9R{D^XvB}PlIeC!#EmClS{+H^GyA!^lY}oo`fVll>^b4he)xA zFd_;z{+|meOPyE;^B~cOFNAKbu)0hc z#lJ(33C}n~_T;K3&Je&G0O9QVc|45EH4Rb2Q6;u4U-)&25a7P$ zb+Vyq&vW6Ca|ORH;qqdygAxA)MYDsG4}!!(oTJ}$ZeRfn6CNA^hJGT!1B#!62wK#K zis*ddOCDsGMGdzNGaRdiKGG)`3%c8O0uY^f84CO8?~tKJ{^@WAfR!6Sf-uJ$&*S-3 zI>LRLYoLzI4;P>YwArAXM4}}Bp#_Vd0ALYY7(K;$KjChRn~)zhy+Z>Oj8kk)RTw)> z&@b2_NL=8^QH{T;rKcG z6=(#&{S?prxE|9WOsRfbI*=9~abNSA z$ITRg^lQN;miOhgcET^&{Nx!95ASx0z!}5b^I9Tf>)pSzew2b^@9OmQ_4?}S>iYUJ zIlFboU$~O?og7)urO;~Usk2mCoCzlSSHLfdr#Yv^F@+P~yO>dd?GIln(5XLxw@noS zMJlwP;aK$2d?$i;;8Vg#Os4=0P%egv`TC%tWpuj{;Ng0(l}83CVT*%06)%!f~Ib?+SclrCaxW+tt1i-eTsD?+~&wZs;`jJAC* zdrE7zZd?a73dv)<9)kYKy&2q=Wvo|UZDpCfHPEgqQmPTBw+!ri6qm(-5e4^ z#z5{hkIYK~Eg~T#qG1gXA}4fu^15oK#Jh2h`#T_&D-?$hNCx56C<0X~PJwEuUv&f75-7I=^jMKbLQlK2hes8jzSc z@8IeKGu-^cJNiWc79c=Mx%+kxln_?1M`>!v+0#NcGpHuh7^ol4ZwQKY{;J zXQ$lvoChQgsOl+oYWTmncd?M8JiZS+t&8TDb z_4>g0%ni+R^BWtTaO!OATHnV(j@7#AjmznwZ)e|7n08P|oT-e#a&*Jz$J4&9!X1#Z zK`{VB@(7tAC4{@bHjr=Wtf*|)oR@fXoEPKACW&PQ)!>{RyC6!`+UJJO5AzUy=kvSLV z0f{PNapJ8Fo@M()0{Pr8@KG+9O$jgq=bf(FBq+u^0)(Z)lVaq(53k7$K<9vwHr&lj z*XDhEs&uV#d90SIvdy%wfx#b>(w$#)aGj?=ex{pGK+AfFN%bim5+qUiH?n$q9+fc6_Cepm`v9EPp>e&}| z1NH;q+wd&b4+s~?yQ1#_=Wj2FmkK948~4!A}Di4K_J>6`xfnDw*8R$#mt^u}q2LsVxQjUj9(CO+E);t@Azd#mbGT>hWufE~}DfJvB zaHhV?@uPml_f&|Q`<5r!ePr6I!5pM@NcnBhQltdLQ4^*JxYJ?XuMq7ff+)i4tdey1 zOEUpJaU5AYZw07$cT(k4$Ky-&k=4gqxRN{a)vIO=V0%pS8Rn+3(}&FBgIE9 zINTWMn|#-Q#$O{*3#FO~vw6AH6VIC$u~_S|gGCeSZ#z8Bdti5DVRwTzJ7ogL zx$5dlUp!W_a%(;Q z|Fi%Ng%}BxUCPj{wFtGX7^j?V;Rw^hu>JxH5fv5$)&wDefzw(7cITqbHl3A?Imzp) z-14#6=$zcRKHt;7sTm(!6clNmGX7ro;ttWpQvkQ&J?eXL-q0p#K6~}C3Xn(SVf_t= z!R|!oN*~P&tG0RqbnwMu_XggXY=&Ta@xw#`e}(VShjdA78ZIDWar3#P2JzSPAti35`ZDfz=MNG^Pje~LSPeKFqPOUb<;puYZe z@#Z8)8vT6o>r-8TLJ^NA$rX)f3%((an+CG}MJJxUg0$26^`?8n?}y)pB06z_;0>ix zvT)(I6+|31ee>?A`nTtY_WRF469N^k4ALefK_1&idG{~Odw?WSQQ3b|0zvcnK_k<- z;Vh%yj954Yl{k$jH%lUw-o1stFC{H7MHsGy$_?|=z#dJeqgS}vY0LydP}3(7YoYWX zYtv*sLs5~F6HK^U=ZJ?*H%Ca!)@<;4JO|<2sw{)sdQd)cjq|qK@O=X*OHMK=&5w2D zEfxFlqA?p$j*_ySc}qOF#KCk$Edt@F^mqTmPqi)!Zdbw8xK_;elj3<7n$|Yu*2|Mr zp_7phNnAs?B~qPEQKGFIP{~K)0AvJd5HDW21)oRaRZ0vvrW~}6R6vFpCWCe^L!*rgE^IIE zAIRdbTb>|;7w#h+U0a z13R;yE*c0t=UM+#T3Xs4qG^k|F`K(3?Nh9rq^G8BFylxUn=8@dK8g~?;Vuh1A?Dw2 zYE34}fMA9anjwXGDhfE9A)3@uwbr?%PMB@cX68X>W)l?K0Wce^fK%zq-0Nh!GJFs9e}=9Ms!KN}5FM zR{{w0ec~ioA%9w@jdKK5@QdVc*!@ZS5d2&Ji1a}w@t^&%Y^MIZUFW8}ZbHFy-oEhs!&Z(gVk7#@Ga>o1@K-$?%4 z`)4lH!m!>iXw-721b*5uCfN#s@kT>|8c+vfVLjCU!gUM*1_G8DlOGT8CJPw~VyGEr zH&V?n;p2F!f_66p47?$(x5klK2{JU*xx$R>8q9j#Gqn6^v^ne z&yzV@FO$kYq$O};RZ@BKVwCME35j!(LjyL23m4^{ds|2!B3W`zEDWT5l{F~m3uw-m z+L-YHiSJ}5;!cqS3a2Dd88hn{Po^qvLP(53#z{$dO(lgXQB#&9HiE^f2wo~w3JIap z^s=)FfnxeXMnnk!5fl`pOO_5b8!cbgUb@gEs z^YmCIo8OoBRqyv#x70+I--&vU{Q_u;&3S&onDIB`@W$-~TTPpq#yTEzV?to~cY!;rkLiI(^-O9{V@BVo(=T(&)?68b^Q{qbGB9_?;&G#=P7eVFicuK4p) zrN#C`Z#^dMznsQguEYB+zvM+&y==hh-fefIXV{|z+03HklO&fG58v1D&CNTbjP}Y`8*Zgo(1-;QMgN3D? z1D@xx)zWlo<#^y5L?Ib6^Dpx_GSjckGO7^LGKgcRKgqD);}nItzji8f>34_O6KQ8qJVQ+6~$kQuyD%>|+G=)^x)yzxo3F+-96G!-t$P5pv9@6sZ8(byX} z|F*>ES&4}9*Iy{|i-s;mz@bDT%tid`eLu$8CtMczVv`5ahTy^k7cv8)C&*Y4{lz33 z2W8O)tU~3&B_%o!O9Kvw`P+`s`0Wn$M=Bk)u4(&C_r6s8&jDbaGq*eXt`F;fZ>kF- zM;jGJmpYi&Tuj31kK&*dQecu*k>an}xA&&7zehb-LKHgaEKv{wSSkTpKc%BCa5r?f zchcoW$wpV_@by=`g!n;(R%@LQh`vEi-y9b*Qc1nF!6}}2cRC_aqq&=ocZQ-+ zM0gyV%K&wGFP$=WPOXI|8emX*wJn@vQ!B&V-5l(x1)Yboe-_K{Ovn;r z<`?1Otn_BCZb7RJL}ILtb+TOg16K*UQ)@HL+T90rvFQLYwjwk+R;-Z+eDyGrWvrIK z;|JCdflkEZv{YD-z_ok?RPxuQl-8BOYeEw8oUu_r4!5w;z{we*5{M_-loq z8jyB2mq!PBJy3lGcXq|twna5=Tf zejHW$C`Zq~oa&IK-_-ep(`%z1c5YLMO1<>UZhD_NahvP%#}vlG-d#jWCaD8$Y1uGV zh?z-e3%kXNTZCgzcfD9fb211xNk4HPRQ!wJ ze0@Ru>)+?HTNSz1_7p;g-|m)cT76Php8@X;4o#*~EfkNqEgJp(HUBTIM^x_D^a*x0 zPLK9Lr_~^?i=6b8{Eh`hyr7@nBCqH#Rx-JQDsDQko)bS;+==H$z6JFUo*luYYDoX( zrn&ChYQGgfZTkWZ?Xue^u~dSrbzzIB>$VP!+tET13DB>e2>Vt z#1#jTe}2E%CHm1y4!+jK+x&M~*QpV)()vv%_cV^l0+4*6qL8M09`cBp0L4P-P1s{e zQ$-3CNTgQk@!4vgJ>l0iFJ-U=TSy_fF-kkfJ_6~<$|RxeVHTB^e~=_Q;o?cfL%PF& zJjeXNKEFXK@M!bi3e(Rx9@Hivdy_^WD*=U30V6{0l(5TWgo{(Lacm{$h{+YWWb?vA zaVerob`aHYk1KeWVOzGwb_7gUsp9TARP*uEghNpm&%Fc=d?Y0DBt|S9bjP9*6xagL z5?#gwJ@}$VdSoQ^c0Rg6ig&LWnY&=HaNwkT0Z61CWMZ$kh}wr$LO$ z(FD@N2e;;hmPld}$-wPB@%AJC%HsN)#*&~7UV{8>_bddlfw`i=alLODvmEY=C;6?A z64B+zxr#Gtw;c%xUMCSaE*mnDA+lUPKdfwD&v8r=E3)p&S(T^pr7wx*(;S`*V?Kt5 zl`r_CO>`5Y(F~~gTp3c(O&8BD7jW6h8FwFkzh~W1B=UE^REsp<2C3plrxI|z!W=HL za&yi5B;!ji7Z4%qZ*Y<`?IsjTLaT2p$3j9Nz4bXM-uvXSD5ZH_Q0{w3=#;)h2~*~1 z$kHGsF5ZiMH@qDTTdkSK6do}{%Y>0|Q(!ht6$Q5|JV9TdD zbZ|7agdwKB!mDUUlNBj*g8o?k{SO}rBb*eVf zQ8+W;>K5qCdobTvp7RRwt+QRBmhF|v248xF;>k^F$76b1{vD2Z{&ZsL^R1W@?0-K) zMU0+my>(_ksX&y{WfU(_;d3)UO&P;UHM9#8(Dl*bxz*)cD6G`@k5Swt*XEji)A&v# zurx;{qR3t7u5ZwR&q+>U>y6JrDosE@$EXATM`WU))(cbI)ENr%SNM-FQ}BR3;Dz!} zXhTKW#&Y%>#)yovg(CR&yAmFWtZd+D_Y%j8ey=i3Ybo(I=3#mGrGCd#HtR{b}YKhf5dMfYmKZNVh*7Bae1 znfPG@t|25Hmz}a59;Hb(uZq9n3nKUJ?m;=SiXHMp>=nu`L+&e{t@`!?j-}<06-QP$ zH&tWW?dY<k7vhLKbf0K8Tj2;}N|*{iQ}ivxQun%-*dljqp?PMWM=&u;D_AXf&l1 z94KX{;M{A3)#u|C_a0mkC00oi@uR7?in&mMPIreBBjOxBjEW!xBF$pOuPzH_8%M>K z8_Ze}AIuYUPXSt515x`JdGE0k#YtJWrv&#~XI!`@TsokrydN)G;_{gv{*S@)7?@}% zqXjq>n*uJ3^K|?%%e~to@=cgC%^sgUW~*(M)J{*iJyg5u;R`1Tg%7tQf2XlFEBC9Vt7t{%&OfkeQ%+9co^$*K=}jjYWK0>s<>Iz zaQ`IT>{oy_D<{%akqs}cuJ0!GaxloVJ%k+Ex?IKA)1)9XbzCD+Sj02?sk*QJs^DFk zxwb!%i*sTd3=+0`P`l`DOUMf_>`tNp7mU~t;tmayn>fQ&S0Sg%6ohjqdOozVX=S12 z^4KvB&o@Q{vZvY-#y5d$6V{yHPD)=pd_G^1Ax_lm#MM>P52M(uV=cT>&CBioR3&0AeT*C5H6D2J2V`UNXPIEgR_75T>-$I(>`$Oc)|rU6FqueuWz7`} z!pg!D>I2kyx&xGsmK4!g)7fj1V7}X|)jy|&i?si6-y5ziSqK>3cgDCrKkr{IZ>e<6 zt6v|{(q(|le=?4r$7;IA6qyE0vtLn`m=4@X(d_X$B7rU7r6kwOW1`mfCJ!*^f2e1t z&%?3+)zV8kTJ^~H{=;4veC{Xw)03q`@%Ur<$Qw}kg7n5q9%0d* z6rkjCg<#abw598$w`b-g`A6ggqV4GV)cGUOPPu=%huYH!Jk=52aM$x2ezRKn&L64lRziW1GXM>zKOMZe+P(ar-c zUTF6U>v1h0af1`SEc&7Ie*~}cp>#na5|p4}`oH!l8ziNC@8HWUY^nSRp+UB#(`lg@(c{Al6;4G#yCi78j$J7|Rw*)JvYhn+cd zazx+`muUZEWc<7+$y8pGF9myudSXaWv~)mi(fO)!0By~nXgozR7!;YG4v17g=weIY zEUVDTBxEvTn5vOD9B4wr8g@i9p=@>a4+{M|%~G;XQG&&o3CI;%3vvxM+YqT}h1AMA zD^ScC8yDg*ZtwT58_Y_+hxI*85r)BO2Ny6LRjK~x2pOBLtrQB=YIQu*+mD=VkkdpH zZn%(&xd>L^^vj6zt!mKS(*kDq525egGM_2U#u7?dnvT-?%Sp%?ubf!Y>gO7>Med6KTbh&VqoxosKk11PkSvbNm81UG=q|? z7D9Qbh1sS+_kx>Oa}D^`@7q%YJGJ66W5>rEiS$8u?kIDXiFtX1TA!KwX?%t`ysSxH zLrYHSTJ8w{e8$F>uyx&y327WI4%=QTT=@jYhGTm@fFMdhLY<(v^^N0%KV4ZECyALBH8Vncq8A$D;ktCI-z?m%%aIFPMC<(9m;%DlNz5H|Qb=cHffF^4YK;tmML9DI|*Z4;^F&sk&l>QAP6zNzl=P0tjz7+U0Q{-MhDLV zj&cH}sy4A|#G_MPL-_NPnDj&_&DKKeC(ThM>pE|F?c!*=U-KN8Zt5R!h;~wNChl{5 zq6n&;9*=(xk?PI%f1CbNLR<9^=QSX7I7eNdev|WJ9#|}P^{HL#P5+@(*#LWgfKaJ;^X~C#twN-YFDpb3xHxZRnV%cf}tMs9=Fn z&|)wzMStxaGwCQNvQt!LBw_`jA_Hc}$`}BasACB@fcyQt_vTWtyDsvOC*e77N6J$ARygF-B8qU( ztFT98)Bu=Bsm2}-uz2aa@ryMcs1U-dHI^3k+2t$}W!>qf$Z688#lYtQYLPw3sw3Ao zMRd^`aYD*jpF7fWs0Rrow8BwCb~eH1K8Xu*qs@&q?x=c6FNj{PpQ7I$A?Uf4h0!Ws zkt9Uy5jIb2?E(3|mUcAtyPW^O%gip!U%fG085TC0uv+rve}r7li0 z?h@4wl{Q?@S(>*NHk3+AV5LgGi6c!4?yaR3;&Y+6h?ZYvn4aU7Tm=C zuN^C}Cu!~Iju_?N?MW1Z+*nsreqbsa#lS8Ox%~cgD2ZvFz%i5tqkDDt(PUiO`FXsPDS?%rL&N^mv zQm^r$fyWRW#}APCar$2yQX{cbH3uiZ13&IxNvM}a%4!zMtLMromRIT|UnhPJ`h;BH zUT*;cDQOlySD`e5&#Fu`YFa*DsWkCi8tb}`z|4-<`%gw)--eXElPiRv$ih8VaC(RF z;aXQdn7p*(>-@3wZ$U~^*ASdPL6f!mE2)xn8Lmd@K0qic5lQ{4r6L@Ad4Cc3dK^5U zzMr2l*E5*5X%EXjpN4^${rt=Gb+@BZz|z!`m8S*|*OjkM5IEb|`!O&^ zm-*w06^E84ADtihmvV7HrQ#TlF++8+NDN)f_xd^Uz-gvM0_(m~gyXB{Iy$Br=U_hW zWtzM-jXNyu*(=d|Am-8ephL?MNCV;#2UJ2$ zz$wKuwMbz~S==<)G;Y;%l52{!V?Cj1f<5)lISZRnPE$CFKLXPRp zo}cDkVlm3HcoR=yFlM_g@w76v>Rh7bWb<|n(}0CDASvhYLQ8t+3~eLSugXn832{S$ z?uI|K9l(qLx_l)-F_Fid7qeir06`p`kpbpd5<~^|+jBOSJ3l{<9CyRKvwjzCAHc#~ z+TRcIE8C5N-6?RMbtu)42;Zi+c}E z)Pr>F?{-?reJ?94zb6HozY{xns`)&EI z^&Ib@ObQ+nHlw(FACq z=1A7L$9JU2D%qd(16_SMMU7n2i4$lr*rY|y(C-Z~YrWRah(Sbm^qi{ke!Ru->AF{u z(VKd?{ZT3J74A*S>-O*cwVdB2`_imP*TxlF)r+cPad*{oaZr=jnJjC^Yr^XXFcUr&ms)sznV)$o!1}{0SJ=3^ zzZja7t0Z{{Ny+>lJ?npd+;?D|dE+-ZHEb#yh-I9;X*Cd{Mz^tc%T(A805WZLnxuRR zA5y%W+8q=yZCv+yO3#_-yrWbc06Ihaz&(EUT8_6nr-_RsFblb~iHRJ~D2uND?u~YT z9C&EVp6D}yCP~3A=e2&HTCC~A=XlLhs~ERHTgn)UaW_#Tou$(EcWG3A?f&&XE?|UV z;Wv}o0it@s$3CS!ZfH%6t2Ie?$ut}FG^z|q0-sLd3hbXs(G^>ANOg3yT|&H!P<$uG zNyOoJLRp{gl^Agw27yU`HlV{f=%Bc^3jyIcnW6T|RvaZrJ}vGLE^f)8z#y!?TWuDd z&_7{8;B9mnhyK)vV)4^X|4$2W5)=_>Pm9BCLIfnce4`EF3}=CpSIX^SHSe_)=3)-~d>*U$T>K=QeltG)g8DcW@qBWh|r0$rp) zojOC(x~#OIIrZ7r>#OZfa-WfU=qr=p_4^{*EsI2@{j2v_S!HzG;hqj>r7r<}g|rbg z96Ev+vcO)J(7qOF=wZJ?TS0`8m_krF0TMclWR;Z0KttcaX*$v9*}1C1$=5IIEGH*B z-Q+K+`!!GQjCV=rUb#|f#ktR!N3Pqe(W;G&3Y-B-&{+cGZ%}oiw7CiwXv&ZS8&@15 zMA_r9-j4X6s72SZ#z-GySR|;z4cv9#M{{NT&S$szHTfn#D+7x5a!xKvMZvpx*(Teq z7*}3Zz8giK&m<^4=v9DS_xUT+=BjX415!4Ygvg0Cc=i;Euu{l@Uh8+{JUNRZw+)L> zL6hlbuI)!d*G0tkb@NTSNsEovOV1w6F&-&h&&>-lQ6VeT;k$Igx)%R@hk0?@g$Uw+ zP`hv?u4}N89A|J!3c9Y(BkfB=mn=yGzMn^XI<;KJga&)JjK|7R!fRsNX*%t&Nezbu zG%r>xPVSb_N(wG-bqcv^Yawe?4eWh0f{a0bMog=&zU&&qVVcp24R@CDyc74*D*~^( z@Y^9LxiUU?*0qO6wEk8(5&nlwN;iV*EHwU`O~~gl_qC*Gng>L19f`J|aKd@b6~aU; zAJ1fLjXZ--#^A|FKGf}gZ1~NJ58Px9tMkNCt#9hVnjV?Q-Cyt$d9Trb`n@VIX_np3 zhBV}KxTc)pl=-v_Pgvj6L6a0wxpGK)pVnae;#wExx14WTOM4IF`!@LBMj*%8NXH}G zZ|<&=jG};nq%poL+KX>NnflE9*$_zuYM!c(pR=NA+5q#;dYJgR_sdb|?MD9F%^SIo zQ%ywUHcMPQab`$^ji8HSqKWewkCjPi;(t>G@@u9a1Q9?26l@(7cVdm7BotIAu^xvm zhKo|BpG0H>N<7;QJ|s|%5xqnUs3bU4C@O%-7?%Z&7|(`{0A$_3f&!lbg(S z&?0?aa_Kx`ZKy<+;N!umHL5(%;etGU7Hw^A^P8t9zG?!{UY)!(r$QnGY^A{+FS)PY z;{tPj&lyu$V=z!f+0|nWwrZYsm%*hd%UxDmV>HkY(a=$w806@1$M>poZXrdQ?sun+ zY-6#O>xm>}P(c=3XtPN+@tiBcrX2o$$0UZw8W<6Q8N1aPH=;4W`W#ozCaopL8ytXqlH{G?eNzYfAa|9*@YW@ru*p!KXx+K)e3jL7vzkK zYR7IKS>Kv&;lDuKd`UK{Vko?1aOD%fy9!mH5Tk~ouO0Ank)@#~HCQj<(u^_Tba#ck zOt(^l1iIxgkKU&)c~4Mdce{%v*!*W;Hf{DH=yhr@yef@WKU-_}K2?0&ne%4oB_6<7 zX!*veQ!MF1c4~V@v)*BRS-SLnjyB=?z(}PV*(4m20YG^D!JyX@`HEA!!{%Ee;U3ocKwB?;I z`uA&Q>lx1b6CyMed@jaOc(6tcXMrA))59)OkCO|%Sr%6pV{MZCz(>C?Gnn`BnXacN zS|h@FY_3%WX*SO2W%|f9=LedS$+J@56s(TKAr2;e+WBA7Yu))RB<Wo;9Woqn>Nw`*1A=Rw+HFq&Af=^@l64`y|g54d2|5@ZJ;df58O?#>n0 z(R2AuziVs7Zw+p-i17CnnT_L5;ovSm%^#`v|Nih!Q0Z4qO&~1=3JhGh-^30>ZH!@Y z(KeDnuoeH*f$^LWV**>E9I62QnXYIK~+P>T=F~2h>!yde_da1-Yj7=*45+ zV<&fJj~kyEA$@QHF4LYFYMT4r zZ_Xu}nfm1*s;@d%PGAm08Q$^V=N1};lEFJouc32~FTLv2-ed&r?9~^+4c;z)?1Ss^>9)6jqI^qJy9Ukg}Cl(xVjp3QE7;{ z_Dcp`4|iNGv^s-xq4Ih6D#L4!RvZRfA|f_eHs{Msa?gp%o5Uxb+I(f2=urgJ*3-gt z{C)bKP3MW1HSdQ9Yt{!1wHut6Ux&72ynikSU=`0-~=_okry*nli>A0sN z1iabZO*PgA>mle*$V4T)`JTt$KUk{RE6`_Hcq98BrMAPxA`xNjkAqg@z z`$aKy9#WRpe?pJ)n>(|%GsYYaVsi`gd1R*VPp4pcVx0W8Yj=MBYg2DGqD98giZo#* zc~^hQ8?6vThVv$2iDti`Y1-#!w)?w8H{)FXH=|wV5N6!!szmM2SSjRe=yfDiMcOT> zkMnCgb;O9#Yl5!HxzNzLO%!n1-mg&M(zah&kGm`WEag{I*W7m|YHhHI$gb=qRDYz$ zyXG13ss8=7>wcGAFXVuH(LN3Oe)S}s3&RS$J?X1gfBVc^CE|PC}!4|=Onnp;*f>3o$BXfU>L6Jmvem68u6z>ccyzv?~ zA%KFn`}*387VlNaNs5-_FVF`M5>&VgLX|5)3PE_&QA$?xMwQoIe8Yd9Y79RmJ!PGc z+XR8G2bhDhBNJP}B)KZ21XslfQh{KxL(0fmv+IE@M}-Xksym zQA8{D#7kL#^{`Nt1K6Pd+Htn|BPMua5vMB1WNk?3kwihSE?lt2T*gD*YKM3fiqD}o ztQ2`q=O7AA;f>yTvE9z8M;U7*nWXH5r3E+OwnzvP7nI{^jZ0n5&u>ghYqcT(TH@`O2kggv$g!}lnZ^=ZRidY@><(1sY_k7v3ex7Zo_)>M^$(zjVg=?%0nXM zc2kX&0?QxZVw&PNT4bG}5k2$z;6ikTsjL(Ax*Bb)V$MJCJ zbRd@03YS)W2qXIAxTl~&#`zV=oa~BgQBL_r;xOY!s*ak8vk^%_G#On>ke7{uR!ip5 zV!x4AAP0p0gc#SLnbELC%fV{sMyuGOvai+m*CQzs1}Yb-k7LfKSydW4BT&e|bL+MC z=c9@>p-PO7)I?0q%ApRRjl~7Sj^vNAfJz$CaTy& zgi18G6qXd!@L_eG4$k3gS~A}j2R&NEBBal2AaSYBs{t~QGPH`05($eU2*rusZ((^x zF%?KYWT4j^7onGGoR}{~tEmk-el6R%K&P{Sfe}{^vX(4vGLM6gc1^pfL+ktMo=w3m zfnGyAk?ZVa0rr(nv$w~x%4rLjru74P=veNq<#882>SOLj#hJ8B+UdS)#_W$%50{kg zfO3aT6l%oUC%RXXF)4`!J~deScJuF}@QDDq9t#}I^77<&LxO^#p{_Fmnb-r7%pmY9 zjOgV}A(~V3URr^9fhK!A{|x9+%bk?>dmP`b?C4g*Br^G5m=WmrvA$$^69LO3dk z`JdYhS$i{=Nx6g8La{Gl9A8s$AZ;PSA9S6;dp=O4!7z>{KnJ}9tN^Ns1yoid{WG|U z6T*O&LXA}XXl2YDiz4?)CV_6|rAb*1TU<|?J|4 zQAj;6CvjlUWYJPB6?gCWa*0=Eb7oRdJq~q(u2EINlNn5S_4*L5imcdBRUF-ZimJ1V zD7)F6HFu<-qA@;FT}{IMMiDFNx`OUAj+%4058WRkORIc*_u{W6q%)L^U|0&VBE(vs zEnNYz*fcO<(sZpv3Rc}BDxtn`2C(Xf3j3E}KnBW4R33+(tS&JlUIKVorSZ*Vp+WT1QD3j;W0$i#;ND8k>!m091X#0Swrt=n- zw?=0uQHN=Zo1mjS|}+s0%NlrM56LoIZ zZ$chs)T){&X`UN_5>y>aXzIu-4FaW%>5mY zYgl)s@d2L}C8p&M-)OoP+P!?~UVAfP)lP2POU*kr z&Y(J)HZr&5rBtwm;kViZ@B;Ubc(dRzN$n=TbZ4IJ$gG+AwmTmGNi98IYvHw#zrM2a z^KsszG!n}%7Fbvk92vbl{k8ntT0`VFk_bse96G2JthGgtv@ir}G6NVrR`KkFyD};; zGjK7u)Zbb}-yP~g8SF$?5R<4}0-^eWzNR8z#zJ1`Q`F&xMc*0`MwB2O-;~`ABAEVk z6{X;^O0sreW(U?FcIi2O^0JqrB z6j|N17XXF2aXl?6nnXdK2=o|6zMy4vv0#C0AO6d?x_Mz>@$!8=@d)$Ls<>_eUncdEGu4lYVO@x=P}+zS=?@_jrky5eu4sKj+K~I?#UT`c zD6|XpC51DSErg>ks1F?(qK>i%0?dd-Sptrwxd?Xo{{Y@VA-||8^L@&SP0=Nin8N2E z^-mfCqhH-s82Dy|5D*O}Wh_Cr&}{5z$MZeBRDP90?-R0YViMxPA!{4LLQs@Al(aXD zamWNv0%U=;jr5P-G6d6hp1%|1PG;kU)Fg9=C24qC;WxLCb$vpO_4sv-sE#&DX%|s2 zF7DsbkPwy=5LO^VF|0^A+IR8N-3&}Sg!yIVjNW(D(wqMN%+14Y@GU}0`P!g~>8`8U z^1}N+*G2FwiT3pXWuvH%I@W2$c@n5+5?B`ibT+ByI-By(4c^Gxhh_N-hnk*Fv+nUH z(?5GB_W6E*n-~9l7j|3o$~&Kcw5+Ol6CxlT~vP6d)Z@AhazRl z%gaAfTU-0FJ-xfU>ypT4yR_DLy}h`}lp#*S4#Ke!P6!@ytLV0WeJ4`4VAtWvHrrxqm-`h5#EQX9kz_QSGkn)tvAzUx;{So~cRzr?; zT@30=^IC+~LB^Gb$a%PZU1--OSJH=V+qW^{n0>IEvio^mex}bB)Q+Brl#*mRmuh)+ z-LKM8{4^f2_{7PF@YK`KvwY(=^091oUDLJ|TI+*#wnNi2(8I@HjOc3BI*mDS#zec z;<*+5e!f6hD;ix7i^BQCkcf^0u{c5sLl(F`r0jD!C(hlZGY0`}f+ZARTdcdn+kO4tAMnj$Q2s;kC zBe!JIq{;ilu?t%sC^6X;!Zwsg5h2HnU!~BlhfZZ7l`pnf?3@G{?8cCcI^dYhe67sb zDcn<(@1s&FbSi=0(Lpwy!3xFEmV@?(k>v-eg8ltn(g^{9DMB%XG{>yfP$t^2Af00M zismDxPMvzhZuZD-K`F)h_3KZ?1ik&J-}_qTeEfhtxvzHwFa7Z)67BNgOZ1?`9LcoaV-_r+yCJmv){PjWYB08|%J*z`k#{*!%kvXPn#KxO#&-s1*1+fTx4M z|4sM`Fuw4mqD=CmE2@TEu+&FpXO9^$DNaBBMipmWGN97l`M__07xzqa-xT5)4jv47 zR{Hj<0?0Ga^Cpg=QIjRp3LJhfhGvgqQq^|OjjRmT?S3l_9U)~#FoF?`;C~6+oaU*& zBYdZRRNF+K*p~z}QpU~vc zcz{Av2zwk1#SlUe5t1;1u#gn(bG4aoD{Wj|0<%y@X)GbAP=dGyQBb@TAnhOkE<~g| zxngJnGGiE@nBfn)sCr3DMZ>rnsIMR^1!&6zZiUKGlmu_3%J5R-U>zuA3TYOlWKl6V zA7cC!t55}mjIclpbT&s$N|JVtJen*feN1&K^FIizg^*YXEGY>gjoQVsaHNGT1h%xm zvJjTU64C_TT3`uT^o=piQ0PFxq_QcpZkjYceJBLrYt80tifM@?`7zZ8`JTtdEgiV7 zK)DKujBZ}lKBHSH91Y=U1Y5`Pw5DlWhiGf>2?4aUwL>tra=8?1a$R&KQ;e^!WZ$uk z+^scH$71T7y%@WwjOM-^4dcg=e{CresPxqD5~Py?PArSZx5VO+E)V8bhND=aC@!FL zIcgeeejl>zuVm9{>Ss@Y1uv1$<><)wJdo*2o#$&!I+IH8*w*r_()z@Z7a~$#4MH$! z_C${R!f~{$YeBX37RQpKA!H;JAPSZV+7L523sDv`iZH*FT$F~a3p+^1K}RB}NZ2UO zEDLE#Lyi6K6<%)=)s`sw3!(c{uk4VGoH!bt z=!3T2H@ppMz!zb2eKyAD$6_%oKX8-M;A@3nAl3^1=_gNgFs^mZN9S_*h4ETic3V^2 zUh%uuCUpwqMJ$y0Uc5%Mx#wu538`Rvp2C)4ynuw!={~%4-_QqER)JGrhX^_7Xb9>n zAQnbgmLVfkIYe78I_IJD9y*gpxIQ{xD1$waJj&&=P!=0wi-@X04Rm?ee zKl(Z^rhCh8`np)TZH@o0#);O)%d6kL-`{*@cbUTxjG%}K7zI!fS6oyf0SWB#EL7QRsAIs~SC^R~4%N#r z<*l9p_Gk|32u3i1e;;h#>harK`#Ad}F%H~s;M!8t0t}_qRohg?!t$jSR&fJ#6w&cWF^&GQzEfGhuvbm2x zJim=pZr7>WqbkCD{^*H}t%}f{cDec4t*mQH?Q)&B3LykDXU=5KoH@kfaaOHb#k0>o zYpU=7qeqYC&_f5O>Tlh;m6u=M`6Zf3K#F3SxBiY%ko4tqZ1?l5Q#snThjwhD@i^gd zn22Sg9h;;yUNBlKlj?tWuQ<1WFY*@Ri9KHOgBlH5+(-pcSqV=!lJqhsc(0tEgU)#!sf;ZJ{lS-Zj!e zDUT!`87V+0!br-s#6~l~$3_U0R-}bV6VX~@YfZ#g6hk{LzK(8 z^yKp-`?|=WanbbaxeAIAqgJtn@mPu@u>eO18hwGS0pAVABIZUaEsz!&VIDRu1Z4qv z(Wg9w5R_XEyde5dY(bf04IOMK4O_h|bG)NS#O1_Q+cz<;CqvXz#Wbp-S4?0~T=0_; z0~BrMpD(~g)2)5nB3UJf$s0|eR%p+>6t;%xznxK5R>lb@oIrVbIoq~vWAWm}q|&KU=cBJ29x^->cZeZ!l3#={mT%&2EtW1Oa*EDyfkN;3N<>{lA6 zhp8TW5#3vE26Ag&axcC2y7a*p{vba2%^cU-B_7M38E7`V-!Tr;=Df4-(Gy9_R8yJnr~?-GF&F-qy$7QygZ`a@exUh)fF=Or~&Z+x0aNWmd@xW`XZ0pK!{=BhVI)4&}Uh^!8VIEGWH55YGu-pQ^X-eC zUB3LpWA@*1@r5UU$jiBvUd|<#$+Pk0_5ADZCwZ;ChXbuB(IGrtJgsR~E-sp}(xJn$ zs8`VJSR{q{VIJpuM0D`7MHDJ1l@cd!)~m6gbO^@12n=CI z55_c_tq!Ei%1~n((I~`@Hsa|Vd)YDYZOEoTScq7hmP~?#1>X2k=uvg3woaTaO;r0f zqg)e2qg)b}A+UU{S?Z_B2&k#7WOO7(G!h|dS%js9l%i-4;(I=6-zAyN(vs+5b0)$D;MJy9yykxY%)c*LQT+VkrcE(| zvvb#TFBQ+y^INwH2{uBoXw##=0GC#3CWGN^#Xa3s72vr}^RS|0q;g=Bi)+ z1?3xdWKna=hefjq_y76giiUzo?usp2SSAEW$%b^6@Beeb2UKu=|Fq;KIx`tu*X3_7 zEuWX@HIH0Nw>ORI$z@07g<#E#tI5}z`)kwI4pu$7hOVw|#)uL_=0f@P0lr5TL}G@N z$>aiGpn%8=N5Qe^$meO&dDf^bNo@!xGau9u(CHncP`7gigISv*MiohGg&%P zDPC*cLcTZ20Tp!|GGjJQz5z0Ml$*s5NSToH#_2DUCQago8*ZSvxtWa{H*(~WM`GJH zPdxF&8?L*%ICt(?E;xKV&#ddBChl<9+;W=vmAJQ|GjDI0q-o4@!%sFF8E?6QzzTZ+}pvj z1V8>of~rc%3y+UNN_gO(8LqiL!STmL=uIe|U!3Q-qr=?$hk9%quDGg)^Usd6_f&H~ zS+>&U)U(>CtF<_AKZmyV92b4LiywclYQQty2;Ng137l6t;hHO|2sy(K*RoQj%n<2I z1?)dF#AnYgjR8mPaNY#b3V`xdXurJ;Nwb64ERP! z1a0^>Fb6}l{1Ou@w*W_AQmmRVM9d~ky3#!0`z70H!WcWBNk7SS0fzkf;cm2JNW9sr zd>%%^^FiL49$o^+27f=obj0=SUPtaO8i5;u2Qj%`4ZvLB3g8!ea6fN^1`G@LUL%C5 zJO95mf8jLXiL!PWTK1{6oqXdyQ#|0L#q~V$pY!HYchi#zzzJu8Nszo+rkQ%`aK{rBU#=8fGw_uRvM_ua?z>C;)gdNnIn ztl-Kk`<1wR@4Yw29d{fLJ@n9^Z3#?K?7}GYT#wDTG~qLK{z05}`9}#?Mf&%>Xa%3W z>{s;krs{oP9lK)vc7MU*mGb^SUx^hMnAT4p#l9!a=8<1M$hrl~n59D4LQvx?x-Cgc z`E0O!%Eyf&8jI7@*@M%SBqtzk+a&5DNL!-1J*tu^>O3Dw;jO7eq3Dy64%W6DuvLEiEG(Khd_r9G#0cvh>f7&^dLSH-6sC7dHHD!4W#I#Ml{o>({&6$kkV7K7ZM%2|voHbY~xH zuYZuPWt)gw78Su6$q7SRt+y33KX3>KoNxfu6Y2@aqgWy1>GPZ09#ucT;la&i@o3}8 zCmb06)|Wm?Jmlcze9~P>nqFSblD|Dic1MzWB%@rPu=Y?u-m%C6w$_BSpwWkv6!Zy= zt&KV(Q$l`awIU@1o)FklQdd`tZ9C*WmwYado6qC<9!hD15NM@PT2o$8PA-!rlN)?r z>Pn{2T2o(X?sclzzk*V)W#wyZOCqHt?|Fs#?O0L@DJ9YtWQ9>nM3hOX@qJ$uWG-8G zG+{|W*l|cEl0sS*QO9OOCM^UIi^X`ds|VT9O@-sIW7SsfTeSsSE3_z3CINOX)gBHT zkEL|Zq_(NNA?+ejL^wo8K1WByqGIM=96xgm@v)VJYAVpe;k9);*s!gmvpyPq;iRMY zn_z|HY|qUJFP9X-z@(B~KXjjiZByS~1Wt z7_CtO5mP$d_Z2y<@PloJgv6Gjc-StQkSMwpy=iEzY4UQ^9JEiqYWk!_3E$dUmPt%Y zEnYFVt*ytNc=)~?aroX{D(f#+O?{)gpIy4YmCa*25&U!#$A_sWosf^soV+bByzO1< zH|^WH;H8>zzB2wk1B|(aF|7{A*woj_;#`7?$)ou28S@#l|0JT-QI@aW%K4Z5lDzBD zm&y_eJGqAXD(}(1d?#8FjY!}1$)&QiuHC`2_dm_kE0;2_Y!qSP7>}nnfvc~+ngt6M zaP76%4oKhH(^$GK!N+ehWcz;ODp>mMqxr-0+xge(4*uuEGx+Hf8~N@7YY+k+yksty zpEQL_?_54;JD$=U_=Bg5FB61-r@nePm!C9+FW&Jc3O`kjv8dboEIKy*1W0Un&A;-l zYtkoN`pdEzZ|1nB>~C?&&&%F;!99TW8$Hgxu!HNauIA$Z=-;RB!!K@34p?@|UN-mK zYF?;q-0ZQ>q0QX)V49DAWMDd5HmCW}Iql3pGQw@YsV(rC{Qcn!XP)2AzOx+W9~of; z?f5_m zZ5r@7;CmRp;Y{FeOqx{&^Md;~z$Y;A-uHojUG~EXH)~Jc zxxawv)WYYh8BEHI#+dS~W1#U5Kpn>Ps2$i|GF@PT>|P9uHx*;@sey7}60rJBv~w>E zBe;%%hCyR6%-vQ@zFPrSu%8|b0aX*MyF0H<>oKh2S_T^tSi!L*=t ze`&Y~=3?3!%-

  • OVkv&S{R8D1{JU!W zd+{Ai-|5AU<8RBQ-)>vIPmsjFxvCuge)5=~@@abu_8-6qQA;9~bHSbyYcP=7l{+FII?$Vg~)#M$wpMy`qztX3w2@Ae$%{}Aqn?hY@ zL7!*#eR2-w*n(zk<{xIRZFe)I7l4MtBVIw!+z3R|M7I^~TXRGuJ8plT`2XNSA89u8 zgR(r%ja7!Sv`f8#f%2>1+9Ek{bcDWTHDdYg_8*wqj2l>J3MO~`$f$20Cl@V{ucg0z ziBWZ1wO8?0^&Rb+kYJ~rs9>>Fzz975YEjQke40a(q%U{Y!&E!7ea?ec$b%Wh(Se2b zt)iV>LuvVCT1#V3^6I1?F6ugSnT>CmFaZy(?cxK_pj_nRaA#D-n`#q*RfF>U7Q@U| zCiEUoPn7kVp5KBq?tDu-cT2^{c@ETsA?K(f^nCPD?d75{@f>jJ!T$`gP1|fn-$&Eg^Y5naaQ8-ibBH@1<-c5PJv+-D_S9K; z8DV8Fwjod2kVrK9^k-ff;ROHn9j?4GQX2rfvJ+mtLfw&HdGn!qUujDE2MA#f`}|2J zzIfJa<6OJTAced>&oY#vBi)_Phd%#8HrD%^^{o#4!S1|5i)70aZi{~l@5!DDtL>Ni zcG6=KudHxFtm@v6zqXlPblfmjnsA}qS@>eM#KbT1U+hl2VdTC4W^s(ZDziXd3F+Xk zE6@gblcGFPrbzxmUUfFF!MNApuHCP;V$Y8JyuN=Mv{N4oq=UPsYx@SD+j~A-HTQz} zYjn>o!dib?rc+%t_ksAkpkxG;WH5f(nD$cHI_9z6%>A}BX};9i@ueOkAPREK7}39+avX=fm>%WQSf)H&DUwI!o17^u!J`BZ&0i;{o8aYVtouRHyA z@mc=l@W(|p3EEqiwn9SN%z*FEs}=57-*!E6`$EqvkK+<|*I0#to!RVR_>Hn zJQw73JI_00^$F=WW+xbTpXJxD{mUZ+VQw^bl$gtkK0PUoeAYX`2G2jumfs-E-3PQJ z)h(-H;#>v8wv>O4@}z_XElQSl1;W&waLyS#1*Q{R=hy6t*zbsBIU#_;3vk^^9-r8@ z6WS(jxLIEl_!Pgx+7l%3K`DFggeApDM0@3grR%{{2iyNc*IR(K6?FZBZL#8|NO36c z?(XjHkmBy{?(XjH5ZsEpOVLo=-L2iw_j~vI?>@Ucb2D@Nch0qhWbVYOT~%$_gvP2} z0=H}mV^gAY)0_33Kj6qSTdz$+bw<~wH@}E$53R{q1k7C)Jy(FeTva_+kjAoICS6y6 zon3hyR|tZg1szw&$EwL{Ae8IIs>y&m%i}+60HmUQUM(g|yzT&#G==tOSeg(Xbg-#zbjb5@*$AQCOS2FxzZ&Tn)fgzYP|Bq8*9((30Co_+~ zc9Dg-oU{Dj*Do(`WGg-g13&Kvd=7$^FW5)H=I#HKo&G5wmhd+J2hjRIK>tPC(p-A~ zBD>9FF*uQ|W>5pP*cYzUeX^wej$GXY1&rQY@tD7`^3JryQgyc#?klo&=v%g)kD6{a z@M<<5GFTHeUb+`)yM^4TD)nzT=cK;iMc(a7tztSc&YR$hN!6Q7J4753u`Su8B-)wv z5C&1k?97H7_3$-cgG@z1FFI6>-Be>$wNRZGKioEzjoFk0)1z6EAHMgrlaJ;z;gAwv z6e8?-FGO|5uBw_8lJ35}mQ>Dp2!X_Ham-At@gSC#7$=@N$*OV<>A>Hl!*$jgyKSl( zv)v1UOsU3RWKf64<)PHlvvbo#wEXX^Fd9uJ;VhS`hFqTO^E#)O6ixV@1&rA|#X$$& zR4QMsu~ya6C(W1QI01<1l?4;~T2zf~m0RBQd)~znOxorZ6Fwmr*WK4DAazQLM%9op ztHr3!zwPqw`jdxHJ!fjh&Fw2M>Y-h}D{tOgf4YanK)|h1z zXrVF!+WZN!UT)I=G=eH1r>cpeTG9%pv@x5Q zsODc8!sL~_GL2$Ijj9<6IyLhH!n4^aMeMnRF%Mk44`yfxRKP;+57B*s!D6#{Qrz0r zGhBm#d|Le4w}pz3MRRJw4rmbNEN}s6tIHIPIM9^9Zbg%>7AT<6SW^wtiFgl$))`f! zT)nSU;U#~5aum}E+6M|?+>VB;miX~}t+R6znJc>rO#<6Epfx-zNGT>O1aU%vx17ffXNEu42 zf{OY1imv#LML&5(o?I+_5z4ZcH7}XX6Ix3s{f)&b`A*(dJbiZU;{AkI7@Z~rswtQp zq%I|?!Gk>tRZduxQ#9ss19+Wxla*H)WsDOQf!ujqq4^L z%&Fi5P}u_lyqm7isTw;`$7tv^;IGFh8aE~04_Y+w)ikP;oj4J#T&l+PNv*gwrSv^D zMUytVWX&3MV;6iDRV{Oh#w-BsBWoH0ZTW-)lck`Xq;dAWKzebus)>1e)9=!evWdAY za2Bc`_l88$ixpK(%IT9dkLxgsniWjSS(7y@OlT#V%BwE2zZWO#`I#&QBz26@>_st2 z!!8AEDtt;mDPImC9mVTO;tDS(YIO{Q01b|ddcn~*w=AJUbdkC zvo2fuw+62WXz3xe3U$|`>vVj2=Z7=B|gtNJek3~1k76M$2 zM@4_q^9i#x#}lV$$`&V;azuQk2_;NTRF6#hR(O=X=de8eorct$ZK@EzzR3ocqb=+W zEtt#jXBH;S<~j`t@Y>v7k#KoHA4Qc&t($QKif7An6=K9qP3O4JVHF36h^r~v7%hOr z=CHh`vx6LBv+4G7xF|_^!*g;CVaAl2s^znKy(>Qcf?2ioE*o3o*0SxYyjsFJw(Kbu z8&?6Yd#LtTf6MCa8Ossz6swFDatuzegI2aXFU%Xf*9PS{QE;hKN>4Uz(!tH;f6>jC z0WSJvtR*519#R!o=HEA>3vgAJTP$Hu{Z?C)c(L9f%vMvOwS=MtrYs6rVmUXYI77Dt zEon+yWGzNBx7x5y9t(|E(Wwp{4`At(W*9r?k*S4F{a&3VtJIZc@(9wRlr^=hHj7=X z*w?7$2((l*tik{eTBzMsnq>8|mVZ}6J=QZmL7>B_u4`EMObvfm!{iK|8jhiXW#O0X z&-~b;$ajF^v?TKX7FaqjdQ(oCtS(_oNHm4f*%0eyb_8 zYsb*X-UYJd4^Zs+py7=qk4+!X1tSv9i%NT;$x#UhkoZ%OhyJPOf_?7I+VzRWibMjB zyHuAvB$cyV90})592bT}!n(V}89WK+`FxC27cxKG9UpA@Lc3tX?gH}yWS4*qZxINF zJJhT3-2M<;AU1>0-V{2yaayAvXx!VpA+( zcMrm%!B`tcGNBN;yeW|6#d}}9`~lV=KgEh<Ej^2lo$Jv zj6#Ji;IPpx0Ha7o;UCL(p&_ZBJ|?#}$CJ2!O7;-$NapesvtUXfvCUHw2Y0@CN*%hY z$A~{MEU3XSQB^ExOTLXzmn|qolZ?`rE#Qz;F8~D+SXWeoy#iyUrUc&sG@Mo_*-$hp zn6f93Am=L$Gjs{?2^HT1NHn=>sP;l|sGHEi6@`n}qQ3pq2JWaN8jLzBlGX(hcIiYc zEO5$4C73Rd5+=B@B=>_WrS!nNqBBG)+eP(zPri~kV*<%^{yVA>*RlmQFbvPK1ubyr zTedJ4MdCQ58mto*k^%N5B4Qym1HUT<&JZQJ{j@?TN2GYloJ6u)q&UW$BwY+jGJzYV z98VqHfr6-sHIAeWEnW-f_EXQV%7r<2rLzhlAJO7{D-y{Z(c+S*1d`2yFAsDS;@5P1 zt5g(&yrppV@{KvC^(sNTKOnVW?vk^j1T3`&TQX;LT?2!Se#JDbv6df>EPe)liu}xp z+!CYwrbYQdr$}^a7d#Rj;}D-fy<78Dmz?h2=F!<3q==#$w&W z;+7_pgcm!7i&0G4P$~?o^%=cH4I+w`1D`FxJC7HpdLEcS()S{(gc98m1jh4*XMhZrRPC867qokT1 z-KAi%n+ZmwxU`$Ck})ed%Kv1>oIf#i2-a8pRE?Z`cZg*yrZ)x#M2qQMF(F1v!F;X4 zr&Ug2d9BK)#im8>PEA0IC7ohRt&6>BsDzzXzuN%0`pG#lD@7pFpzj_)qj9axr^S9x z?M_Efjm4Yjl^UxSeYQ%SR@0T%R3V%Xe+JyEHHfkv+YEnv1CO;kr)eIg% z&B5rCb)S|%jZ7XQgW701ED))Ls*TxyNuZb{lx&77t$cS5QtP90LRN;rxIsa)m6PPP zC7%}4y}7hO&XV;~KzlC-=>gdc21WcX2yzv&KM6NW0H+RP!KP|%wU>gFoO}km3Tk&B zQVS|D2{&7S+8}1>N7ZbGpmo(s6%?yKrPR4xaWbOiM@}C9=AQ_(HQ@oz}jjYDrJwU{dbVDfmY@<>ZnAxjk$Iqu`BEBOotE)3$HIM5L&T9TQ4bY zcdkrv&fK4kQ0ci8K9h@FMCw9SHrrAtyTd@_2!v|mnw47su}zO?zi@!3w!y1D4>O0zp`qZnJF9tc~=8A`O zaJR{7GxPtXD>t{qhqA<0Q?|AuQD(*Gj$Yjg3G2m&k zCtH;1Hhp5{l@eU~<&6^ckSv9#=bCIR{03`yU+h(C=TgNWTatX3W-li0^1`2cl7^P813IV|NoWP zu?XnszxeqA#mC1lebh?-<)4yqE$2FvEcTwoIu;DL6g9x0|8;^({SR+7@?Q2k?5uU3 zf5qZT{ulbaW>eYrd3#Wu2NrJfbxX6^_Ql{WAH3z!YMdNKP|T23IXju+n*WpKA%c0} zbh-ZV%n+Bj-V@OJPadBv@iwqvv_hI#QswI19nkI(TgYEI(GI{^;6Pap=)>!23- z7@o~Fa`Bu?ld<>%Pv*T5R5S6M3%nGNpUXqcgOBv4L}AxX*9#NXoY{rj#b8u0%PKdB zo4JuN`ab4?Z&Czw0lES;X^y;XaDzNK;N5#Xhdsqji7#Bi+80*++-Gd{-MLQlRdp+D;pdz zMOpZtv7g2GOaj;)lAAgeCD={@`wUMA2LkLVbjIvIRAHB}InecUwcNWuq5q+1>E99k zqsrgy+<+afpQG=Qif2JrX0ZQnb8m|Ox_&ozrusiA_m3BC*dWv@=l?iiI6KFa(ym+D z04t&{wRgCFKzx6tum&&e_JCCEtZ{M<$_GMQZftNTsYSjcFGl|l5BxtfFfYZRy2Eq0 z(ENHf!W~rwB-t8n0eVYv{c5w_mH2bC*{}JESInKSpiHaF`{M4zpOS8yN?>i0 zPC)quiJb%W#k1Te^3*Yze>}m$cV5NBE!dCTo-UZTtB`)g4V#5K)&aI1tznvX{mQYD z?CMSKpJ)v++4-FsY|z(<`riHcesK-+py|_WS!)_NYPA*;1~c9aSFJrR{)0!@FqAW_;XeJ_hH)i^-ccyE%oo~ z8~>ka{Xbi|f1dgOzW&<$>k!}bXQ$`&&$Dk&&!4A<3*Wy_Exvzy|3>!B|Jil$A=+s{ zPvZakmh1aOU>YlhU-X#du-|X1(V2B{`4Rx(AoppS`8JN(GtTEzS5|PDaQ1=U8NAfg zwYDMQ!Izm|=>=JoBb?KYTX5%81}_*boF`d=SB?qlhpByngxUf$dM(qE-@P}pXr>** zlJn#~N=*UF*~(Go$kO3L zK51V(ztuQhOUq$}G?ZitxB2&nV_QSI&=4P1tgpVnVGxNb8?D^M=~oTF$Vuo+4rBGr zkDJlajYVr$^v#*ssCC!-luvfB7j+fU!(I?47_j-QJ&+s7!frGsg0dmYsqiWk6N zF8@R_(gKZ5U*lj zPMM&*!OAaGj80E^_HlOJav#CN@OFqesG#VBgiZAVJR(FyAXX8FQ_*dDdE)kXx3iS^ zQW^22tIM0*;RuVjFxt(TLyZ7`~vVC%T!!XD@GHLi2p zM`n5(jI4|P-X#E%tlZJH74&dIhyqM`|3THfqr2DWr#_C~djmG1+>aznYJ7PSNI>*t zMn7J6(2>a?dnrPUS?uX7{>mA?WbqpG_p9HJ01l3n@s^9z#^u{I1SIABWn}V0bO#%A z>{~{B+)@st7%D=97$VL_ZDc;q2Wq69JhqR3rrh~JSoKWTclXD<2Jz=fLcU z;MI=n4QEsSH6Cs=2Qm_TP2P7b+(yfXcqDBI5) zN!@V)ZM-@X9&FirEIlue?VI@rF<^l3-Zc^Vnoc_N=JmD`M*V(p?M1Gqr3Dx9QwL`Y zzTf&LXGY;{%tirT#|mENuHvMS_e+P(<|anRn{La6ZKN(OaQn}I;m?JZaTnu<{`it20Aj#bQuP#o5igSCpFX<9aK%_@td${` zrBFV>9_0v;bq)uCqc-u1!sLjXPO45X$w22n4UL(ugj)In$!p98l#0+?S$Pp1`87K7 z$8fNp+g$HXfyn<~I}r_Ede;QE?P1XsADyJL;o!mZRtDo=y1q2ciAl7%_JHFx)v;|4 zMjdY+x-q1oL71w=WDLv3Qv-r0e-j-m{jA|Z7_Z#(hxo5Y-}q-@Bf%Z%9KBSLev(8F zMZAw9(OX~4NBnQhnBUZTMgpQQTGM*}HJ`3JjXUd+_wnQ5w^4MToj$A5(+VEOcDajJ z|6XvhH7{tGXSk*R4^IUm&!XYC{~KbN(Jod(3VBErc__H|yj{P2MZBR>{y(IJgYknI z{*L`@p*^6NYvWtD{cQBOMR)V8c9+hMZQZTedlSh=Zf-@ufRDlUQxs+jXvY)m9gZFL zWC)<)2$WAiSqMZiVvVOvd(InodNKlPR2wow=TP8dkz!)0^<&m-WF6aK4XSzz9Mm^( z8h=SL`;wNe4ehVWZJ|KkQEw%O1&M(xc!j}A68O^sQxiKt^E>fQVI%_b*a*e!NSG4} zH=LVMk->X2=yryHqZvB+oU%a!GP+OL9~&Eym>rRDF?vkd9Fgb+EWzx?1A5;`ws05O zN~5BT#6!N#v{j+(uFtbC6vh(N%3YNI*B-j|KA*6UFm3 zQnySO5IsG@@N`d6ql=GKqKk#asYF4OmZ=hMiZ_2l-oFO{O6;@RR(x_BuOlATW+NxC z)r<>`v@R=O<L4QPYtK2obaC=0HxBpTa{s*t-6xDuwCr4FM6KZiAi#MtN_?26csk zWWp6WL>f6HQkAb^Si@*zpnSct8utjR1elfN^|PY@{|mI>)W>D;dz6sz@gpHJD|w>|1!;FIQ4;PnoZi_02U(RYv`LMgC#8@XGCWgkISlF6Q0Dg9FL-;^a zO*LB;3cy&uOdc_5~pW($mVIr#1x3Jmb6+Z@fWZFWX#l~Me; zSI+F+l(P^`@5>B*B765#L~zQsq@$UGTtZ{Xi?QRwz^31x&qY?)s;i9rX<}N}Dhs(U z5?QU;dFj^|D-vhc+{D0S`KdjRsx^Fgj_nVQFWIt zXZl(3vsdJx+H6ywby{_hDeQh?4J*oJxTsA_YKpg9_od*pk-(-4a?1C?E20(4ky~qI zhnjuIW~#x;3+=?lRKG%>TAY<_LzTZ*b1f8YJTKHp7!&t|ne{+i^G&v1;B>|GFj7ol zFEG32wEMd;89`=!NwSqR0so0p!uU-%9&O~Uz?t~!ui`NQYP7s9rmw)LhV>Aw!HdbO(;~aR|l8 z3N%Gh=f%8FVR(;qgT%CtXOy)>tb|8_rJcn1IHXe$HE1fsJ(3n+D>KVp@*C$2i5kl@ zj`4X2&D$`7i7fT1lmCKAOMwY`(@b#G%yxN}^5;iI`g}nTf%O?P+5+hU15HJQEpl?+ zsK1l$7o=aq))wybygU)RH^R~Mh;W&dWuZg$cKWImBegtk(Tey z_e_lKzOgLu;?rwIc=p;l)1PWlQ15BM{TxVJFAb=hypEfDImzTD)Ke<$N?nDHrCt%w z&2p80**&d(3Nbr)yd<8}7_TK^E0r+BG$#q&2xRS3z)tQBpBq82apILq?w2;yFlWhC zE&>o2Yd;|BHikPCtR(SJ%whVoL}ilk$_$Gg2lzWa#4HlDCM1fn&S@wW+w?x9AIq;< zZTUJxuvD$Ck{sa6VY4QPMHit|!BFFvI}QEDJOfZ5!p-yl#+JigkrH;WIlM~Xq2SpM z8^*m#BgTJA@#Og)GfWV|gVDR1I!w^IlsbIVA3kDe_yxh$1$=ASzgGF(nzjEuP!lv< zOP|V|wl_a<&4Sq36~8)S2BnAMb+PpZ5eM!a>lsF5H> zJXESrC#quI5P}YuTMMQOCjcd#la2^GJ}d-1ewT%a3g5~c>URb{8cMW;2=Q0NBE2XB zT5K2E)u{ZilKz~qsJ8SArst31ag7sXgjJ&6ZVDnsy_G*T6+{+@P(&?f!EB2JZ9*V^th7pv<7i$CudD^{^E1?ruhktT>;&7!It zILt9{t~q0^fc4E7>whES7F;;p`^I9R-o{l~dcHAe$h7u>msX_7OBIVKinlsc1bm5= zRleg~yJLU1L6aoTzaoi(vB@(@`RqZN$KD}g6`D<;YFyU=)i~*Q#Rf67hJe|^nQot% zh-EwbRj^0m#<&xzQjl4^-}Rb>hhu{V!7(i(EjtE;1?c=c+ZZ_98s1bcx;o?+tl}*P z=+qv95Bv>48RF&|47&Qsx;8P;V`;{W`qv{bLzT8B_5vn=SPYZ?FdJ=1dcZ9llOAP< z^v602Nz}L7y3aekxVA1a@X(G~SS^mP6=D2F&-pn-L;Q|94%?Lm6K*WS+APEJ!ailC zVOIt*zxJ?7a~&0jLi-2Wo*=p$Z(!)y7f#?XYpD&^_l<_EEI=bivFP(qk~_6pvct^m*XWE@iMec%0xXWdIQmdDgWq8pNpY{H#u9G|2KSg>Jt> z4wB~SbBo4ou@xyk76g=voh}$8R`|m-XQX=~%U7hgO~hok{jyb;9Z9Q0om|f#a!D{Q zecbMoYj{rEt@5dYP6X0S8!{%|x)^GHj2#qn)W!EDv_hSDr!b80<*%;yX7`OMmjWgX zVfPIgyW_dAgz>@oT=M5-#@;7sx#2El+2Zd4G>HyEpjHxX1h*LNY|xnRYHAyo%Uf{o z-KvIWxgZhTs!(ECx9i1t#K?(Axlky3y;wr;BSRyvlGH}OU1D;IN+X?)C7fyC;iKUb ztDA<)iAe1pBLsYrTh0V8%=P59GD`iMF%zqoXCK||>or`JXv0u<)LNDm?P?Yc;u@E9 ze*jH1?&Lb|#JZKqIj`G<$-cwU7R4OHM!$lsWf+N*!i`Oh9b%b z10NAaRBQ4@cfL`Voz1Y$rqjzmtN~ASbn#In31ZW&nI8W>PYy*9DF)dAc)Dx0GMbB; zGTi1kzH6|;_+5mi060mZg@lSidh%0-`or+}k(@>XFJKngAynbWu}{fc4nr}bGs7H) zNGe{PIjrn>v`X|LjyS#PFbA>Nj8@8oaa8@UBr(UB%zH`)PPMJvK@FTZP$E7K_v$=f zW)FgjAHi2f1F$A-f!Rr5epp4nNV?2q1O+o@SQ!@WbIv`P=c+bDoV+LhZv+7pMfizO zg4Q=b*c3ce99QB$$k5|R>Ka7mnChnONM4!BMT!$E4`1zemJjibykGp}Hu>@nX1Uqr zBoMASu=?>YkPIU){AOZPvmt(Pe1o!6kUJeda@2F-`|VcE9XajOUT3(TfHu0>Y%k3e z$^64q>{Mo4F79S%{mWxh2;X3EHdg&kcC@%Agv(>#gct58;53XQ559~m4?sTRZdl5f zS2yqVc>@N`t!5 ztiw!0p?mmcX_YB3mu4|=>-T09>o0w3OrLRt9u~-#W`Ni(4U(rdq~SK|COf9(su=p= zT1anEG+}#9daix~8&~rcp;;m4X%ot4-&OEj*X21j5}aF@BRv@S)k{#c6%hTvaw6oKW(LdXzKPN<~>ft zzm+5qB<|PYmyH4tuK{Y~^W?3{`q5JdC1QCoZ(*}d*m3?4Mnh@|AU_Xu_Vt{zfn;+b zmn}&S6ZeUcGTn21W_bgbqG~!q`-|c+%ra@y$gR`F$PByV%jC6Y$Y~D~LrRuPUWj4( z`QjS{i3M|)`!~4TGu*Gkaq2TxAPyc^Q)xM*tXU6}+jR-=dS#eDK~FB^=}$z~&P}jP zIt>Mw?AKzI{#_L4FB64fIvjH#*ZZ3RfF+_v0*`H_sBsMAHjcTR8Z*V#^ z*fb4Tfhg>TWvlyoD|=OMjFD(E#qHmn4yKNL1afn&m%a-Cq+t5Hx0>ZeLNeJ&XQ-uS z*!cx)TcnwrZ5>SQTuR4N@@&C8sKQX2G!(#clwYG~K9qMN#NKw6vH-I-!>uhV1v!}1xQMHhs$zb4y+_{UrGV94L&?fAEu4L)uLZB0q^UqDp z6J}Zhy&Wf8A^1-DYz5HULjplk{;PnTuGTFqn43%ixMxzRHO;=wnRa@3f~t1>&+Fj_ zNz3YC)4S^&5h+B@bWja){>PX73tzioo?+mrZY_j1dtlQ>+2yGvk*A?PeRP znn-Fr;|;Vl=xo2nVU%$mbG!*?9))_c7tU&n@g~&M3gIBI=z7Wt5HxF|p5Rh9yHDVZ zT0>6u0^9UzdbqwY#C4U)@b+R3H28j$!wy zv-}YbZo7C&wUd!BR1Vn}uyr80F>6Yq85=Wfpi6HO7Jf4=x}!|8E3X%LGtA2X?3yny zj4G2%UPC+>mIJO$CRh?NZ?zQ=tL_}BH&~fV)>>d+Y|3D6aVn~nGOlordllf*0|3m? zy(=3^EUzJ2;xp|1)ZEUHV^bfy8k7U!vB^_<5jO}zDzs4$GErtKZJMQQN?@dWnr0*q zfSA+;Ft-tAh^P0cF26I6&f7c=0U% zYUR_Ik%@+Of`2Y?-wR`Kc1U2~HaLvdK=O=+%=AX|7z*0c>yc`*@AKr4!G_(ol_#mP zHNr$zG(A1}-tc}ZCI9pwKivu8O0y+VYW}qL2Fd&)h9IWb5eOh&`FBQ+-S3S55gJJF z(*Kn=SQP)20*&-Au`n^pmU!te2kt#K>~j&Mw^D}VFMI?X^Y^gcUzbl|gohoCC)mGI zI{6RkIp)n6zXr#gl=3hC3btW1Cvh7t+ZX8K;P!rI`|(QcglSO!OCnEaH&1?w?=R<4 z8JkJ;lpM{wXOeIHLB5z-(+DA6IEtx|^7MqLLN2Quxxv@DGE}zPVEEL$zOOVvf?1NR)8ZTbdx75ahP3xo zw+VDh4yAC&_q^53nCcpz#=ERM_0}<8a`v@PRS%6dCU6wl-3rr6t86Yq2K9n{0_oX6 zegWEJ6at1e~a*gq9__Z$`=XL7&n_nWl6~kT)VP2q% zH2*2{jR_0-!Q7xjXWGK*{iM7PdQ~%v?We4$6B*tjenp%3i>pCMY~ z*`K1uZ$A!Uc%nZKwlBlTx7s05A@E3$y5Scs9|+oP0Rq)4`-}R1Ge-YFuA_7+U+%Yv zIHs8eIKv`UMtXY`kPhYbwd3AXAsCrio5KZA-seMK_kpn-ep~*L%i4;bL5|Schd;{T z2AQ`k{$a#Y^OX2Q6Bk(iQ2hfrp{*_%;IdrF5SQN-A;-8ks3%H(kqE9rJc6>h$ z&&nJE6S4-jG0?^E>|lluL6`fN@v3&BlVI_(cH-{0MsVQeqEkg0bu%N0DZ0q_f~-mh zu;+G>xKY!@BLw2O4{8P8UW(VJ5V$u<89gQcyr#Z?#`(s^M53MyM(K}mrpsJ2W2Izd ztO2gRl~V7PS^c*Tn_$iafE|KXLrWR*y*JwUkJ>(g5dUJAx(jXVpeMLMC^pZF!CtT6 z6#|pw-zid(AS%A)U$v&-z1upknDFpB*@)L|67X(x4-Kilyj~bRsOJ**zPF^Qcu!GD zgwjk`=<8O*PUnkJA~(v#mtAr92~GIc(%i3?4x)Q~NCMNFI9=f;T7v;?8IeIJzX~OA4oWR2+s{%!R zu^x(jEN??QyJYd(Xu&eG=8I8DG5-1~?H<9Q-#EhuZ5O8kQ_JdcvwjIzj_AzrWmqqR z6W&7|=0-O<2}Zyce{*QMwo zs#r-RP7_dGr#Y{mpI-Yk=N$82!uZ}Gm5$?5F`^1-b^>3}#B$+zr)u@Za%#L5)VxM~ zH#$r8(EozJcKp@z>N|TQpKNSnW3(lT;z(6O-p za}Gx@46u_hHa9hM`e&!?WNfVlHlt%<;$-7sXZ;^kV&+!HOoU9#U>zkmK0d<#Dak*^ zdr5eB;OJ$HZA_ia7zr6!8JON7{D&rFV*6)A4|d^X>;SHg6~M_@#Msc*$QbMi?tg0R zmR0QutD&sEddb@cOYtcnUKFM6`)N>J5XmX`2)4@?NR}XYSfgGVNIUSaDIyjv79*O4 zzcn?j8gmtU_RQM&a%Y=9x4fB@G&W@)S!LU%{9(S4UDWA*$nr!jn7a1;`#1go)cKJ0 z(E0L`^RP}4Oc9|ac2-~(VPP{p0sBXD3KP7zYNh1>4{N8Pqcp+Kp1d;WLNPV|0Y0r4 z7SX}xpJ_v%A$s+t`TY(cF0%}P9OSC~mLb2NBqM~{Ofm)OWnNgGyQcPg}imnj0)pLYg2AHid{yH1+q5kvV za7qi0zjP6=wEZn)nTuk{iWA$iqoF#~N>C|zrsEXA)>a8Sk%ez)q&XP!fhqoI#c-*? zdH)nSVSx#c-`8jDm5T{+0=X}argLO!5GbXVrfDH6qsC#z~(Oxg7$GR!rp z;vnOC9T)Yl%%s(XMF~01&PM!5y!!KCy;OwBfSKI&sLl1IRa`Mi1>UMDD49zKy&L-` zWtg12d>U$Z_cqCtvbeIQsL08gyVmMhcq%M$l?Uk4C1qUtu(|%GVQZ^a0{B8f_a}h+ zJCe3e$WEZzIMGr#`Z{bW>WzigE26hzg2Wzdr%L=!%5P{9$O~c>4nZ(gj!bH)m_(l< zzo!Y~$7L~>`xlm^?60pc-$|si*6od) z7`p14nE^F3u(7d+t%So6Av(DKoTjrz(56m?|w-|6;C=bun?Vv4v16?k!Vb zr+u>QLj1w=@hhZqk_>)~dqw>hs#(;V;I~Yi`$nq_MVhhs{lP5Sqm!cmbc?!2ERBy} z$;Czz9@Dl8p=EHt_*Yl-Nj(Zt$MHGdWKjf^*K*(53qw>?HFH(6XCdRXbYE921}J1z zb#GmJQ4j4<4`1G?AY>*524lnZ1A&HsiPJ8skeFE?hUUy)?3aOuR9h*7D%3(8~Q{e z-Fe1%Xw8UImaAH}dEv4uP?BKeVT(0DT#5AWZ3(cwen=p+))En6qk5f$IeIQmPSU`%M6hqbuV8p>f>XN z(|C1|?{6pRn=dcb3!c-u4t)Fz@4%HnnD6--GH($mlmxuh#6%>yIW2i zUz^-O7|v(z`|0j6qEO_A&6(_r&Y_;U1yrGD@t}h` z%f%21q2SGkQ;A9+9~YQyPnT;ZnPY5xO+D7!7v^|aSLUKJwAYm`c%m*YBR- z$&>}Zud?2h27~y5p4qytZ%bsmya~H-iZ-EN?Tq~TyqKW2%YNP?xf0BqnC!Q>?4qNa zDb1-3&cKU@8re%YGvWV;8$H3^7plLD5h9W3^{7|D4iA?2`w4|KdA^7zVC32^jigt8 zY)?^fQrWvp%i4BxJUKjCmH+Qn^3Z8k(QeXR@?ZEivI?sFA3~!%Lr0_t5%TNHmVBL> zJ!E_~f$^EbTd2jPmWAq&ZhB~Mkk!#kW@FEh5dwvUU*t;#F?2+NwbF3~gy2%;Y(JDA zZR(AV*tP3<&T_^lItGW&v)Xu9cd7Qd1%Mp5PL5Hi=(Dq41#Z=+Bcy4qk0Q>`dp?~> z3pB!*%@1g8rPln`g%|?FqUQ!(?HS?rq80tzG8LW9@m(rRWMHp}gdjYGu+f3hw$^#A zE<)Jm4OpO$S4$jGr`K17p|9N^=dEe)%=Mg^m(L$LxZs9{s%Y992q)KTzvvDLu{~dP zzgwM%5;J5v_pzVmn?}>|8l%znd^J+aMS$u4gWx^ z%_T1$3Hw{ZMzT>PjSxnR&p=aHKS#FP#rk@*b<1`9Sh*b^bm!G;8$`80c$Ainy^dA& z`Ne@t!T4c0{I~maGoL%~?~%M;7ftzx<5}Uo){BM)K;1CoMqgyylqc@ayL^{*8;c8w zIH96r?DZYw^Y0^ZEEKe~j6)(lwfcgBjE#UzNAz4-IrO6PsTka=aPURFgr$o9$G%1O2B7OIe3^g@hE!Bt(} zXBq9!vs=fCQ+oLpQSn6xx`Qe;+nV#RV5wdzHcFcy|ysHpid>;2## z!_QaSdpu9E+Bt`F>eI@tj~+efCVV4#f8KjIXDSz%?evK#cG;)Q5E)jc{!`-xx&mg5EhRtcOwwoya*2gkY#xn*)i}@ufrZ*XtnZE{K`LOZ{2t@Am<{6|378SfQk_?Hcq1#n z!frdNS~xK=nW>wtnrwc9Z>hXfR^E-o%Az&V)Rfp*Jm|7^rI}h-gh@)WU+5b;KM{+; zcIV>E?^ta+KV*YD`9gT1{|WTf=OID#w1X%>%ieGex5jyXH)-hdfQoW~0o$(RJMSPd zeYe}rM~^KNyqOO)&z}vdf16**8WH}^$0M+NC@i#fw2kT~YscQ0DTh<**7H@gf|d$#)i!rDu%PPFcjI^5lsG4?Um^3c+<&!XY0-?;hS zz^bm2+~ne7Y-He>vu{(NXYnx?LdBqV5oG6O^j)xKTtQTP9v;4*l=NybKH`?`XKip9 z2ttweVX4lK`&p;9;qe36^Ijlhp`mH5Y^y3&p}EHtL+iPYik{$&lOd|mo%6YW0~3cJ z@9HlY?+pTcJ1#glC)x)w+o{pxbN9Wwa~lev~#<_9XqDz zgx1__{_0|8`E34#a`#)@hpQ*$aP=do>DX@6=T3_Ln?PIIumqc>@N0sr-+j_eg0`%m zx}=L0kb^nyD#Jk<_m$z-+7?9m;I%dL&t`uEZ*y|0LxzTm27-dvCR=i9@f1u7ysDk8 zHtVaK3y4OaW=i&zk(U-L9Qgi}4c5$JphvG=JnioqIkR#RSWwW)%IWpURZ~H$4~kOE zB{m*gvSYRP^4oc=FC2Vc(Nj}Xm}wVGk55j{v$1B4wmF_w{q9^d`+1eao-V-p#~TyM zZfM>9G?rH(Tx@~X!r%LI2z5%LX6zsBS&981#Mz(pH(_2FEq4{C~$TK za69kGGPqrP-mI7RaRjr~GA45Sz*XR)c99ycwmi#EA(Fxqo)_`RWMY0A4*n9dhVr`<-0un7kXs2 zV}kXL&!MCXEZC@FzVBQXlSh|SRrQuPD6ud;Sxb~(M??pUX1>6~E7;r9#W)1wQBJ6MHAC!cuPFl+v$ef95<(HEr)uxEBxv0DRP4B~hp- ztZsO8l-1}`f3YuT%SIzc=dtq1pF^HNU%8W~p-tMA<~|~!;>6!>xu3J_u4sFQJToey zL&A%UlPrXmj=q#YUYiJ_*UWmbH!tqKihDjV=SvEIf0#z*Z&fT+-V-2TW4(JEq$NsP zX&%KE{vA_8lpTwh?c9Mw$x$%NbmWO-#_wdw1dO}$@f=jS}cg|&X67tg1#Qq zetwrgvyJ)oI@uH6eIZ$#SXXN0s56MGuR1{giOmNh;NgQ{mmP2f$}8+}HK8wN(3RI0 zgHptIKWphKzGKElzV3i{ramq+{~{ntV&FogAcabTi4*i(k-vIDoBC_IXv9yMJsWvXbZN#zZzvfL+D{{kkTq&0#%X9eej`V3zs0J%!sfH>vfX%17mDTM_gN{L zAKgB1WQAxdE@rF?bS&@Kno(BwjXmfrb7hjxOjFS^xp_rAalyCwzbd=xu&B1LO~=q7 z9fPzI(=#BUfJg~Q2na|HNVl{~NsFRf8bsy7mF|#~5Ksi9LrPIl5JUtde`jXU>&55$ z<2yX_taH|WSL}V(UT2u+h1oB)8Q8nybAy0qxdY3 z)Na2l(;He)#acXgKF}o%~@Ik@SYPO%R9eY~l!E{FJY@KEn@Gco{ zW?^LNRDnVaDAJ7==4&O1KeU%x(Re3h^M5c5f8vN&V;%jWw^G)g${oYzCW&-yiPuJt@n9Ry>en);N$s-AD6$O%Dh}(G-dB?j3zXC ze0ZU_^ExmxLP0NRPFjVZpMJd$G?Nl zI~7=!JJ}SApz`v&md4~=`ChU_f2gf$t9!ax?PXumbYm_^vjA366s%L91F_)CzH6*& z01tlekbFjwU;K^N0mF!6%1+dc3xyq5gy+#*b3wc+s~%oa^6|#5Uj%LCqMLO*^CEno zO5a7_#yEx7WUHwFf3Klyui@-`3MTh%4h%Nv^YxY zYTf)emEEoqtJl8%K>kM|OJ#{cwyt#Dj1sZ4cPuKwRHsc;Li79b!+3*IU)Vt0&e8bB zW+hL_fAD|B74_w7lkkf`2QI_e{eAEoU+?wJEcKd(m!bz}r|+1G)hm0wk#q44ZbAtN z$Z}zQychX7XJV#`?d>|X{I3*sIxAdPRTP^bcZsg6BS#LoRSl0kD%5pCEk9e|-fL); zTwWJ5w`23v3EEv*5;riHulTHk*2!>wkoQH?$pcnWi@WDxXBF-+}5?-BCvW_j3;#@P9fU92GBtf+W6%0KM8@Y*NL7kS zAM1k$b|+X_M;yv4F4`c;Wln7jhssE3akA8E@s;>rB>g}~cl(Z8FIUV~1156Ds`cBf z$GrdY){hBK9l7A~il)@!)I6ua(;q&#%Ib z?N4EoM0qYfbeL=Lw+xKq?k!rp;@Y@o)5pRd5NMSrpIV?$$+8iuz1Oc@^{Ladd+j^? z+G5v3hPX!@loWK~XSoH8nyO;k5TG#M~?*4kE@#oS!D-?QVL zmsPY42Mw+a<{*1_z3naXYhMRb>r6@eh*VaG?ivbBl(8GGo_|(rzCH1>u_5^x_sZ-S zwrE}CK@ro}(Yf_xh4F^+Md{}Z4{G)#4?-uY1M}F{NP@yjRUge=KM8#Es$~O@d#djG zp;Mys-%X6oja}-jLlVJ?Nf&2~_sE08977A3ifiWdVrTyTOa0)!EDcaPy+KUYl8lp39`W0)L4BJJwDtM)2TJ+a=DQA*e&5#mJ)(R1^ zhfe8}lzbyL`bVvWx^nD~pzjn$B%oWUkMeR_YrZT})UyWX+2~&hyR( zc6^&(jVaMYBX0{8OL&-!mJhzrN{F5A;@q(8e|IjM%;R*Z(NIx}#n+V+iu9MsjL6;Sv#1pK_IB^aFka|#juJJv zC^x0z(vn%mC{uGd+%F5t_FUt?@CDIIt0YV!@kmKn@q}d>*WJBzqS$?RA%n{ITO>SZ zBPa^lXU~3$CyF4Few;{BL$l`jNw@1U36D^d2FAvZ9Le#Nb=J}mvyo2}NhZg>c7d2a zcSq^)(;(Ikn@*&B*u1U-_$Dz*qJdn*7WXh&mhs;S2VFH3Z6Ur@0(f?GPr7s~`I4SP z3Xyc)Q$ZFojM@{6A0b2~56cBFlJIE#bFz=ho$BqgPv(H*2lrOPgw(XcoLldqsU(Oo z5{~2{q-%Z#v>~M3ez1^aCS%Rnh0p}Qlr1KPZwm8P(--6k&6)BP0n@Z+tQ+80}bqq;03Wd17O z7AhmPpeWrS5#^g9W3#p-znUO^WzHbBZkAJi&X)1ol2y2cg8*w8h3egDC9yQiPW96G zaQ5nY{n=SC7gyI6(bO8|Q`_7xZ3ST|WagdJE)w@b)E2-~YqXvGCubV=q@KqM@a*Nn zn0B;NY7*_yIWDZV6(q&+{qz372e#qW`lV6CS$;34?tCOmlPHU!Zt|a?uxdXq5g%N| zDvX+EKU0>UTKFPyezBCQpn-?hc0asjSm;{JM?WVi6Dtk~6nVqDyI7>P9(9g|rPcRd zo^Xk*T68ezU(yyof%h$Bj*|__1?;a0mTwYJxzEIQ6 zZbJJ?2b5LD=-}?We#46@)p@hqNcj~XW z$Bw!;atnM-Xf!?RL%r8fb(x&Ce6~$j{4Diui}rd*-(v&CD;F6@HFb>CGA1J$Y8XG+ zDDWRPj|5Fi3n~fQM(k7@Kp{8W|9E^p(3xiNC&IoIPDPZgGIT2F3LO}U>)Wpvzp=r;P!U-mE>+fcT!X?X5(m-9&S znd^Fa8A@+C*yayb$6uzej9C}*C*?YNh&BrdG`UMKB!XUP%8U7Rp3*%C3A|8hUA~38Lf@xRkYr*39ByWb#YJdP${)4=a84!?le3nkNoMICkv0Bs(tf z4(x09`3K51)RZZSb~&|eB~i>9es)nPov~XL?lD&6{%22F$vhJ*pOU`5I)6~L)wr>p zVHh`pA_}adhDyGX0moryQV684hcnn3u0-^0=;?c1?;pQI8c}zIzqq zmnnM04ZARHgDI3co z>z9$er|l>T7nu*aUMs!Ajd{A(eTqT*@}YbkoVtnJ5BvPB`YEzaLy_@7)P1qJUFuwh zZ#Vx6OWz=pliF2$-ft@W&T`MDtd->*TR%fEfAfX)8(*tVzF?(bfNwYO{vYNT~SbSy_B zeYpDyglU)cU4Pq24m2HHxv&jkZ3tPoet-HE2a%>*sCsPgYnW>Cc{ij?MqF!t&1X7o z<5~AKTKZ0hAydwjbZh6fIO^KC$#H>^7FizDv#O4ZqU|d3J)nKEIcJfIxZb1>vmg|UfS~E|QIgN$|XrC$Yy(vr%Z;5VWd~js~uC4GcQ8wO0UOuYe1H(q2L0_ zA9PZdw!(>YsT+bQxm8r!S!F>dKFZj!6sAEkO~$C??{S>3T8)iMGly-7y!W>;GMBva8{V49pmOi4>6egVumXUr=<)-Gw#>vE! z*__oOJ!hF7c*$3tASTOo?k}lDo1YxZ`mDgj$7mSSXrHf*&T+*}EhD ziln5v-1SB64IUNJ2Lg-(4xX0JIfAELE5@jhx#-I@e!~-EOvxs0(u<)!7)QgNLJ5)F zZrjqy(gZ!~%lec*>btzhTDRC5gK3@i`cCqDbB2Iz1*X-sh#l?E3_kLOscT(e8I+SN z6bdb~qx_5_Nz)shx@4qpWHNnew9qEaDW$W%$I(0xso#`SRA2wkl~E>UR^}lqG9y39 z__v|dVV)1G?)$ZhGT3Ihv={TEwV4z!+hv&)c`4%QG$n{xD)J?>5dr34Mixe0p<)3M zEymtk#r$Oz5_hf&50bu&3!vhi1Z&G1FEyO!aF#^VpJU7DwO$=F31hLg;c#viV!!^( zC0tlcNFwNSOD5yjFe%Zy6i}DD5jQ}>XBw2wt?g>fnZ^k|NbOHI-#Hhh(MbBJ=Vn#n zQe`40d)<*(mil$bgMRoOj}c2Q6z7+r4C2#Q)Wheic5(z*HlZqaGFhd_`Knna6Jy-d zb?xqVgr6W0A?tIgNRZiX5rJw^xVT1fjy@cJ53yD_8;hT}|XlMT}I${EZbvg5K51a850atHr3K0lSY_+XXwU zq{Z|&QJBg2cwL?Q=+nx$%a30heT*dI%zXVd^p#f4WKpFbuUo0fo>wUL=`!$18Tk`1 z75Re+=dimuviT+`u{BV}lk4|epV&`)7ee!t+AJ*Wkxrzl=5=H^c+4MuPjT>Y9(gC5 z(;jx1Ofyx;sXBhMkxUT_x-K-|I3;JQ2PE}09#4j)y@r!BVPf8DhGf~ z%14?}#cXwy33yuf{0Rsf2V{|Prp3tQS z@S@aJ4BRfLt6a2l2TT972T2=&O(9@Y6bc1K%D})V1Qd)wAixNjKVP_UGy+1v0OK$O z8vnv!VKPX(9%ql!<0MK3I0y7dfaismfIUv)@xR*w=lFO)TwILbV?$+tu_HasFYX-Y z`*++g3=rq1ADqNte&TR><8(M57&r#+2k#Hi{fvjh;&MhpF?hS**W#BRhyhU6@HXZk za~$F8Cv^<@TOAxx#V|6!H>&=kgyHUhx~l_l=XE{ZZ1l0-U^@p_TTiT)n~$dr7HkdN zZdVW#2DWvu@jkl3>ug-C-0`>X|4|=?%KCqn2G|yB2RH%>fWY3vmzCttQji2}{zc%K ze?TsP1(c8sj^O6yZe@e@v~sn_g5)5;p#YXs1rGco92%x@+cm` zC+aA9f&q*$2P9z(eWX0P9RzduQ3L`6LC6|GxPl!m2myjPN`i1x;YSNeSOWA>Ai@}o z;2H+Z&m6bEeijjMir);sO4!E7(-UZX_#J~UY+S)QxMF{8Dt9+`oP(dQ{}N!)zwOw6 znXbQeZk!VGf4A)Ou0YM>+VQV;DyjC9m1=9{>WypjUSLxg?g^m>a9R!A3|$>?+XM`7 zTmjX;%>&0n{Yg6|WTI?cjs)9*|J4BmVcY?B z{iTD;V2*boK6_k;L;&gIj^F$t(Z^%Rz>vs4aTpA+0{^u|LC}BV(17=2 zI0y!KwjI-Zol9USwgtqkP&8X%xB=kdw5Kt)aH2E(Mutgou1p@_sj^SjWkU!=j14TiO+X6TgP^`EEH(zg0D}W~L zi6=wrI|Kk_iw20Sopk-D(HW$ C!q+JP diff --git a/resources/wiki/xmc4400-X1-X2.csv b/resources/wiki/xmc4400-X1-X2.csv deleted file mode 100644 index f1c06b80..00000000 --- a/resources/wiki/xmc4400-X1-X2.csv +++ /dev/null @@ -1,74 +0,0 @@ -Additional pins for port X1,,,,, -Description,Pin,Port,,X1 pin,Other - GPIO / ETH_LED,25, P2.10,, X1-37, - GPIO / ETH_TXDO / PWM80-32,26, P2.8,, X1-35, - GPIO / ETH_RXER,27, P2.4,, X1-33, - GPIO / ETH_RXDO,28, P2.2,, X1-31, - GPIO / ETH_MDIO / PWM81-21,29, P2.0,, X1-29, - PWM80-13 / GPIO4_2GO_2,30, P2.6,, X1-27, - GPIO / RST,31, P5.2,, X1-25, - GPIO1_2GO_1,32, P5.0,, X1-23, - GPIO / IO_1,7, P1.14,, X1-21,IOL-8 - GPIO / CAN_TX,33, P1.12,, X1-19, - GPIO / GPIO2_2GO_1,34, P1.10,, X1-17, - GPIO / QSPI_IO1,35, P1.4,, X1-15, - GPIO / QSPI_IO3,36, P1.2,, X1-13, - GPIO / External INT 0,2, P1.0,, X1-11,IOL-3 - SPI-SCK / GPIO,13, P1.8,, X1-9,IOH-6 - GPIO / IO_0,4, P1.6,, X1-7,IOL-5 - GPIO / GPIO2_2GO_2,37, P4.0,, X1-5, - TX,1, P2.14,, X1-3,IOL-2 - RX,0, P2.15,, X1-4,IOL-1 - GPIO / IO_2,8, P4.1,, X1-6,IOH-1 - GPIO / SPI_CS_2GO_2,38, P1.7,(Chip Select - Slot 2), X1-8, - SPI-MOSI,11, P1.9,, X1-10,IOH-4 - GPIO1_2GO_2,39, P1.1,, X1-12, - GPIO / QSPI_IO3,40, P1.3,, X1-14, - GPIO / QSPI_IO0,41, P1.5,, X1-16, - GPIO / QSPI_CS,42, P1.11,, X1-18, - GPIO / CAN_RX,43, P1.13,, X1-20, - USB Debug RX,23, P1.15,, X1-22, - GPIO / ETH_INT,44, P5.1,, X1-24, - PWM81-02,45, P5.7,, X1-26, - PWM80-03 / ETH_MDC,46, P2.7,, X1-28, -" SWV """"DEBUG Do NOT Use **",47, P2.1,, X1-30, - AREF TODO: / ETH_RXD1 / PWM41-2,14, P2.3,, X1-32,IOH-8 - I2C Data / Address SDA / A4 / PWM41-0,15, P2.5,(Hardwired to A4), X1-34,IOH-9 - PWM80-22 / ETH_TXD1,48, P2.9,, X1-36, - A16 / ETH_CLK,49, P15.8,, X1-38, -Additional pins for port X2,,,,, -Description,Pin,Port,,X1 pin,Other - A14 / DAC 0 Output,50, P14.8,, X2-33, - A3 / ADC Input,20, P14.3,(INPUT ONLY), X2-31,Analog-4 -A11 - ADC Input,52, P14.15,(INPUT ONLY), X2-29, - A17 - ADC Input / ETH_CRS,53, P15.9,, X2-27, - A6 / AN1_2GO_1 - ADC Input,54, P14.6,(INPUT ONLY), X2-25, -A8 / AN1_2GO_2 - ADC Input,55, P14.12,(INPUT ONLY), X2-23, -A10 / ADC Input,56, P14.14,(INPUT ONLY), X2-21, - I2C Clock SCL / A5 - ADC Input,16, P3.0,(Hardwired to A5), X2-19,IOH-10 - BUTTON2,57, P3.2,, X2-17, - INT / GPIO3_2GO_1,58, P0.10,, X2-15, - INT,59, P0.1,, X2-13, - INT / GPIO3_2GO_2,60, P0.3,, X2-11, - USB Debug TX,24, P0.5,, X2-9, - PWM80-31 output / PWM3,9, P0.11,, X2-7,IOH-2 - PWM42-3 output / PWM1,5, P3.3,, X2-5,IOL-6 - CS_2GO_1,61, P3.5,(Chip Select - Slot 1), X2-3, - LED2,62, P0.7,, X2-1, - QSPI_CLK,63, P0.8,, X2-4, - PWM42-0 / PWM0 / External INT 1,3, P3.6,, X2-6,IOL-4 - PWM42-2 output / PWM2,6, P3.4,, X2-8,IOL-7 - CS_MB,64, P0.12,(Chip Select - MikroBUS), X2-10, - LED1,65, P0.6,, X2-12, - ETH_TXEN,66, P0.4,, X2-14, - SPI-SS / PWM80-01 / PWM4,10, P0.2,, X2-16,IOH-3 - SPI-MISO,12, P0.0,, X2-18,IOH-5 - GPIO4_2GO_1 / PWM80-12 / PWM,67, P0.9,, X2-20, - BUTTON1,68, P3.1,, X2-22, - A4 / ADC Input / SDA / GPIO,21, P14.4,(Hardwired to SDA), X2-24,Analog-5 - A9 / AN2_2GO_2 - ADC Input,69, P14.13,(INPUT ONLY), X2-26, - A7 / AN2_2GO_1 - ADC Input,70, P14.7,(INPUT ONLY), X2-28, - A5 / ADC Input / SCL,22, P14.5,(Hardwired to SCL), X2-30,Analog-6 - A12 - ADC Input,51, P15.2,(INPUT ONLY), X2-32, - A13 - ADC Input,71, P15.3,(INPUT ONLY), X2-34, - A15 / DAC 1 Output,72, P14.9,, X2-36, diff --git a/resources/wiki/xmc4700-X1-X2.csv b/resources/wiki/xmc4700-X1-X2.csv index d8b7e7b2..f404d588 100644 --- a/resources/wiki/xmc4700-X1-X2.csv +++ b/resources/wiki/xmc4700-X1-X2.csv @@ -62,5 +62,5 @@ PWM43-3 / PWM19,91,P6.2,14 SPI_3 SCLK,93,P0.8,10 ,94,P3.3,8 PWM40-0 / PWM20,95,P0.15,6 -PWM40-3 / PWM22,96,P0.12,4 -ECAT0.P1_LINK_ACT,97,P3.12,2 +PWM40-3 / PWM22,96,P0.12,4, +ECAT0.P1_LINK_ACT,97,P3.12,2,YES Pin 23 From 6175df3eb076298dd0355b2dbcb3a268749c2f0d Mon Sep 17 00:00:00 2001 From: Paul Carpenter Date: Sun, 14 Aug 2022 16:32:38 +0100 Subject: [PATCH 67/78] Paultech Wiki Update X1 and X2 files Update wiki for CSV files reources on XMC4 series X1 and X2 connector listings --- resources/readme.md | 6 +-- resources/wiki/xmc4200-X1-X2.csv | 75 ++++++++++++++++++++++++++++++++ resources/wiki/xmc4400-X1-X2.csv | 74 +++++++++++++++++++++++++++++++ resources/wiki/xmc4700-X1-X2.csv | 4 +- 4 files changed, 154 insertions(+), 5 deletions(-) create mode 100644 resources/wiki/xmc4200-X1-X2.csv create mode 100644 resources/wiki/xmc4400-X1-X2.csv diff --git a/resources/readme.md b/resources/readme.md index c36c46e0..3ee0be25 100644 --- a/resources/readme.md +++ b/resources/readme.md @@ -5,9 +5,9 @@ and images for wiki. ### folder wiki contains -xmc4700-X1-X2.csv XMC4700 Relax Kit (and Lite) CSV of X1 and X2 connector pinout - -xmc4400-X1-X2.csv XMC4400 Platform 2 Go CSV of X1 and X2 connector pinout +- xmc4200-X1-X2.csv XMC4200 Platform 2 Go CSV of X1 and X2 connector pinout +- xmc4400-X1-X2.csv XMC4400 Platform 2 Go CSV of X1 and X2 connector pinout +- xmc4700-X1-X2.csv XMC4700 Relax Kit (and Lite) CSV of X1 and X2 connector pinout ### Folder wiki/Pictures diff --git a/resources/wiki/xmc4200-X1-X2.csv b/resources/wiki/xmc4200-X1-X2.csv new file mode 100644 index 00000000..ffb054d2 --- /dev/null +++ b/resources/wiki/xmc4200-X1-X2.csv @@ -0,0 +1,75 @@ +Additional pins for port X1,,,,, +Description,Pin,Port,,X1 pin,Other +NC,,,,X1-37, +IO_1,7,P2.8,,X1-35,IOL-8 +PWM41-1 output / PWM2,6,P2.4,,X1-33,IOL-7 +PWM41-3 / PWM0 / External INT 1,3,P2.2,,X1-31,IOL-4 +CAN_TX,29,P2.0,,X1-29, +IO_2,8,P2-6,,X1-27,IOH-1 +NC,,,,X1-25, +NC,,,,X1-23, +NC,,,,X1-21, +NC,,,,X1-19, +NC,,,,X1-17, +USB Debug TX,35,P1.4,,X1-15, +PWM / PWM40-1 / GPIO4_S2GO_1,23,P1.2,,X1-13, +GPIO / External INT 0,2,P1.0,,X1-11,IOL-3 +SPI-SCK,13,P1.8,,X1-9,IOH-6 +NC,,,,X1-7, +NC,,,,X1-5, +TX,1,P2.14,,X1-3,IOL-2 +RX,0,P2.15,,X1-4,IOL-1 +NC,,,,X1-6, +SPI-CS,10,P1.7,,X1-8,IOH-3 +SPI-MOSI,11,P1.9,,X1-10,IOH-4 +PWM_MikroBus / PWM40-2,22,P1.1,,X1-12, +PWM / PWM40-0 / GPIO4_2GO_2,24,P1.3,,X1-14, +USB Debug RX,41,P1.5,,X1-16, +NC,,,,X1-18, +NC,,,,X1-20, +BUTTON1,27,P1.15,Button,X1-22,Switch +NC,,,,X1-24, +NC,,,,X1-26, +RST_MikroBus,28,P2.7,,X1-28, +GPIO1_2GO_2,30,P2.1,,X1-30, +PWM41-2 output / PWM1,5,P2.3,,X1-32,IOL-6 +I2C Data / Address SDA / A4,14,P2.5,(Hardwired to A4),X1-34,IOH-9 +IO_0,4,P2.9,,X1-36,IOL-5 +NC,,,,X1-38, +Additional pins for port X2,,,,, +Description,Pin,Port,,X2 pin,Other +A3 / ADC Input / AN_MikroBus / DAC0,19,P14.8,,X2-33,Analog-4 +NC,,,,X2-31, +NC,,,,X2-29, +NC,,,,X2-27, +A1 / ADC Input,17,P14.6,(INPUT ONLY),X2-25,Analog-2 +NC,,,,X2-23, +AN2_2GO_1 / A6 / ADC Input,41,P14.14,(INPUT ONLY),X2-21, +I2C Clock SCL / A5 - ADC Input,15,P3.0,(Hardwired to A5),X2-19,IOH-10 +NC,,,,X2-17, +INT_MikroBus,38,P0.10,,X2-15, +LED1,36,P0.1,,X2-13,LED +INT / GPIO3_2GO_2,34,P0.3,,X2-11, +INT / GPIO3_2GO_1,33,P0.5,,X2-9, +PWM80-31 output / PWM3,9,P0.11,,X2-7,IOH-2 +NC,,,,X2-5, +NC,,,,X2-3, +SPI-CS_MikroBus,31,P0.7,,X2-1, +RST / GPIO2_2GO_1,32,P0.8,,X2-4, +NC,,,,X2-6, +NC,,,,X2-8, +NC,,,,X2-10, +RST / GPIO2_2GO_2,35,P0.6,,X2-12, +GPIO1_S2GO_1,37,P0.4,,X2-14, +SPI-CS_2GO_1,39,P0.2,,X2-16, +SPI-MISO,12,P0.0,,X2-18,IOH-5 +SPI-CS_2GO_2,40,P0.9,,X2-20, +NC,,,,X2-22, +A4 / ADC Input / SDA / AN1_2GO_1,20,P14.4,(Hardwired to SDA),X2-24,Analog-5 +NC,,,,X2-26, +A2 / ADC Input,18,P14.7,(INPUT ONLY),X2-28,Amalog-3 +A5 / ADC Input / SCL / AN2_2GO_2,21,P14.5,(Hardwired to SCL),X2-30,Analog-6 +CAN_RX,42,P14.3,(INPUT ONLY),X2-32, +A0 / ADC Input,16,P14.0,Potentiometer,X2-34,Analog-1 +AN1_2GO_2 / A7 / ADC Input / DAC1,43,P14.9,,X2-36, +AREF,,,,X2-38,IOH-8 diff --git a/resources/wiki/xmc4400-X1-X2.csv b/resources/wiki/xmc4400-X1-X2.csv new file mode 100644 index 00000000..1111bec8 --- /dev/null +++ b/resources/wiki/xmc4400-X1-X2.csv @@ -0,0 +1,74 @@ +Additional pins for port X1,,,,, +Description,Pin,Port,,X1 pin,Other +GPIO / ETH_LED,25,P2.10,,X1-37, +GPIO / ETH_TXDO / PWM80-32,26,P2.8,,X1-35, +GPIO / ETH_RXER,27,P2.4,,X1-33, +GPIO / ETH_RXDO,28,P2.2,,X1-31, +GPIO / ETH_MDIO / PWM81-21,29,P2.0,,X1-29, +PWM80-13 / GPIO4_2GO_2,30,P2.6,,X1-27, +GPIO / RST,31,P5.2,,X1-25, +GPIO1_2GO_1,32,P5.0,,X1-23, +GPIO / IO_1,7,P1.14,,X1-21,IOL-8 +GPIO / CAN_TX,33,P1.12,,X1-19, +GPIO / GPIO2_2GO_1,34,P1.10,,X1-17, +GPIO / QSPI_IO1,35,P1.4,,X1-15, +GPIO / QSPI_IO3,36,P1.2,,X1-13, +GPIO / External INT 0,2,P1.0,,X1-11,IOL-3 +SPI-SCK / GPIO,13,P1.8,,X1-9,IOH-6 +GPIO / IO_0,4,P1.6,,X1-7,IOL-5 +GPIO / GPIO2_2GO_2,37,P4.0,,X1-5, +TX,1,P2.14,,X1-3,IOL-2 +RX,0,P2.15,,X1-4,IOL-1 +GPIO / IO_2,8,P4.1,,X1-6,IOH-1 +GPIO / SPI_CS_2GO_2,38,P1.7,(Chip Select - Slot 2),X1-8, +SPI-MOSI,11,P1.9,,X1-10,IOH-4 +GPIO1_2GO_2,39,P1.1,,X1-12, +GPIO / QSPI_IO3,40,P1.3,,X1-14, +GPIO / QSPI_IO0,41,P1.5,,X1-16, +GPIO / QSPI_CS,42,P1.11,,X1-18, +GPIO / CAN_RX,43,P1.13,,X1-20, +USB Debug RX,23,P1.15,,X1-22, +GPIO / ETH_INT,44,P5.1,,X1-24, +PWM81-02,45,P5.7,,X1-26, +PWM80-03 / ETH_MDC,46,P2.7,,X1-28, +"SWV **DEBUG Do NOT Use**",47,P2.1,,X1-30, +ETH_RXD1 / PWM41-2,14,P2.3,,X1-32,IOH-8 +I2C Data / Address SDA / A4 / PWM41-0,15,P2.5,(Hardwired to A4),X1-34,IOH-9 +PWM80-22 / ETH_TXD1,48,P2.9,,X1-36, +A16 / ETH_CLK,49,P15.8,,X1-38, +Additional pins for port X2,,,,, +Description,Pin,Port,,X2 pin,Other +A14 / DAC 0 Output,50,P14.8,,X2-33, +A3 / ADC Input,20,P14.3,(INPUT ONLY),X2-31,Analog-4 +A11 - ADC Input,52,P14.15,(INPUT ONLY),X2-29, +A17 - ADC Input / ETH_CRS,53,P15.9,,X2-27, +A6 / AN1_2GO_1 - ADC Input,54,P14.6,(INPUT ONLY),X2-25, +A8 / AN1_2GO_2 - ADC Input,55,P14.12,(INPUT ONLY),X2-23, +A10 / ADC Input,56,P14.14,(INPUT ONLY),X2-21, +I2C Clock SCL / A5 - ADC Input,16,P3.0,(Hardwired to A5),X2-19,IOH-10 +BUTTON2,57,P3.2,,X2-17, +INT / GPIO3_2GO_1,58,P0.10,,X2-15, +INT,59,P0.1,,X2-13, +INT / GPIO3_2GO_2,60,P0.3,,X2-11, +USB Debug TX,24,P0.5,,X2-9, +PWM80-31 output / PWM3,9,P0.11,,X2-7,IOH-2 +PWM42-3 output / PWM1,5,P3.3,,X2-5,IOL-6 +CS_2GO_1,61,P3.5,(Chip Select - Slot 1),X2-3, +LED2,62,P0.7,,X2-1, +QSPI_CLK,63,P0.8,,X2-4, +PWM42-0 / PWM0 / External INT 1,3,P3.6,,X2-6,IOL-4 +PWM42-2 output / PWM2,6,P3.4,,X2-8,IOL-7 +CS_MB,64,P0.12,(Chip Select - MikroBUS),X2-10, +LED1,65,P0.6,,X2-12, +ETH_TXEN,66,P0.4,,X2-14, +SPI-SS / PWM80-01 / PWM4,10,P0.2,,X2-16,IOH-3 +SPI-MISO,12,P0.0,,X2-18,IOH-5 +GPIO4_2GO_1 / PWM80-12 / PWM,67,P0.9,,X2-20, +BUTTON1,68,P3.1,,X2-22, +A4 / ADC Input / SDA / GPIO,21,P14.4,(Hardwired to SDA),X2-24,Analog-5 +A9 / AN2_2GO_2 - ADC Input,69,P14.13,(INPUT ONLY),X2-26, +A7 / AN2_2GO_1 - ADC Input,70,P14.7,(INPUT ONLY),X2-28, +A5 / ADC Input / SCL,22,P14.5,(Hardwired to SCL),X2-30,Analog-6 +A12 - ADC Input,51,P15.2,(INPUT ONLY),X2-32, +A13 - ADC Input,71,P15.3,(INPUT ONLY),X2-34, +A15 / DAC 1 Output,72,P14.9,,X2-36, diff --git a/resources/wiki/xmc4700-X1-X2.csv b/resources/wiki/xmc4700-X1-X2.csv index f404d588..d8b7e7b2 100644 --- a/resources/wiki/xmc4700-X1-X2.csv +++ b/resources/wiki/xmc4700-X1-X2.csv @@ -62,5 +62,5 @@ PWM43-3 / PWM19,91,P6.2,14 SPI_3 SCLK,93,P0.8,10 ,94,P3.3,8 PWM40-0 / PWM20,95,P0.15,6 -PWM40-3 / PWM22,96,P0.12,4, -ECAT0.P1_LINK_ACT,97,P3.12,2,YES Pin 23 +PWM40-3 / PWM22,96,P0.12,4 +ECAT0.P1_LINK_ACT,97,P3.12,2 From c1a164f6ae8fd530c13cfd623ecbbf4d7d763929 Mon Sep 17 00:00:00 2001 From: Paul Carpenter Date: Sat, 27 Aug 2022 12:26:16 +0100 Subject: [PATCH 68/78] Admin Date change glitch --- variants/XMC4200/XMC4200.h | 0 variants/XMC4200/linker_script.ld | 0 variants/XMC4200/startup_XMC4200.S | 0 variants/XMC4200/system_XMC4200.c | 0 variants/XMC4200/system_XMC4200.h | 0 5 files changed, 0 insertions(+), 0 deletions(-) mode change 100755 => 100644 variants/XMC4200/XMC4200.h mode change 100755 => 100644 variants/XMC4200/linker_script.ld mode change 100755 => 100644 variants/XMC4200/startup_XMC4200.S mode change 100755 => 100644 variants/XMC4200/system_XMC4200.c mode change 100755 => 100644 variants/XMC4200/system_XMC4200.h diff --git a/variants/XMC4200/XMC4200.h b/variants/XMC4200/XMC4200.h old mode 100755 new mode 100644 diff --git a/variants/XMC4200/linker_script.ld b/variants/XMC4200/linker_script.ld old mode 100755 new mode 100644 diff --git a/variants/XMC4200/startup_XMC4200.S b/variants/XMC4200/startup_XMC4200.S old mode 100755 new mode 100644 diff --git a/variants/XMC4200/system_XMC4200.c b/variants/XMC4200/system_XMC4200.c old mode 100755 new mode 100644 diff --git a/variants/XMC4200/system_XMC4200.h b/variants/XMC4200/system_XMC4200.h old mode 100755 new mode 100644 From 7d2d8ccc292f58fde860e0432b16905f3545f363 Mon Sep 17 00:00:00 2001 From: Paul Carpenter Date: Sat, 30 Jul 2022 00:23:08 +0100 Subject: [PATCH 69/78] Revert "Improve GPIO Reset" This reverts commit 66c337a9135d4b586d7aa117acb740dbcbda93fe. --- cores/Main.cpp | 2 +- cores/reset.c | 2 +- .../config/XMC1100_Boot_Kit/pins_arduino.h | 55 +++++++++---------- .../config/XMC1400_Arduino_Kit/pins_arduino.h | 35 ++++++------ 4 files changed, 43 insertions(+), 51 deletions(-) diff --git a/cores/Main.cpp b/cores/Main.cpp index 39abd394..8fa41c7a 100644 --- a/cores/Main.cpp +++ b/cores/Main.cpp @@ -43,7 +43,7 @@ wiring_time_init(); wiring_analog_init(); // Initialize the reset pin for the XMC1100 Boot Kit series and XMC1400 Kit for Arduino as they are based on Arduino form-factor // Hence, a dedicated reset pin is required. -#ifdef HAS_GPIO_RESET +#if defined(XMC1100_Boot_Kit) || defined(XMC1400_Arduino_Kit) reset_init(); #endif diff --git a/cores/reset.c b/cores/reset.c index e243ed41..172171af 100644 --- a/cores/reset.c +++ b/cores/reset.c @@ -26,7 +26,7 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #include -#ifdef HAS_GPIO_RESET +#if defined(XMC1100_Boot_Kit) || defined(XMC1400_Arduino_Kit) #include #include diff --git a/variants/XMC1100/config/XMC1100_Boot_Kit/pins_arduino.h b/variants/XMC1100/config/XMC1100_Boot_Kit/pins_arduino.h index 73973ecf..032163a7 100644 --- a/variants/XMC1100/config/XMC1100_Boot_Kit/pins_arduino.h +++ b/variants/XMC1100/config/XMC1100_Boot_Kit/pins_arduino.h @@ -54,9 +54,6 @@ extern const uint8_t NUM_ANALOG_INPUTS; // Indicate unit has RTC/Alarm for simpler RTC control #define HAS_RTC -// Indicate variant has a GPIO pin used for Reset pin -#define HAS_GPIO_RESET 1 - // Defines will be either set by ArduinoIDE in the menu or manually #ifdef SERIAL_HOSTPC // Comment out following line to use Serial on pins (board) @@ -68,8 +65,7 @@ extern const uint8_t NUM_ANALOG_INPUTS; #define SERIAL_DEBUG 1 #endif -// Generate 490Hz @fCCU=1MHz -#define PWM4_TIMER_PERIOD (2041U) +#define PWM4_TIMER_PERIOD (2041U) // Generate 490Hz @fCCU=1MHz #define PCLK 64000000u @@ -92,23 +88,21 @@ extern uint8_t SCK; #define A6 6 #define A7 7 -// AD_AUX Connector -#define AD_AUX_1 23 -#define AD_AUX_2 24 -// AUX Connector -#define AUX_1 25 -#define AUX_2 26 -#define AUX_3 27 -#define AUX_4 28 -#define AUX_5 29 - -#define LED_BUILTIN 13 -#define LED1 25 -#define LED2 26 -#define LED3 0 -#define LED4 1 -#define LED5 2 -#define LED6 30 +#define AD_AUX_1 24 // AD_AUX +#define AD_AUX_2 25 // AD_AUX +#define AUX_1 26 // AUX +#define AUX_2 27 // AUX +#define AUX_3 28 // AUX +#define AUX_4 29 // AUX +#define AUX_5 30 // AUX + +#define LED_BUILTIN 13 // Standard Arduino LED pin 13 +#define LED1 26 // Extended LEDs P0.5 +#define LED2 27 // Extended LEDs P0.6 +#define LED3 0 // Extended LEDs P1.2 +#define LED4 1 // Extended LEDs P1.3 +#define LED5 2 // Extended LEDs P1.4 +#define LED6 31 // Extended LEDs P1.5 #define digitalPinToInterrupt(p) ((p) == 2 ? 0 : ((p) == 3 ? 1 : NOT_AN_INTERRUPT)) @@ -139,14 +133,15 @@ const XMC_PORT_PIN_t mapping_port_pin[] = /* 20 */ {XMC_GPIO_PORT2, 10},// A3 / ADC Input P2.10 /* 21 */ {XMC_GPIO_PORT2, 11},// A4 / ADC Input P2.11 /* 22 */ {XMC_GPIO_PORT2, 2}, // A5 / ADC Input P2.2 (INPUT ONLY) - /* 23 */ {XMC_GPIO_PORT2, 5}, // AD_AUX P2.5 (INPUT ONLY) - /* 24 */ {XMC_GPIO_PORT2, 7}, // AD_AUX P2.7 (INPUT ONLY) - /* 25 */ {XMC_GPIO_PORT0, 5}, // AUX / GPIO / LED 1 output P0.5 - /* 26 */ {XMC_GPIO_PORT0, 6}, // AUX / GPIO / LED 2 output P0.6 - /* 27 */ {XMC_GPIO_PORT0, 10},// AUX / GPIO P0.10 - /* 28 */ {XMC_GPIO_PORT0, 11},// AUX / GPIO P0.11 - /* 29 */ {XMC_GPIO_PORT0, 13},// AUX / GPIO P0.13 - /* 30 */ {XMC_GPIO_PORT1, 5} // LED 6 output P1.5 + /* 23 */ {XMC_GPIO_PORT2, 4}, // RESET input ( DO NOT USE as GPIO ) P2.4 (INPUT ONLY) + /* 24 */ {XMC_GPIO_PORT2, 5}, // AD_AUX P2.5 (INPUT ONLY) + /* 25 */ {XMC_GPIO_PORT2, 7}, // AD_AUX P2.7 (INPUT ONLY) + /* 26 */ {XMC_GPIO_PORT0, 5}, // AUX / GPIO / LED 1 output P0.5 + /* 27 */ {XMC_GPIO_PORT0, 6}, // AUX / GPIO / LED 2 output P0.6 + /* 28 */ {XMC_GPIO_PORT0, 10},// AUX / GPIO P0.10 + /* 29 */ {XMC_GPIO_PORT0, 11},// AUX / GPIO P0.11 + /* 30 */ {XMC_GPIO_PORT0, 13},// AUX / GPIO P0.13 + /* 31 */ {XMC_GPIO_PORT1, 5} // LED 6 output P1.5 }; const uint8_t GND = ( sizeof( mapping_port_pin ) / sizeof( XMC_PORT_PIN_t ) ); const uint8_t NUM_DIGITAL = ( sizeof( mapping_port_pin ) / sizeof( XMC_PORT_PIN_t ) );; diff --git a/variants/XMC1400/config/XMC1400_Arduino_Kit/pins_arduino.h b/variants/XMC1400/config/XMC1400_Arduino_Kit/pins_arduino.h index 538d7721..497ff15b 100644 --- a/variants/XMC1400/config/XMC1400_Arduino_Kit/pins_arduino.h +++ b/variants/XMC1400/config/XMC1400_Arduino_Kit/pins_arduino.h @@ -54,9 +54,6 @@ extern const uint8_t NUM_ANALOG_INPUTS; // Indicate unit has RTC/Alarm #define HAS_RTC 1 -// Indicate variant has a GPIO pin used for Reset pin -#define HAS_GPIO_RESET 1 - // Defines will be either set by ArduinoIDE in the menu or manually #ifdef SERIAL_HOSTPC // Comment out following line to use Serial on pins (board) @@ -95,17 +92,17 @@ extern const uint8_t NUM_ANALOG_INPUTS; #define AD_AUX_3 8 // AD_AUX #define AD_AUX_4 9 // AD_AUX -#define AUX_1 25 // AUX +#define AUX_1 26 // AUX #define LED1 13 #define LED2 2 -#define LED3 26 +#define LED3 27 #define LED_BUILTIN LED1 #define EXT_INTR_0 3 -#define EXT_INTR_1 25 +#define EXT_INTR_1 26 -#define digitalPinToInterrupt(p) ((p) == 3 ? 0 : ((p) == 25 ? 1 : NOT_AN_INTERRUPT)) +#define digitalPinToInterrupt(p) ((p) == 3 ? 0 : ((p) == 26 ? 1 : NOT_AN_INTERRUPT)) /* Mapping interrupt handlers. Notice that XMC1400 can have interrupt handlers working in 3 modes, the defines below assumes the mode A. For details refer to assembly file and reference manual. @@ -131,8 +128,7 @@ extern const uint8_t NUM_ANALOG_INPUTS; #define ERU0_0_IRQHandler IRQ3_Handler // RESET #define ERU0_0_IRQn IRQ3_IRQn -#ifdef ARDUINO_MAIN -//index is Arduino pin count +#ifdef ARDUINO_MAIN //index is arduino pin count // Mapping of digital pins and comments const XMC_PORT_PIN_t mapping_port_pin[] = { @@ -157,12 +153,13 @@ const XMC_PORT_PIN_t mapping_port_pin[] = /* 18 */ {XMC_GPIO_PORT2 , 10}, // A3 / ADC Input P2.10 /* 19 */ {XMC_GPIO_PORT2 , 1}, // A4 / I2C Data / Address SDA P2.1 /* 20 */ {XMC_GPIO_PORT2 , 0}, // A5 / I2C Clock SCL P2.0 - /* 21 */ {XMC_GPIO_PORT2 , 11}, // GPIO / AD_AUX_1 Additional Pin P2.11 - /* 22 */ {XMC_GPIO_PORT2 , 7}, // GPIO / AD_AUX_2 Additional Pin P2.7 - /* 23 */ {XMC_GPIO_PORT2 , 5}, // GPIO / AD_AUX_3 Additional Pin P2.5 - /* 24 */ {XMC_GPIO_PORT2 , 2}, // GPIO / AD_AUX_4 Additional Pin P2.2 - /* 25 */ {XMC_GPIO_PORT1 , 4}, // External int 1 P1.4 - /* 26 */ {XMC_GPIO_PORT1 , 5} // LED3 output P1.5 + /* 21 */ {XMC_GPIO_PORT2 , 4}, // RESET input ( DO NOT USE as GPIO ) P2.4 (INPUT ONLY) + /* 22 */ {XMC_GPIO_PORT2 , 11}, // GPIO / AD_AUX_1 Additional Pin P2.11 + /* 23 */ {XMC_GPIO_PORT2 , 7}, // GPIO / AD_AUX_2 Additional Pin P2.7 + /* 24 */ {XMC_GPIO_PORT2 , 5}, // GPIO / AD_AUX_3 Additional Pin P2.5 + /* 25 */ {XMC_GPIO_PORT2 , 2}, // GPIO / AD_AUX_4 Additional Pin P2.2 + /* 26 */ {XMC_GPIO_PORT1 , 4}, // External int 1 P1.4 + /* 27 */ {XMC_GPIO_PORT1 , 5} // LED3 output P1.5 }; @@ -212,10 +209,10 @@ XMC_ADC_t mapping_adc[] = { VADC, 6, VADC_G0, 0, 7, DISABLED }, //A4 { VADC, 5, VADC_G0, 0, 10, DISABLED }, //A5 // Additional channels added here - { VADC, 4, VADC_G0, 0, 5, DISABLED }, //AUX 21 - { VADC, 1, VADC_G1, 1, 1, DISABLED }, //AUX 22 - { VADC, 7, VADC_G1, 1, 2, DISABLED }, //AUX 23 - { VADC, 7, VADC_G0, 0, 3, DISABLED } //AUX 24 + { VADC, 4, VADC_G0, 0, 5, DISABLED }, //AUX 22 + { VADC, 1, VADC_G1, 1, 1, DISABLED }, //AUX 23 + { VADC, 7, VADC_G1, 1, 2, DISABLED }, //AUX 24 + { VADC, 7, VADC_G0, 0, 3, DISABLED } //AUX 25 }; const uint8_t NUM_ANALOG_INPUTS = ( sizeof( mapping_adc ) / sizeof( XMC_ADC_t ) ); From 70a4adcc5b1a7efca0942e09afc58823a2aa5fa0 Mon Sep 17 00:00:00 2001 From: Paul Carpenter Date: Sun, 28 Aug 2022 17:23:03 +0100 Subject: [PATCH 70/78] Improve GPIO Reset Improve GPIO Reset pin maintainability for any new board added On XMC1400 Arduino Kit remove reset pin from pin mapping --- cores/Main.cpp | 2 +- cores/reset.c | 2 +- .../config/XMC1100_Boot_Kit/pins_arduino.h | 40 +++++++++++-------- .../config/XMC1400_Arduino_Kit/pins_arduino.h | 35 ++++++++-------- 4 files changed, 44 insertions(+), 35 deletions(-) diff --git a/cores/Main.cpp b/cores/Main.cpp index 8fa41c7a..39abd394 100644 --- a/cores/Main.cpp +++ b/cores/Main.cpp @@ -43,7 +43,7 @@ wiring_time_init(); wiring_analog_init(); // Initialize the reset pin for the XMC1100 Boot Kit series and XMC1400 Kit for Arduino as they are based on Arduino form-factor // Hence, a dedicated reset pin is required. -#if defined(XMC1100_Boot_Kit) || defined(XMC1400_Arduino_Kit) +#ifdef HAS_GPIO_RESET reset_init(); #endif diff --git a/cores/reset.c b/cores/reset.c index 172171af..e243ed41 100644 --- a/cores/reset.c +++ b/cores/reset.c @@ -26,7 +26,7 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #include -#if defined(XMC1100_Boot_Kit) || defined(XMC1400_Arduino_Kit) +#ifdef HAS_GPIO_RESET #include #include diff --git a/variants/XMC1100/config/XMC1100_Boot_Kit/pins_arduino.h b/variants/XMC1100/config/XMC1100_Boot_Kit/pins_arduino.h index 032163a7..6e43d49f 100644 --- a/variants/XMC1100/config/XMC1100_Boot_Kit/pins_arduino.h +++ b/variants/XMC1100/config/XMC1100_Boot_Kit/pins_arduino.h @@ -54,6 +54,9 @@ extern const uint8_t NUM_ANALOG_INPUTS; // Indicate unit has RTC/Alarm for simpler RTC control #define HAS_RTC +// Indicate variant has a GPIO pin used for Reset pin +#define HAS_GPIO_RESET 1 + // Defines will be either set by ArduinoIDE in the menu or manually #ifdef SERIAL_HOSTPC // Comment out following line to use Serial on pins (board) @@ -65,7 +68,8 @@ extern const uint8_t NUM_ANALOG_INPUTS; #define SERIAL_DEBUG 1 #endif -#define PWM4_TIMER_PERIOD (2041U) // Generate 490Hz @fCCU=1MHz +// Generate 490Hz @fCCU=1MHz +#define PWM4_TIMER_PERIOD (2041U) #define PCLK 64000000u @@ -88,21 +92,23 @@ extern uint8_t SCK; #define A6 6 #define A7 7 -#define AD_AUX_1 24 // AD_AUX -#define AD_AUX_2 25 // AD_AUX -#define AUX_1 26 // AUX -#define AUX_2 27 // AUX -#define AUX_3 28 // AUX -#define AUX_4 29 // AUX -#define AUX_5 30 // AUX - -#define LED_BUILTIN 13 // Standard Arduino LED pin 13 -#define LED1 26 // Extended LEDs P0.5 -#define LED2 27 // Extended LEDs P0.6 -#define LED3 0 // Extended LEDs P1.2 -#define LED4 1 // Extended LEDs P1.3 -#define LED5 2 // Extended LEDs P1.4 -#define LED6 31 // Extended LEDs P1.5 +// AD_AUX Connector +#define AD_AUX_1 24 +#define AD_AUX_2 25 +// AUX Connector +#define AUX_1 26 +#define AUX_2 27 +#define AUX_3 28 +#define AUX_4 29 +#define AUX_5 30 + +#define LED_BUILTIN 13 +#define LED1 26 +#define LED2 27 +#define LED3 0 +#define LED4 1 +#define LED5 2 +#define LED6 31 #define digitalPinToInterrupt(p) ((p) == 2 ? 0 : ((p) == 3 ? 1 : NOT_AN_INTERRUPT)) @@ -122,7 +128,7 @@ const XMC_PORT_PIN_t mapping_port_pin[] = /* 9 */ {XMC_GPIO_PORT0, 8}, // PWM40-2 output P0.8 /* 10 */ {XMC_GPIO_PORT0, 9}, // SPI-SS / PWM40-3 output P0.9 /* 11 */ {XMC_GPIO_PORT1, 1}, // SPI-MOSI / PWM40-1 output P1.1 - /* 12 */ {XMC_GPIO_PORT1, 0}, // SPI-MISO P1.0 + /* 12 */ {XMC_GPIO_PORT1, 0}, // SPI-MISO P1.0 /* 13 */ {XMC_GPIO_PORT0, 7}, // SPI-SCK / LED BUILTIN output P0.7 /* 14 */ {XMC_GPIO_PORT2, 3}, // AREF ** DO NOT USE as GPIO or REF ** P2.3 /* 15 */ {XMC_GPIO_PORT2, 1}, // I2C Data / Address SDA / A7 ADC P2.1 diff --git a/variants/XMC1400/config/XMC1400_Arduino_Kit/pins_arduino.h b/variants/XMC1400/config/XMC1400_Arduino_Kit/pins_arduino.h index 497ff15b..538d7721 100644 --- a/variants/XMC1400/config/XMC1400_Arduino_Kit/pins_arduino.h +++ b/variants/XMC1400/config/XMC1400_Arduino_Kit/pins_arduino.h @@ -54,6 +54,9 @@ extern const uint8_t NUM_ANALOG_INPUTS; // Indicate unit has RTC/Alarm #define HAS_RTC 1 +// Indicate variant has a GPIO pin used for Reset pin +#define HAS_GPIO_RESET 1 + // Defines will be either set by ArduinoIDE in the menu or manually #ifdef SERIAL_HOSTPC // Comment out following line to use Serial on pins (board) @@ -92,17 +95,17 @@ extern const uint8_t NUM_ANALOG_INPUTS; #define AD_AUX_3 8 // AD_AUX #define AD_AUX_4 9 // AD_AUX -#define AUX_1 26 // AUX +#define AUX_1 25 // AUX #define LED1 13 #define LED2 2 -#define LED3 27 +#define LED3 26 #define LED_BUILTIN LED1 #define EXT_INTR_0 3 -#define EXT_INTR_1 26 +#define EXT_INTR_1 25 -#define digitalPinToInterrupt(p) ((p) == 3 ? 0 : ((p) == 26 ? 1 : NOT_AN_INTERRUPT)) +#define digitalPinToInterrupt(p) ((p) == 3 ? 0 : ((p) == 25 ? 1 : NOT_AN_INTERRUPT)) /* Mapping interrupt handlers. Notice that XMC1400 can have interrupt handlers working in 3 modes, the defines below assumes the mode A. For details refer to assembly file and reference manual. @@ -128,7 +131,8 @@ extern const uint8_t NUM_ANALOG_INPUTS; #define ERU0_0_IRQHandler IRQ3_Handler // RESET #define ERU0_0_IRQn IRQ3_IRQn -#ifdef ARDUINO_MAIN //index is arduino pin count +#ifdef ARDUINO_MAIN +//index is Arduino pin count // Mapping of digital pins and comments const XMC_PORT_PIN_t mapping_port_pin[] = { @@ -153,13 +157,12 @@ const XMC_PORT_PIN_t mapping_port_pin[] = /* 18 */ {XMC_GPIO_PORT2 , 10}, // A3 / ADC Input P2.10 /* 19 */ {XMC_GPIO_PORT2 , 1}, // A4 / I2C Data / Address SDA P2.1 /* 20 */ {XMC_GPIO_PORT2 , 0}, // A5 / I2C Clock SCL P2.0 - /* 21 */ {XMC_GPIO_PORT2 , 4}, // RESET input ( DO NOT USE as GPIO ) P2.4 (INPUT ONLY) - /* 22 */ {XMC_GPIO_PORT2 , 11}, // GPIO / AD_AUX_1 Additional Pin P2.11 - /* 23 */ {XMC_GPIO_PORT2 , 7}, // GPIO / AD_AUX_2 Additional Pin P2.7 - /* 24 */ {XMC_GPIO_PORT2 , 5}, // GPIO / AD_AUX_3 Additional Pin P2.5 - /* 25 */ {XMC_GPIO_PORT2 , 2}, // GPIO / AD_AUX_4 Additional Pin P2.2 - /* 26 */ {XMC_GPIO_PORT1 , 4}, // External int 1 P1.4 - /* 27 */ {XMC_GPIO_PORT1 , 5} // LED3 output P1.5 + /* 21 */ {XMC_GPIO_PORT2 , 11}, // GPIO / AD_AUX_1 Additional Pin P2.11 + /* 22 */ {XMC_GPIO_PORT2 , 7}, // GPIO / AD_AUX_2 Additional Pin P2.7 + /* 23 */ {XMC_GPIO_PORT2 , 5}, // GPIO / AD_AUX_3 Additional Pin P2.5 + /* 24 */ {XMC_GPIO_PORT2 , 2}, // GPIO / AD_AUX_4 Additional Pin P2.2 + /* 25 */ {XMC_GPIO_PORT1 , 4}, // External int 1 P1.4 + /* 26 */ {XMC_GPIO_PORT1 , 5} // LED3 output P1.5 }; @@ -209,10 +212,10 @@ XMC_ADC_t mapping_adc[] = { VADC, 6, VADC_G0, 0, 7, DISABLED }, //A4 { VADC, 5, VADC_G0, 0, 10, DISABLED }, //A5 // Additional channels added here - { VADC, 4, VADC_G0, 0, 5, DISABLED }, //AUX 22 - { VADC, 1, VADC_G1, 1, 1, DISABLED }, //AUX 23 - { VADC, 7, VADC_G1, 1, 2, DISABLED }, //AUX 24 - { VADC, 7, VADC_G0, 0, 3, DISABLED } //AUX 25 + { VADC, 4, VADC_G0, 0, 5, DISABLED }, //AUX 21 + { VADC, 1, VADC_G1, 1, 1, DISABLED }, //AUX 22 + { VADC, 7, VADC_G1, 1, 2, DISABLED }, //AUX 23 + { VADC, 7, VADC_G0, 0, 3, DISABLED } //AUX 24 }; const uint8_t NUM_ANALOG_INPUTS = ( sizeof( mapping_adc ) / sizeof( XMC_ADC_t ) ); From a49042143c365dc7c05fd58ae327058b3096fb01 Mon Sep 17 00:00:00 2001 From: boramonideep Date: Thu, 8 Sep 2022 10:52:56 +0200 Subject: [PATCH 71/78] corrected USIC IRQ handler for UART, fixed #197 --- .vscode/settings.json | 5 +++++ variants/XMC4400/config/XMC4400_Platform2GO/pins_arduino.h | 2 +- 2 files changed, 6 insertions(+), 1 deletion(-) create mode 100644 .vscode/settings.json diff --git a/.vscode/settings.json b/.vscode/settings.json new file mode 100644 index 00000000..8e083243 --- /dev/null +++ b/.vscode/settings.json @@ -0,0 +1,5 @@ +{ + "files.associations": { + "system_xmc4200.h": "c" + } +} \ No newline at end of file diff --git a/variants/XMC4400/config/XMC4400_Platform2GO/pins_arduino.h b/variants/XMC4400/config/XMC4400_Platform2GO/pins_arduino.h index b2bf6436..dbbb5ab4 100644 --- a/variants/XMC4400/config/XMC4400_Platform2GO/pins_arduino.h +++ b/variants/XMC4400/config/XMC4400_Platform2GO/pins_arduino.h @@ -362,7 +362,7 @@ XMC_UART_t XMC_UART_0 = .input_source_dx1 = XMC_INPUT_INVALID, .input_source_dx2 = XMC_INPUT_INVALID, .input_source_dx3 = XMC_INPUT_INVALID, - .irq_num = USIC0_5_IRQn, + .irq_num = USIC1_0_IRQn, .irq_service_request = 0 }; From 5ff3b5f8fb0ec3be08fe3bfa12f3962a50db083b Mon Sep 17 00:00:00 2001 From: boramonideep Date: Thu, 8 Sep 2022 11:45:13 +0200 Subject: [PATCH 72/78] refactor and code clean up --- .../config/XMC4400_Platform2GO/pins_arduino.h | 59 ++++++++----------- 1 file changed, 25 insertions(+), 34 deletions(-) diff --git a/variants/XMC4400/config/XMC4400_Platform2GO/pins_arduino.h b/variants/XMC4400/config/XMC4400_Platform2GO/pins_arduino.h index dbbb5ab4..24fbf920 100644 --- a/variants/XMC4400/config/XMC4400_Platform2GO/pins_arduino.h +++ b/variants/XMC4400/config/XMC4400_Platform2GO/pins_arduino.h @@ -311,64 +311,55 @@ RingBuffer rx_buffer_1; RingBuffer tx_buffer_1; #endif -#ifdef SERIAL_HOSTPC XMC_UART_t XMC_UART_0 = { .channel = XMC_UART1_CH0, - .rx = { .port = (XMC_GPIO_PORT_t*)PORT0_BASE, + .rx = { +#ifdef SERIAL_HOSTPC + .port = (XMC_GPIO_PORT_t*)PORT0_BASE, .pin = (uint8_t)5 +#elif SERIAL_ONBOARD + .port = (XMC_GPIO_PORT_t*)PORT2_BASE, + .pin = (uint8_t)15 +#endif }, .rx_config = { .mode = XMC_GPIO_MODE_INPUT_TRISTATE, .output_level = XMC_GPIO_OUTPUT_LEVEL_HIGH, .output_strength = XMC_GPIO_OUTPUT_STRENGTH_STRONG_SOFT_EDGE }, - .tx = { .port = (XMC_GPIO_PORT_t*)PORT1_BASE, + .tx = { +#ifdef SERIAL_HOSTPC + .port = (XMC_GPIO_PORT_t*)PORT1_BASE, .pin = (uint8_t)15 +#elif SERIAL_ONBOARD + .port = (XMC_GPIO_PORT_t*)PORT2_BASE, + .pin = (uint8_t)14 +#endif }, - .tx_config = { .mode = (XMC_GPIO_MODE_t) XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT4, + .tx_config = { +#ifdef SERIAL_HOSTPC + .mode = (XMC_GPIO_MODE_t) XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT4, +#elif SERIAL_ONBOARD + .mode = (XMC_GPIO_MODE_t) XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT2, +#endif .output_level = XMC_GPIO_OUTPUT_LEVEL_HIGH, .output_strength = XMC_GPIO_OUTPUT_STRENGTH_STRONG_SOFT_EDGE }, +#ifdef SERIAL_HOSTPC .input_source_dx0 = (XMC_USIC_INPUT_t)USIC1_C0_DX0_P0_5, - .input_source_dx1 = XMC_INPUT_INVALID, - .input_source_dx2 = XMC_INPUT_INVALID, - .input_source_dx3 = XMC_INPUT_INVALID, - .irq_num = USIC1_0_IRQn, - .irq_service_request = 0 - }; - -// Debug port -HardwareSerial Serial( &XMC_UART_0, &rx_buffer_0, &tx_buffer_0 ); - #elif SERIAL_ONBOARD -XMC_UART_t XMC_UART_0 = - { - .channel = XMC_UART1_CH0, - .rx = { .port = (XMC_GPIO_PORT_t*)PORT2_BASE, - .pin = (uint8_t)15 - }, - .rx_config = { .mode = XMC_GPIO_MODE_INPUT_TRISTATE, - .output_level = XMC_GPIO_OUTPUT_LEVEL_HIGH, - .output_strength = XMC_GPIO_OUTPUT_STRENGTH_STRONG_SOFT_EDGE - }, - .tx = { .port = (XMC_GPIO_PORT_t*)PORT2_BASE, - .pin = (uint8_t)14 - }, - .tx_config = { .mode = (XMC_GPIO_MODE_t) XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT2, - .output_level = XMC_GPIO_OUTPUT_LEVEL_HIGH, - .output_strength = XMC_GPIO_OUTPUT_STRENGTH_STRONG_SOFT_EDGE - }, .input_source_dx0 = (XMC_USIC_INPUT_t)USIC1_C0_DX0_P2_15, +#endif .input_source_dx1 = XMC_INPUT_INVALID, .input_source_dx2 = XMC_INPUT_INVALID, .input_source_dx3 = XMC_INPUT_INVALID, .irq_num = USIC1_0_IRQn, .irq_service_request = 0 - }; + }; -// Debug port +// Single Hardware Serial object for both UART interfaces HardwareSerial Serial( &XMC_UART_0, &rx_buffer_0, &tx_buffer_0 ); -#endif + // Serial Interrupt and event handling #ifdef __cplusplus From 2f5532a468682e5ace3ed2977adebb8bdea2a353 Mon Sep 17 00:00:00 2001 From: boramonideep Date: Thu, 8 Sep 2022 11:51:38 +0200 Subject: [PATCH 73/78] removed unwanted macros and Serial1 objects and functions --- .../config/XMC4400_Platform2GO/pins_arduino.h | 24 ------------------- 1 file changed, 24 deletions(-) diff --git a/variants/XMC4400/config/XMC4400_Platform2GO/pins_arduino.h b/variants/XMC4400/config/XMC4400_Platform2GO/pins_arduino.h index 24fbf920..b00bde84 100644 --- a/variants/XMC4400/config/XMC4400_Platform2GO/pins_arduino.h +++ b/variants/XMC4400/config/XMC4400_Platform2GO/pins_arduino.h @@ -306,10 +306,6 @@ const uint8_t NUM_ANALOG_INPUTS = ( sizeof( mapping_adc ) / sizeof( XMC_ADC_t ) */ RingBuffer rx_buffer_0; RingBuffer tx_buffer_0; -#if (NUM_SERIAL > 1) -RingBuffer rx_buffer_1; -RingBuffer tx_buffer_1; -#endif XMC_UART_t XMC_UART_0 = { @@ -367,8 +363,6 @@ extern "C" { #endif void serialEventRun( ); void serialEvent( ) __attribute__((weak)); -void serialEvent1( ) __attribute__((weak)); - void serialEventRun( ) { @@ -377,28 +371,13 @@ if( serialEvent ) if( Serial.available( ) ) serialEvent( ); } -#if (NUM_SERIAL > 1) -if( serialEvent1 ) - { - if( Serial1.available( ) ) - serialEvent1( ); - } -#endif } - void USIC1_0_IRQHandler( ) { Serial.IrqHandler( ); } -#if (NUM_SERIAL > 1) -void USIC0_5_IRQHandler( void ) -{ -Serial1.IrqHandler(); -} -#endif - #ifdef __cplusplus } #endif @@ -406,9 +385,6 @@ Serial1.IrqHandler(); #ifdef __cplusplus extern HardwareSerial Serial; -#if (NUM_SERIAL > 1) -extern HardwareSerial Serial1; -#endif #endif /* cplusplus */ #endif From 991a29515317bc7aa7ff65036bce387751b27348 Mon Sep 17 00:00:00 2001 From: boramonideep Date: Sun, 11 Sep 2022 10:33:30 +0200 Subject: [PATCH 74/78] removed unwanted files --- .vscode/settings.json | 5 ----- 1 file changed, 5 deletions(-) delete mode 100644 .vscode/settings.json diff --git a/.vscode/settings.json b/.vscode/settings.json deleted file mode 100644 index 8e083243..00000000 --- a/.vscode/settings.json +++ /dev/null @@ -1,5 +0,0 @@ -{ - "files.associations": { - "system_xmc4200.h": "c" - } -} \ No newline at end of file From 0c5123c56f61e1ccf9bede40433e9a2013bc254b Mon Sep 17 00:00:00 2001 From: boramonideep Date: Wed, 21 Sep 2022 12:54:52 +0200 Subject: [PATCH 75/78] VAREF issue - fixes for XMC4400 P2GO for version 1.x --- .../config/XMC4400_Platform2GO/pins_arduino.h | 99 ++++++++++--------- 1 file changed, 53 insertions(+), 46 deletions(-) diff --git a/variants/XMC4400/config/XMC4400_Platform2GO/pins_arduino.h b/variants/XMC4400/config/XMC4400_Platform2GO/pins_arduino.h index b00bde84..bfb4dd99 100644 --- a/variants/XMC4400/config/XMC4400_Platform2GO/pins_arduino.h +++ b/variants/XMC4400/config/XMC4400_Platform2GO/pins_arduino.h @@ -107,6 +107,12 @@ extern uint8_t SCK; #ifdef ARDUINO_MAIN // Mapping of digital pins and comments +/*** +IMPORTANT NOTE + Entry at Arduino pin 14 is a PLACEHOLDER + Invalid pin assignment, but removing would lead to breaking legacy code, due to change + of other pin assignments. +***/ const XMC_PORT_PIN_t mapping_port_pin[]= { /* 0 */ {XMC_GPIO_PORT2, 15}, // RX P2.15 X1-4 @@ -123,7 +129,7 @@ const XMC_PORT_PIN_t mapping_port_pin[]= /* 11 */ {XMC_GPIO_PORT1, 9}, // SPI-MOSI P1.9 X1-10 /* 12 */ {XMC_GPIO_PORT0, 0}, // SPI-MISO P0.0 X2-18 /* 13 */ {XMC_GPIO_PORT1, 8}, // SPI-SCK / GPIO P1.8 X1-9 - /* 14 */ {XMC_GPIO_PORT2, 3}, // AREF TODO: / ETH_RXD1 / PWM41-2 P2.3 X1-32 + /* 14 */ {XMC_GPIO_PORT15, 2}, // --- Note: DUMMY pin assignment, to prevent incompatibility of legacy code! --- /* 15 */ {XMC_GPIO_PORT2, 5}, // I2C Data / Address SDA / A4 / PWM41-0 P2.5 (Hardwired to A4) X1-34 /* 16 */ {XMC_GPIO_PORT3, 0}, // I2C Clock SCL / A5 - ADC Input P3.0 (Hardwired to A5) X2-19 /* 17 */ {XMC_GPIO_PORT14, 0}, // A0 / ADC Input P14.0 (INPUT ONLY) @@ -139,53 +145,54 @@ const XMC_PORT_PIN_t mapping_port_pin[]= /* 25 */ {XMC_GPIO_PORT2, 10}, // GPIO / ETH_LED P2.10 X1-37 /* 26 */ {XMC_GPIO_PORT2, 8}, // GPIO / ETH_TXDO / PWM80-32 P2.8 X1-35 /* 27 */ {XMC_GPIO_PORT2, 4}, // GPIO / ETH_RXER P2.4 X1-33 - /* 28 */ {XMC_GPIO_PORT2, 2}, // GPIO / ETH_RXDO P2.2 X1-31 - /* 29 */ {XMC_GPIO_PORT2, 0}, // GPIO / ETH_MDIO / PWM81-21 P2.0 X1-29 - /* 30 */ {XMC_GPIO_PORT2, 6}, // PWM80-13 / GPIO4_2GO_2 P2.6 X1-27 - /* 31 */ {XMC_GPIO_PORT5, 2}, // GPIO / RST P5.2 X1-25 - /* 32 */ {XMC_GPIO_PORT5, 0}, // GPIO1_2GO_1 P5.0 X1-23 - /* 33 */ {XMC_GPIO_PORT1, 12}, // GPIO / CAN_TX P1.12 X1-19 - /* 34 */ {XMC_GPIO_PORT1, 10}, // GPIO / GPIO2_2GO_1 P1.10 X1-17 - /* 35 */ {XMC_GPIO_PORT1, 4}, // GPIO / QSPI_IO1 P1.4 X1-15 - /* 36 */ {XMC_GPIO_PORT1, 2}, // GPIO / QSPI_IO3 P1.2 X1-13 - /* 37 */ {XMC_GPIO_PORT4, 0}, // GPIO / GPIO2_2GO_2 P4.0 X1-5 - /* 38 */ {XMC_GPIO_PORT1, 7}, // GPIO / SPI_CS_2GO_2 P1.7 (Chip Select - Slot 2) X1-8 - /* 39 */ {XMC_GPIO_PORT1, 1}, // GPIO1_2GO_2 P1.1 X1-12 - /* 40 */ {XMC_GPIO_PORT1, 3}, // GPIO / QSPI_IO3 P1.3 X1-14 - /* 41 */ {XMC_GPIO_PORT1, 5}, // GPIO / QSPI_IO0 P1.5 X1-16 - /* 42 */ {XMC_GPIO_PORT1, 11}, // GPIO / QSPI_CS P1.11 X1-18 - /* 43 */ {XMC_GPIO_PORT1, 13}, // GPIO / CAN_RX P1.13 X1-20 - /* 44 */ {XMC_GPIO_PORT5, 1}, // GPIO / ETH_INT P5.1 X1-24 - /* 45 */ {XMC_GPIO_PORT5, 7}, // PWM81-02 P5.7 X1-26 - /* 46 */ {XMC_GPIO_PORT2, 7}, // PWM80-03 / ETH_MDC P2.7 X1-28 - /* 47 */ {XMC_GPIO_PORT2, 1}, // SWV ""DEBUG Do NOT Use ** P2.1 X1-30 - /* 48 */ {XMC_GPIO_PORT2, 9}, // PWM80-22 / ETH_TXD1 P2.9 X1-36 - /* 49 */ {XMC_GPIO_PORT15, 8}, // A16 / ETH_CLK P15.8 X1-38 + /* 28 */ {XMC_GPIO_PORT2, 3}, // ETH_RXD1 / PWM41-2 P2.3 X1-32 + /* 29 */ {XMC_GPIO_PORT2, 2}, // GPIO / ETH_RXDO P2.2 X1-31 + /* 30 */ {XMC_GPIO_PORT2, 0}, // GPIO / ETH_MDIO / PWM81-21 P2.0 X1-29 + /* 31 */ {XMC_GPIO_PORT2, 6}, // PWM80-13 / GPIO4_2GO_2 P2.6 X1-27 + /* 32 */ {XMC_GPIO_PORT5, 2}, // GPIO / RST P5.2 X1-25 + /* 33 */ {XMC_GPIO_PORT5, 0}, // GPIO1_2GO_1 P5.0 X1-23 + /* 34 */ {XMC_GPIO_PORT1, 12}, // GPIO / CAN_TX P1.12 X1-19 + /* 35 */ {XMC_GPIO_PORT1, 10}, // GPIO / GPIO2_2GO_1 P1.10 X1-17 + /* 36 */ {XMC_GPIO_PORT1, 4}, // GPIO / QSPI_IO1 P1.4 X1-15 + /* 37 */ {XMC_GPIO_PORT1, 2}, // GPIO / QSPI_IO3 P1.2 X1-13 + /* 38 */ {XMC_GPIO_PORT4, 0}, // GPIO / GPIO2_2GO_2 P4.0 X1-5 + /* 39 */ {XMC_GPIO_PORT1, 7}, // GPIO / SPI_CS_2GO_2 P1.7 (Chip Select - Slot 2) X1-8 + /* 40 */ {XMC_GPIO_PORT1, 1}, // GPIO1_2GO_2 P1.1 X1-12 + /* 41 */ {XMC_GPIO_PORT1, 3}, // GPIO / QSPI_IO3 P1.3 X1-14 + /* 42 */ {XMC_GPIO_PORT1, 5}, // GPIO / QSPI_IO0 P1.5 X1-16 + /* 43 */ {XMC_GPIO_PORT1, 11}, // GPIO / QSPI_CS P1.11 X1-18 + /* 44 */ {XMC_GPIO_PORT1, 13}, // GPIO / CAN_RX P1.13 X1-20 + /* 45 */ {XMC_GPIO_PORT5, 1}, // GPIO / ETH_INT P5.1 X1-24 + /* 46 */ {XMC_GPIO_PORT5, 7}, // PWM81-02 P5.7 X1-26 + /* 47 */ {XMC_GPIO_PORT2, 7}, // PWM80-03 / ETH_MDC P2.7 X1-28 + /* 48 */ {XMC_GPIO_PORT2, 1}, // SWV ""DEBUG Do NOT Use ** P2.1 X1-30 + /* 49 */ {XMC_GPIO_PORT2, 9}, // PWM80-22 / ETH_TXD1 P2.9 X1-36 + /* 50 */ {XMC_GPIO_PORT15, 8}, // A16 / ETH_CLK P15.8 X1-38 //Additional pins for port X2 starting here - /* 50 */ {XMC_GPIO_PORT14, 8}, // A14 / DAC 0 Output P14.8 X2-33 - /* 51 */ {XMC_GPIO_PORT15, 2}, // A12 - ADC Input P15.2 (INPUT ONLY) X2-32 - /* 52 */ {XMC_GPIO_PORT14, 15}, // A11 - ADC Input P14.15 (INPUT ONLY) X2-29 - /* 53 */ {XMC_GPIO_PORT15, 9}, // A17 - ADC Input / ETH_CRS P15.9 X2-27 - /* 54 */ {XMC_GPIO_PORT14, 6}, // A6 / AN1_2GO_1 - ADC Input P14.6 (INPUT ONLY) X2-25 - /* 55 */ {XMC_GPIO_PORT14, 12}, // A8 / AN1_2GO_2 - ADC Input P14.12 (INPUT ONLY) X2-23 - /* 56 */ {XMC_GPIO_PORT14, 14}, // A10 / ADC Input P14.14 (INPUT ONLY) X2-21 - /* 57 */ {XMC_GPIO_PORT3, 2}, // BUTTON2 P3.2 X2-17 - /* 58 */ {XMC_GPIO_PORT0, 10}, // INT / GPIO3_2GO_1 P0.10 X2-15 - /* 59 */ {XMC_GPIO_PORT0, 1}, // INT P0.1 X2-13 - /* 60 */ {XMC_GPIO_PORT0, 3}, // INT / GPIO3_2GO_2 P0.3 X2-11 - /* 61 */ {XMC_GPIO_PORT3, 5}, // CS_2GO_1 P3.5 (Chip Select - Slot 1) X2-3 - /* 62 */ {XMC_GPIO_PORT0, 7}, // LED2 P0.7 X2-1 - /* 63 */ {XMC_GPIO_PORT0, 8}, // QSPI_CLK P0.8 X2-4 - /* 64 */ {XMC_GPIO_PORT0, 12}, // CS_MB P0.12 (Chip Select - MikroBUS) X2-10 - /* 65 */ {XMC_GPIO_PORT0, 6}, // LED1 P0.6 X2-12 - /* 66 */ {XMC_GPIO_PORT0, 4}, // ETH_TXEN P0.4 X2-14 - /* 67 */ {XMC_GPIO_PORT0, 9}, // GPIO4_2GO_1 / PWM80-12 / PWM P0.9 X2-20 - /* 68 */ {XMC_GPIO_PORT3, 1}, // BUTTON1 P3.1 X2-22 - /* 69 */ {XMC_GPIO_PORT14, 13}, // A9 / AN2_2GO_2 - ADC Input P14.13 (INPUT ONLY) X2-26 - /* 70 */ {XMC_GPIO_PORT14, 7}, // A7 / AN2_2GO_1 - ADC Input P14.7 (INPUT ONLY) X2-28 - /* 71 */ {XMC_GPIO_PORT15, 3}, // A13 - ADC Input P15.3 (INPUT ONLY) X2-34 - /* 72 */ {XMC_GPIO_PORT14, 9} // A15 / DAC 1 Output P14.9 X2-36 + /* 51 */ {XMC_GPIO_PORT14, 8}, // A14 / DAC 0 Output P14.8 X2-33 + /* 52 */ {XMC_GPIO_PORT15, 2}, // A12 - ADC Input P15.2 (INPUT ONLY) X2-32 + /* 53 */ {XMC_GPIO_PORT14, 15}, // A11 - ADC Input P14.15 (INPUT ONLY) X2-29 + /* 54 */ {XMC_GPIO_PORT15, 9}, // A17 - ADC Input / ETH_CRS P15.9 X2-27 + /* 55 */ {XMC_GPIO_PORT14, 6}, // A6 / AN1_2GO_1 - ADC Input P14.6 (INPUT ONLY) X2-25 + /* 56 */ {XMC_GPIO_PORT14, 12}, // A8 / AN1_2GO_2 - ADC Input P14.12 (INPUT ONLY) X2-23 + /* 57 */ {XMC_GPIO_PORT14, 14}, // A10 / ADC Input P14.14 (INPUT ONLY) X2-21 + /* 58 */ {XMC_GPIO_PORT3, 2}, // BUTTON2 P3.2 X2-17 + /* 59 */ {XMC_GPIO_PORT0, 10}, // INT / GPIO3_2GO_1 P0.10 X2-15 + /* 60 */ {XMC_GPIO_PORT0, 1}, // INT P0.1 X2-13 + /* 61 */ {XMC_GPIO_PORT0, 3}, // INT / GPIO3_2GO_2 P0.3 X2-11 + /* 62 */ {XMC_GPIO_PORT3, 5}, // CS_2GO_1 P3.5 (Chip Select - Slot 1) X2-3 + /* 63 */ {XMC_GPIO_PORT0, 7}, // LED2 P0.7 X2-1 + /* 64 */ {XMC_GPIO_PORT0, 8}, // QSPI_CLK P0.8 X2-4 + /* 65 */ {XMC_GPIO_PORT0, 12}, // CS_MB P0.12 (Chip Select - MikroBUS) X2-10 + /* 66 */ {XMC_GPIO_PORT0, 6}, // LED1 P0.6 X2-12 + /* 67 */ {XMC_GPIO_PORT0, 4}, // ETH_TXEN P0.4 X2-14 + /* 68 */ {XMC_GPIO_PORT0, 9}, // GPIO4_2GO_1 / PWM80-12 / PWM P0.9 X2-20 + /* 69 */ {XMC_GPIO_PORT3, 1}, // BUTTON1 P3.1 X2-22 + /* 70 */ {XMC_GPIO_PORT14, 13}, // A9 / AN2_2GO_2 - ADC Input P14.13 (INPUT ONLY) X2-26 + /* 71 */ {XMC_GPIO_PORT14, 7}, // A7 / AN2_2GO_1 - ADC Input P14.7 (INPUT ONLY) X2-28 + /* 72 */ {XMC_GPIO_PORT15, 3}, // A13 - ADC Input P15.3 (INPUT ONLY) X2-34 + /* 73 */ {XMC_GPIO_PORT14, 9} // A15 / DAC 1 Output P14.9 X2-36 }; const uint8_t GND = ( sizeof( mapping_port_pin ) / sizeof( XMC_PORT_PIN_t ) ); const uint8_t NUM_DIGITAL = ( sizeof( mapping_port_pin ) / sizeof( XMC_PORT_PIN_t ) );; From 221f878159ea3901a10d96a622b815d9b3c2111e Mon Sep 17 00:00:00 2001 From: boramonideep Date: Wed, 21 Sep 2022 13:20:04 +0200 Subject: [PATCH 76/78] VAREF issue - fixes for XMC4700 Relax Kit for version 1.x --- variants/XMC4700/config/XMC4700_Relax_Kit/pins_arduino.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/variants/XMC4700/config/XMC4700_Relax_Kit/pins_arduino.h b/variants/XMC4700/config/XMC4700_Relax_Kit/pins_arduino.h index 9361ab42..73a85240 100644 --- a/variants/XMC4700/config/XMC4700_Relax_Kit/pins_arduino.h +++ b/variants/XMC4700/config/XMC4700_Relax_Kit/pins_arduino.h @@ -133,9 +133,9 @@ static const uint8_t SCK_SD = PIN_SPI_SCK_SD; // Mapping of digital pins and comments /*** IMPORTANT NOTE - Extra entry at Arduino pin 23 is PLACEHOLDER - Duplicate wrong entry, but removing would mean changing many other - documents and reducing many pins for defines by 1 + Extra entries at Arduino pin 23 & 14 are PLACEHOLDERS + Invalid pin assignments, but removing would mean changing many other + documents and pins defines -> might break legacy code. ***/ const XMC_PORT_PIN_t mapping_port_pin[] = { @@ -153,7 +153,7 @@ const XMC_PORT_PIN_t mapping_port_pin[] = /* 11 */ {XMC_GPIO_PORT3, 8}, // SPI-MOSI / PWM41-2 / PWM5 P3.8 /* 12 */ {XMC_GPIO_PORT3, 7}, // SPI-MISO P3.7 /* 13 */ {XMC_GPIO_PORT3, 9}, // SPI-SCK P3.9 - /* 14 */ {XMC_GPIO_PORT2, 3}, // AREF TODO: P2.3 + /* 14 */ {XMC_GPIO_PORT2, 3}, // --- Note: DUMMY pin assignment, to prevent incompatibility of legacy code! INVALID --- /* 15 */ {XMC_GPIO_PORT3, 15}, // I2C Data / Address SDA / A4 P3.15 (Hardwired to A4) /* 16 */ {XMC_GPIO_PORT0, 13}, // I2C Clock SCL / A5 P0.13 (Hardwired to A5) /* 17 */ {XMC_GPIO_PORT14, 0}, // A0 / ADC Input P14.0 (INPUT ONLY) From e43b76b43aa1140c135b35b8d8b8e702ecafb990 Mon Sep 17 00:00:00 2001 From: boramonideep Date: Fri, 23 Sep 2022 17:17:58 +0200 Subject: [PATCH 77/78] varef issue - additional fixes for XMC4400 P2GO --- .../config/XMC4400_Platform2GO/pins_arduino.h | 48 +++++++++---------- 1 file changed, 24 insertions(+), 24 deletions(-) diff --git a/variants/XMC4400/config/XMC4400_Platform2GO/pins_arduino.h b/variants/XMC4400/config/XMC4400_Platform2GO/pins_arduino.h index bfb4dd99..2b4f83bd 100644 --- a/variants/XMC4400/config/XMC4400_Platform2GO/pins_arduino.h +++ b/variants/XMC4400/config/XMC4400_Platform2GO/pins_arduino.h @@ -96,12 +96,12 @@ extern uint8_t SCK; #define A16 16 #define A17 17 -#define LED1 65 -#define LED2 62 +#define LED1 66 +#define LED2 63 #define LED_BUILTIN LED1 -#define BUTTON1 68 -#define BUTTON2 57 +#define BUTTON1 69 +#define BUTTON2 58 #define digitalPinToInterrupt(p) ((p) == 2 ? 0 : ((p) == 3 ? 1 : NOT_AN_INTERRUPT)) @@ -144,9 +144,9 @@ const XMC_PORT_PIN_t mapping_port_pin[]= //Additional pins for port X1 starting here /* 25 */ {XMC_GPIO_PORT2, 10}, // GPIO / ETH_LED P2.10 X1-37 /* 26 */ {XMC_GPIO_PORT2, 8}, // GPIO / ETH_TXDO / PWM80-32 P2.8 X1-35 - /* 27 */ {XMC_GPIO_PORT2, 4}, // GPIO / ETH_RXER P2.4 X1-33 + /* 27 */ {XMC_GPIO_PORT2, 4}, // GPIO / ETH_RXER / PWM41-1 P2.4 X1-33 /* 28 */ {XMC_GPIO_PORT2, 3}, // ETH_RXD1 / PWM41-2 P2.3 X1-32 - /* 29 */ {XMC_GPIO_PORT2, 2}, // GPIO / ETH_RXDO P2.2 X1-31 + /* 29 */ {XMC_GPIO_PORT2, 2}, // GPIO / ETH_RXDO / PWM41-3 P2.2 X1-31 /* 30 */ {XMC_GPIO_PORT2, 0}, // GPIO / ETH_MDIO / PWM81-21 P2.0 X1-29 /* 31 */ {XMC_GPIO_PORT2, 6}, // PWM80-13 / GPIO4_2GO_2 P2.6 X1-27 /* 32 */ {XMC_GPIO_PORT5, 2}, // GPIO / RST P5.2 X1-25 @@ -214,8 +214,8 @@ const uint8_t mapping_pin_PWM4[][ 2 ] = { { 5, 1 }, // PWM1 { 6, 2 }, // PWM2 { 27, 3 }, // PWM - { 28, 4 }, // PWM - { 14, 5 }, // PWM + { 29, 4 }, // PWM + { 28, 5 }, // PWM { 15, 6 }, // PWM { 255, 255 } }; @@ -227,8 +227,8 @@ XMC_PWM4_t mapping_pwm4[] = {CCU42, CCU42_CC42, 2, mapping_port_pin[6], P3_4_AF_CCU42_OUT2, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 6 P3.4 {CCU41, CCU41_CC41, 1, mapping_port_pin[27], P2_4_AF_CCU41_OUT1, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 27 P2.4 - {CCU41, CCU41_CC43, 3, mapping_port_pin[28], P2_2_AF_CCU41_OUT3, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 28 P2.2 - {CCU41, CCU41_CC42, 2, mapping_port_pin[14], P2_3_AF_CCU41_OUT2, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 14 P2.3 + {CCU41, CCU41_CC43, 3, mapping_port_pin[29], P2_2_AF_CCU41_OUT3, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 29 P2.2 + {CCU41, CCU41_CC42, 2, mapping_port_pin[28], P2_3_AF_CCU41_OUT2, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 28 P2.3 {CCU41, CCU41_CC40, 0, mapping_port_pin[15], P2_5_AF_CCU41_OUT0, XMC_CCU4_SLICE_PRESCALER_64, PWM4_TIMER_PERIOD, DISABLED}, // PWM disabled 15 P2.5 }; const uint8_t NUM_PWM4 = ( sizeof( mapping_pwm4 ) / sizeof( XMC_PWM4_t ) ); @@ -238,12 +238,12 @@ const uint8_t mapping_pin_PWM8[][ 2 ] = { { 9, 0 }, // PWM3 { 10, 1 }, // PWM4 { 26, 2 }, // PWM - { 29, 3 }, // PWM - { 30, 4 }, // PWM - { 45, 5 }, // PWM - { 46, 6 }, // PWM - { 48, 7 }, // PWM - { 67, 8 }, // PWM + { 30, 3 }, // PWM + { 31, 4 }, // PWM + { 46, 5 }, // PWM + { 47, 6 }, // PWM + { 49, 7 }, // PWM + { 68, 8 }, // PWM { 255, 255 } }; /* Configurations of PWM channels for CCU8 type */ @@ -253,12 +253,12 @@ XMC_PWM8_t mapping_pwm8[] = {CCU80, CCU80_CC80, 0, XMC_CCU8_SLICE_COMPARE_CHANNEL_1, mapping_port_pin[10], P0_2_AF_CCU80_OUT01, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 10 P0.2 //additional pwm outputs starting here {CCU80, CCU80_CC83, 3, XMC_CCU8_SLICE_COMPARE_CHANNEL_2, mapping_port_pin[26], P2_8_AF_CCU80_OUT32, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 26 P2.8 - {CCU81, CCU81_CC82, 2, XMC_CCU8_SLICE_COMPARE_CHANNEL_1, mapping_port_pin[29], P2_0_AF_CCU81_OUT21, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 29 P2.0 - {CCU80, CCU80_CC81, 1, XMC_CCU8_SLICE_COMPARE_CHANNEL_2, mapping_port_pin[30], P2_6_AF_CCU80_OUT13, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 30 P2.6 - {CCU81, CCU81_CC80, 0, XMC_CCU8_SLICE_COMPARE_CHANNEL_2, mapping_port_pin[45], P5_7_AF_CCU81_OUT02, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 45 P5.7 - {CCU80, CCU80_CC80, 0, XMC_CCU8_SLICE_COMPARE_CHANNEL_2, mapping_port_pin[46], P2_7_AF_CCU80_OUT03, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 46 P2.7 - {CCU80, CCU80_CC82, 2, XMC_CCU8_SLICE_COMPARE_CHANNEL_2, mapping_port_pin[48], P2_9_AF_CCU80_OUT22, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 48 P2.9 - {CCU80, CCU80_CC81, 1, XMC_CCU8_SLICE_COMPARE_CHANNEL_2, mapping_port_pin[67], P0_9_AF_CCU80_OUT12, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED} // PWM disabled 67 P0.9 + {CCU81, CCU81_CC82, 2, XMC_CCU8_SLICE_COMPARE_CHANNEL_1, mapping_port_pin[30], P2_0_AF_CCU81_OUT21, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 30 P2.0 + {CCU80, CCU80_CC81, 1, XMC_CCU8_SLICE_COMPARE_CHANNEL_2, mapping_port_pin[31], P2_6_AF_CCU80_OUT13, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 31 P2.6 + {CCU81, CCU81_CC80, 0, XMC_CCU8_SLICE_COMPARE_CHANNEL_2, mapping_port_pin[46], P5_7_AF_CCU81_OUT02, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 46 P5.7 + {CCU80, CCU80_CC80, 0, XMC_CCU8_SLICE_COMPARE_CHANNEL_2, mapping_port_pin[47], P2_7_AF_CCU80_OUT03, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 47 P2.7 + {CCU80, CCU80_CC82, 2, XMC_CCU8_SLICE_COMPARE_CHANNEL_2, mapping_port_pin[49], P2_9_AF_CCU80_OUT22, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED}, // PWM disabled 49 P2.9 + {CCU80, CCU80_CC81, 1, XMC_CCU8_SLICE_COMPARE_CHANNEL_2, mapping_port_pin[68], P0_9_AF_CCU80_OUT12, XMC_CCU8_SLICE_PRESCALER_64, PWM8_TIMER_PERIOD, DISABLED} // PWM disabled 68 P0.9 }; const uint8_t NUM_PWM8 = ( sizeof( mapping_pwm8 ) / sizeof( XMC_PWM8_t ) ); @@ -268,8 +268,8 @@ const uint8_t NUM_PWM = ( sizeof( mapping_pwm4 ) / sizeof( XMC_PWM4_t ) ) /* Analog Pin mappings and configurations */ #ifdef DAC const uint8_t mapping_pin_DAC[][ 2 ] = { - { 50, 0 }, - { 72, 1 }, + { 51, 0 }, + { 73, 1 }, { 255, 255 } }; /* Analog Pin mappings and configurations */ From a2a967ea1e1ef652278ce4846823621cf57b4142 Mon Sep 17 00:00:00 2001 From: enriquezgarc Date: Wed, 5 Oct 2022 11:59:13 +0200 Subject: [PATCH 78/78] Named Radar board to follow the convention of the other boards --- README.md | 4 ++-- boards.txt | 2 +- keywords.txt | 2 +- .../BGT24LTR11-Pulsed-Doppler-Radar/README.md | 18 +++++++++--------- .../library.properties | 2 +- package/package_infineon_index.template.json | 2 +- .../XMC4700_Radar_Baseboard/pins_arduino.h | 2 +- 7 files changed, 16 insertions(+), 16 deletions(-) diff --git a/README.md b/README.md index c6792222..5026f067 100644 --- a/README.md +++ b/README.md @@ -21,7 +21,7 @@ This repository integrates [Infineon's](https://www.infineon.com/) XMC microcont * [XMC1300 Sense2GoL](https://www.infineon.com/cms/de/product/evaluation-boards/demo-sense2gol/) * [XMC4400 Platform 2Go](https://www.infineon.com/cms/en/product/evaluation-boards/kit_xmc_plt2go_xmc4400//) * [XMC4700 Relax Kit](https://www.infineon.com/cms/en/product/evaluation-boards/kit_xmc47_relax_v1/) -* [Radar BaseBoard XMC4700](https://www.infineon.com/cms/en/product/evaluation-boards/demo-sense2gol-pulse/) +* [XMC4700 Radar Baseboard](https://www.infineon.com/cms/en/product/evaluation-boards/demo-sense2gol-pulse/) ## Additional Information @@ -37,7 +37,7 @@ Please visit also the Wiki for additional information, e.g. datasheets, pin out * Page for [XMC1300 Sense2GoL](https://github.com/Infineon/XMC-for-Arduino/wiki/XMC1300-Sense2GoL) * Page for [XMC4400 Platform 2Go](https://github.com/Infineon/XMC-for-Arduino/wiki/XMC4400-Platform2Go) * Page for [XMC4700 Relax Kit](https://github.com/Infineon/XMC-for-Arduino/wiki/XMC4700-Relax-Kit) -* Page for [Radar BaseBoard XMC4700](https://github.com/Infineon/XMC-for-Arduino/wiki/DEMO-Radar-BB-XMC4700) +* Page for [XMC4700 Radar Baseboard](https://github.com/Infineon/XMC-for-Arduino/wiki/DEMO-Radar-BB-XMC4700) Additionally, please consult the [releases](https://github.com/Infineon/XMC-for-Arduino/releases) for information about the changes and new versions. diff --git a/boards.txt b/boards.txt index 55a889c1..103a4ab5 100644 --- a/boards.txt +++ b/boards.txt @@ -391,7 +391,7 @@ XMC4400_Platform2GO.menu.LIB.DSP=ARM DSP XMC4400_Platform2GO.menu.LIB.DSP.library.selected=-DARM_LIB_CMSIS_DSP #################################################### -XMC4700_Radar_Baseboard.name=DEMO Radar BB XMC4700 +XMC4700_Radar_Baseboard.name=XMC4700 Radar Baseboard XMC4700_Radar_Baseboard.upload.tool=xmcprog XMC4700_Radar_Baseboard.upload.speed=115200 XMC4700_Radar_Baseboard.upload.resetmethod=ck diff --git a/keywords.txt b/keywords.txt index e5fdacd6..4a2f3bb9 100644 --- a/keywords.txt +++ b/keywords.txt @@ -54,7 +54,7 @@ LED6 LITERAL1 BUTTON1 LITERAL1 BUTTON2 LITERAL1 -# Radar Baseboard XMC4700 only +# XMC4700 Radar Baseboard only LED_RED LITERAL1 LED_BLUE LITERAL1 LED_GREEN LITERAL1 \ No newline at end of file diff --git a/libraries/BGT24LTR11-Pulsed-Doppler-Radar/README.md b/libraries/BGT24LTR11-Pulsed-Doppler-Radar/README.md index b14c2dc8..dbeaedb5 100644 --- a/libraries/BGT24LTR11-Pulsed-Doppler-Radar/README.md +++ b/libraries/BGT24LTR11-Pulsed-Doppler-Radar/README.md @@ -91,7 +91,7 @@ Two Arduino sketch examples are provided in the current library release. These e This example sketch runs the Pulsed Doppler firmware and uses the on-board LED to indicate detection of motion and direction of motion. **Hardware required:** -Radar Baseboard XMC4700 and BGT24LTR11 Shield +XMC4700 Radar Baseboard and BGT24LTR11 Shield **Steps:** 1. In Arduino IDE, navigate to **File** --> **Examples** --> **IFXRadarPulsedDoppler** --> **Radar_Pulsed_Doppler_LED** @@ -108,11 +108,11 @@ Radar Baseboard XMC4700 and BGT24LTR11 Shield ![Done Compiling](https://raw.githubusercontent.com/infineon/assets/master/Pictures/rbb_done_compiling.png) -4. Attach the BGT24LTR11 Shield to the Radar Baseboard XMC4700 via the SAMTEC connectors. +4. Attach the BGT24LTR11 Shield to the XMC4700 Radar Baseboard via the SAMTEC connectors. ![Connecting Boards](https://raw.githubusercontent.com/infineon/assets/master/Pictures/rbb_connecting_boards.png) -5. Connect the Radar Baseboard XMC4700 to the PC via a USB cable onto the **Debug** USB port. +5. Connect the XMC4700 Radar Baseboard to the PC via a USB cable onto the **Debug** USB port. ![Debug Port](https://raw.githubusercontent.com/infineon/assets/master/Pictures/rbb_debug_port.png) @@ -139,7 +139,7 @@ This example sketch runs the Pulsed Doppler firmware and projects the results of and at the same time uses an external RGB LED to indicate motion and direction of motion. **Hardware required:** -1) Radar Baseboard XMC4700 and BGT24LTR11 Shield +1) XMC4700 Radar Baseboard and BGT24LTR11 Shield 2) Annikken Andee U Shield (https://www.annikken.com/andee-u) 3) RGB LED Lighting Shield with XMC1202 (https://www.infineon.com/cms/en/product/evaluation-boards/kit_led_xmc1202_as_01/) @@ -158,25 +158,25 @@ and at the same time uses an external RGB LED to indicate motion and direction o ![Done Compiling](https://raw.githubusercontent.com/infineon/assets/master/Pictures/rbb_done_compiling.png) -4. Attach the BGT24LTR11 Shield to the Radar Baseboard XMC4700 via the SAMTEC connectors. +4. Attach the BGT24LTR11 Shield to the XMC4700 Radar Baseboardvia the SAMTEC connectors. ![Connecting Boards](https://raw.githubusercontent.com/infineon/assets/master/Pictures/rbb_connecting_boards.png) -5. Stack the RGB LED Lighting Shield with XMC1202 onto the Radar Baseboard XMC4700 via the Arduino stack headers. +5. Stack the RGB LED Lighting Shield with XMC1202 onto the XMC4700 Radar Baseboard via the Arduino stack headers. Also connect an RGB LED and a 24 VDC power adapter to the RGB LED Lighting Shield. **Do not turn the power on yet!** For more information on setting up of the RGB LED Lighting Shield, please refer to [Infineon RGB LED Lighting Shield with XMC1202 for Arduino - User Manual](https://www.infineon.com/dgdl/Infineon-Board_Manual_-_XMC1202_-_RGB_LED_Lighting_Shield_with_XMC1202_for_Arduino_-_v1_0-UM-v01_00-EN.pdf?fileId=5546d46249be182c0149ccca3860734d). ![RGB LED Shield Setup](https://raw.githubusercontent.com/infineon/assets/master/Pictures/rbb_RGB_LED_Shield_Setup.png) 6. Stack the Annikken Andee U shield onto the setup. Notice that there are several jumper wires on the Annikken Andee U board. -This is due to the hardware modifications required on the Radar Baseboard regarding the ISCP header as mentioned in [the XMC4700 Radar Baseboard Wiki](https://github.com/Infineon/XMC-for-Arduino/wiki/Radar-Baseboard-XMC4700). +This is due to the hardware modifications required on the Radar Baseboard regarding the ISCP header as mentioned in [the XMC4700 Radar BaseboardWiki](https://github.com/Infineon/XMC-for-Arduino/wiki/Radar-Baseboard-XMC4700). The second diagram below illustrates the required connections. ![Annikken Andee U](https://raw.githubusercontent.com/infineon/assets/master/Pictures/rbb_Annikken_Andee_U.png) ![Andee Jumpers](https://raw.githubusercontent.com/infineon/assets/master/Pictures/rbb_Andee_Jumpers.png) -7. Turn on the 24 VDC power supply to the RGB LED Lighting Shield and connect the Radar Baseboard XMC4700 to the PC via a USB cable onto the **Debug** USB port. +7. Turn on the 24 VDC power supply to the RGB LED Lighting Shield and connect the XMC4700 Radar Baseboard to the PC via a USB cable onto the **Debug** USB port. ![Debug Port](https://raw.githubusercontent.com/infineon/assets/master/Pictures/rbb_debug_port.png) @@ -200,7 +200,7 @@ The RGB LED should turn on with white light, while the on-board LED will cycle b ![Andee GUI](https://raw.githubusercontent.com/infineon/assets/master/Pictures/rbb_Andee-GUI.png) -In case this does not happen, disconnect from the app, press the reset button on the Radar Baseboard XMC4700 and retry the connection. +In case this does not happen, disconnect from the app, press the reset button on the XMC4700 Radar Baseboard and retry the connection. Make some movement in front of the radar board and observe the measured speed and detected direction on the GUI. You may also observe the light from the RGB LED changing with regards to the motion and its direction. diff --git a/libraries/BGT24LTR11-Pulsed-Doppler-Radar/library.properties b/libraries/BGT24LTR11-Pulsed-Doppler-Radar/library.properties index 833a7736..5bea736a 100644 --- a/libraries/BGT24LTR11-Pulsed-Doppler-Radar/library.properties +++ b/libraries/BGT24LTR11-Pulsed-Doppler-Radar/library.properties @@ -3,7 +3,7 @@ version=1.0.1 author=Infineon Technologies maintainer=Infineon Technologies sentence=This library provides Pulsed Doppler functionality with XMC4700 Radar Baseboard and BGT24LTR11 Shield. -paragraph=Infineon's 24 GHz Sense2GoL Pulse radar system platform, is made up of the Radar Baseboard XMC4700 and BGT24LTR11 radar shield. +paragraph=Infineon's 24 GHz Sense2GoL Pulse radar system platform, is made up of the XMC4700 Radar Baseboard and BGT24LTR11 radar shield. category=Sensors url=https://www.infineon.com/cms/en/product/sensor/radar-image-sensors/radar-sensors/radar-sensors-for-consumer-and-iot/ architectures=xmc,arm diff --git a/package/package_infineon_index.template.json b/package/package_infineon_index.template.json index 84074bae..4941015e 100644 --- a/package/package_infineon_index.template.json +++ b/package/package_infineon_index.template.json @@ -44,7 +44,7 @@ "name":"XMC4700 Relax Kit" }, { - "name":"XMC4700 DEMO Radar BB" + "name":"XMC4700 Radar Baseboard" }, { "name":"XMC1400 Kit for Arduino" diff --git a/variants/XMC4700/config/XMC4700_Radar_Baseboard/pins_arduino.h b/variants/XMC4700/config/XMC4700_Radar_Baseboard/pins_arduino.h index c4345df4..a7f36feb 100644 --- a/variants/XMC4700/config/XMC4700_Radar_Baseboard/pins_arduino.h +++ b/variants/XMC4700/config/XMC4700_Radar_Baseboard/pins_arduino.h @@ -37,7 +37,7 @@ // Note the actual name XMC and number MUST have a character between // to avoid issues with other defined macros e.g. XMC1100 -#define XMC_BOARD Radar BB XMC4700 +#define XMC_BOARD XMC 4700 Radar Baseboard /* On board LED is ON when digital output is 0, LOW, False, OFF */ #define XMC_LED_ON 0

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z%bL5%dR%72eN)}vpsBv?Cr$O1CpFcN$adfR zLi2p(n+PAuAk7lUJYjobx$tzM8FfauYec?Dc)M_w&KMPH-HUjJx z`LDuvg$ISTP5Ey`J|PU@Y0nI230nzkoA4DP4>df?LNn8gFh)2<$hU7Qx=Of2NFz(S zuMzGRnz35AAJm<$4yH{-+xj2k6JUJ=pA-^xt7*K0oXUo6aAWoi|56Fpm&6rm+V0>W z2{%&wFA!c~_&;s+{~K-fEXX190GBNs zcP$5|k}iZw8v}X2h7d;AIDR|ODa@M)EpIfbEO(2|e!j?~a6-$QZQO8sgtWu#dvL;& zsV=+#zrpYx{Nio)D*|t`{Sn3g+;ZC*j^lIqj@#sM9BWiv#%xB}o2TY*mo0Auv()8X zjO0f7qNwJU87Ua$J*(!OVx*+#L0jkjh?e)mNJhRR6H zpGxR67z%1z-aF_rWU$xr-gwuKZpi+3Tii){=CGa(y7-OdVttdl%!esdYg^mH^j)rh z?k}~rHCo%_^a$nu?q^>}*y7$eEZ~2*L1TLzKhM9Krh(OZ>rH8{-XHSMcHT(Q6Zg8U zVDOJ|ey@4WiMiLC=CzJK-Obg7RakS_w6MR{yIW+m_H)`9X<@JPTG+e(bqo7ypFdr1 z3i}(kuuCU(;>?WqY@8RtATpcT9BgDWyN3K}Gkfxs^L{cjubT%Jq#0zo0 za5a@0G#-ENfhO?l$E)*uRYkir9cUN)rXqIAf~x1?Qa>7BKNimgNmKsQWAX8sW-xwH z?TV*YIqin*UQji5Dn{X_){eqk1>aS6+`pje+p4pUwK78?%V1_@7>4wHQ0=yDGcOcU;l6-Oj%u&{bADR|0#gtQN7$ zk)f-y21d<7te?SX0tJrEwX;!k+3%ufJT#7N+qQyJJ2xuYIKS_!y-sq1c<+7p-S>Nc{5Ir#dsVGkRlBP8 z-nDD3T6IW;V_k6tPNDajVfa9WIfihGgkgUm+=v2-y?0Fffk1dP3s@2t5C|7CzSR5J zPag<#-ot6?eQoIKV7L|In|U;<3YKgMhL56+oaP?y+F;54U@S}piPOS!O~AomcnC9S zDH&AT;a?fwO6UzXcB=#3+AB2t8|^S%)H`Kyekc46`P+CsO#B8XyqXu-HXiSWKVf`3 zk2VOX(GoYzc_61e&ftY<`{%Ux_$2@aFFaB=%5Z*+(GjrI(c=_titU`{U5WU}YfO8( z_W_zKatVH%GmIRo!TzAr*K3KQg&$-773Li8fbiu^(J!8x3J+we{z9XH8)H=E3=n#w z3cp4EfnG95l~T670Xb_c@aSwqt$9{qJ1<;P}7 zz=mM>eqQ=ap*Kp0o)s@@Fr3T`XG=Ufcs2Rw2)#WRrVW}iSLmyPet)l&^w$N$oJVr1 zBz{NG^zWE6&%4N!aAz>gHSNxs!mv9S-bQ-9(0hV@hhN}rH~bFoxPk*vYR-VG-G3qdYxh*{1OVK@>DFQmYwBH(B+=~Qfs>MWD^W5KY) zDqJq{KLx|wKGa#^?J@#!2S*uyws)7Ici2f|u-mJ%(xXQ-JmZ{j9^+Sej~IHtlQia} z)UlSc+Iz}paKjt*z1hwiF)jpi)|nd*W35@J=j4?LQY};^AbAj4PL-*5kt)iCWJzoVERgSUducJgqWrXNBjt6%((U?xMZ z<0P*N*gjL3LB&X`96u!JAOuea_3t44+h#E5$Us!BN;V8u=311`R^JA>*esRVGC?vv z^DGsynFi&_wtvM*I<+V&PqH%Q852aKr~*GoWi$6vctMT*kU%5Jy^)=Z2S~;~NQoT9 zRjOji{b_{QD#I>EbSg73xi4q#r6vt>Z)eX#Z2FlDZ0`$B&R|x_%qrGVf^5mFjZJTW z8C;GK;i^Z~#m@_p`r1!Y(k(1Oe?J*qVMEd+*2q9VM0pJ1H-S1?LQJVpiM{PZ6ixY& zUKBFKHlFiXMS?pZ0wu9f_UP33Q@)`pr(NvZPYw)b( z*1Wn?O^zt&bo(t9)O48^62zu+^JZ*HZTfMrfECA$y|Hh!2}yDp zvV#}8(GS56l?Yj5JSSe{2dN-~Xb`C`mXH8LXrZVskr0It-Vm$pUC1^g3qO&w$gtfo zSeg6+!+K)-F_xJ{V}j&6nDvz=4a&UJK86U>C1dJVUvfg9+$ACLE_t)fWilDhF)w=3 zP=ECEf}}se(g>2Mm{#}t$pX17G<6kfj~`<0EEf7MdlCgvT7+&f)q{47^wX#{p3(_L;7GL*_I!DnqM%YklVC6_Su!zQP!Jk(6kZT~6a zvOV-GH@*>c_FR};z0y$fQ73dOSj zh`RGOQhuPMffeFJQm*|Ap0}Z8=5#fFL#&t3X9%=ukM3=1g1{_Jb>(}PzK8Sd6coqX zdJLz`a4wm){cNac_N&a{iWH9NOER)=V9~Di^UH?!C|r|wyQ7hhKBx{g=)?Vyx}r%<l3;ERh2M96aET+b-!Et7sef7@q z&i#6Bu~T8xM0)Z)4U%n?pupdB`Hf<@`FiTzUg^5c;a;JX!o)3_^~0@H>9(=eXAY(*V)9f`WBeK74m;-#%cB9wM@8;SE#FI1i3! zS!c$%TfaP_Wt|--Ipc?KKVJ5q+i`k9>~Z_wvgB;Ef}j71mYk%Gg2-$u+*r&wPkSp_ zP239`o)yjEA={aT2 zgEjryI4c5P|1o0+j2kmtZz*@4KhgY+*{5S-duM>&J`?NsUT*J9*Ee@?F4QM=bZ#_? zC0#MLr8~QBN8gdZ;{cMk)bCn=##;`^hOAqG8sVeFD+xqBLxej3A1edw1Su<-n~hpmrRH^|VhEom2ZcH>rW;cJoZ zT#Z$T}bqEGe1U1BKx^83KMJ9ooxcq0QMWEQE28-;VTyjS2u>_ZVJBlinwEobJg*i>7S>w*^3xrgJNK1f$rmf6 zBqgJzzf#Y)B{kj>Kfp8Pg*tDE#$RDTr(sW4U9nX4`K=*oH)BXTx~G(yy@-aSn_sKQH`~(x#ZKx3HUUmz^EB04)gkbQ?iq*M;~I zLQfW4Ah=HO62a?zjQMMaknmB7cv0{lf?o*!ESQ4kV?hc8+X(g+93ePakOM37SD{lA z&B8b!hns2gXMx1f};ed304bk5!^wH zLBMVa*e`fc@Q~mU!3Ma$nW0%A2W%;{Ss({`h|p$%9Ox>c%>p^ln}ohv@OEH~0w0oq zX9fQz_=({6f(_7tOaTO23U(Ldq#5Ilb2k=1=v9K71aB97$ir}w37(aJPXrraOk^?= zJS1qgR|NkzLjNil#;s2NY{ABYrGl*ldk78}oMN1@A>kqkFwWRO-yrlJ!Dj{kF8GCD z1Vb8ToF~{`aFF2Xf~y2C6TC_AKI4oH0*tdY;HMJtlVB@;L?OJd;3Flo_X)lx_>rK;fhYL6u{E)s z;3&b#KE|wh60k~equ?&VJ%alMUlM#<@H4^h1gS7)h9SX-V5VT9V3|SO|2-sNu;8hJ zbZ|^TTLiBYyhHFo!KVaY6U^Z#8tF;}%ZRvz%LO|T!P|$(`+o#afKvpki0Ii11Q!#L zV2#9IEO;dm{p1?K8;IcBCGigk9u$0E5U&7JAUw}3J*j(E)&EZo*}L=2fQB(|4Al2* z(x^`iPmJL@h94%rm(UeN@XZpsk_i5G?K}UMl;iFG+$72F(5+LsuN;4^SYJ8N>8UFs z4f3}YR;B7oKgy15Yh2|u9cVEtO!MJqaKicUg!56l&q)~D=AYz*VqdahnF13TMR+nP zeg*#B1R$bzpUPdhKB(G_;kXJ>lK{;VpT$tMm!mV-e5}^0+NpxEJ0MA|s{Nl#A9DVV z2xy*M#>e=;&i8fg(~vsQMpW%jpMo(rbBq21hYM} zqypNe3?vNZc(m^}+NMt#o$JMz9koq#3J}cmHW?b)rlX9t*T?U)-7;O`m0tJUiJi3GFE<+_A-Jv0+50iLk zn|{&P4t1KuN-6&o35K$XtN4Q>g@&?eEeknHXegUZCmQYbFvWthDT9qXM&hAt;*!4L zSfQb8n$5Z$C&hrW>2f9%2IWK9nmaU7l813_5JF$h(X z%>8-nGW94@Md_`MCPoolYuZwTSZUlWNu|;CSs<+u&K)@6!G*ylH_(Dy{7AIY&W9vr zMMn_q(*mb3W+&LJw0u6^RoYu10%_b_Fla^ZM)t~{5vU~FEl2}4{3z%|?C*mQBQ%}r zUHix21_X;9s~d`A|Kf-Es)qUG3D`c5Q8i>E7u)ee;%Y3NJ<>^uU5yK{lTD13NoRew z{cZ3w63~23Q$^BBjd!&=u@;+u)YPgVHJNss4cRK^y`=Wg1K*-Zyj&z#z z;+}_g7heSU``SN~|2kGmf1lr1OPK{~1N{(REmaiMLq<7GTIG{>NUeks_8^E%r>7Hp zr0^T%)5xH{e3Vnx>``=vY`e8hm&mCs9UsHPfOdDg(vWuerI7w$l+$KJHLLejdpcNA zxaoF7T(IAUGkwv%y2!NQ96uzX4XcDl+E7m!?KCNUnN_jK#8{bADBqrJ4}jcM3O6nG ziN0yHlQD4!>;D{)YScj7q0v6i5AoGNDd=VPMnA+?1D(q&xyTRkwLtW~U|%dDMhoTYZ7Gt+{rL)1)OG zz}kQGC4&D?Hosib>D&I&bL%C_wAe*mMs{0bU1@VP9{*izMM33cAr0hRuWa zNFD36i8W>L!}fNtWN}hMIcFweRG+pHS7N0NM>8q2_ZgHa?B>oQegS3EbSK%Vo&e6A z>rkoAxjcp3ocoZcvthQO?3@e0=UlMdP@xz9V#%Bez0oo(M3Dw@-avaSenELxJ0Lx=6owZ7!+oO!zWIA>st zg9GOVepux#MSZ!SddzC#@uAVT* z3G1ikI1#;fj+3Lm5VA<$Fb9*(N#}GeIey>j{7PrAKJtZQr=UsYI|Pa-y|^cKpsx7x zxbQ_LT)~?`O~-V7pf4N<%s<+@&d1_)#>e8D-*u0+47EmmLu3K|&^{I#($LQXnU(1k zz+EOu;k=%Jwe(8nus7^Y|85-lqGaVeZBrgu1 zcFbzgesrgynK@z20}o};+)LR%d^&7hT8~b#uJ`G-k|5Q(Qy4fp zNyESRLQ|-`>O3au_EVe@nepXP3(uNUHP@QEWa08fQ_HvQ$}8A*TVATpn&hO6={I~T zv~E+&DU|&%P$-C+HgvII2{{noROn`YpA9tkFC~D6jxxTq=F5dnUpIz&GV?#^>N=}=CvQ`ZjqtMmG_h@q$As5K7GwX(!H7k4aIF!&Aq zZyWp`XYX6A^h<3#-vuLABpfxbU; zUf1jxO?fbn(hkA)OF=NlUCm#H5KO5&j0U#1;r$h8Jp+j_yAs9hp1l}9fxgQaVmmF+ zX>8651o~ZILcD+AQHR+T2X9!+uDpUrk4+;}@jCCIP{E?pz-q^yVuG?No*a1Uu&!`#L6&RW3Y2=S z+Z{aTxGpk|xnCpJGTTxs_elsn z*-b_U5%*t^km@!EXVh&9&NO!qgf?`)L%Gx4FOYGDdmA`2-II`UBex4O$Z{V-6T*l={y0(T^W8oM7NsEM12-$Jwfd6C-`=f!SsTz82}J3H)k z4$)2Be#pL=I~~8x-I>Ush5IcyTe{PceJiu$d25#=vNE?13fIO>N8#GKG@xteK7x>P z_bP<6cR%3QZwHr-B09QnBB+ylD#Uem2coZZahoFJuI`-(>E@0>2Ho8q2sh44G!o(LAApH{aRcy9ME%19yp-yfCO+r zpACQm`f4PA19}=`!T~+|5ggDjL;^UVABTM5fW8JSa6nHBA2^`LlAIVl(5FE*Jka+< z>EVI?MWlcOdKyg~!fFy^4+r#1zyb&KG@pS3`d5%49MFdWa6r$ACODv{mmfHwuR%IE zpdX8z;DEjjE}MIuBMuJe??z*PiSE`6k@kJBql9|!8mD#a0BGebrmHmfPUK{{8&L@5 z4nu7RT-whB-4X=bZXxQ%!5+_GaW6+Dcwi5Tl&C=Th2N2!P{z zR7s(G5`OnvE*+B}f@^X>wQ?^6#C9n6dPXXj@oY=Q(a&9ggABl=JRC$pjW$ zpmE9L##-Ypv)$zo7jl2Vl|%N=;BY>Agvq!ql5&ow;U01Mv57sYDaf4)mVlLfy3;_- z#%apfelUVfQg`B#@g|9^0lyPg_ZSi$@)(;ev7yNMj7{-l^^a?vhOt!Um@51kkyDW? zy#M>svLnVwKTXK|$X#d|c>nif3nSce3f}+yyhjm$DRPbh;ddb-LN`^iWQ2Qc3LV<*`^E_Y&osWDQmBgJY}joVz8*diG0RV zwNZTx{jn2ij3#i}s=+J*ja$J6f8O7Mh-E)v&0{DBUFW9X8}L{m>cI*O8jOovXNEWOX9b9kz~gAmiX;n zX|nB1R724UY1cF7$?6e^u@$FY(hjilruZR2+Wn^8%G#PLAvp{g$sRDx4+&&3 zY!o}4GprdO@`4r^7AtcLij)s~B2Jw}y78(`H8DsT+0N=bO-MUs{`^H) zW@0$u3ZxP10fwZJpP6W(a780jbvuiM%!o{72^XtJIDW^vNh`}{K~itvRW4CH&$6ji zN7bIA{)n`G)m9q;iB-Ga4@s!nb0ws%YR~gS5~_BCgk-j2RhYUxUy{{T?FAANuiD1v zI>qX5y5G5|wx>`ezsA-Xu5_yYS=uYrQIccj?QB!2 zcn@TB;SF+yFNl&UXou>Js5CAOb#6`+0w1|q#=Yje^l3+w2dQM^bO}> zNzYp-9F|q`5>i*-?s6VhWeCc$JK#54^}%lrUv^e5cO-!+@^Xaa9l#CXcJxJAdD#eZ zJNcB#qi+GXvrl14Yyqyt?Ls-Z!w?hj&Z4D49?R-2y4LT7R^DH5CEj8YVcENop|_-( ziKtvj_Rjtu=lQc1Ot-vMJVjOJ)gZ=O{i~tuJh}q&)}-Q^aWCX?V%b~E5jW@2vg}D{ zosf;lEISFmA(jCX_zhxsNZ3tLE^pl)1chk_4M#E+0Cx%c21YR`nQ~il0AbmT4$UgU zZ*CfLFAJ?W7w36-sE*J|wlmAM6}g616&k8E?-`^It>(icP}0J(&qIcxHNz<3k2sA* zL)HAW$ZL<{htB0`{L(__{lidp-bN%2ZTP`Zp}fWr96H~xs$?tlR|IF-jqn?K&z!PE z+3F~MbNGYEOHBC3__dj5=mG{5sIQP^OpRA;Q6Bw$uv9l(PGe34tJ4_gn=8MGt5VYy zYlg=~_?v`3wG_;S3unwjBu{Cs%*i`7lbnIAXQN^ej456G7Cny+4bL{4agIsGdoXr{ zmZ^z`Gn)=IL!QIHM_;_rX<288+_(^i$e|wLp4g#7Exk zk0eey*7E|3S5IYKq=r-2ZhA*a&?I&BS(}~ib+Kl?@~6$trNs%R!SU^54#O~b!bcOH zeQsDqd-!;*x$6>VwW{fN85SysW-VPdb^5GXOMb`Q>j3@Mg6?^G`xfV9J#4FUwZ8GM zPJT`Fa_2jxbKY{=)ePV6%nM*qwKKY=gLbk5CzvJGOWt+b>XlbJL#{mJJXLf5HO>X9 zX5@9wJX;4oaURv>mq+slu+si3_Pwm^!`0;7+xY;3B3O5&q*x5orfplX8c1 znG;OKRKM?tyPV6RlhTt5* zr9Q^2b0uJxAm65CegO z67ZhjFM>H7{Xjr#!IK5g5IjrJm|lW!v(SGOd|2>V!8Zl}DQHYEV@T-mWe3a@G^UuK z>4A~qW}8{y8A8t$Tp_q#&@5U5-?c*DA$Y&wUj+Xl_!%(93>xy43Ct2K7HlinNw9~Y zSuzIx;X(SuvQY% zL+~Ubdh!s#5k&CKmiSmi_j$qYqN}@SouqqT5Nxfxo!Tv$vl)*OCfg!-mEd*ya0|C@ zgOPks;?AF~(*`CnDw=Pt&8FSer#_|S}<479M?S!I|F zKOdeej!g>>T0QN@B|onIq4M-1tm*wGecCN;L4?y)f3SJ=oFXl0!#);rElDR3p z^>`E=%T%GQG7+HO$6LTk(NpJj&5!NGZ3(qP9)e(vfb+Oo;bMe9tuT)>el_UC!MIw1 zd&Af>@e_=z6+S>Z`y|{C!MIwXC7xwd!bv17f_LV0O!SSPh5A2TY=0< z-IF1@srxDfHFLkgZ*!xiXyLw!v@Okyd@Gl$U0b_c?OEpLqi}89DQJkc?xiSPJNIsc zl)GFk-QL~7h5a4e4(J{oT|W6cxeZae&h8@!>Ef0kEm|9Z(sKngzUH6vrr1C6&^#CL#?m?<%U|}apVED!ks7&)C#4^ zcq2ls@Mn|)YK50kGN={!Q4X~NwH#0@oQsk`t?+O3A*dBNnFzJQDr5w;LKF$0R`?D@ zgIa;#T~I4fwF0%m)yNlW1wQ1VR^ZzRY6U*Dp;n;pQK%I#VQ$n4e*h2E3JY*OP%F?J z1!@I;Y9F#(IK&@~9`9iJm3G#(n;TSlfR#*lKY6aFP)C%{YFiD1>r{ptb|!+h2ZZ5*->5X;GS^oXSdp_4rs}ISRGms=J!3_sQIec8JT`n3{9s7pXoNa5 zRj1#0h}qTYH?AUCr{5?*v#2`##?=&Er{Bn8uc*^+{DHA``i<3W8t6BuTMU$xNA6;D zmYKK?lyr)m#5%0gZ_olw)#*3>%yQJ}Hy$HdU%#R1^c#;eZGlK0o-%Ok7)v#l3mz4T zJX^R_2s*jK<$Wnc9OGqxbj+OWQ`VwxFhPBD;A9 zwN)%8oawlcOkQj|#RnCvciqU-thhwI$0!CQ=si}mpC#x$CNe%j?{NWpNrK*E4&xK_ z9?86I67(L68K0o{;HQ&H)O)NYLxSGp7_TTn?{OjH6Z9T5>r)AOkINaKp!bOIu20Z= zT+jFfy+<2VucF>#7^?(&k6mP_ulG<1dXM`UJwUx^Y7lyl8g{M(y~knPTuQgu@AQrF zYeWrFpQBxqZ8cFniF-GVnkQ9Hdr`Icw{@zH`7AP29q5g|rUM0uS*e_&P)kgyvg}jQmC+98sAfp(w?jQuhiQj;st(f* z^;8|E9qOq%Ogq%7I#_+C9iZvJ^;@>DMKbMBPt{@C;lkgv!^YpV!$p2bkQye|@fy_+ z#Ygqx%0w+ft72Z+m1-fcERT%^wTQ{z*Ncp2JshVOQQOo-lypA3pXfy>nv!;?2Puhb zP*gp=$a;34^`h+OD^YJ_Fa&ZtscT}4&RDaZc99mu!Z`2 z2+3m++(rKUyp{K=t~%iKi@IQQ*9=BQQ9E&otsg$%G@Z(=)a@YBy6e6`(%dB|L7BH= zE7j>3j)C1lsGoesYn)d=O+N;wk+y*h;nh8jiyA`KVubLex?+e}MNvCCC zTZ*oF(&-svly?D@LIs_8uXXW#-M2vbd8iq<+{V>xGq6Q~XJ*`yfUwDt4$zqBzbm`w1a#do;7YunaG30%Qd|exY8^7cR z^r^t0Ja&7PWwRMe4)JOR`$47e;&B=n&F&`|l?>s%vDA+)`JBAVh1X2)os-B*m0ntA7z@u44?;eDSPvmNKqtnlu(25R^XD0m1Yv z7=cPi$U%KPZS=th)swZ zWexZ*v-_!Qlar*rJ7B%%FB0gN5lHZ4oUl{l2{d$CRoG`zb$3Gj8~12zga@hb*as(5 zXI6@ZvtIuxHoLq2Wf(&Rbj{07dF%mKEk6%aol3>kbk8GXYrT+nYD4e{p<6`^N}t2y z_O88qF^8Jy`{&;$4Be?t#QQQsZHmy)1h&_A{nKe!llQ9gdf;~#FWmf3tZ8YuZ52-PX{Vr-wdLXTc}M*NOrA2xF$-zooxeC#Gr5XLGl4AgE2Ionqd z`u8s4%^{5cm-xbwC@$L1xZX~b{oZ%-<2zA4n%t|Xo4+e1x4jrRqTkd3gQt$2y{!NI zg)`3_TeW(&)pp73`96olo?Jc^K?|qP(px`+)n2(ix`hl0NM-Crxkp44XnebU1l0{b*mJ%Pwn~q02V9Q8h{9 zOD9Wjem^;+KmMghvbOu-Ls{#z%0B68lF>Kr52w9PW4;VJ~C!8@%s&0$G{ zQNB5bLx5krvhVC@%gqVJO94Z?c*k&_nAI**ytH(LB?iA{O3<6zNwA>tV^2b1@CvJy z+FX*y3-bYJzc8owM_s*;P#C;qYm@bnWbwMH(9^5>WTl;PT=0Co{?U$Ey}89yVquOZ z6b3`WTB!>pdAu-d@ywW{A79)tquX&3l258@LuhwvC2TmZ0B`!`qLDTJ*EX%K4?m7_ zU3;9=PLLXJF}iJvSN(mG96{#b&c{#cn;vbM-uq9-i5LzM^k>ON&&OX}#J=N1{0#%8 zPmE?hlS3{1uRWeXm5k#;o!&1VC;TjsD7*>&;=&IdC!rB8VieW_={ggnusVDA%&>G+4%m89~95O{Nwn}?_i7zGHL9TScGF8&`I=H?E~rEn;ut$ z%_u_rDq2Ehya-*uhsI@;ISO^rvxUu_(>ht!AU%C*uq5SJZ#Y^4dt1bJ*2b;ZuKt#F zwSN5Eu1j@wm#hprFZG93+#|Lmg`5oHs{(tY(c9ONg8?)Sy{)iX9@euSgM7>Tz?d+xaR6dkw)M8ty8FPScKJHcXSSP zFollle%}RiIkhJgs@J|_<7nWts@#BY@L}cQZa{M5Dj?liq9P2WneSvre)fnUQTLo~d^VJ#X{GZ6djb-E*Zvyf3`1}j>6#>2e z69Kpljer5nJ}v+_P}2ANPtu<(=?5pI$3Fe6xjSw`aPu1=k90(*JlzWyP)&@;1SH1s@fBPVi+x_H~N;K=4z+BZA)v{v^n~ z49HKHhD1El2_S-BEWDA-J}Opr@on1C;1A_oD)fr6a1AWf|*@l-*2$tFERuu||W z!DR-~(yJw)TJQqF&4QN;UL|;gAZIn0!5xCT1s@Q6MDPhgZqh*hmjquU#t`t91RN6l zNbqyPuLX|@{vyaJ5(+eXVgczRo^&HYzOhIb3$_q6Tj?O2+b+h)&_g0B1P2KY7oyJQSJU z6QoxP(y??o$rWrWNE2%^bQSC^I6#oQPcVL@;CR7_f-?l^t(<&xzC>ItxZcN@#RUh9 z*d}Sj^Kxap9_8?_=7>VzvCxN5zG z76_IJav3AThYFq{SSd&)GUG20yh89kpt=9K=MxzY3p#k&lFk%tD%e@@B*F25TnkG6 z<$~u6ULkmk;QfM63chYUXd>Z<67a2{gIBjHfM8R>&VnZiju%`eXv{z%kNbEq{hNYc z2pW%@2v5U@0pm-I2Th!GmVlE5jol~0&lGx{;AMh037TCE!1tQahXubB{8_LB!xm=P zL9n0TX~u&lBB(nc11&m;R|@VDd|2=W!FL3Y2+|;h=`sY%1&0Yv7F;E`T`+d5oID}; zn&2mb#{|7(KZ9n1odpL9juo6CxLA^XoFZP$WV=^^*8gC4Mq67RZOuJOhBUg@NY1 z6hMU_^l8>bf|p9XanXSIhlS6$W&r&fX^c<*CgC3uD`2=J^fBT|mc=!9l%Evk`+q2` z;i7&(v0yvFUPO%K`w4xD;6%YnVqf?g6?(Pcg@W6O1M!_K^sR#T3GR>bB{1aw%^sU* z=|?z71|9&$c=C({929&_@NL0Ef*%WhE_hV%m>|CgDbE%(qiuANY|_9&!BRmCw$T!Z zD3<^;+6LWAXfxUdJy>Wn+6FyN=vhScF*C{rE)v>|vO%vEx>|6fpc!N%e!JqE7$;_w z4cs9NI|cU;(MKN?+%I@Q@CCtxf^Q1GE%<@p$AU)$j|$q8IW|OR4+)ylH0TVW&1f2Q zq0nYD4Z2Kdj;5L3-;5FySwasqsPFhjHPIv1_l~CE;?Skd#Z*}OoyI*I>B3RU(QRJr z6V|ixRVJ0cxKh8Nh)7W?*g{g`Ha8N=iO3aGMF#)H-0+a1uP{Dzxcdk@LUSVI8b9NZ zH%&qhqH+{eG9$jr7*hom$7HK@yHyBlY?&TewGK^uOt{&Ldz>BuB{8UO0oxuN%_7v`QR{RvsE$>I|NzQb+&H{%^l`o3%v+n zn{jpA7P>tnusbU10De{aV7O(!!XZ!JDu{qzm6y>f_7AL~errsKw-C`Vfad1_450ZH zV86#8-vIh4NC=iq0jqr_MYmbRRAJk@mpQ1=XjiXKa!16HLE83;Qb5u=6uY|GPP!2Z zU(oKMaD(Nx^dQ&C61nLkj=yC8k zA5tgKAjC^_J}c+u&`JIAV7+5`0XUl!FiVb1rvYsD~Rw{S|z(J z3VVae38)5$fH6v>FH$-|Wp1mIXyjy14@q|OCK_iEAw^fbSh$)pY9PEaG*HEc6rT-Y zW$wX}!I20>CaZlYPoQL4WH!l&GM|61ym}N$*Q``^C5sfs>|s0;2ao zY%=^woC}O}Wdv5RqR6OF`Y&!kqez^@tA9yx zb7PnLLZb;aGiBf6}udyW1g z)osnafiiU4!@a!ZMhQCt>4V$sjNji7$V}&9Lm;Ag=2~al#0vb;N`lzGzLiA#-&hTt zKuCx}c%ijxZ&iQ2uO?czeGen!$7862fORRA`_1%@3T$9gmF6a_vZaRqxOKHNj$24O zKi%Eb>ck6aPx;f`SVD{1o4crLp;7Kv&HdfAv)`ul%Fw%~_K4^!t9nFgMrOcgjK1s4 z?k#l5>>izJzHa1}s}tzbb#b=)eND?8_lVM|`R?VqLwC2E{yE>hSU>uS)1)6eNL*!3 zE%SumQJJ$=64uK4tf77>DTxZ{n$C^gn5>j7?}7!SD|P!%T4(7aO`s7zU8_R3xx*LX z+d6GCw^=E4qi$s$Mo&TgSQo62-HzTp*k2*L1#!;X==*o-qE9=OIJ+C;q2{lSJ%lK= zQGW$#f$Apy>e%ukY_}85&$9KvBDd7JstKNz{`%Nz#5m93zI(!Vx7Q7eTpw)WFONOQ zxQpvwy0&8ifArj?W|5gj^$5M>A7t$?jn#S&SC4py}_zPnfAzZ(`sco71$t;Ie zi?IJQuIorHoYDD9VHcISbxUE};ClH8=%Zim0cCV`sk^cPSj~Fa@*36DZ4zu{=6W#r zzX~@N7qnd`Xy$q_sJMeP;-9tu8|&bbu4N}i&E6BxZSQv)wKTUAo-!3E1#@fHzH7(A zgrj|em$)paOL->@J-G2Z?&7;zx*cQYy`F|=#sU zLCpEL=-c*DO*&J87q_22OJiySQ{aSG5%8jeDR%u_y^#O-vllRALC_6`3n zM3*PIVC|MP53JQHiMD_HfBy}?9>v5Po^!reGzeVZ{}30ldt) zBHB(?_aW;5UgqVDji{z3)_*=@{^|zl(`kLp~%Wk!``ZRo8Jo7WV?}~eN`lv z5!uRoq~LANj}$uxYbPk&jwG>UxvJDJsFnIDlGu5wCm>vgn#gdLJdN`-&aXMkcp87r zI?G=%l%4h$lsDN~VdjtVo_)pEm$h-5H(3Um&Pt9b(&>E*zHNWNIo@}d;leV$u6ezU z+gf=A%-PC1k)zlI8!+?!STOR$d)$nMgYc6QFy z@cvq;r(N14s;}zlwoq^D$9uv7+;-i)7cRHRJV+~+l)zW$leVp^;rq_voMv^>&*hv?bxrn$f-8kX^e5S0C=uI$J+Jsb%ZfgZ$z`o%6$u ziu)$`VrpAaPKsQt>TlhRs6)znrVA0Cs=-X`hdOI-JN^9|4`Yp@|yl% zzPcBVCliVnT#etH^SE+jD4pJq-9|B*msk{a;*H%tw%-`GrYbxI&XL0UyF5O*S*|2iV+O$EdD_^Nh zs<2vR>{G>7@hkUESQd9$8S}kX)|HuSe>a%L#}7?gJ?&WKLlD9>zy1#O)q6J8#{Gy4 zuBrSHD~I=1{y2Typ&zUAR_>k7(7d%)>%xOS!n@`Vl?|&(P|UqmV=MlC?;6BTtjZbm zW979~tE&Q7&>W5p%!P=Fm3c`MDt@f|d*%0)4XQ4#$i?}DX)O+kh{`l0C~07*$A2hH zWKqWBUxn1g6~C4FV-=bUbu*#y>STg56il*7|sXTT^>iOPz7Hi&XjzFG@vVN ztHF~v#f#>82ykZ5yxyfkFvD58k<(OOUxYZzZv`iwuij*Gt?((^dy&-HJ{9uXLA0~d zr;@$DF>dunq{fTI`!}Vm@u@UaX|&vO;23wbPX7jH{l2Cipb7m zun(46gZxse!KY3&qPEUYp;9+aRYuNZ!qfe@WsxDI&hV*4R;t=W-YUg5;?W;}lklf@ zAw0ru8Z31tBl)$Ks#-Chm00zM5FBUWkArFTKDblvGLbxm^Q1@@Qme^H=SfK)BRFjH zB^p)yu2UyUX>DscwqC z?wYpAbPgL4=TPD+D%IcFw&=2~yg*x}i&|lMXTxnr)@F3OvVXF|*8#ldCN3n%sPiqw zWd@mbWZ&do7&tfTtVh4mtPzd+f4iul0@o9Ot0-cB|J)`HGUw~;L3;Fyu*)AcFJPZ| zX+YEkXAeK+|IU|ly{&Z3B854=kZfY5e{K`!oAY%x@vQov-^~&~zm1S=KVdeJpFFs> zQ0}(F)xTXB(Sikk#b;?je9b?%iEo`gzt{C}8ru$WNF}-0Yu+i0mu;D{xWOD>?KR97M^vYNe#XJ=d^+P(UI;= zkud|Njy-Ma{4ulV%%44TnSNoEyQaa6<#XoDUb1M}5`E9>!Pa%Pvu*wB9dzq4?pHNs zW8HDe?EAZbtr4HZ;QD~czcY!!R*v)iN0S}w1#v#gTa+ko+vC@#&%7{T76dSI$cYvN zu;0Wbv;b3JPMwHS#KjNxtAuG4$_w=WtqU@J{dm_4)z;9JaSnlfsncz3~@T!9Q*ZG2RmiyUD&A@rvK{c zZdrQALS^gxPFcw*y>JKcW+}j*r`IpfPOp_V96k7LBdtd!zSh7Hmq^{u7GvALWpJmc zGmtWLzbb4ov1cb{O%`RevDNp+3|YObzq%?fJ&kWBW|53PJfOj@zO&PvdmwR&Z;;Jb zGxLZasVG&{7-atoL9ipJJvw31r&{E3bY|oM14y1Ip$Q($gK18!e$nkqLg`L7Fcs+U z`>7_*T*P(Li`&>4y^thP`sYQM3L+!^@Z7JJ9=F*?kU4IIgnP^v5^eU|3@^s_KO&fn zN}G70I!d7!$Ajwn@!M{CJG~(d`S9PQV$3aR`i7~!vh;`ZoKz>fAwu-wk2_`X<2SK< zYmw13L>B0KjyUNlc+D*WWsYn;`st+R&PWuyl9gJbr!B(H(uJri%&J+9eZ%S9n26g{ z>&q>gf&!Ux@aB?zkw@*q(w#XI-3~>(92S!OJW#J37NS9a-F$k=G3KUx19+iU2DK`&zFCWbc+I|vvm70Zli4@%{o>j!W2ma%|P^Y z!}EGfh)uwGAO|})2=bjrda>X+g69jG*A3#g3Vog6ZGw9Q9~FE;@Fl^w1wZvM$@*Rb zY@M>9M^=os)y%(zU?)LNTQQttVd50Q`GTtjFBaS)$ORYVzfJId!9NRfDFox+^|9Fc zLIQpi%tHqvLo>nlx~RG^BZh81KtkXF#&Ap(q`HPF)(LJT;)dQVXe=O+{u+tDL-2kg zn)M;UM~UEjTH;?9JOYd{gMTvs50xJU>5+yBjJ^u-S-3yQXC|b8)aa4soDpYQjR7NY z0BNKfA@LIhs|3#$p^Xv_beYiQg53o9 z&Yq50LpwyG3dB)H7Sm~UJGhH8m0-;|&?3%ygcFOZvI%jAgTi>$^+w{~L zK}4cbzZnK~pHZ+=$K`N5!Fp&xMDfZ5xzdO8{;i3)$@&q|e4Gbo{mv&M-PJ^-Gh*=) z$Yy$^>qP`zK}7mlLRS(YXEX35GHhW01nv=r2Z<1D`U~O@kwymoL)l-&y0BegVXdM; z-}6MLZ2i?CyLI|BzIO24-N`@;6e_Kz=WJKmP9Z{G-~C!l!I^FsZYB zD&&4b2`han+2wOPxSAp`E#i&=2G@{^1>p1p^CHby+IyK~?ez$D%0TA_*T;~|?Z>p| z@sxS8MS~mSc}`{A`SCpY^bcMT&y(+n;DtUFb*~_`kv`1fINTjXDVsJ}`u=%tcHt~i z7ex`*pc8)VPrcg#N+qpAM7WvKU(9oh(D*1=zsDKlpm>OB&ya!2QToWUPNu%`SG$G& z_t>tD^@cOuWgh2C@R_E!Uf=Onean1zK*Gph{m@VMUf_<6aI~ zjr9YIv47SLi`{Jfuf^_0y`{5LttTbHJONv4O-sV!uz$9y+up2`-nzO+mVRMVAf&H* zHV_I7wzp0Bdn5hGvw^7Ia&ke);rPPU(|2{kKxipu)XVj=OEIHWgm zg?iF6c4PhJa<@?bQUdawPonsFs!>#*v%<|C$gw9k@oL3(z`^@H4TGz`hVs98VN+n$ zyH7EKnq>l(O`kD;_S9|X6_n^-SGbK;!C-bUrogmrp5hvTKgDhR9dFowmKEJo4VK1 z3vbED(o;sl_dAEAc)~oun=zN?@p<1ls1-bHwjcrzn~8|BhcP}r@B0U)xSLGzd0$%i z;9*n26d`XUC^M5RULChlf22$18L8*()I;M6(#@ zar*!Q@hk}4savmh3u2rya}L;Kg%6|<$1l#4LPkSt5bQi9WJZWy z59KiSSs@EU7c=%bAxlG?C3Kz_vIQ(*n9~a}`&qDsPXPg28`@1JcSk_2txYoD#kICJ z$?T#DrZ&$qvdaeirj#N^d863%B2Pe?6`6`(Oj2Kqb8p;J2oG1|M|pE-1C+cB=U$~_ zp5Y~|x4=nYv>#${)u;GP9S=J2uYd}sUIa;j4|w)2&wjvJR24yr8lhNZ9{qi=)C`2D zeS%Oml5w1}jjFFmpRQOs9$Y><34iJ`=HIX#OM3ccIOQy-yB#O#*fW-svc2&O%N!I+|J)`PoAY&caon>@Q=9c?#$+eR#}~8C(p$!N%^%wzoIKb#JlLi@$d!2f zSNP6D%LTAC?8`e#n(Ha&y2<+WbKHa(GQECi_Rn>%P2bo5rVzA zhW8IU5WLhmJ-EEBt%B8S+8X~L@ma*rU|0|cZgCj*_3F001D-Bh@Ah&QOrN)KiJrUO zEzmRe!MJDCpwDYX8yH9cws|Z(!ZLn;9s_Ynv^Q$Tuv3uTZPpZs{o(D$K?W zN=fPebVbCfXXbRq1@1mEb282@R_e$5!r8^FvOx68ewab~UVE+o&IXitnm)YIEpe!u=;sdwcC^f}b>SvA+3AFl_~|C_%0EY8 zWcxXyVBy24NsOX1_fPd=M5)QT=)4A5`c4KP#K`bn@O?@e!>%s{za~Ns=DAF`4NM{f z$NYgzvuL8uNqJ;5IB8{NK9W2=X0>WgulkQL7-(M0z-M%u>26l+Z3#Xk__5&Uf=309 z39`;8#unrgo@L1vEEFsiEE6mj>?YXD$JFCKy7gmQ+<7@odBy04J&CxK5kzFVK=<3~ zW)11ZvSgt*5D`5~=t?5kObsAD{+ZaWefJK92}j*$AjgV!w+`KWd$ZV8e7NGZ)X6{# z%O5SCZ$@;q`0#?T0vY!A%DvMbt{nN@ufg<+y-?TZ2KH8_4;XM{-^>9=t&V%A*+chM zzFNUu>iAp`vlvwEDHwJNWrb`KI)oFvF;mLm-=D z96LVhoXCg(ET0M9pFr8w=$CeU)cGeecjr%h)Hwvv7u z&NU3JwKgawzY4v{cn(M0&FTS|q+u8}95L!abB+P0cMHjf#Bkd-<_vIx=np(Y-guqhZGW@umf@Wzo#_!lH&+Qy!R>6{uglmk7+Xv%`vhcXG${8oSH#F!CG?`q79{5hxy)*$x+5UK zFDT2}fxk)kQ=Kth%SuOBV6-o1S@s&R;c3ZjrL4fI*&9G|kjVLxz@%*2^7E9#>A++w zXBTMosW$*}I&hH8D9!+d`cR%yc{ElH3}FSxY)7t{<~_+oYxr30QTqEPVu#m~r=B38JsESKI6uPvj*CygQNIa3$LGl{fv3DX7w!-4`m0_MfHNb zwxW8Yzdiiv9jfzoy!d|-jR_NmPwUfX+Hfd7oxbs2hO*G>@wB-B@4z?ZA+*7Ff#+yd zU!Vzjx6d0te!+bF=0WTk#uz+{Ev|fb^0&K^Z|>Qm|0aKhsQt2My6AAfzbJdgj5&*> znq~fVOI$N%%$|R}jkT}}zUzty{64pQJ03$$+HbR5LvGEAzgE(jPCs?-3tL!jzUD!H zPFmlY*I(av%%tzn7&H0u2{YhSZs3fNc)r%3D^~u%vrp_R=~H{pl6-F)6NO^P%iqo7 zv68_V$#a45;q$9loK4l~>1^x+IPMGjPT>_VD3*mW)PzR8|2k~fKa}P1GMm_ zP{H?MIG}tdE9j#a{!b@F?~>WLX?qO8KeVlWj1)B z5llx%WzD?nFi)489E;Z-c{|4#C~j#=?I=Q^l5b7xMW@|?FrqJeBxU5d!MZlKnu@>g z>2hiT`HuYqK>HVDpv5N$ZjX!(*ep@;pg%4J%E9I%WaK0M9KIfNSkOJu20*O;&Ye4W zkM$>p(XqERl&`hGn>0QcO=J344Zp7;B_rdn*YH*iYczaGLuxTd_mPIDHN2j)N*ea^ z(&CN;@}mGyegps>*75(NpEr9g(8XnQ`144*~V;Y_yL_S)flRgo$i0N{}Heim%J8IZV z!@e30B1As!C(CBwN*yta5Cf}B;_@Sg3Y-$&7{D?O%QdXj@J0=*HC&~keCJ2LwHlX$ z0Qe?}i*03tGlcO7^ypmO;+f=>!mNnzul&|nN(dZHbh$D9DTgDAQoxHeeZT$%10CNI z(KV%Y1#>dIgF^-V#ff_d_7o={^QKz1xpWvOIfZXY9b0&dE5B}K_zswn%j?F+jRA!# zVfDLmPs8au>+Za7^x{{V?tIgAx-7LAZ~vusc+Z`$xIQn7FHXT*f1OURnx9?5bngHs zwZcg6?f<#u$f6RM>GYk2ccvCcD{tg_r!gQ}eH44@&Z=gWha(MDy=A^=)hef5vC69|R`rH0nLS!DEU;JCtt`A_nyU&7 z4ugH}0Zl7U-xmMVxN3FrDciyQj-3v=n$2L{F@(X9y!T!IglviUwT`6q( zXYOgJT2Q!vw=KLN+9f+|4O5$M-(G{v&y7|uA=ER3C*fZaG z+lDDxOAaJfXcI>(jg7Gjh*qwPa5Nyiz0Sy z!0Svfef+j^6NBD($+sc1+V) zMf`l15mG5P#N#MogsCT}sf?e$$Ym6`WeMf3fU$>VECC9W1zhFFAwSktqpp)Ww3_MW zKS_4|UR>QZQ&giWRqA_zzk7 zY*&Io2??zUuC6cfx0|Rr5xDVG60UB$L3?5vRA)Cxa%r#KAj#d|rWs?Iv0PU5jH;?c zHFlpWrA#$eW3$=T{VGMaRfj9Y{;$&Jio8Fk2Win4H&Fa`M7u08dGg?(IDSc5g1w7- zuv`)Gqvcp_ktW?c*mBph9)#SPiLjSY`U1p?4B>7=l)h8gfnTLD1%z18R+TA4$hA@y zK&T2^E(_ZkEnv8_1+oCyYuB<6VWVu>GB4p5GQ8YNNPeTmF0uVsYOdIKZKhesals#x zoIiDg)VN{1GyN_;B(60gd3NwC$A@W6P0mFk`8WP?);;}(PaAQ`ya(qmty{M8@NG3q zZ|RK3$^BDamh$o(FSqfsl9#{ovW}OLym)>v1%T$>p5AluE@VXPy+3mqKkPUBlCLS- zLK)wp@V$nyav)2eIPbv)D-W|JKjfuZi&YcnM4H%M*@(}WF@I5I!JrwHt{LLy0qJq# zf1mPq6z_HLI&3z?L)Li%#H~-`ldsnv|Euc;{<-;TP{dNBlW70bocLY6>-=$s+`vAc zcf|hmm6q236T`Usk3mzWA-*6ty=E^BOy)vtyC_4AxF+Ikzjkwq&p=COm^JleKu& zJ}y5kPi)8uit7H^-nbKJWhQ6?;-Q6|a(q9=_tQ4Hh_jc)6ygISO?3LCTYj6H@vc5e z6UU2_fAHq`E`_c=B#AHh%!|G2@}t(^8PU`CVS&aHo%RlbH}okeh)X^pwLg9<(tHmh z>pIz#A#wP0%*EPHrg(^1zhE*?4D2A1_hUt968Cjxhza`<{Vcv#SIZTl%KiRiFEWMT zbQqa7A=N!WZTaIc2aoE3aLKpgM|Lab%|mrj3A zoPUGS{ce{_p4_Xfs_wL>$` z|F+9P!`?#Q*_Z|mKhW@)hNm=?GaKm0IMRC!@xb%`E0gafj<2axgy{Pu(f;A!kj(xA z2AuKDR4{PRVA1J~j0|6aT7kJc&|}xVFJOtmctLb{$-mMur9D=jJ4k%=66}nQjtHjh z>hdT5YQs1t9(@_MOfSn3clj~JSeD&>Scy2ERCV}xeATj#yI1}G zxU0&JZHw51Gh%~?P1LbglsFmDZ6d_cBIi{dK+$l~q6;IQ0NgHycp`8+Kk+tIO^dVJ zpPna<`;p5XDbuu8_qp)di(;`=I>(qtY>K5JiI3L&>7bTC)9_!BM60RLLM8{c-tj1?(_0!xz zzt!>FPct_@exR{BbQpi?`9ILOR%3@7*XE@bA81??!PiK9b*QkcX&zETb-1nxg>glk zjPVv8Xxs|=H6ez!AhbHA81^U`1PR!jT-Oq zn_oBApC6uEShfzsiUq$4$ia8ucqZn6*jPR-8Hn``u;aZ0UOkTIUu9@_MiNt)31b@l z(b-VMU{oO6j_fuKo)*v$=QA)E`ADJC*&K|YNP4C--O`m{LXefHBHBer*hae&%nlA3 zHbhlp)372uIiOjGJcngNR8ym6c=g-}s=T{FWgP~qbdU00kySaTP?CB3laOQBrt|i9 zQnJGA_81#^rx#?GM6qGl5?dqF*5sXrIv|P-la#AN*%mUc&N~fd1sTR-R_9T3&;(I( zxN(yl51T@D65AlL4WY2a)=P|I1f!vlqheJk`@QCOojf_)Sg<6kI3_itnc+V;7Oco! zjNYUF&$Hg>e5du>x(Htz>?hmiZ~@A*Eib#*;N}rw4)a9l=h= z+fig55RmqV@jk?xL5c57;agK%*-`l}V97T(yAW1N(Q8-2N{QR)tdwthb~-EFB004s zFIuU3A8@AFmDIXiZG5y$ZWMyg~vPVS@L3Y3%rP?fDW&&%XGaK zMXX}R`Ve^$JGrV?F}q4Oi7zL1m247mJDt4XtDBw9CfSqvnY@rG7Up~PD(x5)@}=1> zgq8A@$*zQz61US?DPOYfbXHm``B2*eAEGJh23XNCx+-MgWn>iu%Bm1wpc=M*Q(>Z> z>Te`Vtbf;wg`P_=G#&2@XTDchoR$6^FBZ`WYjw>>T`9!sm0=dy*zk}q27 zgQ9UUKPbHNgCZKcyT#ZWTZ|oI$6EOO*daeZs-Ik~7cN-7Ba{QE{9e>FV+iO;I7F7>=7 zyq?#)V|`w4_v^vl?dp3q6!mUjU)?*o-s;+b;(wLJS2ptN~4}83K zSR)#}>tk2d0e+}hm_X~G@nElV(JOq}mda@a@%$K9ePdshbWpK&pUDqrpWk^kPk+kE zLq?$IqKXUlu`c5V=!$*~?N+m&sJJ!FYxP2+N9w@Z7lHr_S<+j%+gE@bo^Di%*^6tl zK#CPLx#u#638NM=hd1y%6HFi1SFoZ+hlcfSM_r?7&sbCN@58#zi#^&0v>GgqOFiI0IMm)ny)(7FO14-PHln4jbS9Ul-r+>cQYx3B`-Ab1#Iu2d0XA9!6dbnE=_$NtLv%Bz zq*Q=(sKzFzRDg1r#wMjy_P1O{p`q^LsTC=_Z#H@qD2Q$JHK4q6g$9}Hso7uw$E~yR z^;YW7+2#v$`W7p7HoIu!o2}HHya_g5Yo(SW-HJqPvQl{WhwJ=nf#P1+=o+BtmW{3k ziniM5Dk}w}V1&L?6H?z|O$znY?6gt~*%BMyVWo0WUf~wHvem)};Z_o(KNp}~u8VQq z3}_63US19mH$&jO93KPS4M@aem4=ao0pgYxR5dfwlH@(r=rtTXL);Hb(sH)XMk-S) zNjTIEPG+E-vQ*ml16RdXU=&{?`<)rKF9{t#{QxR$Lp z7?8GYa1BPt2?$HESVF5cGSA4oTV^f+XOMZf!N5%XVNuv5}ik%^2b!??`-MVAc>OhXub-(%l1Z!QK?*0 z_Q-5I?DAEDq>I)eNn|Nk;ZPMvYaErFy$Lea^Qg5I+2uO;Vb{gA55{;dd%|r@oxgPD z>VCtA51%@9>Z-ld`}He$^wH;DFgu<4)a;C_+0VShTFT!I_|Jwc<0Z-}uEOJJbX?3% zyq@CaQ;BoE-WhB5lM$Ej%9U|-sbgp_FDlpF491j&rFf623L7sI7x2mzbx##9%{VN1 zD4X@-SyNwNsw_}mWanBeO7dTp^ewr!8b+}+=JjYmh0luv|wKxF5J%Cax;U*_(TF}}MY?>7V{f)mGMPIeR#KzOCjqQ_m-c zG{aY`mTIoy?Bk%@E$RCB&!FS%VAwdEk}JXuK;x?W zpeXbrM-*&M>FDbX+XiLG5b_3sZEE`>6)b^$fvc^k`6CPrO1uHnHw|QYvXE+!x%c%I zcY6cfd|^cAs&>>f{zPB#F5^W9?n9-0zR2?hf(Fd^uglL6;}G_(>TFvwQ~-6G{lu-l zKsO^%96B(dyKhWBOO#gmAN0V1)1vfNuxvvwu2N%7`g&1xFg{PzHl^l?3swdWx%q-qT8rNTq)>Dk|Zl%CDet{_UnpxtLK;VXnwEB(*i;ilTi9E#nYFMn{ zRT@5ka^l;$Tw4gi%HI-#{&m7^(V0;^+0 z*N`94HB5u9Ar-oY?D{LuP&EYWCrDL8qEt1w>Mv|)DuYIPciBzzZJj~@QFaV939e@b zK=;7PIz%e#tSd{e?~2M&P+3-eo~%q3to0gg>)Xl75@cn;L(y`T_CnWW$;wq#t*J9I zwZ>+%=1LU|MX+)gYQl9@sIF|9G~nhsEy8Bgyr#umDqhq;bui2g50CP~;no|bD zlErm%V3oUob+hWOZJNv2s#!27xpvsKq-~nnv>_T%%+B5t`|tU7ybkO>?n;U7wf8PzgfU$j~(iO_!nRIw!YX z>}s5umtC!@SGDbGEKxBQTBK~)cQsxUAyU=tYMicP3@~vG?(S743%PIfeXpd%5 z(xCVcjtNT-iZRYX;TRM7|K>4)6`3;!#eZ;2%#+nO8x;T2nBX~S5OVl=jmr=)j$n$O zXdCuFhj@rKTx{Lrb4d1d=cVT*h=+~;VImhGtEcx2857{nd(Zb6Gja)IygqJ~^Kg@- zXVgj=6OiAkrmv2e8NesELnAqagcG~Zq*B! zRIvJ1m{RCr(>jH`&ys1-RGOc$lxlM^h;Xuu2?Op+-%Rb&wG*RnH9H{M?_Gmy9M!S$ zDY&@z_zZ5%^c)n!ItOwupNsgL&5-Dq2 z#T=8ALTFyw2N7%NUG8&(&=p<59?{EG8)Gm+2Ft)Z78){%=z0rp7HuzNt{<{QPtB8)@iP#)PRN$LPyjL?HG^q3fzAk3peyAd68Xlso*B0sW5)LpWqE3# z#C${M++wBK6zQMHm|D9^zWD!&Ie*m^H%wQ#!LD+Xm1Yy@D%Ue3pNMCXsh%0PU&D;; zapOHTYphgycJtJ%wX8IoBE6@KT8*6TxY|Jzqf29YbZJbDt}kLn*FR%M*Oz*9WkyC98IWYW z2F+({qYK=23@@3}9z8~~!ILr1ZG2_MjIUH<9CLDjea-kn{jySf{NR|2TceeJ%?Qg} zh`Vo(A0yk?%ba)05rH9Q$-r922oo}fBP@%PCI?Y(ImB{|RQeV1)L@MLMh2W?>`yZ0 zixp!3lktm1Qg5g7ezIHp>}d`>u=8Dd*vqLcfpE=vtOXC}kCN%7ke$zBOI;2C2)Yw?F8z zHy8{g;g1SwLQc&wy6hM&`nhJ7+HAIiKNjhP3X4jZmeSwE1m$)?53)HQ=YwUzdBUV? zOy|~}X3plKYVI+GflIAJF5}S=BivoGR(4xDz@1OfWq3`DO79NCSU7xmc@f?;lp@QmvXiH-@RF6jQCDNEK&tbw^xGqhG#3Ha3QLtnMXri9 zKMwX1e;*Z07F)k+lOT%51k9Ga8qS z!+FD#y`A7?P@G%=CGfs+!RU!2TvH2*{ku6~6vLI_v2npf-|HX_ic!!QrNf@NcA7qOH9WF>AW5NI&i9q!h2@mEWn3=w%=f|tOCyqA7e|;h9qK)KqD896t;W~K zvq`pExnhbxIkBrtX_Zk0j;Y<}&oOq3BctJ{k$d3WC%TD;tD)rmKwS2IPKF3hMO?7E z_y^*ACUo6@5uI)cVMK)u9ad5qKpN?=mqz`TW>*?Z$bSk_rTqA74lE% zF5U+*jyo)^=-S=45vu4eYU|s$j_~-ylF|ByThbb1AJmZv!Hj}pw3eLVeWIRtmST{+ zqE)V&@fS_^yVfZ^@^u#n(nZb1fvj~iI^~E-qXI$k5~JSvTb#LWSYEuSUKQ}W3(gla zUh$`Y&vgSzp~m=jLUf^l5Uo8y2u)!;s)&ceJ&zFa12vR5@<}{n*R~~QXTu63ks8*! zHMDo$@q?G~(pNhmB#Fdnmcw}YnF&~`@kJVL(C`-;zO3Qf8XhIYsQ5rZG4dAEPZc!% zuCZL2KM+bMV1Px$@lH~#;W$FjU#{s&HLTFkRz-iQap`0Q<$RCA5ao>5aGr+O0$NO< zXL`bw8rEvKS;O5L?$waTw37a94Nq$LnT9FoB-7hz*h|B{8jjcSQXf2+k#Lrdm?x5_ z1Tw69h@#>56GEr_kcPh?1OtAp)8)DEpnFc^7vZsFz8`2fN5fh|l(SjG{Tlv3!~fRs zZ3TO|nsmfh8m6L+EFeR}^EDhQmedC`;udT4dT~ijAS3IS8hup5{Tlv3bUGBw5U&sK zf_IXW!Sh9*+daK6TFLs|2}i7 z7B-c`Z^`U1(oRdddxM4LZ@8=`iEIqMkli#(CDvz#7rx6;l%rFHYeSQbFGbIdgqxx%G|^SOYa>Zloe=?Rx< zmk}>;+IFF+VC1?W9nGMe>)P=2MVezsbXi&J-ZtVHU?Y{OSkE5)iC@Tz? zDuosnJa|X4i^JDWbETFLBm1(83nd=L-3!aRci-r*P9<$`T=02$)dIa5L6hh(#Xe6HjF>ql~H19>+F-~5=t_mpEG>+yfCBRS=xcsvyeEsf-FH;^s0 zll40o$=_}uU(WmgZAbD7zAH)j(P9xcK5o4zQh?H0iq0}`4_aiQ9o=yF|XXiX#)nZ71 zB`N#tU$J84@F>Vw>F@{v1cyK|h41FT<1EuKrD22Vm8YtCy@OU<1W@Z9 z0lDsByNY0YxG;^H=nhCv%chBL%<;rx zM^4Xl4-O*!7j%<5#>96VAk~?kH7F>j0veCuBKKxO^Nl5lWFPSI4b;cN- zB#YzEh6;=7B<*+`GJPP1;8`tfbCw2*&QbMPH9Tr3IFHIQX@e=1by8C$jXIU3rn2Rf z`Z`luO{%NATPpLpyQM|4dlueG)t9tT&74wJ%LG|uv<6v?w9ky1_eRYco6&ieRH6u3 zT*?$TmRci@pZ;JNt@J=zc>Zf$_?LRnKEe&zRYw<+(FJkhF|(t1ds(23m>G^sZRQV3 zp5ayVgqb5sI`x6KY}<%Z48JLGn>e;N*iO9sRkBn{`NS7D1qQdISBsqOCHA#9DG5L(@xz+XhK06>jzTSie=BP(p>9sJ;AwHA72Pd z&dV_gHAtgNsd4L{;Lx}Q+pO*2YNm4Yb%V{KGUk+8w;dgo*6m7h%OZTkORZadN2PVU z0i;7z#U<3n!Ms$e-nPNd)P+j*_NmxE75;!`V|8W+Jx@ukTV|fpx}}L*IwNsBG<90* z)|jQVZo8q%Iw!3g@9NpKZYn*Zb(^~?knUMBpg1&~ zF&a&jNcs#7<%zApn>(?RuThBSDjanqf7I}KLX=al^5?kzq5|qr6lCBg6R9zR=_|cn zO*$Fu`u_{HjBPggl;%hkJz#b3c_W@sHwMwogy?9${^t+KbNr%Kl$~C4XZVJOh744P zk{HFJARJ7!);@XL4)^vOOXy2#C74%F1xBMT(;>BVDnw;hLq)xrO9Dj zgEMvG9Yf^4%W&D7$Y~;H*6MKC8_2V?wd z_U48#zLBe>cVg%>D)@4 zSjBXFJL?iG7NJm82#FG8!BL`UmS{!vI7R;pLG6Db4mkZSwAHw&aXUSr>FspCY{+Q~ z?WmF;)^;=Y!1apVFXd5yzM}L_(@100HfQB!ihEF%PNAtB{)J$K$?fq!*dAVuPygyV z@ONKBU3s{)t~|>4!a0iLaHX3AuU{>*92TBXQ~W#F9^txG{Qn8tBV30yr@GJIj_p+o z>4;Zysf@~;`P-FhZWy>me4@SyO<+B5jJx;9e-v(~LT45fIvBjX|LgSqJNsDX9d=T* zG@4l?lr<>R$<=7As>$v$X{3Jz`cIRsiLk{cAy=Xmt8Z$%3MjOY2A9bkBj~+&bvmB* zs~f%HitoW!RqN0EoQI;1yVdI8`!^3f%^~Su;XnAiH|MZb-15Lvegz_rNpbXfS2KZn z-pL~lv#Iv8PHXP7Jnd&b>{fJw{SQ3tF~d@J&Wg;$9DvS=xH~4|?`V>3&U6RQG5xI$L~oYT0(o7ab!L#%Qh; z;w=U$B;z%_bRK+$KnCC`bl!h&ixs`@3g;vNB4+xJkw_&~{3-R`6`Cjj0S+cha z2z^6YZmb7{jYtlpdB>WIkY?tQV4UszfZ7U|_abvGi^zAI)l9uuqaKs*>6UlA*&vg> z=1fvguze$#ml3_hc8y^EH>kZ6HJW7povD|aa>Xw{s21eBlT4Z!#~Gv0Sc8_b*f7Tn ze#Um7@leW*WdNqR2^Wya`d$MPu?5@Z_dbb)M0TT%aRQYYJjg_CgO-Z7zavg%s$?E2 zq!QR)V<}fBJvCdbgo#9NP^p`(1opsKMh(L#-kgN+?t)?G#p zR3G?t!fQc0<(FoYZE0UAx^BbC z;_WvD+9x846iIXs5ZUoxK<$Fdk3Xsk2}@*nStj936;34NBLten$bSE!5fARrMK;JX z-o?WNU1Woc0dA3mF49XV566KQdBP7p5ijy1&n%(?+9Qi#K<+3+5ro|Liu%2T990M_ zH}GR-qhoPnEmBagC?}Afd zD7U9iWSrb*F7=RdPdaRg5UI42Ep79bYDB4Il)ImwC$(qh1unOxl!=`#9yy}l@PdMQ zOIfhNY7MFk4OU^W3PV<5$SMq0;kaSD+Rl^a zhEfk|nNnwJN|mXz7tIx)OCyTUeXfgPU4h5nhiL~lvla&j##at+#ww|6lqy=O`fQC= zv`dUKOzwGa#w*VPwPPK=_OqspobVlUiON}znbboxZ$leCiy;yhrRKKQOKY!7crRA=ri>{wPZ_%9D zd9%t&uM=(mJ1|sC-X7>K?%E!>UEJNteTJicxmEtt{|$cj5`9@ocqLGAc?->;e{(07tH=<;o(yz0x+*)x3dFmQb`}%&nB9!; zD?7z~jPvG;2N365+7{|cVf+SmiUae-$Bg)9o=)2ckFS2(B^28@ShNOr! zYj9fOrrm*Yop~SWtG@t{5}Eu@aRrp?BjA{g|MaxkU9{a1@QcPkAZ^{RJI0GEp9*y1 zC0R^-Dqyag(m@`fkmBlv95hBOB1A*363PEey;OWrX=MIO+t~YwHG2YO)ytGQSF2Xe1?;#+yWZ^mA6&s)LXt`oOcug7ljx!5g!W&K@pw|EayE%v-cFLWtX0qdwF(gC6u;qndX*h!*yC2(&i$~E7QC( zZLm&TfV3${Gi917(+YH2InpjhT2Q71Wt!DnCoV$b1xU=3iFq=yt4^yxT3@6U$+RMw z)={TjhqOGTRm-$$nU z&7q3I?UX+ZYxy3A`O1a$9oGo_t-#-x{KMFo#Bq->KAH?K0tQ}cTs8I=C{I3w(Hcl> z(~o};ar@>mfd&haFVG?)@WIE&!5ipH%#ZKGrX&ePk{S*e51?HU9Xn^V_aAG=OJRb{~d&H_CJi& zu>UHAtKf+b2sWku7U_WrV#149g}DML_##!Gpsx7)h+bsg1`2$U#=lJTVvTy@Pk}S| zAf;h7w!p@df%qWho*`I*#9vDE5?xecJa)S9gH)BA6yKTXr6w8f#s_JjKdC2)k6sM4 zv-Tm4KO=w&67dmQ!~i}*+pu}YC|O3$f;McOF?K?;!^^#d`wUT3 zJh*ed%>!hUKPTQK>9@A_E}pRNCb_yMm%3I5tPvwdjPDkE=>m6B=zpz?CX9u_B5hhST%mo5L=&(?;`ds@9D+)JO!b=eBUYLn=FpJjZG34 zV5+Va$&KCfed8derQ4mKu7$so>bkC8W4iLf(-|l4zLmz4cW=q-A4>D9A};&% zJRF7#+puYB1I3B5xO8!{Z8{ct55~{D#|uwx`^1uNc;n2Qh~?N?uNmN-g`vQ^fuf5z zsNLw|CPJ86*J`*~!z~(a)sQm|>2_+kTf@C#RCjaUuF!k%A=H!4ksA}^+ZukP;pZB1 zk37>yiz9w>nYi(<=j9nsiOWJ}Rz_%`LqwqU_A(>rkB5WU{$`X+MnqE_VOSScqH zASY+grwZicocan#$%&AXqwBAgQZmmWCA-v@N-3!vxJ)|~wqm4Y2m)j>1dCHTo`*O} zH>XtWfw&^XIi+D2#0^56QwruG?mWafgIwMXAJxfWwOhjfP(kboI5SN6w=2EUL z;#(DNdZNJHIjd;<0dF5^+d#JUN64Tgd)}69KZQ)df6&;ntsm~YXBJ~@9}f>OW(|jf z)5inE++yT}w7Qr{rZ10}8Td1>sF-_>d1>*d#atR%;K>_};yrVvc2#y|$k#jWu3opHIJg8OFwR-}ggHy{-f?;#+N zc+|%QDE9O*kES;b>2X%j`*z@7gyI+D;{8kDVUWP&F`iSFw;`ZpmplG5qDM69iKiu~ z_uW7qVkrh6W4Z6iawrCGC3;jBl^9QlwcfvKGzo%H(t?XxRR+s_Z58~Q4pDf{}pjq%+^305{^}2FQFVh zP+$>OYH?`u0F}$16aPf!J*zm36A2G=9Uyje?2~u?vn~T-am0v`?k<^-h?I(uf-V1z zA3vfCrD3)>c}-ldxGTrJP;C7?&{ia@9FQd*emyWm#P7k;U$NQ-DHV4?D!PppC1R)F z5Y~9nwTPC@DWUtkV7SsRg)V#2UKnNmuMNfWcZqI_*vQ=CVUNNFiH zF_p3sr@k+tM3jPZB?Ki-hKHaO)pO#!;@Ro#(nNJak7W8D`>jJ%;y5;2REj)LrdL$% z?V6^fC9I?((y~Du>fEloFGEVp{ef;>#F0Pu?(Q3h-po*PvchAgL5#;r%1TPg5#onl z^CJHQ4vI9f?cG4wD=7Xh-Bso@Lq<@(yN5D-$x-*;{si^EW{Rn6j=~| zS0FMf{<;Bk`6-hvKh5iG@kfKXvxvW*NQR|9Wq=ZYruZsowzZ__OS9J`<9|c4bp6@p zj_1pux1B~k@tLUGn<3XRBcd-8iaj*b7JXUvlB5!S+4hp8D{w6{=a}b#I>A^C#296m z7BK$o2|gn9M#l)fG5msaL+G)6wwRmWhRriBj1hX{nh8B-bPBy@GOr6b*ox2_{C}Cy z^Na1>OrKbIeoldse1C{azKjtghIe)R@jEc)4esclc%nw6=tOLf|pno#rcWW=>Q|AcY_ClkGSC4rNs%P1LYwT~~!9$S~2U5yA& z4m@A>C^(G21C4nS@M&6tR| zM4eIPODt%fk2GnhJ`r8`BJV(BBm6~vfxpH)`qn(qcnaZDIEK*#9U5juT83=N$kypV zJE)odEW*!5neO1ZWix#rn7$WG-iN=v zn(4a{-W|jAohW<<3fqal9h&JpjdSZ6Oy2^^%}C)1otrh&YZ0zRGaNj(Fe+PS`oIWN z)o7*#;ceUMa`)t>tiIf3KQDYf&MO#*XQK6ICRC7$^pJfB~`c3FL4;$TtzYY2Z@PJ7kLaIl7^afawQNI>9U=0|)7JqB>4Oorv>X;j_3WZmr zuvPf0mN%dYesN<*{GNH?d3B4c7IUN*!s%@c!<+HjijH!!IZsX+9LZllg|yCt({t-^ zeC(b@eB#4!dfP(3b+?CFb5GA1w&?SPe9HIC*|RYEgjdah_4mSI3;ATzD7jf5XNPCk zl~jSv1qZBeKitsF#7<4K0w;%faMJ0ufVj6{`6q#s0};b3rNbFR zt})F(&g8(!kULmn1x}vlP6lxZnGrVP%I-d$d@^vdhm7sP;Zow9AyY9!nw=Q;os1VN znY{>{?BdBnBl2XsyP(|&M|zVhV{^ZzH<{>7;AEO?cBbr1TBI{U85?Y&Gw_ppW^dHc zut!E{d*HK8%dkUaFD=H`?mXCBhMytAgSa(8%qC=gP>z_O6yAyQnkz*(6ravhBAhg?X8Dx(jpjrDPlcLi zB+(a`dMKx3#jKLyO3Xq~gU;D79Jx~FT_gzl&5Miw;;kTJk^|1(+YYVIom^% zSr9;aYj@GUiJ5rlatr?2a4t`e8ZlP%wb*$BV#O?P0L5(U%ztWL)x156Z(2+-Hf-Lo z#hf42(6wbD`Ak_D%j03z+@?8&i%vtz!SVc@x`pR9n$?>vd(8p+^)p5E=}@yxw5yga zW@R5CX3x^c*;TXml;2b?`#5`8xucJ>>fp6y&$Y6T@a591kF%O)7G8TA{_)X8I9-Y9 zqW%7N<`e7eqneO&wWv;ksLqrRDPOcR-#>8C8t zEVvcJ=G+EY={Fc)&Bhm=o>O_@nM%}!7X++U( zQG5fs=hc>(dc$_dEB9w>wH)+A%M5K4eqLh*HI=s`*vZyZ9sxqlU(^|U4rrwHNyHiZ zXvWOv#a^iU1r%hSO2*jE*r}}Z%;Cj$#=Z^+mhWCg+0b8dNhqqnyoH26rk#s+#!g>i z+8O(Jq-kgDsi;9aW51k1+Zp>?EZQ(E~D)%+$6*RZWWoh3Lje5+hnfh)Z6R~v5K7y(51?aXI8cCC@o4%vE zs6=x=Q~#>bBmWRX z?KtgiJ?>R8EE1<3tjED}0C8<)c{`Qc_PCRV_~l@;hlPnmrP~DU3T4bDi#fRh%R3@(><=d~=Ukb* z-b%Yl1~ypfHbJ}VWXxJ-q*WOytMF(1{0?SRyNVf@eFOM-JJ9!L$oYstA z4fLx{a{L`#p?mqkigcSo_p*UG*-P%8Xk^Yq3z<{(^7R$^UcR*=-6qhze2p33K*ns` zz`po1UVWGuRVQDxJ6Uh7NVh3;FAv(iEJChH%z5}P%&G3>KD(FCu1L2DbT9YXy_|_m zitp6Tb{TW3UT(2_xphUlO`v{h9NV-!rG`sO@P1iF`N>|Pcl z6Njqt=@-#nuCjZ%dPTZTpl@Y0GG_2rP6RjS;?Kx12ASx;?q=h1eKWsUo^F%qZk}3> ztQ@IpkZlXIW*HTj)za=q9L{!Fo<<92xaD7-Zd0`TrHuK2Iaz5tw6Q<_j4sBnm{YN~ zVY&UB99^Dnljus{Le@-HItAG(nYEjtD}2qa@b%^CcB-zh9=Tju1`l&Jer}**3|lmK z8=#RbpYP2^CZaLwmuKUVhAXLGsPjB(8kT3vY4~AH@YeEdIS)S~{dIY2-dGL?4aTpH z2T>Mg;vCGxHd2v;sn|x!b1)a%$dnvT##?o!k{r&)HU@_erKsOVXXkK2e$>ztat?gO>wUE^irVdi{I4v$(KBXLlMoKtgyjM;>yWgJJ)o_LLV zqk&mzp5&>))clpCb56|}GKo{O?5RET8Xpy>Zx;jRz2nP zEPKk?_Y}u`rrQm(4&Bq{^D`-QM>#*Uqn0ZL^Bp(28QJa&n6>!~y&~PFa7@s$r{^Kp z5a#UQrXwERQ_Rq+r2y%@Q!WX_J3dk3?so??zxJ;fYtleAMkUEqj`TY}w2@ z)O`)Js(XrATJ;pOv`wLV%2`_W^gQGm!kok08<{GYEHKXoL&5!IOz@(>BR`BPpVWP;opD34)wpm^uzzR>sMZzWvm zRflZcyR3}SIJ#;^23QSng9EGnR&QQ{d;WcT9xXFlSHyjx3JKB zUSzZ7j#qj1g*^7c(O7w;gag+#{64nvdt)1auibdn_V;7kzB0CTU&OZk#n{v*tX3ND zdD_ZD`{iLA2VIrZZos{maJTG;?1Q`swd`T7Zu3uL+x%f{n?H)v3|DPle}iOJ7cV3n z`Tt)DlHp7B-TGA}EBDw8e;{!#QTynPBiGB+mKh!$A~CHy9T!u?Z8yjwLU#T2aoisp zsbRZHwui%>gqX~Kh;7}<*w%f~O6xqAuu8+vjjV3J=O%X8@LN3W1L%I2jQ8x85t8jM zxTcJsIzsVW?g2iN=P$=ew$*61?YM#4ZX<*I{x~y*_@g@cU6tIKagsS0tCrVuX0gAE zd%&6R>DXe|HY@h;j$%FYm=m4!duohZV|F+{;%Vubw(FOTa6AaC-+}5ecE2h6Yd_TQ zE{l1nKMll;u{Ag9G3I7ro(E&cXM-A_mOaLfDpuM>Z&U+x5VL;6N4mw9Hw9u^zDl(% zGX4(5Hho)c)BhRUwp&%(?3Vv7HudQiTkd%#`aJ*9@jP?ucq4)03+-~r+6qPELV!FK;j&)@Zq`57~o&RuTJ&H_oapeRnJj+sRhwjSVg@V? zGv}H+#h8(S;oikdD+@%yP@GHCWga$;pY@=i@0Xc>5%qubC0cyNaGduO#OAQM`dA>> zd5(7xzM_zBmAmMN*bK4H&8_sWdL-$n14YjkL2>S+=c|l^ev72PA(kH7=|y1nhyr^n z{U`6nrHT%_%r;`i0-T+WbAr@I#lKyRfl zf*PSwoLmH)Tj_m6u(Lg0bb2QXr^){g_$1^XCmw4Xm+u?h-h~ZqIF3D4L^jjE+X1^h z9GmGk40qX^>3tt}v^|i@{q(Poko)O<9r9fI_;|UczHx-wQa=LGw~8b8;<%w8cgpt| zsrJ?H!;9{3adx&03%(mjU-ONN`Eiuh?6Z4Wq#iKZn>MI`flLZXX zS;?JI8n@IBA;gyY3A?bRzPlmnuQPYdACC`5?mwq~gm57th6#7k5-uggHww2HG5seR z-mf8d2{C>QKEVht({P4{O9)wxc>BkJjQPLP=r#>s(C}pq-_!7aH1y&Fi`h*Lb2ZG< zaJYt}H2l7XQ-8WYEiDllf1)Gq7DxUBAG7AmaLsUVP+CxYfJ zaHEFXHGD$Dmoz*iA+#>-0E&41q37!=4(xsNtI$eyHI; z3Grv(i<3Jsss@F@*n((sTdn1RLypaGG!i6ua-Q5wBa!&w^6 z(=e=|rQ!V=KBVE38a}1rVGZBZ@b4Oas$nwj3#(68&~o+E5q&fqui>Q{&eCw6hPP>W zhlclS_>hLrX!v^#4{P|QhM#HpxrD+U$ej1>d~IdEKJ31$ShnOO`RHy%{wiqN^DxBk4v%^w{}8|w<^HZ{CIZE5W(ry|vw$PfZ?n`!YcoEK7(yYra zE(Au_(eO+fV9C2mOP15yaK}T_Typp<I?ob&P}xI@DfNyK<)m?rCOG(H z3Gkll7%tJF#AF=S6-mn~iycVKhEYqbZ+=$SOpGF!7{!jFGw*-1Y(tSPJhN~?%rGj& zFe-HpqciTiEamXu{6=-=sE<5`d#v-=F#Fgfj3p~Fn3_sZXvtXzlP=V4RA-l-S*U$@ z7e06 z&Cb&??A&t(J6n1}zP91kw{H1&({M{oE_FBy?Wo?^^i$%>?ushSYIeY(E)Mc4M*7+EDm+)QJG;0J0?Ou`5?*+6 zV#L*IId`-quKGbB(M}j+$ZBB_tqmnfd1gy2dk`s!#djb|KukJv?%>;#5?CMT*&{ld zY%vubBQIpDkz|W0jDPi7lvNfbatEYIFv|*3Ws>qAc*9|izqMmAHkY&pe zVhfn)Amg5xsEDd+E}|@lj8Z(Xi%@Uq5w4t7L`hakLFVKn1r{rhODezT+XIpfmo!w${v zY*4!SFmu5r`%5g3^6QnzKjf|7-*k^Gtc;IT>k`CE5y2EO_7F{qT ziqjO^KE>AQM0#3>6L4uAOh4(;CA-F8Z5uS6V^-RPL8A?hNCP{?jW>D2JT*2q-g0mQ z{WsoL$z%uXd&kL*BMxrpu;hjgOK!-pbOle#x_4EMagqZXnIt)&kqMFm?mJ0wFlD#F0B;KnQ*sG6$?)=A!Uz1~$L|z& z5NnU721cG)##)fbG8nj9=3ACa$TDHjk{d1C_I%Ej2>$qJ@W&dRzq6$;qz>QJs^{|r z@zSGaQL8pA8%7LwSg^=tWa;5rE_O=~-G9Zj&nd&FjzHar_sIUp2C{1H(cRJ2GR8)k zAkni>ddgUv;h*dG)HjEf={U?|#d7J?ra}`(jQ!bp(lQul6`Q))jbyTLs z+&;-;kK(buefl6w$xJNTa@je;;vB`|Yc${eo~|?pX^F#^ot4FM*qtkjVYfjRtMe?U zK4A`N=IteVlx6+qK3&C$T)3n>_JsMPZ*pSgE;v!Y*bx2h4z@q*s&BF5A?33>Iw`kk zRiNlLf6)(pMXS9`LE&_kglavd$>!V*NdcNqnqJu>TivA#%gPrB@ z*>{xFy~Tox&nQUzE)!}EcLhz~R^mvbaUn8=b;>c=$s;DoA!_i$>O*$=|nno6fA4`c{9CmegMHYvj zhW1_^Pszn$QB;}h6_fVhMdP?QbW3;mo1?q+k{)VpxJ?=sNtL_xwLR3b@Cq!hE>_FJ z$8*%Oa0w*g!RWH^mL76h7+y`6oKA&TQ>*jS#1~kPLzcrK3Tm_CeRv#j2`=nKio1ZaDlAniw=NcUMlo1{i`+w+3 zv%umnbxa$)9WaFsBMIpPm~fAV2Q~am!!HQ290JKBp_dTlNiSc>#}mDozlVl{HQb}& zLBM;S4ix_j$4GvsOF;LN4_E?voDf4XO_U~J>3HD7SXe&VJw7EP)QZD%xc13{!}EdS zvN(SaD?;(HD?XL8X}n7b05K8Cndhkc!(a| z2fU_nd|vCAdW+c|Brj?_N^%e}Z#gKq^PYH=Vjp5&cTjK#KJh5U?vOZsJ`Uk3&?j5= z!J%9OfcLY{>^lz;0}&C@1igXx2i{lXy{eS2fiGmAH=}~hsGv&sqE_Qj3+b3mjtY6W zV7Ewx%RVOF)vnJ%1&rw8sE~L*DzsTAj`u-R&XY~y`IIU}^-dh`jkI2oG=ZuPBey!i ztTRgO0=%oPr4w+wEY^}&Wkm~ML`M+V1rYB5yekUmq6=(KK16y>-2ySY-&7QEYd^VE z2j!v7A*zC+RE2ZJ@y;kSmnWoIs3ZfGbh0CWw*#IByoWwQEgg7A2c8DJ1Mn=Jo(dcd zi{L51SzeA#PX^8kZ9E8^<#k88JhQDWB3L0Kx}yO}z*(SuMq3-;tkA|2foA|u)?8r+ z+5r!0HnRiiz}xC{b|4M-|6%W4z^f{*zVWlqCFerOJtQOn1L3BCB!v4N;X_nZRICV8 z!aYHR2q>69c2Lx4sV0IB71W?qc`YhhR76BC>}?|7zy_UN;SP9s@K?<7`WSn$vY5y zNe?g6t#%+t(eXP|^z%@_4tkhVouCj|#0<0J%urDFzc@je$SRRD6b-!NP8iZd8qXKU zo8k0KaJ&i5c4jzdg6Y%D{P+a zPI0pMUzjV<|4%eo=z(;AtzLa@38s#Eyh|DUpUd$>Hs%X#37}DbICorY!tX!t<-?ZD z8VGB{D~Lm&AIkOO?d<1In3<$D_Xt)42SGV#=bB-6Fn2r>cT-~SD%{aZ;9%~DxT6&S zB5xGws5{`p9oc;F;f}05_;43FhN!8?${VY1##BQiZ<_>Sph2aV19%-Jvup0++ z=`dk}-h4U_m+k`jbhs$p#pct&qI8##Plt-4{SW4*L}=*y9&aB9yI3W$P}dhXDs<|w9S>J1186`&M)i{Y|4 ztO>bl#o((4V=-BWCRH#7~O8uZyM5csyjL4L5vL+@|!qI1>_V~=+ZYYno z19~!cDl)P^6HOs2XE{mZg}Q4;c{b|*Mi*s6HYBpY)AG~EcLY6~`oB>?0$7zH#+dW; zFJgg7xby6#NLi0wK($3t10CKYyxYX#d=bk`8au6JQP&cgV^tl-(}A}wv1#$FSAE8` z7~CvF&9c!fLk&)=I8xY3Bleh%*ZHd zVu?y)pTfO*IaC}Ca3^9J)|^;r@-hwnFP574I1}vnb0<~YgQ%ItP#n%}gC%EE6Ni`Q z4N^e?tRluvxNlIZ(>spSlX7upy)&$u9%?78S| zWs{{p`K)*HiR3ir5%Pb3l8NLr=MnaQe~O93bkH9;k6_nffn#Eunn?6OI>bv*R~{`v zT?l!qm!OXGdX$%-v^ahF@V8Gy&nC1$)jwv@9W6!Q4=+XG{~p0`pjB)wFGXqi)$&r5 z77(@JrD$zJM2;j}b0rkMEYCk$hX38$Yhh|c~W3D8>AFc2OB9yu84 zTzg}xNdYZY4V`dWsv0`U(^9oLG8i6V9b+SKvX0G4_S#_vGLNAM1~QMq2%M~AAOa`r z=#Ri@EgTbp(^|MTSN{T1OKV~NEu@y#!g7bT@GQ1mwX_(%mO5fBt%c>ztc7cH&04rN zm)646S0XGJ8?aBG^nY_(crEOD`B(U%8^3qspVz|602fY}b-Cuc)x?`qQtf}?-cvw7 zhnpiZ__uMl?_nZP1e@?)5ITzx$3nFQv!{#*L$8B2oNn<)A_RPNTm^Q0Bm;AHeGCES zd4qK6BQoeTB-!*qKdRfFu9LNrB+`fzBanz49e*L<_2MgG!sdeJ8-;uCZ>?9s9^<7w zCox_+{lTB&ofMc2hQL8wyi?3s7lC&Pooddy2z(BW-f8Bn3;J}+<((d|YXE7t$2mlv z5%?RUfdK8K@D`fGF8D|cZ;?6dB0z!fyfXt-2s-Z2_c0ai+Q1>;K}$i@qLYtYt^&H? zpY;?_+WT=n-QcXJW_JKuBWq}f2+m-~qfn5tSbB`+7X65C(JfvA;WHoJ{4odR)k1S> zknX8kTGou7*D9tu@KoJg)@(hY*K6w0#deByBBWYtvXc)2}NKapvd1- zwbBNjA13cFiqv)uME2%z?QV&07S07Rz3ljz z=mnOot9ZQ~pGs6g*V*x{BG9#V{9etB`bV8s+wtxQa-|*rEafD^%j|f1FJ;gQJN^h2 zt6b-_)QZZU1bVbA9-q&Ksr6;?brI;{GCMw<3L?U_W%0j=Ko6D0?yDhOQyl24FqH*m__+!`QmAxJl@2w`!ehfuWZQRt*d~fpPy| z4HQa+xDptY3bq0mlnPb}tXCLY2CR1&t0==ZB|dy~x*Ly*=qwn#yiX~SNBazS4H7+7 zM;9mZ$SrhZaCSt(cZ(Bw>=p^bVMJi0nw&`tpw}->+^+_Hh}fA3o>P{@L-#tjey)`^ zaFpHP`^%De>>B(4;doSoudsnf@b4>2;^8~nE#ns`*fmN67&zE9j{IxDk6N80?8Qkm zQ5bA&5@ltuF-eq>!A2+1_Nii#n~+3-$qY6t3FFuxg-IC52AP`7BY8eQt=p~|mCR#V z@T!r?JeV~~12&mQv%xpn$vmD7`*6HUN4*+!NHULS!@bc?<^gT+4R$h*=o_S}*V}e7 zk7<*z&Q9h*ZSb{rGLLG5SKG-vstsOgC-bm2_%b`0$F;#L>|`F;H%f*}?PMO=3j{Am z0eEbigrjB2Jh%;BUzW_H+u(=Gl6iC+ytXWvhqu8Gl_m4|UMLytDNE)7Zt&e@$vnah zZtp5f<}q#(c9tdcAUF8-vSc3R2H#ee%)|U9?%D3Df+X7GRwCJLDN8CwpD^eqpy(6^ z-3S!@$DkX4+8CAwUk@DP(xB^rVqh9{DNu||gO-;i(Ogg}8LtJ3j15{16d4=@inz#n$sr4zhH-^UUx;QPg~s=C@rC(*uM zBZ_T&6&zox5Awhkyb3qn^ur$%c?k~U`^8>@Lqbl7sz?=;tm2>GfQm{t-PE$!0x!YC ze81RBkS4@%h$?k#R%#$b3mp3QpOCVyOKp+q;5wbIJ?K;H<8RpuF0aYI#?8ZefMjvb$iuG^Ao=Sai;Kf%D97Nl(E~5)?hT{wETC->qpGA?Kj(@kD zs7s?Sw-U-)Sb=?9p4W--{b=C^x)^0$td;lq@x>`1XVTzu8!2UpTWQ;xxixpJwSkC( zvK(#j(_&5C6%loO_244xk{fcvj2mvbrE10k+I(hRN|&g5v`es0_IT^R*%;hlwdSYwG|4W$d; zo%k}I_!^Y%xM+iV5R}@#0fje?oXBwDNSAeS9*o*3?MH5xatKm zY;LKldgz8*xk!zNO`|%Cs8V`(^LR~HQbb*F{d3L{iA_{rgJJWN)sGqfTm+{s8r*T& zB8Lq|jouE7O~-fs$Wb$a9*^_G1^JuXrteN%Ee^G*8flQm8PT?Ai}zmhrLS}A-0`>` z=hz><#Hu66I zK`_|EQf-?B?@`^xq_naNVE=~3#SU5O8FIUO$X(c3n>{qvpMGszEcVrc)(L;+ADLcr zNO1)RRch&zV~QyRQxq>*a>HB6yz`@Y5r4_$nlw#~zYae(#nAD_BM@TfvgW~Tb$Rn( zu39yzvuv>)Fg!&9Fu8h1Z?PTw+gLXi9h>iPw@uuG{OVUmTY2;2*Gr7cJwaWP5rQ{u~ffj{cU}BwTawi>#pywLojVc zayIYPRwGqYqLzyDuJs7J|=LZniTYRQ_D8{3+**%lY3S~>U*_+!@@SXyP3#9XO!DqWBO9DrYf?&DecME(_;1dG32z*1}2Lk^g zkmAu(0sL4%6Ko-nTvWn)2-H!h@XNyGk}yeNu|QkkT>>8vcs+jPBSkk6#E-U%1uh|o znz~)+O5kGxpBK18;Ja`L+%^<_N;iOY0xeWO;fVsX1$GlSSm31sCkmV+&=$zypP=U< z!JiWNvcNwBUPBpuED8S-cuZhCE$Kl&OJFyF9PSC}mkK^n;2eRrz`FzLhb{gQ|Br0H zPBPoCe@|T(kNBBa{q@a2i@rl>Sl~y8;RKQ1C>l?X?tQZ({^j-Tlh-4^cdvY9rDvvl zyZ7y$tzOyMx06bIqJ6SmzVTMh==N2B5>h+X!(ci06Wsz=Haq@Jyl21}z)3Axs;> za;ZX_3tAFrmmV&kOIZ>my>UXn5p;LWF+7s%;%UVx8UG%#RnrQU94G6}OgcUg7YYn@1iZI^$Y*~48+Z)8SaHP^fy0hD3q>!BxdaJ|W8!hYDCSX6OJjzDTH^Ar0^(g} zZ3W#wN{!m(Z)r~otOPC84;Q@ss00P)>V%dMIyG=BqwWw@4c>le)Ds#+YNiMHQ{NnK zXd1Zi@*@ELFp?~y! zF#WUW!;IJ~a2EJl(p@#HITh17k5%KmZz`oVj7wEj)SL=w4cAy<-1#JbK52AUEpWw? zNNX@8(2t_WJT5uun}2Y%IwVm>@l>XvVV<*GiS7B zc<|sr&q0F*UDSat?Qy*KMRdORMeT5~_eFfNce1LxCYYuA@Ab#2+F&qVef>%(QH>uS z%xmz$m#Ui3KVMBb;?GdW_W2)D58QcHRyZ_h3w7uJ365*>$nPbqlZLB#OJiE7j~_&^ z&_5qbY^|1d?bu!=Ob#Zgi=S_wrH&o-|4J3ymYUU)p4hAp)A1>nyF^x!s_Hg(Z&?wl z!Fbf?FCH1Z)UvWv)kj#i^+>`pOy%Wf=ct;iV!YNE^$C*IhC4cYt!kB6-!aFx7Cr4S zEy?b!#K%-CVLB)90x=LSOl}Uk^?cQ4R|ni%xKB}4ZCa$M za!OySuBY^Jr2E?WT&^$FW#4wpQ7i4VShZ_chgh|nC~=s%an947_<$?B9i(1WZM65pQehDs)~t!)|Q=h~H7N~`vcgeP1P}Z_w%e0=ovm^dR+Z<2#-rZIC zQ=zj}-{fBLD*K7{-cz(YU5{gT+Jx;+F6>Ub-F?~a#IoJVZ(w&?!31uXoYX{6fm&ALy%=nGZC*kJ2zcpK8n!ZYDpm}A`{s(d4!3s9C%Bfy zj7GxZnAdQ>D276&md13!J*>%*&AI_^3g`jV`Kn;N-5$5z@BEJ< zo$Sr6gdXv0o8b;^CiJMFp3vWsxA%L0Hd67jJv4)K{@|y>>d4;oA@rE2iVb~Ds7t~! z#JT+R$^l1}-ZF8Iip??{}md_J)dS4dYV6-cTv6 z;oABXHK#&a|3_nmaTh>`HIg*4y&;kI(3bEtZXA2l9Z9eyDeVB`sX9i6dD2{oIpFmT zxl;4=K6QK3tC78V2b##<5TtgXpX3Sd6ny0PmgDR9{q5A^?a4v4p{Ql1y88o|x^ca_I;N+Vqei!+mW;9-)0?s!6DPxR zG@lB~p$htT)juGp+7Ye1mbMtIqF&AUCx!44AF)_ki>{n~@v;PR|HtE*jAmyJKyx{Ep)Fo0} zt{Q^)MdX0Mg92$=3Z>Vo#M^?GKEHEjFxNVJKlO9ihc5)uGM4Zd^j(4-1YXeCe)Q=X zVLr0|fBS*zMZMv#HU7%*NA5_J{df-vRzGyU5@SEk1%m%k*OB%k+Gva+vfEEaLmQUC z(rqJcScFB-jp&(DNj11?a^!EQZ*R`IJw< zOBS!8{TKtCcFZMtLyxqjp zaEI0qnk%R$^cKqK&EvgTVI$H#5M@O2&5kW?M0%JVTVh0dMj4U)bQ&L=mg5?cp;1QU zJTif97!fL^HOv?hDx@(fVnogl8xayYJtNZl|5YOrP!HW2^r`E5X6CVn(vCb7ZAtP6 z4I0=Uf8?6*AG{OClC<&Wcb_<4ZM`KwL(R$x3~Fdeti*HkRnE07Qq;>?flr&XB$vJ0 zYlKQ|mYJotwF(4P?IaXrDY+lzi-SGX_wJrO!k$c;E@oy~aJ_a(PT8>F#HqfS+f_He z_3QsH8<*Qp-L5)yL}_de>AHf=lEG$&$G>cOCs z>&(Maf4I=<9E2N^SU+j9yUl;4O zvkS1D+hrBdcV+!XBopT0PZ+xIt>4}qp9?dj4c^GWKzhgr-D$3zo~7Pf7ce_hzoFE04ms+YXWnP z1vUYHV})xB?#Bq%I##<9DJzjOn)yco8;!qF!aoxCBSF<%h>JU%*@hr_IR1tR+W_1T z5VqBAwZcAachvVldLR7t0ACUcnTz{e@T~wed|klT33wO$b!tnes_&?8hx>M-Z@qc? z`qeg)vbg|RV93T_mJ}cz_vxUTr%z$71f-_mFG09saUUyOYguh2QYw)WV16&K0RFtf z@4~$cRKsN-)t~y%CxZB^Z=NNS6fp40n6@#Eb0xi?=kf~mgR^dfp=+k2kL7)IICldb0pTaV&Iv@(>x#nQV( z`CF`fmr?%B>r8!}b#seDVkf7)DiZci7I`%+vYpA>!y>CuWt9;716SELrv8Ctwm}BX zgs0xhsasiwo_Zx@RzqeB%WP)q7M9rznMYV=6Q^#nS%})#2tCI_8=3qZ3vGnZXDsv# zr#{0nG=8^rUls9zSvgY5k@ZSsy@9nn$^08w%ahQe`^9=rU60hvSc;1sA@(?ntz(AA zS!^A|bia6%Qy=Bbsb54kRPr$D+v~Wg)^Ss<1IMHYA}rL6I4^)E;2w!MBMuYk~b)J=6 zz4viNuH@>y57mnq4}E@}YW-pfc^0dy_Yk?BtviWORaaoX+l$qJQ{j}lB8dx7ci4jowXT-s4nq$2 z(Dp9PiFJoK^$=^L8k0%5?jXt7bqAPykcAFFh{tGM4X4&1wZYt7x1Y1x$MpRywGUD} zMCK@K2dg^XGSoOSW>nGAHmFVeJ8l-MFXSj=1@8%45@w1^f)a~Tdot$CB%vZOa zWwtSOJIic?%p+VMTR3$K%dDXOFEd}=CKlSrzzO)Unx-TgF$wPE!j`QP3uxuAkZ2M3{04Zj#_h1cEEHp5(%$;ww*I5fsl~XD2Yp zloTV{jS-#Xubb*lz!Md?6LFmiMYy+uh4*~drp{kCfm0{&Q#%D1%LN$2`o?kr#)Jzn zno~zR1(2Gd^`B%oiZdL^sz-5#Baz`doZ)az9WEJ~S{lL`4q(+oIKu(p;3>DR52yCw z3~9WWTI#_vxlHW=D*AtJSf~ppcVVH*i1xw|MIkFuE1kHI?YKCdxRC8o$WOVD*_@iq zg>>59ko#t7e36wDV&_b!rU{XOz<9j0NEWMKvr&{4Fi$>+nKs==>Ml< zNR9bKUx7(I1NY6YAA{C8egExD-8VZI*`I;`hNnLx_l@TNGx6Wf)P17}HD}_#ovHg~ zH|f6(J94W2TcrDza~kd&&PDQna|Zs~nYwQ_ug*^2e>+q6&HnNJn|8&-f8%8(nV}QA zZ`$W;!hN%Ul>estMWp|BD(;)^7friw=>OzspSJ(T3-5;Rn=a-lxo`G2j{m01`Q!Yz zGj-oE|5u~+;7DOTV}9ZL5&j!wkLTr{lKW<#q5pQK?wf6VzSH#I&eVOw@1JMnzn!W3 zhW?KNoWB3o$bI9!f9md=jfExoZ`}7!!+$$d_l^8tcyaP;w3)?@!W zkDSoNN%RuWQ2+a1h4ylU`!?xl;_hez9=J^Sb~ z_mWpc$;r-l0Z{ZX_ZM#NL8~z$4z}xJc-4(Rk&htDpUggz0zZZeotGDOT=PF*_ zo#&ZPsa>%c2qAE5(TNr$< zfYyxDi)f3T&(fzC`AEZNpY@K)TOK^u`lTvZ9_(fHREogM>Ma636;pvGHj^u58J*zJ4Uy}{mg8Y;%R6w37n>IAJ>*n-s@+x14% z4MmT^#y^*J89zi-F~Z`^1s+d3`4g;1NuHX~<$4$&!;B{RU!d0FX#2c%AITsDL`fXg znx$yp9AdVV#PJ64mFcu$5J6i?;;1I9-)QoNlElkhR&^{Sa2!t}3L^I-6UT(_MB}u&9=(oBO3z9yhd>>7> z`5`AH)e!oaCXP+|oUnBo8~)2*|UE{j0d+DR`{0|>R+P6|YztL@}RplKx@ zXFavcu8XlBD&-XCdq7=XXgB)B&ZJHu1zaqFo%P?mCtZw{8F8ip1WzKUX|KroSZT}=hYLX!MoCP{W< z^1iZ^9KP9KmTDMU^yid4rmQOOxmTDM8aDx#{K+$P;to8XNj^Mg7)0XSY zQVoYlt|dvT*glY=C|}mW+euPa>}pf7)n%!MK`M5o$+7@KbmpA()ix)~N>kPqWvO7W znM1N%Mv{q;xDS7ilVshuB&l0uscDglvQ)z$EmBT`wB`35{2d~}Z@c45y_D&=rAR#~ zoKnR%wTn{?LyQ06l!FjVqtSI9 zgsvgMp!Hjl)V-i)vGnx=i&G7UJmr2PNruR-B+-!du_L<2i0)gQN-V@7qPvagZloO| z$yBQ)tgmFc(@5@GoN72ka=VeF*f*_dI&WcJ0ZCg#w;0iFi&G7Yh;AZLYL#9PqmL)8 zme#K+Q{5~Z7Rx}{xH#2tNVBXb$>$(B6H>R4WNT{&N$%k)T)Q}BCsng!_uOL zQ>sbyE8IQ^vCSl!ZCUtgBZa;<#hkS`EnAk{?`oaN7!JN7*yb2~s z-5Hjd&QQ5H6&#qbz#_e&f<&oA8A$6zqCKn|NL2TRa?=}@E>1NZ(i@I0l1%S})T1Oh z%6iJl^zb6-f%S`04TsLtuBs(b%5)pV_LJx()<2v~4=$1}cxX|o;gC!ZkR*-JEX*N& z@Mqm+<;0@6dWh~{By(TQqEy2nLv$ZWQj?ChAvTLdtE^v=sBY8Ui=<8WEJ__M9MYz{ zOr|T5zL6wXS<16>n%FnNIKFA)21sIr5XZs^O4Kx9Ch=t~(+1C`sDiSeKHh z&UB;6bW>@nVUbKXkSGnd6&RZv@Mm>&-$9aku&pbV!M46M)o@6^Uuz_HLh1lXp5y+b zk;M9IwGpi@O*JgWl#(b7nHCr(-SKC2cYjZ!dc;(g%7|G}nrb+t-!C(nj)c@ylI-d3 zoe(bWQj@1$QJQL4B-3&dr6F@0#2zNmzV7QuR1cZ@5*aZ^OHvJojF`jt!ihWYCP?ie z$pP-)k)-athf1XL)|R9i4qJNfK_hwyVgYn`Yl!=EN3_O>9wWJ2+acy^ zX~hGv&Y^DswdeCBpq0U1PiJpBlF9AKV7I4>*Z4gd?DupP`o@wBn;oBXg<(TUCOn^> zUU7Xg;rbY4WF~wcgN(|A^J9=9ndJTSVj*&WGRgfh=oX;xe+;_b&dQ~78+?;(XR!xl z5;oeIKB$Bp=9N^E1f_GFWjYc|iu7l?gY+`LC0jVH#AtDcAcHY?vTOP+F37SHnI#}ZD$1{ z@zpjDC*$u}lWgw@L;{fUBtFscTp||Tie_e)XtKB5kvxe{#FGDnB>P0uy_>_5c2!ee zkqlyTidfY6Jk|{F;jn1cNxUMSt&G!S&Gep|f(O;JmE#uKP5MPVh>h1{UFR(%Q9X!H z;umpojoV|*^*&6JCvc2x?QxQ4#G=OUvF3UAJEAA?j9Ah*KGp(n3w%~3nV!ToO0#Kp zHJ*>P&^y`@U1vO%rhOx>UgP>$rQSP9QdjRuoFgu-I7hb2D)(-8GHu`{;%_)azN$kQ(+PFW~UEaAQ zNH%IhGIY{fg+4zM{GHvW2 zVf`V4t+9vnKi+YU=#O%c)_Yfwq;8lKI!MT$-5lfoSWkQ3B2n$;z(YEQ=_}en(rykr zNaR}?_s9CZH;@iV?OVY?+R2iU4w81Q*g>M+Kn{{k?vM2+?|CHpcW!ccNV+#@4@o;n zx;Ldwjr5RortBb5 zrpEoTKJnH%nZiNRnMOKDI@87uQXAhn_!vCGL89N^u#7!{hXjv<9i(=?sU)h~^hY^J z=lULWGHu`>+3Z6d*F);z+ef0O;UM+&C1r#qkMAJaRgFEQe!fv8Djw2F93*N};< zhB=voL<>dZ{#a9eJ?u<~YBvWSl6G?DGC=e^QX1rJI0-bfEg_g?al(rL&T z7s&d^C!+-pk{&IQ4w4=%+e_3d&xYoxf8Z`EM2o(wZqdV)myGC0uC!KGUNWVPZFaTK!pb*2G67zg z%6&2+^=!6BIu*V^q$R&TG($)%5Tlhx>J0_Q|T zK3Z~N`u7oNI1tkE2gk&y|4a;AWWVh~ROhGHT)f8ZLFf&aM0Ng+WqH!xyZYksgGXI` z3kT=)G`kruQmw1;)&;=x?;uANy#nkKT^X7(Ja4> zF8=$`)JLNW_?AE3q8M14|IIoR-cVfiMSW)?sRCV>I;*P32ZzLP|Lx zILDAR`u-#Pw>I<3og2P(8X0%Z`@dQ%PkZn*F(8^i0;u{!{b>Ophxv+ogUBL1@x#MU5Osg zU!tjx+nP*+BU;U>XvPDYuLnPu$MZlm^;1pN?db8WMpTK2B77!PN~37mo?AuBjsQP@ zxU8ErqaFtyPdQg!n0kyW&okHvM^iUxswa**u;&`OP@8zDO+2^L#Z=J!k!80%p3kFm zeKV5m@jRocrvAQ*rrxTl-K9)>xD$p;{5$T1o`I&)qD%ZKmDu)rJSkjcr?eHqzbRVV zj%aO5qP6`X&mY@BndfGkXTunpuiY`8VvQkeB4PK~7U6Es-^(b4W2>*V#&QVy*_6;Q z3Hn@M^S%7orRJVsrtw zYpOAzTcfG3Xlj%J{Zv?t{d++4Qwfa){nQ&}K_4jPPHxP>qu!_?@V=%tFrW{+qYUUr zi&=$v#x-ti(Lsi0{{O2cpU8sV7p?Fg(F*U4rhcKRW>{`^N0s?y{!etBycb<#Uqxqd4`qP-rOJ+DLGO-MSsShL-Ds8Tb(tG! zJiY<7o3NnwT2v9?S^Nt=b|P#+{}4@mNmCme(28ij|7t#CK<^Z)?tdQ7H=1lL=p9y+ z1^tgusaR1KbYpZTZ)iSaK%e5;2|vhguAQ&}{WrBJ?2lO~{F!OV%2@=Rcw zma{ESdX(UdD8ZB{+OIm-gL{g1=PNe+`b#oHX~kiBqOepFeT#q^U&D z#?GEsG-LL(so7HsC(TuFe;my4ESz$aTJmh`{%Uk67*r!`f}^|ASrJ^0%XEQ=*)?m< z>>1fbv*)|;M?ts<=Ji4_u1|u&40WI;_^GNX=$vJfqdzn*V9tt2K;+(;aRGf)L>J@j z1Cpapd`sO!Znw^h+wB9R=k*w79lB%4b~-QO$MWOI2<4wTD9<@AqV7{17xC{;aa=_I z^Aj2!7g2%VPtw&IPg1hVdZBe-IUN_Vwz)noq7U+4D?e6HvGs8gYFm02ult(T>W5bn z+Qw8veqX%WIxEoD*RLObLQzBSLdeTpuity$v;J7$2mKLARHtQM7f6U%IMWqAE#hwj zqE3t0bge!uqQyX0jQ~#ZJ~qCi0DHw{rR}> zlS7tT^m1T`s+}7sR)@a~7AIbVU$`ik|4jnR)hBNzq|gSYdn9FzzzqUl7T5`|gh;Zt zz=n8@B1g;nO zn!q;&ej@O5fo}XZNZG{*qZN#HJly9LrIc$C4v z1;$`A78gihCxKlA4iPw9;ADZ*1(pabBRC3*S4%>*z>NYo34BlB2Lk^o@ZSOxu=$A! zl%if*7)ra~LP0MPI9cFyflCEe2wW|&THscJe^3{n9ZU<=3wktGy>(NlMa%A(3n;f< z0xuMJiJJ7QK-$$y1+5VHsKCbsZWZ_kfi(gT2&@-)RA2_Cf6A`4dg+{CTFWtljukjd zV6l2-Ss*R=sGyH4>(_y_zBPg#5a`A(I8qiPFhgK#fdd2%QLPq*()!*gXo( z2&@uVE$}IUTLr!;@FRg=3H)AQB3|LRgBYo)e1i|h1ojqqk-$p@UMKK+fwv00L*Qcq ze<$!|fqxYEiNMbVeoN3sm3%J=nb>4RRdklXe1W|MUMcWuf!7JVUf|sVmkWGM;O_*! zCh$#xp8(pF;pdXz!44k6{Q@%uo+WUgz@Y-K6nM431p-S2-Ysysz^4U1EAX{cv_EC| zrX+kR@LvKw*l5EA64+kg*#ZX&94c_4z$pS32rL!&8-Wi9e7XhNpE7t>65bWKSKyZd z|0S?F7COYAD6qZ2vjv_n@FIZ|1x^vTMBuFge`Cwd0|H+Z__Dxv1@0C2jlgdOHpk`@ zE|9=(0`mo)FYqFPMFOuAXfKhQTLnHM@G*fe3Vd1MM*=?)_>I7C1*Tz-2o)$(U^jvJ z0xuJIrG~bvND{6S_$z^T3w%W2V*>vq@HK%S3H(IhF@c^8U63?^nF9L?9LNyuf0-m) zDR7>^1pU?@|1R)LfkA9%pn^09yqHTQ3GD?A6L`MB@d76bTr6;jzDQ{Rw|P2Wa0C1uGK4n?yjkFF0`C%d zkHGr{J}B@>g2?n4^}wP*X~9M~(o zYMATiGp{$_D4{!6Q(xR9g*43~N@BBCy1E527M@&?RWqC&NQohrQ z3!}t~AyO#f`ktgI^TyIdp#n!g2BnhD>b&u;9raUf+)mA-O5Bs1Je;C;6mZIiu8dYr z+5}QFDId>3mAoh~eZ-|-)Lf6C(uhQS=@*~Qb04w3aUJm-?lQdkh&$(#^kySkLix^w z57Q7-7|pt~2I2U^QWGMi?8ai-SZq7Qw&l(nKHim&s&X=S)SNi;O{`@Lv}{7=PLU%s zN8WaWGH+n9jS$njOn2(KTz2 zL1G10E%jHYoMR&@sc{{x<6^EyG1o;^?U)lvRkPGuNL8DfwIecjs`kX0uVgi=p=M=N z)t)%>N|ssysmh3&wX56c(7uQ=j^`g8RbitzCAz{!B5f(x7meqI;Z8N`gil_k%66}j*Q5&LH}P#>^BV?;dH%f zbg$hQng}n2=UtgcA%$rMT$x89g;za6)KwU4diJE*az);%Pmec)Qb4Mec{hPhdaLu2 zZ77}!byGD8jGE!({g%4zsm&WFZc>De+fh$#+VDAPO4`rQT?y)1?iZ&%&#$CVe0kq} zLNk6wp`P!l4)tVjQZQ(39>bNGaCIV0!Nf>YYIG`%a2nIgSRvU2;-d-H%<19qdW={l<5I;vnx{|5ZChrMeGay(y9GtHLN4O z>ZzbQ3eR_qCMr9^V!tp28Bf`IZPWyLqKv^`I;H=$`dOFqvo4iqJ(an!rR#;sHnN<& zb!KE4Bd5oP&Cz!f87DZ-SyN3ti*zM|KZB< ze^Y(^D}Xrl0u#>w9HUS@kJ9mklkk9(UM$*C-zTrJ)XM8^EtU(hE)ZKOVtpZ2I;lUz zIyE6yDVb$MDhpDTCbI%$R`4Qb)bu8#Dnu#)Qn8S#ASoMV>SBk&N~wm7QYz>{M=5k3YM}EV;|VQ6K3QIjch_dq>ZS3^1bn@sc*| z7ujLcaN_JE{UYO(IerkWavVcUy~Oc@s1GJsfgmXo4a`9GUiWMko{dj)jD>&vDt=w;Hv#`ei8M57SoQAsoI~-E3)CCH{lkY!0O|NnFz1QsV~PVI~Ch+ z{35LXoYl$kEx+-Locj5RydoP8Q8oX(6y+9SrvG`oB3u9HG74j0bYAor7)j#-^J1j; z_mg`?HhVFR+@hb&D?GgEIqK0+Uz$>!(cg#j^(NEwN>1REe zS7bN!)9DNFa!$u9YWS?D;1$_TyG1{nS7bNs7X55qk^N1RZqd)?71>R@ML(Ta)X;%( zydrjBY;lWds)%rlPU015@6d6z9IuGdj8{ay!O6U$-sI0Uc8eUZ=v%zy!pkoF^IGTN zYI*Q+ZhMLGyA~9WpWcO;7{7NC;`ULDThB^d+?~fj2xldKL9CPT8L``(mHaL7{F-=% zE+ihWp8`&KenmW2-$^L}ABRQ__%}ezJh_bW-_+*u$`u0-K=Y?8Z2h{8b0xi|Q@B%31H(CopGE_(um^w2S9K4fQjP!Br)d)o@VCQz+9sC5EM~-2NJobj^b-kXg37- z1FP#Ay5Ju|reRMULOoqdHwd@e>^2)B)@aU- z;=fzuH7KNrES|cibr0k2sv+^85xQK+ zTkQCQgs%{MlO6vR;r9x@(T+ch)ZJ%Mz%vg5TE%})<-O0AgqpJWhd4p--DUCaNPJrv zB2bScmF;M1(nI258WM>-9NK%#cu3^&(7|H{L?RD}jzV8rmdGQblhAD$6G>iYOrS$( zG(02>Dnr6Bn;~Iv84`w@hlD|RNEk#9iDWOL5>jo*m>`@`84?DSAz@G%5(bqaVNf$9 z3~q*m!Of5`xNXLSNx+!kAz^ScBn&P?B1Ot7L&BgkBn&D;!k{uFQbm@AgpDy_a2XQ@ zl_6nJGbCDwv>6fxH$%eUW=I&^42d+6*FyqPxlDo?69zX!!r*2|wB!JFm=I-1WJtg| z84{U7HbWvya5E%Y39g6407S}_2zO>o7~BjAgPS2?@NH#k%{l(-)LGtENgRAb9omqE z4Zq)}CwXE!xYWST{QF$9yf&+!y}QYX7b_9*;x_l@i$;wbH0mM=d7*+$ z(In1;HS--`qLmuKQ_zVo4mrOYD34Rq@&uP}8eJQf%oF?I_@axh9(?f)H&i`@|Eh1i z<(6BPf>VE2xt#7+(1ohQvjG=dN@Pt`PdW?dE^q_3%{CS~C4Hw?6wfo!AK=^9@rU0r@&*0@m;L~Mg&qC?|2x-M z?l+#`g($1_B3=07W$sd^ih8ovlOXq0zVJt|w_w|{*P;fpUJH{sz{{zo-HJFAQJ=c6 zi?KXESWzRVf>a-8+@SwC1IHODCm%Sbk2mOoG^PxxLHFl@(s0~R`#Yo2NS?aV6O5aN zN+QOMQ!<-J-;Iybuo-mf!zNEo}MPcU|f=d^}mM0WO% z7{;EbqsLD4(D}Ua&^anY=Q3*Krbi0(f2zFWkU==!$N}k82T7BBkMgilg;$5pY3hsD zHZd(GQV^#kwe9NAqw2kJp?>O>t3%1^o1^KSBWzmLg#P*J*!a*yRS}z!{QRvGLj5f@ z_`H-h9gg>P=>TIv0rAz)KTG{>TkrPJXQc~b;@asiP@CXs9>t?ByUyw@-;a_t^{Kb6 z35`-OW(OL5J-VWAqpwG;qiX1!{A9K34tIjD5}y(Ye(;rq1m7}j^Zs5f8JUG|IR5~A zJ>=`vClxWtYWJ)_g71#DE?2O@7o_*(xLk*qCw`c$_yf|lD1Wx4`aSD!>$|O8)CZ*7 z2kH+90rk=jpFUle>q%9-ZG?@zBRb9F@klNt$QH9S(FIPwBTYXe@*OYSlj~K;Kc%eDeyXhiv=zdxEinnDdtZ{0k;TYm%#l35Bb#(Tl^!`=(>dVr?=z% zVT@GT;m*HY0Y>k5KWB%K-w?P*;68yh0uRWZ_Xnu4QA@ukh(i9|tM|MwB0lVSFBkr9 zJ$v?z*z%s;V9$Hs-o0|ORox;S64puOUDP4jF5mbPcA?i7loVu)Xf~pBN%DyPOM(|+ zS9)&g9cDKRHe&F;jt{Z_=RhuPpFEiBu5rEmwYTSBocN31Ne}QQ#XaEK6UJyW=I$`I z3)rqOwiDP+!fY0#ea_p%#BIQ~g)w?de=zq$*LQeHxBM$t2?Pau7ubS-b}ZTP)wxJL z5zh?pbOq0zC_USO*`(G{)TK!#hldn(2G8y&McWz`=$w=Ake;)_v&)WBw55@vPQ-Kq z9#Yh?L{SZVbq;ES@D34pN8slI$Af*V|a!O*bXaw6J|=%(3p0i5RPD9uCT zq#?~To$0`~LU++cFk+@RJCsNvqcA(%;dEbcs#bkvXj-G95ra5=^HkdCp9+H!io!Ks$If{vkvLTEaT7K3*zLHnPL1av-B zr)HpLFgPh_4;*ceLTNg+o56`r{lZKvx+rbIX=>99X@_EJlREczwDmw&bejkvGvXbJ z5pqU|F67xntd`ggOLVftoj}SXv4ZSVHSTjt7tcE7HLj*=5RCRQtEQH3EX$XJTou~PSYwH`=>J_MQj#nXoNE} zL&zzRnPQK}LwZilD%wq(MH<&;dZkPnPOc74Ss6|}H|iR4CSRx6A&j*KHq++Sj23k2 z;8bm4P^O;9jGdA0=sUhGY_R_Mscm5(YIe~z<4jX1pw07;HioF4C|hW7YK#yjT|Dhq z0pTZGXmFwjfjfpw+fIX16X8Ch>J{|uh0KC~V*Nvtr;|X;q|Deb!YOluQ)Xl#QlX%W z*fKxxI98}_Ta3_yLiY*X@Ox1h>L2J?HoBG{qA@6onR1=3qrUQi=H+MB#Y_W!ZbY^T zz(aylwnR5LWlMC!PuUu~Z*sMrY@NkY<7|_mrb9%wvB0w1~&zuZmVrQt%!9uCY-*9XxWIxeB=I<1T9^u|JW!8W!nr1?ISuAF&Lb(B{~a$ zpRzSJ!SrLN8#~iW<7`u)rE^3#ZeD`+Zx@j*F&Lb(Z5|;&*&4goI9q4hZJccjXfdOK z9yT7hj20UsUwuUkk;8`=i~wcptOpxba^%u2dh}qvYjWwf`FFHPp>Kd{u=W^K!;Ut6 z9Mt7^{qOkD)qjaz*$w_r(z?UFUmEetdT(j*`L37GqaShbBLlY3@F~+49q~JTd14U` zZM9-Pr=K6Jz+M9MGX>r-;@3TFJi35W{B$NcjuF3t2#A&8au1zMSFe9I{a6+7Ar2IP zzYf6JVw4CWPiwlg83ckSK(}45(t>x9pcS~ta^ZDSz*|nJ*LyMR@zSpH&q2pIMvFh)ly1I6AHL5~t|k1$$q6W%k7A11U{7_B9=cNjec6#HO$=zNMpv=kLq&bU$na3nR2*PO8F{Lf+9BG1 z)Jtbu5TX<31eq1W_93}14AG9DK3lmGhJ*#V48_wJj<*4d0t#^p zFqBZRjll5uf~^OJA_}(F4$%gszLcK_=Y)o6f0AGoc8K;L_0zNsWg*&rB-najD2!nC z3b3Lyg02G*g%NBuXef+eD}kXff>i=TVFX)dhl-J5f1TmlvQRNH6s#H;G8AkzFytrL zO0+-keHx%84-yJyK@SiLZb54ZMezjPPbkVK=srSGKtcBqiV_OC8&5|4WuVSz7oo^# zvfw)jM^1unClomex{XleBx0S|^d9$wskGhUGPUQ<&^hYv zXL`h|j!RQgXv;!hFQyJY;sXbD)LZyz*YyLUdSMGfy+t>!1dJxv0xv-?-!JwOj7d;K zhWBopV@57G`ClZSjk)G{n+D474P9*G?e?G{7xBy3h4jjZ-~FBV65uy|r+(#kuMIBz zW)>H`Dh&*zd{6z_Kog^TNd;ewVnI2L-;y=Bh!%QP)|5gg%~9ywIoa{uKCZaJi*g4J zy?Wr)7vbNi8)opoTW+9#{F3(4CTo}SZ&2H(Ua^|fDXMeFMP>9P^=db&d`C%Bcl^9f z5gMd%0glV;Q0)eCj5_27jmBtG5~rPZy!LmB(3I*krb>^w`bPJ_tJPKahc5R{pEYNa zdONdKs@mc4MVxQ5e92$Bt8F6?VYTAG_KyFH=;-VabCO;J#WX5IP=Eylji~hpMU(p&^4A7 zQ210Iacq0}0&4XyQUX2-88|}aRflqX#qDsQkZLoxTaNE$M1@<%uNrIG2E3|ZZns!p z90Idl!)duYvb}0sbtpDwVS9=Ft*vhs==$|!adMVdC9Da>x(~Kjt=AxO?K033 zSa!&WR*6=7HJegbBek8Hl#9T+>(_)5P`FnTGt$)RdEFBD6t>ms>3Q99RQ;?D>FN*? z@uswc*BZd@Fh@NMfdn-v2?7J=cT2#rNUscN-_bX$wafLXdd1(Noz+&wUE2y#bMaWc zRNj`rEs1zd>vG-`dtGU&YH#OO>aWkGPFACT)oG*~lkPQZL$|5y0lsuK>v3O#8u?x8 z(Q3kPL%C|!>)v!Ve3v&@jc(pPTXiZ6WUG{?LfO^>YRTeOX=>C{p~OJXK6yRzd-uv$ zh_RIJ?T!dc{JP1e*&YAFF_v1oTDZ!eUB>U8UclR@BZaF9Uz~KL@WaAVTr(>c7G7Fg zKD4Cp*nfXGrtzDKH1=ZQi<2qEQ&&FB>c7gh8NbhzPA)C%kJRxMs{*T@IWqahnHjA% zPwqD}u~py6Nrf2&rS{B>vq~Zo8ZrFD^dmE^{zoPsnd$2M!rN3d+mu?DuRqGyZ}Mi8 z?*%U3kHsDJ@4t<@C`uo3Q{m=tU2Q6Sp~%5dM}Z?YR}d9KKRNw2^xQvPaD8rP4@?)} zyP}MO7iW6&4Hy4l1OH6>qyCc9=dw3X{%MpsPyPfwd4<*AQ|s{@nVedqAM7}}*x@I0 z6#R`9=mw!S>OV8H@W>>2#=?8PvfzdJ**T=&Ue1h)pR$jy+9}dYZ|B12Du1azy|d>5 z;9**PnC1{>5NRm%G7L&C8w1dBh@N}K5mE@DO6}XC(cyH#syyPswBU_0? z-vnIXgT0ER7%#o!j`6O-)t};>6qpV6z%X3AQv#Ie&T$1kC3GqdA0pHp=t0GrCa5Pc z7F63iJy64BZ-Bm7@y-bRjnP2hCCaQ&bj1dy6Ivu_TwoaKni=31?Kuf9A9j1Vyw?T} z0r=Csp9GFlaV{mM&*XCxSAdRt_8t%w-oPC|Cwf1Z^27vSBV69U3F;4cNcis}90*|6 zb$Jg;VPgY75c&^669W55^%tD0J0}J8Le=4$WT_>;4`tie5_3{eR}00j2AUkyW%qJD zcvEzkyqrLwo>Zj@8XFiu&)p(uqcrXu$tW#IkEb)Djr+bUNn?624)-Bz10<})U~suo zaEnR?PHo%l3YS&Jja)S*b~JI>H6Y{Tlh_NvZk20nRP!R2bu;gDsG1*F3=ZoSO(}?@ z4+^ZM8k^9(_zE}-w`!~y7#tPBX2o4favEz{RoJ{}w#&MWpSWr&s;4hOM@L zt#Y3Wwb6U3A6?!xLFK2WWLP29=Cw|()cE&0#FE$1Ir3n^KIC*HKm+`YJ_M8WeSlz! zM=klJbK4yK=wOt8k$4sA$?dwM;pXJGU+*zeeY7QXzFj!blQG~HPjG(T@}9I3E}#qV zA>#|LvYNW1t$NnL!FhQEC(@+#{g|{Y-qq{-uXE4r=4sani zg$^d_z#)b0o)|aSbK?L{;sDm!gOlm9<%D-HG1c==*8qIGWm&W5%)M^XtRi2@G@R+6 zvXA;(sNWw=?Aob#@(t6cyXXjqsZ-|nm{>G>-uy|kr%anTJ-@r_lF2u9cP*G!G^23- zJT<8_n4&&w?TuIy@^KEz^F#C0=I32LZPF~)lsWT8Oqw!Zo%=&#?-s=u%$`*=d)j%> zKW(n7c+7&LsZ(c7Q&q>BC#xY_Ltb_B=9nZk`sGkaeKw?Tvf4J-pRHbcCDbf_;=~)w z0T0E)rcYOi8w2SfoG8J{=gd`;9!whAV$SSolW)SQ6Qichc4nIW$%!b!nk?x6O)CS-BlTs`HC6*(!TR#yM)k2Y#>m;+0T_%3qao zy*l@vgw~nVzasYg^`W)vtri~=p(b7E?WuR_4S4>_KZdTdtQ7Ui$d)<2Ewsi|Oa76D z2OEivb|ax=u$uG+R*(sQ3MKgVgMLuGP4t8dK))S5e=n~)3y6FTwhoQPny*)y%AJ%N z>)Vb-UR;OgO0d(t0_4I|oG_?Vu?sn;F_UrBz_q~erx0H1e(zAQ}65Kt~RqKz@ z&Z9x_{S^xDUH&vS@r}L^GQ%N5v}&TwgNb@eU4JJw0ak-(4OMw}V6j?Dw2g5%G=bN# zwInwxUB%TvZpaQ~c1R5!73}ECiFdg^;DxN0f_kdU4yEPz#^U*=(pq+&8nQFA(~ZF! zdM)&L22Hjhu+gj@!n}M5rkxOYCs@zF^;+mvtIZ}F!PvFmel_Uhfu9;?o1=6J81@*^fQkrCIs%fT@8IdgZL8r;tbQp&{4xBFdtr11WNelw30eo&BB z^Bv&*cENW=geKH%CbVEPW5Jpd#!47-*Bs+w9Vu)Hd>sBVE3!sdIj-e_5s4$(j&SAB zdR?L5nfz&{kgS=~$m%~OP;$m)iE zo0ip0I(_dMUfm3)Y^?y>zkpY-q`Y@fV!%5Rz-M`vTJ)oIOfE8T#nd9rj+uvRSmvNHl57!8CL5jDIf3auq-cuf@AMXF}N9R z6Yx>bTkpj79(9B=2rqd;airq^viBz7QB+y`cvW|Gx{`E~N_S^ZNJ7FImV~exmH-hE zQ9&7H8wq;?$gV6AJ18nTsEHs~!3A6yKQ|Bs2?{!n;yR$txS)u+j1^kZ}?I|Z}L3pvF9Myr_)GPFDsYx#cOHg0YCjxoG1Z&PXBVIT=f-+htUpS zNJ*`}Jn>!D8d%;RWZd<;LkZ_-`k-=hX72i3p+t6DFPFHhUQ1-R^}*%rcF0w4Bu(LI zE6RD7xa#L69VO{A$}f{=nwZ4P(9c%rNX;~UkCRxu$Tg^uyp<=>EE2oT!GG5L1K4Wd zL&)*qPtyXdENlG^i6C43?AH9DyIJpQ>m_MPTX9bPIoA)7dha;({Gedd z8>A(@z`nl_SBN}yUL8q!-hN2P-iEZKGm+Nc>U@>~CQ{Yw*J4d49&S4lr6a`kxQb-LrOdZGe1c z7az{&Xt(#v#Oug_c6*=3gydkgB|gGN@!tGC1>(o!soCDA(OZ{xL#rI+jmHyW#mwVb z<+;z)>iVUF=FAy%_Mkxn|2|+q+wlML&jz?+Mb^`CokZe$zH`N`4|$_msQg@`)H7-5 zuwi4?7XO&FU{_vs?HTc#x*c;7cu^f=ur67xT@(nQw}eQ~1ykv1*WZfiHMAG)K@ zhdxUeqwazlsC-P&m)nSo7@X)UU*&dUV2v8=^A2~-Nc3?Jf?`|N4!)yUl%Ez8BbFWV z1;t1nau4}Z#QXV{S3GpcXNr6D#AGq(kS{@8f5_)^_bTZjHtUH&amyiJqPS5{j4zzj zx1?VWt=q!sbGj{@H*NCb$##12^reftIc%k{KFWSs)b;YzijjxikTk@~O6<0{EY4%b z;ii_qo`(3wNKEyQ0fr%0-ycou85HLrpW7LtDvuFA6soN0v?u#2#D;}c+cv&zi)aGT3@@fXxd`2-}Io%SakI>O2C1qL*t z1a{%!-@Y`LRt_v5f80LF+lqqU5&V$?MHv3ZfI_3>oXR@~tynYNrKKY~Up)1RFW1xa zXI*=vsY+%H~*Tc7eH2r0uU~5Ki zIpVRp4v%UE<}}>wq881rMYCsRk8}9Bj6U;Nkl@JW<1a%@j!6t8$PYBov*0J=-L;z! z1_GBTdQM3@pG!RQvMWU_UW5HDxAMuURSD)^#;`xX2^!A}%Ctl$v^|E}N<3c4`wJTbrI zgeeO4R`7Jf5DNIFWre8<(t``}l?v7=c&CDoDEOR$ZzxDLBHNMOBIH}2FiF8S3U*bH zy1@`DOjj9;6}(cxn-nBN&wBKQLnx(5z&8~BAz`kjeXQVTgm{X7QsoJFMX+6wf~P5X zrW^Cmg0U)Nrh>OC_*+8UoX;tIKcT5NTWp7}qn?G)4kQvAqql zV|Z_BF`pwZ6te`!%VX#pYemexNM9DS7RQQ+$Njei#Fzc_)cgM-%cwzXuKD zxOXeE@P3bj9zrvkyp#;Fb`e*FhQ<#Hb;qqDfgio{l?QotI@|u_?a$s7m~k(%^k+rN z7e`%^p@ltHd1ta%H;15htYutgf{VeYMxOt2RZFwa5Rzq-nB^I2O+Tvg43CS^e@$o? zx*feUt}ve=rF7#F^EOg?m*lsayVZqU!M<&CRz2dzvNMk<)Dy>7m$6+{Hsk2m$avhe zuge$r5ZgYXP%Dlsk+DObg^LfS_}*{Dk6y~$on|LAMJHy*(&d=%9L=~m))~veBr{i` zuDBRBm={adl$R#Qa(=9RPBZS$h8X>ALN?g{x!)#ag#_C!j(rT&6Z8zU)E8Mg=bJx% zocYrap&$`r|6+?Ni2X?=XrNzWu`_g_M2AKCrB-L46#Ek)_Ajy6KZ^ZH?4Z6>;t>0j z*g<`n#ST*Jx2QbPFSB@7i2YVyk`7s)NzxOoKeKd|LMiqaqac}=^A9BaFYqKo{pm}F2}R7tkn&9LAHX}9|)13(5DWH)XPCq*85esUXm903FP%pXGE%1 zIMt{#vdIn7taDlI3)c;idb6E+)Gx@+VR3&Q()v$vj~n=osqU?H>b;DFO;4Af4LF60 ze;;|O94_$lF=5rIFcxxjBl3H)*Bjjo>=pqjuhWqp2DRfTw4K@dEJ4q%^@)LxQv2ps?u zuiy_WPd>u8Z5=?jn5=B?QyAM*=m17$T{>tsME|o}ivF7^`sXzzWG5=Nc{IXoQ-)4> z&zCKxHYLm#+y3ZoT^%4MPdC%n4*Jn2Dt}1$N8Dn2`DE1Mh2qg$(^ExVm1T*u-uDf# zl?CZ-tOViuDd8N^`R9boTQ$#Fxzu}x_+~5v9TR5dTG%E72#AYAg2VTPflTJrSA{AO@^+Oqe?#hd}1`#SrWoZ0@Qq4DhY;DXnzGY$*ARv(>;l~o-UwTD$R}t4)zHsWnXnq=|t%t=9r+Hd?1|0a2KM`6IPQgl&ujBYCo1`I@YH1X%~j;;iWeEi|* z3KJjQfv0ovi5Uo_0)`G%&pdghB8I>(4^mHhQhhh@b#F|firsqr4 ze#X`%kg167as{e`&6Zux5C`)6Msx`eLaCb|wmxqJ0`LnchoBfW`Fk=!m&$~c4K4cB zB~gc7L7!WCf?i>y(=RlS)+^i(3V6lMmvnKcO4Mz=!kr+s!`3V8hd>q4D=fIdmF3xs z&)3UQiUodvq7(~|GVLF(%~mXk#<^vN*kmSVi{K@tmOf0p>h;@7g$ta@yck=lQ0-*# zEp00mE_1SQ+bE?%os(70ETvSq$H|n?Rx0fOSCtABUC}G~S*KFrNvTxGuAW=Hc+!HB zUfrf@g<;(SUy@KSi1PTvtYEZ0fdzb#h`-0FcgsKG5|d(V9f2tMIUy*nicbuL*x`Ri zK|ubB3WEKlgE@Xv!T*?oU?>TKF(0MiuN0i3AZLx`a}}i0hxio=UaO!`@HPcG%C3&M z{%tDbDFyj)BY^`7@!{bDi2vO zLBUxHE>m!|g5&{N?>+^eQ1E31-&ODn1!+RV`i^3t6weFsAqtKLlnR1Ml`&7j%N3OJ z1sZHo_)7}DqacM068wjPWEhF3C|IK4Km|t-=3*UN!Skeopb)_>RR!|UB(Pq=dllTS zAeVwz{9NTn8s6)nbIG--+-)p-ABK_fKgOR6PJ$AN`W>5Fu|E&4|qkwn67Ogy>Y^7g}ak|b? z9^~Uma}Pna@ajH4Z&=-@$)o!|rX6q9kF)Aq%yGO`_h8PYd{!Oh!QDhmPe20iBG8Q} z57x8xOPGG8JeVkz2euvKG4x5fs9wYqOBdBp9uy!S%7e{3t7%Y%hVnpa`%HrtkrCy= z6r4+oIUN;4F&Cob@|e9yuZVdM>C0lCz_BLgk7y6&!RzP)l?Qy$doOm2Ym=?q5El%L zZjPy;tv%?jq-#r5ZfS4i~&%>sVSwx`EZqL<1D<9_tg zGH&VT^yhM-)dRoJVK1e6fW6kAmpIh} z?6v+vj?`a3JHRDs{iPg7JK#b$^jCAB9e@tFexk*z&|fDG^q*D_NXvs?Ru61tS5BrK z2r0Q5>VX{A`(^b2wR-=AdSD+f@h3mj1CBJ`s&-(yMau|1Kk$p{fij-=p1?1v2k-&X z^!rmH>Vf|i+JSw%PiP^)gk++i9Uy$u)((tblJ<+*fjDt{rZptfRuP@(Co;c!(FD=UeIG_IxND zAn5yCr6r>FkS|@NwY74o1W2G=fUh08^vgp3jwAiDDs)j<76aQEDSM0N^1f{p&_do< z76HxWecK}7M0r1K6cD%<7mm9zq6$#<0fD_O3zVrq;9$!F$6DZrmIYAKNoxUH;9s5Y z(#laKAAc^>$|!N)R&Y$MCe2`SX}14GHRSIr3M_tW(JRul&0* zKVLWznIHQFDD#(=NSR-p*2c<`W<_0!tn4KD#)z!{i=jm@f5JP(lN!lfG}?K!6fPDE zi>&sPH~uYoe;3+Q-k0iMO!0ow1B@Xoz#~l95$a|Id4CiCw+#X&DnkD!@BaxeW)A6} z75q*?H*Ra@|DU}7|37)(u^yBP!g<{zE>inBlD?An_m*{w6$3sB7KL{66BH%t|MKQl zXR|5|`H9jYMY3&4&>v~dc zTh;dLgZzefD}IK)oxH>4c;gOmls`L>@0OoGXX9!z>bSe{t?XEi^kk0QW#L$kT!dox zI%K;BEdT)+k-SJcKQle}N}1!8ieb~kRXA+;;Nu$60}W#P$K=+Ilwy>)@8ZEWBKb3u zwh>7zPuyh&Gpd>Fx)e#Mgm$xcy19xSFpY0yrtx=X!d@T1Lo;tZu|U~JBl0o3?W$r&60hF zT2p=}afTmAa;2*5!#2#nAS0IIPK#GvE!xjOKcv!8bY!i#%sQ%%LEV<1#Uc^4y z)hFhT@0uhgOw5co<6ufjiwKdoDwxGx5GU@ojpH?8w=JO@A8mszdrtnKIo> zmCBo2hgiqN)?3q4Xv48W45)zFM3>X8(f_p3#ml?hqxP6 z?Eh;pU2a9aP>g0Kx1x%?Z-eRfKGd0bG$Z>^#e5dXO{hQMUe#&wZ|_0eS4sKWXV4dm|AEn@SY%nqIpFKmoyyEGU9+JzM*qkbtGXdpt zCZJr-1iXb0Dd0m2%1;t-xts|omoowR>192-b092KP%dWzm&=)eT+U>9r47&1o5 zWaLo52UUdz1?6%k^5t?Spj^%bl*^fb0n9lG<|)`g)UPyyg-|eXfrKUJD|oSjH45H) z;=bGDpHi~K+ZR{~5oa=6%etkD0sihqu93;&>Fyb+AzI!po!oEo@yeR&jd0#kQ~e%1 zY}8a|tv*)uef4q4G1{1(Z)0WE@YalS$8XGO)$mdcpD_(+OTRHqSC`F(SC**}uPjY) z3UfT#OG~6YB;B^0qQbva-gE=J#$4TW1HHzuV@{XZxdz*%&1|@|nd+|!(NT-^aicPR z8IKTu=K#h5K4ZSGI<1=fbvY`1tNYE0U=y^y)vo*qF8S`Ooi1UVLKvv5stHz&@+Y%= zR%T_{Y@@Vnsy&FARW-BT$o!ux4V_3ja(z$n`rsL6<2LCV=IZ3eQ+F!T@~~{l;pVkA zz#&Y{l&5Ev=HMQgl|JlT#L33JQk6OE+|c2V79nc&4_cG^r%z>|?8GnKdi<~hN&PDO zRSiBoRPR^$URq6MSyd?}>ZD{&Lgn1UuP+~Qcxc?Yhd-`4e^_f2LgAjAoW#=MhliRV zv219oBz}p)n@JUihZ^sv6`*xwghJn4@(A{I=L~!5^CLHEd&uSC9f6;rlkL;5M#eaY z-~Sf*?zT9D7ki;^$b`2~GT4Q~|#~jeRkV0%C^oF@b4p z1Mtwm96Y{ceX}(&?{+g?#w-qQVoVVDX(W{Kg*azaDB}c{MnV~1 z!qP}6AZsr>a(e5m{aW^Um}2d#&_L&Hit)b!Y5sKHP-N|U z$vdlldnf@L3Kci+u75OSGxvRX)$V#kkOg<&PxiY0f}}FmRQ!Co&D~25URt3`_P)Oy zEkuBp?7hN9CKbL0a=Jo?OZI+%&E8jFPG3To{=4k`?Kc;7Z~}og%4HF*&tm1WQDfqA z{DH?WB;=*b;GqZ7&FlhaAnf6=OPw?&qLcCabEbpezm&doY<^$*(mC&6;rB^vw@&^Xa*KXv3Q#&9?1)){lW@vk!YVNZt0SlC?$b*d*Y^u{n=Iz@xq=s zzZjWgbrPGZtV<{kl$~rPcgM(CFuD+%ZcWP;eSNWQ69*?&(j(0-UB;IaTc>+^Iv#0K z=79OvSJ@tEOl%s9X8(8MM%W)=|3$gg(?GB($^Wlz&i_vW(|%rr{}L^wzLP8nKC`OIa$#f#oo5ixLNF#Mb^X z$|cQL;P^+%B~&R9loz65`gdqZvB1^WvZKV!gKp_vA?1Re;O&)LntNKv1y@M9;DL69 zxap(a(u}|pN|9hJA=*?C+9JW;*!KJWd(yy8G$w0JlO963*a0XPI{^7%X8!*oXEpBv>9T5**F(rWt+u6&H)jH&QxL!yFTAc0*N`Zj|ksW6LmRhzjp2grX^9xRRPF zO>^vsI0#;Y)M?B^6G#_R>lzy%#_R(3UN)s+Hr*07%(9&(nqf!ywrJtFQnZ6wc$VAs zz}LeYVjn~haJ(Z5_^?MDiJ5RD8G}lcN}>tUAHE%Mz_YvtCoG#>Bb{y9bqsk@yACO! zj_Qu>da-#4op?5HX9v!BfqwLDCVv+^J=&?|NHs|j?k$i#iVo6`qn*QAa*SqkWSGKW zB8~By%~5Katrdm7oBasKl!JU6{vfsG$E%DUuLJU8NlT7+Da%9W9)XoBTrjbBO;twe z8?su5Z-;XOxSWvSj`kU zepn5#$H0j%;$7YZ|E4*|r|_g((Kp6PaYB*Ul^ddF%`OvP)30X->HQO9g4WSQIj43h z#}%i>U6PsWOsq#u8td589hAK|X63QSdHi5KMPL|KTp|2+zL@O{?_w61o;Qe@-p&9KY2zG}xyf89VIxS~7Bjo#!_VYQsHikUpie%rj6c;up$1j*~|GLYaSMX~bFPGaQ5{XPI6W zN1SDTz{X+6Q08Wqh8;th-Px5WXPJX}$t|5_{zd4I#pR4FWYe%KDD!=yVOLP*6jBPi zf-=e6!WC2_N3y_Y_G9IUQ_SMP^_&N>rqY@+XX#4eg8Yt8}hI~^%(_@-`tK9h6NHc^KGj;7x(PxCsCqu6K- zP93so-(gd$i082DcgmHD`to>+V)`bQks*&?MIxJRbZ5x!$6av&@S_O^|v$j1bKiF+X+Jo|= zeL2JJLHWrptFXu9XB#U|mQ$nYHmW7dG0}B3D1JE*Zs`vVwy%DUL`Zk=v3@xehHAXn zFUP_`=lkVgcvRzQemNQrTIrX=;h3VC&HRvnUE` zk157VT9Lkl1P2aH4Z{60y}}@T9j00zl(pd^%^<@7U7izx81~9Uf7Aepy&4k(WwRv) zA#ME7LxYgF0MeRx!du^mU?v8aM*PE#>dKJ}RpNF6OZe3qizjoaCf$oI7@q=!9#BBTNpif`^Y}|zU z3FE5V=k|B^8u8~<4dbyXE7E4AOJBOGdofy!8?^Riv*6P~pRvWbYWJxA?$QymuI<=! z$TCrNJ#0>~zA~^i|5@ULykHI_s$@635r}0sShtFgvLTQSyU|J%>1~7gqU?R2CGNY? znqxcEN~^d0t@+XtG?n!Xoi}~PV39v1wx<~MyMRYj)mtx!+A;9BzJFeKUx?#4IMFI! zWt3kPcCS?o_gWoY7bRMDi0?vYU;+8cava~w?X(|--QH`_^*A3+y>f25-59AixHkw* zo<4a>wI=So+SN%3c%ry{(Bp=yR`E@{V5%6t)+!J=x_6f-_UdcIn-$(d&v!6VD;AsG z{(wGIB%kgL=x>UnC9XiqL{Q`%z}t*J`Uj|xMPkg&a7fDiM=NayRmH~wmZuO~gBtBf z;gubOmgi=OZ|NfcukF*s{+lhI=OL^i_=KLAQV?UncCK6(Pag}k^*o8EuvmJfYIJ+y zceD*7gkuBm_W?`);^w1fni$n7Xt}1fVTkZlF(3J!Sjc{UabUew;9A#4e8c>`%+E@| zttRpX^4lbfhhKK33hOxX>%dghNr8}_wpr3jjH0oGQi;?}N1S zW1F#}-MW6cNmn7sYMgn$79-*}SXpb&ZrfH&*kD;}C*_-B-jiN)?btTHwWHdYV*CcY zl-h5wlDhUqqd4^LJVLCo%^^e=YY8#_8x&5BW}G;%!73Avp5?U|iab5}B4l#E*Hi`P zi=)q5Y58juTCd=33f`~ab}>2D+g&`k(Rwu03-qxhe(twkrRtf_SCL`drLJyO5TxGCC{RS3xO`g1{JsPf<{c zrO20JDc}t%|7Jqmkhdx*z4M@>cdK%4u3$&^DEO*`=WE(~D&w$%-zzA0<)J|uo(eW> zuV60)>63x^=PM|!^?)xB^)Fg|MEOyx*S{8?oKwyrze7QO;(2A;#O;?2OpE26N%ST0 z6wyY7ej?rn8h1>gKd9j3>v2PJV=TYFB>IIeK6uqk?N`Bi5X^@YBA@pi@%gHK_uf5w zGoh*hk_3bp94A1cYJjA%YZ}U?IH`syc2u?mCG;=?BqKWdY&-;cs-_A;SY>q7 zNhf{+1-zD}GsDppSW5YlVJga|)j)W!LC4r7yLEBBUZkL|-XGJSM6b%`vJO1^wn% z?p&`~hH06@Nokrx0WS2&n6Lmx1;?qUGSq~D<6Lt78ZdumX~Q&U$Qdjz(e7s}-E>Nu zcdO-uT-L}bfxL~gQ0k067w(l%t2Ya8j_4_IZl04(i8JJk_!m7zoD#-2bjl-B!p{3J zwun;t*4N(fV4pC^>el2Po1kiW)Rfr4Lz~^I>K6QkDS7R`nz_XHOLIAtZJ#+PEeA>PYP0u!ZS)j$Z`RdkLyV zB=+-wNf%T~V*ie0ZHfKI5Yt_!u(jcp-x=L}PZBZu$a5K4e07^f5`d=>B`qZOuh3LF zeKIZM4wG$SxjEI?q&7opv9GhyW?2M-v)KME7I1<>DFg844ezB%^wu>qf7_v_xQvVMoD36lxj%DRd0{d zWj11u(h3_faF}cqBO!-LVH~tb*+hGkv>c*K!U#qvNk6Df!D!?`;KFYr{&wR}?*RtI!sz77yUA5Q$HG0-R&PX^tG+5( z-a`&LE%{6|)(iAHSvu9v`&n-%Y2c>9EDRAPe=R&;T(`MXJ7MKy7a+JtaY`^J0H!~& zxhJM1k@Hr+j1E?F_fEegfj5sy__h>Qo<=7i3csx}u@`@orU{>u=@kay^ATyfnLuun zplV2xU_#n%fdt_i{85@FydgrOBsxY(UJOQKEJs9Jl1Dh+PMd@rXAm%z2o5s*fmECQ zsSv@#xSh}1&TkT)>DGKqQ3N0Rq;*E9dO-J{=L{GyVBok3S6%(*&*Y+~JJ28RKYQ6y zu3gH5j4L9`>@FLH}-uU$u_-W`)+Gr>z0uS>LI>;$6F{?hoIgWbf>>S)J=yf z=$ogkh2rTiJZ-8u+>S&&mJ;>Bh(ulJj5{D-9nI?PZM`0+E6V0F4J-H1X9lki3iWCGm;mLy){HGc`)yAKdM4 z>**hsyeprzto3@P35BO`rjei$B`^s z`fg;=Uwm|iETe>sLZO~5N(v#q7vJkoW)#rX@?tiznVD@1;I;SqEz$p1>0J=ZmwuI9 zb*WOM`k=tKGQe9jhy?9LcvB;~C5Vc617;Sb3Bd!ANqL+DD@ z0(y;t@&yfiox*QZaFc>t6ns#@-Gu1XUIq6l_=jV3E4nAaCnBN^Zoi5)qm}W) zYT&E2X;Dp8LuJisGPDg<*k;9mDpz1tb#-mgsQtA?F$eRCX6!F7x^TZ$G;e}Wmy+l)Tp{zH`_P1rLPO_w< zEWvSdCzSM+CGBKMJCvMPQ&otfY!nsCqPDUqUpB&VauP~{vZReHX(LN=P{N2WO^dWW zO*M?@5)2D%q9if4NR%hWX7iAd+Q1tP(@0*Et6_Qtu-hD#zCGtqH{0l9W#`M1S;NV7TnxgUIAhr*$49mh@%t`kLjCwy#1~|%4((9NQy^KU$^-JLHRCbE+VIiHB7>a;pqZ zGY3G{xD$y0JMy!x`RQ8J(~0^%RJp;a!k4361>sGmkxJ)3*j2VVRsI~V;??{`m}kvX zM71Euyy?_2(b6W9r1{HuMO}CUpbE{|{j_oS4DMj(a1{J!V$wWA`q??WYCoM`d4`^4 z=Zs*^Eo@csYdeP*<%fBX<_VoHSFr4h@NehIhOM+KvCsa8*zAn8b`E=pFCub=-)rZv zLl!4?7jQYm0nI;>RDSh>UE=`&S>vEnqq_!gQ>byl7sv_Ws%WDttNi3t>7)4{;}u*O z&znP!{l=-02V9=!51OBDXgp)P+BGZyNn;&&fd$y}}y zsS`^rvFF}WQ#|=VY4VPRA6kY>{5ZbUCnkPmjc;{@YUPi~XNdW~Mw9D4EKS?-&PP@( z{HI)_fE?IL%2^gVBXxnd;h_E;YAmoF`I$DN;8XY2ZdqW*m^ z45&r&r&b3~BM9wLyyvIjMfYZc+Y-}1#o|)sKQaydN4cD{iAA@8=a?wb+KYN78`-q8 zlR@f^pj5{;CkClIa!Z!ws>+c;>O}cxC`hMOU%+Z?p^dx zq!D0DM_BXib%~z}&9h+-qQl#)dGL91bG=?|+R2tLHyL{GB;pVR56)*VZI_KKQnyf5B0N80;~G zc(;xv#DGsE1mj;x2!?$cA#N?2R=TpV=s?Ijh!CT`m=J0($tdLFyH7k%(>Nfmd`(+L z*jCB!{R@=vUI;OZ1?|8L6Sh~IvO0jtA>L8bHW7BRN6rOtV#|)L-&iyC5Le+Dis1tV zzfv#_FKOoYQ*eTUD-_(MAQ=_b`&7YLye)}KMI>NXg%472w1QJ@c)oUt%D6_sTNP|j zP|6S>1n=RJa6aC$Jb_$%0;KnO;*KlGhYSRO?ATlE{lr@?mj1a*o({h>-&z@I{d%;< zlJ^uPYw);MUYBO*#bWXsDINXXe}MOSPkF;gW6f*M`pybHT^przE~^BSeo0N$#%-Cf z)PzwOQe@Tmsd`3y%4-QvC>8VP{7lvfirbc-Xa6cqq*9SBDS zK%7oAZ0BZ&M-1D!#ogf&U;iz+AnyT^j08LE#S@0(KF9r57sY>1&ejca_TQ6pZ1sC2 zej%T4L~`yA61H2xhmql3$=okZzBWx`2+HDhDi-x>D;$E5QZRq|D=6k}ky+L`BvL;I zKG%^w+mbX93z^;1=UDflva5dfw1nT1(!~mg`j^FX6{;m(N}3BT6P3vFCk2ssA5~WN8al`VF$kii7852NEZ+*-%q*=T0^q>0d9(jwQ!Ck@I}bHLVP!ml*M@?`UTk zS5IW`?V1ZN=cKt{vLloaK)bJ+d-7h~lS%KF0U06MMe!8ZV#PE1YE`Pr0&_0+be$xH%BKxE4J&|a3;>gFopno99Vfxg|1AgXfZU6IQR6aRb z{(7R8?eM+whFn7&yr-Sdvjq!JO8Muz5T-S>^NY84W|W@}d>_g!G1%}Ic<^f0{wf(R zYgQ*i)Ea)DC)T5DqhwzH5gC@}?GzoGv+Ha71jO!p4GWRqKwTDBVt0k7Zz_q6-i0W6 z*&YZn%TO#GvWW_!!)5Vi7SADmEsAXqY+@bpu_!miQI_u}J_6>dJ;VWzzrcN2yzNX~ z_+n6SBwkm6gM&|aEl;JSTi<|o6H)B$=u_^|C*hsxw$+2TVasp~B#4o?-tkdB(Q7fZ zQBKm@%7Mf|=9eG{o8Co~Tz*Si`PEYHf`-|xpAWMoY?q0O?v>1X?L?%!To^LaPggpfJE(M z{X6t=Fjks@$C5#vW)Xs^T1gmGb}@hynTbEF;8O~Ipx|Lb(B%Rr>*;u`UFO>LFZ2i% z@>C!VzD2@f1$!#kU%_$(d7qI7Krdu{015FjmryF{Ko4h;+*!KH@7|}RG%xC>Ogvn@ zC0CH)F70E7X$k~yM2qG;!HyRa{d#SvcKbEqmFP0b6f}gHf~Km0k`WjHMxaJA0+|bJ zhG2Y{5h#<4fbZ?{qO+jSbG@Bcbk6=?HP#jlKz?ngbpN@MIml$KdG5EV)63d_I(2)K zWU%DWq(O>fXsUuPZE_ht`Yx~uO;v4y^#n#PqNyqmSXW@C#Hc!J4~(1zI1*sF!15%P z4lErQnT@8ZRA9-#Y9$r`Mvmm%?`jva)Ebegba3QIBxjM`Tn87_&gHbq(KGa9r1jTy z5qi2?Mu-x%o6E3aMq)1BCGHC5IPP|6S>*1+8^m$9a~F#Z&q@}Y&jM%r?OGzH=UaIf zd3m!%c#3<0xv9TUJjGEYL(0bvV~r^vI~4B2zLupilx|AfC;J--gLpT;TBbo>GvaG` z2rw1RuiAhH(*bC_q7`~QK-rxHr^5B_=-%Zo#49YTk z(iKR=C9^0JJgFPekjWzG^5VYGM7KJBX=o>K;|l3$S%ym@&mOmpbtB=DxQ`$zTv9bo z78Ne3j%XxY(m6yU;gTpzM1@Pbh@^IyQZit;q>zz=ocLQ%OM3Y+cAEDfZ5nNn?bCma z3)g3v;owFUDC1AR9mUiT&Ng{nR1vbz`W)Ml4_v>n&-%p*otAiz=v;+XCOu9X3(Pip z0UIyTEFCBE^krXk-ReT5pF-}^#WnT*cA;q~^9*n@S!19=zGulGg;3b?l-r1m`BQ+K z$qsOos|EV-ynTD|7Pc9act6s?zcYJ;adwORD2wexF$kV;1p@wf#g?1=9df~RoFb-g zocQJ@|41?J{@{tap*+6nEOe90u!Md)Z4lyPgZvc+A^gjhSM-7LWgQ~<$nD|Uy{#&N z#&5y5J>iaaQVB$>O@B_;OG_q@U2(Nbk@}uUSl=*u7Fn3?5L|WGSwB>oCf?fMUnZv9 z;rEL`ZvQ~cqQ#RJU$RKl|D2E}dNg6V(sR2%&>CN(&lQK-m?`4rE#O${w)j0_)b0NL z;*JMO1JXg}f;N!4hu-1O6+czR#u(?}3nm6{H;cvHclg_#oD*8KDkfEYc!z&tGX3ev z6;>zehA7F(=xFmr`w!=M#DLrViQ@8iN@K-!cltMo{a<)|>(^%)DUMc&3!bj4nroHT zhGPhK-|X*TGf8bWV<5j;*!8I>CTWy`sKHzfjl*pwe?80Xz`k-hv}Y|QN(|nel_o}V zO>^CPt`J7nLzk|EZKcf;aXr-Y70UbC*2sIgUi$JXYIGuNqKB?>6jK&dNuI)6shN^I z(GfNuaJA;}L@Zv1V#O12b=31~6x%!zS4chg$YRM8$wktOQT&-yRB@HmvmM2XC6WuJ zV^-674n5g$ozzuyy=|(Dg;FTYu1CMaE2W;@lCtEAxLE3X^LpD_IsOK`0wq(FFmf#n zs4-?>L$owe(l9XFxS7}b%oTkWiSq9=^SFANCmy{IYpvy%pJuqyVQetpTyAqgLunzS zY30xsYldVZBDhEE1q4rsRI!ptIzvof)hAb9A`XO3%N2{)^|SJylJ)Had5Sk%;D<$h zQ@?%)>W?FdtV+*mlR$zxCg#hhm{I#?W!4 za|9vyqRE6XQk}10NWmKvlqSq5|1X8_RPgr-zOLYh3Vx*^-=3r^-4Xy6;w2bjMhOzU zz%oMMXA+X@!jB!pD_BCGf|7AVKC7@C*Dhh9f|3zLezC$OBM4kFf`H{Je>lydNMNMO z;QP{rvp6RJD$AV?Y~#qGzT^yXa5~VvPifC6#xT5sYpaW3{9DqqSQ`HZf=M8O?*_X> zjum@*uj#PeAKLr>mNN`#|8F@%GL>OnRcoAKS~Jd2E>>mWc1jf&T@g$TJ&Xx*r(!_E z%pvVnpk-Rf0>%IgYngVVz`c=Goj@G7vJUrJhMB_$*x2+)%TCk#1BxQd;a`Bc1GqsI zb9fC}hm^*tkd(Sm_u#H$(h0;tE(5E&BMD4nE>C3`^1EyrcOf&v98LzN#oUh?p_n`* zFOPW|#}zT7k?$~vZj?4>4&C0>y7<-Ofx^5`(Q_jl{UV+VTt=OFJ+B9=x^7+E`govY zi2Kyw2;~fbI66Whj}~8!Yl;NHh`$7RksuiHz0r+G5RCYHiH3tfBic7q5k^Ag!-eZE4cB~q!Z zFHmS@(hk%@h|D%Js89V8@!}JK>`-Ua@f0hLZWU^HN)*Dko~MUG{(vj;lq%#)R_m#d zw^*&0LiP~pZ6hbLgu~c@XqGV6pMlc{Yd~BdX-4sc^ljp-3U(27fAY2YU&RIPdNmL) zE^kU#T;S|Ift=3&JQpZ(_6D|y9R)$ZSe9+J5nZ1R3~s^f(Hr27xz7ex>SE9SqFj;p zT%fpB_HFbVy@!dE_^fQPH^+<>M<&N6iZ&zCI*JchbVwAtp9}2!@3Lq&J|9pl+U3vV zDu3*k70seikJW-jvz1s3zhL35t~Y1Vz+5+D(R95zi-z)MEE-f-%~&*Omh81dn?=L= zSThzaMsLQVp|}}~hT>=zO%_M7Xef?m(NNrsMT5>Y!lJp0R2V=Svw=s$sz)@BCP{~R zH20gRJg=+K&J&-ghnX~JtXeQ>(8B#UnY7v#Oq#_1XPC4-uLisZnKTi5ury1&{Aysp z+QhQ|L4K^w9|Hf!kNs!(v9K7o0C5we+@jn3nBEV85HpKHJ#7{IvF%?3p@VeV(?g zDz3u6+Q03*kVeneP1Sm76NqP4HC1mIa`^33D9juZPb#k~r#fLCG-$S8mD{5jh0S8s?#BMuYUZvTGi4k;eX}8J9PDkEXk` zFanvwyhrn7YS;9d=?xbzzj$bq>)W#FWfzyt@E#4yk_^NP?+BIj{ zoPs7-pp0ACe6qGHP?eFJ9ICX*+D(p6ZGfYaU9*Qa`M<^9w%JY7acWk~Nk%=Awoi`* z)QkH~JwByjO4;n=v!0w)(Bu!)z@uT)^oF@`KtAKNxg1qHef(m7PIc#m4{%&O#^jLNdPw{B~?ILnu1#19Q1P+tv4 zyPq6xnXD+AQiI{HnNfq`zW%_RuvT~rjAy`8;b-Vn!^+K7XE~Obe?mSOC>)%{W!fFM zDd)N!o$wOoJi&vb6JEyR7n$R@VE>3D3Yb0kN+e;2ISB|PfPKVFFJ$Q`3E*s2e3y&M zhV6oVFN^br;OM47i($K9r@GnbGK0C-GwHZs{|ia$CN1V53`mWfVU*gK0pK};CLZO2 zoomjXXcz2IwOnRS1BveDFdRJ*=jXJh_Jm{^czyE+QmHlP@oaF5I82=LUZ7ow+6>PX z(1t<@o9=nU{2mGOC|gFno8w!qc_PluEp{Q|-26_W5$ERBL?h14yRmJ=xj7ekJUirB zq)+j50|t>=>~hw6gJnC-tC5atC*lqUIwk#pj<~*(`fx4o3zryjFwiqmX6{m%pNduC zir=Zc&)s4-D%!1|RhjEu;^%{bj&|#9D)W8O>-|8lkfdmMU&mNz2|7(ybQ;KM+7mqB zr*msTB6QAYF#%T|N#jwjkCcj-`msqA0Q9qMY>f3Nv2!_++#OV{>7z&)it6N%*q$}o zMy6pW5G@m94Vsbq^))0Il4qq-VH9cn0n1zVnQBSfUB51r#7Wjyl7_p!E|j!@=oNP9 zno!a+?E95Ax;kX{Yn9zE&6anrvQKZYU)R{_&|)i(?N&=mjQT2zbK+prENSq3txa=F z$U4SCh29ggXlkKfXP0gYS$}806?$7Jd42_Ur>(I&FdrDMUtx3LXTaVxy%g7veR?wR zy)DO03~~too^Mj-plB)nQcsf^V_{c$22$&hbq`zZ8iyeYE|7&IgVQA(6&xqwm=vd4 z>I#_w?M~o2q@G2~*Vy`*I=0?I!Om4*9=uJ$iWH|jbvrV+OAJax4lJL;pV;oDAlF{F zF)sL_Ol%JYdH1^OcZO1&TB-k#IS=yc(sk(UHN73Uef+X57pw9up)5Jk4t`H4i*`18i7MX|%I54= z;3DOXe6Id?XwriA>`qg&Ta}{9L(cS8Vr)3QbJ6ZH4$uU>7vA@3e#fZ!9joSdVv18w z%`Z-sZJ-+)(DXhwuhi$Td0Y9+4iBbEI5Nd4Pwgf%Dh47(88wYBq0QTDH$x9j2hQmX zj+2Sqp&+Gk+$AYat<(jwWP3zsVcR)bBxF3T4El&vsg#Iy>&?^es zrM1I7kP;71JaVz6r&bc6`AAxhUJ_v5*m$mrr;Fl;;oE-a$AO$;lx8{ZbzpJ=G&`!Y zM~Ab4oal_TqiX{&LkWA}>5DP9qgrcAink%X9e-H)u?U|yg$JHvP-|l$ANL|Q{2h~t z2Z5leLHMXluP_L=MK=63^T2aNlAv)8NF33au-BKC$n~X6MS_rz1J<3S2cE(>zWn&h zhP%$>^wg{fZs+s3h*N>>TLG@zFpn5@kr}-^ZsmydA7h7IIH{yx31Xp(18st5 zi?6>4oD+Ig(`ODm`|QuTi_gt1f9~gT&|~_?xZ`GA^_eT$KhIUV?)EJnH-5l1-3M@| zpWAJX!1tJmJ-!DC$3Z$Lx_42Ygz1W}G zs2rc?j@>nGynAqe_g4r3xcTFvfS7qCFrY;c2a%s^l!|+g1lmc{?LXa;p0wkfqk(!| zw?x?3-N|>7U!07aqjijH!kwFbn4A#y=x-%PT^W8 z#)Y*Scos?%KmIMyR$M>S@ho)NKj8TG(KBO{U2U*a&FxQtZ=w2s1OobYxx?`U-$I-4 zBFwfoKT6+1yK&P$C{_;74hZR6Xcd@HQ`Fy#$P-m~aXb>`Rwxa7<&;~YHElI+Zlqfw zy+CZ9ucry=Q|Og~D4#;-i=!-%PKCZIh;k~lC=q^a>=ndK^f;7V80A^$Fm~YCo`v+U zMY12kCZuDb%2e3!L>vqCEQ~l763=b#(nYsD3c2QF+xr@QxQ+{d$(_)s?gf};z8W|! zt+^56w}j=KUiuHZ^M^o|n1>bNwPOpCjB0F>U7MJjDqj5|;BCttvrq)s>p$EV$>kpU z4!S|X2X`d@82F1Gx|c5+TqaF937=8$ZwgAr5uX??NO5Z+_hE3OVj>~x=O`%k{lH~B zdcYAXf2@LBm0w0>tO^ehE0 zQgDibD->L*;LQr&DvrKprG*X<#aZ4V#Ol`j3LYZF<$b2g|Dm84p9|JcQ?P@Ay%ju9 z!O05FSFl#WIt4e`Fr+=IGM*zu2lgrWiGrUi*redk3Kn1pSiggUrztp4!SM=Sq~HPt zFHulPh{@e34h$&#-{OKOmJ3@nbvs>*ix1{zRN#hd)$@?3j}N9haYby^meIE_Je}>I z7Sl-=!)d&0$S5Ft)O9AbZ1(nq)$!H81~i|{sMpI)Gu{+q*I}O(?Ar8 zw}zQD5u#H;bZS&DPko(=cw&J+eP}b{{icF8LZme7@D$LV@)jmQj$Q~sMo!h^xD$HZ zZwiP`DVxP%Tn8d$(H)-*;*&ukC(lvDkp=VsMk_QLX{SvJgqO=Yl>^;O&G#b2M^hm`6zHW`Dm<@&jKG6-s{Za({Wp|{X{TDh3BOY^KrsM zmIsyR+~lg`bB!MUDylmXn+GLEsa*zjW@Xb{=&t7)rCCrXkGJ?>W}*vwi;Yq(gyMUk z%zNtdN0a8C!DssZsAsxqE}vhL%gnK#+ttN2$Xi!jhGSjvGCZE^S&rZbI^hcvoF>WvX%T%E`(Bl4WK ze3aB<+7$iltH<=juC{u$tv;q9zL}iov{|3kbNY*KIYkx^YRfLG2bH5)hpA}xG^q!5 zbx7WqcoC{6wdSNx>Zu;oW*t`#YNX?*q8U2blNvqH@=3)Vi?=pjE0NBgzPNVEyK850(`5N{I;j0H?v@W@oqY7_a7XVhwjW04@#M#;VMc>ocevu=+rm%J z_2m7)3V`j@Z$d(^1LJbOqY8fu`R;5S!WJ;p$iM<-5P+M85n&6MSzwvntC{0iz_hWQnfc66fGSl5Y8 zREOqJh0kYSOar?lAk7+Y5}4RY1@-W`C~=|_rD`HH-CNkL1O+g0*~ z5qp&VtCtFHsJ&yG#DVGFO!2Z6OquW}oEio$FQ|rCnWllueG)ZdpCB3z^b;$sm&1X6 zV%xAI;XpsJTq}TqiyX27EA~uLmK@9swdc7H*cxqpAv&S`hO>6G4YoU69sSfGV6QqXSYK zcNY@&nJ#CC8KcL?LDWN};jZ5j@=YYFl+O2re59zav@354+5M7AXDA(gjMJxIX`kL; zzpk>=6GI8lv*>EdWz?l5Y>Gk=HE1?R=x;=&MjGzM6Sx*)W6*1kOxQ|PDx_WY!xMfJg;l^3`d#Ah-~gjY^yXne-5#2E z?W^6chUPtcXy7qU4$Z;vz{#O`-$pTTa>_oiuPLO)=0i0$_HZ1sFRH>G4TY84gYl8w zaH2gJ3L9$=#>aNMk@jFHY^*j)e$R?!b8T!9$!dKkldN}kJb)N*hgQ98dlr)M_ z1vGZ*O!ScLmShw5mgyDQgwp@5iX521`LGK?aB$}%dWO5ZCyo@LQ$APS5jC@C*VD7 zjh|?IHjwIB(7SZfVlgiZPQ+RZv_$QkXVTDN!^Vi~yJTia9o_u=;KvCU&zn{~qk8&6 zZN{8=lf~pCfqqDG~ZI7T#?Smb53~V3lp|9P0cTm)R zm=YB87v?3yv|1|iQikHRe24I!=kIg;y&{s6Vo&rKz8xR!zOu;n82*)4)9Rx ze@esmXqK(v8-;87MGfEZa^5S^4#PQzr_%KCUZDZLri^>UQ?CZn#H(F`*=xt=CUjaf ze@^vcd+)}A(vlN(eb?c1)cI`@(Dj{5ci??@Z0Z^`^-v!^`51@O6+B--uDvt=213jm znJz+UDvXKQq{``Ol=Yrg@Kpu55sCS7=OQ52s)*Bgm{6`$C2MgS-)_tpC?2|0PYcab z=u!o*R&bqy_bB*ZgwTFHqM+1TqF+y{@_h=vrQoLuI@(M(8A_ZsS;1Tz_R#1ihXs!M z@=S$asNi%37b|$h|4Ikm&*Bl~birK=9eBr9;0BOtH1XrBW?BaCqN(%dFPntW04JJ= zd3qN2>$WAdpkeyo2P(ia`0s~Vft?0mknkt5St(g+nD9ig)9)}^#_mzG+ zj|f*gdZ0_#Qf4487ng_&*0CoB2N_5noLTb86qjYfXod^tLr6gfo0L-&a$C5bM zc`n1o7+Y}k>erxLXOHm|@qnLhW}>z}NG@8|Pc*+{Ub&5pHP2y#!OM|{*z&Q(tU1)i z7ROc3h0(!q5{8d3U@$sR*c@P`nx3lADxk2?RoFD~%+JBa9xSsWh{e+bQ!_+|Rly** zA8-3;|4PMt%ilucV1WpE9b6jSAkwy3x#FCPKKMLr&&>8V@S?SA#OU(W61b5Jz7n-0 zxnOIXGsU+9gJl+#AMIw9qR zJ^PHi;jUP;SRDAQo0 z5lPo#YyU@$*~`UKUwCpeHsLCq<*s5bcb(aM&zjggCOBZn;UU5Ebdh%(zJQ}D5IwN6 zAjQy!*#3w1Rv}~m&aQ^*m?mzh2)5Nz#nu8i+_b8(h5i9dk+fW1Kc-i*2hj-UYvP=0 zREiNLj|MxqZb=etuIk-hZ!cB?^=v^6ORRjmcY)qp436)JWh?CJckN6PPqWtF#Dc$P z21MT2U=T4ClWz!i5c?nOZixMN1`Az#lf*?=qmoZNvo+WO%WPXw?mFlbKaC9{cSp$? z!9lth`%GqnSTQ{Kv;RX*Al{Q-E7+uoho6s8E?{nXA(*GH6D1>aasqfcv}!-fmxJTX z{}_2)+~qwb=!hLbDR9nsP4jof}>R zF2G*uhANmi;#E+ejaR{HST7cZs~tTM*-PC+-ihpyq2rUM>D+X*!G0I?$Hd@yr9Fq6 zPqVAj5FT9~O1yY2@CkMgXL=AfvS9Oc0&}pmt+@tYEOWe*iG<$}i-1Mm5L7j|&q9_v zuMcXw$1&N3f~cF;ZK1G3@+)`_-K1d(UL0A(4C6W*I}e!We5A4AxeiTZj5l%g>Q%_s zi;<7DGam5M5oQO+l18Lq*kT@KUJo0qGO1zEOYf6q(_&#}6bE-THo90o|BQeXOREc! zwEP)nyj7Lr zHf7Gdsk6_oUOruH{iC}m@*-;SW;l3WaHzQP{NPr5mqcE7Bj~&oxRG_4dMB)(Hn6WA zvjeY$8+B0!mdkz{l+S>x4Lq(lxc)!#-UKj;DqS1y>aI$6LP9#EmyiTVNJu~eB#?w9 z0m336f`Foeq9kEU!WIM+6S2V+cOuGhyAICi=y+YgQG)~#++b!H2iz5O!l)x|2+BA} z82z8;oT^@u4&sdW{@?%o4e3*7t?KHo_q^}(Zpnhwz=+2WDn+b5&x0_-*A(gEXr0HS z$iZTKM~WOgWVmCpL-ar#9+RsJ{o@n_-Q^R1he;Q{5K}%*L8@4^i9I(Xm8zl+Mhg~t zR_r+6lVyKe5{F!VT{nrOX`U>tRFMXEy5A%XTNA~i_lk2x!zU@ZS~o=)HY5MluFPB= z6d+6Kp%2gZ?9x^>&bh$TTT4Pn4oMw4n?-V~?kcq)KmR4&MEJTsd8lKNa{>be{8Ebauhp2&##PM)G(x49HmK||i zX+))Laqec}GO{?s@^KyA;BYznq82bI06HblL3c`rrx%9X3H~eoz|OFXiao$M z#sS0GX>{mt>2I^pb>iiyQGzjOTdp@mum{he8%C-8SXF$(OLP4Z^#K+~ut3Qb1DeqV zYi(C2&M36_gTJ#@Y_SKM`gT7@l-=p+p-1os{oC*d0n18tth1aek5}q*MM0h~ zSxE}7H58>g`JwE#>)MwTvX^^C`xlkpkumo8khlTqf%iQ)-12`~WHi5)NEL|w${D{!K<5c>y- zO^EhSIpeH$T2sKJb zg9{y(mO2up*l^*$0UQ*Fo38f^i&K(LAP}@Cnc@hYC+9_W9l_$r(!QAY> zRMJ3}+U&O~DqwsGY85UHT-7*Yt*3)_N??H`31!cMzxv^Jk26FUj@)=!ie8YPujqo7 zVTlDq2OMLbE3YeWSuG#_ipK9d=HK%a-_!KuQ6&}bFh*bqkiig2z*=aV|H2{w6(j%> z8@K_eKoAr-8U_kXkUugKU9bVOP|;FxSV?wYES%(vi}^FE4x4D0;7K0CN6X>HTMz}H zPmRh~W}yIoW4Ftghz{`iqp@O$&mV}I<3dq4)R!NSl9aB`ki+%sFx)r~$EIj+?Bwyi z+Px?&F`wLoxsOxk=1ZfX4xau^yxSWVx#(e_4WRm!+c@3+LfiO0jMSo&$2!YPb}KFEFU@{G;vux$8s z*~>38Wq+W5!G{jBRIt+StB3?A_wW;wtt5%Mxjx(`0ciP6M+J-?VLfh)A! z(4+jnwyQ_m)YGH`akvyu;7{XYd$uLTFXGdwxfr4fQapVfv9EuOnj?lymK0AHI){{N zEGhnVcDsyp&Tu)?uyE+<`aJvdijzT0C?h+_&vk*Pqqc6_|rHcD8>JYeJ7RThek;8!&J@O?T4${|JH85 znZLbugnLOOT7Kslle4hRZr_SfL?I6`;REj!@JrjFow=d<-d8=oU zc=$2TbEm%TfBksdZ9h!Tm*m0}^W9-${)6}iL*$|~j9l21nE#lf6vDjun>Hh@w$u`Uq)dODF#Kon;KMwCi|cF4t5jhFx4llD`R zzC|X&L;$(f1OAIt8HR22OVvg%zE8}5|0%ww*%1tWlswWMM*|M?IELGQY^&`*w4r|! zvEfVUzdl^<58LqlW6d2O&xWpLkunhC?=Ls}$xh7>7mx791_-r7&i*fqf|Sq43R3>d zsM&F|LsI@wblAUUi`@Pppi_SjDPL*_T+a9qfk5An9N3uyl#qXd1VbtT?4S#v6_xDM zVYLR`AkI!f19JU-*{bKUaOn(7XB@||uB3cJ@HmoF$Uu`xH&)@0FU7O`b6m=jfZ`h@O>pNHI>oJIEiS&++pB%T z0QhgFxM)Hj6EOfY5+jyw^DGxLuk&_Ue{#)%kmA8@FAxxv>H`TDNcF*F2^L5_qSjNP z1-dwLQDLre1HP#cS|IjRd2~CJh!QUNBm@@_4eSUQ0KexWi+#EFcTJ$c3n*~20tx^H zN}%A+pbvK|pkS^73f>I?1;7F&P!J>#nJXi-h)Y&NiwG@&_mxxSC)SBg=cT5k3@j?j z2zyz1!3)Kb!|{H-sDFOGINZBWDJ%@u1+|8N1!j|Al+1pyxgH6=>t@3#WfoIf|LUt% zNQQkql4moYa$?;-4sEYHa>#w${=s)h7_Bw`fOmm*rn=@BB^7YwzYcv`=RdUev@Nr? z%(s7=Xs?@9H(y3TQR@eSC#d=lPcUTG5P5>*mB(wsP7qvwa@6$$KjRZrZmE%7u9It?P6N1E)AlY{bylChdG5ASkno%;lf19r+_1`(MdESxo zyQ$bxEk9XBU8@uSVef>XsfXWeVun+A{)+Y})A@jhwu3pQ6;p zD44f4wi;dIc_!$1I#5VmhQE8TUL0c+Xyp`4?G3Zz5WXx}tFm?2ie?IZ6AzCoO1!hu+nGx5hy=iUq-7%! zG#KCRvGE`Se?+ucX3OK1I?Ft}3>`c+C_vKp*bM5Lb58vtJuK)6*rbj)cqob>n$#XA<1 zItG>6U69u!boF9Mmww(j7>!^Hjsm?0#r0%So@wo*%`R`8IO9!EeY?{88*@{EuixcQ z6nnlb9wzoY>WdY={m8U2{4LKCG3nPvk|>+%iSNRv!;G$b6H{L-^Eru zxbf__Jr`)=%WI&?-~JA8d-t_@x>hEREa;pi+13aETQs#|*%e*I`&%ht@n zXx)fb<83T6p9yqDGdq@`V|^joN4Q{MF0|(hv$P{3Q}-h++N(J0Y`D9ZN;}k5Jup0J z2-ewv@!AHlx4SRbcnAIOOH5znmG;R4Sdx8>;m403{KThyI*SjV^;U|E;?!~cm436& zQzJH{^m#<+A9(VMPs3xxkjGSivpml%m$1ZTE;q|7&GwsRDSmj{?~ldsXH~W9bGfqG ztg0O^>*3EvZyX;6l$Jj)Z(!}D-;jBj{oL$2gj}PmT>XN3U38Rl!-)Tf`e7t%ed`7yo^*_Mk+2N@Ep9+TEG^-nb5q9R9=SZqh?)3 z)1v5?vG6~oS@a@@}k>o}cu5UL`$0KYyZr0ZmW&+ZoeLkJwcHb~2<_ zwEXRKZ+n@6HXP{5emovrrYB1|%#9pV61+%H7Q9{Slq;=uktIp*bvt2&L-3xQa-f+FmeozkJ&t;l0$Xp z?^t<*Z`d!;f@D&5ap1bRKT znwmg^KYngGWDb*bb@cHP8^+n#S7W1O&dBpx%`2hKGTABf4?e-Z#ecK<=n?&^jyC;iWOb2M>T`(Byu5|AdrR`VNnfG?;l4zVNF?zP76m)=h{l7%_yaqW&XPBh{zzhPiYquGk{4wqu54`ZP!0vJ&tOIR)%;v)jfRzK4a50CrJa2+m2WKqQ*c zE)NChV$AxhQ(fY4V{x%4|0*x0UGC{lk(1jv^N^=Aa-3{(#>es-l|Dye=GGW*!Xwf* zXsPlI5*6e1BA6&Yus>&LZDavq2M!N5rz|7JZRl{PDVLdF*Kf{oYs-aJ2o7h%4ZXn{ z%>a`$nXPw<0z2#=4zqO$TQ{K9cnB-KC>f@*8_}_Y9f#R54^Y?d#favdENDV^d<*O6 zn?>e?zQ9E}uHqu{Ue96KH^qTvF}WHNrX9r?)QbGMTDI79)N_+|lw4B1a5v?Q7AOAU z@z{^qMW^pP!*Z(d0L0-#A2Q2jcsyArS!1~YH!?0+9GdODMC8?F*NSQX^bE=zi{5Zf zYN=Vjoh5G2da-&DKKJI=Gu@(UD)QR8-oVkz-}o{_SwfF|(ep}|+hT+oT0EWogHOr{ z^&c4Gg!azuLr0BhFv@FfWcBOKUF=k06k@FwjI#49TiuW~w?EbCDFvoDC7AO1Q$S(^ ztRR?;L`wDiFTSH!PB&R7Q!eY>?!(b z6ug2@19*j}35Qqu1mTsUHeXrVPoMs)%AY>{774Q8Qvzg(JpHTTAdAg5ir6^*k`HPHpmWCpgiY+4-dHfGpNMy0>DREs?vz?JJT5?9=CVUK1efi_=RvyL0|%!O zE3kCQgt(lH3K=q(lcGr%4p3M+u^yF-%$|+bfby}o-^#NoAA8+Njs({NCJF=oVl)R6gyG`a>Fk81tps7t;F&BChGsN0lZzvu zq|Kz^FF_cxAXW_^%!@d`tr>mq2Zzp9LuaU=W(_C|SrvI>v7TDAT8*5lMw&H%Ft=jl zWBBVE9Jxr1oS;UUHGnV#U^1vOQ48LzhK*Lk%-T575Sv~qwpSDl{(1Nd@jZ#Z@PK!L z_zTOC@_408#5zvlFIm=if?FY9;dNSW+HE(shsoT2DsT*AC;l`X^Y4v1t35cT^c3Nk zQWK7GO7jV^`tIVi&ZZs&g=8e!hh#R*_RJE%U_>+qqGFu)bn*1&w9|;Z#EHjay<5cO z7jL)7hP_ zrjCM^-$ApKtJE1OtJ+@@K3P`vj_5RKBZPhMTAau@PsE?^O}T)PrnM1hx7kkc z4KM8UsB0tN#&OW!Y!o+48luS^aP(SPn+?4KcDylaEot}N4@l(aMg+CFtRv{_xfBYxVr)bve-2U;KHn`&93`^0PAydA{@8Q$NBZJ!xk zJM+$4WLBnEv~1Qy!*%w7kk$@7>l)N}Ak%xHCVKwGuOMwBAGe@PJW%el0kv8E&^WL1f;7V~J(2qVcI;WDGRiV)AWBEWPX& zc(+MFdo7lGMQqwym}Ot!7JVyWlzuMBmcp`|scTkPwl-C4s^Rf?Bt2Z_7O!C_L^hhF z7%zbUzb`U-rDY>z>aavFELJ;;MLV;vL#Wmz6Z-}vge?Z0)imRxT)Es0i=q+?#Q zED%RN&KoGUf9x!?1Smza+RIG`l9i$l=x^DlHd{pNmM}eZi8N1dsq7Dv6n8KkM^j~Z zt-i9UCQUElJ2E`9RMex^#COzA-TS=-ZtX3VEtBB>{s)r?wN%ENL}&DB0Pe8Lt>LHaZ+E9l|Nin91&Ai zx#;Y;u3@$ExU8_+j0h{+R@5!RyI#gD-^c}Rmknb1lseX*65Enprs=%(iP0rr;dMpn zZfK9vohAD8_m1p2&k+Z5xBT*96NWhw$4l4y3riiRNwb;xmJEQa`&DU0 z9uZpzhAEo0ZP1b~3d6YWf%T)r;Unp>;!j0IS&erUdPi%WdASz-8U(eR{ajNk7eT+~ z6q7|n)aZ2K-dE%jdpf7++M~+qHh*7{+c<_ty^L13@Pi-Zb!+QI!60w0IGo|rHDxDL zi{_X?Zb{0v?JMf8U8hLdb`F0;k+O{aMQ$kTBq?(bM*C*5ge0yO?Z&f`j!A#sa`f4E zxkcA|i*k&55VPOWur66_xX#Z_(ON!?e`XCBfq>fuycwX9I`i_lB9|u9xmMUdg=! zBOC~y+mQW?B40902W@hXTI4IjCfD??DU2XrB@yHco;cMcRYPhz#V3zK;Ew8ho+<$e zOCAN^oa#xR510iaR_!?aBZ80CvrMiBf>2-0u_42JhVnpUj`Ph39y={Vy~>UtVZ=eg zNLZ)apOWxOFp$SrVSYLkJ@N43rE8bqSPJGNT7eD^U<3qwlDSCGL0Wa#ozmVp0(2m0 zu@`e~3v@700q8)x3%Kc>gIWl5prma72&`8b6$wlI*^w37AK9lT?QILa4_RQLXxZWH& zR`pfI<%iW~qXQ-tqOouHi9z4MRs=4BeUsrsNC80L@>yx2)}G z3V&@6tGvJuXe6^!A|Lco{_RC4?UF0nEPzX2KiJ z@@5;?gW^3U_M#EV;zo=ifqaH!t^<4%pRNJlx8X+6$1mMt*d%X`$Y0{i)83IL2sjNX zp8eyFjUP^;SK)R6Qs)s5-Rw< zkkO9ns#_0DvvE4FzqxEM}m%;O0jGA!;-b^P5<4h%O{)o}0%i~e`QBZYt$2e`ck|9m+#qCZpG{5uzfw8`?II@VcA{?WEln≪(&o&9K0hgKjuSsz;61au zDRL&e_|F?Aa(YdX)Ae&ao7)#Kg(O^M*Lt1eUo*Tb#P=yZ*C|1gH`Ss>Qjn~TMvc16 zq##*7xQ{7F5;!&m$(Qk+n}TGO5+qOHE{6${($Roc%Cw0RZf_r56mF!HNMUkxm@v5_ zBuqjkl*C9%l4~RfMoCg^pp02tl7=NJy&1+tP$W~Jd^b#>oDe2ZLiUsbRnkt*ZCCVl#QQpI-2{nkPR@tdaWr#F~op^iIN_tx+s-u zrAl6$>>^!kElaAA%i<`nS+XSAsE{nVAVQX`LJgtVPH)C|5-S;rE!(WNk{;tI0b6qB zwEsO>Qt?;q%97*6hgX59{N9;1ym+Xl*er;W7cFnUnwCTU^wlp1Ve^$N50NnOy+30we8qejo$R+il>}cgZ$>BG zel%dm@yzc%8J%L{Mg^%HNY@UNn^HuMGG~y;`6zEjCvq=>tl$C1OV?)OSo;KreOk$z z>o5ZH=3VH5W_vzsb|)DxC4I_JanNjEi4HrFS4H5U*?yceT*g_P;c}AY4GEc2?L$4d zDP+>e%=8jl&O?cqVU5%6AYeE<6`3J*cCK7mzaEVSWkg7plEB?=LT1wMOF?G4FqALN zC4C8kWbSpg1<4!*;r7TJ!Lpx6=FY@Tu;|?B&6rLRloGi%=1p0f$!N5}+Qo5F*fsku zit8TMH$z0YqMc0Klz7^9t`9to<%{ZAXZfl;Ua7O(rNm9^&Y(rU!s}AK*1otY$>G>R zK{|NB(4j+zxh``oE_L|Y&_QX^MaQ(DZI@V`R^*KqpC-&VO}o~6c8t>GiYb17(Mi42 z-VrZ+W_0PyPhc^55^cLE3X`WuV*K?aiEoZ}D!J33qTy9Vo!0&y(%yoxz7!>Pz9_{` z<2-O@A*oYp0m$r8>;${k!({fP97%Q`@R|Jc^v6_7;Tk95>0E4#rJV!QQYrF-6apmFRiY5Xmx4$co_@<$j>7&0;_JH$PqSFOXfkI=(>aBj&J|~$RMXjZ zOj}K7+c8lzooxq2lRcwpI@`{SCVjTjbdD-z_!_%>eoWbOFly)G#F7l=Msrqbh!uG7|a%)0HranJd(JC=i2u ze#{~mN{bw=6-w(`EMm!`qNhyEWbnPiT?AK5k_Swot1Zamy61~y?=lUx;On4 z^_hRThoG3!XToH})MrX;ell%BwkuimJ{V_6r6x>8*(^1i(o|&6T)#VJk5X((Taj|H z!_x=Y+1JIo$foX6T8gX^N!~uW+GItSq=g98nJ)_sb{}HHxe!7(7N=xGO3mB^_Rd`e zOOyAN0GeNfV^aW~{AbN=uX2mC2Bzd_N&wZG#Et`bx%R0__%!ao6^EIKh-DM|ULj~3 zqLi9THk^`DQ-~eE@%9V`*&!{`ie!*IMCFKP0je|rv(JDAz!Owp(wnoT(uG`Q$7`Bu zDvvw9W#H|8$FKgjq_U)@Wfpp&2VlJk0%y~#micM+mRU`B=P`8wtVx{!`yh~RnNNYV zepXXp{yk5jiE(^pg_yY^^TVanI@IdnR0=O&IF&wS=?Z2i00pCPT32mRBC>vn=o1`! zD9l7r3ZQrl$hlp`M@;U0A_)<6fTH5g7E0{s#?)UmgW^J%FVFYPu)DxJdUgdJR96gy$J7*8h&OKpG( zk0sF!XE=zt9{y!EH6Ep$+3i!Lh>Mh(EoO z*U@f|6Nj!U^ocueE9&Hf>f3E)t4^}ARd=FGMe@37tK#V-Iw%ANE{|90EDtKI@R5)DraSr7+ie|GF6Y{pyd|NqW1>|WXGyJZe%yQhqs!-(PI2Ceo@rwHlQ8$YJ=5N9Jk;4@z%K7)Dk$nfd{B$;r1PcSikBFn z<^9(tQuV`M^fg&d`Uc+)L%QNDV-PIpp!9eLDu*XTMfZMCVSouW9)&5OY5NDwg>Vn> zOY!@Mrs6Eq_Rrx@5>vA2a=EoQNvz%lwQH4lfDIebpo62FCo&IV*%jglTQi`^Fn)!| z2fLJl1HC#7`Q8-;4Lz`kj^!G9VBB_$L%bCFSVBj;gJYUSW|l8^{cAaTqsQ=9JhaCKO7iorDYg0zpm2VeMsfyHAABG9j{2~zNO;(>Mhl+ z=3Q8h5D0Ra`uU*pv+C!Er1Sb&mQhO>m5;%G5FGjS-qN5^3*F3c&+yVU8msYZGQIqT z4B{e*d;mj0Q18YtaFTSs2W8)mnw@^I4of_jnh*Zu93vL8U3Wgg!X@3}K-t60>Ch($ zQ6>hMl)V?0)m0D|BAmJT)b8eYA3CGYwm&#y`xFmSKx@ zXB*v&CK#9}979=%zf$~Z=WfIWN&m7*Fxu-FhZ;=zY;q7tscjkuo%g0S2$H)wX0|Pn z3oXFkGLAXl^og5h_CpmwWAFUui;C&1CUa_u4coo(CwE$lPGPr8H~j554=C(*8xLN@ zA1N%$SLN|3OY@buZ$F3dro7@k50>Gyn^^%e`C3)CV zI4L9`>GPctkU$wpb5uwGq}kax?GJ4sf$zc~f#y!>x`yCZpwh-SxT7D4%s;`x@Gsz) zLqs~}8jx}m7ts2M0#f9oV#?`YpQR>xqS#T5W2uSO#p-K|{6cD?F9NBbt4Os+9N}taVH&Q&6`n=tB4F=alyz4XQ@ zH+d1dW>@0}uc6Ew$6q^0@p)!R8xz(WSb{X)DVF4R_KT`dvD-wrWd#ZHlukwIo{AM# z=A1}iz$gq^6b7NvkV#Gn^LHXWDA;Q&KTc&+l~#gSHHjxCs|BKUsJU{fQl%XNkcxc^?r0O zFPeVRC6&Ig%Wi$K1}=7VedU&_lA1SCTf!D#=-xVH1S+XI4oy`kjgRdGVzBsS;iYQ{ zIM!$|m|-cMs5XYuiK04G*;0LNcRt3NZp=fU<24>zseJBX#broqYM1jX)I#c|_fT_C z6&;Mz`*)sMgBpsH^qrim>#1@Hy%voDV?5qlrSgGLXAy8R)qH6cIB>1OSgqt~)ETSy zU;HGcb+R_iMdVl;s`{q7$RldQI0*?IV{hTSQIE)xv$;J4YeUQ97B62GtS*aP$Ij7e z(b`xzn+9tOVqIZs7hh?@p)>%>? zOyGg#Y49l>J+OP0^~rg)e1+HlB*)+IFl@24Fj}_hJ?|~UugK58a6;Df3)l54!+*0J zKHPCmsiUCOku)s}J!d&CDRp!z9XeE6C@!p6abCrO{p4lQWZ3Vsl!?wBjD)?7w6NZO z1;dfkDsl2Zz1iZvGhm^k0)In&L<=45Xrm12Wj{@8eD))6oHqC)d~qa%N6hj^v*bg_ z_B68`XqFVX*nUnJaw-iLGu#D5%nlMFjAHMLc`&sugr&{{S*P_B*OvMsQ;LO?#e33` zRBTPlH5OSs9rVR)yUIFhx~lQ}oQ%frefjr{)ZcHp5u+tRRIMJ_+9X>QDU32d&}IP= z!L|!TBY)3^k-y}y%L`qUAup;e-8%@ncl>6A)T+vkBz$$eo4Dg7dlYk})4q&O4DmWf zDwZ^vyVo&>-%GENe775nqX1p|A=Y%G8a0QTD~+g>EzbQcTq^LX%Sofe5C!BH>X^hg z71OGmvn>mrd@iiHrkG(&W4UNBi18)pG|t1)(5jOZTgganL%Y@=LlK-wzN2~>4qP{~ z!wg{Kk(0C%X(-q*S5ZT=Hd_%xvvz6h zTUbCVC67&qN*ZulwFR+cYOPw;dY=y&S3mb&d}?%%4>{=|%NTX6vy79+D|MFfiVh+L zR~J#7=4^-LXV9STKm9^kMv%Pf=p;`x?Dq~9e?RQ?og~0gB=KASO>`?o zN&l|i=)G9vUkSgv`QLa~D2r>0mmrCa%T{_yHG90)*!O#Hsy3La z2$D3Zct9y#OHgLJz&&-)vX%WAnVa%1q z(Unxx)znv$@P#(8N#MkOW%xh+LRm(Tz=SG;K%;=&OcGASN&HkcIe(MXC{7D@5K_&)7EMe$6Z z6iM;6wq^R5@wXMzcW;p3iOsdXJY|a=*H7P8#_5KvJ zP#nw6K&X#4;%+$KcQMIfCf>5866<#!U&p|;q*|Km2K-0?ZC=Eh-MNu9-Jnove;vn) z-2-NMKRaA9TOIIBa#kTF`Bxk$@ld6ylH#%o+oj8FxH!!;uJ6*N>87rCh0M$9$nLG@NR!Snwhtamt2#G= z-McJSaAJ_%OW~a}YYSolKLu-K_pUfKPLJl~q<<`>dkv6AmRy_?FUwTP>19zU4u4r6 zpKX7X!`HMHc)|Tm5Rat#%BF$^tftgkJ+ut}%`$@iRSz|#-ZLYm-k=$g6o12EL(wY0 zbp#{WS$v)DTOE}uhFHPBbn#uTa^v#DL=eR5qH%$aZX}55;z$9~UzU$41c!EhjILd2 zqJk@Z7T$o|JhA&nzgU#qLW?Q6j{n)~g_ev%bVQrV*E9-CT7II$6G?_of zz=z|>Lp?(NE9f!~W3AWJNmpgL+{%e1!`>@f+a?-n5do@fT%lW=VS2H2$6}M8%Q3xJ z)}o8HN89YZa=?dZzzdDx_}#s!%qrhhW|cZfd^hF2w>`_Z%buz=-k9z4{W3HZ5wCi+ zrlF340sY0QC*z_d(wubIhOF34jE!Ac9Aw5qXkSy1+iQygA>{8B5JH9fC77pw1JN3|pbC2wKK2mC!p~;Nu|xCZh@A+^U0=oM4k5sAf_z%| z+?Yu?AHpFJ-_T2ZxM)y}sJ+Ug2gtWUD4mZ^Fo#qdL-xI$HQhK9H8Ta5HCVYIt#_+X zJ5eJmNR;nQoRc(1=GB!HE{!)H%^S~=Nk+6yV%mQ zEN1w=`s%B%C3cq#_u}zcPde(L7b$I$C|8lM@MhWIpd&+B)VMCqOdHjJ>NspI%luIpaZT zn5bhkxVR-MQO7efQ3pc*1GPg^?;h!9o(_DCOy(_QS|2T6L3ZV4PR>C_N`g2r$d@gC zmsNC**nVGHxyU#%pl8xw`K>`Nm0LZ^*f6p%zI6i1VMAzUnJ0$IkasfxsAkDWaOc z*8o#%*Cf`4{Z`h>U9VH!tC_0d8H&=3XqKJJ;y6efsfMcHV`EjWj*J!7!Ouki=! z(UT?pfN-p{l-dh$Oe`N&)Z_E~qImK5{35sWd3*|3C`KhAGtc!I(!-?3aCn#?MoZT6 zdDEBAyU?+`)ZvzNbH(9(dEKJp!(UVHjvm&X70QDH!_}b~dvo*1OP*G3qBE@qs@iz?q8lJ?{Iy5Z3&t7~R z3iaQ9GlEJ&9V*EM)S*n+Cm(beA!ch6CBZ;Q0XV_s8W-VLxD%(?CB~J zreXC6QeiK3i;J%-&Oy|x_6dddXydtO`UYr8e%^A>gC1rXp7u-9g;qkGXjs;>xAw7U zcr(uvc;@CHH30WvCkL|gv$!l$h5E{oK^_FYYoS(P^VXcAC;QFxUu-0H0f#*zeQeWu~URJc_>w`1Cz>LrcE50{qOnE+N%&O4Ta>(Uj9UqY9T|nl;+)fk?U{(SBX;#*>?LHe+Bk}z+DJ8&{%^DnG44b2efApOG=bDcCkDmRvqY_ zC1gw}<=xgU*%>nq^k%N&TpoY?@h3x^%X=2*;y{EHSkSeK(My|-g>xzv$q>HL7#n4^ zaYpe7u{IA8drt@?GLXTZB#ZOv`M%-N$dd(Ey)8kiG=4cFI=afPx0l_D5R=lg+~&-0;m6 zwFoFcekWU|5TC35h)OWT*>GHbm(Pxltq8E`_>~#0l@oUbSV3~ z@M`<3(D(?O&( zJL5&!POKgbs&aq>Vg3={GuMd6XBeQwva(%qFN@NdNW;wdP~xJQzJA*0jknD7A!~V5 z+BZ)b*D0Pzd^pP&mbO&tDhq-r)-=n*BN|hb(UvKSN%IAnB0cQb9(HVw2yr<3A{Zfs zUtJi^2Mv_`Qiu_HpNvp#dyEh{5^WTSMbD5mw9Iz4ngm31(Qp80QZ8$D=N3LOL|c@j zE`X&W=&(y-BAFlnOWer;EX8p~1QUcl$$-%6*z{vd<)Jc^E8uv`Q0^ZTpm6r?auJ;h zI~dA!mn-X^;gXF{aSV(}602Ky9LWUzz>lSvAW|B>G?%oO2r@w_SUbc7{h1@ec%U4J zTPCqu7WV)?6zpu z5#xkph9*_}%1D~P3SByHUb~!75E%+Om|5tM6#}$f(v&qHNciF5o;GH_nJ;FH7O!pY z)uD0Id|x+Bg*4&CNAOAGqVY*{7y8aZ?C|>_K*?NZ3U?)F%^gny%V|c= zbge)!O=UEdcm>~Hn5o3gc*4OrNhM*Xgv{+H%xq^P6kHx3rXb8nP0_{Z4m}~Wy$F&< zM_sWIdDIOzNDYjPnIQewGVht@2^mS)v*EPC4CxaTBXzZ4;xjEpNnGPh)cpR&&o22X zMrys-vBB3ZY3_jjt&AU*r1t6T2r2;oXN4~oHCmP|N(?)M zZwB3Q*ik!Z3hZv*mIM)VdhQtxUui{9hx{ZEYeZ!K^|l z6T@Csf>}jm1R2(j)@NF=>YM7yXKmnRJRMBLxY8u8bekMHSJ}OqHPb}QtX&!_^_4@_ zqP4MSaT&9=Aa)w&Tebi9OvE-d_-+|t5x}2eA{I#iMOk4{u0qfsTIWmrrR~MC?u4e0 zX>U9Kq`jCVi07>*LHxhVUhKnreZQE!7|3B5{uaqC{*vZmVLYN~^%adX3@Q+VW@aDM zw=owx2^aVi=3??9+7i8!n~Ra2SpXa(Lglm~dJTN|g8VLxdQBk+HM32r{AbJ@rOvLRb9JjI-3nO}jsQ6Nb5+@^iWM@M}kL+waL~nKk(KD^Z zOrp0e_E(%3Bzh7V2ogQsSF7*jMDKswS`376g4p`7Z^U^PHT)UYVv*EP`3i)2TeT|* zLtpTxsC=LW#+kNb?>*|PJ4M?uNdSNNZxF!$D{RNE-So@Zj_rM>4cQBVZojSbh`YcGstP*fEsQPGSI>tN~CL3tkPAQ6bH#>rCAdNb-ARFl7hYYfTg{(!effg4y zPZGotR@F2eGb!R_u>>|Ps#hC(HkS!f#Li)T|Hqh)Nn$wdd0$z-pJ_TK-hbYg9;1xK z#Gc_@vLsW8I1P*?J}atJY?)z5_o>dJU-7_B;x?x*H!59}W*8qm@97~%ZTCHMiq>P2 zBtEr+B=P^J)?-6<{&Lo12mTaJMK}2o%{r;d+gqF6R&7Det!2$ICa55-hZm_KJxu4p zJWG6KS&2F8EPd{OFd}dYi-fcw&jhs~bgD94A=)Uw?Y&W&G`Ph45pK;fN%|jwK88xp63XY}9L;evJnu^idL0zRQs0`H((=&!@M;I#^ zHSZ=s$Y#{MY^mw6Pqm`veJ6_c`3l9tmH{WTEc1m~mfa=x#`(J^NXs(Iuxx!w8gw2o zV=dd3)60rW^5M-Ws zZsCfBJ6g794XLQFcn57eF)rNjEHrz??7_2le%2AQI|eW;CTmM|OZDXo1})(9Efp=8 z9wVpMFG8G>x%G=|y_+l}lDXYMgzk~fs1F~zIKT1xi*5LG^P*PF8a#_OFtBC8Y**Hh zn);f{=MS1MFRHS>@*TACqC%^_w>R(dDo)+;nJsHsnEl#^q!IG5(KXt_YUiLf%93wi zWv}Kshyl{1#9`U5F`g8Z98!l$7*NGH0R`KH4wVGVvR`|N-TX~Eri1o?5*fuD^Iv?s zP)g1&$>4?P8aXn@=m6ez1^e~DSQYxj@dyu2I?8Ut}`g|s56GF0*lV;F`S8#H>}$LO{WsKrR5d*|!of@WWl)=8{w z_KgZWfqpZ<6;1W|(h~P!VQpA8>W+px0*Rwp9ljM^j)t{?L>t<*GU{R+4L1ke(rRU- zL_r&BlX`K1vBa`qr;?P-+Bi`CnCSJhi^BBx2`2sm|ax&pW zc={)glx4YRm^sXQGa4KXcVU{Ge+Am9CDx|>IyAk^oIcK+KEY!RGpBFBbRSRux~)j1 zB-ZB1Q!{nAoXkL8ayCc2qlc(F&52v`*Tz4%0g@ideE?E08@ND=?PV3XJ882#hs27(4)hv5ra0oH%}H z+hxb3o2~HKA$VQrP$EWf4%W(~C$M%v{ zI$atQnx;J>^`Nhdc=({NTU49EodHxBKbZ=`9~O6I7rrzr z?#fdtI+hH^I!G+J0d_Np!-`NWqWoFEE?&L?it)c;`a%_OWtvDrWEEo)_JwA(lgKQX zX5J5`!W7H4_V9>R-4SDJ6N9k4DJDD=G(99)ZFW8 zseGWh9wGPZ5Re~1^G##L=W1LqT5MioYjOMo!ApkDv7U zZ%W?zEIzB#7jgDcUvzNn#BtPh0_`l+&|z@J;OY^dUp-=Q#l1+a#Ko|wX{%C3eBsdS zV>*m!cgc2Fe6IYtDz5lk`Mt?4?~jor{cOS~2{H@X|G^uC&uo>n-^OT;$OcmimSN=4dDFo zSaAz|5k;iACS!IvNIdNpTD*~CxYyb(bIk;df%O0b0fhEV+J-yGxSMXqHR8Y|pT8eN z+G0QCCW;-9Hcr?N(^|GlV-p3zgfpnJgxwfrLXW6VsdX{y~SU|qQ>wlDUqYDF|=`rHv zy*-Cd*)q-0Y>)Zpl>xTL!=(fr?_&UpO)$=!Mgo7Z zV>*m8NB*hok7a)-+f}wxOnRU|Q6+t{H*1Y&$M}oQ1b0&@D-0Bq6MAHbo>#ieI9gI_2-kak zRGgysA7mwS`qB~_?hXnK@I{#;eNpC=MhFY_bLtn?&vs>%%&uEdvVg&CTM(312Cqes z+7k960-+3UJF8@V%k04mhb(Ma_FltA**=60I{}DbFxwy4?J}e$-{oWkh7isxc~{a2Gvwhy_GXMkgPlPY=bFK6@56C0 znC(nda80XNxb)sUm9AIIlju*N(O@WAL_Z|KF=p}23}(BJ$B}98>=^3&lL~ITTm`pH zoQpOqxUKU$oA4+23j?xoixu(qTAaod2=-%9zO)V$ovetr4+c71%Bm?4YzTCayMs)P z=V-Vu5U&IRp5BUaJL+?+VsDt0@HJN(y;as~6UMQ22KG{RGU6>v+{de0m5P6B)>_55 zJ#Qh-{}VB8&ttTkc4FKz#I1~o%L_Q0B8YbWA40?1#<|7tT3lo~MlRy$3uEzPOS}h7 zln)Ybl^>ui@hVx4c3b0;ek(_8rnJKO6hm(0{2Aul$2d2Wt85I&*^C(MwuYJ0A#VIa zVRjEnX@WmVY&{2UJa`*_grQizFOS>0Dbiyd=-X8p)7N-d3*Mk4f3Y*pFQk`{h>GQgL{`XP1zklo!SLosGM@`pdOm z@9}YfD00v&JMnjfdWKm_Oas?=w$NU{1sp`w-q;Q7L)(KQsUg)bzB~uve5>}RXNWb| zq(zrlQkBHABHJG+u{Z`6=8Lj7a(V?i;CBt`SSX90w$3)6ZPhb326sXt`IZ-W2+3zW zNGFhdXPrXwLoV4Cn0~4w0{`A3Aun+Y$uFr4A^Gi}JT&hh_EmU{FOF~--w99k`YK39 zDF1P2yNrU_X&-Ax5EJt#oXcfg%src{>A;2QasESVPlK~qxuY2gY~iz(THaH-bJTvYe*OfJ0{jfQ5wM&r&EbLQ_+wZ&9nNPrBu z?aG*?cwZUwAX=`7ae;={$MnTNCATKhxVJvesh2k{=8ZW9el{AmFa zZ~N0eelCP5n}>H()i4sP@TDaj!$R5!`NF`Y-PVXp@9Epkv3_K{IAca? zmmYE0o+1G$cQ_ygxC(HTnDns6$5`yW!+pS{C;Kp*3EM(G%QAKBVmVS1s}J<+<|1qT@5gu>)VSX;E|)ltxTl1$Kt5dAqJ~ zba3^>?(oz(-+n9tN2DU^8Gg{*D-$3FxN2|-15FCu48u>_|HKa z+S>+aYd4DnoggLTBZY==-<76oPb%?5X5P5N4Z(oEV_8NneveFO4m>%S zeM79>(nE)X>gw0>vPAQ~BIM4UCo^Vbu0-_SvO>(r-;dT>w2Ff{>G9&RFQUl!Ys=IM6)PJY;%mnN1E#KPT0 z=4BZJ#rBPTkDW$S2<`!Am?h0&S?6=k@^+S>|LZle?HgZ?*!Z!tOu3h-^xfj-Qh!1) zVTV`(IY(5yTHIS~{xcLf&DnlEu<@Du!)d$eW1B8jBQ32|BTaKRFM1BDk@Qnkjig7Y zMnbbsQ8kjD)dJN>%iNYQ)ksT(YGf`{BXgk|nG4lO`YEbL!dHE7@6;wb;bKq20-EK7 z`(}sHpN|^-L2}lZlDQ>|9N#87TIRGYy!WZJr&7jTUd2%>K+`uqZ+n3`Ur07VakaJh zGPM3Uyw*~oyht*sQiV&Sz@Q4{Hg>24Ada4x5mcc(jt&RCOjMY7Xf)`W;TXa8 z3O^KIS|WEWtwbqMt_dWrVzrcFkE3A~^eGsp4OP7-u2c$?;Yxv0<>p2(T9Nj0R3H+a zZo_zc!^KIIHnlNa1|bSMQ2`UM6eHT%^wde7Do2(j6Y;h;Oh~4GAMCnA`jhL>;AmJw ziG=ehYDoRb)cdXJQU}8MQU}5Xqz=Ry=~XMNRV%sn^l`8HvPjt6_`z7SCRi};Y7L1<$jdh zWiWQRe^2dV?R@cl$rk{WTch!S8SNn%t$e}WBgO$kr-#HT~3&4mJ^pKwaam{{=+4aYL_oewaYE0+9d&z@?H0f zgt7iKk#^9RE_Uzhkq$>?e{Zqnpf5hE^2KpR@fflD6aUP1A-gx`ro!d$F1T3dzgFlK zi~jCEP3(Ep7b~tD?{|q&?(`*M+v0v*GkF6>baagWb?C#Eda z1_G~>Ue$j-6I-KJDjGg;W@-1`c_by*pm2!xv?1IOS3nd>6I0l_j$%S^ zFEp<4*yu=&tx)^KOkBckZ~N!is`7T{z|k3dn`VdtdrGcwe}Nru+3p;C6z+IleA5d> z5_ddZ?3jU=R&pb}%4M_tRZKyiDi{htAj&n~gxr8!&1{Jm6&GQk+yFh|z_OTJ?M&#C zFen}}&}1>?ORP4dF{#==NwW{p#H~~O=Ox79L&f3Khjd_0Y$SSC1ssL#B>7{iL+xm6(1wwgD!ZkL80b44U0DGghrlsmaBvEdvX`@>B0jh=XE|sc< zBhcAEVGs;GK`o6M4{Z%p5`S9?RYcqIfv^cJRrgkv;AH!%S`f)zO)fdvYy@u5vO5u2|5 zfghF@r_-|Ho{6|MAJv~drlfkG|DKU?d)SDU75KY+)R?Oe+eYmhWos_MWvD$_>0%Dw zwwpf{NosVBjFX06mF+w!XGtB*4pc+dR}>Rq9|onCP%{Fob&?Eqt?dFa!7t zbICj{p^aC1aCS$JuF}%ih$GYd{s0w0*j_J`Q!F=5U~1f6r4FWv$7Y<2QM~wwI2p7< zwf~@LZ}R+!=yt8J*?-iUQMJWt(q@$~r_HumzT@-8NnOn_`o?o73B--S654R0pxk2O zq_=08>IOWi0LW(aV(*iwTSm!qL8%{4mo9BIXJUUuANJQX*lBMVhZ<6DnYGcVA*zO1 zD?<%YHDt|^2Fx$v8_c-^*Y^niv}-!*D7bTm?N!Lxk`c;yfN61vPH$rE?vZq`6+46H)PXEq^{d% z`o|7i&Yh;m(BZD-uFK^6is6oVrH-zpj##RIE+fL0PztH*U-oaVhQxK%%D2z7>kzr5 zK3}}BuSYNLDqUg+6trXV+BQH(Dl<@Li}J7XV%ptlfT`t*nTO!U?$ies%1y?8$wKi% zZs7{C{oB-Zk$>rs7*TUcN_xVGj^*4~-s+gmjiq9|USw@756q^_RlW={$r!G~zS}LX z{LG(Ye2H7LCrswr51DI_+G4hX+ua=|bKRSxYhnA02M?Mla@9V>U8EXUNV!W2MR_ZG znLEvKr6!WH*W?>9Ft2Ai)I^p5X2fCpdPmA%+8yG^m@ej?a{yb>Lu${tE+l*z$Dp~G zpf;ZSM8jB&mK)D#C3)2=$;&8Bw00ijW_+Mw;>bU}4dO~YWs7~Y+<`L0teLR8c%a7b zPpHBz;9m3?OYTLZ#P%5f2C?UxF0NSVYlzJyMKriOdUTvUN34#^@oS64k>NlCBNDfm zTh4kh;-lhp&$8KV6SqjA%#lB6kSG&9N&~B&xiwrIbJWkGa8fc0acX<((Bdda>8ob7 z3(XDD<4W;W0sy!;GZtb3%xU9fT>*0OW_x_lDz+)wjKI&I@=MK-+e3gF{5ymDP1?Wn z`GWgQvqJPFpx1cFhC8qmcO|}#u^@LMYGinX$OP3I_{xPLE_^0eT`qabMJ zWrtp^d-c%667Adx)KdjMp#AbZEdB3ehB+2!ILHJIKazwBWDWx64LH`;fR^K#t4?P0 zfesWuH5bD^VMilY2&wWz)^y`L)EqL3lZ71aW`|3r5Xas{P%*T3O-9Y}6{ZA{!%D8E zxvpm6($jezx`iD6h{kh6&>{6*wivSh7IIjOhLthP&~img5iYVmhN26Q!_#=hCUQtc zSajrYBCj-v93H^(n!?QDcqY8GgdSMPLI)=#Q0ZdD8W@+r&09PDD8|7aK_Q1@xz7VR zOeE;4jZ?K+i6fq&DpiTEuxoss%{CDu7bN<5h6$>3cH%W$)2x*z9^p{4HbX*=yU?%m zD%P2Z<5UxIoc5n1j(viNBR0G3QY{sOQ(?111qUwtVY73wjI%4u(YjN(Q27e4@8^xT zon-g>%L)^7JpC15jzb-BrNhq5E$cD;>L%;|^Nxk3j+D{~XnS5+xPAKMS|HmXVxDzOUY89{g15UBfMq;kYx!y@@Z(%X5U-VCNIy3 zAG|4!VnqLR|GH?9*!WwCMQ#Xgez3Th7ZSUOM{2zt*Z^(aQ&;_2ZhuYl&Wo_cAW$gd zf-Z*f!#o^&j?1HCi@ukb<%&6j+n94-zHm^;oI4=xxg$Z#pIkI#bSm zo3h~Ipx_y@ftw?Z;GV0}25+viwP;7;35*)O=P$^P3;YXJ$5g&qrsdC&klCFQ>zm6C znLZPn8DT>QO+tdWXeU;t@+|@veSrfl)ADQ49ophnaPSjsQkLZbqOhiE`5$@Mr;?`( zLrGVn9z;n6hG0M3$ik)1#X8szZ^j7J_M_3b4#yTs`cEF4rsb4*j0lwUOitbG9a2Tun))=+baAQ0=u zfIR$Zmy!cAm$=JX0dT5X;lTiu^lD@n5bOCZ+P2^?X#?-jbrMB&H;hXf$Q4z!0lC%x z$6?g95=JHCfSr7;#sf)D0i&|qjlUp_DsKCA-*|E1Z~D5O#3$^wQw2@OiudpEpL_Pa zfS%?dZb>oaTa;A>rS=kMhF@tD-RHviql8f5K>!e{ z9U2qBDfdrJ&9XK+M8aRN@aO6%zMBf+dK|>XD1BU?D)x8s^n%xcQG-)^Sv?)aLs%gc zh0hG`D`sYRy4zbMR$BaZ&+axfH&S4IO%YvorCyi9uOG$K2aNDn3`5ZAu(r_Y-;m8Q zUFGwGFv$onGs4LXaq-ij)q<7H@*6xZG4w9XFS4lve~b|8`nNM((JB0_qkfiX`k($` z-O3QUx-5H0hM4epYFv2XvAB0fk8P-_V5#kEN5|xf&(4gg3yuEakv}0T9H-^q&@7-R z^CX2}|GdXTLSm;5{t^>X#kQ*urkT(haMdn?xVAD5Z0rHOM3z5@qjpKH{6Q>#5J#;I zG97u{VOQANxoh|8{ucc6`uxx?{-=%CboFRPW=(be3Nmj6B`Y@|+t9(OL2>>R=OM(DQ6^gKq;DSGkTStyXCH7; z#^|}%Kc?y0{Z}=kCahz{JjudiNpT7gBL#1R+^0$1f5XsnK@0_HWxNh0&y1NyY62?) zO6E?0cFitxJHWum?EpH`OA8Vb>1BjVp%8vE81kYpWM;^fM=|{E9&uvG+dW)Sf51hw zW9qc2i+h}yvNv_y@RbY8p*0ort0EDWJW#Sf2AfBQND<*oaw z*Jb*~D~y2l1PS$qETM`m`%}{|?lBDZPe%$2h>2ptKT;=ObS$(#J@_W^{dQPPmLuSc zH^g+d)>uWC{bmTvQHw2hmZR!m_SC zAA^kn^5#R--4+6Q?Qek$W4xl-nrh0rB7aK{SUv5E(NBuICt$wR6nDpl#a*%V&cRNx zdu(TyF7aN6A?8hy^i|*P5!h~T$h*($*zTVqu-!r|0gRW}uE-rc#3?+Ly`i5&#hP6@ zynEb$cejV(-P3L0U3S#2)J##`kUAtqA|x0xC*t}!bl%KRM|gLw%sLh=r@$E7dWn~S zum%f={D)RlujwP6yMwqtSg7SA>N_b2KH%ow#X|_q1)N;l47vjC!yV7 z3BFruphN<^Crp61MM}8-c|)3gmFb;_&+CLmMl*)p0!A9v0*zPz`j@dlEls`4SRj(5 zod)bHX@a|^i3PKO>4+z`I{Y~{{p|SX#T%#B{p`esn1#!>_OlafV5@eZ%*3oYJl|;W z*!qQLK?CUNhZrfmLgVi^{&axa1g>MM^=sM+S3UpX(i#x)AI3auj8uc(Ko1MU|`aa_(@cUyDPWu2Bb4C#t4G%h>f>Jpgg$zmbW--OdR|Lb#E39j? z;UyqdiA2r*207>|pAPA0BT6}dBxMwu2n7|C;ZMhomC*+g$LgUoAL+^%z^nY^J6~Xl z0zI!F8m~Xbk=-(HX0((}4Qg8Soy;>VNpNS-O(4hX6_>`y#mkVZqTjRVM4e4}j9jjq ztW%|+uv}?SMWC=;X;5=PVY$+vfY)MQT6=EWTJ1H~Vc1MulZ0Uz;nFWgA{)b=GQQfz zFx#rTDmOa@jg-Gg`j7Hy~=ivD?{2*O^>zfnx?(*yInJr$7uo>y0J zteVm7spsiIASU-~Ozah9>4e2g;l+Ky6!;8icVAjq^Yg*qr9O0V1Xeomh5MuRB7dek zt}`#h++r+|*LcO)W1OF0F|}DvKI|Mu@OB*EoS-M;KBX)U={H_UzHuYgcJy7%5w zkT3KBNE+s*UW>l@O!_b{#7KqBXCuxGnJCs+v2M8C@6Hta&J4-Mw&0U~I5;_T4^%%t zk{-*&w5#BbchD+#cl&9`a<$SD_x-m3M5V)W`zbt4xnloG=&YRK9Fp?E zTC)5R04Qx$ghZb;FU#S<*9HLf!-xa{&}zV*{xZak*lmk%m-Z|!5ddv%(BfY*y(9oM zJ8+dPGOl9Jea5_k-qTvof?_yoB>SJVb5HYHBe8DQ62RJUsE?U zhtXkoilvWsbdRJ?3qJpok%rHI9V*zzB5vZGTzNEc&TCQB-U{cmDdJ>Y_d(VUA&hf4 z${QFb5jg&o#CmWw6+EH-NkthGXuK!Z?4mM0y9I(GvR z`7>`i(|#z9IpyQjYj6C|;+QFF)(W{tqLl#-fSCQ-)d4ldwW^CtYOfEWlZAwqxCTzpcJl&(Xh-xBvYFiOjqyxUaEImk0goB=X>=cUYQeGf^4uhDB_hbQisQc@k+7z zrjBDp<81d(;o5}3Z`Ik3YeeHv_`}HlYijoY0dm>2#+jm$v6Wf>L(*|53_+4@&+2I!f6`qLkgn`r#3-eT0%jyTUO%#}o^T zKwyfo6JJ+|g+obMqkauaPB=mcB~?n*Z&}DhDEG6>$4oI1N?Q1Uut-ENJei0BrN*$f zj!=$fv=u@rcddq8+5U|jZMHrP3@e29BW@y;#1`8il$RmfKqv|5@uxWDZig^JNdYwi zq5OhnE{ae}kGNx-QAQ$^a#S|Rwg}~uWE4Uufe!uq2&J5mQ5TgFi4+5&WT>N+211!- zULsBr55z2whcU~WR)j5;hZcS9?9a)yK_73^aWYc>py-2B%gj8Vco zmbv-QJ~M<-LI4fxpYGHF$~TRjf7@U}@pCKyz6EqLa%@B=4YzxS$2f7d1SBU~>oGPa zC_fa5+<#rV$1}`3EHmO~8bll0{b939q$r3qufK-JJ5kJU_QH%)_4T z+CX`y+6P7_HNnIP;&Tv>MLfOMFVpQZ9i@@3HvS`PV@rSU8Y~iZs!bmoM5-FJeho|$ z#;ttwW;6#YiC+eA#2$u9oJ|8p{ZUWThP)l9=&x+R zwrYQ+ZQyW(!OHir6(WG6{{miZ>-#I61NFLbMqLd%9AKZtH4s;fqaU_eAf4i9>GSiZ zfHWTEo0r_|2fA84?|fxa=WpiS3p}y`vFGN!ffyZ*)0ud<-svWb>;-|In1g+S{ABA$ zp5?`BaC7k=Kbs=8JnUSo8E1aA3%H=FIQJkQU+puy_sQt zwTayU*ORLr&L}E_gg@2OL8<4-tLq39QxjNQeyXvla3#`l#zrgjKJa1YEFGWeO-yy# zGEvg5*w!mwp`PPIBw8GUP{P#hT#5K<$0i(CIaZ>q-_e93(Ct(~*fuFd_M+ZKH9&;> z5O>S+hW=s^TZJ=6GHLOf1G{GtZ!A#&?dO3gfSgpeDy(5kXCh9}q!} zk1yi+CT~GnmbI=Zo-&{^g(R#%#zT9+qD_odg1sU3$TDlwui!IREi z=&iuWV^Sxy1TBR~cFe*^DgFpXGAx(z)i#C;4J%n@*Wons7fBmnq@~jTvkmBS69Xg7}o$0CWB`a6tSa28spMj$XSe6zPuP7EppJaI>&TFEQZgJ22 z^e8bq#q-w1p~>az9Ubeh>gdr7r-8gK6Pp~*tq@PQHh(Bip7i9_&+>RM5LJm~aVc5$ zU8r)sST-d!OVnm!$FwWm<5K=dbWMkD$8#8KbTqONgA_GC>0kNF=hM3>sS$(CAu+u> zjfcFD?z;bN>~Pq|RWhmkc}zUQoL$JVkHc8=k*@rCLY!st876ZvY@@Cufw)51UQBl>bEU-*>(*Gg#~fSEX$sLk7dUBe-Q38QBk9MixbGiz_Ed{q z-}Zt9n8c1n;?RurEzxWEXaLjPEcU;2xw|`J&lxF4jqq(Fl$z+sKP!}9bxKW=^Fxqw zwE*Fjt@ql6&`*6}8Zb0sT*@>DrorOuu8vRw9pI%BXs)*9;JqOY5R4+_*ks1>s2Jl+ zxv%)&8I{I(mr!+~mSa)}Xb(KmlJBj@-wx-F1OC#X&>wXfe&wUi;*p6dcXf6abtrd_ zjXLWNQQyvMz##Bk<-O;VzN(&AU723gs#>UA>sq<<&X)|Y{AM9*HIy_g#Mo5@L%*f| zDodYVH?a}4QRpwldQ!y$8N-VkDvIhdo-6K9n{=SMVoSzth;=w{d&%&U>V?B3lk>%J zM1LTCO_wM3iZWKF$GWHnt61%Us3D zWfrv)GD7;7X~1YZF4n6D0$!5En?Q`13Ah0X;^-32c zO9Lbp$9;%u4!k!oPtt_=YR6x3T;Dx%{)}Q#J1jzZIz277m}&d% zkMm4fmY52X2Mp30b03oJ&)B(@S&llHh}aL>3Dd=XZxxsK^ki$NnR(ED7)31!NbmhR!mmoM zP8GNwA(ba7tuEh13*4rU*`+S}Bhn3vVGwg|X3>1M$6B{MNkjMmQh2>e@!dFAhX-X= zd51a~RwbL+?w`wqQmBNnRwHV>&srrfg=@|2P{&nBj8@5JzEQ0ZmVQ}{k|KLex!E|; zG~+}wlg%un2Ek;f?Yvd&?dADcR19-*TsspS;`W$Uf0IqCzi!>?uXsJ%(^<@Ur)QiT z`XaYOG|HhbA1B7p*C@@ej0S8eOe6eC{p z^obaZ+FAqd;JI2{)z35i1`dqTZ3o7?=F(i(+cD1ES=b-=n(%)#Y!0Ll3NI6 zsh49;u~1-TW)4To%-np~p2ui8ue|tXp^Q)MDkfJ9juU74doB~*N}@9an&%PEcs<=N zwvj>(nAeErPy0oQz1?6DYR#@5vErs2&&?MFFjHbXWz?U^@x&?O%U59anu?Yg>>zHg zSZ~eW2qTlzIE+3h_g0KLD)Rp}Fc*6Y(HVuXD~aZFTd^lXy6AhGOwY(L!oJycze(PVJJfUL~c$fGeVrir?d zp0w0KSGGSYuJt-o?L)lu+q?Fs!?Q(kW0biz4PkHz#5dG^4|V;E{quZ_eUQY4 z%UVHL#tdL%L7>FH2vXz1>V@Q`LG5Ls59@c37>a*`25Iqa)|C|Bmk(T^oYbD^kMVW!<6Q*d#i9UumDb88#T|lW-D5RRA z-Aod_Q6seGN5hpcWM`)(~ z1$$4>u^71XM`PGM$;=@b$MH*0hT@1}mrdnwn-MC%0OLd{k6p>AT8EXyEEG_N>LgYY z%TQJs_N>gsN+PEWicg*zqvs}4xjMDf^(brRNlL4$ay`PDBY0Ji0bRPBsZ)infh;;& zr)Ii%ohGGQ##F}WdDC1|m}gMqU7VvR$I{YYI4@1 z@-{NK`Bn5$hmA5Xzk^?f1<7W%dn*z+=fGgjYQ!|3Wi>ygb6Jg6Gi5!wYr`yHRNQA) zY(^z&eJa}Bx#60-&6<0(WV3`(^D(pL-%-noQ!AT@4j8B0X;#ECrdhzKNXs@UY-=I@ zD6T5|j7nQrsT;3no0e?m8nrf|7M`^II7LUXsle0x?@S~jod@VfZ8qWja#@oRx%&+= zG{bxGhh`v?GeJBRU&zvLB74%5yu6X>G$S~o#xpr z*35Lcbaf+kvnkT+i>beEN8N~G{i5j<>$mA*{V`N~USCU{>xKsl61~8JG$?n{rZeg_zEyx#BF7LabC^uz>NX2jz)(91N=e=;Moo_HrId+LcYrgjC}v&R%kD*6BL(?w zO8wuj^E?U@#mikD<-EuXMD@>^%BKxX=Nh3@DFICdX{J+)f#G(BxZ<6|*3vBr~#O2cLKlO5n@v)5kq<@>$)7EpCAw&M@9A?-6eKl1n5NESIoW<;D zHH*O%3Y85Mj6Pr2d`W?srM{=nCtOwDZVFgWQ;v<&C_@RGXtBG3;6o_ z@!*e39~+dm>4|@_unxzu@D)#U0VNMp>^wQet_n@DzvD+sjMcTs8D z91Q-L)E-107EYETOC=-{S~yWi*zCPo%ofF6IDo1CKyJ>c-N*~iqj#`w3d-rLB`Ez0 ziz&{JWocV?$;tMCPF;zDSRu(bEa!fOREvYymF6IvR^xaP@zstGa9rj15eoYq{|o7u zF;fD-63K2*fWE|>&(hPhGN$dcS0jzU)Dn^p8l*L*0LfSmIVW?m970eG%OU4M$11O{UyZr9>CDOE-VxdO!LRs0(8HSKAvh~Ge} zK%Nu}A_GVn_B5*EC-Mwq^}O*3OK-z0Rwv5itI2e{ypp=H@f}!jf=(60V-SRHwoZ-4 zPy}kyX&g0JXN>3MR40KjB@}zHI>J0oWD`ol)Ilv_UYI(hC6tD#eOf{>%u`L#>+M0k zF!dPfg{j@B7pAmbT0EUyC{tOJYdmogRAIurB~|c@rnmdLgo;pnX2QZyd`7~}OKuHO z)8gM@KNxkU#^>=`XYwXl>!x7NO3N&XIVj?^;V3RI^*kw8cf|E`(-TF*-JKG{P*>y( z^^AnNy5lBehI+=rNKgE6m4_icG;xN?u&+&5IX9mOoLl}PX^G%lwzRX#Gf6bw?}-&h zZu2-ZD?DBKpsC zckawSGN+eIX-6c{+Wz!X-0+|$wjL*&reM{jI5P{ThPMFjvWlcvJz4fDfLe#(`>bD< zy#y1(Cb_3-&BT5#`#`5T(cHBx3##91qva~n3lsZwgG-aHHevhJkiC zsh>;PFQ$L$f-2w5sB@+mJCEZg^>d1Er>4h=rO3Cx1h$unvnxGW%0Yeld4$Q$F`Vy> zx&_IrM9y89Y`P{R`3wvlz^o*b59@Q#A|&HN9(ggnmwg^KR5k1N>uusJQmlhg>i_tf zXM|$Kv-Rbpo^(DQy~Pb54j#ibrSYQieEPn$N<7t^XYxb9kT3#6Ax>gH)u`7E@_i%x zvk?+FVKE2Z42J8Ckjvzx-!j6F+FfLNQ0R+Hm}^G-!i!AHp6};T2gAbFnV$^mEtD;N zQnY>Q-q1AESL7={+OiE3OH4uKiW49qOhKP$xtDWAgj<-0a5HG8Z}M{Xco5^X3 zcKF&i-?u1G2AEMA^gRAqc4+r`c2*#i+EY)};8Lt7jALI~1J0KQBDA7CiuvimOkOc(sO>#^e~^>Xy_l5lm6OuL zn3Tfbo4Rxyx3S`@gr7|zG^?cJFv7%re~Wa?9=VrV&Bn(qw8F~uCG~Y4%oWyRX3J@r zxx)H3DyyBDY_70gP2%TFp7kSgcG?3ni0XwPJc}h#tUeRRG<~nfXBG?}J>A+~oY3%^ z6pPW#Hk9BQCb_>v1vHcEd_aYz%8AYP6%(Dd7Z6BPcn~5EU?DhC*;I4z>s{j@qP*Hc zWzba)e!u1+o}`kOG;DgUaN7vLHatq@UfaCPL8kFsh4Y9v>>Du%FC`B?UE4b zES<`C(SM&Zo0MAjg67)AqH}ceu$Cm}pmX)I3z9GgHR7d7a^6XbicBRg)DLAAx&Feo z-oQSv*4^ZyM5EkD7!`J2UBlT@gBqVilRu@Ckwi?`#npXfzE1AZTw5Z@-I^;IeW@(a zbFq4zp_5z!rtzK*yq*1Us^L7{Xyx~4L-Oxr<`ylPf)T|Hw^<^EJxIs6K#ETxIv%xV zvSxu21;)u-dLx#f{C8QdR&$#rQW9j=8rH-)HOteW8(4LkGKy98leW|tC;hg@ZI&=j zdalMe=`qye6hoPz_`@gtyv8``nHslQ!Z_(^*5rk9>4d8&%59qR%kW8?&6A$0ahpYq zlfG}Bv>esA8lqGye+{4XE%T%&YTRZCN{&{0e`a@pz{Gly`f*LWKl%Y~3y` z^&9dt66yfRyI(`XpYf*`-JlnRLtwq6N$*4-I&D+I(j(&UHlTD-o#IXwiJLqfy_i6@ z0n$8`95u`hOjTOvh2_FVspl~W7t5u3g^?lngZ$!V zI9$e8yBX#h@{9T2f{FY^(x2mwSuM%B@%T$a*ri}|gSH;h%q0BO#1#?ZOa-j^&bdt; zmbt!S;rfaS{lEISR;YexnOL5+eqjY6^2CXAX3v?FH)iVSvI>;$nYpeOK>D881rlao zk=YH@nHWjkgXR9G_R9Q+^!$@Df2{hEUf@9%*smVODUMkRRrdl}_V0S;T`MK82A%p1 ziym}#b&i}p8xj(wBk`s1q={eO-6Kh4CU!-C$LB?QaoNAU^Pt!nS6!p4dJh>ST%%oS zTSxvQss5eqoYBl>#6o&7lQ*3P|>)U@}{rdy3`YQ$TWjn<0^S%16-Ad+9eZFoy`?$XeA|y#BDK zCw#^vy@E6fM)p-$19XY5yTD~9xSWylkabgMv3QrKr+pKIp1xZjc|Tb+qcAKnzBJ2W z$U}YcAWxI>kab&Uk?;ukt`gIa#`Lm3gB)EJvd;8~geM2}62(iQiC1)Q?;7#PXH!bV znJN9oTk*_7E~*jUUuI7e(?<3v5*d$qj)?9nT$vT7K(m$4ECiZ;M)-mezGj5)8DR&! zvn-csg#C<=OL0u6&MZS>M+|Q=MsmnL)x0#I@x=GTRgr5VF4LJ;*#Me zuODGxL2x1Et_5D?A}nPtLLfts!&YGSx&WfUQlvsx9VO+`z(VM%%eWmH-B=nx4O3Tr zk=OTeeai|>UmE}tPidJjB)i zr1Z|w>dF6s_r4x)KVgx@_!=yhg5`Hl@w>pqAEw^XYW5Qg(*sDLGPa29Om1Dst$O00$Hah}A0F&~L2vEgRs?QE4dp(Qn}%et zL$V(bpvle$cJ(bc%O$RxF&c1*>t?yc#m{IxMhM>PTV#wN!nr*dN&q61N)UmAQHk;C z-6Z>W6H=DSI!k4Yb&l@gTG!=^fGaGLxWY~ySAZXRE=6DxfS*nIJtE3uhz>S!1zI?O zz&@7K1go8blKKb_raoB}rKDdo#k3)zA_bEEY-T)w+94MvpOKX_stbZJf-r@}C=VO@ zWFx@J&?h@2^~r`-u$nFE*JO*GrpO0YkWLClf^_ONP|`R&6_^~DN8orPvNXs4Afd*w z2l3SoN`R{z$vFBQyO0j#;3;0ap-)Dr0Zvh<^%X@C+`3D2`lTnuMQrGOK@?@2PR&ewmehDsssLEIdUjrqzv46wEZJd>5C^rgB|R zh3x0zvYA2c)LdLPlN4}@U7CyQW=7_A&Bb-ItM!W8P%%txLd7t(1@*#IE%LZDHdAjK zKnvg!260$(VR6hL8Z?(gDRgoH00yirpxs9Hvs&Wg=uzcbJ}qk9FSVqVh`1m(j=-N1 za)<}zkhxE+}cuF9&9#SlbSow$jybK*OzB+@UGfH1{Gao5l zC4Z6h7(UkeqFcTg`I0A6Vw3JZulto}hPD#IDJ0Yxe!NwRzRyaowr!X?8Di&@Io+q= zN3S%qw&Hj@N{6XiCQXi@Zfix|sy+!>^F2#pc~+bBg@tN*Aw<_Zt*7d2S19T?tKXs9 z=?x?m_5A90vSw|VJ!j?C(83(<{g}loEX#%r6i4ocg~5x7pyG{Rd*)E=6dxZ?%d7wJ zWzTTM4h^!KR%{*B6ML(UdUDzmK(R(QRXo@~eXUqJE;?ffyKr2R4^dBFi80r*t3kN3OPkA#J zJpKAo-BO66E&5VjJsuah_@ort)LIHH$J##h!K4)0U#wk>r8v1ncS1Df^n=NNF40{r znwTz^=xU!I5+|~Ec{1!b0g@f3FU+-wWdl%HF3dd+VHDT2O8mMBb;u8HyI(7C1iOcq)r57MV~l%ZB!dCIEKcUT&GJ* z^$r@;?lN7{YcLWlmELK7V|FuEGw};KqV`x)ENc#Kkjr-dqS&$iwXj6LHdtPLSNfV@ z`S81D<5*ojyT~2V8?n4NofjwB*pyKS6@Ic8iyQB7chsixLSU%?$rwsAL8_r%^{;K?Wq#`; z_m2_3_@iflsQ(Zv5G^ic`A7 zc);{i@V1N8n^EWvH$R(EbC6V4lY5`Jpjs4rRAX{S9Dyw$wC@LNrde02g3`dV5!dCAR; zs3^aRiW7D-i&4`iH{IE6OC&p6HA>n!Pqy8!Y(U_!y?|qs)3(TOynf zkUU^+iEz$i#b@lVB9Jfr<>HDzds4@lFO$OMB);PV7~wnqE=no`ISaGa-Hag%)F7Q& z8cSx%V986q;!z^!tM2o}ncK2+{%^nH&yB|W{4>1IkLvI9xQO@pP^D1C#vR8)x zKjK|?h}(mnQBHk0x4_=R`<}j{Xeu7U#&116WAvB*Vz2%3e|T1lXWs46cBB{P){rkR z`Sljn-+QiTcMSi3*K3|HZph5uddaVJj<@|+T8T|f69?{1zg(mB2>jYizPWYdwxVH0 zekx!s@NpkSi60tqL0V|2l}cDJXkf_-z>W}BUy#O?7$4#&i?|*ByBOyRjczrlm$&0b z&zSp05Zjd@~(8VoQsf0~HMm^(*J;g7X6v=MB06I{ALAPnnmg z@jBHH^aNY89=2sZpb5we7; ztvP%z<-IKq)4aFAB434XK@cl+z6vzAG~9gN^MKK0@rAWoBkQBs6G0nK;m6NxKd&}W zq+czIU#v85mv3Qkz9kFGUlqZUqUPaMfrSr@jx&1Byzc=#0q5nmhypx0Xqr}vmd-~@ zLv2iz8D<-YFG}h>Y(7m=@znZ08LQkq)Vjf^WQV89+haEPd=<=DmHzX(8ecY4UTC%u zx4_k0lA?&akz>f7oT^}yRd2j30$Mnbc% zN`C?MM^3+qmd0qL;~kiU?viimSH7wTMt^o9lCt7W;0Xl&XlN_EPvox{Pw^i=o1!41 zP`2M~P9+u-pirD0IG|hYbRVjgGj2{L zN)%E1vx>g|dMKl&m92N#9>w_&!^+lj^0C>Zxa_n|M9Hv~EjK8OV*^TP4sM&MaS%IL z?f5f}s~is_*Y6LF^sowWviN55mvSUYY|$IlZ7m6%!4E&tZZG!;-;0Y zJCF(2>C^}0Z#$-_{3$1KL2-AWq%x6FDssgUGf^f{7e}qzqQ%3+JP>I)N2^rmGCsFX?k9H!Y?DJ(gg0pQKmDG=yk#zW=fK~Meb#T zjLe-{f^4agIX8jbpv=%H578HT0=q%EMklckB%YkE`woflW|Ke}OPNiI2zoq~;v{9Q zn+XEYw~@CUc~H+I7pT%DoF@~5nw;?S2x@#hU~uFVuwX#~t@4-!^W!UxI5)Y(14x$~ zsDGDmKie^v-LKZwYk;#q#q~o1i1$1rMx?lDE~V>lvm*?mgzyHiq}h_-Y%&?S__>d4q96`HQ5F;?!2lkJ|-qzUY`XNt>0IpEo9NFdl8ivA|JQ zq4u4alan>6TiLKN6?r_W3v<;@xj9}nI`dB02OA+v-hrd~5Z{N1I9R#a+1Y?Y^a32> z`tjiC&*QZ?SRJ{J>9-8X$w6FkP-jb4uuXK_I$O(Hcc)AyM=P1x3LUp$Z%Nr4+E$6n z^@gK4-AAfZbJZ*5)@ty)Wx%=({d4jschB2vlr>_Bx&3nnc(bP7QaQ5!0AxE2J1t%_ znvgqZqO}p@z&3BhQ*2CU*{)ni^-8I(buKk+NQB{**F9;Y z+Sx5_TU3187*SrHHc6~0Nb5~&Ego@udRnP?tV_xTQ(|sqssCeo+IS^me>88OiEGIX zELXL^fn|jFMYpt=`Y$rlCMn8xv9>5CS-3vE++}|a48GpFA7Ik1joB{y8YurZi?!E5 z9k7VmFG4oece9*f_7(`Ey0X?jc_n*ET8&)2L8R;#jU`Z_j zcFcf`xvWr1%Ks@+n`^(iT&^Q$`V_c=)DVxp8?L;FO&~@WhoDc{kc%pTEpZx z7q_nLU)&W&LmxxgMkHFtyTsxvY(4E7GC$CFu4IUuA7%HlPe%K5XbNqsXnr=ONKCss zd%P9TeoeQuk>VfI)8z)12%~6S*5VbWRQ!+;Qqz;PTx^UNH{RDfefl{g&C2%!c}Yfi znGte%lj(UzC^06`cNp{*BYe^b-)MJh3$B{zTF!tg+l9=DuGy~48RQj3wtl@ejvNt_ z_B1#myyCMhSO1LD_Tpi%ZbHqbOgtr&>(ZE3m(MURcY?lLfyM^ZgZ=z9UCY z-w{U*eflor;pzJrZ{tV7%A?pM5vUBz*M>L4HyivS_~s`-N8Up1=|TS>n<-uxtQ(Ff4suYVvE9K?ooI(t?ltRn>GF_w{=g z=xJr@`d#6)^Vki}HbZH^`{rjB`0e#X=ys(;`6M`hA}&DBrAs-pf9L}j&ffaC8zXa% zf0mxb9F18vGwZI-&B(YbJ;Z2u5mgNQMaOZCW);?mGHYaQ8H*AVAQ_%S? z1q2si8cfd4#?BfW*`)k4KUvdI>93;X5S+gmhES`k%>LAyv)=2kYzU>TK@)>z8urD=4sEZ? z9JtE$UdT=UjbB*(Q8>9?wn6qv5WQk;)hkmQt7QXx^Sgw~9{nr^I&SM-%2}s+6!p!U z@Dgq!;+l~`m6Dh&CWarj51RayzWJSC2S~r;F*Gg)Ksz|(O7k7mdt z{`qmumKUK{Ix>KXY5;};*h4`)fZ922(O&-|rB58Y_kvF6tr>YT{1EC7roSYd!pG7F z|CQ8<@!^OrUT8j^W?y*F7v@9j;5FylWMA--9U3~&BcDX;*x0czx4Qn1<@K|=-tBa) zh`3Q5T`8R;Uc9#XOz~}B58X&ekClPab>xI5DFgjbe`Id`QEBPxE)#@$11waG>uVHW@=!26z65CWio2oeDVaQ%v6GsVVS8fD2ro0 zN|-X!Gl;Ktyo#eKGo3~e%1okgP+F!^Ep8u_)>)g6MBC5pqsSY}sxi_&aTHabY)?wN z!?DUl6p4_4kLDdCi%%mPCK zqO79U)lvY0FlI_X>$L=KHq#{_DSAlrT85a@QWF+|D899lflebcB(p%UdY3ISL>LHG zcSVp8rF1cfP1vQ4OX$vvG0N_QG3F2f!73~WZPOBNWaA7$Xe&%b+rC6ECyoQ}7~43i z_!NofhNMl75Q=(B4W3p$L-$Dyo&+pgLm=9xFhcDjYVa`Ry~VP&?lUyYywfH-nPCIvj79#FR-Z{*y`-OK)F3PgG=F?Z5P3PksAte`+t=9B_ce6H7wCgk3# z3q+Ssgk;o4AbNVz2xnKerj(DN4;fks@F zRtBS7(+6in^NvYXA#qbhr;c$_HAvM}gGBK}+hDBhpM5VXw|@S(v^k2{l-~s_@sD;$ zvO#RArE}C|G52pNF0n7a3pRF&qzP%*$q)6QX1d-<7LzBWx$L7MtLOsI(zU%@_GEwx zy8i*lLpHH%LK-&YuZxy`QZurX#o;skUCR9X&cZd#=cq0`lcVEA?j1P9okh+DF$xv} zMef8jmvUIFy#qQFJD+p9?Dv7~@5QpS{j;!$-^AoSC~hx-5V2ppgk)IsKF z@n7}trMxAUtwX8FUx6uXWm=tB_J>GtQVK)SuR#jhg*V3|Mh&xHX0O8a-a?^hT}nEh zbbf^OpUskr$V|~x**Q(zcr2zwoSK}r-RgFTnki{D8nswr+*qPB!tF-*5kpu!aN;Fl zKG)GmuQF&VeUc_1!;rhuV$h^)$eIi(bH?DzCm5n_+;c*@A4AX&F-(E_U89VM7pgi> z6q&hpkEnXm4qH{{yKL`G6-FzTW%+evDD@Q(N@x$^wMKf8Xu2lKtwFfF*+^Mygi_)| zNh$FmloB7p-x~Sctw_$F7@?E`K}#tRp_Bp}vVN3l?DG6dN#=imSwZ08VuMMupqs?<{T(RCU6lk?+Sl zEDcpyZNapt6O1kdt5C(TV&ydO>_o#TQDQag_>04J1T0$7KZK5Zw=Ngvt&#Z-$^5EN-=^YVBOz#L=0tas<<+RHgnloxE7=`C_cY;zmIEPf=_Vdh&^K}MJTMFM7o9&oR zxxjF=oXF8Aj^jeMuR?U8r2PEAdaF!Z&Y))G*bK5Y#u9~6Ar8q|1D@M$Y4 zX+=ruYG0?bDH%sQMg~ztJ4QzQM%|8)LCuYSiS06|+3{DgCD-$oS?gv2mA(%Seo8&h zUXtyi6Vi533;1CYcEZ94VRNF=48N1{)i#C}t5l=5A{-T^q+%4b(8hZ^+Ji66PuqGm zZ4-^m%NsKt4_KtG^qc`B2Ei;*R^F_dBg%RUJ89ua4&(tvdSs*epQE%goUZ)1?uCm>Sa@No=@H%90i+T0R? zmHLLOzUb(Yib?PU*fbPABZ>yX+~aFZrK+JQJO-QMeTTt1_C97bHx05WUrUuk+RcQQ zqx%QJB?T3Z;2q;f4nV@tFI2W-`!H>8L-kOxiLP&AOYG9udcr~ba7>+cp$7K*o?PMR zWnT`}XI<}5afwG-U`HswL;d2T-C;)v_cvi#+Lb@dgizP_`6%F}__Go6Ng}-*J;iWs zyEv+$rI>T&KN&xV4)GeU|Ip1R*Y@NH`g~{v^%eObl^<@$N>GDgCFqc0CFohhO3*>T zBu87CvFYa^wu-(lsUw$cE9kiQ$J)pBEr+D5ilZ&30CqJ?Ye9!4pmN$f6$We~4c6>K ziGAJ&4jgYe?M+|9lg_aqZj@$TC-=p2+vfy4?}xKGj;1O;y}_rj8E#J#FM=Z_(~_Zt z@IXdGaeD2=ct_OMQ2kSY#Ld`?#g06VP9*F1WsD==Qkbi02z73=my?>KXf#XCak3;& z9`1*iy;U&4bO<%rpNC;Lh|Oh5G!-}Nh>rmJ{ApxM7h7fA+MoIJBDvpCT+0J*FYSbWhR= z*R=~L-QzmmvODuQT6nZ&r|W3T_DpW~J>Ietf7_A1&6O3jCUd76_u=wN^g6qc*9dwO z>eQkR!P8Cnt3~>HqYf}nV4=Lw<1LT5j<;w$(QDps${Nc2ux!+@6& zBA#(P;@Y`mutP*cR?V^z{9;H-3z2+*6qV2M%QEfs1<&<`@5W{@)$3XMSk4^47oowM z1ulFm{L*kIa?e`EC_X;6d}|;8V7e@t*<{qs)Rf`uUY?d8oq&7`K9{Yd{~X@c@$Ed* zk#obUojH6FF}1A&U4z|jt$Bo!95BA=et9JEjH@%h|KFW=_Z zD)M8Ze`Z>Lkmkt`l5RiCa%SHev!l`ZE@hY^dsFXh{qtjfjQD+N_TJmf&kk>t;zQ%H zo?%qbKS2N0u7{5!KXm09DsQipy$WY|+67%-(g1s2!G#SAZ-+%Md%Y_W?D^Bz zhTg>Ri`e$nDVMU(aj$4OE@hu{5xaj5V_Jk+0e&_G2!loW4X9UI?f%I}inrT8e!RpE4?a_aKk7UWirih zixkb|zH`txm5R%{jV{Pq*<_?Rk01@w(>!vw*(h>>;+!z-7HKFFEspglp*jA5V~t}n zj;kFDaa`rVY!brLA{-$+B_lArB3YyUDl%%)dgc;=j_`_fH_5P9q#$_17MFzfxt*39 zHDQa3cuH)RDr#zgcUGf0fXdl#{5=ij0REJx(ff%%L8>y5Q78-5B>s%#B%Rz+llWJ# zQzkzrb2rr_9wRx0Cj(Mlci$PI6p!Hq z0wR+UFV{D;N{Z%dlX6(k$Sg{Fj;EN#4x!mCY7yPQt02Cfl*WeMsFMe^B-#Tu$vs-q zClTa6Er}SJnY&v{>O=A-y+aCZg8XS>1E$MH(t|GlZcGe_4%=Q`Nc6QGI zgS6I7=1$#W{Tj!2;QfCL%|Fab$XDJ6)8t>uw(r!Ee=Z|%;P9Y~Jf^u(RFh>>C@HEi zEQP(govWBicq2_LxoBXI4L0<2H*K z)pw&hg#CkJ-yLbE#NdyU6I~F=lMItzu{8N5;x>8Gh=RAZ5+*)emv#{~wH5_eV|g6S z0U*$#FtQte1OyoFk@3|whEE&&s?ARe>d9XuU5>kKwRE^-V_<*|rf=y&mrW=k0|H>}KL z<~KTZ=gLeqy`MU(Q0-e-wi3Umo_b16-1Er84?nz3-HFqmwiMpF^5Hwx?`sO-kgxF8 zil;_)e|}^|H{*;ObT;R8rt5VoNbh1R3)O^)WnG=g*G*fwL7iPVTkTVL>#KQ_T2*h1 zmTlU5i)_;$bZXx%t*bwx&SCSY-v(pNH_u<{(rorM{4Lzul5%^xgs_Gi`UHp;3_rj55g9aaD3BWbTF!@kA$fN)7HKGF=+ zjqpk%yvhh^Vublijj%>^E{{nqe#0P}jqqC|BmgSe8DVcDC24p zA%^(AJu2dpE>9K5Xu^!v%c5!QoEh1oN$HX*3NObxTFV<5nW7~QMar*_a*6fJVz5{E zx;`#3RE1fyLLO@0>Ds>clFJNRWjVtJXNG^_6_u{vKni6ow6Hk0JG8htBGR?cT1%M>65xjDzdj<`lP zm^*WJK!nTfO2H#8rwYk370@Vuw6&fjqHG(nnjm=WK314j$>S{Zr7Du!aSv&Cg-%TgbpJ znd6c;gMWOo@OE>HzsqFmV@xm}O94Ar{M zu%s77CS@2Yak5Yx3VAL_aT_UpbF4to^n1+H48my!E=s6T8&^#@D>5#4hdnlF5)A|EpSQPLkWo|tb$_({?qKlzZg$>B4$ z54VW7UfY8RAF|yDnYah{akp_F9|Qdu3h^Q11G5V>?>&Jz*4d7bX**G8yHSV0-8Q36 zWMlb8MAAm%HTjDC(AICkN!a>L2-%QYgiPCnhSVAjAsV>eXb2m>2J|^Ebt8x71f+)K z`6bUS(fB&~VSZb`%C=8yzI=>yz@>XmR&)3o(($EW7Y{EBE|4tYWbyps=N3zTu&qvh z7hYCt{>Ph+YbZ9`BA@>vv$+0M)4zAEAHa|B0LI8Cmk;2LYr_v6(vx&B#(eO|jc{vX%=($C*Gw1t(m+6n754pI9rBP?ct0>nsy~wxdd=)4qx*TOYM4c^AId~P| zO7%LCk6e3=)y%K7+4=wa1&TVGkCR()@~E@9hRLZe+PML(9@l{pH!Dp( zuIXq}CWd%`_L7rF#rKch$Yi!UL!QtRI-y$@qsxX%d7h6pMSjSK8XswI4wpK-c>f2< z?`ilWeduXRf2{In4YZu{X4Eng2t`Qka3^XH#B4M2W@p?n-l+|4F0+ zOv>RL&1xTsK&|D$T;^Yl!YcP6gp9^LiyCSR52F^bvMp*Z=ZjAJPEyXOOax(oOIoLY znMt}rCtboDM&qhA#;+)0HCxmxWTH5wbsVSd_c9UgQpnQw2jqpFkYZj8RBHmVG{;|% zQ{&i*_-aQQj;kC|IQkvCkq%VrAf}9_6VesPXvYbuPbKrP(YO~#9yTp*#8Az_9^r&^ zEwc?Lq*3C<7t#i6FLGXblj(z0fPyB46Xp1;#o{P`N)v8F;-45B&nVX2S0{c>a)M4C zTAc{haR6fP%iM#jUGIT~GMPL3=)t?0lwrKaHRYTnkunw$2BJ;SkvM|S|UnoE-U3>_*Ec@%#QEcN(Ov@enjC;v=^V5zn%gXDuvl-hh`~j4JI1Hj~AV@P=;3pE6T9W(UY=@TfI; zY%+Olsd1ZS4Ib-F9tTkWHS)MtiA7+rXjyGO8mo;fSySUSiyAD>tv2rKXuuJrQ8>SH zgEBSD_ux)$&6zkwmz zMdQgdyZCgHXM*;sMR}^MqO7b;bxGF(4--pV-hb=#IkPr)pISb0Zq~?$9|1DBZd&(s zv)0iC@AL7_TmpkH-`o#WApRW^zmY_PPP`(C=XB!e&HdDje(Lpw>afDCb#--f)t~DY z9VHT|-3{V9z=9QlitfLYP@sO6*W>iF99Yh?{60>e<(cLEyz7i+{KhB{kOf|jYgmb9 z99|Bzud-0}6qeB#WFYPxqLeQ$&+NbM+UaE*)T;~CA%(Y|0B-onBl2XLezwhV&JHa3 z)pEKZ{&CzfUenjhb3 zz#5}~H5&FO2?PQOw2YcD<)$g4#E9bn;95IEkT&3sjE%N$9rBO#dKjU6P7$}fn>Mjs z*KjZ+HEC<_>tn^6@234&OnubeL3cUK$Hc@H8?E$rkY{TbR}{b%W9z-|r@<#&t(g9C zTyg}scoGgOkwkaC- zg%IKU%m`bI(18Ju>HUq6BOB={M#xoD(hnIS^~XsEjPO+>4}!x0J7;m5Q3Me{Jq?J z70|?TdO*-xs!{zm=s=yPahbB*X2?k)Z6+V|fgU&zTtdaPQkGf5GQP!BNo$+>@72?S zW%XzRZF93B)ljT?p^0rHAi*?Ovu`0Zh)U9H+n%s(y+5PgZPNZXd!)6!?^@(7^wR#f z-eZ31%;3!B8WO9$!NtB3bAKM~*wZrw-9xO93T1l#Ku4@(8hWRDsCR<%Bd<9CDxBwU zmFJt^0#Tn9({C#sRtih$S+taX^fOzQHoU@LaeLL!s+WRCvW6GaYnlxiD7a{tUSZy_ zd2$0S_O){NXG2A>;`Yj+l`P*-97K7CEDvkuvKMK|d$hdHDfHEL;f=}B&W(_|Aj`d?Wx3P^*#upXeTSEhy9v`td=>DsDOg>xD0}e@nrsy} z-QiBrq{kJ-`3efC$MJ~>DS~kGh_nzBQUu|KL-m(Dn4a3W%|pF`1x-beMa<4-vgxUf z>dh+GIn+6Z^vs2EQ+n2HQ7-0PgM*_-sw2-9~cM;Y&lYW7{q2Z%du*C8X?Y2RzF zMQjKJ(pMO$x{WfhByv5J^Hf@ZSfL3Geo^9rj z>Hz#H)6wMQb4XPR7^SWDWNtiCuF^>?>}Mif89P_zLWELDj^k<6y3;joDNRox@L{bh zPoW=asMt$tW{Py8HH{Q>OEzgK-!XT(UKRewXuExeUbZx408e_2u01g$g?k>9nL0HM zqb#Uvb!ut~%?T^l>C|Mm)GWDPr%K!q$&GlCTbfEYDDB3StI!NHb8gB=Hl>i=VXd3v zre?|95=o3tQCRQ>ohnGVD}u^TAsVFTQFKl@%ZACKR7vUhYvi&oU2NeM%EvfI>KCBZ zI=DtoJt}xB33pg72_SMODAgdS2?-=2 z;i3dZmSlsXB2t?OI<%k$OD$DYuqa4S(b|HQTCiA9u|}m9ycHB%WVL<2-U{BApNk3)A9V1QoE;E_Z2b%IAz<^dSc46l3E@u3> zdj}dn9u|YPr1k=g>ui)#3vrkt+&DIBeBkGc8%GR7iEEf@V;Ck|)Q!Vfv|JAS3x}V> z$jqkL|3+$|P%Lt|uJQZ&=`PF?T5iebsE$DU!q!y|ykwuk!sK$e(*L=$cTn)}r zV4KV}2r#;p6Y+m_u9Ongi9om1}x%6+UxN+~qy;PINimUJnJ&JY)YAr4X?#T)cTx=Bn`8XFeE|Nt;e59^%LH(gpk+2Rpx|6n?i@{lkkL;Kfz%T}D zdkQzf zC9OP*`bId7enHyXDWq~my(n2cNa#e{#Mhriat*Yxl&dPp;1%y&T#9cY8_C_SWTB4NXA*)kozOAjAZ zVU&sI5OL^ViCeVJsbbA_;P0RN1UU2(XM{5{7hfc+$rndH?RIr*H)JlIwNK`K=r6?D zKl^oRni>A^{x~hWr$~5jV3PmL^FIxu&P1AF%mKg6Fu(@{dLB`{=F$KVWvb}G&gDIb zU*o%n2;jKfzyrTLpHJ-WinJw1=DL6|kIRMnBdvYRYewnueq!Zljunmx^Ej3W2VjAD zz6Ulr0{1=)E0=C4Y&Jtbkk%T}IcaRsUC}((cml4EJl?Q8vP?;+O!ETegDbGW@WG}1 zi+-5?ahr67bXK}TN(_1wLkIK%-ir#fpWo<8vu+ELikq@i;hm_|J5i~3!XIES+OO27 z7w{Sd{zLu%bSDG%2Bhxfyk~t6@CFdLHw#8GXr9ttVR&J4SEvrq58Gus5SqYH)yIzv zTNvFDOt#aBSx4i?eKywmL2A}`x(*s6uMT7IQprFZgLlo>wfp>diB^vXT0LG${gdrJ zE~EK@r0GCt$K~QZn^s6WoV&50c#p|P)_j@ulr*Y15}55siP@F`vpw^Y>6LhXCh}CV zY7gK+!$)DNG59__=YbD);>T#V^+sTs%V&e{LlthzYQ`AGlYd|dYs5?@yvyfVHT-qh zK9NDhjR*|P)f#a%vk|w@4S9563(}6VWi8Q3i{UJ27xJJZH?k>*HJMNlF{Q|@R0Sn- z!9E2InCyd*(QiMFh&ua1JlEPuEm&zkhZvu|5x>Ao*#cBS$?J%?9?3Atyot})pH0># z@n)tg#XlNZts%b8c7h?k554=q9&>L568F4=uXz_Y+R@KKUc+-zu8 zP1ga0N~#XRHsjn-!Cint1z|B{Zm8f^K%sIFDt1_T{fQ?jTKDa9uh?;OdbjpePX{E2 z;cVw6^7ag7jFP6(P4Er?z}b=+DjcjfSsY1oc(RQ5%;EDd9R3E)x2=U*DC!0SaXH=D zGyJ;WnlxP{b<85Hb3-My(h@zXGJn*V%DnupBX5{>1JqG(fbX8$@Wk+TOW6oZ=Atk4bDr;}mrEDjIsbIs`rK2zc7L zMm*Wa^*iNlN5mgU>)(#${K?|Jey$Co@HHzuM=b6a)0Lwx2)cT`$C7`qIsXCRQp-vC zoT*7quVUvs+dxB_@`GI9QR3W!?m1eLD0$OBp7wySzh9}W21pTGp8%VJQe~BVk!wOK ztKzUF)oLzQJ~FgUV&^0nvXBlkwiWh)u?$OUj8t6JMhR^)l88TPr^G4?lu)U+YMX}7 z{-089RWx{qSjCP{;AZ2vCDkd_SFZx5_F$O$>M`-^H=uh;Jc>&_KZr+}O&ye_{Wapq z^C{W3SCFdfug(#fFQjC{+3c40lJ5mZXja7fk$q^4Fb)a|D?9U-3L3lkdj<}QNH5r{eCiPKOW$_LZSKsZXrw)kkO0md7E55Y>= zCLkKV>i0oV6ko=``~qxe!9MbVFC8#A9ZlG;M?@eZDlCH?aAX*4Tj8x9z5voF)z$$Q zU>@3A?HI6EhA{)A0caRn@Ij}`NmIi?3*LKR&r6=;Fdwb#Cai!R<2!Ua#_UYKveq0b z^7#>(MeyR#^vXkXN>DYZlrt|sZ>x3`Z%KO^zy#yi?1QZar`15dKHVz97(N@vriXyl zhTX(u;Sp*sn2X{#HlqkQY%j2ON5sQ`LT4o}gG6% zn4#b~ghPgchoG`>L%}Ibehgn9WQV~V#pI0(8Vb$<$Up5zXfB49l(nn)NUB53NG6Q` z7k)`~i0Q|oR~O6FUAo=iiBV*9LlPoxEHh7%6WX{Wjub8B5)T3labGfRiaNon<8ld2 zr3i<)u}WE}n!!eRxJvT~Iy46m&J-Og0tE92Iy5uR!&8Vrpe)@JK`g;+ zy1z{$yw0m#6Ni+Kw8SZ^w)5?kh4{-KGQ%WxmL*S9?vrLsbbZq%*Nj$Z#W#!kxkbl^+)?6z zKG|;JoEsS_GRj?@#L8RX{Gnx%>j@!EA#jlxth7R!Lill8rVs{A;em4E-x0~8X)5dz z6n1goC>2|}yR*dMmC07ENg1R)!^Hj94zg%k}UGiBPmTB>Cz$FHXZhc z-j_1^A|tCqZ?XT;F00isvj02yU&;|B_q#fXn^++Jt}o#c z;1J>5nP1o9Ta1hDJm2Ekyn!!tCvSSr{oL;FqNGwcwSxisgAuqwx5^SIYi5>Uj^?rz z3w?{mT(ErOL#3Ng^>7{b0)8KjT&Py*u(q#1HJAAo;`o%T2`|o~z`fpu&85v%WL5Bh z^!x4!R0p65D|r`ln->IDH&;^|mT;gXQ0cpC_jmnajA8e8qjKHWq_M8?-o-fT7F!4G z{?3)ri1_XqiPosGaBi{KF~A3nddC27d0-JPuF#^VPR3untajhBpv3US2{g}sK zi%5s5Rm@|sMLH7*y3cC@6gnE$vpkU`-O<+d^6sb@Ak-(ZCM{SboUN!@V zwT!h}tv%QWhxJxO$^(-cnD!BXO!nLG=(l^&NS$;-TWcpXXQiFo9G^WBsW>nn2Y>_f zGhCZY5oA5Uf0w*c{uvRtUXtzMu=YgeNc!^PSrxUGWp>)0K$02k4a&*EmzM&~Q8QUE zOn;U)a;vUCtK9%V8yZxcrBEXOv?h)}hNLiUSQCDEhm1*P%5b)AX{j@ifYn;Wa+ zrV<>>SqvVnSF0Z2$|=uQ9ej=;4p$v~f*?*;9sHR;ZWwEtFj&?!Gj3EERH%-6J#9+d z1f=IZ;Cf*xHiY3Jb7;_vrlEl9aU!5!R^TGL_W^X?ZLb&RbJe6WnLX@ z@|&DAHAkFK)wx;aYtZxQAmtJr)|e+yT>_Vv!|Eq@L%;0O^nVU`6>;IZmq0!gGlL8c zr@_}q2;*ObI|rzj{EHV*HSWUo8XxxH9}y6S`{Z-2mEp@e0&;V6lqceZOlTJYv5U^7 zt}&zT8aWDzh4>Wd381oYO@6nL1&wz#uAYUj=}J43 z(IbeDh@GYIb^3Ujt6LBw>Dn3@(GvO&5T*a>&`BKLJMyD5kdb;a3e3lYVm+pd^aX!aL4;)c z>ro0Jv7JN7=k%*Ca1PP*>l7=9@Qus5X4z96XpOLXLZ;0s~sh`l#3d$@xnHlm#t zul@r@kv4Y_4`jQ$Ymw@DOH9PPy@U7*;%w=-+O|k6#Jmr;{~Sbp2SK6(5(Clpi^l1$ zY}-Jb@FPTCwJXc~I&QGY1QrBuu-Y%hS*JT2994OHt=V0W;2y1MFB99qJ-XCo6CV@~ zj@mtYk?TIq|03Trsye8L1~S3XGTw}DjUjo33?*$5A&HBGZ_`6bRRsK?4mar`sW8k( zMjt~d#e>;;i?Gcko-N9W%>1jKC`EaYcwQx%NMK_jr^ve%+La?c*^Y4lxx+Jh3PWTs z)I(Y&X1r7lMo1bK(^u-@Dm}eH9QkLzAwi3aL4@c?s@v5ew|~0`k!5i1P*MC|S`VT` zDgGVtWFjn|J8bTSlI9ZM0$iKnVQDszm`YgpEA=gKt!akMedz{k0oVo7roKXluFXyO z$hUykaFmnRaAF&P_5k+zS6+L*|>}c76N|(z5jh)#;X+dde{QT`01au_-_FT z{aaA7&-EVnc)*nP5oq~8L&7J%YsdRw%;TcWZRAZi4J&y+)mP$$qpW~V?boYrGxv+d z@23Weo5_-px&0q6y!?U&b9{$9qeSaR>Bqw;o>ropE*C3%nHQVX*0g5|_IcxZJf8 zmm?40rBgfNmt6fazmEi*Z$K_I;&j@R_*{cVyd|?ubG(ma&@%>O)mw)1b2jK1X#gy| z<_FmT*D%i%<|$ancx!~6d2$&uOJWBOWfam8aU0@7s2mBjmVB00njr5|{X=I7Ok{MQ zxu_2h_!(NGs-`C)V49MR?yyqc0jOLa({Q&&)(|S!jRoyQef-ifQl0(B$X#nENn)j) zs>41zk9weT_X8j*M{%Esckl!BjYwI!Yt;rvQZ5wDCIzrCC zX1_8WK7t~R)LT%d!*#q(Hyy6yZAEeQtTK^8?qaY^+;uZDMRQD3j2hkHg+=_odPdp6e=>k*T43{e_ zky*y{qXPLC4xh%Gx(wOGE{4>*#!M#G65E=1GTJfAQI7vAXU#6JD6asOehR`$5L5Ck zg(ED3B>r-Pw>|$}TmBkr{(YAGwdVZ$L8h0OjAft} z=Yhz>m^br(pZ`Yw!TeUD5AWPf(TC;A*d%EzHj3E3CP^%|3LulmLlhPpZH|NySVrTW z=@`wKZGB>GkaaQ;nnxr;BMOHPNh4)Ndr2hx6F%yj9tWavw*?loC1vFgsNhRQSvf3@ zkcuxUD|@jHb|}1Nfx>G}Kmejh;x$5Y0#;hV2_RKP9Q@Is-r}6o-4&wB615qsP#g1d z^X|F#yPnZzT`4k?fN>L1$k4;SdU%5#-lK;b^ziX^C@2zP=s%!cgu$9e1Ct-!HvmQq z=Jz4NzVRZ0eW0|NasZ`15>p^>0DJ+Yc^Ux-Nbv%aPcAmb%y{Gul2!WU*0&<7G~;;Q z+Pd^*#*7HRIQJNnPU0i_80}6q(;wh4WRG_2YmAmV*Np$0un1KvLiu z2*0LYzk=&Q90|zo5<1&Rq$F^O0R``@$_Qp+jzPi-Y)6yFjVf8JR|$zjO-`R z$Z=uxj%)e$xV<}gi%X2y05gNkB_$QWr;V*7+ag|Yp^ zpb4?XY;SS{;SG7EzO|J3dz-88n{!02U zcVa)1{=1DHJ^F6`KXU5m(f8avbsEegTgKB>9k1Mul#3YvAN?$`gE+j|m72VGSxue^ zKmBn@9@F0>eKd>Wzh>ozyt0eNIo<){H>*L|Uf9JwLOhm|Hd>5+v#&?-2L?Urx}nVj zP4WkpuC{j&Fo_&3DkizQ?f&zlu1=abeA*V1&QTke@Cm$wKhqXR;Jzl;wHnCtx5T7m z*_u$~dU4Ct)GXU-V7}lnZ%)b5{wXqDY1y_HN&c7D@5A#`o%V4!%Wyh<^%AbzsiGjW z1FpU0sZMQ|B>#)TmtD?>-yy+1vqQ32f)r8wi*8o2wJV0%ghbobIQ%{mJ0D5us+a(0 z7@31x`Msj#^VBTuS&?bQ36?tuMVIV@7Ea+GVC=Yf8Eh(V?uMU+S8!bI-`B0TI5R!9 zD+v9K-wevO6`|if=zw9VXxQ&MXvUgIe8RP&71=+sp34A-(*t7Xt38vu;>kGH4(KVA zs%4H(^zf|EUUR1=xcLbpn%dY5q4!dqddW5SVIfbgf$d*&#j4|;UN~bV-M?YihKrA^ z5_x2m$Rn%de{y6^&aG~BWcfgN2PdFxD0CzYd$`cH*P<$%{*I2~#ERtcuvbh_LL3uSeqRH|o zD#TIL0A&R3&v+yFvuc!m(kMGQ$2f(4#8l1kDv~Xo`O{+zesLhZiCmVx$RE^3=s;jN z^B83JK`3m=XS6|f$90fr(=SmNXVVfup|h!!8J}lV2KP+MJ5p6&k=-9g0bTDv?)(PX z{ZUq=Ii8pGS%6N~g1 znx*7DAYz6|XwSIPy(Nqc(bdUO2(wGcn+LQ82D1aSOGyGf>{9YTkM1CT^o*;A|52u$ zl!^u*=Ss@);2^D?lf*ymTXZv?d;@I=A1PiQPgaIDRDnDE@jZ}N8-_g{snBkxD68g` zEjNyH4r1OB3d(n0PiQ0|iysG^lUA*?QHs`H?ffHCM=PktIgU`iBCao$#NLMy^EhMY zu0vN6AK?HR%MvN>1|@|gBRTn3GNM=~5g$T{<1AJBTBuY};tW-6PLh$X7XwEkg;)tG z+%EjnZqXZ>qBm5SWF+Y&CZKYMHDDIcW~Y53Du+4ge)ddYaB`XoFoVFSij1b!9)GV=N0mRT@?u_TF5AUp} zn1N{9FL3&WPSb~<=q6d|@-(#wZD49P4$?f{;CPT~St8Gz24?`SG@E$3ONR)tj-p%g z7#)BQ{0@=86Z5FL^T~sBJMMfxRR`%+Vy8PTTiYWF2BF#$;uapOJUzAZ(wl(RPt5Qj z!$Ijuz;+(go$wPhU)z1dtFGs?i6^;?aO8cXhwV|V`*8UnA9ZsW(%uL|igb`te6yIb z7{X@D7e_jUJ+PfJ{;`+jJ~`B zZn^kCEtdx>nCQ5QmH$r;)Wx|EwK`Cn=Qo43?k&Fw-Y?y7z}}2s@BF~x*|-DF^DPRL zc^5THgW7jq`1v8&MUgW@iaK3Nx-i730 z<35Nm0Csu+DeqHiei1Hoi@dnn4VR??;FdRod*3`4taV&US1e#%elpFy;KSo`C@aF{ zP*#MyVR`dn+znxF3U@;=$Zc@tlD0zB8}TV zzJkgmzge?)VXEeM1Ifl+ksEo?ppK%JA~k4GhvKV}ei}5WbB=`_HpvKaM9f3+(9vAP z$|TKEkx|#9E4o3Qf5}r?l2JjH-Nc2eIV2awVdY7M^O$EH&SMf(Lk4x!4bqDo#(BIF z&$V{mBUjoRk=JMc3%Z2!nEX`3pw4d))rLWx5q(*CNU)kj?=hbB0Q%xDvyKn~m~oumzD6BSh9ly}NW9HY6>U!G8jhc(Esfti-_ z9VQY-GB@TY(!vR@&q+pdGUtbPW*qt~_9TkDz+x+jPRe3LU1T{**CiPl^nyE#f-NZY z1q=GujR=+8W|Z9SPcm}oCAS(S|AA8S{{9n^8}ueO8wFt$+Q^_6q$%hW_LYm7_h0Qf zy-))Sb>Vn6_>+uOz0^9C0=BUeO>_uZ4EgU6j$z@K@->p-O{xqKjx`z|9>70d${9W= zpKGlQH|UpgWAULU@-G~g2=M<1;fOuzn&Bt9k+fCm)V zOb}Oj#OzivZ{A9)8oOePnENdxgD8zF{-hBWue{>Zsz^g@15?l5n$cyprDlZ1Daq3o zs4ocP#vdW}y#sN$X@7QgZjGHtE;~rn)j@P5O>~}~mM=yg11a~xO!Fmv=p|-ClJ#zo ztjC92_rqc zf|gJgJ=`f~K9vTm6RQxH^C?VJOrWXUoS(vW#br^Gp}B3MCTG|7OtTIdHdr?)v0AL^ zl|tm?KC-lnhZXyPj^J43FP`Bua1~^e;e3&hgdwR?^g7*C1XXjn&Cr0m2?w zqFOE9Q9khk@vCmB(cHa&5xj*+d~0|%sK=+6V6{nJr&V58arVpi?uaNr#?aY65Rm0K zE0AYD4tZKz!yzwMhr=4pYORJxr> z+4mz0PWfyApc8Kc6p<)B>G@rZ+H6~aC^LAX{RxIV>G7%ylJGg1iaYl|&=yF-7XY(Q zn2TW=d%-`-Me$D~1|CCnNgK{bbK{(t0OP&?l2DOid5)Bo`XQ_4W#T9a!Yv+E?MEwM zN!%}(lrKBiI5&=WSgk-o#c?k(?P>)rqF-YDxjI&=)9cWJxW3FcfxR?0R^pub4zmLrJ5?dBTu)XXLRmbm{_BZ@kvW z6LCZ)Tp~bK65*a9ZvMM#%=lR&M~xhF4PLF3oq|XdY(-VhR{vS%jj(iv$GXbdmfJ^I zhK?9LYIOg8(&Bo_tqX5nSW8q*TEXn0I}*UB&L4-UbjoO z@t`30ZvWS=eB2Z1yN)l@*uis1o?X=zdA9Z(<)bz~o~X-5jYBD$VkT~NVs8#(CQ=e0 zjG0KgbvG54Y$c zEsijr6hDT46^;8+Z&#W=8^w`(C~4I8rBUw8!v@3H&z7v7LB?VDzT6D48t%?=U&c<1 zeHmMr_b&L4zudmOtgOYm79vJ>d7-BoSUVe9s)3ThEwH*AvP)AOsDM?LN>{xP=@+m^ z2SDR>`)Rc2qR1;KbV(WC{n%^o^4)Lh_1h!fwcM$Fcg40eSHL}7F>Lf)RDUS%S4RSC zM?jqFPA`gk@A9JfW^C2IWxm>rcWTosQs5omDz+)@ub6i&3qLcAJDfBJr8!Pe&buEgz`m&OW znT@7V2`$fHd;dUIVqJ<7*xscMlEX@=R=K@%pRs?8EGGL3Jo@dxQXtCw0-kH_f57ib z`_0Jfv-6(RiXipTx=Ae7+)$2Xo}EDvnCl5X7ZicXXU<=T zlw%JQ-ev2LwxTs&5w+alb*&2``KM9WAm(aRq~%Gq18nysGi&_^b99YGu|1e;U~j~k z{ouJxAvj2aU;xS+&EQRlGdC{4M}o8=3aU^ltV0!at5Q|fp(Rvk)t?u|N=f5ka(ixE z2p_08GSuy_jC(wKVJMMmV$AF5_gq$s^wMqL#g1d!XUJ2Q*9eBP32gfeyXe;lV^TN{ z{)NMz$g*vn2I~vqt`xU~C1%8EWzyp&Sn{~h5?uqM9yeP06wS6Y_(xdILH@DR zB>iYW)={JL)X}gAJ~);wT(neZ6H+tdmt1>mX@TkHn=2R9P$E`5y2q8?3hkFi!_ptp z(s%z5=}ytwBS7v30TN>@z9+?#&M{qdG^}mwX!th94M`I)&uI8gN}3QW87U8khsSrM zSJPG3B_|2$^4K22>IoeVqUC+4_Jo}dBKPh=L0um0wb1dP;)ceOZtG9ve)Bcgx* zc9D0>(1AlmVWhps|Hs_h#@ti61IZ83s_nx(YaRg0CFcI)=etDtPXh$%&OO#5*$@Wm zPGvmH9Htsp5=hL$#+}T!<*-TVOGm^qK%w2gf`$IYx)cTPAwEje2q^dn0POgO7&xpG zS&enNq3)^3cGlHWyuyA2c}(^~WHHEgq+l3iJKC!8*?9_K%P05G5d8SWB>K4A>HZwX zHQVlH?}5?h6WphR=BR~;hLoekU!`|9GzKY09(U2&7XYxue~mo+V+ACEr8UyZ69)~hw~=h*)n82vTEp5ZPS{9j@8qYaE+ zsbtn?x-aX5I=EMh!>dywD2?%Qn+Sc7E<;g5x41LQ{o#Lu)Ms|X&fN;BcPpg+Advd{ zuzj28N7%ld-vDM(*uHI_5Qf#S3vJtC&UXW#-+%X@7%45dJ+yOUQw^f@Vt-^8tEO;z z?YKC56?S)t(9@vt4Qk*1JPe_q6WX`MVH_A@!+2Z)Bu>9UZQgH6oc`=|@V(XyPid`; zNrWEz_B~oq{9^O^%$Ckt;8L`G;DGk`Qx zsSb|aZx14EBtqx{+P1Z9u1RBe?AFil8{xF(#Z5!3<7?!#4v3RTV3x^2qg2*`ewhX- z00(Ka)5^!CKDANf3;7@x6VAQox zKIa2i2+?d+o2)R;rO|9enObn0WkE+p z!Jz@^X6R?FTF`HhIDB)*KZc8FHM(yQ85M5(`sqcHqH2(Pw0$)s!fqcazS;@XVQ&p` z_p;8fUR)wR>SXO5R!-7%;{HW@2p~Do9`XAwp6rL$b?dhNo$M5` zXQ+FFlI7w&k`aBcG8mEudciEohc=X{v~!;E>p#qn-u?A3_jMXP2l8$n2^$uhpUHBH z+;vdx{+%dz0GQ%-uiN=>RE|~D?Czc{Uhf3c#k@xRTuOGG+32=DJi;AgdlylKGAj3c zlGDa*saUM?=^Mj zstvuSdQkM&G^aK}e8jX7Ba!B|nM~h{gd!lTUo7qC5Ibt@4$72~Vo*HP=HRVN{;d%^ z7a(pI3TcI~#)b+`;8|?^sCRGe?@|d|J1kbk9`59}RxVLZ(eQJ(D|O(|fo<(->$kMPDcTU&BoSv?xCm-;-Jtep}2*jIq!|$~ky@Iw_yd z;OPrI%|`4O`tv3{pVFV*KKev?-GG+E_m+BwKQx)NAMR52=luq5S>S35&!;kz;9Trf zUJ@$V(+b|z3f|EQ-rfq{2KbA-KbZ{cTl8dWR>Zeo-0~{2sqA*Z zrzDI~V{Dro@En$BI#c=*+}FtNos-?$it=0YlPg58==( zFU?QAuUp_gtgT{NX<9mb#2i}6z9y!P{amvcmB8Csu*n_&WmybU))?{a>$mvTc(=oK z(&{`!FhQGs=HLCNpD|fXAWdtZSu{A7YO4vU5|wU(Uo7YQsq~Vim(OBcgN&nhETinP z(_OFXF&^`BCUZPoF`d=MWsGm~2h3MZPVYGW*lFPC=>?zLw6@2KSE2WLpZXqcAKTU)twjm%IFjE~^&@e{uy|&t_<^pUr?E zx%FE(tt&KN(9XhHU16+$EWs`pOlJT(H9}7F1?xA`quuGj!6gWXV;JuSj8|3a#uV>| z{c3zv=A?FTgg}{ACv}R=!&J{`3F+>NQrvE`23%@s?p`cD1t-$}Y1K{4bV62eMo*j8!lU zun+Fij6%mwdoHsAATn~p!?F$q($()p}H4tw#%Ev6PPLi}k2ntVi|5dN}vk>49PU=cS8v zk6f(uqPQn~vHIItt>GIickDCpj>z@Q^&4C~|J7z2+AqTwxj(4jdD-f ztzpX*{x`qf%K7%UvDuEh+!~mNH84*v%ryYm2QP6(nPaDuFS7Mz3hjNRUxh7uH*NeNV_Q6Y+ z>mhx)9+J!TkiJ|G$>n-TU#@WcdAh&cTlMqr()GGSu2*{Y+!4NB+gYw>;04oRHWq03 z;{6ZUfj_8Q9QGmVlOI~=;Vbsa7Hnv>Uw*;*FGVdvt6)ReitUP3u%Vq*(DibwpcJd1 zR4>a_0N7VbKdEvR_?I3#9dnr#3npwEyH;qfjE`$w*n&+)SJ$=E)#O%P_4f|GfOOM~ zbJ5qidSUhzux~E?z8Wjmaha}yBzD=Zwz*(|{{R)3{FxR_9ANTiaOQl$dVv_)Z%&(@ zYU|YBCKo2%m~Okmg&7lEm?v>kssmr)!DsTIzy}As*kBJyUxkO{6LsV_KB=%?GWCe} z&i&|O#Nj`z>)@=0UX?m$!nbcMYvR8jFTDs^zU)SPrR%z_Wo@jL)nUupZ^dF+-OggM zwpuI~trb{W2$bk$xmKj*g=6Q9GH~5-nY9AxQngn6ZDRKkXU_uVc&#O+DzP*yn*RP5Mk(`9-La>->@H{WXb(h6NM^c$2u z%vRg=cV<6U|HRLI| zq}MV4bp!>N|Hc^HVqgtSiaj}OFR`#A;u^$-2!=H1V4)nSRS^ug&p<9+nE5L{DuN-% zvG8e9gI~}hcd;VPL7gX%2qk;iY8}foht-X)+o;rHRu&y>w`d|^vOB%+P$ZZ`)Ir)n zHV+IE2R~(9A>v?yD4OifG~ccX-(+`pKRGqhD~!oBALJPRX+Omb#()sGgAbO*qqVUV z8PIlOF#|kY8ykZM?KuS=ss&jE;IEZ|hJ&?nk`3}aQ^6vMpUcD-6jT(?zG=G^)o^C~ zr)JEbwnrrv#+8(onzR>5th6-N`{RmeyJaTPBc~2+gpFo@C~PZ6^EUIPYtM!9?K7&|Z)Ah?=-c?G4cFccW!r9K+o5NpVT+ac zr;XG=(la`@*~r$UvO)hj3gR62r_Ir_L;2Pj`5N@X2eoCPY+o4J&eWQcI3@L5vvJ7QX@h1=n~|rbmIUm_P&zq8#f}prPxf#K z|5NS`qSNeDSfSn#86k3qIb+0v8~P-P*>hac4sSYznEK&1esO+x0m)&*O+68&{I<`38 zggkY#+1yie{MGRygsKnL79nPj*)d;_c(baZe zEq|>mvNUN$w`JYyXmb1>HE#+l`!`wkr&@PMjpLZ(DRlRAUD2+|lUK{~_gQ8XSq2o% zp7X{V&HF5WF+D04&vTd9me!P%&ugt4E*S`aS_pddo0)yEG!}V=iNodYIql1fgO89Y z3M<^_ME%u~F@yQO+P7)4(F#_A<*A5vZJNB`7`pq*N_V-YRfsK>1Cm62rPnH|tH2}J zjGBKTeY!l9?{M03vrMK5%B73vFA+{#K{BLsMBZN_vTUWWWTK?XTe>)$_T}BAC}O8- zcNg2MNXk%*hAfBEe5#x1v?Z#8sILZJ;3K3tWm-Mc&UX`wn0AGozFB9Tbg51R2&eD#LMvwlfYj2L&DrvsP<@#5HG_b{>K zlqaJV%Rro3;?DIOGKz*&3dPFENBB$+&+DO`-xA_?=;14R_?8|@Nj9WYf`It~dKiU$ zk}&<7QLLT9Z49Y6j8J@7&^1yl?*WI3+a|-mqIAo+aV3~SWhwBWxQ!kei(>FoQxC!S zHiX>8zTfpqPs&F7%gWp|ccwoz2cMwMrpI}MPY{%Z`E(!D>SkAX@w=%aP#UOy zAJ$#GUtcHb_y-1+gD`6qWZBfqZS4R4uh!x`3w9cBFCjf6MKMpUJ$6Kq5^sv3#c z8@UkHh)-`MA*_+`j&mSv)MyiJ`2XvX{7+`9{ek!opaW{UFfvV%uw-k7{b|*e0HEswL5C94; zWt_~mRfNnD1GxiOZFR_Kxt7lb)OZKN-i3g}R>o|tB?fLnnuQvSmOd2sL~f~Gt2v}) zFNbxCtkjyoG>4T&aXQ*=$1e=m{0wn+>o)vG#8}<7vv_dq7bW+(J0{-G9Gz{uSSrh5 zvfXPE4fnY__{pv3pEeQ?FGxDJeqp$`=u$d9256$wbY`SJp=Q&mwGBQF3tR2(BO06H`WQ2&v*ps1`x$cpQU z>c}2{>}GcJ*Bl=##Kmsq5Ok;zb37KQac9M=&qpm5ovj_aQAijSpc>DS@@exVOiLZ&6;h_NwGu~T^bbk%d<2?Q1(sJq$x62ald|usvKeQu!cE# zd7~_Em?oKRLOkeRD>fB$j1!N&=#Gw@KcK&QAkX^FWG57m?V*yCntCyjY^GuXgx6ZP;q1^ z1X^PzdLZpYwS8zk{1i*>h0)T4dhl>AX9CvpYi*4Xb*jtv~Z&T4W{{5U_`SZJDtV)&K0yqkmAF+HLFe z=A~MO49FEX|0$)XAG3kKi)0q+cQs#x1W=cvnVJs1+0W6IJvdi%m`vMfKnc7|Sw8zY zvRNa}I)mC02hJaE1s`e!9|Y_-OxjQg;v^y@+&Q6`a7(VYVm3qtPUIeIfytY&s>!K6 zoBr*A zi9$&S&aXkl8e}48?VuA}S)}a)yc&h-GXmgbu0~3I#&?UEzZnYoD(^nzJDN+A`Vg={ zjy<`wdw<|OIUc)Eo}G9d*6+~`Y5kr9Wp^0kZ_%S#5T!=6qTCBD|KVsP@tXk5-?tvc zi}P2^_riw3ibcZ~u_FPP5oq1%7w4^*=Y_e}74UW}^8n|%w6i;MkAZ2d_m*Vv?XtHp zC!|j`=b#b2+^<{b=Qvz3ZH*&*7$@MaO};d|IHC+$5@paVre39o127E2RbX`pIv)g4tFj~90FT95g=xqIjOU{--fh-4nv zQn+-?+c3;+`jEGB{9EOio6)bmB^)X37PbGrLgVyF9i!%wka;C8vv6}uoIO|ZF?<)C zkK<_gxSWs0&wLTYJkm_Bdb*8-9zkVIjGW)st1PKoqWY0#oM4j`AA zSc;{`RQ{T6?<2Ft9PxK15M@#3k1SSO5619RSLTl_)(8q1TO789Ea8Z_8A&=_5^1DT zn#Ul6HCYy{WoiZ^%p`o?sLUUk?dXQ?cG((1{04oxTh?dIXH!3l%7ELtUH?y@hiC6ty%q)Wu5#X`D*k zUZ+eSU8TTnb@6^`-i%k2$(ix6DhHKJ1r^2-6$6gmIS_9m&M z8s}fbpe6AV$(pRvrZ~?tZ3-!eu$SbF-Tv(`g{u`JFd$Qfk$tjB|4M1~kExa1>xY{;gy5L-d)Q_%$9$a8CSGKCJd9 z85xrQC1bt^+An+gIKUnFr-}6}sCs#(P9NvFI`)zj)$?^pMpnI>Ul>*V4#n9A?WgaA zs%SB)I4P?@4X5gojGTH6Cs0Gmag-!6!i0sZ#;LncfXOX6(9JtBA9%m{CizNl#Z=UB zI^G_J68bAWTBpC#<8?_!2K|+S6s$%{@#)7|@O>W(s*%2Kbn~Fm%|mrbMozt(`~5~0 zlyCkWtN7rhP!+q3D)tyv?5j&Ma_Uupf^16qJxUUjR-t{G$_lIq4K2$JQg#b)-qa_X0XIBVj9W;y{Dj`E9eADII=BC2OBNX4VI_j zOZz=j(U{pQkpI1CS^5_>8J5VtfIo_sg*N?uRLTfNhy!zWHsB>SH zOtI*KH6UoVWY~EXN%$S&m(Z(Yv1pX>pQ5S>xR!q{j=bc~f;Wqg7@hk!L=Okk;s%lV zvOCMXAwfLzrWs^d#yfD67$IFbo;ZN}#&WUhJ`_2OB=fjLv8a!=yUm9zrxoS2YpR&` zaZ0uo!Du)8uU+o zuuSK%#89e>AtZ)CxT_uxW{A&rxOn?{%~5Z7hSa|9{wdRTadcc4xBGeIBPy zg>R5g6bh#_YFVC=`>t2dh+TuH2Fb4nuO9G9!v3&`<*hQ*w1Stkf~x^<$m5l4yL@6N zCugm+}C%BHuG8Kqjo~L_+z$K$yQIN#5rZHpB!k{!H zatjkE2t5-;3o&-i#cI7=5>ltg8Jd9Dm4^81`HHsc)g@pcAPAL4UGO`+nS9yII8>D1 zMl&O1GeePD6KrPNWtx$)eQmUoi&h{WKM)n=w$V&)*-Q>nmjs*HdYNXV@K_toWXQpE zMLijpw&FkUkJ)kYI1WfQ#rhu(hsujSb3p=~sA zTs8qZ39guz4&o?V@Pi%`{^r|XV3a>rDiYzZcRj zc&mKx#%uRq>6gD>Hbe>!DK@QN$UZq+B(sFxdzi#mmRVRLn5_x6We7I zBou_+dHYN2*y)}|6Jaeh$reChkiu1L!5_YVZI(@tN)>wNmwO@I+h`)B7ShnhJgt*0 zkff!5?EYK$CAJ~frcYFtHkt@&anu`4guQd__M7Ft&mDfFF1M?`_RV>ehUC!|_Ws+P z#8%(EQX(K}?c&$sD>r3%L4pgt^~-&Ro=XPvqF;*qH-ntks^a;m7^457cYV3#ly+&w zQjEMAB)C@f&O^NrCpTU&*8khrQFSfGZHMzGBN+3cRZCc%yuyL_*d{`POyviS)gs?L76B zbnCjj3oTd`64%%)kq@p7t^vQ&&bpE{pv2or1q>f~k||IM18Wd?zOpqCckzt+fmSGq zX_5|GRXi6JLpu4&)YjvPO5=vZYQcrl)t0hGF1s}-zedVyLr8k2)0f| zy%SKej8H%8J(Uhxs|6hzrfCru)DC}#fZ6sZ)?kkK7LdiuC_~uuD#lCzF~MB0knz@t zPZ-mQF@~_Gy!|*LiV+tQ_9Ro-ayxΝ)#@E9w5fNWs&!!>KkJ)DEA|UTBV51`g{q z*`9R}1BaDH*lmBrvsD-N^lKvXZ3ufNVocUVni?n zYjkGs_|Fh2nZ1%#do@9t#gMF89V&{M<)^Tw4$dU6HV73;F7X6a&35pNkx_@X0YXL{ zfRpN>5(1+0{u3nh=|+-3V~90>{NtM#oTN&zGFysj7K+ zA?wD1)0B+o4u33ZGTL-CWH@d45mR*#q$j)ed8Efp(>2|f=j2_Mbv*r!oXm^l{0>XI z1-03M}>qf`7<^d_e|L>lyN93iL<^Olju0jq2!o%IOm)!`Fcyp1*TQwF*z$b0;i74IPrG>ZBlqoX(R~cl@RkeDUjegK}S@}Bfq{}rkUc~&rLL#mL6*fy&w4@822cbu| z2qNi1S)kG!RLc4!3w;hSj4ZSqn*gl*kt`&7|I7oI>>vu6PjwVhs*Y44v69iG37OA# zR04G^BnsUDX}*z)DC7`ZP8dX?7ZPBTOA>{&x5ds$&QwJc8kYh&x)4psDGEL?XhNG) z6iw()$fDDPR=UKZrsQlZh7v{-;)ta*-6#-+_Mdi_X$5!kD+8s3lz)azdN>JR1K}b) zl)D>XZq72l9yYbf#x6|n7As;SJaHY`7GfhO+cvO2O~^|jwsE5IXz%2ytqhA?SOL57 zFx{t2in!Y`DPnr1oPCy`kX8E|p0zCizBVL)o~%;m2&f>yR641`|<5mg962L#rD$ufgK>VTNT(uPBX) zw!;V_wM8hZk#k})4d#!@lyA~#vYIEuR6fuS2piC*-HlXpX2qNGHNxV4~TqG2_T==Y$rV>;)rmHChB zTATlvDvB?-qeS}0p8aCS7q%VRK5-tv_xB(??J^2dH8YrhxTNr<#$aQ_(R6pMZjDzP&e z37?4>Ovs%MAImeHqSJ>F9Yiq_Y!^^rvugXW#?JhthgB@`x*cNqhY>Mi2lG4+it2tP z_L5;nWy{2>mC30Ory%JR)B%Rdon{GA%+*d2*Mh1Gkw&)~JHcwX9zru;D(fG;mGzHm zjIU5pp9?!c_+_vtv3kn2?zHUjOOe}>U6C-H3lLj~M92_c7iO&^v|$Wtmn3T$IAEyw z_sU*9MeL_-m?4t8MJqEz@0;2-LqxV8CJBF5jXFIVF}YRTF%;+irUG#8i4d5{g*A8N zz5s^#rvxZ>WA0JJ7_)62@_>mCRW`8DZA~oElXXkSMc~e#V>X9vGP5}%#vm!gxgW%g ziS9OX;X-Qaid}V+Em#ZHX1grO;b=sv~+zieUr?|esi8o;;Prv zJCOBvz4-gWo-nENzuWN8p0@X(_4PRp5%p-dk#T=CY0Bh~SsI)_^!(s7;q+zO#N>g4 zbku|!4hxw3mWsw_A!_zXCu`Wgqx;8!h@G@X^rx{M28)dEBOKx{hkH5NLVuLu;&&rb z#hYC`DdP9>o(orQk4SDv5xW;Ac&6(HiI&WZOc0s7yQ@t}8YS8l+LXYq(xP%wxgpuQ z;)N)SL~>6$05G&CiIxw0Tfxwh=7{8`l!~p+lWjf~z8?({3E7B)@yOs-q+Km`?&%KJ z6}O?>mfluzQuB1RS#YSH3fp`>4{kof`7)du?OFh1O5A*)EdZNC*<%0BC3~?+_2y7=nJyizVZRzqKn~p4uV5g9`xPynVZW*X6xy$5v-}1W z(f2Dq^Q!%d`;p($dp7HPgk_EWs)B&#xJT9}O+;e9;)iZ=SSe0m{o10n{4b?tY4dA>{o2u*u5&EN2Al>_R;?D?pOJVfkURMZvmIa&De?yjzMT_s*;NDB|pt zu)Iz*>;Wy6e9;pSGp5YviCj?rkLz;DM-g!ptQ2xJ(=-@xNjQdQ#gu`-H29i_oCi+l z!b$;UE0@$*4Uy0kGnH zLl72~??L6gQ4mcdRF$X6%F|@!`%w8Fy>hq|MYU<~h(DF9SZ6X-YWVTV5_ma8w!z>2q*BJk1jK3?!pMmjr)yJP9 z$Dbj`-{b`ELLYyI9Djx!e@3hEhfOZV4`~O~y#{q>pza*houSvABkP9UVZOO_sCKGs`85`7c84IrpU3Encj$~4 zMvbL>vNMk|-It&E-jev<8?OMu3gG$N^9;WN%Na^_o6bB_AE<_0cbSsw4t)g|%A3mr zi~V~kF#nAYQtfTL9lV^O<=@Rea5@c>my5|u(=PkF@ zyj}cK&d+;s-htD}sB@?vl_u+z4waP-MWx>@+_O+sI#gCVR8~5)RizidjGyskL|=Qw zFXJR$z{y;{QU@T1zeTRkW=z&zm~V>7RKn)}dF68_4DE-;_Jo&~NrCeaoD2Ba`5gJO zxC`d+W%oj5TN!=EADOv?m85p*B3_9sdeltJf>z+BHvv(~a&hiyJH(eIyS_GTFq z(Fs5ZUmV2}0i@`X=}$8?V+PJw%g$J&~-5AbZaQq~w+(l*;YcyPdw zfyowOBjQOq+d@=obJ!$}0=HqxwAmuFb=cwf3E?O`H?Yf@=n7=o$%To$MiV1*JyqIj z@vB_V7;UonBG)s-Pn+htsQMC#i~_tD?=O*}>U;pFr8ddOT={I((zv5GX)VD51#YiR z%0av~=52Hlntrv(k}onzrJk!znab433OrMrOiA@AU1Uvr{KAiDs4`RnN8?WQ3_QRv>8mJ^mhu#L_x60pDbnBujwmO zxB2}kB%f&4O1+21DJh&^ZKmq%7quyzU+qT{p?5ayMa_Ti4Mh$)!UAItPdJ77xq3%*cZP16RgBvhZzSWPBm+AuAsrT5NdaF%! z`di&vmu6(pU+QLKs4|N=QP^LYS3^YmuE?`a89yjx$0y7Lg<#96~7T_P~^%)Eo$>-V(hD&V9 z9*MDip`82+hkw8tF`HcfLC{^2_P6DGuJL~`d0gYHS<9-VnEMZ>o`vzaPCGnUyd8J=U{Q{Q4SuqIhI&XPwRQ z?l{lq!aviVAeR3)#w>Q!>QSv65 zD1HqJ!RI=QmuY)MD(Ut~pl|J0sk{3-#S@kKxkJJ5gkmoAbIsp(7B@YP>{QS-Z`2v0 ze?HGGJg_!@OJ<>1@_f!lQM9OsQ>>oqsc>!K0>_YA z8wvTqEGA8j=u|KVI~LPd=;0bY6nglC9`4e^*YxlxL(KYdkuarGs>u006qb*F4hi_< z6q>JC*)JpgXV_9$^{@2sC59;SsyJfqoGQ+nJ3GbE4iJ8?$?lDEl$XB?$t?1q9zMYk z|DF^bp8>0A^^Z|^&0v@!+4d!xI=P{DMq~vx2Nt_s#Pyq-k^SJnw=)d7!en+_wOP z0Q`aofL{;{=6T`VdN`b417X&mnuAZi;FCA_1e+3Y0Uns|gO~4S{BD8+ZQtVe{qUaM zTnSg5^JaV;&^>E6!)l4Tt-o01kY<-*L-bqNTs+r%+~Wb0lw~|{Iwp(%n)RIDEov_( z>~(5N(3bgqM$LMD+S6@S^~D9edVxExuz^68>iV!N%kR(fRt4sw$t>gA(>(XW0`Edz z?pG{)ae;P$H&4tF=4NmCaQG4r&eHtgEVbKI>sh*VKK;goUOZ}Jnyz$OjajMEPJEpm~0CRUmv}Erh#Ym;)e%=EV3|+nX1EG+Y^kZ;-}BUg^XSU5N5o`$6s7aW=yWv#94S zFp)apGtFT+I`)F~+=S1pjCm?w5?aCd6)nCI)Jf*BYvD@c+=cMhIaH zZ=Pizz4R??l3t@Z98HO*^N(Y?ZtAztk2b85ju?3WJUly(=s-4h9=%Ec{OG?tn!L0P ztK&h)Z0RxW9`YAQ|096!*|18Qg|HuKGyJ^!k!U?oeu*x8Khop64XY<88^h-kbTnNw z?W9cXBU$z`JQHmmf;pp+l&r->MKr&Sdu_w&uf&E`+Jvjyuo^?eh6B#duCho_>3kckpxkU5EYw(2=CBP`A#sZ!#XeX;iG8qw z68m5Ug?+H3_$ZshU^^?@>N=Sh3j0?xsT6{QTBK&m_%zPEQRzi%s~Q=AQ}sTk&*Aga zx3|_yG;RDnS`X94dWmk1(uX6qw~~8|-Iv?Q{m_R^8)LMlMm+YXr-xlrE7C00{Qwrn zG8fx!RH`OTf`%kF42NnOlG5GS@0x9Sfc<;WwPFW$yJ}>qYrURa*_~YX{76@x+*y$- zZ;+rt$s2Kng=tdClV_*OH)Oe7NNkq;p`pZ#FJ~NVW-F;TFR_id_6FA%es_=Uns!FX z%oI}(IYO=60<&35vwDZ9L8U|d)qz%9keYL^ty2B_yHW^O9!a%y?ai(A?Bw$t`NuZ5 zs+iqD;ZiZySEUo`rKO|z6wl&|Jr^E*OXhuj4F+MZl+EzkvFCwra%B^|1O8nmc-fJj z37*u4pM7Skmkz3Lox(OYrg~`%Kl@BGJL#x8)iJU!*SnN~-L+1xcj>e`=M%8ADcu8@ za|~otIyEUVDuO9oQu7m|Owi86G%lT0r9Xk0CUolTuSX7(&T`Y$(&(r`<`QIIKaWGF zWAixoVw*+HcmR{RtJOnh&Rj!p0Hj+h+ z!E#+rV|zYhOv|hhvU5zL+CFr6sxth1@oj4wYcpy(3@x`^*koB(6h1nm$TH@(3zjIu zHqMv`VE1E*XLgj!BoS20tt; zO51ZIYn>%tCFq@E;K-qw{;m><@@A znwcQL=-Wn=$vh5@+>5$P+Fa)2dzu`Jc^Sc5eD6n)cXVcZiywxU7@a8(p54NWD28Og zlE_pVdD(s?lj#o($MhRGX4(PReYfz;AYb5F{z^f4LF*`StYXkkAJgoh-!sx=c}d+- zg##mOsGwcQ5d5(#O8pWzY5aYRZls)mGvw4zL}_Y(1TLwT5i5dS#+r1d!&?wHGZo%~xFv|zA_S2U zM2A8Ik;#YRZG;e52&V1)4jk;R7cE0cPf{j>Cs4lFt#p@_#%x7;U*bt;gC1q@kdr|s zddZ0)-xA6Pf;kH^CmlH{1acH_Xm)5ZR#c8N-q2#?NV`Rrv|A)ax3O6CDMmWNJI%w4 zQJFrz!n9r1`a>r{DP9dHsK2h_V5XPaD;*|fC?qU4bJ=l7q8hv1mrT2dd4<4{ObE>O zfE&sOlS^FzI!&-CIl^L77uMQr#%SYy_u~V*@5;{IWX1mB&c|(;p(EDI<5EY-uP7s+ zdvK(Cy5ZWT+zR_TCROa9hH z@UK^Q#6xA^LHL`G04i2JzSZVX-LSQ&cEtC#s)5@OavtOI_k1s8BgOiHo9%|46{~p$ zhR$^LttF$v)z@~01`|4&?ruOlFhWhc-7ky{fx}w^AKBVi zoe`eV_i<@uNbM7r@Y*#+#!G|!Cg5r{SZgw+J~eR}VVfgrjp>n((=@sFrpQ+RvY)pa z$|74WaE)+%;F{o?;QGKd!nKrHw}oyBV}AZ+VazYEEPNYngXp)~l5ojx?z>IKd^6&y z+s|8G>fP$|NbgqDHjJ?^eFl4g(=zgyHQUe5`#Z?0ZQ8|X^)D~l`uhb*pPl!Sri0x7 zBDTNc{6hXqws_O@i?*R^^-H!Py`qN_zcC{qBPU~~I{qbFw0inQn}2i^^MC)mKLCsX zh-CDdj7Ks6sP1{m*4xGj69OXyb0C;4paJfF$rf$`WQKb5C0mpfrGE7ie6t#CK}ftG z3%9B62Ae;ECNks+KHKWjBcC+1ggx1N zn=QjIH0{`di^fN&*jmb3v3ZUtyAhOLtoqjmn^h)?l9=)3Ipa%G>Y?MITc1Ru7*W|z zwg$pAmieI(t=p`lteZaT$gT|8CZ&XIQZ6sp9o2Z~V&Ee*G8^8c!2|#CXOa@o=cKzp zC0u)GR>6s(IfjOz>lvDd0n1eE9h!-}PmnmsL*Ejn`-6@F$PdRh zQFcCHKY-Ub{uF~m^L{pB(@obAJ2!v^Trpx#3y33z9!Bip#KcEz%FVS$Yz(rrUw{q1 z>=fr#g^jm#gp+%E25NS6ll!sR^7RbSy#`T6*bvPPf$;I!Qj@dER5Nvx37(!&+EOzO zp3@cP>lv&qH8bFQ`zBMcZpaP>sy09e>jrD9cciv@M`~-aXQZ|ki;)_uQ{I8vsvoF* z+3AW9ZKS@+5Hiy-9OUY0%od}vHfDq5>dV-Otv(fxQ;zK^!+aC%G{g4C5397t*v(S3 zJ%|Gm-Q3TKW9)`{g=g%J5q*S;&;IoEwTE;cb#z+fjr|^%B-wwB{H}3CqZr#$ao}^( zqDfPqQ&Zoxjg8Ba$K}emjF4}#j~wYNnpahoT~Jk3Brh8whmDxIY0PXW9NxVNc7Yq- zw1xFNMfQ&UOwTYo0I}gM+kl?eO}B@pt2E~CKmC?1T`HnubJ`yj>_>+E2|+n-b56M1 zJT=U1o)+phPY-dMXIS0l+k@TaJA&NipY?K^a|7MxnE`I|EPuB-&o3?LfF!>n1?5ao zgP-yrp#Jvn;bZZ^0OQU%`|rCY5>x1v>RXwS4z>B{K$9PRc3|RZFsZdMk^Rijj|fHM zdp{NW#KN&9tB4)(V*13?_GLaMsnvUMG!rBJbViasG4m=Qi6a%We+E5b+pw_dCv=LP zR$U9Agt(#9WR;p!X%hUIPO*#XYVtpL2y3$M0S=!Oq*LsQdYrri-@qbb^SIt7NqkUj zB<*2;Rp0ss^Ju16EEj`!z2^|A(G;P!9kvaWI@II8?mfsn5=*fB{HWQ0PMV|6`6~u8 zyyEis!7hAG#He>2@t>RUKcdIlF0v0!u_iVrx_IS z(GDJR{ZXmJ7bV;w!W}~{!s%m$!tW67T;WdwON1+iQsJ>dFl-g>i^6?Xgug53kA?fW z@NX0D_rmqZyOCu`xC6;WM#yM4`DX}s8uKrJphPe%6#*5(-5~sbFKD(+20)(+`fK6- zOYr%iKT$$`$VEZ}g`1%6ea|-jzwjM*4ke`TH`@0^?u|&8+*^fvJAKEERdad`aB?Hs z;yW&JtoJj{?){EC{`Rm4IU&)h9(&Q}h8|Dwb{2hK8ig}?`~>f{PUCew!Hca228o8l zlj>b-!uu#sBXe>MGwPoCfPJ%D6|9ikt+TUS(U^vP8#{|vDv&hRGtA7KaRyvKOo&+Fa&90@yj z+kOc#*m>T`Q^Uo{x_kd@TNhY7@!om!=P%=jRo;@#PH$S;k=|jHUVs|iVoT?Tdk;KRo_x;>975dqogW_Syo(}M;OX~f*p5Q(D1tw~z&}Z!GnJ=&hMV#Kv zd91%lwV$;G@*}+JeSeO0Z29F7&q=vqi=#ZpcUz`JS+`)qsTTj<7_J^Xix;yvznh;h z!fGrMhvovmL`rmi_n;d4CAPJ!!~r`x*E^g1U&Z|N_v(G{mnzwbIkf@as{Q4WCOXR3 z0scyHSoaD7aHNDC)-Aw?MH`ML8OA5~eX!DN`E#`eVk zO-;GwoXvUN=Xkm4nxv#r|CJZUwNAoa~q4L+WELOqCo|H7aI zye|v_^u91CHR=EM3!}LmkAG5Hc8&U|p9A)<(*!FN%aa)!Dinee5kd zgOW=CIqZjf7j@H6{kRmWd$m7}nz6NN>c zA$F%7i#p2XNqeTI=h3pxHfzR)Us+t1QB%PY0*=DA9YZJ!sKaDRjn|j*3>J_c!q0(x z8Sz`2yrS({ zg!T^~V;yaH;@~AIP`P|=H`atM`Y`F!!}!?7ixPh($sbp#ie8(4;zLRS?&V|j&7*yT zj)xDvLD>?J(H9B=Xh=B(4w>dJM(rDvl!f6Nw2u5NzR$z)euJJO&}76E-=OsI<{45* z6Bxch+5Tz_DMMKTCfX;DZ_vr$G}CmZ`!{F-7d?%ppm`qA(*#5|&G(3&5{O*j{RW*+ z+(qIW^b0DwSSvy*^e3%W5QB-HR^tYur(4O<7K^43p)D5Kfz^}fiO!A-(G%rHh@L1X z5??H0N2;+{1PT1j#LI5AWh1O08EbCUuN!6Q*Nw9E>qe9G>qe7%O(ifUl9F`*tQJkQ#!_K4@@6ZmIgOmb72kg$ znA5E^wUab5!^)&p8adtCn?lbD<{axJg>tUZY1Vrw7aBRyN|uDBF9o;TnorCcIl;P| zm^Cszq}Yk#{*^I@6jLo|_X)cDQM&s?+!qL@G<^goYUnEsNOzy0yC0>yPxRiWQAP8( z5Su=P{D*3iwJvL5IM|>ais-fmrsj>aM)vkBczM>pfW+6lNTinF5vf5|mP8MAJ}Lte zwPtox2!aC0B|QZmfm$?C`aeBgwf~+M26fTQhDpyIn;yF%P~99EJzW~1o{Nm$C}pY3 zqoUnCOSo40-m2!LMMtV9qM{2`-r%0$eV)bZW^{g$rUH#)NLms&;Uzcaf@{fwjk{~LBNNg%ZV$&cJn+}oK42Z;T z_e%?M%R{B0qzP*5Q~qJl_@iG$yQhEjVlqtn)&UC)ll}}VSw~AEEavS+et2v& z41z*vbcC<0rGnm)*w-Zei;2Dxe+yGwgCM$^O5~PvL#%$AAvdF}_fe+~4(|_v8+>|!#ooGhzVGO3rQK=auZ0@?+jY9@h8{T8CKa5e2V1nrDN7My7B z>D(siQP9#_HFhn;XqPGMGGrblObljoAjqbkp=jy2-%{i^OuEP?OWA6zW9%UFDwO3m zK3PhSk3NFJ!>m_7*5JQ*($=5d+&v)rMz4HE`Kjw{Djr>u$9y4Nl1vdzXVA!X3Rjcc zWD7b^xQn=(Yug!u_>y-x2Od!u^~tN2gOiXXCG0Trkq4$gFy_0ayruj#AEzzN~;I^X;Iz z&gn=>=oJE0g7OZ)ObA3HxEO$`Iz0pM#{?`{ZXw5FTF;h%Or{+S&eRNFwu|!`12COb z)eXRG66YO&cT+BO1MsUvYXk6Ihfv?PJ0lk<_@U^$61>L5&ah zHmOH%juw(2_NKG1@e48GGeF4ruiQVPZoX5qbM^ItDYDcU;0^ie0B?7_Jnzm_uGb>c3i zC}nO_QA&Qwq9*LE$M)>G#QRZ{G^%q>)1tDuk|U*{6Z^oMmUhlt+kzASa@o9;#bl;9 zt0iSA&KAwz)M_a0yeF#v_wzo&-Ga73N~zk~8xsmLUfa9$8chF3c*>YLT!oDD?meEe zn6@&M6@*_apIx%Rqf*STj+dcarSnVgiONSw4X-Z^OUF3^wijL+l~T}z{cufln-f02Bta-x*Nd7G3uO$$3o;W_L%%R}8?`>*MwlT&k-ouTSWnMc>oLb^7wYgr+$ zqkhobqTO{CXm?G*Dm1U+elRqdvJ{*!3~hx$Xfstf3KA~rI~?~)ur44>1cV_VNar6a z{6pby()ou7{}9opJi$C>C0dWGPf(AG^c2?el%O71pP)YHJtw#gHnF>ASf8LCS6@Jm ztMDq(C#cVP&k24?=C_wxN2S2Vj~-s1tUlZNWcBDsm6x9?R$npRWW8NYx!lKNL3%=q zzJ=+*`terQC#ug(P^seW7Wz8Sm&%)&&c!K(I5$&}vam^KP5L$Q3?$zRgwdjBQx}x-yYbAK} zxb|-6twl$1aKfkS+l#%tDn*9M7X9d(zULZNx()|DGyN}l^i5T^sOyVfxoSk}k_B&6 z{hPk&9@8jZALzmJ%Fuz!=9aMzT(+mgW1(~bz7g>seoPe`;#3WX2qUlV0AKMG2|ME9DB^k<2%u;o@rw8*xm_k;Qh!sK-nMKh63>#F#Q zrj>DgMYm8~6SIvDioV&+U%?9>(OV&7fhb@XC|`-TSV+Y{h8;*u@aRus>$uW=`*2U{ z?Jdg?S-QWJku{11yC4nHG9J27v792ZgojoumXC;BPNBwHgCCPom2;}ZZvfRy#Xd^k zSX=BDPpk?LT;gB65{f=JQRH9zAVguDDD3viVS4>FI#?(L0U_N!FeM; zT29ueT)%g9)C|A(Jd|Rr&A}NAFKf2{O6|*#eb1OTF0wlm*T(JLmX86Xm_&~c0lplo~)zyDSo8)TMKSf{73+*kvkQ? zBRb{=MSbgs@DelT+kT1a8#ncdR0mashi|f1`i?W<+th#)Ed~f(I@nD*8Wcx}It+A^ zfgg?#naIsz_vI#XvwgYd39a=3!2a~~cgT^^@UXf%z@}e;zHe_#w)#VUbh_eKA_t6^ z>`HUFMvjz&M%*|P7nf^{W4zm85&z`-QswZ}Y*2D(Dh#pb&2){Ivs2}_4OymUL?%E=Z&A4ApaAGnjWJ=O;om6_Rmo$uSk`H^o1Kg(sp)GL+!+)b{JS9~=K{n=bFbev9Myat&9ASZT?!V{mf_s-fa5ujB z)%-6Vx>b6i0Jp05IQ6!=xI7=10ZNP#uu0nZaFBiYg2EMZ?w>zA!9M&pryA?i=Wed= z|Ja89=KX``Mf*x>WSdW@9dXV%#YMKNu(($jZI^H)>Jvd{u&D;yGpZ`HmG$Z6hT%gpTO1EPt zwm;@l$7p8ez&e5}9`WiIA)dW0+JqhR$DfA(K6M8;rD~|TwG1-9iHGuIJ{`+d**T|b zWZA)|W9^H>j~MY}Y*`XLQvIc4^mMg(d%t|B6CO2KX~E+`@}0j6_g}(g%MJUfW&>fj2CooyqM zwy0@-_Q<|Yr?baZzd30>5hhn+5+;U^`wmth4#c0w+G3=kkD>C{Z?j2aS8bD|0IzJ$ z$&PSW3a$~*P%HcQiMmw?o%=- zRw!%@kp4<2eLM#1-%Ly1C8!5Z$uj^vHY}asNh=&PZ;z;CE%CH7v4zz3ZH+;wompMC zA>0~TO}5B?lE2ae(CIFQ+21|RRrtv=Wx)C)8R#1C!f{?#$qOmIlwz=lWJIw|?c4_g zJ&LR38Srg9CwU=N2GkH5z*Iy#*trihXo~P31K~WpQI4Y4j-uAi>KZ339WzkW-zn#w zGdxqIjggrKR5}dILf{o<2dx8$xRB7*o5wj|= zRNB8IwTNL&3&_|R*&l3ok^;=j&VGSh1!gn+nniqr>%j%d3n0n3H~HT0mO|lWSQF$E zhf&Csg_KoNs!3_R!!r2b{A6W5KIxVwFa7QwmIyw3d4{MI#B{~^;JoB{orPuhB;WJh z62?vMGx!= z)~UH-RhoRo?LkONiZaLByH7YV^IEvomOO_PRHAk5q1BpLy3LP`tqp8yr z`yo2iLDa}WyYZV~BQ&_;{(!v}i5OVeKG6F_SR?Km?OdxTl-_z_uGk5t0l^J|brfY|h#LG-VCQdl}wxlTC+N0;hy2E^-Ylt!+l%j+2M%a#8 z*)D3R4)=9-uDg@JlBmqaF7*>vzQ_05D(Kv-JY;zD2dvCutizv4I)Xt^`WClXx>^`U z3Le-usKllhY;i)qVFH3NiTVwVk4E1qh#}kIC2I;E<jjV^wn6J;ZAAO{JmLVt$`u zSbSfFr*}R@s||89E++d}LP@01VL5dBDeVC;4WEm9fV@JnB?}v-Ev9t@X);ZsFpH@b zVdk504+WVu%%?X;sR+h^t(Cr96PmhHfPk=xQhrprvpri-%q=4=~FhnVNOE zwjCseW>YBUW&t$zOOrWe3K#-Pk*09c5=h3O!bkveSuy{C&dePKr zDvws!i>6M3$nQl{Cq_W~rqb&{@J%B==z9bOMo^d+GMi{GqZ)DQiG@~G1nwYm1}7^k z0$(8VcAnAMfz0;W9h}MyJcBsW&p0)s7fmU1Ig!(grj#>@Al;k2Fj<>LwPvh!_rhF_ z-z(5O@mE3+L79OS)C75)F+J#OgykT0TJV*INm;0eU{YR*mZ%7}vYSdJ*u-wC6syJ> zGMM>vRA6D9AZSue^e{VF)bS> zDy$l>$i@*3BM51;?r@WI2gjf!4r&n18pJylR*h9a9MDRV0f-s+p{FZP5C$(wgI1JA zttk5{tQxN<$}SCK5#p~Tj7;gY7h<~xQLjPltgvdV0-{cXcoET+1B5Y6>W>FSWMiX- zQKMmOuCNj>u?mc8V1z!8ber*;jJRQJk?$|b<1p7s>`hfM99`?fmyiRayG?bZ!lKdtPzmr#S*L35CK2YmmAA?~6e#kUb)<`}^ zdRfU(smXJ#(Hj+Y@3(ztsKpBtZh2pjElShZzijzCNo4+ zlNst&lNly~!WEM3>x?%eA3@a?;F7i=VpBWnG z(B6dLWq*2l6xzgS=>2arWHPbE!7b5wO5=?;%GRtE+*+0v@N!=t5F4-gxsF{*e?-)-)igi`92F}cbQp=iv*Pn(C%fFY57zygJ zfQGf8+Dq&SJ3;6ZUhkt?s4a>p0NfAh^Z7Uy`mBv%g3x_hSOH3xojh&@|= z6)b;{a`!mK-!#i%8EJ9J4^nv+#%p(3vn`Hn`Hoz9M6S^!qzs1Q^kpT6;_3Gnq_OJ+ zTnp}>Q&LdmGTePPG--}XfI$n*FM%vvkdOM8bJ2ae8RYRQ*Zk^ZQ>gmxd>kvk*v}EJ zjvEW}VI+7^Z`v9itR^}8hpNXu8WXi??+ty_ghc}))xUf)pl{#1@1Az^bVEVWocj&; z&s(;9NeLz98nemu@gv>k8EM7wH`@#Dhr|P!O)wPSw!Fl!3`P)39xR?`ScbA>&s%Cx zXK(e7P@jLX&k*%Mw4WJo{apq?OF|ez9;cb2q(|DW#*p=uo zr}n2cUuN8={lrkKPK75Rv-I0ovpch-}412lWm(S({mA_{5m9ILK=I@)18 z*k5hi;}~RuECa{W-~+|j%#2}v>Ht_k3|B|^jT~rvr@#7Wqhp}aDO7bX=#6bJO!Q$+ zjH0t=Q!n;)7_0j2AF2OWCMI~(>o{1NE}aD;wu{20gBwH#(ld`29jq7SkL>%4I%wU@46s0r&Fwg@Vd@Q)ou|&=QoRO# zmLZW=zlnI~P=s65v?0*i+c6>DuAU1-=#i}>t!nx&!JPk(XtNsqUcUgf__Yz{8<5J4 zh(M`LAs4@C!p#%@i%c)uvvb_;jE@INfvQ^NnWaL)+;OE~BGu1|(X zL#UO@cH-1aZ}*36=Ni^TcGUXxHM>TQ8l9j{_46653}!D#k8mf#(A!Y6@8xf8<%T^l z4q~#C2*#i{C=vk~#L74(n(+vB{66A_L=JZ>N#G)#qJ%y|xU(cd3oA;XIn3dXRJb(d zApwtq8vv#Pkc%%4ccdeNCNrX~1cy6@C7gus;SP6#gsD&>!ov|~3Cn~PcSX3H-9po( zLU1O6Gbv$M3vu-;dcsE2z>xfY)se4|ZI6CMbulEtu)+ruBLz_ocSM9@LKb(p!;0t; z_=U$olod)-d6-!M9S9zRPD+qc2%PQ=Lq9kUs~#eW2qbZ`qcHBnFg}?{Odu&0GL}w> zQf+BjrVLV{5`mJQpb%g>ZW9yaq4Fv6G7Q}cV9M!M$|)khsVf^vR+193sdOGGOa!Wv z$z+&em8cA41R1tql50Yt3_!QwXF{P2C{!p4bp^A}E0DevDpZ;O2B<@VR3sL%21M$> z?{X|8Bq1E=BIt_*gao?Q&Tg#`XaFh%DKg~`|0Au#%5g3PGfpJmf~3yjcNWRF zAbDz>)1XiHnEa174wtN%+qtqz}qf=6s zOk};DwsKsog3XTvYCva#q1}3r_!Ms|6LWq7U1zgvF1yZPy&YD2@Ze;N`;R(|5Q1e2 zDk_>X#GfDDJM_Kba7R3vCOZ_yWYGTk=ohC@pC?eC$53~t6kJZALXU~|JPP_KDl{LF zGDW1>h;#&z-a({hgdf509mHuCaSnn$h&Z!#S+#e`stss%ftCxj13=pcv_=<%y9W?` zAK)4VTmxt_o1TkEHW6tCBJDz?orpx{(|6&w6LIQA95Ro-9dW3(yiWozyOuDOy$%?g zfl&i~GP=H50Z5Gi*$9t~0HLyL2~*jt5vdB1DiL0dUlrn1ia4u4uR?D)(Hj|I8 znPj}wcteTiKq|R$5N@pme2L5V+XKt!Az2B)l2}mp`4!<23-$f>Rru4DdH~f)rV(w4 zdYKXD`|ZAE5eR!_StPEFjBg+K;B$W{u8kgy-7IW3!ZARNjH9?c8tO{%3EN(wilwsfZfO(uTj^EHp7d;y#e8J3fo1VUmc?Bx8x1Ur zFS0BuyI3BLDChGm@OhR;*8K#?Y=G=!AkQ$6dd9btfjq-N>OB}wv9PBY#%x_(KNblW&IRX(^dvj=c%kMEN}}0VVzJ{;hP!A;|!#R@oi=qd7NR?crYGiVUIEl zUg1VveNt2M8pQKYgjR+8$<`ho?a4-m(N*Y1mW2&03)L){jVucrSQe^1Sy<1)*0U^h zug@xmv1VDMf{s(k7^@h_8U|9Sfn2(R_VmS-GD#I`6B$8;Uh0t1`7T|S(fKa5GrkV+ z!3QHdd?e9~UZHrUw%@p# zcTjJI_FSJ`YVgu2mgWgcQ@M1E0iR-to?wX{^CWtdg&k#ycB{fmM;OREEaT0L?+C+q zhha2(Fb=Y?gAAj44IYpcs=|E?q>(WmU?BS#NTUa&frT|NknUBui)Cad!>DI`yBNk! zhEeaq*v`VXGYs~g#GO$|xz>}Nr|Xtm#Sr6t`QXXERL2tD%o46);B_qF%`D*>Pr@5n z*hZEx)uPt^c(5-i)eNMHfmAZaY6eopKq?ss-VT>mv9MJPgsM>kp^mtcVU#e8V#c?U zVU#e8Voyevu&^ZzLp<1u_A0$p#6SueNIqjMVjzVKB;Nxvn}yA0AXJSJo;8MieErdS z!fd!=?LZfrD?(>@Lg|Z0F^Nw>{=tZET6{3lOO*OG|A>I~IriD!JN!DL{8wY(`_J=D zuFsbz5#3nDhN{PPYpqEM(br$no)HyP=x0Cr9j|?>|0fNUwC9c%Y9jj5o2+Xd`gHG_ zWrb!Y*KD1h^Zeh;vLZUw%cuj3n9tFqi)JrNSkK5|J>z6Yj+ml(KArL9%)fWhO%sfm z#uR~5n~t5tWQ{swYQi5qlNaujlrWnbO*}Oi|GLgzB5C%5XF8WXjx*Tfn8TijT=qE5 zV2@*t=W)ztVcG0)WS#gLlNk*+li{W_T(=yB@$XV515RhaZVzxO15Opd-MisaSIutR z;(<&`NW7|3Mu^An2{!fQlTltwC5h!Hk>$t9l1yURNo3h^vh2|NZx{<3c8%=3`y*XA zCxO<}^v$SiCWR)|XgfFhK`OgTWp{?5reoBG^ty?~jE7A}#Y`?=*P_&;|C90#X2p$X z#kHeIc>V{o^2W3B+CAm9vGUsfi{+&W85Kz@E){O8FbC=b{VxEx)z>4)me{xKw6ozd25Mk!gxYt$}57B*> z)y2=m>S7s1)K(XViPc5s=~-Q*B^@aZeAov?%ZB(9tBVu(D%s|;fL+8hk%|J- zF`b8QEaO__Z|0%ZWqfrpgF>;o7-)iAPP&y-C4tA`tMG+M?EDN|Ot_OcP<>f1wudvj zg~ePF=tnUHRTN0eMjBNZ7^b800};U!Hk+;XvE@wc#w=sYeQY%oJ2lG!?ch|T+jw?z z0|!z>MzO_6+WaZjI%lvIOhM$Z6--9ZG7ek96x2?o7w!HO6g1C2L`9lPl|lOJANNpf zL6d}-k|IJgY4K6qr_S7&K0zal)vOroSWlM+O!z&bRCOx+hH6a!s>lCs0 zxLsR(tXHfWr&w;oN{_-<4nIKjzY@gzFA)S^ZL3zq!r?|mEF9J-R*h3Eb5&t^img5N zK{jbun)HWOFG7d5P==*YzVukBST#?xXpA7`jG7{ogQI2!kvLTj2`66n2 zg;nDeUR3FWzHsjv!GMO&{sp<(nv#1Z&OW29eu zF^*^$SPA7A$11EEtEh{2G>AgPTSXA#r4BE|0Sy8xp&X*Q!m4Pz0%Mnp4pufW)>VbIC= z!T3p&q_?~n)fxs?LU}f7Dxgu1vkHhR4T8+oJxUO_OC}#rNjl0|=R*5mDHj-(6;_Q` zU|fcEKi05~i2osBBK}YPt8L1XvFS+X}k1{7vq$MaazM@S!LB&1;z<28}W#qK@d+$UwR>qXb?v=h-0g)8Y>{! z^Y@O1QH1y#2;(VfFdVIKXcz}IjOJBVja6i0p9ax@cpnhN)6!xu#4Zh@L4#;qWhGXH zcm>8z4I>___8Is|jnZx}MxBPSUBjqHQ3R`i*h~=gv=zaB13~PSE)fKO+NxKHhi&63 z@vtd1D2m_}k4lx6jRyFCKp3w`iEy;OQKt2cGOcf*D1udF<8qnk8}0B9#Ydj>D`|xn z;+zI?u}mA;+RLmOufRB~VXVZ`>Q?-uS;p7B7^gIh(^@uK%B&izfH0xt6wB!m4kwT^1fSG2pml~$`P|vib_D{s~!A_)@=;j!5L?=>Abn_v8IFVu@_XN8y zw~+fWP9da^jdN&UrHIG=^z?QN5Jp4D_3ZS>{xbS!%Ae$b+!c9uPR^Tzqba#FYq7y& ze4ZSb>u_f~u)RVJwA9c(j&m@K%6EMns?E!j3v%)GE%{{m$njYZIL6P82kSorEV;y5 zT{6N6@>@Y}C_zlNab#r?A)XH4h|iLLDa@eyXB}z+Dz1nD4v7tmz8# zKROsKA6NXldD7)x&xF#uKagsDS+D~GE=iWl}N2j7yZu?c~XRK z;-Svxit;wxxc~){f9ro1f%5CiQ)&OqJDh6b)O(!T$En|Q>etItU3m)^E?;3%jPmQ; z@3)-eHBPKX9%DcGFNgncR4u34mZv6uDf^$ztId;tk3Bq1Qf?7CpTn}2{adH)PqM5NU6mN8 z<;tVy<4_U~Sn0hBb7g1N@A8zFXW{{vCA#nhi)9Vf&N>PKTT)X&dHk5!)xjSWy^ zE%*ueQA_VaL(EBLn->JB7CYR2kh5NfUxPOmy0*(89L=q#cGa;DVdR zVFwV-I^DE?;xk3FxXxq(dHRRX6VXE~XQ7}9)9G{G;E7KOHwoeBA za~s*XSnU%OuKs*cRIqt#G+ym$?0YaP;T+U2(5G^gflT>6^^d4Ha|gn>DPQL;gF>WH z>Z61D4Kzo@;I+#%T#!yvqajiKGkFh&cfC5t3H!ay+u(0aR7VVk{}Bf)WUFTuM>(Vx z^-?Pg*S7x?!7~P_BbG!BG)5$sPEce;1YMOZ5XCrE1!j*xuFanMnWrf4LMrPEvmAW}i^Z`Dh=FUAWreCZ_)v z{_}-D(*q3pu%Q1a+_T(`V#d-5C=ydZa)*(NLBXk>NsCAQe$v;9y-ODBmKD&`T~vy_ zK)Kd|R(0PWBXGAKen*HrN0(h>54gw}WA*zIGbjQ%uip7FO!y|r{lQF^x(e9wt=@+H zLFeeMXch1>O$cBHeh-j=-&1t4wBZu}3z!HVJUr5>cAUj#qFpz~lU@^~arRV%)h`#H z&y>b&bw>p>xhMHx!%}?55QIL4yCW|Ex%lm2R=;eFm&BK&#;(EXxg!b!&e3J?L)fcy zY7Me+c>uHq9oYrHqD-W*@3h_Ow+&xl6zyqs@5g}O_dSqTt_I6KS2Swmq|F*xh_Rel z=v$23Rl==QrF#bVRab&X&GbiR_WjvzRo{t58R}Od@~+$A_s-XS?5dlTR(p?}#fWW5 ziDT^EKdH~l2fQIQZAzR;;+lTq~YfqgJ1sk2JB3NTp62Nl0vb&0vlXtVWb(d z_RVmU;%Jd%>jcY3B+oqDu^oQ2A*e1P3=(;|BOeN>gX@HwL$TlzN)Fs4@>iIYkk*Je zAm4|S4Vtzu%wYSFXenzus2aF+a5pAopP}6wRiN{k@VhYKG!m^!;KqW(478JpI0l2G zCN3)a%??_3+qoPVMS3H%54`uUuNtyx0^cUOH%sIPUFp!BBL{Wzx7}C z(RqU-G;-qK%yJ|E?V+Fc726z;1xi|CV_x1d0Cc-Cizd0@pv|#mG#+wx~?j zqxqgBdQfNs)5q(uj?Q{Eb||&4I!K|Ftj$-kD~@u&rvwRl>)~)maW{HNH@XP4Q#>!) zQ=rgez&FO}p=gz&QujDrWED@F!ip0jm=ST>K*t|9m=gaM7KmX^yuQ;Y6+}eh>AB1+ zI%4AAB=+>QgwWG-7V%rKho=(gt9Wc>89lA18T=^(FS#!Gi{0RlG58aRe+=-e0KZa~ z`J)V-Hd7T{g|76J`?KBPn;HB&0B8pMO2C)s;14qR0|<3r1>Y0;X+64v(l;{reE?_# zJhiI#4Rv+XP%G=3rhz3-`?RjF?oQ~FH(*;-JxhKk0P4H84Qrb1489JbS65z7r90XM z9xq;oz8UdrdT5%B3WKN3Ue{N7?{tH&WbjppU)e*`tYYXZ5qhm|t90$R2fM)+Gx!n$ zxQ?cw2TtEKOIY$nh<(kvQ@T7h`?@8c&yp_$KzKZBJ}#|uAv)x4$#s5GXRj& zL)&CC_)LUetMa;;GGOU5%HbZ(KPh#(>Kj9 zmi%Da7I}S@x4B#Lc9wiRlDGHJG&TkwfzW?bcZzsnZtMncW$@tuu=db2fehY)(Ce$a zs&428hHgT9#n40BXa~@Lq~Geg?aA{uIYK>e`gSY5>Dk$C?8&5;Sz(uvRk?hmfemwP z2PDS-6By%v?0t9DP{dBhpTpVhe^a%rW>20^)@81RW$rBEwjgsf3@Kt9;=>SwK84`x zsn(O{$LOGsF=#r|eGJf74M7Z<4(E4!6DaKSv-<#g@_d30x|u=KdH!ZVUp4$N=mQA7 zo{oI-{0JR#qgA2S+K0%EqP3RbbA*PNBDnNEbHk;Fr+X_7#D|*q3#n3kA$fgPUFEa# zDxZ>sJVkt1(eA8#B*Q;zanYOVWRU^`2y?y97EOi8(F z>T&Y?KwVNbEUC=|)J;v9;1hEvIsVtO8~N~&{#!O;XQ5I-%M z7*B!5E%>x=*@6^kkDyvZpHjMf{SQK?!WS@qHDJ4oev;KWA6c0HQ?n4|&BAmt-!7lo*c!W8HRp}O!+)H@4+U!ccVdJ+m;>m3l}O`re?KxN=n z3Cu+TbM*=Q8+=74bT|nEtJ>o@ZY~m-n*s$S-AXVA3C#Hq66k{OTG+;LeD+6I)TOseRtEw2S|$0-)Eq;XRz_% z{oTIb-hl09ht4$y7vJ(62`ZVK%Ous%Zkq|XxXEKv?}fqhpwQwI;*czj@PZZ#cD&K( zdlHoFBCqi|bTygj^u8R1$VSc1#czq{pA0$FGfxP`5f_ zf|UDsVo#A{F-ZhxGBHi$78A)>%`XDUw2dpRAe|Pbdg*z138fVh#Dv%g27heZ38gDY z3y!iveKz04b)~}cEO4Zox4{#tC@L%iD3omnlWUdB6&BK$CEdb<+bb*=h-7*!NKfE% zL@~V;q{Z(MB*eFe8EbR>QYcJlt(d{o1PY}UIZREUP+5`f_a&t-ws>Xw{mnzsS$3f( zFo#rd7;Dr0E>WnU+v zi?lX!Uu5^?HgX$6`68{>8xW8E>FK*jCU1DON40@7Z;T00%jOSAR$#d9JuDb4oP6ix z$&)5wVRq(PTAiIdjn=$gwmi9f-jwdw6t{d2HW6c4j6y)MC8temC+Eqx zEc;=7)kTN(*REYhD^_>Yh25>EJLAaS%u$5f#nH2cbMCGVi~C>UQjEiUKU3sbx868B zT>Ia9(xl09QLb#ut*x!yl(%-W{2kT-H;Q#YlzHa7Z2h$sKDWB%Ww~-F>O@eyPAKx^ zTv!%jYlBw>735BkU0F?&U(TW0=D}BAwc73yy>_ykl?!{dMj!Q`$uV(i+!BXPo%5w* zWLLX^CMY3vsZz|y4E2N5m>oS@>0qmMe|&Yo0QG5~xEbnG_s9FHznmAXLYcZ>;27#s z6M}5+Dqr_HANNCMceTm=uOf_fEWsDB2R?GTpYIHwgNP9<>#26WR*L^lbEk zmX4%x>X|Qx4OQByhIGqDq^ofF`I_54gSJB7OY!VDyWJpR)4xsf#}$Wna9x6vHZ`$y z=B5aDn{h{{Lm}gI`ChUc>5w5~FbMX^J|g9*yKusYp6W#HTY9i7uLQq`OF`VLHy9CdJl5r(seE*J-Ht zSFROsJ^qO<`c@&yRieu)m4P>W#)Ql6nZFUMEB8Wc5leI;v=cq52(x0;)KA+^kAqwdvT!r#RCn~7=2FrOxIGk_5 zsd;xuMsw#oVeo^R0=iD8t4uIji6GMu@LV2?)epd*0(>G6oq$htaCDqf0lJf+p9cCV z54uxf@JBB=vNY8aAoBdK8`DVzyH>D(-- zgGlOtr*v+Xl$#~x?pAlyG(cBy+L^aa1K@W7elXyXG+bVJnG8OY!8ZVYmj^zR!Dlk~ z%x-m;&FU_*$GY1kQrwOdl{zFDk0f)DWV}ccr>9V&9G2vEBw6RFyd0Kf4ofmeB+0ug zZyKsEt!Xv_z8dIupyvYJF3@usdM-oXr~tm&1E0&_a~XWDfY&z-^=p#j_t-OHQK2qh zJUz$H8>H_SG%fJGR4o4n_r90%@hfI{yiW637V?n=rQ_a%_flV{u944@&u7W!cPm{g z)4@njKJ^iPG@o8QIJC#!g2Rw4$l@Wd+2mgety}qMZxXGR>=B%e3cJhVpLhPdMFb49jMyvXvw*W7X(H1uu~!i~OVURu}KB+b(>V zoONMh7M8hFXqB556T)5cH^DOWui)P5s(VH2b|(T-=cF!7zc4X9bP3Um6x?mE~4Y)V3q;c(QU zQur8|XTc^BSGvAavG)D3M)LM7Y$3c>*SbCcZ~X30!mG!52IY1M4K>Ua-%}QqYjz}W z9f6O(Kb!Bi1JrwHY|TIS2Vg42ojHcpv>rx2CHDT|d%lq%9RHbJS)wT=a;Q90IB9hGTK(^2jaQaU<4 z5LhI>2_Yejpbmh7+EGDODJ$ZB(pxQD&6eDK~QM>2mCR1bqi5PnBEI zrJ!1rllv5_Kjk2olZ}csn8=x&Y*0c-^XM#2?E(eWqj{X#tc2k7-)vqxbxH`1{|REJ zVqL+^p9&gh_~_KAbSLNCu7nN&NnI?0(i$P1gA+D`<@Q)bSSGtURS}lTZcbN(YplK3 zGoLy-h(i!mlMfKYNNFhMh619QL*S6s5e?&LMYzT*FzN~8Szzo&d`e#$CoLt6_gNB+ z6=83&n*$YLzh*ZFE5bF_-ajy(U0OCG5N{fOI61f1n+>I2E6Oe{8x0lV8n4JkqlWPS zBC?ZnZi!C6iK5hK5Oo^F_KI+gRX`ljN^%bI;vn8cpC1cH5k;xgic+l=Wn)FS#w&`_ ztYKszVkKc@Nu_WEM0>fYjgE3r8&}H1HC6#}M1yz-@&1LMBF&Hvc`;fvjB^^s#qw~C zS700iMxT|~R{9Kne?#29xu|LBx9kNVL-N>{>8sUf9OLY>6PzF77l}^Ym0Rhk=*oVj z!qDe)uv#G}r1N;3{fGc>7u*_+1D<_C!Rf|t`BmKKx^Z8uFoZWkzWOKpIId5mkzQM* zz?NsjN6=?0JnBbdROh>ilYOCs6h~vs>fNwTtCsc-4^x9TM)V;qq~V$t(%zaD(mq}- zq2(OZwKny5gvI92UXI{l ze|mZ%o(v;25+2{_xW_9EQ&(q2{Ev==9@44m$OmGkD*u={6M9J34s)*|$tq=GZn%=Ql|5QoVBy7lkTBAQH z$(lmCNT1g{J}k+aybvCbX&&cG6c*)C&Eo>1kj~L9n#boH^A{TZMM+lnLgIKN;Nx|c zzDTvTBuhSO$eOuc{sDr@byDuS2jVSF?B8EkFx8~Fch5AA3~|gfxYsiSVe?u&QID;R@%LS_-0K_d zNA1s~l!OVf-fYJbBYH*B8e}pKXbLBry!i|?^X{@w)LI!upl+-yKMapY`+rzzVt|f?jzg*!c7z|dt?z_ zEofD^r0SVA$?sN=pNWG><756-b?2~XQYebe@tII4sut13G7&rQk9;)<7g8f?84AD6 z_kp>(7q;uK`~-eQ@8JxX|lQqDqya!au(Wk<_NG^Wu!u?M8`{4~md{N}WFGje7 zg#TFKW(xmo;odI%=Lz=#;a|#Ke}f_d9#f}&7I#Z`U8B)rQ-9KrNM@7N+9!t$Rca#G z8_=_%pCq$2zdp?5vOTF8W!jIJnAFmPno+BZs~HV+X=+BTm}&-MUP=>0(uBl~!f0wn zq34U#jJCjz49ziU)=5lK3g(hb?h3OLLVc3OmDxg5zFCmAUa|LEnfJ;I9e>8$BHXnV zQ{?d2{T+X{lP#J5j6?aUAQm=}<`Z4R&{uTYk1Vd<*OgI*pkSU%b7jNOFENoL{guO5 z#zg0)DddRCJ~(gR74 zF7MO^*Ikgv=pR2Whz#d~NQIf`(QN1Z2qWXW%xvti(&?V(E`W@$o$<9(BX;2noAucHT-{ z47uH-q^9c-`%+<_5+;ex2ug|gc-xCl!|s1Z(kmqQON75H`6$bYk}S+%o*mz7@(q(I z#Aqgoo^14OqHjR@@RP^SrvQ_gL>NXc(Ob!Ue7_(Ji}^8%VewrJO33bHlP}qyF_O^8 z6n+D^jh|AeeFELm7ODxRVR>|4N8ZEl;dmslL!L;=CtFP4l4CNhV(468*MNI-Ewkcb zzM?ihfu;Ep^~moX6Qlw);62Ag`E~@X*uc0lNv|79M)4JOJO>*l|Un5X1$f6Ys6zj4}mGAu5YgmOy+MLJ%>TlfuFe zqe%Tuua$|A=lugLa_y^1AnD(iZsVv$fgw7okn~*T@Z@3R2a+yE7;EzbNfVkz%?@N@ zE)kZ?)Obw|B5f(gTA1*G=xiEggmzm64k7sIB%*``*T9iFDm#$A{u8ctdiSS4#yn zXAuU8)0zpRuk?)<tQxC;Xw*uQk9Z_J zloF(a1VKGguH7k0qSQhG7B5Oeg;nDfMXA>?su1yU!bp^U@M3J%Y6A+eIK=h}tHvrI zYP6Ez|C;L2-TUzJExLhu36bi67 z#FcWZ#wsA%NdVXf51bRfUm|YU=*k$E?`Q?{?wXDdNABFmwe;Qy&DDS3Oah3%!mW8Aa#E&cq zE#$JgJWF1-oSQ2TgCQaHhgV`^Hzj^t-OWhPrX5=*s`g*SEK%F4``@bOEQmF$iLK#7 zbW*pybKm^^nD!_Jt@4B6nMQQ_n-0ZH@u%JAOvYy1U-5U?_fhu4g9J+N3ipq~JuBRAge&2_Lwv!) zjTY`u;bsc=4&jyy_YvXl6Ykr>J;vQ+wuVK(4tnI^(z+kHw5UgJj&Sc5?)~KAUH5>x zcTx;2_N<2F?JNo6&XJ*?!VE~%4v=}DbEM{@nq+W;L!j4V@MP$#h#>LX5h(Xicak)2 za~tGx=hnin``*-30gIWDk-r$(n;duQ} z^qa^<7@1Kcm)1$h|7Sf))@&qMi|XV25p5Y`6URVXM(x`J2CLHkkzq>ZzNeW@=GXE| z^HcIWi^>+16{X;CRHc)hQ7XWR6MSh`JEPLa6*U#%+b(761o@L691nF2bzb@6^`aD5 zXg0w@Gmq!jQii)uAfyzP&21`5$uC<($16An3=+>xUetsb@@M3J6lG9wo~RRNOsecn zkgIK-;PV;oo!>9|Fsi92EZxx3xu|n)GB%`DIiXA=B?YHc3`6}sODUQald@>*1S9ly zR6C6=@C8mvLGq$b#00lBWpP0IM^T+~Iu|-Fe6g%^4k2tapjenpcH-bwl~WqkR8V%W zLZ`4ODEVIG4kxL~=C5s`J$s$=nig-fbQWZ_G%byaetrI?Rzqpo(y0EW^FPAfg0?}W zYHQ!p6>ty3{mDGaPXOv%ETwc7bfPBq9&cJq6Zy`9@axK^H|AHzJ5j9f=PTde19`ww z(Y+cb}^WeRgr*tN5eS7X1TCeK}&=Pso%1v13W z0^SJyipu6_+$nR^*3i}pd#JlGH#}X|=qIz(BqIz(BqWYTA7nIkG!h7;Otkl~tmCGS}&|O%cp3w5&ZR?(zTG2X1$h(UBIJ8{d8tTA zQOQU#v8+(sqC`bQv!pV4dC<_2<5y6uhnX#Etg&WF%@rv%DweEV!(zpjHQKDSxrR%N zhO7VQ`#tB}7euqRKYE|%Ip=)O=X+kCmvg=^|1OCw+<%J|^9OeiIX7q)lwmfNEic2A z)lc5DdvG;XuxvT*G&}>BZmu-Zm^lAASc9>C^Gp*}t5gV{~^DeMa}f;qPYu^JfFy|NpB8 z$dF$3?y&QDHt3#bm?x`xI8XzsX9J!KXgc&CT5E6(9zZt_t}#ufXM>5~1q{3o6g(3> zxBSu<=6-L$T1JNPS(uDJhpa-)Z#CZ29>qJL=g+uhOGKbPf!^OVTP&T-euGGc+wES2 zELYGAno?M-MOF(dl_-Tp=3w*NNbi-l09w@Z$i*$D{PbpMnQ{dXE%WK}!W#(O8sJAc zG#jn6m~FZ>nb=sZD;UR0qD+38wOacZi2Y*_GWjnAh3G6nP_V6D||rM$Y%YS){1MJ^(!0$HCipyu4Pn&*Or)WqFq;qG}15(A}K5FdXWnKzMBZ<29XNoKZeMsR4l#)%_7<*lxVKE2C*{YQW3HR zPev)Vn+0WQu!};=DWt=2esC^jEE0(&AtYtCLIjFKXr*kW2owb`BDz%~R2Y1NI|O6+ zdI+1_FQ(c;*)sUY#6gDggMZ=`S{(dSuaKS>+~O6?4I!)fs|89<2#MgyKz0a8;K@K% z2raO20J4I52pP?np$0t!3xsP#6E*80SRj;vc0HKYH)XI*557e+UGGlbs|Qz5Nn~=9 z9!x8A+AUkTD_ZqnSU+_Kck03P0i#lP>A`y_SVE)5QvXZccuyNUSteX>^f|A66Qybk5=H3M-xG z*@TKD*}V4t^A0aSJmasc)>ccsi$%;Z8H#T=k!tF!u7RTv&&&*h?3rthzX9W>%6-{)GU$z zC0Xvuw1j%sj0msEv|OC;N}B2NRG6ZRGA$Qn&b%k(9#>MznT?Z-#<@Gw5}a8;Z8Ja9 zGHqTK=&=k1Nu}%!#^&|b?L*c-jLlP{bB%`sW5*kpuS}d_tgT51Gyd9=lwn<2a_ddT zOBO$u*HXw!*^|qTNr2h3Q=^ zROC9~wEInlRNeR8GDb#LO{~>#J%(?jk#ZzDLA%%3yv`nFkc5%eZ_KKJR$@1@X}>TI zQ9O$nnZ_8qKgR;c^MG39C0%46V|+#NL3Vfv_DC0L&l#Kl48xNhUBH=OymYHQip7hf z#~AS+Trl3)Jl21_-@}j&62e91%oyXV{D^UWC8$W6So*NP=IkLWdQikT+QB<)OLT6v}ODtW#`p6`+8dU>XY zBhe{O$7%uPZ^o>kfP|PyxW7>HkL0;oo_}R5D7B9_8cU*FM&5`EoNf!6mqn+hq`91) zKacIq6Jr8M0rKhffs^$(2w&lEh?vdq&MIaT2T2f@)J7z&723%pyI679zf6Y?PDTor z3&>lqB@m7Zy%!BWbKUzlj}XI-*`yp9qGMl|wh(DQa@rVDc#M*6fJGcgSPhbPI!SuL z;|Q2oU{jt2bf^GAlELD3uA0SSI#3DXt!C28APkap7;uq#WE`tU>TxLZX(uTsp0*49 zNRja0#}Bw@lUk^Nkb0zN>wUmQ%8|@RA2^edZ$?s%Bp1rm)O0nRFo}v)wI{tr#7TP5 zQqbC;8(aMK7hioXP$+hEG46uC#8gUOz00$MlT^?V?tt_Z^8b~|O`b_3fx{RlCa6vN-qhl9@QCghv2aEV!__ZLu*`740lT+X(M34m}(lE5jOk}QXCo(l6 zQv=d>;zt|L4ah`!>JTPVMx=pcWoeM2$s34s+?hT(xgi*{Z=?_uYE;t;8HFY%n}Tg{2x2jXmYd zmHSqftsGppZ{6MNn1(F_QQ>S{IP0*53rW$xT(NIO*^0rn`_|sQmP$08P4BSS5o$o- z5h-65?JFuP8Z6mYa(4;Sut^#cNumN%a|LW><# z?Csns;wDC-E73fKA-bZYPbX2Lm$Ea>cW)W5KJ>h2E`NFRzMISN1-fs|-D@z?ArIxm z2%sa)9GVrr@`?sq&tKD@xr~9&_-i`g)B`NPV*1T)TKMOuw3J}^0HJ>f zy|Y#H8lc&(!O5}{ul;VlGuqY1mo$BrST<3D(mSIK8Vh~Nx%JNIYY@t2&rl9qzy{>- zd`Xif7|S0h%6Tb@U?H25mMn zB;%isgUP=d6uN&qj+OqiajfuPgJZe>e~?(_{{*h_Q9Y6})@nV73-|&D>7p)xM1$Ey z9ln5VRube0G>q2k5-v85g(r;Awi#c9C(P0RfOzNu5mWlB#EvrkX(M(~LYCOWKU^{5 zehSWd0!fzo-ii?D<~^IxktQ1q;o~c zHbP%UiB}5JkP#~>lp{j+(9IN@FPI#!!0sS|xgvP9A`~5N(iRBXlF&EN7~0iN&&A4#9j3q`*Ck@Wd21B*w}=Q9V$1KmiHPst-X5{DT{`fD<@ zOAjq1$VH+kd7&#Pbd4zIk&2PDRB)|G%Nm$ogC-+O$m{iLY=DnCo*w ze@0c8p=@loB6L0Vk-2_OC}|yP`664pZcjy!)`I$p=)-+r9!8ByF5jfU#Xx14knlKN z=}?s6#Z063S7LXTAV`{smU*;~PJ1AZD2Ss9;&`P)QA&tDLZBD+#mHAe2>mng*&asY z+EU+BDa9>%E5n4e%i&6gq746~&O{_1!-cpH*=dGqpH~rts7I$NM3*YW!Aggsl!fR} z2+tsQ2O$i+>_OP85ZV+%d!>UZN!CX~kaSE0)k6v1Xqx7SEk#+8W>t|ERgqnl4n-PH zTCU{cO+ti%cN~72SsK(8RU&#3CRI25VuMi%Rtg4@_!{6yLAlx3@u%v2cqc*e^y2`vs*XdB^YvUt{^#$-+& zW2`TTik*hrr$ec=g)6nT2yb^w{fZ(^ZPw}_PoBd`k|#BIhj?Yz4nd}lxY!yGH;8} zFG?>;C0(~35&R`wFA?plLiXi(AqmqNT&J&s=*xac)sQ62Dki=SnLbE#z;gk`=q<*z1TndGh2zn->ki8I}C1+CM+`^_+i2$M&9Fo@UOKvA|!$O(pR9S zl?7_{S%wPKT=ihyBtPoEfaf;t9CNj%RT=eb(xha~-gr`B+k7l4+^D;In$6f1#y{S*CitzyW7K7&q$ec#Jw!q_#)%guCiyjt#l6PZ z95*4{C<*o>k(xyxjmDbNWuxrolVgoH(i6t{*|2sbwAorGMA-eTNeCK=7Xv67Df7i@ z)4>{lyE!7sSa&gUEXTa~NUSztg~=A^5+m7km2uN6Sh4CZ^|u-|Pgq0z+96$&Ny=@; z>5CKW=C~vy^pb>e<^d^uGZn8ge;4X)RtVil^|r;R*o|TlD*4icE;A<1rl=M(ab>BRB0U`^>mC2lU0@mI?8b@E&! z&-6k_`8Lb*{qp>XJpWRhQ%(Po5y3Qtk>P52UMA1$Hv}#CKE((mfE$ zfo(8QR7(mH@nQK9#HEjYGgjn-enTI^sYE*+>r=2~T%AhtKEkg~28^JFyhjCE8V_dh z)5CHJ5hYnf&O+_!%dC_t zs3Vfd*0Zzv#YiH}!o^7X9h+u;GNdivQu-Ze(vw`Xp9C{aY?|M z3Oo*pdfBk*U`4%5D6kDbE9zxJy|A=3a2nsXr?LE1Le2XPI0G7%2@($s^phup0s1J$ zx@>=#06LEFaR#CW@@}8qXdiD+^H__P)_%WT_Z$tw0y5b5rI6wq*c}1;KCq{yzQYI~ z9+v(2bPsiuYUFR~AR6xa%r7!Y=xQvDdLec-0yBVOM3@FAMk>ZIDMML#5Q?$O%V6#W z@G}Q6P01{t-XxUOUk$s0+|`+I&J)otTT+(;f{2URKMy<_;kuBI%Xq4YRmwbh{nmgP z>zBDQ6gx%~j0z*hk@vU}uBY-Gu(*SfQjAgGi>B{E(|4nld-2nI(DdE1=MN&{Aex>m z_vgw?Maa~JOr6Nof%Go?I+3SC=4nT`9eIkpit6+!Y8=p<60HzuZ9v-#v{vM7BTpWC z0oN+wb|JhAaAaOQPG(w$OfAUNj7&{PZ^5q_d75ONoe1wl9%?PmoRMy~BnH*J5f}}? zr~`c?eht9T>m*1mB5DCbbytk3?ls6%jZ9TYufeYxnW|)-a)ir~N7bFyWhSmW(@L)K$9Dazv}L%pFFag$26}Zidb!O zR{!HwVyv3eXmM9GYjWztd_{v#49_^(=R0WK6*I+C&tepD7Z>qKE@BH8V;2|kNuA5s z!ezwj;;AP%@d+*?4?|hcB7ihA$m0ys#B|LJ@;GBOxiNmiX+L3%BGgm06*c%y#@N9a zjiA#hiW+mdeth(UNTdNp_hgFL_>bxha57!NQ;og3pmPP>mWM1z~X+LO96 zS@)VYstLsmSCdH1aNh>4%}c(g(bK}|TAXJDpBS)U0G~K%!2mwd&vXNzLkwPJ5TnTfeBwB#9cK(` zPp81p2QY$99A%Ir4ARGhM;YV@gY>yU4s+UJ1`!R4TWkO2o5cX-20cf6`n2GQUgoLy zFw<@Z?q#Mu%(UCh^dP4lWTr!!@I)7bbTUQ<({(XMCu4NDG1@t;oiS)gx?503?b{e+ zFN3r)VH<<&Wsp`k$SzLX#UNfy$Sv5y7|o2)#B?o;(aac4Zj7Crwv#dFeyP**+&ukk zGrIsiu7>3f`Ka+sD9r2=jm)@#8P_p*BQtJb#&vGSwVYPVjHwmf{g0V_qJ}}L8KjB{ zYZ#=OL8=&p_8!VPt(-xq86^naN>6NLj8eu}&vY9Zqm(h$y9-jnX(fzNn2Prw)fY4n ziy5SdK?<3$m_dpdq|gnrjMJ7e2sNYHP{BhMZ;Z4hRD`qI{_&(1%G6~lRmY7oi~SR1 zp*~ssF6?>Tpm8nUhOwE$uVR^?!V3hpd_IORn+fvuD>L1hnrKA?+HTndN_)L+7{lZ(=g^Mf3r$?fvXj+GXnaOw4?qn2UL0=JDjq=ZU$PCuW{|V&-yME>FyJeF-UCJ%@p_ z890kG=P+JD03FwLz6>|70hp$YN zt=*JHBFS-BHSzu)T;bKXG|JCeb5U{KUGoWC^JK2MlWRADYo5$Cce-mH$7yl@bE{vt5moplvIxwx@;uNSzjS`bxT73K%_EM9NOa*DhmCRSEw-beXr0m-npGC3f@pQQeTg~Ti&UL zICWVl8)lVT)%l^-#9xN6a|}`Is|5Ev-e8u2T;5>j05%J;_lzB88QQ6jBmr$1YNowm zZJwxl4($xjdxFi~)@O%CQ5j`YR_L$XAq&hVg#Loc!HHyIAvBSK^ToDbn;x1$Z7+i@ zdgvUl;9fnH)~dB!>RwCzuf)FcVFXSR#;-rNfWO>^gZ)-v8UZF%#l~`@?ogz18x9+J zVpsSXpuR@P?@h#dwcJdt(&esjwJvvsYjlUAl)IQPe<=|Djoc0kwkoy1+~R@gR~w<& z<`x^v1Cp5sHOU!A_TFo+^2ShvCA#0akSE*C}lMc1A%vA`>m*u z4eQ>pG)jg9WJS7FDX`BiO3_>CpmZXYr8uZCk`b3l5DT<4oFqhtg1|nvfat1pC{hX0 z4hWsgaXT_@CyeX0J3Sb!3IjXc0;8?cp-3ghE>(;tkncr;SfbJ9uq;NCg1|<%fM}_7 zC{ltTvlKfO#wW-~`u}3aRWie_M1X)NXZe1-`BYsT^Mi6~r#Y zzd;c9Y4bf09SWkeB1{)!w5!6QXeCCws!BgHk_lMte(gTO5E2-zsw#U`RoW^Xid5EQ zmx4$~_Uj3vPCMj*Xd(!Ve~1bwjFt+AqLmms6~?p3-%A)xS_DpNY^Y*1D2T=iha!~_ zwF=_j$QK8BaqThf1_c58$W;oXT4B^wI25hKI9)Es#th^yB#g(k9SXxz-(RlAM!6ar zv#1 zB0r?)${dPJX5U$6Xlnv4H(YOrOfg=}igFrNu-|Iz`I9}^XrGxFss$NtL7Z?j@=!q> zO~g$_|H51 z1wFh>G3P016KXU)kl<&$w|v}H`V8$|OK|?53Z=c8@7+PlSN^0Q=B*?)m1DP1>`!p8 zUPK3finUf>g`>gZATKTRzb?mR>~0YCe>~9T3^E+?5aEppC@@ zc`#T&{)*xS=-SY3CeRKg{ zbh2!{gX*TGh-AwbzNs}bl}J|8;Vwz{sV`l&AntaQ}!dIeCbWy(LqIm_sD|l)N z#`{t^h6Qf?zeoD0L!tn($hb)QEFs$;2ilOo7i^-#gF|gz-B{tD;)+BsiNQsp>wCBs<}Al;7<{EMPpW`e}dl|ND*et^X^ZuYemM>K`^|%e)v+Um{_+4h|=ttNc-{vlj(29p-0CgnGa7i zcE4_pGzuv`Z<5KBWuyd7P10(O6GYyMXmi~pVQuLElK&>GEtO0aDu+8!q05D|SL@{$ zbWz2jau{P&9Zm3i4tL!;P5)oXblr~cO_Fq~lIQ#6d8a(TD$hOgJOdw=pr2;S6&I!g zc~-JqcgyhEEu267`9WLg{ zH%iCD8h*pY$dUguh<8nZWS4RDjYPYVp(C!B;+p>nk+0t0Ot2d#>53$=j0`^rgmoi>`&W!Sa>Z^B0)Y4JynqpN{py&%vY$ST*M%Q2qb z2D!BSE#TJtF3dvp&|zQ===QqC*aI)X3nJl7H2$wXJ}R(S21|^vUqC9XD+e~)ZTBKa z^i|3Bz!*H*iFk~W7?=Z z$*+7DQe|tgJXR4>no)p8Hw9V(6txJ~BEBJY0sEG((GgL^!a2pMhf!(>`pqSG?%^hq zyCZp=37}{k8$O1>!i$xA_J*X1z_YvAdANlzHyhReyVcG-gq?}mS%GI7hTUn_I3k-Lm*q$bPEFP?&q zA5Ab9O(U2Gqv_)b)A(=Z(cQ>%Na49sg{d$~A3FMJVAC9N=@3=S`q$fAX{(2%$RK^z zU*1m1)jU9|_*l-zjmY5Xy#oWKL&EEagh|fQCFhoRCkw$Nfuz%>e|!jhH^cV;pd0X2fG_ugKgjSTE?4r6=sK1D$PoArhVKMG z2jI&AztIc6o#ES%n)QwFgnoDkdMl&vMgG^??7TuAvF%-8Ci5z8JaBukGNk zScj)!5Box9Uj%?cupinr%NRZ%spmKFgs)EzdLE-MM*ci^*LXeuav44c$>-O2%|p5- zi{Z1Wc*Ar}CZlH{)o0l1^67o%EoJ8rco)N`1Hg42T|@Ui@2;7`>?cs+d}fU zKHzn`BPkT$r`j2hA}-ufFgTy4edpLTufp|l;f^409||{gKH&p92~xOZ#o~OL^_^pv zctLkFG&xo22J{(^ATBgHa z@B$T zNIrMt4O=6yiFdQPY}LC_Wo*Xf%olY1J%I{i)SWgjFq6lmy z=FB3zdI<0To-wRG5f z<6Pf6sqP7@KK46BtBB`+xM{Em%~IrUmT%cA4o|BTp;g#y54DQdXj%^ZhnpI* zn5=Su=JQoPYL(AIl3lw=eDH=;13w`?I2q!DFC1+hNtRpLe!dA?p(I0ybw!g_kHz4p zgbd*&v@WdK*l4TSPs8RYY|MO)NXv3s2%eb-db8DU2NEoql&Y+?#vs|kGJZ=+iN@wf zmQ5i;I1iaUGK6agYBn8&;a0MDDh#(;t^~bq$ym)C0)i>GW~)UyoRyOS8Eh+VU`VSA zC$`~A@?QQ4IGFs`f=4P;DYqCD9 z)!`IC;)~WMxIx$5=4Q0Ri1U&de3R_L;7<#x0zV}&c(O9+77AYWFp?mkQ5n=gK`AkK zyfWx6LV?kANW3v;e>$+V8SJ}dY+!k-(VBS^w` z!R;cp5RA2w(4Y(rRI*i989H4_ zR$X&+(NZ;R)-^{2V5l{a_{ktFvp(zcLbH?JDY5c%9dS9n=FdSfvM( za=Z%G>A_nmI8Vq8-Vc)+kN-Yk<*;U5fBK`zqm2IPQvxm{Q<~)1nRe{E{OIB}j1BDA zclpu9LHw{|A4lhIzOIO)^PAyp*EL=ZB;?~i@9?u0<4|Sn#YXpyWB%Y})e|nC*%-z` z{dG&oyw?j?FZkYq1@q@G6x;G_yOj=BCmnbLUT(eDQN;Of%Wo-IaL*#_Q6@cQd*qH4 zR}Vc-&$6tAk&5X2VkSV4_Zc6oUr=DVGT(9lJL?Cperkaw5IgHBWaSl(rompjkq&&d zjjqg7N1gTLO%)-id`~*({YJ9$qPlR@O#k7Z#UKm>I=NsD10($B&53%3d#rwT|f$X|^_Ul=%W&JLzD+~L+_iZyzgKb&t`#!9hd&0$*uMM^>#tW+( zyya^h58q1M*FPxMTxjOQG!dJXUa2)_*47~@_bO9 z$;BYWe(4t+88QeQK&PNVhu*qG?l)YO!7>>j!@T*e29V<+fi_@?D! zP4>cLbqhacd$P%F&%$Za3Sody3&Ih4XgHQbC#Q|gn{LEaC)vcm47Lqwjf}$;pWhwNQ z*uZ9HNwK>yk*v%Xh6yXP|Eu_A?D%vUS_;dclXazMBbJqxrI4Z7v$68cN_J*d^V3x< zlx3+Z+H{i>mSg7%%dwt#)e6)#h(#OXs3Q|KT9KErS&@azGYVU?ZsKpvpcKeC+#T&H z)cl>?{GBvPINX+~Q)x&ilLifSLVn5xFgmR21-~<9@;wu9s`Iv&u)^#KcMJ))4+*z% z7)WldFf0e5v%SN`DNvqLy`PtI5SDIBQEM6)*>Z@G_G%W&TcTlkKMcj-1xc6%(O?D? z;VQ{yf`)5Oqhbb}n84jJ!BPMNDR$%ynH4s-W3V$EDNxp;<5lz0@9_ugR_8#UKcvU#qg)mumf2N-o@}PhId)sqQaaKZ3A?+EL-BXESpKj zGcqO14$1O3SRMt-46w`q%M8gfgIQ)U%i~~qlv(zmMj6a9gIQ)smZE#8BSm|bpbe>V zSzc{;7@YK8uu2E3EU-$Kte`}P+GR1T!(i3xu3Z+h%3@Yol9d=4qKgP#wcSC$cLCi6 z^c#~9q?Ul_#B4MVfdUOjaR~rSM1$*?zU@_ZPyN#ZD2VCEc3u}iew3O zLsTe_S+;{?o4f7wJZ724Eb}BwF?JzlAsb9}%`U*V0Dc1C^8r6W!sj!5KEv+U%zq4u4rNSQ$kaAuin!Fv6tOJ5>>7pPzULta*(M&o?KWUx zB%j+epYDI<=(C_PXh3;yTlmSF)8>6LXC4F+rjtMd?R3E|@Mj|}kSM}+dP?In0jI=} z>Jtbwd)iNg-9pvF8rf7F?TcO@oob}0^thT~; z!v_oZV=&Ur)&!ZIHmQ=CotR)?SD0DM>_9ITUYwwDO8Pil$GO>g9zLDyu$vw``8<05 zh>e^MVd_{%)GIt##CweA0V8fJVptW}Xz9$dYoDMHFQ>9$~dl=P{tRt;EeI4!yXH%wW|R&+-w*+{dx|04Iu8-?HHc)5Lfla z7|O``WKIso&}AfDL;H!*vXf|QFe2sQXM(F}XwO$K2%T(R+0#dtvUTMfQn2QgBG$a# z;5Dzh`%S;eA^AXlZ?$Uh{y-X6Cey`ct)*r%o^aNvS~J2bi?Wx8Lq{L{+}t*W}Sr-YuKja!k^a4 zO#Y98LiZ=@!Il2k;aI^dV&(o{n&!~*7%lH$d5qTFpkiynDd00?gNp4FI0YP}_=mNp z>6$(%{F<}_xVBldkPsMVG7im%O4lwlmNq(PYwsA3G&(OvXzEC3njQgixHqPv(BF1m z0Yg;S$B5Bp72yc);N@X&QgC)VNU%;;9yUn9IU*H`O6=+=TckpPiBx{ID<~Cuw_&8K ztj(oFtfGZogsKSd<>q=@m`=_)v>ZVi5_U6%t`Z@;;{b(n1(VJS2q7c5Km)~XhIWHHiEcJU4BHPO%)QS+6 z!(^yh4<{?li$q#2LZFl(=$Dd;w04as+%DZwMZs%Du)QLj%rq|+p%y)ybbYTAA-zry z$GY0}qUqr08QQoq(5yT9r~zcKNq2lreRTtMm8Jes-7%3;^F_`^Jz@=lQ^1x4gSEe0 zk6MmuVA8J2Q8j$gQ#q=fFM2B@C8chPVsqqBU4t$QL6GfZGU=)HHF_Z06hw!D=&X!X zloDZp5dH=P6Y@=?M*if_gfIf7hI&rrD4v$}t(BuraUu3rMw&?Pl}MxL!(QtR(WDB|Tp6h-Wg%)5LKkwA_^x*1`yPZEg;1vu^oGhvMJgfc2!iS{ z4H-)b;@?dKA?h(uA?s14>QP-8sVHSN8Wln#^1Vq2gMalP990PY6{Ajx_1u#ck&0A8 zGyx)-3K554z6?LjPrCpoS&CkT(FY7}%_9|&ic~_h03zli+*$2d54{$7V_yQLHid5! zmip6`v9SCNy=N6srJG_%!7~fL&1aCGWO5JnK&2@r50sVo?Qv6IB*BkMY88ed@R%x4 z?#AyuZ)&<5Tk4MtAwODail(uc3&HOD@Y8P4oT!Kz&lPe!cUQ>q+*1*$NM$FsqVkdB za5KxpPgH!ZEZbqpjKeU?T;Eq|ycCmAW88mm(v?P5g}*I`O*V&-$!6p9FGt5(VRPAL zlsq;i5h`Q(RTnyA{KzVEjK?Z-tlKK{V?UZ4pGG}lLRD!6y3Ilt)hGs5pxZ2Tu?;_3 zfu=LvaLuNQIO9;XEiOsjevyO!yu(W|Db1vJ(VVo_YwdaSyy*XU1$im@;CScv^^>s1 zJYwF*g^j#8boyr&`_Mi#Qm z{Gp0?P+%TW;fB(Axon&H&%rjwR@*GF{RvQEo_QXYY4f+ zTwN#3jwwHj(H1&mFByW&0|N=(sO0VO53uUK{C9mdmtw47nkIVmLedS1>oZkytq zWBlqGe}|FqulRW5>yTKRQRPYwGVXiDd5tmWLg&wni=GaM52S&?YrV#e?f#=iv{}ew z*bF~j-1Tyqe)V(DUF2M(nQMcL_wTzPNgE4m&(3jv9mt()Y|e=b|529B?%z8W2L3HZ zG0|?$blX!ixky0+60}C z+rF0>Vf^PW0d`=9_63a7>_*D%Sj)XKjx0T&SQrIk(1~sf&BZA6bwX#yIbuSWc{|!@ z$D~N3Jl$FB=)}!~%rt*aXDnqWvzg{f!(JO}H_ESx>NZLaIx~#L3+;Bj0goP9d;O_A zlNA;U|3;pFFVAZ2_LvM0$a4VAOVE#!XWqU=I7NnM%5#G}|5Tojit{8By}A$py_nEB zMn1a6$g{^3^Q=iRSbhF0lu#PUP&1oiZX_q@o$D`x`VCoOE+(VQthzHmF47wBo@;5@010#)$ym))yBzmg{(KKUoh4V_IaKr`B`l+Ns9f)vh7m!L! zOjK(6WoKK}j`F)KJv{^d(l4GqL8s3Gyx6AmX@V)n6ltpa_3zK>B#q2bW${8~b|St= zhH;4|7O%f{nfj-;dkkB_LNZpaL-5T7Esqpoqxa}rlc&zV*V7brlT)qW!*|O-T#V8r+zp;FyA^qi8@okz1!|P;OLV@<9&-J zE2PhS*mH&$9SOirz|f^Z+0X9cvM?*Mc~eIiX3gg1`&=HRx%i;Z;kA2b$^e$oqmfIe zO&F3U^mP+QF*X24d###ShlEW$Q>f$OQpi~xjc}S?wikJ<%ul50MPgE;mNr;{WidlvJlsq#E$a<3wL1KU!3 z9mm198%rEgi%~1kUIev*su29V4eLY>mDb%&1xIc^4&&gB&h0SHQ={P>#tp52=^I)G z6_8Hjbm=t?X6A$mIv2_>`krbcmU_ty8!gz;(ymy#BLUfSIg5)+8QxhOZ5FD9U2>%s zPF~uEcLC>1dNvnuNBnA8Telo^roZWy`7gh6wc<+A`RD9KGzQh{(`feQ%TOdSEiEOb`MhD!a0Of z58~>eE|a?u=tA-VoNb)kfvXOg+K%gXr0yp_jB=nFU;f2;=o#b7x10|11J8ubF}^$i z=W*tfx|y!`J01SgAD#Q&kjty9bQf^)>Z%z^W_phFBWj37$IwJsW66H7?~6 zO7oc^)a>EKF=Mb~ujV{9L5|z0SIJ}{Sqh%O2L6(H(Vxs0(ry}A3Ql$#_;c!iz1A;7|Ql>Z2r^>@z z0JL+3hq*VOiCs@KTis-Hc?s0hkVU)%`nAg#_*y!c+rbXzqUc45Uu>j%IkG1930_@2 zfApP#4%kNtmr%mYm6TxhJB$SL zDoUNTkz)dm6Nb&Ni{fkncOxX%KrPmQA5;Diq*x>Li6A%snUbBe>GDmwoKirSb#!^* zT7fr>fHWJuG+S&|dMCD6t-oe;YXMHY@EMN_|9Lo={PRJf`;(!(O8>8rsluNYUCaH$ zky_?Ye)F*Id4Yy+1}uDjf*b)K5=uRLT?#mD99`&4(w;Ix^02bG(^#12oTFzU6P7fI z3H`Ov_c#8u5icV~n{_pgmimJgBiId^T+-~S81Xix&Jn4d6(gQNVKlj<*&)5oT|ud2 zN{~b+-AkGy{z{}*(n1`TG)L&SQ)13yCJh-uD{k6VB4ihS<#H)xsXwf|&WT`e#mJ56 zSm3;b6Q9*X%GT^t67}63ZS@7e4xxOfLKbg`}!NSlv#9bx|n}c}* zFrU4}EfTC-_0WG3{57*dZmwS(deSSD7y6}FC^z&guTTyfAiP#&%Vqf?RzRhzo72AeiElXs)z0-Vi|l;4>c394E{h5 z4e$yMR@#@+k{UVeBll_WvX+3asIY2=f+@a@d;y1ZC42#gbBZ*)j$_#29Eoqz*H}D$ z@UnKZ2LhJ(1OzVF-h}MpJAYh44K)~mmfPl|ANvfM92Kk(`Q&qZ=@qNM=qfN%Q zoNNu4;uBSY&pA;Q_?%OuvNg!(97CK$c3w_R(AIe%V2Mvaz~`KR*jee&6|KY|pL2Gq zN;EQ#!%s`po+b>@8ZgBtssf*LqAKt?r$}W@$mbkG6e1s4Ce$WtCp{3b#3vvIDgc4; zkJZfzhoY4j6LEsMUuQmlB+N|qU#4$5N`bBh)xvc8cBV+QWQmnu`tVh&%y5&EeJ9Y$y?W&Lq5dz$;GG}Fb->MqaUc80UMf)79Z@FUw@ zOD*?d8T51MsBWt8RQEe!b?I5Rr#g?Lx&m@kCze2GoZV5~gO5El$8i2CKF;|2EzWy| z@u9p`iGD++RG)4flm5`hN#8SWS?63w&gqh$3%b>rt{HhRTcvk8>P=tobRF!S?gp#3 zce>|ZTJL;VgD~f!zl8{YbmlClQF$yX(&#RpX!kn~l+nC^X>{D~wEO2dF;uKZ=<11M z{Q{slkzmZa4<>``8=Q8(aWEVwmNB!gfNQzDWVwtPZWJO}+h`nG2bs=})f4UJ)?{Pd zYcM0!N(qfd;;l%quR%gbGA(CDK2!?47T_%tqOpaP){RU^Gx8|WItruv!N(56G7_Z) z#0Y8CCQ92F0}HLjOC@O$#`DdNk>=iHTIP&2`jM#ZHEvpe!Fa#FgXTlA*4Y+sf*B(% z&6#XXfWt|#)Y*TBv&)Q`vhPmk_k#}N21cu#r_Dy?Ka)N(x^GL&Hwrg8v-Clv(9#=i zdGnH@JhR#e;xCoqE9CiFc_wWSqQ6z1E99BAJP=P7r78V6d46A>=`E7tr{5{As`3%_+Lr0fWFfg&?m zP$<83RE4gz9kC)dJXnusjv&;rDl_d#So2zw|a-V?aFQsF>R;RE5k=Z^6A2FCLm#<&)3W=>8B$C!gl=$-Eex)K zGk{ZYj8wcmp3W2lzjmj#EGOwth&AIYH$Ob!l)hNXs^&pHX|b2As*+Azf)-hZuhIOp zj=@*(wT*amNSDWOZW8(GLWKgOA0oB_tUk}qm^&D6jBMc`UP%#a2yNaLfYb4k>e z$9n;K*E9CX$D$hhyf49{-!sBhZ%^f7UBtzjB8%08VomWXRudPiiHkLri*=E^SWRM0 z8i^=Zla%9Cy{$&L>g~zQY!Wk@Aeps**#s|UEzGQinN4P9libXZ1};eBqi6#;|LKYC zePh*6MnIUJ?rrMs&lGTq_pd5(>rq}CY2LTsc1mN!Gf$f2HM}+sX*o4|#&c!H>0Fy+ zS({eWCfTbttz4T{uFZI^%{ZTbLmJp1jgOw;W5R?~%+#1jU}o{mEKV}(0JAu+ighrr4oDJX?k6y_ zcy~V`5p0miN5M>uiKZcUfYHn>mYGFMW?f(w?ZvE%nRRi+Ml-KiH!mHDV1qqnCySc30T-GQqYoxoZ zNJAl!#>aE_csMh2Ff+Sk)(c*CFJ8Uir3b)aBRzV;nVG}Q42fWaG(P(FxatJe<0F|_ zC^HL@%=*AA#EV%USFDeDjbvV-#7pOwLnML?68Y%cf_Iu_#`vym&~fctlx`SH8ZPbW}h>&lWt~60~@6AQ805q)g|99OnWal?ALp0grkW5bk5q4mDiBPq~1{-31h`WswG%9FX|- zvl{X0?)?!nJHpKRB(qvD>+@n(%gkz-*+cFhmiy3_LqGol>?0sf-*j+Q>w-;$(RwpZVwww3c8)B*cJ{ZZBpH z%&dW#z0J&e+{}=M{7B=YZ$Iz8-Ck@NLkl?EX-S8IpI`p`EwetEGwb=~(5qU${}xET zQ2+0gA4ZLMk~gOP7+-MQ@JUdtTAq0eD^?+cunN=wng&T9qf426T6!;*DyO|C}SHz)gY>t8LDtyCE3wu zDOtMhL0nIo?}rv{U2?Sq#_RZ{rW;iFYJwQaZNH$eDDg_uofeGs09~mPi!}`I@0;2_ z@je5w4t%+hx*!y#ctHVd20NG6Ph5wUL+|%QsF$6)#=eEsH(YW9};z= z?*dwi@T}_6dIxFl$0gGO<#B%3hdd5iPmTpz*A4_tZ`lLFmQuR|dSoQxSG@5nkO8L+}5cUPai+McBzj*y&S*p)*21S$dAex~uwz zPD8O+2kBP2dGYOxR)}@gd@pj@+qvvgW%yJR%HHPHd`(>TCNBGn+!IKFh7Tms_<}4$5Y#cpzs@-RookK z3+20kce8f!V*4tVOFNKe3>-)+c!nls^(rz)SI6e)ZVbgv7w^PdHSA8pz#29eZHO^$ z+7c12lWjU^y5576Wj}W7-0Hb`v$1u_Pm1sppafGO3!9Sf!pzQZXp>e-H(F~SSWA)sB z(X~|1Z6idfp8KxhXmnnwnS?Ix2SOLuBy@3)qBz<#w=Qm~(0PC^F3ALG(}l)p!^W@| zDVQn5zv?y$P2I~yYVF3bw+Lm1NUhlz#s&muQYz`;pG9pHcILf~^eY2?bjj%5emf;E@bvIqdEbNv^S8 ztkmdj+9VWXS)&)uKsPyd5zB>wupWvr`aR(tZ2whmH#|mv_sK*LzWoXAL zQl;HVb$%6D`|*1WnMIwy5_LW)>nww$sY;r(Mc93B#!p+M9r2XdOOsajsM0E0S>!hG zV~lR(x049gVvXbkWUafDHZBxWMY};ERgp@F4h3;NvOh!+-_zE3Ald+-b1!r#jLwQk zMJqA76voTQZ-xkrR;WGY!Dvy%XjKqcfGmxEhceRxoNup6r$Omtu!e~+$ z%@vV~R$}xjj3<%*6T(=nrJ+Q!HEI+@oq}knh*YE!qEA6&LA$q#G<-K`cj_LDfpVo~ ztuU%9A{DK~II1vqA^&m0xKn%H194PA^q0#{Iawa5NF_u+LC{d#2!+Tt9S7}4+G)aQ zK%}LFifU)WIs(1joNQL5G@L#RYB}6k5r@* zLa$R8D`CLl3GzPLqS?@}vKWmDqe)>jmq#j6iP5Ma-b8i>0=qY9$GOpT4Q z$R~A4D=}IX#$3DrZNpF7r$wNTWifgcMxVksQWmL5B}AKocm~=3MG*V78$1wQ3Zk1K zX#Vw-MJif}(V;Nn;fwYAH8xZ+niNEHS)?MB5WNIJv+W^df14owpe-i| zG1+SLGCAAo%H(WoD2r6Ia;o&HVwfR?Hyb~#TYJJ&jDbyRY^Y*XmqjX4S&X9!VjZ&Y zCWu4YF@n&=Y&)tj`ZuY;u_;o~N{oJBM0X(Xr}#x-sK@d{_s>$Mwy!dlpSmi11ojO2 zK^YI_>MPEm?v>QKB0miBi$J;zzYT8k!xFq(lB;kJsJ{=&TKpb6gSu-7HT=a#*Fhut zMg0EYrj9i~jrR|XzYa;x5eRpJyaqCj&*JwVH~CB=M{1j-R^fK}sBMkJaK{giv@A?2 zHDgr6_Nj(FvMExLqG4HZdqDM0DpWp7@zb`L@9|)CDU5D~(X%O1k;=}g+9b!>ab&+J z8W0bfUnK}J&e}G~Vb-xp4ztcpkwmH!tsG}Hz=*yc;cEO&BD3h=9kSxBvf?Vd7Zs#D&3S4ZbnSBh%u^?E{L>w8?AsgKiN)>#v?=7PHwXy zgJ}}JLdbH3jV`9(2YKyiI=lF~BAU*rv1~gzNqw>)AOCrW$)a+F;n$^3evEi-1d4 zJ!qco^&!rV;nQ_1J3AhP7h^&GpAGZK+{Bmeh_5L>IXuqa$gX1F30BCD!KMWv6R^kU z@dHPf?I)kdtKst)COEc9pU3O4#O-!^Y`HJk=HxIP$Up|2EuWOmqw@lM7Ethq!xH^N z5)p}y2jnfol7Fr+@k&adU&D?DU9e$iH|HzX9<*l_iKlo;T5B5sr%(I0!cTHd;JXaYN1Uj0tNe&K9cOrk!UZI>|7 z(s=;XB*%DJbs+t&p|6J zz}P>Fu$vcW8@nm`IYe(Y7NtNPqmbf@vW>4OJ~IW+N1-W!Xl>DhiMyeN(S`DKUJOsc z4`O5Fp_8C5$u@rSMf^A|+R*yPjQ3l333S( zGCY^gSdN%ye6R&Bj~k)K5K}MHNTHAN?v*rc#vyY;lrdn2i5HKb=HBBMIAiVs1d%=< z&ri@9zbB2&S3^;P{5A(h&;uB8(Z(bHgf7JmGFV{z13@GGPfn+ie<2hl$a!-h+1n!G zWaG9E$tChOxKnQY0~{+yyPY?;xt%vR{xQzmdGqEk$4KYREdkKJ=wav0e}=&ta^7ql zd5D}#*CU~m4$;4WU7CpZ0M9O)Yc>PQ{ z6CF*inTvy9cE;nl`RTP2q~qpB<+#}>%9&`t%;T+D0Dghje`>t|yy4P0n$BPpC(jqi z_=}CFJ`0SRc&!XBm*-MRwo#rp%lLZ3?_^*?%5P+_TPF9&^LsM>AM#9`iL1Y%jeu9{ zD`fC0{}pp^TE|at*7Dl5#vC+6rY9r|?*vZ+!5@IQCc#gFG9TU$*?; zH1@*bU`IHE(LqYMtLdYsd5A)OI_ zIK%C6maW|pOKeSjWoye;>|2947b%JCU$K9!X>#Cu``0Xu-(MnBLwa52KEwiN|BB~J zHm%*imJ~vIT%-_ER#a9(${=M$6te?csNIN{6?AE7(^oH65cH+29G&!(??*jBc3JNBoWoa98h$>nh(z0*lfq<13b?4F;L%QV7b4E=ur@?T)+ z?vnf$AcRr2PMcn~vTPlTee9XOj)XqSRwjQ_ODT_?XFAF9ZYmG>JFxN4Y!60ZF-XA{ z$}O8!4F z<)op~U5k8nHwS`kXY)nZ2Uqh+`A8aWrd1T&}K?_`HzZE;U;$8P<`+;Ll zxAFV~@M{OP0G%!CA2=3A!@(6xo!}f@Jh;+3v>(9R=RH1XNh-kLg8-3hbn$eI=q8*8 zmk+KJ!|k#X8@pD9Gv!lostkw9j}MxXK8Oy63q7Zld7uL9_o3JOZW}H`ygNgD(%>!M z%plH9PZinex^}>tDT-Kt%J{PM;iwN=#`9t6Q$(LS`7m(fpIJm3iir8&D`Ry)9l_wJWCtsKK#qCdlTSWLxnk*tgz+T0!acgY#*F@52F>sd>|NXQX-%#yd90<; zzkl5zx?n$UAnG>qsLxDyCUuX@xH)4DB#%rP(x)BGcF(;a9u!hG$u!5Hc<%*td@wgnfJJa(Wg}m(%lK-sgww^N2my z_m!0luE_Iw3)sI#KH2{JV(aelKD69;vTcOd{gm$B%NbKf4jj*9@~eR7T*r!zrfJxar<3s z;~8``qJ7?Z&Ua+c{l96@Jj|5yfDauRxQhw-A`|3`*!3md=NkFF$J5JdIAg41Je1)^ zR<@!HH?o;u*jaSwT9+|!tt**ihxT5o99ag?hcK@KTd@F-HSu07kk5NCY<0M9*8JZ@ z3M6pGA;E0+OXpL-blP>jm#&o`%lAQM2}875`LQIc=azkxTlulc2>FnZXC<}$%GLkfoi}(`LVnnM9PmPc2P{$CPV+iIYKAb0oo;+4LRs< z0N>TM!R$hj$|1-Xc_Wr8N$`#|D)||0HUhW{^!mNFnl_|sHkXsrIeH#6{g9@rNW|?ZK2#QYraJ-mD}HxTHD+tGjo$Ix3Jum-E3cKt+2IT zEGk;u-T&`-&N(x8hC$I<^v=2Goag+`=lwe8InS@NDug%yv}q#tXjRBw@=h1A9aSNp z6G8^XLfa=~2l+B7lK3lElBi^}bcE`pWue$63qpTJzS$ySekdv3XjclK;IGUP9>HIE zmGI<-en}b35x$(zUXxGqS6&?lBvSPW#cTr%&4W7asg>z?IGh@c2Nt0L5lzSk}zFXo zFX8HoE`z;soAd6uL{qsk3)8;NQAQskU1( zZ6h)r(fBuX#@e~IO?oCac+c4`Dq)`R&a_2vC1f3h`20-U#rY|TD^tXTH&>2eiZX2z zGiN+L_whUcU8bhZX991iZG9%%ikicXM9pzsrY&s_&r6dv@}+Cmt}e4IUJ8vh{G`%P zn&s9hla0MUJ>O--4T&FP9R8d0LQ_wFIAP-C;FY)CUUt>$qGjuipG_D!;^7(pihSwM zL*j4OjKrw;OCL`EbFJ@u_FY?|<{7s{#lIwIBxytqL?byfqFtl;<{n{b+&tebXe14u zZ~iPg9`nr@vOM2B0rOj-#;sptKDiY(ZMp@GBu_P80%Zhdku*{cVCMJl@QUf?thhjD z@U}Sfd~?7|+#>{)jQx>(L)o@cNmLbcgmUPF02CQyJw!W<9X)UniXTLzQ{f{U>%l%#nf|f%xIJh*ZXio z3k*6hpcd8g%s@M*jKZbahRHVZXSX1srQPJGcv2-1e@=s+^yz`#1rS^S1F>Nrko{M(u#=rCrct-1(mWU9*uoCUkrDR1ND3Q)3DxFQ znqUw-j9IC|!cG>XnjqDjN=4`POC=*Q1*!O~+Jq*pg+RSqpaQ-Mgw~{5KO}n_>)|h8 zo7IJ>&B(l#t%KJ}>)@9m);lCK^`-AFgH7m{zRLu^STxL?OodDhn`5srr9udqUROc= zlcgis)JU+Xp=j$-pcBpmyIkn!Uibnv-VIcc zNU~*5JL}LMY%kdhjIlmEguR5^L3Pw>Y)v->XDRX4ugIG21e{NZCu_RY$vO=KPk(zx zLxCJ1G_1@6a>lp4F!0hGPs378$7al?5a9;`7p#_tsTf-%OJ@4(ImVM4#+Hs+Q#8%T zes>S7Xh~YrcRr$lSC&e@rTkmMzr?=i>D~K!SNQms`}mhJI@x7GW1EKHeZAw^uM8~b zfb5q8L>QZ2gxnMJZrg0lN#ZI{`^%s&@f(r$lXmzXijtRH6~;1#VQ` z_bOGeC4k)q*sXx2Wu|R7wgR?U!qRLf*^DpoX|)v+p0c6V^Ve!9JW{1cV$YHuPt&Dj zfMf*r$ZfLG?l<naCxUTL`gX&35l)4P} z{W>xx!}~X)bysd(f!;g!6VC!Q;KXVIGgpHjUfB1 z;B3}&Hf8Q?N;#WS&W3vWOam8Pz`5Z5UxI8(IGbY5rih_RIGbY5rpTR5A;%SRHoiT- z4B66ka)x0mD_4wM3v4k&J(17ZE@0>a&NiR3UEt0(kK^(emF8CwrSWSA6m;M^ev3sPx?t^lPcg6{%;d7w81@owOu zwNy-@gqe#R9&Fj}!Is65Sv=V2@#~i#2aBgvr9`TBK z+R;OdvTFEzw*AK#AX#|u#^qz{dex=hZQ7=5bapIN8 z^WHOU~wvVD%31O{EK(V)e+O3uVx>5j^bTzTb61^;b{sbG@=-`8tW=>%_%{B8rh9aAgqB zh0A@NI62PgE-*bsP=9(c6ffbk|En+IJs4#@7;-e?x^do3BTg@+;XxOQXP|g)uo#Ry zwCEd=&ghde58n$jzU|s>NxZN38a!aGk%YeoiS44b^va`{^~6Uz{_GkyEm$<#hue2dL1GmHiIM(f$>vZ#7(3}MLE{K!DT1OFz?_wX#G0;Y2H{Zo9igpBS zr7%a(YNYV+T|7zYPofZZ*9G{seoV1(`Ybwslg7{tkmlHfFz{X6Lg;oo zO{T+_4adWGF&REf;3JUG0}tc3DsTaQD+4R=OFM}zSU%W=b1WZ(P(n#}@m3glB;Un9 zjQUIBM{666?U%$~u0M!OwW)5Ri#W`l(VrInTO`q@(OLv?_l8%JcX}(Lh`TqumAn}u z_E<$Y@hhv{#GMu4(EGzG0mWhkA$$?Z@@8VJAcTKKqB95xL>CeIZ78jFr4TKPpuN^w zj_{R6lu*K}gs)@>@!!r7o?<4RxLSCMB5ozQT;VH>SZDGT4B<`2b7vvU+K?Z?d=ApL zfcPrFT`IkKg0MpRas^?9^yNfsCeV2VgZ+(q1n<<5-c9pc8Y4++)0z znLF5HZODrFoEld~wdxUM0b6;S^@xY55;As|9+3>Mu67vj)FWtBN_m^~h^tIqkb981 zZtXh3wy{HZEgetxDx@9P3 zcNB8OETLs*Oq7`B8veQ z3jxtvDIq{&p+qGFkytRqRwUQoB#b+?w>%if6h@cA02c(wlBmS!R2UJs)KhS1cWcB; zBa3lZL3AjHqm@xgR6?{f1nt)@LwerL{8Q~(55|6l(WWpCRz@jNiLqA|<1;{n;fa7f zubVs&I~Bw(1<_g=r9=e;_A3Iz^*5yL#jy{Ghw(t#EqBUQ>%({?DSr)izXt|m?Bk$K z&qBIYO7~U?Y2`mvWpPb}WDbroD5H>mMM`&94bvH11@u7tdWe?d$aRbFk>XtvT=`E_ ziGG}qRe&-aT9@{7B$9p5tSY}%ReoD#loFNg*Hnq|&tt)g1smRY{I&M32V;}MXjB+m zDx;LB#HgqCqy5Iu;vm9eQO97p@2pc6TKTb!(UpzGoEvdWbm0Cg#3xE|u!?hwC_lC_ za{0=zCh!Ojt<-ue@{o0`QRS;u<*UOOk)pDE)oP3+L0g&j)@oHu8zLa)H}q7fOQu3y zG8IuuR$>sbc@*ubJ%~dT_+eS#c3EKMKkT7CDK%PW#7BVVWOU~E(MIW_;UlM`m!i~u zx@fhZ&gJ2N9y(e}jgHi!wEWN;m>+tWdw<=$XI#UH4rQ7HcP@t|h-_&%ArEPMo=DVdABiUOEFz)wBkD z6aCcC4}1CNYVzjN&%^X%^2&W;y&*4Cg#NhPM0elXiR4f9Fa3W)S_#*mR`?Td;a{4B zeamK-+w1-s@@LBU53(>%t>ra!F3j0h?Dddi1a(A0wVI&%x5CT1xAgB%EB(B;@Y^Qg zeiak@{GReo@mG-|_P0RA!#2LA!5k)b) z6>ZV(`E&2d^BSKA9h}W?*2!#W%?aE}9^aER)ZZ#Q zvxRHR;~Na?iumjNG3UILS{y&kYE&->bQppE}L=%&IKM)jw zEnnd?4`dnUEnW}3>YAr%amEuXCxiFq(+jb!3#mJeLr>YUt?RyI5Z_!#Ywr!Mqp%T+ z;?uDXnqoxGPfiRd!j@yP?%sl!z^qAlj9H9{waEzq`w+#8?vHd`2!fnR#=P@JjJ19= z!g%}S*s<2VlZ?mU5BL&NSV&L7Ca)%vYoBC%LE**cSuFoHv=7E5YRe5RR2yzo-;bhn zBw9di^Ze@gL~F++8w=-FKJLw@XgY_SGsBo7=QO6 zo>!RR(#IUh|53U{cugfgX>5^uw{#n%+a%o`(%mE65X&Jt!F~BpM#J?%!;PN5gMlWd z61$al-HrWDDOK?SF2JqALxEuLA{WvdjmUej6)a`UIH%FkjNMV|?}2mYw7-5hSO^x$in~j^m)Un;F;{TSgs`(`Tod=pNO4gG1v`e6bE8&S8rA9 z&~ylPOF>e1BEbOZMv#m6G18qZ!!I%BzK@Mv3#QS=uK8n}BVUvezmx7Bnc!`Q-`z`b zhGxVk2VFchHGT3WQ^b1ylqu;c#`Av&O4h|fzSnyGMaPLt=bkfi>7;<-#cWN{%#q`A zbL2QZ967xdDkyTCk|GE5Iqk#_!8AM`j+}OI#CVK0cJwpaNUS*;mKxj0WaDj^Hm9Pn zy;LX8e(F}W_1NJjYMg`p*=6(r=w*bdSxggRg@Wj1eh79MWz^k6^Ky{P_VuTi5t)0@ z%gn~2A?7Gy^Ytq-bhiuVyQHDJHntn&+T(Dv6~v|ph=w+xz;*RuQ!urrJ=eFAzj83Qaw7*#x347=Ys%BUh(p^Dk= zcQNdKpP5_6e}M-YU$9ZRbeDb$o1AqUQr?N7vQrMS7M!=Z2bqm+p^}N>!4EYaVm*I> zRZ2A^&307@OULz!^|@`hj>+2bHeC0lLV)Yq%^33>7-RM_xzTvjN$2QR(aUKrnLEoNLHC0C3e-O49H(89NEl|CyYN~qozrhwGjJS)=U8F-l!!z!QEk=!d zGh0lj9CWI;zc*V9cXksx0PDF;KE16*xa#fy23w5iZ0PjpYzOurMl`Wu={>`|*kVMu zX5tPxTecY0a%%KQwiq^)Ph>HeHV5|$#`O1Li&3LTwVWC~1GB}@kjLFG5#xUsKVWt- zvBY55ViX5}%1n)kvto;Zv1maSqo1BFW}rL3_hpN5lf{reOPkjnfJVaiVT3sH{TGw*~CoBq!Uqd#qpzk<*^0qOI2-V?pqVh&C|d(IS*j~*3s zIV?4Jrdqr+>d%=XW;)tKrM-nL4`<3iY%$=CkaIw7Om^Y|TMWJZ(?$5Kemg$86G@BP zchLOb_H~^!Y@qx;d3C=DH8EnSMb5S6qT;y!`Jc5IsOFdz^J2s;!zlO16m!~Idnzs7 z|J9{ZcSzKW`r1EJjEi|-j`352SmWqJl2lK{?8qXT9bt)WDAqP+ior}L(|I@*Qw(O( z+9ywxvurRk>uCYO6mxL$nV4e47&up^7%!q2ok=;onPS`*-)Wd)R1waBDaMN^2L11k zDaQYpI2}{W!O4TAG*Lxoq8R<_ADSt~f6+}$F_O|m6hp@>+@P6ajxke=*WmLST4LDx z51(L9qXxPubG0(^kgP9e7^e}o1lNJ%}jz4~wvujM; z6$j*p@ui26ZF#l%O6JBCcS8?9jA*(N%#z>Z=7IST%QRRH!=GKF?W@o`v{;T9H{R_U zrWevWndX=e$42H5-4rl3T92~^y+#o+6rm_!NCnY$5&g_u1u&~U=u?vUJ%!vrmI16% zMe`^HD+-trcsv#!>L}_kejN6=OOV9&JL9z#7rCypL7zgAzWfv6Zqk=nmqkuo5La|+2yU!F6= z1kdkP`7S~EWHy%7sA)P!C6jO{z!Ot>dw1N-cx#2Bxy=s zPr9nMh88_?J#-$WZyS8jsg%ARNKSV9x~n2dS5n6HRyl_e>W@W(Y}K8a)IQQ%uRE_a zd7Je}s8Y%}y-AORwFl|jqC2CgUeepBJ0CT{f}VwxF{!OcuTXn70PC*NbZTp8s*29x zldVdqIan9^IPTcUmi!CZvZ zQuw>KQ+9u3sQRjCTDpc>YE|@$e6pp=r6h;`heNg^J4V=#)HJlU!!LRess(}$D-{Z& zuF9oEB}5BBP@T(=yoDe>{?=3H?n+tb-bz{LQV^$~rqqWkdWF-c%rEoD4un4{c2b525^I$Y7jI9b{Tct~hN(f?0VTcEj{B45B z(_ZvI)K^C9au_L$EtM`MD=~;Ig)x$_bY6r*Td4JVFsfBCY86CXrAvuQh;9W@kL2wH z@e?frr9o?8{M#D3D`dy^R>+P$RpC;y5`)-MhSN|ifSTkM99p?nMHu4x>#UGtv8zIk z#S;}SB`U{a^_>!;4avzwy;h;=uX!-q6-I}`I9lOSvJ!*XQn)qJk)HK0D>XZ6Bs+Gm zs!5xw$-xSj5|uTnR}f8r&^xIdRoayvj24BlOJTHDxJZ^nB}Svdm;?RG2XJT)Y7clI zniRxV1+lHdr9>q}6GM{1XH;yHLT z4y{Rh!~@Z(Ai5O9iE@_|g^swmTkcgDq;UFY!gxaaiwC1!VRR^rqvb9oDj|q1g49ic5L*d?ufJ{OE+s25IthcWwhc)CGGXl0J|+xtwbhr)tF5tIUTs^- zT}o75Da4k-t?>zxkA+PY?L{paqfCtrQ4D(isH)VJyOgXfMz_M4kMs`_#&5M-JQ&>@ z)Y#ad#>NJh5|t3WfEd<{r0?SRCDO+51L#$$Uafak#qd*C1wg-g*kOp0VUYv<#5;YY zq1Zeu3X)kkzIIE$Cc!(TwDLo*dDtvSmf}dnNJmlV`LCkeeZ;}fGOP?{N1nuStq_Ow zeq}?FQ7J$Js%okAM*!?M`bB zVTf_IcY_>fZ5!k`JGjB6MCCXG|A}ST6eKOeaR<_h4z89J-z6)q{H>@s4eVhtu-Fr0 zDYR(+WBr{c#}<|2E|p{J2A7nz$Q&DyqpKR}x8o4GHOt&uWNym8v&wk>>){KG(v|6B zjFdOhZ!}g;a}F^!40T24nY6w`HFR-wfTUWHs^PfVD`jy>$3jxWP03hUJjSgo{=_fF z`ypd#VKSC36cyUyEe<;Q3smMbYY9ki#p{|zw#e=gEsmV>Xbs}GCt&2@)IGcD|(lo z`;|Iw!s9Z6I>l4_jegU7M8UGn9e7YkZFUFfe-k0kxl zU+R>9x|ve`eFsygeCrOliwIBd$hQrV%qf3zQ=$CIi#cT>E+HB!ba76li<5~{o_9+h zki;qDL+224ifwtm?b3WJ8K)!Cl%;D{-*MBesTX_GrWg(J*86>J%(3=+#YIV%Kl1s6 z(MDF+d83S1_r?!DTLzV12)2|a7bqkyeLenlL61T=wgKo-T9_VXP1u0+D9cA*`qK9O zFjuE_8>zQIcRnxM>;BnZCWXyaJy6(=E@L!Xx zl;^v%U6BDk60Ch<$uSn3243N^HO%5g|<0)gvOH18JPbT^&;r z13o~^IKh_Ei70DVma%8!l(7N!NlX!P02=f2(u|0E5wtfA&uin*B| z!cyJUlkxH^wCImrBDCmTs70b6N$I}D)n>&*V#=HGH=FrUP7bR!+NUPvj7Y<`J*j2S zly07MZ!%t)8#{a@8)!u|F*1|bPU-HGZo72*q#J^H1CqN*x~rvIDcz@~`=WH)$i;{H zLE~EISnL?s5Eoz^hw413oF`!Zfv~2K3z_N0Ys*0L(UuEs^Q~`=g5J3mXZdsS)A3P) zb3_1SNZuvgWO8v#FrEk}x|J$un77eS7yUH82hH^y(x*>~0iDRM&(DYc`Cli2n&b?iC*QnrT?dNZFmnjsu?3biW zjWb@`Gc8%iYcKwMwiL7s`L!1v%3i1%Zb~uJoor#clSWB*0-OAxJ81;n$!?}Q*$uiA zw!pniS>P@&%2?G`q=B7;Oi&%@t%rrHM!0%i%E#{YN+xDl^{At78F7o$Gq*^+iCd(O zxkc(u%PkU@7&YSZe+0msejM~5&xoPlZtd&Ox^b2u-va~nKOIwwxgcgM{IDFqinQ4K zmJzqe8EZLk0d?6_9&oa=y@|O+Kqs$f}$vu|+#l5RR@`JePL6k!Hf#V~o zciFypJ#3c~A&AFE93=Nks*pYmxH_f?A&F7NyO)+rnvCym0qcYQ*_mk^GRz4EkT-Ky z?3Pp^oWTI{BPG89m}jUab<7pgx0K4b2(=kZmS(1j!DMMJqPq=rYJ@YC(Njc6rYPd0 z#c1L|)Y4o;ca~l`>fRJB<}wbZ4OBC#@jz4|bZe<&s*t)A&#?AS71F0KyQ$Ois$dGK zW2TTgVxHlSAf^x+Ts}i)fYvhCbudL2Rn;{?{4t2eG}kp_bvZg9W4Wh(k9%FVL<8cF zD8zGN6AcK6LiClyC1Pd@@raD{!xR!)h#L>C^xdn7Qvqa8*bh>lBCh9hw{?BJCt>@B zl3l*MEXzLezSV;yM3?t^_m!+z2t1wPW(ny>hhS!+F<<{@fuVb`0-Yns_rTCSv2}D5+d*Q-@Bze*tpf}UiW%`EFru3&VHu;9=hX4pa>~nc8yODpQ+H;QZl&y^(wVj zp?xVr22G-Yw+;_kCgUPYhDa#2}t77PqXv zNhP2*D(WktH4UxoPa+dxg_xjSWI~|X-^|4(0&-dLE0Z6qmhLv z%*5g&jQ%voW%PUb3H;g`da4}vkxaHAr|7P7=-Cu~g@`^;<%mFPZMKN+s&bIIb?r)u zg(^t!ev-XL_zHqoP+XqyeTlEmq{P;1ogRP+%K4^YOUlV-L z{E)uhsu0rkkiJvPt3sf^kuNG-tA{{+LwdI8!E=D7yp4MB2PW?(J-CGOm%{aW@H&&X zMh_lGts`UWbmO)ExXJ?1C&B5)p38=fFq(fcev}sp$6hAk_yi)DS>LPCNf!+;8|J;mEfpWa~`6A*nZP5fd-H0Y9m8=MT)7p$Ie9 zD#DDp4KqNOF}L`f=rZ)P2EiP%%)ytvW;E1~nq-u|I3|SV6DNY(xFm73vH0V} zNgi&Dhwu7Rn!WU@)v1OyX3}iq?aVRP8HJxu2&Awyzf+dizBgs|OSc6kjMR+J-_W9s z>MMi8rch50OpdXa$uZUpOpZabjdL6cAjjwqF)qu-93dHQ`k9ehgSo$B(5tH_a*V`) z=P@C%$!Iu&&?~Td%(gimc`CpeST@={y{P@lI9Upd8qS}&BDK-R7@8)09l~N_u@Iql z2+MiJ_YeW%jnIJMM*ZQ0FwJf}adhNxBkyKRKfaE2%#%iBzAI7NX*@p%WEf2poQ&nf ze4by_!iD_(Oj@9 z9VF;(LXuOYdxdnblP*0BD1MD}4e355-F?zMB;8Kw^4u!Y@!Trhn{eBRARsbHNp9sp zG#2wpgGZ)3LNJ)r!YZ-Fibli?IQu=*@|Vzrm3ziY*uY4gJZ*|#?44?)zC0pYuitrW zKpu-mn1rn{nT*{$%fnDnCmAYgnW2I#p4YhvDufx?1HJwUDwHwWJVMqb`2|^{6?_$W z$TT;V>|Bu1-8%Tl=x8n6ic||5p)G|!pH1)=q!QCZH4_O`OU{N_i1iN10@K4RW_rky zOb?lmsbG_?dW9*O2vQ;alacM(%t%-zhXG--Xg?UH2P&+0al8tsgDT+}m=hkjgsM1{ z>}(5oW~K+2BB2s`Y`7M(}OZZ?u$iC53rsaO9TdF zuAEGH6H`XIFvhHd@_}d{gk9rWoaeIzZ{lB2eV@;!XK6He8<^F5{t1=`AteSC#tGXv zp8(kjV#M$`V$;$fZ}|Eiq9`GA1`AT(V)6!EF*c9^h9YKfAXB@Z+TPc@&c}a;kAJP3 zy@8C7d%8&2{5SiFyupkN8}Ise>tKz37A&>j0oUI+fc)zFX@TmM#%B){6l<81@F3mS;4o4p9j7FRU502&mh1=b70XihP=ForI@s zsP#^tO(C+`f?OKG5kUmYTW~a@O*RonL=?8-*4t=5OFdg$roK1#81ZkI{k}bT#~^Ba z+78q&7rZl>njp&{o`Z8?ZJ-{dCO<=)$XtlmK#(@*XUEz=J$$ACi*X~fDMB`9AZ^gy zhOY~`8w$A_e0zK?vZd>TYImC9Dzhy_wqR{Qr=FR#LC@oC1#1KKzVDrIq=~hmfLR;N zUi+(4ua`Aph?Te_f@ z5chm~&WpRYFQ1RzGYPB>+46z3K(aQJnr^&gjNa1`^i1`7%ntaJg()Uaf2w5OA^mSJ ze9M)CjrdRevo@Tbv_ZZX=y))m+ndW-zZaMa>>+Ky{co_W4gTH}%&ZOP^qxS}N_5d# z#`}9w7>KpO^F~0#BxfEyg0vwUPl5%Kv_Xs=tec)wsZU#I#oFLY+Tgd)L@nZf%x}ZC zOmD7+I=&OEM+%}Dt9ElW_`dUmyWf&?p9LG<9GrTqrcs-wOfptavrk+`JJ)a9#ga4}ohTcy97ERQ0=lUA$m#d+a zMhAUMdB%xngyFjin|yQ8t-1V~|M_-oMQxLu43<}KB<&P@Mq+YPurgTjjd>V{@1J!V z#N4C|%gLiT^69g6C^UE6qzt`C2U3Ou6cI`hij?6E`gXkuKQ?{ldJ?h+(R?FV8MaZN zBj`5xJgf{45x_~vNmhoxQf%BT1Xy3CQ$fl=6U}Z?h8cvTIevpM&@l9nW4AXjxSc-S z1Ky#Z1}%_g9|Qhjl#WXnt=(@tI4h)7Wy*$u)vC6OyyRD-bLP7 zVwYNXMd)7gUM^x!RD?c`{IqNl+f@;Yohg{-rC7}5hLKW~Hdpw{!gxQ|JmD)1qd62^ zyGD3R!f7fuPk4&MX)5hrm zyTIhj4V!54<%B&(h5iwt&^&P%O^_&WlOE1A4A*}HqvD8umi)A5kkI`)k$1XfL1g?$X0%QQON+f!p*jn)Fv*P$;+{47N+b zTdMu09>7B`Lzu1MVAT*>eXupOR}C457Z9R~XWatc{@0ZX66>4)m5GNEwcctvVo=T?@mBr|i5W3~xNEiq8cx|Ot@4+~#Fgg{+u}Y^B zl^7kW7)3~aFG1X6 z?^GO3Zt$n1bZ?aaSALKvM9qd|A&$4*(oak2ZYiz&;84)HA7??uu?UCujuwfcsZp&e z-=ZqNv(l+VW#zZ3_WKgaU6`%cj%o`$5L*;PlY(fjbShDTfOU$7Mry!nq}`0;ZX^~h z(k)BfB}=XR*lQG(j%oaPI9lA&L*-tQPARSY*lWa9To?xK6CB$0;9GK6u})V7tXBox zROwW*vW~T?jv;tJO~9cQS*M_ZWiy?sP*;qCsHt=+Q3=sofevp((id=u>aFJjyKD^| zvcw|5)^JqPBBZ=>@p9v>?Nf#r&kPwp1l$Ne`}xHqh!(-AXb~dSP8Ug(!24l*ce=RT zJ6-(JA~Z5BLKljK<+w&0oqUFaXc5Rg!RM6@a=!?d%W*h2|EcFTg~j0dvx0v7P;=rc z&uWly*PNJtnY_0?KPK0B?3#r6ItUTM=d4@wlevqo#=>0w4GrK&n1R(fGmF9fVK0LV z!1m4Ug2jMI4Eh9#L5*J$gS8$KgSn@tFkp6iUvv7j1lQkse?us97${bPFUn3wVNmNW z{Ov%(oWJcq-W&$ir{gdXrvASYDV~#CYwAqo0B1#Eprc)ndea8{%7oRw72fj}-ga8y zH@$^lGzrT#*U{91I6^W-?D0hc=3!+t+^E_> zE2CJlTq5`jx>pZ#2IP*T%q!i2^ZC zjJ8-N8@IlYoMSJ{;!x}i$aw`@273Q6$~mG_ zN`Y*RQ``6z4GJ&D=<1l^Mm}x0$R~z^Vk`DcO#N{XwC`yPMRK^q89apUyf~tbYyUE7 zxZ&y`-TbJr*wpYb@Uu5zSH$6qMq`si4e~5~dE!u7eoeCTtoOQd_d z3|}YRY8hTH-6v%DQ_|fo!}mz{JsEyPy2Nl`Yza6o%-FgS#c@1?T69$>I;WAv1}e~P z(!GaV6zo3f*30lF>Aon#e`jcV>^P%ldq`YJ7M{(7k>{VSAjUYk@4OMiC#PQ$=lSz& zHMlFqG2A+3s_}MF;CP+Z%h9{(>?C8^cc`U$=i^wz?JfLW;fBJDLQI6F^ewj}_ASLW zfh8{&XB2Oq<$ABLxO_!#fxA{qkPHq;@!p3*&A-Ah1ZNF88<&_`RD5B?7rp0 zJIf*22g!`$j3v8^GYT_q-d#v2(b=|>)t6(zmNZtYp|RSx{F?6nOy0dD1Kgq+OG$*l z`W9#0(zgUzFD+lQdwB+ogjHXzAQQ zU9y<^>C5R!`sty*)&E>IvT(P%X;ELxqFK|?%;n3eZFb)RUH_#S$SecDq&Zi%gWGIP zIl2!qOgKO0?!J|eI?9*UkTSn*x4w)VD2U=WgMa&qMB_lg+I?2;KEoyf5F7WAwmzB` zGK-aT`C{Yqs0~Lx50s5POg8o~G<>8fe5ec`ig4!!-IKs2BV33GFeQkV;nA`i%$e>k z@&-3&>NH`PGc{wobW^70(w{EVa%5@-H)m=FH)m?bHdj(1ohAkp66*0{Y+|6{qP4 zaSt49-OWz{{p^zV@2rf~_Q{@BKpUcs`fkPpXG!19^bAYYYpL=0Wan^Q3uJOC&G9~>p*u};&d{Ca*;P^qcI!@)RTLXdV_Ih}p>TUp zH#v>~)-!Vi6(h={Fue#q+fOKoP?-KTonG`~k#HG2P?DzkcpZAtWWEnt(mcQKuzrE4o6UC;jM3QEzBcW71oCTJ_-K1(cWcLqYqv$-7ezE;4zW z_23FBrWA(y_I)NVbghXzTg7hELsqU{iaE!PK(Jxry`TE@xEhy>sVwdI7O>#08PhbC z)f%1bL;qsVrdp$u{q!DeS!XA=jn6CXy9mH#IeHoo&eS)YM6n(stOwGlfER>OB`H&d5r1B=EmPTUn+pGBY>H zk!ZU!(-xX}*`gJxGiyd;NM&hkWQO5F*6E8H)n>7?3tVBNsrP3_*qP?Anw6;kW{a?c=5W@5tO(=URoW$5pz*{4*Yuax zY)-gA(+(O9H^Wv#)7+8H01LjZ>WwGHj!Fz@#AkdpX;4QS-4sl#n4J2p4E%!q9|j}qp{=ch<#s78cZE-eDT4!aiBun^H{>YMrYTkQe*FT zBXg{{X2vunWElUtcH|C?057H@9J>R2lP2wpAeURFx zrc6mOs;|1>0weXu&S<^*#eMt{3atf;Ryb{RNa6I^(S@YP+X;<3Co~p1Qal5XOlmw80>i2u;d#j^n=@h)Sf~Hr#pDZWJk)l&WzEd zd~DZK3C_Yw5wJC#l0g90sAAIXbJ&n9j?bjJF@4KgF1Kc|?P^x5=t!ZDSy5P5YWd;~ zD}_p_B`$LI$l3q-_TT>zA(T!-I()=IMqt~u$l3bHVj)C9R1YC=W{@K&G_*ENZ4;f1 z?`7zy9!vS-hhX_bVMsak6!v)^=!U?nbaYq0T^+>2m)O05^bQbDKxpUd{Wqn2EtER8|u7rh(c4Lz~732gLq|0wXx>N2fnqGvjcD6n%^ccHYsvA;)8G8Rxw;Y18c&^7W)ZY|PSFghW|^W1 z=S`q;cbN-k$Eb_+o{K=Er8Kta8W#O@ETyK?d=*m3`m`|pQ2y?x6SqKWi)^h%oHwGi=Hs61w--IlWyJ`0 zH&@RcFfLvL)uZZHEU$iy=~TRu;?J(F$Ky$R48E(?9?@^$!B@v05pBB?v2Nqyl@wtO zA|(hL*EeX;BxwIlakzyz05yme_ zL&Sd35&?1(rPdrbGM4>fa_sgiD9&O33~>Q7a1Qg~^u``=fPNm;NWVz#5w+TkLobg` zAF`AZz8v^8Vk|*ZEJk;CLb}d@`$S-f_9>z?(p|AwCen*F{-K1q< z^gXF|la_`JC!G16oUkM;*5oS=i#Pd-!XV<7EM#pZ-gs(jXoW@+w22l7kOEdhlAe54 zLV^dMQ)D%qw0wRtH2tppI5n;51IH4fAt0Y8El~al85~GVSXk<-A z`q_k$p#7FGZsIJCRt+KTHCsbx)eycE8je*tm1yKG9Mz$UQH12ANT-d}zVj3Vs!XCL zP-PM|fhtpxE@fpgSeJ=fgAA5GLKw+fCO-FMRiMlyFrdsNFrdt&L?r|%GjUD!BKg|{ zk)r7YA!-8sBvBLSC!r>!bO8k=B`d2!3QCMY-{4;oMw+(Ig8}^{fdTy_(HhWCQlb)q z^phBZ)YQ^&Xqg(B1e3*peiB3I4Ny=L7*J4BvJ!(7l%j?q-xM5^kvRG`w6wO3FK+rq zjvig zUy#!EQd;>p=@w@Pq`q`Zej+7nrKI%JER5U2>7}+uW`!BAY@ae(>3KZSnlR!5+<#85 z=h08C<01!2sip|(VKvZVxez~?BB;00$pjpv)`Sc&JwJNNep=SqVYk-?(yg4>TknZ`9DDKl(kFyuI=z!80q`hRb(?RA)z+^6O5NStxm!bHa;N2=}4d|Swzl}YNXz~S1M zYg+)rk@;4;MGMvzFI_sBEHxUh{b^*((2_N)SH!JcU1ll0Zs~0noJ>x;sm%D_uF=Dc zzmKt-zVT_}w6S+~aDegYpY2h`8_UPKj8ktXEH<)kK0nm>-@lwcJZ5R};@d2@ExUbf zNf{xfPPwVfa??%ouQ2N4tq=HGf}B~JbcON!I|)OBZoh5m%-m(GjmNF$#~8~uheQ~! z{p*5EW6Q*(5TkvS?7JE52`xrv;rQ5C8VaOIaGy2nLFnSvTW5v`*`jQ$Nnkv`43m$6 z#%rZgaW2-^o8gr^ZN zEIhJ0LH2pZyu%4&1KvQe&@vz+jsXkKgV%WCFaXIU`FLaTTQDBkX$!(EzyJTvLap-DSvObnO-D`2be&=&v539872s#;NkE6*9i)VJ_NN-^p z^!d|hW*|9@=2~27o^O!Nvy$FJD$GV;-%Fa9C&{CD_dJU;&3m3jcP5C5maw!Vy^U~=1;sE4)=UT!N2AXRrlxSkE#l;Bpp&KiTt5V zF_;>1&zrz((h$flLq?Vt%J~#0ylz zQN@i2aao-Rp$|DKc}FB>%#dL_z&mgpMuzP&!-Mc2^qb+^$S^1E{pig=$xWm0Z&w;- zv^_me&9?{&3*4yLlsWaP>I90VZ6--5e=OG|md|LiVkQQwlB0CgNh1rXQop<2X{|gnx#9jm147X9?4n!o5{aZx!*@&R2=9{k>`SteS-9Xsven%Q6YMp+DFcc zA(b7)N{KqsYfr!qLbO&JT5CUAYcE=+4aa`8)?V3KdMg52(OlU`G(jfHLZV$rv=fP1 z5Wfq@P9$oPiMGMN4QaAWMYVVp^%Nv55-k>Y=ULv?hda#nBA3CPLFO)V3gC3*a(Q zgj12C+*6UL5s5Y-Q9a@tacn}OdRc@z`0J2{TFbZYDr2g9Eih_;Q4RT895ukGmKYWA z>lFZ@x~q(-?(31L42eo1upUPl5|zqCCGeLZjjH=1uWlk{b=6JGtj-UDn@P!h-0R95NQ(H{1qAk#fQxk~C5xaXqTs8u~TW`m(M93&m>^*y16n?kf z8eELVj0*btX^wjuanv@xmz>^n!nC=UE<_#IBsh_usHRbiL5G+W&vaigKTDy zMi$({Ae$Ma(GBtl$34OzS*DiC1jZ)Dc!)9TS#A?!Jj59Fj1h&FdXVGv2N{Hip5|%p zItF=wL26mBjzJz^kXkp$y&QKhV~FM^PVpyIYx2b?T8%nHwV=41`HIoepz3<|ZqOPo z!rfeiYR;yHi*Pp=p<1=Y$y0ojIt3hg5z9_Nd!Fp&J>fkzjGB{zd%72LK_`2#On?yV zL)3ZLoIJrGCm4hp^ptE1H0a4L206wcoh;YIAjcS_)4iGTD90UT3~En{XZW7%V2s0z z(av%mjB!|Jkajo7L5@7gAfiEuviq{Te6R9>8`Y~7LHbU+;`ejLdl|cpGv3en?$xlY zELxzIBU?FRz89LBaTkN^WRMn?+r=O|8KlKs_-!1wjWK*%aVujqGe#53Z6yr-WHW;_ zxk0vYHAB~Owl$n>HD`-U3I-PFd0D~PQX8rfKtpjoW0WyQDa)-V4E;R*=~Uu;23f!$ zd2Wzg2FYa*8j9IIuMXaC4q2y-%^WCJ$D0W5@B>A2Y*LzCzIM>-3BM8I<%Dj*bki2E z8b^BL_?09MXn4KAD@n)yqt^}bb`_WQd-;Y)Z<6Ajp}3PU(Epwnu8}W@rvSfjX%4(_ zsdbMWe&ytMLA1vYn8HKMjCZqh&cydQ_mEr&pjD&fw9#Bs|HXzi0GHpI`a*tisQ=5O z_XzO39iBxu={*HzvJ&(uq2D)|pnaGi$Vxs?1_Zen_$rwwSsFuhp*dgzHYO4?C0=ho6VPPmizvZ z$#I!{*`Ds>Mc|_Ur!sIl1E+A}sSKRXz$tFv2^=>;0{f1S$1pyU+#fUP{f1nOyte4t zammjcR7^+BlDPm$T!1*vB$*44#07|R7a*47Vh1R|8)qD#>1nhc<=rVco*M{80r%z+ z`T)gQ3`Rx_-%2jP!qqVMp7|iCf?%=&e|C)~M>P6`->jCdG@7u~9K42bH)7pOSEO); zrK_J%nAg%38IQEBqhPgk#j1ObfGw255%eF*$sR!Sc39S;JtQ{TM=h7GXmf~My83%A zovWp*hbgt@_$5TKSVh~+v2?WwSnz#~xPS+7u9mKbA=-QCYKqbR^5~0)@GOv8x!NdK zt~k)Wa>vKCfVR6_!iv?3@~}9P)TJ5L1-$M4+D?RFNs3pzq$ihG zyx0SNSuBP@;ZORuh<*3c*Ual*^F`IS@h*4vU}-AsJ*u1ZWrs~d#idWjN?D%UON(e> z&$?x4@h$8{lXt5gw%6pv`WUaIT}LZvsFTj?S2R3o33A_hw3=M=sn_M2&nC4323B22 z>MSZ3eXx^QEP>G`rgnnZ|FQ=HYiCY`(b}0@HUd?yl9UM8E-Vm|QOqnV>bs{r2v|B3 z2t8`ysaLOZDp3i6-ME%0TD)3-ge5q%cx?t2B4kCdbS5y4DU7ZvrxKMAAovpywMgDX z5J}qI9tbR*35dg0L$F_ws?>o6FexiBz~d({{*3T12;(B{_Z|!^oe7Nnsu*omP9-WK zz;P!aLXa*22iDLWm~NCc!P1#i5I^oz7`v*RN>*ZQQyBA*emP-G(XRGjVChU0qgg?0 zt#T?+39&^%P!nt>h-un`3IgULuyiIcHYtq8DyNc_7hc;Vt(ROv&9N610iqTUkhgWZ5-`hsjQWSSmh97_`hg3+c!J zfVN!wfFQ);D7N;Ch0Xnya#6Ak+uWt7T$F5;5IWl#*h&~Hw74KQ26o5`jGYQ&SEZ9o z5|F6G*ruxDK)MTYXzR441i=ri2JDa*HEC8g*;?sTqOvu%khucxm0ToTO&II7r#%?h z#4a#4DU8NSrxKMIbqa#E(!D?scWTEy5Y-BzMnTk8I+bXoE?V>ywzG3F4kIBMGtf3@ z6KF@gs7iN*EJja-8XFZ(C91}Tf*_Wr)i|{KwKX1yP6csHL3C9(a~=fQl{=N3Oy62=XpV`$>Sx1YGK%46ZQs{$L$o=-`0$I&^U^Wy zNdLc+xU((mQ6envciQQMXoP8TpWF&QuXK=GHALwDtJg!M<3F>Xm*gzN&Ss(i$NKwu zm)e|}>lX3qK8!aMdJEUSmkxntwwpc~E0w_TPGH#l?A!c@`~C|VsQzzto!utxP-nfzy|3-uy z6yh%k-yenVdEt9o_*#VTowb=M<$~$-84=PU;vW;f4~6e3;rpxbHHRG2se>~b8j6TOb{BNUeT|P{Tz|6x&+Xm9uxC4?rv@ThWZ5`Of;T67w zh(8zoVbP6%prP68aNJEf-M222bVRN`P1K~9WH9BaJuY+|_aQS(Ky#?i}% z1+z*>WIvUVhg1LjQ(sjOvaoM_bbRzB#{WdchZ+N71 zOzDlr){a!;?Z;!r2F!_7dLCJ~0cbzOokn~UfEFU=M?%3Qr7X~CJ)CN+ZbFJ3@fOPk z#>_in60IFc#uslPDEEAP>KF|abTrk7cp_%3R%d8yBu7GAJ?5nE4DW z_!mBOL6z~h-ws`ZT`m)Ithl9Od&n@OG$t{`2!C=!$V+>Z5;HaZT(vd^($>hp_ZVqJ z@IFAeis$ohGMpwaC|>e@j`8NJs-abwd~DCe}1GDmSagp2RNnd2=ec$AHU`G~21M{NF6h?rV|pRTu& zHu*TTK{_aG7ul8Qcs1D>T!438%D2#nKMW%mIb`9X?HXv3tcQgM!<7^aWeu=*2It|$ zk>nN_;eSO}JMM*C()JJ(DDXV+XA-Tao%lI>|A9PqQEbPxKxuwI4kCX==Djy3JBaaG_!mhaync=ImlQ zyBLI?TXunzohdgb=cc;===76a7-#1==j^OL*;zO{JMb*#-1N^rx}6&H6dU93g$BU6 z)$WujyGC@v-|xJ9wrE2PUJS|-WL&}%x?{kwSu7{3OVad9e0sHq3(|eg1?e>vWHS|{ z{5rn{c^y;Mb!iKA481LBq)?FWb#d^pvn-rN!;vnRO(?$_x5ccALnFD+J>mk zY;?_ZM$$EN4CymFKJe`fe;5GmfUg03wF&+p z!;@N3=>YKF=*N7}_eQ?2qxAa$uov*vfUhvYw=(=L#AXi){-_Up3m1MT(zgJeI<fhTnwr^?tgh zj^Rn`>GW-;bRaxxPe#agYIN>7t%YqYp{{md`Amocn6{f(|Fj@ z=L2tHcstTt{B(`l)NC5I`e}Op$nnb(qulM%?W8+BZSC!bq9NVQe4p%X+xR)h`(;bg z4&%Yz|9d@d*t|ZQ{g(faJ2EY6NT&d7-D4FvD&XyiAmje z#2-06#RT2X(1($@9nk$AK@8o7*umThjvP-jA@2n;p8xxin5gReJ$@K^7h(r9l8+pp zXo7CxLepm67TH;4cpahlh*G$8J0k^ETswNdUL1?}v)Z(U1HKp4oF=aNG;tMv<52%C zC`~b|8PSVUF~5d2^Gg?fB#752D5~I4;|TcBc;D_S+h_s79F3_iRn%UejgS09p<#of!#wFo0UMOcm^z%UjU!FT+VCJR0b z1|0pKcmKf-)EBp}LN#)6xfP`qvHB6!JO%!ewDeBg|2?C$Zy9R1>|AR&%u~Z1tpVEkV0{Zf&k9u(#tB-om<$Q_za@Ez>{eJJh zE<#Hbooh=(d0L_fEdfJ$z87iVQs6HIzJA6l)ZYaf;mKerGJrkFeijf?&*<6l`u3o& z$3v&=m9CaiL&)yiPMS&OWih)pAIpPSZnRkDD7CVGP^{*75dyIM#vIz#pri2FU&O`jMf(w>LNsWtH zvsr!V%17Bttl3bwgKY#64c6=)@?IsP!J7Sl!^ zG=d;lvn9Q@V9l0lUAe*E5{6{g&I!3)U%LvbSBH@p_iKs>RPE`pLancLgZdgoMAZjltw510| z->{+79oM7>zi#rv=v%zWTc-zardrCh;M;!6Q#&Y!q3kW2Lblk(~=@|MWKz z2Zn8z(Va0NXj&{S3uB_1)`;7PgxhjG`Wb7)Z2@$Wj{|GOvE&x;d1WlQH%9Xs@fbBI zkdFV%{#$J?6}BhaHIp$i81a`ozjv%i%+cS1XdrTMm@`Nc^T10R-!!{!ukY=8;>EAwp!EctWidKQ51xrgn> z-^A;#^m8x$SSPu7L6lwTC1NokIgTx zSwa6cF1lx)?JF!)J|q_^QSTd;<(hvR5OP(P?e=_I6xK4OkJrVEIrW@;+ofXh(iFD< zjkXA62aEGo|{K2m>fT&-*1*}O}=edKWy3Nnfb6Cpos-bX7+x3RARjGP6-SF z`k15BA}3BZY-1*650>BC0KfMzW7C)8CiAxQm#_-z(gf2t4Yq-pzGp?W1<*p|)4>t3 zWTft`tT(g%kkyuTAj^30Uh8yas}2j2Khgd_dv705Rh9LR-*aE!0vEl= zt7s^gV2+uoQCXolh2{$y8l|O)aImnbaSD>!RL(?Y<J-vBfKMTf zYsG=g{;(=XN05mF0!NTb@iw?cs+#i=WX1q_1oMjIim`V=Q2H45jbklkn_&Th03zM#@yQQ>|S{!xX~u~Jd}pQ^A#g=I2~ zwA`Z-9ul=B2^Vy-bSHcR;}d%hACWoA*X0qJe_cd^F-G{mOdo7kq1*5m(9Z5@iMI^> ztmd+h*nxH$YiFlej3PLYGa_+?41W>nWE1D92Fwp1R0dP5qy#`(&JR!M5AEzUmR~PH zj+A6CrZPyA2WLY_$q+SCsD{a=@P?$yLoDJaW%x2OMxarMk;9{1W5|DidUnc%EPoQ)HX{{rH-pWD+wBN1lY(98ptDOuR2|u$xDK6 z4pMXc+=!XgrrYTIv;L`ga{6!blr21p`*> zC-t&q+)ac^VM+{0V0IZ4%yDvY%)R%sEH5-5jQ0@|X`~H7J(^)FECyrbI7a(eZp@_J z?R#R82)zlqUP)IQu?%&K-fzoQ;5RAohXMW&z-I!a58yKucxZS4ypO=Q9R~D60q8!4 z?qldahK}~j4gq+0Q%4*8+NK|I9}^Wy$@+ywL!fL1N*_>W0i{o&%wm*TjB+1PHZ#hD zXiyfT%wm*TszGu{Xz(!qsT-Ne3slJ=owpOHwgc4=phC+L%Fcsg3|g1VsCEL?_CV`$ z8C5Q$%I(y5G&BTV_uXbd-vsDp2Eb1S_zVSpGJ~JY;5P&OrU3ZK41O|$pRB;^zMIH> z2T%0M9%5+UNxn81P(WD^lxe`24~%Jq(WD5Y%x9DvfU-W&dHIYopHb#3lybVtp`jM( zp;-s;)c~IYhy?(jq8e1d&F$=n!8L8+{KRrDM zKC>9#E^JyDexlU&8t%hS6yaCO@Z^vcF$qN=q3y< zt+K0V+P;#kVS3D{C6W`ZAG&i@4c6S;p=QYJW;Mbykp^pSGCNe2)2TDkB%+t?G!_T! zG-{${_iLg9OBwp(;l2c?s~%g4&2|p=VvZlrzg(>@`~2;(Q$D|F3XZa~=_s4d4m^Ho z)6tE4H_vdNpKMBGb$CVTDR>}i%$zZc@;<*P4}1Msxz~50rb|Jg;|6DEC}!YIr=QIO zQ7;v}R7_xAD*8igdr=eC2Rdo6D=-$^TRMXYfg&F_5K}aUp@JDfOSQ@?L>c&C?j$4Aw4WZM-yF~njRAeqOn+J^jsFsfK@<|hdk2D(E@aM`S(87% zXfh_<7!u^5W1o|1gvd&3D_iXRp#dV5zu*8}2u;2n%yp@`&+^;bNk)vn@azVpt1Sj` zSxCBD{fXk+J+A8=^fhTXTaj*iANK)`zVA^C8hxa7XCuq}0b`W&sAx~R#Bz-5T*=Hl8`}VBmfMWX^ z7yFnyC5i|D1et8H(rIUIlHERz5}o#=2poSwIq3U6MFDA(LErB=x+j~1js|0|c-NJd zYh7W8|GBPDp7n@T%!*FSqe?d<{gqPeI(6oQ5kb*_U@G-2vm0 zohSkxL3#IUDLO^wt}E|;AwjrQ=2n+OJ`>TYlnX7t?ti1$G#RtIU!$Uz$=GanGh(n- zDWe7M3y8;ZId3v*^W8ZivB~bdkXWvJQXoclA!AD6PWK9eLT2}4*h{X9V_Oj;H@Py_ zh#0Y7WUShZA%2S~>4pN_MbxSpGP>DxKTV{n=ms-JvPr04$x5KR2Nk|r7T##ake$kF zB-|RrfK$cRnQpdJSRlzeT<#`CM`NapHkdt3iqpoYn(!qWzem$zXCRFn)W%Ncn?n_` zIec@t!lR4E-N`BJ-I73TM)f}vh$O=el`I8fw+7LyLF}vW=%Ne)IwuXJv-1RC^a1Vy z>e_zBl?3DWjH0n3mNsnY>5AAF`DSN@M;DFzo>RzCXAdHS6z5(g5dDn@gJd*lGB#;4 zHdlCLQ9L!ODUBM&pHV-B)XFl94}vgiG>m!;V?%{U7gZqGSt_-p0QK%C5I!Rra+azk zmAWO>x+Uu>Oph+BnzCE>#&1x+m0*l8t_#9wEmytKR<3&Ebh$?tRUn!*h)mR5iXRMB zJ{|&yxgP9Dj53#BmQHoW2B_DAC(hm%0Mq!PQgku;k(c{9J$7m#@KZH zNSRHRepZ!ktB|F29GaQ&3sABy96Fz5u~8O(P8Dxe#dRE>T;n&R_=ot-3Y309l|H6Q z>o{~aJ=3w0ti(^k{gW!$qDtyGyr){k3#SsU5T%PU`v~9bnbX2yt`e#^4sqQWcTce@ z4)*uEuS<+4gOwibm^4m1CXJUVqT7Yix8wYENXW(ndGW z<43$o3Te@^TFR5ffkbDrS1*C6!GEFgQJ9xjOWb*CvP6rQp7LI9ev=C`m1_$NSH1aQ zVd2b$vrkPg-1Ub>+knlxZ0YY!-{LL218m2&RmIXw zPhtC#yL3Vm3KXNnCY`Wf)_6+C-{u;o)%L7T`JF8BYaM?R@kL~`@`sa*cYUT5I;&9bDliVEssfBwl0nHUr%lb9I#JZ7TJP?xN#O76o+t)y@?Pw? zX`~-^ERSsRUKCzZa`XI!*WDtXd)GEN$R-Zjv%KJu$T*Smj8}*kt_bTvY79Q{<|{Bh zS@c?Jq)7Rd_Z{JTE<8Dc29!C0;@QhG;$7^)@}QkLe`3xQSb~;zCk5)05sNunyxy?16tMMdV%YA%{Tw&Le)A~t z9FiSRgK>X_@NdfWI_kU@$gH!q$<~8|-NrZKz|!;q){|Z_{aJ5+N6#MM^|5ivhWq-u zh5M<&PLcLUNX^&0JJ{_Qh}o;N#__ zyB#So5;g?&KN%JUUs^=_Fnb^JR|vVtdxm`KL`{Bbr&1TeYSCl7{g=W`&SI8Vs&~~Qu zKk_h`N{6}x1dk>ie6qlQ3;SfD4Y`wf-PBf1_UTaPEM|yz7UH%X4z#VKCle{;S1iZ48OP8JxMGQcnBz{|k}sBU8`$T#-|qVm zBkl4hm6A&n+^NNrJ+Z_DJ+V-E>51iR<>7_}<+U3YDojYuOe zEL1^yVL2OuW{3mQ(4_GorQz-v56zG+U9cSU-GPUXUR?4qCbMrQaoAdX9euEz*{xmq zU^#oK&fOmBf~BRS3lde@+>s`e_@#fHLfk|3Ze9w){3TZzU&%(>blp>3Dz=o#DiOQgTQ( zd-wtZ@K2Ppdj{fa{WayLOrTr(DzpzNq+2@qwGUl_TU6;ra13Vy(riw?cN;JRWonR~yQEz%LGTC9JWNsb9=9T`8sQXaOn9R^? zkC#WW0|>?3I#wP<>;q$p%spBjwG7xbbE~C13ZKPbZc#2dUtzx3G;&&Ft+hvur<&7c z%;}nk7?@kKXo)mMbvb215~|#VQ3B6OmMwO5N85}mWzl&q55;E4nDoAKm8=JgPeUp1 zYAa)$?PAuFiWRt+f2LwHT*N;!b|}*Nki{m{H8CHJcY-kBWkteh&@kX-MU}NE80=+* zn(`FtZN<;XH{!9YQ7wU&719tNlKL}U8zdzI9PFRFxD(v!Y!$) z=!>doTZIIyca+J#TfT<3mOF{H_0LF--+oJqpWMK-%IJN!u=AELWUN-kPRiKN z5L-)CKbP?b5T9+k1X6LGowyV_V{g&_S4_371Iz3iONR8~(vQ8kz*t8_h!>Yarw8S( zF0c)Q7Z>sU^LJ1w`3~*7wd9lm6rdzp1+KB_e-eszYS{%@g9!MLbvE zJM+Q6cu$B1;&rt@+&fP6KIXksk`eoQB9= zj+r=d3m0>c>nOruko36X+nZt+yBi{1j*Qd*A8hl@!`;U7;_^R32(C0X*)H6VMY`ay zHO~v?&S}bgTRcXYtv4EOh^*C8`qX8^-HuNPuoQ>e{8*$Lu3L{#-UiCc#5+1qdSBUJ z8t+`c^RUynMHs(;RNZmPKL&xk9Co@g^>I{f6l>B@b!YAH7$ZR}9cu6IC`4;Mk)}E_ zlEw7n3H=?#XlJhQ?{qE`?l)4D%awy)cqd!&4E6cD_v*;^u-*~Z>}~6|iob)MHikaB zh`sZ=3g1=XQ5AlrLIdjlP=UhP{pD;Fd*PfdzvKUoCEWH#H&R z0Tq2nyz&O>p6pM?Iidl;NftV?h+DROL592ALR2B#D>xL_zMqz0NAyYY+%3+&dGDy) zqZHzIOob;@Iysr9+C3;lTD%H-sr12JGR0CAQ*6wbE}3F%1!Gi}e>7Xcfch)1W&yrf zq9qPeeqlU#Z|~wM(IdtE2Cs2#O6kl640KJ#2MQ&lBE445CSIw z6F46OE}=Vy1P8hxG|Ni$<((!;OZySjRt5F4R+F6I672+tm{O~8A8dydJ}d?~t5I$x zx3p?x_^F3)hMy5eK=o|worM55GvGRus7Hx9l<0XRC~&uw<>|n}7)d;+>XEBk!p&0; z-xOIK+dHZ#mK?R5st?3S*?*~$XG_Gc#}gZVYJw8T%QbM%c^xIcWkdKVF+R^6Gn*bKx|Qnkq(rT8L^fK z)2+vRK|fccPpd~-ObCutKBz9*T&q@t*5SWiAxuTsb{L=-uP z3G~fLSZ!&AONX(F#C(uAHiSeiLq;T?#Jp%7A^QgDAkoZc8np;nmo$j=l1uDXQ(a1-@Q`qB;t%Ry;hY3tgEM$8Ybt579i3S1vsfSH9ktmzgzN&bt$%#ml zjs$CtKwBm-;do+UnnCr4O3R5$rY-(@7i6J$VpWc`v_A53aN3n{&jjO(L*j5m7=Efa zB!S`!WLKj5r6-yin(?@ot}E857(7?-07(+$j1HZ^Q20S(YGR@O1DGXhDj)3uK7=*= z)M$yrghU=9A>&nG>j^2w0^2N%*HMgD3yoI~N+CxUNaw4Z%d%zA-~*!BkOy7NGGlNL zG$Q;|CU@|NWdXsvQzJsK6fu?}n@MO6f}TvYPa;AVP!usDEqo`tO!flt`3pMq$PAz_ z@PdSk(3gY+P4Y8(-?C(k@-Rh2G17;H5K(OFX`-#gXe(7n#MKud1DPNLd3=@al>-Hv zLJHXeg={Dz8^Xv2DP*NUHYfyHDYv+kaSdf$Lx9VaZAK>0Ad{~WnVto~B}tB`ZYhr_ zkPKwx8H~KYLcS8|{X>wiWaKLu`9MaVAscF9WRVH9$mDCsk<~3-tXi7R$kG^DKZUFk z$ohpKt7K%Aj4Yjzr3HEwdBB1^zP|IBNn*sIqg#m44bFFR>7(a6i(2xG$E@x&+Nn%d z3X|1GkyQ<{`h<{G&16+GS*c7`$}&j#$^k$oC_*M*JC63cPNUtMktH*-B!#R7$dW>k z)iAOeM%J5=B?tNddBB1^T+JFKUMfeM*5r`Y8H-O6Sd9FR8b&l*~}~a2nL9-}Kz+X>wZ}#6Vk+hgKku zuN~)(?l(Pm;ux2QarIER%myIq5rV9Nku@-~I7a3PAVVI|AdjySnVdUVf;!EJ7)Iu1 zWZe|9O~BPH1lK0{{BL4pF^tU3$lk$IflQ!59$!1o2>n#(=RcZ}xfofbLe>amY+*}D zJ2!H}8W~qK<8lEPo_|7yOrSv~UnR2Oj3Bp0U+VG3^U>89%Xfob7xlX#_@w9&k6==r zOlsJ&*Gv|R-VR!&c`o@qvz=+(&a_4_tuUovNlF`QX$(9WYRp8M7E!i?Pp})a>LpJxR3`d`|Y$oxMf=l>z5@Jpt!H9#RUK^pS-dhT)l zoRJ-4WJeXU79cwsf~NmwNvp6KIgh*K?2aCycCxksVgZjscmpJ|(;U z7$ZBz$Ub3YErEt14_J^#S5qy&`pw>XoIhk_hZxyGg{&3Gq^&85td)_qGO`aD*`WY3 zIQa``r;XQ(sRZ+Z^~)^GKt7hL7^)BHA*x1Y(|r^ssqdHX^-zKzLiWAff+ z^7b=%wC=Q-Odm2qUz_R+{Z*&?La*O%FtTPwwnrj6Re4kRsXaktrz){e2*;JasNP^? z&AKlr4PZSr*<&1?Tl=zLRJlA(rlGPR?Wz&8QBg-wmpChc|e0azIGgC9x5+% z2j;%Cm~{u{LU&+p6YLq}kQ_Ob+gI&H;v3L4Y|^ts)CG zvlNs}+-IH@3hlV;BXKTFTQ1t0VMp(!of&O9>EXa`-b+d%mHb6iiBi~D;ftu~zi6W+ zx2u&SN1w6358V%KZjoyyRBW(?BNdy(=P&!b1w&hp!P}6G^}qgR50aCROqL=-Od)xX zBt{Vrpo1PvVE2ydX9fBrV8Tl`p^#II_IUpZpg#hp`7gBo%#YOR@W2}Skvi;$x;@ZC z=8x(2&WQIN(0qZeRC9coF+MdFhv0t5$cKqHFp}h~mh*hW(`EAG6}tQXF;j8RmfKrs zGQxJ%$lF?iJA5^uiaS<4^6dR#s(BdbkpE17fKSpveI*0!&rp4lhWj+#7iMT@{2P6- z1~OEdg-2YGjx0R+aI+av-jaYdhew+pLTLHWQ$Fa7rUPx|JN*VDRXP|-ZKZrN;HpQi=ggpyfev3Jrd?YprN zU3U`{sZXuD8G3&xB-io4!x=z&b`qXp5;idjO5^QR4M>ohU-BV`TT~#gVG^EMX3`sM zQwRw)OhOHlP}6~g&a>Y4qqZ+FJW=aLP6wJvKH9wPapRDI+ z7t^zDB&$_*nn?O>0X81EoAgcrw-|RT`HtQj`@zP$MH;Rhc*|$RW8GlLx>js>5 z{ExWyc2B%nK!+5Da|!}mDh?_FdRHV`0KKahC?kO~#1xOr?eOE6SEySR}Zjw6MOXTd9ThH=fr9niu8urND85g)tKF0k&E>R85L z5mVG>6h&DZi*yX&P6>rAqv=cye@6Ff5H}{K;cBbhx3c>LivC1OWi+qszJ;QbWbU4o z-D`o*xLD@yCg&Z9vL+VSAM`Tjmrs;wRT3#GB%Er$g#=pi;1o) zWGvS`H4r254)^6D(MHpKbx3p*w6j)1wndS*igmSS$k^^xZn7X@TqUDWqgrYDAl)MM zs2Zdumx@6Hi!`}Z>{tbBa;ezSikRzz^^RANUYC+}Ib9K>WnFBw(D8~P(o|lZ=_VNx z9j!6lf3-qjMaL^mH)-DKC=|Iesb^K?whH(7kSLVNSV4>>XUHiUD?@ES{X+y}Zye6l zlu8!Vm!wwLMyl86D1YH>MA_Cq=Ilr zL--A9e@PJDe<%n6%1aUgRH7t=stONEnp{+YXaNXlNMI)7NAAwtgQ+nelXMUX<+wKz zSQUkiPy$JV%|*Fi;s*sVa&M*@4NWJB59(7A-^p^1E~?NS13HsoG^2hPDjNgYy_te> zNW*~sl!S4#+@p&s7_ET8Af}@FIs!3*-J2;8%^Jjh4dP(AM;9d!I5Mbh(=fK9ejC9U z#qP}%jO`l6ZVh8kxkndOWK`a!$jHQL=5qWXQRG3OKy1<=8a0Tm(Ep;MCN2s_wT97v zv=;n~3)#Jyf>EzwG-wzb%RRcN0#TzujD`%rt@s(2uy->BqFRHf(ID!~a*r;nVAN|E zkE8x41Y;_@H&Za$R_lqRVN{iSbWsJOL4zoP+`wl1;3184)f9+h8bs^rSW``o)gE0| z!Pul>9726^Zv_u&r7 zA!ro01lpLJbW<92Q?{=5=(4IQ%^Jq*s2>I^YVeRo?#)zh)N2q88pOuc9$i#{*snp1 zK=qpmL>auBq5TR*wT4lnVbrbm=&}mNAr0e~sQ)p+Sk3Ou6o|GmJvTIns?{D{RDo#G zATET2WQB{?-=DF2GX>+AhS6H47mhNIEE{-Ij%gUr0LJI|!9yCkH&Y-EX%H^m`-b|5Et;wj-WYm>;bWue{y#_H4 z)i)A|$Bk%A5e1@cm1;?)22oY!nb#fTPh}O12Ed5ljQEH6WutN;zkr@n(sYL_68R0J z<1J8A{SqZppntb0Q2H5F`k*SUyU=g zqG23e<H8g#KBb_T~vYC4iKJAsQMm$+~!_Jp=$JI z)o2}WtPszgN|+JQ6uwq08sqNH8p8P@uI!>n893Hq@yA**U(c;F98%3e)e=K>h#_>= z+2~i7CwF`|@N8N5g{KLjtM?VLFr8GhV1dF$5(SK1!w#3!ARNq>8<1rlGBrCv1yDZh~^uLKgd$%Ng3gzdLXnYy}=T?TeY zq^4~NlzKx}dpVG>LniDBBsASJWxBJW%K0e%oA|Mdy#vrY-%2(v*Dm&22gU0DaqKp) z;8vu?NmqH!hESJ$YiEVzRB;YFp)!+!aVTaceG~ z5pwwl#AwC0PUlfs^t)S;!LIp$Pdz-+-5I)rcs9tR$&f>D4VOoOH}$y6)slkOI5f+rQfB( zdX>IGg-@#V7ghMWN`FI!k(PH<#;4+^Uq$qdiNUuN(bJzo&@o8F{4q5_%;?+C9Z{#! z>V^NBKCpxE$JCU_ld8NuT5NeeY*N6SK#DXc&_~q%HLX`%*QQYqd^a-DHpZ7Jiatyn zC~gYtNv;Eb1^WRjuOD;$w{ywXJgFX%?}@SnhBtfu*c+M_KRhAvoif;_-{@<{fop>= z`v#JIZlAYfarO;K6WdEj+_`C9Q^~^?Qg5UKiVeP`7Am{ZNA((fO^ci6W#7;=x2Yui zdV(0@0nh|OS%vidv*$N0HnN)-Er~6c&1+gxHXnp6AT3kUnrvEZI}z~q$2Du9IZ0kE z>U^IEPLK9}*3X;0^bu#-f_rebRG-2QV|*c={Wzr#Dav(BSLXBkDf9LO?A$=K*P}B{ z@c$qTGeF6|0pv%*C|hb|mn|q;N(_DTrf0L4(m8P1g0vs#s`Dc-2>ks6@1y5%ina=t z2O}?o6TK@Y(F{o{%3czfD<%>!QqoBtk0*I4kz<{`)EJq)plJ!sh^8e(Z43@;WS(@I zQiq9(5{pT8`1tK*B^#zZ-fr_2I@{+T4IGA%%}jl&xc9R@A@|7`RG8NLvNVqRMsYm zfTpvRH$y7)2~_CgZNK4%5hMr7Q%mZ6g^IvJH07)aL+}xSCi&na3eN{&2LjL5q7Vd~ z34BBm_(*Zn0)@|9cD`MBK3yJ4;Q91GvSCW&ntMN^F0A*ta12eV*>!wZ=L^ne^W^ti zb}V*W`b4`mcBV6GQlTYk;yX!Y3$AOi{PtJRJo60Ip_x>NnIz{)U|yYTwwOO|x`cFY zXj{)`@InWpX=ytKpb2XLT<6H8;88rSDc%F!m28Xw*_ec~xnmdWC-xCq-BaXJ{XQO} z1KpMUi}4bCf3(lpv8d~k$plkc4mG5gkg=g9@%$^GScdSl(^`OMoYQC^$Td=(uN`YZ z`}}rZ0}{5ZDrxF84DIv(+F|W)S{zvW1CO_MOc@*|dcxRsN@sx;tXqLci`V`i0MeDv z%Xz{udBW(W^?#p`&CLcq_I~6#$FTJi*`UyL9YLS*(BG0 zTIYXwXH9U5*N{yO`g#e@_0|rplV34E4=ggl7gX2t`NvL0$PTsK6uNf(pPP#O zwl&qu_g`&IaLCM)ojzsGYd)BGb4%y3>aBgQ`GA#7njJQzv!StP&S%UC8c;jlBl^QM zIJDXL@XB6LhQ+LGei<)jQQl`aU%)A43ciZX(cv8^k?8y3)hQ|<7%sgkD#Zh%tYxW2R?%6z!VH{nSHdv*$cIeNiw^o z!WmD|izye<4-sEbUF9Zdb_7}8G?bs9f`}Y~qZ|cE7edNUkaQt*g@iFR;uyiWQpU6k zp&2cVAUEPG%H$ZyMMRL4h>kXz(u0x8C09U@S-6TCZmZoWod&5`gLE3CVkaviNxDJB z+A7FP(ABbma2aGmyg|j_2*^c^P*HgP*%1=0Gb6wb3FN{NP!&<93fGts%c(n5^mIi; zW=M3M@)C4S4O3f9r*tt!dbijpn|Skk&th^06p<-jzA(P0fWM$#V?xbuHuDhDE}2{f z8FW)hJ6&+iDO}F?<;fJ@8YQ{rdhmgb|3c&6f@-VfUa=-B`TH)}BIpb#9x()MBd-QVeqFk@FpGW_Xvn|iD#Y~x+X6+YeyDi5S zm9ulj9n;3!rsmjQwM-!oLBpmMdlxQTbju22{w|@*G`dWui<3FR>dFPCS;$?_Su@X` zHzx^&*-y&-;x_{BYaM~Pn! zON$TE8T_orIVuy}C!JEJF&^Pb`2CpV}4Nt9k3kvy8l{A|3+yl%|~@hV?%{4lSw zbs6z0S4J_f(y0-EdZmEY!4WRlM){M2X1Fca|Pg4x{dAPawLm5v_uRh(qdMrtQITTj`~4zqFvTiT_JmDL9g9jN+Lx!oNh-Wjg$3fs>+S)m>r|9w z@lbq&ia)Kwtzu3@`0$t`Dtc0d?IPx}WRD5H7YSbx9+o*n$WDh4lE@gPv(q7j>~sj> z9FA2BM^-=&d))DII99De`kk;+OziWgPza?Io)0}$dY zHCz9DR_mP&uynYN?RC!clXZf87}RuHvnNU01VMY9b;@364dn+c6HN7w?O?8Rs;RsX zO@`&Qb+Fet*-x9fb$)HHvkujzz0MjxSzFtS64?Yoc^`7xP$v}<#{nW@Cz8F+1~xgj zPTA|s=ei^`S`b1mee^<0VIoi$pj9)tJw=GsAy%!b;Jb-IRU*9-=~aFQd-z<9c#)sv znCJO7f=5-&7B8!n#mfoE?U<75-}cP}xRBWP4Lr8kV=vkZ-wu$3Ho00=NVTdCDQ8y8 zLbaS2=whI^R)e5cH;itk!08V@@yJ}_@f6swb9=!MAY-azfDfh@&LBqMra;T%wx9~SA(xsjUuwOhYJfACOIYdgX^a)A1ZECXgDFB4up$l9F`_omNJrUBQn zt-^dHtWy(*P!~?Xm~*@eIdWD|I++uoc~Zax7w{c10#9uTmLfl0Rs5V3@k}CSU{n?P zI-)r<+yBugWM*Kc$wij)wUnUk0n`0WJP?F#Hx#J2+Ma)2dh)SRI|2(=VY z8{L@yn*o-rN;cxR8DKXlu+oSmT#0w;wi^_9LPNdRRj(=HQL`i!XAK~J11!4M+equF z0eCi~AZA1qd(Cz$l=bS6L04MeX#7J*?T1Ej@p-iR?1N~^wTMU2z@icZ>3Wzqsj(%3 zpmnT5Sk1)MfHs!%Id3_mp;7*!NsI1RXi9;mlp9mRSc(}^DPt)C7HBCK2hhyp%z2Ea^QbQZT6#vP zb?2C}3T+9{7BSk{j1~^D(9j}AJDVF$A;TrhPxr!M!K)S6&&DJPdAg}`VKC7fE~7j29Ev>=JL zMF=tR+J+)rbOy;=4gf7Lw;9OGP|GbD3{C62+L{b{9kP~lg%sSSs0zurPwreHP`;GQ zC!$QED(}I)=d9&RxV#%>+^W0__onNt6^i`CFX8WjR9f}v!=xHjIC;#I2zk1Eklbyl@Co{o`OjHUJoXi9#1_<_Wo+m)C zd``^Z=k}!kh0pCa%&s$P!Oc?&)|vQj2GVBml6w@2 zfBVSr^v=?Ymw;D`Jv097263Jt%L|84*dKTPv;GZ<+Vr#;mV{!k^X#Jic5jF|1#C~Z zp(1QgKSvp{l%Z`;ucA%2^uxB2%GksA5e%oJhyXjo`y&=KJw1u)pFlZfdU_A#O4HN- zWwl%cCBQ;tTE|hcwmm(7&>7BOAPu&s$$cDbPZP@lv1kO2JLpnt5F^&{S5Z2kUvCJa z-8-P)MJ7pj8M(*?j|D6w`ZJ=4+im2LO=obiS4+du6Qq*fvDHz`d%Z~J9$g)EB|(@d zb6ZwNLCpm$ZpsA{+r_$E(`0P9i#^&;m$6b8iT#_#Winb4O`3Pg0CjP6DV(HTE_3F& zh7&ng$XHP{tNLAOWdyTbJ~Z7>u>uz>B&yg9*VvG}eAoDp*i_dQ1apQ}I<(qgx@O8a zuB3Vg%hE9WeAU-zi>>x?ib9=FMPU<~nBiA{j!bLqrEE)DMW#fv+Mmq1B$^CKbB?X{ z=Vml({ZW>!_CCY_A9-L-+iLGMLkwPT3N?5=(G^WpD}&d$u1kqZrPR06bbU-+ucDhx z7xjsbZZ}>lOQG)vS5{#c2j|O2J(l8Ed7%k;)T~vWMs6o7q>L&?Ao$*N!M6(95 zPlMQB?tYt2#Hg%-u}8z0jAdjoeozNWN4DyX?Ha~T4P$q?TNhOzwgNYp!A!n^hs4( z$J;6_Jzho0!}xs^DE*cyeH^9fMAFa+trc<{_k-E}C4R;!);!d+S~q^PZhT|8TNhQ0 z->Cbq5{F!m<7Zf{q~pK-7CCqWQxtMwDJT0b%6Ze3J?IJp{v+Wqmm%k|+4AhAmrk=47ub@gI6b#IW7YpzIM)3=)L*uf`iq`9Xr66v z#8EWMw*A%|Iddp&2c^Lf(tjh-c71`ZAL?N0NL3ZjibBBJiK+9ZWx-VM_^BPUrrYMg zYvYu{CL9uLJTyahIvLMvD-<3|+al8rAdPCJbwJZ?MJ=Z24&eDEbYdLh(U;TW&TaYr z&6m?g3hTnuE4#9HFZ{)+*NA6d>=P%-PV^bI?ZQ{m`Wxbl*Nq-x|Bb_4ed%${>*ma@ zvgY1}Z|(;6@i-~Gn-k{l^Y-S7@2|gb4BR|EHp4S^8}wOb8df~`Ti*BdbCA01P2#aV zX+^UVGtCp_IHj?IZnc6^GWeyPWjKgI2~&K@d; z&5i5t@bs}*CQAGD4M;Z%MC}9!`M16v>2~Z(#R|)|>szVHyrJSPRI$4HNyGIQ^}}03 z8m@2YFIcg~ow04{-ZXf3tnaoB=el!^vE}&6vtp57r$Ro#MEn^Q->$;fRd`T^rw#Gl zo#F8_Gx36@`V&+b@cF3XU#rlL&s8c%J2wjZsnD;&Toulx5Uc6}vF7Vx17NE@1)42y zC%eV|T|*r7M*B_`?4iC1<3&ulH$h~TdtsBl3Nq)lFp+yc65eiC=NZ>7bFpMN$Ws@q7sB8bF`I23O^**9SzqBp5zb|(%B@1!`w z`&9a)viOCodL_i6`0rKnC#u+=!$h~VhiH<8 zqUy6M+@nf0i;vPG5+cI!5~fN~;;~mU62#`{NO$CAl!hwTIlI*J=uLVaN%5o4diI=X z&m1)(MbwVU&M&n506ldM=TKJyfLZw*o8Za zV|u?-)T0>E{v>2f@|~8!Ck{Xo-Y1H_3veHXfj7rkA0fj)i5#nCL}gOOlGpOuqg02Hf)9j=r+pI=9TyrRsx_^@c@rY`zR|?5wR)`)cOkT=M7MC% z9xy(A@P(K)T)WP6?M8}mM+-7- z;DEUPLZzx?w90gu6DfP`Q=DCCMiWBgF3PsnE{`T^jB1M6YT=%bOl28&Q`A~p+Ksrl z_sB>|x6-+RNO3eiNx@a(4z8WojaaDbC}OK^FuM_NRK+%$(Kj(yp&C=M7NsV2+0Ff(^k6yF(6T~dc=T3 z#lX!Bv!4L9-H9a*X=QQ2mubHMiy=3DbZ>FZ?4<5u$Ip6o7lrTjcQMDnj&DoNF{mWp zM3yfx)ZiFY8gxTW=)f_sQ%EMktd?>+h2J_P$3V{u)Z@R&6Q&>t5S1qD_{P2ahJnPT%7S5VAtFWo5X;uaYH#zqWR>W0yB!Z*Dhn`4Zy-Z1emd zrT=8xd-n7z4CAy|13?OrAD8NO_%O!*5P6RNUdKs@($-5s;0DSX07l{aEC&p)Wp2lJ zh+fOl+>|hP#5!!-N-@as!hbZeuQB_96Hu$){iVnKU~-~M>`TIBKdKq4MV^5i_g5ab z;S!g7hbM@XW`J7<2G{j03tU85$zsk29(enrtiOYWmn3(7jg%K5{N$Q!H|4E%E3ah_ zp7gkd`^HgrVgJzM5$@lmxUJjWa{u>t6#AIAg4GSm*l);zsmkr zg>f{iQQWISzY23zc&7^MRQQAnpBJ?y2^Wa`==2nFcF)@BV-iP<${N+Buqif9cC&KpYrI2&z^TP38q+(nXzZj|xl_S@glxMX^U+>~gfHovC210!iPL_C zyadyZg+wxK?AMAm4%yIdZ}AmECXj?TTYZHV#8ci$+KY43DZG0rw2+tZ?8Of!kDVKC zvg9j}8#T$!q8`;`^7thCW0uFOmcgGNAejLR%MzaUl`SrtvuZIB!pP>3f8!=xkNQX` z<+!iDCHzEU2S?rE9UONbg4minB;Py;D#;HwNpV_mlD`$QZHG}(j8ao@O> zCOD(tF-KbdKkO@G*Yq+55AKMKRe2qWy=`Hr4|O1fqIBn8Q~uG-rDKQs0h+fF?S7e~R_1?(ptK!kPP0?teb1 zGPK<36e`z@yk=F7T%7OWa*&s4<>@A8EA>I+mRI@fJY<%h=OnfJ%NDnvF(oH=F(s4r z6g1VyhfWQW2h~&3?!RsR*!k`A%9e~>@=b_mcsm4A0zepstg{;}L!EhJ=e1v7Rx-Ba zn;W=q*;70T_8jNN>H&ZL0NNiM@3cWEB7BnbX@|zxu%TeUevwqT-jE+rF z9T|Qi&4?^^_r@B6&+xOQcV1gQJ}^T9lr#RM&($K=rB#b-lW&{b)pGO&%tPM^5e@le z{|$e=&_{~h2*;XiwBRyAf7ic&bQ@k!7MuRAUySwM_64P|M{s=N^8x?olsx!4q(j$` zqzP=N=raB$O0heBOBFt)OWqxv5*~wWeC&^?xwgan!J%m zes74EdZ%ZaSD}h^N7&ndV2L(fMwT%V7Z`{`*VCUtJ}|ps^Y9b8vDM-r+Cilz5f<2= zE$`k;r7o7yljYq91EMjR0K)8UxtoYErpR14UnUZbODSrtEpU5Tt#PW%t*Kz^%hP0R z9b(u%Oqa20*igpz`(b+>`$(e_w(F?35ALk zxg)8Zip_Q(3W??SSc+I8wckg{_gssPiLJ*i?G<9z@lAsnTgf*YO%L@0m5kfSDfN(C zU=ULgorj;Xt|16vorVBc(h@?Q>Cq(>1X7IbVG{g@v#JPHJkj; z;!4{*H+iU)QFxEH#FGv)9UOcgDB2{8ZdFB9bUUO4sDo)_wh)M8d6;yndv+3K7z5bf z)uipI@aUqdaj>2#K^#PN8Xe<{JAxoK>&7)|2wN*Wx}<`z2@n#9h)fVW0YAfHydD5C zyLN+y(V$^$tnlcv3PwF(c$T7WHGYZQH!fb3XrGKY*a;T;cyRtx`Pu z*g&VKc_TeuyxT8*gjlj|aI9D|#vR4hFbhJ?$NwYNFfUw`m)j}KRGVeJ4q__sUub+72E=OV`2)x6fxYvCBh#-je?1Of zwl96)@tJFRXFHpAwma948}D0;Q_HngFav3O-o;MCf4^*)53xoW`=4dQ{4)DVned^^ ze!{i+4xFPNUIsCE9GRx#EOW)JD^Tw~7dsPgU6w+w$M2P~6DF0rsleu$ve-G!Io`Gr z=bT3@1;K6n&h_K{M9EsBQ+$%n<74{_pF zgk&RMymBKPa@W)VN~6g82nZS}eVtg-FKmG0HGIr`Di2+Ydx~zq?KQxTmW-3z?#6NH z%~ni&Y`c4kzh|X~Z+rN{^ji({11ul3eLkkbf2c4FYapd}-d^9K(rZ;n>{KfErV7a) z2F00ei_oCw2w`^>lAjGaNlcfa*jqn5M(lYe5+|egL-*Nfz?|U5ba?u9z5)NEMb(Jz1CG7HL}&-I4pL9Ll#ix;)M7Fa3Rw_Gg}*J23Ks(b8_6v28fn ztvdkj0CtGjvme7|@+fw>ExcQN1e*@hj5rR1SbL#6z<1SqvH74o;u8=bK=KJ_TYB6_ zoC3RF8kVEe&An|Tt8VcVuOJ0?DSq;cZSg+>UO}>d%_pd10uZqaGLW4W69p?KROJ|3 zVmk)Aa#2O3jzc>IDv<#hYRN4~WNrcJ&*WfBPdYM05}8BGVYL_1lyM@*htSRnjA{NY zN8p6XPdjnigSz?7qz#CRZ%^Vb(J$?`#Db*5Fp4I1K-+xUtjcL$7j|8Y>l1rUdjGT0 zUTFiXC+hBZ{~-achXHXvI0K0w!V>~{A44X6!;|KDfgTY8dN+e6#l+nJO+DcA(*Vgf z(Vc7(-F0r#PDZ>Pb#;@lJ3LpLhJ_$*WW-xhxv`5jZD!EKKRJ0`O&TO2!{;BmtARl? zVqc-{cZYVm@*oF=mnOl?=fOPB5-MIcBf$g>t2{lYY9e|S=q0S?= zjzL$Sck5uUFp(_65#&mS%Lci?<2fo%3r^p8(o1 z3t@I_VK%rx9h=g=0PtXjPY==$jDJ!P-~s@I@PV9iZXN)7>|A_Dk6Ri)rfGaf8~Ulx zEyilVoTfDYq81EWDjAUU`D4*cp025}WVgu82|U7Fz{T-S{V*SN&p+ROh!2uIA7szZ zUed82Y9~Qv!b!b=Z%1jl>FiHI;$JP+OE8uXqvWS$S5A^W(6P0(2jl`oq854yqP6oV zFJwnCZxa1rXJRo6rg$jDL{bWOoLnHO<8J%)GOSdzp8fcBaR`voikOM8^ZIwRiy<&G zxyv&HLog(;PPNZNm%~!y`AxkZ!7iVNE}xfOvbT+h={)A0@R=y2m)!R2f$;kCMc6Hf z@OmJ;J{u-d&jVp7zPa%EOSW3iuZ598gly9<8P{M);VH&V( zPBuJa62gvC&pa6qmTvGt%jsg2J9TlvZOZbKAxN?zk&_yO zyPO!}1OB_|(5BabI(}xnjy4bha{bEiyU#&F$C{smfA~1~hr5n7!Wh{>`q1QUo82HT zoI!`}OXNllS8?f22S%Ipm1%>VT2MUT5Jjwx{itgDgg|KVfbWr^?358_54=M<54Mpq zku^^-`2I#^#!|}6d#H?)r3t`BtU+3kjYuk4HsT}AQ&IzeBWzM?;9k0AJuh20!Iyeo z00!%2*k2PH@j)WXaK21|(@uIp5G7d1`0PDV$3YA!ST7^iAlQiF`)ktsn;)XI-4jhJ zHN-Cbo}zI9cHuUP#s}Gj$wY60WEUFbuukcT<>QEv{)_{tKw<@XbYmm20+N(Zu*ME|XAp$}|3aNm-p4P0q)R%Vl)C8J!&x-D>s&sX-nibgn{q zj9{FE*_mbXM2D0AGfb4VkiLXvG6n%Wj20{1Ou>&#luL0 zG(J!4uSgm#_Fvcge}YHeBEYi{r3=z0n@uyXo%z(uGpm?QuvoJ!E?qxuHqPz~twUq2 zL*qhjbkd@kv#lAi){HnD=U-Z28w1|N+B?=#QhJ>2<^o&nl*ek<+iJil_)4)L6gy=6 zG(cX9l5u>=4&K^k7T5+89Lki;hV|=lxW4=zrBqAOW%w)yq$Z@|97ss32e74(;9B?CsU{fkt4kGu147;NggB&lI=Wq|QLU<1K zBClHW9G*c|kmo=)##~}UH7>+<5Ty}@-6$5d&f#8|2RlNwnD5XJe1}}gcbLn3hX+g3 zW5|6FEPzD}_lm|p^|FhqyI}#0_zvRm-NS|$isRtyDc&kcI)meYCNsz3z7lX8#@?L1 zz!>x(J+mP1NfmBY;cF^nyI9C?F~szy@c4n#@K92DQsSj>kqTF;@BtNW?BYN_MKoTW z)H7kk=**E_?At|3>A;@03r1v$+?V?g6bFX)iZv@=yps?0%Zj2Vm92@LRCe>KRb`8@ z89xE@*HB|t_kDZu z*u@V+Bw*F5q*4oNwU-w@pExNI;%$|?EWaf!P7sejyTMHQJUsW7|I%k*gAl=gl+kBk z-Kc`q@fj-FuAzJV@)|}FyMsiQY>VhVZwb}2htooj*VHrAN6zqv5DUJh_#lGV{^~8& zPGIF*%0*{j0ogXTqiHyQ$3X0KM1>d96NJEN?}LI4!(L@LksNjiMJ!>0L$G zI$X=cwj*VA*mWpd7M6$mRhDpCPVMUq5}^tw-n{)u<8|CiC#Dgm%bpxfM}CphEcQOp zHOR4gEm6c(3JT9fkz_xF=TcD4>a|C`O1Y^j>a>LCQFgy*(l&D$DF9)NXEJeTSxguF z8DAkc8gIH>y0O-lbR!%_ejW?x)h>>nhPNK0uU*uQ@EI2|I>@;ZI%A@YS-O!iQsXC2 z0i?Co-kpro85dKZSZi0HQHw?1o}Raf=dN<}5>I^K_K0Cea>5ZRpTr4V&4EBnae`Y2dzY%%++{Bs-!=Y1zt3tH*ZnfxE842llf>+M(r*->_OXYuYHMd_j})(M96Caz z%uPrXMIXS&2lHyL^C#wrl+)o(vAbY^yGveeKwe5D`}#+Udxs7fDq4S*{;?>!GcLI& z4FD;}+-1$Z7s@dyu%lSYnlV~l>aoN9bGMcMJpDRDq)balTR-)%Q@B?Tbc@D~SbK7- zM%j&TMc%#ESdn`l67ugGXcw8W$({$F1PAqDjK&Az#IAt}V#t%}F2^#ATt3TA?aqpW zRYNEo6p1y-8L^^;D(}7$VoaHh5MydUZLzt2kV_0HALtUk8t_*?6>AzH8s&Z!N-%KT zGO0JXj!1WW1)w_=2~VNiY;l6}_EX-k!B4zNicr;1ULWzw7&x0rsl`2vJzfLCT97Up z?;ebm`QqL#QA%0O!nnaR!0|oa5PxA-uCZS{7neN1;l|QDQL=JN?@w=rjm86;(uawK z>(hrCQ^e(?25ch{suVHge-bB)gN}jjo`p2|uwLGv!j&q#L!3A{%o76)kExU<4#l+( z3``RBI}?i7QHNeRFBs9)%Gr9)Agr8Vcs8824>Z9b$6r8wqo*a_^6#yqmWzz+!t-87 zZ(_lA_qA|ueTxRHXGzY_k|L6_9j=qG5Ern9FECH{5{3vT#f)6O$?qK^1q_`T` z1n_sI)A2fH7?#vuBP+P1HXvr(Ll-GOaF`DvQzj5TQunt>0Rmby<(EH}=v@Q|QUeUn z&eCso`*gzYw37)0UR~*6KkRc9v4mCQRmZ;oE+J%cb*=orVs-8D;D4n%#K+?YjB`EEX@wmsDqrtE z=NZHALiqIj*HE!*dwO^Amz#&~5x#Jo713g9 ztQ1FjB;)ufu#~#_dz4mEqf$I})xZQ^MjO%Xq01;ahYBvEqGpoEZiK9(#s|VrDEVRHiIkaHz6x2&;(Y}2%Of0uB0^~E9q-kNzIUzbVA5Vx;40x;#{rvVywQr zj2@TEs26WlwTzyW%V=g-%V;51Q2(*y%S7d;5C&~cNG=d5V-t(T)@AO*m^C!Zu#DcT z!iU6jaM-?ZdGE}1-TAK+ALl@HveE$C*7E^LZbp9Wu9TwBWXo_(a zF4NDwnBt=}WCbN5DM(|{3TjKCdp4KzZ!f0N{81`DP+!EvRBV(VUQB8IJIi89FN(7- zrnJO$UQAy=8kjG%fCU!Qn80Eh+i@}VMDqus*D4p&xQ>fyd~h+ff(|fbLKf5U=U7a0 zJ1nMoj6;2@c34a=>aduqrByAaKk2ZTUi^RCVmjlDuhb0To|E99g|yGvcluAfm|h}W zi5XF1nm=)n82{$5e=JL$I=IN`Q1t!fo^7{j z>Pz+iEw0N%@Ediw?D1c}oIXH)s4f({$0RoYrx(}65f_Z~b+NdP7B{uJ66{$QWcozq zB?AYFBWwD{o81p#lMi#!VLk}FhDz^C6Vs2tL6y8K1j{@V0>fl@nk4ys>b|2i{}7c* z=kz|D)636SC{)k|>d)nK ztXzP|<#T$Ru~|tsIsDY7n_l_M67U!nerhAfzg-%BVm55NQAmUnhNOw%C$#BNn3~Ll zp=_d+jsdd##~}_}q~)s7;taHBc1S!8@q&;z9jT=m5F3aA3CrFA36N1YaQ5il`&o_` zY68al2#GY@+mg^6x2+I;V~N4RvE`L^b2k@?MCZG$SJKr+Ky-U>a;JcARKS%G#b;Tl zmk8il3OKCX0eB(1Mp@5_W^hYfcq417$8JTGZ^?j0B=^nGZ=UV z1JCHtQaZsQ`3^eq$>LL>ZaB}v^lY`6HcDPYqmJqEP%?E2R4J-^J+H=IrOpnd@(fU^ z1%cGA=D|)hU^^Nx1P$<^0Yg*+eB1yZH^AJ97Hn57@No-#+ydVZ%!ADUz6roH06Yu8 zGZgSF2A;*hHv{%21v`sjXEE%oVDFfiY-e`QZO^vT1B1s;s!X&m$nM?q|6}i6;Hs+9 z{_(TV-iLF50~~IGfCi!*yn}ZI1(gi(5|$N-87e9yUMfrT2%8Fv$_mn4W>!|dlW$|* z#z_-vtZ~xHx3rwm%4V>f$r>vtD+;UM_gQQ0eKt3NKAsBnP3-mX5IK)>M7$bK8W}KU*Qs4I9F(1 z=mU2tf|dM1dW*NelE#7M?WT94*aFkDx8}RiT;uKEB45xAcrfemV7lYMWaGhfmk%bJ zKbUO(U^d{vtm6*`rk1n$lgZ{!CR;uk(azSDi^|+!HAZEtP+2u9OGIV4s4P)d25Yu> zM{;>(t58|B90j?&u3TPMF4d)j)riX4j)LXJOTyog><-=$ADH#>x#ErCk{Oa=i6%D9 zdtn}V?1QmgG%rCmFP}FrAI;OhTeN49;8gj%ZTY-y`7QdPb<_49weoY=plC5XMa9R0 zb3PrL^Fd@Xh9(J?kzraIVI*1xX)O#*vM0+AhjWmW!`Z^yTg3n)uZP4S#NlvuIw^^i z$Z_CoENh`8(tbL9plJ9SpQ^te74*beZ+5yHy6g0j8}t<= z6+1uVK}4#K{Fb6Zb>v5ia@7%a85{j-kC^`DNWo4}7qkt_6*}R>KKo-7xU{QF8(kNkwNas*ga z9(grxU%B)Q64lzu@+hiYxlH7qEsvt6DY*jNrAKkIoZ|&}rd*HaXT1VET^>yeA`=8u zUmi_os}qOuS~uy@q`o1cje0bl7)xj~Ab;K}J&N``l}U60jFaXl)Q{6%0p&+wTfu~K zqji3Md%39bBOie-4p$K~y$j zN^p-J<)JYw!7X~H-ynAeuC)rRg(`QGcz?_hz|gL#h~e9awdX5h=i%i|>W0^v(s$~~R1k0L458x+nM6wX$}8kmy8I)lPEJ2na{sBvow{3MPTBu*G4 zPFBQ{5nIBPBsLl(o$~<9Il8pFeQb}oC0l>(x&Bl>gZ=r`blgz zNbE64?5l`1FeQoYMk8KA>2HX_Z@c30%AVM0P}pox*isQ|U`h&mbdZSagKEj!NGHk!v_C9k-`m5 zVNbzeg&@HHtT5Riw%ejERz-x}e7wgM`tfVkz`65wyd-r*mVw1XN94|x6Q3$HbVLri z|5EDe0mY9UH|I@+3dWxd_;)wwO%i${dyS-*1j-%*-VYQ*S7h7PZ799T$U1g&-ULmz zt4|vVeQ^_**43w;qO2(mJrTE+E6J_(ksdTx@8lV;kv= z91Y%E`Yqc33}tYok-J>0h0;irkmRsvjgTD2b0>NvuvPbalG@Q0ArlSJi^ndSGk5OI zuvSKT`VLcx5Urh8vu0<{zOk zvY!k$EQ6JnA~M-Wh8yfr-Pq&bc1^LLh+#i2O!8{6(qKcfeR~2o*ypJ4($Z$b2IuY{ zKkTtn(Jup+r~PeG)}xSn+eElT!iI{-LlXX4hAO=;zzdh*NEuF$;anNsBEu>fG77=) z9u*<;zMT-xnkK-OoeKU-IZjrqbd3qTRD$E#ls_lMur-^zdDtG(8#zNiht~J^ur;fo zP_lVa*XTiLNCt{hgCv9hE4gP+hwdM1n0YkX^BK7NvMzv9o)VO32jp`?O^Xd%08Bq6&I;D{C+i;M6npa zD<-oNup37P@McPr62br;AQ-?a^{a?v6xWsdW_`}p@tbF5z^L4aV!z2dvc%LptN8|L z@s95%9sIzBb-7WoGWOm~4S-D&eInC@yt$dA`}bRtBX8X($4@|gI? zpQg~7M|lR(OydwK0&j9lv0OU%z#$SHs;eYKWJ)##Afu&N?hk~+g^&!fTw1!Qc|^ew z%jGg*E+;LT{42EEh}2{A=vSQ1e?*kTc@nqlCB$;iQEEG4xvQvIifb1IE{#i9Xxb1| z4JZINKB{sdEn8XvJ?># z%N;{*mZYCM9C5$90TZ215e35h_YP3l}qVzAzpiJaR{|W$nZk- zIb;D9&7q<&#>J&_FST*9kY=SdmV{vYidJgeMgU}cxl}H<5P%g{2+3e8xo%D)Kjeu0 zGJxYn?U1L%Iw_9;lGvR}wMi&9@l|R zmXTwi_PbzqmoGJThqIS}HACZR^;g)p1)U`+SEhNh8};?8d;9 zP7l|o1hf_*Ao13Pa~zlfktM5fyAP@{zjS2nHxu_zhVt!@|4>y)O+}tz*id7-7kZB@T~vvy;Q{ z!%bQ3Vd?f*Vakdv9v-c+?!%*_gf*)}c=`dRH7iy>H%4PiD3=?wdJ`*vWdFQ~?O75K z%V$MOF&jNNCWfX&ijCcz>houjKvZ-;j zHE1~WPPKkG+WIyH0<629X)$e}6Rb6`Hia{-+4!VXDY!`1C_p2 zY0c0*BIUq~Z<5}+`t}R2;>}!@h?xy4^FtXepk^q>`SVCk&JX!oKp6(4Hxbe1;=1|o zyL{--oA+TKnpaj$l|c*3PaZoe^M-H}zXv}HhN<3I3mgPE#sUWd?qq>ofTJz2 z6R;j-NeDnfqy=^Wc3WU=dB=_O&1Ih@0XJBhL`_23M8H83P6T`j;6Mpq0=Vn)<7CQI z7%J|Hgf2jEO1KN)1i%3jP5>Ma*dgI~z;S>z3C97p_6GHiwKu4Dti3_K6TMvbcPDj^ zwKu4Hti3_KW9<#<9qZ$`Q14`P)H{YL;|{v#SM42ZZ&2@0Z|KHgqVBN{4(c9jZ&2@8 zdxLt%+8fk6*507ru|AFtdPk1`Isek&`4xIc7lV%mk9BZR_gH&_ddJ!u)H~MRpx&|e z2KA1$H>h{4y+OUhABQgAnpsCTTrLA_(`4eA|hZ&2@8 zdxLsM_J+=llvDRuM<;cU^>JLNcYOa=@4%Gzufce%y+OTW?G5T3Yj05Rn7yH+`>A`Z zgM+%q+8fk6*507ru|AFq^-jjm^p5_YU_92|px&|chK>(}r903Y)IHYTpx&|e2KA1$ zH>h{4y+OTWeH<6+o#tZw{}$tsd`CxXE#1Mt>E_@-Z&2@8dxLt%+8fk6*507rvGxY_ zjvAt$&xfvT_#=a*z@WS#w zVi_1e8L%@zk579x1Ma4saEXzP$JcfmZcOgY3A@f`>~-_Wz`-gx$zJ`L%`(w^2as@S zktAn&Nz3a{WnFO{s{H7v^`3|9HId++fm0hwyr4uc@|2FggI_~==bp*d*}3}Om= zZ{Fp6ndoZ{9FtHU9onmRP?4lj$WT{PwC^>d;3xpt*2<+LXzXP54Arx;w6Rs_F|Qc7<-)vDH>sR-sbx+3^0 z%I|Bh0R^?TzQRpSQTp?In6!6OQMtm)VQCYtjJ%(re+V6k-PwtSxaLr?La> z)OhTdxyd%52^P6eSwT|Twd5AKac1C0p6bTIrytCBlS=`U)I>LlCMdd5Q!e*HI!M-= z!`+Y?P&W5NDj;sAo{Y^KAk@;A4f2C<1-fjoAA~{wWkdYn7Jx(jV2v*Pm>RU!=x%z( z%3#^EoX57urR4QP?+43c zXNNc=cDFn-4xwXb97^+CRvQ`{*T%r$MsAINIfg3s6*nprS%HfT3{qIhLaw=_F_=~5ih^1r3G!ZJSn-6euMSDGm+e|d_IBEO_q)hJnq`b@IVvTJC`ms zs_oDJ(hN{7%v5{k70#OnmjKsZJ57D5JX1YrM~NpVO&UeV;sb5=6isnmOYu=zrPI_| znQBVr#7WW+K&I-3?f(~tj)fz)XZogG+n!PYx9`7yT%dz}{1+{ejQl&>7PvXky=a#Y<=2G`H`7#J-oOF+-Kr z%ew7KDPu>T?G(TsNK4Vh>2dbdD0dfnwuTkLjob&o-hehf0A`k^jNCnLK+0srUKPSB zmc!NC9+bP4-MAC}+?u+QtGD!*qmmu{prCq4Y>_VNgJe=4M}luTsdPTViKGDEnK^uh!qFLkhlA@&`jOLb}a7UwIA!c z`}1$3;n)qM{=K0o{n-yw;>JQR)C+atuudi6$1wQqxXF)X_$8}7oDidQVLKKCM!BI! zH4>bi5GJt~*Yt>)xk7@Zo=(Yzn$@ck{<92E%aH4B1CMXlBMb-EqH>8cJQXJFTpKNbkp=DtHhEPL8M-@>rJ6X zpd}Wyr$%5^9(WWp7B>WGxjcR~NoR`qG>FARO4C#sAQc006F`Fbp7hBu<(HPeJ^`ul z@7_u?K(D+&=D(arviyCx5kMFPM7%ryO+<4&BsvVqVYmfA%$=lD)anr+fsibM!z2*x z;wlDF>2^plM_KYnA~hi#QmIL#A_0?r9H(;t?O0LY-N%xlF7t`be)LCT8R1yC4$fekl1 zV%#D1$^|_a=pa%JBBXsncSFOCy4>hibWu|k8qtv(1L_(7owxKn5FtGe(4DsJJyA}l zE=x?8?g*qe0u1o7zudY2C1y0M&Y zV)}?Kk=)}2sSuG@hV$eA;JkDI(1dtXVl4(_D$hIz_?*mZK)fL_LJJxjSL7$so#UNF z-dTxv2JthTMk3EU4fwRot4F+E(f}7ocVSVclPx?Cf2Kl%fu8A>=ZJgJGbR4Dto}kQ zO0XIl9W5CPjTIMHn~IV{n^aUhT46aUhUJL#{C|pRx|AKU#yL{=WK+BhntgcZ5#Dj_AR@W}BBw1bC0D=6PeTy$U zPXbPSE~_ca6`ZLmVT#G5B(ShYq;bnoB}}z ze=gx@jxQ-Y9^Z7;5bJn@GF*=JJa7&~mVZf`LWtKK@jAf;PdV4{uPgG8Mt zz9JIc%6Vi-fsfPZX!=vmAwuR8Mp8trJzO42UThWk4JPnVdFZ!v|Q%oG|KfWjx&i ztha@Q;6{}^0Zk2~(17y8Cm@gHNXiJOYAhNVaSNif+>9VANDz_NBWRGQwQKZ912gJ& zo&qUl-Ns3fL5+>Ll)G2@Nt~~cBq|LOReGd>DM^rzgmAJ8a1z%!qOj&5Q4j+AXDcGM zAdO`CBZ$0Od#)nVz>Fg4ex3F+B#G|0>rA@y$H^9gByrLpQE!kqT@h(uauRAS`AFcm zQG(KyL}Akeq9A(WuyGqlDr8R_tB5o(b$K7;BY~6n4T^I+M$g{wC$Y~UvELwZpd!-1 zloZI90q+U2Ks+x2RSp~BuJJj3YW4w9K%=k#0G=J zMuWtribw-fQXp3b{5Hx^dO1;e{Ys)B$AobkHO6hM(JLYiRAW#WBx+FnH$>u%hy5hZ zmm6ckAW>BjXnHeq&4+B9**5 zQOzb?e3aemh0# zagi}D3c1g1Te*wE(*a@|$l&IkpGk1fd@GQssiGA=bNu~7Y6MS=PorC?t2yII#x zqdlPO=*M*@|E;oh12Ao}E2~f~Do|7NN=s;4XrFppf$HY=A+Nx;(2zMPu#0x4OLQx- zIsdlMRg+S?vkd#-zO4VAcsGlimr~K8O$heRTv$G=Sr-$=_Oq0c{86keNon8$beGUW zC3|L7cJ2mpKerEArgD>JqhS~Fr`h;u2kgcU&}v0F%^DX%dtm?ZD32r7i9x|`&rOJA zo<9Y79D};RI;2n`@SLE0s1RhZnNzSqbS0?}u-fB8AW1hf+8y9d;`=~94v6cf>|j&= z5f6(#<2@exiX`^H%;*&5D0`C95{EiG_EkyjuSj#80*zduI*^|S+zm;r-z=o}gzA7- zh{$b3I-E@?kEM7W2QW#?CanS1K-im-*qgw%Ycbr>qmsd%1eS6F_H*LBifeb{V<}mR z{dBplHv<1@=Q>j0{s`I7o(LWSB3*88R%BA?-v{c`h1^@E;OBCqw!Y zkOY5_4AVsTu--M0?Wu)diD5HhJuG%icc^--gt&e+fy)Tod^IfE4I}-41AV%9*pfm1yjBL8|a8Pb|CrL_%-92oE2BreU{OTePk3C)>k5#Vjha$CHxnM5{Q?fx;5A=sYEy(;R=M6Fy9U}{Yq}X zeU(fw;ObUz72pDXAH|3jgG5RCu#b*|5bZlmC2StcM{JpCmYvl6srq3^U6pRw%bzOq zVQy6a8fq2i`j8?5cZGq47+1F!E)XIbZDYnZk^(f=m*M0VgVvyFsC*g1C6;Q8?L2H3 zwO37>TGq%~xDN+wHHo|$+Bc#Nt|bT;TdIMnaoi2T7BK!=={(im952e5ctv})Jsxm%ytdG4)(94cH)M;`xV zl(gz@?ZXD{wSt^5G+^(p^`n9>QS{*%%3FQ7<|LHCLuUPM*r5~2okI3(brQLDe<|Yg`EY=$Kd*0VErunum?m|2tVk_eL zP>fzf>*LwS?~FEnFJ=H9|HN>@Vy)Kdj0Nw1>*wS5#`1HWC;Co$V^OVDY~+t;6PmfP zoyW6*-vn(CuhK7Kd>{XWyseN+6l)bNovyTgJbtGu7aqnCNDy~ncwMnpQOWP33hk^k zAJ6;djPL#E>eOnYKZFN;@~1>LW^E_0Zu?5U5>49@kWrp9{#=J z?qcW*R>F5=OL&ZSWMA1rpCt0&gijP4M3tl;sRys)?nzeg&l`WEI4nMQ`SQW(mw)=< z&5<^Uu_tGcIL}25M^BsK_yXLBG;=q)Egzf@Zb>p`U!Z?=%eRko-&&9J7vL_WnY+(z z`Q&`?KSIv5FOCbi+R}wrkmi|nrFj3XPYyi+KO-44f1YuQw?=DA7`{E4i|X)h(8H_7 zXNSHpRS1cdo@DDOQvupf!_Ii;4QD`= zoJwUrN<-I-xY%y7_L0$pxhhn}Z?!VzRxM6sbS|gpI6iXy}mB>|^ z^XoUcks9(uLSjw$$DgK*!-7Yd1gN{QDgGhlDy|2Sjh*lZ0jb=cx*^f^JTg?0|FLHk z(yu0zARV-F8ohw0I5!c_M-;ynn;*0(o<>w%PLkI0Z;B@XQnyeILeA?F+7ws&aZn5NOO9L5X8SIaA`mCM6D|YF6}Q!blihDv>Jbdz>%%6(RbtE`w?Vl z(=~2u5}V>!>DaXE%uR8!&8f|3y(#`CAzd#v#g)$hz!*DzZRbfc3V+IDC`O`R*%YB2 z+u+X;QAUg1Dh|*lR0wTSk0(4;hZ|omIF=`B%jIHY69kas z{)(!eC@5yTn@otrwcI~gz&*MU8soTX?JnI-9ji`a26NW9Y%Wq3f8lHd^p-tMs*u!;i&jsOD zY)kj36!``hwy+W?{GP|l6DT|%B(|`OrvxJW&k9dK!|b;EJCbCY02d?IU#AA`ot{n} zJh=4IWQY}AOPY}OfzjqaAZ*IX|L8VQpGdp-??paG#ulir*b43>XCY=rpXdn_CaGlw zYHY#u+FH0D`2kx<_bB936KUhg+ zoRZX@B$03=qIT_{!{S)VvW^ricR$Qhu2k3;uPWiJ^0Gkp5bCIoy@>4LW+rZRbmT<@ zyG3Jm|Mn4RTH5g>wjPJPP#TP_|2Jza>zwRZ5pT1tV>i|fN_M=9(J$nMif9k%N$eR} zH;SULrv!l^zESiOYh0|zjiRb9Vx#C1%SO?fE@GpoKQ@Xk=NgrKpJ-DTu}@SHj;C$e zC#qyS@;qM0Ik2z-|31-{E@Gc(Vzk&Nx|25jJcP zOIa+Iep8RQ-P4{(8KH#VOs_KT>kb*#vc4a6jv4-<1XF3)A$y1nFO}g`8P1j=S49Wj z1MSNFtY@SDo)Xt7eOS9&Au~fFVp;8!LA{mktoB%+sH=Wo#g!|U7iDn&AkFXr632aj ztcMSfy3)uTL#=XHiNyy9JcM{416=tc9Yvs7_|ud(5Lfc?v&r~WaLZJRYZ$WesUQbZ z>LV04J{9RyT64ru#yH9tJ&S&EvPpr9_&R+Q79j9{6p{f6!)4;55K5&D;onz?qT+&q zGA{g^$ScsQI2|y3uzW9m+6e!qQ4N0K-+Kx43;)&<*hcslBhoMYy8~3Yk$#&k8|nC) zY*TJRB7FcxQ3Rs9!BmZswGzMf+M9xjEKJPvys}`b6Xwb|R1!ReAnB%qP6zz5pZ(Yq zpQi@0w89uCJG(u>P3$p}^{$HYkbq~3xw8+I@K|DznYh3RV<{XZ;;vC_#i`z7otvq$ z4)|R8j+6)lwGwcO4*`?^Ah<_=|XnytvbVnSCbF3811)|x_y+aM)ey(KqP+0wbxW+i*RLD5|(a64#5^RiuBalyeYsziH0Y?3+ zFfmh&hn&iG{52(6`HbDZ3eD#V--)F#6EDohXD0@PYhWzGX#CneDITSsDW{>-&CT9; zJnW^4t~lIhGxwx`U3gg6zd1XxjlkpX*tUquxXqh151XOG=FL8Ek40}eLE;#2rnA;#!tx4Tolj)`dd0CwZS?zL>jp`cmJ zQiOlQ~iz@b8f>#8?i5}P< z!(rR6=^e-VecPuO)Xm8q(G7+h4TItM?ok`yQW;K&eu6upNSJrAGN24NA%feCR;;JB z)4yQdR_H1J@VO1#y^i9}EC~F-RuWc`1J27NZ7% z%dO>W*U*7%APGrmR~U0!h^GR)5_zZ|_7owiX49rh(1iouC}cQy;zzqmBla1rkRXdP z*>p5Cl_=m(c@Md6u(!)80vU@CE{>7UC($t8PLu~LQ+P$N&B2RYA)q4RPVY*ZgWGFu zp>Ai2Yh2&C3+wYIcmrzB zAI6U2sL8^R#i>_Qrn364M+C6_}*Pe&0pJ`J+enOA5-7^ZX-Kl!vgrqZ3dt?;nH5E7 zW<}K~S-cj^tca|V%`2%b9vx(cw?~ z`3ebIS@_E7mUE|XEOVzEId|$L=1x+nC@|-flU~K{z+7soJ6IGNz^?5Bnm1rm_)685KOWCNmL4}`!J;kSiq?d zQ@E?L)Xtw`XcDvePKNx02DmGm;_dGZq@@vM&tRv%gkK-iF`1k}b!t~rW60|CIWdkw z1Jcr@s>U$RZl?U~x=qPwJ#7*zHrpSptmYE5N$HA5(uK2{e5c}IGe$=T>Kl=!Dy}H^7YkoPemdI%wk zL{sfI5)zkjwckO}zOyJ#b2f2FGR4)I6VZ#nYB`exuNfzJO(}A; zTw|u=q^XWJ-sCl0!85NluQ^9Z6C|(sJpg3{nryq;Ms|g&nW^=Ye?q52>BoWjS2m?B-88jTY0P&7Y+lVlRH;xP+BG7iCUn zXvJ30b}|$HMam?FxmOu0wi>~A5?+9aO4_O@P4JzKcc*$_p^NjK4P85Xl%K?ctpVwd zr|=*I)7k!UFOTDh$#huJ8+|>>mz?XYJ=4o$$0DrjUM#C3q+>5TOk?i_#NPQ4U|PRo;U-&l0C$I~FD-ue}tFEUN3;9h)wE zu~rB^^8riG>ffDn87%Xjq#djy&p3)$&HlKqV!>AVX5U=<2pb#qV%K%Nq5jl*>faVvB4lH=oHlpO6xaL_Oo~m026P$DX#<+d~tQV0E zypr5p49j23d~=>TMf&=_V*1VCzs<8LUN^g$tRDa;Zd`NOJ8_TN_F^TOF}HcuqpoL~ z^3r^00=ylR)XgzszS%}BWA+dAW_(u0LKwfADNI;6mvdtb?6YvG=N}HE3n8#k3HZ7DncvQ8SI|$*vC350Lc34Pz8kFDH?09*p#s zRmY8s99L+I%z4yoLWbD{vL;3~Y5pb%V?5LZs>;Z)Hi4=#(ydLPdoj{mHX&XScb_qL zH%5k%LF0pBbcFcB*5*}ofJkY%7!@$aM#Cnf)vyrOAO1H-MaEp;{JJ?A`g|YE*=Edc z-O`;fGO@fYu1E}{An(eps%R8Oc~f*>{|d^E3g+r zcRzJ&^Fq%+dco;Eq6ejmCq)H)MHxV)H=9s9Z+!!XLnRg00YP7Lgv&>MPzLcd}e{g+nM`awN#)IXr&B%2{?A{h()Rz&=_ zX1ys+Nw`cSR`nfc2QnwCVkj#wGn1+>K{?NW(7~Tc$ zOTb$%3`0Y)LfoG zKda+PgUG4~cRh=bxZeZrI|SGr`%qY=?K5*v?|aJ79CT{g(v$cZ%5cGpJq6C&QICI7 zyabTCj(&t;-J?`mC}VxmkK%l$ii3)kR9bP78CooZJEH^^#YLPl1i~><-N{}$pW@Zu z1A_L7^rdJIBuy~wk0JGhh)p%qcY{*dSsH4keh26-6z0RFq^vpc*-i8iNei^9zqo=4^TE1&mq(r*XA!7-8h}P_|Cc-W3t`(zME$c)t!7MPjUU@_m+z1E-CA0w$ z3QA}lS@iuIiiWYYFS~E**sAYv4Kqcq@1&^0&6iyXt z7hR0UPxnWER(Sf_`#kNtNe}Ji4P(VY-my9?`{t}3S(pri6)V$6CDXxm`kIL_RnfgL zi%zna7SiuZ{`(^R?q8~oD^N!j7zm~P`=_fV1!_Xx$Xo8*mzAa7sb{KpD0!o{ssF6V zR3BCHl2@jWOa|2n-A9)ezL;gX)V#q3>WI8)$zPYMOAFMHyuvJQEBHfOUY1%5I^Wvz zMiq9WwyDbs)L`g5th{mxbRPBxdlT3zMcz(qac^%hTj2KgX;1s%R9){*WDg^q?G5p+ zXPdf4x7qhFj9&C1|Lsw%&vQ7Y`hBQ(kHzQ(b*W+WVi{QqPF78u7dFF@JIn=V?(XaH z7Sc8(*L&Cy?!{pd%Kn}02={iUrRqi;5D!guEWnEJIN$wPd^>P*@B#_D7g(2QY~%RO zZdUVjoMy*i_SW0I-IS*uZgj=4v*WSsm|oD|%?_W4a>MyMk~n5%){DdF`JUy zKZX_E0g`WnWD&cuv41kovSz-E$r)H_olDB0zKGf(xoO6z7{U_&kjzz~!LN7rt@(0r|gi zzXPNmryuc+qm`}v#${2IK5;li*PMr_wBl;uM6`Q|q^3Pb4RdKzfayQC`Uxnu06J#Z z0}2qW2w02X@_@e~WktXe;Q9he5XZR{cPu8)t-eMv9Lc{5T%pDcckX`(xq-+8O|)q* zhtQr9c8`O5gM$An8a$N1KZej00bkKzI(WlZRDkg3z7VDG6(!ATw?by%aoA4#QS^7K z2yDt%NZ{_=DME)>6U}q?`Jr*tql)zBUJ^?6DLI@zK6g}|a;bo9p~U}{alZjsJN&sn zh)~I;%7j1n8-4|U?l%!_oN!UNM8sVb-pY4>x*B(c6#i$0UsRYfx>qi%Ihn98aNIT5 zrw>mbkT!_T42aHU_&i(_v1av{tgPEI`i|;)-Kg|5I@)5jHSzt|-rF;f{S@MLv&Gq7 z2kSc68^B)g1+JNLwZV=%^j`d=-e(}2RQAbr5@?ulGCQB%bb!6w~e&=lpa8c591Wqa8WkDZ5AY_u`y?`;tN8oS)VI zt&he|MR`e8P!N9_20JC4T!o(H@rF(o6h`>p=Vqv6)mfJeoVBCol2mmunu!PZ&@zU-SUH z-t31;8ye9_c?mPni2ay&-Nn*pc$1ZJ!a;l)l3}0z_G@}VA|MxW=^%a|r8fu%@m_ok zKIQD2RnPC)hy1|rbKT7LUGF`l+zP=aZ#q520m^hXWw4iTTPLzUZ^h=aV~(Dl&V@8! z!EfiwaG4D6WR2(gMTO&2_MA+q;~|^zaL+jZMmEcCaEGuLhj~Lg4Ia`l?;U2C9ny#K zvl+iSR%cr$+po=vh3n#WS#ffC;m+7`v0RYJ_6IkfI{xveDgVIjDStuqMqKVf|BNu?u9CS#p>Xc!af}m43Fy=#cwymIVto|y| z5^VUd6iplhx@s5|OPWg2J`^?VKKudofFXZOflK2LNz>+2OI+G0AaaJ>6?6j50>u_^ zFQSG|c>17}2fT@t6#;hu*B5XN$x4AEF9ifif=_|qoP!@o5)eBxeZv2DNF_=UL;kJl z6P|1=Xj?*d0M8De@ZAY~&h!aikJ`1ZexLBeZu!b88BpOChE6vvszSSvf5}Yz4lvJ z?Ewp`{WDnY8o_EyEv)vWpVhKNs$j!qUEGXw+bH&O(qOM+0_V20kFSKW$!B9y97UL3 zx8b?7!EV#fBwWraKkAXl8e$R(SmKD-lArS!|3@0F;KoN~NV6z{Ka*jzUs%Dyd55(t zuOMc<|5?skITrgswqMA3iTx?3@p8`ZnDY{2#yr@vw&U>>TlxbyRzmzd?R#(C+i6G9ZkQBBUf%jCSzx8%ILL->T#;JkZUa^4qOao)X> z^Cp5eBuzW!ykjh!S5AH<=gkolT*-MQua%s4Tno;7SqsiP{{N+%cgt1naNg@5?~zP1 zU@x)Xt{uzPC(rL>mD4ch(E%*Bz?OKyKIY`8kQp4f3AyZ>76(-+5+8F=y)tZ8`s z0oLEC-0z$z#`SCoqe|YSnU!6@q_X;M+1Jc@? zAhX8dTC6&J_yAUaS^u6&BU&T%4Q|4pVM(D2 zhb;>V`H`z{_N%8dO4lchn7Oy4HsOULGRxK)R-hM3hYcBXH`0l!be|ZJ%;P%FZVrCp zN%occ<`GidxVi=J#1-1UpN}KedAUmYi{h&@ z?%Ms`T-)WJ*5A1MyR<}7!o;>p8yAZari;ahWu2CF;-F+S9PnV>g}|(b=Ca*vQ_22f9tOOP1Rd^qHJBYaiUj9N2slu@E^N>I%cHG zF&-=jh(B({z$C-+bH@G~BSKd&{8|nPf9G7dZ^Vc|qaL81@HcJG(c_?a`KNCW%l&k0 z?&Y6;G<@v1X1EVkzY2rz%eouZ?}X8Q?C8;$TCSHIjXjR>5A+dvpN`D~dd8LGeDG6A z=r{|$;nAJJmA(=?4pHkCCYLv@C$7ya>VGA5yXBpX`(>p;^Oi% z9i{t+?Wvel_K}G!jd7fbO5gGFV%94MH5UNng5!rA) zK+RDu6(H1tD?mjVC%}e^kWi}eG6G4}INk!~htPhvlG~5x9|6*N^q5K3#$aqe5cIHx&*KX|pasUn;saySgNoUg#XoK^&a5mh9B{Fx)CLX4{Njby{twiY7;hsqljimbzhV}tG#(vX2( zV0U)3S4@|10M@?^0qpC0J)_x?>$|+w`jFtw&Dg8SD#sbXs@uFH^*cw78Osln=@@xl zDGrfKaD?o-#kFi{DgCZ2#P8A9-wK-F*R`SyM2{K613391xX;#Z0H7`>gF$g{tc)EIHrW%>)>XxNG4muyxN%AU0 zegMHq-Ro5MUUgBX8kIS%+sdJ1*_5oPNcP2Y2+Kd{^LA}@gepwm|g6A=pCH+tTWJh(Z%?6QlcXTA1h?8K)5DbX#{fEe; zF)iH9nuo{%d*W=iB6)^<2YdNXLE;b@mi>>W_lprH$WO8GSCLL9$n4}O943V#!BzCZ1G1uirB=- zo@HyFPj#^+cX_k*J$Mso%Zs%7DEx~I|1LwaQA_EhV?beq3=?J8Pljz&r)4^^dn&g@ zhGf^7;1d)&ph!lhU&+AT-(`kjpHIV^OX)5dhEs@wi87S-`fP(_{&1N-o*n(R|4^16 zf{nn`3No~JFe*`=SPx7aG_>7C;gjDDj@1TZV~^eb^oUf}V`%Rf{n6HILN12u<6^iz zE{5x~h~Z)~iZ!9H*jFajgv~R5cPay7StBfBxUFFYHgag%S66($W&Y{5t_g#ZeG4&< zgS5`E zZNq@XgtGbWF~7oS&|3}%Yu9wtGh#HrnL{ZCq}i|+uoA?W{`Bo-SP8nYw7YE#13!?nxSo#Ga-*@G>;3A*SMP@S~c9{X&RfexO{oKN>zJ;!VJ}xp##Ys-q zhkSbVs26g#HkbN}L)yH2{+I1*l9iPkFi{=8Upl>D>+9vq#M??^9bImY^bSUDi-8+u zzA;hBzlc_Qdm{fbv3B-XevTFdu_bG{2u5Nh=6~|~xtZpWO#P)jskh-)?N{;+R(Qc( zXoVM*d@KwrJne&+WDKCTBPU>+4+6Wsxz^G0xmeQ8^>KmS=DWK=LYkQN@`ZYMm)p3! zu90xDu>bzwJ<7>)LEYxNgG|x}B|m24(K5Nnv;Bb<3-}ijOSHsNXpTP0Sm$xUTzvff z>%9La!0vbvh2RYfaYJZ{PCC>C$~6vaxQwo_6Gh7|thHVuoX;qJEnj`P9Jdn*m-8l6 z>KA1q{{-qi^XOMB?#MNglx12>QE`;>1x5KGx-=QZZBGd;RGg=8JpVcXVY5%)f@wcWnn5%5~FS)IxNYEJWFO3$QZd_M!w-CD(AG zdMwm-Q@K0=LUNWCaRPumaSG*4pc5?>E3c4mEg*z^`x7`xAj7L3iJmEwsR3#&3`XTx zz;$8~cR6o@6JpF*LG5GuH$6667f)>Oeev-v7DY9DQB;DS#-gZ3p~wxmXi-EVJp!>P zighJ)F&+q7#s94Ev<_u#u|B$jRz*U*)>svdBDq<i7SP~_%#F8Ek_QkVsarRMH&0@Djtc!4xm9_SU9zm@47Voniu8scue2)RU zu_8)Q#6oDHSP0edg-}}Ch0ty+gdjq@*s=!NglF*z3m*?#P-PH1-6LdZ=eCrg9f{RY ztK|>#EE=rYjrGriei_AwYXQR!CBS*2a{mR>Vd@n16B zCBxPS|Ml$ecR4TVIT|lDpUff*+b&x$ij zn`hTS9|ya$vtK_Y`b0E~w6Kh3nZ08u`}w;kN|HC4dK2c2!X{}#`WKfa&4OQ)n0ZB}mFWPox1k!F^0mkwDd+{`iVQjEin4K{nt2O;x`c`^h`8mk!6w z=Q@soXV0xS7_x89&wd+(vM+U}pTV}rU}z~w4dSd8k1Jz#YKuoT0(nLcn#|Sms5+uP zkv=~})ZYW|NS#Z5|K=S&e6-k9V6^>V6@7;J+)-0D;ES%1E?%0kK>D6?6&F9MvO8$s zQEdRSY0ih%7&zym{YI7it=UJ<;wjE&DR4O|sJzR$0$Kj`&mur7UpNRGKD29Tnnb*X zN+_y<4ciZv!yuc7hn|%kTITR6d`rLVDes~+(r~=5+D2)VJ#Qn20fTMNb%M1+;!4o zY`MsV0a;$ZQo*aQ&EZyQbpb31Sv=pSR0?3R`xsHZn^uSr5_Tt>5Vt$~DAmC;xsh6G zs)1YLexIOfQL@-g($oSX?MJuHPq<`mk^4i!y+`0qcfU%w9O4#hqb->Q?oSB1SD;RH zlXpM?(P@;M7P>}ezB`yY=sxNKEVJBCQ{E~8O^k7`M)w+EF4j0SuM^I{XS0T7sp)ME z;|bMgF*XMITR3%Sz6g zp78paG<9L78k0Fq9iORIDVf-$#}b44!e*T(rS?$E7R_X*x@vtaM_j_NNmcYH*7dme zP{*o+H{aH)4~skjJ(SCza)dMPC7Zg)P#7$s6Q5NbC=9Z`E}UvSG_&^~p)}`MrKGaj z8{jd?L-t6fgGddxOiNZwSml5?P1(+FzZwTtMaX9x8)1M%Si|M!Om+nsT7+cIBp?&| z!q6Y=SDo4oc1!5&hfJAZaq{vBEKX`p$9iDHh#&oUV9rF@Cl)^S)i6>r28TZ**p8DB z%RVd?K51mTg#5qvWXcCf{x81pVceuiEY>#gq79QK$}zF>IRb1bL2}i>`;hyAP#sJa zE1v?ae9}n+Wi_jRKDvnI-3;yQqt+4!sJ!4tbqy$gTCot@3d1I)U z?33^tGJIEtAG7gcj!V)FT|u%}M#V_v81>Oh5R8{YdeV7(fxS*w&el26{Ptm~110${C_(M=2`)7T^?Lw-Tdd;HYMs|^|ZlU4U*g195?!T_-1r4{F zG;eq2nblWg$0GYivFvU*RNS~63Tsz!ZHI@mT^`30j13P9Z^G;RGPjEKa1Bz6@dSjb zMLh~Rs<5ZaH7!U(gIlmoOLlqer^DEre|37<*U7`eSkdWN7ptV?b75r3)~kWW@7R>@ zyvcUW!xsL{iOnC@Nak-7ySqHfP+<=#(GL2X!Q_Uq8?VcZVn1A~hS}X77FrMddRF`Q zSg#`nk_-P}FFRr8(k*l;Qqk%$LVqnWB=wL2ql+s8W7dYIc4B+igDaN*&Ffy>FvG## zU*9W4fp^36Ud9%mj!tEXkHu$)cc*~{#xOvJ*;aLl$(>?j`wvVXFu0uqSN`6s=|hLG z?XNk7b;k?8`E4!K8gD*rNu!7Grzt7;RRRF55^w$jMDcdwSlp)4yKCB|eE=Ei?Nrj( zD(AdRb9_T-nv;t^nPN_vNc1y-byW5zA}Nf~-bS#nux3gwH4+(@uKmQxX;*Sky91aG zClOn#tOS7ojb<|72Zuu`)s>HY?afd=O94N)mN4Ivvqa5RMBowsq><*l+EF=aB$eOR z{GfOw5^2^rpcoNi2vmVGP|SjE3MPWeATie~3#QtX!2%+Fz|CP}Hgt!l>wl6TgtI?!|KXjzxtCScW!$O>? z%UOLuM|Z7QuK5Ev(>hOIE-QtT9i$ zvxhK`mcdy;w*b2(G&P&0)q6|Axqup8{#+Vd2(NDEmZJZMo!m{6YYwWvo-cVK>lX_PN zZ+$cy5u2LJzKczL=;Ge`-IxYE@&BuP1+4P%gxrgI;fJNS z_rj;m?Gwj7U!nBUQ+r_C;YFZHBJBQSza-jLv+KF9?d7&@&PKPESmbPU*_5K;U4n{6 zjEe;1R^uUaeX!{mcj0&>U8InQ(8Drbh}=Wz8RLNGI@oj)UO|8R5~!dYe(jGWgcrqE z$L~DYbUxjwx08Gh{+y1%4V7)cagaIKq#@J>h$2UjXXEkXO-GXK&FWY0MIHyC$Q*bX zMBV}5??<>loutVRHtj=vAJQn#D0kj0cO)Ig-3~T2A+rfcdl2rC1$QC73u%qafwyVyzn|c~$ zv;pfA&_~^lH=Ry;XlGnyd)1!h&D{X(4X9xq!gaD%ot%-84=~C!+I!Y)uei@M$U6g^ z8iX~nAo)C7g*3`*TkbTkuo`*fAFT>ul`L0@cqP&(&o*Gaj<(yn(X*xY8_!d;w;m|< zKqb$3D`fFyh%ZAL<Y2lE_eBHn1O{LX+|pXdkkM;8s%X`1 z9Sy4`Ah|>~V=>~3QOyB_#@#oW&2Kq6%79ZQ%atHrf^z2Q&~e`lX2F)vsTjz`vS1P7 zMJQ-}OlQn;ExUUW)ZvSuhdtM5IxsQPBUKt9ilG$U6<31cV8)TrA?T zNTWQXT(vnq&hT=^V~zq&lq{!v0C-T)`kXhI1zSF6H*nol(C+-Y>gKp2`i%##w?6Cb zW?AD|JHNi;W*X##e+TeI`AS~CQs)HPKJx=6nIpXIP2hj$Rj_FygP0`K*rXEN1o)Rf zdwTS`@#%0jo&)&5b%!)*rW)e8U2^`@BtYf4tFK{*os+*XuW&YQLHTpM{1!D{7q3I(W=>!;Cvah=;cVOl0%tjaO=bf& z^70#b`3v(7XX6HxKh4W;P<5l5*Kq>tIDrc@5ohBX5D?>JjoE-2UcQExw~mvxyu{hK z3gyK(S*4oY-RUjb7NtIc?l9#XK<=c*v_V~#PP|?LeSz(e{#>p(> zWN4tAz$AjE5EP?x-P3TeN)rn@+oklBQ@`wkW1X%#8<*&4gJ3#K%qA@6O<2sE@N-P3 z4CMvWDKpEL@bV?Re7j7?!gKUu5D-kK*d$QI2^4VxKgV>Yqr6}`)6Mb)ynF#K-yYMk z@EpByDhPv|#BypeS3H*# zp#_bNEApqG<>{wo`f)6`XuzHXRV=(PVDtZ*7Gh$!o=pFwzUAsdH&$Z*>XOUZI0$zx zhVUTs&eQmvr|~-%L%4$poo;^J`+Zv+-y~m-v!L z5=L|h$Gj%Wj^`dOVi6_wufh~kV&`h4de^$qr29mDw5FE~9r|dl>syM*(Z_M*;I`U9#Zpkj=tpeV@0x-pNx^kGp_78^WM<8@{&pqO(Y!JW zT-qS2O4ABCb*&c=9akZaP5eg@IF8xa2dSx@mCM+-si|Fb5Av~1&jm|Jwu5#Eu}x2k zyMYRMV^Qd|#AbUIyTA0O1fb7omwq5cAeQb69s?4}Aff=VbYE~hBFbO^p7RCMzNRvS zgjm$t2A|tQG=_;>lI@`SmEpX4DcdnZ07AASLja52WL8ue^9@RqY{z9pg+pAnVv*hS9W7V z8uIi4b*ej%D&Y{9%+I!D=DRPWOm26MOP-veOlb^hqV7(l?vh|`=pJMq!A0Ww?&;Ln z**gGo*^(&2l;C#V7TSOedQOp`FL37xTsVW~xDtft$W#b}YdVyQUado(T7RUmI z+h<#75fGQ*nr|X65`T^Gnu zZs3F^SPA5DK%9Z=3lsTHf!iQ)C3vpF7D{49WY0VvhYRBFRtj9Gx^ub`JPX_)&?CdP zmvLMjrIe=xa=k>B;AtS!&?X)Fn@z%-1?~xnE5Vb%T@Jj5a6Mt-{#M`~k+>2(2Hc&% zdmYysx{16^ARm&*5tSAzS1 zI}LdHP58OoM1DaaZ*KHG#WP;!1E+ zg-s7l0n#X3@0iH{BaqigWC?Bn;TgcW71vKD?ookTBXK3T2Dod1vlUlwC=iG-@n?Zs zEpa)hru4_!>_XKjKM3!I`a07tT4cDC}?gs+5say;;37#*<_yNu=T-!|C zdV$*@adiow12S0)-;C>h6Zs>7d`2Qm@GNlu0h|DwnK^NZyZb`m)=OLoo(3)nB#py0 z(8N6_a8H!Gb^dxt_#}|$0_iSX*PF;q0{Ms}EWu;I{S9zl#dV*FdtTrklDHB)ObrH3 z0GQ?r2*WsIQ^=$p`MKX;9>!b2696BeHUo7Wu8&Q0ja$G|YxhWO1KvlC2IgJ3qHzi0 zPKmu;VjJ)-U~d7|VO(Qz=>k1aqHmVy2D}C6LC`hnh3iI>cqfUyQDPhLCSd0Q^9Ec` znAmX=d!58K;0?gOR|o2|xcvtx0UxBUHo{{J>q4q4$uYe5NO}I{(=%Xa@dWmhor-A(tFv(;=7%C9=nJuwT zNNfW>3GBCl`6VvW848=u`Ttmneng@h@G+oAU{Wvu*L;)sIEj5oVjJ*bYB(@&!u5!W zohPyPOKbx^Kn-_e{O<(%K@)wVMBgLP4R{~59GG9?`r5>vEU~vsYy;i}>{y&}55tvA zJ;PtPe2KkTViSz{59Ss?_u!~F4c8PC{Z5I#QKB30CSYF;%v*8kCU&*NUMH~)cmuHC z1LpU*o-?tZkk~c4L^l%F06h^?&1_uno9ItV^lFK1z^hi+JSD)a#wG4?o5ZY?mU9O!$`$Y`#;2e3qVv={{P&$cVKvkGrWeEIy}??Q3oYokb;^K z;;XDstUy6QQK_s*go}wqWi6z6%&4%ewbs&FcQvu1)=g`z#d23$t+2JSvR2DB6Sw}K z?>Xnr42Z3@yT3m=_q@O7d(S=h+;hI?bG~2lJcS?7XI64IaeuXy+-G_UtgSJ{MmhfH z8*acncae z6iPn`_mDO0Z-{!2|Dz(O4_XtfVb(-MT9Xc16ZwC568QgkBqdRjh{qL4 z@%XRfhqMIs)0%ws5hefDgtFBgC z&Mb0U^Q{vCEbQt@u3um9xT2xTrRVm9$*$Q7`|5RoXWJGJ4(>ybg5Y;`=B&Gvu^|l_ z;dIip7!%3ONf=?d7MJJkhcE}PkgG6T`u4ibRk4oMDU1nKq5OTi@D z$|irBl3@87@P;qAHWv=&eIL+pVG@Lcd3OV@D8amzj9w;_lX7y?gy}=s-4_ktfB0F zXLLU$oE^uO&9ept&-*M7k@a+bG>;=|0C@7P2hfkqoL_Sqt3b z6pd-!3F(qq396OrYU#l~xT%*T06{lRuzSELeIG{>g0pzgWGW{Yr7NU+yNs`A`#; z!4H=7a$EtA1dAPGCoJT)2yZ-o}q|mV2^I<7W}7A55*dGsbnle$_egiOjDJG9+hqI> z>AouC_e=L98UKlN{{c6J`1w(0u;GJDe1=Q67r96u$X)i;GktisD3HOFQP75?kis zL}Yyxt_7tT^D-6|0ANz*E;tHJG`(6%!mtg!#_jd5a(65S;KrSSYm*y0E$-OTmU)2R zIKz5Td{}A6+?K^cuTRG!k6Ng2O&zL!I+g1iItpz|(WV!R4?CdBsJvw^;5zPZ3v|jq z68UkIu^gZscgv!gCMrdiX#wDI&os3_Yb~Yx6fK=pJ;}=Fpz=8_3#w3j)x}hf{8czk z3fKv(&Qj&8P&t*ZN9BSQN<(|_cA%C)4wzY_)~mvGmAgt`OmgvB_d}5A`!<)i5xs@$ zsc`qr*r`=soQ)fSs$0w|kDdw&(q057HI2L8@}RztRI}}ZF;qdLhdG~e*=?xUN z&)yD!;;~A_G?D%kIv7lQI~n9ru@?{&32ty?k{HKMLC|}Y>rxS1qX!irn=)F+{IEBG zd4oyG5~*}gS+EIAV2s6DmeagT%kfXxW6aF&&kdwDm)Rw zKbST3q?#M227gSU%S6e%U^?p}LUiajH`wWuniCvL_cB3nyG;*%mJ%*)p6u*)WrJVcnl!I|9r!=b@G$z|1EVcKbEr~Zj?S6XVctSqbDbp zm5muQsnS|zT`{lHdK<1Q@4OURP;Z-br*)q7)_I6uX1g$ae6?Txyi)ZkJzs4% z<uqD4S%gc4s=Wt~XNy+2O1nK&%QdQg^RKAT?O&{L&4JdS%LC$uQ9FzciOZ_<&syo1 zb(bZpUdy^$&AP{&b+3{g(#n+y<(fm{pjCD3pR(S}dLwIZ7S`nV-)SBt*W}x=Ccjou zHnQb~f%1UuArM{eJz!fgGD1@}c@NksGuVv}_j5459*;-I_F0cNM0(caiq4czZQ^jP ziEWr1BM;X;#-<^f@x!$?c8cQp;o2>r6eh!DJXiyQKW|NI z{yW7*mj?DCu%r|E(WCTUHmEHMLaC2XbPA4Dzt=4C340c1MnrQIVP)_g=+Fq%_dom8`W&`sRp1IRO9B=%tG1xY`d(* z&1-S0YJ2mdkc#5g0)`e;tWVJb{w!x=bfVxm^4zD&9)w(>@=J0BBc(plQ z9-?t`#zTxlEm3xV{o8t3%~VuV?^6x1XQ*Z>uO<%FM0u*2%Bz{mtC=dR5pRQdhy{3v z-fr#3yS2Bo8V@lT3|Q@W{}F@s^ajD@p^9K zsHJV_q}w>k%>5i6gaC>(4KSTNUEB4g?b^+OI~8v}_46a~c%Reg#oPax3C(lD2~4@$ z|5UsB2Za4kmEzaV84~wU%I~3+-@*yp!g0?nl=53B<+o5OZ$S)Tf&tI?0^AiT_vxsl2^BnSGU)vx=LPMC9kehR%i5vCRrWt z4WPP<*S3S#wv}qr5m}4hR-fu>d3CkCx?Q}w9X{37^6F}Nb+xiONuyXz9Y>!lZ&l)jY75#?xT7@d z^Kn@_3J-_T>I`dYl&+Tt9O~e&OQYJvn}OO2GfT(oR2>S4C0Q*p)ye|P;9r(zRM+I` z_w*sAvqrSKCRFWK-tT8_#s{17a5(VRv<>a_MI{6uT;5_%AoUs$aw;%H0y9+N%L-J0 z@uBJdQ%SEA$(FX^tI&DqL{Ikl9v%TJN3zkCF^Y(h6bN%A7%jC475blQR>V6~kB8mt zec1Y`dj1mC^QXO;Klx2~=7|$t?P$f2QO~C$_55kq%cm_~Bzohi4UBhx%YN}t?!i6A zQ8)AU0Utv{dvI!tPHu@)c}vnT{x3-*Loamqv8C%#xcdg4L31SJn2DEd9e)IyP`#KN z#8G2=ti3dKvi8z_yodS4;D$!75B5_-8*uJzY2ie&)AMVR&#y^7KMx5>;gkLT-<|~C z@}=VqSc#inSxzEuzPizrseECF>14LC7C(R#EOx&@oZ6Ev$zv%7(oJMlX{xCj3J~t2 zWWtE42F|h_Syhdq4V)z*7gfGCH*^K_#r&HTUC>07t^SE{_zHbEw+RzXX{6>r6Y$H^ zPBSHSI4bfzZ=%EMFnYvX<{o z!z@JcLoVmoKxDRDsSz|1N2vY3r)*bgH&UTQ&7Uvmr^}!frXM3I{daV^TBCJ)K)ji~ z{*WtOIm|j9a*fkRft+#$5&+79WSst#+tJ*1Ea-E|LmT~}{g6SKNR?o5y)5)I%9SUA z8<&M9(-L{oJBS24a#0!$$b(#n^SL@*wl`yDsr3g1whgZxt zDOZWmy6SLJ96UV%CCrV*;gnGZ3d1Xh$N;VO!z+h+LL2pPQZURj(n6eU?wFLT2XP|# zVGwzHLQ}&6N$_GM=7f>J#t3DFQA;b=h}+t#he3OfNx4=8cj;lHD6b6e&?8nLbtZo6 zC|AQuv`8c=AR@atksG+@bWP-g+;gVJVdRX`$rvm2g#l>5NwgyP1AfZtJzf%r3=-`I ziDNYmBWIMLu*0B`1+Hs|^QHhSRwWaA4GL`rg#$GX%BfRUNut#t@f6~Y5sAkpdP(ds zNVFOxcGozJoRY#`gF+mbCj_MO+ws(8OVk?_8aM?)lC7z67+EEWc7sGQij&|)*>;te z#F=XOL~9Ku>S`QDPD$aoK_LO<3h`6ke9%kbxIy8hUM)Mt>1v0ORgySqkXVm`M~KAR z2fZW?86?^b3dgD)MovlLj6s1QCb{@2e~!l0=o3T%{agh| z9Ymt7z)NC>!9=S;VRyB|$SEn*gF^J1D03RWyYLHpj^3R2_TZ{E>P>psP*(c^p5*s!T>1*>0PRo8D^N^tNh;kyYMw18&;!CW@ZMFP7hMPh}6U>s(DN zzhMy$Q5$Q)gH_W}LELR*!YP++jp^5){iCo?Z}zKwDTNk@c|tAhL~L?2?OBGyc#{>F zq9DQ)v1yOGqG{*SVc2$xN;jo(uu-&xA+figjPGM1_)(n4&XfPhD72R$bUdSiNz=<1 z{ULNbqmri;KT>%`?r!d{jw1K<03mcVJ{2g(|9r!QXf~UI*#3=)3w@O1Ezgbmmrt|Cb&!_~HI;@32VOb~PtS?|{$mKSn0nxlSfYmGwPq3T=#g%M%PFxr}xhT?R zamSOkvc_GpVXS>=xXrTMZZa)pufC9)Xz2(wWV7z7aGPINUoM-iSsa-F5$^uw{UO3# znQB-1vXFm9^t0TKIfRV^t+MXqvDZ`V-H5GW@h`X%&24?za}?!|V?JZqjTCi74Euqi zcEtc8!=67Hk!U{DmredIqMz9oD~wxR4*b?%gr37A?D-Y_`E0w(o!ZOBmee9)-J8e~^=_Pv z9U`B#CXt{5xa6ySP>e3FWk{|6YrKu+)S>LU$-Ql?_+@0NdkzE+&2!mC8YrGZ3{k{V z8M$DwQo8jrewB0|l<|<$&vNxq+Sr3%1@y6>ld(38t3)N7Z8!iEVx={4wt#$!1I1Fd zyxMtrS4cw?d-ZDvmo{5$L(>K=9_)0cb&@)3!`$g^*8D+aGRrQA7ACYRi$)fmEo>>Q zDk~_hnp;)&aB0izsxp8YaGhBS3$Ley6?<5=o!e6SbnfFFY9fp)&ptapY(jx4Z2ZpB zcVkd`{^K$wW6r1rB4z3PcVjYU|4~}{8C7QQHL@rahJ}Q|7KHV#5i)Fuo5|*_*AMfv z9*r{(btg*|l1asVZL+TE2W8okmZwv4la|+r`ul(kjXP(Kx zrunFn3-trt1F<>JmXR<27sE~`_AjD+IQ#k+WY;+)v1K8ieOXJ1_dcH3U$rP0rjWje z>7)*rPU4oDJ@&cAO$aJ9Qn*p(PL{chl#s->o+AoJkTlFRLgEdA3Ok@4yaRTg2@IkS zdoD*BJ@USt-j^)Y`;wtajTcEgd!u15t_8g}c6h(RUTES0-Nzi1F#Xh03PWO$+L;FY zc0UbB8FQ=PLm!hif}%H6ce zeG6WfA;&pFsfu+q;vl?fKuCR@q6|#MP9&(L=F)?y*h6`8K**fEkm5D}O_aw?F$SjM zW+GwrFGrjgQ*i@A>a$c@Xt%~a440eRz?tqZ#PiG z$kZl1n2T&=5Q{vk#t3!sP`6l%eujBlVacgCnwgGSDCBYChZRo}xzzq1OHPT#(?Gra z&o}G>-)2*Nx5~`1xS0T3PEcf?tp+yCyLDb=B33r@VCHtni~@J!7_#34>$aDATr%;5 z2=%&5)s^d>R3H-ur;#S|$jmJ0F6YLWJ~QPet}IJ))4YEuU94}=_0lXDYbwfA`)7`x zWLRkGp$2Cbz(kY!jw#cuu~YB3`f78#(Oj>+G4-D^J2Snc+K2VGMXC5bIBj}K!FG#$@JD?h^G za|a}{TGgQ`>sZ>W;fcz(0z#3s7&Can9t#Uie41{;^cuFA_%yvIi{CX2hzCsHl|q4` zXh#ucFuRfB+Yrx={}aH6bCYp#SAg0WtPfI|lA4YR(_nLU{FIn*R!b=h0CGLYUVRPK z&tuE&>HRH-0Fju=r|qnEp2NzHPl>TH=Z&bq#WuVGV@x-oVGhksgPHi#Ow>o)S=y%qquB?)kC@GxZ;H$@Ct28QM_hy1jOK)K%$aGirAjG1;w20xVUC(`{wy5C8c8)E}`8g;0e6zOJ3can6c zv!id?!b{L39OQwVcgU1R={8IEIqAM6-B@}Xh_ZA?N;gNk#nRmPJrToFs!!RBkvEZ%LV8hEg*wD{=BHcd_hQ{I#0{6xn4o{oz)63FJ`>Pg%)p;3< z4%=IR5m&$Qhs~R+1(?T`g1N#`i{5!5rlMovVS5G;;gs5exv1VzB9hN8q~sPPw*Z&T z3(u~C0X31jlc!cuVSuoC;UY3lBT|=&vObn*Z+tF;@5Htg4{z`Kc2Ms(I(&wXerz<@ z%onN_&4{}l%~?mX;CYRf`qedy9vK-TOOA zF^8Q;uP(hWn8WgycIo12aktO&zO;JRhzo~1K#E>G(}4H(6It46?kL6_whLizzEk^` zc}(*>M6wYKs+hbf4`b+4{tEASW z#>XK_HmTvsxSCfZLUoQMFR3q4t9vxwwGjr8jWDE~qUg(i>q#ACyS{**>EG);d;k%#7+L1!pe230|m(V$d# zluQxC_OX%JfJqdtoNX)a1Iqx8($Gq;VT5aQa%;V6@lVlvhA)+jN;S_gUPZj57DH2 zR&b~hL?|BzjlEf?2U9C5d2~Op?n9GezQ;-c<}?s9LV3Y2Q7M_06S5DbX!h|De!+AE zQaK`a9)Mo%OXXxx-vNCopCg_0t%raOk@*9Wd9%zcgQPiz?t?T4jq>De7kM#B=Y(aD zG{=y9k@O$U_2m6XbOkxHB;^k;I=7o;>1a6 zd8QhbnbkOt|0`3!hk>K}$iUIcG@muY$70FwC*LJQ=!%tUWu~!YIDjRCh5hlYD>W3` z0YirXtbJqJCAfC8fZ#`^?~jZ0XV;u_ecj!vp(rQfGM0W|SUS@W_p`EB%zeYzy&L)t zVQtSu2C%>U%XJqUI6b^iFKRTy4pJ=#X(yXQaB#ZE*gaVxY}!I)xPi`&{*hJ`urxyG z?7|7@Hp?26edNK$P-;cvefJ3v_UY>4a4YP-9 zW*n979S`yUQogQO`>Q^-HRx=+W1_G`h{v>ly;xT?KiSu&tYY?97%gZ+yoJNkn$d8&<=LvJ$_*jVmC4+4zyZP zLTTnp3*{g?g^Wr$JB5XY(zHGMiu5sxxlr5wsFu7)u@i`Zq}Lmz`&(B1M6@IM0~x%6 zdK!|il`cO6f-s+S!(Gm9oSNdeemf=OW7Q(v-7@>T(*3)PCzVo^@1%_XQMx_x9#TB1 zks_D2@u}JY++~vwB=J+x*UIR5G8-v}qU`*1G_u#S{of59?pXoIQ-y07KUFwnxYPUR zmBANf`$cK)ONPkVzs7F#i>BHCD_v&)fIz!x{tuPGIE{4(*wF*-420Sc8;dhv$0_yh zm2=tPR*JWQ113UGA7# zOq}Y){k;BgfY zX-Wc)ts%7yci$l0Rq)rl6&?3Whu-M!aY!z)gHB}1lbQAW-d5q>st{Z2?wB{Ay=5`A zK{MiFfFN&hi{n@n*TCDL!CkeO{OiZ6xTRHSy9W18#PB1Rpwi@QS-gI%c7)=Z&>DKn zybhdC>%djC!a8IpqHQR8(p`mTbb_--Ft>JhUOV)?@@IU)300L&J6h(X?SU^%Fef~G z={%Sf{sZ|hJ`a>m{>Oyc`Lk>Xo9%d%&*8pJX#xb7YgAA;TJBqQcEo~`o zS@^JtR%}(p84Ej#o$W2O@WR2_m{Q203#*VSmR42eqZX|ntL*Psm@#)}c@@^bEyZUS zwUnbb9NAgku?U-Gn7$j6_`~~K7U?@-HuOSIdlnk+B!Ai`ox%dDc*fr6OR;34Sv>V$ zkXQe&6Yl&VAMMl|V$QoE{ipA!GqLvns8>MKG4H6y&{2=^Gp^q}2c`33fb|_dMi!r) z!@I{EC1L3t-aGj9?Ch4==pD0p@0g9=QPi>ky`!jQK6=M|^p2v8`5i^*9c8pE=e>h0 z!6Fr#qT@5>RF#cdz zUlSs+AMzN@JIt1CaMY`iLp8Q*NWQ3EPceq+A-*~D7K*9Hb`4(?SuOVyDN?+FYBURG zo0y#XAEk`6w9%v$BGA*svDd-oLGbfE8f2V~1TZoJRbeaUb(Fxy%o2*UYS+QBl$zPK zk;#4ZAj;8bZ=f8oK2%0o9*{w^mEfA@)%JFts#z;(rm{u`t=5+*^+B0AnA*hgD$HYMBU34ZVy=REtn~=u!&RPy<3EZ0KqtsEgY2La8e$wY(=a=7!!x zA$>Wuu-e#A6Y57L?+|&5L$Pb&2^EH3O>|ZqKpd9;;j@vGdOwMOl)DLr8u5F03Ah~b z4EJo+BOc|RZF5hHevk{Lc{209V z;72ArmG!HrwyE&aR$|0>?y1uw=shCoN<=F6tkNT#+|!^(gmcdtJ;KU8>-2~pIPoSu z;%fmVZPp`=3LLX|rgJq8(#J#^ZXMK4YUAk|$;uiu#W`w@_ao5(Br9z-l9dBBl9fX> zl9eMhl9l!v$;z=B$;$DX2wm`Uq6WNBH79E#jS3_y`wUk08mvJ1sVRzDg>-&K`hk@= zMe@;X@UhY0W0S$hW`mEd1|QqN$2fj-J8EQ`>@xTOUfQ58`DiluSZDA7)uW_o?i#{> za&v?s?9yY&i>*Ly0=uk+uyenOjnN4C$;vmR#w&p=zjmNgv8{AIWrLo;pktYdRx94l3SVx-_m?FD0d|&%uFI0 zZ=i~ymlkB-HZyNXUfyI?H)yb{GACt$!VLbez(b)xQn++r{LM+DXQ|`z)jyc>iPSw^ zNEwv=`css?G38owcRK1;Urya2k=I;ZTWIb&~`J9q6+r5EdYcerKygQ>}Ll?Ojc ziDF+4N}k3Zh&R`VI0w!vzOCq{xdVqd2TpOb{ne3|v8=(#M}&Q7dLkaVh?($_k9ZA4 z8*-8TIVt0|x4Dz2DoTzp3*F`(1S`xa`y^Aelq4+#c&xs2*fcFA(NY#7 z#UZRBZII1xUvG|v{Cr4qg0hF5s({wFsZWI3l|Jk%Eu|knJuc9Ywjm&%*N0G+*%r|G z4s_PD=Z7XInrHQ4_gj#;(GD$}Oi52pRK_uTD2}dYrYGAh+aRCGWYZ9BF7Cqy`K9z% zA_OS1eiaUI^JD+z%M6shA!w0bNKct4wuKfw?(H*6j=oaC6@A~B(rKW_L zwL9<4z>NAr#wGuTp${#9KTR16ze3WZ8w^0s`_wp!bvKeR!)roF<(tXI4DT2c)Kp3} zW_WukPXH0kUP$qpKbKxxE%YtH43EyxcxQOM5mKL{B4UO|`^Uo0r1}cYVFU^XL=vgA zVx> z=$-VDR7~TOK736Rtya7)Ce1tR3n%v1a=JdVKIAcJ%>D_S0A(1i3QdE6rKJo0l!FM; zKE`PBkcnF2Nf{$%4>tu-rAk&iazaUc5OJhrx2N-9X%JPZjHNrlBqxaYQO1daS`a_G zHU24{(~29P>iK;93~RPIR2)!$a&v{>N^YL8Zryq;GERAcrCsmn-n#YVDals`!k{Jo zR+DAx=cgo(Wb3vk+u77Bll^R_o0k+VDY;@%aY{b+Jwe6|FEKi9GW?Lz>xZl7iW}BaE zTRWkb#?~lt;cJ(G=5o;dz2Kn`iOL9eQ~^|ZD$-#1`sgz$4z?BX%y|@CH&ZOMbj}ZV ztX+W2S!_9G`RpV`?-OQkRfwcN7P#^@ZuV9I3Vy8O*xqo9)1@eR>{NMjDx0?&68PF- zI1kV^19URU5axE4RS@n9IEhA~!S6?wwkWwjt2>!!Q%cxTTS#~+NYlv}O66z}xO@Q! zm#?4Tw#f81d`#uqeu#*Q9z1l&@L}DKaB2Q=QEK{#bk=-MOJ2ghnR{F0&W zLPoSt5?i=2ysJtz{EE%QrX1=Wt$%@73@)D`Mdf2k@>qB=;L-M*N|tdwW;$qOQ|C~s zaeVZzl!u=!G>(t*5z=azM^vr;6HvlC;L-l3dJA2|IniCnq)Rg$*AOLfQ1mVG@`Iun z`=|qgJsJ-&+Vw|ajD0j+MCe0AT4)DXn(6T4xI#aT)=d}zpSI6McI!6e(tcy-;{=wy z3n~9*8H5R6JW`YPto@&GusLg`FQoRI3|g^og5VaJJJ?!Bsax&mcxIc)azBNix6_au zpwMEw>)7`t;`rD{9vb_I8)b|bv~CLeqxo_Kvv}ng{D>DNTZBr3s4`_NuM1-zaiWY9 z1+^g3HKmN-MSL{U*f;n8&)CJcQ9S1Fwus-{a+4IA(p-08Wv+M~V!AHX# zp3#ssw+_%)ojERC42UPifY=}1N(_kX#7pT`Rv+wgD(UBqiPvHfU zYBW4rzJ(vS6B4V&deHilQ(zGv{4XaEJ?^cJ~ z6Tj;_!e^G(X>begb_whm*qHtHQe#}hbSHj0RI+t9+p|o^Ui`&R_O^8z z-MUWppaDIbrfr>PdaR)e1K&CfeBDj;SbJ5t#*Sek$Y*<&;TYvU_8H~kd`7tjpHa>k z={w5p6{Fmb_*Tnl-##(z3+_C`W!EOt5a*favCVG=y8nx_yP-qf7aY&DbWHsOT32KH z2gio}qGjxeQd4})gde~A;m3~BQKd5rZP=%%eaZBS@7%7EUdKedJ*#O@V*z!^A^OL7 zZGdk35wQT@ZA8dC1lh#APBr`Yp#Z6f6!SWO@7gHOc#7upIw0goat`p_Y$9d#FG5HT zYe<_;8P5=PfxRPXgP7Ktr@^a>d7YUbR}l(8H2)ctN3n9?omHb1BM^7@5e=(G!?1-A zeL&oa5$WO-Z8zVYyl8df4Uuf=y~&|n zhBz+(%Ky{E5Z1PFU|*lHZt$?-p{!zM1lDO6Sk^L{zcI|;5?S%8k?E1ZdvzhI4TaJ>;?p}?-ZxlPaI(ZLkej~~CzntH> zlOt)hJM@z7SG%Wr`8zBlhooUZJo=8Gi!Fb!f0*8|Z6DWN8LT-AVNTSf6pri_SU73| z>8%Wg@}vR)SZvT+WrcqaEQZ67r8=q?VTVNe!-!2yBeSGXg_kDmk88+9WeMz*B>e*L zl*s{4CL_K6*ZP?su$!NnMkYm5;|T>710rPoJshqnUJxP#lxE*^W-m}dyMg;@<)Eis zC>e~LJ9vn|OPL65;=>ZFehhdy&h8wEEJF2 z!SO#kkbRSrU`&LFqQbio+9WYhl(L&+peSWCha*r`z+G_&6!HNA)d~pIcHGz=n17e8 z$l*|#X#|H#N+UQ_lAYjCG5Q1m6-d(-uCX{cY5f}y1Da$?BlVw@W;80b2i>D+i;ZZD zW+!q0A=Tt0gw#4PXN?y~DRLXoQmc5|)PqH88)yaxT#EFGlk$3kO6jZky%YAS1;IM- zTIwTqtyIr*uHmh;#@#}gD2bA4K&dtEvxtEf{P9G#+1bHSQWV#W z_M*62-dct-^SAaB6K8dfm9m027w#(@?g+SoM{@6Q#Q1x28O-;=Jt7`=24$HJ6B2A3CNUgjVJt+HGb6G4j`vmfSk%q zs{(Q=qof1KDI8WePD5KB)y z9*2^?rsqvB&V6)2SmZ zh^Zxwy*vt_DyldNp``#@sr!kE*iwp%1Bp2Ei>QX4JB3G;$Cj=i>wm;ZvzLx4zbA&$ zs5;WtsEiUJ8e9LczhePWASUPrso&xLyAC@4Hyuy*JN;+&;{RI5ll@Mov5Y#NG34Ha z-W$$`-0*n%rk}yb!Z&;xx?IDho<=B~b-oh@0IQRrtT1VfPZ6O}PdFcVA@qetd}e~hPdK!f1h|enU}WD_||W*-~dD?MO(SktAFaIwK)j zBbgW2JB(zA!6p!OO>5@VHA3xJK4!BX1{PyJW$+061KKI*5%>o*P`PLM(hlpwfY}s$ zP6n+3v_>_1v*0Pn?W}a&E*ba9QCp-P05iu9bPim@vK3QQTj?z=d)Dj zoj<*EN}QNM+9+{1H(yyo=-*G6{Q<+-)VBvizo@-2EA;o3%#M{PV%Z9h!8bZ(ZM z)a}{ZDJ%_S?5nnuw81ctvA5bj88s-Qxvh{!lbu>b86$Q&v`~6_inNE3A69Y2BFF>j z-eCeGw2*R+r;yrsq&k$Ita6!1BnTWGcoQLD-~fBOTm+_aKwORpysR8Ier*Mzv#tETIC}$o$Wwr58b?6Ut>yt#*($J@f7a1xJ9Zv=I$t1-v zH_oO91mzIo24{tpErPmqkK6+g+l$--5Ze~+0f_Ah0Z?nuBMownZ+Y738pn^^a}v91;nbH;AXq~j zFZ_Y(tAtl=+*cD(&OHFA6><*%YSXy~05v+|jz+JE$mAXX)ZE+yfLcH9A%I#8_noMT zG%9e=4wu>pI2s9kVZ*q_v7UQc4OT+Hz^(WxPuF9eELmwXSOG>&umX&lUH zf)!xY1S{KggBM`b1S`90B8>_pD?p?PR-hD9u+m_#G6bFZbNrM~LUEO>oT!$qao za=Kcwa;93ca;{piqBqtWywn-2)ElgdWL6_g#~l5%yJmY`*+FN`kV7+%qX2Wao%HPE1;hc=)2lM z*3IW(1wWlOcak-2<{EpW<|d^Lsug|AJ^oirIpzcBtU!h`gSkVrow zFf)-zv=0PWa5RAhb%7Q%Abvkg%j6^mTj^h#heVnW33Wog+A5HOPYkqvJ!R&W+gIOO zI=Qa&PIdkgH6|aNv|O2gVKTwFGZR+aIm3EN4RY2caZeAYS^!Orxupr##;eseihvSU zTs7yWA*LILrmar<>%CpkfN6bf<5}-@z51}<{XV&nt=yixh*de`e6W~aYqfiROpayl z;23}Qn+Yk|+b?-B8K8Y`kd~eo2^8zdAZ>QY4vr(-pmjA!3mD;eHq@hEacTg2**z%1 zQisy#*t9fr7@IW&(3s;u{#7vhRgl6ufg7~cVt?c+fhc?zus>n@h9e5|6FrDRb6P0- z>ZRm<=DmpmPB;x;1DgQY5S;K3vPw8%5mI&uIN|X`0VnJQ+~CI?PRN?}#6<}(;Sxyh zvjmv%WFmnH`zhO4QAOYWmM@SZ!G!g_1(1-h)xbLp=0}`SCjvt=zpf}jD6e> zq)YmYD11)3+yEHDd`C#LA`2tOW z81?C-WC*+OReuNetN|(8CD568hJ0tBOi>TR2t=73(sh!H+PKA3xY;uP zGU-m1>DNnlv5dc2y31rd*RhE5kI489(tSpz?-Xu~=}$7@&(b|0GaO^n-cLAB#bOiN z@LK<9$I#&;y4^4m0@7haMu;6FJ-inmZ7hU|gT63RlqteA@UxRWk3eEt2{B5Ai7fq; zbM^YAu=G>4xBx4rscBVqiihZP zEJ{F45!M^!X|O)2pP7z`@%F04>*EfB%$_rD{8H^$x5m>6P!g?HaKc#QBTQ?W2IPoJ zBPk!rPhDwr2-F5&6yn3vQrce+zY(Gw1yDdcxnh&%fe z<| zDCHz#=>AV|Dd%y7G~6GZBBZm3bk}FNP?rumo&`;r3zpvoJjFDq7*A{BT6~W<(|aOaY%_@M;mE8FEu>f zKq($$Ie(1BxU~i@`pi$erya7f;-aDG3>00;8?O|NCp7pSMBnge?>o=9;mEl#P&hYZ z(NI+JOKH4Vq91m2K&$01Ct?_S{Dl;BSW8_e%}f%BeBRme(Hi+&l2x&VnoAs1%}?vs z{>$%mWC_{}T6sFxqEj^o@VtE9Ni_S<>(|@yR+B(>R@$kf-Slxh|0C#6hn%8|AK>Ep zHuM$r3>_z=MHktNEW3FhZ$%9C@m;)+(`Lm1H}!Ga{n*WW?Oxt#=|K1{l-j}j_%@z$ z1S!89Bqodv15ZT7FPz5Ad0V&?cDdiB~3855h!QdW= zogK1|li+0=H%xlrK7P6#j|{J<=*a%xHgPLTp3bgcWN#PtbWxleUV^$!r8X-23so^s z2%6v}TFl=ddY49|g%$o}#j;+#{lz+>8*#%bfc5D@0#((zcz^XFdW7=FJl?C5>0X&ZyicfTpbu_#!HX;rwVA#vrfMCl(dPz^^{W2-+E%FUcU7kd2y=f z7rgac>Rbw`vltKX{hMyLqA#}J2;;rq;yr)?-^V*l(vY<<=j?sn02_4o)^no8_~4Gf zcEttW`mPnrdhz~uSFy1F?5)`Ezh1GdSMPeq+-kJ9V(oubv8-1&np)UO_Ev1ZsEU8# zTkm-oQ8fPj+aZ{%M)tCX!?7393p%s5bANXeu*`OR|LE&fVA^vg9dB*1rz@p6&w zZbf15{=e7kIT%# z))5qZ!cJQW9ED3Ksm&Yhw1p4=8J0M0-+@rzSPK0k5;?Dur|q9Y{eeML@>C?rodavg z|2029Z=AO0MZYHoPxJUdh4OqGNfK^x+Mawp?qA!E!}g@Jj32h&fC8ezII+uty^mfF zUf-XHR&O3F>g&Vfjl=eIBY|Wp+Z-?QJVE&rMA>Jk?nL3|d?fMR2jZh2d=L`$_@3Id zKhM(R70NFB*p#>$grF!3>83|%s|$b1M|e84DKUaPYU8nLJLwBhMv~lLZEUZ$ze>ST zB6y_Q{#T+QcPtK7i<9}8)BtqYeyvWK$A~?HEU{;hB|@|KVS8@B8|U!(-U8pQAZb3| zcHr9;WRyGfc2q6)E3kVJw)mDM*sh>$05a(nN>5vvz#n$w)X-On8*X-6ZQQ1ZF5(cv z9O_kS;|qFd6=lAH8eMHXQ62gkucVb=Z_n$ zi5SMCPS!-EaL;MuU^+HO!g4eH&pogJwuXD!NWxF7)PjM2=pD)v z1-MF9u#q5G!A62$1&7@yQ~To?a$exsWw6p}u(I1=Wv{`?zM4p*0?EoIgB2L@609_X zl_+9m5ya}@kT)t{N;a^GAlSej0@x@)rPxFeO@d7XGznr>8EiBdY^*WZSZA=&R1;|s zmu#G=mMsDsT!M|0*l2(dzS481=wgoJC$bMSQthnaSeXAvlD`?|l^VEtrL}kuA!lz; z$+HeW$l0CbHgSKoliWvxg(gAcr3DfG=NqQI!VAdRx8pc|KSe);qxc2#DE?Cet&g53 zUVrV%xu1%o_mGmFj#cTz?oMZ8ZQ!-OUMM_;3Bj`Yo4^=a(YJ zkg$V@5U{WCC8PV&c^`CU%}jXAoDx>o`La@7n6E~G9!0NIEA!PJxhp|YeGyjT-x31% z7gI05-mkB^Fxg>U=?3RsH#1@03jS}Ux+Gt$NERGBM*nCL%Sh~-?!gwPJwpAW|qBpXc!K(Lo$8<9pp1Q z#h++NPcWHU#WDVuAS9Q^_$}d`gzl%4JVJM64omw!j348-u~ru_yC;pR6-yCbg=?Q*_e^p;0cQ>)Lo0R^R z;c*_h`vIqryK7*%d$~JW1#IO|10|*cM6;NNLyKpneX~^C9VeD&2odSHqA` z>7+oF+$*F@T45+myVK;ZknRK0-5}j9(tSy~?~{vR@2GIu6Tb2eO_P<2}M?qFe z$X=3f)0|j{l?D2jP{N(D!6fTWHA--KH_3V-)YWAq3B3bBCOvH?ke%uAu~597h;SCx zx+KjG_QC&#W6|6d|7*aKy$Im(D0yK7unRNjO<1Dp9sn>@ualgLz`(>ANw9ty`uCmv zMB0n~4Fn@Dd7DBGKAxk0QwhANLy8|;`c90%_tLd9_BYrE`zxB5+JZ#o5VWHmy2t+7 zB=(ow&e&gS6<_QxEOwK`eHHGuGxB!;kiQc5Tgh?1XdPPL|F=-Te?}{LP`@^C<;ESw z!Oem@o{PSdIO;cxFSfF9&+hnX=o@Z(XyuhJu;J>tl{=coHbDw#jQ=jQYH>&^aJMB#JedA#S7~w z)EO{*VYqNsJLLr$m=rQrQe_YjRuEn|24=+5f%8pQ0wf}sP{RlV;k$mUWxq(}Fl1gI z7>42WICDU${!1amFLr_uUuXdPx1Cx4ulDAj-VE8&4Ve5gN|`d^#_{!uA&kgbc}PV z+g*KONE;xMI9)oHENXLr#_rL=yB$Wufow9Bh zC|}6pc5t~_U=(F~QOMayrfS~F3 zAMi(^5W=(ukR;3e5wxOmOtN6%?;aM836f7EyZK`dc@E?(d?Hxjx;H=NxdXWb^tkX7 zI^6u3DEkyu@VW4F*1qtt_N8FW4>@%6S3FA(u7gMTAr2e}Lds~QL(d^(D)gs>qKlF^ za142XZmqVzi+fYJ5D$pdYWpDyaxorosnzxv3Q9p-niSr5}DHNJGb45UC;+!Y~Q$vf0ejbGgKOIVsUztRbUZ}_l z{fzEsvOpT=g>IwJ6q5a!b?D+GV3lD?uB|%sN4nW*1}gb6A}d41p%ba(l>(GJ2kU5r zt`fIIpk$LWU0{+)N(h8<0cBJhTXX?YmccC)94b?FweblGr+acUJ^UWj`6h~z4lm_~ z2S~{G0lcK3GU6TXf!OYK?t$2DC-XyDO&%7bjcgn1NtEZXlR}X%?*l zOtSz}1Jf+P)W9?gFg3)Hf)$7(1uJzmk@>o;KsHOefnYvjAeavkg85d+HrL^I9dbt( z;7KWo5@ftfkLHR(L>PKqO;JtA_%eR?dNL=;%v)toNRZ^knbr1u%2k zMwkH1$B{D-Bf_Vi-2G(kb&|LdZUTV0969gDPw<>BbFPv(DGVJ=cmNm${InWjq6O#n zZ(x@lOP=??LNT{;6!Rvq1?g(5nLK2YgHX)mZsz`KE4j}}6tgh~(hE<2zTsEU!_B7q zFQn}BV^%&kg;31EFwgLUnA-;r0#9b@Q8j(99oA6KLiO(;LtOm}U-{9&B~PVCAj(YEJ?) zuf9rs>|(&o(Cd=R0>-B-W#5cXna$F_4EMn?vkiLcP&O&JzyJ2(6H=nhOrP#&7w~0z zP(JYGRt{g@-xa>R9rDxFig{}QyMIzlg5?+rMGLF&wtvRhEX7VjEl-;tlW6%D2P`l5 z3khd$-I8R}@Cmq{#s3Lv8r=P3gZ&O9asle2{{)rikmlql<%Y>Iq<*ULJ(pwcccAw+ zQiKq-ol>T=qex*>Dd__w{bBXd0drHPD-5Pv<7?wXFvK^Avt;lv-SR~ALUOsp< zEX+LI$-+!*eaD;(7+3Cqa)y@TyrV6pF}-#c#+GIjca$EcBij(qW|Xv)x8PS*0*laU z)!dE+Fkx5nZhH&Ns<+I^z_n@)`?3eDj)ZWlBkW5X>`=^Gy64N_r5!j`+c7%>=FMTp zZ()I6S~VM|zDqM^vo8ZtAV3xfmIZ7}1)<=j{b9(02$DgIJzx4S&42;&DrtK9EDRyE zAl!m#{gEq3Qi+ziqa~H|+0jL{Hc39fL%wCGZxxlR-GE~AlgT?ftSgSaxh6`kZSn}DlMSWQqoaw8;S>rbMhS} z9o$HyYm45ofZGWy8HuNdCk=z>^aO=Hk@K4?gBwj3spmhEj`EmZXNyIu|4*=!u>ieE zu%UyG*Yvw<<(B8DyH=rd!We4l z!zPk1icXo(UInI>7Vj*#_j<9I4rg}`>s=$x4|^NzJqTz-YXzQ1)|*RM2EXo%R#kC1 z*UH4d$C|Q|CPl{(z&4cUZ*^Q5v|uWJH2Vh%<#r?hBtx2i)h3EEbksFdf@V2D3Gb0V zdp3{pC)M~kjysPsTm8qN4lf*r)IssJn^Z+i&<%CqwW8qlRD!GEOh-v=FOSur?3zNP zB-!$3_@RGzD;z)VWnBGj+SNTHLDYKI%(gB_iPMv*z8O7f?oOJ8cTkC$G8k;KaASxC zJ=+i+pm2@AOHlw8=rF+2pF;OYiZrXpqc%3_LEploEF*$y<2pU)x0I_|1lQ<7L1s+@ zPi@eHb;g>X=HeyN70-)CS|$Ex+M56DtHGGGB;KPzv>ez zhy8CXj8^b_YJ}B8G8HaE#XTw(cmjnzD)d`Dp;^IasrEWSG7sCD2(1)E@`E`jNsn8RCPP~h!ir3WHX(%d*kBoit-^b$_Pa$% z*hJh)!FxmM-9ez1m){qj+Y`3TQF;`0eQTh)s zbOE*bX=9QKMvrl)jTxOdX3R^ZjP#|K#uVW45<&%ZMF5veN2^chnd(QT+`NRDZ+!Cc z47YkqrfSQ4v!GzKdIH7*o0Qy3OUD={#9_aD5-f<1!*^CuDy|}R&ZfDGN-CG6afQxH zOkFf#Nlm785u@3Yl__trjlCnzQ{+th>f3L=Jtb0_5YL((9^8xW-q3JgK??4lR6K_N zOooR0qrbO~U@!F^5X>GZ8t@0!aEWD=lF#ft1Hzc?(-fP9gkzidl&kqJ7mlRi7-S_| zeoZ*^Gb5R`?@!m1y?h>b66tK~CpJwH2i3On^tldh3UE-pD?ypbp3e<%tUZo$Fi;-M zGU?KAEXoEWfy%@HC@?icpL?6?&{*rABCKo`rMK6k+I#S_^7U5ja{6oRfa-t> ztGkiHFdNmF@;*||Wc1 zdj6n*ArLjFGjNxLn{X@v{6%D5$~b zEAbji`+g;85Z8>a#Bl_ap(tQ7WzhwH%C8WluS7a|NZs-yIy9u`8M~I*)sFVth6l1i8VbK^7@337^xqLs*@nS;ks?nJB2Tx(-*f8gH_rbA8z zy84?NY^?W({{1WiG16^g)4uPYXl}N#MHF=uYp%U)1EQ3t+45!3#OE}FfjF)?lvN~w z*d`kbX$P_CLVe!75CDB57M8Pw`n)DgYsLy=8_piCy-F4a#Gjv2%UOAS_9z zo$EjE-wrQH80fB`K8VrcTIq8A9|+$p!^?eiB43TyIx#h=)g+{1?qPoMWuJmoIIAUW($X99wfh^0H%ck8drd> zen$T6g*?XpX>zO6p&`RN&HNYA)ObWm1@Oy|N$P)JN#238sj#m3=TT|Jx{w^J z_7SJ70fI##hDeJYerSEC_fuNDuxVp@rh>F}AJVn#o&=61$Tb|3HnwLw4{Fxa6dWgm zR_ogo94~{Ihi*Y(UAwI3Cx{Q=g}rK%9;II;nu2{J$A#>}0ThvQVK~Sg|e2VEEa?U1yPHjw5%;_MHFnIw`_`v+5*F=!YC-C%(zts zEl^NU2I`0oC?hD0QxqLQWk5g+Mg4uBbIwiDO>vg@|NcL3AvybU&%O7_d7kq;-^Wjo z8*;I*k(qX6x@db#Drhy{%uwBv$clhsgDxb+WGQlG6eTc&GN*yA!$T z#twYeDVp8+T&E(A@_7T~hJoCKRQ9nXjrE~9>*oYQuVkBclWv=D{9%!&Xt|Vaog- z6z3yBao+QxIO!gW6T&)1fcO;<9aucL* zHQ}KmG9;OvL=YA_m7;JU%hfD)B0-a6&KwyQ$?zc=vc@E+do#Lww14^aB&fNKi!TWx zf}nK8y@{+(fv2F=YnxdFUi)q=y8Z zpoXJ7BD-NRY<2I(2XrZdMegY2ZgTg-Vbx!IBz250 ziSlFncXT@Z>nKwHnE!heDU!uHl7d;wrJS()vA&KZD~OZ_RK33Qoc}aw0wjj_Pxpx4 zlPz^yBH5uo__?&h5qR3MJxJw&fXb-YzRx4KCO~0ArQkl$fk|=5EtG~&!}s|F$Z5BK zR+aZ;9HiJl`XoJ{s+nXMPv6JgkYF20ihb~GpLj0eo=g&M@~Td1I)og2QgeugWH}Fm zcyz*X`s&n6C&GZ-;2^w;T9grXLp8!`X!is|2WUUy`;kXwM|oFAc~69F2(ZyhpP;p{ ze<#EHy{Nex;cnS_2jV-Bx0g)ikMrio9jL}Z0qbTy8Fy{6n95$>nKWxX+eZnF8vK>Q zuSZPjIyyQ8V_M-OyaZaD^15#HvNX(sw3xTcnUVQFfga!ZbqN$>u_~k@z197E?Q;nA z%c`t>&Ou0rO;1d#zu>ie!Re~5V-lMXZjuw*i1Zf|^_+@joL$fL)tx$CWexz`<9oU6>T z#@D~fCy)4cDacQgJ>s!E8aU+K;30nti_gFr-yBR!Q;Vh*&3V3dEEdQ+U@a#^MIfw& zIhD0z@%~oLGi+`RI*Qyo9p3P9s?A)|4}hzH}f}lI*F(D5~Qhrk*WkIzCZ<;K|zLe#uPCTet?=pO&qn&8z z<-`Y43fo|`!#4OWq|9`5WM0p;Va%hE&%Qs@1{<$1MZFj^PphPpuibN z1|Q6j95rFA1GVwffO$@VmSul=vg1zerwQ5=tgg%772h6iR4I!bnn~3~h%x;Ml`D zP+ghI3wzinl^&L(VtquRT2`S!xQ^s7I_6T#)@xxTG0~IDv@jY#xtYF=WmE0^P-%E) zK1y~N?N5{uqHJ6kiN*9(mYp9eW%8ve%R~w%J2ExQuFRG9W9dUitXImI7>|ZtztVm8bd39)hiAsK4L3APhy?IHqlJy zAH+9V9>av07Eh*uFd0q~jxX^!;HiACsJvCymB|-Tm$W{M@%h$M_YqNdldLO~aMsP$ z{&u5oYp~d25|5!SX}Fck%9KVDs#)CSbOf$i7(bFGg}YxINrwhx0~{$d6n7U#=~bi8^P-YsXxV*@ zrev#k+B4i?G2G>1v6eDfTWkm?4Pnwlwn3*uOzlHa_iI`ALrtUs)f!%ciiC#S*HigZ zQFvNbmdP`y`#S2;4a)P>JtgX%lyzmYrq~ce*KEUNUHB-0$_r>BuX$5(q$VyJmdoOz zUo4K&>&lBJZNu<~(e_DvK1So%O}I@;tRenm!vlC=-X z+IsqM_hMk0qSNV~jyuY#`(;%6 zLnr*tH+>Kfn9&f%j%F}r@e3JZN;ZT&bC9C**r!4KEL2AJ8%mE1t`}fc5 zKWfdf&oU)FSTuOm{T?9qDA^dEW#VteK zb&hCmph#cidt(iTM#rpp3USODMNf{IjsB|Btt|bvq+zV!wWM;E zJr~|B*L~e-SV%W|4k3ITB*QUml#B=a?vQUsrO&6cXIBU$#S*5N}?{EjUCL>7N4!+*&9?`3Eqs)D#x zh9MN9ecL7hN*%0iS#oq__wFfPaf`u|)(E3gba9LS zm317CuW0TG)U%=W284w58OMRy;sBG!%`(ZFO-H4)129Q&Esb&Ojs*9f)_cytbAuIu zx7cS6Suqj|1}?!tA{XKTmS213lECu3fPAtKcBjMv3F`E{FhAr2+cB^{hWUc2PE#)` zL$=fz2o-i;V3N6M(r8ZF4F+M9o|MaXob!P^^Rio z$RLeS9S_UZBXG(?$iJ>3@++3B+0|-z3mQCT&90LMlr})aZNd|93Xq|A%%=3_*C5ae z``{YrMsN^K%)c6+{c@eSR0!8VSO%%T@R&7Nr^!2K@^zYgLW`^eA1fA$V{T%A-T3T~ z3nc_|;xYSgtdn-53)N_yCimvoAfWX6;1cM8;?B}AeF6l1QLdAa2sZOP5l*M?``BQi za(CwQg#vnAUGA=Yu})jC=mdDU1)oiFoqT13zh<4Z=3c*l^?_=%PPx7LCG_S1e0^{U z^gIz<;yO$pIE^Hg6m*LtHU0|^)aY{`6b?T(IAHX-&x^)ph&AF!j_7+eKC9#!>GDJ& zTNNY8*IU2bpPOt zz#OvhH+7@m{Dy|Z+GX>LVm|;+UvuxsgKj=#exjy<193P~2p-$Qjj;*c+RDw7tuRj} z+h(79t+|35%CEmp1dk1C?+YppXB;WEpP7KST_<3G@*7fwo10f*hBawdg?H}f3-{RmWS(!GF(XQ+-!;)Q{8sE*11MJoP^ zzI4FD5!9>2-;G*c)f?`aiR6qD@UYJ;iVNT4f2Szdy}@=FQ62D*Z{-yWDXKu)cO6BL z{UuUhF%e**nPh}!33xaT!(7~Gr{Octmu?oilH)tMALlIr&Ne-2d*E!r5^1!QVGvxmsEDi2^H3dyxl z6B-Znr#yyLZwZND8bt^fEvN-L*F6rcDh?u*N8RJlisGR0)JOkUkqI|C#lfWLq@>d| z7|SLGzu}Y04h|+OUr|WP;=w~PvYyIRb z4A59M1SyF5WGdZ8Qa+v_-EJF+`DAK`797N}2ZxBsZq@>??QcJbcI`)bERr@~{z{mK^fyVtJJpio^5@a!AO<#8r~c^d@S! zn%F;il{Na1kf!MswGhT-)1#P|bG z5g+AEIb69u9HiBHp&V`<8i8)C!w?apnvmBGV?Fw{2qt-5a4K_t9u^HdgbQ^&>`}TL zE=+d?1R)+t=Ggm5Q5^*uVH{?!qY)lA())4^Ul6_>H&Wy}K2Xw)qYy}{Bz%kGp|qFP zsR~N@pKp2uo|_vNzTK%UpE;`k*aXk)<&djAH@~wR>A$ozCh~Lz z(klQp2#Flk+ppKF67_cJ_5L)!bBeK@{ehLJ^txW@9Z~5;z0!xG(t|5C)Oud8bzIc? ztzPRhy%s8!>y`c?Dm~WHn84?CQB+!?4#`%@Ezo`KXnM<98rvx|a2Y?$cXUDesuk78 zBmKZV4ma=l+2y!s=Ae-A6!Bkr5fuBxhPkAOeSZ@1?bm@EO3 zkd2OUwhNpzY0SVOL%5j*JJs6c@)2ipt)KW=5iWKm*7+=3)7IF?$bzf+nBPxLV}D=L zA*k|noYSGOZw@G7tYl~lYY)1MgM#AHSNNx|^hxREW%0F8UwvQcfK6S@BL#l%G8;kN84q|K$MHJTlH(=Xmw z)0Um5Dt`}SKc4K6sMuNV+qOtyRIv)$ve{hlXFSuEJ?22Qnn*S`*_3FGj3VP(i2dS? z+v8aA!qg5XoE|n3`x#r1*l)fMFyYB_u}N%GduMw71)}i~AJGvcg+U<56tJDZ^{(X2FJX3d|w3!YV{}P5JN}gS3hal*Xxn zg`P_P#X6cWv<)mQnx&+{&~}!=`Rb9hnY4Q@nqv3P^Jk{uZTXKQX)xdHlXGpRZpazS z4Oh+FSa%_}4fcacFX~L&#qDYR$TC(~1CzC{zF1D}hPq$Y*-ipn)4l697dp9?4!+LD4Lx(gN60&1Y^|B{&}lq8;^g3l;Ea5B&F-%NqU zOd1woehB^B%lv$UGPQ`BwCzt(I*jlbF7bm4#ey?o;89sjq&*8ZhYt6VdI2@f(TF!R zT-p~Ljv*|>vzguwUP-leP2c^}tkq;$Lk<6=8@;xebFaa4fb$c^crZLkr84$*F6&@@kcSkP38 z;{*y*91^t9pzIWtGO;nd3Ec;Wdp3qv=6*dO6??$+h#sxj?Gs~y*{(-ogV}_S60Q8e z)r8%#e&BkTM~L^qp6{@MA`X1WG?l^x9$#XjFj1PO>h}Ph@IT*lAf{q8tZHbQ`szIA z2=>Kb=V0yLegpaq=-)4WP51bfDP)goY0Lk`s|)+WoHR4u60a8aRRj7?7{7c1)c{aQ zfBpXewVa8@^KrOH0vV{gxX-0XC+ z?n9lgv8=aDHpb0WX+?B%)hsesUEPGaYVLAZ-^$+)a{|gaNm!|t7TRs*iD)~5wH=O~ zQbni%MqerW?D5L;?BemH4(4L)*2Vd#yU1?yvq2lFz`%;|`%|)y#_!maHt*7zKkgl){em)Lp3^%vQWr!AxqBF-`gX}1Vgt1%a+A6WO$zpSFp1CVItD^^Jq)R=Q8i241Xf?j7D~* zzY*>OyZ3C$(6lEDITR74c1?k8;UD}ua(l5mf5u)+*q7>ikY0ISE7LxCcVI8GEB})m z8>n~59>bfZG%fx?X*eZ~|4x+6w^H{?UrAL3 z0zf~J$_pg2+FwvUgEfVk4Ul9Tbg%&lY|GpeBK_HOYm;pzvq24FjurM;B7mJ5*`f}@ zkYtNW;SdqGP?*6=PC4V*lXoP?`3tL@N1GsRS!~9&*z~9YWS_BTKtHctDy-o_VjA#g zoUoj#az?QBlbnl$vDo2}u+_RSz}|>a)2&f^Gq*c2gt>E^6>QQ2;jN-+F$wSJL9Z?9 zU5#x~AIb$6#xir0?X1StFGN_P9=-??QIMN#Qr2<9FjjK_JVNO!b`uEEtDh#uo5{3$ z8#g|6A9UEvZy_m6!_pmoHggSZ$ha+P*!mrbHYJpW>`3gu_WrX6Y~71nCn#N6E;5W+ z+!!^2Z9*khy0nE!5q4-S=Mu)>bZbWw%h6gVn9t+aXbT%ylNhh85q4sGt1+K~m%6}) zZKmD6{<7U>%(Jl{wbqGBUtuS955y6l3Ifzu*oiF$7ul8FeK4Vn-Blehnc1omhbb9s z;0)&o#m6kQDMAznLPRR1M4xVx;ZzxFUK=p*uiP_f_ufB4TDo=Z#SV|K_hOrly3DyZ zKw1o7ZzdQTla@Y@Jh`+kug}bwTtQ&orU~Jmdn+zvCQP1=sQK)c7fh(L8iGK^;^#@)o!}T6+9~xar z-+(gM!CPrGWnc|Y%@*WmkVpygGnkKzU1JVa9Ky#f3o}^{poMaiNLoOR`qbZ${R(O{ zjK&5vqHwr~TPVyF)M)SNh&ca0(A*78QKPl~oD2=hPOM^V$Gcfgjx#Qr7PP^1tOH&x~Ih`1s_k18q??TQaA%Cgm?MK^O= zWUR2UH;O?m@&zT@>qCjm1OfZ97=;s}nibt8A?g5`%5Fi3KKBwLn8Uw1(;msG&~ZtH zRtqZhw#7q*RtqY0s3|Ix$&RdcCbBk#&h{WhO_;2vT)>qR_4!GLbWTBOrwmD_o6+FiIAhtj-nix9-(7$OQfUdhi0d#DB(G&=*^Xr7om5(qQxOj7_rrdO@3c~1J5Jr=}McwS8 zsZ}%6rh1?rfhZVQcue!aD7J)HmCzeo0!GmUv8+i7q$!`k7+V&S3>(5p$gt}m!!F{G zdnBM0Vo0wDn_wNOg%tu_g5~?UI@*m?y0JQSke${|sq+zG*Fl8+3scbeJiSeI8Frsp zUKuuFIQn5lbht|YLV=cM>-<&vXQs zqt*e-M+-ztmNuJY+G&sk<2b>ybUNzef2E$*XkhPJ=rZlPDG`n4-Q2Xjt-k=^V=PcW z>u@=BQ>$=uNKj9L?bjjLE}RvEGn8vHwL1{Nd|OJn>mcQ>;!o{0NV%_aDfh2Ud#9jF zxmC3eLhgqB@OsJofw_2OoR5?nzig=w(XTBc_^ks-5`KuT;fwDF$VhMpl`58 zHd1OaW$E$~{$pt}KT8FFrAoTIWE~|eT*3lY<{RqXWClh8u{kwJsWh&Xmpn;P9inR> zb+1?^8x7I)ga1D2LeeeeB`=~7F4WkmHO^?|K32EJ*$T{R^jc>hZ9j@klWd1kKR`K4 z7qS^&!u*Iru7gAD#xtahLux2O`1~x1G)N7_Is^I27Lj~WvyzZr`JG5^)vT?lkLM^! zlImFIY()LGB<+Q|h)Sy(nkiTw)dpHV4%nfd`OZ_ z;VK?qVxq8AO0r4+#`n)R9fg%>g25_#&zZ$udP+*N2lwj-S@zoQ@%bq!6RP(7yf}N} zl?LMMbah@|HQX!C4(K~zfVvj)>tJE4RGflWP=Rd*@jON+D$wZ9<@Fd;M(s(*z+k<_CV_Wd$#Wq z&d)DIyF%zy>bo`ph5coOy*C$1<==o%>gRbn>{5*M+d|^AitCj8ca*T0 zzoC9D{+E&RQu2Qwr6y7nA^9e<<)P%KsfA)OBhP4wF!7%UlMc4H3b}yV6O_C)r{u=R z4J>A@GnT{Pn(nl5A{K9J0s3UROQ!4w^Cq$r^77B0U zlB8Dp)RDvgeA5-|{q^=n7>po)w=&x<=ipeuqm9h;Wzr-mVq@NLMl^-QsEfYSnBynB zNhO;=du~+p{mO3V53I`?TdQcAWdr%r^hWX}_UH%BAQtgi+@F}+AMa`U^QjV#(L&ND zy!LN80SSw)UKPTiiZqC}ZIC&+*^#r6VJv+w%KPD-bHUU4z9{`CQdulzYic}~b}K>% z&Mq8v+LQq-r2@nx>+v==!dx8nN_?U+i7lnPO_Wz5Wl*JmMYrU#X1f@+G@}*NnQZJl z8kplDf!f7FvH?k(UfRY6fLD&xnA5ktZGA+t5Qno;lo+dR?6C?Au}Vmy-h?FTb0H7+ zkwo>aOnEgvO;K)RA^V-TfKl_HGe(EgI|8!SO@`?*9LiFF|4I_^Mu3d6#zwD1iG4lK z9u?iCTaTW-9o|1L^pKD!^>p`Q1+UvXvU~mGpbm5cG@5w29%0#P%ZvM_PvyfOU_qQ@8NEA zqpm|#QyqgSzMXn%OYful5k)!J1oo--B7r&mmI8}u1odt*71JavrZdPiFG3uWblL<< zb@C|Fo3_QMXrY~|X`hX&RYMT9o|13bzN5wvM7>YRw>6m-lBoT*bG+1Q>46SRf3k5w zczlqBU@}YxWL=x36AgM$R1zt@>gGiMg${JRhvocu7?n&xSi_ns) z(*7-oHn0N>!Fv!l$G4}3ip^qV7f(dZB_#V1owE8L_hyVGe-(iOixOy^2YV7+ydo>W+SAvPg zjwH11{#=uREj{iGXZO7CjALEDa1IJi>E3yYp?N?`?kwe%9@#ah$ z;1bxy-?qZe53QYiKSqQWbh0DPv3w{kY44n*?I2NFR#Jh(NS)L!2shOuwg2>zTE)dK z?saxhg4w=&Nom=O8s+~va)^74(6{xWex1e)2-r_uh}W&Fk5(> ziLJQ3qn#61mc9=d;(gz8#wq1YnPu;w{Dm!j3)L!64Ko>Y$rW$Dj$ewA4D@w5D?J8K z-yD{^xz*da@Xg;i)7XP1OEBvk=fV-nai@iCKkkfcL9c&+osKI)9%wO|C4G#;--6Sw zq=9~TWNE+0X)?kDnI0&^EE!Ic;Sw1>EWq~GSj;*CKhJ}RFG0Zf@|~(U0G&!bxh9}<^$10E0zMlF5b)0_u$Tr>?he0^T#Ctw^_*Q$W$up z+AZ`eXeyJHqc{OyBU5n(^Ew)6tt8-hmY|S<=AdBog+C7g*ZLaixVqbabS_mMt&wW zv^@^4tnD3}^?#jMFZ3bIZO=Oo{x6})U7OxgxBVnCQtj2P7n}59cqewZUv!w(5W-G=z*Yd_-ONBQ>$RHNwai-fc(&;s7R=s>)h@*gIk z&&!CNc=-9+FA?4WOWosc^`h9JLn(jCF%57Ngby+Cv$R=H#`T$k!w?|F70s#xG+m9m zYI2pt41K=#001Aqqz^}tB+$>x9E0*Q@~G^9Pd=HsUap5KN&^!#T26t|JR?vAO^aRXzvRn2??XnF*MsMZ;q!6U5SR}K0) z1ABDh*D42Jgc83N>Vuj5#)cF5iCntBOv1~$S?P_7xj4I2zoe;g$VbWCcx1Mm+! zB;2KdIuKw0R3j}THm^^{6LBHHA3Wp0t>ajPv8$d3US%cFB#`U=FlNIxdTwCFoG)Ukbsggl!sk=j%k#imsJvR?zP37a8`^(cd3Bqc-j+d_9A8829`7{mnDr>)Ve1Z`E^-%XX>IyNMk3+FK7!^(9e?vJIKwKgxkXlW6p6B?_q;0Zy7tQr=Mx%mR?4r-3)GVYRk5N=e zK?v{4?3#`q)P?BLoJ@iamC&xty&k5hfpU9qq#;cHZIHk&o1`e%S9eA&+GSIw#njUX zI%z&nZPs%TJaYuf)eQ<6x0^SzPp>#*w8?0x?z4SB-9c7DXrAg@HqLHAR??3eye*Sl zRHE*;ksk`uIy_8;f3opSEJP)ww67kJb!`^vLOm!eb5V&}EmIJc?4)7evE9ZNe&_6C z{IkOT_?>g0@dqRO?mK4(W0=C)eD93VeotLKU_67#2{Y{nc|0iJpo&;10T-&Pc&;H# zAupTCU<_<9Tp$J)f67)oA9hHjhfsvTKf}2P?3?)f0R9@l490p(_z5Cks~v|7pt(R5331g(~mDXL~gY@x!Dq7cZ4WF|98q&6Z2 zI~kcOFODRQ?$LZ%%SJ`e9Z|Aq2+deFEFzV<86!rV9r3tNDldY%Q^xkfHxNW4Ikdnn zLwG7X6336@M3)(nIDVAzA(1$KyjA26ilhTao>0qP*COdG@-|U)TSN)E(UfdT5(Gd* z5+ZtXeQ^Zcdu6;ReMXBQ^MB7Q2_jjcMIhx#zNkffM;ADe9zr?-jd+QY zcZ%c=E$TCLLi{R(S~%BT{TIkDqOGW+mK`s~sWe4S7e^Bpua=!Dj*(RjvHf`wL2B|Y z=oKd@QRPv>QIkDX>pdLSdpKGgqt}!@5I$ub84h$M8C^d#j(8p^Wt*7c7A<0ePm;Vu zQ<^x(3|fRe&(d%!ki^9mM=#=$y~WXUc;rBFj9xRgl;`X!j@`&3+lynj@<>H-EWOSI z9#I_o29Ir}ITfS(_4xe7Go^!KO677&G6}rXxQ|fpJU(@vx*v(Ut7To81m0;}6js=c zPY1jo;!=-`x+^qUS*8Ja8b_YW=i_sWr}8JF^7Ue|E;0$chPaKWw;dny`Yk#>De7L9 zb!D;^prQs$)b5$=Sy3pbdA>5t2q1O_ zvGa3X5iGAqTudv}h|z%nVg(QYmR90;vfS}4#F=_yIL>pJ9Eani2uaT%>9kUKp2wG1 zDZF47aGW~vp$DJ-eAA!ejv65mtPjVzR=GCINAjuU#D2_bf?X4|<^4vE7&T+?jJ)xq zHjlv(`+)qaJ^6Pe!iN4WtEDf8+&SX=+Pfu6g(^<84R_A1^k>ulgf?AjjFwc<- zE%BD{l{1#FG^uK}`cc0wBixyb7A>4Ha#8=~cPvo@rjIl!YT4q>UDsN|KTa7iq1`1* z*riN-=zqAnfb8@0;xGM!JZ1+DA2~p+g^fPE3yvQ%Ag_Iu8YmGu7ZO6}gVN14NYbP{ zU~t|tGIL-ioIS=T^-4z-E8S1{~_$Y5Z7buoo}ZlU&1hj}7cwD;c3WfoE02b`zJdnzGdTU`K%KPGO#yX&YitPA$xY9e zM7VBOlnZR>?6zUzpgsW)>nm(biV>KdIFo1TtKcE1T$t+Hj^iZ%L#V?qX1QY^{~Qf5 zqR)A~UzCHJqS0}^@)EmP08DB+us5!9u*Y)46OHc$vDW8O6OH8#_9@clzoGqSp7VL* zRtM`m8QE`!&{6x{5Br6&O*n~Ho*=kR*s6h!4)LDPyO+Xo;^6}c?b)e+#CA{~WUr!< zlE6~VAT_R135yw^81X;`#JOg&g3sGuU{hPUO0`S$_~FnCN0vMck)cC|d<%hcLQ0`} z9KZtMc$qGf;nOmFNrqK2jKB*|?b^#QRfdB_*vT+fX5`ASK!%zO*HDPNxSoZ429;?mNqH5QX?;urcq(MzUdx<7_v-D$DlD@UW~y047xTZ!(|1 z#pvt0%qQI$DsMp{@}pSW`z&qzhVUeN|95R76OdaVOG{+!6*7EC=9f1KnAwT|Gh-rB zo0n*qd-d+o%fT)#RyyFQcIj_A5MJh2(AorQq5)D18yty%4Iz+)ukDB#GNv-x)(|DGz!7AwHn%0WCQMMya&^85|?f*ba~vY(@AqHoQ8BL86R zVqQ!_kAf843Xr(7O~^k4sYhvw;lgXXfsV)FCn@*1J2sD?DYu|>BhrfymQ%hX3ISW{)N6Y{VLZ1&kq=ec!bsgK~1}S7g%FFj9jp^E~V42 zTGU^jx@R&IWHHHbPLO zIK78_A7+pu%0MLjwY(#>J#jFy4dOjrG{ ztfDn|h(fsr)3659b^)^3=2-(#hBZK0(X_NV-Zijc4d{2FA*tpBi=O}Sr;ee5PN}@) zMkk?!YwU}oN|dpbUp4taD#cX~LHFfATh^bLAt@6KqP3u<{#RCTDv40P1mFhOP2Dvc z&%ecU4Wba&z(Ix6X5$(LeZcP{VLq0p5Y}Tk$B?9-nqNERReZ{;G38a>DQiD7=Mp*R z5`E4d7-EBG%AyQYMp+TyR=iU-+|ZP@=HY5-nM?SbS76R1-Z?ir<%4JYLxSI*-jc~! zUJe9Y>!!CP;4tN5n#eB#c#vnB8b`YR_m+0&3=GB*Qh(_=IC!=%CfJuIC=qyZ|1WrE z*q3I=ac$G`Ju|Gm;AnjBJ@i}tT5N_>ChxDsIK25c_;hF-s5{!w8`n?-7gN9dEORM1 zjuUVV9>mx)o=fOMm%zbZ)AGERKw#eu*H~PFrvKtScZA+hBEqy8+rppnEr^x!-^EfM zqu<4h7x4Vz(Sq-@T>3s%ySVKqJT?JsX=_#>0lwF9%+yUBGj$VMY~c{7TO?+x%-5PL zxZ(Wzw}LQJX#)BWH=(9BHw9|h+54MMsHq=$P*a_>VdspsNg?B8r9GIB1481hz>9-Luj%6hjyHcI0_Q zyK|{VD|DrqglxBniiLv2yA%})5>wDtx>F+2op7fFDQ-*Z6PQM*3Ayc06qrn;Lx&V0 zrJ2E77>pY@cB=VVD&C}!#MaM5!eD=g@gdt&h*(A&TcPX`kLKHJ)WvFB6a|px2C||a zuDF{?h-7?Rx3#p8xEx-yMJ2n1@H~xWHtN_I&ov~BYh(%<65L{Ct*tdm14>y9x`X=V z4?SE-nnDe-jMPm_avo$HYotDc=2Q2#7)c8)D4XhxOr zVtu$nWF(Vt!)=h^-b4{d7>h#+(W{a{g8^`~IAjIM>Xe}(y}CH$E)*!kL~>Pe$nUAo zn<)tyZb(Ne98MF03^$b4NXZms6GKUUuZ$E8E40u}R5(f$W`~goceF^13nK}xOk{=4 zxfim^EV^D2+l7v%@y5^yYS~sTv>o*_Rt%UKN@mJ>YFH>Ow{nXW-^Q}^FfPI!M=8Q@ z3WE&yR?+DeEet|jnE)ayq`0?7#crv-M zIFz0RmN$I;pdYxuJ zh><#hnJ>mYQ~tOFvG5E0!Y&ktpXQOv#o-_GNNsV1UNiDK&pBNjX+d{t*~#KaJCB?x zj&$%yO>tx=9{IXBinPqhFGjYR^eN{X!}*(EMmVYlI~6+c=G=jgvWwge$zr(v;f0@} zAkH6!?^SvW_sYU`D0rU=KRD_w1X?O@Imlu#EWk(k=%Or4$6PD)eo#w1>o3H{n8*bYo4wi97T{Ld zCCLuJxr5HU11aSq(6Z4Gff{l9 zUp{7UXYPd#yRZe zaEwwR`aIlDh(0qyh3K=Uoe+KAhH5*!qR$KMgy=IU98k+XqR*F^(g`}PHkcuq0J4|u z5q}zM+p+f{EQQnb+=BKU%&(wSnkQwpW$Z8WldBtajYyHNPL4F4p zVT}y`DMD7+Cn1DwT?Ww6GXzd*x!oTiri4Kn^&yhI=&RP)2B4!603vM)dGtx9Om`*u zOXN{@_{VP1YD#J<+w^HfN8x?2p{L_l8k&K_teeDzTS(Q3Hi;BMS?VdsH=c(FT+(L| zic#g*PL@OMgA}9INj0b~K59_H4JWzfC_6=Z8``ePyYk>PGlvfF>t+@~jboFWgPcky z$(`b{@8s%C+qpWE?zfXzMSpO;VR_`NGd7R3nL5Syns&93C*0n1Y8!aM?G!Kke4?d> zrcHHJdqdt`X>!}SLWEEi6533-UM_Un?v9auK}mll4cbh-8)-9XojmT78+S(POk2UV z!3_tlO;=|k{mQz`~6)HWtDifRx zqoGh@BDqyH_XAz+sDvg>OiAU{jZpD<%A@eJOgfI$Z=3g471X3jZI@-XB53U_s;9M6 zHzN)AzR%=q^R!(vcFiMookDoDAPtloYu0B*AKvQP^lNi(ywxs9efU_@3-wkS*DU(^ zIrf>}hc~-6?b;lnBvb#MKaAVtz2|Li@XB{V{9?SM;mW5KHree7bX&n6t_s|U3a)LF z&v97kCE6l&Yqq;dw?^0MgO*-B)taXBeIDBJcz%U9Tk24MZmrNGBAu#h@Mn8f`m?Qn z&F7EohLyVTW^2LT0yL1e0m?0iD5Q$+L1NvDd~hvSkf&Zp+~dSH09DoA^rf>}q-m}W zp&VTSo!A%XP~uBhKzCA|O_ZavTH7d5P1(8=Thj00T$gZS%Qwn@pgiHk_7p`0*F`3i zlIv=RadoZ>lvg^j#oo{B#P&Ya#-*g9CRna>C;|iaA!S-j8UphPWa&<9$rhEJ$alrJ zp`EGulE;ayO3BO8O)bD(S*w|@xYpSi)BJrfU9d48&^8mPzgq6RHo$3Qx6gE?DqpbG zGhKr<+6_yju0-rB=})1P@lfzS11O@F?Jo`^ogXE=55Cnh0Q!%@sLDW*++7@YHOKr zHO1kiu`--^31iu9;lvk>5Je}8!-+AHPG^r7+Y_iAcRCBBdwU}FDN}jjoZA`InfH6@r!E40XMJZqH}rB{s>JPFta1MeaL z6%z4LimrRR0Dpom(8Gmd*~8`HD7~iaf%uY`w@~X7d^+F`+d1;>W||-A!f5t1nlDd- z9W=yD#~oRK&n=$1yG7j>WmTE1&TQH{xe2#f4zaS9+){{vnoq*x- z!{Z#g4(mWLe(i(80>R+)|2E+^c43)~qxW*fj^ae{D`E9@I>-yFkC|FH=ZNka<_ADl z7^^kwc-5o%LA7F=@x5BD5M6NKN{M4qDAEoeQud%Qfyb9vDNHm8j!A!0(T@N5rb%()U9)40(De9FPyY^@9xXeo zv$NHxMw%Y^FRxrT5?UNzRPld%xB>@ieX&OU*I9MfaB)nkoylK;?-vj-QraY~(yUz6vto&4S-J}3W*8(nL znJb}5$f?|aw8>=smbso~qn0UwOE zR+bCxQ+Bu;z7AGAA^D011*#s)sT^Smw&kLOa(L77szb#<`K@tu;GQtBiv zj5oO!#tMGsa&1NxoWHH$8W@+cdt2cq_UR~(5d%d>yDQu$5Ie+=h^s}Nd^$#?!_WPa zg(8oRE8L`3aTH9HFc&1XiVMh(!>L@2`|@Wv|F8v;*EY&5;U~oM zf1?kL`zocG{2QJ4^l_SRyia58PVV=Qe7?R5KA|>qnLiu+*}^o$vxWPwKTtzX z5r3gSNZzNSi3dp@orx3qD)=!ZPUj31gY=12xa%JS6W>a_Fpk?iZezF7(V4~%C_BZ& zRbU}`oxCN(dv>-JvpnObqu(=bavyjGgZ#P)>S_VaPf+{p9&u28@N5!hm_&zrp2OZv zp2NK)I^1h?(7Wm1p5RW6ALx@~LGL`*P|Cg?fhE%!_?v8f|on8W&jb^iJmD=RucZy|as8Kzu-<&%VLIadbx*-gu5nN`yQxdi z8a}7(a1HI~8azk5t321xuE`@_GWq%WOP~|p8cs24@Ces%!sG}08~n~__$eX!e-y=J za&y{E?k+F5W9WAQ9ba~YAa>a%++F^s^1UlOnaCs^-O>bfGD%0b%?;&kN-fVFxejr{ zo-@MRCF!tZ!+}4OLTr}O7SUz8gMe5nRV?2i4`%E~QBlo9T-9Nc>}a9hML7e=-W+y0 zbY7+2O4$SF@Em_5C5Tz|c)Q$8I~@LV*UrkrMF9_up_^9MJu1OuYT)lWxQf!0Z+MN zHI6mYNgmKb81P%_#c3ns`v9_uG5)A1Bz{m=A}4T>!T6Ix*5n2&v_i351cv~Zi!?3# zDfeMia$`A&B5K*!#X(CbTl#`LQyfILL&^}oCa{_aTFW_n=?k)^IOrZK=Dr{y90+;^ z<10g7MIO#Y;l~oGo2e=JxFoH0WjK`)pBj9Hk|RXFa5+gXE0j!8H`_+Cfsy}4uqrt*k6WcfA^AI)=JkdJ?HrdQpzv!C92EOcyVcY(y`kdAY@MSn49Kbfb?0Te0wwD7J ze0H`~CwAv~dj!jW#dTQt&*A5zf>ArOqu%&a!cOd!J+50=Ei5*Sp zY!@u?I(CGL$gz%bdn~()c-<}NXtH34_X~#D4=-CXXNZ+n)jSeY&i1~OU}JDQ2x!Dg0J*$` zSBbbqQUjpyT^WAD1_qnkj1QxS6WJsYrZ8KEBxa-Z<1&0ohGd#X`MYIEsyvh?^b`s? z^Nd&eB3oM6C6b*9z}X%5LYS0_Rch+Qj$HG&e0&AAE$A4<-dk#SDwnw@9&P(0U^W-! z9Q#HoeEOU2Ku3PC@U`;<-1{Ifge^b;wiNzw{vU;r=S%zGYzC<-=l2#~Ja4;Z{A&@M ztrbl!n(2?STGU}E6==(%-P7N+OpTC(djiy%z??e(Ul?il&{I7=^bUSwEUd!5 z-{k?nU4FG)e~^tKL_3P<4p9Usx~3 zNPtEnN8b{VH6B!|4p5%O%zAa6zZsa+>UlLTjb)0Rur7(*7uCdnt?^P)EBF^AhD_!3@ktg z0}JF}V0h@Q-ueTqeet@t^vYCwnD8@b!0#DGU*e|lB#$q2Q~0Tfn<)H@$CsEWyubzw z=^4+)427qm{g|xL@DzC(N@1JMy594#j$3-pHG*}ic1;W$zGvZm>8~t*<&_x=Ed$yb zt++mRYE<_`7W}Tu5jZ`6?$l|En#9I0o0!&(k>3x2!Z`BJuCyk74{;hD9vIt}z4&L> zPG4>ZnKu%b~mi$}6C}?UYxsBhjQ(GbJb-$c>bH zyvF4){}DHG6&r(0C5^Q`Ktm+;^)kUXV4(7fa-gHgoVH z0k~r!pW&x%-E*OFti%+xh3&oUGQpTG_jA;4^?|Dcpv7{dl83UAyQ8C6dPum9Wlsyw zVLSYjqt^crV@|+BcZF_0B&90dZiKC6Na~T4E?^f=0~l`aY5#PB>TauIw9|R#)GwMp}R;gDEw`|x}heK{Za3rQr>Q+5_ z1%?MQXG4pkT$DJ9@;4|S#!N64EejuBl;5>B%$>HZ2y(m7;S{f1T6s0p{WjWFUbXRK z@>qKn@~rL{6O~k64YDb~)&P~{`JJs0a1dTcR7RYK@Zn+&WWkMli$9Yx8gb=!h`Mxo z$MFsYQmi0r9S5Npq>tpgDo07v&r~m=KqX@70rgr%b+~?_ex`bgiY;b3iv|@Xl)l8_X+ALrsyIDOqNvbW<+(bj7pNi;$DzDG6UTfsnG*RRrZQxj9f$*!kqD2u zjN%gDO9AMcLFvkQ8^jFd^o2i#=oHb(Zs!c(^^9fHE%c+TbU%keoETb&Oe;MEkFbD< zVNX#~K*UhS=UOtURxeR9-w;3%;`ag%(ik9s^J#7iA4L`j;Jp870!T`ThShu~3mp_b zCgLUv>6jHn(nMjoAb?q?BIEq&F!5&yU?$7^*p+RYG(L0UNGQlXy?Z=|#b$SR3%5s* zdypyf?wJH!#Gk=N)O}=!v7ELbgzSWCQB#PB^+;eM8-LQZm2n?ObPsjv=OF4gxGC!Q z?B9s`WuJ{q0Qf3Lo#mwO5E`%bA$`3-`rMrKu}!C=Oo|Wfi>goi^1QU~#o7*%_N}|< zN@CY3$;sYnB+aCb^%e{H)-}RB9c1qJg3JYTGN+Vqk4B8sxY9Ooe^i>7Y+*Iuy5d;h zYaLu{|0x_+mE0X+Vp}3W@(i5T!C9Pg+4VN;fkESjA_ekx`})(az0t{Zw?MB5AA-VM z87^&>eueWJ)ZhRD&Z9xcOx?QoaImF6(FsII5)QGtM4PmS_`a|x4@wia6y+4<8Jy}T zJT;h78(P-o*5z+77v>QOtIACnUY9?%Hr`!?T&0_1IK|U)tDwte7z`2Y1)N<=gHPBW z{Rktg@9rD2sm>UGF)A?Q$qXT9t%L6(A@+k--h_mzd?C9{Yqp^{G$^O$_YcmX<`WE2 z83|nebK!B^a04;Zcop$y;yT_6Z2=N=;>VTC6${k_#T$o;aDDU&Qe2JII3SA(OlCR| zS3jiqz{xzv|F=}94PwxZUqo2bPsigMovs)2nyI>M?E zx*q6TU*6h8&nQGZt$CNGCCD@rfFWpFDFSnU>U@(xpjE)d5Pds}fc~mQ0NrX-;`EJ5 zNOocwiGGysl!O;sPD+&?)E_p9LpgyHMVXwyiTE(Fd+a4rS%v_L%tFtBL>P&{5!-FP zZxOOU;O=OGz}*z^pV;BCi_4=UNrqtUY{9^)VM(=tB5&}-!fGDbiv+|62^7*gfVw5H zBT<&Pczson$^U%QdolN)p?6zSCynSoYC!(@e9OI-<6Vqk6co6$=#dJ~we|fX$@i+s zZJ!5MkX8H`5x~xWeFG$~6?^_0*G^XPM5Gmai!rfW02e9d7Eb@AUlt zNwn_h5dQ?W`+LwLqIAl2w$zy1!JG*K=Ma0lLfkAL`qm9}YOHr}HyiW~sM^@uDJ$7N zdvXWkAsf4ERAeG^r*t+kdw6mJONvOgvK^x$Sxg4zXf zYG*FNP0D1OY468(gj+^OI>2u4dlkU0DpSnZ&FvSPI=dir=#mIsH4(bD?90opL{#9L zIrp@1H*s3w^D806Pg@|>zwl6k-)Qp z9Gz31fyWRG?|YPIF_WDUC?;*dy%f`gluEQka>|5@?Ccx#WJ)i7f`Tl$v%#}WzvgCm| zr!3=~QywJ0XvI$O^wzU7FoN~`boN_Hq&alu;AxHFu^A-w!P0UD1Hn4%DSy2o_U4NGY9$d%n>ZhmTcm0 z=oCZq>@#Wq_}!B~_qN>GY~PmTRAQn>v&)~xH4Vn z(kj_zu*fF1-ws;JIow`ghLt)N5)Mij$ClQB5iZC_3%X)=P?W3V$&~;Xnw(o+p;{I*ThGX0M%=@>9h2LzeSRSER)qy! zagAF4Pk3JWPjbp2xON*b(tWjD1igie;`f)@`*43KUS^qCIObYdHGR5$o#n#Y{xODByeQIEv zNNlj55{9};if3!M7@72^j7L6g4ZDhM-E<2mnL$Yvso9oM#<56tr#=8QO*_LLqKLD; zGCtQrGEt?cC;{tBk(ubY{?2eAK?!1KIKGLU;eS>3$64P3x&*^Q2Zi%R+(hAhJif$4 z;bOu1*4zTWzEzlPb6Y`9&{Bhv?`%1#5#QUqpI>e~6=F+1@QVztmHCGx|B=(ED7sTR zjUop3UP+?XPwn3eTRx&tmE%K+M4i4PB0)JruEjgR;d+EgS>j=BLrmBj$&Ft!?v7>Org}VMNq31i0h0j2R79i*>Lo&xINTr zJL=J&hmlR;b0kKV>l$>UBr&q1hz_Ne@|0j?C6CJ)Ss5QD$dx2s{|gz}t(ZS)ej6zA z2f7$AvJ}!fco8KCYYEz$G9S4de+10y=T^-FX1gCN~HIq4xV+*y9z53hm z1ojZNR_4iG`t-erKH1E9UiK86ZIZHGaHe0eeK?U&UgQ*txrd@NUlLUzNYr*gq8{xC z5>@e^;86!AhX;u*lkUceRlJoNt-4csu=EcTJF+9wlXd=7&Dfb!x3un|x)qgI6LGkZ zeyJMA42c}od&9Pnv<=&eRurvPFDUAUZGdJvf-*-%T3eri*k$d@34&?u_1zbW z;?&t;Ud_@^N7Qt?QnR66aDTTkN0J z$d4HLLW4i)C7D)p9^8L4Dq+965`q7_6c=Jm|1D@HnRW{?o0_48LccXiH$EI{8V;d1 z`cnevOftA3m_0)VT?^w1g zur4xYps*MJl`NZTrC(pAx3Ch+gL~ILpJKEiQpr>LQk|goRG}YLFjz||yZ@VfJ~?dj zd;T-n|6}f50Hdhx{qddM+3f5lBpVX)1`+~E5O$N02ZRJj05L$2fT#hYO(28>LI?;x zvf}V;(W^)RIVfmRQK%O&T9ijnp|wI4EmT`oq zU&x;Mp4ZHrojKq4_q#CDHGsYOOzsZw=${!RcYM<>Ce<1-!n321fB;ai>tirsvByVQW~4WZpn2;v79dw zV%a0FriHNTk5V)JScRn|X*n!D&o!efbEJ)rZXUxTueSGPt0ua7vKPn4_Gix|#M{~S zU2Yruc67S7uRYJzs0j9*o&bY1=Ir|)g4y?dCx^Q3SJ>hIhK*49SVRxNDw_T#h~mR_ zfU6>rf|jkgAv)Dcfr?+Hw5O?73Kz^N;>}M`MAw{H?vitDeRMylqO;3g>6?cSRoS%u zz+A2M(N1WTR-h6|v>xr>D|Yid7~NDYMt-Wlup>7{r$Wbb4%Mt2_0}|4K2@?aM^jRj zl`KV#MM^?c!|EoxWdN+2#^HD^YZ-v<9W>37fAkux{9fcc{WgNVHg@ zZ^`ogPDC{XyCo$qzt2C%OgTex*@+cMFPL&ZKSrPYFjPh7YYx$9J?f3I$SIqhU;bad^MqBD~)i zg!dymf2nTjw)e@1f|`N`iY{mbh5O~X;_DK0oa}>J%wBtk#zWKXf?6wnZ0NX?5eH@; zm`~k>{eIhg;J7QeIGk>F0UvMJ`FDMR`e3d}I|EG`PC4tqJbp@Uk>56tUtzZwSTL)A z_clVYi3=1C7sjd`Xw)#ieGzna-$8c=z1?G86W80}Y}E(qOLV$JZeQ=y*!h>Rld2E* zR9#Tdmr%x53%tP2!ToT8ssnZWcDU_(TOD1XcR}#a+C|t#oTjRP4>aPR0k``eMD3)f z@sANvV`n-O#iW)wpxu(}s zvu5RJ8I}}i_apLDKo*imNxdSvnk>U^rV*;GlBQC$Ra9syIm??>o%3J--$Jb)k?#a# z3JJlt9?}DccZKBRdsztCbr^{JThw$y&i=(FWjBnBV{_(ESle86G9goqTnXzd@5I#3}M2^?bbR;CP znG;;$0AveHy50lJHw}3uo0dV5X@X)ev40qMsa>oH z7IDe~g>2S#HhUok=)6BsUuDp^0%6K9VW9K)l6Q1HtY(mKVm}9fmCD9FfB)(HsZOGBw?M50smO z3wnhSLbo=;c;-Wn&so(Qkl8OO0P^Q3eJXxiiPHDL!&stpmi$&O<;^_#Q&0ehSmbbt z(m^DgSrU?N-3bCyAa+$*$l)2n^zHeT+*YIjb|D+V5PIs~f+}+;OmpdoY=Y_N zm$3XLIHdVm81EV_JGs#>wJNAfn1|>wRfVuM2|3}Z3(JWcXG#g{_pg6^_b(0m?(!E+ zFE6EQ=P!+_oI$CCn@y~0mor9JLP&0aoo^SavDc~unQadMvXDKLZ?By~4XSMw)oIq> z(uA7rH9-Ci_C*>5IfL9_(filbP0{#ksi`l}SXGUqLQ`j8LaX_L!v0a=f+rBmo9-Gv z<|7PHb8IBW3024(3=(-9o959MKFVT%Veq9HLI)7I_aHJ~$!SKLxuwYzu4W6_d22$N zlfC>5-jU3iv0=>Kiifpv2A+v0-?TZ2i3m!J>!e$)r8!KuIjO7@#~PLMcw$`E{?FVb z+t28%rgiMdY1dem^-I^G0J{C;OxK3=nP2~P(x}_aNdKeUvZQ*+oB*o_>=!vhUJjRdCS}zoPFYHeF8GxIw1ycx+vo< zQ>t9~8(SaS!ZK~jeJptrjJk5Kbu`&&{S$tiat;XW8S zV$}fIi2=x7oBX~lnr%lXD|x9uEzVcA zv{GdrEBQ@YlBKD>hE;DI5W^2z+R~zM>1RGjo6L%*CM2^H+Y-y!mUS+teH8uN!13eQ zqWcq~Rl5mUl3NbN&K2(ITj3>;9v?GwSXb{n7e=XBd2mwa$pYe7+cSUo{EZiSe(6QjA5Yy()E=DWnbkJ0c^=gkBINHw=uMHLX5K^N zsKgIY+-RZj%pBrB7ttza)P)D_GRc&=MN7G2^pEyjVjC&sBCO5VV zjc*qre7hJXw+n2jzU|^BdcT||_R}2rj@wsM_cFM?@URg$4dWP1y#`k!V+GA~>p((VI-B;%ts9#GH z?6p3LDpR;J9p7@-d5miCQHbP=pk0R!AVzoQqf~N)(yusjE+!xyV;c1>)X>(G90Rc- z^(4J1wy7wiIl6^cG?+|$R2D|)MSK`pP{?65a#&pywNtYkRwai`MHLaQN(oun$x#(@ zRArRWEJsZdSrg^Rr(458E*rW4Y zc>^6LQrPron)Jh+ccXZDMCvY)0-eZX}&pjP{8KfDOL;i;&S$rM%R>Ueguaz zuVdwO#Ee|MG?@bx5*Q8WYteKMZ~EH7n*dnskBqYPUgF=!vEvU&r!!CJoCMeKQ7B~Z zj)}3e_x}JvMbjFPGbhgWj_5)uVC>)j;3AsD$8e_sJ9ja5ZgUymxzxpQ>|)QpheHZ|IGCl})hE^Z z92Q=fukro5X&$ng2kh4>D@looWrx4O=9>Ho`Hj^h$9Oqy<^7Qm2u)7x(6FUVnKuwZ z8QQ&bu}jb8!69k$X4`+>3uNCsjOw7)t&rrji9P%V7Wqb6I;_-4h(p^quukNBOtby~ z(zZXS#tve8-$?6^H}r@lE?p_!r@WaqN>Lv3@72pyP3+am#Pldib^cDjzp~|bxQZix zMXwWf=u=eUf=;tX$M=b4w?_;G@oI-v+u%NKCwu1vf;297=E1dL6%y41xqLarX5NQV zzr@E5%j#+~7X%!;?+ta3z8f)Q@UiCdBEuAKiZKQ5>JQN_TyN~?E0N$q?C6Q}jQyPI z3TF++E}sC}kEplAdB#poZDJ?iT5s&*R7d;xjM3P*3+0fm2|i;7r;Qi?@lm!bGEi8dTed1ZmdE1ZlQn4DxT;S9aH7D zy68Pl%zYE@t#T!_s@}n;P?w_8LL2hTWt`-DaG7g-cppq*9Uw@)Y7^^N=E~4-q$|s} z5mkpBnf4~RBd?Rb38pq?{nPVC6!%|Sb| z(Hu=%Bbk|*_^7KeLeJ;JqA{f$RwIYiMNvC7%VAY=*f>Hi|R$>9oy>@m5w|m*`-V_CgEMI(6VJENg=^DUt5G z^VU83;;ow#ndb@;Ul(Nec1H|0Z5t%zS?z-Z_wd$9$YHix?BP!A;qZN+J-pPvhc5}* z!>#MV5eIDHud-)v9hA<+@oewigZe|huH1%-qP%>KWy~9hEgBm$YwgHam0I7vjq6xM zTRPvgE3s+cCpPV~>_`ES7$>~p+Aeo)R^Gpt#*%AeRhBe=U>NP-gcOdX)Y6NE~3HL`Sg{C5)+bzgj~~+I9>4L?_E>Aq(4m4! zPapFc76YG78@*uKyJEAspn(rjm6dq8l{AI@W@W#4J%KhDMN32*w%gBmVY5-CYW*`o zs%;<@6vvYaTOkUIY6ZhcZQ)d@+PKFo;#%-7>i_Ucl?yR6wF#4{+_LuxWi?u?{moa| zLQxq~l4W8GH$eF^kFgD|@!4{OtNk`9?B`jj2 z>waRQHTL92$Xg8lIn77OK{UttXU^Ayf2NYiUD`DgHlA4?#qK{dD4IFGM(DueR#&+8 z6>t0#oOR;0%r2=pkZ%*&FE_a|)JaRt7WT-f-hEh~0|V_W;%tnSo!9}*SJkO_2ira; zx(6#h9j0pZ5G|f_%N&H3i_P-Wh5UsFpPaxVUUXU!-ORN~<^1=GCiR|+0()=kIhOso zJ?Re4Q*S)}uon3fbMZQ*B%Ju^@fY*c)mvOcf8P37e}$bu7zF-OTT4NVXl%vV*eC>o z2kCL*L6@prFPPjze~NeZC`X5PumZ983t^Fu#3w3Gu#|^fv77Jjt1{<%@nKdHVFbc*7Qg`LM`scJmPIyVH~x*%YeV_IQZXyd|7H za>AWveFKx7=Zt#gPvf2DU8sKAoyJ;oVxw7d1?*mTqgolr7MbBQvhDqNr*#|X^I<%O zcjaqlr@0joANRP^%x{N?D0rcGFQD(59Ghx>J5;>q(YU8vcI1(MFiZPOT)1Gk-+snj z3M<{n2{sVKs%B;PJ?zTRA=F4)iEIHMH`sEV-i7aW~rT!ab z`CC~g(G!dMfwIhEB_2p2zxF1~<}{x96UZ_iNRNvhmY3xh()q&5Nhw{{Fqz+P+_xGg z?sfwRWSoVZjZ#KnvGGwA@-S2Wj>CQi(RCx5unW*lSdQS!XPhvM8qBtx)PR+T$ZaNl ztJcxfpmJFp_6F|sq}k}v@zY;q5g<~b2$q>h7N2oKk~m|I*)#yVih7XGs?wVdXd)V| zL<33V0xNj@9@{yeJYu_Rd>+wiYOL+|=n<+A`=xZ+C~n6ck|b_09bls{^-!-4<`@04 zw_g8-ZNv5?oyT;4ce1yMOncl_nqGztqYL31a0^6l@U-k&0LKh2?t9F*3^E{#z5Rr1 z8+R|ijD6zsCxiBh;_KmF&c$y29YXi-5G>go4?_@gLW*KZkKpC}4J+9fxIe7M&(Udr zuvWnmEO2{xJ79Y_93i%cuL8D*6A@y2P(fZiB~H%whj!Fsf3WTWt#J>FtcZ>h8wA8^ zcOu3=-yn8l2ME|8K8EHU8-(&9YxyWH-I|EkM(z(EhKc>5KXBOh?+@zZE+-qf+ZE^E zB*5q`WMzXAE7;+P7%hb!cY4FWmE|~kBmiG0%NgvuFll~RQconPY`bl|Ts9T2{+eg+S=AvFKbytsRxb(N+NrtkK}y?mLujcvNq z-kFxC^u^cgd-CV5n}Mnk65=x6*%i+Ry|df`v(r0^kV5Mayq072Ts+|)<7WuK>X3c} zy|v_P)%mSW>h#tg_P@2PX{;<1oMFFsbN`O_TD-Z|{b43kF;jAq`>S}rzW?2Q`rt*l{gSeDKUVg= zqXk2{eMj@MvvQ>zeY=#S?`hn-}0agSAvIEw*9+AvUWvCyt3!Nd2W1okikImQC@i%SW+`m1E6WB3sCrYh3 z|8MCiLvX_M=3B91q>T(1tINT5*@-3(>LAKxo4Vm!3JI&pg16aE zVcth0WMVtb$|+RMb_2TkQP6lAM6S@%x0K|2J_?hoaTE=T8tz*3FzYJ69~7nr!&&?IfuS^rt3vNTg|vJ%{8yM zW({gweQW)TtDdfZX719T?$JhOuGUhtUw{4j+@*7G)kd!3z-zazhM@&wK83#O>djWZ z4}J49uey44lFbPc{JIp^KssR@`|efOny&QU%pd7w=TXrt$~cHO8b9jqm%FU)1ek>6)!dNfNq&|{M; zYpql@f*ql%V_bu>`MAqzorE9jLzePIT7MyeE2qkA5TSe6qA#HPeqUI?F25V+D~Hyh zh&|f~!`ODAJn2Ahw!d)bVC7GO8DHyU*M2!T&H4^xhxx()w&M+02(*)-%rDLO!AHK> zCz0V-3ui||@TL656>I+3+?7k~$G>r96nulnfh=UWs0t;Sco9q{8B}uZILZ|gCTf-H ze;sTglPn?&v<^$}!EVaZdc+oFcS()2a|J4lWO9M&S3EvELnoC5UKo1)OeUdcah+|A z;JLBp9+=xa*Sqj^kDcdV$l8ZL12gYLOkslmX!S1KnviIwSi$?w?@fMq;&tcyA++~y zg0f~LJt*N_)I0eB4$T}*8MbKjjHH%{It`$z?OFFvJc=Y+$moPXzPpi}i4uz=MZ7P@ z_6}blZzIXPh(&GocDBttinz-3N7eAfqk(H)82WqdU%nl;-K+6f;enG2V^2&oZbRIdPc0U4L4UA)Q~OP0$tP2lZ))GN zwbfFxFVT|{8i@-M{g=n-C7)Upy2~!ifJFlAvk9p^>1r*`ag_b5f2uf1mzV7`7 z4&|5a=ycisb;MZ>1K|McV|m){PxN*~QEgG<*iXi&MLd!Csk3o+j~QpdDJPDDB`!`n zX54nKCHS@ja6IqKlu&OFWYNH$8Q>r?NbuTK-sgBz?)<#7!7KX@BLFh@zUJhOwWNs6{ou zj=iJi)LG}%DdP|tu4CXh*lV9t#_GxA$Yh&r()}-1&=V>R!~-5sc@dX7?V;I+=F@2p z&Hi=lH?vQj4exYX-&w``&tE3~ga(_n(-UgkO<2$anv4fDIVkY?a$n%{@d*nr#m1{G?|E^>_fIW%O^-fc!`r1U*mH z+#m=z8;8S|h^e`uh@#ztW{{vH-+4km}2z@Y-%riW6TTBYCpM;!mj;4QWV+3oD3hMv0sSZ^gUlcGdjWoFNQ9XkyHICA^2d;SvLleHhq2xZCbng)lh7k@Q4 z$!vBo=fk=2P6u@LfmT5*EK18}->!mM>)?zM+ z(pvEEYbc(dvS>>vDuSjkc82M^R-JB)W zCJOwAxGW<0AC#U%6Ho6hG<6jF*ZZ!OT^JJi2;tuB-HC%ESZllM9ma!F(*krKl=>ZR zPX461yP(vZOwRs*$YcnV8&VM24%%w#351t(!hasL@FvWEE!Q9unQU!G%k6?n{s0mr zJByr}k!t-EZ=Ih)wpM_<3#5?8vy?;mv70}>%E{{TV4+(y7hjxEu4jwT!klL4a}U{u zYHTe+q;i7!4j5qC*|YDar&1J$xiBRsl9@SQ1oi#CpqZ;#_TBKSBbr%xo1L3zhavk} zoTKB}JOoIsL#$Pzn-MAI(U%j_t+OG1lhkuYG<(UVrdhY(W&)_^eyw=g#YZ(o;b4CN zOmf#sE88>Jy?bqISsyRB~c`~(Cv+*;?I)mEqFT$o2tVtpGRXU;(mZLNopsV*+3 znL{({3TJuiPS<(il&wj@oYw5Eo5|g@ZL-FOn$vLQCW+WNoeLA;;9aNY496sGFuA`_ zkMuT(uq`BeRY4b z=zXy2LS1ClIsNFe-MDIwy{0P_bM!#_G%6d)|Rl~x|h31p}cXNLbK(-iJZ_0Pxh z9Qq3Yfw4)q3~l3|2vV)L0ODCe%_TST8t!8Zbwmnv(`*@-#gC8^0a-}&VsVv;-f`4T z(K2~&^=n?KPNYIp??k0F7hjP7JOlv|5+&?Hi%lUplX4BeKJxmakD_g&%2JYNnOn-V z4yqe3pi*+LHYpRDdD~d~E7Vpdpe1%oy;&8X;r z<{&W)m9S*T@iLXlp290x>B&a?Dl^gcHg9Sn9p@0XzK0v>_&#(8IvJe#%C$MmQCmD< z3WKL7)% zFaF{B1GkNerytf3$Z(t1mBF6JY)W$G$bFt~T-Ph?{P9c}Ph`2B)>4dWmdeN>1D)0^ z?9ankir1B@{DPgkDHoQfi&9nAI%Hs&^%@X<0>3n6yPY9C-mHmzGGt&s5rHwcH5vx2 zkN0#Ui(krpP+gW4(FOu%Wwx4{oI~7Bppiw?bm+q*r}cN3@EvjTDzur;JJ~wxRcY3z zu|Mr#&wlGlWyRy7<5*EHOsSeOAUSFn7ahGh2Sy%7Xj+xMb0_SP?xi04$3+iD3~sWM zP)@MO=c3cCCfrV@kjyx*R{F5_Ug$N8h2;+{HRCY|`Il=QJG?EiiY0%WlVRsuH$;Y? zvvYaw*z8z(FaQpaB^h24Tp~-pPXi`%eX5^NehNdG5#5m|)GLU~DS$tM|Ksyd;)>9` zAzbuA@oZ)2j0b(&EF=_jXsh+kxwYMPF3gwp+cPH+Dhz_WHGyqyH3t`X7F?L!HrqS@ z;QYtQVF7!f2T7O<7Yv{6omDvh!aSIlKbaEphc>Y|>npLw^J{f~7K|s@+8c&D_GvLcEI4;i3f% zg0nJsEiT0KS(eSlS^WDsN%}1$y^{_XWV|W)tF?3}94^MFHrn&C&EG+VrjnnA-;e7d zR9Z7|5r)IX7CPQ4qN=HH1F%h2m@CAcp>yy0=#VE-2kWyUOrzxCOHdb7DxuF|HYNWv z920{TN{_oTRDj#{(0$Z8jK)(6+_2p=WF&!*`}e4C1gkWvokI| zFxS^u6~@`NVll8OoH*MG{MF!3nfgDtfC#=}x0FY~Dg$Sl<}{ikxy4Zna3LSnh!KRA zlbES`kKky8%`DIJ;}v>wEGe*v^R9 z2rzZ`-Ji#qIj7a}LmgWhGp}ds2D?MpLy_(Wx@Gm= zs!fPz6MMQ(#?#Um*tL#4Ms{_DUH?1E4eYx9PjI*6*p+NSUgd0CC6Fs39=G((i)G2c zo~&wuT~$8k>Wu&l3&ad$h3;&0L@{5xS+rLS-gCj1JQpQFGNpg4k0^YYrHiO^v?Dy5Ez$w z62|q=ob_#b4RJ;XfeDfLbe6Y4;9u$_@Gs|r&_~U=fayRKRC^i(Hl{v=jXh`$%W38( z6Rb~k4q;Z#0`ZcwK!_XRL1YQjp!Eg|RGS3ES{2L#dBGE1r~+e$NvUOc!*l0Mlg%fF zH%uL^v@h&1jfMk_Z>slCHU!|-XZVgm`w292_?ht^;qeVs`3`DTv{z9Fo`^UVpwrI* zS;o;xTl7$pmMX&t$yi!8>0yMFmEi;mya}P=OB^T&Pc=~Op| zqG!b4aEQng5g+if%&8mgkr#N)Sl~Yz)_}j;@u$=i_r`}2zLevNoklw!MkrN|qZ{8w z;}+2mFUKKcA)SxVtJCNp2M*nhkv-{*#E>4wpVBNxA$6e`wM%yzjdIj>ohh38@rw{> z40y*N1j=&&_GBju2S;tJSk5C{1u6AAI4T{9RRcHKVWI;rodGJPl5jb3lT?nAsML5a zaH;$g2otSv#i;b~Rqm;JXl-%Y$Wfz4P6GD)sK*j=&Utuoaw>=aDBxWLqxrWzxW{EH zz)=8yEx-c+Cykm2HuWXF$a2&K{&d2CRnzezAmlZ^%|-N1xalh-)pBc*B~0L0w>xue z^{wpo9`36+7fZOZ7t(Qc!@mlg+9z`?OMWG-c?8~pBy!Xec^JyBC@8?iWwNT zi7@Q8t}yJ}Ov12DVX!ji81_z#`neCovh7!cN!-*o4~F(Yverx$amJrRIo z@Al(Z#K1T?3>cHMuvz6U%$fo(BF@5=2jJKPnC&rvW2*vi>`dU;!-9j|-Vc$v`q#ns zpQG7({b;r>0L{K4(5%;oW?9zK5S;YOy#Cf>-C)dCkK*0uSLJTSwfbOs?XAWVm4n6P>~ic-{DWxYdM$vIGutOYs*hW-I$ zp-2NLoq;ite}HlN!hhq1z=%*@$^SPOLPm7{I}~^RpIi~0elz2QKm0rh}wOtowlvkMF__+t2Qw9sdPBf3mQSWa4e}Nfw@*>!X)=G!>32 zRAnw+O64N}0}X145z0`sb*KZiw2&aP?RkP!9y8N&jE)Tn^5X<(Rw9HzB9&t{KZ(Rc zxRV&cCqXV2b64@+Jl7z0|5QGO`d_Hjt;7{`5wc%`9ENtK3^StzQak!^wINId2@6vq z#}KN!RzT(2c+VyF8_kpaV3VUd3tYNr zt8>iq12vA>egL+FexTCMDUIpk)X2jC>2ZLqA4^{y9Zk%0P)y5Vbn)NPikNO2M&)xcbG&{cvvf?{3#{J-!r51Z_alh%v^4r$d zcBq^3Ma%U?maGY7M!y#=w-i~@i$;tf@v_41yV{*9{OW=uBnwgU&mYe%WDCZ*8}0QA zs^?CfbIZ~OR=uWITK5v=sMYTNEOuIE8Y^F&kjR$La(h_$V~91$js58E4BR}7jQu>y z#m0VIzPz>6JzY^$R{aw<(kVv6gYH%#;LVx5!QGEddngYngU(06wQmg)lI5-;^ga8ZBUr*VdrYysY<;t_j8t^`dtu-MXcr4xKv~rJ6K9;Ou7P-IkOhasx}O~OGuSFCb>(^cszz*>mI{?mYR26x1#09&Z6bH zBs#v0d(5%oYh&W#GvOlBrP!EpCN?KWddwoOGa_5|(pxQ^(5jh`>d~`~RFv{qOC=QR zt)2=L`%n^?ytSTH#!=xaAyQ3T>s@IawXNLuO#&hh$MB?%hUJUHXW!#U746Zo@+K~L}h{+XEH<e;L=%ZY zm*q5|H5x!JvC(khGN zprA6o{PN4Mh|1`q{5p`zK>OE3WehCZ)558Y#dE3~IPtKAmDJ~@be~2BDNEcrEOma& zC{|hR)&i)GmZ6D#*z#(3VOKJC@)2YYl)59>;n{9=-*2nk83D04ucBKX9Ufi0+FHCu zE&hq6c&)kkZo~%Q?gsBG;n9>*`q#zBijT69U+0WOh)yCw7)TKNK1^7yKnu+2kS6%_ zL*C1M2RR+`4h&%`1Re4&NQD48qzS*0kic^~#QB1Vv`ut~@+Lbo!JV#b7m@*@K$O3+ z?1`uX8Yb~Nr#-&I44(zi9*2ckfYTnI;P?Mb&>p`RqIXVvl!Cf0=d=eqL6JX`hU1Hq zA6rCh&flPeAU{}p9w?n1=M(yyxA)xl-toARik;SprsSjN*Jt_3kE{Sv#0~rAO<7yDqcFAp>;qW5Cr9-rd;h39avlhV zcLUzS+qdxcU3#aA9e{nt(&u+|WjxP~gj+(7o?q*PNw~A*lT{^jyfy0R`FpcYoy{Tx z^B{{})CA0F*y+Pc`D>F`w|q6&7s#3>U5-hY%So5>NmpZ1+~e8gph@YjcVA@uFD4D1 z^T6B#3+W;c%-tI0ohvS|kKw1FbE9~=LjPo!y6b|u1$?psOyQgz@63N&T7S-B?Mi}rIwzrl8&(D6hpivw4k-;sif+epx0AqjLSq<(CR`>L@!)8Cg!Qy+D+`r<8E3flA!(<*zMt9~6n(PXeoJXC< zh0Vr=%@!9H-sO@9t+GJby%+#Yu} z3wH(=4_b0Z&?;TQlJn5_xG~J-!CY<~lW9SdUBQx59DI5fs&Qe};=)3{f60SZT=%_x zJVHLM43oi7lP|e?(S_~JQVMCGKZQS{<-?z*y`O9_srETIL%{QhcK_r=WA_h$`R>o* zExa8&k4}zU7$7Px_dNjdJq*Nm>EuryFQEJG`Ke|e^Qj$d=;i(tm|^&YPgYI9@Berq z-EGfL9hf2%Q(VCh!1Dy)2dKgi0Q#Sv4D*%!00H|S&mDjt0F!wz89no+@BINvpE-4Y zy^~IT;uKR;}DLs)LRVUG7fm^FGxWY24z>52W;tx{({u*f5dI6tI>KMF#TY zG-g;m4N`3pbS|Iu>sel@rcj}&+$`!|9D|iukHQLKa`Hc7Vs&oeL@qPX$w2r+A4Mac zNh$ga-=u)lh^A3S2(VSxh(%FG5_4i{*)5rgQDmoNfun}@Hgzs0keCTCL8IF_RAEn} zkrFEB%*4ns)F0|q&P+&PEN3PpP|TSL4sc)V?dY$R(%B(9?V6iN3g9L_=91X`xHWJS zA1icl5P#q%lBj%%A1_Oy@~};aFO7A;DflN4j$n&^-i`PYjKz)2`$6s~{jf=C1A|f7 zZ`G<*tIbzM(f>63kLEBPT^`)aa(#s*tD=t21MiM6`M_S5TPiH+6?5lyVna+#*Dao1 zf^YWv?-Ihhlz)CNCz8_@C&E3Pe^>3kYTwY+?ns3#yvE);pBANir;d-gQ^z}&?wmUO zyomG1;6>Q_c{$OWNw%5%bf&5t2;fEz!)2kEb0f;rta?#uy0rwtNFNsxX^rD%K%58p z=>z8=btGXZyq}LGAoLjLLtbVj3hGG~itIj-iKyqy$Zs%F6g#&RQqA?OnyNV;@dW6MNy-fjh1jC-yYJuBpb;pc8Fje@5y8YexRy-yUfpxYJ4C1;GU+=z{jw z2dxBMP)@t2(-oNpy?C+|7?rX?@W4}iqg9m`@$4&Q05%(MrA%iD`jG&NZCkBA|US${BZ6pCS zlfMb1Tk6O7wohg27sV#&EjTvsjrj@%oH3H{jV$*B&^6IV=@Ei?l=0Mq@LmrRT`Cg< z2rtS|YMn@WJVMdoZW=O)&H%rY@cS{90X2k^Ta_|ZsQi{hTtJ_4l4#ybL#l|HadMqY zOO2Ck%gilxCf?~7+KKc~YX0EwQz`pYi9TfULslkA-9P<(rpZ1PqR)P`d_{d4$csmu z>#CMA*{R&b4U|gJL{_!RGI=p$WqT<*65n?%yY(S=-=3RCV{7hVh4uOH(8AF1uvB6< z$K+?I*vApUF2G>P<%t#ehq!I3<`Q{FH2@8K7$p>CHDWtFLKYa!ipuZoi72RnG)sW)G^5At7 zrcWo!qky`HW!;+rb&txr*8=KxUN^x~Ut~#|P?pN)JrK~g4{f&7ccfqrUM;@hLPDF|KMIN=j5^V~KEI3u< z2SVUc`Is~ zl~J(K$2GV-u8@{h8dXJ$9A>~jNaZ*{-J${Pp9 zrPQH?D1%#NxmuRA&w&^;J;Y9ahiLN|%VCnlBN1y0;b9tNoFv1`Kg>#AgfVbIUKb+G zp+b+E>(iscJV_7{+k%J)Z*8#iOa;VnBU2=vu7B<2qN9R5{R4sgRE-dgaFkEt|R+t30Etnbo;B!Ld<#>)F zfe<$GbXi;2Wv#cNs~NnFI#g~vF{01;rnYa8^HEzZzbokv#P5pI>(1%=lDse!7W2J( zvPoh>VPk>E0sC$>ep7{bxB&#?Lk>8UCY+3OfwYK;v*0)Pr#<27B(u<4!L!Tng|i4F zEbmcG$pU(X)Q#HN-vz@=p?;x>L$^#aKlk;qiM9FP3M!S zr})fjUp}*XFDk9^I5xa+?xEu#FPz`N?jR~NL!XLMnV&MeaGEjjA}<^=k2bt;HtC_S zVJ^c9XT2W!GisGyIQQyddkGxgjy_Odg&hchD#IS3k)xjEZPG(WFBV;!go}=Z$YBRA zIuas>9eC(Ss3z+S6v9rq~9h_&5lcpXa!I22KrJe%?d}q zyEBPZ9dq9>KMaT-o;SAwt^YBM`|dn(3-{gmgMgkC&^rR!DWFpV+I35E>eEj@{fuRP zktLz1EOjX+`K4$&gr;Z6ytuzW>eaJn=deY+GkblXO3~6M^I>+^>+s4gu1B!!ZW6o% z*c0<`!P|Ssz`J)^W+5*5Sg_pLN_b zC>X78!W_sE^BZ@nc`p(rp9R4|(Sog;$jmqZr?1DR)fuPn=!DZh5Vpn?OdRG?eyncx zV|68(Eh22sQF>3H^!t4%UFpw`P!mV!j{>3pG9UtJjUTJC@+Qo_u-*&3{QsSAp7xcZJ%Oo7tl_5neom-Sd_^Kjj6i3E}kPviv}n z=Ve*SQf^Bg%8KvE{WzsNFCZS<09gNS7P)d@bQq5QPLDj6@k^HSFW~!KzRs_N zPx1NJo%kXeVA$P2{~0TAv_A)az+Djn$t-1XWm_Ad614;NAWd3f?FA4!QDeQe%^+l=#(HY8QuT7BQ1X>R z$yW;HrmXXg2O5ZK>2k&Ni}X9jlC?FcIkz_of`=3b#(D%T-~W2`^dGoIno zTr%J4Rh^FYR<+gnRu8bJs<7^&)zfR+8nm4A@;BEF*I1tQH`Nype@PLPBn&_;Z_=~*+}l_ zCj&{6ViC4XSJQ|GX(FL?Xw>Q0&^nMkG%kd@#A-Zj6@(~RG{2_)H`=TusyDO_chNbv zb7Q6u;f$@2h{T}yAk(0aqWzI7rQh{xT{}&c((ih?uIcYn^Dvs&((>(H_THFP8U8j0 zH|h3oska2z>-JBmbD?OxSGWH?09>ovpP|l0G?lrf(hfWV%8vRXMwXpOI|C}W1CS7C zwrTdeX&%|N%+4h^qs2*f==K!qE5Yr$JuLv-rrXK9%V^!A+sRr@8PkqRgqF1{bTb?x zA2AU=R)Vd%FwU||c$ZH4kJ&7LN=&3b2FSw?4CxgGEPfMB`EL{2!D=CGn@Q^k*>mla9YXA#>`I|HE)<=314z;Dm<1a zX><9%dT2n_Oq@hDleGH!z&eT>VtG-ofc1Wb#a@v*eL7m}9segXPIuw)$iyPS8<)`l>B}zCsjO zAAR*Yo~Cm`DMMKqNTL!bG&zI^?W+J93l?9LSeZ*s`ZMJ`B4BX>D``j&fz{;Ctt^Bm z!hWm#v)KOD*6wI5^UW4^ZHIemN(~-HBCQ^gC2c?ilZcASV)pFoN!PILOH+@f#L?6m3LXUyZT5LAYGY+>G-?y!jmtKIUyzej$tgRfE)j zcp?9pahWsheh73doO_DP)R; zv=Kg+rG?Z@(a60UD3`=HK)|bUc0d#!Q@7qrGYBn&5%h{O$13Adj~9l21JpXGa>8EJ zkzckp5Dm&i0j}4zuc?&>y0WwYkM=<~<=S1mGf*78N(KlN_fKjS9!@$1K_^f~uxb)` zRYEm(qF0QzX?Cb{eNeH$xzhcq!A`8Z;S5!2CkqM#Dzh^m#L?!b1Pb3My`|1Rfv!%v zN>$m3(=wn6`?LV4+)k1&<$Ag;2xjcW7#q-7J1KYsMDa}QO#$F;-JVKUeuG#L#Dvc< zz*MZ}UR^|fm(9C$`w*iUtvfg#|GqF@LiRy>6PJC^!Fv1wjjL1=|4oiqRBjfI*S(FO z7U$xhK={wBVw zQ~Hx>bKwA|63?dmZcsYnvp-5zhpB2HdlXe{{Q#t*{i=U2ct{rwa9W)KQZ(6r{hM-gWCu$GEQ-L~$Rrq;?j={iFyRdBnm#oLL60BTUP7Pft7dE1y zOXb1>8ll<9#nz9#@&Um=5>>)mrV^c`a^apJOZ?VCa*)70QKIaB8KX9Uv(ehzBulFEfqVxUwmNJuIdBvcdjCQT|;4N|!vp-#$$$;s$><;sQfAEsQG@`IHNQ?F3D zpy8*9#-CE#g>u1Y^eY$sJyA^ravg%xa^y+}^q>%OrIK%sK(15{mr+fOM+grC{{+JH zR+vqRSFB`ES!Q9TofW5nLp__ASvDU*PEw`L;ZH(c@R-mmyepu`1$0_KI|Ss{PSDuf zEDc4Lc&T%ERdhT6ox^RUbLb~Rnp}y_;e5Bua<99h^f`;G-1my-9(JiV05>zz;U@dZB9zxttye3JG;s67ms`}aQ+ zBxx6d_HHg~N{}K0-KC@*a(OOeKd_*Afn#i7Jhp>89-B-l@$zlhS+Garqbhgc7`cjD zI?|&yCfBPZU4Ml3Z$(>$c1YK`fZS|*3XlbxfnT~#GGI$GO=U>ew@{x5sxhSNAo7iWQW5VslxELRTY-?NAJWI!M^Gylo0BM< zg2@@sG&{|x6p^&s+){3TIRGlNlVzh)A_eN)K0jDAT@YxUzm|)ppTh(|yK5CXAbJdF zH;Kyq{CHUsl?TnjI^Vb(oQ8h_;mhG^3B!i6qxqS|<&GuAQp|j-kTwSww^^!+ECa|2 zkBg#jBi2^pO9a=<&qY{G9$+(PhzzjFI)xkYo7}-mJCL)-)@@*cVN-9HoJJ}Eky_Jk$ZdJv00asXr!fZk z!-J6sxDdi#lE-TDA}DzP1jD!p5{!ykij5^sWNY?tX)TF~>GG+MU0#e;ifFCPx`#q^ za@lS0{oziK459P=c_>u^?8ZG5x)UWk-5m$655p)Sp{CJ@EsC3zX%!H;RNO>Tj!t*sLAC`? zm0^-k7Wv9Eg(BZVO%a}j&Q1|+vxP*Oo(|)vZI%c9ntj4?A*Bw7l-kI}I=7i;WeDiy zXigsk8TzTushi)OgLjku0j5DOpDgpqvbmOnZ>_3AFNcEH&s1kf2v*XTtY~kb4w$io zAhYc&f>i4?K$a+ae++y452!)2_NQ)|jgW{R2lfGEnMgwnd;CP|rf5TWZ=Ra~IByo8 zLM0rmTZiJilO&sT)Y5jIq!;v2v>WJ~Cv4#HE-DF>f^EdRu+d#f!8Y96*3k@7unn

    u4hsvBjw2ui5RyG;5 zO;a=m&PLj^!6qkw5iIwimU!@nkmW`YxgW$ih&B(B&VL|?GNHlB_!lN@NlxP3SSJIAC2+p7g<_#8bGzBDY!mhw2l$yAuFP!R%yM}7 zzvk1dlW{ur;b&!LVsFKMiY%Y}5sK^&NKa9$QJk;1Sn(Rg)rz+$-mCbKBF9%~?+L}{ z6gMk=QRa4wKM(cfR7v`Q#jgk2`tg29KKc~#=Rr=d4)vZ<{_~2zS3Y)6^m%47ANwjI zuOVVov7KVPU$;Q{MT(`0{T0tv9I40&ShQ>XyVI1OsYq7~<(DchQ(UQdo#GnB?<(G= zNZ$eo^VaE55F{O>w86)#~1AEIP;>N_s;CGvm@54ErEs$jS^_Mx?U~Tx^>NZwRvT&c6naX<_%b-R`h$` z;jdRahV3NPprZ|a+RNC`86O|8#D%n_n^+5dOtqGgolwGHQlTWdj=~8XHu3&Jn|8h0 zhe-GfZu|#SY<~4FP~I43=}LbIW@9&8TH|k$H_R~@S>q#ay;@%LZZS5o@me>s1j=p+ zyRR;Y5&F^HzV{(Ho8+IFrIgZZNy_>dWlNE~9Wj}mgj-JX2}HAe?O^8pIs|6X|V0^<8!J-Whk@s=>rgh!N+#!JV;+?5W~zq;0H0I~X8= zT2Vysh7jeHAFP# z38uzOvM)1%I~EK<`VTlgkF8{TSSwl_d;y2q)27u{)gAUqwof_uN?X*cje5(u)UPP_&O;b?pD=xmKuKqrd&t1rkJ zxs$79v09m<=}X}DYi#-2!&uItX%4#BLcXTffkk%xMUbVYte_-(|KItus-{L|k3JuF zT^hQ%;M`F5mNu~03$AN>(dV_UZQxuuHZRm19eGAVvLhmI>eeU0J6teWJ>E;1PE;ZF zf_F80@9U>}swVSW&b3AYvJ#~6_sTTF57|oL7aAFge%$u(dE?X`hD?jP%y zj%e-Oi8S-%ATrFxfnJ6-w1G0l`xUL;9vGWrl~hK(_<5mIQHjEU9?NC;8Dg-0?E?GD zhgMs^O-SP$tpP~51)1oRv4LeW;BflqGU?w#?oUJJS9_U@J^mU3i zDBh}gm*V#nH!40!M2GgQ;;)G~C%35lFG_D!dYjV!R$BZ!(EnKJ2pW<3n-Nj36O`_t z*j=$qag-vmH}JPed!k+$%IEQ6J>}mFP}&j5>zsUEYs8+4Ws1_C;7fY~M=8HTu~Jdm z6Y^T67b=QB6#Q$IzFzTm#k&>PD{fGHLh%{J-zZAE!XB@A*7vW9|4@8O@m9}g zS?hLkS*7^bBAY`+IUj}wuie+;UAO0{dqcxMz}!PwB|wS|yVy-f-sS&~FdA;KhQZHp zLx5v#37W>^dE&2cdo=|iS*_OFLxEl2_ErcyuJGrtZ~G$KHIguyIU=&)K+N6NmWl(h z(e-UdFlpAeg+VyQOX1c-pwlXF4!2{+V zJ}7ex&D=wiPL^4U4+-DSJuHAZ$EoB7!A*S<<(bKbQP62ukSu(Wq7kVdLf1WWJBUjV zQ#m!;%sjjaWV3HkDr?_90x~^=(vq!6x)Wrw;YmoIN^6gwc1#f&33>r*oF>XD2$Fr!tFjNg}xt=>U~k%(iNaiV1UrOmXNnXFJUvCSEd zxD)ZnPj3vYii_vX_yq`J(;GvOHkjVXRR#_+!Le1tsgTkfXl^_-nfZ>DCe8lC4?JS< zKN5Hh;ICX%&qSf{M-$2oe?dJHY;)+_rpJuO#o|7!G<AT zP>I;kX9wHzUjI{`?b3hgwJ{gU^HdNfMxPyFstirGsDGQVYS~3PkD@Q%Gq+(B_ zl~$-2q-DnZv3LBxvg_vRQ@dGM4gKelnORxndM%=-pN%*7x5?bf@6O{J{r^ni+x<7p z8`OT1*L)nMe-h5!^Rn8Vj#rXgH{b%~nr>fR->giv{G6B4MGIr@;340~|LksLb5b3S zvsTZ}nn_bGsG8dFb8}+$K--^nC0@+aEGa9)BFCo4gZgsCar?z`=%VN5f5V_pHwxN@ zN+dq_`IoV-=Gc4wdSLW{^|1W8JhnF2dwM@GtZmBHBKGEUpav@|0S&i=AKJBqpAmY; zgM+`7z8`M{(l!s3e+M1Di)e#QP65NFDSO4kGkPQC#`|--WI9e%%Z1y>FL!R7y`893 z6g(SjS+l?h?#B@9Kn8f+j}%0<3+*mPw0V$p(i4py(+pO&6zQNnexbqI<8@~3#rt#H z!XCdZVuQ7}28^J+YS?3aSif{cYwu2^nTOA`4A($uQ=C1@??(*kan0O0%%FiX#(013 zCg|l`C7?ZD;{CaGf&IlP;n!~y(m164v+YN)*A#zlH#FKyfpS?l24Z0MoEOl@P4VY` z)Z&;w*UV6rW|YmR@#j_|N4!7R+^u74>jt`O`6Kpe=3jP!{h&X$P-*r{UZc2L@fO8<6(3UMdC&Y$C_bmSS@C~0|FQxnG|Qbv#07tW(({yF zsPre7MV}@GhnAQ+!16QN`yJf1~)KBKt1d z`MculirW=;DSn{1UolbJJw>sF;&F;?6;D;9D~;uJSCsJp&>UkWpZ+wWoM*r(N}sQI zDE~AaZOm`aH@ewK^L=U}oohtvm!^-6wD?DXuPgm8Me%Zik3Vmshuhyl{nwxLo;>{5 z1>Iuq>)3bN3O-@2-u%2K`>$(wgT>>Fx$gzn>Rl7Lt^E4(j+`@^fH|Y#r^?6dP3tuV zEAftjzk1Bxj4n&}UH)MiR_a~4?}|NTkS*PJy8 z-Vj#m9lUhkvUj;cZ{NM)VeiWdz0PAlXM0Jt!tPZ-cLN%fgJSUk{%v_v-i=(uCJ!ZW zRwta=w}SHM8TZ%drT^Ibi0qQd;A2+kH<`m(^Pa1F=o-Cqm~4EF-uGxG z9G)rG!gM7k)F9n(jb1qs^AA{~H$SjOuSq9!@@S~QuF=c=bqiq5to|uv>djCwi}FUn zNUJ1S$V(L7>s`=w&wL)lN<_0@Z_z3we~j3S{i@rGB(KzT`8Zn%bM}V-B$ntElKnGC zEYT|@z40J16;;S0f5B3p`xH(ZB$f90!9dkn2-<<5kh!Hjl6@PJVFu?`5_>p zqEbbrYK0m^)LON*XsxwYEv?no+M>0swYH_cs`w}fYKVROzu&XpxpxylQK_##^SN`s zbIzPOGrK!GyL-;gtQCCO6?~rsoq!e0fQ$-qfaKuljXKp8&BVV>|=LD=EmtR)F zVkF8Cz0sGrf?N#23QlK1CtwA+ECW`nt9ao=39{1%Qu$^u!wF5YNbAnQY_;@R$(IL(*$rCTYXf>sS8 z=}RSC2}KE3qIR-cHJhYga4b?5it*p7MzUIM97$g)vAynq2OI`uvG;JzX5u_QO|Vdl zfA$e96X7%TGJz3M$Fc*KAdpxXAeM)z-fkWDt-bISTzkPi2=3iwfZ-x=%K)EaYyZAx z>-yekYyZA#=~cGg?<bD?K{}nK3_j=c3nff#k<>|!ogr&@>9I%o%9xbj75O=z(epwa}H!- zxDNUTx(0@C4&`5%wSbdj%|0K2j*&f8AkFtzV~DW7THqZ=FgQ8h!Z6KeaR$mQW$KI*?y_@Lx|CN!S_^4(gizZZX#=07PXK(r5X<~*BKW&p za~1sKm2dCpLY{tQmK!8~rD&R;$gdHfeo^YRiSXc`r~Jj@Um@D;oyfmY{9AN`_7Q8-O#{So=+iauYsOt@Tl zt&rCR>a+d{Tr1l8C1{Sf%zs$8LHJAIQ$kugDfg0avyj$G^4}Hi5Qcf&!FRriHlm$x zqKoLb@F?N2!a`w@kfv4YJ4I;y8}wMww6!wd49GwlTS;Faq_vgw3L!15q;C<@&`R2T zVZet)ZxGV#%6#kZK-bS-6QA~0=5qm7BCV}N>*qk)S4kfxq?wg;p^!#a($>F$u3w)n zKCP?F=ZdaG+E$6yuYs;VUn@QhtIW3-#ev@yyjW;A3!$wTFA}+NW}S zVNubZ&IzdHNroZAzX$bwDwq?1`2cOgm=Q4R?)6#GVVhI3quUonIa6TR<|w{hc)+2l zu^58Yu@{`ab zwESb2AVfXhJ9sr9cW`eX z#N3jZd1?w4Fn|DBj&d-!s{TQ^@uqpYdzvM6zo39*TKGl$~hAOD-d@e zM5Fhb;wX=I%5nVDdc;2hzvY|&C<%otcA67Vk#ZX{{5b)BI=vct!j;CyoB$5x@~VuZ z4g@drS7i2n6X`f&7Q1C)P5^hTKPP~rRwlcyKPO-v$Tm-*Vg8(e$3SKu!Q7HfNNP?% zS0oEaCg%ijkg!+#IXbj+0``{vS>V9;z`r(=scPIRBk<=t`RRE83#_~t zF<=KD1CrVUELO<zJtq}ZKdjdX%iJRR4%?_?_{E@Hh?~&Pk{P>c}K|MldJ#TTZ7}7E& znF}s&F&II8U7?S6 zX4J>?%;~!hX;%ix&`RhV>)&LNOypgIbWmRv^l|&BFB{S6TZ=UHu`Y%;V59$SD}Btr z8!;&NAU2Zw$_3^z(xymsp&QfEkmaC^_^d=~4d@M(+t!w=j;$*?Ey-E+TkpYZ(K$)?_N-D77`x5I0;A9MirecF_{ zABgBChH$~OSV!d;@mZL1{e=UCLxm%RY!Bro3)#U)pC?=>TrRv?xLSC-@IE1ZNi4rX z_)FnN;qQfi7j6?CjGe=BW@7~QB#m>LZ-x@hmX6L?EV&^>(8ERB`_L$7wnp&J5&vAt z(YiqWOGSU$_wIj7Jvg^$Bck5FO7Bae-x7_@v-Y#cay#re0@;^H$A!7VV}TH!k3w}sym-Ya}eXvZ0PpA}6% z9_#ri+w}XAGhYkjTid3cO?p4>Pvp0@P1DRo{+`;RX?vo)^$(!+3*bWWX?9}%)k0^3 zzFoAPkGM9t&(ygR-et6AP1XPPESn+*WyY|9)^g6p^N{=0ti#2GcV{$=1hal5hA z7WU~`u&1_KuDOrU!dAN{>m}D?`BUm)e4rnaJ&c|5VeaK3_>&}B0DPs}0 zUhc!q9#G>Eufp-0rtw^_8FS#Ck?^N)U*IzG2XO=gN!(KPU7{?=TIM0&VBv+8E zVD6P9UnDu=LL_fSOrJt>B*_hk{(8w{S@uw5`0FJbIl?FLlDd%>`6OOaH}VG{p=WQu zi+xg-y^WoDR8~8$y;q!i{Q&f3EbilTPwo)LDUcpmp9EwE$iVy5Y?j?zIE&>hqxY?s zY&*txSNJx;o!3h~;Q);>w<`w4k z?B1(z()5Pvn#nV!*VflmV-)Rv*5t|E3;S4d*6dj|-D@UJnqEEqD{C}NUNk2226OzB znyC}dozXC!hL-xgX*>_>8>Ya{f;4XAd7YU#v0)l0Ub4*Rk8$y7ESj7Zk2J*bT5V#{ z2oEub*94e{{SsuTS1_ z@ty@eumX6GKJl(~H8W}^*4G>zKLbVbYgD9r;rKq?C)G`yHF;XRu4eA^`suT0#e4QB z>e;)9_tUrzwy^VY#B_mU-WOuc@S0`=CysX+qTPe36RZQC7GSt! zG5B~SO@t@f!kLQ9{lUQ_LBa-AfwU__;eUfz$%KN-n*`dWnRPYBcur4r!6kWT9IQ77 z#)B=$WW9V&;dT(`Ai6S0hGrlm&V+)?n+ZCok1qTi@TiZE7*5|(q+J;#L(7ptITu{s zVlaaGasv8zt~q_zA??Z_8Cs2u=K>6uyasteeR1gH_OX50h)&;Hq*2>9w)IUzBZ{05ko7X$j~HxU*TD8Vn;YBP+Sa!Qh0GX4B?zpS z0f)1NZSIed`=jOfe@>1V*t`(uL+^>LZw>nC5xdYAU|G`DLt>w;ucO&exld{l6Sls@ zxZGmN$zEYtMD%2J;DvbUkINP+I~fOXKQ;w{8xmp3%3iKg#Q)N zkHq@3ggHW5A;|xl@K|BK@I+yWkY)8vg@2y)us5$n2d2{T&v~6wEQn$5D z9k@AdP}%0xvIn<%8N;A&SW|Rp7HY^w4Zp#=mQQ9@m7P&`;Fd^w_QuNf;S&m)!l(Rb ztC!B2%9_L5srhSIh4~$>RB_b{xN!K_j;M!IG34>(+%!a zm$~QP1}l8@smutc@SSbEewhgfTYo%hDl?)fzai%&{*}x#P8#0@#Os&-tCMMbzcKmx z z7roBA4dN*@=SNq0-$yz%%5f^qyB#tf&CLEpDWVtqCz*X{w2p&Le~HY#l=nu&9%0@I zt3do8V$5Ee>_^enAk%MP?uj;ZULDHd>!jXEl;zDt#ygPmikZoCJ=0dP7)Z4|HM49L z3nP&OHKXE!1Q|iGj0+Rw0Fsv^ z$nSt`GXSN^5&8Om_W$9}tKoji;4;~M(j2F4hJsmvNIR}CcUDr)lG~9JYQx*qNr+d1 z$}oLXC}*}%(`n>^FkXb(P>vnu!G!Eo%5vlV`i;DhvUURc`p&1!ZD9H`M*fI0Xz(u0 zr=Q~e(mgVt2CS(WXjMyVYGzAoYF3iO4#-4<+k0FCIy+ek8yk36)Gm8kj^aLSBCN2v zwypX*oSPl0ARLK^MI8Lqo_Tq~A`XP*K7U>#6E_;ag76*VW3^`{sJqqMqFKhOBrun+ zfL1mlkqCa>BdL~m6@g`!c>~M~USNf2vit&P5b7-Vbi!OjtZCs{`&NKR37sFp>z_>C zgy@A%BlyidKlz&KBrwmm{IU4Az~02>;MG{4;qMiWV^~I-z{4jMYX;@lbaHB-iy z&91GTQB%hP`5*o@ME}XqUy>15w@+x-Khev}kL2V)*Sa4OIX@2{ zN5lsZ^A3*G=SAA(Me5@PJqvo~N2cUOI-|stsgWb`f^g4;ww#8opYhdxG1&HYdELax z4gPD;trq5=(BbV%s#iFM+kpC`F9-u3i%$ety6)1kyyF=6IJaSti^DA* z=K{-j*IO$RZP+ts!{^{$*vY@p%?-9dj?n|MbBmXz7hfDJz9g;q($wN*DaDsXi!YB9 zUlA_85@SS3F9=Pfzcb{qY)UCsTB(`W{nWxxYMZoE)5965?V}yN{k#JroxB6RgS^g> zL&Ar9p}hL@XEscn1Z=4Dahgk^INUr_CN@kAsFS0L@mQ1%Ht3jLM|1(!Do zv`aJVdNk-T*Qh`qZ~cPxHXINN#i5h+#t>PAI0rGP?*TC5;JM)P_`n|2xALGp^D{gL zeO;Y0pwqXwmA-Y*R{$Q{mxbuscOBBM43gFez9Hm-OJ3t=Id({W(M8`Z*|<5e>Y-KZd02*^D~S>WyL7#f;%+#gAv?+F9h}KS3&#)5x^oU*P3$QHd>LIbu&ye&paLj1s zXYeoW$)&s#caz+AsfZtEE$?F}k3Px1LF_Lq6>>Zwf2^=tI9)hPNHZAamIyBsUN2lN zyj{3n_!Hr;gii~f6WTkb(EFtwDoJycZz;c z_^|LPq4jUbS^oyUApT3je+ah-w+sI(jIdvzob`KPwrK0;puZ-XR#VEkckHd7gSK^Q zfECKO{tlX!W6Dnxew1HlmE;Ebh1J3dLYk#n z{$e35(xks5q)D3ePlV43pA&8szAOBfkQa28vvEBwc|M>!7~h>Qyhov&J8wFP?jl^P z{f^7=?)+p}{pq9qWWA3sEZ9>&*;1aoxIHa2NUY61{Ok94J#Q-Ce-->=AFPV~cx$Nb z;_}PN)2}Ui{)&6yLtFFYR@~BV%?W33&53L;uWZVhQQ4F=wEgRm&?O(FpEamCEkS@g+N=uufU9j?dI08L?emZ^CtL2@&8_I4f+kaJu zEs;pZM${9oYKmq;i`TBiI|1Ib&hI_l<{tXS(pQC!J#!;k;62sUZBtIcQ%zkL-&CIS zdbdyo+QW7{^?K;6wC2q1OOOV>^VI9%vo7+}+n#zode+5Ad*3Q+&ivP11Cjskfac7m z(&o(Or(RDzYaqDT!ccUhxBBG+mTn1^y<8f(>7Id+jqe<=WJ_qkGo^olh6e|hH02B} zY0Byr+4#W$7i|fZ{u%t#vmS!nzYn;0OK9L*rCfX7d%bJOLrcH+bo!mwz7{J9Y-RZR zjcyCQ=FDxVfBW(Qk&RDEo7WfHe8OAW=A(Ho*s;If8dFf z;B`;_KwhdM_KDW;y-aqW#A*;jk)j6vN7H7Lk0udf(Og0_x|9u!Md>(9xg2Tu0B?hM z3Wt>F8t);boj>p!V0pbE1BagdgN*%!%pyA5D#4HOPQ>f88UL@5yqmdw>E+`zmRLH; z6DUlNdh8OC{l1S}-bmOo`CfktUrmx1ci%(!7|EOP=M_`94KgriAmo*>o(-g6DiZmg zpVKIWc;5yPKfU}U{d!i8w$YM+D)(Z~lurq{Bb!7Td$$#WCr(HK?IIeW&>9ZPai zg1nkz&gbM@OZvq)Rbf|i6Kp_~hs*{|c*uzB5F?=rp0mWaLC|$Zya5|#8BEx;lU6>p zo)CgBj8Kb+wNYvtmm;y!_*H~8h>_5|1&vHlsTZmuJYdNR0&fJsCGeV!by;c~nW*xK z35{nX!MjTc5mp)>Dw$xjz(?6c@LM&4;8%DWVLc+&2PgPtIA<&oVo1RUM_}&GE<9d6 z;I||A`p0oY{ics&1AV3Az)S>I8^(HkL}oMX0&D7qh)M|*@j_=1e4Uj9Ung(KEVweM za0;d`KFDT3utX|c?WA34m+w@#e5tWnSp^`lJ%kCCJe}YlMR*vwahD^eqRFXnF*1Dv zB8m`rk7r+!Wn!(*ceP_Hhq7kgKVcynf`23zdUhmvZaK9~Uuklc1RE$rb&DFA@Hf5^ znk=w0`7Nj*+=z(7$^KxcW2l1QmlGM-x&}H^=nf9eeL5BrOAC8EA zN$85`q?z`m69AC5g+a6kX}5%m2;d>9s2})lM*B@`C zg6jwMb0aj61NMje{YtW{!oxF)vvUVzhUaDHqD%=d(x0&(5W9V!A5h25U1N^|9Ye%} zlZ8T|11IO-{qoxG2g(I6)b4U#2EHpp$&Dbo`&WFDiM(Q@VLnZS)i#0Pqy2#YMnidX z>4K|k5*RMcJU-k#?-~`z8;5j@dJn);5A03*gU|iIBE&g}L4D_-P#ioLTpmpTL4ExW z-ZMYo6)2SBlmVT-#jW%W4d~-J=-PK(pbV0sRnXUK7yJ1do%`^8rJn1457Q0`tR;l6T#d5jMV9X}VZx>h&>=nl>ONC(?DC9u8iCCBzY zj)+5F3$V}teZ3t4WStD{5M5s;eJAAp$b^EEBL+4vRMv6N{D2MUr$;ztK&LOjvSg6I z&kvaN19Hr0?FVeNT)+H)7_AXF-s}xO;6UnWgEhj0BZM3e$e%1^2P1v1aEb6T;q}7R z!rO)Gg+CGU5tDkJ7CtBZoA6a3t#6cjUzmaYL%JOiuV5wzG%L3PkqZoUn6>r@O#3Cg-;1z5WXSYLWKTi(dG{XO}irXn?DeA zC(-6V0ezHc?3Nb(0gi#(FFC?aLVK_T{|M1X3)zV%f4q2lZQj0p23o`VHuNMBgX0{saC`ML!|@wea`CKM7wG zzA4-$wEhG={}D|KF58hVwE1eFyNHepj}p51RITSx4OYJOE0iB8daQ7qaFUQ_V%AHe zEb#&%r*Dv^-I(|dA;$;O*3W>qi@sC1UUyO~OwUG+NFBX;wPZ16mRtY&Zi1oDgQ`5pve!Z}@Kk!oVuMl1@TqRs9 zG`}_Ud`~nz3e>wn_zU4vLOMH`|D5mz;Y-4Q2x*+BT(dA07gy35!gj*_gk6MjVK-rc zkk);cFBJ|E4ih@R@E{>w6wL1~EEE!(WrOQP<%-uWotC$Nz7|p z7Ar0*EjwgO1mBscT<@K5iG4+avl?p$`tusoq7i&cVw=rtT*-6JHbwIq>1b>MgBOip zFrkDWQ{R%H_YHnb^BsoMY@B=>g%W2FV|4soR`pXHVH4r;R-&=!wJzSJyM|TTM~SsC+dGoA~pIfDo*pJAzNNb zUIrPw7+dN#2q9vlh#!wmULF;@jIsmiQ#xjz*65Nw^)2oDMSMT>SYYFKQX{ z6D0RdhWQyy_!f{^blUpDxVgb)nIcozw6XM_@@kgx97T-e#VpjOEB=mzh%Z+~In!)% zM!s!w7095cIm`5&PB~wfB|9J|)Mg(3>Jqw6qYRtn%NbcjxoqC9`1Q@84BuAqWsIz) z3>x{Rn2(s_+f#~>EkUOL=Qfd>XYyyP@NJ{)r#Xf+qnS5!rqZ@FU$3lSrs z^MZ2`7rMEK)C|ubf%=@Y4@nEu#Nzns^#Y%Ro1-M}f?e<^ZXqDY7b7ebQi=E6tigo=@1iy(BtZiQH% zgc6_3*h$mSq)_4u8aoMn2SWaFNwl21b~Pd<$H5)$e~-h;(aXsU_8MfiteKhMTi}NJ z=N_-Ceqc9qf%$R7Zioelg@{Fn{Sb>0U5F!*i|AyEkuF2ze&yD=Kp74{P6s!o3b7h- z0-_6)VVx{nfj9w?yV3=2`5MHvh}<#35NtnJ1`6A&0{d3r`(Mt~(^oq_v6m0txwi1e z!NnJkWK`uBbnlkmy~nZn=C?cUn4ZUUKQl7BA<`}$nLQ-Zx$5ll+)4kxPR{#W{BQvm zQ*X}2+tt*(oj=i$aCm*HX?366oyShOTW{PRf5l_`_&uM6_hoawVc5(<4Eobk&@ z^uzscpO3%oEAT0gFZ{f_QXG3e1-S4U5;yp_3dVAICxL>wH4&PYu@l#D0)fy)opWnE9h>fvyaap?6?d zh%=$!@@9Yz>Wg*SwZH8m$hk69(H=I6N10G?dAu(T>gxo3ab$A8@SJn)`v%gk43eQ| zppVa;F1RG^zCnFO2kzS6b~EHyhIe8N-$$X}w%UKpzY8%aw-}9@!vYG-WBid&?9g_| z6*~gR?O^x;Vz7P1XkQL^+}@zS?H8bN=y_Ny6ymY9wMKM){Tg^KxOyG!Fv#B<{x-HH8Qk9UIiJP1Jh0gT|1kGZ zGVIB>Ja|00Pk3!;?Qd)ODG#~ZaBy+TeJ;MX^H?wXjXh=pmy0$Z3h33M&1V9d+eG;v z3pWUVDcmSDUkT(mCQ|;NL=1M@gzpp4;r^}sH0&_aSwzSmD73jq;PX{S@_R~-FV>SD zC>$<6U!o=7d?6?|Q~U)&uKvY(ZWJ~WA%BPH?}~mv^iM=TF8bG^ZB7#W^qWL)R{lRl zn~wwa{FgN3VmJX=PkSQxHunznVWQ2)0XZ`Yf^T#0fCH6pz76D$lAdwmn@2 zuh4wM(3{QU3EWR;{S-7!nB?~m(uPUe`X`V^Owy+bX~iUM{S(;QH%DtD^H&OKF(mDL za?S_$p!hUfGXE(d&6A|x5z-V%+Rgc-$&qwFA+3$1-P}0dpO9`4eqCt&2Yef^a2J1p0lz{3Lfl6Nh%bYhI$ZM%$*Azja4QG4c~li?8N6Ez^u7rH~w@hF8o;g zF^n}JHCj?@|b;g1>Aoc{j6=JaeGzj7(- z&fAE3Q(5m%%X{sJRrlHv9olP0>YKfGgcp3hczH2bv*c=%cduW!KD*ib&sD|Q+uCMx z9m|26vj>)KPAlWOlxRUUTaXG}Y{8#ewBU)2uKpqLaUPi;$hVp^{n z=^QiWp~2<^in6ye*cgv#a6}$n%yx^D??N02I9muDb|ayM3v3O*YU7V1&>#)|yhbK? zT0x$`#}xbWI1_(0{usiWK7U>#6HUgiAn+9$Om|z@$OPNc%E`mShj~AC6p_nWX(JlJ zON2O5aM!RI4Std%y5FKoR<_;e;y)31kAnF+1Pc2fEN5zqpFv<-{0tBlxcB0Sm}^Ji zg~K{13s)cm~2oOM~7JDrx#E?b>cJV^N7#;=>-4_ar~>?{6M*dfpYT$<@j7- z;U4_okBHB;`wV}Bz5^l)Rjt&rmbtccD1{+NpstnzU|4XqAUCnDV{YQ0Z-5MUN#G0b zRQC`f3M7`%%xxrx!Vn~=zJLIj7MSB}94n3qa|c0VVl~HP6SgC#$#U`4_r&&*!?|Pl z7W^)n-37Vq#q3osu#dUG-Mkv{+lbtEcOi1STwvZB#9-ciE>n5DM|l8|TmCR2H`@i~ zQFk!!7cLX%w#oIWK$e{gj?TwMg!fGz`yWmoOWZVmn(sQ{>+kKo$Si)=sW8$Hj-{KN zlgW2A`TzYQbNZ2gR$e57Q_Lb~O^qDO55$*8zO|@dBz;NCLh;C)xZ@egsX$U&E8ShZjUmx0{*^YJZ2cQf&eD>SN=AA9Y`PvRj9oM1_()y~UA z+7vfyvNnqhd|t{tdbK0#CVw8EqQcdsrO&FX8<>H-o|I#k%m)k;-CA}c@navM#yLsRIFn5UD<(?0YF+~4~qUHC&DeL6ADb4$IhC;;PJ%hWG zCpKlAe(%+JSJg09d z(yk13Y=^#YGoj$}7K0AztAf5Q;IVx?-<-bdkalH|46R0^kK4t5z6NR&!Jl8yPfq9H~3!U7z+w9t3^`PVc7P_FaevSaLUWWS-gYBz8`*Ofz z``RPA_VF1Qhp84|p$huo(ntiiFWP|7}w~ph@rKSqSyZ^ZwT@FnHHu6*+qpdPb2qFxUtA-6Y^2)Z2+dThBZ@N>oI zYu=RO7)QB2lIt(N`L2*ZTKU+WEqnzWJGmb@wh-gOT;Z|8d|{E$`VZtwMGq2I2uBI6 zKS9p{TWC@H0f!=*7L|N7XLCK zjnb6AT}WFr>BodLMw5O{xLNqN@Lk~!A#K!@KR`$$HR)r7G)a>lEIeH}PH5wJTJrou zw=;QO$yg4zFNUqpQ(kwN9~ZjwwX5iE!UAETuvl0o94s6vY<>Pt5PyoW_4!*XeuHqa zaH(*aaJjJc`MXyA#I~pHE`4)*wytH5UIlRrAMKkPoP);TcAEQy?|XN`R~-5Mw@dHo zQXakbuq}%s;cGf<`EO+S=9OV@MdX^4Yo~1Nd#|_ZFHKpSuoh)%c-8O$z?A)8PYI2| zT9sp(a{BcvDJtn(azY8$a~ud>3i1Ymp9=XD$iDV;WR-VgXYZgg@0#$92bG1diP|cb zg&Vya!Z)Ve6fKDMg*Pzk=B@GUpKgt(blEg~^ULQ)o3r0fZ}yr7Z%&KlHmAH#gfH#= z;hSG;c;JnHELw_{Cp$j!a%sPE?}PzO(cz)3(NN~b3V7r~d4Jtl)||CH$=~*Lnyri( z!OEDAZuD-%%9^q8jo&N>W>sO;O{_E7uc|3)K~+<1Xy{t_{NC$SUf%3&s~;FCN1gAa zHGA(yKo4m4ng=#}ACxwGTVl`=-8g*n+jB435-NYM^v8jfE!Pelij_8pHf2>uHomA; zF+<<_Hde2EL#tQPgP8StRwxTC_{r0={z0D^eh5*o1Nw!>L7W$!)*;M0;E4O4-774H z+v8Bg`2>XPkO4+N3zO50oYO9+WGv+h60tOnGfAJ| zV2a%ffvE2joWWe*C&+;(>VMjfb5Eo8X*+XXMvE3vWi*ZNgTNWt& znIh%CNQYOMPcWqcjPM%o8L;FZw4v)ip2tg45YOYCXX4>218yJeFWYpmgG#>taS-;4#_(b z zZZGMj^r@SR3#lj;RK3 zlH=DQaSb9?O)MkYfeBUo8p-Dnp@!A`$4?S?+k*u)Ya5y1`(Gd?@Yp9pC#2vMB(Mq4 zJlHj*4brJ|Lx*2omfEGbOQKPkWRr(1TZxa&Yl9D!f$d}i4IRve{t7Wst`_CUV6)rc zk=d0i?9xcqi>+nJczI`8x2bHh+g5AxyhM}TR%eIiVUMMDVNJ1kmliu98=B!DByhvA z03(6Qp*XNVN3jmO%>x@r3tjNliazykaf+QCl3CUijvx4C7JHFiJ2R=d; zTlN@2Ibtf_!JLDoCYko@7~`a=Y$zgJqJ&CBuJcG~rlhsT;UQ=H`bNb}`ve}c*omn%hp+0}o#QK^U z(`VJx+n3lT{!hGgllxXrshL|nW#ZhL?$f8#bT7;+%wXVrA)_nE4v&zd~r+$lBHGbc`-hIWSbhBDan>t>EOFWY#0)C+bU z90#&yPHdQ#H;spBr^#u!=V0(!ci}^DjGJ7{5JfDsK;dF?h95BbNN@!|8VLM z`#*;N#wh37lD91CxAwSW3JMPHaabh1-yvMLGBd9rGLI0c!|IgzBRUuKIBe*Nk+X(G zy5vQs48fh0=Ox{VXnxBjDOi4jRf^L>FA%Brsf>c`u+r-CUyr zdE<}{)>{FmNG;@8FY99w;vB@Fz8DI{!E?do%>*N;?@<^Ba=@d$3`D1IDblVClA*3B zL^&5+-eNF<`ZfmiWg*Y$yAEkr2FXwn3UPrF7hE16OoIA0K_9n|?c?pU)3+9BmMK7F zSb`_P_gd*={@sW{xp`2+edPl47->!+y6`6C_{iV_>t(nfG1$J>0^8djd9Ho54&cz& z0xT54e%IR(Kv!2gq+MTT_H4+}4)21KBL+4v6vG1qAM(*15g*OOS3vUrxKS4eBh`vwwnDCdvjlySzF9+dEA3F~U3{?>$)FeAK{!qE8l93dab~6iyVLEu1AhS9reg zLgB^2<-!$0ny^{_t-`y6_XugzX8sexjY8)eq>-EX{}4Lg;5(w5h5r%K@J)HQW@IPP zZq3MC(Orf4!sCQ)&B#Hb-I|e=qMa{sl4zRJS>L(B1;WL`xw7JNtgQHJ ztgMLD6~jYg@Zn`Od;f}UON(V~OUoMHysT;X=B#e;?d>?UdHKJ%y5jQU!JE^k`ztA) zyg4h2D=7};N{amlX(h$qVRqe>*>z>LHovcYqt`cL>nPqZz@J~277b$!MVnuD(cA%Z z*Rw@k(V~^*=dnd-Nd&F(hN4AXxUS>i=G3O~&6n*cEE&Ez*0o0o)@__}C|Z^tE!!N6 zdfOLyhn3noj-9!V<6m0Tp0?5I?%bo~h5@Lxa}#IvT@-p`D*L?cs;KvSpvS3sHHa&W znfz-xua7>lmh<|4j==^#Jf73=;l073=M0n%J0BkXRbjh=IUgQht%2i?Z&ku^$H6A) zxU-??dlc{;cN}swnU8NiM102`2Z)F{?%=H(Ny3ZK4+n2u1|b@K*y@Ph4l1P!{;;Cs zDzwUdckUvvJi6vEDB3^B*dt{2dk?%gB5(9D3y-CKMlyxD{h9lBk{sK-lO95{0t(Wf z!Jk(`@^X@EnLFS%klm2N*W%pAuK0P}AG>?yNy7ZP#yjCBu%XAa_0=_K*K7476 zu*8y;gr$i11fORM0Q$|WB(N1&{*eI0uae+52GYsKB)lY)TxilG39AwP*?>&_%g-Qi z8(K~i%mUYM=s3bOlO02tfe25i*T_~=t7h~u$(F+zMqmx8nCCbWel@23?HEUR6%kua z@b^4cpX5fdB~r#DHx9}O+>1^ba~NC;Q{mpE>x|9xEA?GzOy7j)@|j+PmW zRry7M{6$WGFC_XS20oiem3fF+fn_gq8_A(C1PL>C5&*+OU;Gb1L@)ChemSziBB*R) zxy!|#4P z&oOr~&;)npgS!hgT_BI~7Qr7gnPM++;UFXqK|BVL`>`h?ccKf-I~*~X$1QV#c}F60 zx0WLgK^%tY0`sVwJZ`WHJcrow%MrP$!4PbpJ=yMCAM=0WBMo{aKi&G6CwY-}d0&gn zj~C`fGNwl6hL7~%mgLvz4&+3|Ns+96JuD-3m-wBkhW9?==y0Tkt1$7^x}=NnlY8U1 zMW*m`aWH;$oqfr9fVN|Oe`mr?XHK-eH#2dM7r}JX6F=Evm;uja@6eZIl3^Bx%;371 zxq%^+Bj|waF2zgJiZ4zrz9gmi(rEFrNbzNyU|7Q8{WJFQ?OP8sd2rmt_b9Mph5lT^S@p*P#&S z^0?rVv^@v)J&Rj0ZXfk!BRYLIBh4}ehz#fB!JPI-7nsL*m(a1zd#y?o`=Q4YtYx*5kS_-&<+uDiEt?FWq(Le zNjb^~HZSx5-lyFYAKz;o_pOKNADQG%{W$Ak@|w`v$Jc5-Oy9+agUhjIZ_X{Opg#DS z#tN&2(}lBy|0i4`yi9n#aJA6KG@f!U;t=siiGP~t$)d4)TiES6j&eV9oFT@Axx!&j8 zMfj$0i|~En2SUCZ&32~>+X}5;f`5=`&WoVj5yGQ|99PLN6q>&pbctwMn3+FH==_c2 zMNb#b6gCLWZ;f&^NwfTwLhHYvzbSf+(E2m@cZ>eM(E2m@kBWX=X#E=eKZ^dd@I~RP z!ncH5h0Q{mu-Ps*=g|5&=#K1{z)nKi&`DcA2lf+PEF3DV5Yn?i`3b_A!a2eVgwFp+ zqdetr6w-Q6`ZnQrh3kb63Lh5Iick4xgwG5ADx_JT`MdKw($3HP_QHdNhX`r!XMRs1 z4gRDD3dai15IX3;^zd*QHxKy}8xKent&I4;d?#DWbZ_m5uP8vV;xSsq3 zUGf`rMZ5Ns9^a!Eau_~(Ze=%I7Z6(bNw@r9JUpbwVa3s$R1b3@G2<|LUitoSMb6&u zt;mouZ-vhu{Z@F${%?8n_j}7beau_Y`J>;8p5E*2va{#D{qotp-yS&sytiMO@0}Dy zi84q>Az20~H@7kheSd^^GP`5E?69)KwfgCnH@*4aM?CNC$LD(|yol7hPjC6j)!Zl6 zL>jemU-~@$dRWr9iNCOyYUiyNyNgA_DRn&C!fC%F6-~Jq6uwx8bcx;8MALpsB9>wk z?qg|(B46&ua5ODO=>`1jZU;Y_HULD}i`k_z7PS#98okX_M6X0%$~62%Z}o0OgHog4 z#($dE3oNfcWc;PViC&C@p?A`KNXHRlT}T#_oJ{gfk|iWBB*`nZH()-Jjfm+FGPjK6 zqa-8DJ(+d!4kw*|K3Pn1zeMf?k_RQo#Uu})@DP?=L-OVX`6x-=Ir+KIk~}Iw@>LUL z?b4N(8_LY=pBcdeM`Ztm6An8?{1|qU_%KIS22R6{M-?VEF}EgO6JZ* zq!%m@8jNKNRkCbLrxxWn!qLgp^N2{A7)n$=wOTkF|NRk>e=1S=9Mmk(PcQ%x`NN3H z=U`_cS?9U6%wxrnJ;l%U{TSkLD=i#}fALNh%X}H)4RO3KNbs0*pSrNzC4@oR-lPg$ zi_W|6yIudA?{?|(^l8>t+z|32+3{QR8G4?QpMPwmHZRgHZiyvWv$=Ru?lE{2^1QFE zwf>X%PZE26`m6yxLR>^|KnTg>_*aO(lAfW@dhtip+%xoPT@Boll2C0~eS`bzR$!tL zHmgS{;l_ZIgB!|CE-Cb>2g(sk7_iC6%Yf2hN;SGi3@^J*=pkJsHz2XV=vq z9WTu5lXqOaXF-p`9zA;WiFd85nNfp@mq*9XK#}|!73p3$zEAf_brWYzo))jGnLE9H z`s`Wpo;`|s_AY|KHVY$P(8mxDjEEc!OR_r_FHI@FI9hy3r1(->zVI`iL*)0>FZ=3+ zFg4@a>|edPiwpS|2>z8R6gmt%%Hi?ILTfqZF&u@6yQ7bk>js(D^#-qU?pnyJvD1yD z-7NB1-vyWCRUPJ`L@3U|T7Jmnl^c&$37hgTq+J;bbB&FQnNVd( ztC1J1_ca)!b0EulxgWS4#My|h43eQgAS2F%g3CJxbWmRtZYr@UrY{5N^esW!l|eG} z9x^EBg3IHbU{D|DwK#n|$DF>ENV_uBk&2!6n*hTlS0FE_uM_lf`?$ThTTbX(gEY$& zATm6QdqUbCTwosKokAx!AIj%AA>~o-0i|8mn~)3kL2d`beTc#K#nC>uy+Pl?V~|5% zu4Ng9ICgGtKWYE0lL3b_(U(b&g&f~4b-~FI1DhA({H8teEp$QS4s*(YPG5j!$sm7k z%pbxdc_6sG=d(VGwF`MHcwGEIDjD{~w*c3n?JJHMN#8=^{vo#^lsm%YsPN}P+GW_j=Y%xOkbYBW=WUulUXaf~bp6BChoL?cZo9Ls(f`8IN81{E z_2|z ztgV*(p3zyj@c7rBDE1h}MVj<@a?|J<46rLcL|HGk61kC=kQX_60RCZOT*-`Z8vP&< zTNmu4Gnf%g;e3M#Eq#%anZ`-`0SH(d&tr*LS}`DLZREVY$T+g%yqrcjCnMU8XI$ha zCc97ab<6^Rc3ee>MeSY7Xmpt=j@|=i$`YhguJd?~rO?TfvP!cZo&_h(PMH@|yxXXl zKBw61+8&|siz#Fv-P5Jh`4yz_%f=67cy~ZlpE+{IA20JQl<|7MiT^la<~EW=Bsmad zKF=b3NUkGEND<&`pbKFJFbBsZ`P zPxFHi8N87nfR&wtznhuhf#q&T@5Xt+0h%WbZckXK5Rqe^H>wcTTcLj-*9tWw(cTGI zL3*U%UuHpGpk^R?ldMpjrCHN3B-*=7D@6M-!(O+Re)wW%n(<&Z){NblR)b5OrDCtP zoF&nQiat zE_GQr690b5)5NjY!gnS1A(a&*v?Q9BY*IooS*@Bx(yuT|oM$XA~(v%yS7Kck>~L+)>=j zUC%{;_sF5Wg~I*bp}J;3YlGd^33|__2aPy*`6%` z#`0P&%x=Iqa}XysJ|l$B`OLvbed5t@WOe2eEbsMtLtX)hZ)E0yc&h;mfJLsg^vezQ z8KJpLA|0m=19xfW5J)sNp?)@48BKZ^Dl+5JPW5{&{p1+=cWP&_yJ#-Z~nj*gFd#;X6_#xUR@cELX06sNFeYo zBN&`qH!zvTU9JVn1ux+4@;?B4SB8RjA)e#kA&^Yu^+#If7URco(_0KV+HyI{Qy<$k z3^Azh05p`g2Nzs&0vImMye?3{2Rs*C9&ZtY^$vzHZ-we*eXicwNV_uBaVIuB&V+)? zYi%=s?trAtm-n(x-x8!<8LD^^`hw?*%Ug)NVEbN!KHfNSzwlgh`c@+C${-oq27QZn zvArvh7u46OlfPf7FB{S6TZ1(9xtp|l6yiD{E-;U=waxqlG-^+5=66A^pHl{8y$tsu z2HO`$`*Ofz``RPA_C1C)4t*`a!fVji+YvywFIwBo4~4B{Pi*G*pHuEBu$MGL1 z94h34D*1fqBu*BxbCEtz$a9hOa^cm&)xz6_?8B7%v2cU%m%@!g_Cw13UARqXwo>q& zt-B{W4{eNG#F=O|Z*;_B(vaKJ_w4QcWyrht?H8#0B}C}ELNtAvq;C|xPBaZxtnXgY z4~X6%+P$y*Thf_$pH+MsfT+)GsNlaVI)w4WY^TBwM96g!9wz<~LK?J~-$(R`LeASF ze}r(1_@@i^)_eH9czn43g{8tlLSCDgUnw-BCFt>@X?9>fAE$}u3oj5Z6)qE6|AO2% zM6VNmTlhWUy}}K`UkINPJ}ulNd|CL0@Sno>gv~-)4B5^!VYZNVDDs_6|1i;Ah24b5 z3;PIZhGe;+!cju=(SU!J=yQZLOj3TKkd{f(*9d8iBz>!pMoH2?68=>9n6R~N-})uw z-%vj7lPvGvn|JTa+v+;t$JL*5g|shIzPFI3O460WiNYG888wj4>oVnRJWJcXFM;i{KUhFeKBSad<}hy3gZ?&+SjlS^&qtNH4MM_o@M3U zwX0%F%daUvusnRNz2zLmcTvI_TXQ0pl}A>L!WU2~o3b7ng|DGhHsvhnh-I>-n zR+rsSc4L`m-;c@M_?@lMjOwQ7vG{&V=L?(HzT=%Rq$!&J?$asuwU>W#pIg)Amv{sR zn;o4yEg0aJxSz6K>|%C@aLSdW!fAJbitvnyoK%5-I3sRGM#SD|E}3MUG#fBuDK-xx zmUaU2lgs4ggd)y}aV~U=QKd+P}e?xM1g5>;`Hm_2V<$Bdw4T(G+)NEc*^AH)lDxR)w-$s&~ z+V({xdLog-%yvBD<)CoW!9wMTLlC{wIETv$alcxj8Ax<+0#=Y4u7VuuIm~;fU*rm2 z;|ku&f=<8+@&i07I0lK+S@4X9T)`(@LC$CC-~_DTRx8+%O}!lPIu@L6&5YtE)SAgf z^E$XpD^vy!!dI0q;qBBz@IYyurK%5li?GduUj|<|9;83 zTB6?;j;R)SlzbNN#4Pm3zt0*cj=hWjAxc=Hb?XKsw2X0DlGP{bBCFLlko2ohY}PQa z<{}0<2U#|_Bo`bb=@+a($^xtQS>wbBk=1G!k@Te!d+l%hASG2p|qI})(`=W|QgQT9{*`O*tSe?;!QU|?@>;hSMrdl>)s zxqZH>ZXfsAm%Zio>1TeQIR3v+XU{*|(Al%HZU~9ZM%+-BhxBWf{-&k>Vd)z!{i>xe zufwE>yvXb&kA7JiIp#5Z8sAXxDj)UL*`0vX zP1bXW+gziNc6q#OfO#(w9)Q8)3CQga4$L13p8)ThTp0>Ki4E!)V7TOjR&swsgE+_E z1t(VxMzG$+a0b*uj`h+u!|fo>Ms#J64D|vt&V+)?I|p=7-Uojl)z6uy6zP^>zf1buzR=3>@~*Zz1=4%klr595JwYp(%L6+!No>O7zpicA+o8 zvZSkr#6I6p(l@jY`=h0AsP)%aG)_Y<74g&fhWfHR`e%vI9{E7?DV6*xVU2KxuwHnf z@DkzGLOv+5{H?;fg!c*`6h0z+TKIu59i4;a`SvYs!5q(sorpLY4pF|@-a&U4-COzn zM3;*`Mf7OVr;DB*A8pXY{e*F0 zuJBl4zOaQ)73E6AA1E9qtQ4LmJX2`r3(A>q71$uYoj0H_6m8A~(01McZxEkWakiK4 z1tKlsM7k%4cD?|g5&gXIuR_|!DaUCRL|&+fQ6X*Mqz@3%JWu*-LOX9j(-u!YjpIaH z(+p^C2H=_E(<;tx49hlXm9`P2r?z{U*}*P5iB}^?5-HIP>2X z((X+&LyPGtv{b-`SoHu!ok8VBH%jQGR=cUr^b`Z<$;edgM>+TUJ-p z!w?qo7J{(@2@XcVU_z13Y*)lfh|F6%R0x5d>fHoJEaE z#UsE@1Yfaz_@0-0*y9QP5$(ew2{|Nu(UAndh1D*X51xK*6@kry(}loW3w$tTQ6m#< z8u)}F#FWqiPOxE;^}$_47?aFF$^vzAb1|=G0nzSLFvrF+@yC4b=P>p$(a%3GkQ|DUsd0RJ|MBTTpN+Bya;BhWN}8z!x{8QY&e%5 ziR`J><++p0E0OqG#8-F9O3*!#^h|vAi!U`4VHS$B()&({PwG@)KiTDcmYvsE+Qs+c z$B!?m9E3HgcD;tv&R>g2xG8!E7G_FRk1Yzd@I(}0ZcydGk$bqB)0bje%1(X=UejFQ zC_Ny%Q}NQ&;)_#?FNqdk8Yy1pFXQw%_#M9dUx|QO78mC)hTkD^pM&vxIT2e7aL z|9|oChK+W~6G8EL$AxdhVEh0wdC!7J$b`N5RHR)Q%Fe{?!YfQDxIDfG?9$At#4~6= z|JK4JUEUd>g7r@5fIADwvECRWw}Utf(Un0mbR`-UXF|c{oeesu@1FgVcJrX$;X=r{ zGF0(h=s2*|cE5CfYRs><0jzr!;0(?d;z|L61tSe6X(_lDnr z$0`}z-t#%1#X3&dZ2vV+tCB}18TMoyr;ZTkKH>GCrQe~|7b56(z=2JL+{f`b97Fjw zexD%n$$>afI8-=7I8HcO$c{z%^Mnh9W{U;?YSF8Ow+rtR{#dv{_)FnN;qQh25SlF& zdJn};VZF8n6VBmdNCWeTI57&9-(Pg8=u<_T?G)v!MNd?|z2}eewBb-cEgIB!5fS>$ z*8sdu{6?Y8M*-j2PQNcc$7cEpenN!4$Ho7(=s$?Y=9zx>P}ajSi-^<9FfPm$9xKcj z_7e6LmI|GXeVFJ<;c3D%g;RxR3!QD9<0{*+RJcsY@sWIIYq#SIdX4yYoI&3ydcE*| z;UmJI37--ELHHNp--WLU-xU5^=yCs{o|rI8NGlcj)=z+~`$-SwA1}0i0=WUAPZnB# z0l(`1vG*m=aTM3uRo$(b)=0KxS>A0JOWwe?EO|E=tlgF^S+YhpOB@DS8d(amB&3nC z9SnxBCxkUX!Wt5m1VX?-AdrMTD-gCM1V|tW351ZuJVN3J1pe=zm=jNzw^`-*X2HSYVyr7X9SDb#kb$kCR@xUa?K+!t#1h|rGpln!~7ydtS7r-_LG1k<>`IN4zSu2Nw z9sHHz%jD(c9Iu@4T$13MVoOBmN}!!ZIwV6hzRqGDvV?sOkxOm{Ff6&eELTgi;5A7* zLb|=+C)W_3zv$XaWEt)waRc~Y{c!sje405g@36eX)%SoxBmD2XFTn3c)AL%3BHI*A{K_U@(cW>*Y>VIOPJLj4 z({~lAvbj0Fv9={v-?T2Zwm|IuYYP2s$@Z?{)&f$;j_Ngz|G5iG-f@}!Qi%Gphl8<{O zE45;CpyjKe-flC6_P_7Fwe3?VboVAaj)TboQQ8iJ zk$|=aQtcdQ+X^Cl=Df5mnH=ceJd_06k9ti8AxyrS<1mgMC(x%aWs=~XhMRPl_o^$C zjyPVkaC6AAf)AjmHn;D-T*&+j_;y*Tiy_d+-y z^DfWJIZ2S;8Q{lqGJo*;{BDJxaVQI3uRtNr^ppu<;&|U#AU44yWI^liqajbM12 zacK(}KF7Ff-jDEQCVaJVziQmC8TW4EK4M(zF!{V<+&7K;54tdV?-}<)x=_3v2#oZ+ zh-a+_=c}v_hBN1_|7zZQ2Kgc$`{=ZJEsq04c2M?%s-xM21UJF;Y zpambQ0O=1*VmU;_Ye|oQ0GCyGTUuX2 zVhnX-}Z$dYa&B6=e+oF(4}Fnj^LGAA(&kzKyc zC0zCYec`l`e>c~Ga(<;~cC3Ow)Ijj3AJC}?=XIcRPM!-)t~?DW8I#NmFQ&;$o(pW` z%jB_vIDcMU$9Z+0WY;E-m&^e#_9)gaAt}}TwTyK(AoeB6nwoZ_}W#@f!7A`Ez^tq=?$m9!E`Q=Ec@VwKdup$>#p{B=}RPc%AmH8{cq-e3=L3U$PscZN+ zpLxzKML0f35h{6e#PLzqK}d|Ep|@zJL)GFza?Nb<{)L()0Uhc>IswPJPy+>54j!Ij zlN~S5RaQZR)bpdzu@zflEuSA@<)xvidTspZ#_C1?yYym~UOuKT-46HZ-~YDcJ25-# z>zz+sSXx#VA55t45_?}H{@AmHd_Y9=yL;QQ7?$e#|7)vZ0R~+h=(YC^B;xH`7h$ao zBaOiwgUQ5J)e2B@z|gWe&WI1T4UYAaUYQqPKmA(CbvG#ZrHzkK;B!pjPApr{D!DbQr$-FR2c@>c>S! z^}p^Q*Vf9`4Y7D#WqrejmRix(*4xp8wVKlTnP1KJHEVuA@!R)X@5QR)e%yt(Xty6G z9@|h|T^oy~1VCvhA$TjIsW?H#skh(!g}{_($wSvbHQHn~8~T3v6!oo*@s{mXL!F%o zZ;6!gy3uUnre0GkuYTdFjw64G^=Krpp{`=QX z*FtqT_2ICW7p67-IF(^DknZSV=uXL?J04+=2fV(2C;V7$@UK?$o)^c$?3x*e zy8m_DOxL?Q;8~{!+6v_1ZbT@^Zxi@E4?9r4>RZv0)t*g zFqcR7D8j*X7hy54A26oNcI&143;4Y_@QTj?v5X#bdAMg04)Xgd_{|24{DNzzZy@Z& zfmb{Vex&m*5BCQEg8Uu_zY4&}uK>4~zxUzy;=n831mYS_bxE{bbWw?2r2jHC<{D>cuL3ad%cA|=*AEeiDGUYTpVD?xXJhXmg9(haDkcnQLI1;ELGW7SEe zOL;SI0Wpa0U_tD1z`V=j=Y>5t2>*Ai?dqj5kGm&59p>6@Iv&I6z-7Z)q~k+MPAM*) zHSzd`Gw9Xe+vjMf)fnZ2b%nrXr}cour>AZQR*4yH|Fz*Fl|RZ~U(|%uWh>1HhG9Gc zmyOj|r#$9RL2IIzzd#rKe z#_cgK+dTQQ|Db!OaX)9=i;T;?CE{-~?p?;c-?$GO_XozMJth5bjQdyPeqh{OR1)#( zKjLuJ`)hEE4V-p@_~pi3ZQNGl#_6JYq`jAh3O>=`KWkj|-Xhdqy^jX>CIeURD}w%8 zCj4XL{){e+h5ElO+}|1a8+1`A+-s!!o`G{FYk^OMF5pw?BHv}kJ<_-+w#qN{@}sQl z&m|r5TV`C^NQMtLZX;c!x8At4$qa8YE-itD=8CMT^k9xv{3u6;ZISaXuX95Jd6!H8v7q<#d7r_B9?rl{*ii3jBQy31UYnq_?jz1~k~$ zxEGa!eT^@Y<26Xz>}&8m4YRNDW3u-4H6)Y*`x-X_o%0ZL?)+802sd;hQWK#S;I@0W zBf>W!=)5Bz05E3;h%M)RX(4l=$<(UQRM4GfiEt~)EbBFrvH3Vo#5$B@0N{BxT*a;* zFsHy82`A?#jN=qr$CB=sitbcAK^J-!S>3(c72(@ioI|Z8q~8Q4(y6gdBmEf^Z|Hom zco2i!-;vcCi&D#}0Y*COt(!^KrN|->+HNVr;{bAwvCb#i)rc>hxb-B-sPQ87ZFoU7 zf@yYGeA_Z-1xhKM)2(+&wGapqDkD{h-;P4LJ4k!B^#WjS1@aei&bQ-8Gnbo4&IR^` zh=HA<-1nHl3r$ew(tlJXdnl=MlL;2)eu12CHo-AaE9)5$gx{xZzGfFA zp~wkfkhc&InX`j?cKLULBInaA1#&K&RY))AADl3 z7Zqr|z#i%8@75Ro{Z6C4(KoO}%;amI$F+(|qi zBEq&XPF?}Lb9G3{ONrq_MA-Vq$>ZR4j&P;CjTk;e!r$b=-kSgJFOwXZ+7Gk9ZIs?nD<4B# zL0~`4?6j$Ew#==yF?wsQD8))|t)=a?k$c8o8`ChmZ48c(VaCp_FdUoYwZR(3O!7CVk7l~Nn=Y0O}4%wOw@w%htx3qP%4a8#$ zRyD+%hk6DR9r2pJ{{EiCK)eT=FsZ$&z^=^4z9W==MCN~6@(1203+z?J+xvPuKicct zf!!vkaA3ms(RZuNW|e9IX0z%gA&ci0+r?{+tT=Mzx`xV?YD+48cDEr`Ro$>Q)>0jZ zueqTibA#lV7=ZEWrge4otFT{?9yyjs9@UXli}p3$+qyfjI=>&mhQZATAULX~)g&Kl zt*JUDBYIs^U46W|vZ21JrLq+-sK*zY~`D>EggMP**(<}O9LL{jp`YquY5=f=~cbVgZa6R+IR+SCYH zRr|@R0wt0y$#zxVSl`eb(+2EB4{kaEhvW`!?QY*x)7L)4 zmzD=NZEhP(@RjDlO|39uZ37*M+edp9Ur=6FzMwo_zNzyhg{wPi(*X_KrdSetY2c6{ z7w8tW-^<Plc?ShgnR$ZObsK1-K}JE%%&0}wQ1ym}W}^%Idd2_TUEy?DWv{f%CakqW z*`jz&eXO#op|&QqDXKO^)7b_iq;0vDrR_|nD%js*4%U*c&XifhPBhSJk2pQK6baSx z0K9ywu2Mb#VXz%!s#mas@NsGFI&*&)8adSOlV(_;xK2y&D|_V&ZuDmPhm792&D=#! z7mC_u>}+rM%~L1d`tVE@y!|~r%FcFgL2J^OENv;-Ho#_ymj!}NIJ<%j-+^Q?C}{$V zv-PECA5!u8rCt$9r}69EkDJaFub3#~?eD_3x4~HApl$pyDX#2%I=^78(JK!h$11#!r4avJa9-jdqnC_cc2k-;OZPJPy*TiSC0MqJ z(qk?UcQL|2esiN(vjB|zu+8f8`x^XS9C*b>@FSgfdAJ(@2=ZGIP4UB4me22g_`Nvr zicawRz^lXn?jHDq{2HQKzRVx@!@TnT0DkhLe(~zSQpwG%2y+p~`x)bUbop36;l7u5 zd2}xWK)-kG2A$p;&=5~wxbPXwUu!f~UhdO*`Fj(7s7F5>b=?JiA7!umPoR6>iv-up z6WxHgL=*xk0Dya=<8d=x)(`XM={&rGX9yhPF+n)sCECA&@PEf%H;NIs9JSlK+J|`3 z)Bx^nr|%A_n58?WurUF zxYR+0)xJMm^=){#>g)u#H3q-NxavDbfPcb-w-}fIBO;%j#y#D*pEvH6#{IH!zh>OK zjr*{1e`s8O|C;<>H16xh{flw`W?c0i0Oz|}X{;Z_@XlW{lF z#W>|y;~qyB?+r|7hF~jEj<|y~m*16Vj!T=^0KleOO`~Vc$>k{|Lgxz-g_x?k$OMjaEuP^ zU2@JNU6(#^$-bz#;*|bX`|g%Aa^4khPpUq@BDZN|UGW<^Irj7!?>cY47`C4)dh5eQ z`<~hN-J|x+6y;0!4x53}4x_x?}d0 zs2IP0jdj5Mj{W7RHK*-*WLLpmE&HZbRCUGfa1IkCE&H5#ve!P`727wh?3wOI_RXG#|AdmyA)}su`E|KB9JZ{B_cZOT;M*4uh@JM@ zi}%DJ3x@cOB+{n;*EIbbO7^bPk)zPs*uLWEGyBdcyYzwTy<)I>@9x2e5i)5hnp{N_ z`sFkGobu|w3E-Xb{#DQHn{GnW5z^^B(lzPR#dlb{#m*@ud!`d3ZritQ0|-hI*9 zd$9G1TsbXwwS3q5kBWUI_?PR%uC>6u`J&u=u>3@>wfejY4F|8^h*$1-XLp}`R)WsG z+wKxOBXwWg?yQx2M@dskyo=&~SEsx0?lX2(?}{|Z88=j%S8>^%snx=-dAZ1$yYFe% z{B+bj>*^g>N`^Z0o)mqU<{)vMW!Kb1r*e z_QIyUAC|Z5D=DBppbIHMnjbCgZjP8;vG=RH=j^(E zot$&au8sRjDxO2VSNzBP(;j(SbYHXjuU+JE|0&D6Me**ssFGZ?Zbvtv&+T)jEjwlT zr;GR6)}!zvTy9sxSAOoD7q0!qKJm(nUE8~UvCn<*k+-dqN8SoY?t3dVYW4$7dqa`< zyPtnc%&FM>`tC_}O?zd2{=1R)^WXY#MgAK?)bA0{4sl5J8z%f$ zE5(a@PTwaMBK=dC{+cwu^ugIN)R+U>(va@X`$}NgjNlUtlcV4-@t!pFN1NC8)eci&`x18K>*H%HU zzkhnRl0fizXm>>&aNVtiR`^}(t%=n?+Jmid zwu29Qb{$qXt5J!7^_eeIFAE4oj7ZBpIMuZ7bv_ZU5=&Wb;aSKfb9ydr8u1qO%}m?%`>h1QBw zm!Qv41djY8#*lI}<|_B2C)=%|3dKk2ow3!JTR6|n!((z45O{s;l!*v@4}NEAtAe&6%TYLPPS+edVe1f} zhA;=sDdGgzISwP$oU!%v@?*0((>Bw~zB*@alHMCpjGTFA!3$oGp)<{K&=5pO;yttO zX&6q)(8>oegm9lg;6!)qEFlKm7IY|s?w>%Nbi3vYG35ROJ@Gd8=8zDdc7KTYC%g9? zim|PGGO~KA`_>qM+*iYpn7bHH%dN%8+;*?WINfo-h0%A8`&o?5Lv9S^3%kz&>$-7p z$ak+nx+C3Hc#d)(io!O!yO5pH?ucTHt=wL~$GB7QEOPmF{aE+MC3sE4y#Uzp?(=|8 zaQ}kRPISM4fyN|v2A-4MLqRje%|&jfy64WooWWgz=fUoS$XnE%f#) z+#jQYrn{wh&TvnLaA&$nOo3;)*FosB-6A{>art)Gq3*4iF3fTHPV8Lw1{8Xpy9Uov z_ZUcEzRPbZl)3!UV!4}-=K{ALa$D%0kDM=ZzYFYQ_jGVx;(ii*mbx5kEpwj$cDegc zq-jl+;5YA79y9fNA67CV;^0aVI zK|0R}cNLsxh5I6+KPTL!aDIlj+@QKY7w*HT&R>88&hx^(92NRY;m(6JUl4B9EDYp@ z`&~%#CE-qh^DE&_MZ8}NcOp`MS-2h0;8&0k1pgc1u7vYj;m*XG!S96IiU_aby9-f% zQrazn^9SMn9##6faKC|s{wUlXIYPW4+$c2bPr^MI`FvBjCxG=|plbI(wxK)UMu~Er zk@ltXddN5OB#`!Hau57?t1Z%mEZUdLdsHwQc>yA|uaG}L&@S06BWFUk_7@e}F1b!d zUMKmN?Pl6lAk=SKbmT4_IQf@P6gVRG$9 zOmIQ7q)ab zAJwL~gmid{7d}{r=X&9BI=sRQj}p0mvqOd93dkj|x}jQx#)Mf&s>apOlu%KaS_9R{ ztFIBEu_ok3j+q7II28}CxaKug$3$qni8@=gw$Oy|vEXWz%#B=&{xURCVO3*gV+&0R zcK~gdoFOBNp@gBy;a(L+<7HzDO$iUG@Xa!EJ5(t&)x^J7s@4`dD15%ce@8~1hq{Cg zHuzU$j(m;ync@3X_(D5!T^Qk6;YU^YK|At$G@H=u@Q+mZDLb<15QGmg{C7K% z%h51HhnnyiPK4i*56ubxPSKy^M1BQ*56$)Hb0Y5%KQH`Gg+C)FQi#4iRO;bFkr3_Y z{BRh>ggir$?Q;<>^YG!wXyVJm(=z;3G6P@(*690#$=D?Jg*h)or# zGGVB61NxUxwF#dib$h7^{~fIClF!LVH3kf!TJ`rc)nBoH3e|=AWnjAmDt|3neQ1@5 zf4fxuQ)soypwPwFdv7X)+B4|ESEXs%sFTMuY#M zjMP#k)|v3*GO~o>CKG;2My63En@#vR)5O+?4_5hoUPdmY1X~P#w-s5#_%Rbc164E= z;Z~FWIaZ{b^4eg+pR>j;MK#zZ7n-*DiSQwc@ugPeTt?hv7+q&Yo?!ib(uBWiMPe9A zgpM=eo2|&Z6nxx-Z#8ZC_;9u2cRMl$MG3VTJlgVf^gN->CVYk+`64T}-Gt9EZN0bF>Poj?t4H*1hJ2Hi~V$j6@o1M22-DxOk@cZn@EaHa@{(U>Ll(utQ_yold zwrv6NCx!b}7z3pi3=%@y!#g!TCvpVwJHn@`@Pj#dJi{lnGkmVbha#(q|8)5C8Xt;W zaR|aEhj~0U`VQEtx6p(}vcoHUk3RO7+9E|jlIn7)nX2{Yio)r{jKZUkmV6|8Q)MBj z6pChyC|pg3U?ANtjEgOI2NH1HEAVvPd+;o9uY)%4mhJ;|ESCd>-H!Vw zIF=Vj`DrF6n`{RzBX{UPWirt3CDxV_Zc!k6zN`1 z-|6(-hUT^V4Eng44G@z3(IG+r1m8hWUh=ctBjLMF`5r=rJ*a#UGzIdr+@0_-2L1qh z+FXoxPm{Mn68JAm2$PqB2N2hqCBFj`S8&2~_-D&GG|gSG8P;5RJxIsRLaC%xDGQKW zSG{2Dz5sgZ?#0t``HvvmJ)DAcTkymiho+Yf(O6m+9eSZn1o5b(Iuz)o7%$|`dD z(o95ma|v>f$G8~(O`$~=1&3k8W!)gBfN0$17`#jCcQVNsx1lJ)eHu^czKHpl<$j1K zVqAy>tv||jjBygIqqO$Q8yVwu2t>G}VBn>@j%?j+cp}Dn3^uL5%iWAo$!fO>t;ZST z&nP%1OlXNx6ofHYvc_3^NcAv`o3!RzACPJevL)QNATa3`v4HMcBn!R^AuDUK^*m#Y zau}n=nhqJepMotC?pnqW1<%4lTdS=I5aZe)ZfRX(ts&KQkeP4~VzQ#35hAm$x5`Mx zqlBdOE$d69x)Ta~s(U@qm?z>X-RDW_zKy5tjzrpydkCI6ZVjFxH;yN2;thz}ddS)c z7NZ?&hD{wA-w*|Gw*3rvInESxr{i}pbMp*8g!UY;)jV9y-l-62oXz~dGZ(%Ld z5NQK~E*<~*nt?PX+=vv5wibh6g(6_`74}I?K8`7=Rc)e8C8MLzVyqeiQ5m}42Bg+N zCX?oHRFbvIKqi^Qj_Mxu8WewI{TTap=)(BVqI#`Q1UXG*5sxzvW^4S5AheD* zkO_qRjp=VTka2|k8QN)eXowt3h&uZ?VIZmoj;DfmX^5lbJ%XIO4NV?nJ;~HRWgrnk zj)NJpwrYrF5%LqXd8^ORNI+OiN7+9Cvk9+IaFVKbq9R}|4cQ6wDdX{HJz?!I(Z-X} z5rll&KvXe~B4n3=sA8N*$f*XRit#eDc$R^TBA2ykdoSCe;tGqj=-a64zu`OMIa_lfRS^o+if1lHI}I|LcukZ{{t!x zvh%oI1{12S#7{NjfR*^UfuyX&FEu1!C0;T#DJ$`^hWJ+E$M#yJG2wA$@Ff^l>$i%4 zRrv>d3zJvn`lE?PE5UNTYI7ZM0^=58;v}p$b+m~UutoXSqxPeWs@nVab<{w6|B->H z_Rb=*!kCt7?-#;gS$|Rdk%|Abi_t{KZ-p7L-qZ1Pl{_{bkPkG(Rw_S-b!j=z(3<9` zR>_yttQ-xob4=F%VIKjG6P{w$?_rhXD*`cb@jO<^J9Z4{u}oD}$xhgBYox&P+#&4B@s7#^uk8pOAHTf5v!yc>NXWi)B zM%L$1uuUe~!DKX-UCVj{Va-#G);d2TBXXP6-qS9uR?TSQJ!o(ftU1mUn8dLxH6lbf z_O+HP5kX@jvru2w;SQ^dExnY%6(*QJmL;@G3dS-!R!Na4Xkx#$Q6&fwv^hJ$TI*H2 z&Q(CKIyEGqSKWptrB^+M#?z~~^9696FdL7eUsIX;6@i%e6{T07bZ%i;m?{fjP;A39 zpyD7qCp+_CsK$Sho&70>vF?!x`HY4{LKNg9jChWQSgh>vH?oI3PeWA09)Bk#^;rW^ zozFHJ!1E2n>wI=PtC8x2dzj@z*g7SmsP+c_VG=WhxG`{8i@) zW?5H#&Tq)*Z|v~*=xCO*v9C}+@6r&} zrl>OCaNZ{)ax1!=x_7T;G;uMw7Fkz2s}L(vOaWZ0@{g=*Rk=>p05wOc%9l;h9m{f{ za~R8PKxIV11&6|OpGpY%d(^oHEOl%7fzFL?Eze>oX#LRSSatfU{XAiEtlCd66xn*x z&`?!$i+ak?D8Zss4?E8wjR`S4iZ;>=Kcfi5#1CKr9P2^nbzsIaAF3wKV*mA=iZl5? z(fDn*d=3oIlyi}Bci|nXcN0@CgvPszbVyDaj|z4d>kz&i-3cOh$=|?n>P1jcnR~(p zaBwT|5bhx;nRG8=a>98U>XF;O1c=FFVTSW_ci+IYiV!RJbb67cDQ`s)I^%W~a;B_9 zK61}`P=(wnzl2c&qs?KBVM4#?+ZYVKp8(PCdP}JB2Y7zK?l2lSR1ZDUeQG4Sq7x`xzkJ!_bRk z_XoCHx*^&Z;k=CI85!&VcItB|h>YyGla$q9DBM#)FWq<8rMTCEkB#qqL!^;YKTrBF zI$;^P;IE|rCcv0N!Hb${mGvD%`I_ zpwis~IC3=;fygcIGV)K+O-3Gi6(o~)&w(L|d_RduQ{I8lB0ps3N%5YI!bEuecm^l}wmofk))GBUEVOlrN$miM(28um9zJB&aljSKBD9}moPsZ2suAMjYR%A3*m{^LZ$N~j{GwM zkt2|sNJ#l1rN}>!uZSz(28w2?h+;32y2-kc6^I!bXM(xl&w+2g9fcaVIICNIH|BC;Af9Vt z4|3!!e*pU6BY~FRpxQcWKyq*`0pHYsF({&lI`V5Df^@?Dcucz-$;&-Ni^(%#pB#Bp z5iHACG9$HfFB+7*ixG-HI~}kmMoGI46eZhG4uojIOU9A<$x&1UQG7ZYq;+dV+HF4B ztr3!m;yt^@>G_uVwOkc(fo*+H4vk{GbC9z_VlNqYWCu=4*i`GccDyx5M6R1ESu-Q z8%X1ykpmIgOBKzGxsa5-O#5FzgRz$@zbNiyAQYDNRB$X=3dtkHmtsn2#^G1mQM?D% z#i~H<*N{xreub`mmFm*Zh z`-_&_We}3ws|q^fb#_btA=%~6_!ER9-`3`5mR!!xt`c9m`o15((xTkOEO{RK4!IM! zcYWMWOZnXhFrT)#zF2Y;XywV4DqJBOSn>KoWbkq*?j)2!XZ>=cxGn4lAA{m9_EC>% zEtn-a{g(G3x%I@UqTHvmQv40r9cv?m(c?$ksDvSk|7ro%4so9CquP}?Me%Ip!#)e| zC|ysKs*tlntPnB1lM|!Hh*krNT4%FSXLGi^4dsx(P)n}z4WJKE+4%(pbLgjGN#!rO z8Y`yXgl^Aji%52V_B0eu^J!CjO7=iZ*5(M|Gv>isS{)G*qRT|&;-BFmKR`>ZWIP^R zfDi>J<}gRRmuM)ud zr|0?M%?uw09g<@eemBBp?BnEkc_aK^!(F}r4;+{&7T_G0B%bT7ZFn}jcuqe_6o+__ z@p6<%&d{lMf&LZT@?uz~`AS$blp12G*Q7R6rFIa*aWqLeOLCOdg0N2g5S98M!VAm5 ziA6pZ%$NhFy&m}x3+sTHg?w?#9xz!Z7PbOZ2heGT7-Z!vV*)S}O)O&T;I$g}*O7#* zf<`U=HlVV330oLSq%PTIjRtD&4#0j6!li^RI}@QlBDCxxcwA`Qva8|Y3slPwE=E@X z8ia-Xhn%|{VICkhcOE>)!Gr5Cijzs36qmE5($7CnE4=RJ51$LL1U-atA+E1*t_j>pcZn5V(7V;jL| zag9>c3Jl-G5`-%mUj89SU}n|7v*bh8;t?cj0fN?onNoTDu~j)6VSxjW`PpIlG{2Yz zRl!a6w}M@@QnRO(iIB}TG!4*d!Hmn_T9<%g?oPmdirkCkv?;`pfqcPQ97mX`R>^<3 z@V%kgHvmiaqhM9F7Qdm`{}w!IXkdy!02!dBt-mpWFOaPRz;a^AyoT7lmcnp7m_oe( z#gbRqlA{e?tksKwlU;r~SKBnKd?jms7Y+B-_IE(^CcDAb!9q zER`>_S>Mk8=-|yj-1C5!fAN{#t_A^(0M7q84Z6ex72u3dHhEpX1LJ$3b#D2rT3;Y~n6O zc!g5xQg9T7+{!AIeW)?{pD9*%lhrFetN&E2enVD>Bjmd__n<5kX#V@u`uA+r$04j) zH^lAxFuby37*SpjLH>Lk{b*hD=oF7*>l2353g3$C<0b9Q5)l&O&v)FmpI8 zX+3PLJ~OFG{uu2V-^NpEP_LQB&3+nVR2p~qX%s1*&-iJKQ{fMo1|w%pW0m{~d-!RN z2SabK?wE^RIQ-r|tr9rRrB#IqVx{tc-o9T&)&|u3>5?kz>7DS6rgT zM&QNvCL5je!A6SrLF{D8zR0^HG_`#zBOBc;PUie*JW zy}_dBPVhvfoiSOC3X)~09?w)x|1&$^+ofvMb^%(59(}V%+iLj%Bq0w@S*7n-s6XcPu7zIh9IOmTDS%~ad{Sa_e3D?8(_lGWnTYKS zb2=txsPN|yUa3klQ&}x}beS5sAFB3$t_5}pCjo_!aWif?-@X~GZ*C=EKLOJBEG2eX zBfx(Ic-b-V%tC`%@)k7aP@wu5d91aIk!>K8Y)v(sek_1z39$!Rmjhc_445cq9e+vH zCqMrP3aTN=&cQ7g*y9mx?mqy#7>t$@xXgwK?`N8^8Ue{H;T)h9kk?6nnLHHqbC&|P1jxB_;Mod~sOQv$#o#bWUL%)WiSX$NMs@gX zMtcmf%NXt3@H|e>H{ju){g#q!+0!Pp>{sy219;6J;XzWI-rNdLvu1W1nH3;uP9Www z@bCarQOkkIy%5X726$+Vp8}z$?rPMMf5uRI&$2CZ1DWS^_L+CpQE#WNhOMqNK+8$Yt>X^G5FixoECgI5$1(r%Y_k!eh zk|nixehmLpI(#FeQ9LD}R^mB^9*XAzc$Sh(iH9L29ch} z+7B_(BEU8w(%L&gQwn4SkrVB?zeKo?2|oePXXtqdp0AR>SVChn9fV!D3>@p#C``YSNk_!#B;iekxOyTVDYUn}*JXN~THP5Aj)lK=u#uF&y4C ztDsuFD4af;EcT+kT2B{1$UdP;hNC*5*I@ zjVg%p1=8XM<$C#8ju7F;a@2B?ypzOyh(f;n)*^30fpg!G+_R8R5y^)r{287(4(q;2 zZh+!jca4;i#!u&l%gn&+#HhhqjbhLiXbjh-fmwxOTW8^WytD`!!=-Xyz5$+AQNEN^ z^|UxoqPMc9p$@6m3Ip=bvtrLf5+`}UW+e&+k;7eZ3b`CD{>ukwdf%rFja7YZ*pYd8 zhvglvKDL`WFmsH|%K=naXaIQeo6a zLGT;EqrsW!Db9uZlfPre2Vh01)Udib0zCO~;Bo2S7apG?%F7#(m!C(P2_(kKzyASY zmByr0b}^y%ajLvH8&sdusS}y%C!(+inXIb7!70*IicynsMKLW!fwiAfoJ7iE&dQG} zY>7ELRDB3}dJ0=VM&oCszD10YY^lx{ViOPZ82p&9jxgH?sZ&NZ@Q~CAr5Hh_K4Xjp zhf-NSChf@4xjCYIj1|I&Vi7$MV5!d%38#Hr8Iwm{oO%_bER|U@DEGd#3~L+s((*zN z%+Dh)^3xBQ(^MC$^pWh6smNN3+z>iC?-*5OOY;yw7o_q9&vFtlKP13VJ`c)Y2=fl5 zrHAZSAT8{UnDbMQ&?%eHk-=h_^H{x1tPGR{S*c*kvDly-fQ#V)w6c@PPpxqW5Q@3D$cAQf&0&!h^CPdJCN*?WIFbQf$CeT?8?{B^F*w zmsVPeRyxJFZIL|n+L`d^Xsz)1mjfTOPq$0^qj3DI5I$s|4$(60SSB?Yl7cJe>ZlLo z9pe$TD1kiB_v56MNONrQI8q=j*Mii)h+#?Smf=Q8=q$jkN^>IxlG@83`~;LYMUL zJ9JkYI2?6BTNN*q%0QH4xnyXGvTNyLe1TMB9y*W_4@8Nxno&$TI&wdSsIDlU6u2$c zU*gb1jyWQEp>>H*lS(M97);CvoK>myg+85JGo9%^fdRDL85$gJSHuQ3C0;j(D9hG1emk{t}e#PN^9_nZPpwG39^>k zBcRJah?06u$ECK{hrxdpqIDOPJAm}vs2zb;*1z`Jv9Oy)q zH%5nyY|)<|qK9=8;#t!r`P4ggQ7I3@je4N7LV06!n3Rf2PYv$Or~s)|XcjjgezIqA z3HL4rkZn4&8oE666=(z<#?uIR{EKBmrs#MC>(g2$jfo}7`SOWLx-1PJw1tZl?Jib? zf9V98=@5Ou9C!rjIbaY@##Hlz2V!kx`#=MDB;z>JiI+szpK?3z{psTzH2+ z3a@`f;Df@_NwswPXmEj`!*~I+JPAs;8aGCHK&p%XZ!5x0OPvV|49kdOqas-+$OlZ6 z3z5L3Ds!pm2hIbr6ahKWU549%jfpD0CxfpJk@ID^bqGZ2Vr(xTbeVN2j$xK|nk>;} zWPpRYV=lEgj?t`iizO3?!%Hn78Dhv6@?&W=%MB?u{*2%`pYUj|h<-|?ee`xXyS3L# zk0THgOK}v5NC7X2G;?kRs;dr9O?Y&Q@aPob(S}YO3(rp6sBSus>}6TC?DGnQHu zf*)vgF`DMz>XD-0DgLd7PHi+?hkz8D=otQPD$=F^dv+=6IvvkjaU)lBOe`lAt2q$M zQBm+qyy)8(umTlns^h74$-o>HHs?VtQ;U|16)n?#1)_xWS0nb2Lwl!j!tNS=;~<)mUY2V(h^!C0@V zSTQEv)b^-!ies+}MCuA8PxVp5XCfW4PHQ`Cdoo?JR z<2D%Aqg!Oc94qn4bn`V>4dv*qFkvr!YQ1-b;2}K+WgdUxNWu~jKMuEdd2p&FcDAH@BA+-&3CML!$zOSs?1{Q+(Z za&U07k$Uakqt8aehRjwRlrx)N1@0=`Y;WGhea14}i*PT&&8C%&F0(GZ_;jg5yjYLC z{$FYzHBfX*sIy)F^$~iNHP!LP+RE65mfFVJb*=HrnvFQvX}&txX}))`(|rG6r}>+` zgPrCNcd*m^&XW}G|I3r>+7H{*k=VAWqitJa9?ndgx2SYc>4JGn7H#fMZc4QGboUP? zHnk0GowudEecqzw%G=x5o0ykq+uXgWySKe(s3WmyYg>C4&b|`=4rU*JWq3#V9r!H0 zk4Z;rP!aQ2C3Pg0vJNgrYfT5ehv0ykt34Uw}@k8)S z%gPWy-xWA-5R7UnH`d0h`?hZF>jfGw%x&rE+l+&FbV_LH*)pU~Cd5fe$;8%p8t+u( zcw&1pF+iT|7KJ&L@E15sb%{M`jXf%ANxVwn!M|Y1;g<{ph#CsWv`bL4nnmjivl#HjuDNlEM|rOXB;1^+8GN)waoHTatDPZH&G~n5;9Czr4oAXOil3xy%mdq=+3rp=2OUnIoi|3Ss&8vf@Y07Xd{?d>y?Kj05`m$AZHj@{$04LB;rP-WsHQPxy4e z|FM0A-BL=`+}tz%m^0KP>)_6<(s?``y zG}NzJC#tJAEGmmHh}XBQ?-d?fSj(QFgf?)M&CT(RwJkB8BZ^b_sy8h2$$1#ZMy7~w zUu|e;O&xa%)|D~Cx?Hoau3T3ZU!?u|v`n6mSd-X1w574Hw>#N4pm9FWSWA3WOVftt zc&w#doy?|E3P2YKeSjTHQ0|pL=g*{>RT!<6ts7$Ty2|cn@ zrLQx2QrkeHb)b98mc)QirCX@!Sr2g>v8iO`XKWxb7#~P%iT4g|RqS!hrY7G!(04+j zH-1t#dZms;GSTh{*(8siYygLN;-JofwjDYlQ(M_YRc2B(%(Ia!M7>s*;Q&ol^Wnm!Mw!c%}*x$@*R#Yuep0)Yenw>0V2$wq;{&O`vu(b#+%;Z*QVU9Td~n!>$Yi z1QfnAF_7qO$FZoWumxW6vr0FS^b%?4I|<^=$jWY>b~A>IOr5-@tKmFqGUv= zZm5jKvKB11qqjZQgRx9YqOD^`tb0puTTdXt%GO$SXe~}4t>0L?8ZAdq5pn!zS=>~( zE{{pKySF2;9m64WPG8$lvJXcLxAmG>tNd7rtwY;&n`Qiko;>QSYg_Ptm;FZmI9*pM zZZg$Kp<~b%mOQhtP3ty_&Yrd{@xGyC|4@=={B(4y^9tL$%7(?14~tnaEM}qT?o}!D zv<(gl9E{jDh~X2CdyKaw<2-+|8?c?~tVC7s3q8F9oC;byXGX$Fyv6{xlRO9I%=TIoIG$)0c%sQF zl1%&GP+RAjf1fuDYixC8OKlD8?E(R7#WArlSewxVvoeNRXjc{Qv+=SB32sDli*2lK z!wI3v(j>NVP`(AWPPYwF)wE$cTR7J9O&ZP`%fHM9LPOkon3H7OhsIy{ov34xs$=fS73+Pa3y zRidgT){L^@lr78$PNca)p_LsM8*!3xDr?4+D=n$*ZHKludpf1EYplwNTL;PnzSPy8 zwH{ytJG-}F+G8wlwW<@8h*=qI+uD!gp0~vNyRbeGS7xVOTWGN%Ru5%1y|OP7WAo7r z>jx_bFum4ioyL0llC|pi0{X;ViwQ8+CpMWmtQ_xYOaTm5rd+ifx#r=w z#2U7k{pqUXJ?pl0x9fa~{_dmXgknHw@aZ zOOAUI8&*YV#1EjXMC*<+tAeR6WOx-*J%s4xz@obY78e>1Bb!WQ_64TsMyedr)NWkY zENWskW${L@84OcDD((VLY(9}{q?Ikl#9_8-t93I_BQag`sw;-IZb_UN8)&a(6R+<@ zmp?GnpIk@V&1r3W=N8Pmd$-|;TJ{o@wLdO0dCMHq1czg=BmN=FsE0s@kv8rWCJvQE zWzLl706NxEyM9A$tTi5M+R##68yp_s=-qWj`E(0P#5u}_*gM#pZWDtXGH{rOE*Lg? zf6d$&?_p1-MnT!I!BP1Fj>-d8IV*i485`P+wy3)Nje3BtE7lD5x|Mj<2-B}VBa?b| z(#kBT{ICWV_(SH^7#fMyIL5tBErcjzJ*=K%>}cd_QmwCUZV}A`iNx0aq;I>1jSfv- zcHm~RY`^g&)XN{FiArTySp|C3r!2l|`uMG(=_nkLtwiL{b<{vf4ca+4 z$_g&e4qlKQyfCXa7;7j7QZ9%R*l|+WELn7^cTl+E1GZhu=J5AGv zLD+%%T3^2oa$*<11EXHd08&iT^Ig38xt5X{Jn+^t7e*TYsS5g6+waST&Qh`b-JYbYL;eQkY)AG+^4arI*Xt z0!>}Bh#E2A&5E#?P`#SwmY08f1H5c?;I#R{} zaQO6Ut2WTkG`0w3ELyRgj>cJ6-4HNRo)pyVKo204J<8H1GD*rsTWTm8$9%50Bi@tf z-IDAQLm1YY)pI>>5w)$W{RNH_yL&Nq)+PxO@>fG2Z=EJ9iC5i8)%ED<9&_(c^=gc zlx*=+<0^rNj5{$tl7j$6)Vk5o-ieV4)_!544EjkjJ4K?%6c9Mfax9;JZnC< z3Ic>)ZOdGb3yhwJon&zutQOeV%NcKZ%DW)tU6}GNN_iKjyh~Evr77>Sly`adGNe`x zuvW{#W@S8}IQ|eaYxxt&I#@33kFf{U<5dnVBR-zK0KEGQmYxH=yf?Wi18IVxZ)EKVGzttFWrI%v3lT< ztrk-qoL^sh`WVLmytXB-O~GLI&IET|Q`EW+AU%%v8&$t28WUUl26i;I^`hykZCy1# zY475c-Y<)1Y0%*Wd)>^`H#B1v$)ui5?ir&AP6EYXSKmM~>Q6vXbz%@*bD|@v=Ax$K zNv{Bojkp5k=T8?5)tZ`!1*R)FXxxmZm??jums9+qL1CtK=_v#|Lqn$*HT39{oxj&# zWX#Rfs5)EWdunta7U=O+0kTza9E~8DXRP$8E$wRTtylAGd7)OXOuvG0O}yV**2<7c zN+4>Crc_R(|0s;n#NwdF|trR^0MTu!u)vIWxhv@0+ z-4bPU(W7op9jg!9q~2iK*?OS2|3~p>3&O<{y;0L*1MLG@rIs30#Fu5P z)hM}TcJH1Rak!9a1FdCfdl*`q^QE)p~udSIH$Y^S2JjZE% z_GJcty-E#mO_}tZ$g4f05OJD7?32;@QD*Bgu52hn#|_2hYTx>*4VVve9<^}6FyqG_ zwREVIw;qF=Oev{>7IbIbhG=zkQR(v1h0z6N<%`P8%a=!I51>zO8%!J${X}I;3* z-am8%UI$7hw$IzTh$IMi_HSD>Z?Jz}NBI&!l3kc8MdxiP$K8P)-_CgpqVt+?Voadq@5c=SM!OUYZ^fDoda!wV&T<6yX*u^WLwZjQxjF1tT2P1L zrokR~wq!Q1xYb!M8ft4=V}1(Miv`};O>NVa=}|$sz_vwvus_k>-Pzp^OX_X>3~&2Y zD?c#$088B}CuRc#n-9j~s4V%b?8Dz)Oc=XP3wU=Xo7#W&vuy;FE!!DmtA?g(?DXmN8l!YzXqG&>xw@N7 z6+tc0a&>kXMEP)t1)gyHsfypcR(T7ifwvvJCg*qlrrD`*V2pe~y8Tvzu#biP6AY13 zOPiR_SLun6FFJ2_&wVaW4~H8xRr|9PHGFFEU#%EOB!>oi%}C#{_FuI~6qX!F zp&R4uDFjC;SS?85wRuTmv0v|ct9BQ_E3U?>2PV|1DlkRdqAONy2?ZDNp;@}i*3DdC zD(Ksf06|v*v9-fE@Enrtdep^!o6xg$G1d&x|sNIIoR98G7C;# z+5FcURO{ewt3QM?wq2M7(trtJ{dn&tpC%v$ZmBXo)p@uk+RWo~j>KmfPC`R~hnOL-Gr%rz)x%v#$VRq~F>N8={0+8Dr1y zuY?BLh~K`d(A3u+FthR6jj#pi@wo}1^Jr8BV_a;VYva#XMNFOzRtr$IqnbpgSl8E! zIpYajhpWe%1}cAnfv)$;SF8o^@|aCXQyZQV1r}QTrIFM!OKO!RwaAiMV@WNsq*ho` z3oOf1>ggE|y^&FanMxJ<4bk5>n8bvquN?ygDiC+1FpWvu<4Lu!{pV`jo=+vBSJ9N^ zF-0{p%c?Z`)gpf;z;!>ge6uxcBBmC@vGtLL{US8{l^Jea)!QvZzy4|hF2Q1;IU83SHL)* z!rN&BT*Ov7O+{SbjnL{VtFn*Axm45NztOyc21TmzHOJe7!^`AbQiTcZESsf@tV0Pd zVM8bz>h&8kL0iGyc8=1}pQLXG`|ZSgThNz0Y@6@b4LoHYlUntH{dsdE-jp%*&Uo2# zh_^YgIq@mH_>{q0w`7zq(E8Lszd6y{5!TFbhqHRIy{i$}mbB1@t+Olf19#RD)uj~5&%NVL^Qq`elhWg0z z$|u<>9UrzxNxe^l0ciS2GsQn;#E?edEx&9sO*blhEzOh8;J`LaR!)rbr5L=}ht(df z{bpv1cl+?-iyB{J^M|jU1cqfsI2l{vne77G=#7;PVhdkhHPc>rpwn$tjq$7 zu3yN?n(5TahgyXRE_@ix%q}!;+@ZzrJ>=9_*}T;N1D-aZrLi6~oq?zt8VqbVK^6R- zIYU_N)Q0Jk#j5J+!=kgflF{1N*E1N!%ZgE~TSRNkx<#~E_xgPUgNOVZmOAj4A^w&2 zLtOZW!^tD_N2oCWO2mtQkM#Z$%rO5ZSvhh-#b-hlXXI3z=~SF$SDbBCd>;S2R38*0 z4KMzUvT9_s;xlf=8R3dELltM`RGjTpoMTsO$yH(VKmY4ESlL7og( zs&cGWTw_u70e71VLW(2g8}=s{lTj)-r_2&&&U8guRP@om~yt zpW#-V8Ll`hRB?7r#W_yJxpu{Qsic+p(iPFt@-Kdm+(rm4=C$*AM ziiNoY5N52Ie+26P!`qpFM^U74zj}Hm(>WL>8SZcd0|Eje2{)n;k^qrA2_T9NAqfzL zfJspBL}e9SRJ_@hby0C;l~q(!yjE0nSw#h}by;-rTy;^=)m7K)`@hxyp6O|3f$mEyx9;ld>MK4gJA$(367CVST}vpfWGr!N*Sg6n=W6c})I86Pq$;e$+gguc zGs%V4BZfF^?$~+=Ow^OyVcdEc6mpVL_ef#neoE)kt2&Z$Ow(Qn``PODQzfmdOYO_u z9`-fZ)^%mFWUuA5uBVTt1x-t(TNT7->vlftWQCheef^Oz8*;IJ*t-A@ZhISGPsVkzhv$W3 z_O@c*ZSOtE6Y=kCj=e2#aNFAndy*cpC+?yr@>}?K+ZzBu%F5Xsd;8$vwznJhvFE=lZckn$>f|Gg@KBAFOAF*=^^pa4cR9Cn*~3fCWA@5C_T*J3$?QqG z-S&F9>~(h8lUJ;`)3+ssJxRCQ-Vm2P8B?76-tMut3vw3xoy{q~TRis4V9)6vcwc(V z-m4yaB1^qFn`3W}$KGU@y&h0@(r03za_9Fwgd6J^qn?OAdF)lY?DeFcq<4_Vp1dk9 z*?83-?(XuN>ngu|m%Z5@dvhVXU&rF)x5{I0G3;%I9cj&mUw0R$&ciO_dyeeT?e15f|Kzv}@#YP;2-%$y@ps24vR}#A9p79T zf+IeO?eP!jbL{x>#+6{LAN1%4wSHYJ0-34AHxs3h7=OCfFN>+TM&Kg? z?H?b{ZGY+a_Lk}FXqu{x$DX_)Holp7`B-B5LOQ;@n2O9W;+u(@P1Fx-{rK@-YCgW1 zcqv(;eva0k7*olK?a7XbnLwg`MC-@%Co_fkX5!7^iTdreeql^SW&-iegm$8SN3AdO zID1RI;R6RZZJ#~B- z>bdoFb~H_u@6pfK`tkOj@6qq=(eJJGWsYKRy`3FR6K5l`Mit-W>?FRK39DpM-^au~ zv1jTdN!-cQM*_F(8d$ZyjKuNHRD*T=@m44!VSF?7$mo{iITu$GBcs%Sj51;)2jhp7 zrN}a;$ia9q4|F!sxfK86zX<<1I8(v2HnxfXvoXoG`Hn|+&KIOlUomoYB~weuIs zGBV|$e;lMdR?9tA2t&N&$F8q@d}Is)H%ZSV`pcXy2Q#%gkN;Yayul+s;E~_=$TH_} zHi@s3N1ou3>pb!qlqGDooZTmX5U*E@>XqVA+V~n{(j`dG%A$91-t_>f`z;?SO~scT z54V)$L3jIl2^N9$g=Bd!*n2G{=>wceE~0xMMM<8*_`?aVcv`z`cX%$6T-!?)SK<F`_GD^SP#1-e0Y9-!L?(lC-0T>R0a=IOqRmri=!Tsp8MRB z*+IgRESP%iq`dVjxy6L#)Rd;21=skqF3GKV)?1IDWUsO&Q%YQ0O{Rge;EHNI(RK^} z83h@;pe@%a<=&p^R^G0{i@}nJSUA_+7QE4*A^GJ|Bs1lG-0_6#E8eWQWO2mqyY>VT z_g@eLRAm6-b2F}d;l^yaMb>`dMFGa(j7j$TlMfRCIVNYEfNOigDLC&IPQ@3hnz9TK7SWkWXB>gb)4=qU_@Bla>daglSkj0SrhH3Rl_zD~mzK*jxZtV`m6nz0z) zyAsZZzYt2Zgfs0|=}LIH5Gvts5H3O7IL2l)B0eD|95S~MoBZLF0^T?w~S*w#P_^d-h@(b!nx#pauL}`%9^z3olUMHFCo{G*O0R2Ec!Q-o5(xKt>lB` zW8_n$tT9XY7fG4BiY#lr!UN<7B4j=}m@Fl$$XfCu z@*1)u=JH|(pLx_gmOO!!FDZ)u_2eep!VhKNrtRPP$_mZ=Mwq7%N zHMx=8O70-{kO#;^q+B47_`+l!SxAm0dCYISGo(P#wmXcLuE!j+7OkPXg zM&3{ECijyE$?wUmEIZz=7_%3VDG1fILWk zL4HI2NczKe`ZLIEvKx5}Sx62eN0X)GG*Z50F6A+wTtqgK%gGDLE6MA~-;x{2JIMRV z9ptm*3*_I)56FY$7vwjjT%VHkWnv;I>_m1ady_@v@njh}iJVQ=k*AT%$TP`v$&1J} zB#JsHAsx!B1g zi^(!_7P*K#n_NrYOg=%rM*fTZmdwP7gv8U097L9oRpjO52J&ul2l+PnDH*{8U+f-5 z7LyamIppc&dF0LHUF4JG>*R;z|H!Nkc0Aq5G2~40O!8uK9eFGH47rayNd8EMaalp~ zQA8e3R+A0nIph`O-Q=U>Uh)I-8?rM_5XJr=vV^Q6Tgc1F4dip=KgmzYAINSvu@bw* zWEnY&Ttr?*-au|4pCn%)-zUE&)3InR_H)V6WCa-|TgXeuJIKe$m&ilp4`c=|w}}1D zWM6V3c?!9dypX(>yq$cOe1-go{E9TX+VQj{yO9IP;bbXUK~5uQku~HJ@*MIq@<#Gm zaxeKN`ET-DGT6;dS9|g#vYtGHJc~S!Tuoj@-bCI)-a-C}+(te@K2Po?|3Q$Sx$lKA`;z$`7l0y&eMPc9?RBY#caNNyva zB3~r;kzbJhd^;W4WIkC)jw7d%Cy@)u<>ZCrmE;EUZt@ZGS@LD_E%IaXYckM_=_0$6 z1IQ6%Iax(U$;IT^sw#5v-B$ghP+htUT_xn>C=XH)JaaKgcMDql9ojnmm>qLrxRI{%j%U5+{?3=zcck^T{iPh<82Z4dmTI*m+Qh zW7{L-U+Dg_5aIqo_kWU~(fwP>KalCi*!tN**zG3FQ>rJ~oBo67KZ^1g$|q2sM)@Sl zQ6cP{M)xKm#;P;PvxQ@oT223}C|^feKBp}Hn<(Eyc^l;?D8E3yEQI|-^#4YPzVbbp z-XAjZ*G>q#ohkRC+)oJo61rCiQASh98A60Rnf?nXpHBHq%I63XZY|xf6AnN{Pf~uC@?OfX3t{ISx_>Mjq|~S6cXUsKj@Zu>BEKCd=TbhJa(^MhkEi=o zVUf}wOBP1yewq;WmQp^O@&%MHr+k$V;qIjSgTldRpX6WY{<0AE{zmy7%KxJLwGiRH zBijswjC`~g4nw_>-Gs2yhyKNshf^*mr_+5V<$59PGzigeSJMA{%9m2UMhLwd$Uo5i z9&#Jqx06rOeHY~qgh=-{q`$zHv&npN5P2*)kvxf9KsJ#VkXMkuA@3mX7mifwA@Wfn z%IO*U@1gt}rc{}{@pl&gf$pG(%0r_sNe^10+%A=0&u{u}B3NAe!}ZzuPX?~~t=KM9fEF#4Lr z-(Cp0JLNt?sSmmzOLu%HNb66fKfdau!<|ZbKIJAM?4CoeCNHD^HI#26?-C-ud+7fJ z-FJ~M(*JMdA<|!LhwDn_k%dCUKa!k4_etc*bg!q}K%Psk5~4iT31R0qbpIXQ|48@y z$VbU%g~-QqLWJK(_kU9Ukn$%&=%rzd5*|&KlT*nWvY9-WTt{vq9}uEn?IK?zzaW1S zo`LI)Lu|c%C2BjlUp*JL)vLP=+TvYb4LRM=#` z>?bqHwj@sD^t=|+Z%qt~nrIH1C1g1{nVe3}Cl`=QNED3@zlvN<{+hgsyn*~J`A70k zCNC%D{tAijM)D?7Ute#7Pb7;B>g(&^Bb4>^b;!?B zex20U)#3gTF$|NEVS}$ue>hsjrK}ehuY%axuA#yokJnlxK$|U00L03EL|r&+G{A zA@3(2C7&Q)65>4P74jV+&R0GlKOsLSza!-t6wyn=KqAZ_yOMciAF@ALOb#Q*kovkh z?98ToGC7}IKrSKAAkQYxC-wFBJj@4025%;BCGR62Bp)ZAB%dc=B3~!>kq5~`k+LQv_R`2UWHy;k_8|+% zVzNw#x$i`B8d*iwlMUoDvV}Z{ynxjAd%)iHl z$N}kgeEL2T#QPBCN6DwiXB|BpgC%`K$VbU1$Y;st$Tx+fmHL?Sr{uTf4`c`vF`1|4 zkX^{`WC2-BjwFvGCyAq`prD>AH*ZJ>)~=qvZ4COXTb1 zKJp{-6Y?waThh$3^B*L$$@XL)vOhVP98Mljjw4SXr;;)&&dCf|091S+h7hQ?IoM+M0O?f$v)&T zauiuYmXlM+8RQ)D6mki92DyUN_xT_l7gN5Jyn*~Jc?)?v`6u#Tay$7LsqYhl-9425 zM*f3*m;4v`DftEI3)$t9Mz$fd$xdWfav)hmjvz;qrQ`&17I_j`L)McmcSXM){%?IWn>F^4tW826?rZBTk>Y|4)QMY5%SOEGvr^%H^}|u zyX3#f|C0YB4a}*fTmobk87A|{USxlA5UKC8LikaXE66FNzRwE&^C&MRo5_pGOG$m7 z74)y6youaQK14oBK1J&LtPt)s%KAPl$Zu1ApVaqT!Tk_rOlOquc>6g$SuenCA^Q9s zQ(Ju=+E<9aRwzW65kj1Aj1}Vg%0wZ~E2axEuRl?khx`gL|6L?J+I~1)=6fqd9)R;c z;UJ~f2r*AtC&YYWy%5LUjY6bTHi;k8ZcU5C@TlcZLZkz?Lulray-1yIIgX1Ajv#TU z*78`gjMVu+ywxIuCz5l?d1M{AjBFuSkmr&*f3UNbvd$;u>nN`$H;^02P2^^B3%Qlt zM(!YYlDo*=@(pr7`5}3bJVbs;>U9&OSFf9Z`uPPgOV$m*FxigGBYTm3N&OrH z^b0BL^%Tf@Jp~+1_pxLdIi0K~PbBqo4G1@naviCkZ-Dz^$}7lo$yMZPat*nbTu*Kw zHiXxJNX#7gWO5(AzvlmAor68$oI$($%Et}@=H?5`ULW)pL+oHx(%q;Z9x6} z1K5sw^6anZcP0Ch1IR*h2sxH4BPWuR$?0S@sh@{{{kfDEk&8+FJOun(DC_kej5Di6 z2GGH;1;X^A+*gQnPNqCv zi1g}l5&C*uM7pn|zaIajJ}K+*4*7VD@(v;LvzziBA@ZfiFW5UEGV*tj{)dEl9H-!) zCH)5ZEfhi?B0O5Dv6Rb%$p2i*^Mojeb1AP9qCE8Yfbi=?M!9UD|3)FoXA9-6LX^`k z%DaUquR%kG6%WpfZ$-n3iiQpwUO0SYUS6SgwttHX3x^FGmX|kp$jD(MwEMh_3(6;t zHw+l!X5bwQaS3^nLPpgO(detrP>sqrv29QPQ9phC;}hx$Jghj@H__}FaO8<1tDZqe zo-DGzr_Yh6tFbV(N}Egab}dqhd}+(v|mrIGgAuOUo^y;723nCViLNDrYAd&5$zuu6E_t!FzaQb34WM@lKvp zUKrj?m!FIZ_9khUa@~l3Q=!9gllpPz$z2bQjzdY!SPD7}1c@Qo*|v>BFyy@7csd6Q zbMZo85GeTr@>*rnAG{B?{1;;o^W~0%w`rtR;f75AsbZ;HwRW+d=?V{DU>#Cu`hr)9 ze;4fg#;Snecr;9z`D=|(n{>$K!9p!>G(y|Ne|&JLmNy%r`4WBt!*4Z0e-{6VI)!HbHX{^3 zdi)ji-)@9GU z*Z4x?aftKJq`cM_mTEEc*ZD#ph~mk?Ioj}bzR>kpXY_oZNJ=)cMgeJI^vKIPSBsBZ*vE#)<4=o`sc zos&>A)D8*t*VBKU8MGk=pAI#befI{mkrp|i#QV#?dh&~2i>BzURT-)@Fh;Mn1Br2h^xbhr2~Wqdo$ z&=P5=%jmz$3_T|mb4KuL9e%eN`b^?$qW>W?v`4}>GyIok+gal)mA{4l- ze~h%$zyPmq}9 znv~wN#it!H;{|6gdzkc}^YmzA8ou{YXxYC(%M1)KO9##%H262VF`41^DlD=SWr8w24@GMP z9x!Cki=2l63ndRLM&w~w_eBQd^dO*ePLg5{yk>kRTB8wOMLt3O87fE48;!ubMtjs_ zWJ8{|k6$CQ1FZ(NpRMcUGng>~hm2!ItA|d-c>EfXMUsk$EP$it-jRTT?~R$FwFc#@ zBHJZ-DyIjG8G(TBQt^?;pj1R|VlX00kyRto8!7fh%5kX2uP%d}6-d4j$no7GA+{iZ zii|++U`x855oqx}s(p|?6*19%;PV{>BXFtjZSj#4C$t=iKcX)XMrz=KRDPpt{6SxD zG`C0y`wR2nGKeni#APx(1I4zBFI!w>;W{vsI$7ef4`~aGuw4ujE|?(% z^36?%qk|+g>ma&IV6;|{=*OD>mFPD~^_DVNH!;+;CtS+tq7(FiL{?6hT+w+zLQSAc z7e;oxnT@=4kQlSpNghtn3aaB?R7h4J*Q|nf`+uW|1KsSPzV2e|4pc`Vk1i5nSPI6M z?+;4~efgHk{uH$zn5^w1>2u6MsL1wLptb`iyDfbo&HhxnNV3|`mUPUcODA!W*MkM- z)1`yB>_$5b)Y&dZdvTe8{vD{Ni>`qMXiR}cwu@hv_cc-k4b;h$Q143(oJN-nahW8c zme?*npSU!mwFH(@$AF8}(roht(KKP;ohj zE;<|2#N|A?=xj8I%LR1N*^qViz$J8PD|RAMh?mkOBrXHQWer{0h|B3xWtY)KGB1g4 zHh+>tOUgUVU$9sOuGI>X==J6d3`XtcW}U!q?O=Ax?kO%C=%Q<5gt**H7o9}8B`2_v zE@4J?gSi+MJ4lRK)#&ztO_}I$h$U#NTZf*C?@{I`L8BpSDYElz7g3P7*i?KUp0xv)>=I$s|#n2ZvVulGy?rQboqX2}EIfrECij)QQl$O`N<7x6)WKk+i;?n(nvsBTi+CCCdMAj%F*NBgNX}0GICP`- z|C90bFScQONH`vcioh=0#is{=*Tm%o+rhhN@+5SDc41n$Am5qMRH$yg1?fM4zy%8(Y{c{-}b zNNcy&p?LKc1blMZMkFMllGh~`Ey}U zrR}yQEB93xPJ5C4Qu(jOp)l>`FJZb%7ntsq_J+K_Aol=jIc=YQl>zJ>B})6Z!^4*! z&V5Dfy(OpkzWjE%Gtu$W4!oeHPPx-W^PQKq)H%0aQuW^7wA3}X8DoCh2m7^@r!pkn z8B*sNPhl_M-zBmft}NawdsI(5pvvs2bZWmHPX@}G#`4Czk(O0>GPALP1W#~K+8)BMJL z@C?0&I!#N{`zZC$APhEXma$z&=nt(#U8l7(B=s^NR*G*2is`T~!)I_8l;vNaR7kAS z#(16x|5-d7o4!6o3AsZ+pjV35p^@eH~njJ}YvZb$!0 zE3x-SNyKHwV7RM{fij@_<&tQ|2)%m>Otdr7rW@-Zw%;IWuGEP%?7nlSxKz<4P5RDu zajB+@?oH2%%S^iXrE_E&X;Y26V6nsT_{mx#3MXm>)v+fUVAr&s#))tYSs41#^7TH# zh4&#f7?eUw^58tw_y~o8vJ0odh%Y}YvkQ!4?(>fnzJ%KLwD?MR2oCN8#9bC-Hqvi zELo6Nsz*CCCu6R?$moRo?67b{CEQ>;92Tw-?oyPYQ7WrX@%Z{+=8+iRa0ypvhr;xJ%<7VrY*`L!ON{-gjy2MzqE^agCm@Nlr2i>7;g&diqgr_@Y&N znOWM2l(yZo9^c}TG_AQmtv^?j3N%vo@Y|r%!HMH}<*Hw?Jb0#GSresR!kgk(jwURvKCx z-)Tq!3suIBp0#q+%J;bK<8u{AiBwLD&sB?q^Wbv6 zFJ6m1KSCceuJOeyuxAHJ_)Wfeh4s8j3gA|EdM-dKH8#7`Gf{M2aHnTA8iH}aot{%A z7yogm=l2rV5AO5~=?Rx?)0Lh#anLimn6C6J7MGr;t9-ICuo!*Jc=;S9@81f39DGtH z21fe5NN;{ysng@-poh^{<`nP3Q#Vsn9hEQR{~_~pt)KA<(CaekCS^vte}yav87a+`B+D?{m9sm!jY2a_QAaio<8Poi<9ar`-|sx<&fJ>IAL*VyeH-m5g5J zN&omdLF*y0b!URs!%|GA``j_UC|dnYw=GlB^|4#)Xk!k_DDZWTVf2yPsQSnhqmLZT zp_y&;4n;D}P;O{uS~f;qeP4Djm6>^britn`xhn_u4$2IT$~-o+0won_3l-T(Yp>)M z%%EXZL=4DQPgN0-)1367*umI$v_@t}BQq0$1EQ1F#5*b?__CPf>_@f&6+ZamT#Cgg6%b}$@^vVGieW@ekrtV}V}LF{3g5=k(C zJ0_h-G2@IG&yRvhJg8^a<#~uy1^lrlHW>xap>X{Z#xVddK2u<5QnweDxXMp}ukT5925XQe_kr z3@XFhzXwgIZ>(>^$42W0C3&~8svR}AuKvuqb2NWqYT;(^14%x`F!TVK1l zVOewi+?u8(0~glT4jeL4?=~)NtRE=fcbwbMSi5+6UH#l8HMNW6!*2gKjH%L5gJw44 z6V`)H$A^@gmo(H4DqC8+Ts{)lJZOGRbG>{*u6a=P2{WTLO?Ar~8ka^FH_VR~7Zny2 z;{)=87M!L1#?Ky9SyNZj6s;^%PePZrXFG!8-;|NoEMDH2`1cub(KHoBy~ zrg?c&z0^arrtVDrUEP9OX=%~A`UN%k1bDOspSEr;ScC?tnp^Op@fPf(eX>9ypbxBA zQj4#j*VRJ8$eqM6JYchSX;Xc)cF7P(7|okkHn-F-i6$7rsEK$mroMxjm(N1WcO3Tn zJPuF$Jq}L==-~YbH!`O`-!1RyuAEg~rka<}k1lI!Sc;EauZ+Lnz8W9gh>lPmN%692Mte)JgS7S(SN$Jd}M ztEWsWE04||Ulli~ztSBohp9RE;&W;F_|nOTfACpo#8oi?kya&~1! zb-By45{W}sYKbnXX+B-a7qX)bbt?Y-@cPD@`HNE&MPambVst_wzOCKN?>MXFjq>^H z`no*1l^~X}vME!d<0~dtmseIyoe-5ACNEptV6od^%!d8p1pOUul!E>M_TXadl~hfi zT6UN@o#}BCs*8t2r&pI$M{5^3Da7JvZ9HZ8Xn3@`GFqZaD#uNCefZv~#PV4a%BP|l z^~bwa{NvNHWYNHcxJhJI)#B6QjrI7t_VOj@Yw}6#nifyHIV{N~WwW9aiac6Q>zcoG zc_W6)mC*%@YZmHnydz76Dyef(a_8dY&V%DAXI`eOs`6P=rz?D5lpjTp<<=>dakI-% z^|MMQpy&_(8huRN)pC<(*RJrv?h0?NS+WerkcH7@i*PiF)-PGU0$J6?8BghilIn8Z zjO-M8z9Qb-R2ywxR$tq&prKYw%iz~kk56^GzXOj$Q;TjupnOR^X=fkoM2&-4Q_aex zN>gW5lt%5Zlf%r6im8=_N%b&tNOviAzIC1=!ZViFFGsdH(#49>DS1RR%hf$=G4kO+ zSQ9TAjEyrVS4Z)s_z6=}rNfTH9)*(YI9)rQnw8N)RCVLRJpGf<&ztJch)S8qM&hJd zb2>NbvM$MpB0V;q3s-N);dQQ_am;mQ9CKqcj=8ZJ$J|sij=2lY(thJ-&uw+aF&AGa zkuFxJW|US}PCmR2y+cZheCTdmn4%lEQZPlXG0Hi|0gZ%4=H#eoh?+449i*jU z368}}^|KoS5!pc05Hq zd0J`7C(mVmgo$07{E%Z(AWx7dljYjay4zQLDvD#>op{`!J(5(^ec_b>B;7jA7!5l|zo6 zl@=9`tEk3=OUB3Kjlvn@Tfhmn}aIXGkseD+VqZA}WvxzcKrDf6bCG+zJE-b=--B~qF3kDYF z4V;F5oR}TAuyOgwk$D3bELh%HD`yx3oAI4{uo-UhHF&qY1n1y23+o3iu5Vn}vgkN> zXK`w6d`VSx>9i@+OE7}QiqB~ndR|+C6AOL9BkAu;gJ2t9uyopbi z(Q4v3cY0o{W51)6^0Y+8&%sX0S{Y+wI%h1w6e5`-79FZ*rY!Ijv%tZ608cn?i?wt2 z2}pEu`S|LjdB?e~{f#y~tFcEM8D>!F`p6VBci6NwX)bWEj2|YkE|^@&nY_kT<*deA zD&C2{YZyVVX;_TY`ucht7!C`l=S9v0lC9upE%Odave2f_X|aOmO&!lK5)N%u<>M!p zxRxOF$is8e!^UzsqmEaJ&aA8sVHK|tr_J(3%4U88uA#B6-mMy2o+_=Vbg4%d7A8nV z2~u%_l)OFJZ7@1>YQ@xw>I#g>Ct+6;5Q5I=d#OZf)0C?Jj2c%l6(>HG<4VU*P*r-JwG?ZwrI_EG9uMIR7xAOH{*0g&T}fc>Vk)J$ zpdt%bNn4)Ng^nKen7~>zsk9^I})GcDH^k-6p*}ppP2PnheX^ z?qvyMTVlqimg9m!yks$E+0ETM?m4cB!=B@sIO;jBx>L9Yd71uAz_MjLI=Xl!ztHha ze&KSs9na(!I^z$s>^fjFF3;2#p*&MxxOk?%aPdri;o_P4!o@T7g^OqE3zun!rEq%E zMuWt z13IN;uQQcZRF#aIj9JJ0rlqIXH%8BDzy;2_`WESZvA851i5C@<=0KN-z|#o#*cSJ?iDttN=HbI#!SQye?{@*Us3!3STrK8J2F+7d57<$ zm0>S66*?r0W~^xnoPiwe1CmH^6ABdqU74e$(;ww1znlE*EGwpuBzrt zmE~Jm=fOF8-EzJ1Bj*AwO;{yOnvTIKE;cM%+T4O`GD~Z*Mig7|96CL6*|H=D*@SBYx(te9Hw|!= zr>1#H6N*P4VPlDO@@UU(?C*C^#`=(J2uh`rs-%+EGY-a6aqycqb$rDH%&nY@Zt)4m z!e~=%iUG!%>%_;7WGB8dN$`x?_QefdvT8zU>8QNEvUFOF75nBq)L|YLO7qIOP?|U0 zZfi@Mn*04g3{e%s-kewUCjdUVAo7|rDOXZSb2vj5YMk!+eb^|z8(oZCv%BvoLlrcyT+&iAA8cu|xyac=@D^1d-BlIL zZ*EovSVS%m$AY9S(Q_^62-==y{Ud05uE-og+jB9jplPXOB6+HvvpLsFh_>EZ80Tb# zeeP%IC#-25QQy<2kEriCDjy-gc1N*CH`Hk>W#icOmQCu?^xjnPv&_fOQglvJTlbz( z9I;@WYc{{EqGCtXBieTw&(E;0$C*}(!#SM)?BejAp0$=-Jt=kFG~`Zk>H_yp-t=IQ zydR~yEuhsbJLQ)+cDEYDsnVa{CY|2oEO4}viBz{J{frbP+$xqz-&+grOr)-bRJY}| zl95#Nrc?<_IERi64H)iQ8y@VcD0JqZtu;Sw-#Jpp+FmO|kJBLgwt@Xo- zT{H<-SW;D1Lc4MImLnH^!nJkXHj@^RZVrj3s7Gwbh4xgawKNnRS*7^MDuZp6qzTtW z$B+2hRYPFu6@!%J?9GNxz%$D=ZCokUAq#o3CzTNi`rOItwF`>KG z&tH!FN*i(SQbC>GubDp|cU7IH+9=ew2HE@r+-iDA4^d0UHdg5R7^s|MaS5N$8>w|wh zXLLlpLg;wobsk57SL|UGIfubhc(HBXS+@P9aFGXEhq_|+UiH}9mBOABFjQmZ z{3>k#dUMKU2=$zP^agw#KT&k{3!&#OzpbwPcBG!Puc#;9{cuax?yvF0d(agZc4P6% z_m|x9Zg<6t_d&(VMZUM>&hH`kB`fF0J@$6E%311J@+TQb0-XYk-1FE{+9|b!3ZS>fa z_tPe;w_B(O=xr?YoVdin+5ep#}lvg(`4l$kDR;9B@BB`|CKS` z$%ly@n23${(^KR_z9Z$fmj`=!2q)?5hkwUjfydrF*c1EC=Iqx{56wYub?^`y&gSf2 z=h0h~LT?xKkW9TTPNBCGdhUFTb(M1gLQ1?+&j0b)TLydhi*3%nyx~&zoqWhRCpMhT z*`MXnlX27W6J2NjGU_?`koOpieP?s_AM@y)mqPC|PrR$3m#n??kVl>oiIWd`Uve_N zT9fZhI%X?2T~QJI7;B#{Xpf?QW0WHs~em=XZMI zUF2#9$GYO(=drgZMZ95oIRe5t<#!-Oyjjq5=XaSa-s4^Ij`rC5K1IBzd-Sr9fMoS{ z6ZM>S)d_k|n?tm*{Tn^$Tj5III9K}Qy_%9=$6nVI_MY|FTjjD>=Cbz{?ZJ%R@>1CA zi^kvNTDa+rE=?yPNDa2>N({yHih25pyzG}Yh2|r z$yF|$pyZCX4EB<>XL(DM+ul0Z>kB(FK2LGk)33yU3^RJ0m%`p~kG<_Kd(#lo>F1|< z(synOdnbA99dOy3;j(w3$KLuB_RjOzvsT9QTjjDR?-rEubLwLo>?Lal8$I?4VGmWL z%WtO3-bo!@;ilkQl8!9?KvRK=uN(pkSu-jmO!VBL@^I~ znVs!0^6U7GmseZFoz+;xD=+Gnc0UjQPCJ$Ft2tpry+1lpj*|$;j^84W-f@_ej*tM{ z9KAYEyn8NDP|ER-Z4_4s$}UE#6!JJ=h8vT-)Y z-en$pBi5h{p(OSe;@`3N8`>*`n{4}gDs=_^olWe?|0a)KL#e`d3gVlicdsXX`=K{I zuBPJ^@lT%gorv^}g}bEhbo@K%`!n>Ay=8FH+ki5qhC2c%@yaIWkgj4-wa|MJVV%v< z6S}Hh?XN*QK?9Tsw&P#o4dY+hl-u6uM!e_4)zBP!P)pd{?tb<8Pi{}Vliw}EzB?rn zpF2j8{Rv~eqz*6Q(N-jlco&~41>^lkQXk(;tO~i06|zb+9^R4)JA9faJSID?&BO?p z7~WE+!9O0}@`RTj9^Xur;R&Ciu7r0ye1<1H1`*e0B4?7n_?D&aqaZmoTsaqKQ?>Ev zw^943FZnRw|0887GeezB$%cuQjl}rcDqLFEo0ONKPEr+=?f56!p8UmYls)0ImAu+e zHaq@obvh1~OUEPupzL%2YuxxhxC)fgiO_k>fpQq$_Cz~DrC|lq!UTfviKT35pZBN_&BsGe1 zFE|_O6m>FXsYXM8os7l+6Gzs>{7b0#W@05E(Z9En?@P;O$Jg5y_-kS{H&MTjx{LaD zevVVGC4?{bgzx7G-_MQ+T6TEIuFX{aRc}cMHama)ZGpe08sM=vKvh!TPX7Rp{y>ku zx4sKJ{srp11bcEuAKy%T1@G2`^cBWEv1h6xkG&!#-ajmm$@ivZv&WC2w!mLg4fE&^Q_HDu*VhD( z{s@o$2(=+Wf3}jB`^#qMzrq&yYpPM6@ZSD$tjGUY^>5m<$3r>Oj&G(q&ZB=^+!K4I zI^N@dylTrsmTm8NHJGwpJ|&*;V?E)=di+Z~{@(E8JpSX9eD7K|yL`r}a}(t8wkLm0 zyf-tkKbEOG67ePm6nE&r~x!{&FT6-%M5I@s~5h_-3k^9{-uDYtZ($>vK+A z8GELh?a`m@@juZc&++Jc?VaTDKgkpRWRJghzB1S2?`GUM6PQ1{e?&d;MLqgn z|9Kw$`5w8}BiDQ6g&w&<$0uWxy`AptXqx&=Ans)9*{54xq82ef;wpBoq%7k>HtPR& zSAMf`Cim9_{~78)f`6X!a|&yRKT36`EajDrUsg83W zkn7%$qGq=eb#-0ur&#azN2K1ubQ)|0x}lHC5|wG_YGBSkH0h2;0k zcx~yMcD(m(dX=<2*S(rYNWDw*$i@4!s`MA-Mf!`=gylA*RCnJeD7Eq!`!9&xx#8$Y z*-mu>rMKXDx7ja9fpceFYkk*AW$J27xXbNlsvRlMPRdfWSw?B!9QAW_TFasLcEl9r zn(V&9q^eHZox9pnD2Y9{YRZ=992{D;=TuYT{bJszSxb4CS5n zbtm7`4F44ME6Fv~<5b^wGv&3+52oBYzvoi_67ml6&m=Ai>h#{k_%IKaIjpY}(>tAd zSn|+%7f}yu>RRs%>hYAthf`6lhf^Y%!ur}$FOPaPv^Riy=Ti?iYiWCDQjez)zFU}& zEq1;7?xEiO_FBIWl%f{Os-y2-`#u>T7KjJaeFRxf%Gs*u%UPT7R1!s|<Cx@1(2+i=N!8A-s;fjl7?HntX+Pm;4VY9~YAF5i*|~ zOqP;WWHWg&c`bPxc|Z9y`3m_islR=W`1CiW8{AFdon9vhku29oBV+Mg8YdL zVBnGXGRbVRBiW72C;O3wdDjObrPUPWF{-bCI)%9@kt z|B1Yxe3*QKe1?3Uly9R*xWAEalJAlqk%!11NE2g=gi9yelI_V{vM1Sx97ql(N0MX6 za&i(mgPcvCO3FPl68{$=-YH}U?SxYvMOUdP=tW`*S7m{np>&ctQTgiLK z2gt|BzmhMJuaW;C-yuIEzaqaQjdVL5@~JyXk9;gz7$G~8J;*_130XzflV_3Z$-BuN z2dHNtTgw$kWO5$g9Y$aCnY@R5gnX9VO}qM)G#@9r6?MTQZn!$KRgJCyU52c_#TQ@;dT1@+I;;GMr<_ z)0Lb^o2`<41eh_?JanU0CL$bE(IFBGB-hL9!XJo+ydu2Jet$`=VS&tFS< zy|7HF-%jOskbSABD`FwFDU;cydCp%Ospln z*+QHTv17ZDE(cC zelDAgCpfLp#B@jN;V`O+VOQ&;+i7Y$2-j6)@JBiSLin~Oh;b)R2>V4s`0H>FFn;Lu zl5mi9{Lmjlc?9j3QJyG7__C5&lA2$29sIYL@uwi+5 zLyL-s7Hju;85fjK9&djs3dXP*h!v-&v8`^s-VI0^Bt@N72W34la^g>4|M-)-*Lr-o zz1R2Ky~DWo<=!FO`)u!E?tQ$sh-Tn= z`1ps`SmX~a^Z(tpbR6nVoA(h@78;-+7#$7&!AOzWZa7^0m*r!(eTD3{hnLxNzU)3a0lNcQWLHk7&4Czq zB(dGlU;_S+A*30mVHJ;+Z`t|BJb@-}Z7apG#rhLwOHI~SN8_VT)~B%2V%>ifj^$SS z9yoGZ7mQc920IV?=URF2J>M!pce}uvf=nrE@lceQH3|{>EEC<#w6+%_1=b)GX~1fS z4wz=;q6~u8SFmGQ7b34&){iK*kX4Cz+giI&++nKPA;+p(Wxt;K%CYCtUQtog`m zd+W!Mat`+{dSFNEPkHE{)(XVi*^=|<1t=X zuOJsgEk6d5Vb*#ylHrzoM{k665z;Wy`U$xhWqpUzJJvb?o1?7|W?aWv-C*;0YtIYzE1|jfYlyw7YV>dR%4!RhkCpXj zIR0B%qfs>nm9-X{pQ5QfhBEZu{~zQp{bl^@gKx&0*a_P5$Bx`lWr}~6IA~2jV$_<3 zEw^)I)0TTVvfq}6IC8+2%N#k=ma84vXUlbtoMX!^j+|!8s~x$AEnnxz9c+1%Be%8X zZH{cIHh%x?;Ome>e?ay6PYiyBOocuhi~Tu4$)IYx!}N~{$~r~(V@weJWA(m#Q~5`< zRDX%qGV@m%;f-iK{&AF78{u!nzm)PCBm5v*s=qAQ3{z(QS|dEU9pv)hd0O6Rgm;Ml z_~1oa-fV=gDTX|O;kO#$=fr=aPNA8<%?Q6ODXyUZb|d_%_@6-k$BghWEI#`u(SL^# zeoOo((|@OtjhERf{}lS~Li)SFe=6nOMz~hwX_WUE;fUmKI^|c5@P}e=MsR~p?;A$A z5IxjiN&i*8@Hhi<73I~w@J$lFn(?pkg&#_XJd^TTUyf9ZnZM2#{z43&9Q=bee4Q`6 z2A#z}mxea_!mH62{HIXfoc>GW+f!#gGYr_+C{8Gc^m#gw<1;a`jXlHjXa zf4dnzM*JJ;zrzgQApT1k-%c}pH^vA5GWzc_!?%e48Ns)7_}yms1B@pACi)*T!&}6^ znc=@QvuBO3RQ?wFe`AIp6947&{~q=wKW7F%)b>{S!%vC-S;0@VywRUsS&Hy0f?wPI zf$$6BzcTo}mUjfQ@nTEmKRcL)_JEF*7Jftg&k1H~c}H5f4Gu#7bA#<||DeihM99n* zG?%OuveyoKnO~x_X2~OSdQXo_(lYh9l&-RF5udgA$+}DSWXRDv(kQe}L}fiAK3hdc zmJ78`*574M+kRK}WGKmePNMokL>VJ9uaktxLZRNX#jqo0b#eA0pGq;Gr$?K1tNjOp zkHaS%>IBEPb=k_8a*p)rcXZL>bM4_5j)nLxeXa1#BECm4D{M)*yiYM4{|6erK$sW8u48DL!efeF(PvIcr|A=*n2B-@|Jau7oQdzPRnJGz(tiX}d|8cNC z_S^07|2KF8ju+V#Q&DGMGcuK3I;B+kzoF<4Um-)+w~X5g_mT$sKl)~cyGVcgj$$~w z8bQCO)Gm8^6-K2WD0a#&!;4S-Khjdy@YOhA`hTKt9+VMQSu#-j@_S{EpAONW*f;zS z9Gv|=iUYFog+jk+$pG)mFNA~)_~|($TbgKqo+BW^GmW03?XnA6l5t=D*l?-j&Z6(K z?9y4vpKfi`o-Ot$pJCkz(agtDpa*6T{!DGz%*QDIid0&b4s7OcGP0{Asy382L!J#e zM0tzINLgFTI11>aM40w)6u1^MI)65090h(Oat`Ik@EpobNJ-`pX`{Exo?rIvk-a+X zMW&61dPL6%(I|UZH5kP0MwzGMj5W%h+GMOz9z|a^%6y7!l)WgjQTC?DMtL+%bqe1Y zLF|3#+tn`TzB&!Q{5-pj_G4DiMza0cpZ!x9^^c@>MUk*AG>06eK@0ek7KyhMrnRK!fC{7Mv zS_b7w6sL!u!c5ganPRnF4O4WP`tnb-oBLGy+Rc5Mr5CpI+1#gFzd`xOoBIr%s(5p+ z)Pdv8y^6Ba+^Z=&&3z{2t!Vy|@L80d=02PDo#uWbWohnm=8)M-8u@jyrV&TH`P( zDeG;V)EL$e_{F1g3NLxBdlZ51XdYVP8jDohIKNIqL$SkRU5WuQkTioSd+d>6_gXc|9iF|5bgV8F14^E~u@6-=YlOAnGb z_csy5m)|#gdKnC-8*Q{WR!^jZnMRHlCx#~@LBT9WJ5NuegCV1<_N~jFKD|l>+tPPg z_?b3P4pVGVS#p6w&kyXDW+9YrefFH8qa$YZl)W<4bL0%vSTNf-8UZ^k#*`o{*uhu= z-|z;smtZGDUxL9@z=zrjb~dDC$*4OG2kao;scV;pij3(CIoBvg$o8uWrSR*o!M;_B zvp8i9#}pY=_7IBQYFG*P4nv@CSSz<p2#qRz zfFYMNyL<>gBfZ3ElLPPfbX)u%ehn*(`LWMB8o#F1BnGT+P}c$LYV4<3oADb|5d&Q% zeUc#;Si1B>!!*)=Z;TO3PeT{ytYgK}3?$QM&Bh@S4;WqP3X8AO+M;?fmX(u-{uU$(e>fm%u*N}VimL0(n*2;0Rl;eu1Y z^nCL<#L;yUenO#AD2&z$68%`SEApEA1E&7zr3}_h3>}Mgk@PaU=mZ@lIW4D4uIL;Z z1D6SO>B7j4H;2PwSBWunOg|``pcPc7H%&Bx^jveLMA#zf>}Ch`br)kdp&O*<(M2N6 zk%B>!$dMGHXQ;?7jAZGPwS6RgjyV%mll%BYIG*gb^bEDo1NXsGG+bkQ~NdyInVi) zDWRL`qLbJ|TsG1r%*bvquaU?k#!xW^i1bZbL3O$oy)T?T(|jF1InpW+AV-Q!nvbMH z2G$xJTGH<@?cpFRJW1N-X7dkdh`#(bDiRn6`7Rv;62HwH(gBG-9YaR?gLX0ky3HRa z!5*?*4BfbPq9oF{)1|YNlG8YNz*OMI00yY1o{CH7M%K1%%4c8QG=&zXlL zfoI?+^o-Q?J6b`i@&hvqM?5=UA2FDW5|Xd?%s%kzDq%yTa0pF5Xb0;QK_kyf-)S~T z&=%?M&)Pv<{r#_W(fwVrC>17g>HaQPN7Fym_K}Dhzg*qQ-6~0|^}h^*e!EI8#DOh+ zf$d`ICjT;yJ?Rb9(Y8JR=flrRU zrY2SL4h}8pO*#ycv(vu_=d}NaxHo~1syf5Q@12<>Lvl%GvXNm81Og~aHX)!wLN=ly z37G`MB4fw`fsn*3Y@$X*MYM_)t>RjjsVrKsIHV=WTKV6hwUoc3`j0dP1QJ}+t? zGX{kZIaLP0ON=Ac8M1E*eD*Mo8Uo<$)2@qA#!wd?@usW?FRKVf+AkqwTmyExZbV3; z)I(a7^a|9b0k5hwQLbk&CoCE4Dc?=S8Wh|1Cq#2wsEXmfAxBoF-=WFS$`+uXV!O5@ zG-Wj;ry0BEsKlHE>1VjNVsM)7WsrLg_YIgKPMH2iA^rt#Adc$_M2UUs9XwOt$HNo5 z>rBM=$s3`u&q)uVTE3gHNX0&{DVGl-+=zWaQ*PhusCMj2oRWqsKM&-~Daa$W3lT@h z?t4}8E5p(d`-V6rzd4fM-~OT~k8ffksK5VRQOUk3;7jcOLyAiCwSph9Z-1sJpD$q& zsCSMiYN&5Ex;XZ|ZxxkpSW<6Gy4(6ETv4tMgqD@clEvH--N2GcTMyvjx(R&|`+gJR zq<(FogJM5v8*JC}(?0e5%&zBa&~IY@EzukqtmhYf>iMNzPgS$8b)KOB{<#92u5J?zqLyHm^oXM~25U z2*I(ZnKF0K!->)YM@EWf{6bTAXR2o<=1}Y+l7l>VLc+z?lT7n$mOgAWf1&d5dG3%g zx`ZT#!ug=1TTCFF4x0Y#6jJS`DpC`$5Z5- z-;7)IDiXU#WWvY2y#PMg^yETsU;H@yQ>S7?yW%=WW2fUAi#ZdwN}OPbn#pmibyG~= zj2Q@9t0{-C6YFB!I$d*oHAGGeUD=Rwap%2-OkE`rB>p#b+hX!nNuI*eP>-HrhSRe3Mwnf0W38iEJkDaya~5A$Y;`$W3LeHBmB-7D&$ z`(JP)#d3%W>wviuk&<23I!6{dTPelX`3{-CE^~woo4v^2>ZOlTKXXrk&qef68t{`v z@L5lvL`jti@nl^>AEkhAkyMw_M`=>?&}M5RePoDYB3Nr3r=cE0??tVKbvGE+k5#yl zwjZOxZLM}ZhR{T*s+5x8Kn_>y9AuGq4QY_tUPB+~6RshdP;$7QUZ|3_bG*V)V5kAb#OA_@`uG^qKMXD0jW^nu}-4K`WYYeaW)tYkqF2o3pU!y6@_eG9+!ORAYu1%FwFI1_$It?r>yq-FtJ<-2fjpNcjjcV)bysiXJX#> zZh&LH_Sp%0i+FA7g=>TM>owg{z24h<;rcE89PWRJ-_G7%XbR2Hxf8w=UJd>&m|`ZB zo5L~R+)E*54EN=Dnnu#1F^DwBbRl5yr_#L%cbe4_>jOwc!<~&GZ@OpW>2L?|#GJhX z6D{FB^8`t;7>m1^u+5a?ZugTAyoS3J3^3h~qW2u`2@nWKG1x?kN6dwiLY96r;c@dJ zN%6QEF)7HY9dDoOFETT<*c-;)&hAOxP%^Cg8S0S@=S3sf1K zu`(pQXo?*=>FWfzUr|fO;BQWl)PFIDk3zcE87eiJY`S-2YB-FfyU+;cCAlFA{U z&4hoN#S%9b2@Us0=sDEq9cl9c^8^G8-Vr0QJ~o$0tV|STxM2~MSa)FnCmc4bC6)&d zGvVLnCW$pSMPmI2vIeo@GZ5=bbEU*ujO1p*0LKoAwQHKhk~?aq`wC1kaPCwzF(Juu zv&6kY#hvCjBys(ygyCK$RdHX4C)7PWkwRX-PnhX=PEtJJl-!p&2BSo`d>0X|0>@4F zxd=epmx1L89geRMH*H3tjKef%2jY5uDoh#dloL-(Q_tfVvk60-(#eht)AJ2xL&7kp z^q?cd;n^pHd4yBC$B}^=A{Su zoYzZ6H$iMC%+=-Vj0#a|f}cKiMsu7GNJf%d{F4%4zRoCZ1ZJLID4$p;%jNz`OHVPA|6X>LN9$(D@KaXMf6dvkiB@qdiuyE)|raoI8+K8 z*3s2!BxoCn6n3R^ErN!e389y8Rd``{C&K3%`l!OD7Qp8x^ihQsiH|m(xJ)%NtHftB zX;V z4e&m7Dgsh2L4_RNUF#&$yBLLrdo8Nfi+VkS%6p$*ERm)_x|!a$9+XIvWxa5piFP~O zm!brh`!h&qx4RN0AnTi?{P!+H%;Yn?157VE#_KPvF}$&~@EhtB!W+kv1(&y2LhZu> zw>pLJ4rHk1t*EFryzxxyQO6M81coMiW}JlV?X!b4&om*uj6BryAh_U7B$=)bDZEL+ z6OHq*CV7(?I!+x@cvBcU!LzCqp{WebQa63PgBY6Uc}dcyF*IM@+wuAsdWuIr`{o_Y z&;rjqA%~DG_WH}v-k~ICtE)NQVN6@$E%qaHI76$|MH}x3hSnNML!^c2<`dv=0uHIi zn}3GD#?hqVJwZ7!6+Q9NaTCmU5#r3)8Rhx$c+eBg4;B4>l;=M&peLE1D|%D3XAxFR z?_~2!ML!ztnSdGR%~EALGxkS&&T@dxCjCyd=QGR!Z;q;>Gvobe&r%7`W%$R@o}+P~ z^B8_O+S4WBCo%kUTt<=fQy6|E+H<~yPi6Qw(Vjm_`h14>#&|B5@M#QRALAJdUBo+` z;TvK+n~-0xXAoYvG12Lo^A+bZ!yD<#CYVRd)^Y#-{9(> z%n9inW&4QX9hy(zp>ETJ9+ndgjjMG*E6ksbJW9=BNSW;N{>T({Y>2!;=RM1O8IzWK z%|kixS)_fOO0xeEf!+Xpl*PEa2tH?PABVE+uaOGZ(?=OK&x(c5Vy04y>erCG-Uj-p zB{W5Pp;7yo%8vgg1c$eYKFW@N4rH-+2~!Qg*c|dTG*@p65C;WF(L)(IQv6Y7MGOeLLw z#oc?Z*@@a~-kztzhTe#FNyDx;Z=g`Mr3r0>6(m;YOwM1-lj8>oQ<^YSQJNl*O)sI zoG3h(zE)j-wTcFch95Kcp&3!GzvDT=l!5$U|)aHgbyA7)ZOjAHHq*x+I7 zi#cPuhe0r5r!K)sjq4GbdMoy16OvZG3%Bpgba=0pK9l-<46Y@uc|lR5eJxm^lGcjc z!c_vpbtRgSbnZ6E;gn=d>!jY3Fq3`q;|WO@iPLUT(!~Xef~5#Oo3#EcMY(-qVoti` z0hOO+SkvJRGdA+GN|aM7G{T$@ce*?fco;rWuG2xdq{yU8#Uo|cD6}j2tjpl-zF2z2 zeLeaQJii%3FuA@B{;3}5H_6GJufy#tftXD07N^v(F&$LT+lq4eTwq}GN^RKj_%1{Z zlUK>h6pjq9Vf_t`C|9NzHI#b_mfT`-B|umvul@;wQoe(XGE=%zk;*OaBO2~Mqn5Bg zg8g9mJTNTf!Y?G|l^8Z=%4MYz)2Cwo6>Kxz4M2cme0M`(O?gHd09N{5krJNORHE-ftdA+b*Hn^kU_7W@no9Pq1qV}hYbwQe zhopN>Q>nfuF_csOps7K=-wXA;rqX_p#L(uUV{*aY9p z7mDJZOzYI-^wUZ@93C$z9pCfDer0OB;UK3=qc~(m{WXyDg6T-Hr4kG##YLQIxOFp z4%1!AN5fPJ(|p6FZx4=A)G5CG!n04tDyqPDwv3Q}$!!`(MzL=orb)_IrzmQ+FIxEW zjn1>e_mZUhR!^^L-**sLDc|V{RqNX!{5)Er(w*V?C)TPIlcyI8J-yNhhpAJZ?U^F= zcJkz-(X)FNNSCS8F7-SFD_Kf3)3$m>NN5bxc6dfk2kBm&SfE=P+Ie1!Pc(KH2X339>N4d(xQ+Dc> z+zg6xiF~paD(Cg^P5KbaNs8B;3*nHq@npOfl#*&zLOy#wK%A5`<%V?gJR^g~XX^d3 z%QHa6-e7YPVnVs{jC6n;LN-~RT;b_Zk^?=KWHrpx_Hd79rHqc@B$GY6qy{5Mrg?T^ z5lI7F}ML1vH~?b+rAIhy1+&-)^$#*m!g*($?6lVp}*`BB>_ z*8)7P#i)|ipy+GC!K7@+(Uh^K7~lu{Fz(FM)6HKY*e#z~Fx>KkCb-Kddu4YQhOE=Q zAA#7^gDX+)U3u8l8%bYcWT)1eJqQ`-N)u#?CSI8|{Ar zL|^K+%598%3f*crQvYEt!eCar@6>;)?TGa2g_sxmvUtFyAw4ggu zO_H^qM=+C89VE~2Y!K2(a-rucAzdWT_IxCjjw0FUEyexG)M$skKe<#{A5vo+4dA0A zqt){W#zv~!u>z#bckiqP)kf+76&tj}^AE^_)L7DZT}NI$PmLpu*L8}~FR2#kD;=Ie z(ArW5s>0P;{Yq0F z-`fSC?$=bZ?_OvwX%A>B&36G7`m|qbYN+pX$lA1rHI?o&G4|4aBUQ%R6TU~J@xRs7 z7~j*dE2QlZsp81U^j+-%^@OIz`YH#3dQvOp<9vUWy6n`{c!(?ut+9mft}PG*X-|zs z{;4sT8xzuY9h64D0cn!H7j5n6^(-V||ZGy1!^@9GWR<;^d^#^%ZpCv^Rz#RjPcq!%Evf9nACH zFMN4hoYG9$xezI{VLt<^`d9^c2qKyg>*HC)pMgIu>!%G!%HdZ_QhCX8Lx zNZ-ZclqSytbA0P{elFis%oX1yc3D490d=We*5XW1mubr5lOHznZRk+BB>TFdvimOA zVR$cT8N8!h(y}O*c)G?EBYfk3;F0nP#-%y9X$zvbCt=RxRou~vHTPon4Q{y*{-ewi z@Y6iilt}VdjQK2o=A9U88FDk)oGD@84Bl$SBOSaPod|~<+{v|8W3f0;W8)HWU{N#f z6$iRd$3caRo#InzJI=6!7Q^w51hv8ugK;@}rS0go9UE=OW;j$4x5A+cy%!EujR$SV z4mea&Z9+4&=?Z}+D6647<$C-OUx%ZlK zPv6W(&!o!(<5>7T-jr{##GdRh<=T=tUxMWU{TI(Dm#}J_*@*s&d%~1^O6FRLA`ip5 zKt&ODjWgdsHt}zna#6&*MWV>Vu2$fIJNA?<%eEZ=Csd6hzB@Q_K$LHxfl2c>i&hR8n|1-t;G9E;gH{SOm;;1fNPJzi*Q_x;(GWeOjkvfOaZYrXlTM60SE}KRpB{H|oP1&_DgjZ%5uIX; zg=~m%nQ?IvXu{7u4l##<6$4DOJV|_FM;hfxld-JEodgG}kf~tcAe|~o;=~Ws`A12F zgd{UA3i+uJPbfq_S>Offmay_9Arl88FL5NXf+~Y#WFQq%8DRhCj1Sc>HK`9di20#C zl1*ALRHgN?aE1;JW~D-hgsK)7H!#kMlN``=X#+l`X4ex_HAI9Wjz}@bTGICPD3xNQ zDmvKiQIpJ>mgf0bt31hTCYlA&Kb@sgWaI^V!+|avefdSE;We|7*BI@*Zk8n!ZkDMW zz?7NRDd?%Op@iCFT;EboQQ40VdPYgn+7sgigG2p0PvJY-?G}_}z+s#RSLhD|2!2_& z31S2prcn)9X<&Ma6H^dBvZS1u09h~KE31J_COBn1DA3Mgz-ii938>XhSrry(=VHK8 z?Ua?FQ#)4z)@f%i;8N|}2-u{ZvO;XpPFW-F($0GU+qCmRz@yr^1MswV?gG4^oqGVU zY3Cb&{o0AA`ja*~l*^?(@U$09+asKAMqfJcMg*Sb*O(Fb3=jAUW*FwANt27~S2j&9 zYieuitnY4WG#aKaY;0P&uo1o!TN;}t=1t0*lrwQk-r|<-g-s2uEgfA=3+p>qOkC2? zFfnhMa<;X%HBD@)U)-{=rLCd0r?F|_iu#77Ep1KzS28n-rcbWxYU=Eoyc}PT?^@B) zFuAzBp=Sj?>fJSYaeY@)D@y8`TzgtwpuV%Qr=_hu(Au&%kdvL2os%8Np4_}jg_X{q zTvOjz-x=`dlvM<(ds@4i8Uw}c9UZMroswX3Ma$yO`c4!vxoD2R+&{Uztr;1&w@t>E zzVoJLWd%?N2`$%c{C{69)B|;#3?3WDblc>jimIa115(v~0{i(Yc0aMoD{D(?YU-+M z`w1(nsG3z+5hyCE>o5P>@;N0n-nl+fj@_nranV5mbrsn#d*6u*}nvSNf zNlRtEcXc=715I#48|Ih<0THlzMMGYotDy%J)BsR{B^@p8K`JkdY-nw7SRRlB2!=qA z$Sd)SF*QGp}SuoPif^c!22v~;5o)htN;j#Vq9K*s^;J%-WH*%0Vj1vivC#qOoT?uPcxra;3AX%N=O_4d+~y0?XJr4k|7D!$$ilkP+TOM#T|MMeV!D|t+8dh; z_4`8j{gZYG)g^(B?oOktXK|pTv!%VWrF)Hm-zUflswU@W!2?XfjL#hB>}vmU0qijD6FW>Ht?aAlA3uX#o1XQXP9qJ z$Tv6S%nLbB3OT2QoKr*2{E%~+A)*D-GCR=T(~Td5YO7z|+GK=;tKwpvKQOD#zrg6g zkCimk%K|Guts<>hj+xWc8ffcTvAC(zD58e<;1FiU=8CYJ+) z?aT?aGbhx}oKQP+LhZ~6wKFHwPMmVsOv?$iGbhx}oM{+VD>~{so3bGuTYH*}#qB+9 z&>q$Vnp^9asDTD1WcBZz-M@EE|K7RA>Heb9GNYt+c9zYIVt;W~pfE61Hyok(9lp}C z3S)6+`|_qX3`dBo#-{G3hHliNz6~sm9AN(0g~e6#1GP1UmHyI_8jhOEiUoo4%0N|R z3D&||tgjKnvcFWuypkG!c~zx~D}54BzZ{}x5mttlZkc`EJzafqboOogmKwr13^ zz1*+B5qX7~)@?{5+QFJm=<9)|#wB>HgmxS%x(tF%i4AhHs}!6+L~F_khDD=9S{YQg7uL7H6mh_aBghx>0fa9 z>xzm>{Qi*ip?nGxaeXIMad}NiQLU2Mi+eh|y0I*^Ex~FbOSfLubu$VBd7REl*$lQ- z&);ke!$4(v$U|hqOPW-{|a=6C+N%6;AAx@-xPnE>szte z>xV(1g|WO+*2VHl2(8+Z;y`s>MMVIDurgGC{A^mF_6*2CjPMnK#-8pq$M8q%38m!~ zvRi0G$6yufhSJw}HCD4)|N2umB^^~5il@+07TJmY31`UV>XMrBs$wmg1BI2v5rSHz zDU_f#MBe7z0>BcF*gfJ zhwPi6qT~l^vE?XkYBqw}kL*E=&eegI&U4!Ad4Zj^9?jA;N_Ne*Vn6sR%T8gD8a*;i zD@tlhu;i8&Rn(}-t@WuTftH3==yIxT2oKIQC0#q(JN1wZcCG4&J~K>-@X&OpuwX6` zET4l-eSkFz4z=o<03>yF(VXgle9^2wm67AP4mx3Iz}L*GE5%89c=>7oWFJRTX~t9l zD*C8IEzO31O;>FT>ZW!A#}&EV z_9zT)8l<4|5UuOgmrhex2kn5 zr=P(d97MGXs%5e1Z}6xk-{`CNblaL`4mC?*Q|(O-9# z^}nkuJI=4;9p|_DawGdNVx8CXWLhdc0o4-;$9GN2GDQ2-@YBm%Tp z1;?y!N{KKk+uP>UcP*CkXclTlV#mtK^fH)-0W-1MBR?7Zyk>}l!aI-!HscQuVq|50JhoXJhtl{Pju zHBQV6Oq&R6a9hLD^vl|FGrGgi^=iLiH{+ST6N-P{4MhK`<7 zVMOX~T0L<^o0XLGZ~DX~+4$GEs=l*%Vov(RD*S_4@6;u2 zJ=3P8Pi$`PX=~_4VH3Nc83ViECu|6(S727wFKL>n)yz}1Di~ZPq56md6w-TySxQr} zH(cDfl~-XSBfGbj`d09#Q3<*%djTu-iwvNW9MaJ9z*H@-I2>Vd>1l0JTOe(XQI?!3 zRCJ+H1P3nm09Z0*XH;J9SJNI!Ra=B~tFH2wmj>s%RK1UC0rPZKjjRzc&lSOBS0vU< zHS%m33)LD%qGBver^AQ?cTMqp>=9V57B^T3nqVx#-Yv^eyLq@E7^EtVU`IPDg`NHJ zLb8t=l5^aU+|YE9Ia(6vt4>6=lWU~frs~-sF(SLTwx(QV7N$holhEE)>dit9RDq(| zr-xQTdlhVi89@!RzSYB?(%u9GXL*q_+=*tW%Ft$jngD6>dWlih~Dq_m>2%qTCaz$gq=O|6OHJMX^c#6F9SQhL?mdYR#BG$=Zlf!rRm>_Bp2gg0W=UrK?*waTJ67}8gF6?`iQLwnAuviJf zkcm>t2ov{EI;sODXO!3KC9ANmwhDHf@*-Ow3U0ua0U*nsUDArVe)LiyHsV?XhfRFB zQQ@zpg2!E!{9tlOOA0sj!JdOm8r3YZO}Mhg1{cgeMp-?%j`7OwYr2(KImdeCLLr0t zV)%>dY;8fSEZI}QT_t>RV7CI+7;?uR?qQ2z$nX`RnqZwA(o~E{jHG%Gi*5%=9v~BEfY17IB z&SQ)+rGzRYFP96Mi`Z6n;OGI}7u@9Awvb@ezJFo&&kxKg@nZb@x>*ag}+qb$BjA(yVT@B7CVEV*4tJ3!av)Zv0im2dm zcD0-;r8R|fN-zz}A<2VBulAm+uF_vuU0tP2G@^XlJCWegOhi$Tyfs?p8IY%1**r#^ z2J*BuMAG&@KP9mr{11p7Qf-xuC7ta(9gupBO{+0p{W@!=?z_d)Jw8hrg#9%|g~c_2 zit@_SVPq0L85AmCTV7UIRp*zS{Bp!ltc)&Dk^*8|jbvb?ybm|7Qmt0DYL!m)V9<~& zmJC=Eu)mej)YZ|{(9+z3os;?ra=?<%iogvK+JqwndozD5^KxlRl2cXLRM~2sOj78H zq9AoPHH*a-qbsr{dMH%lTtOSMX$O;@2&pYZBFNrlAIfG>x)%d zF;I&PWz&XC6x#)+kz}r!Qd0#Jiq;m2^K-D;Q+y*-=(!|7-W==_QdEFen)=+B>8x%_E$PQOJLZ<~`#|d5Gbq#V6 zc9G78ZgrX{wFpys^x!(?tQ6|6sQ7B#>u>$;E6u{o)ES1IPh+gx^QDieCp2~=%*y^k z*fiyo7!$qL2ta-)drE8jDhQUy1CBb`u9d3W9BPlv!#$pgX&Vg>M8zsnUaq$()i9Z9 zaippt($XkyTHLc_PCIsO?VWm$rS%eOrea&N&&af41SfNHY}pttgM&iWUjs2>&pvgS z6|~)mdouqVkOp&?gRaM~p{F;Qlve4H-_ ztwbDlw%(&RPeJvfuXncWQpB3wZ=&2j71OQdoX5)1M`Of^+)~&L()(N%=u)}m&yws(F&{2BmBt3MH9y&)4 z9ixX%(Wlwmv9*@I+m~?lF}UOW;h79&sLz3?vO7@HhwoUjRVN2GZ<4W^wk0$w@-%K% zPgmI7Y;4Hx3}1%z#4@xo9DOJ2Cw|_f##mh6(by|+SALOjF$5rqoSYHqdglYF$myV2(V<-!D*V2||?kLelWfckvZ)N`x zL(p*o#J1XRik#yG$S%*(f>L#%&uptZcJI2adJ; z$ByTK-4$K+D{%i+U!i~&ekm39s{E{MHlScwks#->Z8yER~Au9#gyEE zD@>@7+BJ3^yWtDY`iPe41v;3UIyaz5Q}_2&w~6&3cs546wLbph`Gc%s!DC8Us)B?R z$EN(Ct`yShZGA~={RUXwx){2sF&pb^my$_IKvZ&479NN&N zTUue7Y-++0gaNC3eV1*Wlp8d%>PYFbo5m#o%_950Q+>DM6O;+XAZ6Xtd{*aW#b+=v zN4*{dVkxhHRZA-<$BdCBs$}MN$S=lh@!$cL3i$3ZAp^xo8EJxIZ8~AYb zFx27d1TI3!R%aM>)nW$2{%lRywho5tuq#e#0*HEyhUhcL9~ydnE}oE)>iQP8e?4l0 zE0RzRCnX`}&Pm5ooD&7)pfT7fJfi~V#d;up6V_r|f~yU>9Hy!WV$(z z0}S9}tkJg48C-zu3$=1pCj9!sIW29SS@sYOnZ3mBOr0szm~I$?3{BkHLEr!GH*@$xwUd_U7iUCW;#>w#Q2l(3|*BA4Ap0 ztqxnDNHQ(p>`Q~n^Bzz22;DhP@Dt z(0es>XK3OEm#X9P+qTlfTBk*)#8l(u2aU-8vxQqF2vdLmyAt%^{vWCo+7;TCTiu&M zg-%%!LtAaJYuFcJYm59Pwb(x6mOk#OR96;<+a{Dq)7nQ_u021h^8$nz?#^phhZ~ZG@=>fsS^y5mM%iezaTJm8$!7`u1(Vg1N8i zBX#MsA_uim8I$VLTyU)LP$1&8M&A{INHEHz!AA8QTqCBbGa{*dhJ|+wX4PSfD8gE; zOG-zf4kB&P`jl=2UyN$((WeT=EZkTt);DNn7Obkr?eAu6|2pL+wh~}4)QH(OqVR~D zV*2>9ir3M@uRZG118p(Vx5|}uO9NC}#ivhQHnR#be&b;83GZ5wbqyakq%0DX=`u6iRU|WkpKh2>#n#RP4af ztR4&g;yH7mY;!!yH5_%76t^to)fTyW8)#V50OMnoaIS;59~)e5{M zge!aaqBP8Sa{n%M@`5lKV15Ry?=15GCzgKOA?Y} z-`9)i2Gx7EMOB?=WZ9aFx{fJ|d(iG&zdCeOT2xzsS3GJfDvlLlL7A%OW;+f~)k%nw zS!69GW^g;Klyk+TY+C~2<=D>pH8c_E8(mny<&9Pq4^kK}U#YvlYHan{Wynwto#6$A zlv3I;sN`HzY3Rb?Tzk(Lxptx~v5KkN?Y1qG11z)!wD)ZGcnZ#^h?6gMTQ^C6;&9JD2 zS?q8Ns7cx=Kvw`5}zI!g~qAxb4R%w*Vc(Q9e9MI#TJ)KRZKIy+|tc8U=N zA8#$xKbLiL$~h4yC(76w04urT{=)D5Ou<6GeWKUZxl#T? ziPS6DDl9LRawG-Mya271($(_%4rgQVB4SW1^=E4fUMB4hyD}Y25n*z`BCYS8;k*gg z5#{2UME!4ND&#fq$wV|2uY?CrC&MzduLuN>hP3`8F}}Z(6kCF4M#mb4wH#r!xrzj3 zmewd#nd%*fP@!t_&^#ksm+ILiHH8&=)7^iV7Bl}XfBFsst~siu5k0JL3+T(#Vf>0* zwu8%ydQ%n?rl}KFwUF)!`>Ha2YBQ$Hnm&UqNQ8}Wz7Gd&(%$y<4B{tHL15tfsfU3(>TXhNRpFXR)tjV_i*l$K0 zmtpC3oAgDrU|zu{g(=0nRKje3*nFbigzK|J=ZYQNR;)$H1dq^owScvQmWc~*xLqvQ zucSQ1J6reEk+5WhYa2Q0c)s5zABUx3W-VOO5&gFDxRwRk+{+@`_th!ML&=tKoib#F;LBR! zTioV#KLZQP8weIVU9A$f- zeC-#;kE#AK$6)H3WB(n}ZBS*=FT;c_Io*6aF8IleUY9*h7s@lwW{zr{QmsNqoP7epx||x`OrRF8%!Aw}OZuQV2Z8JV+`@+` zRQQ65*j+?L#JQ@NlyDbZUro?pBLO>E$&=Gi4-(z zh_O)}VnZGC&nv>AJYPNveYpYG;^gL6pF0BT2txQO!vqFJd$>fb13`75v87AyCgKA` zN+r-YQuTX|>STl3*^)qKLudGYoy>qSQm$}S;|ntWdAfp9_zw@Z;yT>HRw`Dw@We+a za7#8~{Q7IFs;lvat*wsptxUXjEw9t`w?L~8d0=-u2b)>Q9A#t`E0bzn_>JZM){bst zPSc9^&NXxD+i<^8PJ?v2R6V77>I|TvA)i<7C{^Sw5^ev}?{Hw0hW5O{`J+~T^{Ef4 zu|cyEr3d@zcqWN_ZIR%sI2_3#34yUGZ^(u&vQl z=`eDq;}ya5622msUabun?VVlY|1Z2%h_6@T6HG_(XBv)m@zy{iUB1c0KlzwnVZ6KG zVn@MMrsJHK3Z5yz7oXrK-!!b3FYg)V1URGcQk=YkI494D9vCxcfFm|K(Uokbn1h^Y zrq3K~4si~5j53W$Fs9@@`|2di8SBV!Zx42`7A$#B)+;Tc-RP@I_hq>X&@LOa0;7uzmjY#}y4@Bzz?vKDeg-BI8Mz{NanO z@>#SWjF*Ktk>!SesL}qMqx2=dqZa&o=V$oh84}_{%JMBT^-szx#y`6ba2l&Ybj=c% z{%x^v1b{aU1 z<;YLs*?)FeFFeBYvz`m(hcB%K^Sd5yI}M!1xyWysJ$S;xegb!RenXL;@Kx%EudxO5 zy8~{?PsW4%y*tM+{xDm+~W6k;2d9>W{=GqJ6@5`%m&6XA?l73nS?22>M46bZZ2?I)dI1LCbuy|D?R1 z+XPT(`97}wC-jpx0TlYR2>QJU`ilrUDr|sA`k@hYW(1uTL6=0(XGPF$5%h%-^z{++ z)(HCX2zpNheISDVE`oN4%@Ju|Vgx-pf}R>dE0ZfeJUY7D7~L3Ve+@gAQ=5kVbVwBt zvZE+cAG=2EGxGJ@v)q=cz_9(1qJs*pqQbTmil*kL-68G%I3MK*`>G5rM!HsE?2vJtG~vDU3m__1|1ny?NY-U)92;AV596WW%TjTU!n?n={FSgRw(Ex#qrez-G;C) z1B5sq_Eo#c`pL_kWyk#-345e0_zFIvhVh<<;{AN1gB`*M7Xef811t&u83QhuF z1Sdlu5X{2bEtqW>`GPryaf)Cr_$7#i{T)?CE}~ZH;DU*?-4&H z{)>2oDC>rl=W=L_C3=Xd#G%Ad#BoH~3rPAr;&fsGv6NUrtRbF3TtsXnE+cjjR}$9| zFCuOrUPY8&YnFO!A>K~Bhq#R>zq%~(b`YN-K2O|B+(&$i_#W{f@pIzWLs=K+GjhCl(TC6RU{wYu}RpS;R)-a$+ZO4Y8Ma8SyIOb;O&AcM`V}A0R$T z+)4Z$1i6&|JW+mxOz6Wz`RcdO9%4E%i&#LcCZ0{~AodbB5pO5%B<>;ZCmtrshFz6Q zOeba$%ZUq!EyOj%%ZWDl(?JtI`L!TcSH~NHj?isViB>L*i1Z^_+#R2#0QAa5Z@twMI3^? zkmNs(coMOUxQuuK@fzZt#D|Hm5&ud2k{FLYpX8rT%pn#N=Mh&C*Aur8A0R$Ke1`Z3 z;vV8(i3f-WiJuX_BpTQlNqyposl-vlEaD7e1@TA3W@0C?mv|NNX5v=jqr_cAC-$~d zemrq7aU5|9v6xsxJezm{aU=1k#Gex%CO%6%OpL_zU8L#2v)vh%XWUOx#cWnD`aZjlHqdCzW^t z@g!ma@pR%D#6`qL;&S3D;(Fpn;wIwt#9N3D5}zf$Mtq<6714t2LFzf2cslWHVkdDu z@p|ID#K(!diLVgRkaXPV-SV8m?7ZH~cJBX`@7ZI-_-b~y|e3ZD0 z_$u*j;$h-*QKEN@&M$*_60wZ9fViA^9`V=2-xFUaen3pm)cNKRi;44y zONrMLA1A&@e2e%g(KS}*=OGRyjv|gH<`D~smBfX_WyICQpAzpNZX-TKe2lo0xQqA# z@nzyZ;@^qy5)Tue5lsL49t!Nl>zeByj!GqH!bo_HxrxEduBQ-wjh--;f$BBO+zD|6P z_$l#QVqCT^*GC*nY$Uc5&m~?++(5jRcpLFo#K(z$ARZ(hA-ZyOxv@kKaS(A7aS}0) zIGtEP#6h9rTMcm$v6Z-%xPf>*@h;+n#GS;Kh<_t~NIXJ}&ei256GsuVh%<;4#50LY zi7Scgi9aFUPTWS^L42OLkN6((bE2HZiCps#hZ83drxRxr=Mfu;oy1<^Rm7W#TZxYn zcM)GDzD+z#{Eldyr0X@9IF2}#SW2uTHWIst7ZI-^-cG!q_$2X9#J7kIQ*^oQ#C60g zh+ByF5g#S)CcZ{|m-so+IaTMINE}JbBF-c(Bd#P~OuU?UHSs#)O~juO?;&m@K12Ky z@vp?shy(I?Cd? z-bQ?q_$T69#7~Gvi3!tnxg&^^i8F~85w9X{A>K>;4e=S`OT;&b`-$%nKPG-g{EirV zvaW}Rm`WT*97oI}&LUP57ZF>DYl$0(*Awp|K1ke2e2Mrs;)lc|#Kco{{e}_86Q>eO zh<;){v7LAx@e1ON#CwPj6Q3dOCB8-clIS{>d?F4fP9QEME+KXi*ARP&R}g64@#L>iw#3{s?#M#8T#50Kv#8zSt@qFTC#7)E- ziFXNNo%s#%S>iv4pA(}Cbi5>DI&mU#I3qf!=MoM4N&mZu7STgYBMv1(tyb}&hAGS^ zVj3yBh*(CfB-RiY5YHku5|vZhR#lAfNE zla&j=-`TMjlvI?OCMv)`6SrJLlwoXw&Vs)vs7&}9XACn2E7!yi4p&V)=)Pjl5$pEL zwmo+GYJ13o>PcXUF^zM>5UC#LTiw9kWQ`iTSgK5)9T-nn|uLC0G2Wao)d z``&s#>F_Y~fYE6VF^u$>?N5B{zT%1Z4`1DTV%(lz|GW2s&-eZuDc(JBH=b{+=UWHv zg8Od=e)}oTa}WRR!e1Y9t=)a-vbDF*zU|=cj}1DsY4Fi6zB?LoXwzwr9y+i!?$D-K zp}#m}AlAmUjqaF3p4cUb51%cFtwJSs)rSk5zQblh)rXfmkaDB*Q`6~w@;^xDxHk49 z++n#k7O|@i8}Q9PG)2(7#;&#NH2`%T zr&0#)eB}cpL*h6}<4Utirzzj)(t^?iKc`+e5095P3ezRZjzSiQJ;I(ZbwbgwzZO8>UQtGP-x%U-ot+JTxhqjPFkqAY>bw2 z!1s-h;GZ3C=Go!nf^EzxJ^7e=tVSIwN|qeju=d@L&9!gsHPa8gr^mn>y>?!29UQsw zHvF@5tSglgjnQ^^sH}nCQJIN0R+m@Oml54h1)I&NEC2ltjASdG}`7UQOKfdf7@2Rwby*w}E;+-O{zRQefuDI%87pp2s1R=I$|1G!Ea;>o_s( zhLNRFTdVg-+Xunz+A6LIzaF&ZmV>TkZyt{rFw^K%?$dsak=GwRS?wFPTq%kVy<@%w~A3f{5^1&Um z2A_TA*Mcz#yw6tHJ8v6t>y`r{4jB`!?NgIMsEOjA6*7(eOWq%e4Rsj?)z-FDp7+ zG3UyvX+{r0JXbGbI)+ut({z7=Xbwk|3%R+jmPjYINPr_o?k~Fbh|kP(#m5!(pd^;p z1001vRz5LL2;q)WOS?N}qJ)2l+Bj265bin*+BtHOI1fl=CUl512U$8NUZgX))rkyD zcLn^So`IJr711x@5u@pEY2%GE83LYJyHRylfpR-C468;` z6slOxj9$|c?aVcc^m@}Of@b3?BE7-1S|xsQ%ot?l%(&8&LtevG5;IxRx0}{V2``Pw zQ}n&2l@0c~%9wt;Y4u9@Y*j;N#zUqxKzgm5;g6cuMhQQS;X6$0WMt$zo#8u8YqNw` zF#K6_Ab#}7aLr-(bEY**;#ZP>!L*j5!(3IQ_n20<)Tf&CtEP3Unf_*{g;N5< z)xz-GomQ2EFN;~H>UWpZDiua8XZUuf^?{VvO8OzEb*98$5p$`E|ESYyla6U)_)e$Q zB;oBW?^&nywbZAB;mxt+$e>Vhk_`7M30W+0F0|vguMn5Y`#N!nD2e$S>f^pk zNReSNrBd>*g%p=2pSDT&3$`m^s&wmlO4>L~huob`_!M4I6U@Dc<8i%%r~4V?=y1Ef zL{5N{!P$fl@rb_L#F-f)4FKVBjl|RaD|mQ4(YLx=L0L;NNTP37o+6wALjFtzIWk<9 zyde;MhkFQOIx^hWE)*VpCnHCL3wXqY2uA%gMVo8OkV`~45$jQku3zr~^luM9l%p$1~T9_i2*kb~cn3rB{PvK=X68dfOEgQjb~c7b-ULXhiTiQO0r zI`s|E=27zw_?S<@W01U%XC9Rr40;pAn@1({#;V4 zBp0b9D&9pBFU^OS^f!tplK9|ZZq`Z0q76F9=1`K&!6Y{`$wH~)-8#woV3NB-N$%E3 z>az^%W$M19rrw*_y^}A3BzmpO) z7k(!x(gwdG14d4JjlpAuWxJL0U(&kgl=A~8oPQGMkgNfy(=x-{BN?Xo+6?n$@%MG% z10Lop;#76|vkD$OSDO2}ihwU98RkB5%3qq~@vcO|Uuvz?`H-43X2$^3?mx=oKN!M; zR2GL+vpex^bn~#vVyHPs>Xd1!hDs(KXoUQkiI!muJ54H|soZD7bNI!ewT%G&rwm{Vjm5y4DN(FU4sL>BV8;nKvm16%w6!5atz}HnOX8)>stIX2b#--ryexC3)zf_ zg5y#+PRwD9QA6P)uX$uP2P<}hOzrbQjsthi0p@*@#hdVZR+dsg{n-M zosMfsMJhuX*%>>^cdqCB5Ty8WBU5b9v+8DiyYZ6Qlcs?GB4vK^REau zZ`8emA#FI$Gt6`h)nO}yO*g8Bb))W6gyT1=c3%f_n7q5g;HTi6Drrr5!9oi9%$$q* z0BU3kd}d-pm;W^)xIc`UguG2N=21}7t^=HE_=+L;)vhY zHxn_Xt#Ss4B(MWalxD#KEAdPjq(uF6dAj!$X0Oi69vhTwk{d2deSb4In`Z~@X5=S1!spe#`E&2mwp@V{X zpdMaxOng$DGk!>XU9=a&!h`(rrf*!_40uAhp%XQ9r5euo>2W8=l_x>$n`U{E2}kru zqdaLc1WL?FaG=976$}_;#>F9Wl*EZ0s8dEsgt#O#F3JwU=YCY42+7BI7zolWVVaB| zh`hu3;!+}Ha(FBIv=N(o zy9edqF$*MnP{?d@OgI2ChukDXa>GK=-aNauc%Sc>@?w9gc{(Mm0Hm3!(_A;pl4|CM zGMs6h0;OgeJWgeu5oAM&>EuVLIg0zFsn$@Q0a?1>-!0m>A+7Er|Jo z-N1RzDui}`di^2#HkQH19h${#G5FjARi4G7~0sbLCKq{vLP@wvoj;E|hrg5gI zd9kt-7-tGdEu8;{y*Gibs=D9)&$;&|IV6{G!=R`HE+ilV2}uYD%5cdcJSNKW!;7yPZd>QY40~TS+_s-;XfvB? z72Q+;iymarnV<@5$if;2rmEr@vUtY9Ykid4^a2*tIC!m32R45RPUGMf+TGdz7j5D9 zzP}#gtAu;j`AVMX06$czzL2;1Lni9%dL(`$PV``cwS$H`#tTTZmm37H7o2KU)VXmu-wp?!wVa*@-}<< zQ*Zjp?N|iwF9fZ%>o(KC#`JY87`?~_A`?g9L;@B#1*P9z>5$aH=HXNq<4ZR?WrQFaK7IboqJ$1VIZ zFM@9`|1|Te7%35ql{L%=BZ$!RMzfoB(_>T{@!A`LD&_?vTiQ#B-Zi7{YZY(SBjBq9 zCn|#A)t{*=8r;xad(6S9fwKUn?tQJ|5#9h_ci=>X#EUphgfzIJ;}KHSMDImNE4GcV zOrHrC-omvu-mDu2-&c@dL@A8cxN@+B0TuPA%*sXkSQ%T{D+@>kXV(N_QH= zJ8~dDaLt7zcgqMIAwPD_hP=!)fnjG3j=d9bvLQYL4>0YSx0zQ*TVysK@vlEl`n9cN z2{+!07my4FYhsxRb@2j{F~FK&$^q-*1@LT+>+zo#Y^ZkE!u^l?2C%9kQgL=&mgxnZ z1|DV+u3vrwA?|lpyf?wpRHtoKvo>A7v;2Om<92f8BX6AS!tkGtlauMc3zv#|NXOY5C!6_ToSXxh zZufAUZuoSQli9U6Z@_sA&bx5_7AGeShVu^k=e*+0N}fGG2Xj464p9y??-&Pj8BUHg z*0KNa>T!SVHXc18V4Z=I2JCNe)rHrGkSe;9Wm5reO;z3WilWi@sIk>>#Dd1ARSO#H zS2g9dG&bcF<`(7_x9W(mhY9ARr zy=75*J(Wg{F0QPps2N>>ufs2ETE1*FzGhr_cwSx|6h6|m!Y$*EpDpAAc^r*8{;|?7 zK_?hJO-j=n-Fksyi>e-O0@I^^v=Vo%@%?=54to&2I@rMBTi4jMxSonj zseY~_x0$m!)Scr!3YalLsPjU=*k7}>0lG078zABK1V%A+*)&7K?BK=PjGd9yu)Mtq zpXo1z6E1r@)^>C@Ev@Sk6=JDd+Em}MvfceYc75Y2c*Y{bSn&~h=!(H7j-hdwc|!C` z$V^#$qJYKthJbx^&S1Q%VNc?}oLT1ut8#-+Skd4^>vDsAHU`H;gAH?oeddl1u8z8A z8hHA;XjL$EZg5rZ(G{bY3<{QHvdR*|N-12cFV!_o%1$*R<2=hpeuo5qx$c>-*AH>Zhm;5ZiZs7DE%*H3n%jn#4{;iYj0$Gr zW75I&&ZC1XjtZvdPRn;jA36H|=|_wnoiqBca2|2g;6cI8++a9&^yJB-f-9oIjA(HA z+~9#{GzO2G7~Emy27kRS8tgMM&<}I1d4_@#Zx7guXN)*=bawufV0dEIgkY~|{;?=~ za0~z4!hb{f4|l6W!5zbgj3Sex=D%?;7I~CeZ^6t%M^7F-Wl8Xu&ioe2FY}-CIsa$z z-$?#*0|r;jJ@!BO2?Tt3y&`DaLjob#m=;~Um}QR z&7yf0o`#oLZFMc|A^NySACC{4)7sVQR9%X1$5&7-2h@tKFiKvG>oIOLHKyxPn?l3#j^@Sw z6c)K^pz-PLHhfyU&g2U!f1!&xUQQOz)qm1ObF|UEm(bJ1SC#y_-|AbTM;pojmMw{z ze_ixAp+-up=aiP@o62#G`K%|`SdcI#^v~kfTHM3fgmGNLczD7%K4F~TW`g-sts2#o z#qP)Q+lpE`tD9EU@{|7<=e}BKYl2P>Jh6-`wQ5|xlAc&aCI(kSDjVULiWwzP`3oIQ zMe}OPq2}19h2B)-(zez$m|T{at`cv}{Bf50L_>4aqP5UE+q%|jtA&11=<#AY)0>uA z$S3s)K&xS65pGNRHz%XLNvgrBF>?|=3g1*reTe=RZh>xX=$%=*6dL&4s_4=bzTReh znyhp*H?2Yq8ojvC_fk3?O?whGc;Tz_(JsMNrRqkrYM>=2-fk*;N{MYVz`_m6hl=98`&BEf}8=Fm|Mt!PilWrcW(Cx^n6aXw|B& zh-=eC)UA@9^>NoERF3k&ze}iE)t_7Ku@j7!(sM>|fFC(ZM*sv~_eW zTGm+C-qO~Fj#pO%JqU3v5%JbG`kPP|_Qr&EY_=GuHPd7@?wInGlv*{dmc>+ni?=c=5_*M(0~j2PT6S zEaR}F#st5-6v{2379+=E+HbWdRJF&a0_M5t+GRvx;Wv}Crfty|vS z*wpSH4rVYeYK2atrS;32q0+UbqpK1NR5qK!oobBMz5NV4Ofei9Mju$GJF(OmHS+Ne zg$TUt`34nJw@kg7jL%}9%(H5$p;pT*B5rrr@=}Yv77E)fICWhuM z!XyG<%`$6aVo0pi2vAn7di8DoyDYJH1WD~#xg9Fu-so|W8kw)@hP;< zoweJRul7w3mhZv2&7R z=O)F@3&qY4#(qL2B}M5av81YuSkkOWEUCIzEU6|vmQ>p_mNYvYOPZ4wOFAaCIDKJ# zYAn5^D0xmS`IuO8Z7g|qEV(+CToX&KiY3pArDqr6foh{KU0$?LO^+0%7sfX9jGYyZ zot+jtCpC6%kJx!m?EIA2Pm*I7CKaVmMAArdR{GTRxq%j>F|kN778bn_doK2D?Dw%} zVo%4Oiai;7B92;^_4ipPH2a zUn*xg1a;55F1Q>r2XChN4|7=ri@`YQ&%3|V-5=d}9Ey`qCI6GZJoxdaJ07xkvk1nx zRtMe;-#LICP z%w8B6t)qt|^r}$y+R)^=d1F}E9=ka)rchnglp32ALdlzPgVSnYZd<4D| z-L3xU{uxfczvm0A{pybSM*aYE#Kr(#reI__c>DvWKY#Bbf6N2(cOXu$ynJaN&E5tp zbHp$(5BCJni<))h>mJr>`0MXE`ux!f)fzwgAAu)H2si*XOq=OOa58WH_=e**=(YQa z58k>QJ}-#t|6X?tmMq^9GA}`t#BE$%GShu>I?Nx&3+TEhZf3jTtGq^tw}u-*5Hm#A z^n4u)UZ{(vtGlnG7L2;a&g?%^nV{(UIupnJ5N%wKTPiY?t6{h_Fv zd;FfJr~aj`&S;dYTU^kHs{q&BxO8P}LTGGRl@JOR$IUBS5Tx5y#_V!+gUP)j_Fv7@ zVe$Sp&A33`&sLgO==-t8-g!T^xX9U`Eq3GaQbBEM*SkB3dtC9W*LWPf;kDl#m+{f% zUe0B#@4=aX{kHQ_T+>L)o#+#vgnBs%_Oon#W%6wCX>6MGsB*M=pkC z-y=Rk!v9kw{69;={|hA31F08<@4E-M0Skh|F;|m^As-|LE?>K1{^yg3znMh5Z6xCD zBoXf#67ild_eI?R-mu+xxkWpQMzMEG@L4yi8bPUk#imWw~Cz0D4!;tDQ*;hE?z5M zCvq>vaQBN(h}%WhE8W{rKJpatQt_AKUE*UR`!D^!BmP~)J$GZzhr)CpA{K~6BKtAj z+r=})OT=G_cZrXQFN*JoM$ZT0NkhM3e20kq*#_k!#iPYz#S_Jo#h-{*iMNUmiqDCE z5pZztEujZgH>3r*pLLBMufvi<88o z#d+ddaf5idxJA5G{H^$yxI=tH{8CKDc8mGQ5QmEs#1ip*@hb5K@lNq!@fmT4_=b2O zHor_~vN%(mFSd)Pk!Z^^#IwoXc$q}*S4qBJ?l+N`Z|;%(!{SroA4Q`t1o8fvGW>rk z`!B`s#2_{ybPtnAx1TsrJX9P-!ruhRlO<1+TqVwy{qd3;B)3XFl|;Tym;FZBUm;#A z`x_6JsR&SBNuYUo9Rh`-PI1 ziyh*ba=$>lm_)r@DS0!A^nWAXB|aker^V+-2^goTOn!6f?I5EADw zaRiC-6q0Z+7OTZm#S6r%#9PGs#b?Bw;uj?1HTqf*Z?LB;J0#rj`w7FS?1xD%7f%o` z5;uwWk%(_Ai3_nO#O<>GGl_IR5kHsxH+i${vwCooItVn^KVX>qJg~3W zUmPip7WqOW{T(3|i_^p^u~y`-is`>aXbuA=>gB7cWW`8x3y@i*dc z#RtU4#HYkp#Mi~Q#rMU(iu^1B)A^_PFOk1`rhSHZkeDg*djfPnOyrNFDNhnB#7c3t z$nWRSU%l8Q@~70aUn`z2o+Vx&ZWMnmn*BAxT`!sU_!-ab;@#q7;#1-a;)~+DB0s6a z@O#B?#h$REeTK;2cvI#lX2^VTtT;)WDprV~4MHzmI-@+Yly-y`w|qLh1z2Z@ME=U0@)WU5t)b#52V6#S6usiC2o(i8qS3i+76;ijRs>9u z_lkV5ML8t$2j!Iei-W{0ailm}948(j7KvqIr8rCEZ_*imlgQtBb05fG_>=3zGe!RJ zoAy_TTg2WpA?@Lw~4Qce-hDMEPgk$%YF~}i_#wP@L;=RIx$2rLwGUt z!r>CY$Wbv{94?L$^Ta|iCYFfh;&ib}tQ8lEjbgLdDz=H8;u`T3alN=fJXgFx+$dfq zZW6B+w}{t^cZm0h_lXaQTg4~DXT;~lZQ@JfPVvv;hvKK==i(l5ulTLV8}_EXL_Sla z92O&DUok3Xi^Ik4`_w|&j~6G3G11$%R!OcE=ZXtNZ{OM~x%>Wgz3exL-S@AXWPi1| zg$!dI6>lQZZ*LPX3c2M!9d$r|Ih-Hi-k0^&KXH9?fn?ME@Mr25?xud>e{|uvvH8)& z5&xbnEcf?4*)ih^^9qgk|NK4Ka~qI2emYxdFx-mbNfo~AIPJ{-`0DG-v+p>)tZ&&t zJ0H8#KJwTer9JF1_SjpC&MmV(ziR!qPfGhu*ltJbX9Nx%G-}b#hJgb|I|Zu`Y8yNebE*2QIEC=XVod-|Iv#*?Xw*^M_q;?v4Bc;jO?BE9<8phOMfy zEkh9ZFgM=53lkx{SZ{My-IfCYr|s(j$HK`zx5e@)Q*OtN$d+3d3$(yPY+!%tlRHm)H7QFX3xcNpjR4eEnTde$t}{Yw%vvj))ok&HDK?v}4bhJ=mn7 zc1(n23Y)h_@$FCcrFrN}NBY__;V)WvGuqQlCpwm?+>elFY(E!m`p_1)hr21Vhcm67 zF_dY)>8;zdchaa98iR;8Dd%K2f)jwG&`bEAY$G#I;zn_bojm1cTnIX^A=VX6GLmR_o>uQO2AhMOg^2$U=TYQvfO9|AqD<@MFT7=>fDFi4tCB*BMx!SLW#1Rtw<}|DMZXeokx-SFz3p?c$dw5u5Y+g z2cL&IcVa~w;n?sq(m5ZsG0ItlP&p2tUgkQ3xZXKmA^tpP7-}-#xdF{y;PgWW8sikh zXQ9LEsId<3QjBxHL}MN9@X5<~XBcuj!Fd`vIl|$Kkw-ebvpdlVAl*sMuV9|+%tj1T zoV~EwYB~Re)&E$|EVS}tmeYwWJ#IO#B2Q1?YlBGkNy~W;d3eflis9vH%gI75K5sdH zhvgqEXAkoF0=`0rjQr7Zb|5F)Eawpvc)R6{LM$($DN$WJET;o_$#Qlfz{{5NI+A_G zaxO$OziK&mBEU||X+yQYhN#gtuUigpvHZz$GEpagwwwwy=U*)6S;YB<<$QtwZ(0t& zQTLYR+zc;o<7qHUz3X@Z?Ge0U@RsVOFq|*@X9Q?B!w4b{I+i71=MrBlFNdlcy>C9d=|6-OEi5`EA|Et7zZk3c25BM;6lkD7immNBAZ~ z^3ihNYDZ3>`*gWKVQ1hKbSt@1?$6kfpRm+3BtLIQ`lC}N&y>8)j+C>!Rgzz_BfN4< zo|Uo+2xjfHBllp;C0EOReIW8n)@Y674S~p9)<><^7Vnpt?a1BOTH-(S&XipTqpUqK;&G;w=jj@ zEDUDd5r~A?Q1xfPE2l>`{%*P47ztH{GMP2zpb0xDfhkbPxqB_|27!8i{)9B@|cNleJIjM_thy+ z8+l78gWuLoUX!xjbx(>cr~BHJSB$(hDFeR=vXW0qdCPTAj+{jIlT+Sz-IF7&Y|m3t z{^q);SmAP*(l`r*t7+o=lJ*Avg?V$sn9MxHo@wTd9#;5dx-7=O@L4qFBCzqpPGS7? zvBI0_!sprHn>|0_yJ<3U^FekRr;@aLm=y18q;XD6TgHs=c7`#z;>VsC-s742Ji%r> z)yy`1HzdE6!d*b57YFIvrfxZ>oXK_l9aFXVByMCFd(yjdbs`U7eouZ+VmK1!0DE6z zB*Hs#$sb7U8_A&SE=ASfoxDCwxe&SI=+<3|!-5C0Vv+Hv ziDXBvZ5hRLtmGcfNyf3$o#j)V4G@D_SOxfeG&#-09L&Nj-$^-a0%Ne-88u9*r{tR; z9|JjE@@L8J(q12M4n(l^__*>0 z#Fp|HpVm7lSl3FyGvZ08Y3J8kE9NN=G$&x6kUqnXS5OfEm+hTr)P`NQYA zG1_fsDh5Kp;YTNf&i%+u$O)t5DOPAS3hjLHGQu7(9bwlv|9TT)51cu>77@7p*~*w% zS#3F%?TVoYf4blVYTrVgM@Ed8j^`xV+`t5~q8Ol-lPoFQ^cu&pKQn%Z zXH=CS;vP0GB~6Fs&caEv|7FDT2w!V-!b*0b*;hE}b_xm+$ZE`}s;a?PZ{^w+xr+@G zk=SX4-$Nv3!gPDu7ZlS`r|u-mJ6}c&hiT$8+-D_P&&jYe;IsdMXuYs=fISzk5#EA# z`rB-J&W+SS?;K>aXK`+9Kyy0>+pKcbhSlc}*seH-*qI2~Ck-vrW0d_*lq)I3HyOe^ z5i0x;8pfzV2s)t`(Vc^#&}uX(qGg4?>|29)Yw{*UM%gZFZqLQqPc0CT%`O zd!=rWO>f$4V&rGZCWAKDp+BddBb#2dS%msZJzqA-u)$_H^`yYP$j2dl@NYn8gO&PI z<8Jl8jZKldCNLDW)|**n4DBdr>P2o0p#f-m$W~6ZDUywxFT6Tg!R!=L;DK2~=+>%0@5m%Va8hRA9o_10` zZ2MJ0w!?EDhS|9a)|T@J{KJr6ib@MFxSoFIp#Rz7`nTz4DQd)WD&Yt}Nyt^W@fp}3 zz?EWnxbtE3j?6H+Z+I1(mRY}zo>sdB31$8seImTZm7Gkzq7`22O5w~+^m#I)2xLVv z&tL{ldB#Y6GiM{+@Tu!fb@b1ypwH8G7`FkLPol-c>)$X^H1i-#O5yY0HPYZrGW-+v z_dwQ=%sou~f>kD#?94%o^QW#fH1lJ|a-mys!>sUQ2$&SQ0%Z&T!5D8rsPIl>WZww0 z(}!7ap~SGh%wWFCkKr042Z0eI%qv-^z@_cH|h5Zlm&Aw zGGaSR5naFu!#U`1!xVC!fR`la8t(G(-C7Lw^je!q^bDncX1?c|eg*Q8{x>s8rr(OW zDgATT%$MTQcN_D7Dr`a0|L)q~f;7^HlvO|1xH4UPqTF`Aj|xlwM6QLAKcnZR ze=2c&?@y57K-R>JVpheMvW`VQK)a-WC9$M8KNB0sDvyjp3#WfC>**0bpij2~?)q01 z`2%armRK8E$2tl~oEw=#F(`3CWC6vH#D$R)8FP}v#*8v7!|BNZcNuOrYiW8);Btfs zWVJ?$(IL~Fz-EZN4UkbZugXgAVSGalMA{j5s$^USAApG|Jxww$gQsDHq=zM65Qr>f zU+HNQH&?@aK`T97?zkG>jdo1$C3#aIas&HQMEl7VmA7(^Jiq;a?Ze%VLLZs zdJH(d(D9*-BZM*pR(y}3{aQJ91lDn#bq1j7Eay!)VrPb~gPr1P2HP+it_So-#f=JF z%d6kaBaxTD78*H&jHGn)9z@4=;w$cuZgC|iGYykZ;8s@(XPUQ0f9*<<%sR|Nf!kfF zZ|1YeN#IUb>YsTwI(Fc0R~nFc9{c3It`yB2#5jM)EaR#qvykcC?@B{6C)4dA&MJYd zVaPoAuqz#!`2yFcM|lG|kTpE>bXM9{S2_&S+GLa_%z6*aU{3yL9t*t}#!-Q%2B9`G zr=xlT&(O$1hZxQ8T`80~29+Fm)@>>$^K~>_;5oNLhcho=bkDnPkxcVq-geimZ{{?N zy}*mE)IXD2a{@bDp93;?u?k*trD*0N#`5x2ED#F)KCA8(R~nl69;@fop(ba;GG{T) zovw6f=7+4N*Ia2hipel(TyR3a8vvKrc{k#KZ;@~~@K!5}`7vAb9U588A&l(Zb|Zx{ zQz*U1Ef)8LNuj$@UE$RblR~HBf0(yE!si&7JG0OzCh@^o82e4<+7M~F6K3ZqHjGn` z9*jlmXQ-@5%O=>T*cnHDMEBpCm0%kab9zL%5?qOhLryEEwKLvMUz9umz~_*nc;3f1F(cm=`@;_E!YgW>h3^lD-}*cao$im@7DdmagIH_@Ak z@klquA#0Ij;QADsO%Z&W&TBY;u1}#E_doDIDfCn1e#m+3sBg&U?zqo4T%TEXBPzmv z-e%45xDSQpVIP88&K`i~x1YZfi7kL#HhZo8JbUf!6u;-(V7g{+gc^D+V|sye2RCBF zE=GpzKQfxY#S4b6WCLzvcVurFIt$Z*y`ADbwA0W}(FN@nDek6t7gh_~^yCRhacCJ` zU*g<#6~seX8|@HQ;j{jV7QVlL+zb(d5_m<_PyYYFyPdv4b-eEEPc z9@t0P?eQ=p+K_NYmSyo$dZb;0x*BO$2b?VP)w&XfOA!k?0NX4t8+P}>E^h=3+i56-;bR!`C&OR|=>ZCn zIT)wJ$MGIyYZKzOGX{I(cnZhy9@u4bEwZO@952L3%O1z^HHEpo1)@8Sr*a(gXIbtz zE^^0ltvim3>6cpwcN~{c{1?T;7*i?5Um%I0QA~n%8AbkZ$sNbjZh*+gDrQV>fN(BO zyWuR9-5p@Y;TBl_h7K*)c6ImwmK?D5y5Dtm@IDf2pS7*4!yHt_e4O^CkGeYWat$w2 zSoXC6G>|WGzShoH+U+|J>FU4_#ePhO-xbCkMx2J+u&+14%8cOJ{f!ZgU=FJ56=0JB z__|==WJFOFP=|E~F2~bj2*S>HhY8}&4E8u{#5;=WogYejpK+Fo>@&Chqb9fA#+lMr zC^vl$vEc~C^z%%pMEcc=ZIK&W;NtFO-zRjbC=99UoX#uzdyH*Z$=YjN})%j?J{WFZl|Vqs=_H;fEc$*Hr|&(@^%(CYPOs5Bzp|f3;f!)IUm|wpeA#3HJKZ) z$-E0RnbW9iq8+pWl_AAIyFzeU|MwwGRMr$b2l)vf6|n7#7=-_<@MZX)6k<*%*?&Ro z;lJ57?`hdw5R4yFY`8uJ+b{wf*X^Dw9Nt83!y^J_r)YE4aHF1Ne}^d}JW3(BhlbU$ zzfp#S(SuBQdXYk1lp%QDkWDJ*G@~Bt`npopnpaw}3Q_`W~ zsL4|_p;XACUO%sdxLinh^^`Vc#dY+gB{VQeTTr$lLb}wzG&G?Oh~hAxh>RcVSA9gK zNW-b22^#^Qy~*APPf?N4oa9rhG|F?p+eqCr(J2Xt6gb|KmV?FrC8j`w47^+ap*2d)cp{GnVV0Tqhyh5 z9#59Zo;*tS8)@GWv;DiJ5fHBS@7(Hx>RmM1rU@EYMd;D;ds3x}HWW3dzX}Sfc zZB-Lr8)Gfu6`*=EO^Z!@)r1>$Exg1J#z~ziT*G2GQPeizLf3c+u*EeJPvE3y@-3Y3 z`~mQ-Yvg6sIFncvua~&9g$HI~Jx+!rx4724%5k$(h0yT>dtms?+f0tYX@gN=T^~%-jeIt&$uWN95-Gmp(~vj%LY#Fjxd%mA1Gj9&5ldSbA` znp#3{VA0$_wG6ZcC-jLBER4F#3=>r?!EG{>yF~v(Z%L$3Re*Th6y_yTn8y@YF=%vx zJ<%O4G)*_@&0|__DdrLXad2V(gQ{`$z#QS4BV@Vkf%t(%nrRbeLAPoN`rLQWax(;l zDTL=Cp(TaEm`FD*ES!(J%}abrpIZX>N*gYAwt)ICUY0Zsv?-uzGZjQn&qX1xrPaKn)qfBj0LvDZ;Wvk z!N|JJOKwc~c5for)tebvqlv7Vc*Gdz5sZ-8soqS}wI;r5!i{u6+874#&|3zqkxIFDjgW;8VOz^A_~q)Yg}7iUo#u9B_6@a^hh^5$0D-$ z;h#DJF7^kcED z`kSb0nYLS|TBiLUN1cBrt3ouG0hp`!kqQ$lh3tzHgB}-k*1@ikv#pzJhK(Pz3RneZ zl+XczJU0d`z?o!C=)_7wBa5D79YK-Cl7uTv=Abn*%JO;#7g8RaCwZ`HdBjtKnZA>8 zGV>9f-ocra8R77W;`AT?O}wx3YSsOr?|yU>71dOYZm(~wZ?9Y0u(HsoDEg5U0(H}V zQ&CV{S2?w&wzT@kQU;UIMdMTb^S_}|>Hq0xs_$rOg?6Wo|9iDj-FnHi=`)LHlHM7k8|EBOiR;t}5rT?d&s=BnYbVhC6)DrB6 z6SH;QqK>v)qo%5*0P3RZp+>45>Y%XrP!rXXwwC3Pg8NZog{3C0#45?J#0u*Vf)+x( z#!5G+krFZaG+ZHGN)1>wT(3)7moKVs^(^o>h)N=uA6!f{wk&Dsgrmt3)+2^o+0jBx zS&9cGaD|eob4p>tD%h={&HNy-Pjglnh3Kw13;Ex_<}BPmHrc6bT7ybj=H@C`l;I39k8SMle5MJ*F?unX6Yu+pFB7xkmB<)WE3VsPwH^HE(_t?OF)C)4MuoDZ!?WaZIxufiT%kz0^8a!^4qePWjixH;V` z!cJef>(ZZ5Y;UZ{%^zHF*pRH?!MVYx^Z=cm7-p#NBr8_diNuAJMY z&i>KU%jo&2aj(vH_w*9nh&oI1RmdL#_Rvr;cyttfVQiG9T$sjB44y>co^@_N2?lps zkWr_>;7#k`!;efyfSin5umt|Dw>>ZVmy%&e=NSyC!Z zUKKOulvdZ4mekcut*n|}F=JXn>5EYo!!TS;8D{qMQYa!xEHZU9O`S7Wc0xbN^yRCK z#wMd1DITO|dPQ+*T_yB6)Q#-YG zHnjF6)^jA?J;ZpUD~X|s%j=3~&M2#xX4O^~)!+ri((2iHb$M<=`$UVV@bkK2lb!s! z0@oLFkmm`ErP}C_%Bw?;^Zhw?vsPC&wPO10>QZZI!_vB@Wk#P@m;7~F__+XH#^elG z*U{Pn#cfcxW_2_{^HE3Va@-bMV{}VF9ZqA@8k3g-FQIr##cQ~{Wl6Ist!Y5FtSE-B zXtmW-XVjFHR=cfRQaRPYc1EI&Mk6D>GY}dO!iD)*{9*_;+de{un%e5p8PjUZ>ncl2DrQ%zZ%&IhBWtq2>+y@x)9ScY~|Y zn1{?1(gyvv%NwaOw4u3f8N256(vsSmci;|7~wF=ae&T_&1Nqvw%h&FBF%El-~;ah*GVQYG2c>QZlETiVc3 zS8ue!?K3BJGE4D#QI_KM#%R4BX*L6{YR_Y4R+rRR+`Cg@ESCV^VjEZ2=2Ms%xBK7H z2^g;#{~*TjhIUi4>UiC%W_EFLDVpww{Qtl(MofkK4>Pl>bVglC^;EoU&(Vf5QM0)=I8@S!usx+)?Smf1e$y_YX zKcKPIUm^S796%{#J$2UNy7okOSG5ev3;o+uuRV^z?xCi%HqjTlFR90rPCeRMx_lY* zYA)~eR@Qi1xih7=mz;qgD#K=ce6vL7__~Up3Dwoq6jyS3j@N1VF=p3=EoY4s+tSH5 z(tTUxZaXE*%*>VEl!u<$(!OFDv=o+2pNhRM?=^83UW>h5#WGyEa=QUfi8|)KLs@5n zW4tEv&3)rre}8t(PA|{jc#!O!KU}Nj6F<(XTpJcIa9{fz%h)EN*JAYiMn%Z#Qie zU$kc|Usj23!c97=$sI!7+5q|_y-ky*!$s{&yqR%djlxFrtaRn>Z?$c2s&8~v$GXZF zE1Q-sZ(mzkzYN1+X_J=+6~!$q7B|&?V@qc<3ewuL6k0K%N(L)-N4L@3xsM87OcKkM z`77Tyl;an7wZ+uo$tkCfS~N8&sgCh`{pv)o^#%7P0RQz3#!KVMR%mc;Z(6akX<5Ts zi<_0ad~8=ZUj0*MMMv$LB3?7plvGwGO6lHkF)JTJKrO9N{97_L;UhkRx(`@vhG)*0 zhIJBJkV{LZm8vsnH)G~;b&UPB&Fc0RsGg=?RjbRUN>_1O=F#@JXfpNDZ6x?F>6SsO zD;5Y>Q>n(IyJzxNE#FA%cGZG9>9z!zLE}yrbycO+6;)l;YYw!8bd6?h{hJ|DU3 zgnE*=|Fp6R=G+~@Kyu`&5K zmpNTMjq&=hw&U?f0ExRZ=H7uO)Oah$M;`|94-a~%8J}TXy$$64*Wx1lT_D=RPFa5*@c1(f0IWl*8RP8Ec z{5tqQP9V^TUFFUooD@2nmbue{wnUq0rjN2|-hCKN zth(k@S25Qi{5c&PI?vnYnz1Y&+}-)=Z=e2TLgv@Ww=bvFvuCiq+{-rA>kmv^=rkpW-@%$z zQG#2PW+Kr}zzme);zF}@bCme|&<_mE_`L=+B5n>^EK&uo0=Pl-_h^4qi7|$WpQ{Bg z0s(jK{((6#-r|Wne0BUh5F<8S>j&0w_jZ;$2I+fi)W+TwPt>NTbl1PCa!Sv6Ke1C3ln}5itnKekXIMg zb4p9{4^J4!CyW!kO}zRZF4VYr_pVOd-NG@|6}ZcZd!RF`EondZtwyFqW4s;~FN=SB zU5CApRWql!zO~hze2cwedsF8R^bqgP>V7NVUC94k`_;@WtNk~v=dSAeH0l`tR1)tx zrfo_pkfT~}TN7_atyfTuZWcN`9<*wUvDw7GTK7I?dlVLpW#`(uhPAk4v3Nn`EtdFHmV3KnpNi}9{Kb1BGOekzf>(d-E89A2+^Zv&I$k0E z-?=gmZePo_yV1Jod(vW*T zUFg=4y57b@@@Oe z-`U=>WC<>ymg3HUE>rmEg&EtodB(fVQ|wN3=0=)kc_kjNnE1G3chOAhZf+QBfw%Nf zh-YoTY5MP^`0st1{#RViyE*Z+x=owbqWYDMxRcVvRiBqIdVJ(t4lB^G?&BPFOI)UM z!eNvwQr)!bnX{{qu6rA|0hP(Mrp7-c-Az|wOQ2kI-FmuX`#*RpG;Z{g(}ag!X2ENIqv9Jqr@vrGnGaG%jk`oPTcbI zYSZ_2gt@Xx%meP+qu>~u=9ZPOgcTjt?)?CN)QS0WoF+_nP-&qruWxVkT`U*PoQ(%A zEgj|=oA=bioj));HDG)!Gj|)^HebmRQH91Swx-RP9W9O)=1#~R6D`QgFU-%+pAa41 z-h^wuj;6z+$4;%T9NmOV`o_kl#+<^s2|0^!h1k#>ZEsrD(t+ET(SrQ(1&5D6E}FB{ zY|V1&7qv{{qm{*Nuxe;qISH?zbT+NYSz1UhkQcYDD$MC<%W2FX2b<1j+%SmdEXl{& zh{rLDa|)t4GjZaDn@LNSt(-6+nzMNE%4Oz8e@=({(6s}09P560Deej3UQ$l0x#*ab zhex#Lrjc6-?tP8;bu*qecinDOmrgCwZlkI)@uVD2M~aV#4re9RE??f-5na5zJ&G!c zma0mkRqe|gkn-~Oj>G;JY7s9$L#H7QywY$=I+X2=_r1N!msg9@qp=N6?5vd7*~zhU zl49qEV&?^8=LcdJ+9m1Zk4=rGM~l*mTnzVx<%_ga(<8AnL$M9P*jeuYDRy2cc78DS6D3uTG_u{K0Hg2D3(uEy znbw9-?5tqyYzDBVj)P@=6FP@wkAg9&*zFaSh4`FgN@b5gYI5&TU%Q`uV6eY^kbSUy zNN`{PuRG^<3is}vVZTf+jGU-_T|iDu5Ur|x}J9*-o)3)O$dhX;^iomG1o6zgi+>}%e84; z-ryJOF%*|HspPJYeQo$&sTU)v&dP;mZQgM8N3^)T9`8crqGRXQcXqb7ELz!#X#d*- zKZ3@1Q>(ALFDy@3;UC$7g#|!tDcC`P2Ot=~f{^rrQ%I<70Wg!s(Ci zlR-v;#&_-%pdF9i*I7L_|_r5H}+HB z@!jHk3Gqc0-vPe($`v2mp2u-9{9G?elY79~)Gu{q((L*B$wFv@aJ`uSp1+0i=Q(`~ ze>*(^WI1^7M|Qq!TYHed80=YI{xHKUFF%TeW^aR)IbN#A&xAbzgtIyDWB>SEK#R0R z(5vVvQiAUqrrt2e!nWd}$WaB>;kAO2z;s|1-b@lHU|DVU> zcM_gq3SwsH>Oa-^FNyo&%#k>P*s1hOh%kk_NI^5=6IMZfjmLKcyZmH_>32;%*kvZ7 zJ9~EG2;%3KOrP!P9_(3(BWQY>U&dD-d`A#Fmi~}g9b7YdqdhR(;s@hBDlWO{9M?@= z4w>Q0arQ?0oYu|#qHgl9y2*ETlb`J-zuZlJyPLcRGSlap(i`o~d5dxt&faKG{w~@( zSe~+OGJlxJgL4qRM!L@nK$7ViyyGQkc?W^R>|*3J^*b*_ajKSpCWmSWX>0X!S1@6n&r-~so9nVuU6_% zd~t%rzdRBfs~8wK%>AkHz~T7F7VQ!L7V!~s2z9o&_Q^~K?%5>lXGmTnVry^gnGgE= zv&ead`QogUigi1xcymSWmr`>q^LxMmCiv-)J^ul8Nc2XFI&e7mlN{?LM=?L}ilSKo z4B#=cKSG=$n)u+kM)F*-NjyQs=i^Mgr-VDn>-MJM9OE{N*QQ{-&7B6$?f758B5>j&;h@Mg9h!@?7zFu~9rhY!g?B z>~9QrhIp>XcBlPi;*}!%CGBqz`4d&jcZr;9DL*1UAwDZ^6JHV8pXmP`@k8-5agX@5 z$Yq!Qlf|&uTkJ0m6tl$CynRy6vuk?umti$#8Ro%v}O*NCTy8^rU) zi^WaiX7L8m=*>oa_eg$Fd`$ekXg>A{f3He@LwsNSRQy8xTC}lEVSbI?Y_ON)1H?=* zTO27Ci2OVy!^cFUHyiQ{$+N`;VuN^sxI$bbt`m8Ez<7TuUMBMUm$d(-X!K`8=9m6x zZ}dfj4@!Pkd|mul{8~&+a>E@gju4L!j}qsLCx|DBSBkfY4~Wl-uZtgxUyG@jD4E|Z zag10j)`&)LGW;36$>5o?zf`Uj`&{I2=_toUem9)*Lh&N;D)C0~*W%sc{ou6QFFTlCiippX8QFYc8}>&@o+qvnFB7j5 z?-I9(y>XM&)UP;FJVLAx=ZQ_?x#C6Q&%`a_t>SOR$Hm`^e-vL4-x2>Nekpz<+PKVO zJ{>Vr94#89IdHF$+$63R&l7(uJ}3S~{F`Xwf`aMv5vli(a)CHmoG#86o5fY)mEy0& zJH_9LkBGk)Ul#u)z9ars{HK_LjU)5ZPs|eY#VKN?c&ykWQqc;-pCw)@{zAN6{7Bp* z;=;>>OBQ>I{l#ptK#Ykq#CDO&5STtSPmmXhmy1`4zYuQ{?-d^u|3`dU{DZhdd`)~y z{8HpM-I#7qaj1BtI8Ce(PZZaPXN#AM*NfBy%6Q)r|0aGX_Qc+w?qkHG#Cc+~xLQ10 zyj;9qd`#Rf?iOuaNHG2kaj=*#P8DZ~_2LTg9&xKkg;b31b@3zdOOdxN=pGh(i~Yrc z;!rV9oG2EF<>E|nzPMQI6weShir0#_i4Ta+h_8t6iGLTNCe!3QT^t~e5KF|F;;~|j zxLTx+RhFMh3&~%Iw~G&p&xx;zyTmWWAg=WoK0_QSjuVT-D)D&nLec17K=@xtzE!+S zd{TT)+%CQ<{zZIO{8;>#7)0F6U#i$o%n~PxM~O?smEwis)#A# z`DPON{I&SF__X*J@on)d@oTXc9yT$2ACbx_Dd&jA;xzF%v0kKBTl)W%_?DP4z_qUs zPZobG?hZhlrzOpD+1H$uY@CNuDWr zp5)^tH%neYBEKue^Ti9r>%<$yhs3So%i?R|XX4+*6x@4a{AprT%ofLri^VI%JH>a! zgQ9Lc`C@~3g?Oj;%Anp)96_c{vcm|5&L<!<+iFl&8Qd}#p7dMC(ikFC2 zh}Vd>i+76;h>wU*ioX|kh_8xoi0_CWiGLOMhW_?-BnXzouUo;M_$`;(AAlKfZkThZK?gu4@P^KI@+Lhd8^ zK+)Wfg#B>I{1`jSIYBHFj}rOicDf%YHi<3b$>KWE++T$M%O&3^-YPyU{*SmrH1`n^ zZnxww#ea$Bz9HPr{X(!$(9PGu;y`hzc$jGJ7sCG}$t7aBI8&?<=ZnXSO=64KCU%Oa zil>X`iWi9H{vp!eEcph}+((4{os#br9}>5UPm9lqFN?2PQ#Qx#{ahNzl%ooRs zQ^aENC~=0kP;3-W6qk#u#FNC+#k0f<#Es(5#jC_y#NUYbiua3;i%*L$h%bt-iGLAy ziJypn7rzpzu!i;4L(CBSi37x_I9wbhju8(RCyPZQ^)xd6O0ia)E7pk(;tAq1k=k?_ zeyw=ANL50#r%oMmlek5^Uc6PjU3^H~Dn27VFTN)JMf_O&Or+8trf2hhHP}P!DGm~| z#F64?ajIA<9wQzrE)`dZXNu>D)DpyWeF@XI`J0qH{!kG{o+>f36Y9yxF3F9d`G12ZQ4_(4QZZNfB`;N0F%X@ zVusjX93WB$4*ic74;POVskw&kGsJn~abmMb)qN&i?$2=Vtjm5Dd5qE?^)sAAd^|`@ zr-txiX!gUfH~V1F?1RCm+_S~*`{41kMo}E!noIEUC;o zta#g*&B$$D@N?|wN1nKCc=Kg@hviu#CvLN{x9#nl|9U9nr5lPeUUNPP^|0T%p(y;? zL3`~(P>Sz|H`D#KP-wRu`uoc_6z$qc`H-Y97di)zfJ>Av!Ixg&i`Q93{*Cr|9d|$8dPiyT9t-jRY5TpqGRofE zd)vl9+3+&v{m`RFG$UNzr3iPxOZ0!$otL)uL9BzfSCl2amDYT$;s6QG0vi0-0kl_d&VO*|x)!dxy%s zqqVh}`P|VMDU0p;{`=8*&mT7(aO8ZncjmUep|?`6xpwc+*fo1cExcxLUYkA2ZPmRO z9d!Q&v=(~W-8FYt-o2?TR95lewQN1q;@IuZ?(fIX{M_o%W4GO-vUKS-<}BJAc&xvoX)nz#9sFAAZaZ~$>EE|oqdzw}xTWl~UC);G zLVxO!X8KFYH!m?1bNOs(+Fm=&el6O(d)MsJ*LUXLpNC$w_o8P@ckSG}>$>J>vo#EL zz0hCRt`BSUMJDzOceUNS5sw0|Xt}&KRMz9po01QD>GhV>J6n=_zI4b5eeUds`nR^X zJv_Mi+18>x>)W4geE7q*SpR8*o1a7b#e&Z@Zk*Q8{LwD75c=$n#&aRPu`AddYks|T zo~sN66;-X=h_1Iv)=V zBmUU~&Vf)8f07gor5pyApq*TV=`M5}=Io@*3b+St=U6;<2?mn-BEC>>%#%qY7ttY* zaw5I*YB*_1Cv8GW$Kw%Ps0IF$rk-tVQikEiOVCMLjAzwBC*|P~+|R(gn%r+P+(Ta@ zN6CYap^>UwlSj4C_zzrgBtiwvxAu0o>i z&L)^UoHJqF>D+=aD;?e+Smiv2+??!;!~av9CftQO&3P1sTjx9qSIe1$4B1XLpYS*j zBkG`Y9;`#o!&rQhoS7(cvU588r#QcdtK+_D6m=M|JM!}$oQ z^mgXJ+{bwjHPzR72-V)tIR<4rz!{HJ4s>pWYk%jLNaY~s45WUr^K1M+#5n=31Drib zCDZvG;vDEKLi~dqzC{yt4nPcpohqb0#Nm4qSq`sGvYkOF^-yOm{0wuRM?MdA^58n$ z$woYfIc@MW!dVIXk-WGCWnub7ml)`A#PCT;TAz;uvQ! zVkmTmA)jNN$5Ef-oGVbbhdZC3?Bks~;5xxM4e=b|@V$T|otu%$MCTpYPjc=;sL9R> z)ZrB8Qsix`<$M6=|FN8dkmh5SGZzJX+;SEnH&0m361Y8SIpwICr!41K1bEtVPDZTH zTTV|T`UlIo9jU%xIgKdXA1#Lp!?#(^?+{?S<(z{6FIvv)h-HW6Y(z<3vK(IQyo@-} zBClAE4WF-CP7=zx6Dh#UYlsE8eBE+JAnHF^&SA*QpDpJ`1o(^P9D)FESk4%DdDC*J zU-&J{i6YszkqMOR9m}aefOr27dv5|?Rdue7@8KlbCxnndfDonw2{VKM5dl#WNCIJu zNf4~qFoi*xgn)onDGpU@En2U7ouJyPRomiNwGKEBb-=1s)GAg~oN;UvmH+ds{p@}A z31EBg*V}LS{r4|B&wAH-*Sp>|uf6s@>$SY^5Mh_)Wh25{mRE}Wy^Um1nY%5oH>h_l zuO8HUmNy&`-iJ&``M~n7hLn%c)INuz8Mpiu3B|c^$h;L9ZbjGAaAZ9SN6e>R3+ObT z{wSck`}B7K-N9)hnG8OyS zW*%~nq3U~lcRK`PlBR!Kp12VE)c5BjckDCcrj%y;D@yqxQjUG)bF@KDVqg32ub^sd zuW`4<*$7tb8{fYU)f)TOxUF_uQMnk^-mu%E((?E%LhMcZP9zKy*Le?7@-C6FyfGB` zmPjve5XrZV9H%g=eHBhki@hT9rO2gIIJ*5f7R49xF3Zb+#<4F&R&-#AI)xMR-eeK%llSDj8O#IB zpqnh!mz%^4WkGG~2xaQQpKfy#aCfIoE~_F{^bmx~c8l^C~qM z4o}O2^*F5lW99><`>9#S7f~sm^Gy!o=6}hC|DAdID75lNP}_ai(62CNwfO+0NUxGm2ZEcVJwX?=!LalPwJlZ`=F%U!t`oUPA+kL_-_m$9B?kM&xk`fYC$ zBp@knb-QQqfw|+M@E_=Iz77%cyHeUO=|pGF{}am5z5a(_LJsqWt(Y`I%~Dlfkp^4*(#DnEZAw03XxsV@1n74P2eQ;B?jXXM^-uSu^c ze>s{5xDpJR6ne2euvy- zvi@SHP{sp~Gt>MOY@qw-&k;5MLzea9bTZS^!0tZbQ?dN@6!s^-%Dw!vNImIy->m!s z6u0}7AC{Bfm(-vAuslA=TJCc`m7m`oYP-+-oL%zy8HoFWPbKnKpb@%%@!LRA{!C{2 zMW5=GKZzzM=b+*H&`s62=nU{U4FS5xv@k_z#+Rl2&j5SfASMEi2I-Y{C zEccB!ncEWP;Y~W3+fSJKu6GR;%il!mt*;E_K_(yEGd}{E7W*9kGjCy0erM=k;(zQs zYWvQOaCYL}U~EddZ8RuGi54&+_|R=-GQCcdsq*nLpQn~QKV=4wkI`*q&cOe)*s=JZ z8N14AyFT_9hVFdj-40>2WZ?aRJil7g}pi}*z zPFpDOx-^^OUHmd#IlRuKZFL%k2+k(Qm|u1WFqoAOA5&9Z?PoZw?y&6|1a)IA**jR- z-ChTmy~9*Qce@7y?PrV(`}C0UnIz*gWK3L*R$)JD;&i$da$|GU==k-f-$Lg2jjji) zg4b{#EcU9iWR2fum8X` zaP(zcWfbz*yPSS6fX4EzW^)k-sh)4(-)iug)X7(a+dVPkmq@)oQ};~L6lD!yuI+di z{KrsdH>0cCTWwBByzoVhZy56}L>G6lL@;YW;oM5;bS_^cCx*k#&N4)2b<?Y4EX>4=_9Lw!j z4S#73gxRkd|5B6t*VCB&Qoew-cN%{b{X!P~>tPvgM_K)b48zgi{4#u!pgx;O8l84hB`&E38?|;al+SsCjb=L;cOyu@I{rp|t^zrXWye})^7a=! z*&d#Pf6ou#_>zvDaPUo7&*$NIfR4xDNT31qyc>>Ha2yf{7#>5;pN7w&IdC|`yWl_H zb`%anMrx4C3RcFP^obaiiYnpPw@oC#T^8%v1N8BTfws=!Z$S`eVfq@zISqb2e~y1= zgJIZO101L0wogdE5WGDvg5Pf_Y6RQMMQ~in&{64sWhmRp-3aZ;cJnM8 zron_a{ zN?#rb;wuxQ5#Nm%K_Qnf$S_b4UzR`+3+c~ryi7rT()kH+vXGX6XCy;RAr-RYkvfaK z1JmDTqU>(xfz5Qlo8jogP}BWJvHR@=wTb-C^T(_87d7|QatF-Du*b%bLSJ7~z|=gu%Ncm2TtLDYC41Z|_B&(kiUAZmO# z1#!rr-TFQZO=>(8{Ev~}*Z2}6$ttAAe6ZTdpueZx9%y_!!$)x5JQ<ap=g(h@ zu7}?UD#-wTQ{wJT|B}%-qCQUzsOfITAIVQm#+#PNyq^c^BHXr%cnP-1T|AY}^Tmnv6LkeAMMwdDCF`583qcvIw|OO2r)xN_w+6prw(Ja;>V+A@SSe56>_|C7z+x46u}X9 zbbmzV41DQHG7QjI%=mMMkacFYSJtSaLIZo(^~v;r-T_~tKA01S^LzGVFuoi%U9blu%A9@ zB$=AO8A9%$phwf+g&@D?Z-<9p^PJKdd^cJCnBEm1cA6=@j8l3L5KQT>`(pXru^s#` zG0ubOWsLJMOXGQXTxv>#4|F?0?IO$b=}lz$1^mk9MgrWev7Sw!`AZ`eGH0U?80Urb ziy6lhGCll4X5Yz2mnmYm`D^+cWC;g&1|)D}fPWDIW`O69mrO;DVj3eE&mZ8Khhk8s z174jT!=T{jffJ9(!{|+j;g55*_7Dwr@WO|VW%zGb#K7qv88ijL%kdcC4=WWhEZ#YUAdQ9vthO(`5Ti(?99ym;U?;CLW zb)L&*5bL}T91=7fjxyYKeawYgM$jnovGGiU!w4D?aQTAf27>qlDa2>*tAc|=hdm|M zpV}n+DWcxQ4+CE@PbUeZ#W^OjHP(Iy6O?^^EF6EkK@6W0HiYGLzIm3v0ulV-@fR@; z>Gx8=SbGtM6Z?*2bQTh$-xo%|!$fb@Hi&+gi9QgtHSQ!d)cAWDPl4IC<2S*pf}btf zJJPsmW2fPtWmVd@g4uZw9|*+IXse1*h*ier?*v?9cqYNu*#{o3zFP8B+I>--PB%Q} zj}3$AvNA6-vCYR#*$8HDGqI8E&yX4CaCov&`<~yj7nOCT@h4kPfwrO z>S&YUB8Fgd;p~kzs`fv|W|8WB&PJRYn0Y?;l>4*-H)g?TL@XJMKm=pAc1XJ}sG0$g zV1*I}rYf1D%%G&M4kQ#Gi1i|0@4?B8Q~Q!gOprsud}b=2LrYC=hEZ9jiCjXpQbjWr zen>0ilV6_?CoiQQN(ZwrA`;CM&PYE`ERs=?{Dbu{lWjcMj`j4 zYCaQisBIfr4 z)&qHC2;*uRZjZ<*t!16@c@=d=Ad6pTbmjN~1jb9POtd;lE(yy8UM5Ag04`BdBawm4 z3oU>^8GZ|Z!(0yje=h^Mn5iIheDs7nLI2=l0YL=<%f?rMt}@&RAlzY`(+T(D_Ic=f z$OP07&V_8-noi&|tj`lZ&05pJ5?)nsAyddv?XbdiuFH`CP(H+uqrnMf@M za9h5}+Nj9dh{)Qg$XX-PtYxiQ0>2@GbV49K*(oS}1a8}^Bb;TNGYNt2bta()d>+D| zeI7!PjXIO&5|hwO0{2Rojk?WrnN5L|qYl+l&kwg39qW9^OJ06UKA$US6CL5KYjd#` z`aNLi=AdR#mr2&4VKb!Pxwvg>#sz@2M#C9No%ofLxya~e{-_}HREdSK9k*>AMPPpE zP4shnRFGSGC*>XmW^+;Qzq@>y=KoxaNlO2hHF1h8!~H+dAt|~Bw_}xTCi-<;&&I$G z&*8N$vDWHo8abOZ8Hs0iH)5J=C;soo9rdF^ zOK~IL>jA!Q^fcE3{67x2W34ktPPk7sf%vxpcZ(<&!Rt!gIL$E;rW|-;{6dhql3rnI zS0Uhf+=yBhMh!e8QIlR_)UAld!i-@Qx5K!BZzOKgD~uZywS%H&Deu4ycbLhbqA1(h zyc3};XrBUMu7C$A?SuyzB8etLYm%X1`gw z5$=@c6L|V_o}XG|8#}2&u+^N>f&$Of*nw|EMeZ+CYnD~A5hZ>3Ml(n}@Qp-g5GROW zF~A)dxcdfCh8;!G`aJuhHU^nyG>H4`JKrkCURy|zdbp%|P zZV8maXh&|Q>l{CTz-WE|i16}b)<$F2nwb6!R!i{HJ~Bv~LQ*I51eh?H6C(4@SmQgB zz?s3tOt_hjK*KtdjxW5902%n3N${j>-DbMj=n+5&a#0sn3?n9Rb223QwU9cqD?Ann zXT^nA0xrb&h>GvQ8D88VbF878iBt#`NAOvbGk*dR@=Wki{S}N!JdncBe}C~X)&J#6 zP73+2wlT*1mo@cb2xAN4d`6sz+qRA-tiw4U&(?#Hmc8)M}U4sAnGX}nPay&|U zg>hMkx8a7kI{?r5&X)i?eP^=N!Z-|h-w(xqb8%;dg&Lhv=vQcpK8#6T$J{?MSn9iT zh{NSiha%PWMWrHnE(UNh?XM`#7EC^+!1+{)glYLg2;B@Bof_eR z3Doa9#C+VX@o7cbq@tc#sGAJ~Hq(m{^D%eS6vomEi!QXieFYH?1cp~ST&M*CYr-%3 zFcc1kWLhgAr`Lt{kO7+m&enl=-#dsh9}cz%KOe?nN|&wzpEOlSrze^j;l<}jUL5Or zvDNTmZg@qT51T1UWVgU+&gjq4fof$zrh_`oJezUv-9wwBDe;^U5uN{KIV5e?zy;wiwnLo+*5Ja zMEoxW!{xZQ;JyZT^a}FxuPo=+P~VPqB;I{E_TKE)cr#*t83~PS8G@TX2X?I&EMD8V zYH;#UZ)@DB!P8eYu3RwZt8Da3` z#jroL5=jh(tt1eG7cZM<%^Njqe&d>1RBX`V`Hh20i%W}#4jNtx8|$+g=Pg;hVpZd; zIV+bAS~zdspwf}Xxor8e#z8bkGYbNite)REYw4VMi)bq4Um@(@UmD}4)K%9Fu3okP zSy;Y|g;RQHNl620gk@Fj=kedARs||z@c71MjkL=K>y!WPrV$i|so0d?2G7ITXRTd2 zuK~XoE?&feEAqqPMM2=|Rf`qcFu!rZoYhO38k%5-cNJowU%)UGe$5AW44*>yqld>K5@k6`(#v0>iQQc!p)hnHz)pmcZQCB>i~V`Gkc*QulND(rD90rwwH zEsnYFFXF{;f4C-L-1Pr&O>qmJzZjnD4bNZV3CBSv4PB!r88@n8~1z0ebG8*ZI5wpS~uF^z#7!q8?HU9 zU$1`C2D;b8M_=M*CN6}~Ih3$zEhS&#narO^Wqo%u+^&0e`bPMCZWp_G33o}cyKHm? z;(U7|Gjh6@I0VEQChvPqIhgi%WWq6&M9Pj z@kdPddZ)O5QGa*QXtzgkZ})`JZYyT?5hN94e}1uBJ{nY?Vh6TR!n{4?*@Z*E`sm55 zgj?K1Z_A0<>52413>JszZd}J4qs4*mZg=89cOP^QJZ^Cr_|(bN_C|MNN)qSCZMVJc zu1L5!3I5M5F6>e^ve2<3YTOZrVX?NOaRPyD&xc7|V@-}0BU_r{3r!ExV&c%i0w^u- z9mtY0jK4K4pSOI;ggMLRV}?4Y#m2^Yjf>YbPAwldDPri*x4$f_fPM-xx)|CYR3PmK zhUS!M5I$m@kr5llO@I;WdKk-{UQ^#N6-HYdYNi>Fq#g3Pftk$dw2~LG92hl#9JN2# zlxlN)4d!;3`wOl34yE;K7#Us{81t1*NqdMhYrS5KQ7DZPf4W+bC#`)ca&qd%s90O56$%a5u=60rAITY2R4$~qXjl>tfq zNc$kMOlniA>l^AORKvb+L?vS&RrVxnrqxwfg%;&ktXkOs`>Rc>WtmsDab>`9T=~?J zhT);P*`#sWh zuhc@?A0+F3CBVEn40WOog4(HQnObe*ibl@&Fu1!i#TIE`7RF?uVkW9)O5@VyE7wh# zvkXmmygqV+J{3j3@K5A{Ve2u+NdW)M=w;HY}XyydIW##D_%qy1QUjnsGrtOh1o zRY%5>#bmx9rU#Jdk$AUJn`)`cBo7ISW%#sGn(?arLUor7N1&MO&eXW%yOX z;h;&Q&c8=_H#je($*XcCBKG*c^>GG`Tx^6uAt52A1RWDNaN(JO+k84Ss4Ga4Ks6@i+w z#!W#JUOMNvg|G{yQsWXVP;+p8cMa9 z0LN7lBQqI`E$sW_YbvIchhx~}%8L5BkYbIL1Oqje0mcSv?bzv6I4{6oPWVHqc_1pU zscAT>vbK&>N0V>ZnxoAK5RulCQuBDkGP7nRT-l)MF4)FK>#FkYceCEPe5g$w6r#N} zIq600D2M9%4d)Pl1|l(}K@)VOzxe$zn8&OYbDHKYvNYMN&4nY*egk!|st8m)NG}do z7%0c8%Fr@+SRrOek)C6Z<^c~V`Q-5Ir;ou@EgYp(k+KHD1YT7=9;F`1SF~}AEuW6z zoTJG2%BhubOskDHjz}zy`!i~*>no$8{31$S1GKDve^^w3B_F&STA0gTwRn9apSP{C z82!!DH-~Slsd4EF*vFmUxK@LUh5=33Ty*$Dg-U>80;BN%%&@Ojr-el=2J917<1t~r zwG=y5E2H_u1Ra@|A}zFfl|LPrxxjB#$tf7icWD)gaiAJu*~0uhJ6~viylJgz!X`gv z%u@++(yy-eyIMr-5`XE3@@Sa0vLUrbBDEN;dp?;2lSj(B4!Pxg>gQOaXmY}iBw9Ot zD*L8oh6444aL}$BhpDD^EdTpMM=(y0nq~G3X9atPv%)>YS>c}Htb^?t&RTGy39Fhh z>wEVMXF>aA*i)QumVjoJ6H$B#LRU5gUAt!a5^Pj1#K*0J$JW&hKHyg8;AG1!o@X)? zuJ~E)B@ODNkwnVp!rFDP*lb+6a{0*U^Voq}Q_2X6 zo~y^f@PVzw3T4kVCljJS=lTSsP_*vZgLyhH>P0Dpwso74Qi~J&AKnvK6YxR{BrZ4NI5LM}LO_ zZ0tTa`IJ8%h%cfLnsxb#6-Nb+w2)eY_Bp+3h&6ZR!r)=*Abq90c5F3@$~+29o>o_n z@q*dW$mB1jIl1W}K&59M0^~M*SUHL$5{#f`ub> zVPmJ)9UTY=N3A(4vHgw>U~C#h8VOp)u%Rd&*36I~t*CnDv6W*vOD32ylT-L`&Ea$T zI2q;?M(wnz;~VNLsv5>|yQFH`^r;n`P&s~~0q`j;p!_MPf+pFgEMK;` z37yxJz29#mEwduIV=|A6PQNXf>_&2^kx~=!{y7|`=O%`PB^1ep-%QM?Wz`)uZqAY= zzB&;W_0Mogq9#<&-b1lNgC$Nxt?E_&63Tz5GRtf=SL9{cvc@IJ3YLG>xXQ3~)>TZI zf{`!ik=j?20z-rDizlH-`396KVJHO^0%O5RWJy6PWPHjMC} zeOE2QxSvRQQm4RSL4o+s)>gfl8Yf_iiY#{yqJE2IVl)%0mhjEo0lKM~ev*SQHr%F^ zW815?!JqszF$Hs<-$GQ$lj^wAuB@LBR&H%&U1jZ2l@&v*>ZvuD)79rz9$u&TX7O zAMFOa#`7?cE?>E-U!t^lWbv@X(2^mgLxv0)ndrN+aY-ZImi9{=gD8U=6=hIq!^lB+ z@wsf?qQuI^HH*0un;1G|#Lz=W9E+b>;nmVUT=?zJ$=UerdxGzpbnzAOxa?Tj>2`Hy z*+XU7R#mHU1infSF1|jVl(XJnL}nO^pjw6e2eWoNr(=TM?~1Ai7m7N_cJI5{isfmFT0)hxYzMe17&M7-RR(6J4b|yKF&MbSn?2)pE zO;*eCgP*8={4^j+^Yemo7SJ5N2)1m>P8)|F+qibnlu|3bb;gvqlbPN&mS?xe>w|o| zlU-nUcDp$}aV*NJbxWJ(%mp^B^l?$(Li8r9*eryL=VHDrMx7SZvpCW$zi*MgA9Lz* zWxrsvi?p9_>e79`;N)J}0rd+oIZaI~7tdYY1hN0@h2NR-4YT>ehH*;yFLL>x(O6aw_>m9qn$6Xck72y} z;AS8EM|}LWrDeMOJSn*F9@|`O|NN;?aA7%ZKEWx32YGliJq$T1@|J*(jvIlzlUwke z1v)zJ1bi2?;N#~mOeeSkKK?>CnvY+Bj`rt(Z+i>At)PQXjo>u-AU=sZnqRCa&G^Oq zax9}f>hTfoXu2CvQNbrm2nyxB2X|E7<&akfKgy$?fxHX|i^}7#jX9PDSCEgsE%-bH zBmyR2z&E}HUta`pYzwY{uMvFA50Wz%ZHEM5^a$MRCC}%=hqVZ}F;c+@HW$A*kLLGP ze6}x`n(Y=lN$`P##W`2<6??Lf)?_FAx%u$IsrQ`aJ}B3A7o? z!;u4_yeC`8YdsR5l;N|H;0i=P)a$OPM_D zlo;?$Jqjl$B-u2K>*i3x$7z~c^4fu!=Z_AtQpOJ-TWBM`EWj~;9QF)ilvn<+k z3a*GV@G=Vaac3=DaQHI~boSt1VKzPx09ka#?>V8?8ktTZ-SeelD6H zeU6LnmqebagWa}+e6x_cT!)yq}2R zQ8)ED778k0eg(fMI9Rln?_ygnZA{wLPm`uRVE%pC0h z&V$$+b)ShL>~vy@f5If~!AwQG%%T2oP%?-4KmH}(&GO$)!~%IY5#b5N=cm^6=cwtR z!ErRgVYg;fAhNd;*{hu%I7oxo6KCGYf0PhYsNtI|tP^5NGX7Zd7(7mRqL6D}%0FAU zNqDi4Yg~q3D`b91-y?iNxI_51@B`te!e-%jLi1}X$jLe-XYa{F`vM@FU^p!mov#))_xtXzVtEZYw%p$n(a@S0wB& zED;VDjuws;P7qEN)(d|ioGn}+Tq0a4Tq`_9c)IW$p|SS}y)F^GS$K``x58V6e-u6- zoJhp!bPxg~^HKkt^&d>?*`D@Fu*!@KE95 z!f`?xwxFD8!s)_egmZ-_3QrUMTzIXJ#$G7rap4QX4~1U~y)>V%qp-Ko*hNJAxuQ=H zZV>)lXzUb%?@7_G2;UQaCG;@hQlE~(-ogrDosdV#lJ7L(FN9YMZxKEyd`|eL@H63X z%mtJ)Ryb8yFZ_XUwvZNA$iGCmQn*gIL1^spf$u!g{~^3wc(w2b;Vr^H3Lg?~7aF^K zkoQ;7yM?qxLw#uDjF>CzD(ojbR9Gpj7d8lw6Rr`SEZitOOUUzInU1lS2izk1Mj?-d zW%wP!`-D#jjeR_X?-Ko~kPlgmmn}5*?m+W!SNe|-Rtf8cbA>B}rwGp#UMjp*c%Sf3 z!X3hQgkK08QMgL@W8oFTtAxK5-YI-k_<}GEd(TWiN7z$X zDy$OD6Rs9+6kaI&rSSJco-0bZj|u-G{F^Wb3mt}c6ZRL56CNo%R=7rZx^R>53gHdH zJA{u2pA)_z{78r&Cz|wI3%d&k32D!X`c(>Rh4X~VgzJQ72rm|1N5oijqi`z`k6QN% z9~EvF?jVByuf!gf^`ZRt3S)SvWH^sdVt76g@_Gn)NGiieDSU$bj}-nu;XhRPI{EWV zRmMA0{+G-DD*4lb4$I+>MD(Higbxyt{!B7ZC$XqHsg9v#v??C?xgjdM_1|rhENBFq#1>qaQ4~1U|)9|pz zc(j>Aq_q*^0O4>VZl1(RJc0;4CJ@0_D|&|LIieScULl(HxX6F1=+i}?C;AtnuMmBe z=o>}fM#O!m@FDp>CH#xVK|C&Dj@xW5*MV}-*Rrqs-|EFjkoXPmVmH+L+`{e(i@M-zKDEyoJ-xhu;|9wKQtuHrA z*pUc*6T$)VA1oXrf7%Ko-;wgCDJAMRTmFlMv|K{}wZfmt{{qolguf!9yv!k;kb95# z9+3Zb@jWm4b%nn#|Br?HmT-x}*N9#(JV*Y&5MD0-Ey5e* zf2;65`9COpPX4b7-;)2k!q4UZtbA=0pG!4ag>x5?t&k>saR6K9|iZsydrvkT%Hv6fd?-uv5+RAsBgJ&f^f3%DB%x;bA*k;<-%3M^+K9frCi#WBAWeB zpxF-vZkE5XsR;VFqWSF#`R@=uAbdpll<-;MOTt%$G-Ad0p9;Scek+V|{}SQ+_J!D1 z*gqMJ8bZ}xS8Hu^g0G+}FDt}tJSqv{PG z&W$(NSBR6^4LwYV1JVsWMo4R5luvWT#G{4B3g-(K30Df&2!AB}vG6P*O-EDSMZ!yk zzZCvj_VDkko&smw}ob(8ve8d&2*cE`-Cp{li{B!%oZkuMZy8X z!NQTk!-Zy_8*(Oyt`#07JXSbIxJn2+R3`mXgd2rt3x6iOSa_N6D&aN4-wJOM{!w_J zkOteB&p!)a7Mf$9;QyBBcZGi!?iIS+uLd8@C=>I9`9fL-rhk9op~Az2{M%svt!X-kpzYqTtMV}-*LwL53CfpeRav@D(k-k<)6K3u?4Xd|5`q(L^){e?8JM*46e4Y84~71Hh+=|w`?Q6qhlkoML{pD(;x zc&(7e#`t`5m+%4MBSP98WBAL$H-v8qKNfx_{8~s0y^LqxLjdD^KL9lEBY=6Ly9v$v z3HbLDJxEA9XN*@S94|BmZ{R;&H0^beZ?@MsrH1Amu zk0v)5zf3qmNV~`MpCz0vq!C#9FA<(B+#ozlc&_kr;TGX_!W)IR2x+;Ba%m@y_$MLF zypjHkkapupzbo7${9L$KNE2J+^Z4EbNE3@hnAR~^AfyFf`u7qJ6qX3h`yYfKA=0LAXG8oUlnqo3Z3ORd|~49N~FFTEQdVuY@-Ue=odKc#rTQ;bTG?&tv@8 zgl`Go748v!E;R3zz`sv)9M2kz-&&X_H1C<zgyuaI z{6UMjp&c&+dT;myL^h335#?ow^ zInw=w=Dina^WFcr-A__-6|@2`?00CfqFijqtZZ z+MQ$kZNf)|e-hI29K&A|?h$@2+$-ECq#-);w-?eL9q9o=8lWS6gwVYI0&U)Z0cn4Z z;R}Q`Lr2=Y2LsZw9O?6f=KUA;&3;K5c%AS@Aq~mV{{i6>Li0Wh{%?qWOGry{+)ryG z>>w-<(y|=GON3>@3L%!!mebWV3$ssS_P?+eOVA&4c3&dK+7crA2DaYJ`k{=7_Ar5n z{M8Vl-%KLX4F|Dx=dIhH0dL}UbN8z z^eoY{h4Y0gh&ldIy2Q1jPZpjfJXg3$c%kqT;pM{Xgf|Me3U3u|6Fww-O!%a5yYPA8 zPT?-$Zs7;QW+KY}8==|918w&4fH~anLjLoF`9u%pEldzmzePgx-DMWan>4V5i263) zU$Wjwqnt(y%ZNy)LO6klc3}1c*&axvJ=6#rB|$ zx&!7iz{&VMS+_CTm?rwf(&{h;$4(`G`I*KiV-^N)*Gsz$?a=iy&PDXtW<3AJ+8=@N z7?)(R9y93V*ATIRi|PCWI!0{JNxp!e;preP_B@Dm8_L9ynG8E^3^zl)5-4zj$M0lT zdY{9+%H!T_lXnr~toF*G*&6R{XmgS`8vjrBn$UVr@$!+0H+-_ZTaaS52Md{28?P_k#^!kWNHN!&37)pz z4#aKe@vGlFk88O09%sT19=}KE=)H@Q$oDQqDxEwV5(+$;s_yK~Lr?DFWg~lCy)U6> zH}7PGcK3EbPQsfE2|YZ1dEL`1K`MnFzcwxMCL`Cqyqm$(+v^3MKHdy8fW97|9s7CQ zN$v0Lg8l>Y`E80;;D{v}>l=sCozh7Lo$FCb@_cN$VD^(I2k zL%d%>+Hh|M%Jxu?tE&;-69^sYJpehQybj3kVcs`LWwiGV{15k@N30{fE8#!JdlI^B zv%E17dcWm0BYzKA-a=&XLCY(JHV;`IKj?Yb@+uMc5zFJ}(~nx-M5Os7DhP=_WqDU2 z)u%0wC*nV2dCw#IcFX$;Mft4dZ9{}VTi!6F@SNqHgq%EYd9NZXFIe7G)cap7?{CQJ ziU$(sV5dDhf?L|VbTHX#s_^ah*LiB5v$CmlJ<$Vmzc7hYh zzF~PkMZW%Kd7YvBo0c~PwYtmlzC{XeS>8Cn+m^Qmp1UpY5K!-0-bPUGq46NX`^XWb zd|-L^LCQyHYMqg#v|ISjD$ap7le_w@=z1ECtViLnefqV4c72-L_a;2%)87SjnonmV zITP;qbhm)+?$gBq-N9;|j)IA$ui=-`-d1FG!-km0&wp(z_7gz*dNQ}hdq~U9c&uw_tUB-9jB}<`|Gi^#Ocx|7I<-Uw2l;PN9bPB!P-%yfko1N>zoZP9< zDkIIl6B;{(iJa=GRz|w0qFlbt$nflTCTicD8XOgu5x2V0`O)qnI-a zY!*36!)iN=YIe5Af~)m>$hDn&ZiU-h1qRFe6oPHf?0S07U<7f!h4>${Vk=N9&O_XG zZ|$NOZ0GSkjMdRJHGVy8d*krm@s7rS*ISPNG4BlgPqSjR)a+SqwYTQ)Pi&`|+u>d> zc%XBl1I9e=`*dkWW>3?*z-Y(!g)#4s&^pa? z@IT#ZYkta5Z!-xTUN2eeN-+9mf$lGdCU0(s4!3%FQAf6FED# z4Z4<-CUSmG6*{<+?)V*ik?EyQhGX`o3zy_hK-+LUryCny;RZVgr$Aax+;D?-a?M_E zrs&h1+>g+5oK~XGa&pgSkz|QJ*U8Oeb8T%BcMCT;xwMDwWGnnaC-)cZN^L}6;^dld z@pHs~xs&^2v|=Y$^cKeq8%|rN(CGIoheM9j&S9T{dicRHyM1OSka12Uan22yw2U6- ztYFBtYuVWH95%x2Tx8etzF7#40zM9T-6KmCqeF%~9GfqKhHaC|B#y9^2aSP_6g5tlV z6Jtz4KAEofe+&>SI1BOPH~5rSu#41Qh|`j;EB{eJWA#J~{93e{4`x@I0xze5zN$Q|Q|9dpJrsg}n>-0b%@JpXyW4 z57~=vGcV^0`xb0M$;I#YseV|va`~Fca*XkF{`dpeG1H6D8V1H6T?U_mne={~PGPgUq2Qs!W!AT8uw=$h?3>`By`8i$3;aYWogXW1TDT&%t`yh4p!>i}`^-C(pRe z$0eOS?vY!WOgED=5mz#nbH8J|{1Jp7;eN+NxX=$V{?Bm4xZjy!B6BXvWIj6=q9U9M z7ltju$Q6FdCUS)lYISZz1ZOeWt`FH3N7xpN?Jx`#-VwI#J{+)tqAK_R8s%d*p&wvv z#DBQ#&M3idxUF-c+&5tBZr9o+-R&doL%Q2FP7_$WkdMJ(P$`1aviL9zsr-)BULQ&w zNbXfpsdXR_)roIEs91$X<@T`o0g=tGn((ZJdnN^ELXDpMB??vMW#7d8>q4&W?81@E zW)Xj&f`Pis>P1FsUqr^6Uk?~9!)QksXMvGSM)_MEw1mPnMiyUI__A0z3@)Xt+j^1Z z3d6#&*k_>>29GAo?Gpkic2TMn23L^f58T=|QtYBoN>5fVgSj7L-+3KaitbPnz4_am zAj~VX3;7NwR`d;gjRt;A-i0!H7|~GLY3OBin2PMi65N5ncT8Yy5U8qNjjCP%4x22f zuViqvTKc@pTAAA!JU&Av7j%6Jp@O|A>DzZ1(#U)-V+{CgJAM=7_B$HoZ~yvDa{5vG zt>d`9jAL5hGlU9kVE+t!`1-`YoIO-N{p|-KJN+r!z8=B{n1Ae21NcJ^EA#i%EH<3I zi_6P_b}uC2b;T~w^JHgF7(kbm$(fy|yj%elLG1Qe4>c%=)ZuY2FhqbCk&rWLt7CP{qdmrQ?BWAa1 z#XuW=USDu_flBd1Eb?UbHqgqptJ^U=s|V=8(6cqHrDP}LWw%Qq+qA~|)lYB)M!6i3 zY1QpWVq?LmBeJcu1BqpMC`c zGhvL9K{=4@Tnwej)F&%pa*r>Wk`lWrv{j$1T)VAZmVWWrEUMJ)?2R_ceuycL?&oa8 z(Ri8XkA=8|AMhVzvxb1JN3lI7%TKL^fSz3uxz?VZKC{))CfUL?Ye>5;C{%nw1qZ6J z7g?BUz|uPs2djZTrC~<61KL+4N^nfpXw+%HWcZjYa`caCGuq?>Pctm=fnf-W!4E;> zLQ68YZ;FvUA0`()VnY6a@cQra&V>Y;awKv@g*%iv(9k5&X>=u8AmaoVnmJ#HS(uko zP7LGdG!=IZ?poZ@D%MUBr$Y#vRNK?8}z>xn=iQc=#YEhRHJU z`}zQWH`;bjH>=ofqCKq(W3-{wd=lMf#S-pm_9nO2ME979{J$0EzifBQ2{RG6Gdp42 ziNlcu&6V-snBZ8}y2hsJWh+)U)h%DWa-M$>^Z1(TY5q~tI3~BHS*^;-n%Zeof|Ip* zcIts`Yxzgo*G=J3-pO-i4sI!HF_j38h7Av&rKUz5Y@gLkhs~z?+RCZp>uF@l9Q#~1 z4JMo_E5;iuCI8EowZdc7BX(9y>O5W>$2|YjmbVV5a_T|YJ{1;qgECk%y>3E7&GgBW zlP6H~g^G?c)*-e3CCgmN!r#x(R#>_`HylUevV@s-L&dZiQ>~~Ou80sdfWNpt?-y@9sXNC4m(rkFnFDg zu49GG5yJ;ExFrGMsm%MUy=wlPh82r(j`?yJ*i5xXlsuaJKqj?thPZDd?Z064D(GX= zYG{Q6MdA0VX!lDd+Ojm&AP{$ILq%;lwqQcLSE=>3A7cZo!wfMN?1D3r|K*mjQZ-0z z*?u!Xn=MbCBOaVBJv8Xy;h=F4Ggzq!v}jrNwbeX+y3*t^IIUS-L`}y(?OUxZVihY@ zu8I!jHMB)rPKFFSXh^BfzE_eMEa!zbwpt#T&U6pl92%-CCRZ903g{(Kwq(q3P+x$>yW$+RfI6U23DJCwv}-bs^NQ4?DxXDM+fRF9vKQih@Nj8t2Sf%&AQovr;x ziil|qH7&I!4IQaQgNzNXaQxCZonn6`%q=Gq({e(qagoGZnC_^?dFAy7DX7WQW*9M{ zaTasbzZ#<%WL1W2cVSxS7?>x6tkAeY*i^;-|E@(X<~_8+6zyuM19Zc5*s3&z&WfQ$ zPR@1z3Nu=fiVoIMzDb5)K0<4*HRJsE8r9m*W>#{jIFMniu;rP2_^sh!X0n1Y${%qn zW|p+*PFx~X%p7t+Uw;g3DZw8nQ0mmTMlC33=rl`<3PAToKaam zDQMbZotu&6pSQe4;c5cDAr1^qT8RXoat`JlO+ zQdvEIUMOY=uLf!h9Ob6~zn7+boRLw8Eu1 z*H;HwFQo7ci#+%=1ZK6AbU0}LA7@dE4KFk|#BO^aGgunEg4sAQEVEy$vHmYLkrk|0 zOQTgNV?5t)EGuj};fV1+Vk#?4Cg^)BqqegmhOrNBMa$TslCi8%T+3lJc+Q?sUR&c2 z6CrD~ZzP{m{LazB_*QcGK2Tp8VrdBqV-1bV7B($P4qMSQQuagDxPqJ=WO8m{naYaT)MELoqMpjZ(eMY_tS(#XoOGE7eNXeo|8h(}V0kq%vVEf-BMg zlG&{=N6L(O{D!SOGaeWdrG5*>0zm7tgPPsiZ{BZ68ol(_6TyJ{zty~!g?Du+_O-fj z_gz;4SPmOmr#rAdHR%cC`*5Ay`;`Pa3I@ zBPNZ5Dx@u&gGk2tj?E0lpv(WlTcgF+t^k4#F;O!FNp_>{T#=u7K|sa75G1srG;0#&q%F zW0>wWE#&n_Ap1ga1@f+HA#V%hCBQ^^_~~0H@6HzTegJtj2oJ76-fb=9ZG*fOV4^(y zbS{)f8%aSN%D5i#mb!HLR}l7S3wb3I{qN8yj~_V(<@}=L1$pFIglFPAz~G`h-hXSs zcg5fX+o$?id_nvi2tH81d>?$#`j`Oyr~~!G5qP0~JhKehV^NsvTreFP5I_W*i%l(3 z4Az6-%Q`@NA%Dc%x?}|UB_bBVzaMUvOAc=87L|A1VU|@EB!;kv6IAkw`u{8JQ{h9S z$Q83#HB2LcoA#-O0lVP#FKVB>Xs;?Ye!8)1m5iU>B7QK-_%dj(DmA`m_!osqL`MRa zSEdOMgFy#h4sooqK}RqAUa18?N52bA|ylBrV zm7gPB@}j+})bPjv2DX2Py(*^9_UB*h3CZi9u~&6rlHJJpHE7m1`ylO4-Q6Pm$rkj> zqFH{qsGko+4>WXZ{MOR<@aZ=Ayws=J5?a`Y3Lb7#jYRFgh=pmW?|bUlKdi-~^Z*R0 zE6VWkDA-}!KSuZs1cQS2L}5Jhwq?Ia2hciL?C!@KEJqIzkoww)JtPwY5x*Gh20S1= z!2gYZCMsbG_#6xXT>m&|IBSWRfaWqj!Z{*17^_)7PBH!wF*X|i{_;n+%c4KND(48m zGe`|x#5x5H@5Z3Lhh!EUXjG6gCQv6P_q!`=tD{g`0#I3ojR5 zE4*2FkMIfM4&mFv4}_lzn}xdn%kigd@K>6BKBE z+YTHh|1x2f(3}N;aATVZI8*+{HWTRiqK^}<5E|P|2tQdgzLquVo+UK4nGk-V=u3rL zgj~l^PkwbzG`5+5cZfE&nLs}zn!k-B-*%y~%>?>Y(VYJozFTN)GlBkG^w&a8uH;J> zatY%>9kZ6=_x%>*=OjRK8rCZMs+1e~Dw#x@gZW19(RY%>98D|~@) ziO`%uitx3fjcq2-#x@hs*k%G6+e|?IN}GBc+f2Y~M4O+DfHt<7fW|fx(AZ`InzKoP z#x@hs*k%G6+e|=Xn+a&Xj|CdrOh99s320-{!E}vnCZMs+1T?mpfW|fx(AZ`I8rw`j zW19(RY%>ANB*)lh0zFl=w&{)1zFJ`NL(6HXKw+e$^)MiISGxKy}GxK4Pg@C@Nkh35+|5pEX#T6lx-CgC51 z_X-~tJ}G=o__FW~;cg+%Ibi+pC(6W(G#||wpP<``?j-Ck>?Is1JXAPaxLkOO@G{|@ z!pDR!3cnB@iUFH?j1$%f8-&Y*<_t^log?}p;pIYeW+lR}6a70Of3rpT+k{UF%~_T3 ze@V1Cs}l4s(eDXA5q=}|Fvn0{w$Pka3A#XZLfA)GDjX#&6IKZ)3u}cuX@T+^giXQ? z!gGbc65b_zMEGandqQ*eB;=)G0;SwMp*d?3^ia{}EJ@JjEJ@&xcl;e*0wg|7=g6z&z8GZ7K5Bi1C0-%B`5 zST39S|$3(XG< z5nd~Lw$Pjz2>&08HfIHb=1=h{?;7E)!d=3Th2IL}c;q2}LRc&`XZFFrO7yY9!5Ww<$u z4!A;e6A|*y6>ZL*1N|G(cM-9kenj+(M69cKi~f>`^>r)wF+b+aIJkR=9z;a=P|=k_ zV(3t^;UX;JkWu> zdW8r1#|yqyjYAhMU(zsl)r#WfgTphch6blqrJh-J=*SVn5QOU=pIO!XEE2=i!aU)( zXejHWtwHbZDbJhGzPkOy4wKRsWi9%1v$f&5W*n7#QtOj)PWnZ2*3RLJiWa@pY~{S# zY$eJ*wcEL0XZ+p$I_(ShYip1Db@peEG;dk;Q1h0$`WHXcF*oTKep~ONksm6 zx3!*Bu&C2XIg5BARjY_Q9&u;Lea~($IIAimgU)}I9Li$eD;LL(uR8wMU#wqs%NOgH zTc4h{p|E@U0PE9pHcb0`{VI2F?6a%C*t6=&vDT+Q-mtxS;I^^HJ$n3ui>s@*Hz#(^ ztypW>d!0{j-uuO;?q0{eva({*iXEL7Sp$}DA3Lej$pwq1eZFDXPs{3NmrZ!RdCvys z{D=w3|6@PRIdQb1?|_7iy|KUdtNO# zG$Z}}GtOAlZJOBp(L3uqezYl*eEC;D z_pVh)ms8cMs^c%8eb=%{@t*ei*DLL+c2%8B%ns&%`^f*iNme3%HtW?+nA+`GFgw%a z&n{%{e*TVi-|s)OHeC9jyms)B+}dz@ad{aJ==`1w=b=rC;k2}Z**};~JrY&nX=$eY zpnj&Ewl!8|pKtZZG$ms9*Z_Y2d^D%WX`$Qgu`zTnIP0y&?WV19TqA+^xv%&;7P+vpnwG-#y~CG{YaO>T57DZrjZx z?y>G8H}xMr>CnlY78RWIEc(?U)jejvQ zcD8I=9NQcJYFNei=J>WNo3l2&-h9b6+&g1?z0dEgnA9AraX!h&D%B%L)0?rBLn%13vrNjbM!MO{{~{)0Qiv^`Sk zlR7Wze3RcU^2g_(T%+;5+j0=z?xr^QKk3dkkro+@AM<r$xBD7V;9yV;1$i zv-3?BddiBj{P8R9$x9gtcDxhBCwi09s(d+q>q$y{0evc(*OqQOv0}W1+n$ua2rk2G zPhwvJh0D9GjnO!JQk#kSi#n}8ZEbCHkHqUAwmxq2hppGUI3sY|u-fLrlFM$!NHMDU zqlN1iessTrG3VBY7MCq8qC>rV7IOw3k*A_2NrO6 zak$g>H9`F6#4@^126(Ysuy5(aV(0b3uDySdVXOg97#Yv^qm=dCQ6Zg=VGKJx4_lY9 zA7W|XbzN$Fyk^95oV3fZ=7`P33m0#|nGA3;CijF-5vFTz%q8@RrTqc>^|8Ak)GNQ< z_~4K%1bA3k5HjAxX@;?zu*iz%Arn^YOsr?(?dQ^YHG<+jPNMU;NpKGQ8J)DD5g)V} zPGn{zJ~T;-rN`1BGsAXlFMS+RvNOlLjMYs1zAC(ei!Z^LzB1mvFAh13UjaEy@$H2; zt!gYO<8Q)!a(vE29C8@%ffd)O@fm!N6hGxq6lVNgtjU~sC01T;e9}

    y`ahq3U3wcJhE2F#zkKyxhgli9{!Rn4u=O-()9hTD{W(mY5zRg-OF zFi*C`*G!zMYBqs+`GGpH1)lKqvr(jRTtBVTbgolhEXccz)H+pgo#snVYMrXMPUb}t z;*(mZ8m`kzSeOs_mho3j=cYg4`D?hYTE7~upBZ3+_~cNpjx}6Y^TNles^V@i+0$3} z)_b~dy=#2yUE^EtD&Klnp!k@Jz^C~t=w(x&e+$7i!K5F=qgXJp`l>p5_IY}OD`F;G zM?`aDp$XS{kHHng{!Q?O7Y>3|b@Y^YdV=c+y=x9#t^|rBxDH54aA$-TI8uy9+w0&*MCA8+H0Wl$N%BVRSBs`J%g zdhDP^)>U=B8ca7eU|uG~SA(k9A;?@OVqvM=%8X5ae5=K4!1Io3Q0=dQcZO9PRQqc% z+jnlnanBksV^k-85@4?0KE1Jw`y6Y*8f*oWp2BU#{H)`)oQlP6M>e%TAGY*HEVh-|DvV>@R(RMb zJl43Kd7yEtvQZeo))kkE{_`?2%;Slm2>`kHvTsI=Y85nm8^TqF{0V zRU`Tr{u$VY>zmL8JKGUmjPQgIoBjp6Vd2yzb1JI3&6(fV z+lonM2MzuVU5uJ=PM2t~2|oJeL+3-hPvS4S z4xJ3~TM~cjiJQx-OhRU|xqRjs-T2Yym%9!Pwipl1#_~dl2Tc(h%V!4Lj)(Z;u7#r! z_J~RO6BG7G`Opp~* zV+Kzu9XMhTFmUwfveBB(Wzr{dZ#77mpq^cKE;%W3)wLHNq4%=93a=hWO+( zjY4Btj3^#4WJHN`jPEoge4Zhes(ft!{sYU)op?8;SmjKCtbp-oLLPrhvDcWtE0I~t zswq`V7W=o^h(TjZi$`N@a{vClqn&wdjajguVsUilf<;kOBRX*2)EU#KqxDBFS}<+K z;>8OVE$$L6$T>HsN3?rhenEbI{<+c4i)K{Jn6h|Am*~Yvk~>35x)n@1x7*Z3Q|3>b z9bGhI>72!L7R--!&+pa!oL*l!V$Pa8?>uGxd9mq-uQ#koE?OHdx+=t6^BWJpO#`oU3j$8@ zDXf=|cGk~$+wl%<0bXBOXTxSf;V<`Q%%egD%cb6yyBvO-241H}tsV{O(15MF?bmND|BMcKB@?c%2rwvt4zR zcD@y1{`}tQ|dHc3wohKbR2j z&&DHt&E;%CKcpfkTSMO*3(I9aST}!uzr)i*59qA3`B~Z0um3FiA$g`9o4aj2PY%Y8 zUMurRjJsf?7UueJ&y2gE*|YpI_l&p;qE*>0Y!A=bH=CXmG+)WEVa%T`79MD`3(?Y=^~F8$~<;R^Kt_0Ai1-cC-U0McmqVU zpFu8@TrN%!CyR5$d7|0xkZy(KE5&uboX>haB0ecTEArgT@E65b z#ovo>i}m7r;s@g2MZUUVKB*#K{7|MXjpTKoY$uxi8FH><^Boh&g_3zbXMD3igTp2B zr49Awl`J?#@(gjlxJXRw+x1oHdA?yjo5ebj=O5}H5Pu+={T%uolAjiTF4{g}uS)*C z_@=m5d{6v9{JUu946=R3%<+KoY@abR1|M< zyT#YUy`t@d_7};26}p*i@dL5c^8T_ zDN~*&E)kcDwvXCc$=8XS#N+i<`>x{sK>U&Tg!sJpbMe>WZ^YNcH^u$pA@Q%`-^C=H z2)RBfVl%O&c&d21c)YoYiWP65I9wbh(gx4+W{9?rTb1NX#Z_YB+(Wg}e_gy?yhFTS z{Eqmj__+9t_`LWl(au4%Tk>n-KJkF~7xAwmY&m9qLL&PSaQ#jaqoSRIsGH<`(e{Ds zD|wJOOdKPQ7uh|*?0@1Cak+T8xK?CG1;)QcyhFTO{Eqm2@iB3SnAq3tW$9lP+5dt0 z|4IB%JS+xrL&xxBkv$jgFQCLx5NYDd*Vl;?Zd|Y8;svvJXt(d>>zd) zbHyGayL~YIAhAp=7cUkki75VK`@%(ZeNVhE!lRifC-MHs-WPRMc;fw0FX;9>em#ckrf;sfG?;&yR|__Rnv65HRj z4<5x@OOLt2&h8bByW`Cjc21A{o?h(Z_Z@sL6NTUsSYXf@^MjhcgJoAfSQ~L}NG{1J zacc{9I_QhHxg@=0Y(r*x^ssYqEWWnKjSj?sb{`K^dqAd1(`$l%z zzS%|eg${)yr=ME3Z?2Kb_RT3OE}{O1huk#w@MG_~7k9b0Cf5f}3fDgwb~tZSC~fBj z4WTral&>7!!tkL$_|INHJbdHm4PJ9hokK2~%yGLwN%ffF!Qxm=$|CfgU2O9LBYs!Qh+?Nn5c_UOwH<`JVlDE*m*?bu(Vm^A3 z@*y;Vd&6dWrQjS0sS7Iesks|z;qPw!X>}+d@J*vf$GWa4!R51}H+c%_@|K~=I0p3W zijZE=HR0{4dk)2`C|=CaUd)?okTH{D?OzcdNkA&{|jNAvlrgP@!J8lsp z^PU@GcZrXBVh@SG@WcX%uS3kJWX{D*%ll*+ekG=0tunhq*A}XFRFAHNs@X`W_{i9d z23UHU+XyXa2Ifc$CF}^#nM_!IpH0Z|7bYP+&20pekSnHy?4Zz{3CD0s2vZ_&qD?}2 zn%f8_A?vM#J>luigkw*^YMF$W*o5>nw-HQ2uAvfM4bKK9oHNEIvJjr8_cI?G$%(viJgoVOwojh+!*C*mQ+Grm$+{ zI5M=HVXbad7|Y;8>q#!{*-5XrGJC(6FP?AUWbl*fjW9ddP1mg#iLoqAk+Tp)17OWAEjg6ic|HkpiW>l2uDZDp2Uf$)zY!iAh!8+lC zV6JI`Db`ftL5$`ZF?!OF$I@56kGvEVyImAtWFy9JzOHDs;luLg|s#l@j` zgzjkZ*g(edbmKMJMbely_f!{JRa;`5nxe%j!c&%Xv5NGJ>tYq*im|oT z=vv2E@KH8IHev^`;L>US`FBUm=Xw0H8MEf_1|aaC(ix_7&eTOy7R{NlIJf`s@*(B9 zL*`GbSTcQv^Y7Oerho6;v5RLcTAX_cYP)#eoN2iO7ED_*Z^rzp#ko^qaITm$A8RpY z=-B`JS$=2+@aDjGG0=S8;yH^a&6+k1-&(?!KVD}Xni=#hCf+VONl1euvzHspEDTmg z`JcibIIpI&2hKfWzuSD9j|KViR?Nt4Ql zk1ZbH9Qm21Sk4JuT0UiW9q-6!)bl0QsRm)k>K(Ia#^NOvRY&QLVm}RaoNqvxZZok} zQWu+;d}QYtUl*7o`_VKu2F7ZAB0X!SP0Mp|sO9qy*S;^hFHHeYFLJzA9dFK_yg+G2 z2gEDpCG`LJ`%lN{Ps8TUVc7H;Qlj#ZtOo}nrwbhCBr+Eb_-m#T{ z-_~z1{QmsLAU_VNV?Phph2^sT7*E1#xcO)sX$K{!w>6-S8^#c3jUR>of@t`vDLpnj9MMZ8Dc zF8)w_QhZ+ADgIu3L)<4G6h9FECI+xmvRuAyCR>W9i>5yU^tRv3CDJb<@$|7&TtVWX zU88W*zW{QrWYcd3@*R>*zXHhLmHa~z@(#&AmHbP|zmfcoXkGv#K3{AzT}!bIiTaxU z0nnQ#X~?Eu0OUf3quxbgnbL8(YvyD6%^-Y=!a44n`X!Q=i+pQN{U(v)&6%&AbLLLz zzb*au#3!WxsrXCjUle~Q{o9i3#gC*9;)KU?IrT5gOBY*8AC=reG~X6N{6d9Wd;UO$ zkC1+>WNXK_cKUBfZ|&{Bq>T2YWBEL1n|g?uVrvnnZWG=?>@1q&2I&hW_ZJ6=BgE0- z#o{E9*KC%{Ydp#OD$*QR;8l{Z5zTQ0{nsR$;|uau$@huh5+4#D6`v5F5nm9^aff_( zJz@EO6wPr5`G90|+(G_Ga$^4=bKD{PWbWS}U$~Qeb4=2dK%Osha24gD;wW*fI8mG` z&KK=*OB)Q+UnZL474i*|ZxwGB?-su)(s;r2w!anFY`zAnBc(hk7zk3_!Sr`$xO zt%7n?v~xlgNTx}G;dX8)+i&M$>1jY<_yUo30m@g3*N9&g?VM0|NH*62*n;i;i_K)x z+x@$z;^CIS3E=+0?%%Lyo^x*8oEbg7J@cIICu+}pg_XhU9q)cVZqIB{vi8C2-brz4 zBN-)u+EQ3FqoK_uO-h2BwjGK(8{b)5bj9I7`-?MIAI9*k`YFy=4`;N$Fmv7E&}NX?jr%!)3?hS}xRk%sFJr?^)ijLwcP1!i4>sBbd=eZ zwHlns8s?WUSLW!R7d{jUd$W@ynXkmqYKR|P$o(h&U2fQ+M$z~WUvt@xpkOG8gI8dg zG-q%(Je?;hH*yHEVI4K6!$5KbF+)XEoj-&Bp`?C@7RrY@P;5>eA@AETW;eWWJ>x`@ z_A%8i7SfgPpF`&&O|V-9y)=OZdzp)P$eZ%RjWjT~Na#!=6nfL-5gLXxNp46s(H4-L zaC7{v3ZIGpmEm9D|FZDkk)|emBSJ3?@4=A*n`jP%kZhvte5misB>xOi^?e!HMBQSj zWZZlQG3ngh(53RGJ#O4gJ%#a%ag)6vQ~7x~x7TKPU&oR*m!Z9BwsNtg@q+1zQHuPO zgWHFpJQJl|9}_ugTpF*^ZXvVcbvum*m0QfnCn1-#^q9!D;ggU;$53p-tW4xt5Yu_$ zb^9@G`j2DYw5Makrk^x&D9^#rzmX0S2qYGuYBLgcCvPK~+)`UcyCSR3~Q~MiTI%8w6YWlK5s9g$w zrh5U3481HHVKc5}vlFxtcEDUBeba&wq}LoHW@?e7e{C9)W6UhV*+@8T39{tOB593h z7DwG1nG8%_Gtd zUYMjN*U{6_(-Yi2Mo-U8MsG}5-?n;sxQiig!zaCfnmT&+V1dnxcpVEeijPl+tjP(? zOdQMymPCS8#rHPwA9G$!&1@Flifk&iVJwF?5is=;zsADpA^_tU{45r%C!ydP6NW#V zx+P}+_%QFoF5Z9J$mt(;>G})FK$1CW61q+&t_#GA)U*i@<-tOID!ei~&5#k7= zx`1E|G}LU8t>rVzQdMbG9@@TMCPH&fd3RNmagszwZ3&!M}od z-5ZaL_r9ZXH0$4guc20>_G4S^6WcZM%+Rv{Ce$M>o7{Jf+{K-FODcNsuOL2;0G~U! zkA2!X3cMre7z6(o_UwUb9$~+<^^d1wZH{Wk7NxK{;CzTs{5x1K)d8S zW}X1}x;L6EAZF5xZL{(r|1NU{@LFpfuOA<8-|UysD=_~Hw{QLze2yeGo;Iw;_iqQP zylegEW8d`OH`u$2uBZcEoyJ^Ys}r+taxx@7fLaI9xWV}M=QkbsZAHA3pl2Jf+z6KO zSZo@2oh$_S>u1B}CdB(2;uYA+`@&|z?=P3%tJsJKP?k%*EjQ7=nTNnA!mYFA;?cNK zemCOAEE78B_i^^kk;sqnth4!D4TZmc+kE-)RkN+%?eN<)%wsYVxkqVdK7IJ}+m8I$ zuB;zk-No|zCj88g_v3U^PP&MKWwgPB3&ExR< z>-U&%eep0ItKTo-M|COz<8~mwbF2WeOuA-ReARY7M7%$k5bw{%BYn-~?8tIX$iB%B zzVtpyem<4)+Hxp-Y2S?7H+k%yh<)>@pD@wAwa>oEPnkGlu+XkKL0m0fBmPR{dF7MX zH@UrO=P4GsA5$(9`FKv**k!=klIMvl#8u)3ag(@3{G#of1=wl19*Oo9_9vm8&5XB3 z_yv+Vih}WHO1AdUC6bLD6ye4WiuCIh-`GJR-z?eKK_TBG+1NoLKO}hv3Hcex#tsVk zCCO%7HRL}^-mm!YN&cH;o*!A?bdfJ&DW6UveMia0-U9h-$>%G4faDR9`4W}s&0BWF zpDNjmn})oQGVCsVJxkV!-xq%_{((e3bd1MyBbhGpIzhR$h*PAIJBXb{zFT0tLb1PS z?T8~K^LSyrL_4C{Z=tVH_+oLHxLRBzn*A8@H%h)mwDS*alYFoEi1;J%Y4JIc=XloZ zMe%j#Oir zMYBIb|F-0M(b(ysKP)+*?QiV%(3|}cq)me58mkGIBiZbakk6G&8wcYJ6lpr3%(wX@ zZ3m>a2QHFq=e@A|<$CEiiZ_aOf4x((wc9@=nPwp7|7(%=d6fSqa_)G_{Pr*z6|Fs< zmI&%g#EV3JpqTo(;(U>&3hH^kMs5@D6}O8Ii?n4h-Yep};z99mA`dvmS~S;- zkFkT^tL=zehXgxleqP?cU%_-(?#V!5K09b@zOLSWQ=}&?pFw;FB6N01i~Y%S z%l9YEZGkU2l;b-HE%rx-mhTS_ZLvReQThJBMI8@>=gvHE_uNkS8U()zvF$);u6te( z>EAf8ZEgs8+;t#n#hVB2S`peGnL7Zvh4B4|0r-x@u3b)jNv2yL=64tZ89O6+Bawfm zzW?C%=64pHLlNh-cik0-c2z!BIjEHTf~j)I8wAFSTzjKv{0H;k`_N!mr|IV5Mn0kx zNV<<11d`1$6H0m+Qt&jYiYGEWl)RT4A(BK>70jO(0r3HxgBhD=*?Ayf9?q8_Bur#(4P1KMfMAD%NV&Gd@0=B+|i884hShc`+FjqZgT$C!dtBvmhg;!k2PeOr+^Pg~ziO$}3jNhZM({aw+D<#Cs_g#6)(x zN#VK2i_D`sr7y*?OgoZd|Cq>QH>FKX;2I1k;b;al(?~vrohy=h?>!1#jspv zc&q16C(WH5^nS;yIV@SkP%J@b@#H#sW_m(VT@^evSP+R=WAv3Zb@bfe=?S)1(5Y-} zjq@@eMT|D#m^YuExt=iDWX@V)xE}svt{OgA-w1{_o@$;2vouW1JOVI|x~s8pvSyMs z3OJQDk)Gy_%x+Cyotc#{Dr=TX1;4g+l+4o?T9H() zW0))d;GC)v94@Ez&Ng*bi<|c zW(qSx$g0ea8x!E!;uFlBp>ror<)41!A;T|bBNP>Yyxmx zs`$=dV-C&cOycR^3BG_HW|`3y!So#dGIE0Bb9%}*hpL{zW;wwnIl&8Zg1Lpkw4nvT zWjO@}1;PJWl@t8EGk!$39>MAynCxcKWEVh>qa#grG_CY729^TP%+kO21T%_rf*r*< zAvTJ0LTnW0gkz23oG^2l2`jl^!ssc}r!1OO-hEK%q>)Q17Na=^EU2ukn6YS5#hj@V z%B!Z#NBDFa-;S`weai7|jho-I;KfF}8SBk|z3t8zlw#{ltCcq?bt9F3R&AJ+&hgKt zZ47kA&V)bN|VJ^qBb#X>|(VAe< z+Cb4&ZlLtpqGyVpF3O<3C;tAA$NC**-fVwse>vVy+Xt`6hTid}_$`>{let)^uD3I?xST4(B5|Ym*{`_9X`;I7d*4Z%H z!~FTpZsXm=Grv?UHouMV+cfYxAL#uF{d6{L1N{E{s(tzKxU>1);Y$Or6Go-^zRWtC z-|bNN^Sc`Pas6079+Nh|Z^O?tydR`XN98$g#5#s?;k!zIyw-R>yU<2b7{i~H-v(_! zJl^?Q$8zbO#Nw~tM&J52N0_Z2-+iJwm4IqbZVn#YpM{<4RGYD(Z9PvJG)GK4LeRm^<#R!^#p8;g z*)#nz_pG=JnmxlWXF5@cY!A<|h2rkWd9a(s1K|r|hPU=0+l1!~+PM)-Xx03fr-Y5A_lK(3CACe+#oFZo8vw@Wt9ZixRa$=_4>W0Iec{4>cr zB^w(8*6$CJ&Ff9b2P8KrzUj}2{F8BTvpuX$tCeJ9LqPZ$l8r3^GGFI0zOf-dwl*y^ zuh~vK;<&wdq>wxo%sX*0TkI<4i9AO!ULSFQX!bYg`L>DSV?|!?C{GsWi1WlMv07X& zUMJot-YkAYyi4SHp80=Id_sIid_mkPzAnBcejt7%2H5V%FDzz=%|*V!Ww_b@z04~QR#ABlXg%=CQ!O`81<c@%Q5EVxnz}@6?%}wQ=$OmfuFV z$2UY1Zjb*5wViRhnrPeVe(t|w+v=&$okx#9XX!!SsNuG_z@Rhi-7WdO^J0AOJfkb; zDh<1bB1y|i#x-PeR?>!X4e8|H#(A@qzCX^Jt@O{BqjYfDzKYW6Sr=!y=bwRZd!Nw| ze&LLUQ0W;B0n9g=8OG?nq~F4pl>uAUFI?KPB0EPmg!&-2KO;@=(;EVPKG=mXgI}J? z_B8d;e55>J{%jPD|6sV<&V9v=u=_)heU4)Dk#1l>z)am4+{*wvA1N)Y!KWC%*qr!6 z$=9&mBT37dB9h!0h?}!`P7h9|D$3Jskk1jCkMt&byG?}_Cb3EgsK+`Y5;9kuP-u?H zIK<;3i6}EPvliT{Ys|o z%gATK*Tl>vdOjoH(_hxkQb~6I=SL%(;kZ|3MLy*bD&~??G&h zh1WW_tSeMaGZC!=Jt28AZG>jL^XP>jC5*z;0gF3whD|ukCZs3RMlcDvVoKN?omYxz%SW!pMP*12awwe*1u(FPxi?G13 zMtC*Amu2Z$ZS=e$i#gu)!?;GQ#?sjQ$HSl(7R;Z?y`{={%kghq2mBXeam_0XPlx{q z7T+g~xege2M)Wh@3ka{e%Un|}7A|`qy=KRBMiWc17<(T*tFfS}_&1I@vKazs-?<>$ zm3BySh3BsZjPu259+`cyU?`+j6~I$uRI$e3&R}Z;uW`QSv#KaOiWaL# z=eRCb5gxdT7pn+Y%xjx+f_knmU>tSK({*B%Vg=rsl*HoVmHD2Ny(x8PVL_+~9(l!BfT;A&X~C)E{yF%_!&JG^5%6 z%O~IbcbH}qy95kD#~x9qac3uPyE^vFnV*pb(c6g|8O==Xj;x|4$2_{ViZf`z2AAIx zs}CO69`>1hKsGie?2DP^@?&jXyg2mBXkD}>T(mZ+=&DfBx?s`O{9r8fU$Cu<+v-bO z7q$bPc_aWkVToYDqpNYeQSmz)&pd4)Agn;fTP;6fZx=?wZ_`k}9ZQDI+!s~~KVB`y zTr|sZp2KZKD`@cQ!Q{t!O~B&M?@8qKH|VUhVZ7C`eunY;OpkbXGA61G<9(mM+;>nQ zA0=5X%j0^Ge3xz0!0Rl-`;RC+ayBf{*7fkocpgF==9h}a=C=`kn+9Iz>w2F;Kb;NR z0KdO}&-wC8N0`m;4qqC0oqLeqwxg_XqOI!{%iMcx?!mN9}@Co z_#;^S@y^71;e|{f$1pC>ic&jU5U-aNK$c7QBo_br?(wZ}bA;LYy$C-xeI;PrOUUm; zY+Y$s$v@geAnQg)`c}_*5QXJIc|2R!o)%x)x;$&3X-4z+uh_a)BgMzqy1dKs$Jx4g z7Kh_`=+oG`xG&PCGf?FDh_bOgfDTX zw~C3jwQo!RJ<%LTNdK&4a~wf_RWe^eGyel3-{n#cXg}gBTFNa&zIdkGS>)Sh%7r3d zD^o5L&G7AB zXe&DU_wDkdQEz;d_m9z1J$v?yMth#yvzKRDI=-!Fa#Pl#v8@PpqIBAeHkK6I(NKZ6 zO3E9uE6N+9rI@{O*2>H^heHFy^)o{K8Zt}E8?q46`iPKpgrp-R^N5g0X^XuhoyIvm ze#p(}2ip?IPX!KT2A+josT6jl^k%IO1|yjmBbBK%mzvUp^)rGGA95ocCshoa)1Qo; zX(jgovq~5z1-jhH-ZhHGf3OO5Ld5tSk7h4%!)9Z-5pyjFBwfKx5=g!tnS@?P2C+FF zzlMMiJ1hr^&1El?d>P}s&*JSIj|&)QBK|bTBh6QuCoQOz~NYg$$*&IOS(C@sBuBr|_tEi5qAS~icK&w@HQV71fne#3?Q0bM^Bz7%r^6<@m>fa6=vYYP*12d zHUeHX5K?8v1x@z^&oD6C6Kd+{xdIDbA`=@u{p31&ZZ`Un#1^B6{eqtFd3xeuPv3ZC zl2_|d@mepcG`03Bx~R%j)T`T~YEw6_I*YvO@S26!{)AT@B&UZBlrWZwry)coZZzKU z1S2-KYp~5an+RiwJS-U5Gnp0Y=cx&{9n@xyy$PP0V8cOO$x1Hr)P%W(bQV`{f&Xq# zO|Vt)mcE*N$n#eM#<3dhuwc4GLe-egY7}~ELe;1k4gWY#O{f}GtVV^WCRB|YR%5HD zCRB|YUp1SHy@yzOuGj=D z$4Jj0t}N15dg(pH(%TJjjP#3;maT&H-Yk$pEIpfwo9Yp*+OWv!S``93#Em ztB}6ROYb3;-tKD0NN;yPr1$2>6k_Sw&|8mPK7-hnXh$!-5KHfCXs>3K2^BM{2P~z z|A6s@JO%z4#qa#`ySVTKz8u{3`FvN-cBlQcQ!<|G1~c5?q8tqDikj&ahjWfa^H<8r z7N_L|Pt6HVn;Gmhez=)@F=sSJa~WF|YzSsvz5m`}OkdpGke`it>a(&xnMsSxI4#p6 zA2*v~BP*4eG4U9tDsQsGV_2#%{n6)dq59m1Vx{9udaQ9+Jh2Y=H?>WDIWJ-S5{PS_ zah>oV!Gb3+;|fFz8?P%A^oJF|c>as1z0{6WJVkR3!gGbq#1~cyzh2Fms2j5!)0dxj z27LTueyrC7EWYFp`x~!?&N>^$cWlTyWqG#TMBCK; z2#g}!I-4Kg<@xjD#F3fMF+bk$*!*}qW7ELv{0#Xqo^>{C0~G%JGJW~+xU>1)0l!Vd zJbsJ(4*C?l8bqwS3h-l+&#{1_Ju}!6; zFy1L!$8zbO#Nw}CXW#lZN0_Z&qHSsb@;iqa$l3L62HEb*47wEY_`cIR8;|s@o)d-5 z=|pT(>`Qo_%?z~p`BcX1*MB(Q(kl7`j@r?}&vKi+B+1Rik)3IJWK1rUNNS@QksMtYF zw5jl1z<7n?Kyir3r(%Yi?Ey}bJWZ?+E5+m4RE+Hq`Fu_Bd0u4xJdcw1iQf_*5+4>PP5+1{wf$zoLOAa)bY_C!3h9YJervE!D^_Jn?% z;$I~4eJt~@6pc+1vK_aSXk%e#BF4Alm#nSjcIodD?-Rc({y=<8+#x-eyC#HknkMycwP$THB1Zahf?K5q^fkIck9M^Tb4(4QI+?_#n~R zZptNJB=R*pqvV0oiEzRhg{?rq>2jn6vxgGu{pGp5nrhS6EkqyWBvh7nr( zlh16qKY7JC%pW**f28+V%sx1Ff6_(cFo$5P{o#vR?GN>Cxj!_t(}AgTJ04iK;_d@? z&UMcZBaaye-kv+_z_t~49Jq5u67mZnzc&wbnEU2|GcX%r=G<}n(|U*YH(k+ke;Q^a z%)sn~O;Aee&{q3XE*iT(WyRS2sTXxRFb#P;Gq*ivBb<);4e!MKhIbxVv*L{dcPXEA z%xK8;sYsu);+|b)`$l9%2b?~j-2i-}E!Y+|yGVYdJLfhWwcnjP3Uel6jziS+ZOoT= z7ixRP3bzl&qPcG!=xF9U3>=CC0{cTN`eDY!KkhpCBj?A@aQm3%3c0*5ci+HYA(V*@ z^Bz9HxNg`CVRR$LiX2EXogo6rzhPJ?X)^K(n*J7c-ou|TAd+OxFOg(gzTyMLf{c9u z|LnYnG#SEF*O!Qd4w%kEwn&)_N3t@IA0RG!Se2@-ia zO__obUS^)c>nKgN(zhs0vl35qDbua=S4gRM;mzPbw{?p2!b;a^pzcOcBSQ z#1|pLe>}6G|I1^cxQ#IB)0zc+!GrSP+T$ozY`DL3-Zxgqk{f!rThZNFoc%5pxcDB^k>e3rNTFS*4S` z)M*!qW}6~;5AM?zWt*~jCj-kJ;g!AcXa>X4%-zd&Q9`y)n`~oRWy`#LjU#~{4-^&*)F z23O<+7v=;{8xKWA_p|cy^Ye4_3i6?z#mNR2=Hv&{a&pfs$j{}+z+QA_UV^WMjq1ka zX@xU#F##bSXT^l|e5`eqB9yPpZU%gGaxD*=S{!O zDasS69B(3uGqQ@-Bo(a<6X|Tbh(t<9+|V2y6w3j~L7^f`#vWZ5nu;mU!skmESrW zHV+ExXV`s+_fPYH;>EOKb0GT5&1>m6Q542DUW%_I$0X1R1vVDZ)q)pN2@7$4zJg5H*!2|w%R+l`!3 z?5BO8v(DycWlO*Qv#>Yuo;L1m>v@{bW8S~hP!!w4b8MlwJCU(a?GT-9!fQjKy{XYT z`e@VsHHzS!gFcC^sRzoZ4TaAVWU)9{v^J+PlBbBX#RVd5(M*4Z$YY!GO(Ksu%G<>I z#K**^NSx$;BL0lTjd4@;=FblKfZ6|BxI(n=-w5%>f!41=wBsA~Dg%^cCsN zcn`#1F4>IhfV_b+*Gu}%l8vna;op?JUEz;Neo8W`XV#N@E7zCjFOvHa85KK-XNkFD zFR@S@C=L-vie`HuzpqH1BF+`(i%Z1i;x*z|MQe+?Me_aPcf=>eXT%r8o#Jcao8r6T zK{4QZ>up|tpuWaN2xd#qcY$n|T(PIvTjaHr;UmTI;skNJI9ufVL&mQW*N9h(8^s&N zE#g*@*JGxCKzvNxAwDO*AigBNBEBQOE50u_h&%x^|B#q2n&)xoTT9Ls6KzI)q(5IQ z5r>MS#IfQ;ajG~^TqstHH6mZ5vVNPyL>m%ctTOz&;v?dZ#An3kMZS7vd~0KRQ}SMs zFJl@0cQFYU9?B_VGm-Z|)bnjE*+o1@>?8IU2Z>`vYpdexU8bKWE)kcD>%?nCzW-(X zI`LcLcg07>d-%M;VCUYA5S~L)rf9GiCuK~TDxot4ylOMU!0x0lT|#qQm{YGo`EC)j zxQ^H9e_MMFD@S_{ITdw=zXR)QT^o2{g(2EvfjwuD89!w4(?y!E0r321}G%vwiJTTfV7 zN6#26h(t{E^ffUv3o>-PRTxEd#F7>>6v1>u#hHzieY5MRn9xXBm|aK3zOh z&`8-UyN(Lpv&IYRnO#T4bB&Y**>zO#ZYLhIdv+ZaY>1RtJ?kh&uxjyms5%v?STbVq zs-0};sY_4Lw}am3pl_538@V+WSi}ggkry7V{YJC>yr#0YFJwvucZD>JM)Rz1Xg?|@ zH&UYgsNfzEkBRo9!fPs<9PLNNV~t{>{iyJo%EmKEXD-BS}@(MxL1L|NXNPK4Gt7S|mMY;%N)TQnJdKCMAbsJNvp?siX2sJIm@ z?j=u6sJN9Zj*m{5%8>BZbYW~w5!1Xuk-;zmk$W5lLJ_*j4bpuT4XN9P3dbAT&?g)`@R(a+60%h8R+9u~hN0__%8GX7CRX?|`k8FKiC{{&Le%U>*u&xoig}A#1Ss z^ScwuD0J4@uxcp$`4ygWVs@>kkYA?F47B-On~-0rFTZqz+4_CMmj+(vMda7SyBney z%P-NcH39i?{kXmvSZsdZQkp!FZci#~P6_$3j=U!%ZM<*bz4wXOwX#rH5z<*_H_a1J z_}g!~Z+)91%+~K$@MDu!+Vo?P--+0@u0_1pZ6c6$rz3r<=j6d&l?UbV>{^qtpY}01 zcz-rOpUQas`Y-KTS(=%|dsI8NUCXJMD>%tM7%(}Sga7uD^uiixn%P$81hY$Zx!v>rf*4pTzpb|S$tJI zAigKE+du1T-qeD2tWtC7`AU`Hox~imyU3vc3?C$p7bl2`_9TuUVEn7ZuZx?-2gCTCl_-FA$k^O~OP7o&qlJCdKR^qAR>0%eLn^++B5{twE;xMsHygF-`U)ZyLo5U^RR?&|2x?l45#D~Nmi%*Ha5Pv29M%*p(9{Cg6>k4}OEB3lx z=bZ4EtDAjbq=mw-M$2)u-xQB(Ll7v=!WPEqZ+aw z7~POPVH9RRyykGy`VEIu?=RaoCu7aw^z~)?E=gZ=IB8%y=0f~M{hW;c4bgY|H)NNN zZfK2kSxA?KbgfSyU2CMvLb^<(OGmnNq{}>kbeTw(j&u>E3n5(y=_1EW$2zjEZr}b5 z5u^;2Vx(EX#rg&@@8Y^$!OiZi7rSi+v>tHU0QZK#W{%_Pywklkl9!BeS{TdK5UN2r zr6{9fWJ6@ay2GLSuR5H}cF0(ZnIX|G;kB3>@)z~9k~u%5+oxYcq=xf4a-0|EYUCKN z-|k9!(6i_LlIL8rX=KlP5Q>9F(fAMcJTtGX8(GREfuyZGn+1|@gA{xVaRcX%U(sdLf$sETOx98%Sz`14wx z5#<*s;?J|n>C#K#&$G(6P{f~SmE)zI<`U%LjZ?%P)J2qND8ws0MPB8Mn#(Ac+Vf%d z5L}T`^ExS_m1FYGo!OM6f4(oh@@9X{O0Jeg?pf+x%1vndD{&Jdcgc-NdJM_SInaGr zC3(a*hiH`5@44ihJ#3toQo5{L4TDYgY~91gttln3hmAW^%Jw~MJe5+qt=s22DP^bq zZY<@xITleVtCZEbhm9Ip@p7$P| zHG97#b;z1On|yTn9#XE`KUE$BDSi8=ZYrOdNHeVjc{+O~-{}5%#eGQ1tNW+QLnFm! z?`-DM#4X63t+sb|9D6(UZbOpY zyOHFsJ0*!LmSp$BB{{*{$lMeURfb`j>uLQHiW=8Kwg9BxMZPF9I5KyYaie&DtBBO*$c=e_M& z@~I))=gBG+0>KIP^BiuHgO9f5oQ&YinSv_omhWNny3`)T{j+=6+?(2i_}T0pHeXHc zL2#2=8V@RUqbDIc?Vc+*51U+87GHOYF2~u0%i%F*dM+ay*Dx@va$+8*?wviG&CDrw z+EZ9n^4XzvpONRZ=ziT90`jW0UOXh#MN&n7nQagQ+yp+GtO}f$BEI*Xyza%XG z?_3jI)fnYNz9zo$%c)sYAFcn3(wb`hpV(dF|Bfdd_204k8vmr{n)k~`fU|{5hOIUJ zQrZ3XYy8)G!~e@YtN$GS)Qd0MUgwd2^?#$^RQnq_UjMu~D=)lkYn?~_)$^}`e~q3$ z$K#rsz0#ed^3DCOsYxvDWSM{LbHl&nXV(6?{H~2@T{k`VANRW+R1ov+EvS-X4r-Er z|FG{0W#-&}`Cn(=oI3#jHU8J@+(M*OcWgh<|2iyrn6t`V+|2|1uUo|-2=yRB%!^cc z0gK-GT9%9@-#)dBLz6(Wnx7oE?F6bo+(#72eg^=SWiYyO_Q%`^==jD9d2Xd#Z z?lH3IStwRvmy`PwL07w&`Qi?XIazx&hfw@CK6_lxgCUVTD@U8>~at#cKTToVg4qvV@e zPL+J$pV4OXkw5MBm`483^1nvq!EJn#^3sy*rh7do|MI`i`d=9@{)qqe&8M+U^S??b zZeu|HmfsZ~ChrJ;>SmQ4D$iB9Mdkmm{?}f4XFQ)f6$hZ^kYbAnpR2|Y^6ntl3t~HL}g56v&utM9n&RHt|)c1ltn$Pv~-lTe;$`7h^za#u>{k=FpxW4bId_kq_=bcjhRh6%+bp5>9 z(s6Knp2{MXuD`cJ^-7fo`g_-E`g)bEDqVjs{us*dPH2vuQ{DCR_NacH z%6F^0StSl0%KtZ&pHb=hdB33gK9!HE998+W%5SKAUgZx}{!AtFv2z|gNXSf;`6`1d z%Tz8_xm;zn%C#!jt87)dN#!vrH>*5F<>@NVS9zhz?JB!fUaRt*D)DP^y?a!CO66x% zenI6vm7^-3Qu&`MpH+z;=`Zwu^J(hL@~6I6ZCdx|f3Nxs#XrFO{h|kC zhR`aRfAsoOmcDeINT1B?dB;`fzI5#=%U|+uInT~Vnjs}@k`gjx*3t|)dXtpCNlMC) zQZ`8msV_*wc8*fV&LQgkX~EpE<R0EKnba{_cY%#0o+h4lN z&Kr8LY~xq{shuZ{T=FC-XWVeO1_-) zFOsQ02SvMEwA?RqXgfO{)Bt(yjGkfH%AJ<f#yoG}J286DfHo>Qysp zA8PB2dMB#=gwl8bL(&uHzA~dSAmv`jEp%|~(Wu*I z)a|HO%&0^Ud72CgnGk_`lzURgbAef=Jm~NO49!e{%m<}Qs-0Cn0_<0 zT`Xc|0dI>_7||=M-*Z{#9ya=H`U!|T+;leXvFYuIA)78vWHyp1W#=9?zAUR0ig+fK zzQ3nAby7Q{Y3ii%6)c5Qka(bH%aac@DUS=6booECq>8Y!mr_K2>a)ztQXXpe26ARn ztqb&Pl9lu9@W>MtKa+hq0 z;|;<6?EhURx6GrGi7?+HVrF5;P=6nrsk^o_i*|{spDCuEq0B7GWl+9;D9Gl6Hrr+d zPjWwZAEj-T)h91qgk93o&T-Qg%7*6StaeFD+sZypEf>Ejwb$c0PB!$IM0%R$JJd}( zQ8rGORgOIhsmFAu?>{TG|7fJ{hX%6?*P&$syX?ZbDVJGAk*Q-Y-)?uxKlYy@tL#4p zsrzTnNt%{ab244t#6Wc zq??v@El`+tv3S&OiD9M7H{Fdl(X)Kq>&K+)^8IUm(u*!WW9#{6ol##Gt*fs)qptS6 zD{7BF@`N)EJE``#GtW75+Zmhd4?p^h_RF?jdhR)AY`Qp+*m~|Z4yfI9=H=(s9)9jc z=l-erN%^s{GydA?Nx$Op`isJM;k?YP@fX$j&#Y;ZSxRJ@($nP^^6cN18h@~cDM@o` z8vV!A$ZzNQo5PK@wT+Fn{&Q>mM_%Lqp=bMPQU6s(F0b`p`B9nq!R!6s`*kNi$U`nn zZ0(kB3=ig4+YYYhUjzRd<=;W|fA?ucXC0EV)qrcVk$-FX*Tlbd{EMl(@&MnRTZ`fI_dgev4C}}h^CaxU z-gN19&mZ$C&Q4(}2Q_*A5*OoN>xOk7q|6KVkMvgNOTV1{jc7Qnzozg0XPWQSePsWy zyCuuyxyqntd3hdpBmdGC85ZrbME;XcY<;^Nn2&ude~nKP2<9&CsLjCdmd(C=QI2sh zDs3OeK)Nr=Q|$3{O1=_F7iz)s*8!2(3hCvYDmU~oNplx>ANG#B&AvAz-?)48Y5Oqt z($Cu|Cj=jHUe3pTAmOXi%X=o<;|WWeySV${x6{iDicuAmG|J1B)h+Kmvh5xto1Ryt zJo34VyYEIxNG~s(RvzumEpI@!-D70alOY$K`zFu%cG;I+UR28C{YtkrnfACmx5~+)l2|I~?s<7XTw8j1 zkIJ{B>m|)y-11!AmFek!3!fzIes*!6UMl79G1qB@oNBhd@`PrWKWDDfC6b+I@=aOa z%qQvg&oZRF=_jG?e$JXD>)+BR*+zL%PXHsx<5ixivPD%aBseGS#b9 zZ&ZD~>W8S_ruuQJpQQSks#_nHl$TKbGTpyhbz)OE-+NTIzAVxCT!riUL%z$0bpMDR z4`D}s`<;v&|1H&@)BTgG|6KK7tNw=S78AQAU-T&KM6sQiJ-AFH(WPxeDIlaDbT z8B|%Ra=FTlDvinmeWY77{UVjNeo1+*uk=PuxAjZXEsrhoLz)iT%lYqB3EhkSh{~_3 z{JKh8uVnvsRewRHtzVMOiVU@OiNjiiw`E9)t38RdDv`Q#t zbnG2um&&aw;h0J9Q3=V6eyhqmRSv2gQhC41M^%oh98>v>$`@2ls&v1VeM9vO8Spq? zKqbsHdb!Ffm98%ps+#@HD&eZp+f{a|JVzzuHT%0&!d|1hzES9F^Z}LFXXy8FLwKd+xulDSzSX8NXWidev{rUe9{< z=kv;5U;bL=D}|Xa%=`3x8Lt#(+ z4wtVZD}Lh1KW#c=>+hHJ!aT~Mj8ET3seh=X;a_?Khs*blhs&3Y`EsQNa;4dFrJoXi zRZg+@r%!lYe^vQdMtw$9W;?w=W<5P^{_9!4`nf%a%xHR=%zt{ccOx^O9`oW0jm&S# znVH|Tayski7j%wOTL3dOs>Ji?5{8!3F!pab;rwyn)}zUjK>I)s+Xc!tb?$gny|yPCw3OYL3$< z*>vYP{j?}J&=7$PgUHDE1?LT9{8+TipUAd5$LXY;_kcN0Uy>yKCbCF!vUmgEl><}X zM21BV(D$UiiTohy``By0iKG(_&_cZ%?~=`=RWhU`62m-|1Zzx z+e*GXo5yZ?@}rV)(M&lPu>b3FU@DJQJ^7e=_&8JNx{y3SoXKNVPkyH)J~)%-o#dIG zxgM+L(c|QI%fIJluIF9kOI@?w?6Z0LBvHPU(DU_@=YH9dx+bf7@&_fcdM3|}J#3tpQo60PV<@HU z-1Al07?)L!K=8Efl(lToVnx}thYiU=CPaa(HWSJ2k~;0Nv!~tJZBLsz)6UeHC{^5l z2psqF)$6W3Y;Ye3xCK+?9fvqkR-J=&m#0#`wk=m3ub(Zsne6jbDK%8Or?_s(i7hyVq8}79qvCf?bq%8 z%?NIKf8Qa`g@-F&|H;4 z`EQrw>;g5 zR{8J}!37n`E!^rO)6VXctk}anT`uc^hm+PLs~nCPl2s1Z!*=d;50_-Sa1}hMpnUAg z3FKOqAuINf+L*Ry*EaW9Qd5`ZUe4@3F6*kaqh`w^bywP+U01o~k(#)^`d`t%8s$^{j9+)J6=$0bqr?;qu!QI67c%^oEO*d;Fi50+J4aw-FMBwZoCd+Yym?01VVAV_;3l0Y8`=om zBpT99vZh@cP)jba(Fy%(#!{B-vMpgEvfkT-(gx=7y_vda^@{gNYV?k28A$4tLAbLsXvmn zNWMT$RY7e6vX68MlRHJc^arv@vR&vkQ|CS2O?p{2re$@jTQ1psvNBM(3&V!HxRsH1Lw$1>wp(ST#vdlDyR^y1(Xzf(R%)KR zq^D8++{LXf*GK|2!d-e~!%e%HtRIlIUsm3zyQHTLxQQZp?mWm>Wrfd6U()Z> z&d>F)xQD;f#MYK|PEAxO@8mE3VB0^p=Ht<732LaUsI8SruKnA?666rADsS*#6^>R! z>uT53)~{)>d-Elee9@f<%RyzbFIvlQvKskC*Vb$NUzX^Hx?AM;UHv&>{}m6~Z?I>7 zg%h9m|K4Z_`KDCnmVUF4g48U`5+N}=@wK?-|2cvq{wA*eR1K8>Gm~o*8gkrU7eR5x z83!GAc%A3>11aox+p{x^&wjiu5A}cui`lxj--q3^ffVlS+3wfeGl3OnoN?Ttn>{w{ z7-`A&hc0%yg{SR1QntliHM8_B z6yJd4E0Gi-plo?u*D125m&Z3OdnL_X+F1qZBsP=W z6zAo9+y`=ptnM+g=}CyMEX;;3?!GHTPcJW4g>jfFFIS{n-g{)*Jw`S?eNx^e8@jmr zu&dI`Ym@Tu)pLFMvbyCB$hLcoYF#;C4z4Y| zyyK;wu9q}-am#acSEi@`D<-1YvqT;Y&xA4J55`2K#{NGX6M^v~3w_XE6B7~Rcxiu! zsytfdu_{kjdA3R_9rOHDkAGMqZj|tadebb`j&O#s5{C1vZ(V44*^oKS5an+wz{hO*!sQyFMf1&!Ts^bjf z{{7N$eRNu#_f4k~;>HfP_x8MItc@Js6M>YLxD(&xp%Kq=^e(Rf->v|bo(toY_{L=B*`$Te| zNZDVey8Zo6(O02MJ*ib`ebkcwV9jrT|5Nm1RX+(S*MAyP($CZM3skqi11jaRr2Cc` zf6(a{kztipDp#qjRcYIquJTEh&!`+%`D2woRSAc|@vo`OrhbZU-LfLfRS&DQ z?NQR#s(zTtBUPTP(zZv*caiGbRNkP{jS;c!P4eBL>7P{jhvr9rLic|~B_33+_XjFp zR%t(Flyp0@uEK-P`OTJT;;(k@zGN5Nh)nS6#XpKaoV!~ za+P>((cSOw`&7SG<((=ARo<)eb1ENJ`6ZQKQTepW36(FX{He-csQjHuoSa;TZI2=s zs_uSwZ`-A$w`lr7Do;>(vdT`CZmbCYW6E`7L_Vte9V&-a?p67W%5jx1seD;wK#V8K z%U6j*8a=Ag{Z742b$4F!&8nZT@`;m4oa1+@#C48-v&xUF{G`e+s(ei4Q!2+)%4Po1@8!W+ zl<$r!A=S%OhE-OnjH+x@dEofcrs>w6lXBZtKVD_0%5zk9sobivTjfrbJu0tL*{AYW zmHjGjS2?Ki9+g8X?^ijZ@==weDxXq0uJSu7KcoF|F?wOj1+>z;S@yzcdSU#ZBFx%10&Ua1JYL zkL>YezEa_B^&H`mS@v&|S@yRcG9Aj7S@X+f)_f^3ASLEYi5W5*e#QYM2KFnFvM%>f zZmTWx!C!iFk9qMR?;+DcDK~$sUw(R==q{gJvtQ=L|M=7X+ctaif9k97-nMYlhi7KS zUnDc*=lwE}7pOl~=G;GhI-~5==?wWj0PmsRjqi9}Cc=27B16t4cd^Ms`93L^{LEGG z!a{cKHq_rpHt!}f zUyu4Jjd7U~d9q>=rShFa zzP6csR`uk5KoW10^|Leit|Q;6Gx@CQ$^ED#-XSXpB~{+FPXZ2{U0l+mkg2~ zL(+;44E74jaT1k-noYsYTJ$HRKy!LeMk2mHYBqgyhB2rWTRSE2^T`ZS4#T+(Id1sE{e>LfZ!TzCN@%j^wSaejwR4-|4^$+d)#q|)Op$w zG!px>06RS8+ftKEkOZ={llrHU)Sq7@jleDX$RuU&YgNm(VH3z2$3 zS9$FvzAOpug!OEvA}BT^QWYaD42{=+w5(Dw5PDJP+#uT@O(i4rqPFwCX**K&5qeQO zC5K(8=~_Y;^;!>`x#(s|<4V)QX*fT9x0HxT9eqWD^M4?fj7Sx9MK|ZC_mQhbq|U!< zzw@7Fk2)Tqg>C0j?oTBnw6K|@ctIU@cLzQ1r&614M<>spQ&q^CDUoM&Rrbd-c#cG6 z>cYn9_P7%%VkouAaWI0J!q3ZbY^IKb=CsRM^8Y+pr6@#~teL{FOJ+8&N$o+rM^>MF z{rwq{pHC&rf4gwt7FqQyY~CQNJR*c1xRo~Xu&kPk&D5Kixt6qhkezlRNuP|S*fEi7 zOS^gZ0_2Qtt~+EyA3}PPK3X^FO>V}$%(Sw25vj*^ynCSgVAFDy%RZmoPnVurXn^TU zy1q~{|7%8%zt?XOq&D+= z;t&mcu@BDHq2CXH`TaN-Nzs`^X6xa85ihCVEZ8sZrJ-J;b^fREE`KP>}d0-z50JKlC>V+`jH#aW1L1<_^LuL=DI)0Mjn%@0A2M-)h~?vbjOBV}7%X=L-!&rkS^{%tfchwt}gTZS#d5WieE777ADdy58qpQd0Usv#%bir zKAsErfyL(@Bb%PfrMw^;y14sp6g|DXooVIK2Ho-oWZOMPHa#~;c@-&B3w37S?XsO- z-c3>-*TZuzkku{k9@(b6sH`k^ivN@Ol--4WtPiMk^L<8c;u1HL?jzr$y6x@?&rQKB zSLeJeBeJGn->pk#pI?#ebFc4d*_O*mh_FkSl()`RL~>3RNuH_8=zApLc{X%$^C8n7 zm#0-82==U0!#^75l8_AligV%3%r5_vxjz^y{&1YjAO1Olnf_Z&OCR*t#JOzXc&Xn9 zsXR>OW|e>|_MfYAi^?lh?oxS^%J-_It#RBZR03o|b^TDf=??lyIfBSiw?_y2AQuD#8bKV>wlMghpCQl zfPC)nnKRE8<(-R^d|OnPYHRb+HJgPOmCY&-QF*vZYzWFb zPUWd8|J=DzuF?EAsJvO_`&8bh5)O^?*!C*&Zq@Ho38lk+N97|bpHgYtuk8O%)t^=Q zGnG>+f35O$l|HSSIGG&kt)$y{G?BJ_ zimcc4CY3EJ4^nB{rQ|z7_0v>#s>A_Cx!YClP`O*BjZc&P?^gX5l^;;~QI&V7{G>`d z$AcV)M~(8osB%>0Q!4Qpvfsw9iTt7JKT$cQ@>P|%HaRo^Qw!J*zW(i%2!oRtHkff@ov1%Jk?88{;A)ih-toNl{hXb&yDLj zQT0<)o~iO&l?j#GRpRO7_;;#&kIGwAenjQRR1T`VN9Fx0hgIS#rMxFqepBVQRX(rs zhbn)rQl?X}#~m0ignO0p=Bcby>HhA-fxkC_Ta^4qtHk|@euhfioaozB;?6|BUL|fz z^nR7NC(-X#i7OI4snXhS*|Xz?bc=Ss+>VvjUXZ-S==;Zatkr-GiP=b-tEchJ=jy3% zsIRY=eSc1TN07lypl1sIMm$G}Q%G=@D9sNMx!#@)0q4!@VKW_ zep_|IH|3e|PJ1T&0dLS3@&^48Z=Wyf?eoUGef~CYyRXCB?(g!B`4ZkSZ?|{M-|LO~ z`n^&Apm)eO>>cutdK12JZ^A$6o$^h4r~Dybz#sAT`eMFbe}}Kl-{l+ib^AvB{l18Q z*f;1O_jUQFeUtu}zu({OCpxajaMPdt@7?C{!Xq|5`n%ocU4>6snM=Hw?!n&-a0 z+w>J2(R}3eZgbSJJDPv=>TdJ-CqB^pgQ?x-{1@+SKICV+%~0+W&6z*mZFW?Dzj@{J zyUiDlc)j`FZ|^p>jkzuT|FPSwex#)3`%msRPaV6o<>p6ro9v0&mXAKT+kE4~=9a?G zO1{_IT7GcXZd1^ELQClO-KMMftd`IA?KZK2i(2l!ZnxRKYDY_;d$-Ab_S%-mw}=ei z*z%LpcANXp>1(<0t-DR;CqK|~yxDF3>u0yOe57`_xheW@Ek`WgZ63VzlPw(uyG_sM z?`?VFja}y3)BoP`kr#KFM>gzjdFDTNne{s#Zn^N$U8ZT@Xv_ISyUYW>{c6h-AKqoY z(DIFzci*tfth@TzmZ8KhQ?vK^me?t~%x%B@+t$wk$rhYo~eRxk!A&+jg3a=~eN_#+~MlU~T-W&`$GAq&{Bvs~x7lb#44D zPwy~4J1G|b$~`;G*Dl%^zwezpO#J$I{Eahrm~|gMD1P_G9p(!|o8rmh9p>T34v(+< z`BmnaZyy;idF(3F`O;hBC*OXR`K9;RxbM=djCcO=@!%0xnVVOf6u++GD)Yhhr^HWx zgsJF#G^7xfz-f5ljLq2?^xpwQ>@wZ-dr8#fsdGV3fE6s!NK0n@HbfwvS+t&Cu zf6#628@xEaw%z#LWV zdl%mxH}AdFbbs_C@q*2ln(vkGi635ksrlh;1M#0ev(3CSbVq#p)@|mo_y1cwar`#3 zr|9GH#3%Pr_`t#o718%kI6{eEd6~i$}XIHa|Q5-{V8!i_IfX zeLnut@rz9Lrs4SX%@>)9hrSR`9(Iu#sCy{>@*5YLdq1%^{=WMzG)FE<#y|G<3(dv1 zIPpd07n+LfFUGUSwwe=mJRCp$+O1~(FCK|kHElJgo%L9}WAXyC@*7`@zy6^M%+A9{ z#elot}?k(osAATzSty8v`7xTUv|3uCf^W`01i@)%|`KJ1( zWAXQ%d%npz)bx$``U|?uhyLxG@xhWVb3t%C{?0GH-F#u^ zx8ma$yxsInemnl5`ENI0-29#RQ_1tpmC5hMFM0cU=97`{#d{0SGsoOA5f46auG#YX z^YOgX&o#d}`v>tWGtM=?d-8?&$)7sMT-NZT_&vv*W8QY#kK>oVdbWAM^ON{J{b!qZ zocCh`-seAT# z^X>HoX5$6Nn`b8q%p!9T zu*uC_Zr*k3!R7}aS#A>J2bmL_R+#6HKggW<)fML3W349hyofpN=vH&kZzJaIj~g@p z)|KXsgN*5^t~Oaz#(b-^ z*_=GM#%#QKqj_#)jaiws(fs&yvXT4z2Lt2awGtTRuH)|=g*ZZcPOG?=a7CbRd)4d%zUtTi`Z-e_LQ zSZi0dNn;;*$jdPtOBs|!nUu{rI2Y&S+*||K!ZmSiTqD=YHFNFU1NXu`ac|rs_sTtU z?>qyZ1v4P-mz+)FJ8;b&9%09iy&M=cs$sLFyuPlDbJ9rLIzE zsk_u+>N0hjx=kIYu2bi!`?LYt0&Rk}K^vj1&}L{mv?1COZHl%<8>6k!=4gAgLE0j1 zlD0`3rLEFtZQGSLOk1W+)3#~jv~}7%ZJ$1XzJNY~zJWf1zJfl3zJor5zJxx7zJ)%9 zzJ@-BzK1@DzKA}FzKK4HzKTAJzKcGLzKlMNzKuSPzK%YRzK=eTzK}kVzL7qXzLGwZ zzLP$bzLY+dzLh?fzLq|hzL!3jzL-9lzL`FnzM4LpzMDRrzMMXtzMVdvzMejxzMnCG zv4Amwv4Jsyv4Sy!v4b&$v4k;&v4t^)v4$~+v4=5;v4}B=v57H?v5GN^v5PT`v5YZ| zv5hf~v5qm1v5zs3v5+y5v5_&7v63;9v6C^Bv6L~Dv6V5Fv6eBHv6nHJv6wNLv6(TN zv6?ZPv70fRv79lTv7IrVv7RxXu^$@%TL7B?+W;E@TLGH^+W{K_TLPN`+X5Q{TLYT| z+XEW}TLhZ~+XNd0TLqg1+XWj2TLzm3+Xfp4TL+s5+Xov6TL_y7+Xx#8TM3&9+X)*A zTMC;B+X@>CTML^D+Y1{ETMU~F+YB2GTMe5H+YK8ITMnBJ+YTEKTMwHL+YcKMTM(NN z+YlQOTM?TP+YuWQTN0ZR+Y%cSTN9fT+Y=iUTNIlV+Y}oWTNRrX+tu2zV#{LFV%uWl zV(Vh_V*6qPV+&&wV;f^5V=H4bV>@F*V@qRGV_RcmV{2n`V|!zRV~b;xW1C~6W2vzye?bumKnWtN>;JJAfg;5?~6j1sDUY0pKfx*CHU^1{77!9ljW&^u{;lOfWI zl3+@(B^VQ|3FZWQf6sf zMg}W`nZeFrXs|Sx8f*>525W=4!QNnSusE0;Yz{^TtAp9W?qGPZJeVGA55@=UgZaV! zZ~&q|gf9CZV!!0yOMW?iFUL!Hdnr%K-%I&&zP+4J&cB!Q%k}K#dgS`{a(!~W`?y}Y z{(W4(+|NGlNA7PQ_b2zekNcJT-^cyS^VrApkms|H=OfQ+AJ0pk-#(t7VE=uV0|?)^ zkLN4TdmqnRp8r0czr2rqybpOl`*=U{zV`9H$NQA`yN~xP?|UEbTi*XZ z-oMm`ebfi3AN!~uQeXB_U!?x*qy9*J+DCno`n8YxCG~9|^-b#EKI)&;$0YSp>SvPr zDfKl;eUc6yyB<(@kN0Rm-?IlTjk@l0M{YZOC z(w?M!C23#M-jcL8X@5!DpR~s$?NQoilJ+U>HA#Dw_M4>rN_$Syo~3;!Y2VV`leBkf z|4G`v^an}$1L+@<^bgWsBkuKr%C!#>0guduhQQp>2Ia~P165Lf1IR0mi{?O|1AA=lKxuy?XTgWIU4bDarUG<5iOJO2)4w0jPEkuCmHW${7*9ei#?FU9uWH=iG3jULK1sH?1v=wgV+;E>`AdNlh~JHZzi!f#r{lUe~LYt#2yvLsG_Ns%uD)y^`{VMjXgFP$ut%H3l_O64y zEB3F0{VVpcgFP(vv4edq_OgS$EcUa5{VevhgFP+wwS#>v_O^q)E%vvA{Vn#mgFP<7@R$Q06MW`? z&jhbI;5ET-4){&*oCBT{eCL4g1n)WEJ;8qt_)qYl10EE7=ztFeFFN2w!H*93QShV# zo)moPfG-7aI^a#gpAPs_@TdbG6@2P|PX(_!;8nq|4)|5@tOK4EeCvR31@AiGUBSN& z_*d|-10EK9?0}C2FFW96!Osr(S@5(2o)&!VfUgB_JK$}>-wya&@VEmW7kuu3&jqhL z;B~?84)|U0yaS#WeD8qo1@AlHeZl_@9Dr;)Z~(H;fdi1d4jh0S>%aj>Sq>b4lYf7!Aa&7!1CYAuzyU~Ib>IM`?mBP)QkNY#0IAy!9Dvky2M$2$z5@p!ZNY&9 zkhbB#0Z3bM-~goUIB)>cmK-<$X9DwvC4jh2=Ee;%j z^fe9~fb=~M9Dwvi4jh2=O%5D@^i_`KD_=g@fdi1f%z*=tzRiIHkiO1=1CYMYfdi1f z(18PxzR`gLkiOD^1CYMcfdi1f)PVz#zSV&PkiOP|1CYMgfdi1f*ntC(zS)5TkiOc1 z1CYMkfdi1f+<^m-zTJTXkiOo51CYMofdi1Sz<~phvB7}@kg>vn1CX)9fdi1S#DN2l zvBk0c@-gQ)Z~!v)IB)Vp}?J0Ag!8Z~$U^I&c7Di#l)sVw*Z}0Ai~;Z~$VvI&c7D%R2b8#I|+d z0L0dH-~hz-b>INR7IxqO#5Q)|0K`^y-~hyScHjWSmUiF(#I|i0f&Do@*q`eG`*VGJ^?JenTtC>K`vLoNe_(&^7wpgdgZ+6PV1J$u*q`SG z_UHM5{dt~Xf1WScpXUws=lO&Ec^_bZ-VfNH_XYOn{ek^?pZoOvg8g~lV1M2}*q{0U z_NRV;{i!ctf9em|pZWy$r+$I`sc&F^>fb)Ck6?f5C)l6*3ihY|g8iw_V1Md2*q{0i z_NV@X{b>(if7%DwpY{Uwr~QEaX-{B(+85ZL_6GK+{ek^yk6?e=C)l6%3ihY{g8gaF zV1L>-*q`5stv^iN=a z`YW(M{TJAu{tWC-{|5G_zXSWz|AGDK55fNQk6?fLORzuvC)l6<6zos`3ihYJ1^d(g zg8k`_!T$8mV1N2+us{7b*q{C!>`(s=_NTuG`_un}{TUCy{)`V`f5r>2KjR13pYa6j z&-eoNXS@OXGyZ`68IQpJj89;H#w)Nt;}_VU@eJ(G_y+c8yaW3){(=1&55fM7k6?es zORzuVC)l6y6ztFV3ifBb1^YApg8dnf!TyZTV1LGIus`EB*q`wn?9ccP_Gi2Y`!oK7 z{jmqY{@4d#f9wUYKlTIIAA17qk9`65$KC+@V}F4Cu}8rE*e76r>=m#-_6yh_dj{-} zeFOH#-U0h#|A76mhrs^WM__;KC9psC6WAYn3ha-41@_0@0{dfsf&H<^!2Z~0V1Mj2 zus`-2*dKci?2mm1_Q&1>`(yus{jmqZ{@90Lf9yrDKlUToAA1t)k9`UD$KC|{V}FAE zu}8uF*r!RgSHb?+uV8=dS+GC$E!ZD>7wnJy3--qz2K!?lgZ;6W!T#9KV1Mjsus`-S z*dKcv?2r8o_QxIv`(vMj{jt}<{@Cwef9!d%KlVM?AA29{kNpq!2M>V#!3SV}@B-K$ z`~da`Pk{Zw7hr$z2G}3`0rm%vfc?QIV1Mum*dP1?_6N^^{lPb2fA9|2AN&LM2M>Y$ z!AD?!@DkV``~>y~Pl5fxS73ke7T6#B1@;Gzf&IZ}V1Mu$*dP1`_6N^_{lRx&fAAjI zAN&XQ2M>b%!G~af@FLhB{0R03PlElymtcSJCfFbR3HAq%g8jj#V1Mu`*dP1~_6N^` z{lT|jfAB8YAN&jU2M>e&!N*{K@G{sR{0#O7PlNrz*I<9}HrOBh4fY3*gZ;thV1MvB z*dP23_6N^{{lWKOfABuo->%9B*nQ+tzQ7(!8OkTvvN?zH4ffnzgYpsf+PFsLE9|v% z56WlQd*dFJ@38mIGf+OnJ{z8q@+J1!@eGwuvCo!gtbB`o_Phh-W9+-(9VuU9-yQEz z`5gOhdB@84*mqAIP(H}k4eE&UMYirxhp0=`Ddm@JU8Bw^|77bTbyE2$TUV*G%3s;K zOr2JK%hq-3yz*bREzl;EAG2+RHlzHRZA-K%<=1Rmqs=M*X4@idQu#UCR%x@!-`TcI zn^u0$wsqRP@_)83pifYK(DoJd8Ok5pzJxwS`9<5;(B~-sX!|1iB;_YeYEnmw(q77 zS3cMF?ey`=_u9UnF+llXJ2o&zC|_*H4#p7WlkM2T7^8f%9eWsql#jM!6JwO})pqP+ z3}Y-~Ok-?gj8nebj(v=QjD?Je%8%Qzk}*^Hb32wYrYgT~$6Cf*<=^dC%$ThFydA3< zvz5QMV>x5G^80qIXUtdr-`WD$1nM8KwgNVT`VXuvflZYuQ- z3O0-SFRU$tO{4w|YwKY1sQ<&-LfAy=AF;L)Hk0~KtSyC2rT!IbYhiO?dtrlNi(!+g zf5zHs*lg;*v9=sGo%(mIt%uF0{vT@#ViT%=$l8k7jOstKwj?&C`j@P&iOs40Cu@sh zld6Bp+N#*B*sj)wP5HB|ZHtYo{w{0#Vgsu`%-Y7-$m%b%wlg*~wlp@i`q!+jjm@q8 zH*1SyldFHu+UnTs>c6wLJT|@h_pGgt&9DAHiv_?0>L0XN0nDKOLyINA6zX5JSOd(V z{zr>Nz$EIQv{(hqqW(*ZWxzD*-?Uf<%%lEKi-o{M>L0aO3CyJaQ;Vg*RO(*^`{Qr5 z*b5A%{#c96z-a2Pwb%^|r~X`v?Z9~I@3q(u45Myp~5e%vRWQ#4qnCfq~ z*b@w@{%DI$Ek;fGt1Wf~!>T{qVp}k-`nxUm1p});++t%evii#{b_PSMKiy($Ft+;J zE%pY3t3Tdib1=I4>n(N%!>d2vVtX*Y`uoBDJ#YXT4`8_g_G`R=`K-~co}!EzOF02;qwxs2}%2cYo{mg|56fcxP7;X>d5G(N&|C2#;5KVi8P z%K@a~D=gOn2cYp6mWzP{(D)3?)xZI0{D$Rn-~cqf!*V@v0B}FNf4Cqx0F4i^ToD|A z#*bJo2@XKxODxv}2cYpMmW!f3!cD;eXuOK$uHXPPo`w2tIWCQNvD_CNfX2gEZVV1U z<7F&&1_z+=G_)_vv1z=G<=)@`G#srV_&rP80mt-=9lyp`o%;Q%xq%W|`D02;4lxm!2@jpw3&w;Zp= zds*%m4nX6xHIXT~3mN3+~C9Dv5FS?(GRK;zjg zw+#oN@otv;h6B)eILnR00cgCO<<8*%G@j0K>u>-XZ)dr8H~_)^mXn8@hXc@fJ<*QXIftk9Dv4eT3-$vfW~)X?^&OZ#(!cDTAz@{hgx3|9Dv4;T3-?zfX0_vUlSaF z#-CbW6dVA)DeO~xRoJWeuHXPPp4Ixc-~cq<)%w2R05l%f`o`b@G+x&F&fowvp4R%- z-~cq<*81My05l%g`sUyOG+x*G?%)74p4a;J-~cq<*ZTh805l%h`Uc?uG+x;H4&eYa zp4j>p;Q%z=*!mvf05l%i`X=E3G+x>IF5v+1WrAn$ZNdR)ytDOv!U1SJwDpa`0cgCm z^_{{2Xgsy`t-=9lytVbc!U1SJw)M@z0SI2RK3k37w!U0A0FCbk?^&O(#(!I1FdTr! zhg)AU9Dv4;TVFC9fX0_wUo#wl#-D>ntxsCx)4{9OXRYz;)|U+jpz-b2*9`}t@$cYa z>l4@bcN1JL++>r00N(D-`mYlj2S_&u4&(D;7q>xTo- z_;40&oDt4!|D}O8^HzYytcNu?BDe#2&yu5Q_i@Kx_j11hEQm0K_i9 zUl7Xx2S98C{06ZOZ~(+Uz<&@60S7>A1pElG5^w;5{cQ{du@rCs#8$ws5NiPkK@KMC3zyT1e0$)Y!3LF5jEbv*xw!i@p>jK|J>?0 zfzKnh2M&N(ANW3Ef8YR!1%eMGHV6(tu)l#XBz6c6fLJ2 z-~eQ7GjIUJy1@Yu`v(6_EF2sFv2kz!g8dDAIk9ta0L0S4rxRNT2SBVHd^@psZ~%h+ z4SYPYd2j%N{SACQv3qa;g8dDAKCyjp0L1#i_Y?aE2Oze9!5=_uARGX(g7^!F9fSiQ zmJojev4wB|#2VsnAodUrfLKKQ5yU3K0T8Q*zk=9BH~?Z9@n;a*2nRr{BmNFzAK?Iq zg~T61Y$O~2v6A>ph@FH3AeIt;3bB=N0K{72ZxP$e#$XbQ2?s!ICL92k0=z>?{5+VqxI`h>gWRMyxCx0I{?9 z&%~BCZ~(;C!T|{OH~8C#y@dlH78idUvAJ*n#OmU&BX$=KfLLDqdBpa@0TAnpzfWv` z0|!7XF#bSdgW&)KD;WHR#16v&5KD|dk=SB50Ah{tHxhdc2S6+`{zzhz;Q$2t8~l~T zF2ex`_BZ%5iEV}h5bSU8cM|&y2S6+|{!n70;Q)x0#$QV8G#mi2)c8}0t%d^-tYu@a ziM_`EDp<_G0SNXt_-6&H88`r9xAET+%MAx0*x%saCDt1bK(L>||4S@5900N5Z~%f8 zZOk~a%x@5u`3-_HzdJ*V<(2o_3jrp+lzo>y+s?x@0c(giKGzNz!dg{Vn zPfo<^St;|cEs!~F*0*{+nQdOrvUaa$zRY2>w$tmG)8+N7Nq9Yry1ky39dp!*UUQgbj*RyKK>nR)ddNz)DJ=vpP&x$dxr*z!wSvTSJ6i#|QwNqZt;%TqP z1bjW=psyzw^7TZ+zMeqD*At2QdO|T@Pps9~lhNkuscQH26nFS~8asVG`CY!A)d^ou zdAF~px!2cI+2`vi>i6~35BPd=2Yo%&L%yDc!@iykBfg%jQD4vUF<(!~xUZ*a!q-zU z>FcSP^7T|q`+DL5f6tPjzh`d9-%}U%_vA$UJu9RBo&_;~&-zw>PiC9HXIZY+cr#**d=?vvqA}X6u};%+@uD%+^KSnXN6onXOCvGF#{MXSOyB zWVYrFX11;x%4{tg&TQQ{lG&O)n%TNyEVH$AJhOG(L}qK@WM*saRA%eq>C9FW$QlU; zvqplUtdVFqYa|fK8i_=+MnbWykyu;SNL72*NO4EjNMmQ#NPbt=$m&GaNO^bGNON!2 zNM&EvNKt>*Nc}+8NbX?PNcB+G$im^Qkqx6+Bg@CKMoPxBMw%wFMhYggMrx+AMk=PW zM&g0&ktM#9$DI#Ju4wm`V5JrFML2!tCu1L6FxKzMZ` z5H9ZygqwQ<;mW>1xTrr6t{(`5a|Z+A>Y+e*;cy_lVKfk4J{AaM2g30{PIyT$Cpc zxdY|hxdY9;xdWAbxdTQ0xdZisxdYWhxdRJ_a|bqz<_;_$%N-~g&mCx*$Q>w{%pIti z${nbf&K-yc@&=X!^9JUI@&@W6c>^n>c>@b#c?0X)@&=Z*=MBv7$QxMOnKv+}D{o*; zB5z<(ciuotZ{EPtzPy2X{dofogLwn1hVll=hVuqCj^+)l7|R!Tio(D8Dlr$?uFr^E*Sa{LWZgerHvCerIte&^~$erI`i zerI!UerIK0erHjCerNq)erNSie&@pB{LT%d`JKzh@;gh$^E;a+@;eJA^E+#%@;fW0 z^E=~#Ih{*_b2{gS=5*FY=5(%%&gonbo71_zZBFO1_BoyNJLYt*?V8iMCNZaTQTLqA zmfks?OZ(<@&g-Ak*)TY#bJftC&a&Y-of}8zbgmei(^)z`r*qxJoX*0@Ii0mrb2=AK z&*?OQf{AdjU?LbQn21ISCL+;-iBPOyBGy(gQPo~BQQT25(b!cmu{u#OQQloJ(cD`w zQQ228QPf{BQ9oEPQ9V>Jv2eIxV#8>`#PYF%iIVYxiKfYdiJGZ`iHhlhiFlxJVo9)Y zVs5B#qApT6u`*gXu^?7BvA(TvVp)6P#QcuJiM3sY6KfKM6N|bFCt7+7CzkdVPR#2s zoM;#9LH+JeEV_F%BMBN%M#3I$b(3?0 zwNrD0i>K!XO`xbR94hLIMvD3((W1Uktf(*6R@7J3Ues6IQPkJiRn)gSQPfx7UDVgy zThv$CU({DWSkzZNRMfX{xTtT#Xi?wtv7)|`@uI$_$)diRsiMA$>7u@PU|!#n(7e97 z$h^Ll(RqCfV)Odex6SKY);_Oqe#gANwO#Z2)+FZjE$W`v*U~$$Z)yL$zJ|eheXEA% z^_30J>)SXwuW!ZJyuQ-$d4209=k?W2&Ffn{J+IFMird4X;`V5yxIGdrZV$zZ+hc9T z?NuGc?TuZU&2L|mnBTsrdwzRM z@BH?q{qx%!2Isf08k*l;Hax$5#cQFrNBOK<7e(*Dx1hQZRYRYRp?Wy7Uo8%ImWR*aX9t(z;j+SrAa+Cl(HscP|`j?p-)k*}rh8esJMX_3*->4WkQ(mX9wSYMNX) zR5P`3sA78IP&`mJv?NqER2L~5S{W-FTHjVSw5+3SXl+;7(3(Wq(4y|Lp_bmVp{4z0 zLk)vvL#u|%hBl6t4Xqe28(KG6HdH%RHne!UY{&%46X8&KA{r@AL}KNMSX+6bs-ry7 z*j1ib-Cdq&?k!JL_LnE>2g?)H!{vz$qveU^B_$?``XwJ5Qsdr_jLcTr+#|Dr_0;G)E;;YEp!ql*$N#up{lO)g5* zPAy6-o?etNfr_bcsA4J_shEnyDyCv>6;o9m6;q8}6;rFbE2f%zE2b*@E2ioPE2gT4 zE2cJ#R!l7)ub66@teC2qu9%7k7Edh+EuN~2ES_2!TRgSCZSmByj>S`JyB1Ha>0Uh5 z(z|$SY5(G>hQY;CtA-a(Z5&-ZwPJkn)Vj&VQ?=8Jr%Wguh(^MJNGu$PwS@y!9pOM@ zS2(b`I~-{44F@Xw!-4w2aG-iP9M~`#4lExJ2bw0sftu-XARby0sEaHKtc)!QtZ!Qq zSk|#5u(oSSU`_XuKuhnEz|#IDfrh~)fmOpx0vkt{1XheM39Or35~!VC5-_34-e{z< zHxjGtjkQ(wR&`YNHg;9^uI{evZSJq^tskuHtsbuI-7s3&yL`N|w`sDnw`RJsHy&Er zTNhc{yE3-4cYWK^-enz2d)Ia??OoHow6~>yX>Y^e(%x0WOM5qtF6~`0zO;AU7~6URMi%ZRJBE7Rc*13s2SG6@wR<+ek zSGC1M%i8K9%i31PmbI<#Sk|_-YgyZx?qzK){ma@K2A8$18eZ16adcVRit%M_>n4}A z)lM&KGoj_9(a7@ANNo9NtYi6TW7qQ0)!oZSoBNlK)(Z!v^omgv zibSHZNF>$~i8OXaBCES2k>>tLq<%0GsUD6*HjGCiO_PyG&2%IZ53P*U#a2evcdU%8 z?OGXG)4ej%(!Vm&Ft{?ZYItR2GA z`>O}*hpPuSj8_jfO;!)qOji%aL#qbsVygz%cdQy*+qG(NP4}w7mi|?P4a2JjH;%6w zTsOIDuy%UYpb4$+ipExV#X44ZHFmG=YVKd%RX@DCYs2{JuBOS=T{Y9IyW*iWU3IZF zUF$p6bgk`P)78?yrmJCiP1nZpHC^i_*L2lRujw+On#pLaW-``MGuhZ(GuhlZx?WBoCL$Qu%sIfa5 zYVMDQ>W8DD4dc;J({wZxkJW|NchrT}cGrbk`s+ds!*!vJ<8`5R({&*etM89>)b}@b z*Y`IM*Y|H2ukUY~uJ4b>8v56FH1x0SZs>0rZs^}Q-q62px}o318ara$jUCOyjsKUa z_W*ZXt?s?OyLQ*^+FjE%UDGwQ_m(wX(=}bwHC@v+T~oI&0b)qtno#0!xrremINc#6 zQGjFl00~au1K$vGoCJaiBr)Vb{1Gnk2juc;y|b2l&-0w;IcH`U+mhaQz3cz~|CYI_ zxYk@>U2Ce!I&-7D&YbbqnN!7e=7#DzGpejFD(?E?w70&vsk*+XDjSL$-3`SVZ$oja zx}g|#6=m8}lucDdQQeKojJHvls%})G?j~=#y2(@BDQ~7a?|`3?OFeuG{EXn+WAHQJ z|KVrA-^0&SEY33?4) zfO5?R{f2yiq$~tIhhi{BpcM2S%E4&vO3-_#2BTObbpZmrF0zHMi_8`3A{WHENUs!3 z0F&z?tChOQJ*_U%rq@Mw8+DN-W?kgERTmktgRxvrU1XD67kL`1i!{gUB0Cawk%h^+ z$dy!GWH24f0L#=x)_Zl4N4dI4SH3Q?zfc!hQLKyHF4aXQ%5{;mmAZ&pt&6LZ)^ z`p6uiK5|~HkMv0Ok%Mx5WR+4MxvSMjTJ`$KE~7rO*sPCSv+5(mc75c8QySi z>LX3@`pEV~ePlthK5{u#9~ns3M~-IdBkR2S$irNHq%&V1*;lBKEHBnaZk6gIv0%_=ydknP(GXdbY=~S}IJkHdbzoovt*-rmKyy=Uh{43*Qu*D>TI}h)uCxsVR0yZi=l|nqv2~ zrdXTa6x(ey#g>>&vFlb-Y{YJgophRFo7|?@(^yliIo=f8k!Xr7Og6=?q?%%b>89AR zOjB&V*A#n{Yl?N{n_~M5O|cclrr7OLQ*5H#6gyjKimBD6*h{WCwwZ5^%@LYo=f&n& zkJKDHC^yGeDb2CFT63&bZ;tIUnq!O2=GZl>IW}xJ$4)rSv5jtX>`A;iwms1tTaavy zT~0N}2GY&3qnYN|I&k?Yh;fjo7W)NvBoYvHVJ1DnltCTkFuHL5YGTOAoW}9}+YSV`8HtmGdrfqcFv?uX4 zZF{0kTaawiE~nbGfpnX8G}ET7^V+nBxi+mc-=^&=v}wzWZQ89;n>Jo<)6P`dw3%v~ z_JV8Iw({-TJfU5?D7I^TQoD9oZr9c*?b?04UE5={YfH^`?S|E^joR(nDW_eVa@)0M z@pf%zqFq~*Y}c-)+O?r{yLLR&u5Iwzwa2-3tvlbY9VoPGD~s*gol?6tS#HBu>HM@~07a+2ARv#pMtV0Yw9rz5Ah9XU7N zk=vH&$jwi7uO2ZmrjmdywzQ?JacVmK8g4H%lG4v2sW5bfqIVUG2y{ z=Q?v+_|Dv1p)+?u?9BB_ow-ADXKuC9nY*WV=5`yMxg}<2?z+{P8?ifcC!NmRCbu*9 zG~Supk?71VOm^n3q&jnh>CW7-OlNMr*O_~i>&$iKJ9GOBow*go&fM)%XKte0nLAtQ z%&FDR+)J)2x0&zC%@MkC=f$pEkJObrD0k&nDP6g{dRK0j(Un_lcIB>FUAbYqD|f=_ z%58MJa!=x2x$TLr+=66R?sBRtH<0ei9nEy*)_GmIhxxADzCu@Sd9f>ZtJIYnFL&k6 zRJw9A)vnwNt~uyr{Um=*D?* zTY?woCwcKwiWmFSym%zTi)%eze30kGy#-!eR^-K-C0-mW^Wy0WFHTo^@j2HcZsB{x zxk8V4LF^HGr5^E++#{}5dc=ErkGR|D5to=f;&rP>9I<=ElTMGg$?XxJ#(Tsai5_ub zvPZm<>JbOiJ>s!UkGS6J5g+Ay#QlXHaYeC5yj|)MC(1qI*-DS7R(r&kT(7v9?-l0= zz2bSPS3D^9imQ}f@vh!0?lOAC#b&Q~&FU40?OySO(<^Rtd&MX5UU7S(S6q1uJd}uhxuM{U!hlAUhEZbm3qbTa<6!%(ksqXd&L)ApSYFp6Xywi;zg-X zJS_K#Ym`3mzTPM9G5W-%W}kS&>JvxpKJk>(Cr-J2;74XwO)VfLB2n= zx6q$jR_ssREcK_x%KfR+mHyOpwLkTo8%S;82U2r|fz$LoXr+RP88<_LqS^U`4Ipgfpbr3|L->Vv6W#$al( zIheX;4W@?e!PE(7FtyPgOg)JYrnV;rQwx%VsmtlX)X~gfYMnQjdYB(f?JEqXmKO(8 zw@QPl@$z8mOl2@NQyomb;D%CL`JvQ2VJLM`8cH3Ohf-^lq11hSD7D8JN-Z^qQa7xj z)Tlj_I^_(drre>_v-nVIXJRO|C^?k6njT6W&kUtDctfej`JvQ-!cb~uaVT}CG?bbw z52emkhEmb$P->PFER7eep!Z@~l3*FKV9APLIl5r!hG0piVA-}{nT}v7u3))w!P=G( ztocd7x|9~IBN@S3>j~C_ykPAu2-dQqVBIVU)>v7vPFDnLx++-DxnXMyKWxnvhOG!3Vhtx`s; zyZVT=%NVg1nu6@gTIY>e5A!3|zQTyL zyf|XrDvem<lwRR>(twqUE>uP$`I-VJ|Hh81fr z8MUI-QEQePD{1^#Dd_W*ENQG{$YUj087n#ZSV=d=N|HHNvhA^w>5P>WcdX>b$4c80 zW2O1YvC^gVSm{V+thCk}D?P}MmG&0KO3R94rJLok(&@@rX}UUAdd`iPw(#Snxx#qq zf;3(_B#)O?E90em`gm!#F4Y;;+UQP{p2R0g+Y=L|1<8rh<@7}9XlA0c&YLJb%ukf| z6(&l{ixZ_=<%!an%0y|VI#GJTO_sLulcjmWWa*+bSvo9FmewefrThA1X^$~kT53*~ zZrGEhQ_f^*%AG7di%*tzCMHXZl9Q#Y>B-XZ%w%bUH(7d|pDZ0HOqNy_CrfwAlcjT& z$x^gBS(*)`CQT4|OA>iQ7I|3_c}Ev{-4J=n6nWbgdD9Vj#T9usF7n$FB0oPV@|V&g zeL7KxKlIQTNl{x%9 zeGb3dn8PnI=kV9!|0F(_-=3JuFG$YiFQ@17M>BKzb>3Y5VSX;ZuP~QiUYyI{D$nK5ROa$C)w%o& zZXUl?n8#m~=JAK+dHfn>9)Dk-$L}%b@k`Bl{0(~^f6AH1Pr38>XYqOb&cr-^QF0!C zH9e0%o|(sQ@aFN4^Yi!vg?aqS;ynINc^-eRGLMf|=kc@L{DdaVPgv6YgdxvQ$jbbL zqt8$1#{7h2&QI9({DkSuPblvEgd3lq*p{51xRjosIFgy4SnJJCJjl;a>@CbsEGy1W z+$_&eoUY7IOjqY8o^uNlTZ9FP3(|tbA$dV!wXz^_PhXJOZ7fJEF&8AR+Y1sWodt#KZi;#J%8L@`DvJ`)>Y~IfCmEU`8I~j&hAbIDPtI_3$8fNr=N21VgvG`MX|ZugUTmyZ7902U z#l~)9v9ZKlY+Sb&8z-H`#wK^M@ie~J*pXapTuCoBj%5}b>%GOsqx@oHe_^q)qPW<& zU0!UQtt>Xw>SE(1x5U^iEHTbYON@i^5@VIJ#JH<3F?N|tjBEB1=0JhRl;;4L*C=a(7>3QLWZ z#ihob@>1hmWvLOZE;VMkWd%)GROQwM_*RZ&1D7KURE%jWd+4uR&e9X z3fq#)3YXH$3P&=_3TwS(g$Ma%g}udPg`4GNh0~Q~h3V?D!gFqUVT-W5a6wvLI3zDG ztX7s6?&-@5yUpc=>-O@(NoRRsle@g|G`_sBBe}eACB3|GEVI0@-dkRHlwV%hUszsP zQCwcQU0z-|TUlOEtIG>7xfO-Y!ivIqX+`0nyrQs5Sy8yFuPE#?R}`+h5P!-!X9&F;fB4kaLQR(m~vMZp2b%db|zOAuBKNOj%QXDHh3!wkMk=F z2Z}2TcgiaZ=PD};(dx>=EGNraApZn{v1}-^?C7$ro3d=%vTQoCthlo5#$|b1QkE~J zW%)=(me+c+{2(vOdyBGsvnbik`KwNxLUqdUM-)gtd?i0tK}Em8hNX*M!qPmkq;|td5^h9zG1JCPdRJkDR+(h zEWSqGnOq}ZO|OxUXV%CYyfyOU{2KW{agBVZyhc7(StCcQYvfsOZAKH;W-MuK#!%K~ z9DQv@H`iutdu_&a)@FjfZpMwT&1_4q&0I>a%^dO8W*+3%X7(1>W^R_(W=>buW~Qra zGtaqonJvP)%mry(=8&>3b5CEF*=?@NT({R{PCDx{o7{Dor}1@}9m#c>E9rHaW0`fC z_1?P7qx`ze{^GjK?ee*Jo~(*JsXD)@Np_>oYI74VkUNhRj82 zL*}ruA#-2fklABy$lS0uWKKC7GE?q`%(M80%+BP7%+>UU%yDl+=5c;Q=0I^n=1zG- z=3He%CR*K)ndKBm6BNgi6vt2$$I%r>HxauYWutRX-{|Z%H#*ntjm}ADqqE7~=sb;Ybao^+ zI#<#gonzic=TUy6v%k2}xn17qoULqh)apj(CAZ1hENpVlOPid7$|mQozRB5TZgQ^K zo17EwCg(|fle0a!$+?`~2Btp#y4|2lAF0J>CN0RZ!`BOznR-#+|1oBZ|2TcH*+tAE!=r&3wKc2!rj%kaJ$Sc z+%I$m3tQ7%I!>U<*uf;a>u=`+~fRK?m%%Xcc;9SJ6GMx%?jJ%mb5Ky zDBI$WzAdhs+v2vpEpEEo;%;(V{8D;b{D`+L{vf|CzPGq7ezUwSe!99X{#@7|zaVXo zA5yl*@9Ep)yUp$K>-P5eNq2kvX?%NpM{;}oN_uO11Q%pLJ-_Kx@ocSrn5a!34fdPn@IwAzaze{xFde6yd!?5 zx+DHV*crbl?TjB*cE<1PJL7xIo$(v?&iE;JXZ%@mXZ&hbh;~y6Nh=o7DA7XH34buJ0}C`pvSgpRVfqb77Z$ zLE5DsQg-S0^j-RHbC-VI-ld;(cj-@)yYwsRUHUO^m;NZfOW$AIrQa^^($7|R=`V%d z`gv)$eo)!1-!*sZ*X-T;33s>tB)MC^oZhV;^>*tI^SkwZ#ohX?@^1Z1b+`UP*rQ*R z_UMO|J^FofkAB16qn~p3=+BaS^sDJT`f+cM{y4u!KTzDG-zo3W&sF#6v%=oICGE`{ z%HF(V?#_mS9>`x!AIKl~4&)yf59IHZ59H5P59DVBL$VY@a!fl7;v5dYU{aT}dC5j(G>AN5zBE?eanC zZ1te@QaB`?R}M*c%|p^P`;c_PJtRFz9+EDn4@pP8L(;?IA?a56kaVVcNO~b0mM$uX zrTgY#>4tq+I^`ago+S@USJQ{3jkV zgyZRp%JKAl^LYA(eLQ{2J)VA+Jf6Pl9Zx?l9#7vXA5WjF9#78-rfn&v?U<%*yQb|X zP5Y8(+7F7ReY0%Zr>my@TsUE0P)^wQ%oFx?`-FYcJz+mhp0KZYC+tVX6ZY-$3HxmI zg#A)DX`fe4+IP*9_BHpU{UmwPzU-Z}9~MvAx5_8&Gu4y!3*nS~Q8{JbH&59&+*9_m z9VDqE<5JwvhAKOyUEk#OWx`7gW~D(&Fbm$bKy++ zf^w#O&pcDU?w%<>O`a)V@y?VV70;A!m(P^XR?n1Q3TMmbm9yo$=GpQ!_iXt|@@)CC zceebnc(#12dba#RI9I-?oGafq&y{bu=gQBL=gL>TbLGdybLBhLbLCmZ5**VKY}XRp zq$OPPEa5@X5^h#4;kj^LxS*UD?wRL>>+X5sY4W^q#XB!NDxMc^SI-MCl?%dM^MY{A zy&ybEUJx#O7len!3&O4H1>uEqQMhkj6mGZ|g=fi&!d360@VIzUxKq6-%qo|Xj(I6* zyO)x#cPaUxcqw_adMWu_xtzRbUQS+jFDIWSFDI{fmy?f*my@@vmy<7*E6Ka&mE<+| zO7e+!CHb&;C3&lQCHX?Rn!ImbP2O;?CZBm%laGs6lXt3Dle3C#I<9THo^3uT+UCuw zZ9Z47nfJ_V=5_a)`P92+J}O=_Z&$CGFO}=&UH7{A#Jg@jEM7NnRj->blpE%K_lEh* zyJ0>q-Z1Y}Zn&7$MpEV|y!;)CkV;&bIz@t%9D_|&^qd{n$uyj{Ije5u?n-gR#m zpLn;6539F}FO)mQ`|h3MGw)9EarI7d)^!xubCd^FM|rN?RqnZWm8afaF_MTNA zd$U#7eeOPSpH`o^FRM@87u9F(Z1qJI#!v_U#2~`}Id;f$0MijNEx@*fY!BpnA>#zB zQ^5a4D(=7%tf*9g`a^r8TPZ`cVKQ}27WiZ0?JWPo`iBWlrN&3 z73Iw+cSrd{%3;~`>Aj`q#IRM)cG9JiFfb0h_AR!9^Ovos(Ap>3lWJQ3N0ND}XB|w%0 zn39k!0mdX`O@KKG^AdnT30V|iQbINb7?qG!0cIs+SAby&S(X{dv;f-@GA_tVhywc( zGBC(XfNTsfGQ;}}c?poE0j4HoYk;u{SsP$(LiT0`GC0UffNTyhIw7mW=5^5g4&)_3 zwg(uWko5uPCuDzs0SZ|l;3YsdNQI10kQD-EC}f9#AqrU{6*5K0OMt8qFh?PKq(TM> zc?pnB0!Arhm4I0a*(G3@LY4`brjTs{#wlc-fO!hpC*UPO77BO?kc|RHYWRF1F9EVt zz)OH^6);vIYX!_z$X)@16|z_=WU`Q#09h>+GF!+?fGigN>>n_IAqxmhV8{jnBN(!RK`w#K zO8|y2WC?*O4B0|p3`5osn8T1gR3U>1EMmwcA};~5ioh&}>>}_IAj=561jsf5;~27z zz&wWRBQTI53kghQ$VLJ$AzV+9mjGExU@Akl5*W*nwFKreWG{ii3|UNIGD9{K7|oE? z1ZFd2H-X^{Sx#U&L$(tb&ye*5<}+kJ)s4X^4p`8T2}NE4WJQ4)4cSo@GNi~$h$1fm zvZlbChU_UYs3D6AOzJ4GsUf3^yo4yQt8rceFs&imszSyUc?pnxRUre5yadR`0xu!l zN065QSz2IfL$($e+mN*d<~C$+fx!(~TwroTHdlp=F7gr}y9*3&$npX&0kXZoOMt8| z@Dd>V3k-0`0s|8qvcXZv2m>n|GQ-GAfGjaE#UWc9g^V$<#&KRk6f(%bB8N;e@)97c z49s%KE(60Hvdq9Vhio%2&LQgz%yY;-0|Onh&{4=lBQGJ`KarOJS!!UaN0FBh1=c#w zO8^EtWU+zC4%uvAv_n=KnC+0=jzWeTSniPNMqUDBy@B}-*>B(_Ko%T$36Kp3Mm%K2 zqmUU#UIJvvfhiB!a$w9u)*P7gkUft=1|3-RkV!{g0%X;JSr6HDVAw;J9hmlzZ3kWg zWZi*z57~EM;75^{0NHrpC4_YYu=629kGurP)&pZ7vi88-hwMEt_#ulQg-kxM`5~i^ zyadSZ11|xx{J`{wY(MZ4AnOmzf5`sB3;wFfl+|G1Yj4y3pz)S;R8^DZ%DDo13eE>5MfQ0}v z5nx_I6z3(dnhE|J{tS5u>}%nBke9%I7W_=)C9vNGzY}>0?6tsaLS6!Ut?-(Wm%!c& zyeH%(02_k6XXGWY&jLOZ|TX? z7I_KmUWR)bc?mEtf!*`SOJL6eJQK)EV9yFXGssJTc?s;9LS6!U*5H{#UIKd-;h98U z0(({iUIKe|ab5y@rjeHrMP34{ouNiWUIJSiV2wat0$V#^4MAQ4TU%g_L0$q|dtePh zUIJU2V2wgv0$aOa4MSc6TialbLtX+~`(O=3UIJSiVU0vy0$V#_4Mko8%u8TvEUdM# z<{~eFt;Mh=BQJri)v#tGFM+M)u%;s~0oXXeOJHXRsLhd=0P_;q9)Y|Bn3urz5acDW zy#?nbustVWC9*vTc?oQ9f;|d(32g6zJq&pXzye}>9P$#_-UoXi@)FqI2zw;#m9S?b zFM;i)u%{v~f$g=h=OQnG?ZvPsBQJsN)v#wHFM;jlu%{z0K}B9dcpgGt0;>(6MnGNy zs~w<*Kwbi?Euh9gUIMEdL|y`` z4WULvUIMEfp@u|W0;?^d#zbBMt39CxMP351yjYEjyaZOeLJf<&1XkNZjf=blR{KH? zjJyO^8{@nLRx=|nfz{GbQzI_{<|VM28+i#ZFM-wM$V*_gI@IjQOJKD;)bz+pfO!eP zO9;=u$V*^n12`ifFM*vM;0%Gh1a`K7GY0Y!*x3WlAjnGqmK!^xATNQPUEmCZyaaZ( zfin*B64==X&OpdZU}qyZBOxz=ot@weg}ek{(E%?3<|P0x0p=yJGZ^v`U|s?{qaiPW zo!#IJhr9%Kwu3Vs@)B5&0nXmYOPE1k0y`_>yaaZJL|y_rTf!L=c?s<731?8`C9tz8 z&P!ltR^%nHvn-rxk(a>Ex^U)2UIIG{!|Eyb9u15YK}67R0+C{sr+ch>t;i z9^z*ZPlNax#M{98DdchB{l;b`;=BaL?;xHB@jZz5LHrNmfe;^rcp=0OA)W~FMTj>- z{1M`j5TAs2CB!cwo(b_yh<8H#6XKx|ABFl`#7`lf3h`BN{RsIh#A6{o3-MZTJqmd) z#CIXy3!MFd|3W+%;=>RxhWIhWlOetg@n(oWLp&Pd(-5zQ_%+0{A-)aqZis(FJRIWV zP+yPuImFW;z7Fwrh`&QT9^&&5uZQ?O#PcD(5Al9*KMQ$4#0Mf?5b=ZH><>I4+%H4k z5b=kIM?`!g;uR6UhmiS!6>%w|8OFS>)dlB!8_+P{WBR&}M!iXP6 zJTc;n!Py^pV^~jzJTl^w!Py^pWyCKdo*CBbA@2<9d7pS_#7Cq4HSyDkrxvi);k*#? z)`-7GJT~I95wDH-ZNzgUz8mr0i2p`BIO4+*FOK+e#FHbw9P#FeKSw+|;?ohYj`(%N zvm?G8@$QI!M?5^@<5Az9_<6+BBfcK-_K3enJU-&{5wDNS1HcOm~2`+FfDmGmj% zr(%CF{r9Q1n2?y#Q!B8F!sA)UIO$0LVhsz$9>`pWB)wl4`Y8l(Z-e?H_J zWB)$nA7g(%4YSdp~UIOD+qdpVztx>-T`PZoLgnVq$VTqrO`cTN%M*S${ zZ==5C6Q3LPC!hG;#PdeI%18Ywfhn~0GcO&dU-f+ z0QGdA<`K|*0@UBb`2{r30QLHC-T}=&Kz%=)kHAGDJRga0LL?%H0lz>Bm<4jcDNq77 zffn!(^?-$F1RO*&U?5rn|IiNDhfcsfbOYvLEbu49Baxm&B+{CUM21t5NK-lz8OTH; zon9m|o{K~p@{veiArfgXMk1r7NTj74i40XDk?v|FGRf7&c)l*i33V|+tcx{Db+LZA zF4m#c#m2O{SiN2s>ow|PZDw6;#Hx!m+jX%)r!Lmz*2N~`b+MjAU92@(7aLC1#hTJ} zv4KootkbKDjpyoO4f(oQU!gA6UaX6amg-_H<+|8Vr7qT8t&2@^^%~FDYn)K831Yq0 zDAjBIa=q4})N5mUz1C~gYi(w|He%Il&33&u=+tXnZoM`Uuh)7K^;&DPUK>u;Yfb5T zZ6H&xb$a#Mc&=V+$k%Iqg?g>MSg(zi>a~_~y*5;-*Sf3q+9cPI)u_4ze zHRSr`hFpizkQ>t*a=k`FuFY)7jaUu2X1gIb=rrWI+=kplydl?~b5$iFl*flV}uMla1nVs!?o8H;Mz9MzPat z6vy+8Vqc+AY%ey7qoqc%rQ9eERT{QsViR5+}5j1gWLeFSnFBl$O$%-csr{T1stZOKHSzDGfR;r7pLnG!btp^(0zK zt;v?saJr>5kZCD(dM%~#d`qdX&{AqIwvbzucPWP+AjXdTXNBXic=4t%-mykQj7Y6J2g=Vj|v} z=t;IFhSRNyflOINfFpWZH~Qugw_Gw;6qfHlw}RW{j5G zjG;=K(OqpbCb{+kFSHi~slCuIw--8;_QIInUg$O33nO-WVbEzWbh+(?iFkXVC)r*Y zPPZ2ZGVO&sS32Y|y+iIbJLD0& zLmqTGFc&PY^ebJ?nBL{|nqAI_-Q^6rUCuEq6IXl`f~d+T~1g-4$Nwt_V_hrC;f;jOpE#UbDM0Vs}>t-R{anyt~qq?5+%_ zyDI};cV#@^UFj=!S4PX-m7!{PWm4cdLE^c7h3Cd}p6fMvZp7xfL6_$y;yl-raoRPEI#g}%HX_2v7OzWkWkmmjhF@`G+)ej?eIA5Qn>2fV)gc(E@(TJFma zRr~UjLcbI+`J^$kUmCIdr9rn}nn?Cb!|8r$!0VUBi~Z7QxnCNp_Dhq(Kw3}+(qra8 zI>?Hr2i<}6L~I%rP{LuEl3Dvy~%zNJdqqK4|_x9@#0WFzgA! zcu^2WtAa483@69T;pB)roSg86ljFtV;)pp~9Wf`B(c+jp zTAc7ki{sVN;-ovKOn76;cy&yfbjQ7k>bN&qop2{3?4MZlZ@T|-)0?jt$jrz0`WHSh zwg3O}^T~&QGS&Bg`TFX=w{m*pPZ>*@X#^4Z!u0F^U(M&IY<%bR@BXOf_ZvI;>(kXA z)O>&c&%q6K^)mME;R6pP827J>zFK zyixN9#@ohc{@0foBbsR+KT0m1`Qqnme!-tETtBnKulWYw^NB4p-~Hp7fA9}BADHR< z-I|YZ@0U)^yywF;KjDRw_Kf?1ny>IX|NLO)Gw-bV3vYU{nOiSwKEwC@*V|{F-L3fz zuWxzR%$pZ$zQccg`+H~nqc#6w+ZTRi=7&3KKEy9~rDoo>q2@=F5B=uM&o8R^5|_UJ zcW1smSo0@->Wz=j{6^Dk=u`aq@Sn|m{y%Dd#digx1^0fFF};~q^%o!d^O?0@s`(e+ z{`D`+%zlzFz?rs{AOGu_<-f_;;7s#+$C={H%zJ9S#?O7|A7}pXS-g0V~Os(Z#XUC?r_UfQc}`a8zPXPU3#9#FrKsrfqJ@e7C4*MGj|?=*k) zs5*AG=JWiGjH!NoP0jCl{WGW3#@3qeGyRpb>U+MHSweMcdXZqWpd#gIF*8Ha5(BH0pvGsB2JAM6&Kd*l7Z)*Ni!+3`}|JQ0h)OUX6 zo$8x5o2|e+1GkU;qB^>|=1cu)@m=a4{g};SU><|jr~bS8N1v(rRQazb)UkK6*$vE- z@V>LZq<+t+`BwdJyjNW`RP(RC%X+{1mtSKuAegry^34yZU;Qwf4Z%DQgXfd#t}8WP z>z7KuqApre^S3Ut{)c+|du+x8^G=B0_>el8VY4Tgr@}k)tLnykHQ(#^|KZov?3$YY z^)n|vtp4r~*$fNj%~9!kQ~V?K2n2-O=Q_p;&=EJ@H=#%QL8#O=fpS<}g_21^ye7V1H;WhQEZ`Ay`|Mo^! zUH-0`Pxq^PbLtN^*ZjKr>#wWxf5c{*FyHRBb)QxL{I_cU-F*6U>ffAZGfih52{Js3Wzf#Z6tNDDFed`PA`@d52`~KD8|3{tv zxtj0yyPy4%dT4dc|NG801@(;*o8iK|Nx%J(|D}HM-8Db3-t!f8^>ob_d};P?)RynC zSuo7w^j~j&Ro(mknoqdzgyk1vu2owYSpj) zgZfum%}2bV_3P^P@4oU{fu{J8`~RrQ?`1P26^U;l>s?kP6QhIzEUzvG+g*>ABK zH_W^Bxj*Z|eK6*Zj$IUcRaRwDV%_lIoO5A(1s?)ZT^_XDpyZJ=c;xBo*etY@=+h@irC0w-ee~TcYQE{}_J*kU`I>+F)(;w@C#{-~`aQqe7=2h}vzeIZ z@WSqMRP$GNeYiRLq1V`qC+1x&?`esC=y1(%edk9l(V_3KnNZB@ z_~8^6ZGXwMSLT77-Q5~}(p&RkxBjp-dhs`Fe(ah5*%tl$#+omCY)57uYJP9| zZg2F+kJ(Hv<~9BPKwp&q`I`UR_+(#ncVEp1Zl3LrHvC%658hZm5S?05^MxPz=s@&` zpJ21Vn8$UeJ{VmZt@*^i@!i4bxASav81uvm?;47Z9jf`p|MvlS4x^RBY&;I@I&WnEZ*V)WC=7nDNw)xTDnOpO>H%=~yDj%--+#h=j zqI)N6e)qQ?To^5XsOEcL^4*2e_K}+Z-G0lW=%0Ro&9GzMY;8n}zS&#z!)N|bivHHS zYrc3-UmUHp*8K6uzp*%)duz=n|L%u@PyT0Yb{_MDpK4zk{h3?y&HJgP(c3>@v-X&O z{?FDei(b7^^U?46t7XwQzr|+rG0*v(v&*ADJyrA7FaE*uX!0vlp}*dJ+luJxyK6rC zQ^LyV!`IpDKjvxw%5SfX{^^FA@BSaB<>=dfujaph{v|p3&AA&xAO7#1TNVAnFW3C| zcPp!+TRUpL{LjZ$M|a0+{`^1S*F?YZA8bY;^WHB`t%){Xt@-uWu3Q`S{_d4WAGG@~ zzqU5|lRfLgyd(TK{2BT9;cMZ0$j=Wy3w|d00NC$>-%0*{crEan&^N$dE4*g%`@?&I z_k=zJ_FmyVlm8z+3;0aXm%u(N_{=B|0G}m%rs!i}pEZ2uln;Pw0oMfQDza+@*NpN4 za4q4QQf>gQHC%Jb55T4&LwN*vmf)E}9|?Qb;F+U*0z8ZGOrr0E zJ*)7{QeFX`Wq791r^23fc;+d;0BZrP36x`iwF1@*$}_-P0&5E88epw~H3$7MY%PK{ z>91bRg=A|LtXY(IfVB+PH1yf9wGP%i%0Iwb2x}tcAYiS8HIwoXu$ID_ias8;*20=g z`3P8xVNFKg4_m8Y&8EBrtmUw#Q*Hv*dRX%*KLL9I>AVtWPb8I-4hy#)3Y^dYgm z2KF4vSHNBbdlKa=V6TEbi}Dt*m%*NfJ}0) zkBaTJu;=1DOSTuoo{YXLwpYWRO?eI2%VAHa+y?CRu;)|08EOHj2`I+_wF1-(==Wl^ z1k@Ci>wsDVY7U%-$!Za(Nhs$5wF=ZM=qF>f4AeA~`+!;pY992Tv04afBFce4tpqg_ z&d+4E6x39d3xQe-YOd?A{B5ijgPM$TB2cSA&4zwBR?9(6N4XKG^`PcM{~W6Yp(dmp z3Dk;EGos&))sj$CQmzDQO{h81pBIH%6lzk+nLw=yH7n&!pq7Q27JYuK)`gmv@+VLW zLrsjnKvpY5%}jX|sHLH%Mjs)owV~#wdhufwKmjIVj%(XAwA)P|gL;DsX1O`Jn7917{k@ zSc3Nj&N^`Bq5KP+h2Ts?IT$!A!I=sDn(QnEXDZ6Yz*!5;7muk893{~nGgM=>?{apLdwy=SrN{R=~wed*;x|Kl$5K1vnHH5DPIF;Q8<&L zZt#SsgK|I6>wumI`j1&J1bQNr1A<-&^i0sN%z7!% zQ=wcC^je_jg7Z{aF9v!tloNtp4fJf#56yZx(9@yZ5cGPW=Y#%f)(e835ao!VR|GvH zoWII?NzhZGToLq|py!1CY}Si{o)qPbpjQPwEA(@-UKaGUD0c+CF6eoo|C{x~peIH- zBK-(6d87I_u>@Pmgj-(CdSqA8{<8 z7YIE;$}vH&5PF8_cW1ps=qXaJ33`ptb3}hU>qSCOl5$SatAw5<`srCO6MCAIdxBmk z^gPjj&w8QI6Qvv!^h%*;N_i;gr9w}Ya#7H0g`O+=`&lm*da{(0f?h53Y%veOdb!Zk zrQ8(sdZFiw`2p4ohMq9xsGwI2J!8xpuwF9slre|Edd<*trhFCjqM;{^xdqm%hMqO$ zt)Q0;J#ETeL9ZKn-ju(BUO4o`DTf8Ua_E^;9t(Qu&{M}bwyf6Q%?0x< zOp5_chH_${)qrM$c^IbUfTlyaG0=KI^TGTK(}F+~q8u4$MW7jB-iB#Opea$V474WD zoG_omv?$P|C}##*6=+tJHv=sTG%d=Vfz}0@7v;}D3jYXl|GUc>t<45nA83BWtpP0%G(pO-fmR5bA?4XX zO9V|3b5Klc1kDliQA~>jO_FkMpjCoqiFqofWrC(jxi`={LG#3U!AuJUO_XwQpp}AV zig_)jrGlo4IWDHPg62y3IM8B2lf}8hOsfUWmhy6-<$|V*IWea7g62#4InaVZ69%RX zrZt1+O!+#{qCu0!+#1uWL9@m@8`H8u)27@VXx*TBQ~nOL zaL~jlhX-0YXy%xgV_G_B>Xgd^tsOLX%-1n3o@w&0<{D3fRu7sz<@G?z2Th-Hd!Y4$ z=1=)O{QplnQbDTl@4?eF?Qyvhs|KRg{jdFqbd580$LHiG`$7_@m#OoE#kH+g6<_7V4hx4XE z`w#Aia1J%zFX4P@(Efw_Da;k({T9x%2JJt%AHzAuZ!Z#QQm%iw)X;aKDH7 zLwp`yqZ}e=|H1R}8s!o3d3p_>uh&5P51zNzD4z)0fABnpbGq?)eU0*p_&mQxxkY^5 z!+GDh9)xqiLHiHZi`OX6i0er>HypJ8V7&?FiG%hZtVgfm`t%yES7F`}*RyagIj(nM z{t?&1*KmEz;(8g*H^=ofOSwqU{)6>4oQIC^mU5M#{RjI^mhzRjA7v?LiThPJ{~h zJ&>gwC)NvD%5#GDAJh|B%5`GBk)?bmX#YVy66QRyUddA46YH5Q!B>= zK(Ss5^Pr&p2lZ5za-mpnWhoyD+J8`wWho~L+J8{5g?Uk|=dzR=1?@km_p+29#d|Z?LVkDvy?BzdNfNpQ><6BlsCnCHcPov(EfvZH%s|btcSCd zLj~%$uL(7+JA7~4D+>k9?eqD7PSB1yqcxFEuLqyl)DA(KREAZ zDSwOS;Vk8FLHiHR%UR0f;(0ntxm?ixgY$Nl^0{~(&r(howEy6|o~67lp69ca+Xd}E zIPYgEzl;5VEaiByUy!9dFKGWkKOsxGUhFr7`CicegMLJoa=zHF2=l(6{RjPwEaiT& z-;t&KFKGWkKO{>zVCAC#pWG4_kHlqbf1QkHVXp#2B^rYz-)u^*MCoH1zsLBA?Xd1LHnWhr-z z{jMzKkFg&X=8!@A5Bg9#VMPt9!r+hT_V|~g=gZ3ZvYkkT~V?WoY+%#zaLBH3h z{51B1eacaT_8;_%eacf~KiQ{THE91qzuCwBvyc7gFlPkG<^9pm;8X4&{SIONAN>$MaRAUS5%K`gPvH|6 z0R0vr9{~LrK5+ujuMzSB(9aQa1JLi`6F&g`AU<&f&@U451kg|76ITHJCLvz{{U|;w+$F%_rUh`q@J60{Y#2;xC{dF61zvU(P2U1N!MgE(7}Q zeBv{pA1~xIpkL1?UIY61LT&^4{e0p#pdZjDjsyAyed0NwpD^S)px@9Zz61IZL(T*G z6@B78pr6qv?gRQAed0f$A2Q@XpkLA_9t8R+LoNjREq&rcpdT~jM4(^OCtd{lIYVv) z`aON(N1z`x zP6qn5{U_P4g9pGzKetcZ4D@@4{0#Jiha3&`i~GdWKtFlN)j+?wPkasZqlcUg^sD>C z+dw~i$lXA{yC3p5Uisle4hQ<>ed2MTpFZSrpx@pnJ_q{oLrw?!^?l-Xpr1eFcA($i zCw>R!0es?kU|zr{o(JX$Laqnq4SeEzU>+gld|+O|C*B9<8GPb?VBWze{s-nELJkP# zC4Az6V4fo6f?(dlCq4+~F+xrV<~4lcg* zN-(eE6R!mGJR!FP^FBWDOE3@Q6UPMeLO$_KFi#Y6O)zid6W;{$NFnD0^GZJPPB70D za!)YtJtYAwEv)I>JtwI^He@@Q7~^6@=-946>?HAujLaj1@l}XHwE)v zAwLE4U_NnFFfSJJR4`BG;~WAXwEv*z9P(8#kLD9+1@melZw2#gK5GLF z15GC6#9&_2CteKZIYVv?<~>7x4CX;Yjtu5SL!J!gNkgs-=1qO#%U~Wg6DJ4r+959o^V~jhb1?7iuY5H>#>YH($kD;PxKBJC z%#-`X)xo@Z$k)Lk^IT18(g63A>`6-;ELGw6ht_RJTqB$cpuY~5FVEq-PIV?2K1?z%vz6{N& zp?NnnH;3k1(HtL|2Sjs)@c9ns9O3;Q&Rrt@LvSB5FGle9%o7nXshKw+_gz!RN;`is18PT0!vnvYtIKOW_^}K7ZE34z365B?s4s^>l;l z#d@p3^O^T2B1;Q3%RY4E(T+Aw&2SdA7uPpno7o-bCj1kW3*9fIeN?cu@m$oA6U`DA-q zaIM(h5xF9%uOF^GydSvs@c!W1!~2D65APqYJ$xQ;?cwu* zYY(3nTzmNZ;M&9InZ?f+u04F-aP8sqhiebl1Fk(>AGr2#z2Mrz^@D2<*AuQiTwl2M zaJ}K$vw!h^V1EZ+gZB&jUicY!Ke3+;zXR_#_PgOV;Qa{K9_~-}TH!V0{mb49yeGWB z*?WcejQ2nLEZ{T2=YxG#@R{NB!#+#+O!4_*pEZ2u`24YJ0oMedPj;=~n&I>N>RJZZ z6rXRn_VB#JwU5C)K>HBwhd384tPgNK3F{@Q+i?8}>sVZ$!n&T$7j(|S^^M)@@P2Xq z3(vv0K8Ae(TtCA;3H58JZ$$koT#v(k9hHm45ryZ0{0O*ThW-rPPeZ>7?zf?T2lwO9 z&jf2VJg>Nahdwjh-(SQ1{?k93jYNJn`s8oo38Cyn2n zooy=4?ri?jEZ_2(*}rS~xbWh&;f*ieGSdBG=jgYdw~zhl^DmFRdj4Kij( zN`q9Al&MKXDjGCVDj8D$-uM5#eb?o^df#x)bKiTfwKjXLZ-1!dO6kzID@Q`kNnQ$Z zmSTjgUZo#0w2CXFSo&VDvrJsD^lGEvx2t)B&&W0hImkr>EnlM-)VF3bFl+6_z}@oh zfr9HK16$Yi1Vk$&25eH?6fmXu!@pLk(BD&ex4*Osr+>f71-}ecJHMT3bNx8gYkjY( z+xdEF@c2q;Rvzuv+1KHP>M43kY`X8!zRA%eM1R74)#fDk&dpNpAzSL)qzsJQ+6?-R_;2+%B4#-4+Gv>I z>bgzTb^i8qE*G~eyVw}jJ5L#Hb*8FFecad$dkI&yHz z)aPKP*{Gw6xsPMJ`8NmGU0x0x7N702EnMtXEC=oGTOP2p-~H^s&)sGR;;fqYi(7Bp zUuAu9pT3Rkz9%-hd!6TO@ z)0%J((RYN?yYC^fNfAyn15S0yQ$*JePWhHs9h^9iPB@(YfOp}BO>i4|a4VBO3F~*m zEma^A8uG$WjEY*A>8^8|0$?|O^S(74Lt#^P#J>j z+@VS?LbXf=_Ce(=UlRdU)Esn1mKUnZ2&yX%s_b5Hu{0M{ojz0_1FG;6RO3jbPWaFlM7vR6}ssubk$d8*?eB;G70E5P3XFv(0z{3h5pcu(a@Ed(49rl zrM1wlx1np>p?kZbi(f-Ge}Jz33f(;hT|NojJ`G*}|J|?t_b=t~XPP=YJxTTc9-|ig z{z`41`asc>uc^9;Zfaz_osu5EP3`|xOC298qFR4uQk*}dDeWKrl;3wps(f@O_2!!< zCH75%vi!0o;C-)dJ+*N z`9v?s`SE06>7$E*!w=m9RUS$P26grX+~`OQ;Oy8GVATG@Kc%hEzo&J#zeFpizw3hw zei!cB`AxOV^)qOx^-aEK=iA%N<15o#dDQpr?xPJ&lRo@Sc|NvxHu;n^4tS5>4)->^ zE$N+k>z3EhO*=2Gn^T?%4H=&OHxxaUZrt~XtatQyetp7S;d+vLU^`N%+_oFAnur zA3UU2J>+z%%H4^xYUH3xrO(0Eicv?U3LnRe^WPk%%e@?&%0Jt;mbuugl?~eEmmaX2 zQ~K{z$vc!HE> zL4uctQNmUAAMu>(1@Sx8cE)F@PQ~@Bl*UP`*v5G(&yA~9x)D32=o7n1Q93qSp)aO& zU0RIbx*ajQ<+)i>2!$hgPv8 zSFhS0=`1A>c}}t?;_b@Q5t1uCA{->NBJx-8MD#813Kv~o7;d#JAUsWcTX=_vWfm_jHH(Yh%fUgX&YVHF5cM~MR{zUEd;H;|&rb8wy}#$v z3w|%6w@)pj=}8&7ZbFG38P}nu$BpRyzijB^V=i>-&mfxfXB@5lBbWC3et|9@ZKmIR z>!-!OjnS50=d+HD$g%DY8?gR-ab#(Hp;+MV?PaTK8x~Wp(>U^*pPMTJmfxYG0RTbl%g@=vPk~ zq9vbj#W+9S5mWjoEoS&(UyRB_>DZu7pV%86H)1(E=EfPd+s37|mB#h7PQ^*I?u>VR zP!NCN{*U;n7NZ1%mV$)jd*cbc&1T1BnoE!Q-sMVcXmUv8Z@Q6adq+H}q%kaM{B~cG z;q8sdnYRj(hi-DFXx(&8NoeRu>A#_ts&peaHL{*N?fG@@G==NEX_40q(|fPhrYm2S zJRWx?_4r^NM}~HtZ$`%DcNt$V?aAD6sV%dpRzHig_DYt+Ma2_0Yl=@St66!Hc_HUy zf3--qUUgdbsVadS&Z@*5mrDNJ){4YjrHXlZ8RwJprptx$oys%wTg$`>)XGj34D-~r%j7@oT)GBIzkp7f#6=PK!G&vOX71Pc60oMhBdxE1W84%FxXMIOUDWhH&EJx5MD{#glCB z+<@C~fLq~8^u1dOw`6v#w|N|HtpIM%C}FDQ2i#@>-0IGF3Ao{&)>61_Te$VPahy;A zH#&Tv8l+=YpfZLZra_hLfNJ52k%Y>5^&}LkNHcn0*BDe)EmW63RGCJUb(=&JcF%dcb5W&O}?&Cqohp!;&6 z3*(?0gP<#2pgV1#OO2pgb)ajNpnGMYiNLkMsW` z$G=p}{FWKEG1Js?@zj|Qk4{q0r1x^LCE$mSa#FJb)4x*hq`%C%`QQV!U-S~ETk~s5 zbq2+CEV`Qt>oMfs$k$G7IU~T6vHLcax3`Dq!ogbVe`neAWK3$E9?%6zhD=7Qh5bD5q3_ZC>Kra)+B>VsCZH0;VwphkB7*w=_Gh0N1?(k@_2)B2lns|ww-1ILVb2wllDQmKlh7gdVn=M)ThlagQytr| zW%sR?4Nu92g-(brSBx1CUDDULJZYdQRLnbnMeJPAfHe*hxwH0%Hl3ARY5G7qv|`iS zm68WXLYOh0lj`y{t5x)ZyiEGm#9WyS zygHS&_NBr3Ta_lId5){{Xxg7{&4{(Tk1D@NSicRX zrib!+T94M|`CJ|z)#9AJ$wzis;fA{p2E4tmT510Y3ip0`i$~{#fTVY!a-B|O+AXiO zb6qx8bJ%%Z-Y%lMz;4Pj^K+AKPDzHR_^7Ym_CZC@lQt5Y7V_Wsa9Y;BX;Q|~qjOV; z{*>y3yV|W)o5j?U+&`b}+-xr^B1K6BJDy;a5Bb<)St^GUn;#u?unJQuj` za$D%-AQH)8p{V)Uenc+YqTSuap24AFd8}s8&S=hk%NqUzb_06$yJN$i9e8y1=kEP8 z%?^~P##x2sHt(Mp7PnU4wQ;}Iqblo{D=zM{e4%gCI!AV2!n`Lo7J|8ZGo76Fbf^jJ zUC{r1&&go6Eq>si@xS5U;pgDz;@9BU;`hMsh2ImuH@*hG7QQCFHogaZFZiDDz2SSr z_loZs-#b17J_|k*J{x&PcvgI7e0DqoJPSM%JR3YCJS#jiJUcu?JWD)NJX<_tJZn62 zJbSzYybHV&yc@hDyeqsjygR%@yi2@Oyj#3uylcF3ynCzxtOcwItPQLYtQD*otR1W& ztR<`|tSziDtTn7TtUatjtVOIztWB&@tW~U8tX-^OtYxfetZl4utaYq;tbObO>;>!z z><#P@>=o=8>>cbO>?Q0e>@Dmu>^1B;>^_zNJ>`m-Z>{aYp>|N|(>}Bj}>}~9E z>~-vU?0v)l!~(qUDO{KoHh`rY;^{QeLA(v$dl;nH;z z`1;rOjf~^_aX2eIj_>c#-~GSv{a*4qK8Ejq^RL#Q_&k%DoImmT?ptX8z~?=+*6%w$ zzlT)$D4vIy&YN#|J|~03zTtU2>9+ie=T~QUYy{6!Y5v_|Jl{1R{(QmnP8reog6D54 ztezOH=||A_ZD_1XFZ-lv3g>JZ+q$cfhXc;AhNJn!-T`BnAb zVLd#zW4y)s5NNA=gY|M8ej$O_RYpk~j?su=S{@zMTzQTGO zOtOE8^=WUM*N^q8wYTpD*01@EB`>g^S%G`{u)d39vU;)JPk(>*9P8ics>pNfhmd~j z9_$Z3$E-kUl;b*ACtVN*l!CTyn2HDms~CR1pCo|)A=#> zCudXXBkb3_pTiHae_v;+Jj8y^Js;GG{hhCQqXYZ>f)-~7_W$Wxqjtmt&9am>#0MSm zo>s(*AbyEf#E&Y5>jT7-60ZyQ5np89PPHK3e12)rg7|aQA^9HSk(qmMGvbr`OqpiH ztG1QCcM-qVJ!)t|JliJ7--P(~?6vJ3#JePel19WoxsBtu5f5$K3~wVoKK_w;3-NN> zrJ%9hZb=fU4)HONOBa+w#9pN1y-tC6qvis)4%e~JA% zRfT+Z;Us4j^4qCdE|ti4ZYr%6$bTtolq!%9Q@&)JM}8a%nJ!1Z6nN@Xj{M1?E5CP6De|w?1OF1_V{XBLV#3ezrp3tDWh?88kiUJuttmo2cgfB^ zhy4CUg6|yi{oyD^A@aY{{gJb%0m_FR&!PrU`Pp>_HNc9OJI#2 z!IhYcddK1qe=ceOl~0K|r~$m&1aeRV=$%W;Mh(ytAd-z5z(X(RBx-=QoGVYF2H4VA zd;&GVE2iQJ)BvkBuVkSH*!)#L3pK#*;fH(KO(@+C&KHyG64Zzi%n~ECX z)2Lc1YJf{(9Vw^*4qCaUpa%F-z?p&?z+}2088twN`^IF{0Eb8Vl28N8j1Ege4WOke zo`f1;>er1#)By629THIkT!x=ApauwiTzU*Oz@AC7W2gZXwZ{`s1N59INI(ssu+S(0 zH2_!nk9gDo3XTQwr~$$>cE+OyxVm;K4mH3<{n9wp0E!{Dai{@)KAszg8lchaMl5Oo z+iyOxr~v{mNynlFcwEpIgBn1pIxPk@z>1+AF{l9ow{pdx26)!m5RDq(b7*KZYJdZl zn$f5M9$Sq?p#~TZuZ=RIrz21U1pM%bKn>t6t`&hApd*kc0yTgjXID6CfU4Vt;iv&t zUJM9F4ba=YEgUs~iIP}2YJj2ouWZx+LeyP0Y5*<&TsCTen+5)C)Bv+NOxdUbd``%+ zQ3KdGbFonaEOH-Up$3>)e3OM5z4X`uEh(-Z;0K5;>0C+#B0r0+11K|Ck2EhA74S@HH8UXJbH2~f} zY5=SU)Bso?r~$BEPy=B7pa#HtLJffRg&F|s4K)DPA8G)sN7MjVpQr(_UQq*J{h|iI zdPWU^^^F<;>m4-!)<0?h><82U*dM3?uwPIEVE>>7zFo)BuPNr~wc!Py---pawuZK@EWT zf*Jtv1~mZU4{89!Bh&zhPpAP9uTTRZexU|HJVOnD_=Xw)@eVZr;vZ@N#6#2oh>xfN z5HC>!Abz3-Ks-eafcT0U0Pz+z0OBud0K{X|0Eo}10T8cI10a5*20%PV4S@KL8UXPg zH2~s2Y5?Q|)Bwm2r~!~KPy--;pawubK@EWXf*Jt%1~mZk4{8A9Bh&!MPpAQquTTRZ zf1w6IK0^(F{Dv9;`3^Mz@*ipd;>!z><#P@>=o=8>>cbO>?Q0e>@Dmu>^1B;>^_zNJ>`m-Z>{aYp>|N|(>}Bj}>}~9E>~-vU?0v)l!~($c@O6$d$;M$eqZc$fd}s$gRk+$hFA1$i2wH$i>LX z$j!*n$koW%$lb`{$mPiC$nD7S$o0ti_!9u!!NENk+(p5C5ZuYYy$IY*!0jOX9XNDi8L^jRf;z@APBn1+qP~%Rs2`No ztnXCJtWoMJ*^L^emUDig%sD?%;jmS4iSs=*#QBz5!Zk=4!=?qr^^&UQdO;0xJ*R|W z`@)dBiwfa>OqFwYQvGC?>H($CbC2@pX`+hAUR47%clLEkXLcRs1)CeEXIE2CW>-+$ zyrq;TY;zppJwxU2=2Pvw+0+c!@KBkPMje`yL}kv2r&`D!7Mqfv%cSh)22&}p3DP*% zoBBD|jgsMWruM*gNIc(us-Dk=8sW2`Bw%C2f`1zo$-kMp%&$XzAbVTN)XsVG6g5wV zswO*JODW;`!j$3s`BX4$o0QF;MZK6m&73DN#?*ril%oP4m}dnBnOy>X%-OJ&vR<%* z=_YuOnJajU*+F)`YM9Ck%9u_I&N4H|{?~El#DYZT8lfoWe%NS96bfYC6!Kz@3OO?+ zVasLrLThI9LQ`hlLPO?9vLmL!+$p?{NeN3ctH{3CLZ;9nKBmE~kSSjDjnT7c zh%raxB|{swW;{gN82KWNj82iO3=Y_&QCVEXa9W(p$XJ}tXeRq*G(%1_fU#H9osj?= zH}#@6j1f^2#)>7I8RoEs!(O7ms97S#c(X*5u?RME43}~;f|gE%l`I_&drtPzy2G@^ z+QK}8R7+DO5*8ZjZkc-6 z2eQ8=9%i&$Ff4RAS6DgOW&0G$zv5-+#ubl3Jz+~If5ny1&K2dMGbHjum0)woK_VhF zRU$C-w#1Rp?_}T2G}LmXerUu>)zFJ%_f0fZSaNQtf#h^Z0BjwdlYAZ0CHXjnN2)1A z12&PIrHVr`rA~%4OT~x$BKvWkAvUY*LSj~#h18Kiz&8yw=rvoG8lLKqynSldjU(YsBcb#FN=Q_2( zT(Y|-5ID8&Pk^k#rvMw++KN`V8&IoI6Yxf%AV3H6QPWQmen9@)dtQ*aGuZPVvuCX87M%cJ&`8JAj+~Emh?G*(##` zRVug-_|=b3wbxHewb{=FHpntm^Zf3p#`=w_`uQz~t+JhJMt-4cYJSCPEBw01&fu7@ zlKLxOJM{;?31ok;!1uj+obN&ne_wsrNb}Oz?wg~b;(K31-1isREBtoUT(kEmQ?u!4 z8QC$+I?BDCeN=h9+fh5%W=mMV@#vNHGDqL77d$Ei8*X}9gFfzBtv)BTYJKjKJ;W%V za;;RacshZ`37OmCR&09ss!rNYF zgLi@s?k&#oexoz$C9v_imo{wHxoj-)O52$1)vz(p>l4{$-0HPiSKiB0ccIrw*uZPj z9q|07+u|v%SLwM8w(@-S7@qlh2R-lW8F`M8oktN*<4w~Zftv&7)9X-lJ1r$YYZ1MfSU!ZNB3ky1B%?knBkMxle807FF<`j`860*yL-r^Y+=5t%hnxybVQ;Dt=Lr$wh&#ndAX)-vv9q>P2Ke!*}