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CHANGELOG
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CHANGELOG
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GCM V5.1 :
- DOCUMENTS
- Flipped ordering of version in CHANGELOG file
- Updated the BOM and fix wrong J9 ref #5 #3
- Small revision on the block diagram
- SCHEMATICS
- Set version to 5.1
- Fix conflict between U40 and U12, the BWRITE1 bus have been replaced by BWRITE2 on U12 #14
- Removed the delay on ADDSCR_CLK #9
- Fix a symbol issue where pins was flipped and not ordered causing a clock problem #7
- PCB
- Set version to 5.1
- Cleaning
- All capacitor is now in 0805 size
- For U22, U23, U24, the decoupling capacitor have been repositioned #13
- J9 is now repositioned next to J12 with a step of 2.54mm #12
- Back a little the MM1 connectors #8
- Footprint of J7 have been correctly replaced #6
- J12 have been correctly replaced with a male connector #4
- Removed all decoupling capactior for the not used 12V power #11
- More power decoupling next to the nano-fit power connector #10
GCM V5.0 :
- GLOBAL
- Switching "CERN-OHL v1.2" license to "CERN-OHLw v2 or later"
- Renaming "librairies" folder to "libraries"
- DOCUMENTS
- Adding the GCM datasheet
- Adding the CHANGELOG file
- Adding waveforms
- Cleaning
- SCHEMATICS
- Set version to 5.0
- Replacing old custom "74CBTLV16212" symbol with the Kicad symbol "74CBTLV16212"
- Replacing old custom "LTC6994-1" symbol with the Kicad symbol "LTC6994xS6-1"
- Replacing old custom "LM810" symbol with the Kicad symbol "LM810"
- Replacing all hidden power pins symbols (hidden pins bug)
- Renaming "Main connector" to "SPS1 Processor connector"
- Removing old symbols, cleaning
- Replacing symbol "CD74AC238" with a new one
- Replacing all used 74x1Gxx symbols
(shared power pin fix, and visual)
- PCB
- Removing/Cleaning old footprints
- Set version to 5.0
- Fixing 3D
- Adding QRCode with the Github link
- SCHEMATICS FEATURES
- Complete change of the clock generation
Adding the "ECS-2200BX-500" crystal oscillator
You will now be able to select : 50MHz
or pre-division : /2, /4, /8, /16, /32, /64, /128, /256, /512, /1024, /2048, /4096, /8192, /16384, /32768, /65536
Removing "~GLOBAL_CLK"
More simple frequency control (switch to parallel control)
Removing "LTC6903" (SPI frequency chip)
Fixing unstable frequency change
After a frequency change, the system now send a "SOURCE_RESET" pulse
- Replacing "SN74LV163A" with "CD74AC161"
Async reset
- Put a Tpd delay to "ADDSRC_CLK"
- "ADDSRC_CLK" is now directly connected to the CLK input of the 24bits counter
- Renaming "ClockGenerator.sch" sheet to "fileClockGenerator.sch"
- Renaming "Connector.sch" sheet to "fileConnector.sch"
- Renaming "Peripherals.sch" sheet to "filePeripherals.sch"
- Renaming "MemoryController.sch" sheet to "fileMemoryController.sch"
- Renaming "MemorySlot1.sch.sch" sheet to "fileMemorySlot1.sch"
- Renaming "MemorySlot2.sch" sheet to "fileMemorySlot2.sch"
- Renaming "AddressCounter.sch" sheet to "fileAddressCounter.sch"
- Renaming "AddressExchanger.sch" sheet to "fileAddressExchanger.sch"
- Adding a seperate clock signal only for peripheral (PClockGenerator)
- Applying PP1 standard for peripheral https://github.com/JonathSpirit/GComputer_standard
- Applying MM1 standard for memory https://github.com/JonathSpirit/GComputer_standard
- Mounting holes is now on schematics
- Renaming "MAIN_RESET" to "POWER_RESET"
- Renaming "SOURCE_RESET" to "LIGHT_RESET"
- Renaming "RESET_CLK" to "GLOBAL_RESET"
- MemoryController rework
User can now control CE,WE,OE pins of the not selected memory source
Applying MM1 standard, (3.3V)
Renaming/Cleaning
GCM V4.0 :
- Intial release