diff --git a/SoC_PolarFire.lib b/SoC_PolarFire.lib
index 59d0f18ea5..10ccfbb840 100644
--- a/SoC_PolarFire.lib
+++ b/SoC_PolarFire.lib
@@ -6,7 +6,7 @@ EESchema-LIBRARY Version 2.4
 DEF MPFS095T-FCVG484 U 0 20 Y Y 9 F N
 F0 "U" 0 150 50 H V C CNN
 F1 "MPFS095T-FCVG484" 0 0 50 H V C CNN
-F2 "Package_BGA:BGA-484_19.0x19.0mm_Layout22x22_P0.8mm" 0 0 50 H I C CNN
+F2 "Package_BGA:FCVG484_19x19mm_Layout22x22_P0.8mm" 0 0 50 H V C CNN
 F3 "" 0 0 50 H I C CNN
 DRAW
 T 0 0 2300 100 0 1 1 "BANK 0" Normal 0 C C
@@ -519,7 +519,7 @@ ENDDEF
 DEF MPFS160T-FCVG484 U 0 20 Y Y 9 F N
 F0 "U" 0 150 50 H V C CNN
 F1 "MPFS160T-FCVG484" 0 0 50 H V C CNN
-F2 "Package_BGA:BGA-484_19.0x19.0mm_Layout22x22_P0.8mm" 0 0 50 H I C CNN
+F2 "Package_BGA:FCVG484_19x19mm_Layout22x22_P0.8mm" 0 0 50 H I C CNN
 F3 "" 0 0 50 H I C CNN
 DRAW
 T 0 0 2300 100 0 1 1 "BANK 0" Normal 0 C C
@@ -1032,7 +1032,7 @@ ENDDEF
 DEF MPFS250T-FCG1152 U 0 20 Y Y 13 F N
 F0 "U" 0 150 50 H V C CNN
 F1 "MPFS250T-FCG1152" 0 0 50 H V C CNN
-F2 "" 0 0 50 H I C CNN
+F2 "Package_BGA:FCG1152_35x35mm_Layout34x34_P1.0mm" 0 0 50 H I C CNN
 F3 "" 0 0 50 H I C CNN
 DRAW
 T 0 0 3200 100 0 1 1 "BANK 0" Normal 0 C C
@@ -2788,7 +2788,7 @@ ENDDEF
 DEF MPFS250T-FCVG484 U 0 20 Y Y 9 F N
 F0 "U" 0 150 50 H V C CNN
 F1 "MPFS250T-FCVG484" 0 0 50 H V C CNN
-F2 "Package_BGA:BGA-484_19.0x19.0mm_Layout22x22_P0.8mm" 0 0 50 H I C CNN
+F2 "Package_BGA:FCVG484_19x19mm_Layout22x22_P0.8mm" 0 0 50 H I C CNN
 F3 "" 0 0 50 H I C CNN
 DRAW
 T 0 0 2300 100 0 1 1 "BANK 0" Normal 0 C C
@@ -4120,7 +4120,7 @@ ENDDEF
 DEF MPFS460T-FCG1152 U 0 20 Y Y 12 F N
 F0 "U" 0 150 50 H V C CNN
 F1 "MPFS460T-FCG1152" 0 0 50 H V C CNN
-F2 "Package_BGA:BGA-1152_35.0x35.0mm_Layout34x34_P1.0mm" 0 0 50 H I C CNN
+F2 "Package_BGA:FCG1152_35x35mm_Layout34x34_P1.0mm" 0 0 50 H I C CNN
 F3 "" 0 0 50 H I C CNN
 DRAW
 T 0 0 4600 100 0 1 1 "BANK 0" Normal 0 C C