From cb6799a04a3d5ce70791411a16eaf1efc387686d Mon Sep 17 00:00:00 2001 From: Nico Grunbaum Date: Thu, 4 Jun 2020 02:46:03 -0700 Subject: [PATCH 1/8] WDC65C816S 8/16-bit microprocessor DIP-40 --- CPU_WDC.dcm | 8 ++++ CPU_WDC.lib | 110 ++++++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 118 insertions(+) create mode 100644 CPU_WDC.dcm create mode 100644 CPU_WDC.lib diff --git a/CPU_WDC.dcm b/CPU_WDC.dcm new file mode 100644 index 0000000000..bc269a2282 --- /dev/null +++ b/CPU_WDC.dcm @@ -0,0 +1,8 @@ +EESchema-DOCLIB Version 2.0 +# +$CMP 65C816S +D 8/16 Bit Microprocessor +F http://archive.6502.org/datasheets/wdc_w65c816s_oct_11_2018.pdf +$ENDCMP +# +#End Doc Library diff --git a/CPU_WDC.lib b/CPU_WDC.lib new file mode 100644 index 0000000000..0e036693f5 --- /dev/null +++ b/CPU_WDC.lib @@ -0,0 +1,110 @@ +EESchema-LIBRARY Version 2.4 +#encoding utf-8 +# +# 65C816S +# +DEF 65C816S U 0 40 Y Y 1 F N +F0 "U" -300 1350 50 H V C CNN +F1 "65C816S" 200 1350 50 H V C CNN +F2 "Package_DIP:DIP-40_W15.24mm" -50 0 50 H I C CNN +F3 "" -100 50 50 H I C CNN +DRAW +S -350 1300 350 -1350 0 1 10 f +X ~VP 1 -450 -300 100 R 50 50 1 1 O +X A1 10 450 1100 100 L 50 50 1 1 O +X A2 11 450 1000 100 L 50 50 1 1 O +X A3 12 450 900 100 L 50 50 1 1 O +X A4 13 450 800 100 L 50 50 1 1 O +X A5 14 450 700 100 L 50 50 1 1 O +X A6 15 450 600 100 L 50 50 1 1 O +X A7 16 450 500 100 L 50 50 1 1 O +X A8 17 450 400 100 L 50 50 1 1 O +X A9 18 450 300 100 L 50 50 1 1 O +X A10 19 450 200 100 L 50 50 1 1 O +X RDY 2 -450 -700 100 R 50 50 1 1 B +X A11 20 450 100 100 L 50 50 1 1 O +X VSS 21 0 -1450 100 U 50 50 1 1 W +X A12 22 450 0 100 L 50 50 1 1 O +X A13 23 450 -100 100 L 50 50 1 1 O +X A14 24 450 -200 100 L 50 50 1 1 O +X A15 25 450 -300 100 L 50 50 1 1 O +X ~ABORT 3 -450 -1100 100 R 50 50 1 1 I +X D0 33 -450 1200 100 R 50 50 1 1 B +X D1 34 -450 1100 100 R 50 50 1 1 B +X R/~W 34 -450 0 100 R 50 50 1 1 O +X D2 35 -450 1000 100 R 50 50 1 1 B +X E 35 -450 -900 100 R 50 50 1 1 O +X BE 36 -450 -1000 100 R 50 50 1 1 I +X D3 36 -450 900 100 R 50 50 1 1 B +X D4 37 -450 800 100 R 50 50 1 1 B +X Φ2 37 -450 -150 100 R 50 50 1 1 I +X D5 38 -450 700 100 R 50 50 1 1 B +X MX 38 -450 -800 100 R 50 50 1 1 O +X D6 39 -450 600 100 R 50 50 1 1 B +X VDA 39 -450 250 100 R 50 50 1 1 O +X ~IRQ 4 -450 -500 100 R 50 50 1 1 I +X D7 40 -450 500 100 R 50 50 1 1 B +X ~RES 40 -450 -1250 100 R 50 50 1 1 I +X D8 41 -450 400 100 R 50 50 1 1 B +X ~ML 5 -450 -400 100 R 50 50 1 1 O +X ~NMI 6 -450 -600 100 R 50 50 1 1 I +X VPA 7 -450 150 100 R 50 50 1 1 O +X VDD 8 0 1400 100 D 50 50 1 1 W +X A0 9 450 1200 100 L 50 50 1 1 O +ENDDRAW +ENDDEF +# +# WDC65C816S +# +DEF WDC65C816S U 0 40 Y Y 1 F N +F0 "U" 0 0 50 H V C CNN +F1 "WDC65C816S" 0 0 50 H V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +S -500 1250 450 -1250 0 1 0 f +X ~VP 1 -600 300 100 R 50 50 1 1 O +X ADDR1 10 550 1100 100 L 50 50 1 1 O +X ADDR2 11 550 1000 100 L 50 50 1 1 O +X ADDR3 12 550 900 100 L 50 50 1 1 O +X ADDR4 13 550 800 100 L 50 50 1 1 O +X ADDR5 14 550 700 100 L 50 50 1 1 O +X ADDR6 15 550 600 100 L 50 50 1 1 O +X ADDR7 16 550 500 100 L 50 50 1 1 O +X ADDR8 17 550 400 100 L 50 50 1 1 O +X ADDR9 18 550 300 100 L 50 50 1 1 O +X ADDR10 19 550 200 100 L 50 50 1 1 O +X RDY 2 -600 200 100 R 50 50 1 1 B +X ADDR11 20 550 100 100 L 50 50 1 1 O +X VSS 21 -600 -1200 100 R 50 50 1 1 W +X ADDR12 22 550 0 100 L 50 50 1 1 O +X ADDR13 23 550 -100 100 L 50 50 1 1 O +X ADDR14 24 550 -200 100 L 50 50 1 1 O +X ADDR15 25 550 -300 100 L 50 50 1 1 O +X ABORT 3 -600 0 100 R 50 50 1 1 N +X D0 33 900 -400 100 L 50 50 1 1 B +X D1 34 900 -500 100 L 50 50 1 1 B +X ~RW 34 -600 100 100 R 50 50 1 1 O +X D2 35 900 -600 100 L 50 50 1 1 B +X E 35 -600 -600 100 R 50 50 1 1 N +X BE 36 -600 -700 100 R 50 50 1 1 N +X D3 36 900 -700 100 L 50 50 1 1 B +X D4 37 900 -800 100 L 50 50 1 1 B +X PHI2 37 -600 -800 100 R 50 50 1 1 N +X D5 38 900 -900 100 L 50 50 1 1 B +X MX 38 -600 -900 100 R 50 50 1 1 N +X D6 39 900 -1000 100 L 50 50 1 1 B +X VDA 39 -600 -1000 100 R 50 50 1 1 N +X ~IRQ 4 -600 -100 100 R 50 50 1 1 N +X D7 40 900 -1100 100 L 50 50 1 1 B +X ~RES 40 -600 -1100 100 R 50 50 1 1 N +X D8 41 900 -1200 100 L 50 50 1 1 B +X ~ML 5 -600 -200 100 R 50 50 1 1 N +X ~NMI 6 -600 -300 100 R 50 50 1 1 N +X VPA 7 -600 -400 100 R 50 50 1 1 N +X VDD 8 -600 -500 100 R 50 50 1 1 W +X ADDR0 9 550 1200 100 L 50 50 1 1 O +ENDDRAW +ENDDEF +# +#End Library From 57f2d97a3321364ef788265e7a6a7681859eac99 Mon Sep 17 00:00:00 2001 From: Nico Grunbaum Date: Thu, 4 Jun 2020 03:37:31 -0700 Subject: [PATCH 2/8] Align to 100mil grid --- CPU_WDC.lib | 93 +++++++++++++++++++++++++++-------------------------- 1 file changed, 48 insertions(+), 45 deletions(-) diff --git a/CPU_WDC.lib b/CPU_WDC.lib index 0e036693f5..2f348a3023 100644 --- a/CPU_WDC.lib +++ b/CPU_WDC.lib @@ -3,54 +3,57 @@ EESchema-LIBRARY Version 2.4 # # 65C816S # -DEF 65C816S U 0 40 Y Y 1 F N -F0 "U" -300 1350 50 H V C CNN +DEF 65C816S U 0 20 Y Y 1 F N +F0 "U" -350 1350 50 H V C CNN F1 "65C816S" 200 1350 50 H V C CNN -F2 "Package_DIP:DIP-40_W15.24mm" -50 0 50 H I C CNN -F3 "" -100 50 50 H I C CNN +F2 "Package_DIP:DIP-40_W15.24mm" 0 -50 50 H I C CNN +F3 "" -150 50 50 H I C CNN +$FPLIST + DIP*W15.12mm* +$ENDFPLIST DRAW -S -350 1300 350 -1350 0 1 10 f -X ~VP 1 -450 -300 100 R 50 50 1 1 O -X A1 10 450 1100 100 L 50 50 1 1 O -X A2 11 450 1000 100 L 50 50 1 1 O -X A3 12 450 900 100 L 50 50 1 1 O -X A4 13 450 800 100 L 50 50 1 1 O -X A5 14 450 700 100 L 50 50 1 1 O -X A6 15 450 600 100 L 50 50 1 1 O -X A7 16 450 500 100 L 50 50 1 1 O -X A8 17 450 400 100 L 50 50 1 1 O -X A9 18 450 300 100 L 50 50 1 1 O -X A10 19 450 200 100 L 50 50 1 1 O -X RDY 2 -450 -700 100 R 50 50 1 1 B -X A11 20 450 100 100 L 50 50 1 1 O -X VSS 21 0 -1450 100 U 50 50 1 1 W -X A12 22 450 0 100 L 50 50 1 1 O -X A13 23 450 -100 100 L 50 50 1 1 O -X A14 24 450 -200 100 L 50 50 1 1 O -X A15 25 450 -300 100 L 50 50 1 1 O -X ~ABORT 3 -450 -1100 100 R 50 50 1 1 I -X D0 33 -450 1200 100 R 50 50 1 1 B -X D1 34 -450 1100 100 R 50 50 1 1 B -X R/~W 34 -450 0 100 R 50 50 1 1 O -X D2 35 -450 1000 100 R 50 50 1 1 B -X E 35 -450 -900 100 R 50 50 1 1 O -X BE 36 -450 -1000 100 R 50 50 1 1 I -X D3 36 -450 900 100 R 50 50 1 1 B -X D4 37 -450 800 100 R 50 50 1 1 B -X Φ2 37 -450 -150 100 R 50 50 1 1 I -X D5 38 -450 700 100 R 50 50 1 1 B -X MX 38 -450 -800 100 R 50 50 1 1 O -X D6 39 -450 600 100 R 50 50 1 1 B -X VDA 39 -450 250 100 R 50 50 1 1 O -X ~IRQ 4 -450 -500 100 R 50 50 1 1 I -X D7 40 -450 500 100 R 50 50 1 1 B -X ~RES 40 -450 -1250 100 R 50 50 1 1 I -X D8 41 -450 400 100 R 50 50 1 1 B -X ~ML 5 -450 -400 100 R 50 50 1 1 O -X ~NMI 6 -450 -600 100 R 50 50 1 1 I -X VPA 7 -450 150 100 R 50 50 1 1 O +S -1700 -1800 -1700 -1800 0 1 10 N +S -400 1300 400 -1300 0 1 10 f +X ~VP 1 -500 -250 100 R 50 50 1 1 O +X A1 10 500 1100 100 L 50 50 1 1 O +X A2 11 500 1000 100 L 50 50 1 1 O +X A3 12 500 900 100 L 50 50 1 1 O +X A4 13 500 800 100 L 50 50 1 1 O +X A5 14 500 700 100 L 50 50 1 1 O +X A6 15 500 600 100 L 50 50 1 1 O +X A7 16 500 500 100 L 50 50 1 1 O +X A8 17 500 400 100 L 50 50 1 1 O +X A9 18 500 300 100 L 50 50 1 1 O +X A10 19 500 200 100 L 50 50 1 1 O +X RDY 2 -500 -650 100 R 50 50 1 1 B +X A11 20 500 100 100 L 50 50 1 1 O +X VSS 21 0 -1400 100 U 50 50 1 1 W +X A12 22 500 0 100 L 50 50 1 1 O +X A13 23 500 -100 100 L 50 50 1 1 O +X A14 24 500 -200 100 L 50 50 1 1 O +X A15 25 500 -300 100 L 50 50 1 1 O +X D7 26 -500 500 100 R 50 50 1 1 B +X D6 27 -500 600 100 R 50 50 1 1 B +X D5 28 -500 700 100 R 50 50 1 1 B +X D4 29 -500 800 100 R 50 50 1 1 B +X ~ABORT 3 -500 -1050 100 R 50 50 1 1 I +X D3 30 -500 900 100 R 50 50 1 1 B +X D2 31 -500 1000 100 R 50 50 1 1 B +X D1 32 -500 1100 100 R 50 50 1 1 B +X D0 33 -500 1200 100 R 50 50 1 1 B +X R/~W 34 -500 50 100 R 50 50 1 1 O +X E 35 -500 -850 100 R 50 50 1 1 O +X BE 36 -500 -950 100 R 50 50 1 1 I +X Φ2 37 -500 -100 100 R 50 50 1 1 I +X MX 38 -500 -750 100 R 50 50 1 1 O +X VDA 39 -500 300 100 R 50 50 1 1 O +X ~IRQ 4 -500 -450 100 R 50 50 1 1 I +X ~RES 40 -500 -1200 100 R 50 50 1 1 I +X ~ML 5 -500 -350 100 R 50 50 1 1 O +X ~NMI 6 -500 -550 100 R 50 50 1 1 I +X VPA 7 -500 200 100 R 50 50 1 1 O X VDD 8 0 1400 100 D 50 50 1 1 W -X A0 9 450 1200 100 L 50 50 1 1 O +X A0 9 500 1200 100 L 50 50 1 1 O ENDDRAW ENDDEF # From 3fb76e599557dfd57182dc06270b407bdad0bfd4 Mon Sep 17 00:00:00 2001 From: Nico Grunbaum Date: Thu, 4 Jun 2020 03:42:03 -0700 Subject: [PATCH 3/8] Align to 100mil grid, add fp filter --- CPU_WDC.lib | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/CPU_WDC.lib b/CPU_WDC.lib index 2f348a3023..0b2b563272 100644 --- a/CPU_WDC.lib +++ b/CPU_WDC.lib @@ -14,7 +14,7 @@ $ENDFPLIST DRAW S -1700 -1800 -1700 -1800 0 1 10 N S -400 1300 400 -1300 0 1 10 f -X ~VP 1 -500 -250 100 R 50 50 1 1 O +X ~VP 1 -500 -200 100 R 50 50 1 1 O X A1 10 500 1100 100 L 50 50 1 1 O X A2 11 500 1000 100 L 50 50 1 1 O X A3 12 500 900 100 L 50 50 1 1 O @@ -25,7 +25,7 @@ X A7 16 500 500 100 L 50 50 1 1 O X A8 17 500 400 100 L 50 50 1 1 O X A9 18 500 300 100 L 50 50 1 1 O X A10 19 500 200 100 L 50 50 1 1 O -X RDY 2 -500 -650 100 R 50 50 1 1 B +X RDY 2 -500 -600 100 R 50 50 1 1 B X A11 20 500 100 100 L 50 50 1 1 O X VSS 21 0 -1400 100 U 50 50 1 1 W X A12 22 500 0 100 L 50 50 1 1 O @@ -36,21 +36,21 @@ X D7 26 -500 500 100 R 50 50 1 1 B X D6 27 -500 600 100 R 50 50 1 1 B X D5 28 -500 700 100 R 50 50 1 1 B X D4 29 -500 800 100 R 50 50 1 1 B -X ~ABORT 3 -500 -1050 100 R 50 50 1 1 I +X ~ABORT 3 -500 -1000 100 R 50 50 1 1 I X D3 30 -500 900 100 R 50 50 1 1 B X D2 31 -500 1000 100 R 50 50 1 1 B X D1 32 -500 1100 100 R 50 50 1 1 B X D0 33 -500 1200 100 R 50 50 1 1 B -X R/~W 34 -500 50 100 R 50 50 1 1 O -X E 35 -500 -850 100 R 50 50 1 1 O -X BE 36 -500 -950 100 R 50 50 1 1 I -X Φ2 37 -500 -100 100 R 50 50 1 1 I -X MX 38 -500 -750 100 R 50 50 1 1 O +X R/~W 34 -500 100 100 R 50 50 1 1 O +X E 35 -500 -800 100 R 50 50 1 1 O +X BE 36 -500 -900 100 R 50 50 1 1 I +X Φ2 37 -500 0 100 R 50 50 1 1 I +X MX 38 -500 -700 100 R 50 50 1 1 O X VDA 39 -500 300 100 R 50 50 1 1 O -X ~IRQ 4 -500 -450 100 R 50 50 1 1 I +X ~IRQ 4 -500 -400 100 R 50 50 1 1 I X ~RES 40 -500 -1200 100 R 50 50 1 1 I -X ~ML 5 -500 -350 100 R 50 50 1 1 O -X ~NMI 6 -500 -550 100 R 50 50 1 1 I +X ~ML 5 -500 -300 100 R 50 50 1 1 O +X ~NMI 6 -500 -500 100 R 50 50 1 1 I X VPA 7 -500 200 100 R 50 50 1 1 O X VDD 8 0 1400 100 D 50 50 1 1 W X A0 9 500 1200 100 L 50 50 1 1 O From 4669404ddebe78e94aefb6153d49106ddc3b950a Mon Sep 17 00:00:00 2001 From: Nico Grunbaum Date: Thu, 4 Jun 2020 03:49:35 -0700 Subject: [PATCH 4/8] Fix filter and add keywords --- CPU_WDC.dcm | 1 + CPU_WDC.lib | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/CPU_WDC.dcm b/CPU_WDC.dcm index bc269a2282..c46de023a5 100644 --- a/CPU_WDC.dcm +++ b/CPU_WDC.dcm @@ -2,6 +2,7 @@ EESchema-DOCLIB Version 2.0 # $CMP 65C816S D 8/16 Bit Microprocessor +K MPU CPU 6502 65C02 65C816 F http://archive.6502.org/datasheets/wdc_w65c816s_oct_11_2018.pdf $ENDCMP # diff --git a/CPU_WDC.lib b/CPU_WDC.lib index 0b2b563272..ea5d949c97 100644 --- a/CPU_WDC.lib +++ b/CPU_WDC.lib @@ -9,7 +9,7 @@ F1 "65C816S" 200 1350 50 H V C CNN F2 "Package_DIP:DIP-40_W15.24mm" 0 -50 50 H I C CNN F3 "" -150 50 50 H I C CNN $FPLIST - DIP*W15.12mm* + DIP*W15.24mm* $ENDFPLIST DRAW S -1700 -1800 -1700 -1800 0 1 10 N From 7602e1b766ed705750848eaece7d61d15cb6afbe Mon Sep 17 00:00:00 2001 From: Nico Grunbaum Date: Thu, 4 Jun 2020 03:56:43 -0700 Subject: [PATCH 5/8] Remove second definition in file. --- CPU_WDC.lib | 53 ----------------------------------------------------- 1 file changed, 53 deletions(-) diff --git a/CPU_WDC.lib b/CPU_WDC.lib index ea5d949c97..10c64d664a 100644 --- a/CPU_WDC.lib +++ b/CPU_WDC.lib @@ -57,57 +57,4 @@ X A0 9 500 1200 100 L 50 50 1 1 O ENDDRAW ENDDEF # -# WDC65C816S -# -DEF WDC65C816S U 0 40 Y Y 1 F N -F0 "U" 0 0 50 H V C CNN -F1 "WDC65C816S" 0 0 50 H V C CNN -F2 "" 0 0 50 H I C CNN -F3 "" 0 0 50 H I C CNN -DRAW -S -500 1250 450 -1250 0 1 0 f -X ~VP 1 -600 300 100 R 50 50 1 1 O -X ADDR1 10 550 1100 100 L 50 50 1 1 O -X ADDR2 11 550 1000 100 L 50 50 1 1 O -X ADDR3 12 550 900 100 L 50 50 1 1 O -X ADDR4 13 550 800 100 L 50 50 1 1 O -X ADDR5 14 550 700 100 L 50 50 1 1 O -X ADDR6 15 550 600 100 L 50 50 1 1 O -X ADDR7 16 550 500 100 L 50 50 1 1 O -X ADDR8 17 550 400 100 L 50 50 1 1 O -X ADDR9 18 550 300 100 L 50 50 1 1 O -X ADDR10 19 550 200 100 L 50 50 1 1 O -X RDY 2 -600 200 100 R 50 50 1 1 B -X ADDR11 20 550 100 100 L 50 50 1 1 O -X VSS 21 -600 -1200 100 R 50 50 1 1 W -X ADDR12 22 550 0 100 L 50 50 1 1 O -X ADDR13 23 550 -100 100 L 50 50 1 1 O -X ADDR14 24 550 -200 100 L 50 50 1 1 O -X ADDR15 25 550 -300 100 L 50 50 1 1 O -X ABORT 3 -600 0 100 R 50 50 1 1 N -X D0 33 900 -400 100 L 50 50 1 1 B -X D1 34 900 -500 100 L 50 50 1 1 B -X ~RW 34 -600 100 100 R 50 50 1 1 O -X D2 35 900 -600 100 L 50 50 1 1 B -X E 35 -600 -600 100 R 50 50 1 1 N -X BE 36 -600 -700 100 R 50 50 1 1 N -X D3 36 900 -700 100 L 50 50 1 1 B -X D4 37 900 -800 100 L 50 50 1 1 B -X PHI2 37 -600 -800 100 R 50 50 1 1 N -X D5 38 900 -900 100 L 50 50 1 1 B -X MX 38 -600 -900 100 R 50 50 1 1 N -X D6 39 900 -1000 100 L 50 50 1 1 B -X VDA 39 -600 -1000 100 R 50 50 1 1 N -X ~IRQ 4 -600 -100 100 R 50 50 1 1 N -X D7 40 900 -1100 100 L 50 50 1 1 B -X ~RES 40 -600 -1100 100 R 50 50 1 1 N -X D8 41 900 -1200 100 L 50 50 1 1 B -X ~ML 5 -600 -200 100 R 50 50 1 1 N -X ~NMI 6 -600 -300 100 R 50 50 1 1 N -X VPA 7 -600 -400 100 R 50 50 1 1 N -X VDD 8 -600 -500 100 R 50 50 1 1 W -X ADDR0 9 550 1200 100 L 50 50 1 1 O -ENDDRAW -ENDDEF -# #End Library From 948af7c5ba2d1a449779c8f8c655d31256dd2aad Mon Sep 17 00:00:00 2001 From: Nico Grunbaum Date: Thu, 4 Jun 2020 04:07:44 -0700 Subject: [PATCH 6/8] Add CPU_WDC to the sym-lib-table --- sym-lib-table | 1 + 1 file changed, 1 insertion(+) diff --git a/sym-lib-table b/sym-lib-table index 099173b9c4..ab0d9f3e8e 100644 --- a/sym-lib-table +++ b/sym-lib-table @@ -33,6 +33,7 @@ (lib (name CPU_NXP_68000)(type Legacy)(uri ${KICAD_SYMBOL_DIR}/CPU_NXP_68000.lib)(options "")(descr "NXP (formerly Motorola) 68000 CPUs")) (lib (name CPU_NXP_IMX)(type Legacy)(uri ${KICAD_SYMBOL_DIR}/CPU_NXP_IMX.lib)(options "")(descr "NXP IMX CPUs")) (lib (name CPU_PowerPC)(type Legacy)(uri ${KICAD_SYMBOL_DIR}/CPU_PowerPC.lib)(options "")(descr "PowerPC-based CPUs")) + (lib (name CPU_WDC)(type Legacy)(uri ${KICAD_SYMBOL_DIR}/CPU_WDC.lib)(options "")(descr "Western Design Centers 6502-based CPUs")) (lib (name Device)(type Legacy)(uri ${KICAD_SYMBOL_DIR}/Device.lib)(options "")(descr "Generic symbols for common devices")) (lib (name DSP_AnalogDevices)(type Legacy)(uri ${KICAD_SYMBOL_DIR}/DSP_AnalogDevices.lib)(options "")(descr "Analog Devices DSP symbols")) (lib (name DSP_Freescale)(type Legacy)(uri ${KICAD_SYMBOL_DIR}/DSP_Freescale.lib)(options "")(descr "Freescale DSP symbols")) From 3bd8d7a81a00c9357f83d1d92b3233328e8859c6 Mon Sep 17 00:00:00 2001 From: Nico Grunbaum Date: Thu, 4 Jun 2020 04:23:11 -0700 Subject: [PATCH 7/8] Center package label --- CPU_WDC.lib | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/CPU_WDC.lib b/CPU_WDC.lib index 10c64d664a..25683b5b7d 100644 --- a/CPU_WDC.lib +++ b/CPU_WDC.lib @@ -6,7 +6,7 @@ EESchema-LIBRARY Version 2.4 DEF 65C816S U 0 20 Y Y 1 F N F0 "U" -350 1350 50 H V C CNN F1 "65C816S" 200 1350 50 H V C CNN -F2 "Package_DIP:DIP-40_W15.24mm" 0 -50 50 H I C CNN +F2 "Package_DIP:DIP-40_W15.24mm" 0 0 50 H I C CNN F3 "" -150 50 50 H I C CNN $FPLIST DIP*W15.24mm* From a3b59bb2d3609df8250c8eb78a8c9e122e0277eb Mon Sep 17 00:00:00 2001 From: Nico Grunbaum Date: Thu, 4 Jun 2020 22:28:02 -0700 Subject: [PATCH 8/8] Change data pins to tri-state --- CPU_WDC.lib | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/CPU_WDC.lib b/CPU_WDC.lib index 25683b5b7d..374d6def77 100644 --- a/CPU_WDC.lib +++ b/CPU_WDC.lib @@ -32,15 +32,15 @@ X A12 22 500 0 100 L 50 50 1 1 O X A13 23 500 -100 100 L 50 50 1 1 O X A14 24 500 -200 100 L 50 50 1 1 O X A15 25 500 -300 100 L 50 50 1 1 O -X D7 26 -500 500 100 R 50 50 1 1 B -X D6 27 -500 600 100 R 50 50 1 1 B -X D5 28 -500 700 100 R 50 50 1 1 B -X D4 29 -500 800 100 R 50 50 1 1 B +X D7 26 -500 500 100 R 50 50 1 1 T +X D6 27 -500 600 100 R 50 50 1 1 T +X D5 28 -500 700 100 R 50 50 1 1 T +X D4 29 -500 800 100 R 50 50 1 1 T X ~ABORT 3 -500 -1000 100 R 50 50 1 1 I -X D3 30 -500 900 100 R 50 50 1 1 B -X D2 31 -500 1000 100 R 50 50 1 1 B -X D1 32 -500 1100 100 R 50 50 1 1 B -X D0 33 -500 1200 100 R 50 50 1 1 B +X D3 30 -500 900 100 R 50 50 1 1 T +X D2 31 -500 1000 100 R 50 50 1 1 T +X D1 32 -500 1100 100 R 50 50 1 1 T +X D0 33 -500 1200 100 R 50 50 1 1 T X R/~W 34 -500 100 100 R 50 50 1 1 O X E 35 -500 -800 100 R 50 50 1 1 O X BE 36 -500 -900 100 R 50 50 1 1 I