Makefile

# Copyright (c) 2007-2019, MIPS Tech, LLC and/or its affiliated group companies or licensors
#
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without modification, are
# permitted provided that the following conditions are met:
#
# 1. Redistributions of source code must retain the above copyright notice, this list of
# conditions and the following disclaimer.
#
# 2. Redistributions in binary form must reproduce the above copyright notice, this list
# of conditions and the following disclaimer in the documentation and/or other materials
# provided with the distribution.
#
# 3. Neither the name of the copyright holder nor the names of its contributors may be
# used to endorse or promote products derived from this software without specific prior
# written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY
# EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
# SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
# OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

interAptiv_SIM_RAM:
	${MAKE} -C interAptiv SIM_RAM GCC_VENDOR=mti

interAptiv_SIM_RAM_EVA:
	${MAKE} -C interAptiv SIM_RAM_EVA GCC_VENDOR=mti

interAptiv_SIM_SPRAM:
	${MAKE} -C interAptiv SIM_SPRAM GCC_VENDOR=mti

interAptiv_BOSTON_RAM:
	${MAKE} -C interAptiv BOSTON_RAM GCC_VENDOR=mti

interAptiv_BOSTON_RAM_EVA:
	${MAKE} -C interAptiv BOSTON_RAM_EVA GCC_VENDOR=mti	

interAptiv_BOSTON_SPRAM:
	${MAKE} -C interAptiv BOSTON_SPRAM GCC_VENDOR=mti

interAptiv_BOSTON_CACHE_TEST_RAM:
	${MAKE} -C interAptiv BOSTON_CACHE_TEST_RAM GCC_VENDOR=mti

interAptivMPU_SIM_RAM:
	${MAKE} -C interAptivMPU SIM_RAM GCC_VENDOR=mti

interAptivMPU_BOSTON_RAM:
	${MAKE} -C interAptivMPU BOSTON_RAM GCC_VENDOR=mti

interAptivUP_SIM_RAM:
	${MAKE} -C interAptivUP SIM_RAM GCC_VENDOR=mti

interAptivUP_SIM_SPRAM:
	${MAKE} -C interAptivUP SIM_SPRAM GCC_VENDOR=mti

interAptivUP_BOSTON_RAM:
	${MAKE} -C interAptivUP BOSTON_RAM GCC_VENDOR=mti

interAptivUP_BOSTON_SPRAM:
	${MAKE} -C interAptivUP BOSTON_SPRAM GCC_VENDOR=mti

interAptivUP_BOSTON_CACHE_TEST_RAM:
	${MAKE} -C interAptivUP BOSTON_CACHE_TEST_RAM GCC_VENDOR=mti

I7200_BOSTON_RAM:
	${MAKE} -C I7200 BOSTON_RAM

I7200_BOSTON_RAM_MPU:
	${MAKE} -C I7200 BOSTON_RAM_MPU

I7200_SIM_RAM:
	${MAKE} -C I7200 SIM_RAM

I7200_SIM_RAM_MPU:
	${MAKE} -C I7200 SIM_RAM_MPU

M14Kc_SIM_RAM:
	${MAKE} -C M14Kc SIM_RAM GCC_VENDOR=mti

M14Kc_SIM_SPRAM:
	${MAKE} -C M14Kc SIM_SPRAM GCC_VENDOR=mti

M14Kc_SEAD_RAM:
	${MAKE} -C M14Kc SEAD_RAM GCC_VENDOR=mti

M14Kc_SEAD_SPRAM:
	${MAKE} -C M14Kc SEAD_SPRAM GCC_VENDOR=mti

M5100_SEAD_RAM:
	${MAKE} -C M5100 SEAD_RAM GCC_VENDOR=mti

M5100_SEAD_SPRAM:
	${MAKE} -C M5100 SEAD_SPRAM GCC_VENDOR=mti

M5100_SIM_RAM:
	${MAKE} -C M5100 SIM_RAM GCC_VENDOR=mti

M5100_SIM_RAM_2COPY:
	${MAKE} -C M5100 SIM_RAM_2COPY GCC_VENDOR=mti	

M5100_SIM_SPRAM:
	${MAKE} -C M5100 SIM_SPRAM GCC_VENDOR=mti

M5150_SIM_RAM:
	${MAKE} -C M5150 SIM_RAM GCC_VENDOR=mti

M5150_SIM_SPRAM:
	${MAKE} -C M5150 SIM_SPRAM GCC_VENDOR=mti

M5150_SEAD_RAM:
	${MAKE} -C M5150 SEAD_RAM GCC_VENDOR=mti

M5150_SEAD_SPRAM:
	${MAKE} -C M5150 SEAD_SPRAM GCC_VENDOR=mti

M6200_SEAD_RAM:
	${MAKE} -C M6200 SEAD_RAM GCC_VENDOR=mti

M6200_SIM_RAM:
	${MAKE} -C M6200 SIM_RAM GCC_VENDOR=mti

M6250_SEAD_RAM:
	${MAKE} -C M6250 SEAD_RAM GCC_VENDOR=mti

M6250_SIM_RAM:
	${MAKE} -C M6250 SIM_RAM GCC_VENDOR=mti

P5600_SIM_RAM:
	${MAKE} -C P5600 SIM_RAM GCC_VENDOR=mti

P5600_BOSTON_RAM:
	${MAKE} -C P5600 BOSTON_RAM GCC_VENDOR=mti

P5600_Rtest:
	${MAKE} -C P5600 SIM_Rtest GCC_VENDOR=mti TEST=$(TEST)

I6500_BOSTON_RAM:
	${MAKE} -C I6500 BOSTON_RAM GCC_VENDOR=mti

I6500_BOSTON_RAM_LINUX_BOOT:
	${MAKE} -C I6500 BOSTON_RAM_LINUX_BOOT GCC_VENDOR=mti
	        
I6500_SIM_RAM:
	${MAKE} -C I6500 SIM_RAM GCC_VENDOR=mti

I6500_Rtest:
	${MAKE} -C I6500 SIM_Rtest GCC_VENDOR=mti TEST=$(TEST)

P6600_BOSTON_RAM:
	${MAKE} -C P6600 BOSTON_RAM GCC_VENDOR=mti

P6600_SIM_RAM:
	${MAKE} -C P6600 SIM_RAM GCC_VENDOR=mti 

P6600_Rtest:
	${MAKE} -C P6600 SIM_Rtest GCC_VENDOR=mti TEST=$(TEST)

clean_proAptiv:
	${MAKE} clean -C proAptiv

clean_interAptiv:
	${MAKE} clean -C interAptiv

clean_interAptivMPU:
	${MAKE} clean -C interAptivMPU

clean_interAptivUP:
	${MAKE} clean -C interAptivUP

clean_I7200:
	${MAKE} clean -C I7200

clean_M14Kc:
	${MAKE} clean -C M14Kc

clean_M5100:
	${MAKE} clean -C M5100

clean_M5150:
	${MAKE} clean -C M5150

clean_M6200:
	${MAKE} clean -C M6200

clean_M6250:
	${MAKE} clean -C M6250

clean_P5600:
	${MAKE} clean -C P5600

clean_I6500:
	${MAKE} clean -C I6500		

clean_P6600:
	${MAKE} clean -C P6600