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enhanced precision for SAMD21 for s
1 parent 3e9c0dc commit 57a0dc1

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src/hardware/uTimerLib.SAMD21.cpp

+5-5
Original file line numberDiff line numberDiff line change
@@ -85,7 +85,7 @@
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GCLK_TC/1024:
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freq = 48 MHz / prescaler = 48 MHz / 1024 = 46.875 kHz = 46875 Hz
88-
base_delay = 1 / freq = 1 / 46875 s = ~= 21,333333333us
88+
base_delay = 1 / freq = 1 / 46875 s = ~= 21.333333333us
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overflow_delay = UINT16_MAX * base_delay = 65535 / 46875 s = 1.39808 s
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*/
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@@ -152,16 +152,16 @@
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_TC->CTRLA.reg &= ~TC_CTRLA_ENABLE;
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while (_TC->STATUS.bit.SYNCBUSY == 1); // sync
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155-
// Set Timer counter Mode to 16 bits + Set TC as normal Normal Frq + Prescaler: GCLK_TC/1024
156-
_TC->CTRLA.reg |= (TC_CTRLA_MODE_COUNT16 + TC_CTRLA_WAVEGEN_NFRQ + TC_CTRLA_PRESCALER_DIV1024);
155+
// Set Timer counter Mode to 16 bits + Set TC as normal Match Frq + Prescaler: GCLK_TC/1024
156+
_TC->CTRLA.reg |= (TC_CTRLA_MODE_COUNT16 + TC_CTRLA_WAVEGEN_MFRQ + TC_CTRLA_PRESCALER_DIV1024);
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while (_TC->STATUS.bit.SYNCBUSY == 1); // sync
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if (s > 1) {
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__overflows = _overflows = s / 1.39808;
161-
__remaining = _remaining = ((s * 100000) % 139808) * 480 / 1024; // for integer s this is always an integer
161+
__remaining = _remaining = ((s * 100000) % 139808) * 480 / 1024 - 1; // for integer s this is always an integer
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} else {
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__overflows = _overflows = 0;
164-
__remaining = _remaining = s * 46875;
164+
__remaining = _remaining = s * 46875 - 1;
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}
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if (__overflows == 0) {

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