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atmel-isi.c
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/*
* Copyright (c) 2007 Atmel Corporation
*
* Based on the bttv driver for Bt848 with respective copyright holders
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
//#define DEBUG 12
//#define VERBOSE 12
//#define VERBOSE_DEBUG 12
// TODO: Support for VIDIOC_DBG_G_REGISTER, VIDIOC_DBG_S_REGISTER
// TODO: Support for VIDIOC_S_CTRL and VIDIOC_G_CTRL, VIDIOC_G_EXT_CTRLS, VIDIOC_S_EXT_CTRLS, VIDIOC_TRY_EXT_CTRLS
#include <linux/clk.h>
#include <linux/completion.h>
#include <linux/dma-mapping.h>
#include <linux/fs.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/ioctl.h>
#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
#include <linux/version.h>
#include <linux/videodev2.h>
#include <linux/wait.h>
#include <linux/kfifo.h>
#include <asm/io.h>
#include <media/v4l2-common.h>
#include <media/v4l2-ioctl.h>
#include <mach/board.h>
#include <mach/cpu.h>
#include "atmel-isi.h"
#ifdef pr_debug
#undef pr_debug
#endif
#define pr_debug(fmt, ...) \
printk(KERN_DEBUG pr_fmt(fmt), ##__VA_ARGS__)
#if 0
.image_hsize = 2048,
.image_vsize = 1536,
.prev_hsize = 320,
.prev_vsize = 240,
.gs_mode = 0,
.pixfmt = ATMEL_ISI_PIXFMT_CbYCrY,
.frate = 1,
.capture_v4l2_fmt = V4L2_PIX_FMT_YUYV,
.streaming_v4l2_fmt = V4L2_PIX_FMT_YUYV,
.cr1_flags = 0,
#endif
#define AT91SAM9260_ID_ISI 22
#define AT91SAM9260_BASE_ISI 0xfffc0000
#define ATMEL_ISI_VERSION KERNEL_VERSION(0, 1, 0)
#define ISI_CODEC 0
/* Default ISI capture buffer size */
#define ISI_CAPTURE_BUFFER_SIZE 800*600*2
/* Default ISI video frame size ie qvga */
#define ISI_VIDEO_BUFFER_SIZE 320*240*2
/* Default number of ISI video buffers */
#define ISI_VIDEO_BUFFERS 4/*4*2*/
/* Maximum number of video buffers */
#define ISI_VIDEO_BUFFERS_MAX 8*4
/* Interrupt mask for a single capture */
#define ISI_CAPTURE_MASK (ISI_BIT(SOF) | ISI_BIT(FO_C_EMP))
#define ISI_V2_CAPTURE_MASK (ISI_BIT(V2_VSYNC) | ISI_BIT(V2_CXFR_DONE) | ISI_BIT(V2_PXFR_DONE))
/* ISI capture buffer size */
static int capture_buffer_size = ISI_CAPTURE_BUFFER_SIZE;
/* Number of buffers used for streaming video */
static int video_buffers = ISI_VIDEO_BUFFERS;
static int video_buffer_size = ISI_VIDEO_BUFFER_SIZE;
static int input_format = ATMEL_ISI_PIXFMT_YCbYCr;
static u8 has_emb_sync = SYNC_CCIR656;
static u8 emb_crc_sync = SYNC_CCIR656;
static u8 hsync_act_low = 0;
// Change per M**3
// static u8 vsync_act_low = 0;
static u8 vsync_act_low = 1;
static u8 pclk_act_falling = 0;
static u8 isi_full_mode = 0;
static u8 gs_mode = 0;
/* Preview path horizontal size */
static int prev_hsize = 320;
/* Preview path vertical size */
static int prev_vsize = 240;
/* Scaling factor of the preview path */
static int prev_decimation_factor = 16;
/* Input image horizontal size */
static int image_hsize = 800;
/* Input image vertical size */
static int image_vsize = 600;
/* Frame rate scaler
* 1 = capture every second frame
* 2 = capture every third frame
* ...
* */
static int frame_rate_scaler = 1;
/* Set this value if we want to pretend a specific V4L2 output format
* This format is for the capturing interface
*/
static int capture_v4l2_fmt = V4L2_PIX_FMT_VYUY;
/* Set this value if we want to pretend a specific V4L2 output format
* This format is for the streaming interface
*/
static int streaming_v4l2_fmt = V4L2_PIX_FMT_VYUY;
/* Declare static vars that will be used as parameters */
static int video_nr = -1; /* 0 <-> dev/video0, 1 <-> dev/video1, -1 <-> first free */
MODULE_PARM_DESC(video_buffers,"Number of frame buffers used for streaming");
module_param(video_buffers, int, 0664);
MODULE_PARM_DESC(capture_buffer_size,"Capture buffer size");
module_param(capture_buffer_size, int, 0664);
MODULE_PARM_DESC(image_hsize,"Horizontal size of input image");
module_param(image_hsize, int, 0664);
MODULE_PARM_DESC(image_vsize,"Vertical size of input image");
module_param(image_vsize, int, 0664);
MODULE_PARM_DESC(frame_rate_scaler, "Frame rate scaler");
module_param(frame_rate_scaler, int, 0664);
MODULE_PARM_DESC(prev_hsize, "Horizontal image size of preview path output");
module_param(prev_hsize, int, 0664);
MODULE_PARM_DESC(prev_vsize, "Vertical image size of preview path output");
module_param(prev_vsize, int, 0664);
MODULE_PARM_DESC(prev_decimation_factor, "Preview path decimaion factor");
module_param(prev_decimation_factor, int, 0664);
module_param(video_nr, int, 0444);
/* Single frame capturing states */
enum {
STATE_IDLE = 0,
STATE_CAPTURE_READY,
STATE_CAPTURE_WAIT_SOF,
STATE_CAPTURE_IN_PROGRESS,
STATE_CAPTURE_DONE,
STATE_CAPTURE_ERROR,
};
/* Frame buffer states
* FRAME_UNUSED Frame(buffer) is not used by the ISI module -> an application
* can usually read out data in this state
* FRAME_QUEUED An application has queued the buffer in the incoming queue
* FRAME_DONE The ISI module has filled the buffer with data and placed is on
* the outgoing queue
* FRAME_ERROR Not used at the moment
* */
enum frame_status {
FRAME_UNUSED,
FRAME_QUEUED,
FRAME_DONE,
FRAME_ERROR,
};
/* Frame buffer descriptor
* Used by the ISI module as a linked list for the DMA controller.
*/
struct fbd {
/* Physical address of the frame buffer */
dma_addr_t fb_address;
#if defined(CONFIG_ARCH_AT91SAM9G45)
/* DMA Control Register(new: only in HISI2) */
u32 dma_ctrl;
#endif
/* Physical address of the next fbd */
dma_addr_t next_fbd_address;
};
/* Frame buffer data
*/
struct frame_buffer {
/* Frame buffer descriptor
* Used by the ISI DMA controller to provide linked list DMA operation
*/
struct fbd fb_desc;
/* Pointer to the start of the frame buffer */
void *frame_buffer;
/* Timestamp of the captured frame */
struct timeval timestamp;
/* Frame number of the frame */
unsigned long sequence;
/* Buffer number*/
int index;
/* Bytes used in the buffer for data, needed as buffers are always
* aligned to pages and thus may be bigger than the amount of data*/
int bytes_used;
/* Mmap count
* Counter to measure how often this buffer is mmapped
*/
int mmap_count;
/* Buffer status */
enum frame_status status;
};
struct atmel_isi {
/* ISI module spin lock. Protects against concurrent access of variables
* that are shared with the ISR */
spinlock_t lock;
void __iomem *regs;
/* Pointer to the start of the fbd list */
dma_addr_t fbd_list_start;
/* Frame buffers */
struct frame_buffer video_buffer[ISI_VIDEO_BUFFERS_MAX];
/* Frame buffer currently used by the ISI module */
struct frame_buffer *current_buffer;
/* Size of a frame buffer */
size_t capture_buffer_size;
/* Streaming status
* If set ISI is in streaming mode */
int streaming;
/* Queue for incoming buffers
* The buffer number (index) is stored in the fifo as reference
*/
struct kfifo *grabq;
/* Spinlock for the incoming queue */
spinlock_t grabq_lock;
/* Queue for outgoing buffers
* Buffer number is stored in the fifo as reference
*/
struct kfifo *doneq;
/* Spinlock for the incoming queue */
spinlock_t doneq_lock;
/* State of the ISI module in capturing mode */
int state;
/* Pointer to ISI buffer */
void *capture_buf;
/* Physical address of the capture buffer */
dma_addr_t capture_phys;
/* Size of the ISI buffer */
size_t capture_buf_size;
/* Capture/streaming wait queue */
wait_queue_head_t capture_wq;
struct atmel_isi_camera *camera;
struct atmel_isi_format format;
struct atmel_isi_format streaming_format;
struct mutex mutex;
/* User counter for the streaming interface */
int stream_users;
/* User counter of the capture interface */
int capture_users;
/* Video device for capturing (Codec path) */
struct video_device cdev;
/* Video device for streaming (Preview path) */
struct video_device vdev;
struct completion reset_complete;
struct clk *pclk;
struct clk *hclk;
struct platform_device *pdev;
unsigned int irq;
unsigned int bootmemBuff;
};
#define to_atmel_isi(vdev) container_of(vdev, struct atmel_isi, vdev)
struct atmel_isi_fh {
struct atmel_isi *isi;
unsigned int read_off;
};
/*
* The new ISI_V2 IP isn't 100% compatible with the old ISI IP,
* and it has a few nice features which we want to use...
*/
static inline bool atmelisi_is_isi_v2(void)
{
if (cpu_is_at91sam9g45())
return true;
return false;
}
/*-----------------------------------------------------------------------------
* Interface to the actual camera.
*/
static LIST_HEAD(camera_list);
static DEFINE_MUTEX(camera_list_mutex);
static void atmel_isi_release_camera(struct atmel_isi *isi,
struct atmel_isi_camera *cam)
{
mutex_lock(&camera_list_mutex);
/* Power down the camera */
if (isi->camera->set_power_state)
(*isi->camera->set_power_state)(isi->camera, 0);
cam->isi = NULL;
isi->camera = NULL;
module_put(cam->owner);
mutex_unlock(&camera_list_mutex);
}
int atmel_isi_register_camera(struct atmel_isi_camera *cam)
{
pr_debug("atmel_isi: register camera %s\n", cam->name);
mutex_lock(&camera_list_mutex);
list_add_tail(&cam->list, &camera_list);
mutex_unlock(&camera_list_mutex);
return 0;
}
EXPORT_SYMBOL_GPL(atmel_isi_register_camera);
void atmel_isi_unregister_camera(struct atmel_isi_camera *cam)
{
pr_debug("atmel_isi: unregister camera %s\n", cam->name);
mutex_lock(&camera_list_mutex);
if (cam->isi)
cam->isi->camera = NULL;
list_del(&cam->list);
mutex_unlock(&camera_list_mutex);
}
EXPORT_SYMBOL_GPL(atmel_isi_unregister_camera);
static struct atmel_isi_camera * atmel_isi_grab_camera(struct atmel_isi *isi, int idx)
{
struct atmel_isi_camera *entry, *cam = NULL;
int currIdx = 0;
mutex_lock(&camera_list_mutex);
/* Try to grab the requested index */
list_for_each_entry(entry, &camera_list, list) {
if (idx == currIdx) {
if (!try_module_get(entry->owner))
entry = NULL;
break;
}
currIdx++;
}
/* If the requested index is unavailable, grab first available camera */
if (NULL == entry) {
list_for_each_entry(entry, &camera_list, list) {
if (!try_module_get(entry->owner))
continue;
break;
}
}
if (entry != isi->camera) {
/* Clean up the old camera, if any */
if (isi->camera) {
cam = isi->camera;
/* Power down the camera */
if (cam->set_power_state)
(*cam->set_power_state)(cam, 0);
cam->isi = NULL;
isi->camera = NULL;
module_put(cam->owner);
cam = NULL;
}
if (entry) {
BUG_ON(entry->isi != NULL);
cam = entry;
cam->isi = isi;
pr_debug("%s: got camera: %s\n",
isi->vdev.name, cam->name);
/* Turn on the camera */
if (cam->set_power_state)
(*cam->set_power_state)(cam, 1);
}
}
else
cam = entry;
mutex_unlock(&camera_list_mutex);
return cam;
}
static int atmel_isi_set_camera_input(struct atmel_isi *isi)
{
struct atmel_isi_camera *cam = isi->camera;
int ret;
ret = cam->set_format(cam, &isi->format);
if (ret)
return ret;
return 0;
}
static void atmel_isi_set_default_format(struct atmel_isi *isi)
{
isi->format.pix.width = (u32)min((u32)2048l, (u32)image_hsize);
isi->format.pix.height = (u32)min((u32)2048l, (u32)image_vsize);
/* Set capture format if we have explicitely specified one */
if(capture_v4l2_fmt){
isi->format.pix.pixelformat = capture_v4l2_fmt;
}
else {
/* Codec path output format */
isi->format.pix.pixelformat = V4L2_PIX_FMT_VYUY;
}
/* The ISI module codec path tries to output YUV 4:2:2
* Therefore two pixels will be in a 32bit word */
isi->format.pix.bytesperline = ALIGN(isi->format.pix.width * 2, 4);
isi->format.pix.sizeimage = isi->format.pix.bytesperline *
isi->format.pix.height;
pr_debug("set default format: width=%d height=%d\n",
isi->format.pix.width, isi->format.pix.height);
#ifdef ISI_CODEC
isi->streaming_format.pix.width = isi->format.pix.width;
isi->streaming_format.pix.height = isi->format.pix.height;
isi->streaming_format.pix.bytesperline = isi->format.pix.bytesperline;
isi->streaming_format.pix.sizeimage = isi->format.pix.sizeimage;
#else
isi->streaming_format.pix.width = min(640U, prev_hsize);
isi->streaming_format.pix.height = min(480U, prev_vsize);
/* The ISI module preview path outputs either RGB 5:5:5
* or grayscale mode. Normally 2 pixels are stored in one word.
* But since the grayscale mode offers the possibility to store 1 pixel
* in one word we have to adjust the size here.
*/
if(input_format == ATMEL_ISI_PIXFMT_GREY
&& gs_mode == ISI_GS_1PIX_PER_WORD) {
isi->streaming_format.pix.bytesperline =
ALIGN(isi->streaming_format.pix.width *4, 4);
}
else {
isi->streaming_format.pix.bytesperline =
ALIGN(isi->streaming_format.pix.width * 2, 4);
}
isi->streaming_format.pix.sizeimage =
isi->streaming_format.pix.bytesperline *
isi->streaming_format.pix.height;
#endif
/* Set streaming format if we have explicitely specified one */
if(streaming_v4l2_fmt){
isi->streaming_format.pix.pixelformat = streaming_v4l2_fmt;
}
else {
/* Preview path output format
* Would be logically V4L2_PIX_FMT_BGR555X
* but this format does not exist in the specification
* So for now we pretend V4L2_PIX_FMT_RGB555X
* Also the Greyscale format does not fit on top of the V4L2
* format but for now we just return it.
*/
if(input_format == ATMEL_ISI_PIXFMT_GREY)
isi->streaming_format.pix.pixelformat = V4L2_PIX_FMT_GREY;
else
isi->streaming_format.pix.pixelformat = V4L2_PIX_FMT_RGB555X;
}
if(input_format){
isi->format.input_format = input_format;
/* Not needed but for completeness*/
isi->streaming_format.input_format = input_format;
}
}
#if defined(CONFIG_ARCH_AT91SAM9G45) /* ISI_V2 */
static int atmel_isi_init_hardware(struct atmel_isi *isi)
{
u32 cfg2, cfg1, cr, ctrl;
cr = 0;
switch (isi->format.input_format) {
case ATMEL_ISI_PIXFMT_GREY:
cr = ISI_BIT(GRAYSCALE);
break;
case ATMEL_ISI_PIXFMT_YCrYCb:
// cr = ISI_BF(V2_YCC_SWAP, 0);
cr = ISI_BF(YCC_SWAP, 3);
break;
case ATMEL_ISI_PIXFMT_YCbYCr:
// cr = ISI_BF(V2_YCC_SWAP, 1);
cr = ISI_BF(YCC_SWAP, 2);
break;
case ATMEL_ISI_PIXFMT_CrYCbY:
// cr = ISI_BF(V2_YCC_SWAP, 2);
cr = ISI_BF(YCC_SWAP, 1);
break;
case ATMEL_ISI_PIXFMT_CbYCrY:
// cr = ISI_BF(YCC_SWAP, 3);
cr = ISI_BF(YCC_SWAP, 0);
break;
case ATMEL_ISI_PIXFMT_RGB24:
cr = ISI_BIT(V2_COL_SPACE) | ISI_BF(V2_RGB_CFG, 0);
break;
case ATMEL_ISI_PIXFMT_BGR24:
cr = ISI_BIT(V2_COL_SPACE) | ISI_BF(V2_RGB_CFG, 1);
break;
case ATMEL_ISI_PIXFMT_RGB16:
cr = (ISI_BIT(V2_COL_SPACE) | ISI_BIT(V2_RGB_MODE)
| ISI_BF(V2_RGB_CFG, 0));
break;
case ATMEL_ISI_PIXFMT_BGR16:
cr = (ISI_BIT(V2_COL_SPACE) | ISI_BIT(V2_RGB_MODE)
| ISI_BF(V2_RGB_CFG, 1));
break;
case ATMEL_ISI_PIXFMT_GRB16:
cr = (ISI_BIT(V2_COL_SPACE) | ISI_BIT(V2_RGB_MODE)
| ISI_BF(V2_RGB_CFG, 2));
break;
case ATMEL_ISI_PIXFMT_GBR16:
cr = (ISI_BIT(V2_COL_SPACE) | ISI_BIT(V2_RGB_MODE)
| ISI_BF(V2_RGB_CFG, 3));
break;
case ATMEL_ISI_PIXFMT_RGB24_REV:
cr = (ISI_BIT(V2_COL_SPACE) | ISI_BIT(V2_RGB_SWAP)
| ISI_BF(V2_RGB_CFG, 0));
break;
case ATMEL_ISI_PIXFMT_BGR24_REV:
cr = (ISI_BIT(V2_COL_SPACE) | ISI_BIT(V2_RGB_SWAP)
| ISI_BF(V2_RGB_CFG, 1));
break;
case ATMEL_ISI_PIXFMT_RGB16_REV:
cr = (ISI_BIT(V2_COL_SPACE) | ISI_BIT(V2_RGB_SWAP)
| ISI_BIT(V2_RGB_MODE) | ISI_BF(V2_RGB_CFG, 0));
break;
case ATMEL_ISI_PIXFMT_BGR16_REV:
cr = (ISI_BIT(V2_COL_SPACE) | ISI_BIT(V2_RGB_SWAP)
| ISI_BIT(V2_RGB_MODE) | ISI_BF(V2_RGB_CFG, 1));
break;
case ATMEL_ISI_PIXFMT_GRB16_REV:
cr = (ISI_BIT(V2_COL_SPACE) | ISI_BIT(V2_RGB_SWAP)
| ISI_BIT(V2_RGB_MODE) | ISI_BF(V2_RGB_CFG, 2));
break;
case ATMEL_ISI_PIXFMT_GBR16_REV:
cr = (ISI_BIT(V2_COL_SPACE) | ISI_BIT(V2_RGB_SWAP)
| ISI_BIT(V2_RGB_MODE) | ISI_BF(V2_RGB_CFG, 3));
break;
default:
return -EINVAL;
}
cfg1 = ISI_BF(V2_EMB_SYNC, (has_emb_sync))
| ISI_BF(V2_HSYNC_POL, hsync_act_low)
| ISI_BF(V2_VSYNC_POL, vsync_act_low)
| ISI_BF(V2_PIXCLK_POL, pclk_act_falling)
| ISI_BF(V2_FULL, isi_full_mode);
ctrl = ISI_BIT(DIS);
isi_writel(isi, V2_CFG1, cfg1);
isi_writel(isi, V2_CTRL, ctrl);
/* Check if module properly disable */
while(isi_readl(isi, V2_STATUS) & ISI_BIT(V2_DIS_DONE));
#ifndef ISI_CODEC
/* These values depend on the sensor output image size */
isi_writel(isi, V2_PDECF, prev_decimation_factor);/* 1/16 * 16 = 1*/
isi_writel(isi, V2_PSIZE , ISI_BF(V2_PREV_HSIZE,prev_hsize - 1)
| ISI_BF(V2_PREV_VSIZE, prev_vsize - 1));
#endif
cfg2 = isi_readl(isi, V2_CFG2);
cfg2 |= cr;
cfg2 = ISI_BFINS(V2_IM_VSIZE, isi->format.pix.height - 1, cfg2);
cfg2 = ISI_BFINS(V2_IM_HSIZE, isi->format.pix.width - 1, cfg2);
isi_writel(isi, V2_CFG2, cfg2);
pr_debug("set_format:\n cfg1=0x%08x\n cfg2=0x%08x\n",
isi_readl(isi, V2_CFG1), isi_readl(isi, V2_CFG2));
pr_debug("psize=0x%08x\n", isi_readl(isi, V2_PSIZE));
pr_debug("OV sync %s\n", has_emb_sync ? "CCIR656" : "VSYNC");
return 0;
}
#else
static int atmel_isi_init_hardware(struct atmel_isi *isi)
{
u32 cr2, cr1, cr;
cr = 0;
switch (isi->format.input_format) {
case ATMEL_ISI_PIXFMT_GREY:
cr = ISI_BIT(GRAYSCALE);
break;
case ATMEL_ISI_PIXFMT_YCrYCb:
// cr = ISI_BF(YCC_SWAP, 0);
cr = ISI_BF(YCC_SWAP, 3);
break;
case ATMEL_ISI_PIXFMT_YCbYCr:
// cr = ISI_BF(YCC_SWAP, 1);
cr = ISI_BF(YCC_SWAP, 2);
break;
case ATMEL_ISI_PIXFMT_CrYCbY:
// cr = ISI_BF(YCC_SWAP, 2);
cr = ISI_BF(YCC_SWAP, 1);
break;
case ATMEL_ISI_PIXFMT_CbYCrY:
// cr = ISI_BF(YCC_SWAP, 3);
cr = ISI_BF(YCC_SWAP, 0);
break;
case ATMEL_ISI_PIXFMT_RGB24:
cr = ISI_BIT(COL_SPACE) | ISI_BF(RGB_CFG, 0);
break;
case ATMEL_ISI_PIXFMT_BGR24:
cr = ISI_BIT(COL_SPACE) | ISI_BF(RGB_CFG, 1);
break;
case ATMEL_ISI_PIXFMT_RGB16:
cr = (ISI_BIT(COL_SPACE) | ISI_BIT(RGB_MODE)
| ISI_BF(RGB_CFG, 0));
break;
case ATMEL_ISI_PIXFMT_BGR16:
cr = (ISI_BIT(COL_SPACE) | ISI_BIT(RGB_MODE)
| ISI_BF(RGB_CFG, 1));
break;
case ATMEL_ISI_PIXFMT_GRB16:
cr = (ISI_BIT(COL_SPACE) | ISI_BIT(RGB_MODE)
| ISI_BF(RGB_CFG, 2));
break;
case ATMEL_ISI_PIXFMT_GBR16:
cr = (ISI_BIT(COL_SPACE) | ISI_BIT(RGB_MODE)
| ISI_BF(RGB_CFG, 3));
break;
case ATMEL_ISI_PIXFMT_RGB24_REV:
cr = (ISI_BIT(COL_SPACE) | ISI_BIT(RGB_SWAP)
| ISI_BF(RGB_CFG, 0));
break;
case ATMEL_ISI_PIXFMT_BGR24_REV:
cr = (ISI_BIT(COL_SPACE) | ISI_BIT(RGB_SWAP)
| ISI_BF(RGB_CFG, 1));
break;
case ATMEL_ISI_PIXFMT_RGB16_REV:
cr = (ISI_BIT(COL_SPACE) | ISI_BIT(RGB_SWAP)
| ISI_BIT(RGB_MODE) | ISI_BF(RGB_CFG, 0));
break;
case ATMEL_ISI_PIXFMT_BGR16_REV:
cr = (ISI_BIT(COL_SPACE) | ISI_BIT(RGB_SWAP)
| ISI_BIT(RGB_MODE) | ISI_BF(RGB_CFG, 1));
break;
case ATMEL_ISI_PIXFMT_GRB16_REV:
cr = (ISI_BIT(COL_SPACE) | ISI_BIT(RGB_SWAP)
| ISI_BIT(RGB_MODE) | ISI_BF(RGB_CFG, 2));
break;
case ATMEL_ISI_PIXFMT_GBR16_REV:
cr = (ISI_BIT(COL_SPACE) | ISI_BIT(RGB_SWAP)
| ISI_BIT(RGB_MODE) | ISI_BF(RGB_CFG, 3));
break;
default:
return -EINVAL;
}
cr1 = ISI_BF(EMB_SYNC, (has_emb_sync))
| ISI_BF(HSYNC_POL, hsync_act_low)
| ISI_BF(VSYNC_POL, vsync_act_low)
| ISI_BF(PIXCLK_POL, pclk_act_falling)
| ISI_BF(FULL, isi_full_mode)
| ISI_BIT(DIS);
isi_writel(isi, CR1, cr1);
pr_debug("OV sync %s\n", has_emb_sync ? "CCIR656" : "VSYNC");
#ifndef ISI_CODEC
/* These values depend on the sensor output image size */
isi_writel(isi, PDECF, prev_decimation_factor);/* 1/16 * 16 = 1*/
isi_writel(isi,PSIZE , ISI_BF(PREV_HSIZE,prev_hsize - 1)
| ISI_BF(PREV_VSIZE, prev_vsize - 1));
#endif
cr2 = isi_readl(isi, CR2);
cr2 |= cr;
cr2 = ISI_BFINS(IM_VSIZE, isi->format.pix.height - 1, cr2);
cr2 = ISI_BFINS(IM_HSIZE, isi->format.pix.width - 1, cr2);
isi_writel(isi, CR2, cr2);
pr_debug("set_format: cr1=0x%08x\n cr2=0x%08x\n",
isi_readl(isi, CR1), isi_readl(isi, CR2));
pr_debug("psize=0x%08x\n", isi_readl(isi, PSIZE));
return 0;
}
#endif /* CONFIG_ARCH_AT91SAM9G45 */
static int atmel_isi_start_capture(struct atmel_isi *isi)
{
u32 cr, sr=0;
int ret;
spin_lock_irq(&isi->lock);
isi->state = STATE_IDLE;
if(atmelisi_is_isi_v2()) {
sr = isi_readl(isi, V2_STATUS); /* clear any pending SOF interrupt */
isi_writel(isi, V2_INTEN, ISI_BIT(V2_VSYNC)); /* <=> SOF in previous ISI */
isi_writel(isi, V2_CTRL, isi_readl(isi, V2_CTRL) | ISI_BIT(V2_EN));
/* Check if module properly enable */
while(isi_readl(isi, V2_STATUS) & ISI_BIT(V2_ENABLE));
} else {
isi_readl(isi, SR); /* clear any pending SOF interrupt */
isi_writel(isi, IER, ISI_BIT(SOF));
isi_writel(isi, CR1, isi_readl(isi, CR1) & ~ISI_BIT(DIS));
}
spin_unlock_irq(&isi->lock);
pr_debug("isi: waiting for SOF\n");
ret = wait_event_interruptible(isi->capture_wq,
isi->state != STATE_IDLE);
if (ret)
return ret;
if (isi->state != STATE_CAPTURE_READY)
return -EIO;
/*
* Do a codec request. Next SOF indicates start of capture,
* the one after that indicates end of capture.
*/
pr_debug("isi: starting capture\n");
if(atmelisi_is_isi_v2()) {
/* Enable */
isi_writel(isi, V2_DMA_CHER, ISI_BIT(V2_DMA_C_CH_EN));
isi_writel(isi, V2_DMA_C_ADDR, isi->capture_phys);
} else {
isi_writel(isi, CDBA, isi->capture_phys);
}
spin_lock_irq(&isi->lock);
isi->state = STATE_CAPTURE_WAIT_SOF;
if(atmelisi_is_isi_v2()) {
/* Check if already in a frame */
while(isi_readl(isi, V2_STATUS) & ISI_BIT(V2_CDC));
cr = isi_readl(isi, V2_CTRL);
cr |= ISI_BIT(V2_CDC);
isi_writel(isi, V2_CTRL, cr);
isi_writel(isi, V2_INTEN, ISI_V2_CAPTURE_MASK);
} else {
cr = isi_readl(isi, CR1);
cr |= ISI_BIT(CODEC_ON);
isi_writel(isi, CR1, cr);
isi_writel(isi, IER, ISI_CAPTURE_MASK);
}
spin_unlock_irq(&isi->lock);
return 0;
}
static void atmel_isi_capture_done(struct atmel_isi *isi,
int state)
{
u32 cr;
if(atmelisi_is_isi_v2()) {
cr = isi_readl(isi, V2_CTRL);
cr &= ~ISI_BIT(V2_CDC);
isi_writel(isi, V2_CTRL, cr);
} else {
cr = isi_readl(isi, CR1);
cr &= ~ISI_BIT(CODEC_ON);
isi_writel(isi, CR1, cr);
}
isi->state = state;
pr_debug("Capture done!\n");
wake_up_interruptible(&isi->capture_wq);
if(atmelisi_is_isi_v2()) {
isi_writel(isi, V2_INTDIS, ISI_V2_CAPTURE_MASK);
} else {
isi_writel(isi, IDR, ISI_CAPTURE_MASK);
}
}
#if defined(CONFIG_ARCH_AT91SAM9G45) /* ISI_V2 */
static irqreturn_t atmel_isi_handle_streaming(struct atmel_isi *isi,
int sequence){
int reqnr, putnr;
struct frame_buffer *buffer;
pr_debug("isi: isi_handle_streaming\n");
if(kfifo_get(isi->grabq, (unsigned char *) &reqnr,
sizeof(int)) != sizeof(int)){
/* as no new buffer is available we keep the
* current one
*/
pr_debug("Not dequeud yet, so we use the same buffer\n");
}
else{
if(sequence != 0) {
if(reqnr == 0) {
putnr = video_buffers-1;
}
else {
putnr = reqnr-1;
}
}
else {
putnr = 0;
}
buffer = &(isi->video_buffer[putnr]);
buffer->status = FRAME_DONE;
kfifo_put(isi->doneq, (unsigned char *)
&(putnr), sizeof(int));
}
return IRQ_HANDLED;
}
/* isi interrupt service routine */
static irqreturn_t isi_interrupt(int irq, void *dev_id)
{
struct atmel_isi *isi = dev_id;
u32 status, mask, pending;
irqreturn_t ret = IRQ_NONE;
/* TODO Should we set sequence to 0 upon each start sequence? */
static int sequence = 0;
spin_lock(&isi->lock);
status = isi_readl(isi, V2_STATUS);
mask = isi_readl(isi, V2_INTMASK);
pending = status & mask;
pr_debug("isi: interrupt:\n status 0x%08x\n pending 0x%08x\n"
" mask=0x%08x\n",
status, pending, mask);
if(isi->streaming){
if(likely(pending & (ISI_BIT(V2_CXFR_DONE) | ISI_BIT(V2_PXFR_DONE)))) {
sequence++;
#ifdef ISI_CODEC
/* if using the codec path we need to set a
* CDC request for each frame captured
*/
isi_writel(isi, V2_CTRL,
isi_readl(isi, V2_CTRL) | ISI_BIT(V2_CDC));
#endif
ret = atmel_isi_handle_streaming(isi, sequence);
}
}
else{
while (pending) {
if (pending & (ISI_BIT(V2_C_OVR) | ISI_BIT(V2_FR_OVR))) {
atmel_isi_capture_done(isi, STATE_CAPTURE_ERROR);
pr_debug("%s: FIFO overrun (status=0x%x)\n",
isi->vdev.name, status);
} else if (pending & (ISI_BIT(V2_VSYNC) | ISI_BIT(V2_CDC))) {
switch (isi->state) {
case STATE_IDLE:
isi->state = STATE_CAPTURE_READY;
wake_up_interruptible(&isi->capture_wq);
break;
case STATE_CAPTURE_READY:
break;
case STATE_CAPTURE_WAIT_SOF:
isi->state = STATE_CAPTURE_IN_PROGRESS;
break;
}
}
if (pending & (ISI_BIT(V2_CXFR_DONE) | ISI_BIT(V2_PXFR_DONE))){
if( isi->state == STATE_CAPTURE_IN_PROGRESS)
atmel_isi_capture_done(isi, STATE_CAPTURE_DONE);
}
if (pending & ISI_BIT(V2_SRST)) {
complete(&isi->reset_complete);
isi_writel(isi, V2_INTDIS, ISI_BIT(V2_SRST));
}
status = isi_readl(isi, V2_STATUS);
mask = isi_readl(isi, V2_INTMASK);
pending = status & mask;
ret = IRQ_HANDLED;
}
}
spin_unlock(&isi->lock);
return ret;
}
#else
static irqreturn_t atmel_isi_handle_streaming(struct atmel_isi *isi,
int *sequence){
int reqnr, putnr;
if(!kfifo_get(isi->grabq, (unsigned char *) &reqnr,
sizeof(int)) /*!= sizeof(int)*/){
/* as no new buffer is available we keep the
* current one
*/
pr_debug("Not dequeud yet, so we use the same buffer\n");
#ifdef ISI_CODEC
/* Enable codec request */
isi_writel(isi, CR1, ISI_BIT(CODEC_ON) |
isi_readl(isi, CR1));
#else
/* TEST this has to be tested if it messes up the ISI
* streaming process */
isi_writel(isi, PPFBD, (unsigned long)
&isi->video_buffer[isi->current_buffer->index]);
#endif
}
else{
if(sequence != 0) {
if(reqnr == 0) {
putnr = video_buffers-1;
}
else {
putnr = reqnr-1;
}
}
else {
putnr = 0;
}
*sequence = *sequence + 1;
isi->current_buffer = &(isi->video_buffer[putnr]);
isi->current_buffer->status = FRAME_DONE;
isi->current_buffer->sequence = *sequence;
kfifo_put(isi->doneq, (unsigned char *)
&(putnr), sizeof(int));
isi->current_buffer = &(isi->video_buffer[reqnr]);
#ifdef ISI_CODEC
isi_writel(isi, CDBA,
isi->current_buffer->fb_desc.fb_address);
isi_writel(isi, CR1, ISI_BIT(CODEC_ON) |
isi_readl(isi, CR1));
#else
/*TODO check if fbd corresponds to frame buffer */
#endif
}
return IRQ_HANDLED;
}
/* isi interrupt service routine */
static irqreturn_t isi_interrupt(int irq, void *dev_id)
{
struct atmel_isi *isi = dev_id;
u32 status, mask, pending;
irqreturn_t ret = IRQ_NONE;
/* TODO Should we set sequence to 0 upon each start sequence? */
static int sequence = 0;
spin_lock(&isi->lock);
status = isi_readl(isi, SR);
mask = isi_readl(isi, IMR);
pending = status & mask;
pr_debug("isi: interrupt status %x pending %x, mask %x\n",
status, pending, mask);
if(isi->streaming){
if(likely(pending & (ISI_BIT(FO_C_EMP) | ISI_BIT(FO_P_EMP)))){
ret = atmel_isi_handle_streaming(isi, &sequence);
}
}
else{
while (pending) {
if (pending & (ISI_BIT(FO_C_OVF) | ISI_BIT(FR_OVR))) {
atmel_isi_capture_done(isi, STATE_CAPTURE_ERROR);
pr_debug("%s: FIFO overrun (status=0x%x)\n",
isi->vdev.name, status);
} else if (pending & ISI_BIT(SOF)) {
switch (isi->state) {
case STATE_IDLE:
isi->state = STATE_CAPTURE_READY;
wake_up_interruptible(&isi->capture_wq);
break;
case STATE_CAPTURE_READY:
break;
case STATE_CAPTURE_WAIT_SOF:
isi->state = STATE_CAPTURE_IN_PROGRESS;
break;
}
}
if (pending & ISI_BIT(FO_C_EMP)){
if( isi->state == STATE_CAPTURE_IN_PROGRESS)
atmel_isi_capture_done(isi, STATE_CAPTURE_DONE);
}