diff --git a/test/t_vtarget_gen.cc b/test/t_vtarget_gen.cc
index f42793977..7ea3cb1fa 100644
--- a/test/t_vtarget_gen.cc
+++ b/test/t_vtarget_gen.cc
@@ -324,8 +324,8 @@ TEST(TestVlgTargetGen, Memory) {
   vg.GenerateTargets();
 }
 
-TEST(TestVlgTargetGen,
-     DISABLED_MemoryInternal) { // test the expansion of memory
+TEST(TestVlgTargetGen, MemoryInternal) { // test the expansion of memory
+
   auto ila_model = MemorySwap::BuildSimpleSwapModel();
 
   VerilogVerificationTargetGenerator::vtg_config_t