Circuit drawer issues when setting idle_wires=False

[diemilio]

Environment

• Qiskit version: 1.2.0
• Python version: 3.11.9
• Operating system: MacOS

What is happening?

The circuit drawer does not display certain circuits correctly when the idle_wires option is set to False. For example, when a barrier is added, the drawer assumes there is no gates after the barrier, so it does not display those qubits (see below). This happens with all drawers (not just mpl).

How can we reproduce the issue?

Drawer behaves as expected when idle_wires=True:

from qiskit import QuantumCircuit

qc = QuantumCircuit(2)
qc.x(1)
qc.barrier()
qc.h(0)
qc.draw(idle_wires=True, style='bw')

Output:

But ignores q0 when idle_wires=False:

qc = QuantumCircuit(2)
qc.x(1)
qc.barrier()
qc.h(0)
qc.draw(idle_wires=False, style='bw')

Output:

It also has a strange behavior in the presence of 2-qubit gates:

qc = QuantumCircuit(2)
qc.x(1)
qc.barrier()
qc.cx(1,0)
qc.draw(idle_wires=False, style='bw')

Output:

What should happen?

Drawer should only ignore qubits/cbits with no instructions associated with them.

Any suggestions?

No response

[t-imamichi]

I think it's already fixed #13149. Could you try 1.2.4?

[diemilio]

Yes. It works in 1.2.4. Apologies, I searched the closed issues on github before posting, but did not find the one you linked. Closing this now.

[t-imamichi]

No problem. I think the relevant PR and issues to your issue are difficult to find. It took me a while to remember the PR though I was involved in the investigation. I appreciate your report. Don't hesitate to submit issues.