31
31
#include <string.h>
32
32
33
33
#define RDRAM_BCAST_ADDRESS_MASK UINT32_C(0x00080000)
34
-
34
+ #define RDRAM_MODE_CE_MASK UINT32_C(0x80000000)
35
35
36
36
/* XXX: deduce # of RDRAM modules from it's total size
37
37
* Assume only 2Mo RDRAM modules.
@@ -59,19 +59,29 @@ static osal_inline uint16_t idfield_value(uint32_t device_id)
59
59
{
60
60
return ((((device_id >> 26 ) & 0x3f ) << 0 )
61
61
| (((device_id >> 23 ) & 0x01 ) << 6 )
62
- | (((device_id >> 16 ) & 0xff ) << 7 )
62
+ | (((device_id >> 15 ) & 0xff ) << 7 )
63
63
| (((device_id >> 7 ) & 0x01 ) << 15 ));
64
64
}
65
65
66
+ static osal_inline uint16_t ri_address_to_idfield (uint32_t address )
67
+ {
68
+ const uint32_t swapfield = 0 ; // TODO
69
+
70
+ return (uint16_t )((((swapfield & ((address >> 11 ) & 0xFF )) | ((~swapfield & (address >> 20 & 0xFF ))))) | /* AdrS[28:20] */
71
+ (((address >> 29 ) & 0x3F ) << 9 )); /* AdrS[35:29] */
72
+ }
73
+
74
+ #include <stdio.h>
66
75
static size_t get_module (const struct rdram * rdram , uint32_t address )
67
76
{
68
77
size_t module ;
69
78
size_t modules = get_modules_count (rdram );
70
- uint16_t id_field = ri_address_to_id_field (address );
71
-
79
+ uint16_t id_field = ri_address_to_idfield (rdram_address_to_ri_address (address ));
72
80
73
81
for (module = 0 ; module < modules ; ++ module ) {
74
- if (id_field == idfield_value (rdram -> regs [module ][RDRAM_DEVICE_ID_REG ])) {
82
+ //printf("id_field = 0x%08X, idfield_value = 0x%08X\n", id_field >> 1 & 0x3F, (((idfield_value(rdram->regs[module][RDRAM_DEVICE_ID_REG]) >> 1)) & 0x3F));
83
+ // TODO: move shift to elsewhere
84
+ if (((id_field >> 1 ) & 0x3F ) == (((idfield_value (rdram -> regs [module ][RDRAM_DEVICE_ID_REG ]) >> 1 & 0x3F )))) {
75
85
return module ;
76
86
}
77
87
}
@@ -155,7 +165,7 @@ void poweron_rdram(struct rdram* rdram)
155
165
}
156
166
}
157
167
158
-
168
+ #include <stdio.h>
159
169
void read_rdram_regs (void * opaque , uint32_t address , uint32_t * value )
160
170
{
161
171
struct rdram * rdram = (struct rdram * )opaque ;
@@ -191,7 +201,7 @@ void write_rdram_regs(void* opaque, uint32_t address, uint32_t value, uint32_t m
191
201
/* HACK: Detect when current Control calibration is about to start,
192
202
* so we can set corrupted rdram_dram handler
193
203
*/
194
- if (address & RDRAM_BCAST_ADDRESS_MASK && reg == RDRAM_DELAY_REG ) {
204
+ /* if (address & RDRAM_BCAST_ADDRESS_MASK && reg == RDRAM_DELAY_REG) {
195
205
map_corrupt_rdram(rdram, 1);
196
206
}
197
207
@@ -200,15 +210,7 @@ void write_rdram_regs(void* opaque, uint32_t address, uint32_t value, uint32_t m
200
210
* and let dynarec have it's fast_memory enabled.
201
211
*/
202
212
if (address & RDRAM_BCAST_ADDRESS_MASK && reg == RDRAM_MODE_REG ) {
203
- map_corrupt_rdram (rdram , 0 );
204
-
205
- /* HACK: In the IPL3 procedure, at this point,
206
- * the amount of detected memory can be found in s4 */
207
- size_t ipl3_rdram_size = r4300_regs (rdram -> r4300 )[20 ] & UINT32_C (0x0fffffff );
208
- if (ipl3_rdram_size != rdram -> dram_size ) {
209
- DebugMessage (M64MSG_WARNING , "IPL3 detected %u MB of RDRAM != %u MB" ,
210
- (uint32_t ) ipl3_rdram_size / (1024 * 1024 ), (uint32_t ) rdram -> dram_size / (1024 * 1024 ));
211
- }
213
+ // map_corrupt_rdram(rdram, 0);
212
214
}
213
215
214
216
@@ -230,6 +232,21 @@ void read_rdram_dram(void* opaque, uint32_t address, uint32_t* value)
230
232
{
231
233
struct rdram * rdram = (struct rdram * )opaque ;
232
234
uint32_t addr = rdram_dram_address (address );
235
+ size_t module = get_module (rdram , address );
236
+
237
+ if (module == RDRAM_MAX_MODULES_COUNT )
238
+ {
239
+ * value = 0 ;
240
+ return ;
241
+ }
242
+
243
+ /* corrupt read value if CC value is not calibrated */
244
+ uint32_t mode = rdram -> regs [module ][RDRAM_MODE_REG ] ^ UINT32_C (0xc0c0c0c0 );
245
+ if ((mode & RDRAM_MODE_CE_MASK ) && (cc_value (mode ) == 0 ))
246
+ {
247
+ * value = 0 ;
248
+ return ;
249
+ }
233
250
234
251
if (address < rdram -> dram_size )
235
252
{
0 commit comments