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kulcsaradamkulcsaradam
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Patch bugs on x64 and x86
Signed-off-by: Ádám Kulcsár <[email protected]>
1 parent cc6501c commit 19730b3

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7 files changed

+248
-76
lines changed

7 files changed

+248
-76
lines changed

‎src/interpreter/ByteCode.cpp‎

Lines changed: 112 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -148,18 +148,21 @@ std::vector<Walrus::ByteCodeStackOffset> ByteCode::getByteCodeStackOffsets(Funct
148148
FOR_EACH_BYTECODE_LOAD_OP(GENERATE_MEMORY_LOAD_CODE_CASE)
149149
FOR_EACH_BYTECODE_SIMD_LOAD_EXTEND_OP(GENERATE_MEMORY_LOAD_CODE_CASE)
150150
FOR_EACH_BYTECODE_SIMD_LOAD_SPLAT_OP(GENERATE_MEMORY_LOAD_CODE_CASE)
151+
FOR_EACH_BYTECODE_SIMD_ETC_MEMIDX_OP(GENERATE_MEMORY_LOAD_CODE_CASE)
151152
#undef GENERATE_MEMORY_LOAD_CODE_CASE
152-
{
153-
offsets.push_back(reinterpret_cast<Walrus::MemoryLoad *>(const_cast<ByteCode *>(this))->srcOffset());
154-
offsets.push_back(reinterpret_cast<Walrus::MemoryLoad *>(const_cast<ByteCode *>(this))->dstOffset());
155-
break;
156-
}
153+
case Walrus::ByteCode::V128Load32ZeroOpcode:
154+
case Walrus::ByteCode::V128Load64ZeroOpcode: {
155+
offsets.push_back(reinterpret_cast<Walrus::MemoryLoad *>(const_cast<ByteCode *>(this))->srcOffset());
156+
offsets.push_back(reinterpret_cast<Walrus::MemoryLoad *>(const_cast<ByteCode *>(this))->dstOffset());
157+
break;
158+
}
157159

158160
#define GENERATE_SIMD_MEMORY_LOAD_CASE(name, ...) \
159161
case Walrus::ByteCode::name##Opcode:
160162
FOR_EACH_BYTECODE_SIMD_LOAD_LANE_OP(GENERATE_SIMD_MEMORY_LOAD_CASE)
161163
#undef GENERATE_SIMD_MEMORY_LOAD_CASE
162164
{
165+
offsets.push_back(reinterpret_cast<Walrus::SIMDMemoryLoad *>(const_cast<ByteCode *>(this))->index());
163166
offsets.push_back(reinterpret_cast<Walrus::SIMDMemoryLoad *>(const_cast<ByteCode *>(this))->src0Offset());
164167
offsets.push_back(reinterpret_cast<Walrus::SIMDMemoryLoad *>(const_cast<ByteCode *>(this))->src1Offset());
165168
offsets.push_back(reinterpret_cast<Walrus::SIMDMemoryLoad *>(const_cast<ByteCode *>(this))->dstOffset());
@@ -192,6 +195,7 @@ std::vector<Walrus::ByteCodeStackOffset> ByteCode::getByteCodeStackOffsets(Funct
192195
FOR_EACH_BYTECODE_SIMD_STORE_LANE_OP(GENERATE_SIMD_MEMORY_STORE_CASE)
193196
#undef GENERATE_SIMD_MEMORY_STORE_CASE
194197
{
198+
offsets.push_back(reinterpret_cast<Walrus::SIMDMemoryStore *>(const_cast<ByteCode *>(this))->index());
195199
offsets.push_back(reinterpret_cast<Walrus::SIMDMemoryStore *>(const_cast<ByteCode *>(this))->src0Offset());
196200
offsets.push_back(reinterpret_cast<Walrus::SIMDMemoryStore *>(const_cast<ByteCode *>(this))->src1Offset());
197201
break;
@@ -201,6 +205,7 @@ std::vector<Walrus::ByteCodeStackOffset> ByteCode::getByteCodeStackOffsets(Funct
201205
FOR_EACH_BYTECODE_SIMD_EXTRACT_LANE_OP(GENERATE_SIMD_EXTRACT_LANE_CODE_CASE)
202206
#undef GENERATE_SIMD_EXTRACT_LANE_CODE_CASE
203207
{
208+
offsets.push_back(reinterpret_cast<Walrus::SIMDExtractLane *>(const_cast<ByteCode *>(this))->index());
204209
offsets.push_back(reinterpret_cast<Walrus::SIMDExtractLane *>(const_cast<ByteCode *>(this))->srcOffset());
205210
offsets.push_back(reinterpret_cast<Walrus::SIMDExtractLane *>(const_cast<ByteCode *>(this))->dstOffset());
206211
break;
@@ -210,6 +215,7 @@ std::vector<Walrus::ByteCodeStackOffset> ByteCode::getByteCodeStackOffsets(Funct
210215
FOR_EACH_BYTECODE_SIMD_REPLACE_LANE_OP(GENERATE_SIMD_REPLACE_LANE_CODE_CASE)
211216
#undef GENERATE_SIMD_REPLACE_LANE_CODE_CASE
212217
{
218+
offsets.push_back(reinterpret_cast<Walrus::SIMDReplaceLane *>(const_cast<ByteCode *>(this))->index());
213219
offsets.push_back(reinterpret_cast<Walrus::SIMDReplaceLane *>(const_cast<ByteCode *>(this))->srcOffsets()[0]);
214220
offsets.push_back(reinterpret_cast<Walrus::SIMDReplaceLane *>(const_cast<ByteCode *>(this))->srcOffsets()[1]);
215221
offsets.push_back(reinterpret_cast<Walrus::SIMDReplaceLane *>(const_cast<ByteCode *>(this))->dstOffset());
@@ -541,8 +547,6 @@ void ByteCode::setByteCodeOffset(size_t index, Walrus::ByteCodeStackOffset offse
541547
}
542548
break;
543549
}
544-
545-
546550
#define GENERATE_BYTECODE_OFFSET2VALUE_MEMIDX_CASE(name, ...) \
547551
case Walrus::ByteCode::name##Opcode:
548552
FOR_EACH_BYTECODE_STORE_MEMIDX_OP(GENERATE_BYTECODE_OFFSET2VALUE_MEMIDX_CASE)
@@ -563,30 +567,125 @@ void ByteCode::setByteCodeOffset(size_t index, Walrus::ByteCodeStackOffset offse
563567
FOR_EACH_BYTECODE_SIMD_LOAD_LANE_OP(GENERATE_SIMD_MEMORY_LOAD_CASE)
564568
#undef GENERATE_SIMD_MEMORY_LOAD_CASE
565569
{
570+
SIMDMemoryLoad *memoryLoad = reinterpret_cast<SIMDMemoryLoad *>(const_cast<ByteCode *>(this));
571+
switch (index) {
572+
case 0: {
573+
memoryLoad->setIndex(offset);
574+
break;
575+
}
576+
case 1: {
577+
memoryLoad->setSrc0Offset(offset);
578+
break;
579+
}
580+
case 2: {
581+
memoryLoad->setSrc1Offset(offset);
582+
break;
583+
}
584+
case 3: {
585+
memoryLoad->setDstOffset(offset);
586+
break;
587+
}
588+
}
566589
break;
567590
}
568-
#define GENERATE_SIMD_MEMORY_STORE_CASE(name, ...) \
591+
#define GENERATE_SIMD_MEMORY_LOAD_LANE_MEMIDX_CASE(name, ...) \
569592
case Walrus::ByteCode::name##Opcode:
570-
FOR_EACH_BYTECODE_SIMD_STORE_LANE_OP(GENERATE_SIMD_MEMORY_STORE_CASE)
571-
#undef GENERATE_SIMD_MEMORY_STORE_CASE
593+
FOR_EACH_BYTECODE_SIMD_LOAD_LANE_MEMIDX_OP(GENERATE_SIMD_MEMORY_LOAD_LANE_MEMIDX_CASE)
594+
#undef GENERATE_SIMD_MEMORY_LOAD_LANE_MEMIDX_CASE
595+
{
596+
SIMDMemoryLoadMemIdx *memoryLoad = reinterpret_cast<SIMDMemoryLoadMemIdx *>(const_cast<ByteCode *>(this));
597+
switch (index) {
598+
case 0: {
599+
memoryLoad->setIndex(offset);
600+
break;
601+
}
602+
case 1: {
603+
memoryLoad->setSrc0Offset(offset);
604+
break;
605+
}
606+
case 2: {
607+
memoryLoad->setSrc1Offset(offset);
608+
break;
609+
}
610+
case 3: {
611+
memoryLoad->setDstOffset(offset);
612+
break;
613+
}
614+
}
615+
break;
616+
}
617+
#define GENERATE_SIMD_MEMORY_STORE_LANE_CASE(name, ...) \
618+
case Walrus::ByteCode::name##Opcode:
619+
FOR_EACH_BYTECODE_SIMD_STORE_LANE_OP(GENERATE_SIMD_MEMORY_STORE_LANE_CASE)
620+
#undef GENERATE_SIMD_MEMORY_STORE_LANE_CASE
621+
{
622+
SIMDMemoryStore *memoryStore = reinterpret_cast<SIMDMemoryStore *>(const_cast<ByteCode *>(this));
623+
if (index == 0) {
624+
memoryStore->setIndex(offset);
625+
} else if (index == 1) {
626+
memoryStore->setSrc0Offset(offset);
627+
} else {
628+
memoryStore->setSrc1Offset(offset);
629+
}
630+
break;
631+
}
632+
#define GENERATE_SIMD_MEMORY_STORE_LANE_MEMIDX_CASE(name, ...) \
633+
case Walrus::ByteCode::name##Opcode:
634+
FOR_EACH_BYTECODE_SIMD_STORE_LANE_MEMIDX_OP(GENERATE_SIMD_MEMORY_STORE_LANE_MEMIDX_CASE)
635+
#undef GENERATE_SIMD_MEMORY_STORE_LANE_MEMIDX_CASE
572636
{
637+
SIMDMemoryStoreMemIdx *memoryStore = reinterpret_cast<SIMDMemoryStoreMemIdx *>(const_cast<ByteCode *>(this));
638+
if (index == 0) {
639+
memoryStore->setIndex(offset);
640+
} else if (index == 1) {
641+
memoryStore->setSrc0Offset(offset);
642+
} else {
643+
memoryStore->setSrc1Offset(offset);
644+
}
573645
break;
574646
}
575647
#define GENERATE_SIMD_EXTRACT_LANE_CODE_CASE(name, ...) \
576648
case Walrus::ByteCode::name##Opcode:
577649
FOR_EACH_BYTECODE_SIMD_EXTRACT_LANE_OP(GENERATE_SIMD_EXTRACT_LANE_CODE_CASE)
578650
#undef GENERATE_SIMD_EXTRACT_LANE_CODE_CASE
579651
{
652+
SIMDExtractLane *extractLane = reinterpret_cast<SIMDExtractLane *>(const_cast<ByteCode *>(this));
653+
if (index == 0) {
654+
extractLane->setIndex(offset);
655+
} else if (index == 1) {
656+
extractLane->setSrcOffset(offset);
657+
} else {
658+
extractLane->setDstOffset(offset);
659+
}
580660
break;
581661
}
582662
#define GENERATE_SIMD_REPLACE_LANE_CODE_CASE(name, ...) \
583663
case Walrus::ByteCode::name##Opcode:
584664
FOR_EACH_BYTECODE_SIMD_REPLACE_LANE_OP(GENERATE_SIMD_REPLACE_LANE_CODE_CASE)
585665
#undef GENERATE_SIMD_REPLACE_LANE_CODE_CASE
586666
{
667+
SIMDReplaceLane *replaceLane = reinterpret_cast<SIMDReplaceLane *>(const_cast<ByteCode *>(this));
668+
669+
switch (index) {
670+
case 0: {
671+
replaceLane->setIndex(offset);
672+
break;
673+
}
674+
case 1: {
675+
replaceLane->setSrc0Offset(offset);
676+
break;
677+
}
678+
case 2: {
679+
replaceLane->setSrc1Offset(offset);
680+
break;
681+
}
682+
case 3: {
683+
replaceLane->setDstOffset(offset);
684+
break;
685+
}
686+
}
587687
break;
588688
}
589-
// Special cases that require manual handling. This list needs to be extended if new byte codes are introduced.
590689
case Walrus::ByteCode::SelectOpcode: {
591690
Walrus::Select *sel = reinterpret_cast<Walrus::Select *>(const_cast<ByteCode *>(this));
592691
switch (index) {
@@ -620,6 +719,8 @@ void ByteCode::setByteCodeOffset(size_t index, Walrus::ByteCodeStackOffset offse
620719
break;
621720
}
622721
case Walrus::ByteCode::MemorySizeOpcode: {
722+
MemorySize *memorySize = reinterpret_cast<Walrus::MemorySize *>(const_cast<ByteCode *>(this));
723+
memorySize->setDstOffset(offset);
623724
break;
624725
}
625726
case Walrus::ByteCode::MemoryInitOpcode: {

‎src/interpreter/ByteCode.h‎

Lines changed: 26 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1870,6 +1870,11 @@ class MemorySize : public ByteCode {
18701870
{
18711871
}
18721872

1873+
void setDstOffset(Walrus::ByteCodeStackOffset o)
1874+
{
1875+
m_dstOffset = o;
1876+
}
1877+
18731878
ByteCodeStackOffset dstOffset() const { return m_dstOffset; }
18741879
uint16_t memIndex() const { return m_memIndex; }
18751880

@@ -2099,9 +2104,13 @@ class SIMDMemoryLoad : public ByteCode {
20992104

21002105
uint32_t offset() const { return m_offset; }
21012106
ByteCodeStackOffset index() const { return m_index; }
2107+
void setIndex(ByteCodeStackOffset o) { m_index = o; }
21022108
ByteCodeStackOffset src0Offset() const { return m_src0Offset; }
2109+
void setSrc0Offset(ByteCodeStackOffset o) { m_src0Offset = o; }
21032110
ByteCodeStackOffset src1Offset() const { return m_src1Offset; }
2111+
void setSrc1Offset(ByteCodeStackOffset o) { m_src1Offset = o; }
21042112
ByteCodeStackOffset dstOffset() const { return m_dstOffset; }
2113+
void setDstOffset(ByteCodeStackOffset o) { m_dstOffset = o; }
21052114

21062115
#if !defined(NDEBUG)
21072116
void dump(size_t pos)
@@ -2133,9 +2142,13 @@ class SIMDMemoryLoadMemIdx : public ByteCode {
21332142

21342143
uint32_t offset() const { return m_offset; }
21352144
ByteCodeStackOffset index() const { return m_index; }
2145+
void setIndex(ByteCodeStackOffset o) { m_index = o; }
21362146
ByteCodeStackOffset src0Offset() const { return m_src0Offset; }
2147+
void setSrc0Offset(ByteCodeStackOffset o) { m_src0Offset = o; }
21372148
ByteCodeStackOffset src1Offset() const { return m_src1Offset; }
2149+
void setSrc1Offset(ByteCodeStackOffset o) { m_src1Offset = o; }
21382150
ByteCodeStackOffset dstOffset() const { return m_dstOffset; }
2151+
void setDstOffset(ByteCodeStackOffset o) { m_dstOffset = o; }
21392152
uint16_t memIndex() const { return m_memIndex; }
21402153
uint16_t alignment() const { return m_alignment; }
21412154

@@ -2288,8 +2301,11 @@ class SIMDMemoryStore : public ByteCode {
22882301

22892302
uint32_t offset() const { return m_offset; }
22902303
ByteCodeStackOffset index() const { return m_index; }
2304+
void setIndex(Walrus::ByteCodeStackOffset o) { m_index = o; }
22912305
ByteCodeStackOffset src0Offset() const { return m_src0Offset; }
2306+
void setSrc0Offset(ByteCodeStackOffset o) { m_src0Offset = o; }
22922307
ByteCodeStackOffset src1Offset() const { return m_src1Offset; }
2308+
void setSrc1Offset(ByteCodeStackOffset o) { m_src1Offset = o; }
22932309

22942310
#if !defined(NDEBUG)
22952311
void dump(size_t pos)
@@ -2319,8 +2335,11 @@ class SIMDMemoryStoreMemIdx : public ByteCode {
23192335

23202336
uint32_t offset() const { return m_offset; }
23212337
ByteCodeStackOffset index() const { return m_index; }
2338+
void setIndex(Walrus::ByteCodeStackOffset o) { m_index = o; }
23222339
ByteCodeStackOffset src0Offset() const { return m_src0Offset; }
2340+
void setSrc0Offset(Walrus::ByteCodeStackOffset o) { m_src0Offset = o; }
23232341
ByteCodeStackOffset src1Offset() const { return m_src1Offset; }
2342+
void setSrc1Offset(Walrus::ByteCodeStackOffset o) { m_src1Offset = o; }
23242343
uint16_t memIndex() const { return m_memIndex; }
23252344
uint16_t alignment() const { return m_alignment; }
23262345

@@ -2350,8 +2369,11 @@ class SIMDExtractLane : public ByteCode {
23502369
}
23512370

23522371
ByteCodeStackOffset index() const { return m_index; }
2372+
void setIndex(ByteCodeStackOffset o) { m_index = o; }
23532373
ByteCodeStackOffset srcOffset() const { return m_srcOffset; }
2374+
void setSrcOffset(ByteCodeStackOffset o) { m_srcOffset = o; }
23542375
ByteCodeStackOffset dstOffset() const { return m_dstOffset; }
2376+
void setDstOffset(ByteCodeStackOffset o) { m_dstOffset = o; }
23552377

23562378
#if !defined(NDEBUG)
23572379
void dump(size_t pos)
@@ -2376,8 +2398,12 @@ class SIMDReplaceLane : public ByteCode {
23762398
}
23772399

23782400
uint32_t index() const { return m_index; }
2401+
void setIndex(ByteCodeStackOffset o) { m_index = o; }
23792402
const ByteCodeStackOffset* srcOffsets() const { return m_srcOffsets; }
2403+
void setSrc0Offset(ByteCodeStackOffset o) { m_srcOffsets[0] = o; }
2404+
void setSrc1Offset(ByteCodeStackOffset o) { m_srcOffsets[1] = o; }
23802405
ByteCodeStackOffset dstOffset() const { return m_dstOffset; }
2406+
void setDstOffset(ByteCodeStackOffset o) { m_dstOffset = o; }
23812407

23822408
#if !defined(NDEBUG)
23832409
void dump(size_t pos)

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