{"payload":{"header_redesign_enabled":false,"results":[{"id":"658498787","archived":false,"color":"#b2b7f8","followers":1,"has_funding_file":false,"hl_name":"SheidaAbedpour/Single-Cycle-Datapath","hl_trunc_description":"simple mips architecture ","language":"Verilog","mirror":false,"owned_by_organization":false,"public":true,"repo":{"repository":{"id":658498787,"name":"Single-Cycle-Datapath","owner_id":103281080,"owner_login":"SheidaAbedpour","updated_at":"2023-07-18T19:20:24.282Z","has_issues":true}},"sponsorable":false,"topics":["assembler","verilog","computer-architecture","logisim","mips-architecture","single-cycle","data-path"],"type":"Public","help_wanted_issues_count":0,"good_first_issue_issues_count":0,"starred_by_current_user":false}],"type":"repositories","page":1,"page_count":1,"elapsed_millis":72,"errors":[],"result_count":1,"facets":[],"protected_org_logins":[],"topics":null,"query_id":"","logged_in":false,"sign_up_path":"/signup?source=code_search_results","sign_in_path":"/login?return_to=https%3A%2F%2Fgithub.com%2Fsearch%3Fq%3Drepo%253ASheidaAbedpour%252FSingle-Cycle-Datapath%2B%2Blanguage%253AVerilog","metadata":null,"warn_limited_results":false,"csrf_tokens":{"/SheidaAbedpour/Single-Cycle-Datapath/star":{"post":"UfnP5TjebLEubo2BSONZa9qcJu57MXyLpYdnE_WqABK3kB8xVPV-GBZ1HtPmNDBsmVV_hqslRXOzj4YWxpen1w"},"/SheidaAbedpour/Single-Cycle-Datapath/unstar":{"post":"YsD9wlWQmpeBst02HlsBD_kavam-PfRNzAfgIjldmyaHJx1AFtJFV_j_GC5sqQ3JrSNiV8gDA4ARESte5VjxnA"},"/sponsors/batch_deferred_sponsor_buttons":{"post":"aWGbGQei95z4ptUSHwf5rJGGvcAhuVqxspSuBFMRitDeZVtqldBJWPE9BZQAZ7ge41iuLN67puZW3epcF7EdZA"}}},"title":"Repository search results"}