2.6.5 - Improved bootloaders, assorted fixed new optimization options

This adds:
Whole new set of bootloader entry conditions, similar to what DxCore now has.
A number of assorted changes directed at performance and flash size.
We also get the new version of pinConfigure(). This version allows you to pass an arbitrary number of arguments. They will be automagically combined instead of you having to use the less natural chain of bitwise or's.
Several bugs have been fixed involving sampled BOD, some missing bootloaders for certain Microchip boards. A but that caused problems with reads via SerialUPDI is fixed. A few stupid UART bugs were fixed, like half duplex being broken on UART0, receive being broken on UART1 (both due to analogous mistakes - the UART0 and UART1 specific files were copy/pasted, and in key places, I missed the place where I was supposed to change the number of the USART.
Aaand we add an optimization level menu. This is not really that useful if you're not able to make sense of assembly listings. You can choose the normal -Os, or -O3. For either option, GCSE can be enabled or disabled. This is an option because it makes a non-negligible difference in the size of some sketches. The problem is.... it's about even money which direction the size will move in. Effects of any change in the tool submenu options or changing the chip also impacts the extent to which this helps or hinders. Unfortunately, the magnitude of this is large enough (5% was seen) that we can't really ignore it. So when you really need a little bit more flash, you can always check if this will help you. It's unlikely to make much difference, but for around 10-20% of sketches seemed to benefit at least modestly, about half that suffered modest increase in binary size, and the majority gained or lost a few instruction words.