Update README.md

Author: Tanmaymundra

README.md

@@ -2,20 +2,20 @@
 
 Example List
 1. Comparators
-  * [1 Bit Comparator](https://github.com/Tanmaymundra/vhdl/blob/master/1bit_comp)
-  * [2 Bit Comparator](https://github.com/Tanmaymundra/vhdl/blob/master/2bit_comp)
+  * [1 Bit Comparator](https://github.com/Tanmaymundra/vhdl/blob/master/1bit_comp.vhd)
+  * [2 Bit Comparator](https://github.com/Tanmaymundra/vhdl/blob/master/2bit_comp.vhd)
 
 2. Multiplexers
-  * [4:1 Multiplexer](https://github.com/Tanmaymundra/vhdl/blob/master/4:1%20MUX)
+  * [4:1 Multiplexer](https://github.com/Tanmaymundra/vhdl/blob/master/4:1%20MUX.vhd)
 
 3. Encoder
-  * [4:2 Encoder](https://github.com/Tanmaymundra/vhdl/blob/master/4:2%20Encoder)
-  * [8:3 Encoder](https://github.com/Tanmaymundra/vhdl/blob/master/8:3%20Encoder)
+  * [4:2 Encoder](https://github.com/Tanmaymundra/vhdl/blob/master/4:2%20Encoder.vhd)
+  * [8:3 Encoder](https://github.com/Tanmaymundra/vhdl/blob/master/8:3%20Encoder.vhd)
 
 4. Conversion
-  * [Bcd to Gray](https://github.com/Tanmaymundra/vhdl/blob/master/BCD_Gray)
-  * [Bcd to Excess-3](https://github.com/Tanmaymundra/vhdl/blob/master/BCD%20to%20EX3)
-  * [Gray to Bcd](https://github.com/Tanmaymundra/vhdl/blob/master/Gray_BCD)
+  * [Bcd to Gray](https://github.com/Tanmaymundra/vhdl/blob/master/BCD_Gray.vhd)
+  * [Bcd to Excess-3](https://github.com/Tanmaymundra/vhdl/blob/master/BCD%20to%20EX3.vhd)
+  * [Gray to Bcd](https://github.com/Tanmaymundra/vhdl/blob/master/Gray_BCD.vhd)
 
 5. Shift Registers
   * [PIPO](https://github.com/Tanmaymundra/vhdl/blob/master/Shift%20Registers%20-PIPO.vhd)
@@ -24,15 +24,15 @@ Example List
   * [SIPO](https://github.com/Tanmaymundra/vhdl/blob/master/Shift%20Registers%20-SIPO.vhd)
 
 6. Flip Flops
-  * [T FF](https://github.com/Tanmaymundra/vhdl/blob/master/T%20FF)
-  * [D FF](https://github.com/Tanmaymundra/vhdl/blob/master/D%20FF)
-  * [SR FF](https://github.com/Tanmaymundra/vhdl/blob/master/SR%20FF)
-  * [JK FF](https://github.com/Tanmaymundra/vhdl/blob/master/JK%20FF)
+  * [T FF](https://github.com/Tanmaymundra/vhdl/blob/master/T%20FF.vhd)
+  * [D FF](https://github.com/Tanmaymundra/vhdl/blob/master/D%20FF.vhd)
+  * [SR FF](https://github.com/Tanmaymundra/vhdl/blob/master/SR%20FF.vhd)
+  * [JK FF](https://github.com/Tanmaymundra/vhdl/blob/master/JK%20FF.vhd)
 
 7. Counters
-  * [Ring Counter(D FF)](https://github.com/Tanmaymundra/vhdl/blob/master/Ring%20Counter%20-%20D%20FF)
-  * [Synchronous- 4 Bit](https://github.com/Tanmaymundra/vhdl/blob/master/Synchronous%20Counter%20(4%20Bit))
-  * [Asyncronous 4 Bit Up](https://github.com/Tanmaymundra/vhdl/blob/master/Asynchronous%203bit%20up(JK%20FF))
+  * [Ring Counter(D FF)](https://github.com/Tanmaymundra/vhdl/blob/master/Ring%20Counter%20-%20D%20FF.vhd)
+  * [Synchronous- 4 Bit](https://github.com/Tanmaymundra/vhdl/blob/master/Synchronous%20Counter%20(4%20Bit).vhd)
+  * [Asyncronous 4 Bit Up](https://github.com/Tanmaymundra/vhdl/blob/master/Asynchronous%203bit%20up(JK%20FF).vhd)
 
 8. Pattern
-  * [Sequence Detector](https://github.com/Tanmaymundra/vhdl/blob/master/seq_det)
+  * [Sequence Detector](https://github.com/Tanmaymundra/vhdl/blob/master/seq_det.vhd)