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Description
As per MIPS® Architecture For Programmers Volume II-A: The MIPS64® Instruction Set Reference Manual, Revision 6.06, pp. 272:
Release 6 maps JR and JR.HB to JALR and JALR.HB with rd = 0:
Pre-Release 6, JR and JALR were distinct instructions, both with primary opcode SPECIAL, but with distinct function codes.
Release 6: JR is defined to be JALR with the destination register specifier rd set to 0. The primary opcode and function field are the same for JR and JALR. The pre-Release 6 instruction encoding for JR is removed in Release 6.
Release 6 assemblers should accept the JR and JR.HB mnemonics, mapping them to the Release 6 instruction encodings.
jalr[.hb] $zero, $ra
is architecturally synonymous with jr[.hb] $ra
, and both should be treated as return instructions. However, the current lifter fails to do so:
binaryninja-api/arch/mips/arch_mips.cpp
Lines 336 to 339 in 9e83ea1
case MIPS_JALR: | |
case MIPS_JALR_HB: | |
result.delaySlots = 1; | |
break; |
binaryninja-api/arch/mips/arch_mips.cpp
Lines 383 to 390 in 9e83ea1
//Jmp reg isntructions, if they are jumping to the return address register then it is a function return | |
case MIPS_JR: | |
case MIPS_JR_HB: | |
if (instr.operands[0].reg == REG_RA) | |
result.AddBranch(FunctionReturn, 0, nullptr, hasBranchDelay); | |
else | |
result.AddBranch(UnresolvedBranch, 0, nullptr, hasBranchDelay); | |
break; |