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yangbolu1991p-priyanka-jain
yangbolu1991
authored and
p-priyanka-jain
committed
armv8: layerscape: drop CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
Drop CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33. CONFIG_FSL_ESDHC_VS33_NOT_SUPPORT is used instead. Signed-off-by: Yangbo Lu <[email protected]> Acked-by: Michael Walle <[email protected]> [for kontron-sl28] Reviewed-by: Priyanka Jain <[email protected]>
1 parent b1d5986 commit 34f39ce

17 files changed

+15
-84
lines changed

‎include/configs/T208xQDS.h

+1-2
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,7 @@
11
/* SPDX-License-Identifier: GPL-2.0+ */
22
/*
33
* Copyright 2011-2013 Freescale Semiconductor, Inc.
4-
* Copyright 2020 NXP
4+
* Copyright 2020-2021 NXP
55
*/
66

77
/*
@@ -618,7 +618,6 @@ unsigned long get_board_ddr_clk(void);
618618
#ifdef CONFIG_MMC
619619
#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR
620620
#define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT
621-
#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
622621
#endif
623622

624623
/*

‎include/configs/T208xRDB.h

+1-2
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,7 @@
11
/* SPDX-License-Identifier: GPL-2.0+ */
22
/*
33
* Copyright 2014 Freescale Semiconductor, Inc.
4-
* Copyright 2020 NXP
4+
* Copyright 2020-2021 NXP
55
*/
66

77
/*
@@ -574,7 +574,6 @@ unsigned long get_board_ddr_clk(void);
574574
#ifdef CONFIG_MMC
575575
#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR
576576
#define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT
577-
#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
578577
#endif
579578

580579
/*

‎include/configs/T4240RDB.h

+1-2
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,7 @@
11
/* SPDX-License-Identifier: GPL-2.0+ */
22
/*
33
* Copyright 2014 Freescale Semiconductor, Inc.
4-
* Copyright 2020 NXP
4+
* Copyright 2020-2021 NXP
55
*/
66

77
/*
@@ -585,7 +585,6 @@ unsigned long get_board_ddr_clk(void);
585585
#ifdef CONFIG_MMC
586586
#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR
587587
#define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT
588-
#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
589588
#endif
590589

591590

‎include/configs/kontron_sl28.h

-5
Original file line numberDiff line numberDiff line change
@@ -56,11 +56,6 @@
5656
#define CONFIG_DDR_CLK_FREQ 100000000
5757
#define COUNTER_FREQUENCY_REAL (CONFIG_SYS_CLK_FREQ / 4)
5858

59-
/* MMC */
60-
#ifdef CONFIG_MMC
61-
#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
62-
#endif
63-
6459
/* ethernet */
6560
#define CONFIG_SYS_RX_ETH_BUFFER 8
6661

‎include/configs/ls1012a2g5rdb.h

+1-6
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
/* SPDX-License-Identifier: GPL-2.0+ */
22
/*
3-
* Copyright 2017 NXP
3+
* Copyright 2017, 2021 NXP
44
*/
55

66
#ifndef __LS1012A2G5RDB_H__
@@ -13,11 +13,6 @@
1313
#define CONFIG_CHIP_SELECTS_PER_CTRL 1
1414
#define CONFIG_SYS_SDRAM_SIZE 0x40000000
1515

16-
/* MMC */
17-
#ifdef CONFIG_MMC
18-
#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
19-
#endif
20-
2116
/* SATA */
2217
#define CONFIG_LIBATA
2318
#define CONFIG_SCSI_AHCI

‎include/configs/ls1012afrwy.h

+1-6
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
/* SPDX-License-Identifier: GPL-2.0+ */
22
/*
3-
* Copyright 2018 NXP
3+
* Copyright 2018, 2021 NXP
44
*/
55

66
#ifndef __LS1012AFRWY_H__
@@ -33,11 +33,6 @@
3333
func(DHCP, dhcp, na)
3434
#endif
3535

36-
/* MMC */
37-
#ifdef CONFIG_MMC
38-
#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
39-
#endif
40-
4136
#define CONFIG_PCIE1 /* PCIE controller 1 */
4237

4338
#define CONFIG_PCI_SCAN_SHOW

‎include/configs/ls1012aqds.h

+1-5
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,7 @@
11
/* SPDX-License-Identifier: GPL-2.0+ */
22
/*
33
* Copyright 2016 Freescale Semiconductor, Inc.
4+
* Copyright 2021 NXP
45
*/
56

67
#ifndef __LS1012AQDS_H__
@@ -93,11 +94,6 @@
9394
DSPI_CTAR_DT(0))
9495
#define CONFIG_SPI_FLASH_EON /* cs3 */
9596

96-
/* MMC */
97-
#ifdef CONFIG_MMC
98-
#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
99-
#endif
100-
10197
#define CONFIG_PCIE1 /* PCIE controller 1 */
10298

10399
#define CONFIG_PCI_SCAN_SHOW

‎include/configs/ls1012ardb.h

+1-7
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
/* SPDX-License-Identifier: GPL-2.0+ */
22
/*
3-
* Copyright 2020 NXP
3+
* Copyright 2020-2021 NXP
44
* Copyright 2016 Freescale Semiconductor, Inc.
55
*/
66

@@ -38,12 +38,6 @@
3838
#define __PHY_ETH2_MASK 0xFB
3939
#define __PHY_ETH1_MASK 0xFD
4040

41-
/* MMC */
42-
#ifdef CONFIG_MMC
43-
#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
44-
#endif
45-
46-
4741
#define CONFIG_PCIE1 /* PCIE controller 1 */
4842

4943
#define CONFIG_PCI_SCAN_SHOW

‎include/configs/ls1028a_common.h

+1-6
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
/* SPDX-License-Identifier: GPL-2.0+ */
22
/*
3-
* Copyright 2019-2020 NXP
3+
* Copyright 2019-2021 NXP
44
*/
55

66
#ifndef __L1028A_COMMON_H
@@ -93,11 +93,6 @@
9393

9494
#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
9595

96-
/* MMC */
97-
#ifdef CONFIG_MMC
98-
#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
99-
#endif
100-
10196
#define OCRAM_NONSECURE_SIZE 0x00010000
10297
#define CONFIG_SYS_FSL_QSPI_BASE 0x20000000
10398

‎include/configs/ls1043a_common.h

+1-8
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,7 @@
11
/* SPDX-License-Identifier: GPL-2.0+ */
22
/*
33
* Copyright (C) 2015 Freescale Semiconductor
4-
* Copyright 2019-2020 NXP
4+
* Copyright 2019-2021 NXP
55
*/
66

77
#ifndef __LS1043A_COMMON_H
@@ -171,13 +171,6 @@
171171
#endif
172172
#endif
173173

174-
/* MMC */
175-
#ifndef SPL_NO_MMC
176-
#ifdef CONFIG_MMC
177-
#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
178-
#endif
179-
#endif
180-
181174
/* DSPI */
182175
#ifndef SPL_NO_DSPI
183176
#ifdef CONFIG_FSL_DSPI

‎include/configs/ls1046a_common.h

+1-8
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,7 @@
11
/* SPDX-License-Identifier: GPL-2.0+ */
22
/*
33
* Copyright 2016 Freescale Semiconductor
4-
* Copyright 2019-2020 NXP
4+
* Copyright 2019-2021 NXP
55
*/
66

77
#ifndef __LS1046A_COMMON_H
@@ -165,13 +165,6 @@
165165
CONFIG_SYS_SCSI_MAX_LUN)
166166
#endif
167167

168-
/* MMC */
169-
#ifndef SPL_NO_MMC
170-
#ifdef CONFIG_MMC
171-
#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
172-
#endif
173-
#endif
174-
175168
/* FMan ucode */
176169
#ifndef SPL_NO_FMAN
177170
#define CONFIG_SYS_DPAA_FMAN

‎include/configs/ls1088aqds.h

+1-2
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
/* SPDX-License-Identifier: GPL-2.0+ */
22
/*
3-
* Copyright 2017, 2020 NXP
3+
* Copyright 2017, 2020-2021 NXP
44
*/
55

66
#ifndef __LS1088A_QDS_H
@@ -361,7 +361,6 @@ unsigned long get_board_ddr_clk(void);
361361
#define CONFIG_FSL_MEMAC
362362

363363
/* MMC */
364-
#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
365364
#define CONFIG_ESDHC_DETECT_QUIRK ((readb(QIXIS_BASE + QIXIS_STAT_PRES1) & \
366365
QIXIS_SDID_MASK) != QIXIS_ESDHC_NO_ADAPTER)
367366

‎include/configs/ls1088ardb.h

+1-6
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
/* SPDX-License-Identifier: GPL-2.0+ */
22
/*
3-
* Copyright 2017, 2020 NXP
3+
* Copyright 2017, 2020-2021 NXP
44
*/
55

66
#ifndef __LS1088A_RDB_H
@@ -507,11 +507,6 @@
507507
#endif
508508
#endif
509509

510-
/* MMC */
511-
#ifdef CONFIG_MMC
512-
#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
513-
#endif
514-
515510
#ifndef SPL_NO_ENV
516511

517512
#define BOOT_TARGET_DEVICES(func) \

‎include/configs/ls2080aqds.h

+1-6
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
/* SPDX-License-Identifier: GPL-2.0+ */
22
/*
3-
* Copyright 2017, 2019-2020 NXP
3+
* Copyright 2017, 2019-2021 NXP
44
* Copyright 2015 Freescale Semiconductor
55
*/
66

@@ -318,11 +318,6 @@ unsigned long get_board_ddr_clk(void);
318318
#define CONFIG_PCI_SCAN_SHOW
319319
#endif
320320

321-
/* MMC */
322-
#ifdef CONFIG_MMC
323-
#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
324-
#endif
325-
326321
/* Initial environment variables */
327322
#undef CONFIG_EXTRA_ENV_SETTINGS
328323
#ifdef CONFIG_NXP_ESBC

‎include/configs/ls2080ardb.h

+1-6
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
/* SPDX-License-Identifier: GPL-2.0+ */
22
/*
3-
* Copyright 2017, 2019-2020 NXP
3+
* Copyright 2017, 2019-2021 NXP
44
* Copyright 2015 Freescale Semiconductor
55
*/
66

@@ -300,11 +300,6 @@ unsigned long get_board_sys_clk(void);
300300
#define CONFIG_PCI_SCAN_SHOW
301301
#endif
302302

303-
/* MMC */
304-
#ifdef CONFIG_MMC
305-
#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
306-
#endif
307-
308303
#define BOOT_TARGET_DEVICES(func) \
309304
func(USB, usb, 0) \
310305
func(MMC, mmc, 0) \

‎include/configs/lx2160a_common.h

+1-6
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
/* SPDX-License-Identifier: GPL-2.0+ */
22
/*
3-
* Copyright 2018-2020 NXP
3+
* Copyright 2018-2021 NXP
44
*/
55

66
#ifndef __LX2_COMMON_H
@@ -129,11 +129,6 @@
129129
#define CONFIG_PCI_SCAN_SHOW
130130
#endif
131131

132-
/* MMC */
133-
#ifdef CONFIG_MMC
134-
#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
135-
#endif
136-
137132
/* SATA */
138133

139134
#ifdef CONFIG_SCSI

‎scripts/config_whitelist.txt

-1
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@@ -2307,7 +2307,6 @@ CONFIG_SYS_FSL_MAX_NUM_OF_SEC
23072307
CONFIG_SYS_FSL_MC9SDZ60_I2C_ADDR
23082308
CONFIG_SYS_FSL_MC_BASE
23092309
CONFIG_SYS_FSL_MC_SIZE
2310-
CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
23112310
CONFIG_SYS_FSL_NI_BASE
23122311
CONFIG_SYS_FSL_NI_SIZE
23132312
CONFIG_SYS_FSL_NO_SERDES

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