From 29029b0235ac340ca4c2297caf9dc0b530b55ee5 Mon Sep 17 00:00:00 2001 From: Andreas Rossberg Date: Sun, 11 Feb 2024 21:59:36 +0100 Subject: [PATCH 01/23] [test] Tests for period-less float literals (#1725) --- test/core/float_literals.wast | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/test/core/float_literals.wast b/test/core/float_literals.wast index 3b3ed76bb..9f6fa55ad 100644 --- a/test/core/float_literals.wast +++ b/test/core/float_literals.wast @@ -25,6 +25,10 @@ (func (export "f32.max_finite") (result i32) (i32.reinterpret_f32 (f32.const 0x1.fffffep+127))) (func (export "f32.max_subnormal") (result i32) (i32.reinterpret_f32 (f32.const 0x1.fffffcp-127))) (func (export "f32.trailing_dot") (result i32) (i32.reinterpret_f32 (f32.const 0x1.p10))) + (func (export "f32.misc_int") (result i32) (i32.reinterpret_f32 (f32.const 0x12345))) + (func (export "f32.large_int") (result i32) (i32.reinterpret_f32 (f32.const 0x1_0000_0000_0000_0000_0000))) + (func (export "f32.min_int32") (result i32) (i32.reinterpret_f32 (f32.const -0x8000_0000))) + (func (export "f32.min_int64") (result i32) (i32.reinterpret_f32 (f32.const -0x8000_0000_0000_0000))) ;; f32 in decimal format (func (export "f32_dec.zero") (result i32) (i32.reinterpret_f32 (f32.const 0.0e0))) @@ -36,6 +40,10 @@ (func (export "f32_dec.max_subnormal") (result i32) (i32.reinterpret_f32 (f32.const 1.1754942e-38))) (func (export "f32_dec.max_finite") (result i32) (i32.reinterpret_f32 (f32.const 3.4028234e+38))) (func (export "f32_dec.trailing_dot") (result i32) (i32.reinterpret_f32 (f32.const 1.e10))) + (func (export "f32_dec.misc_int") (result i32) (i32.reinterpret_f32 (f32.const 12345))) + (func (export "f32_dec.large_int") (result i32) (i32.reinterpret_f32 (f32.const 100_000_000_000_000_000_000))) + (func (export "f32_dec.min_int32") (result i32) (i32.reinterpret_f32 (f32.const -2147483648))) + (func (export "f32_dec.min_int64") (result i32) (i32.reinterpret_f32 (f32.const -9223372036854775808))) ;; https://twitter.com/Archivd/status/994637336506912768 (func (export "f32_dec.root_beer_float") (result i32) (i32.reinterpret_f32 (f32.const 1.000000119))) @@ -64,6 +72,10 @@ (func (export "f64.max_subnormal") (result i64) (i64.reinterpret_f64 (f64.const 0x0.fffffffffffffp-1022))) (func (export "f64.max_finite") (result i64) (i64.reinterpret_f64 (f64.const 0x1.fffffffffffffp+1023))) (func (export "f64.trailing_dot") (result i64) (i64.reinterpret_f64 (f64.const 0x1.p100))) + (func (export "f64.misc_int") (result i64) (i64.reinterpret_f64 (f64.const 0x12345))) + (func (export "f64.large_int") (result i64) (i64.reinterpret_f64 (f64.const 0x1_0000_0000_0000_0000_0000))) + (func (export "f64.min_int32") (result i64) (i64.reinterpret_f64 (f64.const -0x8000_0000))) + (func (export "f64.min_int64") (result i64) (i64.reinterpret_f64 (f64.const -0x8000_0000_0000_0000))) ;; f64 numbers in decimal format (func (export "f64_dec.zero") (result i64) (i64.reinterpret_f64 (f64.const 0.0e0))) @@ -75,6 +87,10 @@ (func (export "f64_dec.max_subnormal") (result i64) (i64.reinterpret_f64 (f64.const 2.2250738585072011e-308))) (func (export "f64_dec.max_finite") (result i64) (i64.reinterpret_f64 (f64.const 1.7976931348623157e+308))) (func (export "f64_dec.trailing_dot") (result i64) (i64.reinterpret_f64 (f64.const 1.e100))) + (func (export "f64_dec.misc_int") (result i64) (i64.reinterpret_f64 (f64.const 12345))) + (func (export "f64_dec.large_int") (result i64) (i64.reinterpret_f64 (f64.const 100_000_000_000_000_000_000))) + (func (export "f64_dec.min_int32") (result i64) (i64.reinterpret_f64 (f64.const -2147483648))) + (func (export "f64_dec.min_int64") (result i64) (i64.reinterpret_f64 (f64.const -9223372036854775808))) ;; https://twitter.com/Archivd/status/994637336506912768 (func (export "f64_dec.root_beer_float") (result i64) (i64.reinterpret_f64 (f64.const 1.000000119))) @@ -123,6 +139,10 @@ (assert_return (invoke "f32.max_subnormal") (i32.const 0x7fffff)) (assert_return (invoke "f32.max_finite") (i32.const 0x7f7fffff)) (assert_return (invoke "f32.trailing_dot") (i32.const 0x44800000)) +(assert_return (invoke "f32.misc_int") (i32.const 0x4791a280)) +(assert_return (invoke "f32.large_int") (i32.const 0x67800000)) +(assert_return (invoke "f32.min_int32") (i32.const 0xcf000000)) +(assert_return (invoke "f32.min_int64") (i32.const 0xdf000000)) (assert_return (invoke "f32_dec.zero") (i32.const 0)) (assert_return (invoke "f32_dec.positive_zero") (i32.const 0)) (assert_return (invoke "f32_dec.negative_zero") (i32.const 0x80000000)) @@ -133,6 +153,10 @@ (assert_return (invoke "f32_dec.max_finite") (i32.const 0x7f7fffff)) (assert_return (invoke "f32_dec.trailing_dot") (i32.const 0x501502f9)) (assert_return (invoke "f32_dec.root_beer_float") (i32.const 0x3f800001)) +(assert_return (invoke "f32_dec.misc_int") (i32.const 0x4640e400)) +(assert_return (invoke "f32_dec.large_int") (i32.const 0x60ad78ec)) +(assert_return (invoke "f32_dec.min_int32") (i32.const 0xcf000000)) +(assert_return (invoke "f32_dec.min_int64") (i32.const 0xdf000000)) (assert_return (invoke "f64.nan") (i64.const 0x7ff8000000000000)) (assert_return (invoke "f64.positive_nan") (i64.const 0x7ff8000000000000)) @@ -155,6 +179,10 @@ (assert_return (invoke "f64.max_subnormal") (i64.const 0xfffffffffffff)) (assert_return (invoke "f64.max_finite") (i64.const 0x7fefffffffffffff)) (assert_return (invoke "f64.trailing_dot") (i64.const 0x4630000000000000)) +(assert_return (invoke "f64.misc_int") (i64.const 0x40f2345000000000)) +(assert_return (invoke "f64.large_int") (i64.const 0x44f0000000000000)) +(assert_return (invoke "f64.min_int32") (i64.const 0xc1e0000000000000)) +(assert_return (invoke "f64.min_int64") (i64.const 0xc3e0000000000000)) (assert_return (invoke "f64_dec.zero") (i64.const 0)) (assert_return (invoke "f64_dec.positive_zero") (i64.const 0)) (assert_return (invoke "f64_dec.negative_zero") (i64.const 0x8000000000000000)) @@ -165,6 +193,10 @@ (assert_return (invoke "f64_dec.max_finite") (i64.const 0x7fefffffffffffff)) (assert_return (invoke "f64_dec.trailing_dot") (i64.const 0x54b249ad2594c37d)) (assert_return (invoke "f64_dec.root_beer_float") (i64.const 0x3ff000001ff19e24)) +(assert_return (invoke "f64_dec.misc_int") (i64.const 0x40c81c8000000000)) +(assert_return (invoke "f64_dec.large_int") (i64.const 0x4415af1d78b58c40)) +(assert_return (invoke "f64_dec.min_int32") (i64.const 0xc1e0000000000000)) +(assert_return (invoke "f64_dec.min_int64") (i64.const 0xc3e0000000000000)) (assert_return (invoke "f32-dec-sep1") (f32.const 1000000)) (assert_return (invoke "f32-dec-sep2") (f32.const 1000)) From fbd5062e8db04d059ee11040df81d1cb7b91151b Mon Sep 17 00:00:00 2001 From: Andreas Rossberg Date: Wed, 14 Feb 2024 17:40:29 +0100 Subject: [PATCH 02/23] [spec] Remove outdated affiliation --- document/core/index.bs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/document/core/index.bs b/document/core/index.bs index d27a96999..178c1437c 100644 --- a/document/core/index.bs +++ b/document/core/index.bs @@ -6,7 +6,7 @@ Status: ED Level: 2 TR: https://www.w3.org/TR/wasm-core-2/ ED: https://webassembly.github.io/spec/core/bikeshed/ -Editor: Andreas Rossberg (Dfinity Stiftung) +Editor: Andreas Rossberg Repository: WebAssembly/spec Markup Shorthands: css no, markdown no, algorithm no, idl no Abstract: This document describes release 2.0 of the core WebAssembly standard, a safe, portable, low-level code format designed for efficient execution and compact representation. From 17cf849c41beaca53b22760fb891907a06697bb7 Mon Sep 17 00:00:00 2001 From: sideshowbarker Date: Thu, 15 Feb 2024 18:07:33 +0900 Subject: [PATCH 03/23] [spec] Update katex submodule (#1726) --- document/core/util/katex | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/document/core/util/katex b/document/core/util/katex index e751278cf..3d5de92fb 160000 --- a/document/core/util/katex +++ b/document/core/util/katex @@ -1 +1 @@ -Subproject commit e751278cff42fada16dba6df331fda52aaa90f73 +Subproject commit 3d5de92fb0d0511ac64901bb60b5d46c5677eb28 From bcd1924a3ab490e753ba8362e8279a513d2c3015 Mon Sep 17 00:00:00 2001 From: sideshowbarker Date: Thu, 15 Feb 2024 19:32:07 +0900 Subject: [PATCH 04/23] [spec] Use os.sched_getaffinity only if available (#1727) --- document/core/util/mathjax2katex.py | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/document/core/util/mathjax2katex.py b/document/core/util/mathjax2katex.py index fabd08283..16abcd57e 100755 --- a/document/core/util/mathjax2katex.py +++ b/document/core/util/mathjax2katex.py @@ -2,6 +2,7 @@ # -*- coding: latin-1 -*- import queue +import multiprocessing import os import re import shelve @@ -229,7 +230,8 @@ def Worker(): sys.stderr.write('.') q = queue.Queue() - for i in range(len(os.sched_getaffinity(0))): + for i in range(len(os.sched_getaffinity(0)) if "sched_getaffinity" in dir(os) + else multiprocessing.cpu_count()): t = threading.Thread(target=Worker) t.daemon = True t.start() From cfdbf3b53fc66cb6b01eb5d0a9ae7e618f87fb2b Mon Sep 17 00:00:00 2001 From: Sam Clegg Date: Thu, 15 Feb 2024 22:46:08 -0800 Subject: [PATCH 05/23] [test] Better default path for wasm executable (#1728) --- test/core/run.py | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/test/core/run.py b/test/core/run.py index cbdb25654..3ba97d1b9 100755 --- a/test/core/run.py +++ b/test/core/run.py @@ -12,10 +12,11 @@ ownDir = os.path.dirname(os.path.abspath(sys.argv[0])) inputDir = ownDir +interpDir = os.path.join(os.path.dirname(os.path.dirname(ownDir)), 'interpreter') outputDir = os.path.join(inputDir, "_output") parser = argparse.ArgumentParser() -parser.add_argument("--wasm", metavar="", default=os.path.join(os.getcwd(), "wasm")) +parser.add_argument("--wasm", metavar="", default=os.path.join(interpDir, "wasm")) parser.add_argument("--js", metavar="") parser.add_argument("--generate-js-only", action='store_true') parser.add_argument("--out", metavar="", default=outputDir) From 360141b009b5b498e02d7f672ee82e7d7bc90937 Mon Sep 17 00:00:00 2001 From: Rod Vagg Date: Sat, 17 Feb 2024 18:22:19 +1100 Subject: [PATCH 06/23] [test] Remove failure case with ambiguous error (#1729) --- test/core/elem.wast | 8 -------- 1 file changed, 8 deletions(-) diff --git a/test/core/elem.wast b/test/core/elem.wast index 4a399ecae..33b3f67bc 100644 --- a/test/core/elem.wast +++ b/test/core/elem.wast @@ -532,14 +532,6 @@ "constant expression required" ) -(assert_invalid - (module - (table 1 funcref) - (elem (i32.const 0) funcref (item (i32.add (i32.const 0) (i32.const 1)))) - ) - "constant expression required" -) - ;; Two elements target the same slot (module From c2c2e7119a662f899a5dcbd892986891dd0d0b7e Mon Sep 17 00:00:00 2001 From: Sam Clegg Date: Tue, 20 Feb 2024 22:19:52 -0800 Subject: [PATCH 07/23] [ci] Trigger CI when workflows change (#1732) --- .github/workflows/ci-interpreter.yml | 4 ++-- .github/workflows/ci-spec.yml | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/.github/workflows/ci-interpreter.yml b/.github/workflows/ci-interpreter.yml index 0236c4939..8e0f4cb54 100644 --- a/.github/workflows/ci-interpreter.yml +++ b/.github/workflows/ci-interpreter.yml @@ -3,11 +3,11 @@ name: CI for interpreter & tests on: push: branches: [ main ] - paths: [ interpreter/**, test/** ] + paths: [ .github/**, interpreter/**, test/** ] pull_request: branches: [ main ] - paths: [ interpreter/**, test/** ] + paths: [ .github/**, interpreter/**, test/** ] # Allows you to run this workflow manually from the Actions tab workflow_dispatch: diff --git a/.github/workflows/ci-spec.yml b/.github/workflows/ci-spec.yml index 7610b33b0..e88a224d6 100644 --- a/.github/workflows/ci-spec.yml +++ b/.github/workflows/ci-spec.yml @@ -3,11 +3,11 @@ name: CI for specs on: push: branches: [ main ] - paths: [ document/** ] + paths: [ .github/**, document/** ] pull_request: branches: [ main ] - paths: [ document/** ] + paths: [ .github/**, document/** ] # Allows you to run this workflow manually from the Actions tab workflow_dispatch: From a904f9d187c4a1baa8321293674cfbe44b562fe6 Mon Sep 17 00:00:00 2001 From: Andreas Rossberg Date: Tue, 27 Feb 2024 00:54:59 +0100 Subject: [PATCH 08/23] [spec] Add note about sction order (#1734) --- document/core/binary/modules.rst | 3 +++ 1 file changed, 3 insertions(+) diff --git a/document/core/binary/modules.rst b/document/core/binary/modules.rst index 8e488582d..95ae76896 100644 --- a/document/core/binary/modules.rst +++ b/document/core/binary/modules.rst @@ -102,6 +102,9 @@ Id Section 12 :ref:`data count section ` == =============================================== +.. note:: + Section ids do not always correspond to the :ref:`order of sections ` in the encoding of a module. + .. index:: ! custom section pair: binary format; custom section From f8114686035f6ffc358771c822ede3c96bf54cd9 Mon Sep 17 00:00:00 2001 From: Andreas Rossberg Date: Tue, 27 Feb 2024 00:55:27 +0100 Subject: [PATCH 09/23] [spec] Fix crossrefs in instruction index (#1735) Fix #1731 --- document/core/appendix/index-instructions.py | 84 ++++++++++---------- 1 file changed, 42 insertions(+), 42 deletions(-) diff --git a/document/core/appendix/index-instructions.py b/document/core/appendix/index-instructions.py index 8ffedcca3..ac94dd1ac 100755 --- a/document/core/appendix/index-instructions.py +++ b/document/core/appendix/index-instructions.py @@ -373,48 +373,48 @@ def Instruction(name, opcode, type=None, validation=None, execution=None, operat Instruction(r'\F32X4.\REPLACELANE~\laneidx', r'\hex{FD}~~\hex{20}', r'[\V128~\F32] \to [\V128]', r'valid-vec-replace_lane', r'exec-vec-replace_lane'), Instruction(r'\F64X2.\EXTRACTLANE~\laneidx', r'\hex{FD}~~\hex{21}', r'[\V128] \to [\F64]', r'valid-vec-extract_lane', r'exec-vec-extract_lane'), Instruction(r'\F64X2.\REPLACELANE~\laneidx', r'\hex{FD}~~\hex{22}', r'[\V128~\F64] \to [\V128]', r'valid-vec-replace_lane', r'exec-vec-replace_lane'), - Instruction(r'\I8X16.\VEQ', r'\hex{FD}~~\hex{23}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ieq'), - Instruction(r'\I8X16.\VNE', r'\hex{FD}~~\hex{24}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ine'), - Instruction(r'\I8X16.\VLT\K{\_s}', r'\hex{FD}~~\hex{25}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ilt_s'), - Instruction(r'\I8X16.\VLT\K{\_u}', r'\hex{FD}~~\hex{26}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ilt_u'), - Instruction(r'\I8X16.\VGT\K{\_s}', r'\hex{FD}~~\hex{27}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-igt_s'), - Instruction(r'\I8X16.\VGT\K{\_u}', r'\hex{FD}~~\hex{28}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-igt_u'), - Instruction(r'\I8X16.\VLE\K{\_s}', r'\hex{FD}~~\hex{29}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ile_s'), - Instruction(r'\I8X16.\VLE\K{\_u}', r'\hex{FD}~~\hex{2A}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ile_u'), - Instruction(r'\I8X16.\VGE\K{\_s}', r'\hex{FD}~~\hex{2B}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ige_s'), - Instruction(r'\I8X16.\VGE\K{\_u}', r'\hex{FD}~~\hex{2C}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ige_u'), - Instruction(r'\I16X8.\VEQ', r'\hex{FD}~~\hex{2D}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ieq'), - Instruction(r'\I16X8.\VNE', r'\hex{FD}~~\hex{2E}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ine'), - Instruction(r'\I16X8.\VLT\K{\_s}', r'\hex{FD}~~\hex{2F}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ilt_s'), - Instruction(r'\I16X8.\VLT\K{\_u}', r'\hex{FD}~~\hex{30}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ilt_u'), - Instruction(r'\I16X8.\VGT\K{\_s}', r'\hex{FD}~~\hex{31}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-igt_s'), - Instruction(r'\I16X8.\VGT\K{\_u}', r'\hex{FD}~~\hex{32}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-igt_u'), - Instruction(r'\I16X8.\VLE\K{\_s}', r'\hex{FD}~~\hex{33}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ile_s'), - Instruction(r'\I16X8.\VLE\K{\_u}', r'\hex{FD}~~\hex{34}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ile_u'), - Instruction(r'\I16X8.\VGE\K{\_s}', r'\hex{FD}~~\hex{35}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ige_s'), - Instruction(r'\I16X8.\VGE\K{\_u}', r'\hex{FD}~~\hex{36}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ige_u'), - Instruction(r'\I32X4.\VEQ', r'\hex{FD}~~\hex{37}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ieq'), - Instruction(r'\I32X4.\VNE', r'\hex{FD}~~\hex{38}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ine'), - Instruction(r'\I32X4.\VLT\K{\_s}', r'\hex{FD}~~\hex{39}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ilt_s'), - Instruction(r'\I32X4.\VLT\K{\_u}', r'\hex{FD}~~\hex{3A}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ilt_u'), - Instruction(r'\I32X4.\VGT\K{\_s}', r'\hex{FD}~~\hex{3B}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-igt_s'), - Instruction(r'\I32X4.\VGT\K{\_u}', r'\hex{FD}~~\hex{3C}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-igt_u'), - Instruction(r'\I32X4.\VLE\K{\_s}', r'\hex{FD}~~\hex{3D}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ile_s'), - Instruction(r'\I32X4.\VLE\K{\_u}', r'\hex{FD}~~\hex{3E}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ile_u'), - Instruction(r'\I32X4.\VGE\K{\_s}', r'\hex{FD}~~\hex{3F}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ige_s'), - Instruction(r'\I32X4.\VGE\K{\_u}', r'\hex{FD}~~\hex{40}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ige_u'), - Instruction(r'\F32X4.\VEQ', r'\hex{FD}~~\hex{41}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-feq'), - Instruction(r'\F32X4.\VNE', r'\hex{FD}~~\hex{42}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fne'), - Instruction(r'\F32X4.\VLT', r'\hex{FD}~~\hex{43}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-flt'), - Instruction(r'\F32X4.\VGT', r'\hex{FD}~~\hex{44}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fgt'), - Instruction(r'\F32X4.\VLE', r'\hex{FD}~~\hex{45}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fle'), - Instruction(r'\F32X4.\VGE', r'\hex{FD}~~\hex{46}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fge'), - Instruction(r'\F64X2.\VEQ', r'\hex{FD}~~\hex{47}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-feq'), - Instruction(r'\F64X2.\VNE', r'\hex{FD}~~\hex{48}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fne'), - Instruction(r'\F64X2.\VLT', r'\hex{FD}~~\hex{49}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-flt'), - Instruction(r'\F64X2.\VGT', r'\hex{FD}~~\hex{4A}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fgt'), - Instruction(r'\F64X2.\VLE', r'\hex{FD}~~\hex{4B}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fle'), - Instruction(r'\F64X2.\VGE', r'\hex{FD}~~\hex{4C}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fge'), + Instruction(r'\I8X16.\VEQ', r'\hex{FD}~~\hex{23}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-ieq'), + Instruction(r'\I8X16.\VNE', r'\hex{FD}~~\hex{24}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-ine'), + Instruction(r'\I8X16.\VLT\K{\_s}', r'\hex{FD}~~\hex{25}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-ilt_s'), + Instruction(r'\I8X16.\VLT\K{\_u}', r'\hex{FD}~~\hex{26}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-ilt_u'), + Instruction(r'\I8X16.\VGT\K{\_s}', r'\hex{FD}~~\hex{27}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-igt_s'), + Instruction(r'\I8X16.\VGT\K{\_u}', r'\hex{FD}~~\hex{28}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-igt_u'), + Instruction(r'\I8X16.\VLE\K{\_s}', r'\hex{FD}~~\hex{29}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-ile_s'), + Instruction(r'\I8X16.\VLE\K{\_u}', r'\hex{FD}~~\hex{2A}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-ile_u'), + Instruction(r'\I8X16.\VGE\K{\_s}', r'\hex{FD}~~\hex{2B}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-ige_s'), + Instruction(r'\I8X16.\VGE\K{\_u}', r'\hex{FD}~~\hex{2C}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-ige_u'), + Instruction(r'\I16X8.\VEQ', r'\hex{FD}~~\hex{2D}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-ieq'), + Instruction(r'\I16X8.\VNE', r'\hex{FD}~~\hex{2E}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-ine'), + Instruction(r'\I16X8.\VLT\K{\_s}', r'\hex{FD}~~\hex{2F}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-ilt_s'), + Instruction(r'\I16X8.\VLT\K{\_u}', r'\hex{FD}~~\hex{30}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-ilt_u'), + Instruction(r'\I16X8.\VGT\K{\_s}', r'\hex{FD}~~\hex{31}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-igt_s'), + Instruction(r'\I16X8.\VGT\K{\_u}', r'\hex{FD}~~\hex{32}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-igt_u'), + Instruction(r'\I16X8.\VLE\K{\_s}', r'\hex{FD}~~\hex{33}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-ile_s'), + Instruction(r'\I16X8.\VLE\K{\_u}', r'\hex{FD}~~\hex{34}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-ile_u'), + Instruction(r'\I16X8.\VGE\K{\_s}', r'\hex{FD}~~\hex{35}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-ige_s'), + Instruction(r'\I16X8.\VGE\K{\_u}', r'\hex{FD}~~\hex{36}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-ige_u'), + Instruction(r'\I32X4.\VEQ', r'\hex{FD}~~\hex{37}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-ieq'), + Instruction(r'\I32X4.\VNE', r'\hex{FD}~~\hex{38}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-ine'), + Instruction(r'\I32X4.\VLT\K{\_s}', r'\hex{FD}~~\hex{39}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-ilt_s'), + Instruction(r'\I32X4.\VLT\K{\_u}', r'\hex{FD}~~\hex{3A}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-ilt_u'), + Instruction(r'\I32X4.\VGT\K{\_s}', r'\hex{FD}~~\hex{3B}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-igt_s'), + Instruction(r'\I32X4.\VGT\K{\_u}', r'\hex{FD}~~\hex{3C}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-igt_u'), + Instruction(r'\I32X4.\VLE\K{\_s}', r'\hex{FD}~~\hex{3D}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-ile_s'), + Instruction(r'\I32X4.\VLE\K{\_u}', r'\hex{FD}~~\hex{3E}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-ile_u'), + Instruction(r'\I32X4.\VGE\K{\_s}', r'\hex{FD}~~\hex{3F}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-ige_s'), + Instruction(r'\I32X4.\VGE\K{\_u}', r'\hex{FD}~~\hex{40}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-ige_u'), + Instruction(r'\F32X4.\VEQ', r'\hex{FD}~~\hex{41}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-feq'), + Instruction(r'\F32X4.\VNE', r'\hex{FD}~~\hex{42}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-fne'), + Instruction(r'\F32X4.\VLT', r'\hex{FD}~~\hex{43}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-flt'), + Instruction(r'\F32X4.\VGT', r'\hex{FD}~~\hex{44}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-fgt'), + Instruction(r'\F32X4.\VLE', r'\hex{FD}~~\hex{45}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-fle'), + Instruction(r'\F32X4.\VGE', r'\hex{FD}~~\hex{46}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-fge'), + Instruction(r'\F64X2.\VEQ', r'\hex{FD}~~\hex{47}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-feq'), + Instruction(r'\F64X2.\VNE', r'\hex{FD}~~\hex{48}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-fne'), + Instruction(r'\F64X2.\VLT', r'\hex{FD}~~\hex{49}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-flt'), + Instruction(r'\F64X2.\VGT', r'\hex{FD}~~\hex{4A}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-fgt'), + Instruction(r'\F64X2.\VLE', r'\hex{FD}~~\hex{4B}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-fle'), + Instruction(r'\F64X2.\VGE', r'\hex{FD}~~\hex{4C}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-fge'), Instruction(r'\V128.\VNOT', r'\hex{FD}~~\hex{4D}', r'[\V128] \to [\V128]', r'valid-vvunop', r'exec-vvunop', r'op-inot'), Instruction(r'\V128.\VAND', r'\hex{FD}~~\hex{4E}', r'[\V128~\V128] \to [\V128]', r'valid-vvbinop', r'exec-vvbinop', r'op-iand'), Instruction(r'\V128.\VANDNOT', r'\hex{FD}~~\hex{4F}', r'[\V128~\V128] \to [\V128]', r'valid-vvbinop', r'exec-vvbinop', r'op-iandnot'), From 89f7ced5e149cbdc3a6f2d661b0e5f7da0b45925 Mon Sep 17 00:00:00 2001 From: sideshowbarker Date: Thu, 29 Feb 2024 01:55:14 +0900 Subject: [PATCH 10/23] [build] Update makefiles and CI config to enable W3C autopublishing (#1730) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit * [build] Update makefiles and CI config to enable W3C autopublishing * In CI, don’t generate the W3C tar files twice * Use “tar” command directly to generate W3C tars (rather “bikeshed echidna”) * Update web-api makefile to using system tar command, not bikeshed --- .github/workflows/ci-spec.yml | 26 +++++++++++++++++++++++ document/Makefile | 22 +++++++++++++++++++- document/core/Makefile | 22 ++++++++++++++++++-- document/core/index.bs | 4 +++- document/core/util/bikeshed_fixup.py | 23 +++++++++++++++++++++ document/js-api/Makefile | 31 +++++++++++++++++++++++----- document/js-api/index.bs | 4 +++- document/web-api/Makefile | 31 +++++++++++++++++++++++----- document/web-api/index.bs | 4 +++- 9 files changed, 151 insertions(+), 16 deletions(-) diff --git a/.github/workflows/ci-spec.yml b/.github/workflows/ci-spec.yml index e88a224d6..1e3f188a3 100644 --- a/.github/workflows/ci-spec.yml +++ b/.github/workflows/ci-spec.yml @@ -99,3 +99,29 @@ jobs: with: publish_dir: ./_output github_token: ${{ secrets.GITHUB_TOKEN }} + + publish-to-w3c-TR: + runs-on: ubuntu-latest + steps: + - name: Checkout repo + uses: actions/checkout@v2 + with: + submodules: "recursive" + - name: Setup Node.js + uses: actions/setup-node@v3 + with: + node-version: 16 + - name: Setup Bikeshed + run: pip install bikeshed && bikeshed update + - name: Setup TexLive + run: sudo apt-get update -y && sudo apt-get install -y latexmk texlive-latex-recommended texlive-latex-extra texlive-fonts-recommended + - name: Setup Sphinx + run: pip install six && pip install sphinx==5.1.0 + - name: Publish all specs to their https://www.w3.org/TR/ URLs + run: cd document && make -e WD-echidna-CI + env: + STATUS: --md-status=WD + W3C_ECHIDNA_TOKEN_CORE: ${{ secrets.W3C_ECHIDNA_TOKEN_CORE }} + W3C_ECHIDNA_TOKEN_JSAPI: ${{ secrets.W3C_ECHIDNA_TOKEN_JSAPI }} + W3C_ECHIDNA_TOKEN_WEBAPI: ${{ secrets.W3C_ECHIDNA_TOKEN_WEBAPI }} + YARN_ENABLE_IMMUTABLE_INSTALLS: false diff --git a/document/Makefile b/document/Makefile index 875efc720..01a6d9342 100644 --- a/document/Makefile +++ b/document/Makefile @@ -1,6 +1,7 @@ -DIRS = core js-api web-api +DIRS = js-api web-api core FILES = index.html BUILDDIR = _build +TAR = tar # Global targets. @@ -24,6 +25,25 @@ clean: $(DIRS:%=clean-%) .PHONY: diff diff: $(DIRS:%=diff-%) +# macOS: do “brew install tar” & run “make” as: TAR=gtar make -e WD-tar +.PHONY: WD-tar +WD-tar: + for dir in $(DIRS); \ + do STATUS=--md-status=WD TAR=$(TAR) $(MAKE) -e -C $$dir $@;\ + done + +# macOS: do “brew install tar” & run “make” as: TAR=gtar make -e WD-echidna +.PHONY: WD-echidna +WD-echidna: + for dir in $(DIRS); \ + do $(MAKE) -e -C $$dir $@;\ + done + +.PHONY: WD-echidna-CI +WD-echidna-CI: + for dir in $(DIRS); \ + do $(MAKE) -e -C $$dir $@;\ + done # Directory-specific targets. diff --git a/document/core/Makefile b/document/core/Makefile index 8a3650ec9..74c9daeea 100644 --- a/document/core/Makefile +++ b/document/core/Makefile @@ -9,6 +9,8 @@ BUILDDIR = _build STATICDIR = _static DOWNLOADDIR = _download NAME = WebAssembly +DECISION_URL = https://github.com/WebAssembly/meetings/blob/main/main/2017/WG-12-06.md +TAR = tar # Internal variables. PAPEROPT_a4 = -D latex_paper_size=a4 @@ -148,7 +150,7 @@ bikeshed: $(GENERATED) @echo @echo ========================================================================= mkdir -p $(BUILDDIR)/bikeshed_mathjax/ - bikeshed spec index.bs $(BUILDDIR)/bikeshed_mathjax/index.html + bikeshed spec $(STATUS) index.bs $(BUILDDIR)/bikeshed_mathjax/index.html mkdir -p $(BUILDDIR)/html/bikeshed/ (cd util/katex/ && yarn && yarn build && npm install --only=prod) python3 util/mathjax2katex.py $(BUILDDIR)/bikeshed_mathjax/index.html \ @@ -163,9 +165,11 @@ bikeshed: $(GENERATED) @echo "Build finished. The HTML page is in $(BUILDDIR)/html/bikeshed/." .PHONY: WD-tar +# macOS tar has no “--transform” option (only GNU tar does), so on macOS, +# do “brew install tar” & run “make” like this: “TAR=gtar make -e WD-tar” WD-tar: bikeshed @echo "Building tar file..." - tar cvf \ + $(TAR) cvf \ $(BUILDDIR)/WD.tar \ --transform='s|$(BUILDDIR)/html/bikeshed/||' \ --transform='s|index.html|Overview.html|' \ @@ -190,6 +194,20 @@ WD-echidna: WD-tar @echo @echo "Published working draft. Check its status at https://labs.w3.org/echidna/api/status?id=`cat $(BUILDDIR)/WD-echidna-id.txt`" +.PHONY: WD-echidna-CI +WD-echidna-CI: WD-tar + @if [ -z $(W3C_ECHIDNA_TOKEN_CORE) ] || \ + [ -z $(DECISION_URL) ] ; then \ + echo "Must provide W3C_ECHIDNA_TOKEN_CORE and DECISION_URL environment variables"; \ + exit 1; \ + fi + curl 'https://labs.w3.org/echidna/api/request' \ + -F "tar=@$(BUILDDIR)/WD.tar" \ + -F "token=$(W3C_ECHIDNA_TOKEN_CORE)" \ + -F "decision=$(DECISION_URL)" | tee $(BUILDDIR)/WD-echidna-id.txt + @echo + @echo "Published working draft. Check its status at https://labs.w3.org/echidna/api/status?id=`cat $(BUILDDIR)/WD-echidna-id.txt`" + .PHONY: diff diff: bikeshed @echo "Downloading the old single-file html spec..." diff --git a/document/core/index.bs b/document/core/index.bs index 178c1437c..830c0595c 100644 --- a/document/core/index.bs +++ b/document/core/index.bs @@ -3,14 +3,16 @@ Title: WebAssembly Core Specification Shortname: wasm-core Group: wasm Status: ED +Issue Tracking: GitHub https://github.com/WebAssembly/spec/issues Level: 2 TR: https://www.w3.org/TR/wasm-core-2/ ED: https://webassembly.github.io/spec/core/bikeshed/ -Editor: Andreas Rossberg +Editor: Andreas Rossberg, w3cid 82328 Repository: WebAssembly/spec Markup Shorthands: css no, markdown no, algorithm no, idl no Abstract: This document describes release 2.0 of the core WebAssembly standard, a safe, portable, low-level code format designed for efficient execution and compact representation. Prepare For TR: true +Date: now 
diff --git a/document/core/util/bikeshed_fixup.py b/document/core/util/bikeshed_fixup.py
index 568c67b57..7041d875d 100755
--- a/document/core/util/bikeshed_fixup.py
+++ b/document/core/util/bikeshed_fixup.py
@@ -3,6 +3,7 @@
 
 import os
 import sys
+import re
 
 
 SCRIPT_DIR = os.path.dirname(os.path.realpath(__file__))
@@ -63,6 +64,28 @@ def Main():
       "[[!IEEE-754-2019]]"
   )
 
+  # Fix this problem that causes an  element to be generated in the output
+  # as a child of another  element, and for which the HTML validator reports
+  # an error — which in turn causes the W3C pubrules checker to refuse to
+  # autopublish the resulting bikeshed output.
+  data = data.replace(
+      """\href{#binary-sint}{\href{#syntax-int}""",
+      """{\href{#syntax-int}""")
+
+  # Strip the entire  element from the the sphinx output — because it
+  # contains several ,