Add board port for Pimoroni Pico Plus 2 W

[eightycc]

CP supports the Pimoroni Pico Plus 2 board but lacks support for the new W variant. The Pico Plus 2 W includes a Raspberry Pi RM2 adding WiFi and Bluetooth capabilities that should be compatible with the Infineon CYW43439 on the Raspberry Pi Pico W boards.

I'll claim this issue and will submit a pull request as soon as my test board arrives.

[anecdata]

Related: #9777

[bablokb]

I already have (two) of these boards. If I can help in any way, just let me know.

[eightycc]

Thanks to @anecdata for pointing to micropython#16057 where a similar Micropython port is underway. Making a first pass through the PR and the changes it makes I can see that RP2350/RM2 changes depend on SDK changes to its develop branch. Likewise, cyw43-driver module will also need an update.

The cyw43-driver change is to TSSI calibration, so CP doesn't necessarily need it.

The PR issue that affects CP is achieving proper adjustment of the PIO clock speed. The CYW43439 communicates with its host using a SPI variant named gSPI. The cyw43-driver uses a PIO to emulate gSPI.

It's probably wise to wait for this PR to shake out.

[bablokb]

I have a working version here: https://github.com/bablokb/circuitpython/tree/pico_plus2w

Still needs some updates on the USB_VID/USB_PID stuff. But I verified that basic STA operation is working fine.

@ZodiusInfuser: do you already have these values? And please also check the board name: I currently have #define MICROPY_HW_BOARD_NAME "Pimoroni Pico Plus 2 W

[ZodiusInfuser]

@bablokb I do not, but I have just put a request in for it, and our other recent boards too. Pimoroni Pico Plus 2 W is correct

[ZodiusInfuser]

Okay. VID/PID available at: https://github.com/raspberrypi/usb-pid

[bablokb]

@ZodiusInfuser: thanks, that was fast!

I updated my tree.

@eightycc : you claimed this issue, will you create the PR or should I just go ahead?

[eightycc]

@bablokb Sorry about that. My boards arrived today so I tested and made a PR without first reading your updates.

I explicitly set the PIO clock divider to 2 (also the SDK default) with a note to increase it if the gSPI connection to the RM2 becomes unstable. I don't think it will.