diff --git a/ports/raspberrypi/boards/pimoroni_pico_plus2w/board.c b/ports/raspberrypi/boards/pimoroni_pico_plus2w/board.c
new file mode 100644
index 000000000000..4878f16e66e5
--- /dev/null
+++ b/ports/raspberrypi/boards/pimoroni_pico_plus2w/board.c
@@ -0,0 +1,9 @@
+// This file is part of the CircuitPython project: https://circuitpython.org
+//
+// SPDX-FileCopyrightText: Copyright (c) 2024 Bob Abeles
+//
+// SPDX-License-Identifier: MIT
+
+#include "supervisor/board.h"
+
+// Use the MP_WEAK supervisor/shared/board.c versions of routines not defined here.
diff --git a/ports/raspberrypi/boards/pimoroni_pico_plus2w/link.ld b/ports/raspberrypi/boards/pimoroni_pico_plus2w/link.ld
new file mode 100644
index 000000000000..e814bead4c51
--- /dev/null
+++ b/ports/raspberrypi/boards/pimoroni_pico_plus2w/link.ld
@@ -0,0 +1 @@
+firmware_size = 1532k;
diff --git a/ports/raspberrypi/boards/pimoroni_pico_plus2w/mpconfigboard.h b/ports/raspberrypi/boards/pimoroni_pico_plus2w/mpconfigboard.h
new file mode 100644
index 000000000000..28f19c762f1f
--- /dev/null
+++ b/ports/raspberrypi/boards/pimoroni_pico_plus2w/mpconfigboard.h
@@ -0,0 +1,18 @@
+// This file is part of the CircuitPython project: https://circuitpython.org
+//
+// SPDX-FileCopyrightText: Copyright (c) 2024 Bob Abeles
+//
+// SPDX-License-Identifier: MIT
+
+#define MICROPY_HW_BOARD_NAME "Pimoroni Pico Plus 2 W"
+#define MICROPY_HW_MCU_NAME "rp2350b"
+
+#define CIRCUITPY_DIGITALIO_HAVE_INVALID_PULL (1)
+#define CIRCUITPY_DIGITALIO_HAVE_INVALID_DRIVE_MODE (1)
+
+#define MICROPY_HW_LED_STATUS   (&pin_CYW0)
+
+#define CIRCUITPY_BOARD_I2C         (1)
+#define CIRCUITPY_BOARD_I2C_PIN     {{.scl = &pin_GPIO5, .sda = &pin_GPIO4}}
+
+#define CIRCUITPY_PSRAM_CHIP_SELECT (&pin_GPIO47)
diff --git a/ports/raspberrypi/boards/pimoroni_pico_plus2w/mpconfigboard.mk b/ports/raspberrypi/boards/pimoroni_pico_plus2w/mpconfigboard.mk
new file mode 100644
index 000000000000..e520ab43574c
--- /dev/null
+++ b/ports/raspberrypi/boards/pimoroni_pico_plus2w/mpconfigboard.mk
@@ -0,0 +1,31 @@
+USB_VID = 0x2E8A
+USB_PID = 0x10BD
+USB_PRODUCT = "Pico Plus 2 W"
+USB_MANUFACTURER = "Pimoroni"
+
+CHIP_VARIANT = RP2350
+CHIP_PACKAGE = B
+CHIP_FAMILY = rp2
+
+EXTERNAL_FLASH_DEVICES = "W25Q128JVxQ"
+
+CIRCUITPY__EVE = 1
+
+CIRCUITPY_CYW43 = 1
+CIRCUITPY_SSL = 1
+CIRCUITPY_HASHLIB = 1
+CIRCUITPY_WEB_WORKFLOW = 1
+CIRCUITPY_MDNS = 1
+CIRCUITPY_SOCKETPOOL = 1
+CIRCUITPY_WIFI = 1
+
+# PIO clock divider set to 2 (default), consider changing if TM2 gSPI
+# becomes unreliable.
+CFLAGS += -DCYW43_PIN_WL_HOST_WAKE=24 \
+          -DCYW43_PIN_WL_REG_ON=23 \
+		  -DCYW43_WL_GPIO_COUNT=3 \
+		  -DCYW43_WL_GPIO_LED_PIN=0 \
+		  -DCYW43_PIO_CLOCK_DIV_INT=2 \
+		  -DCYW43_PIO_CLOCK_DIV_FRAC=0
+# Must be accompanied by a linker script change
+CFLAGS += -DCIRCUITPY_FIRMWARE_SIZE='(1536 * 1024)'
diff --git a/ports/raspberrypi/boards/pimoroni_pico_plus2w/pico-sdk-configboard.h b/ports/raspberrypi/boards/pimoroni_pico_plus2w/pico-sdk-configboard.h
new file mode 100644
index 000000000000..42e0612bf8ba
--- /dev/null
+++ b/ports/raspberrypi/boards/pimoroni_pico_plus2w/pico-sdk-configboard.h
@@ -0,0 +1,9 @@
+// This file is part of the CircuitPython project: https://circuitpython.org
+//
+// SPDX-FileCopyrightText: Copyright (c) 2024 Bob Abeles
+//
+// SPDX-License-Identifier: MIT
+
+#pragma once
+
+// Put board-specific pico-sdk definitions here. This file must exist.
diff --git a/ports/raspberrypi/boards/pimoroni_pico_plus2w/pins.c b/ports/raspberrypi/boards/pimoroni_pico_plus2w/pins.c
new file mode 100644
index 000000000000..718e9b978131
--- /dev/null
+++ b/ports/raspberrypi/boards/pimoroni_pico_plus2w/pins.c
@@ -0,0 +1,76 @@
+// This file is part of the CircuitPython project: https://circuitpython.org
+//
+// SPDX-FileCopyrightText: Copyright (c) 2024 Bob Abeles
+//
+// SPDX-License-Identifier: MIT
+
+#include "shared-bindings/board/__init__.h"
+
+static const mp_rom_map_elem_t board_module_globals_table[] = {
+    CIRCUITPYTHON_BOARD_DICT_STANDARD_ITEMS
+
+    { MP_ROM_QSTR(MP_QSTR_GP0), MP_ROM_PTR(&pin_GPIO0) },
+    { MP_ROM_QSTR(MP_QSTR_GP1), MP_ROM_PTR(&pin_GPIO1) },
+    { MP_ROM_QSTR(MP_QSTR_GP2), MP_ROM_PTR(&pin_GPIO2) },
+    { MP_ROM_QSTR(MP_QSTR_GP3), MP_ROM_PTR(&pin_GPIO3) },
+    { MP_ROM_QSTR(MP_QSTR_GP4), MP_ROM_PTR(&pin_GPIO4) },
+    { MP_ROM_QSTR(MP_QSTR_GP5), MP_ROM_PTR(&pin_GPIO5) },
+    { MP_ROM_QSTR(MP_QSTR_GP6), MP_ROM_PTR(&pin_GPIO6) },
+    { MP_ROM_QSTR(MP_QSTR_GP7), MP_ROM_PTR(&pin_GPIO7) },
+    { MP_ROM_QSTR(MP_QSTR_GP8), MP_ROM_PTR(&pin_GPIO8) },
+    { MP_ROM_QSTR(MP_QSTR_GP9), MP_ROM_PTR(&pin_GPIO9) },
+    { MP_ROM_QSTR(MP_QSTR_GP10), MP_ROM_PTR(&pin_GPIO10) },
+    { MP_ROM_QSTR(MP_QSTR_GP11), MP_ROM_PTR(&pin_GPIO11) },
+    { MP_ROM_QSTR(MP_QSTR_GP12), MP_ROM_PTR(&pin_GPIO12) },
+    { MP_ROM_QSTR(MP_QSTR_GP13), MP_ROM_PTR(&pin_GPIO13) },
+    { MP_ROM_QSTR(MP_QSTR_GP14), MP_ROM_PTR(&pin_GPIO14) },
+    { MP_ROM_QSTR(MP_QSTR_GP15), MP_ROM_PTR(&pin_GPIO15) },
+    { MP_ROM_QSTR(MP_QSTR_GP16), MP_ROM_PTR(&pin_GPIO16) },
+    { MP_ROM_QSTR(MP_QSTR_GP17), MP_ROM_PTR(&pin_GPIO17) },
+    { MP_ROM_QSTR(MP_QSTR_GP18), MP_ROM_PTR(&pin_GPIO18) },
+    { MP_ROM_QSTR(MP_QSTR_GP19), MP_ROM_PTR(&pin_GPIO19) },
+    { MP_ROM_QSTR(MP_QSTR_GP20), MP_ROM_PTR(&pin_GPIO20) },
+    { MP_ROM_QSTR(MP_QSTR_GP21), MP_ROM_PTR(&pin_GPIO21) },
+    { MP_ROM_QSTR(MP_QSTR_GP22), MP_ROM_PTR(&pin_GPIO22) },
+
+    // GP23, GP24, GP25, and GP29 are reserved for RM2 gSPI
+
+    { MP_ROM_QSTR(MP_QSTR_GP26), MP_ROM_PTR(&pin_GPIO26) },
+    { MP_ROM_QSTR(MP_QSTR_GP27), MP_ROM_PTR(&pin_GPIO27) },
+    { MP_ROM_QSTR(MP_QSTR_GP28), MP_ROM_PTR(&pin_GPIO28) },
+
+    // GP30 through GP39 are unconnected
+
+    // GP40 through GP47 have analog input capability
+    { MP_ROM_QSTR(MP_QSTR_GP40_A0), MP_ROM_PTR(&pin_GPIO40) },
+    { MP_ROM_QSTR(MP_QSTR_GP40), MP_ROM_PTR(&pin_GPIO40) },
+    { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_GPIO40) },
+
+    { MP_ROM_QSTR(MP_QSTR_GP41_A1), MP_ROM_PTR(&pin_GPIO41) },
+    { MP_ROM_QSTR(MP_QSTR_GP41), MP_ROM_PTR(&pin_GPIO41) },
+    { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_GPIO41) },
+
+    { MP_ROM_QSTR(MP_QSTR_GP42_A2), MP_ROM_PTR(&pin_GPIO42) },
+    { MP_ROM_QSTR(MP_QSTR_GP42), MP_ROM_PTR(&pin_GPIO42) },
+    { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_GPIO42) },
+
+    { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_GPIO43) },
+    { MP_ROM_QSTR(MP_QSTR_VOLTAGE_MONITOR), MP_ROM_PTR(&pin_GPIO43) },
+
+    // GP44 is unconnected
+
+    { MP_ROM_QSTR(MP_QSTR_USER_SW), MP_ROM_PTR(&pin_GPIO45) },
+    { MP_ROM_QSTR(MP_QSTR_BUTTON), MP_ROM_PTR(&pin_GPIO45) },
+
+    // GP46 is unconnected
+    // GP47 is reserved for PSRAM chip select
+
+    { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) },
+    { MP_ROM_QSTR(MP_QSTR_STEMMA_I2C), MP_ROM_PTR(&board_i2c_obj) },
+
+    // Pins accessed though the RM2 module (CYW43439)
+    { MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_CYW0) },
+    // CYW1 is unconnected
+    { MP_ROM_QSTR(MP_QSTR_VBUS_SENSE), MP_ROM_PTR(&pin_CYW2) },
+};
+MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table);