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add riscv64 architecture support
Author: Alex Suykov <[email protected]> Author: Aric Belsito <[email protected]> Author: Drew DeVault <[email protected]> Author: Michael Clark <[email protected]> Author: Michael Forney <[email protected]> Author: Stefan O'Rear <[email protected]> This port has involved the work of many people over several years. I have tried to ensure that everyone with substantial contributions has been credited above; if any omissions are found they will be noted later in an update to the authors/contributors list in the COPYRIGHT file. The version committed here comes from the riscv/riscv-musl repo's commit 3fe7e2c75df78eef42dcdc352a55757729f451e2, with minor changes by me for issues found during final review: - a_ll/a_sc atomics are removed (according to the ISA spec, lr/sc are not safe to use in separate inline asm fragments) - a_cas[_p] is fixed to be a memory barrier - the call from the _start assembly into the C part of crt1/ldso is changed to allow for the possibility that the linker does not place them nearby each other. - DTP_OFFSET is defined correctly so that local-dynamic TLS works - reloc.h LDSO_ARCH logic is simplified and made explicit. - unused, non-functional crti/n asm files are removed. - an empty .sdata section is added to crt1 so that the __global_pointer reference is resolvable. - indentation style errors in some asm files are fixed.
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‎arch/riscv64/atomic_arch.h

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#define a_barrier a_barrier
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static inline void a_barrier()
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{
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__asm__ __volatile__ ("fence rw,rw" : : : "memory");
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}
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#define a_cas a_cas
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static inline int a_cas(volatile int *p, int t, int s)
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{
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int old, tmp;
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__asm__("\n1: lr.w.aqrl %0, %2\n"
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" bne %0, %3, 1f\n"
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" sc.w.aqrl %1, %4, %2\n"
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" bnez %1, 1b\n"
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"1:"
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: "=&r"(old), "+r"(tmp), "+A"(*p)
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: "r"(t), "r"(s));
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return old;
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}
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#define a_cas_p a_cas_p
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static inline void *a_cas_p(volatile void *p, void *t, void *s)
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{
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void *old;
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int tmp;
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__asm__("\n1: lr.d.aqrl %0, %2\n"
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" bne %0, %3, 1f\n"
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" sc.d.aqrl %1, %4, %2\n"
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" bnez %1, 1b\n"
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"1:"
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: "=&r"(old), "+r"(tmp), "+A"(*(long *)p)
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: "r"(t), "r"(s));
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return old;
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}

‎arch/riscv64/bits/alltypes.h.in

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#define _Addr long
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#define _Int64 long
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#define _Reg long
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TYPEDEF __builtin_va_list va_list;
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TYPEDEF __builtin_va_list __isoc_va_list;
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#ifndef __cplusplus
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TYPEDEF int wchar_t;
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#endif
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TYPEDEF int blksize_t;
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TYPEDEF unsigned int nlink_t;
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TYPEDEF float float_t;
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TYPEDEF double double_t;
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TYPEDEF struct { long long __ll; long double __ld; } max_align_t;
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TYPEDEF long time_t;
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TYPEDEF long suseconds_t;
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TYPEDEF struct { union { int __i[14]; volatile int __vi[14]; unsigned long __s[7]; } __u; } pthread_attr_t;
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TYPEDEF struct { union { int __i[10]; volatile int __vi[10]; volatile void *volatile __p[5]; } __u; } pthread_mutex_t;
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TYPEDEF struct { union { int __i[10]; volatile int __vi[10]; volatile void *volatile __p[5]; } __u; } mtx_t;
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TYPEDEF struct { union { int __i[12]; volatile int __vi[12]; void *__p[6]; } __u; } pthread_cond_t;
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TYPEDEF struct { union { int __i[12]; volatile int __vi[12]; void *__p[6]; } __u; } cnd_t;
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TYPEDEF struct { union { int __i[14]; volatile int __vi[14]; void *__p[7]; } __u; } pthread_rwlock_t;
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TYPEDEF struct { union { int __i[8]; volatile int __vi[8]; void *__p[4]; } __u; } pthread_barrier_t;

‎arch/riscv64/bits/endian.h

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#define __BYTE_ORDER __LITTLE_ENDIAN

‎arch/riscv64/bits/fcntl.h

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#define O_CREAT 0100
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#define O_EXCL 0200
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#define O_NOCTTY 0400
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#define O_TRUNC 01000
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#define O_APPEND 02000
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#define O_NONBLOCK 04000
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#define O_DSYNC 010000
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#define O_SYNC 04010000
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#define O_RSYNC 04010000
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#define O_DIRECTORY 0200000
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#define O_NOFOLLOW 0400000
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#define O_CLOEXEC 02000000
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#define O_ASYNC 020000
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#define O_DIRECT 040000
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#define O_LARGEFILE 0100000
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#define O_NOATIME 01000000
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#define O_PATH 010000000
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#define O_TMPFILE 020200000
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#define O_NDELAY O_NONBLOCK
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#define F_DUPFD 0
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#define F_GETFD 1
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#define F_SETFD 2
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#define F_GETFL 3
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#define F_SETFL 4
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#define F_GETLK 5
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#define F_SETLK 6
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#define F_SETLKW 7
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#define F_SETOWN 8
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#define F_GETOWN 9
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#define F_SETSIG 10
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#define F_GETSIG 11
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#define F_SETOWN_EX 15
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#define F_GETOWN_EX 16
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#define F_GETOWNER_UIDS 17

‎arch/riscv64/bits/fenv.h

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#define FE_INVALID 16
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#define FE_DIVBYZERO 8
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#define FE_OVERFLOW 4
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#define FE_UNDERFLOW 2
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#define FE_INEXACT 1
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#define FE_ALL_EXCEPT 31
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#define FE_TONEAREST 0
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#define FE_DOWNWARD 2
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#define FE_UPWARD 3
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#define FE_TOWARDZERO 1
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typedef unsigned int fexcept_t;
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typedef unsigned int fenv_t;
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#define FE_DFL_ENV ((const fenv_t *) -1)

‎arch/riscv64/bits/float.h

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#define FLT_EVAL_METHOD 0
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#define LDBL_TRUE_MIN 6.47517511943802511092443895822764655e-4966L
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#define LDBL_MIN 3.36210314311209350626267781732175260e-4932L
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#define LDBL_MAX 1.18973149535723176508575932662800702e+4932L
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#define LDBL_EPSILON 1.92592994438723585305597794258492732e-34L
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#define LDBL_MANT_DIG 113
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#define LDBL_MIN_EXP (-16381)
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#define LDBL_MAX_EXP 16384
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#define LDBL_DIG 33
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#define LDBL_MIN_10_EXP (-4931)
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#define LDBL_MAX_10_EXP 4932
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#define DECIMAL_DIG 36

‎arch/riscv64/bits/ipc.h

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struct ipc_perm {
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key_t __ipc_perm_key;
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uid_t uid;
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gid_t gid;
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uid_t cuid;
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gid_t cgid;
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mode_t mode;
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unsigned short __ipc_perm_seq;
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unsigned long __pad1;
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unsigned long __pad2;
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};
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#define IPC_64 0

‎arch/riscv64/bits/limits.h

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#if defined(_POSIX_SOURCE) || defined(_POSIX_C_SOURCE) \
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|| defined(_XOPEN_SOURCE) || defined(_GNU_SOURCE) || defined(_BSD_SOURCE)
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#define LONG_BIT 64
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#endif
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#define LONG_MAX 0x7fffffffffffffffL
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#define LLONG_MAX 0x7fffffffffffffffLL

‎arch/riscv64/bits/mman.h

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#define MAP_32BIT 0x40

‎arch/riscv64/bits/msg.h

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struct msqid_ds {
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struct ipc_perm msg_perm;
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time_t msg_stime;
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time_t msg_rtime;
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time_t msg_ctime;
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unsigned long msg_cbytes;
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msgqnum_t msg_qnum;
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msglen_t msg_qbytes;
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pid_t msg_lspid;
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pid_t msg_lrpid;
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unsigned long __pad1;
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unsigned long __pad2;
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};

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