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use inline syscalls for powerpc (32-bit)
the inline syscall code is copied directly from powerpc64. the extent of register clobber specifiers may be excessive on both; if that turns out to be the case it can be fixed later.
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arch/powerpc/syscall_arch.h

+84-2
Original file line numberDiff line numberDiff line change
@@ -3,7 +3,89 @@
33
((union { long long ll; long l[2]; }){ .ll = x }).l[1]
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#define __SYSCALL_LL_O(x) 0, __SYSCALL_LL_E((x))
55

6-
#undef SYSCALL_NO_INLINE
7-
#define SYSCALL_NO_INLINE
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static inline long __syscall0(long n)
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{
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register long r0 __asm__("r0") = n;
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register long r3 __asm__("r3");
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__asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:"
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: "+r"(r0), "=r"(r3)
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:: "memory", "cr0", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12");
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return r3;
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}
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static inline long __syscall1(long n, long a)
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{
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register long r0 __asm__("r0") = n;
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register long r3 __asm__("r3") = a;
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__asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:"
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: "+r"(r0), "+r"(r3)
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:: "memory", "cr0", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12");
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return r3;
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}
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static inline long __syscall2(long n, long a, long b)
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{
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register long r0 __asm__("r0") = n;
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register long r3 __asm__("r3") = a;
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register long r4 __asm__("r4") = b;
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__asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:"
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: "+r"(r0), "+r"(r3), "+r"(r4)
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:: "memory", "cr0", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12");
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return r3;
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}
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static inline long __syscall3(long n, long a, long b, long c)
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{
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register long r0 __asm__("r0") = n;
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register long r3 __asm__("r3") = a;
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register long r4 __asm__("r4") = b;
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register long r5 __asm__("r5") = c;
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__asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:"
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: "+r"(r0), "+r"(r3), "+r"(r4), "+r"(r5)
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:: "memory", "cr0", "r6", "r7", "r8", "r9", "r10", "r11", "r12");
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return r3;
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}
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static inline long __syscall4(long n, long a, long b, long c, long d)
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{
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register long r0 __asm__("r0") = n;
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register long r3 __asm__("r3") = a;
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register long r4 __asm__("r4") = b;
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register long r5 __asm__("r5") = c;
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register long r6 __asm__("r6") = d;
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__asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:"
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: "+r"(r0), "+r"(r3), "+r"(r4), "+r"(r5), "+r"(r6)
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:: "memory", "cr0", "r7", "r8", "r9", "r10", "r11", "r12");
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return r3;
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}
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static inline long __syscall5(long n, long a, long b, long c, long d, long e)
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{
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register long r0 __asm__("r0") = n;
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register long r3 __asm__("r3") = a;
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register long r4 __asm__("r4") = b;
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register long r5 __asm__("r5") = c;
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register long r6 __asm__("r6") = d;
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register long r7 __asm__("r7") = e;
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__asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:"
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: "+r"(r0), "+r"(r3), "+r"(r4), "+r"(r5), "+r"(r6), "+r"(r7)
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:: "memory", "cr0", "r8", "r9", "r10", "r11", "r12");
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return r3;
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}
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static inline long __syscall6(long n, long a, long b, long c, long d, long e, long f)
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{
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register long r0 __asm__("r0") = n;
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register long r3 __asm__("r3") = a;
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register long r4 __asm__("r4") = b;
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register long r5 __asm__("r5") = c;
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register long r6 __asm__("r6") = d;
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register long r7 __asm__("r7") = e;
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register long r8 __asm__("r8") = f;
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__asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:"
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: "+r"(r0), "+r"(r3), "+r"(r4), "+r"(r5), "+r"(r6), "+r"(r7), "+r"(r8)
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:: "memory", "cr0", "r9", "r10", "r11", "r12");
88+
return r3;
89+
}
890

991
#define SYSCALL_FADVISE_6_ARG

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