@@ -122,7 +122,8 @@ void helper_cpuid(CPUX86State *env)
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cpu_svm_check_intercept_param (env , SVM_EXIT_CPUID , 0 );
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- cpu_x86_cpuid (env , (uint32_t )env -> regs [R_EAX ], (uint32_t )env -> regs [R_ECX ], & eax , & ebx , & ecx , & edx );
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+ cpu_x86_cpuid (env , (uint32_t )env -> regs [R_EAX ], (uint32_t )env -> regs [R_ECX ],
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+ & eax , & ebx , & ecx , & edx );
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env -> regs [R_EAX ] = eax ;
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env -> regs [R_EBX ] = ebx ;
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env -> regs [R_ECX ] = ecx ;
@@ -271,7 +272,8 @@ void helper_wrmsr(CPUX86State *env)
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cpu_svm_check_intercept_param (env , SVM_EXIT_MSR , 1 );
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- val = ((uint32_t )env -> regs [R_EAX ]) | ((uint64_t )((uint32_t )env -> regs [R_EDX ]) << 32 );
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+ val = ((uint32_t )env -> regs [R_EAX ]) |
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+ ((uint64_t )((uint32_t )env -> regs [R_EDX ]) << 32 );
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switch ((uint32_t )env -> regs [R_ECX ]) {
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case MSR_IA32_SYSENTER_CS :
@@ -350,7 +352,8 @@ void helper_wrmsr(CPUX86State *env)
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case MSR_MTRRphysBase (5 ):
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case MSR_MTRRphysBase (6 ):
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case MSR_MTRRphysBase (7 ):
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- env -> mtrr_var [((uint32_t )env -> regs [R_ECX ] - MSR_MTRRphysBase (0 )) / 2 ].base = val ;
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+ env -> mtrr_var [((uint32_t )env -> regs [R_ECX ] -
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+ MSR_MTRRphysBase (0 )) / 2 ].base = val ;
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break ;
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case MSR_MTRRphysMask (0 ):
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case MSR_MTRRphysMask (1 ):
@@ -360,14 +363,17 @@ void helper_wrmsr(CPUX86State *env)
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case MSR_MTRRphysMask (5 ):
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case MSR_MTRRphysMask (6 ):
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case MSR_MTRRphysMask (7 ):
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- env -> mtrr_var [((uint32_t )env -> regs [R_ECX ] - MSR_MTRRphysMask (0 )) / 2 ].mask = val ;
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+ env -> mtrr_var [((uint32_t )env -> regs [R_ECX ] -
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+ MSR_MTRRphysMask (0 )) / 2 ].mask = val ;
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break ;
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case MSR_MTRRfix64K_00000 :
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- env -> mtrr_fixed [(uint32_t )env -> regs [R_ECX ] - MSR_MTRRfix64K_00000 ] = val ;
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+ env -> mtrr_fixed [(uint32_t )env -> regs [R_ECX ] -
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+ MSR_MTRRfix64K_00000 ] = val ;
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break ;
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case MSR_MTRRfix16K_80000 :
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case MSR_MTRRfix16K_A0000 :
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- env -> mtrr_fixed [(uint32_t )env -> regs [R_ECX ] - MSR_MTRRfix16K_80000 + 1 ] = val ;
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+ env -> mtrr_fixed [(uint32_t )env -> regs [R_ECX ] -
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+ MSR_MTRRfix16K_80000 + 1 ] = val ;
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break ;
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case MSR_MTRRfix4K_C0000 :
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case MSR_MTRRfix4K_C8000 :
@@ -377,7 +383,8 @@ void helper_wrmsr(CPUX86State *env)
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case MSR_MTRRfix4K_E8000 :
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case MSR_MTRRfix4K_F0000 :
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case MSR_MTRRfix4K_F8000 :
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- env -> mtrr_fixed [(uint32_t )env -> regs [R_ECX ] - MSR_MTRRfix4K_C0000 + 3 ] = val ;
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+ env -> mtrr_fixed [(uint32_t )env -> regs [R_ECX ] -
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+ MSR_MTRRfix4K_C0000 + 3 ] = val ;
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break ;
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case MSR_MTRRdefType :
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env -> mtrr_deftype = val ;
@@ -399,7 +406,8 @@ void helper_wrmsr(CPUX86State *env)
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break ;
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default :
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if ((uint32_t )env -> regs [R_ECX ] >= MSR_MC0_CTL
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- && (uint32_t )env -> regs [R_ECX ] < MSR_MC0_CTL + (4 * env -> mcg_cap & 0xff )) {
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+ && (uint32_t )env -> regs [R_ECX ] < MSR_MC0_CTL +
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+ (4 * env -> mcg_cap & 0xff )) {
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uint32_t offset = (uint32_t )env -> regs [R_ECX ] - MSR_MC0_CTL ;
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if ((offset & 0x3 ) != 0
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|| (val == 0 || val == ~(uint64_t )0 )) {
@@ -480,7 +488,8 @@ void helper_rdmsr(CPUX86State *env)
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case MSR_MTRRphysBase (5 ):
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case MSR_MTRRphysBase (6 ):
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case MSR_MTRRphysBase (7 ):
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- val = env -> mtrr_var [((uint32_t )env -> regs [R_ECX ] - MSR_MTRRphysBase (0 )) / 2 ].base ;
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+ val = env -> mtrr_var [((uint32_t )env -> regs [R_ECX ] -
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+ MSR_MTRRphysBase (0 )) / 2 ].base ;
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break ;
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case MSR_MTRRphysMask (0 ):
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case MSR_MTRRphysMask (1 ):
@@ -490,14 +499,16 @@ void helper_rdmsr(CPUX86State *env)
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case MSR_MTRRphysMask (5 ):
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case MSR_MTRRphysMask (6 ):
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case MSR_MTRRphysMask (7 ):
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- val = env -> mtrr_var [((uint32_t )env -> regs [R_ECX ] - MSR_MTRRphysMask (0 )) / 2 ].mask ;
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+ val = env -> mtrr_var [((uint32_t )env -> regs [R_ECX ] -
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+ MSR_MTRRphysMask (0 )) / 2 ].mask ;
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break ;
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case MSR_MTRRfix64K_00000 :
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val = env -> mtrr_fixed [0 ];
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break ;
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case MSR_MTRRfix16K_80000 :
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case MSR_MTRRfix16K_A0000 :
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- val = env -> mtrr_fixed [(uint32_t )env -> regs [R_ECX ] - MSR_MTRRfix16K_80000 + 1 ];
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+ val = env -> mtrr_fixed [(uint32_t )env -> regs [R_ECX ] -
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+ MSR_MTRRfix16K_80000 + 1 ];
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break ;
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case MSR_MTRRfix4K_C0000 :
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case MSR_MTRRfix4K_C8000 :
@@ -507,7 +518,8 @@ void helper_rdmsr(CPUX86State *env)
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case MSR_MTRRfix4K_E8000 :
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case MSR_MTRRfix4K_F0000 :
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case MSR_MTRRfix4K_F8000 :
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- val = env -> mtrr_fixed [(uint32_t )env -> regs [R_ECX ] - MSR_MTRRfix4K_C0000 + 3 ];
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+ val = env -> mtrr_fixed [(uint32_t )env -> regs [R_ECX ] -
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+ MSR_MTRRfix4K_C0000 + 3 ];
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break ;
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case MSR_MTRRdefType :
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val = env -> mtrr_deftype ;
@@ -539,7 +551,8 @@ void helper_rdmsr(CPUX86State *env)
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break ;
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default :
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if ((uint32_t )env -> regs [R_ECX ] >= MSR_MC0_CTL
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- && (uint32_t )env -> regs [R_ECX ] < MSR_MC0_CTL + (4 * env -> mcg_cap & 0xff )) {
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+ && (uint32_t )env -> regs [R_ECX ] < MSR_MC0_CTL +
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+ (4 * env -> mcg_cap & 0xff )) {
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uint32_t offset = (uint32_t )env -> regs [R_ECX ] - MSR_MC0_CTL ;
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val = env -> mce_banks [offset ];
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break ;
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