@@ -457,7 +457,7 @@ static void switch_tss(CPUX86State *env, int tss_selector,
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tss_load_seg (env , R_GS , new_segs [R_GS ]);
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}
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- /* check that EIP is in the CS segment limits */
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+ /* check that env->eip is in the CS segment limits */
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if (new_eip > env -> segs [R_CS ].limit ) {
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/* XXX: different exception if CALL? */
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raise_exception_err (env , EXCP0D_GPF , 0 );
@@ -1122,7 +1122,7 @@ static void do_interrupt_user(CPUX86State *env, int intno, int is_int,
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exiting the emulation with the suitable exception and error
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code */
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if (is_int ) {
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- EIP = next_eip ;
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+ env -> eip = next_eip ;
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}
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}
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@@ -1157,7 +1157,7 @@ static void handle_even_inj(CPUX86State *env, int intno, int is_int,
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/*
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* Begin execution of an interruption. is_int is TRUE if coming from
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- * the int instruction. next_eip is the EIP value AFTER the interrupt
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+ * the int instruction. next_eip is the env->eip value AFTER the interrupt
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* instruction. It is only relevant if is_int is TRUE.
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*/
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static void do_interrupt_all (CPUX86State * env , int intno , int is_int ,
@@ -1171,8 +1171,8 @@ static void do_interrupt_all(CPUX86State *env, int intno, int is_int,
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" pc=" TARGET_FMT_lx " SP=%04x:" TARGET_FMT_lx ,
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count , intno , error_code , is_int ,
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env -> hflags & HF_CPL_MASK ,
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- env -> segs [R_CS ].selector , EIP ,
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- (int )env -> segs [R_CS ].base + EIP ,
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+ env -> segs [R_CS ].selector , env -> eip ,
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+ (int )env -> segs [R_CS ].base + env -> eip ,
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env -> segs [R_SS ].selector , env -> regs [R_ESP ]);
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if (intno == 0x0e ) {
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qemu_log (" CR2=" TARGET_FMT_lx , env -> cr [2 ]);
@@ -1584,7 +1584,7 @@ void helper_ljmp_protected(CPUX86State *env, int new_cs, target_ulong new_eip,
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}
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cpu_x86_load_seg_cache (env , R_CS , (new_cs & 0xfffc ) | cpl ,
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get_seg_base (e1 , e2 ), limit , e2 );
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- EIP = new_eip ;
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+ env -> eip = new_eip ;
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} else {
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/* jump to call or task gate */
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dpl = (e2 >> DESC_DPL_SHIFT ) & 3 ;
@@ -1637,7 +1637,7 @@ void helper_ljmp_protected(CPUX86State *env, int new_cs, target_ulong new_eip,
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}
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cpu_x86_load_seg_cache (env , R_CS , (gate_cs & 0xfffc ) | cpl ,
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get_seg_base (e1 , e2 ), limit , e2 );
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- EIP = new_eip ;
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+ env -> eip = new_eip ;
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break ;
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default :
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raise_exception_err (env , EXCP0D_GPF , new_cs & 0xfffc );
@@ -1731,7 +1731,7 @@ void helper_lcall_protected(CPUX86State *env, int new_cs, target_ulong new_eip,
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cpu_x86_load_seg_cache (env , R_CS , (new_cs & 0xfffc ) | cpl ,
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get_seg_base (e1 , e2 ),
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get_seg_limit (e1 , e2 ), e2 );
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- EIP = new_eip ;
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+ env -> eip = new_eip ;
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} else
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#endif
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{
@@ -1754,7 +1754,7 @@ void helper_lcall_protected(CPUX86State *env, int new_cs, target_ulong new_eip,
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SET_ESP (sp , sp_mask );
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cpu_x86_load_seg_cache (env , R_CS , (new_cs & 0xfffc ) | cpl ,
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get_seg_base (e1 , e2 ), limit , e2 );
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- EIP = new_eip ;
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+ env -> eip = new_eip ;
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}
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} else {
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/* check gate type */
@@ -1895,7 +1895,7 @@ void helper_lcall_protected(CPUX86State *env, int new_cs, target_ulong new_eip,
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e2 );
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cpu_x86_set_cpl (env , dpl );
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SET_ESP (sp , sp_mask );
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- EIP = offset ;
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+ env -> eip = offset ;
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}
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}
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@@ -2251,7 +2251,7 @@ void helper_sysenter(CPUX86State *env)
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DESC_S_MASK |
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DESC_W_MASK | DESC_A_MASK );
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env -> regs [R_ESP ] = env -> sysenter_esp ;
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- EIP = env -> sysenter_eip ;
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+ env -> eip = env -> sysenter_eip ;
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}
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void helper_sysexit (CPUX86State * env , int dflag )
@@ -2291,7 +2291,7 @@ void helper_sysexit(CPUX86State *env, int dflag)
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DESC_W_MASK | DESC_A_MASK );
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}
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env -> regs [R_ESP ] = env -> regs [R_ECX ];
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- EIP = env -> regs [R_EDX ];
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+ env -> eip = env -> regs [R_EDX ];
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}
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target_ulong helper_lsl (CPUX86State * env , target_ulong selector1 )
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