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| 1 | +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | +%YAML 1.2 |
| 3 | +--- |
| 4 | +$id: http://devicetree.org/schemas/display/imx/fsl,mxc-epdc.yaml# |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | + |
| 7 | +title: Freescale i.MX6 EPDC |
| 8 | + |
| 9 | +maintainers: |
| 10 | + - Andreas Kemnade <[email protected]> |
| 11 | + |
| 12 | +description: | |
| 13 | + The EPDC is a controller for handling electronic paper displays found in |
| 14 | + i.MX6 SoCs. |
| 15 | +
|
| 16 | +properties: |
| 17 | + compatible: |
| 18 | + enum: |
| 19 | + - fsl,imx6sl-epdc |
| 20 | + - fsl,imx6sll-epdc |
| 21 | + |
| 22 | + reg: |
| 23 | + maxItems: 1 |
| 24 | + |
| 25 | + clocks: |
| 26 | + items: |
| 27 | + - description: Bus clock |
| 28 | + - description: Pixel clock |
| 29 | + |
| 30 | + clock-names: |
| 31 | + items: |
| 32 | + - const: axi |
| 33 | + - const: pix |
| 34 | + |
| 35 | + interrupts: |
| 36 | + maxItems: 1 |
| 37 | + |
| 38 | + vscan-holdoff: |
| 39 | + $ref: /schemas/types.yaml#/definitions/uint32 |
| 40 | + maxItems: 1 |
| 41 | + |
| 42 | + sdoed-width: |
| 43 | + $ref: /schemas/types.yaml#/definitions/uint32 |
| 44 | + maxItems: 1 |
| 45 | + |
| 46 | + sdoed-delay: |
| 47 | + $ref: /schemas/types.yaml#/definitions/uint32 |
| 48 | + maxItems: 1 |
| 49 | + |
| 50 | + sdoez-width: |
| 51 | + $ref: /schemas/types.yaml#/definitions/uint32 |
| 52 | + maxItems: 1 |
| 53 | + |
| 54 | + sdoez-delay: |
| 55 | + $ref: /schemas/types.yaml#/definitions/uint32 |
| 56 | + maxItems: 1 |
| 57 | + |
| 58 | + gdclk-hp-offs: |
| 59 | + $ref: /schemas/types.yaml#/definitions/uint32 |
| 60 | + maxItems: 1 |
| 61 | + |
| 62 | + gdsp-offs: |
| 63 | + $ref: /schemas/types.yaml#/definitions/uint32 |
| 64 | + maxItems: 1 |
| 65 | + |
| 66 | + gdoe-offs: |
| 67 | + $ref: /schemas/types.yaml#/definitions/uint32 |
| 68 | + maxItems: 1 |
| 69 | + |
| 70 | + gdclk-offs: |
| 71 | + $ref: /schemas/types.yaml#/definitions/uint32 |
| 72 | + maxItems: 1 |
| 73 | + |
| 74 | + num-ce: |
| 75 | + $ref: /schemas/types.yaml#/definitions/uint32 |
| 76 | + maxItems: 1 |
| 77 | + |
| 78 | + timing: |
| 79 | + $ref: /display/panel/panel-timing.yaml# |
| 80 | + |
| 81 | + DISPLAY-supply: |
| 82 | + description: |
| 83 | + A couple of +/- voltages automatically powered on in a defintive order |
| 84 | + |
| 85 | + VCOM-supply: |
| 86 | + description: compensation voltage |
| 87 | + |
| 88 | + V3P3-supply: |
| 89 | + description: V3P3 supply |
| 90 | + |
| 91 | + epd-thermal-zone: |
| 92 | + description: |
| 93 | + Zone to get temperature of the EPD from, practically ambient temperature. |
| 94 | + |
| 95 | + |
| 96 | + |
| 97 | +required: |
| 98 | + - compatible |
| 99 | + - reg |
| 100 | + - clocks |
| 101 | + - clock-names |
| 102 | + - interrupts |
| 103 | + - vscan-holdoff |
| 104 | + - sdoed-width |
| 105 | + - sdoed-delay |
| 106 | + - sdoez-width |
| 107 | + - sdoez-delay |
| 108 | + - gdclk-hp-offs |
| 109 | + - gdsp-offs |
| 110 | + - gdoe-offs |
| 111 | + - gdclk-offs |
| 112 | + - num-ce |
| 113 | + |
| 114 | +additionalProperties: false |
| 115 | + |
| 116 | +examples: |
| 117 | + - | |
| 118 | + #include <dt-bindings/clock/imx6sl-clock.h> |
| 119 | + #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 120 | +
|
| 121 | + epdc: epdc@20f4000 { |
| 122 | + compatible = "fsl,imx6sl-epdc"; |
| 123 | + reg = <0x020f4000 0x4000>; |
| 124 | + interrupts = <0 97 IRQ_TYPE_LEVEL_HIGH>; |
| 125 | + clocks = <&clks IMX6SL_CLK_EPDC_AXI>, <&clks IMX6SL_CLK_EPDC_PIX>; |
| 126 | + clock-names = "axi", "pix"; |
| 127 | +
|
| 128 | + pinctrl-names = "default"; |
| 129 | + pinctrl-0 = <&pinctrl_epdc0>; |
| 130 | + V3P3-supply = <&V3P3_reg>; |
| 131 | + VCOM-supply = <&VCOM_reg>; |
| 132 | + DISPLAY-supply = <&DISPLAY_reg>; |
| 133 | + epd-thermal-zone = "epd-thermal"; |
| 134 | +
|
| 135 | + vscan-holdoff = <4>; |
| 136 | + sdoed-width = <10>; |
| 137 | + sdoed-delay = <20>; |
| 138 | + sdoez-width = <10>; |
| 139 | + sdoez-delay = <20>; |
| 140 | + gdclk-hp-offs = <562>; |
| 141 | + gdsp-offs = <662>; |
| 142 | + gdoe-offs = <0>; |
| 143 | + gdclk-offs = <225>; |
| 144 | + num-ce = <3>; |
| 145 | + status = "okay"; |
| 146 | +
|
| 147 | + timing { |
| 148 | + clock-frequency = <80000000>; |
| 149 | + hactive = <1448>; |
| 150 | + hback-porch = <16>; |
| 151 | + hfront-porch = <102>; |
| 152 | + hsync-len = <28>; |
| 153 | + vactive = <1072>; |
| 154 | + vback-porch = <4>; |
| 155 | + vfront-porch = <4>; |
| 156 | + vsync-len = <2>; |
| 157 | + }; |
| 158 | + }; |
| 159 | +... |
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