[pre?-RFC] Generic constant-frequency enable generator

[galibert]

In multiple places I end up needing an enable signal that generates ones at a given frequency in relation to the domain clock. This is a proposal for a generic generator for such a thing. Please someone find a nice name for it, EnableFrequencyGenerator is too weird.

I think the best method is to go for a bresenham variant. The algorithm is simple. Let's call the domain frequency fd and the target frequency ft (which ft < fd). Then:

1. Divide both by p = gcd(ft, fd). ftr=ft/p and fdr=fd/p
2. Find n such that 1<= fdr
3. Compute delta = 1<<n + ftr - fdr (note that this is the result of ftr-fdr in two's complement)
4. Create a counter of n bits with carry (e.g. n+1 bits in practice if there's no easy way to get the carry out other than adding 0). The initial status is carry=1, counter = 0

The circuit is then "if carry at the previous clock, add delta to the counter and output one, else add ftr and output 0".

Some special cases can be simplified. If ftr is a power of two then delta and fdr are equal, and a mux is dropped. If ft is a multiple of fd, we end up with a simple divider. I don't know which is the most efficient between lut-wise between muxing on the adder input and using the carry or clearing to zero and an equlity comparison the counter value.

There probably should be two versions of the class. FixedEFG takes fd and ft and generates a fixed-frequency generator. ProgrammableEFG takes a number of bits for the counter and provides a wishbone endpoint with a couple of registers to write ftr and delta. The gcd aspect can be ignored, itis only there to reduce the number of bits of the counter.

The ProgrammableEFG could only have one register for fd and do the substract by itself, but it's a little sad to have a wide adder used just once for that instead of relying of the computational capabitilites of whatever cpu core is around. It should probably reset the counter on a write to the second register. Writing 0/0 stops the enable generation since no carry happens anymore.

[whitequark]

Name bikeshed: StrobeGenerator?

[galibert]

Nice one, I would have no problem going for it.

[mabl]

Found the attached paper online:

Discrete fractional clock generation for systems-on-fpga.pdf

[galibert]

Fun, they started from the same idea but missed the fact that you can drop the comparator and the second adder by leveraging the carry.