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Wishbone-attached SRAM #89

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whitequark opened this issue Jun 4, 2024 · 1 comment · Fixed by #94
Closed

Wishbone-attached SRAM #89

whitequark opened this issue Jun 4, 2024 · 1 comment · Fixed by #94
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@jfng
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@whitequark
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It would be nice to have a Wishbone-attached SRAM peripheral, to enable CPU cores to have scratchpad RAM.

Since there is an ambiguity about what to do for non-power-of-2 sizes of such RAM, I propose that they be prohibited. There is some usefulness but it's unclear what to do on out-of-bounds accesses (wrap? set err? if you set err when do you clear it?) so it's probably best to punt on this.
@jfng
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jfng commented Jun 4, 2024

Performance-wise, it would also benefit from Wishbone incremental bursts.

This implementation could be useful as a starting point.

@jfng jfng self-assigned this Jun 4, 2024
jfng added a commit to jfng/amaranth-soc that referenced this issue Jul 2, 2024
@jfng
wishbone: add Wishbone-attached SRAM.
4fc9191 
Closes amaranth-lang#89.
@jfng jfng mentioned this issue Jul 2, 2024
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jfng added a commit to jfng/amaranth-soc that referenced this issue Jul 3, 2024
@jfng
wishbone: add Wishbone-attached SRAM.
cf60cbd 
Closes amaranth-lang#89.
jfng added a commit to jfng/amaranth-soc that referenced this issue Jul 3, 2024
@jfng
wishbone: add Wishbone-attached SRAM.
85d9404 
Closes amaranth-lang#89.
github-merge-queue bot pushed a commit that referenced this issue Jul 3, 2024
@jfng
wishbone: add Wishbone-attached SRAM.
d99c8ee 
Closes #89.
@jfng jfng closed this as completed in #94 Jul 3, 2024
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wishbone: add Wishbone-attached SRAM. jfng/amaranth-soc
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