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Libraries/PeriphDrivers/Source/SDHC
5 files changed +11
-11
lines changed Original file line number Diff line number Diff line change @@ -68,17 +68,17 @@ int MXC_SDHC_Init(const mxc_sdhc_cfg_t *cfg)
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unsigned int MXC_SDHC_Get_Input_Clock_Freq (void )
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{
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// Figure 4-1 of the preliminary AI85 UG (04/01/2022) shows the SDHC hardware block
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- // connected directly to the SYS_CLK node. This is most likely inaccurate, but the
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+ // connected directly to the IPO Clock node. This is most likely inaccurate, but the
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// register description for MXC_GCR->pclkdiv marks the usual SDHC divider as reserved.
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// We will follow figure 4-1 for now.
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if (MXC_GCR -> pclkdiv & MXC_F_GCR_PCLKDIS1_SDHC ) {
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- return SystemCoreClock >> 2 ; // Div by 4
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+ return IPO_FREQ >> 2 ; // Div by 4
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} else {
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- return SystemCoreClock >> 1 ; // Div by 2
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+ return IPO_FREQ >> 1 ; // Div by 2
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}
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- return SystemCoreClock ;
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+ return IPO_FREQ ;
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}
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/* ************************************************************************** */
Original file line number Diff line number Diff line change @@ -85,9 +85,9 @@ unsigned int MXC_SDHC_Get_Clock_Config(void)
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unsigned int MXC_SDHC_Get_Input_Clock_Freq (void )
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{
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if (MXC_GCR -> pclk_div & MXC_F_GCR_PCLK_DIV_SDHCFRQ ) {
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- return SystemCoreClock >> 1 ; // Div by 2
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+ return HIRC96_FREQ >> 1 ; // Div by 2
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} else {
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- return 50000000 ; // UG specifies a hard-coded 50Mhz value in this case
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+ return 50000000 ; // UG specifies a hard-coded 50Mhz low-power oscillator
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}
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}
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Original file line number Diff line number Diff line change @@ -68,9 +68,9 @@ unsigned int MXC_SDHC_Get_Input_Clock_Freq(void)
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{
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// TODO(JC): Confirm this is the scheme used by ME13
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if (MXC_GCR -> pclkdiv & MXC_F_GCR_PCLKDIV_SDHCFRQ ) {
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- return SystemCoreClock >> 2 ; // Div by 4
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+ return IPO_FREQ >> 2 ; // Div by 4
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} else {
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- return SystemCoreClock >> 1 ; // Div by 2
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+ return IPO_FREQ >> 1 ; // Div by 2
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}
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}
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Original file line number Diff line number Diff line change @@ -68,9 +68,9 @@ int MXC_SDHC_Init(const mxc_sdhc_cfg_t *cfg)
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unsigned int MXC_SDHC_Get_Input_Clock_Freq (void )
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{
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if (MXC_GCR -> pckdiv & MXC_F_GCR_PCKDIV_SDHCFRQ ) {
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- return SystemCoreClock >> 2 ; // Div by 4
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+ return HIRC96_FREQ >> 2 ; // Div by 4
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} else {
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- return SystemCoreClock >> 1 ; // Div by 2
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+ return HIRC96_FREQ >> 1 ; // Div by 2
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}
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}
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