diff --git a/arch/arm/boot/dts/adi-cn0506-mii.dtsi b/arch/arm/boot/dts/adi-cn0506-mii.dtsi index 305cacd45d9bbc..78d73af157884f 100644 --- a/arch/arm/boot/dts/adi-cn0506-mii.dtsi +++ b/arch/arm/boot/dts/adi-cn0506-mii.dtsi @@ -7,7 +7,7 @@ * PHY after matching MAC link caps with PHY link caps, * even though, the design won't be able to actually support it */ - compatible = "cdns,macb"; + compatible = "xlnx,zynq-gem"; ethernet_gem0_phy1: ethernet-phy@1 { reg = <1>; @@ -23,7 +23,7 @@ * PHY after matching MAC link caps with PHY link caps, * even though, the design won't be able to actually support it */ - compatible = "cdns,macb"; + compatible = "xlnx,zynq-gem"; ethernet_gem1_phy2: ethernet-phy@2 { reg = <2>; diff --git a/arch/arm/boot/dts/adi-cn0506-rgmii.dtsi b/arch/arm/boot/dts/adi-cn0506-rgmii.dtsi index 08f5f4cddb0121..96f9d62e6f859d 100644 --- a/arch/arm/boot/dts/adi-cn0506-rgmii.dtsi +++ b/arch/arm/boot/dts/adi-cn0506-rgmii.dtsi @@ -2,6 +2,7 @@ status = "okay"; phy-mode = "rgmii-id"; phy-handle = <ðernet_gem0_phy1>; + compatible = "xlnx,zynq-gem"; ethernet_gem0_phy1: ethernet-phy@1 { reg = <1>; @@ -18,6 +19,7 @@ status = "okay"; phy-mode = "rgmii-id"; phy-handle = <ðernet_gem1_phy2>; + compatible = "xlnx,zynq-gem"; ethernet_gem1_phy2: ethernet-phy@2 { reg = <2>; diff --git a/arch/arm/boot/dts/adi-cn0506-rmii.dtsi b/arch/arm/boot/dts/adi-cn0506-rmii.dtsi index d71b6da833cec7..1846c935ff4feb 100644 --- a/arch/arm/boot/dts/adi-cn0506-rmii.dtsi +++ b/arch/arm/boot/dts/adi-cn0506-rmii.dtsi @@ -9,7 +9,7 @@ * PHY after matching MAC link caps with PHY link caps, * even though, the design won't be able to actually support it */ - compatible = "cdns,macb"; + compatible = "xlnx,zynq-gem"; clocks = <&clkc 30>, <&fmc_mii_clk1>, <&clkc 13>; clock-names = "pclk", "hclk", "tx_clk"; @@ -31,7 +31,7 @@ * PHY after matching MAC link caps with PHY link caps, * even though, the design won't be able to actually support it */ - compatible = "cdns,macb"; + compatible = "xlnx,zynq-gem"; clocks = <&clkc 31>, <&fmc_mii_clk2>, <&clkc 14>; clock-names = "pclk", "hclk", "tx_clk";