EXT CLK on wrong pins in MAX32655

[perkinsmg]

In pins_me17.c, we have:

const mxc_gpio_cfg_t gpio_cfg_extclk = { MXC_GPIO0, (MXC_GPIO_PIN_12 | MXC_GPIO_PIN_13), MXC_GPIO_FUNC_ALT2,
MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 };

But Clayton confirms that there's no ext clk on those pins. Instead it's on P0.3, as in the data sheet. However, while the DS says it's on AF1, Clayton says it's really on Primary Function.

[EricB-ADI]

Hi @perkinsmg I verified with the datasheet, and schematic. I will fix this asap