MAX32670 MXC_TMR_Init CTRL1_CLKSEL_A/B mismatch

[jlj-ee]

At least for the MAX32670, MXC_TMR_Init does not seem to properly configure the peripheral in 32 bit mode if the clock source is anything other than the default MXC_TMR_APB_CLK (MXC_TMR_CLK0).
Specifically, CTRL1_CLKSEL_B doe not get set to match CTRL1_CLKSEL_A, so if any clock source other than the default is used (e.g. IBRO/MXC_TMR_CLK2), CLKSEL_B will be different than A and 32 bit mode will not work properly unless the field is set manually after calling MXC_TMR_Init.

see e.g. MXC_TMR_RevB_Init

[Jake-Carter]

Thanks for reporting @jlj-ee, just opened a PR with the fix. If you wouldn't mind testing it I'd greatly appreciate it!

[jlj-ee]

Thanks for the heads up @Jake-Carter! The fix works well, at least for the particular scenario where it was initially encountered (IBRO clock source for PWM in 32b mode).