feat(Other): Add final design changes for MAX32572 related files #831
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MAX32655
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Expect failed SVD checks. Will be temporarily disabling ME13 for SVD checks as the ME55 and ME13B both share a lot of design changes, and the ME13B updates are vastly different to the ME13A. |
| __IO uint32_t fctrl2; /**< <tt>\b 0x08:</tt> FCR FCTRL2 Register */ | ||
| __R uint32_t rsv_0x8; | ||
| __IO uint32_t fctrl3; /**< <tt>\b 0x0C:</tt> FCR FCTRL3 Register */ |
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This was intentional as the ME55 is a subset of the ME13B, so there are a lot of blocks that the ME55 directly takes from the ME13B but with a few pieces removed for the ME55 (like this fctrl2 register). However, instead of renaming fctrl3 to fctrl2 for the ME55, it was decided to keep the index numbering consistent between the ME13B and ME55.
Same reasoning for SPI2. See the comment below for more info about SPI numbering.
| #define MXC_BASE_SPI0 ((uint32_t)0x40046000UL) | ||
| #define MXC_SPI0 ((mxc_spi_regs_t *)MXC_BASE_SPI0) | ||
| #define MXC_BASE_SPI1 ((uint32_t)0x40047000UL) | ||
| #define MXC_SPI1 ((mxc_spi_regs_t *)MXC_BASE_SPI1) | ||
| // SPI2 does not exist in the MAX32572 (to match instance addressing with MAX32570B) | ||
| #define MXC_BASE_SPI3 ((uint32_t)0x400BE000UL) | ||
| #define MXC_SPI3 ((mxc_spi_regs_t *)MXC_BASE_SPI3) |
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As mentioned earlier, the ME55 is a subset of the ME13B - with a few features removed on the ME55. SPI2 peripheral location is not supported on the ME55, but the numbering is intentional to keep the SPI peripheral addresses and numbering consistent between the ME13B and ME55.
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| <?xml version="1.0" encoding="utf-8" standalone="no"?> | |||
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This file is not used for any of the parts.
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MAX32520
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/clang-format-run |
sihyung-maxim
requested review from
cwarer1,
lorne-maxim and
Jacob-Scheiffler
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| /****************************************************************************** | |||
| * Copyright (C) 2022 Maxim Integrated Products, Inc., All rights Reserved. | |||
| # PROJ_CFLAGS+=-DRO_FREQ=46000000 | ||
| # PROJ_CFLAGS+=-DCRYPTO_FREQ=46000000 | ||
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| #PROJ_CFLAGS+=-DPeripheralClock=60000000 |
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Leave these commented out?
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| // Copyright 2017 ETH Zurich and University of Bologna. | |||
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Not sure about removing this entirely
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Yep, should be a portions copyright.
| *crtbegin?.o(.dtors) | ||
| *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) | ||
| *(SORT(.dtors.*)) | ||
| *(.dtors) |
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ctors and dtors are needed for C++ support, any idea why they were removed?
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This was created roughly 1-2 years ago, and has been kept separate/out of sync with the main as development was on and off. I tried my best to keep it synced, but this passed through the cracks. I've added it back in.
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/clang-format-run |
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Ready for review
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Description
This PR adds the latest MAX32572 library files. These files match what's in the
dev/me13b_me55branch.I've also made changes to the TMR enum values - meaning the
MXC_prefix was added while keeping the old names. Many names that did not follow the SDK convention but were left in the dust were finally updated for all parts during the development of the ME55 and ME13B SDK files. For example:Checklist Before Requesting Review