@@ -56,6 +56,10 @@ def SBFNoALU32 : Predicate<"!Subtarget->getHasAlu32()">;
56
56
def SBFSubtargetSolana : Predicate<"Subtarget->isSolana()">;
57
57
def SBFv2 : Predicate<"Subtarget->isSBFv2()">;
58
58
def NoSBFv2 : Predicate<"!Subtarget->isSBFv2()">;
59
+ def SBFHasNeg : Predicate<"!Subtarget->getDisableNeg()">;
60
+ def SBFNoNeg: Predicate<"Subtarget->getDisableNeg()">;
61
+ def SBFRevSub : Predicate<"Subtarget->getReverseSubImm()">;
62
+ def SBFNoRevSub : Predicate<"!Subtarget->getReverseSubImm()">;
59
63
60
64
def brtarget : Operand<OtherVT> {
61
65
let PrintMethod = "printBrTargetOperand";
@@ -347,14 +351,14 @@ let Constraints = "$dst = $src2" in {
347
351
// In SBFv1, `sub reg, imm` is interpreted as reg = reg - imm,
348
352
// but in SBFv2 it means reg = imm - reg
349
353
def : Pat<(sub GPR:$src, i64immSExt32:$imm),
350
- (SUB_ri GPR:$src, i64immSExt32:$imm)>, Requires<[NoSBFv2 ]>;
354
+ (SUB_ri GPR:$src, i64immSExt32:$imm)>, Requires<[SBFNoRevSub ]>;
351
355
def : Pat<(sub GPR32:$src, i32immSExt32:$imm),
352
- (SUB_ri_32 GPR32:$src, i32immSExt32:$imm)>, Requires<[NoSBFv2 ]>;
356
+ (SUB_ri_32 GPR32:$src, i32immSExt32:$imm)>, Requires<[SBFNoRevSub ]>;
353
357
354
358
def : Pat<(sub i64immSExt32:$imm, GPR:$src),
355
- (SUB_ri GPR:$src, i64immSExt32:$imm)>, Requires<[SBFv2 ]>;
359
+ (SUB_ri GPR:$src, i64immSExt32:$imm)>, Requires<[SBFRevSub ]>;
356
360
def : Pat<(sub i32immSExt32:$imm, GPR32:$src),
357
- (SUB_ri_32 GPR32:$src, i32immSExt32:$imm)>, Requires<[SBFv2 ]>;
361
+ (SUB_ri_32 GPR32:$src, i32immSExt32:$imm)>, Requires<[SBFRevSub ]>;
358
362
359
363
class NEG_RR<SBFOpClass Class, SBFArithOp Opc,
360
364
dag outs, dag ins, string asmstr, list<dag> pattern>
@@ -376,11 +380,11 @@ let Constraints = "$dst = $src", isAsCheapAsAMove = 1 in {
376
380
377
381
// Instruction `neg` exists on SBFv1, but not on SBFv2
378
382
// In SBFv2, the negate operation is done with a subtraction
379
- def : Pat<(ineg i64:$src), (NEG_64 GPR:$src)>, Requires<[NoSBFv2 ]>;
380
- def : Pat<(ineg i32:$src), (NEG_32 GPR32:$src)>, Requires<[NoSBFv2 ]>;
383
+ def : Pat<(ineg i64:$src), (NEG_64 GPR:$src)>, Requires<[SBFHasNeg ]>;
384
+ def : Pat<(ineg i32:$src), (NEG_32 GPR32:$src)>, Requires<[SBFHasNeg ]>;
381
385
382
- def : Pat<(ineg i64:$src), (SUB_ri GPR:$src, 0)>, Requires<[SBFv2 ]>;
383
- def : Pat<(ineg i32:$src), (SUB_ri_32 GPR32:$src, 0)>, Requires<[SBFv2 ]>;
386
+ def : Pat<(ineg i64:$src), (SUB_ri GPR:$src, 0)>, Requires<[SBFNoNeg ]>;
387
+ def : Pat<(ineg i32:$src), (SUB_ri_32 GPR32:$src, 0)>, Requires<[SBFNoNeg ]>;
384
388
385
389
386
390
class LD_IMM64<bits<4> Pseudo, string Mnemonic>
0 commit comments