arch: There is no need to use sched_[un]lock

Change-Id: I5dd085e64cefc06d8fee5db41f740e39ec8f496a Signed-off-by: hujun5 <[email protected]>
apache · Oct 11, 2024 · 3a971a9 · 3a971a9
1 parent d1a2d87
commit 3a971a9
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Showing 8 changed files with 20 additions and 43 deletions.
diff --git a/arch/arm/src/sama5/sam_mcan.c b/arch/arm/src/sama5/sam_mcan.c
@@ -3035,7 +3035,6 @@ static int mcan_send(struct can_dev_s *dev, struct can_msg_s *msg)
    * the MCAN device was opened O_NONBLOCK.
    */
 
-  sched_lock();
   mcan_buffer_reserve(priv);
 
   /* Get exclusive access to the MCAN peripheral */
@@ -3044,12 +3043,9 @@ static int mcan_send(struct can_dev_s *dev, struct can_msg_s *msg)
   if (ret < 0)
     {
       mcan_buffer_release(priv);
-      sched_unlock();
       return ret;
     }
 
-  sched_unlock();
-
   /* Get our reserved Tx FIFO/queue put index */
 
   regval = mcan_getreg(priv, SAM_MCAN_TXFQS_OFFSET);

diff --git a/arch/arm/src/samv7/sam_mcan.c b/arch/arm/src/samv7/sam_mcan.c
@@ -3019,16 +3019,10 @@ static int mcan_send(struct can_dev_s *dev, struct can_msg_s *msg)
    * not full and cannot become full at least until we add our packet to
    * the FIFO.
    *
-   * We can't get exclusive access to MCAN resources here because that
-   * lock the MCAN while we wait for a free buffer.  Instead, the
-   * scheduler is locked here momentarily.  See discussion in
-   * mcan_buffer_reserve() for an explanation.
-   *
    * REVISIT: This needs to be extended in order to handler case where
    * the MCAN device was opened O_NONBLOCK.
    */
 
-  sched_lock();
   mcan_buffer_reserve(priv);
 
   /* Get exclusive access to the MCAN peripheral */
@@ -3037,12 +3031,9 @@ static int mcan_send(struct can_dev_s *dev, struct can_msg_s *msg)
   if (ret < 0)
     {
       mcan_buffer_release(priv);
-      sched_unlock();
       return ret;
     }
 
-  sched_unlock();
-
   /* Get our reserved Tx FIFO/queue put index */
 
   regval = mcan_getreg(priv, SAM_MCAN_TXFQS_OFFSET);

diff --git a/arch/arm/src/stm32/stm32_qencoder.c b/arch/arm/src/stm32/stm32_qencoder.c
@@ -32,6 +32,7 @@
 
 #include <nuttx/arch.h>
 #include <nuttx/irq.h>
+#include <nuttx/spinlock.h>
 #include <nuttx/sensors/qencoder.h>
 
 #include <arch/board/board.h>
@@ -1184,6 +1185,7 @@ static int stm32_position(struct qe_lowerhalf_s *lower, int32_t *pos)
 {
   struct stm32_lowerhalf_s *priv = (struct stm32_lowerhalf_s *)lower;
 #ifndef CONFIG_STM32_QENCODER_DISABLE_EXTEND16BTIMERS
+  irqstate_t flags;
   int32_t position;
   int32_t verify;
   uint32_t count;
@@ -1192,19 +1194,15 @@ static int stm32_position(struct qe_lowerhalf_s *lower, int32_t *pos)
 
   /* Loop until we are certain that no interrupt occurred between samples */
 
+  flags = spin_lock_irqsave(NULL);
   do
     {
-      /* Don't let another task preempt us until we get the measurement.
-       * The timer interrupt may still be processed
-       */
-
-      sched_lock();
       position = priv->position;
       count    = stm32_getreg32(priv, STM32_GTIM_CNT_OFFSET);
       verify   = priv->position;
-      sched_unlock();
     }
   while (position != verify);
+  spin_unlock_irqrestore(NULL, flags);
 
   /* Return the position measurement */
 

diff --git a/arch/arm/src/stm32f7/stm32_qencoder.c b/arch/arm/src/stm32f7/stm32_qencoder.c
@@ -31,6 +31,7 @@
 
 #include <nuttx/arch.h>
 #include <nuttx/irq.h>
+#include <nuttx/spinlock.h>
 #include <nuttx/sensors/qencoder.h>
 
 #include <arch/board/board.h>
@@ -1022,6 +1023,7 @@ static int stm32_position(struct qe_lowerhalf_s *lower, int32_t *pos)
 {
   struct stm32_lowerhalf_s *priv = (struct stm32_lowerhalf_s *)lower;
 #ifdef HAVE_16BIT_TIMERS
+  irqstate_t flags;
   int32_t position;
   int32_t verify;
   uint32_t count;
@@ -1030,19 +1032,15 @@ static int stm32_position(struct qe_lowerhalf_s *lower, int32_t *pos)
 
   /* Loop until we are certain that no interrupt occurred between samples */
 
+  flags = spin_lock_irqsave(NULL);
   do
     {
-      /* Don't let another task preempt us until we get the measurement.
-       * The timer interrupt may still be processed.
-       */
-
-      sched_lock();
       position = priv->position;
       count    = stm32_getreg32(priv, STM32_GTIM_CNT_OFFSET);
       verify   = priv->position;
-      sched_unlock();
     }
   while (position != verify);
+  spin_unlock_irqrestore(NULL, flags);
 
   /* Return the position measurement */
 

diff --git a/arch/arm/src/stm32h7/stm32_qencoder.c b/arch/arm/src/stm32h7/stm32_qencoder.c
@@ -31,6 +31,7 @@
 
 #include <nuttx/arch.h>
 #include <nuttx/irq.h>
+#include <nuttx/spinlock.h>
 #include <nuttx/sensors/qencoder.h>
 
 #include <arch/board/board.h>
@@ -1023,6 +1024,7 @@ static int stm32_position(struct qe_lowerhalf_s *lower, int32_t *pos)
 {
   struct stm32_lowerhalf_s *priv = (struct stm32_lowerhalf_s *)lower;
 #ifdef HAVE_16BIT_TIMERS
+  irqstate_t flags;
   int32_t position;
   int32_t verify;
   uint32_t count;
@@ -1031,19 +1033,15 @@ static int stm32_position(struct qe_lowerhalf_s *lower, int32_t *pos)
 
   /* Loop until we are certain that no interrupt occurred between samples */
 
+  flags = spin_lock_irqsave(NULL);
   do
     {
-      /* Don't let another task preempt us until we get the measurement.
-       * The timer interrupt may still be processed
-       */
-
-      sched_lock();
       position = priv->position;
       count    = stm32_getreg32(priv, STM32_GTIM_CNT_OFFSET);
       verify   = priv->position;
-      sched_unlock();
     }
   while (position != verify);
+  spin_unlock_irqrestore(NULL, flags);
 
   /* Return the position measurement */
 

diff --git a/arch/arm/src/stm32l4/stm32l4_qencoder.c b/arch/arm/src/stm32l4/stm32l4_qencoder.c
@@ -31,6 +31,7 @@
 
 #include <nuttx/arch.h>
 #include <nuttx/irq.h>
+#include <nuttx/spinlock.h>
 #include <nuttx/sensors/qencoder.h>
 
 #include <arch/board/board.h>
@@ -1024,6 +1025,7 @@ static int stm32l4_position(struct qe_lowerhalf_s *lower,
   struct stm32l4_lowerhalf_s *priv =
                               (struct stm32l4_lowerhalf_s *)lower;
 #ifdef HAVE_16BIT_TIMERS
+  irqstate_t flags;
   int32_t position;
   int32_t verify;
   uint32_t count;
@@ -1032,19 +1034,15 @@ static int stm32l4_position(struct qe_lowerhalf_s *lower,
 
   /* Loop until we are certain that no interrupt occurred between samples */
 
+  spin_lock_irqsave(NULL);
   do
     {
-      /* Don't let another task preempt us until we get the measurement.
-       * The timer interrupt may still be processed
-       */
-
-      sched_lock();
       position = priv->position;
       count    = stm32l4_getreg32(priv, STM32L4_GTIM_CNT_OFFSET);
       verify   = priv->position;
-      sched_unlock();
     }
   while (position != verify);
+  spin_unlock_irqrestore(NULL, flags);
 
   /* Return the position measurement */
 

diff --git a/arch/mips/src/pic32mx/pic32mx_gpio.c b/arch/mips/src/pic32mx/pic32mx_gpio.c
@@ -301,7 +301,6 @@ void pic32mx_dumpgpio(uint32_t pinset, const char *msg)
 
       /* The following requires exclusive access to the GPIO registers */
 
-      sched_lock();
       gpioinfo("IOPORT%c pinset: %04x base: %08x -- %s\n",
                'A' + port, pinset, base, msg);
       gpioinfo("   TRIS: %08x   PORT: %08x    LAT: %08x    ODC: %08x\n",
@@ -313,7 +312,6 @@ void pic32mx_dumpgpio(uint32_t pinset, const char *msg)
                getreg32(PIC32MX_IOPORT_CNCON),
                getreg32(PIC32MX_IOPORT_CNEN),
                getreg32(PIC32MX_IOPORT_CNPUE));
-      sched_unlock();
     }
 }
 #endif
diff --git a/arch/mips/src/pic32mz/pic32mz_gpio.c b/arch/mips/src/pic32mz/pic32mz_gpio.c
@@ -30,6 +30,7 @@
 
 #include <nuttx/irq.h>
 #include <nuttx/arch.h>
+#include <nuttx/spinlock.h>
 #include <arch/board/board.h>
 
 #include "mips_internal.h"
@@ -159,6 +160,7 @@ int pic32mz_configgpio(pinset_t cfgset)
   unsigned int port = pic32mz_portno(cfgset);
   unsigned int pin  = pic32mz_pinno(cfgset);
   uint32_t     mask = (1 << pin);
+  irqstate_t   flags;
   uintptr_t    base;
 
   /* Verify that the port number is within range */
@@ -169,7 +171,7 @@ int pic32mz_configgpio(pinset_t cfgset)
 
       base = g_gpiobase[port];
 
-      sched_lock();
+      flags = spin_lock_irqsave(NULL);
 
       /* Is Slew Rate control enabled? */
 
@@ -239,7 +241,7 @@ int pic32mz_configgpio(pinset_t cfgset)
             }
         }
 
-      sched_unlock();
+      spin_unlock_irqrestore(NULL, flags);
       return OK;
     }
 
@@ -336,7 +338,6 @@ void pic32mz_dumpgpio(pinset_t pinset, const char *msg)
 
       /* The following requires exclusive access to the GPIO registers */
 
-      sched_lock();
       gpioinfo("IOPORT%c pinset: %04x base: %08x -- %s\n",
                'A' + port, pinset, base, msg);
       gpioinfo("   TRIS: %08x   PORT: %08x    LAT: %08x    ODC: %08x\n",
@@ -348,7 +349,6 @@ void pic32mz_dumpgpio(pinset_t pinset, const char *msg)
                getreg32(base + PIC32MZ_IOPORT_CNCON_OFFSET),
                getreg32(base + PIC32MZ_IOPORT_CNEN_OFFSET),
                getreg32(base + PIC32MZ_IOPORT_CNPU_OFFSET));
-      sched_unlock();
     }
 }
 #endif