From 7d7f7f39eea0ccd8d626d8e412d79a713e03410f Mon Sep 17 00:00:00 2001 From: hujun5 Date: Wed, 27 Nov 2024 09:21:51 +0800 Subject: [PATCH] riscv: remove up_set_current_regs/up_current_regs reason: up_set_current_regs initially had two functions: 1: To mark the entry into an interrupt state. 2: To record the context before an interrupt/exception. If we switch to a new task, we need to store the upcoming context regs by calling up_set_current_regs(regs). Currently, we record the context in other ways, so the second function is obsolete. Therefore, we need to rename up_set_current_regs to better reflect its actual meaning, which is solely to mark an interrupt. Signed-off-by: hujun5 --- arch/risc-v/include/irq.h | 61 ++++++++----------- arch/risc-v/src/common/riscv_backtrace.c | 4 +- arch/risc-v/src/common/riscv_doirq.c | 26 +++----- arch/risc-v/src/common/riscv_exception.c | 12 ++-- arch/risc-v/src/common/riscv_initialize.c | 4 +- arch/risc-v/src/common/riscv_registerdump.c | 2 +- .../common/supervisor/riscv_perform_syscall.c | 8 ++- 7 files changed, 51 insertions(+), 66 deletions(-) diff --git a/arch/risc-v/include/irq.h b/arch/risc-v/include/irq.h index a19de9ade9ff8..959438dc4c748 100644 --- a/arch/risc-v/include/irq.h +++ b/arch/risc-v/include/irq.h @@ -671,17 +671,9 @@ extern "C" #define EXTERN extern #endif -/* g_current_regs[] holds a references to the current interrupt level - * register storage structure. If is non-NULL only during interrupt - * processing. Access to g_current_regs[] must be through the - * [get/set]_current_regs for portability. - */ - -/* For the case of architectures with multiple CPUs, then there must be one - * such value for each processor that can receive an interrupt. - */ +/* g_interrupt_context store irq status */ -EXTERN volatile uintreg_t *g_current_regs[CONFIG_SMP_NCPUS]; +EXTERN volatile bool g_interrupt_context[CONFIG_SMP_NCPUS]; /**************************************************************************** * Public Function Prototypes @@ -724,24 +716,6 @@ int up_this_cpu(void); * Inline Functions ****************************************************************************/ -static inline_function uintreg_t *up_current_regs(void) -{ -#ifdef CONFIG_SMP - return (uintreg_t *)g_current_regs[up_this_cpu()]; -#else - return (uintreg_t *)g_current_regs[0]; -#endif -} - -static inline_function void up_set_current_regs(uintreg_t *regs) -{ -#ifdef CONFIG_SMP - g_current_regs[up_this_cpu()] = regs; -#else - g_current_regs[0] = regs; -#endif -} - /**************************************************************************** * Name: up_irq_save * @@ -790,6 +764,24 @@ noinstrument_function static inline void up_irq_restore(irqstate_t flags) ); } +/**************************************************************************** + * Name: up_set_interrupt_context + * + * Description: + * Set the interrupt handler context. + * + ****************************************************************************/ + +noinstrument_function +static inline_function void up_set_interrupt_context(bool flag) +{ +#ifdef CONFIG_SMP + g_interrupt_context[up_this_cpu()] = flag; +#else + g_interrupt_context[0] = flag; +#endif +} + /**************************************************************************** * Name: up_interrupt_context * @@ -803,15 +795,12 @@ noinstrument_function static inline_function bool up_interrupt_context(void) { #ifdef CONFIG_SMP irqstate_t flags = up_irq_save(); -#endif - - bool ret = up_current_regs() != NULL; - -#ifdef CONFIG_SMP + bool ret = g_interrupt_context[up_this_cpu()]; up_irq_restore(flags); -#endif - return ret; +#else + return g_interrupt_context[0]; +#endif } /**************************************************************************** @@ -819,7 +808,7 @@ noinstrument_function static inline_function bool up_interrupt_context(void) ****************************************************************************/ #define up_getusrpc(regs) \ - (((uintptr_t *)((regs) ? (regs) : up_current_regs()))[REG_EPC]) + (((uintptr_t *)((regs) ? (regs) : running_regs()))[REG_EPC]) #undef EXTERN #if defined(__cplusplus) diff --git a/arch/risc-v/src/common/riscv_backtrace.c b/arch/risc-v/src/common/riscv_backtrace.c index 4fe7309f44a2d..18d1f64ec7a44 100644 --- a/arch/risc-v/src/common/riscv_backtrace.c +++ b/arch/risc-v/src/common/riscv_backtrace.c @@ -162,8 +162,8 @@ int up_backtrace(struct tcb_s *tcb, void **buffer, int size, int skip) { ret += backtrace(rtcb->stack_base_ptr, rtcb->stack_base_ptr + rtcb->adj_stack_size, - (void *)up_current_regs()[REG_FP], - (void *)up_current_regs()[REG_EPC], + running_regs()[REG_FP], + running_regs()[REG_EPC], &buffer[ret], size - ret, &skip); } } diff --git a/arch/risc-v/src/common/riscv_doirq.c b/arch/risc-v/src/common/riscv_doirq.c index dd8e094cd93aa..28b150457f6d9 100644 --- a/arch/risc-v/src/common/riscv_doirq.c +++ b/arch/risc-v/src/common/riscv_doirq.c @@ -78,26 +78,20 @@ uintreg_t *riscv_doirq(int irq, uintreg_t *regs) (*running_task)->xcp.regs = regs; } - /* Current regs non-zero indicates that we are processing an interrupt; - * current_regs is also used to manage interrupt level context switches. - * - * Nested interrupts are not supported - */ + /* Nested interrupts are not supported */ - DEBUGASSERT(up_current_regs() == NULL); - up_set_current_regs(regs); + DEBUGASSERT(!up_interrupt_context()); + + /* Set irq flag */ + + up_set_interrupt_context(true); /* Deliver the IRQ */ irq_dispatch(irq, regs); tcb = this_task(); - /* Check for a context switch. If a context switch occurred, then - * current_regs will have a different value than it did on entry. If an - * interrupt level context switch has occurred, then restore the floating - * point state and the establish the correct address environment before - * returning from the interrupt. - */ + /* Check for a context switch. */ if (*running_task != tcb) { @@ -124,11 +118,9 @@ uintreg_t *riscv_doirq(int irq, uintreg_t *regs) *running_task = tcb; } - /* Set current_regs to NULL to indicate that we are no longer in an - * interrupt handler. - */ + /* Set irq flag */ - up_set_current_regs(NULL); + up_set_interrupt_context(false); #endif board_autoled_off(LED_INIRQ); diff --git a/arch/risc-v/src/common/riscv_exception.c b/arch/risc-v/src/common/riscv_exception.c index 482bc8975f387..9ef107f433d54 100644 --- a/arch/risc-v/src/common/riscv_exception.c +++ b/arch/risc-v/src/common/riscv_exception.c @@ -110,22 +110,22 @@ int riscv_exception(int mcause, void *regs, void *args) /* Return to _exit function in privileged mode with argument SIGSEGV */ - up_current_regs()[REG_EPC] = (uintptr_t)_exit; - up_current_regs()[REG_A0] = SIGSEGV; - up_current_regs()[REG_INT_CTX] |= STATUS_PPP; + running_regs()[REG_EPC] = _exit; + running_regs()[REG_A0] = (void *)SIGSEGV; + ((uintreg_t *)running_regs())[REG_INT_CTX] |= STATUS_PPP; /* Continue with kernel stack in use. The frame(s) in kernel stack * are no longer needed, so just set it to top */ - up_current_regs()[REG_SP] = (uintptr_t)tcb->xcp.ktopstk; + running_regs()[REG_SP] = (void *)tcb->xcp.ktopstk; } else #endif { _alert("PANIC!!! Exception = %" PRIxREG "\n", cause); up_irq_save(); - up_set_current_regs(regs); + up_set_interrupt_context(true); PANIC_WITH_REGS("panic", regs); } @@ -197,7 +197,7 @@ int riscv_fillpage(int mcause, void *regs, void *args) { _alert("PANIC!!! virtual address not mappable: %" PRIxPTR "\n", vaddr); up_irq_save(); - up_set_current_regs(regs); + up_set_interrupt_context(true); PANIC_WITH_REGS("panic", regs); } diff --git a/arch/risc-v/src/common/riscv_initialize.c b/arch/risc-v/src/common/riscv_initialize.c index 9d0f1c81d7c0c..372122cc058b8 100644 --- a/arch/risc-v/src/common/riscv_initialize.c +++ b/arch/risc-v/src/common/riscv_initialize.c @@ -32,7 +32,9 @@ * Public Data ****************************************************************************/ -volatile uintreg_t *g_current_regs[CONFIG_SMP_NCPUS]; +/* g_interrupt_context store irq status */ + +volatile bool g_interrupt_context[CONFIG_SMP_NCPUS]; /**************************************************************************** * Private Functions diff --git a/arch/risc-v/src/common/riscv_registerdump.c b/arch/risc-v/src/common/riscv_registerdump.c index e291329494692..990f065c626cc 100644 --- a/arch/risc-v/src/common/riscv_registerdump.c +++ b/arch/risc-v/src/common/riscv_registerdump.c @@ -53,7 +53,7 @@ uintptr_t up_getusrsp(void *regs) void up_dump_register(void *dumpregs) { - volatile uintreg_t *regs = dumpregs ? dumpregs : up_current_regs(); + volatile uintreg_t *regs = dumpregs ? dumpregs : running_regs(); /* Are user registers available from interrupt processing? */ diff --git a/arch/risc-v/src/common/supervisor/riscv_perform_syscall.c b/arch/risc-v/src/common/supervisor/riscv_perform_syscall.c index 00fd5f54b2e9a..aa00e1d01bb3e 100644 --- a/arch/risc-v/src/common/supervisor/riscv_perform_syscall.c +++ b/arch/risc-v/src/common/supervisor/riscv_perform_syscall.c @@ -45,9 +45,9 @@ void *riscv_perform_syscall(uintreg_t *regs) (*running_task)->xcp.regs = regs; } - /* Set up the interrupt register set needed by swint() */ + /* Set irq flag */ - up_set_current_regs(regs); + up_set_interrupt_context(true); /* Run the system call handler (swint) */ @@ -77,7 +77,9 @@ void *riscv_perform_syscall(uintreg_t *regs) *running_task = tcb; } - up_set_current_regs(NULL); + /* Set irq flag */ + + up_set_interrupt_context(false); return tcb->xcp.regs; }