Bump to v0.3.0 and update CHANGELOG (#29)

Author: equation314

CHANGELOG.md

@@ -1,16 +1,33 @@
 # Changelog
 
+## 0.3.0
+
+### New Features
+
+* Add ARMv7a (32-bit) architecture support (https://github.com/arceos-org/axcpu/pull/16).
+* Add generic timer abstraction for AArch64 and ARM architectures (https://github.com/arceos-org/axcpu/pull/23).
+
+### Breaking Changes
+
+* Upgrade [page_table_multiarch](https://crates.io/crates/page_table_multiarch) crate to v0.6, which adds ARM support. (https://github.com/arceos-org/axcpu/pull/22).
+* Upgrade [percpu](https://crates.io/crates/percpu) crate to v0.3, see [percpu v0.3.0 changelog](https://github.com/arceos-org/percpu/blob/main/CHANGELOG.md#030).
+
+### Bug Fixes
+
+* Fix kernel stack pointer save on LoongArch64 (https://github.com/arceos-org/axcpu/pull/14).
+* Set sstatus::FS before fp restore/clear in `switch_to` on riscv64 (https://github.com/arceos-org/axcpu/pull/30).
+
 ## 0.2.2
 
-### Fixes
+### Bug Fixes
 
-* [Fix compile error on riscv when enable `uspace` feature](https://github.com/arceos-org/axcpu/pull/12).
+* Fix compile error on riscv when enabling `uspace` feature (https://github.com/arceos-org/axcpu/pull/12).
 
 ## 0.2.1
 
-### Fixes
+### Bug Fixes
 
-* [Pad TrapFrame to multiple of 16 bytes for riscv64](https://github.com/arceos-org/axcpu/pull/11).
+* Pad TrapFrame to multiple of 16 bytes for riscv64 (https://github.com/arceos-org/axcpu/pull/11).
 
 ## 0.2.0
 
@@ -20,8 +37,8 @@
 
 ### New Features
 
-* [Add FP state switch for riscv64](https://github.com/arceos-org/axcpu/pull/2).
-* [Add hypervisor support for aarch64](https://github.com/arceos-org/axcpu/pull/10).
+* Add FP state switch for riscv64 (https://github.com/arceos-org/axcpu/pull/2).
+* Add hypervisor support for aarch64 (https://github.com/arceos-org/axcpu/pull/10).
 
 ### Other Improvements
 

Cargo.lock

@@ -1,11 +1,12 @@
 [package]
 name = "axcpu"
-version = "0.2.2"
+version = "0.3.0"
 edition = "2021"
 authors = [
     "Yuekai Jia <equation618@gmail.com>",
     "Youjie Zheng <Azure_stars@126.com>",
     "yfblock <321353225@qq.com>",
+    "Debin <luodebin@kylinos.cn>",
     "yanjuguang <coolyanjg@163.com>",
     "Grow Zheng <hhmcn@outlook.com>",
     "Su Mingxian <aarkegz@gmail.com>",
@@ -61,4 +62,10 @@ new_without_default = "allow"
 
 [package.metadata.docs.rs]
 all-features = true
-targets = ["x86_64-unknown-none", "aarch64-unknown-none-softfloat", "riscv64gc-unknown-none-elf", "loongarch64-unknown-none-softfloat"]
+targets = [
+    "x86_64-unknown-none",
+    "aarch64-unknown-none-softfloat",
+    "riscv64gc-unknown-none-elf",
+    "loongarch64-unknown-none-softfloat",
+    "armv7a-none-eabi",
+]