Merge pull request #266 from ashvardanian/main-dev

Build Issues & Warnings

Author: ashvardanian

.github/workflows/prerelease.yml

@@ -140,6 +140,9 @@ jobs:
     env:
       CC: gcc-12
       CXX: g++-12
+      # `node-gyp-build` will look at this first; setting it prevents an
+      # unintended rebuild and lets Deno just `dlopen` the prebuilt `.node`.
+      PREBUILDS_ONLY: "1"
 
     steps:
       - name: Checkout
@@ -168,7 +171,7 @@ jobs:
           deno-version: vx.x.x
 
       - name: Test with Deno
-        run: deno test --allow-read
+        run: deno test -A
 
   test_rust:
     name: Test Rust

.github/workflows/release.yml

@@ -401,6 +401,7 @@ jobs:
           name: prebuilds
           path: prebuilds
           retention-days: 1
+          overwrite: true
 
   publish_javascript:
     name: Publish JavaScript Package

CONTRIBUTING.md

@@ -94,15 +94,23 @@ export BLIS_NUM_THREADS=1 # for BLIS
 
 ## Python
 
+Python bindings are implemented using pure CPython, so you wouldn't need to install SWIG, PyBind11, or any other third-party library.
+Still, you need a virtual environment, and it's recommended to use `uv` to create one.
+
+```sh
+uv venv --python 3.11           # Or your preferred Python version
+source .venv/bin/activate       # To activate the virtual environment
+uv pip install -e .             # To build locally from source
+```
+
 Testing:
 
 ```sh
-pip install -e .                             # to install the package in editable mode
 pip install pytest pytest-repeat tabulate    # testing dependencies
 pytest scripts/test.py -s -x -Wd             # to run tests
 
 # to check supported SIMD instructions:
-python -c "import simsimd; print(simsimd.get_capabilities())" 
+python -c "import simsimd; print(simsimd.get_capabilities())"
 ```
 
 Here, `-s` will output the logs.
@@ -234,7 +242,7 @@ irm https://deno.land/install.ps1 | iex               # Windows
 Testing:
 
 ```sh
-deno test --allow-read
+deno test -A
 ```
 
 ### Bun

include/simsimd/elementwise.h

@@ -1469,10 +1469,19 @@ SIMSIMD_PUBLIC void simsimd_fma_bf16_skylake(
 
 #if SIMSIMD_TARGET_SAPPHIRE
 #pragma GCC push_options
-#pragma GCC target("avx2", "avx512f", "avx512vl", "bmi2", "avx512bw", "avx512fp16")
-#pragma clang attribute push(__attribute__((target("avx2,avx512f,avx512vl,bmi2,avx512bw,avx512fp16"))), \
+#pragma GCC target("avx2", "avx512f", "avx512vl", "bmi2", "avx512bw", "avx512fp16", "f16c")
+#pragma clang attribute push(__attribute__((target("avx2,avx512f,avx512vl,bmi2,avx512bw,avx512fp16,f16c"))), \
                              apply_to = function)
 
+/**
+ *  Using `_mm512_set1_ph((_Float16)1.f)` results in compilation warnings if we are pedantic.
+ *  https://www.intel.com/content/www/us/en/docs/cpp-compiler/developer-guide-reference/2021-8/details-about-intrinsics-for-half-floats.html
+ */
+SIMSIMD_INTERNAL __m512h _mm512_set1_ph_from_ps(float a) {
+    unsigned short h = _cvtss_sh(a, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
+    return (__m512h)_mm512_set1_epi16(h);
+}
+
 SIMSIMD_PUBLIC void simsimd_sum_f16_sapphire(simsimd_f16_t const *a, simsimd_f16_t const *b, simsimd_size_t n,
                                              simsimd_f16_t *result) {
     __mmask32 mask = 0xFFFFFFFF;
@@ -1500,7 +1509,7 @@ SIMSIMD_PUBLIC void simsimd_scale_f16_sapphire(simsimd_f16_t const *a, simsimd_s
                                                simsimd_f16_t *result) {
 
     __mmask32 mask = 0xFFFFFFFF;
-    __m512h alpha_vec = _mm512_set1_ph((_Float16)alpha);
+    __m512h alpha_vec = _mm512_set1_ph_from_ps(alpha);
     __m512h a_f16_vec, b_f16_vec;
     __m512h sum_f16_vec;
 simsimd_scale_f16_sapphire_cycle:
@@ -1540,8 +1549,8 @@ SIMSIMD_PUBLIC void simsimd_wsum_f16_sapphire(                        //
 
     // The general case.
     __mmask32 mask = 0xFFFFFFFF;
-    __m512h alpha_vec = _mm512_set1_ph((_Float16)alpha);
-    __m512h beta_vec = _mm512_set1_ph((_Float16)beta);
+    __m512h alpha_vec = _mm512_set1_ph_from_ps(alpha);
+    __m512h beta_vec = _mm512_set1_ph_from_ps(beta);
     __m512h a_f16_vec, b_f16_vec;
     __m512h a_scaled_f16_vec, sum_f16_vec;
 simsimd_wsum_f16_sapphire_cycle:
@@ -1568,8 +1577,8 @@ SIMSIMD_PUBLIC void simsimd_fma_f16_sapphire(
     simsimd_distance_t alpha, simsimd_distance_t beta, simsimd_f16_t *result) {
 
     __mmask32 mask = 0xFFFFFFFF;
-    __m512h alpha_vec = _mm512_set1_ph((_Float16)alpha);
-    __m512h beta_vec = _mm512_set1_ph((_Float16)beta);
+    __m512h alpha_vec = _mm512_set1_ph_from_ps(alpha);
+    __m512h beta_vec = _mm512_set1_ph_from_ps(beta);
     __m512h a_f16_vec, b_f16_vec, c_f16_vec;
     __m512h ab_f16_vec, ab_scaled_f16_vec, sum_f16_vec;
 simsimd_fma_f16_sapphire_cycle:
@@ -1619,7 +1628,7 @@ SIMSIMD_PUBLIC void simsimd_sum_u8_sapphire(simsimd_u8_t const *a, simsimd_u8_t
 SIMSIMD_PUBLIC void simsimd_scale_u8_sapphire(simsimd_u8_t const *a, simsimd_size_t n, simsimd_distance_t alpha,
                                               simsimd_u8_t *result) {
     __mmask64 mask = 0xFFFFFFFFFFFFFFFFull;
-    __m512h alpha_vec = _mm512_set1_ph((_Float16)alpha);
+    __m512h alpha_vec = _mm512_set1_ph_from_ps(alpha);
     __m512i a_u8_vec, b_u8_vec, sum_u8_vec;
     __m512h a_f16_low_vec, a_f16_high_vec;
     __m512h a_scaled_f16_low_vec, a_scaled_f16_high_vec, sum_f16_low_vec, sum_f16_high_vec;
@@ -1670,8 +1679,8 @@ SIMSIMD_PUBLIC void simsimd_wsum_u8_sapphire(                       //
 
     // The general case.
     __mmask64 mask = 0xFFFFFFFFFFFFFFFFull;
-    __m512h alpha_vec = _mm512_set1_ph((_Float16)alpha);
-    __m512h beta_vec = _mm512_set1_ph((_Float16)beta);
+    __m512h alpha_vec = _mm512_set1_ph_from_ps(alpha);
+    __m512h beta_vec = _mm512_set1_ph_from_ps(beta);
     __m512i a_u8_vec, b_u8_vec, sum_u8_vec;
     __m512h a_f16_low_vec, a_f16_high_vec, b_f16_low_vec, b_f16_high_vec;
     __m512h a_scaled_f16_low_vec, a_scaled_f16_high_vec, sum_f16_low_vec, sum_f16_high_vec;
@@ -1739,7 +1748,7 @@ SIMSIMD_PUBLIC void simsimd_scale_i8_sapphire(simsimd_i8_t const *a, simsimd_siz
                                               simsimd_i8_t *result) {
 
     __mmask64 mask = 0xFFFFFFFFFFFFFFFFull;
-    __m512h alpha_vec = _mm512_set1_ph((_Float16)alpha);
+    __m512h alpha_vec = _mm512_set1_ph_from_ps(alpha);
     __m512i a_i8_vec, sum_i8_vec;
     __m512h a_f16_low_vec, a_f16_high_vec;
     __m512h sum_f16_low_vec, sum_f16_high_vec;
@@ -1791,8 +1800,8 @@ SIMSIMD_PUBLIC void simsimd_wsum_i8_sapphire(                       //
 
     // The general case.
     __mmask64 mask = 0xFFFFFFFFFFFFFFFFull;
-    __m512h alpha_vec = _mm512_set1_ph((_Float16)alpha);
-    __m512h beta_vec = _mm512_set1_ph((_Float16)beta);
+    __m512h alpha_vec = _mm512_set1_ph_from_ps(alpha);
+    __m512h beta_vec = _mm512_set1_ph_from_ps(beta);
     __m512i a_i8_vec, b_i8_vec, sum_i8_vec;
     __m512h a_f16_low_vec, a_f16_high_vec, b_f16_low_vec, b_f16_high_vec;
     __m512h a_scaled_f16_low_vec, a_scaled_f16_high_vec, sum_f16_low_vec, sum_f16_high_vec;
@@ -1836,8 +1845,8 @@ SIMSIMD_PUBLIC void simsimd_fma_i8_sapphire(
     simsimd_distance_t alpha, simsimd_distance_t beta, simsimd_i8_t *result) {
 
     __mmask64 mask = 0xFFFFFFFFFFFFFFFF;
-    __m512h alpha_vec = _mm512_set1_ph((_Float16)alpha);
-    __m512h beta_vec = _mm512_set1_ph((_Float16)beta);
+    __m512h alpha_vec = _mm512_set1_ph_from_ps(alpha);
+    __m512h beta_vec = _mm512_set1_ph_from_ps(beta);
     __m512i a_i8_vec, b_i8_vec, c_i8_vec, sum_i8_vec;
     __m512h a_f16_low_vec, a_f16_high_vec, b_f16_low_vec, b_f16_high_vec;
     __m512h c_f16_low_vec, c_f16_high_vec, ab_f16_low_vec, ab_f16_high_vec;
@@ -1889,8 +1898,8 @@ SIMSIMD_PUBLIC void simsimd_fma_u8_sapphire(
     simsimd_distance_t alpha, simsimd_distance_t beta, simsimd_u8_t *result) {
 
     __mmask64 mask = 0xFFFFFFFFFFFFFFFF;
-    __m512h alpha_vec = _mm512_set1_ph((_Float16)alpha);
-    __m512h beta_vec = _mm512_set1_ph((_Float16)beta);
+    __m512h alpha_vec = _mm512_set1_ph_from_ps(alpha);
+    __m512h beta_vec = _mm512_set1_ph_from_ps(beta);
     __m512i a_u8_vec, b_u8_vec, c_u8_vec, sum_u8_vec;
     __m512h a_f16_low_vec, a_f16_high_vec, b_f16_low_vec, b_f16_high_vec;
     __m512h c_f16_low_vec, c_f16_high_vec, ab_f16_low_vec, ab_f16_high_vec;

include/simsimd/sparse.h

@@ -527,10 +527,10 @@ SIMSIMD_PUBLIC void simsimd_intersect_u32_ice(        //
 #if SIMSIMD_TARGET_TURIN
 #pragma GCC push_options
 #pragma GCC target("avx2", "avx512f", "avx512vl", "bmi2", "lzcnt", "popcnt", "avx512bw", "avx512vbmi2", "avx512bf16", \
-                   "avx512vnni", "avx512vp2intersect")
-#pragma clang attribute push(                                                                                       \
-    __attribute__((target(                                                                                          \
-        "avx2,avx512f,avx512vl,bmi2,lzcnt,popcnt,avx512bw,avx512vbmi2,avx512bf16,avx512vnni,avx512vp2intersect"))), \
+                   "avx512vnni", "avx512vp2intersect", "avx512dq")
+#pragma clang attribute push(                                                                                                \
+    __attribute__((target(                                                                                                   \
+        "avx2,avx512f,avx512vl,bmi2,lzcnt,popcnt,avx512bw,avx512vbmi2,avx512bf16,avx512vnni,avx512vp2intersect,avx512dq"))), \
     apply_to = function)
 
 SIMSIMD_PUBLIC void simsimd_intersect_u16_turin(      //