5050
5151/* Memory map constants for STM32H5xx */
5252#define STM32H5_FLASH_BANK1_BASE 0x08000000U
53- #define STM32H5_FLASH_BANK2_BASE 0x08100000U
5453#define STM32H5_FLASH_BANK_SIZE 0x00100000U
5554#define STM32H5_SRAM1_BASE 0x0a000000U
5655#define STM32H5_SRAM1_SIZE 0x00040000U
7271#define STM32H503_SRAM2_ALIAS 0x20004000U
7372/* Memory map constants for STM32H523/H533 */
7473#define STM32H523_FLASH_BANK1_BASE 0x08000000U
75- #define STM32H523_FLASH_BANK2_BASE 0x08040000U
7674#define STM32H523_FLASH_BANK_SIZE 0x00040000U
7775#define STM32H523_SRAM1_BASE 0x0a000000U
7876#define STM32H523_SRAM1_SIZE 0x00020000U
104102#define STM32H5_FLASH_CTRL_BANK1 (0U << 31U)
105103#define STM32H5_FLASH_CTRL_BANK2 (1U << 31U)
106104
107- #define STM32H5_SECTORS_PER_BANK 128U
108105#define STM32H5_FLASH_SECTOR_SIZE 0x00002000U
109106#define STM32H503_SECTORS_PER_BANK 8U
110- #define STM32H523_SECTORS_PER_BANK 32U
111107#define STM32H5_FLASH_BANK_MASK 0x80000000U
112108#define STM32H5_FLASH_SECTOR_COUNT_MASK 0x000000ffU
113109
124120#define STM32H5_DBGMCU_APB3FREEZE (STM32H5_DBGMCU_BASE + 0x14U)
125121#define STM32H5_DBGMCU_AHB1FREEZE (STM32H5_DBGMCU_BASE + 0x20U)
126122#define STM32H5_UID_BASE 0x08fff800U
123+ #define STM32H5_FLASH_SIZE 0x08fff80cU
127124
128125#define STM32H5_DBGMCU_IDCODE_DEV_MASK 0x00000fffU
129126#define STM32H5_DBGMCU_IDCODE_REV_MASK 0xffff0000U
@@ -215,21 +212,30 @@ bool stm32h5_probe(target_s *const target)
215212 target -> exit_flash_mode = stm32h5_exit_flash_mode ;
216213 target_add_commands (target , stm32h5_cmd_list , target -> driver );
217214
215+ uint16_t flash_size_kb = target_mem32_read16 (target , STM32H5_FLASH_SIZE );
216+ uint32_t flash_bank_size = flash_size_kb * 1024U / 2U ;
217+ uint16_t sectors_per_bank = flash_size_kb / 8U / 2U ;
218218 switch (target -> part_id ) {
219219 case ID_STM32H5xx :
220220 /*
221- * Build the RAM map.
221+ * Build the RAM map. 256+64+320=640.
222222 * This uses the addresses and sizes found in §2.3.2, Figure 2, pg113 of RM0481 Rev. 1
223223 */
224224 target_add_ram32 (target , STM32H5_SRAM1_BASE , STM32H5_SRAM1_SIZE );
225225 target_add_ram32 (target , STM32H5_SRAM2_BASE , STM32H5_SRAM2_SIZE );
226226 target_add_ram32 (target , STM32H5_SRAM3_BASE , STM32H5_SRAM3_SIZE );
227+ target_add_ram32 (target , 0x20000000 , 0x000a0000U );
227228
228- /* Build the Flash map */
229- stm32h5_add_flash (target , STM32H5_FLASH_BANK1_BASE , STM32H5_FLASH_BANK_SIZE ,
230- STM32H5_SECTORS_PER_BANK | STM32H5_FLASH_CTRL_BANK1 );
231- stm32h5_add_flash (target , STM32H5_FLASH_BANK2_BASE , STM32H5_FLASH_BANK_SIZE ,
232- STM32H5_SECTORS_PER_BANK | STM32H5_FLASH_CTRL_BANK2 );
229+ /* Build the Flash map. Two banks of 1024 KiB (128 sectors of 8 KiB) */
230+ if (flash_size_kb != 1024 && flash_size_kb != 2048 ) {
231+ flash_size_kb = 2048 ;
232+ flash_bank_size = flash_size_kb * 1024U / 2U ;
233+ sectors_per_bank = flash_size_kb / 8U / 2U ;
234+ }
235+ stm32h5_add_flash (
236+ target , STM32H5_FLASH_BANK1_BASE , flash_bank_size , sectors_per_bank | STM32H5_FLASH_CTRL_BANK1 );
237+ stm32h5_add_flash (target , STM32H5_FLASH_BANK1_BASE + flash_bank_size , flash_bank_size ,
238+ sectors_per_bank | STM32H5_FLASH_CTRL_BANK2 );
233239 break ;
234240 case ID_STM32H523 :
235241 /*
@@ -243,10 +249,15 @@ bool stm32h5_probe(target_s *const target)
243249 target_add_ram32 (target , 0x20000000 , 0x00044000U );
244250
245251 /* Build the Flash map. Two banks of 256 KiB (32 sectors of 8 KiB) */
246- stm32h5_add_flash (target , STM32H523_FLASH_BANK1_BASE , STM32H523_FLASH_BANK_SIZE ,
247- STM32H523_SECTORS_PER_BANK | STM32H5_FLASH_CTRL_BANK1 );
248- stm32h5_add_flash (target , STM32H523_FLASH_BANK2_BASE , STM32H523_FLASH_BANK_SIZE ,
249- STM32H523_SECTORS_PER_BANK | STM32H5_FLASH_CTRL_BANK2 );
252+ if (flash_size_kb != 256 && flash_size_kb != 512 ) {
253+ flash_size_kb = 512 ;
254+ flash_bank_size = flash_size_kb * 1024U / 2U ;
255+ sectors_per_bank = flash_size_kb / 8U / 2U ;
256+ }
257+ stm32h5_add_flash (
258+ target , STM32H5_FLASH_BANK1_BASE , flash_bank_size , sectors_per_bank | STM32H5_FLASH_CTRL_BANK1 );
259+ stm32h5_add_flash (target , STM32H5_FLASH_BANK1_BASE + flash_bank_size , flash_bank_size ,
260+ sectors_per_bank | STM32H5_FLASH_CTRL_BANK2 );
250261 break ;
251262 case ID_STM32H503 :
252263 /*
0 commit comments