@@ -287,6 +287,9 @@ def save_configuration(
287
287
split_qkv ,
288
288
train_t5xxl ,
289
289
cpu_offload_checkpointing ,
290
+ blocks_to_swap ,
291
+ single_blocks_to_swap ,
292
+ double_blocks_to_swap ,
290
293
img_attn_dim ,
291
294
img_mlp_dim ,
292
295
img_mod_dim ,
@@ -553,6 +556,9 @@ def open_configuration(
553
556
split_qkv ,
554
557
train_t5xxl ,
555
558
cpu_offload_checkpointing ,
559
+ blocks_to_swap ,
560
+ single_blocks_to_swap ,
561
+ double_blocks_to_swap ,
556
562
img_attn_dim ,
557
563
img_mlp_dim ,
558
564
img_mod_dim ,
@@ -853,6 +859,9 @@ def train_model(
853
859
split_qkv ,
854
860
train_t5xxl ,
855
861
cpu_offload_checkpointing ,
862
+ blocks_to_swap ,
863
+ single_blocks_to_swap ,
864
+ double_blocks_to_swap ,
856
865
img_attn_dim ,
857
866
img_mlp_dim ,
858
867
img_mod_dim ,
@@ -1558,6 +1567,9 @@ def train_model(
1558
1567
"mem_eff_save" : mem_eff_save if flux1_checkbox else None ,
1559
1568
"apply_t5_attn_mask" : apply_t5_attn_mask if flux1_checkbox else None ,
1560
1569
"cpu_offload_checkpointing" : cpu_offload_checkpointing if flux1_checkbox else None ,
1570
+ "blocks_to_swap" : blocks_to_swap if flux1_checkbox else None ,
1571
+ "single_blocks_to_swap" : single_blocks_to_swap if flux1_checkbox else None ,
1572
+ "double_blocks_to_swap" : double_blocks_to_swap if flux1_checkbox else None ,
1561
1573
}
1562
1574
1563
1575
# Given dictionary `config_toml_data`
@@ -2745,6 +2757,9 @@ def update_LoRA_settings(
2745
2757
flux1_training .split_qkv ,
2746
2758
flux1_training .train_t5xxl ,
2747
2759
flux1_training .cpu_offload_checkpointing ,
2760
+ flux1_training .blocks_to_swap ,
2761
+ flux1_training .single_blocks_to_swap ,
2762
+ flux1_training .double_blocks_to_swap ,
2748
2763
flux1_training .img_attn_dim ,
2749
2764
flux1_training .img_mlp_dim ,
2750
2765
flux1_training .img_mod_dim ,
0 commit comments