diff --git a/interp/src/flatten/flat_ir/cell_prototype.rs b/interp/src/flatten/flat_ir/cell_prototype.rs index dce481e579..1097fe8c77 100644 --- a/interp/src/flatten/flat_ir/cell_prototype.rs +++ b/interp/src/flatten/flat_ir/cell_prototype.rs @@ -59,6 +59,7 @@ pub enum PrimType1 { UnsynSMult, UnsynSDiv, UnsynSMod, + Undef, } /// An enum for encoding FP primitives operator types @@ -654,6 +655,14 @@ impl CellPrototype { } } + "undef" => { + get_params![params; width: "WIDTH"]; + Self::SingleWidth { + op: PrimType1::Undef, + width: width.try_into().unwrap(), + } + } + _ => CellPrototype::Unknown( name.to_string(), param_binding.clone(), diff --git a/interp/src/flatten/primitives/builder.rs b/interp/src/flatten/primitives/builder.rs index 2b93755c32..5c1b1c5a4b 100644 --- a/interp/src/flatten/primitives/builder.rs +++ b/interp/src/flatten/primitives/builder.rs @@ -96,6 +96,7 @@ pub fn build_primitive( PrimType1::UnsynSMod => { Box::new(StdUnsynSmod::new(base_port, *width)) } + PrimType1::Undef => Box::new(StdUndef::new(base_port, *width)), }, CellPrototype::FixedPoint { op: _, diff --git a/interp/src/flatten/primitives/combinational.rs b/interp/src/flatten/primitives/combinational.rs index 5158fecc4f..5e824032e8 100644 --- a/interp/src/flatten/primitives/combinational.rs +++ b/interp/src/flatten/primitives/combinational.rs @@ -42,7 +42,7 @@ impl Primitive for StdConst { } fn has_comb(&self) -> bool { - false + true } fn has_stateful(&self) -> bool { @@ -548,3 +548,18 @@ comb_primitive!(StdUnsynSmod[WIDTH](left [0], right [1]) -> (out [2]) { &left.as_signed(), &right.as_signed()), WIDTH))) }); + +pub struct StdUndef(GlobalPortIdx); + +impl StdUndef { + pub fn new(base_port: GlobalPortIdx, _width: u32) -> Self { + Self(base_port) + } +} + +impl Primitive for StdUndef { + fn exec_comb(&self, port_map: &mut PortMap) -> UpdateResult { + port_map.write_undef(self.0)?; + Ok(UpdateStatus::Unchanged) + } +}