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LDRSW: AARCH64 don't have correct access #2802

@poisonflood

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@poisonflood

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System Capstone runs on OS/arch/bits , Arch x86-64
Capstone module affected aarch64
Source of Capstone git clone
Version/git commit edb1ac7

Instruction bytes giving faulty results

CA 7A AA B8

the bug in my log:

 3663         operands[1].type: MEM
 3664             - operands[1].mem.base: REG = x22 (0xA7D0)
 3665             - operands[1].mem.index: REG = x10 (0x2)
 3666             Shift: LSL #2
 3667             → effective address: 0xA7D8
 3668             → direction: 0x0
 3669             → cs_insn.writeback: 0b0
 3670             - operands[1].access: 0 CS_AC_WRITE: 2 CS_AC_READ: 1
 3671 [0x00002BDC] [CA 7A AA B8] 0x00002BD8: "LDRSW X10, [X22, X10, LSL #2]" X22=0xA7D0 X10=0x2 => X10=0xFFFFFFFFFFFF8970

Expected results

It should be:

 3670             - operands[1].access: 1 CS_AC_WRITE: 2 CS_AC_READ: 1
                                                             ---

Steps to get the wrong result

With cstool:

./cstool -d aarch64 "CA 7A AA B8"
 0  ca 7a aa b8  ldrsw  x10, [x22, x10, lsl #2]
        ID: 638 (ldrsw)
        op_count: 2
                operands[0].type: REG = x10
                operands[0].access: WRITE
                operands[1].type: MEM
                        operands[1].mem.base: REG = x22
                        operands[1].mem.index: REG = x10
                        Shift: type = 1, value = 2
        Registers read: x22 x10
        Registers modified: x10

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